--- linux-mvl-dove-2.6.32.orig/Makefile
+++ linux-mvl-dove-2.6.32/Makefile
@@ -1,7 +1,7 @@
 VERSION = 2
 PATCHLEVEL = 6
 SUBLEVEL = 32
-EXTRAVERSION =
+EXTRAVERSION = .44+drm33.19
 NAME = Man-Eating Seals of Antiquity
 
 # *DOCUMENTATION*
@@ -331,14 +331,23 @@
 AFLAGS_KERNEL	=
 CFLAGS_GCOV	= -fprofile-arcs -ftest-coverage
 
+# Prefer linux-backports-modules
+ifneq ($(KBUILD_SRC),)
+ifneq ($(shell if test -e $(KBUILD_OUTPUT)/ubuntu-build; then echo yes; fi),yes)
+UBUNTUINCLUDE := -I/usr/src/linux-headers-lbm-$(KERNELRELEASE)
+endif
+endif
 
 # Use LINUXINCLUDE when you must reference the include/ directory.
 # Needed to be compatible with the O= option
-LINUXINCLUDE    := -Iinclude \
+LINUXINCLUDE    := $(UBUNTUINCLUDE) -Iinclude \
                    $(if $(KBUILD_SRC),-Iinclude2 -I$(srctree)/include) \
                    -I$(srctree)/arch/$(hdr-arch)/include               \
                    -include include/linux/autoconf.h
 
+# UBUNTU: Include our third party driver stuff too
+LINUXINCLUDE   += -Iubuntu/include $(if $(KBUILD_SRC),-I$(srctree)/ubuntu/include)
+
 KBUILD_CPPFLAGS := -D__KERNEL__
 
 KBUILD_CFLAGS   := -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs \
@@ -464,12 +473,12 @@
 # Carefully list dependencies so we do not try to build scripts twice
 # in parallel
 PHONY += scripts
-scripts: scripts_basic include/config/auto.conf
+scripts: scripts_basic include/config/auto.conf include/config/tristate.conf
 	$(Q)$(MAKE) $(build)=$(@)
 
 # Objects we will link into vmlinux / subdirs we need to visit
 init-y		:= init/
-drivers-y	:= drivers/ sound/ firmware/
+drivers-y	:= drivers/ sound/ firmware/ ubuntu/
 net-y		:= net/
 libs-y		:= lib/
 core-y		:= usr/
@@ -491,7 +500,7 @@
 # with it and forgot to run make oldconfig.
 # if auto.conf.cmd is missing then we are probably in a cleaned tree so
 # we execute the config step to be sure to catch updated Kconfig files
-include/config/auto.conf: $(KCONFIG_CONFIG) include/config/auto.conf.cmd
+include/config/%.conf: $(KCONFIG_CONFIG) include/config/auto.conf.cmd
 	$(Q)$(MAKE) -f $(srctree)/Makefile silentoldconfig
 else
 # external modules needs include/linux/autoconf.h and include/config/auto.conf
@@ -876,6 +885,9 @@
 PHONY += $(vmlinux-dirs)
 $(vmlinux-dirs): prepare scripts
 	$(Q)$(MAKE) $(build)=$@
+ifdef CONFIG_MODULES
+	$(Q)$(MAKE) $(modbuiltin)=$@
+endif
 
 # Build the kernel release string
 #
@@ -1126,6 +1138,7 @@
 PHONY += modules
 modules: $(vmlinux-dirs) $(if $(KBUILD_BUILTIN),vmlinux)
 	$(Q)$(AWK) '!x[$$0]++' $(vmlinux-dirs:%=$(objtree)/%/modules.order) > $(objtree)/modules.order
+	$(Q)$(AWK) '!x[$$0]++' $(vmlinux-dirs:%=$(objtree)/%/modules.builtin) > $(objtree)/modules.builtin
 	@$(kecho) '  Building modules, stage 2.';
 	$(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modpost
 	$(Q)$(MAKE) -f $(srctree)/scripts/Makefile.fwinst obj=firmware __fw_modbuild
@@ -1155,6 +1168,7 @@
 		ln -s $(objtree) $(MODLIB)/build ; \
 	fi
 	@cp -f $(objtree)/modules.order $(MODLIB)/
+	@cp -f $(objtree)/modules.builtin $(MODLIB)/
 	$(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modinst
 
 # This depmod is only for convenience to give the initial
@@ -1218,6 +1232,7 @@
 		-o -name '.*.d' -o -name '.*.tmp' -o -name '*.mod.c' \
 		-o -name '*.symtypes' -o -name 'modules.order' \
 		-o -name 'Module.markers' -o -name '.tmp_*.o.*' \
+		-o -name 'modules.builtin' \
 		-o -name '*.gcno' \) -type f -print | xargs rm -f
 
 # mrproper - Delete all generated files, including .config
@@ -1416,7 +1431,8 @@
 clean:	rm-dirs := $(MODVERDIR)
 clean: rm-files := $(KBUILD_EXTMOD)/Module.symvers \
                    $(KBUILD_EXTMOD)/Module.markers \
-                   $(KBUILD_EXTMOD)/modules.order
+                   $(KBUILD_EXTMOD)/modules.order \
+                   $(KBUILD_EXTMOD)/modules.builtin
 clean: $(clean-dirs)
 	$(call cmd,rmdirs)
 	$(call cmd,rmfiles)
--- linux-mvl-dove-2.6.32.orig/MAINTAINERS
+++ linux-mvl-dove-2.6.32/MAINTAINERS
@@ -1974,6 +1974,12 @@
 S:	Maintained
 F:	drivers/platform/x86/eeepc-laptop.c
 
+EFIFB FRAMEBUFFER DRIVER
+L:	linux-fbdev@vger.kernel.org
+M:	Peter Jones <pjones@redhat.com>
+S:	Maintained
+F:	drivers/video/efifb.c
+
 EFS FILESYSTEM
 W:	http://aeschi.ch.eu.org/efs/
 S:	Orphan
@@ -5004,7 +5010,6 @@
 
 STABLE BRANCH
 M:	Greg Kroah-Hartman <greg@kroah.com>
-M:	Chris Wright <chrisw@sous-sol.org>
 L:	stable@kernel.org
 S:	Maintained
 
@@ -5594,9 +5599,11 @@
 F:	drivers/net/wireless/rndis_wlan.c
 
 USB XHCI DRIVER
-M:	Sarah Sharp <sarah.a.sharp@intel.com>
+M:	Sarah Sharp <sarah.a.sharp@linux.intel.com>
 L:	linux-usb@vger.kernel.org
 S:	Supported
+F:	drivers/usb/host/xhci*
+F:	drivers/usb/host/pci-quirks*
 
 USB ZC0301 DRIVER
 M:	Luca Risolia <luca.risolia@studio.unibo.it>
@@ -5718,6 +5725,14 @@
 S:	Maintained
 F:	drivers/net/vmxnet3/
 
+VMware PVSCSI driver
+M:	Alok Kataria <akataria@vmware.com>
+M:	VMware PV-Drivers <pv-drivers@vmware.com>
+L:	linux-scsi@vger.kernel.org
+S:	Maintained
+F:	drivers/scsi/vmw_pvscsi.c
+F:	drivers/scsi/vmw_pvscsi.h
+
 VOLTAGE AND CURRENT REGULATOR FRAMEWORK
 M:	Liam Girdwood <lrg@slimlogic.co.uk>
 M:	Mark Brown <broonie@opensource.wolfsonmicro.com>
--- linux-mvl-dove-2.6.32.orig/sound/synth/emux/emux_hwdep.c
+++ linux-mvl-dove-2.6.32/sound/synth/emux/emux_hwdep.c
@@ -128,6 +128,9 @@
 	strcpy(hw->name, SNDRV_EMUX_HWDEP_NAME);
 	hw->iface = SNDRV_HWDEP_IFACE_EMUX_WAVETABLE;
 	hw->ops.ioctl = snd_emux_hwdep_ioctl;
+	/* The ioctl parameter types are compatible between 32- and
+	 * 64-bit architectures, so use the same function. */
+	hw->ops.ioctl_compat = snd_emux_hwdep_ioctl;
 	hw->exclusive = 1;
 	hw->private_data = emu;
 	if ((err = snd_card_register(emu->card)) < 0)
--- linux-mvl-dove-2.6.32.orig/sound/mips/sgio2audio.c
+++ linux-mvl-dove-2.6.32/sound/mips/sgio2audio.c
@@ -609,7 +609,7 @@
 	/* alloc virtual 'dma' area */
 	if (runtime->dma_area)
 		vfree(runtime->dma_area);
-	runtime->dma_area = vmalloc(size);
+	runtime->dma_area = vmalloc_user(size);
 	if (runtime->dma_area == NULL)
 		return -ENOMEM;
 	runtime->dma_bytes = size;
--- linux-mvl-dove-2.6.32.orig/sound/arm/pxa2xx-ac97-lib.c
+++ linux-mvl-dove-2.6.32/sound/arm/pxa2xx-ac97-lib.c
@@ -16,14 +16,19 @@
 #include <linux/interrupt.h>
 #include <linux/clk.h>
 #include <linux/delay.h>
+#include <linux/sched.h>
+#include <linux/wait.h>
 
 #include <sound/ac97_codec.h>
 #include <sound/pxa2xx-lib.h>
 
 #include <asm/irq.h>
+#include <mach/hardware.h>
 #include <mach/regs-ac97.h>
 #include <mach/pxa2xx-gpio.h>
+#ifndef CONFIG_ARCH_DOVE
 #include <mach/audio.h>
+#endif
 
 static DEFINE_MUTEX(car_mutex);
 static DECLARE_WAIT_QUEUE_HEAD(gsr_wq);
@@ -48,6 +53,7 @@
 	RESETGPIO_NORMAL_ALTFUNC
 };
 
+#ifdef CONFIG_PXA27x
 /**
  * set_resetgpio_mode - computes and sets the AC97_RESET gpio mode on PXA
  * @mode: chosen action
@@ -80,19 +86,29 @@
 	if (mode)
 		pxa_gpio_mode(mode);
 }
-
+#endif
 unsigned short pxa2xx_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
 {
 	unsigned short val = -1;
 	volatile u32 *reg_addr;
+#ifdef CONFIG_ARCH_DOVE
+	u16 dummy_read_timeout=0;
+#endif
 
 	mutex_lock(&car_mutex);
 
+#ifndef CONFIG_ARCH_DOVE
 	/* set up primary or secondary codec space */
 	if (cpu_is_pxa25x() && reg == AC97_GPIO_STATUS)
 		reg_addr = ac97->num ? &SMC_REG_BASE : &PMC_REG_BASE;
 	else
 		reg_addr = ac97->num ? &SAC_REG_BASE : &PAC_REG_BASE;
+#else
+	if (reg == AC97_GPIO_STATUS)
+		reg_addr = ac97->num ? &SMC_REG_BASE : &PMC_REG_BASE;
+	else
+		reg_addr = ac97->num ? &SAC_REG_BASE : &PAC_REG_BASE;
+#endif
 	reg_addr += (reg >> 1);
 
 	/* start read access across the ac97 link */
@@ -103,10 +119,14 @@
 		goto out;
 	if (wait_event_timeout(gsr_wq, (GSR | gsr_bits) & GSR_SDONE, 1) <= 0 &&
 	    !((GSR | gsr_bits) & GSR_SDONE)) {
+#ifndef CONFIG_ARCH_DOVE	    
 		printk(KERN_ERR "%s: read error (ac97_reg=%d GSR=%#lx)\n",
 				__func__, reg, GSR | gsr_bits);
 		val = -1;
 		goto out;
+#else
+		dummy_read_timeout=1;
+#endif		
 	}
 
 	/* valid data now */
@@ -116,6 +136,16 @@
 	/* but we've just started another cycle... */
 	wait_event_timeout(gsr_wq, (GSR | gsr_bits) & GSR_SDONE, 1);
 
+#ifdef CONFIG_ARCH_DOVE
+	if (val==0xffff && dummy_read_timeout)
+	{
+	//The controller times out the read operation if the codec fails to respond in 4 AC97_SYNC frames. 
+        //In this case, the second read operation return a time-out data vaule of 0x0000_FFFF
+		printk(KERN_ERR "%s: read error (ac97_reg=%d GSR=%#lx)\n",
+			__func__, reg, GSR | gsr_bits);
+	}
+#endif
+
 out:	mutex_unlock(&car_mutex);
 	return val;
 }
@@ -129,10 +159,18 @@
 	mutex_lock(&car_mutex);
 
 	/* set up primary or secondary codec space */
+#ifndef CONFIG_ARCH_DOVE
 	if (cpu_is_pxa25x() && reg == AC97_GPIO_STATUS)
 		reg_addr = ac97->num ? &SMC_REG_BASE : &PMC_REG_BASE;
 	else
 		reg_addr = ac97->num ? &SAC_REG_BASE : &PAC_REG_BASE;
+#else
+	if (reg == AC97_GPIO_STATUS)
+		reg_addr = ac97->num ? &SMC_REG_BASE : &PMC_REG_BASE;
+	else
+		reg_addr = ac97->num ? &SAC_REG_BASE : &PAC_REG_BASE;
+#endif
+
 	reg_addr += (reg >> 1);
 
 	GSR = GSR_CDONE | GSR_SDONE;
@@ -199,7 +237,7 @@
 }
 #endif
 
-#ifdef CONFIG_PXA3xx
+#if defined(CONFIG_PXA3xx) || defined(CONFIG_ARCH_DOVE)
 static inline void pxa_ac97_warm_pxa3xx(void)
 {
 	int timeout = 100;
@@ -240,6 +278,7 @@
 {
 	unsigned long gsr;
 
+#ifndef CONFIG_ARCH_DOVE
 #ifdef CONFIG_PXA25x
 	if (cpu_is_pxa25x())
 		pxa_ac97_warm_pxa25x();
@@ -256,6 +295,10 @@
 	else
 #endif
 		BUG();
+#else
+	pxa_ac97_warm_pxa3xx();
+#endif
+
 	gsr = GSR | gsr_bits;
 	if (!(gsr & (GSR_PCR | GSR_SCR))) {
 		printk(KERN_INFO "%s: warm reset timeout (GSR=%#lx)\n",
@@ -272,6 +315,7 @@
 {
 	unsigned long gsr;
 
+#ifndef CONFIG_ARCH_DOVE
 #ifdef CONFIG_PXA25x
 	if (cpu_is_pxa25x())
 		pxa_ac97_cold_pxa25x();
@@ -288,6 +332,9 @@
 	else
 #endif
 		BUG();
+#else
+	pxa_ac97_cold_pxa3xx();
+#endif
 
 	gsr = GSR | gsr_bits;
 	if (!(gsr & (GSR_PCR | GSR_SCR))) {
@@ -319,6 +366,7 @@
 		gsr_bits |= status;
 		wake_up(&gsr_wq);
 
+#ifndef CONFIG_ARCH_DOVE
 		/* Although we don't use those we still need to clear them
 		   since they tend to spuriously trigger when MMC is used
 		   (hardware bug? go figure)... */
@@ -327,6 +375,7 @@
 			PISR = PISR_EOC;
 			MCSR = MCSR_EOC;
 		}
+#endif
 
 		return IRQ_HANDLED;
 	}
@@ -345,6 +394,7 @@
 
 int pxa2xx_ac97_hw_resume(void)
 {
+#ifndef CONFIG_ARCH_DOVE
 	if (cpu_is_pxa25x() || cpu_is_pxa27x()) {
 		pxa_gpio_mode(GPIO31_SYNC_AC97_MD);
 		pxa_gpio_mode(GPIO30_SDATA_OUT_AC97_MD);
@@ -355,7 +405,9 @@
 		/* Use GPIO 113 or 95 as AC97 Reset on Bulverde */
 		set_resetgpio_mode(RESETGPIO_NORMAL_ALTFUNC);
 	}
+#endif
 	clk_enable(ac97_clk);
+	GCR &= ~GCR_ACLINK_OFF;
 	return 0;
 }
 EXPORT_SYMBOL_GPL(pxa2xx_ac97_hw_resume);
@@ -364,6 +416,7 @@
 int __devinit pxa2xx_ac97_hw_probe(struct platform_device *dev)
 {
 	int ret;
+#ifndef CONFIG_ARCH_DOVE
 	pxa2xx_audio_ops_t *pdata = dev->dev.platform_data;
 
 	if (pdata) {
@@ -403,7 +456,7 @@
 			goto err_conf;
 		}
 	}
-
+#endif
 	ac97_clk = clk_get(&dev->dev, "AC97CLK");
 	if (IS_ERR(ac97_clk)) {
 		ret = PTR_ERR(ac97_clk);
--- linux-mvl-dove-2.6.32.orig/sound/arm/Kconfig
+++ linux-mvl-dove-2.6.32/sound/arm/Kconfig
@@ -1,3 +1,4 @@
+
 # ALSA ARM drivers
 
 menuconfig SND_ARM
@@ -39,5 +40,5 @@
 	  Say Y or M if you want to support any AC97 codec attached to
 	  the PXA2xx AC97 interface.
 
-endif	# SND_ARM
 
+endif	# SND_ARM
--- linux-mvl-dove-2.6.32.orig/sound/arm/pxa2xx-pcm.h
+++ linux-mvl-dove-2.6.32/sound/arm/pxa2xx-pcm.h
@@ -9,7 +9,11 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
+#ifndef CONFIG_ARCH_DOVE
 #include <mach/dma.h>
+#else
+#include <asm/hardware/pxa-dma.h>
+#endif
 
 struct pxa2xx_runtime_data {
 	int dma_ch;
--- linux-mvl-dove-2.6.32.orig/sound/arm/Makefile
+++ linux-mvl-dove-2.6.32/sound/arm/Makefile
@@ -14,3 +14,5 @@
 
 obj-$(CONFIG_SND_PXA2XX_AC97)	+= snd-pxa2xx-ac97.o
 snd-pxa2xx-ac97-objs		:= pxa2xx-ac97.o
+
+obj-$(CONFIG_MV_INCLUDE_AUDIO) 	+= ../../arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_audio/
\ No newline at end of file
--- linux-mvl-dove-2.6.32.orig/sound/arm/pxa2xx-ac97.c
+++ linux-mvl-dove-2.6.32/sound/arm/pxa2xx-ac97.c
@@ -20,6 +20,8 @@
 #include <sound/initval.h>
 #include <sound/pxa2xx-lib.h>
 
+#include <mach/hardware.h>
+#include <mach/pxa-regs.h>
 #include <mach/regs-ac97.h>
 #include <mach/audio.h>
 
--- linux-mvl-dove-2.6.32.orig/sound/arm/pxa2xx-pcm-lib.c
+++ linux-mvl-dove-2.6.32/sound/arm/pxa2xx-pcm-lib.c
@@ -12,7 +12,8 @@
 #include <sound/pcm_params.h>
 #include <sound/pxa2xx-lib.h>
 
-#include <mach/dma.h>
+#include <asm/dma.h>
+#include <mach/pxa-regs.h>
 
 #include "pxa2xx-pcm.h"
 
@@ -54,9 +55,11 @@
 		dma_desc->ddadr = next_desc_phys;
 		if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
 			dma_desc->dsadr = dma_buff_phys;
-			dma_desc->dtadr = rtd->params->dev_addr;
+			dma_desc->dtadr =
+				AC97_REG_4_PDMA(rtd->params->dev_addr);
 		} else {
-			dma_desc->dsadr = rtd->params->dev_addr;
+			dma_desc->dsadr =
+				AC97_REG_4_PDMA(rtd->params->dev_addr);
 			dma_desc->dtadr = dma_buff_phys;
 		}
 		if (period > totsize)
@@ -204,7 +207,7 @@
 				       &rtd->dma_desc_array_phys, GFP_KERNEL);
 	if (!rtd->dma_desc_array)
 		goto err1;
-
+	rtd->dma_ch = -1;
 	runtime->private_data = rtd;
 	return 0;
 
--- linux-mvl-dove-2.6.32.orig/sound/pcmcia/pdaudiocf/pdaudiocf_pcm.c
+++ linux-mvl-dove-2.6.32/sound/pcmcia/pdaudiocf/pdaudiocf_pcm.c
@@ -51,7 +51,7 @@
 			return 0; /* already enough large */
 		vfree(runtime->dma_area);
 	}
-	runtime->dma_area = vmalloc_32(size);
+	runtime->dma_area = vmalloc_32_user(size);
 	if (! runtime->dma_area)
 		return -ENOMEM;
 	runtime->dma_bytes = size;
--- linux-mvl-dove-2.6.32.orig/sound/pci/cmipci.c
+++ linux-mvl-dove-2.6.32/sound/pci/cmipci.c
@@ -941,13 +941,21 @@
 						struct snd_pcm_substream *substream)
 {
 	size_t ptr;
-	unsigned int reg;
+	unsigned int reg, rem, tries;
+
 	if (!rec->running)
 		return 0;
 #if 1 // this seems better..
 	reg = rec->ch ? CM_REG_CH1_FRAME2 : CM_REG_CH0_FRAME2;
-	ptr = rec->dma_size - (snd_cmipci_read_w(cm, reg) + 1);
-	ptr >>= rec->shift;
+	for (tries = 0; tries < 3; tries++) {
+		rem = snd_cmipci_read_w(cm, reg);
+		if (rem < rec->dma_size)
+			goto ok;
+	}
+	printk(KERN_ERR "cmipci: invalid PCM pointer: %#x\n", rem);
+	return SNDRV_PCM_POS_XRUN;
+ok:
+	ptr = (rec->dma_size - (rem + 1)) >> rec->shift;
 #else
 	reg = rec->ch ? CM_REG_CH1_FRAME1 : CM_REG_CH0_FRAME1;
 	ptr = snd_cmipci_read(cm, reg) - rec->offset;
--- linux-mvl-dove-2.6.32.orig/sound/pci/via82xx.c
+++ linux-mvl-dove-2.6.32/sound/pci/via82xx.c
@@ -1791,6 +1791,12 @@
 		.type = AC97_TUNE_HP_ONLY
 	},
 	{
+		.subvendor = 0x110a,
+		.subdevice = 0x0079,
+		.name = "Fujitsu Siemens D1289",
+		.type = AC97_TUNE_HP_ONLY
+	},
+	{
 		.subvendor = 0x1019,
 		.subdevice = 0x0a81,
 		.name = "ECS K7VTA3",
--- linux-mvl-dove-2.6.32.orig/sound/pci/ens1370.c
+++ linux-mvl-dove-2.6.32/sound/pci/ens1370.c
@@ -229,6 +229,7 @@
 #define ES_REG_1371_CODEC 0x14	/* W/R: Codec Read/Write register address */
 #define   ES_1371_CODEC_RDY	   (1<<31)	/* codec ready */
 #define   ES_1371_CODEC_WIP	   (1<<30)	/* codec register access in progress */
+#define   EV_1938_CODEC_MAGIC	   (1<<26)
 #define   ES_1371_CODEC_PIRD	   (1<<23)	/* codec read/write select register */
 #define   ES_1371_CODEC_WRITE(a,d) ((((a)&0x7f)<<16)|(((d)&0xffff)<<0))
 #define   ES_1371_CODEC_READS(a)   ((((a)&0x7f)<<16)|ES_1371_CODEC_PIRD)
@@ -603,12 +604,18 @@
 
 #ifdef CHIP1371
 
+static inline bool is_ev1938(struct ensoniq *ensoniq)
+{
+	return ensoniq->pci->device == 0x8938;
+}
+
 static void snd_es1371_codec_write(struct snd_ac97 *ac97,
 				   unsigned short reg, unsigned short val)
 {
 	struct ensoniq *ensoniq = ac97->private_data;
-	unsigned int t, x;
+	unsigned int t, x, flag;
 
+	flag = is_ev1938(ensoniq) ? EV_1938_CODEC_MAGIC : 0;
 	mutex_lock(&ensoniq->src_mutex);
 	for (t = 0; t < POLL_COUNT; t++) {
 		if (!(inl(ES_REG(ensoniq, 1371_CODEC)) & ES_1371_CODEC_WIP)) {
@@ -630,7 +637,8 @@
 				    0x00010000)
 					break;
 			}
-			outl(ES_1371_CODEC_WRITE(reg, val), ES_REG(ensoniq, 1371_CODEC));
+			outl(ES_1371_CODEC_WRITE(reg, val) | flag,
+			     ES_REG(ensoniq, 1371_CODEC));
 			/* restore SRC reg */
 			snd_es1371_wait_src_ready(ensoniq);
 			outl(x, ES_REG(ensoniq, 1371_SMPRATE));
@@ -647,8 +655,9 @@
 					    unsigned short reg)
 {
 	struct ensoniq *ensoniq = ac97->private_data;
-	unsigned int t, x, fail = 0;
+	unsigned int t, x, flag, fail = 0;
 
+	flag = is_ev1938(ensoniq) ? EV_1938_CODEC_MAGIC : 0;
       __again:
 	mutex_lock(&ensoniq->src_mutex);
 	for (t = 0; t < POLL_COUNT; t++) {
@@ -671,7 +680,8 @@
 				    0x00010000)
 					break;
 			}
-			outl(ES_1371_CODEC_READS(reg), ES_REG(ensoniq, 1371_CODEC));
+			outl(ES_1371_CODEC_READS(reg) | flag,
+			     ES_REG(ensoniq, 1371_CODEC));
 			/* restore SRC reg */
 			snd_es1371_wait_src_ready(ensoniq);
 			outl(x, ES_REG(ensoniq, 1371_SMPRATE));
@@ -683,6 +693,11 @@
 			/* now wait for the stinkin' data (RDY) */
 			for (t = 0; t < POLL_COUNT; t++) {
 				if ((x = inl(ES_REG(ensoniq, 1371_CODEC))) & ES_1371_CODEC_RDY) {
+					if (is_ev1938(ensoniq)) {
+						for (t = 0; t < 100; t++)
+							inl(ES_REG(ensoniq, CONTROL));
+						x = inl(ES_REG(ensoniq, 1371_CODEC));
+					}
 					mutex_unlock(&ensoniq->src_mutex);
 					return ES_1371_CODEC_READ(x);
 				}
--- linux-mvl-dove-2.6.32.orig/sound/pci/intel8x0.c
+++ linux-mvl-dove-2.6.32/sound/pci/intel8x0.c
@@ -1776,6 +1776,12 @@
         },
 	{
 		.subvendor = 0x1014,
+		.subdevice = 0x0534,
+		.name = "ThinkPad X31",
+		.type = AC97_TUNE_INV_EAPD
+	},
+	{
+		.subvendor = 0x1014,
 		.subdevice = 0x1f00,
 		.name = "MS-9128",
 		.type = AC97_TUNE_ALC_JACK
@@ -1860,6 +1866,12 @@
 	},
 	{
 		.subvendor = 0x1028,
+		.subdevice = 0x0182,
+		.name = "Dell Latitude D610",	/* STAC9750/51 */
+		.type = AC97_TUNE_HP_ONLY
+	},
+	{
+		.subvendor = 0x1028,
 		.subdevice = 0x0186,
 		.name = "Dell Latitude D810", /* cf. Malone #41015 */
 		.type = AC97_TUNE_HP_MUTE_LED
--- linux-mvl-dove-2.6.32.orig/sound/pci/maestro3.c
+++ linux-mvl-dove-2.6.32/sound/pci/maestro3.c
@@ -849,6 +849,7 @@
 	struct snd_kcontrol *master_switch;
 	struct snd_kcontrol *master_volume;
 	struct tasklet_struct hwvol_tq;
+	unsigned int in_suspend;
 
 #ifdef CONFIG_PM
 	u16 *suspend_mem;
@@ -884,6 +885,7 @@
 MODULE_DEVICE_TABLE(pci, snd_m3_ids);
 
 static struct snd_pci_quirk m3_amp_quirk_list[] __devinitdata = {
+	SND_PCI_QUIRK(0x0E11, 0x0094, "Compaq Evo N600c", 0x0c),
 	SND_PCI_QUIRK(0x10f7, 0x833e, "Panasonic CF-28", 0x0d),
 	SND_PCI_QUIRK(0x10f7, 0x833d, "Panasonic CF-72", 0x0d),
 	SND_PCI_QUIRK(0x1033, 0x80f1, "NEC LM800J/7", 0x03),
@@ -1613,6 +1615,11 @@
 	outb(0x88, chip->iobase + SHADOW_MIX_REG_MASTER);
 	outb(0x88, chip->iobase + HW_VOL_COUNTER_MASTER);
 
+	/* Ignore spurious HV interrupts during suspend / resume, this avoids
+	   mistaking them for a mute button press. */
+	if (chip->in_suspend)
+		return;
+
 	if (!chip->master_switch || !chip->master_volume)
 		return;
 
@@ -2424,6 +2431,7 @@
 	if (chip->suspend_mem == NULL)
 		return 0;
 
+	chip->in_suspend = 1;
 	snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
 	snd_pcm_suspend_all(chip->pcm);
 	snd_ac97_suspend(chip->ac97);
@@ -2497,6 +2505,7 @@
 	snd_m3_hv_init(chip);
 
 	snd_power_change_state(card, SNDRV_CTL_POWER_D0);
+	chip->in_suspend = 0;
 	return 0;
 }
 #endif /* CONFIG_PM */
--- linux-mvl-dove-2.6.32.orig/sound/pci/atiixp.c
+++ linux-mvl-dove-2.6.32/sound/pci/atiixp.c
@@ -297,6 +297,7 @@
 MODULE_DEVICE_TABLE(pci, snd_atiixp_ids);
 
 static struct snd_pci_quirk atiixp_quirks[] __devinitdata = {
+	SND_PCI_QUIRK(0x105b, 0x0c81, "Foxconn RC4107MA-RS2", 0),
 	SND_PCI_QUIRK(0x15bd, 0x3100, "DFI RS482", 0),
 	{ } /* terminator */
 };
--- linux-mvl-dove-2.6.32.orig/sound/pci/ice1712/maya44.c
+++ linux-mvl-dove-2.6.32/sound/pci/ice1712/maya44.c
@@ -347,7 +347,7 @@
 
 /* known working input slots (0-4) */
 #define MAYA_LINE_IN	1	/* in-2 */
-#define MAYA_MIC_IN	4	/* in-5 */
+#define MAYA_MIC_IN	3	/* in-4 */
 
 static void wm8776_select_input(struct snd_maya44 *chip, int idx, int line)
 {
@@ -393,8 +393,8 @@
 	int changed;
 
 	mutex_lock(&chip->mutex);
-	changed = maya_set_gpio_bits(chip->ice, GPIO_MIC_RELAY,
-				     sel ? GPIO_MIC_RELAY : 0);
+	changed = maya_set_gpio_bits(chip->ice, 1 << GPIO_MIC_RELAY,
+				     sel ? (1 << GPIO_MIC_RELAY) : 0);
 	wm8776_select_input(chip, 0, sel ? MAYA_MIC_IN : MAYA_LINE_IN);
 	mutex_unlock(&chip->mutex);
 	return changed;
--- linux-mvl-dove-2.6.32.orig/sound/pci/ice1712/juli.c
+++ linux-mvl-dove-2.6.32/sound/pci/ice1712/juli.c
@@ -504,6 +504,31 @@
 }
 
 /*
+ * suspend/resume
+ * */
+
+#ifdef CONFIG_PM
+static int juli_resume(struct snd_ice1712 *ice)
+{
+	struct snd_akm4xxx *ak = ice->akm;
+	struct juli_spec *spec = ice->spec;
+	/* akm4358 un-reset, un-mute */
+	snd_akm4xxx_reset(ak, 0);
+	/* reinit ak4114 */
+	snd_ak4114_reinit(spec->ak4114);
+	return 0;
+}
+
+static int juli_suspend(struct snd_ice1712 *ice)
+{
+	struct snd_akm4xxx *ak = ice->akm;
+	/* akm4358 reset and soft-mute */
+	snd_akm4xxx_reset(ak, 1);
+	return 0;
+}
+#endif
+
+/*
  * initialize the chip
  */
 
@@ -646,6 +671,13 @@
 	ice->set_spdif_clock = juli_set_spdif_clock;
 
 	ice->spdif.ops.open = juli_spdif_in_open;
+
+#ifdef CONFIG_PM
+	ice->pm_resume = juli_resume;
+	ice->pm_suspend = juli_suspend;
+	ice->pm_suspend_enabled = 1;
+#endif
+
 	return 0;
 }
 
--- linux-mvl-dove-2.6.32.orig/sound/pci/au88x0/au88x0_pcm.c
+++ linux-mvl-dove-2.6.32/sound/pci/au88x0/au88x0_pcm.c
@@ -42,11 +42,7 @@
 	.rate_min = 5000,
 	.rate_max = 48000,
 	.channels_min = 1,
-#ifdef CHIP_AU8830
-	.channels_max = 4,
-#else
 	.channels_max = 2,
-#endif
 	.buffer_bytes_max = 0x10000,
 	.period_bytes_min = 0x1,
 	.period_bytes_max = 0x1000,
@@ -115,6 +111,17 @@
 	.periods_max = 64,
 };
 #endif
+#ifdef CHIP_AU8830
+static unsigned int au8830_channels[3] = {
+	1, 2, 4,
+};
+
+static struct snd_pcm_hw_constraint_list hw_constraints_au8830_channels = {
+	.count = ARRAY_SIZE(au8830_channels),
+	.list = au8830_channels,
+	.mask = 0,
+};
+#endif
 /* open callback */
 static int snd_vortex_pcm_open(struct snd_pcm_substream *substream)
 {
@@ -156,6 +163,15 @@
 		if (VORTEX_PCM_TYPE(substream->pcm) == VORTEX_PCM_ADB
 		    || VORTEX_PCM_TYPE(substream->pcm) == VORTEX_PCM_I2S)
 			runtime->hw = snd_vortex_playback_hw_adb;
+#ifdef CHIP_AU8830
+		if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK &&
+			VORTEX_PCM_TYPE(substream->pcm) == VORTEX_PCM_ADB) {
+			runtime->hw.channels_max = 4;
+			snd_pcm_hw_constraint_list(runtime, 0,
+				SNDRV_PCM_HW_PARAM_CHANNELS,
+				&hw_constraints_au8830_channels);
+		}
+#endif
 		substream->runtime->private_data = NULL;
 	}
 #ifndef CHIP_AU8810
--- linux-mvl-dove-2.6.32.orig/sound/pci/rme9652/hdsp.c
+++ linux-mvl-dove-2.6.32/sound/pci/rme9652/hdsp.c
@@ -4610,6 +4610,7 @@
 		if (err < 0)
 			return err;
 
+		memset(&info, 0, sizeof(info));
 		spin_lock_irqsave(&hdsp->lock, flags);
 		info.pref_sync_ref = (unsigned char)hdsp_pref_sync_ref(hdsp);
 		info.wordclock_sync_check = (unsigned char)hdsp_wc_sync_check(hdsp);
--- linux-mvl-dove-2.6.32.orig/sound/pci/rme9652/hdspm.c
+++ linux-mvl-dove-2.6.32/sound/pci/rme9652/hdspm.c
@@ -4127,6 +4127,7 @@
 
 	case SNDRV_HDSPM_IOCTL_GET_CONFIG_INFO:
 
+		memset(&info, 0, sizeof(info));
 		spin_lock_irq(&hdspm->lock);
 		info.pref_sync_ref = hdspm_pref_sync_ref(hdspm);
 		info.wordclock_sync_check = hdspm_wc_sync_check(hdspm);
--- linux-mvl-dove-2.6.32.orig/sound/pci/ctxfi/ctatc.c
+++ linux-mvl-dove-2.6.32/sound/pci/ctxfi/ctatc.c
@@ -166,18 +166,7 @@
 
 static unsigned long atc_get_ptp_phys(struct ct_atc *atc, int index)
 {
-	struct ct_vm *vm;
-	void *kvirt_addr;
-	unsigned long phys_addr;
-
-	vm = atc->vm;
-	kvirt_addr = vm->get_ptp_virt(vm, index);
-	if (kvirt_addr == NULL)
-		phys_addr = (~0UL);
-	else
-		phys_addr = virt_to_phys(kvirt_addr);
-
-	return phys_addr;
+	return atc->vm->get_ptp_phys(atc->vm, index);
 }
 
 static unsigned int convert_format(snd_pcm_format_t snd_format)
@@ -879,7 +868,7 @@
 	mutex_lock(&atc->atc_mutex);
 	dao->ops->get_spos(dao, &status);
 	if (((status >> 24) & IEC958_AES3_CON_FS) != iec958_con_fs) {
-		status &= ((~IEC958_AES3_CON_FS) << 24);
+		status &= ~(IEC958_AES3_CON_FS << 24);
 		status |= (iec958_con_fs << 24);
 		dao->ops->set_spos(dao, status);
 		dao->ops->commit_write(dao);
@@ -1669,7 +1658,7 @@
 	}
 
 	/* Set up device virtual memory management object */
-	err = ct_vm_create(&atc->vm);
+	err = ct_vm_create(&atc->vm, pci);
 	if (err < 0)
 		goto error1;
 
--- linux-mvl-dove-2.6.32.orig/sound/pci/ctxfi/ctdaio.c
+++ linux-mvl-dove-2.6.32/sound/pci/ctxfi/ctdaio.c
@@ -176,6 +176,7 @@
 	if (!entry)
 		return -ENOMEM;
 
+	dao->ops->clear_left_input(dao);
 	/* Program master and conjugate resources */
 	input->ops->master(input);
 	daio->rscl.ops->master(&daio->rscl);
@@ -204,6 +205,7 @@
 	if (!entry)
 		return -ENOMEM;
 
+	dao->ops->clear_right_input(dao);
 	/* Program master and conjugate resources */
 	input->ops->master(input);
 	daio->rscr.ops->master(&daio->rscr);
--- linux-mvl-dove-2.6.32.orig/sound/pci/ctxfi/ctvmem.c
+++ linux-mvl-dove-2.6.32/sound/pci/ctxfi/ctvmem.c
@@ -138,7 +138,7 @@
 		return NULL;
 	}
 
-	ptp = vm->ptp[0];
+	ptp = (unsigned long *)vm->ptp[0].area;
 	pte_start = (block->addr >> CT_PAGE_SHIFT);
 	pages = block->size >> CT_PAGE_SHIFT;
 	for (i = 0; i < pages; i++) {
@@ -158,25 +158,25 @@
 }
 
 /* *
- * return the host (kmalloced) addr of the @index-th device
- * page talbe page on success, or NULL on failure.
- * The first returned NULL indicates the termination.
+ * return the host physical addr of the @index-th device
+ * page table page on success, or ~0UL on failure.
+ * The first returned ~0UL indicates the termination.
  * */
-static void *
-ct_get_ptp_virt(struct ct_vm *vm, int index)
+static dma_addr_t
+ct_get_ptp_phys(struct ct_vm *vm, int index)
 {
-	void *addr;
+	dma_addr_t addr;
 
-	addr = (index >= CT_PTP_NUM) ? NULL : vm->ptp[index];
+	addr = (index >= CT_PTP_NUM) ? ~0UL : vm->ptp[index].addr;
 
 	return addr;
 }
 
-int ct_vm_create(struct ct_vm **rvm)
+int ct_vm_create(struct ct_vm **rvm, struct pci_dev *pci)
 {
 	struct ct_vm *vm;
 	struct ct_vm_block *block;
-	int i;
+	int i, err = 0;
 
 	*rvm = NULL;
 
@@ -188,23 +188,21 @@
 
 	/* Allocate page table pages */
 	for (i = 0; i < CT_PTP_NUM; i++) {
-		vm->ptp[i] = kmalloc(PAGE_SIZE, GFP_KERNEL);
-		if (!vm->ptp[i])
+		err = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV,
+					  snd_dma_pci_data(pci),
+					  PAGE_SIZE, &vm->ptp[i]);
+		if (err < 0)
 			break;
 	}
-	if (!i) {
+	if (err < 0) {
 		/* no page table pages are allocated */
-		kfree(vm);
+		ct_vm_destroy(vm);
 		return -ENOMEM;
 	}
 	vm->size = CT_ADDRS_PER_PAGE * i;
-	/* Initialise remaining ptps */
-	for (; i < CT_PTP_NUM; i++)
-		vm->ptp[i] = NULL;
-
 	vm->map = ct_vm_map;
 	vm->unmap = ct_vm_unmap;
-	vm->get_ptp_virt = ct_get_ptp_virt;
+	vm->get_ptp_phys = ct_get_ptp_phys;
 	INIT_LIST_HEAD(&vm->unused);
 	INIT_LIST_HEAD(&vm->used);
 	block = kzalloc(sizeof(*block), GFP_KERNEL);
@@ -242,7 +240,7 @@
 
 	/* free allocated page table pages */
 	for (i = 0; i < CT_PTP_NUM; i++)
-		kfree(vm->ptp[i]);
+		snd_dma_free_pages(&vm->ptp[i]);
 
 	vm->size = 0;
 
--- linux-mvl-dove-2.6.32.orig/sound/pci/ctxfi/ctmixer.c
+++ linux-mvl-dove-2.6.32/sound/pci/ctxfi/ctmixer.c
@@ -566,19 +566,6 @@
 	return 0;
 }
 
-static int ct_spdif_default_get(struct snd_kcontrol *kcontrol,
-				struct snd_ctl_elem_value *ucontrol)
-{
-	unsigned int status = SNDRV_PCM_DEFAULT_CON_SPDIF;
-
-	ucontrol->value.iec958.status[0] = (status >> 0) & 0xff;
-	ucontrol->value.iec958.status[1] = (status >> 8) & 0xff;
-	ucontrol->value.iec958.status[2] = (status >> 16) & 0xff;
-	ucontrol->value.iec958.status[3] = (status >> 24) & 0xff;
-
-	return 0;
-}
-
 static int ct_spdif_get(struct snd_kcontrol *kcontrol,
 			struct snd_ctl_elem_value *ucontrol)
 {
@@ -586,6 +573,10 @@
 	unsigned int status;
 
 	atc->spdif_out_get_status(atc, &status);
+
+	if (status == 0)
+		status = SNDRV_PCM_DEFAULT_CON_SPDIF;
+
 	ucontrol->value.iec958.status[0] = (status >> 0) & 0xff;
 	ucontrol->value.iec958.status[1] = (status >> 8) & 0xff;
 	ucontrol->value.iec958.status[2] = (status >> 16) & 0xff;
@@ -629,7 +620,7 @@
 	.name		= SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
 	.count		= 1,
 	.info		= ct_spdif_info,
-	.get		= ct_spdif_default_get,
+	.get		= ct_spdif_get,
 	.put		= ct_spdif_put,
 	.private_value	= MIXER_IEC958_DEFAULT
 };
--- linux-mvl-dove-2.6.32.orig/sound/pci/ctxfi/ctvmem.h
+++ linux-mvl-dove-2.6.32/sound/pci/ctxfi/ctvmem.h
@@ -22,6 +22,8 @@
 
 #include <linux/mutex.h>
 #include <linux/list.h>
+#include <linux/pci.h>
+#include <sound/memalloc.h>
 
 /* The chip can handle the page table of 4k pages
  * (emu20k1 can handle even 8k pages, but we don't use it right now)
@@ -41,7 +43,7 @@
 
 /* Virtual memory management object for card device */
 struct ct_vm {
-	void *ptp[CT_PTP_NUM];		/* Device page table pages */
+	struct snd_dma_buffer ptp[CT_PTP_NUM];	/* Device page table pages */
 	unsigned int size;		/* Available addr space in bytes */
 	struct list_head unused;	/* List of unused blocks */
 	struct list_head used;		/* List of used blocks */
@@ -52,10 +54,10 @@
 				   int size);
 	/* Unmap device logical addr area. */
 	void (*unmap)(struct ct_vm *, struct ct_vm_block *block);
-	void *(*get_ptp_virt)(struct ct_vm *vm, int index);
+	dma_addr_t (*get_ptp_phys)(struct ct_vm *vm, int index);
 };
 
-int ct_vm_create(struct ct_vm **rvm);
+int ct_vm_create(struct ct_vm **rvm, struct pci_dev *pci);
 void ct_vm_destroy(struct ct_vm *vm);
 
 #endif /* CTVMEM_H */
--- linux-mvl-dove-2.6.32.orig/sound/pci/hda/hda_local.h
+++ linux-mvl-dove-2.6.32/sound/pci/hda/hda_local.h
@@ -437,6 +437,15 @@
 static inline int snd_hda_create_hwdep(struct hda_codec *codec) { return 0; }
 #endif
 
+#ifdef CONFIG_SND_HDA_POWER_SAVE
+int snd_hda_hwdep_add_power_sysfs(struct hda_codec *codec);
+#else
+static inline int snd_hda_hwdep_add_power_sysfs(struct hda_codec *codec)
+{
+	return 0;
+}
+#endif
+
 #ifdef CONFIG_SND_HDA_RECONFIG
 int snd_hda_hwdep_add_sysfs(struct hda_codec *codec);
 #else
--- linux-mvl-dove-2.6.32.orig/sound/pci/hda/hda_codec.c
+++ linux-mvl-dove-2.6.32/sound/pci/hda/hda_codec.c
@@ -515,6 +515,7 @@
 	struct hda_codec *codec;
 	list_for_each_entry(codec, &bus->codec_list, list) {
 		snd_hda_hwdep_add_sysfs(codec);
+		snd_hda_hwdep_add_power_sysfs(codec);
 	}
 	return 0;
 }
@@ -2452,9 +2453,11 @@
 			    codec->afg ? codec->afg : codec->mfg,
 			    AC_PWRST_D3);
 #ifdef CONFIG_SND_HDA_POWER_SAVE
+	snd_hda_update_power_acct(codec);
 	cancel_delayed_work(&codec->power_work);
 	codec->power_on = 0;
 	codec->power_transition = 0;
+	codec->power_jiffies = jiffies;
 #endif
 }
 
@@ -3207,6 +3210,17 @@
 {
 	codec->power_count++;
 	codec->power_on = 1;
+	codec->power_jiffies = jiffies;
+}
+
+void snd_hda_update_power_acct(struct hda_codec *codec)
+{
+	unsigned long delta = jiffies - codec->power_jiffies;
+	if (codec->power_on)
+		codec->power_on_acct += delta;
+	else
+		codec->power_off_acct += delta;
+	codec->power_jiffies += delta;
 }
 
 void snd_hda_power_up(struct hda_codec *codec)
@@ -3217,7 +3231,9 @@
 	if (codec->power_on || codec->power_transition)
 		return;
 
+	snd_hda_update_power_acct(codec);
 	codec->power_on = 1;
+	codec->power_jiffies = jiffies;
 	if (bus->ops.pm_notify)
 		bus->ops.pm_notify(bus);
 	hda_call_codec_resume(codec);
--- linux-mvl-dove-2.6.32.orig/sound/pci/hda/patch_conexant.c
+++ linux-mvl-dove-2.6.32/sound/pci/hda/patch_conexant.c
@@ -366,10 +366,16 @@
 	struct conexant_spec *spec;
 	struct conexant_jack *jack;
 	const char *name;
-	int err;
+	int i, err;
 
 	spec = codec->spec;
 	snd_array_init(&spec->jacks, sizeof(*jack), 32);
+
+	jack = spec->jacks.list;
+	for (i = 0; i < spec->jacks.used; i++, jack++)
+		if (jack->nid == nid)
+			return 0 ; /* already present */
+
 	jack = snd_array_new(&spec->jacks);
 	name = (type == SND_JACK_HEADPHONE) ? "Headphone" : "Mic" ;
 
@@ -1175,9 +1181,12 @@
 
 	switch (codec->subsystem_id >> 16) {
 	case 0x103c:
-		/* HP laptop has a really bad sound over 0dB on NID 0x17.
-		 * Fix max PCM level to 0 dB
-		 * (originall it has 0x2b steps with 0dB offset 0x14)
+	case 0x1631:
+	case 0x1734:
+	case 0x17aa:
+		/* HP, Packard Bell, Fujitsu-Siemens & Lenovo laptops have
+		 * really bad sound over 0dB on NID 0x17. Fix max PCM level to
+		 * 0 dB (originally it has 0x2b steps with 0dB offset 0x14)
 		 */
 		snd_hda_override_amp_caps(codec, 0x17, HDA_INPUT,
 					  (0x14 << AC_AMPCAP_OFFSET_SHIFT) |
@@ -1581,6 +1590,21 @@
 #endif	
 	}
 	spec->vmaster_nid = 0x13;
+
+	switch (codec->subsystem_id >> 16) {
+	case 0x103c:
+		/* HP laptops have really bad sound over 0 dB on NID 0x10.
+		 * Fix max PCM level to 0 dB (originally it has 0x1e steps
+		 * with 0 dB offset 0x17)
+		 */
+		snd_hda_override_amp_caps(codec, 0x10, HDA_INPUT,
+					  (0x17 << AC_AMPCAP_OFFSET_SHIFT) |
+					  (0x17 << AC_AMPCAP_NUM_STEPS_SHIFT) |
+					  (0x05 << AC_AMPCAP_STEP_SIZE_SHIFT) |
+					  (1 << AC_AMPCAP_MUTE_SHIFT));
+		break;
+	}
+
 	return 0;
 }
 
@@ -2333,6 +2357,8 @@
 	SND_PCI_QUIRK(0x1028, 0x02f5, "Dell",
 		      CXT5066_DELL_LAPTOP),
 	SND_PCI_QUIRK(0x152d, 0x0833, "OLPC XO-1.5", CXT5066_OLPC_XO_1_5),
+	SND_PCI_QUIRK(0x1179, 0xff50, "Toshiba Satellite P500-PSPGSC-01800T", CXT5066_OLPC_XO_1_5),
+	SND_PCI_QUIRK(0x1179, 0xffe0, "Toshiba Satellite Pro T130-15F", CXT5066_OLPC_XO_1_5),
 	{}
 };
 
--- linux-mvl-dove-2.6.32.orig/sound/pci/hda/hda_codec.h
+++ linux-mvl-dove-2.6.32/sound/pci/hda/hda_codec.h
@@ -811,6 +811,9 @@
 	unsigned int power_transition :1; /* power-state in transition */
 	int power_count;	/* current (global) power refcount */
 	struct delayed_work power_work; /* delayed task for powerdown */
+	unsigned long power_on_acct;
+	unsigned long power_off_acct;
+	unsigned long power_jiffies;
 #endif
 
 	/* codec-specific additional proc output */
@@ -933,6 +936,7 @@
 void snd_hda_power_up(struct hda_codec *codec);
 void snd_hda_power_down(struct hda_codec *codec);
 #define snd_hda_codec_needs_resume(codec) codec->power_count
+void snd_hda_update_power_acct(struct hda_codec *codec);
 #else
 static inline void snd_hda_power_up(struct hda_codec *codec) {}
 static inline void snd_hda_power_down(struct hda_codec *codec) {}
--- linux-mvl-dove-2.6.32.orig/sound/pci/hda/hda_hwdep.c
+++ linux-mvl-dove-2.6.32/sound/pci/hda/hda_hwdep.c
@@ -154,6 +154,44 @@
 	return 0;
 }
 
+#ifdef CONFIG_SND_HDA_POWER_SAVE
+static ssize_t power_on_acct_show(struct device *dev,
+				  struct device_attribute *attr,
+				  char *buf)
+{
+	struct snd_hwdep *hwdep = dev_get_drvdata(dev);
+	struct hda_codec *codec = hwdep->private_data;
+	snd_hda_update_power_acct(codec);
+	return sprintf(buf, "%u\n", jiffies_to_msecs(codec->power_on_acct));
+}
+
+static ssize_t power_off_acct_show(struct device *dev,
+				   struct device_attribute *attr,
+				   char *buf)
+{
+	struct snd_hwdep *hwdep = dev_get_drvdata(dev);
+	struct hda_codec *codec = hwdep->private_data;
+	snd_hda_update_power_acct(codec);
+	return sprintf(buf, "%u\n", jiffies_to_msecs(codec->power_off_acct));
+}
+
+static struct device_attribute power_attrs[] = {
+	__ATTR_RO(power_on_acct),
+	__ATTR_RO(power_off_acct),
+};
+
+int snd_hda_hwdep_add_power_sysfs(struct hda_codec *codec)
+{
+	struct snd_hwdep *hwdep = codec->hwdep;
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(power_attrs); i++)
+		snd_add_device_sysfs_file(SNDRV_DEVICE_TYPE_HWDEP, hwdep->card,
+					  hwdep->device, &power_attrs[i]);
+	return 0;
+}
+#endif /* CONFIG_SND_HDA_POWER_SAVE */
+
 #ifdef CONFIG_SND_HDA_RECONFIG
 
 /*
--- linux-mvl-dove-2.6.32.orig/sound/pci/hda/patch_intelhdmi.c
+++ linux-mvl-dove-2.6.32/sound/pci/hda/patch_intelhdmi.c
@@ -684,7 +684,7 @@
 	{ .id = 0x80862801, .name = "G45 DEVBLC", .patch = patch_intel_hdmi },
 	{ .id = 0x80862802, .name = "G45 DEVCTG", .patch = patch_intel_hdmi },
 	{ .id = 0x80862803, .name = "G45 DEVELK", .patch = patch_intel_hdmi },
-	{ .id = 0x80862804, .name = "G45 DEVIBX", .patch = patch_intel_hdmi },
+	{ .id = 0x80862804, .name = "G45 DEVIBX", .patch = patch_intel_hdmi_ibexpeak },
 	{ .id = 0x80860054, .name = "Q57 DEVIBX", .patch = patch_intel_hdmi_ibexpeak },
 	{ .id = 0x10951392, .name = "SiI1392 HDMI",     .patch = patch_intel_hdmi },
 	{} /* terminator */
--- linux-mvl-dove-2.6.32.orig/sound/pci/hda/hda_eld.c
+++ linux-mvl-dove-2.6.32/sound/pci/hda/hda_eld.c
@@ -383,7 +383,7 @@
 	snd_print_pcm_rates(a->rates, buf, sizeof(buf));
 
 	if (a->format == AUDIO_CODING_TYPE_LPCM)
-		snd_print_pcm_bits(a->sample_bits, buf2 + 8, sizeof(buf2 - 8));
+		snd_print_pcm_bits(a->sample_bits, buf2 + 8, sizeof(buf2) - 8);
 	else if (a->max_bitrate)
 		snprintf(buf2, sizeof(buf2),
 				", max bitrate = %d", a->max_bitrate);
--- linux-mvl-dove-2.6.32.orig/sound/pci/hda/patch_realtek.c
+++ linux-mvl-dove-2.6.32/sound/pci/hda/patch_realtek.c
@@ -400,6 +400,8 @@
 	unsigned int mux_idx = snd_ctl_get_ioffidx(kcontrol, &uinfo->id);
 	if (mux_idx >= spec->num_mux_defs)
 		mux_idx = 0;
+	if (!spec->input_mux[mux_idx].num_items && mux_idx > 0)
+		mux_idx = 0;
 	return snd_hda_input_mux_info(&spec->input_mux[mux_idx], uinfo);
 }
 
@@ -428,6 +430,8 @@
 
 	mux_idx = adc_idx >= spec->num_mux_defs ? 0 : adc_idx;
 	imux = &spec->input_mux[mux_idx];
+	if (!imux->num_items && mux_idx > 0)
+		imux = &spec->input_mux[0];
 
 	type = get_wcaps_type(get_wcaps(codec, nid));
 	if (type == AC_WID_AUD_MIX) {
@@ -1149,7 +1153,7 @@
 		case 0x10ec0883:
 		case 0x10ec0885:
 		case 0x10ec0887:
-		case 0x10ec0889:
+		/*case 0x10ec0889:*/ /* this causes an SPDIF problem */
 			alc889_coef_init(codec);
 			break;
 		case 0x10ec0888:
@@ -2401,6 +2405,8 @@
 	"Speaker Playback Switch",
 	"Mono Playback Switch",
 	"IEC958 Playback Switch",
+	"Line-Out Playback Switch",
+	"PCM Playback Switch",
 	NULL,
 };
 
@@ -3965,10 +3971,11 @@
 	SND_PCI_QUIRK(0x1695, 0x4012, "EPox EP-5LDA", ALC880_5ST_DIG),
 	SND_PCI_QUIRK(0x1734, 0x107c, "FSC F1734", ALC880_F1734),
 	SND_PCI_QUIRK(0x1734, 0x1094, "FSC Amilo M1451G", ALC880_FUJITSU),
-	SND_PCI_QUIRK(0x1734, 0x10ac, "FSC", ALC880_UNIWILL),
+	SND_PCI_QUIRK(0x1734, 0x10ac, "FSC AMILO Xi 1526", ALC880_F1734),
 	SND_PCI_QUIRK(0x1734, 0x10b0, "Fujitsu", ALC880_FUJITSU),
 	SND_PCI_QUIRK(0x1854, 0x0018, "LG LW20", ALC880_LG_LW),
 	SND_PCI_QUIRK(0x1854, 0x003b, "LG", ALC880_LG),
+	SND_PCI_QUIRK(0x1854, 0x005f, "LG P1 Express", ALC880_LG),
 	SND_PCI_QUIRK(0x1854, 0x0068, "LG w1", ALC880_LG),
 	SND_PCI_QUIRK(0x1854, 0x0077, "LG LW25", ALC880_LG_LW),
 	SND_PCI_QUIRK(0x19db, 0x4188, "TCL S700", ALC880_TCL_S700),
@@ -6246,6 +6253,7 @@
 
 static struct snd_pci_quirk alc260_cfg_tbl[] = {
 	SND_PCI_QUIRK(0x1025, 0x007b, "Acer C20x", ALC260_ACER),
+	SND_PCI_QUIRK(0x1025, 0x007f, "Acer", ALC260_WILL),
 	SND_PCI_QUIRK(0x1025, 0x008f, "Acer", ALC260_ACER),
 	SND_PCI_QUIRK(0x1509, 0x4540, "Favorit 100XS", ALC260_FAVORIT100),
 	SND_PCI_QUIRK(0x103c, 0x2808, "HP d5700", ALC260_HP_3013),
@@ -6275,7 +6283,7 @@
 		.num_dacs = ARRAY_SIZE(alc260_dac_nids),
 		.dac_nids = alc260_dac_nids,
 		.num_adc_nids = ARRAY_SIZE(alc260_dual_adc_nids),
-		.adc_nids = alc260_adc_nids,
+		.adc_nids = alc260_dual_adc_nids,
 		.num_channel_mode = ARRAY_SIZE(alc260_modes),
 		.channel_mode = alc260_modes,
 		.input_mux = &alc260_capture_source,
@@ -6448,6 +6456,7 @@
 
 	spec->stream_analog_playback = &alc260_pcm_analog_playback;
 	spec->stream_analog_capture = &alc260_pcm_analog_capture;
+	spec->stream_analog_alt_capture = &alc260_pcm_analog_capture;
 
 	spec->stream_digital_playback = &alc260_pcm_digital_playback;
 	spec->stream_digital_capture = &alc260_pcm_digital_capture;
@@ -6581,7 +6590,7 @@
 	.num_items = 4,
 	.items = {
 		{ "Mic", 0x0 },
-		{ "iMic", 0x1 },
+		{ "Int Mic", 0x1 },
 		{ "Line", 0x2 },
 		{ "CD", 0x4 },
 	},
@@ -7040,8 +7049,8 @@
 	HDA_BIND_MUTE   ("Surround Playback Switch", 0x0d, 0x02, HDA_INPUT),
 	HDA_CODEC_VOLUME("LFE Playback Volume", 0x0e, 0x00, HDA_OUTPUT),
 	HDA_BIND_MUTE   ("LFE Playback Switch", 0x0e, 0x02, HDA_INPUT),
-	HDA_CODEC_VOLUME("HP Playback Volume", 0x0f, 0x00, HDA_OUTPUT),
-	HDA_BIND_MUTE   ("HP Playback Switch", 0x0f, 0x02, HDA_INPUT),
+	HDA_CODEC_VOLUME("Headphone Playback Volume", 0x0f, 0x00, HDA_OUTPUT),
+	HDA_BIND_MUTE   ("Headphone Playback Switch", 0x0f, 0x02, HDA_INPUT),
 	HDA_CODEC_VOLUME("Line Playback Volume", 0x0b, 0x02, HDA_INPUT),
 	HDA_CODEC_MUTE  ("Line Playback Switch", 0x0b, 0x02, HDA_INPUT),
 	HDA_CODEC_VOLUME("Mic Playback Volume", 0x0b, 0x01, HDA_INPUT),
@@ -7428,6 +7437,7 @@
 	{0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
 	{0x14, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE},
 	{0x14, AC_VERB_SET_CONNECT_SEL, 0x03},
+	{0x14, AC_VERB_SET_UNSOLICITED_ENABLE, ALC880_HP_EVENT | AC_USRSP_EN},
 	/* Front Mic pin: input vref at 80% */
 	{0x19, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80},
 	{0x19, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
@@ -7552,6 +7562,27 @@
 	spec->autocfg.speaker_pins[0] = 0x14;
 }
 
+static void alc885_mb5_automute(struct hda_codec *codec)
+{
+	unsigned int present;
+
+	present = snd_hda_codec_read(codec, 0x14, 0,
+				     AC_VERB_GET_PIN_SENSE, 0) & 0x80000000;
+	snd_hda_codec_amp_stereo(codec, 0x18, HDA_OUTPUT, 0,
+				 HDA_AMP_MUTE, present ? HDA_AMP_MUTE : 0);
+	snd_hda_codec_amp_stereo(codec, 0x1a, HDA_OUTPUT, 0,
+				 HDA_AMP_MUTE, present ? HDA_AMP_MUTE : 0);
+
+}
+
+static void alc885_mb5_unsol_event(struct hda_codec *codec,
+				    unsigned int res)
+{
+	/* Headphone insertion or removal. */
+	if ((res >> 26) == ALC880_HP_EVENT)
+		alc885_mb5_automute(codec);
+}
+
 
 static struct hda_verb alc882_targa_verbs[] = {
 	{0x0c, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
@@ -8008,8 +8039,8 @@
 	HDA_CODEC_MUTE("CD Playback Switch", 0x0b, 0x04, HDA_INPUT),
 	HDA_CODEC_VOLUME("Mic Playback Volume", 0x0b, 0x0, HDA_INPUT),
 	HDA_CODEC_MUTE("Mic Playback Switch", 0x0b, 0x0, HDA_INPUT),
-	HDA_CODEC_VOLUME("iMic Playback Volume", 0x0b, 0x1, HDA_INPUT),
-	HDA_CODEC_MUTE("iMic Playback Switch", 0x0b, 0x1, HDA_INPUT),
+	HDA_CODEC_VOLUME("Int Mic Playback Volume", 0x0b, 0x1, HDA_INPUT),
+	HDA_CODEC_MUTE("Int Mic Playback Switch", 0x0b, 0x1, HDA_INPUT),
 	{ } /* end */
 };
 
@@ -8839,7 +8870,7 @@
 	SND_PCI_QUIRK(0x1462, 0x040d, "MSI", ALC883_TARGA_2ch_DIG),
 	SND_PCI_QUIRK(0x1462, 0x0579, "MSI", ALC883_TARGA_2ch_DIG),
 	SND_PCI_QUIRK(0x1462, 0x28fb, "Targa T8", ALC882_TARGA), /* MSI-1049 T8  */
-	SND_PCI_QUIRK(0x1462, 0x2fb3, "MSI", ALC883_TARGA_2ch_DIG),
+	SND_PCI_QUIRK(0x1462, 0x2fb3, "MSI", ALC882_AUTO),
 	SND_PCI_QUIRK(0x1462, 0x6668, "MSI", ALC882_6ST_DIG),
 	SND_PCI_QUIRK(0x1462, 0x3729, "MSI S420", ALC883_TARGA_DIG),
 	SND_PCI_QUIRK(0x1462, 0x3783, "NEC S970", ALC883_TARGA_DIG),
@@ -8866,6 +8897,7 @@
 	SND_PCI_QUIRK(0x1462, 0xaa08, "MSI", ALC883_TARGA_2ch_DIG),
 
 	SND_PCI_QUIRK(0x147b, 0x1083, "Abit IP35-PRO", ALC883_6ST_DIG),
+	SND_PCI_QUIRK(0x1558, 0x0571, "Clevo laptop M570U", ALC883_3ST_6ch_DIG),
 	SND_PCI_QUIRK(0x1558, 0x0721, "Clevo laptop M720R", ALC883_CLEVO_M720),
 	SND_PCI_QUIRK(0x1558, 0x0722, "Clevo laptop M720SR", ALC883_CLEVO_M720),
 	SND_PCI_QUIRK(0x1558, 0x5409, "Clevo laptop M540R", ALC883_CLEVO_M540R),
@@ -8893,7 +8925,7 @@
 	SND_PCI_QUIRK(0x8086, 0x0022, "DX58SO", ALC889_INTEL),
 	SND_PCI_QUIRK(0x8086, 0x0021, "Intel IbexPeak", ALC889A_INTEL),
 	SND_PCI_QUIRK(0x8086, 0x3b56, "Intel IbexPeak", ALC889A_INTEL),
-	SND_PCI_QUIRK(0x8086, 0xd601, "D102GGC", ALC883_3ST_6ch),
+	SND_PCI_QUIRK(0x8086, 0xd601, "D102GGC", ALC882_6ST_DIG),
 
 	{}
 };
@@ -8907,10 +8939,12 @@
 	SND_PCI_QUIRK(0x106b, 0x1000, "iMac 24", ALC885_IMAC24),
 	SND_PCI_QUIRK(0x106b, 0x2800, "AppleTV", ALC885_IMAC24),
 	SND_PCI_QUIRK(0x106b, 0x2c00, "MacbookPro rev3", ALC885_MBP3),
+	SND_PCI_QUIRK(0x106b, 0x3000, "iMac", ALC889A_MB31),
 	SND_PCI_QUIRK(0x106b, 0x3600, "Macbook 3,1", ALC889A_MB31),
 	SND_PCI_QUIRK(0x106b, 0x3800, "MacbookPro 4,1", ALC885_MBP3),
 	SND_PCI_QUIRK(0x106b, 0x3e00, "iMac 24 Aluminum", ALC885_IMAC24),
 	SND_PCI_QUIRK(0x106b, 0x3f00, "Macbook 5,1", ALC885_MB5),
+	SND_PCI_QUIRK(0x106b, 0x4a00, "Macbook 5,2", ALC885_MB5),
 	/* FIXME: HP jack sense seems not working for MBP 5,1 or 5,2,
 	 * so apparently no perfect solution yet
 	 */
@@ -8994,6 +9028,8 @@
 		.input_mux = &mb5_capture_source,
 		.dig_out_nid = ALC882_DIGOUT_NID,
 		.dig_in_nid = ALC882_DIGIN_NID,
+		.unsol_event = alc885_mb5_unsol_event,
+		.init_hook = alc885_mb5_automute,
 	},
 	[ALC885_MACPRO] = {
 		.mixers = { alc882_macpro_mixer },
@@ -9141,6 +9177,8 @@
 		.dac_nids = alc883_dac_nids,
 		.num_adc_nids = ARRAY_SIZE(alc889_adc_nids),
 		.adc_nids = alc889_adc_nids,
+		.capsrc_nids = alc889_capsrc_nids,
+		.capsrc_nids = alc889_capsrc_nids,
 		.dig_out_nid = ALC883_DIGOUT_NID,
 		.dig_in_nid = ALC883_DIGIN_NID,
 		.slave_dig_outs = alc883_slave_dig_outs,
@@ -9187,6 +9225,7 @@
 		.dac_nids = alc883_dac_nids,
 		.adc_nids = alc883_adc_nids_alt,
 		.num_adc_nids = ARRAY_SIZE(alc883_adc_nids_alt),
+		.capsrc_nids = alc883_capsrc_nids,
 		.dig_out_nid = ALC883_DIGOUT_NID,
 		.num_channel_mode = ARRAY_SIZE(alc883_3ST_2ch_modes),
 		.channel_mode = alc883_3ST_2ch_modes,
@@ -9333,6 +9372,7 @@
 		.dac_nids = alc883_dac_nids,
 		.adc_nids = alc883_adc_nids_alt,
 		.num_adc_nids = ARRAY_SIZE(alc883_adc_nids_alt),
+		.capsrc_nids = alc883_capsrc_nids,
 		.num_channel_mode = ARRAY_SIZE(alc883_sixstack_modes),
 		.channel_mode = alc883_sixstack_modes,
 		.input_mux = &alc883_capture_source,
@@ -9394,6 +9434,7 @@
 		.dac_nids = alc883_dac_nids,
 		.adc_nids = alc883_adc_nids_alt,
 		.num_adc_nids = ARRAY_SIZE(alc883_adc_nids_alt),
+		.capsrc_nids = alc883_capsrc_nids,
 		.num_channel_mode = ARRAY_SIZE(alc883_3ST_2ch_modes),
 		.channel_mode = alc883_3ST_2ch_modes,
 		.input_mux = &alc883_lenovo_101e_capture_source,
@@ -9573,6 +9614,7 @@
 			alc880_gpio1_init_verbs },
 		.adc_nids = alc883_adc_nids,
 		.num_adc_nids = ARRAY_SIZE(alc883_adc_nids),
+		.capsrc_nids = alc883_capsrc_nids,
 		.dac_nids = alc883_dac_nids,
 		.num_dacs = ARRAY_SIZE(alc883_dac_nids),
 		.channel_mode = alc889A_mb31_6ch_modes,
@@ -9711,6 +9753,8 @@
 			continue;
 		mux_idx = c >= spec->num_mux_defs ? 0 : c;
 		imux = &spec->input_mux[mux_idx];
+		if (!imux->num_items && mux_idx > 0)
+			imux = &spec->input_mux[0];
 		for (idx = 0; idx < conns; idx++) {
 			/* if the current connection is the selected one,
 			 * unmute it as default - otherwise mute it
@@ -10146,7 +10190,7 @@
 	struct alc_spec *spec = codec->spec;
 
 	spec->autocfg.hp_pins[0] = 0x15;
-	spec->autocfg.speaker_pins[0] = 0x0c; /* HACK: not actually a pin */
+	spec->autocfg.speaker_pins[0] = 0x14;
 }
 
 static struct snd_kcontrol_new alc262_hp_t5735_mixer[] = {
@@ -10581,6 +10625,13 @@
 	{}
 };
 
+static struct hda_verb alc262_lenovo_3000_init_verbs[] = {
+	/* Front Mic pin: input vref at 50% */
+	{0x19, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF50},
+	{0x19, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
+	{}
+};
+
 static struct hda_input_mux alc262_fujitsu_capture_source = {
 	.num_items = 3,
 	.items = {
@@ -11580,9 +11631,9 @@
 		.num_channel_mode = ARRAY_SIZE(alc262_modes),
 		.channel_mode = alc262_modes,
 		.input_mux = &alc262_capture_source,
-		.unsol_event = alc_automute_amp_unsol_event,
+		.unsol_event = alc_sku_unsol_event,
 		.setup = alc262_hp_t5735_setup,
-		.init_hook = alc_automute_amp,
+		.init_hook = alc_inithook,
 	},
 	[ALC262_HP_RP5700] = {
 		.mixers = { alc262_hp_rp5700_mixer },
@@ -11648,7 +11699,8 @@
 	[ALC262_LENOVO_3000] = {
 		.mixers = { alc262_lenovo_3000_mixer },
 		.init_verbs = { alc262_init_verbs, alc262_EAPD_verbs,
-				alc262_lenovo_3000_unsol_verbs },
+				alc262_lenovo_3000_unsol_verbs,
+				alc262_lenovo_3000_init_verbs },
 		.num_dacs = ARRAY_SIZE(alc262_dac_nids),
 		.dac_nids = alc262_dac_nids,
 		.hp_nid = 0x03,
@@ -12338,6 +12390,9 @@
 		dac = 0x02;
 		break;
 	case 0x15:
+	case 0x1a: /* ALC259/269 only */
+	case 0x1b: /* ALC259/269 only */
+	case 0x21: /* ALC269vb has this pin, too */
 		dac = 0x03;
 		break;
 	default:
@@ -12607,6 +12662,7 @@
 	SND_PCI_QUIRK(0x1025, 0x015b, "Acer Aspire One",
 						ALC268_ACER_ASPIRE_ONE),
 	SND_PCI_QUIRK(0x1028, 0x0253, "Dell OEM", ALC268_DELL),
+	SND_PCI_QUIRK(0x1028, 0x02b0, "Dell Inspiron 910", ALC268_AUTO),
 	SND_PCI_QUIRK_MASK(0x1028, 0xfff0, 0x02b0,
 			"Dell Inspiron Mini9/Vostro A90", ALC268_DELL),
 	/* almost compatible with toshiba but with optional digital outs;
@@ -14679,6 +14735,8 @@
 	spec->stream_digital_playback = &alc861_pcm_digital_playback;
 	spec->stream_digital_capture = &alc861_pcm_digital_capture;
 
+	if (!spec->cap_mixer)
+		set_capture_mixer(codec);
 	set_beep_amp(spec, 0x23, 0, HDA_OUTPUT);
 
 	spec->vmaster_nid = 0x03;
@@ -15317,7 +15375,7 @@
 static int alc861vd_auto_create_input_ctls(struct hda_codec *codec,
 						const struct auto_pin_cfg *cfg)
 {
-	return alc_auto_create_input_ctls(codec, cfg, 0x15, 0x09, 0);
+	return alc_auto_create_input_ctls(codec, cfg, 0x15, 0x22, 0);
 }
 
 
@@ -17204,6 +17262,8 @@
 		return 0x02;
 	else if (nid >= 0x0c && nid <= 0x0e)
 		return nid - 0x0c + 0x02;
+	else if (nid == 0x26) /* ALC887-VD has this DAC too */
+		return 0x25;
 	else
 		return 0;
 }
@@ -17212,7 +17272,7 @@
 static hda_nid_t alc662_dac_to_mix(struct hda_codec *codec, hda_nid_t pin,
 				   hda_nid_t dac)
 {
-	hda_nid_t mix[4];
+	hda_nid_t mix[5];
 	int i, num;
 
 	num = snd_hda_get_connections(codec, pin, mix, ARRAY_SIZE(mix));
--- linux-mvl-dove-2.6.32.orig/sound/pci/hda/patch_cirrus.c
+++ linux-mvl-dove-2.6.32/sound/pci/hda/patch_cirrus.c
@@ -65,7 +65,9 @@
 
 /* available models */
 enum {
+	CS420X_MBP53,
 	CS420X_MBP55,
+	CS420X_IMAC27,
 	CS420X_AUTO,
 	CS420X_MODELS
 };
@@ -832,7 +834,9 @@
 				    AC_VERB_SET_PIN_WIDGET_CONTROL,
 				    hp_present ? 0 : PIN_OUT);
 	}
-	if (spec->board_config == CS420X_MBP55) {
+	if (spec->board_config == CS420X_MBP53 ||
+	    spec->board_config == CS420X_MBP55 ||
+	    spec->board_config == CS420X_IMAC27) {
 		unsigned int gpio = hp_present ? 0x02 : 0x08;
 		snd_hda_codec_write(codec, 0x01, 0,
 				    AC_VERB_SET_GPIO_DATA, gpio);
@@ -1077,13 +1081,19 @@
 }
 
 static const char *cs420x_models[CS420X_MODELS] = {
+	[CS420X_MBP53] = "mbp53",
 	[CS420X_MBP55] = "mbp55",
+	[CS420X_IMAC27] = "imac27",
 	[CS420X_AUTO] = "auto",
 };
 
 
 static struct snd_pci_quirk cs420x_cfg_tbl[] = {
+	SND_PCI_QUIRK(0x10de, 0x0ac0, "MacBookPro 5,3", CS420X_MBP53),
+	SND_PCI_QUIRK(0x10de, 0x0d94, "MacBookAir 3,1(2)", CS420X_MBP55),
 	SND_PCI_QUIRK(0x10de, 0xcb79, "MacBookPro 5,5", CS420X_MBP55),
+	SND_PCI_QUIRK(0x10de, 0xcb89, "MacBookPro 7,1", CS420X_MBP55),
+	SND_PCI_QUIRK(0x8086, 0x7270, "IMac 27 Inch", CS420X_IMAC27),
 	{} /* terminator */
 };
 
@@ -1092,6 +1102,20 @@
 	u32 val;
 };
 
+static struct cs_pincfg mbp53_pincfgs[] = {
+	{ 0x09, 0x012b4050 },
+	{ 0x0a, 0x90100141 },
+	{ 0x0b, 0x90100140 },
+	{ 0x0c, 0x018b3020 },
+	{ 0x0d, 0x90a00110 },
+	{ 0x0e, 0x400000f0 },
+	{ 0x0f, 0x01cbe030 },
+	{ 0x10, 0x014be060 },
+	{ 0x12, 0x400000f0 },
+	{ 0x15, 0x400000f0 },
+	{} /* terminator */
+};
+
 static struct cs_pincfg mbp55_pincfgs[] = {
 	{ 0x09, 0x012b4030 },
 	{ 0x0a, 0x90100121 },
@@ -1106,8 +1130,24 @@
 	{} /* terminator */
 };
 
+static struct cs_pincfg imac27_pincfgs[] = {
+	{ 0x09, 0x012b4050 },
+	{ 0x0a, 0x90100140 },
+	{ 0x0b, 0x90100142 },
+	{ 0x0c, 0x018b3020 },
+	{ 0x0d, 0x90a00110 },
+	{ 0x0e, 0x400000f0 },
+	{ 0x0f, 0x01cbe030 },
+	{ 0x10, 0x014be060 },
+	{ 0x12, 0x01ab9070 },
+	{ 0x15, 0x400000f0 },
+	{} /* terminator */
+};
+
 static struct cs_pincfg *cs_pincfgs[CS420X_MODELS] = {
+	[CS420X_MBP53] = mbp53_pincfgs,
 	[CS420X_MBP55] = mbp55_pincfgs,
+	[CS420X_IMAC27] = imac27_pincfgs,
 };
 
 static void fix_pincfg(struct hda_codec *codec, int model)
@@ -1137,6 +1177,8 @@
 		fix_pincfg(codec, spec->board_config);
 
 	switch (spec->board_config) {
+	case CS420X_IMAC27:
+	case CS420X_MBP53:
 	case CS420X_MBP55:
 		/* GPIO1 = headphones */
 		/* GPIO3 = speakers */
--- linux-mvl-dove-2.6.32.orig/sound/pci/hda/patch_analog.c
+++ linux-mvl-dove-2.6.32/sound/pci/hda/patch_analog.c
@@ -1003,7 +1003,7 @@
 	SND_PCI_QUIRK(0x1043, 0x81cb, "ASUS M2N", AD1986A_3STACK),
 	SND_PCI_QUIRK(0x1043, 0x8234, "ASUS M2N", AD1986A_3STACK),
 	SND_PCI_QUIRK(0x10de, 0xcb84, "ASUS A8N-VM", AD1986A_3STACK),
-	SND_PCI_QUIRK(0x1179, 0xff40, "Toshiba", AD1986A_LAPTOP_EAPD),
+	SND_PCI_QUIRK(0x1179, 0xff40, "Toshiba Satellite L40-10Q", AD1986A_3STACK),
 	SND_PCI_QUIRK(0x144d, 0xb03c, "Samsung R55", AD1986A_3STACK),
 	SND_PCI_QUIRK(0x144d, 0xc01e, "FSC V2060", AD1986A_LAPTOP),
 	SND_PCI_QUIRK(0x144d, 0xc024, "Samsung P50", AD1986A_SAMSUNG_P50),
@@ -1789,6 +1789,14 @@
 	case AD1981_THINKPAD:
 		spec->mixers[0] = ad1981_thinkpad_mixers;
 		spec->input_mux = &ad1981_thinkpad_capture_source;
+		/* set the upper-limit for mixer amp to 0dB for avoiding the
+		 * possible damage by overloading
+		 */
+		snd_hda_override_amp_caps(codec, 0x11, HDA_INPUT,
+					  (0x17 << AC_AMPCAP_OFFSET_SHIFT) |
+					  (0x17 << AC_AMPCAP_NUM_STEPS_SHIFT) |
+					  (0x05 << AC_AMPCAP_STEP_SIZE_SHIFT) |
+					  (1 << AC_AMPCAP_MUTE_SHIFT));
 		break;
 	case AD1981_TOSHIBA:
 		spec->mixers[0] = ad1981_hp_mixers;
@@ -3502,6 +3510,7 @@
 	/* Lenovo Thinkpad T61/X61 */
 	SND_PCI_QUIRK_VENDOR(0x17aa, "Lenovo Thinkpad", AD1984_THINKPAD),
 	SND_PCI_QUIRK(0x1028, 0x0214, "Dell T3400", AD1984_DELL_DESKTOP),
+	SND_PCI_QUIRK(0x1028, 0x0233, "Dell Latitude E6400", AD1984_DELL_DESKTOP),
 	{}
 };
 
--- linux-mvl-dove-2.6.32.orig/sound/pci/hda/patch_sigmatel.c
+++ linux-mvl-dove-2.6.32/sound/pci/hda/patch_sigmatel.c
@@ -727,7 +727,7 @@
 	struct sigmatel_spec *spec = codec->spec;
 	unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
 	const struct hda_input_mux *imux = spec->input_mux;
-	unsigned int idx, prev_idx;
+	unsigned int idx, prev_idx, didx;
 
 	idx = ucontrol->value.enumerated.item[0];
 	if (idx >= imux->num_items)
@@ -739,7 +739,8 @@
 		snd_hda_codec_write_cache(codec, spec->mux_nids[adc_idx], 0,
 					  AC_VERB_SET_CONNECT_SEL,
 					  imux->items[idx].index);
-		if (prev_idx >= spec->num_analog_muxes) {
+		if (prev_idx >= spec->num_analog_muxes &&
+		    spec->mux_nids[adc_idx] != spec->dmux_nids[adc_idx]) {
 			imux = spec->dinput_mux;
 			/* 0 = analog */
 			snd_hda_codec_write_cache(codec,
@@ -749,9 +750,13 @@
 		}
 	} else {
 		imux = spec->dinput_mux;
+		/* first dimux item is hardcoded to select analog imux,
+		 * so lets skip it
+		 */
+		didx = idx - spec->num_analog_muxes + 1;
 		snd_hda_codec_write_cache(codec, spec->dmux_nids[adc_idx], 0,
 					  AC_VERB_SET_CONNECT_SEL,
-					  imux->items[idx - 1].index);
+					  imux->items[didx].index);
 	}
 	spec->cur_mux[adc_idx] = idx;
 	return 1;
@@ -1592,12 +1597,18 @@
 				"Dell Studio 1555", STAC_DELL_M6_DMIC),
 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
 				"Dell Studio 1557", STAC_DELL_M6_DMIC),
+	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
+				"Dell Studio XPS 1645", STAC_DELL_M6_BOTH),
+	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
+				"Dell Studio 1558", STAC_DELL_M6_DMIC),
 	{} /* terminator */
 };
 
 static struct snd_pci_quirk stac92hd73xx_codec_id_cfg_tbl[] = {
 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
 		      "Alienware M17x", STAC_ALIENWARE_M17X),
+	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
+		      "Alienware M17x", STAC_ALIENWARE_M17X),
 	{} /* terminator */
 };
 
@@ -1712,6 +1723,8 @@
 		      "HP HDX", STAC_HP_HDX),  /* HDX16 */
 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
 		      "HP dv6", STAC_HP_DV5),
+	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
+		      "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
 		      "HP", STAC_HP_DV5),
 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
@@ -2053,12 +2066,12 @@
 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
 			   "Intel D965", STAC_D965_3ST),
 	/* Dell 3 stack systems */
-	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x01ed, "Dell     ", STAC_DELL_3ST),
 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x01f4, "Dell     ", STAC_DELL_3ST),
 	/* Dell 3 stack systems with verb table in BIOS */
 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
+	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x0227, "Dell Vostro 1400  ", STAC_DELL_BIOS),
 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x022e, "Dell     ", STAC_DELL_BIOS),
 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
--- linux-mvl-dove-2.6.32.orig/sound/pci/hda/hda_intel.c
+++ linux-mvl-dove-2.6.32/sound/pci/hda/hda_intel.c
@@ -116,6 +116,7 @@
 			 "{Intel, ICH9},"
 			 "{Intel, ICH10},"
 			 "{Intel, PCH},"
+			 "{Intel, CPT},"
 			 "{Intel, SCH},"
 			 "{ATI, SB450},"
 			 "{ATI, SB600},"
@@ -437,6 +438,7 @@
 /* driver types */
 enum {
 	AZX_DRIVER_ICH,
+	AZX_DRIVER_PCH,
 	AZX_DRIVER_SCH,
 	AZX_DRIVER_ATI,
 	AZX_DRIVER_ATIHDMI,
@@ -451,6 +453,7 @@
 
 static char *driver_short_names[] __devinitdata = {
 	[AZX_DRIVER_ICH] = "HDA Intel",
+	[AZX_DRIVER_PCH] = "HDA Intel PCH",
 	[AZX_DRIVER_SCH] = "HDA Intel MID",
 	[AZX_DRIVER_ATI] = "HDA ATI SB",
 	[AZX_DRIVER_ATIHDMI] = "HDA ATI HDMI",
@@ -1039,6 +1042,7 @@
 				0x01, NVIDIA_HDA_ENABLE_COHBIT);
 		break;
 	case AZX_DRIVER_SCH:
+	case AZX_DRIVER_PCH:
 		pci_read_config_word(chip->pci, INTEL_SCH_HDA_DEVC, &snoop);
 		if (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP) {
 			pci_write_config_word(chip->pci, INTEL_SCH_HDA_DEVC,
@@ -1858,6 +1862,9 @@
 
 	if (!bdl_pos_adj[chip->dev_index])
 		return 1; /* no delayed ack */
+	if (WARN_ONCE(!azx_dev->period_bytes,
+		      "hda-intel: zero azx_dev->period_bytes"))
+		return 0; /* this shouldn't happen! */
 	if (pos % azx_dev->period_bytes > azx_dev->period_bytes / 2)
 		return 0; /* NG - it's below the period boundary */
 	return 1; /* OK, it's fine */
@@ -1944,6 +1951,7 @@
 	struct azx_pcm *apcm;
 	int pcm_dev = cpcm->device;
 	int s, err;
+	size_t prealloc_min = 64*1024;	/* 64KB */
 
 	if (pcm_dev >= AZX_MAX_PCMS) {
 		snd_printk(KERN_ERR SFX "Invalid PCM device number %d\n",
@@ -1977,10 +1985,21 @@
 		if (cpcm->stream[s].substreams)
 			snd_pcm_set_ops(pcm, s, &azx_pcm_ops);
 	}
+
 	/* buffer pre-allocation */
+
+	/* subtle, don't allocate a big buffer for modems...
+	 * also, don't just test 32BIT_MASK, since azx supports
+	 * 64-bit DMA in some cases.
+	 */
+	/* lennart wants a 2.2MB buffer for 2sec of 48khz */
+	if (pcm->dev_class == SNDRV_PCM_CLASS_GENERIC &&
+	    chip->pci->dma_mask >= DMA_32BIT_MASK)
+		prealloc_min = 4 * 1024 * 1024;	/* 4MB */
+
 	snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
 					      snd_dma_pci_data(chip->pci),
-					      1024 * 64, 32 * 1024 * 1024);
+					      prealloc_min, 32 * 1024 * 1024);
 	return 0;
 }
 
@@ -2219,9 +2238,27 @@
  * white/black-listing for position_fix
  */
 static struct snd_pci_quirk position_fix_list[] __devinitdata = {
+	SND_PCI_QUIRK(0x1025, 0x009f, "Acer Aspire 5110", POS_FIX_LPIB),
 	SND_PCI_QUIRK(0x1028, 0x01cc, "Dell D820", POS_FIX_LPIB),
 	SND_PCI_QUIRK(0x1028, 0x01de, "Dell Precision 390", POS_FIX_LPIB),
+	SND_PCI_QUIRK(0x1028, 0x01f6, "Dell Latitude 131L", POS_FIX_LPIB),
+	SND_PCI_QUIRK(0x1028, 0x0470, "Dell Inspiron 1120", POS_FIX_LPIB),
+	SND_PCI_QUIRK(0x103c, 0x306d, "HP dv3", POS_FIX_LPIB),
+	SND_PCI_QUIRK(0x1028, 0x01f6, "Dell Latitude 131L", POS_FIX_LPIB),
 	SND_PCI_QUIRK(0x1043, 0x813d, "ASUS P5AD2", POS_FIX_LPIB),
+	SND_PCI_QUIRK(0x1043, 0x81b3, "ASUS", POS_FIX_LPIB),
+	SND_PCI_QUIRK(0x1043, 0x81e7, "ASUS M2V", POS_FIX_LPIB),
+	SND_PCI_QUIRK(0x1043, 0x8410, "ASUS", POS_FIX_LPIB),
+	SND_PCI_QUIRK(0x104d, 0x9069, "Sony VPCS11V9E", POS_FIX_LPIB),
+	SND_PCI_QUIRK(0x1106, 0x3288, "ASUS M2V-MX SE", POS_FIX_LPIB),
+	SND_PCI_QUIRK(0x1179, 0xff10, "Toshiba A100-259", POS_FIX_LPIB),
+	SND_PCI_QUIRK(0x1297, 0x3166, "Shuttle", POS_FIX_LPIB),
+	SND_PCI_QUIRK(0x1458, 0xa022, "ga-ma770-ud3", POS_FIX_LPIB),
+	SND_PCI_QUIRK(0x1462, 0x1002, "MSI Wind U115", POS_FIX_LPIB),
+	SND_PCI_QUIRK(0x1565, 0x820f, "Biostar Microtech", POS_FIX_LPIB),
+	SND_PCI_QUIRK(0x1565, 0x8218, "Biostar Microtech", POS_FIX_LPIB),
+	SND_PCI_QUIRK(0x8086, 0x2503, "DG965OT AAD63733-203", POS_FIX_LPIB),
+	SND_PCI_QUIRK(0x8086, 0xd601, "eMachines T5212", POS_FIX_LPIB),
 	{}
 };
 
@@ -2309,6 +2346,7 @@
 static struct snd_pci_quirk msi_white_list[] __devinitdata = {
 	SND_PCI_QUIRK(0x103c, 0x30f7, "HP Pavilion dv4t-1300", 1),
 	SND_PCI_QUIRK(0x103c, 0x3607, "HP Compa CQ40", 1),
+	SND_PCI_QUIRK(0x107b, 0x0380, "Gateway M-6866", 1),
 	{}
 };
 
@@ -2325,6 +2363,13 @@
 		       "hda_intel: msi for device %04x:%04x set to %d\n",
 		       q->subvendor, q->subdevice, q->value);
 		chip->msi = q->value;
+		return;
+	}
+
+	/* NVidia chipsets seem to cause troubles with MSI */
+	if (chip->driver_type == AZX_DRIVER_NVIDIA) {
+		printk(KERN_INFO "hda_intel: Disable MSI for Nvidia chipset\n");
+		chip->msi = 0;
 	}
 }
 
@@ -2374,6 +2419,7 @@
 	if (bdl_pos_adj[dev] < 0) {
 		switch (chip->driver_type) {
 		case AZX_DRIVER_ICH:
+		case AZX_DRIVER_PCH:
 			bdl_pos_adj[dev] = 1;
 			break;
 		default:
@@ -2436,6 +2482,11 @@
 		}
 	}
 
+	/* disable 64bit DMA address for Teradici */
+	/* it does not work with device 6549:1200 subsys e4a2:040b */
+	if (chip->driver_type == AZX_DRIVER_TERA)
+		gcap &= ~ICH6_GCAP_64OK;
+
 	/* allow 64bit DMA address if supported by H/W */
 	if ((gcap & ICH6_GCAP_64OK) && !pci_set_dma_mask(pci, DMA_BIT_MASK(64)))
 		pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(64));
@@ -2643,6 +2694,9 @@
 	{ PCI_DEVICE(0x8086, 0x3a6e), .driver_data = AZX_DRIVER_ICH },
 	/* PCH */
 	{ PCI_DEVICE(0x8086, 0x3b56), .driver_data = AZX_DRIVER_ICH },
+	{ PCI_DEVICE(0x8086, 0x3b57), .driver_data = AZX_DRIVER_ICH },
+	/* CPT */
+	{ PCI_DEVICE(0x8086, 0x1c20), .driver_data = AZX_DRIVER_PCH },
 	/* SCH */
 	{ PCI_DEVICE(0x8086, 0x811b), .driver_data = AZX_DRIVER_SCH },
 	/* ATI SB 450/600 */
@@ -2689,6 +2743,9 @@
 	{ PCI_DEVICE(0x10de, 0x0ac1), .driver_data = AZX_DRIVER_NVIDIA },
 	{ PCI_DEVICE(0x10de, 0x0ac2), .driver_data = AZX_DRIVER_NVIDIA },
 	{ PCI_DEVICE(0x10de, 0x0ac3), .driver_data = AZX_DRIVER_NVIDIA },
+	{ PCI_DEVICE(0x10de, 0x0be2), .driver_data = AZX_DRIVER_NVIDIA },
+	{ PCI_DEVICE(0x10de, 0x0be3), .driver_data = AZX_DRIVER_NVIDIA },
+	{ PCI_DEVICE(0x10de, 0x0be4), .driver_data = AZX_DRIVER_NVIDIA },
 	{ PCI_DEVICE(0x10de, 0x0d94), .driver_data = AZX_DRIVER_NVIDIA },
 	{ PCI_DEVICE(0x10de, 0x0d95), .driver_data = AZX_DRIVER_NVIDIA },
 	{ PCI_DEVICE(0x10de, 0x0d96), .driver_data = AZX_DRIVER_NVIDIA },
--- linux-mvl-dove-2.6.32.orig/sound/pci/ac97/ac97_patch.c
+++ linux-mvl-dove-2.6.32/sound/pci/ac97/ac97_patch.c
@@ -1867,11 +1867,14 @@
 	0x10140523, /* Thinkpad R40 */
 	0x10140534, /* Thinkpad X31 */
 	0x10140537, /* Thinkpad T41p */
+	0x1014053e, /* Thinkpad R40e */
 	0x10140554, /* Thinkpad T42p/R50p */
 	0x10140567, /* Thinkpad T43p 2668-G7U */
 	0x10140581, /* Thinkpad X41-2527 */
+	0x10280160, /* Dell Dimension 2400 */
 	0x104380b0, /* Asus A7V8X-MX */
 	0x11790241, /* Toshiba Satellite A-15 S127 */
+	0x1179ff10, /* Toshiba P500 */
 	0x144dc01a, /* Samsung NP-X20C004/SEG */
 	0 /* end */
 };
--- linux-mvl-dove-2.6.32.orig/sound/pci/riptide/riptide.c
+++ linux-mvl-dove-2.6.32/sound/pci/riptide/riptide.c
@@ -1224,15 +1224,14 @@
 		    firmware.firmware.ASIC, firmware.firmware.CODEC,
 		    firmware.firmware.AUXDSP, firmware.firmware.PROG);
 
+	if (!chip)
+		return 1;
+
 	for (i = 0; i < FIRMWARE_VERSIONS; i++) {
 		if (!memcmp(&firmware_versions[i], &firmware, sizeof(firmware)))
-			break;
-	}
-	if (i >= FIRMWARE_VERSIONS)
-		return 0; /* no match */
+			return 1; /* OK */
 
-	if (!chip)
-		return 1; /* OK */
+	}
 
 	snd_printdd("Writing Firmware\n");
 	if (!chip->fw_entry) {
--- linux-mvl-dove-2.6.32.orig/sound/pci/emu10k1/emu10k1.c
+++ linux-mvl-dove-2.6.32/sound/pci/emu10k1/emu10k1.c
@@ -52,6 +52,7 @@
 static int max_buffer_size[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 128};
 static int enable_ir[SNDRV_CARDS];
 static uint subsystem[SNDRV_CARDS]; /* Force card subsystem model */
+static uint delay_pcm_irq[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 2};
 
 module_param_array(index, int, NULL, 0444);
 MODULE_PARM_DESC(index, "Index value for the EMU10K1 soundcard.");
@@ -73,6 +74,8 @@
 MODULE_PARM_DESC(enable_ir, "Enable IR.");
 module_param_array(subsystem, uint, NULL, 0444);
 MODULE_PARM_DESC(subsystem, "Force card subsystem model.");
+module_param_array(delay_pcm_irq, uint, NULL, 0444);
+MODULE_PARM_DESC(delay_pcm_irq, "Delay PCM interrupt by specified number of samples (default 0).");
 /*
  * Class 0401: 1102:0008 (rev 00) Subsystem: 1102:1001 -> Audigy2 Value  Model:SB0400
  */
@@ -127,6 +130,7 @@
 				      &emu)) < 0)
 		goto error;
 	card->private_data = emu;
+	emu->delay_pcm_irq = delay_pcm_irq[dev] & 0x1f;
 	if ((err = snd_emu10k1_pcm(emu, 0, NULL)) < 0)
 		goto error;
 	if ((err = snd_emu10k1_pcm_mic(emu, 1, NULL)) < 0)
--- linux-mvl-dove-2.6.32.orig/sound/pci/emu10k1/memory.c
+++ linux-mvl-dove-2.6.32/sound/pci/emu10k1/memory.c
@@ -309,8 +309,10 @@
 	if (snd_BUG_ON(!hdr))
 		return NULL;
 
+	idx = runtime->period_size >= runtime->buffer_size ?
+					(emu->delay_pcm_irq * 2) : 0;
 	mutex_lock(&hdr->block_mutex);
-	blk = search_empty(emu, runtime->dma_bytes);
+	blk = search_empty(emu, runtime->dma_bytes + idx);
 	if (blk == NULL) {
 		mutex_unlock(&hdr->block_mutex);
 		return NULL;
--- linux-mvl-dove-2.6.32.orig/sound/pci/emu10k1/emupcm.c
+++ linux-mvl-dove-2.6.32/sound/pci/emu10k1/emupcm.c
@@ -332,7 +332,7 @@
 		evoice->epcm->ccca_start_addr = start_addr + ccis;
 		if (extra) {
 			start_addr += ccis;
-			end_addr += ccis;
+			end_addr += ccis + emu->delay_pcm_irq;
 		}
 		if (stereo && !extra) {
 			snd_emu10k1_ptr_write(emu, CPF, voice, CPF_STEREO_MASK);
@@ -360,7 +360,9 @@
 	/* Assumption that PT is already 0 so no harm overwriting */
 	snd_emu10k1_ptr_write(emu, PTRX, voice, (send_amount[0] << 8) | send_amount[1]);
 	snd_emu10k1_ptr_write(emu, DSL, voice, end_addr | (send_amount[3] << 24));
-	snd_emu10k1_ptr_write(emu, PSST, voice, start_addr | (send_amount[2] << 24));
+	snd_emu10k1_ptr_write(emu, PSST, voice,
+			(start_addr + (extra ? emu->delay_pcm_irq : 0)) |
+			(send_amount[2] << 24));
 	if (emu->card_capabilities->emu_model)
 		pitch_target = PITCH_48000; /* Disable interpolators on emu1010 card */
 	else 
@@ -732,6 +734,23 @@
 	snd_emu10k1_ptr_write(emu, IP, voice, 0);
 }
 
+static inline void snd_emu10k1_playback_mangle_extra(struct snd_emu10k1 *emu,
+		struct snd_emu10k1_pcm *epcm,
+		struct snd_pcm_substream *substream,
+		struct snd_pcm_runtime *runtime)
+{
+	unsigned int ptr, period_pos;
+
+	/* try to sychronize the current position for the interrupt
+	   source voice */
+	period_pos = runtime->status->hw_ptr - runtime->hw_ptr_interrupt;
+	period_pos %= runtime->period_size;
+	ptr = snd_emu10k1_ptr_read(emu, CCCA, epcm->extra->number);
+	ptr &= ~0x00ffffff;
+	ptr |= epcm->ccca_start_addr + period_pos;
+	snd_emu10k1_ptr_write(emu, CCCA, epcm->extra->number, ptr);
+}
+
 static int snd_emu10k1_playback_trigger(struct snd_pcm_substream *substream,
 				        int cmd)
 {
@@ -753,6 +772,8 @@
 		/* follow thru */
 	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 	case SNDRV_PCM_TRIGGER_RESUME:
+		if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE)
+			snd_emu10k1_playback_mangle_extra(emu, epcm, substream, runtime);
 		mix = &emu->pcm_mixer[substream->number];
 		snd_emu10k1_playback_prepare_voice(emu, epcm->voices[0], 1, 0, mix);
 		snd_emu10k1_playback_prepare_voice(emu, epcm->voices[1], 0, 0, mix);
@@ -869,8 +890,9 @@
 #endif
 	/*
 	printk(KERN_DEBUG
-	       "ptr = 0x%x, buffer_size = 0x%x, period_size = 0x%x\n",
-	       ptr, runtime->buffer_size, runtime->period_size);
+	       "ptr = 0x%lx, buffer_size = 0x%lx, period_size = 0x%lx\n",
+	       (long)ptr, (long)runtime->buffer_size,
+	       (long)runtime->period_size);
 	*/
 	return ptr;
 }
--- linux-mvl-dove-2.6.32.orig/sound/pci/oxygen/oxygen.c
+++ linux-mvl-dove-2.6.32/sound/pci/oxygen/oxygen.c
@@ -393,6 +393,10 @@
 		chip->model.suspend = claro_suspend;
 		chip->model.resume = claro_resume;
 		chip->model.set_adc_params = set_ak5385_params;
+		chip->model.device_config = PLAYBACK_0_TO_I2S |
+					    PLAYBACK_1_TO_SPDIF |
+					    CAPTURE_0_FROM_I2S_2 |
+					    CAPTURE_1_FROM_SPDIF;
 		break;
 	}
 	if (id->driver_data == MODEL_MERIDIAN ||
--- linux-mvl-dove-2.6.32.orig/sound/pci/echoaudio/echoaudio.c
+++ linux-mvl-dove-2.6.32/sound/pci/echoaudio/echoaudio.c
@@ -1821,7 +1821,9 @@
 	/* The hardware doesn't tell us which substream caused the irq,
 	thus we have to check all running substreams. */
 	for (ss = 0; ss < DSP_MAXPIPES; ss++) {
-		if ((substream = chip->substream[ss])) {
+		substream = chip->substream[ss];
+		if (substream && ((struct audiopipe *)substream->runtime->
+				private_data)->state == PIPE_STATE_STARTED) {
 			period = pcm_pointer(substream) /
 				substream->runtime->period_size;
 			if (period != chip->last_period[ss]) {
--- linux-mvl-dove-2.6.32.orig/sound/pci/mixart/mixart.c
+++ linux-mvl-dove-2.6.32/sound/pci/mixart/mixart.c
@@ -1161,13 +1161,15 @@
 				unsigned long count, unsigned long pos)
 {
 	struct mixart_mgr *mgr = entry->private_data;
+	unsigned long maxsize;
 
-	count = count & ~3; /* make sure the read size is a multiple of 4 bytes */
-	if(count <= 0)
+	if (pos >= MIXART_BA0_SIZE)
 		return 0;
-	if(pos + count > MIXART_BA0_SIZE)
-		count = (long)(MIXART_BA0_SIZE - pos);
-	if(copy_to_user_fromio(buf, MIXART_MEM( mgr, pos ), count))
+	maxsize = MIXART_BA0_SIZE - pos;
+	if (count > maxsize)
+		count = maxsize;
+	count = count & ~3; /* make sure the read size is a multiple of 4 bytes */
+	if (copy_to_user_fromio(buf, MIXART_MEM(mgr, pos), count))
 		return -EFAULT;
 	return count;
 }
@@ -1180,13 +1182,15 @@
 				unsigned long count, unsigned long pos)
 {
 	struct mixart_mgr *mgr = entry->private_data;
+	unsigned long maxsize;
 
-	count = count & ~3; /* make sure the read size is a multiple of 4 bytes */
-	if(count <= 0)
+	if (pos > MIXART_BA1_SIZE)
 		return 0;
-	if(pos + count > MIXART_BA1_SIZE)
-		count = (long)(MIXART_BA1_SIZE - pos);
-	if(copy_to_user_fromio(buf, MIXART_REG( mgr, pos ), count))
+	maxsize = MIXART_BA1_SIZE - pos;
+	if (count > maxsize)
+		count = maxsize;
+	count = count & ~3; /* make sure the read size is a multiple of 4 bytes */
+	if (copy_to_user_fromio(buf, MIXART_REG(mgr, pos), count))
 		return -EFAULT;
 	return count;
 }
--- linux-mvl-dove-2.6.32.orig/sound/soc/Kconfig
+++ linux-mvl-dove-2.6.32/sound/soc/Kconfig
@@ -36,6 +36,7 @@
 source "sound/soc/s6000/Kconfig"
 source "sound/soc/sh/Kconfig"
 source "sound/soc/txx9/Kconfig"
+source "sound/soc/orion/Kconfig"
 
 # Supported codecs
 source "sound/soc/codecs/Kconfig"
--- linux-mvl-dove-2.6.32.orig/sound/soc/Makefile
+++ linux-mvl-dove-2.6.32/sound/soc/Makefile
@@ -14,3 +14,4 @@
 obj-$(CONFIG_SND_SOC)	+= s6000/
 obj-$(CONFIG_SND_SOC)	+= sh/
 obj-$(CONFIG_SND_SOC)	+= txx9/
+obj-$(CONFIG_SND_SOC)	+= orion/
--- linux-mvl-dove-2.6.32.orig/sound/soc/soc-core.c
+++ linux-mvl-dove-2.6.32/sound/soc/soc-core.c
@@ -275,6 +275,7 @@
 	mutex_unlock(&pcm_mutex);
 	return 0;
 
+#if 0
 machine_err:
 	if (machine->ops && machine->ops->shutdown)
 		machine->ops->shutdown(substream);
@@ -286,6 +287,11 @@
 platform_err:
 	if (cpu_dai->ops->shutdown)
 		cpu_dai->ops->shutdown(substream, cpu_dai);
+#else
+machine_err:
+codec_dai_err:
+platform_err:
+#endif
 out:
 	mutex_unlock(&pcm_mutex);
 	return ret;
@@ -1107,19 +1113,21 @@
 
 	dai_link->pcm = pcm;
 	pcm->private_data = rtd;
-	soc_pcm_ops.mmap = platform->pcm_ops->mmap;
-	soc_pcm_ops.pointer = platform->pcm_ops->pointer;
-	soc_pcm_ops.ioctl = platform->pcm_ops->ioctl;
-	soc_pcm_ops.copy = platform->pcm_ops->copy;
-	soc_pcm_ops.silence = platform->pcm_ops->silence;
-	soc_pcm_ops.ack = platform->pcm_ops->ack;
-	soc_pcm_ops.page = platform->pcm_ops->page;
+
+	memcpy(&rtd->pcm_ops, &soc_pcm_ops, sizeof(struct snd_pcm_ops));
+	rtd->pcm_ops.mmap = platform->pcm_ops->mmap;
+	rtd->pcm_ops.pointer = platform->pcm_ops->pointer;
+	rtd->pcm_ops.ioctl = platform->pcm_ops->ioctl;
+	rtd->pcm_ops.copy = platform->pcm_ops->copy;
+	rtd->pcm_ops.silence = platform->pcm_ops->silence;
+	rtd->pcm_ops.ack = platform->pcm_ops->ack;
+	rtd->pcm_ops.page = platform->pcm_ops->page;
 
 	if (playback)
-		snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &soc_pcm_ops);
+		snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &rtd->pcm_ops);
 
 	if (capture)
-		snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &soc_pcm_ops);
+		snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &rtd->pcm_ops);
 
 	ret = platform->pcm_new(codec->card, codec_dai, pcm);
 	if (ret < 0) {
--- linux-mvl-dove-2.6.32.orig/sound/soc/orion/Kconfig
+++ linux-mvl-dove-2.6.32/sound/soc/orion/Kconfig
@@ -0,0 +1,75 @@
+menu "SoC Audio for the Marvell SoC's"
+
+config SND_DOVE_AC97
+	tristate "Marvell Dove AC97 interface support"
+	depends on ARCH_DOVE && SND_SOC
+	select SND_AC97_CODEC
+	select AC97_BUS
+	help
+	  Say Y or M if you want to add support for the AC97 interface in Marvell
+	  SoC's.
+
+config SND_DOVE_SOC_DB
+	tristate "SoC AC97 Audio support for Marvell Dove DB"
+	depends on SND_DOVE_AC97 && (MACH_DOVE_DB || MACH_DOVE_DB_Z0)
+	select SND_PXA2XX_SOC
+	select SND_PXA2XX_LIB
+	select SND_PXA2XX_SOC_AC97
+	select SND_PXA2XX_SOC_AC97_SURROUND
+	select SND_SOC_AD1980
+	help
+	  Say Y if you want to add support for SoC audio on Marvell
+	  Dove Development Board.
+
+config SND_DOVE_SOC_DB_B
+	tristate "SoC AC97 Audio support for Marvell Dove DB-B"
+	depends on SND_DOVE_AC97 && MACH_DOVE_DB_B
+	select SND_PXA2XX_SOC
+	select SND_PXA2XX_LIB
+	select SND_PXA2XX_SOC_AC97
+	select SND_PXA2XX_SOC_AC97_SURROUND
+	select SND_SOC_RT655
+	select SND_SOC_AC97_CODEC
+	help
+	  Say Y if you want to add support for SoC audio on Marvell
+	  Dove Development Board.
+
+
+config SND_DOVE_SOC_AC97_AVD1
+        tristate "SoC AC97 Audio support for AVD1"
+        depends on SND_DOVE_AC97
+        select SND_PXA2XX_SOC
+	select SND_PXA2XX_LIB
+        select SND_PXA2XX_SOC_AC97
+        select SND_PXA2XX_SOC_AC97_SURROUND
+        select SND_SOC_RT5610
+
+
+config SND_DOVE_SOC_MRVL_AUDIO
+	tristate "Marvell mv88fx Audio ALSA SOC driver"
+	depends on MV_INCLUDE_AUDIO && SND_SOC
+	help
+	  Say Y if you want to add support for SoC audio on Marvell
+	  Dove Development Board.
+
+menu "Select Codecs for the mv88fx i2s"
+     depends on SND_DOVE_SOC_MRVL_AUDIO
+
+config CODEC_CS42L51
+        bool "CS42L51 codec"
+        depends on SND_DOVE_SOC_MRVL_AUDIO
+        select SND_SOC_CS42L51
+
+config CODEC_RT5623
+        bool "RT5623 codec"
+        depends on SND_DOVE_SOC_MRVL_AUDIO
+        select SND_SOC_RT5623
+
+config CODEC_RT5630
+        bool "RT5630 codec"
+        depends on SND_DOVE_SOC_MRVL_AUDIO
+        select SND_SOC_RT5630
+
+endmenu
+endmenu
+
--- linux-mvl-dove-2.6.32.orig/sound/soc/orion/dove_ac97_avng.c
+++ linux-mvl-dove-2.6.32/sound/soc/orion/dove_ac97_avng.c
@@ -0,0 +1,130 @@
+/*
+ *	dove_ac97avng.c  --  SoC audio for Dove Avengers MID board
+ *
+ *	Marvell Orion Alsa SOC Sound driver
+ *
+ *	Author: Brian Hsu
+ *	Copyright (C) 2009 Marvell Ltd.
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/device.h>
+
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/soc.h>
+#include <sound/soc-dapm.h>
+
+#include <asm/mach-types.h>
+//#include <asm/arch/pxa-regs.h>
+//#include <asm/arch/hardware.h>
+
+#include "../codecs/rt5610.h"
+#include "../pxa/pxa2xx-pcm.h"
+#include "../pxa/pxa2xx-ac97.h"
+
+static struct platform_device *dove_ac97_snd_device;
+
+static struct snd_soc_dai_link dove_ac97_dai[] = {
+	{
+	 .name = "AC97",
+	 .stream_name = "AC97 HiFi",
+	 .cpu_dai = &pxa_ac97_dai[PXA2XX_DAI_AC97_HIFI],
+	 .codec_dai = &rt5610_dai,
+	 },
+};
+
+static struct snd_soc_card dove = {
+	.name = "Dove-AC97-RT5611",
+	.platform = &pxa2xx_soc_platform,
+	.dai_link = dove_ac97_dai,
+	.num_links = ARRAY_SIZE(dove_ac97_dai),
+};
+
+static struct snd_soc_device dove_ac97_snd_devdata = {
+	.card = &dove,
+	.codec_dev = &soc_codec_dev_rt5610,
+};
+
+struct platform_device rt5610_codec_dev = {
+	.name           = "rt5610-codec",
+	.id             = 0,
+};
+
+static int dove_ac97_snd_probe(struct platform_device *pdev)
+{
+	struct resource *res;
+	int ret = 0;
+
+        if (!machine_is_dove_rd_avng() && !machine_is_dove_rd_avng_z0())
+                return -ENODEV;
+
+	dove_ac97_snd_device = platform_device_alloc("soc-audio", 1);
+	if (!dove_ac97_snd_device)
+		return -ENOMEM;
+
+	platform_set_drvdata(dove_ac97_snd_device, &dove_ac97_snd_devdata);
+	dove_ac97_snd_devdata.dev = &dove_ac97_snd_device->dev;
+
+	res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+	ret = platform_device_add_resources(dove_ac97_snd_device, res, 1);
+	
+	//printk(KERN_ERR "dove_ac97_avng: add resource ret=%x\n", ret);
+
+	
+	ret = platform_device_add(dove_ac97_snd_device);
+
+	if (ret)
+		platform_device_put(dove_ac97_snd_device);
+
+	ret = platform_device_register(&rt5610_codec_dev);
+	if(ret)
+                platform_device_unregister(&rt5610_codec_dev);
+
+
+	return ret;
+
+}
+
+static int dove_ac97_snd_remove(struct platform_device *pdev)
+
+{
+	platform_device_unregister(&rt5610_codec_dev);
+	platform_device_unregister(dove_ac97_snd_device);
+	return 0;
+}
+static struct platform_driver dove_ac97_snd_driver = {
+	.probe = dove_ac97_snd_probe,
+	.remove = dove_ac97_snd_remove,
+	.driver = {
+		   .name = "rt5611_snd",
+		   },
+
+};
+static int __init dove_ac97_snd_init(void)
+{
+	if (!machine_is_dove_rd_avng())
+		return -ENODEV;
+
+	return platform_driver_register(&dove_ac97_snd_driver);
+}
+
+static void __exit dove_ac97_snd_exit(void)
+{
+	platform_driver_unregister(&dove_ac97_snd_driver);
+
+}
+module_init(dove_ac97_snd_init);
+module_exit(dove_ac97_snd_exit);
+
+/* Module information */
+MODULE_AUTHOR(" Brian Hsu <bhsu@marvell.com>");
+MODULE_DESCRIPTION("ALSA SoC Dove-AC97");
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/sound/soc/orion/Makefile
+++ linux-mvl-dove-2.6.32/sound/soc/orion/Makefile
@@ -0,0 +1,12 @@
+# Dove Machine Support
+snd-soc-dovedb-objs := dove_db.o
+snd-soc-dove-db-b-objs := dove_db_b.o
+snd-soc-dove-avng-objs := dove_ac97_avng.o
+
+obj-$(CONFIG_SND_DOVE_SOC_DB) += snd-soc-dovedb.o
+obj-$(CONFIG_SND_DOVE_SOC_DB_B) += snd-soc-dove-db-b.o
+
+obj-$(CONFIG_SND_DOVE_SOC_MRVL_AUDIO) 	+= ../../../arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_audio_soc/
+obj-$(CONFIG_SND_DOVE_SOC_AC97_AVD1) += snd-soc-dove-avng.o
+
+
--- linux-mvl-dove-2.6.32.orig/sound/soc/orion/dove_db.c
+++ linux-mvl-dove-2.6.32/sound/soc/orion/dove_db.c
@@ -0,0 +1,94 @@
+/*
+ * dove_db.c  --  SoC audio for Dove development board
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/device.h>
+
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/soc.h>
+#include <sound/soc-dapm.h>
+
+#include <asm/mach-types.h>
+#include <mach/pxa-regs.h>
+//#include <mach/hardware.h>
+
+#include "../codecs/ad1980.h"
+#include "../pxa/pxa2xx-pcm.h"
+#include "../pxa/pxa2xx-ac97.h"
+#include <mach/dove.h>
+
+static struct snd_soc_card dovedb;
+
+static struct snd_soc_dai_link dovedb_dai[] = {
+{
+	.name = "AC97",
+	.stream_name = "AC97 HiFi",
+	.cpu_dai = &pxa_ac97_dai[PXA2XX_DAI_AC97_HIFI],
+	.codec_dai = &ad1980_dai,
+},
+{
+	.name = "AC97",
+	.stream_name = "AC97 LFE",
+	.cpu_dai = &pxa_ac97_surround_dai[PXA3XX_DAI_AC97_LFE],
+	.codec_dai = &ad1980_dai,
+},
+{
+	.name = "AC97",
+	.stream_name = "AC97 Surround",
+	.cpu_dai = &pxa_ac97_surround_dai[PXA3XX_DAI_AC97_SURROUND],
+	.codec_dai = &ad1980_dai,
+},
+};
+
+static struct snd_soc_card dovedb = {
+	.name = "DoveDB",
+	.platform = &pxa2xx_soc_platform,
+	.dai_link = dovedb_dai,
+	.num_links = ARRAY_SIZE(dovedb_dai),
+};
+
+static struct snd_soc_device dovedb_snd_devdata = {
+	.card = &dovedb,
+	.codec_dev = &soc_codec_dev_ad1888,
+};
+
+static struct platform_device *dovedb_snd_device;
+
+extern u32 chip_rev;
+static int __init dovedb_init(void)
+{
+	int ret;
+
+	if (!(machine_is_dove_db() && (chip_rev < DOVE_REV_A0)) && !machine_is_dove_db_z0())
+		return -ENODEV;
+
+	dovedb_snd_device = platform_device_alloc("soc-audio", 0);
+	if (!dovedb_snd_device)
+		return -ENOMEM;
+
+	platform_set_drvdata(dovedb_snd_device, &dovedb_snd_devdata);
+	dovedb_snd_devdata.dev = &dovedb_snd_device->dev;
+	ret = platform_device_add(dovedb_snd_device);
+
+	if (ret)
+		platform_device_put(dovedb_snd_device);
+
+	return ret;
+}
+
+static void __exit dovedb_exit(void)
+{
+	platform_device_unregister(dovedb_snd_device);
+}
+
+module_init(dovedb_init);
+module_exit(dovedb_exit);
+
+/* Module information */
+MODULE_AUTHOR("Shadi Ammouri");
+MODULE_DESCRIPTION("ALSA SoC Dove-DB");
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/sound/soc/orion/dove_db_b.c
+++ linux-mvl-dove-2.6.32/sound/soc/orion/dove_db_b.c
@@ -0,0 +1,109 @@
+/*
+ *	dove_db_b.c  --  AC97 SoC audio for Dove DB-88AP510-BP-B
+ *
+ *	Marvell Orion Alsa SOC Sound driver
+ *
+ *	Author: Saeed Bishara
+ *	Copyright (C) 2010 Marvell Ltd.
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/device.h>
+
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/soc.h>
+#include <sound/soc-dapm.h>
+
+#include <asm/mach-types.h>
+#include <mach/dove.h>
+
+#include "../codecs/ac97.h"
+#include "../pxa/pxa2xx-pcm.h"
+#include "../pxa/pxa2xx-ac97.h"
+
+static struct platform_device *dove_ac97_snd_device;
+
+static int machine_init(struct snd_soc_codec *codec)
+{
+	snd_soc_dapm_sync(codec);
+	return 0;
+}
+
+static struct snd_soc_dai_link dove_ac97_dai[] = {
+	{
+		.name = "AC97",
+		.stream_name = "AC97 HiFi",
+		.cpu_dai = &pxa_ac97_dai[PXA2XX_DAI_AC97_HIFI],
+		.codec_dai = &ac97_dai,
+		.init = machine_init,
+	},
+	{
+		.name = "AC97",
+		.stream_name = "AC97 LFE",
+		.cpu_dai = &pxa_ac97_surround_dai[PXA3XX_DAI_AC97_LFE],
+		.codec_dai = &ac97_dai,
+	},
+	{
+		.name = "AC97",
+		.stream_name = "AC97 Surround",
+		.cpu_dai = &pxa_ac97_surround_dai[PXA3XX_DAI_AC97_SURROUND],
+		.codec_dai = &ac97_dai,
+	},
+};
+
+static struct snd_soc_card dove = {
+	.name = "Dove-AC97-RT655",
+	.platform = &pxa2xx_soc_platform,
+	.dai_link = dove_ac97_dai,
+	.num_links = ARRAY_SIZE(dove_ac97_dai),
+};
+
+static struct snd_soc_device dove_ac97_snd_devdata = {
+	.card = &dove,
+	.codec_dev = &soc_codec_dev_ac97,
+};
+
+extern u32 chip_rev;
+static int __init dove_db_b_init(void)
+{
+	int ret = 0;
+
+        if (!machine_is_dove_db_b() && !(machine_is_dove_db() && (chip_rev >= DOVE_REV_A0)))
+                return -ENODEV;
+
+	ac97_dai.playback.rates = SNDRV_PCM_RATE_48000;
+	ac97_dai.capture.rates = SNDRV_PCM_RATE_48000;
+	dove_ac97_snd_device = platform_device_alloc("soc-audio", 0);
+	if (!dove_ac97_snd_device)
+		return -ENOMEM;
+
+	platform_set_drvdata(dove_ac97_snd_device, &dove_ac97_snd_devdata);
+	dove_ac97_snd_devdata.dev = &dove_ac97_snd_device->dev;
+
+	ret = platform_device_add(dove_ac97_snd_device);
+	if (ret)
+		platform_device_put(dove_ac97_snd_device);
+
+	return ret;
+}
+
+static void __exit dove_db_b_exit(void)
+{
+	platform_device_unregister(dove_ac97_snd_device);
+}
+
+module_init(dove_db_b_init);
+module_exit(dove_db_b_exit);
+
+/* Module information */
+MODULE_AUTHOR(" Brian Hsu <bhsu@marvell.com>");
+MODULE_DESCRIPTION("ALSA SoC Dove-AC97");
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/sound/soc/codecs/ad1980.h
+++ linux-mvl-dove-2.6.32/sound/soc/codecs/ad1980.h
@@ -19,5 +19,6 @@
 
 extern struct snd_soc_dai ad1980_dai;
 extern struct snd_soc_codec_device soc_codec_dev_ad1980;
+extern struct snd_soc_codec_device soc_codec_dev_ad1888;
 
 #endif
--- linux-mvl-dove-2.6.32.orig/sound/soc/codecs/cs42l51.h
+++ linux-mvl-dove-2.6.32/sound/soc/codecs/cs42l51.h
@@ -0,0 +1,62 @@
+/*
+ *
+ *	Marvell Alsa SoC Codec driver
+ *
+ *	Author: Yuval Elmaliah
+ *	Copyright (C) 2008 Marvell Ltd.
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#ifndef _CS42l51_H
+#define _CS42l51_H
+
+/* register assignement */
+#define   CS42L51_REG_ID                           0x1
+#define   CS42L51_REG_POWER_CNTRL                  0x2
+#define   CS42L51_REG_MIC_POWER_CNTRL              0x3
+#define   CS42L51_REG_IF_CNTRL                     0x4
+#define   CS42L51_REG_MIC_CNTRL                    0x5
+#define   CS42L51_REG_ADC_CNTRL                    0x6
+#define   CS42L51_REG_ADC_INPUT_INV_MUTE           0x7
+#define   CS42L51_REG_DAC_OUTPUT_CTRL              0x8
+#define   CS42L51_REG_DAC_CTRL                     0x9
+#define   CS42L51_REG_ALCA_PGAA_CTRL               0xa
+#define   CS42L51_REG_ALCB_PGAB_CTRL               0xb
+#define   CS42L51_REG_ADCA_ATTENUATOR              0xc
+#define   CS42L51_REG_ADCB_ATTENUATOR              0xd
+#define   CS42L51_REG_ADCA_MIXER_VOL_CNTRL         0xe
+#define   CS42L51_REG_ADCB_MIXER_VOL_CNTRL         0xf
+#define   CS42L51_REG_PCMA_MIXER_VOL_CNTRL         0x10
+#define   CS42L51_REG_PCMB_MIXER_VOL_CNTRL         0x11
+#define   CS42L51_REG_BEEP_FREQ_TIMING_CFG         0x12
+#define   CS42L51_REG_BEEP_OFF_TIME                0x13
+#define   CS42L51_REG_BEEP_TONE_CFG                0x14
+#define   CS42L51_REG_TONE_CTRL                    0x15
+#define   CS42L51_REG_VOL_OUTA_CTRL                0x16
+#define   CS42L51_REG_VOL_OUTB_CTRL                0x17
+#define   CS42L51_REG_CHANNEL_MIXER                0x18
+#define   CS42L51_REG_LIMITER_THRESHOLD            0x19
+#define   CS42L51_REG_LIMITER_RELEASE_RATE         0x1a
+#define   CS42L51_REG_LIMITER_ATTACK_RATE          0x1b
+#define   CS42L51_REG_ALC_ENABLE_ATTACK_RATE       0x1c
+#define   CS42L51_REG_ALC_RELEASE_RATE             0x1d
+#define   CS42L51_REG_ALC_THRESHOLD                0x1e
+#define   CS42L51_REG_NOISE_GATE_CFG               0x1f
+#define   CS42L51_REG_STATUS                       0x20
+#define   CS42L51_REG_CHARGE_PUMP_FREQ             0x21
+
+#define CS42L51_REG_MAX CS42L51_REG_CHARGE_PUMP_FREQ
+
+struct cs42l51_setup_data {
+	unsigned short i2c_address;
+};
+
+/* ASoC DAI */
+extern struct snd_soc_dai cs42l51_dai;
+extern struct snd_soc_codec_device soc_codec_dev_cs42l51;
+
+#endif
--- linux-mvl-dove-2.6.32.orig/sound/soc/codecs/rt5610.c
+++ linux-mvl-dove-2.6.32/sound/soc/codecs/rt5610.c
@@ -0,0 +1,1455 @@
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/version.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/pm.h>
+#include <linux/i2c.h>
+#include <linux/platform_device.h>
+
+#include <sound/ac97_codec.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <sound/soc.h>
+#include <sound/soc-dapm.h>
+#include <sound/initval.h>
+#include <asm/div64.h>
+
+#include "rt5610.h"
+#define AUDIO_NAME "rt5610"
+#define RT5610_VERSION "0.03"
+//#define RT5610_DEBUG
+#ifdef RT5610_DEBUG
+#define dbg(format, args...) \
+	printk(KERN_ERR "%s(%d): "format"\n", __FUNCTION__, __LINE__, ##args)
+#else
+#define dbg(format, arg...) do {} while (0)
+#endif
+#define err(format, arg...) \
+	printk(KERN_ERR AUDIO_NAME ": " format "\n" , ## arg)
+#define info(format, arg...) \
+	printk(KERN_INFO AUDIO_NAME ": " format "\n" , ## arg)
+#define warn(format, arg...) \
+	printk(KERN_WARNING AUDIO_NAME ": " format "\n" , ## arg)
+	
+static struct snd_soc_codec *codec;
+bool rt5610_codec_resumed=0;
+bool spk_enable=0;
+bool hs_det=0;
+unsigned int  hs_irq;
+struct work_struct hsdet_event_work;
+struct workqueue_struct *hsdet_workq;
+
+/* codec private data */
+struct rt5610_priv {
+	unsigned int pll_id;
+	unsigned int pll_in;
+	unsigned int pll_out;
+	unsigned int vpcm_sysclk;
+};
+
+
+
+#define USE_DAPM_CONTROL 0
+
+struct rt5610_init_reg {
+	char name[30];
+	u16 reg_value;
+	u8 reg_index;
+};
+
+static struct rt5610_init_reg init_data_list[] = 
+{
+	{"HP Output Volume", 0x9090, RT5610_HP_OUT_VOL},
+	{"SPK Output Volume", 0x8080, RT5610_SPK_OUT_VOL},
+	{"Stereo DAC Volume", 0x6808, RT5610_STEREO_DAC_VOL},
+	{"Output Mixer Control", 0x6b40, RT5610_OUTPUT_MIXER_CTRL},
+	{"Mic Control", 0x0500, RT5610_MIC_CTRL},
+	{"Voice DAC Volume", 0x6800, RT5610_VOICE_DAC_OUT_VOL},
+	{"ADC Rec Mixer", 0x3f3f, RT5610_ADC_REC_MIXER},
+	{"General Control", 0x00e8, RT5610_GEN_CTRL_REG1},
+	
+};
+#define RT5610_INIT_REG_NUM ARRAY_SIZE(init_data_list)
+
+/*
+ * rt5610 register cache
+ * We can't read the RT5610 register space when we
+ * are using 2 wire for device control, so we cache them instead.
+ */
+static const u16 rt5610_reg[] = {
+	0x59b4, 0x8080, 0x8080, 0x0000, // 6
+	0xc880, 0xe808, 0xe808, 0x0808, // e
+	0xe0e0, 0xf58b, 0x7f7f, 0x0000, // 16
+	0xe800, 0x0000, 0x0000, 0x0000, // 1e
+	0x0000, 0x0000, 0x0000, 0xef00, // 26
+	0x0000, 0x0000, 0xbb80, 0x0000, // 2e
+	0x0000, 0xbb80, 0x0000, 0x0000, // 36
+	0x0000, 0x0000, 0x0000, 0x0000, // 3e
+	0x0428, 0x0000, 0x0000, 0x0000, // 46
+	0x0000, 0x0000, 0x2e3e, 0x2e3e, // 4e
+	0x0000, 0x0000, 0x003a, 0x0000, // 56
+	0x0cff, 0x0000, 0x0000, 0x0000, // 5e
+	0x0000, 0x0000, 0x2130, 0x0010, // 66
+	0x0053, 0x0000, 0x0000, 0x0000, // 6e
+	0x0000, 0x0000, 0x008c, 0x3f00, // 76
+	0x0000, 0x0000, 0x10ec, 0x1003, // 7e
+};
+
+
+
+/* virtual HP mixers regs */
+#define HPL_MIXER	0x80
+#define HPR_MIXER	0x82
+
+static u16 reg80=0x2,reg82=0x2;
+
+/*
+ * read rt5610 register cache
+ */
+static inline unsigned int rt5610_read_reg_cache(struct snd_soc_codec *codec,
+	unsigned int reg)
+{
+	u16 *cache = codec->reg_cache;
+	if (reg < 1 || reg > (ARRAY_SIZE(rt5610_reg) + 1))
+		return -1;
+	return cache[reg/2];
+}
+
+
+/*
+ * write rt5610 register cache
+ */
+
+static inline void rt5610_write_reg_cache(struct snd_soc_codec *codec,
+	unsigned int reg, unsigned int value)
+{
+	u16 *cache = codec->reg_cache;
+	if (reg < 0 || reg > 0x7e)
+		return;
+	cache[reg/2] = value;
+}
+
+
+
+static unsigned int rt5610_read(struct snd_soc_codec *codec, 
+		unsigned int reg)
+{
+	if (reg == 0x80)
+		return reg80;
+	else if (reg == 0x82)
+		return reg82;
+
+	return soc_ac97_ops.read(codec->ac97, reg);	
+}
+
+
+static int rt5610_write(struct snd_soc_codec *codec, unsigned int reg,
+	unsigned int val)
+{
+	u16 *cache = codec->reg_cache;
+
+	dbg("reg=0x%x, val=0x%x\n", reg, val);
+	if (reg == 0x80) {
+		reg80 = val;
+		return 0;
+	}
+	else if (reg == 0x82){
+		reg82 = val;
+		return 0;
+	}
+		
+	if (reg < 0x7c)
+		soc_ac97_ops.write(codec->ac97, reg, val);
+	reg = reg >> 1;
+	if (reg < (ARRAY_SIZE(rt5610_reg)))
+		cache[reg] = val;
+	return 0;
+}
+
+int rt5610_reset(struct snd_soc_codec *codec, int try_warm)
+{
+	if (try_warm && soc_ac97_ops.warm_reset) {
+		soc_ac97_ops.warm_reset(codec->ac97);
+		if (rt5610_read(codec, 0) == rt5610_reg[0])
+			return 1;
+	}
+
+	soc_ac97_ops.reset(codec->ac97);
+	if(rt5610_read(codec, 0) != rt5610_reg[0])
+		return -EIO;
+	mdelay(10);
+	return 0;
+}
+EXPORT_SYMBOL_GPL(rt5610_reset);
+	
+#define rt5610_write_mask(c, reg, value, mask) snd_soc_update_bits(c, reg, mask, value)
+
+static int rt5610_reg_init(struct snd_soc_codec *codec)
+{
+	int i;
+
+	for (i = 0; i < RT5610_INIT_REG_NUM; i++)
+		rt5610_write(codec, init_data_list[i].reg_index, init_data_list[i].reg_value);
+	return 0;
+}
+
+static const char *rt5610_spkl_pga[] = {"Vmid","HPL mixer","SPK mixer","Mono Mixer"};
+static const char *rt5610_spkr_pga[] = {"Vmid","HPR mixer","SPK mixer","Mono Mixer"};
+static const char *rt5610_hpl_pga[]  = {"Vmid","HPL mixer"};
+static const char *rt5610_hpr_pga[]  = {"Vmid","HPR mixer"};
+static const char *rt5610_mono_pga[] = {"Vmid","HP mixer","SPK mixer","Mono Mixer"};
+static const char *rt5610_amp_type_sel[] = {"Class AB","Class D"};
+static const char *rt5610_mic_boost_sel[] = {"Bypass","20db","30db","40db"};
+
+static const struct soc_enum rt5610_enum[] = {
+SOC_ENUM_SINGLE(RT5610_OUTPUT_MIXER_CTRL, 14, 4, rt5610_spkl_pga), /* spk left input sel 0 */	
+SOC_ENUM_SINGLE(RT5610_OUTPUT_MIXER_CTRL, 11, 4, rt5610_spkr_pga), /* spk right input sel 1 */	
+SOC_ENUM_SINGLE(RT5610_OUTPUT_MIXER_CTRL, 9, 2, rt5610_hpl_pga), /* hp left input sel 2 */	
+SOC_ENUM_SINGLE(RT5610_OUTPUT_MIXER_CTRL, 8, 2, rt5610_hpr_pga), /* hp right input sel 3 */	
+SOC_ENUM_SINGLE(RT5610_OUTPUT_MIXER_CTRL, 6, 4, rt5610_mono_pga), /* mono input sel 4 */
+SOC_ENUM_SINGLE(RT5610_MIC_CTRL			, 10,4, rt5610_mic_boost_sel), /*Mic1 boost sel 5 */
+SOC_ENUM_SINGLE(RT5610_MIC_CTRL			, 8,4,rt5610_mic_boost_sel), /*Mic2 boost sel 6 */
+SOC_ENUM_SINGLE(RT5610_OUTPUT_MIXER_CTRL,13,2,rt5610_amp_type_sel), /*Speaker AMP sel 7 */
+};
+
+static int rt5610_amp_sel_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
+{
+	struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+	struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
+	unsigned short val;
+	unsigned short mask, bitmask;
+
+	for (bitmask = 1; bitmask < e->max; bitmask <<= 1)
+		;
+	if (ucontrol->value.enumerated.item[0] > e->max - 1)
+		return -EINVAL;
+	val = ucontrol->value.enumerated.item[0] << e->shift_l;
+	mask = (bitmask - 1) << e->shift_l;
+	if (e->shift_l != e->shift_r) {
+		if (ucontrol->value.enumerated.item[1] > e->max - 1)
+			return -EINVAL;
+		val |= ucontrol->value.enumerated.item[1] << e->shift_r;
+		mask |= (bitmask - 1) << e->shift_r;
+	}
+
+	 snd_soc_update_bits(codec, e->reg, mask, val);
+	 val &= (0x1 << 13);
+	 if (val == 0)
+		 rt5610_write_mask(codec, 0x3c, 0x4000, 0x4000);
+	 else
+	 	 rt5610_write_mask(codec, 0x3c, 0x0000, 0x4000);
+
+	return 0;
+}
+
+static int rt5610_vpcm_enable_control(struct snd_soc_codec *codec, int enable)
+{
+	return 0;
+}
+
+/*extend interface for voice pcm control*/
+static int rt5610_vpcm_state_put(struct snd_kcontrol *kcontrol,
+	struct snd_ctl_elem_value *ucontrol)
+{
+	struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+	int mode = rt5610_read(codec, HPL_MIXER);
+
+	if (((mode & 0x8000) >> 15) == (ucontrol->value.integer.value[0]))
+		return 0;
+	mode &= 0x7fff;
+	mode |= (ucontrol->value.integer.value[0] << 15);
+	rt5610_write(codec, HPL_MIXER, mode);
+	rt5610_vpcm_enable_control(codec, ucontrol->value.integer.value[0]);		
+	return 0;
+}
+
+static const struct snd_kcontrol_new rt5610_snd_controls[] = {
+SOC_DOUBLE("SPKOUT Playback Volume", 	RT5610_SPK_OUT_VOL, 8, 0, 31, 1),	
+SOC_DOUBLE("SPKOUT Playback Switch", 	RT5610_SPK_OUT_VOL, 15, 7, 1, 1),
+SOC_DOUBLE("HPOUT Playback Volume", RT5610_HP_OUT_VOL, 8, 0, 31, 1),
+SOC_DOUBLE("HPOUT Playback Switch", RT5610_HP_OUT_VOL,15, 7, 1, 1),
+//SOC_SINGLE("Mono Playback Volume", 		RT5610_PHONEIN_MONO_OUT_VOL, 0, 31, 1),
+//SOC_SINGLE("Mono Playback Switch", 		RT5610_PHONEIN_MONO_OUT_VOL, 7, 1, 1),
+SOC_DOUBLE("PCM Playback Volume", 		RT5610_STEREO_DAC_VOL, 8, 0, 31, 1),
+SOC_DOUBLE("PCM Playback Switch", 		RT5610_STEREO_DAC_VOL,15, 7, 1, 1),
+//SOC_DOUBLE("Line In Volume", 			RT5610_LINE_IN_VOL, 8, 0, 31, 1),
+SOC_SINGLE("Mic Playback Volume", 				RT5610_MIC_VOL, 8, 31, 1),
+//SOC_SINGLE("Mic 2 Volume", 				RT5610_MIC_VOL, 0, 31, 1),
+//SOC_ENUM("Mic 1 Boost", 				rt5610_enum[5]),
+//SOC_ENUM("Mic 2 Boost", 				rt5610_enum[6]),
+//SOC_ENUM_EXT("Speaker Amp Type",			rt5610_enum[7], snd_soc_get_enum_double, rt5610_amp_sel_put),
+//SOC_SINGLE("Phone In Volume", 			RT5610_PHONEIN_MONO_OUT_VOL, 8, 31, 1),
+SOC_DOUBLE("PCM Capture Volume", 			RT5610_ADC_REC_GAIN, 7, 0, 31, 0),
+//SOC_SINGLE_EXT("Voice PCM Switch", HPL_MIXER, 15, 1, 1, snd_soc_get_volsw, rt5610_vpcm_state_put),
+};
+
+
+
+/* add non dapm controls */
+static int rt5610_add_controls(struct snd_soc_codec *codec)
+{
+	int err, i;
+
+	for (i = 0; i < ARRAY_SIZE(rt5610_snd_controls); i++) {
+		err = snd_ctl_add(codec->card,
+				snd_soc_cnew(&rt5610_snd_controls[i],codec, NULL));
+		if (err < 0)
+			return err;
+	}
+	return 0;
+}
+
+#if USE_DAPM_CONTROL
+
+/*
+ * _DAPM_ Controls
+ */
+
+/* We have to create a fake left and right HP mixers because
+ * the codec only has a single control that is shared by both channels.
+ * This makes it impossible to determine the audio path using the current
+ * register map, thus we add a new (virtual) register to help determine the
+ * audio route within the device.
+ */
+ static int mixer_event (struct snd_soc_dapm_widget *w, 
+	struct snd_kcontrol *kcontrol, int event)
+{
+
+	u16 l, r, lineIn,mic1,mic2, phone, pcm,voice;
+
+	l = rt5610_read(w->codec, HPL_MIXER);
+	r = rt5610_read(w->codec, HPR_MIXER);
+	lineIn = rt5610_read(w->codec, RT5610_LINE_IN_VOL);
+	mic2 = rt5610_read(w->codec, RT5610_MIC_ROUTING_CTRL);
+	phone = rt5610_read(w->codec,RT5610_PHONEIN_MONO_OUT_VOL);
+	pcm = rt5610_read(w->codec, RT5610_STEREO_DAC_VOL);
+	voice = rt5610_read(w->codec, RT5610_VOICE_DAC_OUT_VOL);
+
+	if (event & SND_SOC_DAPM_PRE_REG)
+		return 0;
+	if (l & 0x1 || r & 0x1)
+		rt5610_write(w->codec, RT5610_VOICE_DAC_OUT_VOL, voice & 0x7fff);
+	else
+		rt5610_write(w->codec, RT5610_VOICE_DAC_OUT_VOL, voice | 0x8000);
+
+	if (l & 0x2 || r & 0x2)
+		rt5610_write(w->codec, RT5610_STEREO_DAC_VOL, pcm & 0x7fff);
+	else
+		rt5610_write(w->codec, RT5610_STEREO_DAC_VOL, pcm | 0x8000);
+
+	if (l & 0x4 || r & 0x4)
+		rt5610_write(w->codec, RT5610_MIC_ROUTING_CTRL, mic2 & 0xff7f);
+	else
+		rt5610_write(w->codec, RT5610_MIC_ROUTING_CTRL, mic2 | 0x0080);
+
+	mic1 = rt5610_read(w->codec, RT5610_MIC_ROUTING_CTRL);
+	if (l & 0x8 || r & 0x8)
+		rt5610_write(w->codec, RT5610_MIC_ROUTING_CTRL, mic1 & 0x7fff);
+	else
+		rt5610_write(w->codec, RT5610_MIC_ROUTING_CTRL, mic1 | 0x8000);
+
+	if (l & 0x10 || r & 0x10)
+		rt5610_write(w->codec, RT5610_PHONEIN_MONO_OUT_VOL, phone & 0x7fff);
+	else
+		rt5610_write(w->codec, RT5610_PHONEIN_MONO_OUT_VOL, phone | 0x8000);
+
+	if (l & 0x20 || r & 0x20)
+		rt5610_write(w->codec, RT5610_LINE_IN_VOL, lineIn & 0x7fff);
+	else
+		rt5610_write(w->codec, RT5610_LINE_IN_VOL, lineIn | 0x8000);
+
+	return 0;
+}
+
+/* Left Headphone Mixers */
+static const struct snd_kcontrol_new rt5610_hpl_mixer_controls[] = {
+SOC_DAPM_SINGLE("LineIn Playback Switch", HPL_MIXER, 5, 1, 0),
+SOC_DAPM_SINGLE("PhoneIn Playback Switch", HPL_MIXER, 4, 1, 0),
+SOC_DAPM_SINGLE("Mic1 Playback Switch", HPL_MIXER, 3, 1, 0),
+SOC_DAPM_SINGLE("Mic2 Playback Switch", HPL_MIXER, 2, 1, 0),
+SOC_DAPM_SINGLE("PCM Playback Switch", HPL_MIXER, 1, 1, 0),
+SOC_DAPM_SINGLE("Voice Playback Switch", HPL_MIXER, 0, 1, 0),
+SOC_DAPM_SINGLE("RecordL Playback Switch", RT5610_ADC_REC_GAIN, 15, 1,1),
+};
+
+/* Right Headphone Mixers */
+static const struct snd_kcontrol_new rt5610_hpr_mixer_controls[] = {
+SOC_DAPM_SINGLE("LineIn Playback Switch", HPR_MIXER, 5, 1, 0),
+SOC_DAPM_SINGLE("PhoneIn Playback Switch", HPR_MIXER, 4, 1, 0),
+SOC_DAPM_SINGLE("Mic1 Playback Switch", HPR_MIXER, 3, 1, 0),
+SOC_DAPM_SINGLE("Mic2 Playback Switch", HPR_MIXER, 2, 1, 0),
+SOC_DAPM_SINGLE("PCM Playback Switch", HPR_MIXER, 1, 1, 0),
+SOC_DAPM_SINGLE("Voice Playback Switch", HPR_MIXER, 0, 1, 0),
+SOC_DAPM_SINGLE("RecordR Playback Switch", RT5610_ADC_REC_GAIN, 14, 1,1),
+};
+
+//Left Record Mixer
+static const struct snd_kcontrol_new rt5610_captureL_mixer_controls[] = {
+SOC_DAPM_SINGLE("Mic1 Capture Switch", RT5610_ADC_REC_MIXER, 14, 1, 1),
+SOC_DAPM_SINGLE("Mic2 Capture Switch", RT5610_ADC_REC_MIXER, 13, 1, 1),
+SOC_DAPM_SINGLE("LineInL Capture Switch",RT5610_ADC_REC_MIXER,12, 1, 1),
+SOC_DAPM_SINGLE("Phone Capture Switch", RT5610_ADC_REC_MIXER, 11, 1, 1),
+SOC_DAPM_SINGLE("HPMixerL Capture Switch", RT5610_ADC_REC_MIXER,10, 1, 1),
+SOC_DAPM_SINGLE("SPKMixer Capture Switch",RT5610_ADC_REC_MIXER,9, 1, 1),
+SOC_DAPM_SINGLE("MonoMixer Capture Switch",RT5610_ADC_REC_MIXER,8, 1, 1),
+};
+
+
+//Right Record Mixer
+static const struct snd_kcontrol_new rt5610_captureR_mixer_controls[] = {
+SOC_DAPM_SINGLE("Mic1 Capture Switch", RT5610_ADC_REC_MIXER, 6, 1, 1),
+SOC_DAPM_SINGLE("Mic2 Capture Switch", RT5610_ADC_REC_MIXER, 5, 1, 1),
+SOC_DAPM_SINGLE("LineInR Capture Switch",RT5610_ADC_REC_MIXER,4, 1, 1),
+SOC_DAPM_SINGLE("Phone Capture Switch", RT5610_ADC_REC_MIXER, 3, 1, 1),
+SOC_DAPM_SINGLE("HPMixerR Capture Switch", RT5610_ADC_REC_MIXER,2, 1, 1),
+SOC_DAPM_SINGLE("SPKMixer Capture Switch",RT5610_ADC_REC_MIXER,1, 1, 1),
+SOC_DAPM_SINGLE("MonoMixer Capture Switch",RT5610_ADC_REC_MIXER,0, 1, 1),
+};
+
+/* Speaker Mixer */
+static const struct snd_kcontrol_new rt5610_speaker_mixer_controls[] = {
+SOC_DAPM_SINGLE("LineIn Playback Switch", RT5610_LINE_IN_VOL, 14, 1, 1),
+SOC_DAPM_SINGLE("PhoneIn Playback Switch", RT5610_PHONEIN_MONO_OUT_VOL, 14, 1, 1),
+SOC_DAPM_SINGLE("Mic1 Playback Switch", RT5610_MIC_ROUTING_CTRL, 14, 1, 1),
+SOC_DAPM_SINGLE("Mic2 Playback Switch", RT5610_MIC_ROUTING_CTRL, 6, 1, 1),
+SOC_DAPM_SINGLE("PCM Playback Switch", RT5610_STEREO_DAC_VOL, 14, 1, 1),
+SOC_DAPM_SINGLE("Voice Playback Switch", RT5610_VOICE_DAC_OUT_VOL, 14, 1, 1),
+};
+
+
+/* Mono Mixer */
+static const struct snd_kcontrol_new rt5610_mono_mixer_controls[] = {
+SOC_DAPM_SINGLE("LineIn Playback Switch", RT5610_LINE_IN_VOL, 13, 1, 1),
+SOC_DAPM_SINGLE("Mic1 Playback Switch", RT5610_MIC_ROUTING_CTRL, 13, 1, 1),
+SOC_DAPM_SINGLE("Mic2 Playback Switch", RT5610_MIC_ROUTING_CTRL, 5, 1, 1),
+SOC_DAPM_SINGLE("PCM Playback Switch", RT5610_STEREO_DAC_VOL, 13, 1, 1),
+SOC_DAPM_SINGLE("Voice Playback Switch", RT5610_VOICE_DAC_OUT_VOL, 13, 1, 1),
+SOC_DAPM_SINGLE("RecordL Playback Switch", RT5610_ADC_REC_GAIN, 13, 1,1),
+SOC_DAPM_SINGLE("RecordR Playback Switch", RT5610_ADC_REC_GAIN, 12, 1,1),
+};
+
+/* mono output mux */
+static const struct snd_kcontrol_new rt5610_mono_mux_controls =
+SOC_DAPM_ENUM("Route", rt5610_enum[4]);
+
+/* speaker left output mux */
+static const struct snd_kcontrol_new rt5610_hp_spkl_mux_controls =
+SOC_DAPM_ENUM("Route", rt5610_enum[0]);
+
+/* speaker right output mux */
+static const struct snd_kcontrol_new rt5610_hp_spkr_mux_controls =
+SOC_DAPM_ENUM("Route", rt5610_enum[1]);
+
+/* headphone left output mux */
+static const struct snd_kcontrol_new rt5610_hpl_out_mux_controls =
+SOC_DAPM_ENUM("Route", rt5610_enum[2]);
+
+/* headphone right output mux */
+static const struct snd_kcontrol_new rt5610_hpr_out_mux_controls =
+SOC_DAPM_ENUM("Route", rt5610_enum[3]);
+
+static const struct snd_soc_dapm_widget rt5610_dapm_widgets[] = {
+SND_SOC_DAPM_MUX("Mono Out Mux", SND_SOC_NOPM, 0, 0,
+	&rt5610_mono_mux_controls),
+SND_SOC_DAPM_MUX("Left Speaker Out Mux", SND_SOC_NOPM, 0, 0,
+	&rt5610_hp_spkl_mux_controls),
+SND_SOC_DAPM_MUX("Right Speaker Out Mux", SND_SOC_NOPM, 0, 0,
+	&rt5610_hp_spkr_mux_controls),
+SND_SOC_DAPM_MUX("Left Headphone Out Mux", SND_SOC_NOPM, 0, 0,
+	&rt5610_hpl_out_mux_controls),
+SND_SOC_DAPM_MUX("Right Headphone Out Mux", SND_SOC_NOPM, 0, 0,
+	&rt5610_hpr_out_mux_controls),
+SND_SOC_DAPM_MIXER_E("Left HP Mixer",RT5610_PWR_MANAG_ADD2, 5, 0,
+	&rt5610_hpl_mixer_controls[0], ARRAY_SIZE(rt5610_hpl_mixer_controls),
+	mixer_event, SND_SOC_DAPM_POST_REG),
+SND_SOC_DAPM_MIXER_E("Right HP Mixer",RT5610_PWR_MANAG_ADD2, 4, 0,
+	&rt5610_hpr_mixer_controls[0], ARRAY_SIZE(rt5610_hpr_mixer_controls),
+	mixer_event, SND_SOC_DAPM_POST_REG),
+SND_SOC_DAPM_MIXER("Mono Mixer", RT5610_PWR_MANAG_ADD2, 2, 0,
+	&rt5610_mono_mixer_controls[0], ARRAY_SIZE(rt5610_mono_mixer_controls)),
+SND_SOC_DAPM_MIXER("Speaker Mixer", RT5610_PWR_MANAG_ADD2,3,0,
+	&rt5610_speaker_mixer_controls[0],
+	ARRAY_SIZE(rt5610_speaker_mixer_controls)),	
+SND_SOC_DAPM_MIXER("Left Record Mixer", RT5610_PWR_MANAG_ADD2,1,0,
+	&rt5610_captureL_mixer_controls[0],
+	ARRAY_SIZE(rt5610_captureL_mixer_controls)),	
+SND_SOC_DAPM_MIXER("Right Record Mixer", RT5610_PWR_MANAG_ADD2,0,0,
+	&rt5610_captureR_mixer_controls[0],
+	ARRAY_SIZE(rt5610_captureR_mixer_controls)),				
+SND_SOC_DAPM_DAC("Left DAC", "Left HiFi Playback", RT5610_PWR_MANAG_ADD2,9, 0),
+SND_SOC_DAPM_DAC("Right DAC", "Right HiFi Playback", RT5610_PWR_MANAG_ADD2, 8, 0),
+/*rory add 090706*/
+SND_SOC_DAPM_DAC("Voice DAC", "Voice Playback", RT5610_PWR_MANAG_ADD2, 10, 0),
+/*rory end*/
+SND_SOC_DAPM_MIXER("IIS Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
+SND_SOC_DAPM_MIXER("HP Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
+/*rory add 090706*/
+SND_SOC_DAPM_MIXER("Line Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
+/*rory end*/
+SND_SOC_DAPM_ADC("Left ADC", "Left HiFi Capture", RT5610_PWR_MANAG_ADD2, 7, 0),
+SND_SOC_DAPM_ADC("Right ADC", "Right HiFi Capture", RT5610_PWR_MANAG_ADD2, 6, 0),
+SND_SOC_DAPM_PGA("Left Headphone", RT5610_PWR_MANAG_ADD3, 11, 0, NULL, 0),
+SND_SOC_DAPM_PGA("Right Headphone", RT5610_PWR_MANAG_ADD3, 10, 0, NULL, 0),
+SND_SOC_DAPM_PGA("Left Speaker", RT5610_PWR_MANAG_ADD3, 9, 0, NULL, 0),
+SND_SOC_DAPM_PGA("Right Speaker", RT5610_PWR_MANAG_ADD3, 8, 0, NULL, 0),
+SND_SOC_DAPM_PGA("Mono Out", RT5610_PWR_MANAG_ADD3, 14, 0, NULL, 0),
+SND_SOC_DAPM_PGA("Left Line In", RT5610_PWR_MANAG_ADD3, 7, 0, NULL, 0),
+SND_SOC_DAPM_PGA("Right Line In", RT5610_PWR_MANAG_ADD3, 6, 0, NULL, 0),
+SND_SOC_DAPM_PGA("Phone In PGA", RT5610_PWR_MANAG_ADD3, 5, 0, NULL, 0),
+SND_SOC_DAPM_PGA("Phone In Mixer", RT5610_PWR_MANAG_ADD3, 4, 0, NULL, 0),
+SND_SOC_DAPM_PGA("Mic 1 PGA", RT5610_PWR_MANAG_ADD3, 3, 0, NULL, 0),
+SND_SOC_DAPM_PGA("Mic 2 PGA", RT5610_PWR_MANAG_ADD3, 2, 0, NULL, 0),
+SND_SOC_DAPM_PGA("Mic 1 Pre Amp", RT5610_PWR_MANAG_ADD3, 1, 0, NULL, 0),
+SND_SOC_DAPM_PGA("Mic 2 Pre Amp", RT5610_PWR_MANAG_ADD3, 0, 0, NULL, 0),
+SND_SOC_DAPM_PGA("HP Amp", RT5610_PWR_MANAG_ADD1, 14, 0, NULL, 0),
+SND_SOC_DAPM_PGA("SPKL Amp", RT5610_PWR_MANAG_ADD3, 13, 0, NULL, 0),
+SND_SOC_DAPM_PGA("SPKR Amp", RT5610_PWR_MANAG_ADD3, 12, 0, NULL, 0),
+SND_SOC_DAPM_MICBIAS("Mic Bias1", RT5610_PWR_MANAG_ADD1, 3, 0),
+SND_SOC_DAPM_MICBIAS("Mic Bias2", RT5610_PWR_MANAG_ADD1, 2, 0),
+SND_SOC_DAPM_OUTPUT("MONO"),
+SND_SOC_DAPM_OUTPUT("HPL"),
+SND_SOC_DAPM_OUTPUT("HPR"),
+SND_SOC_DAPM_OUTPUT("SPKL"),
+SND_SOC_DAPM_OUTPUT("SPKR"),
+SND_SOC_DAPM_INPUT("LINEL"),
+SND_SOC_DAPM_INPUT("LINER"),
+SND_SOC_DAPM_INPUT("PHONEIN"),
+SND_SOC_DAPM_INPUT("MIC1"),
+SND_SOC_DAPM_INPUT("MIC2"),
+SND_SOC_DAPM_INPUT("PCMIN"),
+SND_SOC_DAPM_VMID("VMID"),
+};
+
+static const struct snd_soc_dapm_route audio_map[] = {
+	/* left HP mixer */
+	{"Left HP Mixer"	,	"LineIn Playback Switch"		,	"Left Line In"},
+	{"Left HP Mixer"	,	"PhoneIn Playback Switch"		,	"Phone In PGA"},
+	{"Left HP Mixer"	,	"Mic1 Playback Switch"			,	"Mic 1 PGA"},
+	{"Left HP Mixer"	,	"Mic2 Playback Switch"			,	"Mic 2 PGA"},
+	{"Left HP Mixer"	,	"PCM Playback Switch"			,	"Left DAC"},
+	{"Left HP Mixer"	,	"Voice Playback Switch"			,	"Voice DAC"},
+	{"Left HP Mixer"	,	"RecordL Playback Switch"		,	"Left Record Mixer"},
+	
+	/* right HP mixer */
+	{"Right HP Mixer"	,	"LineIn Playback Switch"		,	"Right Line In"},
+	{"Right HP Mixer"	,	"PhoneIn Playback Switch"		,	"Phone In PGA"},
+	{"Right HP Mixer"	,	"Mic1 Playback Switch"			,	"Mic 1 PGA"},
+	{"Right HP Mixer"	,	"Mic2 Playback Switch"			,	"Mic 2 PGA"},
+	{"Right HP Mixer"	,	"PCM Playback Switch"			,	"Right DAC"},
+	{"Right HP Mixer"	,	"Voice Playback Switch"			,	"Voice DAC"},
+	{"Right HP Mixer"	,	"RecordR Playback Switch"		,	"Right Record Mixer"},
+	
+	/* virtual mixer - mixes left & right channels for spk and mono */
+	{"IIS Mixer"		,	NULL						,	"Left DAC"},
+	{"IIS Mixer"		,	NULL						,	"Right DAC"},
+	{"Line Mixer"		,	NULL						,	"Right Line In"},
+	{"Line Mixer"		,	NULL						,	"Left Line In"},
+	{"HP Mixer"		,	NULL						,	"Left HP Mixer"},
+	{"HP Mixer"		,	NULL						,	"Right HP Mixer"},
+	
+	/* speaker mixer */
+	{"Speaker Mixer"	,	"LineIn Playback Switch"		,	"Line Mixer"},
+	{"Speaker Mixer"	,	"PhoneIn Playback Switch"		,	"Phone In PGA"},
+	{"Speaker Mixer"	,	"Mic1 Playback Switch"			,	"Mic 1 PGA"},
+	{"Speaker Mixer"	,	"Mic2 Playback Switch"			,	"Mic 2 PGA"},
+	{"Speaker Mixer"	,	"PCM Playback Switch"			,	"IIS Mixer"},
+	{"Speaker Mixer"	,	"Voice Playback Switch"			,	"Voice DAC"},
+
+	/* mono mixer */
+	{"Mono Mixer"		,	"LineIn Playback Switch"		,	"Line Mixer"},
+	//{"Mono Mixer", "PhoneIn Playback Switch","Phone In PGA"},
+	{"Mono Mixer"		,	"Mic1 Playback Switch"			,	"Mic 1 PGA"},
+	{"Mono Mixer"		,	"Mic2 Playback Switch"			,	"Mic 2 PGA"},
+	{"Mono Mixer"		,	"PCM Playback Switch"			,	"IIS Mixer"},
+	{"Mono Mixer"		,	"Voice Playback Switch"			,	"Voice DAC"},
+	{"Mono Mixer"		,	"RecordL Playback Switch"		,	"Left Record Mixer"},
+	{"Mono Mixer"		,	"RecordR Playback Switch"		,	"Right Record Mixer"},
+	
+	/*Left record mixer */
+	{"Left Record Mixer"	,	"Mic1 Capture Switch"		,	"Mic 1 Pre Amp"},
+	{"Left Record Mixer"	,	"Mic2 Capture Switch"		,	"Mic 2 Pre Amp"},
+	{"Left Record Mixer"	, 	"LineInL Capture Switch"	,	"LINEL"},
+	{"Left Record Mixer"	,	"Phone Capture Switch"		,	"Phone In Mixer"},
+	{"Left Record Mixer"	, 	"HPMixerL Capture Switch"	,	"Left HP Mixer"},
+	{"Left Record Mixer"	, 	"SPKMixer Capture Switch"	,	"Speaker Mixer"},
+	{"Left Record Mixer"	, 	"MonoMixer Capture Switch"	,	"Mono Mixer"},
+	
+	/*Right record mixer */
+	{"Right Record Mixer"	, 	"Mic1 Capture Switch"		,	"Mic 1 Pre Amp"},
+	{"Right Record Mixer"	,	 "Mic2 Capture Switch"		,	"Mic 2 Pre Amp"},
+	{"Right Record Mixer"	, 	"LineInR Capture Switch"	,	"LINER"},
+	{"Right Record Mixer"	, 	"Phone Capture Switch"		,	"Phone In Mixer"},
+	{"Right Record Mixer"	, 	"HPMixerR Capture Switch"	,	"Right HP Mixer"},
+	{"Right Record Mixer"	, 	"SPKMixer Capture Switch"	,	"Speaker Mixer"},
+	{"Right Record Mixer"	,	 "MonoMixer Capture Switch"	,	"Mono Mixer"},	
+
+	/* headphone left mux */
+	{"Left Headphone Out Mux"	,	 "HPL mixer"			,	 "Left HP Mixer"},
+
+	/* headphone right mux */
+	{"Right Headphone Out Mux", "HPR mixer", "Right HP Mixer"},
+
+	/* speaker left mux */
+	{"Left Speaker Out Mux", "HPL mixer", "Left HP Mixer"},
+	{"Left Speaker Out Mux", "SPK mixer", "Speaker Mixer"},
+	{"Left Speaker Out Mux", "Mono Mixer", "Mono Mixer"},
+
+	/* speaker right mux */
+	{"Right Speaker Out Mux", "HPR mixer", "Right HP Mixer"},
+	{"Right Speaker Out Mux", "SPK mixer", "Speaker Mixer"},
+	{"Right Speaker Out Mux", "Mono Mixer", "Mono Mixer"},
+
+	/* mono mux */
+	{"Mono Out Mux", "HP mixer", "HP Mixer"},
+	{"Mono Out Mux", "SPK mixer", "Speaker Mixer"},
+	{"Mono Out Mux", "Mono Mixer", "Mono Mixer"},
+	
+	/* output pga */
+	{"HPL", NULL, "HP Amp"},
+	{"HP Amp", NULL, "Left Headphone"},
+	{"Left Headphone", NULL, "Left Headphone Out Mux"},
+	{"HPR", NULL, "HP Amp"},
+	{"HP Amp", NULL, "Right Headphone"},
+	{"Right Headphone", NULL, "Right Headphone Out Mux"},
+	{"SPKL", NULL, "SPKL Amp"},
+	{"SPKL Amp", NULL, "Left Speaker"},
+	{"Left Speaker", NULL, "Left Speaker Out Mux"},
+	{"SPKR", NULL, "SPKR Amp"},
+	{"SPKR Amp", NULL, "Right Speaker"},
+	{"Right Speaker", NULL, "Right Speaker Out Mux"},
+	{"MONO", NULL, "Mono Out"},
+	{"Mono Out", NULL, "Mono Out Mux"},
+
+	/* input pga */
+	{"Left Line In", NULL, "LINEL"},
+	{"Right Line In", NULL, "LINER"},
+	{"Phone In PGA", NULL, "Phone In Mixer"},
+	{"Phone In Mixer", NULL, "PHONEIN"},
+	{"Mic 1 Pre Amp", NULL, "MIC1"},
+	{"Mic 2 Pre Amp", NULL, "MIC2"},	
+	{"Mic 1 PGA", NULL, "Mic 1 Pre Amp"},
+	{"Mic 2 PGA", NULL, "Mic 2 Pre Amp"},
+
+	/* left ADC */
+	{"Left ADC", NULL, "Left Record Mixer"},
+
+	/* right ADC */
+	{"Right ADC", NULL, "Right Record Mixer"},
+	
+};
+
+static int rt5610_add_widgets(struct snd_soc_codec *codec)
+{
+	snd_soc_dapm_new_controls(codec, rt5610_dapm_widgets,
+				ARRAY_SIZE(rt5610_dapm_widgets));
+	snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
+	snd_soc_dapm_new_widgets(codec);
+}
+
+#else
+static int rt5610_pcm_hw_prepare(struct snd_pcm_substream *substream,
+		struct snd_soc_dai *codec_dai)
+{
+	struct snd_soc_codec *codec = codec_dai->codec;
+	int stream = substream->stream;
+	dbg("");
+
+	switch (stream)
+	{
+		case SNDRV_PCM_STREAM_PLAYBACK:
+			rt5610_write_mask(codec, 0x3c, 0x0330, 0x0330);
+			rt5610_write_mask(codec, 0x3e, 0x3f00, 0x3f00);
+			rt5610_write_mask(codec, 0x3a, 0x4000, 0x4000);
+			rt5610_write_mask(codec, 0x02, 0x0000, 0x8080);
+			rt5610_write_mask(codec, 0x04, 0x0000, 0x8080);
+			break;
+		case SNDRV_PCM_STREAM_CAPTURE:
+			rt5610_write_mask(codec, 0x3a, 0x0008, 0x0008);
+			rt5610_write_mask(codec, 0x3c, 0x00c3, 0x00c3);
+			rt5610_write_mask(codec, 0x3e, 0x0002, 0x0002);
+			break;
+	}
+
+	return 0;
+}
+
+static int rt5610_vpcm_hw_prepare(struct snd_pcm_substream *substream, 
+		struct snd_soc_dai *codec_dai)
+{
+	struct snd_soc_codec *codec = codec_dai->codec;
+	int stream = substream->stream;
+	dbg("");
+
+	switch (stream)
+	{
+		case SNDRV_PCM_STREAM_PLAYBACK:
+			rt5610_write_mask(codec, 0x3c, 0x0430, 0x0430);
+			rt5610_write_mask(codec, 0x3e, 0x3f00, 0x3f00);
+			rt5610_write_mask(codec, 0x3a, 0x4000, 0x4000);
+			rt5610_write_mask(codec, 0x02, 0x0000, 0x8080);
+			rt5610_write_mask(codec, 0x04, 0x0000, 0x8080);
+			break;
+		case SNDRV_PCM_STREAM_CAPTURE:
+			rt5610_write_mask(codec, 0x3a, 0x0008, 0x0008);
+			rt5610_write_mask(codec, 0x3c, 0x0041, 0x0041);
+			rt5610_write_mask(codec, 0x3e, 0x3f00, 0x3f00);
+			break;
+	}
+
+	return 0;
+}
+#endif
+/* PLL divisors */
+struct _pll_div {
+	u32 pll_in;
+	u32 pll_out;
+	u16 regvalue;
+};
+
+static const struct _pll_div codec_pll_div[] = {
+	
+	{  2048000,  8192000,	0x0ea0},		
+	{  3686400,  8192000,	0x4e27},	
+	{ 12000000,  8192000,	0x456b},   
+	{ 13000000,  8192000,	0x495f},
+	{ 13100000,	 8192000,	0x0320},	
+	{  2048000,  11289600,	0xf637},
+	{  3686400,  11289600,	0x2f22},	
+	{ 12000000,  11289600,	0x3e2f},   
+	{ 13000000,  11289600,	0x4d5b},
+	{ 13100000,	 11289600,	0x363b},	
+	{  2048000,  16384000,	0x1ea0},
+	{  3686400,  16384000,	0x9e27},	
+	{ 12000000,  16384000,	0x452b},   
+	{ 13000000,  16384000,	0x542f},
+	{ 13100000,	 16384000,	0x03a0},	
+	{  2048000,  16934400,	0xe625},
+	{  3686400,  16934400,	0x9126},	
+	{ 12000000,  16934400,	0x4d2c},   
+	{ 13000000,  16934400,	0x742f},
+	{ 13100000,	 16934400,	0x3c27},			
+	{  2048000,  22579200,	0x2aa0},
+	{  3686400,  22579200,	0x2f20},	
+	{ 12000000,  22579200,	0x7e2f},   
+	{ 13000000,  22579200,	0x742f},
+	{ 13100000,	 22579200,	0x3c27},		
+	{  2048000,  24576000,	0x2ea0},
+	{  3686400,  24576000,	0xee27},	
+	{ 12000000,  24576000,	0x2915},   
+	{ 13000000,  24576000,	0x772e},
+	{ 13100000,	 24576000,	0x0d20},	
+};
+
+
+static int rt5610_set_pll(struct snd_soc_codec *codec, 
+		int pll_id, unsigned int freq_in, unsigned int freq_out)
+{
+	int ret = -EINVAL;
+	int i;
+	
+	if (pll_id != RT5610_PLL_FR_MCLK)
+		return -EINVAL;
+
+	//rt5610_write_mask(codec,RT5610_PWR_MANAG_ADD2, 0x0000,0x1000);	//disable PLL power	
+	
+	if (!freq_in || !freq_out) {
+
+		return 0;
+	}		
+
+	for (i = 0; i < ARRAY_SIZE(codec_pll_div); i++) {
+			
+		if (codec_pll_div[i].pll_in == freq_in && codec_pll_div[i].pll_out == freq_out)
+			{
+				
+				rt5610_write_mask(codec, RT5610_GEN_CTRL_REG2, 0x0000, 0x4000);			 	
+			 	rt5610_write(codec,RT5610_PLL_CTRL,codec_pll_div[i].regvalue);//set PLL parameter 	
+			 	rt5610_write_mask(codec,RT5610_PWR_MANAG_ADD2, 0x1000,0x1000);	//enable PLL power	
+				ret = 0;
+			}
+	}
+	return ret;
+}
+static int rt5610_set_dai_pll(struct snd_soc_dai *codec_dai,
+		int pll_id, unsigned int freq_in, unsigned int freq_out)
+{
+	int ret = -EINVAL;
+	struct snd_soc_codec *codec = codec_dai->codec;
+	struct rt5610_priv *rt5610 = codec->private_data;
+	dbg("");
+
+	ret = rt5610_set_pll(codec, pll_id, freq_in, freq_out);
+	if (ret < 0) {
+		err( "pll unmatched\n");
+		return ret;
+	}
+	
+	rt5610_write_mask(codec,RT5610_GEN_CTRL_REG1,0x8000,0x8000);//Codec sys-clock from PLL 
+
+	rt5610->pll_id = pll_id;
+	rt5610->pll_in = freq_in;
+	rt5610->pll_out = freq_out;
+
+	/* wait 10ms AC97 link frames for the link to stabilise */
+	schedule_timeout_interruptible(msecs_to_jiffies(10));
+	
+	return ret;
+}
+
+static int rt5610_vpcm_set_dai_pll(struct snd_soc_dai *codec_dai,
+		int pll_id, unsigned int freq_in, unsigned int freq_out)
+{
+
+	int ret = -EINVAL;
+	struct snd_soc_codec *codec = codec_dai->codec;
+	struct rt5610_priv *rt5610 = codec->private_data;
+	dbg("");
+
+	ret = rt5610_set_pll(codec, pll_id, freq_in, freq_out);
+	if (ret < 0){
+		err("pll unmatched\n");
+		return ret;
+	}
+	
+	rt5610_write_mask(codec, RT5610_VOICE_DAC_PCMCLK_CTRL1, 0x8000, 0xc000);         //voice sysclk from pll
+	rt5610->pll_id = pll_id;
+	rt5610->pll_in = freq_in;
+	rt5610->pll_out = freq_out;
+	return ret;
+}
+
+
+struct _coeff_div {
+	u32 mclk;
+	u32 rate;
+	u16 fs;
+	u16 regvalue1;
+	u16 regvalue2;
+};
+
+
+
+static const struct _coeff_div coeff_div_vpcm[] = {
+	/*8k*/
+	{24576000, 8000, 384*8, 0x2153, 0x4013},
+	/*16k*/
+	{24576000, 16000, 384*4, 0x2123, 0x4013},
+};
+
+
+static int get_coeff_vpcm(int mclk, int rate)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(coeff_div_vpcm); i++) {
+		if ((coeff_div_vpcm[i].rate == rate) && (coeff_div_vpcm[i].mclk == mclk))
+			return i;
+	}
+	return -EINVAL;
+}
+
+
+
+static int rt5610_vpcm_set_dai_sysclk(struct snd_soc_dai *codec_dai,
+		int clk_id, unsigned int freq, int dir)
+{
+	struct snd_soc_codec *codec = codec_dai->codec;
+	struct rt5610_priv *rt5610 = codec->private_data;
+	dbg("");
+
+	rt5610->vpcm_sysclk= freq;
+	return 0;
+}
+
+
+static int rt5610_vpcm_set_dai_fmt(struct snd_soc_dai *codec_dai,
+		unsigned int fmt)
+{
+	struct snd_soc_codec *codec = codec_dai->codec;
+	u16 iface = 0;
+
+	iface |= 0x8000;				/*vopcm interace*/
+	dbg("");
+
+	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK)
+	{
+		case SND_SOC_DAIFMT_CBM_CFM:
+			break;
+		case SND_SOC_DAIFMT_CBS_CFS:
+			iface |= 0x4000;
+			break;
+		default:
+			return -EINVAL;
+			
+	}
+
+	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK)
+	{
+		case SND_SOC_DAIFMT_I2S:
+			break;
+		case SND_SOC_DAIFMT_RIGHT_J:
+			iface |= 0x0001;
+			break;
+		case SND_SOC_DAIFMT_LEFT_J:
+			iface |= 0x0002;
+			break;
+		case SND_SOC_DAIFMT_DSP_A:
+			iface |= 0x0003;
+			break;
+		case SND_SOC_DAIFMT_DSP_B:
+			iface |= 0x0043;
+			break;
+		default:
+			return -EINVAL;
+	}
+
+	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
+		case SND_SOC_DAIFMT_NB_NF:
+			break;
+		case SND_SOC_DAIFMT_IB_NF:
+			iface |= 0x0800;
+			break;
+		default:
+			return -EINVAL;
+	}
+	
+	rt5610_write(codec, RT5610_EXTEND_SDP_CTRL, iface);
+	return 0;
+}
+
+static int rt5610_pcm_hw_params(struct snd_pcm_substream *substream,
+	struct snd_pcm_hw_params *params,
+	struct snd_soc_dai *codec_dai)
+{
+	struct snd_soc_codec *codec = codec_dai->codec;
+	struct rt5610_priv *rt5610 = codec->private_data;
+	struct snd_soc_dapm_widget *w;
+	int stream = substream->stream;
+
+	dbg("");
+	if (stream == SNDRV_PCM_STREAM_CAPTURE) {
+		list_for_each_entry(w, &codec->dapm_widgets, list)
+		{
+			if (!w->sname)
+				continue;
+			if (!strcmp(w->name, "Right ADC"))
+				strcpy(w->sname, "Right HiFi Capture");
+		}
+		rt5610_write_mask(codec, 0x36, 0x0000, 0x0100);
+	}
+
+	rt5610_write_mask(codec, 0x3a, 0x0001, 0x0001);    /*power on  dac ref*/
+	
+	return 0;
+}
+
+
+static int rt5610_vpcm_hw_params(struct snd_pcm_substream *substream,
+	struct snd_pcm_hw_params *params,
+	struct snd_soc_dai *codec_dai)
+{
+	struct snd_soc_codec *codec = codec_dai->codec;
+	struct rt5610_priv *rt5610 = codec->private_data;
+	struct snd_soc_dapm_widget *w;
+	int stream = substream->stream;
+	u16 iface = rt5610_read(codec, RT5610_EXTEND_SDP_CTRL) & 0xfff3;
+	int coeff = get_coeff_vpcm(rt5610->vpcm_sysclk, params_rate(params));
+	
+	dbg("");
+
+	if (stream == SNDRV_PCM_STREAM_CAPTURE) {
+		list_for_each_entry(w, &codec->dapm_widgets, list)
+		{
+			if (!w->sname)
+				continue;
+			if (!strcmp(w->name, "Right ADC"))
+				strcpy(w->sname, "Right Voice Capture");
+		}
+		rt5610_write_mask(codec, 0x36, 0x0100, 0x0100);	
+	}
+	
+	iface |= 0x8000;
+	switch (params_format(params)) {
+		case SNDRV_PCM_FORMAT_S16_LE:
+			iface |= 0x0000;
+			break;
+		case SNDRV_PCM_FORMAT_S20_3LE:
+			iface |= 0x0004;
+			break;
+		case SNDRV_PCM_FORMAT_S24_LE:
+			iface |= 0x0008;
+			break;
+		case SNDRV_PCM_FORMAT_S32_LE:
+			iface |= 0x000c;
+			break;
+	}
+
+	rt5610_write(codec, RT5610_EXTEND_SDP_CTRL, iface);
+	rt5610_write_mask(codec, 0x3a, 0x0801, 0x0801);    /*power on i2s and dac ref*/
+	if (coeff >=0)
+	{
+		rt5610_write_mask(codec, RT5610_VOICE_DAC_PCMCLK_CTRL1, coeff_div_vpcm[coeff].regvalue1, 0x3fff);
+		rt5610_write(codec, RT5610_VOICE_DAC_PCMCLK_CTRL2, coeff_div_vpcm[coeff].regvalue2);
+	}
+	else
+	{
+		err("cant find matched sysclk and rate config\n");
+		return -EINVAL;
+	}
+	return 0;	
+}
+
+static int rt5610_pcm_shutdown(struct snd_pcm_substream *substream,
+		struct snd_soc_dai *codec_dai)
+{
+	struct snd_soc_codec *codec = codec_dai->codec;
+	dbg("");
+
+	#if !USE_DAPM_CONTROL
+	rt5610_write_mask(codec, 0x02, 0x8080, 0x8080);
+	rt5610_write_mask(codec, 0x04, 0x8080, 0x8080);
+	rt5610_write_mask(codec, 0x08, 0x0080, 0x0080);
+	rt5610_write(codec, 0x3a, 0x0002);
+	rt5610_write(codec, 0x3c, 0x2000);
+	rt5610_write(codec, 0x3e, 0x0000);		
+	#endif
+
+	return 0;
+}
+
+static int rt5610_vpcm_shutdown(struct snd_pcm_substream *substream, 
+		struct snd_soc_dai *codec_dai)
+{
+	struct snd_soc_codec *codec = codec_dai->codec;
+	dbg("");
+
+	rt5610_write(codec, 0x2e, 0x0000);
+#if !USE_DAPM_CONTROL
+	rt5610_write_mask(codec, 0x02, 0x8080, 0x8080);
+	rt5610_write_mask(codec, 0x04, 0x8080, 0x8080);
+	rt5610_write_mask(codec, 0x08, 0x0080, 0x0080);
+	rt5610_write(codec, 0x3a, 0x0002);
+	rt5610_write(codec, 0x3c, 0x2000);
+	rt5610_write(codec, 0x3e, 0x0000);		
+#endif
+	return 0;
+}
+#if !USE_DAPM_CONTROL
+static int rt5610_set_bias_level(struct snd_soc_codec *codec, 
+			enum snd_soc_bias_level level)
+{
+	switch (level) {
+		case SND_SOC_BIAS_ON:
+			rt5610_write_mask(codec, 0x50, GPIO_3, GPIO_3); //enable sticky
+			rt5610_write_mask(codec, 0x52, GPIO_3, GPIO_3); //set as wake up	
+		case SND_SOC_BIAS_PREPARE:
+			break;
+		case SND_SOC_BIAS_STANDBY:
+		case SND_SOC_BIAS_OFF:
+			rt5610_write_mask(codec, 0x02, 0x8080, 0x8080);
+			rt5610_write_mask(codec, 0x04, 0x8080, 0x8080);
+			rt5610_write_mask(codec, 0x08, 0x0080, 0x0080);
+			rt5610_write(codec, 0x3a, 0x0002);
+			rt5610_write(codec, 0x3c, 0x2000);
+			rt5610_write(codec, 0x3e, 0x0000);			
+			break;		
+	}
+	codec->bias_level = level;
+	return 0;
+}
+#else
+static int rt5610_set_bias_level(struct snd_soc_codec *codec, 
+			enum snd_soc_bias_level level)
+{
+	switch (level) {
+		case SND_SOC_BIAS_ON:
+		case SND_SOC_BIAS_PREPARE:
+			break;
+		case SND_SOC_BIAS_STANDBY:
+		case SND_SOC_BIAS_OFF:
+			rt5610_write_mask(codec, 0x3a, 0x0000, 0x0801);
+			rt5610_write_mask(codec,RT5610_PWR_MANAG_ADD2, 0x0000,0x1000);	//disable PLL power
+			break;		
+	}
+	codec->bias_level = level;
+	return 0;
+}
+#endif
+
+
+#define RT5610_HIFI_RATES SNDRV_PCM_RATE_48000
+#define RT5610_VOICE_RATES (SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_8000)
+
+
+#define RT5610_HIFI_FORMATS (SNDRV_PCM_FMTBIT_S16_LE)
+#define RT5610_VOICE_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
+	SNDRV_PCM_FMTBIT_S24_LE)
+
+static struct snd_soc_dai_ops rt5610_hifi_ops = {
+	.hw_params = rt5610_pcm_hw_params,
+	.set_pll = rt5610_set_dai_pll,
+	.shutdown = rt5610_pcm_shutdown,
+#if !USE_DAPM_CONTROL 
+	.prepare = rt5610_pcm_hw_prepare,
+#endif
+};
+
+static struct snd_soc_dai_ops rt5610_pcm_ops = {
+	.hw_params = rt5610_vpcm_hw_params,
+	.set_fmt = rt5610_vpcm_set_dai_fmt, 
+	.set_sysclk = rt5610_vpcm_set_dai_sysclk,
+	.set_pll = rt5610_vpcm_set_dai_pll,
+	.shutdown = rt5610_vpcm_shutdown,
+#if !USE_DAPM_CONTROL 
+	.prepare = rt5610_vpcm_hw_prepare,
+#endif
+};
+struct snd_soc_dai rt5610_dai[2] = { 
+	
+	{
+		.name = "RT5610 HiFi",
+		.playback = {
+			.stream_name = "HiFi Playback",
+			.channels_min = 1,
+			.channels_max = 2,
+			.rates = RT5610_HIFI_RATES,
+			.formats = RT5610_HIFI_FORMATS,},
+		.capture = {
+			.stream_name = "HiFi Capture",
+			.channels_min = 1,
+			.channels_max = 2,
+			.rates = RT5610_HIFI_RATES,
+			.formats = RT5610_HIFI_FORMATS,},
+		.ops = &rt5610_hifi_ops,
+	},
+
+	{
+		.name = "RT5610 Voice",		
+		.playback = {
+			.stream_name = "Voice Playback",
+			.channels_min = 1,
+			.channels_max =2,
+			.rates = RT5610_VOICE_RATES,
+			.formats = RT5610_VOICE_FORMATS
+		},
+		.capture = {
+			.stream_name = "Voice Capture",
+			.channels_min = 1,
+			.channels_max = 2,
+			.rates = RT5610_VOICE_RATES,
+			.formats = RT5610_VOICE_FORMATS,
+		},
+		.ops = &rt5610_pcm_ops,
+	},	
+};
+
+
+EXPORT_SYMBOL_GPL(rt5610_dai);
+
+//Power On SPK Amplifeir, this is just for Avenger-Dove-RT5630 Amplifier control.
+//The Apm enable pin is connected to ALC5610-GPIO1 because of no enough DOVE GPIO numbers can be used.
+//Remove the code if the board is not Avenger-Dove
+int spk_amplifier_enable(bool enable)
+{
+	dbg("enable=%d\n",enable);
+
+	rt5610_write_mask(codec, 0x4c, 0x0000, 0x0002); //Config GPIO1 as output
+
+	if (enable && !hs_det)
+		 rt5610_write_mask(codec, 0x5c, 0x0002, 0x0002); //ON
+	else
+		 rt5610_write_mask(codec, 0x5c, 0x0000, 0x0002); //OFF
+	spk_enable=enable;
+	return 0;
+
+}
+EXPORT_SYMBOL_GPL(spk_amplifier_enable);
+
+static int rt5610_suspend(struct platform_device *pdev, pm_message_t state)
+{
+	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
+	struct snd_soc_codec *codec = socdev->card->codec;
+
+	rt5610_codec_resumed=0;
+
+	/* we only need to suspend if we are a valid card */
+	if(!codec->card)
+		return 0;
+		
+	rt5610_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
+	return 0;
+}
+static int rt5610_resume(struct platform_device *pdev)
+{
+	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
+	struct snd_soc_codec *codec = socdev->card->codec;
+	struct rt5610_priv *rt5610 = codec->private_data;
+	int ret, i;
+	u16 *cache = codec->reg_cache;
+
+	rt5610_reset(codec, 0);
+	ret = rt5610_reset(codec, 1);
+	if (ret < 0) {
+		err("could not reset AC97 codec\n");
+		return ret;
+	}
+
+	rt5610_write(codec, RT5610_PD_CTRL_STAT, 0); 
+	rt5610_set_bias_level(codec, SND_SOC_BIAS_STANDBY);\
+		
+	/* do we need to re-start the PLL ? */
+	if (rt5610->pll_out)
+		rt5610_set_pll(codec, rt5610->pll_id, rt5610->pll_in, rt5610->pll_out);
+
+	/*only synchronise the codec if warm reset failed*/
+	if (ret == 0) {
+		for (i = 2; i < ARRAY_SIZE(rt5610_reg) << 1; i += 2) {
+			if (i > 0x66)
+				break;
+			soc_ac97_ops.write(codec->ac97, i, cache[i >> 1]);
+		}		
+	}
+
+	if (codec->suspend_bias_level == SND_SOC_BIAS_ON)
+		rt5610_set_bias_level(codec, SND_SOC_BIAS_ON);
+	rt5610_codec_resumed=1;
+	return ret;
+	
+}
+
+
+/*
+ * initialise the RT5610 driver
+ * register the mixer and dsp interfaces with the kernel
+ */
+static void rt5610_hsdet_irq_worker(struct work_struct *work)
+{
+	
+	u16 status, pol;
+	dbg("rt5610_hsdet_irq_worker\n");
+	
+	status=rt5610_read(codec, 0x54);
+	pol=rt5610_read(codec, 0x4e);
+
+	dbg("GPIO3(pol,status)=%x,%x\n",(pol & GPIO_3)>>3,(status & GPIO_3)>>3);
+
+	if (!(GPIO_3 & status))
+	{
+		dbg("AC97 codec IRQ: Not Headset, quit.");
+		enable_irq(hs_irq);
+
+		return ;
+	}
+
+	if (GPIO_3 & pol) //current state: phone jack-in
+	{
+		dbg("phone jack-in\n");
+		hs_det=1;
+		rt5610_write_mask(codec, 0x4e, 0, GPIO_3); //Low active, to detect phone jack-in
+		if (spk_enable)
+			rt5610_write_mask(codec, 0x5c, 0, 0x0002); //SPK CLASS D AMP OFF
+
+	}
+	else //current state: phone jack-out
+	{
+		dbg("phone jack-out\n");
+		hs_det=0;
+		rt5610_write_mask(codec, 0x4e, GPIO_3, GPIO_3); //High active, , to detect phone jack-out
+		if (spk_enable)
+			rt5610_write_mask(codec, 0x5c, 0x0002, 0x0002); //SPK CLASS D AMP ON
+	}
+	rt5610_write_mask(codec, 0x54, 0, GPIO_2|GPIO_3); //clear status
+
+	enable_irq(hs_irq);
+
+
+}
+
+static irqreturn_t  rt5610_hsdet_int(int irq, void *dev_id)
+{
+	dbg("enter rt5610_hsdet_int handle.\n");
+
+	if (!work_pending(&hsdet_event_work)) {
+		disable_irq_nosync(hs_irq);
+		queue_work(hsdet_workq, &hsdet_event_work);
+	}
+	return IRQ_HANDLED;
+}
+
+static int rt5610_probe(struct platform_device *pdev)
+{
+	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
+	int ret;
+
+	codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
+	if (codec == NULL)
+		return -ENOMEM;
+	mutex_init(&codec->mutex);
+	socdev->card->codec = codec;
+	codec->reg_cache = kmemdup(rt5610_reg, sizeof(rt5610_reg), GFP_KERNEL);
+	if (codec->reg_cache == NULL) {
+		ret = -ENOMEM;
+		goto cache_err;
+	}
+	codec->reg_cache_size = sizeof(rt5610_reg);
+	codec->reg_cache_step = 2;
+
+	codec->private_data = kzalloc(sizeof(struct rt5610_priv), GFP_KERNEL);
+	if (codec->private_data == NULL) {
+		ret = -ENOMEM;
+		goto priv_err;
+	}
+
+	codec->name = "RT5610";
+	codec->owner = THIS_MODULE;
+	codec->dai = rt5610_dai;
+	codec->num_dai = ARRAY_SIZE(rt5610_dai);
+	codec->read = rt5610_read;
+	codec->write = rt5610_write;
+	codec->set_bias_level = rt5610_set_bias_level;
+	INIT_LIST_HEAD(&codec->dapm_widgets);
+	INIT_LIST_HEAD(&codec->dapm_paths);
+
+	ret = snd_soc_new_ac97_codec(codec, &soc_ac97_ops, 0);
+	if (ret < 0)
+		goto codec_err;
+
+	ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
+	if (ret < 0)
+		goto pcm_err;
+
+#ifndef TOUCHSCREEN_RT5611
+	// Suppose ALC5611 has been RESET in TSC Driver Init
+	// It does not RESET again.
+	rt5610_reset(codec, 0);
+	ret = rt5610_reset(codec, 1);
+	if (ret < 0) {
+		err("FAIL to reset rt5610\n");
+		goto reset_err;
+	}
+#endif
+
+	rt5610_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
+	rt5610_write(codec, 0x26, 0x0000);
+	rt5610_write(codec, 0x3a, 0x0002);            //main bias
+	rt5610_write(codec, 0x3c, 0x2000);            //vref
+	rt5610_reg_init(codec);
+
+	rt5610_add_controls(codec);
+	#if USE_DAPM_CONTROL
+	rt5610_add_widgets(codec);
+	#endif
+	ret = snd_soc_init_card(socdev);
+	if (ret < 0)
+		goto reset_err;
+//HSDET INT{	
+	rt5610_write_mask(codec, 0x54, 0, GPIO_3); //clear status	
+	rt5610_write_mask(codec, 0x4e, GPIO_3, GPIO_3); //High active, for headset_det
+	rt5610_write_mask(codec, 0x4c, GPIO_3, GPIO_3); // GPIO3 as input
+	rt5610_write_mask(codec, 0x50, GPIO_3, GPIO_3); //enable sticky
+	
+	hsdet_workq = create_singlethread_workqueue("rt5610_snd");
+	if (hsdet_workq == NULL) {
+		err("Failed to create workqueue\n");
+		return -1;
+	}
+	INIT_WORK(&hsdet_event_work, rt5610_hsdet_irq_worker);
+	
+	hs_irq=platform_get_irq(pdev,0);
+	dbg(KERN_ERR "rt5610 irq=0x%x\n",hs_irq);
+	if (request_irq(hs_irq, rt5610_hsdet_int, IRQF_SHARED,
+		"rt5610_hsdet", socdev))	{
+		err("Failed to register rt5610_headset_det interrupt");
+		return -1;
+	}
+//}HSDET INT	
+	dbg("rt5610: initial ok\n");
+	return 0;
+	
+reset_err:
+	snd_soc_free_pcms(socdev);
+	
+pcm_err:
+	snd_soc_free_ac97_codec(codec);
+	
+codec_err:
+	kfree(codec->private_data);
+	
+priv_err:
+	kfree(codec->reg_cache);
+	
+cache_err:
+	kfree(socdev->card->codec);
+	socdev->card->codec = NULL;
+	return ret;
+}
+
+static int rt5610_remove(struct platform_device *pdev)
+{
+	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
+	struct snd_soc_codec *codec = socdev->card->codec;
+
+	if (codec == NULL)
+		return 0;
+	
+	snd_soc_free_pcms(socdev);
+	snd_soc_dapm_free(socdev);
+	snd_soc_free_ac97_codec(codec);
+	kfree(codec->private_data);
+	kfree(codec->reg_cache);
+	kfree(codec);
+	return 0;
+}
+
+struct snd_soc_codec_device soc_codec_dev_rt5610 = {
+	.probe = 	rt5610_probe,
+	.remove = 	rt5610_remove,
+	.suspend = 	rt5610_suspend,
+	.resume =	rt5610_resume,
+};
+
+EXPORT_SYMBOL_GPL(soc_codec_dev_rt5610);
+
+static int __devinit rt5610_dev_probe(struct platform_device *pdev)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(rt5610_dai); i++)
+		rt5610_dai[i].dev = &pdev->dev;
+
+	return snd_soc_register_dais(rt5610_dai, ARRAY_SIZE(rt5610_dai));
+}
+
+static int __devexit rt5610_dev_remove(struct platform_device *pdev)
+{
+	snd_soc_unregister_dais(rt5610_dai, ARRAY_SIZE(rt5610_dai));
+
+	return 0;
+}
+
+static struct platform_driver rt5610_driver = {
+	.probe		= rt5610_dev_probe,
+	.remove		= __devexit_p(rt5610_dev_remove),
+	.driver		= {
+		.name	= "rt5610-codec",
+		.owner	= THIS_MODULE,
+	},
+};
+
+static int __init rt5610_modinit(void)
+{
+	return platform_driver_register(&rt5610_driver);
+}
+
+static void __exit rt5610_exit(void)
+{
+	platform_driver_unregister(&rt5610_driver);
+}
+
+module_init(rt5610_modinit);
+module_exit(rt5610_exit);
+MODULE_LICENSE("GPL");
+
--- linux-mvl-dove-2.6.32.orig/sound/soc/codecs/wm_hubs.c
+++ linux-mvl-dove-2.6.32/sound/soc/codecs/wm_hubs.c
@@ -593,12 +593,12 @@
 
 	{ "SPKL", "Input Switch", "MIXINL" },
 	{ "SPKL", "IN1LP Switch", "IN1LP" },
-	{ "SPKL", "Output Switch", "Left Output Mixer" },
+	{ "SPKL", "Output Switch", "Left Output PGA" },
 	{ "SPKL", NULL, "TOCLK" },
 
 	{ "SPKR", "Input Switch", "MIXINR" },
 	{ "SPKR", "IN1RP Switch", "IN1RP" },
-	{ "SPKR", "Output Switch", "Right Output Mixer" },
+	{ "SPKR", "Output Switch", "Right Output PGA" },
 	{ "SPKR", NULL, "TOCLK" },
 
 	{ "SPKL Boost", "Direct Voice Switch", "Direct Voice" },
@@ -620,8 +620,8 @@
 	{ "SPKOUTRP", NULL, "SPKR Driver" },
 	{ "SPKOUTRN", NULL, "SPKR Driver" },
 
-	{ "Left Headphone Mux", "Mixer", "Left Output Mixer" },
-	{ "Right Headphone Mux", "Mixer", "Right Output Mixer" },
+	{ "Left Headphone Mux", "Mixer", "Left Output PGA" },
+	{ "Right Headphone Mux", "Mixer", "Right Output PGA" },
 
 	{ "Headphone PGA", NULL, "Left Headphone Mux" },
 	{ "Headphone PGA", NULL, "Right Headphone Mux" },
@@ -639,17 +639,17 @@
 static const struct snd_soc_dapm_route lineout1_diff_routes[] = {
 	{ "LINEOUT1 Mixer", "IN1L Switch", "IN1L PGA" },
 	{ "LINEOUT1 Mixer", "IN1R Switch", "IN1R PGA" },
-	{ "LINEOUT1 Mixer", "Output Switch", "Left Output Mixer" },
+	{ "LINEOUT1 Mixer", "Output Switch", "Left Output PGA" },
 
 	{ "LINEOUT1N Driver", NULL, "LINEOUT1 Mixer" },
 	{ "LINEOUT1P Driver", NULL, "LINEOUT1 Mixer" },
 };
 
 static const struct snd_soc_dapm_route lineout1_se_routes[] = {
-	{ "LINEOUT1N Mixer", "Left Output Switch", "Left Output Mixer" },
-	{ "LINEOUT1N Mixer", "Right Output Switch", "Left Output Mixer" },
+	{ "LINEOUT1N Mixer", "Left Output Switch", "Left Output PGA" },
+	{ "LINEOUT1N Mixer", "Right Output Switch", "Right Output PGA" },
 
-	{ "LINEOUT1P Mixer", "Left Output Switch", "Left Output Mixer" },
+	{ "LINEOUT1P Mixer", "Left Output Switch", "Left Output PGA" },
 
 	{ "LINEOUT1N Driver", NULL, "LINEOUT1N Mixer" },
 	{ "LINEOUT1P Driver", NULL, "LINEOUT1P Mixer" },
@@ -658,17 +658,17 @@
 static const struct snd_soc_dapm_route lineout2_diff_routes[] = {
 	{ "LINEOUT2 Mixer", "IN2L Switch", "IN2L PGA" },
 	{ "LINEOUT2 Mixer", "IN2R Switch", "IN2R PGA" },
-	{ "LINEOUT2 Mixer", "Output Switch", "Right Output Mixer" },
+	{ "LINEOUT2 Mixer", "Output Switch", "Right Output PGA" },
 
 	{ "LINEOUT2N Driver", NULL, "LINEOUT2 Mixer" },
 	{ "LINEOUT2P Driver", NULL, "LINEOUT2 Mixer" },
 };
 
 static const struct snd_soc_dapm_route lineout2_se_routes[] = {
-	{ "LINEOUT2N Mixer", "Left Output Switch", "Left Output Mixer" },
-	{ "LINEOUT2N Mixer", "Right Output Switch", "Left Output Mixer" },
+	{ "LINEOUT2N Mixer", "Left Output Switch", "Left Output PGA" },
+	{ "LINEOUT2N Mixer", "Right Output Switch", "Right Output PGA" },
 
-	{ "LINEOUT2P Mixer", "Right Output Switch", "Right Output Mixer" },
+	{ "LINEOUT2P Mixer", "Right Output Switch", "Right Output PGA" },
 
 	{ "LINEOUT2N Driver", NULL, "LINEOUT2N Mixer" },
 	{ "LINEOUT2P Driver", NULL, "LINEOUT2P Mixer" },
@@ -686,17 +686,21 @@
 	snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_3_4_VOLUME,
 			    WM8993_IN2_VU, WM8993_IN2_VU);
 
+	snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_LEFT,
+			    WM8993_SPKOUT_VU, WM8993_SPKOUT_VU);
 	snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_RIGHT,
 			    WM8993_SPKOUT_VU, WM8993_SPKOUT_VU);
 
 	snd_soc_update_bits(codec, WM8993_LEFT_OUTPUT_VOLUME,
-			    WM8993_HPOUT1L_ZC, WM8993_HPOUT1L_ZC);
+			    WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC,
+			    WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC);
 	snd_soc_update_bits(codec, WM8993_RIGHT_OUTPUT_VOLUME,
 			    WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC,
 			    WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC);
 
 	snd_soc_update_bits(codec, WM8993_LEFT_OPGA_VOLUME,
-			    WM8993_MIXOUTL_ZC, WM8993_MIXOUTL_ZC);
+			    WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU,
+			    WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU);
 	snd_soc_update_bits(codec, WM8993_RIGHT_OPGA_VOLUME,
 			    WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU,
 			    WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU);
--- linux-mvl-dove-2.6.32.orig/sound/soc/codecs/rt5623.c
+++ linux-mvl-dove-2.6.32/sound/soc/codecs/rt5623.c
@@ -0,0 +1,1582 @@
+/*
+ * rt5623.c  --  RT5623 ALSA Soc Audio driver
+ *
+ * Copyright 2008 Realtek Microelectronics
+ *
+ * Author: flove <flove@realtek.com> Ethan <eku@marvell.com>
+ *
+ * Based on WM8753.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/version.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/pm.h>
+#include <linux/i2c.h>
+#include <linux/platform_device.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <sound/soc.h>
+#include <sound/soc-dapm.h>
+#include <sound/initval.h>
+#include <asm/div64.h>
+
+#include "rt5623.h"
+
+#define AUDIO_NAME "rt5623"
+#define RT5623_VERSION "0.01"
+
+
+/*
+ * Debug
+ */
+#ifdef CONFIG_SND_DEBUG
+#define s3cdbg(x...) printk(x)
+#else
+#define s3cdbg(x...)
+#endif
+
+#define RT5623_DEBUG 0
+
+#ifdef RT5623_DEBUG
+#define dbg(format, arg...) \
+	printk(KERN_DEBUG AUDIO_NAME ": " format "\n" , ## arg)
+#else
+#define dbg(format, arg...) do {} while (0)
+#endif
+#define err(format, arg...) \
+	printk(KERN_ERR AUDIO_NAME ": " format "\n" , ## arg)
+#define info(format, arg...) \
+	printk(KERN_INFO AUDIO_NAME ": " format "\n" , ## arg)
+#define warn(format, arg...) \
+	printk(KERN_WARNING AUDIO_NAME ": " format "\n" , ## arg)
+
+static int caps_charge = 2000;
+module_param(caps_charge, int, 0);
+MODULE_PARM_DESC(caps_charge, "RT5623 cap charge time (msecs)");
+
+
+
+/* codec private data */
+struct rt5623_priv {
+	unsigned int sysclk;
+};
+
+
+static struct snd_soc_device *rt5623_socdev;
+
+
+/*
+ * rt5623 register cache
+ * We can't read the RT5623 register space when we
+ * are using 2 wire for device control, so we cache them instead.
+ */
+static const u16 rt5623_reg[0x7E/2];
+
+
+/* virtual HP mixers regs */
+#define HPL_MIXER	0x80
+#define HPR_MIXER	0x82
+
+static u16 reg80=0,reg82=0;
+
+static u16 Set_Codec_Reg_Init[][2]={
+	{RT5623_AUDIO_INTERFACE	,0x8000},// 0x34 set I2S codec to slave mode
+	{RT5623_STEREO_DAC_VOL	,0x0808},// 0x0c default stereo DAC volume to 0db
+	{RT5623_OUTPUT_MIXER_CTRL,0x1740},// 0x1c default output mixer control	
+//	{RT5623_ADC_REC_MIXER	,0x3f3f},// 0x14 set record source is Mic1 by default
+	{RT5623_ADC_REC_MIXER	,0x5f5f},// 0x14 set record source is Mic2 by default
+	{RT5623_MIC_CTRL		,0x0500},// 0x22 set Mic1,Mic2 boost 20db	
+	{RT5623_SPK_OUT_VOL		,0x8080},// 0x02 default speaker volume to 0db 
+	{RT5623_HP_OUT_VOL		,0x8080},// 0x04 default HP volume to 0db
+	{RT5623_ADC_REC_GAIN            ,0xf891},// record gain 9 db
+};
+
+#define SET_CODEC_REG_INIT_NUM	ARRAY_SIZE(Set_Codec_Reg_Init)
+
+/*
+ * read rt5623 register cache
+ */
+static inline unsigned int rt5623_read_reg_cache(struct snd_soc_codec *codec,
+	unsigned int reg)
+{
+	u16 *cache = codec->reg_cache;
+	if (reg < 1 || reg > (ARRAY_SIZE(rt5623_reg) + 1))
+		return -1;
+	return cache[reg/2];
+}
+
+/*
+ * write rt5623 register cache
+ */
+static inline void rt5623_write_reg_cache(struct snd_soc_codec *codec,
+	unsigned int reg, unsigned int value)
+{
+	u16 *cache = codec->reg_cache;
+	if (reg < 0 || reg > 0x7e)
+		return;
+	cache[reg/2] = value;
+}
+
+
+static int rt5623_write(struct snd_soc_codec *codec, unsigned int reg,
+	unsigned int value)
+{
+	u8 data[3];
+
+	if(reg>0x7E)
+	{
+		if(reg==HPL_MIXER)
+			reg80=value;
+		else if(reg==HPR_MIXER)
+			reg82=value;
+		else
+			return -EIO;
+	
+		return 0;	
+	}	
+
+//	printk("rt5623 write reg=%x,value=%x\n",reg,value);
+	data[0] = reg;
+	data[1] = (0xFF00 & value) >> 8;
+	data[2] = 0x00FF & value;
+
+	if (codec->hw_write(codec->control_data, data, 3) == 3)
+	{
+		rt5623_write_reg_cache (codec, reg, value);		
+//		printk("rt5623 write OK\n");
+		return 0;
+	}
+	else
+	{
+//		printk("rt5623 write faile\n");
+		return -EIO;
+	}
+}
+
+static unsigned int rt5623_read(struct snd_soc_codec *codec, unsigned int reg)
+{
+	u8 data[2]={0};
+	unsigned int value=0x0;
+
+	if(reg>0x7E)
+	{
+		if(reg==HPL_MIXER)
+		 return	reg80;
+		else if(reg==HPR_MIXER)
+		 return	reg82;
+		else
+		 return -EIO;
+		 
+		 return -EIO;	
+	}
+
+	data[0] = reg;
+	if(codec->hw_write(codec->control_data, data, 1) ==1)
+	{
+		i2c_master_recv(codec->control_data, data, 2);
+		value = (data[0]<<8) | data[1];		
+//		printk("rt5623 read reg%x=%x\n",reg,value);
+		
+		return value;
+	}
+	else
+	{
+//		printk("rt5623 read faile\n");
+		return -EIO;			
+	}		
+
+}
+
+static int rt5623_write_mask(struct snd_soc_codec *codec, unsigned int reg,unsigned int value,unsigned int mask)
+{
+	
+	unsigned char RetVal=0;
+	unsigned  int CodecData;
+
+	if(!mask)
+		return 0; 
+
+	if(mask!=0xffff)
+	 {
+		CodecData=rt5623_read(codec,reg);		
+		CodecData&=~mask;
+		CodecData|=(value&mask);
+		RetVal=rt5623_write(codec,reg,CodecData);
+	 }		
+	else
+	{
+		RetVal=rt5623_write(codec,reg,value);
+	}
+
+	return RetVal;
+}
+
+#if 0
+//*****************************************************************************
+//
+//function AudioOutEnable:Mute/Unmute audio out channel
+//							WavOutPath:output channel
+//							Mute :Mute/Unmute output channel											
+//
+//*****************************************************************************
+static int rt5623_AudioOutEnable(struct snd_soc_codec *codec,unsigned short int WavOutPath,int Mute)
+{
+	int RetVal=0;	
+
+
+	if(Mute)
+	{
+		switch(WavOutPath)
+		{
+			case RT_WAVOUT_ALL_ON:
+
+				RetVal=rt5623_write_mask(codec,RT5623_SPK_OUT_VOL,RT_L_MUTE|RT_R_MUTE,RT_L_MUTE|RT_R_MUTE);	//Mute Speaker right/left channel
+				RetVal=rt5623_write_mask(codec,RT5623_HP_OUT_VOL,RT_L_MUTE|RT_R_MUTE,RT_L_MUTE|RT_R_MUTE);	//Mute headphone right/left channel
+				RetVal=rt5623_write_mask(codec,RT5623_MONO_AUX_OUT_VOL,RT_L_MUTE|RT_R_MUTE,RT_L_MUTE|RT_R_MUTE);	//Mute Aux/Mono right/left channel
+				RetVal=rt5623_write_mask(codec,RT5623_STEREO_DAC_VOL,RT_M_HP_MIXER|RT_M_SPK_MIXER|RT_M_MONO_MIXER
+															  ,RT_M_HP_MIXER|RT_M_SPK_MIXER|RT_M_MONO_MIXER);	//Mute DAC to HP,Speaker,Mono Mixer
+		
+			break;
+		
+			case RT_WAVOUT_HP:
+
+				RetVal=rt5623_write_mask(codec,RT5623_HP_OUT_VOL,RT_L_MUTE|RT_R_MUTE,RT_L_MUTE|RT_R_MUTE);	//Mute headphone right/left channel
+			
+			break;
+
+			case RT_WAVOUT_SPK:
+				
+				RetVal=rt5623_write_mask(codec,RT5623_SPK_OUT_VOL,RT_L_MUTE|RT_R_MUTE,RT_L_MUTE|RT_R_MUTE);	//Mute Speaker right/left channel			
+
+			break;
+			
+			case RT_WAVOUT_AUXOUT:
+
+				RetVal=rt5623_write_mask(codec,RT5623_MONO_AUX_OUT_VOL,RT_L_MUTE|RT_R_MUTE,RT_L_MUTE|RT_R_MUTE);	//Mute AuxOut right/left channel
+
+			break;
+
+			case RT_WAVOUT_MONO:
+
+				RetVal=rt5623_write_mask(codec,RT5623_MONO_AUX_OUT_VOL,RT_L_MUTE,RT_L_MUTE);	//Mute MonoOut channel		
+
+			break;
+
+			case RT_WAVOUT_DAC:
+
+				RetVal=rt5623_write_mask(codec,RT5623_STEREO_DAC_VOL,RT_M_HP_MIXER|RT_M_SPK_MIXER|RT_M_MONO_MIXER
+															  ,RT_M_HP_MIXER|RT_M_SPK_MIXER|RT_M_MONO_MIXER);	//Mute DAC to HP,Speaker,Mono Mixer				
+			break;
+
+			default:
+
+				return 0;
+
+		}
+	}
+	else
+	{
+		switch(WavOutPath)
+		{
+
+			case RT_WAVOUT_ALL_ON:
+
+				RetVal=rt5623_write_mask(codec,RT5623_SPK_OUT_VOL		,0,RT_L_MUTE|RT_R_MUTE);	//Mute Speaker right/left channel
+				RetVal=rt5623_write_mask(codec,RT5623_HP_OUT_VOL 		,0,RT_L_MUTE|RT_R_MUTE);	//Mute headphone right/left channel
+				RetVal=rt5623_write_mask(codec,RT5623_MONO_AUX_OUT_VOL,0,RT_L_MUTE|RT_R_MUTE);	//Mute Aux/Mono right/left channel
+				RetVal=rt5623_write_mask(codec,RT5623_STEREO_DAC_VOL	,0,RT_M_HP_MIXER|RT_M_SPK_MIXER|RT_M_MONO_MIXER);	//Mute DAC to HP,Speaker,Mono Mixer
+		
+			break;
+		
+			case RT_WAVOUT_HP:
+
+				RetVal=rt5623_write_mask(codec,RT5623_HP_OUT_VOL,0,RT_L_MUTE|RT_R_MUTE);	//UnMute headphone right/left channel	
+					
+			break;
+
+			case RT_WAVOUT_SPK:
+				
+				RetVal=rt5623_write_mask(codec,RT5623_SPK_OUT_VOL,0,RT_L_MUTE|RT_R_MUTE);	//unMute Speaker right/left channel			
+
+			break;
+			
+			case RT_WAVOUT_AUXOUT:
+
+				RetVal=rt5623_write_mask(codec,RT5623_MONO_AUX_OUT_VOL,0,RT_L_MUTE|RT_R_MUTE);//unMute AuxOut right/left channel
+
+			break;
+
+			case RT_WAVOUT_MONO:
+
+				RetVal=rt5623_write_mask(codec,RT5623_MONO_AUX_OUT_VOL,0,RT_L_MUTE);	//unMute MonoOut channel		
+
+			break;
+
+			case RT_WAVOUT_DAC:
+
+				RetVal=rt5623_write_mask(codec,RT5623_STEREO_DAC_VOL,0,RT_M_HP_MIXER|RT_M_SPK_MIXER|RT_M_MONO_MIXER);	//unMute DAC to HP,Speaker,Mono Mixer
+
+			default:
+				return 0;
+		}
+
+	}
+	
+	return RetVal;
+}
+#endif
+//*****************************************************************************
+//
+//function:Enable/Disable ADC input source control
+//
+//*****************************************************************************
+static int Enable_ADC_Input_Source(struct snd_soc_codec *codec,unsigned short int ADC_Input_Sour,int Enable)
+{
+	int bRetVal=0;
+	
+	if(Enable)
+	{
+		//Enable ADC source 
+		bRetVal=rt5623_write_mask(codec,RT5623_ADC_REC_MIXER,0,ADC_Input_Sour);
+	}
+	else
+	{
+		//Disable ADC source		
+		bRetVal=rt5623_write_mask(codec,RT5623_ADC_REC_MIXER,ADC_Input_Sour,ADC_Input_Sour);
+	}
+
+	return bRetVal;
+}
+
+
+#define rt5623_reset(c) rt5623_write(c, 0x0, 0)
+/*
+ * RT5623 Controls
+ */
+
+static const char *rt5623_spk_n_sour_sel[] = {"RN", "RP","LN","Vmid"};
+static const char *rt5623_spkout_input_sel[] = {"Vmid", "HP mixer","Speaker Mixer","Mono Mixer"};
+static const char *rt5623_hpl_out_input_sel[] = {"Vmid", "HP Left mixer"};
+static const char *rt5623_hpr_out_input_sel[] = {"Vmid", "HP Right mixer"};
+static const char *rt5623_mono_aux_out_input_sel[] = {"Vmid", "HP mixer","Speaker Mixer","Mono Mixer"};
+static const char *rt5623_mic_Boost_ctrl_sel[] = {"Bypass", "+20DB","+30DB","+40DB"};
+
+static const struct soc_enum rt5623_enum[] = {
+SOC_ENUM_SINGLE(RT5623_OUTPUT_MIXER_CTRL, 14, 4, rt5623_spk_n_sour_sel),// 0
+SOC_ENUM_SINGLE(RT5623_OUTPUT_MIXER_CTRL, 10, 4, rt5623_spkout_input_sel),// 1
+SOC_ENUM_SINGLE(RT5623_OUTPUT_MIXER_CTRL, 9, 2, rt5623_hpl_out_input_sel),// 2
+SOC_ENUM_SINGLE(RT5623_OUTPUT_MIXER_CTRL, 8, 2, rt5623_hpr_out_input_sel),// 3
+SOC_ENUM_SINGLE(RT5623_OUTPUT_MIXER_CTRL, 6, 4, rt5623_mono_aux_out_input_sel),// 4
+SOC_ENUM_SINGLE(RT5623_MIC_CTRL, 10, 4, rt5623_mic_Boost_ctrl_sel),// 5
+SOC_ENUM_SINGLE(RT5623_MIC_CTRL, 8, 4, rt5623_mic_Boost_ctrl_sel),// 6
+};	
+
+static const struct snd_kcontrol_new rt5623_snd_controls[] = {
+SOC_DOUBLE("Speaker Playback Volume", 	RT5623_SPK_OUT_VOL, 8, 0, 31, 1),	
+SOC_DOUBLE("Speaker Playback Switch", 	RT5623_SPK_OUT_VOL, 15, 7, 1, 1),
+SOC_DOUBLE("Headphone Playback Volume", RT5623_HP_OUT_VOL, 8, 0, 31, 1),
+SOC_DOUBLE("Headphone Playback Switch", RT5623_HP_OUT_VOL,15, 7, 1, 1),
+//SOC_DOUBLE("Auxout Playback Volume", 	RT5623_MONO_AUX_OUT_VOL,8, 0, 31, 1),
+//SOC_DOUBLE("Auxout Playback Switch", 	RT5623_MONO_AUX_OUT_VOL,15, 7, 1, 1),
+SOC_DOUBLE("PCM Playback Volume", 		RT5623_STEREO_DAC_VOL, 8, 0, 31, 1),
+SOC_DOUBLE("PCM Playback Switch", 		RT5623_STEREO_DAC_VOL,15, 7, 1, 1),
+//SOC_DOUBLE("LineIn Capture Volume",		RT5623_LINE_IN_VOL, 8, 0, 31, 1),
+//SOC_DOUBLE("AuxIn Capture Volume",		RT5623_AUXIN_VOL, 8, 0, 31, 1),
+//SOC_SINGLE("Mic1 Capture Volume",		RT5623_MIC_VOL, 8, 31, 1),
+//SOC_SINGLE("Mic2 Capture Volume",		RT5623_MIC_VOL, 0, 31, 1),
+SOC_DOUBLE("Rec Capture Volume",		RT5623_ADC_REC_GAIN, 7, 0, 31, 0),
+//SOC_ENUM("Mic 1 Boost", 				rt5623_enum[5]),
+SOC_ENUM("Mic 2 Boost", 				rt5623_enum[6]),
+
+};
+
+
+/* add non dapm controls */
+static int rt5623_add_controls(struct snd_soc_codec *codec)
+{
+	int err, i;
+
+	for (i = 0; i < ARRAY_SIZE(rt5623_snd_controls); i++) {
+		err = snd_ctl_add(codec->card,
+				snd_soc_cnew(&rt5623_snd_controls[i],codec, NULL));
+		if (err < 0)
+			return err;
+	}
+	return 0;
+}
+
+/*
+ * _DAPM_ Controls
+ */
+
+/* We have to create a fake left and right HP mixers because
+ * the codec only has a single control that is shared by both channels.
+ * This makes it impossible to determine the audio path using the current
+ * register map, thus we add a new (virtual) register to help determine the
+ * audio route within the device.
+ */
+static int mixer_event (struct snd_soc_dapm_widget *w, 
+	struct snd_kcontrol *kcontrol, int event)
+{
+	u16 l=0, r=0, lineIn,mic1,mic2, auxin,pcm;
+	struct snd_soc_device *socdev = rt5623_socdev;
+	struct snd_soc_codec *codec = socdev->card->codec;
+	
+	l = rt5623_read(codec, HPL_MIXER);
+	r = rt5623_read(codec, HPR_MIXER);
+	lineIn = rt5623_read(codec, RT5623_LINE_IN_VOL);
+	mic1 = rt5623_read(codec, RT5623_MIC_ROUTING_CTRL);
+	mic2 = rt5623_read(codec, RT5623_MIC_ROUTING_CTRL);
+	auxin = rt5623_read(codec,RT5623_AUXIN_VOL);
+	pcm = rt5623_read(codec, RT5623_STEREO_DAC_VOL);
+
+	if (event & SND_SOC_DAPM_PRE_REG)
+		return 0;
+
+	if (l & 0x1 || r & 0x1)
+		rt5623_write(codec, RT5623_STEREO_DAC_VOL, pcm & 0x7fff);		
+	else
+		rt5623_write(codec, RT5623_STEREO_DAC_VOL, pcm | 0x8000);
+
+	if (l & 0x2 || r & 0x2)
+		rt5623_write(codec, RT5623_MIC_ROUTING_CTRL, mic2 & 0xf7ff);
+	else
+		rt5623_write(codec, RT5623_MIC_ROUTING_CTRL, mic2 | 0x0800);
+
+	if (l & 0x4 || r & 0x4)
+		rt5623_write(codec, RT5623_MIC_ROUTING_CTRL, mic1 & 0x7fff);
+	else
+		rt5623_write(codec, RT5623_MIC_ROUTING_CTRL, mic1 | 0x8000);
+
+	if (l & 0x8 || r & 0x8)
+		rt5623_write(codec, RT5623_AUXIN_VOL, auxin & 0x7fff);
+	else
+		rt5623_write(codec, RT5623_AUXIN_VOL, auxin | 0x8000);
+
+	if (l & 0x10 || r & 0x10)
+		rt5623_write(codec, RT5623_LINE_IN_VOL, lineIn & 0x7fff);
+	else
+		rt5623_write(codec, RT5623_LINE_IN_VOL, lineIn | 0x8000);
+
+	return 0;
+}
+
+/* Left Headphone Mixers */
+static const struct snd_kcontrol_new rt5623_hpl_mixer_controls[] = {
+SOC_DAPM_SINGLE("LineIn Playback Switch", HPL_MIXER, 4, 1, 0),
+SOC_DAPM_SINGLE("AUXIN Playback Switch", HPL_MIXER, 3, 1, 0),
+SOC_DAPM_SINGLE("Mic1 Playback Switch", HPL_MIXER, 2, 1, 0),
+SOC_DAPM_SINGLE("Mic2 Playback Switch", HPL_MIXER, 1, 1, 0),
+SOC_DAPM_SINGLE("PCM Playback Switch", HPL_MIXER, 0, 1, 0),
+SOC_DAPM_SINGLE("RecordL Playback Switch", RT5623_ADC_REC_GAIN, 15, 1,1),
+};
+
+
+/* Right Headphone Mixers */
+static const struct snd_kcontrol_new rt5623_hpr_mixer_controls[] = {
+SOC_DAPM_SINGLE("LineIn Playback Switch", HPR_MIXER, 5, 1, 0),
+SOC_DAPM_SINGLE("AUXIN Playback Switch", HPR_MIXER, 4, 1, 0),
+SOC_DAPM_SINGLE("Mic1 Playback Switch", HPR_MIXER, 3, 1, 0),
+SOC_DAPM_SINGLE("Mic2 Playback Switch", HPR_MIXER, 2, 1, 0),
+SOC_DAPM_SINGLE("PCM Playback Switch", HPR_MIXER, 1, 1, 0),
+SOC_DAPM_SINGLE("RecordR Playback Switch", RT5623_ADC_REC_GAIN, 14, 1,1),
+};
+
+//Left Record Mixer
+static const struct snd_kcontrol_new rt5623_captureL_mixer_controls[] = {
+SOC_DAPM_SINGLE("Mic1 Capture Switch", RT5623_ADC_REC_MIXER, 14, 1, 1),
+SOC_DAPM_SINGLE("Mic2 Capture Switch", RT5623_ADC_REC_MIXER, 13, 1, 1),
+SOC_DAPM_SINGLE("LineInL Capture Switch",RT5623_ADC_REC_MIXER,12, 1, 1),
+SOC_DAPM_SINGLE("AuxInL Capture Switch", RT5623_ADC_REC_MIXER, 11, 1, 1),
+SOC_DAPM_SINGLE("HPMixerL Capture Switch", RT5623_ADC_REC_MIXER,10, 1, 1),
+SOC_DAPM_SINGLE("SPKMixer Capture Switch",RT5623_ADC_REC_MIXER,9, 1, 1),
+SOC_DAPM_SINGLE("MonoMixer Capture Switch",RT5623_ADC_REC_MIXER,8, 1, 1),
+};
+
+//Right Record Mixer
+static const struct snd_kcontrol_new rt5623_captureR_mixer_controls[] = {
+SOC_DAPM_SINGLE("Mic1 Capture Switch", RT5623_ADC_REC_MIXER, 6, 1, 1),
+SOC_DAPM_SINGLE("Mic2 Capture Switch", RT5623_ADC_REC_MIXER, 5, 1, 1),
+SOC_DAPM_SINGLE("LineInR Capture Switch",RT5623_ADC_REC_MIXER,4, 1, 1),
+SOC_DAPM_SINGLE("AuxInLR Capture Switch", RT5623_ADC_REC_MIXER, 3, 1, 1),
+SOC_DAPM_SINGLE("HPMixerR Capture Switch", RT5623_ADC_REC_MIXER,2, 1, 1),
+SOC_DAPM_SINGLE("SPKMixer Capture Switch",RT5623_ADC_REC_MIXER,1, 1, 1),
+SOC_DAPM_SINGLE("MonoMixer Capture Switch",RT5623_ADC_REC_MIXER,0, 1, 1),
+};
+
+
+/* Speaker Mixer */
+static const struct snd_kcontrol_new rt5623_speaker_mixer_controls[] = {
+SOC_DAPM_SINGLE("LineIn Playback Switch", RT5623_LINE_IN_VOL, 14, 1, 1),
+SOC_DAPM_SINGLE("AuxIn Playback Switch", RT5623_AUXIN_VOL, 14, 1, 1),
+SOC_DAPM_SINGLE("Mic1 Playback Switch", RT5623_MIC_ROUTING_CTRL, 14, 1, 1),
+SOC_DAPM_SINGLE("Mic2 Playback Switch", RT5623_MIC_ROUTING_CTRL, 6, 1, 1),
+SOC_DAPM_SINGLE("PCM Playback Switch", RT5623_STEREO_DAC_VOL, 14, 1, 1),
+};
+
+
+/* Mono Mixer */
+static const struct snd_kcontrol_new rt5623_mono_mixer_controls[] = {
+SOC_DAPM_SINGLE("LineIn Playback Switch", RT5623_LINE_IN_VOL, 13, 1, 1),
+SOC_DAPM_SINGLE("AuxIn Playback Switch", RT5623_AUXIN_VOL, 13, 1, 1),
+SOC_DAPM_SINGLE("Mic1 Playback Switch", RT5623_MIC_ROUTING_CTRL, 13, 1, 1),
+SOC_DAPM_SINGLE("Mic2 Playback Switch", RT5623_MIC_ROUTING_CTRL, 5, 1, 1),
+SOC_DAPM_SINGLE("PCM Playback Switch", RT5623_STEREO_DAC_VOL, 13, 1, 1),
+SOC_DAPM_SINGLE("RecordL Playback Switch", RT5623_ADC_REC_GAIN, 13, 1,1),
+SOC_DAPM_SINGLE("RecordR Playback Switch", RT5623_ADC_REC_GAIN, 12, 1,1),
+};
+
+/* auxout output mux */
+static const struct snd_kcontrol_new rt5623_auxout_mux_controls =
+SOC_DAPM_ENUM("Route", rt5623_enum[4]);
+
+
+/* speaker output mux */
+static const struct snd_kcontrol_new rt5623_spkout_mux_controls =
+SOC_DAPM_ENUM("Route", rt5623_enum[1]);
+
+
+/* headphone left output mux */
+static const struct snd_kcontrol_new rt5623_hpl_out_mux_controls =
+SOC_DAPM_ENUM("Route", rt5623_enum[2]);
+
+
+/* headphone right output mux */
+static const struct snd_kcontrol_new rt5623_hpr_out_mux_controls =
+SOC_DAPM_ENUM("Route", rt5623_enum[3]);
+
+
+static const struct snd_soc_dapm_widget rt5623_dapm_widgets[] = {	
+SND_SOC_DAPM_MUX("Aux Out Mux", SND_SOC_NOPM, 0, 0,
+	&rt5623_auxout_mux_controls),
+SND_SOC_DAPM_MUX("Speaker Out Mux", SND_SOC_NOPM, 0, 0,
+	&rt5623_spkout_mux_controls),
+SND_SOC_DAPM_MUX("Left Headphone Out Mux", SND_SOC_NOPM, 0, 0,
+	&rt5623_hpl_out_mux_controls),
+SND_SOC_DAPM_MUX("Right Headphone Out Mux", SND_SOC_NOPM, 0, 0,
+	&rt5623_hpr_out_mux_controls),
+SND_SOC_DAPM_MIXER_E("Left HP Mixer",RT5623_PWR_MANAG_ADD2, 5, 0,
+	&rt5623_hpl_mixer_controls[0], ARRAY_SIZE(rt5623_hpl_mixer_controls),
+	mixer_event, SND_SOC_DAPM_POST_REG),
+SND_SOC_DAPM_MIXER_E("Right HP Mixer",RT5623_PWR_MANAG_ADD2, 4, 0,
+	&rt5623_hpr_mixer_controls[0], ARRAY_SIZE(rt5623_hpr_mixer_controls),
+	mixer_event, SND_SOC_DAPM_POST_REG),
+SND_SOC_DAPM_MIXER("Mono Mixer", RT5623_PWR_MANAG_ADD2, 2, 0,
+	&rt5623_mono_mixer_controls[0], ARRAY_SIZE(rt5623_mono_mixer_controls)),
+SND_SOC_DAPM_MIXER("Speaker Mixer", RT5623_PWR_MANAG_ADD2,3,0,
+	&rt5623_speaker_mixer_controls[0],
+	ARRAY_SIZE(rt5623_speaker_mixer_controls)),	
+SND_SOC_DAPM_MIXER("Left Record Mixer", RT5623_PWR_MANAG_ADD2,1,0,
+	&rt5623_captureL_mixer_controls[0],
+	ARRAY_SIZE(rt5623_captureL_mixer_controls)),	
+SND_SOC_DAPM_MIXER("Right Record Mixer", RT5623_PWR_MANAG_ADD2,0,0,
+	&rt5623_captureR_mixer_controls[0],
+	ARRAY_SIZE(rt5623_captureR_mixer_controls)),				
+SND_SOC_DAPM_DAC("Left DAC", "Left HiFi Playback", RT5623_PWR_MANAG_ADD2,9, 0),
+SND_SOC_DAPM_DAC("Right DAC", "Right HiFi Playback", RT5623_PWR_MANAG_ADD2, 8, 0),	
+SND_SOC_DAPM_MIXER("IIS Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
+SND_SOC_DAPM_MIXER("HP Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
+SND_SOC_DAPM_MIXER("AuxIn Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
+SND_SOC_DAPM_MIXER("Line Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
+SND_SOC_DAPM_ADC("Left ADC", "Left HiFi Capture", RT5623_PWR_MANAG_ADD2, 7, 0),
+SND_SOC_DAPM_ADC("Right ADC", "Right HiFi Capture", RT5623_PWR_MANAG_ADD2, 6, 0),
+SND_SOC_DAPM_PGA("Left Headphone", RT5623_PWR_MANAG_ADD3, 10, 0, NULL, 0),
+SND_SOC_DAPM_PGA("Right Headphone", RT5623_PWR_MANAG_ADD3, 9, 0, NULL, 0),
+SND_SOC_DAPM_PGA("Speaker Out", RT5623_PWR_MANAG_ADD3, 12, 0, NULL, 0),
+SND_SOC_DAPM_PGA("Left Aux Out", RT5623_PWR_MANAG_ADD3, 14, 0, NULL, 0),
+SND_SOC_DAPM_PGA("Right Aux Out", RT5623_PWR_MANAG_ADD3, 13, 0, NULL, 0),
+SND_SOC_DAPM_PGA("Left Line In", RT5623_PWR_MANAG_ADD3, 7, 0, NULL, 0),
+SND_SOC_DAPM_PGA("Right Line In", RT5623_PWR_MANAG_ADD3, 6, 0, NULL, 0),
+SND_SOC_DAPM_PGA("Left Aux In",RT5623_PWR_MANAG_ADD3, 5, 0, NULL, 0),
+SND_SOC_DAPM_PGA("Right Aux In",RT5623_PWR_MANAG_ADD3, 4, 0, NULL, 0),
+SND_SOC_DAPM_PGA("Mic 1 PGA", RT5623_PWR_MANAG_ADD3, 3, 0, NULL, 0),
+SND_SOC_DAPM_PGA("Mic 2 PGA", RT5623_PWR_MANAG_ADD3, 2, 0, NULL, 0),
+SND_SOC_DAPM_PGA("Mic 1 Pre Amp", RT5623_PWR_MANAG_ADD3, 1, 0, NULL, 0),
+SND_SOC_DAPM_PGA("Mic 2 Pre Amp", RT5623_PWR_MANAG_ADD3, 0, 0, NULL, 0),
+SND_SOC_DAPM_MICBIAS("Mic Bias1", RT5623_PWR_MANAG_ADD1, 11, 0),
+SND_SOC_DAPM_OUTPUT("AUXOUT"),
+SND_SOC_DAPM_OUTPUT("HPL"),
+SND_SOC_DAPM_OUTPUT("HPR"),
+SND_SOC_DAPM_OUTPUT("SPKOUT"),
+SND_SOC_DAPM_INPUT("LINEL"),
+SND_SOC_DAPM_INPUT("LINER"),
+SND_SOC_DAPM_INPUT("AUXINL"),
+SND_SOC_DAPM_INPUT("AUXINR"),
+SND_SOC_DAPM_INPUT("MIC1"),
+SND_SOC_DAPM_INPUT("MIC2"),
+SND_SOC_DAPM_VMID("VMID"),
+};
+
+
+static const struct snd_soc_dapm_route intercon[] = {
+	/* left HP mixer */
+	{"Left HP Mixer", "LineIn Playback Switch", "LINEL"},
+	{"Left HP Mixer", "AuxIn Playback Switch","AUXIN"},
+	{"Left HP Mixer", "Mic1 Playback Switch","MIC1"},
+	{"Left HP Mixer", "Mic2 Playback Switch","MIC2"},
+	{"Left HP Mixer", "PCM Playback Switch","Left DAC"},
+	{"Left HP Mixer", "RecordL Playback Switch","Left Record Mixer"},
+	
+	/* right HP mixer */
+	{"Right HP Mixer", "LineIn Playback Switch", "LINER"},
+	{"Right HP Mixer", "AuxIn Playback Switch","AUXIN"},
+	{"Right HP Mixer", "Mic1 Playback Switch","MIC1"},
+	{"Right HP Mixer", "Mic2 Playback Switch","MIC2"},
+	{"Right HP Mixer", "PCM Playback Switch","Right DAC"},
+	{"Right HP Mixer", "RecordR Playback Switch","Right Record Mixer"},
+	
+	/* virtual mixer - mixes left & right channels for spk and mono */
+	{"IIS Mixer", NULL, "Left DAC"},
+	{"IIS Mixer", NULL, "Right DAC"},
+	{"Line Mixer", NULL, "Right Line In"},
+	{"Line Mixer", NULL, "Left Line In"},
+	{"HP Mixer", NULL, "Left HP Mixer"},
+	{"HP Mixer", NULL, "Right HP Mixer"},
+	{"AuxIn Mixer",NULL,"Left Aux In"},
+	{"AuxIn Mixer",NULL,"Right Aux In"},
+	{"AuxOut Mixer",NULL,"Left Aux Out"},
+	{"AuxOut Mixer",NULL,"Right Aux Out"},
+	
+	/* speaker mixer */
+	{"Speaker Mixer", "LineIn Playback Switch","Line Mixer"},
+	{"Speaker Mixer", "AuxIn Playback Switch","AuxIn Mixer"},
+	{"Speaker Mixer", "Mic1 Playback Switch","MIC1"},
+	{"Speaker Mixer", "Mic2 Playback Switch","MIC2"},
+	{"Speaker Mixer", "PCM Playback Switch","IIS Mixer"},
+
+	/* mono mixer */
+	{"Mono Mixer", "LineIn Playback Switch","Line Mixer"},
+	{"Mono Mixer", "AuxIn Playback Switch","AuxIn Mixer"},
+	{"Mono Mixer", "Mic1 Playback Switch","MIC1"},
+	{"Mono Mixer", "Mic2 Playback Switch","MIC2"},
+	{"Mono Mixer", "PCM Playback Switch","IIS Mixer"},
+	{"Mono Mixer", "RecordL Playback Switch","Left Record Mixer"},
+	{"Mono Mixer", "RecordR Playback Switch","Right Record Mixer"},
+	
+	/*Left record mixer */
+	{"Left Record Mixer", "Mic1 Capture Switch","Mic 1 Pre Amp"},
+	{"Left Record Mixer", "Mic2 Capture Switch","Mic 2 Pre Amp"},
+	{"Left Record Mixer", "LineInL Capture Switch","LINEL"},
+	{"Left Record Mixer", "Phone Capture Switch","PHONEIN"},
+	{"Left Record Mixer", "HPMixerL Capture Switch","Left HP Mixer"},
+	{"Left Record Mixer", "SPKMixer Capture Switch","Speaker Mixer"},
+	{"Left Record Mixer", "MonoMixer Capture Switch","Mono Mixer"},
+	
+	/*Right record mixer */
+	{"Right Record Mixer", "Mic1 Capture Switch","Mic 1 Pre Amp"},
+	{"Right Record Mixer", "Mic2 Capture Switch","Mic 2 Pre Amp"},
+	{"Right Record Mixer", "LineInR Capture Switch","LINER"},
+	{"Right Record Mixer", "Phone Capture Switch","PHONEIN"},
+	{"Right Record Mixer", "HPMixerR Capture Switch","Right HP Mixer"},
+	{"Right Record Mixer", "SPKMixer Capture Switch","Speaker Mixer"},
+	{"Right Record Mixer", "MonoMixer Capture Switch","Mono Mixer"},	
+
+	/* headphone left mux */
+	{"Left Headphone Out Mux", "HP Left mixer", "Left HP Mixer"},
+
+	/* headphone right mux */
+	{"Right Headphone Out Mux", "HP Right mixer", "Right HP Mixer"},
+
+	/* speaker out mux */
+	{"Speaker Out Mux", "HP mixer", "HP Mixer"},
+	{"Speaker Out Mux", "Speaker Mixer", "Speaker Mixer"},
+	{"Speaker Out Mux", "Mono Mixer", "Mono Mixer"},
+
+	/* Aux Out mux */
+	{"Aux Out Mux", "HP mixer", "HP Mixer"},
+	{"Aux Out Mux", "Speaker Mixer", "Speaker Mixer"},
+	{"Aux Out Mux", "Mono Mixer", "Mono Mixer"},
+	
+	/* output pga */
+	{"HPL", NULL, "Left Headphone"},
+	{"Left Headphone", NULL, "Left Headphone Out Mux"},
+	{"HPR", NULL, "Right Headphone"},
+	{"Right Headphone", NULL, "Right Headphone Out Mux"},
+	{"SPKOUT", NULL, "Speaker Out"},
+	{"Speaker Out", NULL, "Speaker Out Mux"},
+	{"AUXOUT", NULL, "AuxOut Mixer"},
+	{"Left Aux Out", NULL, "Aux Out Mux"},
+	{"Right Aux Out", NULL, "Aux Out Mux"},
+
+	/* input pga */
+	{"Left Line In", NULL, "LINEL"},
+	{"Right Line In", NULL, "LINER"},
+	{"Left Aux In", NULL, "AUXINL"},
+	{"Right Aux In", NULL, "AUXINR"},
+	{"Mic 1 Pre Amp", NULL, "MIC1"},
+	{"Mic 2 Pre Amp", NULL, "MIC2"},	
+	{"Mic 1 PGA", NULL, "Mic 1 Pre Amp"},
+	{"Mic 2 PGA", NULL, "Mic 2 Pre Amp"},
+
+	/* left ADC */
+	{"Left ADC", NULL, "Left Record Mixer"},
+
+	/* right ADC */
+	{"Right ADC", NULL, "Right Record Mixer"},
+	
+	/* terminator */
+	{NULL, NULL, NULL},	
+};
+
+
+static int rt5623_add_widgets(struct snd_soc_codec *codec)
+{
+	int i;
+
+//	snd_soc_dapm_new_controls(codec, rt5623_dapm_widgets, ARRAY_SIZE(rt5623_dapm_widgets));
+
+	/* set up audio path interconnects */
+//	snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon));
+
+	snd_soc_dapm_new_widgets(codec);
+	return 0;
+}
+
+
+#if 0
+/* PLL divisors */
+struct _pll_div {
+	u32 pll_in;
+	u32 pll_out;
+	u16 regvalue;
+};
+
+static const struct _pll_div codec_master_pll_div[] = {
+	
+	{  2048000,  8192000,	0x0ea0},		
+	{  3686400,  8192000,	0x4e27},	
+	{ 12000000,  8192000,	0x456b},   
+	{ 13000000,  8192000,	0x495f},
+	{ 13100000,	 8192000,	0x0320},	
+	{  2048000,  11289600,	0xf637},
+	{  3686400,  11289600,	0x2f22},	
+	{ 12000000,  11289600,	0x3e2f},   
+	{ 13000000,  11289600,	0x4d5b},
+	{ 13100000,	 11289600,	0x363b},	
+	{  2048000,  16384000,	0x1ea0},
+	{  3686400,  16384000,	0x9e27},	
+	{ 12000000,  16384000,	0x452b},   
+	{ 13000000,  16384000,	0x542f},
+	{ 13100000,	 16384000,	0x03a0},	
+	{  2048000,  16934400,	0xe625},
+	{  3686400,  16934400,	0x9126},	
+	{ 12000000,  16934400,	0x4d2c},   
+	{ 13000000,  16934400,	0x742f},
+	{ 13100000,	 16934400,	0x3c27},			
+	{  2048000,  22579200,	0x2aa0},
+	{  3686400,  22579200,	0x2f20},	
+	{ 12000000,  22579200,	0x7e2f},   
+	{ 13000000,  22579200,	0x742f},
+	{ 13100000,	 22579200,	0x3c27},		
+	{  2048000,  24576000,	0x2ea0},
+	{  3686400,  24576000,	0xee27},	
+	{ 12000000,  24576000,	0x2915},   
+	{ 13000000,  24576000,	0x772e},
+	{ 13100000,	 24576000,	0x0d20},	
+};
+
+static const struct _pll_div codec_slave_pll_div[] = {
+	
+	{  1024000,  16384000,  0x3ea0},	
+	{  1411200,  22579200,	0x3ea0},
+	{  1536000,	 24576000,	0x3ea0},	
+	{  2048000,  16384000,  0x1ea0},	
+	{  2822400,  22579200,	0x1ea0},
+	{  3072000,	 24576000,	0x1ea0},
+			
+};
+
+
+static int rt5623_set_dai_pll(struct snd_soc_dai *codec_dai,
+		int pll_id, unsigned int freq_in, unsigned int freq_out)
+{
+	int i;
+	struct snd_soc_codec *codec = codec_dai->codec;
+
+	if (pll_id < RT5623_PLL_FR_MCLK || pll_id > RT5623_PLL_FR_BCK)
+		return -ENODEV;
+
+	rt5623_write_mask(codec,RT5623_PWR_MANAG_ADD2, 0x0000,0x1000);	//disable PLL power	
+	
+	if (!freq_in || !freq_out) {
+
+		return 0;
+	}		
+
+	if (pll_id == RT5623_PLL_FR_MCLK) {	//codec is master mode
+	
+		for (i = 0; i < ARRAY_SIZE(codec_master_pll_div); i++) {
+			
+			if (codec_master_pll_div[i].pll_in == freq_in && codec_master_pll_div[i].pll_out == freq_out)
+			 {
+			 	rt5623_write(codec,RT5623_GLOBAL_CLK_CTRL_REG,0x0000);//PLL source from MCLK
+			 	
+			 	rt5623_write(codec,RT5623_PLL_CTRL,codec_master_pll_div[i].regvalue);//set PLL parameter
+			 	
+				rt5623_write_mask(codec,RT5623_PWR_MANAG_ADD2, 0x1000,0x1000);	//enable PLL power	
+				
+				rt5623_write(codec,RT5623_GLOBAL_CLK_CTRL_REG,0x8000);//Codec sys-clock from PLL 	 	
+			 	
+				break;
+			}
+		}
+	
+	} else {		//codec is slave mode 
+
+		for (i = 0; i < ARRAY_SIZE(codec_slave_pll_div); i++) {
+			
+			if (codec_slave_pll_div[i].pll_in == freq_in && codec_slave_pll_div[i].pll_out == freq_out)
+		 	{
+		 		rt5623_write(codec,RT5623_GLOBAL_CLK_CTRL_REG,0x4000);//PLL source from Bitclk
+		 		
+			 	rt5623_write(codec,RT5623_PLL_CTRL,codec_master_pll_div[i].regvalue);//set PLL parameter
+			 	
+				rt5623_write_mask(codec,RT5623_PWR_MANAG_ADD2, 0x1000,0x1000);	//enable PLL power
+				
+				rt5623_write(codec,RT5623_GLOBAL_CLK_CTRL_REG,0xc000);//Codec sys-clock from PLL 
+				break;
+			}
+		}
+	}	
+	
+	return 0;
+}
+
+struct _coeff_div {
+	u32 mclk;
+	u32 rate;
+	u16 fs;
+	u16 regvalue;
+};
+
+
+/* codec hifi mclk (after PLL) clock divider coefficients */
+static const struct _coeff_div coeff_div[] = {
+	/* 8k */
+	{ 8192000,  8000, 256*4, 0x2a69},
+	{12288000,  8000, 384*4, 0x2c6b},
+
+	/* 11.025k */
+	{11289600, 11025, 256*4, 0x2a69},
+	{16934400, 11025, 384*4, 0x2c6b},
+
+	/* 16k */
+	{16384000, 16000, 256*4, 0x2a69},
+	{24576000, 16000, 384*4, 0x2c6b},
+
+	/* 22.05k */
+	{11289600, 22050, 256*2, 0x1a69},
+	{16934400, 22050, 384*2, 0x1c6b},
+
+	/* 32k */
+	{16384000, 32000, 256*2, 0x1a69},
+	{24576000, 32000, 384*2, 0x1c6b},
+
+	/* 44.1k */
+	{22579200, 44100, 256*2, 0x1a69},
+
+	/* 48k */
+	{24576000, 48000, 256*2, 0x1a69},
+
+};
+
+static int get_coeff(int mclk, int rate)
+{
+	int i;
+	
+//	printk("get_coeff mclk=%d,rate=%d\n",mclk,rate);
+
+	for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
+		if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
+			return i;
+	}
+	return -EINVAL;
+}
+#endif
+
+/*
+ * Clock after PLL and dividers
+ */
+static int rt5623_set_dai_sysclk(struct snd_soc_dai *codec_dai,
+		int clk_id, unsigned int freq, int dir)
+{
+	struct snd_soc_codec *codec = codec_dai->codec;
+	struct rt5623_priv *rt5623 = codec->private_data;
+
+	switch (freq) {
+	case  8192000:	
+	case 11289600:
+	case 12288000:
+	case 16384000:
+	case 16934400:
+	case 18432000:
+	case 22579200:	
+	case 24576000:
+		rt5623->sysclk = freq;
+		return 0;
+	}
+	return -EINVAL;
+}
+
+
+static int rt5623_set_dai_fmt(struct snd_soc_dai *codec_dai,
+		unsigned int fmt)
+{
+	struct snd_soc_codec *codec = codec_dai->codec;
+	u16 iface = 0;
+
+	/* set master/slave audio interface */
+	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
+	case SND_SOC_DAIFMT_CBM_CFM:
+		iface = 0x0000;
+		break;
+	case SND_SOC_DAIFMT_CBS_CFS:
+		iface = 0x8000;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	/* interface format */
+	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
+	case SND_SOC_DAIFMT_I2S:
+		iface |= 0x0000;
+		break;
+	case SND_SOC_DAIFMT_RIGHT_J:
+		iface |= 0x0001;
+		break;
+	case SND_SOC_DAIFMT_LEFT_J:
+		iface |= 0x0002;
+		break;
+	case SND_SOC_DAIFMT_DSP_A:
+		iface |= 0x0003;
+		break;
+	case SND_SOC_DAIFMT_DSP_B:
+		iface |= 0x4003;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	/* clock inversion */
+	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
+	case SND_SOC_DAIFMT_NB_NF:
+		break;
+	case SND_SOC_DAIFMT_IB_IF:
+		iface |= 0x0080;
+		break;
+	case SND_SOC_DAIFMT_IB_NF:
+		iface |= 0x0080;
+		break;
+	case SND_SOC_DAIFMT_NB_IF:
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	rt5623_write_mask(codec,RT5623_AUDIO_INTERFACE, iface,0x4803);
+	return 0;
+}
+
+
+
+static int rt5623_pcm_hw_params(struct snd_pcm_substream *substream,struct snd_pcm_hw_params *params,
+				struct snd_soc_dai *dai)
+{
+	struct snd_soc_pcm_runtime *rtd = substream->private_data;
+	struct snd_soc_device *socdev = rtd->socdev;
+	struct snd_soc_codec *codec = socdev->card->codec;
+//	struct rt5623_priv *rt5623 = codec->private_data;
+	u16 iface=rt5623_read(codec,RT5623_AUDIO_INTERFACE)&0xfff3;
+//	int coeff = get_coeff(rt5623->sysclk, params_rate(params));
+
+//	printk("rt5623_pcm_hw_params\n");
+
+	/* bit size */
+	switch (params_format(params)) {
+	case SNDRV_PCM_FORMAT_S16_LE:
+//		printk("S16_LE\n");
+		break;
+	case SNDRV_PCM_FORMAT_S20_3LE:
+//		printk("S20_3LE\n");
+		iface |= 0x0004;
+		break;
+	case SNDRV_PCM_FORMAT_S24_LE:
+//		printk("S24_LE\n");
+		iface |= 0x0008;
+		break;
+	case SNDRV_PCM_FORMAT_S32_LE:
+//		printk("S32_LE\n");
+		iface |= 0x000c;
+		break;
+	}
+
+	/* set iface & srate */
+	rt5623_write(codec, RT5623_AUDIO_INTERFACE, iface);
+//	if (coeff >= 0)
+//		rt5623_write(codec, RT5623_STEREO_AD_DA_CLK_CTRL,coeff_div[coeff].regvalue);
+
+	return 0;
+}
+
+static int rt5623_pcm_hw_trigger(struct snd_pcm_substream *substream,int cmd,
+				 struct snd_soc_dai *dai)
+{
+//	struct snd_pcm_runtime *runtime = substream->runtime;
+	struct snd_soc_pcm_runtime *rtd = substream->private_data;
+	struct snd_soc_device *socdev = rtd->socdev;
+	struct snd_soc_codec *codec = socdev->card->codec;
+	int ret = 0;
+	struct rt5623_setup_data *setup = socdev->codec_data;
+
+//	printk("%s\n",__func__);
+
+	switch (cmd) {
+	case SNDRV_PCM_TRIGGER_START:
+		if(substream->stream==SNDRV_PCM_STREAM_PLAYBACK)
+		{
+//			rt5623_ChangeCodecPowerStatus(codec,POWER_STATE_D1_PLAYBACK);
+//			rt5623_AudioOutEnable(codec,RT_WAVOUT_SPK,0);
+//			rt5623_AudioOutEnable(codec,RT_WAVOUT_HP,0);
+		}
+		else
+		{
+			if(setup->mic2_input)
+			{//mic2 input
+				Enable_ADC_Input_Source(codec,RT_WAVIN_L_LINE_IN|RT_WAVIN_R_LINE_IN,0);
+				Enable_ADC_Input_Source(codec,RT_WAVIN_L_MIC2|RT_WAVIN_R_MIC2,1);
+			}
+			else
+			{ //line in
+				Enable_ADC_Input_Source(codec,RT_WAVIN_L_MIC2|RT_WAVIN_R_MIC2,0);
+				Enable_ADC_Input_Source(codec,RT_WAVIN_L_LINE_IN|RT_WAVIN_R_LINE_IN,1);
+			}
+		}	
+		break;
+
+	case SNDRV_PCM_TRIGGER_STOP:
+//		printk("%s : stop\n",__func__);		
+		break;
+
+	case SNDRV_PCM_TRIGGER_SUSPEND:
+	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
+
+		break;
+
+	case SNDRV_PCM_TRIGGER_RESUME:
+
+		break;
+	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
+
+		break;
+
+	default:
+		ret = -EINVAL;
+	}
+
+	return ret;
+}
+
+
+
+static int rt5623_mute(struct snd_soc_dai *dai, int mute)
+{
+	struct snd_soc_codec *codec = dai->codec;
+	u16 mute_reg = rt5623_read(codec, RT5623_MISC_CTRL) & 0xfff3;
+
+
+	if (mute)
+	{
+//		printk("rt5623 mute\n");
+		rt5623_write(codec, RT5623_MISC_CTRL, mute_reg | 0xc);
+	}	
+	else
+	{
+//		printk("rt5623 unmute\n");
+		rt5623_write(codec, RT5623_MISC_CTRL, mute_reg);
+
+	}	
+	return 0;
+}
+
+
+/////////////////////////////////////////////////////////////////////////////////////////////
+// RT5623 DPAM for KW / Dove Avenger
+/////////////////////////////////////////////////////////////////////////////////////////////
+
+#define RT5623_ADD1_POWER_D0 \
+	PWR_MAIN_I2S_EN | PWR_ZC_DET_PD_EN | PWR_MIC1_BIAS_EN | PWR_SHORT_CURR_DET_EN | \
+	PWR_SOFTGEN_EN | PWR_DEPOP_BUF_HP | PWR_HP_OUT_AMP | PWR_HP_OUT_ENH_AMP
+
+#define RT5623_ADD1_POWER_D0_PLAYBACK \
+	PWR_MAIN_I2S_EN | PWR_ZC_DET_PD_EN | \
+	PWR_SOFTGEN_EN | PWR_DEPOP_BUF_HP | PWR_HP_OUT_AMP | PWR_HP_OUT_ENH_AMP
+
+#define RT5623_ADD1_POWER_D0_CAPTURE \
+	PWR_MAIN_I2S_EN | PWR_ZC_DET_PD_EN | PWR_MIC1_BIAS_EN | PWR_SHORT_CURR_DET_EN | \
+	PWR_SOFTGEN_EN
+
+#define RT5623_ADD2_POWER_D0 \
+	PWR_LINEOUT | PWR_VREF | PWR_DAC_REF_CIR | PWR_L_DAC_CLK | PWR_R_DAC_CLK | \
+	PWR_L_ADC_CLK_GAIN | PWR_R_ADC_CLK_GAIN | PWR_L_HP_MIXER | PWR_R_HP_MIXER | \
+	PWR_L_ADC_REC_MIXER | PWR_R_ADC_REC_MIXER
+
+#define RT5623_ADD2_POWER_D0_PLAYBACK \
+	PWR_LINEOUT | PWR_VREF | PWR_DAC_REF_CIR | PWR_L_DAC_CLK | PWR_R_DAC_CLK | \
+	PWR_L_HP_MIXER | PWR_R_HP_MIXER
+
+#define RT5623_ADD2_POWER_D0_CAPTURE \
+	PWR_VREF | \
+	PWR_L_ADC_CLK_GAIN | PWR_R_ADC_CLK_GAIN | \
+	PWR_L_ADC_REC_MIXER | PWR_R_ADC_REC_MIXER
+
+#define RT5623_ADD3_POWER_D0 \
+	PWR_MAIN_BIAS | PWR_SPK_OUT | PWR_HP_L_OUT_VOL | PWR_HP_R_OUT_VOL | \
+	PWR_LINEIN_L_VOL | PWR_LINEIN_R_VOL | PWR_MIC2_BOOST_MIXER
+
+#define RT5623_ADD3_POWER_D0_PLAYBACK \
+	PWR_MAIN_BIAS | PWR_SPK_OUT | PWR_HP_L_OUT_VOL | PWR_HP_R_OUT_VOL
+#define RT5623_ADD3_POWER_D0_CAPTURE \
+	PWR_MAIN_BIAS | PWR_LINEIN_L_VOL | PWR_LINEIN_R_VOL | PWR_MIC2_BOOST_MIXER
+
+#define RT5623_ADD1_POWER_D3HOT	        PWR_MIC1_BIAS_EN
+#define RT5623_ADD2_POWER_D3HOT 	PWR_VREF
+#define RT5623_ADD3_POWER_D3HOT 	PWR_MAIN_BIAS
+
+
+#define RT5623_ADD1_POWER_D3COLD	0
+#define RT5623_ADD2_POWER_D3COLD	0
+#define RT5623_ADD3_POWER_D3COLD	0
+
+
+
+static void enable_power_depop(struct snd_soc_codec *codec)
+{
+
+	//Power On Main Bias
+//	rt5623_write_mask(codec, RT5623_PWR_MANAG_ADD3, PWR_MAIN_BIAS, PWR_MAIN_BIAS);
+
+	//HP L/R MUTE
+	rt5623_write_mask(codec,RT5623_HP_OUT_VOL,RT_L_MUTE|RT_R_MUTE,RT_L_MUTE|RT_R_MUTE);
+	//SPK L/R MUTE
+	rt5623_write_mask(codec,RT5623_SPK_OUT_VOL,RT_L_MUTE|RT_R_MUTE,RT_L_MUTE|RT_R_MUTE);
+
+	//Power On Softgen
+	rt5623_write_mask(codec, RT5623_PWR_MANAG_ADD1, PWR_SOFTGEN_EN, PWR_SOFTGEN_EN);
+
+	//Power On Vref
+//	rt5623_write_mask(codec, RT5623_PWR_MANAG_ADD2, PWR_VREF, PWR_VREF);
+
+	//Power On HP L/R vol
+	rt5623_write(codec, RT5623_PWR_MANAG_ADD3, RT5623_ADD3_POWER_D0);
+
+	//enable HP Depop2
+	rt5623_write_mask(codec,RT5623_MISC_CTRL,HP_DEPOP_MODE2_EN,HP_DEPOP_MODE2_EN);
+
+	msleep(500);
+
+//	rt5623_write_mask(codec, RT5623_PWR_MANAG_ADD1, PWR_HP_OUT_AMP | PWR_HP_OUT_ENH_AMP , PWR_HP_OUT_AMP | PWR_HP_OUT_ENH_AMP);
+
+
+	rt5623_write(codec, RT5623_PWR_MANAG_ADD2, RT5623_ADD2_POWER_D0);
+	rt5623_write(codec, RT5623_PWR_MANAG_ADD1, RT5623_ADD1_POWER_D0);
+
+	//disable HP Depop2
+	rt5623_write_mask(codec,RT5623_MISC_CTRL,0,HP_DEPOP_MODE2_EN);
+
+	//HP L/R UNMUTE
+	rt5623_write_mask(codec,RT5623_HP_OUT_VOL,0,RT_L_MUTE|RT_R_MUTE);
+	//SPEAKER UNMUTE
+	rt5623_write_mask(codec,RT5623_SPK_OUT_VOL,0,RT_L_MUTE|RT_R_MUTE);
+
+}
+
+
+
+static int rt5623_set_bias_level(struct snd_soc_codec *codec,
+				      enum snd_soc_bias_level level)
+{
+	switch (level) {
+	case SND_SOC_BIAS_ON:
+		/* vref/mid, osc on, dac unmute */
+		enable_power_depop(codec);
+		break;
+	case SND_SOC_BIAS_PREPARE:
+		break;
+	case SND_SOC_BIAS_STANDBY:
+		/* everything off except vref/vmid, */
+		rt5623_write(codec, RT5623_PWR_MANAG_ADD2, RT5623_ADD2_POWER_D3HOT);
+		rt5623_write(codec, RT5623_PWR_MANAG_ADD3, RT5623_ADD3_POWER_D3HOT);
+		rt5623_write(codec, RT5623_PWR_MANAG_ADD1, RT5623_ADD1_POWER_D3HOT);
+		break;
+	case SND_SOC_BIAS_OFF:
+		/* everything off, dac mute, inactive */
+		rt5623_write(codec, RT5623_PWR_MANAG_ADD2, RT5623_ADD2_POWER_D3COLD);
+		rt5623_write(codec, RT5623_PWR_MANAG_ADD3, RT5623_ADD3_POWER_D3COLD);
+		rt5623_write(codec, RT5623_PWR_MANAG_ADD1, RT5623_ADD1_POWER_D3COLD);
+		break;
+	}
+	codec->bias_level = level;
+	return 0;
+}
+
+
+#define RT5623_RATES SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000
+
+
+#define RT5623_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
+
+
+static struct snd_soc_dai_ops rt5623_dai_ops = {
+		.hw_params = rt5623_pcm_hw_params,
+		.trigger = rt5623_pcm_hw_trigger,
+		.digital_mute = rt5623_mute,
+		.set_fmt = rt5623_set_dai_fmt,
+		.set_sysclk = rt5623_set_dai_sysclk,
+//		.set_pll = rt5623_set_dai_pll,
+};
+
+struct snd_soc_dai rt5623_dai = {
+	.name = "RT5623",
+	.playback = {
+		.stream_name = "Playback",
+		.channels_min = 1,
+		.channels_max = 2,
+		.rate_min =	44100,
+		.rate_max =	96000,
+		.rates = RT5623_RATES,
+		.formats = RT5623_FORMATS,},
+	.capture = {
+		.stream_name = "Capture",
+		.channels_min = 1,
+		.channels_max = 2,
+		.rate_min =	44100,
+		.rate_max =	96000,
+		.rates = RT5623_RATES,
+		.formats = RT5623_FORMATS,},
+
+	.ops = &rt5623_dai_ops,
+};
+EXPORT_SYMBOL_GPL(rt5623_dai);
+
+
+static void rt5623_work(struct work_struct *work)
+{
+	struct snd_soc_codec *codec =
+		container_of(work, struct snd_soc_codec, delayed_work.work);
+	rt5623_set_bias_level(codec, codec->bias_level);
+}
+
+static int rt5623_suspend(struct platform_device *pdev, pm_message_t state)
+{
+	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
+	struct snd_soc_codec *codec = socdev->card->codec;
+
+	/* we only need to suspend if we are a valid card */
+	if(!codec->card)
+		return 0;
+		
+	rt5623_set_bias_level(codec, SND_SOC_BIAS_OFF);
+
+	return 0;
+}
+
+static int rt5623_resume(struct platform_device *pdev)
+{
+	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
+	struct snd_soc_codec *codec = socdev->card->codec;
+	int i;
+	u8 data[3];
+	u16 *cache = codec->reg_cache;
+
+	/* we only need to resume if we are a valid card */
+	if(!codec->card)
+		return 0;
+
+	/* Sync reg_cache with the hardware */	
+
+	for (i = 0; i < ARRAY_SIZE(rt5623_reg); i++) {
+		if (i == RT5623_RESET)
+			continue;
+		data[0] =i*2;	
+		data[1] = (0xFF00 & cache[i]) >> 8;
+		data[2] = 0x00FF & cache[i];	
+		codec->hw_write(codec->control_data, data, 3);
+	}	
+
+	rt5623_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
+
+	/* charge rt5623 caps */
+	if(codec->suspend_bias_level == SND_SOC_BIAS_ON) {
+		rt5623_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
+		codec->bias_level = SND_SOC_BIAS_ON;
+		schedule_delayed_work(&codec->delayed_work,
+			msecs_to_jiffies(caps_charge));
+
+	}
+
+	return 0;
+}
+
+/*
+ * initialise the RT5623 driver
+ * register the mixer and dsp interfaces with the kernel
+ */
+static int rt5623_init(struct snd_soc_device *socdev)
+{
+	struct snd_soc_codec *codec = socdev->card->codec;
+	int  ret = 0,i=0;
+
+	codec->name = "RT5623";
+	codec->owner = THIS_MODULE;
+	codec->read = rt5623_read;
+	codec->write = rt5623_write;
+	codec->set_bias_level = rt5623_set_bias_level;
+	codec->dai = &rt5623_dai;
+	codec->num_dai = 1;
+	codec->reg_cache_size = sizeof(rt5623_reg);
+	codec->reg_cache = kmemdup(rt5623_reg, sizeof(rt5623_reg), GFP_KERNEL);
+
+	if (codec->reg_cache == NULL)
+		return -ENOMEM;
+		
+	rt5623_reset(codec);
+
+	rt5623_dai.dev = codec->dev;
+
+	/* register pcms */
+	ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
+	if (ret < 0) {
+		printk(KERN_ERR "rt5623: failed to create pcms\n");
+		goto pcm_err;
+	}
+
+	rt5623_write(codec, RT5623_PWR_MANAG_ADD3, 0x8000);//enable Main bias
+	rt5623_write(codec, RT5623_PWR_MANAG_ADD2, 0x2000);//enable Vref
+
+	/* power on device */
+	rt5623_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
+
+	schedule_delayed_work(&codec->delayed_work,
+		msecs_to_jiffies(caps_charge));
+
+
+	//initize codec register
+	for(i=0;i<SET_CODEC_REG_INIT_NUM;i++)
+	{
+		rt5623_write(codec,Set_Codec_Reg_Init[i][0],Set_Codec_Reg_Init[i][1]);
+		
+	}
+	
+	rt5623_add_controls(codec);
+	rt5623_add_widgets(codec);
+	
+	ret = snd_soc_init_card(socdev);
+
+	if (ret < 0) {
+		printk(KERN_ERR "rt5623: failed to register card\n");
+		goto card_err;
+	}
+
+	return ret;
+
+card_err:
+	snd_soc_free_pcms(socdev);
+	snd_soc_dapm_free(socdev);
+pcm_err:
+	kfree(codec->reg_cache);
+	return ret;
+}
+
+
+/* If the i2c layer weren't so broken, we could pass this kind of data
+   around */
+
+
+#if defined (CONFIG_I2C) || defined (CONFIG_I2C_MODULE)
+
+/*
+ * RT5623 2 wire address is determined by A1 pin
+ * state during powerup.
+ *    low  = 0x1a
+ *    high = 0x1b
+ */
+static const struct i2c_device_id rt5623_i2c_table[] = {
+	{"rt5623", 0},
+	{}
+};
+
+MODULE_DEVICE_TABLE(i2c, rt5623_i2c_table);
+
+
+static struct i2c_driver rt5623_i2c_driver;
+
+static int rt5623_i2c_probe(struct i2c_client *client, const struct i2c_device_id *id)
+{
+	struct snd_soc_device *socdev = rt5623_socdev;
+	struct rt5623_setup_data *setup = socdev->codec_data;
+	struct snd_soc_codec *codec = socdev->card->codec;	
+	struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent);
+	int ret;
+
+	if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_EMUL))
+		return -EIO;
+
+	i2c_set_clientdata(client, codec);
+	codec->control_data = client;
+	codec->dev = &client->dev;
+
+	ret = rt5623_init(socdev);			
+		
+	if (ret < 0) {
+		err("failed to initialise RT5623\n");
+		goto err;
+	}
+
+	return ret;
+
+err:
+	kfree(codec->private_data);
+	kfree(codec);
+	return ret;
+}
+
+static int rt5623_i2c_remove(struct i2c_client *client)
+{
+	struct snd_soc_codec *codec = i2c_get_clientdata(client);
+	kfree(codec->reg_cache);
+	kfree(client);
+	return 0;
+}
+
+
+/*  i2c codec control layer */
+static struct i2c_driver rt5623_i2c_driver = {
+	.driver = {
+		.name = "rt5623",
+		.owner = THIS_MODULE,
+	},
+	.probe = rt5623_i2c_probe,
+	.remove =  rt5623_i2c_remove,
+	.id_table = rt5623_i2c_table,
+};
+
+
+#endif
+
+static int rt5623_probe(struct platform_device *pdev)
+{
+	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
+	struct rt5623_setup_data *setup;
+	struct snd_soc_codec *codec;
+	struct rt5623_priv *rt5623;
+	int ret = 0;
+
+	info("RT5623 Audio Codec %s",RT5623_VERSION);
+
+	setup = socdev->codec_data;
+	codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
+	if (codec == NULL)
+		return -ENOMEM;
+
+	rt5623 = kzalloc(sizeof(struct rt5623_priv), GFP_KERNEL);
+	if (rt5623 == NULL) {
+		kfree(codec);
+		return -ENOMEM;
+	}
+
+	codec->private_data = rt5623;
+	socdev->card->codec = codec;
+	mutex_init(&codec->mutex);
+	INIT_LIST_HEAD(&codec->dapm_widgets);
+	INIT_LIST_HEAD(&codec->dapm_paths);
+	rt5623_socdev = socdev;
+	INIT_DELAYED_WORK(&codec->delayed_work, rt5623_work);
+
+#if defined (CONFIG_I2C) || defined (CONFIG_I2C_MODULE)
+
+	codec->hw_write = (hw_write_t)i2c_master_send;
+
+	ret = i2c_add_driver(&rt5623_i2c_driver);
+	if (ret != 0)
+		printk(KERN_ERR "can't add i2c rt5623 driver");
+#else
+		/* Add other interfaces here */
+#endif
+	return ret;
+}
+
+/*
+ * This function forces any delayed work to be queued and run.
+ */
+static int run_delayed_work(struct delayed_work *dwork)
+{
+	int ret;
+
+	/* cancel any work waiting to be queued. */
+	ret = cancel_delayed_work(dwork);
+
+	/* if there was any work waiting then we run it now and
+	 * wait for it's completion */
+	if (ret) {
+		schedule_delayed_work(dwork, 0);
+		flush_scheduled_work();
+	}
+	return ret;
+}
+
+/* power down chip */
+static int rt5623_remove(struct platform_device *pdev)
+{
+	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
+	struct snd_soc_codec *codec = socdev->card->codec;
+
+	if (codec->control_data)
+		rt5623_set_bias_level(codec, SND_SOC_BIAS_OFF);
+	run_delayed_work(&codec->delayed_work);
+	snd_soc_free_pcms(socdev);
+	snd_soc_dapm_free(socdev);
+#if defined (CONFIG_I2C) || defined (CONFIG_I2C_MODULE)
+	i2c_del_driver(&rt5623_i2c_driver);
+#endif
+	kfree(codec->private_data);
+	kfree(codec);
+
+	return 0;
+}
+
+struct snd_soc_codec_device soc_codec_dev_rt5623 = {
+	.probe = 	rt5623_probe,
+	.remove = 	rt5623_remove,
+	.suspend = 	rt5623_suspend,
+	.resume =	rt5623_resume,
+};
+
+EXPORT_SYMBOL_GPL(soc_codec_dev_rt5623);
+
+static int __init rt5623_modinit(void)
+{
+	return snd_soc_register_dai(&rt5623_dai);
+}
+module_init(rt5623_modinit);
+
+static void __exit rt5623_modexit(void)
+{
+	snd_soc_unregister_dai(&rt5623_dai);
+}
+module_exit(rt5623_modexit);
+
+MODULE_DESCRIPTION("ASoC RT5623 driver");
+MODULE_AUTHOR("flove , Ethan");
+MODULE_LICENSE("GPL");
+
--- linux-mvl-dove-2.6.32.orig/sound/soc/codecs/wm8510.c
+++ linux-mvl-dove-2.6.32/sound/soc/codecs/wm8510.c
@@ -425,23 +425,23 @@
 
 	/* filter coefficient */
 	switch (params_rate(params)) {
-	case SNDRV_PCM_RATE_8000:
+	case 8000:
 		adn |= 0x5 << 1;
 		break;
-	case SNDRV_PCM_RATE_11025:
+	case 11025:
 		adn |= 0x4 << 1;
 		break;
-	case SNDRV_PCM_RATE_16000:
+	case 16000:
 		adn |= 0x3 << 1;
 		break;
-	case SNDRV_PCM_RATE_22050:
+	case 22050:
 		adn |= 0x2 << 1;
 		break;
-	case SNDRV_PCM_RATE_32000:
+	case 32000:
 		adn |= 0x1 << 1;
 		break;
-	case SNDRV_PCM_RATE_44100:
-	case SNDRV_PCM_RATE_48000:
+	case 44100:
+	case 48000:
 		break;
 	}
 
--- linux-mvl-dove-2.6.32.orig/sound/soc/codecs/rt655.h
+++ linux-mvl-dove-2.6.32/sound/soc/codecs/rt655.h
@@ -0,0 +1,46 @@
+#ifndef __RT_655_H_
+#define __RT_655_H_
+
+//flove122309_S
+#define RT655_RESET						0X00			//RESET
+#define RT655_MASTER_VOL				0X02			//MASTER VOLUME
+#define RT655_MONO_OUT_VOL				0X06			//MONO OUT VOLUME
+#define RT655_PCBEEP_VOL				0X0A			//PC BEEP VOLUME
+#define RT655_PHONE_VOL					0X0C			//PHONE VOLUME
+#define RT655_MIC_VOL					0X0E			//MIC VOLUME
+#define RT655_LINEIN_VOL				0X10			//LINE IN VOLUME
+#define RT655_CD_VOL					0X12			//CD VOLUME
+#define RT655_AUX_VOL					0X16			//AUX VOLUME
+#define RT655_FRONT_DAC_VOL				0X18			//PCM OUT VOLUME
+#define RT655_REC_SEL					0X1A			//RECORD SELECT
+#define RT655_REC_GAIN					0X1C			//RECORD GAIN
+#define RT655_GEN_PUR					0X20			//GENERAL PURPOSE REGISTER
+#define RT655_AUDIO_PAGING				0X24			//AUDIO INTERRUPT AND PAGING MECHANISM
+#define RT655_PWR_CTRL					0X26			//POWERDOWN CONTROL/STAUTS
+#define RT655_EXT_ID					0X28			//EXTENDED AUDIO ID
+#define RT655_EXT_STAUS					0X2A			//EXTENDED AUDIO STATUS AND CONTROL REGISTER 
+#define RT655_PCM_FR_SR					0X2C			//PCM FRONT/CENTER OUTPUT SAMPLE RATE
+#define RT655_PCM_SUR_SR				0X2E			//PCM SURROUND OUTPUT SAMPLE RATE
+#define RT655_PCM_LFE_SR				0X30			//PCM LFE OUTPUT SAMPLE RATE
+#define RT655_PCM_IN_SR					0X32			//ADC PCM INPUT SAMPLE RATE
+#define RT655_CEN_LFE_VOL				0X36			//LFE/CENTER MASTER VOLUME
+#define RT655_SUR_VOL					0X38			//SURROUND MASTER VOLUME
+#define RT655_SPDIF_CTRL				0X3A			//SPDIF OUTPUT CHANNEL STATUS AND CONTROL
+#define RT655_SPDIF_IN_STATUS_1			0X60			//SPDIF INPUT CHANNEL STATUS 1
+#define RT655_SPDIF_IN_STATUS_2			0X62			//SPDIF INPUT CHANNEL STATUS 2
+#define RT655_SUR_DAC_VOL				0X64			//SURROUND DAC VOLUME
+#define RT655_CEN_LFE_DAC_VOL			0X66			//RESET CODEC TO DEFAULT
+#define RT655_SENSE_SEN_CTRL			0X68			//SENSE SENSITIVITY CONTROL
+#define RT655_MULT_CHAN_CTRL			0X6A			//MULTI CHANNEL CONTROL
+#define RT655_PRODUCT_NUM				0X6E			//PRODUCT NUMBER
+#define RT655_GPIO_INT_CTRL_STATUS		0X78			//GPIO(JD) INTERRUPT CONTROL & STATUS	
+#define RT655_EXT_CTRL					0X7A			//EXTEND CONTROL 	
+#define RT655_VEDNOR_ID					0X7C			//RESET CODEC TO DEFAULT
+#define RT655_VENDOR_ID2				0X7E			//RESET CODEC TO DEFAULT
+//flove122309_E
+
+extern int rt655_reset(struct snd_soc_codec *codec, int try_warm);
+
+extern struct snd_soc_codec_device soc_codec_dev_rt655;
+extern struct snd_soc_dai rt655_dai;
+#endif
--- linux-mvl-dove-2.6.32.orig/sound/soc/codecs/Kconfig
+++ linux-mvl-dove-2.6.32/sound/soc/codecs/Kconfig
@@ -111,6 +111,12 @@
 config SND_SOC_CX20442
 	tristate
 
+# Cirrus Logic CS42L51 Codec
+config SND_SOC_CS42L51
+	tristate
+	depends on SND_SOC
+
+
 config SND_SOC_L3
        tristate
 
@@ -220,3 +226,24 @@
 # Amp
 config SND_SOC_MAX9877
 	tristate
+
+# Realtek RT5623 Codec
+config SND_SOC_RT5623
+       tristate
+       depends on SND_SOC
+
+# Realtek RT5610 Codec
+config SND_SOC_RT5610
+        tristate
+        depends on SND_SOC
+
+# Realtek RT5630 Codec
+config SND_SOC_RT5630
+        tristate
+        depends on SND_SOC
+
+# Realtek RT655 Codec
+config SND_SOC_RT655
+        tristate
+        depends on SND_SOC
+
--- linux-mvl-dove-2.6.32.orig/sound/soc/codecs/cs42l51.c
+++ linux-mvl-dove-2.6.32/sound/soc/codecs/cs42l51.c
@@ -0,0 +1,632 @@
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <linux/pm.h>
+#include <linux/i2c.h>
+#include <linux/platform_device.h>
+#include <linux/workqueue.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <sound/soc.h>
+#include <sound/soc-dai.h>
+#include <sound/soc-dapm.h>
+#include <sound/initval.h>
+#include "cs42l51.h"
+
+#define AUDIO_NAME "cs42l51"
+
+#define CS42L51_CACHE_SIZE (CS42L51_REG_MAX+1)
+
+
+/*
+#define CS42L51_DEBUG(format, args...) \
+	printk(KERN_DEBUG "%s(%d): "format"\n", __FUNCTION__, __LINE__, ##args)
+*/
+
+#define CS42L51_DEBUG(format, args...)
+
+/* codec private data */
+struct cs42l51_priv {
+	unsigned int sysclk;
+	struct snd_soc_codec *codec;
+};
+
+static unsigned int cs42l51_read_reg_cache(struct snd_soc_codec *codec,
+					   unsigned int reg)
+{
+	u8 *cache = codec->reg_cache;
+	if (reg > CS42L51_REG_MAX)
+		return -1;
+	return cache[reg];
+}
+
+static void cs42l51_write_reg_cache(struct snd_soc_codec *codec,
+				    u8 reg, u8 value)
+{
+	u8 *cache = codec->reg_cache;
+	if (reg > CS42L51_REG_MAX)
+		return;
+	cache[reg] = value;
+}
+
+static int cs42l51_write(struct snd_soc_codec *codec, unsigned int reg,
+			 unsigned int value)
+{
+	u8 data[2];
+
+	reg &= 0x7f;
+	data[0] = reg & 0xff;
+	data[1] = value & 0xff;
+
+	cs42l51_write_reg_cache(codec, data[0], data[1]);
+	if (codec->hw_write(codec->control_data, data, 2) == 2)
+		return 0;
+	else
+		return -EIO;
+}
+
+static unsigned int cs42l51_read(struct snd_soc_codec *codec, unsigned int reg)
+{
+	return cs42l51_read_reg_cache(codec, reg);
+}
+
+static unsigned int cs42l51_read_no_cache(struct snd_soc_codec *codec,
+					  unsigned int reg)
+{
+	struct i2c_msg msg[2];
+	u8 data[2];
+	struct i2c_client *i2c_client = codec->control_data;
+	int ret;
+
+	i2c_client = (struct i2c_client *)codec->control_data;
+
+	data[0] = reg & 0xff;
+	msg[0].addr = i2c_client->addr;
+	msg[0].flags = 0;
+	msg[0].buf = &data[0];
+	msg[0].len = 1;
+
+	msg[1].addr = i2c_client->addr;
+	msg[1].flags = I2C_M_RD;
+	msg[1].buf = &data[1];
+	msg[1].len = 1;
+
+	ret = i2c_transfer(i2c_client->adapter, &msg[0], 2);
+	return (ret == 2) ? data[1] : -EIO;
+}
+
+static void cs42l51_fill_cache(struct snd_soc_codec *codec)
+{
+	u8 *cache = codec->reg_cache;
+	unsigned int reg;
+
+	for (reg = 1; reg <= CS42L51_REG_MAX; reg++)
+		cache[reg] = cs42l51_read_no_cache(codec, reg);
+
+}
+
+
+static void cs42l51_sync_cache(struct snd_soc_codec *codec)
+{
+	u8 *cache = codec->reg_cache;
+	unsigned int reg;
+
+	for (reg = 1; reg <= CS42L51_REG_MAX; reg++)
+		cs42l51_write(codec, reg, cache[reg]);
+}
+
+
+static void cs42l51_set_bits(struct snd_soc_codec *codec, u32 addr,
+			     u32 start_bit, u32 end_bit, u32 value)
+{
+	u32 mask;
+	u32 new_value;
+	u32 old_value;
+
+	old_value = cs42l51_read(codec, addr);
+	mask = ((1 << (end_bit + 1 - start_bit)) - 1) << start_bit;
+	new_value = old_value & (~mask);
+	new_value |= (mask & (value << start_bit));
+	cs42l51_write(codec, addr, new_value);
+}
+
+static u8 cs42l51_volume_mapping[] = {
+	0x19, 0xB2, 0xB7, 0xBD, 0xC3, 0xC9, 0xCF, 0xD5,
+	0xD8, 0xE1, 0xE7, 0xED, 0xF3, 0xF9, 0xFF, 0x00,
+	0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+	0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
+	0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18
+};
+
+#define CS42L51_NUM_VOLUME_STEPS  ARRAY_SIZE(cs42l51_volume_mapping)
+
+static u8 cs42l51_reg2vol(u8 reg)
+{
+	u8 i;
+
+	for (i = 0; i < CS42L51_NUM_VOLUME_STEPS; i++) {
+		if (reg == cs42l51_volume_mapping[i])
+			return i;
+		if ((cs42l51_volume_mapping[i] >
+		     cs42l51_volume_mapping[CS42L51_NUM_VOLUME_STEPS - 1])
+		    && (reg > cs42l51_volume_mapping[i])
+		    && (reg < cs42l51_volume_mapping[i + 1]))
+			return i;
+
+	}
+	return 0;
+}
+
+static u8 cs42l51_vol2reg(u8 vol)
+{
+	if (vol >= CS42L51_NUM_VOLUME_STEPS)
+		vol = CS42L51_NUM_VOLUME_STEPS - 1;
+	return cs42l51_volume_mapping[vol];
+}
+
+static int cs42l51_vol_info(struct snd_kcontrol *kcontrol,
+			    struct snd_ctl_elem_info *uinfo)
+{
+	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
+	uinfo->count = 2;
+	uinfo->value.integer.min = 0;
+	uinfo->value.integer.max = 39;
+
+	return 0;
+}
+
+static int cs42l51_vol_get(struct snd_kcontrol *kcontrol,
+			   struct snd_ctl_elem_value *ucontrol)
+{
+	struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+	u8 reg;
+	u8 vol;
+
+	reg = snd_soc_read(codec, CS42L51_REG_VOL_OUTA_CTRL);
+	vol = cs42l51_reg2vol(reg);
+	ucontrol->value.integer.value[0] = vol;
+
+	reg = snd_soc_read(codec, CS42L51_REG_VOL_OUTB_CTRL);
+	vol = cs42l51_reg2vol(reg);
+	ucontrol->value.integer.value[1] = vol;
+	return 0;
+}
+
+static int cs42l51_vol_set(struct snd_kcontrol *kcontrol,
+			   struct snd_ctl_elem_value *ucontrol)
+{
+	struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+	u8 reg;
+	u8 vol;
+
+	vol = (u8) ucontrol->value.integer.value[0];
+	reg = cs42l51_vol2reg(vol);
+	snd_soc_update_bits(codec, CS42L51_REG_VOL_OUTA_CTRL, 0xFF, reg);
+
+	vol = (u8) ucontrol->value.integer.value[1];
+	reg = cs42l51_vol2reg(vol);
+	snd_soc_update_bits(codec, CS42L51_REG_VOL_OUTB_CTRL, 0xFF, reg);
+
+	return 0;
+}
+
+static struct snd_kcontrol_new cs42l51_snd_controls[] = {
+	{
+	 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+	 .name = "Playback DAC Volume",
+	 .info = cs42l51_vol_info,
+	 .get = cs42l51_vol_get,
+	 .put = cs42l51_vol_set},
+};
+
+/* add non dapm controls */
+static int cs42l51_add_controls(struct snd_soc_codec *codec)
+{
+	int err, i;
+
+	CS42L51_DEBUG("");
+
+	for (i = 0; i < ARRAY_SIZE(cs42l51_snd_controls); i++) {
+		err = snd_ctl_add(codec->card,
+				  snd_soc_cnew(&cs42l51_snd_controls[i], codec,
+					       NULL));
+
+		if (err < 0)
+			return err;
+	}
+	return 0;
+}
+
+static int cs42l51_startup(struct snd_pcm_substream *stream,
+				struct snd_soc_dai *dai)
+{
+	CS42L51_DEBUG("");
+	return 0;
+}
+
+static void cs42l51_shutdown(struct snd_pcm_substream *substream,
+				struct snd_soc_dai *dai)
+{
+	CS42L51_DEBUG("");
+}
+
+static int cs42l51_hw_params(struct snd_pcm_substream *substream,
+				struct snd_pcm_hw_params *hw_params,
+				struct snd_soc_dai *dai)
+{
+	CS42L51_DEBUG("");
+	return 0;
+}
+
+static int cs42l51_hw_free(struct snd_pcm_substream *stream,
+				struct snd_soc_dai *dai)
+{
+	CS42L51_DEBUG("");
+	return 0;
+}
+
+static int cs42l51_prepare(struct snd_pcm_substream *stream,
+				struct snd_soc_dai *dai)
+{
+	CS42L51_DEBUG("");
+	return 0;
+}
+
+static int cs42l51_trigger(struct snd_pcm_substream *stream, int cmd,
+				struct snd_soc_dai *dai)
+{
+	CS42L51_DEBUG("");
+	return 0;
+}
+
+static int cs42l51_mute(struct snd_soc_dai *dai, int mute)
+{
+	struct snd_soc_codec *codec = dai->codec;
+
+	CS42L51_DEBUG("mute=%d", mute);
+
+	if (mute)
+		cs42l51_set_bits(codec, CS42L51_REG_DAC_OUTPUT_CTRL, 0, 1, 3);
+	else
+		cs42l51_set_bits(codec, CS42L51_REG_DAC_OUTPUT_CTRL, 0, 1, 0);
+
+	return 0;
+}
+
+static int cs42l51_set_dai_sysclk(struct snd_soc_dai *codec_dai,
+				  int clk_id, unsigned int freq, int dir)
+{
+	CS42L51_DEBUG("clk_id=%d freq=%u dir=%d", clk_id, freq, dir);
+	return 0;
+}
+
+static int cs42l51_set_dai_fmt(struct snd_soc_dai *dai,
+			       unsigned int fmt)
+{
+	struct snd_soc_codec *codec = dai->codec;
+
+	CS42L51_DEBUG("fmt=%u", fmt);
+
+	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
+	case SND_SOC_DAIFMT_LEFT_J:
+		cs42l51_set_bits(codec, CS42L51_REG_IF_CNTRL, 3, 5, 0);
+		break;
+	case SND_SOC_DAIFMT_I2S:
+		cs42l51_set_bits(codec, CS42L51_REG_IF_CNTRL, 3, 5, 1);
+		break;
+	case SND_SOC_DAIFMT_RIGHT_J:
+		cs42l51_set_bits(codec, CS42L51_REG_IF_CNTRL, 3, 5, 2);
+		break;
+	default:
+		return -EINVAL;
+	}
+	return 0;
+}
+
+
+static int cs42l51_set_bias_level(struct snd_soc_codec *codec,
+				 enum snd_soc_bias_level level)
+{
+	CS42L51_DEBUG("bias level transition: %d -> %d",
+		codec->bias_level, level);
+	switch (level) {
+	case SND_SOC_BIAS_ON:
+	case SND_SOC_BIAS_PREPARE:
+		cs42l51_set_bits(codec, CS42L51_REG_POWER_CNTRL, 0, 0, 0);
+		break;
+	case SND_SOC_BIAS_STANDBY:
+	case SND_SOC_BIAS_OFF:
+		cs42l51_set_bits(codec, CS42L51_REG_POWER_CNTRL, 0, 0, 1);
+		break;
+	}
+	codec->bias_level = level;
+	return 0;
+}
+
+static struct snd_soc_dai_ops cs42l51_dai_ops = {
+		.startup = cs42l51_startup,
+		.shutdown = cs42l51_shutdown,
+		.hw_params = cs42l51_hw_params,
+		.hw_free = cs42l51_hw_free,
+		.prepare = cs42l51_prepare,
+		.trigger = cs42l51_trigger,
+		.digital_mute = cs42l51_mute,
+		.set_sysclk = cs42l51_set_dai_sysclk,
+		.set_fmt = cs42l51_set_dai_fmt,
+};
+
+
+struct snd_soc_dai cs42l51_dai = {
+	.name = "CS42L51",
+	.playback = {
+		     .stream_name = "Playback",
+		     .rate_min = 44100,
+		     .rate_max = 96000,
+		     .channels_min = 1,
+		     .channels_max = 2,
+		     .rates = (SNDRV_PCM_RATE_44100 |
+			       SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000),
+		     .formats = (SNDRV_PCM_FMTBIT_S16_LE |
+				 SNDRV_PCM_FMTBIT_S24_LE |
+				 SNDRV_PCM_FMTBIT_S32_LE),
+		     },
+	.capture = {
+		    .stream_name = "Capture",
+		    .rate_min = 44100,
+		    .rate_max = 96000,
+		    .channels_min = 1,
+		    .channels_max = 2,
+		    .rates = (SNDRV_PCM_RATE_44100 |
+			      SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000),
+		    .formats = (SNDRV_PCM_FMTBIT_S16_LE |
+				SNDRV_PCM_FMTBIT_S24_LE |
+				SNDRV_PCM_FMTBIT_S32_LE),
+		    },
+	/* pcm operations */
+	.ops = &cs42l51_dai_ops,
+};
+EXPORT_SYMBOL_GPL(cs42l51_dai);
+
+static int cs42l51_init(struct snd_soc_device *socdev)
+{
+	struct snd_soc_codec *codec = socdev->card->codec;
+	u8 reg;
+	int ret;
+
+	CS42L51_DEBUG("");
+
+	codec->owner = THIS_MODULE;
+	codec->name = "CS42L51";
+	codec->dai = &cs42l51_dai;
+	codec->set_bias_level = cs42l51_set_bias_level;
+	codec->num_dai = 1;
+	codec->reg_cache_size = CS42L51_CACHE_SIZE;
+	codec->reg_cache = kzalloc(codec->reg_cache_size, GFP_KERNEL);
+	if (!codec->reg_cache)
+		return -ENOMEM;
+
+	cs42l51_fill_cache(codec);
+
+	ret = -ENODEV;
+
+	reg = cs42l51_read(codec, CS42L51_REG_ID);
+	printk(KERN_INFO "cs42l51: chipid/revision = %x\n", reg);
+
+	/* Set the digital Interface format to I2S-up-to-24-bit */
+	cs42l51_set_bits(codec, CS42L51_REG_IF_CNTRL, 3, 5, 1);
+
+	/* Set the ADC Mode */
+	cs42l51_set_bits(codec, CS42L51_REG_IF_CNTRL, 2, 2, 1);
+
+	/* init the chip */
+	/* use signal processor */
+	cs42l51_write(codec, CS42L51_REG_DAC_CTRL, 0x40);
+	/* Unmute PCM-A & PCM-B and set default */
+	cs42l51_write(codec, CS42L51_REG_PCMA_MIXER_VOL_CNTRL, 0x10);
+	cs42l51_write(codec, CS42L51_REG_PCMB_MIXER_VOL_CNTRL, 0x10);
+	/* default for AOUTx */
+	cs42l51_write(codec, CS42L51_REG_VOL_OUTA_CTRL, cs42l51_vol2reg(4));
+	cs42l51_write(codec, CS42L51_REG_VOL_OUTB_CTRL, cs42l51_vol2reg(4));
+	/* swap channels */
+	cs42l51_write(codec, CS42L51_REG_CHANNEL_MIXER, 0xff);
+
+	cs42l51_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
+
+	/* register pcms */
+	ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
+	if (ret < 0) {
+		pr_err("failed to create pcms");
+		goto pcm_err;
+	}
+	cs42l51_add_controls(codec);
+
+
+	ret = snd_soc_init_card(socdev);
+	if (ret < 0) {
+		pr_err("failed to register card\n");
+		goto card_err;
+	}
+	return 0;
+
+card_err:
+	snd_soc_free_pcms(socdev);
+
+pcm_err:
+	kfree(codec->reg_cache);
+	return ret;
+}
+
+#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
+
+static const struct i2c_device_id cs42l51_i2c_table[] = {
+	{"cs42l51", 0},
+	{}
+};
+
+MODULE_DEVICE_TABLE(i2c, cs42l51_i2c_table);
+
+static struct i2c_driver cs42l51_i2c_driver;
+static struct snd_soc_device *cs42l51_socdev;
+
+static int cs42l51_i2c_probe(struct i2c_client *client,
+			     const struct i2c_device_id *id)
+{
+	struct snd_soc_device *socdev = cs42l51_socdev;
+	struct snd_soc_codec *codec = socdev->card->codec;
+	struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent);
+	int ret;
+
+	CS42L51_DEBUG("");
+
+	if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_EMUL))
+		return -EIO;
+
+	i2c_set_clientdata(client, codec);
+	codec->control_data = client;
+
+	codec->read = cs42l51_read;
+	codec->write = cs42l51_write;
+
+	ret = cs42l51_init(socdev);
+	if (ret < 0)
+		goto err;
+
+	return ret;
+
+err:
+	kfree(codec);
+	return ret;
+}
+
+static int cs42l51_i2c_remove(struct i2c_client *client)
+{
+	return 0;
+}
+
+static struct i2c_driver cs42l51_i2c_driver = {
+	.driver = {
+		   .name = "cs42l51",
+		   .owner = THIS_MODULE,
+		   },
+	.probe = cs42l51_i2c_probe,
+	.remove = cs42l51_i2c_remove,
+	.id_table = cs42l51_i2c_table,
+};
+
+#endif
+
+static int cs42l51_probe(struct platform_device *pdev)
+{
+	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
+	struct snd_soc_codec *codec;
+	struct cs42l51_priv *cs;
+	struct cs42l51_setup_data *setup;
+	int ret;
+
+	CS42L51_DEBUG("");
+
+	ret = -ENOMEM;
+	setup = socdev->codec_data;
+	codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
+	if (codec == NULL)
+		goto out;
+
+	cs = kzalloc(sizeof(struct cs42l51_priv), GFP_KERNEL);
+	if (cs == NULL) {
+		kfree(codec);
+		goto out;
+	}
+	ret = 0;
+
+	cs->codec = codec;
+	codec->private_data = cs;
+	socdev->card->codec = codec;
+	mutex_init(&codec->mutex);
+	INIT_LIST_HEAD(&codec->dapm_widgets);
+	INIT_LIST_HEAD(&codec->dapm_paths);
+
+	cs42l51_socdev = socdev;
+#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
+	if (setup && setup->i2c_address) {
+		codec->hw_write = (hw_write_t) i2c_master_send;
+		ret = i2c_add_driver(&cs42l51_i2c_driver);
+		if (ret)
+			printk(KERN_ERR "can't add i2c driver\n");
+	}
+#endif
+
+out:
+	return ret;
+}
+
+/* power down chip */
+static int cs42l51_remove(struct platform_device *pdev)
+{
+	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
+	struct snd_soc_codec *codec = socdev->card->codec;
+
+	CS42L51_DEBUG("");
+
+	snd_soc_free_pcms(socdev);
+#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
+	i2c_del_driver(&cs42l51_i2c_driver);
+#endif
+	kfree(codec->private_data);
+	kfree(codec);
+
+	return 0;
+}
+
+static int cs42l51_suspend(struct platform_device *pdev, pm_message_t state)
+{
+	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
+	struct snd_soc_codec *codec = socdev->card->codec;
+
+	CS42L51_DEBUG("event=%d", state.event);
+
+	cs42l51_set_bias_level(codec, SND_SOC_BIAS_OFF);
+
+	return 0;
+}
+
+static int cs42l51_resume(struct platform_device *pdev)
+{
+	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
+	struct snd_soc_codec *codec = socdev->card->codec;
+
+	CS42L51_DEBUG("");
+
+	cs42l51_sync_cache(codec);
+	cs42l51_set_bias_level(codec, codec->suspend_bias_level);
+
+	return 0;
+}
+
+struct snd_soc_codec_device soc_codec_dev_cs42l51 = {
+	.probe = cs42l51_probe,
+	.remove = cs42l51_remove,
+	.suspend = cs42l51_suspend,
+	.resume = cs42l51_resume,
+};
+EXPORT_SYMBOL_GPL(soc_codec_dev_cs42l51);
+
+static int __init cs42l51_modinit(void)
+{
+	CS42L51_DEBUG("");
+	return snd_soc_register_dai(&cs42l51_dai);
+}
+module_init(cs42l51_modinit);
+
+static void __exit cs42l51_modexit(void)
+{
+	CS42L51_DEBUG("");
+	snd_soc_unregister_dai(&cs42l51_dai);
+}
+module_exit(cs42l51_modexit);
+
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("ASoC CS42l51 codec driver");
+MODULE_AUTHOR("Yuval Elmaliah <eyuval@marvell.com>");
--- linux-mvl-dove-2.6.32.orig/sound/soc/codecs/rt5630.c
+++ linux-mvl-dove-2.6.32/sound/soc/codecs/rt5630.c
@@ -0,0 +1,2458 @@
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/pm.h>
+#include <linux/i2c.h>
+#include <linux/platform_device.h>
+#include <linux/spi/spi.h>
+#include <linux/jiffies.h>
+#include <asm/delay.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <sound/soc.h>
+#include <sound/soc-dapm.h>
+#include <sound/initval.h>
+#include <sound/tlv.h>
+#include <asm/div64.h>
+
+#include "rt5630.h"
+
+#define RT5630_VERSION "0.04"
+
+/*
+#define RT5630_DEBUG(format, args...) \
+	printk(KERN_DEBUG "%s(%d): "format"\n", __FUNCTION__, __LINE__, ##args)
+*/
+
+#define RT5630_DEBUG(format, args...)
+#if  CONFIG_SND_DOVE_SOC_AC97_AVD1
+extern int spk_amplifier_enable(bool enable);
+#endif
+struct rt5630_priv {
+	unsigned int stereo_sysclk;
+	unsigned int voice_sysclk;
+};
+
+struct rt5630_init_reg {
+	char name[26];
+	u16 reg_value;
+	u8 reg_index;
+};
+
+static struct rt5630_init_reg rt5630_init_list[] = {
+	{"HP Output Volume", 0x9090, RT5630_HP_OUT_VOL},
+	{"SPK Output Volume", 0x8080, RT5630_SPK_OUT_VOL},
+	{"DAC Mic Route", 0xee03, RT5630_DAC_AND_MIC_CTRL},
+	{"Output Mixer Control", 0x0748, RT5630_OUTPUT_MIXER_CTRL},
+	{"Mic Control", 0x0500, RT5630_MIC_CTRL},
+	{"Voice DAC Volume", 0x6020, RT5630_VOICE_DAC_OUT_VOL},
+	{"ADC Rec Mixer", 0x5f5f, RT5630_ADC_REC_MIXER}, //mic 2 On, others Mute in ADC_REC_MIXER
+	{"General Control", 0x0c0a, RT5630_GEN_CTRL_REG1},
+	{"PCM Capture Volume",0xdfdf, RT5630_ADC_REC_GAIN},
+};
+
+#define RT5630_INIT_REG_NUM ARRAY_SIZE(rt5630_init_list)
+
+/*
+ *	bit[0]  for linein playback switch
+ *	bit[1] phone
+ *	bit[2] mic1
+ *	bit[3] mic2
+ *	bit[4] vopcm
+ *	
+ */
+ #define HPL_MIXER 0x80
+#define HPR_MIXER 0x82
+static unsigned int reg80 = 0, reg82 = 0;
+
+/*
+ *	bit[0][1] use for aec control
+ *	bit[4] for SPKL pga
+ *	bit[5] for SPKR pga
+ *	bit[6] for hpl pga
+ *	bit[7] for hpr pga
+ *	bit[8-9] for misc dsp func
+ *	bit[10-11] for ve mode
+ */
+ /*
+ * bit[14] ve switch
+ * bit[15] aec switch
+ */
+ #define VIRTUAL_REG_FOR_MISC_FUNC 0x84
+static unsigned int reg84 = 0;
+
+
+static const u16 rt5630_reg[] = {
+	0x59b4, 0x8080, 0x8080, 0x8080,		/*reg00-reg06*/
+	0xc800, 0xe808, 0x1010, 0x0808,		/*reg08-reg0e*/
+	0xe0ef, 0xcbcb, 0x7f7f, 0x0000,		/*reg10-reg16*/
+	0xe010, 0x0000, 0x8008, 0x2007,		/*reg18-reg1e*/
+	0x0000, 0x0000, 0x00c0, 0xef00,		/*reg20-reg26*/
+	0x0000, 0x0000, 0x0000, 0x0000,		/*reg28-reg2e*/
+	0x0000, 0x0000, 0x0000, 0x0000,		/*reg30-reg36*/
+	0x0000, 0x0000, 0x0000, 0x0000, 		/*reg38-reg3e*/
+	0x0c0a, 0x0000, 0x0000, 0x0000,		/*reg40-reg46*/
+	0x0029, 0x0000, 0xbe3e, 0x3e3e,		/*reg48-reg4e*/
+	0x0000, 0x0000, 0x803a, 0x0000,		/*reg50-reg56*/
+	0x0000, 0x0009, 0x0000, 0x3000,		/*reg58-reg5e*/
+	0x3075, 0x1010, 0x3110, 0x0000,		/*reg60-reg66*/
+	0x0553, 0x0000, 0x0000, 0x0000,		/*reg68-reg6e*/
+	0x0000, 0x0000, 0x0000, 0x0000,		/*reg70-reg76*/
+	0x0000, 0x0000, 0x0000, 0x0000,               /*reg76-reg7e*/
+};
+
+
+Voice_DSP_Reg VODSP_AEC_Init_Value[]=
+{
+	{0x232C, 0x0025},
+	{0x2308, 0x007f},
+	{0x237f, 0x0046},
+	{0x23f8, 0x4002},
+	{0x231a, 0x0000},
+	{0x2301, 0x0002},
+	{0x2328, 0x0001},
+	{0x231b, 0x0001},
+	{0x2304, 0x00fc},
+	{0x2305, 0x0800},
+	{0x2306, 0x4000},
+	{0x230b, 0x0003},
+	{0x230d, 0x0800},
+	{0x230e, 0x0100},
+	{0x2314, 0xc000},
+	{0x22cf, 0x0000},
+	{0x22c0, 0x8800},
+	{0x22c1, 0x1650},
+	{0x22c2, 0x18e0},
+	{0x22c3, 0x0a50},
+	{0x22c4, 0x05e0},
+	{0x2311, 0x0101},
+	{0x2312, 0x4081},
+	{0x2315, 0x9318},
+	{0x2316, 0x0011}, 
+	{0x2317, 0x1000},
+	{0x2318, 0x1800},
+	{0x2319, 0x1800},
+	{0x231c, 0x1800},
+	{0x231d, 0x0400},
+	{0x2326, 0x1600},
+	{0x2335, 0x0004},
+	{0x2336, 0x0001},
+	{0x233a, 0x0180},
+	{0x233b, 0x0100},
+	{0x233e, 0x0002},
+	{0x233f, 0xfffe},
+	{0x2344, 0x4000},
+	{0x2351, 0x1c40},
+	{0x2352, 0x2000},
+	{0x2353, 0x6000},
+	{0x235c, 0x0800},
+	{0x2366, 0x0900},
+	{0x2367, 0x19A0},
+	{0x236F, 0x4000},
+	{0x2370, 0x7100},
+	{0x2375, 0x0004},
+	{0x2376, 0x0820},
+	{0x2377, 0x1018},
+	{0x2379, 0x2000},
+	{0x237A, 0x2000},
+	{0x237b, 0x2000},
+	{0x237d, 0x2000},
+	{0x238b, 0x2000},
+	{0x238c, 0x0400},
+	{0x238d, 0x2000},
+	{0x238e, 0x3000},
+	{0x2391, 0x0008},
+	{0x2392, 0x0200},
+	{0x2399, 0x0009},
+	{0x23A8, 0x0040},
+	{0x23AB, 0x02C0},
+	{0x23B0, 0x3000},
+	{0x23B1, 0x1980},
+	{0x23B2, 0x1980},
+	{0x23B4, 0x4000},
+	{0x23B5, 0x1000},
+	{0x23B6, 0x6800},
+	{0x23B7, 0x2900},
+	{0x23Bb, 0x0010},
+	{0x23Bc, 0x0060},
+	{0x23Bd, 0x0900},
+	{0x23Be, 0x1500},
+	{0x23Bf, 0x0800},
+	{0x23c0, 0x4200},
+	{0x23cd, 0x0400},
+	{0x23ce, 0x1800},	
+	{0x23cf, 0x1a00},
+	{0x23d0, 0x2000},
+	{0x23d1, 0x2b00},
+	{0x23d2, 0x000e},
+	{0x23d3, 0x0009},
+	{0x23d4, 0x0080},
+	{0x23d5, 0x0024},
+	{0x23dd, 0xfff5},
+	{0x23df, 0x0200},
+	{0x23f0, 0x0200},
+	{0x23fc, 0x0009},
+	{0x23fb, 0x0560},
+	{0x22f0, 0x0c00},
+	{0x22f6, 0x00a0},
+	{0x11de, 0x0001},
+	{0x23b9, 0x000d},
+	{0x23a0, 0x6000},
+	{0x23a1, 0x0050},
+	{0x23a2, 0x0060},
+	{0x23a3, 0x0070},
+	{0x239b, 0x0070},
+	{0x239d, 0x003f},
+	{0x239e, 0x0038},
+	{0x239f, 0x0030},
+	
+	{0x230C, 0x0000},	//to enable VODSP AEC function
+};
+
+
+#define SET_VODSP_REG_AEC_INIT_NUM	ARRAY_SIZE(VODSP_AEC_Init_Value)
+
+Voice_DSP_Reg VODSP_VE_Init_Value[]=
+{
+	{0x232C, 0x0025},
+	{0x230B, 0x0003},
+	{0x2308, 0x007F},
+	{0x23F8, 0x4002},
+	{0x231a, 0x0000},
+	{0x23FF, 0x8002},
+	{0x2301, 0x0002},
+	{0x231b, 0x0001},
+
+	{0x2305, 0x0200},
+	{0x2306, 0x4000},
+	{0x230B, 0x8003},
+	{0x230D, 0x0100},
+	{0x230E, 0x0100},
+
+	{0x2312, 0x00B1},
+	{0x2315, 0x002d},
+	{0x2316, 0x007e},
+	{0x2317, 0x1200},
+	{0x2318, 0x0C00},
+	{0x2319, 0x0e40},
+	{0x231c, 0x3000},
+	
+	{0x236B, 0x1000},
+	{0x236d, 0x474b},
+	{0x236f, 0x4000},
+	{0x2370, 0x7100},
+	{0x23ab, 0x02c0},
+	{0x23B1, 0x2b00},
+	{0x23B2, 0x2900},
+	{0x23B6, 0x7800},
+	{0x23Bb, 0x0300},
+	{0x23Bc, 0x0100},
+	{0x23Bd, 0x0d00},
+	{0x23Be, 0x1000},
+	{0x23fb, 0x0e00},
+
+	{0x23B9, 0x000d},
+	{0x23a0, 0x6000},
+	{0x23a1, 0x0050},
+	{0x23a2, 0x0060},
+	{0x23a3, 0x0070},
+
+	{0x239b, 0x0070},
+	{0x239d, 0x003f},
+	{0x2393, 0x0038},
+	{0x239f, 0x0030},
+	{0x230C, 0x0000},	//to enable VODSP VE function
+};
+
+#define SET_VODSP_VE_REG_INIT_NUM	(sizeof(VODSP_VE_Init_Value)/sizeof(Voice_DSP_Reg))
+
+
+struct Voice_DSP_Function
+{
+	int feature;
+	Voice_DSP_Reg *reg_setting;
+	int regsize;
+};
+
+static int dsp_init_state;
+
+static struct Voice_DSP_Function voice_dsp_function_table[] =
+{
+		{VODSP_AEC_FUNC, VODSP_AEC_Init_Value, SET_VODSP_REG_AEC_INIT_NUM},
+		{VODSP_VE_FUNC, VODSP_VE_Init_Value, SET_VODSP_VE_REG_INIT_NUM},
+		{VODSP_ALL_FUNC, NULL, 0},
+};
+
+
+
+static struct snd_soc_device *rt5630_socdev;
+
+static inline unsigned int rt5630_read_reg_cache(struct snd_soc_codec *codec, 
+	unsigned int reg)
+{
+	u16 *cache = codec->reg_cache;
+
+	if (reg > 0x7e)
+		return -1;
+	return cache[reg / 2];
+}
+
+
+static unsigned int rt5630_read_hw_reg(struct snd_soc_codec *codec, unsigned int reg) 
+{
+	u8 data[2] = {0};
+	unsigned int value = 0x0;
+	
+	data[0] = reg;
+	if (codec->hw_write(codec->control_data, data, 1) == 1)
+	{
+		i2c_master_recv(codec->control_data, data, 2);
+		value = (data[0] << 8) | data[1];
+//		RT5630_DEBUG("%s read reg%x = %x\n", reg, value);
+		return value;
+	}
+	else
+	{
+		RT5630_DEBUG("%s failed\n");
+		return -EIO;
+	}
+}
+
+
+static unsigned int rt5630_read(struct snd_soc_codec *codec, unsigned int reg)
+{
+	if ((reg == 0x80)
+		|| (reg == 0x82)
+		|| (reg == 0x84))
+		return (reg == 0x80) ? reg80 : ((reg == 0x82) ? reg82 : reg84);
+
+
+
+	return rt5630_read_hw_reg(codec, reg);
+}
+
+
+static inline void rt5630_write_reg_cache(struct snd_soc_codec *codec,
+	unsigned int reg, unsigned int value)
+{
+	u16 *cache = codec->reg_cache;
+	if (reg > 0x7E)
+		return;
+	cache[reg / 2] = value;
+}
+
+static int rt5630_write(struct snd_soc_codec *codec, unsigned int reg,
+	unsigned int value)
+{
+	u8 data[3];
+	unsigned int *regvalue = NULL;
+
+	data[0] = reg;
+	data[1] = (value & 0xff00) >> 8;
+	data[2] = value & 0x00ff;
+
+	
+	if ((reg == 0x80)
+		|| (reg == 0x82)
+		|| (reg == 0x84))
+	{		
+		regvalue = ((reg == 0x80) ? &reg80 : ((reg == 0x82) ? &reg82 : &reg84));
+		*regvalue = value;
+		RT5630_DEBUG("rt5630_write ok, reg = %x, value = %x\n", reg, value);
+		return 0;
+	}
+	rt5630_write_reg_cache(codec, reg, value);
+	if (codec->hw_write(codec->control_data, data, 3) == 3)
+	{
+		RT5630_DEBUG("rt5630_write ok, reg = %x, value = %x\n", reg, value);
+		return 0;
+	}
+	else 
+	{
+		printk(KERN_ERR "rt5630_write fail\n");
+		return -EIO;
+	}
+}
+
+
+#define rt5630_write_mask(c, reg, value, mask) snd_soc_update_bits(c, reg, mask, value)
+
+#define rt5630_reset(c) rt5630_write(c, RT5630_RESET, 0)
+
+static int rt5630_reg_init(struct snd_soc_codec *codec)
+{
+	int i;
+
+	for (i = 0; i < RT5630_INIT_REG_NUM; i++)
+		rt5630_write(codec, rt5630_init_list[i].reg_index, rt5630_init_list[i].reg_value);
+
+	return 0;
+}
+
+
+/*read/write dsp reg*/
+static int rt5630_wait_vodsp_i2c_done(struct snd_soc_codec *codec)
+{
+	unsigned int checkcount = 0, vodsp_data;
+
+	vodsp_data = rt5630_read(codec, RT5630_VODSP_REG_CMD);
+	while(vodsp_data & VODSP_BUSY)
+	{
+		if(checkcount > 10)
+			return -EBUSY;
+		vodsp_data = rt5630_read(codec, RT5630_VODSP_REG_CMD);
+		checkcount ++;		
+	}
+	return 0;
+}
+
+
+static int rt5630_write_vodsp_reg(struct snd_soc_codec *codec, unsigned int vodspreg, unsigned int value)
+{
+	int ret = 0;
+
+	if(ret = rt5630_wait_vodsp_i2c_done(codec))
+		return ret;
+
+	rt5630_write(codec, RT5630_VODSP_REG_ADDR, vodspreg);
+	rt5630_write(codec, RT5630_VODSP_REG_DATA, value);
+	rt5630_write(codec, RT5630_VODSP_REG_CMD, VODSP_WRITE_ENABLE | VODSP_CMD_MW);
+
+	return ret;
+	
+}
+
+static int rt5630_read_vodsp_reg(struct snd_soc_codec *codec, unsigned int vodspreg)
+{
+	int ret = 0;
+	unsigned int nDataH, nDataL;
+
+	if(ret = rt5630_wait_vodsp_i2c_done(codec))
+		return ret;
+	
+	rt5630_write(codec, RT5630_VODSP_REG_ADDR, vodspreg);
+	rt5630_write(codec, RT5630_VODSP_REG_CMD, VODSP_READ_ENABLE | VODSP_CMD_MR);
+
+	if (ret = rt5630_wait_vodsp_i2c_done(codec))
+		return ret;
+	rt5630_write(codec, RT5630_VODSP_REG_ADDR, 0x26);
+	rt5630_write(codec, RT5630_VODSP_REG_CMD, VODSP_READ_ENABLE | VODSP_CMD_RR);
+
+	if(ret = rt5630_wait_vodsp_i2c_done(codec))
+		return ret;
+	nDataH = rt5630_read(codec, RT5630_VODSP_REG_DATA);
+	rt5630_write(codec, RT5630_VODSP_REG_ADDR, 0x25);
+	rt5630_write(codec, RT5630_VODSP_REG_CMD, VODSP_READ_ENABLE | VODSP_CMD_RR);
+
+	if(ret = rt5630_wait_vodsp_i2c_done(codec))
+		return ret;
+	nDataL = rt5630_read(codec, RT5630_VODSP_REG_DATA);
+	return ((nDataH & 0xff) << 8) |(nDataL & 0xff);	
+}
+
+static unsigned int rt5630_read_index(struct snd_soc_codec *codec, unsigned int reg)
+{
+	unsigned int  val;
+
+	rt5630_write(codec, 0x6a, reg);
+	val = rt5630_read(codec, 0x6c);
+	return val;
+}
+
+
+static const char *rt5630_spk_out_sel[] = {"Class AB", "Class D"}; 					/*1*/
+static const char *rt5630_spk_l_source_sel[] = {"LPRN", "LPRP", "LPLN", "MM"};		/*2*/	
+static const char *rt5630_spkmux_source_sel[] = {"VMID", "HP Mixer", 
+							"SPK Mixer", "Mono Mixer"};               					/*3*/
+static const char *rt5630_hplmux_source_sel[] = {"VMID","HPL Mixer"};				/*4*/
+static const char *rt5630_hprmux_source_sel[] = {"VMID","HPR Mixer"};				/*5*/
+static const char *rt5630_auxmux_source_sel[] = {"VMID", "HP Mixer", 
+							"SPK Mixer", "Mono Mixer"};							/*6*/
+static const char *rt5630_spkamp_ratio_sel[] = {"2.25 Vdd", "2.00 Vdd",
+					"1.75 Vdd", "1.50 Vdd", "1.25 Vdd", "1.00 Vdd"};				/*7*/
+static const char *rt5630_mic1_boost_sel[] = {"Bypass", "+20db", "+30db", "+40db"};	/*8*/
+static const char *rt5630_mic2_boost_sel[] = {"Bypass", "+20db", "+30db", "+40db"};	/*9*/
+static const char *rt5630_dmic_boost_sel[] = {"Bypass", "+6db", "+12db", "+18db", 
+					"+24db", "+30db", "+36db", "+42db"};						/*10*/
+
+
+static const struct soc_enum rt5630_enum[] = {
+ 
+SOC_ENUM_SINGLE(RT5630_OUTPUT_MIXER_CTRL, 13, 2, rt5630_spk_out_sel),		/*1*/
+SOC_ENUM_SINGLE(RT5630_OUTPUT_MIXER_CTRL, 14, 4, rt5630_spk_l_source_sel),	/*2*/
+SOC_ENUM_SINGLE(RT5630_OUTPUT_MIXER_CTRL, 10, 4, rt5630_spkmux_source_sel),/*3*/
+SOC_ENUM_SINGLE(RT5630_OUTPUT_MIXER_CTRL, 9, 2, rt5630_hplmux_source_sel),	/*4*/
+SOC_ENUM_SINGLE(RT5630_OUTPUT_MIXER_CTRL, 8, 2, rt5630_hprmux_source_sel),/*5*/
+SOC_ENUM_SINGLE(RT5630_OUTPUT_MIXER_CTRL, 6, 4, rt5630_auxmux_source_sel),/*6*/
+SOC_ENUM_SINGLE(RT5630_GEN_CTRL_REG1, 1, 6, rt5630_spkamp_ratio_sel),		/*7*/
+SOC_ENUM_SINGLE(RT5630_MIC_CTRL, 10, 4,  rt5630_mic1_boost_sel),			/*8*/
+SOC_ENUM_SINGLE(RT5630_MIC_CTRL, 8, 4, rt5630_mic2_boost_sel),				/*9*/
+SOC_ENUM_SINGLE(RT5630_DMIC_CTRL, 0, 8, rt5630_dmic_boost_sel),				/*10*/
+};
+
+
+static int init_vodsp_update(struct snd_soc_codec *codec, struct Voice_DSP_Function *dsp_func)
+{
+	int i;
+	int ret;
+	unsigned int reg;
+	int timeout = 10;
+
+	RT5630_DEBUG("dsp_init_state=%d\n",dsp_init_state);
+
+	if (dsp_func->feature == dsp_init_state)
+	{
+		RT5630_DEBUG("init_vodsp_update: dsp_init_state no change, return\n");
+		return 0;
+	}
+	switch(dsp_init_state)
+	{
+//init_dsp:
+		case VODSP_NULL:
+			/*enable LDO power and set output voltage to 1.2V*/
+			rt5630_write_mask(codec, RT5630_LDO_CTRL,LDO_ENABLE|LDO_OUT_VOL_CTRL_1_20V,LDO_ENABLE|LDO_OUT_VOL_CTRL_MASK);
+			mdelay(20);
+		default:
+			rt5630_write_mask(codec, RT5630_VODSP_CTL,VODSP_NO_PD_MODE_ENA, VODSP_NO_PD_MODE_ENA);
+			mdelay(20);
+			rt5630_write_mask(codec, RT5630_PWR_MANAG_ADD3,PWR_VODSP_INTERFACE|PWR_I2C_FOR_VODSP,PWR_VODSP_INTERFACE|PWR_I2C_FOR_VODSP);
+			mdelay(1);
+			rt5630_write_mask(codec, RT5630_VODSP_CTL,0,VODSP_NO_RST_MODE_ENA);	/*Reset VODSP*/
+			mdelay(1);
+			rt5630_write_mask(codec, RT5630_VODSP_CTL,VODSP_NO_RST_MODE_ENA,VODSP_NO_RST_MODE_ENA);	/*set VODSP to non-reset status*/
+			mdelay(20);
+
+			dsp_init_state = dsp_func->feature;
+	                RT5630_DEBUG("dsp_init_state change to %d\n",dsp_init_state);
+
+			for (i = 0; i < dsp_func->regsize; i ++) {
+				ret = rt5630_write_vodsp_reg(codec, dsp_func->reg_setting[i].VoiceDSPIndex, dsp_func->reg_setting[i].VoiceDSPValue);
+				if (ret < 0)
+					return ret;
+			}
+			schedule_timeout_uninterruptible(msecs_to_jiffies(100));
+			reg = rt5630_read_vodsp_reg(codec, 0x230c);
+			while(timeout && (reg !=0x5a5a)) {
+				rt5630_write_vodsp_reg(codec, 0x230c, 0x0000);
+				schedule_timeout_uninterruptible(msecs_to_jiffies(10));
+				timeout --;
+				reg = rt5630_read_vodsp_reg(codec, 0x230c);
+				
+			}
+			if (!timeout) {
+				RT5630_DEBUG("warning: dsp dump not ok!\n");
+				rt5630_write_mask(codec, RT5630_LDO_CTRL,0,LDO_ENABLE|LDO_OUT_VOL_CTRL_MASK);
+				mdelay(20);
+//				goto init_dsp;
+			}
+			else
+				RT5630_DEBUG("dsp succesful to start\n");
+
+			break;
+	}
+	
+
+	//set VODSP to pown down mode	
+	rt5630_write_mask(codec, RT5630_VODSP_CTL,0,VODSP_NO_PD_MODE_ENA);	
+	rt5630_write_mask(codec, RT5630_PWR_MANAG_ADD3,0,PWR_VODSP_INTERFACE|PWR_I2C_FOR_VODSP);            //disable txdc/txdp/rxdp
+	return 0;
+}
+
+static int set_vodsp_aec_path(struct snd_soc_codec *codec, unsigned int mode)
+{
+	RT5630_DEBUG("mode=%d\n",mode);
+
+		switch(mode)
+		{
+			/*Far End signal is from Voice interface and Near End signal is from MIC1/MIC2)*/
+			case PCM_IN_PCM_OUT:
+
+				 /*	1.Far End setting(Far end device PCM out-->VODAC PCM IN--->VODSP_RXDP )*/
+				 
+				/*****************************************************************************
+				  *	a.Enable RxDP power and select RxDP source from "Voice to Stereo Digital path"		
+				  *	b.Voice PCM out from VoDSP TxDP(VODSP TXDP--->VODAC PCM out-->Far End devie PCM out)
+				  ******************************************************************************/
+				rt5630_write_mask(codec, RT5630_VODSP_PDM_CTL,VODSP_RXDP_PWR|VODSP_RXDP_S_SEL_VOICE|VOICE_PCM_S_SEL_AEC_TXDP
+															,VODSP_RXDP_PWR|VODSP_RXDP_S_SEL_MASK|VOICE_PCM_S_SEL_MASK);
+				 /*	2.Near end setting*/
+				/***********************************************************************************	 
+				  *	a.ADCR function select PDM Slave interface(Mic-->ADCR-->PDM interface)
+				  *	b.Voice DAC Source Select VODSP_TxDC
+				  ************************************************************************************/
+				rt5630_write_mask(codec, RT5630_DAC_ADC_VODAC_FUN_SEL,ADCR_FUNC_SEL_PDM|VODAC_SOUR_SEL_VODSP_TXDC
+																,ADCR_FUNC_SEL_MASK|VODAC_SOUR_SEL_MASK);
+
+				/*3.setting VODSP LRCK to 8k*/
+				rt5630_write_mask(codec, RT5630_VODSP_CTL,VODSP_LRCK_SEL_8K,VODSP_LRCK_SEL_MASK);						
+
+				break;
+			
+			/*Far End signal is from Analog input and Near End signal is from MIC1/MIC2)*/
+			case ANALOG_IN_ANALOG_OUT:	
+				/*	1.Far End setting(Far end device-->Analog in-->ADC_L-->VODSP_RXDP)   */
+				/************************************************************************	
+				  *	a.Enable RxDP power and select RxDP source from ADC_L 
+				  ************************************************************************/
+				rt5630_write_mask(codec, RT5630_VODSP_PDM_CTL,VODSP_RXDP_PWR|VODSP_RXDP_S_SEL_ADCL,
+															 VODSP_RXDP_PWR|VODSP_RXDP_S_SEL_MASK);
+
+				/*2.Near end setting*/
+					/*************************************************************************
+					  *a.VoDSP TxDP--->VODAC--->analog out-->to Far end analog input
+					  *b.ADCR function select PDM Slave interface(Mic-->ADCR-->PDM interface)
+					  *************************************************************************/
+				rt5630_write_mask(codec, RT5630_DAC_ADC_VODAC_FUN_SEL,ADCR_FUNC_SEL_PDM|VODAC_SOUR_SEL_VODSP_TXDP
+																	,ADCR_FUNC_SEL_MASK|VODAC_SOUR_SEL_MASK);
+				/*3.setting VODSP LRCK to 16k*/
+				rt5630_write_mask(codec, RT5630_VODSP_CTL,VODSP_LRCK_SEL_16K,VODSP_LRCK_SEL_MASK);	
+			
+				break;
+
+			/*Far End signal is from Playback and Near End signal is from MIC1/MIC2)*/
+			case DAC_IN_ADC_OUT:	
+				/***********************************************************************
+				  *	1.Far End setting(Playback-->SRC1-->VODSP_RXDP)
+				  *		a.enable SRC1 and VoDSP_RXDP source select SRC1
+				  *	2.Near End setting(VoDSP_TXDP-->SRC2-->Stereo Record)
+				  *		a.enable SRC2 and select Record source from SRC2
+				  **********************************************************************/
+			/*	  
+				rt5630_write_mask(codec, RT5630_VODSP_PDM_CTL,VODSP_SRC1_PWR|VODSP_SRC2_PWR|VODSP_RXDP_PWR|VODSP_RXDP_S_SEL_SRC1|REC_S_SEL_SRC2,
+															 VODSP_SRC1_PWR|VODSP_SRC2_PWR|VODSP_RXDP_PWR|VODSP_RXDP_S_SEL_MASK|REC_S_SEL_MASK);					
+			*/
+				rt5630_write(codec, 0x1a, 0xa820);
+				rt5630_write(codec, 0x2e, 0x3030);
+				break;
+
+			case VODSP_AEC_DISABLE:
+			default:
+			
+				/*set stereo DAC&Voice DAC&Stereo ADC function select to default*/ 
+				rt5630_write(codec, RT5630_DAC_ADC_VODAC_FUN_SEL,0);
+
+				/*set VODSP&PDM Control to default*/ 
+				rt5630_write(codec, RT5630_VODSP_PDM_CTL,0);	
+			
+				break;
+		}		
+
+	return 0;
+}
+
+
+
+int enable_vodsp_aec_func(struct snd_soc_codec *codec, unsigned int VodspAEC_En, unsigned int AEC_mode)
+{
+	int  ret = 0;
+	unsigned int reg;
+	RT5630_DEBUG("VodspAEC_En=%d\n",VodspAEC_En);
+	
+	if (VodspAEC_En != 0)
+	{	
+		//select input/output of VODSP AEC
+		set_vodsp_aec_path(codec, AEC_mode);		
+		//enable power of VODSP I2C interface & VODSP interface
+		rt5630_write_mask(codec, RT5630_PWR_MANAG_ADD3,PWR_VODSP_INTERFACE|PWR_I2C_FOR_VODSP,PWR_VODSP_INTERFACE|PWR_I2C_FOR_VODSP);
+		//enable power of VODSP I2S interface 
+		rt5630_write_mask(codec, RT5630_PWR_MANAG_ADD1,PWR_I2S_INTERFACE,PWR_I2S_INTERFACE);	
+		//set VODSP to active			
+		rt5630_write_mask(codec, RT5630_VODSP_CTL,VODSP_NO_PD_MODE_ENA,VODSP_NO_PD_MODE_ENA);	
+		mdelay(50);	
+		reg = rt5630_read_vodsp_reg(codec, 0x230c);
+		RT5630_DEBUG("dsp reg 0x230c is 0x%x\n", reg);	
+	}
+	else
+	{
+		//set VODSP AEC to power down mode			
+		rt5630_write_mask(codec, RT5630_VODSP_CTL,0,VODSP_NO_PD_MODE_ENA);
+		//disable power of VODSP I2C interface & VODSP interface
+		rt5630_write_mask(codec, RT5630_PWR_MANAG_ADD3,0,PWR_VODSP_INTERFACE|PWR_I2C_FOR_VODSP);
+		//disable VODSP AEC path
+		set_vodsp_aec_path(codec, VODSP_AEC_DISABLE);				
+	}
+
+	return ret;
+}
+
+EXPORT_SYMBOL_GPL(enable_vodsp_aec_func);
+
+
+
+static int set_vodsp_ve_path(struct snd_soc_codec *codec, int VE_mode)
+{
+RT5630_DEBUG("VE_mode=%d",VE_mode);
+	switch (VE_mode)
+	{
+		case TXDP_TO_I2S:
+			rt5630_write_mask(codec, 0x1a, 0x2020, 0x2030);                     /*I2S source from TXDP*/
+			break;
+		case TXDP_TO_PCM:
+			rt5630_write_mask(codec, 0x1a, 0x0080, 0x0080); 			       /*vodac source from TXDP*/
+			break;
+		case VE_DISABLE:
+			rt5630_write_mask(codec, 0x1a, 0x0000, 0x20b0);
+			break;
+		default:
+			return -EINVAL;		
+	}
+	return 0;
+}
+
+
+int enable_vodsp_ve_func(struct snd_soc_codec *codec, int vodsp_ve_en, int VE_mode)
+{
+	int ret = 0;
+	unsigned int reg;
+	RT5630_DEBUG("vodsp_ve_en=%d\n",vodsp_ve_en);
+
+	if(vodsp_ve_en != 0)
+	{	
+		set_vodsp_ve_path(codec, VE_mode);
+		//enable power of VODSP I2C interface & VODSP interface
+		rt5630_write_mask(codec, RT5630_PWR_MANAG_ADD3,PWR_VODSP_INTERFACE|PWR_I2C_FOR_VODSP,PWR_VODSP_INTERFACE|PWR_I2C_FOR_VODSP);
+		//enable power of VODSP I2S interface 
+		rt5630_write_mask(codec, RT5630_PWR_MANAG_ADD1,PWR_I2S_INTERFACE,PWR_I2S_INTERFACE);	
+		//set VODSP to active			
+		rt5630_write_mask(codec, RT5630_VODSP_CTL,VODSP_NO_PD_MODE_ENA,VODSP_NO_PD_MODE_ENA);	
+		msleep(50);	
+		reg = rt5630_read_vodsp_reg(codec, 0x230c);
+		RT5630_DEBUG("dsp reg 0x230c is 0x%x\n", reg);
+
+	}
+	else
+	{
+		//set VODSP to power down mode			
+		rt5630_write_mask(codec, RT5630_VODSP_CTL,0,VODSP_NO_PD_MODE_ENA);
+		//disable power of VODSP I2C interface & VODSP interface
+		rt5630_write_mask(codec, RT5630_PWR_MANAG_ADD3,0,PWR_VODSP_INTERFACE|PWR_I2C_FOR_VODSP);
+		set_vodsp_ve_path(codec, VE_DISABLE);
+	}
+
+	return ret;
+}
+EXPORT_SYMBOL_GPL(enable_vodsp_ve_func);
+
+
+static int realtek_aec_mode_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 
+{
+	struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+	int mode = codec->read(codec, VIRTUAL_REG_FOR_MISC_FUNC) & 0x8000;
+        RT5630_DEBUG("realtek_aec_mode_get:mode=%x \n", mode);
+
+	if (mode)
+		ucontrol->value.integer.value[0] = 1;
+	else 
+		ucontrol->value.integer.value[0] = 0;
+
+	return 0;
+}
+
+
+static int realtek_aec_mode_set(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
+{
+	struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+	int mode = codec->read(codec, VIRTUAL_REG_FOR_MISC_FUNC);
+
+	RT5630_DEBUG("realtek_aec_mode_set:mode=%x, uctrl=%d\n", mode,ucontrol->value.integer.value[0]);
+
+	init_vodsp_update(codec, &voice_dsp_function_table[0]);
+
+//	if (((mode & 0x8000) >> 15) == ucontrol->value.integer.value[0])
+//		return 0;
+
+	mode &= ~(0x8000);
+	mode |= (ucontrol->value.integer.value[0] << 15);
+	codec->write(codec, VIRTUAL_REG_FOR_MISC_FUNC, mode);
+	enable_vodsp_aec_func(codec, ucontrol->value.integer.value[0], DAC_IN_ADC_OUT);
+	RT5630_DEBUG("realtek_aec_mode_set:mode change to %x \n", mode);
+
+	return 0;
+}
+
+static int realtek_ve_mode_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
+{
+	struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+	int mode = codec->read(codec, VIRTUAL_REG_FOR_MISC_FUNC) & 0x4000;
+	RT5630_DEBUG("realtek_ve_mode_get:mode=%x \n", mode);
+
+	if (mode)
+		ucontrol->value.integer.value[0] = 1;
+	else 
+		ucontrol->value.integer.value[0] = 0;
+
+	return 0;
+}
+
+static int realtek_ve_mode_set(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
+{
+	struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+	int mode = codec->read(codec, VIRTUAL_REG_FOR_MISC_FUNC);
+	RT5630_DEBUG("realtek_ve_mode_set:mode=%x, uctrl=%d\n", mode,ucontrol->value.integer.value[0]);
+
+	init_vodsp_update(codec, &voice_dsp_function_table[1]);
+
+//	if (((mode & 0x4000) >> 14) == ucontrol->value.integer.value[0])
+//		return 0;
+
+	mode &= ~(0x4000);
+	mode |= (ucontrol->value.integer.value[0] << 14);
+	codec->write(codec, VIRTUAL_REG_FOR_MISC_FUNC, mode);
+	enable_vodsp_ve_func(codec, ucontrol->value.integer.value[0], TXDP_TO_I2S);
+	RT5630_DEBUG("realtek_ve_mode_set:mode change to %x \n", mode);
+
+	return 0;
+}
+static const struct snd_kcontrol_new rt5630_snd_controls[] = {
+//SOC_ENUM("SPK Amp Type", rt5630_enum[0]),
+//SOC_ENUM("Left SPK Source", rt5630_enum[1]),
+//SOC_ENUM("SPK Amp Ratio", rt5630_enum[6]),
+//SOC_ENUM("Mic1 Boost", rt5630_enum[7]),
+//SOC_ENUM("Mic2 Boost", rt5630_enum[8]),
+//SOC_ENUM("Dmic Boost", rt5630_enum[9]),
+//SOC_DOUBLE("LineIn Playback Volume", RT5630_LINE_IN_VOL, 8, 0, 31, 1),
+//SOC_SINGLE("Phone Playback Volume", RT5630_PHONEIN_VOL, 8, 31, 1),
+//SOC_SINGLE("Mic1 Playback Volume", RT5630_MIC_VOL, 8, 31, 1),
+SOC_SINGLE("EAR MIC Playback Volume", RT5630_MIC_VOL, 0, 31, 1),
+SOC_DOUBLE("PCM Capture Volume", RT5630_ADC_REC_GAIN, 8, 0, 31, 0),
+SOC_DOUBLE("SPKOUT Playback Volume", RT5630_SPK_OUT_VOL, 8, 0, 31, 1),
+SOC_DOUBLE("SPKOUT Playback Switch", RT5630_SPK_OUT_VOL, 15, 7, 1, 1),
+SOC_DOUBLE("HPOUT Playback Volume", RT5630_HP_OUT_VOL, 8, 0, 31, 1),
+SOC_DOUBLE("HPOUT Playback Switch", RT5630_HP_OUT_VOL, 15, 7, 1, 1),
+//SOC_DOUBLE("AUXOUT Playback Volume", RT5630_AUX_OUT_VOL, 8, 0, 31, 1),
+//SOC_DOUBLE("AUXOUT Playback Switch", RT5630_AUX_OUT_VOL, 15, 7, 1, 1),
+//SOC_SINGLE_EXT("AEC Switch", VIRTUAL_REG_FOR_MISC_FUNC, 15, 1, 0, realtek_aec_mode_get, realtek_aec_mode_set),
+SOC_SINGLE_EXT("DIG MIC Switch", VIRTUAL_REG_FOR_MISC_FUNC, 14, 1, 0, realtek_ve_mode_get,realtek_ve_mode_set),
+};
+
+static int rt5630_add_controls(struct snd_soc_codec *codec)
+{
+	int err, i;
+
+	for (i = 0; i < ARRAY_SIZE(rt5630_snd_controls); i++){
+		err = snd_ctl_add(codec->card, 
+				snd_soc_cnew(&rt5630_snd_controls[i],
+						codec, NULL));
+		if (err < 0)
+			return err;
+	}
+	return 0;
+}
+
+static void hp_depop_mode2(struct snd_soc_codec *codec)
+{
+	RT5630_DEBUG("");
+
+	rt5630_write_mask(codec, RT5630_PWR_MANAG_ADD1, PWR_MAIN_BIAS, PWR_MAIN_BIAS);
+	rt5630_write_mask(codec, RT5630_PWR_MANAG_ADD2, PWR_MIXER_VREF, PWR_MIXER_VREF);
+	rt5630_write_mask(codec, RT5630_PWR_MANAG_ADD1, PWR_SOFTGEN_EN, PWR_SOFTGEN_EN);
+	rt5630_write_mask(codec, RT5630_PWR_MANAG_ADD3, PWR_HP_R_OUT_VOL|PWR_HP_L_OUT_VOL,
+		PWR_HP_R_OUT_VOL|PWR_HP_L_OUT_VOL);
+	rt5630_write_mask(codec, RT5630_MISC_CTRL, HP_DEPOP_MODE2_EN, HP_DEPOP_MODE2_EN);
+	schedule_timeout_uninterruptible(msecs_to_jiffies(300));
+	rt5630_write_mask(codec, RT5630_MISC_CTRL, 0, HP_DEPOP_MODE2_EN);
+	rt5630_write_mask(codec, RT5630_PWR_MANAG_ADD1, PWR_HP_OUT_AMP,
+		PWR_HP_OUT_AMP);
+}
+
+#if USE_DAPM_CTRL
+/*
+ * _DAPM_ Controls
+ */
+ /*Left ADC Rec mixer*/
+static const struct snd_kcontrol_new rt5630_left_adc_rec_mixer_controls[] = {
+SOC_DAPM_SINGLE("Mic1 Capture Switch", RT5630_ADC_REC_MIXER, 14, 1, 1),
+SOC_DAPM_SINGLE("Mic2 Capture Switch", RT5630_ADC_REC_MIXER, 13, 1, 1),
+SOC_DAPM_SINGLE("LineIn Capture Switch", RT5630_ADC_REC_MIXER, 12, 1, 1),
+SOC_DAPM_SINGLE("Phone Capture Switch", RT5630_ADC_REC_MIXER, 11, 1, 1),
+SOC_DAPM_SINGLE("HP Mixer Capture Switch", RT5630_ADC_REC_MIXER, 10, 1, 1),
+SOC_DAPM_SINGLE("MoNo Mixer Capture Switch", RT5630_ADC_REC_MIXER, 8, 1, 1),
+SOC_DAPM_SINGLE("SPK Mixer Capture Switch", RT5630_ADC_REC_MIXER, 9, 1, 1),
+
+};
+
+/*Left ADC Rec mixer*/
+static const struct snd_kcontrol_new rt5630_right_adc_rec_mixer_controls[] = {
+SOC_DAPM_SINGLE("Mic1 Capture Switch", RT5630_ADC_REC_MIXER, 6, 1, 1),
+SOC_DAPM_SINGLE("Mic2 Capture Switch", RT5630_ADC_REC_MIXER, 5, 1, 1),
+SOC_DAPM_SINGLE("LineIn Capture Switch", RT5630_ADC_REC_MIXER, 4, 1, 1),
+SOC_DAPM_SINGLE("Phone Capture Switch", RT5630_ADC_REC_MIXER, 3, 1, 1),
+SOC_DAPM_SINGLE("HP Mixer Capture Switch", RT5630_ADC_REC_MIXER, 2, 1, 1),
+SOC_DAPM_SINGLE("MoNo Mixer Capture Switch", RT5630_ADC_REC_MIXER, 0, 1, 1),
+SOC_DAPM_SINGLE("SPK Mixer Capture Switch", RT5630_ADC_REC_MIXER, 1, 1, 1),
+};
+
+static const struct snd_kcontrol_new rt5630_left_hp_mixer_controls[] = {
+SOC_DAPM_SINGLE("ADC Playback Switch", RT5630_ADC_REC_GAIN, 15, 1, 1),
+SOC_DAPM_SINGLE("LineIn Playback Switch", HPL_MIXER, 0, 1, 0),
+SOC_DAPM_SINGLE("Phone Playback Switch", HPL_MIXER, 1, 1, 0),
+SOC_DAPM_SINGLE("Mic1 Playback Switch", HPL_MIXER, 2, 1, 0),
+SOC_DAPM_SINGLE("Mic2 Playback Switch", HPL_MIXER, 3, 1, 0),
+SOC_DAPM_SINGLE("HIFI DAC Playback Switch", RT5630_DAC_AND_MIC_CTRL, 3, 1, 1),
+SOC_DAPM_SINGLE("Voice DAC Playback Switch", HPL_MIXER, 4, 1, 0),
+};
+
+static const struct snd_kcontrol_new rt5630_right_hp_mixer_controls[] = {
+SOC_DAPM_SINGLE("ADC Playback Switch", RT5630_ADC_REC_GAIN, 7, 1, 1),
+SOC_DAPM_SINGLE("LineIn Playback Switch", HPR_MIXER, 0, 1, 0),
+SOC_DAPM_SINGLE("Phone Playback Switch", HPR_MIXER, 1, 1, 0),
+SOC_DAPM_SINGLE("Mic1 Playback Switch", HPR_MIXER, 2, 1, 0),
+SOC_DAPM_SINGLE("Mic2 Playback Switch", HPR_MIXER, 3, 1, 0),
+SOC_DAPM_SINGLE("HIFI DAC Playback Switch", RT5630_DAC_AND_MIC_CTRL, 2, 1, 1),
+SOC_DAPM_SINGLE("Voice DAC Playback Switch", HPR_MIXER, 4, 1, 0),
+};
+
+static const struct snd_kcontrol_new rt5630_mono_mixer_controls[] = {
+SOC_DAPM_SINGLE("ADCL Playback Switch", RT5630_ADC_REC_GAIN, 14, 1, 1),
+SOC_DAPM_SINGLE("ADCR Playback Switch", RT5630_ADC_REC_GAIN, 6, 1, 1),
+SOC_DAPM_SINGLE("Line Mixer Playback Switch", RT5630_LINE_IN_VOL, 13, 1, 1),
+SOC_DAPM_SINGLE("Mic1 Playback Switch", RT5630_DAC_AND_MIC_CTRL, 13, 1, 1),
+SOC_DAPM_SINGLE("Mic2 Playback Switch", RT5630_DAC_AND_MIC_CTRL, 9, 1, 1),
+SOC_DAPM_SINGLE("DAC Mixer Playback Switch", RT5630_DAC_AND_MIC_CTRL, 0, 1, 1),
+SOC_DAPM_SINGLE("Voice DAC Playback Switch", RT5630_VOICE_DAC_OUT_VOL, 13, 1, 1),
+};
+
+static const struct snd_kcontrol_new rt5630_spk_mixer_controls[] = {
+SOC_DAPM_SINGLE("Line Mixer Playback Switch", RT5630_LINE_IN_VOL, 14, 1, 1),	
+SOC_DAPM_SINGLE("Phone Playback Switch", RT5630_PHONEIN_VOL, 14, 1, 1),
+SOC_DAPM_SINGLE("Mic1 Playback Switch", RT5630_DAC_AND_MIC_CTRL, 14, 1, 1),
+SOC_DAPM_SINGLE("Mic2 Playback Switch", RT5630_DAC_AND_MIC_CTRL, 10, 1, 1),
+SOC_DAPM_SINGLE("DAC Mixer Playback Switch", RT5630_DAC_AND_MIC_CTRL, 1, 1, 1),
+SOC_DAPM_SINGLE("Voice DAC Playback Switch", RT5630_VOICE_DAC_OUT_VOL, 14, 1, 1),
+};
+
+static int mixer_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *k, int event)
+{
+	struct snd_soc_codec *codec = w->codec;
+	unsigned int l, r;
+
+	RT5630_DEBUG("");
+
+	l= rt5630_read(codec, HPL_MIXER);
+	r = rt5630_read(codec, HPR_MIXER);
+	
+	if ((l & 0x1) || (r & 0x1))
+		rt5630_write_mask(codec, 0x0a, 0x0000, 0x8000);
+	else
+		rt5630_write_mask(codec, 0x0a, 0x8000, 0x8000);
+
+	if ((l & 0x2) || (r & 0x2))
+		rt5630_write_mask(codec, 0x08, 0x0000, 0x8000);
+	else
+		rt5630_write_mask(codec, 0x08, 0x8000, 0x8000);
+
+	if ((l & 0x4) || (r & 0x4))
+		rt5630_write_mask(codec, 0x10, 0x0000, 0x8000);
+	else
+		rt5630_write_mask(codec, 0x10, 0x8000, 0x8000);
+
+	if ((l & 0x8) || (r & 0x8))
+		rt5630_write_mask(codec, 0x10, 0x0000, 0x0800);
+	else
+		rt5630_write_mask(codec, 0x10, 0x0800, 0x0800);
+
+	if ((l & 0x10) || (r & 0x10))
+		rt5630_write_mask(codec, 0x18, 0x0000, 0x8000);
+	else
+		rt5630_write_mask(codec, 0x18, 0x8000, 0x8000);
+
+	return 0;
+}
+
+
+/*
+ *	bit[0][1] use for aec control
+ *	bit[2][3] for ADCR func
+ *	bit[4] for SPKL pga
+ *	bit[5] for SPKR pga
+ *	bit[6] for hpl pga
+ *	bit[7] for hpr pga
+ */
+static int spk_pga_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *k, int event)
+ {
+	struct snd_soc_codec *codec = w->codec;
+	int reg;
+	
+	reg = rt5630_read(codec, VIRTUAL_REG_FOR_MISC_FUNC) & (0x3 << 4);
+	if ((reg >> 4) != 0x3 && reg != 0)
+		return 0;
+	RT5630_DEBUG("event=%d\n",event);
+	
+	
+	switch (event)
+	{
+		case SND_SOC_DAPM_POST_PMU:
+			RT5630_DEBUG("after virtual spk power up!\n");
+			rt5630_write_mask(codec, 0x3e, 0x3000, 0x3000);
+			rt5630_write_mask(codec, 0x02, 0x0000, 0x8080);
+			rt5630_write_mask(codec, 0x3a, 0x0400, 0x0400);                  //power on spk amp
+#if  CONFIG_SND_DOVE_SOC_AC97_AVD1
+			spk_amplifier_enable(1); //enable spk amp
+#endif
+
+			break;
+		case SND_SOC_DAPM_POST_PMD:
+			RT5630_DEBUG("aftet virtual spk power down!\n");
+			rt5630_write_mask(codec, 0x3a, 0x0000, 0x0400);//power off spk amp
+			rt5630_write_mask(codec, 0x02, 0x8080, 0x8080);
+			rt5630_write_mask(codec, 0x3e, 0x0000, 0x3000);                 
+#if  CONFIG_SND_DOVE_SOC_AC97_AVD1
+			spk_amplifier_enable(0); //disable spk amp
+#endif
+			
+			break;
+		default:
+			return 0;
+	}
+	return 0;
+}
+
+
+
+
+
+static int hp_pga_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *k, int event)
+{
+	struct snd_soc_codec *codec = w->codec;
+	int reg;
+
+	reg = rt5630_read(codec, VIRTUAL_REG_FOR_MISC_FUNC) & (0x3 << 6);
+	if ((reg >> 6) != 0x3 && reg != 0)
+		return 0;
+	RT5630_DEBUG("event=%d\n",event);
+	
+	switch (event)
+	{
+		case SND_SOC_DAPM_POST_PMD:
+			RT5630_DEBUG("aftet virtual hp power down!\n");
+			rt5630_write_mask(codec, 0x04, 0x8080, 0x8080);
+			rt5630_write_mask(codec, 0x3e, 0x0000, 0x0600);
+			rt5630_write_mask(codec, 0x3a, 0x0000, 0x0030);
+			break;
+		case SND_SOC_DAPM_POST_PMU:	
+			RT5630_DEBUG("after virtual hp power up!\n");
+			hp_depop_mode2(codec);
+			rt5630_write_mask(codec ,0x04, 0x0000, 0x8080);
+			break;
+		default:
+			return 0;
+	}	
+	return 0;
+}
+
+
+
+static int aux_pga_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *k, int event)
+{
+	return 0;
+}
+
+/*SPKOUT Mux*/
+static const struct snd_kcontrol_new rt5630_spkout_mux_out_controls = 
+SOC_DAPM_ENUM("Route", rt5630_enum[2]);
+
+/*HPLOUT MUX*/
+static const struct snd_kcontrol_new rt5630_hplout_mux_out_controls = 
+SOC_DAPM_ENUM("Route", rt5630_enum[3]);
+
+/*HPROUT MUX*/
+static const struct snd_kcontrol_new rt5630_hprout_mux_out_controls = 
+SOC_DAPM_ENUM("Route", rt5630_enum[4]);
+/*AUXOUT MUX*/
+static const struct snd_kcontrol_new rt5630_auxout_mux_out_controls = 
+SOC_DAPM_ENUM("Route", rt5630_enum[5]);
+
+static const struct snd_soc_dapm_widget rt5630_dapm_widgets[] = {
+SND_SOC_DAPM_INPUT("Left LineIn"),
+SND_SOC_DAPM_INPUT("Right LineIn"),
+SND_SOC_DAPM_INPUT("Phone"),
+SND_SOC_DAPM_INPUT("Mic1"),
+SND_SOC_DAPM_INPUT("Mic2"),
+
+SND_SOC_DAPM_PGA("Mic1 Boost", RT5630_PWR_MANAG_ADD3, 1, 0, NULL, 0),
+SND_SOC_DAPM_PGA("Mic2 Boost", RT5630_PWR_MANAG_ADD3, 0, 0, NULL, 0),
+
+SND_SOC_DAPM_DAC("Left DAC", "Left HiFi Playback DAC", RT5630_PWR_MANAG_ADD2, 9, 0),
+SND_SOC_DAPM_DAC("Right DAC", "Right HiFi Playback DAC", RT5630_PWR_MANAG_ADD2, 8, 0),
+SND_SOC_DAPM_DAC("Voice DAC", "Voice Playback DAC", RT5630_PWR_MANAG_ADD2, 10, 0),
+
+SND_SOC_DAPM_PGA("Left LineIn PGA", RT5630_PWR_MANAG_ADD3, 7, 0, NULL, 0),
+SND_SOC_DAPM_PGA("Right LineIn PGA", RT5630_PWR_MANAG_ADD3, 6, 0, NULL, 0),
+SND_SOC_DAPM_PGA("Phone PGA", RT5630_PWR_MANAG_ADD3, 5, 0, NULL, 0),
+SND_SOC_DAPM_PGA("Mic1 PGA", RT5630_PWR_MANAG_ADD3, 3, 0, NULL, 0),
+SND_SOC_DAPM_PGA("Mic2 PGA", RT5630_PWR_MANAG_ADD3, 2, 0, NULL, 0),
+
+SND_SOC_DAPM_MIXER("Left Rec Mixer", RT5630_PWR_MANAG_ADD2, 1, 0,
+	&rt5630_left_adc_rec_mixer_controls[0], ARRAY_SIZE(rt5630_left_adc_rec_mixer_controls)),
+SND_SOC_DAPM_MIXER("Right Rec Mixer", RT5630_PWR_MANAG_ADD2, 0, 0,
+	&rt5630_right_adc_rec_mixer_controls[0], ARRAY_SIZE(rt5630_right_adc_rec_mixer_controls)),
+SND_SOC_DAPM_MIXER_E("Left HP Mixer", RT5630_PWR_MANAG_ADD2, 5, 0,
+	&rt5630_left_hp_mixer_controls[0], ARRAY_SIZE(rt5630_left_hp_mixer_controls),
+	mixer_event, SND_SOC_DAPM_POST_REG),
+SND_SOC_DAPM_MIXER_E("Right HP Mixer", RT5630_PWR_MANAG_ADD2, 4, 0,
+	&rt5630_right_hp_mixer_controls[0], ARRAY_SIZE(rt5630_right_hp_mixer_controls),
+	mixer_event, SND_SOC_DAPM_POST_REG),
+SND_SOC_DAPM_MIXER("MoNo Mixer", RT5630_PWR_MANAG_ADD2, 2, 0, 
+	&rt5630_mono_mixer_controls[0], ARRAY_SIZE(rt5630_mono_mixer_controls)),
+SND_SOC_DAPM_MIXER("SPK Mixer", RT5630_PWR_MANAG_ADD2, 3, 0,
+	&rt5630_spk_mixer_controls[0], ARRAY_SIZE(rt5630_spk_mixer_controls)),
+	
+/*hpl mixer --> hp mixer-->spkout mux, hpr mixer-->hp mixer -->spkout mux
+   hpl mixer-->hp mixer-->Auxout Mux, hpr muxer-->hp mixer-->auxout mux*/	
+SND_SOC_DAPM_MIXER("HP Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
+SND_SOC_DAPM_MIXER("DAC Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
+SND_SOC_DAPM_MIXER("Line Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
+
+SND_SOC_DAPM_MUX("SPKOUT Mux", SND_SOC_NOPM, 0, 0, &rt5630_spkout_mux_out_controls),
+SND_SOC_DAPM_MUX("HPLOUT Mux", SND_SOC_NOPM, 0, 0, &rt5630_hplout_mux_out_controls),
+SND_SOC_DAPM_MUX("HPROUT Mux", SND_SOC_NOPM, 0, 0, &rt5630_hprout_mux_out_controls),
+SND_SOC_DAPM_MUX("AUXOUT Mux", SND_SOC_NOPM, 0, 0, &rt5630_auxout_mux_out_controls),
+
+SND_SOC_DAPM_PGA_E("SPKL Out PGA", VIRTUAL_REG_FOR_MISC_FUNC, 4, 0, NULL, 0,
+				spk_pga_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
+SND_SOC_DAPM_PGA_E("SPKR Out PGA", VIRTUAL_REG_FOR_MISC_FUNC, 5, 0, NULL, 0,
+				spk_pga_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
+SND_SOC_DAPM_PGA_E("HPL Out PGA",VIRTUAL_REG_FOR_MISC_FUNC, 6, 0, NULL, 0, 
+				hp_pga_event, SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),
+SND_SOC_DAPM_PGA_E("HPR Out PGA",VIRTUAL_REG_FOR_MISC_FUNC, 7, 0, NULL, 0, 
+				hp_pga_event, SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),
+SND_SOC_DAPM_PGA_E("AUX Out PGA",RT5630_PWR_MANAG_ADD3, 14, 0, NULL, 0, 
+				aux_pga_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
+				
+
+SND_SOC_DAPM_ADC("Left ADC", "Left ADC HiFi Capture", RT5630_PWR_MANAG_ADD2, 7, 0),
+SND_SOC_DAPM_ADC("Right ADC", "Right ADC HiFi Capture", RT5630_PWR_MANAG_ADD2, 6, 0),
+SND_SOC_DAPM_OUTPUT("SPKL"),
+SND_SOC_DAPM_OUTPUT("SPKR"),
+SND_SOC_DAPM_OUTPUT("HPL"),
+SND_SOC_DAPM_OUTPUT("HPR"),
+SND_SOC_DAPM_OUTPUT("AUX"),
+SND_SOC_DAPM_MICBIAS("Mic1 Bias", RT5630_PWR_MANAG_ADD1, 3, 0),
+SND_SOC_DAPM_MICBIAS("Mic2 Bias", RT5630_PWR_MANAG_ADD1, 2, 0),
+};
+
+static const struct snd_soc_dapm_route audio_map[] = {
+		/*Input PGA*/
+
+		{"Left LineIn PGA", NULL, "Left LineIn"},
+		{"Right LineIn PGA", NULL, "Right LineIn"},
+		{"Phone PGA", NULL, "Phone"},
+		{"Mic1 Boost", NULL, "Mic1"},
+		{"Mic2 Boost", NULL, "Mic2"},
+		{"Mic1 PGA", NULL, "Mic1 Boost"},
+		{"Mic2 PGA", NULL, "Mic2 Boost"},
+
+		/*Left ADC mixer*/
+		{"Left Rec Mixer", "LineIn Capture Switch", "Left LineIn"},
+		{"Left Rec Mixer", "Phone Capture Switch", "Phone"},
+		{"Left Rec Mixer", "Mic1 Capture Switch", "Mic1"},
+		{"Left Rec Mixer", "Mic2 Capture Switch", "Mic2"},
+		{"Left Rec Mixer", "HP Mixer Capture Switch", "Left HP Mixer"},
+		{"Left Rec Mixer", "SPK Mixer Capture Switch", "SPK Mixer"},
+		{"Left Rec Mixer", "MoNo Mixer Capture Switch", "MoNo Mixer"},
+
+		/*Right ADC Mixer*/
+		{"Right Rec Mixer", "LineIn Capture Switch", "Right LineIn"},
+		{"Right Rec Mixer", "Phone Capture Switch", "Phone"},
+		{"Right Rec Mixer", "Mic1 Capture Switch", "Mic1"},
+		{"Right Rec Mixer", "Mic2 Capture Switch", "Mic2"},
+		{"Right Rec Mixer", "HP Mixer Capture Switch", "Right HP Mixer"},
+		{"Right Rec Mixer", "SPK Mixer Capture Switch", "SPK Mixer"},
+		{"Right Rec Mixer", "MoNo Mixer Capture Switch", "MoNo Mixer"},
+		
+		/*HPL mixer*/
+		{"Left HP Mixer", "ADC Playback Switch", "Left Rec Mixer"},
+		{"Left HP Mixer", "LineIn Playback Switch", "Left LineIn PGA"},
+		{"Left HP Mixer", "Phone Playback Switch", "Phone PGA"},
+		{"Left HP Mixer", "Mic1 Playback Switch", "Mic1 PGA"},
+		{"Left HP Mixer", "Mic2 Playback Switch", "Mic2 PGA"},
+		{"Left HP Mixer", "HIFI DAC Playback Switch", "Left DAC"},
+		{"Left HP Mixer", "Voice DAC Playback Switch", "Voice DAC"},
+		
+		/*HPR mixer*/
+		{"Right HP Mixer", "ADC Playback Switch", "Right Rec Mixer"},
+		{"Right HP Mixer", "LineIn Playback Switch", "Right LineIn PGA"},	
+		{"Right HP Mixer", "HIFI DAC Playback Switch", "Right DAC"},
+		{"Right HP Mixer", "Phone Playback Switch", "Phone PGA"},
+		{"Right HP Mixer", "Mic1 Playback Switch", "Mic1 PGA"},
+		{"Right HP Mixer", "Mic2 Playback Switch", "Mic2 PGA"},
+		{"Right HP Mixer", "Voice DAC Playback Switch", "Voice DAC"},
+
+		/*DAC Mixer*/
+		{"DAC Mixer", NULL, "Left DAC"},
+		{"DAC Mixer", NULL, "Right DAC"},
+
+		/*line mixer*/
+		{"Line Mixer", NULL, "Left LineIn PGA"},
+		{"Line Mixer", NULL, "Right LineIn PGA"},
+
+		/*spk mixer*/
+		{"SPK Mixer", "Line Mixer Playback Switch", "Line Mixer"},
+		{"SPK Mixer", "Phone Playback Switch", "Phone PGA"},
+		{"SPK Mixer", "Mic1 Playback Switch", "Mic1 PGA"},
+		{"SPK Mixer", "Mic2 Playback Switch", "Mic2 PGA"},
+		{"SPK Mixer", "DAC Mixer Playback Switch", "DAC Mixer"},
+		{"SPK Mixer", "Voice DAC Playback Switch", "Voice DAC"},
+
+		/*mono mixer*/
+		{"MoNo Mixer", "Line Mixer Playback Switch", "Line Mixer"},
+		{"MoNo Mixer", "ADCL Playback Switch","Left Rec Mixer"},
+		{"MoNo Mixer", "ADCR Playback Switch","Right Rec Mixer"},
+		{"MoNo Mixer", "Mic1 Playback Switch", "Mic1 PGA"},
+		{"MoNo Mixer", "Mic2 Playback Switch", "Mic2 PGA"},
+		{"MoNo Mixer", "DAC Mixer Playback Switch", "DAC Mixer"},
+		{"MoNo Mixer", "Voice DAC Playback Switch", "Voice DAC"},
+		
+		/*hp mixer*/
+		{"HP Mixer", NULL, "Left HP Mixer"},
+		{"HP Mixer", NULL, "Right HP Mixer"},
+
+		/*spkout mux*/
+		{"SPKOUT Mux", "HP Mixer", "HP Mixer"},
+		{"SPKOUT Mux", "SPK Mixer", "SPK Mixer"},
+		{"SPKOUT Mux", "Mono Mixer", "MoNo Mixer"},
+		
+		/*hpl out mux*/
+		{"HPLOUT Mux", "HPL Mixer", "Left HP Mixer"},
+		
+		/*hpr out mux*/
+		{"HPROUT Mux", "HPR Mixer", "Right HP Mixer"},
+
+		/*aux out mux*/
+		{"AUXOUT Mux", "HP Mixer", "HP Mixer"},
+		{"AUXOUT Mux", "SPK Mixer", "SPK Mixer"},
+		{"SPKOUT Mux", "Mono Mixer", "MoNo Mixer"},
+
+		/*spkl out pga*/
+		{"SPKL Out PGA", NULL, "SPKOUT Mux"},
+		
+		
+		/*spkr out pga*/
+		{"SPKR Out PGA", NULL, "SPKOUT Mux"},
+		
+		/*hpl out pga*/
+		{"HPL Out PGA", NULL, "HPLOUT Mux"},
+
+		/*hpr out pga*/
+		{"HPR Out PGA", NULL, "HPROUT Mux"},
+
+		/*aux out pga*/
+		{"AUX Out PGA", NULL, "AUXOUT Mux"}, 
+		
+		/*left adc*/
+		{"Left ADC", NULL, "Left Rec Mixer"},
+		
+		/*right adc*/
+		{"Right ADC", NULL, "Right Rec Mixer"},
+		
+		/*output*/
+		{"SPKL", NULL, "SPKL Out PGA"},
+		{"SPKR", NULL, "SPKR Out PGA"},
+		{"HPL", NULL, "HPL Out PGA"},
+		{"HPR", NULL, "HPR Out PGA"},
+		{"AUX", NULL, "AUX Out PGA"},
+};
+
+
+static int rt5630_add_widgets(struct snd_soc_codec *codec)
+{
+	snd_soc_dapm_new_controls(codec, rt5630_dapm_widgets, 
+				ARRAY_SIZE(rt5630_dapm_widgets));
+	snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
+	snd_soc_dapm_new_widgets(codec);
+}
+
+#endif
+#if !USE_DAPM_CTRL
+
+static enum OUTPUT_DEVICE_MASK
+{
+	SPK_OUTPUT_MASK = 1,
+	HP_OUTPUT_MASK,
+};
+
+
+
+static int rt5630_set_path_from_dac_to_output(struct snd_soc_codec *codec, int enable, int sink)
+{
+	RT5630_DEBUG("sink=%d, enable=%d\n",sink,enable);
+
+	switch (sink)
+	{
+		case SPK_OUTPUT_MASK:
+			if (enable)
+			{	
+				rt5630_write_mask(codec, 0x10, 0x000c, 0x000c);          /*unmute dac-->hpmixer*/
+				rt5630_write_mask(codec, 0x1c, 0x0400, 0x0400);  	 /*choose mux to hpmixer-->spk  */		
+				rt5630_write_mask(codec, 0x3c, 0x0300, 0x0300);  	/*power up dac lr */
+				rt5630_write_mask(codec, 0x3c, 0x0030, 0x0030);  	/*power up hp mixer lr*/
+				rt5630_write_mask(codec, 0x3c, 0x3000, 0x3000);      /*power up spk lr*/
+				
+			}
+			else
+				rt5630_write_mask(codec, 0x02, 0x8080, 0x8080);      /*mute spk*/			
+			break;
+		case HP_OUTPUT_MASK:
+			if (enable)
+			{
+				rt5630_write_mask(codec, 0x10, 0x000c, 0x000c);          /*unmute dac-->hpmixer*/
+				rt5630_write_mask(codec, 0x1c, 0x0300, 0x0300);          /*hpmixer to hp out*/
+				rt5630_write_mask(codec, 0x3c, 0x0300, 0x0300);  	/*power up dac lr */
+				rt5630_write_mask(codec, 0x3c, 0x0030, 0x0030);  	/*power up hp mixer lr*/
+				hp_depop_mode2(codec);
+			}
+			else
+			{
+				rt5630_write_mask(codec, 0x3a, 0x0000, 0x0300);                     /*power off hp amp*/
+				rt5630_write_mask(codec, 0x04, 0x8080, 0x8080);
+			}
+			break;
+		default:
+		return 0;
+	}
+	return 0;
+}
+
+
+#endif
+
+#if !USE_DAPM_CTRL
+
+static int rt5630_pcm_hw_prepare(struct snd_pcm_substream *substream, struct snd_soc_dai *codec_dai)
+{
+	struct snd_soc_codec *codec = codec_dai->codec;
+	int stream = substream->stream;
+	u16 reg=0;
+	RT5630_DEBUG("stream=%d\n",stream);
+	
+	switch (stream)
+	{
+		case SNDRV_PCM_STREAM_PLAYBACK:
+
+			reg=rt5630_read(codec, 0x02);
+			if (!(reg & 0x8080))
+			{
+				//power on SPK
+				rt5630_write_mask(codec, 0x3c, 0x2300, 0x2300);        /*power hp mixerlr, daclr*/
+
+				rt5630_write_mask(codec, 0x3e, 0x3000, 0x3000);       /*power spklr volume*/
+				rt5630_write_mask(codec, 0x02, 0x0000, 0x8080);        /*unmute spk*/
+				rt5630_write_mask(codec, 0x3a, 0x0400, 0x0400);        /*power on classabd amp*/
+#if  CONFIG_SND_DOVE_SOC_AC97_AVD1
+				spk_amplifier_enable(1);
+#endif				
+			}
+			
+			reg=rt5630_read(codec, 0x04);			
+			if (!(reg & 0x8080))
+			{
+				//power on hp
+				rt5630_write_mask(codec, 0x3c, 0x2300, 0x2300);        /*power hp mixerlr, daclr*/
+				hp_depop_mode2(codec);			
+
+				rt5630_write_mask(codec, 0x04, 0x0000, 0x8080);        /*unmute hp*/				
+			}			
+
+
+			break;
+		case SNDRV_PCM_STREAM_CAPTURE:
+
+			rt5630_write_mask(codec, 0x3e, 0x0005, 0x0005);        /*power on mic2 boost*/
+			rt5630_write_mask(codec, 0x3a, 0x0004, 0x0004);        /*mic bias2*/
+			rt5630_write_mask(codec, 0x3c, 0x00c3, 0x00c3);         /*power adc lr and rec mixer lr*/
+			break;
+		default:
+			return 0;
+	}
+	return 0;	
+}
+
+static int rt5630_vopcm_hw_prepare(struct snd_pcm_substream *substream, struct snd_soc_dai *codec_dai)
+{
+	struct snd_soc_codec *codec = codec_dai->codec;
+	int stream = substream->stream;
+	RT5630_DEBUG("stream=%d\n",stream);
+	switch (stream)
+	{
+		case SNDRV_PCM_STREAM_PLAYBACK:
+			rt5630_write_mask(codec, 0x3c, 0x0430, 0x0430);
+			hp_depop_mode2(codec);
+			rt5630_write_mask(codec, 0x3e, 0x3000, 0x3000); 
+			rt5630_write_mask(codec, 0x04, 0x0000, 0x8080); 
+			rt5630_write_mask(codec, 0x02, 0x0000, 0x8080);
+			rt5630_write_mask(codec, 0x3a, 0x0400, 0x0400);  
+			break;
+		case SNDRV_PCM_STREAM_CAPTURE: 
+			rt5630_write_mask(codec, 0x3e, 0x0002, 0x0002);   
+			rt5630_write_mask(codec, 0x3a, 0x0008, 0x0008);        /*mic bias*/
+			rt5630_write_mask(codec, 0x3c, 0x0041, 0x0041);  		
+	}
+	return 0;
+}
+
+#endif
+
+struct _pll_div{
+	u32 pll_in;
+	u32 pll_out;
+	u16 regvalue;
+};
+
+
+/**************************************************************
+  *	note:
+  *	our codec support you to select different source as pll input, but if you 
+  *	use both of the I2S audio interface and pcm interface instantially. 
+  *	The two DAI must have the same pll setting params, so you have to offer
+  *	the same pll input, and set our codec's sysclk the same one, we suggest 
+  *	24576000.
+  **************************************************************/
+static const struct _pll_div codec_master_pll1_div[] = {
+		
+	{  2048000,  24576000,	0x2ea0},
+	{  3686400,  24576000,	0xee27},	
+	{ 11289600,  22579200,	0x06a0},	
+	{ 12000000,  24576000,	0x2915},   
+	{ 12288000,  24576000,  0x06a0},  
+	{ 13000000,  24576000,	0x772e},
+	{ 13100000,	 24576000,	0x0d20},	
+};
+
+static const struct _pll_div codec_bclk_pll1_div[] = {
+
+	{  1536000,	 24576000,	0x3ea0},	
+	{  3072000,	 24576000,	0x1ea0},
+};
+
+static const struct _pll_div codec_vbclk_pll1_div[] = {
+
+	{  1536000,	 24576000,	0x3ea0},	
+	{  3072000,	 24576000,	0x1ea0},
+};
+
+
+struct _coeff_div_stereo {
+	unsigned int mclk;
+	unsigned int rate;
+	unsigned int reg60;
+	unsigned int reg62;
+};
+
+struct _coeff_div_voice {
+	unsigned int mclk;
+	unsigned int rate;
+	unsigned int reg64;
+};
+
+static const struct _coeff_div_stereo coeff_div_stereo[] = {
+		/*bclk is config to 32fs, if codec is choose to be slave mode , input bclk should be 32*fs */
+		{22579200, 44100, 0x3174, 0x1010},	
+		{24576000, 48000, 0x3174, 0x1010},                 
+		{12288000, 48000, 0x1174, 0x0000},
+		{18432000, 48000, 0x2174, 0x1111},
+		{36864000, 48000, 0x2274, 0x2020},
+		{49152000, 48000, 0xf074, 0x3030},
+		{0, 0, 0, 0},
+};
+
+static const struct _coeff_div_voice coeff_div_voice[] = {
+		/*bclk is config to 32fs, if codec is choose to be slave mode , input bclk should be 32*fs */
+		{24576000, 16000, 0x2622}, 
+		{24576000, 8000, 0x2824},
+		{0, 0, 0},
+};
+
+static int get_coeff(unsigned int mclk, unsigned int rate, int mode)
+{
+	int i;
+
+	RT5630_DEBUG("get_coeff mclk = %d, rate = %d\n", mclk, rate);
+	if (!mode){
+		for (i = 0; i < ARRAY_SIZE(coeff_div_stereo); i++) {
+			if ((coeff_div_stereo[i].rate == rate) && (coeff_div_stereo[i].mclk == mclk))
+				return i;
+		}
+	}
+	else {
+		for (i = 0; i< ARRAY_SIZE(coeff_div_voice); i++) {
+			if ((coeff_div_voice[i].rate == rate) && (coeff_div_voice[i].mclk == mclk))
+				return i;
+		}
+	}
+
+	return -EINVAL;
+	printk(KERN_ERR "can't find a matched mclk and rate in %s\n", 
+				(mode ? "coeff_div_voice[]" : "coeff_div_audio[]"));
+}
+
+int rt5630_codec_set_pll1(struct snd_soc_codec *codec, int pll_id, 
+		unsigned int freq_in, unsigned  int freq_out)
+{
+	int i;
+	int ret = -EINVAL;
+
+	RT5630_DEBUG("pll_id = %d, freq_in = %d, freq_out = %d\n", pll_id, freq_in, freq_out);
+
+	if (pll_id < RT5630_PLL1_FROM_MCLK || pll_id > RT5630_PLL1_FROM_VBCLK)
+		return -EINVAL;
+
+	if (!freq_in || !freq_out)
+		return 0;
+
+	if (RT5630_PLL1_FROM_MCLK == pll_id)
+	{
+		for (i = 0; i < ARRAY_SIZE(codec_master_pll1_div); i ++)
+		{
+			if ((freq_in == codec_master_pll1_div[i].pll_in) && (freq_out == codec_master_pll1_div[i].pll_out))
+			{
+				rt5630_write(codec, RT5630_GEN_CTRL_REG2, 0x0000);                    			 /*PLL source from MCLK*/
+				rt5630_write(codec, RT5630_PLL_CTRL, codec_master_pll1_div[i].regvalue);   /*set pll code*/
+				rt5630_write_mask(codec, RT5630_PWR_MANAG_ADD2, 0x8000, 0x8000);			/*enable pll1 power*/
+				ret = 0;
+			}
+		}
+	}
+	else if (RT5630_PLL1_FROM_BCLK == pll_id)
+	{
+		for (i = 0; i < ARRAY_SIZE(codec_bclk_pll1_div); i ++)
+		{
+			if ((freq_in == codec_bclk_pll1_div[i].pll_in) && (freq_out == codec_bclk_pll1_div[i].pll_out))
+			{
+				rt5630_write(codec, RT5630_GEN_CTRL_REG2, 0x2000);    					/*PLL source from BCLK*/
+				rt5630_write(codec, RT5630_PLL_CTRL, codec_bclk_pll1_div[i].regvalue);   /*set pll1 code*/
+				rt5630_write_mask(codec, RT5630_PWR_MANAG_ADD2, 0x8000, 0x8000);       	 /*enable pll1 power*/
+				ret = 0;
+			}
+		}
+	}
+	else if (RT5630_PLL1_FROM_VBCLK == pll_id)
+	{
+		for (i = 0; i < ARRAY_SIZE(codec_vbclk_pll1_div); i ++)
+		{
+			if ((freq_in == codec_vbclk_pll1_div[i].pll_in) && (freq_out == codec_vbclk_pll1_div[i].pll_out))
+			{
+				rt5630_write(codec, RT5630_GEN_CTRL_REG2, 0x2000);    					/*PLL source from BCLK*/
+				rt5630_write(codec, RT5630_PLL_CTRL, codec_vbclk_pll1_div[i].regvalue);   /*set pll1 code*/
+				rt5630_write_mask(codec, RT5630_PWR_MANAG_ADD2, 0x8000, 0x8000);       	 /*enable pll1 power*/
+				ret = 0;
+			}
+		}
+	}
+	
+	rt5630_write_mask(codec, RT5630_GEN_CTRL_REG1, 0x8000, 0x8000);
+	return ret;
+}
+
+EXPORT_SYMBOL_GPL(rt5630_codec_set_pll1);
+
+static int rt5630_codec_set_pll2(struct snd_soc_codec *codec, int times)
+{
+	int iface = 0;
+	RT5630_DEBUG("");
+	
+	rt5630_write_mask(codec, 0x3c, 0x4000, 0x4000);             //power on pll2
+
+	switch (times)
+	{
+		case 8:
+			break;	
+		case 16:
+			iface |= 0x0001;
+		break;
+		default:
+			return -EINVAL;
+	}
+	iface |= 0x8000;
+	rt5630_write(codec, 0x46, iface);
+
+	return 0;
+	
+}
+
+static int rt5630_codec_set_dai_pll(struct snd_soc_dai *codec_dai, 
+		int pll_id, unsigned int freq_in, unsigned int freq_out)
+{
+	struct snd_soc_codec *codec = codec_dai->codec;
+	int times;
+			RT5630_DEBUG("");
+	times = freq_out / freq_in;
+
+	if (pll_id < RT5630_PLL2_FROM_VBCLK)
+		return rt5630_codec_set_pll1(codec, pll_id, freq_in, freq_out);
+	else
+		return rt5630_codec_set_pll2(codec, times);
+}
+
+
+static int rt5630_hifi_codec_set_dai_sysclk(struct snd_soc_dai *codec_dai, 
+		int clk_id, unsigned int freq, int dir)
+{
+	struct snd_soc_codec *codec = codec_dai->codec;
+	struct rt5630_priv * rt5630 = codec->private_data;
+	RT5630_DEBUG("freq=%d\n",freq);
+	
+	if ((freq >= (256 * 8000)) && (freq <= (512 * 48000))) {
+		rt5630->stereo_sysclk = freq;
+		return 0;
+	}
+	
+	printk(KERN_ERR "unsupported sysclk freq %u for audio i2s\n", freq);
+	return -EINVAL;
+}
+
+static int rt5630_voice_codec_set_dai_sysclk(struct snd_soc_dai *codec_dai, 
+		int clk_id, unsigned int freq, int dir)
+{
+	struct snd_soc_codec *codec = codec_dai->codec;
+	struct rt5630_priv * rt5630 = codec->private_data;
+	
+			RT5630_DEBUG("");
+	if ((freq >= (256 * 8000)) && (freq <= (512 * 48000))) {
+		rt5630->voice_sysclk = freq;
+		return 0;
+	}			
+
+	printk(KERN_ERR "unsupported sysclk freq %u for voice pcm\n", freq);
+	return -EINVAL;
+}
+
+
+static int rt5630_hifi_pcm_hw_params(struct snd_pcm_substream *substream, 
+			struct snd_pcm_hw_params *params,
+			struct snd_soc_dai *dai)
+{
+	struct snd_soc_pcm_runtime *rtd = substream->private_data;
+	struct snd_soc_device *socdev = rtd->socdev;
+	struct snd_soc_codec *codec = socdev->card->codec;
+	struct rt5630_priv *rt5630 = codec->private_data;
+	struct snd_soc_dapm_widget *w;
+	int stream = substream->stream;
+	unsigned int iface = rt5630_read(codec, RT5630_MAIN_SDP_CTRL) & 0xfff3;
+	int rate = params_rate(params);
+	int coeff = get_coeff(rt5630->stereo_sysclk, rate, 0);
+	
+	RT5630_DEBUG("stream=%d\n",stream);
+
+	if (stream == SNDRV_PCM_STREAM_CAPTURE) {
+		list_for_each_entry(w, &codec->dapm_widgets, list)
+		{
+			if (!w->sname)
+				continue;
+			if (!strcmp(w->name, "Right ADC"))
+				strcpy(w->sname, "Right ADC HiFi Capture");
+		}
+	}
+	
+	switch (params_format(params))
+	{
+		case SNDRV_PCM_FORMAT_S16_LE:
+			break;
+		case SNDRV_PCM_FORMAT_S20_3LE:
+			iface |= 0x0004;
+		case SNDRV_PCM_FORMAT_S24_LE:
+			iface |= 0x0008;
+		case SNDRV_PCM_FORMAT_S8:
+			iface |= 0x000c;
+	}
+	rt5630_write(codec, RT5630_MAIN_SDP_CTRL, iface);
+	rt5630_write_mask(codec, 0x3a, 0x0801, 0x0801);   /*power i2s and dac ref*/
+	if (coeff >= 0) {
+		rt5630_write(codec, RT5630_STEREO_DAC_CLK_CTRL1, coeff_div_stereo[coeff].reg60);
+		rt5630_write(codec, RT5630_STEREO_DAC_CLK_CTRL2, coeff_div_stereo[coeff].reg62);
+	}
+	else
+		return coeff;
+	
+	return 0;
+}
+
+static int rt5630_voice_pcm_hw_params(struct snd_pcm_substream *substream, 
+			struct snd_pcm_hw_params *params,
+			struct snd_soc_dai *dai)
+{
+	struct snd_soc_pcm_runtime *rtd = substream->private_data;
+	struct snd_soc_device *socdev = rtd->socdev;
+	struct snd_soc_codec *codec = socdev->card->codec;
+	struct rt5630_priv *rt5630 = codec->private_data;
+	unsigned int iface = rt5630_read(codec, RT5630_EXTEND_SDP_CTRL) & 0xfff3;
+	struct snd_soc_dapm_widget *w;
+	int stream = substream->stream;
+	int rate = params_rate(params);
+	int coeff = get_coeff(rt5630->voice_sysclk, rate, 1);
+
+	RT5630_DEBUG("stream=%d\n",stream);
+
+
+	if (stream == SNDRV_PCM_STREAM_CAPTURE) {
+		list_for_each_entry(w, &codec->dapm_widgets, list)
+		{
+			if (!w->sname)
+				continue;
+			if (!strcmp(w->name, "Right ADC"))
+				strcpy(w->sname, "Right ADC Voice Capture");
+		}
+		rt5630_write_mask(codec, 0x2e, 0x0010, 0x0030);                           /*set adcr to be voice adc*/
+	}
+	switch (params_format(params))
+	{
+		case SNDRV_PCM_FORMAT_S16_LE:
+			break;
+		case SNDRV_PCM_FORMAT_S20_3LE:
+			iface |= 0x0004;
+		case SNDRV_PCM_FORMAT_S24_LE:
+			iface |= 0x0008;
+		case SNDRV_PCM_FORMAT_S8:
+			iface |= 0x000c;
+	}
+	rt5630_write_mask(codec, 0x3a, 0x0801, 0x0801);   /*power i2s and dac ref*/
+	if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
+		rt5630_write_mask(codec, RT5630_DAC_ADC_VODAC_FUN_SEL, 0x0001, 0x0030);     /*set adcr to be stereo adcr func*/
+
+	if (coeff >= 0)
+		rt5630_write(codec, RT5630_VOICE_DAC_PCMCLK_CTRL1, coeff_div_voice[coeff].reg64);
+	else
+		return coeff;
+	return 0;
+}
+
+
+static int rt5630_hifi_codec_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
+{
+	struct snd_soc_codec *codec = codec_dai->codec;
+	struct rt5630_priv *rt5630 = codec->private_data;
+	u16 iface = 0;
+
+	RT5630_DEBUG("fmt=%x\n",fmt);
+
+	/*set master/slave interface*/
+	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK)
+	{
+		case SND_SOC_DAIFMT_CBM_CFM:
+			iface = 0x0000;
+			break;
+		case SND_SOC_DAIFMT_CBS_CFS:
+			iface = 0x8000;
+			break;
+		default:
+			return -EINVAL;
+	}
+
+	/*interface format*/
+	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK)
+	{
+		case SND_SOC_DAIFMT_I2S:
+			iface |= 0x0000;
+			break;
+		case SND_SOC_DAIFMT_LEFT_J:
+			iface |= 0x0001;
+			break;
+		case SND_SOC_DAIFMT_DSP_A:
+			iface |= 0x0002;
+			break;
+		case SND_SOC_DAIFMT_DSP_B:
+			iface |= 0x0003;
+			break;
+		default:
+			return -EINVAL;			
+	}
+
+	/*clock inversion*/
+	switch (fmt & SND_SOC_DAIFMT_INV_MASK)
+	{
+		case SND_SOC_DAIFMT_NB_NF:
+			iface |= 0x0000;
+			break;
+		case SND_SOC_DAIFMT_IB_NF:
+			iface |= 0x0080;
+			break;
+		default:
+			return -EINVAL;
+	}
+
+	rt5630_write(codec, RT5630_MAIN_SDP_CTRL, iface);
+	return 0;
+}
+
+static int rt5630_voice_codec_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
+{
+	struct snd_soc_codec *codec = codec_dai->codec;
+	struct rt5630_priv *rt5630 = codec->private_data;
+	int iface;
+
+	RT5630_DEBUG("fmt=%x\n",fmt);
+	/*set slave/master mode*/
+	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK)
+	{
+		case SND_SOC_DAIFMT_CBM_CFM:
+			iface = 0x0000;
+			break;
+		case SND_SOC_DAIFMT_CBS_CFS:
+			iface = 0x4000;
+			break;
+		default:
+			return -EINVAL;			
+	}
+
+	switch(fmt & SND_SOC_DAIFMT_FORMAT_MASK)
+	{
+		case SND_SOC_DAIFMT_I2S:
+			iface |= 0x0000;
+			break;
+		case SND_SOC_DAIFMT_LEFT_J:
+			iface |= 0x0001;
+			break;
+		case SND_SOC_DAIFMT_DSP_A:
+			iface |= 0x0002;
+			break;
+		case SND_SOC_DAIFMT_DSP_B:
+			iface |= 0x0003;
+			break;
+		default:
+			return -EINVAL;		
+	}
+
+	/*clock inversion*/
+	switch (fmt & SND_SOC_DAIFMT_INV_MASK)
+	{
+		case SND_SOC_DAIFMT_NB_NF:
+			iface |= 0x0000;
+			break;
+		case SND_SOC_DAIFMT_IB_NF:
+			iface |= 0x0080;
+			break;
+		default:
+			return -EINVAL;			
+	}
+
+	iface |= 0x8000;      /*enable vopcm*/
+	rt5630_write(codec, RT5630_EXTEND_SDP_CTRL, iface);	
+	
+	return 0;
+}
+
+
+static int rt5630_hifi_codec_mute(struct snd_soc_dai *dai, int mute)
+{
+	struct snd_soc_codec *codec = dai->codec;
+	RT5630_DEBUG("mute=%d\n",mute);
+	
+	if (mute)
+		rt5630_write_mask(codec, RT5630_STEREO_DAC_VOL, 0x8080, 0x8080);
+	else
+		rt5630_write_mask(codec, RT5630_STEREO_DAC_VOL, 0x0000, 0x8080);
+	
+	return 0;
+}
+
+static int rt5630_voice_codec_mute(struct snd_soc_dai *dai, int mute)
+{
+	struct snd_soc_codec *codec = dai->codec;
+	RT5630_DEBUG("mute=%d\n",mute);
+
+	if (mute)
+		rt5630_write_mask(codec, RT5630_VOICE_DAC_OUT_VOL, 0x1000, 0x1000);
+	else 
+		rt5630_write_mask(codec, RT5630_VOICE_DAC_OUT_VOL, 0x0000, 0x1000);
+	return 0;
+}
+
+
+#if USE_DAPM_CTRL
+
+static int rt5630_set_bias_level(struct snd_soc_codec *codec, 
+			enum snd_soc_bias_level level)
+{
+	RT5630_DEBUG("level=%d\n",level);
+
+	switch(level) {
+	case SND_SOC_BIAS_ON:
+	case SND_SOC_BIAS_PREPARE:
+		break;
+	case SND_SOC_BIAS_STANDBY:
+			rt5630_write(codec, 0x3e, 0x0000);
+			rt5630_write(codec, 0x3a, 0x0002);
+			rt5630_write(codec, 0x3c, 0x2000);	
+		break;
+	case SND_SOC_BIAS_OFF:		
+			rt5630_write_mask(codec, 0x3a, 0x0000, 0x0300);
+			rt5630_write_mask(codec, 0x02, 0x8080, 0x8080);
+			rt5630_write_mask(codec, 0x04, 0x8080, 0x8080);
+			rt5630_write(codec, 0x3e, 0x0000);
+			rt5630_write(codec, 0x3a, 0x0000);
+			rt5630_write(codec, 0x3c, 0x0000);
+		break;
+	}
+	codec->bias_level = level;
+	return 0;
+}
+
+#else
+
+static int rt5630_set_bias_level(struct snd_soc_codec *codec, 
+			enum snd_soc_bias_level level)
+{
+
+	switch(level) {
+	case SND_SOC_BIAS_ON:
+	case SND_SOC_BIAS_PREPARE:
+		break;
+	case SND_SOC_BIAS_STANDBY:
+		break;
+	case SND_SOC_BIAS_OFF:
+			rt5630_write_mask(codec, 0x3a, 0x0000, 0x0300);
+			rt5630_write_mask(codec, 0x02, 0x8080, 0x8080);
+			rt5630_write_mask(codec, 0x04, 0x8080, 0x8080);
+			rt5630_write(codec, 0x3e, 0x0000);
+			rt5630_write(codec, 0x3a, 0x0000);
+			rt5630_write(codec, 0x3c, 0x0000);
+			
+		break;
+	
+	}
+
+	codec->bias_level = level;
+	return 0;
+}
+
+#endif
+
+
+static int rt5630_hifi_shutdown(struct snd_pcm_substream *substream, struct snd_soc_dai *codec_dai)
+{
+	struct snd_soc_codec *codec = codec_dai->codec;
+	int stream = substream->stream;
+	RT5630_DEBUG("stream=%d\n",stream);	
+	switch (stream)
+	{		
+		case SNDRV_PCM_STREAM_PLAYBACK:
+			
+//			rt5630_write_mask(codec, 0x04, 0x8080, 0x8080);        /*mute hp*/
+//			rt5630_write_mask(codec, 0x02, 0x8080, 0x8080);        /*mute spk*/			
+//			rt5630_write_mask(codec, 0x3a, 0x0000, 0xcf01);        /*power off DAC path and I2S classabd amp*/
+                     rt5630_write_mask(codec, 0x3a, 0x0000, 0x4f01);        /*power off DAC path*/
+			rt5630_write_mask(codec, 0x3c, 0x0000, 0x0330);        /*power off hp mixerlr and daclr*/
+			rt5630_write_mask(codec, 0x3e, 0x0000, 0x3c00);        /*power spklr volume*/
+#if  CONFIG_SND_DOVE_SOC_AC97_AVD1
+			spk_amplifier_enable(0);
+#endif			
+			break;
+			
+		case SNDRV_PCM_STREAM_CAPTURE:
+	
+			rt5630_write_mask(codec, 0x3e, 0x0000, 0x0005);        /*power mic1 boost*/
+			rt5630_write_mask(codec, 0x3a, 0x0000, 0x0004);        /*mic bias*/
+			rt5630_write_mask(codec, 0x3c, 0x0000, 0x00c3);        /*power adc lr and rec mixer lr*/
+
+		   break;
+
+		default:
+			return 0;
+	}		
+
+
+	return 0;
+}
+
+
+#define RT5630_STEREO_RATES (SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_44100)
+#define RT5626_VOICE_RATES (SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_8000)
+
+#define RT5630_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
+			SNDRV_PCM_FMTBIT_S20_3LE |\
+			SNDRV_PCM_FMTBIT_S24_LE |\
+			SNDRV_PCM_FMTBIT_S8)
+
+
+struct snd_soc_dai_ops rt5630_hifi_ops = {
+		.hw_params = rt5630_hifi_pcm_hw_params,	
+		.set_fmt = rt5630_hifi_codec_set_dai_fmt,
+		.set_sysclk = rt5630_hifi_codec_set_dai_sysclk,
+		.set_pll = rt5630_codec_set_dai_pll,
+		#if !USE_DAPM_CTRL
+		.prepare = rt5630_pcm_hw_prepare,
+		#endif
+	.shutdown = rt5630_hifi_shutdown,
+};
+
+struct snd_soc_dai_ops rt5630_voice_ops = {
+		.hw_params = rt5630_voice_pcm_hw_params,
+		.set_fmt = rt5630_voice_codec_set_dai_fmt,
+		.set_sysclk = rt5630_voice_codec_set_dai_sysclk,
+		.set_pll = rt5630_codec_set_dai_pll,
+		#if !USE_DAPM_CTRL
+		.prepare = rt5630_vopcm_hw_prepare,
+		#endif
+
+};
+
+struct snd_soc_dai rt5630_dai[] = {
+	/*hifi codec dai*/
+	{
+		.name = "RT5630 HiFi",
+		.id = 1,
+		.playback = {
+			.stream_name = "HiFi Playback",
+			.channels_min = 1,
+			.channels_max = 2,
+			.rates = RT5630_STEREO_RATES,
+			.formats = RT5630_FORMATS,
+		},
+		.capture = {
+			.stream_name = "HiFi Capture",
+			.channels_min = 1,
+			.channels_max = 2,
+			.rates = RT5630_STEREO_RATES,
+			.formats = RT5630_FORMATS,
+		},
+		.ops = &rt5630_hifi_ops,
+	},
+
+	/*voice codec dai*/
+	{
+		.name = "RT5630 Voice",
+		.id = 1,
+		.playback = {
+			.stream_name = "Voice Playback",
+			.channels_min = 1,
+			.channels_max =1,
+			.rates = RT5626_VOICE_RATES,
+			.formats = RT5630_FORMATS,
+		},
+		.capture = {
+			.stream_name = "Voice Capture",
+			.channels_min = 1,
+			.channels_max = 1,
+			.rates = RT5626_VOICE_RATES,
+			.formats = RT5630_FORMATS,
+		},
+		.ops = &rt5630_voice_ops,
+	},
+};
+
+EXPORT_SYMBOL_GPL(rt5630_dai);
+
+
+static void rt5630_work(struct work_struct *work)
+{
+	struct snd_soc_codec *codec =
+		 container_of(work, struct snd_soc_codec, delayed_work.work);
+	rt5630_set_bias_level(codec, codec->bias_level);
+}
+
+
+
+static int rt5630_init(struct snd_soc_device *socdev)
+{
+	struct snd_soc_codec *codec = socdev->card->codec;
+	int reg, ret = 0;
+
+	codec->name = "RT5630";
+	codec->owner = THIS_MODULE;
+	codec->read = rt5630_read;
+	codec->write = rt5630_write;
+	codec->set_bias_level = rt5630_set_bias_level;
+	codec->dai= rt5630_dai;
+	codec->num_dai = 2;
+	codec->reg_cache_step=2;
+	codec->reg_cache_size = sizeof(rt5630_reg);
+
+	codec->reg_cache = kmemdup(rt5630_reg, sizeof(rt5630_reg), GFP_KERNEL);
+	if (codec->reg_cache == NULL)
+		return -ENOMEM;
+
+	rt5630_reset(codec);
+
+	ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
+	if (ret < 0 )
+	{
+		printk(KERN_ERR "rt5630:  failed to create pcms\n");
+		goto pcm_err;
+	}
+	
+	rt5630_write(codec, RT5630_PD_CTRL_STAT, 0);
+	rt5630_write(codec, RT5630_PWR_MANAG_ADD1, PWR_MAIN_BIAS);
+	rt5630_write(codec, RT5630_PWR_MANAG_ADD2, PWR_MIXER_VREF);
+
+	schedule_delayed_work(&codec->delayed_work, msecs_to_jiffies(1000));	
+	rt5630_reg_init(codec);
+	rt5630_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
+	codec->bias_level = SND_SOC_BIAS_STANDBY;
+	
+	rt5630_add_controls(codec);
+#if USE_DAPM_CTRL
+	rt5630_add_widgets(codec);
+#endif
+	ret = snd_soc_init_card(socdev);
+	if (ret < 0)
+	{
+		printk(KERN_ERR "rt5630: failed to register card\n");
+		goto card_err;
+	}
+	RT5630_DEBUG("rt5630: initial ok\n");
+	return ret;
+
+	card_err:
+		snd_soc_free_pcms(socdev);
+		snd_soc_dapm_free(socdev);
+	
+	pcm_err:
+		kfree(codec->reg_cache);
+		return ret;
+	
+	
+}
+
+
+static int rt5630_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *id)
+{
+	struct snd_soc_device *socdev = rt5630_socdev;
+        struct snd_soc_codec *codec = socdev->card->codec;
+	int ret;
+
+	i2c_set_clientdata(i2c, codec);
+	codec->control_data = i2c;
+
+	ret = rt5630_init(socdev);
+	if (ret < 0)
+		pr_err("failed to initialise rt5630\n");
+
+	return ret;
+}
+
+static int rt5630_i2c_remove(struct i2c_client *client)
+{
+	struct snd_soc_codec *codec = i2c_get_clientdata(client);
+	kfree(codec->reg_cache);
+	return 0;
+}
+
+static const struct i2c_device_id rt5630_i2c_id[] = {
+		{"rt5630", 0},
+		{}
+};
+MODULE_DEVICE_TABLE(i2c, rt5630_i2c_id);
+static struct i2c_driver rt5630_i2c_driver = {
+	.driver = {
+		.name = "RT5630 I2C Codec",
+		.owner = THIS_MODULE,
+	},
+	.probe =    rt5630_i2c_probe,
+	.remove =   rt5630_i2c_remove,
+	.id_table = rt5630_i2c_id,
+};
+
+
+static int rt5630_add_i2c_device(struct platform_device *pdev,
+				 const struct rt5630_setup_data *setup)
+{
+	struct i2c_board_info info;
+	struct i2c_adapter *adapter;
+	struct i2c_client *client;
+	int ret;
+
+	ret = i2c_add_driver(&rt5630_i2c_driver);
+	if (ret != 0) {
+		dev_err(&pdev->dev, "can't add i2c driver\n");
+		return ret;
+	}
+#if 0
+	memset(&info, 0, sizeof(struct i2c_board_info));
+	info.addr = setup->i2c_address;
+	strlcpy(info.type, "rt5630", I2C_NAME_SIZE);
+
+	adapter = i2c_get_adapter(setup->i2c_bus);
+	if (!adapter) {
+		dev_err(&pdev->dev, "can't get i2c adapter %d\n",
+			setup->i2c_bus);
+		goto err_driver;
+	}
+
+	client = i2c_new_device(adapter, &info);
+	i2c_put_adapter(adapter);
+	if (!client) {
+		dev_err(&pdev->dev, "can't add i2c device at 0x%x\n",
+			(unsigned int)info.addr);
+		goto err_driver;
+	}
+#endif
+	return 0;
+
+err_driver:
+	i2c_del_driver(&rt5630_i2c_driver);
+	return -ENODEV;
+}
+
+
+static ssize_t rt5630_dsp_reg_show(struct device *dev, 
+	struct device_attribute *attr, char *buf)
+{
+	struct snd_soc_device *socdev = dev_get_drvdata(dev);
+	struct snd_soc_codec *codec = socdev->card->codec;
+	int count = 0;
+	int dsp_value;
+	int i;
+	Voice_DSP_Reg *vodsp_reg;
+	int dsp_num;
+
+	if (dsp_init_state == VODSP_AEC_FUNC) {
+		dsp_num = SET_VODSP_REG_AEC_INIT_NUM;
+		vodsp_reg = VODSP_AEC_Init_Value;
+	} else if (dsp_init_state == VODSP_VE_FUNC) {
+		dsp_num = SET_VODSP_VE_REG_INIT_NUM;
+		vodsp_reg = VODSP_VE_Init_Value;
+	} else
+		return -ENOSYS;
+	
+	count += sprintf(buf, "%s dsp registers\n", codec ->name);
+	for (i = 0; i < dsp_num; i ++) {
+		count += sprintf(buf + count, "0x%4x:", vodsp_reg[i].VoiceDSPIndex);
+		if (count > PAGE_SIZE - 1)
+			break;
+		dsp_value = rt5630_read_vodsp_reg(codec, vodsp_reg[i].VoiceDSPIndex);
+		count += snprintf(buf + count, PAGE_SIZE - count, "0x%4x", dsp_value);
+
+		if (count >= PAGE_SIZE - 1)
+			break;
+		
+		count += snprintf(buf + count, PAGE_SIZE - count, "\n");
+		if (count >= PAGE_SIZE - 1)
+			break;
+	}
+
+	if (count >= PAGE_SIZE)
+		count = PAGE_SIZE - 1;
+
+
+	return count;
+
+}
+
+static DEVICE_ATTR(dsp_reg, 0444, rt5630_dsp_reg_show, NULL);
+
+static ssize_t rt5630_index_reg_show(struct device *dev, 
+	struct device_attribute *attr, char *buf)
+{
+	struct snd_soc_device *socdev = dev_get_drvdata(dev);
+	struct snd_soc_codec *codec = socdev->card->codec;
+	int count = 0;
+	int value;
+	int i; 
+	
+	count += sprintf(buf, "%s index register\n", codec->name);
+
+	for (i = 0; i < 60; i++) {
+		count += sprintf(buf + count, "index-%2x", i);
+		if (count >= PAGE_SIZE - 1)
+			break;
+		value = rt5630_read_index(codec, i);
+		count += snprintf(buf + count, PAGE_SIZE - count, "0x%4x", value);
+
+		if (count >= PAGE_SIZE - 1)
+			break;
+
+		count += snprintf(buf + count, PAGE_SIZE - count, "\n");
+		if (count >= PAGE_SIZE - 1)
+			break;
+	}
+
+	if (count >= PAGE_SIZE)
+			count = PAGE_SIZE - 1;
+		
+	return count;
+	
+}
+
+static DEVICE_ATTR(index_reg, 0444, rt5630_index_reg_show, NULL);
+
+
+static int rt5630_probe(struct platform_device *pdev)
+{
+	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
+	struct rt5630_setup_data *setup = socdev->codec_data;
+	struct snd_soc_codec *codec;
+	struct rt5630_priv *rt5630;
+	int ret;
+	codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
+	if (codec == NULL)
+		return -ENOMEM;
+
+	rt5630 = kzalloc(sizeof(struct rt5630_priv), GFP_KERNEL);
+	if (rt5630 == NULL) {
+		kfree(codec);
+		return -ENOMEM;
+	}
+
+	codec->private_data = rt5630;
+	socdev->card->codec = codec;
+	mutex_init(&codec->mutex);
+	INIT_LIST_HEAD(&codec->dapm_widgets);
+	INIT_LIST_HEAD(&codec->dapm_paths);
+	rt5630_socdev = socdev;
+	INIT_DELAYED_WORK(&codec->delayed_work, rt5630_work);
+	ret = device_create_file(&pdev->dev, &dev_attr_dsp_reg);
+	if (ret < 0)
+		printk(KERN_WARNING "asoc: failed to add dsp_reg sysfs files\n");
+	ret = device_create_file(&pdev->dev, &dev_attr_index_reg);
+	if (ret < 0)
+		printk(KERN_WARNING "asoc: failed to add index_reg sysfs files\n");
+	ret = -ENODEV;
+	if (setup->i2c_address) {
+		codec->hw_write = (hw_write_t)i2c_master_send;
+		ret = rt5630_add_i2c_device(pdev, setup);
+	}
+
+	if (ret != 0) {
+		kfree(codec->private_data);
+		kfree(codec);
+		socdev->card->codec = NULL;
+	}
+	return ret;
+}
+
+static int run_delayed_work(struct delayed_work *dwork)
+{
+	int ret;
+
+	/* cancel any work waiting to be queued. */
+	ret = cancel_delayed_work(dwork);
+
+	/* if there was any work waiting then we run it now and
+	 * wait for it's completion */
+	if (ret) {
+		schedule_delayed_work(dwork, 0);
+		flush_scheduled_work();
+	}
+	return ret;
+}
+
+
+static int rt5630_remove(struct platform_device *pdev)
+{
+	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
+        struct snd_soc_codec *codec = socdev->card->codec;
+
+	if (codec->control_data)
+		rt5630_set_bias_level(codec, SND_SOC_BIAS_OFF);
+	run_delayed_work(&codec->delayed_work);
+	snd_soc_free_pcms(socdev);
+	snd_soc_dapm_free(socdev);
+	device_remove_file(&pdev->dev, &dev_attr_dsp_reg);
+	device_remove_file(&pdev->dev, &dev_attr_index_reg);
+	i2c_unregister_device(codec->control_data);
+	i2c_del_driver(&rt5630_i2c_driver);
+	kfree(codec->private_data);
+	kfree(codec);
+
+	return 0;
+}
+
+static int rt5630_suspend_reg[] = {0x3a, 0x3c, 0x3e};
+static int rt5630_suspend(struct platform_device *pdev, pm_message_t state)
+{
+	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
+        struct snd_soc_codec *codec = socdev->card->codec;
+	int i;
+	u8 data[3];
+	RT5630_DEBUG("");
+
+	rt5630_set_bias_level(codec, SND_SOC_BIAS_OFF);
+	for (i = 0; i < ARRAY_SIZE(rt5630_suspend_reg); i ++) {
+		data[0] = rt5630_suspend_reg[i];
+		data[1] = 0x00;
+		data[2] = 0x00;
+		codec->hw_write(codec->control_data, data, 3);
+	}
+	dsp_init_state=VODSP_NULL;
+
+
+	return 0;
+}
+
+static int rt5630_resume(struct platform_device *pdev)
+{
+	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
+        struct snd_soc_codec *codec = socdev->card->codec;
+	int i;
+	u8 data[3];
+	u16 *cache = codec->reg_cache;
+       RT5630_DEBUG("");
+	rt5630_write_mask(codec, 0x3a, 0x0802, 0x0802); 
+	rt5630_write_mask(codec, 0x3c, 0xa000, 0xa000);
+	schedule_timeout_uninterruptible(msecs_to_jiffies(1000));
+	/* Sync reg_cache with the hardware */
+	for (i = 0; i < ARRAY_SIZE(rt5630_reg); i++) {
+		if (i == RT5630_RESET)
+			continue;
+		data[0] = i << 1;
+		data[1] = (0xff00 & cache[i]) >> 8;
+		data[2] = (0x00ff & cache[i]);
+		codec->hw_write(codec->control_data, data, 3);
+		RT5630_DEBUG("recover codec register[0x%x] from cache\n", i<<1);
+	}
+
+	rt5630_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
+
+	/* charge rt5630 caps */
+	if (codec->suspend_bias_level == SND_SOC_BIAS_ON) {
+		rt5630_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
+		codec->bias_level = SND_SOC_BIAS_ON;
+		schedule_delayed_work(&codec->delayed_work,
+					msecs_to_jiffies(1000));
+	}
+
+	return 0;
+}
+
+
+struct snd_soc_codec_device soc_codec_dev_rt5630 = {
+	.probe = 	rt5630_probe,
+	.remove = 	rt5630_remove,
+	.suspend = 	rt5630_suspend,
+	.resume =	rt5630_resume,
+};
+
+EXPORT_SYMBOL_GPL(soc_codec_dev_rt5630);
+
+static int __devinit rt5630_dev_probe(struct platform_device *pdev)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(rt5630_dai); i++)
+		rt5630_dai[i].dev = &pdev->dev;
+
+	return snd_soc_register_dais(rt5630_dai, ARRAY_SIZE(rt5630_dai));
+}
+
+static int __devexit rt5630_dev_remove(struct platform_device *pdev)
+{
+	snd_soc_unregister_dais(rt5630_dai, ARRAY_SIZE(rt5630_dai));
+
+	return 0;
+}
+
+static struct platform_driver rt5630_driver = {
+	.probe		= rt5630_dev_probe,
+	.remove		= __devexit_p(rt5630_dev_remove),
+	.driver		= {
+		.name	= "rt5630-codec",
+		.owner	= THIS_MODULE,
+	},
+};
+
+static int __init rt5630_modinit(void)
+{
+	return platform_driver_register(&rt5630_driver);
+}
+
+static void __exit rt5630_exit(void)
+{
+	platform_driver_unregister(&rt5630_driver);
+}
+
+module_init(rt5630_modinit);
+module_exit(rt5630_exit);
+MODULE_LICENSE("GPL");
+
--- linux-mvl-dove-2.6.32.orig/sound/soc/codecs/wm8974.c
+++ linux-mvl-dove-2.6.32/sound/soc/codecs/wm8974.c
@@ -47,7 +47,7 @@
 };
 
 #define WM8974_POWER1_BIASEN  0x08
-#define WM8974_POWER1_BUFIOEN 0x10
+#define WM8974_POWER1_BUFIOEN 0x04
 
 struct wm8974_priv {
 	struct snd_soc_codec codec;
@@ -480,23 +480,23 @@
 
 	/* filter coefficient */
 	switch (params_rate(params)) {
-	case SNDRV_PCM_RATE_8000:
+	case 8000:
 		adn |= 0x5 << 1;
 		break;
-	case SNDRV_PCM_RATE_11025:
+	case 11025:
 		adn |= 0x4 << 1;
 		break;
-	case SNDRV_PCM_RATE_16000:
+	case 16000:
 		adn |= 0x3 << 1;
 		break;
-	case SNDRV_PCM_RATE_22050:
+	case 22050:
 		adn |= 0x2 << 1;
 		break;
-	case SNDRV_PCM_RATE_32000:
+	case 32000:
 		adn |= 0x1 << 1;
 		break;
-	case SNDRV_PCM_RATE_44100:
-	case SNDRV_PCM_RATE_48000:
+	case 44100:
+	case 48000:
 		break;
 	}
 
--- linux-mvl-dove-2.6.32.orig/sound/soc/codecs/wm8940.c
+++ linux-mvl-dove-2.6.32/sound/soc/codecs/wm8940.c
@@ -379,23 +379,23 @@
 		iface |= (1 << 9);
 
 	switch (params_rate(params)) {
-	case SNDRV_PCM_RATE_8000:
+	case 8000:
 		addcntrl |= (0x5 << 1);
 		break;
-	case SNDRV_PCM_RATE_11025:
+	case 11025:
 		addcntrl |= (0x4 << 1);
 		break;
-	case SNDRV_PCM_RATE_16000:
+	case 16000:
 		addcntrl |= (0x3 << 1);
 		break;
-	case SNDRV_PCM_RATE_22050:
+	case 22050:
 		addcntrl |= (0x2 << 1);
 		break;
-	case SNDRV_PCM_RATE_32000:
+	case 32000:
 		addcntrl |= (0x1 << 1);
 		break;
-	case SNDRV_PCM_RATE_44100:
-	case SNDRV_PCM_RATE_48000:
+	case 44100:
+	case 48000:
 		break;
 	}
 	ret = snd_soc_write(codec, WM8940_ADDCNTRL, addcntrl);
--- linux-mvl-dove-2.6.32.orig/sound/soc/codecs/rt5630.h
+++ linux-mvl-dove-2.6.32/sound/soc/codecs/rt5630.h
@@ -0,0 +1,715 @@
+#ifndef _RT5630_H
+#define _RT5630_H
+#define RT5630_RESET						0X00			//RESET CODEC TO DEFAULT
+#define RT5630_SPK_OUT_VOL					0X02			//SPEAKER OUT VOLUME
+#define RT5630_HP_OUT_VOL					0X04			//HEADPHONE OUTPUT VOLUME
+#define RT5630_AUX_OUT_VOL					0X06			//AUXOUT VOLUME
+#define RT5630_PHONEIN_VOL					0X08			//PHONE INPUT VOLUME
+#define RT5630_LINE_IN_VOL					0X0A			//LINE IN VOLUME
+#define RT5630_STEREO_DAC_VOL				0X0C			//STEREO DAC VOLUME
+#define RT5630_MIC_VOL						0X0E			//MICROPHONE VOLUME
+#define RT5630_DAC_AND_MIC_CTRL				0X10			//STEREO DAC AND MIC ROUTING CONTROL
+#define RT5630_ADC_REC_GAIN					0X12			//ADC RECORD GAIN
+#define RT5630_ADC_REC_MIXER				0X14			//ADC RECORD MIXER CONTROL
+#define RT5630_VOICE_DAC_OUT_VOL			0X18			//VOICE DAC OUTPUT VOLUME
+#define RT5630_VODSP_PDM_CTL				0X1A			//VODSP & PDM CONTROL
+#define RT5630_OUTPUT_MIXER_CTRL			0X1C			//OUTPUT MIXER CONTROL
+#define RT5630_VODSP_CTL					0X1E			//VODSP CONTROL
+#define RT5630_MIC_CTRL						0X22			//MICROPHONE CONTROL
+#define RT5630_DMIC_CTRL					0x24
+#define RT5630_PD_CTRL_STAT					0X26			//POWER DOWN CONTROL/STATUS
+#define RT5630_DAC_ADC_VODAC_FUN_SEL		0X2E			//STEREO DAC,VOICE DAC,STEREO ADC FUNCTION SELECT
+#define	RT5630_MAIN_SDP_CTRL				0X34			//MAIN SERIAL DATA PORT CONTROL(STEREO I2S)
+#define RT5630_EXTEND_SDP_CTRL				0X36			//EXTEND SERIAL DATA PORT CONTROL(VOICE I2S/PCM)
+#define	RT5630_PWR_MANAG_ADD1				0X3A			//POWER MANAGMENT ADDITION 1
+#define RT5630_PWR_MANAG_ADD2				0X3C			//POWER MANAGMENT ADDITION 2
+#define RT5630_PWR_MANAG_ADD3				0X3E			//POWER MANAGMENT ADDITION 3
+#define RT5630_GEN_CTRL_REG1				0X40			//GENERAL PURPOSE CONTROL REGISTER 1
+#define	RT5630_GEN_CTRL_REG2				0X42			//GENERAL PURPOSE CONTROL REGISTER 2
+#define RT5630_PLL_CTRL						0X44			//PLL1 CONTROL
+#define RT5630_PLL2_CTRL					0X46			//PLL2 CONTROL
+#define RT5630_LDO_CTRL						0X48			//LDO CONTROL
+#define RT5630_GPIO_PIN_CONFIG				0X4C			//GPIO PIN CONFIGURATION
+#define RT5630_GPIO_PIN_POLARITY			0X4E			//GPIO PIN POLARITY	
+#define RT5630_GPIO_PIN_STICKY				0X50			//GPIO PIN STICKY	
+#define RT5630_GPIO_PIN_WAKEUP				0X52			//GPIO PIN WAKE UP
+#define RT5630_GPIO_PIN_STATUS				0X54			//GPIO PIN STATUS
+#define RT5630_GPIO_PIN_SHARING				0X56			//GPIO PIN SHARING
+#define	RT5630_OVER_TEMP_CURR_STATUS		0X58			//OVER TEMPERATURE AND CURRENT STATUS
+#define RT5630_SOFT_VOL_CTRL				0X5A			//SOFT VOLUME CONTROL SETTING
+#define RT5630_GPIO_OUT_CTRL				0X5C			//GPIO OUTPUT PIN CONTRL
+#define RT5630_MISC_CTRL					0X5E			//MISC CONTROL
+#define	RT5630_STEREO_DAC_CLK_CTRL1			0X60			//STEREO DAC CLOCK CONTROL 1
+#define RT5630_STEREO_DAC_CLK_CTRL2			0X62			//STEREO DAC CLOCK CONTROL 2
+#define RT5630_VOICE_DAC_PCMCLK_CTRL1		0X64			//VOICE/PCM DAC CLOCK CONTROL 1
+#define RT5630_PSEDUEO_SPATIAL_CTRL			0X68			//PSEDUEO STEREO /SPATIAL EFFECT BLOCK CONTROL
+#define RT5630_PRIV_ADDR					0X6A			//PRIVATE ADDRESS
+#define RT5630_PRIV_DATA					0X6C			//PRIVATE DATA 
+#define RT5630_EQ_CTRL_ADC_HPF				0X6E			//EQ CONTROL AND STATUS /ADC HPF CONTROL
+#define RT5630_VODSP_REG_ADDR 		    	0x70			//VODSP REGISTER ADDRESS
+#define RT5630_VODSP_REG_DATA 		    	0x72			//VODSP REGISTER DATA
+#define RT5630_VODSP_REG_CMD 			    0x74			//VODSP REGISTER COMMAND
+
+
+/**************************************************************************************************
+ *Bit define of Codec Register
+ *************************************************************************************************/
+//global definition
+#define RT_L_MUTE						(0x1<<15)		//Mute Left Control
+#define RT_L_ZC							(0x1<<14)		//Mute Left Zero-Cross Detector Control
+#define RT_R_MUTE						(0x1<<7)		//Mute Right Control
+#define RT_R_ZC							(0x1<<6)		//Mute Right Zero-Cross Detector Control
+#define RT_M_HP_MIXER					(0x1<<15)		//Mute source to HP Mixer
+#define RT_M_SPK_MIXER					(0x1<<14)		//Mute source to Speaker Mixer
+#define RT_M_MONO_MIXER					(0x1<<13)		//Mute source to Mono Mixer
+
+//Phone Input Volume(0x08)
+#define M_PHONEIN_TO_HP_MIXER			(0x1<<15)		//Mute Phone In volume to HP mixer
+#define M_PHONEIN_TO_SPK_MIXER			(0x1<<14)		//Mute Phone In volume to speaker mixer
+
+
+//Mic Routing Control(0x10)
+#define M_MIC1_TO_HP_MIXER				(0x1<<15)		//Mute MIC1 to HP mixer
+#define M_MIC1_TO_SPK_MIXER				(0x1<<14)		//Mute MiC1 to SPK mixer
+#define M_MIC1_TO_MONO_MIXER			(0x1<<13)		//Mute MIC1 to MONO mixer
+#define M_MIC2_TO_HP_MIXER				(0x1<<11)		//Mute MIC2 to HP mixer
+#define M_MIC2_TO_SPK_MIXER				(0x1<<10)		//Mute MiC2 to SPK mixer
+#define M_MIC2_TO_MONO_MIXER			(0x1<<9)		//Mute MIC2 to MONO mixer
+#define M_DAC_TO_HPL_MIXER				(0x1<<3)		//Mute DAC to HP left mixer
+#define M_DAC_TO_HPR_MIXER				(0x1<<2)		//Mute DAC to HP right mixer
+#define M_DAC_TO_SPK_MIXER				(0x1<<1)		//Mute DAC to SPK mixer
+#define M_DAC_TO_MONO_MIXER				(0x1<<0)		//Mute DAC to MONO mixer
+
+
+
+//ADC Record Gain(0x12)
+#define M_ADC_L_TO_HP_MIXER				(0x1<<15)		//Mute left of ADC to HP Mixer
+#define M_ADC_L_TO_MONO_MIXER			(0x1<<14)		//Mute left of ADC to MONO Mixer
+#define ADC_L_ZC_DET					(0x1<<13)		//ADC Zero-Cross Detector Control
+#define ADC_L_GAIN_MASK					(0x1f<<8)		//ADC Record Gain Left channel Mask
+#define M_ADC_R_TO_HP_MIXER				(0x1<<7)		//Mute right of ADC to HP Mixer
+#define M_ADC_R_TO_MONO_MIXER			(0x1<<6)		//Mute right of ADC to MONO Mixer
+#define ADC_R_ZC_DET					(0x1<<5)		//ADC Zero-Cross Detector Control
+#define ADC_R_GAIN_MASK					(0x1f<<0)		//ADC Record Gain Right channel Mask
+
+//Voice DAC Output Volume(0x18)
+#define M_V_DAC_TO_HP_MIXER				(0x1<<15)
+#define M_V_DAC_TO_SPK_MIXER			(0x1<<14)
+#define M_V_DAC_TO_MONO_MIXER			(0x1<<13)
+
+
+//AEC & PDM Control(0x1A)
+#define VODSP_SRC1_PWR					(0x1<<15)		//Enable SRC1 Power
+#define VODSP_SRC2_PWR					(0x1<<13)		//Enable SRC2 Power
+
+#define VODSP_SRC2_S_SEL_MASK			(0x1<<12)		
+#define VODSP_SRC2_S_SEL_TXDP			(0x0<<12)		//SRC2 source select AEC_TXDP
+#define VODSP_SRC2_S_SEL_TXDC			(0x1<<12)		//SRC2 source select AEC_TXDC
+
+#define VODSP_RXDP_PWR					(0x1<<11)		//Enable AEC RXDP Power
+
+#define VODSP_RXDP_S_SEL_MASK			(0x3<<9)		
+#define VODSP_RXDP_S_SEL_SRC1			(0x0<<9)		//AEC RxDP source select SRC1 Output
+#define VODSP_RXDP_S_SEL_ADCL			(0x1<<9)		//AEC RxDP source select ADC Left to AEC Digital Path
+#define VODSP_RXDP_S_SEL_VOICE			(0x2<<9)		//AEC RxDP source select Voice to Stereo Digital Path
+#define VODSP_RXDP_S_SEL_ADCR			(0x3<<9)		//AEC RxDP source select ADC Right to AEC Digital Path
+
+#define VODSP_RXDC_PWR					(0x1<<8)		//Enable AEC RXDC Power
+
+#define VOICE_PCM_S_SEL_MASK			(0x1<<7)		
+#define VOICE_PCM_S_SEL_ADC_R			(0x0<<7)		//VSADC PCM interface source select ADC R
+#define VOICE_PCM_S_SEL_AEC_TXDP		(0x1<<7)		//VSADC PCM interface source select AEC_TXDP
+
+#define REC_S_SEL_MASK					(0x3<<4)		
+#define REC_S_SEL_ADC					(0x0<<4)		//Main Stereo Record I2S source select ADC L/R
+#define REC_S_SEL_VOICE					(0x1<<4)		//Main Stereo Record I2S source select Voice to Stereo Digital Path
+#define REC_S_SEL_SRC2					(0x2<<4)		//Main Stereo Record I2S source select SRC2
+
+
+//Output Mixer Control(0x1C)
+#define	SPKOUT_N_SOUR_MASK				(0x3<<14)	
+#define	SPKOUT_N_SOUR_LN				(0x2<<14)
+#define	SPKOUT_N_SOUR_RP				(0x1<<14)
+#define	SPKOUT_N_SOUR_RN				(0x0<<14)
+
+#define SPKOUT_SEL_CLASS_D				(0x1<<13)
+#define SPKOUT_SEL_CLASS_AB				(0x0<<13)
+
+#define SPK_CLASS_AB_S_AMP				(0x0<<12)
+#define SPK_CALSS_AB_W_AMP				(0x1<<12)
+
+#define SPKOUT_INPUT_SEL_MASK			(0x3<<10)
+#define SPKOUT_INPUT_SEL_MONOMIXER		(0x3<<10)
+#define SPKOUT_INPUT_SEL_SPKMIXER		(0x2<<10)
+#define SPKOUT_INPUT_SEL_HPMIXER		(0x1<<10)
+#define SPKOUT_INPUT_SEL_VMID			(0x0<<10)
+
+#define HPL_INPUT_SEL_HPLMIXER			(0x1<<9)
+#define HPR_INPUT_SEL_HPRMIXER			(0x1<<8)	
+
+#define AUXOUT_INPUT_SEL_MASK			(0x3<<6)
+#define AUXOUT_INPUT_SEL_MONOMIXER		(0x3<<6)
+#define AUXOUT_INPUT_SEL_SPKMIXER		(0x2<<6)
+#define AUXOUT_INPUT_SEL_HPMIXER		(0x1<<6)
+#define AUXOUT_INPUT_SEL_VMID			(0x0<<6)
+
+
+//Voice DSP Control(0x1E)
+#define VODSP_SYSCLK_S_SEL_MASK		 	(0x1<<15)
+#define VODSP_SYSCLK_S_SEL_M_CLK	 	(0x0<<15)
+#define VODSP_SYSCLK_S_SEL_V_CLK	 	(0x1<<15)
+
+#define VODSP_LRCK_SEL_MASK				(0x1<<13)
+#define VODSP_LRCK_SEL_8K				(0x0<<13)
+#define VODSP_LRCK_SEL_16K				(0x1<<13)
+
+#define VODSP_TEST_MODE_ENA				(0x1<<3)
+#define VODSP_NO_BP_MODE_ENA			(0x1<<2)
+#define VODSP_NO_PD_MODE_ENA			(0x1<<1)
+#define VODSP_NO_RST_MODE_ENA			(0x1<<0)
+
+
+
+
+//Micphone Control define(0x22)
+#define MIC1		1
+#define MIC2		2
+#define MIC_BIAS_90_PRECNET_AVDD	1
+#define	MIC_BIAS_75_PRECNET_AVDD	2
+
+#define MIC1_BOOST_CONTROL_MASK		(0x3<<10)
+#define MIC1_BOOST_CONTROL_BYPASS	(0x0<<10)
+#define MIC1_BOOST_CONTROL_20DB		(0x1<<10)
+#define MIC1_BOOST_CONTROL_30DB		(0x2<<10)
+#define MIC1_BOOST_CONTROL_40DB		(0x3<<10)
+
+#define MIC2_BOOST_CONTROL_MASK		(0x3<<8)
+#define MIC2_BOOST_CONTROL_BYPASS	(0x0<<8)
+#define MIC2_BOOST_CONTROL_20DB		(0x1<<8)
+#define MIC2_BOOST_CONTROL_30DB		(0x2<<8)
+#define MIC2_BOOST_CONTROL_40DB		(0x3<<8)
+
+#define MIC1_BIAS_VOLT_CTRL_MASK	(0x1<<5)
+#define MIC1_BIAS_VOLT_CTRL_90P		(0x0<<5)
+#define MIC1_BIAS_VOLT_CTRL_75P		(0x1<<5)
+
+#define MIC2_BIAS_VOLT_CTRL_MASK	(0x1<<4)
+#define MIC2_BIAS_VOLT_CTRL_90P		(0x0<<4)
+#define MIC2_BIAS_VOLT_CTRL_75P		(0x1<<4)
+
+//PowerDown control of register(0x26)
+//power management bits
+#define RT_PWR_PR7					(0x1<<15)	//write this bit to power down the Speaker Amplifier
+#define RT_PWR_PR6					(0x1<<14)	//write this bit to power down the Headphone Out and MonoOut
+#define RT_PWR_PR5					(0x1<<13)	//write this bit to power down the internal clock(without PLL)
+#define RT_PWR_PR3					(0x1<<11)	//write this bit to power down the mixer(vref/vrefout out off)
+#define RT_PWR_PR2					(0x1<<10)	//write this bit to power down the mixer(vref/vrefout still on)
+#define RT_PWR_PR1					(0x1<<9) 	//write this bit to power down the dac
+#define RT_PWR_PR0					(0x1<<8) 	//write this bit to power down the adc
+#define RT_PWR_REF					(0x1<<3)	//read only
+#define RT_PWR_ANL					(0x1<<2)	//read only	
+#define RT_PWR_DAC					(0x1<<1)	//read only
+#define RT_PWR_ADC					(0x1)		//read only
+
+
+//Stereo DAC/Voice DAC/Stereo ADC function(0x2E)
+#define DAC_FUNC_SEL_MASK			(0x3<<12)
+#define DAC_FUNC_SEL_DAC			(0x0<<12)		
+#define DAC_FUNC_SEL_SRC2			(0x1<<12)
+#define DAC_FUNC_SEL_VODSP_TXDP		(0x2<<12)
+#define DAC_FUNC_SEL_VODSP_TXDC		(0x3<<12)
+
+#define VODAC_SOUR_SEL_MASK			(0x7<<8)
+#define VODAC_SOUR_SEL_VOICE		(0x0<<8)	
+#define VODAC_SOUR_SEL_SRC2			(0x1<<8)
+#define VODAC_SOUR_SEL_VODSP_TXDP	(0x2<<8)
+#define VODAC_SOUR_SEL_VODSP_TXDC	(0x3<<8)
+
+#define ADCR_FUNC_SEL_MASK			(0x3<<4)
+#define ADCR_FUNC_SEL_ADC			(0x0<<4)
+#define ADCR_FUNC_SEL_VOADC			(0x1<<4)
+#define ADCR_FUNC_SEL_VODSP			(0x2<<4)
+#define ADCR_FUNC_SEL_PDM			(0x3<<4)
+
+#define ADCL_FUNC_SEL_MASK			(0x3<<0)
+#define ADCL_FUNC_SEL_ADC			(0x0<<0)
+#define ADCL_FUNC_SEL_VODSP			(0x1<<0)
+
+//Main Serial Data Port Control(0x34)			
+#define MAIN_I2S_MODE_SEL			(0x1<<15)		//0:Master mode 1:Slave mode
+#define MAIN_I2S_SADLRCK_CTRL		(0x1<<14)		//0:Disable,ADC and DAC use the same fs,1:Enable
+
+#define MAIN_I2S_PCM_MODE			(0x1<<6)		//0:Normal SADLRCK/SDALRCK,1:Invert SADLRCK/SDALRCK 
+//Data Length Slection
+#define MAIN_I2S_DL_MASK			(0x3<<2)		//main i2s Data Length mask	
+#define MAIN_I2S_DL_16				(0x0<<2)		//16 bits
+#define MAIN_I2S_DL_20				(0x1<<2)		//20 bits
+#define	MAIN_I2S_DL_24				(0x2<<2)		//24 bits
+#define MAIN_I2S_DL_32				(0x3<<2)		//8 bits
+
+//PCM Data Format Selection
+#define MAIN_I2S_DF_MASK			(0x3)			//main i2s Data Format mask
+#define MAIN_I2S_DF_I2S				(0x0)			//I2S FORMAT 
+#define MAIN_I2S_DF_LEFT			(0x1)			//LEFT JUSTIFIED format
+#define	MAIN_I2S_DF_PCM_A			(0x2)			//PCM Mode A
+#define MAIN_I2S_DF_PCM_B				(0x3)			//PCM Mode B
+
+//Extend Serial Data Port Control(0x36)
+#define EXT_I2S_FUNC_ENABLE			(0x1<<15)		//Enable PCM interface on GPIO 1,3,4,5  0:GPIO function,1:Voice PCM interface
+#define EXT_I2S_MODE_SEL			(0x1<<14)		//0:Master	,1:Slave
+#define EXT_I2S_AUTO_CLK_CTRL		(0x1<<13)		//0:Disable,1:Enable
+#define EXT_I2S_BCLK_POLARITY		(0x1<<7)		//0:Normal 1:Invert
+#define EXT_I2S_PCM_MODE			(0x1<<6)		//0:Normal VSLRCK,1:Invert VSLRCK 
+//Data Length Slection
+#define EXT_I2S_DL_MASK				(0x3<<2)		//Extend i2s Data Length mask	
+#define EXT_I2S_DL_32				(0x3<<2)		//8 bits
+#define	EXT_I2S_DL_24				(0x2<<2)		//24 bits
+#define EXT_I2S_DL_20				(0x1<<2)		//20 bits
+#define EXT_I2S_DL_16				(0x0<<2)		//16 bits
+
+//Voice Data Format
+#define EXT_I2S_DF_MASK				(0x3)			//Extend i2s Data Format mask
+#define EXT_I2S_DF_I2S				(0x0)			//I2S FORMAT 
+#define EXT_I2S_DF_LEFT				(0x1)			//LEFT JUSTIFIED format
+#define	EXT_I2S_DF_PCM_A			(0x2)			//PCM Mode A
+#define EXT_I2S_DF_PCM_B			(0x3)			//PCM Mode B
+
+//Power managment addition 1 (0x3A),0:Disable,1:Enable
+#define PWR_DAC_DF2SE_L				(0x1<<15)
+#define PWR_DAC_DF2SE_R				(0x1<<14)
+#define PWR_ZC_DET_PD				(0x1<<13)
+#define PWR_I2S_INTERFACE			(0x1<<11)
+#define PWR_AMP_POWER				(0x1<<10)
+#define PWR_HP_OUT_AMP				(0x1<<9)
+#define PWR_HP_OUT_ENH_AMP			(0x1<<8)
+#define PWR_VOICE_DF2SE				(0x1<<7)
+#define PWR_SOFTGEN_EN				(0x1<<6)	
+#define	PWR_MIC_BIAS1_DET			(0x1<<5)
+#define	PWR_MIC_BIAS2_DET			(0x1<<4)
+#define PWR_MIC_BIAS1				(0x1<<3)	
+#define PWR_MIC_BIAS2				(0x1<<2)	
+#define PWR_MAIN_BIAS				(0x1<<1)
+#define PWR_DAC_REF					(0x1)
+
+
+//Power managment addition 2(0x3C),0:Disable,1:Enable
+#define PWR_PLL1					(0x1<<15)
+#define PWR_PLL2					(0x1<<14)
+#define PWR_MIXER_VREF				(0x1<<13)
+#define PWR_TEMP_SENSOR				(0x1<<12)
+#define PWR_AUX_ADC					(0x1<<11)
+#define PWR_VOICE_CLOCK				(0x1<<10)
+#define PWR_L_DAC_CLK				(0x1<<9)
+#define PWR_R_DAC_CLK				(0x1<<8)
+#define PWR_L_ADC_CLK				(0x1<<7)
+#define PWR_R_ADC_CLK				(0x1<<6)
+#define PWR_L_HP_MIXER				(0x1<<5)
+#define PWR_R_HP_MIXER				(0x1<<4)
+#define PWR_SPK_MIXER				(0x1<<3)
+#define PWR_MONO_MIXER				(0x1<<2)
+#define PWR_L_ADC_REC_MIXER			(0x1<<1)
+#define PWR_R_ADC_REC_MIXER			(0x1)
+
+
+//Power managment addition 3(0x3E),0:Disable,1:Enable
+#define PWR_OSC_EN					(0x1<<15)
+#define PWR_AUXOUT_VOL				(0x1<<14)
+#define PWR_SPK_OUT					(0x1<<13)
+#define PWR_SPK_OUT_N				(0x1<<12)
+#define PWR_HP_L_OUT_VOL			(0x1<<11)
+#define PWR_HP_R_OUT_VOL			(0x1<<10)
+#define PWR_VODSP_INTERFACE			(0x1<<9)
+#define PWR_I2C_FOR_VODSP			(0x1<<8)
+#define PWR_LINE_IN_L				(0x1<<7)
+#define PWR_LINE_IN_R				(0x1<<6)
+#define PWR_PHONE_VOL				(0x1<<5)
+#define PWR_PHONE_ADMIXER			(0x1<<4)
+#define PWR_MIC1_VOL_CTRL			(0x1<<3)
+#define PWR_MIC2_VOL_CTRL			(0x1<<2)
+#define PWR_MIC1_BOOST				(0x1<<1)
+#define PWR_MIC2_BOOST				(0x1)
+
+//General Purpose Control Register 1(0x40)
+#define GP_CLK_FROM_PLL				(0x1<<15)	
+#define GP_CLK_FROM_MCLK			(0x0<<15)	
+
+#define GP_DAC_HI_PA_ENA			(0x1<<10)	//Enable DAC High Pass Filter
+
+#define GP_EXTCLK_S_SEL_PLL2		(0x1<<6)
+#define GP_EXTCLK_S_SEL_PLL1		(0x0<<6)	
+
+#define GP_EXTCLK_DIR_SEL_OUTPUT	(0x1<<5)
+#define GP_EXTCLK_DIR_SEL_INTPUT	(0x0<<5)
+
+#define GP_VOSYS_S_SEL_PLL2			(0x0<<4)
+#define GP_VOSYS_S_SEL_EXTCLK		(0x1<<4)
+
+#define GP_SPK_AMP_CTRL_MASK		(0x7<<1)
+#define GP_SPK_AMP_CTRL_RATIO_225	(0x0<<1)		//2.25 Vdd
+#define GP_SPK_AMP_CTRL_RATIO_200	(0x1<<1)		//2.00 Vdd
+#define GP_SPK_AMP_CTRL_RATIO_175	(0x2<<1)		//1.75 Vdd
+#define GP_SPK_AMP_CTRL_RATIO_150	(0x3<<1)		//1.50 Vdd
+#define GP_SPK_AMP_CTRL_RATIO_125	(0x4<<1)		//1.25 Vdd	
+#define GP_SPK_AMP_CTRL_RATIO_100	(0x5<<1)		//1.00 Vdd
+
+//General Purpose Control Register 2(0x42)
+#define GP2_PLL1_SOUR_SEL_MASK		(0x3<<12)
+#define GP2_PLL1_SOUR_SEL_MCLK		(0x0<<12)
+#define GP2_PLL1_SOUR_SEL_BCLK		(0x2<<12)
+#define GP2_PLL1_SOUR_SEL_VBCLK		(0x3<<12)
+
+//PLL Control(0x44)
+#define PLL_M_CODE_MASK				0xF				//PLL M code mask
+#define PLL_K_CODE_MASK				(0x7<<4)		//PLL K code mask
+#define PLL_BYPASS_N				(0x1<<7)		//bypass PLL N code
+#define PLL_N_CODE_MASK				(0xFF<<8)		//PLL N code mask
+
+#define PLL_CTRL_M_VAL(m)		((m)&0xf)
+#define PLL_CTRL_K_VAL(k)		(((k)&0x7)<<4)
+#define PLL_CTRL_N_VAL(n)		(((n)&0xff)<<8)
+
+//PLL2 CONTROL
+#define PLL2_ENA					(0x1<<15)
+#define PLL_2_RATIO_8X				(0x0)
+#define PLL_2_RATIO_16X				(0x1)
+
+//LDO Control(0x48)
+#define LDO_ENABLE					(0x1<<15)
+
+#define LDO_OUT_VOL_CTRL_MASK		(0xf<<0)
+#define LDO_OUT_VOL_CTRL_1_55V		(0xf<<0)
+#define LDO_OUT_VOL_CTRL_1_50V		(0xe<<0)
+#define LDO_OUT_VOL_CTRL_1_45V		(0xd<<0)
+#define LDO_OUT_VOL_CTRL_1_40V		(0xc<<0)
+#define LDO_OUT_VOL_CTRL_1_35V		(0xb<<0)
+#define LDO_OUT_VOL_CTRL_1_30V		(0xa<<0)
+#define LDO_OUT_VOL_CTRL_1_25V		(0x9<<0)
+#define LDO_OUT_VOL_CTRL_1_20V		(0x8<<0)
+#define LDO_OUT_VOL_CTRL_1_15V		(0x7<<0)
+#define LDO_OUT_VOL_CTRL_1_05V		(0x6<<0)
+#define LDO_OUT_VOL_CTRL_1_00V		(0x5<<0)
+#define LDO_OUT_VOL_CTRL_0_95V		(0x4<<0)
+#define LDO_OUT_VOL_CTRL_0_90V		(0x3<<0)
+#define LDO_OUT_VOL_CTRL_0_85V		(0x2<<0)
+#define LDO_OUT_VOL_CTRL_0_80V		(0x1<<0)
+#define LDO_OUT_VOL_CTRL_0_75V		(0x0<<0)
+
+
+
+//GPIO Pin Configuration(0x4C)
+#define GPIO_1						(0x1<<1)
+#define	GPIO_2						(0x1<<2)
+#define	GPIO_3						(0x1<<3)
+#define GPIO_4						(0x1<<4)
+#define GPIO_5						(0x1<<5)
+
+
+////INTERRUPT CONTROL(0x5E)
+#define DISABLE_FAST_VREG			(0x1<<15)
+
+#define AVC_TARTGET_SEL_MASK		(0x3<<12)
+#define	AVC_TARTGET_SEL_NONE		(0x0<<12)
+#define	AVC_TARTGET_SEL_R 			(0x1<<12)
+#define	AVC_TARTGET_SEL_L			(0x2<<12)
+#define	AVC_TARTGET_SEL_BOTH		(0x3<<12)
+
+#define HP_DEPOP_MODE2_EN			(0x1<<8)
+#define HP_DEPOP_MODE1_EN			(0x1<<9)
+#define HP_L_M_UM_DEPOP_EN			(0x1<<7)
+#define HP_R_M_UM_DEPOP_EN			(0x1<<6)
+#define M_UM_DEPOP_EN				(0x1<<5)
+
+//Stereo DAC Clock Control 1(0x60)
+#define STEREO_BCLK_DIV1_MASK		(0xF<<12)
+#define STEREO_BCLK_DIV1_1			(0x0<<12)
+#define STEREO_BCLK_DIV1_2			(0x1<<12)
+#define STEREO_BCLK_DIV1_3			(0x2<<12)
+#define STEREO_BCLK_DIV1_4			(0x3<<12)
+#define STEREO_BCLK_DIV1_5			(0x4<<12)
+#define STEREO_BCLK_DIV1_6			(0x5<<12)
+#define STEREO_BCLK_DIV1_7			(0x6<<12)
+#define STEREO_BCLK_DIV1_8			(0x7<<12)
+#define STEREO_BCLK_DIV1_9			(0x8<<12)
+#define STEREO_BCLK_DIV1_10			(0x9<<12)
+#define STEREO_BCLK_DIV1_11			(0xA<<12)
+#define STEREO_BCLK_DIV1_12			(0xB<<12)
+#define STEREO_BCLK_DIV1_13			(0xC<<12)
+#define STEREO_BCLK_DIV1_14			(0xD<<12)
+#define STEREO_BCLK_DIV1_15			(0xE<<12)
+#define STEREO_BCLK_DIV1_16			(0xF<<12)
+
+#define STEREO_BCLK_DIV2_MASK		(0x7<<8)
+#define STEREO_BCLK_DIV2_2			(0x0<<8)
+#define STEREO_BCLK_DIV2_4			(0x1<<8)
+#define STEREO_BCLK_DIV2_8			(0x2<<8)
+#define STEREO_BCLK_DIV2_16			(0x3<<8)
+#define STEREO_BCLK_DIV2_32			(0x4<<8)
+
+#define STEREO_AD_LRCK_DIV1_MASK	(0xF<<4)
+#define STEREO_AD_LRCK_DIV1_1		(0x0<<4)
+#define STEREO_AD_LRCK_DIV1_2		(0x1<<4)
+#define STEREO_AD_LRCK_DIV1_3		(0x2<<4)
+#define STEREO_AD_LRCK_DIV1_4		(0x3<<4)
+#define STEREO_AD_LRCK_DIV1_5		(0x4<<4)
+#define STEREO_AD_LRCK_DIV1_6		(0x5<<4)
+#define STEREO_AD_LRCK_DIV1_7		(0x6<<4)
+#define STEREO_AD_LRCK_DIV1_8		(0x7<<4)
+#define STEREO_AD_LRCK_DIV1_9		(0x8<<4)
+#define STEREO_AD_LRCK_DIV1_10		(0x9<<4)
+#define STEREO_AD_LRCK_DIV1_11		(0xA<<4)
+#define STEREO_AD_LRCK_DIV1_12		(0xB<<4)
+#define STEREO_AD_LRCK_DIV1_13		(0xC<<4)
+#define STEREO_AD_LRCK_DIV1_14		(0xD<<4)
+#define STEREO_AD_LRCK_DIV1_15		(0xE<<4)
+#define STEREO_AD_LRCK_DIV1_16		(0xF<<4)
+
+#define STEREO_AD_LRCK_DIV2_MASK	(0x7<<1)
+#define STEREO_AD_LRCK_DIV2_2		(0x0<<1)
+#define STEREO_AD_LRCK_DIV2_4		(0x1<<1)
+#define STEREO_AD_LRCK_DIV2_8		(0x2<<1)
+#define STEREO_AD_LRCK_DIV2_16		(0x3<<1)
+#define STEREO_AD_LRCK_DIV2_32		(0x4<<1)
+
+#define STEREO_DA_LRCK_DIV_MASK		(1)
+#define STEREO_DA_LRCK_DIV_32		(0)
+#define STEREO_DA_LRCK_DIV_64		(1)
+
+//Stereo DAC Clock Control 2(0x62)
+#define STEREO_DA_FILTER_DIV1_MASK	(0xF<<12)
+#define STEREO_DA_FILTER_DIV1_1		(0x0<<12)
+#define STEREO_DA_FILTER_DIV1_2		(0x1<<12)
+#define STEREO_DA_FILTER_DIV1_3		(0x2<<12)
+#define STEREO_DA_FILTER_DIV1_4		(0x3<<12)
+#define STEREO_DA_FILTER_DIV1_5		(0x4<<12)
+#define STEREO_DA_FILTER_DIV1_6		(0x5<<12)
+#define STEREO_DA_FILTER_DIV1_7		(0x6<<12)
+#define STEREO_DA_FILTER_DIV1_8		(0x7<<12)
+#define STEREO_DA_FILTER_DIV1_9		(0x8<<12)
+#define STEREO_DA_FILTER_DIV1_10	(0x9<<12)
+#define STEREO_DA_FILTER_DIV1_11	(0xA<<12)
+#define STEREO_DA_FILTER_DIV1_12	(0xB<<12)
+#define STEREO_DA_FILTER_DIV1_13	(0xC<<12)
+#define STEREO_DA_FILTER_DIV1_14	(0xD<<12)
+#define STEREO_DA_FILTER_DIV1_15	(0xE<<12)
+#define STEREO_DA_FILTER_DIV1_16	(0xF<<12)
+
+#define STEREO_DA_FILTER_DIV2_MASK	(0x7<<9)
+#define STEREO_DA_FILTER_DIV2_2		(0x0<<9)
+#define STEREO_DA_FILTER_DIV2_4		(0x1<<9)
+#define STEREO_DA_FILTER_DIV2_8		(0x2<<9)
+#define STEREO_DA_FILTER_DIV2_16	(0x3<<9)
+#define STEREO_DA_FILTER_DIV2_32	(0x4<<9)
+
+#define STEREO_AD_FILTER_DIV1_MASK	(0xF<<4)
+#define STEREO_AD_FILTER_DIV1_1		(0x0<<4)
+#define STEREO_AD_FILTER_DIV1_2		(0x1<<4)
+#define STEREO_AD_FILTER_DIV1_3		(0x2<<4)
+#define STEREO_AD_FILTER_DIV1_4		(0x3<<4)
+#define STEREO_AD_FILTER_DIV1_5		(0x4<<4)
+#define STEREO_AD_FILTER_DIV1_6		(0x5<<4)
+#define STEREO_AD_FILTER_DIV1_7		(0x6<<4)
+#define STEREO_AD_FILTER_DIV1_8		(0x7<<4)
+#define STEREO_AD_FILTER_DIV1_9		(0x8<<4)
+#define STEREO_AD_FILTER_DIV1_10	(0x9<<4)
+#define STEREO_AD_FILTER_DIV1_11	(0xA<<4)
+#define STEREO_AD_FILTER_DIV1_12	(0xB<<4)
+#define STEREO_AD_FILTER_DIV1_13	(0xC<<4)
+#define STEREO_AD_FILTER_DIV1_14	(0xD<<4)
+#define STEREO_AD_FILTER_DIV1_15	(0xE<<4)
+#define STEREO_AD_FILTER_DIV1_16	(0xF<<4)
+
+#define STEREO_AD_FILTER_DIV2_MASK	(0x7<<1)
+#define STEREO_AD_FILTER_DIV2_1		(0x0<<1)
+#define STEREO_AD_FILTER_DIV2_2		(0x1<<1)
+#define STEREO_AD_FILTER_DIV2_4		(0x2<<1)
+#define STEREO_AD_FILTER_DIV2_8		(0x3<<1)
+#define STEREO_AD_FILTER_DIV2_16	(0x4<<1)
+#define STEREO_AD_FILTER_DIV2_32	(0x5<<1)
+
+
+//Voice DAC PCM Clock Control 1(0x64)
+#define VOICE_BCLK_DIV1_MASK		(0xF<<12)
+#define VOICE_BCLK_DIV1_1			(0x0<<12)
+#define VOICE_BCLK_DIV1_2			(0x1<<12)
+#define VOICE_BCLK_DIV1_3			(0x2<<12)
+#define VOICE_BCLK_DIV1_4			(0x3<<12)
+#define VOICE_BCLK_DIV1_5			(0x4<<12)
+#define VOICE_BCLK_DIV1_6			(0x5<<12)
+#define VOICE_BCLK_DIV1_7			(0x6<<12)
+#define VOICE_BCLK_DIV1_8			(0x7<<12)
+#define VOICE_BCLK_DIV1_9			(0x8<<12)
+#define VOICE_BCLK_DIV1_10			(0x9<<12)
+#define VOICE_BCLK_DIV1_11			(0xA<<12)
+#define VOICE_BCLK_DIV1_12			(0xB<<12)
+#define VOICE_BCLK_DIV1_13			(0xC<<12)
+#define VOICE_BCLK_DIV1_14			(0xD<<12)
+#define VOICE_BCLK_DIV1_15			(0xE<<12)
+#define VOICE_BCLK_DIV1_16			(0xF<<12)
+
+#define VOICE_BCLK_DIV2_MASK		(0x7<<8)
+#define VOICE_BCLK_DIV2_2			(0x0<<8)
+#define VOICE_BCLK_DIV2_4			(0x1<<8)
+#define VOICE_BCLK_DIV2_8			(0x2<<8)
+#define VOICE_BCLK_DIV2_16			(0x3<<8)
+#define VOICE_BCLK_DIV2_32			(0x4<<8)
+
+#define VOICE_AD_LRCK_DIV1_MASK	(0xF<<4)
+#define VOICE_AD_LRCK_DIV1_1		(0x0<<4)
+#define VOICE_AD_LRCK_DIV1_2		(0x1<<4)
+#define VOICE_AD_LRCK_DIV1_3		(0x2<<4)
+#define VOICE_AD_LRCK_DIV1_4		(0x3<<4)
+#define VOICE_AD_LRCK_DIV1_5		(0x4<<4)
+#define VOICE_AD_LRCK_DIV1_6		(0x5<<4)
+#define VOICE_AD_LRCK_DIV1_7		(0x6<<4)
+#define VOICE_AD_LRCK_DIV1_8		(0x7<<4)
+#define VOICE_AD_LRCK_DIV1_9		(0x8<<4)
+#define VOICE_AD_LRCK_DIV1_10		(0x9<<4)
+#define VOICE_AD_LRCK_DIV1_11		(0xA<<4)
+#define VOICE_AD_LRCK_DIV1_12		(0xB<<4)
+#define VOICE_AD_LRCK_DIV1_13		(0xC<<4)
+#define VOICE_AD_LRCK_DIV1_14		(0xD<<4)
+#define VOICE_AD_LRCK_DIV1_15		(0xE<<4)
+#define VOICE_AD_LRCK_DIV1_16		(0xF<<4)
+
+#define VOICE_AD_LRCK_DIV2_MASK	(0x7<<1)
+#define VOICE_AD_LRCK_DIV2_2		(0x0<<1)
+#define VOICE_AD_LRCK_DIV2_4		(0x1<<1)
+#define VOICE_AD_LRCK_DIV2_8		(0x2<<1)
+#define VOICE_AD_LRCK_DIV2_16		(0x3<<1)
+#define VOICE_AD_LRCK_DIV2_32		(0x4<<1)
+
+#define VOICE_DA_LRCK_DIV_MASK		(1)
+#define VOICE_DA_LRCK_DIV_32		(0)
+#define VOICE_DA_LRCK_DIV_64		(1)
+
+
+//Psedueo Stereo & Spatial Effect Block Control(0x68)
+#define SPATIAL_CTRL_EN				(0x1<<15)
+#define ALL_PASS_FILTER_EN			(0x1<<14)
+#define PSEUDO_STEREO_EN			(0x1<<13)
+#define STEREO_EXPENSION_EN			(0x1<<12)
+
+#define SPATIAL_3D_GAIN1_MASK			(0x3<<10)
+#define SPATIAL_3D_GAIN1_1_0			(0x0<<10)
+#define SPATIAL_3D_GAIN1_1_5			(0x1<<10)
+#define SPATIAL_3D_GAIN1_2_0			(0x2<<10)
+
+#define SPATIAL_3D_RATIO1_MASK			(0x3<<8)
+#define SPATIAL_3D_RATIO1_0_0			(0x0<<8)
+#define SPATIAL_3D_RATIO1_0_66			(0x1<<8)
+#define SPATIAL_3D_RATIO1_1_0			(0x2<<8)
+
+#define SPATIAL_3D_GAIN2_MASK			(0x3<<6)
+#define SPATIAL_3D_GAIN2_1_0			(0x0<<6)
+#define SPATIAL_3D_GAIN2_1_5			(0x1<<6)
+#define SPATIAL_3D_GAIN2_2_0			(0x2<<6)
+
+#define SPATIAL_3D_RATIO2_MASK			(0x3<<4)
+#define SPATIAL_3D_RATIO2_0_0			(0x0<<4)
+#define SPATIAL_3D_RATIO2_0_66			(0x1<<4)
+#define SPATIAL_3D_RATIO2_1_0			(0x2<<4)
+
+#define APF_MASK					(0x3)
+#define APF_FOR_48K					(0x3)
+#define APF_FOR_44_1K				(0x2)
+#define APF_FOR_32K					(0x1)
+
+//EQ Control and Status /ADC HPF Control(0x6E)
+#define EN_HW_EQ_BLK			(0x1<<15)		//HW EQ block control
+
+#define EQ_SOUR_SEL_DAC			(0x0<<14)
+#define EQ_SOUR_SEL_ADC			(0x1<<14)
+
+#define EQ_CHANGE_EN			(0x1<<7)		//EQ parameter update control
+#define EN_HW_EQ_HPF			(0x1<<4)		//EQ High Pass Filter Control
+#define EN_HW_EQ_BP3			(0x1<<3)		//EQ Band-3 Control
+#define EN_HW_EQ_BP2			(0x1<<2)		//EQ Band-2 Control
+#define EN_HW_EQ_BP1			(0x1<<1)		//EQ Band-1 Control
+#define EN_HW_EQ_LPF			(0x1<<0)		//EQ Low Pass Filter Control
+
+
+//AEC register command(0x74)
+
+#define VODSP_BUSY					(0x1<<15)	//VODSP I2C busy flag
+
+#define VODSP_S_FROM_VODSP_RD		(0x0<<14)
+#define VODSP_S_FROM_MX72			(0x1<<14)
+
+#define VODSP_CLK_SEL_MASK			(0x3<<12)	//VODSP CLK select Mask
+#define VODSP_CLK_SEL_12_288M		(0x0<<12)	//VODSP CLK select 12.288Mhz
+#define VODSP_CLK_SEL_6_144M		(0x1<<12)	//VODSP CLK select 6.144Mhz
+#define VODSP_CLK_SEL_3_072M		(0x2<<12)	//VODSP CLK select 3.072Mhz
+#define VODSP_CLK_SEL_2_048M		(0x3<<12)	//VODSP CLK select 2.0488Mhz
+
+#define VODSP_READ_ENABLE			(0x1<<9)	//VODSP Read Enable
+#define VODSP_WRITE_ENABLE			(0x1<<8)	//VODSP Write Enable
+
+#define VODSP_CMD_MASK				(0xFF<<0)
+#define VODSP_CMD_MW				(0x3B<<0)		//Memory Write
+#define VODSP_CMD_MR				(0x37<<0)		//Memory Read
+#define VODSP_CMD_RR				(0x60<<0)		//Register Read
+#define VODSP_CMD_RW				(0x68<<0)		//Register Write
+
+
+/*************************************************************************************************
+  *Index register of codec
+  *************************************************************************************************/
+/*Index(0x20) for Auto Volume Control*/ 
+#define	AVC_CH_SEL_MASK				(0x1<<7)
+#define AVC_CH_SEL_L_CH				(0x0<<7)
+#define AVC_CH_SEL_R_CH				(0x1<<7)
+#define ENABLE_AVC_GAIN_CTRL		(0x1<<15)
+
+enum VODSP_FUNC
+{
+	VODSP_NULL = 0,
+	VODSP_AEC_FUNC,
+	VODSP_VE_FUNC,
+	VODSP_ALL_FUNC,
+};
+
+enum pll_sel
+{
+	RT5630_PLL1_FROM_MCLK = 0,
+	RT5630_PLL1_FROM_BCLK,
+	RT5630_PLL1_FROM_VBCLK,
+	RT5630_PLL2_FROM_VBCLK
+};
+
+enum AEC_MODE
+{
+	PCM_IN_PCM_OUT = 0,
+	ANALOG_IN_ANALOG_OUT,
+	DAC_IN_ADC_OUT,
+	VODSP_AEC_DISABLE		
+};
+
+enum VE_MODE
+{
+	TXDP_TO_I2S = 0,
+	TXDP_TO_PCM,
+	VE_DISABLE,		
+};
+
+struct rt5630_setup_data {
+	int i2c_bus;
+	int i2c_address;
+};
+
+typedef struct 
+{ 
+	unsigned short int VoiceDSPIndex;
+	unsigned short int VoiceDSPValue;
+
+}Voice_DSP_Reg;
+
+#define USE_DAPM_CTRL 0
+
+
+extern struct snd_soc_dai rt5630_dai[2];
+extern struct snd_soc_codec_device soc_codec_dev_rt5630;
+extern int rt5630_codec_set_pll1(struct snd_soc_codec * codec, int pll_id, unsigned int freq_in, unsigned int freq_out);
+extern int enable_vodsp_aec_func(struct snd_soc_codec * codec, unsigned int VodspAEC_En, unsigned int AEC_mode);
+extern int enable_vodsp_ve_func(struct snd_soc_codec * codec, int vodsp_ve_en, int VE_mode);
+
+#endif
--- linux-mvl-dove-2.6.32.orig/sound/soc/codecs/wm8990.c
+++ linux-mvl-dove-2.6.32/sound/soc/codecs/wm8990.c
@@ -110,21 +110,21 @@
 
 #define wm8990_reset(c) snd_soc_write(c, WM8990_RESET, 0)
 
-static const DECLARE_TLV_DB_LINEAR(rec_mix_tlv, -1500, 600);
+static const DECLARE_TLV_DB_SCALE(rec_mix_tlv, -1500, 600, 0);
 
-static const DECLARE_TLV_DB_LINEAR(in_pga_tlv, -1650, 3000);
+static const DECLARE_TLV_DB_SCALE(in_pga_tlv, -1650, 3000, 0);
 
-static const DECLARE_TLV_DB_LINEAR(out_mix_tlv, 0, -2100);
+static const DECLARE_TLV_DB_SCALE(out_mix_tlv, 0, -2100, 0);
 
-static const DECLARE_TLV_DB_LINEAR(out_pga_tlv, -7300, 600);
+static const DECLARE_TLV_DB_SCALE(out_pga_tlv, -7300, 600, 0);
 
-static const DECLARE_TLV_DB_LINEAR(out_omix_tlv, -600, 0);
+static const DECLARE_TLV_DB_SCALE(out_omix_tlv, -600, 0, 0);
 
-static const DECLARE_TLV_DB_LINEAR(out_dac_tlv, -7163, 0);
+static const DECLARE_TLV_DB_SCALE(out_dac_tlv, -7163, 0, 0);
 
-static const DECLARE_TLV_DB_LINEAR(in_adc_tlv, -7163, 1763);
+static const DECLARE_TLV_DB_SCALE(in_adc_tlv, -7163, 1763, 0);
 
-static const DECLARE_TLV_DB_LINEAR(out_sidetone_tlv, -3600, 0);
+static const DECLARE_TLV_DB_SCALE(out_sidetone_tlv, -3600, 0, 0);
 
 static int wm899x_outpga_put_volsw_vu(struct snd_kcontrol *kcontrol,
 	struct snd_ctl_elem_value *ucontrol)
@@ -450,7 +450,7 @@
 /* INMIX dB values */
 static const unsigned int in_mix_tlv[] = {
 	TLV_DB_RANGE_HEAD(1),
-	0, 7, TLV_DB_LINEAR_ITEM(-1200, 600),
+	0, 7, TLV_DB_SCALE_ITEM(-1200, 600, 0),
 };
 
 /* Left In PGA Connections */
@@ -1185,7 +1185,7 @@
 				     WM8990_VMIDTOG);
 
 			/* Delay to allow output caps to discharge */
-			msleep(msecs_to_jiffies(300));
+			msleep(300);
 
 			/* Disable VMIDTOG */
 			snd_soc_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST |
@@ -1197,17 +1197,17 @@
 			/* Enable outputs */
 			snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1b00);
 
-			msleep(msecs_to_jiffies(50));
+			msleep(50);
 
 			/* Enable VMID at 2x50k */
 			snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f02);
 
-			msleep(msecs_to_jiffies(100));
+			msleep(100);
 
 			/* Enable VREF */
 			snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f03);
 
-			msleep(msecs_to_jiffies(600));
+			msleep(600);
 
 			/* Enable BUFIOEN */
 			snd_soc_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST |
@@ -1252,7 +1252,7 @@
 		/* Disable VMID */
 		snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f01);
 
-		msleep(msecs_to_jiffies(300));
+		msleep(300);
 
 		/* Enable all output discharge bits */
 		snd_soc_write(codec, WM8990_ANTIPOP1, WM8990_DIS_LLINE |
--- linux-mvl-dove-2.6.32.orig/sound/soc/codecs/Makefile
+++ linux-mvl-dove-2.6.32/sound/soc/codecs/Makefile
@@ -8,6 +8,7 @@
 snd-soc-ak4642-objs := ak4642.o
 snd-soc-cs4270-objs := cs4270.o
 snd-soc-cx20442-objs := cx20442.o
+snd-soc-cs42l51-objs := cs42l51.o
 snd-soc-l3-objs := l3.o
 snd-soc-pcm3008-objs := pcm3008.o
 snd-soc-spdif-objs := spdif_transciever.o
@@ -47,6 +48,10 @@
 
 # Amp
 snd-soc-max9877-objs := max9877.o
+snd-soc-rt5623-objs := rt5623.o
+snd-soc-rt5610-objs := rt5610.o
+snd-soc-rt5630-objs := rt5630.o
+snd-soc-rt655-objs := rt655.o
 
 obj-$(CONFIG_SND_SOC_AC97_CODEC)	+= snd-soc-ac97.o
 obj-$(CONFIG_SND_SOC_AD1836)	+= snd-soc-ad1836.o
@@ -58,6 +63,7 @@
 obj-$(CONFIG_SND_SOC_AK4642)	+= snd-soc-ak4642.o
 obj-$(CONFIG_SND_SOC_CS4270)	+= snd-soc-cs4270.o
 obj-$(CONFIG_SND_SOC_CX20442)	+= snd-soc-cx20442.o
+obj-$(CONFIG_SND_SOC_CS42L51)	+= snd-soc-cs42l51.o
 obj-$(CONFIG_SND_SOC_L3)	+= snd-soc-l3.o
 obj-$(CONFIG_SND_SOC_PCM3008)	+= snd-soc-pcm3008.o
 obj-$(CONFIG_SND_SOC_SPDIF)	+= snd-soc-spdif.o
@@ -97,3 +103,7 @@
 
 # Amp
 obj-$(CONFIG_SND_SOC_MAX9877)	+= snd-soc-max9877.o
+obj-$(CONFIG_SND_SOC_RT5623)    += snd-soc-rt5623.o
+obj-$(CONFIG_SND_SOC_RT5610)    += snd-soc-rt5610.o
+obj-$(CONFIG_SND_SOC_RT5630)    += snd-soc-rt5630.o
+obj-$(CONFIG_SND_SOC_RT655)    += snd-soc-rt655.o
--- linux-mvl-dove-2.6.32.orig/sound/soc/codecs/wm8400.c
+++ linux-mvl-dove-2.6.32/sound/soc/codecs/wm8400.c
@@ -106,21 +106,21 @@
 	wm8400_reset_codec_reg_cache(wm8400->wm8400);
 }
 
-static const DECLARE_TLV_DB_LINEAR(rec_mix_tlv, -1500, 600);
+static const DECLARE_TLV_DB_SCALE(rec_mix_tlv, -1500, 600, 0);
 
-static const DECLARE_TLV_DB_LINEAR(in_pga_tlv, -1650, 3000);
+static const DECLARE_TLV_DB_SCALE(in_pga_tlv, -1650, 3000, 0);
 
-static const DECLARE_TLV_DB_LINEAR(out_mix_tlv, -2100, 0);
+static const DECLARE_TLV_DB_SCALE(out_mix_tlv, -2100, 0, 0);
 
-static const DECLARE_TLV_DB_LINEAR(out_pga_tlv, -7300, 600);
+static const DECLARE_TLV_DB_SCALE(out_pga_tlv, -7300, 600, 0);
 
-static const DECLARE_TLV_DB_LINEAR(out_omix_tlv, -600, 0);
+static const DECLARE_TLV_DB_SCALE(out_omix_tlv, -600, 0, 0);
 
-static const DECLARE_TLV_DB_LINEAR(out_dac_tlv, -7163, 0);
+static const DECLARE_TLV_DB_SCALE(out_dac_tlv, -7163, 0, 0);
 
-static const DECLARE_TLV_DB_LINEAR(in_adc_tlv, -7163, 1763);
+static const DECLARE_TLV_DB_SCALE(in_adc_tlv, -7163, 1763, 0);
 
-static const DECLARE_TLV_DB_LINEAR(out_sidetone_tlv, -3600, 0);
+static const DECLARE_TLV_DB_SCALE(out_sidetone_tlv, -3600, 0, 0);
 
 static int wm8400_outpga_put_volsw_vu(struct snd_kcontrol *kcontrol,
         struct snd_ctl_elem_value *ucontrol)
@@ -439,7 +439,7 @@
 /* INMIX dB values */
 static const unsigned int in_mix_tlv[] = {
 	TLV_DB_RANGE_HEAD(1),
-	0,7, TLV_DB_LINEAR_ITEM(-1200, 600),
+	0,7, TLV_DB_SCALE_ITEM(-1200, 600, 0),
 };
 
 /* Left In PGA Connections */
--- linux-mvl-dove-2.6.32.orig/sound/soc/codecs/rt5623.h
+++ linux-mvl-dove-2.6.32/sound/soc/codecs/rt5623.h
@@ -0,0 +1,489 @@
+/*
+ * rt5623.h  --  audio driver for RT5623
+ *
+ * Copyright 2008 Realtek Microelectronics
+ *
+ * Author: flove <flove@realtek.com>
+ *
+ * Based on WM8753.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef _RT5623_H
+#define _RT5623_H
+
+
+#define RT5623_RESET						0X00			//RESET CODEC TO DEFAULT
+#define RT5623_SPK_OUT_VOL					0X02			//SPEAKER OUT VOLUME
+#define RT5623_HP_OUT_VOL					0X04			//HEADPHONE OUTPUT VOLUME
+#define RT5623_MONO_AUX_OUT_VOL				0X06			//MONO OUTPUT/AUXOUT VOLUME
+#define RT5623_AUXIN_VOL					0X08			//AUXIN VOLUME
+#define RT5623_LINE_IN_VOL					0X0A			//LINE IN VOLUME
+#define RT5623_STEREO_DAC_VOL				0X0C			//STEREO DAC VOLUME
+#define RT5623_MIC_VOL						0X0E			//MICROPHONE VOLUME
+#define RT5623_MIC_ROUTING_CTRL				0X10			//MIC ROUTING CONTROL
+#define RT5623_ADC_REC_GAIN					0X12			//ADC RECORD GAIN
+#define RT5623_ADC_REC_MIXER				0X14			//ADC RECORD MIXER CONTROL
+#define RT5623_SOFT_VOL_CTRL_TIME			0X16			//SOFT VOLUME CONTROL TIME
+#define RT5623_OUTPUT_MIXER_CTRL			0X1C			//OUTPUT MIXER CONTROL
+#define RT5623_MIC_CTRL						0X22			//MICROPHONE CONTROL
+#define	RT5623_AUDIO_INTERFACE				0X34			//AUDIO INTERFACE
+#define RT5623_STEREO_AD_DA_CLK_CTRL		0X36			//STEREO AD/DA CLOCK CONTROL
+#define	RT5623_COMPANDING_CTRL				0X38			//COMPANDING CONTROL
+#define	RT5623_PWR_MANAG_ADD1				0X3A			//POWER MANAGMENT ADDITION 1
+#define RT5623_PWR_MANAG_ADD2				0X3C			//POWER MANAGMENT ADDITION 2
+#define RT5623_PWR_MANAG_ADD3				0X3E			//POWER MANAGMENT ADDITION 3
+#define RT5623_ADD_CTRL_REG					0X40			//ADDITIONAL CONTROL REGISTER
+#define	RT5623_GLOBAL_CLK_CTRL_REG			0X42			//GLOBAL CLOCK CONTROL REGISTER
+#define RT5623_PLL_CTRL						0X44			//PLL CONTROL
+#define RT5623_GPIO_OUTPUT_PIN_CTRL			0X4A			//GPIO OUTPUT PIN CONTROL
+#define RT5623_GPIO_PIN_CONFIG				0X4C			//GPIO PIN CONFIGURATION
+#define RT5623_GPIO_PIN_POLARITY			0X4E			//GPIO PIN POLARITY/TYPE	
+#define RT5623_GPIO_PIN_STICKY				0X50			//GPIO PIN STICKY	
+#define RT5623_GPIO_PIN_WAKEUP				0X52			//GPIO PIN WAKE UP
+#define RT5623_GPIO_PIN_STATUS				0X54			//GPIO PIN STATUS
+#define RT5623_GPIO_PIN_SHARING				0X56			//GPIO PIN SHARING
+#define	RT5623_OVER_TEMP_CURR_STATUS		0X58			//OVER TEMPERATURE AND CURRENT STATUS
+#define RT5623_JACK_DET_CTRL				0X5A			//JACK DETECT CONTROL REGISTER
+#define RT5623_MISC_CTRL					0X5E			//MISC CONTROL
+#define	RT5623_PSEDUEO_SPATIAL_CTRL			0X60			//PSEDUEO STEREO & SPATIAL EFFECT BLOCK CONTROL
+#define RT5623_EQ_CTRL						0X62			//EQ CONTROL
+#define RT5623_EQ_MODE_ENABLE				0X66			//EQ MODE CHANGE ENABLE
+#define RT5623_AVC_CTRL						0X68			//AVC CONTROL
+#define RT5623_HID_CTRL_INDEX				0X6A			//HIDDEN CONTROL INDEX PORT
+#define RT5623_HID_CTRL_DATA				0X6C			//HIDDEN CONTROL DATA PORT
+#define RT5623_VENDOR_ID1	  		    	0x7C			//VENDOR ID1
+#define RT5623_VENDOR_ID2	  		    	0x7E			//VENDOR ID2
+
+
+//global definition
+#define RT_L_MUTE						(0x1<<15)		//MUTE LEFT CONTROL BIT
+#define RT_L_ZC							(0x1<<14)		//LEFT ZERO CROSS CONTROL BIT
+#define RT_L_SM							(0x1<<13)		//LEFT SOFTMUTE CONTROL BIT
+#define RT_R_MUTE						(0x1<<7)		//MUTE RIGHT CONTROL BIT
+#define RT_R_ZC							(0x1<<6)		//RIGHT ZERO CROSS CONTROL BIT
+#define RT_R_SM							(0x1<<5)		//RIGHT SOFTMUTE CONTROL BIT
+#define RT_M_HP_MIXER					(0x1<<15)		//Mute source to HP Mixer
+#define RT_M_SPK_MIXER					(0x1<<14)		//Mute source to Speaker Mixer
+#define RT_M_MONO_MIXER					(0x1<<13)		//Mute source to Mono Mixer
+#define SPK_CLASS_AB						0
+#define SPK_CLASS_D							1
+
+//Mic Routing Control(0x10)
+#define M_MIC1_TO_HP_MIXER				(0x1<<15)		//Mute MIC1 to HP mixer
+#define M_MIC1_TO_SPK_MIXER				(0x1<<14)		//Mute MiC1 to SPK mixer
+#define M_MIC1_TO_MONO_MIXER			(0x1<<13)		//Mute MIC1 to MONO mixer
+#define MIC1_DIFF_INPUT_CTRL			(0x1<<12)		//MIC1 different input control
+#define M_MIC2_TO_HP_MIXER				(0x1<<7)		//Mute MIC2 to HP mixer
+#define M_MIC2_TO_SPK_MIXER				(0x1<<6)		//Mute MiC2 to SPK mixer
+#define M_MIC2_TO_MONO_MIXER			(0x1<<5)		//Mute MIC2 to MONO mixer
+#define MIC2_DIFF_INPUT_CTRL			(0x1<<4)		//MIC2 different input control
+
+//ADC Record Gain(0x12)
+#define M_ADC_L_TO_HP_MIXER				(0x1<<15)		//Mute left of ADC to HP Mixer
+#define M_ADC_R_TO_HP_MIXER				(0x1<<14)		//Mute right of ADC to HP Mixer
+#define M_ADC_L_TO_MONO_MIXER			(0x1<<13)		//Mute left of ADC to MONO Mixer
+#define M_ADC_R_TO_MONO_MIXER			(0x1<<12)		//Mute right of ADC to MONO Mixer
+#define ADC_L_GAIN_MASK					(0x1f<<7)		//ADC Record Gain Left channel Mask
+#define ADC_L_ZC_DET					(0x1<<6)		//ADC Zero-Cross Detector Control
+#define ADC_R_ZC_DET					(0x1<<5)		//ADC Zero-Cross Detector Control
+#define ADC_R_GAIN_MASK					(0x1f<<0)		//ADC Record Gain Right channel Mask
+
+//ADC Input Mixer Control(0x14)
+#define M_MIC1_TO_ADC_L_MIXER				(0x1<<14)		//Mute mic1 to left channel of ADC mixer
+#define M_MIC2_TO_ADC_L_MIXER				(0x1<<13)		//Mute mic2 to left channel of ADC mixer
+#define M_LINEIN_L_TO_ADC_L_MIXER			(0x1<<12)		//Mute line In left channel to left channel of ADC mixer
+#define M_AUXIN_L_TO_ADC_L_MIXER			(0x1<<11)		//Mute aux In left channel to left channel of ADC mixer
+#define M_HPMIXER_L_TO_ADC_L_MIXER			(0x1<<10)		//Mute HP mixer left channel to left channel of ADC mixer
+#define M_SPKMIXER_L_TO_ADC_L_MIXER			(0x1<<9)		//Mute SPK mixer left channel to left channel of ADC mixer
+#define M_MONOMIXER_L_TO_ADC_L_MIXER		(0x1<<8)		//Mute MONO mixer left channel to left channel of ADC mixer
+#define M_MIC1_TO_ADC_R_MIXER				(0x1<<6)		//Mute mic1 to right channel of ADC mixer
+#define M_MIC2_TO_ADC_R_MIXER				(0x1<<5)		//Mute mic2 to right channel of ADC mixer
+#define M_LINEIN_R_TO_ADC_R_MIXER			(0x1<<4)		//Mute lineIn right channel to right channel of ADC mixer
+#define M_AUXIN_R_TO_ADC_R_MIXER			(0x1<<3)		//Mute aux In right channel to right channel of ADC mixer
+#define M_HPMIXER_R_TO_ADC_R_MIXER			(0x1<<2)		//Mute HP mixer right channel to right channel of ADC mixer
+#define M_SPKMIXER_R_TO_ADC_R_MIXER			(0x1<<1)		//Mute SPK mixer right channel to right channel of ADC mixer
+#define M_MONOMIXER_R_TO_ADC_R_MIXER		(0x1<<0)		//Mute MONO mixer right channel to right channel of ADC mixer
+
+//Output Mixer Control(0x1C)
+#define	SPKOUT_N_SOUR_MASK					(0x3<<14)	
+#define	SPKOUT_N_SOUR_LN					(0x2<<14)
+#define	SPKOUT_N_SOUR_RP					(0x1<<14)
+#define	SPKOUT_N_SOUR_RN					(0x0<<14)
+#define SPK_OUTPUT_CLASS_AB					(0x0<<13)
+#define SPK_OUTPUT_CLASS_D					(0x1<<13)
+#define SPK_CLASS_AB_S_AMP					(0x0<<12)
+#define SPK_CALSS_AB_W_AMP					(0x1<<12)
+#define SPKOUT_INPUT_SEL_MASK				(0x3<<10)
+#define SPKOUT_INPUT_SEL_MONOMIXER			(0x3<<10)
+#define SPKOUT_INPUT_SEL_SPKMIXER			(0x2<<10)
+#define SPKOUT_INPUT_SEL_HPMIXER			(0x1<<10)
+#define SPKOUT_INPUT_SEL_VMID				(0x0<<10)
+#define HPL_INPUT_SEL_HPLMIXER				(0x1<<9)
+#define HPR_INPUT_SEL_HPRMIXER				(0x1<<8)	
+#define MONO_AUX_INPUT_SEL_MASK				(0x3<<6)
+#define MONO_AUX_INPUT_SEL_MONO				(0x3<<6)
+#define MONO_AUX_INPUT_SEL_SPK				(0x2<<6)
+#define MONO_AUX_INPUT_SEL_HP				(0x1<<6)
+#define MONO_AUX_INPUT_SEL_VMID				(0x0<<6)
+
+//Micphone Control define(0x22)
+#define MIC1		1
+#define MIC2		2
+#define MIC_BIAS_90_PRECNET_AVDD	1
+#define	MIC_BIAS_75_PRECNET_AVDD	2
+
+#define MIC1_BOOST_CTRL_MASK		(0x3<<10)
+#define MIC1_BOOST_CTRL_BYPASS		(0x0<<10)
+#define MIC1_BOOST_CTRL_20DB		(0x1<<10)
+#define MIC1_BOOST_CTRL_30DB		(0x2<<10)
+#define MIC1_BOOST_CTRL_40DB		(0x3<<10)
+
+#define MIC2_BOOST_CTRL_MASK		(0x3<<8)
+#define MIC2_BOOST_CTRL_BYPASS		(0x0<<8)
+#define MIC2_BOOST_CTRL_20DB		(0x1<<8)
+#define MIC2_BOOST_CTRL_30DB		(0x2<<8)
+#define MIC2_BOOST_CTRL_40DB		(0x3<<8)
+
+#define MICBIAS_VOLT_CTRL_MASK		(0x1<<5)
+#define MICBIAS_VOLT_CTRL_90P		(0x0<<5)
+#define MICBIAS_VOLT_CTRL_75P		(0x1<<5)
+
+#define MICBIAS_SHORT_CURR_DET_MASK		(0x3)
+#define MICBIAS_SHORT_CURR_DET_600UA	(0x0)
+#define MICBIAS_SHORT_CURR_DET_1200UA	(0x1)
+#define MICBIAS_SHORT_CURR_DET_1800UA	(0x2)
+
+//Audio Interface(0x34)			
+#define SDP_MASTER_MODE				(0x0<<15)		//Main I2S interface select Master mode
+#define SDP_SLAVE_MODE				(0x1<<15)		//Main I2S interface select Slave mode
+#define I2S_PCM_MODE				(0x1<<14)		//PCM    	0:mode A				,1:mode B 												 	
+#define MAIN_I2S_BCLK_POL_CTRL		(0x1<<7)		//0:Normal 1:Invert
+#define ADC_DATA_L_R_SWAP			(0x1<<5)		//0:ADC data appear at left phase of LRCK
+													//1:ADC data appear at right phase of LRCK
+#define DAC_DATA_L_R_SWAP			(0x1<<4)		//0:DAC data appear at left phase of LRCK
+													//1:DAC data appear at right phase of LRCK	
+//Data Length Slection
+#define I2S_DL_MASK				(0x3<<2)		//main i2s Data Length mask	
+#define I2S_DL_16				(0x0<<2)		//16 bits
+#define I2S_DL_20				(0x1<<2)		//20 bits
+#define	I2S_DL_24				(0x2<<2)		//24 bits
+#define I2S_DL_32				(0x3<<2)		//32 bits
+													
+//PCM Data Format Selection
+#define I2S_DF_MASK				(0x3)			//main i2s Data Format mask
+#define I2S_DF_I2S				(0x0)			//I2S FORMAT 
+#define I2S_DF_RIGHT			(0x1)			//RIGHT JUSTIFIED format
+#define	I2S_DF_LEFT				(0x2)			//LEFT JUSTIFIED  format
+#define I2S_DF_PCM				(0x3)			//PCM format
+
+//Stereo AD/DA Clock Control(0x36h)
+#define I2S_PRE_DIV_MASK		(0x7<<12)			
+#define I2S_PRE_DIV_1			(0x0<<12)			//DIV 1
+#define I2S_PRE_DIV_2			(0x1<<12)			//DIV 2
+#define I2S_PRE_DIV_4			(0x2<<12)			//DIV 4
+#define I2S_PRE_DIV_8			(0x3<<12)			//DIV 8
+#define I2S_PRE_DIV_16			(0x4<<12)			//DIV 16
+#define I2S_PRE_DIV_32			(0x5<<12)			//DIV 32
+
+#define I2S_SCLK_DIV_MASK		(0x7<<9)			
+#define I2S_SCLK_DIV_1			(0x0<<9)			//DIV 1
+#define I2S_SCLK_DIV_2			(0x1<<9)			//DIV 2
+#define I2S_SCLK_DIV_3			(0x2<<9)			//DIV 3
+#define I2S_SCLK_DIV_4			(0x3<<9)			//DIV 4
+#define I2S_SCLK_DIV_6			(0x4<<9)			//DIV 6
+#define I2S_SCLK_DIV_8			(0x5<<9)			//DIV 8
+#define I2S_SCLK_DIV_12			(0x6<<9)			//DIV 12
+#define I2S_SCLK_DIV_16			(0x7<<9)			//DIV 16
+
+#define I2S_WCLK_DIV_PRE_MASK		(0xF<<5)			
+#define I2S_WCLK_PRE_DIV_1			(0x0<<5)			//DIV 1
+#define I2S_WCLK_PRE_DIV_2			(0x1<<5)			//DIV 2
+#define I2S_WCLK_PRE_DIV_3			(0x2<<5)			//DIV 3
+#define I2S_WCLK_PRE_DIV_4			(0x3<<5)			//DIV 4
+#define I2S_WCLK_PRE_DIV_5			(0x4<<5)			//DIV 5
+#define I2S_WCLK_PRE_DIV_6			(0x5<<5)			//DIV 6
+#define I2S_WCLK_PRE_DIV_7			(0x6<<5)			//DIV 7
+#define I2S_WCLK_PRE_DIV_8			(0x7<<5)			//DIV 8
+//........................
+
+#define I2S_WCLK_DIV_MASK		(0x7<<2)			
+#define I2S_WCLK_DIV_2			(0x0<<2)			//DIV 2
+#define I2S_WCLK_DIV_4			(0x1<<2)			//DIV 4
+#define I2S_WCLK_DIV_8			(0x2<<2)			//DIV 8
+#define I2S_WCLK_DIV_16			(0x3<<2)			//DIV 16
+#define I2S_WCLK_DIV_32			(0x4<<2)			//DIV 32
+
+#define ADDA_FILTER_CLK_SEL_256FS	(0<<1)			//256FS
+#define ADDA_FILTER_CLK_SEL_384FS	(1<<1)			//384FS
+
+#define ADDA_OSR_SEL_64FS	(0)						//64FS
+#define ADDA_OSR_SEL_128FS	(1)						//128FS
+
+//Power managment addition 1 (0x3A),0:Disable,1:Enable
+#define PWR_MAIN_I2S_EN				(0x1<<15)
+#define PWR_ZC_DET_PD_EN			(0x1<<14)	
+#define PWR_MIC1_BIAS_EN			(0x1<<11)
+#define PWR_SHORT_CURR_DET_EN		(0x1<<10)
+#define PWR_SOFTGEN_EN				(0x1<<8)
+#define	PWR_DEPOP_BUF_HP			(0x1<<6)
+#define	PWR_HP_OUT_AMP				(0x1<<5)
+#define	PWR_HP_OUT_ENH_AMP			(0x1<<4)
+#define PWR_DEPOP_BUF_AUX			(0x1<<2)
+#define PWR_AUX_OUT_AMP				(0x1<<1)
+#define PWR_AUX_OUT_ENH_AMP			(0x1)
+
+
+//Power managment addition 2(0x3C),0:Disable,1:Enable
+#define PWR_LINEOUT					(0x1<<15)
+#define PWR_VREF					(0x1<<13)
+#define PWR_PLL						(0x1<<12)
+#define PWR_DAC_REF_CIR				(0x1<<10)
+#define PWR_L_DAC_CLK				(0x1<<9)
+#define PWR_R_DAC_CLK				(0x1<<8)
+#define PWR_L_ADC_CLK_GAIN			(0x1<<7)
+#define PWR_R_ADC_CLK_GAIN			(0x1<<6)
+#define PWR_L_HP_MIXER				(0x1<<5)
+#define PWR_R_HP_MIXER				(0x1<<4)
+#define PWR_SPK_MIXER				(0x1<<3)
+#define PWR_MONO_MIXER				(0x1<<2)
+#define PWR_L_ADC_REC_MIXER			(0x1<<1)
+#define PWR_R_ADC_REC_MIXER			(0x1)
+
+//Power managment addition 3(0x3E),0:Disable,1:Enable
+#define PWR_MAIN_BIAS				(0x1<<15)
+#define PWR_AUXOUT_L_VOL_AMP		(0x1<<14)
+#define PWR_AUXOUT_R_VOL_AMP		(0x1<<13)
+#define PWR_SPK_OUT					(0x1<<12)
+#define PWR_HP_L_OUT_VOL			(0x1<<10)
+#define PWR_HP_R_OUT_VOL			(0x1<<9)
+#define PWR_LINEIN_L_VOL			(0x1<<7)
+#define PWR_LINEIN_R_VOL			(0x1<<6)
+#define PWR_AUXIN_L_VOL				(0x1<<5)
+#define PWR_AUXIN_R_VOL				(0x1<<4)
+#define PWR_MIC1_FUN_CTRL			(0x1<<3)
+#define PWR_MIC2_FUN_CTRL			(0x1<<2)
+#define PWR_MIC1_BOOST_MIXER		(0x1<<1)
+#define PWR_MIC2_BOOST_MIXER		(0x1)
+
+
+//Additional Control Register(0x40)
+#define AUXOUT_SEL_DIFF					(0x1<<15)	//Differential Mode
+#define AUXOUT_SEL_SE					(0x1<<15)	//Single-End Mode
+
+#define STEREO_DAC_HI_PASS_FILTER_EN	(0x1<<9)		//Stereo DAC high pass filter enable
+#define STEREO_ADC_HI_PASS_FILTER_EN	(0x1<<8)		//Stereo ADC high pass filter enable
+
+#define DIG_VOL_BOOST_MASK				(0x3<<4)		//Digital volume Boost mask
+#define DIG_VOL_BOOST_0DB				(0x0<<4)		//Digital volume Boost 0DB
+#define DIG_VOL_BOOST_6DB				(0x1<<4)		//Digital volume Boost 6DB
+#define DIG_VOL_BOOST_12DB				(0x2<<4)		//Digital volume Boost 12DB
+#define DIG_VOL_BOOST_18DB				(0x3<<4)		//Digital volume Boost 18DB
+
+
+//Global Clock Control Register(0x42)
+#define SYSCLK_SOUR_SEL_MASK			(0x1<<15)
+#define SYSCLK_SOUR_SEL_MCLK			(0x0<<15)		//system Clock source from MCLK
+#define SYSCLK_SOUR_SEL_PLL				(0x1<<15)		//system Clock source from PLL
+#define PLLCLK_SOUR_SEL_MCLK			(0x0<<14)		//PLL clock source from MCLK
+#define PLLCLK_SOUR_SEL_BITCLK			(0x1<<14)		//PLL clock source from BITCLK
+
+#define PLLCLK_DIV_RATIO_MASK			(0x3<<1)		
+#define PLLCLK_DIV_RATIO_DIV1			(0x0<<1)		//DIV 1
+#define PLLCLK_DIV_RATIO_DIV2			(0x1<<1)		//DIV 2
+#define PLLCLK_DIV_RATIO_DIV4			(0x2<<1)		//DIV 4
+#define PLLCLK_DIV_RATIO_DIV8			(0x3<<1)		//DIV 8
+
+#define PLLCLK_PRE_DIV1					(0x0)			//DIV 1
+#define PLLCLK_PRE_DIV2					(0x1)			//DIV 2
+
+//PLL Control(0x44)
+
+#define PLL_CTRL_M_VAL(m)		((m)&0xf)
+#define PLL_CTRL_K_VAL(k)		(((k)&0x7)<<4)
+#define PLL_CTRL_N_VAL(n)		(((n)&0xff)<<8)
+
+//GPIO Pin Configuration(0x4C)
+#define GPIO_PIN_MASK				(0x1<<1)
+#define GPIO_PIN_SET_INPUT			(0x1<<1)
+#define GPIO_PIN_SET_OUTPUT			(0x0<<1)
+
+//Pin Sharing(0x56)
+#define LINEIN_L_PIN_SHARING		(0x1<<15)
+#define LINEIN_L_PIN_AS_LINEIN_L	(0x0<<15)
+#define LINEIN_L_PIN_AS_JD1			(0x1<<15)
+
+#define LINEIN_R_PIN_SHARING		(0x1<<14)
+#define LINEIN_R_PIN_AS_LINEIN_R	(0x0<<14)
+#define LINEIN_R_PIN_AS_JD2			(0x1<<14)
+
+#define GPIO_PIN_SHARING			(0x3)
+#define GPIO_PIN_AS_GPIO			(0x0)
+#define GPIO_PIN_AS_IRQOUT			(0x1)
+#define GPIO_PIN_AS_PLLOUT			(0x3)
+
+//Jack Detect Control Register(0x5A)
+#define JACK_DETECT_MASK			(0x3<<14)
+#define JACK_DETECT_USE_JD2			(0x3<<14)
+#define JACK_DETECT_USE_JD1			(0x2<<14)
+#define JACK_DETECT_USE_GPIO		(0x1<<14)
+#define JACK_DETECT_OFF				(0x0<<14)
+
+#define	SPK_EN_IN_HI				(0x1<<11)
+#define AUX_R_EN_IN_HI				(0x1<<10)
+#define AUX_L_EN_IN_HI				(0x1<<9)
+#define HP_EN_IN_HI					(0x1<<8)
+#define	SPK_EN_IN_LO				(0x1<<7)
+#define AUX_R_EN_IN_LO				(0x1<<6)
+#define AUX_L_EN_IN_LO				(0x1<<5)
+#define HP_EN_IN_LO					(0x1<<4)
+
+////MISC CONTROL(0x5E)
+#define DISABLE_FAST_VREG			(0x1<<15)
+#define SPK_CLASS_AB_OC_PD			(0x1<<13)
+#define SPK_CLASS_AB_OC_DET			(0x1<<12)
+#define HP_DEPOP_MODE3_EN			(0x1<<10)
+#define HP_DEPOP_MODE2_EN			(0x1<<9)
+#define HP_DEPOP_MODE1_EN			(0x1<<8)
+#define AUXOUT_DEPOP_MODE3_EN		(0x1<<6)
+#define AUXOUT_DEPOP_MODE2_EN		(0x1<<5)
+#define AUXOUT_DEPOP_MODE1_EN		(0x1<<4)
+#define M_DAC_L_INPUT				(0x1<<3)
+#define M_DAC_R_INPUT				(0x1<<2)
+#define IRQOUT_INV_CTRL				(0x1<<0)
+
+//Psedueo Stereo & Spatial Effect Block Control(0x60)
+#define SPATIAL_CTRL_EN				(0x1<<15)
+#define ALL_PASS_FILTER_EN			(0x1<<14)
+#define PSEUDO_STEREO_EN			(0x1<<13)
+#define STEREO_EXPENSION_EN			(0x1<<12)
+
+#define GAIN_3D_PARA_L_MASK			(0x7<<9)
+#define GAIN_3D_PARA_L_1_00			(0x0<<9)
+#define GAIN_3D_PARA_L_1_25			(0x1<<9)
+#define GAIN_3D_PARA_L_1_50			(0x2<<9)
+#define GAIN_3D_PARA_L_1_75			(0x3<<9)
+#define GAIN_3D_PARA_L_2_00			(0x4<<9)
+
+#define GAIN_3D_PARA_R_MASK			(0x7<<6)
+#define GAIN_3D_PARA_R_1_00			(0x0<<6)
+#define GAIN_3D_PARA_R_1_25			(0x1<<6)
+#define GAIN_3D_PARA_R_1_50			(0x2<<6)
+#define GAIN_3D_PARA_R_1_75			(0x3<<6)
+#define GAIN_3D_PARA_R_2_00			(0x4<<6)
+
+#define RATIO_3D_L_MASK				(0x3<<4)
+#define RATIO_3D_L_0_0				(0x0<<4)
+#define RATIO_3D_L_0_66				(0x1<<4)
+#define RATIO_3D_L_1_0				(0x2<<4)
+
+#define RATIO_3D_R_MASK				(0x3<<2)
+#define RATIO_3D_R_0_0				(0x0<<2)
+#define RATIO_3D_R_0_66				(0x1<<2)
+#define RATIO_3D_R_1_0				(0x2<<2)
+
+#define APF_MASK					(0x3)
+#define APF_FOR_48K					(0x3)
+#define APF_FOR_44_1K				(0x2)
+#define APF_FOR_32K					(0x1)
+
+//EQ CONTROL(0x62)
+
+#define EN_HW_EQ_BLK			(0x1<<15)		//HW EQ block control
+#define EN_HW_EQ_HPF_MODE		(0x1<<14)		//High Frequency shelving filter mode
+#define EN_HW_EQ_SOUR			(0x1<<11)		//0:DAC PATH,1:ADC PATH
+#define EN_HW_EQ_HPF			(0x1<<4)		//EQ High Pass Filter Control
+#define EN_HW_EQ_BP3			(0x1<<3)		//EQ Band-3 Control
+#define EN_HW_EQ_BP2			(0x1<<2)		//EQ Band-2 Control
+#define EN_HW_EQ_BP1			(0x1<<1)		//EQ Band-1 Control
+#define EN_HW_EQ_LPF			(0x1<<0)		//EQ Low Pass Filter Control
+
+//EQ Mode Change Enable(0x66)
+#define EQ_HPF_CHANGE_EN		(0x1<<4)		//EQ High Pass Filter Mode Change Enable
+#define EQ_BP3_CHANGE_EN		(0x1<<3)		//EQ Band-3 Pass Filter Mode Change Enable
+#define EQ_BP2_CHANGE_EN		(0x1<<2)		//EQ Band-2 Pass Filter Mode Change Enable
+#define EQ_BP1_CHANGE_EN		(0x1<<1)		//EQ Band-1 Pass Filter Mode Change Enable
+#define EQ_LPF_CHANGE_EN		(0x1<<0)		//EQ Low Pass Filter Mode Change Enable
+
+
+//AVC Control(0x68)
+#define AVC_ENABLE				(0x1<<15)
+#define AVC_TARTGET_SEL_MASK	(0x1<<14)
+#define	AVC_TARTGET_SEL_R 		(0x1<<14)
+#define	AVC_TARTGET_SEL_L		(0x0<<14)
+
+
+struct rt5623_setup_data {
+	unsigned short i2c_address;
+	int mic2_input;
+};
+
+
+#define RT5623_PLL_FR_MCLK			0
+#define RT5623_PLL_FR_BCK  			1
+
+//WaveOut channel for realtek codec
+enum 
+{
+	RT_WAVOUT_SPK  				=(0x1<<0),
+	RT_WAVOUT_SPK_R				=(0x1<<1),
+	RT_WAVOUT_SPK_L				=(0x1<<2),
+	RT_WAVOUT_HP				=(0x1<<3),
+	RT_WAVOUT_HP_R				=(0x1<<4),
+	RT_WAVOUT_HP_L				=(0x1<<5),	
+	RT_WAVOUT_MONO				=(0x1<<6),
+	RT_WAVOUT_AUXOUT			=(0x1<<7),
+	RT_WAVOUT_AUXOUT_R			=(0x1<<8),
+	RT_WAVOUT_AUXOUT_L			=(0x1<<9),
+	RT_WAVOUT_LINEOUT			=(0x1<<10),
+	RT_WAVOUT_LINEOUT_R			=(0x1<<11),
+	RT_WAVOUT_LINEOUT_L			=(0x1<<12),	
+	RT_WAVOUT_DAC				=(0x1<<13),		
+	RT_WAVOUT_ALL_ON			=(0x1<<14),
+};
+
+//WaveIn channel for realtek codec
+enum
+{
+	RT_WAVIN_R_MONO_MIXER		=(0x1<<0),
+	RT_WAVIN_R_SPK_MIXER		=(0x1<<1),
+	RT_WAVIN_R_HP_MIXER			=(0x1<<2),
+	RT_WAVIN_R_PHONE			=(0x1<<3),
+	RT_WAVIN_R_AUXIN			=(0x1<<3),	
+	RT_WAVIN_R_LINE_IN			=(0x1<<4),
+	RT_WAVIN_R_MIC2				=(0x1<<5),
+	RT_WAVIN_R_MIC1				=(0x1<<6),
+
+	RT_WAVIN_L_MONO_MIXER		=(0x1<<8),
+	RT_WAVIN_L_SPK_MIXER		=(0x1<<9),
+	RT_WAVIN_L_HP_MIXER			=(0x1<<10),
+	RT_WAVIN_L_PHONE			=(0x1<<11),
+	RT_WAVIN_L_AUXIN			=(0x1<<11),
+	RT_WAVIN_L_LINE_IN			=(0x1<<12),
+	RT_WAVIN_L_MIC2				=(0x1<<13),
+	RT_WAVIN_L_MIC1				=(0x1<<14),
+};
+
+enum 
+{
+	POWER_STATE_D0=0,
+	POWER_STATE_D1,
+	POWER_STATE_D1_PLAYBACK,
+	POWER_STATE_D1_RECORD,
+	POWER_STATE_D2,
+	POWER_STATE_D2_PLAYBACK,
+	POWER_STATE_D2_RECORD,
+	POWER_STATE_D3,
+	POWER_STATE_D4
+
+}; 
+
+
+extern struct snd_soc_dai rt5623_dai;	
+extern struct snd_soc_codec_device soc_codec_dev_rt5623;
+
+#endif
--- linux-mvl-dove-2.6.32.orig/sound/soc/codecs/wm8350.c
+++ linux-mvl-dove-2.6.32/sound/soc/codecs/wm8350.c
@@ -423,8 +423,8 @@
 	SOC_ENUM_SINGLE(WM8350_INPUT_MIXER_VOLUME, 15, 2, wm8350_lr),
 };
 
-static DECLARE_TLV_DB_LINEAR(pre_amp_tlv, -1200, 3525);
-static DECLARE_TLV_DB_LINEAR(out_pga_tlv, -5700, 600);
+static DECLARE_TLV_DB_SCALE(pre_amp_tlv, -1200, 3525, 0);
+static DECLARE_TLV_DB_SCALE(out_pga_tlv, -5700, 600, 0);
 static DECLARE_TLV_DB_SCALE(dac_pcm_tlv, -7163, 36, 1);
 static DECLARE_TLV_DB_SCALE(adc_pcm_tlv, -12700, 50, 1);
 static DECLARE_TLV_DB_SCALE(out_mix_tlv, -1500, 300, 1);
@@ -925,7 +925,7 @@
 		iface |= 0x3 << 8;
 		break;
 	case SND_SOC_DAIFMT_DSP_B:
-		iface |= 0x3 << 8;	/* lg not sure which mode */
+		iface |= 0x3 << 8 | WM8350_AIF_LRCLK_INV;
 		break;
 	default:
 		return -EINVAL;
--- linux-mvl-dove-2.6.32.orig/sound/soc/codecs/wm9712.c
+++ linux-mvl-dove-2.6.32/sound/soc/codecs/wm9712.c
@@ -464,7 +464,8 @@
 {
 	u16 *cache = codec->reg_cache;
 
-	soc_ac97_ops.write(codec->ac97, reg, val);
+	if (reg < 0x7c)
+		soc_ac97_ops.write(codec->ac97, reg, val);
 	reg = reg >> 1;
 	if (reg < (ARRAY_SIZE(wm9712_reg)))
 		cache[reg] = val;
--- linux-mvl-dove-2.6.32.orig/sound/soc/codecs/wm8903.c
+++ linux-mvl-dove-2.6.32/sound/soc/codecs/wm8903.c
@@ -1506,7 +1506,7 @@
 	struct i2c_client *i2c = codec->control_data;
 	int i;
 	u16 *reg_cache = codec->reg_cache;
-	u16 *tmp_cache = kmemdup(codec->reg_cache, sizeof(wm8903_reg_defaults),
+	u16 *tmp_cache = kmemdup(reg_cache, sizeof(wm8903_reg_defaults),
 				 GFP_KERNEL);
 
 	/* Bring the codec back up to standby first to minimise pop/clicks */
@@ -1518,6 +1518,7 @@
 		for (i = 2; i < ARRAY_SIZE(wm8903_reg_defaults); i++)
 			if (tmp_cache[i] != reg_cache[i])
 				snd_soc_write(codec, i, tmp_cache[i]);
+		kfree(tmp_cache);
 	} else {
 		dev_err(&i2c->dev, "Failed to allocate temporary cache\n");
 	}
--- linux-mvl-dove-2.6.32.orig/sound/soc/codecs/rt655.c
+++ linux-mvl-dove-2.6.32/sound/soc/codecs/rt655.c
@@ -0,0 +1,497 @@
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/ac97_codec.h>
+#include <sound/initval.h>
+#include <sound/soc.h>
+#include <sound/soc-dapm.h>
+#include "rt655.h"
+
+#define RT655_VERSION "0.2"
+//#define RT655_DEBUG 1
+#if defined(RT655_DEBUG)
+#define DBG(format, arg...) \
+	printk(KERN_DEBUG format "\n", ## arg)
+#else
+#define DBG(format, arg...) do {} while(0)
+#endif
+
+#define rt655_write_mask(c, reg, value, mask) snd_soc_update_bits(c, reg, mask, value)
+static const u16 rt655_reg[] = {
+	0x0000, 0x8000, 0x0000, 0x8000,//0
+	0x0000, 0x8000, 0x8008, 0x8008,
+	0x8808, 0x8808, 0x0000, 0x8808,//1
+	0x8808, 0x0000, 0x8000, 0x0000,
+	0x0000, 0x0000, 0x0000, 0x000f,//2
+	0x09c4, 0x05f0, 0xbb80, 0xbb80,
+	0xbb80, 0xbb80, 0x0000, 0x8080,//3
+	0x8080, 0x2000, 0x0000, 0x0000,
+	0x0000, 0x0000, 0x0000, 0x0000,//4
+	0x0000, 0x0000, 0x0000, 0x0000,
+	0x0000, 0x0000, 0x0000, 0x0000,//5
+	0x0000, 0x0000, 0x0000, 0x0000,
+	0x0000, 0x0000, 0x0808, 0x0808,//6
+	0x0AEA, 0x0040, 0x0000, 0x0004,
+	0x0000, 0x0000, 0x0000, 0x0000,//7
+	0x0000, 0x60a2, 0x414c, 0x4760,
+};
+static unsigned int rt655_read(struct snd_soc_codec *codec,
+	unsigned int reg);
+static int rt655_write(struct snd_soc_codec *codec,
+	unsigned int reg, unsigned int val);
+static int rt655_write_page(struct snd_soc_codec *codec, 
+	unsigned int reg, unsigned int val, int page_id);
+static int rt655_read_page(struct snd_soc_codec *codec, 
+	unsigned int reg, int page_id);
+static int rt655_write_page_mask(struct snd_soc_codec *codec, 
+	unsigned int reg, unsigned int val, unsigned int mask, int page_id);
+int rt655_reset(struct snd_soc_codec *codec, int try_warm);
+
+
+static int rt655_prepare(struct snd_pcm_substream *substream,
+			struct snd_soc_dai *dai);
+static int rt655_shutdown(struct snd_pcm_substream *substream, 
+		struct snd_soc_dai *codec_dai);
+static int rt655_hw_params(struct snd_pcm_substream *substream,
+				struct snd_pcm_hw_params *params,
+				struct snd_soc_dai *dai);
+
+static int rt655_set_bias_level(struct snd_soc_codec *codec, 
+			enum snd_soc_bias_level level);
+static int rt655_soc_probe(struct platform_device *pdev);
+static int rt655_soc_remove(struct platform_device *pdev);
+static int rt655_soc_suspend(struct platform_device *pdev);
+static int rt655_soc_resume(struct platform_device *pdev);
+
+static int rt655_channels = 6;
+
+
+u16 Set_Codec_Reg_Init[][2]={
+	{RT655_REC_SEL			,0x0101}, //default reocrd source from Mic	
+	{RT655_FRONT_DAC_VOL	,0x0808}, //set Front DAC to 0DB and unmute 
+	{RT655_SUR_DAC_VOL		,0x0808}, //set Surround  DAC to 0DB and unmute 
+	{RT655_CEN_LFE_DAC_VOL	,0x0808}, //set Center/LFE DAC to 0DB and unmute 
+	{RT655_MASTER_VOL		,0x8000}, //front channel mute by default	
+	{RT655_SUR_VOL			,0x8080}, //surround channel mute by default
+	{RT655_CEN_LFE_VOL		,0x8080}, //Cent/LFE channel mute by default
+};
+	
+
+static int rt655_init_reg(struct snd_soc_codec *codec) 
+{
+	int i;
+
+	DBG("enter %s", __func__);
+	for(i=0;i<ARRAY_SIZE(Set_Codec_Reg_Init);i++)
+	{
+		rt655_write(codec,Set_Codec_Reg_Init[i][0],Set_Codec_Reg_Init[i][1]);		
+	}
+
+	return 0;
+}
+static unsigned int rt655_read(struct snd_soc_codec *codec, unsigned int reg)
+{
+	return soc_ac97_ops.read(codec->ac97, reg);
+}
+
+static int rt655_write(struct snd_soc_codec *codec, 
+	unsigned int reg, unsigned int val)
+{
+	u16 *cache = codec->reg_cache;
+
+	soc_ac97_ops.write(codec->ac97, reg, val);
+	reg = reg >> 1;
+	if (reg < (ARRAY_SIZE(rt655_reg)))
+		cache[reg] = val;
+
+	return 0;	
+}
+
+static int rt655_read_page(struct snd_soc_codec *codec, 
+	unsigned int reg, int page_id)
+{
+	rt655_write_mask(codec, 0x24, page_id, 0x000f);
+	return rt655_read(codec, reg);
+}
+
+static int rt655_write_page(struct snd_soc_codec *codec, 
+	unsigned int reg, unsigned int val, int page_id)
+{
+	rt655_write_mask(codec, 0x24, page_id, 0x000f);
+	return rt655_write(codec, reg, val);
+}
+
+static int rt655_write_page_mask(struct snd_soc_codec *codec, 
+	unsigned int reg, unsigned int val, unsigned int mask, int page_id)
+{
+	int change;
+	unsigned int old, new;
+
+	old = rt655_read_page(codec, reg, page_id);
+	new = (old & ~mask) | val;
+	change = old != new;
+	if (change)
+		rt655_write_page(codec, reg, val, page_id);
+	
+	return change;
+}
+
+
+int rt655_reset(struct snd_soc_codec *codec, int try_warm)
+{
+	
+	DBG("enter %s", __func__);
+	if (try_warm && soc_ac97_ops.warm_reset) {
+		soc_ac97_ops.warm_reset(codec->ac97);
+		if (codec->read(codec,0x7c) == 0x414c)
+			return 1;
+	}
+
+	soc_ac97_ops.reset(codec->ac97);
+	if (codec->read(codec, 0x7c) != 0x414c)
+		return -EIO;
+	return 0;
+}
+
+EXPORT_SYMBOL_GPL(rt655_reset);
+
+struct snd_soc_codec_device soc_codec_dev_rt655 = {
+	.probe = rt655_soc_probe,
+	.remove = rt655_soc_remove,
+	.suspend = rt655_soc_suspend,
+	.resume = rt655_soc_resume,
+};
+EXPORT_SYMBOL_GPL(soc_codec_dev_rt655);
+
+
+#define RT655_HIFI_FORMAT SNDRV_PCM_FMTBIT_S16_LE
+//ALC655 only support 48k
+#define RT655_HIFI_RATES SNDRV_PCM_RATE_48000		
+
+static struct snd_soc_dai_ops rt655_dai_ops = {
+	.prepare = rt655_prepare,
+	.hw_params	= rt655_hw_params,
+	.shutdown = rt655_shutdown,
+};
+struct snd_soc_dai rt655_dai = 	{
+	.name = "RT655",
+	.playback = {
+		.stream_name = "Hifi Playback",
+		.channels_min = 1,
+		.channels_max = 6,
+		.rates= RT655_HIFI_RATES,
+		.formats = RT655_HIFI_FORMAT,
+	},
+	.capture = {
+		.stream_name = "Hifi Capture",
+		.channels_min = 1,
+		.channels_max = 2, 
+		.rates = RT655_HIFI_RATES,
+		.formats = RT655_HIFI_FORMAT,
+	},
+	.ops = &rt655_dai_ops,
+};
+EXPORT_SYMBOL_GPL(rt655_dai);
+static const char *rt655_record_source[] = {"Mic", "CD", "Mute", "AUX", 
+					    "Line", "Stereo Mixer", "Mono Mixer","Phone"};
+static const struct soc_enum rt655_record_enum = SOC_ENUM_DOUBLE(RT655_REC_SEL, 8, 0, 8, rt655_record_source);
+static const struct snd_kcontrol_new rt655_snd_ac97_controls[] = {
+SOC_DOUBLE("Front Playback Switch", RT655_MASTER_VOL, 15, 7, 1, 1),
+SOC_DOUBLE("Front Playback Volume", RT655_MASTER_VOL, 8, 0, 31, 1),
+SOC_DOUBLE("SURR Playback Volume", RT655_SUR_VOL, 8, 0, 31, 1),
+SOC_DOUBLE("SURR Playback Switch", RT655_SUR_VOL, 15, 7, 1, 1),
+SOC_DOUBLE("CEN_LFE Playback Volume", RT655_CEN_LFE_VOL, 8, 0, 31, 1),
+SOC_DOUBLE("CEN_LFE Playback Switch", RT655_CEN_LFE_VOL, 15, 7, 1, 1),
+SOC_DOUBLE("Front DAC Playback Volume", RT655_FRONT_DAC_VOL, 8, 0, 31, 1),
+SOC_DOUBLE("Front DAC Playback Switch", RT655_FRONT_DAC_VOL, 15, 7, 1, 1),
+SOC_DOUBLE("SURR DAC Playback Volume", RT655_SUR_DAC_VOL, 8, 0, 31, 1),
+SOC_DOUBLE("SURR DAC Playback Switch", RT655_SUR_DAC_VOL, 15, 7, 1, 1),
+SOC_DOUBLE("CEN_LFE DAC Playback Volume", RT655_CEN_LFE_DAC_VOL, 8, 0, 31, 1),
+SOC_DOUBLE("CEN_LFE DAC Playback Switch", RT655_CEN_LFE_DAC_VOL, 15, 7, 1, 1),
+SOC_SINGLE("Mono Playback Switch", RT655_MONO_OUT_VOL, 15, 1, 1),
+SOC_SINGLE("Mono Playback Volume", RT655_MONO_OUT_VOL, 0, 31, 1),
+SOC_SINGLE("PC BEEP Playback Volume", RT655_PCBEEP_VOL, 1, 15, 1),
+SOC_SINGLE("PC BEEP Playback Switch", RT655_PCBEEP_VOL, 15, 1, 1),
+SOC_SINGLE("Phone Capture Volume", RT655_PHONE_VOL, 0, 31, 1),
+SOC_SINGLE("Phone Capture Switch", RT655_PHONE_VOL, 15, 1, 1),
+SOC_SINGLE("Mic Capture Volume", RT655_MIC_VOL, 0, 31, 1),
+SOC_SINGLE("Mic Capture Switch", RT655_MIC_VOL, 15, 1, 1),
+SOC_DOUBLE("Line Capture Switch", RT655_LINEIN_VOL, 15, 7, 1, 1),
+SOC_DOUBLE("Line Capture Volume", RT655_LINEIN_VOL, 8, 0, 31, 1),
+SOC_DOUBLE("CD Capture Switch", RT655_CD_VOL, 15, 7, 1, 1),
+SOC_DOUBLE("CD Capture Volume", RT655_CD_VOL, 8, 0, 31, 1),
+SOC_DOUBLE("AUX Capture Switch", RT655_AUX_VOL, 15, 7, 1, 1),
+SOC_DOUBLE("AUX Capture Volume", RT655_AUX_VOL, 8, 0, 31, 1),
+SOC_SINGLE("Record Gain Capture Switch", RT655_REC_GAIN, 15, 1, 1),
+SOC_DOUBLE("Record Gain Capture Volume", RT655_REC_GAIN, 8, 0, 15, 0),
+SOC_ENUM("Record Capture Switch", rt655_record_enum),
+};
+static int rt655_soc_probe(struct platform_device *pdev)
+{
+	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
+	struct snd_soc_codec *codec = socdev->card->codec;
+	int ret;
+
+	printk(KERN_INFO "rt655 soc codec, version is %s\n", RT655_VERSION);
+	socdev->card->codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
+	if (socdev->card->codec == NULL)
+		return -ENOMEM;
+	codec = socdev->card->codec;
+	mutex_init(&codec->mutex);
+	
+	codec->reg_cache = kmemdup(rt655_reg, sizeof(rt655_reg), GFP_KERNEL);
+	if (codec->reg_cache == NULL) {
+		ret = -ENOMEM;
+		goto cache_err;
+	}
+	codec->reg_cache_size = ARRAY_SIZE(rt655_reg) * 2;
+	codec->reg_cache_step = 2;
+/*
+	codec->private_data = kzalloc(sizeof(struct rt655_priv), GFP_KERNEL);
+	if (codec->private_data == NULL) {
+		ret = -ENOMEM;
+		goto priv_err;
+	}
+*/
+	codec->name = "rt655";
+	codec->owner = THIS_MODULE;
+	codec->dai = &rt655_dai;
+	codec->num_dai = 1;
+	codec->read = rt655_read;
+	codec->write = rt655_write;
+	codec->set_bias_level = rt655_set_bias_level;
+	INIT_LIST_HEAD(&codec->dapm_widgets);
+	INIT_LIST_HEAD(&codec->dapm_paths);
+	
+	ret = snd_soc_new_ac97_codec(codec, &soc_ac97_ops, 0);
+	if (ret < 0) {
+		printk(KERN_ERR "rt655: failed to register ac97 codec\n");
+		goto codec_err;
+	}
+	
+	ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
+	if (ret < 0)
+		goto pcm_err;
+
+	ret = rt655_reset(codec, 0);
+	if (ret < 0) {
+		printk(KERN_ERR "FAIL to reset rt655\n");
+		goto reset_err;
+	}
+	
+	rt655_write(codec, 0x26, 0x0000);
+	rt655_init_reg(codec);	//initize some register
+	rt655_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
+	
+	snd_soc_add_controls(codec, rt655_snd_ac97_controls,
+				ARRAY_SIZE(rt655_snd_ac97_controls));
+	ret = snd_soc_init_card(socdev);
+	if (ret < 0) {
+		printk(KERN_ERR "rt655: failed to register card\n");
+		goto reset_err;
+	}
+	return 0;
+reset_err:
+	snd_soc_free_pcms(socdev);
+
+pcm_err:
+	snd_soc_free_ac97_codec(codec);
+
+codec_err:
+	kfree(codec->reg_cache);
+
+cache_err:
+	kfree(socdev->card->codec);
+	socdev->card->codec = NULL;
+	return ret;
+}
+
+static int rt655_soc_remove(struct platform_device *pdev)
+{
+	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
+	struct snd_soc_codec *codec = socdev->card->codec;
+
+	DBG("enter %s", __func__);
+	if (codec == NULL)
+		return 0;
+
+	snd_soc_dapm_free(socdev);
+	snd_soc_free_pcms(socdev);
+	snd_soc_free_ac97_codec(codec);
+	kfree(codec->reg_cache);
+	kfree(codec);
+	return 0;
+}
+
+static int rt655_soc_suspend(struct platform_device *pdev)
+{
+	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
+	struct snd_soc_codec *codec = socdev->card->codec;
+
+	DBG("enter %s", __func__);
+	rt655_set_bias_level(codec, SND_SOC_BIAS_OFF);
+	return 0;
+}
+
+static int rt655_soc_resume(struct platform_device *pdev)
+{
+	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
+	struct snd_soc_codec *codec = socdev->card->codec;
+	int i, ret;
+	u16 *cache = codec->reg_cache;
+
+	DBG("enter %s", __func__);
+	ret = rt655_reset(codec, 1);
+	if (ret < 0) {
+		printk(KERN_ERR "could not reset AC97 codec\n");
+		return ret;
+	}
+
+	rt655_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
+
+	if (ret == 0) {
+		/* Sync reg_cache with the hardware after cold reset */
+		for (i = 2; i < ARRAY_SIZE(rt655_reg) << 1; i += 2) {
+			if (i == 0x26)
+				continue;
+			soc_ac97_ops.write(codec->ac97, i, cache[i>>1]);
+		}
+	}
+
+	if (codec->suspend_bias_level == SND_SOC_BIAS_ON)
+		rt655_set_bias_level(codec, SND_SOC_BIAS_ON);
+
+	return ret;
+}
+
+static int rt655_hw_params(struct snd_pcm_substream *substream,
+				struct snd_pcm_hw_params *params,
+				struct snd_soc_dai *dai)
+{
+	struct snd_soc_codec *codec = dai->codec;
+#if 0
+	switch (params_channels(params)) {
+		case 2:
+			
+			rt655_channels=2;
+			rt655_write_mask(codec,RT655_MULT_CHAN_CTRL,0x0000,0x0030);		
+			
+			break;
+
+		case 4:
+
+			rt655_channels=4;
+			rt655_write_mask(codec,RT655_MULT_CHAN_CTRL,0x0010,0x0030);
+
+			break;
+
+		case 6:
+
+			rt655_channels=6;
+			rt655_write_mask(codec,RT655_MULT_CHAN_CTRL,0x0030,0x0030);
+
+			break;
+
+	}
+#else
+			rt655_channels=6;
+			rt655_write_mask(codec,RT655_MULT_CHAN_CTRL,0x0030,0x0030);
+
+#endif
+	return 0;
+}
+
+
+static int rt655_prepare(struct snd_pcm_substream *substream,
+			struct snd_soc_dai *dai)
+{
+	struct snd_soc_codec *codec =  dai->codec;
+	int stream;
+
+	DBG("enter %s", __func__);
+
+	stream = substream->stream;
+	switch(stream) {
+		case SNDRV_PCM_STREAM_PLAYBACK:
+
+				switch (rt655_channels) {
+					case 2:			
+
+						rt655_write_mask(codec, RT655_SUR_VOL	 , 0x8080, 0x8080);
+						rt655_write_mask(codec, RT655_CEN_LFE_VOL, 0x8080, 0x8080);
+						rt655_write_mask(codec, RT655_MASTER_VOL , 0x0000, 0x8000);	
+			
+					break;
+
+					case 4:
+
+						rt655_write_mask(codec, RT655_CEN_LFE_VOL, 0x8080, 0x8080);
+						rt655_write_mask(codec, RT655_SUR_VOL	 , 0x0000, 0x8080);						
+						rt655_write_mask(codec, RT655_MASTER_VOL , 0x0000, 0x8000);	
+
+					break;
+
+					case 6:
+
+						rt655_write_mask(codec, RT655_SUR_VOL	 , 0x0000, 0x8080);
+						rt655_write_mask(codec, RT655_CEN_LFE_VOL, 0x0000, 0x8080);
+						rt655_write_mask(codec, RT655_MASTER_VOL , 0x0000, 0x8000);	
+
+					break;
+				}	
+
+			break;
+
+		case SNDRV_PCM_STREAM_CAPTURE:
+
+			break;
+	}	
+	return 0;
+}
+static int rt655_shutdown(struct snd_pcm_substream *substream, 
+	struct snd_soc_dai *codec_dai)
+{
+	struct snd_soc_codec *codec = codec_dai->codec;
+	int stream;
+
+	DBG("enter %s", __func__);
+
+	stream = substream->stream;
+	switch(stream) {
+		case SNDRV_PCM_STREAM_PLAYBACK:
+			//mute all output
+			rt655_write_mask(codec, RT655_SUR_VOL	 , 0x8080, 0x8080);
+			rt655_write_mask(codec, RT655_CEN_LFE_VOL, 0x8080, 0x8080);
+			rt655_write_mask(codec, RT655_MASTER_VOL , 0x8000, 0x8000);	
+			break;
+		case SNDRV_PCM_STREAM_CAPTURE:
+			break;
+
+	}
+	return 0;
+}
+
+static int rt655_set_bias_level(struct snd_soc_codec *codec, 
+			enum snd_soc_bias_level level)
+{
+	DBG("enter %s", __func__);
+	
+	switch (level) {
+	case SND_SOC_BIAS_ON:
+	case SND_SOC_BIAS_PREPARE:
+		break;
+	case SND_SOC_BIAS_STANDBY:
+		rt655_write(codec, 0x26, 0x0000);
+		break;
+	case SND_SOC_BIAS_OFF:
+		rt655_write(codec, 0x26, 0xffff);
+		break;
+	}
+	return 0;
+}
+MODULE_DESCRIPTION("ASoC RT655 driver");
+MODULE_AUTHOR("rory_yin@realsil.com.cn");
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/sound/soc/codecs/wm8776.c
+++ linux-mvl-dove-2.6.32/sound/soc/codecs/wm8776.c
@@ -93,7 +93,6 @@
 
 static const struct snd_soc_dapm_widget wm8776_dapm_widgets[] = {
 SND_SOC_DAPM_INPUT("AUX"),
-SND_SOC_DAPM_INPUT("AUX"),
 
 SND_SOC_DAPM_INPUT("AIN1"),
 SND_SOC_DAPM_INPUT("AIN2"),
@@ -178,13 +177,6 @@
 	case SND_SOC_DAIFMT_LEFT_J:
 		iface |= 0x0001;
 		break;
-		/* FIXME: CHECK A/B */
-	case SND_SOC_DAIFMT_DSP_A:
-		iface |= 0x0003;
-		break;
-	case SND_SOC_DAIFMT_DSP_B:
-		iface |= 0x0007;
-		break;
 	default:
 		return -EINVAL;
 	}
--- linux-mvl-dove-2.6.32.orig/sound/soc/codecs/rt5610.h
+++ linux-mvl-dove-2.6.32/sound/soc/codecs/rt5610.h
@@ -0,0 +1,414 @@
+#ifndef _RT5610_H
+#define _RT5610_H
+
+
+//Index of Codec Register definition
+#define RT5610_RESET						0X00			//RESET CODEC TO DEFAULT
+#define RT5610_SPK_OUT_VOL					0X02			//SPEAKER OUT VOLUME
+#define RT5610_HP_OUT_VOL					0X04			//HEADPHONE OUTPUT VOLUME
+#define RT5610_PHONEIN_MONO_OUT_VOL			0X08			//PHONE INPUT/MONO OUTPUT VOLUME
+#define RT5610_LINE_IN_VOL					0X0A			//LINE IN VOLUME
+#define RT5610_STEREO_DAC_VOL				0X0C			//STEREO DAC VOLUME
+#define RT5610_MIC_VOL						0X0E			//MICROPHONE VOLUME
+#define RT5610_MIC_ROUTING_CTRL				0X10			//MIC ROUTING CONTROL
+#define RT5610_ADC_REC_GAIN					0X12			//ADC RECORD GAIN
+#define RT5610_ADC_REC_MIXER				0X14			//ADC RECORD MIXER CONTROL
+#define RT5610_VOICE_DAC_OUT_VOL			0X18			//VOICE DAC OUTPUT VOLUME
+#define RT5610_OUTPUT_MIXER_CTRL			0X1C			//OUTPUT MIXER CONTROL
+#define RT5610_MIC_CTRL						0X22			//MICROPHONE CONTROL
+#define RT5610_PD_CTRL_STAT					0X26			//POWER DOWN CONTROL/STATUS
+#define RT5610_TONE_CTRL                               0x2a                       //tone control
+#define RT5610_DAC_DPE_RATE                         0x2c                      //ac97's dac/dpe rate
+#define RT5610_ADC_RATE                                 0x32                      //ac97's adc rate
+//#define	RT5610_MAIN_SDP_CTRL				0X34			//MAIN SERIAL DATA PORT CONTROL(STEREO I2S)
+
+#define RT5610_EXTEND_SDP_CTRL				0X36			//EXTEND SERIAL DATA PORT CONTROL(VOICE I2S/PCM)
+#define	RT5610_PWR_MANAG_ADD1				0X3A			//POWER MANAGMENT ADDITION 1
+#define RT5610_PWR_MANAG_ADD2				0X3C			//POWER MANAGMENT ADDITION 2
+#define RT5610_PWR_MANAG_ADD3				0X3E			//POWER MANAGMENT ADDITION 3
+#define RT5610_GEN_CTRL_REG1				0X40			//GENERAL PURPOSE CONTROL REGISTER 1
+#define	RT5610_GEN_CTRL_REG2				0X42			//GENERAL PURPOSE CONTROL REGISTER 2
+#define RT5610_PLL_CTRL						0X44			//PLL CONTROL
+#define RT5610_GPIO_PIN_CONFIG				0X4C			//GPIO PIN CONFIGURATION
+#define RT5610_GPIO_PIN_POLARITY			0X4E			//GPIO PIN POLARITY	
+#define RT5610_GPIO_PIN_STICKY				0X50			//GPIO PIN STICKY	
+#define RT5610_GPIO_PIN_WAKEUP				0X52			//GPIO PIN WAKE UP
+#define RT5610_GPIO_PIN_STATUS				0X54			//GPIO PIN STATUS
+#define RT5610_GPIO_PIN_SHARING				0X56			//GPIO PIN SHARING
+#define	RT5610_OVER_TEMP_CURR_STATUS		0X58			//OVER TEMPERATURE AND CURRENT STATUS
+#define RT5610_GPIO_OUT_CTRL				0X5C			//GPIO OUTPUT PIN CONTRL
+#define RT5610_MISC_CTRL					0X5E			//MISC CONTROL
+//#define	RT5610_STEREO_DAC_CLK_CTRL1			0X60			//STEREO DAC CLOCK CONTROL 1
+//#define RT5610_STEREO_DAC_CLK_CTRL2			0X62			//STEREO DAC CLOCK CONTROL 2
+#define RT5610_VOICE_DAC_PCMCLK_CTRL1		0X64			//VOICE/PCM DAC CLOCK CONTROL 1
+#define RT5610_VOICE_DAC_PCMCLK_CTRL2		0X66			//VOICE/PCM DAC CLOCK CONTROL 2
+#define RT5610_PSEDUEO_SPATIAL_CTRL			0X68			//PSEDUEO STEREO /SPATIAL EFFECT BLOCK CONTROL
+#define RT5610_INDEX_ADDRESS				0X6A			//INDEX ADDRESS
+#define RT5610_INDEX_DATA					0X6C			//INDEX DATA 
+#define RT5610_EQ_STATUS					0X6E			//EQ STATUS
+#define RT5610_TOUCH_PANEL_STATUS              0x78                    //touche panel indiction
+#define RT5610_VENDOR_ID1	  		    	0x7C			//VENDOR ID1
+#define RT5610_VENDOR_ID2	  		    	0x7E			//VENDOR ID2
+
+
+//*************************************************************************************************
+//Bit define of Codec Register
+//*************************************************************************************************
+//global definition
+#define RT_L_MUTE						(0x1<<15)		//Mute Left Control
+#define RT_L_ZC							(0x1<<14)		//Mute Left Zero-Cross Detector Control
+#define RT_R_MUTE						(0x1<<7)		//Mute Right Control
+#define RT_R_ZC							(0x1<<6)		//Mute Right Zero-Cross Detector Control
+#define RT_M_HP_MIXER					(0x1<<15)		//Mute source to HP Mixer
+#define RT_M_SPK_MIXER					(0x1<<14)		//Mute source to Speaker Mixer
+#define RT_M_MONO_MIXER					(0x1<<13)		//Mute source to Mono Mixer
+
+//Phone Input/MONO Output Volume(0x08)
+#define M_PHONEIN_TO_HP_MIXER			(0x1<<15)		//Mute Phone In volume to HP mixer
+#define M_PHONEIN_TO_SPK_MIXER			(0x1<<14)		//Mute Phone In volume to speaker mixer
+#define M_MONO_OUT_VOL					(0x1<<7)		//Mute Mono output volume
+
+
+//Mic Routing Control(0x10)
+#define M_MIC1_TO_HP_MIXER				(0x1<<15)		//Mute MIC1 to HP mixer
+#define M_MIC1_TO_SPK_MIXER				(0x1<<14)		//Mute MiC1 to SPK mixer
+#define M_MIC1_TO_MONO_MIXER			(0x1<<13)		//Mute MIC1 to MONO mixer
+#define MIC1_DIFF_INPUT_CTRL			(0x1<<12)		//MIC1 different input control
+#define M_MIC2_TO_HP_MIXER				(0x1<<7)		//Mute MIC2 to HP mixer
+#define M_MIC2_TO_SPK_MIXER				(0x1<<6)		//Mute MiC2 to SPK mixer
+#define M_MIC2_TO_MONO_MIXER			(0x1<<5)		//Mute MIC2 to MONO mixer
+#define MIC2_DIFF_INPUT_CTRL			(0x1<<4)		//MIC2 different input control
+
+//ADC Record Gain(0x12)
+#define M_ADC_L_TO_HP_MIXER				(0x1<<15)		//Mute left of ADC to HP Mixer
+#define M_ADC_R_TO_HP_MIXER				(0x1<<14)		//Mute right of ADC to HP Mixer
+#define M_ADC_L_TO_MONO_MIXER			(0x1<<13)		//Mute left of ADC to MONO Mixer
+#define M_ADC_R_TO_MONO_MIXER			(0x1<<12)		//Mute right of ADC to MONO Mixer
+#define ADC_L_GAIN_MASK					(0x1f<<7)		//ADC Record Gain Left channel Mask
+#define ADC_L_ZC_DET					(0x1<<6)		//ADC Zero-Cross Detector Control
+#define ADC_R_ZC_DET					(0x1<<5)		//ADC Zero-Cross Detector Control
+#define ADC_R_GAIN_MASK					(0x1f<<0)		//ADC Record Gain Right channel Mask
+
+//Voice DAC Output Volume(0x18)
+#define M_V_DAC_TO_HP_MIXER				(0x1<<15)
+#define M_V_DAC_TO_SPK_MIXER			(0x1<<14)
+#define M_V_DAC_TO_MONO_MIXER			(0x1<<13)
+
+//Output Mixer Control(0x1C)
+#define	SPKL_INPUT_SEL_MASK				(0x3<<14)
+#define	SPKL_INPUT_SEL_MONO				(0x3<<14)
+#define	SPKL_INPUT_SEL_SPK				(0x2<<14)
+#define	SPKL_INPUT_SEL_HPL				(0x1<<14)
+#define	SPKL_INPUT_SEL_VMID				(0x0<<14)
+
+#define SPK_OUT_SEL_CLASS_D				(0x1<<13)
+#define SPK_OUT_SEL_CLASS_AB			(0x0<<13)
+
+#define	SPKR_INPUT_SEL_MASK				(0x3<<11)
+#define	SPKR_INPUT_SEL_MONO_MIXER		(0x3<<11)
+#define	SPKR_INPUT_SEL_SPK_MIXER		(0x2<<11)
+#define	SPKR_INPUT_SEL_HPR_MIXER		(0x1<<11)
+#define	SPKR_INPUT_SEL_VMID				(0x0<<11)
+
+#define HPL_INPUT_SEL_HPL_MIXER			(0x1<<9)
+#define HPR_INPUT_SEL_HPR_MIXER			(0x1<<8)
+
+#define MONO_INPUT_SEL_MASK				(0x3<<6)
+#define MONO_INPUT_SEL_MONO_MIXER		(0x3<<6)
+#define MONO_INPUT_SEL_SPK_MIXER		(0x2<<6)
+#define MONO_INPUT_SEL_HP_MIXER			(0x1<<6)
+#define MONO_INPUT_SEL_VMID				(0x0<<6)
+
+//Micphone Control define(0x22)
+#define MIC1		1
+#define MIC2		2
+#define MIC_BIAS_90_PRECNET_AVDD	1
+#define	MIC_BIAS_75_PRECNET_AVDD	2
+
+#define MIC1_BOOST_CONTROL_MASK		(0x3<<10)
+#define MIC1_BOOST_CONTROL_BYPASS	(0x0<<10)
+#define MIC1_BOOST_CONTROL_20DB		(0x1<<10)
+#define MIC1_BOOST_CONTROL_30DB		(0x2<<10)
+#define MIC1_BOOST_CONTROL_40DB		(0x3<<10)
+
+#define MIC2_BOOST_CONTROL_MASK		(0x3<<8)
+#define MIC2_BOOST_CONTROL_BYPASS	(0x0<<8)
+#define MIC2_BOOST_CONTROL_20DB		(0x1<<8)
+#define MIC2_BOOST_CONTROL_30DB		(0x2<<8)
+#define MIC2_BOOST_CONTROL_40DB		(0x3<<8)
+
+#define MIC1_BIAS_VOLT_CTRL_MASK	(0x1<<5)
+#define MIC1_BIAS_VOLT_CTRL_90P		(0x0<<5)
+#define MIC1_BIAS_VOLT_CTRL_75P		(0x1<<5)
+
+#define MIC2_BIAS_VOLT_CTRL_MASK	(0x1<<4)
+#define MIC2_BIAS_VOLT_CTRL_90P		(0x0<<4)
+#define MIC2_BIAS_VOLT_CTRL_75P		(0x1<<4)
+
+//PowerDown control of register(0x26)
+//power management bits
+#define RT_PWR_PR7					(0x1<<15)	//write this bit to power down the Speaker Amplifier
+#define RT_PWR_PR6					(0x1<<14)	//write this bit to power down the Headphone Out and MonoOut
+#define RT_PWR_PR5					(0x1<<13)	//write this bit to power down the internal clock(without PLL)
+#define RT_PWR_PR3					(0x1<<11)	//write this bit to power down the mixer(vref/vrefout out off)
+#define RT_PWR_PR2					(0x1<<10)	//write this bit to power down the mixer(vref/vrefout still on)
+#define RT_PWR_PR1					(0x1<<9) 	//write this bit to power down the dac
+#define RT_PWR_PR0					(0x1<<8) 	//write this bit to power down the adc
+#define RT_PWR_REF					(0x1<<3)	//read only
+#define RT_PWR_ANL					(0x1<<2)	//read only	
+#define RT_PWR_DAC					(0x1<<1)	//read only
+#define RT_PWR_ADC					(0x1)		//read only
+
+
+
+
+//Extend Serial Data Port Control(0x36)
+#define EXT_I2S_FUNC_ENABLE			(0x1<<15)		//Enable PCM interface on GPIO 1,3,4,5  0:GPIO function,1:Voice PCM interface
+#define EXT_I2S_MODE_SEL			(0x1<<14)		//0:Master	,1:Slave
+#define EXT_I2S_VOICE_ADC_EN		(0x1<<8)		//ADC_L=Stereo, ADC_R=Voice
+#define EXT_I2S_BCLK_POLARITY		(0x1<<7)		//0:Normal 1:Invert
+#define EXT_I2S_PCM_MODE			(0x1<<6)		//PCM    	0:mode A				,1:mode B 
+												 	//Non PCM	0:Normal SADLRCK/SDALRCK,1:Invert SADLRCK/SDALRCK 
+//Data Length Slection
+#define EXT_I2S_DL_MASK				(0x3<<2)		//Extend i2s Data Length mask	
+#define EXT_I2S_DL_32				(0x3<<2)		//32 bits
+#define	EXT_I2S_DL_24				(0x2<<2)		//24 bits
+#define EXT_I2S_DL_20				(0x1<<2)		//20 bits
+#define EXT_I2S_DL_16				(0x0<<2)		//16 bits
+
+//Voice Data Format
+#define EXT_I2S_DF_MASK				(0x3)			//Extend i2s Data Format mask
+#define EXT_I2S_DF_I2S				(0x0)			//I2S FORMAT 
+#define EXT_I2S_DF_RIGHT			(0x1)			//RIGHT JUSTIFIED format
+#define	EXT_I2S_DF_LEFT				(0x2)			//LEFT JUSTIFIED  format
+#define EXT_I2S_DF_PCM				(0x3)			//PCM format
+
+//Power managment addition 1 (0x3A),0:Disable,1:Enable
+#define PWR_HI_R_LOAD_MONO			(0x1<<15)
+#define PWR_HI_R_LOAD_HP			(0x1<<14)	
+#define PWR_ZC_DET_PD				(0x1<<13)
+#define PWR_MAIN_I2S				(0x1<<11)	
+#define	PWR_MIC_BIAS1_DET			(0x1<<5)
+#define	PWR_MIC_BIAS2_DET			(0x1<<4)
+#define PWR_MIC_BIAS1				(0x1<<3)	
+#define PWR_MIC_BIAS2				(0x1<<2)	
+#define PWR_MAIN_BIAS				(0x1<<1)
+#define PWR_DAC_REF					(0x1)
+
+
+//Power managment addition 2(0x3C),0:Disable,1:Enable
+#define EN_THREMAL_SHUTDOWN			(0x1<<15)
+#define PWR_CLASS_AB				(0x1<<14)
+#define PWR_MIXER_VREF				(0x1<<13)
+#define PWR_PLL						(0x1<<12)
+#define PWR_VOICE_CLOCK				(0x1<<10)
+#define PWR_L_DAC_CLK				(0x1<<9)
+#define PWR_R_DAC_CLK				(0x1<<8)
+#define PWR_L_ADC_CLK_GAIN			(0x1<<7)
+#define PWR_R_ADC_CLK_GAIN			(0x1<<6)
+#define PWR_L_HP_MIXER				(0x1<<5)
+#define PWR_R_HP_MIXER				(0x1<<4)
+#define PWR_SPK_MIXER				(0x1<<3)
+#define PWR_MONO_MIXER				(0x1<<2)
+#define PWR_L_ADC_REC_MIXER			(0x1<<1)
+#define PWR_R_ADC_REC_MIXER			(0x1)
+
+
+//Power managment addition 3(0x3E),0:Disable,1:Enable
+#define PWR_MONO_VOL				(0x1<<14)
+#define PWR_SPK_LN_OUT				(0x1<<13)
+#define PWR_SPK_RN_OUT				(0x1<<12)
+#define PWR_HP_L_OUT				(0x1<<11)
+#define PWR_HP_R_OUT				(0x1<<10)
+#define PWR_SPK_L_OUT				(0x1<<9)
+#define PWR_SPK_R_OUT				(0x1<<8)
+#define PWR_LINE_IN_L				(0x1<<7)
+#define PWR_LINE_IN_R				(0x1<<6)
+#define PWR_PHONE_MIXER				(0x1<<5)
+#define PWR_PHONE_VOL				(0x1<<4)
+#define PWR_MIC1_VOL_CTRL			(0x1<<3)
+#define PWR_MIC2_VOL_CTRL			(0x1<<2)
+#define PWR_MIC1_BOOST				(0x1<<1)
+#define PWR_MIC2_BOOST				(0x1)
+
+//General Purpose Control Register 1(0x40)
+#define GP_CLK_FROM_PLL					(0x1<<15)	//Clock source from PLL output
+#define GP_CLK_FROM_MCLK				(0x0<<15)	//Clock source from MCLK output
+
+#define GP_HP_AMP_CTRL_MASK				(0x3<<8)
+#define GP_HP_AMP_CTRL_RATIO_100		(0x0<<8)		//1.00 Vdd
+#define GP_HP_AMP_CTRL_RATIO_125		(0x1<<8)		//1.25 Vdd
+#define GP_HP_AMP_CTRL_RATIO_150		(0x2<<8)		//1.50 Vdd
+
+#define GP_SPK_D_AMP_CTRL_MASK			(0x3<<6)
+#define GP_SPK_D_AMP_CTRL_RATIO_175		(0x0<<6)		//1.75 Vdd
+#define GP_SPK_D_AMP_CTRL_RATIO_150		(0x1<<6)		//1.50 Vdd	
+#define GP_SPK_D_AMP_CTRL_RATIO_125		(0x2<<6)		//1.25 Vdd
+#define GP_SPK_D_AMP_CTRL_RATIO_100		(0x3<<6)		//1.00 Vdd
+
+#define GP_SPK_AB_AMP_CTRL_MASK			(0x7<<3)
+#define GP_SPK_AB_AMP_CTRL_RATIO_225	(0x0<<3)		//2.25 Vdd
+#define GP_SPK_AB_AMP_CTRL_RATIO_200	(0x1<<3)		//2.00 Vdd
+#define GP_SPK_AB_AMP_CTRL_RATIO_175	(0x2<<3)		//1.75 Vdd
+#define GP_SPK_AB_AMP_CTRL_RATIO_150	(0x3<<3)		//1.50 Vdd
+#define GP_SPK_AB_AMP_CTRL_RATIO_125	(0x4<<3)		//1.25 Vdd	
+#define GP_SPK_AB_AMP_CTRL_RATIO_100	(0x5<<3)		//1.00 Vdd
+
+//General Purpose Control Register 2(0x42)
+#define GP2_VOICE_TO_DIG_PATH_EN		(0x1<<15)
+#define GP2_CLASS_AB_SEL_DIFF			(0x0<<13)		//Differential Mode of Class AB
+#define GP2_CLASS_D_SEL_SINGLE			(0x1<<13)		//Single End mode of Class AB
+#define GP2_PLL_PRE_DIV_1				(0x0<<0)		//PLL pre-Divider 1		
+#define GP2_PLL_PRE_DIV_2				(0x1<<0)		//PLL pre-Divider 2
+
+//PLL Control(0x44)
+#define PLL_M_CODE_MASK				0xF				//PLL M code mask
+#define PLL_K_CODE_MASK				(0x7<<4)		//PLL K code mask
+#define PLL_BYPASS_N				(0x1<<7)		//bypass PLL N code
+#define PLL_N_CODE_MASK				(0xFF<<8)		//PLL N code mask
+
+#define PLL_CTRL_M_VAL(m)		((m)&0xf)
+#define PLL_CTRL_K_VAL(k)		(((k)&0x7)<<4)
+#define PLL_CTRL_N_VAL(n)		(((n)&0xff)<<8)
+
+
+//GPIO Pin Configuration(0x4C)
+#define GPIO_1						(0x1<<1)
+#define	GPIO_2						(0x1<<2)
+#define	GPIO_3						(0x1<<3)
+#define GPIO_4						(0x1<<4)
+#define GPIO_5						(0x1<<5)
+
+
+////INTERRUPT CONTROL(0x5E)
+#define DISABLE_FAST_VREG			(0x1<<15)
+
+#define AVC_TARTGET_SEL_MASK		(0x3<<12)
+#define	AVC_TARTGET_SEL_NONE		(0x0<<12)
+#define	AVC_TARTGET_SEL_R 			(0x1<<12)
+#define	AVC_TARTGET_SEL_L			(0x2<<12)
+#define	AVC_TARTGET_SEL_BOTH		(0x3<<12)
+
+
+
+
+//Voice DAC PCM Clock Control 1(0x64)
+#define VOICE_MCLK_SEL_MASK			(0x1<<15)
+#define VOICE_MCLK_SEL_MCLK_INPUT	(0x0<<15)
+#define VOICE_MCLK_SEL_PLL_OUTPUT	(0x1<<15)
+
+#define VOICE_SYSCLK_SEL_MASK		(0x1<<14)
+#define VOICE_SYSCLK_SEL_MCLK		(0x0<<14)
+#define VOICE_SYSCLK_SEL_EXTCLK		(0x1<<14)
+
+#define VOICE_WCLK_DIV_MASK			(0x1<<13)
+#define VOICE_WCLK_DIV_32			(0x0<<13)
+#define VOICE_WCLK_DIV_64			(0x1<<13)
+
+#define VOICE_EXTCLK_OUT_DIV_MASK   (0x7<<8)
+#define VOICE_EXTCLK_OUT_DIV_1		(0x0<<8)
+#define VOICE_EXTCLK_OUT_DIV_2   	(0x1<<8)
+#define VOICE_EXTCLK_OUT_DIV_4   	(0x2<<8)
+#define VOICE_EXTCLK_OUT_DIV_8   	(0x3<<8)
+#define VOICE_EXTCLK_OUT_DIV_16   	(0x4<<8)
+
+#define VOICE_SCLK_DIV1_MASK		(0xF<<4)
+#define VOICE_SCLK_DIV1_1			(0x0<<4)
+#define VOICE_SCLK_DIV1_2			(0x1<<4)
+#define VOICE_SCLK_DIV1_3			(0x2<<4)
+#define VOICE_SCLK_DIV1_4			(0x3<<4)
+#define VOICE_SCLK_DIV1_5			(0x4<<4)
+#define VOICE_SCLK_DIV1_6			(0x5<<4)
+#define VOICE_SCLK_DIV1_7			(0x6<<4)
+#define VOICE_SCLK_DIV1_8			(0x7<<4)
+#define VOICE_SCLK_DIV1_9			(0x8<<4)
+#define VOICE_SCLK_DIV1_10			(0x9<<4)
+#define VOICE_SCLK_DIV1_11			(0xA<<4)
+#define VOICE_SCLK_DIV1_12			(0xB<<4)
+#define VOICE_SCLK_DIV1_13			(0xC<<4)
+#define VOICE_SCLK_DIV1_14			(0xD<<4)
+#define VOICE_SCLK_DIV1_15			(0xE<<4)
+#define VOICE_SCLK_DIV1_16			(0xF<<4)
+
+#define VOICE_SCLK_DIV2_MASK		(0x7)
+#define VOICE_SCLK_DIV2_2			(0x0)
+#define VOICE_SCLK_DIV2_4			(0x1)
+#define VOICE_SCLK_DIV2_8			(0x2)
+#define VOICE_SCLK_DIV2_16			(0x3)
+#define VOICE_SCLK_DIV2_32			(0x4)
+
+//Voice DAC PCM Clock Control 2(0x66)
+#define VOICE_CLK_FILTER_SLAVE_DIV_MASK (0x1<<15)
+#define VOICE_CLK_FILTER_SLAVE_DIV_1 	(0x0<<15)
+#define VOICE_CLK_FILTER_SLAVE_DIV_2	(0x1<<15)	
+
+#define VOICE_FILTER_CLK_F_MASK		(0x1<<14)
+#define VOICE_FILTER_CLK_F_MCLK		(0x0<<14)
+#define VOICE_FILTER_CLK_F_VBCLK	(0X1<<14)
+
+#define VOICE_AD_DA_FILTER_SEL_MASK  (0x1<<13)
+#define VOICE_AD_DA_FILTER_SEL_128X	(0x0<<13)
+#define VOICE_AD_DA_FILTER_SEL_64X	(0x1<<13)
+
+#define VOICE_CLK_FILTER_DIV1_MASK	(0xF<<4)
+#define VOICE_CLK_FILTER_DIV1_1		(0x0<<4)
+#define VOICE_CLK_FILTER_DIV1_2		(0x1<<4)
+#define VOICE_CLK_FILTER_DIV1_3		(0x2<<4)
+#define VOICE_CLK_FILTER_DIV1_4		(0x3<<4)
+#define VOICE_CLK_FILTER_DIV1_5		(0x4<<4)
+#define VOICE_CLK_FILTER_DIV1_6		(0x5<<4)
+#define VOICE_CLK_FILTER_DIV1_7		(0x6<<4)
+#define VOICE_CLK_FILTER_DIV1_8		(0x7<<4)
+#define VOICE_CLK_FILTER_DIV1_9		(0x8<<4)
+#define VOICE_CLK_FILTER_DIV1_10	(0x9<<4)
+#define VOICE_CLK_FILTER_DIV1_11	(0xA<<4)
+#define VOICE_CLK_FILTER_DIV1_12	(0xB<<4)
+#define VOICE_CLK_FILTER_DIV1_13	(0xC<<4)
+#define VOICE_CLK_FILTER_DIV1_14	(0xD<<4)
+#define VOICE_CLK_FILTER_DIV1_15	(0xE<<4)
+#define VOICE_CLK_FILTER_DIV1_16	(0xF<<4)
+
+#define VOICE_CLK_FILTER_DIV2_MASK	(0x7)
+#define VOICE_CLK_FILTER_DIV2_2		(0x0)
+#define VOICE_CLK_FILTER_DIV2_4		(0x1)
+#define VOICE_CLK_FILTER_DIV2_8		(0x2)
+#define VOICE_CLK_FILTER_DIV2_16	(0x3)
+#define VOICE_CLK_FILTER_DIV2_32	(0x4)
+
+
+//Psedueo Stereo & Spatial Effect Block Control(0x68)
+#define SPATIAL_CTRL_EN				(0x1<<15)
+#define ALL_PASS_FILTER_EN			(0x1<<14)
+#define PSEUDO_STEREO_EN			(0x1<<13)
+#define STEREO_EXPENSION_EN			(0x1<<12)
+
+#define SPATIAL_GAIN_MASK			(0x3<<6)
+#define SPATIAL_GAIN_1_0			(0x0<<6)
+#define SPATIAL_GAIN_1_5			(0x1<<6)
+#define SPATIAL_GAIN_2_0			(0x2<<6)
+
+#define SPATIAL_RATIO_MASK			(0x3<<4)
+#define SPATIAL_RATIO_0_0			(0x0<<4)
+#define SPATIAL_RATIO_0_66			(0x1<<4)
+#define SPATIAL_RATIO_1_0			(0x2<<4)
+
+#define APF_MASK					(0x3)
+#define APF_FOR_48K					(0x3)
+#define APF_FOR_44_1K				(0x2)
+#define APF_FOR_32K					(0x1)
+
+
+
+struct rt5610_setup_data {
+	unsigned short i2c_address;
+	unsigned short i2c_bus;
+};
+
+
+#define RT5610_PLL_FR_MCLK			0
+
+
+extern struct snd_soc_dai rt5610_dai[2];	
+extern struct snd_soc_codec_device soc_codec_dev_rt5610;
+extern int rt5610_reset(struct snd_soc_codec *codec, int try_warm);
+#endif
--- linux-mvl-dove-2.6.32.orig/sound/soc/codecs/wm8580.c
+++ linux-mvl-dove-2.6.32/sound/soc/codecs/wm8580.c
@@ -268,9 +268,9 @@
 SOC_DOUBLE("DAC3 Invert Switch", WM8580_DAC_CONTROL4,  4, 5, 1, 0),
 
 SOC_SINGLE("DAC ZC Switch", WM8580_DAC_CONTROL5, 5, 1, 0),
-SOC_SINGLE("DAC1 Switch", WM8580_DAC_CONTROL5, 0, 1, 0),
-SOC_SINGLE("DAC2 Switch", WM8580_DAC_CONTROL5, 1, 1, 0),
-SOC_SINGLE("DAC3 Switch", WM8580_DAC_CONTROL5, 2, 1, 0),
+SOC_SINGLE("DAC1 Switch", WM8580_DAC_CONTROL5, 0, 1, 1),
+SOC_SINGLE("DAC2 Switch", WM8580_DAC_CONTROL5, 1, 1, 1),
+SOC_SINGLE("DAC3 Switch", WM8580_DAC_CONTROL5, 2, 1, 1),
 
 SOC_DOUBLE("ADC Mute Switch", WM8580_ADC_CONTROL1, 0, 1, 1, 0),
 SOC_SINGLE("ADC High-Pass Filter Switch", WM8580_ADC_CONTROL1, 4, 1, 0),
--- linux-mvl-dove-2.6.32.orig/sound/soc/codecs/ad1980.c
+++ linux-mvl-dove-2.6.32/sound/soc/codecs/ad1980.c
@@ -24,6 +24,9 @@
 
 #include "ad1980.h"
 
+#define CODEC_TYPE_AD1888	1
+#define CODEC_TYPE_AD1980	2
+
 static unsigned int ac97_read(struct snd_soc_codec *codec,
 	unsigned int reg);
 static int ac97_write(struct snd_soc_codec *codec,
@@ -82,8 +85,12 @@
 SOC_SINGLE("Stereo Mic Switch", AC97_AD_MISC, 6, 1, 0),
 SOC_DOUBLE("Line HP Swap Switch", AC97_AD_MISC, 10, 5, 1, 0),
 
-SOC_DOUBLE("Surround Playback Volume", AC97_SURROUND_MASTER, 8, 0, 31, 1),
-SOC_DOUBLE("Surround Playback Switch", AC97_SURROUND_MASTER, 15, 7, 1, 1),
+SOC_SINGLE("Stereo Spread Switch", AC97_AD_MISC, 7, 1, 0),
+
+SOC_DOUBLE("Surround/Headphone Playback Volume", AC97_SURROUND_MASTER,
+		8, 0, 31, 1),
+SOC_DOUBLE("Surround/Headphone Playback Switch", AC97_SURROUND_MASTER,
+		15, 7, 1, 1),
 
 SOC_DOUBLE("Center/LFE Playback Volume", AC97_CENTER_LFE_MASTER, 8, 0, 31, 1),
 SOC_DOUBLE("Center/LFE Playback Switch", AC97_CENTER_LFE_MASTER, 15, 7, 1, 1),
@@ -128,7 +135,8 @@
 
 	return 0;
 }
-
+static struct snd_soc_dai_ops ad1980_dai_ops = {
+};
 struct snd_soc_dai ad1980_dai = {
 	.name = "AC97",
 	.ac97_control = 1,
@@ -144,10 +152,11 @@
 		.channels_max = 2,
 		.rates = SNDRV_PCM_RATE_48000,
 		.formats = SND_SOC_STD_AC97_FMTS, },
+	.ops = &ad1980_dai_ops,
 };
 EXPORT_SYMBOL_GPL(ad1980_dai);
 
-static int ad1980_reset(struct snd_soc_codec *codec, int try_warm)
+static int ad1980_reset(struct snd_soc_codec *codec, int try_warm, int type)
 {
 	u16 retry_cnt = 0;
 
@@ -162,7 +171,10 @@
 	/* Set bit 16slot in register 74h, then every slot will has only 16
 	 * bits. This command is sent out in 20bit mode, in which case the
 	 * first nibble of data is eaten by the addr. (Tag is always 16 bit)*/
-	ac97_write(codec, AC97_AD_SERIAL_CFG, 0x9900);
+	if (type == CODEC_TYPE_AD1888)
+		ac97_write(codec, AC97_AD_SERIAL_CFG, 0x1000);
+	else
+		ac97_write(codec, AC97_AD_SERIAL_CFG, 0x9900);
 
 	if (ac97_read(codec, AC97_RESET)  != 0x0090)
 		goto err;
@@ -176,7 +188,30 @@
 	return -EIO;
 }
 
-static int ad1980_soc_probe(struct platform_device *pdev)
+static int ad1980_soc_suspend(struct platform_device *pdev,
+	pm_message_t state)
+{
+	return 0;
+}
+
+static int ad1980_soc_resume(struct platform_device *pdev)
+{
+	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
+	struct snd_soc_codec *codec = socdev->card->codec;
+	u16 *cache = codec->reg_cache;
+	int ret, i;
+
+	ret = ad1980_reset(codec, 0, CODEC_TYPE_AD1888);
+	if (ret < 0)
+		printk(KERN_ERR "Failed to reset AD1980: AC97 link error\n");
+
+	for (i = 2; i < ARRAY_SIZE(ad1980_reg) << 1; i += 2)
+		soc_ac97_ops.write(codec->ac97, i, cache[i >> 1]);
+
+	return 0;
+}
+
+static int internal_soc_probe(struct platform_device *pdev, int type)
 {
 	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
 	struct snd_soc_codec *codec;
@@ -223,7 +258,7 @@
 		goto pcm_err;
 
 
-	ret = ad1980_reset(codec, 0);
+	ret = ad1980_reset(codec, 0, type);
 	if (ret < 0) {
 		printk(KERN_ERR "Failed to reset AD1980: AC97 link error\n");
 		goto reset_err;
@@ -235,7 +270,7 @@
 
 	vendor_id2 = ac97_read(codec, AC97_VENDOR_ID2);
 
-	if (vendor_id2 != 0x5370) {
+	if ((vendor_id2 != 0x5370) && (vendor_id2 != 0x5368)) {
 		if (vendor_id2 != 0x5374)
 			goto reset_err;
 		else
@@ -280,6 +315,16 @@
 	return ret;
 }
 
+static int ad1980_soc_probe(struct platform_device *pdev)
+{
+	return internal_soc_probe(pdev, CODEC_TYPE_AD1980);
+}
+
+static int ad1888_soc_probe(struct platform_device *pdev)
+{
+	return internal_soc_probe(pdev, CODEC_TYPE_AD1888);
+}
+
 static int ad1980_soc_remove(struct platform_device *pdev)
 {
 	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
@@ -302,6 +347,15 @@
 };
 EXPORT_SYMBOL_GPL(soc_codec_dev_ad1980);
 
+struct snd_soc_codec_device soc_codec_dev_ad1888 = {
+	.probe = 	ad1888_soc_probe,
+	.remove = 	ad1980_soc_remove,
+	.suspend =	ad1980_soc_suspend,
+	.resume =	ad1980_soc_resume,
+};
+EXPORT_SYMBOL_GPL(soc_codec_dev_ad1888);
+
+
 MODULE_DESCRIPTION("ASoC ad1980 driver");
 MODULE_AUTHOR("Roy Huang, Cliff Cai");
 MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/sound/soc/codecs/ak4104.c
+++ linux-mvl-dove-2.6.32/sound/soc/codecs/ak4104.c
@@ -90,12 +90,10 @@
 	if (reg >= codec->reg_cache_size)
 		return -EINVAL;
 
-	reg &= AK4104_REG_MASK;
-	reg |= AK4104_WRITE;
-
 	/* only write to the hardware if value has changed */
 	if (cache[reg] != value) {
-		u8 tmp[2] = { reg, value };
+		u8 tmp[2] = { (reg & AK4104_REG_MASK) | AK4104_WRITE, value };
+
 		if (spi_write(spi, tmp, sizeof(tmp))) {
 			dev_err(&spi->dev, "SPI write failed\n");
 			return -EIO;
--- linux-mvl-dove-2.6.32.orig/sound/soc/blackfin/bf5xx-ac97.c
+++ linux-mvl-dove-2.6.32/sound/soc/blackfin/bf5xx-ac97.c
@@ -260,9 +260,9 @@
 	pr_debug("%s : sport %d\n", __func__, dai->id);
 	if (!dai->active)
 		return 0;
-	if (dai->capture.active)
+	if (dai->capture_active)
 		sport_rx_stop(sport);
-	if (dai->playback.active)
+	if (dai->playback_active)
 		sport_tx_stop(sport);
 	return 0;
 }
--- linux-mvl-dove-2.6.32.orig/sound/soc/blackfin/bf5xx-i2s-pcm.c
+++ linux-mvl-dove-2.6.32/sound/soc/blackfin/bf5xx-i2s-pcm.c
@@ -139,11 +139,20 @@
 	pr_debug("%s enter\n", __func__);
 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
 		diff = sport_curr_offset_tx(sport);
-		frames = bytes_to_frames(substream->runtime, diff);
 	} else {
 		diff = sport_curr_offset_rx(sport);
-		frames = bytes_to_frames(substream->runtime, diff);
 	}
+
+	/*
+	 * TX at least can report one frame beyond the end of the
+	 * buffer if we hit the wraparound case - clamp to within the
+	 * buffer as the ALSA APIs require.
+	 */
+	if (diff == snd_pcm_lib_buffer_bytes(substream))
+		diff = 0;
+
+	frames = bytes_to_frames(substream->runtime, diff);
+
 	return frames;
 }
 
--- linux-mvl-dove-2.6.32.orig/sound/soc/pxa/Kconfig
+++ linux-mvl-dove-2.6.32/sound/soc/pxa/Kconfig
@@ -18,6 +18,10 @@
 	select SND_PXA2XX_LIB_AC97
 	select SND_SOC_AC97_BUS
 
+config SND_PXA2XX_SOC_AC97_SURROUND
+	tristate
+	select SND_PXA2XX_SOC_AC97
+
 config SND_PXA2XX_SOC_I2S
 	tristate
 
--- linux-mvl-dove-2.6.32.orig/sound/soc/pxa/pxa2xx-ac97.h
+++ linux-mvl-dove-2.6.32/sound/soc/pxa/pxa2xx-ac97.h
@@ -14,7 +14,11 @@
 #define PXA2XX_DAI_AC97_AUX		1
 #define PXA2XX_DAI_AC97_MIC		2
 
+#define PXA3XX_DAI_AC97_SURROUND	0
+#define PXA3XX_DAI_AC97_LFE		1
+
 extern struct snd_soc_dai pxa_ac97_dai[3];
+extern struct snd_soc_dai pxa_ac97_surround_dai[2];
 
 /* platform data */
 extern struct snd_ac97_bus_ops pxa2xx_ac97_ops;
--- linux-mvl-dove-2.6.32.orig/sound/soc/pxa/Makefile
+++ linux-mvl-dove-2.6.32/sound/soc/pxa/Makefile
@@ -1,11 +1,13 @@
 # PXA Platform Support
 snd-soc-pxa2xx-objs := pxa2xx-pcm.o
 snd-soc-pxa2xx-ac97-objs := pxa2xx-ac97.o
+snd-soc-pxa2xx-ac97-surround-objs := pxa3xx-ac97-surround.o
 snd-soc-pxa2xx-i2s-objs := pxa2xx-i2s.o
 snd-soc-pxa-ssp-objs := pxa-ssp.o
 
 obj-$(CONFIG_SND_PXA2XX_SOC) += snd-soc-pxa2xx.o
 obj-$(CONFIG_SND_PXA2XX_SOC_AC97) += snd-soc-pxa2xx-ac97.o
+obj-$(CONFIG_SND_PXA2XX_SOC_AC97_SURROUND) += snd-soc-pxa2xx-ac97-surround.o
 obj-$(CONFIG_SND_PXA2XX_SOC_I2S) += snd-soc-pxa2xx-i2s.o
 obj-$(CONFIG_SND_PXA_SOC_SSP) += snd-soc-pxa-ssp.o
 
--- linux-mvl-dove-2.6.32.orig/sound/soc/pxa/pxa2xx-ac97.c
+++ linux-mvl-dove-2.6.32/sound/soc/pxa/pxa2xx-ac97.c
@@ -20,8 +20,12 @@
 #include <sound/pxa2xx-lib.h>
 
 #include <mach/hardware.h>
+#include <mach/pxa-regs.h>
 #include <mach/regs-ac97.h>
+#ifndef CONFIG_ARCH_DOVE
 #include <mach/dma.h>
+#endif
+
 #include <mach/audio.h>
 
 #include "pxa2xx-pcm.h"
@@ -193,7 +197,7 @@
 	.playback = {
 		.stream_name = "AC97 Playback",
 		.channels_min = 2,
-		.channels_max = 2,
+		.channels_max = 6,
 		.rates = PXA2XX_AC97_RATES,
 		.formats = SNDRV_PCM_FMTBIT_S16_LE,},
 	.capture = {
--- linux-mvl-dove-2.6.32.orig/sound/soc/pxa/pxa3xx-ac97-surround.c
+++ linux-mvl-dove-2.6.32/sound/soc/pxa/pxa3xx-ac97-surround.c
@@ -0,0 +1,154 @@
+/*
+ * linux/sound/pxa3xx-ac97-Surround.c -- AC97 surround support for the
+ * Marvell PXA3xx chip.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/interrupt.h>
+#include <linux/wait.h>
+#include <linux/clk.h>
+#include <linux/delay.h>
+
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/ac97_codec.h>
+#include <sound/initval.h>
+#include <sound/soc.h>
+
+#include <asm/irq.h>
+#include <linux/mutex.h>
+#include <mach/hardware.h>
+#include <mach/pxa-regs.h>
+#include <mach/pxa2xx-gpio.h>
+#include <sound/pxa2xx-lib.h>
+#include "pxa2xx-pcm.h"
+#include "pxa2xx-ac97.h"
+#include <asm/mach-types.h>
+
+static struct pxa2xx_pcm_dma_params pxa2xx_ac97_pcm_surround_out = {
+	.name			= "AC97 PCM Surround out",
+	.dev_addr		= __PREG(PCSDR),
+	.drcmr			= &DRCMR95,
+	.dcmd			= DCMD_INCSRCADDR | DCMD_FLOWTRG |
+				  DCMD_BURST32 | DCMD_WIDTH4,
+};
+
+
+static struct pxa2xx_pcm_dma_params pxa2xx_ac97_pcm_lfe_out = {
+	.name			= "AC97 PCM LFE out",
+	.dev_addr		= __PREG(PCCLDR),
+	.drcmr			= &DRCMR96,
+	.dcmd			= DCMD_INCSRCADDR | DCMD_FLOWTRG |
+				  DCMD_BURST32 | DCMD_WIDTH4,
+};
+
+static int pxa3xx_ac97_surround_probe(struct platform_device *pdev,
+		struct snd_soc_dai *dai)
+{
+	return 0;
+}
+
+static void pxa3xx_ac97_surround_remove(struct platform_device *pdev,
+		struct snd_soc_dai *dai)
+{
+}
+
+static int pxa2xx_ac97_hw_surround_params(struct snd_pcm_substream *substream,
+		struct snd_pcm_hw_params *params,
+		struct snd_soc_dai *dai)
+{
+	struct snd_soc_pcm_runtime *rtd = substream->private_data;
+	struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
+
+	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+		cpu_dai->dma_data = &pxa2xx_ac97_pcm_surround_out;
+
+	return 0;
+}
+
+static int pxa2xx_ac97_hw_lfe_params(struct snd_pcm_substream *substream,
+		struct snd_pcm_hw_params *params,
+		struct snd_soc_dai *dai)
+{
+	struct snd_soc_pcm_runtime *rtd = substream->private_data;
+	struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
+
+	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+		cpu_dai->dma_data = &pxa2xx_ac97_pcm_lfe_out;
+
+	return 0;
+}
+
+#define PXA2XX_AC97_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
+		SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | \
+		SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
+
+static struct snd_soc_dai_ops pxa2xx_ac97_surround_ops = {
+	.hw_params	= pxa2xx_ac97_hw_surround_params,
+};
+
+static struct snd_soc_dai_ops pxa2xx_ac97_lfe_ops = {
+	.hw_params	= pxa2xx_ac97_hw_lfe_params,
+};
+
+/*
+ * There is only 1 physical AC97 interface for pxa2xx, but it
+ * has extra fifo's that can be used for aux DACs and ADCs.
+ */
+struct snd_soc_dai pxa_ac97_surround_dai[] = {
+{
+	.name = "pxa2xx-surround-ac97",
+	.id = 0,
+	.ac97_control = 1,
+	.probe = pxa3xx_ac97_surround_probe,
+	.remove = pxa3xx_ac97_surround_remove,
+	.playback = {
+		.stream_name = "AC97 Surround Playback",
+		.channels_min = 2,
+		.channels_max = 2,
+		.rates = PXA2XX_AC97_RATES,
+		.formats = SNDRV_PCM_FMTBIT_S16_LE,},
+	.ops = &pxa2xx_ac97_surround_ops,
+},
+{
+	.name = "pxa2xx-lfe-ac97",
+	.id = 1,
+	.ac97_control = 1,
+	.playback = {
+		.stream_name = "AC97 LFE Playback",
+		.channels_min = 2,
+		.channels_max = 2,
+		.rates = PXA2XX_AC97_RATES,
+		.formats = SNDRV_PCM_FMTBIT_S16_LE,},
+	.ops = &pxa2xx_ac97_lfe_ops,
+},
+};
+EXPORT_SYMBOL_GPL(pxa_ac97_surround_dai);
+
+static int __init pxa_ac97_surround_init(void)
+{
+	if (machine_is_dove_rd_avng())
+		return -ENODEV;
+	return snd_soc_register_dais(pxa_ac97_surround_dai,
+			ARRAY_SIZE(pxa_ac97_surround_dai));
+}
+module_init(pxa_ac97_surround_init);
+
+static void __exit pxa_ac97_surround_exit(void)
+{
+	snd_soc_unregister_dais(pxa_ac97_surround_dai,
+			ARRAY_SIZE(pxa_ac97_surround_dai));
+}
+module_exit(pxa_ac97_surround_exit);
+
+
+MODULE_AUTHOR("Shadi Ammouri");
+MODULE_DESCRIPTION("AC97 surround driver for the Intel PXA3xx chip");
+MODULE_LICENSE("GPL");
+
--- linux-mvl-dove-2.6.32.orig/sound/core/rawmidi.c
+++ linux-mvl-dove-2.6.32/sound/core/rawmidi.c
@@ -530,13 +530,15 @@
 {
 	struct snd_rawmidi_file *rfile;
 	struct snd_rawmidi *rmidi;
+	struct module *module;
 
 	rfile = file->private_data;
 	rmidi = rfile->rmidi;
 	rawmidi_release_priv(rfile);
 	kfree(rfile);
+	module = rmidi->card->module;
 	snd_card_file_remove(rmidi->card, file);
-	module_put(rmidi->card->module);
+	module_put(module);
 	return 0;
 }
 
--- linux-mvl-dove-2.6.32.orig/sound/core/init.c
+++ linux-mvl-dove-2.6.32/sound/core/init.c
@@ -848,6 +848,7 @@
 		return -ENOMEM;
 	mfile->file = file;
 	mfile->disconnected_f_op = NULL;
+	INIT_LIST_HEAD(&mfile->shutdown_list);
 	spin_lock(&card->files_lock);
 	if (card->shutdown) {
 		spin_unlock(&card->files_lock);
@@ -883,6 +884,9 @@
 	list_for_each_entry(mfile, &card->files_list, list) {
 		if (mfile->file == file) {
 			list_del(&mfile->list);
+			spin_lock(&shutdown_lock);
+			list_del(&mfile->shutdown_list);
+			spin_unlock(&shutdown_lock);
 			if (mfile->disconnected_f_op)
 				fops_put(mfile->disconnected_f_op);
 			found = mfile;
--- linux-mvl-dove-2.6.32.orig/sound/core/control.c
+++ linux-mvl-dove-2.6.32/sound/core/control.c
@@ -31,6 +31,7 @@
 
 /* max number of user-defined controls */
 #define MAX_USER_CONTROLS	32
+#define MAX_CONTROL_COUNT	1028
 
 struct snd_kctl_ioctl {
 	struct list_head list;		/* list of all ioctls */
@@ -190,6 +191,10 @@
 	
 	if (snd_BUG_ON(!control || !control->count))
 		return NULL;
+
+	if (control->count > MAX_CONTROL_COUNT)
+		return NULL;
+
 	kctl = kzalloc(sizeof(*kctl) + sizeof(struct snd_kcontrol_volatile) * control->count, GFP_KERNEL);
 	if (kctl == NULL) {
 		snd_printk(KERN_ERR "Cannot allocate control instance\n");
--- linux-mvl-dove-2.6.32.orig/sound/core/hrtimer.c
+++ linux-mvl-dove-2.6.32/sound/core/hrtimer.c
@@ -37,14 +37,23 @@
 struct snd_hrtimer {
 	struct snd_timer *timer;
 	struct hrtimer hrt;
+	atomic_t running;
 };
 
 static enum hrtimer_restart snd_hrtimer_callback(struct hrtimer *hrt)
 {
 	struct snd_hrtimer *stime = container_of(hrt, struct snd_hrtimer, hrt);
 	struct snd_timer *t = stime->timer;
-	hrtimer_forward_now(hrt, ns_to_ktime(t->sticks * resolution));
-	snd_timer_interrupt(stime->timer, t->sticks);
+	unsigned long oruns;
+
+	if (!atomic_read(&stime->running))
+		return HRTIMER_NORESTART;
+
+	oruns = hrtimer_forward_now(hrt, ns_to_ktime(t->sticks * resolution));
+	snd_timer_interrupt(stime->timer, t->sticks * oruns);
+
+	if (!atomic_read(&stime->running))
+		return HRTIMER_NORESTART;
 	return HRTIMER_RESTART;
 }
 
@@ -58,6 +67,7 @@
 	hrtimer_init(&stime->hrt, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
 	stime->timer = t;
 	stime->hrt.function = snd_hrtimer_callback;
+	atomic_set(&stime->running, 0);
 	t->private_data = stime;
 	return 0;
 }
@@ -78,16 +88,18 @@
 {
 	struct snd_hrtimer *stime = t->private_data;
 
+	atomic_set(&stime->running, 0);
+	hrtimer_cancel(&stime->hrt);
 	hrtimer_start(&stime->hrt, ns_to_ktime(t->sticks * resolution),
 		      HRTIMER_MODE_REL);
+	atomic_set(&stime->running, 1);
 	return 0;
 }
 
 static int snd_hrtimer_stop(struct snd_timer *t)
 {
 	struct snd_hrtimer *stime = t->private_data;
-
-	hrtimer_cancel(&stime->hrt);
+	atomic_set(&stime->running, 0);
 	return 0;
 }
 
--- linux-mvl-dove-2.6.32.orig/sound/core/pcm_compat.c
+++ linux-mvl-dove-2.6.32/sound/core/pcm_compat.c
@@ -341,7 +341,7 @@
 			kfree(bufs);
 			return -EFAULT;
 		}
-		bufs[ch] = compat_ptr(ptr);
+		bufs[i] = compat_ptr(ptr);
 		bufptr++;
 	}
 	if (dir == SNDRV_PCM_STREAM_PLAYBACK)
--- linux-mvl-dove-2.6.32.orig/sound/core/pcm_native.c
+++ linux-mvl-dove-2.6.32/sound/core/pcm_native.c
@@ -314,10 +314,10 @@
 	if (!params->info)
 		params->info = hw->info & ~SNDRV_PCM_INFO_FIFO_IN_FRAMES;
 	if (!params->fifo_size) {
-		if (snd_mask_min(&params->masks[SNDRV_PCM_HW_PARAM_FORMAT]) ==
-		    snd_mask_max(&params->masks[SNDRV_PCM_HW_PARAM_FORMAT]) &&
-                    snd_mask_min(&params->masks[SNDRV_PCM_HW_PARAM_CHANNELS]) ==
-                    snd_mask_max(&params->masks[SNDRV_PCM_HW_PARAM_CHANNELS])) {
+		m = hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT);
+		i = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
+		if (snd_mask_min(m) == snd_mask_max(m) &&
+                    snd_interval_min(i) == snd_interval_max(i)) {
 			changed = substream->ops->ioctl(substream,
 					SNDRV_PCM_IOCTL1_FIFO_SIZE, params);
 			if (changed < 0)
@@ -972,6 +972,10 @@
 {
 	if (substream->runtime->trigger_master != substream)
 		return 0;
+	/* some drivers might use hw_ptr to recover from the pause -
+	   update the hw_ptr now */
+	if (push)
+		snd_pcm_update_hw_ptr(substream);
 	/* The jiffies check in snd_pcm_update_hw_ptr*() is done by
 	 * a delta betwen the current jiffies, this gives a large enough
 	 * delta, effectively to skip the check once.
--- linux-mvl-dove-2.6.32.orig/sound/core/seq/oss/seq_oss_init.c
+++ linux-mvl-dove-2.6.32/sound/core/seq/oss/seq_oss_init.c
@@ -280,13 +280,10 @@
 	return 0;
 
  _error:
-	snd_seq_oss_writeq_delete(dp->writeq);
-	snd_seq_oss_readq_delete(dp->readq);
 	snd_seq_oss_synth_cleanup(dp);
 	snd_seq_oss_midi_cleanup(dp);
-	delete_port(dp);
 	delete_seq_queue(dp->queue);
-	kfree(dp);
+	delete_port(dp);
 
 	return rc;
 }
@@ -349,8 +346,10 @@
 static int
 delete_port(struct seq_oss_devinfo *dp)
 {
-	if (dp->port < 0)
+	if (dp->port < 0) {
+		kfree(dp);
 		return 0;
+	}
 
 	debug_printk(("delete_port %i\n", dp->port));
 	return snd_seq_event_port_detach(dp->cseq, dp->port);
--- linux-mvl-dove-2.6.32.orig/sound/oss/sb_mixer.c
+++ linux-mvl-dove-2.6.32/sound/oss/sb_mixer.c
@@ -230,7 +230,7 @@
 	return 1;
 }
 
-static void change_bits(sb_devc * devc, unsigned char *regval, int dev, int chn, int newval)
+static void __change_bits(sb_devc * devc, unsigned char *regval, int dev, int chn, int newval)
 {
 	unsigned char mask;
 	int shift;
@@ -282,7 +282,7 @@
 		return -EINVAL;
 
 	val = sb_getmixer(devc, regoffs);
-	change_bits(devc, &val, dev, LEFT_CHN, left);
+	__change_bits(devc, &val, dev, LEFT_CHN, left);
 
 	if ((*devc->iomap)[dev][RIGHT_CHN].regno != regoffs)	/*
 								 * Change register
@@ -302,7 +302,7 @@
 							 * Read the new one
 							 */
 	}
-	change_bits(devc, &val, dev, RIGHT_CHN, right);
+	__change_bits(devc, &val, dev, RIGHT_CHN, right);
 
 	sb_setmixer(devc, regoffs, val);
 
--- linux-mvl-dove-2.6.32.orig/sound/oss/sequencer.c
+++ linux-mvl-dove-2.6.32/sound/oss/sequencer.c
@@ -241,7 +241,7 @@
 				return -ENXIO;
 
 			fmt = (*(short *) &event_rec[0]) & 0xffff;
-			err = synth_devs[dev]->load_patch(dev, fmt, buf, p + 4, c, 0);
+			err = synth_devs[dev]->load_patch(dev, fmt, buf + p, c, 0);
 			if (err < 0)
 				return err;
 
--- linux-mvl-dove-2.6.32.orig/sound/oss/midi_synth.h
+++ linux-mvl-dove-2.6.32/sound/oss/midi_synth.h
@@ -8,7 +8,7 @@
 void midi_synth_close (int dev);
 void midi_synth_hw_control (int dev, unsigned char *event);
 int midi_synth_load_patch (int dev, int format, const char __user * addr,
-		 int offs, int count, int pmgr_flag);
+		 int count, int pmgr_flag);
 void midi_synth_panning (int dev, int channel, int pressure);
 void midi_synth_aftertouch (int dev, int channel, int pressure);
 void midi_synth_controller (int dev, int channel, int ctrl_num, int value);
--- linux-mvl-dove-2.6.32.orig/sound/oss/ad1848.c
+++ linux-mvl-dove-2.6.32/sound/oss/ad1848.c
@@ -457,7 +457,7 @@
 	return mask;
 }
 
-static void change_bits(ad1848_info * devc, unsigned char *regval,
+static void __change_bits(ad1848_info * devc, unsigned char *regval,
 			unsigned char *muteval, int dev, int chn, int newval)
 {
 	unsigned char mask;
@@ -515,10 +515,10 @@
 
 	if (muteregoffs != regoffs) {
 		muteval = ad_read(devc, muteregoffs);
-		change_bits(devc, &val, &muteval, dev, channel, value);
+		__change_bits(devc, &val, &muteval, dev, channel, value);
 	}
 	else
-		change_bits(devc, &val, &val, dev, channel, value);
+		__change_bits(devc, &val, &val, dev, channel, value);
 
 	spin_lock_irqsave(&devc->lock,flags);
 	ad_write(devc, regoffs, val);
--- linux-mvl-dove-2.6.32.orig/sound/oss/dev_table.h
+++ linux-mvl-dove-2.6.32/sound/oss/dev_table.h
@@ -271,7 +271,7 @@
 	void (*reset) (int dev);
 	void (*hw_control) (int dev, unsigned char *event);
 	int (*load_patch) (int dev, int format, const char __user *addr,
-	     int offs, int count, int pmgr_flag);
+	     int count, int pmgr_flag);
 	void (*aftertouch) (int dev, int voice, int pressure);
 	void (*controller) (int dev, int voice, int ctrl_num, int value);
 	void (*panning) (int dev, int voice, int value);
--- linux-mvl-dove-2.6.32.orig/sound/oss/soundcard.c
+++ linux-mvl-dove-2.6.32/sound/oss/soundcard.c
@@ -87,7 +87,7 @@
 	int             i, n;
 
 	for (i = 0; i < num_mixer_volumes; i++) {
-		if (strcmp(name, mixer_vols[i].name) == 0) {
+		if (strncmp(name, mixer_vols[i].name, 32) == 0) {
 			if (present)
 				mixer_vols[i].num = i;
 			return mixer_vols[i].levels;
@@ -99,7 +99,7 @@
 	}
 	n = num_mixer_volumes++;
 
-	strcpy(mixer_vols[n].name, name);
+	strncpy(mixer_vols[n].name, name, 32);
 
 	if (present)
 		mixer_vols[n].num = n;
--- linux-mvl-dove-2.6.32.orig/sound/oss/opl3.c
+++ linux-mvl-dove-2.6.32/sound/oss/opl3.c
@@ -819,7 +819,7 @@
 }
 
 static int opl3_load_patch(int dev, int format, const char __user *addr,
-		int offs, int count, int pmgr_flag)
+		int count, int pmgr_flag)
 {
 	struct sbi_instrument ins;
 
@@ -829,11 +829,7 @@
 		return -EINVAL;
 	}
 
-	/*
-	 * What the fuck is going on here?  We leave junk in the beginning
-	 * of ins and then check the field pretty close to that beginning?
-	 */
-	if(copy_from_user(&((char *) &ins)[offs], addr + offs, sizeof(ins) - offs))
+	if (copy_from_user(&ins, addr, sizeof(ins)))
 		return -EFAULT;
 
 	if (ins.channel < 0 || ins.channel >= SBFM_MAXINSTR)
@@ -848,6 +844,10 @@
 
 static void opl3_panning(int dev, int voice, int value)
 {
+
+	if (voice < 0 || voice >= devc->nr_voice)
+		return;
+
 	devc->voc[voice].panning = value;
 }
 
@@ -1065,8 +1065,15 @@
 
 static void opl3_setup_voice(int dev, int voice, int chn)
 {
-	struct channel_info *info =
-	&synth_devs[dev]->chn_info[chn];
+	struct channel_info *info;
+
+	if (voice < 0 || voice >= devc->nr_voice)
+		return;
+
+	if (chn < 0 || chn > 15)
+		return;
+
+	info = &synth_devs[dev]->chn_info[chn];
 
 	opl3_set_instr(dev, voice, info->pgm_num);
 
--- linux-mvl-dove-2.6.32.orig/sound/oss/midi_synth.c
+++ linux-mvl-dove-2.6.32/sound/oss/midi_synth.c
@@ -476,7 +476,7 @@
 
 int
 midi_synth_load_patch(int dev, int format, const char __user *addr,
-		      int offs, int count, int pmgr_flag)
+		      int count, int pmgr_flag)
 {
 	int             orig_dev = synth_devs[dev]->midi_dev;
 
@@ -491,39 +491,37 @@
 	if (!prefix_cmd(orig_dev, 0xf0))
 		return 0;
 
+	/* Invalid patch format */
 	if (format != SYSEX_PATCH)
-	{
-/*		  printk("MIDI Error: Invalid patch format (key) 0x%x\n", format);*/
 		  return -EINVAL;
-	}
+
+	/* Patch header too short */
 	if (count < hdr_size)
-	{
-/*		printk("MIDI Error: Patch header too short\n");*/
 		return -EINVAL;
-	}
+
 	count -= hdr_size;
 
 	/*
-	 * Copy the header from user space but ignore the first bytes which have
-	 * been transferred already.
+	 * Copy the header from user space
 	 */
 
-	if(copy_from_user(&((char *) &sysex)[offs], &(addr)[offs], hdr_size - offs))
+	if (copy_from_user(&sysex, addr, hdr_size))
 		return -EFAULT;
- 
- 	if (count < sysex.len)
-	{
-/*		printk(KERN_WARNING "MIDI Warning: Sysex record too short (%d<%d)\n", count, (int) sysex.len);*/
+
+	/* Sysex record too short */
+	if ((unsigned)count < (unsigned)sysex.len)
 		sysex.len = count;
-	}
-  	left = sysex.len;
-  	src_offs = 0;
+
+	left = sysex.len;
+	src_offs = 0;
 
 	for (i = 0; i < left && !signal_pending(current); i++)
 	{
 		unsigned char   data;
 
-		get_user(*(unsigned char *) &data, (unsigned char __user *) &((addr)[hdr_size + i]));
+		if (get_user(data,
+		    (unsigned char __user *)(addr + hdr_size + i)))
+			return -EFAULT;
 
 		eox_seen = (i > 0 && data & 0x80);	/* End of sysex */
 
--- linux-mvl-dove-2.6.32.orig/sound/ppc/tumbler.c
+++ linux-mvl-dove-2.6.32/sound/ppc/tumbler.c
@@ -30,6 +30,7 @@
 #include <linux/kmod.h>
 #include <linux/slab.h>
 #include <linux/interrupt.h>
+#include <linux/string.h>
 #include <sound/core.h>
 #include <asm/io.h>
 #include <asm/irq.h>
@@ -46,6 +47,8 @@
 #define DBG(fmt...)
 #endif
 
+#define IS_G4DA (machine_is_compatible("PowerMac3,4"))
+
 /* i2c address for tumbler */
 #define TAS_I2C_ADDR	0x34
 
@@ -1134,7 +1137,8 @@
 		gp->inactive_val = (*base) ? 0x4 : 0x5;
 	} else {
 		const u32 *prop = NULL;
-		gp->active_state = 0;
+		gp->active_state = IS_G4DA
+				&& !strncmp(device, "keywest-gpio1", 13);
 		gp->active_val = 0x4;
 		gp->inactive_val = 0x5;
 		/* Here are some crude hacks to extract the GPIO polarity and
@@ -1312,6 +1316,9 @@
  	if (irq <= NO_IRQ)
 		irq = tumbler_find_device("line-output-detect",
 					  NULL, &mix->line_detect, 1);
+	if (IS_G4DA && irq <= NO_IRQ)
+		irq = tumbler_find_device("keywest-gpio16",
+					  NULL, &mix->line_detect, 1);
 	mix->lineout_irq = irq;
 
 	tumbler_reset_audio(chip);
--- linux-mvl-dove-2.6.32.orig/sound/usb/usbaudio.c
+++ linux-mvl-dove-2.6.32/sound/usb/usbaudio.c
@@ -752,7 +752,7 @@
 			return 0; /* already large enough */
 		vfree(runtime->dma_area);
 	}
-	runtime->dma_area = vmalloc(size);
+	runtime->dma_area = vmalloc_user(size);
 	if (!runtime->dma_area)
 		return -ENOMEM;
 	runtime->dma_bytes = size;
@@ -1936,7 +1936,7 @@
 	struct snd_usb_stream *as = snd_pcm_substream_chip(substream);
 	struct snd_usb_substream *subs = &as->substream[direction];
 
-	if (subs->interface >= 0) {
+	if (!as->chip->shutdown && subs->interface >= 0) {
 		usb_set_interface(subs->dev, subs->interface, 0);
 		subs->interface = -1;
 	}
@@ -3326,6 +3326,32 @@
 }
 
 /*
+ * This call will put the synth in "USB send" mode, i.e it will send MIDI
+ * messages through USB (this is disabled at startup). The synth will
+ * acknowledge by sending a sysex on endpoint 0x85 and by displaying a USB
+ * sign on its LCD. Values here are chosen based on sniffing USB traffic
+ * under Windows.
+ */
+static int snd_usb_accessmusic_boot_quirk(struct usb_device *dev)
+{
+	int err, actual_length;
+
+	/* "midi send" enable */
+	static const u8 seq[] = { 0x4e, 0x73, 0x52, 0x01 };
+
+	void *buf = kmemdup(seq, ARRAY_SIZE(seq), GFP_KERNEL);
+	if (!buf)
+		return -ENOMEM;
+	err = usb_interrupt_msg(dev, usb_sndintpipe(dev, 0x05), buf,
+			ARRAY_SIZE(seq), &actual_length, 1000);
+	kfree(buf);
+	if (err < 0)
+		return err;
+
+	return 0;
+}
+
+/*
  * Setup quirks
  */
 #define AUDIOPHILE_SET			0x01 /* if set, parse device_setup */
@@ -3616,6 +3642,12 @@
 			goto __err_val;
 	}
 
+	/* Access Music VirusTI Desktop */
+	if (id == USB_ID(0x133e, 0x0815)) {
+		if (snd_usb_accessmusic_boot_quirk(dev) < 0)
+			goto __err_val;
+	}
+
 	/*
 	 * found a config.  now register to ALSA
 	 */
--- linux-mvl-dove-2.6.32.orig/sound/usb/usbmidi.c
+++ linux-mvl-dove-2.6.32/sound/usb/usbmidi.c
@@ -931,6 +931,8 @@
 	DEFINE_WAIT(wait);
 	long timeout = msecs_to_jiffies(50);
 
+	if (ep->umidi->disconnected)
+		return;
 	/*
 	 * The substream buffer is empty, but some data might still be in the
 	 * currently active URBs, so we have to wait for those to complete.
@@ -1075,14 +1077,21 @@
  * Frees an output endpoint.
  * May be called when ep hasn't been initialized completely.
  */
-static void snd_usbmidi_out_endpoint_delete(struct snd_usb_midi_out_endpoint* ep)
+static void snd_usbmidi_out_endpoint_clear(struct snd_usb_midi_out_endpoint *ep)
 {
 	unsigned int i;
 
 	for (i = 0; i < OUTPUT_URBS; ++i)
-		if (ep->urbs[i].urb)
+		if (ep->urbs[i].urb) {
 			free_urb_and_buffer(ep->umidi, ep->urbs[i].urb,
 					    ep->max_transfer);
+			ep->urbs[i].urb = NULL;
+		}
+}
+
+static void snd_usbmidi_out_endpoint_delete(struct snd_usb_midi_out_endpoint *ep)
+{
+	snd_usbmidi_out_endpoint_clear(ep);
 	kfree(ep);
 }
 
@@ -1201,15 +1210,18 @@
 				usb_kill_urb(ep->out->urbs[j].urb);
 			if (umidi->usb_protocol_ops->finish_out_endpoint)
 				umidi->usb_protocol_ops->finish_out_endpoint(ep->out);
+			ep->out->active_urbs = 0;
+			if (ep->out->drain_urbs) {
+				ep->out->drain_urbs = 0;
+				wake_up(&ep->out->drain_wait);
+			}
 		}
 		if (ep->in)
 			for (j = 0; j < INPUT_URBS; ++j)
 				usb_kill_urb(ep->in->urbs[j]);
 		/* free endpoints here; later call can result in Oops */
-		if (ep->out) {
-			snd_usbmidi_out_endpoint_delete(ep->out);
-			ep->out = NULL;
-		}
+		if (ep->out)
+			snd_usbmidi_out_endpoint_clear(ep->out);
 		if (ep->in) {
 			snd_usbmidi_in_endpoint_delete(ep->in);
 			ep->in = NULL;
@@ -1360,6 +1372,12 @@
 	EXTERNAL_PORT(0x086a, 0x0001, 8, "%s Broadcast"),
 	EXTERNAL_PORT(0x086a, 0x0002, 8, "%s Broadcast"),
 	EXTERNAL_PORT(0x086a, 0x0003, 4, "%s Broadcast"),
+	/* Access Music Virus TI */
+	EXTERNAL_PORT(0x133e, 0x0815, 0, "%s MIDI"),
+	PORT_INFO(0x133e, 0x0815, 1, "%s Synth", 0,
+		SNDRV_SEQ_PORT_TYPE_MIDI_GENERIC |
+		SNDRV_SEQ_PORT_TYPE_HARDWARE |
+		SNDRV_SEQ_PORT_TYPE_SYNTHESIZER),
 };
 
 static struct port_info *find_port_info(struct snd_usb_midi* umidi, int number)
--- linux-mvl-dove-2.6.32.orig/sound/usb/usbquirks.h
+++ linux-mvl-dove-2.6.32/sound/usb/usbquirks.h
@@ -2050,6 +2050,33 @@
 	}
 },
 
+/* Access Music devices */
+{
+	/* VirusTI Desktop */
+	USB_DEVICE_VENDOR_SPEC(0x133e, 0x0815),
+	.driver_info = (unsigned long) &(const struct snd_usb_audio_quirk) {
+		.ifnum = QUIRK_ANY_INTERFACE,
+		.type = QUIRK_COMPOSITE,
+		.data = &(const struct snd_usb_audio_quirk[]) {
+			{
+				.ifnum = 3,
+				.type = QUIRK_MIDI_FIXED_ENDPOINT,
+				.data = &(const struct snd_usb_midi_endpoint_info) {
+					.out_cables = 0x0003,
+					.in_cables  = 0x0003
+				}
+			},
+			{
+				.ifnum = 4,
+				.type = QUIRK_IGNORE_INTERFACE
+			},
+			{
+				.ifnum = -1
+			}
+		}
+	}
+},
+
 /* */
 {
 	/* aka. Serato Scratch Live DJ Box */
--- linux-mvl-dove-2.6.32.orig/sound/usb/usx2y/us122l.c
+++ linux-mvl-dove-2.6.32/sound/usb/usx2y/us122l.c
@@ -234,29 +234,26 @@
 					  struct file *file, poll_table *wait)
 {
 	struct us122l	*us122l = hw->private_data;
-	struct usb_stream *s = us122l->sk.s;
 	unsigned	*polled;
 	unsigned int	mask;
 
 	poll_wait(file, &us122l->sk.sleep, wait);
 
-	switch (s->state) {
-	case usb_stream_ready:
-		if (us122l->first == file)
-			polled = &s->periods_polled;
-		else
-			polled = &us122l->second_periods_polled;
-		if (*polled != s->periods_done) {
-			*polled = s->periods_done;
-			mask = POLLIN | POLLOUT | POLLWRNORM;
-			break;
+	mask = POLLIN | POLLOUT | POLLWRNORM | POLLERR;
+	if (mutex_trylock(&us122l->mutex)) {
+		struct usb_stream *s = us122l->sk.s;
+		if (s && s->state == usb_stream_ready) {
+			if (us122l->first == file)
+				polled = &s->periods_polled;
+			else
+				polled = &us122l->second_periods_polled;
+			if (*polled != s->periods_done) {
+				*polled = s->periods_done;
+				mask = POLLIN | POLLOUT | POLLWRNORM;
+			} else
+				mask = 0;
 		}
-		/* Fall through */
-		mask = 0;
-		break;
-	default:
-		mask = POLLIN | POLLOUT | POLLWRNORM | POLLERR;
-		break;
+		mutex_unlock(&us122l->mutex);
 	}
 	return mask;
 }
@@ -342,6 +339,7 @@
 {
 	struct usb_stream_config *cfg;
 	struct us122l *us122l = hw->private_data;
+	struct usb_stream *s;
 	unsigned min_period_frames;
 	int err = 0;
 	bool high_speed;
@@ -387,18 +385,18 @@
 	snd_power_wait(hw->card, SNDRV_CTL_POWER_D0);
 
 	mutex_lock(&us122l->mutex);
+	s = us122l->sk.s;
 	if (!us122l->master)
 		us122l->master = file;
 	else if (us122l->master != file) {
-		if (memcmp(cfg, &us122l->sk.s->cfg, sizeof(*cfg))) {
+		if (!s || memcmp(cfg, &s->cfg, sizeof(*cfg))) {
 			err = -EIO;
 			goto unlock;
 		}
 		us122l->slave = file;
 	}
-	if (!us122l->sk.s ||
-	    memcmp(cfg, &us122l->sk.s->cfg, sizeof(*cfg)) ||
-	    us122l->sk.s->state == usb_stream_xrun) {
+	if (!s || memcmp(cfg, &s->cfg, sizeof(*cfg)) ||
+	    s->state == usb_stream_xrun) {
 		us122l_stop(us122l);
 		if (!us122l_start(us122l, cfg->sample_rate, cfg->period_frames))
 			err = -EIO;
@@ -409,6 +407,7 @@
 	mutex_unlock(&us122l->mutex);
 free:
 	kfree(cfg);
+	wake_up_all(&us122l->sk.sleep);
 	return err;
 }
 
--- linux-mvl-dove-2.6.32.orig/sound/usb/caiaq/midi.c
+++ linux-mvl-dove-2.6.32/sound/usb/caiaq/midi.c
@@ -135,7 +135,7 @@
 	if (ret < 0)
 		return ret;
 
-	strcpy(rmidi->name, device->product_name);
+	strlcpy(rmidi->name, device->product_name, sizeof(rmidi->name));
 
 	rmidi->info_flags = SNDRV_RAWMIDI_INFO_DUPLEX;
 	rmidi->private_data = device;
--- linux-mvl-dove-2.6.32.orig/sound/usb/caiaq/audio.c
+++ linux-mvl-dove-2.6.32/sound/usb/caiaq/audio.c
@@ -639,7 +639,7 @@
 	}
 
 	dev->pcm->private_data = dev;
-	strcpy(dev->pcm->name, dev->product_name);
+	strlcpy(dev->pcm->name, dev->product_name, sizeof(dev->pcm->name));
 
 	memset(dev->sub_playback, 0, sizeof(dev->sub_playback));
 	memset(dev->sub_capture, 0, sizeof(dev->sub_capture));
--- linux-mvl-dove-2.6.32.orig/include/Kbuild
+++ linux-mvl-dove-2.6.32/include/Kbuild
@@ -9,4 +9,3 @@
 header-y += video/
 header-y += drm/
 header-y += xen/
-header-y += scsi/
--- linux-mvl-dove-2.6.32.orig/include/mtd/mtd-abi.h
+++ linux-mvl-dove-2.6.32/include/mtd/mtd-abi.h
@@ -134,7 +134,7 @@
  */
 struct nand_ecclayout {
 	__u32 eccbytes;
-	__u32 eccpos[64];
+	__u32 eccpos[128];
 	__u32 oobavail;
 	struct nand_oobfree oobfree[MTD_MAX_OOBFREE_ENTRIES];
 };
--- linux-mvl-dove-2.6.32.orig/include/sound/soc-dapm.h
+++ linux-mvl-dove-2.6.32/include/sound/soc-dapm.h
@@ -46,25 +46,25 @@
 /* platform domain */
 #define SND_SOC_DAPM_INPUT(wname) \
 {	.id = snd_soc_dapm_input, .name = wname, .kcontrols = NULL, \
-	.num_kcontrols = 0}
+	.num_kcontrols = 0, .reg = SND_SOC_NOPM }
 #define SND_SOC_DAPM_OUTPUT(wname) \
 {	.id = snd_soc_dapm_output, .name = wname, .kcontrols = NULL, \
-	.num_kcontrols = 0}
+	.num_kcontrols = 0, .reg = SND_SOC_NOPM }
 #define SND_SOC_DAPM_MIC(wname, wevent) \
 {	.id = snd_soc_dapm_mic, .name = wname, .kcontrols = NULL, \
-	.num_kcontrols = 0, .event = wevent, \
+	.num_kcontrols = 0, .reg = SND_SOC_NOPM, .event = wevent, \
 	.event_flags = SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD}
 #define SND_SOC_DAPM_HP(wname, wevent) \
 {	.id = snd_soc_dapm_hp, .name = wname, .kcontrols = NULL, \
-	.num_kcontrols = 0, .event = wevent, \
+	.num_kcontrols = 0, .reg = SND_SOC_NOPM, .event = wevent, \
 	.event_flags = SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD}
 #define SND_SOC_DAPM_SPK(wname, wevent) \
 {	.id = snd_soc_dapm_spk, .name = wname, .kcontrols = NULL, \
-	.num_kcontrols = 0, .event = wevent, \
+	.num_kcontrols = 0, .reg = SND_SOC_NOPM, .event = wevent, \
 	.event_flags = SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD}
 #define SND_SOC_DAPM_LINE(wname, wevent) \
 {	.id = snd_soc_dapm_line, .name = wname, .kcontrols = NULL, \
-	.num_kcontrols = 0, .event = wevent, \
+	.num_kcontrols = 0, .reg = SND_SOC_NOPM, .event = wevent, \
 	.event_flags = SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD}
 
 /* path domain */
@@ -129,11 +129,11 @@
 /* events that are pre and post DAPM */
 #define SND_SOC_DAPM_PRE(wname, wevent) \
 {	.id = snd_soc_dapm_pre, .name = wname, .kcontrols = NULL, \
-	.num_kcontrols = 0, .event = wevent, \
+	.num_kcontrols = 0, .reg = SND_SOC_NOPM, .event = wevent, \
 	.event_flags = SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD}
 #define SND_SOC_DAPM_POST(wname, wevent) \
 {	.id = snd_soc_dapm_post, .name = wname, .kcontrols = NULL, \
-	.num_kcontrols = 0, .event = wevent, \
+	.num_kcontrols = 0, .reg = SND_SOC_NOPM, .event = wevent, \
 	.event_flags = SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD}
 
 /* stream domain */
--- linux-mvl-dove-2.6.32.orig/include/sound/soc.h
+++ linux-mvl-dove-2.6.32/include/sound/soc.h
@@ -519,6 +519,7 @@
 struct snd_soc_pcm_runtime {
 	struct snd_soc_dai_link *dai;
 	struct snd_soc_device *socdev;
+	struct snd_pcm_ops pcm_ops;
 };
 
 /* mixer control */
--- linux-mvl-dove-2.6.32.orig/include/sound/emu10k1.h
+++ linux-mvl-dove-2.6.32/include/sound/emu10k1.h
@@ -1707,6 +1707,7 @@
 	unsigned int card_type;			/* EMU10K1_CARD_* */
 	unsigned int ecard_ctrl;		/* ecard control bits */
 	unsigned long dma_mask;			/* PCI DMA mask */
+	unsigned int delay_pcm_irq;		/* in samples */
 	int max_cache_pages;			/* max memory size / PAGE_SIZE */
 	struct snd_dma_buffer silent_page;	/* silent page */
 	struct snd_dma_buffer ptb_pages;	/* page table pages */
--- linux-mvl-dove-2.6.32.orig/include/video/kg2.h
+++ linux-mvl-dove-2.6.32/include/video/kg2.h
@@ -0,0 +1,56 @@
+/*
+ * kg2.h - Linux Driver for Marvell 88DE2750 Digital Video Format Converter
+ */
+
+#ifndef __KG2_H__
+#define __KG2_H__
+
+// Copied from "88DE2750/sdk/2750_core/private/88DE2750/avc/cmdapp/inc/avc27xx_cmd.h" +
+
+//AVC_CMD_SIGNAL_POLARITY is used in the AVC_CMD_TIMING_PARAM structure
+typedef enum tagAVC_CMD_SIGNAL_POLARITY
+{
+	AVC_CMD_POLARITY_NO_INVERT = 0,
+	AVC_CMD_POLARITY_INVERT
+
+}AVC_CMD_SIGNAL_POLARITY;
+
+//AVC_CMD_ASPECT_RATIO is used in the AVC_CMD_TIMING_PARAM structure
+typedef enum tagAVC_CMD_ASPECT_RATIO
+{
+    AVC_CMD_ASP_RATIO_4_3 = 0,
+    AVC_CMD_ASP_RATIO_16_9
+
+}AVC_CMD_ASPECT_RATIO;
+
+//AVC_CMD_TIMING_PARAM to be used when the SUBCMD is AVC_SUBCMD_INPUT_RES_MANUAL_SEL only (Common for Input/Output)
+typedef struct tagAVC_CMD_PARAM_TIMING
+{
+	unsigned short			HTotal;
+	unsigned short			HActive;
+	unsigned short			HFrontPorch;
+	unsigned char			HSyncWidth;
+	AVC_CMD_SIGNAL_POLARITY		HPolarity;
+
+	unsigned short			VTotal;
+	unsigned short			VActive;
+	unsigned short			VFrontPorch;
+	unsigned char			VSyncWidth;
+	AVC_CMD_SIGNAL_POLARITY		VPolarity;
+
+	AVC_CMD_ASPECT_RATIO		AspRatio;
+	unsigned char			IsProgressive;
+
+	unsigned short			RefRate;
+
+}AVC_CMD_TIMING_PARAM, *PAVC_CMD_TIMING_PARAM;
+
+// Copied from "88DE2750/sdk/2750_core/private/88DE2750/avc/cmdapp/inc/avc27xx_cmd.h" -
+
+int kg2_run_script(const unsigned char * array, int count);
+int kg2_i2c_write(unsigned char baseaddr, unsigned char subaddr, const unsigned char * data, unsigned short dataLen);
+int kg2_initialize(void);
+int kg2_set_input_timing(AVC_CMD_TIMING_PARAM * timing);
+int kg2_set_output_timing(AVC_CMD_TIMING_PARAM * timing);
+
+#endif
--- linux-mvl-dove-2.6.32.orig/include/video/dovefbreg.h
+++ linux-mvl-dove-2.6.32/include/video/dovefbreg.h
@@ -0,0 +1,639 @@
+/*
+ * linux/include/video/dovefbreg.h -- Marvell frame buffer for DOVE
+ *
+ *
+ * Copyright (C) Marvell Semiconductor Company.  All rights reserved.
+ *
+ * Written by Green Wan <gwan@marvell.com>
+ *
+ * Adapted from:  linux/drivers/video/skeletonfb.c
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive for
+ * more details.
+ *
+ */
+#ifndef _DOVEFB_REG_H_
+#define	_DOVEFB_REG_H_
+
+/* ------------< LCD register >------------ */
+/* Video Frame 0&1 start address registers */
+#define	LCD_SPU_ADV_REG				0x0084
+
+/* Video Frame 0&1 start address registers */
+#define	LCD_SPU_DMA_START_ADDR_Y0		0x00C0
+#define	LCD_SPU_DMA_START_ADDR_U0		0x00C4
+#define	LCD_SPU_DMA_START_ADDR_V0		0x00C8
+#define LCD_CFG_DMA_START_ADDR_0		0x00CC /* Cmd address */
+#define	LCD_SPU_DMA_START_ADDR_Y1		0x00D0
+#define	LCD_SPU_DMA_START_ADDR_U1		0x00D4
+#define	LCD_SPU_DMA_START_ADDR_V1		0x00D8
+#define LCD_CFG_DMA_START_ADDR_1		0x00DC /* Cmd address */
+
+/* YC & UV Pitch */
+#define LCD_SPU_DMA_PITCH_YC			0x00E0
+#define     SPU_DMA_PITCH_C(c)			(c<<16)
+#define     SPU_DMA_PITCH_Y(y)			(y)
+#define LCD_SPU_DMA_PITCH_UV			0x00E4
+#define     SPU_DMA_PITCH_V(v)			(v<<16)
+#define     SPU_DMA_PITCH_U(u)			(u)
+
+/* Video Starting Point on Screen Register */
+#define LCD_SPUT_DMA_OVSA_HPXL_VLN		0x00E8
+#define     CFG_DMA_OVSA_VLN(y)			(y<<16) /* 0~0xfff */
+#define     CFG_DMA_OVSA_HPXL(x)		(x)     /* 0~0xfff */
+
+/* Video Size Register */
+#define LCD_SPU_DMA_HPXL_VLN			0x00EC
+#define     CFG_DMA_VLN(y)			(y<<16)
+#define     CFG_DMA_HPXL(x)			(x)
+
+/* Video Size After zooming Register */
+#define LCD_SPU_DZM_HPXL_VLN			0x00F0
+#define     CFG_DZM_VLN(y)			(y<<16)
+#define     CFG_DZM_HPXL(x)			(x)
+
+/* Graphic Frame 0&1 Starting Address Register */
+#define LCD_CFG_GRA_START_ADDR0			0x00F4
+#define LCD_CFG_GRA_START_ADDR1			0x00F8
+
+/* Graphic Frame Pitch */
+#define LCD_CFG_GRA_PITCH			0x00FC
+
+/* Graphic Starting Point on Screen Register */
+#define LCD_SPU_GRA_OVSA_HPXL_VLN		0x0100
+#define     CFG_GRA_OVSA_VLN(y)			(y<<16)
+#define     CFG_GRA_OVSA_HPXL(x)		(x)
+
+/* Graphic Size Register */
+#define LCD_SPU_GRA_HPXL_VLN			0x0104
+#define     CFG_GRA_VLN(y)			(y<<16)
+#define     CFG_GRA_HPXL(x)			(x)
+
+/* Graphic Size after Zooming Register */
+#define LCD_SPU_GZM_HPXL_VLN			0x0108
+#define     CFG_GZM_VLN(y)			(y<<16)
+#define     CFG_GZM_HPXL(x)			(x)
+
+/* HW Cursor Starting Point on Screen Register */
+#define LCD_SPU_HWC_OVSA_HPXL_VLN		0x010C
+#define     CFG_HWC_OVSA_VLN(y)			(y<<16)
+#define     CFG_HWC_OVSA_HPXL(x)		(x)
+
+/* HW Cursor Size */
+#define LCD_SPU_HWC_HPXL_VLN			0x0110
+#define     CFG_HWC_VLN(y)			(y<<16)
+#define     CFG_HWC_HPXL(x)			(x)
+
+/* Total Screen Size Register */
+#define LCD_SPUT_V_H_TOTAL			0x0114
+#define     CFG_V_TOTAL(y)			((y)<<16)
+#define     CFG_H_TOTAL(x)			(x)
+
+/* Total Screen Active Size Register */
+#define LCD_SPU_V_H_ACTIVE			0x0118
+#define     CFG_V_ACTIVE(y)			((y)<<16)
+#define     CFG_H_ACTIVE(x)			(x)
+
+/* Screen H&V Porch Register */
+#define LCD_SPU_H_PORCH				0x011C
+#define     CFG_H_BACK_PORCH(b)			(b<<16)
+#define     CFG_H_FRONT_PORCH(f)		(f)
+#define LCD_SPU_V_PORCH				0x0120
+#define     CFG_V_BACK_PORCH(b)			(b<<16)
+#define     CFG_V_FRONT_PORCH(f)		(f)
+
+/* Screen Blank Color Register */
+#define LCD_SPU_BLANKCOLOR			0x0124
+#define     CFG_BLANKCOLOR_MASK			0x00FFFFFF
+#define     CFG_BLANKCOLOR_R_MASK		0x000000FF
+#define     CFG_BLANKCOLOR_G_MASK		0x0000FF00
+#define     CFG_BLANKCOLOR_B_MASK		0x00FF0000
+
+/* HW Cursor Color 1&2 Register */
+#define LCD_SPU_ALPHA_COLOR1			0x0128
+#define     CFG_HWC_COLOR1			0x00FFFFFF
+#define     CFG_HWC_COLOR1_R(red)		(red<<16)
+#define     CFG_HWC_COLOR1_G(green)		(green<<8)
+#define     CFG_HWC_COLOR1_B(blue)		(blue)
+#define     CFG_HWC_COLOR1_R_MASK		0x000000FF
+#define     CFG_HWC_COLOR1_G_MASK		0x0000FF00
+#define     CFG_HWC_COLOR1_B_MASK		0x00FF0000
+#define LCD_SPU_ALPHA_COLOR2			0x012C
+#define     CFG_HWC_COLOR2			0x00FFFFFF
+#define     CFG_HWC_COLOR2_R_MASK		0x000000FF
+#define     CFG_HWC_COLOR2_G_MASK		0x0000FF00
+#define     CFG_HWC_COLOR2_B_MASK		0x00FF0000
+
+/* Video YUV Color Key Control */
+#define LCD_SPU_COLORKEY_Y			0x0130
+#define     CFG_CKEY_Y2(y2)			((y2)<<24)
+#define     CFG_CKEY_Y2_MASK			0xFF000000
+#define     CFG_CKEY_Y1(y1)			((y1)<<16)
+#define     CFG_CKEY_Y1_MASK			0x00FF0000
+#define     CFG_CKEY_Y(y)			((y)<<8)
+#define     CFG_CKEY_Y_MASK			0x0000FF00
+#define     CFG_ALPHA_Y(y)			(y)
+#define     CFG_ALPHA_Y_MASK			0x000000FF
+#define LCD_SPU_COLORKEY_U			0x0134
+#define     CFG_CKEY_U2(u2)			((u2)<<24)
+#define     CFG_CKEY_U2_MASK			0xFF000000
+#define     CFG_CKEY_U1(u1)			((u1)<<16)
+#define     CFG_CKEY_U1_MASK			0x00FF0000
+#define     CFG_CKEY_U(u)			((u)<<8)
+#define     CFG_CKEY_U_MASK			0x0000FF00
+#define     CFG_ALPHA_U(u)			(u)
+#define     CFG_ALPHA_U_MASK			0x000000FF
+#define LCD_SPU_COLORKEY_V			0x0138
+#define     CFG_CKEY_V2(v2)			((v2)<<24)
+#define     CFG_CKEY_V2_MASK			0xFF000000
+#define     CFG_CKEY_V1(v1)			((v1)<<16)
+#define     CFG_CKEY_V1_MASK			0x00FF0000
+#define     CFG_CKEY_V(v)			((v)<<8)
+#define     CFG_CKEY_V_MASK			0x0000FF00
+#define     CFG_ALPHA_V(v)			(v)
+#define     CFG_ALPHA_V_MASK			0x000000FF
+
+/* LCD General Configuration Register */
+#define LCD_CFG_RDREG4F				0x013C
+
+/* SPI Read Data Register */
+#define LCD_SPU_SPI_RXDATA			0x0140
+
+/* Smart Panel Read Data Register */
+#define LCD_SPU_ISA_RSDATA			0x0144
+#define     ISA_RXDATA_16BIT_1_DATA_MASK	0x000000FF
+#define     ISA_RXDATA_16BIT_2_DATA_MASK	0x0000FF00
+#define     ISA_RXDATA_16BIT_3_DATA_MASK	0x00FF0000
+#define     ISA_RXDATA_16BIT_4_DATA_MASK	0xFF000000
+#define     ISA_RXDATA_32BIT_1_DATA_MASK	0x00FFFFFF
+
+/* HWC SRAM Read Data Register */
+#define LCD_SPU_HWC_RDDAT			0x0158
+
+/* Gamma Table SRAM Read Data Register */
+#define LCD_SPU_GAMMA_RDDAT			0x015c
+#define     CFG_GAMMA_RDDAT_MASK		0x000000FF
+
+/* Palette Table SRAM Read Data Register */
+#define LCD_SPU_PALETTE_RDDAT			0x0160
+#define     CFG_PALETTE_RDDAT_MASK		0x00FFFFFF
+
+/* I/O Pads Input Read Only Register */
+#define LCD_SPU_IOPAD_IN			0x0178
+#define     CFG_IOPAD_IN_MASK			0x0FFFFFFF
+
+/* Reserved Read Only Registers */
+#define LCD_CFG_RDREG5F				0x017C
+#define     IRE_FRAME_CNT_MASK			0x000000C0
+#define     IPE_FRAME_CNT_MASK			0x00000030
+#define     GRA_FRAME_CNT_MASK			0x0000000C  /* Graphic */
+#define     DMA_FRAME_CNT_MASK			0x00000003  /* Video */
+
+/* SPI Control Register. */
+#define LCD_SPU_SPI_CTRL			0x0180
+#define     CFG_SCLKCNT(div)			(div<<24)  /* 0xFF~0x2 */
+#define     CFG_SCLKCNT_MASK			0xFF000000
+#define     CFG_RXBITS(rx)			(rx<<16)   /* 0x1F~0x1 */
+#define     CFG_RXBITS_MASK			0x00FF0000
+#define     CFG_TXBITS(tx)			(tx<<8)    /* 0x1F~0x1 */
+#define     CFG_TXBITS_MASK			0x0000FF00
+#define     CFG_CLKINV(clk)			(clk<<7)
+#define     CFG_CLKINV_MASK			0x00000080
+#define     CFG_KEEPXFER(transfer)		(transfer<<6)
+#define     CFG_KEEPXFER_MASK			0x00000040
+#define     CFG_RXBITSTO0(rx)			(rx<<5)
+#define     CFG_RXBITSTO0_MASK			0x00000020
+#define     CFG_TXBITSTO0(tx)			(tx<<4)
+#define     CFG_TXBITSTO0_MASK			0x00000010
+#define     CFG_SPI_ENA(spi)			(spi<<3)
+#define     CFG_SPI_ENA_MASK			0x00000008
+#define     CFG_SPI_SEL(spi)			(spi<<2)
+#define     CFG_SPI_SEL_MASK			0x00000004
+#define     CFG_SPI_3W4WB(wire)			(wire<<1)
+#define     CFG_SPI_3W4WB_MASK			0x00000002
+#define     CFG_SPI_START(start)		(start)
+#define     CFG_SPI_START_MASK			0x00000001
+
+/* SPI Tx Data Register */
+#define LCD_SPU_SPI_TXDATA			0x0184
+
+/*
+   1. Smart Pannel 8-bit Bus Control Register.
+   2. AHB Slave Path Data Port Register
+*/
+#define LCD_SPU_SMPN_CTRL			0x0188
+
+/* DMA Control 0 Register */
+#define LCD_SPU_DMA_CTRL0			0x0190
+#define     CFG_NOBLENDING(nb)			(nb<<31)
+#define     CFG_NOBLENDING_MASK			0x80000000
+#define     CFG_GAMMA_ENA(gn)			(gn<<30)
+#define     CFG_GAMMA_ENA_MASK			0x40000000
+#define     CFG_CBSH_ENA(cn)			(cn<<29)
+#define     CFG_CBSH_ENA_MASK			0x20000000
+#define     CFG_PALETTE_ENA(pn)			(pn<<28)
+#define     CFG_PALETTE_ENA_MASK		0x10000000
+#define     CFG_ARBFAST_ENA(an)			(an<<27)
+#define     CFG_ARBFAST_ENA_MASK		0x08000000
+#define     CFG_HWC_1BITMOD(mode)		(mode<<26)
+#define     CFG_HWC_1BITMOD_MASK		0x04000000
+#define     CFG_HWC_1BITENA(mn)			(mn<<25)
+#define     CFG_HWC_1BITENA_MASK		0x02000000
+#define     CFG_HWC_ENA(cn)		        (cn<<24)
+#define     CFG_HWC_ENA_MASK			0x01000000
+#define     CFG_DMAFORMAT(dmaformat)		(dmaformat<<20)
+#define     CFG_DMAFORMAT_MASK			0x00F00000
+#define     CFG_GRAFORMAT(graformat)		(graformat<<16)
+#define     CFG_GRAFORMAT_MASK			0x000F0000
+/* for graphic part */
+#define     CFG_GRA_FTOGGLE(toggle)		(toggle<<15)
+#define     CFG_GRA_FTOGGLE_MASK		0x00008000
+#define     CFG_GRA_HSMOOTH(smooth)		(smooth<<14)
+#define     CFG_GRA_HSMOOTH_MASK		0x00004000
+#define     CFG_GRA_TSTMODE(test)		(test<<13)
+#define     CFG_GRA_TSTMODE_MASK		0x00002000
+#define     CFG_GRA_SWAPRB(swap)		(swap<<12)
+#define     CFG_GRA_SWAPRB_MASK			0x00001000
+#define     CFG_GRA_SWAPUV(swap)		(swap<<11)
+#define     CFG_GRA_SWAPUV_MASK			0x00000800
+#define     CFG_GRA_SWAPYU(swap)		(swap<<10)
+#define     CFG_GRA_SWAPYU_MASK			0x00000400
+#define     CFG_YUV2RGB_GRA(cvrt)		(cvrt<<9)
+#define     CFG_YUV2RGB_GRA_MASK		0x00000200
+#define     CFG_GRA_ENA(gra)			(gra<<8)
+#define     CFG_GRA_ENA_MASK			0x00000100
+/* for video part */
+#define     CFG_DMA_FTOGGLE(toggle)		(toggle<<7)
+#define     CFG_DMA_FTOGGLE_MASK		0x00000080
+#define     CFG_DMA_HSMOOTH(smooth)		(smooth<<6)
+#define     CFG_DMA_HSMOOTH_MASK		0x00000040
+#define     CFG_DMA_TSTMODE(test)		(test<<5)
+#define     CFG_DMA_TSTMODE_MASK		0x00000020
+#define     CFG_DMA_SWAPRB(swap)		(swap<<4)
+#define     CFG_DMA_SWAPRB_MASK			0x00000010
+#define     CFG_DMA_SWAPUV(swap)		(swap<<3)
+#define     CFG_DMA_SWAPUV_MASK			0x00000008
+#define     CFG_DMA_SWAPYU(swap)		(swap<<2)
+#define     CFG_DMA_SWAPYU_MASK			0x00000004
+#define     CFG_DMA_SWAP_MASK			0x0000001C
+#define     CFG_YUV2RGB_DMA(cvrt)		(cvrt<<1)
+#define     CFG_YUV2RGB_DMA_MASK		0x00000002
+#define     CFG_DMA_ENA(video)			(video)
+#define     CFG_DMA_ENA_MASK			0x00000001
+
+/* DMA Control 1 Register */
+#define LCD_SPU_DMA_CTRL1			0x0194
+#define     CFG_FRAME_TRIG(trig)		(trig<<31)
+#define     CFG_FRAME_TRIG_MASK			0x80000000
+#define     CFG_VSYNC_TRIG(trig)		(trig<<28)
+#define     CFG_VSYNC_TRIG_MASK			0x70000000
+#define     CFG_VSYNC_INV(inv)			(inv<<27)
+#define     CFG_VSYNC_INV_MASK			0x08000000
+#define     CFG_COLOR_KEY_MODE(cmode)		(cmode<<24)
+#define     CFG_COLOR_KEY_MASK			0x07000000
+#define     CFG_CARRY(carry)			(carry<<23)
+#define     CFG_CARRY_MASK			0x00800000
+#define     CFG_LNBUF_ENA(lnbuf)		(lnbuf<<22)
+#define     CFG_LNBUF_ENA_MASK			0x00400000
+#define     CFG_GATED_ENA(gated)		(gated<<21)
+#define     CFG_GATED_ENA_MASK			0x00200000
+#define     CFG_PWRDN_ENA(power)		(power<<20)
+#define     CFG_PWRDN_ENA_MASK			0x00100000
+#define     CFG_DSCALE(dscale)			(dscale<<18)
+#define     CFG_DSCALE_MASK			0x000C0000
+#define     CFG_ALPHA_MODE(amode)		(amode<<16)
+#define     CFG_ALPHA_MODE_MASK			0x00030000
+#define     CFG_ALPHA(alpha)			(alpha<<8)
+#define     CFG_ALPHA_MASK			0x0000FF00
+#define     CFG_PXLCMD(pxlcmd)			(pxlcmd)
+#define     CFG_PXLCMD_MASK			0x000000FF
+
+/* SRAM Control Register */
+#define LCD_SPU_SRAM_CTRL			0x0198
+#define     CFG_SRAM_INIT_WR_RD(mode)		(mode<<14)
+#define     CFG_SRAM_INIT_WR_RD_MASK		0x0000C000
+#define     CFG_SRAM_ADDR_LCDID(id)		(id<<8)
+#define     CFG_SRAM_ADDR_LCDID_MASK		0x00000F00
+#define     CFG_SRAM_ADDR(addr)			(addr)
+#define     CFG_SRAM_ADDR_MASK			0x000000FF
+
+/* SRAM Write Data Register */
+#define LCD_SPU_SRAM_WRDAT			0x019C
+
+/* SRAM RTC/WTC Control Register */
+#define LCD_SPU_SRAM_PARA0			0x01A0
+
+/* SRAM Power Down Control Register */
+#define LCD_SPU_SRAM_PARA1			0x01A4
+#define     CFG_CSB_256x32(hwc)			(hwc<<15)	/* HWC */
+#define     CFG_CSB_256x32_MASK			0x00008000
+#define     CFG_CSB_256x24(palette)		(palette<<14)	/* Palette */
+#define     CFG_CSB_256x24_MASK			0x00004000
+#define     CFG_CSB_256x8(gamma)		(gamma<<13)	/* Gamma */
+#define     CFG_CSB_256x8_MASK			0x00002000
+#define     CFG_PDWN256x32(pdwn)		(pdwn<<7)	/* HWC */
+#define     CFG_PDWN256x32_MASK			0x00000080
+#define     CFG_PDWN256x24(pdwn)		(pdwn<<6)	/* Palette */
+#define     CFG_PDWN256x24_MASK			0x00000040
+#define     CFG_PDWN256x8(pdwn)			(pdwn<<5)	/* Gamma */
+#define     CFG_PDWN256x8_MASK			0x00000020
+#define     CFG_PDWN32x32(pdwn)			(pdwn<<3)
+#define     CFG_PDWN32x32_MASK			0x00000008
+#define     CFG_PDWN16x66(pdwn)			(pdwn<<2)
+#define     CFG_PDWN16x66_MASK			0x00000004
+#define     CFG_PDWN32x66(pdwn)			(pdwn<<1)
+#define     CFG_PDWN32x66_MASK			0x00000002
+#define     CFG_PDWN64x66(pdwn)			(pdwn)
+#define     CFG_PDWN64x66_MASK			0x00000001
+
+/* Smart or Dumb Panel Clock Divider */
+#define LCD_CFG_SCLK_DIV			0x01A8
+#define     SCLK_SOURCE_SELECT(src)		(src<<31)
+#define     SCLK_SOURCE_SELECT_MASK		0x80000000
+#define     CLK_FRACDIV(frac)			(frac<<16)
+#define     CLK_FRACDIV_MASK			0x0FFF0000
+#define     CLK_INT_DIV(div)			(div)
+#define     CLK_INT_DIV_MASK			0x0000FFFF
+
+/* Video Contrast Register */
+#define LCD_SPU_CONTRAST			0x01AC
+#define     CFG_BRIGHTNESS(bright)		(bright<<16)
+#define     CFG_BRIGHTNESS_MASK			0xFFFF0000
+#define     CFG_CONTRAST(contrast)		(contrast)
+#define     CFG_CONTRAST_MASK			0x0000FFFF
+
+/* Video Saturation Register */
+#define LCD_SPU_SATURATION			0x01B0
+#define     CFG_C_MULTS(mult)			(mult<<16)
+#define     CFG_C_MULTS_MASK			0xFFFF0000
+#define     CFG_SATURATION(sat)			(sat)
+#define     CFG_SATURATION_MASK			0x0000FFFF
+
+/* Video Hue Adjust Register */
+#define LCD_SPU_CBSH_HUE			0x01B4
+#define     CFG_SIN0(sin0)			(sin0<<16)
+#define     CFG_SIN0_MASK			0xFFFF0000
+#define     CFG_COS0(con0)			(con0)
+#define     CFG_COS0_MASK			0x0000FFFF
+
+/* Dump LCD Panel Control Register */
+#define LCD_SPU_DUMB_CTRL			0x01B8
+#define     CFG_DUMBMODE(mode)			(mode<<28)
+#define     CFG_DUMBMODE_MASK			0xF0000000
+#define     CFG_LCDGPIO_O(data)			(data<<20)
+#define     CFG_LCDGPIO_O_MASK			0x0FF00000
+#define     CFG_LCDGPIO_ENA(gpio)		(gpio<<12)
+#define     CFG_LCDGPIO_ENA_MASK		0x000FF000
+#define     CFG_BIAS_OUT(bias)			(bias<<8)
+#define     CFG_BIAS_OUT_MASK			0x00000100
+#define     CFG_REVERSE_RGB(rRGB)		(rRGB<<7)
+#define     CFG_REVERSE_RGB_MASK		0x00000080
+#define     CFG_INV_COMPBLANK(blank)		(blank<<6)
+#define     CFG_INV_COMPBLANK_MASK		0x00000040
+#define     CFG_INV_COMPSYNC(sync)		(sync<<5)
+#define     CFG_INV_COMPSYNC_MASK		0x00000020
+#define     CFG_INV_HENA(hena)			(hena<<4)
+#define     CFG_INV_HENA_MASK			0x00000010
+#define     CFG_INV_VSYNC(vsync)		(vsync<<3)
+#define     CFG_INV_VSYNC_MASK			0x00000008
+#define     CFG_INV_HSYNC(hsync)		(hsync<<2)
+#define     CFG_INV_HSYNC_MASK			0x00000004
+#define     CFG_INV_PCLK(pclk)			(pclk<<1)
+#define     CFG_INV_PCLK_MASK			0x00000002
+#define     CFG_DUMB_ENA(dumb)			(dumb)
+#define     CFG_DUMB_ENA_MASK			0x00000001
+
+/* LCD I/O Pads Control Register */
+#define SPU_IOPAD_CONTROL			0x01BC
+#define     CFG_GRA_VM_ENA(vm)			(vm<<15)        /* gfx */
+#define     CFG_GRA_VM_ENA_MASK			0x00008000
+#define     CFG_DMA_VM_ENA(vm)			(vm<<13)	/* video */
+#define     CFG_DMA_VM_ENA_MASK			0x00002000
+#define     CFG_CMD_VM_ENA(vm)			(vm<<13)
+#define     CFG_CMD_VM_ENA_MASK			0x00000800
+#define     CFG_CSC(csc)			(csc<<8)	/* csc */
+#define     CFG_CSC_MASK			0x00000300
+#define     CFG_AXICTRL(axi)			(axi<<4)
+#define     CFG_AXICTRL_MASK			0x000000F0
+#define     CFG_IOPADMODE(iopad)		(iopad)
+#define     CFG_IOPADMODE_MASK			0x0000000F
+
+/* LCD Interrupt Control Register */
+#define SPU_IRQ_ENA				0x01C0
+#define     DMA_FRAME_IRQ0_ENA(irq)		(irq<<31)
+#define     DMA_FRAME_IRQ0_ENA_MASK		0x80000000
+#define     DMA_FRAME_IRQ1_ENA(irq)		(irq<<30)
+#define     DMA_FRAME_IRQ1_ENA_MASK		0x40000000
+#define     DMA_FF_UNDERFLOW_ENA(ff)		(ff<<29)
+#define     DMA_FF_UNDERFLOW_ENA_MASK		0x20000000
+#define     GRA_FRAME_IRQ0_ENA(irq)		(irq<<27)
+#define     GRA_FRAME_IRQ0_ENA_MASK		0x08000000
+#define     GRA_FRAME_IRQ1_ENA(irq)		(irq<<26)
+#define     GRA_FRAME_IRQ1_ENA_MASK		0x04000000
+#define     GRA_FF_UNDERFLOW_ENA(ff)		(ff<<25)
+#define     GRA_FF_UNDERFLOW_ENA_MASK		0x02000000
+#define     VSYNC_IRQ_ENA(vsync_irq)		(vsync_irq<<23)
+#define     VSYNC_IRQ_ENA_MASK			0x00800000
+#define     DUMB_FRAMEDONE_ENA(fdone)		(fdone<<22)
+#define     DUMB_FRAMEDONE_ENA_MASK		0x00400000
+#define     TWC_FRAMEDONE_ENA(fdone)		(fdone<<21)
+#define     TWC_FRAMEDONE_ENA_MASK		0x00200000
+#define     HWC_FRAMEDONE_ENA(fdone)		(fdone<<20)
+#define     HWC_FRAMEDONE_ENA_MASK		0x00100000
+#define     SLV_IRQ_ENA(irq)			(irq<<19)
+#define     SLV_IRQ_ENA_MASK			0x00080000
+#define     SPI_IRQ_ENA(irq)			(irq<<18)
+#define     SPI_IRQ_ENA_MASK			0x00040000
+#define     PWRDN_IRQ_ENA(irq)			(irq<<17)
+#define     PWRDN_IRQ_ENA_MASK			0x00020000
+#define     ERR_IRQ_ENA(irq)			(irq<<16)
+#define     ERR_IRQ_ENA_MASK			0x00010000
+#define     CLEAN_SPU_IRQ_ISR(irq)		(irq)
+#define     CLEAN_SPU_IRQ_ISR_MASK		0x0000FFFF
+
+/* LCD Interrupt Status Register */
+#define SPU_IRQ_ISR				0x01C4
+#define     DMA_FRAME_IRQ0(irq)			(irq<<31)
+#define     DMA_FRAME_IRQ0_MASK			0x80000000
+#define     DMA_FRAME_IRQ1(irq)			(irq<<30)
+#define     DMA_FRAME_IRQ1_MASK			0x40000000
+#define     DMA_FF_UNDERFLOW(ff)		(ff<<29)
+#define     DMA_FF_UNDERFLOW_MASK		0x20000000
+#define     GRA_FRAME_IRQ0(irq)			(irq<<27)
+#define     GRA_FRAME_IRQ0_MASK			0x08000000
+#define     GRA_FRAME_IRQ1(irq)			(irq<<26)
+#define     GRA_FRAME_IRQ1_MASK			0x04000000
+#define     GRA_FF_UNDERFLOW(ff)		(ff<<25)
+#define     GRA_FF_UNDERFLOW_MASK		0x02000000
+#define     VSYNC_IRQ(vsync_irq)		(vsync_irq<<23)
+#define     VSYNC_IRQ_MASK			0x00800000
+#define     DUMB_FRAMEDONE(fdone)		(fdone<<22)
+#define     DUMB_FRAMEDONE_MASK			0x00400000
+#define     TWC_FRAMEDONE(fdone)		(fdone<<21)
+#define     TWC_FRAMEDONE_MASK			0x00200000
+#define     HWC_FRAMEDONE(fdone)		(fdone<<20)
+#define     HWC_FRAMEDONE_MASK			0x00100000
+#define     SLV_IRQ(irq)			(irq<<19)
+#define     SLV_IRQ_MASK			0x00080000
+#define     SPI_IRQ(irq)			(irq<<18)
+#define     SPI_IRQ_MASK			0x00040000
+#define     PWRDN_IRQ(irq)			(irq<<17)
+#define     PWRDN_IRQ_MASK			0x00020000
+#define     ERR_IRQ(irq)			(irq<<16)
+#define     ERR_IRQ_MASK			0x00010000
+/* read-only */
+#define     DMA_FRAME_IRQ0_LEVEL_MASK		0x00008000
+#define     DMA_FRAME_IRQ1_LEVEL_MASK		0x00004000
+#define     DMA_FRAME_CNT_ISR_MASK		0x00003000
+#define     GRA_FRAME_IRQ0_LEVEL_MASK		0x00000800
+#define     GRA_FRAME_IRQ1_LEVEL_MASK		0x00000400
+#define     GRA_FRAME_CNT_ISR_MASK		0x00000300
+#define     VSYNC_IRQ_LEVEL_MASK		0x00000080
+#define     DUMB_FRAMEDONE_LEVEL_MASK		0x00000040
+#define     TWC_FRAMEDONE_LEVEL_MASK		0x00000020
+#define     HWC_FRAMEDONE_LEVEL_MASK		0x00000010
+#define     SLV_FF_EMPTY_MASK			0x00000008
+#define     DMA_FF_ALLEMPTY_MASK		0x00000004
+#define     GRA_FF_ALLEMPTY_MASK		0x00000002
+#define     PWRDN_IRQ_LEVEL_MASK		0x00000001
+
+/*
+ * interrupt definition.
+ */
+#define DOVEFB_VSYNC_INT_MASK	(VSYNC_IRQ_ENA_MASK)
+#define DOVEFB_VID_INT_MASK	(DMA_FRAME_IRQ0_ENA_MASK |\
+				DMA_FRAME_IRQ1_ENA_MASK)
+#define DOVEFB_GFX_INT_MASK	(GRA_FRAME_IRQ0_ENA_MASK |\
+				GRA_FRAME_IRQ1_ENA_MASK)
+
+/*
+ * defined Video Memory Color format for DMA control 0 register
+ * DMA0 bit[23:20]
+ */
+#define VMODE_RGB565                    0x0
+#define VMODE_RGB1555                   0x1
+#define VMODE_RGB888PACKED              0x2
+#define VMODE_RGB888UNPACKED            0x3
+#define VMODE_RGBA888                   0x4
+#define VMODE_YUV422PACKED              0x5
+#define VMODE_YUV422PLANAR              0x6
+#define VMODE_YUV420PLANAR              0x7
+#define VMODE_SMPNCMD                   0x8
+#define VMODE_PALETTE4BIT               0x9
+#define VMODE_PALETTE8BIT               0xa
+#define VMODE_RESERVED                  0xb
+
+/*
+ * defined Graphic Memory Color format for DMA control 0 register
+ * DMA0 bit[19:16]
+ */
+#define GMODE_RGB565                    0x0
+#define GMODE_RGB1555                   0x1
+#define GMODE_RGB888PACKED              0x2
+#define GMODE_RGB888UNPACKED            0x3
+#define GMODE_RGBA888                   0x4
+#define GMODE_YUV422PACKED              0x5
+#define GMODE_YUV422PLANAR              0x6
+#define GMODE_YUV420PLANAR              0x7
+#define GMODE_SMPNCMD                   0x8
+#define GMODE_PALETTE4BIT               0x9
+#define GMODE_PALETTE8BIT               0xa
+#define GMODE_RESERVED                  0xb
+
+/*
+ * define for DMA control 1 register
+ */
+#define DMA1_FRAME_TRIG             31      /* bit location */
+#define DMA1_VSYNC_MODE             28
+#define DMA1_VSYNC_INV              27
+#define DMA1_CKEY                   24
+#define DMA1_CARRY                  23
+#define DMA1_LNBUF_ENA              22
+#define DMA1_GATED_ENA              21
+#define DMA1_PWRDN_ENA              20
+#define DMA1_DSCALE                 18
+#define DMA1_ALPHA_MODE             16
+#define DMA1_ALPHA                  08
+#define DMA1_PXLCMD                 00
+
+/*
+ * defined for Configure Dumb Mode
+ * DUMB LCD Panel bit[31:28]
+ */
+#define DUMB16_RGB565_0             0x0
+#define DUMB16_RGB565_1             0x1
+#define DUMB18_RGB666_0             0x2
+#define DUMB18_RGB666_1             0x3
+#define DUMB12_RGB444_0             0x4
+#define DUMB12_RGB444_1             0x5
+#define DUMB24_RGB888_0             0x6
+#define DUMB_BLANK                  0x7
+
+/*
+ * defined for Configure I/O Pin Allocation Mode
+ * LCD LCD I/O Pads control register bit[3:0]
+ */
+#define IOPAD_DUMB24                0x0
+#define IOPAD_DUMB18SPI             0x1
+#define IOPAD_DUMB18GPIO            0x2
+#define IOPAD_DUMB16SPI             0x3
+#define IOPAD_DUMB16GPIO            0x4
+#define IOPAD_DUMB12                0x5
+#define IOPAD_SMART18SPI            0x6
+#define IOPAD_SMART16SPI            0x7
+#define IOPAD_SMART8BOTH            0x8
+
+/*
+ * defined Dumb Panel Clock Divider register
+ * SCLK_Source bit[31]
+ */
+#define AXI_BUS_SEL                 0x80000000 /* 0: PLL clock select*/
+#define CCD_CLK_SEL                 0x40000000
+#define DCON_CLK_SEL                0x20000000
+#define ENA_CLK_INT_DIV             CONFIG_FB_DOVE_CLCD_SCLK_DIV
+#define IDLE_CLK_INT_DIV            0x1      /* idle Integer Divider */
+#define DIS_CLK_INT_DIV             0x0      /* Disable Integer Divider */
+
+/* SRAM ID */
+#define SRAMID_gamma_yr             0x0
+#define SRAMID_gamma_ug             0x1
+#define SRAMID_gamma_vb             0x2
+#define SRAMID_palette              0x3
+#define SRAMID_hwc                  0xf
+
+/* SRAM INIT Read/Write */
+#define SRAMID_INIT_READ			0x0
+#define SRAMID_INIT_WRITE			0x2
+#define SRAMID_INIT_DEFAULT			0x3
+
+/*
+ * defined VSYNC selection mode for DMA control 1 register
+ * DMA1 bit[30:28]
+ */
+#define VMODE_SMPN                  0x0
+#define VMODE_SMPNIRQ               0x1
+#define VMODE_DUMB                  0x2
+#define VMODE_IPE                   0x3
+#define VMODE_IRE                   0x4
+
+/*
+ * defined Configure Alpha and Alpha mode for DMA control 1 register
+ * DMA1 bit[15:08](alpha) / bit[17:16](alpha mode)
+ */
+/* ALPHA mode */
+#define MODE_ALPHA_DMA              0x0
+#define MODE_ALPHA_GRA              0x1
+#define MODE_ALPHA_CFG              0x2
+
+/* alpha value */
+#define ALPHA_NOGRAPHIC		0xFF      /* all video, no graphic */
+#define ALPHA_NOVIDEO		0x00      /* all graphic, no video */
+#define ALPHA_GRAPHnVIDEO	0x0F      /* Selects graphic & video */
+
+/*
+ * defined Pixel Command for DMA control 1 register
+ * DMA1 bit[07:00]
+ */
+#define PIXEL_CMD                  0x81
+#endif
--- linux-mvl-dove-2.6.32.orig/include/video/dovefb.h
+++ linux-mvl-dove-2.6.32/include/video/dovefb.h
@@ -0,0 +1,491 @@
+/*
+ * linux/include/video/dovefb.h -- Marvell frame buffer for DOVE
+ *
+ *
+ * Copyright (C) Marvell Semiconductor Company.  All rights reserved.
+ *
+ * Written by Green Wan <gwan@marvell.com>
+ *
+ * Adapted from:  linux/drivers/video/skeletonfb.c
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive for
+ * more details.
+ *
+ */
+#ifndef _DOVEFB_H_
+#define _DOVEFB_H_
+
+/* ---------------------------------------------- */
+/*              Header Files                      */
+/* ---------------------------------------------- */
+#include <linux/fb.h>
+
+/* ---------------------------------------------- */
+/*              IOCTL Definition                  */
+/* ---------------------------------------------- */
+#define DOVEFB_IOC_MAGIC			'm'
+#define DOVEFB_IOCTL_CONFIG_CURSOR		_IO(DOVEFB_IOC_MAGIC, 0)
+#define DOVEFB_IOCTL_DUMP_REGS			_IO(DOVEFB_IOC_MAGIC, 1)
+#define DOVEFB_IOCTL_CLEAR_IRQ			_IO(DOVEFB_IOC_MAGIC, 2)
+
+/*
+ * There are many video mode supported.
+ */
+#define DOVEFB_IOCTL_SET_VIDEO_MODE		_IO(DOVEFB_IOC_MAGIC, 3)
+#define DOVEFB_IOCTL_GET_VIDEO_MODE		_IO(DOVEFB_IOC_MAGIC, 4)
+/* Request a new video buffer from driver. User program needs to free
+ * this memory.
+ */
+#define DOVEFB_IOCTL_CREATE_VID_BUFFER		_IO(DOVEFB_IOC_MAGIC, 5)
+
+/* Configure viewport in driver. */
+#define DOVEFB_IOCTL_SET_VIEWPORT_INFO		_IO(DOVEFB_IOC_MAGIC, 6)
+#define DOVEFB_IOCTL_GET_VIEWPORT_INFO		_IO(DOVEFB_IOC_MAGIC, 7)
+
+/* Flip the video buffer from user mode. Vide buffer can be separated into:
+ * a. Current-used buffer - user program put any data into it. It will be
+ *    displayed immediately.
+ * b. Requested from driver but not current-used - user programe can put any
+ *    data into it. It will be displayed after calling
+ *    DOVEFB_IOCTL_FLIP_VID_BUFFER.
+ *    User program should free this memory when they don't use it any more.
+ * c. User program alloated - user program can allocated a contiguos DMA
+ *    buffer to store its video data. And flip it to driver. Notices that
+ *    this momory should be free by user programs. Driver won't take care of
+ *    this.
+ */
+#define DOVEFB_IOCTL_FLIP_VID_BUFFER		_IO(DOVEFB_IOC_MAGIC, 8)
+
+/* Get the current buffer information. User program could use it to display
+ * anything directly. If developer wants to allocate multiple video layers,
+ * try to use DOVEFB_IOCTL_CREATE_VID_BUFFER  to request a brand new video
+ * buffer.
+ */
+#define DOVEFB_IOCTL_GET_BUFF_ADDR		_IO(DOVEFB_IOC_MAGIC, 9)
+
+/* Get/Set offset position of screen */
+#define DOVEFB_IOCTL_SET_VID_OFFSET		_IO(DOVEFB_IOC_MAGIC, 10)
+#define DOVEFB_IOCTL_GET_VID_OFFSET		_IO(DOVEFB_IOC_MAGIC, 11)
+
+/* Turn on the memory toggle function to improve the frame rate while playing
+ * movie.
+ */
+#define DOVEFB_IOCTL_SET_MEMORY_TOGGLE		_IO(DOVEFB_IOC_MAGIC, 12)
+
+/* Turn on the memory toggle function to improve the frame rate while playing
+ * movie.
+ */
+#define DOVEFB_IOCTL_SET_COLORKEYnALPHA		_IO(DOVEFB_IOC_MAGIC, 13)
+#define DOVEFB_IOCTL_GET_COLORKEYnALPHA		_IO(DOVEFB_IOC_MAGIC, 14)
+#define DOVEFB_IOCTL_SWITCH_GRA_OVLY		_IO(DOVEFB_IOC_MAGIC, 15)
+#define DOVEFB_IOCTL_SWITCH_VID_OVLY		_IO(DOVEFB_IOC_MAGIC, 16)
+
+/* For Vmeta integration */
+#define DOVEFB_IOCTL_GET_FREELIST		_IO(DOVEFB_IOC_MAGIC, 17)
+
+/* Wait for vsync happen. */
+#define DOVEFB_IOCTL_WAIT_VSYNC			_IO(DOVEFB_IOC_MAGIC, 18)
+
+/* for xv+vmeta/sw decoder w/o memory move. */
+#define DOVEFB_IOCTL_GET_FBPA			_IO(DOVEFB_IOC_MAGIC, 19)
+#define DOVEFB_IOCTL_GET_FBID			_IO(DOVEFB_IOC_MAGIC, 20)
+#define DOVEFB_IOCTL_SET_SRC_MODE		_IO(DOVEFB_IOC_MAGIC, 21)
+#define DOVEFB_IOCTL_GET_SRC_MODE		_IO(DOVEFB_IOC_MAGIC, 22)
+
+/* Dynamic get EDID data */
+#define DOVEFB_IOCTL_GET_EDID_INFO		_IO(DOVEFB_IOC_MAGIC, 23)
+#define DOVEFB_IOCTL_GET_EDID_DATA		_IO(DOVEFB_IOC_MAGIC, 24)
+#define DOVEFB_IOCTL_SET_EDID_INTERVAL		_IO(DOVEFB_IOC_MAGIC, 25)
+
+/* clear framebuffer: Makes resolution or color space changes look nicer */
+#define FBIO_CLEAR_FRAMEBUFFER			_IO(FB_IOC_MAGIC, 19)
+
+/* Global alpha blend controls - Maintaining compatibility with existing
+   user programs. */
+#define FBIOPUT_VIDEO_ALPHABLEND            0xeb
+#define FBIOPUT_GLOBAL_ALPHABLEND           0xe1
+#define FBIOPUT_GRAPHIC_ALPHABLEND          0xe2
+
+/* color swapping */
+#define FBIOPUT_SWAP_GRAPHIC_RED_BLUE       0xe3
+#define FBIOPUT_SWAP_GRAPHIC_U_V            0xe4
+#define FBIOPUT_SWAP_GRAPHIC_Y_UV           0xe5
+#define FBIOPUT_SWAP_VIDEO_RED_BLUE         0xe6
+#define FBIOPUT_SWAP_VIDEO_U_V              0xe7
+#define FBIOPUT_SWAP_VIDEO_Y_UV             0xe8
+
+/* colorkey compatibility */
+#define FBIOGET_CHROMAKEYS                  0xe9
+#define FBIOPUT_CHROMAKEYS                  0xea
+
+#define DOVEFB_VMODE_RGB565			0x100
+#define DOVEFB_VMODE_BGR565			0x101
+#define DOVEFB_VMODE_RGB1555			0x102
+#define DOVEFB_VMODE_BGR1555			0x103
+#define DOVEFB_VMODE_RGB888PACK			0x104
+#define DOVEFB_VMODE_BGR888PACK			0x105
+#define DOVEFB_VMODE_RGB888UNPACK		0x106
+#define DOVEFB_VMODE_BGR888UNPACK		0x107
+#define DOVEFB_VMODE_RGBA888			0x108
+#define DOVEFB_VMODE_BGRA888			0x109
+
+#define	DOVEFB_VMODE_YUV422PACKED		0x0
+#define	DOVEFB_VMODE_YUV422PACKED_SWAPUV	0x1
+#define	DOVEFB_VMODE_YUV422PACKED_SWAPYUorV	0x2
+#define	DOVEFB_VMODE_YUV422PLANAR		0x3
+#define	DOVEFB_VMODE_YUV422PLANAR_SWAPUV	0x4
+#define	DOVEFB_VMODE_YUV422PLANAR_SWAPYUorV	0x5
+#define	DOVEFB_VMODE_YUV420PLANAR		0x6
+#define	DOVEFB_VMODE_YUV420PLANAR_SWAPUV	0x7
+#define	DOVEFB_VMODE_YUV420PLANAR_SWAPYUorV	0x8
+
+#define	DOVEFB_HWCMODE_1BITMODE			0x0
+#define	DOVEFB_HWCMODE_2BITMODE			0x1
+
+#define	DOVEFB_DISABLE_COLORKEY_MODE		0x0
+#define	DOVEFB_ENABLE_Y_COLORKEY_MODE		0x1
+#define	DOVEFB_ENABLE_U_COLORKEY_MODE		0x2
+#define	DOVEFB_ENABLE_V_COLORKEY_MODE		0x4
+#define	DOVEFB_ENABLE_RGB_COLORKEY_MODE		0x3
+#define	DOVEFB_ENABLE_R_COLORKEY_MODE		0x5
+#define	DOVEFB_ENABLE_G_COLORKEY_MODE		0x6
+#define	DOVEFB_ENABLE_B_COLORKEY_MODE		0x7
+
+#define DOVEFB_VID_PATH_ALPHA               0x0
+#define DOVEFB_GRA_PATH_ALPHA               0x1
+#define DOVEFB_CONFIG_ALPHA                 0x2
+
+#define DOVEFB_SYNC_COLORKEY_TO_CHROMA          1
+#define DOVEFB_SYNC_CHROMA_TO_COLORKEY          2
+
+/* Compatible to pxa168. */
+#define FB_IOCTL_SET_COLORKEYnALPHA            _IO(FB_IOC_MAGIC, 13)
+#define FB_IOCTL_GET_COLORKEYnALPHA            _IO(FB_IOC_MAGIC, 14)
+#define FB_VID_PATH_ALPHA               0x0
+#define FB_GRA_PATH_ALPHA               0x1
+#define FB_CONFIG_ALPHA                 0x2
+
+#define FB_SYNC_COLORKEY_TO_CHROMA          1
+#define FB_SYNC_CHROMA_TO_COLORKEY          2
+
+#define DOVEFB_FB_NUM		2
+
+/* ---------------------------------------------- */
+/*              Data Structure                    */
+/* ---------------------------------------------- */
+struct _sEdidInfo {
+	int connect;			/* is monitor connected */
+	int change;			/* is edid data changed */
+	int extension;			/* the number of extension edid block */
+	int interval;			/* the interval to check edid */
+};
+/*
+ * The follow structures are used to pass data from
+ * user space into the kernel for the creation of
+ * overlay surfaces and setting the video mode.
+ */
+
+#define DOVEFBVideoMode signed int
+
+struct _sViewPortInfo {
+	unsigned short srcWidth;	/* video source size */
+	unsigned short srcHeight;
+	unsigned short zoomXSize;	/* size after zooming */
+	unsigned short zoomYSize;
+	unsigned short ycPitch;
+	unsigned short uvPitch;
+};
+
+struct _sViewPortOffset {
+	unsigned short xOffset;		/* position on screen */
+	unsigned short yOffset;
+};
+
+struct _sVideoBufferAddr {
+	unsigned char	frameID;	/* which frame wants */
+	unsigned char *startAddr;	/* new buffer (PA) */
+	unsigned char *inputData;	/* input buf address (VA) */
+	unsigned int length;		/* input data's length */
+};
+
+struct dovefb_chroma {
+        u_char     mode;
+        u_char     y_alpha;
+        u_char     y;
+        u_char     y1;
+        u_char     y2;
+        u_char     u_alpha;
+        u_char     u;
+        u_char     u1;
+        u_char     u2;
+        u_char     v_alpha;
+        u_char     v;
+        u_char     v1;
+        u_char     v2;
+};
+
+struct _sColorKeyNAlpha {
+        unsigned int mode;
+        unsigned int alphapath;
+        unsigned int config;
+        unsigned int Y_ColorAlpha;
+        unsigned int U_ColorAlpha;
+        unsigned int V_ColorAlpha;
+};
+
+struct _sOvlySurface {
+	DOVEFBVideoMode videoMode;
+	struct _sViewPortInfo viewPortInfo;
+	struct _sViewPortOffset viewPortOffset;
+	struct _sVideoBufferAddr videoBufferAddr;
+};
+
+struct _sCursorConfig {
+	unsigned char	enable;		/* enable cursor or not */
+	unsigned char	mode;		/* 1bit or 2bit mode */
+	unsigned int color1;		/* foreground color */
+	unsigned int color2;		/* background color */
+	unsigned short xoffset;
+	unsigned short yoffset;
+	unsigned short	width;
+	unsigned short height;
+	unsigned char *pBuffer;		/* cursor data */
+};
+
+#define SHM_NORMAL		0x01
+#define SHM_VMETA		0x02
+#define SHM_SOFTWARE_MAP	0x04
+
+struct shm_private_info {
+	unsigned int method;
+	unsigned int fbid;
+	unsigned int format;
+	unsigned int width;
+	unsigned int height;
+	unsigned long fb_pa;
+};
+
+/* MAX bytes per yuv pixel. */
+#define MAX_YUV_PIXEL	2
+
+/* Dumb interface */
+#define DOVEFB_PINS_DUMB_24		0
+#define DOVEFB_PINS_DUMB_18_SPI		1
+#define DOVEFB_PINS_DUMB_18_GPIO	2
+#define DOVEFB_PINS_DUMB_16_SPI		3
+#define DOVEFB_PINS_DUMB_16_GPIO	4
+#define DOVEFB_PINS_DUMB_12_SPI_GPIO	5
+#define DOVEFB_PINS_SMART_18_SPI	6
+#define DOVEFB_PINS_SMART_16_SPI	7
+#define DOVEFB_PINS_SMART_8_SPI_GPIO	8
+
+/* Dumb interface pin allocation */
+#define DOVEFB_DUMB_PANEL_RGB565	0
+#define DOVEFB_DUMB_PANEL_RGB565_UPPER	1
+#define DOVEFB_DUMB_PANEL_RGB666	2
+#define DOVEFB_DUMB_PANEL_RGB666_UPPER	3
+#define DOVEFB_DUMB_PANEL_RGB444	4
+#define DOVEFB_DUMB_PANEL_RGB444_UPPER	5
+#define DOVEFB_DUMB_PANEL_RGB888	6
+
+/* Max fb buffer. 1048x2048-32bits */
+#define DEFAULT_FB_SIZE	(1024 * 2048 * 4)
+
+/*
+ * Buffer pixel format
+ * bit0 is for rb swap.
+ * bit12 is for Y UorV swap
+ */
+#define PIX_FMT_RGB565		0
+#define PIX_FMT_BGR565		1
+#define PIX_FMT_RGB1555		2
+#define PIX_FMT_BGR1555		3
+#define PIX_FMT_RGB888PACK	4
+#define PIX_FMT_BGR888PACK	5
+#define PIX_FMT_RGB888UNPACK	6
+#define PIX_FMT_BGR888UNPACK	7
+#define PIX_FMT_RGBA888		8
+#define PIX_FMT_BGRA888		9
+#define PIX_FMT_YUV422PACK	10
+#define PIX_FMT_YVU422PACK	11
+#define PIX_FMT_YUV422PLANAR	12
+#define PIX_FMT_YVU422PLANAR	13
+#define PIX_FMT_YUV420PLANAR	14
+#define PIX_FMT_YVU420PLANAR	15
+#define PIX_FMT_PSEUDOCOLOR	20
+#define PIX_FMT_UYVY422PACK	(0x1000|PIX_FMT_YUV422PACK)
+
+#ifdef __KERNEL__
+#include <linux/interrupt.h>
+
+enum dovefb_type {
+	DOVEFB_GFX_PLANE,
+	DOVEFB_OVLY_PLANE
+};
+
+#define MRVL_AXI_CLK		0
+#define MRVL_EXT_CLK0	1
+#define MRVL_PLL_CLK		2
+#define MRVL_EXT_CLK1	3
+
+struct dovefb_layer_info {
+	struct device		*dev;
+	enum dovefb_type	type;
+	struct dovefb_info	*info;
+	struct fb_info		*fb_info;
+
+	void			*reg_base;
+
+	unsigned long		new_addr;
+	dma_addr_t		fb_start_dma;
+	void			*fb_start;
+	int			fb_size;
+	atomic_t		w_intr;
+	wait_queue_head_t	w_intr_wq;
+	struct mutex		access_ok;
+	struct _sOvlySurface	surface;
+	struct _sColorKeyNAlpha ckey_alpha;
+
+	unsigned char		*hwc_buf;
+	unsigned int		pseudo_palette[16];
+	struct tasklet_struct	tasklet;
+	char			*mode_option;
+
+	int			ddc_polling_disable;
+	struct timer_list	get_edid_timer;
+	unsigned char*		raw_edid;
+	struct _sEdidInfo	edid_info;
+	struct work_struct      work_queue;
+
+	int			pix_fmt;
+	unsigned		is_blanked:1;
+	unsigned		cursor_enabled:1;
+	unsigned		cursor_cfg:1;
+	unsigned		active:1;
+	unsigned		enabled:1;
+	unsigned                checkbuf_timer_exist:1;
+
+	/*
+	 * 0: DMA mem is from DMA region.
+	 * 1: DMA mem is from normal region.
+	 */
+	unsigned		mem_status:1;
+
+	/*
+	 * current frame id for mapping to user.
+	 */
+	int			cur_fbid;
+	int			src_mode;
+
+	unsigned int		reserved;
+};
+
+/*
+ * Dove LCD controller private state.
+ */
+struct dovefb_info {
+	struct device			*dev;
+	int				id;
+
+	void				*reg_base;
+	struct dovefb_layer_info	*gfx_plane;
+	struct dovefb_layer_info	*vid_plane;
+
+	struct fb_videomode		dft_vmode;
+	struct fb_videomode		out_vmode;
+	int				fixed_output;
+
+	char				*mode_option;
+	struct clk			*clk;
+	int				clk_src;
+	int				io_pin_allocation;
+
+	int			pix_fmt;
+	unsigned		edid:1;
+	unsigned		panel_rbswap:1;
+	unsigned		edid_en:1;
+
+        /* Hardware cursor related registers */
+	unsigned int LCD_SPU_HWC_HPXL_VLN_saved_value;
+	unsigned int LCD_SPU_ALPHA_COLOR1_saved_value;
+	unsigned int LCD_SPU_ALPHA_COLOR2_saved_value;
+
+	/* Colorkey related registers */
+	unsigned int LCD_SPU_COLORKEY_Y_saved_value;
+	unsigned int LCD_SPU_COLORKEY_U_saved_value;
+	unsigned int LCD_SPU_COLORKEY_V_saved_value;
+	unsigned int LCD_SPU_DMA_CTRL1_saved_value;
+	unsigned int LCD_SPU_ADV_REG_saved_value;
+};
+
+/*
+ * Dove fb machine information
+ */
+struct dovefb_mach_info {
+	char		id_gfx[16];
+	char		id_ovly[16];
+	int		clk_src;
+	int		accurate_clk;
+	char		*clk_name;
+	int		num_modes;
+	struct fb_videomode *modes;
+
+	/*
+	 * Pix_fmt
+	 */
+	unsigned	pix_fmt;
+
+	/*
+	 * I/O pin allocation.
+	 */
+	unsigned	io_pin_allocation:4;
+	/*
+	 * auto poll EDID data periodically
+	 */
+	unsigned ddc_polling_disable:1;
+
+	/*
+	 * I2C bus and address to read DDC data through. -1 not available
+	 */
+	int		ddc_i2c_adapter;
+	int		ddc_i2c_address;
+
+
+	/*
+	 * Dumb panel -- assignment of R/G/B component info to the 24
+	 * available external data lanes.
+	 */
+	unsigned	panel_rgb_type:4;
+	unsigned	panel_rgb_reverse_lanes:1;
+
+	/*
+	 * Dumb panel -- GPIO output data.
+	 */
+	unsigned	gpio_output_mask:8;
+	unsigned	gpio_output_data:8;
+
+	/*
+	 * Dumb panel -- configurable output signal polarity.
+	 */
+	unsigned	invert_composite_blank:1;
+	unsigned	invert_pix_val_ena:1;
+	unsigned	invert_pixclock:1;
+	unsigned	invert_vsync:1;
+	unsigned	invert_hsync:1;
+	unsigned	panel_rbswap:1;
+	unsigned	active:1;
+	unsigned	enable_lcd0:1;
+};
+
+struct dovebl_platform_data;
+
+int clcd_platform_init(struct dovefb_mach_info *lcd0_dmi_data,
+		       struct dovefb_mach_info *lcd0_vid_dmi_data,
+		       struct dovefb_mach_info *lcd1_dmi_data,
+		       struct dovefb_mach_info *lcd1_vid_dmi_data,
+		       struct dovebl_platform_data *backlight_data);
+
+
+#endif /* _KERNEL_ */
+#endif /* _DOVEFB_H_ */
--- linux-mvl-dove-2.6.32.orig/include/video/dovefb_display.h
+++ linux-mvl-dove-2.6.32/include/video/dovefb_display.h
@@ -0,0 +1,67 @@
+/*
+ * linux/include/video/dovefb_display.h -- Marvell display configuration driver
+ *
+ * Copyright (C) Marvell Semiconductor Company.  All rights reserved.
+ *
+ * Written by Green Wan <gwan@marvell.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive for
+ * more details.
+ */
+#ifndef _DOVEDISPLAY_H_
+#define	_DOVEDISPLAY_H_
+
+#include <linux/fb.h>
+#include <video/dovedcon.h>
+#include <video/dovefb.h>
+#include <video/dovefbreg.h>
+
+#define FBIO_SET_DISPLAY_MODE  0
+#define FBIO_GET_DISPLAY_MODE  1
+#define FBIO_CONFIG_DCON       2
+#define FBIO_CONFIG_PORTA      3
+#define FBIO_CONFIG_PORTB      4
+#define FBIO_GET_DCON_STATUS   5
+
+/* PORTA mode. */
+#define PORTA_OUTPUT_LCD0      0
+//#define PORTA_OUTPUT_DUAL    1
+//#define PORTA_OUTPUT_DUAL    2
+//#define PORTA_OUTPUT_DUAL    3
+
+/* PORTB mode. */
+#define PORTB_OUTPUT_LCD1      0
+#define PORTB_OUTPUT_LCD01
+//#define PORTA_OUTPUT_DUAL    2
+//#define PORTA_OUTPUT_DUAL    3
+
+#define DISPLAY_NORMAL		0
+#define DISPLAY_CLONE		1
+#define DISPLAY_DUALVIEW	2
+#define DISPLAY_EXTENDED	3
+
+struct display_settings {
+	unsigned char display_mode;	/* 0: normal mode.
+					 * 1: clone mode.
+					 * 2: dualview mode.
+					 * 3: extended mode.
+					 */
+
+	unsigned extend_ratio;		/*
+					 * 1~4, default is 2.
+					 * 1st portion width
+					 * = src_width * (extend_ratio/4).
+					 */
+	struct fb_info *lcd0_gfx;
+	struct fb_info *lcd0_vid;
+	struct fb_info *lcd1_gfx;
+	struct fb_info *lcd1_vid;
+};
+
+
+
+#ifdef __KERNEL__
+#endif
+
+#endif
--- linux-mvl-dove-2.6.32.orig/include/video/ch7025_composite.h
+++ linux-mvl-dove-2.6.32/include/video/ch7025_composite.h
@@ -0,0 +1,49 @@
+/*
+    This driver supports Chrontel CH7025/CH7026 TV/VGA Encoder.
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; version 2 of the License.
+*/
+
+enum input_format{
+	CH7025_RGB888,
+	CH7025_RGB666,
+	CH7025_RGB565,
+	CH7025_RGB555,
+	CH7025_DVO,
+	CH7025_YCbCr422_8bit,
+	CH7025_YCbCr422_10bit,
+	CH7025_YCbCr444_8bit,
+	CH7025_Consecutive_RGB666 = 9,
+	CH7025_Consecutive_RGB565,
+	CH7025_Consecutive_RGB555
+};
+enum output_format{
+	CH7025_NTSC_M,
+	CH7025_NTSC_J,
+	CH7025_NTSC_443,
+	CH7025_PAL_B,
+	CH7025_PAL_M,
+	CH7025_PAL_N,
+	CH7025_PAL_Nc,
+	CH7025_PAL_60,
+	CH7025_VGA_OUT //we only have CVBS output on AV-D1
+};
+enum RGB_SWAP{
+	CH7025_RGB_ORDER,
+	CH7025_RBG_ORDER,	
+	CH7025_GRB_ORDER,
+	CH7025_GBR_ORDER,
+	CH7025_BRG_ORDER,
+	CH7025_BGR_ORDER,
+};
+struct input_stream_info{
+	int xres;
+	int yres;
+	enum input_format iformat;
+	enum output_format oformat;
+	enum RGB_SWAP swap;
+};
+void ch7025_set_input_stream(struct input_stream_info *info);
+void ch7025_enable(bool enable);
--- linux-mvl-dove-2.6.32.orig/include/video/dovedcon.h
+++ linux-mvl-dove-2.6.32/include/video/dovedcon.h
@@ -0,0 +1,176 @@
+/*
+ * linux/include/video/dovedcon.h -- Marvell DCON for DOVE
+ *
+ *
+ * Copyright (C) Marvell Semiconductor Company.  All rights reserved.
+ *
+ * Written by Green Wan <gwan@marvell.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive for
+ * more details.
+ */
+#ifndef _DOVEDCON_H_
+#define	_DOVEDCON_H_
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+#include <linux/tty.h>
+#include <linux/slab.h>
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+#include <linux/init.h>
+#include <linux/ioport.h>
+#include <linux/types.h>
+#include <linux/io.h>
+#include <linux/uaccess.h>
+#include <linux/clk.h>
+#include <linux/fb.h>
+#include <linux/notifier.h>
+#include <linux/device.h>
+
+#define _PA_LCD0_BYPASS	(0x00)
+#define _PA_OLPC_DCON	(0x01)		/* display lcd0. */
+#define _PA_DUAL_VIEW	(0x10)
+#define _PA_DCON_MODE	(0x11)		/* LCD0 data */
+#define _PB_LCD1_BYPASS	(0x00)
+#define _PB_LCD0_BYPASS	(0x01)
+#define _PB_RESERVED	(0x10)
+#define _PB_DCON_MODE	(0x11)		/* LCD0 data */
+
+#ifdef __KERNEL__
+
+struct dovedcon_mach_info {
+	unsigned int port_a;
+	unsigned int port_b;
+};
+
+struct dovedcon_info {
+	void			*reg_base;
+	struct clk		*clk;
+	struct notifier_block fb_notif;
+	unsigned int port_a;
+	unsigned int port_b;
+};
+
+#define to_dcon_device(obj) container_of(obj, struct dovedcon_info, dev)
+
+/* Register map */
+#define DCON_CTRL0			0x000
+#define DCON_CTRL1			0x008
+#define DCON_DITHER_RED			0x050
+#define	DCON_DITHER_GREEN		0x054
+#define	DCON_DITHER_BLUE		0x058
+#define	DCON_DITHER_PATTERN_R_LOW	0x060
+#define	DCON_DITHER_PATTERN_R_HIGH	0x064
+#define	DCON_DITHER_PATTERN_G_LOW	0x068
+#define	DCON_DITHER_PATTERN_G_HIGH	0x06c
+#define	DCON_DITHER_PATTERN_B_LOW	0x070
+#define	DCON_DITHER_PATTERN_B_HIGH	0x074
+#define DCON_VGA_DAC_CTRL		0x080
+#define DCON_VGA_DAC_CHANNEL_A_CTRL	0x084
+#define DCON_VGA_DAC_CHANNEL_B_CTRL	0x088
+#define DCON_VGA_DAC_CHANNEL_C_CTRL	0x08c
+#define DCON_VGA_DAC_CHANNEL_A_STATUS	0x090
+#define DCON_VGA_DAC_CHANNEL_B_STATUS	0x094
+#define DCON_VGA_DAC_CHANNEL_C_STATUS	0x098
+#define DCON_DUAL_VIEW_CTRL		0x0A0
+#define DCON_CT_LUT_INDEX		0x0A4
+#define DCON_CT_LUT_DATA		0x0A8
+
+/* bit field & operation macros.*/
+/* offset 0x000, control register 0. */
+#define _LCD1_CLK		(0x1<<27)
+#define _LCD0_CLK		(0x1<<26)
+#define _VGA_CLK		(0x1<<25)
+#define _DCON_CLK		(0x1<<24)
+#define _DCON_RST		(0x1<<23)
+#define _OUT_DELAY		(0x1<<22)
+#define _DV_MODE(mode)		(mode<<18)
+	#define	_DV_DISABLE	0x000
+	#define	_DV_COMPOSITE	0x001
+	#define	_DV_COLOR_RDR	0x011
+	#define	_DV_LUT_TALK	0x101
+	#define	_DV_FRC_LUT	0x111
+#define _SMAB_DATAI		(0x1<<16)
+#define _SMAB_DATAOE		(0x1<<15)
+#define _SMAB_DATAO		(0x1<<14)
+#define _SMAB_CLKI		(0x1<<13)
+#define _SMAB_CLKOE		(0x1<<12)
+#define _SMAB_CLKO		(0x1<<11)
+#define _PORTB_SEL(mode)	(mode<<8)
+#define _PORTA_SEL(mode)	(mode<<6)
+#define _DCON_STATUS1		(0x1<<3)
+#define _DCON_STATUS0		(0x1<<2)
+#define _MONO_LUMI		(0x1<<2)
+#define _COLOR_AA		(0x1<<1)
+#define _DCON_BLANK		(0x1<<1)
+#define _COLOR_SWIZZING		(0x1<<0)
+#define _DCON_LOAD		(0x1<<0)
+
+
+/* offset 0x008, control register 1. */
+#define _BACK_LIGHT_CTRL(v)	(v<<16)		/* in OLPC Panel Mode. */
+
+/* offset 0x050/0x054/0x058, dither for R/G/B pixel */
+#define _DITHER_BITS(len)	(len<<8)
+#define _DITHER_SHIFT(offset)	(offset<<1)
+#define _DITHER_EN		(0x1<<0)
+
+/* offset 0x060~0x074, dither pattern for RGB. Max length 64bits. */
+
+/* offset 0x080, VGA DAC CTRL*/
+#define _TST_BITS(ctrl)		(ctrl<<4)
+#define _GDAC_LATCH_EN		(0x1<<3)
+#define _PD_IREFP		(0x1<<2)		/* poly-P */
+#define _PD_IREFC		(0x1<<1)		/* Reference external */
+#define _PD_bg			(0x1<<0)		/* bandgap */
+
+/* offset, 0x084~0x08c, DAC channel for A, B and C */
+#define _POWER_DOWN		(0x1<<22)
+#define _SEL_1P4		(0x1<<21)	/* DAC internal test bit. */
+#define _OHM_65_GPULSE		(0x1<<20)	/* OHM adjust */
+#define _BIAS_65_GPULSE		(0x1<<19)	/* Bias adjustment */
+#define _VOL_CALIBRATION	(0x1<<18)	/* Voltage Calibration. */
+#define _DIS_OVLT		(0x1<<16)	/* Disable OV detect */
+#define _CALIBRATION_RANGE(r)	(r<<12)		/* full scale voltage */
+#define _DIS_IMPEDANCE		(0x1<<11)	/* Disable impedance detect */
+#define _ONLY_37P5		(0x1<<10)	/* Allow 37.5 Ohm load. */
+#define _ONLY_75		(0x1<<10)	/* Allow 75 Ohm load. */
+#define _GDAC(v)		(v<<1)		/* gain value */
+
+/* offset, 0x090~0x098, DAC Channel A, B and C status. */
+#define _POR_N			(0x1<<15)	/* power on reset state. */
+#define _IMP			(0x3<<13)
+	#define _SHORT		(0x0)		/*       Rload<27.5 ohm */
+	#define _375OHM		(0x1)		/* 27.5<=Rload<55 ohm   */
+	#define _750OHM		(0x2)		/* 55  <=Rload<110 ohm. */
+	#define _OPEN		(0x3)		/* 110 <=Rload          */
+#define _GDAC_INPUT		(0xFF<<5)	/* gain input */
+#define _CAL_DONE		(0x1<<3)	/* calibration done. */
+#define _CAL_OVR_FLOW		(0x1<<2)	/* overflow of calibration. */
+#define _OVLT_EVENT		(0x1<<1)	/* over voltage */
+#define _OVLT_FLAG		(0x1<<0)	/* over voltage flag. */
+
+/* offset, 0x0A0 */
+#define _CT_LEVEL(lv)		(lv<<24)	/* cross talk level. */
+	#define _CT_LV0		(0x0)		/* 0. */
+	#define _CT_LV1		(0x1)		/* 0.25 */
+	#define _CT_LV2		(0x2)		/* 0.50 */
+	#define _CT_LV3		(0x3)		/* 0.75 */
+	#define _CT_LV4		(0x4)		/* 1.00 */
+	#define _CT_LV5		(0x5)		/* 1.25 */
+	#define _CT_LV6		(0x6)		/* 1.50 */
+	#define _CT_LV7		(0x7)		/* 1.75 */
+	#define _CT_LV8		(0x8)		/* 2.00 */
+#define _RED_ALPHA(v)		(v<<16)		/* red. */
+#define _GREEN_ALPHA(v)		(v<<8)		/* green. */
+#define _BLUE_ALPHA(v)		(v<<0)		/* blue. */
+
+/* offset, 0x0A4, Crosstalk Look up table index. Table 1 @ 0x0000_0xxx. */
+/* offset, 0x0A8, Crosstalk Look up table data. */
+#endif /* __KERNEL__ */
+#endif /*_DOVEDCON_H_ */
--- linux-mvl-dove-2.6.32.orig/include/video/dovefb_gpio.h
+++ linux-mvl-dove-2.6.32/include/video/dovefb_gpio.h
@@ -0,0 +1,21 @@
+#ifndef __DOVEFB_GPIO__
+extern int dovefb_save_regbase(void *reg_base, unsigned int id);
+extern int dovefb_set_gpio(unsigned int lcd_id, unsigned int mask,
+	unsigned int output);
+extern int dovefb_get_current_setting(unsigned int lcd_id,
+	unsigned int *mask,
+	unsigned int *output);
+extern int dovefb_set_pin_state(unsigned int lcd_id,
+	unsigned int pin, unsigned int state);
+
+/*
+ * set lcd gpio pin state
+ * pin, which pin want to set, 0~7.
+ * state, what state want to set, 0 or 1.
+ * if success, return 0.
+ * if failed, other value.
+ * int set_lcd_gpio_pin(unsgined int pin, unsigned int state);
+ */
+#define set_lcd_gpio_pin(pin, state)	dovefb_set_pin_state(0, pin, state)
+
+#endif /* __DOVEFB_GPIO__ */
--- linux-mvl-dove-2.6.32.orig/include/crypto/cryptd.h
+++ linux-mvl-dove-2.6.32/include/crypto/cryptd.h
@@ -39,6 +39,7 @@
 struct cryptd_ahash *cryptd_alloc_ahash(const char *alg_name,
 					u32 type, u32 mask);
 struct crypto_shash *cryptd_ahash_child(struct cryptd_ahash *tfm);
+struct shash_desc *cryptd_shash_desc(struct ahash_request *req);
 void cryptd_free_ahash(struct cryptd_ahash *tfm);
 
 #endif
--- linux-mvl-dove-2.6.32.orig/include/keys/rxrpc-type.h
+++ linux-mvl-dove-2.6.32/include/keys/rxrpc-type.h
@@ -99,7 +99,6 @@
  * structure of raw payloads passed to add_key() or instantiate key
  */
 struct rxrpc_key_data_v1 {
-	u32		kif_version;		/* 1 */
 	u16		security_index;
 	u16		ticket_length;
 	u32		expiry;			/* time_t */
--- linux-mvl-dove-2.6.32.orig/include/media/v4l2-chip-ident.h
+++ linux-mvl-dove-2.6.32/include/media/v4l2-chip-ident.h
@@ -64,6 +64,7 @@
 	V4L2_IDENT_OV9650 = 254,
 	V4L2_IDENT_OV9655 = 255,
 	V4L2_IDENT_SOI968 = 256,
+	V4L2_IDENT_OV7680 = 257,
 
 	/* module saa7146: reserved range 300-309 */
 	V4L2_IDENT_SAA7146 = 300,
--- linux-mvl-dove-2.6.32.orig/include/trace/ftrace.h
+++ linux-mvl-dove-2.6.32/include/trace/ftrace.h
@@ -43,7 +43,8 @@
 		tstruct						\
 		char			__data[0];		\
 	};							\
-	static struct ftrace_event_call event_##name
+	static struct ftrace_event_call			\
+	__attribute__((__aligned__(4))) event_##name
 
 #undef __cpparg
 #define __cpparg(arg...) arg
@@ -159,7 +160,7 @@
 #undef __get_str
 
 #undef TP_printk
-#define TP_printk(fmt, args...) "%s, %s\n", #fmt, __stringify(args)
+#define TP_printk(fmt, args...) "\"%s\", %s\n", fmt, __stringify(args)
 
 #undef TP_fast_assign
 #define TP_fast_assign(args...) args
--- linux-mvl-dove-2.6.32.orig/include/trace/events/vfs.h
+++ linux-mvl-dove-2.6.32/include/trace/events/vfs.h
@@ -0,0 +1,53 @@
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM vfs
+
+#if !defined(_TRACE_VFS_H) || defined(TRACE_HEADER_MULTI_READ)
+#define _TRACE_VFS_H
+
+/*
+ * Tracepoint for dirtying an inode:
+ */
+TRACE_EVENT(dirty_inode,
+
+	TP_PROTO(struct inode *inode, struct task_struct *task),
+
+	TP_ARGS(inode, task),
+
+	TP_STRUCT__entry(
+		__array( char,	comm,	TASK_COMM_LEN	)
+		__field( pid_t,	pid			)
+		__array( char,  dev,    16		)
+		__array( char,  file,   32		)
+	),
+
+	TP_fast_assign(
+		if (inode->i_ino || strcmp(inode->i_sb->s_id, "bdev")) {
+			struct dentry *dentry;
+			const char *name = "?";
+
+			dentry = d_find_alias(inode);
+			if (dentry) {
+				spin_lock(&dentry->d_lock);
+				name = (const char *) dentry->d_name.name;
+			}
+
+			memcpy(__entry->comm, task->comm, TASK_COMM_LEN);
+			__entry->pid = task->pid;
+			strlcpy(__entry->file, name, 32);
+			strlcpy(__entry->dev, inode->i_sb->s_id, 16);
+
+			if (dentry) {
+				spin_unlock(&dentry->d_lock);
+				dput(dentry);
+			}
+		}
+	),
+
+	TP_printk("task=%i (%s) file=%s dev=%s",
+		__entry->pid, __entry->comm, __entry->file, __entry->dev)
+);
+
+#endif /* _TRACE_VFS_H */
+
+/* This part must be outside protection */
+#include <trace/define_trace.h>
--- linux-mvl-dove-2.6.32.orig/include/trace/events/fs.h
+++ linux-mvl-dove-2.6.32/include/trace/events/fs.h
@@ -0,0 +1,53 @@
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM fs
+
+#if !defined(_TRACE_FS_H) || defined(TRACE_HEADER_MULTI_READ)
+#define _TRACE_FS_H
+
+#include <linux/fs.h>
+#include <linux/tracepoint.h>
+
+TRACE_EVENT(do_sys_open,
+
+	TP_PROTO(char *filename, int flags, int mode),
+
+	TP_ARGS(filename, flags, mode),
+
+	TP_STRUCT__entry(
+		__string(	filename, filename		)
+		__field(	int, flags			)
+		__field(	int, mode			)
+	),
+
+	TP_fast_assign(
+		__assign_str(filename, filename);
+		__entry->flags = flags;
+		__entry->mode = mode;
+	),
+
+	TP_printk("\"%s\" %x %o",
+		  __get_str(filename), __entry->flags, __entry->mode)
+);
+
+TRACE_EVENT(open_exec,
+
+	TP_PROTO(char *filename),
+
+	TP_ARGS(filename),
+
+	TP_STRUCT__entry(
+		__string(	filename, filename		)
+	),
+
+	TP_fast_assign(
+		__assign_str(filename, filename);
+	),
+
+	TP_printk("\"%s\"",
+		  __get_str(filename))
+);
+
+#endif /* _TRACE_FS_H */
+
+/* This part must be outside protection */
+#include <trace/define_trace.h>
--- linux-mvl-dove-2.6.32.orig/include/math-emu/op-common.h
+++ linux-mvl-dove-2.6.32/include/math-emu/op-common.h
@@ -799,7 +799,7 @@
 		X##_e -= (_FP_W_TYPE_SIZE - rsize);			\
 	X##_e = rsize - X##_e - 1;					\
 									\
-	if (_FP_FRACBITS_##fs < rsize && _FP_WFRACBITS_##fs < X##_e)	\
+	if (_FP_FRACBITS_##fs < rsize && _FP_WFRACBITS_##fs <= X##_e)	\
 	  __FP_FRAC_SRS_1(ur_, (X##_e - _FP_WFRACBITS_##fs + 1), rsize);\
 	_FP_FRAC_DISASSEMBLE_##wc(X, ur_, rsize);			\
 	if ((_FP_WFRACBITS_##fs - X##_e - 1) > 0)			\
--- linux-mvl-dove-2.6.32.orig/include/asm-generic/dma-mapping-common.h
+++ linux-mvl-dove-2.6.32/include/asm-generic/dma-mapping-common.h
@@ -131,7 +131,7 @@
 		debug_dma_sync_single_range_for_cpu(dev, addr, offset, size, dir);
 
 	} else
-		dma_sync_single_for_cpu(dev, addr, size, dir);
+		dma_sync_single_for_cpu(dev, addr + offset, size, dir);
 }
 
 static inline void dma_sync_single_range_for_device(struct device *dev,
@@ -148,7 +148,7 @@
 		debug_dma_sync_single_range_for_device(dev, addr, offset, size, dir);
 
 	} else
-		dma_sync_single_for_device(dev, addr, size, dir);
+		dma_sync_single_for_device(dev, addr + offset, size, dir);
 }
 
 static inline void
--- linux-mvl-dove-2.6.32.orig/include/asm-generic/vmlinux.lds.h
+++ linux-mvl-dove-2.6.32/include/asm-generic/vmlinux.lds.h
@@ -585,6 +585,7 @@
   	*(.initcall0s.init)						\
   	*(.initcall1.init)						\
   	*(.initcall1s.init)						\
+	*(.initcallearlyrootfs.init)					\
   	*(.initcall2.init)						\
   	*(.initcall2s.init)						\
   	*(.initcall3.init)						\
--- linux-mvl-dove-2.6.32.orig/include/asm-generic/bug.h
+++ linux-mvl-dove-2.6.32/include/asm-generic/bug.h
@@ -50,6 +50,22 @@
 #define BUG_ON(condition) do { if (unlikely(condition)) BUG(); } while(0)
 #endif
 
+#define __WARN_RATELIMIT(condition, state, format...)		\
+({								\
+	int rtn = 0;						\
+	if (unlikely(__ratelimit(state)))			\
+		rtn = WARN(condition, format);			\
+	rtn;							\
+})
+
+#define WARN_RATELIMIT(condition, format...)			\
+({								\
+	static DEFINE_RATELIMIT_STATE(_rs,			\
+				      DEFAULT_RATELIMIT_INTERVAL,	\
+				      DEFAULT_RATELIMIT_BURST);	\
+	__WARN_RATELIMIT(condition, &_rs, format);		\
+})
+
 /*
  * WARN(), WARN_ON(), WARN_ON_ONCE, and so on can be used to report
  * significant issues that need prompt attention if they should ever
--- linux-mvl-dove-2.6.32.orig/include/drm/nouveau_drm.h
+++ linux-mvl-dove-2.6.32/include/drm/nouveau_drm.h
@@ -0,0 +1,221 @@
+/*
+ * Copyright 2005 Stephane Marchesin.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef __NOUVEAU_DRM_H__
+#define __NOUVEAU_DRM_H__
+
+#define NOUVEAU_DRM_HEADER_PATCHLEVEL 15
+
+struct drm_nouveau_channel_alloc {
+	uint32_t     fb_ctxdma_handle;
+	uint32_t     tt_ctxdma_handle;
+
+	int          channel;
+
+	/* Notifier memory */
+	uint32_t     notifier_handle;
+
+	/* DRM-enforced subchannel assignments */
+	struct {
+		uint32_t handle;
+		uint32_t grclass;
+	} subchan[8];
+	uint32_t nr_subchan;
+};
+
+struct drm_nouveau_channel_free {
+	int channel;
+};
+
+struct drm_nouveau_grobj_alloc {
+	int      channel;
+	uint32_t handle;
+	int      class;
+};
+
+struct drm_nouveau_notifierobj_alloc {
+	uint32_t channel;
+	uint32_t handle;
+	uint32_t size;
+	uint32_t offset;
+};
+
+struct drm_nouveau_gpuobj_free {
+	int      channel;
+	uint32_t handle;
+};
+
+/* FIXME : maybe unify {GET,SET}PARAMs */
+#define NOUVEAU_GETPARAM_PCI_VENDOR      3
+#define NOUVEAU_GETPARAM_PCI_DEVICE      4
+#define NOUVEAU_GETPARAM_BUS_TYPE        5
+#define NOUVEAU_GETPARAM_FB_PHYSICAL     6
+#define NOUVEAU_GETPARAM_AGP_PHYSICAL    7
+#define NOUVEAU_GETPARAM_FB_SIZE         8
+#define NOUVEAU_GETPARAM_AGP_SIZE        9
+#define NOUVEAU_GETPARAM_PCI_PHYSICAL    10
+#define NOUVEAU_GETPARAM_CHIPSET_ID      11
+#define NOUVEAU_GETPARAM_VM_VRAM_BASE    12
+#define NOUVEAU_GETPARAM_GRAPH_UNITS     13
+struct drm_nouveau_getparam {
+	uint64_t param;
+	uint64_t value;
+};
+
+struct drm_nouveau_setparam {
+	uint64_t param;
+	uint64_t value;
+};
+
+#define NOUVEAU_GEM_DOMAIN_CPU       (1 << 0)
+#define NOUVEAU_GEM_DOMAIN_VRAM      (1 << 1)
+#define NOUVEAU_GEM_DOMAIN_GART      (1 << 2)
+#define NOUVEAU_GEM_DOMAIN_MAPPABLE  (1 << 3)
+
+struct drm_nouveau_gem_info {
+	uint32_t handle;
+	uint32_t domain;
+	uint64_t size;
+	uint64_t offset;
+	uint64_t map_handle;
+	uint32_t tile_mode;
+	uint32_t tile_flags;
+};
+
+struct drm_nouveau_gem_new {
+	struct drm_nouveau_gem_info info;
+	uint32_t channel_hint;
+	uint32_t align;
+};
+
+struct drm_nouveau_gem_pushbuf_bo {
+	uint64_t user_priv;
+	uint32_t handle;
+	uint32_t read_domains;
+	uint32_t write_domains;
+	uint32_t valid_domains;
+	uint32_t presumed_ok;
+	uint32_t presumed_domain;
+	uint64_t presumed_offset;
+};
+
+#define NOUVEAU_GEM_RELOC_LOW  (1 << 0)
+#define NOUVEAU_GEM_RELOC_HIGH (1 << 1)
+#define NOUVEAU_GEM_RELOC_OR   (1 << 2)
+struct drm_nouveau_gem_pushbuf_reloc {
+	uint32_t bo_index;
+	uint32_t reloc_index;
+	uint32_t flags;
+	uint32_t data;
+	uint32_t vor;
+	uint32_t tor;
+};
+
+#define NOUVEAU_GEM_MAX_BUFFERS 1024
+#define NOUVEAU_GEM_MAX_RELOCS 1024
+
+struct drm_nouveau_gem_pushbuf {
+	uint32_t channel;
+	uint32_t nr_dwords;
+	uint32_t nr_buffers;
+	uint32_t nr_relocs;
+	uint64_t dwords;
+	uint64_t buffers;
+	uint64_t relocs;
+};
+
+struct drm_nouveau_gem_pushbuf_call {
+	uint32_t channel;
+	uint32_t handle;
+	uint32_t offset;
+	uint32_t nr_buffers;
+	uint32_t nr_relocs;
+	uint32_t nr_dwords;
+	uint64_t buffers;
+	uint64_t relocs;
+	uint32_t suffix0;
+	uint32_t suffix1;
+	/* below only accessed for CALL2 */
+	uint64_t vram_available;
+	uint64_t gart_available;
+};
+
+struct drm_nouveau_gem_pin {
+	uint32_t handle;
+	uint32_t domain;
+	uint64_t offset;
+};
+
+struct drm_nouveau_gem_unpin {
+	uint32_t handle;
+};
+
+#define NOUVEAU_GEM_CPU_PREP_NOWAIT                                  0x00000001
+#define NOUVEAU_GEM_CPU_PREP_NOBLOCK                                 0x00000002
+#define NOUVEAU_GEM_CPU_PREP_WRITE                                   0x00000004
+struct drm_nouveau_gem_cpu_prep {
+	uint32_t handle;
+	uint32_t flags;
+};
+
+struct drm_nouveau_gem_cpu_fini {
+	uint32_t handle;
+};
+
+struct drm_nouveau_gem_tile {
+	uint32_t handle;
+	uint32_t offset;
+	uint32_t size;
+	uint32_t tile_mode;
+	uint32_t tile_flags;
+};
+
+enum nouveau_bus_type {
+	NV_AGP     = 0,
+	NV_PCI     = 1,
+	NV_PCIE    = 2,
+};
+
+struct drm_nouveau_sarea {
+};
+
+#define DRM_NOUVEAU_CARD_INIT          0x00
+#define DRM_NOUVEAU_GETPARAM           0x01
+#define DRM_NOUVEAU_SETPARAM           0x02
+#define DRM_NOUVEAU_CHANNEL_ALLOC      0x03
+#define DRM_NOUVEAU_CHANNEL_FREE       0x04
+#define DRM_NOUVEAU_GROBJ_ALLOC        0x05
+#define DRM_NOUVEAU_NOTIFIEROBJ_ALLOC  0x06
+#define DRM_NOUVEAU_GPUOBJ_FREE        0x07
+#define DRM_NOUVEAU_GEM_NEW            0x40
+#define DRM_NOUVEAU_GEM_PUSHBUF        0x41
+#define DRM_NOUVEAU_GEM_PUSHBUF_CALL   0x42
+#define DRM_NOUVEAU_GEM_PIN            0x43 /* !KMS only */
+#define DRM_NOUVEAU_GEM_UNPIN          0x44 /* !KMS only */
+#define DRM_NOUVEAU_GEM_CPU_PREP       0x45
+#define DRM_NOUVEAU_GEM_CPU_FINI       0x46
+#define DRM_NOUVEAU_GEM_INFO           0x47
+#define DRM_NOUVEAU_GEM_PUSHBUF_CALL2  0x48
+
+#endif /* __NOUVEAU_DRM_H__ */
--- linux-mvl-dove-2.6.32.orig/include/drm/drm.h
+++ linux-mvl-dove-2.6.32/include/drm/drm.h
@@ -36,17 +36,27 @@
 #ifndef _DRM_H_
 #define _DRM_H_
 
+#if defined(__linux__)
+
 #include <linux/types.h>
-#include <asm/ioctl.h>		/* For _IO* macros */
-#define DRM_IOCTL_NR(n)		_IOC_NR(n)
-#define DRM_IOC_VOID		_IOC_NONE
-#define DRM_IOC_READ		_IOC_READ
-#define DRM_IOC_WRITE		_IOC_WRITE
-#define DRM_IOC_READWRITE	_IOC_READ|_IOC_WRITE
-#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
+#include <asm/ioctl.h>
+typedef unsigned int drm_handle_t;
+
+#else /* One of the BSDs */
 
-#define DRM_MAJOR       226
-#define DRM_MAX_MINOR   15
+#include <sys/ioccom.h>
+#include <sys/types.h>
+typedef int8_t   __s8;
+typedef uint8_t  __u8;
+typedef int16_t  __s16;
+typedef uint16_t __u16;
+typedef int32_t  __s32;
+typedef uint32_t __u32;
+typedef int64_t  __s64;
+typedef uint64_t __u64;
+typedef unsigned long drm_handle_t;
+
+#endif
 
 #define DRM_NAME	"drm"	  /**< Name in kernel, /dev, and /proc */
 #define DRM_MIN_ORDER	5	  /**< At least 2^5 bytes = 32 bytes */
@@ -59,7 +69,6 @@
 #define _DRM_LOCK_IS_CONT(lock)	   ((lock) & _DRM_LOCK_CONT)
 #define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT))
 
-typedef unsigned int drm_handle_t;
 typedef unsigned int drm_context_t;
 typedef unsigned int drm_drawable_t;
 typedef unsigned int drm_magic_t;
@@ -454,6 +463,7 @@
 enum drm_vblank_seq_type {
 	_DRM_VBLANK_ABSOLUTE = 0x0,	/**< Wait for specific vblank sequence number */
 	_DRM_VBLANK_RELATIVE = 0x1,	/**< Wait for given number of vblanks */
+	_DRM_VBLANK_EVENT = 0x4000000,   /**< Send event instead of blocking */
 	_DRM_VBLANK_FLIP = 0x8000000,   /**< Scheduled buffer swap should flip */
 	_DRM_VBLANK_NEXTONMISS = 0x10000000,	/**< If missed, wait for next vblank */
 	_DRM_VBLANK_SECONDARY = 0x20000000,	/**< Secondary display controller */
@@ -461,8 +471,8 @@
 };
 
 #define _DRM_VBLANK_TYPES_MASK (_DRM_VBLANK_ABSOLUTE | _DRM_VBLANK_RELATIVE)
-#define _DRM_VBLANK_FLAGS_MASK (_DRM_VBLANK_SIGNAL | _DRM_VBLANK_SECONDARY | \
-				_DRM_VBLANK_NEXTONMISS)
+#define _DRM_VBLANK_FLAGS_MASK (_DRM_VBLANK_EVENT | _DRM_VBLANK_SIGNAL | \
+				_DRM_VBLANK_SECONDARY | _DRM_VBLANK_NEXTONMISS)
 
 struct drm_wait_vblank_request {
 	enum drm_vblank_seq_type type;
@@ -686,6 +696,8 @@
 #define DRM_IOCTL_MODE_GETFB		DRM_IOWR(0xAD, struct drm_mode_fb_cmd)
 #define DRM_IOCTL_MODE_ADDFB		DRM_IOWR(0xAE, struct drm_mode_fb_cmd)
 #define DRM_IOCTL_MODE_RMFB		DRM_IOWR(0xAF, unsigned int)
+#define DRM_IOCTL_MODE_PAGE_FLIP	DRM_IOWR(0xB0, struct drm_mode_crtc_page_flip)
+#define DRM_IOCTL_MODE_DIRTYFB		DRM_IOWR(0xB1, struct drm_mode_fb_dirty_cmd)
 
 /**
  * Device specific ioctls should only be in their respective headers
@@ -698,6 +710,35 @@
 #define DRM_COMMAND_BASE                0x40
 #define DRM_COMMAND_END			0xA0
 
+/**
+ * Header for events written back to userspace on the drm fd.  The
+ * type defines the type of event, the length specifies the total
+ * length of the event (including the header), and user_data is
+ * typically a 64 bit value passed with the ioctl that triggered the
+ * event.  A read on the drm fd will always only return complete
+ * events, that is, if for example the read buffer is 100 bytes, and
+ * there are two 64 byte events pending, only one will be returned.
+ *
+ * Event types 0 - 0x7fffffff are generic drm events, 0x80000000 and
+ * up are chipset specific.
+ */
+struct drm_event {
+	__u32 type;
+	__u32 length;
+};
+
+#define DRM_EVENT_VBLANK 0x01
+#define DRM_EVENT_FLIP_COMPLETE 0x02
+
+struct drm_event_vblank {
+	struct drm_event base;
+	__u64 user_data;
+	__u32 tv_sec;
+	__u32 tv_usec;
+	__u32 sequence;
+	__u32 reserved;
+};
+
 /* typedef area */
 #ifndef __KERNEL__
 typedef struct drm_clip_rect drm_clip_rect_t;
--- linux-mvl-dove-2.6.32.orig/include/drm/drm_pciids.h
+++ linux-mvl-dove-2.6.32/include/drm/drm_pciids.h
@@ -6,6 +6,7 @@
 	{0x1002, 0x3150, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY}, \
 	{0x1002, 0x3152, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
 	{0x1002, 0x3154, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
+	{0x1002, 0x3155, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
 	{0x1002, 0x3E50, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \
 	{0x1002, 0x3E54, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \
 	{0x1002, 0x4136, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS100|RADEON_IS_IGP}, \
@@ -27,7 +28,6 @@
 	{0x1002, 0x4156, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350}, \
 	{0x1002, 0x4237, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS200|RADEON_IS_IGP}, \
 	{0x1002, 0x4242, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R200}, \
-	{0x1002, 0x4243, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R200}, \
 	{0x1002, 0x4336, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS100|RADEON_IS_IGP|RADEON_IS_MOBILITY}, \
 	{0x1002, 0x4337, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS200|RADEON_IS_IGP|RADEON_IS_MOBILITY}, \
 	{0x1002, 0x4437, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS200|RADEON_IS_IGP|RADEON_IS_MOBILITY}, \
@@ -84,7 +84,6 @@
 	{0x1002, 0x5460, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY}, \
 	{0x1002, 0x5462, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY}, \
 	{0x1002, 0x5464, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY}, \
-	{0x1002, 0x5657, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \
 	{0x1002, 0x5548, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
 	{0x1002, 0x5549, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
 	{0x1002, 0x554A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
@@ -102,6 +101,7 @@
 	{0x1002, 0x564F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
 	{0x1002, 0x5652, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
 	{0x1002, 0x5653, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
+	{0x1002, 0x5657, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \
 	{0x1002, 0x5834, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS300|RADEON_IS_IGP}, \
 	{0x1002, 0x5835, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS300|RADEON_IS_IGP|RADEON_IS_MOBILITY}, \
 	{0x1002, 0x5954, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS480|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART}, \
@@ -375,6 +375,7 @@
 	{0x1002, 0x9712, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS880|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
 	{0x1002, 0x9713, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS880|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
 	{0x1002, 0x9714, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS880|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
+	{0x1002, 0x9715, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS880|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
 	{0, 0, 0}
 
 #define r128_PCI_IDS \
--- linux-mvl-dove-2.6.32.orig/include/drm/drm_crtc.h
+++ linux-mvl-dove-2.6.32/include/drm/drm_crtc.h
@@ -123,7 +123,7 @@
 	int type;
 
 	/* Proposed mode values */
-	int clock;
+	int clock;		/* in kHz */
 	int hdisplay;
 	int hsync_start;
 	int hsync_end;
@@ -164,8 +164,8 @@
 	int *private;
 	int private_flags;
 
-	int vrefresh;
-	float hsync;
+	int vrefresh;		/* in Hz */
+	int hsync;		/* in kHz */
 };
 
 enum drm_connector_status {
@@ -242,6 +242,21 @@
 	int (*create_handle)(struct drm_framebuffer *fb,
 			     struct drm_file *file_priv,
 			     unsigned int *handle);
+	/**
+	 * Optinal callback for the dirty fb ioctl.
+	 *
+	 * Userspace can notify the driver via this callback
+	 * that a area of the framebuffer has changed and should
+	 * be flushed to the display hardware.
+	 *
+	 * See documentation in drm_mode.h for the struct
+	 * drm_mode_fb_dirty_cmd for more information as all
+	 * the semantics and arguments have a one to one mapping
+	 * on this function.
+	 */
+	int (*dirty)(struct drm_framebuffer *framebuffer, unsigned flags,
+		     unsigned color, struct drm_clip_rect *clips,
+		     unsigned num_clips);
 };
 
 struct drm_framebuffer {
@@ -256,7 +271,7 @@
 	unsigned int depth;
 	int bits_per_pixel;
 	int flags;
-	void *fbdev;
+	struct fb_info *fbdev;
 	u32 pseudo_palette[17];
 	struct list_head filp_head;
 	/* if you are using the helper */
@@ -290,6 +305,7 @@
 struct drm_crtc;
 struct drm_connector;
 struct drm_encoder;
+struct drm_pending_vblank_event;
 
 /**
  * drm_crtc_funcs - control CRTCs for a given device
@@ -333,6 +349,19 @@
 	void (*destroy)(struct drm_crtc *crtc);
 
 	int (*set_config)(struct drm_mode_set *set);
+
+	/*
+	 * Flip to the given framebuffer.  This implements the page
+	 * flip ioctl descibed in drm_mode.h, specifically, the
+	 * implementation must return immediately and block all
+	 * rendering to the current fb until the flip has completed.
+	 * If userspace set the event flag in the ioctl, the event
+	 * argument will point to an event to send back when the flip
+	 * completes, otherwise it will be NULL.
+	 */
+	int (*page_flip)(struct drm_crtc *crtc,
+			 struct drm_framebuffer *fb,
+			 struct drm_pending_vblank_event *event);
 };
 
 /**
@@ -596,6 +625,7 @@
 	/* Optional properties */
 	struct drm_property *scaling_mode_property;
 	struct drm_property *dithering_mode_property;
+	struct drm_property *dirty_info_property;
 };
 
 #define obj_to_crtc(x) container_of(x, struct drm_crtc, base)
@@ -667,6 +697,7 @@
 extern void drm_mode_prune_invalid(struct drm_device *dev,
 				   struct list_head *mode_list, bool verbose);
 extern void drm_mode_sort(struct list_head *mode_list);
+extern int drm_mode_hsync(struct drm_display_mode *mode);
 extern int drm_mode_vrefresh(struct drm_display_mode *mode);
 extern void drm_mode_set_crtcinfo(struct drm_display_mode *p,
 				  int adjust_flags);
@@ -703,6 +734,7 @@
 				     char *formats[]);
 extern int drm_mode_create_scaling_mode_property(struct drm_device *dev);
 extern int drm_mode_create_dithering_property(struct drm_device *dev);
+extern int drm_mode_create_dirty_info_property(struct drm_device *dev);
 extern char *drm_get_encoder_name(struct drm_encoder *encoder);
 
 extern int drm_mode_connector_attach_encoder(struct drm_connector *connector,
@@ -711,7 +743,8 @@
 					   struct drm_encoder *encoder);
 extern bool drm_mode_crtc_set_gamma_size(struct drm_crtc *crtc,
 					 int gamma_size);
-extern void *drm_mode_object_find(struct drm_device *dev, uint32_t id, uint32_t type);
+extern struct drm_mode_object *drm_mode_object_find(struct drm_device *dev,
+		uint32_t id, uint32_t type);
 /* IOCTLs */
 extern int drm_mode_getresources(struct drm_device *dev,
 				 void *data, struct drm_file *file_priv);
@@ -730,6 +763,8 @@
 			 void *data, struct drm_file *file_priv);
 extern int drm_mode_getfb(struct drm_device *dev,
 			  void *data, struct drm_file *file_priv);
+extern int drm_mode_dirtyfb_ioctl(struct drm_device *dev,
+				  void *data, struct drm_file *file_priv);
 extern int drm_mode_addmode_ioctl(struct drm_device *dev,
 				  void *data, struct drm_file *file_priv);
 extern int drm_mode_rmmode_ioctl(struct drm_device *dev,
@@ -756,6 +791,8 @@
 extern int drm_mode_gamma_set_ioctl(struct drm_device *dev,
 				    void *data, struct drm_file *file_priv);
 extern bool drm_detect_hdmi_monitor(struct edid *edid);
+extern int drm_mode_page_flip_ioctl(struct drm_device *dev,
+				    void *data, struct drm_file *file_priv);
 extern struct drm_display_mode *drm_cvt_mode(struct drm_device *dev,
 				int hdisplay, int vdisplay, int vrefresh,
 				bool reduced, bool interlaced, bool margins);
--- linux-mvl-dove-2.6.32.orig/include/drm/radeon_drm.h
+++ linux-mvl-dove-2.6.32/include/drm/radeon_drm.h
@@ -33,7 +33,7 @@
 #ifndef __RADEON_DRM_H__
 #define __RADEON_DRM_H__
 
-#include <linux/types.h>
+#include "drm.h"
 
 /* WARNING: If you change any of these defines, make sure to change the
  * defines in the X server file (radeon_sarea.h)
--- linux-mvl-dove-2.6.32.orig/include/drm/drm_dp_helper.h
+++ linux-mvl-dove-2.6.32/include/drm/drm_dp_helper.h
@@ -0,0 +1,180 @@
+/*
+ * Copyright © 2008 Keith Packard
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that copyright
+ * notice and this permission notice appear in supporting documentation, and
+ * that the name of the copyright holders not be used in advertising or
+ * publicity pertaining to distribution of the software without specific,
+ * written prior permission.  The copyright holders make no representations
+ * about the suitability of this software for any purpose.  It is provided "as
+ * is" without express or implied warranty.
+ *
+ * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
+ * OF THIS SOFTWARE.
+ */
+
+#ifndef _DRM_DP_HELPER_H_
+#define _DRM_DP_HELPER_H_
+
+/* From the VESA DisplayPort spec */
+
+#define AUX_NATIVE_WRITE	0x8
+#define AUX_NATIVE_READ		0x9
+#define AUX_I2C_WRITE		0x0
+#define AUX_I2C_READ		0x1
+#define AUX_I2C_STATUS		0x2
+#define AUX_I2C_MOT		0x4
+
+#define AUX_NATIVE_REPLY_ACK	(0x0 << 4)
+#define AUX_NATIVE_REPLY_NACK	(0x1 << 4)
+#define AUX_NATIVE_REPLY_DEFER	(0x2 << 4)
+#define AUX_NATIVE_REPLY_MASK	(0x3 << 4)
+
+#define AUX_I2C_REPLY_ACK	(0x0 << 6)
+#define AUX_I2C_REPLY_NACK	(0x1 << 6)
+#define AUX_I2C_REPLY_DEFER	(0x2 << 6)
+#define AUX_I2C_REPLY_MASK	(0x3 << 6)
+
+/* AUX CH addresses */
+/* DPCD */
+#define DP_DPCD_REV                         0x000
+
+#define DP_MAX_LINK_RATE                    0x001
+
+#define DP_MAX_LANE_COUNT                   0x002
+# define DP_MAX_LANE_COUNT_MASK		    0x1f
+# define DP_ENHANCED_FRAME_CAP		    (1 << 7)
+
+#define DP_MAX_DOWNSPREAD                   0x003
+# define DP_NO_AUX_HANDSHAKE_LINK_TRAINING  (1 << 6)
+
+#define DP_NORP                             0x004
+
+#define DP_DOWNSTREAMPORT_PRESENT           0x005
+# define DP_DWN_STRM_PORT_PRESENT           (1 << 0)
+# define DP_DWN_STRM_PORT_TYPE_MASK         0x06
+/* 00b = DisplayPort */
+/* 01b = Analog */
+/* 10b = TMDS or HDMI */
+/* 11b = Other */
+# define DP_FORMAT_CONVERSION               (1 << 3)
+
+#define DP_MAIN_LINK_CHANNEL_CODING         0x006
+
+/* link configuration */
+#define	DP_LINK_BW_SET		            0x100
+# define DP_LINK_BW_1_62		    0x06
+# define DP_LINK_BW_2_7			    0x0a
+
+#define DP_LANE_COUNT_SET	            0x101
+# define DP_LANE_COUNT_MASK		    0x0f
+# define DP_LANE_COUNT_ENHANCED_FRAME_EN    (1 << 7)
+
+#define DP_TRAINING_PATTERN_SET	            0x102
+# define DP_TRAINING_PATTERN_DISABLE	    0
+# define DP_TRAINING_PATTERN_1		    1
+# define DP_TRAINING_PATTERN_2		    2
+# define DP_TRAINING_PATTERN_MASK	    0x3
+
+# define DP_LINK_QUAL_PATTERN_DISABLE	    (0 << 2)
+# define DP_LINK_QUAL_PATTERN_D10_2	    (1 << 2)
+# define DP_LINK_QUAL_PATTERN_ERROR_RATE    (2 << 2)
+# define DP_LINK_QUAL_PATTERN_PRBS7	    (3 << 2)
+# define DP_LINK_QUAL_PATTERN_MASK	    (3 << 2)
+
+# define DP_RECOVERED_CLOCK_OUT_EN	    (1 << 4)
+# define DP_LINK_SCRAMBLING_DISABLE	    (1 << 5)
+
+# define DP_SYMBOL_ERROR_COUNT_BOTH	    (0 << 6)
+# define DP_SYMBOL_ERROR_COUNT_DISPARITY    (1 << 6)
+# define DP_SYMBOL_ERROR_COUNT_SYMBOL	    (2 << 6)
+# define DP_SYMBOL_ERROR_COUNT_MASK	    (3 << 6)
+
+#define DP_TRAINING_LANE0_SET		    0x103
+#define DP_TRAINING_LANE1_SET		    0x104
+#define DP_TRAINING_LANE2_SET		    0x105
+#define DP_TRAINING_LANE3_SET		    0x106
+
+# define DP_TRAIN_VOLTAGE_SWING_MASK	    0x3
+# define DP_TRAIN_VOLTAGE_SWING_SHIFT	    0
+# define DP_TRAIN_MAX_SWING_REACHED	    (1 << 2)
+# define DP_TRAIN_VOLTAGE_SWING_400	    (0 << 0)
+# define DP_TRAIN_VOLTAGE_SWING_600	    (1 << 0)
+# define DP_TRAIN_VOLTAGE_SWING_800	    (2 << 0)
+# define DP_TRAIN_VOLTAGE_SWING_1200	    (3 << 0)
+
+# define DP_TRAIN_PRE_EMPHASIS_MASK	    (3 << 3)
+# define DP_TRAIN_PRE_EMPHASIS_0	    (0 << 3)
+# define DP_TRAIN_PRE_EMPHASIS_3_5	    (1 << 3)
+# define DP_TRAIN_PRE_EMPHASIS_6	    (2 << 3)
+# define DP_TRAIN_PRE_EMPHASIS_9_5	    (3 << 3)
+
+# define DP_TRAIN_PRE_EMPHASIS_SHIFT	    3
+# define DP_TRAIN_MAX_PRE_EMPHASIS_REACHED  (1 << 5)
+
+#define DP_DOWNSPREAD_CTRL		    0x107
+# define DP_SPREAD_AMP_0_5		    (1 << 4)
+
+#define DP_MAIN_LINK_CHANNEL_CODING_SET	    0x108
+# define DP_SET_ANSI_8B10B		    (1 << 0)
+
+#define DP_LANE0_1_STATUS		    0x202
+#define DP_LANE2_3_STATUS		    0x203
+# define DP_LANE_CR_DONE		    (1 << 0)
+# define DP_LANE_CHANNEL_EQ_DONE	    (1 << 1)
+# define DP_LANE_SYMBOL_LOCKED		    (1 << 2)
+
+#define DP_CHANNEL_EQ_BITS (DP_LANE_CR_DONE |		\
+			    DP_LANE_CHANNEL_EQ_DONE |	\
+			    DP_LANE_SYMBOL_LOCKED)
+
+#define DP_LANE_ALIGN_STATUS_UPDATED	    0x204
+
+#define DP_INTERLANE_ALIGN_DONE		    (1 << 0)
+#define DP_DOWNSTREAM_PORT_STATUS_CHANGED   (1 << 6)
+#define DP_LINK_STATUS_UPDATED		    (1 << 7)
+
+#define DP_SINK_STATUS			    0x205
+
+#define DP_RECEIVE_PORT_0_STATUS	    (1 << 0)
+#define DP_RECEIVE_PORT_1_STATUS	    (1 << 1)
+
+#define DP_ADJUST_REQUEST_LANE0_1	    0x206
+#define DP_ADJUST_REQUEST_LANE2_3	    0x207
+# define DP_ADJUST_VOLTAGE_SWING_LANE0_MASK  0x03
+# define DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT 0
+# define DP_ADJUST_PRE_EMPHASIS_LANE0_MASK   0x0c
+# define DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT  2
+# define DP_ADJUST_VOLTAGE_SWING_LANE1_MASK  0x30
+# define DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT 4
+# define DP_ADJUST_PRE_EMPHASIS_LANE1_MASK   0xc0
+# define DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT  6
+
+#define DP_SET_POWER                        0x600
+# define DP_SET_POWER_D0                    0x1
+# define DP_SET_POWER_D3                    0x2
+
+#define MODE_I2C_START	1
+#define MODE_I2C_WRITE	2
+#define MODE_I2C_READ	4
+#define MODE_I2C_STOP	8
+
+struct i2c_algo_dp_aux_data {
+	bool running;
+	u16 address;
+	int (*aux_ch) (struct i2c_adapter *adapter,
+		       int mode, uint8_t write_byte,
+		       uint8_t *read_byte);
+};
+
+int
+i2c_dp_aux_add_bus(struct i2c_adapter *adapter);
+
+#endif /* _DRM_DP_HELPER_H_ */
--- linux-mvl-dove-2.6.32.orig/include/drm/drm_os_linux.h
+++ linux-mvl-dove-2.6.32/include/drm/drm_os_linux.h
@@ -123,5 +123,5 @@
 	remove_wait_queue(&(queue), &entry);			\
 } while (0)
 
-#define DRM_WAKEUP( queue ) wake_up_interruptible( queue )
+#define DRM_WAKEUP( queue ) wake_up( queue )
 #define DRM_INIT_WAITQUEUE( queue ) init_waitqueue_head( queue )
--- linux-mvl-dove-2.6.32.orig/include/drm/via_drm.h
+++ linux-mvl-dove-2.6.32/include/drm/via_drm.h
@@ -24,7 +24,7 @@
 #ifndef _VIA_DRM_H_
 #define _VIA_DRM_H_
 
-#include <linux/types.h>
+#include "drm.h"
 
 /* WARNING: These defines must be the same as what the Xserver uses.
  * if you change them, you must change the defines in the Xserver.
--- linux-mvl-dove-2.6.32.orig/include/drm/drmP.h
+++ linux-mvl-dove-2.6.32/include/drm/drmP.h
@@ -245,16 +245,6 @@
 
 #endif
 
-#define DRM_PROC_LIMIT (PAGE_SIZE-80)
-
-#define DRM_PROC_PRINT(fmt, arg...)					\
-   len += sprintf(&buf[len], fmt , ##arg);				\
-   if (len > DRM_PROC_LIMIT) { *eof = 1; return len - offset; }
-
-#define DRM_PROC_PRINT_RET(ret, fmt, arg...)				\
-   len += sprintf(&buf[len], fmt , ##arg);				\
-   if (len > DRM_PROC_LIMIT) { ret; *eof = 1; return len - offset; }
-
 /*@}*/
 
 /***********************************************************************/
@@ -265,19 +255,8 @@
 
 #define DRM_LEFTCOUNT(x) (((x)->rp + (x)->count - (x)->wp) % ((x)->count + 1))
 #define DRM_BUFCOUNT(x) ((x)->count - DRM_LEFTCOUNT(x))
-#define DRM_WAITCOUNT(dev,idx) DRM_BUFCOUNT(&dev->queuelist[idx]->waitlist)
 
 #define DRM_IF_VERSION(maj, min) (maj << 16 | min)
-/**
- * Get the private SAREA mapping.
- *
- * \param _dev DRM device.
- * \param _ctx context number.
- * \param _map output mapping.
- */
-#define DRM_GET_PRIV_SAREA(_dev, _ctx, _map) do {	\
-	(_map) = (_dev)->context_sareas[_ctx];		\
-} while(0)
 
 /**
  * Test that the hardware lock is held by the caller, returning otherwise.
@@ -297,18 +276,6 @@
 } while (0)
 
 /**
- * Copy and IOCTL return string to user space
- */
-#define DRM_COPY( name, value )						\
-	len = strlen( value );						\
-	if ( len > name##_len ) len = name##_len;			\
-	name##_len = strlen( value );					\
-	if ( len && name ) {						\
-		if ( copy_to_user( name, value, len ) )			\
-			return -EFAULT;					\
-	}
-
-/**
  * Ioctl function type.
  *
  * \param inode device inode.
@@ -322,10 +289,14 @@
 typedef int drm_ioctl_compat_t(struct file *filp, unsigned int cmd,
 			       unsigned long arg);
 
+#define DRM_IOCTL_NR(n)                _IOC_NR(n)
+#define DRM_MAJOR       226
+
 #define DRM_AUTH	0x1
 #define	DRM_MASTER	0x2
 #define DRM_ROOT_ONLY	0x4
 #define DRM_CONTROL_ALLOW 0x8
+#define DRM_UNLOCKED	0x10
 
 struct drm_ioctl_desc {
 	unsigned int cmd;
@@ -426,6 +397,14 @@
 	struct drm_freelist freelist;
 };
 
+/* Event queued up for userspace to read */
+struct drm_pending_event {
+	struct drm_event *event;
+	struct list_head link;
+	struct drm_file *file_priv;
+	void (*destroy)(struct drm_pending_event *event);
+};
+
 /** File private data */
 struct drm_file {
 	int authenticated;
@@ -449,6 +428,10 @@
 	struct drm_master *master; /* master this node is currently associated with
 				      N.B. not always minor->master */
 	struct list_head fbs;
+
+	wait_queue_head_t event_wait;
+	struct list_head event_list;
+	int event_space;
 };
 
 /** Wait queue */
@@ -795,6 +778,15 @@
 	/* Master routines */
 	int (*master_create)(struct drm_device *dev, struct drm_master *master);
 	void (*master_destroy)(struct drm_device *dev, struct drm_master *master);
+	/**
+	 * master_set is called whenever the minor master is set.
+	 * master_drop is called whenever the minor master is dropped.
+	 */
+
+	int (*master_set)(struct drm_device *dev, struct drm_file *file_priv,
+			  bool from_open);
+	void (*master_drop)(struct drm_device *dev, struct drm_file *file_priv,
+			    bool from_release);
 
 	int (*proc_init)(struct drm_minor *minor);
 	void (*proc_cleanup)(struct drm_minor *minor);
@@ -900,6 +892,12 @@
 	struct drm_mode_group mode_group;
 };
 
+struct drm_pending_vblank_event {
+	struct drm_pending_event base;
+	int pipe;
+	struct drm_event_vblank event;
+};
+
 /**
  * DRM device structure. This structure represent a complete card that
  * may contain multiple heads.
@@ -999,6 +997,12 @@
 
 	u32 max_vblank_count;           /**< size of vblank counter register */
 
+	/**
+	 * List of events
+	 */
+	struct list_head vblank_event_list;
+	spinlock_t event_lock;
+
 	/*@} */
 	cycles_t ctx_start;
 	cycles_t lck_start;
@@ -1016,7 +1020,7 @@
 	struct pci_controller *hose;
 #endif
 	struct drm_sg_mem *sg;	/**< Scatter gather memory */
-	int num_crtcs;                  /**< Number of CRTCs on this device */
+	unsigned int num_crtcs;                  /**< Number of CRTCs on this device */
 	void *dev_private;		/**< device private data */
 	void *mm_private;
 	struct address_space *dev_mapping;
@@ -1125,8 +1129,8 @@
 				/* Driver support (drm_drv.h) */
 extern int drm_init(struct drm_driver *driver);
 extern void drm_exit(struct drm_driver *driver);
-extern int drm_ioctl(struct inode *inode, struct file *filp,
-		     unsigned int cmd, unsigned long arg);
+extern long drm_ioctl(struct file *filp,
+		      unsigned int cmd, unsigned long arg);
 extern long drm_compat_ioctl(struct file *filp,
 			     unsigned int cmd, unsigned long arg);
 extern int drm_lastclose(struct drm_device *dev);
@@ -1135,6 +1139,8 @@
 extern int drm_open(struct inode *inode, struct file *filp);
 extern int drm_stub_open(struct inode *inode, struct file *filp);
 extern int drm_fasync(int fd, struct file *filp, int on);
+extern ssize_t drm_read(struct file *filp, char __user *buffer,
+			size_t count, loff_t *offset);
 extern int drm_release(struct inode *inode, struct file *filp);
 
 				/* Mapping support (drm_vm.h) */
@@ -1295,6 +1301,7 @@
 extern void drm_handle_vblank(struct drm_device *dev, int crtc);
 extern int drm_vblank_get(struct drm_device *dev, int crtc);
 extern void drm_vblank_put(struct drm_device *dev, int crtc);
+extern void drm_vblank_off(struct drm_device *dev, int crtc);
 extern void drm_vblank_cleanup(struct drm_device *dev);
 /* Modesetting support */
 extern void drm_vblank_pre_modeset(struct drm_device *dev, int crtc);
@@ -1401,7 +1408,7 @@
 				   struct drm_ati_pcigart_info * gart_info);
 
 extern drm_dma_handle_t *drm_pci_alloc(struct drm_device *dev, size_t size,
-				       size_t align, dma_addr_t maxaddr);
+				       size_t align);
 extern void __drm_pci_free(struct drm_device *dev, drm_dma_handle_t * dmah);
 extern void drm_pci_free(struct drm_device *dev, drm_dma_handle_t * dmah);
 
@@ -1519,14 +1526,27 @@
 
 static __inline__ void *drm_calloc_large(size_t nmemb, size_t size)
 {
+	if (size != 0 && nmemb > ULONG_MAX / size)
+		return NULL;
+
 	if (size * nmemb <= PAGE_SIZE)
 	    return kcalloc(nmemb, size, GFP_KERNEL);
 
+	return __vmalloc(size * nmemb,
+			 GFP_KERNEL | __GFP_HIGHMEM | __GFP_ZERO, PAGE_KERNEL);
+}
+
+/* Modeled after cairo's malloc_ab, it's like calloc but without the zeroing. */
+static __inline__ void *drm_malloc_ab(size_t nmemb, size_t size)
+{
 	if (size != 0 && nmemb > ULONG_MAX / size)
 		return NULL;
 
+	if (size * nmemb <= PAGE_SIZE)
+	    return kmalloc(nmemb * size, GFP_KERNEL);
+
 	return __vmalloc(size * nmemb,
-			 GFP_KERNEL | __GFP_HIGHMEM | __GFP_ZERO, PAGE_KERNEL);
+			 GFP_KERNEL | __GFP_HIGHMEM, PAGE_KERNEL);
 }
 
 static __inline void drm_free_large(void *ptr)
--- linux-mvl-dove-2.6.32.orig/include/drm/vmwgfx_drm.h
+++ linux-mvl-dove-2.6.32/include/drm/vmwgfx_drm.h
@@ -0,0 +1,588 @@
+/**************************************************************************
+ *
+ * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **************************************************************************/
+
+#ifndef __VMWGFX_DRM_H__
+#define __VMWGFX_DRM_H__
+
+#define DRM_VMW_MAX_SURFACE_FACES 6
+#define DRM_VMW_MAX_MIP_LEVELS 24
+
+#define DRM_VMW_EXT_NAME_LEN 128
+
+#define DRM_VMW_GET_PARAM            0
+#define DRM_VMW_ALLOC_DMABUF         1
+#define DRM_VMW_UNREF_DMABUF         2
+#define DRM_VMW_CURSOR_BYPASS        3
+/* guarded by DRM_VMW_PARAM_NUM_STREAMS != 0*/
+#define DRM_VMW_CONTROL_STREAM       4
+#define DRM_VMW_CLAIM_STREAM         5
+#define DRM_VMW_UNREF_STREAM         6
+/* guarded by DRM_VMW_PARAM_3D == 1 */
+#define DRM_VMW_CREATE_CONTEXT       7
+#define DRM_VMW_UNREF_CONTEXT        8
+#define DRM_VMW_CREATE_SURFACE       9
+#define DRM_VMW_UNREF_SURFACE        10
+#define DRM_VMW_REF_SURFACE          11
+#define DRM_VMW_EXECBUF              12
+#define DRM_VMW_FIFO_DEBUG           13
+#define DRM_VMW_FENCE_WAIT           14
+
+
+/*************************************************************************/
+/**
+ * DRM_VMW_GET_PARAM - get device information.
+ *
+ * DRM_VMW_PARAM_FIFO_OFFSET:
+ * Offset to use to map the first page of the FIFO read-only.
+ * The fifo is mapped using the mmap() system call on the drm device.
+ *
+ * DRM_VMW_PARAM_OVERLAY_IOCTL:
+ * Does the driver support the overlay ioctl.
+ */
+
+#define DRM_VMW_PARAM_NUM_STREAMS      0
+#define DRM_VMW_PARAM_NUM_FREE_STREAMS 1
+#define DRM_VMW_PARAM_3D               2
+#define DRM_VMW_PARAM_FIFO_OFFSET      3
+#define DRM_VMW_PARAM_HW_CAPS          4
+#define DRM_VMW_PARAM_FIFO_CAPS        5
+
+/**
+ * struct drm_vmw_getparam_arg
+ *
+ * @value: Returned value. //Out
+ * @param: Parameter to query. //In.
+ *
+ * Argument to the DRM_VMW_GET_PARAM Ioctl.
+ */
+
+struct drm_vmw_getparam_arg {
+	uint64_t value;
+	uint32_t param;
+	uint32_t pad64;
+};
+
+/*************************************************************************/
+/**
+ * DRM_VMW_EXTENSION - Query device extensions.
+ */
+
+/**
+ * struct drm_vmw_extension_rep
+ *
+ * @exists: The queried extension exists.
+ * @driver_ioctl_offset: Ioctl number of the first ioctl in the extension.
+ * @driver_sarea_offset: Offset to any space in the DRI SAREA
+ * used by the extension.
+ * @major: Major version number of the extension.
+ * @minor: Minor version number of the extension.
+ * @pl: Patch level version number of the extension.
+ *
+ * Output argument to the DRM_VMW_EXTENSION Ioctl.
+ */
+
+struct drm_vmw_extension_rep {
+	int32_t exists;
+	uint32_t driver_ioctl_offset;
+	uint32_t driver_sarea_offset;
+	uint32_t major;
+	uint32_t minor;
+	uint32_t pl;
+	uint32_t pad64;
+};
+
+/**
+ * union drm_vmw_extension_arg
+ *
+ * @extension - Ascii name of the extension to be queried. //In
+ * @rep - Reply as defined above. //Out
+ *
+ * Argument to the DRM_VMW_EXTENSION Ioctl.
+ */
+
+union drm_vmw_extension_arg {
+	char extension[DRM_VMW_EXT_NAME_LEN];
+	struct drm_vmw_extension_rep rep;
+};
+
+/*************************************************************************/
+/**
+ * DRM_VMW_CREATE_CONTEXT - Create a host context.
+ *
+ * Allocates a device unique context id, and queues a create context command
+ * for the host. Does not wait for host completion.
+ */
+
+/**
+ * struct drm_vmw_context_arg
+ *
+ * @cid: Device unique context ID.
+ *
+ * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl.
+ * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl.
+ */
+
+struct drm_vmw_context_arg {
+	int32_t cid;
+	uint32_t pad64;
+};
+
+/*************************************************************************/
+/**
+ * DRM_VMW_UNREF_CONTEXT - Create a host context.
+ *
+ * Frees a global context id, and queues a destroy host command for the host.
+ * Does not wait for host completion. The context ID can be used directly
+ * in the command stream and shows up as the same context ID on the host.
+ */
+
+/*************************************************************************/
+/**
+ * DRM_VMW_CREATE_SURFACE - Create a host suface.
+ *
+ * Allocates a device unique surface id, and queues a create surface command
+ * for the host. Does not wait for host completion. The surface ID can be
+ * used directly in the command stream and shows up as the same surface
+ * ID on the host.
+ */
+
+/**
+ * struct drm_wmv_surface_create_req
+ *
+ * @flags: Surface flags as understood by the host.
+ * @format: Surface format as understood by the host.
+ * @mip_levels: Number of mip levels for each face.
+ * An unused face should have 0 encoded.
+ * @size_addr: Address of a user-space array of sruct drm_vmw_size
+ * cast to an uint64_t for 32-64 bit compatibility.
+ * The size of the array should equal the total number of mipmap levels.
+ * @shareable: Boolean whether other clients (as identified by file descriptors)
+ * may reference this surface.
+ * @scanout: Boolean whether the surface is intended to be used as a
+ * scanout.
+ *
+ * Input data to the DRM_VMW_CREATE_SURFACE Ioctl.
+ * Output data from the DRM_VMW_REF_SURFACE Ioctl.
+ */
+
+struct drm_vmw_surface_create_req {
+	uint32_t flags;
+	uint32_t format;
+	uint32_t mip_levels[DRM_VMW_MAX_SURFACE_FACES];
+	uint64_t size_addr;
+	int32_t shareable;
+	int32_t scanout;
+};
+
+/**
+ * struct drm_wmv_surface_arg
+ *
+ * @sid: Surface id of created surface or surface to destroy or reference.
+ *
+ * Output data from the DRM_VMW_CREATE_SURFACE Ioctl.
+ * Input argument to the DRM_VMW_UNREF_SURFACE Ioctl.
+ * Input argument to the DRM_VMW_REF_SURFACE Ioctl.
+ */
+
+struct drm_vmw_surface_arg {
+	int32_t sid;
+	uint32_t pad64;
+};
+
+/**
+ * struct drm_vmw_size ioctl.
+ *
+ * @width - mip level width
+ * @height - mip level height
+ * @depth - mip level depth
+ *
+ * Description of a mip level.
+ * Input data to the DRM_WMW_CREATE_SURFACE Ioctl.
+ */
+
+struct drm_vmw_size {
+	uint32_t width;
+	uint32_t height;
+	uint32_t depth;
+	uint32_t pad64;
+};
+
+/**
+ * union drm_vmw_surface_create_arg
+ *
+ * @rep: Output data as described above.
+ * @req: Input data as described above.
+ *
+ * Argument to the DRM_VMW_CREATE_SURFACE Ioctl.
+ */
+
+union drm_vmw_surface_create_arg {
+	struct drm_vmw_surface_arg rep;
+	struct drm_vmw_surface_create_req req;
+};
+
+/*************************************************************************/
+/**
+ * DRM_VMW_REF_SURFACE - Reference a host surface.
+ *
+ * Puts a reference on a host surface with a give sid, as previously
+ * returned by the DRM_VMW_CREATE_SURFACE ioctl.
+ * A reference will make sure the surface isn't destroyed while we hold
+ * it and will allow the calling client to use the surface ID in the command
+ * stream.
+ *
+ * On successful return, the Ioctl returns the surface information given
+ * in the DRM_VMW_CREATE_SURFACE ioctl.
+ */
+
+/**
+ * union drm_vmw_surface_reference_arg
+ *
+ * @rep: Output data as described above.
+ * @req: Input data as described above.
+ *
+ * Argument to the DRM_VMW_REF_SURFACE Ioctl.
+ */
+
+union drm_vmw_surface_reference_arg {
+	struct drm_vmw_surface_create_req rep;
+	struct drm_vmw_surface_arg req;
+};
+
+/*************************************************************************/
+/**
+ * DRM_VMW_UNREF_SURFACE - Unreference a host surface.
+ *
+ * Clear a reference previously put on a host surface.
+ * When all references are gone, including the one implicitly placed
+ * on creation,
+ * a destroy surface command will be queued for the host.
+ * Does not wait for completion.
+ */
+
+/*************************************************************************/
+/**
+ * DRM_VMW_EXECBUF
+ *
+ * Submit a command buffer for execution on the host, and return a
+ * fence sequence that when signaled, indicates that the command buffer has
+ * executed.
+ */
+
+/**
+ * struct drm_vmw_execbuf_arg
+ *
+ * @commands: User-space address of a command buffer cast to an uint64_t.
+ * @command-size: Size in bytes of the command buffer.
+ * @throttle-us: Sleep until software is less than @throttle_us
+ * microseconds ahead of hardware. The driver may round this value
+ * to the nearest kernel tick.
+ * @fence_rep: User-space address of a struct drm_vmw_fence_rep cast to an
+ * uint64_t.
+ * @version: Allows expanding the execbuf ioctl parameters without breaking
+ * backwards compatibility, since user-space will always tell the kernel
+ * which version it uses.
+ * @flags: Execbuf flags. None currently.
+ *
+ * Argument to the DRM_VMW_EXECBUF Ioctl.
+ */
+
+#define DRM_VMW_EXECBUF_VERSION 0
+
+struct drm_vmw_execbuf_arg {
+	uint64_t commands;
+	uint32_t command_size;
+	uint32_t throttle_us;
+	uint64_t fence_rep;
+	 uint32_t version;
+	 uint32_t flags;
+};
+
+/**
+ * struct drm_vmw_fence_rep
+ *
+ * @fence_seq: Fence sequence associated with a command submission.
+ * @error: This member should've been set to -EFAULT on submission.
+ * The following actions should be take on completion:
+ * error == -EFAULT: Fence communication failed. The host is synchronized.
+ * Use the last fence id read from the FIFO fence register.
+ * error != 0 && error != -EFAULT:
+ * Fence submission failed. The host is synchronized. Use the fence_seq member.
+ * error == 0: All is OK, The host may not be synchronized.
+ * Use the fence_seq member.
+ *
+ * Input / Output data to the DRM_VMW_EXECBUF Ioctl.
+ */
+
+struct drm_vmw_fence_rep {
+	uint64_t fence_seq;
+	int32_t error;
+	uint32_t pad64;
+};
+
+/*************************************************************************/
+/**
+ * DRM_VMW_ALLOC_DMABUF
+ *
+ * Allocate a DMA buffer that is visible also to the host.
+ * NOTE: The buffer is
+ * identified by a handle and an offset, which are private to the guest, but
+ * useable in the command stream. The guest kernel may translate these
+ * and patch up the command stream accordingly. In the future, the offset may
+ * be zero at all times, or it may disappear from the interface before it is
+ * fixed.
+ *
+ * The DMA buffer may stay user-space mapped in the guest at all times,
+ * and is thus suitable for sub-allocation.
+ *
+ * DMA buffers are mapped using the mmap() syscall on the drm device.
+ */
+
+/**
+ * struct drm_vmw_alloc_dmabuf_req
+ *
+ * @size: Required minimum size of the buffer.
+ *
+ * Input data to the DRM_VMW_ALLOC_DMABUF Ioctl.
+ */
+
+struct drm_vmw_alloc_dmabuf_req {
+	uint32_t size;
+	uint32_t pad64;
+};
+
+/**
+ * struct drm_vmw_dmabuf_rep
+ *
+ * @map_handle: Offset to use in the mmap() call used to map the buffer.
+ * @handle: Handle unique to this buffer. Used for unreferencing.
+ * @cur_gmr_id: GMR id to use in the command stream when this buffer is
+ * referenced. See not above.
+ * @cur_gmr_offset: Offset to use in the command stream when this buffer is
+ * referenced. See note above.
+ *
+ * Output data from the DRM_VMW_ALLOC_DMABUF Ioctl.
+ */
+
+struct drm_vmw_dmabuf_rep {
+	uint64_t map_handle;
+	uint32_t handle;
+	uint32_t cur_gmr_id;
+	uint32_t cur_gmr_offset;
+	uint32_t pad64;
+};
+
+/**
+ * union drm_vmw_dmabuf_arg
+ *
+ * @req: Input data as described above.
+ * @rep: Output data as described above.
+ *
+ * Argument to the DRM_VMW_ALLOC_DMABUF Ioctl.
+ */
+
+union drm_vmw_alloc_dmabuf_arg {
+	struct drm_vmw_alloc_dmabuf_req req;
+	struct drm_vmw_dmabuf_rep rep;
+};
+
+/*************************************************************************/
+/**
+ * DRM_VMW_UNREF_DMABUF - Free a DMA buffer.
+ *
+ */
+
+/**
+ * struct drm_vmw_unref_dmabuf_arg
+ *
+ * @handle: Handle indicating what buffer to free. Obtained from the
+ * DRM_VMW_ALLOC_DMABUF Ioctl.
+ *
+ * Argument to the DRM_VMW_UNREF_DMABUF Ioctl.
+ */
+
+struct drm_vmw_unref_dmabuf_arg {
+	uint32_t handle;
+	uint32_t pad64;
+};
+
+/*************************************************************************/
+/**
+ * DRM_VMW_FIFO_DEBUG - Get last FIFO submission.
+ *
+ * This IOCTL copies the last FIFO submission directly out of the FIFO buffer.
+ */
+
+/**
+ * struct drm_vmw_fifo_debug_arg
+ *
+ * @debug_buffer: User space address of a debug_buffer cast to an uint64_t //In
+ * @debug_buffer_size: Size in bytes of debug buffer //In
+ * @used_size: Number of bytes copied to the buffer // Out
+ * @did_not_fit: Boolean indicating that the fifo contents did not fit. //Out
+ *
+ * Argument to the DRM_VMW_FIFO_DEBUG Ioctl.
+ */
+
+struct drm_vmw_fifo_debug_arg {
+	uint64_t debug_buffer;
+	uint32_t debug_buffer_size;
+	uint32_t used_size;
+	int32_t did_not_fit;
+	uint32_t pad64;
+};
+
+struct drm_vmw_fence_wait_arg {
+	uint64_t sequence;
+	uint64_t kernel_cookie;
+	int32_t cookie_valid;
+	int32_t pad64;
+};
+
+/*************************************************************************/
+/**
+ * DRM_VMW_CONTROL_STREAM - Control overlays, aka streams.
+ *
+ * This IOCTL controls the overlay units of the svga device.
+ * The SVGA overlay units does not work like regular hardware units in
+ * that they do not automaticaly read back the contents of the given dma
+ * buffer. But instead only read back for each call to this ioctl, and
+ * at any point between this call being made and a following call that
+ * either changes the buffer or disables the stream.
+ */
+
+/**
+ * struct drm_vmw_rect
+ *
+ * Defines a rectangle. Used in the overlay ioctl to define
+ * source and destination rectangle.
+ */
+
+struct drm_vmw_rect {
+	int32_t x;
+	int32_t y;
+	uint32_t w;
+	uint32_t h;
+};
+
+/**
+ * struct drm_vmw_control_stream_arg
+ *
+ * @stream_id: Stearm to control
+ * @enabled: If false all following arguments are ignored.
+ * @handle: Handle to buffer for getting data from.
+ * @format: Format of the overlay as understood by the host.
+ * @width: Width of the overlay.
+ * @height: Height of the overlay.
+ * @size: Size of the overlay in bytes.
+ * @pitch: Array of pitches, the two last are only used for YUV12 formats.
+ * @offset: Offset from start of dma buffer to overlay.
+ * @src: Source rect, must be within the defined area above.
+ * @dst: Destination rect, x and y may be negative.
+ *
+ * Argument to the DRM_VMW_CONTROL_STREAM Ioctl.
+ */
+
+struct drm_vmw_control_stream_arg {
+	uint32_t stream_id;
+	uint32_t enabled;
+
+	uint32_t flags;
+	uint32_t color_key;
+
+	uint32_t handle;
+	uint32_t offset;
+	int32_t format;
+	uint32_t size;
+	uint32_t width;
+	uint32_t height;
+	uint32_t pitch[3];
+
+	uint32_t pad64;
+	struct drm_vmw_rect src;
+	struct drm_vmw_rect dst;
+};
+
+/*************************************************************************/
+/**
+ * DRM_VMW_CURSOR_BYPASS - Give extra information about cursor bypass.
+ *
+ */
+
+#define DRM_VMW_CURSOR_BYPASS_ALL    (1 << 0)
+#define DRM_VMW_CURSOR_BYPASS_FLAGS       (1)
+
+/**
+ * struct drm_vmw_cursor_bypass_arg
+ *
+ * @flags: Flags.
+ * @crtc_id: Crtc id, only used if DMR_CURSOR_BYPASS_ALL isn't passed.
+ * @xpos: X position of cursor.
+ * @ypos: Y position of cursor.
+ * @xhot: X hotspot.
+ * @yhot: Y hotspot.
+ *
+ * Argument to the DRM_VMW_CURSOR_BYPASS Ioctl.
+ */
+
+struct drm_vmw_cursor_bypass_arg {
+	uint32_t flags;
+	uint32_t crtc_id;
+	int32_t xpos;
+	int32_t ypos;
+	int32_t xhot;
+	int32_t yhot;
+};
+
+/*************************************************************************/
+/**
+ * DRM_VMW_CLAIM_STREAM - Claim a single stream.
+ */
+
+/**
+ * struct drm_vmw_context_arg
+ *
+ * @stream_id: Device unique context ID.
+ *
+ * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl.
+ * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl.
+ */
+
+struct drm_vmw_stream_arg {
+	uint32_t stream_id;
+	uint32_t pad64;
+};
+
+/*************************************************************************/
+/**
+ * DRM_VMW_UNREF_STREAM - Unclaim a stream.
+ *
+ * Return a single stream that was claimed by this process. Also makes
+ * sure that the stream has been stopped.
+ */
+
+#endif
--- linux-mvl-dove-2.6.32.orig/include/drm/mga_drm.h
+++ linux-mvl-dove-2.6.32/include/drm/mga_drm.h
@@ -35,7 +35,7 @@
 #ifndef __MGA_DRM_H__
 #define __MGA_DRM_H__
 
-#include <linux/types.h>
+#include "drm.h"
 
 /* WARNING: If you change any of these defines, make sure to change the
  * defines in the Xserver file (mga_sarea.h)
--- linux-mvl-dove-2.6.32.orig/include/drm/i915_drm.h
+++ linux-mvl-dove-2.6.32/include/drm/i915_drm.h
@@ -27,11 +27,11 @@
 #ifndef _I915_DRM_H_
 #define _I915_DRM_H_
 
+#include "drm.h"
+
 /* Please note that modifications to all structs defined here are
  * subject to backwards-compatibility constraints.
  */
-#include <linux/types.h>
-#include "drm.h"
 
 /* Each region is a minimum of 16k, and there are at most 255 of them.
  */
@@ -186,6 +186,9 @@
 #define DRM_I915_GEM_MMAP_GTT	0x24
 #define DRM_I915_GET_PIPE_FROM_CRTC_ID	0x25
 #define DRM_I915_GEM_MADVISE	0x26
+#define DRM_I915_OVERLAY_PUT_IMAGE	0x27
+#define DRM_I915_OVERLAY_ATTRS	0x28
+#define DRM_I915_GEM_EXECBUFFER2	0x29
 
 #define DRM_IOCTL_I915_INIT		DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
 #define DRM_IOCTL_I915_FLUSH		DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH)
@@ -205,6 +208,7 @@
 #define DRM_IOCTL_I915_VBLANK_SWAP	DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_VBLANK_SWAP, drm_i915_vblank_swap_t)
 #define DRM_IOCTL_I915_GEM_INIT		DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_INIT, struct drm_i915_gem_init)
 #define DRM_IOCTL_I915_GEM_EXECBUFFER	DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_EXECBUFFER, struct drm_i915_gem_execbuffer)
+#define DRM_IOCTL_I915_GEM_EXECBUFFER2	DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_EXECBUFFER2, struct drm_i915_gem_execbuffer2)
 #define DRM_IOCTL_I915_GEM_PIN		DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_PIN, struct drm_i915_gem_pin)
 #define DRM_IOCTL_I915_GEM_UNPIN	DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_UNPIN, struct drm_i915_gem_unpin)
 #define DRM_IOCTL_I915_GEM_BUSY		DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_BUSY, struct drm_i915_gem_busy)
@@ -221,8 +225,10 @@
 #define DRM_IOCTL_I915_GEM_SET_TILING	DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_SET_TILING, struct drm_i915_gem_set_tiling)
 #define DRM_IOCTL_I915_GEM_GET_TILING	DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_TILING, struct drm_i915_gem_get_tiling)
 #define DRM_IOCTL_I915_GEM_GET_APERTURE	DRM_IOR  (DRM_COMMAND_BASE + DRM_I915_GEM_GET_APERTURE, struct drm_i915_gem_get_aperture)
-#define DRM_IOCTL_I915_GET_PIPE_FROM_CRTC_ID DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GET_PIPE_FROM_CRTC_ID, struct drm_intel_get_pipe_from_crtc_id)
+#define DRM_IOCTL_I915_GET_PIPE_FROM_CRTC_ID DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GET_PIPE_FROM_CRTC_ID, struct drm_i915_get_pipe_from_crtc_id)
 #define DRM_IOCTL_I915_GEM_MADVISE	DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_MADVISE, struct drm_i915_gem_madvise)
+#define DRM_IOCTL_I915_OVERLAY_PUT_IMAGE	DRM_IOW(DRM_COMMAND_BASE + DRM_IOCTL_I915_OVERLAY_ATTRS, struct drm_intel_overlay_put_image)
+#define DRM_IOCTL_I915_OVERLAY_ATTRS	DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_OVERLAY_ATTRS, struct drm_intel_overlay_attrs)
 
 /* Allow drivers to submit batchbuffers directly to hardware, relying
  * on the security mechanisms provided by hardware.
@@ -266,6 +272,9 @@
 #define I915_PARAM_CHIPSET_ID            4
 #define I915_PARAM_HAS_GEM               5
 #define I915_PARAM_NUM_FENCES_AVAIL      6
+#define I915_PARAM_HAS_OVERLAY           7
+#define I915_PARAM_HAS_PAGEFLIPPING	 8
+#define I915_PARAM_HAS_EXECBUF2          9
 
 typedef struct drm_i915_getparam {
 	int param;
@@ -561,6 +570,57 @@
 	__u64 cliprects_ptr;
 };
 
+struct drm_i915_gem_exec_object2 {
+	/**
+	 * User's handle for a buffer to be bound into the GTT for this
+	 * operation.
+	 */
+	__u32 handle;
+
+	/** Number of relocations to be performed on this buffer */
+	__u32 relocation_count;
+	/**
+	 * Pointer to array of struct drm_i915_gem_relocation_entry containing
+	 * the relocations to be performed in this buffer.
+	 */
+	__u64 relocs_ptr;
+
+	/** Required alignment in graphics aperture */
+	__u64 alignment;
+
+	/**
+	 * Returned value of the updated offset of the object, for future
+	 * presumed_offset writes.
+	 */
+	__u64 offset;
+
+#define EXEC_OBJECT_NEEDS_FENCE (1<<0)
+	__u64 flags;
+	__u64 rsvd1;
+	__u64 rsvd2;
+};
+
+struct drm_i915_gem_execbuffer2 {
+	/**
+	 * List of gem_exec_object2 structs
+	 */
+	__u64 buffers_ptr;
+	__u32 buffer_count;
+
+	/** Offset in the batchbuffer to start execution from. */
+	__u32 batch_start_offset;
+	/** Bytes used in batchbuffer from batch_start_offset */
+	__u32 batch_len;
+	__u32 DR1;
+	__u32 DR4;
+	__u32 num_cliprects;
+	/** This is a struct drm_clip_rect *cliprects */
+	__u64 cliprects_ptr;
+	__u64 flags; /* currently unused */
+	__u64 rsvd1;
+	__u64 rsvd2;
+};
+
 struct drm_i915_gem_pin {
 	/** Handle of the buffer to be pinned. */
 	__u32 handle;
@@ -686,4 +746,70 @@
 	__u32 retained;
 };
 
+/* flags */
+#define I915_OVERLAY_TYPE_MASK 		0xff
+#define I915_OVERLAY_YUV_PLANAR 	0x01
+#define I915_OVERLAY_YUV_PACKED 	0x02
+#define I915_OVERLAY_RGB		0x03
+
+#define I915_OVERLAY_DEPTH_MASK		0xff00
+#define I915_OVERLAY_RGB24		0x1000
+#define I915_OVERLAY_RGB16		0x2000
+#define I915_OVERLAY_RGB15		0x3000
+#define I915_OVERLAY_YUV422		0x0100
+#define I915_OVERLAY_YUV411		0x0200
+#define I915_OVERLAY_YUV420		0x0300
+#define I915_OVERLAY_YUV410		0x0400
+
+#define I915_OVERLAY_SWAP_MASK		0xff0000
+#define I915_OVERLAY_NO_SWAP		0x000000
+#define I915_OVERLAY_UV_SWAP		0x010000
+#define I915_OVERLAY_Y_SWAP		0x020000
+#define I915_OVERLAY_Y_AND_UV_SWAP	0x030000
+
+#define I915_OVERLAY_FLAGS_MASK		0xff000000
+#define I915_OVERLAY_ENABLE		0x01000000
+
+struct drm_intel_overlay_put_image {
+	/* various flags and src format description */
+	__u32 flags;
+	/* source picture description */
+	__u32 bo_handle;
+	/* stride values and offsets are in bytes, buffer relative */
+	__u16 stride_Y; /* stride for packed formats */
+	__u16 stride_UV;
+	__u32 offset_Y; /* offset for packet formats */
+	__u32 offset_U;
+	__u32 offset_V;
+	/* in pixels */
+	__u16 src_width;
+	__u16 src_height;
+	/* to compensate the scaling factors for partially covered surfaces */
+	__u16 src_scan_width;
+	__u16 src_scan_height;
+	/* output crtc description */
+	__u32 crtc_id;
+	__u16 dst_x;
+	__u16 dst_y;
+	__u16 dst_width;
+	__u16 dst_height;
+};
+
+/* flags */
+#define I915_OVERLAY_UPDATE_ATTRS	(1<<0)
+#define I915_OVERLAY_UPDATE_GAMMA	(1<<1)
+struct drm_intel_overlay_attrs {
+	__u32 flags;
+	__u32 color_key;
+	__s32 brightness;
+	__u32 contrast;
+	__u32 saturation;
+	__u32 gamma0;
+	__u32 gamma1;
+	__u32 gamma2;
+	__u32 gamma3;
+	__u32 gamma4;
+	__u32 gamma5;
+};
+
 #endif				/* _I915_DRM_H_ */
--- linux-mvl-dove-2.6.32.orig/include/drm/Kbuild
+++ linux-mvl-dove-2.6.32/include/drm/Kbuild
@@ -7,4 +7,6 @@
 unifdef-y += radeon_drm.h
 unifdef-y += sis_drm.h
 unifdef-y += savage_drm.h
+unifdef-y += vmwgfx_drm.h
 unifdef-y += via_drm.h
+unifdef-y += nouveau_drm.h
--- linux-mvl-dove-2.6.32.orig/include/drm/drm_mm.h
+++ linux-mvl-dove-2.6.32/include/drm/drm_mm.h
@@ -44,7 +44,10 @@
 struct drm_mm_node {
 	struct list_head fl_entry;
 	struct list_head ml_entry;
-	int free;
+	unsigned free : 1;
+	unsigned scanned_block : 1;
+	unsigned scanned_prev_free : 1;
+	unsigned scanned_next_free : 1;
 	unsigned long start;
 	unsigned long size;
 	struct drm_mm *mm;
@@ -57,6 +60,11 @@
 	struct list_head unused_nodes;
 	int num_unused;
 	spinlock_t unused_lock;
+	unsigned scan_alignment;
+	unsigned long scan_size;
+	unsigned long scan_hit_start;
+	unsigned scan_hit_size;
+	unsigned scanned_blocks;
 };
 
 /*
@@ -66,6 +74,13 @@
 						    unsigned long size,
 						    unsigned alignment,
 						    int atomic);
+extern struct drm_mm_node *drm_mm_get_block_range_generic(
+						struct drm_mm_node *node,
+						unsigned long size,
+						unsigned alignment,
+						unsigned long start,
+						unsigned long end,
+						int atomic);
 static inline struct drm_mm_node *drm_mm_get_block(struct drm_mm_node *parent,
 						   unsigned long size,
 						   unsigned alignment)
@@ -78,11 +93,38 @@
 {
 	return drm_mm_get_block_generic(parent, size, alignment, 1);
 }
+static inline struct drm_mm_node *drm_mm_get_block_range(
+						struct drm_mm_node *parent,
+						unsigned long size,
+						unsigned alignment,
+						unsigned long start,
+						unsigned long end)
+{
+	return drm_mm_get_block_range_generic(parent, size, alignment,
+						start, end, 0);
+}
+static inline struct drm_mm_node *drm_mm_get_block_atomic_range(
+						struct drm_mm_node *parent,
+						unsigned long size,
+						unsigned alignment,
+						unsigned long start,
+						unsigned long end)
+{
+	return drm_mm_get_block_range_generic(parent, size, alignment,
+						start, end, 1);
+}
 extern void drm_mm_put_block(struct drm_mm_node *cur);
 extern struct drm_mm_node *drm_mm_search_free(const struct drm_mm *mm,
 					      unsigned long size,
 					      unsigned alignment,
 					      int best_match);
+extern struct drm_mm_node *drm_mm_search_free_in_range(
+						const struct drm_mm *mm,
+						unsigned long size,
+						unsigned alignment,
+						unsigned long start,
+						unsigned long end,
+						int best_match);
 extern int drm_mm_init(struct drm_mm *mm, unsigned long start,
 		       unsigned long size);
 extern void drm_mm_takedown(struct drm_mm *mm);
@@ -99,6 +141,12 @@
 	return block->mm;
 }
 
+void drm_mm_init_scan(struct drm_mm *mm, unsigned long size,
+		      unsigned alignment);
+int drm_mm_scan_add_block(struct drm_mm_node *node);
+int drm_mm_scan_remove_block(struct drm_mm_node *node);
+
+extern void drm_mm_debug_table(struct drm_mm *mm, const char *prefix);
 #ifdef CONFIG_DEBUG_FS
 int drm_mm_dump_table(struct seq_file *m, struct drm_mm *mm);
 #endif
--- linux-mvl-dove-2.6.32.orig/include/drm/drm_edid.h
+++ linux-mvl-dove-2.6.32/include/drm/drm_edid.h
@@ -106,6 +106,10 @@
 	u8 wpindex2[3];
 } __attribute__((packed));
 
+struct cvt_timing {
+	u8 code[3];
+} __attribute__((packed));
+
 struct detailed_non_pixel {
 	u8 pad1;
 	u8 type; /* ff=serial, fe=string, fd=monitor range, fc=monitor name
@@ -117,9 +121,13 @@
 		struct detailed_data_monitor_range range;
 		struct detailed_data_wpindex color;
 		struct std_timing timings[5];
+		struct cvt_timing cvt[4];
 	} data;
 } __attribute__((packed));
 
+#define EDID_DETAIL_EST_TIMINGS 0xf7
+#define EDID_DETAIL_CVT_3BYTE 0xf8
+#define EDID_DETAIL_COLOR_MGMT_DATA 0xf9
 #define EDID_DETAIL_STD_MODES 0xfa
 #define EDID_DETAIL_MONITOR_CPDATA 0xfb
 #define EDID_DETAIL_MONITOR_NAME 0xfc
--- linux-mvl-dove-2.6.32.orig/include/drm/drm_mode.h
+++ linux-mvl-dove-2.6.32/include/drm/drm_mode.h
@@ -27,9 +27,6 @@
 #ifndef _DRM_MODE_H
 #define _DRM_MODE_H
 
-#include <linux/kernel.h>
-#include <linux/types.h>
-
 #define DRM_DISPLAY_INFO_LEN	32
 #define DRM_CONNECTOR_NAME_LEN	32
 #define DRM_DISPLAY_MODE_LEN	32
@@ -78,12 +75,17 @@
 #define DRM_MODE_DITHERING_OFF	0
 #define DRM_MODE_DITHERING_ON	1
 
+/* Dirty info options */
+#define DRM_MODE_DIRTY_OFF      0
+#define DRM_MODE_DIRTY_ON       1
+#define DRM_MODE_DIRTY_ANNOTATE 2
+
 struct drm_mode_modeinfo {
 	__u32 clock;
 	__u16 hdisplay, hsync_start, hsync_end, htotal, hskew;
 	__u16 vdisplay, vsync_start, vsync_end, vtotal, vscan;
 
-	__u32 vrefresh; /* vertical refresh * 1000 */
+	__u32 vrefresh;
 
 	__u32 flags;
 	__u32 type;
@@ -158,6 +160,7 @@
 #define DRM_MODE_CONNECTOR_HDMIA	11
 #define DRM_MODE_CONNECTOR_HDMIB	12
 #define DRM_MODE_CONNECTOR_TV		13
+#define DRM_MODE_CONNECTOR_eDP		14
 
 struct drm_mode_get_connector {
 
@@ -225,6 +228,45 @@
 	__u32 handle;
 };
 
+#define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01
+#define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02
+#define DRM_MODE_FB_DIRTY_FLAGS         0x03
+
+/*
+ * Mark a region of a framebuffer as dirty.
+ *
+ * Some hardware does not automatically update display contents
+ * as a hardware or software draw to a framebuffer. This ioctl
+ * allows userspace to tell the kernel and the hardware what
+ * regions of the framebuffer have changed.
+ *
+ * The kernel or hardware is free to update more then just the
+ * region specified by the clip rects. The kernel or hardware
+ * may also delay and/or coalesce several calls to dirty into a
+ * single update.
+ *
+ * Userspace may annotate the updates, the annotates are a
+ * promise made by the caller that the change is either a copy
+ * of pixels or a fill of a single color in the region specified.
+ *
+ * If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then
+ * the number of updated regions are half of num_clips given,
+ * where the clip rects are paired in src and dst. The width and
+ * height of each one of the pairs must match.
+ *
+ * If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller
+ * promises that the region specified of the clip rects is filled
+ * completely with a single color as given in the color argument.
+ */
+
+struct drm_mode_fb_dirty_cmd {
+	__u32 fb_id;
+	__u32 flags;
+	__u32 color;
+	__u32 num_clips;
+	__u64 clips_ptr;
+};
+
 struct drm_mode_mode_cmd {
 	__u32 connector_id;
 	struct drm_mode_modeinfo mode;
@@ -268,4 +310,37 @@
 	__u64 blue;
 };
 
+#define DRM_MODE_PAGE_FLIP_EVENT 0x01
+#define DRM_MODE_PAGE_FLIP_FLAGS DRM_MODE_PAGE_FLIP_EVENT
+
+/*
+ * Request a page flip on the specified crtc.
+ *
+ * This ioctl will ask KMS to schedule a page flip for the specified
+ * crtc.  Once any pending rendering targeting the specified fb (as of
+ * ioctl time) has completed, the crtc will be reprogrammed to display
+ * that fb after the next vertical refresh.  The ioctl returns
+ * immediately, but subsequent rendering to the current fb will block
+ * in the execbuffer ioctl until the page flip happens.  If a page
+ * flip is already pending as the ioctl is called, EBUSY will be
+ * returned.
+ *
+ * The ioctl supports one flag, DRM_MODE_PAGE_FLIP_EVENT, which will
+ * request that drm sends back a vblank event (see drm.h: struct
+ * drm_event_vblank) when the page flip is done.  The user_data field
+ * passed in with this ioctl will be returned as the user_data field
+ * in the vblank event struct.
+ *
+ * The reserved field must be zero until we figure out something
+ * clever to use it for.
+ */
+
+struct drm_mode_crtc_page_flip {
+	__u32 crtc_id;
+	__u32 fb_id;
+	__u32 flags;
+	__u32 reserved;
+	__u64 user_data;
+};
+
 #endif
--- linux-mvl-dove-2.6.32.orig/include/drm/ttm/ttm_lock.h
+++ linux-mvl-dove-2.6.32/include/drm/ttm/ttm_lock.h
@@ -0,0 +1,247 @@
+/**************************************************************************
+ *
+ * Copyright (c) 2007-2009 VMware, Inc., Palo Alto, CA., USA
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **************************************************************************/
+/*
+ * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com>
+ */
+
+/** @file ttm_lock.h
+ * This file implements a simple replacement for the buffer manager use
+ * of the DRM heavyweight hardware lock.
+ * The lock is a read-write lock. Taking it in read mode and write mode
+ * is relatively fast, and intended for in-kernel use only.
+ *
+ * The vt mode is used only when there is a need to block all
+ * user-space processes from validating buffers.
+ * It's allowed to leave kernel space with the vt lock held.
+ * If a user-space process dies while having the vt-lock,
+ * it will be released during the file descriptor release. The vt lock
+ * excludes write lock and read lock.
+ *
+ * The suspend mode is used to lock out all TTM users when preparing for
+ * and executing suspend operations.
+ *
+ */
+
+#ifndef _TTM_LOCK_H_
+#define _TTM_LOCK_H_
+
+#include "ttm/ttm_object.h"
+#include <linux/wait.h>
+#include <asm/atomic.h>
+
+/**
+ * struct ttm_lock
+ *
+ * @base: ttm base object used solely to release the lock if the client
+ * holding the lock dies.
+ * @queue: Queue for processes waiting for lock change-of-status.
+ * @lock: Spinlock protecting some lock members.
+ * @rw: Read-write lock counter. Protected by @lock.
+ * @flags: Lock state. Protected by @lock.
+ * @kill_takers: Boolean whether to kill takers of the lock.
+ * @signal: Signal to send when kill_takers is true.
+ */
+
+struct ttm_lock {
+	struct ttm_base_object base;
+	wait_queue_head_t queue;
+	spinlock_t lock;
+	int32_t rw;
+	uint32_t flags;
+	bool kill_takers;
+	int signal;
+	struct ttm_object_file *vt_holder;
+};
+
+
+/**
+ * ttm_lock_init
+ *
+ * @lock: Pointer to a struct ttm_lock
+ * Initializes the lock.
+ */
+extern void ttm_lock_init(struct ttm_lock *lock);
+
+/**
+ * ttm_read_unlock
+ *
+ * @lock: Pointer to a struct ttm_lock
+ *
+ * Releases a read lock.
+ */
+extern void ttm_read_unlock(struct ttm_lock *lock);
+
+/**
+ * ttm_read_lock
+ *
+ * @lock: Pointer to a struct ttm_lock
+ * @interruptible: Interruptible sleeping while waiting for a lock.
+ *
+ * Takes the lock in read mode.
+ * Returns:
+ * -ERESTARTSYS If interrupted by a signal and interruptible is true.
+ */
+extern int ttm_read_lock(struct ttm_lock *lock, bool interruptible);
+
+/**
+ * ttm_read_trylock
+ *
+ * @lock: Pointer to a struct ttm_lock
+ * @interruptible: Interruptible sleeping while waiting for a lock.
+ *
+ * Tries to take the lock in read mode. If the lock is already held
+ * in write mode, the function will return -EBUSY. If the lock is held
+ * in vt or suspend mode, the function will sleep until these modes
+ * are unlocked.
+ *
+ * Returns:
+ * -EBUSY The lock was already held in write mode.
+ * -ERESTARTSYS If interrupted by a signal and interruptible is true.
+ */
+extern int ttm_read_trylock(struct ttm_lock *lock, bool interruptible);
+
+/**
+ * ttm_write_unlock
+ *
+ * @lock: Pointer to a struct ttm_lock
+ *
+ * Releases a write lock.
+ */
+extern void ttm_write_unlock(struct ttm_lock *lock);
+
+/**
+ * ttm_write_lock
+ *
+ * @lock: Pointer to a struct ttm_lock
+ * @interruptible: Interruptible sleeping while waiting for a lock.
+ *
+ * Takes the lock in write mode.
+ * Returns:
+ * -ERESTARTSYS If interrupted by a signal and interruptible is true.
+ */
+extern int ttm_write_lock(struct ttm_lock *lock, bool interruptible);
+
+/**
+ * ttm_lock_downgrade
+ *
+ * @lock: Pointer to a struct ttm_lock
+ *
+ * Downgrades a write lock to a read lock.
+ */
+extern void ttm_lock_downgrade(struct ttm_lock *lock);
+
+/**
+ * ttm_suspend_lock
+ *
+ * @lock: Pointer to a struct ttm_lock
+ *
+ * Takes the lock in suspend mode. Excludes read and write mode.
+ */
+extern void ttm_suspend_lock(struct ttm_lock *lock);
+
+/**
+ * ttm_suspend_unlock
+ *
+ * @lock: Pointer to a struct ttm_lock
+ *
+ * Releases a suspend lock
+ */
+extern void ttm_suspend_unlock(struct ttm_lock *lock);
+
+/**
+ * ttm_vt_lock
+ *
+ * @lock: Pointer to a struct ttm_lock
+ * @interruptible: Interruptible sleeping while waiting for a lock.
+ * @tfile: Pointer to a struct ttm_object_file to register the lock with.
+ *
+ * Takes the lock in vt mode.
+ * Returns:
+ * -ERESTARTSYS If interrupted by a signal and interruptible is true.
+ * -ENOMEM: Out of memory when locking.
+ */
+extern int ttm_vt_lock(struct ttm_lock *lock, bool interruptible,
+		       struct ttm_object_file *tfile);
+
+/**
+ * ttm_vt_unlock
+ *
+ * @lock: Pointer to a struct ttm_lock
+ *
+ * Releases a vt lock.
+ * Returns:
+ * -EINVAL If the lock was not held.
+ */
+extern int ttm_vt_unlock(struct ttm_lock *lock);
+
+/**
+ * ttm_write_unlock
+ *
+ * @lock: Pointer to a struct ttm_lock
+ *
+ * Releases a write lock.
+ */
+extern void ttm_write_unlock(struct ttm_lock *lock);
+
+/**
+ * ttm_write_lock
+ *
+ * @lock: Pointer to a struct ttm_lock
+ * @interruptible: Interruptible sleeping while waiting for a lock.
+ *
+ * Takes the lock in write mode.
+ * Returns:
+ * -ERESTARTSYS If interrupted by a signal and interruptible is true.
+ */
+extern int ttm_write_lock(struct ttm_lock *lock, bool interruptible);
+
+/**
+ * ttm_lock_set_kill
+ *
+ * @lock: Pointer to a struct ttm_lock
+ * @val: Boolean whether to kill processes taking the lock.
+ * @signal: Signal to send to the process taking the lock.
+ *
+ * The kill-when-taking-lock functionality is used to kill processes that keep
+ * on using the TTM functionality when its resources has been taken down, for
+ * example when the X server exits. A typical sequence would look like this:
+ * - X server takes lock in write mode.
+ * - ttm_lock_set_kill() is called with @val set to true.
+ * - As part of X server exit, TTM resources are taken down.
+ * - X server releases the lock on file release.
+ * - Another dri client wants to render, takes the lock and is killed.
+ *
+ */
+static inline void ttm_lock_set_kill(struct ttm_lock *lock, bool val,
+				     int signal)
+{
+	lock->kill_takers = val;
+	if (val)
+		lock->signal = signal;
+}
+
+#endif
--- linux-mvl-dove-2.6.32.orig/include/drm/ttm/ttm_memory.h
+++ linux-mvl-dove-2.6.32/include/drm/ttm/ttm_memory.h
@@ -33,6 +33,7 @@
 #include <linux/wait.h>
 #include <linux/errno.h>
 #include <linux/kobject.h>
+#include <linux/mm.h>
 
 /**
  * struct ttm_mem_shrink - callback to shrink TTM memory usage.
--- linux-mvl-dove-2.6.32.orig/include/drm/ttm/ttm_execbuf_util.h
+++ linux-mvl-dove-2.6.32/include/drm/ttm/ttm_execbuf_util.h
@@ -0,0 +1,107 @@
+/**************************************************************************
+ *
+ * Copyright (c) 2006-2009 VMware, Inc., Palo Alto, CA., USA
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **************************************************************************/
+/*
+ * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com>
+ */
+
+#ifndef _TTM_EXECBUF_UTIL_H_
+#define _TTM_EXECBUF_UTIL_H_
+
+#include "ttm/ttm_bo_api.h"
+#include <linux/list.h>
+
+/**
+ * struct ttm_validate_buffer
+ *
+ * @head:           list head for thread-private list.
+ * @bo:             refcounted buffer object pointer.
+ * @new_sync_obj_arg: New sync_obj_arg for @bo, to be used once
+ * adding a new sync object.
+ * @reservied:      Indicates whether @bo has been reserved for validation.
+ */
+
+struct ttm_validate_buffer {
+	struct list_head head;
+	struct ttm_buffer_object *bo;
+	void *new_sync_obj_arg;
+	bool reserved;
+};
+
+/**
+ * function ttm_eu_backoff_reservation
+ *
+ * @list:     thread private list of ttm_validate_buffer structs.
+ *
+ * Undoes all buffer validation reservations for bos pointed to by
+ * the list entries.
+ */
+
+extern void ttm_eu_backoff_reservation(struct list_head *list);
+
+/**
+ * function ttm_eu_reserve_buffers
+ *
+ * @list:    thread private list of ttm_validate_buffer structs.
+ * @val_seq: A unique sequence number.
+ *
+ * Tries to reserve bos pointed to by the list entries for validation.
+ * If the function returns 0, all buffers are marked as "unfenced",
+ * taken off the lru lists and are not synced for write CPU usage.
+ *
+ * If the function detects a deadlock due to multiple threads trying to
+ * reserve the same buffers in reverse order, all threads except one will
+ * back off and retry. This function may sleep while waiting for
+ * CPU write reservations to be cleared, and for other threads to
+ * unreserve their buffers.
+ *
+ * This function may return -ERESTART or -EAGAIN if the calling process
+ * receives a signal while waiting. In that case, no buffers on the list
+ * will be reserved upon return.
+ *
+ * Buffers reserved by this function should be unreserved by
+ * a call to either ttm_eu_backoff_reservation() or
+ * ttm_eu_fence_buffer_objects() when command submission is complete or
+ * has failed.
+ */
+
+extern int ttm_eu_reserve_buffers(struct list_head *list, uint32_t val_seq);
+
+/**
+ * function ttm_eu_fence_buffer_objects.
+ *
+ * @list:        thread private list of ttm_validate_buffer structs.
+ * @sync_obj:    The new sync object for the buffers.
+ *
+ * This function should be called when command submission is complete, and
+ * it will add a new sync object to bos pointed to by entries on @list.
+ * It also unreserves all buffers, putting them on lru lists.
+ *
+ */
+
+extern void ttm_eu_fence_buffer_objects(struct list_head *list, void *sync_obj);
+
+#endif
--- linux-mvl-dove-2.6.32.orig/include/drm/ttm/ttm_bo_api.h
+++ linux-mvl-dove-2.6.32/include/drm/ttm/ttm_bo_api.h
@@ -44,6 +44,29 @@
 
 struct drm_mm_node;
 
+
+/**
+ * struct ttm_placement
+ *
+ * @fpfn:		first valid page frame number to put the object
+ * @lpfn:		last valid page frame number to put the object
+ * @num_placement:	number of prefered placements
+ * @placement:		prefered placements
+ * @num_busy_placement:	number of prefered placements when need to evict buffer
+ * @busy_placement:	prefered placements when need to evict buffer
+ *
+ * Structure indicating the placement you request for an object.
+ */
+struct ttm_placement {
+	unsigned	fpfn;
+	unsigned	lpfn;
+	unsigned	num_placement;
+	const uint32_t	*placement;
+	unsigned	num_busy_placement;
+	const uint32_t	*busy_placement;
+};
+
+
 /**
  * struct ttm_mem_reg
  *
@@ -109,10 +132,6 @@
  * the object is destroyed.
  * @event_queue: Queue for processes waiting on buffer object status change.
  * @lock: spinlock protecting mostly synchronization members.
- * @proposed_placement: Proposed placement for the buffer. Changed only by the
- * creator prior to validation as opposed to bo->mem.proposed_flags which is
- * changed by the implementation prior to a buffer move if it wants to outsmart
- * the buffer creator / user. This latter happens, for example, at eviction.
  * @mem: structure describing current placement.
  * @persistant_swap_storage: Usually the swap storage is deleted for buffers
  * pinned in physical memory. If this behaviour is not desired, this member
@@ -177,7 +196,6 @@
 	 * Members protected by the bo::reserved lock.
 	 */
 
-	uint32_t proposed_placement;
 	struct ttm_mem_reg mem;
 	struct file *persistant_swap_storage;
 	struct ttm_tt *ttm;
@@ -206,9 +224,11 @@
 
 	atomic_t reserved;
 
-
 	/**
 	 * Members protected by the bo::lock
+	 * In addition, setting sync_obj to anything else
+	 * than NULL requires bo::reserved to be held. This allows for
+	 * checking NULL while reserved but not holding bo::lock.
 	 */
 
 	void *sync_obj_arg;
@@ -285,29 +305,30 @@
  * Note: It might be necessary to block validations before the
  * wait by reserving the buffer.
  * Returns -EBUSY if no_wait is true and the buffer is busy.
- * Returns -ERESTART if interrupted by a signal.
+ * Returns -ERESTARTSYS if interrupted by a signal.
  */
 extern int ttm_bo_wait(struct ttm_buffer_object *bo, bool lazy,
 		       bool interruptible, bool no_wait);
 /**
- * ttm_buffer_object_validate
+ * ttm_bo_validate
  *
  * @bo: The buffer object.
- * @proposed_placement: Proposed_placement for the buffer object.
+ * @placement: Proposed placement for the buffer object.
  * @interruptible: Sleep interruptible if sleeping.
  * @no_wait: Return immediately if the buffer is busy.
  *
  * Changes placement and caching policy of the buffer object
- * according to bo::proposed_flags.
+ * according proposed placement.
  * Returns
- * -EINVAL on invalid proposed_flags.
+ * -EINVAL on invalid proposed placement.
  * -ENOMEM on out-of-memory condition.
  * -EBUSY if no_wait is true and buffer busy.
- * -ERESTART if interrupted by a signal.
+ * -ERESTARTSYS if interrupted by a signal.
  */
-extern int ttm_buffer_object_validate(struct ttm_buffer_object *bo,
-				      uint32_t proposed_placement,
-				      bool interruptible, bool no_wait);
+extern int ttm_bo_validate(struct ttm_buffer_object *bo,
+				struct ttm_placement *placement,
+				bool interruptible, bool no_wait);
+
 /**
  * ttm_bo_unref
  *
@@ -328,7 +349,7 @@
  * waiting for buffer idle. This lock is recursive.
  * Returns
  * -EBUSY if the buffer is busy and no_wait is true.
- * -ERESTART if interrupted by a signal.
+ * -ERESTARTSYS if interrupted by a signal.
  */
 
 extern int
@@ -343,7 +364,7 @@
 extern void ttm_bo_synccpu_write_release(struct ttm_buffer_object *bo);
 
 /**
- * ttm_buffer_object_init
+ * ttm_bo_init
  *
  * @bdev: Pointer to a ttm_bo_device struct.
  * @bo: Pointer to a ttm_buffer_object to be initialized.
@@ -371,20 +392,20 @@
  * Returns
  * -ENOMEM: Out of memory.
  * -EINVAL: Invalid placement flags.
- * -ERESTART: Interrupted by signal while sleeping waiting for resources.
+ * -ERESTARTSYS: Interrupted by signal while sleeping waiting for resources.
  */
 
-extern int ttm_buffer_object_init(struct ttm_bo_device *bdev,
-				  struct ttm_buffer_object *bo,
-				  unsigned long size,
-				  enum ttm_bo_type type,
-				  uint32_t flags,
-				  uint32_t page_alignment,
-				  unsigned long buffer_start,
-				  bool interrubtible,
-				  struct file *persistant_swap_storage,
-				  size_t acc_size,
-				  void (*destroy) (struct ttm_buffer_object *));
+extern int ttm_bo_init(struct ttm_bo_device *bdev,
+			struct ttm_buffer_object *bo,
+			unsigned long size,
+			enum ttm_bo_type type,
+			struct ttm_placement *placement,
+			uint32_t page_alignment,
+			unsigned long buffer_start,
+			bool interrubtible,
+			struct file *persistant_swap_storage,
+			size_t acc_size,
+			void (*destroy) (struct ttm_buffer_object *));
 /**
  * ttm_bo_synccpu_object_init
  *
@@ -405,47 +426,43 @@
  * GEM user interface.
  * @p_bo: On successful completion *p_bo points to the created object.
  *
- * This function allocates a ttm_buffer_object, and then calls
- * ttm_buffer_object_init on that object.
- * The destroy function is set to kfree().
+ * This function allocates a ttm_buffer_object, and then calls ttm_bo_init
+ * on that object. The destroy function is set to kfree().
  * Returns
  * -ENOMEM: Out of memory.
  * -EINVAL: Invalid placement flags.
- * -ERESTART: Interrupted by signal while waiting for resources.
+ * -ERESTARTSYS: Interrupted by signal while waiting for resources.
  */
 
-extern int ttm_buffer_object_create(struct ttm_bo_device *bdev,
-				    unsigned long size,
-				    enum ttm_bo_type type,
-				    uint32_t flags,
-				    uint32_t page_alignment,
-				    unsigned long buffer_start,
-				    bool interruptible,
-				    struct file *persistant_swap_storage,
-				    struct ttm_buffer_object **p_bo);
+extern int ttm_bo_create(struct ttm_bo_device *bdev,
+				unsigned long size,
+				enum ttm_bo_type type,
+				struct ttm_placement *placement,
+				uint32_t page_alignment,
+				unsigned long buffer_start,
+				bool interruptible,
+				struct file *persistant_swap_storage,
+				struct ttm_buffer_object **p_bo);
 
 /**
  * ttm_bo_check_placement
  *
- * @bo: the buffer object.
- * @set_flags: placement flags to set.
- * @clr_flags: placement flags to clear.
+ * @bo:		the buffer object.
+ * @placement:	placements
  *
  * Performs minimal validity checking on an intended change of
  * placement flags.
  * Returns
  * -EINVAL: Intended change is invalid or not allowed.
  */
-
 extern int ttm_bo_check_placement(struct ttm_buffer_object *bo,
-				  uint32_t set_flags, uint32_t clr_flags);
+					struct ttm_placement *placement);
 
 /**
  * ttm_bo_init_mm
  *
  * @bdev: Pointer to a ttm_bo_device struct.
  * @mem_type: The memory type.
- * @p_offset: offset for managed area in pages.
  * @p_size: size managed area in pages.
  *
  * Initialize a manager for a given memory type.
@@ -458,7 +475,7 @@
  */
 
 extern int ttm_bo_init_mm(struct ttm_bo_device *bdev, unsigned type,
-			  unsigned long p_offset, unsigned long p_size);
+				unsigned long p_size);
 /**
  * ttm_bo_clean_mm
  *
@@ -503,7 +520,7 @@
  *
  * Returns:
  * -EINVAL: Invalid or uninitialized memory type.
- * -ERESTART: The call was interrupted by a signal while waiting to
+ * -ERESTARTSYS: The call was interrupted by a signal while waiting to
  * evict a buffer.
  */
 
@@ -606,7 +623,7 @@
  * be called from the fops::read and fops::write method.
  * Returns:
  * See man (2) write, man(2) read. In particular,
- * the function may return -EINTR if
+ * the function may return -ERESTARTSYS if
  * interrupted by a signal.
  */
 
--- linux-mvl-dove-2.6.32.orig/include/drm/ttm/ttm_bo_driver.h
+++ linux-mvl-dove-2.6.32/include/drm/ttm/ttm_bo_driver.h
@@ -242,12 +242,6 @@
 /**
  * struct ttm_bo_driver
  *
- * @mem_type_prio: Priority array of memory types to place a buffer object in
- * if it fits without evicting buffers from any of these memory types.
- * @mem_busy_prio: Priority array of memory types to place a buffer object in
- * if it needs to evict buffers to make room.
- * @num_mem_type_prio: Number of elements in the @mem_type_prio array.
- * @num_mem_busy_prio: Number of elements in the @num_mem_busy_prio array.
  * @create_ttm_backend_entry: Callback to create a struct ttm_backend.
  * @invalidate_caches: Callback to invalidate read caches when a buffer object
  * has been evicted.
@@ -265,11 +259,6 @@
  */
 
 struct ttm_bo_driver {
-	const uint32_t *mem_type_prio;
-	const uint32_t *mem_busy_prio;
-	uint32_t num_mem_type_prio;
-	uint32_t num_mem_busy_prio;
-
 	/**
 	 * struct ttm_bo_driver member create_ttm_backend_entry
 	 *
@@ -306,7 +295,8 @@
 	 * finished, they'll end up in bo->mem.flags
 	 */
 
-	 uint32_t(*evict_flags) (struct ttm_buffer_object *bo);
+	 void(*evict_flags) (struct ttm_buffer_object *bo,
+				struct ttm_placement *placement);
 	/**
 	 * struct ttm_bo_driver member move:
 	 *
@@ -363,6 +353,11 @@
 	/* notify the driver we are taking a fault on this BO
 	 * and have reserved it */
 	void (*fault_reserve_notify)(struct ttm_buffer_object *bo);
+
+	/**
+	 * notify the driver that we're about to swap out this bo
+	 */
+	void (*swap_notify) (struct ttm_buffer_object *bo);
 };
 
 /**
@@ -545,6 +540,15 @@
 extern int ttm_tt_bind(struct ttm_tt *ttm, struct ttm_mem_reg *bo_mem);
 
 /**
+ * ttm_tt_populate:
+ *
+ * @ttm: The struct ttm_tt to contain the backing pages.
+ *
+ * Add backing pages to all of @ttm
+ */
+extern int ttm_tt_populate(struct ttm_tt *ttm);
+
+/**
  * ttm_ttm_destroy:
  *
  * @ttm: The struct ttm_tt.
@@ -639,12 +643,12 @@
  * -EBUSY: No space available (only if no_wait == 1).
  * -ENOMEM: Could not allocate memory for the buffer object, either due to
  * fragmentation or concurrent allocators.
- * -ERESTART: An interruptible sleep was interrupted by a signal.
+ * -ERESTARTSYS: An interruptible sleep was interrupted by a signal.
  */
 extern int ttm_bo_mem_space(struct ttm_buffer_object *bo,
-			    uint32_t proposed_placement,
-			    struct ttm_mem_reg *mem,
-			    bool interruptible, bool no_wait);
+				struct ttm_placement *placement,
+				struct ttm_mem_reg *mem,
+				bool interruptible, bool no_wait);
 /**
  * ttm_bo_wait_for_cpu
  *
@@ -654,7 +658,7 @@
  * Wait until a buffer object is no longer sync'ed for CPU access.
  * Returns:
  * -EBUSY: Buffer object was sync'ed for CPU access. (only if no_wait == 1).
- * -ERESTART: An interruptible sleep was interrupted by a signal.
+ * -ERESTARTSYS: An interruptible sleep was interrupted by a signal.
  */
 
 extern int ttm_bo_wait_cpu(struct ttm_buffer_object *bo, bool no_wait);
@@ -758,7 +762,7 @@
  * -EAGAIN: The reservation may cause a deadlock.
  * Release all buffer reservations, wait for @bo to become unreserved and
  * try again. (only if use_sequence == 1).
- * -ERESTART: A wait for the buffer to become unreserved was interrupted by
+ * -ERESTARTSYS: A wait for the buffer to become unreserved was interrupted by
  * a signal. Release all buffer reservations and return to user-space.
  */
 extern int ttm_bo_reserve(struct ttm_buffer_object *bo,
@@ -799,7 +803,7 @@
  *
  * Returns:
  * -EBUSY: If no_wait == 1 and the buffer is already reserved.
- * -ERESTART: If interruptible == 1 and the process received a signal
+ * -ERESTARTSYS: If interruptible == 1 and the process received a signal
  * while sleeping.
  */
 extern int ttm_bo_block_reservation(struct ttm_buffer_object *bo,
--- linux-mvl-dove-2.6.32.orig/include/drm/ttm/ttm_object.h
+++ linux-mvl-dove-2.6.32/include/drm/ttm/ttm_object.h
@@ -0,0 +1,271 @@
+/**************************************************************************
+ *
+ * Copyright (c) 2006-2009 VMware, Inc., Palo Alto, CA., USA
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **************************************************************************/
+/*
+ * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com>
+ */
+/** @file ttm_object.h
+ *
+ * Base- and reference object implementation for the various
+ * ttm objects. Implements reference counting, minimal security checks
+ * and release on file close.
+ */
+
+#ifndef _TTM_OBJECT_H_
+#define _TTM_OBJECT_H_
+
+#include <linux/list.h>
+#include "drm_hashtab.h"
+#include <linux/kref.h>
+#include <ttm/ttm_memory.h>
+
+/**
+ * enum ttm_ref_type
+ *
+ * Describes what type of reference a ref object holds.
+ *
+ * TTM_REF_USAGE is a simple refcount on a base object.
+ *
+ * TTM_REF_SYNCCPU_READ is a SYNCCPU_READ reference on a
+ * buffer object.
+ *
+ * TTM_REF_SYNCCPU_WRITE is a SYNCCPU_WRITE reference on a
+ * buffer object.
+ *
+ */
+
+enum ttm_ref_type {
+	TTM_REF_USAGE,
+	TTM_REF_SYNCCPU_READ,
+	TTM_REF_SYNCCPU_WRITE,
+	TTM_REF_NUM
+};
+
+/**
+ * enum ttm_object_type
+ *
+ * One entry per ttm object type.
+ * Device-specific types should use the
+ * ttm_driver_typex types.
+ */
+
+enum ttm_object_type {
+	ttm_fence_type,
+	ttm_buffer_type,
+	ttm_lock_type,
+	ttm_driver_type0 = 256,
+	ttm_driver_type1,
+	ttm_driver_type2,
+	ttm_driver_type3,
+	ttm_driver_type4,
+	ttm_driver_type5
+};
+
+struct ttm_object_file;
+struct ttm_object_device;
+
+/**
+ * struct ttm_base_object
+ *
+ * @hash: hash entry for the per-device object hash.
+ * @type: derived type this object is base class for.
+ * @shareable: Other ttm_object_files can access this object.
+ *
+ * @tfile: Pointer to ttm_object_file of the creator.
+ * NULL if the object was not created by a user request.
+ * (kernel object).
+ *
+ * @refcount: Number of references to this object, not
+ * including the hash entry. A reference to a base object can
+ * only be held by a ref object.
+ *
+ * @refcount_release: A function to be called when there are
+ * no more references to this object. This function should
+ * destroy the object (or make sure destruction eventually happens),
+ * and when it is called, the object has
+ * already been taken out of the per-device hash. The parameter
+ * "base" should be set to NULL by the function.
+ *
+ * @ref_obj_release: A function to be called when a reference object
+ * with another ttm_ref_type than TTM_REF_USAGE is deleted.
+ * this function may, for example, release a lock held by a user-space
+ * process.
+ *
+ * This struct is intended to be used as a base struct for objects that
+ * are visible to user-space. It provides a global name, race-safe
+ * access and refcounting, minimal access contol and hooks for unref actions.
+ */
+
+struct ttm_base_object {
+	struct drm_hash_item hash;
+	enum ttm_object_type object_type;
+	bool shareable;
+	struct ttm_object_file *tfile;
+	struct kref refcount;
+	void (*refcount_release) (struct ttm_base_object **base);
+	void (*ref_obj_release) (struct ttm_base_object *base,
+				 enum ttm_ref_type ref_type);
+};
+
+/**
+ * ttm_base_object_init
+ *
+ * @tfile: Pointer to a struct ttm_object_file.
+ * @base: The struct ttm_base_object to initialize.
+ * @shareable: This object is shareable with other applcations.
+ * (different @tfile pointers.)
+ * @type: The object type.
+ * @refcount_release: See the struct ttm_base_object description.
+ * @ref_obj_release: See the struct ttm_base_object description.
+ *
+ * Initializes a struct ttm_base_object.
+ */
+
+extern int ttm_base_object_init(struct ttm_object_file *tfile,
+				struct ttm_base_object *base,
+				bool shareable,
+				enum ttm_object_type type,
+				void (*refcount_release) (struct ttm_base_object
+							  **),
+				void (*ref_obj_release) (struct ttm_base_object
+							 *,
+							 enum ttm_ref_type
+							 ref_type));
+
+/**
+ * ttm_base_object_lookup
+ *
+ * @tfile: Pointer to a struct ttm_object_file.
+ * @key: Hash key
+ *
+ * Looks up a struct ttm_base_object with the key @key.
+ * Also verifies that the object is visible to the application, by
+ * comparing the @tfile argument and checking the object shareable flag.
+ */
+
+extern struct ttm_base_object *ttm_base_object_lookup(struct ttm_object_file
+						      *tfile, uint32_t key);
+
+/**
+ * ttm_base_object_unref
+ *
+ * @p_base: Pointer to a pointer referncing a struct ttm_base_object.
+ *
+ * Decrements the base object refcount and clears the pointer pointed to by
+ * p_base.
+ */
+
+extern void ttm_base_object_unref(struct ttm_base_object **p_base);
+
+/**
+ * ttm_ref_object_add.
+ *
+ * @tfile: A struct ttm_object_file representing the application owning the
+ * ref_object.
+ * @base: The base object to reference.
+ * @ref_type: The type of reference.
+ * @existed: Upon completion, indicates that an identical reference object
+ * already existed, and the refcount was upped on that object instead.
+ *
+ * Adding a ref object to a base object is basically like referencing the
+ * base object, but a user-space application holds the reference. When the
+ * file corresponding to @tfile is closed, all its reference objects are
+ * deleted. A reference object can have different types depending on what
+ * it's intended for. It can be refcounting to prevent object destruction,
+ * When user-space takes a lock, it can add a ref object to that lock to
+ * make sure the lock is released if the application dies. A ref object
+ * will hold a single reference on a base object.
+ */
+extern int ttm_ref_object_add(struct ttm_object_file *tfile,
+			      struct ttm_base_object *base,
+			      enum ttm_ref_type ref_type, bool *existed);
+/**
+ * ttm_ref_object_base_unref
+ *
+ * @key: Key representing the base object.
+ * @ref_type: Ref type of the ref object to be dereferenced.
+ *
+ * Unreference a ref object with type @ref_type
+ * on the base object identified by @key. If there are no duplicate
+ * references, the ref object will be destroyed and the base object
+ * will be unreferenced.
+ */
+extern int ttm_ref_object_base_unref(struct ttm_object_file *tfile,
+				     unsigned long key,
+				     enum ttm_ref_type ref_type);
+
+/**
+ * ttm_object_file_init - initialize a struct ttm_object file
+ *
+ * @tdev: A struct ttm_object device this file is initialized on.
+ * @hash_order: Order of the hash table used to hold the reference objects.
+ *
+ * This is typically called by the file_ops::open function.
+ */
+
+extern struct ttm_object_file *ttm_object_file_init(struct ttm_object_device
+						    *tdev,
+						    unsigned int hash_order);
+
+/**
+ * ttm_object_file_release - release data held by a ttm_object_file
+ *
+ * @p_tfile: Pointer to pointer to the ttm_object_file object to release.
+ * *p_tfile will be set to NULL by this function.
+ *
+ * Releases all data associated by a ttm_object_file.
+ * Typically called from file_ops::release. The caller must
+ * ensure that there are no concurrent users of tfile.
+ */
+
+extern void ttm_object_file_release(struct ttm_object_file **p_tfile);
+
+/**
+ * ttm_object device init - initialize a struct ttm_object_device
+ *
+ * @hash_order: Order of hash table used to hash the base objects.
+ *
+ * This function is typically called on device initialization to prepare
+ * data structures needed for ttm base and ref objects.
+ */
+
+extern struct ttm_object_device *ttm_object_device_init
+    (struct ttm_mem_global *mem_glob, unsigned int hash_order);
+
+/**
+ * ttm_object_device_release - release data held by a ttm_object_device
+ *
+ * @p_tdev: Pointer to pointer to the ttm_object_device object to release.
+ * *p_tdev will be set to NULL by this function.
+ *
+ * Releases all data associated by a ttm_object_device.
+ * Typically called from driver::unload before the destruction of the
+ * device private data structure.
+ */
+
+extern void ttm_object_device_release(struct ttm_object_device **p_tdev);
+
+#endif
--- linux-mvl-dove-2.6.32.orig/include/drm/i2c/ch7006.h
+++ linux-mvl-dove-2.6.32/include/drm/i2c/ch7006.h
@@ -0,0 +1,86 @@
+/*
+ * Copyright (C) 2009 Francisco Jerez.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#ifndef __DRM_I2C_CH7006_H__
+#define __DRM_I2C_CH7006_H__
+
+/**
+ * struct ch7006_encoder_params
+ *
+ * Describes how the ch7006 is wired up with the GPU. It should be
+ * used as the @params parameter of its @set_config method.
+ *
+ * See "http://www.chrontel.com/pdf/7006.pdf" for their precise
+ * meaning.
+ */
+struct ch7006_encoder_params {
+	enum {
+		CH7006_FORMAT_RGB16 = 0,
+		CH7006_FORMAT_YCrCb24m16,
+		CH7006_FORMAT_RGB24m16,
+		CH7006_FORMAT_RGB15,
+		CH7006_FORMAT_RGB24m12C,
+		CH7006_FORMAT_RGB24m12I,
+		CH7006_FORMAT_RGB24m8,
+		CH7006_FORMAT_RGB16m8,
+		CH7006_FORMAT_RGB15m8,
+		CH7006_FORMAT_YCrCb24m8,
+	} input_format;
+
+	enum {
+		CH7006_CLOCK_SLAVE = 0,
+		CH7006_CLOCK_MASTER,
+	} clock_mode;
+
+	enum {
+		CH7006_CLOCK_EDGE_NEG = 0,
+		CH7006_CLOCK_EDGE_POS,
+	} clock_edge;
+
+	int xcm, pcm;
+
+	enum {
+		CH7006_SYNC_SLAVE = 0,
+		CH7006_SYNC_MASTER,
+	} sync_direction;
+
+	enum {
+		CH7006_SYNC_SEPARATED = 0,
+		CH7006_SYNC_EMBEDDED,
+	} sync_encoding;
+
+	enum {
+		CH7006_POUT_1_8V = 0,
+		CH7006_POUT_3_3V,
+	} pout_level;
+
+	enum {
+		CH7006_ACTIVE_HSYNC = 0,
+		CH7006_ACTIVE_DSTART,
+	} active_detect;
+};
+
+#endif
--- linux-mvl-dove-2.6.32.orig/include/acpi/processor.h
+++ linux-mvl-dove-2.6.32/include/acpi/processor.h
@@ -48,7 +48,7 @@
 	u8 space_id;
 	u8 bit_width;
 	u8 bit_offset;
-	u8 reserved;
+	u8 access_size;
 	u64 address;
 } __attribute__ ((packed));
 
@@ -74,6 +74,7 @@
 	u32 power;
 	u32 usage;
 	u64 time;
+	u8 bm_sts_skip;
 	struct acpi_processor_cx_policy promotion;
 	struct acpi_processor_cx_policy demotion;
 	char desc[ACPI_CX_DESC_LEN];
--- linux-mvl-dove-2.6.32.orig/include/acpi/platform/aclinux.h
+++ linux-mvl-dove-2.6.32/include/acpi/platform/aclinux.h
@@ -152,7 +152,7 @@
 #include <linux/hardirq.h>
 #define ACPI_PREEMPTION_POINT() \
 	do { \
-		if (!in_atomic_preempt_off()) \
+		if (!in_atomic_preempt_off() && !irqs_disabled()) \
 			cond_resched(); \
 	} while (0)
 
--- linux-mvl-dove-2.6.32.orig/include/linux/splice.h
+++ linux-mvl-dove-2.6.32/include/linux/splice.h
@@ -82,4 +82,10 @@
 extern ssize_t splice_direct_to_actor(struct file *, struct splice_desc *,
 				      splice_direct_actor *);
 
+extern long do_splice_from(struct pipe_inode_info *pipe, struct file *out,
+			   loff_t *ppos, size_t len, unsigned int flags);
+extern long do_splice_to(struct file *in, loff_t *ppos,
+			 struct pipe_inode_info *pipe, size_t len,
+			 unsigned int flags);
+
 #endif
--- linux-mvl-dove-2.6.32.orig/include/linux/ftrace.h
+++ linux-mvl-dove-2.6.32/include/linux/ftrace.h
@@ -412,6 +412,7 @@
 
 extern void ftrace_graph_init_task(struct task_struct *t);
 extern void ftrace_graph_exit_task(struct task_struct *t);
+extern void ftrace_graph_init_idle_task(struct task_struct *t, int cpu);
 
 static inline int task_curr_ret_stack(struct task_struct *t)
 {
@@ -435,6 +436,7 @@
 
 static inline void ftrace_graph_init_task(struct task_struct *t) { }
 static inline void ftrace_graph_exit_task(struct task_struct *t) { }
+static inline void ftrace_graph_init_idle_task(struct task_struct *t, int cpu) { }
 
 static inline int task_curr_ret_stack(struct task_struct *tsk)
 {
--- linux-mvl-dove-2.6.32.orig/include/linux/module.h
+++ linux-mvl-dove-2.6.32/include/linux/module.h
@@ -724,4 +724,13 @@
 static inline void module_bug_cleanup(struct module *mod) {}
 #endif	/* CONFIG_GENERIC_BUG */
 
+/*
+ * Establish a symbolic link between 2 modules so that depmod
+ * and modprobe do the heavy lifting of loading the modules in the
+ * correct dependency order.
+ */
+#define MODULE_EXPORT(mod_name) int sym_link_##mod_name; EXPORT_SYMBOL(sym_link_##mod_name);
+#define MODULE_IMPORT(mod_name) extern int sym_link_##mod_name; int func_sym_link_##mod_name(void) {sym_link_##mod_name=1;}; EXPORT_SYMBOL(func_sym_link_##mod_name);
+
+
 #endif /* _LINUX_MODULE_H */
--- linux-mvl-dove-2.6.32.orig/include/linux/namei.h
+++ linux-mvl-dove-2.6.32/include/linux/namei.h
@@ -75,6 +75,9 @@
 extern struct file *nameidata_to_filp(struct nameidata *nd, int flags);
 extern void release_open_intent(struct nameidata *);
 
+extern struct dentry *lookup_hash(struct nameidata *nd);
+extern int __lookup_one_len(const char *name, struct qstr *this,
+			    struct dentry *base, int len);
 extern struct dentry *lookup_one_len(const char *, struct dentry *, int);
 extern struct dentry *lookup_one_noperm(const char *, struct dentry *);
 
--- linux-mvl-dove-2.6.32.orig/include/linux/dove_sdhci.h
+++ linux-mvl-dove-2.6.32/include/linux/dove_sdhci.h
@@ -0,0 +1,11 @@
+#ifndef __LINUX_DOVE_SDHCI_H
+#define __LINUX_DOVE_SDHCI_H
+
+struct sdhci_dove_int_wa {
+	int			gpio;
+	int			irq;
+	int			func_select_bit;
+	int			status;
+};
+#endif
+
--- linux-mvl-dove-2.6.32.orig/include/linux/init.h
+++ linux-mvl-dove-2.6.32/include/linux/init.h
@@ -186,6 +186,7 @@
 
 #define core_initcall(fn)		__define_initcall("1",fn,1)
 #define core_initcall_sync(fn)		__define_initcall("1s",fn,1s)
+#define earlyrootfs_initcall(fn)	__define_initcall("earlyrootfs",fn,rootfs)
 #define postcore_initcall(fn)		__define_initcall("2",fn,2)
 #define postcore_initcall_sync(fn)	__define_initcall("2s",fn,2s)
 #define arch_initcall(fn)		__define_initcall("3",fn,3)
@@ -213,6 +214,8 @@
 	static initcall_t __initcall_##fn \
 	__used __section(.security_initcall.init) = fn
 
+extern struct list_head  populate_rootfs_domain;
+
 struct obs_kernel_param {
 	const char *str;
 	int (*setup_func)(char *);
--- linux-mvl-dove-2.6.32.orig/include/linux/input-polldev.h
+++ linux-mvl-dove-2.6.32/include/linux/input-polldev.h
@@ -36,11 +36,13 @@
 
 	struct input_dev *input;
 	struct delayed_work work;
+	int	stop;
 };
 
 struct input_polled_dev *input_allocate_polled_device(void);
 void input_free_polled_device(struct input_polled_dev *dev);
 int input_register_polled_device(struct input_polled_dev *dev);
 void input_unregister_polled_device(struct input_polled_dev *dev);
-
+void input_stop_polled_device(struct input_dev *input);
+int input_resume_polled_device(struct input_dev *input);
 #endif
--- linux-mvl-dove-2.6.32.orig/include/linux/tick.h
+++ linux-mvl-dove-2.6.32/include/linux/tick.h
@@ -98,6 +98,9 @@
 extern struct tick_sched *tick_get_tick_sched(int cpu);
 extern void tick_check_idle(int cpu);
 extern int tick_oneshot_mode_active(void);
+#  ifndef arch_needs_cpu
+#   define arch_needs_cpu(cpu) (0)
+#  endif
 # else
 static inline void tick_clock_notify(void) { }
 static inline int tick_check_oneshot_change(int allow_nohz) { return 0; }
--- linux-mvl-dove-2.6.32.orig/include/linux/hrtimer.h
+++ linux-mvl-dove-2.6.32/include/linux/hrtimer.h
@@ -162,10 +162,11 @@
  * @expires_next:	absolute time of the next event which was scheduled
  *			via clock_set_next_event()
  * @hres_active:	State of high resolution mode
- * @check_clocks:	Indictator, when set evaluate time source and clock
- *			event devices whether high resolution mode can be
- *			activated.
- * @nr_events:		Total number of timer interrupt events
+ * @hang_detected:	The last hrtimer interrupt detected a hang
+ * @nr_events:		Total number of hrtimer interrupt events
+ * @nr_retries:		Total number of hrtimer interrupt retries
+ * @nr_hangs:		Total number of hrtimer interrupt hangs
+ * @max_hang_time:	Maximum time spent in hrtimer_interrupt
  */
 struct hrtimer_cpu_base {
 	spinlock_t			lock;
@@ -173,7 +174,11 @@
 #ifdef CONFIG_HIGH_RES_TIMERS
 	ktime_t				expires_next;
 	int				hres_active;
+	int				hang_detected;
 	unsigned long			nr_events;
+	unsigned long			nr_retries;
+	unsigned long			nr_hangs;
+	ktime_t				max_hang_time;
 #endif
 };
 
@@ -446,7 +451,7 @@
 
 static inline void timer_stats_account_hrtimer(struct hrtimer *timer)
 {
-	if (likely(!timer->start_site))
+	if (likely(!timer_stats_active))
 		return;
 	timer_stats_update_stats(timer, timer->start_pid, timer->start_site,
 				 timer->function, timer->start_comm, 0);
@@ -457,8 +462,6 @@
 
 static inline void timer_stats_hrtimer_set_start_info(struct hrtimer *timer)
 {
-	if (likely(!timer_stats_active))
-		return;
 	__timer_stats_hrtimer_set_start_info(timer, __builtin_return_address(0));
 }
 
--- linux-mvl-dove-2.6.32.orig/include/linux/gpio_event.h
+++ linux-mvl-dove-2.6.32/include/linux/gpio_event.h
@@ -0,0 +1,154 @@
+/* include/linux/gpio_event.h
+ *
+ * Copyright (C) 2007 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef _LINUX_GPIO_EVENT_H
+#define _LINUX_GPIO_EVENT_H
+
+#include <linux/input.h>
+
+enum {
+	GPIO_EVENT_FUNC_UNINIT  = 0x0,
+	GPIO_EVENT_FUNC_INIT    = 0x1,
+	GPIO_EVENT_FUNC_SUSPEND = 0x2,
+	GPIO_EVENT_FUNC_RESUME  = 0x3,
+};
+struct gpio_event_info {
+	int (*func)(struct input_dev *input_dev,
+		    struct gpio_event_info *info,
+		    void **data, int func);
+	int (*event)(struct input_dev *input_dev,
+		     struct gpio_event_info *info,
+		     void **data, unsigned int type,
+		     unsigned int code, int value); /* out events */
+};
+
+struct gpio_event_platform_data {
+	const char *name;
+	struct gpio_event_info **info;
+	size_t info_count;
+	int (*power)(const struct gpio_event_platform_data *pdata, bool on);
+};
+
+#define GPIO_EVENT_DEV_NAME "gpio-event"
+
+/* Key matrix */
+
+enum gpio_event_matrix_flags {
+	/* unset: drive active output low, set: drive active output high */
+	GPIOKPF_ACTIVE_HIGH              = 1U << 0,
+	GPIOKPF_DEBOUNCE                 = 1U << 1,
+	GPIOKPF_REMOVE_SOME_PHANTOM_KEYS = 1U << 2,
+	GPIOKPF_REMOVE_PHANTOM_KEYS      = GPIOKPF_REMOVE_SOME_PHANTOM_KEYS |
+					   GPIOKPF_DEBOUNCE,
+	GPIOKPF_DRIVE_INACTIVE           = 1U << 3,
+	GPIOKPF_LEVEL_TRIGGERED_IRQ      = 1U << 4,
+	GPIOKPF_PRINT_UNMAPPED_KEYS      = 1U << 16,
+	GPIOKPF_PRINT_MAPPED_KEYS        = 1U << 17,
+	GPIOKPF_PRINT_PHANTOM_KEYS       = 1U << 18,
+};
+
+extern int gpio_event_matrix_func(struct input_dev *input_dev,
+			struct gpio_event_info *info, void **data, int func);
+struct gpio_event_matrix_info {
+	/* initialize to gpio_event_matrix_func */
+	struct gpio_event_info info;
+	/* size must be ninputs * noutputs */
+	const unsigned short *keymap;
+	unsigned int *input_gpios;
+	unsigned int *output_gpios;
+	unsigned int ninputs;
+	unsigned int noutputs;
+	/* time to wait before reading inputs after driving each output */
+	ktime_t settle_time;
+	/* time to wait before scanning the keypad a second time */
+	ktime_t debounce_delay;
+	ktime_t poll_time;
+	unsigned flags;
+};
+
+/* Directly connected inputs and outputs */
+
+enum gpio_event_direct_flags {
+	GPIOEDF_ACTIVE_HIGH         = 1U << 0,
+/*	GPIOEDF_USE_DOWN_IRQ        = 1U << 1, */
+/*	GPIOEDF_USE_IRQ             = (1U << 2) | GPIOIDF_USE_DOWN_IRQ, */
+	GPIOEDF_PRINT_KEYS          = 1U << 8,
+	GPIOEDF_PRINT_KEY_DEBOUNCE  = 1U << 9,
+};
+
+struct gpio_event_direct_entry {
+	uint32_t gpio:23;
+	uint32_t code:9;
+};
+
+/* inputs */
+extern int gpio_event_input_func(struct input_dev *input_dev,
+			struct gpio_event_info *info, void **data, int func);
+struct gpio_event_input_info {
+	/* initialize to gpio_event_input_func */
+	struct gpio_event_info info;
+	ktime_t debounce_time;
+	ktime_t poll_time;
+	uint16_t flags;
+	uint16_t type;
+	const struct gpio_event_direct_entry *keymap;
+	size_t keymap_size;
+};
+
+/* outputs */
+extern int gpio_event_output_func(struct input_dev *input_dev,
+			struct gpio_event_info *info, void **data, int func);
+extern int gpio_event_output_event(struct input_dev *input_dev,
+			struct gpio_event_info *info, void **data,
+			unsigned int type, unsigned int code, int value);
+struct gpio_event_output_info {
+	/* initialize to gpio_event_output_func and gpio_event_output_event */
+	struct gpio_event_info info;
+	uint16_t flags;
+	uint16_t type;
+	const struct gpio_event_direct_entry *keymap;
+	size_t keymap_size;
+};
+
+
+/* axes */
+
+enum gpio_event_axis_flags {
+	GPIOEAF_PRINT_UNKNOWN_DIRECTION  = 1U << 16,
+	GPIOEAF_PRINT_RAW                = 1U << 17,
+	GPIOEAF_PRINT_EVENT              = 1U << 18,
+};
+
+extern int gpio_event_axis_func(struct input_dev *input_dev,
+			struct gpio_event_info *info, void **data, int func);
+struct gpio_event_axis_info {
+	/* initialize to gpio_event_axis_func */
+	struct gpio_event_info info;
+	uint8_t  count;
+	uint8_t  type; /* EV_REL or EV_ABS */
+	uint16_t code;
+	uint16_t decoded_size;
+	uint16_t (*map)(struct gpio_event_axis_info *info, uint16_t in);
+	uint32_t *gpio;
+	uint32_t flags;
+};
+#define gpio_axis_2bit_gray_map gpio_axis_4bit_gray_map
+#define gpio_axis_3bit_gray_map gpio_axis_4bit_gray_map
+uint16_t gpio_axis_4bit_gray_map(
+			struct gpio_event_axis_info *info, uint16_t in);
+uint16_t gpio_axis_5bit_singletrack_map(
+			struct gpio_event_axis_info *info, uint16_t in);
+
+#endif
--- linux-mvl-dove-2.6.32.orig/include/linux/perf_event.h
+++ linux-mvl-dove-2.6.32/include/linux/perf_event.h
@@ -219,7 +219,7 @@
 #define PERF_EVENT_IOC_DISABLE		_IO ('$', 1)
 #define PERF_EVENT_IOC_REFRESH		_IO ('$', 2)
 #define PERF_EVENT_IOC_RESET		_IO ('$', 3)
-#define PERF_EVENT_IOC_PERIOD		_IOW('$', 4, u64)
+#define PERF_EVENT_IOC_PERIOD		_IOW('$', 4, __u64)
 #define PERF_EVENT_IOC_SET_OUTPUT	_IO ('$', 5)
 
 enum perf_event_ioc_flags {
--- linux-mvl-dove-2.6.32.orig/include/linux/usb_usual.h
+++ linux-mvl-dove-2.6.32/include/linux/usb_usual.h
@@ -56,7 +56,9 @@
 	US_FLAG(SANE_SENSE,     0x00008000)			\
 		/* Sane Sense (> 18 bytes) */			\
 	US_FLAG(CAPACITY_OK,	0x00010000)			\
-		/* READ CAPACITY response is correct */
+		/* READ CAPACITY response is correct */		\
+	US_FLAG(BAD_SENSE,	0x00020000)			\
+		/* Bad Sense (never more than 18 bytes) */
 
 #define US_FLAG(name, value)	US_FL_##name = value ,
 enum { US_DO_ALL_FLAGS };
--- linux-mvl-dove-2.6.32.orig/include/linux/nfs_fs_sb.h
+++ linux-mvl-dove-2.6.32/include/linux/nfs_fs_sb.h
@@ -176,6 +176,7 @@
 #define NFS_CAP_ATIME		(1U << 11)
 #define NFS_CAP_CTIME		(1U << 12)
 #define NFS_CAP_MTIME		(1U << 13)
+#define NFS_CAP_POSIX_LOCK	(1U << 14)
 
 
 /* maximum number of slots to use */
--- linux-mvl-dove-2.6.32.orig/include/linux/topology.h
+++ linux-mvl-dove-2.6.32/include/linux/topology.h
@@ -99,7 +99,7 @@
 				| 1*SD_WAKE_AFFINE			\
 				| 1*SD_SHARE_CPUPOWER			\
 				| 0*SD_POWERSAVINGS_BALANCE		\
-				| 0*SD_SHARE_PKG_RESOURCES		\
+				| 1*SD_SHARE_PKG_RESOURCES		\
 				| 0*SD_SERIALIZE			\
 				| 0*SD_PREFER_SIBLING			\
 				,					\
--- linux-mvl-dove-2.6.32.orig/include/linux/if_tunnel.h
+++ linux-mvl-dove-2.6.32/include/linux/if_tunnel.h
@@ -2,6 +2,7 @@
 #define _IF_TUNNEL_H_
 
 #include <linux/types.h>
+#include <asm/byteorder.h>
 
 #ifdef __KERNEL__
 #include <linux/ip.h>
--- linux-mvl-dove-2.6.32.orig/include/linux/android_aid.h
+++ linux-mvl-dove-2.6.32/include/linux/android_aid.h
@@ -0,0 +1,26 @@
+/* include/linux/android_aid.h
+ *
+ * Copyright (C) 2008 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef _LINUX_ANDROID_AID_H
+#define _LINUX_ANDROID_AID_H
+
+/* AIDs that the kernel treats differently */
+#define AID_NET_BT_ADMIN 3001
+#define AID_NET_BT       3002
+#define AID_INET         3003
+#define AID_NET_RAW      3004
+#define AID_NET_ADMIN    3005
+
+#endif
--- linux-mvl-dove-2.6.32.orig/include/linux/input.h
+++ linux-mvl-dove-2.6.32/include/linux/input.h
@@ -595,6 +595,48 @@
 #define KEY_NUMERIC_STAR	0x20a
 #define KEY_NUMERIC_POUND	0x20b
 
+#define BTN_TRIGGER_HAPPY		0x2c0
+#define BTN_TRIGGER_HAPPY1		0x2c0
+#define BTN_TRIGGER_HAPPY2		0x2c1
+#define BTN_TRIGGER_HAPPY3		0x2c2
+#define BTN_TRIGGER_HAPPY4		0x2c3
+#define BTN_TRIGGER_HAPPY5		0x2c4
+#define BTN_TRIGGER_HAPPY6		0x2c5
+#define BTN_TRIGGER_HAPPY7		0x2c6
+#define BTN_TRIGGER_HAPPY8		0x2c7
+#define BTN_TRIGGER_HAPPY9		0x2c8
+#define BTN_TRIGGER_HAPPY10		0x2c9
+#define BTN_TRIGGER_HAPPY11		0x2ca
+#define BTN_TRIGGER_HAPPY12		0x2cb
+#define BTN_TRIGGER_HAPPY13		0x2cc
+#define BTN_TRIGGER_HAPPY14		0x2cd
+#define BTN_TRIGGER_HAPPY15		0x2ce
+#define BTN_TRIGGER_HAPPY16		0x2cf
+#define BTN_TRIGGER_HAPPY17		0x2d0
+#define BTN_TRIGGER_HAPPY18		0x2d1
+#define BTN_TRIGGER_HAPPY19		0x2d2
+#define BTN_TRIGGER_HAPPY20		0x2d3
+#define BTN_TRIGGER_HAPPY21		0x2d4
+#define BTN_TRIGGER_HAPPY22		0x2d5
+#define BTN_TRIGGER_HAPPY23		0x2d6
+#define BTN_TRIGGER_HAPPY24		0x2d7
+#define BTN_TRIGGER_HAPPY25		0x2d8
+#define BTN_TRIGGER_HAPPY26		0x2d9
+#define BTN_TRIGGER_HAPPY27		0x2da
+#define BTN_TRIGGER_HAPPY28		0x2db
+#define BTN_TRIGGER_HAPPY29		0x2dc
+#define BTN_TRIGGER_HAPPY30		0x2dd
+#define BTN_TRIGGER_HAPPY31		0x2de
+#define BTN_TRIGGER_HAPPY32		0x2df
+#define BTN_TRIGGER_HAPPY33		0x2e0
+#define BTN_TRIGGER_HAPPY34		0x2e1
+#define BTN_TRIGGER_HAPPY35		0x2e2
+#define BTN_TRIGGER_HAPPY36		0x2e3
+#define BTN_TRIGGER_HAPPY37		0x2e4
+#define BTN_TRIGGER_HAPPY38		0x2e5
+#define BTN_TRIGGER_HAPPY39		0x2e6
+#define BTN_TRIGGER_HAPPY40		0x2e7
+
 /* We avoid low common keys in module aliases so they don't get huge. */
 #define KEY_MIN_INTERESTING	KEY_MUTE
 #define KEY_MAX			0x2ff
@@ -658,6 +700,7 @@
 #define ABS_MT_TOOL_TYPE	0x37	/* Type of touching device */
 #define ABS_MT_BLOB_ID		0x38	/* Group a set of packets as a blob */
 #define ABS_MT_TRACKING_ID	0x39	/* Unique ID of initiated contact */
+#define ABS_MT_PRESSURE		0x3a	/* Pressure on contact area */
 
 #define ABS_MAX			0x3f
 #define ABS_CNT			(ABS_MAX+1)
@@ -1118,6 +1161,7 @@
 	int (*event)(struct input_dev *dev, unsigned int type, unsigned int code, int value);
 
 	struct input_handle *grab;
+	struct input_handle *filter;
 
 	spinlock_t event_lock;
 	struct mutex mutex;
@@ -1218,6 +1262,7 @@
 	void *private;
 
 	void (*event)(struct input_handle *handle, unsigned int type, unsigned int code, int value);
+	bool (*filter)(struct input_handle *handle, unsigned int type, unsigned int code, int value);
 	int (*connect)(struct input_handler *handler, struct input_dev *dev, const struct input_device_id *id);
 	void (*disconnect)(struct input_handle *handle);
 	void (*start)(struct input_handle *handle);
@@ -1295,6 +1340,9 @@
 int input_grab_device(struct input_handle *);
 void input_release_device(struct input_handle *);
 
+int input_filter_device(struct input_handle *);
+void input_unfilter_device(struct input_handle *);
+
 int input_open_device(struct input_handle *);
 void input_close_device(struct input_handle *);
 
--- linux-mvl-dove-2.6.32.orig/include/linux/libata.h
+++ linux-mvl-dove-2.6.32/include/linux/libata.h
@@ -339,6 +339,7 @@
 	ATA_EHI_HOTPLUGGED	= (1 << 0),  /* could have been hotplugged */
 	ATA_EHI_NO_AUTOPSY	= (1 << 2),  /* no autopsy */
 	ATA_EHI_QUIET		= (1 << 3),  /* be quiet */
+	ATA_EHI_NO_RECOVERY	= (1 << 4),  /* no recovery */
 
 	ATA_EHI_DID_SOFTRESET	= (1 << 16), /* already soft-reset this port */
 	ATA_EHI_DID_HARDRESET	= (1 << 17), /* already soft-reset this port */
@@ -354,6 +355,9 @@
 	/* max tries if error condition is still set after ->error_handler */
 	ATA_EH_MAX_TRIES	= 5,
 
+	/* sometimes resuming a link requires several retries */
+	ATA_LINK_RESUME_TRIES	= 5,
+
 	/* how hard are we gonna try to probe/recover devices */
 	ATA_PROBE_MAX_TRIES	= 3,
 	ATA_EH_DEV_TRIES	= 3,
@@ -1691,6 +1695,29 @@
 
 	return status;
 }
+/**
+ *	ata_wait_drq_clear - Wait for the DRQ bit to be cleared.
+ *	@ap: Port to wait for.
+ *
+ *	Waits up to 10ms for port's DRQ signal to clear.
+ *	Returns final value of status register.
+ *
+ *	LOCKING:
+ *	Inherited from caller.
+ */
+static inline u8 ata_wait_drq_clear(struct ata_port *ap)
+{
+	u8 status = ata_sff_busy_wait(ap, ATA_DRQ, 1000);
+
+#ifdef ATA_DEBUG
+	if (status != 0xff && (status & ATA_DRQ))
+		ata_port_printk(ap, KERN_DEBUG, "abnormal Status 0x%X\n",
+				status);
+#endif
+
+	return status;
+}
+
 #endif /* CONFIG_ATA_SFF */
 
 #endif /* __LINUX_LIBATA_H__ */
--- linux-mvl-dove-2.6.32.orig/include/linux/uio_driver.h
+++ linux-mvl-dove-2.6.32/include/linux/uio_driver.h
@@ -89,6 +89,7 @@
 	void			*priv;
 	irqreturn_t (*handler)(int irq, struct uio_info *dev_info);
 	int (*mmap)(struct uio_info *info, struct vm_area_struct *vma);
+	int (*ioctl)(struct uio_info *info, unsigned int cmd, unsigned long arg);
 	int (*open)(struct uio_info *info, struct inode *inode);
 	int (*release)(struct uio_info *info, struct inode *inode);
 	int (*irqcontrol)(struct uio_info *info, s32 irq_on);
--- linux-mvl-dove-2.6.32.orig/include/linux/cpuset.h
+++ linux-mvl-dove-2.6.32/include/linux/cpuset.h
@@ -21,8 +21,7 @@
 extern int cpuset_init(void);
 extern void cpuset_init_smp(void);
 extern void cpuset_cpus_allowed(struct task_struct *p, struct cpumask *mask);
-extern void cpuset_cpus_allowed_locked(struct task_struct *p,
-				       struct cpumask *mask);
+extern int cpuset_cpus_allowed_fallback(struct task_struct *p);
 extern nodemask_t cpuset_mems_allowed(struct task_struct *p);
 #define cpuset_current_mems_allowed (current->mems_allowed)
 void cpuset_init_current_mems_allowed(void);
@@ -69,9 +68,6 @@
 extern void cpuset_task_status_allowed(struct seq_file *m,
 					struct task_struct *task);
 
-extern void cpuset_lock(void);
-extern void cpuset_unlock(void);
-
 extern int cpuset_mem_spread_node(void);
 
 static inline int cpuset_do_page_mem_spread(void)
@@ -105,10 +101,11 @@
 {
 	cpumask_copy(mask, cpu_possible_mask);
 }
-static inline void cpuset_cpus_allowed_locked(struct task_struct *p,
-					      struct cpumask *mask)
+
+static inline int cpuset_cpus_allowed_fallback(struct task_struct *p)
 {
-	cpumask_copy(mask, cpu_possible_mask);
+	cpumask_copy(&p->cpus_allowed, cpu_possible_mask);
+	return cpumask_any(cpu_active_mask);
 }
 
 static inline nodemask_t cpuset_mems_allowed(struct task_struct *p)
@@ -157,9 +154,6 @@
 {
 }
 
-static inline void cpuset_lock(void) {}
-static inline void cpuset_unlock(void) {}
-
 static inline int cpuset_mem_spread_node(void)
 {
 	return 0;
--- linux-mvl-dove-2.6.32.orig/include/linux/mmzone.h
+++ linux-mvl-dove-2.6.32/include/linux/mmzone.h
@@ -290,6 +290,13 @@
 	unsigned long watermark[NR_WMARK];
 
 	/*
+	 * When free pages are below this point, additional steps are taken
+	 * when reading the number of free pages to avoid per-cpu counter
+	 * drift allowing watermarks to be breached
+	 */
+	unsigned long percpu_drift_mark;
+
+	/*
 	 * We don't know if the memory that we're going to allocate will be freeable
 	 * or/and it will be released eventually, so to avoid totally wasting several
 	 * GB of ram we must reserve some of the lower zone memory (otherwise we risk
@@ -460,6 +467,12 @@
 	return test_bit(ZONE_OOM_LOCKED, &zone->flags);
 }
 
+#ifdef CONFIG_SMP
+unsigned long zone_nr_free_pages(struct zone *zone);
+#else
+#define zone_nr_free_pages(zone) zone_page_state(zone, NR_FREE_PAGES)
+#endif /* CONFIG_SMP */
+
 /*
  * The "priority" of VM scanning is how much of the queues we will scan in one
  * go. A value of 12 for DEF_PRIORITY implies that we will scan 1/4096th of the
--- linux-mvl-dove-2.6.32.orig/include/linux/kvm.h
+++ linux-mvl-dove-2.6.32/include/linux/kvm.h
@@ -116,6 +116,11 @@
 	__u64 cr8;
 	__u64 apic_base;
 
+#ifdef __KVM_S390
+	/* the processor status word for s390 */
+	__u64 psw_mask; /* psw upper half */
+	__u64 psw_addr; /* psw lower half */
+#endif
 	union {
 		/* KVM_EXIT_UNKNOWN */
 		struct {
@@ -167,8 +172,6 @@
 		/* KVM_EXIT_S390_SIEIC */
 		struct {
 			__u8 icptcode;
-			__u64 mask; /* psw upper half */
-			__u64 addr; /* psw lower half */
 			__u16 ipa;
 			__u32 ipb;
 		} s390_sieic;
@@ -436,6 +439,7 @@
 #endif
 #define KVM_CAP_IOEVENTFD 36
 #define KVM_CAP_SET_IDENTITY_MAP_ADDR 37
+#define KVM_CAP_ADJUST_CLOCK 39
 
 #ifdef KVM_CAP_IRQ_ROUTING
 
@@ -474,6 +478,7 @@
 };
 
 #endif
+#define KVM_CAP_S390_PSW 42
 
 #ifdef KVM_CAP_MCE
 /* x86 MCE */
@@ -497,6 +502,12 @@
 	__u8  pad[20];
 };
 
+struct kvm_clock_data {
+	__u64 clock;
+	__u32 flags;
+	__u32 pad[9];
+};
+
 /*
  * ioctls for VM fds
  */
@@ -546,6 +557,8 @@
 #define KVM_CREATE_PIT2		   _IOW(KVMIO, 0x77, struct kvm_pit_config)
 #define KVM_SET_BOOT_CPU_ID        _IO(KVMIO, 0x78)
 #define KVM_IOEVENTFD             _IOW(KVMIO, 0x79, struct kvm_ioeventfd)
+#define KVM_SET_CLOCK             _IOW(KVMIO, 0x7b, struct kvm_clock_data)
+#define KVM_GET_CLOCK             _IOR(KVMIO, 0x7c, struct kvm_clock_data)
 
 /*
  * ioctls for vcpu fds
--- linux-mvl-dove-2.6.32.orig/include/linux/switch.h
+++ linux-mvl-dove-2.6.32/include/linux/switch.h
@@ -0,0 +1,53 @@
+/*
+ *  Switch class driver
+ *
+ * Copyright (C) 2008 Google, Inc.
+ * Author: Mike Lockwood <lockwood@android.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+*/
+
+#ifndef __LINUX_SWITCH_H__
+#define __LINUX_SWITCH_H__
+
+struct switch_dev {
+	const char	*name;
+	struct device	*dev;
+	int		index;
+	int		state;
+
+	ssize_t	(*print_name)(struct switch_dev *sdev, char *buf);
+	ssize_t	(*print_state)(struct switch_dev *sdev, char *buf);
+};
+
+struct gpio_switch_platform_data {
+	const char *name;
+	unsigned 	gpio;
+
+	/* if NULL, switch_dev.name will be printed */
+	const char *name_on;
+	const char *name_off;
+	/* if NULL, "0" or "1" will be printed */
+	const char *state_on;
+	const char *state_off;
+};
+
+extern int switch_dev_register(struct switch_dev *sdev);
+extern void switch_dev_unregister(struct switch_dev *sdev);
+
+static inline int switch_get_state(struct switch_dev *sdev)
+{
+	return sdev->state;
+}
+
+extern void switch_set_state(struct switch_dev *sdev, int state);
+
+#endif /* __LINUX_SWITCH_H__ */
--- linux-mvl-dove-2.6.32.orig/include/linux/gpio_mouse.h
+++ linux-mvl-dove-2.6.32/include/linux/gpio_mouse.h
@@ -56,6 +56,13 @@
 		};
 		int pins[GPIO_MOUSE_PIN_MAX];
 	};
+	int use_activity_irq; /* if we have irq that raised when a gpio becomes
+			       * active or non active
+			       */
+	int activity_gpio; /* gpio that triggers interrupt when any gpio is 
+			    * active 
+			    */
+
 };
 
 #endif /* _GPIO_MOUSE_H */
--- linux-mvl-dove-2.6.32.orig/include/linux/clocksource.h
+++ linux-mvl-dove-2.6.32/include/linux/clocksource.h
@@ -151,6 +151,7 @@
  *			subtraction of non 64 bit counters
  * @mult:		cycle to nanosecond multiplier
  * @shift:		cycle to nanosecond divisor (power of two)
+ * @max_idle_ns:	max idle time permitted by the clocksource (nsecs)
  * @flags:		flags describing special properties
  * @vread:		vsyscall based read
  * @resume:		resume function for the clocksource, if necessary
@@ -168,6 +169,7 @@
 	cycle_t mask;
 	u32 mult;
 	u32 shift;
+	u64 max_idle_ns;
 	unsigned long flags;
 	cycle_t (*vread)(void);
 	void (*resume)(void);
@@ -188,6 +190,7 @@
 #ifdef CONFIG_CLOCKSOURCE_WATCHDOG
 	/* Watchdog related data, used by the framework */
 	struct list_head wd_list;
+	cycle_t cs_last;
 	cycle_t wd_last;
 #endif
 };
@@ -280,10 +283,12 @@
 extern void clocksource_mark_unstable(struct clocksource *cs);
 
 #ifdef CONFIG_GENERIC_TIME_VSYSCALL
-extern void update_vsyscall(struct timespec *ts, struct clocksource *c);
+extern void
+update_vsyscall(struct timespec *ts, struct clocksource *c, u32 mult);
 extern void update_vsyscall_tz(void);
 #else
-static inline void update_vsyscall(struct timespec *ts, struct clocksource *c)
+static inline void
+update_vsyscall(struct timespec *ts, struct clocksource *c, u32 mult)
 {
 }
 
--- linux-mvl-dove-2.6.32.orig/include/linux/audit.h
+++ linux-mvl-dove-2.6.32/include/linux/audit.h
@@ -33,7 +33,7 @@
  * 1200 - 1299 messages internal to the audit daemon
  * 1300 - 1399 audit event messages
  * 1400 - 1499 SE Linux use
- * 1500 - 1599 kernel LSPP events
+ * 1500 - 1599 AppArmor use
  * 1600 - 1699 kernel crypto events
  * 1700 - 1799 kernel anomaly records
  * 1800 - 1899 kernel integrity events
@@ -122,6 +122,14 @@
 #define AUDIT_MAC_UNLBL_STCADD	1416	/* NetLabel: add a static label */
 #define AUDIT_MAC_UNLBL_STCDEL	1417	/* NetLabel: del a static label */
 
+#define AUDIT_APPARMOR_AUDIT	1501	/* AppArmor audited grants */
+#define AUDIT_APPARMOR_ALLOWED	1502	/* Allowed Access for learning */
+#define AUDIT_APPARMOR_DENIED	1503
+#define AUDIT_APPARMOR_HINT	1504	/* Process Tracking information */
+#define AUDIT_APPARMOR_STATUS	1505	/* Changes in config */
+#define AUDIT_APPARMOR_ERROR	1506	/* Internal AppArmor Errors */
+#define AUDIT_APPARMOR_KILL	1507	/* AppArmor killing processes */
+
 #define AUDIT_FIRST_KERN_ANOM_MSG   1700
 #define AUDIT_LAST_KERN_ANOM_MSG    1799
 #define AUDIT_ANOM_PROMISCUOUS      1700 /* Device changed promiscuous mode */
--- linux-mvl-dove-2.6.32.orig/include/linux/blkdev.h
+++ linux-mvl-dove-2.6.32/include/linux/blkdev.h
@@ -318,7 +318,7 @@
 	unsigned short		max_phys_segments;
 
 	unsigned char		misaligned;
-	unsigned char		no_cluster;
+	unsigned char		cluster;
 };
 
 struct request_queue
@@ -440,7 +440,6 @@
 #endif
 };
 
-#define QUEUE_FLAG_CLUSTER	0	/* cluster several segments into 1 */
 #define QUEUE_FLAG_QUEUED	1	/* uses generic tag queueing */
 #define QUEUE_FLAG_STOPPED	2	/* queue is stopped */
 #define	QUEUE_FLAG_SYNCFULL	3	/* read queue has been filled */
@@ -461,7 +460,6 @@
 #define QUEUE_FLAG_DISCARD     17	/* supports DISCARD */
 
 #define QUEUE_FLAG_DEFAULT	((1 << QUEUE_FLAG_IO_STAT) |		\
-				 (1 << QUEUE_FLAG_CLUSTER) |		\
 				 (1 << QUEUE_FLAG_STACKABLE)	|	\
 				 (1 << QUEUE_FLAG_SAME_COMP))
 
@@ -627,6 +625,11 @@
 
 #define rq_data_dir(rq)		((rq)->cmd_flags & 1)
 
+static inline unsigned int blk_queue_cluster(struct request_queue *q)
+{
+	return q->limits.cluster;
+}
+
 /*
  * We regard a request as sync, if either a read or a sync write
  */
@@ -932,7 +935,7 @@
 extern void blk_queue_max_discard_sectors(struct request_queue *q,
 		unsigned int max_discard_sectors);
 extern void blk_queue_logical_block_size(struct request_queue *, unsigned short);
-extern void blk_queue_physical_block_size(struct request_queue *, unsigned short);
+extern void blk_queue_physical_block_size(struct request_queue *, unsigned int);
 extern void blk_queue_alignment_offset(struct request_queue *q,
 				       unsigned int alignment);
 extern void blk_limits_io_min(struct queue_limits *limits, unsigned int min);
@@ -942,6 +945,8 @@
 extern void blk_set_default_limits(struct queue_limits *lim);
 extern int blk_stack_limits(struct queue_limits *t, struct queue_limits *b,
 			    sector_t offset);
+extern int bdev_stack_limits(struct queue_limits *t, struct block_device *bdev,
+			    sector_t offset);
 extern void disk_stack_limits(struct gendisk *disk, struct block_device *bdev,
 			      sector_t offset);
 extern void blk_queue_stack_limits(struct request_queue *t, struct request_queue *b);
@@ -1081,7 +1086,7 @@
 	return q->limits.physical_block_size;
 }
 
-static inline int bdev_physical_block_size(struct block_device *bdev)
+static inline unsigned int bdev_physical_block_size(struct block_device *bdev)
 {
 	return queue_physical_block_size(bdev_get_queue(bdev));
 }
@@ -1114,11 +1119,18 @@
 	return q->limits.alignment_offset;
 }
 
+static inline int queue_limit_alignment_offset(struct queue_limits *lim, sector_t offset)
+{
+	unsigned int granularity = max(lim->physical_block_size, lim->io_min);
+
+	offset &= granularity - 1;
+	return (granularity + lim->alignment_offset - offset) & (granularity - 1);
+}
+
 static inline int queue_sector_alignment_offset(struct request_queue *q,
 						sector_t sector)
 {
-	return ((sector << 9) - q->limits.alignment_offset)
-		& (q->limits.io_min - 1);
+	return queue_limit_alignment_offset(&q->limits, sector << 9);
 }
 
 static inline int bdev_alignment_offset(struct block_device *bdev)
--- linux-mvl-dove-2.6.32.orig/include/linux/if_vlan.h
+++ linux-mvl-dove-2.6.32/include/linux/if_vlan.h
@@ -115,10 +115,12 @@
 extern int __vlan_hwaccel_rx(struct sk_buff *skb, struct vlan_group *grp,
 			     u16 vlan_tci, int polling);
 extern int vlan_hwaccel_do_receive(struct sk_buff *skb);
-extern int vlan_gro_receive(struct napi_struct *napi, struct vlan_group *grp,
-			    unsigned int vlan_tci, struct sk_buff *skb);
-extern int vlan_gro_frags(struct napi_struct *napi, struct vlan_group *grp,
-			  unsigned int vlan_tci);
+extern gro_result_t
+vlan_gro_receive(struct napi_struct *napi, struct vlan_group *grp,
+		 unsigned int vlan_tci, struct sk_buff *skb);
+extern gro_result_t
+vlan_gro_frags(struct napi_struct *napi, struct vlan_group *grp,
+	       unsigned int vlan_tci);
 
 #else
 static inline struct net_device *vlan_dev_real_dev(const struct net_device *dev)
@@ -145,17 +147,18 @@
 	return 0;
 }
 
-static inline int vlan_gro_receive(struct napi_struct *napi,
-				   struct vlan_group *grp,
-				   unsigned int vlan_tci, struct sk_buff *skb)
+static inline gro_result_t
+vlan_gro_receive(struct napi_struct *napi, struct vlan_group *grp,
+		 unsigned int vlan_tci, struct sk_buff *skb)
 {
-	return NET_RX_DROP;
+	return GRO_DROP;
 }
 
-static inline int vlan_gro_frags(struct napi_struct *napi,
-				 struct vlan_group *grp, unsigned int vlan_tci)
+static inline gro_result_t
+vlan_gro_frags(struct napi_struct *napi, struct vlan_group *grp,
+	       unsigned int vlan_tci)
 {
-	return NET_RX_DROP;
+	return GRO_DROP;
 }
 #endif
 
--- linux-mvl-dove-2.6.32.orig/include/linux/syscalls.h
+++ linux-mvl-dove-2.6.32/include/linux/syscalls.h
@@ -153,7 +153,8 @@
 #define __SC_STR_TDECL6(t, a, ...)	#t, __SC_STR_TDECL5(__VA_ARGS__)
 
 #define SYSCALL_TRACE_ENTER_EVENT(sname)				\
-	static struct ftrace_event_call event_enter_##sname;		\
+	static struct ftrace_event_call					\
+	__attribute__((__aligned__(4))) event_enter_##sname;		\
 	struct trace_event enter_syscall_print_##sname = {		\
 		.trace                  = print_syscall_enter,		\
 	};								\
@@ -189,7 +190,8 @@
 	}
 
 #define SYSCALL_TRACE_EXIT_EVENT(sname)					\
-	static struct ftrace_event_call event_exit_##sname;		\
+	static struct ftrace_event_call					\
+	__attribute__((__aligned__(4))) event_exit_##sname;		\
 	struct trace_event exit_syscall_print_##sname = {		\
 		.trace                  = print_syscall_exit,		\
 	};								\
@@ -879,4 +881,8 @@
 asmlinkage long sys_perf_event_open(
 		struct perf_event_attr __user *attr_uptr,
 		pid_t pid, int cpu, int group_fd, unsigned long flags);
+
+asmlinkage long sys_mmap_pgoff(unsigned long addr, unsigned long len,
+			unsigned long prot, unsigned long flags,
+			unsigned long fd, unsigned long pgoff);
 #endif
--- linux-mvl-dove-2.6.32.orig/include/linux/hid.h
+++ linux-mvl-dove-2.6.32/include/linux/hid.h
@@ -312,6 +312,7 @@
 #define HID_QUIRK_MULTI_INPUT			0x00000040
 #define HID_QUIRK_SKIP_OUTPUT_REPORTS		0x00010000
 #define HID_QUIRK_FULLSPEED_INTERVAL		0x10000000
+#define HID_QUIRK_NO_INIT_REPORTS		0x20000000
 
 /*
  * This is the global environment of the parser. This information is
--- linux-mvl-dove-2.6.32.orig/include/linux/interrupt.h
+++ linux-mvl-dove-2.6.32/include/linux/interrupt.h
@@ -52,16 +52,22 @@
  * IRQF_ONESHOT - Interrupt is not reenabled after the hardirq handler finished.
  *                Used by threaded interrupts which need to keep the
  *                irq line disabled until the threaded handler has been run.
+ * IRQF_NO_SUSPEND - Do not disable this IRQ during suspend
+ * IRQF_FORCE_RESUME - Force enable it on resume even if IRQF_NO_SUSPEND is set
  */
 #define IRQF_DISABLED		0x00000020
 #define IRQF_SAMPLE_RANDOM	0x00000040
 #define IRQF_SHARED		0x00000080
 #define IRQF_PROBE_SHARED	0x00000100
-#define IRQF_TIMER		0x00000200
+#define __IRQF_TIMER		0x00000200
 #define IRQF_PERCPU		0x00000400
 #define IRQF_NOBALANCING	0x00000800
 #define IRQF_IRQPOLL		0x00001000
 #define IRQF_ONESHOT		0x00002000
+#define IRQF_NO_SUSPEND		0x00004000
+#define IRQF_FORCE_RESUME	0x00008000
+
+#define IRQF_TIMER		(__IRQF_TIMER | IRQF_NO_SUSPEND)
 
 /*
  * Bits used by threaded handlers:
--- linux-mvl-dove-2.6.32.orig/include/linux/pci_ids.h
+++ linux-mvl-dove-2.6.32/include/linux/pci_ids.h
@@ -393,6 +393,9 @@
 #define PCI_DEVICE_ID_VLSI_82C147	0x0105
 #define PCI_DEVICE_ID_VLSI_VAS96011	0x0702
 
+/* AMD RD890 Chipset */
+#define PCI_DEVICE_ID_RD890_IOMMU	0x5a23
+
 #define PCI_VENDOR_ID_ADL		0x1005
 #define PCI_DEVICE_ID_ADL_2301		0x2301
 
@@ -602,6 +605,8 @@
 #define PCI_DEVICE_ID_MATROX_G550	0x2527
 #define PCI_DEVICE_ID_MATROX_VIA	0x4536
 
+#define PCI_VENDOR_ID_MOBILITY_ELECTRONICS	0x14f2
+
 #define PCI_VENDOR_ID_CT		0x102c
 #define PCI_DEVICE_ID_CT_69000		0x00c0
 #define PCI_DEVICE_ID_CT_65545		0x00d8
@@ -1262,6 +1267,7 @@
 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP77_IDE       0x0759
 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_SMBUS     0x07D8
 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP79_SMBUS     0x0AA2
+#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP89_SATA	    0x0D85
 
 #define PCI_VENDOR_ID_IMS		0x10e0
 #define PCI_DEVICE_ID_IMS_TT128		0x9128
@@ -2030,6 +2036,7 @@
 #define PCI_DEVICE_ID_AFAVLAB_P030	0x2182
 #define PCI_SUBDEVICE_ID_AFAVLAB_P061		0x2150
 
+#define PCI_VENDOR_ID_BCM_GVC          0x14a4
 #define PCI_VENDOR_ID_BROADCOM		0x14e4
 #define PCI_DEVICE_ID_TIGON3_5752	0x1600
 #define PCI_DEVICE_ID_TIGON3_5752M	0x1601
@@ -2290,6 +2297,20 @@
 #define PCI_DEVICE_ID_MPC8536		0x0051
 #define PCI_DEVICE_ID_P2020E		0x0070
 #define PCI_DEVICE_ID_P2020		0x0071
+#define PCI_DEVICE_ID_P2010E		0x0078
+#define PCI_DEVICE_ID_P2010		0x0079
+#define PCI_DEVICE_ID_P1020E		0x0100
+#define PCI_DEVICE_ID_P1020		0x0101
+#define PCI_DEVICE_ID_P1011E		0x0108
+#define PCI_DEVICE_ID_P1011		0x0109
+#define PCI_DEVICE_ID_P1022E		0x0110
+#define PCI_DEVICE_ID_P1022		0x0111
+#define PCI_DEVICE_ID_P1013E		0x0118
+#define PCI_DEVICE_ID_P1013		0x0119
+#define PCI_DEVICE_ID_P4080E		0x0400
+#define PCI_DEVICE_ID_P4080		0x0401
+#define PCI_DEVICE_ID_P4040E		0x0408
+#define PCI_DEVICE_ID_P4040		0x0409
 #define PCI_DEVICE_ID_MPC8641		0x7010
 #define PCI_DEVICE_ID_MPC8641D		0x7011
 #define PCI_DEVICE_ID_MPC8610		0x7018
@@ -2303,6 +2324,7 @@
 #define PCI_VENDOR_ID_JMICRON		0x197B
 #define PCI_DEVICE_ID_JMICRON_JMB360	0x2360
 #define PCI_DEVICE_ID_JMICRON_JMB361	0x2361
+#define PCI_DEVICE_ID_JMICRON_JMB362	0x2362
 #define PCI_DEVICE_ID_JMICRON_JMB363	0x2363
 #define PCI_DEVICE_ID_JMICRON_JMB365	0x2365
 #define PCI_DEVICE_ID_JMICRON_JMB366	0x2366
@@ -2398,6 +2420,9 @@
 #define PCI_DEVICE_ID_INTEL_82840_HB	0x1a21
 #define PCI_DEVICE_ID_INTEL_82845_HB	0x1a30
 #define PCI_DEVICE_ID_INTEL_IOAT	0x1a38
+#define PCI_DEVICE_ID_INTEL_CPT_SMBUS	0x1c22
+#define PCI_DEVICE_ID_INTEL_CPT_LPC1	0x1c42
+#define PCI_DEVICE_ID_INTEL_CPT_LPC2	0x1c43
 #define PCI_DEVICE_ID_INTEL_82801AA_0	0x2410
 #define PCI_DEVICE_ID_INTEL_82801AA_1	0x2411
 #define PCI_DEVICE_ID_INTEL_82801AA_3	0x2413
--- linux-mvl-dove-2.6.32.orig/include/linux/mm.h
+++ linux-mvl-dove-2.6.32/include/linux/mm.h
@@ -77,7 +77,11 @@
 #define VM_MAYSHARE	0x00000080
 
 #define VM_GROWSDOWN	0x00000100	/* general info on the segment */
+#if defined(CONFIG_STACK_GROWSUP) || defined(CONFIG_IA64)
 #define VM_GROWSUP	0x00000200
+#else
+#define VM_GROWSUP	0x00000000
+#endif
 #define VM_PFNMAP	0x00000400	/* Page-ranges managed without "struct page", just pure PFN */
 #define VM_DENYWRITE	0x00000800	/* ETXTBSY on write attempts.. */
 
@@ -713,6 +717,7 @@
 
 int shmem_lock(struct file *file, int lock, struct user_struct *user);
 struct file *shmem_file_setup(const char *name, loff_t size, unsigned long flags);
+void shmem_set_file(struct vm_area_struct *vma, struct file *file);
 int shmem_zero_setup(struct vm_area_struct *);
 
 #ifndef CONFIG_MMU
@@ -837,6 +842,12 @@
 int set_page_dirty_lock(struct page *page);
 int clear_page_dirty_for_io(struct page *page);
 
+/* Is the vma a continuation of the stack vma above it? */
+static inline int vma_stack_continue(struct vm_area_struct *vma, unsigned long addr)
+{
+	return vma && (vma->vm_end == addr) && (vma->vm_flags & VM_GROWSDOWN);
+}
+
 extern unsigned long move_page_tables(struct vm_area_struct *vma,
 		unsigned long old_addr, struct vm_area_struct *new_vma,
 		unsigned long new_addr, unsigned long len);
@@ -1129,7 +1140,15 @@
 				   unsigned long addr, unsigned long len,
 				   unsigned long flags, struct page **pages);
 
-extern unsigned long get_unmapped_area(struct file *, unsigned long, unsigned long, unsigned long, unsigned long);
+extern unsigned long get_unmapped_area_prot(struct file *, unsigned long,
+		unsigned long, unsigned long, unsigned long, int);
+
+static inline unsigned long get_unmapped_area(struct file *file,
+		unsigned long addr, unsigned long len, unsigned long pgoff,
+		unsigned long flags)
+{
+	return get_unmapped_area_prot(file, addr, len, pgoff, flags, 0);
+}
 
 extern unsigned long do_mmap_pgoff(struct file *file, unsigned long addr,
 	unsigned long len, unsigned long prot,
@@ -1195,8 +1214,10 @@
 
 /* Do stack extension */
 extern int expand_stack(struct vm_area_struct *vma, unsigned long address);
-#ifdef CONFIG_IA64
+#if VM_GROWSUP
 extern int expand_upwards(struct vm_area_struct *vma, unsigned long address);
+#else
+  #define expand_upwards(vma, address) do { } while (0)
 #endif
 extern int expand_stack_downwards(struct vm_area_struct *vma,
 				  unsigned long address);
@@ -1239,6 +1260,7 @@
 #define FOLL_GET	0x04	/* do get_page on page */
 #define FOLL_DUMP	0x08	/* give error on hole if it would be zero */
 #define FOLL_FORCE	0x10	/* get_user_pages read/write w/o permission */
+#define FOLL_PTE_EXIST  0x100   /* */
 
 typedef int (*pte_fn_t)(pte_t *pte, pgtable_t token, unsigned long addr,
 			void *data);
--- linux-mvl-dove-2.6.32.orig/include/linux/if_pppox.h
+++ linux-mvl-dove-2.6.32/include/linux/if_pppox.h
@@ -27,6 +27,8 @@
 #include <linux/ppp_channel.h>
 #endif /* __KERNEL__ */
 #include <linux/if_pppol2tp.h>
+#include <linux/if_pppolac.h>
+#include <linux/if_pppopns.h>
 
 /* For user-space programs to pick up these definitions
  * which they wouldn't get otherwise without defining __KERNEL__
@@ -51,7 +53,9 @@
  */ 
 #define PX_PROTO_OE    0 /* Currently just PPPoE */
 #define PX_PROTO_OL2TP 1 /* Now L2TP also */
-#define PX_MAX_PROTO   2
+#define PX_PROTO_OLAC  2
+#define PX_PROTO_OPNS  3
+#define PX_MAX_PROTO   4
 
 struct sockaddr_pppox { 
        sa_family_t     sa_family;            /* address family, AF_PPPOX */ 
@@ -141,6 +145,19 @@
 					     relayed to (PPPoE relaying) */
 };
 
+struct pppolac_opt {
+	__u32	local;
+	__u32	remote;
+	__u16	sequence;
+	__u8	sequencing;
+};
+
+struct pppopns_opt {
+	__u16	local;
+	__u16	remote;
+	__u32	sequence;
+};
+
 #include <net/sock.h>
 
 struct pppox_sock {
@@ -150,6 +167,8 @@
 	struct pppox_sock	*next;	  /* for hash table */
 	union {
 		struct pppoe_opt pppoe;
+		struct pppolac_opt lac;
+		struct pppopns_opt pns;
 	} proto;
 	__be16			num;
 };
--- linux-mvl-dove-2.6.32.orig/include/linux/fs.h
+++ linux-mvl-dove-2.6.32/include/linux/fs.h
@@ -87,6 +87,9 @@
  */
 #define FMODE_NOCMTIME		((__force fmode_t)2048)
 
+/* Expect random access pattern */
+#define FMODE_RANDOM		((__force fmode_t)4096)
+
 /*
  * The below are the various read and write types that we support. Some of
  * them include behavioral modifiers that send information down to the
@@ -142,11 +145,11 @@
  *
  */
 #define RW_MASK		1
-#define RWA_MASK	2
+#define RWA_MASK		16
 #define READ 0
 #define WRITE 1
-#define READA 2		/* read-ahead  - don't block if no resources */
-#define SWRITE 3	/* for ll_rw_block() - wait for buffer lock */
+#define READA			16 /* readahead - don't block if no resources */
+#define SWRITE			17 /* for ll_rw_block(), wait for buffer lock */
 #define READ_SYNC	(READ | (1 << BIO_RW_SYNCIO) | (1 << BIO_RW_UNPLUG))
 #define READ_META	(READ | (1 << BIO_RW_META))
 #define WRITE_SYNC_PLUG	(WRITE | (1 << BIO_RW_SYNCIO) | (1 << BIO_RW_NOIDLE))
@@ -632,6 +635,7 @@
 	spinlock_t		private_lock;	/* for use by the address_space */
 	struct list_head	private_list;	/* ditto */
 	struct address_space	*assoc_mapping;	/* ditto */
+	struct mutex		unmap_mutex;    /* to protect unmapping */
 } __attribute__((aligned(sizeof(long))));
 	/*
 	 * On most architectures that alignment is already the case; but
@@ -1307,6 +1311,8 @@
 #define MNT_FORCE	0x00000001	/* Attempt to forcibily umount */
 #define MNT_DETACH	0x00000002	/* Just detach from the tree */
 #define MNT_EXPIRE	0x00000004	/* Mark for expiry */
+#define UMOUNT_NOFOLLOW	0x00000008	/* Don't follow symlink on umount */
+#define UMOUNT_UNUSED	0x80000000	/* Flag guaranteed to be unused */
 
 extern struct list_head super_blocks;
 extern spinlock_t sb_lock;
@@ -2153,6 +2159,7 @@
 
 extern int inode_init_always(struct super_block *, struct inode *);
 extern void inode_init_once(struct inode *);
+extern void address_space_init_once(struct address_space *mapping);
 extern void inode_add_to_lists(struct super_block *, struct inode *);
 extern void iput(struct inode *);
 extern struct inode * igrab(struct inode *);
@@ -2222,6 +2229,7 @@
 /* fs/block_dev.c */
 extern ssize_t blkdev_aio_write(struct kiocb *iocb, const struct iovec *iov,
 				unsigned long nr_segs, loff_t pos);
+extern int block_fsync(struct file *filp, struct dentry *dentry, int datasync);
 
 /* fs/splice.c */
 extern ssize_t generic_file_splice_read(struct file *, loff_t *,
@@ -2314,6 +2322,7 @@
 extern int generic_readlink(struct dentry *, char __user *, int);
 extern void generic_fillattr(struct inode *, struct kstat *);
 extern int vfs_getattr(struct vfsmount *, struct dentry *, struct kstat *);
+void __inode_add_bytes(struct inode *inode, loff_t bytes);
 void inode_add_bytes(struct inode *inode, loff_t bytes);
 void inode_sub_bytes(struct inode *inode, loff_t bytes);
 loff_t inode_get_bytes(struct inode *inode);
@@ -2371,7 +2380,7 @@
 extern const struct inode_operations simple_dir_inode_operations;
 struct tree_descr { char *name; const struct file_operations *ops; int mode; };
 struct dentry *d_alloc_name(struct dentry *, const char *);
-extern int simple_fill_super(struct super_block *, int, struct tree_descr *);
+extern int simple_fill_super(struct super_block *, unsigned long, struct tree_descr *);
 extern int simple_pin_fs(struct file_system_type *, struct vfsmount **mount, int *count);
 extern void simple_release_fs(struct vfsmount **mount, int *count);
 
--- linux-mvl-dove-2.6.32.orig/include/linux/firmware.h
+++ linux-mvl-dove-2.6.32/include/linux/firmware.h
@@ -11,6 +11,7 @@
 struct firmware {
 	size_t size;
 	const u8 *data;
+	struct page **pages;
 };
 
 struct device;
--- linux-mvl-dove-2.6.32.orig/include/linux/mv643xx_i2c.h
+++ linux-mvl-dove-2.6.32/include/linux/mv643xx_i2c.h
@@ -11,12 +11,20 @@
 #include <linux/types.h>
 
 #define MV64XXX_I2C_CTLR_NAME	"mv64xxx_i2c"
+#define MV64XXX_I2C_EXPANDER_NAME	"mv64xxx_i2c_exp"
 
 /* i2c Platform Device, Driver Data */
 struct mv64xxx_i2c_pdata {
 	u32	freq_m;
 	u32	freq_n;
-	u32	timeout;	/* In milliseconds */
+	u32	delay_after_stop;
+	u32	timeout;	/* In milliseconds, used only when expander not enabled */
+	int     (*select_exp_port)	(unsigned int port_id);
 };
 
+/* i2c expander driver data */
+struct mv64xxx_i2c_exp_pdata {
+	struct platform_device  *hw_adapter;
+	u32	timeout;	/* In milliseconds */
+};
 #endif /*_MV64XXX_I2C_H_*/
--- linux-mvl-dove-2.6.32.orig/include/linux/swap.h
+++ linux-mvl-dove-2.6.32/include/linux/swap.h
@@ -177,6 +177,7 @@
 	unsigned int max;
 	unsigned int inuse_pages;
 	unsigned int old_block_size;
+	void (*notify_swap_entry_free_fn) (unsigned long);
 };
 
 struct swap_list_t {
@@ -218,21 +219,11 @@
 	__lru_cache_add(page, LRU_INACTIVE_ANON);
 }
 
-static inline void lru_cache_add_active_anon(struct page *page)
-{
-	__lru_cache_add(page, LRU_ACTIVE_ANON);
-}
-
 static inline void lru_cache_add_file(struct page *page)
 {
 	__lru_cache_add(page, LRU_INACTIVE_FILE);
 }
 
-static inline void lru_cache_add_active_file(struct page *page)
-{
-	__lru_cache_add(page, LRU_ACTIVE_FILE);
-}
-
 /* linux/mm/vmscan.c */
 extern unsigned long try_to_free_pages(struct zonelist *zonelist, int order,
 					gfp_t gfp_mask, nodemask_t *mask);
@@ -323,6 +314,7 @@
 extern int reuse_swap_page(struct page *);
 extern int try_to_free_swap(struct page *);
 struct backing_dev_info;
+extern void set_notify_swap_entry_free(unsigned, void (*) (unsigned long));
 
 /* linux/mm/thrash.c */
 extern struct mm_struct *swap_token_mm;
--- linux-mvl-dove-2.6.32.orig/include/linux/freezer.h
+++ linux-mvl-dove-2.6.32/include/linux/freezer.h
@@ -64,9 +64,12 @@
 extern void cancel_freezing(struct task_struct *p);
 
 #ifdef CONFIG_CGROUP_FREEZER
-extern int cgroup_frozen(struct task_struct *task);
+extern int cgroup_freezing_or_frozen(struct task_struct *task);
 #else /* !CONFIG_CGROUP_FREEZER */
-static inline int cgroup_frozen(struct task_struct *task) { return 0; }
+static inline int cgroup_freezing_or_frozen(struct task_struct *task)
+{
+	return 0;
+}
 #endif /* !CONFIG_CGROUP_FREEZER */
 
 /*
--- linux-mvl-dove-2.6.32.orig/include/linux/keyreset.h
+++ linux-mvl-dove-2.6.32/include/linux/keyreset.h
@@ -0,0 +1,27 @@
+/*
+ * include/linux/keyreset.h - platform data structure for resetkeys driver
+ *
+ * Copyright (C) 2008 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef _LINUX_KEYRESET_H
+#define _LINUX_KEYRESET_H
+
+#define KEYRESET_NAME "keyreset"
+
+struct keyreset_platform_data {
+	int *keys_up;
+	int keys_down[]; /* 0 terminated */
+};
+
+#endif /* _LINUX_KEYRESET_H */
--- linux-mvl-dove-2.6.32.orig/include/linux/tty.h
+++ linux-mvl-dove-2.6.32/include/linux/tty.h
@@ -68,6 +68,17 @@
 	unsigned long data[0];
 };
 
+/*
+ * We default to dicing tty buffer allocations to this many characters
+ * in order to avoid multiple page allocations. We know the size of
+ * tty_buffer itself but it must also be taken into account that the
+ * the buffer is 256 byte aligned. See tty_buffer_find for the allocation
+ * logic this must match
+ */
+
+#define TTY_BUFFER_PAGE	(((PAGE_SIZE - sizeof(struct tty_buffer)) / 2) & ~0xFF)
+
+
 struct tty_bufhead {
 	struct delayed_work work;
 	spinlock_t lock;
--- linux-mvl-dove-2.6.32.orig/include/linux/lcm.h
+++ linux-mvl-dove-2.6.32/include/linux/lcm.h
@@ -0,0 +1,8 @@
+#ifndef _LCM_H
+#define _LCM_H
+
+#include <linux/compiler.h>
+
+unsigned long lcm(unsigned long a, unsigned long b) __attribute_const__;
+
+#endif /* _LCM_H */
--- linux-mvl-dove-2.6.32.orig/include/linux/reiserfs_xattr.h
+++ linux-mvl-dove-2.6.32/include/linux/reiserfs_xattr.h
@@ -70,6 +70,11 @@
 void reiserfs_security_free(struct reiserfs_security_handle *sec);
 #endif
 
+static inline int reiserfs_xattrs_initialized(struct super_block *sb)
+{
+	return REISERFS_SB(sb)->priv_root != NULL;
+}
+
 #define xattr_size(size) ((size) + sizeof(struct reiserfs_xattr_header))
 static inline loff_t reiserfs_xattr_nblocks(struct inode *inode, loff_t size)
 {
--- linux-mvl-dove-2.6.32.orig/include/linux/skbuff.h
+++ linux-mvl-dove-2.6.32/include/linux/skbuff.h
@@ -30,6 +30,10 @@
 #include <linux/dmaengine.h>
 #include <linux/hrtimer.h>
 
+#if defined(CONFIG_MV_SKB_HEADROOM)
+# define NET_SKB_PAD  CONFIG_MV_SKB_HEADROOM
+#endif
+
 /* Don't change this without changing skb_csum_unnecessary! */
 #define CHECKSUM_NONE 0
 #define CHECKSUM_UNNECESSARY 1
--- linux-mvl-dove-2.6.32.orig/include/linux/if_pppolac.h
+++ linux-mvl-dove-2.6.32/include/linux/if_pppolac.h
@@ -0,0 +1,35 @@
+/* include/linux/if_pppolac.h
+ *
+ * Header for PPP on L2TP Access Concentrator / PPPoLAC Socket (RFC 2661)
+ *
+ * Copyright (C) 2009 Google, Inc.
+ * Author: Chia-chi Yeh <chiachi@android.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __LINUX_IF_PPPOLAC_H
+#define __LINUX_IF_PPPOLAC_H
+
+#include <linux/socket.h>
+#include <linux/types.h>
+
+#define PX_PROTO_OLAC	2
+
+struct sockaddr_pppolac {
+	sa_family_t	sa_family;	/* AF_PPPOX */
+	unsigned int	sa_protocol;	/* PX_PROTO_OLAC */
+	int		udp_socket;
+	struct __attribute__((packed)) {
+		__u16	tunnel, session;
+	} local, remote;
+} __attribute__((packed));
+
+#endif /* __LINUX_IF_PPPOLAC_H */
--- linux-mvl-dove-2.6.32.orig/include/linux/connector.h
+++ linux-mvl-dove-2.6.32/include/linux/connector.h
@@ -24,9 +24,6 @@
 
 #include <linux/types.h>
 
-#define CN_IDX_CONNECTOR		0xffffffff
-#define CN_VAL_CONNECTOR		0xffffffff
-
 /*
  * Process Events connector unique ids -- used for message routing
  */
@@ -73,30 +70,6 @@
 	__u8 data[0];
 };
 
-/*
- * Notify structure - requests notification about
- * registering/unregistering idx/val in range [first, first+range].
- */
-struct cn_notify_req {
-	__u32 first;
-	__u32 range;
-};
-
-/*
- * Main notification control message
- * *_notify_num 	- number of appropriate cn_notify_req structures after 
- *				this struct.
- * group 		- notification receiver's idx.
- * len 			- total length of the attached data.
- */
-struct cn_ctl_msg {
-	__u32 idx_notify_num;
-	__u32 val_notify_num;
-	__u32 group;
-	__u32 len;
-	__u8 data[0];
-};
-
 #ifdef __KERNEL__
 
 #include <asm/atomic.h>
@@ -149,11 +122,6 @@
 	u32 seq, group;
 };
 
-struct cn_ctl_entry {
-	struct list_head notify_entry;
-	struct cn_ctl_msg *msg;
-};
-
 struct cn_dev {
 	struct cb_id id;
 
--- linux-mvl-dove-2.6.32.orig/include/linux/earlysuspend.h
+++ linux-mvl-dove-2.6.32/include/linux/earlysuspend.h
@@ -0,0 +1,56 @@
+/* include/linux/earlysuspend.h
+ *
+ * Copyright (C) 2007-2008 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef _LINUX_EARLYSUSPEND_H
+#define _LINUX_EARLYSUSPEND_H
+
+#ifdef CONFIG_HAS_EARLYSUSPEND
+#include <linux/list.h>
+#endif
+
+/* The early_suspend structure defines suspend and resume hooks to be called
+ * when the user visible sleep state of the system changes, and a level to
+ * control the order. They can be used to turn off the screen and input
+ * devices that are not used for wakeup.
+ * Suspend handlers are called in low to high level order, resume handlers are
+ * called in the opposite order. If, when calling register_early_suspend,
+ * the suspend handlers have already been called without a matching call to the
+ * resume handlers, the suspend handler will be called directly from
+ * register_early_suspend. This direct call can violate the normal level order.
+ */
+enum {
+	EARLY_SUSPEND_LEVEL_BLANK_SCREEN = 50,
+	EARLY_SUSPEND_LEVEL_STOP_DRAWING = 100,
+	EARLY_SUSPEND_LEVEL_DISABLE_FB = 150,
+};
+struct early_suspend {
+#ifdef CONFIG_HAS_EARLYSUSPEND
+	struct list_head link;
+	int level;
+	void (*suspend)(struct early_suspend *h);
+	void (*resume)(struct early_suspend *h);
+#endif
+};
+
+#ifdef CONFIG_HAS_EARLYSUSPEND
+void register_early_suspend(struct early_suspend *handler);
+void unregister_early_suspend(struct early_suspend *handler);
+#else
+#define register_early_suspend(handler) do { } while (0)
+#define unregister_early_suspend(handler) do { } while (0)
+#endif
+
+#endif
+
--- linux-mvl-dove-2.6.32.orig/include/linux/msdos_fs.h
+++ linux-mvl-dove-2.6.32/include/linux/msdos_fs.h
@@ -100,6 +100,7 @@
 /* <linux/videotext.h> has used 0x72 ('r') in collision, so skip a few */
 #define FAT_IOCTL_GET_ATTRIBUTES	_IOR('r', 0x10, __u32)
 #define FAT_IOCTL_SET_ATTRIBUTES	_IOW('r', 0x11, __u32)
+#define VFAT_IOCTL_GET_VOLUME_ID	_IOR('r', 0x12, __u32)
 
 struct fat_boot_sector {
 	__u8	ignored[3];	/* Boot strap short or near jump */
@@ -137,6 +138,17 @@
 	__le32   reserved2[4];
 };
 
+struct fat_boot_bsx {
+	__u8     drive;		    /* drive number */
+	__u8     reserved1;
+	__u8     signature;	    /* extended boot signature */
+	__u8     vol_id[4];     /* volume ID */
+	__u8     vol_label[11]; /* volume label */
+	__u8     type[8];       /* file system type */
+};
+#define FAT16_BSX_OFFSET	36 /* offset of fat_boot_bsx in FAT12 and FAT16 */
+#define FAT32_BSX_OFFSET	64 /* offset of fat_boot_bsx in FAT32 */
+
 struct msdos_dir_entry {
 	__u8	name[MSDOS_NAME];/* name and extension */
 	__u8	attr;		/* attribute bits */
--- linux-mvl-dove-2.6.32.orig/include/linux/mm_types.h
+++ linux-mvl-dove-2.6.32/include/linux/mm_types.h
@@ -138,7 +138,7 @@
 					   within vm_mm. */
 
 	/* linked list of VM areas per task, sorted by address */
-	struct vm_area_struct *vm_next;
+	struct vm_area_struct *vm_next, *vm_prev;
 
 	pgprot_t vm_page_prot;		/* Access permissions of this VMA. */
 	unsigned long vm_flags;		/* Flags, see mm.h. */
@@ -206,6 +206,9 @@
 	unsigned long (*get_unmapped_area) (struct file *filp,
 				unsigned long addr, unsigned long len,
 				unsigned long pgoff, unsigned long flags);
+       unsigned long (*get_unmapped_exec_area) (struct file *filp,
+				unsigned long addr, unsigned long len,
+				unsigned long pgoff, unsigned long flags);
 	void (*unmap_area) (struct mm_struct *mm, unsigned long addr);
 	unsigned long mmap_base;		/* base of mmap area */
 	unsigned long task_size;		/* size of task vm space */
--- linux-mvl-dove-2.6.32.orig/include/linux/tty_driver.h
+++ linux-mvl-dove-2.6.32/include/linux/tty_driver.h
@@ -224,6 +224,12 @@
  *	unless the tty also has a valid tty->termiox pointer.
  *
  *	Optional: Called under the termios lock
+ *
+ * int (*get_icount)(struct tty_struct *tty, struct serial_icounter *icount);
+ *
+ *	Called when the device receives a TIOCGICOUNT ioctl. Passed a kernel
+ *	structure to complete. This method is optional and will only be called
+ *	if provided (otherwise EINVAL will be returned).
  */
 
 #include <linux/fs.h>
@@ -232,6 +238,7 @@
 
 struct tty_struct;
 struct tty_driver;
+struct serial_icounter_struct;
 
 struct tty_operations {
 	struct tty_struct * (*lookup)(struct tty_driver *driver,
@@ -268,6 +275,8 @@
 			unsigned int set, unsigned int clear);
 	int (*resize)(struct tty_struct *tty, struct winsize *ws);
 	int (*set_termiox)(struct tty_struct *tty, struct termiox *tnew);
+	int (*get_icount)(struct tty_struct *tty,
+				struct serial_icounter_struct *icount);
 #ifdef CONFIG_CONSOLE_POLL
 	int (*poll_init)(struct tty_driver *driver, int line, char *options);
 	int (*poll_get_char)(struct tty_driver *driver, int line);
--- linux-mvl-dove-2.6.32.orig/include/linux/vmalloc.h
+++ linux-mvl-dove-2.6.32/include/linux/vmalloc.h
@@ -115,9 +115,11 @@
 extern struct vm_struct *vmlist;
 extern __init void vm_area_register_early(struct vm_struct *vm, size_t align);
 
+#ifndef CONFIG_HAVE_LEGACY_PER_CPU_AREA
 struct vm_struct **pcpu_get_vm_areas(const unsigned long *offsets,
 				     const size_t *sizes, int nr_vms,
 				     size_t align, gfp_t gfp_mask);
+#endif
 
 void pcpu_free_vm_areas(struct vm_struct **vms, int nr_vms);
 
--- linux-mvl-dove-2.6.32.orig/include/linux/android_pmem.h
+++ linux-mvl-dove-2.6.32/include/linux/android_pmem.h
@@ -0,0 +1,75 @@
+/* include/linux/android_pmem.h
+ *
+ * Copyright (C) 2007 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef _ANDROID_PMEM_H_
+#define _ANDROID_PMEM_H_
+
+#define PMEM_IOCTL_MAGIC 'p'
+#define PMEM_GET_PHYS		_IOW(PMEM_IOCTL_MAGIC, 1, unsigned int)
+#define PMEM_MAP		_IOW(PMEM_IOCTL_MAGIC, 2, unsigned int)
+#define PMEM_GET_SIZE		_IOW(PMEM_IOCTL_MAGIC, 3, unsigned int)
+#define PMEM_UNMAP		_IOW(PMEM_IOCTL_MAGIC, 4, unsigned int)
+/* This ioctl will allocate pmem space, backing the file, it will fail
+ * if the file already has an allocation, pass it the len as the argument
+ * to the ioctl */
+#define PMEM_ALLOCATE		_IOW(PMEM_IOCTL_MAGIC, 5, unsigned int)
+/* This will connect a one pmem file to another, pass the file that is already
+ * backed in memory as the argument to the ioctl
+ */
+#define PMEM_CONNECT		_IOW(PMEM_IOCTL_MAGIC, 6, unsigned int)
+/* Returns the total size of the pmem region it is sent to as a pmem_region
+ * struct (with offset set to 0). 
+ */
+#define PMEM_GET_TOTAL_SIZE	_IOW(PMEM_IOCTL_MAGIC, 7, unsigned int)
+#define PMEM_CACHE_FLUSH        _IOW(PMEM_IOCTL_MAGIC, 8, unsigned int)
+
+int get_pmem_file(int fd, unsigned long *start, unsigned long *vstart,
+		  unsigned long *end, struct file **filp);
+int get_pmem_user_addr(struct file *file, unsigned long *start,
+		       unsigned long *end);
+void put_pmem_file(struct file* file);
+void flush_pmem_file(struct file *file, unsigned long start, unsigned long len);
+
+struct android_pmem_platform_data
+{
+	const char* name;
+	/* starting physical address of memory region */
+	unsigned long start;
+	/* size of memory region */
+	unsigned long size;
+	/* set to indicate the region should not be managed with an allocator */
+	unsigned no_allocator;
+	/* set to indicate maps of this region should be cached, if a mix of
+	 * cached and uncached is desired, set this and open the device with
+	 * O_SYNC to get an uncached region */
+	unsigned cached;
+	/* The MSM7k has bits to enable a write buffer in the bus controller*/
+	unsigned buffered;
+};
+
+struct pmem_region {
+	unsigned long offset;
+	unsigned long len;
+};
+
+int pmem_setup(struct android_pmem_platform_data *pdata,
+	       long (*ioctl)(struct file *, unsigned int, unsigned long),
+	       int (*release)(struct inode *, struct file *));
+
+int pmem_remap(struct pmem_region *region, struct file *file,
+	       unsigned operation);
+
+#endif //_ANDROID_PPP_H_
+
--- linux-mvl-dove-2.6.32.orig/include/linux/seqlock.h
+++ linux-mvl-dove-2.6.32/include/linux/seqlock.h
@@ -88,12 +88,12 @@
 	unsigned ret;
 
 repeat:
-	ret = sl->sequence;
-	smp_rmb();
+	ret = ACCESS_ONCE(sl->sequence);
 	if (unlikely(ret & 1)) {
 		cpu_relax();
 		goto repeat;
 	}
+	smp_rmb();
 
 	return ret;
 }
--- linux-mvl-dove-2.6.32.orig/include/linux/synaptics_i2c_rmi.h
+++ linux-mvl-dove-2.6.32/include/linux/synaptics_i2c_rmi.h
@@ -0,0 +1,53 @@
+/*
+ * include/linux/synaptics_i2c_rmi.h - platform data structure for f75375s sensor
+ *
+ * Copyright (C) 2008 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef _LINUX_SYNAPTICS_I2C_RMI_H
+#define _LINUX_SYNAPTICS_I2C_RMI_H
+
+#define SYNAPTICS_I2C_RMI_NAME "synaptics-rmi-ts"
+
+enum {
+	SYNAPTICS_FLIP_X = 1UL << 0,
+	SYNAPTICS_FLIP_Y = 1UL << 1,
+	SYNAPTICS_SWAP_XY = 1UL << 2,
+	SYNAPTICS_SNAP_TO_INACTIVE_EDGE = 1UL << 3,
+};
+
+struct synaptics_i2c_rmi_platform_data {
+	uint32_t version;	/* Use this entry for panels with */
+				/* (major << 8 | minor) version or above. */
+				/* If non-zero another array entry follows */
+	int (*power)(int on);	/* Only valid in first array entry */
+	uint32_t flags;
+	uint32_t inactive_left; /* 0x10000 = screen width */
+	uint32_t inactive_right; /* 0x10000 = screen width */
+	uint32_t inactive_top; /* 0x10000 = screen height */
+	uint32_t inactive_bottom; /* 0x10000 = screen height */
+	uint32_t snap_left_on; /* 0x10000 = screen width */
+	uint32_t snap_left_off; /* 0x10000 = screen width */
+	uint32_t snap_right_on; /* 0x10000 = screen width */
+	uint32_t snap_right_off; /* 0x10000 = screen width */
+	uint32_t snap_top_on; /* 0x10000 = screen height */
+	uint32_t snap_top_off; /* 0x10000 = screen height */
+	uint32_t snap_bottom_on; /* 0x10000 = screen height */
+	uint32_t snap_bottom_off; /* 0x10000 = screen height */
+	uint32_t fuzz_x; /* 0x10000 = screen width */
+	uint32_t fuzz_y; /* 0x10000 = screen height */
+	int fuzz_p;
+	int fuzz_w;
+};
+
+#endif /* _LINUX_SYNAPTICS_I2C_RMI_H */
--- linux-mvl-dove-2.6.32.orig/include/linux/notifier.h
+++ linux-mvl-dove-2.6.32/include/linux/notifier.h
@@ -201,6 +201,7 @@
 #define NETDEV_PRE_UP		0x000D
 #define NETDEV_BONDING_OLDTYPE  0x000E
 #define NETDEV_BONDING_NEWTYPE  0x000F
+#define NETDEV_NOTIFY_PEERS	0x0013
 
 #define SYS_DOWN	0x0001	/* Notify of system down */
 #define SYS_RESTART	SYS_DOWN
--- linux-mvl-dove-2.6.32.orig/include/linux/quotaops.h
+++ linux-mvl-dove-2.6.32/include/linux/quotaops.h
@@ -26,6 +26,10 @@
 		sb->s_qcop->quota_sync(sb, type);
 }
 
+void inode_add_rsv_space(struct inode *inode, qsize_t number);
+void inode_claim_rsv_space(struct inode *inode, qsize_t number);
+void inode_sub_rsv_space(struct inode *inode, qsize_t number);
+
 int dquot_initialize(struct inode *inode, int type);
 int dquot_drop(struct inode *inode);
 struct dquot *dqget(struct super_block *sb, unsigned int id, int type);
@@ -42,7 +46,6 @@
 int dquot_reserve_space(struct inode *inode, qsize_t number, int prealloc);
 int dquot_claim_space(struct inode *inode, qsize_t number);
 void dquot_release_reserved_space(struct inode *inode, qsize_t number);
-qsize_t dquot_get_reserved_space(struct inode *inode);
 
 int dquot_free_space(struct inode *inode, qsize_t number);
 int dquot_free_inode(const struct inode *inode, qsize_t number);
@@ -199,6 +202,8 @@
 		if (inode->i_sb->dq_op->reserve_space(inode, nr, 0) == NO_QUOTA)
 			return 1;
 	}
+	else
+		inode_add_rsv_space(inode, nr);
 	return 0;
 }
 
@@ -221,7 +226,7 @@
 		if (inode->i_sb->dq_op->claim_space(inode, nr) == NO_QUOTA)
 			return 1;
 	} else
-		inode_add_bytes(inode, nr);
+		inode_claim_rsv_space(inode, nr);
 
 	mark_inode_dirty(inode);
 	return 0;
@@ -235,6 +240,8 @@
 {
 	if (sb_any_quota_active(inode->i_sb))
 		inode->i_sb->dq_op->release_rsv(inode, nr);
+	else
+		inode_sub_rsv_space(inode, nr);
 }
 
 static inline void vfs_dq_free_space_nodirty(struct inode *inode, qsize_t nr)
--- linux-mvl-dove-2.6.32.orig/include/linux/uid_stat.h
+++ linux-mvl-dove-2.6.32/include/linux/uid_stat.h
@@ -0,0 +1,24 @@
+/* include/linux/uid_stat.h
+ *
+ * Copyright (C) 2008-2009 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __uid_stat_h
+#define __uid_stat_h
+
+/* Contains definitions for resource tracking per uid. */
+
+extern int update_tcp_snd(uid_t uid, int size);
+extern int update_tcp_rcv(uid_t uid, int size);
+
+#endif /* _LINUX_UID_STAT_H */
--- linux-mvl-dove-2.6.32.orig/include/linux/binfmts.h
+++ linux-mvl-dove-2.6.32/include/linux/binfmts.h
@@ -29,6 +29,7 @@
 	char buf[BINPRM_BUF_SIZE];
 #ifdef CONFIG_MMU
 	struct vm_area_struct *vma;
+	unsigned long vma_pages;
 #else
 # define MAX_ARG_PAGES	32
 	struct page *page[MAX_ARG_PAGES];
@@ -59,6 +60,10 @@
 	unsigned long loader, exec;
 };
 
+extern void acct_arg_size(struct linux_binprm *bprm, unsigned long pages);
+extern struct page *get_arg_page(struct linux_binprm *bprm, unsigned long pos,
+					int write);
+
 #define BINPRM_FLAGS_ENFORCE_NONDUMP_BIT 0
 #define BINPRM_FLAGS_ENFORCE_NONDUMP (1 << BINPRM_FLAGS_ENFORCE_NONDUMP_BIT)
 
@@ -101,6 +106,7 @@
 extern int __must_check remove_arg_zero(struct linux_binprm *);
 extern int search_binary_handler(struct linux_binprm *,struct pt_regs *);
 extern int flush_old_exec(struct linux_binprm * bprm);
+extern void setup_new_exec(struct linux_binprm * bprm);
 
 extern int suid_dumpable;
 #define SUID_DUMP_DISABLE	0	/* No setuid dumping */
--- linux-mvl-dove-2.6.32.orig/include/linux/quota.h
+++ linux-mvl-dove-2.6.32/include/linux/quota.h
@@ -313,8 +313,9 @@
 	int (*claim_space) (struct inode *, qsize_t);
 	/* release rsved quota for delayed alloc */
 	void (*release_rsv) (struct inode *, qsize_t);
-	/* get reserved quota for delayed alloc */
-	qsize_t (*get_reserved_space) (struct inode *);
+	/* get reserved quota for delayed alloc, value returned is managed by
+	 * quota code only */
+	qsize_t *(*get_reserved_space) (struct inode *);
 };
 
 /* Operations handling requests from userspace */
--- linux-mvl-dove-2.6.32.orig/include/linux/backing-dev.h
+++ linux-mvl-dove-2.6.32/include/linux/backing-dev.h
@@ -81,8 +81,6 @@
 	struct bdi_writeback wb;  /* default writeback info for this bdi */
 	spinlock_t wb_lock;	  /* protects update side of wb_list */
 	struct list_head wb_list; /* the flusher threads hanging off this bdi */
-	unsigned long wb_mask;	  /* bitmask of registered tasks */
-	unsigned int wb_cnt;	  /* number of registered tasks */
 
 	struct list_head work_list;
 
@@ -101,8 +99,8 @@
 		const char *fmt, ...);
 int bdi_register_dev(struct backing_dev_info *bdi, dev_t dev);
 void bdi_unregister(struct backing_dev_info *bdi);
-void bdi_start_writeback(struct backing_dev_info *bdi, struct super_block *sb,
-				long nr_pages);
+void bdi_start_writeback(struct backing_dev_info *bdi, long nr_pages);
+void bdi_start_background_writeback(struct backing_dev_info *bdi);
 int bdi_writeback_task(struct bdi_writeback *wb);
 int bdi_has_dirty_io(struct backing_dev_info *bdi);
 
--- linux-mvl-dove-2.6.32.orig/include/linux/tboot.h
+++ linux-mvl-dove-2.6.32/include/linux/tboot.h
@@ -150,6 +150,7 @@
 
 #else
 
+#define tboot_enabled()			0
 #define tboot_probe()			do { } while (0)
 #define tboot_shutdown(shutdown_type)	do { } while (0)
 #define tboot_sleep(sleep_state, pm1a_control, pm1b_control)	\
--- linux-mvl-dove-2.6.32.orig/include/linux/writeback.h
+++ linux-mvl-dove-2.6.32/include/linux/writeback.h
@@ -27,13 +27,12 @@
  * in a manner such that unspecified fields are set to zero.
  */
 struct writeback_control {
-	struct backing_dev_info *bdi;	/* If !NULL, only write back this
-					   queue */
-	struct super_block *sb;		/* if !NULL, only write inodes from
-					   this super_block */
 	enum writeback_sync_modes sync_mode;
 	unsigned long *older_than_this;	/* If !NULL, only write back inodes
 					   older than this */
+	unsigned long wb_start;         /* Time writeback_inodes_wb was
+					   called. This is needed to avoid
+					   extra jobs and livelock */
 	long nr_to_write;		/* Write this many pages, and decrement
 					   this for each page written */
 	long pages_skipped;		/* Pages which were not written */
@@ -69,8 +68,10 @@
 struct bdi_writeback;
 int inode_wait(void *);
 void writeback_inodes_sb(struct super_block *);
+int writeback_inodes_sb_if_idle(struct super_block *);
 void sync_inodes_sb(struct super_block *);
-void writeback_inodes_wbc(struct writeback_control *wbc);
+void writeback_inodes_wb(struct bdi_writeback *wb,
+		struct writeback_control *wbc);
 long wb_do_writeback(struct bdi_writeback *wb, int force_wait);
 void wakeup_flusher_threads(long nr_pages);
 
--- linux-mvl-dove-2.6.32.orig/include/linux/kvm_host.h
+++ linux-mvl-dove-2.6.32/include/linux/kvm_host.h
@@ -53,7 +53,7 @@
  */
 struct kvm_io_bus {
 	int                   dev_count;
-#define NR_IOBUS_DEVS 6
+#define NR_IOBUS_DEVS 200
 	struct kvm_io_device *devs[NR_IOBUS_DEVS];
 };
 
@@ -116,6 +116,11 @@
 	int user_alloc;
 };
 
+static inline unsigned long kvm_dirty_bitmap_bytes(struct kvm_memory_slot *memslot)
+{
+	return ALIGN(memslot->npages, BITS_PER_LONG) / 8;
+}
+
 struct kvm_kernel_irq_routing_entry {
 	u32 gsi;
 	u32 type;
@@ -266,6 +271,7 @@
 void mark_page_dirty(struct kvm *kvm, gfn_t gfn);
 
 void kvm_vcpu_block(struct kvm_vcpu *vcpu);
+void kvm_vcpu_on_spin(struct kvm_vcpu *vcpu);
 void kvm_resched(struct kvm_vcpu *vcpu);
 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu);
 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu);
--- linux-mvl-dove-2.6.32.orig/include/linux/inetdevice.h
+++ linux-mvl-dove-2.6.32/include/linux/inetdevice.h
@@ -83,6 +83,7 @@
 #define IN_DEV_FORWARD(in_dev)		IN_DEV_CONF_GET((in_dev), FORWARDING)
 #define IN_DEV_MFORWARD(in_dev)		IN_DEV_ANDCONF((in_dev), MC_FORWARDING)
 #define IN_DEV_RPFILTER(in_dev)		IN_DEV_MAXCONF((in_dev), RP_FILTER)
+#define IN_DEV_SRC_VMARK(in_dev)    	IN_DEV_ORCONF((in_dev), SRC_VMARK)
 #define IN_DEV_SOURCE_ROUTE(in_dev)	IN_DEV_ANDCONF((in_dev), \
 						       ACCEPT_SOURCE_ROUTE)
 #define IN_DEV_BOOTP_RELAY(in_dev)	IN_DEV_ANDCONF((in_dev), BOOTP_RELAY)
--- linux-mvl-dove-2.6.32.orig/include/linux/wakelock.h
+++ linux-mvl-dove-2.6.32/include/linux/wakelock.h
@@ -0,0 +1,91 @@
+/* include/linux/wakelock.h
+ *
+ * Copyright (C) 2007-2008 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef _LINUX_WAKELOCK_H
+#define _LINUX_WAKELOCK_H
+
+#include <linux/list.h>
+#include <linux/ktime.h>
+
+/* A wake_lock prevents the system from entering suspend or other low power
+ * states when active. If the type is set to WAKE_LOCK_SUSPEND, the wake_lock
+ * prevents a full system suspend. If the type is WAKE_LOCK_IDLE, low power
+ * states that cause large interrupt latencies or that disable a set of
+ * interrupts will not entered from idle until the wake_locks are released.
+ */
+
+enum {
+	WAKE_LOCK_SUSPEND, /* Prevent suspend */
+	WAKE_LOCK_IDLE,    /* Prevent low power idle */
+	WAKE_LOCK_TYPE_COUNT
+};
+
+struct wake_lock {
+#ifdef CONFIG_HAS_WAKELOCK
+	struct list_head    link;
+	int                 flags;
+	const char         *name;
+	unsigned long       expires;
+#ifdef CONFIG_WAKELOCK_STAT
+	struct {
+		int             count;
+		int             expire_count;
+		int             wakeup_count;
+		ktime_t         total_time;
+		ktime_t         prevent_suspend_time;
+		ktime_t         max_time;
+		ktime_t         last_time;
+	} stat;
+#endif
+#endif
+};
+
+#ifdef CONFIG_HAS_WAKELOCK
+
+void wake_lock_init(struct wake_lock *lock, int type, const char *name);
+void wake_lock_destroy(struct wake_lock *lock);
+void wake_lock(struct wake_lock *lock);
+void wake_lock_timeout(struct wake_lock *lock, long timeout);
+void wake_unlock(struct wake_lock *lock);
+
+/* wake_lock_active returns a non-zero value if the wake_lock is currently
+ * locked. If the wake_lock has a timeout, it does not check the timeout
+ * but if the timeout had aready been checked it will return 0.
+ */
+int wake_lock_active(struct wake_lock *lock);
+
+/* has_wake_lock returns 0 if no wake locks of the specified type are active,
+ * and non-zero if one or more wake locks are held. Specifically it returns
+ * -1 if one or more wake locks with no timeout are active or the
+ * number of jiffies until all active wake locks time out.
+ */
+long has_wake_lock(int type);
+
+#else
+
+static inline void wake_lock_init(struct wake_lock *lock, int type,
+					const char *name) {}
+static inline void wake_lock_destroy(struct wake_lock *lock) {}
+static inline void wake_lock(struct wake_lock *lock) {}
+static inline void wake_lock_timeout(struct wake_lock *lock, long timeout) {}
+static inline void wake_unlock(struct wake_lock *lock) {}
+
+static inline int wake_lock_active(struct wake_lock *lock) { return 0; }
+static inline long has_wake_lock(int type) { return 0; }
+
+#endif
+
+#endif
+
--- linux-mvl-dove-2.6.32.orig/include/linux/security.h
+++ linux-mvl-dove-2.6.32/include/linux/security.h
@@ -76,7 +76,7 @@
 extern int cap_task_setscheduler(struct task_struct *p, int policy, struct sched_param *lp);
 extern int cap_task_setioprio(struct task_struct *p, int ioprio);
 extern int cap_task_setnice(struct task_struct *p, int nice);
-extern int cap_syslog(int type);
+extern int cap_syslog(int type, bool from_file);
 extern int cap_vm_enough_memory(struct mm_struct *mm, long pages);
 
 struct msghdr;
@@ -95,8 +95,13 @@
 extern int cap_netlink_send(struct sock *sk, struct sk_buff *skb);
 extern int cap_netlink_recv(struct sk_buff *skb, int cap);
 
+#ifdef CONFIG_MMU
 extern unsigned long mmap_min_addr;
 extern unsigned long dac_mmap_min_addr;
+#else
+#define dac_mmap_min_addr	0UL
+#endif
+
 /*
  * Values used in the task_security_ops calls
  */
@@ -121,6 +126,7 @@
 #define LSM_UNSAFE_PTRACE	2
 #define LSM_UNSAFE_PTRACE_CAP	4
 
+#ifdef CONFIG_MMU
 /*
  * If a hint addr is less than mmap_min_addr change hint to be as
  * low as possible but still greater than mmap_min_addr
@@ -135,6 +141,7 @@
 }
 extern int mmap_min_addr_handler(struct ctl_table *table, int write,
 				 void __user *buffer, size_t *lenp, loff_t *ppos);
+#endif
 
 #ifdef CONFIG_SECURITY
 
@@ -447,6 +454,22 @@
  *	@new_dir contains the path structure for parent of the new link.
  *	@new_dentry contains the dentry structure of the new link.
  *	Return 0 if permission is granted.
+ * @path_chmod:
+ *	Check for permission to change DAC's permission of a file or directory.
+ *	@dentry contains the dentry structure.
+ *	@mnt contains the vfsmnt structure.
+ *	@mode contains DAC's mode.
+ *	Return 0 if permission is granted.
+ * @path_chown:
+ *	Check for permission to change owner/group of a file or directory.
+ *	@path contains the path structure.
+ *	@uid contains new owner's ID.
+ *	@gid contains new group's ID.
+ *	Return 0 if permission is granted.
+ * @path_chroot:
+ *	Check for permission to change root directory.
+ *	@path contains the path structure.
+ *	Return 0 if permission is granted.
  * @inode_readlink:
  *	Check the permission to read the symbolic link.
  *	@dentry contains the dentry structure for the file link.
@@ -1324,6 +1347,7 @@
  *	logging to the console.
  *	See the syslog(2) manual page for an explanation of the @type values.
  *	@type contains the type of action.
+ *	@from_file indicates the context of action (if it came from /proc).
  *	Return 0 if permission is granted.
  * @settime:
  *	Check permission to change the system time.
@@ -1438,7 +1462,7 @@
 	int (*sysctl) (struct ctl_table *table, int op);
 	int (*quotactl) (int cmds, int type, int id, struct super_block *sb);
 	int (*quota_on) (struct dentry *dentry);
-	int (*syslog) (int type);
+	int (*syslog) (int type, bool from_file);
 	int (*settime) (struct timespec *ts, struct timezone *tz);
 	int (*vm_enough_memory) (struct mm_struct *mm, long pages);
 
@@ -1488,6 +1512,10 @@
 			  struct dentry *new_dentry);
 	int (*path_rename) (struct path *old_dir, struct dentry *old_dentry,
 			    struct path *new_dir, struct dentry *new_dentry);
+	int (*path_chmod) (struct dentry *dentry, struct vfsmount *mnt,
+			   mode_t mode);
+	int (*path_chown) (struct path *path, uid_t uid, gid_t gid);
+	int (*path_chroot) (struct path *path);
 #endif
 
 	int (*inode_alloc_security) (struct inode *inode);
@@ -1733,7 +1761,7 @@
 int security_sysctl(struct ctl_table *table, int op);
 int security_quotactl(int cmds, int type, int id, struct super_block *sb);
 int security_quota_on(struct dentry *dentry);
-int security_syslog(int type);
+int security_syslog(int type, bool from_file);
 int security_settime(struct timespec *ts, struct timezone *tz);
 int security_vm_enough_memory(long pages);
 int security_vm_enough_memory_mm(struct mm_struct *mm, long pages);
@@ -1979,9 +2007,9 @@
 	return 0;
 }
 
-static inline int security_syslog(int type)
+static inline int security_syslog(int type, bool from_file)
 {
-	return cap_syslog(type);
+	return cap_syslog(type, from_file);
 }
 
 static inline int security_settime(struct timespec *ts, struct timezone *tz)
@@ -2952,6 +2980,10 @@
 		       struct dentry *new_dentry);
 int security_path_rename(struct path *old_dir, struct dentry *old_dentry,
 			 struct path *new_dir, struct dentry *new_dentry);
+int security_path_chmod(struct dentry *dentry, struct vfsmount *mnt,
+			mode_t mode);
+int security_path_chown(struct path *path, uid_t uid, gid_t gid);
+int security_path_chroot(struct path *path);
 #else	/* CONFIG_SECURITY_PATH */
 static inline int security_path_unlink(struct path *dir, struct dentry *dentry)
 {
@@ -3001,6 +3033,23 @@
 {
 	return 0;
 }
+
+static inline int security_path_chmod(struct dentry *dentry,
+				      struct vfsmount *mnt,
+				      mode_t mode)
+{
+	return 0;
+}
+
+static inline int security_path_chown(struct path *path, uid_t uid, gid_t gid)
+{
+	return 0;
+}
+
+static inline int security_path_chroot(struct path *path)
+{
+	return 0;
+}
 #endif	/* CONFIG_SECURITY_PATH */
 
 #ifdef CONFIG_KEYS
--- linux-mvl-dove-2.6.32.orig/include/linux/jbd2.h
+++ linux-mvl-dove-2.6.32/include/linux/jbd2.h
@@ -653,6 +653,7 @@
 	 * waiting for it to finish.
 	 */
 	unsigned int t_synchronous_commit:1;
+	unsigned int t_flushed_data_blocks:1;
 
 	/*
 	 * For use by the filesystem to store fs-specific data
--- linux-mvl-dove-2.6.32.orig/include/linux/miscdevice.h
+++ linux-mvl-dove-2.6.32/include/linux/miscdevice.h
@@ -12,6 +12,9 @@
 #define APOLLO_MOUSE_MINOR	7
 #define PC110PAD_MINOR		9
 /*#define ADB_MOUSE_MINOR	10	FIXME OBSOLETE */
+
+#define CRYPTODEV_MINOR              70
+#define CESADEV_MINOR  71
 #define WATCHDOG_MINOR		130	/* Watchdog timer     */
 #define TEMP_MINOR		131	/* Temperature Sensor */
 #define RTC_MINOR		135
--- linux-mvl-dove-2.6.32.orig/include/linux/time.h
+++ linux-mvl-dove-2.6.32/include/linux/time.h
@@ -148,6 +148,7 @@
 
 extern struct timespec timespec_trunc(struct timespec t, unsigned gran);
 extern int timekeeping_valid_for_hres(void);
+extern u64 timekeeping_max_deferment(void);
 extern void update_wall_time(void);
 extern void update_xtime_cache(u64 nsec);
 extern void timekeeping_leap_insert(int leapsecond);
--- linux-mvl-dove-2.6.32.orig/include/linux/irq.h
+++ linux-mvl-dove-2.6.32/include/linux/irq.h
@@ -400,7 +400,9 @@
 
 /* Dynamic irq helper functions */
 extern void dynamic_irq_init(unsigned int irq);
+void dynamic_irq_init_keep_chip_data(unsigned int irq);
 extern void dynamic_irq_cleanup(unsigned int irq);
+void dynamic_irq_cleanup_keep_chip_data(unsigned int irq);
 
 /* Set/get chip/data for an IRQ: */
 extern int set_irq_chip(unsigned int irq, struct irq_chip *chip);
--- linux-mvl-dove-2.6.32.orig/include/linux/bma020.h
+++ linux-mvl-dove-2.6.32/include/linux/bma020.h
@@ -0,0 +1,1164 @@
+/*  $Date: 2007/08/07 16:04:54 $
+ *  $Revision: 1.4 $
+ *
+ */
+
+
+/** \mainpage BMA020 Acceleration Sensor API
+ * Copyright (C) 2007 Bosch Sensortec GmbH
+ *  \section intro_sec Introduction
+ * BMA020 3-axis digital Accelerometer Programming Interface
+ * The BMA020 API enables quick access to Bosch Sensortec's 3-Axis digital accelerometer.
+ * The only mandatory steps are: 
+ *
+ * 1. linking the target application's communication functions to the API (\ref BMA020_WR_FUNC_PTR, \ref BMA020_RD_FUNC_PTR)
+ *
+ * 2. calling the bma020_init() routine, which initializes all necessary data structures for using all functions
+ *
+ * Author: Lars.Beseke@bosch-sensortec.com
+ *
+ * 
+ * \section disclaimer_sec Disclaimer
+ *
+ *
+ *
+ * Common:
+ * Bosch Sensortec products are developed for the consumer goods industry. They may only be used 
+ * within the parameters of the respective valid product data sheet.  Bosch Sensortec products are 
+ * provided with the express understanding that there is no warranty of fitness for a particular purpose. 
+ * They are not fit for use in life-sustaining, safety or security sensitive systems or any system or device 
+ * that may lead to bodily harm or property damage if the system or device malfunctions. In addition, 
+ * Bosch Sensortec products are not fit for use in products which interact with motor vehicle systems.  
+ * The resale and/or use of products are at the purchaser’s own risk and his own responsibility. The 
+ * examination of fitness for the intended use is the sole responsibility of the Purchaser. 
+ *
+ * The purchaser shall indemnify Bosch Sensortec from all third party claims, including any claims for 
+ * incidental, or consequential damages, arising from any product use not covered by the parameters of 
+ * the respective valid product data sheet or not approved by Bosch Sensortec and reimburse Bosch 
+ * Sensortec for all costs in connection with such claims.
+ *
+ * The purchaser must monitor the market for the purchased products, particularly with regard to 
+ * product safety and inform Bosch Sensortec without delay of all security relevant incidents.
+ *
+ * Engineering Samples are marked with an asterisk (*) or (e). Samples may vary from the valid 
+ * technical specifications of the product series. They are therefore not intended or fit for resale to third 
+ * parties or for use in end products. Their sole purpose is internal client testing. The testing of an 
+ * engineering sample may in no way replace the testing of a product series. Bosch Sensortec 
+ * assumes no liability for the use of engineering samples. By accepting the engineering samples, the 
+ * Purchaser agrees to indemnify Bosch Sensortec from all claims arising from the use of engineering 
+ * samples.
+ *
+ * Special:
+ * This software module (hereinafter called "Software") and any information on application-sheets 
+ * (hereinafter called "Information") is provided free of charge for the sole purpose to support your 
+ * application work. The Software and Information is subject to the following terms and conditions: 
+ *
+ * The Software is specifically designed for the exclusive use for Bosch Sensortec products by 
+ * personnel who have special experience and training. Do not use this Software if you do not have the 
+ * proper experience or training. 
+ *
+ * This Software package is provided `` as is `` and without any expressed or implied warranties, 
+ * including without limitation, the implied warranties of merchantability and fitness for a particular 
+ * purpose. 
+ *
+ * Bosch Sensortec and their representatives and agents deny any liability for the functional impairment 
+ * of this Software in terms of fitness, performance and safety. Bosch Sensortec and their 
+ * representatives and agents shall not be liable for any direct or indirect damages or injury, except as 
+ * otherwise stipulated in mandatory applicable law.
+ * 
+ * The Information provided is believed to be accurate and reliable. Bosch Sensortec assumes no 
+ * responsibility for the consequences of use of such Information nor for any infringement of patents or 
+ * other rights of third parties which may result from its use. No license is granted by implication or 
+ * otherwise under any patent or patent rights of Bosch. Specifications mentioned in the Information are 
+ * subject to change without notice.
+ *
+ * It is not allowed to deliver the source code of the Software to any third party without permission of 
+ * Bosch Sensortec.
+ */
+
+ /** \file bma020.h
+    \brief Header file for all #define constants and function prototypes
+  
+    
+*/
+
+
+
+#ifndef __BMA020_H__
+#define __BMA020_H__
+
+/** BMA020 acceleration data 
+	\brief Structure containing acceleration values for x,y and z-axis in signed short
+
+*/
+
+typedef struct  {
+		short x, /**< holds x-axis acceleration data sign extended. Range -512 to 511. */
+			  y, /**< holds y-axis acceleration data sign extended. Range -512 to 511. */
+			  z; /**< holds z-axis acceleration data sign extended. Range -512 to 511. */
+} bma020acc_t;
+
+#ifdef __KERNEL__
+
+/* BMA020 Macro for read and write commincation */
+
+
+/**
+   define for used read and write macros 
+*/
+
+
+/** Define the calling convention of YOUR bus communication routine.
+	\note This includes types of parameters. This example shows the configuration for an SPI bus link.
+
+	If your communication function looks like this:
+
+	write_my_bus_xy(unsigned char device_addr, unsigned char register_addr, unsigned char * data, unsigned char length);
+
+	The BMA020_WR_FUNC_PTR would equal:
+
+    #define	BMA020_WR_FUNC_PTR char (* bus_write)(unsigned char, unsigned char, unsigned char *, unsigned char)
+	
+	Parameters can be mixed as needed refer to the \ref BMA020_BUS_WRITE_FUNC  macro.
+	
+
+*/
+
+#define BMA020_WR_FUNC_PTR char (* bus_write)(unsigned char, unsigned char, unsigned char *, unsigned char)
+
+//#define BMA020_WR_FUNC_PTR char (* bus_write)(unsigned char, unsigned char *, unsigned char)
+
+
+/** link makro between API function calls and bus write function
+	\note The bus write function can change since this is a system dependant issue.
+
+	If the bus_write parameter calling order is like: reg_addr, reg_data, wr_len it would be as it is here.
+
+	If the parameters are differently ordered or your communication function like I2C need to know the device address, 
+	you can change this macro accordingly.
+
+
+	define BMA020_BUS_WRITE_FUNC(dev_addr, reg_addr, reg_data, wr_len)\
+           bus_write(dev_addr, reg_addr, reg_data, wr_len)
+
+    This macro lets all API functions call YOUR communication routine in a way that equals your definition in the \ref BMA020_WR_FUNC_PTR definition.
+
+
+	      
+*/
+#define BMA020_BUS_WRITE_FUNC(dev_addr, reg_addr, reg_data, wr_len)\
+           bus_write(reg_addr, reg_addr, reg_data, wr_len)
+
+
+/** Define the calling convention of YOUR bus communication routine.
+	\note This includes types of parameters. This example shows the configuration for an SPI bus link.
+
+	If your communication function looks like this:
+
+	read_my_bus_xy(unsigned char device_addr, unsigned char register_addr, unsigned char * data, unsigned char length);
+
+	The BMA020_RD_FUNC_PTR would equal:
+
+    #define	BMA020_RD_FUNC_PTR char (* bus_read)(unsigned char, unsigned char, unsigned char *, unsigned char)
+	
+	Parameters can be mixed as needed refer to the \ref BMA020_BUS_READ_FUNC  macro.
+	
+
+*/
+
+#define BMA020_SPI_RD_MASK 0x80   /* for spi read transactions on SPI the MSB has to be set */
+#define BMA020_RD_FUNC_PTR char (* bus_read)( unsigned char, unsigned char, unsigned char *, unsigned char)
+
+
+/** link makro between API function calls and bus read function
+	\note The bus write function can change since this is a system dependant issue.
+
+	If the bus_read parameter calling order is like: reg_addr, reg_data, wr_len it would be as it is here.
+
+	If the parameters are differently ordered or your communication function like I2C need to know the device address, 
+	you can change this macro accordingly.
+
+
+	define BMA020_BUS_READ_FUNC(dev_addr, reg_addr, reg_data, wr_len)\
+           bus_read(dev_addr, reg_addr, reg_data, wr_len)
+
+    This macro lets all API functions call YOUR communication routine in a way that equals your definition in the \ref BMA020_WR_FUNC_PTR definition.
+
+	\note: this macro also includes the "MSB='1'" for reading BMA020 addresses. 
+      
+*/
+#define BMA020_BUS_READ_FUNC(dev_addr, reg_addr, reg_data, r_len)\
+           bus_read(dev_addr, reg_addr, reg_data, r_len)
+
+
+//##
+
+//#define acc_sensor_write_bytes		i2c_bma020_write_buf
+//#define acc_sensor_read_bytes 		i2c_bma020_read_buf	
+
+#define acc_sensor_write_bytes		//i2c_bma020_write_buf
+#define acc_sensor_read_bytes 		//i2c_bma020_read_buf	
+
+/** BMA020 I2C Address
+*/
+
+#define BMA020_I2C_ADDR		0x38
+//#define BMA020_I2C_ADDR			0x38
+
+/*
+	BMA020 API error codes
+*/
+
+#define E_BMA_NULL_PTR		(char)-127
+#define E_COMM_RES		    (char)-1
+#define E_OUT_OF_RANGE		(char)-2
+
+
+/* 
+ *	
+ *	register definitions 	
+ *
+ */
+
+#define CHIP_ID_REG			0x00
+#define VERSION_REG			0x01
+#define X_AXIS_LSB_REG		0x02
+#define X_AXIS_MSB_REG		0x03
+#define Y_AXIS_LSB_REG		0x04
+#define Y_AXIS_MSB_REG		0x05
+#define Z_AXIS_LSB_REG		0x06
+#define Z_AXIS_MSB_REG		0x07
+#define TEMP_RD_REG			0x08
+#define BMA020_STATUS_REG	0x09
+#define BMA020_CTRL_REG		0x0a
+#define BMA020_CONF1_REG	0x0b
+#define LG_THRESHOLD_REG	0x0c
+#define LG_DURATION_REG		0x0d
+#define HG_THRESHOLD_REG	0x0e
+#define HG_DURATION_REG		0x0f
+#define MOTION_THRS_REG		0x10
+#define HYSTERESIS_REG		0x11
+#define CUSTOMER1_REG		0x12
+#define CUSTOMER2_REG		0x13
+#define RANGE_BWIDTH_REG	0x14
+#define BMA020_CONF2_REG	0x15
+
+#define OFFS_GAIN_X_REG		0x16
+#define OFFS_GAIN_Y_REG		0x17
+#define OFFS_GAIN_Z_REG		0x18
+#define OFFS_GAIN_T_REG		0x19
+#define OFFSET_X_REG		0x1a
+#define OFFSET_Y_REG		0x1b
+#define OFFSET_Z_REG		0x1c
+#define OFFSET_T_REG		0x1d
+
+
+
+
+
+/** BMA020 image registers data structure
+	\brief Register type that contains all BMA020 image registers from address 0x0b to 0x15
+	This structure can hold the complete image data of BMA020
+
+*/
+
+typedef struct  {
+		unsigned char	
+		bma020_conf1 ,  /**<  image address 0x0b: interrupt enable bits, low-g settings */
+		lg_threshold,	/**<  image address 0x0c: low-g threshold, depends on selected g-range */
+		lg_duration,	/**<  image address 0x0d: low-g duration in ms */
+		hg_threshold,	/**<  image address 0x0e: high-g threshold, depends on selected g-range */
+		hg_duration,	/**<  image address 0x0f: high-g duration in ms */
+		motion_thrs,	/**<  image address 0x10: any motion threshold */
+		hysteresis,		/**<  image address 0x11: low-g and high-g hysteresis register */
+		customer1,		/**<  image address 0x12: customer reserved register 1 */
+		customer2,		/**<  image address 0x13: customer reserved register 2  */
+		range_bwidth,	/**<  image address 0x14: range and bandwidth selection register */
+		bma020_conf2;	/**<  image address 0x15: spi4, latched interrupt, auto-wake-up configuration */
+} bma020regs_t;
+
+
+
+/** bma020 typedef structure
+	\brief This structure holds all relevant information about BMA020 and links communication to the 
+*/
+#define BUF_LEN		(20*1)
+
+
+typedef struct {
+	struct input_polled_dev *bma020_idev;
+
+	struct cdev bma_cdev;
+	int app_major;			//major node no.
+
+	int gpio;					//gpio pin for g-sensor's interrupt wire
+	wait_queue_head_t  int_wait;
+	
+	struct work_struct irq_work;
+
+	bma020acc_t mem[BUF_LEN];		//data buffer 
+	bma020regs_t * image;	/**< pointer to bma020regs_t structure not mandatory */
+	unsigned char mode;		/**< save current BMA020 operation mode */
+	unsigned char chip_id,	/**< save BMA020's chip id which has to be 0x02 after calling bma020_init() */
+				  ml_version, /**< holds the BMA020 ML_version number */	
+				  al_version; /**< holds the BMA020 AL_version number */
+	unsigned char dev_addr;   /**< initializes BMA020's I2C device address 0x38 */
+	unsigned char int_mask;	  /**< stores the current BMA020 API generated interrupt mask */
+	BMA020_WR_FUNC_PTR;		  /**< function pointer to the SPI/I2C write function */
+	BMA020_RD_FUNC_PTR;		  /**< function pointer to the SPI/I2C read function */
+} bma020_t;
+
+
+/* 
+ *	
+ *	bit slice positions in registers
+ *
+ */
+
+/** \cond BITSLICE */
+
+#define CHIP_ID__POS		0
+#define CHIP_ID__MSK		0x07
+#define CHIP_ID__LEN		3
+#define CHIP_ID__REG		CHIP_ID_REG
+
+
+#define ML_VERSION__POS		0
+#define ML_VERSION__LEN		4
+#define ML_VERSION__MSK		0x0F
+#define ML_VERSION__REG		VERSION_REG
+
+
+
+#define AL_VERSION__POS  	4
+#define AL_VERSION__LEN  	4
+#define AL_VERSION__MSK		0xF0
+#define AL_VERSION__REG		VERSION_REG
+
+
+/* DATA REGISTERS */
+
+
+#define NEW_DATA_X__POS  	0
+#define NEW_DATA_X__LEN  	1
+#define NEW_DATA_X__MSK  	0x01
+#define NEW_DATA_X__REG		X_AXIS_LSB_REG
+
+#define ACC_X_LSB__POS   	6
+#define ACC_X_LSB__LEN   	2
+#define ACC_X_LSB__MSK		0xC0
+#define ACC_X_LSB__REG		X_AXIS_LSB_REG
+
+#define ACC_X_MSB__POS   	0
+#define ACC_X_MSB__LEN   	8
+#define ACC_X_MSB__MSK		0xFF
+#define ACC_X_MSB__REG		X_AXIS_MSB_REG
+
+#define NEW_DATA_Y__POS  	0
+#define NEW_DATA_Y__LEN  	1
+#define NEW_DATA_Y__MSK  	0x01
+#define NEW_DATA_Y__REG		Y_AXIS_LSB_REG
+
+#define ACC_Y_LSB__POS   	6
+#define ACC_Y_LSB__LEN   	2
+#define ACC_Y_LSB__MSK   	0xC0
+#define ACC_Y_LSB__REG		Y_AXIS_LSB_REG
+
+#define ACC_Y_MSB__POS   	0
+#define ACC_Y_MSB__LEN   	8
+#define ACC_Y_MSB__MSK   	0xFF
+#define ACC_Y_MSB__REG		Y_AXIS_MSB_REG
+
+#define NEW_DATA_Z__POS  	0
+#define NEW_DATA_Z__LEN  	1
+#define NEW_DATA_Z__MSK		0x01
+#define NEW_DATA_Z__REG		Z_AXIS_LSB_REG
+
+#define ACC_Z_LSB__POS   	6
+#define ACC_Z_LSB__LEN   	2
+#define ACC_Z_LSB__MSK		0xC0
+#define ACC_Z_LSB__REG		Z_AXIS_LSB_REG
+
+#define ACC_Z_MSB__POS   	0
+#define ACC_Z_MSB__LEN   	8
+#define ACC_Z_MSB__MSK		0xFF
+#define ACC_Z_MSB__REG		Z_AXIS_MSB_REG
+
+
+
+
+
+
+/* STATUS BITS */
+
+#define STATUS_HG__POS		0
+#define STATUS_HG__LEN		1
+#define STATUS_HG__MSK		0x01
+#define STATUS_HG__REG		BMA020_STATUS_REG
+
+#define STATUS_LG__POS		1
+#define STATUS_LG__LEN		1
+#define STATUS_LG__MSK		0x02
+#define STATUS_LG__REG		BMA020_STATUS_REG
+
+#define HG_LATCHED__POS  	2
+#define HG_LATCHED__LEN  	1
+#define HG_LATCHED__MSK		0x04
+#define HG_LATCHED__REG		BMA020_STATUS_REG
+
+#define LG_LATCHED__POS		3
+#define LG_LATCHED__LEN		1
+#define LG_LATCHED__MSK		8
+#define LG_LATCHED__REG		BMA020_STATUS_REG
+
+#define ALERT_PHASE__POS	4
+#define ALERT_PHASE__LEN	1
+#define ALERT_PHASE__MSK	0x10
+#define ALERT_PHASE__REG	BMA020_STATUS_REG
+
+
+#define ST_RESULT__POS		7
+#define ST_RESULT__LEN		1
+#define ST_RESULT__MSK		0x80
+#define ST_RESULT__REG		BMA020_STATUS_REG
+
+
+/* CONTROL BITS */
+
+#define SLEEP__POS			0
+#define SLEEP__LEN			1
+#define SLEEP__MSK			0x01
+#define SLEEP__REG			BMA020_CTRL_REG
+
+#define SOFT_RESET__POS		1
+#define SOFT_RESET__LEN		1
+#define SOFT_RESET__MSK		0x02
+#define SOFT_RESET__REG		BMA020_CTRL_REG
+
+
+
+
+
+#define SELF_TEST__POS		2
+#define SELF_TEST__LEN		2
+#define SELF_TEST__MSK		0x0C
+#define SELF_TEST__REG		BMA020_CTRL_REG
+
+
+
+
+#define SELF_TEST0__POS		2
+#define SELF_TEST0__LEN		1
+#define SELF_TEST0__MSK		0x04
+#define SELF_TEST0__REG		BMA020_CTRL_REG
+
+#define SELF_TEST1__POS		3
+#define SELF_TEST1__LEN		1
+#define SELF_TEST1__MSK		0x08
+#define SELF_TEST1__REG		BMA020_CTRL_REG
+
+
+
+#define RESET_INT__POS		6
+#define RESET_INT__LEN		1
+#define RESET_INT__MSK		0x40
+#define RESET_INT__REG		BMA020_CTRL_REG
+
+
+
+/* LOW-G, HIGH-G settings */
+
+
+
+#define ENABLE_LG__POS		0
+#define ENABLE_LG__LEN		1
+#define ENABLE_LG__MSK		0x01
+#define ENABLE_LG__REG		BMA020_CONF1_REG
+
+
+
+
+#define ENABLE_HG__POS		1
+#define ENABLE_HG__LEN		1
+#define ENABLE_HG__MSK		0x02
+#define ENABLE_HG__REG		BMA020_CONF1_REG
+
+
+/* LG/HG counter */
+
+	
+
+#define COUNTER_LG__POS			2
+#define COUNTER_LG__LEN			2
+#define COUNTER_LG__MSK			0x0C
+#define COUNTER_LG__REG			BMA020_CONF1_REG
+	
+#define COUNTER_HG__POS			4
+#define COUNTER_HG__LEN			2
+#define COUNTER_HG__MSK			0x30
+#define COUNTER_HG__REG			BMA020_CONF1_REG
+
+
+
+
+/* LG/HG duration is in ms */
+
+#define LG_DUR__POS			0
+#define LG_DUR__LEN			8
+#define LG_DUR__MSK			0xFF
+#define LG_DUR__REG			LG_DURATION_REG
+
+#define HG_DUR__POS			0
+#define HG_DUR__LEN			8
+#define HG_DUR__MSK			0xFF
+#define HG_DUR__REG			HG_DURATION_REG
+
+
+
+
+				
+
+#define LG_THRES__POS		0
+#define LG_THRES__LEN		8
+#define LG_THRES__MSK		0xFF
+#define LG_THRES__REG		LG_THRESHOLD_REG
+
+
+
+
+
+#define HG_THRES__POS		0
+#define HG_THRES__LEN		8
+#define HG_THRES__MSK		0xFF
+#define HG_THRES__REG		HG_THRESHOLD_REG
+
+
+
+
+
+
+
+
+#define LG_HYST__POS			0
+#define LG_HYST__LEN			3
+#define LG_HYST__MSK			0x07
+#define LG_HYST__REG			HYSTERESIS_REG
+
+
+
+
+#define HG_HYST__POS			3
+#define HG_HYST__LEN			3
+#define HG_HYST__MSK			0x38
+#define HG_HYST__REG			HYSTERESIS_REG
+
+
+/* ANY MOTION and ALERT settings */
+
+#define EN_ANY_MOTION__POS		6
+#define EN_ANY_MOTION__LEN		1
+#define EN_ANY_MOTION__MSK		0x40
+#define EN_ANY_MOTION__REG		BMA020_CONF1_REG
+
+
+/* ALERT settings */
+
+
+#define ALERT__POS			7
+#define ALERT__LEN			1
+#define ALERT__MSK			0x80
+#define ALERT__REG			BMA020_CONF1_REG
+
+
+/* ANY MOTION Duration */
+
+
+
+
+#define ANY_MOTION_THRES__POS	0
+#define ANY_MOTION_THRES__LEN	8
+#define ANY_MOTION_THRES__MSK	0xFF
+#define ANY_MOTION_THRES__REG	MOTION_THRS_REG
+
+
+
+
+#define ANY_MOTION_DUR__POS		6
+#define ANY_MOTION_DUR__LEN		2
+#define ANY_MOTION_DUR__MSK		0xC0	
+#define ANY_MOTION_DUR__REG		HYSTERESIS_REG
+
+
+#define CUSTOMER_RESERVED1__POS		0
+#define CUSTOMER_RESERVED1__LEN	 	8
+#define CUSTOMER_RESERVED1__MSK		0xFF
+#define CUSTOMER_RESERVED1__REG		CUSTOMER1_REG
+
+#define CUSTOMER_RESERVED2__POS		0
+#define CUSTOMER_RESERVED2__LEN	 	8
+#define CUSTOMER_RESERVED2__MSK		0xFF
+#define CUSTOMER_RESERVED2__REG		CUSTOMER2_REG
+
+
+
+/* BANDWIDTH dependend definitions */
+
+#define BANDWIDTH__POS				0
+#define BANDWIDTH__LEN			 	3
+#define BANDWIDTH__MSK			 	0x07
+#define BANDWIDTH__REG				RANGE_BWIDTH_REG
+
+
+
+
+/* RANGE */
+
+#define RANGE__POS				3
+#define RANGE__LEN				2
+#define RANGE__MSK				0x18	
+#define RANGE__REG				RANGE_BWIDTH_REG
+
+
+/* WAKE UP */
+
+
+
+#define WAKE_UP__POS			0
+#define WAKE_UP__LEN			1
+#define WAKE_UP__MSK			0x01
+#define WAKE_UP__REG			BMA020_CONF2_REG
+
+
+
+
+#define WAKE_UP_PAUSE__POS		1
+#define WAKE_UP_PAUSE__LEN		2
+#define WAKE_UP_PAUSE__MSK		0x06
+#define WAKE_UP_PAUSE__REG		BMA020_CONF2_REG
+
+
+/* ACCELERATION DATA SHADOW */
+
+
+
+#define SHADOW_DIS__POS			3
+#define SHADOW_DIS__LEN			1
+#define SHADOW_DIS__MSK			0x08
+#define SHADOW_DIS__REG			BMA020_CONF2_REG
+
+
+/* LATCH Interrupt */
+
+
+
+#define LATCH_INT__POS			4
+#define LATCH_INT__LEN			1
+#define LATCH_INT__MSK			0x10
+#define LATCH_INT__REG			BMA020_CONF2_REG
+
+/* new data interrupt */
+
+
+#define NEW_DATA_INT__POS		5
+#define NEW_DATA_INT__LEN		1
+#define NEW_DATA_INT__MSK		0x20
+#define NEW_DATA_INT__REG		BMA020_CONF2_REG
+
+
+
+#define ENABLE_ADV_INT__POS		6
+#define ENABLE_ADV_INT__LEN		1
+#define ENABLE_ADV_INT__MSK		0x40
+#define ENABLE_ADV_INT__REG		BMA020_CONF2_REG
+
+//
+//#define BMA020_SPI4_OFF	0
+//#define BMA020_SPI4_ON	1
+//
+//#define SPI4__POS				7
+//#define SPI4__LEN				1
+//#define SPI4__MSK				0x80
+//#define SPI4__REG				BMA020_CONF2_REG
+//
+#define GAIN_X__POS			0
+#define GAIN_X__LEN			6
+#define GAIN_X__MSK			0x3f
+#define GAIN_X__REG			OFFS_GAIN_X_REG
+
+
+#define GAIN_Y__POS			0
+#define GAIN_Y__LEN			6
+#define GAIN_Y__MSK			0x3f
+#define GAIN_Y__REG			OFFS_GAIN_Y_REG
+
+
+#define GAIN_Z__POS			0
+#define GAIN_Z__LEN			6
+#define GAIN_Z__MSK			0x3f
+#define GAIN_Z__REG			OFFS_GAIN_Z_REG
+
+#define OFFSET_T_LSB__POS	6
+#define OFFSET_T_LSB__LEN	2
+#define OFFSET_T_LSB__MSK	0xC0
+#define OFFSET_T_LSB__REG	OFFS_GAIN_T_REG
+
+#define GAIN_T__POS			0
+#define GAIN_T__LEN			6
+#define GAIN_T__MSK			0x3f
+#define GAIN_T__REG			OFFS_GAIN_T_REG
+
+#define OFFSET_X_MSB__POS	0
+#define OFFSET_X_MSB__LEN	8
+#define OFFSET_X_MSB__MSK	0xFF
+#define OFFSET_X_MSB__REG	OFFSET_X_REG
+
+
+#define OFFSET_Y_MSB__POS	0
+#define OFFSET_Y_MSB__LEN	8
+#define OFFSET_Y_MSB__MSK	0xFF
+#define OFFSET_Y_MSB__REG	OFFSET_Y_REG
+
+#define OFFSET_Z_MSB__POS	0
+#define OFFSET_Z_MSB__LEN	8
+#define OFFSET_Z_MSB__MSK	0xFF
+#define OFFSET_Z_MSB__REG	OFFSET_Z_REG
+
+#define OFFSET_T_MSB__POS	0
+#define OFFSET_T_MSB__LEN	8
+#define OFFSET_T_MSB__MSK	0xFF
+#define OFFSET_T_MSB__REG	OFFSET_T_REG
+
+
+
+
+
+#define BMA020_GET_BITSLICE(regvar, bitname)\
+			(regvar & bitname##__MSK) >> bitname##__POS
+
+
+#define BMA020_SET_BITSLICE(regvar, bitname, val)\
+		  (regvar & ~bitname##__MSK) | ((val<<bitname##__POS)&bitname##__MSK)  
+
+
+/** \endcond */
+
+#endif
+
+
+
+
+
+
+
+
+
+
+
+
+/* CONSTANTS */
+
+
+/* range and bandwidth */
+
+#define BMA020_RANGE_2G			0 /**< sets range to 2G mode \see bma020_set_range() */
+#define BMA020_RANGE_4G			1 /**< sets range to 4G mode \see bma020_set_range() */
+#define BMA020_RANGE_8G			2 /**< sets range to 8G mode \see bma020_set_range() */
+
+
+#define BMA020_BW_25HZ		0	/**< sets bandwidth to 25HZ \see bma020_set_bandwidth() */
+#define BMA020_BW_50HZ		1	/**< sets bandwidth to 50HZ \see bma020_set_bandwidth() */
+#define BMA020_BW_100HZ		2	/**< sets bandwidth to 100HZ \see bma020_set_bandwidth() */
+#define BMA020_BW_190HZ		3	/**< sets bandwidth to 190HZ \see bma020_set_bandwidth() */
+#define BMA020_BW_375HZ		4	/**< sets bandwidth to 375HZ \see bma020_set_bandwidth() */
+#define BMA020_BW_750HZ		5	/**< sets bandwidth to 750HZ \see bma020_set_bandwidth() */
+#define BMA020_BW_1500HZ	6	/**< sets bandwidth to 1500HZ \see bma020_set_bandwidth() */
+
+/* mode settings */
+
+#define BMA020_MODE_NORMAL      0
+#define BMA020_MODE_SLEEP       2
+#define BMA020_MODE_WAKE_UP     3
+
+/* wake up */
+
+#define BMA020_WAKE_UP_PAUSE_20MS		0
+#define BMA020_WAKE_UP_PAUSE_80MS		1
+#define BMA020_WAKE_UP_PAUSE_320MS		2
+#define BMA020_WAKE_UP_PAUSE_2560MS		3
+
+
+/* LG/HG thresholds are in LSB and depend on RANGE setting */
+/* no range check on threshold calculation */
+
+#define BMA020_SELF_TEST0_ON		1
+#define BMA020_SELF_TEST1_ON		3
+
+#define BMA020_EE_W_OFF			0
+#define BMA020_EE_W_ON			1
+
+
+
+/* low-g, high-g, any_motion */
+
+
+#define BMA020_COUNTER_LG_RST		0
+#define BMA020_COUNTER_LG_0LSB		BMA020_COUNTER_LG_RST
+#define BMA020_COUNTER_LG_1LSB		1
+#define BMA020_COUNTER_LG_2LSB		2
+#define BMA020_COUNTER_LG_3LSB		3
+
+#define BMA020_COUNTER_HG_RST		0
+#define BMA020_COUNTER_HG_0LSB		BMA020_COUNTER_HG_RST
+#define BMA020_COUNTER_HG_1LSB		1
+#define BMA020_COUNTER_HG_2LSB		2
+#define BMA020_COUNTER_HG_3LSB		3
+
+#define BMA020_COUNTER_RST			0
+#define BMA020_COUNTER_0LSB			BMA020_COUNTER_RST
+#define BMA020_COUNTER_1LSB			1
+#define BMA020_COUNTER_2LSB			2
+#define BMA020_COUNTER_3LSB			3
+
+
+
+/** Macro to convert floating point low-g-thresholds in G to 8-bit register values.<br>
+  * Example: BMA020_LG_THRES_IN_G( 0.3, 2.0) generates the register value for 0.3G threshold in 2G mode.
+  * \brief convert g-values to 8-bit value
+ */
+#define BMA020_LG_THRES_IN_G( gthres, range)			((int)((256 * gthres ) / range))
+
+/** Macro to convert floating point high-g-thresholds in G to 8-bit register values.<br>
+  * Example: BMA020_HG_THRES_IN_G( 1.4, 2.0) generates the register value for 1.4G threshold in 2G mode.
+  * \brief convert g-values to 8-bit value
+ */
+#define BMA020_HG_THRES_IN_G(gthres, range)				((int)((256 * gthres ) / range))
+
+/** Macro to convert floating point low-g-hysteresis in G to 3-bit register values.<br>
+  * Example: BMA020_LG_HYST_THRES_IN_G( 0.2, 2.0) generates the register value for 0.2G threshold in 2G mode.
+  * \brief convert g-values to 8-bit value
+ */
+#define BMA020_LG_HYST_IN_G( ghyst, range )				((int)((8 * ghyst) / range))
+
+/** Macro to convert floating point high-g-hysteresis in G to 3-bit register values.<br>
+  * Example: BMA020_HG_HYST_THRES_IN_G( 0.2, 2.0) generates the register value for 0.2G threshold in 2G mode.
+  * \brief convert g-values to 8-bit value
+ */
+#define BMA020_HG_HYST_IN_G( ghyst, range )				((int)((8 * ghyst) / range))
+
+
+/** Macro to convert floating point G-thresholds to 8-bit register values<br>
+  * Example: BMA020_ANY_MOTION_THRES_IN_G( 1.2, 2.0) generates the register value for 1.2G threshold in 2G mode.
+  * \brief convert g-values to 8-bit value
+ */
+
+#define BMA020_ANY_MOTION_THRES_IN_G( gthres, range)		((int)((256 * gthres ) / range))
+
+
+#define BMA020_ANY_MOTION_DUR_1		0
+#define BMA020_ANY_MOTION_DUR_3		1
+#define BMA020_ANY_MOTION_DUR_5		2
+#define BMA020_ANY_MOTION_DUR_7		3
+
+
+
+#define BMA020_SHADOW_DIS_OFF	0
+#define BMA020_SHADOW_DIS_ON	1
+
+#define BMA020_LATCH_INT_OFF	0
+#define BMA020_LATCH_INT_ON		1
+
+#define BMA020_NEW_DATA_INT_OFF	0
+#define BMA020_NEW_DATA_INT_ON	1
+
+#define BMA020_ENABLE_ADV_INT_OFF	0
+#define BMA020_ENABLE_ADV_INT_ON	1
+
+#define BMA020_EN_ANY_MOTION_OFF 	0
+#define BMA020_EN_ANY_MOTION_ON 	1
+
+
+#define BMA020_ALERT_OFF	0
+#define BMA020_ALERT_ON		1
+
+#define BMA020_ENABLE_LG_OFF	0
+#define BMA020_ENABLE_LG_ON		1
+
+#define BMA020_ENABLE_HG_OFF	0
+#define BMA020_ENABLE_HG_ON		1
+
+
+
+#define BMA020_INT_ALERT		(1<<7)
+#define BMA020_INT_ANY_MOTION	(1<<6)
+#define BMA020_INT_EN_ADV_INT	(1<<5)
+#define BMA020_INT_NEW_DATA		(1<<4)
+#define BMA020_INT_LATCH		(1<<3)
+#define BMA020_INT_HG			(1<<1)
+#define BMA020_INT_LG			(1<<0)
+
+
+#define BMA020_INT_STATUS_HG			(1<<0)
+#define BMA020_INT_STATUS_LG			(1<<1)
+#define BMA020_INT_STATUS_HG_LATCHED	(1<<2)
+#define BMA020_INT_STATUS_LG_LATCHED	(1<<3)
+#define BMA020_INT_STATUS_ALERT			(1<<4)
+#define BMA020_INT_STATUS_ST_RESULT		(1<<7)
+
+
+#define BMA020_CONF1_INT_MSK	((1<<ALERT__POS) | (1<<EN_ANY_MOTION__POS) | (1<<ENABLE_HG__POS) | (1<<ENABLE_LG__POS))
+#define BMA020_CONF2_INT_MSK	((1<<ENABLE_ADV_INT__POS) | (1<<NEW_DATA_INT__POS) | (1<<LATCH_INT__POS))
+
+
+
+
+
+
+
+
+#ifdef __KERNEL__
+
+/* Function prototypes */
+
+/*
+
+
+int bma020_init(bma020_t *);
+
+int bma020_soft_reset(void); 
+int bma020_selftest(unsigned char);
+
+int bma020_get_selftest_result(unsigned char *);
+
+int bma020_set_range(char); 
+
+int bma020_get_range(unsigned char*);
+
+int bma020_set_mode(unsigned char); 
+
+unsigned char bma020_get_mode(void);
+
+int bma020_set_wake_up_pause(unsigned char);
+
+int bma020_get_wake_up_pause(unsigned char *);
+
+int bma020_set_bandwidth(char);
+
+int bma020_get_bandwidth(unsigned char *);
+
+int bma020_set_low_g_threshold(unsigned char);
+
+int bma020_get_low_g_threshold(unsigned char*);
+
+int bma020_set_low_g_hysteresis(unsigned char);
+
+int bma020_set_low_g_countdown(unsigned char);
+
+int bma020_get_low_g_countdown(unsigned char *);
+
+int bma020_get_low_g_hysteresis(unsigned char*);
+
+int bma020_set_low_g_duration(unsigned char);
+
+int bma020_get_low_g_duration(unsigned char*);
+
+int bma020_set_high_g_threshold(unsigned char);
+
+int bma020_get_high_g_threshold(unsigned char*);
+
+int bma020_set_high_g_hysteresis(unsigned char);
+
+int bma020_set_high_g_countdown(unsigned char);
+
+int bma020_get_high_g_countdown(unsigned char *);
+
+int bma020_get_high_g_hysteresis(unsigned char*);
+
+int bma020_set_high_g_duration(unsigned char);
+
+int bma020_get_high_g_duration(unsigned char*);
+
+int bma020_set_any_motion_threshold(unsigned char);
+
+int bma020_get_any_motion_threshold(unsigned char*);
+
+int bma020_set_any_motion_count(unsigned char);
+
+int bma020_get_any_motion_count(unsigned char *);
+
+int bma020_read_accel_x(short *);
+
+int bma020_read_accel_y(short *);
+
+int bma020_read_accel_z(short *);
+
+
+int bma020_read_accel_xyz(bma020acc_t *);
+
+int bma020_get_interrupt_status(unsigned char *);
+
+int bma020_reset_interrupt(void);
+
+int bma020_set_interrupt_mask(unsigned char);
+
+int bma020_get_interrupt_mask(unsigned char *);
+
+int bma020_set_low_g_int(unsigned char);
+
+int bma020_set_high_g_int(unsigned char);
+
+int bma020_set_any_motion_int(unsigned char);
+
+int bma020_set_alert_int(unsigned char);
+
+int bma020_set_advanced_int(unsigned char);
+
+int bma020_latch_int(unsigned char);
+
+int bma020_set_new_data_int(unsigned char onoff);
+
+
+int bma020_read_reg(unsigned char , unsigned char *, unsigned char);
+
+int bma020_write_reg(unsigned char , unsigned char*, unsigned char );
+
+*/
+static int __devinit bma020_i2c_probe(struct i2c_client *client, const struct i2c_device_id *);
+//static int __devinit bma020_probe(struct spi_device *spi);
+static int __devexit bma020_i2c_remove(struct i2c_client*);
+//static int __devexit bma020_remove(struct spi_device *spi);
+
+#endif
+
+
+
+
+
+//****************************************************************************************************//
+//****************************************************************************************************//
+
+/* IOCTL Command macro */
+
+#define		SET_RST		(0x01)
+
+#define		SET_NORMAL	(0x08)
+
+//return BMA020_MODE_NORMAL, BMA020_MODE_SLEEP, BMA020_MODE_WAKE_UP
+#define		GET_MODE		(0x02)
+
+
+#define		SET_SLEEP		(0x03)
+
+//para BMA020_WAKE_UP_PAUSE_20MS, BMA020_WAKE_UP_PAUSE_80MS, BMA020_WAKE_UP_PAUSE_320MS, BMA020_WAKE_UP_PAUSE_2560MS
+#define		SET_WAKEUP_DUR		(0x04)
+
+#define		SET_AUTO_WAKEUP		(0x05)
+
+//return BMA020_RANGE_2G;BMA020_RANGE_4G;BMA020_RANGE_8G
+#define		GET_G			(0x06)
+
+//para BMA020_RANGE_2G;BMA020_RANGE_4G;BMA020_RANGE_8G
+#define		SET_G			(0x07)
+
+//return BMA020_BW_25HZ, BMA020_BW_50HZ, BMA020_BW_100HZ, BMA020_BW_190HZ, BMA020_BW_375HZ, BMA020_BW_750HZ, BMA020_BW_1500HZ
+#define		GET_BANDWIDTH		(0x09)
+
+//para BMA020_BW_25HZ, BMA020_BW_50HZ, BMA020_BW_100HZ, BMA020_BW_190HZ, BMA020_BW_375HZ, BMA020_BW_750HZ, BMA020_BW_1500HZ
+#define		SET_BANDWIDTH		(0x0A)
+
+
+//BMA020_WAKE_UP_PAUSE_20MS, BMA020_WAKE_UP_PAUSE_80MS, BMA020_WAKE_UP_PAUSE_320MS, BMA020_WAKE_UP_PAUSE_2560MS
+#define		GET_WAKEUP_DUR		(0x40)
+
+//ref to BMA020_LG_THRES_IN_G()
+#define SET_LOW_G_THRESHOULD		(0x20)
+ 
+#define GET_LOW_G_THRESHOULD		(0x21)
+
+#define SET_LOW_G_COUNTDOWN			(0x22)
+
+#define GET_LOW_G_COUNTDOWN			(0x23)
+
+
+#define SET_HIGH_G_COUNTDOWN		(0x24)
+
+#define GET_HIGH_G_COUNTDOWN		(0x25)
+
+#define SET_LOW_G_DUR						(0x26)
+
+#define GET_LOW_G_DUR						(0x27)
+
+//BMA020_HG_THRES_IN_G()   
+#define SET_HIGH_G_THRESHOULD		(0x28)
+
+#define GET_HIGH_G_THRESHOULD		(0x29)
+
+#define SET_HIGH_G_DUR						(0x42)
+
+#define GET_HIGH_G_DUR						(0x43)
+
+//BMA020_ANY_MOTION_THRES_IN_G()
+#define SET_ANY_MOTION_THRESHOULD		(0x2C)
+
+//BMA020_ANY_MOTION_THRES_IN_G()
+#define GET_ANY_MOTION_THRESHOULD		(0x2D)
+
+//BMA020_ANY_MOTION_DUR_1, BMA020_ANY_MOTION_DUR_3, BMA020_ANY_MOTION_DUR_5, BMA020_ANY_MOTION_DUR_7
+#define SET_ANY_MOTION_COUNT		(0x2E)
+
+//BMA020_ANY_MOTION_DUR_1, BMA020_ANY_MOTION_DUR_3, BMA020_ANY_MOTION_DUR_5, BMA020_ANY_MOTION_DUR_7
+#define GET_ANY_MOTION_COUNT		(0x2F)
+
+
+//BMA020_INT_ALERT, BMA020_INT_ANY_MOTION, BMA020_INT_EN_ADV_INT, BMA020_INT_NEW_DATA, BMA020_INT_LATCH, BMA020_INT_HG, BMA020_INT_LG
+//#define SET_INTERRUPT_MASK			(0x30)
+
+//BMA020_INT_ALERT, BMA020_INT_ANY_MOTION, BMA020_INT_EN_ADV_INT, BMA020_INT_NEW_DATA, BMA020_INT_LATCH, BMA020_INT_HG, BMA020_INT_LG
+//#define GET_INTERRUPT_MASK			(0x31)
+
+//resets the BMA020 interrupt status, can be used to reset a latched interrupt
+#define RESET_INT						(0x32)
+
+// X,Y and Z-axis acceleration data readout, ref bma020acc_t structure for x,y,z data readout
+#define READ_ACCEL_XYZ			(0x33)
+
+//BMA020_INT_STATUS_HG, BMA020_INT_STATUS_LG, BMA020_INT_STATUS_HG_LATCHED, BMA020_INT_STATUS_LG_LATCHED, BMA020_INT_STATUS_ALERT, BMA020_INT_STATUS_ST_RESULT
+#define GET_INT_STATUS		(0x34)
+
+//param onoff, enable=1, disable=0
+#define SET_LOW_G_INT			(0x35)
+
+//param onoff enable=1, disable=0
+#define SET_HIGH_G_INT		(0x36)
+
+//param onoff enable=1, disable=0
+#define SET_ANY_MOTION_INT		(0x37)
+
+//param onoff enable=1, disable=0
+#define SET_ADVANCED_INT		(0x38)
+
+//param latched (=1 for latched interrupts), (=0 for unlatched interrupts)
+#define LATCH_INT				(0x39)
+
+//param onoff enable=1, disable=0
+#define SET_NEW_DATA_INT			(0x3A)
+
+
+
+#define WAIT_FOR_INT 			(0x3B)
+
+#define SET_LOW_G_HYST			(0x44)
+#define SET_HIGH_G_HYST			(0x45)
+
+//general usage for simplicity
+#define enable	(1)
+#define disable	(0)
+
+
+
+
+#endif   // __BMA020_H__
+
+
+
+
+
--- linux-mvl-dove-2.6.32.orig/include/linux/android_alarm.h
+++ linux-mvl-dove-2.6.32/include/linux/android_alarm.h
@@ -0,0 +1,62 @@
+/* include/linux/android_alarm.h
+ *
+ * Copyright (C) 2006-2007 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef _LINUX_ANDROID_ALARM_H
+#define _LINUX_ANDROID_ALARM_H
+
+#include <linux/ioctl.h>
+#include <linux/time.h>
+
+enum android_alarm_type {
+	/* return code bit numbers or set alarm arg */
+	ANDROID_ALARM_RTC_WAKEUP,
+	ANDROID_ALARM_RTC,
+	ANDROID_ALARM_ELAPSED_REALTIME_WAKEUP,
+	ANDROID_ALARM_ELAPSED_REALTIME,
+	ANDROID_ALARM_SYSTEMTIME,
+
+	ANDROID_ALARM_TYPE_COUNT,
+
+	/* return code bit numbers */
+	/* ANDROID_ALARM_TIME_CHANGE = 16 */
+};
+
+enum android_alarm_return_flags {
+	ANDROID_ALARM_RTC_WAKEUP_MASK = 1U << ANDROID_ALARM_RTC_WAKEUP,
+	ANDROID_ALARM_RTC_MASK = 1U << ANDROID_ALARM_RTC,
+	ANDROID_ALARM_ELAPSED_REALTIME_WAKEUP_MASK =
+				1U << ANDROID_ALARM_ELAPSED_REALTIME_WAKEUP,
+	ANDROID_ALARM_ELAPSED_REALTIME_MASK =
+				1U << ANDROID_ALARM_ELAPSED_REALTIME,
+	ANDROID_ALARM_SYSTEMTIME_MASK = 1U << ANDROID_ALARM_SYSTEMTIME,
+	ANDROID_ALARM_TIME_CHANGE_MASK = 1U << 16
+};
+
+/* Disable alarm */
+#define ANDROID_ALARM_CLEAR(type)           _IO('a', 0 | ((type) << 4))
+
+/* Ack last alarm and wait for next */
+#define ANDROID_ALARM_WAIT                  _IO('a', 1)
+
+#define ALARM_IOW(c, type, size)            _IOW('a', (c) | ((type) << 4), size)
+/* Set alarm */
+#define ANDROID_ALARM_SET(type)             ALARM_IOW(2, type, struct timespec)
+#define ANDROID_ALARM_SET_AND_WAIT(type)    ALARM_IOW(3, type, struct timespec)
+#define ANDROID_ALARM_GET_TIME(type)        ALARM_IOW(4, type, struct timespec)
+#define ANDROID_ALARM_SET_RTC               _IOW('a', 5, struct timespec)
+#define ANDROID_ALARM_BASE_CMD(cmd)         (cmd & ~(_IOC(0, 0, 0xf0, 0)))
+#define ANDROID_ALARM_IOCTL_TO_TYPE(cmd)    (_IOC_NR(cmd) >> 4)
+
+#endif
--- linux-mvl-dove-2.6.32.orig/include/linux/pagemap.h
+++ linux-mvl-dove-2.6.32/include/linux/pagemap.h
@@ -253,6 +253,8 @@
 extern struct page * read_cache_page(struct address_space *mapping,
 				pgoff_t index, filler_t *filler,
 				void *data);
+extern struct page * read_cache_page_gfp(struct address_space *mapping,
+				pgoff_t index, gfp_t gfp_mask);
 extern int read_cache_pages(struct address_space *mapping,
 		struct list_head *pages, filler_t *filler, void *data);
 
--- linux-mvl-dove-2.6.32.orig/include/linux/if_pppopns.h
+++ linux-mvl-dove-2.6.32/include/linux/if_pppopns.h
@@ -0,0 +1,34 @@
+/* include/linux/if_pppopns.h
+ *
+ * Header for PPP on PPTP Network Server / PPPoPNS Socket (RFC 2637)
+ *
+ * Copyright (C) 2009 Google, Inc.
+ * Author: Chia-chi Yeh <chiachi@android.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __LINUX_IF_PPPOPNS_H
+#define __LINUX_IF_PPPOPNS_H
+
+#include <linux/socket.h>
+#include <linux/types.h>
+
+#define PX_PROTO_OPNS	3
+
+struct sockaddr_pppopns {
+	sa_family_t	sa_family;	/* AF_PPPOX */
+	unsigned int	sa_protocol;	/* PX_PROTO_OPNS */
+	int		tcp_socket;
+	__u16		local;
+	__u16		remote;
+} __attribute__((packed));
+
+#endif /* __LINUX_IF_PPPOPNS_H */
--- linux-mvl-dove-2.6.32.orig/include/linux/compat.h
+++ linux-mvl-dove-2.6.32/include/linux/compat.h
@@ -309,5 +309,7 @@
 asmlinkage long compat_sys_openat(unsigned int dfd, const char __user *filename,
 				  int flags, int mode);
 
+extern void __user *compat_alloc_user_space(unsigned long len);
+
 #endif /* CONFIG_COMPAT */
 #endif /* _LINUX_COMPAT_H */
--- linux-mvl-dove-2.6.32.orig/include/linux/klist.h
+++ linux-mvl-dove-2.6.32/include/linux/klist.h
@@ -22,7 +22,7 @@
 	struct list_head	k_list;
 	void			(*get)(struct klist_node *);
 	void			(*put)(struct klist_node *);
-} __attribute__ ((aligned (4)));
+} __attribute__ ((aligned (sizeof(void *))));
 
 #define KLIST_INIT(_name, _get, _put)					\
 	{ .k_lock	= __SPIN_LOCK_UNLOCKED(_name.k_lock),		\
--- linux-mvl-dove-2.6.32.orig/include/linux/fb.h
+++ linux-mvl-dove-2.6.32/include/linux/fb.h
@@ -784,8 +784,6 @@
 #define FBINFO_MISC_USEREVENT          0x10000 /* event request
 						  from userspace */
 #define FBINFO_MISC_TILEBLITTING       0x20000 /* use tile blitting */
-#define FBINFO_MISC_FIRMWARE           0x40000 /* a replaceable firmware
-						  inited framebuffer */
 
 /* A driver may set this flag to indicate that it does want a set_par to be
  * called every time when fbcon_switch is executed. The advantage is that with
@@ -799,6 +797,8 @@
  */
 #define FBINFO_MISC_ALWAYS_SETPAR   0x40000
 
+/* where the fb is a firmware driver, and can be replaced with a proper one */
+#define FBINFO_MISC_FIRMWARE        0x80000
 /*
  * Host and GPU endianness differ.
  */
--- linux-mvl-dove-2.6.32.orig/include/linux/rt5611_ts.h
+++ linux-mvl-dove-2.6.32/include/linux/rt5611_ts.h
@@ -0,0 +1,210 @@
+#ifndef _RT5611_TS_H
+#define _RT5611_TS_H
+
+
+#include <sound/core.h>
+#include <sound/ac97_codec.h>
+#include <sound/soc.h>
+#include <sound/initval.h>
+#include <linux/types.h>
+#include <linux/list.h>
+#include <linux/input.h>	
+#include <linux/platform_device.h>
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/version.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/string.h>
+#include <linux/proc_fs.h>
+#include <linux/pm.h>
+#include <linux/interrupt.h>
+#include <linux/bitops.h>
+#include <linux/workqueue.h>
+#include <linux/uaccess.h>
+#include <linux/io.h>
+#define MAX_CONVERSIONS 					10
+#define AC97_LINK_FRAME 					21 // 1 frame=20.8us
+#define MAX_ADC_VAL						0xFFF //12-bit
+
+/* The returned sample is valid */
+#define RC_VALID			0x0001
+/* More data is available; call the sample gathering function again */
+#define RC_AGAIN		0x0002
+/* The pen is up (the first RC_VALID without RC_PENUP means pen is down) */
+#define RC_PENUP		0x0004
+
+
+#define RT5611_ID1 	0x10EC  //vendor ID
+#define RT5611_ID2 	0x1003 //device ID
+
+
+#define RT_TP_ENABLE		1 
+#define RT_TP_DISABLE		0 
+
+
+#define RT_ADC_X					0x0001
+#define RT_ADC_Y					0x0002
+#define RT_ADC_P					0x0003
+#define RT_PD_CTRL_STAT					0X26			//POWER DOWN CONTROL/STATUS
+
+#define RT_PWR_MANAG_ADD1				0X3A			//POWER MANAGMENT ADDITION 1
+#define RT_PWR_MANAG_ADD2				0X3C			//POWER MANAGMENT ADDITION 2
+#define RT_GPIO_PIN_CONFIG				0X4C			//GPIO PIN CONFIGURATION
+#define RT_GPIO_PIN_POLARITY			0X4E			//GPIO PIN POLARITY/TYPE	
+#define RT_GPIO_PIN_STICKY				0X50			//GPIO PIN STICKY	
+#define RT_GPIO_PIN_WAKEUP				0X52			//GPIO PIN WAKE UP
+#define RT_GPIO_PIN_STATUS				0X54			//GPIO PIN STATUS
+#define RT_GPIO_PIN_SHARING				0X56			//GPIO PIN SHARING
+#define RT_OVER_TEMP_CURR_STATUS		0X58			//OVER TEMPERATURE AND CURRENT STATUS
+#define RT_GPIO_OUT_CTRL				0X5C			//GPIO OUTPUT PIN CONTRL
+#define RT_MISC_CTRL					0X5E			//MISC CONTROL
+#define RT_TP_CTRL_BYTE1				0X74			//TOUCH PANEL CONTROL BYTE 1
+#define RT_TP_CTRL_BYTE2				0X76			//TOUCH PANEL CONTROL BYTE 2
+#define RT_TP_INDICATION				0X78			//TOUCH PANEL INDICATION
+#define RT_VENDOR_ID1	  		    	0x7C			//VENDOR ID1
+#define RT_VENDOR_ID2	  		    	0x7E			//VENDOR ID2
+
+//Define bit of GPIO function
+#define	RT_GPIO_BIT0				0x0001				
+#define	RT_GPIO_BIT1				0x0002				//GPIO 1 Control/Status	
+#define	RT_GPIO_BIT2				0x0004				//GPIO 2 Control/Status	
+#define	RT_GPIO_BIT3				0x0008				//GPIO 3 Control/Status	
+#define	RT_GPIO_BIT4				0x0010				//GPIO 4 Control/Status	
+#define	RT_GPIO_BIT5				0x0020				//GPIO 5 Control/Status
+#define	RT_GPIO_BIT6				0x0040				
+#define	RT_GPIO_BIT7				0x0080
+#define	RT_GPIO_BIT8				0x0100
+#define	RT_GPIO_BIT9				0x0200				//MICBIAS2 Control/Status
+#define	RT_GPIO_BIT10				0x0400				//MICBIAS1 Control/Status
+#define	RT_GPIO_BIT11				0x0800				//Over temperature Control/Status
+#define	RT_GPIO_BIT12				0x1000				
+#define	RT_GPIO_BIT13				0x2000				//Pen down detect Control/Status
+#define	RT_GPIO_BIT14				0x4000
+#define	RT_GPIO_BIT15				0x8000
+
+//Power Down CTRL/STATUS  (0x26),0:Normal,1:Power Down
+#define PD_CTRL_VREF				(0x1<<11)
+#define PD_CTRL_ADC					(0x1<<8)
+#define PD_CTRL_STATUS_VREF		(0x1<<3)
+#define PD_CTRL_STATUS_ADC		(0x1<<0)
+
+
+//Power managment addition 1 (0x3A),0:Disable,1:Enable
+#define PWR_MAIN_BIAS				(0x1<<1)
+#define PWR_IP_ENA					(0x1<<12)
+	
+
+//Power managment addition 2(0x3C),0:Disable,1:Enable
+#define PWR_MIXER_VREF				(0x1<<13)
+#define PWR_TP_ADC					(0x1<<11)
+
+//Pin Sharing(0x56)
+#define GPIO2_PIN_SHARING_MASK		(0x03<<2)	//GPIO2 Pin sharing mask
+#define GPIO2_PIN_SHARING_IRQ		(0x00<<2)	//IRQ out
+#define GPIO2_PIN_SHARING_GPIO		(0x01<<2)	//GPIO enable	
+#define GPIO2_PIN_SHARING_IR		(0x10<<2)	//IR out	
+
+//MISC CONTROL(0x5E)
+#define GPIO_WAKEUP_CTRL			(0x01<<1)	//Enable GPIO wakeup Control
+#define IRQOUT_INVERT_CTRL			(0x01	)	//IRQOUT inverter control
+
+//Touch Panel Control Byte 1(0x74)
+#define POW_TP_CTRL_MASK			(0x3<<14)
+#define POW_TP_CTRL_0				(0x0<<14)	//All off
+#define POW_TP_CTRL_1				(0x1<<14)	//Aux_ADC off,pen down detect with wake_up,Aux_ADC on with pen down
+#define POW_TP_CTRL_2				(0x2<<14)	//Aux_ADC off,pen down detect on without wake up 
+#define POW_TP_CTRL_3				(0x3<<14)	//AUX_ADC on,pen down detect on
+
+#define CB1_PRES_CURR_MASK		(0x000f<<10)//Presusure measurement source current
+#define CB1_PRES_CURR_OFF			(0x0000<<10)//OFF	
+#define CB1_PRES_CURR_25UA			(0x0001<<10)//25uA
+#define CB1_PRES_CURR_50UA			(0x0002<<10)//50uA
+#define CB1_PRES_CURR_375UA		(0x000f<<10)//375uA
+
+
+#define CB1_PDPOL					(0x0001<<9)	//Pendown polarity 0:non-inverted 1:inverted
+
+#define	CB1_DEL_MASK				(0x0003<<7)		//touch panel measure delay mask
+#define	CB1_DEL_4F					(0x0000<<7)		//delay 4 frames
+#define	CB1_DEL_8F					(0x0001<<7)		//delay 8 frames	
+#define	CB1_DEL_16F				(0x0002<<7)		//delay 16 frames
+#define	CB1_DEL_32F				(0x0003<<7)		//delay 32 frames
+
+#define CB1_SLOT_READBACK			(0x0001<<6)		//Enable slot realback
+
+#define CB1_SLOT_SEL				(0x0001<<5)		//AC97 SLOT select 0:Slot5 1:Slot6
+
+#define CB1_CLK_DIV_MASK			(0x0007<<2)		//AUX_ADC Clock Divider MASK
+#define CB1_CLK_DIV64				(0x0003<<2)		//AUX_ADC Clock divide	64
+#define CB1_CLK_DIV80				(0x0004<<2)		//AUX_ADC Clock divide	80
+#define CB1_CLK_DIV96				(0x0005<<2)		//AUX_ADC Clock divide	96
+#define CB1_CLK_DIV112				(0x0006<<2)		//AUX_ADC Clock divide 	112
+#define CB1_CLK_DIV128				(0x0007<<2)		//AUX_ADC Clock divide 	128
+
+#define CB1_CR_MASK					(0x0003<<0)		//Conversion rate Mask
+#define CB1_CR0						(0x0000<<0)		//	 93.75Hz,512 frame
+#define CB1_CR1						(0x0001<<0)		//	124.67Hz,384 frame
+#define CB1_CR2						(0x0002<<0)		//	187.5 Hz,256 frame
+#define CB1_CR3						(0x0003<<0)		//	374.0 Hz,128 frame
+
+#define CB1_DEFALT 					0x008C
+
+//Touch Panel Control Byte 2(0x76)
+
+#define CB2_POLL_TRIG				(0x0001<<15)		//write 1 initiaties a measurement in polling mode.
+
+#define CB2_MODE_SEL				(0x0001<<14)		//0:Polling mode  1:Continuous mode
+
+#define CB2_PPR_MASK				(0x003f<<8)		//internal Pull-up resistor for pen-down detection MASK
+#define CB2_PPR_1					(0x0000<<8)		// 1k	Ohm
+#define CB2_PPR_2					(0x0001<<8)		// 2k	Ohm
+#define CB2_PPR_3					(0x0002<<8)		// 3k	Ohm
+#define CB2_PPR_64					(0x003f<<8)		//64k	Ohm
+
+
+#define CB2_AUX_EN					(0x0001<<7)			//AUX measument enable/disable
+	
+#define	CB2_PRESSURE_EN			(0x0001<<3)			//Presure measurement enable/disable
+#define	CB2_Y_EN					(0x0001<<2)			//Y measurement enable/disable
+#define	CB2_X_EN					(0x0001<<1)			//X measurement enable/disable
+#define   CB2_AUX_SEL				(0x0001)			//AUX3/AUX4 measure selection	
+
+#define CB2_DEFALT 					0x3F00
+
+//Touch Panel Indication(0x78)
+#define CB3_PD_STATUS				(0x0001<<15)		//pendown status after reading 
+
+#define CB3_ADCSRC_MASK			(0x0007<<12)
+#define CB3_ADCSRC_NON				(0x0000)			//No Data
+#define CB3_ADCSRC_X				(0x1000)			//X co-ordinate measurement
+#define CB3_ADCSRC_Y				(0x2000)			//Y co-ordinate measurement
+#define CB3_ADCSRC_PRE				(0x3000)			//Pressure measurement
+#define CB3_ADCSRC_AUX				(0x7000)			//AUX	measurement
+
+#define CB3_ADC_DATA				(0x0FFF)			//AUX_ADC Data Report
+
+struct  rt5611_ts_data {
+    int x;
+    int y;
+    int p;
+};
+
+struct rt5611_ts {
+	u16 id;
+	u16 cb[2],pm, misc,gpio[6];		/* Cached registers */
+	struct input_dev *input_dev;	/* touchscreen input device */
+	struct snd_soc_codec *codec;
+	struct device *dev;		/* ALSA device */
+	struct delayed_work ts_reader;  /* Used to poll touchscreen */
+	unsigned long ts_reader_interval; /* Current interval for timer */
+	unsigned long ts_reader_min_interval; /* Minimum interval */
+	unsigned int pen_irq;		/* Pen IRQ number in use */
+	struct workqueue_struct *ts_workq;
+	struct work_struct pen_event_work;
+	unsigned pen_is_down:1;		/* Pen is down */
+	u16 suspend_mode;               /* PRP in suspend mode */
+};
+
+#endif
--- linux-mvl-dove-2.6.32.orig/include/linux/kernel_debugger.h
+++ linux-mvl-dove-2.6.32/include/linux/kernel_debugger.h
@@ -0,0 +1,41 @@
+/*
+ * include/linux/kernel_debugger.h
+ *
+ * Copyright (C) 2008 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _LINUX_KERNEL_DEBUGGER_H_
+#define _LINUX_KERNEL_DEBUGGER_H_
+
+struct kdbg_ctxt {
+	int (*printf)(void *cookie, const char *fmt, ...);
+	void *cookie;
+};
+
+/* kernel_debugger() is called from IRQ context and should
+ * use the kdbg_ctxt.printf to write output (do NOT call
+ * printk, do operations not safe from IRQ context, etc).
+ *
+ * kdbg_ctxt.printf will return -1 if there is not enough
+ * buffer space or if you are being aborted.  In this case
+ * you must return as soon as possible.
+ *
+ * Return non-zero if more data is available -- if buffer
+ * space ran and you had to stop, but could print more,
+ * for example.
+ *
+ * Additional calls where cmd is "more" will be made if
+ * the additional data is desired.
+ */
+int kernel_debugger(struct kdbg_ctxt *ctxt, char *cmd);
+
+#endif
--- linux-mvl-dove-2.6.32.orig/include/linux/poison.h
+++ linux-mvl-dove-2.6.32/include/linux/poison.h
@@ -2,13 +2,25 @@
 #define _LINUX_POISON_H
 
 /********** include/linux/list.h **********/
+
+/*
+ * Architectures might want to move the poison pointer offset
+ * into some well-recognized area such as 0xdead000000000000,
+ * that is also not mappable by user-space exploits:
+ */
+#ifdef CONFIG_ILLEGAL_POINTER_VALUE
+# define POISON_POINTER_DELTA _AC(CONFIG_ILLEGAL_POINTER_VALUE, UL)
+#else
+# define POISON_POINTER_DELTA 0
+#endif
+
 /*
  * These are non-NULL pointers that will result in page faults
  * under normal circumstances, used to verify that nobody uses
  * non-initialized list entries.
  */
-#define LIST_POISON1  ((void *) 0x00100100)
-#define LIST_POISON2  ((void *) 0x00200200)
+#define LIST_POISON1  ((void *) 0x00100100 + POISON_POINTER_DELTA)
+#define LIST_POISON2  ((void *) 0x00200200 + POISON_POINTER_DELTA)
 
 /********** include/linux/timer.h **********/
 /*
@@ -36,6 +48,15 @@
 #define POISON_FREE	0x6b	/* for use-after-free poisoning */
 #define	POISON_END	0xa5	/* end-byte of poisoning */
 
+/********** mm/hugetlb.c **********/
+/*
+ * Private mappings of hugetlb pages use this poisoned value for
+ * page->mapping. The core VM should not be doing anything with this mapping
+ * but futex requires the existence of some page->mapping value even though it
+ * is unused if PAGE_MAPPING_ANON is set.
+ */
+#define HUGETLB_POISON	((void *)(0x00300300 + POISON_POINTER_DELTA + PAGE_MAPPING_ANON))
+
 /********** arch/$ARCH/mm/init.c **********/
 #define POISON_FREE_INITMEM	0xcc
 
--- linux-mvl-dove-2.6.32.orig/include/linux/sched.h
+++ linux-mvl-dove-2.6.32/include/linux/sched.h
@@ -145,7 +145,6 @@
 
 
 extern void calc_global_load(void);
-extern u64 cpu_nr_migrations(int cpu);
 
 extern unsigned long get_parent_ip(unsigned long addr);
 
@@ -379,6 +378,9 @@
 arch_get_unmapped_area(struct file *, unsigned long, unsigned long,
 		       unsigned long, unsigned long);
 extern unsigned long
+arch_get_unmapped_exec_area(struct file *, unsigned long, unsigned long,
+		       unsigned long, unsigned long);
+extern unsigned long
 arch_get_unmapped_area_topdown(struct file *filp, unsigned long addr,
 			  unsigned long len, unsigned long pgoff,
 			  unsigned long flags);
@@ -628,6 +630,9 @@
 	cputime_t utime, stime, cutime, cstime;
 	cputime_t gtime;
 	cputime_t cgtime;
+#ifndef CONFIG_VIRT_CPU_ACCOUNTING
+	cputime_t prev_utime, prev_stime;
+#endif
 	unsigned long nvcsw, nivcsw, cnvcsw, cnivcsw;
 	unsigned long min_flt, maj_flt, cmin_flt, cmaj_flt;
 	unsigned long inblock, oublock, cinblock, coublock;
@@ -726,14 +731,6 @@
 	uid_t uid;
 	struct user_namespace *user_ns;
 
-#ifdef CONFIG_USER_SCHED
-	struct task_group *tg;
-#ifdef CONFIG_SYSFS
-	struct kobject kobj;
-	struct delayed_work work;
-#endif
-#endif
-
 #ifdef CONFIG_PERF_EVENTS
 	atomic_long_t locked_vm;
 #endif
@@ -864,7 +861,10 @@
 	if (sched_smt_power_savings)
 		return SD_POWERSAVINGS_BALANCE;
 
-	return SD_PREFER_SIBLING;
+	if (!sched_mc_power_savings)
+		return SD_PREFER_SIBLING;
+
+	return 0;
 }
 
 static inline int sd_balance_for_package_power(void)
@@ -897,6 +897,7 @@
 	 * single CPU.
 	 */
 	unsigned int cpu_power;
+	unsigned int group_weight;
 
 	/*
 	 * The CPUs this group covers.
@@ -995,6 +996,7 @@
 	char *name;
 #endif
 
+	unsigned int span_weight;
 	/*
 	 * Span of all CPUs in this domain.
 	 *
@@ -1066,7 +1068,8 @@
 struct sched_class {
 	const struct sched_class *next;
 
-	void (*enqueue_task) (struct rq *rq, struct task_struct *p, int wakeup);
+	void (*enqueue_task) (struct rq *rq, struct task_struct *p, int wakeup,
+			      bool head);
 	void (*dequeue_task) (struct rq *rq, struct task_struct *p, int sleep);
 	void (*yield_task) (struct rq *rq);
 
@@ -1076,7 +1079,8 @@
 	void (*put_prev_task) (struct rq *rq, struct task_struct *p);
 
 #ifdef CONFIG_SMP
-	int  (*select_task_rq)(struct task_struct *p, int sd_flag, int flags);
+	int  (*select_task_rq)(struct rq *rq, struct task_struct *p,
+			       int sd_flag, int flags);
 
 	unsigned long (*load_balance) (struct rq *this_rq, int this_cpu,
 			struct rq *busiest, unsigned long max_load_move,
@@ -1088,7 +1092,8 @@
 			      enum cpu_idle_type idle);
 	void (*pre_schedule) (struct rq *this_rq, struct task_struct *task);
 	void (*post_schedule) (struct rq *this_rq);
-	void (*task_wake_up) (struct rq *this_rq, struct task_struct *task);
+	void (*task_waking) (struct rq *this_rq, struct task_struct *task);
+	void (*task_woken) (struct rq *this_rq, struct task_struct *task);
 
 	void (*set_cpus_allowed)(struct task_struct *p,
 				 const struct cpumask *newmask);
@@ -1099,7 +1104,7 @@
 
 	void (*set_curr_task) (struct rq *rq);
 	void (*task_tick) (struct rq *rq, struct task_struct *p, int queued);
-	void (*task_new) (struct rq *rq, struct task_struct *p);
+	void (*task_fork) (struct task_struct *p);
 
 	void (*switched_from) (struct rq *this_rq, struct task_struct *task,
 			       int running);
@@ -1108,10 +1113,11 @@
 	void (*prio_changed) (struct rq *this_rq, struct task_struct *task,
 			     int oldprio, int running);
 
-	unsigned int (*get_rr_interval) (struct task_struct *task);
+	unsigned int (*get_rr_interval) (struct rq *rq,
+					 struct task_struct *task);
 
 #ifdef CONFIG_FAIR_GROUP_SCHED
-	void (*moved_group) (struct task_struct *p);
+	void (*task_move_group) (struct task_struct *p, int on_rq);
 #endif
 };
 
@@ -1172,7 +1178,6 @@
 	u64			nr_failed_migrations_running;
 	u64			nr_failed_migrations_hot;
 	u64			nr_forced_migrations;
-	u64			nr_forced2_migrations;
 
 	u64			nr_wakeups;
 	u64			nr_wakeups_sync;
@@ -1354,7 +1359,7 @@
 	char comm[TASK_COMM_LEN]; /* executable name excluding path
 				     - access with [gs]et_task_comm (which lock
 				       it with task_lock())
-				     - initialized normally by flush_old_exec */
+				     - initialized normally by setup_new_exec */
 /* file system info */
 	int link_count, total_link_count;
 #ifdef CONFIG_SYSVIPC
@@ -1538,7 +1543,6 @@
 	/* bitmask of trace recursion */
 	unsigned long trace_recursion;
 #endif /* CONFIG_TRACING */
-	unsigned long stack_start;
 };
 
 /* Future-safe accessor for struct task_struct's cpus_allowed. */
@@ -1723,12 +1727,12 @@
 extern cputime_t task_utime(struct task_struct *p);
 extern cputime_t task_stime(struct task_struct *p);
 extern cputime_t task_gtime(struct task_struct *p);
+extern void thread_group_times(struct task_struct *p, cputime_t *ut, cputime_t *st);
 
 /*
  * Per process flags
  */
-#define PF_ALIGNWARN	0x00000001	/* Print alignment warning msgs */
-					/* Not implemented yet, only for 486*/
+#define PF_KSOFTIRQD	0x00000001	/* I am ksoftirqd */
 #define PF_STARTING	0x00000002	/* being created */
 #define PF_EXITING	0x00000004	/* getting shut down */
 #define PF_EXITPIDONE	0x00000008	/* pi exit done on shut down */
@@ -1865,6 +1869,19 @@
  */
 extern unsigned long long cpu_clock(int cpu);
 
+#ifdef CONFIG_IRQ_TIME_ACCOUNTING
+/*
+ * An i/f to runtime opt-in for irq time accounting based off of sched_clock.
+ * The reason for this explicit opt-in is not to have perf penalty with
+ * slow sched_clocks.
+ */
+extern void enable_sched_clock_irqtime(void);
+extern void disable_sched_clock_irqtime(void);
+#else
+static inline void enable_sched_clock_irqtime(void) {}
+static inline void disable_sched_clock_irqtime(void) {}
+#endif
+
 extern unsigned long long
 task_sched_runtime(struct task_struct *task);
 extern unsigned long long thread_group_sched_runtime(struct task_struct *task);
@@ -1880,6 +1897,7 @@
 extern void sched_clock_idle_wakeup_event(u64 delta_ns);
 
 #ifdef CONFIG_HOTPLUG_CPU
+extern void move_task_off_dead_cpu(int dead_cpu, struct task_struct *p);
 extern void idle_task_exit(void);
 #else
 static inline void idle_task_exit(void) {}
@@ -2086,11 +2104,18 @@
 	return info <= SEND_SIG_FORCED;
 }
 
-/* True if we are on the alternate signal stack.  */
-
+/*
+ * True if we are on the alternate signal stack.
+ */
 static inline int on_sig_stack(unsigned long sp)
 {
-	return (sp - current->sas_ss_sp < current->sas_ss_size);
+#ifdef CONFIG_STACK_GROWSUP
+	return sp >= current->sas_ss_sp &&
+		sp - current->sas_ss_sp < current->sas_ss_size;
+#else
+	return sp > current->sas_ss_sp &&
+		sp - current->sas_ss_sp <= current->sas_ss_size;
+#endif
 }
 
 static inline int sas_ss_flags(unsigned long sp)
@@ -2392,9 +2417,9 @@
 
 extern int __cond_resched_softirq(void);
 
-#define cond_resched_softirq() ({				\
-	__might_sleep(__FILE__, __LINE__, SOFTIRQ_OFFSET);	\
-	__cond_resched_softirq();				\
+#define cond_resched_softirq() ({					\
+	__might_sleep(__FILE__, __LINE__, SOFTIRQ_DISABLE_OFFSET);	\
+	__cond_resched_softirq();					\
 })
 
 /*
@@ -2483,13 +2508,9 @@
 
 extern void normalize_rt_tasks(void);
 
-#ifdef CONFIG_GROUP_SCHED
+#ifdef CONFIG_CGROUP_SCHED
 
 extern struct task_group init_task_group;
-#ifdef CONFIG_USER_SCHED
-extern struct task_group root_task_group;
-extern void set_tg_uid(struct user_struct *user);
-#endif
 
 extern struct task_group *sched_create_group(struct task_group *parent);
 extern void sched_destroy_group(struct task_group *tg);
@@ -2576,6 +2597,28 @@
 
 #define TASK_STATE_TO_CHAR_STR "RSDTtZX"
 
+static inline unsigned long task_rlimit(const struct task_struct *tsk,
+		unsigned int limit)
+{
+	return ACCESS_ONCE(tsk->signal->rlim[limit].rlim_cur);
+}
+
+static inline unsigned long task_rlimit_max(const struct task_struct *tsk,
+		unsigned int limit)
+{
+	return ACCESS_ONCE(tsk->signal->rlim[limit].rlim_max);
+}
+
+static inline unsigned long rlimit(unsigned int limit)
+{
+	return task_rlimit(current, limit);
+}
+
+static inline unsigned long rlimit_max(unsigned int limit)
+{
+	return task_rlimit_max(current, limit);
+}
+
 #endif /* __KERNEL__ */
 
 #endif
--- linux-mvl-dove-2.6.32.orig/include/linux/cred.h
+++ linux-mvl-dove-2.6.32/include/linux/cred.h
@@ -153,6 +153,7 @@
 extern void __put_cred(struct cred *);
 extern void exit_creds(struct task_struct *);
 extern int copy_creds(struct task_struct *, unsigned long);
+extern const struct cred *get_task_cred(struct task_struct *);
 extern struct cred *cred_alloc_blank(void);
 extern struct cred *prepare_creds(void);
 extern struct cred *prepare_exec_creds(void);
@@ -283,26 +284,6 @@
 	((const struct cred *)(rcu_dereference((task)->real_cred)))
 
 /**
- * get_task_cred - Get another task's objective credentials
- * @task: The task to query
- *
- * Get the objective credentials of a task, pinning them so that they can't go
- * away.  Accessing a task's credentials directly is not permitted.
- *
- * The caller must make sure task doesn't go away, either by holding a ref on
- * task or by holding tasklist_lock to prevent it from being unlinked.
- */
-#define get_task_cred(task)				\
-({							\
-	struct cred *__cred;				\
-	rcu_read_lock();				\
-	__cred = (struct cred *) __task_cred((task));	\
-	get_cred(__cred);				\
-	rcu_read_unlock();				\
-	__cred;						\
-})
-
-/**
  * get_current_cred - Get the current task's subjective credentials
  *
  * Get the subjective credentials of the current task, pinning them so that
--- linux-mvl-dove-2.6.32.orig/include/linux/wifi_tiwlan.h
+++ linux-mvl-dove-2.6.32/include/linux/wifi_tiwlan.h
@@ -0,0 +1,32 @@
+/* include/linux/wifi_tiwlan.h
+ *
+ * Copyright (C) 2008 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+#ifndef _LINUX_WIFI_TIWLAN_H_
+#define _LINUX_WIFI_TIWLAN_H_
+
+#define WMPA_NUMBER_OF_SECTIONS	3
+#define WMPA_NUMBER_OF_BUFFERS	160
+#define WMPA_SECTION_HEADER	24
+#define WMPA_SECTION_SIZE_0	(WMPA_NUMBER_OF_BUFFERS * 64)
+#define WMPA_SECTION_SIZE_1	(WMPA_NUMBER_OF_BUFFERS * 256)
+#define WMPA_SECTION_SIZE_2	(WMPA_NUMBER_OF_BUFFERS * 2048)
+
+struct wifi_platform_data {
+        int (*set_power)(int val);
+        int (*set_reset)(int val);
+        int (*set_carddetect)(int val);
+	void *(*mem_prealloc)(int section, unsigned long size);
+};
+
+#endif
--- linux-mvl-dove-2.6.32.orig/include/linux/list_sort.h
+++ linux-mvl-dove-2.6.32/include/linux/list_sort.h
@@ -0,0 +1,11 @@
+#ifndef _LINUX_LIST_SORT_H
+#define _LINUX_LIST_SORT_H
+
+#include <linux/types.h>
+
+struct list_head;
+
+void list_sort(void *priv, struct list_head *head,
+	       int (*cmp)(void *priv, struct list_head *a,
+			  struct list_head *b));
+#endif
--- linux-mvl-dove-2.6.32.orig/include/linux/ethtool.h
+++ linux-mvl-dove-2.6.32/include/linux/ethtool.h
@@ -357,6 +357,8 @@
 	__u32				flow_type;
 	/* The rx flow hash value or the rule DB size */
 	__u64				data;
+	/* The following fields are not valid and must not be used for
+	 * the ETHTOOL_{G,X}RXFH commands. */
 	struct ethtool_rx_flow_spec	fs;
 	__u32				rule_cnt;
 	__u32				rule_locs[0];
@@ -502,6 +504,7 @@
 	int	(*get_rxnfc)(struct net_device *, struct ethtool_rxnfc *, void *);
 	int	(*set_rxnfc)(struct net_device *, struct ethtool_rxnfc *);
 	int     (*flash_device)(struct net_device *, struct ethtool_flash *);
+	int	(*reset)(struct net_device *, u32 *);
 };
 #endif /* __KERNEL__ */
 
@@ -559,6 +562,7 @@
 #define	ETHTOOL_SRXCLSRLDEL	0x00000031 /* Delete RX classification rule */
 #define	ETHTOOL_SRXCLSRLINS	0x00000032 /* Insert RX classification rule */
 #define	ETHTOOL_FLASHDEV	0x00000033 /* Flash firmware to device */
+#define	ETHTOOL_RESET		0x00000034 /* Reset hardware */
 
 /* compatibility with older code */
 #define SPARC_ETH_GSET		ETHTOOL_GSET
@@ -689,4 +693,34 @@
 
 #define	RX_CLS_FLOW_DISC	0xffffffffffffffffULL
 
+/* Reset flags */
+/* The reset() operation must clear the flags for the components which
+ * were actually reset.  On successful return, the flags indicate the
+ * components which were not reset, either because they do not exist
+ * in the hardware or because they cannot be reset independently.  The
+ * driver must never reset any components that were not requested.
+ */
+enum ethtool_reset_flags {
+	/* These flags represent components dedicated to the interface
+	 * the command is addressed to.  Shift any flag left by
+	 * ETH_RESET_SHARED_SHIFT to reset a shared component of the
+	 * same type.
+	 */
+	ETH_RESET_MGMT		= 1 << 0,	/* Management processor */
+	ETH_RESET_IRQ		= 1 << 1,	/* Interrupt requester */
+	ETH_RESET_DMA		= 1 << 2,	/* DMA engine */
+	ETH_RESET_FILTER	= 1 << 3,	/* Filtering/flow direction */
+	ETH_RESET_OFFLOAD	= 1 << 4,	/* Protocol offload */
+	ETH_RESET_MAC		= 1 << 5,	/* Media access controller */
+	ETH_RESET_PHY		= 1 << 6,	/* Transceiver/PHY */
+	ETH_RESET_RAM		= 1 << 7,	/* RAM shared between
+						 * multiple components */
+
+	ETH_RESET_DEDICATED	= 0x0000ffff,	/* All components dedicated to
+						 * this interface */
+	ETH_RESET_ALL		= 0xffffffff,	/* All components used by this
+						 * interface, even if shared */
+};
+#define ETH_RESET_SHARED_SHIFT	16
+
 #endif /* _LINUX_ETHTOOL_H */
--- linux-mvl-dove-2.6.32.orig/include/linux/syslog.h
+++ linux-mvl-dove-2.6.32/include/linux/syslog.h
@@ -0,0 +1,29 @@
+/*  Syslog internals
+ *
+ *  Copyright 2010 Canonical, Ltd.
+ *  Author: Kees Cook <kees.cook@canonical.com>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2, or (at your option)
+ *  any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; see the file COPYING.  If not, write to
+ *  the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _LINUX_SYSLOG_H
+#define _LINUX_SYSLOG_H
+
+#define SYSLOG_FROM_CALL 0
+#define SYSLOG_FROM_FILE 1
+
+int do_syslog(int type, char __user *buf, int count, bool from_file);
+
+#endif /* _LINUX_SYSLOG_H */
--- linux-mvl-dove-2.6.32.orig/include/linux/ashmem.h
+++ linux-mvl-dove-2.6.32/include/linux/ashmem.h
@@ -0,0 +1,48 @@
+/*
+ * include/linux/ashmem.h
+ *
+ * Copyright 2008 Google Inc.
+ * Author: Robert Love
+ *
+ * This file is dual licensed.  It may be redistributed and/or modified
+ * under the terms of the Apache 2.0 License OR version 2 of the GNU
+ * General Public License.
+ */
+
+#ifndef _LINUX_ASHMEM_H
+#define _LINUX_ASHMEM_H
+
+#include <linux/limits.h>
+#include <linux/ioctl.h>
+
+#define ASHMEM_NAME_LEN		256
+
+#define ASHMEM_NAME_DEF		"dev/ashmem"
+
+/* Return values from ASHMEM_PIN: Was the mapping purged while unpinned? */
+#define ASHMEM_NOT_PURGED	0
+#define ASHMEM_WAS_PURGED	1
+
+/* Return values from ASHMEM_GET_PIN_STATUS: Is the mapping pinned? */
+#define ASHMEM_IS_UNPINNED	0
+#define ASHMEM_IS_PINNED	1
+
+struct ashmem_pin {
+	__u32 offset;	/* offset into region, in bytes, page-aligned */
+	__u32 len;	/* length forward from offset, in bytes, page-aligned */
+};
+
+#define __ASHMEMIOC		0x77
+
+#define ASHMEM_SET_NAME		_IOW(__ASHMEMIOC, 1, char[ASHMEM_NAME_LEN])
+#define ASHMEM_GET_NAME		_IOR(__ASHMEMIOC, 2, char[ASHMEM_NAME_LEN])
+#define ASHMEM_SET_SIZE		_IOW(__ASHMEMIOC, 3, size_t)
+#define ASHMEM_GET_SIZE		_IO(__ASHMEMIOC, 4)
+#define ASHMEM_SET_PROT_MASK	_IOW(__ASHMEMIOC, 5, unsigned long)
+#define ASHMEM_GET_PROT_MASK	_IO(__ASHMEMIOC, 6)
+#define ASHMEM_PIN		_IOW(__ASHMEMIOC, 7, struct ashmem_pin)
+#define ASHMEM_UNPIN		_IOW(__ASHMEMIOC, 8, struct ashmem_pin)
+#define ASHMEM_GET_PIN_STATUS	_IO(__ASHMEMIOC, 9)
+#define ASHMEM_PURGE_ALL_CACHES	_IO(__ASHMEMIOC, 10)
+
+#endif	/* _LINUX_ASHMEM_H */
--- linux-mvl-dove-2.6.32.orig/include/linux/gpio_keys.h
+++ linux-mvl-dove-2.6.32/include/linux/gpio_keys.h
@@ -15,6 +15,8 @@
 struct gpio_keys_platform_data {
 	struct gpio_keys_button *buttons;
 	int nbuttons;
+	int use_shared_irq;
+	int shared_irq;
 	unsigned int rep:1;		/* enable input subsystem auto repeat */
 };
 
--- linux-mvl-dove-2.6.32.orig/include/linux/enclosure.h
+++ linux-mvl-dove-2.6.32/include/linux/enclosure.h
@@ -42,6 +42,8 @@
 	ENCLOSURE_STATUS_NOT_INSTALLED,
 	ENCLOSURE_STATUS_UNKNOWN,
 	ENCLOSURE_STATUS_UNAVAILABLE,
+	/* last element for counting purposes */
+	ENCLOSURE_STATUS_MAX
 };
 
 /* SFF-8485 activity light settings */
--- linux-mvl-dove-2.6.32.orig/include/linux/sysctl.h
+++ linux-mvl-dove-2.6.32/include/linux/sysctl.h
@@ -490,6 +490,7 @@
 	NET_IPV4_CONF_PROMOTE_SECONDARIES=20,
 	NET_IPV4_CONF_ARP_ACCEPT=21,
 	NET_IPV4_CONF_ARP_NOTIFY=22,
+	NET_IPV4_CONF_SRC_VMARK=24,
 	__NET_IPV4_CONF_MAX
 };
 
--- linux-mvl-dove-2.6.32.orig/include/linux/hardirq.h
+++ linux-mvl-dove-2.6.32/include/linux/hardirq.h
@@ -64,6 +64,8 @@
 #define HARDIRQ_OFFSET	(1UL << HARDIRQ_SHIFT)
 #define NMI_OFFSET	(1UL << NMI_SHIFT)
 
+#define SOFTIRQ_DISABLE_OFFSET	(2 * SOFTIRQ_OFFSET)
+
 #ifndef PREEMPT_ACTIVE
 #define PREEMPT_ACTIVE_BITS	1
 #define PREEMPT_ACTIVE_SHIFT	(NMI_SHIFT + NMI_BITS)
@@ -82,10 +84,13 @@
 /*
  * Are we doing bottom half or hardware interrupt processing?
  * Are we in a softirq context? Interrupt context?
+ * in_softirq - Are we currently processing softirq or have bh disabled?
+ * in_serving_softirq - Are we currently processing softirq?
  */
 #define in_irq()		(hardirq_count())
 #define in_softirq()		(softirq_count())
 #define in_interrupt()		(irq_count())
+#define in_serving_softirq()	(softirq_count() & SOFTIRQ_OFFSET)
 
 /*
  * Are we in NMI context?
@@ -132,10 +137,12 @@
 
 struct task_struct;
 
-#ifndef CONFIG_VIRT_CPU_ACCOUNTING
+#if !defined(CONFIG_VIRT_CPU_ACCOUNTING) && !defined(CONFIG_IRQ_TIME_ACCOUNTING)
 static inline void account_system_vtime(struct task_struct *tsk)
 {
 }
+#else
+extern void account_system_vtime(struct task_struct *tsk);
 #endif
 
 #if defined(CONFIG_NO_HZ)
--- linux-mvl-dove-2.6.32.orig/include/linux/resource.h
+++ linux-mvl-dove-2.6.32/include/linux/resource.h
@@ -3,8 +3,6 @@
 
 #include <linux/time.h>
 
-struct task_struct;
-
 /*
  * Resource control/accounting header file for linux
  */
@@ -55,8 +53,11 @@
 /*
  * Limit the stack by to some sane default: root can always
  * increase this limit if needed..  8MB seems reasonable.
+ *
+ * (2MB more to cover randomization effects.)
  */
-#define _STK_LIM	(8*1024*1024)
+#define _STK_LIM	(10*1024*1024)
+#define EXEC_STACK_BIAS	(2*1024*1024)
 
 /*
  * GPG2 wants 64kB of mlocked memory, to make sure pass phrases
@@ -70,6 +71,12 @@
  */
 #include <asm/resource.h>
 
+#ifdef __KERNEL__
+
+struct task_struct;
+
 int getrusage(struct task_struct *p, int who, struct rusage __user *ru);
 
+#endif /* __KERNEL__ */
+
 #endif
--- linux-mvl-dove-2.6.32.orig/include/linux/pci.h
+++ linux-mvl-dove-2.6.32/include/linux/pci.h
@@ -564,6 +564,9 @@
 				resource_size_t);
 void pcibios_update_irq(struct pci_dev *, int irq);
 
+/* Weak but can be overriden by arch */
+void pci_fixup_cardbus(struct pci_bus *);
+
 /* Generic PCI functions used internally */
 
 extern struct pci_bus *pci_find_bus(int domain, int busnr);
@@ -942,6 +945,11 @@
 }
 #endif /* CONFIG_PCI_DOMAINS */
 
+/* some architectures require additional setup to direct VGA traffic */
+typedef int (*arch_set_vga_state_t)(struct pci_dev *pdev, bool decode,
+		      unsigned int command_bits, bool change_bridge);
+extern void pci_register_set_vga_state(arch_set_vga_state_t func);
+
 #else /* CONFIG_PCI is not enabled */
 
 /*
--- linux-mvl-dove-2.6.32.orig/include/linux/cpumask.h
+++ linux-mvl-dove-2.6.32/include/linux/cpumask.h
@@ -84,6 +84,7 @@
 #define num_online_cpus()	cpumask_weight(cpu_online_mask)
 #define num_possible_cpus()	cpumask_weight(cpu_possible_mask)
 #define num_present_cpus()	cpumask_weight(cpu_present_mask)
+#define num_active_cpus()	cpumask_weight(cpu_active_mask)
 #define cpu_online(cpu)		cpumask_test_cpu((cpu), cpu_online_mask)
 #define cpu_possible(cpu)	cpumask_test_cpu((cpu), cpu_possible_mask)
 #define cpu_present(cpu)	cpumask_test_cpu((cpu), cpu_present_mask)
@@ -92,6 +93,7 @@
 #define num_online_cpus()	1
 #define num_possible_cpus()	1
 #define num_present_cpus()	1
+#define num_active_cpus()	1
 #define cpu_online(cpu)		((cpu) == 0)
 #define cpu_possible(cpu)	((cpu) == 0)
 #define cpu_present(cpu)	((cpu) == 0)
--- linux-mvl-dove-2.6.32.orig/include/linux/random.h
+++ linux-mvl-dove-2.6.32/include/linux/random.h
@@ -50,6 +50,10 @@
 				 unsigned int value);
 extern void add_interrupt_randomness(int irq);
 
+extern void random_input_words(__u32 *buf, size_t wordcount, int ent_count);
+extern int random_input_wait(void);
+#define HAS_RANDOM_INPUT_WAIT 1
+
 extern void get_random_bytes(void *buf, int nbytes);
 void generate_random_uuid(unsigned char uuid_out[16]);
 
--- linux-mvl-dove-2.6.32.orig/include/linux/sockios.h
+++ linux-mvl-dove-2.6.32/include/linux/sockios.h
@@ -65,6 +65,7 @@
 #define SIOCDIFADDR	0x8936		/* delete PA address		*/
 #define	SIOCSIFHWBROADCAST	0x8937	/* set hardware broadcast addr	*/
 #define SIOCGIFCOUNT	0x8938		/* get number of devices */
+#define SIOCKILLADDR	0x8939		/* kill sockets with this local addr */
 
 #define SIOCGIFBR	0x8940		/* Bridging support		*/
 #define SIOCSIFBR	0x8941		/* Set bridging options 	*/
--- linux-mvl-dove-2.6.32.orig/include/linux/msi.h
+++ linux-mvl-dove-2.6.32/include/linux/msi.h
@@ -14,8 +14,10 @@
 extern void mask_msi_irq(unsigned int irq);
 extern void unmask_msi_irq(unsigned int irq);
 extern void read_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg);
+extern void get_cached_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg);
 extern void write_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg);
 extern void read_msi_msg(unsigned int irq, struct msi_msg *msg);
+extern void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg);
 extern void write_msi_msg(unsigned int irq, struct msi_msg *msg);
 
 struct msi_desc {
--- linux-mvl-dove-2.6.32.orig/include/linux/acpi.h
+++ linux-mvl-dove-2.6.32/include/linux/acpi.h
@@ -253,6 +253,13 @@
 void __init acpi_s4_no_nvs(void);
 #endif /* CONFIG_PM_SLEEP */
 
+struct acpi_osc_context {
+	char *uuid_str; /* uuid string */
+	int rev;
+	struct acpi_buffer cap; /* arg2/arg3 */
+	struct acpi_buffer ret; /* free by caller if success */
+};
+
 #define OSC_QUERY_TYPE			0
 #define OSC_SUPPORT_TYPE 		1
 #define OSC_CONTROL_TYPE		2
@@ -265,6 +272,15 @@
 #define OSC_INVALID_REVISION_ERROR	8
 #define OSC_CAPABILITIES_MASK_ERROR	16
 
+acpi_status acpi_run_osc(acpi_handle handle, struct acpi_osc_context *context);
+
+/* platform-wide _OSC bits */
+#define OSC_SB_PAD_SUPPORT		1
+#define OSC_SB_PPC_OST_SUPPORT		2
+#define OSC_SB_PR3_SUPPORT		4
+#define OSC_SB_CPUHP_OST_SUPPORT	8
+#define OSC_SB_APEI_SUPPORT		16
+
 /* _OSC DW1 Definition (OS Support Fields) */
 #define OSC_EXT_PCI_CONFIG_SUPPORT		1
 #define OSC_ACTIVE_STATE_PWR_SUPPORT 		2
--- linux-mvl-dove-2.6.32.orig/include/linux/vmstat.h
+++ linux-mvl-dove-2.6.32/include/linux/vmstat.h
@@ -166,6 +166,28 @@
 	return x;
 }
 
+/*
+ * More accurate version that also considers the currently pending
+ * deltas. For that we need to loop over all cpus to find the current
+ * deltas. There is no synchronization so the result cannot be
+ * exactly accurate either.
+ */
+static inline unsigned long zone_page_state_snapshot(struct zone *zone,
+					enum zone_stat_item item)
+{
+	long x = atomic_long_read(&zone->vm_stat[item]);
+
+#ifdef CONFIG_SMP
+	int cpu;
+	for_each_online_cpu(cpu)
+		x += zone_pcp(zone, cpu)->vm_stat_diff[item];
+
+	if (x < 0)
+		x = 0;
+#endif
+	return x;
+}
+
 extern unsigned long global_reclaimable_pages(void);
 extern unsigned long zone_reclaimable_pages(struct zone *zone);
 
--- linux-mvl-dove-2.6.32.orig/include/linux/ata.h
+++ linux-mvl-dove-2.6.32/include/linux/ata.h
@@ -1000,8 +1000,8 @@
 
 static inline int lba_28_ok(u64 block, u32 n_block)
 {
-	/* check the ending block number */
-	return ((block + n_block) < ((u64)1 << 28)) && (n_block <= 256);
+	/* check the ending block number: must be LESS THAN 0x0fffffff */
+	return ((block + n_block) < ((1 << 28) - 1)) && (n_block <= 256);
 }
 
 static inline int lba_48_ok(u64 block, u32 n_block)
--- linux-mvl-dove-2.6.32.orig/include/linux/pid.h
+++ linux-mvl-dove-2.6.32/include/linux/pid.h
@@ -117,7 +117,7 @@
  */
 extern struct pid *find_get_pid(int nr);
 extern struct pid *find_ge_pid(int nr, struct pid_namespace *);
-int next_pidmap(struct pid_namespace *pid_ns, int last);
+int next_pidmap(struct pid_namespace *pid_ns, unsigned int last);
 
 extern struct pid *alloc_pid(struct pid_namespace *ns);
 extern void free_pid(struct pid *pid);
--- linux-mvl-dove-2.6.32.orig/include/linux/uio_vmeta.h
+++ linux-mvl-dove-2.6.32/include/linux/uio_vmeta.h
@@ -0,0 +1,56 @@
+/*
+ * This software program is licensed subject to the GNU General Public License
+ * (GPL).Version 2,June 1991, available at http://www.fsf.org/copyleft/gpl.html
+
+ * (C) Copyright 2010 Marvell International Ltd.
+ * All Rights Reserved
+ */
+
+#ifndef __UIO_VMETA_H
+#define __UIO_VMETA_H
+
+typedef unsigned int vmeta_instance_status;
+typedef struct _id_instance
+{
+	vmeta_instance_status	status;
+	int						height;
+	int						width;
+	int						frame_rate;
+	pid_t					pid;
+	unsigned int			pt;//pthread_t
+}id_instance;
+
+#define MAX_VMETA_INSTANCE 32
+
+typedef enum _VMETA_LOCK_FLAG{
+	VMETA_LOCK_OFF = 0,
+	VMETA_LOCK_ON,
+	VMETA_LOCK_FORCE_INIT
+}VMETA_LOCK_FLAG;
+
+/* This struct should be aligned with user space API */
+typedef struct _kernel_share
+{
+	int ref_count;
+	VMETA_LOCK_FLAG lock_flag;
+	int active_user_id;
+	id_instance user_id_list[MAX_VMETA_INSTANCE];
+}kernel_share;
+
+#define IOP_MAGIC	'v'
+
+#define VMETA_CMD_POWER_ON		_IO(IOP_MAGIC, 0)
+#define VMETA_CMD_POWER_OFF		_IO(IOP_MAGIC, 1)
+#define VMETA_CMD_CLK_ON		_IO(IOP_MAGIC, 2)
+#define VMETA_CMD_CLK_OFF		_IO(IOP_MAGIC, 3)
+#define VMETA_CMD_CLK_SWITCH		_IO(IOP_MAGIC, 4)
+#define VMETA_CMD_LOCK			_IO(IOP_MAGIC, 5)
+#define VMETA_CMD_UNLOCK		_IO(IOP_MAGIC, 6)
+#define VMETA_CMD_PRIV_LOCK		_IO(IOP_MAGIC, 7)
+#define VMETA_CMD_PRIV_UNLOCK		_IO(IOP_MAGIC, 8)
+#define VMETA_CMD_SUSPEND_CHECK		_IOR(IOP_MAGIC, 9, int)
+#define VMETA_CMD_SUSPEND_READY		_IO(IOP_MAGIC, 10)
+#define VMETA_CMD_SUSPEND_SET		_IO(IOP_MAGIC, 11)
+#define VMETA_CMD_SUSPEND_UNSET		_IO(IOP_MAGIC, 12)
+
+#endif /* __UIO_VMETA_H */
--- linux-mvl-dove-2.6.32.orig/include/linux/if_packet.h
+++ linux-mvl-dove-2.6.32/include/linux/if_packet.h
@@ -63,6 +63,7 @@
 	__u16		tp_mac;
 	__u16		tp_net;
 	__u16		tp_vlan_tci;
+	__u16		tp_padding;
 };
 
 /* Rx ring - header status */
@@ -103,6 +104,7 @@
 	__u32		tp_sec;
 	__u32		tp_nsec;
 	__u16		tp_vlan_tci;
+	__u16		tp_padding;
 };
 
 #define TPACKET2_HDRLEN		(TPACKET_ALIGN(sizeof(struct tpacket2_hdr)) + sizeof(struct sockaddr_ll))
--- linux-mvl-dove-2.6.32.orig/include/linux/netdevice.h
+++ linux-mvl-dove-2.6.32/include/linux/netdevice.h
@@ -348,13 +348,14 @@
 	NAPI_STATE_NPSVC,	/* Netpoll - don't dequeue from poll_list */
 };
 
-enum {
+enum gro_result {
 	GRO_MERGED,
 	GRO_MERGED_FREE,
 	GRO_HELD,
 	GRO_NORMAL,
 	GRO_DROP,
 };
+typedef enum gro_result gro_result_t;
 
 extern void __napi_schedule(struct napi_struct *n);
 
@@ -1164,9 +1165,12 @@
 static inline void *skb_gro_header_slow(struct sk_buff *skb, unsigned int hlen,
 					unsigned int offset)
 {
+	if (!pskb_may_pull(skb, hlen))
+		return NULL;
+
 	NAPI_GRO_CB(skb)->frag0 = NULL;
 	NAPI_GRO_CB(skb)->frag0_len = 0;
-	return pskb_may_pull(skb, hlen) ? skb->data + offset : NULL;
+	return skb->data + offset;
 }
 
 static inline void *skb_gro_mac_header(struct sk_buff *skb)
@@ -1467,18 +1471,19 @@
 #define HAVE_NETIF_RECEIVE_SKB 1
 extern int		netif_receive_skb(struct sk_buff *skb);
 extern void		napi_gro_flush(struct napi_struct *napi);
-extern int		dev_gro_receive(struct napi_struct *napi,
+extern gro_result_t	dev_gro_receive(struct napi_struct *napi,
 					struct sk_buff *skb);
-extern int		napi_skb_finish(int ret, struct sk_buff *skb);
-extern int		napi_gro_receive(struct napi_struct *napi,
+extern gro_result_t	napi_skb_finish(gro_result_t ret, struct sk_buff *skb);
+extern gro_result_t	napi_gro_receive(struct napi_struct *napi,
 					 struct sk_buff *skb);
 extern void		napi_reuse_skb(struct napi_struct *napi,
 				       struct sk_buff *skb);
 extern struct sk_buff *	napi_get_frags(struct napi_struct *napi);
-extern int		napi_frags_finish(struct napi_struct *napi,
-					  struct sk_buff *skb, int ret);
+extern gro_result_t	napi_frags_finish(struct napi_struct *napi,
+					  struct sk_buff *skb,
+					  gro_result_t ret);
 extern struct sk_buff *	napi_frags_skb(struct napi_struct *napi);
-extern int		napi_gro_frags(struct napi_struct *napi);
+extern gro_result_t	napi_gro_frags(struct napi_struct *napi);
 
 static inline void napi_free_frags(struct napi_struct *napi)
 {
@@ -1560,6 +1565,8 @@
 
 extern void netif_carrier_off(struct net_device *dev);
 
+extern void netif_notify_peers(struct net_device *dev);
+
 /**
  *	netif_dormant_on - mark device as dormant.
  *	@dev: network device
@@ -2013,6 +2020,10 @@
 		return 0;
 	return dev->ethtool_ops->get_flags(dev);
 }
+
+#define MODULE_ALIAS_NETDEV(device) \
+	MODULE_ALIAS("netdev-" device)
+
 #endif /* __KERNEL__ */
 
 #endif	/* _LINUX_NETDEVICE_H */
--- linux-mvl-dove-2.6.32.orig/include/linux/ieee80211.h
+++ linux-mvl-dove-2.6.32/include/linux/ieee80211.h
@@ -872,7 +872,7 @@
 /* block-ack parameters */
 #define IEEE80211_ADDBA_PARAM_POLICY_MASK 0x0002
 #define IEEE80211_ADDBA_PARAM_TID_MASK 0x003C
-#define IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK 0xFFA0
+#define IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK 0xFFC0
 #define IEEE80211_DELBA_PARAM_TID_MASK 0xF000
 #define IEEE80211_DELBA_PARAM_INITIATOR_MASK 0x0800
 
@@ -1098,6 +1098,8 @@
 	WLAN_CATEGORY_SA_QUERY = 8,
 	WLAN_CATEGORY_PROTECTED_DUAL_OF_ACTION = 9,
 	WLAN_CATEGORY_WMM = 17,
+	WLAN_CATEGORY_MESH_PLINK = 30,		/* Pending ANA approval */
+	WLAN_CATEGORY_MESH_PATH_SEL = 32,	/* Pending ANA approval */
 	WLAN_CATEGORY_VENDOR_SPECIFIC_PROTECTED = 126,
 	WLAN_CATEGORY_VENDOR_SPECIFIC = 127,
 };
--- linux-mvl-dove-2.6.32.orig/include/linux/mtd/nand.h
+++ linux-mvl-dove-2.6.32/include/linux/mtd/nand.h
@@ -44,7 +44,7 @@
  * adjust this accordingly.
  */
 #define NAND_MAX_OOBSIZE	128
-#define NAND_MAX_PAGESIZE	4096
+#define NAND_MAX_PAGESIZE	8192
 
 /*
  * Constants for hardware specific CLE/ALE/NCE function
@@ -389,7 +389,14 @@
 
 	int		chip_delay;
 	unsigned int	options;
-
+#ifdef CONFIG_MV_MTD_GANG_SUPPORT
+	unsigned int	num_devs;
+#endif
+#ifdef CONFIG_MV_MTD_MLC_NAND_SUPPORT
+	unsigned int	oobsize_ovrd;
+	unsigned int	bb_location;
+	unsigned int	bb_page;
+#endif
 	int		page_shift;
 	int		phys_erase_shift;
 	int		bbt_erase_shift;
@@ -536,6 +543,11 @@
 /* Search good / bad pattern on the first and the second page */
 #define NAND_BBT_SCAN2NDPAGE	0x00004000
 
+#ifdef CONFIG_MV_MTD_MLC_NAND_SUPPORT
+/* Search the bad block indicators according to Marvell's Naked symantics */
+#define NAND_BBT_SCANMVCUSTOM	0x10000000
+#endif
+
 /* The maximum number of blocks to scan for a bbt */
 #define NAND_BBT_SCAN_MAXBLOCKS	4
 
--- linux-mvl-dove-2.6.32.orig/include/linux/netfilter/Kbuild
+++ linux-mvl-dove-2.6.32/include/linux/netfilter/Kbuild
@@ -38,6 +38,8 @@
 header-y += xt_pkttype.h
 header-y += xt_quota.h
 header-y += xt_rateest.h
+header-y += xt_policy.h
+header-y += xt_quota.h
 header-y += xt_realm.h
 header-y += xt_recent.h
 header-y += xt_sctp.h
--- linux-mvl-dove-2.6.32.orig/include/linux/netfilter/xt_recent.h
+++ linux-mvl-dove-2.6.32/include/linux/netfilter/xt_recent.h
@@ -9,6 +9,7 @@
 	XT_RECENT_UPDATE   = 1 << 2,
 	XT_RECENT_REMOVE   = 1 << 3,
 	XT_RECENT_TTL      = 1 << 4,
+	XT_RECENT_REAP     = 1 << 5,
 
 	XT_RECENT_SOURCE   = 0,
 	XT_RECENT_DEST     = 1,
@@ -16,6 +17,9 @@
 	XT_RECENT_NAME_LEN = 200,
 };
 
+/* Only allowed with --rcheck and --update */
+#define XT_RECENT_MODIFIERS (XT_RECENT_TTL|XT_RECENT_REAP)
+
 struct xt_recent_mtinfo {
 	__u32 seconds;
 	__u32 hit_count;
--- linux-mvl-dove-2.6.32.orig/include/linux/amba/mmci.h
+++ linux-mvl-dove-2.6.32/include/linux/amba/mmci.h
@@ -5,6 +5,15 @@
 #define AMBA_MMCI_H
 
 #include <linux/mmc/host.h>
+#include <linux/mmc/card.h>
+#include <linux/mmc/sdio_func.h>
+
+struct embedded_sdio_data {
+        struct sdio_cis cis;
+        struct sdio_cccr cccr;
+        struct sdio_embedded_func *funcs;
+        int num_funcs;
+};
 
 struct mmci_platform_data {
 	unsigned int ocr_mask;			/* available voltages */
@@ -13,6 +22,9 @@
 	int	gpio_wp;
 	int	gpio_cd;
 	unsigned long capabilities;
+	unsigned int status_irq;
+	struct embedded_sdio_data *embedded_sdio;
+	int (*register_status_notify)(void (*callback)(int card_present, void *dev_id), void *dev_id);
 };
 
 #endif
--- linux-mvl-dove-2.6.32.orig/include/linux/nfsd/xdr4.h
+++ linux-mvl-dove-2.6.32/include/linux/nfsd/xdr4.h
@@ -480,18 +480,17 @@
 static inline void
 set_change_info(struct nfsd4_change_info *cinfo, struct svc_fh *fhp)
 {
-	BUG_ON(!fhp->fh_pre_saved || !fhp->fh_post_saved);
-	cinfo->atomic = 1;
+	BUG_ON(!fhp->fh_pre_saved);
+	cinfo->atomic = fhp->fh_post_saved;
 	cinfo->change_supported = IS_I_VERSION(fhp->fh_dentry->d_inode);
-	if (cinfo->change_supported) {
-		cinfo->before_change = fhp->fh_pre_change;
-		cinfo->after_change = fhp->fh_post_change;
-	} else {
-		cinfo->before_ctime_sec = fhp->fh_pre_ctime.tv_sec;
-		cinfo->before_ctime_nsec = fhp->fh_pre_ctime.tv_nsec;
-		cinfo->after_ctime_sec = fhp->fh_post_attr.ctime.tv_sec;
-		cinfo->after_ctime_nsec = fhp->fh_post_attr.ctime.tv_nsec;
-	}
+
+	cinfo->before_change = fhp->fh_pre_change;
+	cinfo->after_change = fhp->fh_post_change;
+	cinfo->before_ctime_sec = fhp->fh_pre_ctime.tv_sec;
+	cinfo->before_ctime_nsec = fhp->fh_pre_ctime.tv_nsec;
+	cinfo->after_ctime_sec = fhp->fh_post_attr.ctime.tv_sec;
+	cinfo->after_ctime_nsec = fhp->fh_post_attr.ctime.tv_nsec;
+
 }
 
 int nfs4svc_encode_voidres(struct svc_rqst *, __be32 *, void *);
--- linux-mvl-dove-2.6.32.orig/include/linux/spi/mv_spi.h
+++ linux-mvl-dove-2.6.32/include/linux/spi/mv_spi.h
@@ -0,0 +1,17 @@
+/*
+ * mv_spi.h
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __LINUX_SPI_MV_SPI_H
+#define __LINUX_SPI_MV_SPI_H
+
+struct mv_spi_info {
+	u32	clk;		/* no <linux/clk.h> support yet */
+};
+
+
+#endif
--- linux-mvl-dove-2.6.32.orig/include/linux/spi/tsc200x.h
+++ linux-mvl-dove-2.6.32/include/linux/spi/tsc200x.h
@@ -0,0 +1,37 @@
+/*
+ *	Driver Header for TI Touch Screen Controller TSC2005/6 
+ *	 
+ * 
+ * TSC Interfaced with Atmel AT91sam9261ek board,
+ * with PENIRQ connected to AT91_PIN_PB0 and on
+ * SPI0.2 (spi0 chip_select2)
+ * modalias: "tsc2006" or "tsc2005"
+ * 
+ * 
+ * Author	: Pavan Savoy (pavan_savoy@mindtree.com)
+ * Date		: 15-05-2008
+ */
+
+#ifndef TSC200X_H_
+#define TSC200X_H_
+
+
+#include <linux/init.h>
+#include <linux/err.h>
+#include <linux/delay.h>
+#include <linux/input.h>
+#include <linux/interrupt.h>
+#include <linux/slab.h>
+#include <linux/spi/spi.h>
+#include <asm/mach-types.h>
+
+struct tsc2005_platform_data
+{
+	u16	model;
+	u16	x_plate_ohms;
+	u16	y_plate_ohms;
+
+};
+
+#endif /*TSC200X_H_*/
+
--- linux-mvl-dove-2.6.32.orig/include/linux/spi/orion_spi.h
+++ linux-mvl-dove-2.6.32/include/linux/spi/orion_spi.h
@@ -12,6 +12,10 @@
 struct orion_spi_info {
 	u32	tclk;		/* no <linux/clk.h> support yet */
 	u32	enable_clock_fix;
+	int	use_interrupt; /* use interrupt instead polling */
+	int	optional_div; /* if the controller have optional division
+			       * after the pre-scaler 
+			       */
 };
 
 
--- linux-mvl-dove-2.6.32.orig/include/linux/ssb/ssb_driver_chipcommon.h
+++ linux-mvl-dove-2.6.32/include/linux/ssb/ssb_driver_chipcommon.h
@@ -53,6 +53,7 @@
 #define  SSB_CHIPCO_CAP_64BIT		0x08000000	/* 64-bit Backplane */
 #define  SSB_CHIPCO_CAP_PMU		0x10000000	/* PMU available (rev >= 20) */
 #define  SSB_CHIPCO_CAP_ECI		0x20000000	/* ECI available (rev >= 20) */
+#define  SSB_CHIPCO_CAP_SPROM		0x40000000	/* SPROM present */
 #define SSB_CHIPCO_CORECTL		0x0008
 #define  SSB_CHIPCO_CORECTL_UARTCLK0	0x00000001	/* Drive UART with internal clock */
 #define	 SSB_CHIPCO_CORECTL_SE		0x00000002	/* sync clk out enable (corerev >= 3) */
@@ -385,6 +386,7 @@
 
 
 /** Chip specific Chip-Status register contents. */
+#define SSB_CHIPCO_CHST_4322_SPROM_EXISTS	0x00000040 /* SPROM present */
 #define SSB_CHIPCO_CHST_4325_SPROM_OTP_SEL	0x00000003
 #define SSB_CHIPCO_CHST_4325_DEFCIS_SEL		0 /* OTP is powered up, use def. CIS, no SPROM */
 #define SSB_CHIPCO_CHST_4325_SPROM_SEL		1 /* OTP is powered up, SPROM is present */
@@ -398,6 +400,18 @@
 #define SSB_CHIPCO_CHST_4325_RCAL_VALUE_SHIFT	4
 #define SSB_CHIPCO_CHST_4325_PMUTOP_2B 		0x00000200 /* 1 for 2b, 0 for to 2a */
 
+/** Macros to determine SPROM presence based on Chip-Status register. */
+#define SSB_CHIPCO_CHST_4312_SPROM_PRESENT(status) \
+	((status & SSB_CHIPCO_CHST_4325_SPROM_OTP_SEL) != \
+		SSB_CHIPCO_CHST_4325_OTP_SEL)
+#define SSB_CHIPCO_CHST_4322_SPROM_PRESENT(status) \
+	(status & SSB_CHIPCO_CHST_4322_SPROM_EXISTS)
+#define SSB_CHIPCO_CHST_4325_SPROM_PRESENT(status) \
+	(((status & SSB_CHIPCO_CHST_4325_SPROM_OTP_SEL) != \
+		SSB_CHIPCO_CHST_4325_DEFCIS_SEL) && \
+	 ((status & SSB_CHIPCO_CHST_4325_SPROM_OTP_SEL) != \
+		SSB_CHIPCO_CHST_4325_OTP_SEL))
+
 
 
 /** Clockcontrol masks and values **/
@@ -564,6 +578,7 @@
 struct ssb_chipcommon {
 	struct ssb_device *dev;
 	u32 capabilities;
+	u32 status;
 	/* Fast Powerup Delay constant */
 	u16 fast_pwrup_delay;
 	struct ssb_chipcommon_pmu pmu;
--- linux-mvl-dove-2.6.32.orig/include/linux/ssb/ssb_regs.h
+++ linux-mvl-dove-2.6.32/include/linux/ssb/ssb_regs.h
@@ -170,7 +170,8 @@
 #define SSB_SPROMSIZE_WORDS_R4		220
 #define SSB_SPROMSIZE_BYTES_R123	(SSB_SPROMSIZE_WORDS_R123 * sizeof(u16))
 #define SSB_SPROMSIZE_BYTES_R4		(SSB_SPROMSIZE_WORDS_R4 * sizeof(u16))
-#define SSB_SPROM_BASE			0x1000
+#define SSB_SPROM_BASE1			0x1000
+#define SSB_SPROM_BASE31		0x0800
 #define SSB_SPROM_REVISION		0x107E
 #define  SSB_SPROM_REVISION_REV		0x00FF	/* SPROM Revision number */
 #define  SSB_SPROM_REVISION_CRC		0xFF00	/* SPROM CRC8 value */
--- linux-mvl-dove-2.6.32.orig/include/linux/ssb/ssb.h
+++ linux-mvl-dove-2.6.32/include/linux/ssb/ssb.h
@@ -301,6 +301,7 @@
 	/* ID information about the Chip. */
 	u16 chip_id;
 	u16 chip_rev;
+	u16 sprom_offset;
 	u16 sprom_size;		/* number of words in sprom */
 	u8 chip_package;
 
@@ -390,6 +391,9 @@
 
 extern void ssb_bus_unregister(struct ssb_bus *bus);
 
+/* Does the device have an SPROM? */
+extern bool ssb_is_sprom_available(struct ssb_bus *bus);
+
 /* Set a fallback SPROM.
  * See kdoc at the function definition for complete documentation. */
 extern int ssb_arch_set_fallback_sprom(const struct ssb_sprom *sprom);
--- linux-mvl-dove-2.6.32.orig/include/linux/decompress/mm.h
+++ linux-mvl-dove-2.6.32/include/linux/decompress/mm.h
@@ -14,11 +14,21 @@
 
 /* Code active when included from pre-boot environment: */
 
+/*
+ * Some architectures want to ensure there is no local data in their
+ * pre-boot environment, so that data can arbitarily relocated (via
+ * GOT references).  This is achieved by defining STATIC_RW_DATA to
+ * be null.
+ */
+#ifndef STATIC_RW_DATA
+#define STATIC_RW_DATA static
+#endif
+
 /* A trivial malloc implementation, adapted from
  *  malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994
  */
-static unsigned long malloc_ptr;
-static int malloc_count;
+STATIC_RW_DATA unsigned long malloc_ptr;
+STATIC_RW_DATA int malloc_count;
 
 static void *malloc(int size)
 {
--- linux-mvl-dove-2.6.32.orig/include/linux/mmc/host.h
+++ linux-mvl-dove-2.6.32/include/linux/mmc/host.h
@@ -14,6 +14,7 @@
 #include <linux/sched.h>
 
 #include <linux/mmc/core.h>
+#include <linux/mmc/pm.h>
 
 struct mmc_ios {
 	unsigned int	clock;			/* clock rate */
@@ -116,10 +117,11 @@
 	struct device		*parent;
 	struct device		class_dev;
 	int			index;
-	const struct mmc_host_ops *ops;
+     /*const*/ struct mmc_host_ops *ops;
 	unsigned int		f_min;
 	unsigned int		f_max;
 	u32			ocr_avail;
+	struct notifier_block	pm_notify;
 
 #define MMC_VDD_165_195		0x00000080	/* VDD voltage 1.65 - 1.95 */
 #define MMC_VDD_20_21		0x00000100	/* VDD voltage 2.0 ~ 2.1 */
@@ -152,6 +154,8 @@
 #define MMC_CAP_NONREMOVABLE	(1 << 8)	/* Nonremovable e.g. eMMC */
 #define MMC_CAP_WAIT_WHILE_BUSY	(1 << 9)	/* Waits while card is busy */
 
+	mmc_pm_flag_t		pm_caps;	/* supported pm features */
+
 	/* host specific block data */
 	unsigned int		max_seg_size;	/* see blk_queue_max_segment_size */
 	unsigned short		max_hw_segs;	/* see blk_queue_max_hw_segments */
@@ -177,6 +181,7 @@
 
 	/* Only used with MMC_CAP_DISABLE */
 	int			enabled;	/* host is enabled */
+	int			rescan_disable;	/* disable card detection */
 	int			nesting_cnt;	/* "enable" nesting count */
 	int			en_dis_recurs;	/* detect recursion */
 	unsigned int		disable_delay;	/* disable delay in msecs */
@@ -197,12 +202,23 @@
 	struct task_struct	*sdio_irq_thread;
 	atomic_t		sdio_irq_thread_abort;
 
+	mmc_pm_flag_t		pm_flags;	/* requested pm features */
+
 #ifdef CONFIG_LEDS_TRIGGERS
 	struct led_trigger	*led;		/* activity led */
 #endif
 
 	struct dentry		*debugfs_root;
 
+#ifdef CONFIG_MMC_EMBEDDED_SDIO
+	struct {
+		struct sdio_cis			*cis;
+		struct sdio_cccr		*cccr;
+		struct sdio_embedded_func	*funcs;
+		int				num_funcs;
+	} embedded_sdio_data;
+#endif
+
 	unsigned long		private[0] ____cacheline_aligned;
 };
 
@@ -211,6 +227,14 @@
 extern void mmc_remove_host(struct mmc_host *);
 extern void mmc_free_host(struct mmc_host *);
 
+#ifdef CONFIG_MMC_EMBEDDED_SDIO
+extern void mmc_set_embedded_sdio_data(struct mmc_host *host,
+				       struct sdio_cis *cis,
+				       struct sdio_cccr *cccr,
+				       struct sdio_embedded_func *funcs,
+				       int num_funcs);
+#endif
+
 static inline void *mmc_priv(struct mmc_host *host)
 {
 	return (void *)host->private;
@@ -222,7 +246,7 @@
 #define mmc_classdev(x)	(&(x)->class_dev)
 #define mmc_hostname(x)	(dev_name(&(x)->class_dev))
 
-extern int mmc_suspend_host(struct mmc_host *, pm_message_t);
+extern int mmc_suspend_host(struct mmc_host *);
 extern int mmc_resume_host(struct mmc_host *);
 
 extern void mmc_power_save_host(struct mmc_host *host);
@@ -249,6 +273,7 @@
 int mmc_host_enable(struct mmc_host *host);
 int mmc_host_disable(struct mmc_host *host);
 int mmc_host_lazy_disable(struct mmc_host *host);
+int mmc_pm_notify(struct notifier_block *notify_block, unsigned long, void *);
 
 static inline void mmc_set_disable_delay(struct mmc_host *host,
 					 unsigned int disable_delay)
--- linux-mvl-dove-2.6.32.orig/include/linux/mmc/mmc.h
+++ linux-mvl-dove-2.6.32/include/linux/mmc/mmc.h
@@ -268,6 +268,7 @@
 
 #define EXT_CSD_CARD_TYPE_26	(1<<0)	/* Card can run at 26MHz */
 #define EXT_CSD_CARD_TYPE_52	(1<<1)	/* Card can run at 52MHz */
+#define EXT_CSD_CARD_TYPE_MASK	0x3	/* Mask out reserved and DDR bits */
 
 #define EXT_CSD_BUS_WIDTH_1	0	/* Card is in 1 bit mode */
 #define EXT_CSD_BUS_WIDTH_4	1	/* Card is in 4 bit mode */
--- linux-mvl-dove-2.6.32.orig/include/linux/mmc/pm.h
+++ linux-mvl-dove-2.6.32/include/linux/mmc/pm.h
@@ -0,0 +1,30 @@
+/*
+ * linux/include/linux/mmc/pm.h
+ *
+ * Author:	Nicolas Pitre
+ * Copyright:	(C) 2009 Marvell Technology Group Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef LINUX_MMC_PM_H
+#define LINUX_MMC_PM_H
+
+/*
+ * These flags are used to describe power management features that
+ * some cards (typically SDIO cards) might wish to benefit from when
+ * the host system is being suspended.  There are several layers of
+ * abstractions involved, from the host controller driver, to the MMC core
+ * code, to the SDIO core code, to finally get to the actual SDIO function
+ * driver.  This file is therefore used for common definitions shared across
+ * all those layers.
+ */
+
+typedef unsigned int mmc_pm_flag_t;
+
+#define MMC_PM_KEEP_POWER	(1 << 0)	/* preserve card power during suspend */
+#define MMC_PM_WAKE_SDIO_IRQ	(1 << 1)	/* wake up host system on SDIO IRQ assertion */
+
+#endif
--- linux-mvl-dove-2.6.32.orig/include/linux/mmc/card.h
+++ linux-mvl-dove-2.6.32/include/linux/mmc/card.h
@@ -99,6 +99,8 @@
 #define MMC_STATE_BLOCKADDR	(1<<3)		/* card uses block-addressing */
 	unsigned int		quirks; 	/* card quirks */
 #define MMC_QUIRK_LENIENT_FN0	(1<<0)		/* allow SDIO FN0 writes outside of the VS CCCR range */
+#define MMC_QUIRK_BLKSZ_FOR_BYTE_MODE (1<<1)	/* use func->cur_blksize */
+						/* for byte mode */
 
 	u32			raw_cid[4];	/* raw card CID */
 	u32			raw_csd[4];	/* raw card CSD */
@@ -139,6 +141,11 @@
 	return c->quirks & MMC_QUIRK_LENIENT_FN0;
 }
 
+static inline int mmc_blksz_for_byte_mode(const struct mmc_card *c)
+{
+	return c->quirks & MMC_QUIRK_BLKSZ_FOR_BYTE_MODE;
+}
+
 #define mmc_card_name(c)	((c)->cid.prod_name)
 #define mmc_card_id(c)		(dev_name(&(c)->dev))
 
--- linux-mvl-dove-2.6.32.orig/include/linux/mmc/sdio.h
+++ linux-mvl-dove-2.6.32/include/linux/mmc/sdio.h
@@ -94,6 +94,10 @@
 
 #define  SDIO_BUS_WIDTH_1BIT	0x00
 #define  SDIO_BUS_WIDTH_4BIT	0x02
+#define  SDIO_BUS_ECSI		0x20	/* Enable continuous SPI interrupt */
+#define  SDIO_BUS_SCSI		0x40	/* Support continuous SPI interrupt */
+
+#define  SDIO_BUS_ASYNC_INT	0x20
 
 #define  SDIO_BUS_CD_DISABLE     0x80	/* disable pull-up on DAT3 (pin 1) */
 
--- linux-mvl-dove-2.6.32.orig/include/linux/mmc/sdio_func.h
+++ linux-mvl-dove-2.6.32/include/linux/mmc/sdio_func.h
@@ -15,12 +15,22 @@
 #include <linux/device.h>
 #include <linux/mod_devicetable.h>
 
+#include <linux/mmc/pm.h>
+
 struct mmc_card;
 struct sdio_func;
 
 typedef void (sdio_irq_handler_t)(struct sdio_func *);
 
 /*
+ * Structure used to hold embedded SDIO device data from platform layer
+ */
+struct sdio_embedded_func {
+	uint8_t f_class;
+	uint32_t f_maxblksize;
+};
+
+/*
  * SDIO function CIS tuple (unknown to the core)
  */
 struct sdio_func_tuple {
@@ -128,6 +138,8 @@
 extern unsigned int sdio_align_size(struct sdio_func *func, unsigned int sz);
 
 extern u8 sdio_readb(struct sdio_func *func, unsigned int addr, int *err_ret);
+extern u8 sdio_readb_ext(struct sdio_func *func, unsigned int addr, int *err_ret,
+	unsigned in);
 extern u16 sdio_readw(struct sdio_func *func, unsigned int addr, int *err_ret);
 extern u32 sdio_readl(struct sdio_func *func, unsigned int addr, int *err_ret);
 
@@ -143,6 +155,9 @@
 extern void sdio_writel(struct sdio_func *func, u32 b,
 	unsigned int addr, int *err_ret);
 
+extern u8 sdio_writeb_readb(struct sdio_func *func, u8 write_byte,
+	unsigned int addr, int *err_ret);
+
 extern int sdio_memcpy_toio(struct sdio_func *func, unsigned int addr,
 	void *src, int count);
 extern int sdio_writesb(struct sdio_func *func, unsigned int addr,
@@ -153,5 +168,8 @@
 extern void sdio_f0_writeb(struct sdio_func *func, unsigned char b,
 	unsigned int addr, int *err_ret);
 
+extern mmc_pm_flag_t sdio_get_host_pm_caps(struct sdio_func *func);
+extern int sdio_set_host_pm_flags(struct sdio_func *func, mmc_pm_flag_t flags);
+
 #endif
 
--- linux-mvl-dove-2.6.32.orig/include/linux/mfd/wm8350/pmic.h
+++ linux-mvl-dove-2.6.32/include/linux/mfd/wm8350/pmic.h
@@ -666,20 +666,20 @@
 #define WM8350_ISINK_FLASH_DUR_64MS		(1 << 8)
 #define WM8350_ISINK_FLASH_DUR_96MS		(2 << 8)
 #define WM8350_ISINK_FLASH_DUR_1024MS		(3 << 8)
-#define WM8350_ISINK_FLASH_ON_INSTANT		(0 << 4)
-#define WM8350_ISINK_FLASH_ON_0_25S		(1 << 4)
-#define WM8350_ISINK_FLASH_ON_0_50S		(2 << 4)
-#define WM8350_ISINK_FLASH_ON_1_00S		(3 << 4)
-#define WM8350_ISINK_FLASH_ON_1_95S		(1 << 4)
-#define WM8350_ISINK_FLASH_ON_3_91S		(2 << 4)
-#define WM8350_ISINK_FLASH_ON_7_80S		(3 << 4)
-#define WM8350_ISINK_FLASH_OFF_INSTANT		(0 << 0)
-#define WM8350_ISINK_FLASH_OFF_0_25S		(1 << 0)
-#define WM8350_ISINK_FLASH_OFF_0_50S		(2 << 0)
-#define WM8350_ISINK_FLASH_OFF_1_00S		(3 << 0)
-#define WM8350_ISINK_FLASH_OFF_1_95S		(1 << 0)
-#define WM8350_ISINK_FLASH_OFF_3_91S		(2 << 0)
-#define WM8350_ISINK_FLASH_OFF_7_80S		(3 << 0)
+#define WM8350_ISINK_FLASH_ON_INSTANT		(0 << 0)
+#define WM8350_ISINK_FLASH_ON_0_25S		(1 << 0)
+#define WM8350_ISINK_FLASH_ON_0_50S		(2 << 0)
+#define WM8350_ISINK_FLASH_ON_1_00S		(3 << 0)
+#define WM8350_ISINK_FLASH_ON_1_95S		(1 << 0)
+#define WM8350_ISINK_FLASH_ON_3_91S		(2 << 0)
+#define WM8350_ISINK_FLASH_ON_7_80S		(3 << 0)
+#define WM8350_ISINK_FLASH_OFF_INSTANT		(0 << 4)
+#define WM8350_ISINK_FLASH_OFF_0_25S		(1 << 4)
+#define WM8350_ISINK_FLASH_OFF_0_50S		(2 << 4)
+#define WM8350_ISINK_FLASH_OFF_1_00S		(3 << 4)
+#define WM8350_ISINK_FLASH_OFF_1_95S		(1 << 4)
+#define WM8350_ISINK_FLASH_OFF_3_91S		(2 << 4)
+#define WM8350_ISINK_FLASH_OFF_7_80S		(3 << 4)
 
 /*
  * Regulator Interrupts.
--- linux-mvl-dove-2.6.32.orig/include/linux/usb/composite.h
+++ linux-mvl-dove-2.6.32/include/linux/usb/composite.h
@@ -36,8 +36,10 @@
 
 #include <linux/usb/ch9.h>
 #include <linux/usb/gadget.h>
+#include <linux/switch.h>
 
 
+struct usb_composite_dev;
 struct usb_configuration;
 
 /**
@@ -101,6 +103,9 @@
 
 	struct usb_configuration	*config;
 
+	/* disabled is zero if the function is enabled */
+	int				disabled;
+
 	/* REVISIT:  bind() functions can be marked __init, which
 	 * makes trouble for section mismatch analysis.  See if
 	 * we can't restructure things to avoid mismatching.
@@ -127,6 +132,7 @@
 	/* private: */
 	/* internals */
 	struct list_head		list;
+	struct device			*dev;
 };
 
 int usb_add_function(struct usb_configuration *, struct usb_function *);
@@ -136,6 +142,9 @@
 
 int usb_interface_id(struct usb_configuration *, struct usb_function *);
 
+void usb_function_set_enabled(struct usb_function *, int);
+void usb_composite_force_reset(struct usb_composite_dev *);
+
 /**
  * ep_choose - select descriptor endpoint at current device speed
  * @g: gadget, connected and running at some speed
@@ -267,6 +276,9 @@
 	const struct usb_device_descriptor	*dev;
 	struct usb_gadget_strings		**strings;
 
+	struct class		*class;
+	atomic_t		function_count;
+
 	/* REVISIT:  bind() functions can be marked __init, which
 	 * makes trouble for section mismatch analysis.  See if
 	 * we can't restructure things to avoid mismatching...
@@ -278,6 +290,8 @@
 	/* global suspend hooks */
 	void			(*suspend)(struct usb_composite_dev *);
 	void			(*resume)(struct usb_composite_dev *);
+
+	void			(*enable_function)(struct usb_function *f, int enable);
 };
 
 extern int usb_composite_register(struct usb_composite_driver *);
@@ -337,6 +351,11 @@
 
 	/* protects at least deactivation count */
 	spinlock_t			lock;
+
+	struct switch_dev sdev;
+	/* used by usb_composite_force_reset to avoid signalling switch changes */
+	bool				mute_switch;
+	struct work_struct switch_work;
 };
 
 extern int usb_string_id(struct usb_composite_dev *c);
--- linux-mvl-dove-2.6.32.orig/include/linux/usb/android_composite.h
+++ linux-mvl-dove-2.6.32/include/linux/usb/android_composite.h
@@ -0,0 +1,90 @@
+/*
+ * Platform data for Android USB
+ *
+ * Copyright (C) 2008 Google, Inc.
+ * Author: Mike Lockwood <lockwood@android.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+#ifndef	__LINUX_USB_ANDROID_H
+#define	__LINUX_USB_ANDROID_H
+
+#include <linux/usb/composite.h>
+
+struct android_usb_function {
+	struct list_head	list;
+	char			*name;
+	int 			(*bind_config)(struct usb_configuration *c);
+};
+
+struct android_usb_product {
+	/* Default product ID. */
+	__u16 product_id;
+
+	/* List of function names associated with this product.
+	 * This is used to compute the USB product ID dynamically
+	 * based on which functions are enabled.
+	 */
+	int num_functions;
+	char **functions;
+};
+
+struct android_usb_platform_data {
+	/* USB device descriptor fields */
+	__u16 vendor_id;
+
+	/* Default product ID. */
+	__u16 product_id;
+
+	__u16 version;
+
+	char *product_name;
+	char *manufacturer_name;
+	char *serial_number;
+
+	/* List of available USB products.
+	 * This is used to compute the USB product ID dynamically
+	 * based on which functions are enabled.
+	 * if num_products is zero or no match can be found,
+	 * we use the default product ID
+	 */
+	int num_products;
+	struct android_usb_product *products;
+
+	/* List of all supported USB functions.
+	 * This list is used to define the order in which
+	 * the functions appear in the configuration's list of USB interfaces.
+	 * This is necessary to avoid depending upon the order in which
+	 * the individual function drivers are initialized.
+	 */
+	int num_functions;
+	char **functions;
+};
+
+/* Platform data for "usb_mass_storage" driver. */
+struct usb_mass_storage_platform_data {
+	/* Contains values for the SC_INQUIRY SCSI command. */
+	char *vendor;
+	char *product;
+	int release;
+
+	/* number of LUNS */
+	int nluns;
+};
+
+extern void android_usb_set_connected(int on);
+
+extern void android_register_function(struct android_usb_function *f);
+
+extern void android_enable_function(struct usb_function *f, int enable);
+
+
+#endif	/* __LINUX_USB_ANDROID_H */
--- linux-mvl-dove-2.6.32.orig/include/linux/usb/serial.h
+++ linux-mvl-dove-2.6.32/include/linux/usb/serial.h
@@ -259,6 +259,8 @@
 	int  (*tiocmget)(struct tty_struct *tty, struct file *file);
 	int  (*tiocmset)(struct tty_struct *tty, struct file *file,
 			 unsigned int set, unsigned int clear);
+	int  (*get_icount)(struct tty_struct *tty,
+			struct serial_icounter_struct *icount);
 	/* Called by the tty layer for port level work. There may or may not
 	   be an attached tty at this point */
 	void (*dtr_rts)(struct usb_serial_port *port, int on);
@@ -326,6 +328,9 @@
 					struct usb_serial_port *port,
 					unsigned int ch);
 extern int usb_serial_handle_break(struct usb_serial_port *port);
+extern void usb_serial_handle_dcd_change(struct usb_serial_port *usb_port,
+					 struct tty_struct *tty,
+					 unsigned int status);
 
 
 extern int usb_serial_bus_register(struct usb_serial_driver *device);
--- linux-mvl-dove-2.6.32.orig/include/linux/usb/quirks.h
+++ linux-mvl-dove-2.6.32/include/linux/usb/quirks.h
@@ -19,4 +19,8 @@
 /* device can't handle its Configuration or Interface strings */
 #define USB_QUIRK_CONFIG_INTF_STRINGS	0x00000008
 
+/* device needs a pause during initialization, after we read the device
+   descriptor */
+#define USB_QUIRK_DELAY_INIT		0x00000040
+
 #endif /* __LINUX_USB_QUIRKS_H */
--- linux-mvl-dove-2.6.32.orig/include/net/x25.h
+++ linux-mvl-dove-2.6.32/include/net/x25.h
@@ -182,6 +182,10 @@
 extern int  sysctl_x25_ack_holdback_timeout;
 extern int  sysctl_x25_forward;
 
+extern int x25_parse_address_block(struct sk_buff *skb,
+		struct x25_address *called_addr,
+		struct x25_address *calling_addr);
+
 extern int  x25_addr_ntoa(unsigned char *, struct x25_address *,
 			  struct x25_address *);
 extern int  x25_addr_aton(unsigned char *, struct x25_address *,
--- linux-mvl-dove-2.6.32.orig/include/net/mac80211.h
+++ linux-mvl-dove-2.6.32/include/net/mac80211.h
@@ -908,6 +908,9 @@
  * @IEEE80211_HW_BEACON_FILTER:
  *	Hardware supports dropping of irrelevant beacon frames to
  *	avoid waking up cpu.
+ * @IEEE80211_HW_REPORTS_TX_ACK_STATUS:
+ *	Hardware can provide ack status reports of Tx frames to
+ *	the stack.
  */
 enum ieee80211_hw_flags {
 	IEEE80211_HW_RX_INCLUDES_FCS			= 1<<1,
@@ -924,6 +927,7 @@
 	IEEE80211_HW_SUPPORTS_DYNAMIC_PS		= 1<<12,
 	IEEE80211_HW_MFP_CAPABLE			= 1<<13,
 	IEEE80211_HW_BEACON_FILTER			= 1<<14,
+	IEEE80211_HW_REPORTS_TX_ACK_STATUS		= 1<<15,
 };
 
 /**
@@ -1696,6 +1700,12 @@
  */
 void ieee80211_rx_irqsafe(struct ieee80211_hw *hw, struct sk_buff *skb);
 
+/*
+ * The TX headroom reserved by mac80211 for its own tx_status functions.
+ * This is enough for the radiotap header.
+ */
+#define IEEE80211_TX_STATUS_HEADROOM	13
+
 /**
  * ieee80211_tx_status - transmit status callback
  *
--- linux-mvl-dove-2.6.32.orig/include/net/rose.h
+++ linux-mvl-dove-2.6.32/include/net/rose.h
@@ -14,6 +14,12 @@
 
 #define	ROSE_MIN_LEN			3
 
+#define	ROSE_CALL_REQ_ADDR_LEN_OFF	3
+#define	ROSE_CALL_REQ_ADDR_LEN_VAL	0xAA	/* each address is 10 digits */
+#define	ROSE_CALL_REQ_DEST_ADDR_OFF	4
+#define	ROSE_CALL_REQ_SRC_ADDR_OFF	9
+#define	ROSE_CALL_REQ_FACILITIES_OFF	14
+
 #define	ROSE_GFI			0x10
 #define	ROSE_Q_BIT			0x80
 #define	ROSE_D_BIT			0x40
@@ -214,7 +220,7 @@
 extern int  rose_validate_nr(struct sock *, unsigned short);
 extern void rose_write_internal(struct sock *, int);
 extern int  rose_decode(struct sk_buff *, int *, int *, int *, int *, int *);
-extern int  rose_parse_facilities(unsigned char *, struct rose_facilities_struct *);
+extern int  rose_parse_facilities(unsigned char *, unsigned int, struct rose_facilities_struct *);
 extern void rose_disconnect(struct sock *, int, int, int);
 
 /* rose_timer.c */
--- linux-mvl-dove-2.6.32.orig/include/net/netrom.h
+++ linux-mvl-dove-2.6.32/include/net/netrom.h
@@ -132,6 +132,8 @@
 static __inline__ void nr_neigh_put(struct nr_neigh *nr_neigh)
 {
 	if (atomic_dec_and_test(&nr_neigh->refcount)) {
+		if (nr_neigh->ax25)
+			ax25_cb_put(nr_neigh->ax25);
 		kfree(nr_neigh->digipeat);
 		kfree(nr_neigh);
 	}
--- linux-mvl-dove-2.6.32.orig/include/net/netlink.h
+++ linux-mvl-dove-2.6.32/include/net/netlink.h
@@ -384,7 +384,7 @@
  *
  * Returns the first attribute which matches the specified type.
  */
-static inline struct nlattr *nlmsg_find_attr(struct nlmsghdr *nlh,
+static inline struct nlattr *nlmsg_find_attr(const struct nlmsghdr *nlh,
 					     int hdrlen, int attrtype)
 {
 	return nla_find(nlmsg_attrdata(nlh, hdrlen),
--- linux-mvl-dove-2.6.32.orig/include/net/ipv6.h
+++ linux-mvl-dove-2.6.32/include/net/ipv6.h
@@ -354,8 +354,16 @@
 
 struct inet_frag_queue;
 
+enum ip6_defrag_users {
+	IP6_DEFRAG_LOCAL_DELIVER,
+	IP6_DEFRAG_CONNTRACK_IN,
+	IP6_DEFRAG_CONNTRACK_OUT,
+	IP6_DEFRAG_CONNTRACK_BRIDGE_IN,
+};
+
 struct ip6_create_arg {
 	__be32 id;
+	u32 user;
 	struct in6_addr *src;
 	struct in6_addr *dst;
 };
--- linux-mvl-dove-2.6.32.orig/include/net/sock.h
+++ linux-mvl-dove-2.6.32/include/net/sock.h
@@ -242,6 +242,7 @@
 	struct {
 		struct sk_buff *head;
 		struct sk_buff *tail;
+		int len;
 	} sk_backlog;
 	wait_queue_head_t	*sk_sleep;
 	struct dst_entry	*sk_dst_cache;
@@ -561,8 +562,8 @@
 	return sk->sk_wmem_queued < sk->sk_sndbuf;
 }
 
-/* The per-socket spinlock must be held here. */
-static inline void sk_add_backlog(struct sock *sk, struct sk_buff *skb)
+/* OOB backlog add */
+static inline void __sk_add_backlog(struct sock *sk, struct sk_buff *skb)
 {
 	if (!sk->sk_backlog.tail) {
 		sk->sk_backlog.head = sk->sk_backlog.tail = skb;
@@ -573,6 +574,27 @@
 	skb->next = NULL;
 }
 
+/*
+ * Take into account size of receive queue and backlog queue
+ */
+static inline bool sk_rcvqueues_full(const struct sock *sk, const struct sk_buff *skb)
+{
+	unsigned int qsize = sk->sk_backlog.len + atomic_read(&sk->sk_rmem_alloc);
+
+	return qsize + skb->truesize > sk->sk_rcvbuf;
+}
+
+/* The per-socket spinlock must be held here. */
+static inline int sk_add_backlog(struct sock *sk, struct sk_buff *skb)
+{
+	if (sk_rcvqueues_full(sk, skb))
+		return -ENOBUFS;
+
+	__sk_add_backlog(sk, skb);
+	sk->sk_backlog.len += skb->truesize;
+	return 0;
+}
+
 static inline int sk_backlog_rcv(struct sock *sk, struct sk_buff *skb)
 {
 	return sk->sk_backlog_rcv(sk, skb);
--- linux-mvl-dove-2.6.32.orig/include/net/tcp.h
+++ linux-mvl-dove-2.6.32/include/net/tcp.h
@@ -259,11 +259,21 @@
 	return seq3 - seq2 >= seq1 - seq2;
 }
 
-static inline int tcp_too_many_orphans(struct sock *sk, int num)
+static inline bool tcp_too_many_orphans(struct sock *sk, int shift)
 {
-	return (num > sysctl_tcp_max_orphans) ||
-		(sk->sk_wmem_queued > SOCK_MIN_SNDBUF &&
-		 atomic_read(&tcp_memory_allocated) > sysctl_tcp_mem[2]);
+	struct percpu_counter *ocp = sk->sk_prot->orphan_count;
+	int orphans = percpu_counter_read_positive(ocp);
+
+	if (orphans << shift > sysctl_tcp_max_orphans) {
+		orphans = percpu_counter_sum_positive(ocp);
+		if (orphans << shift > sysctl_tcp_max_orphans)
+			return true;
+	}
+
+	if (sk->sk_wmem_queued > SOCK_MIN_SNDBUF &&
+	    atomic_read(&tcp_memory_allocated) > sysctl_tcp_mem[2])
+		return true;
+	return false;
 }
 
 /* syncookies: remember time of last synqueue overflow */
@@ -501,8 +511,22 @@
 /* Bound MSS / TSO packet size with the half of the window */
 static inline int tcp_bound_to_half_wnd(struct tcp_sock *tp, int pktsize)
 {
-	if (tp->max_window && pktsize > (tp->max_window >> 1))
-		return max(tp->max_window >> 1, 68U - tp->tcp_header_len);
+	int cutoff;
+
+	/* When peer uses tiny windows, there is no use in packetizing
+	 * to sub-MSS pieces for the sake of SWS or making sure there
+	 * are enough packets in the pipe for fast recovery.
+	 *
+	 * On the other hand, for extremely large MSS devices, handling
+	 * smaller than MSS windows in this way does make sense.
+	 */
+	if (tp->max_window >= 512)
+		cutoff = (tp->max_window >> 1);
+	else
+		cutoff = tp->max_window;
+
+	if (cutoff && pktsize > cutoff)
+		return max_t(int, cutoff, 68U - tp->tcp_header_len);
 	else
 		return pktsize;
 }
@@ -1263,14 +1287,20 @@
  * TCP connection after "boundary" unsucessful, exponentially backed-off
  * retransmissions with an initial RTO of TCP_RTO_MIN.
  */
-static inline bool retransmits_timed_out(const struct sock *sk,
+static inline bool retransmits_timed_out(struct sock *sk,
 					 unsigned int boundary)
 {
 	unsigned int timeout, linear_backoff_thresh;
+	unsigned int start_ts;
 
 	if (!inet_csk(sk)->icsk_retransmits)
 		return false;
 
+	if (unlikely(!tcp_sk(sk)->retrans_stamp))
+		start_ts = TCP_SKB_CB(tcp_write_queue_head(sk))->when;
+	else
+		start_ts = tcp_sk(sk)->retrans_stamp;
+
 	linear_backoff_thresh = ilog2(TCP_RTO_MAX/TCP_RTO_MIN);
 
 	if (boundary <= linear_backoff_thresh)
@@ -1279,7 +1309,7 @@
 		timeout = ((2 << linear_backoff_thresh) - 1) * TCP_RTO_MIN +
 			  (boundary - linear_backoff_thresh) * TCP_RTO_MAX;
 
-	return (tcp_time_stamp - tcp_sk(sk)->retrans_stamp) >= timeout;
+	return (tcp_time_stamp - start_ts) >= timeout;
 }
 
 static inline struct sk_buff *tcp_send_head(struct sock *sk)
@@ -1443,6 +1473,8 @@
 extern int tcp_gro_complete(struct sk_buff *skb);
 extern int tcp4_gro_complete(struct sk_buff *skb);
 
+extern void tcp_v4_nuke_addr(__u32 saddr);
+
 #ifdef CONFIG_PROC_FS
 extern int  tcp4_proc_init(void);
 extern void tcp4_proc_exit(void);
--- linux-mvl-dove-2.6.32.orig/include/net/af_unix.h
+++ linux-mvl-dove-2.6.32/include/net/af_unix.h
@@ -10,6 +10,7 @@
 extern void unix_notinflight(struct file *fp);
 extern void unix_gc(void);
 extern void wait_for_unix_gc(void);
+extern struct sock *unix_get_socket(struct file *filp);
 
 #define UNIX_HASH_SIZE	256
 
@@ -56,6 +57,7 @@
         spinlock_t		lock;
 	unsigned int		gc_candidate : 1;
 	unsigned int		gc_maybe_cycle : 1;
+	unsigned char		recursion_level;
         wait_queue_head_t       peer_wait;
 };
 #define unix_sk(__sk) ((struct unix_sock *)__sk)
--- linux-mvl-dove-2.6.32.orig/include/net/ip.h
+++ linux-mvl-dove-2.6.32/include/net/ip.h
@@ -342,6 +342,7 @@
 	IP_DEFRAG_CALL_RA_CHAIN,
 	IP_DEFRAG_CONNTRACK_IN,
 	IP_DEFRAG_CONNTRACK_OUT,
+	IP_DEFRAG_CONNTRACK_BRIDGE_IN,
 	IP_DEFRAG_VS_IN,
 	IP_DEFRAG_VS_OUT,
 	IP_DEFRAG_VS_FWD
--- linux-mvl-dove-2.6.32.orig/include/net/netfilter/ipv6/nf_conntrack_ipv6.h
+++ linux-mvl-dove-2.6.32/include/net/netfilter/ipv6/nf_conntrack_ipv6.h
@@ -9,7 +9,7 @@
 
 extern int nf_ct_frag6_init(void);
 extern void nf_ct_frag6_cleanup(void);
-extern struct sk_buff *nf_ct_frag6_gather(struct sk_buff *skb);
+extern struct sk_buff *nf_ct_frag6_gather(struct sk_buff *skb, u32 user);
 extern void nf_ct_frag6_output(unsigned int hooknum, struct sk_buff *skb,
 			       struct net_device *in,
 			       struct net_device *out,
--- linux-mvl-dove-2.6.32.orig/include/net/netns/conntrack.h
+++ linux-mvl-dove-2.6.32/include/net/netns/conntrack.h
@@ -11,6 +11,8 @@
 struct netns_ct {
 	atomic_t		count;
 	unsigned int		expect_count;
+	unsigned int		htable_size;
+	struct kmem_cache	*nf_conntrack_cachep;
 	struct hlist_nulls_head	*hash;
 	struct hlist_head	*expect_hash;
 	struct hlist_nulls_head	unconfirmed;
@@ -28,5 +30,6 @@
 #endif
 	int			hash_vmalloc;
 	int			expect_vmalloc;
+	char			*slabname;
 };
 #endif
--- linux-mvl-dove-2.6.32.orig/include/net/netns/ipv4.h
+++ linux-mvl-dove-2.6.32/include/net/netns/ipv4.h
@@ -40,6 +40,7 @@
 	struct xt_table		*iptable_security;
 	struct xt_table		*nat_table;
 	struct hlist_head	*nat_bysource;
+	unsigned int		nat_htable_size;
 	int			nat_vmalloced;
 #endif
 
--- linux-mvl-dove-2.6.32.orig/include/net/sctp/sm.h
+++ linux-mvl-dove-2.6.32/include/net/sctp/sm.h
@@ -278,6 +278,7 @@
 /* 2nd level prototypes */
 void sctp_generate_t3_rtx_event(unsigned long peer);
 void sctp_generate_heartbeat_event(unsigned long peer);
+void sctp_generate_proto_unreach_event(unsigned long peer);
 
 void sctp_ootb_pkt_free(struct sctp_packet *);
 
--- linux-mvl-dove-2.6.32.orig/include/net/sctp/structs.h
+++ linux-mvl-dove-2.6.32/include/net/sctp/structs.h
@@ -772,6 +772,7 @@
 			  struct iovec *data);
 void sctp_chunk_free(struct sctp_chunk *);
 void  *sctp_addto_chunk(struct sctp_chunk *, int len, const void *data);
+void  *sctp_addto_chunk_fixed(struct sctp_chunk *, int len, const void *data);
 struct sctp_chunk *sctp_chunkify(struct sk_buff *,
 				 const struct sctp_association *,
 				 struct sock *);
@@ -1007,6 +1008,9 @@
 	/* Heartbeat timer is per destination. */
 	struct timer_list hb_timer;
 
+	/* Timer to handle ICMP proto unreachable envets */
+	struct timer_list proto_unreach_timer;
+
 	/* Since we're using per-destination retransmission timers
 	 * (see above), we're also using per-destination "transmitted"
 	 * queues.  This probably ought to be a private struct
--- linux-mvl-dove-2.6.32.orig/include/net/sctp/command.h
+++ linux-mvl-dove-2.6.32/include/net/sctp/command.h
@@ -107,6 +107,7 @@
 	SCTP_CMD_T1_RETRAN,	 /* Mark for retransmission after T1 timeout  */
 	SCTP_CMD_UPDATE_INITTAG, /* Update peer inittag */
 	SCTP_CMD_SEND_MSG,	 /* Send the whole use message */
+	SCTP_CMD_SEND_NEXT_ASCONF, /* Send the next ASCONF after ACK */
 	SCTP_CMD_LAST
 } sctp_verb_t;
 
--- linux-mvl-dove-2.6.32.orig/include/asm-arm/vfp.h
+++ linux-mvl-dove-2.6.32/include/asm-arm/vfp.h
@@ -0,0 +1,89 @@
+/*
+ * linux/include/asm-arm/vfp.h
+ *
+ * VFP register definitions.
+ * First, the standard VFP set.
+ */
+
+#define FPSID			cr0
+#define FPSCR			cr1
+#define MVFR1			cr6
+#define MVFR0			cr7
+#define FPEXC			cr8
+#define FPINST			cr9
+#define FPINST2			cr10
+
+/* FPSID bits */
+#define FPSID_IMPLEMENTER_BIT	(24)
+#define FPSID_IMPLEMENTER_MASK	(0xff << FPSID_IMPLEMENTER_BIT)
+#define FPSID_SOFTWARE		(1<<23)
+#define FPSID_FORMAT_BIT	(21)
+#define FPSID_FORMAT_MASK	(0x3  << FPSID_FORMAT_BIT)
+#define FPSID_NODOUBLE		(1<<20)
+#define FPSID_ARCH_BIT		(16)
+#define FPSID_ARCH_MASK		(0xF  << FPSID_ARCH_BIT)
+#define FPSID_PART_BIT		(8)
+#define FPSID_PART_MASK		(0xFF << FPSID_PART_BIT)
+#define FPSID_VARIANT_BIT	(4)
+#define FPSID_VARIANT_MASK	(0xF  << FPSID_VARIANT_BIT)
+#define FPSID_REV_BIT		(0)
+#define FPSID_REV_MASK		(0xF  << FPSID_REV_BIT)
+
+/* FPEXC bits */
+#define FPEXC_EX		(1 << 31)
+#define FPEXC_EN		(1 << 30)
+#define FPEXC_DEX		(1 << 29)
+#define FPEXC_FP2V		(1 << 28)
+#define FPEXC_VV		(1 << 27)
+#define FPEXC_TFV		(1 << 26)
+#define FPEXC_LENGTH_BIT	(8)
+#define FPEXC_LENGTH_MASK	(7 << FPEXC_LENGTH_BIT)
+#define FPEXC_IDF		(1 << 7)
+#define FPEXC_IXF		(1 << 4)
+#define FPEXC_UFF		(1 << 3)
+#define FPEXC_OFF		(1 << 2)
+#define FPEXC_DZF		(1 << 1)
+#define FPEXC_IOF		(1 << 0)
+#define FPEXC_TRAP_MASK		(FPEXC_IDF|FPEXC_IXF|FPEXC_UFF|FPEXC_OFF|FPEXC_DZF|FPEXC_IOF)
+
+/* FPSCR bits */
+#define FPSCR_DEFAULT_NAN	(1<<25)
+#define FPSCR_FLUSHTOZERO	(1<<24)
+#define FPSCR_ROUND_NEAREST	(0<<22)
+#define FPSCR_ROUND_PLUSINF	(1<<22)
+#define FPSCR_ROUND_MINUSINF	(2<<22)
+#define FPSCR_ROUND_TOZERO	(3<<22)
+#define FPSCR_RMODE_BIT		(22)
+#define FPSCR_RMODE_MASK	(3 << FPSCR_RMODE_BIT)
+#define FPSCR_STRIDE_BIT	(20)
+#define FPSCR_STRIDE_MASK	(3 << FPSCR_STRIDE_BIT)
+#define FPSCR_LENGTH_BIT	(16)
+#define FPSCR_LENGTH_MASK	(7 << FPSCR_LENGTH_BIT)
+#define FPSCR_IOE		(1<<8)
+#define FPSCR_DZE		(1<<9)
+#define FPSCR_OFE		(1<<10)
+#define FPSCR_UFE		(1<<11)
+#define FPSCR_IXE		(1<<12)
+#define FPSCR_IDE		(1<<15)
+#define FPSCR_IOC		(1<<0)
+#define FPSCR_DZC		(1<<1)
+#define FPSCR_OFC		(1<<2)
+#define FPSCR_UFC		(1<<3)
+#define FPSCR_IXC		(1<<4)
+#define FPSCR_IDC		(1<<7)
+
+/* MVFR0 bits */
+#define MVFR0_A_SIMD_BIT	(0)
+#define MVFR0_A_SIMD_MASK	(0xf << MVFR0_A_SIMD_BIT)
+
+/* Bit patterns for decoding the packaged operation descriptors */
+#define VFPOPDESC_LENGTH_BIT	(9)
+#define VFPOPDESC_LENGTH_MASK	(0x07 << VFPOPDESC_LENGTH_BIT)
+#define VFPOPDESC_UNUSED_BIT	(24)
+#define VFPOPDESC_UNUSED_MASK	(0xFF << VFPOPDESC_UNUSED_BIT)
+#define VFPOPDESC_OPDESC_MASK	(~(VFPOPDESC_LENGTH_MASK | VFPOPDESC_UNUSED_MASK))
+
+#ifndef __ASSEMBLY__
+extern void vfp_save(void);
+extern void vfp_restore(void);
+#endif /* __ASSEMBLY__ */
--- linux-mvl-dove-2.6.32.orig/include/asm-arm/hardware/pxa-ac97-regs.h
+++ linux-mvl-dove-2.6.32/include/asm-arm/hardware/pxa-ac97-regs.h
@@ -0,0 +1,114 @@
+/*
+ *  linux/include/asm-arm/arch-pxa/pxa-regs.h
+ *
+ *  Author:	Nicolas Pitre
+ *  Created:	Jun 15, 2001
+ *  Copyright:	MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __PXA_AC97_REGS_H
+#define __PXA_AC97_REGS_H
+
+/*
+ * AC97 Controller registers
+ */
+
+#define POCR		__AC97(0x0)  	/* PCM Out Control Register */
+#define POCR_FEIE	(1 << 3)	/* FIFO Error Interrupt Enable */
+#define POCR_FSRIE	(1 << 1)	/* FIFO Service Request Int Enable */
+
+#define PICR		__AC97(0x4)  	/* PCM In Control Register */
+#define PICR_FEIE	(1 << 3)	/* FIFO Error Interrupt Enable */
+#define PICR_FSRIE	(1 << 1)	/* FIFO Service Request Int Enable */
+
+#define MCCR		__AC97(0x8)  	/* Mic In Control Register */
+#define MCCR_FEIE	(1 << 3)	/* FIFO Error Interrupt Enable */
+#define MCCR_FSRIE	(1 << 1)	/* FIFO Service Request Int Enable */
+
+#define GCR		__AC97(0xC)  /* Global Control Register */
+#if defined(CONFIG_PXA3xx) || defined(CONFIG_ARCH_DOVE)
+#define GCR_CLKBPB	(1 << 31)	/* Internal clock enable */
+#endif
+#define GCR_nDMAEN	(1 << 24)	/* non DMA Enable */
+#define GCR_CDONE_IE	(1 << 19)	/* Command Done Interrupt Enable */
+#define GCR_SDONE_IE	(1 << 18)	/* Status Done Interrupt Enable */
+#define GCR_SECRDY_IEN	(1 << 9)	/* Secondary Ready Interrupt Enable */
+#define GCR_PRIRDY_IEN	(1 << 8)	/* Primary Ready Interrupt Enable */
+#define GCR_SECRES_IEN	(1 << 5)	/* Secondary Resume Interrupt Enable */
+#define GCR_PRIRES_IEN	(1 << 4)	/* Primary Resume Interrupt Enable */
+#define GCR_ACLINK_OFF	(1 << 3)	/* AC-link Shut Off */
+#define GCR_WARM_RST	(1 << 2)	/* AC97 Warm Reset */
+#define GCR_COLD_RST	(1 << 1)	/* AC'97 Cold Reset (0 = active) */
+#define GCR_GIE		(1 << 0)	/* Codec GPI Interrupt Enable */
+
+#define POSR		__AC97(0x10)	/* PCM Out Status Register */
+#define POSR_FIFOE	(1 << 4)	/* FIFO error */
+#define POSR_FSR	(1 << 2)	/* FIFO Service Request */
+
+#define PISR		__AC97(0x14)  	/* PCM In Status Register */
+#define PISR_FIFOE	(1 << 4)	/* FIFO error */
+#define PISR_EOC	(1 << 3)	/* DMA End-of-Chain (exclusive clear) */
+#define PISR_FSR	(1 << 2)	/* FIFO Service Request */
+
+#define MCSR		__AC97(0x18)  	/* Mic In Status Register */
+#define MCSR_FIFOE	(1 << 4)	/* FIFO error */
+#define MCSR_EOC	(1 << 3)	/* DMA End-of-Chain (exclusive clear) */
+#define MCSR_FSR	(1 << 2)	/* FIFO Service Request */
+
+#define GSR		__AC97(0x1C)  	/* Global Status Register */
+#define GSR_CDONE	(1 << 19)	/* Command Done */
+#define GSR_SDONE	(1 << 18)	/* Status Done */
+#define GSR_RDCS	(1 << 15)	/* Read Completion Status */
+#define GSR_BIT3SLT12	(1 << 14)	/* Bit 3 of slot 12 */
+#define GSR_BIT2SLT12	(1 << 13)	/* Bit 2 of slot 12 */
+#define GSR_BIT1SLT12	(1 << 12)	/* Bit 1 of slot 12 */
+#define GSR_SECRES	(1 << 11)	/* Secondary Resume Interrupt */
+#define GSR_PRIRES	(1 << 10)	/* Primary Resume Interrupt */
+#define GSR_SCR		(1 << 9)	/* Secondary Codec Ready */
+#define GSR_PCR		(1 << 8)	/*  Primary Codec Ready */
+#define GSR_MCINT	(1 << 7)	/* Mic In Interrupt */
+#define GSR_POINT	(1 << 6)	/* PCM Out Interrupt */
+#define GSR_PIINT	(1 << 5)	/* PCM In Interrupt */
+#define GSR_ACOFFD	(1 << 3)	/* AC-link Shut Off Done */
+#define GSR_MOINT	(1 << 2)	/* Modem Out Interrupt */
+#define GSR_MIINT	(1 << 1)	/* Modem In Interrupt */
+#define GSR_GSCI	(1 << 0)	/* Codec GPI Status Change Interrupt */
+
+#define CAR		__AC97(0x20)	/* CODEC Access Register */
+#define CAR_CAIP	(1 << 0)	/* Codec Access In Progress */
+
+#define PCSDR		__AC97(0x2C)	/* PCM Surround Data Register */
+#define PCCLDR		__AC97(0x38)	/* PCM Center / LFE Data Register */
+
+#define PCDR		__AC97(0x40)	/* PCM FIFO Data Register */
+#define MCDR		__AC97(0x60)	/* Mic-in FIFO Data Register */
+
+#define MOCR		__AC97(0x100)  	/* Modem Out Control Register */
+#define MOCR_FEIE	(1 << 3)	/* FIFO Error */
+#define MOCR_FSRIE	(1 << 1)	/* FIFO Service Request Interrupt En */
+
+#define MICR		__AC97(0x108)	/* Modem In Control Register */
+#define MICR_FEIE	(1 << 3)	/* FIFO Error */
+#define MICR_FSRIE	(1 << 1)	/* FIFO Service Request Interrupt En */
+
+#define MOSR		__AC97(0x110)	/* Modem Out Status Register */
+#define MOSR_FIFOE	(1 << 4)	/* FIFO error */
+#define MOSR_FSR	(1 << 2)	/* FIFO Service Request */
+
+#define MISR		__AC97(0x118)	/* Modem In Status Register */
+#define MISR_FIFOE	(1 << 4)	/* FIFO error */
+#define MISR_EOC	(1 << 3)	/* DMA End-of-Chain (exclusive clear) */
+#define MISR_FSR	(1 << 2)	/* FIFO Service Request */
+
+#define MODR		__AC97(0x140)	/* Modem FIFO Data Register */
+
+#define PAC_REG_BASE	__AC97(0x200)	/* Primary Audio Codec */
+#define SAC_REG_BASE	__AC97(0x300)	/* Secondary Audio Codec */
+#define PMC_REG_BASE	__AC97(0x400)	/* Primary Modem Codec */
+#define SMC_REG_BASE	__AC97(0x500)	/* Secondary Modem Codec */
+
+#endif
--- linux-mvl-dove-2.6.32.orig/include/asm-arm/hardware/pxa-dma-regs.h
+++ linux-mvl-dove-2.6.32/include/asm-arm/hardware/pxa-dma-regs.h
@@ -0,0 +1,246 @@
+/*
+ *  linux/include/asm-arm/arch-pxa/pxa-regs.h
+ *
+ *  Author:	Nicolas Pitre
+ *  Created:	Jun 15, 2001
+ *  Copyright:	MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __PXA_DMA_REGS_H
+#define __PXA_DMA_REGS_H
+
+/*
+ * DMA Controller
+ */
+
+#define DCSR0		__DMA(0)  /* DMA Control / Status Register for Channel 0 */
+#define DCSR1		__DMA(4)  /* DMA Control / Status Register for Channel 1 */
+#define DCSR2		__DMA(8)  /* DMA Control / Status Register for Channel 2 */
+#define DCSR3		__DMA(0xc)  /* DMA Control / Status Register for Channel 3 */
+#define DCSR4		__DMA(0x10)  /* DMA Control / Status Register for Channel 4 */
+#define DCSR5		__DMA(0x14)  /* DMA Control / Status Register for Channel 5 */
+#define DCSR6		__DMA(0x18)  /* DMA Control / Status Register for Channel 6 */
+#define DCSR7		__DMA(0x1c)  /* DMA Control / Status Register for Channel 7 */
+#define DCSR8		__DMA(0x20)  /* DMA Control / Status Register for Channel 8 */
+#define DCSR9		__DMA(0x24)  /* DMA Control / Status Register for Channel 9 */
+#define DCSR10		__DMA(0x28)  /* DMA Control / Status Register for Channel 10 */
+#define DCSR11		__DMA(0x2c)  /* DMA Control / Status Register for Channel 11 */
+#define DCSR12		__DMA(0x30)  /* DMA Control / Status Register for Channel 12 */
+#define DCSR13		__DMA(0x34)  /* DMA Control / Status Register for Channel 13 */
+#define DCSR14		__DMA(0x38)  /* DMA Control / Status Register for Channel 14 */
+#define DCSR15		__DMA(0x3c)  /* DMA Control / Status Register for Channel 15 */
+
+#define DCSR(x)		__DMA2(0, (x) << 2)
+
+#define DCSR_RUN	(1 << 31)	/* Run Bit (read / write) */
+#define DCSR_NODESC	(1 << 30)	/* No-Descriptor Fetch (read / write) */
+#define DCSR_STOPIRQEN	(1 << 29)	/* Stop Interrupt Enable (read / write) */
+#ifdef CONFIG_PXA27x
+#define DCSR_EORIRQEN	(1 << 28)       /* End of Receive Interrupt Enable (R/W) */
+#define DCSR_EORJMPEN	(1 << 27)       /* Jump to next descriptor on EOR */
+#define DCSR_EORSTOPEN	(1 << 26)       /* STOP on an EOR */
+#define DCSR_SETCMPST	(1 << 25)       /* Set Descriptor Compare Status */
+#define DCSR_CLRCMPST	(1 << 24)       /* Clear Descriptor Compare Status */
+#define DCSR_CMPST	(1 << 10)       /* The Descriptor Compare Status */
+#define DCSR_EORINTR	(1 << 9)        /* The end of Receive */
+#endif
+#define DCSR_REQPEND	(1 << 8)	/* Request Pending (read-only) */
+#define DCSR_STOPSTATE	(1 << 3)	/* Stop State (read-only) */
+#define DCSR_ENDINTR	(1 << 2)	/* End Interrupt (read / write) */
+#define DCSR_STARTINTR	(1 << 1)	/* Start Interrupt (read / write) */
+#define DCSR_BUSERR	(1 << 0)	/* Bus Error Interrupt (read / write) */
+
+#define DALGN		__DMA(0xa0)  /* DMA Alignment Register */
+#define DINT		__DMA(0xf0)  /* DMA Interrupt Register */
+
+#define DRCMR(n)	(*(((n) < 64) ? \
+			&__DMA2(0x100, ((n) & 0x3f) << 2) : \
+			&__DMA2(0x1100, ((n) & 0x3f) << 2)))
+
+#define DRCMR0		__DMA(0x100)  /* Request to Channel Map Register for DREQ 0 */
+#define DRCMR1		__DMA(0x104)  /* Request to Channel Map Register for DREQ 1 */
+#define DRCMR2		__DMA(0x108)  /* Request to Channel Map Register for I2S receive Request */
+#define DRCMR3		__DMA(0x10c)  /* Request to Channel Map Register for I2S transmit Request */
+#define DRCMR4		__DMA(0x110)  /* Request to Channel Map Register for BTUART receive Request */
+#define DRCMR5		__DMA(0x114)  /* Request to Channel Map Register for BTUART transmit Request. */
+#define DRCMR6		__DMA(0x118)  /* Request to Channel Map Register for FFUART receive Request */
+#define DRCMR7		__DMA(0x11c)  /* Request to Channel Map Register for FFUART transmit Request */
+#define DRCMR8		__DMA(0x120)  /* Request to Channel Map Register for AC97 microphone Request */
+#define DRCMR9		__DMA(0x124)  /* Request to Channel Map Register for AC97 modem receive Request */
+#define DRCMR10		__DMA(0x128)  /* Request to Channel Map Register for AC97 modem transmit Request */
+#define DRCMR11		__DMA(0x12c)  /* Request to Channel Map Register for AC97 audio receive Request */
+#define DRCMR12		__DMA(0x130)  /* Request to Channel Map Register for AC97 audio transmit Request */
+#define DRCMR13		__DMA(0x134)  /* Request to Channel Map Register for SSP receive Request */
+#define DRCMR14		__DMA(0x138)  /* Request to Channel Map Register for SSP transmit Request */
+#define DRCMR15		__DMA(0x13c)  /* Request to Channel Map Register for SSP2 receive Request */
+#define DRCMR16		__DMA(0x140)  /* Request to Channel Map Register for SSP2 transmit Request */
+#define DRCMR17		__DMA(0x144)  /* Request to Channel Map Register for ICP receive Request */
+#define DRCMR18		__DMA(0x148)  /* Request to Channel Map Register for ICP transmit Request */
+#define DRCMR19		__DMA(0x14c)  /* Request to Channel Map Register for STUART receive Request */
+#define DRCMR20		__DMA(0x150)  /* Request to Channel Map Register for STUART transmit Request */
+#define DRCMR21		__DMA(0x154)  /* Request to Channel Map Register for MMC receive Request */
+#define DRCMR22		__DMA(0x158)  /* Request to Channel Map Register for MMC transmit Request */
+#define DRCMR23		__DMA(0x15c)  /* Reserved */
+#define DRCMR24		__DMA(0x160)  /* Reserved */
+#define DRCMR25		__DMA(0x164)  /* Request to Channel Map Register for USB endpoint 1 Request */
+#define DRCMR26		__DMA(0x168)  /* Request to Channel Map Register for USB endpoint 2 Request */
+#define DRCMR27		__DMA(0x16C)  /* Request to Channel Map Register for USB endpoint 3 Request */
+#define DRCMR28		__DMA(0x170)  /* Request to Channel Map Register for USB endpoint 4 Request */
+#define DRCMR29		__DMA(0x174)  /* Reserved */
+#define DRCMR30		__DMA(0x178)  /* Request to Channel Map Register for USB endpoint 6 Request */
+#define DRCMR31		__DMA(0x17C)  /* Request to Channel Map Register for USB endpoint 7 Request */
+#define DRCMR32		__DMA(0x180)  /* Request to Channel Map Register for USB endpoint 8 Request */
+#define DRCMR33		__DMA(0x184)  /* Request to Channel Map Register for USB endpoint 9 Request */
+#define DRCMR34		__DMA(0x188)  /* Reserved */
+#define DRCMR35		__DMA(0x18C)  /* Request to Channel Map Register for USB endpoint 11 Request */
+#define DRCMR36		__DMA(0x190)  /* Request to Channel Map Register for USB endpoint 12 Request */
+#define DRCMR37		__DMA(0x194)  /* Request to Channel Map Register for USB endpoint 13 Request */
+#define DRCMR38		__DMA(0x198)  /* Request to Channel Map Register for USB endpoint 14 Request */
+#define DRCMR39		__DMA(0x19C)  /* Reserved */
+#define DRCMR66		__DMA(0x1108)  /* Request to Channel Map Register for SSP3 receive Request */
+#define DRCMR67		__DMA(0x110C)  /* Request to Channel Map Register for SSP3 transmit Request */
+#define DRCMR68		__DMA(0x1110)  /* Request to Channel Map Register for Camera FIFO 0 Request */
+#define DRCMR69		__DMA(0x1114)  /* Request to Channel Map Register for Camera FIFO 1 Request */
+#define DRCMR70		__DMA(0x1118)  /* Request to Channel Map Register for Camera FIFO 2 Request */
+/* Request to Channel Map Register for AC97 surround transmit Request */
+#define DRCMR95		__DMA(0x117C)
+/* Request to Channel Map Register for AC97 center / lfe transmit Request*/
+#define DRCMR96		__DMA(0x1180)
+
+#define DRCMRRXSADR	DRCMR2
+#define DRCMRTXSADR	DRCMR3
+#define DRCMRRXBTRBR	DRCMR4
+#define DRCMRTXBTTHR	DRCMR5
+#define DRCMRRXFFRBR	DRCMR6
+#define DRCMRTXFFTHR	DRCMR7
+#define DRCMRRXMCDR	DRCMR8
+#define DRCMRRXMODR	DRCMR9
+#define DRCMRTXMODR	DRCMR10
+#define DRCMRRXPCDR	DRCMR11
+#define DRCMRTXPCDR	DRCMR12
+#define DRCMRRXSSDR	DRCMR13
+#define DRCMRTXSSDR	DRCMR14
+#define DRCMRRXSS2DR   DRCMR15
+#define DRCMRTXSS2DR   DRCMR16
+#define DRCMRRXICDR	DRCMR17
+#define DRCMRTXICDR	DRCMR18
+#define DRCMRRXSTRBR	DRCMR19
+#define DRCMRTXSTTHR	DRCMR20
+#define DRCMRRXMMC	DRCMR21
+#define DRCMRTXMMC	DRCMR22
+#define DRCMRRXSS3DR   DRCMR66
+#define DRCMRTXSS3DR   DRCMR67
+#define DRCMRUDC(x)	DRCMR((x) + 24)
+
+#define DRCMR_MAPVLD	(1 << 7)	/* Map Valid (read / write) */
+#define DRCMR_CHLNUM	0x1f		/* mask for Channel Number (read / write) */
+
+#define DDADR0		__DMA(0x200)  /* DMA Descriptor Address Register Channel 0 */
+#define DSADR0		__DMA(0x204)  /* DMA Source Address Register Channel 0 */
+#define DTADR0		__DMA(0x208)  /* DMA Target Address Register Channel 0 */
+#define DCMD0		__DMA(0x20c)  /* DMA Command Address Register Channel 0 */
+#define DDADR1		__DMA(0x210)  /* DMA Descriptor Address Register Channel 1 */
+#define DSADR1		__DMA(0x214)  /* DMA Source Address Register Channel 1 */
+#define DTADR1		__DMA(0x218)  /* DMA Target Address Register Channel 1 */
+#define DCMD1		__DMA(0x21c)  /* DMA Command Address Register Channel 1 */
+#define DDADR2		__DMA(0x220)  /* DMA Descriptor Address Register Channel 2 */
+#define DSADR2		__DMA(0x224)  /* DMA Source Address Register Channel 2 */
+#define DTADR2		__DMA(0x228)  /* DMA Target Address Register Channel 2 */
+#define DCMD2		__DMA(0x22c)  /* DMA Command Address Register Channel 2 */
+#define DDADR3		__DMA(0x230)  /* DMA Descriptor Address Register Channel 3 */
+#define DSADR3		__DMA(0x234)  /* DMA Source Address Register Channel 3 */
+#define DTADR3		__DMA(0x238)  /* DMA Target Address Register Channel 3 */
+#define DCMD3		__DMA(0x23c)  /* DMA Command Address Register Channel 3 */
+#define DDADR4		__DMA(0x240)  /* DMA Descriptor Address Register Channel 4 */
+#define DSADR4		__DMA(0x244)  /* DMA Source Address Register Channel 4 */
+#define DTADR4		__DMA(0x248)  /* DMA Target Address Register Channel 4 */
+#define DCMD4		__DMA(0x24c)  /* DMA Command Address Register Channel 4 */
+#define DDADR5		__DMA(0x250)  /* DMA Descriptor Address Register Channel 5 */
+#define DSADR5		__DMA(0x254)  /* DMA Source Address Register Channel 5 */
+#define DTADR5		__DMA(0x258)  /* DMA Target Address Register Channel 5 */
+#define DCMD5		__DMA(0x25c)  /* DMA Command Address Register Channel 5 */
+#define DDADR6		__DMA(0x260)  /* DMA Descriptor Address Register Channel 6 */
+#define DSADR6		__DMA(0x264)  /* DMA Source Address Register Channel 6 */
+#define DTADR6		__DMA(0x268)  /* DMA Target Address Register Channel 6 */
+#define DCMD6		__DMA(0x26c)  /* DMA Command Address Register Channel 6 */
+#define DDADR7		__DMA(0x270)  /* DMA Descriptor Address Register Channel 7 */
+#define DSADR7		__DMA(0x274)  /* DMA Source Address Register Channel 7 */
+#define DTADR7		__DMA(0x278)  /* DMA Target Address Register Channel 7 */
+#define DCMD7		__DMA(0x27c)  /* DMA Command Address Register Channel 7 */
+#define DDADR8		__DMA(0x280)  /* DMA Descriptor Address Register Channel 8 */
+#define DSADR8		__DMA(0x284)  /* DMA Source Address Register Channel 8 */
+#define DTADR8		__DMA(0x288)  /* DMA Target Address Register Channel 8 */
+#define DCMD8		__DMA(0x28c)  /* DMA Command Address Register Channel 8 */
+#define DDADR9		__DMA(0x290)  /* DMA Descriptor Address Register Channel 9 */
+#define DSADR9		__DMA(0x294)  /* DMA Source Address Register Channel 9 */
+#define DTADR9		__DMA(0x298)  /* DMA Target Address Register Channel 9 */
+#define DCMD9		__DMA(0x29c)  /* DMA Command Address Register Channel 9 */
+#define DDADR10		__DMA(0x2a0)  /* DMA Descriptor Address Register Channel 10 */
+#define DSADR10		__DMA(0x2a4)  /* DMA Source Address Register Channel 10 */
+#define DTADR10		__DMA(0x2a8)  /* DMA Target Address Register Channel 10 */
+#define DCMD10		__DMA(0x2ac)  /* DMA Command Address Register Channel 10 */
+#define DDADR11		__DMA(0x2b0)  /* DMA Descriptor Address Register Channel 11 */
+#define DSADR11		__DMA(0x2b4)  /* DMA Source Address Register Channel 11 */
+#define DTADR11		__DMA(0x2b8)  /* DMA Target Address Register Channel 11 */
+#define DCMD11		__DMA(0x2bc)  /* DMA Command Address Register Channel 11 */
+#define DDADR12		__DMA(0x2c0)  /* DMA Descriptor Address Register Channel 12 */
+#define DSADR12		__DMA(0x2c4)  /* DMA Source Address Register Channel 12 */
+#define DTADR12		__DMA(0x2c8)  /* DMA Target Address Register Channel 12 */
+#define DCMD12		__DMA(0x2cc)  /* DMA Command Address Register Channel 12 */
+#define DDADR13		__DMA(0x2d0)  /* DMA Descriptor Address Register Channel 13 */
+#define DSADR13		__DMA(0x2d4)  /* DMA Source Address Register Channel 13 */
+#define DTADR13		__DMA(0x2d8)  /* DMA Target Address Register Channel 13 */
+#define DCMD13		__DMA(0x2dc)  /* DMA Command Address Register Channel 13 */
+#define DDADR14		__DMA(0x2e0)  /* DMA Descriptor Address Register Channel 14 */
+#define DSADR14		__DMA(0x2e4)  /* DMA Source Address Register Channel 14 */
+#define DTADR14		__DMA(0x2e8)  /* DMA Target Address Register Channel 14 */
+#define DCMD14		__DMA(0x2ec)  /* DMA Command Address Register Channel 14 */
+#define DDADR15		__DMA(0x2f0)  /* DMA Descriptor Address Register Channel 15 */
+#define DSADR15		__DMA(0x2f4)  /* DMA Source Address Register Channel 15 */
+#define DTADR15		__DMA(0x2f8)  /* DMA Target Address Register Channel 15 */
+#define DCMD15		__DMA(0x2fc)  /* DMA Command Address Register Channel 15 */
+
+#define DDADR(x)	__DMA2(0x200, (x) << 4)
+#define DSADR(x)	__DMA2(0x204, (x) << 4)
+#define DTADR(x)	__DMA2(0x208, (x) << 4)
+#define DCMD(x)		__DMA2(0x20c, (x) << 4)
+
+#define DDADR_DESCADDR	0xfffffff0	/* Address of next descriptor (mask) */
+#define DDADR_STOP	(1 << 0)	/* Stop (read / write) */
+
+#define DCMD_INCSRCADDR	(1 << 31)	/* Source Address Increment Setting. */
+#define DCMD_INCTRGADDR	(1 << 30)	/* Target Address Increment Setting. */
+#define DCMD_FLOWSRC	(1 << 29)	/* Flow Control by the source. */
+#define DCMD_FLOWTRG	(1 << 28)	/* Flow Control by the target. */
+#define DCMD_STARTIRQEN	(1 << 22)	/* Start Interrupt Enable */
+#define DCMD_ENDIRQEN	(1 << 21)	/* End Interrupt Enable */
+#define DCMD_ENDIAN	(1 << 18)	/* Device Endian-ness. */
+#define DCMD_BURST8	(1 << 16)	/* 8 byte burst */
+#define DCMD_BURST16	(2 << 16)	/* 16 byte burst */
+#define DCMD_BURST32	(3 << 16)	/* 32 byte burst */
+#define DCMD_WIDTH1	(1 << 14)	/* 1 byte width */
+#define DCMD_WIDTH2	(2 << 14)	/* 2 byte width (HalfWord) */
+#define DCMD_WIDTH4	(3 << 14)	/* 4 byte width (Word) */
+#define DCMD_WIDTH8	(0 << 14)	/* 8 byte width */
+#define DCMD_OVERREAD	(1 << 13)	/* Over read data */
+#define DCMD_LENGTH	0x01fff		/* length mask (max = 8K - 1) */
+
+#define DWBR(x)		__DMA2(0x4000, (x) << 3)
+#define DWBR_ADDR(x)	__ADDR2(0x4000, (x) << 3)
+#define DWCR(x)		__DMA2(0x4004, (x) << 3)
+#define DWCR_ADDR(x)	__ADDR2(0x4004, (x) << 3)
+
+#define DWCR_WINEN	(1 << 0)
+#define DWCR_WRBL	(1 << 1)
+#define DWCR_TARG_OFFS	4
+#define DWCR_TARG_MASK	(0xF << DWCR_TARG_OFFS)
+#define DWCR_ATTR_OFFS	8
+#define DWCR_ATTR_MASK	(0xFF << DWCR_ATTR_OFFS)
+#define DWCR_SIZE_OFFS	16
+#define DWCR_SIZE_MASK	(0xFFFF << DWCR_SIZE_OFFS)
+
+#endif
--- linux-mvl-dove-2.6.32.orig/include/asm-arm/arch-realview/dove_gpio_irq.h
+++ linux-mvl-dove-2.6.32/include/asm-arm/arch-realview/dove_gpio_irq.h
@@ -0,0 +1,41 @@
+#ifndef DOVE_GPIO_IRQ_H
+#define DOVE_GPIO_IRQ_H
+
+#define DOVE_GPIO_DRV_NAME "RealView GPIO0"
+
+typedef enum {
+	DOVE_GPIO0_0 = 0,		// LCD
+	DOVE_GPIO0_1,
+	DOVE_GPIO0_2,
+	DOVE_GPIO0_3,		// VMETA
+	DOVE_GPIO0_4,
+	DOVE_GPIO0_5,
+	DOVE_GPIO0_6,
+	DOVE_GPIO0_7		// GPU
+} dove_gpio0_pin;
+
+typedef enum {
+	GPIO_INTR_EDGE_TRIGGER,
+	GPIO_INTR_LEVEL_TRIGGER
+}gpio_intr_gen;
+
+typedef enum {
+	GPIO_TRIG_RISING_EDGE,
+	GPIO_TRIG_FALLING_EDGE,
+	GPIO_TRIG_BOTH_EDGE,
+	GPIO_TRIG_HIGH_LEVEL,
+	GPIO_TRIG_LOW_LEVEL
+}gpio_intr_trig;
+
+struct dove_gpio_irq_handler {
+	char *dev_name;
+	char *dev_id;
+	void (*handler)(int , void *);	// irq, dev_id
+	gpio_intr_gen intr_gen; 
+	gpio_intr_trig intr_trig;
+};
+
+extern int dove_gpio_request(dove_gpio0_pin pin, struct dove_gpio_irq_handler *handle);
+extern int dove_gpio_free(dove_gpio0_pin pin, char *dev_name);
+
+#endif /* DOVE_GPIO_IRQ_H */
--- linux-mvl-dove-2.6.32.orig/include/scsi/scsi_host.h
+++ linux-mvl-dove-2.6.32/include/scsi/scsi_host.h
@@ -677,6 +677,12 @@
 	void *shost_data;
 
 	/*
+	 * Points to the physical bus device we'd use to do DMA
+	 * Needed just in case we have virtual hosts.
+	 */
+	struct device *dma_dev;
+
+	/*
 	 * We should ensure that this is aligned, both for better performance
 	 * and also because some compilers (m68k) don't automatically force
 	 * alignment to a long boundary.
@@ -720,7 +726,9 @@
 extern void scsi_flush_work(struct Scsi_Host *);
 
 extern struct Scsi_Host *scsi_host_alloc(struct scsi_host_template *, int);
-extern int __must_check scsi_add_host(struct Scsi_Host *, struct device *);
+extern int __must_check scsi_add_host_with_dma(struct Scsi_Host *,
+					       struct device *,
+					       struct device *);
 extern void scsi_scan_host(struct Scsi_Host *);
 extern void scsi_rescan_device(struct device *);
 extern void scsi_remove_host(struct Scsi_Host *);
@@ -731,6 +739,12 @@
 
 extern u64 scsi_calculate_bounce_limit(struct Scsi_Host *);
 
+static inline int __must_check scsi_add_host(struct Scsi_Host *host,
+					     struct device *dev)
+{
+	return scsi_add_host_with_dma(host, dev, dev);
+}
+
 static inline struct device *scsi_get_device(struct Scsi_Host *shost)
 {
         return shost->shost_gendev.parent;
--- linux-mvl-dove-2.6.32.orig/include/scsi/scsi_bsg_fc.h
+++ linux-mvl-dove-2.6.32/include/scsi/scsi_bsg_fc.h
@@ -292,7 +292,7 @@
 		struct fc_bsg_rport_els		r_els;
 		struct fc_bsg_rport_ct		r_ct;
 	} rqst_data;
-};
+} __attribute__((packed));
 
 
 /* response (request sense data) structure of the sg_io_v4 */
--- linux-mvl-dove-2.6.32.orig/include/scsi/libfc.h
+++ linux-mvl-dove-2.6.32/include/scsi/libfc.h
@@ -145,6 +145,7 @@
 	RPORT_ST_LOGO,		/* port logout sent */
 	RPORT_ST_ADISC,		/* Discover Address sent */
 	RPORT_ST_DELETE,	/* port being deleted */
+	RPORT_ST_RESTART,       /* remote port being deleted and will restart */
 };
 
 /**
--- linux-mvl-dove-2.6.32.orig/include/scsi/osd_protocol.h
+++ linux-mvl-dove-2.6.32/include/scsi/osd_protocol.h
@@ -17,6 +17,7 @@
 #define __OSD_PROTOCOL_H__
 
 #include <linux/types.h>
+#include <linux/kernel.h>
 #include <asm/unaligned.h>
 #include <scsi/scsi.h>
 
--- linux-mvl-dove-2.6.32.orig/include/scsi/scsi_device.h
+++ linux-mvl-dove-2.6.32/include/scsi/scsi_device.h
@@ -446,7 +446,7 @@
 }
 static inline int scsi_device_enclosure(struct scsi_device *sdev)
 {
-	return sdev->inquiry[6] & (1<<6);
+	return sdev->inquiry ? (sdev->inquiry[6] & (1<<6)) : 1;
 }
 
 static inline int scsi_device_protection(struct scsi_device *sdev)
--- linux-mvl-dove-2.6.32.orig/include/scsi/fc_frame.h
+++ linux-mvl-dove-2.6.32/include/scsi/fc_frame.h
@@ -37,6 +37,9 @@
 #define	FC_FRAME_HEADROOM	32	/* headroom for VLAN + FCoE headers */
 #define	FC_FRAME_TAILROOM	8	/* trailer space for FCoE */
 
+/* Max number of skb frags allowed, reserving one for fcoe_crc_eof page */
+#define FC_FRAME_SG_LEN		(MAX_SKB_FRAGS - 1)
+
 #define fp_skb(fp)	(&((fp)->skb))
 #define fr_hdr(fp)	((fp)->skb.data)
 #define fr_len(fp)	((fp)->skb.len)
--- linux-mvl-dove-2.6.32.orig/crypto/authenc.c
+++ linux-mvl-dove-2.6.32/crypto/authenc.c
@@ -46,6 +46,12 @@
 	char tail[];
 };
 
+static void authenc_request_complete(struct aead_request *req, int err)
+{
+	if (err != -EINPROGRESS)
+		aead_request_complete(req, err);
+}
+
 static int crypto_authenc_setkey(struct crypto_aead *authenc, const u8 *key,
 				 unsigned int keylen)
 {
@@ -142,7 +148,7 @@
 				 crypto_aead_authsize(authenc), 1);
 
 out:
-	aead_request_complete(req, err);
+	authenc_request_complete(req, err);
 }
 
 static void authenc_geniv_ahash_done(struct crypto_async_request *areq, int err)
@@ -208,7 +214,7 @@
 	err = crypto_ablkcipher_decrypt(abreq);
 
 out:
-	aead_request_complete(req, err);
+	authenc_request_complete(req, err);
 }
 
 static void authenc_verify_ahash_done(struct crypto_async_request *areq,
@@ -245,7 +251,7 @@
 	err = crypto_ablkcipher_decrypt(abreq);
 
 out:
-	aead_request_complete(req, err);
+	authenc_request_complete(req, err);
 }
 
 static u8 *crypto_authenc_ahash_fb(struct aead_request *req, unsigned int flags)
@@ -379,7 +385,7 @@
 		err = crypto_authenc_genicv(areq, iv, 0);
 	}
 
-	aead_request_complete(areq, err);
+	authenc_request_complete(areq, err);
 }
 
 static int crypto_authenc_encrypt(struct aead_request *req)
@@ -418,7 +424,7 @@
 		err = crypto_authenc_genicv(areq, greq->giv, 0);
 	}
 
-	aead_request_complete(areq, err);
+	authenc_request_complete(areq, err);
 }
 
 static int crypto_authenc_givencrypt(struct aead_givcrypt_request *req)
--- linux-mvl-dove-2.6.32.orig/crypto/cryptd.c
+++ linux-mvl-dove-2.6.32/crypto/cryptd.c
@@ -711,6 +711,13 @@
 }
 EXPORT_SYMBOL_GPL(cryptd_ahash_child);
 
+struct shash_desc *cryptd_shash_desc(struct ahash_request *req)
+{
+	struct cryptd_hash_request_ctx *rctx = ahash_request_ctx(req);
+	return &rctx->desc;
+}
+EXPORT_SYMBOL_GPL(cryptd_shash_desc);
+
 void cryptd_free_ahash(struct cryptd_ahash *tfm)
 {
 	crypto_free_ahash(&tfm->base);
--- linux-mvl-dove-2.6.32.orig/crypto/Kconfig
+++ linux-mvl-dove-2.6.32/crypto/Kconfig
@@ -440,6 +440,15 @@
 	  See also:
 	  <http://planeta.terra.com.br/informatica/paulobarreto/WhirlpoolPage.html>
 
+config CRYPTO_GHASH_CLMUL_NI_INTEL
+	tristate "GHASH digest algorithm (CLMUL-NI accelerated)"
+	depends on (X86 || UML_X86) && 64BIT
+	select CRYPTO_SHASH
+	select CRYPTO_CRYPTD
+	help
+	  GHASH is message digest algorithm for GCM (Galois/Counter Mode).
+	  The implementation is accelerated by CLMUL-NI of Intel.
+
 comment "Ciphers"
 
 config CRYPTO_AES
@@ -812,4 +821,6 @@
 
 source "drivers/crypto/Kconfig"
 
+source "crypto/ocf/Kconfig"
+
 endif	# if CRYPTO
--- linux-mvl-dove-2.6.32.orig/crypto/testmgr.c
+++ linux-mvl-dove-2.6.32/crypto/testmgr.c
@@ -1477,9 +1477,54 @@
 	return err;
 }
 
+static int alg_test_null(const struct alg_test_desc *desc,
+			     const char *driver, u32 type, u32 mask)
+{
+	return 0;
+}
+
 /* Please keep this list sorted by algorithm name. */
 static const struct alg_test_desc alg_test_descs[] = {
 	{
+		.alg = "__driver-cbc-aes-aesni",
+		.test = alg_test_null,
+		.suite = {
+			.cipher = {
+				.enc = {
+					.vecs = NULL,
+					.count = 0
+				},
+				.dec = {
+					.vecs = NULL,
+					.count = 0
+				}
+			}
+		}
+	}, {
+		.alg = "__driver-ecb-aes-aesni",
+		.test = alg_test_null,
+		.suite = {
+			.cipher = {
+				.enc = {
+					.vecs = NULL,
+					.count = 0
+				},
+				.dec = {
+					.vecs = NULL,
+					.count = 0
+				}
+			}
+		}
+	}, {
+		.alg = "__ghash-pclmulqdqni",
+		.test = alg_test_null,
+		.suite = {
+			.hash = {
+				.vecs = NULL,
+				.count = 0
+			}
+		}
+	}, {
 		.alg = "ansi_cprng",
 		.test = alg_test_cprng,
 		.fips_allowed = 1,
@@ -1623,6 +1668,30 @@
 			}
 		}
 	}, {
+		.alg = "cryptd(__driver-ecb-aes-aesni)",
+		.test = alg_test_null,
+		.suite = {
+			.cipher = {
+				.enc = {
+					.vecs = NULL,
+					.count = 0
+				},
+				.dec = {
+					.vecs = NULL,
+					.count = 0
+				}
+			}
+		}
+	}, {
+		.alg = "cryptd(__ghash-pclmulqdqni)",
+		.test = alg_test_null,
+		.suite = {
+			.hash = {
+				.vecs = NULL,
+				.count = 0
+			}
+		}
+	}, {
 		.alg = "ctr(aes)",
 		.test = alg_test_skcipher,
 		.fips_allowed = 1,
@@ -1669,6 +1738,21 @@
 			}
 		}
 	}, {
+		.alg = "ecb(__aes-aesni)",
+		.test = alg_test_null,
+		.suite = {
+			.cipher = {
+				.enc = {
+					.vecs = NULL,
+					.count = 0
+				},
+				.dec = {
+					.vecs = NULL,
+					.count = 0
+				}
+			}
+		}
+	}, {
 		.alg = "ecb(aes)",
 		.test = alg_test_skcipher,
 		.fips_allowed = 1,
--- linux-mvl-dove-2.6.32.orig/crypto/Makefile
+++ linux-mvl-dove-2.6.32/crypto/Makefile
@@ -85,6 +85,7 @@
 obj-$(CONFIG_CRYPTO_TEST) += tcrypt.o
 obj-$(CONFIG_CRYPTO_GHASH) += ghash-generic.o
 
+obj-$(CONFIG_OCF_OCF) += ocf/
 #
 # generic algorithms and the async_tx api
 #
--- linux-mvl-dove-2.6.32.orig/crypto/xor.c
+++ linux-mvl-dove-2.6.32/crypto/xor.c
@@ -25,8 +25,28 @@
 /* The xor routines to use.  */
 static struct xor_block_template *active_template;
 
+#ifdef CONFIG_MV_RAID5_XOR_OFFLOAD
+static void
+cpu_xor_block(unsigned int src_count, unsigned int bytes, void *dest, void **srcs);
+void 
+xor_blocks(unsigned int src_count, unsigned int bytes, void *dest, void **srcs)
+{
+    static int no_xor_offload = 0;
+    if((src_count <= 8) /*&& (no_xor_offload < 10)*/)
+    {
+        if(xor_mv(src_count, bytes, srcs, dest))
+            cpu_xor_block(src_count, bytes, dest, srcs);
+        no_xor_offload++;
+    }
+    else
+	cpu_xor_block(src_count, bytes, dest, srcs);
+}
+static void
+cpu_xor_block(unsigned int src_count, unsigned int bytes, void *dest, void **srcs)
+#else
 void
 xor_blocks(unsigned int src_count, unsigned int bytes, void *dest, void **srcs)
+#endif
 {
 	unsigned long *p1, *p2, *p3, *p4;
 
--- linux-mvl-dove-2.6.32.orig/crypto/async_tx/async_raid6_recov.c
+++ linux-mvl-dove-2.6.32/crypto/async_tx/async_raid6_recov.c
@@ -324,6 +324,7 @@
 async_raid6_2data_recov(int disks, size_t bytes, int faila, int failb,
 			struct page **blocks, struct async_submit_ctl *submit)
 {
+	void *scribble = submit->scribble;
 	int non_zero_srcs, i;
 
 	BUG_ON(faila == failb);
@@ -332,11 +333,13 @@
 
 	pr_debug("%s: disks: %d len: %zu\n", __func__, disks, bytes);
 
-	/* we need to preserve the contents of 'blocks' for the async
-	 * case, so punt to synchronous if a scribble buffer is not available
+	/* if a dma resource is not available or a scribble buffer is not
+	 * available punt to the synchronous path.  In the 'dma not
+	 * available' case be sure to use the scribble buffer to
+	 * preserve the content of 'blocks' as the caller intended.
 	 */
-	if (!submit->scribble) {
-		void **ptrs = (void **) blocks;
+	if (!async_dma_find_channel(DMA_PQ) || !scribble) {
+		void **ptrs = scribble ? scribble : (void **) blocks;
 
 		async_tx_quiesce(&submit->depend_tx);
 		for (i = 0; i < disks; i++)
@@ -406,11 +409,13 @@
 
 	pr_debug("%s: disks: %d len: %zu\n", __func__, disks, bytes);
 
-	/* we need to preserve the contents of 'blocks' for the async
-	 * case, so punt to synchronous if a scribble buffer is not available
+	/* if a dma resource is not available or a scribble buffer is not
+	 * available punt to the synchronous path.  In the 'dma not
+	 * available' case be sure to use the scribble buffer to
+	 * preserve the content of 'blocks' as the caller intended.
 	 */
-	if (!scribble) {
-		void **ptrs = (void **) blocks;
+	if (!async_dma_find_channel(DMA_PQ) || !scribble) {
+		void **ptrs = scribble ? scribble : (void **) blocks;
 
 		async_tx_quiesce(&submit->depend_tx);
 		for (i = 0; i < disks; i++)
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/cryptodev.h
+++ linux-mvl-dove-2.6.32/crypto/ocf/cryptodev.h
@@ -0,0 +1,479 @@
+/*	$FreeBSD: src/sys/opencrypto/cryptodev.h,v 1.25 2007/05/09 19:37:02 gnn Exp $	*/
+/*	$OpenBSD: cryptodev.h,v 1.31 2002/06/11 11:14:29 beck Exp $	*/
+
+/*-
+ * Linux port done by David McCullough <david_mccullough@securecomputing.com>
+ * Copyright (C) 2006-2007 David McCullough
+ * Copyright (C) 2004-2005 Intel Corporation.
+ * The license and original author are listed below.
+ *
+ * The author of this code is Angelos D. Keromytis (angelos@cis.upenn.edu)
+ * Copyright (c) 2002-2006 Sam Leffler, Errno Consulting
+ *
+ * This code was written by Angelos D. Keromytis in Athens, Greece, in
+ * February 2000. Network Security Technologies Inc. (NSTI) kindly
+ * supported the development of this code.
+ *
+ * Copyright (c) 2000 Angelos D. Keromytis
+ *
+ * Permission to use, copy, and modify this software with or without fee
+ * is hereby granted, provided that this entire notice is included in
+ * all source code copies of any software which is or includes a copy or
+ * modification of this software.
+ *
+ * THIS SOFTWARE IS BEING PROVIDED "AS IS", WITHOUT ANY EXPRESS OR
+ * IMPLIED WARRANTY. IN PARTICULAR, NONE OF THE AUTHORS MAKES ANY
+ * REPRESENTATION OR WARRANTY OF ANY KIND CONCERNING THE
+ * MERCHANTABILITY OF THIS SOFTWARE OR ITS FITNESS FOR ANY PARTICULAR
+ * PURPOSE.
+ *
+ * Copyright (c) 2001 Theo de Raadt
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Effort sponsored in part by the Defense Advanced Research Projects
+ * Agency (DARPA) and Air Force Research Laboratory, Air Force
+ * Materiel Command, USAF, under agreement number F30602-01-2-0537.
+ *
+ */
+
+#ifndef _CRYPTO_CRYPTO_H_
+#define _CRYPTO_CRYPTO_H_
+
+/* Some initial values */
+#define CRYPTO_DRIVERS_INITIAL	4
+#define CRYPTO_SW_SESSIONS	32
+
+/* Hash values */
+#define NULL_HASH_LEN		0
+#define MD5_HASH_LEN		16
+#define SHA1_HASH_LEN		20
+#define RIPEMD160_HASH_LEN	20
+#define SHA2_256_HASH_LEN	32
+#define SHA2_384_HASH_LEN	48
+#define SHA2_512_HASH_LEN	64
+#define MD5_KPDK_HASH_LEN	16
+#define SHA1_KPDK_HASH_LEN	20
+/* Maximum hash algorithm result length */
+#define HASH_MAX_LEN		SHA2_512_HASH_LEN /* Keep this updated */
+
+/* HMAC values */
+#define NULL_HMAC_BLOCK_LEN			1
+#define MD5_HMAC_BLOCK_LEN			64
+#define SHA1_HMAC_BLOCK_LEN			64
+#define RIPEMD160_HMAC_BLOCK_LEN	64
+#define SHA2_256_HMAC_BLOCK_LEN		64
+#define SHA2_384_HMAC_BLOCK_LEN		128
+#define SHA2_512_HMAC_BLOCK_LEN		128
+/* Maximum HMAC block length */
+#define HMAC_MAX_BLOCK_LEN		SHA2_512_HMAC_BLOCK_LEN /* Keep this updated */
+#define HMAC_IPAD_VAL			0x36
+#define HMAC_OPAD_VAL			0x5C
+
+/* Encryption algorithm block sizes */
+#define NULL_BLOCK_LEN			1
+#define DES_BLOCK_LEN			8
+#define DES3_BLOCK_LEN			8
+#define BLOWFISH_BLOCK_LEN		8
+#define SKIPJACK_BLOCK_LEN		8
+#define CAST128_BLOCK_LEN		8
+#define RIJNDAEL128_BLOCK_LEN	16
+#define AES_BLOCK_LEN			RIJNDAEL128_BLOCK_LEN
+#define CAMELLIA_BLOCK_LEN		16
+#define ARC4_BLOCK_LEN			1
+#define EALG_MAX_BLOCK_LEN		AES_BLOCK_LEN /* Keep this updated */
+
+/* Encryption algorithm min and max key sizes */
+#define NULL_MIN_KEY_LEN		0
+#define NULL_MAX_KEY_LEN		0
+#define DES_MIN_KEY_LEN			8
+#define DES_MAX_KEY_LEN			8
+#define DES3_MIN_KEY_LEN		24
+#define DES3_MAX_KEY_LEN		24
+#define BLOWFISH_MIN_KEY_LEN	4
+#define BLOWFISH_MAX_KEY_LEN	56
+#define SKIPJACK_MIN_KEY_LEN	10
+#define SKIPJACK_MAX_KEY_LEN	10
+#define CAST128_MIN_KEY_LEN		5
+#define CAST128_MAX_KEY_LEN		16
+#define RIJNDAEL128_MIN_KEY_LEN	16
+#define RIJNDAEL128_MAX_KEY_LEN	32
+#define AES_MIN_KEY_LEN			RIJNDAEL128_MIN_KEY_LEN
+#define AES_MAX_KEY_LEN			RIJNDAEL128_MAX_KEY_LEN
+#define CAMELLIA_MIN_KEY_LEN	16
+#define CAMELLIA_MAX_KEY_LEN	32
+#define ARC4_MIN_KEY_LEN		1
+#define ARC4_MAX_KEY_LEN		256
+
+/* Max size of data that can be processed */
+#define CRYPTO_MAX_DATA_LEN		64*1024 - 1
+
+#define CRYPTO_ALGORITHM_MIN	1
+#define CRYPTO_DES_CBC			1
+#define CRYPTO_3DES_CBC			2
+#define CRYPTO_BLF_CBC			3
+#define CRYPTO_CAST_CBC			4
+#define CRYPTO_SKIPJACK_CBC		5
+#define CRYPTO_MD5_HMAC			6
+#define CRYPTO_SHA1_HMAC		7
+#define CRYPTO_RIPEMD160_HMAC	8
+#define CRYPTO_MD5_KPDK			9
+#define CRYPTO_SHA1_KPDK		10
+#define CRYPTO_RIJNDAEL128_CBC	11 /* 128 bit blocksize */
+#define CRYPTO_AES_CBC			11 /* 128 bit blocksize -- the same as above */
+#define CRYPTO_ARC4				12
+#define CRYPTO_MD5				13
+#define CRYPTO_SHA1				14
+#define CRYPTO_NULL_HMAC		15
+#define CRYPTO_NULL_CBC			16
+#define CRYPTO_DEFLATE_COMP		17 /* Deflate compression algorithm */
+#define CRYPTO_SHA2_256_HMAC	18
+#define CRYPTO_SHA2_384_HMAC	19
+#define CRYPTO_SHA2_512_HMAC	20
+#define CRYPTO_CAMELLIA_CBC		21
+#define CRYPTO_SHA2_256			22
+#define CRYPTO_SHA2_384			23
+#define CRYPTO_SHA2_512			24
+#define CRYPTO_RIPEMD160		25
+#define CRYPTO_ALGORITHM_MAX	25 /* Keep updated - see below */
+
+/* Algorithm flags */
+#define CRYPTO_ALG_FLAG_SUPPORTED	0x01 /* Algorithm is supported */
+#define CRYPTO_ALG_FLAG_RNG_ENABLE	0x02 /* Has HW RNG for DH/DSA */
+#define CRYPTO_ALG_FLAG_DSA_SHA		0x04 /* Can do SHA on msg */
+
+/*
+ * Crypto driver/device flags.  They can set in the crid
+ * parameter when creating a session or submitting a key
+ * op to affect the device/driver assigned.  If neither
+ * of these are specified then the crid is assumed to hold
+ * the driver id of an existing (and suitable) device that
+ * must be used to satisfy the request.
+ */
+#define CRYPTO_FLAG_HARDWARE	0x01000000	/* hardware accelerated */
+#define CRYPTO_FLAG_SOFTWARE	0x02000000	/* software implementation */
+
+/* NB: deprecated */
+struct session_op {
+	u_int32_t	cipher;		/* ie. CRYPTO_DES_CBC */
+	u_int32_t	mac;		/* ie. CRYPTO_MD5_HMAC */
+
+	u_int32_t	keylen;		/* cipher key */
+	caddr_t		key;
+	int		mackeylen;	/* mac key */
+	caddr_t		mackey;
+
+  	u_int32_t	ses;		/* returns: session # */ 
+};
+
+struct session2_op {
+	u_int32_t	cipher;		/* ie. CRYPTO_DES_CBC */
+	u_int32_t	mac;		/* ie. CRYPTO_MD5_HMAC */
+
+	u_int32_t	keylen;		/* cipher key */
+	caddr_t		key;
+	int		mackeylen;	/* mac key */
+	caddr_t		mackey;
+
+  	u_int32_t	ses;		/* returns: session # */ 
+	int		crid;		/* driver id + flags (rw) */
+	int		pad[4];		/* for future expansion */
+};
+
+struct crypt_op {
+	u_int32_t	ses;
+	u_int16_t	op;		/* i.e. COP_ENCRYPT */
+#define COP_NONE	0
+#define COP_ENCRYPT	1
+#define COP_DECRYPT	2
+	u_int16_t	flags;
+#define	COP_F_BATCH	0x0008		/* Batch op if possible */
+	u_int		len;
+	caddr_t		src, dst;	/* become iov[] inside kernel */
+	caddr_t		mac;		/* must be big enough for chosen MAC */
+	caddr_t		iv;
+};
+
+/*
+ * Parameters for looking up a crypto driver/device by
+ * device name or by id.  The latter are returned for
+ * created sessions (crid) and completed key operations.
+ */
+struct crypt_find_op {
+	int		crid;		/* driver id + flags */
+	char		name[32];	/* device/driver name */
+};
+
+/* bignum parameter, in packed bytes, ... */
+struct crparam {
+	caddr_t		crp_p;
+	u_int		crp_nbits;
+};
+
+#define CRK_MAXPARAM	8
+
+struct crypt_kop {
+	u_int		crk_op;		/* ie. CRK_MOD_EXP or other */
+	u_int		crk_status;	/* return status */
+	u_short		crk_iparams;	/* # of input parameters */
+	u_short		crk_oparams;	/* # of output parameters */
+	u_int		crk_crid;	/* NB: only used by CIOCKEY2 (rw) */
+	struct crparam	crk_param[CRK_MAXPARAM];
+};
+#define CRK_ALGORITM_MIN	0
+#define CRK_MOD_EXP		0
+#define CRK_MOD_EXP_CRT		1
+#define CRK_DSA_SIGN		2
+#define CRK_DSA_VERIFY		3
+#define CRK_DH_COMPUTE_KEY	4
+#define CRK_ALGORITHM_MAX	4 /* Keep updated - see below */
+
+#define CRF_MOD_EXP		(1 << CRK_MOD_EXP)
+#define CRF_MOD_EXP_CRT		(1 << CRK_MOD_EXP_CRT)
+#define CRF_DSA_SIGN		(1 << CRK_DSA_SIGN)
+#define CRF_DSA_VERIFY		(1 << CRK_DSA_VERIFY)
+#define CRF_DH_COMPUTE_KEY	(1 << CRK_DH_COMPUTE_KEY)
+
+/*
+ * done against open of /dev/crypto, to get a cloned descriptor.
+ * Please use F_SETFD against the cloned descriptor.
+ */
+#define CRIOGET		_IOWR('c', 100, u_int32_t)
+#define CRIOASYMFEAT	CIOCASYMFEAT
+#define CRIOFINDDEV	CIOCFINDDEV
+
+/* the following are done against the cloned descriptor */
+#define CIOCGSESSION	_IOWR('c', 101, struct session_op)
+#define CIOCFSESSION	_IOW('c', 102, u_int32_t)
+#define CIOCCRYPT	_IOWR('c', 103, struct crypt_op)
+#define CIOCKEY		_IOWR('c', 104, struct crypt_kop)
+#define CIOCASYMFEAT	_IOR('c', 105, u_int32_t)
+#define CIOCGSESSION2	_IOWR('c', 106, struct session2_op)
+#define CIOCKEY2	_IOWR('c', 107, struct crypt_kop)
+#define CIOCFINDDEV	_IOWR('c', 108, struct crypt_find_op)
+
+struct cryptotstat {
+	struct timespec	acc;		/* total accumulated time */
+	struct timespec	min;		/* min time */
+	struct timespec	max;		/* max time */
+	u_int32_t	count;		/* number of observations */
+};
+
+struct cryptostats {
+	u_int32_t	cs_ops;		/* symmetric crypto ops submitted */
+	u_int32_t	cs_errs;	/* symmetric crypto ops that failed */
+	u_int32_t	cs_kops;	/* asymetric/key ops submitted */
+	u_int32_t	cs_kerrs;	/* asymetric/key ops that failed */
+	u_int32_t	cs_intrs;	/* crypto swi thread activations */
+	u_int32_t	cs_rets;	/* crypto return thread activations */
+	u_int32_t	cs_blocks;	/* symmetric op driver block */
+	u_int32_t	cs_kblocks;	/* symmetric op driver block */
+	/*
+	 * When CRYPTO_TIMING is defined at compile time and the
+	 * sysctl debug.crypto is set to 1, the crypto system will
+	 * accumulate statistics about how long it takes to process
+	 * crypto requests at various points during processing.
+	 */
+	struct cryptotstat cs_invoke;	/* crypto_dipsatch -> crypto_invoke */
+	struct cryptotstat cs_done;	/* crypto_invoke -> crypto_done */
+	struct cryptotstat cs_cb;	/* crypto_done -> callback */
+	struct cryptotstat cs_finis;	/* callback -> callback return */
+
+	u_int32_t	cs_drops;		/* crypto ops dropped due to congestion */
+};
+
+#ifdef __KERNEL__
+
+/* Standard initialization structure beginning */
+struct cryptoini {
+	int		cri_alg;	/* Algorithm to use */
+	int		cri_klen;	/* Key length, in bits */
+	int		cri_mlen;	/* Number of bytes we want from the
+					   entire hash. 0 means all. */
+	caddr_t		cri_key;	/* key to use */
+	u_int8_t	cri_iv[EALG_MAX_BLOCK_LEN];	/* IV to use */
+	struct cryptoini *cri_next;
+};
+
+/* Describe boundaries of a single crypto operation */
+struct cryptodesc {
+	int		crd_skip;	/* How many bytes to ignore from start */
+	int		crd_len;	/* How many bytes to process */
+	int		crd_inject;	/* Where to inject results, if applicable */
+	int		crd_flags;
+
+#define CRD_F_ENCRYPT		0x01	/* Set when doing encryption */
+#define CRD_F_IV_PRESENT	0x02	/* When encrypting, IV is already in
+					   place, so don't copy. */
+#define CRD_F_IV_EXPLICIT	0x04	/* IV explicitly provided */
+#define CRD_F_DSA_SHA_NEEDED	0x08	/* Compute SHA-1 of buffer for DSA */
+#define CRD_F_KEY_EXPLICIT	0x10	/* Key explicitly provided */
+#define CRD_F_COMP		0x0f    /* Set when doing compression */
+
+	struct cryptoini	CRD_INI; /* Initialization/context data */
+#define crd_iv		CRD_INI.cri_iv
+#define crd_key		CRD_INI.cri_key
+#define crd_alg		CRD_INI.cri_alg
+#define crd_klen	CRD_INI.cri_klen
+#define crd_mlen	CRD_INI.cri_mlen
+
+	struct cryptodesc *crd_next;
+};
+
+/* Structure describing complete operation */
+struct cryptop {
+	struct list_head crp_next;
+	wait_queue_head_t crp_waitq;
+
+	u_int64_t	crp_sid;	/* Session ID */
+	int		crp_ilen;	/* Input data total length */
+	int		crp_olen;	/* Result total length */
+
+	int		crp_etype;	/*
+					 * Error type (zero means no error).
+					 * All error codes except EAGAIN
+					 * indicate possible data corruption (as in,
+					 * the data have been touched). On all
+					 * errors, the crp_sid may have changed
+					 * (reset to a new one), so the caller
+					 * should always check and use the new
+					 * value on future requests.
+					 */
+	int		crp_flags;
+
+#define CRYPTO_F_SKBUF		0x0001	/* Input/output are skbuf chains */
+#define CRYPTO_F_IOV		0x0002	/* Input/output are uio */
+#define CRYPTO_F_REL		0x0004	/* Must return data in same place */
+#define CRYPTO_F_BATCH		0x0008	/* Batch op if possible */
+#define CRYPTO_F_CBIMM		0x0010	/* Do callback immediately */
+#define CRYPTO_F_DONE		0x0020	/* Operation completed */
+#define CRYPTO_F_CBIFSYNC	0x0040	/* Do CBIMM if op is synchronous */
+
+	caddr_t		crp_buf;	/* Data to be processed */
+	caddr_t		crp_opaque;	/* Opaque pointer, passed along */
+	struct cryptodesc *crp_desc;	/* Linked list of processing descriptors */
+
+	int (*crp_callback)(struct cryptop *); /* Callback function */
+};
+
+#define CRYPTO_BUF_CONTIG	0x0
+#define CRYPTO_BUF_IOV		0x1
+#define CRYPTO_BUF_SKBUF		0x2
+
+#define CRYPTO_OP_DECRYPT	0x0
+#define CRYPTO_OP_ENCRYPT	0x1
+
+/*
+ * Hints passed to process methods.
+ */
+#define CRYPTO_HINT_MORE	0x1	/* more ops coming shortly */
+
+struct cryptkop {
+	struct list_head krp_next;
+	wait_queue_head_t krp_waitq;
+
+	int		krp_flags;
+#define CRYPTO_KF_DONE		0x0001	/* Operation completed */
+#define CRYPTO_KF_CBIMM		0x0002	/* Do callback immediately */
+
+	u_int		krp_op;		/* ie. CRK_MOD_EXP or other */
+	u_int		krp_status;	/* return status */
+	u_short		krp_iparams;	/* # of input parameters */
+	u_short		krp_oparams;	/* # of output parameters */
+	u_int		krp_crid;	/* desired device, etc. */
+	u_int32_t	krp_hid;
+	struct crparam	krp_param[CRK_MAXPARAM];	/* kvm */
+	int		(*krp_callback)(struct cryptkop *);
+};
+
+#include <ocf-compat.h>
+
+/*
+ * Session ids are 64 bits.  The lower 32 bits contain a "local id" which
+ * is a driver-private session identifier.  The upper 32 bits contain a
+ * "hardware id" used by the core crypto code to identify the driver and
+ * a copy of the driver's capabilities that can be used by client code to
+ * optimize operation.
+ */
+#define CRYPTO_SESID2HID(_sid)	(((_sid) >> 32) & 0x00ffffff)
+#define CRYPTO_SESID2CAPS(_sid)	(((_sid) >> 32) & 0xff000000)
+#define CRYPTO_SESID2LID(_sid)	(((u_int32_t) (_sid)) & 0xffffffff)
+
+extern	int crypto_newsession(u_int64_t *sid, struct cryptoini *cri, int hard);
+extern	int crypto_freesession(u_int64_t sid);
+#define CRYPTOCAP_F_HARDWARE	CRYPTO_FLAG_HARDWARE
+#define CRYPTOCAP_F_SOFTWARE	CRYPTO_FLAG_SOFTWARE
+#define CRYPTOCAP_F_SYNC	0x04000000	/* operates synchronously */
+extern	int32_t crypto_get_driverid(device_t dev, int flags);
+extern	int crypto_find_driver(const char *);
+extern	device_t crypto_find_device_byhid(int hid);
+extern	int crypto_getcaps(int hid);
+extern	int crypto_register(u_int32_t driverid, int alg, u_int16_t maxoplen,
+	    u_int32_t flags);
+extern	int crypto_kregister(u_int32_t, int, u_int32_t);
+extern	int crypto_unregister(u_int32_t driverid, int alg);
+extern	int crypto_unregister_all(u_int32_t driverid);
+extern	int crypto_dispatch(struct cryptop *crp);
+extern	int crypto_kdispatch(struct cryptkop *);
+#define CRYPTO_SYMQ	0x1
+#define CRYPTO_ASYMQ	0x2
+extern	int crypto_unblock(u_int32_t, int);
+extern	void crypto_done(struct cryptop *crp);
+extern	void crypto_kdone(struct cryptkop *);
+extern	int crypto_getfeat(int *);
+
+extern	void crypto_freereq(struct cryptop *crp);
+extern	struct cryptop *crypto_getreq(int num);
+
+extern  int crypto_usercrypto;      /* userland may do crypto requests */
+extern  int crypto_userasymcrypto;  /* userland may do asym crypto reqs */
+extern  int crypto_devallowsoft;    /* only use hardware crypto */
+
+/*
+ * random number support,  crypto_unregister_all will unregister
+ */
+extern int crypto_rregister(u_int32_t driverid,
+		int (*read_random)(void *arg, u_int32_t *buf, int len), void *arg);
+extern int crypto_runregister_all(u_int32_t driverid);
+
+/*
+ * Crypto-related utility routines used mainly by drivers.
+ *
+ * XXX these don't really belong here; but for now they're
+ *     kept apart from the rest of the system.
+ */
+struct uio;
+extern	void cuio_copydata(struct uio* uio, int off, int len, caddr_t cp);
+extern	void cuio_copyback(struct uio* uio, int off, int len, caddr_t cp);
+extern	struct iovec *cuio_getptr(struct uio *uio, int loc, int *off);
+
+extern	void crypto_copyback(int flags, caddr_t buf, int off, int size,
+	    caddr_t in);
+extern	void crypto_copydata(int flags, caddr_t buf, int off, int size,
+	    caddr_t out);
+extern	int crypto_apply(int flags, caddr_t buf, int off, int len,
+	    int (*f)(void *, void *, u_int), void *arg);
+
+#endif /* __KERNEL__ */
+#endif /* _CRYPTO_CRYPTO_H_ */
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/criov.c
+++ linux-mvl-dove-2.6.32/crypto/ocf/criov.c
@@ -0,0 +1,215 @@
+/*      $OpenBSD: criov.c,v 1.9 2002/01/29 15:48:29 jason Exp $	*/
+
+/*
+ * Linux port done by David McCullough <david_mccullough@securecomputing.com>
+ * Copyright (C) 2006-2007 David McCullough
+ * Copyright (C) 2004-2005 Intel Corporation.
+ * The license and original author are listed below.
+ *
+ * Copyright (c) 1999 Theo de Raadt
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+__FBSDID("$FreeBSD: src/sys/opencrypto/criov.c,v 1.5 2006/06/04 22:15:13 pjd Exp $");
+ */
+
+#ifndef AUTOCONF_INCLUDED
+#include <linux/config.h>
+#endif
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/uio.h>
+#include <linux/skbuff.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <asm/io.h>
+
+#include <uio.h>
+#include <cryptodev.h>
+
+/*
+ * This macro is only for avoiding code duplication, as we need to skip
+ * given number of bytes in the same way in three functions below.
+ */
+#define	CUIO_SKIP()	do {						\
+	KASSERT(off >= 0, ("%s: off %d < 0", __func__, off));		\
+	KASSERT(len >= 0, ("%s: len %d < 0", __func__, len));		\
+	while (off > 0) {						\
+		KASSERT(iol >= 0, ("%s: empty in skip", __func__));	\
+		if (off < iov->iov_len)					\
+			break;						\
+		off -= iov->iov_len;					\
+		iol--;							\
+		iov++;							\
+	}								\
+} while (0)
+
+void
+cuio_copydata(struct uio* uio, int off, int len, caddr_t cp)
+{
+	struct iovec *iov = uio->uio_iov;
+	int iol = uio->uio_iovcnt;
+	unsigned count;
+
+	CUIO_SKIP();
+	while (len > 0) {
+		KASSERT(iol >= 0, ("%s: empty", __func__));
+		count = min((int)(iov->iov_len - off), len);
+		memcpy(cp, ((caddr_t)iov->iov_base) + off, count);
+		len -= count;
+		cp += count;
+		off = 0;
+		iol--;
+		iov++;
+	}
+}
+
+void
+cuio_copyback(struct uio* uio, int off, int len, caddr_t cp)
+{
+	struct iovec *iov = uio->uio_iov;
+	int iol = uio->uio_iovcnt;
+	unsigned count;
+
+	CUIO_SKIP();
+	while (len > 0) {
+		KASSERT(iol >= 0, ("%s: empty", __func__));
+		count = min((int)(iov->iov_len - off), len);
+		memcpy(((caddr_t)iov->iov_base) + off, cp, count);
+		len -= count;
+		cp += count;
+		off = 0;
+		iol--;
+		iov++;
+	}
+}
+
+/*
+ * Return a pointer to iov/offset of location in iovec list.
+ */
+struct iovec *
+cuio_getptr(struct uio *uio, int loc, int *off)
+{
+	struct iovec *iov = uio->uio_iov;
+	int iol = uio->uio_iovcnt;
+
+	while (loc >= 0) {
+		/* Normal end of search */
+		if (loc < iov->iov_len) {
+	    		*off = loc;
+	    		return (iov);
+		}
+
+		loc -= iov->iov_len;
+		if (iol == 0) {
+			if (loc == 0) {
+				/* Point at the end of valid data */
+				*off = iov->iov_len;
+				return (iov);
+			} else
+				return (NULL);
+		} else {
+			iov++, iol--;
+		}
+    	}
+
+	return (NULL);
+}
+
+EXPORT_SYMBOL(cuio_copyback);
+EXPORT_SYMBOL(cuio_copydata);
+EXPORT_SYMBOL(cuio_getptr);
+
+
+static void
+skb_copy_bits_back(struct sk_buff *skb, int offset, caddr_t cp, int len)
+{
+	int i;
+	if (offset < skb_headlen(skb)) {
+		memcpy(skb->data + offset, cp, min_t(int, skb_headlen(skb), len));
+		len -= skb_headlen(skb);
+		cp += skb_headlen(skb);
+	}
+	offset -= skb_headlen(skb);
+	for (i = 0; len > 0 && i < skb_shinfo(skb)->nr_frags; i++) {
+		if (offset < skb_shinfo(skb)->frags[i].size) {
+			memcpy(page_address(skb_shinfo(skb)->frags[i].page) +
+					skb_shinfo(skb)->frags[i].page_offset,
+					cp, min_t(int, skb_shinfo(skb)->frags[i].size, len));
+			len -= skb_shinfo(skb)->frags[i].size;
+			cp += skb_shinfo(skb)->frags[i].size;
+		}
+		offset -= skb_shinfo(skb)->frags[i].size;
+	}
+}
+
+void
+crypto_copyback(int flags, caddr_t buf, int off, int size, caddr_t in)
+{
+
+	if ((flags & CRYPTO_F_SKBUF) != 0)
+		skb_copy_bits_back((struct sk_buff *)buf, off, in, size);
+	else if ((flags & CRYPTO_F_IOV) != 0)
+		cuio_copyback((struct uio *)buf, off, size, in);
+	else
+		bcopy(in, buf + off, size);
+}
+
+void
+crypto_copydata(int flags, caddr_t buf, int off, int size, caddr_t out)
+{
+
+	if ((flags & CRYPTO_F_SKBUF) != 0)
+		skb_copy_bits((struct sk_buff *)buf, off, out, size);
+	else if ((flags & CRYPTO_F_IOV) != 0)
+		cuio_copydata((struct uio *)buf, off, size, out);
+	else
+		bcopy(buf + off, out, size);
+}
+
+int
+crypto_apply(int flags, caddr_t buf, int off, int len,
+    int (*f)(void *, void *, u_int), void *arg)
+{
+#if 0
+	int error;
+
+	if ((flags & CRYPTO_F_SKBUF) != 0)
+		error = XXXXXX((struct mbuf *)buf, off, len, f, arg);
+	else if ((flags & CRYPTO_F_IOV) != 0)
+		error = cuio_apply((struct uio *)buf, off, len, f, arg);
+	else
+		error = (*f)(arg, buf + off, len);
+	return (error);
+#else
+	KASSERT(0, ("crypto_apply not implemented!\n"));
+#endif
+	return 0;
+}
+
+EXPORT_SYMBOL(crypto_copyback);
+EXPORT_SYMBOL(crypto_copydata);
+EXPORT_SYMBOL(crypto_apply);
+
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/cryptodev.c
+++ linux-mvl-dove-2.6.32/crypto/ocf/cryptodev.c
@@ -0,0 +1,1061 @@
+/*	$OpenBSD: cryptodev.c,v 1.52 2002/06/19 07:22:46 deraadt Exp $	*/
+
+/*-
+ * Linux port done by David McCullough <david_mccullough@securecomputing.com>
+ * Copyright (C) 2006-2007 David McCullough
+ * Copyright (C) 2004-2005 Intel Corporation.
+ * The license and original author are listed below.
+ *
+ * Copyright (c) 2001 Theo de Raadt
+ * Copyright (c) 2002-2006 Sam Leffler, Errno Consulting
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Effort sponsored in part by the Defense Advanced Research Projects
+ * Agency (DARPA) and Air Force Research Laboratory, Air Force
+ * Materiel Command, USAF, under agreement number F30602-01-2-0537.
+ *
+__FBSDID("$FreeBSD: src/sys/opencrypto/cryptodev.c,v 1.34 2007/05/09 19:37:02 gnn Exp $");
+ */
+
+#ifndef AUTOCONF_INCLUDED
+#include <linux/config.h>
+#endif
+#include <linux/types.h>
+#include <linux/time.h>
+#include <linux/delay.h>
+#include <linux/list.h>
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/unistd.h>
+#include <linux/module.h>
+#include <linux/wait.h>
+#include <linux/slab.h>
+#include <linux/fs.h>
+#include <linux/dcache.h>
+#include <linux/file.h>
+#include <linux/mount.h>
+#include <linux/miscdevice.h>
+#include <linux/version.h>
+#include <asm/uaccess.h>
+
+#include <cryptodev.h>
+#include <uio.h>
+
+extern asmlinkage long sys_dup(unsigned int fildes);
+
+#define debug cryptodev_debug
+int cryptodev_debug = 0;
+module_param(cryptodev_debug, int, 0644);
+MODULE_PARM_DESC(cryptodev_debug, "Enable cryptodev debug");
+
+struct csession_info {
+	u_int16_t	blocksize;
+	u_int16_t	minkey, maxkey;
+
+	u_int16_t	keysize;
+	/* u_int16_t	hashsize;  */
+	u_int16_t	authsize;
+	u_int16_t	authkey;
+	/* u_int16_t	ctxsize; */
+};
+
+struct csession {
+	struct list_head	list;
+	u_int64_t	sid;
+	u_int32_t	ses;
+
+	wait_queue_head_t waitq;
+
+	u_int32_t	cipher;
+
+	u_int32_t	mac;
+
+	caddr_t		key;
+	int		keylen;
+	u_char		tmp_iv[EALG_MAX_BLOCK_LEN];
+
+	caddr_t		mackey;
+	int		mackeylen;
+
+	struct csession_info info;
+
+	struct iovec	iovec;
+	struct uio	uio;
+	int		error;
+};
+
+struct fcrypt {
+	struct list_head	csessions;
+	int		sesn;
+};
+
+static struct csession *csefind(struct fcrypt *, u_int);
+static int csedelete(struct fcrypt *, struct csession *);
+static struct csession *cseadd(struct fcrypt *, struct csession *);
+static struct csession *csecreate(struct fcrypt *, u_int64_t,
+		struct cryptoini *crie, struct cryptoini *cria, struct csession_info *);
+static int csefree(struct csession *);
+
+static	int cryptodev_op(struct csession *, struct crypt_op *);
+static	int cryptodev_key(struct crypt_kop *);
+static	int cryptodev_find(struct crypt_find_op *);
+
+static int cryptodev_cb(void *);
+static int cryptodev_open(struct inode *inode, struct file *filp);
+
+/*
+ * Check a crypto identifier to see if it requested
+ * a valid crid and it's capabilities match.
+ */
+static int
+checkcrid(int crid)
+{
+	int hid = crid & ~(CRYPTOCAP_F_SOFTWARE | CRYPTOCAP_F_HARDWARE);
+	int typ = crid & (CRYPTOCAP_F_SOFTWARE | CRYPTOCAP_F_HARDWARE);
+	int caps = 0;
+	
+	/* if the user hasn't selected a driver, then just call newsession */
+	if (hid == 0 && typ != 0)
+		return 0;
+
+	caps = crypto_getcaps(hid);
+
+	/* didn't find anything with capabilities */
+	if (caps == 0) {
+		dprintk("%s: hid=%x typ=%x not matched\n", __FUNCTION__, hid, typ);
+		return EINVAL;
+	}
+	
+	/* the user didn't specify SW or HW, so the driver is ok */
+	if (typ == 0)
+		return 0;
+
+	/* if the type specified didn't match */
+	if (typ != (caps & (CRYPTOCAP_F_SOFTWARE | CRYPTOCAP_F_HARDWARE))) {
+		dprintk("%s: hid=%x typ=%x caps=%x not matched\n", __FUNCTION__,
+				hid, typ, caps);
+		return EINVAL;
+	}
+
+	return 0;
+}
+
+static int
+cryptodev_op(struct csession *cse, struct crypt_op *cop)
+{
+	struct cryptop *crp = NULL;
+	struct cryptodesc *crde = NULL, *crda = NULL;
+	int error = 0;
+
+	dprintk("%s()\n", __FUNCTION__);
+	if (cop->len > CRYPTO_MAX_DATA_LEN) {
+		dprintk("%s: %d > %d\n", __FUNCTION__, cop->len, CRYPTO_MAX_DATA_LEN);
+		return (E2BIG);
+	}
+
+	if (cse->info.blocksize && (cop->len % cse->info.blocksize) != 0) {
+		dprintk("%s: blocksize=%d len=%d\n", __FUNCTION__, cse->info.blocksize,
+				cop->len);
+		return (EINVAL);
+	}
+
+	cse->uio.uio_iov = &cse->iovec;
+	cse->uio.uio_iovcnt = 1;
+	cse->uio.uio_offset = 0;
+#if 0
+	cse->uio.uio_resid = cop->len;
+	cse->uio.uio_segflg = UIO_SYSSPACE;
+	cse->uio.uio_rw = UIO_WRITE;
+	cse->uio.uio_td = td;
+#endif
+	cse->uio.uio_iov[0].iov_len = cop->len;
+	if (cse->info.authsize)
+		cse->uio.uio_iov[0].iov_len += cse->info.authsize;
+	cse->uio.uio_iov[0].iov_base = kmalloc(cse->uio.uio_iov[0].iov_len,
+			GFP_KERNEL);
+
+	if (cse->uio.uio_iov[0].iov_base == NULL) {
+		dprintk("%s: iov_base kmalloc(%d) failed\n", __FUNCTION__,
+				cse->uio.uio_iov[0].iov_len);
+		return (ENOMEM);
+	}
+
+	crp = crypto_getreq((cse->info.blocksize != 0) + (cse->info.authsize != 0));
+	if (crp == NULL) {
+		dprintk("%s: ENOMEM\n", __FUNCTION__);
+		error = ENOMEM;
+		goto bail;
+	}
+
+	if (cse->info.authsize && cse->info.blocksize) {
+		if (cop->op == COP_ENCRYPT) {
+			crde = crp->crp_desc;
+			crda = crde->crd_next;
+		} else {
+			crda = crp->crp_desc;
+			crde = crda->crd_next;
+		}
+	} else if (cse->info.authsize) {
+		crda = crp->crp_desc;
+	} else if (cse->info.blocksize) {
+		crde = crp->crp_desc;
+	} else {
+		dprintk("%s: bad request\n", __FUNCTION__);
+		error = EINVAL;
+		goto bail;
+	}
+
+	if ((error = copy_from_user(cse->uio.uio_iov[0].iov_base, cop->src,
+					cop->len))) {
+		dprintk("%s: bad copy\n", __FUNCTION__);
+		goto bail;
+	}
+
+	if (crda) {
+		crda->crd_skip = 0;
+		crda->crd_len = cop->len;
+		crda->crd_inject = cop->len;
+
+		crda->crd_alg = cse->mac;
+		crda->crd_key = cse->mackey;
+		crda->crd_klen = cse->mackeylen * 8;
+	}
+
+	if (crde) {
+		if (cop->op == COP_ENCRYPT)
+			crde->crd_flags |= CRD_F_ENCRYPT;
+		else
+			crde->crd_flags &= ~CRD_F_ENCRYPT;
+		crde->crd_len = cop->len;
+		crde->crd_inject = 0;
+
+		crde->crd_alg = cse->cipher;
+		crde->crd_key = cse->key;
+		crde->crd_klen = cse->keylen * 8;
+	}
+
+	crp->crp_ilen = cse->uio.uio_iov[0].iov_len;
+	crp->crp_flags = CRYPTO_F_IOV | CRYPTO_F_CBIMM
+		       | (cop->flags & COP_F_BATCH);
+	crp->crp_buf = (caddr_t)&cse->uio;
+	crp->crp_callback = (int (*) (struct cryptop *)) cryptodev_cb;
+	crp->crp_sid = cse->sid;
+	crp->crp_opaque = (void *)cse;
+
+	if (cop->iv) {
+		if (crde == NULL) {
+			error = EINVAL;
+			dprintk("%s no crde\n", __FUNCTION__);
+			goto bail;
+		}
+		if (cse->cipher == CRYPTO_ARC4) { /* XXX use flag? */
+			error = EINVAL;
+			dprintk("%s arc4 with IV\n", __FUNCTION__);
+			goto bail;
+		}
+		if ((error = copy_from_user(cse->tmp_iv, cop->iv,
+						cse->info.blocksize))) {
+			dprintk("%s bad iv copy\n", __FUNCTION__);
+			goto bail;
+		}
+		memcpy(crde->crd_iv, cse->tmp_iv, cse->info.blocksize);
+		crde->crd_flags |= CRD_F_IV_EXPLICIT | CRD_F_IV_PRESENT;
+		crde->crd_skip = 0;
+	} else if (cse->cipher == CRYPTO_ARC4) { /* XXX use flag? */
+		crde->crd_skip = 0;
+	} else if (crde) {
+		crde->crd_flags |= CRD_F_IV_PRESENT;
+		crde->crd_skip = cse->info.blocksize;
+		crde->crd_len -= cse->info.blocksize;
+	}
+
+	if (cop->mac && crda == NULL) {
+		error = EINVAL;
+		dprintk("%s no crda\n", __FUNCTION__);
+		goto bail;
+	}
+
+	/*
+	 * Let the dispatch run unlocked, then, interlock against the
+	 * callback before checking if the operation completed and going
+	 * to sleep.  This insures drivers don't inherit our lock which
+	 * results in a lock order reversal between crypto_dispatch forced
+	 * entry and the crypto_done callback into us.
+	 */
+	error = crypto_dispatch(crp);
+	if (error) {
+		dprintk("%s error in crypto_dispatch\n", __FUNCTION__);
+		goto bail;
+	}
+
+	dprintk("%s about to WAIT\n", __FUNCTION__);
+	/*
+	 * we really need to wait for driver to complete to maintain
+	 * state,  luckily interrupts will be remembered
+	 */
+	do {
+		error = wait_event_interruptible(crp->crp_waitq,
+				((crp->crp_flags & CRYPTO_F_DONE) != 0));
+		/*
+		 * we can't break out of this loop or we will leave behind
+		 * a huge mess,  however,  staying here means if your driver
+		 * is broken user applications can hang and not be killed.
+		 * The solution,  fix your driver :-)
+		 */
+		if (error) {
+			schedule();
+			error = 0;
+		}
+	} while ((crp->crp_flags & CRYPTO_F_DONE) == 0);
+	dprintk("%s finished WAITING error=%d\n", __FUNCTION__, error);
+
+	if (crp->crp_etype != 0) {
+		error = crp->crp_etype;
+		dprintk("%s error in crp processing\n", __FUNCTION__);
+		goto bail;
+	}
+
+	if (cse->error) {
+		error = cse->error;
+		dprintk("%s error in cse processing\n", __FUNCTION__);
+		goto bail;
+	}
+
+	if (cop->dst && (error = copy_to_user(cop->dst,
+					cse->uio.uio_iov[0].iov_base, cop->len))) {
+		dprintk("%s bad dst copy\n", __FUNCTION__);
+		goto bail;
+	}
+
+	if (cop->mac &&
+			(error=copy_to_user(cop->mac,
+				(caddr_t)cse->uio.uio_iov[0].iov_base + cop->len,
+				cse->info.authsize))) {
+		dprintk("%s bad mac copy\n", __FUNCTION__);
+		goto bail;
+	}
+
+bail:
+	if (crp)
+		crypto_freereq(crp);
+	if (cse->uio.uio_iov[0].iov_base)
+		kfree(cse->uio.uio_iov[0].iov_base);
+
+	return (error);
+}
+
+static int
+cryptodev_cb(void *op)
+{
+	struct cryptop *crp = (struct cryptop *) op;
+	struct csession *cse = (struct csession *)crp->crp_opaque;
+	int error;
+
+	dprintk("%s()\n", __FUNCTION__);
+	error = crp->crp_etype;
+	if (error == EAGAIN) {
+		crp->crp_flags &= ~CRYPTO_F_DONE;
+#ifdef NOTYET
+		/*
+		 * DAVIDM I am fairly sure that we should turn this into a batch
+		 * request to stop bad karma/lockup, revisit
+		 */
+		crp->crp_flags |= CRYPTO_F_BATCH;
+#endif
+		return crypto_dispatch(crp);
+	}
+	if (error != 0 || (crp->crp_flags & CRYPTO_F_DONE)) {
+		cse->error = error;
+		wake_up_interruptible(&crp->crp_waitq);
+	}
+	return (0);
+}
+
+static int
+cryptodevkey_cb(void *op)
+{
+	struct cryptkop *krp = (struct cryptkop *) op;
+	dprintk("%s()\n", __FUNCTION__);
+	wake_up_interruptible(&krp->krp_waitq);
+	return (0);
+}
+
+static int
+cryptodev_key(struct crypt_kop *kop)
+{
+	struct cryptkop *krp = NULL;
+	int error = EINVAL;
+	int in, out, size, i;
+
+	dprintk("%s()\n", __FUNCTION__);
+	if (kop->crk_iparams + kop->crk_oparams > CRK_MAXPARAM) {
+		dprintk("%s params too big\n", __FUNCTION__);
+		return (EFBIG);
+	}
+
+	in = kop->crk_iparams;
+	out = kop->crk_oparams;
+	switch (kop->crk_op) {
+	case CRK_MOD_EXP:
+		if (in == 3 && out == 1)
+			break;
+		return (EINVAL);
+	case CRK_MOD_EXP_CRT:
+		if (in == 6 && out == 1)
+			break;
+		return (EINVAL);
+	case CRK_DSA_SIGN:
+		if (in == 5 && out == 2)
+			break;
+		return (EINVAL);
+	case CRK_DSA_VERIFY:
+		if (in == 7 && out == 0)
+			break;
+		return (EINVAL);
+	case CRK_DH_COMPUTE_KEY:
+		if (in == 3 && out == 1)
+			break;
+		return (EINVAL);
+	default:
+		return (EINVAL);
+	}
+
+	krp = (struct cryptkop *)kmalloc(sizeof *krp, GFP_KERNEL);
+	if (!krp)
+		return (ENOMEM);
+	bzero(krp, sizeof *krp);
+	krp->krp_op = kop->crk_op;
+	krp->krp_status = kop->crk_status;
+	krp->krp_iparams = kop->crk_iparams;
+	krp->krp_oparams = kop->crk_oparams;
+	krp->krp_crid = kop->crk_crid;
+	krp->krp_status = 0;
+	krp->krp_flags = CRYPTO_KF_CBIMM;
+	krp->krp_callback = (int (*) (struct cryptkop *)) cryptodevkey_cb;
+	init_waitqueue_head(&krp->krp_waitq);
+
+	for (i = 0; i < CRK_MAXPARAM; i++)
+		krp->krp_param[i].crp_nbits = kop->crk_param[i].crp_nbits;
+	for (i = 0; i < krp->krp_iparams + krp->krp_oparams; i++) {
+		size = (krp->krp_param[i].crp_nbits + 7) / 8;
+		if (size == 0)
+			continue;
+		krp->krp_param[i].crp_p = (caddr_t) kmalloc(size, GFP_KERNEL);
+		if (i >= krp->krp_iparams)
+			continue;
+		error = copy_from_user(krp->krp_param[i].crp_p,
+				kop->crk_param[i].crp_p, size);
+		if (error)
+			goto fail;
+	}
+
+	error = crypto_kdispatch(krp);
+	if (error)
+		goto fail;
+
+	do {
+		error = wait_event_interruptible(krp->krp_waitq,
+				((krp->krp_flags & CRYPTO_KF_DONE) != 0));
+		/*
+		 * we can't break out of this loop or we will leave behind
+		 * a huge mess,  however,  staying here means if your driver
+		 * is broken user applications can hang and not be killed.
+		 * The solution,  fix your driver :-)
+		 */
+		if (error) {
+			schedule();
+			error = 0;
+		}
+	} while ((krp->krp_flags & CRYPTO_KF_DONE) == 0);
+
+	dprintk("%s finished WAITING error=%d\n", __FUNCTION__, error);
+	
+	kop->crk_crid = krp->krp_crid;		/* device that did the work */
+	if (krp->krp_status != 0) {
+		error = krp->krp_status;
+		goto fail;
+	}
+
+	for (i = krp->krp_iparams; i < krp->krp_iparams + krp->krp_oparams; i++) {
+		size = (krp->krp_param[i].crp_nbits + 7) / 8;
+		if (size == 0)
+			continue;
+		error = copy_to_user(kop->crk_param[i].crp_p, krp->krp_param[i].crp_p,
+				size);
+		if (error)
+			goto fail;
+	}
+
+fail:
+	if (krp) {
+		kop->crk_status = krp->krp_status;
+		for (i = 0; i < CRK_MAXPARAM; i++) {
+			if (krp->krp_param[i].crp_p)
+				kfree(krp->krp_param[i].crp_p);
+		}
+		kfree(krp);
+	}
+	return (error);
+}
+
+static int
+cryptodev_find(struct crypt_find_op *find)
+{
+	device_t dev;
+
+	if (find->crid != -1) {
+		dev = crypto_find_device_byhid(find->crid);
+		if (dev == NULL)
+			return (ENOENT);
+		strlcpy(find->name, device_get_nameunit(dev),
+		    sizeof(find->name));
+	} else {
+		find->crid = crypto_find_driver(find->name);
+		if (find->crid == -1)
+			return (ENOENT);
+	}
+	return (0);
+}
+
+static struct csession *
+csefind(struct fcrypt *fcr, u_int ses)
+{
+	struct csession *cse;
+
+	dprintk("%s()\n", __FUNCTION__);
+	list_for_each_entry(cse, &fcr->csessions, list)
+		if (cse->ses == ses)
+			return (cse);
+	return (NULL);
+}
+
+static int
+csedelete(struct fcrypt *fcr, struct csession *cse_del)
+{
+	struct csession *cse;
+
+	dprintk("%s()\n", __FUNCTION__);
+	list_for_each_entry(cse, &fcr->csessions, list) {
+		if (cse == cse_del) {
+			list_del(&cse->list);
+			return (1);
+		}
+	}
+	return (0);
+}
+	
+static struct csession *
+cseadd(struct fcrypt *fcr, struct csession *cse)
+{
+	dprintk("%s()\n", __FUNCTION__);
+	list_add_tail(&cse->list, &fcr->csessions);
+	cse->ses = fcr->sesn++;
+	return (cse);
+}
+
+static struct csession *
+csecreate(struct fcrypt *fcr, u_int64_t sid, struct cryptoini *crie,
+	struct cryptoini *cria, struct csession_info *info)
+{
+	struct csession *cse;
+
+	dprintk("%s()\n", __FUNCTION__);
+	cse = (struct csession *) kmalloc(sizeof(struct csession), GFP_KERNEL);
+	if (cse == NULL)
+		return NULL;
+	memset(cse, 0, sizeof(struct csession));
+
+	INIT_LIST_HEAD(&cse->list);
+	init_waitqueue_head(&cse->waitq);
+
+	cse->key = crie->cri_key;
+	cse->keylen = crie->cri_klen/8;
+	cse->mackey = cria->cri_key;
+	cse->mackeylen = cria->cri_klen/8;
+	cse->sid = sid;
+	cse->cipher = crie->cri_alg;
+	cse->mac = cria->cri_alg;
+	cse->info = *info;
+	cseadd(fcr, cse);
+	return (cse);
+}
+
+static int
+csefree(struct csession *cse)
+{
+	int error;
+
+	dprintk("%s()\n", __FUNCTION__);
+	error = crypto_freesession(cse->sid);
+	if (cse->key)
+		kfree(cse->key);
+	if (cse->mackey)
+		kfree(cse->mackey);
+	kfree(cse);
+	return(error);
+}
+
+static int
+cryptodev_ioctl(
+	struct inode *inode,
+	struct file *filp,
+	unsigned int cmd,
+	unsigned long arg)
+{
+	struct cryptoini cria, crie;
+	struct fcrypt *fcr = filp->private_data;
+	struct csession *cse;
+	struct csession_info info;
+	struct session2_op sop;
+	struct crypt_op cop;
+	struct crypt_kop kop;
+	struct crypt_find_op fop;
+	u_int64_t sid;
+	u_int32_t ses;
+	int feat, fd, error = 0, crid;
+	mm_segment_t fs;
+
+	dprintk("%s(cmd=%x arg=%lx)\n", __FUNCTION__, cmd, arg);
+
+	switch (cmd) {
+
+	case CRIOGET: {
+		dprintk("%s(CRIOGET)\n", __FUNCTION__);
+		fs = get_fs();
+		set_fs(get_ds());
+		for (fd = 0; fd < files_fdtable(current->files)->max_fds; fd++)
+			if (files_fdtable(current->files)->fd[fd] == filp)
+				break;
+		fd = sys_dup(fd);
+		set_fs(fs);
+		put_user(fd, (int *) arg);
+		return IS_ERR_VALUE(fd) ? fd : 0;
+		}
+
+#define	CIOCGSESSSTR	(cmd == CIOCGSESSION ? "CIOCGSESSION" : "CIOCGSESSION2")
+	case CIOCGSESSION:
+	case CIOCGSESSION2:
+		dprintk("%s(%s)\n", __FUNCTION__, CIOCGSESSSTR);
+		memset(&crie, 0, sizeof(crie));
+		memset(&cria, 0, sizeof(cria));
+		memset(&info, 0, sizeof(info));
+		memset(&sop, 0, sizeof(sop));
+
+		if (copy_from_user(&sop, (void*)arg, (cmd == CIOCGSESSION) ?
+					sizeof(struct session_op) : sizeof(sop))) {
+			dprintk("%s(%s) - bad copy\n", __FUNCTION__, CIOCGSESSSTR);
+			error = EFAULT;
+			goto bail;
+		}
+
+		switch (sop.cipher) {
+		case 0:
+			dprintk("%s(%s) - no cipher\n", __FUNCTION__, CIOCGSESSSTR);
+			break;
+		case CRYPTO_NULL_CBC:
+			info.blocksize = NULL_BLOCK_LEN;
+			info.minkey = NULL_MIN_KEY_LEN;
+			info.maxkey = NULL_MAX_KEY_LEN;
+			break;
+		case CRYPTO_DES_CBC:
+			info.blocksize = DES_BLOCK_LEN;
+			info.minkey = DES_MIN_KEY_LEN;
+			info.maxkey = DES_MAX_KEY_LEN;
+			break;
+		case CRYPTO_3DES_CBC:
+			info.blocksize = DES3_BLOCK_LEN;
+			info.minkey = DES3_MIN_KEY_LEN;
+			info.maxkey = DES3_MAX_KEY_LEN;
+			break;
+		case CRYPTO_BLF_CBC:
+			info.blocksize = BLOWFISH_BLOCK_LEN;
+			info.minkey = BLOWFISH_MIN_KEY_LEN;
+			info.maxkey = BLOWFISH_MAX_KEY_LEN;
+			break;
+		case CRYPTO_CAST_CBC:
+			info.blocksize = CAST128_BLOCK_LEN;
+			info.minkey = CAST128_MIN_KEY_LEN;
+			info.maxkey = CAST128_MAX_KEY_LEN;
+			break;
+		case CRYPTO_SKIPJACK_CBC:
+			info.blocksize = SKIPJACK_BLOCK_LEN;
+			info.minkey = SKIPJACK_MIN_KEY_LEN;
+			info.maxkey = SKIPJACK_MAX_KEY_LEN;
+			break;
+		case CRYPTO_AES_CBC:
+			info.blocksize = AES_BLOCK_LEN;
+			info.minkey = AES_MIN_KEY_LEN;
+			info.maxkey = AES_MAX_KEY_LEN;
+			break;
+		case CRYPTO_ARC4:
+			info.blocksize = ARC4_BLOCK_LEN;
+			info.minkey = ARC4_MIN_KEY_LEN;
+			info.maxkey = ARC4_MAX_KEY_LEN;
+			break;
+		case CRYPTO_CAMELLIA_CBC:
+			info.blocksize = CAMELLIA_BLOCK_LEN;
+			info.minkey = CAMELLIA_MIN_KEY_LEN;
+			info.maxkey = CAMELLIA_MAX_KEY_LEN;
+			break;
+		default:
+			dprintk("%s(%s) - bad cipher\n", __FUNCTION__, CIOCGSESSSTR);
+			error = EINVAL;
+			goto bail;
+		}
+
+		switch (sop.mac) {
+		case 0:
+			dprintk("%s(%s) - no mac\n", __FUNCTION__, CIOCGSESSSTR);
+			break;
+		case CRYPTO_NULL_HMAC:
+			info.authsize = NULL_HASH_LEN;
+			break;
+		case CRYPTO_MD5:
+			info.authsize = MD5_HASH_LEN;
+			break;
+		case CRYPTO_SHA1:
+			info.authsize = SHA1_HASH_LEN;
+			break;
+		case CRYPTO_SHA2_256:
+			info.authsize = SHA2_256_HASH_LEN;
+			break;
+		case CRYPTO_SHA2_384:
+			info.authsize = SHA2_384_HASH_LEN;
+  			break;
+		case CRYPTO_SHA2_512:
+			info.authsize = SHA2_512_HASH_LEN;
+			break;
+		case CRYPTO_RIPEMD160:
+			info.authsize = RIPEMD160_HASH_LEN;
+			break;
+		case CRYPTO_MD5_HMAC:
+			info.authsize = MD5_HASH_LEN;
+			info.authkey = 16;
+			break;
+		case CRYPTO_SHA1_HMAC:
+			info.authsize = SHA1_HASH_LEN;
+			info.authkey = 20;
+			break;
+		case CRYPTO_SHA2_256_HMAC:
+			info.authsize = SHA2_256_HASH_LEN;
+			info.authkey = 32;
+			break;
+		case CRYPTO_SHA2_384_HMAC:
+			info.authsize = SHA2_384_HASH_LEN;
+			info.authkey = 48;
+  			break;
+		case CRYPTO_SHA2_512_HMAC:
+			info.authsize = SHA2_512_HASH_LEN;
+			info.authkey = 64;
+			break;
+		case CRYPTO_RIPEMD160_HMAC:
+			info.authsize = RIPEMD160_HASH_LEN;
+			info.authkey = 20;
+			break;
+		default:
+			dprintk("%s(%s) - bad mac\n", __FUNCTION__, CIOCGSESSSTR);
+			error = EINVAL;
+			goto bail;
+		}
+
+		if (info.blocksize) {
+			crie.cri_alg = sop.cipher;
+			crie.cri_klen = sop.keylen * 8;
+			if ((info.maxkey && sop.keylen > info.maxkey) ||
+				   	sop.keylen < info.minkey) {
+				dprintk("%s(%s) - bad key\n", __FUNCTION__, CIOCGSESSSTR);
+				error = EINVAL;
+				goto bail;
+			}
+
+			crie.cri_key = (u_int8_t *) kmalloc(crie.cri_klen/8+1, GFP_KERNEL);
+			if (copy_from_user(crie.cri_key, sop.key,
+							crie.cri_klen/8)) {
+				dprintk("%s(%s) - bad copy\n", __FUNCTION__, CIOCGSESSSTR);
+				error = EFAULT;
+				goto bail;
+			}
+			if (info.authsize)
+				crie.cri_next = &cria;
+		}
+
+		if (info.authsize) {
+			cria.cri_alg = sop.mac;
+			cria.cri_klen = sop.mackeylen * 8;
+			if (info.authkey && sop.mackeylen != info.authkey) {
+				dprintk("%s(%s) - mackeylen %d != %d\n", __FUNCTION__,
+						CIOCGSESSSTR, sop.mackeylen, info.authkey);
+				error = EINVAL;
+				goto bail;
+			}
+
+			if (cria.cri_klen) {
+				cria.cri_key = (u_int8_t *) kmalloc(cria.cri_klen/8,GFP_KERNEL);
+				if (copy_from_user(cria.cri_key, sop.mackey,
+								cria.cri_klen / 8)) {
+					dprintk("%s(%s) - bad copy\n", __FUNCTION__, CIOCGSESSSTR);
+					error = EFAULT;
+					goto bail;
+				}
+			}
+		}
+
+		/* NB: CIOGSESSION2 has the crid */
+		if (cmd == CIOCGSESSION2) {
+			crid = sop.crid;
+			error = checkcrid(crid);
+			if (error) {
+				dprintk("%s(%s) - checkcrid %x\n", __FUNCTION__,
+						CIOCGSESSSTR, error);
+				goto bail;
+			}
+		} else {
+			/* allow either HW or SW to be used */
+			crid = CRYPTOCAP_F_HARDWARE | CRYPTOCAP_F_SOFTWARE;
+		}
+		error = crypto_newsession(&sid, (info.blocksize ? &crie : &cria), crid);
+		if (error) {
+			dprintk("%s(%s) - newsession %d\n",__FUNCTION__,CIOCGSESSSTR,error);
+			goto bail;
+		}
+
+		cse = csecreate(fcr, sid, &crie, &cria, &info);
+		if (cse == NULL) {
+			crypto_freesession(sid);
+			error = EINVAL;
+			dprintk("%s(%s) - csecreate failed\n", __FUNCTION__, CIOCGSESSSTR);
+			goto bail;
+		}
+		sop.ses = cse->ses;
+
+		if (cmd == CIOCGSESSION2) {
+			/* return hardware/driver id */
+			sop.crid = CRYPTO_SESID2HID(cse->sid);
+		}
+
+		if (copy_to_user((void*)arg, &sop, (cmd == CIOCGSESSION) ?
+					sizeof(struct session_op) : sizeof(sop))) {
+			dprintk("%s(%s) - bad copy\n", __FUNCTION__, CIOCGSESSSTR);
+			error = EFAULT;
+		}
+bail:
+		if (error) {
+			dprintk("%s(%s) - bail %d\n", __FUNCTION__, CIOCGSESSSTR, error);
+			if (crie.cri_key)
+				kfree(crie.cri_key);
+			if (cria.cri_key)
+				kfree(cria.cri_key);
+		}
+		break;
+	case CIOCFSESSION:
+		dprintk("%s(CIOCFSESSION)\n", __FUNCTION__);
+		get_user(ses, (uint32_t*)arg);
+		cse = csefind(fcr, ses);
+		if (cse == NULL) {
+			error = EINVAL;
+			dprintk("%s(CIOCFSESSION) - Fail %d\n", __FUNCTION__, error);
+			break;
+		}
+		csedelete(fcr, cse);
+		error = csefree(cse);
+		break;
+	case CIOCCRYPT:
+		dprintk("%s(CIOCCRYPT)\n", __FUNCTION__);
+		if(copy_from_user(&cop, (void*)arg, sizeof(cop))) {
+			dprintk("%s(CIOCCRYPT) - bad copy\n", __FUNCTION__);
+			error = EFAULT;
+			goto bail;
+		}
+		cse = csefind(fcr, cop.ses);
+		if (cse == NULL) {
+			error = EINVAL;
+			dprintk("%s(CIOCCRYPT) - Fail %d\n", __FUNCTION__, error);
+			break;
+		}
+		error = cryptodev_op(cse, &cop);
+		if(copy_to_user((void*)arg, &cop, sizeof(cop))) {
+			dprintk("%s(CIOCCRYPT) - bad return copy\n", __FUNCTION__);
+			error = EFAULT;
+			goto bail;
+		}
+		break;
+	case CIOCKEY:
+	case CIOCKEY2:
+		dprintk("%s(CIOCKEY)\n", __FUNCTION__);
+		if (!crypto_userasymcrypto)
+			return (EPERM);		/* XXX compat? */
+		if(copy_from_user(&kop, (void*)arg, sizeof(kop))) {
+			dprintk("%s(CIOCKEY) - bad copy\n", __FUNCTION__);
+			error = EFAULT;
+			goto bail;
+		}
+		if (cmd == CIOCKEY) {
+			/* NB: crypto core enforces s/w driver use */
+			kop.crk_crid =
+			    CRYPTOCAP_F_HARDWARE | CRYPTOCAP_F_SOFTWARE;
+		}
+		error = cryptodev_key(&kop);
+		if(copy_to_user((void*)arg, &kop, sizeof(kop))) {
+			dprintk("%s(CIOCGKEY) - bad return copy\n", __FUNCTION__);
+			error = EFAULT;
+			goto bail;
+		}
+		break;
+	case CIOCASYMFEAT:
+		dprintk("%s(CIOCASYMFEAT)\n", __FUNCTION__);
+		if (!crypto_userasymcrypto) {
+			/*
+			 * NB: if user asym crypto operations are
+			 * not permitted return "no algorithms"
+			 * so well-behaved applications will just
+			 * fallback to doing them in software.
+			 */
+			feat = 0;
+		} else
+			error = crypto_getfeat(&feat);
+		if (!error) {
+		  error = copy_to_user((void*)arg, &feat, sizeof(feat));
+		}
+		break;
+	case CIOCFINDDEV:
+		if (copy_from_user(&fop, (void*)arg, sizeof(fop))) {
+			dprintk("%s(CIOCFINDDEV) - bad copy\n", __FUNCTION__);
+			error = EFAULT;
+			goto bail;
+		}
+		error = cryptodev_find(&fop);
+		if (copy_to_user((void*)arg, &fop, sizeof(fop))) {
+			dprintk("%s(CIOCFINDDEV) - bad return copy\n", __FUNCTION__);
+			error = EFAULT;
+			goto bail;
+		}
+		break;
+	default:
+		dprintk("%s(unknown ioctl 0x%x)\n", __FUNCTION__, cmd);
+		error = EINVAL;
+		break;
+	}
+	return(-error);
+}
+
+#ifdef HAVE_UNLOCKED_IOCTL
+static long
+cryptodev_unlocked_ioctl(
+	struct file *filp,
+	unsigned int cmd,
+	unsigned long arg)
+{
+	return cryptodev_ioctl(NULL, filp, cmd, arg);
+}
+#endif
+
+static int
+cryptodev_open(struct inode *inode, struct file *filp)
+{
+	struct fcrypt *fcr;
+
+	dprintk("%s()\n", __FUNCTION__);
+	if (filp->private_data) {
+		printk("cryptodev: Private data already exists !\n");
+		return(0);
+	}
+
+	fcr = kmalloc(sizeof(*fcr), GFP_KERNEL);
+	if (!fcr) {
+		dprintk("%s() - malloc failed\n", __FUNCTION__);
+		return(-ENOMEM);
+	}
+	memset(fcr, 0, sizeof(*fcr));
+
+	INIT_LIST_HEAD(&fcr->csessions);
+	filp->private_data = fcr;
+	return(0);
+}
+
+static int
+cryptodev_release(struct inode *inode, struct file *filp)
+{
+	struct fcrypt *fcr = filp->private_data;
+	struct csession *cse, *tmp;
+
+	dprintk("%s()\n", __FUNCTION__);
+	if (!filp) {
+		printk("cryptodev: No private data on release\n");
+		return(0);
+	}
+
+	list_for_each_entry_safe(cse, tmp, &fcr->csessions, list) {
+		list_del(&cse->list);
+		(void)csefree(cse);
+	}
+	filp->private_data = NULL;
+	kfree(fcr);
+	return(0);
+}
+
+static struct file_operations cryptodev_fops = {
+	.owner = THIS_MODULE,
+	.open = cryptodev_open,
+	.release = cryptodev_release,
+	.ioctl = cryptodev_ioctl,
+#ifdef HAVE_UNLOCKED_IOCTL
+	.unlocked_ioctl = cryptodev_unlocked_ioctl,
+#endif
+};
+
+static struct miscdevice cryptodev = {
+	.minor = CRYPTODEV_MINOR,
+	.name = "crypto",
+	.fops = &cryptodev_fops,
+};
+
+static int __init
+cryptodev_init(void)
+{
+	int rc;
+
+	dprintk("%s(%p)\n", __FUNCTION__, cryptodev_init);
+	rc = misc_register(&cryptodev);
+	if (rc) {
+		printk(KERN_ERR "cryptodev: registration of /dev/crypto failed\n");
+		return(rc);
+	}
+
+	return(0);
+}
+
+static void __exit
+cryptodev_exit(void)
+{
+	dprintk("%s()\n", __FUNCTION__);
+	misc_deregister(&cryptodev);
+}
+
+module_init(cryptodev_init);
+module_exit(cryptodev_exit);
+
+MODULE_LICENSE("BSD");
+MODULE_AUTHOR("David McCullough <david_mccullough@securecomputing.com>");
+MODULE_DESCRIPTION("Cryptodev (user interface to OCF)");
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/Config.in
+++ linux-mvl-dove-2.6.32/crypto/ocf/Config.in
@@ -0,0 +1,34 @@
+#############################################################################
+
+mainmenu_option next_comment
+comment 'OCF Configuration'
+tristate 'OCF (Open Cryptograhic Framework)' CONFIG_OCF_OCF
+dep_mbool '  enable fips RNG checks (fips check on RNG data before use)' \
+				CONFIG_OCF_FIPS $CONFIG_OCF_OCF
+dep_mbool '  enable harvesting entropy for /dev/random' \
+				CONFIG_OCF_RANDOMHARVEST $CONFIG_OCF_OCF
+dep_tristate '  cryptodev (user space support)' \
+				CONFIG_OCF_CRYPTODEV $CONFIG_OCF_OCF
+dep_tristate '  cryptosoft (software crypto engine)' \
+				CONFIG_OCF_CRYPTOSOFT $CONFIG_OCF_OCF
+dep_tristate '  safenet (HW crypto engine)' \
+				CONFIG_OCF_SAFE $CONFIG_OCF_OCF
+dep_tristate '  IXP4xx (HW crypto engine)' \
+				CONFIG_OCF_IXP4XX $CONFIG_OCF_OCF
+dep_mbool    '  Enable IXP4xx HW to perform SHA1 and MD5 hashing (very slow)' \
+				CONFIG_OCF_IXP4XX_SHA1_MD5 $CONFIG_OCF_IXP4XX
+dep_tristate '  hifn (HW crypto engine)' \
+				CONFIG_OCF_HIFN $CONFIG_OCF_OCF
+dep_tristate '  talitos (HW crypto engine)' \
+				CONFIG_OCF_TALITOS $CONFIG_OCF_OCF
+dep_tristate '  pasemi (HW crypto engine)' \
+				CONFIG_OCF_PASEMI $CONFIG_OCF_OCF
+dep_tristate '  ep80579 (HW crypto engine)' \
+				CONFIG_OCF_EP80579 $CONFIG_OCF_OCF
+dep_tristate '  ocfnull (does no crypto)' \
+				CONFIG_OCF_OCFNULL $CONFIG_OCF_OCF
+dep_tristate '  ocf-bench (HW crypto in-kernel benchmark)' \
+				CONFIG_OCF_BENCH $CONFIG_OCF_OCF
+endmenu
+
+#############################################################################
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/Kconfig
+++ linux-mvl-dove-2.6.32/crypto/ocf/Kconfig
@@ -0,0 +1,107 @@
+menu "OCF Configuration"
+
+config OCF_OCF
+	tristate "OCF (Open Cryptograhic Framework)"
+	help
+	  A linux port of the OpenBSD/FreeBSD crypto framework.
+
+config OCF_RANDOMHARVEST
+	bool "crypto random --- harvest entropy for /dev/random"
+	depends on OCF_OCF
+	help
+	  Includes code to harvest random numbers from devices that support it.
+
+config OCF_FIPS
+	bool "enable fips RNG checks"
+	depends on OCF_OCF && OCF_RANDOMHARVEST
+	help
+	  Run all RNG provided data through a fips check before
+	  adding it /dev/random's entropy pool.
+
+config OCF_CRYPTODEV
+	tristate "cryptodev (user space support)"
+	depends on OCF_OCF
+	help
+	  The user space API to access crypto hardware.
+
+config OCF_CRYPTOSOFT
+	tristate "cryptosoft (software crypto engine)"
+	depends on OCF_OCF
+	help
+	  A software driver for the OCF framework that uses
+	  the kernel CryptoAPI.
+
+config OCF_SAFE
+	tristate "safenet (HW crypto engine)"
+	depends on OCF_OCF
+	help
+	  A driver for a number of the safenet Excel crypto accelerators.
+	  Currently tested and working on the 1141 and 1741.
+
+config OCF_IXP4XX
+	tristate "IXP4xx (HW crypto engine)"
+	depends on OCF_OCF
+	help
+	  XScale IXP4xx crypto accelerator driver.  Requires the
+	  Intel Access library.
+
+config OCF_IXP4XX_SHA1_MD5
+	bool "IXP4xx SHA1 and MD5 Hashing"
+	depends on OCF_IXP4XX
+	help
+	  Allows the IXP4xx crypto accelerator to perform SHA1 and MD5 hashing.
+	  Note: this is MUCH slower than using cryptosoft (software crypto engine).
+
+config OCF_HIFN
+	tristate "hifn (HW crypto engine)"
+	depends on OCF_OCF
+	help
+	  OCF driver for various HIFN based crypto accelerators.
+	  (7951, 7955, 7956, 7751, 7811)
+
+config OCF_HIFNHIPP
+	tristate "Hifn HIPP (HW packet crypto engine)"
+	depends on OCF_OCF
+	help
+	  OCF driver for various HIFN (HIPP) based crypto accelerators
+	  (7855)
+
+config OCF_TALITOS
+	tristate "talitos (HW crypto engine)"
+	depends on OCF_OCF
+	help
+	  OCF driver for Freescale's security engine (SEC/talitos).
+
+config OCF_PASEMI
+	tristate "pasemi (HW crypto engine)"
+	depends on OCF_OCF && PPC_PASEMI
+	help
+	  OCF driver for the PA Semi PWRficient DMA Engine
+
+config OCF_EP80579
+	tristate "ep80579 (HW crypto engine)"
+	depends on OCF_OCF
+	help
+	  OCF driver for the Intel EP80579 Integrated Processor Product Line.
+
+config OCF_CRYPTOCTEON
+	tristate "cryptocteon (HW crypto engine)"
+	depends on OCF_OCF
+	help
+	  OCF driver for the Cavium OCTEON Processors.
+
+config OCF_OCFNULL
+	tristate "ocfnull (fake crypto engine)"
+	depends on OCF_OCF
+	help
+	  OCF driver for measuring ipsec overheads (does no crypto)
+
+config OCF_BENCH
+	tristate "ocf-bench (HW crypto in-kernel benchmark)"
+	depends on OCF_OCF
+	help
+	  A very simple encryption test for the in-kernel interface
+	  of OCF.  Also includes code to benchmark the IXP Access library
+	  for comparison.
+
+endmenu
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/ocf-compat.h
+++ linux-mvl-dove-2.6.32/crypto/ocf/ocf-compat.h
@@ -0,0 +1,279 @@
+#ifndef _BSD_COMPAT_H_
+#define _BSD_COMPAT_H_ 1
+/****************************************************************************/
+/*
+ * Provide compat routines for older linux kernels and BSD kernels
+ *
+ * Written by David McCullough <david_mccullough@securecomputing.com>
+ * Copyright (C) 2007 David McCullough <david_mccullough@securecomputing.com>
+ *
+ * LICENSE TERMS
+ *
+ * The free distribution and use of this software in both source and binary
+ * form is allowed (with or without changes) provided that:
+ *
+ *   1. distributions of this source code include the above copyright
+ *      notice, this list of conditions and the following disclaimer;
+ *
+ *   2. distributions in binary form include the above copyright
+ *      notice, this list of conditions and the following disclaimer
+ *      in the documentation and/or other associated materials;
+ *
+ *   3. the copyright holder's name is not used to endorse products
+ *      built using this software without specific written permission.
+ *
+ * ALTERNATIVELY, provided that this notice is retained in full, this file
+ * may be distributed under the terms of the GNU General Public License (GPL),
+ * in which case the provisions of the GPL apply INSTEAD OF those given above.
+ *
+ * DISCLAIMER
+ *
+ * This software is provided 'as is' with no explicit or implied warranties
+ * in respect of its properties, including, but not limited to, correctness
+ * and/or fitness for purpose.
+ */
+/****************************************************************************/
+#ifdef __KERNEL__
+/*
+ * fake some BSD driver interface stuff specifically for OCF use
+ */
+
+typedef struct ocf_device *device_t;
+
+typedef struct {
+	int (*cryptodev_newsession)(device_t dev, u_int32_t *sidp, struct cryptoini *cri);
+	int (*cryptodev_freesession)(device_t dev, u_int64_t tid);
+	int (*cryptodev_process)(device_t dev, struct cryptop *crp, int hint);
+	int (*cryptodev_kprocess)(device_t dev, struct cryptkop *krp, int hint);
+} device_method_t;
+#define DEVMETHOD(id, func)	id: func
+
+struct ocf_device {
+	char name[32];		/* the driver name */
+	char nameunit[32];	/* the driver name + HW instance */
+	int  unit;
+	device_method_t	methods;
+	void *softc;
+};
+
+#define CRYPTODEV_NEWSESSION(dev, sid, cri) \
+	((*(dev)->methods.cryptodev_newsession)(dev,sid,cri))
+#define CRYPTODEV_FREESESSION(dev, sid) \
+	((*(dev)->methods.cryptodev_freesession)(dev, sid))
+#define CRYPTODEV_PROCESS(dev, crp, hint) \
+	((*(dev)->methods.cryptodev_process)(dev, crp, hint))
+#define CRYPTODEV_KPROCESS(dev, krp, hint) \
+	((*(dev)->methods.cryptodev_kprocess)(dev, krp, hint))
+
+#define device_get_name(dev)	((dev)->name)
+#define device_get_nameunit(dev)	((dev)->nameunit)
+#define device_get_unit(dev)	((dev)->unit)
+#define device_get_softc(dev)	((dev)->softc)
+
+#define	softc_device_decl \
+		struct ocf_device _device; \
+		device_t
+
+#define	softc_device_init(_sc, _name, _unit, _methods) \
+	if (1) {\
+	strncpy((_sc)->_device.name, _name, sizeof((_sc)->_device.name) - 1); \
+	snprintf((_sc)->_device.nameunit, sizeof((_sc)->_device.name), "%s%d", _name, _unit); \
+	(_sc)->_device.unit = _unit; \
+	(_sc)->_device.methods = _methods; \
+	(_sc)->_device.softc = (void *) _sc; \
+	*(device_t *)((softc_get_device(_sc))+1) = &(_sc)->_device; \
+	} else
+
+#define	softc_get_device(_sc)	(&(_sc)->_device)
+
+/*
+ * iomem support for 2.4 and 2.6 kernels
+ */
+#include <linux/version.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+#define ocf_iomem_t	unsigned long
+
+/*
+ * implement simple workqueue like support for older kernels
+ */
+
+#include <linux/tqueue.h>
+
+#define work_struct tq_struct
+
+#define INIT_WORK(wp, fp, ap) \
+	do { \
+		(wp)->sync = 0; \
+		(wp)->routine = (fp); \
+		(wp)->data = (ap); \
+	} while (0)
+
+#define schedule_work(wp) \
+	do { \
+		queue_task((wp), &tq_immediate); \
+		mark_bh(IMMEDIATE_BH); \
+	} while (0)
+
+#define flush_scheduled_work()	run_task_queue(&tq_immediate)
+
+#else
+#define ocf_iomem_t	void __iomem *
+
+#include <linux/workqueue.h>
+
+#endif
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)
+#include <linux/fdtable.h>
+#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11)
+#define files_fdtable(files)	(files)
+#endif
+
+#ifdef MODULE_PARM
+#undef module_param	/* just in case */
+#define	module_param(a,b,c)		MODULE_PARM(a,"i")
+#endif
+
+#define bzero(s,l)		memset(s,0,l)
+#define bcopy(s,d,l)	memcpy(d,s,l)
+#define bcmp(x, y, l)	memcmp(x,y,l)
+
+#define MIN(x,y)	((x) < (y) ? (x) : (y))
+
+#define device_printf(dev, a...) ({ \
+				printk("%s: ", device_get_nameunit(dev)); printk(a); \
+			})
+
+#undef printf
+#define printf(fmt...)	printk(fmt)
+
+#define KASSERT(c,p)	if (!(c)) { printk p ; } else
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+#define ocf_daemonize(str) \
+	daemonize(); \
+	spin_lock_irq(&current->sigmask_lock); \
+	sigemptyset(&current->blocked); \
+	recalc_sigpending(current); \
+	spin_unlock_irq(&current->sigmask_lock); \
+	sprintf(current->comm, str);
+#else
+#define ocf_daemonize(str) daemonize(str);
+#endif
+
+#define	TAILQ_INSERT_TAIL(q,d,m) list_add_tail(&(d)->m, (q))
+#define	TAILQ_EMPTY(q)	list_empty(q)
+#define	TAILQ_FOREACH(v, q, m) list_for_each_entry(v, q, m)
+
+#define read_random(p,l) get_random_bytes(p,l)
+
+#define DELAY(x)	((x) > 2000 ? mdelay((x)/1000) : udelay(x))
+#define strtoul simple_strtoul
+
+#define pci_get_vendor(dev)	((dev)->vendor)
+#define pci_get_device(dev)	((dev)->device)
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+#define pci_set_consistent_dma_mask(dev, mask) (0)
+#endif
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10)
+#define pci_dma_sync_single_for_cpu pci_dma_sync_single
+#endif
+
+#ifndef DMA_32BIT_MASK
+#define DMA_32BIT_MASK  0x00000000ffffffffULL
+#endif
+
+#define htole32(x)	cpu_to_le32(x)
+#define htobe32(x)	cpu_to_be32(x)
+#define htole16(x)	cpu_to_le16(x)
+#define htobe16(x)	cpu_to_be16(x)
+
+/* older kernels don't have these */
+#if 0
+#ifndef IRQ_NONE
+#define IRQ_NONE
+#define IRQ_HANDLED
+#define irqreturn_t void
+#endif
+#ifndef IRQF_SHARED
+#define IRQF_SHARED	SA_SHIRQ
+#endif
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
+# define strlcpy(dest,src,len) \
+		({strncpy(dest,src,(len)-1); ((char *)dest)[(len)-1] = '\0'; })
+#endif
+
+#ifndef MAX_ERRNO
+#define MAX_ERRNO	4095
+#endif
+#ifndef IS_ERR_VALUE
+#include <linux/err.h>
+#ifndef IS_ERR_VALUE
+#define IS_ERR_VALUE(x) ((unsigned long)(x) >= (unsigned long)-MAX_ERRNO)
+#endif
+#endif
+
+/*
+ * common debug for all
+ */
+#if 1
+#define dprintk(a...)	do { if (debug) printk(a); } while(0)
+#else
+#define dprintk(a...)
+#endif
+
+#ifndef SLAB_ATOMIC
+/* Changed in 2.6.20, must use GFP_ATOMIC now */
+#define	SLAB_ATOMIC	GFP_ATOMIC
+#endif
+
+/*
+ * need some additional support for older kernels */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,2)
+#define pci_register_driver_compat(driver, rc) \
+	do { \
+		if ((rc) > 0) { \
+			(rc) = 0; \
+		} else if (rc == 0) { \
+			(rc) = -ENODEV; \
+		} else { \
+			pci_unregister_driver(driver); \
+		} \
+	} while (0)
+#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10)
+#define pci_register_driver_compat(driver,rc) ((rc) = (rc) < 0 ? (rc) : 0)
+#else
+#define pci_register_driver_compat(driver,rc)
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
+
+#include <linux/mm.h>
+#include <asm/scatterlist.h>
+
+static inline void sg_set_page(struct scatterlist *sg,  struct page *page,
+			       unsigned int len, unsigned int offset)
+{
+	sg->page = page;
+	sg->offset = offset;
+	sg->length = len;
+}
+
+static inline void *sg_virt(struct scatterlist *sg)
+{
+	return page_address(sg->page) + sg->offset;
+}
+
+#endif
+
+#ifndef late_initcall
+#define late_initcall(init) module_init(init)
+#endif
+
+#endif /* __KERNEL__ */
+
+/****************************************************************************/
+#endif /* _BSD_COMPAT_H_ */
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/random.c
+++ linux-mvl-dove-2.6.32/crypto/ocf/random.c
@@ -0,0 +1,317 @@
+/*
+ * A system independant way of adding entropy to the kernels pool
+ * this way the drivers can focus on the real work and we can take
+ * care of pushing it to the appropriate place in the kernel.
+ *
+ * This should be fast and callable from timers/interrupts
+ *
+ * Written by David McCullough <david_mccullough@securecomputing.com>
+ * Copyright (C) 2006-2007 David McCullough
+ * Copyright (C) 2004-2005 Intel Corporation.
+ *
+ * LICENSE TERMS
+ *
+ * The free distribution and use of this software in both source and binary
+ * form is allowed (with or without changes) provided that:
+ *
+ *   1. distributions of this source code include the above copyright
+ *      notice, this list of conditions and the following disclaimer;
+ *
+ *   2. distributions in binary form include the above copyright
+ *      notice, this list of conditions and the following disclaimer
+ *      in the documentation and/or other associated materials;
+ *
+ *   3. the copyright holder's name is not used to endorse products
+ *      built using this software without specific written permission.
+ *
+ * ALTERNATIVELY, provided that this notice is retained in full, this product
+ * may be distributed under the terms of the GNU General Public License (GPL),
+ * in which case the provisions of the GPL apply INSTEAD OF those given above.
+ *
+ * DISCLAIMER
+ *
+ * This software is provided 'as is' with no explicit or implied warranties
+ * in respect of its properties, including, but not limited to, correctness
+ * and/or fitness for purpose.
+ */
+
+#ifndef AUTOCONF_INCLUDED
+#include <linux/config.h>
+#endif
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/list.h>
+#include <linux/slab.h>
+#include <linux/wait.h>
+#include <linux/sched.h>
+#include <linux/spinlock.h>
+#include <linux/version.h>
+#include <linux/unistd.h>
+#include <linux/poll.h>
+#include <linux/random.h>
+#include <cryptodev.h>
+
+#ifdef CONFIG_OCF_FIPS
+#include "rndtest.h"
+#endif
+
+#ifndef HAS_RANDOM_INPUT_WAIT
+#error "Please do not enable OCF_RANDOMHARVEST unless you have applied patches"
+#endif
+
+/*
+ * a hack to access the debug levels from the crypto driver
+ */
+extern int crypto_debug;
+#define debug crypto_debug
+
+/*
+ * a list of all registered random providers
+ */
+static LIST_HEAD(random_ops);
+static int started = 0;
+static int initted = 0;
+
+struct random_op {
+	struct list_head random_list;
+	u_int32_t driverid;
+	int (*read_random)(void *arg, u_int32_t *buf, int len);
+	void *arg;
+};
+
+static int random_proc(void *arg);
+
+static pid_t		randomproc = (pid_t) -1;
+static spinlock_t	random_lock;
+
+/*
+ * just init the spin locks
+ */
+static int
+crypto_random_init(void)
+{
+	spin_lock_init(&random_lock);
+	initted = 1;
+	return(0);
+}
+
+/*
+ * Add the given random reader to our list (if not present)
+ * and start the thread (if not already started)
+ *
+ * we have to assume that driver id is ok for now
+ */
+int
+crypto_rregister(
+	u_int32_t driverid,
+	int (*read_random)(void *arg, u_int32_t *buf, int len),
+	void *arg)
+{
+	unsigned long flags;
+	int ret = 0;
+	struct random_op	*rops, *tmp;
+
+	dprintk("%s,%d: %s(0x%x, %p, %p)\n", __FILE__, __LINE__,
+			__FUNCTION__, driverid, read_random, arg);
+
+	if (!initted)
+		crypto_random_init();
+
+#if 0
+	struct cryptocap	*cap;
+
+	cap = crypto_checkdriver(driverid);
+	if (!cap)
+		return EINVAL;
+#endif
+
+	list_for_each_entry_safe(rops, tmp, &random_ops, random_list) {
+		if (rops->driverid == driverid && rops->read_random == read_random)
+			return EEXIST;
+	}
+
+	rops = (struct random_op *) kmalloc(sizeof(*rops), GFP_KERNEL);
+	if (!rops)
+		return ENOMEM;
+
+	rops->driverid    = driverid;
+	rops->read_random = read_random;
+	rops->arg = arg;
+
+	spin_lock_irqsave(&random_lock, flags);
+	list_add_tail(&rops->random_list, &random_ops);
+	if (!started) {
+		randomproc = kernel_thread(random_proc, NULL, CLONE_FS|CLONE_FILES);
+		if (randomproc < 0) {
+			ret = randomproc;
+			printk("crypto: crypto_rregister cannot start random thread; "
+					"error %d", ret);
+		} else
+			started = 1;
+	}
+	spin_unlock_irqrestore(&random_lock, flags);
+
+	return ret;
+}
+EXPORT_SYMBOL(crypto_rregister);
+
+int
+crypto_runregister_all(u_int32_t driverid)
+{
+	struct random_op *rops, *tmp;
+	unsigned long flags;
+
+	dprintk("%s,%d: %s(0x%x)\n", __FILE__, __LINE__, __FUNCTION__, driverid);
+
+	list_for_each_entry_safe(rops, tmp, &random_ops, random_list) {
+		if (rops->driverid == driverid) {
+			list_del(&rops->random_list);
+			kfree(rops);
+		}
+	}
+
+	spin_lock_irqsave(&random_lock, flags);
+	if (list_empty(&random_ops) && started)
+		kill_proc(randomproc, SIGKILL, 1);
+	spin_unlock_irqrestore(&random_lock, flags);
+	return(0);
+}
+EXPORT_SYMBOL(crypto_runregister_all);
+
+/*
+ * while we can add entropy to random.c continue to read random data from
+ * the drivers and push it to random.
+ */
+static int
+random_proc(void *arg)
+{
+	int n;
+	int wantcnt;
+	int bufcnt = 0;
+	int retval = 0;
+	int *buf = NULL;
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+	daemonize();
+	spin_lock_irq(&current->sigmask_lock);
+	sigemptyset(&current->blocked);
+	recalc_sigpending(current);
+	spin_unlock_irq(&current->sigmask_lock);
+	sprintf(current->comm, "ocf-random");
+#else
+	daemonize("ocf-random");
+	allow_signal(SIGKILL);
+#endif
+
+	(void) get_fs();
+	set_fs(get_ds());
+
+#ifdef CONFIG_OCF_FIPS
+#define NUM_INT (RNDTEST_NBYTES/sizeof(int))
+#else
+#define NUM_INT 32
+#endif
+
+	/*
+	 * some devices can transferr their RNG data direct into memory,
+	 * so make sure it is device friendly
+	 */
+	buf = kmalloc(NUM_INT * sizeof(int), GFP_DMA);
+	if (NULL == buf) {
+		printk("crypto: RNG could not allocate memory\n");
+		retval = -ENOMEM;
+		goto bad_alloc;
+	}
+
+	wantcnt = NUM_INT;   /* start by adding some entropy */
+
+	/*
+	 * its possible due to errors or driver removal that we no longer
+	 * have anything to do,  if so exit or we will consume all the CPU
+	 * doing nothing
+	 */
+	while (!list_empty(&random_ops)) {
+		struct random_op	*rops, *tmp;
+
+#ifdef CONFIG_OCF_FIPS
+		if (wantcnt)
+			wantcnt = NUM_INT; /* FIPs mode can do 20000 bits or none */
+#endif
+
+		/* see if we can get enough entropy to make the world
+		 * a better place.
+		 */
+		while (bufcnt < wantcnt && bufcnt < NUM_INT) {
+			list_for_each_entry_safe(rops, tmp, &random_ops, random_list) {
+
+				n = (*rops->read_random)(rops->arg, &buf[bufcnt],
+							 NUM_INT - bufcnt);
+
+				/* on failure remove the random number generator */
+				if (n == -1) {
+					list_del(&rops->random_list);
+					printk("crypto: RNG (driverid=0x%x) failed, disabling\n",
+							rops->driverid);
+					kfree(rops);
+				} else if (n > 0)
+					bufcnt += n;
+			}
+			/* give up CPU for a bit, just in case as this is a loop */
+			schedule();
+		}
+
+
+#ifdef CONFIG_OCF_FIPS
+		if (bufcnt > 0 && rndtest_buf((unsigned char *) &buf[0])) {
+			dprintk("crypto: buffer had fips errors, discarding\n");
+			bufcnt = 0;
+		}
+#endif
+
+		/*
+		 * if we have a certified buffer,  we can send some data
+		 * to /dev/random and move along
+		 */
+		if (bufcnt > 0) {
+			/* add what we have */
+			random_input_words(buf, bufcnt, bufcnt*sizeof(int)*8);
+			bufcnt = 0;
+		}
+
+		/* give up CPU for a bit so we don't hog while filling */
+		schedule();
+
+		/* wait for needing more */
+		wantcnt = random_input_wait();
+
+		if (wantcnt <= 0)
+			wantcnt = 0; /* try to get some info again */
+		else
+		 	/* round up to one word or we can loop forever */
+			wantcnt = (wantcnt + (sizeof(int)*8)) / (sizeof(int)*8);
+		if (wantcnt > NUM_INT) {
+			wantcnt = NUM_INT;
+		}
+
+		if (signal_pending(current)) {
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+			spin_lock_irq(&current->sigmask_lock);
+#endif
+			flush_signals(current);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+			spin_unlock_irq(&current->sigmask_lock);
+#endif
+		}
+	}
+	
+	kfree(buf);
+
+bad_alloc:
+	spin_lock_irq(&random_lock);
+	randomproc = (pid_t) -1;
+	started = 0;
+	spin_unlock_irq(&random_lock);
+
+	return retval;
+}
+
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/uio.h
+++ linux-mvl-dove-2.6.32/crypto/ocf/uio.h
@@ -0,0 +1,54 @@
+#ifndef _OCF_UIO_H_
+#define _OCF_UIO_H_
+
+#include <linux/uio.h>
+
+/*
+ * The linux uio.h doesn't have all we need.  To be fully api compatible
+ * with the BSD cryptodev,  we need to keep this around.  Perhaps this can
+ * be moved back into the linux/uio.h
+ *
+ * Linux port done by David McCullough <david_mccullough@securecomputing.com>
+ * Copyright (C) 2006-2007 David McCullough
+ * Copyright (C) 2004-2005 Intel Corporation.
+ *
+ * LICENSE TERMS
+ *
+ * The free distribution and use of this software in both source and binary
+ * form is allowed (with or without changes) provided that:
+ *
+ *   1. distributions of this source code include the above copyright
+ *      notice, this list of conditions and the following disclaimer;
+ *
+ *   2. distributions in binary form include the above copyright
+ *      notice, this list of conditions and the following disclaimer
+ *      in the documentation and/or other associated materials;
+ *
+ *   3. the copyright holder's name is not used to endorse products
+ *      built using this software without specific written permission.
+ *
+ * ALTERNATIVELY, provided that this notice is retained in full, this product
+ * may be distributed under the terms of the GNU General Public License (GPL),
+ * in which case the provisions of the GPL apply INSTEAD OF those given above.
+ *
+ * DISCLAIMER
+ *
+ * This software is provided 'as is' with no explicit or implied warranties
+ * in respect of its properties, including, but not limited to, correctness
+ * and/or fitness for purpose.
+ * ---------------------------------------------------------------------------
+ */
+
+struct uio {
+	struct	iovec *uio_iov;
+	int		uio_iovcnt;
+	off_t	uio_offset;
+	int		uio_resid;
+#if 0
+	enum	uio_seg uio_segflg;
+	enum	uio_rw uio_rw;
+	struct  thread *uio_td;
+#endif
+};
+
+#endif
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/Makefile
+++ linux-mvl-dove-2.6.32/crypto/ocf/Makefile
@@ -0,0 +1,122 @@
+# for SGlinux builds
+-include $(ROOTDIR)/modules/.config
+
+OCF_OBJS = crypto.o criov.o
+
+ifdef CONFIG_OCF_RANDOMHARVEST
+	OCF_OBJS += random.o
+endif
+
+ifdef CONFIG_OCF_FIPS
+	OCF_OBJS += rndtest.o
+endif
+
+# Add in autoconf.h to get #defines for CONFIG_xxx
+AUTOCONF_H=$(ROOTDIR)/modules/autoconf.h
+ifeq ($(AUTOCONF_H), $(wildcard $(AUTOCONF_H)))
+	EXTRA_CFLAGS += -include $(AUTOCONF_H)
+	export EXTRA_CFLAGS
+endif
+
+ifndef obj
+	obj ?= .
+	_obj = subdir
+	mod-subdirs := safe hifn ixp4xx talitos ocfnull
+	export-objs += crypto.o criov.o random.o
+	list-multi += ocf.o
+	_slash :=
+else
+	_obj = obj
+	_slash := /
+endif
+
+EXTRA_CFLAGS += -I$(obj)/.
+
+obj-$(CONFIG_OCF_OCF)         += ocf.o
+obj-$(CONFIG_OCF_CRYPTODEV)   += cryptodev.o
+obj-$(CONFIG_OCF_CRYPTOSOFT)  += cryptosoft.o
+obj-$(CONFIG_OCF_BENCH)       += ocf-bench.o
+
+$(_obj)-$(CONFIG_OCF_SAFE)    += safe$(_slash)
+$(_obj)-$(CONFIG_OCF_HIFN)    += hifn$(_slash)
+$(_obj)-$(CONFIG_OCF_IXP4XX)  += ixp4xx$(_slash)
+$(_obj)-$(CONFIG_OCF_TALITOS) += talitos$(_slash)
+$(_obj)-$(CONFIG_OCF_PASEMI)  += pasemi$(_slash)
+$(_obj)-$(CONFIG_OCF_EP80579) += ep80579$(_slash)
+$(_obj)-$(CONFIG_OCF_CRYPTOCTEON) += cryptocteon$(_slash)
+$(_obj)-$(CONFIG_OCF_OCFNULL) += ocfnull$(_slash)
+
+ocf-objs := $(OCF_OBJS)
+
+$(list-multi) dummy1: $(ocf-objs)
+	$(LD) -r -o $@ $(ocf-objs)
+
+.PHONY:
+clean:
+	rm -f *.o *.ko .*.o.flags .*.ko.cmd .*.o.cmd .*.mod.o.cmd *.mod.c
+	rm -f */*.o */*.ko */.*.o.cmd */.*.ko.cmd */.*.mod.o.cmd */*.mod.c */.*.o.flags
+
+ifdef TOPDIR
+-include $(TOPDIR)/Rules.make
+endif
+
+#
+# release gen targets
+#
+
+.PHONY: patch
+patch:
+	REL=`date +%Y%m%d`; \
+		patch=ocf-linux-$$REL.patch; \
+		patch24=ocf-linux-24-$$REL.patch; \
+		patch26=ocf-linux-26-$$REL.patch; \
+		( \
+			find . -name Makefile; \
+			find . -name Config.in; \
+			find . -name Kconfig; \
+			find . -name README; \
+			find . -name '*.[ch]' | grep -v '.mod.c'; \
+		) | while read t; do \
+			diff -Nau /dev/null $$t | sed 's?^+++ \./?+++ linux/crypto/ocf/?'; \
+		done > $$patch; \
+		cat patches/linux-2.4.35-ocf.patch $$patch > $$patch24; \
+		cat patches/linux-2.6.30-ocf.patch $$patch > $$patch26
+
+.PHONY: tarball
+tarball:
+	REL=`date +%Y%m%d`; RELDIR=/tmp/ocf-linux-$$REL; \
+		CURDIR=`pwd`; \
+		rm -rf /tmp/ocf-linux-$$REL*; \
+		mkdir -p $$RELDIR/tools; \
+		cp README* $$RELDIR; \
+		cp patches/openss*.patch $$RELDIR; \
+		cp patches/crypto-tools.patch $$RELDIR; \
+		cp tools/[!C]* $$RELDIR/tools; \
+		cd ..; \
+		tar cvf $$RELDIR/ocf-linux.tar \
+					--exclude=CVS \
+					--exclude=.* \
+					--exclude=*.o \
+					--exclude=*.ko \
+					--exclude=*.mod.* \
+					--exclude=README* \
+					--exclude=ocf-*.patch \
+					--exclude=ocf/patches/openss*.patch \
+					--exclude=ocf/patches/crypto-tools.patch \
+					--exclude=ocf/tools \
+					ocf; \
+		gzip -9 $$RELDIR/ocf-linux.tar; \
+		cd /tmp; \
+		tar cvf ocf-linux-$$REL.tar ocf-linux-$$REL; \
+		gzip -9 ocf-linux-$$REL.tar; \
+		cd $$CURDIR/../../user; \
+		rm -rf /tmp/crypto-tools-$$REL*; \
+		tar cvf /tmp/crypto-tools-$$REL.tar \
+					--exclude=CVS \
+					--exclude=.* \
+					--exclude=*.o \
+					--exclude=cryptotest \
+					--exclude=cryptokeytest \
+					crypto-tools; \
+		gzip -9 /tmp/crypto-tools-$$REL.tar
+
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/rndtest.h
+++ linux-mvl-dove-2.6.32/crypto/ocf/rndtest.h
@@ -0,0 +1,54 @@
+/*	$FreeBSD: src/sys/dev/rndtest/rndtest.h,v 1.1 2003/03/11 22:54:44 sam Exp $	*/
+/*	$OpenBSD$	*/
+
+/*
+ * Copyright (c) 2002 Jason L. Wright (jason@thought.net)
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by Jason L. Wright
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/* Some of the tests depend on these values */
+#define	RNDTEST_NBYTES	2500
+#define	RNDTEST_NBITS	(8 * RNDTEST_NBYTES)
+
+struct rndtest_state {
+	int		rs_discard;	/* discard/accept random data */
+	u_int8_t	*rs_buf;
+};
+
+struct rndtest_stats {
+	u_int32_t	rst_discard;	/* number of bytes discarded */
+	u_int32_t	rst_tests;	/* number of test runs */
+	u_int32_t	rst_monobit;	/* monobit test failures */
+	u_int32_t	rst_runs;	/* 0/1 runs failures */
+	u_int32_t	rst_longruns;	/* longruns failures */
+	u_int32_t	rst_chi;	/* chi^2 failures */
+};
+
+extern int rndtest_buf(unsigned char *buf);
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/rndtest.c
+++ linux-mvl-dove-2.6.32/crypto/ocf/rndtest.c
@@ -0,0 +1,300 @@
+/*	$OpenBSD$	*/
+
+/*
+ * OCF/Linux port done by David McCullough <david_mccullough@securecomputing.com>
+ * Copyright (C) 2006-2007 David McCullough
+ * Copyright (C) 2004-2005 Intel Corporation.
+ * The license and original author are listed below.
+ *
+ * Copyright (c) 2002 Jason L. Wright (jason@thought.net)
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by Jason L. Wright
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef AUTOCONF_INCLUDED
+#include <linux/config.h>
+#endif
+#include <linux/module.h>
+#include <linux/list.h>
+#include <linux/wait.h>
+#include <linux/time.h>
+#include <linux/version.h>
+#include <linux/unistd.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/time.h>
+#include <cryptodev.h>
+#include "rndtest.h"
+
+static struct rndtest_stats rndstats;
+
+static	void rndtest_test(struct rndtest_state *);
+
+/* The tests themselves */
+static	int rndtest_monobit(struct rndtest_state *);
+static	int rndtest_runs(struct rndtest_state *);
+static	int rndtest_longruns(struct rndtest_state *);
+static	int rndtest_chi_4(struct rndtest_state *);
+
+static	int rndtest_runs_check(struct rndtest_state *, int, int *);
+static	void rndtest_runs_record(struct rndtest_state *, int, int *);
+
+static const struct rndtest_testfunc {
+	int (*test)(struct rndtest_state *);
+} rndtest_funcs[] = {
+	{ rndtest_monobit },
+	{ rndtest_runs },
+	{ rndtest_chi_4 },
+	{ rndtest_longruns },
+};
+
+#define	RNDTEST_NTESTS	(sizeof(rndtest_funcs)/sizeof(rndtest_funcs[0]))
+
+static void
+rndtest_test(struct rndtest_state *rsp)
+{
+	int i, rv = 0;
+
+	rndstats.rst_tests++;
+	for (i = 0; i < RNDTEST_NTESTS; i++)
+		rv |= (*rndtest_funcs[i].test)(rsp);
+	rsp->rs_discard = (rv != 0);
+}
+
+
+extern int crypto_debug;
+#define rndtest_verbose 2
+#define rndtest_report(rsp, failure, fmt, a...) \
+	{ if (failure || crypto_debug) { printk("rng_test: " fmt "\n", a); } else; }
+
+#define	RNDTEST_MONOBIT_MINONES	9725
+#define	RNDTEST_MONOBIT_MAXONES	10275
+
+static int
+rndtest_monobit(struct rndtest_state *rsp)
+{
+	int i, ones = 0, j;
+	u_int8_t r;
+
+	for (i = 0; i < RNDTEST_NBYTES; i++) {
+		r = rsp->rs_buf[i];
+		for (j = 0; j < 8; j++, r <<= 1)
+			if (r & 0x80)
+				ones++;
+	}
+	if (ones > RNDTEST_MONOBIT_MINONES &&
+	    ones < RNDTEST_MONOBIT_MAXONES) {
+		if (rndtest_verbose > 1)
+			rndtest_report(rsp, 0, "monobit pass (%d < %d < %d)",
+			    RNDTEST_MONOBIT_MINONES, ones,
+			    RNDTEST_MONOBIT_MAXONES);
+		return (0);
+	} else {
+		if (rndtest_verbose)
+			rndtest_report(rsp, 1,
+			    "monobit failed (%d ones)", ones);
+		rndstats.rst_monobit++;
+		return (-1);
+	}
+}
+
+#define	RNDTEST_RUNS_NINTERVAL	6
+
+static const struct rndtest_runs_tabs {
+	u_int16_t min, max;
+} rndtest_runs_tab[] = {
+	{ 2343, 2657 },
+	{ 1135, 1365 },
+	{ 542, 708 },
+	{ 251, 373 },
+	{ 111, 201 },
+	{ 111, 201 },
+};
+
+static int
+rndtest_runs(struct rndtest_state *rsp)
+{
+	int i, j, ones, zeros, rv = 0;
+	int onei[RNDTEST_RUNS_NINTERVAL], zeroi[RNDTEST_RUNS_NINTERVAL];
+	u_int8_t c;
+
+	bzero(onei, sizeof(onei));
+	bzero(zeroi, sizeof(zeroi));
+	ones = zeros = 0;
+	for (i = 0; i < RNDTEST_NBYTES; i++) {
+		c = rsp->rs_buf[i];
+		for (j = 0; j < 8; j++, c <<= 1) {
+			if (c & 0x80) {
+				ones++;
+				rndtest_runs_record(rsp, zeros, zeroi);
+				zeros = 0;
+			} else {
+				zeros++;
+				rndtest_runs_record(rsp, ones, onei);
+				ones = 0;
+			}
+		}
+	}
+	rndtest_runs_record(rsp, ones, onei);
+	rndtest_runs_record(rsp, zeros, zeroi);
+
+	rv |= rndtest_runs_check(rsp, 0, zeroi);
+	rv |= rndtest_runs_check(rsp, 1, onei);
+
+	if (rv)
+		rndstats.rst_runs++;
+
+	return (rv);
+}
+
+static void
+rndtest_runs_record(struct rndtest_state *rsp, int len, int *intrv)
+{
+	if (len == 0)
+		return;
+	if (len > RNDTEST_RUNS_NINTERVAL)
+		len = RNDTEST_RUNS_NINTERVAL;
+	len -= 1;
+	intrv[len]++;
+}
+
+static int
+rndtest_runs_check(struct rndtest_state *rsp, int val, int *src)
+{
+	int i, rv = 0;
+
+	for (i = 0; i < RNDTEST_RUNS_NINTERVAL; i++) {
+		if (src[i] < rndtest_runs_tab[i].min ||
+		    src[i] > rndtest_runs_tab[i].max) {
+			rndtest_report(rsp, 1,
+			    "%s interval %d failed (%d, %d-%d)",
+			    val ? "ones" : "zeros",
+			    i + 1, src[i], rndtest_runs_tab[i].min,
+			    rndtest_runs_tab[i].max);
+			rv = -1;
+		} else {
+			rndtest_report(rsp, 0,
+			    "runs pass %s interval %d (%d < %d < %d)",
+			    val ? "ones" : "zeros",
+			    i + 1, rndtest_runs_tab[i].min, src[i],
+			    rndtest_runs_tab[i].max);
+		}
+	}
+	return (rv);
+}
+
+static int
+rndtest_longruns(struct rndtest_state *rsp)
+{
+	int i, j, ones = 0, zeros = 0, maxones = 0, maxzeros = 0;
+	u_int8_t c;
+
+	for (i = 0; i < RNDTEST_NBYTES; i++) {
+		c = rsp->rs_buf[i];
+		for (j = 0; j < 8; j++, c <<= 1) {
+			if (c & 0x80) {
+				zeros = 0;
+				ones++;
+				if (ones > maxones)
+					maxones = ones;
+			} else {
+				ones = 0;
+				zeros++;
+				if (zeros > maxzeros)
+					maxzeros = zeros;
+			}
+		}
+	}
+
+	if (maxones < 26 && maxzeros < 26) {
+		rndtest_report(rsp, 0, "longruns pass (%d ones, %d zeros)",
+			maxones, maxzeros);
+		return (0);
+	} else {
+		rndtest_report(rsp, 1, "longruns fail (%d ones, %d zeros)",
+			maxones, maxzeros);
+		rndstats.rst_longruns++;
+		return (-1);
+	}
+}
+
+/*
+ * chi^2 test over 4 bits: (this is called the poker test in FIPS 140-2,
+ * but it is really the chi^2 test over 4 bits (the poker test as described
+ * by Knuth vol 2 is something different, and I take him as authoritative
+ * on nomenclature over NIST).
+ */
+#define	RNDTEST_CHI4_K	16
+#define	RNDTEST_CHI4_K_MASK	(RNDTEST_CHI4_K - 1)
+
+/*
+ * The unnormalized values are used so that we don't have to worry about
+ * fractional precision.  The "real" value is found by:
+ *	(V - 1562500) * (16 / 5000) = Vn   (where V is the unnormalized value)
+ */
+#define	RNDTEST_CHI4_VMIN	1563181		/* 2.1792 */
+#define	RNDTEST_CHI4_VMAX	1576929		/* 46.1728 */
+
+static int
+rndtest_chi_4(struct rndtest_state *rsp)
+{
+	unsigned int freq[RNDTEST_CHI4_K], i, sum;
+
+	for (i = 0; i < RNDTEST_CHI4_K; i++)
+		freq[i] = 0;
+
+	/* Get number of occurances of each 4 bit pattern */
+	for (i = 0; i < RNDTEST_NBYTES; i++) {
+		freq[(rsp->rs_buf[i] >> 4) & RNDTEST_CHI4_K_MASK]++;
+		freq[(rsp->rs_buf[i] >> 0) & RNDTEST_CHI4_K_MASK]++;
+	}
+
+	for (i = 0, sum = 0; i < RNDTEST_CHI4_K; i++)
+		sum += freq[i] * freq[i];
+
+	if (sum >= 1563181 && sum <= 1576929) {
+		rndtest_report(rsp, 0, "chi^2(4): pass (sum %u)", sum);
+		return (0);
+	} else {
+		rndtest_report(rsp, 1, "chi^2(4): failed (sum %u)", sum);
+		rndstats.rst_chi++;
+		return (-1);
+	}
+}
+
+int
+rndtest_buf(unsigned char *buf)
+{
+	struct rndtest_state rsp;
+
+	memset(&rsp, 0, sizeof(rsp));
+	rsp.rs_buf = buf;
+	rndtest_test(&rsp);
+	return(rsp.rs_discard);
+}
+
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/cryptosoft.c
+++ linux-mvl-dove-2.6.32/crypto/ocf/cryptosoft.c
@@ -0,0 +1,899 @@
+/*
+ * An OCF module that uses the linux kernel cryptoapi, based on the
+ * original cryptosoft for BSD by Angelos D. Keromytis (angelos@cis.upenn.edu)
+ * but is mostly unrecognisable,
+ *
+ * Written by David McCullough <david_mccullough@securecomputing.com>
+ * Copyright (C) 2004-2007 David McCullough
+ * Copyright (C) 2004-2005 Intel Corporation.
+ *
+ * LICENSE TERMS
+ *
+ * The free distribution and use of this software in both source and binary
+ * form is allowed (with or without changes) provided that:
+ *
+ *   1. distributions of this source code include the above copyright
+ *      notice, this list of conditions and the following disclaimer;
+ *
+ *   2. distributions in binary form include the above copyright
+ *      notice, this list of conditions and the following disclaimer
+ *      in the documentation and/or other associated materials;
+ *
+ *   3. the copyright holder's name is not used to endorse products
+ *      built using this software without specific written permission.
+ *
+ * ALTERNATIVELY, provided that this notice is retained in full, this product
+ * may be distributed under the terms of the GNU General Public License (GPL),
+ * in which case the provisions of the GPL apply INSTEAD OF those given above.
+ *
+ * DISCLAIMER
+ *
+ * This software is provided 'as is' with no explicit or implied warranties
+ * in respect of its properties, including, but not limited to, correctness
+ * and/or fitness for purpose.
+ * ---------------------------------------------------------------------------
+ */
+
+#ifndef AUTOCONF_INCLUDED
+#include <linux/config.h>
+#endif
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/list.h>
+#include <linux/slab.h>
+#include <linux/sched.h>
+#include <linux/wait.h>
+#include <linux/crypto.h>
+#include <linux/mm.h>
+#include <linux/skbuff.h>
+#include <linux/random.h>
+#include <linux/scatterlist.h>
+
+#include <cryptodev.h>
+#include <uio.h>
+
+struct {
+	softc_device_decl	sc_dev;
+} swcr_softc;
+
+#define offset_in_page(p) ((unsigned long)(p) & ~PAGE_MASK)
+
+/* Software session entry */
+
+#define SW_TYPE_CIPHER		0
+#define SW_TYPE_HMAC		1
+#define SW_TYPE_AUTH2		2
+#define SW_TYPE_HASH		3
+#define SW_TYPE_COMP		4
+#define SW_TYPE_BLKCIPHER	5
+
+struct swcr_data {
+	int					sw_type;
+	int					sw_alg;
+	struct crypto_tfm	*sw_tfm;
+	union {
+		struct {
+			char *sw_key;
+			int  sw_klen;
+			int  sw_mlen;
+		} hmac;
+		void *sw_comp_buf;
+	} u;
+	struct swcr_data	*sw_next;
+};
+
+#ifndef CRYPTO_TFM_MODE_CBC
+/*
+ * As of linux-2.6.21 this is no longer defined, and presumably no longer
+ * needed to be passed into the crypto core code.
+ */
+#define	CRYPTO_TFM_MODE_CBC	0
+#define	CRYPTO_TFM_MODE_ECB	0
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
+	/*
+	 * Linux 2.6.19 introduced a new Crypto API, setup macro's to convert new
+	 * API into old API.
+	 */
+
+	/* Symmetric/Block Cipher */
+	struct blkcipher_desc
+	{
+		struct crypto_tfm *tfm;
+		void *info;
+	};
+	#define ecb(X)								#X
+	#define cbc(X)								#X
+	#define crypto_has_blkcipher(X, Y, Z)		crypto_alg_available(X, 0)
+	#define crypto_blkcipher_cast(X)			X
+	#define crypto_blkcipher_tfm(X)				X
+	#define crypto_alloc_blkcipher(X, Y, Z)		crypto_alloc_tfm(X, mode)
+	#define crypto_blkcipher_ivsize(X)			crypto_tfm_alg_ivsize(X)
+	#define crypto_blkcipher_blocksize(X)		crypto_tfm_alg_blocksize(X)
+	#define crypto_blkcipher_setkey(X, Y, Z)	crypto_cipher_setkey(X, Y, Z)
+	#define crypto_blkcipher_encrypt_iv(W, X, Y, Z)	\
+				crypto_cipher_encrypt_iv((W)->tfm, X, Y, Z, (u8 *)((W)->info))
+	#define crypto_blkcipher_decrypt_iv(W, X, Y, Z)	\
+				crypto_cipher_decrypt_iv((W)->tfm, X, Y, Z, (u8 *)((W)->info))
+
+	/* Hash/HMAC/Digest */
+	struct hash_desc
+	{
+		struct crypto_tfm *tfm;
+	};
+	#define hmac(X)							#X
+	#define crypto_has_hash(X, Y, Z)		crypto_alg_available(X, 0)
+	#define crypto_hash_cast(X)				X
+	#define crypto_hash_tfm(X)				X
+	#define crypto_alloc_hash(X, Y, Z)		crypto_alloc_tfm(X, mode)
+	#define crypto_hash_digestsize(X)		crypto_tfm_alg_digestsize(X)
+	#define crypto_hash_digest(W, X, Y, Z)	\
+				crypto_digest_digest((W)->tfm, X, sg_num, Z)
+
+	/* Asymmetric Cipher */
+	#define crypto_has_cipher(X, Y, Z)		crypto_alg_available(X, 0)
+
+	/* Compression */
+	#define crypto_has_comp(X, Y, Z)		crypto_alg_available(X, 0)
+	#define crypto_comp_tfm(X)				X
+	#define crypto_comp_cast(X)				X
+	#define crypto_alloc_comp(X, Y, Z)		crypto_alloc_tfm(X, mode)
+#else
+	#define ecb(X)	"ecb(" #X ")"
+	#define cbc(X)	"cbc(" #X ")"
+	#define hmac(X)	"hmac(" #X ")"
+#endif /* if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19) */
+
+struct crypto_details
+{
+	char *alg_name;
+	int mode;
+	int sw_type;
+};
+
+/*
+ * This needs to be kept updated with CRYPTO_xxx list (cryptodev.h).
+ * If the Algorithm is not supported, then insert a {NULL, 0, 0} entry.
+ *
+ * IMPORTANT: The index to the array IS CRYPTO_xxx.
+ */
+static struct crypto_details crypto_details[CRYPTO_ALGORITHM_MAX + 1] = {
+	{ NULL,              0,                   0 },
+	/* CRYPTO_xxx index starts at 1 */
+	{ cbc(des),          CRYPTO_TFM_MODE_CBC, SW_TYPE_BLKCIPHER },
+	{ cbc(des3_ede),     CRYPTO_TFM_MODE_CBC, SW_TYPE_BLKCIPHER },
+	{ cbc(blowfish),     CRYPTO_TFM_MODE_CBC, SW_TYPE_BLKCIPHER },
+	{ cbc(cast5),        CRYPTO_TFM_MODE_CBC, SW_TYPE_BLKCIPHER },
+	{ cbc(skipjack),     CRYPTO_TFM_MODE_CBC, SW_TYPE_BLKCIPHER },
+	{ hmac(md5),         0,                   SW_TYPE_HMAC },
+	{ hmac(sha1),        0,                   SW_TYPE_HMAC },
+	{ hmac(ripemd160),   0,                   SW_TYPE_HMAC },
+	{ "md5-kpdk??",      0,                   SW_TYPE_HASH },
+	{ "sha1-kpdk??",     0,                   SW_TYPE_HASH },
+	{ cbc(aes),          CRYPTO_TFM_MODE_CBC, SW_TYPE_BLKCIPHER },
+	{ ecb(arc4),         CRYPTO_TFM_MODE_ECB, SW_TYPE_BLKCIPHER },
+	{ "md5",             0,                   SW_TYPE_HASH },
+	{ "sha1",            0,                   SW_TYPE_HASH },
+	{ hmac(digest_null), 0,                   SW_TYPE_HMAC },
+	{ cbc(cipher_null),  CRYPTO_TFM_MODE_CBC, SW_TYPE_BLKCIPHER },
+	{ "deflate",         0,                   SW_TYPE_COMP },
+	{ hmac(sha256),      0,                   SW_TYPE_HMAC },
+	{ hmac(sha384),      0,                   SW_TYPE_HMAC },
+	{ hmac(sha512),      0,                   SW_TYPE_HMAC },
+	{ cbc(camellia),     CRYPTO_TFM_MODE_CBC, SW_TYPE_BLKCIPHER },
+	{ "sha256",          0,                   SW_TYPE_HASH },
+	{ "sha384",          0,                   SW_TYPE_HASH },
+	{ "sha512",          0,                   SW_TYPE_HASH },
+	{ "ripemd160",       0,                   SW_TYPE_HASH },
+};
+
+int32_t swcr_id = -1;
+module_param(swcr_id, int, 0444);
+MODULE_PARM_DESC(swcr_id, "Read-Only OCF ID for cryptosoft driver");
+
+int swcr_fail_if_compression_grows = 1;
+module_param(swcr_fail_if_compression_grows, int, 0644);
+MODULE_PARM_DESC(swcr_fail_if_compression_grows,
+                "Treat compression that results in more data as a failure");
+
+static struct swcr_data **swcr_sessions = NULL;
+static u_int32_t swcr_sesnum = 0;
+
+static	int swcr_process(device_t, struct cryptop *, int);
+static	int swcr_newsession(device_t, u_int32_t *, struct cryptoini *);
+static	int swcr_freesession(device_t, u_int64_t);
+
+static device_method_t swcr_methods = {
+	/* crypto device methods */
+	DEVMETHOD(cryptodev_newsession,	swcr_newsession),
+	DEVMETHOD(cryptodev_freesession,swcr_freesession),
+	DEVMETHOD(cryptodev_process,	swcr_process),
+};
+
+#define debug swcr_debug
+int swcr_debug = 0;
+module_param(swcr_debug, int, 0644);
+MODULE_PARM_DESC(swcr_debug, "Enable debug");
+
+/*
+ * Generate a new software session.
+ */
+static int
+swcr_newsession(device_t dev, u_int32_t *sid, struct cryptoini *cri)
+{
+	struct swcr_data **swd;
+	u_int32_t i;
+	int error;
+	char *algo;
+	int mode, sw_type;
+
+	dprintk("%s()\n", __FUNCTION__);
+	if (sid == NULL || cri == NULL) {
+		dprintk("%s,%d - EINVAL\n", __FILE__, __LINE__);
+		return EINVAL;
+	}
+
+	if (swcr_sessions) {
+		for (i = 1; i < swcr_sesnum; i++)
+			if (swcr_sessions[i] == NULL)
+				break;
+	} else
+		i = 1;		/* NB: to silence compiler warning */
+
+	if (swcr_sessions == NULL || i == swcr_sesnum) {
+		if (swcr_sessions == NULL) {
+			i = 1; /* We leave swcr_sessions[0] empty */
+			swcr_sesnum = CRYPTO_SW_SESSIONS;
+		} else
+			swcr_sesnum *= 2;
+
+		swd = kmalloc(swcr_sesnum * sizeof(struct swcr_data *), SLAB_ATOMIC);
+		if (swd == NULL) {
+			/* Reset session number */
+			if (swcr_sesnum == CRYPTO_SW_SESSIONS)
+				swcr_sesnum = 0;
+			else
+				swcr_sesnum /= 2;
+			dprintk("%s,%d: ENOBUFS\n", __FILE__, __LINE__);
+			return ENOBUFS;
+		}
+		memset(swd, 0, swcr_sesnum * sizeof(struct swcr_data *));
+
+		/* Copy existing sessions */
+		if (swcr_sessions) {
+			memcpy(swd, swcr_sessions,
+			    (swcr_sesnum / 2) * sizeof(struct swcr_data *));
+			kfree(swcr_sessions);
+		}
+
+		swcr_sessions = swd;
+	}
+
+	swd = &swcr_sessions[i];
+	*sid = i;
+
+	while (cri) {
+		*swd = (struct swcr_data *) kmalloc(sizeof(struct swcr_data),
+				SLAB_ATOMIC);
+		if (*swd == NULL) {
+			swcr_freesession(NULL, i);
+			dprintk("%s,%d: ENOBUFS\n", __FILE__, __LINE__);
+			return ENOBUFS;
+		}
+		memset(*swd, 0, sizeof(struct swcr_data));
+
+		if (cri->cri_alg > CRYPTO_ALGORITHM_MAX) {
+			printk("cryptosoft: Unknown algorithm 0x%x\n", cri->cri_alg);
+			swcr_freesession(NULL, i);
+			return EINVAL;
+		}
+
+		algo = crypto_details[cri->cri_alg].alg_name;
+		if (!algo || !*algo) {
+			printk("cryptosoft: Unsupported algorithm 0x%x\n", cri->cri_alg);
+			swcr_freesession(NULL, i);
+			return EINVAL;
+		}
+
+		mode = crypto_details[cri->cri_alg].mode;
+		sw_type = crypto_details[cri->cri_alg].sw_type;
+
+		/* Algorithm specific configuration */
+		switch (cri->cri_alg) {
+		case CRYPTO_NULL_CBC:
+			cri->cri_klen = 0; /* make it work with crypto API */
+			break;
+		default:
+			break;
+		}
+
+		if (sw_type == SW_TYPE_BLKCIPHER) {
+			dprintk("%s crypto_alloc_blkcipher(%s, 0x%x)\n", __FUNCTION__,
+					algo, mode);
+
+			(*swd)->sw_tfm = crypto_blkcipher_tfm(
+								crypto_alloc_blkcipher(algo, 0,
+									CRYPTO_ALG_ASYNC));
+			if (!(*swd)->sw_tfm) {
+				dprintk("cryptosoft: crypto_alloc_blkcipher failed(%s,0x%x)\n",
+						algo,mode);
+				swcr_freesession(NULL, i);
+				return EINVAL;
+			}
+
+			if (debug) {
+				dprintk("%s key:cri->cri_klen=%d,(cri->cri_klen + 7)/8=%d",
+						__FUNCTION__,cri->cri_klen,(cri->cri_klen + 7)/8);
+				for (i = 0; i < (cri->cri_klen + 7) / 8; i++)
+				{
+					dprintk("%s0x%x", (i % 8) ? " " : "\n    ",
+							cri->cri_key[i] & 0xff);
+				}
+				dprintk("\n");
+			}
+			error = crypto_blkcipher_setkey(
+						crypto_blkcipher_cast((*swd)->sw_tfm), cri->cri_key,
+							(cri->cri_klen + 7) / 8);
+			if (error) {
+				printk("cryptosoft: setkey failed %d (crt_flags=0x%x)\n", error,
+						(*swd)->sw_tfm->crt_flags);
+				swcr_freesession(NULL, i);
+				return error;
+			}
+		} else if (sw_type == SW_TYPE_HMAC || sw_type == SW_TYPE_HASH) {
+			dprintk("%s crypto_alloc_hash(%s, 0x%x)\n", __FUNCTION__,
+					algo, mode);
+
+			(*swd)->sw_tfm = crypto_hash_tfm(
+								crypto_alloc_hash(algo, 0, CRYPTO_ALG_ASYNC));
+
+			if (!(*swd)->sw_tfm) {
+				dprintk("cryptosoft: crypto_alloc_hash failed(%s,0x%x)\n",
+						algo, mode);
+				swcr_freesession(NULL, i);
+				return EINVAL;
+			}
+
+			(*swd)->u.hmac.sw_klen = (cri->cri_klen + 7) / 8;
+			(*swd)->u.hmac.sw_key = (char *)kmalloc((*swd)->u.hmac.sw_klen,
+				SLAB_ATOMIC);
+			if ((*swd)->u.hmac.sw_key == NULL) {
+				swcr_freesession(NULL, i);
+				dprintk("%s,%d: ENOBUFS\n", __FILE__, __LINE__);
+				return ENOBUFS;
+			}
+			memcpy((*swd)->u.hmac.sw_key, cri->cri_key, (*swd)->u.hmac.sw_klen);
+			if (cri->cri_mlen) {
+				(*swd)->u.hmac.sw_mlen = cri->cri_mlen;
+			} else {
+				(*swd)->u.hmac.sw_mlen =
+						crypto_hash_digestsize(
+								crypto_hash_cast((*swd)->sw_tfm));
+			}
+		} else if (sw_type == SW_TYPE_COMP) {
+			(*swd)->sw_tfm = crypto_comp_tfm(
+					crypto_alloc_comp(algo, 0, CRYPTO_ALG_ASYNC));
+			if (!(*swd)->sw_tfm) {
+				dprintk("cryptosoft: crypto_alloc_comp failed(%s,0x%x)\n",
+						algo, mode);
+				swcr_freesession(NULL, i);
+				return EINVAL;
+			}
+			(*swd)->u.sw_comp_buf = kmalloc(CRYPTO_MAX_DATA_LEN, SLAB_ATOMIC);
+			if ((*swd)->u.sw_comp_buf == NULL) {
+				swcr_freesession(NULL, i);
+				dprintk("%s,%d: ENOBUFS\n", __FILE__, __LINE__);
+				return ENOBUFS;
+			}
+		} else {
+			printk("cryptosoft: Unhandled sw_type %d\n", sw_type);
+			swcr_freesession(NULL, i);
+			return EINVAL;
+		}
+
+		(*swd)->sw_alg = cri->cri_alg;
+		(*swd)->sw_type = sw_type;
+
+		cri = cri->cri_next;
+		swd = &((*swd)->sw_next);
+	}
+	return 0;
+}
+
+/*
+ * Free a session.
+ */
+static int
+swcr_freesession(device_t dev, u_int64_t tid)
+{
+	struct swcr_data *swd;
+	u_int32_t sid = CRYPTO_SESID2LID(tid);
+
+	dprintk("%s()\n", __FUNCTION__);
+	if (sid > swcr_sesnum || swcr_sessions == NULL ||
+			swcr_sessions[sid] == NULL) {
+		dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__);
+		return(EINVAL);
+	}
+
+	/* Silently accept and return */
+	if (sid == 0)
+		return(0);
+
+	while ((swd = swcr_sessions[sid]) != NULL) {
+		swcr_sessions[sid] = swd->sw_next;
+		if (swd->sw_tfm)
+			crypto_free_tfm(swd->sw_tfm);
+		if (swd->sw_type == SW_TYPE_COMP) {
+			if (swd->u.sw_comp_buf)
+				kfree(swd->u.sw_comp_buf);
+		} else {
+			if (swd->u.hmac.sw_key)
+				kfree(swd->u.hmac.sw_key);
+		}
+		kfree(swd);
+	}
+	return 0;
+}
+
+/*
+ * Process a software request.
+ */
+static int
+swcr_process(device_t dev, struct cryptop *crp, int hint)
+{
+	struct cryptodesc *crd;
+	struct swcr_data *sw;
+	u_int32_t lid;
+#define SCATTERLIST_MAX 16
+	struct scatterlist sg[SCATTERLIST_MAX];
+	int sg_num, sg_len, skip;
+	struct sk_buff *skb = NULL;
+	struct uio *uiop = NULL;
+
+	dprintk("%s()\n", __FUNCTION__);
+	/* Sanity check */
+	if (crp == NULL) {
+		dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__);
+		return EINVAL;
+	}
+
+	crp->crp_etype = 0;
+
+	if (crp->crp_desc == NULL || crp->crp_buf == NULL) {
+		dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__);
+		crp->crp_etype = EINVAL;
+		goto done;
+	}
+
+	lid = crp->crp_sid & 0xffffffff;
+	if (lid >= swcr_sesnum || lid == 0 || swcr_sessions == NULL ||
+			swcr_sessions[lid] == NULL) {
+		crp->crp_etype = ENOENT;
+		dprintk("%s,%d: ENOENT\n", __FILE__, __LINE__);
+		goto done;
+	}
+
+	/*
+	 * do some error checking outside of the loop for SKB and IOV processing
+	 * this leaves us with valid skb or uiop pointers for later
+	 */
+	if (crp->crp_flags & CRYPTO_F_SKBUF) {
+		skb = (struct sk_buff *) crp->crp_buf;
+		if (skb_shinfo(skb)->nr_frags >= SCATTERLIST_MAX) {
+			printk("%s,%d: %d nr_frags > SCATTERLIST_MAX", __FILE__, __LINE__,
+					skb_shinfo(skb)->nr_frags);
+			goto done;
+		}
+	} else if (crp->crp_flags & CRYPTO_F_IOV) {
+		uiop = (struct uio *) crp->crp_buf;
+		if (uiop->uio_iovcnt > SCATTERLIST_MAX) {
+			printk("%s,%d: %d uio_iovcnt > SCATTERLIST_MAX", __FILE__, __LINE__,
+					uiop->uio_iovcnt);
+			goto done;
+		}
+	}
+
+	/* Go through crypto descriptors, processing as we go */
+	for (crd = crp->crp_desc; crd; crd = crd->crd_next) {
+		/*
+		 * Find the crypto context.
+		 *
+		 * XXX Note that the logic here prevents us from having
+		 * XXX the same algorithm multiple times in a session
+		 * XXX (or rather, we can but it won't give us the right
+		 * XXX results). To do that, we'd need some way of differentiating
+		 * XXX between the various instances of an algorithm (so we can
+		 * XXX locate the correct crypto context).
+		 */
+		for (sw = swcr_sessions[lid]; sw && sw->sw_alg != crd->crd_alg;
+				sw = sw->sw_next)
+			;
+
+		/* No such context ? */
+		if (sw == NULL) {
+			crp->crp_etype = EINVAL;
+			dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__);
+			goto done;
+		}
+
+		skip = crd->crd_skip;
+
+		/*
+		 * setup the SG list skip from the start of the buffer
+		 */
+		memset(sg, 0, sizeof(sg));
+		if (crp->crp_flags & CRYPTO_F_SKBUF) {
+			int i, len;
+
+			sg_num = 0;
+			sg_len = 0;
+
+			if (skip < skb_headlen(skb)) {
+				len = skb_headlen(skb) - skip;
+				if (len + sg_len > crd->crd_len)
+					len = crd->crd_len - sg_len;
+				sg_set_page(&sg[sg_num],
+					virt_to_page(skb->data + skip), len,
+					offset_in_page(skb->data + skip));
+				sg_len += len;
+				sg_num++;
+				skip = 0;
+			} else
+				skip -= skb_headlen(skb);
+
+			for (i = 0; sg_len < crd->crd_len &&
+						i < skb_shinfo(skb)->nr_frags &&
+						sg_num < SCATTERLIST_MAX; i++) {
+				if (skip < skb_shinfo(skb)->frags[i].size) {
+					len = skb_shinfo(skb)->frags[i].size - skip;
+					if (len + sg_len > crd->crd_len)
+						len = crd->crd_len - sg_len;
+					sg_set_page(&sg[sg_num],
+						skb_shinfo(skb)->frags[i].page,
+						len,
+						skb_shinfo(skb)->frags[i].page_offset + skip);
+					sg_len += len;
+					sg_num++;
+					skip = 0;
+				} else
+					skip -= skb_shinfo(skb)->frags[i].size;
+			}
+		} else if (crp->crp_flags & CRYPTO_F_IOV) {
+			int len;
+
+			sg_len = 0;
+			for (sg_num = 0; sg_len <= crd->crd_len &&
+					sg_num < uiop->uio_iovcnt &&
+					sg_num < SCATTERLIST_MAX; sg_num++) {
+				if (skip <= uiop->uio_iov[sg_num].iov_len) {
+					len = uiop->uio_iov[sg_num].iov_len - skip;
+					if (len + sg_len > crd->crd_len)
+						len = crd->crd_len - sg_len;
+					sg_set_page(&sg[sg_num],
+						virt_to_page(uiop->uio_iov[sg_num].iov_base+skip),
+						len,
+						offset_in_page(uiop->uio_iov[sg_num].iov_base+skip));
+					sg_len += len;
+					skip = 0;
+				} else 
+					skip -= uiop->uio_iov[sg_num].iov_len;
+			}
+		} else {
+			sg_len = (crp->crp_ilen - skip);
+			if (sg_len > crd->crd_len)
+				sg_len = crd->crd_len;
+			sg_set_page(&sg[0], virt_to_page(crp->crp_buf + skip),
+				sg_len, offset_in_page(crp->crp_buf + skip));
+			sg_num = 1;
+		}
+
+
+		switch (sw->sw_type) {
+		case SW_TYPE_BLKCIPHER: {
+			unsigned char iv[EALG_MAX_BLOCK_LEN];
+			unsigned char *ivp = iv;
+			int ivsize = 
+				crypto_blkcipher_ivsize(crypto_blkcipher_cast(sw->sw_tfm));
+			struct blkcipher_desc desc;
+
+			if (sg_len < crypto_blkcipher_blocksize(
+					crypto_blkcipher_cast(sw->sw_tfm))) {
+				crp->crp_etype = EINVAL;
+				dprintk("%s,%d: EINVAL len %d < %d\n", __FILE__, __LINE__,
+						sg_len, crypto_blkcipher_blocksize(
+							crypto_blkcipher_cast(sw->sw_tfm)));
+				goto done;
+			}
+
+			if (ivsize > sizeof(iv)) {
+				crp->crp_etype = EINVAL;
+				dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__);
+				goto done;
+			}
+
+			if (crd->crd_flags & CRD_F_KEY_EXPLICIT) {
+				int i, error;
+
+				if (debug) {
+					dprintk("%s key:", __FUNCTION__);
+					for (i = 0; i < (crd->crd_klen + 7) / 8; i++)
+						dprintk("%s0x%x", (i % 8) ? " " : "\n    ",
+								crd->crd_key[i] & 0xff);
+					dprintk("\n");
+				}
+				error = crypto_blkcipher_setkey(
+							crypto_blkcipher_cast(sw->sw_tfm), crd->crd_key,
+							(crd->crd_klen + 7) / 8);
+				if (error) {
+					dprintk("cryptosoft: setkey failed %d (crt_flags=0x%x)\n",
+							error, sw->sw_tfm->crt_flags);
+					crp->crp_etype = -error;
+				}
+			}
+
+			memset(&desc, 0, sizeof(desc));
+			desc.tfm = crypto_blkcipher_cast(sw->sw_tfm);
+
+			if (crd->crd_flags & CRD_F_ENCRYPT) { /* encrypt */
+
+				if (crd->crd_flags & CRD_F_IV_EXPLICIT) {
+					ivp = crd->crd_iv;
+				} else {
+					get_random_bytes(ivp, ivsize);
+				}
+				/*
+				 * do we have to copy the IV back to the buffer ?
+				 */
+				if ((crd->crd_flags & CRD_F_IV_PRESENT) == 0) {
+					crypto_copyback(crp->crp_flags, crp->crp_buf,
+							crd->crd_inject, ivsize, (caddr_t)ivp);
+				}
+				desc.info = ivp;
+				crypto_blkcipher_encrypt_iv(&desc, sg, sg, sg_len);
+
+			} else { /*decrypt */
+
+				if (crd->crd_flags & CRD_F_IV_EXPLICIT) {
+					ivp = crd->crd_iv;
+				} else {
+					crypto_copydata(crp->crp_flags, crp->crp_buf,
+							crd->crd_inject, ivsize, (caddr_t)ivp);
+				}
+				desc.info = ivp;
+				crypto_blkcipher_decrypt_iv(&desc, sg, sg, sg_len);
+			}
+			} break;
+		case SW_TYPE_HMAC:
+		case SW_TYPE_HASH:
+			{
+			char result[HASH_MAX_LEN];
+			struct hash_desc desc;
+
+			/* check we have room for the result */
+			if (crp->crp_ilen - crd->crd_inject < sw->u.hmac.sw_mlen) {
+				dprintk(
+			"cryptosoft: EINVAL crp_ilen=%d, len=%d, inject=%d digestsize=%d\n",
+						crp->crp_ilen, crd->crd_skip + sg_len, crd->crd_inject,
+						sw->u.hmac.sw_mlen);
+				crp->crp_etype = EINVAL;
+				goto done;
+			}
+
+			memset(&desc, 0, sizeof(desc));
+			desc.tfm = crypto_hash_cast(sw->sw_tfm);
+
+			memset(result, 0, sizeof(result));
+
+			if (sw->sw_type == SW_TYPE_HMAC) {
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
+				crypto_hmac(sw->sw_tfm, sw->u.hmac.sw_key, &sw->u.hmac.sw_klen,
+						sg, sg_num, result);
+#else
+				crypto_hash_setkey(desc.tfm, sw->u.hmac.sw_key,
+						sw->u.hmac.sw_klen);
+				crypto_hash_digest(&desc, sg, sg_len, result);
+#endif /* #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19) */
+				
+			} else { /* SW_TYPE_HASH */
+				crypto_hash_digest(&desc, sg, sg_len, result);
+			}
+
+			crypto_copyback(crp->crp_flags, crp->crp_buf,
+					crd->crd_inject, sw->u.hmac.sw_mlen, result);
+			}
+			break;
+
+		case SW_TYPE_COMP: {
+			void *ibuf = NULL;
+			void *obuf = sw->u.sw_comp_buf;
+			int ilen = sg_len, olen = CRYPTO_MAX_DATA_LEN;
+			int ret = 0;
+
+			/*
+			 * we need to use an additional copy if there is more than one
+			 * input chunk since the kernel comp routines do not handle
+			 * SG yet.  Otherwise we just use the input buffer as is.
+			 * Rather than allocate another buffer we just split the tmp
+			 * buffer we already have.
+			 * Perhaps we should just use zlib directly ?
+			 */
+			if (sg_num > 1) {
+				int blk;
+
+				ibuf = obuf;
+				for (blk = 0; blk < sg_num; blk++) {
+					memcpy(obuf, sg_virt(&sg[blk]),
+							sg[blk].length);
+					obuf += sg[blk].length;
+				}
+				olen -= sg_len;
+			} else
+				ibuf = sg_virt(&sg[0]);
+
+			if (crd->crd_flags & CRD_F_ENCRYPT) { /* compress */
+				ret = crypto_comp_compress(crypto_comp_cast(sw->sw_tfm),
+						ibuf, ilen, obuf, &olen);
+				if (!ret && olen > crd->crd_len) {
+					dprintk("cryptosoft: ERANGE compress %d into %d\n",
+							crd->crd_len, olen);
+					if (swcr_fail_if_compression_grows)
+						ret = ERANGE;
+				}
+			} else { /* decompress */
+				ret = crypto_comp_decompress(crypto_comp_cast(sw->sw_tfm),
+						ibuf, ilen, obuf, &olen);
+				if (!ret && (olen + crd->crd_inject) > crp->crp_olen) {
+					dprintk("cryptosoft: ETOOSMALL decompress %d into %d, "
+							"space for %d,at offset %d\n",
+							crd->crd_len, olen, crp->crp_olen, crd->crd_inject);
+					ret = ETOOSMALL;
+				}
+			}
+			if (ret)
+				dprintk("%s,%d: ret = %d\n", __FILE__, __LINE__, ret);
+
+			/*
+			 * on success copy result back,
+			 * linux crpyto API returns -errno,  we need to fix that
+			 */
+			crp->crp_etype = ret < 0 ? -ret : ret;
+			if (ret == 0) {
+				/* copy back the result and return it's size */
+				crypto_copyback(crp->crp_flags, crp->crp_buf,
+						crd->crd_inject, olen, obuf);
+				crp->crp_olen = olen;
+			}
+
+
+			} break;
+
+		default:
+			/* Unknown/unsupported algorithm */
+			dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__);
+			crp->crp_etype = EINVAL;
+			goto done;
+		}
+	}
+
+done:
+	crypto_done(crp);
+	return 0;
+}
+
+static int
+cryptosoft_init(void)
+{
+	int i, sw_type, mode;
+	char *algo;
+
+	dprintk("%s(%p)\n", __FUNCTION__, cryptosoft_init);
+
+	softc_device_init(&swcr_softc, "cryptosoft", 0, swcr_methods);
+
+	swcr_id = crypto_get_driverid(softc_get_device(&swcr_softc),
+			CRYPTOCAP_F_SOFTWARE | CRYPTOCAP_F_SYNC);
+	if (swcr_id < 0) {
+		printk("Software crypto device cannot initialize!");
+		return -ENODEV;
+	}
+
+#define	REGISTER(alg) \
+		crypto_register(swcr_id, alg, 0,0);
+
+	for (i = CRYPTO_ALGORITHM_MIN; i <= CRYPTO_ALGORITHM_MAX; ++i)
+	{
+		
+		algo = crypto_details[i].alg_name;
+		if (!algo || !*algo)
+		{
+			dprintk("%s:Algorithm %d not supported\n", __FUNCTION__, i);
+			continue;
+		}
+
+		mode = crypto_details[i].mode;
+		sw_type = crypto_details[i].sw_type;
+
+		switch (sw_type)
+		{
+			case SW_TYPE_CIPHER:
+				if (crypto_has_cipher(algo, 0, CRYPTO_ALG_ASYNC))
+				{
+					REGISTER(i);
+				}
+				else
+				{
+					dprintk("%s:CIPHER algorithm %d:'%s' not supported\n",
+								__FUNCTION__, i, algo);
+				}
+				break;
+			case SW_TYPE_HMAC:
+				if (crypto_has_hash(algo, 0, CRYPTO_ALG_ASYNC))
+				{
+					REGISTER(i);
+				}
+				else
+				{
+					dprintk("%s:HMAC algorithm %d:'%s' not supported\n",
+								__FUNCTION__, i, algo);
+				}
+				break;
+			case SW_TYPE_HASH:
+				if (crypto_has_hash(algo, 0, CRYPTO_ALG_ASYNC))
+				{
+					REGISTER(i);
+				}
+				else
+				{
+					dprintk("%s:HASH algorithm %d:'%s' not supported\n",
+								__FUNCTION__, i, algo);
+				}
+				break;
+			case SW_TYPE_COMP:
+				if (crypto_has_comp(algo, 0, CRYPTO_ALG_ASYNC))
+				{
+					REGISTER(i);
+				}
+				else
+				{
+					dprintk("%s:COMP algorithm %d:'%s' not supported\n",
+								__FUNCTION__, i, algo);
+				}
+				break;
+			case SW_TYPE_BLKCIPHER:
+				if (crypto_has_blkcipher(algo, 0, CRYPTO_ALG_ASYNC))
+				{
+					REGISTER(i);
+				}
+				else
+				{
+					dprintk("%s:BLKCIPHER algorithm %d:'%s' not supported\n",
+								__FUNCTION__, i, algo);
+				}
+				break;
+			default:
+				dprintk(
+				"%s:Algorithm Type %d not supported (algorithm %d:'%s')\n",
+					__FUNCTION__, sw_type, i, algo);
+				break;
+		}
+	}
+
+	return(0);
+}
+
+static void
+cryptosoft_exit(void)
+{
+	dprintk("%s()\n", __FUNCTION__);
+	crypto_unregister_all(swcr_id);
+	swcr_id = -1;
+}
+
+late_initcall(cryptosoft_init);
+module_exit(cryptosoft_exit);
+
+MODULE_LICENSE("Dual BSD/GPL");
+MODULE_AUTHOR("David McCullough <david_mccullough@securecomputing.com>");
+MODULE_DESCRIPTION("Cryptosoft (OCF module for kernel crypto)");
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/README
+++ linux-mvl-dove-2.6.32/crypto/ocf/README
@@ -0,0 +1,167 @@
+README - ocf-linux-20090901
+---------------------------
+
+This README provides instructions for getting ocf-linux compiled and
+operating in a generic linux environment.  For other information you
+might like to visit the home page for this project:
+
+    http://ocf-linux.sourceforge.net/
+
+Adding OCF to linux
+-------------------
+
+    Not much in this file for now,  just some notes.  I usually build
+    the ocf support as modules but it can be built into the kernel as
+    well.  To use it:
+
+    * mknod /dev/crypto c 10 70
+
+    * to add OCF to your kernel source,  you have two options.  Apply
+      the kernel specific patch:
+
+          cd linux-2.4*; gunzip < ocf-linux-24-XXXXXXXX.patch.gz | patch -p1
+          cd linux-2.6*; gunzip < ocf-linux-26-XXXXXXXX.patch.gz | patch -p1
+    
+      if you do one of the above,  then you can proceed to the next step,
+      or you can do the above process by hand with using the patches against
+      linux-2.4.35 and 2.6.23 to include the ocf code under crypto/ocf.
+      Here's how to add it:
+
+      for 2.4.35 (and later)
+
+          cd linux-2.4.35/crypto
+          tar xvzf ocf-linux.tar.gz
+          cd ..
+          patch -p1 < crypto/ocf/patches/linux-2.4.35-ocf.patch
+
+      for 2.6.23 (and later),  find the kernel patch specific (or nearest)
+      to your kernel versions and then:
+
+          cd linux-2.6.NN/crypto
+          tar xvzf ocf-linux.tar.gz
+          cd ..
+          patch -p1 < crypto/ocf/patches/linux-2.6.NN-ocf.patch
+
+      It should be easy to take this patch and apply it to other more
+      recent versions of the kernels.  The same patches should also work
+      relatively easily on kernels as old as 2.6.11 and 2.4.18.
+      
+    * under 2.4 if you are on a non-x86 platform,  you may need to:
+
+        cp linux-2.X.x/include/asm-i386/kmap_types.h linux-2.X.x/include/asm-YYY
+
+      so that you can build the kernel crypto support needed for the cryptosoft
+      driver.
+
+    * For simplicity you should enable all the crypto support in your kernel
+      except for the test driver.  Likewise for the OCF options.  Do not
+      enable OCF crypto drivers for HW that you do not have (for example
+      ixp4xx will not compile on non-Xscale systems).
+
+    * make sure that cryptodev.h (from ocf-linux.tar.gz) is installed as
+      crypto/cryptodev.h in an include directory that is used for building
+      applications for your platform.  For example on a host system that
+      might be:
+
+              /usr/include/crypto/cryptodev.h
+
+    * patch your openssl-0.9.8i code with the openssl-0.9.8i.patch.
+      (NOTE: there is no longer a need to patch ssh). The patch is against:
+      openssl-0_9_8e
+
+      If you need a patch for an older version of openssl,  you should look
+      to older OCF releases.  This patch is unlikely to work on older
+      openssl versions.
+
+      openssl-0.9.8i.patch
+                - enables --with-cryptodev for non BSD systems
+                - adds -cpu option to openssl speed for calculating CPU load
+                  under linux
+                - fixes null pointer in openssl speed multi thread output.
+                - fixes test keys to work with linux crypto's more stringent
+                  key checking.
+                - adds MD5/SHA acceleration (Ronen Shitrit), only enabled
+                  with the --with-cryptodev-digests option
+                - fixes bug in engine code caching.
+
+    * build crypto-tools-XXXXXXXX.tar.gz if you want to try some of the BSD
+      tools for testing OCF (ie., cryptotest).
+
+How to load the OCF drivers
+---------------------------
+
+    First insert the base modules:
+
+        insmod ocf
+        insmod cryptodev
+
+    You can then install the software OCF driver with:
+
+        insmod cryptosoft
+
+    and one or more of the OCF HW drivers with:
+
+        insmod safe
+        insmod hifn7751
+        insmod ixp4xx
+        ...
+
+    all the drivers take a debug option to enable verbose debug so that
+    you can see what is going on.  For debug you load them as:
+
+        insmod ocf crypto_debug=1
+        insmod cryptodev cryptodev_debug=1
+        insmod cryptosoft swcr_debug=1
+
+    You may load more than one OCF crypto driver but then there is no guarantee
+    as to which will be used.
+
+    You can also enable debug at run time on 2.6 systems with the following:
+
+        echo 1 > /sys/module/ocf/parameters/crypto_debug
+        echo 1 > /sys/module/cryptodev/parameters/cryptodev_debug
+        echo 1 > /sys/module/cryptosoft/parameters/swcr_debug
+        echo 1 > /sys/module/hifn7751/parameters/hifn_debug
+        echo 1 > /sys/module/safe/parameters/safe_debug
+        echo 1 > /sys/module/ixp4xx/parameters/ixp_debug
+        ...
+
+Testing the OCF support
+-----------------------
+
+    run "cryptotest",  it should do a short test for a couple of
+    des packets.  If it does everything is working.
+
+    If this works,  then ssh will use the driver when invoked as:
+
+        ssh -c 3des username@host
+
+    to see for sure that it is operating, enable debug as defined above.
+
+    To get a better idea of performance run:
+
+        cryptotest 100 4096
+
+    There are more options to cryptotest,  see the help.
+
+    It is also possible to use openssl to test the speed of the crypto
+    drivers.
+
+        openssl speed -evp des -engine cryptodev -elapsed
+        openssl speed -evp des3 -engine cryptodev -elapsed
+        openssl speed -evp aes128 -engine cryptodev -elapsed
+
+    and multiple threads (10) with:
+
+        openssl speed -evp des -engine cryptodev -elapsed -multi 10
+        openssl speed -evp des3 -engine cryptodev -elapsed -multi 10
+        openssl speed -evp aes128 -engine cryptodev -elapsed -multi 10
+
+    for public key testing you can try:
+
+        cryptokeytest
+        openssl speed -engine cryptodev rsa -elapsed
+        openssl speed -engine cryptodev dsa -elapsed
+
+David McCullough
+david_mccullough@securecomputing.com
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/crypto.c
+++ linux-mvl-dove-2.6.32/crypto/ocf/crypto.c
@@ -0,0 +1,1784 @@
+/*-
+ * Linux port done by David McCullough <david_mccullough@securecomputing.com>
+ * Copyright (C) 2006-2007 David McCullough
+ * Copyright (C) 2004-2005 Intel Corporation.
+ * The license and original author are listed below.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * Copyright (c) 2002-2006 Sam Leffler.  All rights reserved.
+ *
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#if 0
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD: src/sys/opencrypto/crypto.c,v 1.27 2007/03/21 03:42:51 sam Exp $");
+#endif
+
+/*
+ * Cryptographic Subsystem.
+ *
+ * This code is derived from the Openbsd Cryptographic Framework (OCF)
+ * that has the copyright shown below.  Very little of the original
+ * code remains.
+ */
+/*-
+ * The author of this code is Angelos D. Keromytis (angelos@cis.upenn.edu)
+ *
+ * This code was written by Angelos D. Keromytis in Athens, Greece, in
+ * February 2000. Network Security Technologies Inc. (NSTI) kindly
+ * supported the development of this code.
+ *
+ * Copyright (c) 2000, 2001 Angelos D. Keromytis
+ *
+ * Permission to use, copy, and modify this software with or without fee
+ * is hereby granted, provided that this entire notice is included in
+ * all source code copies of any software which is or includes a copy or
+ * modification of this software.
+ *
+ * THIS SOFTWARE IS BEING PROVIDED "AS IS", WITHOUT ANY EXPRESS OR
+ * IMPLIED WARRANTY. IN PARTICULAR, NONE OF THE AUTHORS MAKES ANY
+ * REPRESENTATION OR WARRANTY OF ANY KIND CONCERNING THE
+ * MERCHANTABILITY OF THIS SOFTWARE OR ITS FITNESS FOR ANY PARTICULAR
+ * PURPOSE.
+ *
+__FBSDID("$FreeBSD: src/sys/opencrypto/crypto.c,v 1.16 2005/01/07 02:29:16 imp Exp $");
+ */
+
+
+#ifndef AUTOCONF_INCLUDED
+#include <linux/config.h>
+#endif
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/list.h>
+#include <linux/slab.h>
+#include <linux/wait.h>
+#include <linux/sched.h>
+#include <linux/spinlock.h>
+#include <linux/version.h>
+#include <cryptodev.h>
+
+/*
+ * keep track of whether or not we have been initialised, a big
+ * issue if we are linked into the kernel and a driver gets started before
+ * us
+ */
+int crypto_initted = 0;
+
+/*
+ * Crypto drivers register themselves by allocating a slot in the
+ * crypto_drivers table with crypto_get_driverid() and then registering
+ * each algorithm they support with crypto_register() and crypto_kregister().
+ */
+
+/*
+ * lock on driver table
+ * we track its state as spin_is_locked does not do anything on non-SMP boxes
+ */
+static spinlock_t	crypto_drivers_lock;
+static int			crypto_drivers_locked;		/* for non-SMP boxes */
+
+#define	CRYPTO_DRIVER_LOCK() \
+			({ \
+				spin_lock_irqsave(&crypto_drivers_lock, d_flags); \
+			 	crypto_drivers_locked = 1; \
+				dprintk("%s,%d: DRIVER_LOCK()\n", __FILE__, __LINE__); \
+			 })
+#define	CRYPTO_DRIVER_UNLOCK() \
+			({ \
+			 	dprintk("%s,%d: DRIVER_UNLOCK()\n", __FILE__, __LINE__); \
+			 	crypto_drivers_locked = 0; \
+				spin_unlock_irqrestore(&crypto_drivers_lock, d_flags); \
+			 })
+#define	CRYPTO_DRIVER_ASSERT() \
+			({ \
+			 	if (!crypto_drivers_locked) { \
+					dprintk("%s,%d: DRIVER_ASSERT!\n", __FILE__, __LINE__); \
+			 	} \
+			 })
+
+/*
+ * Crypto device/driver capabilities structure.
+ *
+ * Synchronization:
+ * (d) - protected by CRYPTO_DRIVER_LOCK()
+ * (q) - protected by CRYPTO_Q_LOCK()
+ * Not tagged fields are read-only.
+ */
+struct cryptocap {
+	device_t	cc_dev;			/* (d) device/driver */
+	u_int32_t	cc_sessions;		/* (d) # of sessions */
+	u_int32_t	cc_koperations;		/* (d) # os asym operations */
+	/*
+	 * Largest possible operator length (in bits) for each type of
+	 * encryption algorithm. XXX not used
+	 */
+	u_int16_t	cc_max_op_len[CRYPTO_ALGORITHM_MAX + 1];
+	u_int8_t	cc_alg[CRYPTO_ALGORITHM_MAX + 1];
+	u_int8_t	cc_kalg[CRK_ALGORITHM_MAX + 1];
+
+	int		cc_flags;		/* (d) flags */
+#define CRYPTOCAP_F_CLEANUP	0x80000000	/* needs resource cleanup */
+	int		cc_qblocked;		/* (q) symmetric q blocked */
+	int		cc_kqblocked;		/* (q) asymmetric q blocked */
+
+	int		cc_unqblocked;		/* (q) symmetric q blocked */
+	int		cc_unkqblocked;		/* (q) asymmetric q blocked */
+};
+static struct cryptocap *crypto_drivers = NULL;
+static int crypto_drivers_num = 0;
+
+/*
+ * There are two queues for crypto requests; one for symmetric (e.g.
+ * cipher) operations and one for asymmetric (e.g. MOD)operations.
+ * A single mutex is used to lock access to both queues.  We could
+ * have one per-queue but having one simplifies handling of block/unblock
+ * operations.
+ */
+static	int crp_sleep = 0;
+static LIST_HEAD(crp_q);		/* request queues */
+static LIST_HEAD(crp_kq);
+
+static spinlock_t crypto_q_lock;
+
+int crypto_all_qblocked = 0;  /* protect with Q_LOCK */
+module_param(crypto_all_qblocked, int, 0444);
+MODULE_PARM_DESC(crypto_all_qblocked, "Are all crypto queues blocked");
+
+int crypto_all_kqblocked = 0; /* protect with Q_LOCK */
+module_param(crypto_all_kqblocked, int, 0444);
+MODULE_PARM_DESC(crypto_all_kqblocked, "Are all asym crypto queues blocked");
+
+#define	CRYPTO_Q_LOCK() \
+			({ \
+				spin_lock_irqsave(&crypto_q_lock, q_flags); \
+			 	dprintk("%s,%d: Q_LOCK()\n", __FILE__, __LINE__); \
+			 })
+#define	CRYPTO_Q_UNLOCK() \
+			({ \
+			 	dprintk("%s,%d: Q_UNLOCK()\n", __FILE__, __LINE__); \
+				spin_unlock_irqrestore(&crypto_q_lock, q_flags); \
+			 })
+
+/*
+ * There are two queues for processing completed crypto requests; one
+ * for the symmetric and one for the asymmetric ops.  We only need one
+ * but have two to avoid type futzing (cryptop vs. cryptkop).  A single
+ * mutex is used to lock access to both queues.  Note that this lock
+ * must be separate from the lock on request queues to insure driver
+ * callbacks don't generate lock order reversals.
+ */
+static LIST_HEAD(crp_ret_q);		/* callback queues */
+static LIST_HEAD(crp_ret_kq);
+
+static spinlock_t crypto_ret_q_lock;
+#define	CRYPTO_RETQ_LOCK() \
+			({ \
+				spin_lock_irqsave(&crypto_ret_q_lock, r_flags); \
+				dprintk("%s,%d: RETQ_LOCK\n", __FILE__, __LINE__); \
+			 })
+#define	CRYPTO_RETQ_UNLOCK() \
+			({ \
+			 	dprintk("%s,%d: RETQ_UNLOCK\n", __FILE__, __LINE__); \
+				spin_unlock_irqrestore(&crypto_ret_q_lock, r_flags); \
+			 })
+#define	CRYPTO_RETQ_EMPTY()	(list_empty(&crp_ret_q) && list_empty(&crp_ret_kq))
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
+static kmem_cache_t *cryptop_zone;
+static kmem_cache_t *cryptodesc_zone;
+#else
+static struct kmem_cache *cryptop_zone;
+static struct kmem_cache *cryptodesc_zone;
+#endif
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)
+#include <linux/sched.h>
+#define	kill_proc(p,s,v)	send_sig(s,find_task_by_vpid(p),0)
+#endif
+
+#define debug crypto_debug
+int crypto_debug = 0;
+module_param(crypto_debug, int, 0644);
+MODULE_PARM_DESC(crypto_debug, "Enable debug");
+EXPORT_SYMBOL(crypto_debug);
+
+/*
+ * Maximum number of outstanding crypto requests before we start
+ * failing requests.  We need this to prevent DOS when too many
+ * requests are arriving for us to keep up.  Otherwise we will
+ * run the system out of memory.  Since crypto is slow,  we are
+ * usually the bottleneck that needs to say, enough is enough.
+ *
+ * We cannot print errors when this condition occurs,  we are already too
+ * slow,  printing anything will just kill us
+ */
+
+static int crypto_q_cnt = 0;
+module_param(crypto_q_cnt, int, 0444);
+MODULE_PARM_DESC(crypto_q_cnt,
+		"Current number of outstanding crypto requests");
+
+static int crypto_q_max = 1000;
+module_param(crypto_q_max, int, 0644);
+MODULE_PARM_DESC(crypto_q_max,
+		"Maximum number of outstanding crypto requests");
+
+#define bootverbose crypto_verbose
+static int crypto_verbose = 0;
+module_param(crypto_verbose, int, 0644);
+MODULE_PARM_DESC(crypto_verbose,
+		"Enable verbose crypto startup");
+
+int	crypto_usercrypto = 1;	/* userland may do crypto reqs */
+module_param(crypto_usercrypto, int, 0644);
+MODULE_PARM_DESC(crypto_usercrypto,
+	   "Enable/disable user-mode access to crypto support");
+
+int	crypto_userasymcrypto = 1;	/* userland may do asym crypto reqs */
+module_param(crypto_userasymcrypto, int, 0644);
+MODULE_PARM_DESC(crypto_userasymcrypto,
+	   "Enable/disable user-mode access to asymmetric crypto support");
+
+int	crypto_devallowsoft = 0;	/* only use hardware crypto */
+module_param(crypto_devallowsoft, int, 0644);
+MODULE_PARM_DESC(crypto_devallowsoft,
+	   "Enable/disable use of software crypto support");
+
+/*
+ * This parameter controls the maximum number of crypto operations to 
+ * do consecutively in the crypto kernel thread before scheduling to allow 
+ * other processes to run. Without it, it is possible to get into a 
+ * situation where the crypto thread never allows any other processes to run.
+ * Default to 1000 which should be less than one second.
+ */
+static int crypto_max_loopcount = 1000;
+module_param(crypto_max_loopcount, int, 0644);
+MODULE_PARM_DESC(crypto_max_loopcount,
+	   "Maximum number of crypto ops to do before yielding to other processes");
+
+static pid_t	cryptoproc = (pid_t) -1;
+static struct	completion cryptoproc_exited;
+static DECLARE_WAIT_QUEUE_HEAD(cryptoproc_wait);
+static pid_t	cryptoretproc = (pid_t) -1;
+static struct	completion cryptoretproc_exited;
+static DECLARE_WAIT_QUEUE_HEAD(cryptoretproc_wait);
+
+static	int crypto_proc(void *arg);
+static	int crypto_ret_proc(void *arg);
+static	int crypto_invoke(struct cryptocap *cap, struct cryptop *crp, int hint);
+static	int crypto_kinvoke(struct cryptkop *krp, int flags);
+static	void crypto_exit(void);
+int crypto_init(void);
+
+static	struct cryptostats cryptostats;
+
+static struct cryptocap *
+crypto_checkdriver(u_int32_t hid)
+{
+	if (crypto_drivers == NULL)
+		return NULL;
+	return (hid >= crypto_drivers_num ? NULL : &crypto_drivers[hid]);
+}
+
+/*
+ * Compare a driver's list of supported algorithms against another
+ * list; return non-zero if all algorithms are supported.
+ */
+static int
+driver_suitable(const struct cryptocap *cap, const struct cryptoini *cri)
+{
+	const struct cryptoini *cr;
+
+	/* See if all the algorithms are supported. */
+	for (cr = cri; cr; cr = cr->cri_next)
+		if (cap->cc_alg[cr->cri_alg] == 0)
+			return 0;
+	return 1;
+}
+
+/*
+ * Select a driver for a new session that supports the specified
+ * algorithms and, optionally, is constrained according to the flags.
+ * The algorithm we use here is pretty stupid; just use the
+ * first driver that supports all the algorithms we need. If there
+ * are multiple drivers we choose the driver with the fewest active
+ * sessions.  We prefer hardware-backed drivers to software ones.
+ *
+ * XXX We need more smarts here (in real life too, but that's
+ * XXX another story altogether).
+ */
+static struct cryptocap *
+crypto_select_driver(const struct cryptoini *cri, int flags)
+{
+	struct cryptocap *cap, *best;
+	int match, hid;
+
+	CRYPTO_DRIVER_ASSERT();
+
+	/*
+	 * Look first for hardware crypto devices if permitted.
+	 */
+	if (flags & CRYPTOCAP_F_HARDWARE)
+		match = CRYPTOCAP_F_HARDWARE;
+	else
+		match = CRYPTOCAP_F_SOFTWARE;
+	best = NULL;
+again:
+	for (hid = 0; hid < crypto_drivers_num; hid++) {
+		cap = &crypto_drivers[hid];
+		/*
+		 * If it's not initialized, is in the process of
+		 * going away, or is not appropriate (hardware
+		 * or software based on match), then skip.
+		 */
+		if (cap->cc_dev == NULL ||
+		    (cap->cc_flags & CRYPTOCAP_F_CLEANUP) ||
+		    (cap->cc_flags & match) == 0)
+			continue;
+
+		/* verify all the algorithms are supported. */
+		if (driver_suitable(cap, cri)) {
+			if (best == NULL ||
+			    cap->cc_sessions < best->cc_sessions)
+				best = cap;
+		}
+	}
+	if (best != NULL)
+		return best;
+	if (match == CRYPTOCAP_F_HARDWARE && (flags & CRYPTOCAP_F_SOFTWARE)) {
+		/* sort of an Algol 68-style for loop */
+		match = CRYPTOCAP_F_SOFTWARE;
+		goto again;
+	}
+	return best;
+}
+
+/*
+ * Create a new session.  The crid argument specifies a crypto
+ * driver to use or constraints on a driver to select (hardware
+ * only, software only, either).  Whatever driver is selected
+ * must be capable of the requested crypto algorithms.
+ */
+int
+crypto_newsession(u_int64_t *sid, struct cryptoini *cri, int crid)
+{
+	struct cryptocap *cap;
+	u_int32_t hid, lid;
+	int err;
+	unsigned long d_flags;
+
+	CRYPTO_DRIVER_LOCK();
+	if ((crid & (CRYPTOCAP_F_HARDWARE | CRYPTOCAP_F_SOFTWARE)) == 0) {
+		/*
+		 * Use specified driver; verify it is capable.
+		 */
+		cap = crypto_checkdriver(crid);
+		if (cap != NULL && !driver_suitable(cap, cri))
+			cap = NULL;
+	} else {
+		/*
+		 * No requested driver; select based on crid flags.
+		 */
+		cap = crypto_select_driver(cri, crid);
+		/*
+		 * if NULL then can't do everything in one session.
+		 * XXX Fix this. We need to inject a "virtual" session
+		 * XXX layer right about here.
+		 */
+	}
+	if (cap != NULL) {
+		/* Call the driver initialization routine. */
+		hid = cap - crypto_drivers;
+		lid = hid;		/* Pass the driver ID. */
+		cap->cc_sessions++;
+		CRYPTO_DRIVER_UNLOCK();
+		err = CRYPTODEV_NEWSESSION(cap->cc_dev, &lid, cri);
+		CRYPTO_DRIVER_LOCK();
+		if (err == 0) {
+			(*sid) = (cap->cc_flags & 0xff000000)
+			       | (hid & 0x00ffffff);
+			(*sid) <<= 32;
+			(*sid) |= (lid & 0xffffffff);
+		} else
+			cap->cc_sessions--;
+	} else
+		err = EINVAL;
+	CRYPTO_DRIVER_UNLOCK();
+	return err;
+}
+
+static void
+crypto_remove(struct cryptocap *cap)
+{
+	CRYPTO_DRIVER_ASSERT();
+	if (cap->cc_sessions == 0 && cap->cc_koperations == 0)
+		bzero(cap, sizeof(*cap));
+}
+
+/*
+ * Delete an existing session (or a reserved session on an unregistered
+ * driver).
+ */
+int
+crypto_freesession(u_int64_t sid)
+{
+	struct cryptocap *cap;
+	u_int32_t hid;
+	int err = 0;
+	unsigned long d_flags;
+
+	dprintk("%s()\n", __FUNCTION__);
+	CRYPTO_DRIVER_LOCK();
+
+	if (crypto_drivers == NULL) {
+		err = EINVAL;
+		goto done;
+	}
+
+	/* Determine two IDs. */
+	hid = CRYPTO_SESID2HID(sid);
+
+	if (hid >= crypto_drivers_num) {
+		dprintk("%s - INVALID DRIVER NUM %d\n", __FUNCTION__, hid);
+		err = ENOENT;
+		goto done;
+	}
+	cap = &crypto_drivers[hid];
+
+	if (cap->cc_dev) {
+		CRYPTO_DRIVER_UNLOCK();
+		/* Call the driver cleanup routine, if available, unlocked. */
+		err = CRYPTODEV_FREESESSION(cap->cc_dev, sid);
+		CRYPTO_DRIVER_LOCK();
+	}
+
+	if (cap->cc_sessions)
+		cap->cc_sessions--;
+
+	if (cap->cc_flags & CRYPTOCAP_F_CLEANUP)
+		crypto_remove(cap);
+
+done:
+	CRYPTO_DRIVER_UNLOCK();
+	return err;
+}
+
+/*
+ * Return an unused driver id.  Used by drivers prior to registering
+ * support for the algorithms they handle.
+ */
+int32_t
+crypto_get_driverid(device_t dev, int flags)
+{
+	struct cryptocap *newdrv;
+	int i;
+	unsigned long d_flags;
+
+	if ((flags & (CRYPTOCAP_F_HARDWARE | CRYPTOCAP_F_SOFTWARE)) == 0) {
+		printf("%s: no flags specified when registering driver\n",
+		    device_get_nameunit(dev));
+		return -1;
+	}
+
+	CRYPTO_DRIVER_LOCK();
+
+	for (i = 0; i < crypto_drivers_num; i++) {
+		if (crypto_drivers[i].cc_dev == NULL &&
+		    (crypto_drivers[i].cc_flags & CRYPTOCAP_F_CLEANUP) == 0) {
+			break;
+		}
+	}
+
+	/* Out of entries, allocate some more. */
+	if (i == crypto_drivers_num) {
+		/* Be careful about wrap-around. */
+		if (2 * crypto_drivers_num <= crypto_drivers_num) {
+			CRYPTO_DRIVER_UNLOCK();
+			printk("crypto: driver count wraparound!\n");
+			return -1;
+		}
+
+		newdrv = kmalloc(2 * crypto_drivers_num * sizeof(struct cryptocap),
+				GFP_KERNEL);
+		if (newdrv == NULL) {
+			CRYPTO_DRIVER_UNLOCK();
+			printk("crypto: no space to expand driver table!\n");
+			return -1;
+		}
+
+		memcpy(newdrv, crypto_drivers,
+				crypto_drivers_num * sizeof(struct cryptocap));
+		memset(&newdrv[crypto_drivers_num], 0,
+				crypto_drivers_num * sizeof(struct cryptocap));
+
+		crypto_drivers_num *= 2;
+
+		kfree(crypto_drivers);
+		crypto_drivers = newdrv;
+	}
+
+	/* NB: state is zero'd on free */
+	crypto_drivers[i].cc_sessions = 1;	/* Mark */
+	crypto_drivers[i].cc_dev = dev;
+	crypto_drivers[i].cc_flags = flags;
+	if (bootverbose)
+		printf("crypto: assign %s driver id %u, flags %u\n",
+		    device_get_nameunit(dev), i, flags);
+
+	CRYPTO_DRIVER_UNLOCK();
+
+	return i;
+}
+
+/*
+ * Lookup a driver by name.  We match against the full device
+ * name and unit, and against just the name.  The latter gives
+ * us a simple widlcarding by device name.  On success return the
+ * driver/hardware identifier; otherwise return -1.
+ */
+int
+crypto_find_driver(const char *match)
+{
+	int i, len = strlen(match);
+	unsigned long d_flags;
+
+	CRYPTO_DRIVER_LOCK();
+	for (i = 0; i < crypto_drivers_num; i++) {
+		device_t dev = crypto_drivers[i].cc_dev;
+		if (dev == NULL ||
+		    (crypto_drivers[i].cc_flags & CRYPTOCAP_F_CLEANUP))
+			continue;
+		if (strncmp(match, device_get_nameunit(dev), len) == 0 ||
+		    strncmp(match, device_get_name(dev), len) == 0)
+			break;
+	}
+	CRYPTO_DRIVER_UNLOCK();
+	return i < crypto_drivers_num ? i : -1;
+}
+
+/*
+ * Return the device_t for the specified driver or NULL
+ * if the driver identifier is invalid.
+ */
+device_t
+crypto_find_device_byhid(int hid)
+{
+	struct cryptocap *cap = crypto_checkdriver(hid);
+	return cap != NULL ? cap->cc_dev : NULL;
+}
+
+/*
+ * Return the device/driver capabilities.
+ */
+int
+crypto_getcaps(int hid)
+{
+	struct cryptocap *cap = crypto_checkdriver(hid);
+	return cap != NULL ? cap->cc_flags : 0;
+}
+
+/*
+ * Register support for a key-related algorithm.  This routine
+ * is called once for each algorithm supported a driver.
+ */
+int
+crypto_kregister(u_int32_t driverid, int kalg, u_int32_t flags)
+{
+	struct cryptocap *cap;
+	int err;
+	unsigned long d_flags;
+
+	dprintk("%s()\n", __FUNCTION__);
+	CRYPTO_DRIVER_LOCK();
+
+	cap = crypto_checkdriver(driverid);
+	if (cap != NULL &&
+	    (CRK_ALGORITM_MIN <= kalg && kalg <= CRK_ALGORITHM_MAX)) {
+		/*
+		 * XXX Do some performance testing to determine placing.
+		 * XXX We probably need an auxiliary data structure that
+		 * XXX describes relative performances.
+		 */
+
+		cap->cc_kalg[kalg] = flags | CRYPTO_ALG_FLAG_SUPPORTED;
+		if (bootverbose)
+			printf("crypto: %s registers key alg %u flags %u\n"
+				, device_get_nameunit(cap->cc_dev)
+				, kalg
+				, flags
+			);
+		err = 0;
+	} else
+		err = EINVAL;
+
+	CRYPTO_DRIVER_UNLOCK();
+	return err;
+}
+
+/*
+ * Register support for a non-key-related algorithm.  This routine
+ * is called once for each such algorithm supported by a driver.
+ */
+int
+crypto_register(u_int32_t driverid, int alg, u_int16_t maxoplen,
+    u_int32_t flags)
+{
+	struct cryptocap *cap;
+	int err;
+	unsigned long d_flags;
+
+	dprintk("%s(id=0x%x, alg=%d, maxoplen=%d, flags=0x%x)\n", __FUNCTION__,
+			driverid, alg, maxoplen, flags);
+
+	CRYPTO_DRIVER_LOCK();
+
+	cap = crypto_checkdriver(driverid);
+	/* NB: algorithms are in the range [1..max] */
+	if (cap != NULL &&
+	    (CRYPTO_ALGORITHM_MIN <= alg && alg <= CRYPTO_ALGORITHM_MAX)) {
+		/*
+		 * XXX Do some performance testing to determine placing.
+		 * XXX We probably need an auxiliary data structure that
+		 * XXX describes relative performances.
+		 */
+
+		cap->cc_alg[alg] = flags | CRYPTO_ALG_FLAG_SUPPORTED;
+		cap->cc_max_op_len[alg] = maxoplen;
+		if (bootverbose)
+			printf("crypto: %s registers alg %u flags %u maxoplen %u\n"
+				, device_get_nameunit(cap->cc_dev)
+				, alg
+				, flags
+				, maxoplen
+			);
+		cap->cc_sessions = 0;		/* Unmark */
+		err = 0;
+	} else
+		err = EINVAL;
+
+	CRYPTO_DRIVER_UNLOCK();
+	return err;
+}
+
+static void
+driver_finis(struct cryptocap *cap)
+{
+	u_int32_t ses, kops;
+
+	CRYPTO_DRIVER_ASSERT();
+
+	ses = cap->cc_sessions;
+	kops = cap->cc_koperations;
+	bzero(cap, sizeof(*cap));
+	if (ses != 0 || kops != 0) {
+		/*
+		 * If there are pending sessions,
+		 * just mark as invalid.
+		 */
+		cap->cc_flags |= CRYPTOCAP_F_CLEANUP;
+		cap->cc_sessions = ses;
+		cap->cc_koperations = kops;
+	}
+}
+
+/*
+ * Unregister a crypto driver. If there are pending sessions using it,
+ * leave enough information around so that subsequent calls using those
+ * sessions will correctly detect the driver has been unregistered and
+ * reroute requests.
+ */
+int
+crypto_unregister(u_int32_t driverid, int alg)
+{
+	struct cryptocap *cap;
+	int i, err;
+	unsigned long d_flags;
+
+	dprintk("%s()\n", __FUNCTION__);
+	CRYPTO_DRIVER_LOCK();
+
+	cap = crypto_checkdriver(driverid);
+	if (cap != NULL &&
+	    (CRYPTO_ALGORITHM_MIN <= alg && alg <= CRYPTO_ALGORITHM_MAX) &&
+	    cap->cc_alg[alg] != 0) {
+		cap->cc_alg[alg] = 0;
+		cap->cc_max_op_len[alg] = 0;
+
+		/* Was this the last algorithm ? */
+		for (i = 1; i <= CRYPTO_ALGORITHM_MAX; i++)
+			if (cap->cc_alg[i] != 0)
+				break;
+
+		if (i == CRYPTO_ALGORITHM_MAX + 1)
+			driver_finis(cap);
+		err = 0;
+	} else
+		err = EINVAL;
+	CRYPTO_DRIVER_UNLOCK();
+	return err;
+}
+
+/*
+ * Unregister all algorithms associated with a crypto driver.
+ * If there are pending sessions using it, leave enough information
+ * around so that subsequent calls using those sessions will
+ * correctly detect the driver has been unregistered and reroute
+ * requests.
+ */
+int
+crypto_unregister_all(u_int32_t driverid)
+{
+	struct cryptocap *cap;
+	int err;
+	unsigned long d_flags;
+
+	dprintk("%s()\n", __FUNCTION__);
+	CRYPTO_DRIVER_LOCK();
+	cap = crypto_checkdriver(driverid);
+	if (cap != NULL) {
+		driver_finis(cap);
+		err = 0;
+	} else
+		err = EINVAL;
+	CRYPTO_DRIVER_UNLOCK();
+
+	return err;
+}
+
+/*
+ * Clear blockage on a driver.  The what parameter indicates whether
+ * the driver is now ready for cryptop's and/or cryptokop's.
+ */
+int
+crypto_unblock(u_int32_t driverid, int what)
+{
+	struct cryptocap *cap;
+	int err;
+	unsigned long q_flags;
+
+	CRYPTO_Q_LOCK();
+	cap = crypto_checkdriver(driverid);
+	if (cap != NULL) {
+		if (what & CRYPTO_SYMQ) {
+			cap->cc_qblocked = 0;
+			cap->cc_unqblocked = 0;
+			crypto_all_qblocked = 0;
+		}
+		if (what & CRYPTO_ASYMQ) {
+			cap->cc_kqblocked = 0;
+			cap->cc_unkqblocked = 0;
+			crypto_all_kqblocked = 0;
+		}
+		if (crp_sleep)
+			wake_up_interruptible(&cryptoproc_wait);
+		err = 0;
+	} else
+		err = EINVAL;
+	CRYPTO_Q_UNLOCK(); //DAVIDM should this be a driver lock
+
+	return err;
+}
+
+/*
+ * Add a crypto request to a queue, to be processed by the kernel thread.
+ */
+int
+crypto_dispatch(struct cryptop *crp)
+{
+	struct cryptocap *cap;
+	int result = -1;
+	unsigned long q_flags;
+
+	dprintk("%s()\n", __FUNCTION__);
+
+	cryptostats.cs_ops++;
+
+	CRYPTO_Q_LOCK();
+	if (crypto_q_cnt >= crypto_q_max) {
+		CRYPTO_Q_UNLOCK();
+		cryptostats.cs_drops++;
+		return ENOMEM;
+	}
+	crypto_q_cnt++;
+
+	/* make sure we are starting a fresh run on this crp. */
+	crp->crp_flags &= ~CRYPTO_F_DONE;
+	crp->crp_etype = 0;
+
+	/*
+	 * Caller marked the request to be processed immediately; dispatch
+	 * it directly to the driver unless the driver is currently blocked.
+	 */
+	if ((crp->crp_flags & CRYPTO_F_BATCH) == 0) {
+		int hid = CRYPTO_SESID2HID(crp->crp_sid);
+		cap = crypto_checkdriver(hid);
+		/* Driver cannot disappear when there is an active session. */
+		KASSERT(cap != NULL, ("%s: Driver disappeared.", __func__));
+		if (!cap->cc_qblocked) {
+			crypto_all_qblocked = 0;
+			crypto_drivers[hid].cc_unqblocked = 1;
+			CRYPTO_Q_UNLOCK();
+			result = crypto_invoke(cap, crp, 0);
+			CRYPTO_Q_LOCK();
+			if (result == ERESTART)
+				if (crypto_drivers[hid].cc_unqblocked)
+					crypto_drivers[hid].cc_qblocked = 1;
+			crypto_drivers[hid].cc_unqblocked = 0;
+		}
+	}
+	if (result == ERESTART) {
+		/*
+		 * The driver ran out of resources, mark the
+		 * driver ``blocked'' for cryptop's and put
+		 * the request back in the queue.  It would
+		 * best to put the request back where we got
+		 * it but that's hard so for now we put it
+		 * at the front.  This should be ok; putting
+		 * it at the end does not work.
+		 */
+		list_add(&crp->crp_next, &crp_q);
+		cryptostats.cs_blocks++;
+		result = 0;
+	} else if (result == -1) {
+		TAILQ_INSERT_TAIL(&crp_q, crp, crp_next);
+		result = 0;
+	}
+	if (crp_sleep)
+		wake_up_interruptible(&cryptoproc_wait);
+	CRYPTO_Q_UNLOCK();
+	return result;
+}
+
+/*
+ * Add an asymetric crypto request to a queue,
+ * to be processed by the kernel thread.
+ */
+int
+crypto_kdispatch(struct cryptkop *krp)
+{
+	int error;
+	unsigned long q_flags;
+
+	cryptostats.cs_kops++;
+
+	error = crypto_kinvoke(krp, krp->krp_crid);
+	if (error == ERESTART) {
+		CRYPTO_Q_LOCK();
+		TAILQ_INSERT_TAIL(&crp_kq, krp, krp_next);
+		if (crp_sleep)
+			wake_up_interruptible(&cryptoproc_wait);
+		CRYPTO_Q_UNLOCK();
+		error = 0;
+	}
+	return error;
+}
+
+/*
+ * Verify a driver is suitable for the specified operation.
+ */
+static __inline int
+kdriver_suitable(const struct cryptocap *cap, const struct cryptkop *krp)
+{
+	return (cap->cc_kalg[krp->krp_op] & CRYPTO_ALG_FLAG_SUPPORTED) != 0;
+}
+
+/*
+ * Select a driver for an asym operation.  The driver must
+ * support the necessary algorithm.  The caller can constrain
+ * which device is selected with the flags parameter.  The
+ * algorithm we use here is pretty stupid; just use the first
+ * driver that supports the algorithms we need. If there are
+ * multiple suitable drivers we choose the driver with the
+ * fewest active operations.  We prefer hardware-backed
+ * drivers to software ones when either may be used.
+ */
+static struct cryptocap *
+crypto_select_kdriver(const struct cryptkop *krp, int flags)
+{
+	struct cryptocap *cap, *best, *blocked;
+	int match, hid;
+
+	CRYPTO_DRIVER_ASSERT();
+
+	/*
+	 * Look first for hardware crypto devices if permitted.
+	 */
+	if (flags & CRYPTOCAP_F_HARDWARE)
+		match = CRYPTOCAP_F_HARDWARE;
+	else
+		match = CRYPTOCAP_F_SOFTWARE;
+	best = NULL;
+	blocked = NULL;
+again:
+	for (hid = 0; hid < crypto_drivers_num; hid++) {
+		cap = &crypto_drivers[hid];
+		/*
+		 * If it's not initialized, is in the process of
+		 * going away, or is not appropriate (hardware
+		 * or software based on match), then skip.
+		 */
+		if (cap->cc_dev == NULL ||
+		    (cap->cc_flags & CRYPTOCAP_F_CLEANUP) ||
+		    (cap->cc_flags & match) == 0)
+			continue;
+
+		/* verify all the algorithms are supported. */
+		if (kdriver_suitable(cap, krp)) {
+			if (best == NULL ||
+			    cap->cc_koperations < best->cc_koperations)
+				best = cap;
+		}
+	}
+	if (best != NULL)
+		return best;
+	if (match == CRYPTOCAP_F_HARDWARE && (flags & CRYPTOCAP_F_SOFTWARE)) {
+		/* sort of an Algol 68-style for loop */
+		match = CRYPTOCAP_F_SOFTWARE;
+		goto again;
+	}
+	return best;
+}
+
+/*
+ * Dispatch an assymetric crypto request.
+ */
+static int
+crypto_kinvoke(struct cryptkop *krp, int crid)
+{
+	struct cryptocap *cap = NULL;
+	int error;
+	unsigned long d_flags;
+
+	KASSERT(krp != NULL, ("%s: krp == NULL", __func__));
+	KASSERT(krp->krp_callback != NULL,
+	    ("%s: krp->crp_callback == NULL", __func__));
+
+	CRYPTO_DRIVER_LOCK();
+	if ((crid & (CRYPTOCAP_F_HARDWARE | CRYPTOCAP_F_SOFTWARE)) == 0) {
+		cap = crypto_checkdriver(crid);
+		if (cap != NULL) {
+			/*
+			 * Driver present, it must support the necessary
+			 * algorithm and, if s/w drivers are excluded,
+			 * it must be registered as hardware-backed.
+			 */
+			if (!kdriver_suitable(cap, krp) ||
+			    (!crypto_devallowsoft &&
+			     (cap->cc_flags & CRYPTOCAP_F_HARDWARE) == 0))
+				cap = NULL;
+		}
+	} else {
+		/*
+		 * No requested driver; select based on crid flags.
+		 */
+		if (!crypto_devallowsoft)	/* NB: disallow s/w drivers */
+			crid &= ~CRYPTOCAP_F_SOFTWARE;
+		cap = crypto_select_kdriver(krp, crid);
+	}
+	if (cap != NULL && !cap->cc_kqblocked) {
+		krp->krp_hid = cap - crypto_drivers;
+		cap->cc_koperations++;
+		CRYPTO_DRIVER_UNLOCK();
+		error = CRYPTODEV_KPROCESS(cap->cc_dev, krp, 0);
+		CRYPTO_DRIVER_LOCK();
+		if (error == ERESTART) {
+			cap->cc_koperations--;
+			CRYPTO_DRIVER_UNLOCK();
+			return (error);
+		}
+		/* return the actual device used */
+		krp->krp_crid = krp->krp_hid;
+	} else {
+		/*
+		 * NB: cap is !NULL if device is blocked; in
+		 *     that case return ERESTART so the operation
+		 *     is resubmitted if possible.
+		 */
+		error = (cap == NULL) ? ENODEV : ERESTART;
+	}
+	CRYPTO_DRIVER_UNLOCK();
+
+	if (error) {
+		krp->krp_status = error;
+		crypto_kdone(krp);
+	}
+	return 0;
+}
+
+
+/*
+ * Dispatch a crypto request to the appropriate crypto devices.
+ */
+static int
+crypto_invoke(struct cryptocap *cap, struct cryptop *crp, int hint)
+{
+	KASSERT(crp != NULL, ("%s: crp == NULL", __func__));
+	KASSERT(crp->crp_callback != NULL,
+	    ("%s: crp->crp_callback == NULL", __func__));
+	KASSERT(crp->crp_desc != NULL, ("%s: crp->crp_desc == NULL", __func__));
+
+	dprintk("%s()\n", __FUNCTION__);
+
+#ifdef CRYPTO_TIMING
+	if (crypto_timing)
+		crypto_tstat(&cryptostats.cs_invoke, &crp->crp_tstamp);
+#endif
+	if (cap->cc_flags & CRYPTOCAP_F_CLEANUP) {
+		struct cryptodesc *crd;
+		u_int64_t nid;
+
+		/*
+		 * Driver has unregistered; migrate the session and return
+		 * an error to the caller so they'll resubmit the op.
+		 *
+		 * XXX: What if there are more already queued requests for this
+		 *      session?
+		 */
+		crypto_freesession(crp->crp_sid);
+
+		for (crd = crp->crp_desc; crd->crd_next; crd = crd->crd_next)
+			crd->CRD_INI.cri_next = &(crd->crd_next->CRD_INI);
+
+		/* XXX propagate flags from initial session? */
+		if (crypto_newsession(&nid, &(crp->crp_desc->CRD_INI),
+		    CRYPTOCAP_F_HARDWARE | CRYPTOCAP_F_SOFTWARE) == 0)
+			crp->crp_sid = nid;
+
+		crp->crp_etype = EAGAIN;
+		crypto_done(crp);
+		return 0;
+	} else {
+		/*
+		 * Invoke the driver to process the request.
+		 */
+		return CRYPTODEV_PROCESS(cap->cc_dev, crp, hint);
+	}
+}
+
+/*
+ * Release a set of crypto descriptors.
+ */
+void
+crypto_freereq(struct cryptop *crp)
+{
+	struct cryptodesc *crd;
+
+	if (crp == NULL)
+		return;
+
+#ifdef DIAGNOSTIC
+	{
+		struct cryptop *crp2;
+		unsigned long q_flags;
+
+		CRYPTO_Q_LOCK();
+		TAILQ_FOREACH(crp2, &crp_q, crp_next) {
+			KASSERT(crp2 != crp,
+			    ("Freeing cryptop from the crypto queue (%p).",
+			    crp));
+		}
+		CRYPTO_Q_UNLOCK();
+		CRYPTO_RETQ_LOCK();
+		TAILQ_FOREACH(crp2, &crp_ret_q, crp_next) {
+			KASSERT(crp2 != crp,
+			    ("Freeing cryptop from the return queue (%p).",
+			    crp));
+		}
+		CRYPTO_RETQ_UNLOCK();
+	}
+#endif
+
+	while ((crd = crp->crp_desc) != NULL) {
+		crp->crp_desc = crd->crd_next;
+		kmem_cache_free(cryptodesc_zone, crd);
+	}
+	kmem_cache_free(cryptop_zone, crp);
+}
+
+/*
+ * Acquire a set of crypto descriptors.
+ */
+struct cryptop *
+crypto_getreq(int num)
+{
+	struct cryptodesc *crd;
+	struct cryptop *crp;
+
+	crp = kmem_cache_alloc(cryptop_zone, SLAB_ATOMIC);
+	if (crp != NULL) {
+		memset(crp, 0, sizeof(*crp));
+		INIT_LIST_HEAD(&crp->crp_next);
+		init_waitqueue_head(&crp->crp_waitq);
+		while (num--) {
+			crd = kmem_cache_alloc(cryptodesc_zone, SLAB_ATOMIC);
+			if (crd == NULL) {
+				crypto_freereq(crp);
+				return NULL;
+			}
+			memset(crd, 0, sizeof(*crd));
+			crd->crd_next = crp->crp_desc;
+			crp->crp_desc = crd;
+		}
+	}
+	return crp;
+}
+
+/*
+ * Invoke the callback on behalf of the driver.
+ */
+void
+crypto_done(struct cryptop *crp)
+{
+	unsigned long q_flags;
+
+	dprintk("%s()\n", __FUNCTION__);
+	if ((crp->crp_flags & CRYPTO_F_DONE) == 0) {
+		crp->crp_flags |= CRYPTO_F_DONE;
+		CRYPTO_Q_LOCK();
+		crypto_q_cnt--;
+		CRYPTO_Q_UNLOCK();
+	} else
+		printk("crypto: crypto_done op already done, flags 0x%x",
+				crp->crp_flags);
+	if (crp->crp_etype != 0)
+		cryptostats.cs_errs++;
+	/*
+	 * CBIMM means unconditionally do the callback immediately;
+	 * CBIFSYNC means do the callback immediately only if the
+	 * operation was done synchronously.  Both are used to avoid
+	 * doing extraneous context switches; the latter is mostly
+	 * used with the software crypto driver.
+	 */
+	if ((crp->crp_flags & CRYPTO_F_CBIMM) ||
+	    ((crp->crp_flags & CRYPTO_F_CBIFSYNC) &&
+	     (CRYPTO_SESID2CAPS(crp->crp_sid) & CRYPTOCAP_F_SYNC))) {
+		/*
+		 * Do the callback directly.  This is ok when the
+		 * callback routine does very little (e.g. the
+		 * /dev/crypto callback method just does a wakeup).
+		 */
+		crp->crp_callback(crp);
+	} else {
+		unsigned long r_flags;
+		/*
+		 * Normal case; queue the callback for the thread.
+		 */
+		CRYPTO_RETQ_LOCK();
+		if (CRYPTO_RETQ_EMPTY())
+			wake_up_interruptible(&cryptoretproc_wait);/* shared wait channel */
+		TAILQ_INSERT_TAIL(&crp_ret_q, crp, crp_next);
+		CRYPTO_RETQ_UNLOCK();
+	}
+}
+
+/*
+ * Invoke the callback on behalf of the driver.
+ */
+void
+crypto_kdone(struct cryptkop *krp)
+{
+	struct cryptocap *cap;
+	unsigned long d_flags;
+
+	if ((krp->krp_flags & CRYPTO_KF_DONE) != 0)
+		printk("crypto: crypto_kdone op already done, flags 0x%x",
+				krp->krp_flags);
+	krp->krp_flags |= CRYPTO_KF_DONE;
+	if (krp->krp_status != 0)
+		cryptostats.cs_kerrs++;
+
+	CRYPTO_DRIVER_LOCK();
+	/* XXX: What if driver is loaded in the meantime? */
+	if (krp->krp_hid < crypto_drivers_num) {
+		cap = &crypto_drivers[krp->krp_hid];
+		cap->cc_koperations--;
+		KASSERT(cap->cc_koperations >= 0, ("cc_koperations < 0"));
+		if (cap->cc_flags & CRYPTOCAP_F_CLEANUP)
+			crypto_remove(cap);
+	}
+	CRYPTO_DRIVER_UNLOCK();
+
+	/*
+	 * CBIMM means unconditionally do the callback immediately;
+	 * This is used to avoid doing extraneous context switches
+	 */
+	if ((krp->krp_flags & CRYPTO_KF_CBIMM)) {
+		/*
+		 * Do the callback directly.  This is ok when the
+		 * callback routine does very little (e.g. the
+		 * /dev/crypto callback method just does a wakeup).
+		 */
+		krp->krp_callback(krp);
+	} else {
+		unsigned long r_flags;
+		/*
+		 * Normal case; queue the callback for the thread.
+		 */
+		CRYPTO_RETQ_LOCK();
+		if (CRYPTO_RETQ_EMPTY())
+			wake_up_interruptible(&cryptoretproc_wait);/* shared wait channel */
+		TAILQ_INSERT_TAIL(&crp_ret_kq, krp, krp_next);
+		CRYPTO_RETQ_UNLOCK();
+	}
+}
+
+int
+crypto_getfeat(int *featp)
+{
+	int hid, kalg, feat = 0;
+	unsigned long d_flags;
+
+	CRYPTO_DRIVER_LOCK();
+	for (hid = 0; hid < crypto_drivers_num; hid++) {
+		const struct cryptocap *cap = &crypto_drivers[hid];
+
+		if ((cap->cc_flags & CRYPTOCAP_F_SOFTWARE) &&
+		    !crypto_devallowsoft) {
+			continue;
+		}
+		for (kalg = 0; kalg < CRK_ALGORITHM_MAX; kalg++)
+			if (cap->cc_kalg[kalg] & CRYPTO_ALG_FLAG_SUPPORTED)
+				feat |=  1 << kalg;
+	}
+	CRYPTO_DRIVER_UNLOCK();
+	*featp = feat;
+	return (0);
+}
+
+/*
+ * Crypto thread, dispatches crypto requests.
+ */
+static int
+crypto_proc(void *arg)
+{
+	struct cryptop *crp, *submit;
+	struct cryptkop *krp, *krpp;
+	struct cryptocap *cap;
+	u_int32_t hid;
+	int result, hint;
+	unsigned long q_flags;
+	int loopcount = 0;
+
+	ocf_daemonize("crypto");
+
+	CRYPTO_Q_LOCK();
+	for (;;) {
+		/*
+		 * we need to make sure we don't get into a busy loop with nothing
+		 * to do,  the two crypto_all_*blocked vars help us find out when
+		 * we are all full and can do nothing on any driver or Q.  If so we
+		 * wait for an unblock.
+		 */
+		crypto_all_qblocked  = !list_empty(&crp_q);
+
+		/*
+		 * Find the first element in the queue that can be
+		 * processed and look-ahead to see if multiple ops
+		 * are ready for the same driver.
+		 */
+		submit = NULL;
+		hint = 0;
+		list_for_each_entry(crp, &crp_q, crp_next) {
+			hid = CRYPTO_SESID2HID(crp->crp_sid);
+			cap = crypto_checkdriver(hid);
+			/*
+			 * Driver cannot disappear when there is an active
+			 * session.
+			 */
+			KASSERT(cap != NULL, ("%s:%u Driver disappeared.",
+			    __func__, __LINE__));
+			if (cap == NULL || cap->cc_dev == NULL) {
+				/* Op needs to be migrated, process it. */
+				if (submit == NULL)
+					submit = crp;
+				break;
+			}
+			if (!cap->cc_qblocked) {
+				if (submit != NULL) {
+					/*
+					 * We stop on finding another op,
+					 * regardless whether its for the same
+					 * driver or not.  We could keep
+					 * searching the queue but it might be
+					 * better to just use a per-driver
+					 * queue instead.
+					 */
+					if (CRYPTO_SESID2HID(submit->crp_sid) == hid)
+						hint = CRYPTO_HINT_MORE;
+					break;
+				} else {
+					submit = crp;
+					if ((submit->crp_flags & CRYPTO_F_BATCH) == 0)
+						break;
+					/* keep scanning for more are q'd */
+				}
+			}
+		}
+		if (submit != NULL) {
+			hid = CRYPTO_SESID2HID(submit->crp_sid);
+			crypto_all_qblocked = 0;
+			list_del(&submit->crp_next);
+			crypto_drivers[hid].cc_unqblocked = 1;
+			cap = crypto_checkdriver(hid);
+			CRYPTO_Q_UNLOCK();
+			KASSERT(cap != NULL, ("%s:%u Driver disappeared.",
+			    __func__, __LINE__));
+			result = crypto_invoke(cap, submit, hint);
+			CRYPTO_Q_LOCK();
+			if (result == ERESTART) {
+				/*
+				 * The driver ran out of resources, mark the
+				 * driver ``blocked'' for cryptop's and put
+				 * the request back in the queue.  It would
+				 * best to put the request back where we got
+				 * it but that's hard so for now we put it
+				 * at the front.  This should be ok; putting
+				 * it at the end does not work.
+				 */
+				/* XXX validate sid again? */
+				list_add(&submit->crp_next, &crp_q);
+				cryptostats.cs_blocks++;
+				if (crypto_drivers[hid].cc_unqblocked)
+					crypto_drivers[hid].cc_qblocked=0;
+				crypto_drivers[hid].cc_unqblocked=0;
+			}
+			crypto_drivers[hid].cc_unqblocked = 0;
+		}
+
+		crypto_all_kqblocked = !list_empty(&crp_kq);
+
+		/* As above, but for key ops */
+		krp = NULL;
+		list_for_each_entry(krpp, &crp_kq, krp_next) {
+			cap = crypto_checkdriver(krpp->krp_hid);
+			if (cap == NULL || cap->cc_dev == NULL) {
+				/*
+				 * Operation needs to be migrated, invalidate
+				 * the assigned device so it will reselect a
+				 * new one below.  Propagate the original
+				 * crid selection flags if supplied.
+				 */
+				krp->krp_hid = krp->krp_crid &
+				    (CRYPTOCAP_F_SOFTWARE|CRYPTOCAP_F_HARDWARE);
+				if (krp->krp_hid == 0)
+					krp->krp_hid =
+				    CRYPTOCAP_F_SOFTWARE|CRYPTOCAP_F_HARDWARE;
+				break;
+			}
+			if (!cap->cc_kqblocked) {
+				krp = krpp;
+				break;
+			}
+		}
+		if (krp != NULL) {
+			crypto_all_kqblocked = 0;
+			list_del(&krp->krp_next);
+			crypto_drivers[krp->krp_hid].cc_kqblocked = 1;
+			CRYPTO_Q_UNLOCK();
+			result = crypto_kinvoke(krp, krp->krp_hid);
+			CRYPTO_Q_LOCK();
+			if (result == ERESTART) {
+				/*
+				 * The driver ran out of resources, mark the
+				 * driver ``blocked'' for cryptkop's and put
+				 * the request back in the queue.  It would
+				 * best to put the request back where we got
+				 * it but that's hard so for now we put it
+				 * at the front.  This should be ok; putting
+				 * it at the end does not work.
+				 */
+				/* XXX validate sid again? */
+				list_add(&krp->krp_next, &crp_kq);
+				cryptostats.cs_kblocks++;
+			} else
+				crypto_drivers[krp->krp_hid].cc_kqblocked = 0;
+		}
+
+		if (submit == NULL && krp == NULL) {
+			/*
+			 * Nothing more to be processed.  Sleep until we're
+			 * woken because there are more ops to process.
+			 * This happens either by submission or by a driver
+			 * becoming unblocked and notifying us through
+			 * crypto_unblock.  Note that when we wakeup we
+			 * start processing each queue again from the
+			 * front. It's not clear that it's important to
+			 * preserve this ordering since ops may finish
+			 * out of order if dispatched to different devices
+			 * and some become blocked while others do not.
+			 */
+			dprintk("%s - sleeping (qe=%d qb=%d kqe=%d kqb=%d)\n",
+					__FUNCTION__,
+					list_empty(&crp_q), crypto_all_qblocked,
+					list_empty(&crp_kq), crypto_all_kqblocked);
+			loopcount = 0;
+			CRYPTO_Q_UNLOCK();
+			crp_sleep = 1;
+			wait_event_interruptible(cryptoproc_wait,
+					!(list_empty(&crp_q) || crypto_all_qblocked) ||
+					!(list_empty(&crp_kq) || crypto_all_kqblocked) ||
+					cryptoproc == (pid_t) -1);
+			crp_sleep = 0;
+			if (signal_pending (current)) {
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+				spin_lock_irq(&current->sigmask_lock);
+#endif
+				flush_signals(current);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+				spin_unlock_irq(&current->sigmask_lock);
+#endif
+			}
+			CRYPTO_Q_LOCK();
+			dprintk("%s - awake\n", __FUNCTION__);
+			if (cryptoproc == (pid_t) -1)
+				break;
+			cryptostats.cs_intrs++;
+		} else if (loopcount > crypto_max_loopcount) {
+			/*
+			 * Give other processes a chance to run if we've 
+			 * been using the CPU exclusively for a while.
+			 */
+			loopcount = 0;
+			schedule();
+		}
+		loopcount++;
+	}
+	CRYPTO_Q_UNLOCK();
+	complete_and_exit(&cryptoproc_exited, 0);
+}
+
+/*
+ * Crypto returns thread, does callbacks for processed crypto requests.
+ * Callbacks are done here, rather than in the crypto drivers, because
+ * callbacks typically are expensive and would slow interrupt handling.
+ */
+static int
+crypto_ret_proc(void *arg)
+{
+	struct cryptop *crpt;
+	struct cryptkop *krpt;
+	unsigned long  r_flags;
+
+	ocf_daemonize("crypto_ret");
+
+	CRYPTO_RETQ_LOCK();
+	for (;;) {
+		/* Harvest return q's for completed ops */
+		crpt = NULL;
+		if (!list_empty(&crp_ret_q))
+			crpt = list_entry(crp_ret_q.next, typeof(*crpt), crp_next);
+		if (crpt != NULL)
+			list_del(&crpt->crp_next);
+
+		krpt = NULL;
+		if (!list_empty(&crp_ret_kq))
+			krpt = list_entry(crp_ret_kq.next, typeof(*krpt), krp_next);
+		if (krpt != NULL)
+			list_del(&krpt->krp_next);
+
+		if (crpt != NULL || krpt != NULL) {
+			CRYPTO_RETQ_UNLOCK();
+			/*
+			 * Run callbacks unlocked.
+			 */
+			if (crpt != NULL)
+				crpt->crp_callback(crpt);
+			if (krpt != NULL)
+				krpt->krp_callback(krpt);
+			CRYPTO_RETQ_LOCK();
+		} else {
+			/*
+			 * Nothing more to be processed.  Sleep until we're
+			 * woken because there are more returns to process.
+			 */
+			dprintk("%s - sleeping\n", __FUNCTION__);
+			CRYPTO_RETQ_UNLOCK();
+			wait_event_interruptible(cryptoretproc_wait,
+					cryptoretproc == (pid_t) -1 ||
+					!list_empty(&crp_ret_q) ||
+					!list_empty(&crp_ret_kq));
+			if (signal_pending (current)) {
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+				spin_lock_irq(&current->sigmask_lock);
+#endif
+				flush_signals(current);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+				spin_unlock_irq(&current->sigmask_lock);
+#endif
+			}
+			CRYPTO_RETQ_LOCK();
+			dprintk("%s - awake\n", __FUNCTION__);
+			if (cryptoretproc == (pid_t) -1) {
+				dprintk("%s - EXITING!\n", __FUNCTION__);
+				break;
+			}
+			cryptostats.cs_rets++;
+		}
+	}
+	CRYPTO_RETQ_UNLOCK();
+	complete_and_exit(&cryptoretproc_exited, 0);
+}
+
+
+#if 0 /* should put this into /proc or something */
+static void
+db_show_drivers(void)
+{
+	int hid;
+
+	db_printf("%12s %4s %4s %8s %2s %2s\n"
+		, "Device"
+		, "Ses"
+		, "Kops"
+		, "Flags"
+		, "QB"
+		, "KB"
+	);
+	for (hid = 0; hid < crypto_drivers_num; hid++) {
+		const struct cryptocap *cap = &crypto_drivers[hid];
+		if (cap->cc_dev == NULL)
+			continue;
+		db_printf("%-12s %4u %4u %08x %2u %2u\n"
+		    , device_get_nameunit(cap->cc_dev)
+		    , cap->cc_sessions
+		    , cap->cc_koperations
+		    , cap->cc_flags
+		    , cap->cc_qblocked
+		    , cap->cc_kqblocked
+		);
+	}
+}
+
+DB_SHOW_COMMAND(crypto, db_show_crypto)
+{
+	struct cryptop *crp;
+
+	db_show_drivers();
+	db_printf("\n");
+
+	db_printf("%4s %8s %4s %4s %4s %4s %8s %8s\n",
+	    "HID", "Caps", "Ilen", "Olen", "Etype", "Flags",
+	    "Desc", "Callback");
+	TAILQ_FOREACH(crp, &crp_q, crp_next) {
+		db_printf("%4u %08x %4u %4u %4u %04x %8p %8p\n"
+		    , (int) CRYPTO_SESID2HID(crp->crp_sid)
+		    , (int) CRYPTO_SESID2CAPS(crp->crp_sid)
+		    , crp->crp_ilen, crp->crp_olen
+		    , crp->crp_etype
+		    , crp->crp_flags
+		    , crp->crp_desc
+		    , crp->crp_callback
+		);
+	}
+	if (!TAILQ_EMPTY(&crp_ret_q)) {
+		db_printf("\n%4s %4s %4s %8s\n",
+		    "HID", "Etype", "Flags", "Callback");
+		TAILQ_FOREACH(crp, &crp_ret_q, crp_next) {
+			db_printf("%4u %4u %04x %8p\n"
+			    , (int) CRYPTO_SESID2HID(crp->crp_sid)
+			    , crp->crp_etype
+			    , crp->crp_flags
+			    , crp->crp_callback
+			);
+		}
+	}
+}
+
+DB_SHOW_COMMAND(kcrypto, db_show_kcrypto)
+{
+	struct cryptkop *krp;
+
+	db_show_drivers();
+	db_printf("\n");
+
+	db_printf("%4s %5s %4s %4s %8s %4s %8s\n",
+	    "Op", "Status", "#IP", "#OP", "CRID", "HID", "Callback");
+	TAILQ_FOREACH(krp, &crp_kq, krp_next) {
+		db_printf("%4u %5u %4u %4u %08x %4u %8p\n"
+		    , krp->krp_op
+		    , krp->krp_status
+		    , krp->krp_iparams, krp->krp_oparams
+		    , krp->krp_crid, krp->krp_hid
+		    , krp->krp_callback
+		);
+	}
+	if (!TAILQ_EMPTY(&crp_ret_q)) {
+		db_printf("%4s %5s %8s %4s %8s\n",
+		    "Op", "Status", "CRID", "HID", "Callback");
+		TAILQ_FOREACH(krp, &crp_ret_kq, krp_next) {
+			db_printf("%4u %5u %08x %4u %8p\n"
+			    , krp->krp_op
+			    , krp->krp_status
+			    , krp->krp_crid, krp->krp_hid
+			    , krp->krp_callback
+			);
+		}
+	}
+}
+#endif
+
+
+int
+crypto_init(void)
+{
+	int error;
+
+	dprintk("%s(0x%x)\n", __FUNCTION__, (int) crypto_init);
+
+	if (crypto_initted)
+		return 0;
+	crypto_initted = 1;
+
+	spin_lock_init(&crypto_drivers_lock);
+	spin_lock_init(&crypto_q_lock);
+	spin_lock_init(&crypto_ret_q_lock);
+
+	cryptop_zone = kmem_cache_create("cryptop", sizeof(struct cryptop),
+				       0, SLAB_HWCACHE_ALIGN, NULL
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)
+				       , NULL
+#endif
+					);
+
+	cryptodesc_zone = kmem_cache_create("cryptodesc", sizeof(struct cryptodesc),
+				       0, SLAB_HWCACHE_ALIGN, NULL
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)
+				       , NULL
+#endif
+					);
+
+	if (cryptodesc_zone == NULL || cryptop_zone == NULL) {
+		printk("crypto: crypto_init cannot setup crypto zones\n");
+		error = ENOMEM;
+		goto bad;
+	}
+
+	crypto_drivers_num = CRYPTO_DRIVERS_INITIAL;
+	crypto_drivers = kmalloc(crypto_drivers_num * sizeof(struct cryptocap),
+			GFP_KERNEL);
+	if (crypto_drivers == NULL) {
+		printk("crypto: crypto_init cannot setup crypto drivers\n");
+		error = ENOMEM;
+		goto bad;
+	}
+
+	memset(crypto_drivers, 0, crypto_drivers_num * sizeof(struct cryptocap));
+
+	init_completion(&cryptoproc_exited);
+	init_completion(&cryptoretproc_exited);
+
+	cryptoproc = 0; /* to avoid race condition where proc runs first */
+	cryptoproc = kernel_thread(crypto_proc, NULL, CLONE_FS|CLONE_FILES);
+	if (cryptoproc < 0) {
+		error = cryptoproc;
+		printk("crypto: crypto_init cannot start crypto thread; error %d",
+			error);
+		goto bad;
+	}
+
+	cryptoretproc = 0; /* to avoid race condition where proc runs first */
+	cryptoretproc = kernel_thread(crypto_ret_proc, NULL, CLONE_FS|CLONE_FILES);
+	if (cryptoretproc < 0) {
+		error = cryptoretproc;
+		printk("crypto: crypto_init cannot start cryptoret thread; error %d",
+				error);
+		goto bad;
+	}
+
+	return 0;
+bad:
+	crypto_exit();
+	return error;
+}
+
+
+static void
+crypto_exit(void)
+{
+	pid_t p;
+	unsigned long d_flags;
+
+	dprintk("%s()\n", __FUNCTION__);
+
+	/*
+	 * Terminate any crypto threads.
+	 */
+
+	CRYPTO_DRIVER_LOCK();
+	p = cryptoproc;
+	cryptoproc = (pid_t) -1;
+	kill_proc(p, SIGTERM, 1);
+	wake_up_interruptible(&cryptoproc_wait);
+	CRYPTO_DRIVER_UNLOCK();
+
+	wait_for_completion(&cryptoproc_exited);
+
+	CRYPTO_DRIVER_LOCK();
+	p = cryptoretproc;
+	cryptoretproc = (pid_t) -1;
+	kill_proc(p, SIGTERM, 1);
+	wake_up_interruptible(&cryptoretproc_wait);
+	CRYPTO_DRIVER_UNLOCK();
+
+	wait_for_completion(&cryptoretproc_exited);
+
+	/* XXX flush queues??? */
+
+	/* 
+	 * Reclaim dynamically allocated resources.
+	 */
+	if (crypto_drivers != NULL)
+		kfree(crypto_drivers);
+
+	if (cryptodesc_zone != NULL)
+		kmem_cache_destroy(cryptodesc_zone);
+	if (cryptop_zone != NULL)
+		kmem_cache_destroy(cryptop_zone);
+}
+
+
+EXPORT_SYMBOL(crypto_newsession);
+EXPORT_SYMBOL(crypto_freesession);
+EXPORT_SYMBOL(crypto_get_driverid);
+EXPORT_SYMBOL(crypto_kregister);
+EXPORT_SYMBOL(crypto_register);
+EXPORT_SYMBOL(crypto_unregister);
+EXPORT_SYMBOL(crypto_unregister_all);
+EXPORT_SYMBOL(crypto_unblock);
+EXPORT_SYMBOL(crypto_dispatch);
+EXPORT_SYMBOL(crypto_kdispatch);
+EXPORT_SYMBOL(crypto_freereq);
+EXPORT_SYMBOL(crypto_getreq);
+EXPORT_SYMBOL(crypto_done);
+EXPORT_SYMBOL(crypto_kdone);
+EXPORT_SYMBOL(crypto_getfeat);
+EXPORT_SYMBOL(crypto_userasymcrypto);
+EXPORT_SYMBOL(crypto_getcaps);
+EXPORT_SYMBOL(crypto_find_driver);
+EXPORT_SYMBOL(crypto_find_device_byhid);
+
+module_init(crypto_init);
+module_exit(crypto_exit);
+
+MODULE_LICENSE("BSD");
+MODULE_AUTHOR("David McCullough <david_mccullough@securecomputing.com>");
+MODULE_DESCRIPTION("OCF (OpenBSD Cryptographic Framework)");
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/ocf-bench.c
+++ linux-mvl-dove-2.6.32/crypto/ocf/ocf-bench.c
@@ -0,0 +1,436 @@
+/*
+ * A loadable module that benchmarks the OCF crypto speed from kernel space.
+ *
+ * Copyright (C) 2004-2007 David McCullough <david_mccullough@securecomputing.com>
+ *
+ * LICENSE TERMS
+ *
+ * The free distribution and use of this software in both source and binary
+ * form is allowed (with or without changes) provided that:
+ *
+ *   1. distributions of this source code include the above copyright
+ *      notice, this list of conditions and the following disclaimer;
+ *
+ *   2. distributions in binary form include the above copyright
+ *      notice, this list of conditions and the following disclaimer
+ *      in the documentation and/or other associated materials;
+ *
+ *   3. the copyright holder's name is not used to endorse products
+ *      built using this software without specific written permission.
+ *
+ * ALTERNATIVELY, provided that this notice is retained in full, this product
+ * may be distributed under the terms of the GNU General Public License (GPL),
+ * in which case the provisions of the GPL apply INSTEAD OF those given above.
+ *
+ * DISCLAIMER
+ *
+ * This software is provided 'as is' with no explicit or implied warranties
+ * in respect of its properties, including, but not limited to, correctness
+ * and/or fitness for purpose.
+ */
+
+
+#ifndef AUTOCONF_INCLUDED
+#include <linux/config.h>
+#endif
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/list.h>
+#include <linux/slab.h>
+#include <linux/wait.h>
+#include <linux/sched.h>
+#include <linux/spinlock.h>
+#include <linux/version.h>
+#include <linux/interrupt.h>
+#include <cryptodev.h>
+
+#ifdef I_HAVE_AN_XSCALE_WITH_INTEL_SDK
+#define BENCH_IXP_ACCESS_LIB 1
+#endif
+#ifdef BENCH_IXP_ACCESS_LIB
+#include <IxTypes.h>
+#include <IxOsBuffMgt.h>
+#include <IxNpeDl.h>
+#include <IxCryptoAcc.h>
+#include <IxQMgr.h>
+#include <IxOsServices.h>
+#include <IxOsCacheMMU.h>
+#endif
+
+/*
+ * support for access lib version 1.4
+ */
+#ifndef IX_MBUF_PRIV
+#define IX_MBUF_PRIV(x) ((x)->priv)
+#endif
+
+/*
+ * the number of simultaneously active requests
+ */
+static int request_q_len = 20;
+module_param(request_q_len, int, 0);
+MODULE_PARM_DESC(request_q_len, "Number of outstanding requests");
+/*
+ * how many requests we want to have processed
+ */
+static int request_num = 1024;
+module_param(request_num, int, 0);
+MODULE_PARM_DESC(request_num, "run for at least this many requests");
+/*
+ * the size of each request
+ */
+static int request_size = 1500;
+module_param(request_size, int, 0);
+MODULE_PARM_DESC(request_size, "size of each request");
+
+/*
+ * a structure for each request
+ */
+typedef struct  {
+	struct work_struct work;
+#ifdef BENCH_IXP_ACCESS_LIB
+	IX_MBUF mbuf;
+#endif
+	unsigned char *buffer;
+} request_t;
+
+static request_t *requests;
+
+static int outstanding;
+static int total;
+
+/*************************************************************************/
+/*
+ * OCF benchmark routines
+ */
+
+static uint64_t ocf_cryptoid;
+static int ocf_init(void);
+static int ocf_cb(struct cryptop *crp);
+static void ocf_request(void *arg);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
+static void ocf_request_wq(struct work_struct *work);
+#endif
+
+static int
+ocf_init(void)
+{
+	int error;
+	struct cryptoini crie, cria;
+	struct cryptodesc crda, crde;
+
+	memset(&crie, 0, sizeof(crie));
+	memset(&cria, 0, sizeof(cria));
+	memset(&crde, 0, sizeof(crde));
+	memset(&crda, 0, sizeof(crda));
+
+	cria.cri_alg  = CRYPTO_SHA1_HMAC;
+	cria.cri_klen = 20 * 8;
+	cria.cri_key  = "0123456789abcdefghij";
+
+	crie.cri_alg  = CRYPTO_3DES_CBC;
+	crie.cri_klen = 24 * 8;
+	crie.cri_key  = "0123456789abcdefghijklmn";
+
+	crie.cri_next = &cria;
+
+	error = crypto_newsession(&ocf_cryptoid, &crie, 0);
+	if (error) {
+		printk("crypto_newsession failed %d\n", error);
+		return -1;
+	}
+	return 0;
+}
+
+static int
+ocf_cb(struct cryptop *crp)
+{
+	request_t *r = (request_t *) crp->crp_opaque;
+
+	if (crp->crp_etype)
+		printk("Error in OCF processing: %d\n", crp->crp_etype);
+	total++;
+	crypto_freereq(crp);
+	crp = NULL;
+
+	if (total > request_num) {
+		outstanding--;
+		return 0;
+	}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
+	INIT_WORK(&r->work, ocf_request_wq);
+#else
+	INIT_WORK(&r->work, ocf_request, r);
+#endif
+	schedule_work(&r->work);
+	return 0;
+}
+
+
+static void
+ocf_request(void *arg)
+{
+	request_t *r = arg;
+	struct cryptop *crp = crypto_getreq(2);
+	struct cryptodesc *crde, *crda;
+
+	if (!crp) {
+		outstanding--;
+		return;
+	}
+
+	crde = crp->crp_desc;
+	crda = crde->crd_next;
+
+	crda->crd_skip = 0;
+	crda->crd_flags = 0;
+	crda->crd_len = request_size;
+	crda->crd_inject = request_size;
+	crda->crd_alg = CRYPTO_SHA1_HMAC;
+	crda->crd_key = "0123456789abcdefghij";
+	crda->crd_klen = 20 * 8;
+
+	crde->crd_skip = 0;
+	crde->crd_flags = CRD_F_IV_EXPLICIT | CRD_F_ENCRYPT;
+	crde->crd_len = request_size;
+	crde->crd_inject = request_size;
+	crde->crd_alg = CRYPTO_3DES_CBC;
+	crde->crd_key = "0123456789abcdefghijklmn";
+	crde->crd_klen = 24 * 8;
+
+	crp->crp_ilen = request_size + 64;
+	crp->crp_flags = CRYPTO_F_CBIMM;
+	crp->crp_buf = (caddr_t) r->buffer;
+	crp->crp_callback = ocf_cb;
+	crp->crp_sid = ocf_cryptoid;
+	crp->crp_opaque = (caddr_t) r;
+	crypto_dispatch(crp);
+}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
+static void
+ocf_request_wq(struct work_struct *work)
+{
+	request_t *r = container_of(work, request_t, work);
+	ocf_request(r);
+}
+#endif
+
+/*************************************************************************/
+#ifdef BENCH_IXP_ACCESS_LIB
+/*************************************************************************/
+/*
+ * CryptoAcc benchmark routines
+ */
+
+static IxCryptoAccCtx ixp_ctx;
+static UINT32 ixp_ctx_id;
+static IX_MBUF ixp_pri;
+static IX_MBUF ixp_sec;
+static int ixp_registered = 0;
+
+static void ixp_register_cb(UINT32 ctx_id, IX_MBUF *bufp,
+					IxCryptoAccStatus status);
+static void ixp_perform_cb(UINT32 ctx_id, IX_MBUF *sbufp, IX_MBUF *dbufp,
+					IxCryptoAccStatus status);
+static void ixp_request(void *arg);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
+static void ixp_request_wq(struct work_struct *work);
+#endif
+
+static int
+ixp_init(void)
+{
+	IxCryptoAccStatus status;
+
+	ixp_ctx.cipherCtx.cipherAlgo = IX_CRYPTO_ACC_CIPHER_3DES;
+	ixp_ctx.cipherCtx.cipherMode = IX_CRYPTO_ACC_MODE_CBC;
+	ixp_ctx.cipherCtx.cipherKeyLen = 24;
+	ixp_ctx.cipherCtx.cipherBlockLen = IX_CRYPTO_ACC_DES_BLOCK_64;
+	ixp_ctx.cipherCtx.cipherInitialVectorLen = IX_CRYPTO_ACC_DES_IV_64;
+	memcpy(ixp_ctx.cipherCtx.key.cipherKey, "0123456789abcdefghijklmn", 24);
+
+	ixp_ctx.authCtx.authAlgo = IX_CRYPTO_ACC_AUTH_SHA1;
+	ixp_ctx.authCtx.authDigestLen = 12;
+	ixp_ctx.authCtx.aadLen = 0;
+	ixp_ctx.authCtx.authKeyLen = 20;
+	memcpy(ixp_ctx.authCtx.key.authKey, "0123456789abcdefghij", 20);
+
+	ixp_ctx.useDifferentSrcAndDestMbufs = 0;
+	ixp_ctx.operation = IX_CRYPTO_ACC_OP_ENCRYPT_AUTH ;
+
+	IX_MBUF_MLEN(&ixp_pri)  = IX_MBUF_PKT_LEN(&ixp_pri) = 128;
+	IX_MBUF_MDATA(&ixp_pri) = (unsigned char *) kmalloc(128, SLAB_ATOMIC);
+	IX_MBUF_MLEN(&ixp_sec)  = IX_MBUF_PKT_LEN(&ixp_sec) = 128;
+	IX_MBUF_MDATA(&ixp_sec) = (unsigned char *) kmalloc(128, SLAB_ATOMIC);
+
+	status = ixCryptoAccCtxRegister(&ixp_ctx, &ixp_pri, &ixp_sec,
+			ixp_register_cb, ixp_perform_cb, &ixp_ctx_id);
+
+	if (IX_CRYPTO_ACC_STATUS_SUCCESS == status) {
+		while (!ixp_registered)
+			schedule();
+		return ixp_registered < 0 ? -1 : 0;
+	}
+
+	printk("ixp: ixCryptoAccCtxRegister failed %d\n", status);
+	return -1;
+}
+
+static void
+ixp_register_cb(UINT32 ctx_id, IX_MBUF *bufp, IxCryptoAccStatus status)
+{
+	if (bufp) {
+		IX_MBUF_MLEN(bufp) = IX_MBUF_PKT_LEN(bufp) = 0;
+		kfree(IX_MBUF_MDATA(bufp));
+		IX_MBUF_MDATA(bufp) = NULL;
+	}
+
+	if (IX_CRYPTO_ACC_STATUS_WAIT == status)
+		return;
+	if (IX_CRYPTO_ACC_STATUS_SUCCESS == status)
+		ixp_registered = 1;
+	else
+		ixp_registered = -1;
+}
+
+static void
+ixp_perform_cb(
+	UINT32 ctx_id,
+	IX_MBUF *sbufp,
+	IX_MBUF *dbufp,
+	IxCryptoAccStatus status)
+{
+	request_t *r = NULL;
+
+	total++;
+	if (total > request_num) {
+		outstanding--;
+		return;
+	}
+
+	if (!sbufp || !(r = IX_MBUF_PRIV(sbufp))) {
+		printk("crappo %p %p\n", sbufp, r);
+		outstanding--;
+		return;
+	}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
+	INIT_WORK(&r->work, ixp_request_wq);
+#else
+	INIT_WORK(&r->work, ixp_request, r);
+#endif
+	schedule_work(&r->work);
+}
+
+static void
+ixp_request(void *arg)
+{
+	request_t *r = arg;
+	IxCryptoAccStatus status;
+
+	memset(&r->mbuf, 0, sizeof(r->mbuf));
+	IX_MBUF_MLEN(&r->mbuf) = IX_MBUF_PKT_LEN(&r->mbuf) = request_size + 64;
+	IX_MBUF_MDATA(&r->mbuf) = r->buffer;
+	IX_MBUF_PRIV(&r->mbuf) = r;
+	status = ixCryptoAccAuthCryptPerform(ixp_ctx_id, &r->mbuf, NULL,
+			0, request_size, 0, request_size, request_size, r->buffer);
+	if (IX_CRYPTO_ACC_STATUS_SUCCESS != status) {
+		printk("status1 = %d\n", status);
+		outstanding--;
+		return;
+	}
+	return;
+}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
+static void
+ixp_request_wq(struct work_struct *work)
+{
+	request_t *r = container_of(work, request_t, work);
+	ixp_request(r);
+}
+#endif
+
+/*************************************************************************/
+#endif /* BENCH_IXP_ACCESS_LIB */
+/*************************************************************************/
+
+int
+ocfbench_init(void)
+{
+	int i, jstart, jstop;
+
+	printk("Crypto Speed tests\n");
+
+	requests = kmalloc(sizeof(request_t) * request_q_len, GFP_KERNEL);
+	if (!requests) {
+		printk("malloc failed\n");
+		return -EINVAL;
+	}
+
+	for (i = 0; i < request_q_len; i++) {
+		/* +64 for return data */
+		requests[i].buffer = kmalloc(request_size + 128, GFP_DMA);
+		if (!requests[i].buffer) {
+			printk("malloc failed\n");
+			return -EINVAL;
+		}
+		memset(requests[i].buffer, '0' + i, request_size + 128);
+	}
+
+	/*
+	 * OCF benchmark
+	 */
+	printk("OCF: testing ...\n");
+	ocf_init();
+	total = outstanding = 0;
+	jstart = jiffies;
+	for (i = 0; i < request_q_len; i++) {
+		outstanding++;
+		ocf_request(&requests[i]);
+	}
+	while (outstanding > 0)
+		schedule();
+	jstop = jiffies;
+
+	printk("OCF: %d requests of %d bytes in %d jiffies\n", total, request_size,
+			jstop - jstart);
+
+#ifdef BENCH_IXP_ACCESS_LIB
+	/*
+	 * IXP benchmark
+	 */
+	printk("IXP: testing ...\n");
+	ixp_init();
+	total = outstanding = 0;
+	jstart = jiffies;
+	for (i = 0; i < request_q_len; i++) {
+		outstanding++;
+		ixp_request(&requests[i]);
+	}
+	while (outstanding > 0)
+		schedule();
+	jstop = jiffies;
+
+	printk("IXP: %d requests of %d bytes in %d jiffies\n", total, request_size,
+			jstop - jstart);
+#endif /* BENCH_IXP_ACCESS_LIB */
+
+	for (i = 0; i < request_q_len; i++)
+		kfree(requests[i].buffer);
+	kfree(requests);
+	return -EINVAL; /* always fail to load so it can be re-run quickly ;-) */
+}
+
+static void __exit ocfbench_exit(void)
+{
+}
+
+module_init(ocfbench_init);
+module_exit(ocfbench_exit);
+
+MODULE_LICENSE("BSD");
+MODULE_AUTHOR("David McCullough <david_mccullough@securecomputing.com>");
+MODULE_DESCRIPTION("Benchmark various in-kernel crypto speeds");
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/ep80579/icp_ocf.h
+++ linux-mvl-dove-2.6.32/crypto/ocf/ep80579/icp_ocf.h
@@ -0,0 +1,363 @@
+/***************************************************************************
+ *
+ * This file is provided under a dual BSD/GPLv2 license.  When using or 
+ *   redistributing this file, you may do so under either license.
+ * 
+ *   GPL LICENSE SUMMARY
+ * 
+ *   Copyright(c) 2007,2008 Intel Corporation. All rights reserved.
+ * 
+ *   This program is free software; you can redistribute it and/or modify 
+ *   it under the terms of version 2 of the GNU General Public License as
+ *   published by the Free Software Foundation.
+ * 
+ *   This program is distributed in the hope that it will be useful, but 
+ *   WITHOUT ANY WARRANTY; without even the implied warranty of 
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU 
+ *   General Public License for more details.
+ * 
+ *   You should have received a copy of the GNU General Public License 
+ *   along with this program; if not, write to the Free Software 
+ *   Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ *   The full GNU General Public License is included in this distribution 
+ *   in the file called LICENSE.GPL.
+ * 
+ *   Contact Information:
+ *   Intel Corporation
+ * 
+ *   BSD LICENSE 
+ * 
+ *   Copyright(c) 2007,2008 Intel Corporation. All rights reserved.
+ *   All rights reserved.
+ * 
+ *   Redistribution and use in source and binary forms, with or without 
+ *   modification, are permitted provided that the following conditions 
+ *   are met:
+ * 
+ *     * Redistributions of source code must retain the above copyright 
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright 
+ *       notice, this list of conditions and the following disclaimer in 
+ *       the documentation and/or other materials provided with the 
+ *       distribution.
+ *     * Neither the name of Intel Corporation nor the names of its 
+ *       contributors may be used to endorse or promote products derived 
+ *       from this software without specific prior written permission.
+ * 
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ *  version: Security.L.1.0.130
+ *
+ ***************************************************************************/
+
+/*
+ * OCF drv driver header file for the Intel ICP processor.
+ */
+
+#ifndef ICP_OCF_H
+#define ICP_OCF_H
+
+#include <linux/crypto.h>
+#include <linux/delay.h>
+#include <linux/skbuff.h>
+
+#include "cryptodev.h"
+#include "uio.h"
+
+#include "cpa.h"
+#include "cpa_cy_im.h"
+#include "cpa_cy_sym.h"
+#include "cpa_cy_rand.h"
+#include "cpa_cy_dh.h"
+#include "cpa_cy_rsa.h"
+#include "cpa_cy_ln.h"
+#include "cpa_cy_common.h"
+#include "cpa_cy_dsa.h"
+
+#define NUM_BITS_IN_BYTE (8)
+#define NUM_BITS_IN_BYTE_MINUS_ONE (NUM_BITS_IN_BYTE -1)
+#define INVALID_DRIVER_ID (-1)
+#define RETURN_RAND_NUM_GEN_FAILED (-1)
+
+/*This is define means only one operation can be chained to another
+(resulting in one chain of two operations)*/
+#define MAX_NUM_OF_CHAINED_OPS (1)
+/*This is the max block cipher initialisation vector*/
+#define MAX_IV_LEN_IN_BYTES (20)
+/*This is used to check whether the OCF to this driver session limit has
+  been disabled*/
+#define NO_OCF_TO_DRV_MAX_SESSIONS		(0)
+
+/*OCF values mapped here*/
+#define ICP_SHA1_DIGEST_SIZE_IN_BYTES 		(SHA1_HASH_LEN)
+#define ICP_SHA256_DIGEST_SIZE_IN_BYTES 	(SHA2_256_HASH_LEN)
+#define ICP_SHA384_DIGEST_SIZE_IN_BYTES 	(SHA2_384_HASH_LEN)
+#define ICP_SHA512_DIGEST_SIZE_IN_BYTES 	(SHA2_512_HASH_LEN)
+#define ICP_MD5_DIGEST_SIZE_IN_BYTES 		(MD5_HASH_LEN)
+#define ARC4_COUNTER_LEN 			(ARC4_BLOCK_LEN)
+
+#define OCF_REGISTRATION_STATUS_SUCCESS 	(0)
+#define OCF_ZERO_FUNCTIONALITY_REGISTERED 	(0)
+#define ICP_OCF_DRV_NO_CRYPTO_PROCESS_ERROR 	(0)
+#define ICP_OCF_DRV_STATUS_SUCCESS 		(0)
+#define ICP_OCF_DRV_STATUS_FAIL 		(1)
+
+/*Turn on/off debug options*/
+#define ICP_OCF_PRINT_DEBUG_MESSAGES		(0)
+#define ICP_OCF_PRINT_KERN_ALERT		(1)
+#define ICP_OCF_PRINT_KERN_ERRS			(1)
+
+/*DSA Prime Q size in bytes (as defined in the standard) */
+#define DSA_RS_SIGN_PRIMEQ_SIZE_IN_BYTES	(20)
+
+/*MACRO DEFINITIONS*/
+
+#define BITS_TO_BYTES(bytes, bits) 					\
+	bytes = (bits + NUM_BITS_IN_BYTE_MINUS_ONE) / NUM_BITS_IN_BYTE
+
+#define ICP_CACHE_CREATE(cache_ID, cache_name) 				\
+	kmem_cache_create(cache_ID, sizeof(cache_name),0, 		\
+		SLAB_HWCACHE_ALIGN, NULL, NULL);
+
+#define ICP_CACHE_NULL_CHECK(slab_zone)					\
+{									\
+	if(NULL == slab_zone){ 						\
+		icp_ocfDrvFreeCaches(); 				\
+		EPRINTK("%s() line %d: Not enough memory!\n", 		\
+			__FUNCTION__, __LINE__); 			\
+		return ENOMEM; 						\
+	}								\
+}
+
+#define ICP_CACHE_DESTROY(slab_zone) 	                                \
+{                                                                       \
+        if(NULL != slab_zone){						\
+                kmem_cache_destroy(slab_zone);				\
+                slab_zone = NULL;					\
+        }								\
+}
+
+#define ICP_REGISTER_SYM_FUNCTIONALITY_WITH_OCF(alg)			\
+{									\
+	if(OCF_REGISTRATION_STATUS_SUCCESS ==				\
+		crypto_register(icp_ocfDrvDriverId,			\
+				    alg,				\
+				    0,					\
+				    0)) {				\
+		ocfStatus++;						\
+	}								\
+}
+
+#define ICP_REGISTER_ASYM_FUNCTIONALITY_WITH_OCF(alg)			\
+{									\
+	if(OCF_REGISTRATION_STATUS_SUCCESS ==				\
+		crypto_kregister(icp_ocfDrvDriverId,			\
+				      alg,				\
+				      0)){				\
+		ocfStatus++;						\
+	}								\
+}
+
+#if ICP_OCF_PRINT_DEBUG_MESSAGES == 1
+#define DPRINTK(args...)      \
+{			      \
+                printk(args); \
+}
+
+#else				//ICP_OCF_PRINT_DEBUG_MESSAGES == 1
+
+#define DPRINTK(args...)
+
+#endif				//ICP_OCF_PRINT_DEBUG_MESSAGES == 1
+
+#if ICP_OCF_PRINT_KERN_ALERT == 1
+#define APRINTK(args...)      						\
+{			      						\
+       printk(KERN_ALERT args);						\
+}
+
+#else				//ICP_OCF_PRINT_KERN_ALERT == 1
+
+#define APRINTK(args...)
+
+#endif				//ICP_OCF_PRINT_KERN_ALERT == 1
+
+#if ICP_OCF_PRINT_KERN_ERRS == 1
+#define EPRINTK(args...)      \
+{			      \
+       printk(KERN_ERR args); \
+}
+
+#else				//ICP_OCF_PRINT_KERN_ERRS == 1
+
+#define EPRINTK(args...)
+
+#endif				//ICP_OCF_PRINT_KERN_ERRS == 1
+
+#define IPRINTK(args...)      \
+{			      \
+      printk(KERN_INFO args); \
+}
+
+/*END OF MACRO DEFINITIONS*/
+
+typedef enum {
+	ICP_OCF_DRV_ALG_CIPHER = 0,
+	ICP_OCF_DRV_ALG_HASH
+} icp_ocf_drv_alg_type_t;
+
+/* These are all defined in icp_common.c */
+extern atomic_t lac_session_failed_dereg_count;
+extern atomic_t icp_ocfDrvIsExiting;
+extern atomic_t num_ocf_to_drv_registered_sessions;
+
+/*These are use inputs used in icp_sym.c and icp_common.c
+  They are instantiated in icp_common.c*/
+extern int max_sessions;
+
+extern int32_t icp_ocfDrvDriverId;
+extern struct list_head icp_ocfDrvGlobalSymListHead;
+extern struct list_head icp_ocfDrvGlobalSymListHead_FreeMemList;
+extern struct workqueue_struct *icp_ocfDrvFreeLacSessionWorkQ;
+extern spinlock_t icp_ocfDrvSymSessInfoListSpinlock;
+extern rwlock_t icp_kmem_cache_destroy_alloc_lock;
+
+/*Slab zones for symettric functionality, instantiated in icp_common.c*/
+extern struct kmem_cache *drvSessionData_zone;
+extern struct kmem_cache *drvOpData_zone;
+
+/*Slabs zones for asymettric functionality, instantiated in icp_common.c*/
+extern struct kmem_cache *drvDH_zone;
+extern struct kmem_cache *drvLnModExp_zone;
+extern struct kmem_cache *drvRSADecrypt_zone;
+extern struct kmem_cache *drvRSAPrivateKey_zone;
+extern struct kmem_cache *drvDSARSSign_zone;
+extern struct kmem_cache *drvDSARSSignKValue_zone;
+extern struct kmem_cache *drvDSAVerify_zone;
+
+/*Slab zones for flatbuffers and bufferlist*/
+extern struct kmem_cache *drvFlatBuffer_zone;
+
+#define ICP_OCF_DRV_DEFAULT_BUFFLIST_ARRAYS     (16)
+
+struct icp_drvBuffListInfo {
+	Cpa16U numBuffers;
+	Cpa32U metaSize;
+	Cpa32U metaOffset;
+	Cpa32U buffListSize;
+};
+extern struct icp_drvBuffListInfo defBuffListInfo;
+
+/*
+* This struct is used to keep a reference to the relevant node in the list
+* of sessionData structs, to the buffer type required by OCF and to the OCF
+* provided crp struct that needs to be returned. All this info is needed in
+* the callback function.
+*
+* IV can sometimes be stored in non-contiguous memory (e.g. skbuff
+* linked/frag list, therefore a contiguous memory space for the IV data must be
+* created and passed to LAC
+*
+*/
+struct icp_drvOpData {
+	CpaCySymOpData lacOpData;
+	uint32_t digestSizeInBytes;
+	struct cryptop *crp;
+	uint8_t bufferType;
+	uint8_t ivData[MAX_IV_LEN_IN_BYTES];
+	uint16_t numBufferListArray;
+	CpaBufferList srcBuffer;
+	CpaFlatBuffer bufferListArray[ICP_OCF_DRV_DEFAULT_BUFFLIST_ARRAYS];
+	CpaBoolean verifyResult;
+};
+/*Values used to derisk chances of performs being called against
+deregistered sessions (for which the slab page has been reclaimed)
+This is not a fix - since page frames are reclaimed from a slab, one cannot
+rely on that memory not being re-used by another app.*/
+typedef enum {
+	ICP_SESSION_INITIALISED = 0x5C5C5C,
+	ICP_SESSION_RUNNING = 0x005C00,
+	ICP_SESSION_DEREGISTERED = 0xC5C5C5
+} usage_derisk;
+
+/*
+This is the OCF<->OCF_DRV session object:
+
+1.The first member is a listNode. These session objects are added to a linked
+  list in order to make it easier to remove them all at session exit time.
+2.The second member is used to give the session object state and derisk the
+  possibility of OCF batch calls executing against a deregistered session (as
+  described above).
+3.The third member is a LAC<->OCF_DRV session handle (initialised with the first
+  perform request for that session).
+4.The fourth is the LAC session context. All the parameters for this structure
+  are only known when the first perform request for this session occurs. That is
+  why the OCF Tolapai Driver only registers a new LAC session at perform time
+*/
+struct icp_drvSessionData {
+	struct list_head listNode;
+	usage_derisk inUse;
+	CpaCySymSessionCtx sessHandle;
+	CpaCySymSessionSetupData lacSessCtx;
+};
+
+/* This struct is required for deferred session
+ deregistration as a work queue function can
+ only have one argument*/
+struct icp_ocfDrvFreeLacSession {
+	CpaCySymSessionCtx sessionToDeregister;
+	struct work_struct work;
+};
+
+int icp_ocfDrvNewSession(device_t dev, uint32_t * sild, struct cryptoini *cri);
+
+int icp_ocfDrvFreeLACSession(device_t dev, uint64_t sid);
+
+int icp_ocfDrvSymProcess(device_t dev, struct cryptop *crp, int hint);
+
+int icp_ocfDrvPkeProcess(device_t dev, struct cryptkop *krp, int hint);
+
+int icp_ocfDrvReadRandom(void *arg, uint32_t * buf, int maxwords);
+
+int icp_ocfDrvDeregRetry(CpaCySymSessionCtx sessionToDeregister);
+
+int icp_ocfDrvSkBuffToBufferList(struct sk_buff *skb,
+				 CpaBufferList * bufferList);
+
+int icp_ocfDrvBufferListToSkBuff(CpaBufferList * bufferList,
+				 struct sk_buff **skb);
+
+void icp_ocfDrvPtrAndLenToFlatBuffer(void *pData, uint32_t len,
+				     CpaFlatBuffer * pFlatBuffer);
+
+void icp_ocfDrvPtrAndLenToBufferList(void *pDataIn, uint32_t length,
+				     CpaBufferList * pBufferList);
+
+void icp_ocfDrvBufferListToPtrAndLen(CpaBufferList * pBufferList,
+				     void **ppDataOut, uint32_t * pLength);
+
+int icp_ocfDrvBufferListMemInfo(uint16_t numBuffers,
+				struct icp_drvBuffListInfo *buffListInfo);
+
+uint16_t icp_ocfDrvGetSkBuffFrags(struct sk_buff *pSkb);
+
+void icp_ocfDrvFreeFlatBuffer(CpaFlatBuffer * pFlatBuffer);
+
+int icp_ocfDrvAllocMetaData(CpaBufferList * pBufferList, 
+                const struct icp_drvOpData *pOpData);
+
+void icp_ocfDrvFreeMetaData(CpaBufferList * pBufferList);
+
+#endif
+/* ICP_OCF_H */
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/ep80579/icp_asym.c
+++ linux-mvl-dove-2.6.32/crypto/ocf/ep80579/icp_asym.c
@@ -0,0 +1,1375 @@
+/***************************************************************************
+ *
+ * This file is provided under a dual BSD/GPLv2 license.  When using or 
+ *   redistributing this file, you may do so under either license.
+ * 
+ *   GPL LICENSE SUMMARY
+ * 
+ *   Copyright(c) 2007,2008 Intel Corporation. All rights reserved.
+ * 
+ *   This program is free software; you can redistribute it and/or modify 
+ *   it under the terms of version 2 of the GNU General Public License as
+ *   published by the Free Software Foundation.
+ * 
+ *   This program is distributed in the hope that it will be useful, but 
+ *   WITHOUT ANY WARRANTY; without even the implied warranty of 
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU 
+ *   General Public License for more details.
+ * 
+ *   You should have received a copy of the GNU General Public License 
+ *   along with this program; if not, write to the Free Software 
+ *   Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ *   The full GNU General Public License is included in this distribution 
+ *   in the file called LICENSE.GPL.
+ * 
+ *   Contact Information:
+ *   Intel Corporation
+ * 
+ *   BSD LICENSE 
+ * 
+ *   Copyright(c) 2007,2008 Intel Corporation. All rights reserved.
+ *   All rights reserved.
+ * 
+ *   Redistribution and use in source and binary forms, with or without 
+ *   modification, are permitted provided that the following conditions 
+ *   are met:
+ * 
+ *     * Redistributions of source code must retain the above copyright 
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright 
+ *       notice, this list of conditions and the following disclaimer in 
+ *       the documentation and/or other materials provided with the 
+ *       distribution.
+ *     * Neither the name of Intel Corporation nor the names of its 
+ *       contributors may be used to endorse or promote products derived 
+ *       from this software without specific prior written permission.
+ * 
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ *  version: Security.L.1.0.130
+ *
+ ***************************************************************************/
+
+#include "icp_ocf.h"
+
+/*The following define values (containing the word 'INDEX') are used to find
+the index of each input buffer of the crypto_kop struct (see OCF cryptodev.h).
+These values were found through analysis of the OCF OpenSSL patch. If the
+calling program uses different input buffer positions, these defines will have
+to be changed.*/
+
+/*DIFFIE HELLMAN buffer index values*/
+#define ICP_DH_KRP_PARAM_PRIME_INDEX				(0)
+#define ICP_DH_KRP_PARAM_BASE_INDEX				(1)
+#define ICP_DH_KRP_PARAM_PRIVATE_VALUE_INDEX			(2)
+#define ICP_DH_KRP_PARAM_RESULT_INDEX				(3)
+
+/*MOD EXP buffer index values*/
+#define ICP_MOD_EXP_KRP_PARAM_BASE_INDEX			(0)
+#define ICP_MOD_EXP_KRP_PARAM_EXPONENT_INDEX			(1)
+#define ICP_MOD_EXP_KRP_PARAM_MODULUS_INDEX			(2)
+#define ICP_MOD_EXP_KRP_PARAM_RESULT_INDEX			(3)
+
+#define SINGLE_BYTE_VALUE					(4)
+
+/*MOD EXP CRT buffer index values*/
+#define ICP_MOD_EXP_CRT_KRP_PARAM_PRIME_P_INDEX			(0)
+#define ICP_MOD_EXP_CRT_KRP_PARAM_PRIME_Q_INDEX			(1)
+#define ICP_MOD_EXP_CRT_KRP_PARAM_I_INDEX			(2)
+#define ICP_MOD_EXP_CRT_KRP_PARAM_EXPONENT_DP_INDEX		(3)
+#define ICP_MOD_EXP_CRT_KRP_PARAM_EXPONENT_DQ_INDEX		(4)
+#define ICP_MOD_EXP_CRT_KRP_PARAM_COEFF_QINV_INDEX		(5)
+#define ICP_MOD_EXP_CRT_KRP_PARAM_RESULT_INDEX			(6)
+
+/*DSA sign buffer index values*/
+#define ICP_DSA_SIGN_KRP_PARAM_DGST_INDEX			(0)
+#define ICP_DSA_SIGN_KRP_PARAM_PRIME_P_INDEX			(1)
+#define ICP_DSA_SIGN_KRP_PARAM_PRIME_Q_INDEX			(2)
+#define ICP_DSA_SIGN_KRP_PARAM_G_INDEX				(3)
+#define ICP_DSA_SIGN_KRP_PARAM_X_INDEX				(4)
+#define ICP_DSA_SIGN_KRP_PARAM_R_RESULT_INDEX			(5)
+#define ICP_DSA_SIGN_KRP_PARAM_S_RESULT_INDEX			(6)
+
+/*DSA verify buffer index values*/
+#define ICP_DSA_VERIFY_KRP_PARAM_DGST_INDEX			(0)
+#define ICP_DSA_VERIFY_KRP_PARAM_PRIME_P_INDEX			(1)
+#define ICP_DSA_VERIFY_KRP_PARAM_PRIME_Q_INDEX			(2)
+#define ICP_DSA_VERIFY_KRP_PARAM_G_INDEX			(3)
+#define ICP_DSA_VERIFY_KRP_PARAM_PUBKEY_INDEX			(4)
+#define ICP_DSA_VERIFY_KRP_PARAM_SIG_R_INDEX			(5)
+#define ICP_DSA_VERIFY_KRP_PARAM_SIG_S_INDEX			(6)
+
+/*DSA sign prime Q vs random number K size check values*/
+#define DONT_RUN_LESS_THAN_CHECK				(0)
+#define FAIL_A_IS_GREATER_THAN_B				(1)
+#define FAIL_A_IS_EQUAL_TO_B					(1)
+#define SUCCESS_A_IS_LESS_THAN_B				(0)
+#define DSA_SIGN_RAND_GEN_VAL_CHECK_MAX_ITERATIONS		(500)
+
+/* We need to set a cryptokp success value just in case it is set or allocated
+   and not set to zero outside of this module */
+#define CRYPTO_OP_SUCCESS					(0)
+
+static int icp_ocfDrvDHComputeKey(struct cryptkop *krp);
+
+static int icp_ocfDrvModExp(struct cryptkop *krp);
+
+static int icp_ocfDrvModExpCRT(struct cryptkop *krp);
+
+static int
+icp_ocfDrvCheckALessThanB(CpaFlatBuffer * pK, CpaFlatBuffer * pQ, int *doCheck);
+
+static int icp_ocfDrvDsaSign(struct cryptkop *krp);
+
+static int icp_ocfDrvDsaVerify(struct cryptkop *krp);
+
+static void
+icp_ocfDrvDhP1CallBack(void *callbackTag,
+		       CpaStatus status,
+		       void *pOpData, CpaFlatBuffer * pLocalOctetStringPV);
+
+static void
+icp_ocfDrvModExpCallBack(void *callbackTag,
+			 CpaStatus status,
+			 void *pOpData, CpaFlatBuffer * pResult);
+
+static void
+icp_ocfDrvModExpCRTCallBack(void *callbackTag,
+			    CpaStatus status,
+			    void *pOpData, CpaFlatBuffer * pOutputData);
+
+static void
+icp_ocfDrvDsaVerifyCallBack(void *callbackTag,
+			    CpaStatus status,
+			    void *pOpData, CpaBoolean verifyStatus);
+
+static void
+icp_ocfDrvDsaRSSignCallBack(void *callbackTag,
+			    CpaStatus status,
+			    void *pOpData,
+			    CpaBoolean protocolStatus,
+			    CpaFlatBuffer * pR, CpaFlatBuffer * pS);
+
+/* Name        : icp_ocfDrvPkeProcess
+ *
+ * Description : This function will choose which PKE process to follow
+ * based on the input arguments
+ */
+int icp_ocfDrvPkeProcess(device_t dev, struct cryptkop *krp, int hint)
+{
+	CpaStatus lacStatus = CPA_STATUS_SUCCESS;
+
+	if (NULL == krp) {
+		DPRINTK("%s(): Invalid input parameters, cryptkop = %p\n",
+			__FUNCTION__, krp);
+		return EINVAL;
+	}
+
+	if (CPA_TRUE == atomic_read(&icp_ocfDrvIsExiting)) {
+		krp->krp_status = ECANCELED;
+		return ECANCELED;
+	}
+
+	switch (krp->krp_op) {
+	case CRK_DH_COMPUTE_KEY:
+		DPRINTK("%s() doing DH_COMPUTE_KEY\n", __FUNCTION__);
+		lacStatus = icp_ocfDrvDHComputeKey(krp);
+		if (CPA_STATUS_SUCCESS != lacStatus) {
+			EPRINTK("%s(): icp_ocfDrvDHComputeKey failed "
+				"(%d).\n", __FUNCTION__, lacStatus);
+			krp->krp_status = ECANCELED;
+			return ECANCELED;
+		}
+
+		break;
+
+	case CRK_MOD_EXP:
+		DPRINTK("%s() doing MOD_EXP \n", __FUNCTION__);
+		lacStatus = icp_ocfDrvModExp(krp);
+		if (CPA_STATUS_SUCCESS != lacStatus) {
+			EPRINTK("%s(): icp_ocfDrvModExp failed (%d).\n",
+				__FUNCTION__, lacStatus);
+			krp->krp_status = ECANCELED;
+			return ECANCELED;
+		}
+
+		break;
+
+	case CRK_MOD_EXP_CRT:
+		DPRINTK("%s() doing MOD_EXP_CRT \n", __FUNCTION__);
+		lacStatus = icp_ocfDrvModExpCRT(krp);
+		if (CPA_STATUS_SUCCESS != lacStatus) {
+			EPRINTK("%s(): icp_ocfDrvModExpCRT "
+				"failed (%d).\n", __FUNCTION__, lacStatus);
+			krp->krp_status = ECANCELED;
+			return ECANCELED;
+		}
+
+		break;
+
+	case CRK_DSA_SIGN:
+		DPRINTK("%s() doing DSA_SIGN \n", __FUNCTION__);
+		lacStatus = icp_ocfDrvDsaSign(krp);
+		if (CPA_STATUS_SUCCESS != lacStatus) {
+			EPRINTK("%s(): icp_ocfDrvDsaSign "
+				"failed (%d).\n", __FUNCTION__, lacStatus);
+			krp->krp_status = ECANCELED;
+			return ECANCELED;
+		}
+
+		break;
+
+	case CRK_DSA_VERIFY:
+		DPRINTK("%s() doing DSA_VERIFY \n", __FUNCTION__);
+		lacStatus = icp_ocfDrvDsaVerify(krp);
+		if (CPA_STATUS_SUCCESS != lacStatus) {
+			EPRINTK("%s(): icp_ocfDrvDsaVerify "
+				"failed (%d).\n", __FUNCTION__, lacStatus);
+			krp->krp_status = ECANCELED;
+			return ECANCELED;
+		}
+
+		break;
+
+	default:
+		EPRINTK("%s(): Asymettric function not "
+			"supported (%d).\n", __FUNCTION__, krp->krp_op);
+		krp->krp_status = EOPNOTSUPP;
+		return EOPNOTSUPP;
+	}
+
+	return ICP_OCF_DRV_STATUS_SUCCESS;
+}
+
+/* Name        : icp_ocfDrvSwapBytes
+ *
+ * Description : This function is used to swap the byte order of a buffer.
+ * It has been seen that in general we are passed little endian byte order
+ * buffers, but LAC only accepts big endian byte order buffers.
+ */
+static void inline
+icp_ocfDrvSwapBytes(u_int8_t * num, u_int32_t buff_len_bytes)
+{
+
+	int i;
+	u_int8_t *end_ptr;
+	u_int8_t hold_val;
+
+	end_ptr = num + (buff_len_bytes - 1);
+	buff_len_bytes = buff_len_bytes >> 1;
+	for (i = 0; i < buff_len_bytes; i++) {
+		hold_val = *num;
+		*num = *end_ptr;
+		num++;
+		*end_ptr = hold_val;
+		end_ptr--;
+	}
+}
+
+/* Name        : icp_ocfDrvDHComputeKey
+ *
+ * Description : This function will map Diffie Hellman calls from OCF
+ * to the LAC API. OCF uses this function for Diffie Hellman Phase1 and
+ * Phase2. LAC has a separate Diffie Hellman Phase2 call, however both phases
+ * break down to a modular exponentiation.
+ */
+static int icp_ocfDrvDHComputeKey(struct cryptkop *krp)
+{
+	CpaStatus lacStatus = CPA_STATUS_SUCCESS;
+	void *callbackTag = NULL;
+	CpaCyDhPhase1KeyGenOpData *pPhase1OpData = NULL;
+	CpaFlatBuffer *pLocalOctetStringPV = NULL;
+	uint32_t dh_prime_len_bytes = 0, dh_prime_len_bits = 0;
+
+	/* Input checks - check prime is a multiple of 8 bits to allow for
+	   allocation later */
+	dh_prime_len_bits =
+	    (krp->krp_param[ICP_DH_KRP_PARAM_PRIME_INDEX].crp_nbits);
+
+	/* LAC can reject prime lengths based on prime key sizes, we just
+	   need to make sure we can allocate space for the base and
+	   exponent buffers correctly */
+	if ((dh_prime_len_bits % NUM_BITS_IN_BYTE) != 0) {
+		APRINTK("%s(): Warning Prime number buffer size is not a "
+			"multiple of 8 bits\n", __FUNCTION__);
+	}
+
+	/* Result storage space should be the same size as the prime as this
+	   value can take up the same amount of storage space */
+	if (dh_prime_len_bits !=
+	    krp->krp_param[ICP_DH_KRP_PARAM_RESULT_INDEX].crp_nbits) {
+		DPRINTK("%s(): Return Buffer must be the same size "
+			"as the Prime buffer\n", __FUNCTION__);
+		krp->krp_status = EINVAL;
+		return EINVAL;
+	}
+	/* Switch to size in bytes */
+	BITS_TO_BYTES(dh_prime_len_bytes, dh_prime_len_bits);
+
+	callbackTag = krp;
+
+	pPhase1OpData = kmem_cache_zalloc(drvDH_zone, GFP_KERNEL);
+	if (NULL == pPhase1OpData) {
+		APRINTK("%s():Failed to get memory for key gen data\n",
+			__FUNCTION__);
+		krp->krp_status = ENOMEM;
+		return ENOMEM;
+	}
+
+	pLocalOctetStringPV = kmem_cache_zalloc(drvFlatBuffer_zone, GFP_KERNEL);
+	if (NULL == pLocalOctetStringPV) {
+		APRINTK("%s():Failed to get memory for pLocalOctetStringPV\n",
+			__FUNCTION__);
+		kmem_cache_free(drvDH_zone, pPhase1OpData);
+		krp->krp_status = ENOMEM;
+		return ENOMEM;
+	}
+
+	/* Link parameters */
+	pPhase1OpData->primeP.pData =
+	    krp->krp_param[ICP_DH_KRP_PARAM_PRIME_INDEX].crp_p;
+
+	pPhase1OpData->primeP.dataLenInBytes = dh_prime_len_bytes;
+
+	icp_ocfDrvSwapBytes(pPhase1OpData->primeP.pData, dh_prime_len_bytes);
+
+	pPhase1OpData->baseG.pData =
+	    krp->krp_param[ICP_DH_KRP_PARAM_BASE_INDEX].crp_p;
+
+	BITS_TO_BYTES(pPhase1OpData->baseG.dataLenInBytes,
+		      krp->krp_param[ICP_DH_KRP_PARAM_BASE_INDEX].crp_nbits);
+
+	icp_ocfDrvSwapBytes(pPhase1OpData->baseG.pData,
+			    pPhase1OpData->baseG.dataLenInBytes);
+
+	pPhase1OpData->privateValueX.pData =
+	    krp->krp_param[ICP_DH_KRP_PARAM_PRIVATE_VALUE_INDEX].crp_p;
+
+	BITS_TO_BYTES(pPhase1OpData->privateValueX.dataLenInBytes,
+		      krp->krp_param[ICP_DH_KRP_PARAM_PRIVATE_VALUE_INDEX].
+		      crp_nbits);
+
+	icp_ocfDrvSwapBytes(pPhase1OpData->privateValueX.pData,
+			    pPhase1OpData->privateValueX.dataLenInBytes);
+
+	/* Output parameters */
+	pLocalOctetStringPV->pData =
+	    krp->krp_param[ICP_DH_KRP_PARAM_RESULT_INDEX].crp_p;
+
+	BITS_TO_BYTES(pLocalOctetStringPV->dataLenInBytes,
+		      krp->krp_param[ICP_DH_KRP_PARAM_RESULT_INDEX].crp_nbits);
+
+	lacStatus = cpaCyDhKeyGenPhase1(CPA_INSTANCE_HANDLE_SINGLE,
+					icp_ocfDrvDhP1CallBack,
+					callbackTag, pPhase1OpData,
+					pLocalOctetStringPV);
+
+	if (CPA_STATUS_SUCCESS != lacStatus) {
+		EPRINTK("%s(): DH Phase 1 Key Gen failed (%d).\n",
+			__FUNCTION__, lacStatus);
+		icp_ocfDrvFreeFlatBuffer(pLocalOctetStringPV);
+		kmem_cache_free(drvDH_zone, pPhase1OpData);
+	}
+
+	return lacStatus;
+}
+
+/* Name        : icp_ocfDrvModExp
+ *
+ * Description : This function will map ordinary Modular Exponentiation calls
+ * from OCF to the LAC API.
+ *
+ */
+static int icp_ocfDrvModExp(struct cryptkop *krp)
+{
+	CpaStatus lacStatus = CPA_STATUS_SUCCESS;
+	void *callbackTag = NULL;
+	CpaCyLnModExpOpData *pModExpOpData = NULL;
+	CpaFlatBuffer *pResult = NULL;
+
+	if ((krp->krp_param[ICP_MOD_EXP_KRP_PARAM_MODULUS_INDEX].crp_nbits %
+	     NUM_BITS_IN_BYTE) != 0) {
+		DPRINTK("%s(): Warning - modulus buffer size (%d) is not a "
+			"multiple of 8 bits\n", __FUNCTION__,
+			krp->krp_param[ICP_MOD_EXP_KRP_PARAM_MODULUS_INDEX].
+			crp_nbits);
+	}
+
+	/* Result storage space should be the same size as the prime as this
+	   value can take up the same amount of storage space */
+	if (krp->krp_param[ICP_MOD_EXP_KRP_PARAM_MODULUS_INDEX].crp_nbits >
+	    krp->krp_param[ICP_MOD_EXP_KRP_PARAM_RESULT_INDEX].crp_nbits) {
+		APRINTK("%s(): Return Buffer size must be the same or"
+			" greater than the Modulus buffer\n", __FUNCTION__);
+		krp->krp_status = EINVAL;
+		return EINVAL;
+	}
+
+	callbackTag = krp;
+
+	pModExpOpData = kmem_cache_zalloc(drvLnModExp_zone, GFP_KERNEL);
+	if (NULL == pModExpOpData) {
+		APRINTK("%s():Failed to get memory for key gen data\n",
+			__FUNCTION__);
+		krp->krp_status = ENOMEM;
+		return ENOMEM;
+	}
+
+	pResult = kmem_cache_zalloc(drvFlatBuffer_zone, GFP_KERNEL);
+	if (NULL == pResult) {
+		APRINTK("%s():Failed to get memory for ModExp result\n",
+			__FUNCTION__);
+		kmem_cache_free(drvLnModExp_zone, pModExpOpData);
+		krp->krp_status = ENOMEM;
+		return ENOMEM;
+	}
+
+	/* Link parameters */
+	pModExpOpData->modulus.pData =
+	    krp->krp_param[ICP_MOD_EXP_KRP_PARAM_MODULUS_INDEX].crp_p;
+	BITS_TO_BYTES(pModExpOpData->modulus.dataLenInBytes,
+		      krp->krp_param[ICP_MOD_EXP_KRP_PARAM_MODULUS_INDEX].
+		      crp_nbits);
+
+	icp_ocfDrvSwapBytes(pModExpOpData->modulus.pData,
+			    pModExpOpData->modulus.dataLenInBytes);
+
+	/*OCF patch to Openswan Pluto regularly sends the base value as 2
+	   bits in size. In this case, it has been found it is better to
+	   use the base size memory space as the input buffer (if the number
+	   is in bits is less than a byte, the number of bits is the input
+	   value) */
+	if (krp->krp_param[ICP_MOD_EXP_KRP_PARAM_BASE_INDEX].crp_nbits <
+	    NUM_BITS_IN_BYTE) {
+		DPRINTK("%s : base is small (%d)\n", __FUNCTION__, krp->
+			krp_param[ICP_MOD_EXP_KRP_PARAM_BASE_INDEX].crp_nbits);
+		pModExpOpData->base.dataLenInBytes = SINGLE_BYTE_VALUE;
+		pModExpOpData->base.pData =
+		    (uint8_t *) & (krp->
+				   krp_param[ICP_MOD_EXP_KRP_PARAM_BASE_INDEX].
+				   crp_nbits);
+		*((uint32_t *) pModExpOpData->base.pData) =
+		    htonl(*((uint32_t *) pModExpOpData->base.pData));
+
+	} else {
+
+		DPRINTK("%s : base is big (%d)\n", __FUNCTION__, krp->
+			krp_param[ICP_MOD_EXP_KRP_PARAM_BASE_INDEX].crp_nbits);
+		pModExpOpData->base.pData =
+		    krp->krp_param[ICP_MOD_EXP_KRP_PARAM_BASE_INDEX].crp_p;
+		BITS_TO_BYTES(pModExpOpData->base.dataLenInBytes,
+			      krp->krp_param[ICP_MOD_EXP_KRP_PARAM_BASE_INDEX].
+			      crp_nbits);
+		icp_ocfDrvSwapBytes(pModExpOpData->base.pData,
+				    pModExpOpData->base.dataLenInBytes);
+	}
+
+	pModExpOpData->exponent.pData =
+	    krp->krp_param[ICP_MOD_EXP_KRP_PARAM_EXPONENT_INDEX].crp_p;
+	BITS_TO_BYTES(pModExpOpData->exponent.dataLenInBytes,
+		      krp->krp_param[ICP_MOD_EXP_KRP_PARAM_EXPONENT_INDEX].
+		      crp_nbits);
+
+	icp_ocfDrvSwapBytes(pModExpOpData->exponent.pData,
+			    pModExpOpData->exponent.dataLenInBytes);
+	/* Output parameters */
+	pResult->pData =
+	    krp->krp_param[ICP_MOD_EXP_KRP_PARAM_RESULT_INDEX].crp_p,
+	    BITS_TO_BYTES(pResult->dataLenInBytes,
+			  krp->krp_param[ICP_MOD_EXP_KRP_PARAM_RESULT_INDEX].
+			  crp_nbits);
+
+	lacStatus = cpaCyLnModExp(CPA_INSTANCE_HANDLE_SINGLE,
+				  icp_ocfDrvModExpCallBack,
+				  callbackTag, pModExpOpData, pResult);
+
+	if (CPA_STATUS_SUCCESS != lacStatus) {
+		EPRINTK("%s(): Mod Exp Operation failed (%d).\n",
+			__FUNCTION__, lacStatus);
+		krp->krp_status = ECANCELED;
+		icp_ocfDrvFreeFlatBuffer(pResult);
+		kmem_cache_free(drvLnModExp_zone, pModExpOpData);
+	}
+
+	return lacStatus;
+}
+
+/* Name        : icp_ocfDrvModExpCRT
+ *
+ * Description : This function will map ordinary Modular Exponentiation Chinese
+ * Remainder Theorem implementaion calls from OCF to the LAC API.
+ *
+ * Note : Mod Exp CRT for this driver is accelerated through LAC RSA type 2
+ * decrypt operation. Therefore P and Q input values must always be prime
+ * numbers. Although basic primality checks are done in LAC, it is up to the
+ * user to do any correct prime number checking before passing the inputs.
+ */
+
+static int icp_ocfDrvModExpCRT(struct cryptkop *krp)
+{
+	CpaStatus lacStatus = CPA_STATUS_SUCCESS;
+	CpaCyRsaDecryptOpData *rsaDecryptOpData = NULL;
+	void *callbackTag = NULL;
+	CpaFlatBuffer *pOutputData = NULL;
+
+	/*Parameter input checks are all done by LAC, no need to repeat
+	   them here. */
+	callbackTag = krp;
+
+	rsaDecryptOpData = kmem_cache_zalloc(drvRSADecrypt_zone, GFP_KERNEL);
+	if (NULL == rsaDecryptOpData) {
+		APRINTK("%s():Failed to get memory"
+			" for MOD EXP CRT Op data struct\n", __FUNCTION__);
+		krp->krp_status = ENOMEM;
+		return ENOMEM;
+	}
+
+	rsaDecryptOpData->pRecipientPrivateKey
+	    = kmem_cache_zalloc(drvRSAPrivateKey_zone, GFP_KERNEL);
+	if (NULL == rsaDecryptOpData->pRecipientPrivateKey) {
+		APRINTK("%s():Failed to get memory for MOD EXP CRT"
+			" private key values struct\n", __FUNCTION__);
+		kmem_cache_free(drvRSADecrypt_zone, rsaDecryptOpData);
+		krp->krp_status = ENOMEM;
+		return ENOMEM;
+	}
+
+	rsaDecryptOpData->pRecipientPrivateKey->
+	    version = CPA_CY_RSA_VERSION_TWO_PRIME;
+	rsaDecryptOpData->pRecipientPrivateKey->
+	    privateKeyRepType = CPA_CY_RSA_PRIVATE_KEY_REP_TYPE_2;
+
+	pOutputData = kmem_cache_zalloc(drvFlatBuffer_zone, GFP_KERNEL);
+	if (NULL == pOutputData) {
+		APRINTK("%s():Failed to get memory"
+			" for MOD EXP CRT output data\n", __FUNCTION__);
+		kmem_cache_free(drvRSAPrivateKey_zone,
+				rsaDecryptOpData->pRecipientPrivateKey);
+		kmem_cache_free(drvRSADecrypt_zone, rsaDecryptOpData);
+		krp->krp_status = ENOMEM;
+		return ENOMEM;
+	}
+
+	rsaDecryptOpData->pRecipientPrivateKey->
+	    version = CPA_CY_RSA_VERSION_TWO_PRIME;
+	rsaDecryptOpData->pRecipientPrivateKey->
+	    privateKeyRepType = CPA_CY_RSA_PRIVATE_KEY_REP_TYPE_2;
+
+	/* Link parameters */
+	rsaDecryptOpData->inputData.pData =
+	    krp->krp_param[ICP_MOD_EXP_CRT_KRP_PARAM_I_INDEX].crp_p;
+	BITS_TO_BYTES(rsaDecryptOpData->inputData.dataLenInBytes,
+		      krp->krp_param[ICP_MOD_EXP_CRT_KRP_PARAM_I_INDEX].
+		      crp_nbits);
+
+	icp_ocfDrvSwapBytes(rsaDecryptOpData->inputData.pData,
+			    rsaDecryptOpData->inputData.dataLenInBytes);
+
+	rsaDecryptOpData->pRecipientPrivateKey->privateKeyRep2.prime1P.pData =
+	    krp->krp_param[ICP_MOD_EXP_CRT_KRP_PARAM_PRIME_P_INDEX].crp_p;
+	BITS_TO_BYTES(rsaDecryptOpData->pRecipientPrivateKey->privateKeyRep2.
+		      prime1P.dataLenInBytes,
+		      krp->krp_param[ICP_MOD_EXP_CRT_KRP_PARAM_PRIME_P_INDEX].
+		      crp_nbits);
+
+	icp_ocfDrvSwapBytes(rsaDecryptOpData->pRecipientPrivateKey->
+			    privateKeyRep2.prime1P.pData,
+			    rsaDecryptOpData->pRecipientPrivateKey->
+			    privateKeyRep2.prime1P.dataLenInBytes);
+
+	rsaDecryptOpData->pRecipientPrivateKey->privateKeyRep2.prime2Q.pData =
+	    krp->krp_param[ICP_MOD_EXP_CRT_KRP_PARAM_PRIME_Q_INDEX].crp_p;
+	BITS_TO_BYTES(rsaDecryptOpData->pRecipientPrivateKey->privateKeyRep2.
+		      prime2Q.dataLenInBytes,
+		      krp->krp_param[ICP_MOD_EXP_CRT_KRP_PARAM_PRIME_Q_INDEX].
+		      crp_nbits);
+
+	icp_ocfDrvSwapBytes(rsaDecryptOpData->pRecipientPrivateKey->
+			    privateKeyRep2.prime2Q.pData,
+			    rsaDecryptOpData->pRecipientPrivateKey->
+			    privateKeyRep2.prime2Q.dataLenInBytes);
+
+	rsaDecryptOpData->pRecipientPrivateKey->
+	    privateKeyRep2.exponent1Dp.pData =
+	    krp->krp_param[ICP_MOD_EXP_CRT_KRP_PARAM_EXPONENT_DP_INDEX].crp_p;
+	BITS_TO_BYTES(rsaDecryptOpData->pRecipientPrivateKey->privateKeyRep2.
+		      exponent1Dp.dataLenInBytes,
+		      krp->
+		      krp_param[ICP_MOD_EXP_CRT_KRP_PARAM_EXPONENT_DP_INDEX].
+		      crp_nbits);
+
+	icp_ocfDrvSwapBytes(rsaDecryptOpData->pRecipientPrivateKey->
+			    privateKeyRep2.exponent1Dp.pData,
+			    rsaDecryptOpData->pRecipientPrivateKey->
+			    privateKeyRep2.exponent1Dp.dataLenInBytes);
+
+	rsaDecryptOpData->pRecipientPrivateKey->
+	    privateKeyRep2.exponent2Dq.pData =
+	    krp->krp_param[ICP_MOD_EXP_CRT_KRP_PARAM_EXPONENT_DQ_INDEX].crp_p;
+	BITS_TO_BYTES(rsaDecryptOpData->pRecipientPrivateKey->
+		      privateKeyRep2.exponent2Dq.dataLenInBytes,
+		      krp->
+		      krp_param[ICP_MOD_EXP_CRT_KRP_PARAM_EXPONENT_DQ_INDEX].
+		      crp_nbits);
+
+	icp_ocfDrvSwapBytes(rsaDecryptOpData->pRecipientPrivateKey->
+			    privateKeyRep2.exponent2Dq.pData,
+			    rsaDecryptOpData->pRecipientPrivateKey->
+			    privateKeyRep2.exponent2Dq.dataLenInBytes);
+
+	rsaDecryptOpData->pRecipientPrivateKey->
+	    privateKeyRep2.coefficientQInv.pData =
+	    krp->krp_param[ICP_MOD_EXP_CRT_KRP_PARAM_COEFF_QINV_INDEX].crp_p;
+	BITS_TO_BYTES(rsaDecryptOpData->pRecipientPrivateKey->
+		      privateKeyRep2.coefficientQInv.dataLenInBytes,
+		      krp->
+		      krp_param[ICP_MOD_EXP_CRT_KRP_PARAM_COEFF_QINV_INDEX].
+		      crp_nbits);
+
+	icp_ocfDrvSwapBytes(rsaDecryptOpData->pRecipientPrivateKey->
+			    privateKeyRep2.coefficientQInv.pData,
+			    rsaDecryptOpData->pRecipientPrivateKey->
+			    privateKeyRep2.coefficientQInv.dataLenInBytes);
+
+	/* Output Parameter */
+	pOutputData->pData =
+	    krp->krp_param[ICP_MOD_EXP_CRT_KRP_PARAM_RESULT_INDEX].crp_p;
+	BITS_TO_BYTES(pOutputData->dataLenInBytes,
+		      krp->krp_param[ICP_MOD_EXP_CRT_KRP_PARAM_RESULT_INDEX].
+		      crp_nbits);
+
+	lacStatus = cpaCyRsaDecrypt(CPA_INSTANCE_HANDLE_SINGLE,
+				    icp_ocfDrvModExpCRTCallBack,
+				    callbackTag, rsaDecryptOpData, pOutputData);
+
+	if (CPA_STATUS_SUCCESS != lacStatus) {
+		EPRINTK("%s(): Mod Exp CRT Operation failed (%d).\n",
+			__FUNCTION__, lacStatus);
+		krp->krp_status = ECANCELED;
+		icp_ocfDrvFreeFlatBuffer(pOutputData);
+		kmem_cache_free(drvRSAPrivateKey_zone,
+				rsaDecryptOpData->pRecipientPrivateKey);
+		kmem_cache_free(drvRSADecrypt_zone, rsaDecryptOpData);
+	}
+
+	return lacStatus;
+}
+
+/* Name        : icp_ocfDrvCheckALessThanB
+ *
+ * Description : This function will check whether the first argument is less
+ * than the second. It is used to check whether the DSA RS sign Random K
+ * value is less than the Prime Q value (as defined in the specification)
+ *
+ */
+static int
+icp_ocfDrvCheckALessThanB(CpaFlatBuffer * pK, CpaFlatBuffer * pQ, int *doCheck)
+{
+
+	uint8_t *MSB_K = pK->pData;
+	uint8_t *MSB_Q = pQ->pData;
+	uint32_t buffer_lengths_in_bytes = pQ->dataLenInBytes;
+
+	if (DONT_RUN_LESS_THAN_CHECK == *doCheck) {
+		return FAIL_A_IS_GREATER_THAN_B;
+	}
+
+/*Check MSBs
+if A == B, check next MSB
+if A > B, return A_IS_GREATER_THAN_B
+if A < B, return A_IS_LESS_THAN_B (success)
+*/
+	while (*MSB_K == *MSB_Q) {
+		MSB_K++;
+		MSB_Q++;
+
+		buffer_lengths_in_bytes--;
+		if (0 == buffer_lengths_in_bytes) {
+			DPRINTK("%s() Buffers have equal value!!\n",
+				__FUNCTION__);
+			return FAIL_A_IS_EQUAL_TO_B;
+		}
+
+	}
+
+	if (*MSB_K < *MSB_Q) {
+		return SUCCESS_A_IS_LESS_THAN_B;
+	} else {
+		return FAIL_A_IS_GREATER_THAN_B;
+	}
+
+}
+
+/* Name        : icp_ocfDrvDsaSign
+ *
+ * Description : This function will map DSA RS Sign from OCF to the LAC API.
+ *
+ * NOTE: From looking at OCF patch to OpenSSL and even the number of input
+ * parameters, OCF expects us to generate the random seed value. This value
+ * is generated and passed to LAC, however the number is discared in the
+ * callback and not returned to the user.
+ */
+static int icp_ocfDrvDsaSign(struct cryptkop *krp)
+{
+	CpaStatus lacStatus = CPA_STATUS_SUCCESS;
+	CpaCyDsaRSSignOpData *dsaRsSignOpData = NULL;
+	void *callbackTag = NULL;
+	CpaCyRandGenOpData randGenOpData;
+	int primeQSizeInBytes = 0;
+	int doCheck = 0;
+	CpaFlatBuffer randData;
+	CpaBoolean protocolStatus = CPA_FALSE;
+	CpaFlatBuffer *pR = NULL;
+	CpaFlatBuffer *pS = NULL;
+
+	callbackTag = krp;
+
+	BITS_TO_BYTES(primeQSizeInBytes,
+		      krp->krp_param[ICP_DSA_SIGN_KRP_PARAM_PRIME_Q_INDEX].
+		      crp_nbits);
+
+	if (DSA_RS_SIGN_PRIMEQ_SIZE_IN_BYTES != primeQSizeInBytes) {
+		APRINTK("%s(): DSA PRIME Q size not equal to the "
+			"FIPS defined 20bytes, = %d\n",
+			__FUNCTION__, primeQSizeInBytes);
+		krp->krp_status = EDOM;
+		return EDOM;
+	}
+
+	dsaRsSignOpData = kmem_cache_zalloc(drvDSARSSign_zone, GFP_KERNEL);
+	if (NULL == dsaRsSignOpData) {
+		APRINTK("%s():Failed to get memory"
+			" for DSA RS Sign Op data struct\n", __FUNCTION__);
+		krp->krp_status = ENOMEM;
+		return ENOMEM;
+	}
+
+	dsaRsSignOpData->K.pData =
+	    kmem_cache_alloc(drvDSARSSignKValue_zone, GFP_ATOMIC);
+
+	if (NULL == dsaRsSignOpData->K.pData) {
+		APRINTK("%s():Failed to get memory"
+			" for DSA RS Sign Op Random value\n", __FUNCTION__);
+		kmem_cache_free(drvDSARSSign_zone, dsaRsSignOpData);
+		krp->krp_status = ENOMEM;
+		return ENOMEM;
+	}
+
+	pR = kmem_cache_zalloc(drvFlatBuffer_zone, GFP_KERNEL);
+	if (NULL == pR) {
+		APRINTK("%s():Failed to get memory"
+			" for DSA signature R\n", __FUNCTION__);
+		kmem_cache_free(drvDSARSSignKValue_zone,
+				dsaRsSignOpData->K.pData);
+		kmem_cache_free(drvDSARSSign_zone, dsaRsSignOpData);
+		krp->krp_status = ENOMEM;
+		return ENOMEM;
+	}
+
+	pS = kmem_cache_zalloc(drvFlatBuffer_zone, GFP_KERNEL);
+	if (NULL == pS) {
+		APRINTK("%s():Failed to get memory"
+			" for DSA signature S\n", __FUNCTION__);
+		icp_ocfDrvFreeFlatBuffer(pR);
+		kmem_cache_free(drvDSARSSignKValue_zone,
+				dsaRsSignOpData->K.pData);
+		kmem_cache_free(drvDSARSSign_zone, dsaRsSignOpData);
+		krp->krp_status = ENOMEM;
+		return ENOMEM;
+	}
+
+	/*link prime number parameter for ease of processing */
+	dsaRsSignOpData->P.pData =
+	    krp->krp_param[ICP_DSA_SIGN_KRP_PARAM_PRIME_P_INDEX].crp_p;
+	BITS_TO_BYTES(dsaRsSignOpData->P.dataLenInBytes,
+		      krp->krp_param[ICP_DSA_SIGN_KRP_PARAM_PRIME_P_INDEX].
+		      crp_nbits);
+
+	icp_ocfDrvSwapBytes(dsaRsSignOpData->P.pData,
+			    dsaRsSignOpData->P.dataLenInBytes);
+
+	dsaRsSignOpData->Q.pData =
+	    krp->krp_param[ICP_DSA_SIGN_KRP_PARAM_PRIME_Q_INDEX].crp_p;
+	BITS_TO_BYTES(dsaRsSignOpData->Q.dataLenInBytes,
+		      krp->krp_param[ICP_DSA_SIGN_KRP_PARAM_PRIME_Q_INDEX].
+		      crp_nbits);
+
+	icp_ocfDrvSwapBytes(dsaRsSignOpData->Q.pData,
+			    dsaRsSignOpData->Q.dataLenInBytes);
+
+	/*generate random number with equal buffer size to Prime value Q,
+	   but value less than Q */
+	dsaRsSignOpData->K.dataLenInBytes = dsaRsSignOpData->Q.dataLenInBytes;
+
+	randGenOpData.generateBits = CPA_TRUE;
+	randGenOpData.lenInBytes = dsaRsSignOpData->K.dataLenInBytes;
+
+	icp_ocfDrvPtrAndLenToFlatBuffer(dsaRsSignOpData->K.pData,
+					dsaRsSignOpData->K.dataLenInBytes,
+					&randData);
+
+	doCheck = 0;
+	while (icp_ocfDrvCheckALessThanB(&(dsaRsSignOpData->K),
+					 &(dsaRsSignOpData->Q), &doCheck)) {
+
+		if (CPA_STATUS_SUCCESS
+		    != cpaCyRandGen(CPA_INSTANCE_HANDLE_SINGLE,
+				    NULL, NULL, &randGenOpData, &randData)) {
+			APRINTK("%s(): ERROR - Failed to generate DSA RS Sign K"
+				"value\n", __FUNCTION__);
+			icp_ocfDrvFreeFlatBuffer(pS);
+			icp_ocfDrvFreeFlatBuffer(pR);
+			kmem_cache_free(drvDSARSSignKValue_zone,
+					dsaRsSignOpData->K.pData);
+			kmem_cache_free(drvDSARSSign_zone, dsaRsSignOpData);
+			krp->krp_status = EAGAIN;
+			return EAGAIN;
+		}
+
+		doCheck++;
+		if (DSA_SIGN_RAND_GEN_VAL_CHECK_MAX_ITERATIONS == doCheck) {
+			APRINTK("%s(): ERROR - Failed to find DSA RS Sign K "
+				"value less than Q value\n", __FUNCTION__);
+			icp_ocfDrvFreeFlatBuffer(pS);
+			icp_ocfDrvFreeFlatBuffer(pR);
+			kmem_cache_free(drvDSARSSignKValue_zone,
+					dsaRsSignOpData->K.pData);
+			kmem_cache_free(drvDSARSSign_zone, dsaRsSignOpData);
+			krp->krp_status = EAGAIN;
+			return EAGAIN;
+		}
+
+	}
+	/*Rand Data - no need to swap bytes for pK */
+
+	/* Link parameters */
+	dsaRsSignOpData->G.pData =
+	    krp->krp_param[ICP_DSA_SIGN_KRP_PARAM_G_INDEX].crp_p;
+	BITS_TO_BYTES(dsaRsSignOpData->G.dataLenInBytes,
+		      krp->krp_param[ICP_DSA_SIGN_KRP_PARAM_G_INDEX].crp_nbits);
+
+	icp_ocfDrvSwapBytes(dsaRsSignOpData->G.pData,
+			    dsaRsSignOpData->G.dataLenInBytes);
+
+	dsaRsSignOpData->X.pData =
+	    krp->krp_param[ICP_DSA_SIGN_KRP_PARAM_X_INDEX].crp_p;
+	BITS_TO_BYTES(dsaRsSignOpData->X.dataLenInBytes,
+		      krp->krp_param[ICP_DSA_SIGN_KRP_PARAM_X_INDEX].crp_nbits);
+	icp_ocfDrvSwapBytes(dsaRsSignOpData->X.pData,
+			    dsaRsSignOpData->X.dataLenInBytes);
+
+	dsaRsSignOpData->M.pData =
+	    krp->krp_param[ICP_DSA_SIGN_KRP_PARAM_DGST_INDEX].crp_p;
+	BITS_TO_BYTES(dsaRsSignOpData->M.dataLenInBytes,
+		      krp->krp_param[ICP_DSA_SIGN_KRP_PARAM_DGST_INDEX].
+		      crp_nbits);
+	icp_ocfDrvSwapBytes(dsaRsSignOpData->M.pData,
+			    dsaRsSignOpData->M.dataLenInBytes);
+
+	/* Output Parameters */
+	pS->pData = krp->krp_param[ICP_DSA_SIGN_KRP_PARAM_S_RESULT_INDEX].crp_p;
+	BITS_TO_BYTES(pS->dataLenInBytes,
+		      krp->krp_param[ICP_DSA_SIGN_KRP_PARAM_S_RESULT_INDEX].
+		      crp_nbits);
+
+	pR->pData = krp->krp_param[ICP_DSA_SIGN_KRP_PARAM_R_RESULT_INDEX].crp_p;
+	BITS_TO_BYTES(pR->dataLenInBytes,
+		      krp->krp_param[ICP_DSA_SIGN_KRP_PARAM_R_RESULT_INDEX].
+		      crp_nbits);
+
+	lacStatus = cpaCyDsaSignRS(CPA_INSTANCE_HANDLE_SINGLE,
+				   icp_ocfDrvDsaRSSignCallBack,
+				   callbackTag, dsaRsSignOpData,
+				   &protocolStatus, pR, pS);
+
+	if (CPA_STATUS_SUCCESS != lacStatus) {
+		EPRINTK("%s(): DSA RS Sign Operation failed (%d).\n",
+			__FUNCTION__, lacStatus);
+		krp->krp_status = ECANCELED;
+		icp_ocfDrvFreeFlatBuffer(pS);
+		icp_ocfDrvFreeFlatBuffer(pR);
+		kmem_cache_free(drvDSARSSignKValue_zone,
+				dsaRsSignOpData->K.pData);
+		kmem_cache_free(drvDSARSSign_zone, dsaRsSignOpData);
+	}
+
+	return lacStatus;
+}
+
+/* Name        : icp_ocfDrvDsaVerify
+ *
+ * Description : This function will map DSA RS Verify from OCF to the LAC API.
+ *
+ */
+static int icp_ocfDrvDsaVerify(struct cryptkop *krp)
+{
+	CpaStatus lacStatus = CPA_STATUS_SUCCESS;
+	CpaCyDsaVerifyOpData *dsaVerifyOpData = NULL;
+	void *callbackTag = NULL;
+	CpaBoolean verifyStatus = CPA_FALSE;
+
+	callbackTag = krp;
+
+	dsaVerifyOpData = kmem_cache_zalloc(drvDSAVerify_zone, GFP_KERNEL);
+	if (NULL == dsaVerifyOpData) {
+		APRINTK("%s():Failed to get memory"
+			" for DSA Verify Op data struct\n", __FUNCTION__);
+		krp->krp_status = ENOMEM;
+		return ENOMEM;
+	}
+
+	/* Link parameters */
+	dsaVerifyOpData->P.pData =
+	    krp->krp_param[ICP_DSA_VERIFY_KRP_PARAM_PRIME_P_INDEX].crp_p;
+	BITS_TO_BYTES(dsaVerifyOpData->P.dataLenInBytes,
+		      krp->krp_param[ICP_DSA_VERIFY_KRP_PARAM_PRIME_P_INDEX].
+		      crp_nbits);
+	icp_ocfDrvSwapBytes(dsaVerifyOpData->P.pData,
+			    dsaVerifyOpData->P.dataLenInBytes);
+
+	dsaVerifyOpData->Q.pData =
+	    krp->krp_param[ICP_DSA_VERIFY_KRP_PARAM_PRIME_Q_INDEX].crp_p;
+	BITS_TO_BYTES(dsaVerifyOpData->Q.dataLenInBytes,
+		      krp->krp_param[ICP_DSA_VERIFY_KRP_PARAM_PRIME_Q_INDEX].
+		      crp_nbits);
+	icp_ocfDrvSwapBytes(dsaVerifyOpData->Q.pData,
+			    dsaVerifyOpData->Q.dataLenInBytes);
+
+	dsaVerifyOpData->G.pData =
+	    krp->krp_param[ICP_DSA_VERIFY_KRP_PARAM_G_INDEX].crp_p;
+	BITS_TO_BYTES(dsaVerifyOpData->G.dataLenInBytes,
+		      krp->krp_param[ICP_DSA_VERIFY_KRP_PARAM_G_INDEX].
+		      crp_nbits);
+	icp_ocfDrvSwapBytes(dsaVerifyOpData->G.pData,
+			    dsaVerifyOpData->G.dataLenInBytes);
+
+	dsaVerifyOpData->Y.pData =
+	    krp->krp_param[ICP_DSA_VERIFY_KRP_PARAM_PUBKEY_INDEX].crp_p;
+	BITS_TO_BYTES(dsaVerifyOpData->Y.dataLenInBytes,
+		      krp->krp_param[ICP_DSA_VERIFY_KRP_PARAM_PUBKEY_INDEX].
+		      crp_nbits);
+	icp_ocfDrvSwapBytes(dsaVerifyOpData->Y.pData,
+			    dsaVerifyOpData->Y.dataLenInBytes);
+
+	dsaVerifyOpData->M.pData =
+	    krp->krp_param[ICP_DSA_VERIFY_KRP_PARAM_DGST_INDEX].crp_p;
+	BITS_TO_BYTES(dsaVerifyOpData->M.dataLenInBytes,
+		      krp->krp_param[ICP_DSA_VERIFY_KRP_PARAM_DGST_INDEX].
+		      crp_nbits);
+	icp_ocfDrvSwapBytes(dsaVerifyOpData->M.pData,
+			    dsaVerifyOpData->M.dataLenInBytes);
+
+	dsaVerifyOpData->R.pData =
+	    krp->krp_param[ICP_DSA_VERIFY_KRP_PARAM_SIG_R_INDEX].crp_p;
+	BITS_TO_BYTES(dsaVerifyOpData->R.dataLenInBytes,
+		      krp->krp_param[ICP_DSA_VERIFY_KRP_PARAM_SIG_R_INDEX].
+		      crp_nbits);
+	icp_ocfDrvSwapBytes(dsaVerifyOpData->R.pData,
+			    dsaVerifyOpData->R.dataLenInBytes);
+
+	dsaVerifyOpData->S.pData =
+	    krp->krp_param[ICP_DSA_VERIFY_KRP_PARAM_SIG_S_INDEX].crp_p;
+	BITS_TO_BYTES(dsaVerifyOpData->S.dataLenInBytes,
+		      krp->krp_param[ICP_DSA_VERIFY_KRP_PARAM_SIG_S_INDEX].
+		      crp_nbits);
+	icp_ocfDrvSwapBytes(dsaVerifyOpData->S.pData,
+			    dsaVerifyOpData->S.dataLenInBytes);
+
+	lacStatus = cpaCyDsaVerify(CPA_INSTANCE_HANDLE_SINGLE,
+				   icp_ocfDrvDsaVerifyCallBack,
+				   callbackTag, dsaVerifyOpData, &verifyStatus);
+
+	if (CPA_STATUS_SUCCESS != lacStatus) {
+		EPRINTK("%s(): DSA Verify Operation failed (%d).\n",
+			__FUNCTION__, lacStatus);
+		kmem_cache_free(drvDSAVerify_zone, dsaVerifyOpData);
+		krp->krp_status = ECANCELED;
+	}
+
+	return lacStatus;
+}
+
+/* Name        : icp_ocfDrvReadRandom
+ *
+ * Description : This function will map RNG functionality calls from OCF
+ * to the LAC API.
+ */
+int icp_ocfDrvReadRandom(void *arg, uint32_t * buf, int maxwords)
+{
+	CpaStatus lacStatus = CPA_STATUS_SUCCESS;
+	CpaCyRandGenOpData randGenOpData;
+	CpaFlatBuffer randData;
+
+	if (NULL == buf) {
+		APRINTK("%s(): Invalid input parameters\n", __FUNCTION__);
+		return EINVAL;
+	}
+
+	/* maxwords here is number of integers to generate data for */
+	randGenOpData.generateBits = CPA_TRUE;
+
+	randGenOpData.lenInBytes = maxwords * sizeof(uint32_t);
+
+	icp_ocfDrvPtrAndLenToFlatBuffer((Cpa8U *) buf,
+					randGenOpData.lenInBytes, &randData);
+
+	lacStatus = cpaCyRandGen(CPA_INSTANCE_HANDLE_SINGLE,
+				 NULL, NULL, &randGenOpData, &randData);
+	if (CPA_STATUS_SUCCESS != lacStatus) {
+		EPRINTK("%s(): icp_LacSymRandGen failed (%d). \n",
+			__FUNCTION__, lacStatus);
+		return RETURN_RAND_NUM_GEN_FAILED;
+	}
+
+	return randGenOpData.lenInBytes / sizeof(uint32_t);
+}
+
+/* Name        : icp_ocfDrvDhP1Callback
+ *
+ * Description : When this function returns it signifies that the LAC
+ * component has completed the DH operation.
+ */
+static void
+icp_ocfDrvDhP1CallBack(void *callbackTag,
+		       CpaStatus status,
+		       void *pOpData, CpaFlatBuffer * pLocalOctetStringPV)
+{
+	struct cryptkop *krp = NULL;
+	CpaCyDhPhase1KeyGenOpData *pPhase1OpData = NULL;
+
+	if (NULL == callbackTag) {
+		DPRINTK("%s(): Invalid input parameters - "
+			"callbackTag data is NULL\n", __FUNCTION__);
+		return;
+	}
+	krp = (struct cryptkop *)callbackTag;
+
+	if (NULL == pOpData) {
+		DPRINTK("%s(): Invalid input parameters - "
+			"Operation Data is NULL\n", __FUNCTION__);
+		krp->krp_status = ECANCELED;
+		crypto_kdone(krp);
+		return;
+	}
+	pPhase1OpData = (CpaCyDhPhase1KeyGenOpData *) pOpData;
+
+	if (NULL == pLocalOctetStringPV) {
+		DPRINTK("%s(): Invalid input parameters - "
+			"pLocalOctetStringPV Data is NULL\n", __FUNCTION__);
+		memset(pPhase1OpData, 0, sizeof(CpaCyDhPhase1KeyGenOpData));
+		kmem_cache_free(drvDH_zone, pPhase1OpData);
+		krp->krp_status = ECANCELED;
+		crypto_kdone(krp);
+		return;
+	}
+
+	if (CPA_STATUS_SUCCESS == status) {
+		krp->krp_status = CRYPTO_OP_SUCCESS;
+	} else {
+		APRINTK("%s(): Diffie Hellman Phase1 Key Gen failed - "
+			"Operation Status = %d\n", __FUNCTION__, status);
+		krp->krp_status = ECANCELED;
+	}
+
+	icp_ocfDrvSwapBytes(pLocalOctetStringPV->pData,
+			    pLocalOctetStringPV->dataLenInBytes);
+
+	icp_ocfDrvFreeFlatBuffer(pLocalOctetStringPV);
+	memset(pPhase1OpData, 0, sizeof(CpaCyDhPhase1KeyGenOpData));
+	kmem_cache_free(drvDH_zone, pPhase1OpData);
+
+	crypto_kdone(krp);
+
+	return;
+}
+
+/* Name        : icp_ocfDrvModExpCallBack
+ *
+ * Description : When this function returns it signifies that the LAC
+ * component has completed the Mod Exp operation.
+ */
+static void
+icp_ocfDrvModExpCallBack(void *callbackTag,
+			 CpaStatus status,
+			 void *pOpdata, CpaFlatBuffer * pResult)
+{
+	struct cryptkop *krp = NULL;
+	CpaCyLnModExpOpData *pLnModExpOpData = NULL;
+
+	if (NULL == callbackTag) {
+		DPRINTK("%s(): Invalid input parameters - "
+			"callbackTag data is NULL\n", __FUNCTION__);
+		return;
+	}
+	krp = (struct cryptkop *)callbackTag;
+
+	if (NULL == pOpdata) {
+		DPRINTK("%s(): Invalid Mod Exp input parameters - "
+			"Operation Data is NULL\n", __FUNCTION__);
+		krp->krp_status = ECANCELED;
+		crypto_kdone(krp);
+		return;
+	}
+	pLnModExpOpData = (CpaCyLnModExpOpData *) pOpdata;
+
+	if (NULL == pResult) {
+		DPRINTK("%s(): Invalid input parameters - "
+			"pResult data is NULL\n", __FUNCTION__);
+		krp->krp_status = ECANCELED;
+		memset(pLnModExpOpData, 0, sizeof(CpaCyLnModExpOpData));
+		kmem_cache_free(drvLnModExp_zone, pLnModExpOpData);
+		crypto_kdone(krp);
+		return;
+	}
+
+	if (CPA_STATUS_SUCCESS == status) {
+		krp->krp_status = CRYPTO_OP_SUCCESS;
+	} else {
+		APRINTK("%s(): LAC Mod Exp Operation failed - "
+			"Operation Status = %d\n", __FUNCTION__, status);
+		krp->krp_status = ECANCELED;
+	}
+
+	icp_ocfDrvSwapBytes(pResult->pData, pResult->dataLenInBytes);
+
+	/*switch base size value back to original */
+	if (pLnModExpOpData->base.pData ==
+	    (uint8_t *) & (krp->
+			   krp_param[ICP_MOD_EXP_KRP_PARAM_BASE_INDEX].
+			   crp_nbits)) {
+		*((uint32_t *) pLnModExpOpData->base.pData) =
+		    ntohl(*((uint32_t *) pLnModExpOpData->base.pData));
+	}
+	icp_ocfDrvFreeFlatBuffer(pResult);
+	memset(pLnModExpOpData, 0, sizeof(CpaCyLnModExpOpData));
+	kmem_cache_free(drvLnModExp_zone, pLnModExpOpData);
+
+	crypto_kdone(krp);
+
+	return;
+
+}
+
+/* Name        : icp_ocfDrvModExpCRTCallBack
+ *
+ * Description : When this function returns it signifies that the LAC
+ * component has completed the Mod Exp CRT operation.
+ */
+static void
+icp_ocfDrvModExpCRTCallBack(void *callbackTag,
+			    CpaStatus status,
+			    void *pOpData, CpaFlatBuffer * pOutputData)
+{
+	struct cryptkop *krp = NULL;
+	CpaCyRsaDecryptOpData *pDecryptData = NULL;
+
+	if (NULL == callbackTag) {
+		DPRINTK("%s(): Invalid input parameters - "
+			"callbackTag data is NULL\n", __FUNCTION__);
+		return;
+	}
+
+	krp = (struct cryptkop *)callbackTag;
+
+	if (NULL == pOpData) {
+		DPRINTK("%s(): Invalid input parameters - "
+			"Operation Data is NULL\n", __FUNCTION__);
+		krp->krp_status = ECANCELED;
+		crypto_kdone(krp);
+		return;
+	}
+	pDecryptData = (CpaCyRsaDecryptOpData *) pOpData;
+
+	if (NULL == pOutputData) {
+		DPRINTK("%s(): Invalid input parameter - "
+			"pOutputData is NULL\n", __FUNCTION__);
+		memset(pDecryptData->pRecipientPrivateKey, 0,
+		       sizeof(CpaCyRsaPrivateKey));
+		kmem_cache_free(drvRSAPrivateKey_zone,
+				pDecryptData->pRecipientPrivateKey);
+		memset(pDecryptData, 0, sizeof(CpaCyRsaDecryptOpData));
+		kmem_cache_free(drvRSADecrypt_zone, pDecryptData);
+		krp->krp_status = ECANCELED;
+		crypto_kdone(krp);
+		return;
+	}
+
+	if (CPA_STATUS_SUCCESS == status) {
+		krp->krp_status = CRYPTO_OP_SUCCESS;
+	} else {
+		APRINTK("%s(): LAC Mod Exp CRT operation failed - "
+			"Operation Status = %d\n", __FUNCTION__, status);
+		krp->krp_status = ECANCELED;
+	}
+
+	icp_ocfDrvSwapBytes(pOutputData->pData, pOutputData->dataLenInBytes);
+
+	icp_ocfDrvFreeFlatBuffer(pOutputData);
+	memset(pDecryptData->pRecipientPrivateKey, 0,
+	       sizeof(CpaCyRsaPrivateKey));
+	kmem_cache_free(drvRSAPrivateKey_zone,
+			pDecryptData->pRecipientPrivateKey);
+	memset(pDecryptData, 0, sizeof(CpaCyRsaDecryptOpData));
+	kmem_cache_free(drvRSADecrypt_zone, pDecryptData);
+
+	crypto_kdone(krp);
+
+	return;
+}
+
+/* Name        : icp_ocfDrvDsaRSSignCallBack
+ *
+ * Description : When this function returns it signifies that the LAC
+ * component has completed the DSA RS sign operation.
+ */
+static void
+icp_ocfDrvDsaRSSignCallBack(void *callbackTag,
+			    CpaStatus status,
+			    void *pOpData,
+			    CpaBoolean protocolStatus,
+			    CpaFlatBuffer * pR, CpaFlatBuffer * pS)
+{
+	struct cryptkop *krp = NULL;
+	CpaCyDsaRSSignOpData *pSignData = NULL;
+
+	if (NULL == callbackTag) {
+		DPRINTK("%s(): Invalid input parameters - "
+			"callbackTag data is NULL\n", __FUNCTION__);
+		return;
+	}
+
+	krp = (struct cryptkop *)callbackTag;
+
+	if (NULL == pOpData) {
+		DPRINTK("%s(): Invalid input parameters - "
+			"Operation Data is NULL\n", __FUNCTION__);
+		krp->krp_status = ECANCELED;
+		crypto_kdone(krp);
+		return;
+	}
+	pSignData = (CpaCyDsaRSSignOpData *) pOpData;
+
+	if (NULL == pR) {
+		DPRINTK("%s(): Invalid input parameter - "
+			"pR sign is NULL\n", __FUNCTION__);
+		icp_ocfDrvFreeFlatBuffer(pS);
+		kmem_cache_free(drvDSARSSign_zone, pSignData);
+		krp->krp_status = ECANCELED;
+		crypto_kdone(krp);
+		return;
+	}
+
+	if (NULL == pS) {
+		DPRINTK("%s(): Invalid input parameter - "
+			"pS sign is NULL\n", __FUNCTION__);
+		icp_ocfDrvFreeFlatBuffer(pR);
+		kmem_cache_free(drvDSARSSign_zone, pSignData);
+		krp->krp_status = ECANCELED;
+		crypto_kdone(krp);
+		return;
+	}
+
+	if (CPA_STATUS_SUCCESS != status) {
+		APRINTK("%s(): LAC DSA RS Sign operation failed - "
+			"Operation Status = %d\n", __FUNCTION__, status);
+		krp->krp_status = ECANCELED;
+	} else {
+		krp->krp_status = CRYPTO_OP_SUCCESS;
+
+		if (CPA_TRUE != protocolStatus) {
+			DPRINTK("%s(): LAC DSA RS Sign operation failed due "
+				"to protocol error\n", __FUNCTION__);
+			krp->krp_status = EIO;
+		}
+	}
+
+	/* Swap bytes only when the callback status is successful and
+	   protocolStatus is set to true */
+	if (CPA_STATUS_SUCCESS == status && CPA_TRUE == protocolStatus) {
+		icp_ocfDrvSwapBytes(pR->pData, pR->dataLenInBytes);
+		icp_ocfDrvSwapBytes(pS->pData, pS->dataLenInBytes);
+	}
+
+	icp_ocfDrvFreeFlatBuffer(pR);
+	icp_ocfDrvFreeFlatBuffer(pS);
+	memset(pSignData->K.pData, 0, pSignData->K.dataLenInBytes);
+	kmem_cache_free(drvDSARSSignKValue_zone, pSignData->K.pData);
+	memset(pSignData, 0, sizeof(CpaCyDsaRSSignOpData));
+	kmem_cache_free(drvDSARSSign_zone, pSignData);
+	crypto_kdone(krp);
+
+	return;
+}
+
+/* Name        : icp_ocfDrvDsaVerifyCallback
+ *
+ * Description : When this function returns it signifies that the LAC
+ * component has completed the DSA Verify operation.
+ */
+static void
+icp_ocfDrvDsaVerifyCallBack(void *callbackTag,
+			    CpaStatus status,
+			    void *pOpData, CpaBoolean verifyStatus)
+{
+
+	struct cryptkop *krp = NULL;
+	CpaCyDsaVerifyOpData *pVerData = NULL;
+
+	if (NULL == callbackTag) {
+		DPRINTK("%s(): Invalid input parameters - "
+			"callbackTag data is NULL\n", __FUNCTION__);
+		return;
+	}
+
+	krp = (struct cryptkop *)callbackTag;
+
+	if (NULL == pOpData) {
+		DPRINTK("%s(): Invalid input parameters - "
+			"Operation Data is NULL\n", __FUNCTION__);
+		krp->krp_status = ECANCELED;
+		crypto_kdone(krp);
+		return;
+	}
+	pVerData = (CpaCyDsaVerifyOpData *) pOpData;
+
+	if (CPA_STATUS_SUCCESS != status) {
+		APRINTK("%s(): LAC DSA Verify operation failed - "
+			"Operation Status = %d\n", __FUNCTION__, status);
+		krp->krp_status = ECANCELED;
+	} else {
+		krp->krp_status = CRYPTO_OP_SUCCESS;
+
+		if (CPA_TRUE != verifyStatus) {
+			DPRINTK("%s(): DSA signature invalid\n", __FUNCTION__);
+			krp->krp_status = EIO;
+		}
+	}
+
+	/* Swap bytes only when the callback status is successful and
+	   verifyStatus is set to true */
+	/*Just swapping back the key values for now. Possibly all
+	   swapped buffers need to be reverted */
+	if (CPA_STATUS_SUCCESS == status && CPA_TRUE == verifyStatus) {
+		icp_ocfDrvSwapBytes(pVerData->R.pData,
+				    pVerData->R.dataLenInBytes);
+		icp_ocfDrvSwapBytes(pVerData->S.pData,
+				    pVerData->S.dataLenInBytes);
+	}
+
+	memset(pVerData, 0, sizeof(CpaCyDsaVerifyOpData));
+	kmem_cache_free(drvDSAVerify_zone, pVerData);
+	crypto_kdone(krp);
+
+	return;
+}
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/ep80579/Makefile
+++ linux-mvl-dove-2.6.32/crypto/ocf/ep80579/Makefile
@@ -0,0 +1,116 @@
+#########################################################################
+#
+#  Targets supported
+#  all     - builds everything and installs
+#  install - identical to all
+#  depend  - build dependencies
+#  clean   - clears derived objects except the .depend files
+#  distclean- clears all derived objects and the .depend file
+#  
+# @par
+# This file is provided under a dual BSD/GPLv2 license.  When using or 
+#   redistributing this file, you may do so under either license.
+# 
+#   GPL LICENSE SUMMARY
+# 
+#   Copyright(c) 2007,2008 Intel Corporation. All rights reserved.
+# 
+#   This program is free software; you can redistribute it and/or modify 
+#   it under the terms of version 2 of the GNU General Public License as
+#   published by the Free Software Foundation.
+# 
+#   This program is distributed in the hope that it will be useful, but 
+#   WITHOUT ANY WARRANTY; without even the implied warranty of 
+#   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU 
+#   General Public License for more details.
+# 
+#   You should have received a copy of the GNU General Public License 
+#   along with this program; if not, write to the Free Software 
+#   Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+#   The full GNU General Public License is included in this distribution 
+#   in the file called LICENSE.GPL.
+# 
+#   Contact Information:
+#   Intel Corporation
+# 
+#   BSD LICENSE 
+# 
+#   Copyright(c) 2007,2008 Intel Corporation. All rights reserved.
+#   All rights reserved.
+# 
+#   Redistribution and use in source and binary forms, with or without 
+#   modification, are permitted provided that the following conditions 
+#   are met:
+# 
+#     * Redistributions of source code must retain the above copyright 
+#       notice, this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright 
+#       notice, this list of conditions and the following disclaimer in 
+#       the documentation and/or other materials provided with the 
+#       distribution.
+#     * Neither the name of Intel Corporation nor the names of its 
+#       contributors may be used to endorse or promote products derived 
+#       from this software without specific prior written permission.
+# 
+#   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+#   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+#   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 
+#   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+#   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+#   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
+#   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 
+#   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 
+#   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+#   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
+#   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+# 
+# 
+#  version: Security.L.1.0.130
+############################################################################
+
+
+####################Common variables and definitions########################
+
+# Ensure The ENV_DIR environmental var is defined.
+ifndef ICP_ENV_DIR
+
+all:
+	echo "ICP_ENV_DIR is undefined."
+	echo "Please set the path to your environment makefile -> setenv ICP_ENV_DIR <path>")
+	exit 1
+clean:
+
+else
+
+#Add your project environment Makefile
+include $(ICP_ENV_DIR)/environment.mk
+
+#include the makefile with all the default and common Make variable definitions
+include $(ICP_BUILDSYSTEM_PATH)/build_files/common.mk
+
+#Add the name for the executable, Library or Module output definitions
+OUTPUT_NAME= icp_ocf
+
+# List of Source Files to be compiled 
+SOURCES= icp_common.c icp_sym.c icp_asym.c
+
+#common includes between all supported OSes
+INCLUDES= -I $(ICP_API_DIR) -I$(ICP_LAC_API) \
+-I$(ICP_OCF_SRC_DIR)
+
+# The location of the os level makefile needs to be changed.
+include $(ICP_ENV_DIR)/$(ICP_OS)_$(ICP_OS_LEVEL).mk
+
+# On the line directly below list the outputs you wish to build for,
+# e.g "lib_static lib_shared exe module" as show below
+install: module
+
+###################Include rules makefiles########################
+include $(ICP_BUILDSYSTEM_PATH)/build_files/rules.mk
+###################End of Rules inclusion#########################
+
+endif
+
+ifdef TOPDIR
+-include $(TOPDIR)/Rules.make
+endif
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/ep80579/icp_common.c
+++ linux-mvl-dove-2.6.32/crypto/ocf/ep80579/icp_common.c
@@ -0,0 +1,891 @@
+/***************************************************************************
+ *
+ * This file is provided under a dual BSD/GPLv2 license.  When using or 
+ *   redistributing this file, you may do so under either license.
+ * 
+ *   GPL LICENSE SUMMARY
+ * 
+ *   Copyright(c) 2007,2008 Intel Corporation. All rights reserved.
+ * 
+ *   This program is free software; you can redistribute it and/or modify 
+ *   it under the terms of version 2 of the GNU General Public License as
+ *   published by the Free Software Foundation.
+ * 
+ *   This program is distributed in the hope that it will be useful, but 
+ *   WITHOUT ANY WARRANTY; without even the implied warranty of 
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU 
+ *   General Public License for more details.
+ * 
+ *   You should have received a copy of the GNU General Public License 
+ *   along with this program; if not, write to the Free Software 
+ *   Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ *   The full GNU General Public License is included in this distribution 
+ *   in the file called LICENSE.GPL.
+ * 
+ *   Contact Information:
+ *   Intel Corporation
+ * 
+ *   BSD LICENSE 
+ * 
+ *   Copyright(c) 2007,2008 Intel Corporation. All rights reserved.
+ *   All rights reserved.
+ * 
+ *   Redistribution and use in source and binary forms, with or without 
+ *   modification, are permitted provided that the following conditions 
+ *   are met:
+ * 
+ *     * Redistributions of source code must retain the above copyright 
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright 
+ *       notice, this list of conditions and the following disclaimer in 
+ *       the documentation and/or other materials provided with the 
+ *       distribution.
+ *     * Neither the name of Intel Corporation nor the names of its 
+ *       contributors may be used to endorse or promote products derived 
+ *       from this software without specific prior written permission.
+ * 
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ *  version: Security.L.1.0.130
+ *
+ ***************************************************************************/
+
+/*
+ * An OCF module that uses Intel® QuickAssist Integrated Accelerator to do the 
+ * crypto.
+ *
+ * This driver requires the ICP Access Library that is available from Intel in
+ * order to operate.
+ */
+
+#include "icp_ocf.h"
+
+#define ICP_OCF_COMP_NAME 			"ICP_OCF"
+#define ICP_OCF_VER_MAIN			(2)
+#define ICP_OCF_VER_MJR				(0)
+#define ICP_OCF_VER_MNR 			(0)
+
+#define MAX_DEREG_RETRIES 			(100)
+#define DEFAULT_DEREG_RETRIES 			(10)
+#define DEFAULT_DEREG_DELAY_IN_JIFFIES		(10)
+
+/* This defines the maximum number of sessions possible between OCF
+   and the OCF Tolapai Driver. If set to zero, there is no limit. */
+#define DEFAULT_OCF_TO_DRV_MAX_SESSION_COUNT	(0)
+#define NUM_SUPPORTED_CAPABILITIES		(21)
+
+/*Slabs zones*/
+struct kmem_cache *drvSessionData_zone = NULL;
+struct kmem_cache *drvOpData_zone = NULL;
+struct kmem_cache *drvDH_zone = NULL;
+struct kmem_cache *drvLnModExp_zone = NULL;
+struct kmem_cache *drvRSADecrypt_zone = NULL;
+struct kmem_cache *drvRSAPrivateKey_zone = NULL;
+struct kmem_cache *drvDSARSSign_zone = NULL;
+struct kmem_cache *drvDSARSSignKValue_zone = NULL;
+struct kmem_cache *drvDSAVerify_zone = NULL;
+
+/*Slab zones for flatbuffers and bufferlist*/
+struct kmem_cache *drvFlatBuffer_zone = NULL;
+
+static int icp_ocfDrvInit(void);
+static void icp_ocfDrvExit(void);
+static void icp_ocfDrvFreeCaches(void);
+static void icp_ocfDrvDeferedFreeLacSessionProcess(void *arg);
+
+int32_t icp_ocfDrvDriverId = INVALID_DRIVER_ID;
+
+/* Module parameter - gives the number of times LAC deregistration shall be
+   re-tried */
+int num_dereg_retries = DEFAULT_DEREG_RETRIES;
+
+/* Module parameter - gives the delay time in jiffies before a LAC session 
+   shall be attempted to be deregistered again */
+int dereg_retry_delay_in_jiffies = DEFAULT_DEREG_DELAY_IN_JIFFIES;
+
+/* Module parameter - gives the maximum number of sessions possible between
+   OCF and the OCF Tolapai Driver. If set to zero, there is no limit.*/
+int max_sessions = DEFAULT_OCF_TO_DRV_MAX_SESSION_COUNT;
+
+/* This is set when the module is removed from the system, no further
+   processing can take place if this is set */
+atomic_t icp_ocfDrvIsExiting = ATOMIC_INIT(0);
+
+/* This is used to show how many lac sessions were not deregistered*/
+atomic_t lac_session_failed_dereg_count = ATOMIC_INIT(0);
+
+/* This is used to track the number of registered sessions between OCF and
+ * and the OCF Tolapai driver, when max_session is set to value other than
+ * zero. This ensures that the max_session set for the OCF and the driver
+ * is equal to the LAC registered sessions */
+atomic_t num_ocf_to_drv_registered_sessions = ATOMIC_INIT(0);
+
+/* Head of linked list used to store session data */
+struct list_head icp_ocfDrvGlobalSymListHead;
+struct list_head icp_ocfDrvGlobalSymListHead_FreeMemList;
+
+spinlock_t icp_ocfDrvSymSessInfoListSpinlock = SPIN_LOCK_UNLOCKED;
+rwlock_t icp_kmem_cache_destroy_alloc_lock = RW_LOCK_UNLOCKED;
+
+struct workqueue_struct *icp_ocfDrvFreeLacSessionWorkQ;
+
+struct icp_drvBuffListInfo defBuffListInfo;
+
+static struct {
+	softc_device_decl sc_dev;
+} icpDev;
+
+static device_method_t icp_methods = {
+	/* crypto device methods */
+	DEVMETHOD(cryptodev_newsession, icp_ocfDrvNewSession),
+	DEVMETHOD(cryptodev_freesession, icp_ocfDrvFreeLACSession),
+	DEVMETHOD(cryptodev_process, icp_ocfDrvSymProcess),
+	DEVMETHOD(cryptodev_kprocess, icp_ocfDrvPkeProcess),
+};
+
+module_param(num_dereg_retries, int, S_IRUGO);
+module_param(dereg_retry_delay_in_jiffies, int, S_IRUGO);
+module_param(max_sessions, int, S_IRUGO);
+
+MODULE_PARM_DESC(num_dereg_retries,
+		 "Number of times to retry LAC Sym Session Deregistration. "
+		 "Default 10, Max 100");
+MODULE_PARM_DESC(dereg_retry_delay_in_jiffies, "Delay in jiffies "
+		 "(added to a schedule() function call) before a LAC Sym "
+		 "Session Dereg is retried. Default 10");
+MODULE_PARM_DESC(max_sessions, "This sets the maximum number of sessions "
+		 "between OCF and this driver. If this value is set to zero, "
+		 "max session count checking is disabled. Default is zero(0)");
+
+/* Name        : icp_ocfDrvInit
+ *
+ * Description : This function will register all the symmetric and asymmetric
+ * functionality that will be accelerated by the hardware. It will also
+ * get a unique driver ID from the OCF and initialise all slab caches
+ */
+static int __init icp_ocfDrvInit(void)
+{
+	int ocfStatus = 0;
+
+	IPRINTK("=== %s ver %d.%d.%d ===\n", ICP_OCF_COMP_NAME,
+		ICP_OCF_VER_MAIN, ICP_OCF_VER_MJR, ICP_OCF_VER_MNR);
+
+	if (MAX_DEREG_RETRIES < num_dereg_retries) {
+		EPRINTK("Session deregistration retry count set to greater "
+			"than %d", MAX_DEREG_RETRIES);
+		return -1;
+	}
+
+	/* Initialize and Start the Cryptographic component */
+	if (CPA_STATUS_SUCCESS !=
+	    cpaCyStartInstance(CPA_INSTANCE_HANDLE_SINGLE)) {
+		EPRINTK("Failed to initialize and start the instance "
+			"of the Cryptographic component.\n");
+		return -1;
+	}
+
+	/* Set the default size of BufferList to allocate */
+	memset(&defBuffListInfo, 0, sizeof(struct icp_drvBuffListInfo));
+	if (ICP_OCF_DRV_STATUS_SUCCESS !=
+	    icp_ocfDrvBufferListMemInfo(ICP_OCF_DRV_DEFAULT_BUFFLIST_ARRAYS,
+					&defBuffListInfo)) {
+		EPRINTK("Failed to get bufferlist memory info.\n");
+		return -1;
+	}
+
+	/*Register OCF Tolapai Driver with OCF */
+	memset(&icpDev, 0, sizeof(icpDev));
+	softc_device_init(&icpDev, "icp", 0, icp_methods);
+
+	icp_ocfDrvDriverId = crypto_get_driverid(softc_get_device(&icpDev),
+						 CRYPTOCAP_F_HARDWARE);
+
+	if (icp_ocfDrvDriverId < 0) {
+		EPRINTK("%s : ICP driver failed to register with OCF!\n",
+			__FUNCTION__);
+		return -ENODEV;
+	}
+
+	/*Create all the slab caches used by the OCF Tolapai Driver */
+	drvSessionData_zone =
+	    ICP_CACHE_CREATE("ICP Session Data", struct icp_drvSessionData);
+	ICP_CACHE_NULL_CHECK(drvSessionData_zone);
+
+	/* 
+	 * Allocation of the OpData includes the allocation space for meta data.
+	 * The memory after the opData structure is reserved for this meta data.
+	 */
+	drvOpData_zone =
+	    kmem_cache_create("ICP Op Data", sizeof(struct icp_drvOpData) +
+	            defBuffListInfo.metaSize ,0, SLAB_HWCACHE_ALIGN, NULL, NULL);
+
+
+	ICP_CACHE_NULL_CHECK(drvOpData_zone);
+
+	drvDH_zone = ICP_CACHE_CREATE("ICP DH data", CpaCyDhPhase1KeyGenOpData);
+	ICP_CACHE_NULL_CHECK(drvDH_zone);
+
+	drvLnModExp_zone =
+	    ICP_CACHE_CREATE("ICP ModExp data", CpaCyLnModExpOpData);
+	ICP_CACHE_NULL_CHECK(drvLnModExp_zone);
+
+	drvRSADecrypt_zone =
+	    ICP_CACHE_CREATE("ICP RSA decrypt data", CpaCyRsaDecryptOpData);
+	ICP_CACHE_NULL_CHECK(drvRSADecrypt_zone);
+
+	drvRSAPrivateKey_zone =
+	    ICP_CACHE_CREATE("ICP RSA private key data", CpaCyRsaPrivateKey);
+	ICP_CACHE_NULL_CHECK(drvRSAPrivateKey_zone);
+
+	drvDSARSSign_zone =
+	    ICP_CACHE_CREATE("ICP DSA Sign", CpaCyDsaRSSignOpData);
+	ICP_CACHE_NULL_CHECK(drvDSARSSign_zone);
+
+	/*too awkward to use a macro here */
+	drvDSARSSignKValue_zone =
+	    kmem_cache_create("ICP DSA Sign Rand Val",
+			      DSA_RS_SIGN_PRIMEQ_SIZE_IN_BYTES, 0,
+			      SLAB_HWCACHE_ALIGN, NULL, NULL);
+	ICP_CACHE_NULL_CHECK(drvDSARSSignKValue_zone);
+
+	drvDSAVerify_zone =
+	    ICP_CACHE_CREATE("ICP DSA Verify", CpaCyDsaVerifyOpData);
+	ICP_CACHE_NULL_CHECK(drvDSAVerify_zone);
+
+	drvFlatBuffer_zone =
+	    ICP_CACHE_CREATE("ICP Flat Buffers", CpaFlatBuffer);
+	ICP_CACHE_NULL_CHECK(drvFlatBuffer_zone);
+
+	/* Register the ICP symmetric crypto support. */
+	ICP_REGISTER_SYM_FUNCTIONALITY_WITH_OCF(CRYPTO_NULL_CBC);
+	ICP_REGISTER_SYM_FUNCTIONALITY_WITH_OCF(CRYPTO_DES_CBC);
+	ICP_REGISTER_SYM_FUNCTIONALITY_WITH_OCF(CRYPTO_3DES_CBC);
+	ICP_REGISTER_SYM_FUNCTIONALITY_WITH_OCF(CRYPTO_AES_CBC);
+	ICP_REGISTER_SYM_FUNCTIONALITY_WITH_OCF(CRYPTO_ARC4);
+	ICP_REGISTER_SYM_FUNCTIONALITY_WITH_OCF(CRYPTO_MD5);
+	ICP_REGISTER_SYM_FUNCTIONALITY_WITH_OCF(CRYPTO_MD5_HMAC);
+	ICP_REGISTER_SYM_FUNCTIONALITY_WITH_OCF(CRYPTO_SHA1);
+	ICP_REGISTER_SYM_FUNCTIONALITY_WITH_OCF(CRYPTO_SHA1_HMAC);
+	ICP_REGISTER_SYM_FUNCTIONALITY_WITH_OCF(CRYPTO_SHA2_256);
+	ICP_REGISTER_SYM_FUNCTIONALITY_WITH_OCF(CRYPTO_SHA2_256_HMAC);
+	ICP_REGISTER_SYM_FUNCTIONALITY_WITH_OCF(CRYPTO_SHA2_384);
+	ICP_REGISTER_SYM_FUNCTIONALITY_WITH_OCF(CRYPTO_SHA2_384_HMAC);
+	ICP_REGISTER_SYM_FUNCTIONALITY_WITH_OCF(CRYPTO_SHA2_512);
+	ICP_REGISTER_SYM_FUNCTIONALITY_WITH_OCF(CRYPTO_SHA2_512_HMAC);
+
+	/* Register the ICP asymmetric algorithm support */
+	ICP_REGISTER_ASYM_FUNCTIONALITY_WITH_OCF(CRK_DH_COMPUTE_KEY);
+	ICP_REGISTER_ASYM_FUNCTIONALITY_WITH_OCF(CRK_MOD_EXP);
+	ICP_REGISTER_ASYM_FUNCTIONALITY_WITH_OCF(CRK_MOD_EXP_CRT);
+	ICP_REGISTER_ASYM_FUNCTIONALITY_WITH_OCF(CRK_DSA_SIGN);
+	ICP_REGISTER_ASYM_FUNCTIONALITY_WITH_OCF(CRK_DSA_VERIFY);
+
+	/* Register the ICP random number generator support */
+	if (OCF_REGISTRATION_STATUS_SUCCESS ==
+	    crypto_rregister(icp_ocfDrvDriverId, icp_ocfDrvReadRandom, NULL)) {
+		ocfStatus++;
+	}
+
+	if (OCF_ZERO_FUNCTIONALITY_REGISTERED == ocfStatus) {
+		DPRINTK("%s: Failed to register any device capabilities\n",
+			__FUNCTION__);
+		icp_ocfDrvFreeCaches();
+		icp_ocfDrvDriverId = INVALID_DRIVER_ID;
+		return -ECANCELED;
+	}
+
+	DPRINTK("%s: Registered %d of %d device capabilities\n",
+		__FUNCTION__, ocfStatus, NUM_SUPPORTED_CAPABILITIES);
+
+/*Session data linked list used during module exit*/
+	INIT_LIST_HEAD(&icp_ocfDrvGlobalSymListHead);
+	INIT_LIST_HEAD(&icp_ocfDrvGlobalSymListHead_FreeMemList);
+
+	icp_ocfDrvFreeLacSessionWorkQ =
+	    create_singlethread_workqueue("ocfLacDeregWorkQueue");
+
+	return 0;
+}
+
+/* Name        : icp_ocfDrvExit
+ *
+ * Description : This function will deregister all the symmetric sessions
+ * registered with the LAC component. It will also deregister all symmetric
+ * and asymmetric functionality that can be accelerated by the hardware via OCF
+ * and random number generation if it is enabled.
+ */
+static void icp_ocfDrvExit(void)
+{
+	CpaStatus lacStatus = CPA_STATUS_SUCCESS;
+	struct icp_drvSessionData *sessionData = NULL;
+	struct icp_drvSessionData *tempSessionData = NULL;
+	int i, remaining_delay_time_in_jiffies = 0;
+	/* There is a possibility of a process or new session command being   */
+	/* sent before this variable is incremented. The aim of this variable */
+	/* is to stop a loop of calls creating a deadlock situation which     */
+	/* would prevent the driver from exiting.                             */
+
+	atomic_inc(&icp_ocfDrvIsExiting);
+
+	/*Existing sessions will be routed to another driver after these calls */
+	crypto_unregister_all(icp_ocfDrvDriverId);
+	crypto_runregister_all(icp_ocfDrvDriverId);
+
+	/*If any sessions are waiting to be deregistered, do that. This also 
+	   flushes the work queue */
+	destroy_workqueue(icp_ocfDrvFreeLacSessionWorkQ);
+
+	/*ENTER CRITICAL SECTION */
+	spin_lock_bh(&icp_ocfDrvSymSessInfoListSpinlock);
+	list_for_each_entry_safe(tempSessionData, sessionData,
+				 &icp_ocfDrvGlobalSymListHead, listNode) {
+		for (i = 0; i < num_dereg_retries; i++) {
+			/*No harm if bad input - LAC will handle error cases */
+			if (ICP_SESSION_RUNNING == tempSessionData->inUse) {
+				lacStatus =
+				    cpaCySymRemoveSession
+				    (CPA_INSTANCE_HANDLE_SINGLE,
+				     tempSessionData->sessHandle);
+				if (CPA_STATUS_SUCCESS == lacStatus) {
+					/* Succesfully deregistered */
+					break;
+				} else if (CPA_STATUS_RETRY != lacStatus) {
+					atomic_inc
+					    (&lac_session_failed_dereg_count);
+					break;
+				}
+
+				/*schedule_timout returns the time left for completion if 
+				 * this task is set to TASK_INTERRUPTIBLE */
+				remaining_delay_time_in_jiffies =
+				    dereg_retry_delay_in_jiffies;
+				while (0 > remaining_delay_time_in_jiffies) {
+					remaining_delay_time_in_jiffies =
+					    schedule_timeout
+					    (remaining_delay_time_in_jiffies);
+				}
+
+				DPRINTK
+				    ("%s(): Retry %d to deregistrate the session\n",
+				     __FUNCTION__, i);
+			}
+		}
+
+		/*remove from current list */
+		list_del(&(tempSessionData->listNode));
+		/*add to free mem linked list */
+		list_add(&(tempSessionData->listNode),
+			 &icp_ocfDrvGlobalSymListHead_FreeMemList);
+
+	}
+
+	/*EXIT CRITICAL SECTION */
+	spin_unlock_bh(&icp_ocfDrvSymSessInfoListSpinlock);
+
+	/*set back to initial values */
+	sessionData = NULL;
+	/*still have a reference in our list! */
+	tempSessionData = NULL;
+	/*free memory */
+	list_for_each_entry_safe(tempSessionData, sessionData,
+				 &icp_ocfDrvGlobalSymListHead_FreeMemList,
+				 listNode) {
+
+		list_del(&(tempSessionData->listNode));
+		/* Free allocated CpaCySymSessionCtx */
+		if (NULL != tempSessionData->sessHandle) {
+			kfree(tempSessionData->sessHandle);
+		}
+		memset(tempSessionData, 0, sizeof(struct icp_drvSessionData));
+		kmem_cache_free(drvSessionData_zone, tempSessionData);
+	}
+
+	if (0 != atomic_read(&lac_session_failed_dereg_count)) {
+		DPRINTK("%s(): %d LAC sessions were not deregistered "
+			"correctly. This is not a clean exit! \n",
+			__FUNCTION__,
+			atomic_read(&lac_session_failed_dereg_count));
+	}
+
+	icp_ocfDrvFreeCaches();
+	icp_ocfDrvDriverId = INVALID_DRIVER_ID;
+
+	/* Shutdown the Cryptographic component */
+	lacStatus = cpaCyStopInstance(CPA_INSTANCE_HANDLE_SINGLE);
+	if (CPA_STATUS_SUCCESS != lacStatus) {
+		DPRINTK("%s(): Failed to stop instance of the "
+			"Cryptographic component.(status == %d)\n",
+			__FUNCTION__, lacStatus);
+	}
+
+}
+
+/* Name        : icp_ocfDrvFreeCaches
+ *
+ * Description : This function deregisters all slab caches
+ */
+static void icp_ocfDrvFreeCaches(void)
+{
+	if (atomic_read(&icp_ocfDrvIsExiting) != CPA_TRUE) {
+		atomic_set(&icp_ocfDrvIsExiting, 1);
+	}
+
+	/*Sym Zones */
+	ICP_CACHE_DESTROY(drvSessionData_zone);
+	ICP_CACHE_DESTROY(drvOpData_zone);
+
+	/*Asym zones */
+	ICP_CACHE_DESTROY(drvDH_zone);
+	ICP_CACHE_DESTROY(drvLnModExp_zone);
+	ICP_CACHE_DESTROY(drvRSADecrypt_zone);
+	ICP_CACHE_DESTROY(drvRSAPrivateKey_zone);
+	ICP_CACHE_DESTROY(drvDSARSSignKValue_zone);
+	ICP_CACHE_DESTROY(drvDSARSSign_zone);
+	ICP_CACHE_DESTROY(drvDSAVerify_zone);
+
+	/*FlatBuffer and BufferList Zones */
+	ICP_CACHE_DESTROY(drvFlatBuffer_zone);
+
+}
+
+/* Name        : icp_ocfDrvDeregRetry
+ *
+ * Description : This function will try to farm the session deregistration
+ * off to a work queue. If it fails, nothing more can be done and it
+ * returns an error
+ */
+
+int icp_ocfDrvDeregRetry(CpaCySymSessionCtx sessionToDeregister)
+{
+	struct icp_ocfDrvFreeLacSession *workstore = NULL;
+
+	DPRINTK("%s(): Retry - Deregistering session (%p)\n",
+		__FUNCTION__, sessionToDeregister);
+
+	/*make sure the session is not available to be allocated during this
+	   process */
+	atomic_inc(&lac_session_failed_dereg_count);
+
+	/*Farm off to work queue */
+	workstore =
+	    kmalloc(sizeof(struct icp_ocfDrvFreeLacSession), GFP_ATOMIC);
+	if (NULL == workstore) {
+		DPRINTK("%s(): unable to free session - no memory available "
+			"for work queue\n", __FUNCTION__);
+		return ENOMEM;
+	}
+
+	workstore->sessionToDeregister = sessionToDeregister;
+
+	INIT_WORK(&(workstore->work), icp_ocfDrvDeferedFreeLacSessionProcess,
+		  workstore);
+	queue_work(icp_ocfDrvFreeLacSessionWorkQ, &(workstore->work));
+
+	return ICP_OCF_DRV_STATUS_SUCCESS;
+
+}
+
+/* Name        : icp_ocfDrvDeferedFreeLacSessionProcess
+ *
+ * Description : This function will retry (module input parameter)
+ * 'num_dereg_retries' times to deregister any symmetric session that recieves a
+ * CPA_STATUS_RETRY message from the LAC component. This function is run in
+ * Thread context because it is called from a worker thread
+ */
+static void icp_ocfDrvDeferedFreeLacSessionProcess(void *arg)
+{
+	struct icp_ocfDrvFreeLacSession *workstore = NULL;
+	CpaCySymSessionCtx sessionToDeregister = NULL;
+	int i = 0;
+	int remaining_delay_time_in_jiffies = 0;
+	CpaStatus lacStatus = CPA_STATUS_SUCCESS;
+
+	workstore = (struct icp_ocfDrvFreeLacSession *)arg;
+	if (NULL == workstore) {
+		DPRINTK("%s() function called with null parameter \n",
+			__FUNCTION__);
+		return;
+	}
+
+	sessionToDeregister = workstore->sessionToDeregister;
+	kfree(workstore);
+
+	/*if exiting, give deregistration one more blast only */
+	if (atomic_read(&icp_ocfDrvIsExiting) == CPA_TRUE) {
+		lacStatus = cpaCySymRemoveSession(CPA_INSTANCE_HANDLE_SINGLE,
+						  sessionToDeregister);
+
+		if (lacStatus != CPA_STATUS_SUCCESS) {
+			DPRINTK("%s() Failed to Dereg LAC session %p "
+				"during module exit\n", __FUNCTION__,
+				sessionToDeregister);
+			return;
+		}
+
+		atomic_dec(&lac_session_failed_dereg_count);
+		return;
+	}
+
+	for (i = 0; i <= num_dereg_retries; i++) {
+		lacStatus = cpaCySymRemoveSession(CPA_INSTANCE_HANDLE_SINGLE,
+						  sessionToDeregister);
+
+		if (lacStatus == CPA_STATUS_SUCCESS) {
+			atomic_dec(&lac_session_failed_dereg_count);
+			return;
+		}
+		if (lacStatus != CPA_STATUS_RETRY) {
+			DPRINTK("%s() Failed to deregister session - lacStatus "
+				" = %d", __FUNCTION__, lacStatus);
+			break;
+		}
+
+		/*schedule_timout returns the time left for completion if this
+		   task is set to TASK_INTERRUPTIBLE */
+		remaining_delay_time_in_jiffies = dereg_retry_delay_in_jiffies;
+		while (0 > remaining_delay_time_in_jiffies) {
+			remaining_delay_time_in_jiffies =
+			    schedule_timeout(remaining_delay_time_in_jiffies);
+		}
+
+	}
+
+	DPRINTK("%s(): Unable to deregister session\n", __FUNCTION__);
+	DPRINTK("%s(): Number of unavailable LAC sessions = %d\n", __FUNCTION__,
+		atomic_read(&lac_session_failed_dereg_count));
+}
+
+/* Name        : icp_ocfDrvPtrAndLenToFlatBuffer 
+ *
+ * Description : This function converts a "pointer and length" buffer 
+ * structure to Fredericksburg Flat Buffer (CpaFlatBuffer) format.
+ *
+ * This function assumes that the data passed in are valid.
+ */
+inline void
+icp_ocfDrvPtrAndLenToFlatBuffer(void *pData, uint32_t len,
+				CpaFlatBuffer * pFlatBuffer)
+{
+	pFlatBuffer->pData = pData;
+	pFlatBuffer->dataLenInBytes = len;
+}
+
+/* Name        : icp_ocfDrvSingleSkBuffToFlatBuffer 
+ *
+ * Description : This function converts a single socket buffer (sk_buff)
+ * structure to a Fredericksburg Flat Buffer (CpaFlatBuffer) format.
+ *
+ * This function assumes that the data passed in are valid.
+ */
+static inline void
+icp_ocfDrvSingleSkBuffToFlatBuffer(struct sk_buff *pSkb,
+				   CpaFlatBuffer * pFlatBuffer)
+{
+	pFlatBuffer->pData = pSkb->data;
+	pFlatBuffer->dataLenInBytes = skb_headlen(pSkb);
+}
+
+/* Name        : icp_ocfDrvSkBuffToBufferList 
+ *
+ * Description : This function converts a socket buffer (sk_buff) structure to
+ * Fredericksburg Scatter/Gather (CpaBufferList) buffer format.
+ *
+ * This function assumes that the bufferlist has been allocated with the correct
+ * number of buffer arrays.
+ * 
+ */
+inline int
+icp_ocfDrvSkBuffToBufferList(struct sk_buff *pSkb, CpaBufferList * bufferList)
+{
+	CpaFlatBuffer *curFlatBuffer = NULL;
+	char *skbuffPageAddr = NULL;
+	struct sk_buff *pCurFrag = NULL;
+	struct skb_shared_info *pShInfo = NULL;
+	uint32_t page_offset = 0, i = 0;
+
+	DPRINTK("%s(): Entry Point\n", __FUNCTION__);
+
+	/*
+	 * In all cases, the first skb needs to be translated to FlatBuffer.
+	 * Perform a buffer translation for the first skbuff
+	 */
+	curFlatBuffer = bufferList->pBuffers;
+	icp_ocfDrvSingleSkBuffToFlatBuffer(pSkb, curFlatBuffer);
+
+	/* Set the userData to point to the original sk_buff */
+	bufferList->pUserData = (void *)pSkb;
+
+	/* We now know we'll have at least one element in the SGL */
+	bufferList->numBuffers = 1;
+
+	if (0 == skb_is_nonlinear(pSkb)) {
+		/* Is a linear buffer - therefore it's a single skbuff */
+		DPRINTK("%s(): Exit Point\n", __FUNCTION__);
+		return ICP_OCF_DRV_STATUS_SUCCESS;
+	}
+
+	curFlatBuffer++;
+	pShInfo = skb_shinfo(pSkb);
+	if (pShInfo->frag_list != NULL && pShInfo->nr_frags != 0) {
+		EPRINTK("%s():"
+			"Translation for a combination of frag_list "
+			"and frags[] array not supported!\n", __FUNCTION__);
+		return ICP_OCF_DRV_STATUS_FAIL;
+	} else if (pShInfo->frag_list != NULL) {
+		/*
+		 * Non linear skbuff supported through frag_list 
+		 * Perform translation for each fragment (sk_buff)
+		 * in the frag_list of the first sk_buff.
+		 */
+		for (pCurFrag = pShInfo->frag_list;
+		     pCurFrag != NULL; pCurFrag = pCurFrag->next) {
+			icp_ocfDrvSingleSkBuffToFlatBuffer(pCurFrag,
+							   curFlatBuffer);
+			curFlatBuffer++;
+			bufferList->numBuffers++;
+		}
+	} else if (pShInfo->nr_frags != 0) {
+		/*
+		 * Perform translation for each fragment in frags array
+		 * and add to the BufferList
+		 */
+		for (i = 0; i < pShInfo->nr_frags; i++) {
+			/* Get the page address and offset of this frag */
+			skbuffPageAddr = (char *)pShInfo->frags[i].page;
+			page_offset = pShInfo->frags[i].page_offset;
+
+			/* Convert a pointer and length to a flat buffer */
+			icp_ocfDrvPtrAndLenToFlatBuffer(skbuffPageAddr +
+							page_offset,
+							pShInfo->frags[i].size,
+							curFlatBuffer);
+			curFlatBuffer++;
+			bufferList->numBuffers++;
+		}
+	} else {
+		EPRINTK("%s():" "Could not recognize skbuff fragments!\n",
+			__FUNCTION__);
+		return ICP_OCF_DRV_STATUS_FAIL;
+	}
+
+	DPRINTK("%s(): Exit Point\n", __FUNCTION__);
+	return ICP_OCF_DRV_STATUS_SUCCESS;
+}
+
+/* Name        : icp_ocfDrvBufferListToSkBuff 
+ *
+ * Description : This function converts a Fredericksburg Scatter/Gather 
+ * (CpaBufferList) buffer format to socket buffer structure.
+ */
+inline int
+icp_ocfDrvBufferListToSkBuff(CpaBufferList * bufferList, struct sk_buff **skb)
+{
+	DPRINTK("%s(): Entry Point\n", __FUNCTION__);
+
+	/* Retrieve the orignal skbuff */
+	*skb = (struct sk_buff *)bufferList->pUserData;
+	if (NULL == *skb) {
+		EPRINTK("%s():"
+			"Error on converting from a BufferList. "
+			"The BufferList does not contain an sk_buff.\n",
+			__FUNCTION__);
+		return ICP_OCF_DRV_STATUS_FAIL;
+	}
+	DPRINTK("%s(): Exit Point\n", __FUNCTION__);
+	return ICP_OCF_DRV_STATUS_SUCCESS;
+}
+
+/* Name        : icp_ocfDrvPtrAndLenToBufferList
+ *
+ * Description : This function converts a "pointer and length" buffer
+ * structure to Fredericksburg Scatter/Gather Buffer (CpaBufferList) format.
+ *
+ * This function assumes that the data passed in are valid.
+ */
+inline void
+icp_ocfDrvPtrAndLenToBufferList(void *pDataIn, uint32_t length,
+				CpaBufferList * pBufferList)
+{
+	pBufferList->numBuffers = 1;
+	pBufferList->pBuffers->pData = pDataIn;
+	pBufferList->pBuffers->dataLenInBytes = length;
+}
+
+/* Name        : icp_ocfDrvBufferListToPtrAndLen
+ *
+ * Description : This function converts Fredericksburg Scatter/Gather Buffer
+ * (CpaBufferList) format to a "pointer and length" buffer structure.
+ *
+ * This function assumes that the data passed in are valid.
+ */
+inline void
+icp_ocfDrvBufferListToPtrAndLen(CpaBufferList * pBufferList,
+				void **ppDataOut, uint32_t * pLength)
+{
+	*ppDataOut = pBufferList->pBuffers->pData;
+	*pLength = pBufferList->pBuffers->dataLenInBytes;
+}
+
+/* Name        : icp_ocfDrvBufferListMemInfo
+ *
+ * Description : This function will set the number of flat buffers in 
+ * bufferlist, the size of memory to allocate for the pPrivateMetaData 
+ * member of the CpaBufferList.
+ */
+int
+icp_ocfDrvBufferListMemInfo(uint16_t numBuffers,
+			    struct icp_drvBuffListInfo *buffListInfo)
+{
+	buffListInfo->numBuffers = numBuffers;
+
+	if (CPA_STATUS_SUCCESS !=
+	    cpaCyBufferListGetMetaSize(CPA_INSTANCE_HANDLE_SINGLE,
+				       buffListInfo->numBuffers,
+				       &(buffListInfo->metaSize))) {
+		EPRINTK("%s() Failed to get buffer list meta size.\n",
+			__FUNCTION__);
+		return ICP_OCF_DRV_STATUS_FAIL;
+	}
+
+	return ICP_OCF_DRV_STATUS_SUCCESS;
+}
+
+/* Name        : icp_ocfDrvGetSkBuffFrags
+ *
+ * Description : This function will determine the number of 
+ * fragments in a socket buffer(sk_buff).
+ */
+inline uint16_t icp_ocfDrvGetSkBuffFrags(struct sk_buff * pSkb)
+{
+	uint16_t numFrags = 0;
+	struct sk_buff *pCurFrag = NULL;
+	struct skb_shared_info *pShInfo = NULL;
+
+	if (NULL == pSkb)
+		return 0;
+
+	numFrags = 1;
+	if (0 == skb_is_nonlinear(pSkb)) {
+		/* Linear buffer - it's a single skbuff */
+		return numFrags;
+	}
+
+	pShInfo = skb_shinfo(pSkb);
+	if (NULL != pShInfo->frag_list && 0 != pShInfo->nr_frags) {
+		EPRINTK("%s(): Combination of frag_list "
+			"and frags[] array not supported!\n", __FUNCTION__);
+		return 0;
+	} else if (0 != pShInfo->nr_frags) {
+		numFrags += pShInfo->nr_frags;
+		return numFrags;
+	} else if (NULL != pShInfo->frag_list) {
+		for (pCurFrag = pShInfo->frag_list;
+		     pCurFrag != NULL; pCurFrag = pCurFrag->next) {
+			numFrags++;
+		}
+		return numFrags;
+	} else {
+		return 0;
+	}
+}
+
+/* Name        : icp_ocfDrvFreeFlatBuffer
+ *
+ * Description : This function will deallocate flat buffer.
+ */
+inline void icp_ocfDrvFreeFlatBuffer(CpaFlatBuffer * pFlatBuffer)
+{
+	if (pFlatBuffer != NULL) {
+		memset(pFlatBuffer, 0, sizeof(CpaFlatBuffer));
+		kmem_cache_free(drvFlatBuffer_zone, pFlatBuffer);
+	}
+}
+
+/* Name        : icp_ocfDrvAllocMetaData
+ *
+ * Description : This function will allocate memory for the
+ * pPrivateMetaData member of CpaBufferList.
+ */
+inline int
+icp_ocfDrvAllocMetaData(CpaBufferList * pBufferList,
+        const struct icp_drvOpData *pOpData)
+{
+	Cpa32U metaSize = 0;
+
+	if (pBufferList->numBuffers <= ICP_OCF_DRV_DEFAULT_BUFFLIST_ARRAYS){
+	    void *pOpDataStartAddr = (void *)pOpData;
+
+	    if (0 == defBuffListInfo.metaSize) {
+			pBufferList->pPrivateMetaData = NULL;
+			return ICP_OCF_DRV_STATUS_SUCCESS;
+		}
+		/*
+		 * The meta data allocation has been included as part of the 
+		 * op data.  It has been pre-allocated in memory just after the
+		 * icp_drvOpData structure.
+		 */
+		pBufferList->pPrivateMetaData = pOpDataStartAddr +
+		        sizeof(struct icp_drvOpData);
+	} else {
+		if (CPA_STATUS_SUCCESS !=
+		    cpaCyBufferListGetMetaSize(CPA_INSTANCE_HANDLE_SINGLE,
+					       pBufferList->numBuffers,
+					       &metaSize)) {
+			EPRINTK("%s() Failed to get buffer list meta size.\n",
+				__FUNCTION__);
+			return ICP_OCF_DRV_STATUS_FAIL;
+		}
+
+		if (0 == metaSize) {
+			pBufferList->pPrivateMetaData = NULL;
+			return ICP_OCF_DRV_STATUS_SUCCESS;
+		}
+
+		pBufferList->pPrivateMetaData = kmalloc(metaSize, GFP_ATOMIC);
+	}
+	if (NULL == pBufferList->pPrivateMetaData) {
+		EPRINTK("%s() Failed to allocate pPrivateMetaData.\n",
+			__FUNCTION__);
+		return ICP_OCF_DRV_STATUS_FAIL;
+	}
+
+	return ICP_OCF_DRV_STATUS_SUCCESS;
+}
+
+/* Name        : icp_ocfDrvFreeMetaData
+ *
+ * Description : This function will deallocate pPrivateMetaData memory.
+ */
+inline void icp_ocfDrvFreeMetaData(CpaBufferList * pBufferList)
+{
+	if (NULL == pBufferList->pPrivateMetaData) {
+		return;
+	}
+
+	/*
+	 * Only free the meta data if the BufferList has more than 
+	 * ICP_OCF_DRV_DEFAULT_BUFFLIST_ARRAYS number of buffers.
+	 * Otherwise, the meta data shall be freed when the icp_drvOpData is
+	 * freed.
+	 */
+	if (ICP_OCF_DRV_DEFAULT_BUFFLIST_ARRAYS < pBufferList->numBuffers){
+		kfree(pBufferList->pPrivateMetaData);
+	}
+}
+
+module_init(icp_ocfDrvInit);
+module_exit(icp_ocfDrvExit);
+MODULE_LICENSE("Dual BSD/GPL");
+MODULE_AUTHOR("Intel");
+MODULE_DESCRIPTION("OCF Driver for Intel Quick Assist crypto acceleration");
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/ep80579/icp_sym.c
+++ linux-mvl-dove-2.6.32/crypto/ocf/ep80579/icp_sym.c
@@ -0,0 +1,1382 @@
+/***************************************************************************
+ *
+ * This file is provided under a dual BSD/GPLv2 license.  When using or 
+ *   redistributing this file, you may do so under either license.
+ * 
+ *   GPL LICENSE SUMMARY
+ * 
+ *   Copyright(c) 2007,2008 Intel Corporation. All rights reserved.
+ * 
+ *   This program is free software; you can redistribute it and/or modify 
+ *   it under the terms of version 2 of the GNU General Public License as
+ *   published by the Free Software Foundation.
+ * 
+ *   This program is distributed in the hope that it will be useful, but 
+ *   WITHOUT ANY WARRANTY; without even the implied warranty of 
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU 
+ *   General Public License for more details.
+ * 
+ *   You should have received a copy of the GNU General Public License 
+ *   along with this program; if not, write to the Free Software 
+ *   Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ *   The full GNU General Public License is included in this distribution 
+ *   in the file called LICENSE.GPL.
+ * 
+ *   Contact Information:
+ *   Intel Corporation
+ * 
+ *   BSD LICENSE 
+ * 
+ *   Copyright(c) 2007,2008 Intel Corporation. All rights reserved.
+ *   All rights reserved.
+ * 
+ *   Redistribution and use in source and binary forms, with or without 
+ *   modification, are permitted provided that the following conditions 
+ *   are met:
+ * 
+ *     * Redistributions of source code must retain the above copyright 
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright 
+ *       notice, this list of conditions and the following disclaimer in 
+ *       the documentation and/or other materials provided with the 
+ *       distribution.
+ *     * Neither the name of Intel Corporation nor the names of its 
+ *       contributors may be used to endorse or promote products derived 
+ *       from this software without specific prior written permission.
+ * 
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ *  version: Security.L.1.0.130
+ *
+ ***************************************************************************/
+/*
+ * An OCF module that uses the API for Intel® QuickAssist Technology to do the
+ * cryptography.
+ *
+ * This driver requires the ICP Access Library that is available from Intel in
+ * order to operate.
+ */
+
+#include "icp_ocf.h"
+
+/*This is the call back function for all symmetric cryptographic processes.
+  Its main functionality is to free driver crypto operation structure and to 
+  call back to OCF*/
+static void
+icp_ocfDrvSymCallBack(void *callbackTag,
+		      CpaStatus status,
+		      const CpaCySymOp operationType,
+		      void *pOpData,
+		      CpaBufferList * pDstBuffer, CpaBoolean verifyResult);
+
+/*This function is used to extract crypto processing information from the OCF
+  inputs, so as that it may be passed onto LAC*/
+static int
+icp_ocfDrvProcessDataSetup(struct icp_drvOpData *drvOpData,
+			   struct cryptodesc *crp_desc);
+
+/*This function checks whether the crp_desc argument pertains to a digest or a
+  cipher operation*/
+static int icp_ocfDrvAlgCheck(struct cryptodesc *crp_desc);
+
+/*This function copies all the passed in session context information and stores
+  it in a LAC context structure*/
+static int
+icp_ocfDrvAlgorithmSetup(struct cryptoini *cri,
+			 CpaCySymSessionSetupData * lacSessCtx);
+
+/*This top level function is used to find a pointer to where a digest is 
+  stored/needs to be inserted. */
+static uint8_t *icp_ocfDrvDigestPointerFind(struct icp_drvOpData *drvOpData,
+					    struct cryptodesc *crp_desc);
+
+/*This function is called when a digest pointer has to be found within a
+  SKBUFF.*/
+static inline uint8_t *icp_ocfDrvSkbuffDigestPointerFind(struct icp_drvOpData
+							 *drvOpData,
+							 int offsetInBytes,
+							 uint32_t
+							 digestSizeInBytes);
+
+/*The following two functions are called if the SKBUFF digest pointer is not 
+  positioned in the linear portion of the buffer (i.e. it is in a linked SKBUFF
+   or page fragment).*/
+/*This function takes care of the page fragment case.*/
+static inline uint8_t *icp_ocfDrvDigestSkbNRFragsCheck(struct sk_buff *skb,
+						       struct skb_shared_info
+						       *skb_shared,
+						       int offsetInBytes,
+						       uint32_t
+						       digestSizeInBytes);
+
+/*This function takes care of the linked list case.*/
+static inline uint8_t *icp_ocfDrvDigestSkbFragListCheck(struct sk_buff *skb,
+							struct skb_shared_info
+							*skb_shared,
+							int offsetInBytes,
+							uint32_t
+							digestSizeInBytes);
+
+/*This function is used to free an OCF->OCF_DRV session object*/
+static void icp_ocfDrvFreeOCFSession(struct icp_drvSessionData *sessionData);
+
+/*max IOV buffs supported in a UIO structure*/
+#define NUM_IOV_SUPPORTED		(1)
+
+/* Name        : icp_ocfDrvSymCallBack
+ *
+ * Description : When this function returns it signifies that the LAC
+ * component has completed the relevant symmetric operation. 
+ *
+ * Notes : The callbackTag is a pointer to an icp_drvOpData. This memory
+ * object was passed to LAC for the cryptographic processing and contains all
+ * the relevant information for cleaning up buffer handles etc. so that the
+ * OCF Tolapai Driver portion of this crypto operation can be fully completed.
+ */
+static void
+icp_ocfDrvSymCallBack(void *callbackTag,
+		      CpaStatus status,
+		      const CpaCySymOp operationType,
+		      void *pOpData,
+		      CpaBufferList * pDstBuffer, CpaBoolean verifyResult)
+{
+	struct cryptop *crp = NULL;
+	struct icp_drvOpData *temp_drvOpData =
+	    (struct icp_drvOpData *)callbackTag;
+	uint64_t *tempBasePtr = NULL;
+	uint32_t tempLen = 0;
+
+	if (NULL == temp_drvOpData) {
+		DPRINTK("%s(): The callback from the LAC component"
+			" has failed due to Null userOpaque data"
+			"(status == %d).\n", __FUNCTION__, status);
+		DPRINTK("%s(): Unable to call OCF back! \n", __FUNCTION__);
+		return;
+	}
+
+	crp = temp_drvOpData->crp;
+	crp->crp_etype = ICP_OCF_DRV_NO_CRYPTO_PROCESS_ERROR;
+
+	if (NULL == pOpData) {
+		DPRINTK("%s(): The callback from the LAC component"
+			" has failed due to Null Symmetric Op data"
+			"(status == %d).\n", __FUNCTION__, status);
+		crp->crp_etype = ECANCELED;
+		crypto_done(crp);
+		return;
+	}
+
+	if (NULL == pDstBuffer) {
+		DPRINTK("%s(): The callback from the LAC component"
+			" has failed due to Null Dst Bufferlist data"
+			"(status == %d).\n", __FUNCTION__, status);
+		crp->crp_etype = ECANCELED;
+		crypto_done(crp);
+		return;
+	}
+
+	if (CPA_STATUS_SUCCESS == status) {
+
+		if (temp_drvOpData->bufferType == CRYPTO_F_SKBUF) {
+			if (ICP_OCF_DRV_STATUS_SUCCESS !=
+			    icp_ocfDrvBufferListToSkBuff(pDstBuffer,
+							 (struct sk_buff **)
+							 &(crp->crp_buf))) {
+				EPRINTK("%s(): BufferList to SkBuff "
+					"conversion error.\n", __FUNCTION__);
+				crp->crp_etype = EPERM;
+			}
+		} else {
+			icp_ocfDrvBufferListToPtrAndLen(pDstBuffer,
+							(void **)&tempBasePtr,
+							&tempLen);
+			crp->crp_olen = (int)tempLen;
+		}
+
+	} else {
+		DPRINTK("%s(): The callback from the LAC component has failed"
+			"(status == %d).\n", __FUNCTION__, status);
+
+		crp->crp_etype = ECANCELED;
+	}
+
+	if (temp_drvOpData->numBufferListArray >
+	    ICP_OCF_DRV_DEFAULT_BUFFLIST_ARRAYS) {
+		kfree(pDstBuffer->pBuffers);
+	}
+	icp_ocfDrvFreeMetaData(pDstBuffer);
+	kmem_cache_free(drvOpData_zone, temp_drvOpData);
+
+	/* Invoke the OCF callback function */
+	crypto_done(crp);
+
+	return;
+}
+
+/* Name        : icp_ocfDrvNewSession 
+ *
+ * Description : This function will create a new Driver<->OCF session
+ *
+ * Notes : LAC session registration happens during the first perform call.
+ * That is the first time we know all information about a given session.
+ */
+int icp_ocfDrvNewSession(device_t dev, uint32_t * sid, struct cryptoini *cri)
+{
+	struct icp_drvSessionData *sessionData = NULL;
+	uint32_t delete_session = 0;
+
+	/* The SID passed in should be our driver ID. We can return the     */
+	/* local ID (LID) which is a unique identifier which we can use     */
+	/* to differentiate between the encrypt/decrypt LAC session handles */
+	if (NULL == sid) {
+		EPRINTK("%s(): Invalid input parameters - NULL sid.\n",
+			__FUNCTION__);
+		return EINVAL;
+	}
+
+	if (NULL == cri) {
+		EPRINTK("%s(): Invalid input parameters - NULL cryptoini.\n",
+			__FUNCTION__);
+		return EINVAL;
+	}
+
+	if (icp_ocfDrvDriverId != *sid) {
+		EPRINTK("%s(): Invalid input parameters - bad driver ID\n",
+			__FUNCTION__);
+		EPRINTK("\t sid = 0x08%p \n \t cri = 0x08%p \n", sid, cri);
+		return EINVAL;
+	}
+
+	sessionData = kmem_cache_zalloc(drvSessionData_zone, GFP_ATOMIC);
+	if (NULL == sessionData) {
+		DPRINTK("%s():No memory for Session Data\n", __FUNCTION__);
+		return ENOMEM;
+	}
+
+	/*ENTER CRITICAL SECTION */
+	spin_lock_bh(&icp_ocfDrvSymSessInfoListSpinlock);
+	/*put this check in the spinlock so no new sessions can be added to the
+	   linked list when we are exiting */
+	if (CPA_TRUE == atomic_read(&icp_ocfDrvIsExiting)) {
+		delete_session++;
+
+	} else if (NO_OCF_TO_DRV_MAX_SESSIONS != max_sessions) {
+		if (atomic_read(&num_ocf_to_drv_registered_sessions) >=
+		    (max_sessions -
+		     atomic_read(&lac_session_failed_dereg_count))) {
+			delete_session++;
+		} else {
+			atomic_inc(&num_ocf_to_drv_registered_sessions);
+			/* Add to session data linked list */
+			list_add(&(sessionData->listNode),
+				 &icp_ocfDrvGlobalSymListHead);
+		}
+
+	} else if (NO_OCF_TO_DRV_MAX_SESSIONS == max_sessions) {
+		list_add(&(sessionData->listNode),
+			 &icp_ocfDrvGlobalSymListHead);
+	}
+
+	sessionData->inUse = ICP_SESSION_INITIALISED;
+
+	/*EXIT CRITICAL SECTION */
+	spin_unlock_bh(&icp_ocfDrvSymSessInfoListSpinlock);
+
+	if (delete_session) {
+		DPRINTK("%s():No Session handles available\n", __FUNCTION__);
+		kmem_cache_free(drvSessionData_zone, sessionData);
+		return EPERM;
+	}
+
+	if (ICP_OCF_DRV_STATUS_SUCCESS !=
+	    icp_ocfDrvAlgorithmSetup(cri, &(sessionData->lacSessCtx))) {
+		DPRINTK("%s():algorithm not supported\n", __FUNCTION__);
+		icp_ocfDrvFreeOCFSession(sessionData);
+		return EINVAL;
+	}
+
+	if (cri->cri_next) {
+		if (cri->cri_next->cri_next != NULL) {
+			DPRINTK("%s():only two chained algorithms supported\n",
+				__FUNCTION__);
+			icp_ocfDrvFreeOCFSession(sessionData);
+			return EPERM;
+		}
+
+		if (ICP_OCF_DRV_STATUS_SUCCESS !=
+		    icp_ocfDrvAlgorithmSetup(cri->cri_next,
+					     &(sessionData->lacSessCtx))) {
+			DPRINTK("%s():second algorithm not supported\n",
+				__FUNCTION__);
+			icp_ocfDrvFreeOCFSession(sessionData);
+			return EINVAL;
+		}
+
+		sessionData->lacSessCtx.symOperation =
+		    CPA_CY_SYM_OP_ALGORITHM_CHAINING;
+	}
+
+	*sid = (uint32_t) sessionData;
+
+	return ICP_OCF_DRV_STATUS_SUCCESS;
+}
+
+/* Name        : icp_ocfDrvAlgorithmSetup
+ *
+ * Description : This function builds the session context data from the
+ * information supplied through OCF. Algorithm chain order and whether the
+ * session is Encrypt/Decrypt can only be found out at perform time however, so
+ * the session is registered with LAC at that time.
+ */
+static int
+icp_ocfDrvAlgorithmSetup(struct cryptoini *cri,
+			 CpaCySymSessionSetupData * lacSessCtx)
+{
+
+	lacSessCtx->sessionPriority = CPA_CY_PRIORITY_NORMAL;
+
+	switch (cri->cri_alg) {
+
+	case CRYPTO_NULL_CBC:
+		DPRINTK("%s(): NULL CBC\n", __FUNCTION__);
+		lacSessCtx->symOperation = CPA_CY_SYM_OP_CIPHER;
+		lacSessCtx->cipherSetupData.cipherAlgorithm =
+		    CPA_CY_SYM_CIPHER_NULL;
+		lacSessCtx->cipherSetupData.cipherKeyLenInBytes =
+		    cri->cri_klen / NUM_BITS_IN_BYTE;
+		lacSessCtx->cipherSetupData.pCipherKey = cri->cri_key;
+		break;
+
+	case CRYPTO_DES_CBC:
+		DPRINTK("%s(): DES CBC\n", __FUNCTION__);
+		lacSessCtx->symOperation = CPA_CY_SYM_OP_CIPHER;
+		lacSessCtx->cipherSetupData.cipherAlgorithm =
+		    CPA_CY_SYM_CIPHER_DES_CBC;
+		lacSessCtx->cipherSetupData.cipherKeyLenInBytes =
+		    cri->cri_klen / NUM_BITS_IN_BYTE;
+		lacSessCtx->cipherSetupData.pCipherKey = cri->cri_key;
+		break;
+
+	case CRYPTO_3DES_CBC:
+		DPRINTK("%s(): 3DES CBC\n", __FUNCTION__);
+		lacSessCtx->symOperation = CPA_CY_SYM_OP_CIPHER;
+		lacSessCtx->cipherSetupData.cipherAlgorithm =
+		    CPA_CY_SYM_CIPHER_3DES_CBC;
+		lacSessCtx->cipherSetupData.cipherKeyLenInBytes =
+		    cri->cri_klen / NUM_BITS_IN_BYTE;
+		lacSessCtx->cipherSetupData.pCipherKey = cri->cri_key;
+		break;
+
+	case CRYPTO_AES_CBC:
+		DPRINTK("%s(): AES CBC\n", __FUNCTION__);
+		lacSessCtx->symOperation = CPA_CY_SYM_OP_CIPHER;
+		lacSessCtx->cipherSetupData.cipherAlgorithm =
+		    CPA_CY_SYM_CIPHER_AES_CBC;
+		lacSessCtx->cipherSetupData.cipherKeyLenInBytes =
+		    cri->cri_klen / NUM_BITS_IN_BYTE;
+		lacSessCtx->cipherSetupData.pCipherKey = cri->cri_key;
+		break;
+
+	case CRYPTO_ARC4:
+		DPRINTK("%s(): ARC4\n", __FUNCTION__);
+		lacSessCtx->symOperation = CPA_CY_SYM_OP_CIPHER;
+		lacSessCtx->cipherSetupData.cipherAlgorithm =
+		    CPA_CY_SYM_CIPHER_ARC4;
+		lacSessCtx->cipherSetupData.cipherKeyLenInBytes =
+		    cri->cri_klen / NUM_BITS_IN_BYTE;
+		lacSessCtx->cipherSetupData.pCipherKey = cri->cri_key;
+		break;
+
+	case CRYPTO_SHA1:
+		DPRINTK("%s(): SHA1\n", __FUNCTION__);
+		lacSessCtx->symOperation = CPA_CY_SYM_OP_HASH;
+		lacSessCtx->hashSetupData.hashAlgorithm = CPA_CY_SYM_HASH_SHA1;
+		lacSessCtx->hashSetupData.hashMode = CPA_CY_SYM_HASH_MODE_PLAIN;
+		lacSessCtx->hashSetupData.digestResultLenInBytes =
+		    (cri->cri_mlen ?
+		     cri->cri_mlen : ICP_SHA1_DIGEST_SIZE_IN_BYTES);
+
+		break;
+
+	case CRYPTO_SHA1_HMAC:
+		DPRINTK("%s(): SHA1_HMAC\n", __FUNCTION__);
+		lacSessCtx->symOperation = CPA_CY_SYM_OP_HASH;
+		lacSessCtx->hashSetupData.hashAlgorithm = CPA_CY_SYM_HASH_SHA1;
+		lacSessCtx->hashSetupData.hashMode = CPA_CY_SYM_HASH_MODE_AUTH;
+		lacSessCtx->hashSetupData.digestResultLenInBytes =
+		    (cri->cri_mlen ?
+		     cri->cri_mlen : ICP_SHA1_DIGEST_SIZE_IN_BYTES);
+		lacSessCtx->hashSetupData.authModeSetupData.authKey =
+		    cri->cri_key;
+		lacSessCtx->hashSetupData.authModeSetupData.authKeyLenInBytes =
+		    cri->cri_klen / NUM_BITS_IN_BYTE;
+		lacSessCtx->hashSetupData.authModeSetupData.aadLenInBytes = 0;
+
+		break;
+
+	case CRYPTO_SHA2_256:
+		DPRINTK("%s(): SHA256\n", __FUNCTION__);
+		lacSessCtx->symOperation = CPA_CY_SYM_OP_HASH;
+		lacSessCtx->hashSetupData.hashAlgorithm =
+		    CPA_CY_SYM_HASH_SHA256;
+		lacSessCtx->hashSetupData.hashMode = CPA_CY_SYM_HASH_MODE_PLAIN;
+		lacSessCtx->hashSetupData.digestResultLenInBytes =
+		    (cri->cri_mlen ?
+		     cri->cri_mlen : ICP_SHA256_DIGEST_SIZE_IN_BYTES);
+
+		break;
+
+	case CRYPTO_SHA2_256_HMAC:
+		DPRINTK("%s(): SHA256_HMAC\n", __FUNCTION__);
+		lacSessCtx->symOperation = CPA_CY_SYM_OP_HASH;
+		lacSessCtx->hashSetupData.hashAlgorithm =
+		    CPA_CY_SYM_HASH_SHA256;
+		lacSessCtx->hashSetupData.hashMode = CPA_CY_SYM_HASH_MODE_AUTH;
+		lacSessCtx->hashSetupData.digestResultLenInBytes =
+		    (cri->cri_mlen ?
+		     cri->cri_mlen : ICP_SHA256_DIGEST_SIZE_IN_BYTES);
+		lacSessCtx->hashSetupData.authModeSetupData.authKey =
+		    cri->cri_key;
+		lacSessCtx->hashSetupData.authModeSetupData.authKeyLenInBytes =
+		    cri->cri_klen / NUM_BITS_IN_BYTE;
+		lacSessCtx->hashSetupData.authModeSetupData.aadLenInBytes = 0;
+
+		break;
+
+	case CRYPTO_SHA2_384:
+		DPRINTK("%s(): SHA384\n", __FUNCTION__);
+		lacSessCtx->symOperation = CPA_CY_SYM_OP_HASH;
+		lacSessCtx->hashSetupData.hashAlgorithm =
+		    CPA_CY_SYM_HASH_SHA384;
+		lacSessCtx->hashSetupData.hashMode = CPA_CY_SYM_HASH_MODE_PLAIN;
+		lacSessCtx->hashSetupData.digestResultLenInBytes =
+		    (cri->cri_mlen ?
+		     cri->cri_mlen : ICP_SHA384_DIGEST_SIZE_IN_BYTES);
+
+		break;
+
+	case CRYPTO_SHA2_384_HMAC:
+		DPRINTK("%s(): SHA384_HMAC\n", __FUNCTION__);
+		lacSessCtx->symOperation = CPA_CY_SYM_OP_HASH;
+		lacSessCtx->hashSetupData.hashAlgorithm =
+		    CPA_CY_SYM_HASH_SHA384;
+		lacSessCtx->hashSetupData.hashMode = CPA_CY_SYM_HASH_MODE_AUTH;
+		lacSessCtx->hashSetupData.digestResultLenInBytes =
+		    (cri->cri_mlen ?
+		     cri->cri_mlen : ICP_SHA384_DIGEST_SIZE_IN_BYTES);
+		lacSessCtx->hashSetupData.authModeSetupData.authKey =
+		    cri->cri_key;
+		lacSessCtx->hashSetupData.authModeSetupData.authKeyLenInBytes =
+		    cri->cri_klen / NUM_BITS_IN_BYTE;
+		lacSessCtx->hashSetupData.authModeSetupData.aadLenInBytes = 0;
+
+		break;
+
+	case CRYPTO_SHA2_512:
+		DPRINTK("%s(): SHA512\n", __FUNCTION__);
+		lacSessCtx->symOperation = CPA_CY_SYM_OP_HASH;
+		lacSessCtx->hashSetupData.hashAlgorithm =
+		    CPA_CY_SYM_HASH_SHA512;
+		lacSessCtx->hashSetupData.hashMode = CPA_CY_SYM_HASH_MODE_PLAIN;
+		lacSessCtx->hashSetupData.digestResultLenInBytes =
+		    (cri->cri_mlen ?
+		     cri->cri_mlen : ICP_SHA512_DIGEST_SIZE_IN_BYTES);
+
+		break;
+
+	case CRYPTO_SHA2_512_HMAC:
+		DPRINTK("%s(): SHA512_HMAC\n", __FUNCTION__);
+		lacSessCtx->symOperation = CPA_CY_SYM_OP_HASH;
+		lacSessCtx->hashSetupData.hashAlgorithm =
+		    CPA_CY_SYM_HASH_SHA512;
+		lacSessCtx->hashSetupData.hashMode = CPA_CY_SYM_HASH_MODE_AUTH;
+		lacSessCtx->hashSetupData.digestResultLenInBytes =
+		    (cri->cri_mlen ?
+		     cri->cri_mlen : ICP_SHA512_DIGEST_SIZE_IN_BYTES);
+		lacSessCtx->hashSetupData.authModeSetupData.authKey =
+		    cri->cri_key;
+		lacSessCtx->hashSetupData.authModeSetupData.authKeyLenInBytes =
+		    cri->cri_klen / NUM_BITS_IN_BYTE;
+		lacSessCtx->hashSetupData.authModeSetupData.aadLenInBytes = 0;
+
+		break;
+
+	case CRYPTO_MD5:
+		DPRINTK("%s(): MD5\n", __FUNCTION__);
+		lacSessCtx->symOperation = CPA_CY_SYM_OP_HASH;
+		lacSessCtx->hashSetupData.hashAlgorithm = CPA_CY_SYM_HASH_MD5;
+		lacSessCtx->hashSetupData.hashMode = CPA_CY_SYM_HASH_MODE_PLAIN;
+		lacSessCtx->hashSetupData.digestResultLenInBytes =
+		    (cri->cri_mlen ?
+		     cri->cri_mlen : ICP_MD5_DIGEST_SIZE_IN_BYTES);
+
+		break;
+
+	case CRYPTO_MD5_HMAC:
+		DPRINTK("%s(): MD5_HMAC\n", __FUNCTION__);
+		lacSessCtx->symOperation = CPA_CY_SYM_OP_HASH;
+		lacSessCtx->hashSetupData.hashAlgorithm = CPA_CY_SYM_HASH_MD5;
+		lacSessCtx->hashSetupData.hashMode = CPA_CY_SYM_HASH_MODE_AUTH;
+		lacSessCtx->hashSetupData.digestResultLenInBytes =
+		    (cri->cri_mlen ?
+		     cri->cri_mlen : ICP_MD5_DIGEST_SIZE_IN_BYTES);
+		lacSessCtx->hashSetupData.authModeSetupData.authKey =
+		    cri->cri_key;
+		lacSessCtx->hashSetupData.authModeSetupData.authKeyLenInBytes =
+		    cri->cri_klen / NUM_BITS_IN_BYTE;
+		lacSessCtx->hashSetupData.authModeSetupData.aadLenInBytes = 0;
+
+		break;
+
+	default:
+		DPRINTK("%s(): ALG Setup FAIL\n", __FUNCTION__);
+		return ICP_OCF_DRV_STATUS_FAIL;
+	}
+
+	return ICP_OCF_DRV_STATUS_SUCCESS;
+}
+
+/* Name        : icp_ocfDrvFreeOCFSession
+ *
+ * Description : This function deletes all existing Session data representing
+ * the Cryptographic session established between OCF and this driver. This
+ * also includes freeing the memory allocated for the session context. The
+ * session object is also removed from the session linked list.
+ */
+static void icp_ocfDrvFreeOCFSession(struct icp_drvSessionData *sessionData)
+{
+
+	sessionData->inUse = ICP_SESSION_DEREGISTERED;
+
+	/*ENTER CRITICAL SECTION */
+	spin_lock_bh(&icp_ocfDrvSymSessInfoListSpinlock);
+
+	if (CPA_TRUE == atomic_read(&icp_ocfDrvIsExiting)) {
+		/*If the Driver is exiting, allow that process to
+		   handle any deletions */
+		/*EXIT CRITICAL SECTION */
+		spin_unlock_bh(&icp_ocfDrvSymSessInfoListSpinlock);
+		return;
+	}
+
+	atomic_dec(&num_ocf_to_drv_registered_sessions);
+
+	list_del(&(sessionData->listNode));
+
+	/*EXIT CRITICAL SECTION */
+	spin_unlock_bh(&icp_ocfDrvSymSessInfoListSpinlock);
+
+	if (NULL != sessionData->sessHandle) {
+		kfree(sessionData->sessHandle);
+	}
+	kmem_cache_free(drvSessionData_zone, sessionData);
+}
+
+/* Name        : icp_ocfDrvFreeLACSession
+ *
+ * Description : This attempts to deregister a LAC session. If it fails, the
+ * deregistation retry function is called.
+ */
+int icp_ocfDrvFreeLACSession(device_t dev, uint64_t sid)
+{
+	CpaCySymSessionCtx sessionToDeregister = NULL;
+	struct icp_drvSessionData *sessionData = NULL;
+	CpaStatus lacStatus = CPA_STATUS_SUCCESS;
+	int retval = 0;
+
+	sessionData = (struct icp_drvSessionData *)CRYPTO_SESID2LID(sid);
+	if (NULL == sessionData) {
+		EPRINTK("%s(): OCF Free session called with Null Session ID.\n",
+			__FUNCTION__);
+		return EINVAL;
+	}
+
+	sessionToDeregister = sessionData->sessHandle;
+
+	if (ICP_SESSION_INITIALISED == sessionData->inUse) {
+		DPRINTK("%s() Session not registered with LAC\n", __FUNCTION__);
+	} else if (NULL == sessionData->sessHandle) {
+		EPRINTK
+		    ("%s(): OCF Free session called with Null Session Handle.\n",
+		     __FUNCTION__);
+		return EINVAL;
+	} else {
+		lacStatus = cpaCySymRemoveSession(CPA_INSTANCE_HANDLE_SINGLE,
+						  sessionToDeregister);
+		if (CPA_STATUS_RETRY == lacStatus) {
+			if (ICP_OCF_DRV_STATUS_SUCCESS !=
+			    icp_ocfDrvDeregRetry(&sessionToDeregister)) {
+				/* the retry function increments the 
+				   dereg failed count */
+				DPRINTK("%s(): LAC failed to deregister the "
+					"session. (localSessionId= %p)\n",
+					__FUNCTION__, sessionToDeregister);
+				retval = EPERM;
+			}
+
+		} else if (CPA_STATUS_SUCCESS != lacStatus) {
+			DPRINTK("%s(): LAC failed to deregister the session. "
+				"localSessionId= %p, lacStatus = %d\n",
+				__FUNCTION__, sessionToDeregister, lacStatus);
+			atomic_inc(&lac_session_failed_dereg_count);
+			retval = EPERM;
+		}
+	}
+
+	icp_ocfDrvFreeOCFSession(sessionData);
+	return retval;
+
+}
+
+/* Name        : icp_ocfDrvAlgCheck 
+ *
+ * Description : This function checks whether the cryptodesc argument pertains
+ * to a sym or hash function
+ */
+static int icp_ocfDrvAlgCheck(struct cryptodesc *crp_desc)
+{
+
+	if (crp_desc->crd_alg == CRYPTO_3DES_CBC ||
+	    crp_desc->crd_alg == CRYPTO_AES_CBC ||
+	    crp_desc->crd_alg == CRYPTO_DES_CBC ||
+	    crp_desc->crd_alg == CRYPTO_NULL_CBC ||
+	    crp_desc->crd_alg == CRYPTO_ARC4) {
+		return ICP_OCF_DRV_ALG_CIPHER;
+	}
+
+	return ICP_OCF_DRV_ALG_HASH;
+}
+
+/* Name        : icp_ocfDrvSymProcess 
+ *
+ * Description : This function will map symmetric functionality calls from OCF
+ * to the LAC API. It will also allocate memory to store the session context.
+ * 
+ * Notes: If it is the first perform call for a given session, then a LAC
+ * session is registered. After the session is registered, no checks as
+ * to whether session paramaters have changed (e.g. alg chain order) are
+ * done.
+ */
+int icp_ocfDrvSymProcess(device_t dev, struct cryptop *crp, int hint)
+{
+	struct icp_drvSessionData *sessionData = NULL;
+	struct icp_drvOpData *drvOpData = NULL;
+	CpaStatus lacStatus = CPA_STATUS_SUCCESS;
+	Cpa32U sessionCtxSizeInBytes = 0;
+	uint16_t numBufferListArray = 0;
+
+	if (NULL == crp) {
+		DPRINTK("%s(): Invalid input parameters, cryptop is NULL\n",
+			__FUNCTION__);
+		return EINVAL;
+	}
+
+	if (NULL == crp->crp_desc) {
+		DPRINTK("%s(): Invalid input parameters, no crp_desc attached "
+			"to crp\n", __FUNCTION__);
+		crp->crp_etype = EINVAL;
+		return EINVAL;
+	}
+
+	if (NULL == crp->crp_buf) {
+		DPRINTK("%s(): Invalid input parameters, no buffer attached "
+			"to crp\n", __FUNCTION__);
+		crp->crp_etype = EINVAL;
+		return EINVAL;
+	}
+
+	if (CPA_TRUE == atomic_read(&icp_ocfDrvIsExiting)) {
+		crp->crp_etype = EFAULT;
+		return EFAULT;
+	}
+
+	sessionData = (struct icp_drvSessionData *)
+	    (CRYPTO_SESID2LID(crp->crp_sid));
+	if (NULL == sessionData) {
+		DPRINTK("%s(): Invalid input parameters, Null Session ID \n",
+			__FUNCTION__);
+		crp->crp_etype = EINVAL;
+		return EINVAL;
+	}
+
+/*If we get a request against a deregisted session, cancel operation*/
+	if (ICP_SESSION_DEREGISTERED == sessionData->inUse) {
+		DPRINTK("%s(): Session ID %d was deregistered \n",
+			__FUNCTION__, (int)(CRYPTO_SESID2LID(crp->crp_sid)));
+		crp->crp_etype = EFAULT;
+		return EFAULT;
+	}
+
+/*If none of the session states are set, then the session structure was either
+  not initialised properly or we are reading from a freed memory area (possible
+  due to OCF batch mode not removing queued requests against deregistered 
+  sessions*/
+	if (ICP_SESSION_INITIALISED != sessionData->inUse &&
+	    ICP_SESSION_RUNNING != sessionData->inUse) {
+		DPRINTK("%s(): Session - ID %d - not properly initialised or "
+			"memory freed back to the kernel \n",
+			__FUNCTION__, (int)(CRYPTO_SESID2LID(crp->crp_sid)));
+		crp->crp_etype = EINVAL;
+		return EINVAL;
+	}
+
+	/*For the below checks, remember error checking is already done in LAC.
+	   We're not validating inputs subsequent to registration */
+	if (sessionData->inUse == ICP_SESSION_INITIALISED) {
+		DPRINTK("%s(): Initialising session\n", __FUNCTION__);
+
+		if (NULL != crp->crp_desc->crd_next) {
+			if (ICP_OCF_DRV_ALG_CIPHER ==
+			    icp_ocfDrvAlgCheck(crp->crp_desc)) {
+
+				sessionData->lacSessCtx.algChainOrder =
+				    CPA_CY_SYM_ALG_CHAIN_ORDER_CIPHER_THEN_HASH;
+
+				if (crp->crp_desc->crd_flags & CRD_F_ENCRYPT) {
+					sessionData->lacSessCtx.cipherSetupData.
+					    cipherDirection =
+					    CPA_CY_SYM_CIPHER_DIRECTION_ENCRYPT;
+				} else {
+					sessionData->lacSessCtx.cipherSetupData.
+					    cipherDirection =
+					    CPA_CY_SYM_CIPHER_DIRECTION_DECRYPT;
+				}
+			} else {
+				sessionData->lacSessCtx.algChainOrder =
+				    CPA_CY_SYM_ALG_CHAIN_ORDER_HASH_THEN_CIPHER;
+
+				if (crp->crp_desc->crd_next->crd_flags &
+				    CRD_F_ENCRYPT) {
+					sessionData->lacSessCtx.cipherSetupData.
+					    cipherDirection =
+					    CPA_CY_SYM_CIPHER_DIRECTION_ENCRYPT;
+				} else {
+					sessionData->lacSessCtx.cipherSetupData.
+					    cipherDirection =
+					    CPA_CY_SYM_CIPHER_DIRECTION_DECRYPT;
+				}
+
+			}
+
+		} else if (ICP_OCF_DRV_ALG_CIPHER ==
+			   icp_ocfDrvAlgCheck(crp->crp_desc)) {
+			if (crp->crp_desc->crd_flags & CRD_F_ENCRYPT) {
+				sessionData->lacSessCtx.cipherSetupData.
+				    cipherDirection =
+				    CPA_CY_SYM_CIPHER_DIRECTION_ENCRYPT;
+			} else {
+				sessionData->lacSessCtx.cipherSetupData.
+				    cipherDirection =
+				    CPA_CY_SYM_CIPHER_DIRECTION_DECRYPT;
+			}
+
+		}
+
+		/*No action required for standalone Auth here */
+
+		/* Allocate memory for SymSessionCtx before the Session Registration */
+		lacStatus =
+		    cpaCySymSessionCtxGetSize(CPA_INSTANCE_HANDLE_SINGLE,
+					      &(sessionData->lacSessCtx),
+					      &sessionCtxSizeInBytes);
+		if (CPA_STATUS_SUCCESS != lacStatus) {
+			EPRINTK("%s(): cpaCySymSessionCtxGetSize failed - %d\n",
+				__FUNCTION__, lacStatus);
+			return EINVAL;
+		}
+		sessionData->sessHandle =
+		    kmalloc(sessionCtxSizeInBytes, GFP_ATOMIC);
+		if (NULL == sessionData->sessHandle) {
+			EPRINTK
+			    ("%s(): Failed to get memory for SymSessionCtx\n",
+			     __FUNCTION__);
+			return ENOMEM;
+		}
+
+		lacStatus = cpaCySymInitSession(CPA_INSTANCE_HANDLE_SINGLE,
+						icp_ocfDrvSymCallBack,
+						&(sessionData->lacSessCtx),
+						sessionData->sessHandle);
+
+		if (CPA_STATUS_SUCCESS != lacStatus) {
+			EPRINTK("%s(): cpaCySymInitSession failed -%d \n",
+				__FUNCTION__, lacStatus);
+			return EFAULT;
+		}
+
+		sessionData->inUse = ICP_SESSION_RUNNING;
+	}
+
+	drvOpData = kmem_cache_zalloc(drvOpData_zone, GFP_ATOMIC);
+	if (NULL == drvOpData) {
+		EPRINTK("%s():Failed to get memory for drvOpData\n",
+			__FUNCTION__);
+		crp->crp_etype = ENOMEM;
+		return ENOMEM;
+	}
+
+	drvOpData->lacOpData.pSessionCtx = sessionData->sessHandle;
+	drvOpData->digestSizeInBytes = sessionData->lacSessCtx.hashSetupData.
+	    digestResultLenInBytes;
+	drvOpData->crp = crp;
+
+	/* Set the default buffer list array memory allocation */
+	drvOpData->srcBuffer.pBuffers = drvOpData->bufferListArray;
+	drvOpData->numBufferListArray = ICP_OCF_DRV_DEFAULT_BUFFLIST_ARRAYS;
+
+	/* 
+	 * Allocate buffer list array memory allocation if the
+	 * data fragment is more than the default allocation
+	 */
+	if (crp->crp_flags & CRYPTO_F_SKBUF) {
+		numBufferListArray = icp_ocfDrvGetSkBuffFrags((struct sk_buff *)
+							      crp->crp_buf);
+		if (ICP_OCF_DRV_DEFAULT_BUFFLIST_ARRAYS < numBufferListArray) {
+			DPRINTK("%s() numBufferListArray more than default\n",
+				__FUNCTION__);
+			drvOpData->srcBuffer.pBuffers = NULL;
+			drvOpData->srcBuffer.pBuffers =
+			    kmalloc(numBufferListArray *
+				    sizeof(CpaFlatBuffer), GFP_ATOMIC);
+			if (NULL == drvOpData->srcBuffer.pBuffers) {
+				EPRINTK("%s() Failed to get memory for "
+					"pBuffers\n", __FUNCTION__);
+				kmem_cache_free(drvOpData_zone, drvOpData);
+				crp->crp_etype = ENOMEM;
+				return ENOMEM;
+			}
+			drvOpData->numBufferListArray = numBufferListArray;
+		}
+	}
+
+	/*
+	 * Check the type of buffer structure we got and convert it into
+	 * CpaBufferList format.
+	 */
+	if (crp->crp_flags & CRYPTO_F_SKBUF) {
+		if (ICP_OCF_DRV_STATUS_SUCCESS !=
+		    icp_ocfDrvSkBuffToBufferList((struct sk_buff *)crp->crp_buf,
+						 &(drvOpData->srcBuffer))) {
+			EPRINTK("%s():Failed to translate from SK_BUF "
+				"to bufferlist\n", __FUNCTION__);
+			crp->crp_etype = EINVAL;
+			goto err;
+		}
+
+		drvOpData->bufferType = CRYPTO_F_SKBUF;
+	} else if (crp->crp_flags & CRYPTO_F_IOV) {
+		/* OCF only supports IOV of one entry. */
+		if (NUM_IOV_SUPPORTED ==
+		    ((struct uio *)(crp->crp_buf))->uio_iovcnt) {
+
+			icp_ocfDrvPtrAndLenToBufferList(((struct uio *)(crp->
+									crp_buf))->
+							uio_iov[0].iov_base,
+							((struct uio *)(crp->
+									crp_buf))->
+							uio_iov[0].iov_len,
+							&(drvOpData->
+							  srcBuffer));
+
+			drvOpData->bufferType = CRYPTO_F_IOV;
+
+		} else {
+			DPRINTK("%s():Unable to handle IOVs with lengths of "
+				"greater than one!\n", __FUNCTION__);
+			crp->crp_etype = EINVAL;
+			goto err;
+		}
+
+	} else {
+		icp_ocfDrvPtrAndLenToBufferList(crp->crp_buf,
+						crp->crp_ilen,
+						&(drvOpData->srcBuffer));
+
+		drvOpData->bufferType = CRYPTO_BUF_CONTIG;
+	}
+
+	if (ICP_OCF_DRV_STATUS_SUCCESS !=
+	    icp_ocfDrvProcessDataSetup(drvOpData, drvOpData->crp->crp_desc)) {
+		crp->crp_etype = EINVAL;
+		goto err;
+	}
+
+	if (drvOpData->crp->crp_desc->crd_next != NULL) {
+		if (icp_ocfDrvProcessDataSetup(drvOpData, drvOpData->crp->
+					       crp_desc->crd_next)) {
+			crp->crp_etype = EINVAL;
+			goto err;
+		}
+
+	}
+
+	/* Allocate srcBuffer's private meta data */
+	if (ICP_OCF_DRV_STATUS_SUCCESS !=
+	    icp_ocfDrvAllocMetaData(&(drvOpData->srcBuffer), drvOpData)) {
+		EPRINTK("%s() icp_ocfDrvAllocMetaData failed\n", __FUNCTION__);
+		memset(&(drvOpData->lacOpData), 0, sizeof(CpaCySymOpData));
+		crp->crp_etype = EINVAL;
+		goto err;
+	}
+
+	/* Perform "in-place" crypto operation */
+	lacStatus = cpaCySymPerformOp(CPA_INSTANCE_HANDLE_SINGLE,
+				      (void *)drvOpData,
+				      &(drvOpData->lacOpData),
+				      &(drvOpData->srcBuffer),
+				      &(drvOpData->srcBuffer),
+				      &(drvOpData->verifyResult));
+	if (CPA_STATUS_RETRY == lacStatus) {
+		DPRINTK("%s(): cpaCySymPerformOp retry, lacStatus = %d\n",
+			__FUNCTION__, lacStatus);
+		memset(&(drvOpData->lacOpData), 0, sizeof(CpaCySymOpData));
+		crp->crp_etype = EINVAL;
+		goto err;
+	}
+	if (CPA_STATUS_SUCCESS != lacStatus) {
+		EPRINTK("%s(): cpaCySymPerformOp failed, lacStatus = %d\n",
+			__FUNCTION__, lacStatus);
+		memset(&(drvOpData->lacOpData), 0, sizeof(CpaCySymOpData));
+		crp->crp_etype = EINVAL;
+		goto err;
+	}
+
+	return 0;		//OCF success status value
+
+      err:
+	if (drvOpData->numBufferListArray > ICP_OCF_DRV_DEFAULT_BUFFLIST_ARRAYS) {
+		kfree(drvOpData->srcBuffer.pBuffers);
+	}
+	icp_ocfDrvFreeMetaData(&(drvOpData->srcBuffer));
+	kmem_cache_free(drvOpData_zone, drvOpData);
+
+	return crp->crp_etype;
+}
+
+/* Name        : icp_ocfDrvProcessDataSetup
+ *
+ * Description : This function will setup all the cryptographic operation data
+ *               that is required by LAC to execute the operation.
+ */
+static int icp_ocfDrvProcessDataSetup(struct icp_drvOpData *drvOpData,
+				      struct cryptodesc *crp_desc)
+{
+	CpaCyRandGenOpData randGenOpData;
+	CpaFlatBuffer randData;
+
+	drvOpData->lacOpData.packetType = CPA_CY_SYM_PACKET_TYPE_FULL;
+
+	/* Convert from the cryptop to the ICP LAC crypto parameters */
+	switch (crp_desc->crd_alg) {
+	case CRYPTO_NULL_CBC:
+		drvOpData->lacOpData.
+		    cryptoStartSrcOffsetInBytes = crp_desc->crd_skip;
+		drvOpData->lacOpData.
+		    messageLenToCipherInBytes = crp_desc->crd_len;
+		drvOpData->verifyResult = CPA_FALSE;
+		drvOpData->lacOpData.ivLenInBytes = NULL_BLOCK_LEN;
+		break;
+	case CRYPTO_DES_CBC:
+		drvOpData->lacOpData.
+		    cryptoStartSrcOffsetInBytes = crp_desc->crd_skip;
+		drvOpData->lacOpData.
+		    messageLenToCipherInBytes = crp_desc->crd_len;
+		drvOpData->verifyResult = CPA_FALSE;
+		drvOpData->lacOpData.ivLenInBytes = DES_BLOCK_LEN;
+		break;
+	case CRYPTO_3DES_CBC:
+		drvOpData->lacOpData.
+		    cryptoStartSrcOffsetInBytes = crp_desc->crd_skip;
+		drvOpData->lacOpData.
+		    messageLenToCipherInBytes = crp_desc->crd_len;
+		drvOpData->verifyResult = CPA_FALSE;
+		drvOpData->lacOpData.ivLenInBytes = DES3_BLOCK_LEN;
+		break;
+	case CRYPTO_ARC4:
+		drvOpData->lacOpData.
+		    cryptoStartSrcOffsetInBytes = crp_desc->crd_skip;
+		drvOpData->lacOpData.
+		    messageLenToCipherInBytes = crp_desc->crd_len;
+		drvOpData->verifyResult = CPA_FALSE;
+		drvOpData->lacOpData.ivLenInBytes = ARC4_COUNTER_LEN;
+		break;
+	case CRYPTO_AES_CBC:
+		drvOpData->lacOpData.
+		    cryptoStartSrcOffsetInBytes = crp_desc->crd_skip;
+		drvOpData->lacOpData.
+		    messageLenToCipherInBytes = crp_desc->crd_len;
+		drvOpData->verifyResult = CPA_FALSE;
+		drvOpData->lacOpData.ivLenInBytes = RIJNDAEL128_BLOCK_LEN;
+		break;
+	case CRYPTO_SHA1:
+	case CRYPTO_SHA1_HMAC:
+	case CRYPTO_SHA2_256:
+	case CRYPTO_SHA2_256_HMAC:
+	case CRYPTO_SHA2_384:
+	case CRYPTO_SHA2_384_HMAC:
+	case CRYPTO_SHA2_512:
+	case CRYPTO_SHA2_512_HMAC:
+	case CRYPTO_MD5:
+	case CRYPTO_MD5_HMAC:
+		drvOpData->lacOpData.
+		    hashStartSrcOffsetInBytes = crp_desc->crd_skip;
+		drvOpData->lacOpData.
+		    messageLenToHashInBytes = crp_desc->crd_len;
+		drvOpData->lacOpData.
+		    pDigestResult =
+		    icp_ocfDrvDigestPointerFind(drvOpData, crp_desc);
+
+		if (NULL == drvOpData->lacOpData.pDigestResult) {
+			DPRINTK("%s(): ERROR - could not calculate "
+				"Digest Result memory address\n", __FUNCTION__);
+			return ICP_OCF_DRV_STATUS_FAIL;
+		}
+
+		drvOpData->lacOpData.digestVerify = CPA_FALSE;
+		break;
+	default:
+		DPRINTK("%s(): Crypto process error - algorithm not "
+			"found \n", __FUNCTION__);
+		return ICP_OCF_DRV_STATUS_FAIL;
+	}
+
+	/* Figure out what the IV is supposed to be */
+	if ((crp_desc->crd_alg == CRYPTO_DES_CBC) ||
+	    (crp_desc->crd_alg == CRYPTO_3DES_CBC) ||
+	    (crp_desc->crd_alg == CRYPTO_AES_CBC)) {
+		/*ARC4 doesn't use an IV */
+		if (crp_desc->crd_flags & CRD_F_IV_EXPLICIT) {
+			/* Explicit IV provided to OCF */
+			drvOpData->lacOpData.pIv = crp_desc->crd_iv;
+		} else {
+			/* IV is not explicitly provided to OCF */
+
+			/* Point the LAC OP Data IV pointer to our allocated
+			   storage location for this session. */
+			drvOpData->lacOpData.pIv = drvOpData->ivData;
+
+			if ((crp_desc->crd_flags & CRD_F_ENCRYPT) &&
+			    ((crp_desc->crd_flags & CRD_F_IV_PRESENT) == 0)) {
+
+				/* Encrypting - need to create IV */
+				randGenOpData.generateBits = CPA_TRUE;
+				randGenOpData.lenInBytes = MAX_IV_LEN_IN_BYTES;
+
+				icp_ocfDrvPtrAndLenToFlatBuffer((Cpa8U *)
+								drvOpData->
+								ivData,
+								MAX_IV_LEN_IN_BYTES,
+								&randData);
+
+				if (CPA_STATUS_SUCCESS !=
+				    cpaCyRandGen(CPA_INSTANCE_HANDLE_SINGLE,
+						 NULL, NULL,
+						 &randGenOpData, &randData)) {
+					DPRINTK("%s(): ERROR - Failed to"
+						" generate"
+						" Initialisation Vector\n",
+						__FUNCTION__);
+					return ICP_OCF_DRV_STATUS_FAIL;
+				}
+
+				crypto_copyback(drvOpData->crp->
+						crp_flags,
+						drvOpData->crp->crp_buf,
+						crp_desc->crd_inject,
+						drvOpData->lacOpData.
+						ivLenInBytes,
+						(caddr_t) (drvOpData->lacOpData.
+							   pIv));
+			} else {
+				/* Reading IV from buffer */
+				crypto_copydata(drvOpData->crp->
+						crp_flags,
+						drvOpData->crp->crp_buf,
+						crp_desc->crd_inject,
+						drvOpData->lacOpData.
+						ivLenInBytes,
+						(caddr_t) (drvOpData->lacOpData.
+							   pIv));
+			}
+
+		}
+
+	}
+
+	return ICP_OCF_DRV_STATUS_SUCCESS;
+}
+
+/* Name        : icp_ocfDrvDigestPointerFind
+ *
+ * Description : This function is used to find the memory address of where the
+ * digest information shall be stored in. Input buffer types are an skbuff, iov
+ * or flat buffer. The address is found using the buffer data start address and
+ * an offset.
+ *
+ * Note: In the case of a linux skbuff, the digest address may exist within
+ * a memory space linked to from the start buffer. These linked memory spaces
+ * must be traversed by the data length offset in order to find the digest start
+ * address. Whether there is enough space for the digest must also be checked.
+ */
+
+static uint8_t *icp_ocfDrvDigestPointerFind(struct icp_drvOpData *drvOpData,
+					    struct cryptodesc *crp_desc)
+{
+
+	int offsetInBytes = crp_desc->crd_inject;
+	uint32_t digestSizeInBytes = drvOpData->digestSizeInBytes;
+	uint8_t *flat_buffer_base = NULL;
+	int flat_buffer_length = 0;
+	struct sk_buff *skb;
+
+	if (drvOpData->crp->crp_flags & CRYPTO_F_SKBUF) {
+		/*check if enough overall space to store hash */
+		skb = (struct sk_buff *)(drvOpData->crp->crp_buf);
+
+		if (skb->len < (offsetInBytes + digestSizeInBytes)) {
+			DPRINTK("%s() Not enough space for Digest"
+				" payload after the offset (%d), "
+				"digest size (%d) \n", __FUNCTION__,
+				offsetInBytes, digestSizeInBytes);
+			return NULL;
+		}
+
+		return icp_ocfDrvSkbuffDigestPointerFind(drvOpData,
+							 offsetInBytes,
+							 digestSizeInBytes);
+
+	} else {
+		/* IOV or flat buffer */
+		if (drvOpData->crp->crp_flags & CRYPTO_F_IOV) {
+			/*single IOV check has already been done */
+			flat_buffer_base = ((struct uio *)
+					    (drvOpData->crp->crp_buf))->
+			    uio_iov[0].iov_base;
+			flat_buffer_length = ((struct uio *)
+					      (drvOpData->crp->crp_buf))->
+			    uio_iov[0].iov_len;
+		} else {
+			flat_buffer_base = (uint8_t *) drvOpData->crp->crp_buf;
+			flat_buffer_length = drvOpData->crp->crp_ilen;
+		}
+
+		if (flat_buffer_length < (offsetInBytes + digestSizeInBytes)) {
+			DPRINTK("%s() Not enough space for Digest "
+				"(IOV/Flat Buffer) \n", __FUNCTION__);
+			return NULL;
+		} else {
+			return (uint8_t *) (flat_buffer_base + offsetInBytes);
+		}
+	}
+	DPRINTK("%s() Should not reach this point\n", __FUNCTION__);
+	return NULL;
+}
+
+/* Name        : icp_ocfDrvSkbuffDigestPointerFind
+ *
+ * Description : This function is used by icp_ocfDrvDigestPointerFind to process
+ * the non-linear portion of the skbuff if the fragmentation type is a linked
+ * list (frag_list is not NULL in the skb_shared_info structure)
+ */
+static inline uint8_t *icp_ocfDrvSkbuffDigestPointerFind(struct icp_drvOpData
+							 *drvOpData,
+							 int offsetInBytes,
+							 uint32_t
+							 digestSizeInBytes)
+{
+
+	struct sk_buff *skb = NULL;
+	struct skb_shared_info *skb_shared = NULL;
+
+	uint32_t skbuffisnonlinear = 0;
+
+	uint32_t skbheadlen = 0;
+
+	skb = (struct sk_buff *)(drvOpData->crp->crp_buf);
+	skbuffisnonlinear = skb_is_nonlinear(skb);
+
+	skbheadlen = skb_headlen(skb);
+
+	/*Linear skb checks */
+	if (skbheadlen > offsetInBytes) {
+
+		if (skbheadlen >= (offsetInBytes + digestSizeInBytes)) {
+			return (uint8_t *) (skb->data + offsetInBytes);
+		} else {
+			DPRINTK("%s() Auth payload stretches "
+				"accross contiguous memory\n", __FUNCTION__);
+			return NULL;
+		}
+	} else {
+		if (skbuffisnonlinear) {
+			offsetInBytes -= skbheadlen;
+		} else {
+			DPRINTK("%s() Offset outside of buffer boundaries\n",
+				__FUNCTION__);
+			return NULL;
+		}
+	}
+
+	/*Non Linear checks */
+	skb_shared = (struct skb_shared_info *)(skb->end);
+	if (unlikely(NULL == skb_shared)) {
+		DPRINTK("%s() skbuff shared info stucture is NULL! \n",
+			__FUNCTION__);
+		return NULL;
+	} else if ((0 != skb_shared->nr_frags) &&
+		   (skb_shared->frag_list != NULL)) {
+		DPRINTK("%s() skbuff nr_frags AND "
+			"frag_list not supported \n", __FUNCTION__);
+		return NULL;
+	}
+
+	/*TCP segmentation more likely than IP fragmentation */
+	if (likely(0 != skb_shared->nr_frags)) {
+		return icp_ocfDrvDigestSkbNRFragsCheck(skb, skb_shared,
+						       offsetInBytes,
+						       digestSizeInBytes);
+	} else if (skb_shared->frag_list != NULL) {
+		return icp_ocfDrvDigestSkbFragListCheck(skb, skb_shared,
+							offsetInBytes,
+							digestSizeInBytes);
+	} else {
+		DPRINTK("%s() skbuff is non-linear but does not show any "
+			"linked data\n", __FUNCTION__);
+		return NULL;
+	}
+
+}
+
+/* Name        : icp_ocfDrvDigestSkbNRFragsCheck
+ *
+ * Description : This function is used by icp_ocfDrvSkbuffDigestPointerFind to
+ * process the non-linear portion of the skbuff, if the fragmentation type is
+ * page fragments
+ */
+static inline uint8_t *icp_ocfDrvDigestSkbNRFragsCheck(struct sk_buff *skb,
+						       struct skb_shared_info
+						       *skb_shared,
+						       int offsetInBytes,
+						       uint32_t
+						       digestSizeInBytes)
+{
+	int i = 0;
+	/*nr_frags starts from 1 */
+	if (MAX_SKB_FRAGS < skb_shared->nr_frags) {
+		DPRINTK("%s error processing skbuff "
+			"page frame -- MAX FRAGS exceeded \n", __FUNCTION__);
+		return NULL;
+	}
+
+	for (i = 0; i < skb_shared->nr_frags; i++) {
+
+		if (offsetInBytes >= skb_shared->frags[i].size) {
+			/*offset still greater than data position */
+			offsetInBytes -= skb_shared->frags[i].size;
+		} else {
+			/* found the page containing start of hash */
+
+			if (NULL == skb_shared->frags[i].page) {
+				DPRINTK("%s() Linked page is NULL!\n",
+					__FUNCTION__);
+				return NULL;
+			}
+
+			if (offsetInBytes + digestSizeInBytes >
+			    skb_shared->frags[i].size) {
+				DPRINTK("%s() Auth payload stretches accross "
+					"contiguous memory\n", __FUNCTION__);
+				return NULL;
+			} else {
+				return (uint8_t *) (skb_shared->frags[i].page +
+						    skb_shared->frags[i].
+						    page_offset +
+						    offsetInBytes);
+			}
+		}
+		/*only possible if internal page sizes are set wrong */
+		if (offsetInBytes < 0) {
+			DPRINTK("%s error processing skbuff page frame "
+				"-- offset calculation \n", __FUNCTION__);
+			return NULL;
+		}
+	}
+	/*only possible if internal page sizes are set wrong */
+	DPRINTK("%s error processing skbuff page frame "
+		"-- ran out of page fragments, remaining offset = %d \n",
+		__FUNCTION__, offsetInBytes);
+	return NULL;
+
+}
+
+/* Name        : icp_ocfDrvDigestSkbFragListCheck
+ *
+ * Description : This function is used by icp_ocfDrvSkbuffDigestPointerFind to 
+ * process the non-linear portion of the skbuff, if the fragmentation type is 
+ * a linked list
+ * 
+ */
+static inline uint8_t *icp_ocfDrvDigestSkbFragListCheck(struct sk_buff *skb,
+							struct skb_shared_info
+							*skb_shared,
+							int offsetInBytes,
+							uint32_t
+							digestSizeInBytes)
+{
+
+	struct sk_buff *skb_list = skb_shared->frag_list;
+	/*check added for readability */
+	if (NULL == skb_list) {
+		DPRINTK("%s error processing skbuff "
+			"-- no more list! \n", __FUNCTION__);
+		return NULL;
+	}
+
+	for (; skb_list; skb_list = skb_list->next) {
+		if (NULL == skb_list) {
+			DPRINTK("%s error processing skbuff "
+				"-- no more list! \n", __FUNCTION__);
+			return NULL;
+		}
+
+		if (offsetInBytes >= skb_list->len) {
+			offsetInBytes -= skb_list->len;
+
+		} else {
+			if (offsetInBytes + digestSizeInBytes > skb_list->len) {
+				DPRINTK("%s() Auth payload stretches accross "
+					"contiguous memory\n", __FUNCTION__);
+				return NULL;
+			} else {
+				return (uint8_t *)
+				    (skb_list->data + offsetInBytes);
+			}
+
+		}
+
+		/*This check is only needed if internal skb_list length values
+		   are set wrong. */
+		if (0 > offsetInBytes) {
+			DPRINTK("%s() error processing skbuff object -- offset "
+				"calculation \n", __FUNCTION__);
+			return NULL;
+		}
+
+	}
+
+	/*catch all for unusual for-loop exit. 
+	   This code should never be reached */
+	DPRINTK("%s() Catch-All hit! Process error.\n", __FUNCTION__);
+	return NULL;
+}
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/pasemi/pasemi.c
+++ linux-mvl-dove-2.6.32/crypto/ocf/pasemi/pasemi.c
@@ -0,0 +1,1009 @@
+/*
+ * Copyright (C) 2007 PA Semi, Inc
+ *
+ * Driver for the PA Semi PWRficient DMA Crypto Engine
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ */
+
+#ifndef AUTOCONF_INCLUDED
+#include <linux/config.h>
+#endif
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/timer.h>
+#include <linux/random.h>
+#include <linux/skbuff.h>
+#include <asm/scatterlist.h>
+#include <linux/moduleparam.h>
+#include <linux/pci.h>
+#include <cryptodev.h>
+#include <uio.h>
+#include "pasemi_fnu.h"
+
+#define DRV_NAME "pasemi"
+
+#define TIMER_INTERVAL 1000
+
+static void __devexit pasemi_dma_remove(struct pci_dev *pdev);
+static struct pasdma_status volatile * dma_status;
+
+static int debug;
+module_param(debug, int, 0644);
+MODULE_PARM_DESC(debug, "Enable debug");
+
+static void pasemi_desc_start(struct pasemi_desc *desc, u64 hdr)
+{
+	desc->postop = 0;
+	desc->quad[0] = hdr;
+	desc->quad_cnt = 1;
+	desc->size = 1;
+}
+
+static void pasemi_desc_build(struct pasemi_desc *desc, u64 val)
+{
+	desc->quad[desc->quad_cnt++] = val;
+	desc->size = (desc->quad_cnt + 1) / 2;
+}
+
+static void pasemi_desc_hdr(struct pasemi_desc *desc, u64 hdr)
+{
+	desc->quad[0] |= hdr;
+}
+
+static int pasemi_desc_size(struct pasemi_desc *desc)
+{
+	return desc->size;
+}
+
+static void pasemi_ring_add_desc(
+				 struct pasemi_fnu_txring *ring,
+				 struct pasemi_desc *desc,
+				 struct cryptop *crp) {
+	int i;
+	int ring_index = 2 * (ring->next_to_fill & (TX_RING_SIZE-1));
+
+	TX_DESC_INFO(ring, ring->next_to_fill).desc_size = desc->size;
+	TX_DESC_INFO(ring, ring->next_to_fill).desc_postop = desc->postop;
+	TX_DESC_INFO(ring, ring->next_to_fill).cf_crp = crp;
+
+	for (i = 0; i < desc->quad_cnt; i += 2) {
+		ring_index = 2 * (ring->next_to_fill & (TX_RING_SIZE-1));
+		ring->desc[ring_index] = desc->quad[i];
+		ring->desc[ring_index + 1] = desc->quad[i + 1];
+		ring->next_to_fill++;
+	}
+
+	if (desc->quad_cnt & 1)
+		ring->desc[ring_index + 1] = 0;
+}
+
+static void pasemi_ring_incr(struct pasemi_softc *sc, int chan_index, int incr)
+{
+	out_le32(sc->dma_regs + PAS_DMA_TXCHAN_INCR(sc->base_chan + chan_index),
+		 incr);
+}
+
+/*
+ * Generate a new software session.
+ */
+static int
+pasemi_newsession(device_t dev, u_int32_t *sidp, struct cryptoini *cri)
+{
+	struct cryptoini *c, *encini = NULL, *macini = NULL;
+	struct pasemi_softc *sc = device_get_softc(dev);
+	struct pasemi_session *ses = NULL, **sespp;
+	int sesn, blksz = 0;
+	u64 ccmd = 0;
+	unsigned long flags;
+	struct pasemi_desc init_desc;
+	struct pasemi_fnu_txring *txring;
+
+	DPRINTF("%s()\n", __FUNCTION__);
+	if (sidp == NULL || cri == NULL || sc == NULL) {
+		DPRINTF("%s,%d - EINVAL\n", __FILE__, __LINE__);
+		return -EINVAL;
+	}
+	for (c = cri; c != NULL; c = c->cri_next) {
+		if (ALG_IS_SIG(c->cri_alg)) {
+			if (macini)
+				return -EINVAL;
+			macini = c;
+		} else if (ALG_IS_CIPHER(c->cri_alg)) {
+			if (encini)
+				return -EINVAL;
+			encini = c;
+		} else {
+			DPRINTF("UNKNOWN c->cri_alg %d\n", c->cri_alg);
+			return -EINVAL;
+		}
+	}
+	if (encini == NULL && macini == NULL)
+		return -EINVAL;
+	if (encini) {
+		/* validate key length */
+		switch (encini->cri_alg) {
+		case CRYPTO_DES_CBC:
+			if (encini->cri_klen != 64)
+				return -EINVAL;
+			ccmd = DMA_CALGO_DES;
+			break;
+		case CRYPTO_3DES_CBC:
+			if (encini->cri_klen != 192)
+				return -EINVAL;
+			ccmd = DMA_CALGO_3DES;
+			break;
+		case CRYPTO_AES_CBC:
+			if (encini->cri_klen != 128 &&
+			    encini->cri_klen != 192 &&
+			    encini->cri_klen != 256)
+				return -EINVAL;
+			ccmd = DMA_CALGO_AES;
+			break;
+		case CRYPTO_ARC4:
+			if (encini->cri_klen != 128)
+				return -EINVAL;
+			ccmd = DMA_CALGO_ARC;
+			break;
+		default:
+			DPRINTF("UNKNOWN encini->cri_alg %d\n",
+				encini->cri_alg);
+			return -EINVAL;
+		}
+	}
+
+	if (macini) {
+		switch (macini->cri_alg) {
+		case CRYPTO_MD5:
+		case CRYPTO_MD5_HMAC:
+			blksz = 16;
+			break;
+		case CRYPTO_SHA1:
+		case CRYPTO_SHA1_HMAC:
+			blksz = 20;
+			break;
+		default:
+			DPRINTF("UNKNOWN macini->cri_alg %d\n",
+				macini->cri_alg);
+			return -EINVAL;
+		}
+		if (((macini->cri_klen + 7) / 8) > blksz) {
+			DPRINTF("key length %d bigger than blksize %d not supported\n",
+				((macini->cri_klen + 7) / 8), blksz);
+			return -EINVAL;
+		}
+	}
+
+	for (sesn = 0; sesn < sc->sc_nsessions; sesn++) {
+		if (sc->sc_sessions[sesn] == NULL) {
+			sc->sc_sessions[sesn] = (struct pasemi_session *)
+				kzalloc(sizeof(struct pasemi_session), GFP_ATOMIC);
+			ses = sc->sc_sessions[sesn];
+			break;
+		} else if (sc->sc_sessions[sesn]->used == 0) {
+			ses = sc->sc_sessions[sesn];
+			break;
+		}
+	}
+
+	if (ses == NULL) {
+		sespp = (struct pasemi_session **)
+			kzalloc(sc->sc_nsessions * 2 *
+				sizeof(struct pasemi_session *), GFP_ATOMIC);
+		if (sespp == NULL)
+			return -ENOMEM;
+		memcpy(sespp, sc->sc_sessions,
+		       sc->sc_nsessions * sizeof(struct pasemi_session *));
+		kfree(sc->sc_sessions);
+		sc->sc_sessions = sespp;
+		sesn = sc->sc_nsessions;
+		ses = sc->sc_sessions[sesn] = (struct pasemi_session *)
+			kzalloc(sizeof(struct pasemi_session), GFP_ATOMIC);
+		if (ses == NULL)
+			return -ENOMEM;
+		sc->sc_nsessions *= 2;
+	}
+
+	ses->used = 1;
+
+	ses->dma_addr = pci_map_single(sc->dma_pdev, (void *) ses->civ,
+				       sizeof(struct pasemi_session), DMA_TO_DEVICE);
+
+	/* enter the channel scheduler */
+	spin_lock_irqsave(&sc->sc_chnlock, flags);
+
+	/* ARC4 has to be processed by the even channel */
+	if (encini && (encini->cri_alg == CRYPTO_ARC4))
+		ses->chan = sc->sc_lastchn & ~1;
+	else
+		ses->chan = sc->sc_lastchn;
+	sc->sc_lastchn = (sc->sc_lastchn + 1) % sc->sc_num_channels;
+
+	spin_unlock_irqrestore(&sc->sc_chnlock, flags);
+
+	txring = &sc->tx[ses->chan];
+
+	if (encini) {
+		ses->ccmd = ccmd;
+
+		/* get an IV */
+		/* XXX may read fewer than requested */
+		get_random_bytes(ses->civ, sizeof(ses->civ));
+
+		ses->keysz = (encini->cri_klen - 63) / 64;
+		memcpy(ses->key, encini->cri_key, (ses->keysz + 1) * 8);
+
+		pasemi_desc_start(&init_desc,
+				  XCT_CTRL_HDR(ses->chan, (encini && macini) ? 0x68 : 0x40, DMA_FN_CIV0));
+		pasemi_desc_build(&init_desc,
+				  XCT_FUN_SRC_PTR((encini && macini) ? 0x68 : 0x40, ses->dma_addr));
+	}
+	if (macini) {
+		if (macini->cri_alg == CRYPTO_MD5_HMAC ||
+		    macini->cri_alg == CRYPTO_SHA1_HMAC)
+			memcpy(ses->hkey, macini->cri_key, blksz);
+		else {
+			/* Load initialization constants(RFC 1321, 3174) */
+			ses->hiv[0] = 0x67452301efcdab89ULL;
+			ses->hiv[1] = 0x98badcfe10325476ULL;
+			ses->hiv[2] = 0xc3d2e1f000000000ULL;
+		}
+		ses->hseq = 0ULL;
+	}
+
+	spin_lock_irqsave(&txring->fill_lock, flags);
+
+	if (((txring->next_to_fill + pasemi_desc_size(&init_desc)) -
+	     txring->next_to_clean) > TX_RING_SIZE) {
+		spin_unlock_irqrestore(&txring->fill_lock, flags);
+		return ERESTART;
+	}
+
+	if (encini) {
+		pasemi_ring_add_desc(txring, &init_desc, NULL);
+		pasemi_ring_incr(sc, ses->chan,
+				 pasemi_desc_size(&init_desc));
+	}
+
+	txring->sesn = sesn;
+	spin_unlock_irqrestore(&txring->fill_lock, flags);
+
+	*sidp = PASEMI_SID(sesn);
+	return 0;
+}
+
+/*
+ * Deallocate a session.
+ */
+static int
+pasemi_freesession(device_t dev, u_int64_t tid)
+{
+	struct pasemi_softc *sc = device_get_softc(dev);
+	int session;
+	u_int32_t sid = ((u_int32_t) tid) & 0xffffffff;
+
+	DPRINTF("%s()\n", __FUNCTION__);
+
+	if (sc == NULL)
+		return -EINVAL;
+	session = PASEMI_SESSION(sid);
+	if (session >= sc->sc_nsessions || !sc->sc_sessions[session])
+		return -EINVAL;
+
+	pci_unmap_single(sc->dma_pdev,
+			 sc->sc_sessions[session]->dma_addr,
+			 sizeof(struct pasemi_session), DMA_TO_DEVICE);
+	memset(sc->sc_sessions[session], 0,
+	       sizeof(struct pasemi_session));
+
+	return 0;
+}
+
+static int
+pasemi_process(device_t dev, struct cryptop *crp, int hint)
+{
+
+	int err = 0, ivsize, srclen = 0, reinit = 0, reinit_size = 0, chsel;
+	struct pasemi_softc *sc = device_get_softc(dev);
+	struct cryptodesc *crd1, *crd2, *maccrd, *enccrd;
+	caddr_t ivp;
+	struct pasemi_desc init_desc, work_desc;
+	struct pasemi_session *ses;
+	struct sk_buff *skb;
+	struct uio *uiop;
+	unsigned long flags;
+	struct pasemi_fnu_txring *txring;
+
+	DPRINTF("%s()\n", __FUNCTION__);
+
+	if (crp == NULL || crp->crp_callback == NULL || sc == NULL)
+		return -EINVAL;
+
+	crp->crp_etype = 0;
+	if (PASEMI_SESSION(crp->crp_sid) >= sc->sc_nsessions)
+		return -EINVAL;
+
+	ses = sc->sc_sessions[PASEMI_SESSION(crp->crp_sid)];
+
+	crd1 = crp->crp_desc;
+	if (crd1 == NULL) {
+		err = -EINVAL;
+		goto errout;
+	}
+	crd2 = crd1->crd_next;
+
+	if (ALG_IS_SIG(crd1->crd_alg)) {
+		maccrd = crd1;
+		if (crd2 == NULL)
+			enccrd = NULL;
+		else if (ALG_IS_CIPHER(crd2->crd_alg) &&
+			 (crd2->crd_flags & CRD_F_ENCRYPT) == 0)
+			enccrd = crd2;
+		else
+			goto erralg;
+	} else if (ALG_IS_CIPHER(crd1->crd_alg)) {
+		enccrd = crd1;
+		if (crd2 == NULL)
+			maccrd = NULL;
+		else if (ALG_IS_SIG(crd2->crd_alg) &&
+			 (crd1->crd_flags & CRD_F_ENCRYPT))
+			maccrd = crd2;
+		else
+			goto erralg;
+	} else
+		goto erralg;
+
+	chsel = ses->chan;
+
+	txring = &sc->tx[chsel];
+
+	if (enccrd && !maccrd) {
+		if (enccrd->crd_alg == CRYPTO_ARC4)
+			reinit = 1;
+		reinit_size = 0x40;
+		srclen = crp->crp_ilen;
+
+		pasemi_desc_start(&work_desc, XCT_FUN_O | XCT_FUN_I
+				  | XCT_FUN_FUN(chsel));
+		if (enccrd->crd_flags & CRD_F_ENCRYPT)
+			pasemi_desc_hdr(&work_desc, XCT_FUN_CRM_ENC);
+		else
+			pasemi_desc_hdr(&work_desc, XCT_FUN_CRM_DEC);
+	} else if (enccrd && maccrd) {
+		if (enccrd->crd_alg == CRYPTO_ARC4)
+			reinit = 1;
+		reinit_size = 0x68;
+
+		if (enccrd->crd_flags & CRD_F_ENCRYPT) {
+			/* Encrypt -> Authenticate */
+			pasemi_desc_start(&work_desc, XCT_FUN_O | XCT_FUN_I | XCT_FUN_CRM_ENC_SIG
+					  | XCT_FUN_A | XCT_FUN_FUN(chsel));
+			srclen = maccrd->crd_skip + maccrd->crd_len;
+		} else {
+			/* Authenticate -> Decrypt */
+			pasemi_desc_start(&work_desc, XCT_FUN_O | XCT_FUN_I | XCT_FUN_CRM_SIG_DEC
+					  | XCT_FUN_24BRES | XCT_FUN_FUN(chsel));
+			pasemi_desc_build(&work_desc, 0);
+			pasemi_desc_build(&work_desc, 0);
+			pasemi_desc_build(&work_desc, 0);
+			work_desc.postop = PASEMI_CHECK_SIG;
+			srclen = crp->crp_ilen;
+		}
+
+		pasemi_desc_hdr(&work_desc, XCT_FUN_SHL(maccrd->crd_skip / 4));
+		pasemi_desc_hdr(&work_desc, XCT_FUN_CHL(enccrd->crd_skip - maccrd->crd_skip));
+	} else if (!enccrd && maccrd) {
+		srclen = maccrd->crd_len;
+
+		pasemi_desc_start(&init_desc,
+				  XCT_CTRL_HDR(chsel, 0x58, DMA_FN_HKEY0));
+		pasemi_desc_build(&init_desc,
+				  XCT_FUN_SRC_PTR(0x58, ((struct pasemi_session *)ses->dma_addr)->hkey));
+
+		pasemi_desc_start(&work_desc, XCT_FUN_O | XCT_FUN_I | XCT_FUN_CRM_SIG
+				  | XCT_FUN_A | XCT_FUN_FUN(chsel));
+	}
+
+	if (enccrd) {
+		switch (enccrd->crd_alg) {
+		case CRYPTO_3DES_CBC:
+			pasemi_desc_hdr(&work_desc, XCT_FUN_ALG_3DES |
+					XCT_FUN_BCM_CBC);
+			ivsize = sizeof(u64);
+			break;
+		case CRYPTO_DES_CBC:
+			pasemi_desc_hdr(&work_desc, XCT_FUN_ALG_DES |
+					XCT_FUN_BCM_CBC);
+			ivsize = sizeof(u64);
+			break;
+		case CRYPTO_AES_CBC:
+			pasemi_desc_hdr(&work_desc, XCT_FUN_ALG_AES |
+					XCT_FUN_BCM_CBC);
+			ivsize = 2 * sizeof(u64);
+			break;
+		case CRYPTO_ARC4:
+			pasemi_desc_hdr(&work_desc, XCT_FUN_ALG_ARC);
+			ivsize = 0;
+			break;
+		default:
+			printk(DRV_NAME ": unimplemented enccrd->crd_alg %d\n",
+			       enccrd->crd_alg);
+			err = -EINVAL;
+			goto errout;
+		}
+
+		ivp = (ivsize == sizeof(u64)) ? (caddr_t) &ses->civ[1] : (caddr_t) &ses->civ[0];
+		if (enccrd->crd_flags & CRD_F_ENCRYPT) {
+			if (enccrd->crd_flags & CRD_F_IV_EXPLICIT)
+				memcpy(ivp, enccrd->crd_iv, ivsize);
+			/* If IV is not present in the buffer already, it has to be copied there */
+			if ((enccrd->crd_flags & CRD_F_IV_PRESENT) == 0)
+				crypto_copyback(crp->crp_flags, crp->crp_buf,
+						enccrd->crd_inject, ivsize, ivp);
+		} else {
+			if (enccrd->crd_flags & CRD_F_IV_EXPLICIT)
+				/* IV is provided expicitly in descriptor */
+				memcpy(ivp, enccrd->crd_iv, ivsize);
+			else
+				/* IV is provided in the packet */
+				crypto_copydata(crp->crp_flags, crp->crp_buf,
+						enccrd->crd_inject, ivsize,
+						ivp);
+		}
+	}
+
+	if (maccrd) {
+		switch (maccrd->crd_alg) {
+		case CRYPTO_MD5:
+			pasemi_desc_hdr(&work_desc, XCT_FUN_SIG_MD5 |
+					XCT_FUN_HSZ((crp->crp_ilen - maccrd->crd_inject) / 4));
+			break;
+		case CRYPTO_SHA1:
+			pasemi_desc_hdr(&work_desc, XCT_FUN_SIG_SHA1 |
+					XCT_FUN_HSZ((crp->crp_ilen - maccrd->crd_inject) / 4));
+			break;
+		case CRYPTO_MD5_HMAC:
+			pasemi_desc_hdr(&work_desc, XCT_FUN_SIG_HMAC_MD5 |
+					XCT_FUN_HSZ((crp->crp_ilen - maccrd->crd_inject) / 4));
+			break;
+		case CRYPTO_SHA1_HMAC:
+			pasemi_desc_hdr(&work_desc, XCT_FUN_SIG_HMAC_SHA1 |
+					XCT_FUN_HSZ((crp->crp_ilen - maccrd->crd_inject) / 4));
+			break;
+		default:
+			printk(DRV_NAME ": unimplemented maccrd->crd_alg %d\n",
+			       maccrd->crd_alg);
+			err = -EINVAL;
+			goto errout;
+		}
+	}
+
+	if (crp->crp_flags & CRYPTO_F_SKBUF) {
+		/* using SKB buffers */
+		skb = (struct sk_buff *)crp->crp_buf;
+		if (skb_shinfo(skb)->nr_frags) {
+			printk(DRV_NAME ": skb frags unimplemented\n");
+			err = -EINVAL;
+			goto errout;
+		}
+		pasemi_desc_build(
+			&work_desc,
+			XCT_FUN_DST_PTR(skb->len, pci_map_single(
+						sc->dma_pdev, skb->data,
+						skb->len, DMA_TO_DEVICE)));
+		pasemi_desc_build(
+			&work_desc,
+			XCT_FUN_SRC_PTR(
+				srclen, pci_map_single(
+					sc->dma_pdev, skb->data,
+					srclen, DMA_TO_DEVICE)));
+		pasemi_desc_hdr(&work_desc, XCT_FUN_LLEN(srclen));
+	} else if (crp->crp_flags & CRYPTO_F_IOV) {
+		/* using IOV buffers */
+		uiop = (struct uio *)crp->crp_buf;
+		if (uiop->uio_iovcnt > 1) {
+			printk(DRV_NAME ": iov frags unimplemented\n");
+			err = -EINVAL;
+			goto errout;
+		}
+
+		/* crp_olen is never set; always use crp_ilen */
+		pasemi_desc_build(
+			&work_desc,
+			XCT_FUN_DST_PTR(crp->crp_ilen, pci_map_single(
+						sc->dma_pdev,
+						uiop->uio_iov->iov_base,
+						crp->crp_ilen, DMA_TO_DEVICE)));
+		pasemi_desc_hdr(&work_desc, XCT_FUN_LLEN(srclen));
+
+		pasemi_desc_build(
+			&work_desc,
+			XCT_FUN_SRC_PTR(srclen, pci_map_single(
+						sc->dma_pdev,
+						uiop->uio_iov->iov_base,
+						srclen, DMA_TO_DEVICE)));
+	} else {
+		/* using contig buffers */
+		pasemi_desc_build(
+			&work_desc,
+			XCT_FUN_DST_PTR(crp->crp_ilen, pci_map_single(
+						sc->dma_pdev,
+						crp->crp_buf,
+						crp->crp_ilen, DMA_TO_DEVICE)));
+		pasemi_desc_build(
+			&work_desc,
+			XCT_FUN_SRC_PTR(srclen, pci_map_single(
+						sc->dma_pdev,
+						crp->crp_buf, srclen,
+						DMA_TO_DEVICE)));
+		pasemi_desc_hdr(&work_desc, XCT_FUN_LLEN(srclen));
+	}
+
+	spin_lock_irqsave(&txring->fill_lock, flags);
+
+	if (txring->sesn != PASEMI_SESSION(crp->crp_sid)) {
+		txring->sesn = PASEMI_SESSION(crp->crp_sid);
+		reinit = 1;
+	}
+
+	if (enccrd) {
+		pasemi_desc_start(&init_desc,
+				  XCT_CTRL_HDR(chsel, reinit ? reinit_size : 0x10, DMA_FN_CIV0));
+		pasemi_desc_build(&init_desc,
+				  XCT_FUN_SRC_PTR(reinit ? reinit_size : 0x10, ses->dma_addr));
+	}
+
+	if (((txring->next_to_fill + pasemi_desc_size(&init_desc) +
+	      pasemi_desc_size(&work_desc)) -
+	     txring->next_to_clean) > TX_RING_SIZE) {
+		spin_unlock_irqrestore(&txring->fill_lock, flags);
+		err = ERESTART;
+		goto errout;
+	}
+
+	pasemi_ring_add_desc(txring, &init_desc, NULL);
+	pasemi_ring_add_desc(txring, &work_desc, crp);
+
+	pasemi_ring_incr(sc, chsel,
+			 pasemi_desc_size(&init_desc) +
+			 pasemi_desc_size(&work_desc));
+
+	spin_unlock_irqrestore(&txring->fill_lock, flags);
+
+	mod_timer(&txring->crypto_timer, jiffies + TIMER_INTERVAL);
+
+	return 0;
+
+erralg:
+	printk(DRV_NAME ": unsupported algorithm or algorithm order alg1 %d alg2 %d\n",
+	       crd1->crd_alg, crd2->crd_alg);
+	err = -EINVAL;
+
+errout:
+	if (err != ERESTART) {
+		crp->crp_etype = err;
+		crypto_done(crp);
+	}
+	return err;
+}
+
+static int pasemi_clean_tx(struct pasemi_softc *sc, int chan)
+{
+	int i, j, ring_idx;
+	struct pasemi_fnu_txring *ring = &sc->tx[chan];
+	u16 delta_cnt;
+	int flags, loops = 10;
+	int desc_size;
+	struct cryptop *crp;
+
+	spin_lock_irqsave(&ring->clean_lock, flags);
+
+	while ((delta_cnt = (dma_status->tx_sta[sc->base_chan + chan]
+			     & PAS_STATUS_PCNT_M) - ring->total_pktcnt)
+	       && loops--) {
+
+		for (i = 0; i < delta_cnt; i++) {
+			desc_size = TX_DESC_INFO(ring, ring->next_to_clean).desc_size;
+			crp = TX_DESC_INFO(ring, ring->next_to_clean).cf_crp;
+			if (crp) {
+				ring_idx = 2 * (ring->next_to_clean & (TX_RING_SIZE-1));
+				if (TX_DESC_INFO(ring, ring->next_to_clean).desc_postop & PASEMI_CHECK_SIG) {
+					/* Need to make sure signature matched,
+					 * if not - return error */
+					if (!(ring->desc[ring_idx + 1] & (1ULL << 63)))
+						crp->crp_etype = -EINVAL;
+				}
+				crypto_done(TX_DESC_INFO(ring,
+							 ring->next_to_clean).cf_crp);
+				TX_DESC_INFO(ring, ring->next_to_clean).cf_crp = NULL;
+				pci_unmap_single(
+					sc->dma_pdev,
+					XCT_PTR_ADDR_LEN(ring->desc[ring_idx + 1]),
+					PCI_DMA_TODEVICE);
+
+				ring->desc[ring_idx] = ring->desc[ring_idx + 1] = 0;
+
+				ring->next_to_clean++;
+				for (j = 1; j < desc_size; j++) {
+					ring_idx = 2 *
+						(ring->next_to_clean &
+						 (TX_RING_SIZE-1));
+					pci_unmap_single(
+						sc->dma_pdev,
+						XCT_PTR_ADDR_LEN(ring->desc[ring_idx]),
+						PCI_DMA_TODEVICE);
+					if (ring->desc[ring_idx + 1])
+						pci_unmap_single(
+							sc->dma_pdev,
+							XCT_PTR_ADDR_LEN(
+								ring->desc[
+									ring_idx + 1]),
+							PCI_DMA_TODEVICE);
+					ring->desc[ring_idx] =
+						ring->desc[ring_idx + 1] = 0;
+					ring->next_to_clean++;
+				}
+			} else {
+				for (j = 0; j < desc_size; j++) {
+					ring_idx = 2 * (ring->next_to_clean & (TX_RING_SIZE-1));
+					ring->desc[ring_idx] =
+						ring->desc[ring_idx + 1] = 0;
+					ring->next_to_clean++;
+				}
+			}
+		}
+
+		ring->total_pktcnt += delta_cnt;
+	}
+	spin_unlock_irqrestore(&ring->clean_lock, flags);
+
+	return 0;
+}
+
+static void sweepup_tx(struct pasemi_softc *sc)
+{
+	int i;
+
+	for (i = 0; i < sc->sc_num_channels; i++)
+		pasemi_clean_tx(sc, i);
+}
+
+static irqreturn_t pasemi_intr(int irq, void *arg, struct pt_regs *regs)
+{
+	struct pasemi_softc *sc = arg;
+	unsigned int reg;
+	int chan = irq - sc->base_irq;
+	int chan_index = sc->base_chan + chan;
+	u64 stat = dma_status->tx_sta[chan_index];
+
+	DPRINTF("%s()\n", __FUNCTION__);
+
+	if (!(stat & PAS_STATUS_CAUSE_M))
+		return IRQ_NONE;
+
+	pasemi_clean_tx(sc, chan);
+
+	stat = dma_status->tx_sta[chan_index];
+
+	reg = PAS_IOB_DMA_TXCH_RESET_PINTC |
+		PAS_IOB_DMA_TXCH_RESET_PCNT(sc->tx[chan].total_pktcnt);
+
+	if (stat & PAS_STATUS_SOFT)
+		reg |= PAS_IOB_DMA_RXCH_RESET_SINTC;
+
+	out_le32(sc->iob_regs + PAS_IOB_DMA_TXCH_RESET(chan_index), reg);
+
+
+	return IRQ_HANDLED;
+}
+
+static int pasemi_dma_setup_tx_resources(struct pasemi_softc *sc, int chan)
+{
+	u32 val;
+	int chan_index = chan + sc->base_chan;
+	int ret;
+	struct pasemi_fnu_txring *ring;
+
+	ring = &sc->tx[chan];
+
+	spin_lock_init(&ring->fill_lock);
+	spin_lock_init(&ring->clean_lock);
+
+	ring->desc_info = kzalloc(sizeof(struct pasemi_desc_info) *
+				  TX_RING_SIZE, GFP_KERNEL);
+	if (!ring->desc_info)
+		return -ENOMEM;
+
+	/* Allocate descriptors */
+	ring->desc = dma_alloc_coherent(&sc->dma_pdev->dev,
+					TX_RING_SIZE *
+					2 * sizeof(u64),
+					&ring->dma, GFP_KERNEL);
+	if (!ring->desc)
+		return -ENOMEM;
+
+	memset((void *) ring->desc, 0, TX_RING_SIZE * 2 * sizeof(u64));
+
+	out_le32(sc->iob_regs + PAS_IOB_DMA_TXCH_RESET(chan_index), 0x30);
+
+	ring->total_pktcnt = 0;
+
+	out_le32(sc->dma_regs + PAS_DMA_TXCHAN_BASEL(chan_index),
+		 PAS_DMA_TXCHAN_BASEL_BRBL(ring->dma));
+
+	val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->dma >> 32);
+	val |= PAS_DMA_TXCHAN_BASEU_SIZ(TX_RING_SIZE >> 2);
+
+	out_le32(sc->dma_regs + PAS_DMA_TXCHAN_BASEU(chan_index), val);
+
+	out_le32(sc->dma_regs + PAS_DMA_TXCHAN_CFG(chan_index),
+		 PAS_DMA_TXCHAN_CFG_TY_FUNC |
+		 PAS_DMA_TXCHAN_CFG_TATTR(chan) |
+		 PAS_DMA_TXCHAN_CFG_WT(2));
+
+	/* enable tx channel */
+	out_le32(sc->dma_regs +
+		 PAS_DMA_TXCHAN_TCMDSTA(chan_index),
+		 PAS_DMA_TXCHAN_TCMDSTA_EN);
+
+	out_le32(sc->iob_regs + PAS_IOB_DMA_TXCH_CFG(chan_index),
+		 PAS_IOB_DMA_TXCH_CFG_CNTTH(1000));
+
+	ring->next_to_fill = 0;
+	ring->next_to_clean = 0;
+
+	snprintf(ring->irq_name, sizeof(ring->irq_name),
+		 "%s%d", "crypto", chan);
+
+	ring->irq = irq_create_mapping(NULL, sc->base_irq + chan);
+	ret = request_irq(ring->irq, (irq_handler_t)
+			  pasemi_intr, IRQF_DISABLED, ring->irq_name, sc);
+	if (ret) {
+		printk(KERN_ERR DRV_NAME ": failed to hook irq %d ret %d\n",
+		       ring->irq, ret);
+		ring->irq = -1;
+		return ret;
+	}
+
+	setup_timer(&ring->crypto_timer, (void *) sweepup_tx, (unsigned long) sc);
+
+	return 0;
+}
+
+static device_method_t pasemi_methods = {
+	/* crypto device methods */
+	DEVMETHOD(cryptodev_newsession,		pasemi_newsession),
+	DEVMETHOD(cryptodev_freesession,	pasemi_freesession),
+	DEVMETHOD(cryptodev_process,		pasemi_process),
+};
+
+/* Set up the crypto device structure, private data,
+ * and anything else we need before we start */
+
+static int __devinit
+pasemi_dma_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
+{
+	struct pasemi_softc *sc;
+	int ret, i;
+
+	DPRINTF(KERN_ERR "%s()\n", __FUNCTION__);
+
+	sc = kzalloc(sizeof(*sc), GFP_KERNEL);
+	if (!sc)
+		return -ENOMEM;
+
+	softc_device_init(sc, DRV_NAME, 1, pasemi_methods);
+
+	pci_set_drvdata(pdev, sc);
+
+	spin_lock_init(&sc->sc_chnlock);
+
+	sc->sc_sessions = (struct pasemi_session **)
+		kzalloc(PASEMI_INITIAL_SESSIONS *
+			sizeof(struct pasemi_session *), GFP_ATOMIC);
+	if (sc->sc_sessions == NULL) {
+		ret = -ENOMEM;
+		goto out;
+	}
+
+	sc->sc_nsessions = PASEMI_INITIAL_SESSIONS;
+	sc->sc_lastchn = 0;
+	sc->base_irq = pdev->irq + 6;
+	sc->base_chan = 6;
+	sc->sc_cid = -1;
+	sc->dma_pdev = pdev;
+
+	sc->iob_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa001, NULL);
+	if (!sc->iob_pdev) {
+		dev_err(&pdev->dev, "Can't find I/O Bridge\n");
+		ret = -ENODEV;
+		goto out;
+	}
+
+	/* This is hardcoded and ugly, but we have some firmware versions
+	 * who don't provide the register space in the device tree. Luckily
+	 * they are at well-known locations so we can just do the math here.
+	 */
+	sc->dma_regs =
+		ioremap(0xe0000000 + (sc->dma_pdev->devfn << 12), 0x2000);
+	sc->iob_regs =
+		ioremap(0xe0000000 + (sc->iob_pdev->devfn << 12), 0x2000);
+	if (!sc->dma_regs || !sc->iob_regs) {
+		dev_err(&pdev->dev, "Can't map registers\n");
+		ret = -ENODEV;
+		goto out;
+	}
+
+	dma_status = __ioremap(0xfd800000, 0x1000, 0);
+	if (!dma_status) {
+		ret = -ENODEV;
+		dev_err(&pdev->dev, "Can't map dmastatus space\n");
+		goto out;
+	}
+
+	sc->tx = (struct pasemi_fnu_txring *)
+		kzalloc(sizeof(struct pasemi_fnu_txring)
+			* 8, GFP_KERNEL);
+	if (!sc->tx) {
+		ret = -ENOMEM;
+		goto out;
+	}
+
+	/* Initialize the h/w */
+	out_le32(sc->dma_regs + PAS_DMA_COM_CFG,
+		 (in_le32(sc->dma_regs + PAS_DMA_COM_CFG) |
+		  PAS_DMA_COM_CFG_FWF));
+	out_le32(sc->dma_regs + PAS_DMA_COM_TXCMD, PAS_DMA_COM_TXCMD_EN);
+
+	for (i = 0; i < PASEMI_FNU_CHANNELS; i++) {
+		sc->sc_num_channels++;
+		ret = pasemi_dma_setup_tx_resources(sc, i);
+		if (ret)
+			goto out;
+	}
+
+	sc->sc_cid = crypto_get_driverid(softc_get_device(sc),
+					 CRYPTOCAP_F_HARDWARE);
+	if (sc->sc_cid < 0) {
+		printk(KERN_ERR DRV_NAME ": could not get crypto driver id\n");
+		ret = -ENXIO;
+		goto out;
+	}
+
+	/* register algorithms with the framework */
+	printk(DRV_NAME ":");
+
+	crypto_register(sc->sc_cid, CRYPTO_DES_CBC, 0, 0);
+	crypto_register(sc->sc_cid, CRYPTO_3DES_CBC, 0, 0);
+	crypto_register(sc->sc_cid, CRYPTO_AES_CBC, 0, 0);
+	crypto_register(sc->sc_cid, CRYPTO_ARC4, 0, 0);
+	crypto_register(sc->sc_cid, CRYPTO_SHA1, 0, 0);
+	crypto_register(sc->sc_cid, CRYPTO_MD5, 0, 0);
+	crypto_register(sc->sc_cid, CRYPTO_SHA1_HMAC, 0, 0);
+	crypto_register(sc->sc_cid, CRYPTO_MD5_HMAC, 0, 0);
+
+	return 0;
+
+out:
+	pasemi_dma_remove(pdev);
+	return ret;
+}
+
+#define MAX_RETRIES 5000
+
+static void pasemi_free_tx_resources(struct pasemi_softc *sc, int chan)
+{
+	struct pasemi_fnu_txring *ring = &sc->tx[chan];
+	int chan_index = chan + sc->base_chan;
+	int retries;
+	u32 stat;
+
+	/* Stop the channel */
+	out_le32(sc->dma_regs +
+		 PAS_DMA_TXCHAN_TCMDSTA(chan_index),
+		 PAS_DMA_TXCHAN_TCMDSTA_ST);
+
+	for (retries = 0; retries < MAX_RETRIES; retries++) {
+		stat = in_le32(sc->dma_regs +
+			       PAS_DMA_TXCHAN_TCMDSTA(chan_index));
+		if (!(stat & PAS_DMA_TXCHAN_TCMDSTA_ACT))
+			break;
+		cond_resched();
+	}
+
+	if (stat & PAS_DMA_TXCHAN_TCMDSTA_ACT)
+		dev_err(&sc->dma_pdev->dev, "Failed to stop tx channel %d\n",
+			chan_index);
+
+	/* Disable the channel */
+	out_le32(sc->dma_regs +
+		 PAS_DMA_TXCHAN_TCMDSTA(chan_index),
+		 0);
+
+	if (ring->desc_info)
+		kfree((void *) ring->desc_info);
+	if (ring->desc)
+		dma_free_coherent(&sc->dma_pdev->dev,
+				  TX_RING_SIZE *
+				  2 * sizeof(u64),
+				  (void *) ring->desc, ring->dma);
+	if (ring->irq != -1)
+		free_irq(ring->irq, sc);
+
+	del_timer(&ring->crypto_timer);
+}
+
+static void __devexit pasemi_dma_remove(struct pci_dev *pdev)
+{
+	struct pasemi_softc *sc = pci_get_drvdata(pdev);
+	int i;
+
+	DPRINTF("%s()\n", __FUNCTION__);
+
+	if (sc->sc_cid >= 0) {
+		crypto_unregister_all(sc->sc_cid);
+	}
+
+	if (sc->tx) {
+		for (i = 0; i < sc->sc_num_channels; i++)
+			pasemi_free_tx_resources(sc, i);
+
+		kfree(sc->tx);
+	}
+	if (sc->sc_sessions) {
+		for (i = 0; i < sc->sc_nsessions; i++)
+			kfree(sc->sc_sessions[i]);
+		kfree(sc->sc_sessions);
+	}
+	if (sc->iob_pdev)
+		pci_dev_put(sc->iob_pdev);
+	if (sc->dma_regs)
+		iounmap(sc->dma_regs);
+	if (sc->iob_regs)
+		iounmap(sc->iob_regs);
+	kfree(sc);
+}
+
+static struct pci_device_id pasemi_dma_pci_tbl[] = {
+	{ PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa007) },
+};
+
+MODULE_DEVICE_TABLE(pci, pasemi_dma_pci_tbl);
+
+static struct pci_driver pasemi_dma_driver = {
+	.name		= "pasemi_dma",
+	.id_table	= pasemi_dma_pci_tbl,
+	.probe		= pasemi_dma_probe,
+	.remove		= __devexit_p(pasemi_dma_remove),
+};
+
+static void __exit pasemi_dma_cleanup_module(void)
+{
+	pci_unregister_driver(&pasemi_dma_driver);
+	__iounmap(dma_status);
+	dma_status = NULL;
+}
+
+int pasemi_dma_init_module(void)
+{
+	return pci_register_driver(&pasemi_dma_driver);
+}
+
+module_init(pasemi_dma_init_module);
+module_exit(pasemi_dma_cleanup_module);
+
+MODULE_LICENSE("Dual BSD/GPL");
+MODULE_AUTHOR("Egor Martovetsky egor@pasemi.com");
+MODULE_DESCRIPTION("OCF driver for PA Semi PWRficient DMA Crypto Engine");
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/pasemi/Makefile
+++ linux-mvl-dove-2.6.32/crypto/ocf/pasemi/Makefile
@@ -0,0 +1,12 @@
+# for SGlinux builds
+-include $(ROOTDIR)/modules/.config
+
+obj-$(CONFIG_OCF_PASEMI) += pasemi.o
+
+obj ?= .
+EXTRA_CFLAGS += -I$(obj)/.. -I$(obj)/
+
+ifdef TOPDIR
+-include $(TOPDIR)/Rules.make
+endif
+
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/pasemi/pasemi_fnu.h
+++ linux-mvl-dove-2.6.32/crypto/ocf/pasemi/pasemi_fnu.h
@@ -0,0 +1,410 @@
+/*
+ * Copyright (C) 2007 PA Semi, Inc
+ *
+ * Driver for the PA Semi PWRficient DMA Crypto Engine, soft state and
+ * hardware register layouts.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ */
+
+#ifndef PASEMI_FNU_H
+#define PASEMI_FNU_H
+
+#include <linux/spinlock.h>
+
+#define	PASEMI_SESSION(sid)	((sid) & 0xffffffff)
+#define	PASEMI_SID(sesn)	((sesn) & 0xffffffff)
+#define	DPRINTF(a...)	if (debug) { printk(DRV_NAME ": " a); }
+
+/* Must be a power of two */
+#define RX_RING_SIZE 512
+#define TX_RING_SIZE 512
+#define TX_DESC(ring, num)	((ring)->desc[2 * (num & (TX_RING_SIZE-1))])
+#define TX_DESC_INFO(ring, num)	((ring)->desc_info[(num) & (TX_RING_SIZE-1)])
+#define MAX_DESC_SIZE 8
+#define PASEMI_INITIAL_SESSIONS 10
+#define PASEMI_FNU_CHANNELS 8
+
+/* DMA descriptor */
+struct pasemi_desc {
+	u64 quad[2*MAX_DESC_SIZE];
+	int quad_cnt;
+	int size;
+	int postop;
+};
+
+/*
+ * Holds per descriptor data
+ */
+struct pasemi_desc_info {
+	int			desc_size;
+	int			desc_postop;
+#define PASEMI_CHECK_SIG 0x1
+
+	struct cryptop          *cf_crp;
+};
+
+/*
+ * Holds per channel data
+ */
+struct pasemi_fnu_txring {
+	volatile u64		*desc;
+	volatile struct
+	pasemi_desc_info	*desc_info;
+	dma_addr_t		dma;
+	struct timer_list       crypto_timer;
+	spinlock_t		fill_lock;
+	spinlock_t		clean_lock;
+	unsigned int		next_to_fill;
+	unsigned int		next_to_clean;
+	u16			total_pktcnt;
+	int			irq;
+	int			sesn;
+	char			irq_name[10];
+};
+
+/*
+ * Holds data specific to a single pasemi device.
+ */
+struct pasemi_softc {
+	softc_device_decl	sc_cdev;
+	struct pci_dev		*dma_pdev;	/* device backpointer */
+	struct pci_dev		*iob_pdev;	/* device backpointer */
+	void __iomem		*dma_regs;
+	void __iomem		*iob_regs;
+	int			base_irq;
+	int			base_chan;
+	int32_t			sc_cid;		/* crypto tag */
+	int			sc_nsessions;
+	struct pasemi_session	**sc_sessions;
+	int			sc_num_channels;/* number of crypto channels */
+
+	/* pointer to the array of txring datastructures, one txring per channel */
+	struct pasemi_fnu_txring *tx;
+
+	/*
+	 * mutual exclusion for the channel scheduler
+	 */
+	spinlock_t		sc_chnlock;
+	/* last channel used, for now use round-robin to allocate channels */
+	int			sc_lastchn;
+};
+
+struct pasemi_session {
+	u64 civ[2];
+	u64 keysz;
+	u64 key[4];
+	u64 ccmd;
+	u64 hkey[4];
+	u64 hseq;
+	u64 giv[2];
+	u64 hiv[4];
+
+	int used;
+	dma_addr_t	dma_addr;
+	int chan;
+};
+
+/* status register layout in IOB region, at 0xfd800000 */
+struct pasdma_status {
+	u64 rx_sta[64];
+	u64 tx_sta[20];
+};
+
+#define ALG_IS_CIPHER(alg) ((alg == CRYPTO_DES_CBC)		|| \
+				(alg == CRYPTO_3DES_CBC)	|| \
+				(alg == CRYPTO_AES_CBC)		|| \
+				(alg == CRYPTO_ARC4)		|| \
+				(alg == CRYPTO_NULL_CBC))
+
+#define ALG_IS_SIG(alg) ((alg == CRYPTO_MD5)			|| \
+				(alg == CRYPTO_MD5_HMAC)	|| \
+				(alg == CRYPTO_SHA1)		|| \
+				(alg == CRYPTO_SHA1_HMAC)	|| \
+				(alg == CRYPTO_NULL_HMAC))
+
+enum {
+	PAS_DMA_COM_TXCMD = 0x100,	/* Transmit Command Register  */
+	PAS_DMA_COM_TXSTA = 0x104,	/* Transmit Status Register   */
+	PAS_DMA_COM_RXCMD = 0x108,	/* Receive Command Register   */
+	PAS_DMA_COM_RXSTA = 0x10c,	/* Receive Status Register    */
+	PAS_DMA_COM_CFG   = 0x114,	/* DMA Configuration Register */
+};
+
+/* All these registers live in the PCI configuration space for the DMA PCI
+ * device. Use the normal PCI config access functions for them.
+ */
+
+#define PAS_DMA_COM_CFG_FWF	0x18000000
+
+#define PAS_DMA_COM_TXCMD_EN	0x00000001 /* enable */
+#define PAS_DMA_COM_TXSTA_ACT	0x00000001 /* active */
+#define PAS_DMA_COM_RXCMD_EN	0x00000001 /* enable */
+#define PAS_DMA_COM_RXSTA_ACT	0x00000001 /* active */
+
+#define _PAS_DMA_TXCHAN_STRIDE	0x20    /* Size per channel		*/
+#define _PAS_DMA_TXCHAN_TCMDSTA	0x300	/* Command / Status		*/
+#define _PAS_DMA_TXCHAN_CFG	0x304	/* Configuration		*/
+#define _PAS_DMA_TXCHAN_DSCRBU	0x308	/* Descriptor BU Allocation	*/
+#define _PAS_DMA_TXCHAN_INCR	0x310	/* Descriptor increment		*/
+#define _PAS_DMA_TXCHAN_CNT	0x314	/* Descriptor count/offset	*/
+#define _PAS_DMA_TXCHAN_BASEL	0x318	/* Descriptor ring base (low)	*/
+#define _PAS_DMA_TXCHAN_BASEU	0x31c	/*			(high)	*/
+#define PAS_DMA_TXCHAN_TCMDSTA(c) (0x300+(c)*_PAS_DMA_TXCHAN_STRIDE)
+#define    PAS_DMA_TXCHAN_TCMDSTA_EN	0x00000001	/* Enabled */
+#define    PAS_DMA_TXCHAN_TCMDSTA_ST	0x00000002	/* Stop interface */
+#define    PAS_DMA_TXCHAN_TCMDSTA_ACT	0x00010000	/* Active */
+#define PAS_DMA_TXCHAN_CFG(c)     (0x304+(c)*_PAS_DMA_TXCHAN_STRIDE)
+#define    PAS_DMA_TXCHAN_CFG_TY_FUNC	0x00000002	/* Type = interface */
+#define    PAS_DMA_TXCHAN_CFG_TY_IFACE	0x00000000	/* Type = interface */
+#define    PAS_DMA_TXCHAN_CFG_TATTR_M	0x0000003c
+#define    PAS_DMA_TXCHAN_CFG_TATTR_S	2
+#define    PAS_DMA_TXCHAN_CFG_TATTR(x)	(((x) << PAS_DMA_TXCHAN_CFG_TATTR_S) & \
+					 PAS_DMA_TXCHAN_CFG_TATTR_M)
+#define    PAS_DMA_TXCHAN_CFG_WT_M	0x000001c0
+#define    PAS_DMA_TXCHAN_CFG_WT_S	6
+#define    PAS_DMA_TXCHAN_CFG_WT(x)	(((x) << PAS_DMA_TXCHAN_CFG_WT_S) & \
+					 PAS_DMA_TXCHAN_CFG_WT_M)
+#define    PAS_DMA_TXCHAN_CFG_LPSQ_FAST	0x00000400
+#define    PAS_DMA_TXCHAN_CFG_LPDQ_FAST	0x00000800
+#define    PAS_DMA_TXCHAN_CFG_CF	0x00001000	/* Clean first line */
+#define    PAS_DMA_TXCHAN_CFG_CL	0x00002000	/* Clean last line */
+#define    PAS_DMA_TXCHAN_CFG_UP	0x00004000	/* update tx descr when sent */
+#define PAS_DMA_TXCHAN_INCR(c)    (0x310+(c)*_PAS_DMA_TXCHAN_STRIDE)
+#define PAS_DMA_TXCHAN_BASEL(c)   (0x318+(c)*_PAS_DMA_TXCHAN_STRIDE)
+#define    PAS_DMA_TXCHAN_BASEL_BRBL_M	0xffffffc0
+#define    PAS_DMA_TXCHAN_BASEL_BRBL_S	0
+#define    PAS_DMA_TXCHAN_BASEL_BRBL(x)	(((x) << PAS_DMA_TXCHAN_BASEL_BRBL_S) & \
+					 PAS_DMA_TXCHAN_BASEL_BRBL_M)
+#define PAS_DMA_TXCHAN_BASEU(c)   (0x31c+(c)*_PAS_DMA_TXCHAN_STRIDE)
+#define    PAS_DMA_TXCHAN_BASEU_BRBH_M	0x00000fff
+#define    PAS_DMA_TXCHAN_BASEU_BRBH_S	0
+#define    PAS_DMA_TXCHAN_BASEU_BRBH(x)	(((x) << PAS_DMA_TXCHAN_BASEU_BRBH_S) & \
+					 PAS_DMA_TXCHAN_BASEU_BRBH_M)
+/* # of cache lines worth of buffer ring */
+#define    PAS_DMA_TXCHAN_BASEU_SIZ_M	0x3fff0000
+#define    PAS_DMA_TXCHAN_BASEU_SIZ_S	16		/* 0 = 16K */
+#define    PAS_DMA_TXCHAN_BASEU_SIZ(x)	(((x) << PAS_DMA_TXCHAN_BASEU_SIZ_S) & \
+					 PAS_DMA_TXCHAN_BASEU_SIZ_M)
+
+#define    PAS_STATUS_PCNT_M		0x000000000000ffffull
+#define    PAS_STATUS_PCNT_S		0
+#define    PAS_STATUS_DCNT_M		0x00000000ffff0000ull
+#define    PAS_STATUS_DCNT_S		16
+#define    PAS_STATUS_BPCNT_M		0x0000ffff00000000ull
+#define    PAS_STATUS_BPCNT_S		32
+#define    PAS_STATUS_CAUSE_M		0xf000000000000000ull
+#define    PAS_STATUS_TIMER		0x1000000000000000ull
+#define    PAS_STATUS_ERROR		0x2000000000000000ull
+#define    PAS_STATUS_SOFT		0x4000000000000000ull
+#define    PAS_STATUS_INT		0x8000000000000000ull
+
+#define PAS_IOB_DMA_RXCH_CFG(i)		(0x1100 + (i)*4)
+#define    PAS_IOB_DMA_RXCH_CFG_CNTTH_M		0x00000fff
+#define    PAS_IOB_DMA_RXCH_CFG_CNTTH_S		0
+#define    PAS_IOB_DMA_RXCH_CFG_CNTTH(x)	(((x) << PAS_IOB_DMA_RXCH_CFG_CNTTH_S) & \
+						 PAS_IOB_DMA_RXCH_CFG_CNTTH_M)
+#define PAS_IOB_DMA_TXCH_CFG(i)		(0x1200 + (i)*4)
+#define    PAS_IOB_DMA_TXCH_CFG_CNTTH_M		0x00000fff
+#define    PAS_IOB_DMA_TXCH_CFG_CNTTH_S		0
+#define    PAS_IOB_DMA_TXCH_CFG_CNTTH(x)	(((x) << PAS_IOB_DMA_TXCH_CFG_CNTTH_S) & \
+						 PAS_IOB_DMA_TXCH_CFG_CNTTH_M)
+#define PAS_IOB_DMA_RXCH_STAT(i)	(0x1300 + (i)*4)
+#define    PAS_IOB_DMA_RXCH_STAT_INTGEN	0x00001000
+#define    PAS_IOB_DMA_RXCH_STAT_CNTDEL_M	0x00000fff
+#define    PAS_IOB_DMA_RXCH_STAT_CNTDEL_S	0
+#define    PAS_IOB_DMA_RXCH_STAT_CNTDEL(x)	(((x) << PAS_IOB_DMA_RXCH_STAT_CNTDEL_S) &\
+						 PAS_IOB_DMA_RXCH_STAT_CNTDEL_M)
+#define PAS_IOB_DMA_TXCH_STAT(i)	(0x1400 + (i)*4)
+#define    PAS_IOB_DMA_TXCH_STAT_INTGEN	0x00001000
+#define    PAS_IOB_DMA_TXCH_STAT_CNTDEL_M	0x00000fff
+#define    PAS_IOB_DMA_TXCH_STAT_CNTDEL_S	0
+#define    PAS_IOB_DMA_TXCH_STAT_CNTDEL(x)	(((x) << PAS_IOB_DMA_TXCH_STAT_CNTDEL_S) &\
+						 PAS_IOB_DMA_TXCH_STAT_CNTDEL_M)
+#define PAS_IOB_DMA_RXCH_RESET(i)	(0x1500 + (i)*4)
+#define    PAS_IOB_DMA_RXCH_RESET_PCNT_M	0xffff0000
+#define    PAS_IOB_DMA_RXCH_RESET_PCNT_S	16
+#define    PAS_IOB_DMA_RXCH_RESET_PCNT(x)	(((x) << PAS_IOB_DMA_RXCH_RESET_PCNT_S) & \
+						 PAS_IOB_DMA_RXCH_RESET_PCNT_M)
+#define    PAS_IOB_DMA_RXCH_RESET_PCNTRST	0x00000020
+#define    PAS_IOB_DMA_RXCH_RESET_DCNTRST	0x00000010
+#define    PAS_IOB_DMA_RXCH_RESET_TINTC		0x00000008
+#define    PAS_IOB_DMA_RXCH_RESET_DINTC		0x00000004
+#define    PAS_IOB_DMA_RXCH_RESET_SINTC		0x00000002
+#define    PAS_IOB_DMA_RXCH_RESET_PINTC		0x00000001
+#define PAS_IOB_DMA_TXCH_RESET(i)	(0x1600 + (i)*4)
+#define    PAS_IOB_DMA_TXCH_RESET_PCNT_M	0xffff0000
+#define    PAS_IOB_DMA_TXCH_RESET_PCNT_S	16
+#define    PAS_IOB_DMA_TXCH_RESET_PCNT(x)	(((x) << PAS_IOB_DMA_TXCH_RESET_PCNT_S) & \
+						 PAS_IOB_DMA_TXCH_RESET_PCNT_M)
+#define    PAS_IOB_DMA_TXCH_RESET_PCNTRST	0x00000020
+#define    PAS_IOB_DMA_TXCH_RESET_DCNTRST	0x00000010
+#define    PAS_IOB_DMA_TXCH_RESET_TINTC		0x00000008
+#define    PAS_IOB_DMA_TXCH_RESET_DINTC		0x00000004
+#define    PAS_IOB_DMA_TXCH_RESET_SINTC		0x00000002
+#define    PAS_IOB_DMA_TXCH_RESET_PINTC		0x00000001
+
+#define PAS_IOB_DMA_COM_TIMEOUTCFG		0x1700
+#define    PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT_M	0x00ffffff
+#define    PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT_S	0
+#define    PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(x)	(((x) << PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT_S) & \
+						 PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT_M)
+
+/* Transmit descriptor fields */
+#define	XCT_MACTX_T		0x8000000000000000ull
+#define	XCT_MACTX_ST		0x4000000000000000ull
+#define XCT_MACTX_NORES		0x0000000000000000ull
+#define XCT_MACTX_8BRES		0x1000000000000000ull
+#define XCT_MACTX_24BRES	0x2000000000000000ull
+#define XCT_MACTX_40BRES	0x3000000000000000ull
+#define XCT_MACTX_I		0x0800000000000000ull
+#define XCT_MACTX_O		0x0400000000000000ull
+#define XCT_MACTX_E		0x0200000000000000ull
+#define XCT_MACTX_VLAN_M	0x0180000000000000ull
+#define XCT_MACTX_VLAN_NOP	0x0000000000000000ull
+#define XCT_MACTX_VLAN_REMOVE	0x0080000000000000ull
+#define XCT_MACTX_VLAN_INSERT   0x0100000000000000ull
+#define XCT_MACTX_VLAN_REPLACE  0x0180000000000000ull
+#define XCT_MACTX_CRC_M		0x0060000000000000ull
+#define XCT_MACTX_CRC_NOP	0x0000000000000000ull
+#define XCT_MACTX_CRC_INSERT	0x0020000000000000ull
+#define XCT_MACTX_CRC_PAD	0x0040000000000000ull
+#define XCT_MACTX_CRC_REPLACE	0x0060000000000000ull
+#define XCT_MACTX_SS		0x0010000000000000ull
+#define XCT_MACTX_LLEN_M	0x00007fff00000000ull
+#define XCT_MACTX_LLEN_S	32ull
+#define XCT_MACTX_LLEN(x)	((((long)(x)) << XCT_MACTX_LLEN_S) & \
+				 XCT_MACTX_LLEN_M)
+#define XCT_MACTX_IPH_M		0x00000000f8000000ull
+#define XCT_MACTX_IPH_S		27ull
+#define XCT_MACTX_IPH(x)	((((long)(x)) << XCT_MACTX_IPH_S) & \
+				 XCT_MACTX_IPH_M)
+#define XCT_MACTX_IPO_M		0x0000000007c00000ull
+#define XCT_MACTX_IPO_S		22ull
+#define XCT_MACTX_IPO(x)	((((long)(x)) << XCT_MACTX_IPO_S) & \
+				 XCT_MACTX_IPO_M)
+#define XCT_MACTX_CSUM_M	0x0000000000000060ull
+#define XCT_MACTX_CSUM_NOP	0x0000000000000000ull
+#define XCT_MACTX_CSUM_TCP	0x0000000000000040ull
+#define XCT_MACTX_CSUM_UDP	0x0000000000000060ull
+#define XCT_MACTX_V6		0x0000000000000010ull
+#define XCT_MACTX_C		0x0000000000000004ull
+#define XCT_MACTX_AL2		0x0000000000000002ull
+
+#define XCT_PTR_T		0x8000000000000000ull
+#define XCT_PTR_LEN_M		0x7ffff00000000000ull
+#define XCT_PTR_LEN_S		44
+#define XCT_PTR_LEN(x)		((((long)(x)) << XCT_PTR_LEN_S) & \
+				 XCT_PTR_LEN_M)
+#define XCT_PTR_ADDR_M		0x00000fffffffffffull
+#define XCT_PTR_ADDR_S		0
+#define XCT_PTR_ADDR(x)		((((long)(x)) << XCT_PTR_ADDR_S) & \
+				 XCT_PTR_ADDR_M)
+
+/* Function descriptor fields */
+#define	XCT_FUN_T		0x8000000000000000ull
+#define	XCT_FUN_ST		0x4000000000000000ull
+#define XCT_FUN_NORES		0x0000000000000000ull
+#define XCT_FUN_8BRES		0x1000000000000000ull
+#define XCT_FUN_24BRES		0x2000000000000000ull
+#define XCT_FUN_40BRES		0x3000000000000000ull
+#define XCT_FUN_I		0x0800000000000000ull
+#define XCT_FUN_O		0x0400000000000000ull
+#define XCT_FUN_E		0x0200000000000000ull
+#define XCT_FUN_FUN_S		54
+#define XCT_FUN_FUN_M		0x01c0000000000000ull
+#define XCT_FUN_FUN(num)	((((long)(num)) << XCT_FUN_FUN_S) & \
+				XCT_FUN_FUN_M)
+#define XCT_FUN_CRM_NOP		0x0000000000000000ull
+#define XCT_FUN_CRM_SIG		0x0008000000000000ull
+#define XCT_FUN_CRM_ENC		0x0010000000000000ull
+#define XCT_FUN_CRM_DEC		0x0018000000000000ull
+#define XCT_FUN_CRM_SIG_ENC	0x0020000000000000ull
+#define XCT_FUN_CRM_ENC_SIG	0x0028000000000000ull
+#define XCT_FUN_CRM_SIG_DEC	0x0030000000000000ull
+#define XCT_FUN_CRM_DEC_SIG	0x0038000000000000ull
+#define XCT_FUN_LLEN_M		0x0007ffff00000000ull
+#define XCT_FUN_LLEN_S		32ULL
+#define XCT_FUN_LLEN(x)		((((long)(x)) << XCT_FUN_LLEN_S) & \
+				 XCT_FUN_LLEN_M)
+#define XCT_FUN_SHL_M		0x00000000f8000000ull
+#define XCT_FUN_SHL_S		27ull
+#define XCT_FUN_SHL(x)		((((long)(x)) << XCT_FUN_SHL_S) & \
+				 XCT_FUN_SHL_M)
+#define XCT_FUN_CHL_M		0x0000000007c00000ull
+#define XCT_FUN_CHL_S		22ull
+#define XCT_FUN_CHL(x)		((((long)(x)) << XCT_FUN_CHL_S) & \
+				 XCT_FUN_CHL_M)
+#define XCT_FUN_HSZ_M		0x00000000003c0000ull
+#define XCT_FUN_HSZ_S		18ull
+#define XCT_FUN_HSZ(x)		((((long)(x)) << XCT_FUN_HSZ_S) & \
+				 XCT_FUN_HSZ_M)
+#define XCT_FUN_ALG_DES		0x0000000000000000ull
+#define XCT_FUN_ALG_3DES	0x0000000000008000ull
+#define XCT_FUN_ALG_AES		0x0000000000010000ull
+#define XCT_FUN_ALG_ARC		0x0000000000018000ull
+#define XCT_FUN_ALG_KASUMI	0x0000000000020000ull
+#define XCT_FUN_BCM_ECB		0x0000000000000000ull
+#define XCT_FUN_BCM_CBC		0x0000000000001000ull
+#define XCT_FUN_BCM_CFB		0x0000000000002000ull
+#define XCT_FUN_BCM_OFB		0x0000000000003000ull
+#define XCT_FUN_BCM_CNT		0x0000000000003800ull
+#define XCT_FUN_BCM_KAS_F8	0x0000000000002800ull
+#define XCT_FUN_BCM_KAS_F9	0x0000000000001800ull
+#define XCT_FUN_BCP_NO_PAD	0x0000000000000000ull
+#define XCT_FUN_BCP_ZRO		0x0000000000000200ull
+#define XCT_FUN_BCP_PL		0x0000000000000400ull
+#define XCT_FUN_BCP_INCR	0x0000000000000600ull
+#define XCT_FUN_SIG_MD5		(0ull << 4)
+#define XCT_FUN_SIG_SHA1	(2ull << 4)
+#define XCT_FUN_SIG_HMAC_MD5	(8ull << 4)
+#define XCT_FUN_SIG_HMAC_SHA1	(10ull << 4)
+#define XCT_FUN_A		0x0000000000000008ull
+#define XCT_FUN_C		0x0000000000000004ull
+#define XCT_FUN_AL2		0x0000000000000002ull
+#define XCT_FUN_SE		0x0000000000000001ull
+
+#define XCT_FUN_SRC_PTR(len, addr)	(XCT_PTR_LEN(len) | XCT_PTR_ADDR(addr))
+#define XCT_FUN_DST_PTR(len, addr)	(XCT_FUN_SRC_PTR(len, addr) | \
+					0x8000000000000000ull)
+
+#define XCT_CTRL_HDR_FUN_NUM_M		0x01c0000000000000ull
+#define XCT_CTRL_HDR_FUN_NUM_S		54
+#define XCT_CTRL_HDR_LEN_M		0x0007ffff00000000ull
+#define XCT_CTRL_HDR_LEN_S		32
+#define XCT_CTRL_HDR_REG_M		0x00000000000000ffull
+#define XCT_CTRL_HDR_REG_S		0
+
+#define XCT_CTRL_HDR(funcN,len,reg)	(0x9400000000000000ull | \
+			((((long)(funcN)) << XCT_CTRL_HDR_FUN_NUM_S) \
+			& XCT_CTRL_HDR_FUN_NUM_M) | \
+			((((long)(len)) << \
+			XCT_CTRL_HDR_LEN_S) & XCT_CTRL_HDR_LEN_M) | \
+			((((long)(reg)) << \
+			XCT_CTRL_HDR_REG_S) & XCT_CTRL_HDR_REG_M))
+
+/* Function config command options */
+#define	DMA_CALGO_DES			0x00
+#define	DMA_CALGO_3DES			0x01
+#define	DMA_CALGO_AES			0x02
+#define	DMA_CALGO_ARC			0x03
+
+#define DMA_FN_CIV0			0x02
+#define DMA_FN_CIV1			0x03
+#define DMA_FN_HKEY0			0x0a
+
+#define XCT_PTR_ADDR_LEN(ptr)		((ptr) & XCT_PTR_ADDR_M), \
+			(((ptr) & XCT_PTR_LEN_M) >> XCT_PTR_LEN_S)
+
+#endif /* PASEMI_FNU_H */
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/safe/safevar.h
+++ linux-mvl-dove-2.6.32/crypto/ocf/safe/safevar.h
@@ -0,0 +1,230 @@
+/*-
+ * The linux port of this code done by David McCullough
+ * Copyright (C) 2004-2007 David McCullough <david_mccullough@securecomputing.com>
+ * The license and original author are listed below.
+ *
+ * Copyright (c) 2003 Sam Leffler, Errno Consulting
+ * Copyright (c) 2003 Global Technology Associates, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: src/sys/dev/safe/safevar.h,v 1.2 2006/05/17 18:34:26 pjd Exp $
+ */
+#ifndef _SAFE_SAFEVAR_H_
+#define	_SAFE_SAFEVAR_H_
+
+/* Maximum queue length */
+#ifndef SAFE_MAX_NQUEUE
+#define SAFE_MAX_NQUEUE	60
+#endif
+
+#define	SAFE_MAX_PART		64	/* Maximum scatter/gather depth */
+#define	SAFE_DMA_BOUNDARY	0	/* No boundary for source DMA ops */
+#define	SAFE_MAX_DSIZE		2048 /* MCLBYTES Fixed scatter particle size */
+#define	SAFE_MAX_SSIZE		0x0ffff	/* Maximum gather particle size */
+#define	SAFE_MAX_DMA		0xfffff	/* Maximum PE operand size (20 bits) */
+/* total src+dst particle descriptors */
+#define	SAFE_TOTAL_DPART	(SAFE_MAX_NQUEUE * SAFE_MAX_PART)
+#define	SAFE_TOTAL_SPART	(SAFE_MAX_NQUEUE * SAFE_MAX_PART)
+
+#define	SAFE_RNG_MAXBUFSIZ	128	/* 32-bit words */
+
+#define	SAFE_CARD(sid)		(((sid) & 0xf0000000) >> 28)
+#define	SAFE_SESSION(sid)	( (sid) & 0x0fffffff)
+#define	SAFE_SID(crd, sesn)	(((crd) << 28) | ((sesn) & 0x0fffffff))
+
+#define SAFE_DEF_RTY		0xff	/* PCI Retry Timeout */
+#define SAFE_DEF_TOUT		0xff	/* PCI TRDY Timeout */
+#define SAFE_DEF_CACHELINE	0x01	/* Cache Line setting */
+
+#ifdef __KERNEL__
+/*
+ * State associated with the allocation of each chunk
+ * of memory setup for DMA.
+ */
+struct safe_dma_alloc {
+	dma_addr_t		dma_paddr;
+	void			*dma_vaddr;
+};
+
+/*
+ * Cryptographic operand state.  One of these exists for each
+ * source and destination operand passed in from the crypto
+ * subsystem.  When possible source and destination operands
+ * refer to the same memory.  More often they are distinct.
+ * We track the virtual address of each operand as well as
+ * where each is mapped for DMA.
+ */
+struct safe_operand {
+	union {
+		struct sk_buff *skb;
+		struct uio *io;
+	} u;
+	void			*map;
+	int				mapsize;	/* total number of bytes in segs */
+	struct {
+		dma_addr_t	ds_addr;
+		int			ds_len;
+		int			ds_tlen;
+	} segs[SAFE_MAX_PART];
+	int				nsegs;
+};
+
+/*
+ * Packet engine ring entry and cryptographic operation state.
+ * The packet engine requires a ring of descriptors that contain
+ * pointers to various cryptographic state.  However the ring
+ * configuration register allows you to specify an arbitrary size
+ * for ring entries.  We use this feature to collect most of the
+ * state for each cryptographic request into one spot.  Other than
+ * ring entries only the ``particle descriptors'' (scatter/gather
+ * lists) and the actual operand data are kept separate.  The
+ * particle descriptors must also be organized in rings.  The
+ * operand data can be located aribtrarily (modulo alignment constraints).
+ *
+ * Note that the descriptor ring is mapped onto the PCI bus so
+ * the hardware can DMA data.  This means the entire ring must be
+ * contiguous.
+ */
+struct safe_ringentry {
+	struct safe_desc	re_desc;	/* command descriptor */
+	struct safe_sarec	re_sa;		/* SA record */
+	struct safe_sastate	re_sastate;	/* SA state record */
+
+	struct cryptop		*re_crp;	/* crypto operation */
+
+	struct safe_operand	re_src;		/* source operand */
+	struct safe_operand	re_dst;		/* destination operand */
+
+	int			re_sesn;	/* crypto session ID */
+	int			re_flags;
+#define	SAFE_QFLAGS_COPYOUTIV	0x1		/* copy back on completion */
+#define	SAFE_QFLAGS_COPYOUTICV	0x2		/* copy back on completion */
+};
+
+#define	re_src_skb	re_src.u.skb
+#define	re_src_io	re_src.u.io
+#define	re_src_map	re_src.map
+#define	re_src_nsegs	re_src.nsegs
+#define	re_src_segs	re_src.segs
+#define	re_src_mapsize	re_src.mapsize
+
+#define	re_dst_skb	re_dst.u.skb
+#define	re_dst_io	re_dst.u.io
+#define	re_dst_map	re_dst.map
+#define	re_dst_nsegs	re_dst.nsegs
+#define	re_dst_segs	re_dst.segs
+#define	re_dst_mapsize	re_dst.mapsize
+
+struct rndstate_test;
+
+struct safe_session {
+	u_int32_t	ses_used;
+	u_int32_t	ses_klen;		/* key length in bits */
+	u_int32_t	ses_key[8];		/* DES/3DES/AES key */
+	u_int32_t	ses_mlen;		/* hmac length in bytes */
+	u_int32_t	ses_hminner[5];		/* hmac inner state */
+	u_int32_t	ses_hmouter[5];		/* hmac outer state */
+	u_int32_t	ses_iv[4];		/* DES/3DES/AES iv */
+};
+
+struct safe_pkq {
+	struct list_head	pkq_list;
+	struct cryptkop		*pkq_krp;
+};
+
+struct safe_softc {
+	softc_device_decl	sc_dev;
+	u32			sc_irq;
+
+	struct pci_dev		*sc_pcidev;
+	ocf_iomem_t		sc_base_addr;
+
+	u_int			sc_chiprev;	/* major/minor chip revision */
+	int			sc_flags;	/* device specific flags */
+#define	SAFE_FLAGS_KEY		0x01		/* has key accelerator */
+#define	SAFE_FLAGS_RNG		0x02		/* hardware rng */
+	int			sc_suspended;
+	int			sc_needwakeup;	/* notify crypto layer */
+	int32_t			sc_cid;		/* crypto tag */
+
+	struct safe_dma_alloc	sc_ringalloc;	/* PE ring allocation state */
+	struct safe_ringentry	*sc_ring;	/* PE ring */
+	struct safe_ringentry	*sc_ringtop;	/* PE ring top */
+	struct safe_ringentry	*sc_front;	/* next free entry */
+	struct safe_ringentry	*sc_back;	/* next pending entry */
+	int			sc_nqchip;	/* # passed to chip */
+	spinlock_t		sc_ringmtx;	/* PE ring lock */
+	struct safe_pdesc	*sc_spring;	/* src particle ring */
+	struct safe_pdesc	*sc_springtop;	/* src particle ring top */
+	struct safe_pdesc	*sc_spfree;	/* next free src particle */
+	struct safe_dma_alloc	sc_spalloc;	/* src particle ring state */
+	struct safe_pdesc	*sc_dpring;	/* dest particle ring */
+	struct safe_pdesc	*sc_dpringtop;	/* dest particle ring top */
+	struct safe_pdesc	*sc_dpfree;	/* next free dest particle */
+	struct safe_dma_alloc	sc_dpalloc;	/* dst particle ring state */
+	int			sc_nsessions;	/* # of sessions */
+	struct safe_session	*sc_sessions;	/* sessions */
+
+	struct timer_list	sc_pkto;	/* PK polling */
+	spinlock_t		sc_pkmtx;	/* PK lock */
+	struct list_head	sc_pkq;		/* queue of PK requests */
+	struct safe_pkq		*sc_pkq_cur;	/* current processing request */
+	u_int32_t		sc_pk_reslen, sc_pk_resoff;
+
+	int			sc_max_dsize;	/* maximum safe DMA size */
+};
+#endif /* __KERNEL__ */
+
+struct safe_stats {
+	u_int64_t st_ibytes;
+	u_int64_t st_obytes;
+	u_int32_t st_ipackets;
+	u_int32_t st_opackets;
+	u_int32_t st_invalid;		/* invalid argument */
+	u_int32_t st_badsession;	/* invalid session id */
+	u_int32_t st_badflags;		/* flags indicate !(mbuf | uio) */
+	u_int32_t st_nodesc;		/* op submitted w/o descriptors */
+	u_int32_t st_badalg;		/* unsupported algorithm */
+	u_int32_t st_ringfull;		/* PE descriptor ring full */
+	u_int32_t st_peoperr;		/* PE marked error */
+	u_int32_t st_dmaerr;		/* PE DMA error */
+	u_int32_t st_bypasstoobig;	/* bypass > 96 bytes */
+	u_int32_t st_skipmismatch;	/* enc part begins before auth part */
+	u_int32_t st_lenmismatch;	/* enc length different auth length */
+	u_int32_t st_coffmisaligned;	/* crypto offset not 32-bit aligned */
+	u_int32_t st_cofftoobig;	/* crypto offset > 255 words */
+	u_int32_t st_iovmisaligned;	/* iov op not aligned */
+	u_int32_t st_iovnotuniform;	/* iov op not suitable */
+	u_int32_t st_unaligned;		/* unaligned src caused copy */
+	u_int32_t st_notuniform;	/* non-uniform src caused copy */
+	u_int32_t st_nomap;		/* bus_dmamap_create failed */
+	u_int32_t st_noload;		/* bus_dmamap_load_* failed */
+	u_int32_t st_nombuf;		/* MGET* failed */
+	u_int32_t st_nomcl;		/* MCLGET* failed */
+	u_int32_t st_maxqchip;		/* max mcr1 ops out for processing */
+	u_int32_t st_rng;		/* RNG requests */
+	u_int32_t st_rngalarm;		/* RNG alarm requests */
+	u_int32_t st_noicvcopy;		/* ICV data copies suppressed */
+};
+#endif /* _SAFE_SAFEVAR_H_ */
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/safe/md5.c
+++ linux-mvl-dove-2.6.32/crypto/ocf/safe/md5.c
@@ -0,0 +1,308 @@
+/*	$KAME: md5.c,v 1.5 2000/11/08 06:13:08 itojun Exp $	*/
+/*
+ * Copyright (C) 1995, 1996, 1997, and 1998 WIDE Project.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the project nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE PROJECT AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#if 0
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD: src/sys/crypto/md5.c,v 1.9 2004/01/27 19:49:19 des Exp $");
+
+#include <sys/types.h>
+#include <sys/cdefs.h>
+#include <sys/time.h>
+#include <sys/systm.h>
+#include <crypto/md5.h>
+#endif
+
+#define SHIFT(X, s) (((X) << (s)) | ((X) >> (32 - (s))))
+
+#define F(X, Y, Z) (((X) & (Y)) | ((~X) & (Z)))
+#define G(X, Y, Z) (((X) & (Z)) | ((Y) & (~Z)))
+#define H(X, Y, Z) ((X) ^ (Y) ^ (Z))
+#define I(X, Y, Z) ((Y) ^ ((X) | (~Z)))
+
+#define ROUND1(a, b, c, d, k, s, i) { \
+	(a) = (a) + F((b), (c), (d)) + X[(k)] + T[(i)]; \
+	(a) = SHIFT((a), (s)); \
+	(a) = (b) + (a); \
+}
+
+#define ROUND2(a, b, c, d, k, s, i) { \
+	(a) = (a) + G((b), (c), (d)) + X[(k)] + T[(i)]; \
+	(a) = SHIFT((a), (s)); \
+	(a) = (b) + (a); \
+}
+
+#define ROUND3(a, b, c, d, k, s, i) { \
+	(a) = (a) + H((b), (c), (d)) + X[(k)] + T[(i)]; \
+	(a) = SHIFT((a), (s)); \
+	(a) = (b) + (a); \
+}
+
+#define ROUND4(a, b, c, d, k, s, i) { \
+	(a) = (a) + I((b), (c), (d)) + X[(k)] + T[(i)]; \
+	(a) = SHIFT((a), (s)); \
+	(a) = (b) + (a); \
+}
+
+#define Sa	 7
+#define Sb	12
+#define Sc	17
+#define Sd	22
+
+#define Se	 5
+#define Sf	 9
+#define Sg	14
+#define Sh	20
+
+#define Si	 4
+#define Sj	11
+#define Sk	16
+#define Sl	23
+
+#define Sm	 6
+#define Sn	10
+#define So	15
+#define Sp	21
+
+#define MD5_A0	0x67452301
+#define MD5_B0	0xefcdab89
+#define MD5_C0	0x98badcfe
+#define MD5_D0	0x10325476
+
+/* Integer part of 4294967296 times abs(sin(i)), where i is in radians. */
+static const u_int32_t T[65] = {
+	0,
+	0xd76aa478, 	0xe8c7b756,	0x242070db,	0xc1bdceee,
+	0xf57c0faf,	0x4787c62a, 	0xa8304613,	0xfd469501,
+	0x698098d8,	0x8b44f7af,	0xffff5bb1,	0x895cd7be,
+	0x6b901122, 	0xfd987193, 	0xa679438e,	0x49b40821,
+
+	0xf61e2562,	0xc040b340, 	0x265e5a51, 	0xe9b6c7aa,
+	0xd62f105d,	0x2441453,	0xd8a1e681,	0xe7d3fbc8,
+	0x21e1cde6,	0xc33707d6, 	0xf4d50d87, 	0x455a14ed,
+	0xa9e3e905,	0xfcefa3f8, 	0x676f02d9, 	0x8d2a4c8a,
+
+	0xfffa3942,	0x8771f681, 	0x6d9d6122, 	0xfde5380c,
+	0xa4beea44, 	0x4bdecfa9, 	0xf6bb4b60, 	0xbebfbc70,
+	0x289b7ec6, 	0xeaa127fa, 	0xd4ef3085,	0x4881d05,
+	0xd9d4d039, 	0xe6db99e5, 	0x1fa27cf8, 	0xc4ac5665,
+
+	0xf4292244, 	0x432aff97, 	0xab9423a7, 	0xfc93a039,
+	0x655b59c3, 	0x8f0ccc92, 	0xffeff47d, 	0x85845dd1,
+	0x6fa87e4f, 	0xfe2ce6e0, 	0xa3014314, 	0x4e0811a1,
+	0xf7537e82, 	0xbd3af235, 	0x2ad7d2bb, 	0xeb86d391,
+};
+
+static const u_int8_t md5_paddat[MD5_BUFLEN] = {
+	0x80,	0,	0,	0,	0,	0,	0,	0,
+	0,	0,	0,	0,	0,	0,	0,	0,
+	0,	0,	0,	0,	0,	0,	0,	0,
+	0,	0,	0,	0,	0,	0,	0,	0,
+	0,	0,	0,	0,	0,	0,	0,	0,
+	0,	0,	0,	0,	0,	0,	0,	0,
+	0,	0,	0,	0,	0,	0,	0,	0,
+	0,	0,	0,	0,	0,	0,	0,	0,	
+};
+
+static void md5_calc(u_int8_t *, md5_ctxt *);
+
+void md5_init(ctxt)
+	md5_ctxt *ctxt;
+{
+	ctxt->md5_n = 0;
+	ctxt->md5_i = 0;
+	ctxt->md5_sta = MD5_A0;
+	ctxt->md5_stb = MD5_B0;
+	ctxt->md5_stc = MD5_C0;
+	ctxt->md5_std = MD5_D0;
+	bzero(ctxt->md5_buf, sizeof(ctxt->md5_buf));
+}
+
+void md5_loop(ctxt, input, len)
+	md5_ctxt *ctxt;
+	u_int8_t *input;
+	u_int len; /* number of bytes */
+{
+	u_int gap, i;
+
+	ctxt->md5_n += len * 8; /* byte to bit */
+	gap = MD5_BUFLEN - ctxt->md5_i;
+
+	if (len >= gap) {
+		bcopy((void *)input, (void *)(ctxt->md5_buf + ctxt->md5_i),
+			gap);
+		md5_calc(ctxt->md5_buf, ctxt);
+
+		for (i = gap; i + MD5_BUFLEN <= len; i += MD5_BUFLEN) {
+			md5_calc((u_int8_t *)(input + i), ctxt);
+		}
+		
+		ctxt->md5_i = len - i;
+		bcopy((void *)(input + i), (void *)ctxt->md5_buf, ctxt->md5_i);
+	} else {
+		bcopy((void *)input, (void *)(ctxt->md5_buf + ctxt->md5_i),
+			len);
+		ctxt->md5_i += len;
+	}
+}
+
+void md5_pad(ctxt)
+	md5_ctxt *ctxt;
+{
+	u_int gap;
+
+	/* Don't count up padding. Keep md5_n. */	
+	gap = MD5_BUFLEN - ctxt->md5_i;
+	if (gap > 8) {
+		bcopy(md5_paddat,
+		      (void *)(ctxt->md5_buf + ctxt->md5_i),
+		      gap - sizeof(ctxt->md5_n));
+	} else {
+		/* including gap == 8 */
+		bcopy(md5_paddat, (void *)(ctxt->md5_buf + ctxt->md5_i),
+			gap);
+		md5_calc(ctxt->md5_buf, ctxt);
+		bcopy((md5_paddat + gap),
+		      (void *)ctxt->md5_buf,
+		      MD5_BUFLEN - sizeof(ctxt->md5_n));
+	}
+
+	/* 8 byte word */	
+#if BYTE_ORDER == LITTLE_ENDIAN
+	bcopy(&ctxt->md5_n8[0], &ctxt->md5_buf[56], 8);
+#endif
+#if BYTE_ORDER == BIG_ENDIAN
+	ctxt->md5_buf[56] = ctxt->md5_n8[7];
+	ctxt->md5_buf[57] = ctxt->md5_n8[6];
+	ctxt->md5_buf[58] = ctxt->md5_n8[5];
+	ctxt->md5_buf[59] = ctxt->md5_n8[4];
+	ctxt->md5_buf[60] = ctxt->md5_n8[3];
+	ctxt->md5_buf[61] = ctxt->md5_n8[2];
+	ctxt->md5_buf[62] = ctxt->md5_n8[1];
+	ctxt->md5_buf[63] = ctxt->md5_n8[0];
+#endif
+
+	md5_calc(ctxt->md5_buf, ctxt);
+}
+
+void md5_result(digest, ctxt)
+	u_int8_t *digest;
+	md5_ctxt *ctxt;
+{
+	/* 4 byte words */
+#if BYTE_ORDER == LITTLE_ENDIAN
+	bcopy(&ctxt->md5_st8[0], digest, 16);
+#endif
+#if BYTE_ORDER == BIG_ENDIAN
+	digest[ 0] = ctxt->md5_st8[ 3]; digest[ 1] = ctxt->md5_st8[ 2];
+	digest[ 2] = ctxt->md5_st8[ 1]; digest[ 3] = ctxt->md5_st8[ 0];
+	digest[ 4] = ctxt->md5_st8[ 7]; digest[ 5] = ctxt->md5_st8[ 6];
+	digest[ 6] = ctxt->md5_st8[ 5]; digest[ 7] = ctxt->md5_st8[ 4];
+	digest[ 8] = ctxt->md5_st8[11]; digest[ 9] = ctxt->md5_st8[10];
+	digest[10] = ctxt->md5_st8[ 9]; digest[11] = ctxt->md5_st8[ 8];
+	digest[12] = ctxt->md5_st8[15]; digest[13] = ctxt->md5_st8[14];
+	digest[14] = ctxt->md5_st8[13]; digest[15] = ctxt->md5_st8[12];
+#endif
+}
+
+static void md5_calc(b64, ctxt)
+	u_int8_t *b64;
+	md5_ctxt *ctxt;
+{
+	u_int32_t A = ctxt->md5_sta;
+	u_int32_t B = ctxt->md5_stb;
+	u_int32_t C = ctxt->md5_stc;
+	u_int32_t D = ctxt->md5_std;
+#if BYTE_ORDER == LITTLE_ENDIAN
+	u_int32_t *X = (u_int32_t *)b64;
+#endif	
+#if BYTE_ORDER == BIG_ENDIAN
+	/* 4 byte words */
+	/* what a brute force but fast! */
+	u_int32_t X[16];
+	u_int8_t *y = (u_int8_t *)X;
+	y[ 0] = b64[ 3]; y[ 1] = b64[ 2]; y[ 2] = b64[ 1]; y[ 3] = b64[ 0];
+	y[ 4] = b64[ 7]; y[ 5] = b64[ 6]; y[ 6] = b64[ 5]; y[ 7] = b64[ 4];
+	y[ 8] = b64[11]; y[ 9] = b64[10]; y[10] = b64[ 9]; y[11] = b64[ 8];
+	y[12] = b64[15]; y[13] = b64[14]; y[14] = b64[13]; y[15] = b64[12];
+	y[16] = b64[19]; y[17] = b64[18]; y[18] = b64[17]; y[19] = b64[16];
+	y[20] = b64[23]; y[21] = b64[22]; y[22] = b64[21]; y[23] = b64[20];
+	y[24] = b64[27]; y[25] = b64[26]; y[26] = b64[25]; y[27] = b64[24];
+	y[28] = b64[31]; y[29] = b64[30]; y[30] = b64[29]; y[31] = b64[28];
+	y[32] = b64[35]; y[33] = b64[34]; y[34] = b64[33]; y[35] = b64[32];
+	y[36] = b64[39]; y[37] = b64[38]; y[38] = b64[37]; y[39] = b64[36];
+	y[40] = b64[43]; y[41] = b64[42]; y[42] = b64[41]; y[43] = b64[40];
+	y[44] = b64[47]; y[45] = b64[46]; y[46] = b64[45]; y[47] = b64[44];
+	y[48] = b64[51]; y[49] = b64[50]; y[50] = b64[49]; y[51] = b64[48];
+	y[52] = b64[55]; y[53] = b64[54]; y[54] = b64[53]; y[55] = b64[52];
+	y[56] = b64[59]; y[57] = b64[58]; y[58] = b64[57]; y[59] = b64[56];
+	y[60] = b64[63]; y[61] = b64[62]; y[62] = b64[61]; y[63] = b64[60];
+#endif
+
+	ROUND1(A, B, C, D,  0, Sa,  1); ROUND1(D, A, B, C,  1, Sb,  2);
+	ROUND1(C, D, A, B,  2, Sc,  3); ROUND1(B, C, D, A,  3, Sd,  4);
+	ROUND1(A, B, C, D,  4, Sa,  5); ROUND1(D, A, B, C,  5, Sb,  6);
+	ROUND1(C, D, A, B,  6, Sc,  7); ROUND1(B, C, D, A,  7, Sd,  8);
+	ROUND1(A, B, C, D,  8, Sa,  9); ROUND1(D, A, B, C,  9, Sb, 10);
+	ROUND1(C, D, A, B, 10, Sc, 11); ROUND1(B, C, D, A, 11, Sd, 12);
+	ROUND1(A, B, C, D, 12, Sa, 13); ROUND1(D, A, B, C, 13, Sb, 14);
+	ROUND1(C, D, A, B, 14, Sc, 15); ROUND1(B, C, D, A, 15, Sd, 16);
+	
+	ROUND2(A, B, C, D,  1, Se, 17); ROUND2(D, A, B, C,  6, Sf, 18);
+	ROUND2(C, D, A, B, 11, Sg, 19); ROUND2(B, C, D, A,  0, Sh, 20);
+	ROUND2(A, B, C, D,  5, Se, 21); ROUND2(D, A, B, C, 10, Sf, 22);
+	ROUND2(C, D, A, B, 15, Sg, 23); ROUND2(B, C, D, A,  4, Sh, 24);
+	ROUND2(A, B, C, D,  9, Se, 25); ROUND2(D, A, B, C, 14, Sf, 26);
+	ROUND2(C, D, A, B,  3, Sg, 27); ROUND2(B, C, D, A,  8, Sh, 28);
+	ROUND2(A, B, C, D, 13, Se, 29); ROUND2(D, A, B, C,  2, Sf, 30);
+	ROUND2(C, D, A, B,  7, Sg, 31); ROUND2(B, C, D, A, 12, Sh, 32);
+
+	ROUND3(A, B, C, D,  5, Si, 33); ROUND3(D, A, B, C,  8, Sj, 34);
+	ROUND3(C, D, A, B, 11, Sk, 35); ROUND3(B, C, D, A, 14, Sl, 36);
+	ROUND3(A, B, C, D,  1, Si, 37); ROUND3(D, A, B, C,  4, Sj, 38);
+	ROUND3(C, D, A, B,  7, Sk, 39); ROUND3(B, C, D, A, 10, Sl, 40);
+	ROUND3(A, B, C, D, 13, Si, 41); ROUND3(D, A, B, C,  0, Sj, 42);
+	ROUND3(C, D, A, B,  3, Sk, 43); ROUND3(B, C, D, A,  6, Sl, 44);
+	ROUND3(A, B, C, D,  9, Si, 45); ROUND3(D, A, B, C, 12, Sj, 46);
+	ROUND3(C, D, A, B, 15, Sk, 47); ROUND3(B, C, D, A,  2, Sl, 48);
+	
+	ROUND4(A, B, C, D,  0, Sm, 49); ROUND4(D, A, B, C,  7, Sn, 50);	
+	ROUND4(C, D, A, B, 14, So, 51); ROUND4(B, C, D, A,  5, Sp, 52);	
+	ROUND4(A, B, C, D, 12, Sm, 53); ROUND4(D, A, B, C,  3, Sn, 54);	
+	ROUND4(C, D, A, B, 10, So, 55); ROUND4(B, C, D, A,  1, Sp, 56);	
+	ROUND4(A, B, C, D,  8, Sm, 57); ROUND4(D, A, B, C, 15, Sn, 58);	
+	ROUND4(C, D, A, B,  6, So, 59); ROUND4(B, C, D, A, 13, Sp, 60);	
+	ROUND4(A, B, C, D,  4, Sm, 61); ROUND4(D, A, B, C, 11, Sn, 62);	
+	ROUND4(C, D, A, B,  2, So, 63); ROUND4(B, C, D, A,  9, Sp, 64);
+
+	ctxt->md5_sta += A;
+	ctxt->md5_stb += B;
+	ctxt->md5_stc += C;
+	ctxt->md5_std += D;
+}
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/safe/sha1.c
+++ linux-mvl-dove-2.6.32/crypto/ocf/safe/sha1.c
@@ -0,0 +1,279 @@
+/*	$KAME: sha1.c,v 1.5 2000/11/08 06:13:08 itojun Exp $	*/
+/*
+ * Copyright (C) 1995, 1996, 1997, and 1998 WIDE Project.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the project nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE PROJECT AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*
+ * FIPS pub 180-1: Secure Hash Algorithm (SHA-1)
+ * based on: http://csrc.nist.gov/fips/fip180-1.txt
+ * implemented by Jun-ichiro itojun Itoh <itojun@itojun.org>
+ */
+
+#if 0
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD: src/sys/crypto/sha1.c,v 1.9 2003/06/10 21:36:57 obrien Exp $");
+
+#include <sys/types.h>
+#include <sys/cdefs.h>
+#include <sys/time.h>
+#include <sys/systm.h>
+
+#include <crypto/sha1.h>
+#endif
+
+/* sanity check */
+#if BYTE_ORDER != BIG_ENDIAN
+# if BYTE_ORDER != LITTLE_ENDIAN
+#  define unsupported 1
+# endif
+#endif
+
+#ifndef unsupported
+
+/* constant table */
+static u_int32_t _K[] = { 0x5a827999, 0x6ed9eba1, 0x8f1bbcdc, 0xca62c1d6 };
+#define	K(t)	_K[(t) / 20]
+
+#define	F0(b, c, d)	(((b) & (c)) | ((~(b)) & (d)))
+#define	F1(b, c, d)	(((b) ^ (c)) ^ (d))
+#define	F2(b, c, d)	(((b) & (c)) | ((b) & (d)) | ((c) & (d)))
+#define	F3(b, c, d)	(((b) ^ (c)) ^ (d))
+
+#define	S(n, x)		(((x) << (n)) | ((x) >> (32 - n)))
+
+#undef H
+#define	H(n)	(ctxt->h.b32[(n)])
+#define	COUNT	(ctxt->count)
+#define	BCOUNT	(ctxt->c.b64[0] / 8)
+#define	W(n)	(ctxt->m.b32[(n)])
+
+#define	PUTBYTE(x)	{ \
+	ctxt->m.b8[(COUNT % 64)] = (x);		\
+	COUNT++;				\
+	COUNT %= 64;				\
+	ctxt->c.b64[0] += 8;			\
+	if (COUNT % 64 == 0)			\
+		sha1_step(ctxt);		\
+     }
+
+#define	PUTPAD(x)	{ \
+	ctxt->m.b8[(COUNT % 64)] = (x);		\
+	COUNT++;				\
+	COUNT %= 64;				\
+	if (COUNT % 64 == 0)			\
+		sha1_step(ctxt);		\
+     }
+
+static void sha1_step(struct sha1_ctxt *);
+
+static void
+sha1_step(ctxt)
+	struct sha1_ctxt *ctxt;
+{
+	u_int32_t	a, b, c, d, e;
+	size_t t, s;
+	u_int32_t	tmp;
+
+#if BYTE_ORDER == LITTLE_ENDIAN
+	struct sha1_ctxt tctxt;
+	bcopy(&ctxt->m.b8[0], &tctxt.m.b8[0], 64);
+	ctxt->m.b8[0] = tctxt.m.b8[3]; ctxt->m.b8[1] = tctxt.m.b8[2];
+	ctxt->m.b8[2] = tctxt.m.b8[1]; ctxt->m.b8[3] = tctxt.m.b8[0];
+	ctxt->m.b8[4] = tctxt.m.b8[7]; ctxt->m.b8[5] = tctxt.m.b8[6];
+	ctxt->m.b8[6] = tctxt.m.b8[5]; ctxt->m.b8[7] = tctxt.m.b8[4];
+	ctxt->m.b8[8] = tctxt.m.b8[11]; ctxt->m.b8[9] = tctxt.m.b8[10];
+	ctxt->m.b8[10] = tctxt.m.b8[9]; ctxt->m.b8[11] = tctxt.m.b8[8];
+	ctxt->m.b8[12] = tctxt.m.b8[15]; ctxt->m.b8[13] = tctxt.m.b8[14];
+	ctxt->m.b8[14] = tctxt.m.b8[13]; ctxt->m.b8[15] = tctxt.m.b8[12];
+	ctxt->m.b8[16] = tctxt.m.b8[19]; ctxt->m.b8[17] = tctxt.m.b8[18];
+	ctxt->m.b8[18] = tctxt.m.b8[17]; ctxt->m.b8[19] = tctxt.m.b8[16];
+	ctxt->m.b8[20] = tctxt.m.b8[23]; ctxt->m.b8[21] = tctxt.m.b8[22];
+	ctxt->m.b8[22] = tctxt.m.b8[21]; ctxt->m.b8[23] = tctxt.m.b8[20];
+	ctxt->m.b8[24] = tctxt.m.b8[27]; ctxt->m.b8[25] = tctxt.m.b8[26];
+	ctxt->m.b8[26] = tctxt.m.b8[25]; ctxt->m.b8[27] = tctxt.m.b8[24];
+	ctxt->m.b8[28] = tctxt.m.b8[31]; ctxt->m.b8[29] = tctxt.m.b8[30];
+	ctxt->m.b8[30] = tctxt.m.b8[29]; ctxt->m.b8[31] = tctxt.m.b8[28];
+	ctxt->m.b8[32] = tctxt.m.b8[35]; ctxt->m.b8[33] = tctxt.m.b8[34];
+	ctxt->m.b8[34] = tctxt.m.b8[33]; ctxt->m.b8[35] = tctxt.m.b8[32];
+	ctxt->m.b8[36] = tctxt.m.b8[39]; ctxt->m.b8[37] = tctxt.m.b8[38];
+	ctxt->m.b8[38] = tctxt.m.b8[37]; ctxt->m.b8[39] = tctxt.m.b8[36];
+	ctxt->m.b8[40] = tctxt.m.b8[43]; ctxt->m.b8[41] = tctxt.m.b8[42];
+	ctxt->m.b8[42] = tctxt.m.b8[41]; ctxt->m.b8[43] = tctxt.m.b8[40];
+	ctxt->m.b8[44] = tctxt.m.b8[47]; ctxt->m.b8[45] = tctxt.m.b8[46];
+	ctxt->m.b8[46] = tctxt.m.b8[45]; ctxt->m.b8[47] = tctxt.m.b8[44];
+	ctxt->m.b8[48] = tctxt.m.b8[51]; ctxt->m.b8[49] = tctxt.m.b8[50];
+	ctxt->m.b8[50] = tctxt.m.b8[49]; ctxt->m.b8[51] = tctxt.m.b8[48];
+	ctxt->m.b8[52] = tctxt.m.b8[55]; ctxt->m.b8[53] = tctxt.m.b8[54];
+	ctxt->m.b8[54] = tctxt.m.b8[53]; ctxt->m.b8[55] = tctxt.m.b8[52];
+	ctxt->m.b8[56] = tctxt.m.b8[59]; ctxt->m.b8[57] = tctxt.m.b8[58];
+	ctxt->m.b8[58] = tctxt.m.b8[57]; ctxt->m.b8[59] = tctxt.m.b8[56];
+	ctxt->m.b8[60] = tctxt.m.b8[63]; ctxt->m.b8[61] = tctxt.m.b8[62];
+	ctxt->m.b8[62] = tctxt.m.b8[61]; ctxt->m.b8[63] = tctxt.m.b8[60];
+#endif
+
+	a = H(0); b = H(1); c = H(2); d = H(3); e = H(4);
+
+	for (t = 0; t < 20; t++) {
+		s = t & 0x0f;
+		if (t >= 16) {
+			W(s) = S(1, W((s+13) & 0x0f) ^ W((s+8) & 0x0f) ^ W((s+2) & 0x0f) ^ W(s));
+		}
+		tmp = S(5, a) + F0(b, c, d) + e + W(s) + K(t);
+		e = d; d = c; c = S(30, b); b = a; a = tmp;
+	}
+	for (t = 20; t < 40; t++) {
+		s = t & 0x0f;
+		W(s) = S(1, W((s+13) & 0x0f) ^ W((s+8) & 0x0f) ^ W((s+2) & 0x0f) ^ W(s));
+		tmp = S(5, a) + F1(b, c, d) + e + W(s) + K(t);
+		e = d; d = c; c = S(30, b); b = a; a = tmp;
+	}
+	for (t = 40; t < 60; t++) {
+		s = t & 0x0f;
+		W(s) = S(1, W((s+13) & 0x0f) ^ W((s+8) & 0x0f) ^ W((s+2) & 0x0f) ^ W(s));
+		tmp = S(5, a) + F2(b, c, d) + e + W(s) + K(t);
+		e = d; d = c; c = S(30, b); b = a; a = tmp;
+	}
+	for (t = 60; t < 80; t++) {
+		s = t & 0x0f;
+		W(s) = S(1, W((s+13) & 0x0f) ^ W((s+8) & 0x0f) ^ W((s+2) & 0x0f) ^ W(s));
+		tmp = S(5, a) + F3(b, c, d) + e + W(s) + K(t);
+		e = d; d = c; c = S(30, b); b = a; a = tmp;
+	}
+
+	H(0) = H(0) + a;
+	H(1) = H(1) + b;
+	H(2) = H(2) + c;
+	H(3) = H(3) + d;
+	H(4) = H(4) + e;
+
+	bzero(&ctxt->m.b8[0], 64);
+}
+
+/*------------------------------------------------------------*/
+
+void
+sha1_init(ctxt)
+	struct sha1_ctxt *ctxt;
+{
+	bzero(ctxt, sizeof(struct sha1_ctxt));
+	H(0) = 0x67452301;
+	H(1) = 0xefcdab89;
+	H(2) = 0x98badcfe;
+	H(3) = 0x10325476;
+	H(4) = 0xc3d2e1f0;
+}
+
+void
+sha1_pad(ctxt)
+	struct sha1_ctxt *ctxt;
+{
+	size_t padlen;		/*pad length in bytes*/
+	size_t padstart;
+
+	PUTPAD(0x80);
+
+	padstart = COUNT % 64;
+	padlen = 64 - padstart;
+	if (padlen < 8) {
+		bzero(&ctxt->m.b8[padstart], padlen);
+		COUNT += padlen;
+		COUNT %= 64;
+		sha1_step(ctxt);
+		padstart = COUNT % 64;	/* should be 0 */
+		padlen = 64 - padstart;	/* should be 64 */
+	}
+	bzero(&ctxt->m.b8[padstart], padlen - 8);
+	COUNT += (padlen - 8);
+	COUNT %= 64;
+#if BYTE_ORDER == BIG_ENDIAN
+	PUTPAD(ctxt->c.b8[0]); PUTPAD(ctxt->c.b8[1]);
+	PUTPAD(ctxt->c.b8[2]); PUTPAD(ctxt->c.b8[3]);
+	PUTPAD(ctxt->c.b8[4]); PUTPAD(ctxt->c.b8[5]);
+	PUTPAD(ctxt->c.b8[6]); PUTPAD(ctxt->c.b8[7]);
+#else
+	PUTPAD(ctxt->c.b8[7]); PUTPAD(ctxt->c.b8[6]);
+	PUTPAD(ctxt->c.b8[5]); PUTPAD(ctxt->c.b8[4]);
+	PUTPAD(ctxt->c.b8[3]); PUTPAD(ctxt->c.b8[2]);
+	PUTPAD(ctxt->c.b8[1]); PUTPAD(ctxt->c.b8[0]);
+#endif
+}
+
+void
+sha1_loop(ctxt, input, len)
+	struct sha1_ctxt *ctxt;
+	const u_int8_t *input;
+	size_t len;
+{
+	size_t gaplen;
+	size_t gapstart;
+	size_t off;
+	size_t copysiz;
+
+	off = 0;
+
+	while (off < len) {
+		gapstart = COUNT % 64;
+		gaplen = 64 - gapstart;
+
+		copysiz = (gaplen < len - off) ? gaplen : len - off;
+		bcopy(&input[off], &ctxt->m.b8[gapstart], copysiz);
+		COUNT += copysiz;
+		COUNT %= 64;
+		ctxt->c.b64[0] += copysiz * 8;
+		if (COUNT % 64 == 0)
+			sha1_step(ctxt);
+		off += copysiz;
+	}
+}
+
+void
+sha1_result(ctxt, digest0)
+	struct sha1_ctxt *ctxt;
+	caddr_t digest0;
+{
+	u_int8_t *digest;
+
+	digest = (u_int8_t *)digest0;
+	sha1_pad(ctxt);
+#if BYTE_ORDER == BIG_ENDIAN
+	bcopy(&ctxt->h.b8[0], digest, 20);
+#else
+	digest[0] = ctxt->h.b8[3]; digest[1] = ctxt->h.b8[2];
+	digest[2] = ctxt->h.b8[1]; digest[3] = ctxt->h.b8[0];
+	digest[4] = ctxt->h.b8[7]; digest[5] = ctxt->h.b8[6];
+	digest[6] = ctxt->h.b8[5]; digest[7] = ctxt->h.b8[4];
+	digest[8] = ctxt->h.b8[11]; digest[9] = ctxt->h.b8[10];
+	digest[10] = ctxt->h.b8[9]; digest[11] = ctxt->h.b8[8];
+	digest[12] = ctxt->h.b8[15]; digest[13] = ctxt->h.b8[14];
+	digest[14] = ctxt->h.b8[13]; digest[15] = ctxt->h.b8[12];
+	digest[16] = ctxt->h.b8[19]; digest[17] = ctxt->h.b8[18];
+	digest[18] = ctxt->h.b8[17]; digest[19] = ctxt->h.b8[16];
+#endif
+}
+
+#endif /*unsupported*/
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/safe/md5.h
+++ linux-mvl-dove-2.6.32/crypto/ocf/safe/md5.h
@@ -0,0 +1,76 @@
+/*	$FreeBSD: src/sys/crypto/md5.h,v 1.4 2002/03/20 05:13:50 alfred Exp $	*/
+/*	$KAME: md5.h,v 1.4 2000/03/27 04:36:22 sumikawa Exp $	*/
+
+/*
+ * Copyright (C) 1995, 1996, 1997, and 1998 WIDE Project.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the project nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE PROJECT AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _NETINET6_MD5_H_
+#define _NETINET6_MD5_H_
+
+#define MD5_BUFLEN	64
+
+typedef struct {
+	union {
+		u_int32_t	md5_state32[4];
+		u_int8_t	md5_state8[16];
+	} md5_st;
+
+#define md5_sta		md5_st.md5_state32[0]
+#define md5_stb		md5_st.md5_state32[1]
+#define md5_stc		md5_st.md5_state32[2]
+#define md5_std		md5_st.md5_state32[3]
+#define md5_st8		md5_st.md5_state8
+
+	union {
+		u_int64_t	md5_count64;
+		u_int8_t	md5_count8[8];
+	} md5_count;
+#define md5_n	md5_count.md5_count64
+#define md5_n8	md5_count.md5_count8
+
+	u_int	md5_i;
+	u_int8_t	md5_buf[MD5_BUFLEN];
+} md5_ctxt;
+
+extern void md5_init(md5_ctxt *);
+extern void md5_loop(md5_ctxt *, u_int8_t *, u_int);
+extern void md5_pad(md5_ctxt *);
+extern void md5_result(u_int8_t *, md5_ctxt *);
+
+/* compatibility */
+#define MD5_CTX		md5_ctxt
+#define MD5Init(x)	md5_init((x))
+#define MD5Update(x, y, z)	md5_loop((x), (y), (z))
+#define MD5Final(x, y) \
+do {				\
+	md5_pad((y));		\
+	md5_result((x), (y));	\
+} while (0)
+
+#endif /* ! _NETINET6_MD5_H_*/
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/safe/safereg.h
+++ linux-mvl-dove-2.6.32/crypto/ocf/safe/safereg.h
@@ -0,0 +1,421 @@
+/*-
+ * Copyright (c) 2003 Sam Leffler, Errno Consulting
+ * Copyright (c) 2003 Global Technology Associates, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: src/sys/dev/safe/safereg.h,v 1.1 2003/07/21 21:46:07 sam Exp $
+ */
+#ifndef _SAFE_SAFEREG_H_
+#define	_SAFE_SAFEREG_H_
+
+/*
+ * Register definitions for SafeNet SafeXcel-1141 crypto device.
+ * Definitions from revision 1.3 (Nov 6 2002) of the User's Manual.
+ */
+
+#define BS_BAR			0x10	/* DMA base address register */
+#define	BS_TRDY_TIMEOUT		0x40	/* TRDY timeout */
+#define	BS_RETRY_TIMEOUT	0x41	/* DMA retry timeout */
+
+#define	PCI_VENDOR_SAFENET	0x16ae		/* SafeNet, Inc. */
+
+/* SafeNet */
+#define	PCI_PRODUCT_SAFEXCEL	0x1141		/* 1141 */
+
+#define	SAFE_PE_CSR		0x0000	/* Packet Enginge Ctrl/Status */
+#define	SAFE_PE_SRC		0x0004	/* Packet Engine Source */
+#define	SAFE_PE_DST		0x0008	/* Packet Engine Destination */
+#define	SAFE_PE_SA		0x000c	/* Packet Engine SA */
+#define	SAFE_PE_LEN		0x0010	/* Packet Engine Length */
+#define	SAFE_PE_DMACFG		0x0040	/* Packet Engine DMA Configuration */
+#define	SAFE_PE_DMASTAT		0x0044	/* Packet Engine DMA Status */
+#define	SAFE_PE_PDRBASE		0x0048	/* Packet Engine Descriptor Ring Base */
+#define	SAFE_PE_RDRBASE		0x004c	/* Packet Engine Result Ring Base */
+#define	SAFE_PE_RINGCFG		0x0050	/* Packet Engine Ring Configuration */
+#define	SAFE_PE_RINGPOLL	0x0054	/* Packet Engine Ring Poll */
+#define	SAFE_PE_IRNGSTAT	0x0058	/* Packet Engine Internal Ring Status */
+#define	SAFE_PE_ERNGSTAT	0x005c	/* Packet Engine External Ring Status */
+#define	SAFE_PE_IOTHRESH	0x0060	/* Packet Engine I/O Threshold */
+#define	SAFE_PE_GRNGBASE	0x0064	/* Packet Engine Gather Ring Base */
+#define	SAFE_PE_SRNGBASE	0x0068	/* Packet Engine Scatter Ring Base */
+#define	SAFE_PE_PARTSIZE	0x006c	/* Packet Engine Particlar Ring Size */
+#define	SAFE_PE_PARTCFG		0x0070	/* Packet Engine Particle Ring Config */
+#define	SAFE_CRYPTO_CTRL	0x0080	/* Crypto Control */
+#define	SAFE_DEVID		0x0084	/* Device ID */
+#define	SAFE_DEVINFO		0x0088	/* Device Info */
+#define	SAFE_HU_STAT		0x00a0	/* Host Unmasked Status */
+#define	SAFE_HM_STAT		0x00a4	/* Host Masked Status (read-only) */
+#define	SAFE_HI_CLR		0x00a4	/* Host Clear Interrupt (write-only) */
+#define	SAFE_HI_MASK		0x00a8	/* Host Mask Control */
+#define	SAFE_HI_CFG		0x00ac	/* Interrupt Configuration */
+#define	SAFE_HI_RD_DESCR	0x00b4	/* Force Descriptor Read */
+#define	SAFE_HI_DESC_CNT	0x00b8	/* Host Descriptor Done Count */
+#define	SAFE_DMA_ENDIAN		0x00c0	/* Master Endian Status */
+#define	SAFE_DMA_SRCADDR	0x00c4	/* DMA Source Address Status */
+#define	SAFE_DMA_DSTADDR	0x00c8	/* DMA Destination Address Status */
+#define	SAFE_DMA_STAT		0x00cc	/* DMA Current Status */
+#define	SAFE_DMA_CFG		0x00d4	/* DMA Configuration/Status */
+#define	SAFE_ENDIAN		0x00e0	/* Endian Configuration */
+#define	SAFE_PK_A_ADDR		0x0800	/* Public Key A Address */
+#define	SAFE_PK_B_ADDR		0x0804	/* Public Key B Address */
+#define	SAFE_PK_C_ADDR		0x0808	/* Public Key C Address */
+#define	SAFE_PK_D_ADDR		0x080c	/* Public Key D Address */
+#define	SAFE_PK_A_LEN		0x0810	/* Public Key A Length */
+#define	SAFE_PK_B_LEN		0x0814	/* Public Key B Length */
+#define	SAFE_PK_SHIFT		0x0818	/* Public Key Shift */
+#define	SAFE_PK_FUNC		0x081c	/* Public Key Function */
+#define SAFE_PK_RAM_START	0x1000	/* Public Key RAM start address */
+#define SAFE_PK_RAM_END		0x1fff	/* Public Key RAM end address */
+
+#define	SAFE_RNG_OUT		0x0100	/* RNG Output */
+#define	SAFE_RNG_STAT		0x0104	/* RNG Status */
+#define	SAFE_RNG_CTRL		0x0108	/* RNG Control */
+#define	SAFE_RNG_A		0x010c	/* RNG A */
+#define	SAFE_RNG_B		0x0110	/* RNG B */
+#define	SAFE_RNG_X_LO		0x0114	/* RNG X [31:0] */
+#define	SAFE_RNG_X_MID		0x0118	/* RNG X [63:32] */
+#define	SAFE_RNG_X_HI		0x011c	/* RNG X [80:64] */
+#define	SAFE_RNG_X_CNTR		0x0120	/* RNG Counter */
+#define	SAFE_RNG_ALM_CNT	0x0124	/* RNG Alarm Count */
+#define	SAFE_RNG_CNFG		0x0128	/* RNG Configuration */
+#define	SAFE_RNG_LFSR1_LO	0x012c	/* RNG LFSR1 [31:0] */
+#define	SAFE_RNG_LFSR1_HI	0x0130	/* RNG LFSR1 [47:32] */
+#define	SAFE_RNG_LFSR2_LO	0x0134	/* RNG LFSR1 [31:0] */
+#define	SAFE_RNG_LFSR2_HI	0x0138	/* RNG LFSR1 [47:32] */
+
+#define	SAFE_PE_CSR_READY	0x00000001	/* ready for processing */
+#define	SAFE_PE_CSR_DONE	0x00000002	/* h/w completed processing */
+#define	SAFE_PE_CSR_LOADSA	0x00000004	/* load SA digests */
+#define	SAFE_PE_CSR_HASHFINAL	0x00000010	/* do hash pad & write result */
+#define	SAFE_PE_CSR_SABUSID	0x000000c0	/* bus id for SA */
+#define	SAFE_PE_CSR_SAPCI	0x00000040	/* PCI bus id for SA */
+#define	SAFE_PE_CSR_NXTHDR	0x0000ff00	/* next hdr value for IPsec */
+#define	SAFE_PE_CSR_FPAD	0x0000ff00	/* fixed pad for basic ops */
+#define	SAFE_PE_CSR_STATUS	0x00ff0000	/* operation result status */
+#define	SAFE_PE_CSR_AUTH_FAIL	0x00010000	/* ICV mismatch (inbound) */
+#define	SAFE_PE_CSR_PAD_FAIL	0x00020000	/* pad verify fail (inbound) */
+#define	SAFE_PE_CSR_SEQ_FAIL	0x00040000	/* sequence number (inbound) */
+#define	SAFE_PE_CSR_XERROR	0x00080000	/* extended error follows */
+#define	SAFE_PE_CSR_XECODE	0x00f00000	/* extended error code */
+#define	SAFE_PE_CSR_XECODE_S	20
+#define	SAFE_PE_CSR_XECODE_BADCMD	0	/* invalid command */
+#define	SAFE_PE_CSR_XECODE_BADALG	1	/* invalid algorithm */
+#define	SAFE_PE_CSR_XECODE_ALGDIS	2	/* algorithm disabled */
+#define	SAFE_PE_CSR_XECODE_ZEROLEN	3	/* zero packet length */
+#define	SAFE_PE_CSR_XECODE_DMAERR	4	/* bus DMA error */
+#define	SAFE_PE_CSR_XECODE_PIPEABORT	5	/* secondary bus DMA error */
+#define	SAFE_PE_CSR_XECODE_BADSPI	6	/* IPsec SPI mismatch */
+#define	SAFE_PE_CSR_XECODE_TIMEOUT	10	/* failsafe timeout */
+#define	SAFE_PE_CSR_PAD		0xff000000	/* ESP padding control/status */
+#define	SAFE_PE_CSR_PAD_MIN	0x00000000	/* minimum IPsec padding */
+#define	SAFE_PE_CSR_PAD_16	0x08000000	/* pad to 16-byte boundary */
+#define	SAFE_PE_CSR_PAD_32	0x10000000	/* pad to 32-byte boundary */
+#define	SAFE_PE_CSR_PAD_64	0x20000000	/* pad to 64-byte boundary */
+#define	SAFE_PE_CSR_PAD_128	0x40000000	/* pad to 128-byte boundary */
+#define	SAFE_PE_CSR_PAD_256	0x80000000	/* pad to 256-byte boundary */
+
+/*
+ * Check the CSR to see if the PE has returned ownership to
+ * the host.  Note that before processing a descriptor this
+ * must be done followed by a check of the SAFE_PE_LEN register
+ * status bits to avoid premature processing of a descriptor
+ * on its way back to the host.
+ */
+#define	SAFE_PE_CSR_IS_DONE(_csr) \
+    (((_csr) & (SAFE_PE_CSR_READY | SAFE_PE_CSR_DONE)) == SAFE_PE_CSR_DONE)
+
+#define	SAFE_PE_LEN_LENGTH	0x000fffff	/* total length (bytes) */
+#define	SAFE_PE_LEN_READY	0x00400000	/* ready for processing */
+#define	SAFE_PE_LEN_DONE	0x00800000	/* h/w completed processing */
+#define	SAFE_PE_LEN_BYPASS	0xff000000	/* bypass offset (bytes) */
+#define	SAFE_PE_LEN_BYPASS_S	24
+
+#define	SAFE_PE_LEN_IS_DONE(_len) \
+    (((_len) & (SAFE_PE_LEN_READY | SAFE_PE_LEN_DONE)) == SAFE_PE_LEN_DONE)
+
+/* NB: these apply to HU_STAT, HM_STAT, HI_CLR, and HI_MASK */
+#define	SAFE_INT_PE_CDONE	0x00000002	/* PE context done */
+#define	SAFE_INT_PE_DDONE	0x00000008	/* PE descriptor done */
+#define	SAFE_INT_PE_ERROR	0x00000010	/* PE error */
+#define	SAFE_INT_PE_ODONE	0x00000020	/* PE operation done */
+
+#define	SAFE_HI_CFG_PULSE	0x00000001	/* use pulse interrupt */
+#define	SAFE_HI_CFG_LEVEL	0x00000000	/* use level interrupt */
+#define	SAFE_HI_CFG_AUTOCLR	0x00000002	/* auto-clear pulse interrupt */
+
+#define	SAFE_ENDIAN_PASS	0x000000e4	/* straight pass-thru */
+#define	SAFE_ENDIAN_SWAB	0x0000001b	/* swap bytes in 32-bit word */
+
+#define	SAFE_PE_DMACFG_PERESET	0x00000001	/* reset packet engine */
+#define	SAFE_PE_DMACFG_PDRRESET	0x00000002	/* reset PDR counters/ptrs */
+#define	SAFE_PE_DMACFG_SGRESET	0x00000004	/* reset scatter/gather cache */
+#define	SAFE_PE_DMACFG_FSENA	0x00000008	/* enable failsafe reset */
+#define	SAFE_PE_DMACFG_PEMODE	0x00000100	/* packet engine mode */
+#define	SAFE_PE_DMACFG_SAPREC	0x00000200	/* SA precedes packet */
+#define	SAFE_PE_DMACFG_PKFOLL	0x00000400	/* packet follows descriptor */
+#define	SAFE_PE_DMACFG_GPRBID	0x00003000	/* gather particle ring busid */
+#define	SAFE_PE_DMACFG_GPRPCI	0x00001000	/* PCI gather particle ring */
+#define	SAFE_PE_DMACFG_SPRBID	0x0000c000	/* scatter part. ring busid */
+#define	SAFE_PE_DMACFG_SPRPCI	0x00004000	/* PCI scatter part. ring */
+#define	SAFE_PE_DMACFG_ESDESC	0x00010000	/* endian swap descriptors */
+#define	SAFE_PE_DMACFG_ESSA	0x00020000	/* endian swap SA data */
+#define	SAFE_PE_DMACFG_ESPACKET	0x00040000	/* endian swap packet data */
+#define	SAFE_PE_DMACFG_ESPDESC	0x00080000	/* endian swap particle desc. */
+#define	SAFE_PE_DMACFG_NOPDRUP	0x00100000	/* supp. PDR ownership update */
+#define	SAFE_PD_EDMACFG_PCIMODE	0x01000000	/* PCI target mode */
+
+#define	SAFE_PE_DMASTAT_PEIDONE	0x00000001	/* PE core input done */
+#define	SAFE_PE_DMASTAT_PEODONE	0x00000002	/* PE core output done */
+#define	SAFE_PE_DMASTAT_ENCDONE	0x00000004	/* encryption done */
+#define	SAFE_PE_DMASTAT_IHDONE	0x00000008	/* inner hash done */
+#define	SAFE_PE_DMASTAT_OHDONE	0x00000010	/* outer hash (HMAC) done */
+#define	SAFE_PE_DMASTAT_PADFLT	0x00000020	/* crypto pad fault */
+#define	SAFE_PE_DMASTAT_ICVFLT	0x00000040	/* ICV fault */
+#define	SAFE_PE_DMASTAT_SPIMIS	0x00000080	/* SPI mismatch */
+#define	SAFE_PE_DMASTAT_CRYPTO	0x00000100	/* crypto engine timeout */
+#define	SAFE_PE_DMASTAT_CQACT	0x00000200	/* command queue active */
+#define	SAFE_PE_DMASTAT_IRACT	0x00000400	/* input request active */
+#define	SAFE_PE_DMASTAT_ORACT	0x00000800	/* output request active */
+#define	SAFE_PE_DMASTAT_PEISIZE	0x003ff000	/* PE input size:32-bit words */
+#define	SAFE_PE_DMASTAT_PEOSIZE	0xffc00000	/* PE out. size:32-bit words */
+
+#define	SAFE_PE_RINGCFG_SIZE	0x000003ff	/* ring size (descriptors) */
+#define	SAFE_PE_RINGCFG_OFFSET	0xffff0000	/* offset btw desc's (dwords) */
+#define	SAFE_PE_RINGCFG_OFFSET_S	16
+
+#define	SAFE_PE_RINGPOLL_POLL	0x00000fff	/* polling frequency/divisor */
+#define	SAFE_PE_RINGPOLL_RETRY	0x03ff0000	/* polling frequency/divisor */
+#define	SAFE_PE_RINGPOLL_CONT	0x80000000	/* continuously poll */
+
+#define	SAFE_PE_IRNGSTAT_CQAVAIL 0x00000001	/* command queue available */
+
+#define	SAFE_PE_ERNGSTAT_NEXT	0x03ff0000	/* index of next packet desc. */
+#define	SAFE_PE_ERNGSTAT_NEXT_S	16
+
+#define	SAFE_PE_IOTHRESH_INPUT	0x000003ff	/* input threshold (dwords) */
+#define	SAFE_PE_IOTHRESH_OUTPUT	0x03ff0000	/* output threshold (dwords) */
+
+#define	SAFE_PE_PARTCFG_SIZE	0x0000ffff	/* scatter particle size */
+#define	SAFE_PE_PARTCFG_GBURST	0x00030000	/* gather particle burst */
+#define	SAFE_PE_PARTCFG_GBURST_2	0x00000000
+#define	SAFE_PE_PARTCFG_GBURST_4	0x00010000
+#define	SAFE_PE_PARTCFG_GBURST_8	0x00020000
+#define	SAFE_PE_PARTCFG_GBURST_16	0x00030000
+#define	SAFE_PE_PARTCFG_SBURST	0x000c0000	/* scatter particle burst */
+#define	SAFE_PE_PARTCFG_SBURST_2	0x00000000
+#define	SAFE_PE_PARTCFG_SBURST_4	0x00040000
+#define	SAFE_PE_PARTCFG_SBURST_8	0x00080000
+#define	SAFE_PE_PARTCFG_SBURST_16	0x000c0000
+
+#define	SAFE_PE_PARTSIZE_SCAT	0xffff0000	/* scatter particle ring size */
+#define	SAFE_PE_PARTSIZE_GATH	0x0000ffff	/* gather particle ring size */
+
+#define	SAFE_CRYPTO_CTRL_3DES	0x00000001	/* enable 3DES support */
+#define	SAFE_CRYPTO_CTRL_PKEY	0x00010000	/* enable public key support */
+#define	SAFE_CRYPTO_CTRL_RNG	0x00020000	/* enable RNG support */
+
+#define	SAFE_DEVINFO_REV_MIN	0x0000000f	/* minor rev for chip */
+#define	SAFE_DEVINFO_REV_MAJ	0x000000f0	/* major rev for chip */
+#define	SAFE_DEVINFO_REV_MAJ_S	4
+#define	SAFE_DEVINFO_DES	0x00000100	/* DES/3DES support present */
+#define	SAFE_DEVINFO_ARC4	0x00000200	/* ARC4 support present */
+#define	SAFE_DEVINFO_AES	0x00000400	/* AES support present */
+#define	SAFE_DEVINFO_MD5	0x00001000	/* MD5 support present */
+#define	SAFE_DEVINFO_SHA1	0x00002000	/* SHA-1 support present */
+#define	SAFE_DEVINFO_RIPEMD	0x00004000	/* RIPEMD support present */
+#define	SAFE_DEVINFO_DEFLATE	0x00010000	/* Deflate support present */
+#define	SAFE_DEVINFO_SARAM	0x00100000	/* on-chip SA RAM present */
+#define	SAFE_DEVINFO_EMIBUS	0x00200000	/* EMI bus present */
+#define	SAFE_DEVINFO_PKEY	0x00400000	/* public key support present */
+#define	SAFE_DEVINFO_RNG	0x00800000	/* RNG present */
+
+#define	SAFE_REV(_maj, _min)	(((_maj) << SAFE_DEVINFO_REV_MAJ_S) | (_min))
+#define	SAFE_REV_MAJ(_chiprev) \
+	(((_chiprev) & SAFE_DEVINFO_REV_MAJ) >> SAFE_DEVINFO_REV_MAJ_S)
+#define	SAFE_REV_MIN(_chiprev)	((_chiprev) & SAFE_DEVINFO_REV_MIN)
+
+#define	SAFE_PK_FUNC_MULT	0x00000001	/* Multiply function */
+#define	SAFE_PK_FUNC_SQUARE	0x00000004	/* Square function */
+#define	SAFE_PK_FUNC_ADD	0x00000010	/* Add function */
+#define	SAFE_PK_FUNC_SUB	0x00000020	/* Subtract function */
+#define	SAFE_PK_FUNC_LSHIFT	0x00000040	/* Left-shift function */
+#define	SAFE_PK_FUNC_RSHIFT	0x00000080	/* Right-shift function */
+#define	SAFE_PK_FUNC_DIV	0x00000100	/* Divide function */
+#define	SAFE_PK_FUNC_CMP	0x00000400	/* Compare function */
+#define	SAFE_PK_FUNC_COPY	0x00000800	/* Copy function */
+#define	SAFE_PK_FUNC_EXP16	0x00002000	/* Exponentiate (4-bit ACT) */
+#define	SAFE_PK_FUNC_EXP4	0x00004000	/* Exponentiate (2-bit ACT) */
+#define	SAFE_PK_FUNC_RUN	0x00008000	/* start/status */
+
+#define	SAFE_RNG_STAT_BUSY	0x00000001	/* busy, data not valid */
+
+#define	SAFE_RNG_CTRL_PRE_LFSR	0x00000001	/* enable output pre-LFSR */
+#define	SAFE_RNG_CTRL_TST_MODE	0x00000002	/* enable test mode */
+#define	SAFE_RNG_CTRL_TST_RUN	0x00000004	/* start test state machine */
+#define	SAFE_RNG_CTRL_ENA_RING1	0x00000008	/* test entropy oscillator #1 */
+#define	SAFE_RNG_CTRL_ENA_RING2	0x00000010	/* test entropy oscillator #2 */
+#define	SAFE_RNG_CTRL_DIS_ALARM	0x00000020	/* disable RNG alarm reports */
+#define	SAFE_RNG_CTRL_TST_CLOCK	0x00000040	/* enable test clock */
+#define	SAFE_RNG_CTRL_SHORTEN	0x00000080	/* shorten state timers */
+#define	SAFE_RNG_CTRL_TST_ALARM	0x00000100	/* simulate alarm state */
+#define	SAFE_RNG_CTRL_RST_LFSR	0x00000200	/* reset LFSR */
+
+/*
+ * Packet engine descriptor.  Note that d_csr is a copy of the
+ * SAFE_PE_CSR register and all definitions apply, and d_len
+ * is a copy of the SAFE_PE_LEN register and all definitions apply.
+ * d_src and d_len may point directly to contiguous data or to a
+ * list of ``particle descriptors'' when using scatter/gather i/o.
+ */
+struct safe_desc {
+	u_int32_t	d_csr;			/* per-packet control/status */
+	u_int32_t	d_src;			/* source address */
+	u_int32_t	d_dst;			/* destination address */
+	u_int32_t	d_sa;			/* SA address */
+	u_int32_t	d_len;			/* length, bypass, status */
+};
+
+/*
+ * Scatter/Gather particle descriptor.
+ *
+ * NB: scatter descriptors do not specify a size; this is fixed
+ *     by the setting of the SAFE_PE_PARTCFG register.
+ */
+struct safe_pdesc {
+	u_int32_t	pd_addr;		/* particle address */
+#ifdef __BIG_ENDIAN
+	u_int16_t	pd_flags;		/* control word */
+	u_int16_t	pd_size;		/* particle size (bytes) */
+#else
+	u_int16_t	pd_flags;		/* control word */
+	u_int16_t	pd_size;		/* particle size (bytes) */
+#endif
+};
+
+#define	SAFE_PD_READY	0x0001			/* ready for processing */
+#define	SAFE_PD_DONE	0x0002			/* h/w completed processing */
+
+/*
+ * Security Association (SA) Record (Rev 1).  One of these is
+ * required for each operation processed by the packet engine.
+ */
+struct safe_sarec {
+	u_int32_t	sa_cmd0;
+	u_int32_t	sa_cmd1;
+	u_int32_t	sa_resv0;
+	u_int32_t	sa_resv1;
+	u_int32_t	sa_key[8];		/* DES/3DES/AES key */
+	u_int32_t	sa_indigest[5];		/* inner digest */
+	u_int32_t	sa_outdigest[5];	/* outer digest */
+	u_int32_t	sa_spi;			/* SPI */
+	u_int32_t	sa_seqnum;		/* sequence number */
+	u_int32_t	sa_seqmask[2];		/* sequence number mask */
+	u_int32_t	sa_resv2;
+	u_int32_t	sa_staterec;		/* address of state record */
+	u_int32_t	sa_resv3[2];
+	u_int32_t	sa_samgmt0;		/* SA management field 0 */
+	u_int32_t	sa_samgmt1;		/* SA management field 0 */
+};
+
+#define	SAFE_SA_CMD0_OP		0x00000007	/* operation code */
+#define	SAFE_SA_CMD0_OP_CRYPT	0x00000000	/* encrypt/decrypt (basic) */
+#define	SAFE_SA_CMD0_OP_BOTH	0x00000001	/* encrypt-hash/hash-decrypto */
+#define	SAFE_SA_CMD0_OP_HASH	0x00000003	/* hash (outbound-only) */
+#define	SAFE_SA_CMD0_OP_ESP	0x00000000	/* ESP in/out (proto) */
+#define	SAFE_SA_CMD0_OP_AH	0x00000001	/* AH in/out (proto) */
+#define	SAFE_SA_CMD0_INBOUND	0x00000008	/* inbound operation */
+#define	SAFE_SA_CMD0_OUTBOUND	0x00000000	/* outbound operation */
+#define	SAFE_SA_CMD0_GROUP	0x00000030	/* operation group */
+#define	SAFE_SA_CMD0_BASIC	0x00000000	/* basic operation */
+#define	SAFE_SA_CMD0_PROTO	0x00000010	/* protocol/packet operation */
+#define	SAFE_SA_CMD0_BUNDLE	0x00000020	/* bundled operation (resvd) */
+#define	SAFE_SA_CMD0_PAD	0x000000c0	/* crypto pad method */
+#define	SAFE_SA_CMD0_PAD_IPSEC	0x00000000	/* IPsec padding */
+#define	SAFE_SA_CMD0_PAD_PKCS7	0x00000040	/* PKCS#7 padding */
+#define	SAFE_SA_CMD0_PAD_CONS	0x00000080	/* constant padding */
+#define	SAFE_SA_CMD0_PAD_ZERO	0x000000c0	/* zero padding */
+#define	SAFE_SA_CMD0_CRYPT_ALG	0x00000f00	/* symmetric crypto algorithm */
+#define	SAFE_SA_CMD0_DES	0x00000000	/* DES crypto algorithm */
+#define	SAFE_SA_CMD0_3DES	0x00000100	/* 3DES crypto algorithm */
+#define	SAFE_SA_CMD0_AES	0x00000300	/* AES crypto algorithm */
+#define	SAFE_SA_CMD0_CRYPT_NULL	0x00000f00	/* null crypto algorithm */
+#define	SAFE_SA_CMD0_HASH_ALG	0x0000f000	/* hash algorithm */
+#define	SAFE_SA_CMD0_MD5	0x00000000	/* MD5 hash algorithm */
+#define	SAFE_SA_CMD0_SHA1	0x00001000	/* SHA-1 hash algorithm */
+#define	SAFE_SA_CMD0_HASH_NULL	0x0000f000	/* null hash algorithm */
+#define	SAFE_SA_CMD0_HDR_PROC	0x00080000	/* header processing */
+#define	SAFE_SA_CMD0_IBUSID	0x00300000	/* input bus id */
+#define	SAFE_SA_CMD0_IPCI	0x00100000	/* PCI input bus id */
+#define	SAFE_SA_CMD0_OBUSID	0x00c00000	/* output bus id */
+#define	SAFE_SA_CMD0_OPCI	0x00400000	/* PCI output bus id */
+#define	SAFE_SA_CMD0_IVLD	0x03000000	/* IV loading */
+#define	SAFE_SA_CMD0_IVLD_NONE	0x00000000	/* IV no load (reuse) */
+#define	SAFE_SA_CMD0_IVLD_IBUF	0x01000000	/* IV load from input buffer */
+#define	SAFE_SA_CMD0_IVLD_STATE	0x02000000	/* IV load from state */
+#define	SAFE_SA_CMD0_HSLD	0x0c000000	/* hash state loading */
+#define	SAFE_SA_CMD0_HSLD_SA	0x00000000	/* hash state load from SA */
+#define	SAFE_SA_CMD0_HSLD_STATE	0x08000000	/* hash state load from state */
+#define	SAFE_SA_CMD0_HSLD_NONE	0x0c000000	/* hash state no load */
+#define	SAFE_SA_CMD0_SAVEIV	0x10000000	/* save IV */
+#define	SAFE_SA_CMD0_SAVEHASH	0x20000000	/* save hash state */
+#define	SAFE_SA_CMD0_IGATHER	0x40000000	/* input gather */
+#define	SAFE_SA_CMD0_OSCATTER	0x80000000	/* output scatter */
+
+#define	SAFE_SA_CMD1_HDRCOPY	0x00000002	/* copy header to output */
+#define	SAFE_SA_CMD1_PAYCOPY	0x00000004	/* copy payload to output */
+#define	SAFE_SA_CMD1_PADCOPY	0x00000008	/* copy pad to output */
+#define	SAFE_SA_CMD1_IPV4	0x00000000	/* IPv4 protocol */
+#define	SAFE_SA_CMD1_IPV6	0x00000010	/* IPv6 protocol */
+#define	SAFE_SA_CMD1_MUTABLE	0x00000020	/* mutable bit processing */
+#define	SAFE_SA_CMD1_SRBUSID	0x000000c0	/* state record bus id */
+#define	SAFE_SA_CMD1_SRPCI	0x00000040	/* state record from PCI */
+#define	SAFE_SA_CMD1_CRMODE	0x00000300	/* crypto mode */
+#define	SAFE_SA_CMD1_ECB	0x00000000	/* ECB crypto mode */
+#define	SAFE_SA_CMD1_CBC	0x00000100	/* CBC crypto mode */
+#define	SAFE_SA_CMD1_OFB	0x00000200	/* OFB crypto mode */
+#define	SAFE_SA_CMD1_CFB	0x00000300	/* CFB crypto mode */
+#define	SAFE_SA_CMD1_CRFEEDBACK	0x00000c00	/* crypto feedback mode */
+#define	SAFE_SA_CMD1_64BIT	0x00000000	/* 64-bit crypto feedback */
+#define	SAFE_SA_CMD1_8BIT	0x00000400	/* 8-bit crypto feedback */
+#define	SAFE_SA_CMD1_1BIT	0x00000800	/* 1-bit crypto feedback */
+#define	SAFE_SA_CMD1_128BIT	0x00000c00	/* 128-bit crypto feedback */
+#define	SAFE_SA_CMD1_OPTIONS	0x00001000	/* HMAC/options mutable bit */
+#define	SAFE_SA_CMD1_HMAC	SAFE_SA_CMD1_OPTIONS
+#define	SAFE_SA_CMD1_SAREV1	0x00008000	/* SA Revision 1 */
+#define	SAFE_SA_CMD1_OFFSET	0x00ff0000	/* hash/crypto offset(dwords) */
+#define	SAFE_SA_CMD1_OFFSET_S	16
+#define	SAFE_SA_CMD1_AESKEYLEN	0x0f000000	/* AES key length */
+#define	SAFE_SA_CMD1_AES128	0x02000000	/* 128-bit AES key */
+#define	SAFE_SA_CMD1_AES192	0x03000000	/* 192-bit AES key */
+#define	SAFE_SA_CMD1_AES256	0x04000000	/* 256-bit AES key */
+
+/* 
+ * Security Associate State Record (Rev 1).
+ */
+struct safe_sastate {
+	u_int32_t	sa_saved_iv[4];		/* saved IV (DES/3DES/AES) */
+	u_int32_t	sa_saved_hashbc;	/* saved hash byte count */
+	u_int32_t	sa_saved_indigest[5];	/* saved inner digest */
+};
+#endif /* _SAFE_SAFEREG_H_ */
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/safe/Makefile
+++ linux-mvl-dove-2.6.32/crypto/ocf/safe/Makefile
@@ -0,0 +1,12 @@
+# for SGlinux builds
+-include $(ROOTDIR)/modules/.config
+
+obj-$(CONFIG_OCF_SAFE) += safe.o
+
+obj ?= .
+EXTRA_CFLAGS += -I$(obj)/.. -I$(obj)/
+
+ifdef TOPDIR
+-include $(TOPDIR)/Rules.make
+endif
+
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/safe/safe.c
+++ linux-mvl-dove-2.6.32/crypto/ocf/safe/safe.c
@@ -0,0 +1,2288 @@
+/*-
+ * Linux port done by David McCullough <david_mccullough@securecomputing.com>
+ * Copyright (C) 2004-2007 David McCullough
+ * The license and original author are listed below.
+ *
+ * Copyright (c) 2003 Sam Leffler, Errno Consulting
+ * Copyright (c) 2003 Global Technology Associates, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+__FBSDID("$FreeBSD: src/sys/dev/safe/safe.c,v 1.18 2007/03/21 03:42:50 sam Exp $");
+ */
+
+#ifndef AUTOCONF_INCLUDED
+#include <linux/config.h>
+#endif
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/list.h>
+#include <linux/slab.h>
+#include <linux/wait.h>
+#include <linux/sched.h>
+#include <linux/pci.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/spinlock.h>
+#include <linux/random.h>
+#include <linux/version.h>
+#include <linux/skbuff.h>
+#include <asm/io.h>
+
+/*
+ * SafeNet SafeXcel-1141 hardware crypto accelerator
+ */
+
+#include <cryptodev.h>
+#include <uio.h>
+#include <safe/safereg.h>
+#include <safe/safevar.h>
+
+#if 1
+#define	DPRINTF(a)	do { \
+						if (debug) { \
+							printk("%s: ", sc ? \
+								device_get_nameunit(sc->sc_dev) : "safe"); \
+							printk a; \
+						} \
+					} while (0)
+#else
+#define	DPRINTF(a)
+#endif
+
+/*
+ * until we find a cleaner way, include the BSD md5/sha1 code
+ * here
+ */
+#define HMAC_HACK 1
+#ifdef HMAC_HACK
+#define LITTLE_ENDIAN 1234
+#define BIG_ENDIAN 4321
+#ifdef __LITTLE_ENDIAN
+#define BYTE_ORDER LITTLE_ENDIAN
+#endif
+#ifdef __BIG_ENDIAN
+#define BYTE_ORDER BIG_ENDIAN
+#endif
+#include <safe/md5.h>
+#include <safe/md5.c>
+#include <safe/sha1.h>
+#include <safe/sha1.c>
+
+u_int8_t hmac_ipad_buffer[64] = {
+    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
+    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
+    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
+    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
+    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
+    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
+    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
+    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36
+};
+
+u_int8_t hmac_opad_buffer[64] = {
+    0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C,
+    0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C,
+    0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C,
+    0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C,
+    0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C,
+    0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C,
+    0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C,
+    0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C, 0x5C
+};
+#endif /* HMAC_HACK */
+
+/* add proc entry for this */
+struct safe_stats safestats;
+
+#define debug safe_debug
+int safe_debug = 0;
+module_param(safe_debug, int, 0644);
+MODULE_PARM_DESC(safe_debug, "Enable debug");
+
+static	void safe_callback(struct safe_softc *, struct safe_ringentry *);
+static	void safe_feed(struct safe_softc *, struct safe_ringentry *);
+#if defined(CONFIG_OCF_RANDOMHARVEST) && !defined(SAFE_NO_RNG)
+static	void safe_rng_init(struct safe_softc *);
+int safe_rngbufsize = 8;		/* 32 bytes each read  */
+module_param(safe_rngbufsize, int, 0644);
+MODULE_PARM_DESC(safe_rngbufsize, "RNG polling buffer size (32-bit words)");
+int safe_rngmaxalarm = 8;		/* max alarms before reset */
+module_param(safe_rngmaxalarm, int, 0644);
+MODULE_PARM_DESC(safe_rngmaxalarm, "RNG max alarms before reset");
+#endif /* SAFE_NO_RNG */
+
+static void safe_totalreset(struct safe_softc *sc);
+static int safe_dmamap_aligned(struct safe_softc *sc, const struct safe_operand *op);
+static int safe_dmamap_uniform(struct safe_softc *sc, const struct safe_operand *op);
+static int safe_free_entry(struct safe_softc *sc, struct safe_ringentry *re);
+static int safe_kprocess(device_t dev, struct cryptkop *krp, int hint);
+static int safe_kstart(struct safe_softc *sc);
+static int safe_ksigbits(struct safe_softc *sc, struct crparam *cr);
+static void safe_kfeed(struct safe_softc *sc);
+static void safe_kpoll(unsigned long arg);
+static void safe_kload_reg(struct safe_softc *sc, u_int32_t off,
+								u_int32_t len, struct crparam *n);
+
+static	int safe_newsession(device_t, u_int32_t *, struct cryptoini *);
+static	int safe_freesession(device_t, u_int64_t);
+static	int safe_process(device_t, struct cryptop *, int);
+
+static device_method_t safe_methods = {
+	/* crypto device methods */
+	DEVMETHOD(cryptodev_newsession,	safe_newsession),
+	DEVMETHOD(cryptodev_freesession,safe_freesession),
+	DEVMETHOD(cryptodev_process,	safe_process),
+	DEVMETHOD(cryptodev_kprocess,	safe_kprocess),
+};
+
+#define	READ_REG(sc,r)			readl((sc)->sc_base_addr + (r))
+#define WRITE_REG(sc,r,val)		writel((val), (sc)->sc_base_addr + (r))
+
+#define SAFE_MAX_CHIPS 8
+static struct safe_softc *safe_chip_idx[SAFE_MAX_CHIPS];
+
+/*
+ * split our buffers up into safe DMAable byte fragments to avoid lockup
+ * bug in 1141 HW on rev 1.0.
+ */
+
+static int
+pci_map_linear(
+	struct safe_softc *sc,
+	struct safe_operand *buf,
+	void *addr,
+	int len)
+{
+	dma_addr_t tmp;
+	int chunk, tlen = len;
+
+	tmp = pci_map_single(sc->sc_pcidev, addr, len, PCI_DMA_BIDIRECTIONAL);
+
+	buf->mapsize += len;
+	while (len > 0) {
+		chunk = (len > sc->sc_max_dsize) ? sc->sc_max_dsize : len;
+		buf->segs[buf->nsegs].ds_addr = tmp;
+		buf->segs[buf->nsegs].ds_len  = chunk;
+		buf->segs[buf->nsegs].ds_tlen = tlen;
+		buf->nsegs++;
+		tmp  += chunk;
+		len  -= chunk;
+		tlen = 0;
+	}
+	return 0;
+}
+
+/*
+ * map in a given uio buffer (great on some arches :-)
+ */
+
+static int
+pci_map_uio(struct safe_softc *sc, struct safe_operand *buf, struct uio *uio)
+{
+	struct iovec *iov = uio->uio_iov;
+	int n;
+
+	DPRINTF(("%s()\n", __FUNCTION__));
+
+	buf->mapsize = 0;
+	buf->nsegs = 0;
+
+	for (n = 0; n < uio->uio_iovcnt; n++) {
+		pci_map_linear(sc, buf, iov->iov_base, iov->iov_len);
+		iov++;
+	}
+
+	/* identify this buffer by the first segment */
+	buf->map = (void *) buf->segs[0].ds_addr;
+	return(0);
+}
+
+/*
+ * map in a given sk_buff
+ */
+
+static int
+pci_map_skb(struct safe_softc *sc,struct safe_operand *buf,struct sk_buff *skb)
+{
+	int i;
+
+	DPRINTF(("%s()\n", __FUNCTION__));
+
+	buf->mapsize = 0;
+	buf->nsegs = 0;
+
+	pci_map_linear(sc, buf, skb->data, skb_headlen(skb));
+
+	for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
+		pci_map_linear(sc, buf,
+				page_address(skb_shinfo(skb)->frags[i].page) +
+				                        skb_shinfo(skb)->frags[i].page_offset,
+				skb_shinfo(skb)->frags[i].size);
+	}
+
+	/* identify this buffer by the first segment */
+	buf->map = (void *) buf->segs[0].ds_addr;
+	return(0);
+}
+
+
+#if 0 /* not needed at this time */
+static void
+pci_sync_operand(struct safe_softc *sc, struct safe_operand *buf)
+{
+	int i;
+
+	DPRINTF(("%s()\n", __FUNCTION__));
+	for (i = 0; i < buf->nsegs; i++)
+		pci_dma_sync_single_for_cpu(sc->sc_pcidev, buf->segs[i].ds_addr,
+				buf->segs[i].ds_len, PCI_DMA_BIDIRECTIONAL);
+}
+#endif
+
+static void
+pci_unmap_operand(struct safe_softc *sc, struct safe_operand *buf)
+{
+	int i;
+	DPRINTF(("%s()\n", __FUNCTION__));
+	for (i = 0; i < buf->nsegs; i++) {
+		if (buf->segs[i].ds_tlen) {
+			DPRINTF(("%s - unmap %d 0x%x %d\n", __FUNCTION__, i, buf->segs[i].ds_addr, buf->segs[i].ds_tlen));
+			pci_unmap_single(sc->sc_pcidev, buf->segs[i].ds_addr,
+					buf->segs[i].ds_tlen, PCI_DMA_BIDIRECTIONAL);
+			DPRINTF(("%s - unmap %d 0x%x %d done\n", __FUNCTION__, i, buf->segs[i].ds_addr, buf->segs[i].ds_tlen));
+		}
+		buf->segs[i].ds_addr = 0;
+		buf->segs[i].ds_len = 0;
+		buf->segs[i].ds_tlen = 0;
+	}
+	buf->nsegs = 0;
+	buf->mapsize = 0;
+	buf->map = 0;
+}
+
+
+/*
+ * SafeXcel Interrupt routine
+ */
+static irqreturn_t
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,19)
+safe_intr(int irq, void *arg)
+#else
+safe_intr(int irq, void *arg, struct pt_regs *regs)
+#endif
+{
+	struct safe_softc *sc = arg;
+	int stat;
+	unsigned long flags;
+
+	stat = READ_REG(sc, SAFE_HM_STAT);
+
+	DPRINTF(("%s(stat=0x%x)\n", __FUNCTION__, stat));
+
+	if (stat == 0)		/* shared irq, not for us */
+		return IRQ_NONE;
+
+	WRITE_REG(sc, SAFE_HI_CLR, stat);	/* IACK */
+
+	if ((stat & SAFE_INT_PE_DDONE)) {
+		/*
+		 * Descriptor(s) done; scan the ring and
+		 * process completed operations.
+		 */
+		spin_lock_irqsave(&sc->sc_ringmtx, flags);
+		while (sc->sc_back != sc->sc_front) {
+			struct safe_ringentry *re = sc->sc_back;
+
+#ifdef SAFE_DEBUG
+			if (debug) {
+				safe_dump_ringstate(sc, __func__);
+				safe_dump_request(sc, __func__, re);
+			}
+#endif
+			/*
+			 * safe_process marks ring entries that were allocated
+			 * but not used with a csr of zero.  This insures the
+			 * ring front pointer never needs to be set backwards
+			 * in the event that an entry is allocated but not used
+			 * because of a setup error.
+			 */
+			DPRINTF(("%s re->re_desc.d_csr=0x%x\n", __FUNCTION__, re->re_desc.d_csr));
+			if (re->re_desc.d_csr != 0) {
+				if (!SAFE_PE_CSR_IS_DONE(re->re_desc.d_csr)) {
+					DPRINTF(("%s !CSR_IS_DONE\n", __FUNCTION__));
+					break;
+				}
+				if (!SAFE_PE_LEN_IS_DONE(re->re_desc.d_len)) {
+					DPRINTF(("%s !LEN_IS_DONE\n", __FUNCTION__));
+					break;
+				}
+				sc->sc_nqchip--;
+				safe_callback(sc, re);
+			}
+			if (++(sc->sc_back) == sc->sc_ringtop)
+				sc->sc_back = sc->sc_ring;
+		}
+		spin_unlock_irqrestore(&sc->sc_ringmtx, flags);
+	}
+
+	/*
+	 * Check to see if we got any DMA Error
+	 */
+	if (stat & SAFE_INT_PE_ERROR) {
+		printk("%s: dmaerr dmastat %08x\n", device_get_nameunit(sc->sc_dev),
+				(int)READ_REG(sc, SAFE_PE_DMASTAT));
+		safestats.st_dmaerr++;
+		safe_totalreset(sc);
+#if 0
+		safe_feed(sc);
+#endif
+	}
+
+	if (sc->sc_needwakeup) {		/* XXX check high watermark */
+		int wakeup = sc->sc_needwakeup & (CRYPTO_SYMQ|CRYPTO_ASYMQ);
+		DPRINTF(("%s: wakeup crypto %x\n", __func__,
+			sc->sc_needwakeup));
+		sc->sc_needwakeup &= ~wakeup;
+		crypto_unblock(sc->sc_cid, wakeup);
+	}
+	
+	return IRQ_HANDLED;
+}
+
+/*
+ * safe_feed() - post a request to chip
+ */
+static void
+safe_feed(struct safe_softc *sc, struct safe_ringentry *re)
+{
+	DPRINTF(("%s()\n", __FUNCTION__));
+#ifdef SAFE_DEBUG
+	if (debug) {
+		safe_dump_ringstate(sc, __func__);
+		safe_dump_request(sc, __func__, re);
+	}
+#endif
+	sc->sc_nqchip++;
+	if (sc->sc_nqchip > safestats.st_maxqchip)
+		safestats.st_maxqchip = sc->sc_nqchip;
+	/* poke h/w to check descriptor ring, any value can be written */
+	WRITE_REG(sc, SAFE_HI_RD_DESCR, 0);
+}
+
+#define	N(a)	(sizeof(a) / sizeof (a[0]))
+static void
+safe_setup_enckey(struct safe_session *ses, caddr_t key)
+{
+	int i;
+
+	bcopy(key, ses->ses_key, ses->ses_klen / 8);
+
+	/* PE is little-endian, insure proper byte order */
+	for (i = 0; i < N(ses->ses_key); i++)
+		ses->ses_key[i] = htole32(ses->ses_key[i]);
+}
+
+static void
+safe_setup_mackey(struct safe_session *ses, int algo, caddr_t key, int klen)
+{
+#ifdef HMAC_HACK
+	MD5_CTX md5ctx;
+	SHA1_CTX sha1ctx;
+	int i;
+
+
+	for (i = 0; i < klen; i++)
+		key[i] ^= HMAC_IPAD_VAL;
+
+	if (algo == CRYPTO_MD5_HMAC) {
+		MD5Init(&md5ctx);
+		MD5Update(&md5ctx, key, klen);
+		MD5Update(&md5ctx, hmac_ipad_buffer, MD5_HMAC_BLOCK_LEN - klen);
+		bcopy(md5ctx.md5_st8, ses->ses_hminner, sizeof(md5ctx.md5_st8));
+	} else {
+		SHA1Init(&sha1ctx);
+		SHA1Update(&sha1ctx, key, klen);
+		SHA1Update(&sha1ctx, hmac_ipad_buffer,
+		    SHA1_HMAC_BLOCK_LEN - klen);
+		bcopy(sha1ctx.h.b32, ses->ses_hminner, sizeof(sha1ctx.h.b32));
+	}
+
+	for (i = 0; i < klen; i++)
+		key[i] ^= (HMAC_IPAD_VAL ^ HMAC_OPAD_VAL);
+
+	if (algo == CRYPTO_MD5_HMAC) {
+		MD5Init(&md5ctx);
+		MD5Update(&md5ctx, key, klen);
+		MD5Update(&md5ctx, hmac_opad_buffer, MD5_HMAC_BLOCK_LEN - klen);
+		bcopy(md5ctx.md5_st8, ses->ses_hmouter, sizeof(md5ctx.md5_st8));
+	} else {
+		SHA1Init(&sha1ctx);
+		SHA1Update(&sha1ctx, key, klen);
+		SHA1Update(&sha1ctx, hmac_opad_buffer,
+		    SHA1_HMAC_BLOCK_LEN - klen);
+		bcopy(sha1ctx.h.b32, ses->ses_hmouter, sizeof(sha1ctx.h.b32));
+	}
+
+	for (i = 0; i < klen; i++)
+		key[i] ^= HMAC_OPAD_VAL;
+
+#if 0
+	/*
+	 * this code prevents SHA working on a BE host,
+	 * so it is obviously wrong.  I think the byte
+	 * swap setup we do with the chip fixes this for us
+	 */
+
+	/* PE is little-endian, insure proper byte order */
+	for (i = 0; i < N(ses->ses_hminner); i++) {
+		ses->ses_hminner[i] = htole32(ses->ses_hminner[i]);
+		ses->ses_hmouter[i] = htole32(ses->ses_hmouter[i]);
+	}
+#endif
+#else /* HMAC_HACK */
+	printk("safe: md5/sha not implemented\n");
+#endif /* HMAC_HACK */
+}
+#undef N
+
+/*
+ * Allocate a new 'session' and return an encoded session id.  'sidp'
+ * contains our registration id, and should contain an encoded session
+ * id on successful allocation.
+ */
+static int
+safe_newsession(device_t dev, u_int32_t *sidp, struct cryptoini *cri)
+{
+	struct safe_softc *sc = device_get_softc(dev);
+	struct cryptoini *c, *encini = NULL, *macini = NULL;
+	struct safe_session *ses = NULL;
+	int sesn;
+
+	DPRINTF(("%s()\n", __FUNCTION__));
+
+	if (sidp == NULL || cri == NULL || sc == NULL)
+		return (EINVAL);
+
+	for (c = cri; c != NULL; c = c->cri_next) {
+		if (c->cri_alg == CRYPTO_MD5_HMAC ||
+		    c->cri_alg == CRYPTO_SHA1_HMAC ||
+		    c->cri_alg == CRYPTO_NULL_HMAC) {
+			if (macini)
+				return (EINVAL);
+			macini = c;
+		} else if (c->cri_alg == CRYPTO_DES_CBC ||
+		    c->cri_alg == CRYPTO_3DES_CBC ||
+		    c->cri_alg == CRYPTO_AES_CBC ||
+		    c->cri_alg == CRYPTO_NULL_CBC) {
+			if (encini)
+				return (EINVAL);
+			encini = c;
+		} else
+			return (EINVAL);
+	}
+	if (encini == NULL && macini == NULL)
+		return (EINVAL);
+	if (encini) {			/* validate key length */
+		switch (encini->cri_alg) {
+		case CRYPTO_DES_CBC:
+			if (encini->cri_klen != 64)
+				return (EINVAL);
+			break;
+		case CRYPTO_3DES_CBC:
+			if (encini->cri_klen != 192)
+				return (EINVAL);
+			break;
+		case CRYPTO_AES_CBC:
+			if (encini->cri_klen != 128 &&
+			    encini->cri_klen != 192 &&
+			    encini->cri_klen != 256)
+				return (EINVAL);
+			break;
+		}
+	}
+
+	if (sc->sc_sessions == NULL) {
+		ses = sc->sc_sessions = (struct safe_session *)
+			kmalloc(sizeof(struct safe_session), SLAB_ATOMIC);
+		if (ses == NULL)
+			return (ENOMEM);
+		memset(ses, 0, sizeof(struct safe_session));
+		sesn = 0;
+		sc->sc_nsessions = 1;
+	} else {
+		for (sesn = 0; sesn < sc->sc_nsessions; sesn++) {
+			if (sc->sc_sessions[sesn].ses_used == 0) {
+				ses = &sc->sc_sessions[sesn];
+				break;
+			}
+		}
+
+		if (ses == NULL) {
+			sesn = sc->sc_nsessions;
+			ses = (struct safe_session *)
+				kmalloc((sesn + 1) * sizeof(struct safe_session), SLAB_ATOMIC);
+			if (ses == NULL)
+				return (ENOMEM);
+			memset(ses, 0, (sesn + 1) * sizeof(struct safe_session));
+			bcopy(sc->sc_sessions, ses, sesn *
+			    sizeof(struct safe_session));
+			bzero(sc->sc_sessions, sesn *
+			    sizeof(struct safe_session));
+			kfree(sc->sc_sessions);
+			sc->sc_sessions = ses;
+			ses = &sc->sc_sessions[sesn];
+			sc->sc_nsessions++;
+		}
+	}
+
+	bzero(ses, sizeof(struct safe_session));
+	ses->ses_used = 1;
+
+	if (encini) {
+		/* get an IV */
+		/* XXX may read fewer than requested */
+		read_random(ses->ses_iv, sizeof(ses->ses_iv));
+
+		ses->ses_klen = encini->cri_klen;
+		if (encini->cri_key != NULL)
+			safe_setup_enckey(ses, encini->cri_key);
+	}
+
+	if (macini) {
+		ses->ses_mlen = macini->cri_mlen;
+		if (ses->ses_mlen == 0) {
+			if (macini->cri_alg == CRYPTO_MD5_HMAC)
+				ses->ses_mlen = MD5_HASH_LEN;
+			else
+				ses->ses_mlen = SHA1_HASH_LEN;
+		}
+
+		if (macini->cri_key != NULL) {
+			safe_setup_mackey(ses, macini->cri_alg, macini->cri_key,
+			    macini->cri_klen / 8);
+		}
+	}
+
+	*sidp = SAFE_SID(device_get_unit(sc->sc_dev), sesn);
+	return (0);
+}
+
+/*
+ * Deallocate a session.
+ */
+static int
+safe_freesession(device_t dev, u_int64_t tid)
+{
+	struct safe_softc *sc = device_get_softc(dev);
+	int session, ret;
+	u_int32_t sid = ((u_int32_t) tid) & 0xffffffff;
+
+	DPRINTF(("%s()\n", __FUNCTION__));
+
+	if (sc == NULL)
+		return (EINVAL);
+
+	session = SAFE_SESSION(sid);
+	if (session < sc->sc_nsessions) {
+		bzero(&sc->sc_sessions[session], sizeof(sc->sc_sessions[session]));
+		ret = 0;
+	} else
+		ret = EINVAL;
+	return (ret);
+}
+
+
+static int
+safe_process(device_t dev, struct cryptop *crp, int hint)
+{
+	struct safe_softc *sc = device_get_softc(dev);
+	int err = 0, i, nicealign, uniform;
+	struct cryptodesc *crd1, *crd2, *maccrd, *enccrd;
+	int bypass, oplen, ivsize;
+	caddr_t iv;
+	int16_t coffset;
+	struct safe_session *ses;
+	struct safe_ringentry *re;
+	struct safe_sarec *sa;
+	struct safe_pdesc *pd;
+	u_int32_t cmd0, cmd1, staterec;
+	unsigned long flags;
+
+	DPRINTF(("%s()\n", __FUNCTION__));
+
+	if (crp == NULL || crp->crp_callback == NULL || sc == NULL) {
+		safestats.st_invalid++;
+		return (EINVAL);
+	}
+	if (SAFE_SESSION(crp->crp_sid) >= sc->sc_nsessions) {
+		safestats.st_badsession++;
+		return (EINVAL);
+	}
+
+	spin_lock_irqsave(&sc->sc_ringmtx, flags);
+	if (sc->sc_front == sc->sc_back && sc->sc_nqchip != 0) {
+		safestats.st_ringfull++;
+		sc->sc_needwakeup |= CRYPTO_SYMQ;
+		spin_unlock_irqrestore(&sc->sc_ringmtx, flags);
+		return (ERESTART);
+	}
+	re = sc->sc_front;
+
+	staterec = re->re_sa.sa_staterec;	/* save */
+	/* NB: zero everything but the PE descriptor */
+	bzero(&re->re_sa, sizeof(struct safe_ringentry) - sizeof(re->re_desc));
+	re->re_sa.sa_staterec = staterec;	/* restore */
+
+	re->re_crp = crp;
+	re->re_sesn = SAFE_SESSION(crp->crp_sid);
+
+	re->re_src.nsegs = 0;
+	re->re_dst.nsegs = 0;
+
+	if (crp->crp_flags & CRYPTO_F_SKBUF) {
+		re->re_src_skb = (struct sk_buff *)crp->crp_buf;
+		re->re_dst_skb = (struct sk_buff *)crp->crp_buf;
+	} else if (crp->crp_flags & CRYPTO_F_IOV) {
+		re->re_src_io = (struct uio *)crp->crp_buf;
+		re->re_dst_io = (struct uio *)crp->crp_buf;
+	} else {
+		safestats.st_badflags++;
+		err = EINVAL;
+		goto errout;	/* XXX we don't handle contiguous blocks! */
+	}
+
+	sa = &re->re_sa;
+	ses = &sc->sc_sessions[re->re_sesn];
+
+	crd1 = crp->crp_desc;
+	if (crd1 == NULL) {
+		safestats.st_nodesc++;
+		err = EINVAL;
+		goto errout;
+	}
+	crd2 = crd1->crd_next;
+
+	cmd0 = SAFE_SA_CMD0_BASIC;		/* basic group operation */
+	cmd1 = 0;
+	if (crd2 == NULL) {
+		if (crd1->crd_alg == CRYPTO_MD5_HMAC ||
+		    crd1->crd_alg == CRYPTO_SHA1_HMAC ||
+		    crd1->crd_alg == CRYPTO_NULL_HMAC) {
+			maccrd = crd1;
+			enccrd = NULL;
+			cmd0 |= SAFE_SA_CMD0_OP_HASH;
+		} else if (crd1->crd_alg == CRYPTO_DES_CBC ||
+		    crd1->crd_alg == CRYPTO_3DES_CBC ||
+		    crd1->crd_alg == CRYPTO_AES_CBC ||
+		    crd1->crd_alg == CRYPTO_NULL_CBC) {
+			maccrd = NULL;
+			enccrd = crd1;
+			cmd0 |= SAFE_SA_CMD0_OP_CRYPT;
+		} else {
+			safestats.st_badalg++;
+			err = EINVAL;
+			goto errout;
+		}
+	} else {
+		if ((crd1->crd_alg == CRYPTO_MD5_HMAC ||
+		    crd1->crd_alg == CRYPTO_SHA1_HMAC ||
+		    crd1->crd_alg == CRYPTO_NULL_HMAC) &&
+		    (crd2->crd_alg == CRYPTO_DES_CBC ||
+			crd2->crd_alg == CRYPTO_3DES_CBC ||
+		        crd2->crd_alg == CRYPTO_AES_CBC ||
+		        crd2->crd_alg == CRYPTO_NULL_CBC) &&
+		    ((crd2->crd_flags & CRD_F_ENCRYPT) == 0)) {
+			maccrd = crd1;
+			enccrd = crd2;
+		} else if ((crd1->crd_alg == CRYPTO_DES_CBC ||
+		    crd1->crd_alg == CRYPTO_3DES_CBC ||
+		    crd1->crd_alg == CRYPTO_AES_CBC ||
+		    crd1->crd_alg == CRYPTO_NULL_CBC) &&
+		    (crd2->crd_alg == CRYPTO_MD5_HMAC ||
+			crd2->crd_alg == CRYPTO_SHA1_HMAC ||
+			crd2->crd_alg == CRYPTO_NULL_HMAC) &&
+		    (crd1->crd_flags & CRD_F_ENCRYPT)) {
+			enccrd = crd1;
+			maccrd = crd2;
+		} else {
+			safestats.st_badalg++;
+			err = EINVAL;
+			goto errout;
+		}
+		cmd0 |= SAFE_SA_CMD0_OP_BOTH;
+	}
+
+	if (enccrd) {
+		if (enccrd->crd_flags & CRD_F_KEY_EXPLICIT)
+			safe_setup_enckey(ses, enccrd->crd_key);
+
+		if (enccrd->crd_alg == CRYPTO_DES_CBC) {
+			cmd0 |= SAFE_SA_CMD0_DES;
+			cmd1 |= SAFE_SA_CMD1_CBC;
+			ivsize = 2*sizeof(u_int32_t);
+		} else if (enccrd->crd_alg == CRYPTO_3DES_CBC) {
+			cmd0 |= SAFE_SA_CMD0_3DES;
+			cmd1 |= SAFE_SA_CMD1_CBC;
+			ivsize = 2*sizeof(u_int32_t);
+		} else if (enccrd->crd_alg == CRYPTO_AES_CBC) {
+			cmd0 |= SAFE_SA_CMD0_AES;
+			cmd1 |= SAFE_SA_CMD1_CBC;
+			if (ses->ses_klen == 128)
+			     cmd1 |=  SAFE_SA_CMD1_AES128;
+			else if (ses->ses_klen == 192)
+			     cmd1 |=  SAFE_SA_CMD1_AES192;
+			else
+			     cmd1 |=  SAFE_SA_CMD1_AES256;
+			ivsize = 4*sizeof(u_int32_t);
+		} else {
+			cmd0 |= SAFE_SA_CMD0_CRYPT_NULL;
+			ivsize = 0;
+		}
+
+		/*
+		 * Setup encrypt/decrypt state.  When using basic ops
+		 * we can't use an inline IV because hash/crypt offset
+		 * must be from the end of the IV to the start of the
+		 * crypt data and this leaves out the preceding header
+		 * from the hash calculation.  Instead we place the IV
+		 * in the state record and set the hash/crypt offset to
+		 * copy both the header+IV.
+		 */
+		if (enccrd->crd_flags & CRD_F_ENCRYPT) {
+			cmd0 |= SAFE_SA_CMD0_OUTBOUND;
+
+			if (enccrd->crd_flags & CRD_F_IV_EXPLICIT)
+				iv = enccrd->crd_iv;
+			else
+				iv = (caddr_t) ses->ses_iv;
+			if ((enccrd->crd_flags & CRD_F_IV_PRESENT) == 0) {
+				crypto_copyback(crp->crp_flags, crp->crp_buf,
+				    enccrd->crd_inject, ivsize, iv);
+			}
+			bcopy(iv, re->re_sastate.sa_saved_iv, ivsize);
+			/* make iv LE */
+			for (i = 0; i < ivsize/sizeof(re->re_sastate.sa_saved_iv[0]); i++)
+				re->re_sastate.sa_saved_iv[i] =
+					cpu_to_le32(re->re_sastate.sa_saved_iv[i]);
+			cmd0 |= SAFE_SA_CMD0_IVLD_STATE | SAFE_SA_CMD0_SAVEIV;
+			re->re_flags |= SAFE_QFLAGS_COPYOUTIV;
+		} else {
+			cmd0 |= SAFE_SA_CMD0_INBOUND;
+
+			if (enccrd->crd_flags & CRD_F_IV_EXPLICIT) {
+				bcopy(enccrd->crd_iv,
+					re->re_sastate.sa_saved_iv, ivsize);
+			} else {
+				crypto_copydata(crp->crp_flags, crp->crp_buf,
+				    enccrd->crd_inject, ivsize,
+				    (caddr_t)re->re_sastate.sa_saved_iv);
+			}
+			/* make iv LE */
+			for (i = 0; i < ivsize/sizeof(re->re_sastate.sa_saved_iv[0]); i++)
+				re->re_sastate.sa_saved_iv[i] =
+					cpu_to_le32(re->re_sastate.sa_saved_iv[i]);
+			cmd0 |= SAFE_SA_CMD0_IVLD_STATE;
+		}
+		/*
+		 * For basic encryption use the zero pad algorithm.
+		 * This pads results to an 8-byte boundary and
+		 * suppresses padding verification for inbound (i.e.
+		 * decrypt) operations.
+		 *
+		 * NB: Not sure if the 8-byte pad boundary is a problem.
+		 */
+		cmd0 |= SAFE_SA_CMD0_PAD_ZERO;
+
+		/* XXX assert key bufs have the same size */
+		bcopy(ses->ses_key, sa->sa_key, sizeof(sa->sa_key));
+	}
+
+	if (maccrd) {
+		if (maccrd->crd_flags & CRD_F_KEY_EXPLICIT) {
+			safe_setup_mackey(ses, maccrd->crd_alg,
+			    maccrd->crd_key, maccrd->crd_klen / 8);
+		}
+
+		if (maccrd->crd_alg == CRYPTO_MD5_HMAC) {
+			cmd0 |= SAFE_SA_CMD0_MD5;
+			cmd1 |= SAFE_SA_CMD1_HMAC;	/* NB: enable HMAC */
+		} else if (maccrd->crd_alg == CRYPTO_SHA1_HMAC) {
+			cmd0 |= SAFE_SA_CMD0_SHA1;
+			cmd1 |= SAFE_SA_CMD1_HMAC;	/* NB: enable HMAC */
+		} else {
+			cmd0 |= SAFE_SA_CMD0_HASH_NULL;
+		}
+		/*
+		 * Digest data is loaded from the SA and the hash
+		 * result is saved to the state block where we
+		 * retrieve it for return to the caller.
+		 */
+		/* XXX assert digest bufs have the same size */
+		bcopy(ses->ses_hminner, sa->sa_indigest,
+			sizeof(sa->sa_indigest));
+		bcopy(ses->ses_hmouter, sa->sa_outdigest,
+			sizeof(sa->sa_outdigest));
+
+		cmd0 |= SAFE_SA_CMD0_HSLD_SA | SAFE_SA_CMD0_SAVEHASH;
+		re->re_flags |= SAFE_QFLAGS_COPYOUTICV;
+	}
+
+	if (enccrd && maccrd) {
+		/*
+		 * The offset from hash data to the start of
+		 * crypt data is the difference in the skips.
+		 */
+		bypass = maccrd->crd_skip;
+		coffset = enccrd->crd_skip - maccrd->crd_skip;
+		if (coffset < 0) {
+			DPRINTF(("%s: hash does not precede crypt; "
+				"mac skip %u enc skip %u\n",
+				__func__, maccrd->crd_skip, enccrd->crd_skip));
+			safestats.st_skipmismatch++;
+			err = EINVAL;
+			goto errout;
+		}
+		oplen = enccrd->crd_skip + enccrd->crd_len;
+		if (maccrd->crd_skip + maccrd->crd_len != oplen) {
+			DPRINTF(("%s: hash amount %u != crypt amount %u\n",
+				__func__, maccrd->crd_skip + maccrd->crd_len,
+				oplen));
+			safestats.st_lenmismatch++;
+			err = EINVAL;
+			goto errout;
+		}
+#ifdef SAFE_DEBUG
+		if (debug) {
+			printf("mac: skip %d, len %d, inject %d\n",
+			    maccrd->crd_skip, maccrd->crd_len,
+			    maccrd->crd_inject);
+			printf("enc: skip %d, len %d, inject %d\n",
+			    enccrd->crd_skip, enccrd->crd_len,
+			    enccrd->crd_inject);
+			printf("bypass %d coffset %d oplen %d\n",
+				bypass, coffset, oplen);
+		}
+#endif
+		if (coffset & 3) {	/* offset must be 32-bit aligned */
+			DPRINTF(("%s: coffset %u misaligned\n",
+				__func__, coffset));
+			safestats.st_coffmisaligned++;
+			err = EINVAL;
+			goto errout;
+		}
+		coffset >>= 2;
+		if (coffset > 255) {	/* offset must be <256 dwords */
+			DPRINTF(("%s: coffset %u too big\n",
+				__func__, coffset));
+			safestats.st_cofftoobig++;
+			err = EINVAL;
+			goto errout;
+		}
+		/*
+		 * Tell the hardware to copy the header to the output.
+		 * The header is defined as the data from the end of
+		 * the bypass to the start of data to be encrypted. 
+		 * Typically this is the inline IV.  Note that you need
+		 * to do this even if src+dst are the same; it appears
+		 * that w/o this bit the crypted data is written
+		 * immediately after the bypass data.
+		 */
+		cmd1 |= SAFE_SA_CMD1_HDRCOPY;
+		/*
+		 * Disable IP header mutable bit handling.  This is
+		 * needed to get correct HMAC calculations.
+		 */
+		cmd1 |= SAFE_SA_CMD1_MUTABLE;
+	} else {
+		if (enccrd) {
+			bypass = enccrd->crd_skip;
+			oplen = bypass + enccrd->crd_len;
+		} else {
+			bypass = maccrd->crd_skip;
+			oplen = bypass + maccrd->crd_len;
+		}
+		coffset = 0;
+	}
+	/* XXX verify multiple of 4 when using s/g */
+	if (bypass > 96) {		/* bypass offset must be <= 96 bytes */
+		DPRINTF(("%s: bypass %u too big\n", __func__, bypass));
+		safestats.st_bypasstoobig++;
+		err = EINVAL;
+		goto errout;
+	}
+
+	if (crp->crp_flags & CRYPTO_F_SKBUF) {
+		if (pci_map_skb(sc, &re->re_src, re->re_src_skb)) {
+			safestats.st_noload++;
+			err = ENOMEM;
+			goto errout;
+		}
+	} else if (crp->crp_flags & CRYPTO_F_IOV) {
+		if (pci_map_uio(sc, &re->re_src, re->re_src_io)) {
+			safestats.st_noload++;
+			err = ENOMEM;
+			goto errout;
+		}
+	}
+	nicealign = safe_dmamap_aligned(sc, &re->re_src);
+	uniform = safe_dmamap_uniform(sc, &re->re_src);
+
+	DPRINTF(("src nicealign %u uniform %u nsegs %u\n",
+		nicealign, uniform, re->re_src.nsegs));
+	if (re->re_src.nsegs > 1) {
+		re->re_desc.d_src = sc->sc_spalloc.dma_paddr +
+			((caddr_t) sc->sc_spfree - (caddr_t) sc->sc_spring);
+		for (i = 0; i < re->re_src_nsegs; i++) {
+			/* NB: no need to check if there's space */
+			pd = sc->sc_spfree;
+			if (++(sc->sc_spfree) == sc->sc_springtop)
+				sc->sc_spfree = sc->sc_spring;
+
+			KASSERT((pd->pd_flags&3) == 0 ||
+				(pd->pd_flags&3) == SAFE_PD_DONE,
+				("bogus source particle descriptor; flags %x",
+				pd->pd_flags));
+			pd->pd_addr = re->re_src_segs[i].ds_addr;
+			pd->pd_size = re->re_src_segs[i].ds_len;
+			pd->pd_flags = SAFE_PD_READY;
+		}
+		cmd0 |= SAFE_SA_CMD0_IGATHER;
+	} else {
+		/*
+		 * No need for gather, reference the operand directly.
+		 */
+		re->re_desc.d_src = re->re_src_segs[0].ds_addr;
+	}
+
+	if (enccrd == NULL && maccrd != NULL) {
+		/*
+		 * Hash op; no destination needed.
+		 */
+	} else {
+		if (crp->crp_flags & (CRYPTO_F_IOV|CRYPTO_F_SKBUF)) {
+			if (!nicealign) {
+				safestats.st_iovmisaligned++;
+				err = EINVAL;
+				goto errout;
+			}
+			if (uniform != 1) {
+				device_printf(sc->sc_dev, "!uniform source\n");
+				if (!uniform) {
+					/*
+					 * There's no way to handle the DMA
+					 * requirements with this uio.  We
+					 * could create a separate DMA area for
+					 * the result and then copy it back,
+					 * but for now we just bail and return
+					 * an error.  Note that uio requests
+					 * > SAFE_MAX_DSIZE are handled because
+					 * the DMA map and segment list for the
+					 * destination wil result in a
+					 * destination particle list that does
+					 * the necessary scatter DMA.
+					 */ 
+					safestats.st_iovnotuniform++;
+					err = EINVAL;
+					goto errout;
+				}
+			} else
+				re->re_dst = re->re_src;
+		} else {
+			safestats.st_badflags++;
+			err = EINVAL;
+			goto errout;
+		}
+
+		if (re->re_dst.nsegs > 1) {
+			re->re_desc.d_dst = sc->sc_dpalloc.dma_paddr +
+			    ((caddr_t) sc->sc_dpfree - (caddr_t) sc->sc_dpring);
+			for (i = 0; i < re->re_dst_nsegs; i++) {
+				pd = sc->sc_dpfree;
+				KASSERT((pd->pd_flags&3) == 0 ||
+					(pd->pd_flags&3) == SAFE_PD_DONE,
+					("bogus dest particle descriptor; flags %x",
+						pd->pd_flags));
+				if (++(sc->sc_dpfree) == sc->sc_dpringtop)
+					sc->sc_dpfree = sc->sc_dpring;
+				pd->pd_addr = re->re_dst_segs[i].ds_addr;
+				pd->pd_flags = SAFE_PD_READY;
+			}
+			cmd0 |= SAFE_SA_CMD0_OSCATTER;
+		} else {
+			/*
+			 * No need for scatter, reference the operand directly.
+			 */
+			re->re_desc.d_dst = re->re_dst_segs[0].ds_addr;
+		}
+	}
+
+	/*
+	 * All done with setup; fillin the SA command words
+	 * and the packet engine descriptor.  The operation
+	 * is now ready for submission to the hardware.
+	 */
+	sa->sa_cmd0 = cmd0 | SAFE_SA_CMD0_IPCI | SAFE_SA_CMD0_OPCI;
+	sa->sa_cmd1 = cmd1
+		    | (coffset << SAFE_SA_CMD1_OFFSET_S)
+		    | SAFE_SA_CMD1_SAREV1	/* Rev 1 SA data structure */
+		    | SAFE_SA_CMD1_SRPCI
+		    ;
+	/*
+	 * NB: the order of writes is important here.  In case the
+	 * chip is scanning the ring because of an outstanding request
+	 * it might nab this one too.  In that case we need to make
+	 * sure the setup is complete before we write the length
+	 * field of the descriptor as it signals the descriptor is
+	 * ready for processing.
+	 */
+	re->re_desc.d_csr = SAFE_PE_CSR_READY | SAFE_PE_CSR_SAPCI;
+	if (maccrd)
+		re->re_desc.d_csr |= SAFE_PE_CSR_LOADSA | SAFE_PE_CSR_HASHFINAL;
+	wmb();
+	re->re_desc.d_len = oplen
+			  | SAFE_PE_LEN_READY
+			  | (bypass << SAFE_PE_LEN_BYPASS_S)
+			  ;
+
+	safestats.st_ipackets++;
+	safestats.st_ibytes += oplen;
+
+	if (++(sc->sc_front) == sc->sc_ringtop)
+		sc->sc_front = sc->sc_ring;
+
+	/* XXX honor batching */
+	safe_feed(sc, re);
+	spin_unlock_irqrestore(&sc->sc_ringmtx, flags);
+	return (0);
+
+errout:
+	if (re->re_src.map != re->re_dst.map)
+		pci_unmap_operand(sc, &re->re_dst);
+	if (re->re_src.map)
+		pci_unmap_operand(sc, &re->re_src);
+	spin_unlock_irqrestore(&sc->sc_ringmtx, flags);
+	if (err != ERESTART) {
+		crp->crp_etype = err;
+		crypto_done(crp);
+	} else {
+		sc->sc_needwakeup |= CRYPTO_SYMQ;
+	}
+	return (err);
+}
+
+static void
+safe_callback(struct safe_softc *sc, struct safe_ringentry *re)
+{
+	struct cryptop *crp = (struct cryptop *)re->re_crp;
+	struct cryptodesc *crd;
+
+	DPRINTF(("%s()\n", __FUNCTION__));
+
+	safestats.st_opackets++;
+	safestats.st_obytes += re->re_dst.mapsize;
+
+	if (re->re_desc.d_csr & SAFE_PE_CSR_STATUS) {
+		device_printf(sc->sc_dev, "csr 0x%x cmd0 0x%x cmd1 0x%x\n",
+			re->re_desc.d_csr,
+			re->re_sa.sa_cmd0, re->re_sa.sa_cmd1);
+		safestats.st_peoperr++;
+		crp->crp_etype = EIO;		/* something more meaningful? */
+	}
+
+	if (re->re_dst.map != NULL && re->re_dst.map != re->re_src.map)
+		pci_unmap_operand(sc, &re->re_dst);
+	pci_unmap_operand(sc, &re->re_src);
+
+	/* 
+	 * If result was written to a differet mbuf chain, swap
+	 * it in as the return value and reclaim the original.
+	 */
+	if ((crp->crp_flags & CRYPTO_F_SKBUF) && re->re_src_skb != re->re_dst_skb) {
+		device_printf(sc->sc_dev, "no CRYPTO_F_SKBUF swapping support\n");
+		/* kfree_skb(skb) */
+		/* crp->crp_buf = (caddr_t)re->re_dst_skb */
+		return;
+	}
+
+	if (re->re_flags & SAFE_QFLAGS_COPYOUTIV) {
+		/* copy out IV for future use */
+		for (crd = crp->crp_desc; crd; crd = crd->crd_next) {
+			int i;
+			int ivsize;
+
+			if (crd->crd_alg == CRYPTO_DES_CBC ||
+			    crd->crd_alg == CRYPTO_3DES_CBC) {
+				ivsize = 2*sizeof(u_int32_t);
+			} else if (crd->crd_alg == CRYPTO_AES_CBC) {
+				ivsize = 4*sizeof(u_int32_t);
+			} else
+				continue;
+			crypto_copydata(crp->crp_flags, crp->crp_buf,
+			    crd->crd_skip + crd->crd_len - ivsize, ivsize,
+			    (caddr_t)sc->sc_sessions[re->re_sesn].ses_iv);
+			for (i = 0;
+					i < ivsize/sizeof(sc->sc_sessions[re->re_sesn].ses_iv[0]);
+					i++)
+				sc->sc_sessions[re->re_sesn].ses_iv[i] =
+					cpu_to_le32(sc->sc_sessions[re->re_sesn].ses_iv[i]);
+			break;
+		}
+	}
+
+	if (re->re_flags & SAFE_QFLAGS_COPYOUTICV) {
+		/* copy out ICV result */
+		for (crd = crp->crp_desc; crd; crd = crd->crd_next) {
+			if (!(crd->crd_alg == CRYPTO_MD5_HMAC ||
+			    crd->crd_alg == CRYPTO_SHA1_HMAC ||
+			    crd->crd_alg == CRYPTO_NULL_HMAC))
+				continue;
+			if (crd->crd_alg == CRYPTO_SHA1_HMAC) {
+				/*
+				 * SHA-1 ICV's are byte-swapped; fix 'em up
+				 * before copy them to their destination.
+				 */
+				re->re_sastate.sa_saved_indigest[0] =
+					cpu_to_be32(re->re_sastate.sa_saved_indigest[0]);
+				re->re_sastate.sa_saved_indigest[1] = 
+					cpu_to_be32(re->re_sastate.sa_saved_indigest[1]);
+				re->re_sastate.sa_saved_indigest[2] =
+					cpu_to_be32(re->re_sastate.sa_saved_indigest[2]);
+			} else {
+				re->re_sastate.sa_saved_indigest[0] =
+					cpu_to_le32(re->re_sastate.sa_saved_indigest[0]);
+				re->re_sastate.sa_saved_indigest[1] = 
+					cpu_to_le32(re->re_sastate.sa_saved_indigest[1]);
+				re->re_sastate.sa_saved_indigest[2] =
+					cpu_to_le32(re->re_sastate.sa_saved_indigest[2]);
+			}
+			crypto_copyback(crp->crp_flags, crp->crp_buf,
+			    crd->crd_inject,
+			    sc->sc_sessions[re->re_sesn].ses_mlen,
+			    (caddr_t)re->re_sastate.sa_saved_indigest);
+			break;
+		}
+	}
+	crypto_done(crp);
+}
+
+
+#if defined(CONFIG_OCF_RANDOMHARVEST) && !defined(SAFE_NO_RNG)
+#define	SAFE_RNG_MAXWAIT	1000
+
+static void
+safe_rng_init(struct safe_softc *sc)
+{
+	u_int32_t w, v;
+	int i;
+
+	DPRINTF(("%s()\n", __FUNCTION__));
+
+	WRITE_REG(sc, SAFE_RNG_CTRL, 0);
+	/* use default value according to the manual */
+	WRITE_REG(sc, SAFE_RNG_CNFG, 0x834);	/* magic from SafeNet */
+	WRITE_REG(sc, SAFE_RNG_ALM_CNT, 0);
+
+	/*
+	 * There is a bug in rev 1.0 of the 1140 that when the RNG
+	 * is brought out of reset the ready status flag does not
+	 * work until the RNG has finished its internal initialization.
+	 *
+	 * So in order to determine the device is through its
+	 * initialization we must read the data register, using the
+	 * status reg in the read in case it is initialized.  Then read
+	 * the data register until it changes from the first read.
+	 * Once it changes read the data register until it changes
+	 * again.  At this time the RNG is considered initialized. 
+	 * This could take between 750ms - 1000ms in time.
+	 */
+	i = 0;
+	w = READ_REG(sc, SAFE_RNG_OUT);
+	do {
+		v = READ_REG(sc, SAFE_RNG_OUT);
+		if (v != w) {
+			w = v;
+			break;
+		}
+		DELAY(10);
+	} while (++i < SAFE_RNG_MAXWAIT);
+
+	/* Wait Until data changes again */
+	i = 0;
+	do {
+		v = READ_REG(sc, SAFE_RNG_OUT);
+		if (v != w)
+			break;
+		DELAY(10);
+	} while (++i < SAFE_RNG_MAXWAIT);
+}
+
+static __inline void
+safe_rng_disable_short_cycle(struct safe_softc *sc)
+{
+	DPRINTF(("%s()\n", __FUNCTION__));
+
+	WRITE_REG(sc, SAFE_RNG_CTRL,
+		READ_REG(sc, SAFE_RNG_CTRL) &~ SAFE_RNG_CTRL_SHORTEN);
+}
+
+static __inline void
+safe_rng_enable_short_cycle(struct safe_softc *sc)
+{
+	DPRINTF(("%s()\n", __FUNCTION__));
+
+	WRITE_REG(sc, SAFE_RNG_CTRL, 
+		READ_REG(sc, SAFE_RNG_CTRL) | SAFE_RNG_CTRL_SHORTEN);
+}
+
+static __inline u_int32_t
+safe_rng_read(struct safe_softc *sc)
+{
+	int i;
+
+	i = 0;
+	while (READ_REG(sc, SAFE_RNG_STAT) != 0 && ++i < SAFE_RNG_MAXWAIT)
+		;
+	return READ_REG(sc, SAFE_RNG_OUT);
+}
+
+static int
+safe_read_random(void *arg, u_int32_t *buf, int maxwords)
+{
+	struct safe_softc *sc = (struct safe_softc *) arg;
+	int i, rc;
+
+	DPRINTF(("%s()\n", __FUNCTION__));
+	
+	safestats.st_rng++;
+	/*
+	 * Fetch the next block of data.
+	 */
+	if (maxwords > safe_rngbufsize)
+		maxwords = safe_rngbufsize;
+	if (maxwords > SAFE_RNG_MAXBUFSIZ)
+		maxwords = SAFE_RNG_MAXBUFSIZ;
+retry:
+	/* read as much as we can */
+	for (rc = 0; rc < maxwords; rc++) {
+		if (READ_REG(sc, SAFE_RNG_STAT) != 0)
+			break;
+		buf[rc] = READ_REG(sc, SAFE_RNG_OUT);
+	}
+	if (rc == 0)
+		return 0;
+	/*
+	 * Check the comparator alarm count and reset the h/w if
+	 * it exceeds our threshold.  This guards against the
+	 * hardware oscillators resonating with external signals.
+	 */
+	if (READ_REG(sc, SAFE_RNG_ALM_CNT) > safe_rngmaxalarm) {
+		u_int32_t freq_inc, w;
+
+		DPRINTF(("%s: alarm count %u exceeds threshold %u\n", __func__,
+			(unsigned)READ_REG(sc, SAFE_RNG_ALM_CNT), safe_rngmaxalarm));
+		safestats.st_rngalarm++;
+		safe_rng_enable_short_cycle(sc);
+		freq_inc = 18;
+		for (i = 0; i < 64; i++) {
+			w = READ_REG(sc, SAFE_RNG_CNFG);
+			freq_inc = ((w + freq_inc) & 0x3fL);
+			w = ((w & ~0x3fL) | freq_inc);
+			WRITE_REG(sc, SAFE_RNG_CNFG, w);
+
+			WRITE_REG(sc, SAFE_RNG_ALM_CNT, 0);
+
+			(void) safe_rng_read(sc);
+			DELAY(25);
+
+			if (READ_REG(sc, SAFE_RNG_ALM_CNT) == 0) {
+				safe_rng_disable_short_cycle(sc);
+				goto retry;
+			}
+			freq_inc = 1;
+		}
+		safe_rng_disable_short_cycle(sc);
+	} else
+		WRITE_REG(sc, SAFE_RNG_ALM_CNT, 0);
+
+	return(rc);
+}
+#endif /* defined(CONFIG_OCF_RANDOMHARVEST) && !defined(SAFE_NO_RNG) */
+
+
+/*
+ * Resets the board.  Values in the regesters are left as is
+ * from the reset (i.e. initial values are assigned elsewhere).
+ */
+static void
+safe_reset_board(struct safe_softc *sc)
+{
+	u_int32_t v;
+	/*
+	 * Reset the device.  The manual says no delay
+	 * is needed between marking and clearing reset.
+	 */
+	DPRINTF(("%s()\n", __FUNCTION__));
+
+	v = READ_REG(sc, SAFE_PE_DMACFG) &~
+		(SAFE_PE_DMACFG_PERESET | SAFE_PE_DMACFG_PDRRESET |
+		 SAFE_PE_DMACFG_SGRESET);
+	WRITE_REG(sc, SAFE_PE_DMACFG, v
+				    | SAFE_PE_DMACFG_PERESET
+				    | SAFE_PE_DMACFG_PDRRESET
+				    | SAFE_PE_DMACFG_SGRESET);
+	WRITE_REG(sc, SAFE_PE_DMACFG, v);
+}
+
+/*
+ * Initialize registers we need to touch only once.
+ */
+static void
+safe_init_board(struct safe_softc *sc)
+{
+	u_int32_t v, dwords;
+
+	DPRINTF(("%s()\n", __FUNCTION__));
+
+	v = READ_REG(sc, SAFE_PE_DMACFG);
+	v &=~ (   SAFE_PE_DMACFG_PEMODE
+			| SAFE_PE_DMACFG_FSENA		/* failsafe enable */
+			| SAFE_PE_DMACFG_GPRPCI		/* gather ring on PCI */
+			| SAFE_PE_DMACFG_SPRPCI		/* scatter ring on PCI */
+			| SAFE_PE_DMACFG_ESDESC		/* endian-swap descriptors */
+			| SAFE_PE_DMACFG_ESPDESC	/* endian-swap part. desc's */
+			| SAFE_PE_DMACFG_ESSA		/* endian-swap SA's */
+			| SAFE_PE_DMACFG_ESPACKET	/* swap the packet data */
+		  );
+	v |= SAFE_PE_DMACFG_FSENA		/* failsafe enable */
+	  |  SAFE_PE_DMACFG_GPRPCI		/* gather ring on PCI */
+	  |  SAFE_PE_DMACFG_SPRPCI		/* scatter ring on PCI */
+	  |  SAFE_PE_DMACFG_ESDESC		/* endian-swap descriptors */
+	  |  SAFE_PE_DMACFG_ESPDESC		/* endian-swap part. desc's */
+	  |  SAFE_PE_DMACFG_ESSA		/* endian-swap SA's */
+#if 0
+	  |  SAFE_PE_DMACFG_ESPACKET    /* swap the packet data */
+#endif
+	  ;
+	WRITE_REG(sc, SAFE_PE_DMACFG, v);
+
+#ifdef __BIG_ENDIAN
+	/* tell the safenet that we are 4321 and not 1234 */
+	WRITE_REG(sc, SAFE_ENDIAN, 0xe4e41b1b);
+#endif
+
+	if (sc->sc_chiprev == SAFE_REV(1,0)) {
+		/*
+		 * Avoid large PCI DMA transfers.  Rev 1.0 has a bug where
+		 * "target mode transfers" done while the chip is DMA'ing
+		 * >1020 bytes cause the hardware to lockup.  To avoid this
+		 * we reduce the max PCI transfer size and use small source
+		 * particle descriptors (<= 256 bytes).
+		 */
+		WRITE_REG(sc, SAFE_DMA_CFG, 256);
+		device_printf(sc->sc_dev,
+			"Reduce max DMA size to %u words for rev %u.%u WAR\n",
+			(unsigned) ((READ_REG(sc, SAFE_DMA_CFG)>>2) & 0xff),
+			(unsigned) SAFE_REV_MAJ(sc->sc_chiprev),
+			(unsigned) SAFE_REV_MIN(sc->sc_chiprev));
+		sc->sc_max_dsize = 256;
+	} else {
+		sc->sc_max_dsize = SAFE_MAX_DSIZE;
+	}
+
+	/* NB: operands+results are overlaid */
+	WRITE_REG(sc, SAFE_PE_PDRBASE, sc->sc_ringalloc.dma_paddr);
+	WRITE_REG(sc, SAFE_PE_RDRBASE, sc->sc_ringalloc.dma_paddr);
+	/*
+	 * Configure ring entry size and number of items in the ring.
+	 */
+	KASSERT((sizeof(struct safe_ringentry) % sizeof(u_int32_t)) == 0,
+		("PE ring entry not 32-bit aligned!"));
+	dwords = sizeof(struct safe_ringentry) / sizeof(u_int32_t);
+	WRITE_REG(sc, SAFE_PE_RINGCFG,
+		(dwords << SAFE_PE_RINGCFG_OFFSET_S) | SAFE_MAX_NQUEUE);
+	WRITE_REG(sc, SAFE_PE_RINGPOLL, 0);	/* disable polling */
+
+	WRITE_REG(sc, SAFE_PE_GRNGBASE, sc->sc_spalloc.dma_paddr);
+	WRITE_REG(sc, SAFE_PE_SRNGBASE, sc->sc_dpalloc.dma_paddr);
+	WRITE_REG(sc, SAFE_PE_PARTSIZE,
+		(SAFE_TOTAL_DPART<<16) | SAFE_TOTAL_SPART);
+	/*
+	 * NB: destination particles are fixed size.  We use
+	 *     an mbuf cluster and require all results go to
+	 *     clusters or smaller.
+	 */
+	WRITE_REG(sc, SAFE_PE_PARTCFG, sc->sc_max_dsize);
+
+	/* it's now safe to enable PE mode, do it */
+	WRITE_REG(sc, SAFE_PE_DMACFG, v | SAFE_PE_DMACFG_PEMODE);
+
+	/*
+	 * Configure hardware to use level-triggered interrupts and
+	 * to interrupt after each descriptor is processed.
+	 */
+	WRITE_REG(sc, SAFE_HI_CFG, SAFE_HI_CFG_LEVEL);
+	WRITE_REG(sc, SAFE_HI_CLR, 0xffffffff);
+	WRITE_REG(sc, SAFE_HI_DESC_CNT, 1);
+	WRITE_REG(sc, SAFE_HI_MASK, SAFE_INT_PE_DDONE | SAFE_INT_PE_ERROR);
+}
+
+
+/*
+ * Clean up after a chip crash.
+ * It is assumed that the caller in splimp()
+ */
+static void
+safe_cleanchip(struct safe_softc *sc)
+{
+	DPRINTF(("%s()\n", __FUNCTION__));
+
+	if (sc->sc_nqchip != 0) {
+		struct safe_ringentry *re = sc->sc_back;
+
+		while (re != sc->sc_front) {
+			if (re->re_desc.d_csr != 0)
+				safe_free_entry(sc, re);
+			if (++re == sc->sc_ringtop)
+				re = sc->sc_ring;
+		}
+		sc->sc_back = re;
+		sc->sc_nqchip = 0;
+	}
+}
+
+/*
+ * free a safe_q
+ * It is assumed that the caller is within splimp().
+ */
+static int
+safe_free_entry(struct safe_softc *sc, struct safe_ringentry *re)
+{
+	struct cryptop *crp;
+
+	DPRINTF(("%s()\n", __FUNCTION__));
+
+	/*
+	 * Free header MCR
+	 */
+	if ((re->re_dst_skb != NULL) && (re->re_src_skb != re->re_dst_skb))
+#ifdef NOTYET
+		m_freem(re->re_dst_m);
+#else
+		printk("%s,%d: SKB not supported\n", __FILE__, __LINE__);
+#endif
+
+	crp = (struct cryptop *)re->re_crp;
+	
+	re->re_desc.d_csr = 0;
+	
+	crp->crp_etype = EFAULT;
+	crypto_done(crp);
+	return(0);
+}
+
+/*
+ * Routine to reset the chip and clean up.
+ * It is assumed that the caller is in splimp()
+ */
+static void
+safe_totalreset(struct safe_softc *sc)
+{
+	DPRINTF(("%s()\n", __FUNCTION__));
+
+	safe_reset_board(sc);
+	safe_init_board(sc);
+	safe_cleanchip(sc);
+}
+
+/*
+ * Is the operand suitable aligned for direct DMA.  Each
+ * segment must be aligned on a 32-bit boundary and all
+ * but the last segment must be a multiple of 4 bytes.
+ */
+static int
+safe_dmamap_aligned(struct safe_softc *sc, const struct safe_operand *op)
+{
+	int i;
+
+	DPRINTF(("%s()\n", __FUNCTION__));
+
+	for (i = 0; i < op->nsegs; i++) {
+		if (op->segs[i].ds_addr & 3)
+			return (0);
+		if (i != (op->nsegs - 1) && (op->segs[i].ds_len & 3))
+			return (0);
+	}
+	return (1);
+}
+
+/*
+ * Is the operand suitable for direct DMA as the destination
+ * of an operation.  The hardware requires that each ``particle''
+ * but the last in an operation result have the same size.  We
+ * fix that size at SAFE_MAX_DSIZE bytes.  This routine returns
+ * 0 if some segment is not a multiple of of this size, 1 if all
+ * segments are exactly this size, or 2 if segments are at worst
+ * a multple of this size.
+ */
+static int
+safe_dmamap_uniform(struct safe_softc *sc, const struct safe_operand *op)
+{
+	int result = 1;
+
+	DPRINTF(("%s()\n", __FUNCTION__));
+
+	if (op->nsegs > 0) {
+		int i;
+
+		for (i = 0; i < op->nsegs-1; i++) {
+			if (op->segs[i].ds_len % sc->sc_max_dsize)
+				return (0);
+			if (op->segs[i].ds_len != sc->sc_max_dsize)
+				result = 2;
+		}
+	}
+	return (result);
+}
+
+static int
+safe_kprocess(device_t dev, struct cryptkop *krp, int hint)
+{
+	struct safe_softc *sc = device_get_softc(dev);
+	struct safe_pkq *q;
+	unsigned long flags;
+
+	DPRINTF(("%s()\n", __FUNCTION__));
+
+	if (sc == NULL) {
+		krp->krp_status = EINVAL;
+		goto err;
+	}
+
+	if (krp->krp_op != CRK_MOD_EXP) {
+		krp->krp_status = EOPNOTSUPP;
+		goto err;
+	}
+
+	q = (struct safe_pkq *) kmalloc(sizeof(*q), GFP_KERNEL);
+	if (q == NULL) {
+		krp->krp_status = ENOMEM;
+		goto err;
+	}
+	memset(q, 0, sizeof(*q));
+	q->pkq_krp = krp;
+	INIT_LIST_HEAD(&q->pkq_list);
+
+	spin_lock_irqsave(&sc->sc_pkmtx, flags);
+	list_add_tail(&q->pkq_list, &sc->sc_pkq);
+	safe_kfeed(sc);
+	spin_unlock_irqrestore(&sc->sc_pkmtx, flags);
+	return (0);
+
+err:
+	crypto_kdone(krp);
+	return (0);
+}
+
+#define	SAFE_CRK_PARAM_BASE	0
+#define	SAFE_CRK_PARAM_EXP	1
+#define	SAFE_CRK_PARAM_MOD	2
+
+static int
+safe_kstart(struct safe_softc *sc)
+{
+	struct cryptkop *krp = sc->sc_pkq_cur->pkq_krp;
+	int exp_bits, mod_bits, base_bits;
+	u_int32_t op, a_off, b_off, c_off, d_off;
+
+	DPRINTF(("%s()\n", __FUNCTION__));
+
+	if (krp->krp_iparams < 3 || krp->krp_oparams != 1) {
+		krp->krp_status = EINVAL;
+		return (1);
+	}
+
+	base_bits = safe_ksigbits(sc, &krp->krp_param[SAFE_CRK_PARAM_BASE]);
+	if (base_bits > 2048)
+		goto too_big;
+	if (base_bits <= 0)		/* 5. base not zero */
+		goto too_small;
+
+	exp_bits = safe_ksigbits(sc, &krp->krp_param[SAFE_CRK_PARAM_EXP]);
+	if (exp_bits > 2048)
+		goto too_big;
+	if (exp_bits <= 0)		/* 1. exponent word length > 0 */
+		goto too_small;		/* 4. exponent not zero */
+
+	mod_bits = safe_ksigbits(sc, &krp->krp_param[SAFE_CRK_PARAM_MOD]);
+	if (mod_bits > 2048)
+		goto too_big;
+	if (mod_bits <= 32)		/* 2. modulus word length > 1 */
+		goto too_small;		/* 8. MSW of modulus != zero */
+	if (mod_bits < exp_bits)	/* 3 modulus len >= exponent len */
+		goto too_small;
+	if ((krp->krp_param[SAFE_CRK_PARAM_MOD].crp_p[0] & 1) == 0)
+		goto bad_domain;	/* 6. modulus is odd */
+	if (mod_bits > krp->krp_param[krp->krp_iparams].crp_nbits)
+		goto too_small;		/* make sure result will fit */
+
+	/* 7. modulus > base */
+	if (mod_bits < base_bits)
+		goto too_small;
+	if (mod_bits == base_bits) {
+		u_int8_t *basep, *modp;
+		int i;
+
+		basep = krp->krp_param[SAFE_CRK_PARAM_BASE].crp_p +
+		    ((base_bits + 7) / 8) - 1;
+		modp = krp->krp_param[SAFE_CRK_PARAM_MOD].crp_p +
+		    ((mod_bits + 7) / 8) - 1;
+		
+		for (i = 0; i < (mod_bits + 7) / 8; i++, basep--, modp--) {
+			if (*modp < *basep)
+				goto too_small;
+			if (*modp > *basep)
+				break;
+		}
+	}
+
+	/* And on the 9th step, he rested. */
+
+	WRITE_REG(sc, SAFE_PK_A_LEN, (exp_bits + 31) / 32);
+	WRITE_REG(sc, SAFE_PK_B_LEN, (mod_bits + 31) / 32);
+	if (mod_bits > 1024) {
+		op = SAFE_PK_FUNC_EXP4;
+		a_off = 0x000;
+		b_off = 0x100;
+		c_off = 0x200;
+		d_off = 0x300;
+	} else {
+		op = SAFE_PK_FUNC_EXP16;
+		a_off = 0x000;
+		b_off = 0x080;
+		c_off = 0x100;
+		d_off = 0x180;
+	}
+	sc->sc_pk_reslen = b_off - a_off;
+	sc->sc_pk_resoff = d_off;
+
+	/* A is exponent, B is modulus, C is base, D is result */
+	safe_kload_reg(sc, a_off, b_off - a_off,
+	    &krp->krp_param[SAFE_CRK_PARAM_EXP]);
+	WRITE_REG(sc, SAFE_PK_A_ADDR, a_off >> 2);
+	safe_kload_reg(sc, b_off, b_off - a_off,
+	    &krp->krp_param[SAFE_CRK_PARAM_MOD]);
+	WRITE_REG(sc, SAFE_PK_B_ADDR, b_off >> 2);
+	safe_kload_reg(sc, c_off, b_off - a_off,
+	    &krp->krp_param[SAFE_CRK_PARAM_BASE]);
+	WRITE_REG(sc, SAFE_PK_C_ADDR, c_off >> 2);
+	WRITE_REG(sc, SAFE_PK_D_ADDR, d_off >> 2);
+
+	WRITE_REG(sc, SAFE_PK_FUNC, op | SAFE_PK_FUNC_RUN);
+
+	return (0);
+
+too_big:
+	krp->krp_status = E2BIG;
+	return (1);
+too_small:
+	krp->krp_status = ERANGE;
+	return (1);
+bad_domain:
+	krp->krp_status = EDOM;
+	return (1);
+}
+
+static int
+safe_ksigbits(struct safe_softc *sc, struct crparam *cr)
+{
+	u_int plen = (cr->crp_nbits + 7) / 8;
+	int i, sig = plen * 8;
+	u_int8_t c, *p = cr->crp_p;
+
+	DPRINTF(("%s()\n", __FUNCTION__));
+
+	for (i = plen - 1; i >= 0; i--) {
+		c = p[i];
+		if (c != 0) {
+			while ((c & 0x80) == 0) {
+				sig--;
+				c <<= 1;
+			}
+			break;
+		}
+		sig -= 8;
+	}
+	return (sig);
+}
+
+static void
+safe_kfeed(struct safe_softc *sc)
+{
+	struct safe_pkq *q, *tmp;
+
+	DPRINTF(("%s()\n", __FUNCTION__));
+
+	if (list_empty(&sc->sc_pkq) && sc->sc_pkq_cur == NULL)
+		return;
+	if (sc->sc_pkq_cur != NULL)
+		return;
+	list_for_each_entry_safe(q, tmp, &sc->sc_pkq, pkq_list) {
+		sc->sc_pkq_cur = q;
+		list_del(&q->pkq_list);
+		if (safe_kstart(sc) != 0) {
+			crypto_kdone(q->pkq_krp);
+			kfree(q);
+			sc->sc_pkq_cur = NULL;
+		} else {
+			/* op started, start polling */
+			mod_timer(&sc->sc_pkto, jiffies + 1);
+			break;
+		}
+	}
+}
+
+static void
+safe_kpoll(unsigned long arg)
+{
+	struct safe_softc *sc = NULL;
+	struct safe_pkq *q;
+	struct crparam *res;
+	int i;
+	u_int32_t buf[64];
+	unsigned long flags;
+
+	DPRINTF(("%s()\n", __FUNCTION__));
+
+	if (arg >= SAFE_MAX_CHIPS)
+		return;
+	sc = safe_chip_idx[arg];
+	if (!sc) {
+		DPRINTF(("%s() - bad callback\n", __FUNCTION__));
+		return;
+	}
+
+	spin_lock_irqsave(&sc->sc_pkmtx, flags);
+	if (sc->sc_pkq_cur == NULL)
+		goto out;
+	if (READ_REG(sc, SAFE_PK_FUNC) & SAFE_PK_FUNC_RUN) {
+		/* still running, check back later */
+		mod_timer(&sc->sc_pkto, jiffies + 1);
+		goto out;
+	}
+
+	q = sc->sc_pkq_cur;
+	res = &q->pkq_krp->krp_param[q->pkq_krp->krp_iparams];
+	bzero(buf, sizeof(buf));
+	bzero(res->crp_p, (res->crp_nbits + 7) / 8);
+	for (i = 0; i < sc->sc_pk_reslen >> 2; i++)
+		buf[i] = le32_to_cpu(READ_REG(sc, SAFE_PK_RAM_START +
+		    sc->sc_pk_resoff + (i << 2)));
+	bcopy(buf, res->crp_p, (res->crp_nbits + 7) / 8);
+	/*
+	 * reduce the bits that need copying if possible
+	 */
+	res->crp_nbits = min(res->crp_nbits,sc->sc_pk_reslen * 8);
+	res->crp_nbits = safe_ksigbits(sc, res);
+
+	for (i = SAFE_PK_RAM_START; i < SAFE_PK_RAM_END; i += 4)
+		WRITE_REG(sc, i, 0);
+
+	crypto_kdone(q->pkq_krp);
+	kfree(q);
+	sc->sc_pkq_cur = NULL;
+
+	safe_kfeed(sc);
+out:
+	spin_unlock_irqrestore(&sc->sc_pkmtx, flags);
+}
+
+static void
+safe_kload_reg(struct safe_softc *sc, u_int32_t off, u_int32_t len,
+    struct crparam *n)
+{
+	u_int32_t buf[64], i;
+
+	DPRINTF(("%s()\n", __FUNCTION__));
+
+	bzero(buf, sizeof(buf));
+	bcopy(n->crp_p, buf, (n->crp_nbits + 7) / 8);
+
+	for (i = 0; i < len >> 2; i++)
+		WRITE_REG(sc, SAFE_PK_RAM_START + off + (i << 2),
+		    cpu_to_le32(buf[i]));
+}
+
+#ifdef SAFE_DEBUG
+static void
+safe_dump_dmastatus(struct safe_softc *sc, const char *tag)
+{
+	printf("%s: ENDIAN 0x%x SRC 0x%x DST 0x%x STAT 0x%x\n"
+		, tag
+		, READ_REG(sc, SAFE_DMA_ENDIAN)
+		, READ_REG(sc, SAFE_DMA_SRCADDR)
+		, READ_REG(sc, SAFE_DMA_DSTADDR)
+		, READ_REG(sc, SAFE_DMA_STAT)
+	);
+}
+
+static void
+safe_dump_intrstate(struct safe_softc *sc, const char *tag)
+{
+	printf("%s: HI_CFG 0x%x HI_MASK 0x%x HI_DESC_CNT 0x%x HU_STAT 0x%x HM_STAT 0x%x\n"
+		, tag
+		, READ_REG(sc, SAFE_HI_CFG)
+		, READ_REG(sc, SAFE_HI_MASK)
+		, READ_REG(sc, SAFE_HI_DESC_CNT)
+		, READ_REG(sc, SAFE_HU_STAT)
+		, READ_REG(sc, SAFE_HM_STAT)
+	);
+}
+
+static void
+safe_dump_ringstate(struct safe_softc *sc, const char *tag)
+{
+	u_int32_t estat = READ_REG(sc, SAFE_PE_ERNGSTAT);
+
+	/* NB: assume caller has lock on ring */
+	printf("%s: ERNGSTAT %x (next %u) back %lu front %lu\n",
+		tag,
+		estat, (estat >> SAFE_PE_ERNGSTAT_NEXT_S),
+		(unsigned long)(sc->sc_back - sc->sc_ring),
+		(unsigned long)(sc->sc_front - sc->sc_ring));
+}
+
+static void
+safe_dump_request(struct safe_softc *sc, const char* tag, struct safe_ringentry *re)
+{
+	int ix, nsegs;
+
+	ix = re - sc->sc_ring;
+	printf("%s: %p (%u): csr %x src %x dst %x sa %x len %x\n"
+		, tag
+		, re, ix
+		, re->re_desc.d_csr
+		, re->re_desc.d_src
+		, re->re_desc.d_dst
+		, re->re_desc.d_sa
+		, re->re_desc.d_len
+	);
+	if (re->re_src.nsegs > 1) {
+		ix = (re->re_desc.d_src - sc->sc_spalloc.dma_paddr) /
+			sizeof(struct safe_pdesc);
+		for (nsegs = re->re_src.nsegs; nsegs; nsegs--) {
+			printf(" spd[%u] %p: %p size %u flags %x"
+				, ix, &sc->sc_spring[ix]
+				, (caddr_t)(uintptr_t) sc->sc_spring[ix].pd_addr
+				, sc->sc_spring[ix].pd_size
+				, sc->sc_spring[ix].pd_flags
+			);
+			if (sc->sc_spring[ix].pd_size == 0)
+				printf(" (zero!)");
+			printf("\n");
+			if (++ix == SAFE_TOTAL_SPART)
+				ix = 0;
+		}
+	}
+	if (re->re_dst.nsegs > 1) {
+		ix = (re->re_desc.d_dst - sc->sc_dpalloc.dma_paddr) /
+			sizeof(struct safe_pdesc);
+		for (nsegs = re->re_dst.nsegs; nsegs; nsegs--) {
+			printf(" dpd[%u] %p: %p flags %x\n"
+				, ix, &sc->sc_dpring[ix]
+				, (caddr_t)(uintptr_t) sc->sc_dpring[ix].pd_addr
+				, sc->sc_dpring[ix].pd_flags
+			);
+			if (++ix == SAFE_TOTAL_DPART)
+				ix = 0;
+		}
+	}
+	printf("sa: cmd0 %08x cmd1 %08x staterec %x\n",
+		re->re_sa.sa_cmd0, re->re_sa.sa_cmd1, re->re_sa.sa_staterec);
+	printf("sa: key %x %x %x %x %x %x %x %x\n"
+		, re->re_sa.sa_key[0]
+		, re->re_sa.sa_key[1]
+		, re->re_sa.sa_key[2]
+		, re->re_sa.sa_key[3]
+		, re->re_sa.sa_key[4]
+		, re->re_sa.sa_key[5]
+		, re->re_sa.sa_key[6]
+		, re->re_sa.sa_key[7]
+	);
+	printf("sa: indigest %x %x %x %x %x\n"
+		, re->re_sa.sa_indigest[0]
+		, re->re_sa.sa_indigest[1]
+		, re->re_sa.sa_indigest[2]
+		, re->re_sa.sa_indigest[3]
+		, re->re_sa.sa_indigest[4]
+	);
+	printf("sa: outdigest %x %x %x %x %x\n"
+		, re->re_sa.sa_outdigest[0]
+		, re->re_sa.sa_outdigest[1]
+		, re->re_sa.sa_outdigest[2]
+		, re->re_sa.sa_outdigest[3]
+		, re->re_sa.sa_outdigest[4]
+	);
+	printf("sr: iv %x %x %x %x\n"
+		, re->re_sastate.sa_saved_iv[0]
+		, re->re_sastate.sa_saved_iv[1]
+		, re->re_sastate.sa_saved_iv[2]
+		, re->re_sastate.sa_saved_iv[3]
+	);
+	printf("sr: hashbc %u indigest %x %x %x %x %x\n"
+		, re->re_sastate.sa_saved_hashbc
+		, re->re_sastate.sa_saved_indigest[0]
+		, re->re_sastate.sa_saved_indigest[1]
+		, re->re_sastate.sa_saved_indigest[2]
+		, re->re_sastate.sa_saved_indigest[3]
+		, re->re_sastate.sa_saved_indigest[4]
+	);
+}
+
+static void
+safe_dump_ring(struct safe_softc *sc, const char *tag)
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&sc->sc_ringmtx, flags);
+	printf("\nSafeNet Ring State:\n");
+	safe_dump_intrstate(sc, tag);
+	safe_dump_dmastatus(sc, tag);
+	safe_dump_ringstate(sc, tag);
+	if (sc->sc_nqchip) {
+		struct safe_ringentry *re = sc->sc_back;
+		do {
+			safe_dump_request(sc, tag, re);
+			if (++re == sc->sc_ringtop)
+				re = sc->sc_ring;
+		} while (re != sc->sc_front);
+	}
+	spin_unlock_irqrestore(&sc->sc_ringmtx, flags);
+}
+#endif /* SAFE_DEBUG */
+
+
+static int safe_probe(struct pci_dev *dev, const struct pci_device_id *ent)
+{
+	struct safe_softc *sc = NULL;
+	u32 mem_start, mem_len, cmd;
+	int i, rc, devinfo;
+	dma_addr_t raddr;
+	static int num_chips = 0;
+
+	DPRINTF(("%s()\n", __FUNCTION__));
+
+	if (pci_enable_device(dev) < 0)
+		return(-ENODEV);
+
+	if (!dev->irq) {
+		printk("safe: found device with no IRQ assigned. check BIOS settings!");
+		pci_disable_device(dev);
+		return(-ENODEV);
+	}
+
+	if (pci_set_mwi(dev)) {
+		printk("safe: pci_set_mwi failed!");
+		return(-ENODEV);
+	}
+
+	sc = (struct safe_softc *) kmalloc(sizeof(*sc), GFP_KERNEL);
+	if (!sc)
+		return(-ENOMEM);
+	memset(sc, 0, sizeof(*sc));
+
+	softc_device_init(sc, "safe", num_chips, safe_methods);
+
+	sc->sc_irq = -1;
+	sc->sc_cid = -1;
+	sc->sc_pcidev = dev;
+	if (num_chips < SAFE_MAX_CHIPS) {
+		safe_chip_idx[device_get_unit(sc->sc_dev)] = sc;
+		num_chips++;
+	}
+
+	INIT_LIST_HEAD(&sc->sc_pkq);
+	spin_lock_init(&sc->sc_pkmtx);
+
+	pci_set_drvdata(sc->sc_pcidev, sc);
+
+	/* we read its hardware registers as memory */
+	mem_start = pci_resource_start(sc->sc_pcidev, 0);
+	mem_len   = pci_resource_len(sc->sc_pcidev, 0);
+
+	sc->sc_base_addr = (ocf_iomem_t) ioremap(mem_start, mem_len);
+	if (!sc->sc_base_addr) {
+		device_printf(sc->sc_dev, "failed to ioremap 0x%x-0x%x\n",
+				mem_start, mem_start + mem_len - 1);
+		goto out;
+	}
+
+	/* fix up the bus size */
+	if (pci_set_dma_mask(sc->sc_pcidev, DMA_32BIT_MASK)) {
+		device_printf(sc->sc_dev, "No usable DMA configuration, aborting.\n");
+		goto out;
+	}
+	if (pci_set_consistent_dma_mask(sc->sc_pcidev, DMA_32BIT_MASK)) {
+		device_printf(sc->sc_dev, "No usable consistent DMA configuration, aborting.\n");
+		goto out;
+	}
+
+	pci_set_master(sc->sc_pcidev);
+
+	pci_read_config_dword(sc->sc_pcidev, PCI_COMMAND, &cmd);
+
+	if (!(cmd & PCI_COMMAND_MEMORY)) {
+		device_printf(sc->sc_dev, "failed to enable memory mapping\n");
+		goto out;
+	}
+
+	if (!(cmd & PCI_COMMAND_MASTER)) {
+		device_printf(sc->sc_dev, "failed to enable bus mastering\n");
+		goto out;
+	}
+
+	rc = request_irq(dev->irq, safe_intr, IRQF_SHARED, "safe", sc);
+	if (rc) {
+		device_printf(sc->sc_dev, "failed to hook irq %d\n", sc->sc_irq);
+		goto out;
+	}
+	sc->sc_irq = dev->irq;
+
+	sc->sc_chiprev = READ_REG(sc, SAFE_DEVINFO) &
+			(SAFE_DEVINFO_REV_MAJ | SAFE_DEVINFO_REV_MIN);
+
+	/*
+	 * Allocate packet engine descriptors.
+	 */
+	sc->sc_ringalloc.dma_vaddr = pci_alloc_consistent(sc->sc_pcidev,
+			SAFE_MAX_NQUEUE * sizeof (struct safe_ringentry),
+			&sc->sc_ringalloc.dma_paddr);
+	if (!sc->sc_ringalloc.dma_vaddr) {
+		device_printf(sc->sc_dev, "cannot allocate PE descriptor ring\n");
+		goto out;
+	}
+
+	/*
+	 * Hookup the static portion of all our data structures.
+	 */
+	sc->sc_ring = (struct safe_ringentry *) sc->sc_ringalloc.dma_vaddr;
+	sc->sc_ringtop = sc->sc_ring + SAFE_MAX_NQUEUE;
+	sc->sc_front = sc->sc_ring;
+	sc->sc_back = sc->sc_ring;
+	raddr = sc->sc_ringalloc.dma_paddr;
+	bzero(sc->sc_ring, SAFE_MAX_NQUEUE * sizeof(struct safe_ringentry));
+	for (i = 0; i < SAFE_MAX_NQUEUE; i++) {
+		struct safe_ringentry *re = &sc->sc_ring[i];
+
+		re->re_desc.d_sa = raddr +
+			offsetof(struct safe_ringentry, re_sa);
+		re->re_sa.sa_staterec = raddr +
+			offsetof(struct safe_ringentry, re_sastate);
+
+		raddr += sizeof (struct safe_ringentry);
+	}
+	spin_lock_init(&sc->sc_ringmtx);
+
+	/*
+	 * Allocate scatter and gather particle descriptors.
+	 */
+	sc->sc_spalloc.dma_vaddr = pci_alloc_consistent(sc->sc_pcidev,
+			SAFE_TOTAL_SPART * sizeof (struct safe_pdesc),
+			&sc->sc_spalloc.dma_paddr);
+	if (!sc->sc_spalloc.dma_vaddr) {
+		device_printf(sc->sc_dev, "cannot allocate source particle descriptor ring\n");
+		goto out;
+	}
+	sc->sc_spring = (struct safe_pdesc *) sc->sc_spalloc.dma_vaddr;
+	sc->sc_springtop = sc->sc_spring + SAFE_TOTAL_SPART;
+	sc->sc_spfree = sc->sc_spring;
+	bzero(sc->sc_spring, SAFE_TOTAL_SPART * sizeof(struct safe_pdesc));
+
+	sc->sc_dpalloc.dma_vaddr = pci_alloc_consistent(sc->sc_pcidev,
+			SAFE_TOTAL_DPART * sizeof (struct safe_pdesc),
+			&sc->sc_dpalloc.dma_paddr);
+	if (!sc->sc_dpalloc.dma_vaddr) {
+		device_printf(sc->sc_dev, "cannot allocate destination particle descriptor ring\n");
+		goto out;
+	}
+	sc->sc_dpring = (struct safe_pdesc *) sc->sc_dpalloc.dma_vaddr;
+	sc->sc_dpringtop = sc->sc_dpring + SAFE_TOTAL_DPART;
+	sc->sc_dpfree = sc->sc_dpring;
+	bzero(sc->sc_dpring, SAFE_TOTAL_DPART * sizeof(struct safe_pdesc));
+
+	sc->sc_cid = crypto_get_driverid(softc_get_device(sc), CRYPTOCAP_F_HARDWARE);
+	if (sc->sc_cid < 0) {
+		device_printf(sc->sc_dev, "could not get crypto driver id\n");
+		goto out;
+	}
+
+	printf("%s:", device_get_nameunit(sc->sc_dev));
+
+	devinfo = READ_REG(sc, SAFE_DEVINFO);
+	if (devinfo & SAFE_DEVINFO_RNG) {
+		sc->sc_flags |= SAFE_FLAGS_RNG;
+		printf(" rng");
+	}
+	if (devinfo & SAFE_DEVINFO_PKEY) {
+		printf(" key");
+		sc->sc_flags |= SAFE_FLAGS_KEY;
+		crypto_kregister(sc->sc_cid, CRK_MOD_EXP, 0);
+#if 0
+		crypto_kregister(sc->sc_cid, CRK_MOD_EXP_CRT, 0);
+#endif
+		init_timer(&sc->sc_pkto);
+		sc->sc_pkto.function = safe_kpoll;
+		sc->sc_pkto.data = (unsigned long) device_get_unit(sc->sc_dev);
+	}
+	if (devinfo & SAFE_DEVINFO_DES) {
+		printf(" des/3des");
+		crypto_register(sc->sc_cid, CRYPTO_3DES_CBC, 0, 0);
+		crypto_register(sc->sc_cid, CRYPTO_DES_CBC, 0, 0);
+	}
+	if (devinfo & SAFE_DEVINFO_AES) {
+		printf(" aes");
+		crypto_register(sc->sc_cid, CRYPTO_AES_CBC, 0, 0);
+	}
+	if (devinfo & SAFE_DEVINFO_MD5) {
+		printf(" md5");
+		crypto_register(sc->sc_cid, CRYPTO_MD5_HMAC, 0, 0);
+	}
+	if (devinfo & SAFE_DEVINFO_SHA1) {
+		printf(" sha1");
+		crypto_register(sc->sc_cid, CRYPTO_SHA1_HMAC, 0, 0);
+	}
+	printf(" null");
+	crypto_register(sc->sc_cid, CRYPTO_NULL_CBC, 0, 0);
+	crypto_register(sc->sc_cid, CRYPTO_NULL_HMAC, 0, 0);
+	/* XXX other supported algorithms */
+	printf("\n");
+
+	safe_reset_board(sc);		/* reset h/w */
+	safe_init_board(sc);		/* init h/w */
+
+#if defined(CONFIG_OCF_RANDOMHARVEST) && !defined(SAFE_NO_RNG)
+	if (sc->sc_flags & SAFE_FLAGS_RNG) {
+		safe_rng_init(sc);
+		crypto_rregister(sc->sc_cid, safe_read_random, sc);
+	}
+#endif /* SAFE_NO_RNG */
+
+	return (0);
+
+out:
+	if (sc->sc_cid >= 0)
+		crypto_unregister_all(sc->sc_cid);
+	if (sc->sc_irq != -1)
+		free_irq(sc->sc_irq, sc);
+	if (sc->sc_ringalloc.dma_vaddr)
+		pci_free_consistent(sc->sc_pcidev,
+				SAFE_MAX_NQUEUE * sizeof (struct safe_ringentry),
+				sc->sc_ringalloc.dma_vaddr, sc->sc_ringalloc.dma_paddr);
+	if (sc->sc_spalloc.dma_vaddr)
+		pci_free_consistent(sc->sc_pcidev,
+				SAFE_TOTAL_DPART * sizeof (struct safe_pdesc),
+				sc->sc_spalloc.dma_vaddr, sc->sc_spalloc.dma_paddr);
+	if (sc->sc_dpalloc.dma_vaddr)
+		pci_free_consistent(sc->sc_pcidev,
+				SAFE_TOTAL_DPART * sizeof (struct safe_pdesc),
+				sc->sc_dpalloc.dma_vaddr, sc->sc_dpalloc.dma_paddr);
+	kfree(sc);
+	return(-ENODEV);
+}
+
+static void safe_remove(struct pci_dev *dev)
+{
+	struct safe_softc *sc = pci_get_drvdata(dev);
+
+	DPRINTF(("%s()\n", __FUNCTION__));
+
+	/* XXX wait/abort active ops */
+
+	WRITE_REG(sc, SAFE_HI_MASK, 0);		/* disable interrupts */
+
+	del_timer_sync(&sc->sc_pkto);
+
+	crypto_unregister_all(sc->sc_cid);
+
+	safe_cleanchip(sc);
+
+	if (sc->sc_irq != -1)
+		free_irq(sc->sc_irq, sc);
+	if (sc->sc_ringalloc.dma_vaddr)
+		pci_free_consistent(sc->sc_pcidev,
+				SAFE_MAX_NQUEUE * sizeof (struct safe_ringentry),
+				sc->sc_ringalloc.dma_vaddr, sc->sc_ringalloc.dma_paddr);
+	if (sc->sc_spalloc.dma_vaddr)
+		pci_free_consistent(sc->sc_pcidev,
+				SAFE_TOTAL_DPART * sizeof (struct safe_pdesc),
+				sc->sc_spalloc.dma_vaddr, sc->sc_spalloc.dma_paddr);
+	if (sc->sc_dpalloc.dma_vaddr)
+		pci_free_consistent(sc->sc_pcidev,
+				SAFE_TOTAL_DPART * sizeof (struct safe_pdesc),
+				sc->sc_dpalloc.dma_vaddr, sc->sc_dpalloc.dma_paddr);
+	sc->sc_irq = -1;
+	sc->sc_ringalloc.dma_vaddr = NULL;
+	sc->sc_spalloc.dma_vaddr = NULL;
+	sc->sc_dpalloc.dma_vaddr = NULL;
+}
+
+static struct pci_device_id safe_pci_tbl[] = {
+	{ PCI_VENDOR_SAFENET, PCI_PRODUCT_SAFEXCEL,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, },
+	{ },
+};
+MODULE_DEVICE_TABLE(pci, safe_pci_tbl);
+
+static struct pci_driver safe_driver = {
+	.name         = "safe",
+	.id_table     = safe_pci_tbl,
+	.probe        =	safe_probe,
+	.remove       = safe_remove,
+	/* add PM stuff here one day */
+};
+
+static int __init safe_init (void)
+{
+	struct safe_softc *sc = NULL;
+	int rc;
+
+	DPRINTF(("%s(%p)\n", __FUNCTION__, safe_init));
+
+	rc = pci_register_driver(&safe_driver);
+	pci_register_driver_compat(&safe_driver, rc);
+
+	return rc;
+}
+
+static void __exit safe_exit (void)
+{
+	pci_unregister_driver(&safe_driver);
+}
+
+module_init(safe_init);
+module_exit(safe_exit);
+
+MODULE_LICENSE("BSD");
+MODULE_AUTHOR("David McCullough <david_mccullough@securecomputing.com>");
+MODULE_DESCRIPTION("OCF driver for safenet PCI crypto devices");
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/safe/sha1.h
+++ linux-mvl-dove-2.6.32/crypto/ocf/safe/sha1.h
@@ -0,0 +1,72 @@
+/*	$FreeBSD: src/sys/crypto/sha1.h,v 1.8 2002/03/20 05:13:50 alfred Exp $	*/
+/*	$KAME: sha1.h,v 1.5 2000/03/27 04:36:23 sumikawa Exp $	*/
+
+/*
+ * Copyright (C) 1995, 1996, 1997, and 1998 WIDE Project.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the project nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE PROJECT AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+/*
+ * FIPS pub 180-1: Secure Hash Algorithm (SHA-1)
+ * based on: http://csrc.nist.gov/fips/fip180-1.txt
+ * implemented by Jun-ichiro itojun Itoh <itojun@itojun.org>
+ */
+
+#ifndef _NETINET6_SHA1_H_
+#define _NETINET6_SHA1_H_
+
+struct sha1_ctxt {
+	union {
+		u_int8_t	b8[20];
+		u_int32_t	b32[5];
+	} h;
+	union {
+		u_int8_t	b8[8];
+		u_int64_t	b64[1];
+	} c;
+	union {
+		u_int8_t	b8[64];
+		u_int32_t	b32[16];
+	} m;
+	u_int8_t	count;
+};
+
+#ifdef __KERNEL__
+extern void sha1_init(struct sha1_ctxt *);
+extern void sha1_pad(struct sha1_ctxt *);
+extern void sha1_loop(struct sha1_ctxt *, const u_int8_t *, size_t);
+extern void sha1_result(struct sha1_ctxt *, caddr_t);
+
+/* compatibilty with other SHA1 source codes */
+typedef struct sha1_ctxt SHA1_CTX;
+#define SHA1Init(x)		sha1_init((x))
+#define SHA1Update(x, y, z)	sha1_loop((x), (y), (z))
+#define SHA1Final(x, y)		sha1_result((y), (x))
+#endif /* __KERNEL__ */
+
+#define	SHA1_RESULTLEN	(160/8)
+
+#endif /*_NETINET6_SHA1_H_*/
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/ixp4xx/ixp4xx.c
+++ linux-mvl-dove-2.6.32/crypto/ocf/ixp4xx/ixp4xx.c
@@ -0,0 +1,1325 @@
+/*
+ * An OCF module that uses Intels IXP CryptACC API to do the crypto.
+ * This driver requires the IXP400 Access Library that is available
+ * from Intel in order to operate (or compile).
+ *
+ * Written by David McCullough <david_mccullough@securecomputing.com>
+ * Copyright (C) 2006-2007 David McCullough
+ * Copyright (C) 2004-2005 Intel Corporation.
+ *
+ * LICENSE TERMS
+ *
+ * The free distribution and use of this software in both source and binary
+ * form is allowed (with or without changes) provided that:
+ *
+ *   1. distributions of this source code include the above copyright
+ *      notice, this list of conditions and the following disclaimer;
+ *
+ *   2. distributions in binary form include the above copyright
+ *      notice, this list of conditions and the following disclaimer
+ *      in the documentation and/or other associated materials;
+ *
+ *   3. the copyright holder's name is not used to endorse products
+ *      built using this software without specific written permission.
+ *
+ * ALTERNATIVELY, provided that this notice is retained in full, this product
+ * may be distributed under the terms of the GNU General Public License (GPL),
+ * in which case the provisions of the GPL apply INSTEAD OF those given above.
+ *
+ * DISCLAIMER
+ *
+ * This software is provided 'as is' with no explicit or implied warranties
+ * in respect of its properties, including, but not limited to, correctness
+ * and/or fitness for purpose.
+ */
+
+#ifndef AUTOCONF_INCLUDED
+#include <linux/config.h>
+#endif
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/list.h>
+#include <linux/slab.h>
+#include <linux/sched.h>
+#include <linux/wait.h>
+#include <linux/crypto.h>
+#include <linux/interrupt.h>
+#include <asm/scatterlist.h>
+
+#include <IxTypes.h>
+#include <IxOsBuffMgt.h>
+#include <IxNpeDl.h>
+#include <IxCryptoAcc.h>
+#include <IxQMgr.h>
+#include <IxOsServices.h>
+#include <IxOsCacheMMU.h>
+
+#include <cryptodev.h>
+#include <uio.h>
+
+#ifndef IX_MBUF_PRIV
+#define IX_MBUF_PRIV(x) ((x)->priv)
+#endif
+
+struct ixp_data;
+
+struct ixp_q {
+	struct list_head	 ixp_q_list;
+	struct ixp_data		*ixp_q_data;
+	struct cryptop		*ixp_q_crp;
+	struct cryptodesc	*ixp_q_ccrd;
+	struct cryptodesc	*ixp_q_acrd;
+	IX_MBUF				 ixp_q_mbuf;
+	UINT8				*ixp_hash_dest; /* Location for hash in client buffer */
+	UINT8				*ixp_hash_src; /* Location of hash in internal buffer */
+	unsigned char		 ixp_q_iv_data[IX_CRYPTO_ACC_MAX_CIPHER_IV_LENGTH];
+	unsigned char		*ixp_q_iv;
+};
+
+struct ixp_data {
+	int					 ixp_registered;	/* is the context registered */
+	int					 ixp_crd_flags;		/* detect direction changes */
+
+	int					 ixp_cipher_alg;
+	int					 ixp_auth_alg;
+
+	UINT32				 ixp_ctx_id;
+	UINT32				 ixp_hash_key_id;	/* used when hashing */
+	IxCryptoAccCtx		 ixp_ctx;
+	IX_MBUF				 ixp_pri_mbuf;
+	IX_MBUF				 ixp_sec_mbuf;
+
+	struct work_struct   ixp_pending_work;
+	struct work_struct   ixp_registration_work;
+	struct list_head	 ixp_q;				/* unprocessed requests */
+};
+
+#ifdef __ixp46X
+
+#define	MAX_IOP_SIZE	64	/* words */
+#define	MAX_OOP_SIZE	128
+
+#define	MAX_PARAMS		3
+
+struct ixp_pkq {
+	struct list_head			 pkq_list;
+	struct cryptkop				*pkq_krp;
+
+	IxCryptoAccPkeEauInOperands	 pkq_op;
+	IxCryptoAccPkeEauOpResult	 pkq_result;
+
+	UINT32						 pkq_ibuf0[MAX_IOP_SIZE];
+	UINT32						 pkq_ibuf1[MAX_IOP_SIZE];
+	UINT32						 pkq_ibuf2[MAX_IOP_SIZE];
+	UINT32						 pkq_obuf[MAX_OOP_SIZE];
+};
+
+static LIST_HEAD(ixp_pkq); /* current PK wait list */
+static struct ixp_pkq *ixp_pk_cur;
+static spinlock_t ixp_pkq_lock;
+
+#endif /* __ixp46X */
+
+static int ixp_blocked = 0;
+
+static int32_t			 ixp_id = -1;
+static struct ixp_data **ixp_sessions = NULL;
+static u_int32_t		 ixp_sesnum = 0;
+
+static int ixp_process(device_t, struct cryptop *, int);
+static int ixp_newsession(device_t, u_int32_t *, struct cryptoini *);
+static int ixp_freesession(device_t, u_int64_t);
+#ifdef __ixp46X
+static int ixp_kprocess(device_t, struct cryptkop *krp, int hint);
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
+static kmem_cache_t *qcache;
+#else
+static struct kmem_cache *qcache;
+#endif
+
+#define debug ixp_debug
+static int ixp_debug = 0;
+module_param(ixp_debug, int, 0644);
+MODULE_PARM_DESC(ixp_debug, "Enable debug");
+
+static int ixp_init_crypto = 1;
+module_param(ixp_init_crypto, int, 0444); /* RO after load/boot */
+MODULE_PARM_DESC(ixp_init_crypto, "Call ixCryptoAccInit (default is 1)");
+
+static void ixp_process_pending(void *arg);
+static void ixp_registration(void *arg);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
+static void ixp_process_pending_wq(struct work_struct *work);
+static void ixp_registration_wq(struct work_struct *work);
+#endif
+
+/*
+ * dummy device structure
+ */
+
+static struct {
+	softc_device_decl	sc_dev;
+} ixpdev;
+
+static device_method_t ixp_methods = {
+	/* crypto device methods */
+	DEVMETHOD(cryptodev_newsession,	ixp_newsession),
+	DEVMETHOD(cryptodev_freesession,ixp_freesession),
+	DEVMETHOD(cryptodev_process,	ixp_process),
+#ifdef __ixp46X
+	DEVMETHOD(cryptodev_kprocess,	ixp_kprocess),
+#endif
+};
+
+/*
+ * Generate a new software session.
+ */
+static int
+ixp_newsession(device_t dev, u_int32_t *sid, struct cryptoini *cri)
+{
+	struct ixp_data *ixp;
+	u_int32_t i;
+#define AUTH_LEN(cri, def) \
+	(cri->cri_mlen ? cri->cri_mlen : (def))
+
+	dprintk("%s():alg %d\n", __FUNCTION__,cri->cri_alg);
+	if (sid == NULL || cri == NULL) {
+		dprintk("%s,%d - EINVAL\n", __FILE__, __LINE__);
+		return EINVAL;
+	}
+
+	if (ixp_sessions) {
+		for (i = 1; i < ixp_sesnum; i++)
+			if (ixp_sessions[i] == NULL)
+				break;
+	} else
+		i = 1;		/* NB: to silence compiler warning */
+
+	if (ixp_sessions == NULL || i == ixp_sesnum) {
+		struct ixp_data **ixpd;
+
+		if (ixp_sessions == NULL) {
+			i = 1; /* We leave ixp_sessions[0] empty */
+			ixp_sesnum = CRYPTO_SW_SESSIONS;
+		} else
+			ixp_sesnum *= 2;
+
+		ixpd = kmalloc(ixp_sesnum * sizeof(struct ixp_data *), SLAB_ATOMIC);
+		if (ixpd == NULL) {
+			/* Reset session number */
+			if (ixp_sesnum == CRYPTO_SW_SESSIONS)
+				ixp_sesnum = 0;
+			else
+				ixp_sesnum /= 2;
+			dprintk("%s,%d: ENOBUFS\n", __FILE__, __LINE__);
+			return ENOBUFS;
+		}
+		memset(ixpd, 0, ixp_sesnum * sizeof(struct ixp_data *));
+
+		/* Copy existing sessions */
+		if (ixp_sessions) {
+			memcpy(ixpd, ixp_sessions,
+			    (ixp_sesnum / 2) * sizeof(struct ixp_data *));
+			kfree(ixp_sessions);
+		}
+
+		ixp_sessions = ixpd;
+	}
+
+	ixp_sessions[i] = (struct ixp_data *) kmalloc(sizeof(struct ixp_data),
+			SLAB_ATOMIC);
+	if (ixp_sessions[i] == NULL) {
+		ixp_freesession(NULL, i);
+		dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__);
+		return ENOBUFS;
+	}
+
+	*sid = i;
+
+	ixp = ixp_sessions[i];
+	memset(ixp, 0, sizeof(*ixp));
+
+	ixp->ixp_cipher_alg = -1;
+	ixp->ixp_auth_alg = -1;
+	ixp->ixp_ctx_id = -1;
+	INIT_LIST_HEAD(&ixp->ixp_q);
+
+	ixp->ixp_ctx.useDifferentSrcAndDestMbufs = 0;
+
+	while (cri) {
+		switch (cri->cri_alg) {
+		case CRYPTO_DES_CBC:
+			ixp->ixp_cipher_alg = cri->cri_alg;
+			ixp->ixp_ctx.cipherCtx.cipherAlgo = IX_CRYPTO_ACC_CIPHER_DES;
+			ixp->ixp_ctx.cipherCtx.cipherMode = IX_CRYPTO_ACC_MODE_CBC;
+			ixp->ixp_ctx.cipherCtx.cipherKeyLen = (cri->cri_klen + 7) / 8;
+			ixp->ixp_ctx.cipherCtx.cipherBlockLen = IX_CRYPTO_ACC_DES_BLOCK_64;
+			ixp->ixp_ctx.cipherCtx.cipherInitialVectorLen =
+						IX_CRYPTO_ACC_DES_IV_64;
+			memcpy(ixp->ixp_ctx.cipherCtx.key.cipherKey,
+					cri->cri_key, (cri->cri_klen + 7) / 8);
+			break;
+
+		case CRYPTO_3DES_CBC:
+			ixp->ixp_cipher_alg = cri->cri_alg;
+			ixp->ixp_ctx.cipherCtx.cipherAlgo = IX_CRYPTO_ACC_CIPHER_3DES;
+			ixp->ixp_ctx.cipherCtx.cipherMode = IX_CRYPTO_ACC_MODE_CBC;
+			ixp->ixp_ctx.cipherCtx.cipherKeyLen = (cri->cri_klen + 7) / 8;
+			ixp->ixp_ctx.cipherCtx.cipherBlockLen = IX_CRYPTO_ACC_DES_BLOCK_64;
+			ixp->ixp_ctx.cipherCtx.cipherInitialVectorLen =
+						IX_CRYPTO_ACC_DES_IV_64;
+			memcpy(ixp->ixp_ctx.cipherCtx.key.cipherKey,
+					cri->cri_key, (cri->cri_klen + 7) / 8);
+			break;
+
+		case CRYPTO_RIJNDAEL128_CBC:
+			ixp->ixp_cipher_alg = cri->cri_alg;
+			ixp->ixp_ctx.cipherCtx.cipherAlgo = IX_CRYPTO_ACC_CIPHER_AES;
+			ixp->ixp_ctx.cipherCtx.cipherMode = IX_CRYPTO_ACC_MODE_CBC;
+			ixp->ixp_ctx.cipherCtx.cipherKeyLen = (cri->cri_klen + 7) / 8;
+			ixp->ixp_ctx.cipherCtx.cipherBlockLen = 16;
+			ixp->ixp_ctx.cipherCtx.cipherInitialVectorLen = 16;
+			memcpy(ixp->ixp_ctx.cipherCtx.key.cipherKey,
+					cri->cri_key, (cri->cri_klen + 7) / 8);
+			break;
+
+		case CRYPTO_MD5:
+		case CRYPTO_MD5_HMAC:
+			ixp->ixp_auth_alg = cri->cri_alg;
+			ixp->ixp_ctx.authCtx.authAlgo = IX_CRYPTO_ACC_AUTH_MD5;
+			ixp->ixp_ctx.authCtx.authDigestLen = AUTH_LEN(cri, MD5_HASH_LEN);
+			ixp->ixp_ctx.authCtx.aadLen = 0;
+			/* Only MD5_HMAC needs a key */
+			if (cri->cri_alg == CRYPTO_MD5_HMAC) {
+				ixp->ixp_ctx.authCtx.authKeyLen = (cri->cri_klen + 7) / 8;
+				if (ixp->ixp_ctx.authCtx.authKeyLen >
+						sizeof(ixp->ixp_ctx.authCtx.key.authKey)) {
+					printk(
+						"ixp4xx: Invalid key length for MD5_HMAC - %d bits\n",
+							cri->cri_klen);
+					ixp_freesession(NULL, i);
+					return EINVAL;
+				}
+				memcpy(ixp->ixp_ctx.authCtx.key.authKey,
+						cri->cri_key, (cri->cri_klen + 7) / 8);
+			}
+			break;
+
+		case CRYPTO_SHA1:
+		case CRYPTO_SHA1_HMAC:
+			ixp->ixp_auth_alg = cri->cri_alg;
+			ixp->ixp_ctx.authCtx.authAlgo = IX_CRYPTO_ACC_AUTH_SHA1;
+			ixp->ixp_ctx.authCtx.authDigestLen = AUTH_LEN(cri, SHA1_HASH_LEN);
+			ixp->ixp_ctx.authCtx.aadLen = 0;
+			/* Only SHA1_HMAC needs a key */
+			if (cri->cri_alg == CRYPTO_SHA1_HMAC) {
+				ixp->ixp_ctx.authCtx.authKeyLen = (cri->cri_klen + 7) / 8;
+				if (ixp->ixp_ctx.authCtx.authKeyLen >
+						sizeof(ixp->ixp_ctx.authCtx.key.authKey)) {
+					printk(
+						"ixp4xx: Invalid key length for SHA1_HMAC - %d bits\n",
+							cri->cri_klen);
+					ixp_freesession(NULL, i);
+					return EINVAL;
+				}
+				memcpy(ixp->ixp_ctx.authCtx.key.authKey,
+						cri->cri_key, (cri->cri_klen + 7) / 8);
+			}
+			break;
+
+		default:
+			printk("ixp: unknown algo 0x%x\n", cri->cri_alg);
+			ixp_freesession(NULL, i);
+			return EINVAL;
+		}
+		cri = cri->cri_next;
+	}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
+	INIT_WORK(&ixp->ixp_pending_work, ixp_process_pending_wq);
+	INIT_WORK(&ixp->ixp_registration_work, ixp_registration_wq);
+#else
+	INIT_WORK(&ixp->ixp_pending_work, ixp_process_pending, ixp);
+	INIT_WORK(&ixp->ixp_registration_work, ixp_registration, ixp);
+#endif
+
+	return 0;
+}
+
+
+/*
+ * Free a session.
+ */
+static int
+ixp_freesession(device_t dev, u_int64_t tid)
+{
+	u_int32_t sid = CRYPTO_SESID2LID(tid);
+
+	dprintk("%s()\n", __FUNCTION__);
+	if (sid > ixp_sesnum || ixp_sessions == NULL ||
+			ixp_sessions[sid] == NULL) {
+		dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__);
+		return EINVAL;
+	}
+
+	/* Silently accept and return */
+	if (sid == 0)
+		return 0;
+
+	if (ixp_sessions[sid]) {
+		if (ixp_sessions[sid]->ixp_ctx_id != -1) {
+			ixCryptoAccCtxUnregister(ixp_sessions[sid]->ixp_ctx_id);
+			ixp_sessions[sid]->ixp_ctx_id = -1;
+		}
+		kfree(ixp_sessions[sid]);
+	}
+	ixp_sessions[sid] = NULL;
+	if (ixp_blocked) {
+		ixp_blocked = 0;
+		crypto_unblock(ixp_id, CRYPTO_SYMQ);
+	}
+	return 0;
+}
+
+
+/*
+ * callback for when hash processing is complete
+ */
+
+static void
+ixp_hash_perform_cb(
+	UINT32 hash_key_id,
+	IX_MBUF *bufp,
+	IxCryptoAccStatus status)
+{
+	struct ixp_q *q;
+
+	dprintk("%s(%u, %p, 0x%x)\n", __FUNCTION__, hash_key_id, bufp, status);
+
+	if (bufp == NULL) {
+		printk("ixp: NULL buf in %s\n", __FUNCTION__);
+		return;
+	}
+
+	q = IX_MBUF_PRIV(bufp);
+	if (q == NULL) {
+		printk("ixp: NULL priv in %s\n", __FUNCTION__);
+		return;
+	}
+
+	if (status == IX_CRYPTO_ACC_STATUS_SUCCESS) {
+		/* On success, need to copy hash back into original client buffer */
+		memcpy(q->ixp_hash_dest, q->ixp_hash_src,
+				(q->ixp_q_data->ixp_auth_alg == CRYPTO_SHA1) ?
+					SHA1_HASH_LEN : MD5_HASH_LEN);
+	}
+	else {
+		printk("ixp: hash perform failed status=%d\n", status);
+		q->ixp_q_crp->crp_etype = EINVAL;
+	}
+
+	/* Free internal buffer used for hashing */
+	kfree(IX_MBUF_MDATA(&q->ixp_q_mbuf));
+
+	crypto_done(q->ixp_q_crp);
+	kmem_cache_free(qcache, q);
+}
+
+/*
+ * setup a request and perform it
+ */
+static void
+ixp_q_process(struct ixp_q *q)
+{
+	IxCryptoAccStatus status;
+	struct ixp_data *ixp = q->ixp_q_data;
+	int auth_off = 0;
+	int auth_len = 0;
+	int crypt_off = 0;
+	int crypt_len = 0;
+	int icv_off = 0;
+	char *crypt_func;
+
+	dprintk("%s(%p)\n", __FUNCTION__, q);
+
+	if (q->ixp_q_ccrd) {
+		if (q->ixp_q_ccrd->crd_flags & CRD_F_IV_EXPLICIT) {
+			q->ixp_q_iv = q->ixp_q_ccrd->crd_iv;
+		} else {
+			q->ixp_q_iv = q->ixp_q_iv_data;
+			crypto_copydata(q->ixp_q_crp->crp_flags, q->ixp_q_crp->crp_buf,
+					q->ixp_q_ccrd->crd_inject,
+					ixp->ixp_ctx.cipherCtx.cipherInitialVectorLen,
+					(caddr_t) q->ixp_q_iv);
+		}
+
+		if (q->ixp_q_acrd) {
+			auth_off = q->ixp_q_acrd->crd_skip;
+			auth_len = q->ixp_q_acrd->crd_len;
+			icv_off  = q->ixp_q_acrd->crd_inject;
+		}
+
+		crypt_off = q->ixp_q_ccrd->crd_skip;
+		crypt_len = q->ixp_q_ccrd->crd_len;
+	} else { /* if (q->ixp_q_acrd) */
+		auth_off = q->ixp_q_acrd->crd_skip;
+		auth_len = q->ixp_q_acrd->crd_len;
+		icv_off  = q->ixp_q_acrd->crd_inject;
+	}
+
+	if (q->ixp_q_crp->crp_flags & CRYPTO_F_SKBUF) {
+		struct sk_buff *skb = (struct sk_buff *) q->ixp_q_crp->crp_buf;
+		if (skb_shinfo(skb)->nr_frags) {
+			/*
+			 * DAVIDM fix this limitation one day by using
+			 * a buffer pool and chaining,  it is not currently
+			 * needed for current user/kernel space acceleration
+			 */
+			printk("ixp: Cannot handle fragmented skb's yet !\n");
+			q->ixp_q_crp->crp_etype = ENOENT;
+			goto done;
+		}
+		IX_MBUF_MLEN(&q->ixp_q_mbuf) =
+				IX_MBUF_PKT_LEN(&q->ixp_q_mbuf) =  skb->len;
+		IX_MBUF_MDATA(&q->ixp_q_mbuf) = skb->data;
+	} else if (q->ixp_q_crp->crp_flags & CRYPTO_F_IOV) {
+		struct uio *uiop = (struct uio *) q->ixp_q_crp->crp_buf;
+		if (uiop->uio_iovcnt != 1) {
+			/*
+			 * DAVIDM fix this limitation one day by using
+			 * a buffer pool and chaining,  it is not currently
+			 * needed for current user/kernel space acceleration
+			 */
+			printk("ixp: Cannot handle more than 1 iovec yet !\n");
+			q->ixp_q_crp->crp_etype = ENOENT;
+			goto done;
+		}
+		IX_MBUF_MLEN(&q->ixp_q_mbuf) =
+				IX_MBUF_PKT_LEN(&q->ixp_q_mbuf) = uiop->uio_iov[0].iov_len;
+		IX_MBUF_MDATA(&q->ixp_q_mbuf) = uiop->uio_iov[0].iov_base;
+	} else /* contig buffer */ {
+		IX_MBUF_MLEN(&q->ixp_q_mbuf)  =
+				IX_MBUF_PKT_LEN(&q->ixp_q_mbuf) = q->ixp_q_crp->crp_ilen;
+		IX_MBUF_MDATA(&q->ixp_q_mbuf) = q->ixp_q_crp->crp_buf;
+	}
+
+	IX_MBUF_PRIV(&q->ixp_q_mbuf) = q;
+
+	if (ixp->ixp_auth_alg == CRYPTO_SHA1 || ixp->ixp_auth_alg == CRYPTO_MD5) {
+		/*
+		 * For SHA1 and MD5 hash, need to create an internal buffer that is big
+		 * enough to hold the original data + the appropriate padding for the
+		 * hash algorithm.
+		 */
+		UINT8 *tbuf = NULL;
+
+		IX_MBUF_MLEN(&q->ixp_q_mbuf) = IX_MBUF_PKT_LEN(&q->ixp_q_mbuf) =
+			((IX_MBUF_MLEN(&q->ixp_q_mbuf) * 8) + 72 + 511) / 8;
+		tbuf = kmalloc(IX_MBUF_MLEN(&q->ixp_q_mbuf), SLAB_ATOMIC);
+		
+		if (IX_MBUF_MDATA(&q->ixp_q_mbuf) == NULL) {
+			printk("ixp: kmalloc(%u, SLAB_ATOMIC) failed\n",
+					IX_MBUF_MLEN(&q->ixp_q_mbuf));
+			q->ixp_q_crp->crp_etype = ENOMEM;
+			goto done;
+		}
+		memcpy(tbuf, &(IX_MBUF_MDATA(&q->ixp_q_mbuf))[auth_off], auth_len);
+
+		/* Set location in client buffer to copy hash into */
+		q->ixp_hash_dest =
+			&(IX_MBUF_MDATA(&q->ixp_q_mbuf))[auth_off + auth_len];
+
+		IX_MBUF_MDATA(&q->ixp_q_mbuf) = tbuf;
+
+		/* Set location in internal buffer for where hash starts */
+		q->ixp_hash_src = &(IX_MBUF_MDATA(&q->ixp_q_mbuf))[auth_len];
+
+		crypt_func = "ixCryptoAccHashPerform";
+		status = ixCryptoAccHashPerform(ixp->ixp_ctx.authCtx.authAlgo,
+				&q->ixp_q_mbuf, ixp_hash_perform_cb, 0, auth_len, auth_len,
+				&ixp->ixp_hash_key_id);
+	}
+	else {
+		crypt_func = "ixCryptoAccAuthCryptPerform";
+		status = ixCryptoAccAuthCryptPerform(ixp->ixp_ctx_id, &q->ixp_q_mbuf,
+			NULL, auth_off, auth_len, crypt_off, crypt_len, icv_off,
+			q->ixp_q_iv);
+	}
+
+	if (IX_CRYPTO_ACC_STATUS_SUCCESS == status)
+		return;
+
+	if (IX_CRYPTO_ACC_STATUS_QUEUE_FULL == status) {
+		q->ixp_q_crp->crp_etype = ENOMEM;
+		goto done;
+	}
+
+	printk("ixp: %s failed %u\n", crypt_func, status);
+	q->ixp_q_crp->crp_etype = EINVAL;
+
+done:
+	crypto_done(q->ixp_q_crp);
+	kmem_cache_free(qcache, q);
+}
+
+
+/*
+ * because we cannot process the Q from the Register callback
+ * we do it here on a task Q.
+ */
+
+static void
+ixp_process_pending(void *arg)
+{
+	struct ixp_data *ixp = arg;
+	struct ixp_q *q = NULL;
+
+	dprintk("%s(%p)\n", __FUNCTION__, arg);
+
+	if (!ixp)
+		return;
+
+	while (!list_empty(&ixp->ixp_q)) {
+		q = list_entry(ixp->ixp_q.next, struct ixp_q, ixp_q_list);
+		list_del(&q->ixp_q_list);
+		ixp_q_process(q);
+	}
+}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
+static void
+ixp_process_pending_wq(struct work_struct *work)
+{
+	struct ixp_data *ixp = container_of(work, struct ixp_data,
+								ixp_pending_work);
+	ixp_process_pending(ixp);
+}
+#endif
+
+/*
+ * callback for when context registration is complete
+ */
+
+static void
+ixp_register_cb(UINT32 ctx_id, IX_MBUF *bufp, IxCryptoAccStatus status)
+{
+	int i;
+	struct ixp_data *ixp;
+	struct ixp_q *q;
+
+	dprintk("%s(%d, %p, %d)\n", __FUNCTION__, ctx_id, bufp, status);
+
+	/*
+	 * free any buffer passed in to this routine
+	 */
+	if (bufp) {
+		IX_MBUF_MLEN(bufp) = IX_MBUF_PKT_LEN(bufp) = 0;
+		kfree(IX_MBUF_MDATA(bufp));
+		IX_MBUF_MDATA(bufp) = NULL;
+	}
+
+	for (i = 0; i < ixp_sesnum; i++) {
+		ixp = ixp_sessions[i];
+		if (ixp && ixp->ixp_ctx_id == ctx_id)
+			break;
+	}
+	if (i >= ixp_sesnum) {
+		printk("ixp: invalid context id %d\n", ctx_id);
+		return;
+	}
+
+	if (IX_CRYPTO_ACC_STATUS_WAIT == status) {
+		/* this is normal to free the first of two buffers */
+		dprintk("ixp: register not finished yet.\n");
+		return;
+	}
+
+	if (IX_CRYPTO_ACC_STATUS_SUCCESS != status) {
+		printk("ixp: register failed 0x%x\n", status);
+		while (!list_empty(&ixp->ixp_q)) {
+			q = list_entry(ixp->ixp_q.next, struct ixp_q, ixp_q_list);
+			list_del(&q->ixp_q_list);
+			q->ixp_q_crp->crp_etype = EINVAL;
+			crypto_done(q->ixp_q_crp);
+			kmem_cache_free(qcache, q);
+		}
+		return;
+	}
+
+	/*
+	 * we are now registered,  we cannot start processing the Q here
+	 * or we get strange errors with AES (DES/3DES seem to be ok).
+	 */
+	ixp->ixp_registered = 1;
+	schedule_work(&ixp->ixp_pending_work);
+}
+
+
+/*
+ * callback for when data processing is complete
+ */
+
+static void
+ixp_perform_cb(
+	UINT32 ctx_id,
+	IX_MBUF *sbufp,
+	IX_MBUF *dbufp,
+	IxCryptoAccStatus status)
+{
+	struct ixp_q *q;
+
+	dprintk("%s(%d, %p, %p, 0x%x)\n", __FUNCTION__, ctx_id, sbufp,
+			dbufp, status);
+
+	if (sbufp == NULL) {
+		printk("ixp: NULL sbuf in ixp_perform_cb\n");
+		return;
+	}
+
+	q = IX_MBUF_PRIV(sbufp);
+	if (q == NULL) {
+		printk("ixp: NULL priv in ixp_perform_cb\n");
+		return;
+	}
+
+	if (status != IX_CRYPTO_ACC_STATUS_SUCCESS) {
+		printk("ixp: perform failed status=%d\n", status);
+		q->ixp_q_crp->crp_etype = EINVAL;
+	}
+
+	crypto_done(q->ixp_q_crp);
+	kmem_cache_free(qcache, q);
+}
+
+
+/*
+ * registration is not callable at IRQ time,  so we defer
+ * to a task queue,  this routines completes the registration for us
+ * when the task queue runs
+ *
+ * Unfortunately this means we cannot tell OCF that the driver is blocked,
+ * we do that on the next request.
+ */
+
+static void
+ixp_registration(void *arg)
+{
+	struct ixp_data *ixp = arg;
+	struct ixp_q *q = NULL;
+	IX_MBUF *pri = NULL, *sec = NULL;
+	int status = IX_CRYPTO_ACC_STATUS_SUCCESS;
+
+	if (!ixp) {
+		printk("ixp: ixp_registration with no arg\n");
+		return;
+	}
+
+	if (ixp->ixp_ctx_id != -1) {
+		ixCryptoAccCtxUnregister(ixp->ixp_ctx_id);
+		ixp->ixp_ctx_id = -1;
+	}
+
+	if (list_empty(&ixp->ixp_q)) {
+		printk("ixp: ixp_registration with no Q\n");
+		return;
+	}
+
+	/*
+	 * setup the primary and secondary buffers
+	 */
+	q = list_entry(ixp->ixp_q.next, struct ixp_q, ixp_q_list);
+	if (q->ixp_q_acrd) {
+		pri = &ixp->ixp_pri_mbuf;
+		sec = &ixp->ixp_sec_mbuf;
+		IX_MBUF_MLEN(pri)  = IX_MBUF_PKT_LEN(pri) = 128;
+		IX_MBUF_MDATA(pri) = (unsigned char *) kmalloc(128, SLAB_ATOMIC);
+		IX_MBUF_MLEN(sec)  = IX_MBUF_PKT_LEN(sec) = 128;
+		IX_MBUF_MDATA(sec) = (unsigned char *) kmalloc(128, SLAB_ATOMIC);
+	}
+
+	/* Only need to register if a crypt op or HMAC op */
+	if (!(ixp->ixp_auth_alg == CRYPTO_SHA1 ||
+				ixp->ixp_auth_alg == CRYPTO_MD5)) {
+		status = ixCryptoAccCtxRegister(
+					&ixp->ixp_ctx,
+					pri, sec,
+					ixp_register_cb,
+					ixp_perform_cb,
+					&ixp->ixp_ctx_id);
+	}
+	else {
+		/* Otherwise we start processing pending q */
+		schedule_work(&ixp->ixp_pending_work);
+	}
+
+	if (IX_CRYPTO_ACC_STATUS_SUCCESS == status)
+		return;
+
+	if (IX_CRYPTO_ACC_STATUS_EXCEED_MAX_TUNNELS == status) {
+		printk("ixp: ixCryptoAccCtxRegister failed (out of tunnels)\n");
+		ixp_blocked = 1;
+		/* perhaps we should return EGAIN on queued ops ? */
+		return;
+	}
+
+	printk("ixp: ixCryptoAccCtxRegister failed %d\n", status);
+	ixp->ixp_ctx_id = -1;
+
+	/*
+	 * everything waiting is toasted
+	 */
+	while (!list_empty(&ixp->ixp_q)) {
+		q = list_entry(ixp->ixp_q.next, struct ixp_q, ixp_q_list);
+		list_del(&q->ixp_q_list);
+		q->ixp_q_crp->crp_etype = ENOENT;
+		crypto_done(q->ixp_q_crp);
+		kmem_cache_free(qcache, q);
+	}
+}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
+static void
+ixp_registration_wq(struct work_struct *work)
+{
+	struct ixp_data *ixp = container_of(work, struct ixp_data,
+								ixp_registration_work);
+	ixp_registration(ixp);
+}
+#endif
+
+/*
+ * Process a request.
+ */
+static int
+ixp_process(device_t dev, struct cryptop *crp, int hint)
+{
+	struct ixp_data *ixp;
+	unsigned int lid;
+	struct ixp_q *q = NULL;
+	int status;
+
+	dprintk("%s()\n", __FUNCTION__);
+
+	/* Sanity check */
+	if (crp == NULL) {
+		dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__);
+		return EINVAL;
+	}
+
+	crp->crp_etype = 0;
+
+	if (ixp_blocked)
+		return ERESTART;
+
+	if (crp->crp_desc == NULL || crp->crp_buf == NULL) {
+		dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__);
+		crp->crp_etype = EINVAL;
+		goto done;
+	}
+
+	/*
+	 * find the session we are using
+	 */
+
+	lid = crp->crp_sid & 0xffffffff;
+	if (lid >= ixp_sesnum || lid == 0 || ixp_sessions == NULL ||
+			ixp_sessions[lid] == NULL) {
+		crp->crp_etype = ENOENT;
+		dprintk("%s,%d: ENOENT\n", __FILE__, __LINE__);
+		goto done;
+	}
+	ixp = ixp_sessions[lid];
+
+	/*
+	 * setup a new request ready for queuing
+	 */
+	q = kmem_cache_alloc(qcache, SLAB_ATOMIC);
+	if (q == NULL) {
+		dprintk("%s,%d: ENOMEM\n", __FILE__, __LINE__);
+		crp->crp_etype = ENOMEM;
+		goto done;
+	}
+	/*
+	 * save some cycles by only zeroing the important bits
+	 */
+	memset(&q->ixp_q_mbuf, 0, sizeof(q->ixp_q_mbuf));
+	q->ixp_q_ccrd = NULL;
+	q->ixp_q_acrd = NULL;
+	q->ixp_q_crp = crp;
+	q->ixp_q_data = ixp;
+
+	/*
+	 * point the cipher and auth descriptors appropriately
+	 * check that we have something to do
+	 */
+	if (crp->crp_desc->crd_alg == ixp->ixp_cipher_alg)
+		q->ixp_q_ccrd = crp->crp_desc;
+	else if (crp->crp_desc->crd_alg == ixp->ixp_auth_alg)
+		q->ixp_q_acrd = crp->crp_desc;
+	else {
+		crp->crp_etype = ENOENT;
+		dprintk("%s,%d: bad desc match: ENOENT\n", __FILE__, __LINE__);
+		goto done;
+	}
+	if (crp->crp_desc->crd_next) {
+		if (crp->crp_desc->crd_next->crd_alg == ixp->ixp_cipher_alg)
+			q->ixp_q_ccrd = crp->crp_desc->crd_next;
+		else if (crp->crp_desc->crd_next->crd_alg == ixp->ixp_auth_alg)
+			q->ixp_q_acrd = crp->crp_desc->crd_next;
+		else {
+			crp->crp_etype = ENOENT;
+			dprintk("%s,%d: bad desc match: ENOENT\n", __FILE__, __LINE__);
+			goto done;
+		}
+	}
+
+	/*
+	 * If there is a direction change for this context then we mark it as
+	 * unregistered and re-register is for the new direction.  This is not
+	 * a very expensive operation and currently only tends to happen when
+	 * user-space application are doing benchmarks
+	 *
+	 * DM - we should be checking for pending requests before unregistering.
+	 */
+	if (q->ixp_q_ccrd && ixp->ixp_registered &&
+			ixp->ixp_crd_flags != (q->ixp_q_ccrd->crd_flags & CRD_F_ENCRYPT)) {
+		dprintk("%s - detected direction change on session\n", __FUNCTION__);
+		ixp->ixp_registered = 0;
+	}
+
+	/*
+	 * if we are registered,  call straight into the perform code
+	 */
+	if (ixp->ixp_registered) {
+		ixp_q_process(q);
+		return 0;
+	}
+
+	/*
+	 * the only part of the context not set in newsession is the direction
+	 * dependent parts
+	 */
+	if (q->ixp_q_ccrd) {
+		ixp->ixp_crd_flags = (q->ixp_q_ccrd->crd_flags & CRD_F_ENCRYPT);
+		if (q->ixp_q_ccrd->crd_flags & CRD_F_ENCRYPT) {
+			ixp->ixp_ctx.operation = q->ixp_q_acrd ?
+					IX_CRYPTO_ACC_OP_ENCRYPT_AUTH : IX_CRYPTO_ACC_OP_ENCRYPT;
+		} else {
+			ixp->ixp_ctx.operation = q->ixp_q_acrd ?
+					IX_CRYPTO_ACC_OP_AUTH_DECRYPT : IX_CRYPTO_ACC_OP_DECRYPT;
+		}
+	} else {
+		/* q->ixp_q_acrd must be set if we are here */
+		ixp->ixp_ctx.operation = IX_CRYPTO_ACC_OP_AUTH_CALC;
+	}
+
+	status = list_empty(&ixp->ixp_q);
+	list_add_tail(&q->ixp_q_list, &ixp->ixp_q);
+	if (status)
+		schedule_work(&ixp->ixp_registration_work);
+	return 0;
+
+done:
+	if (q)
+		kmem_cache_free(qcache, q);
+	crypto_done(crp);
+	return 0;
+}
+
+
+#ifdef __ixp46X
+/*
+ * key processing support for the ixp465
+ */
+
+
+/*
+ * copy a BN (LE) into a buffer (BE) an fill out the op appropriately
+ * assume zeroed and only copy bits that are significant
+ */
+
+static int
+ixp_copy_ibuf(struct crparam *p, IxCryptoAccPkeEauOperand *op, UINT32 *buf)
+{
+	unsigned char *src = (unsigned char *) p->crp_p;
+	unsigned char *dst;
+	int len, bits = p->crp_nbits;
+
+	dprintk("%s()\n", __FUNCTION__);
+
+	if (bits > MAX_IOP_SIZE * sizeof(UINT32) * 8) {
+		dprintk("%s - ibuf too big (%d > %d)\n", __FUNCTION__,
+				bits, MAX_IOP_SIZE * sizeof(UINT32) * 8);
+		return -1;
+	}
+
+	len = (bits + 31) / 32; /* the number UINT32's needed */
+
+	dst = (unsigned char *) &buf[len];
+	dst--;
+
+	while (bits > 0) {
+		*dst-- = *src++;
+		bits -= 8;
+	}
+
+#if 0 /* no need to zero remaining bits as it is done during request alloc */
+	while (dst > (unsigned char *) buf)
+		*dst-- = '\0';
+#endif
+
+	op->pData = buf;
+	op->dataLen = len;
+	return 0;
+}
+
+/*
+ * copy out the result,  be as forgiving as we can about small output buffers
+ */
+
+static int
+ixp_copy_obuf(struct crparam *p, IxCryptoAccPkeEauOpResult *op, UINT32 *buf)
+{
+	unsigned char *dst = (unsigned char *) p->crp_p;
+	unsigned char *src = (unsigned char *) buf;
+	int len, z, bits = p->crp_nbits;
+
+	dprintk("%s()\n", __FUNCTION__);
+
+	len = op->dataLen * sizeof(UINT32);
+
+	/* skip leading zeroes to be small buffer friendly */
+	z = 0;
+	while (z < len && src[z] == '\0')
+		z++;
+
+	src += len;
+	src--;
+	len -= z;
+
+	while (len > 0 && bits > 0) {
+		*dst++ = *src--;
+		len--;
+		bits -= 8;
+	}
+
+	while (bits > 0) {
+		*dst++ = '\0';
+		bits -= 8;
+	}
+
+	if (len > 0) {
+		dprintk("%s - obuf is %d (z=%d, ob=%d) bytes too small\n",
+				__FUNCTION__, len, z, p->crp_nbits / 8);
+		return -1;
+	}
+
+	return 0;
+}
+
+
+/*
+ * the parameter offsets for exp_mod
+ */
+
+#define IXP_PARAM_BASE 0
+#define IXP_PARAM_EXP  1
+#define IXP_PARAM_MOD  2
+#define IXP_PARAM_RES  3
+
+/*
+ * key processing complete callback,  is also used to start processing
+ * by passing a NULL for pResult
+ */
+
+static void
+ixp_kperform_cb(
+	IxCryptoAccPkeEauOperation operation,
+	IxCryptoAccPkeEauOpResult *pResult,
+	BOOL carryOrBorrow,
+	IxCryptoAccStatus status)
+{
+	struct ixp_pkq *q, *tmp;
+	unsigned long flags;
+
+	dprintk("%s(0x%x, %p, %d, 0x%x)\n", __FUNCTION__, operation, pResult,
+			carryOrBorrow, status);
+
+	/* handle a completed request */
+	if (pResult) {
+		if (ixp_pk_cur && &ixp_pk_cur->pkq_result == pResult) {
+			q = ixp_pk_cur;
+			if (status != IX_CRYPTO_ACC_STATUS_SUCCESS) {
+				dprintk("%s() - op failed 0x%x\n", __FUNCTION__, status);
+				q->pkq_krp->krp_status = ERANGE; /* could do better */
+			} else {
+				/* copy out the result */
+				if (ixp_copy_obuf(&q->pkq_krp->krp_param[IXP_PARAM_RES],
+						&q->pkq_result, q->pkq_obuf))
+					q->pkq_krp->krp_status = ERANGE;
+			}
+			crypto_kdone(q->pkq_krp);
+			kfree(q);
+			ixp_pk_cur = NULL;
+		} else
+			printk("%s - callback with invalid result pointer\n", __FUNCTION__);
+	}
+
+	spin_lock_irqsave(&ixp_pkq_lock, flags);
+	if (ixp_pk_cur || list_empty(&ixp_pkq)) {
+		spin_unlock_irqrestore(&ixp_pkq_lock, flags);
+		return;
+	}
+
+	list_for_each_entry_safe(q, tmp, &ixp_pkq, pkq_list) {
+
+		list_del(&q->pkq_list);
+		ixp_pk_cur = q;
+
+		spin_unlock_irqrestore(&ixp_pkq_lock, flags);
+
+		status = ixCryptoAccPkeEauPerform(
+				IX_CRYPTO_ACC_OP_EAU_MOD_EXP,
+				&q->pkq_op,
+				ixp_kperform_cb,
+				&q->pkq_result);
+	
+		if (status == IX_CRYPTO_ACC_STATUS_SUCCESS) {
+			dprintk("%s() - ixCryptoAccPkeEauPerform SUCCESS\n", __FUNCTION__);
+			return; /* callback will return here for callback */
+		} else if (status == IX_CRYPTO_ACC_STATUS_RETRY) {
+			printk("%s() - ixCryptoAccPkeEauPerform RETRY\n", __FUNCTION__);
+		} else {
+			printk("%s() - ixCryptoAccPkeEauPerform failed %d\n",
+					__FUNCTION__, status);
+		}
+		q->pkq_krp->krp_status = ERANGE; /* could do better */
+		crypto_kdone(q->pkq_krp);
+		kfree(q);
+		spin_lock_irqsave(&ixp_pkq_lock, flags);
+	}
+	spin_unlock_irqrestore(&ixp_pkq_lock, flags);
+}
+
+
+static int
+ixp_kprocess(device_t dev, struct cryptkop *krp, int hint)
+{
+	struct ixp_pkq *q;
+	int rc = 0;
+	unsigned long flags;
+
+	dprintk("%s l1=%d l2=%d l3=%d l4=%d\n", __FUNCTION__,
+			krp->krp_param[IXP_PARAM_BASE].crp_nbits,
+			krp->krp_param[IXP_PARAM_EXP].crp_nbits,
+			krp->krp_param[IXP_PARAM_MOD].crp_nbits,
+			krp->krp_param[IXP_PARAM_RES].crp_nbits);
+
+
+	if (krp->krp_op != CRK_MOD_EXP) {
+		krp->krp_status = EOPNOTSUPP;
+		goto err;
+	}
+
+	q = (struct ixp_pkq *) kmalloc(sizeof(*q), GFP_KERNEL);
+	if (q == NULL) {
+		krp->krp_status = ENOMEM;
+		goto err;
+	}
+
+	/*
+	 * The PKE engine does not appear to zero the output buffer
+	 * appropriately, so we need to do it all here.
+	 */
+	memset(q, 0, sizeof(*q));
+
+	q->pkq_krp = krp;
+	INIT_LIST_HEAD(&q->pkq_list);
+
+	if (ixp_copy_ibuf(&krp->krp_param[IXP_PARAM_BASE], &q->pkq_op.modExpOpr.M,
+			q->pkq_ibuf0))
+		rc = 1;
+	if (!rc && ixp_copy_ibuf(&krp->krp_param[IXP_PARAM_EXP],
+				&q->pkq_op.modExpOpr.e, q->pkq_ibuf1))
+		rc = 2;
+	if (!rc && ixp_copy_ibuf(&krp->krp_param[IXP_PARAM_MOD],
+				&q->pkq_op.modExpOpr.N, q->pkq_ibuf2))
+		rc = 3;
+
+	if (rc) {
+		kfree(q);
+		krp->krp_status = ERANGE;
+		goto err;
+	}
+
+	q->pkq_result.pData           = q->pkq_obuf;
+	q->pkq_result.dataLen         =
+			(krp->krp_param[IXP_PARAM_RES].crp_nbits + 31) / 32;
+
+	spin_lock_irqsave(&ixp_pkq_lock, flags);
+	list_add_tail(&q->pkq_list, &ixp_pkq);
+	spin_unlock_irqrestore(&ixp_pkq_lock, flags);
+
+	if (!ixp_pk_cur)
+		ixp_kperform_cb(0, NULL, 0, 0);
+	return (0);
+
+err:
+	crypto_kdone(krp);
+	return (0);
+}
+
+
+
+#ifdef CONFIG_OCF_RANDOMHARVEST
+/*
+ * We run the random number generator output through SHA so that it
+ * is FIPS compliant.
+ */
+
+static volatile int sha_done = 0;
+static unsigned char sha_digest[20];
+
+static void
+ixp_hash_cb(UINT8 *digest, IxCryptoAccStatus status)
+{
+	dprintk("%s(%p, %d)\n", __FUNCTION__, digest, status);
+	if (sha_digest != digest)
+		printk("digest error\n");
+	if (IX_CRYPTO_ACC_STATUS_SUCCESS == status)
+		sha_done = 1;
+	else
+		sha_done = -status;
+}
+
+static int
+ixp_read_random(void *arg, u_int32_t *buf, int maxwords)
+{
+	IxCryptoAccStatus status;
+	int i, n, rc;
+
+	dprintk("%s(%p, %d)\n", __FUNCTION__, buf, maxwords);
+	memset(buf, 0, maxwords * sizeof(*buf));
+	status = ixCryptoAccPkePseudoRandomNumberGet(maxwords, buf);
+	if (status != IX_CRYPTO_ACC_STATUS_SUCCESS) {
+		dprintk("%s: ixCryptoAccPkePseudoRandomNumberGet failed %d\n",
+				__FUNCTION__, status);
+		return 0;
+	}
+
+	/*
+	 * run the random data through SHA to make it look more random
+	 */
+
+	n = sizeof(sha_digest); /* process digest bytes at a time */
+
+	rc = 0;
+	for (i = 0; i < maxwords; i += n / sizeof(*buf)) {
+		if ((maxwords - i) * sizeof(*buf) < n)
+			n = (maxwords - i) * sizeof(*buf);
+		sha_done = 0;
+		status = ixCryptoAccPkeHashPerform(IX_CRYPTO_ACC_AUTH_SHA1,
+				(UINT8 *) &buf[i], n, ixp_hash_cb, sha_digest);
+		if (status != IX_CRYPTO_ACC_STATUS_SUCCESS) {
+			dprintk("ixCryptoAccPkeHashPerform failed %d\n", status);
+			return -EIO;
+		}
+		while (!sha_done)
+			schedule();
+		if (sha_done < 0) {
+			dprintk("ixCryptoAccPkeHashPerform failed CB %d\n", -sha_done);
+			return 0;
+		}
+		memcpy(&buf[i], sha_digest, n);
+		rc += n / sizeof(*buf);;
+	}
+
+	return rc;
+}
+#endif /* CONFIG_OCF_RANDOMHARVEST */
+
+#endif /* __ixp46X */
+
+
+
+/*
+ * our driver startup and shutdown routines
+ */
+
+static int
+ixp_init(void)
+{
+	dprintk("%s(%p)\n", __FUNCTION__, ixp_init);
+
+	if (ixp_init_crypto && ixCryptoAccInit() != IX_CRYPTO_ACC_STATUS_SUCCESS)
+		printk("ixCryptoAccInit failed, assuming already initialised!\n");
+
+	qcache = kmem_cache_create("ixp4xx_q", sizeof(struct ixp_q), 0,
+				SLAB_HWCACHE_ALIGN, NULL
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)
+				, NULL
+#endif
+				  );
+	if (!qcache) {
+		printk("failed to create Qcache\n");
+		return -ENOENT;
+	}
+
+	memset(&ixpdev, 0, sizeof(ixpdev));
+	softc_device_init(&ixpdev, "ixp4xx", 0, ixp_methods);
+
+	ixp_id = crypto_get_driverid(softc_get_device(&ixpdev),
+				CRYPTOCAP_F_HARDWARE);
+	if (ixp_id < 0)
+		panic("IXP/OCF crypto device cannot initialize!");
+
+#define	REGISTER(alg) \
+	crypto_register(ixp_id,alg,0,0)
+
+	REGISTER(CRYPTO_DES_CBC);
+	REGISTER(CRYPTO_3DES_CBC);
+	REGISTER(CRYPTO_RIJNDAEL128_CBC);
+#ifdef CONFIG_OCF_IXP4XX_SHA1_MD5
+	REGISTER(CRYPTO_MD5);
+	REGISTER(CRYPTO_SHA1);
+#endif
+	REGISTER(CRYPTO_MD5_HMAC);
+	REGISTER(CRYPTO_SHA1_HMAC);
+#undef REGISTER
+
+#ifdef __ixp46X
+	spin_lock_init(&ixp_pkq_lock);
+	/*
+	 * we do not enable the go fast options here as they can potentially
+	 * allow timing based attacks
+	 *
+	 * http://www.openssl.org/news/secadv_20030219.txt
+	 */
+	ixCryptoAccPkeEauExpConfig(0, 0);
+	crypto_kregister(ixp_id, CRK_MOD_EXP, 0);
+#ifdef CONFIG_OCF_RANDOMHARVEST
+	crypto_rregister(ixp_id, ixp_read_random, NULL);
+#endif
+#endif
+
+	return 0;
+}
+
+static void
+ixp_exit(void)
+{
+	dprintk("%s()\n", __FUNCTION__);
+	crypto_unregister_all(ixp_id);
+	ixp_id = -1;
+	kmem_cache_destroy(qcache);
+	qcache = NULL;
+}
+
+module_init(ixp_init);
+module_exit(ixp_exit);
+
+MODULE_LICENSE("Dual BSD/GPL");
+MODULE_AUTHOR("David McCullough <dmccullough@cyberguard.com>");
+MODULE_DESCRIPTION("ixp (OCF module for IXP4xx crypto)");
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/ixp4xx/Makefile
+++ linux-mvl-dove-2.6.32/crypto/ocf/ixp4xx/Makefile
@@ -0,0 +1,104 @@
+# for SGlinux builds
+-include $(ROOTDIR)/modules/.config
+
+#
+# You will need to point this at your Intel ixp425 includes,  this portion
+# of the Makefile only really works under SGLinux with the appropriate libs
+# installed.  They can be downloaded from http://www.snapgear.org/
+#
+ifeq ($(CONFIG_CPU_IXP46X),y)
+IXPLATFORM = ixp46X
+else
+ifeq ($(CONFIG_CPU_IXP43X),y)
+IXPLATFORM = ixp43X
+else
+IXPLATFORM = ixp42X
+endif
+endif
+
+ifdef CONFIG_IXP400_LIB_2_4
+IX_XSCALE_SW = $(ROOTDIR)/modules/ixp425/ixp400-2.4/ixp400_xscale_sw
+OSAL_DIR     = $(ROOTDIR)/modules/ixp425/ixp400-2.4/ixp_osal
+endif
+ifdef CONFIG_IXP400_LIB_2_1
+IX_XSCALE_SW = $(ROOTDIR)/modules/ixp425/ixp400-2.1/ixp400_xscale_sw
+OSAL_DIR     = $(ROOTDIR)/modules/ixp425/ixp400-2.1/ixp_osal
+endif
+ifdef CONFIG_IXP400_LIB_2_0
+IX_XSCALE_SW = $(ROOTDIR)/modules/ixp425/ixp400-2.0/ixp400_xscale_sw
+OSAL_DIR     = $(ROOTDIR)/modules/ixp425/ixp400-2.0/ixp_osal
+endif
+ifdef IX_XSCALE_SW
+ifdef CONFIG_IXP400_LIB_2_4
+IXP_CFLAGS = \
+	-I$(ROOTDIR)/. \
+	-I$(IX_XSCALE_SW)/src/include \
+	-I$(OSAL_DIR)/common/include/ \
+	-I$(OSAL_DIR)/common/include/modules/ \
+	-I$(OSAL_DIR)/common/include/modules/ddk/ \
+	-I$(OSAL_DIR)/common/include/modules/bufferMgt/ \
+	-I$(OSAL_DIR)/common/include/modules/ioMem/ \
+	-I$(OSAL_DIR)/common/os/linux/include/ \
+	-I$(OSAL_DIR)/common/os/linux/include/core/  \
+	-I$(OSAL_DIR)/common/os/linux/include/modules/ \
+	-I$(OSAL_DIR)/common/os/linux/include/modules/ddk/ \
+	-I$(OSAL_DIR)/common/os/linux/include/modules/bufferMgt/ \
+	-I$(OSAL_DIR)/common/os/linux/include/modules/ioMem/ \
+	-I$(OSAL_DIR)/platforms/$(IXPLATFORM)/include/ \
+	-I$(OSAL_DIR)/platforms/$(IXPLATFORM)/os/linux/include/ \
+	-DENABLE_IOMEM -DENABLE_BUFFERMGT -DENABLE_DDK \
+	-DUSE_IXP4XX_CRYPTO
+else
+IXP_CFLAGS = \
+	-I$(ROOTDIR)/. \
+	-I$(IX_XSCALE_SW)/src/include \
+	-I$(OSAL_DIR)/ \
+	-I$(OSAL_DIR)/os/linux/include/ \
+	-I$(OSAL_DIR)/os/linux/include/modules/ \
+	-I$(OSAL_DIR)/os/linux/include/modules/ioMem/ \
+	-I$(OSAL_DIR)/os/linux/include/modules/bufferMgt/ \
+	-I$(OSAL_DIR)/os/linux/include/core/  \
+	-I$(OSAL_DIR)/os/linux/include/platforms/ \
+	-I$(OSAL_DIR)/os/linux/include/platforms/ixp400/ \
+	-I$(OSAL_DIR)/os/linux/include/platforms/ixp400/ixp425 \
+	-I$(OSAL_DIR)/os/linux/include/platforms/ixp400/ixp465 \
+	-I$(OSAL_DIR)/os/linux/include/core/ \
+	-I$(OSAL_DIR)/include/ \
+	-I$(OSAL_DIR)/include/modules/ \
+	-I$(OSAL_DIR)/include/modules/bufferMgt/ \
+	-I$(OSAL_DIR)/include/modules/ioMem/ \
+	-I$(OSAL_DIR)/include/platforms/ \
+	-I$(OSAL_DIR)/include/platforms/ixp400/ \
+	-DUSE_IXP4XX_CRYPTO
+endif
+endif
+ifdef CONFIG_IXP400_LIB_1_4
+IXP_CFLAGS   = \
+	-I$(ROOTDIR)/. \
+	-I$(ROOTDIR)/modules/ixp425/ixp400-1.4/ixp400_xscale_sw/src/include \
+	-I$(ROOTDIR)/modules/ixp425/ixp400-1.4/ixp400_xscale_sw/src/linux \
+	-DUSE_IXP4XX_CRYPTO
+endif
+ifndef IXPDIR
+IXPDIR = ixp-version-is-not-supported
+endif
+
+ifeq ($(CONFIG_CPU_IXP46X),y)
+IXP_CFLAGS += -D__ixp46X
+else
+ifeq ($(CONFIG_CPU_IXP43X),y)
+IXP_CFLAGS += -D__ixp43X
+else
+IXP_CFLAGS += -D__ixp42X
+endif
+endif
+
+obj-$(CONFIG_OCF_IXP4XX) += ixp4xx.o
+
+obj ?= .
+EXTRA_CFLAGS += $(IXP_CFLAGS) -I$(obj)/.. -I$(obj)/.
+
+ifdef TOPDIR
+-include $(TOPDIR)/Rules.make
+endif
+
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/hifn/hifn7751.c
+++ linux-mvl-dove-2.6.32/crypto/ocf/hifn/hifn7751.c
@@ -0,0 +1,2976 @@
+/*	$OpenBSD: hifn7751.c,v 1.120 2002/05/17 00:33:34 deraadt Exp $	*/
+
+/*-
+ * Invertex AEON / Hifn 7751 driver
+ * Copyright (c) 1999 Invertex Inc. All rights reserved.
+ * Copyright (c) 1999 Theo de Raadt
+ * Copyright (c) 2000-2001 Network Security Technologies, Inc.
+ *			http://www.netsec.net
+ * Copyright (c) 2003 Hifn Inc.
+ *
+ * This driver is based on a previous driver by Invertex, for which they
+ * requested:  Please send any comments, feedback, bug-fixes, or feature
+ * requests to software@invertex.com.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Effort sponsored in part by the Defense Advanced Research Projects
+ * Agency (DARPA) and Air Force Research Laboratory, Air Force
+ * Materiel Command, USAF, under agreement number F30602-01-2-0537.
+ *
+ *
+__FBSDID("$FreeBSD: src/sys/dev/hifn/hifn7751.c,v 1.40 2007/03/21 03:42:49 sam Exp $");
+ */
+
+/*
+ * Driver for various Hifn encryption processors.
+ */
+#ifndef AUTOCONF_INCLUDED
+#include <linux/config.h>
+#endif
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/list.h>
+#include <linux/slab.h>
+#include <linux/wait.h>
+#include <linux/sched.h>
+#include <linux/pci.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/spinlock.h>
+#include <linux/random.h>
+#include <linux/version.h>
+#include <linux/skbuff.h>
+#include <asm/io.h>
+
+#include <cryptodev.h>
+#include <uio.h>
+#include <hifn/hifn7751reg.h>
+#include <hifn/hifn7751var.h>
+
+#if 1
+#define	DPRINTF(a...)	if (hifn_debug) { \
+							printk("%s: ", sc ? \
+								device_get_nameunit(sc->sc_dev) : "hifn"); \
+							printk(a); \
+						} else
+#else
+#define	DPRINTF(a...)
+#endif
+
+static inline int
+pci_get_revid(struct pci_dev *dev)
+{
+	u8 rid = 0;
+	pci_read_config_byte(dev, PCI_REVISION_ID, &rid);
+	return rid;
+}
+
+static	struct hifn_stats hifnstats;
+
+#define	debug hifn_debug
+int hifn_debug = 0;
+module_param(hifn_debug, int, 0644);
+MODULE_PARM_DESC(hifn_debug, "Enable debug");
+
+int hifn_maxbatch = 1;
+module_param(hifn_maxbatch, int, 0644);
+MODULE_PARM_DESC(hifn_maxbatch, "max ops to batch w/o interrupt");
+
+int hifn_cache_linesize = 0x10;
+module_param(hifn_cache_linesize, int, 0444);
+MODULE_PARM_DESC(hifn_cache_linesize, "PCI config cache line size");
+
+#ifdef MODULE_PARM
+char *hifn_pllconfig = NULL;
+MODULE_PARM(hifn_pllconfig, "s");
+#else
+char hifn_pllconfig[32]; /* This setting is RO after loading */
+module_param_string(hifn_pllconfig, hifn_pllconfig, 32, 0444);
+#endif
+MODULE_PARM_DESC(hifn_pllconfig, "PLL config, ie., pci66, ext33, ...");
+
+#ifdef HIFN_VULCANDEV
+#include <sys/conf.h>
+#include <sys/uio.h>
+
+static struct cdevsw vulcanpk_cdevsw; /* forward declaration */
+#endif
+
+/*
+ * Prototypes and count for the pci_device structure
+ */
+static	int  hifn_probe(struct pci_dev *dev, const struct pci_device_id *ent);
+static	void hifn_remove(struct pci_dev *dev);
+
+static	int hifn_newsession(device_t, u_int32_t *, struct cryptoini *);
+static	int hifn_freesession(device_t, u_int64_t);
+static	int hifn_process(device_t, struct cryptop *, int);
+
+static device_method_t hifn_methods = {
+	/* crypto device methods */
+	DEVMETHOD(cryptodev_newsession,	hifn_newsession),
+	DEVMETHOD(cryptodev_freesession,hifn_freesession),
+	DEVMETHOD(cryptodev_process,	hifn_process),
+};
+
+static	void hifn_reset_board(struct hifn_softc *, int);
+static	void hifn_reset_puc(struct hifn_softc *);
+static	void hifn_puc_wait(struct hifn_softc *);
+static	int hifn_enable_crypto(struct hifn_softc *);
+static	void hifn_set_retry(struct hifn_softc *sc);
+static	void hifn_init_dma(struct hifn_softc *);
+static	void hifn_init_pci_registers(struct hifn_softc *);
+static	int hifn_sramsize(struct hifn_softc *);
+static	int hifn_dramsize(struct hifn_softc *);
+static	int hifn_ramtype(struct hifn_softc *);
+static	void hifn_sessions(struct hifn_softc *);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,19)
+static irqreturn_t hifn_intr(int irq, void *arg);
+#else
+static irqreturn_t hifn_intr(int irq, void *arg, struct pt_regs *regs);
+#endif
+static	u_int hifn_write_command(struct hifn_command *, u_int8_t *);
+static	u_int32_t hifn_next_signature(u_int32_t a, u_int cnt);
+static	void hifn_callback(struct hifn_softc *, struct hifn_command *, u_int8_t *);
+static	int hifn_crypto(struct hifn_softc *, struct hifn_command *, struct cryptop *, int);
+static	int hifn_readramaddr(struct hifn_softc *, int, u_int8_t *);
+static	int hifn_writeramaddr(struct hifn_softc *, int, u_int8_t *);
+static	int hifn_dmamap_load_src(struct hifn_softc *, struct hifn_command *);
+static	int hifn_dmamap_load_dst(struct hifn_softc *, struct hifn_command *);
+static	int hifn_init_pubrng(struct hifn_softc *);
+static	void hifn_tick(unsigned long arg);
+static	void hifn_abort(struct hifn_softc *);
+static	void hifn_alloc_slot(struct hifn_softc *, int *, int *, int *, int *);
+
+static	void hifn_write_reg_0(struct hifn_softc *, bus_size_t, u_int32_t);
+static	void hifn_write_reg_1(struct hifn_softc *, bus_size_t, u_int32_t);
+
+#ifdef CONFIG_OCF_RANDOMHARVEST
+static	int hifn_read_random(void *arg, u_int32_t *buf, int len);
+#endif
+
+#define HIFN_MAX_CHIPS	8
+static struct hifn_softc *hifn_chip_idx[HIFN_MAX_CHIPS];
+
+static __inline u_int32_t
+READ_REG_0(struct hifn_softc *sc, bus_size_t reg)
+{
+	u_int32_t v = readl(sc->sc_bar0 + reg);
+	sc->sc_bar0_lastreg = (bus_size_t) -1;
+	return (v);
+}
+#define	WRITE_REG_0(sc, reg, val)	hifn_write_reg_0(sc, reg, val)
+
+static __inline u_int32_t
+READ_REG_1(struct hifn_softc *sc, bus_size_t reg)
+{
+	u_int32_t v = readl(sc->sc_bar1 + reg);
+	sc->sc_bar1_lastreg = (bus_size_t) -1;
+	return (v);
+}
+#define	WRITE_REG_1(sc, reg, val)	hifn_write_reg_1(sc, reg, val)
+
+/*
+ * map in a given buffer (great on some arches :-)
+ */
+
+static int
+pci_map_uio(struct hifn_softc *sc, struct hifn_operand *buf, struct uio *uio)
+{
+	struct iovec *iov = uio->uio_iov;
+
+	DPRINTF("%s()\n", __FUNCTION__);
+
+	buf->mapsize = 0;
+	for (buf->nsegs = 0; buf->nsegs < uio->uio_iovcnt; ) {
+		buf->segs[buf->nsegs].ds_addr = pci_map_single(sc->sc_pcidev,
+				iov->iov_base, iov->iov_len,
+				PCI_DMA_BIDIRECTIONAL);
+		buf->segs[buf->nsegs].ds_len = iov->iov_len;
+		buf->mapsize += iov->iov_len;
+		iov++;
+		buf->nsegs++;
+	}
+	/* identify this buffer by the first segment */
+	buf->map = (void *) buf->segs[0].ds_addr;
+	return(0);
+}
+
+/*
+ * map in a given sk_buff
+ */
+
+static int
+pci_map_skb(struct hifn_softc *sc,struct hifn_operand *buf,struct sk_buff *skb)
+{
+	int i;
+
+	DPRINTF("%s()\n", __FUNCTION__);
+
+	buf->mapsize = 0;
+
+	buf->segs[0].ds_addr = pci_map_single(sc->sc_pcidev,
+			skb->data, skb_headlen(skb), PCI_DMA_BIDIRECTIONAL);
+	buf->segs[0].ds_len = skb_headlen(skb);
+	buf->mapsize += buf->segs[0].ds_len;
+
+	buf->nsegs = 1;
+
+	for (i = 0; i < skb_shinfo(skb)->nr_frags; ) {
+		buf->segs[buf->nsegs].ds_len = skb_shinfo(skb)->frags[i].size;
+		buf->segs[buf->nsegs].ds_addr = pci_map_single(sc->sc_pcidev,
+				page_address(skb_shinfo(skb)->frags[i].page) +
+					skb_shinfo(skb)->frags[i].page_offset,
+				buf->segs[buf->nsegs].ds_len, PCI_DMA_BIDIRECTIONAL);
+		buf->mapsize += buf->segs[buf->nsegs].ds_len;
+		buf->nsegs++;
+	}
+
+	/* identify this buffer by the first segment */
+	buf->map = (void *) buf->segs[0].ds_addr;
+	return(0);
+}
+
+/*
+ * map in a given contiguous buffer
+ */
+
+static int
+pci_map_buf(struct hifn_softc *sc,struct hifn_operand *buf, void *b, int len)
+{
+	DPRINTF("%s()\n", __FUNCTION__);
+
+	buf->mapsize = 0;
+	buf->segs[0].ds_addr = pci_map_single(sc->sc_pcidev,
+			b, len, PCI_DMA_BIDIRECTIONAL);
+	buf->segs[0].ds_len = len;
+	buf->mapsize += buf->segs[0].ds_len;
+	buf->nsegs = 1;
+
+	/* identify this buffer by the first segment */
+	buf->map = (void *) buf->segs[0].ds_addr;
+	return(0);
+}
+
+#if 0 /* not needed at this time */
+static void
+pci_sync_iov(struct hifn_softc *sc, struct hifn_operand *buf)
+{
+	int i;
+
+	DPRINTF("%s()\n", __FUNCTION__);
+	for (i = 0; i < buf->nsegs; i++)
+		pci_dma_sync_single_for_cpu(sc->sc_pcidev, buf->segs[i].ds_addr,
+				buf->segs[i].ds_len, PCI_DMA_BIDIRECTIONAL);
+}
+#endif
+
+static void
+pci_unmap_buf(struct hifn_softc *sc, struct hifn_operand *buf)
+{
+	int i;
+	DPRINTF("%s()\n", __FUNCTION__);
+	for (i = 0; i < buf->nsegs; i++) {
+		pci_unmap_single(sc->sc_pcidev, buf->segs[i].ds_addr,
+				buf->segs[i].ds_len, PCI_DMA_BIDIRECTIONAL);
+		buf->segs[i].ds_addr = 0;
+		buf->segs[i].ds_len = 0;
+	}
+	buf->nsegs = 0;
+	buf->mapsize = 0;
+	buf->map = 0;
+}
+
+static const char*
+hifn_partname(struct hifn_softc *sc)
+{
+	/* XXX sprintf numbers when not decoded */
+	switch (pci_get_vendor(sc->sc_pcidev)) {
+	case PCI_VENDOR_HIFN:
+		switch (pci_get_device(sc->sc_pcidev)) {
+		case PCI_PRODUCT_HIFN_6500:	return "Hifn 6500";
+		case PCI_PRODUCT_HIFN_7751:	return "Hifn 7751";
+		case PCI_PRODUCT_HIFN_7811:	return "Hifn 7811";
+		case PCI_PRODUCT_HIFN_7951:	return "Hifn 7951";
+		case PCI_PRODUCT_HIFN_7955:	return "Hifn 7955";
+		case PCI_PRODUCT_HIFN_7956:	return "Hifn 7956";
+		}
+		return "Hifn unknown-part";
+	case PCI_VENDOR_INVERTEX:
+		switch (pci_get_device(sc->sc_pcidev)) {
+		case PCI_PRODUCT_INVERTEX_AEON:	return "Invertex AEON";
+		}
+		return "Invertex unknown-part";
+	case PCI_VENDOR_NETSEC:
+		switch (pci_get_device(sc->sc_pcidev)) {
+		case PCI_PRODUCT_NETSEC_7751:	return "NetSec 7751";
+		}
+		return "NetSec unknown-part";
+	}
+	return "Unknown-vendor unknown-part";
+}
+
+static u_int
+checkmaxmin(struct pci_dev *dev, const char *what, u_int v, u_int min, u_int max)
+{
+	struct hifn_softc *sc = pci_get_drvdata(dev);
+	if (v > max) {
+		device_printf(sc->sc_dev, "Warning, %s %u out of range, "
+			"using max %u\n", what, v, max);
+		v = max;
+	} else if (v < min) {
+		device_printf(sc->sc_dev, "Warning, %s %u out of range, "
+			"using min %u\n", what, v, min);
+		v = min;
+	}
+	return v;
+}
+
+/*
+ * Select PLL configuration for 795x parts.  This is complicated in
+ * that we cannot determine the optimal parameters without user input.
+ * The reference clock is derived from an external clock through a
+ * multiplier.  The external clock is either the host bus (i.e. PCI)
+ * or an external clock generator.  When using the PCI bus we assume
+ * the clock is either 33 or 66 MHz; for an external source we cannot
+ * tell the speed.
+ *
+ * PLL configuration is done with a string: "pci" for PCI bus, or "ext"
+ * for an external source, followed by the frequency.  We calculate
+ * the appropriate multiplier and PLL register contents accordingly.
+ * When no configuration is given we default to "pci66" since that
+ * always will allow the card to work.  If a card is using the PCI
+ * bus clock and in a 33MHz slot then it will be operating at half
+ * speed until the correct information is provided.
+ *
+ * We use a default setting of "ext66" because according to Mike Ham
+ * of HiFn, almost every board in existence has an external crystal
+ * populated at 66Mhz. Using PCI can be a problem on modern motherboards,
+ * because PCI33 can have clocks from 0 to 33Mhz, and some have
+ * non-PCI-compliant spread-spectrum clocks, which can confuse the pll.
+ */
+static void
+hifn_getpllconfig(struct pci_dev *dev, u_int *pll)
+{
+	const char *pllspec = hifn_pllconfig;
+	u_int freq, mul, fl, fh;
+	u_int32_t pllconfig;
+	char *nxt;
+
+	if (pllspec == NULL)
+		pllspec = "ext66";
+	fl = 33, fh = 66;
+	pllconfig = 0;
+	if (strncmp(pllspec, "ext", 3) == 0) {
+		pllspec += 3;
+		pllconfig |= HIFN_PLL_REF_SEL;
+		switch (pci_get_device(dev)) {
+		case PCI_PRODUCT_HIFN_7955:
+		case PCI_PRODUCT_HIFN_7956:
+			fl = 20, fh = 100;
+			break;
+#ifdef notyet
+		case PCI_PRODUCT_HIFN_7954:
+			fl = 20, fh = 66;
+			break;
+#endif
+		}
+	} else if (strncmp(pllspec, "pci", 3) == 0)
+		pllspec += 3;
+	freq = strtoul(pllspec, &nxt, 10);
+	if (nxt == pllspec)
+		freq = 66;
+	else
+		freq = checkmaxmin(dev, "frequency", freq, fl, fh);
+	/*
+	 * Calculate multiplier.  We target a Fck of 266 MHz,
+	 * allowing only even values, possibly rounded down.
+	 * Multipliers > 8 must set the charge pump current.
+	 */
+	mul = checkmaxmin(dev, "PLL divisor", (266 / freq) &~ 1, 2, 12);
+	pllconfig |= (mul / 2 - 1) << HIFN_PLL_ND_SHIFT;
+	if (mul > 8)
+		pllconfig |= HIFN_PLL_IS;
+	*pll = pllconfig;
+}
+
+/*
+ * Attach an interface that successfully probed.
+ */
+static int
+hifn_probe(struct pci_dev *dev, const struct pci_device_id *ent)
+{
+	struct hifn_softc *sc = NULL;
+	char rbase;
+	u_int16_t ena, rev;
+	int rseg, rc;
+	unsigned long mem_start, mem_len;
+	static int num_chips = 0;
+
+	DPRINTF("%s()\n", __FUNCTION__);
+
+	if (pci_enable_device(dev) < 0)
+		return(-ENODEV);
+
+	if (pci_set_mwi(dev))
+		return(-ENODEV);
+
+	if (!dev->irq) {
+		printk("hifn: found device with no IRQ assigned. check BIOS settings!");
+		pci_disable_device(dev);
+		return(-ENODEV);
+	}
+
+	sc = (struct hifn_softc *) kmalloc(sizeof(*sc), GFP_KERNEL);
+	if (!sc)
+		return(-ENOMEM);
+	memset(sc, 0, sizeof(*sc));
+
+	softc_device_init(sc, "hifn", num_chips, hifn_methods);
+
+	sc->sc_pcidev = dev;
+	sc->sc_irq = -1;
+	sc->sc_cid = -1;
+	sc->sc_num = num_chips++;
+	if (sc->sc_num < HIFN_MAX_CHIPS)
+		hifn_chip_idx[sc->sc_num] = sc;
+
+	pci_set_drvdata(sc->sc_pcidev, sc);
+
+	spin_lock_init(&sc->sc_mtx);
+
+	/* XXX handle power management */
+
+	/*
+	 * The 7951 and 795x have a random number generator and
+	 * public key support; note this.
+	 */
+	if (pci_get_vendor(dev) == PCI_VENDOR_HIFN &&
+	    (pci_get_device(dev) == PCI_PRODUCT_HIFN_7951 ||
+	     pci_get_device(dev) == PCI_PRODUCT_HIFN_7955 ||
+	     pci_get_device(dev) == PCI_PRODUCT_HIFN_7956))
+		sc->sc_flags = HIFN_HAS_RNG | HIFN_HAS_PUBLIC;
+	/*
+	 * The 7811 has a random number generator and
+	 * we also note it's identity 'cuz of some quirks.
+	 */
+	if (pci_get_vendor(dev) == PCI_VENDOR_HIFN &&
+	    pci_get_device(dev) == PCI_PRODUCT_HIFN_7811)
+		sc->sc_flags |= HIFN_IS_7811 | HIFN_HAS_RNG;
+
+	/*
+	 * The 795x parts support AES.
+	 */
+	if (pci_get_vendor(dev) == PCI_VENDOR_HIFN &&
+	    (pci_get_device(dev) == PCI_PRODUCT_HIFN_7955 ||
+	     pci_get_device(dev) == PCI_PRODUCT_HIFN_7956)) {
+		sc->sc_flags |= HIFN_IS_7956 | HIFN_HAS_AES;
+		/*
+		 * Select PLL configuration.  This depends on the
+		 * bus and board design and must be manually configured
+		 * if the default setting is unacceptable.
+		 */
+		hifn_getpllconfig(dev, &sc->sc_pllconfig);
+	}
+
+	/*
+	 * Setup PCI resources. Note that we record the bus
+	 * tag and handle for each register mapping, this is
+	 * used by the READ_REG_0, WRITE_REG_0, READ_REG_1,
+	 * and WRITE_REG_1 macros throughout the driver.
+	 */
+	mem_start = pci_resource_start(sc->sc_pcidev, 0);
+	mem_len   = pci_resource_len(sc->sc_pcidev, 0);
+	sc->sc_bar0 = (ocf_iomem_t) ioremap(mem_start, mem_len);
+	if (!sc->sc_bar0) {
+		device_printf(sc->sc_dev, "cannot map bar%d register space\n", 0);
+		goto fail;
+	}
+	sc->sc_bar0_lastreg = (bus_size_t) -1;
+
+	mem_start = pci_resource_start(sc->sc_pcidev, 1);
+	mem_len   = pci_resource_len(sc->sc_pcidev, 1);
+	sc->sc_bar1 = (ocf_iomem_t) ioremap(mem_start, mem_len);
+	if (!sc->sc_bar1) {
+		device_printf(sc->sc_dev, "cannot map bar%d register space\n", 1);
+		goto fail;
+	}
+	sc->sc_bar1_lastreg = (bus_size_t) -1;
+
+	/* fix up the bus size */
+	if (pci_set_dma_mask(dev, DMA_32BIT_MASK)) {
+		device_printf(sc->sc_dev, "No usable DMA configuration, aborting.\n");
+		goto fail;
+	}
+	if (pci_set_consistent_dma_mask(dev, DMA_32BIT_MASK)) {
+		device_printf(sc->sc_dev,
+				"No usable consistent DMA configuration, aborting.\n");
+		goto fail;
+	}
+
+	hifn_set_retry(sc);
+
+	/*
+	 * Setup the area where the Hifn DMA's descriptors
+	 * and associated data structures.
+	 */
+	sc->sc_dma = (struct hifn_dma *) pci_alloc_consistent(dev,
+			sizeof(*sc->sc_dma),
+			&sc->sc_dma_physaddr);
+	if (!sc->sc_dma) {
+		device_printf(sc->sc_dev, "cannot alloc sc_dma\n");
+		goto fail;
+	}
+	bzero(sc->sc_dma, sizeof(*sc->sc_dma));
+
+	/*
+	 * Reset the board and do the ``secret handshake''
+	 * to enable the crypto support.  Then complete the
+	 * initialization procedure by setting up the interrupt
+	 * and hooking in to the system crypto support so we'll
+	 * get used for system services like the crypto device,
+	 * IPsec, RNG device, etc.
+	 */
+	hifn_reset_board(sc, 0);
+
+	if (hifn_enable_crypto(sc) != 0) {
+		device_printf(sc->sc_dev, "crypto enabling failed\n");
+		goto fail;
+	}
+	hifn_reset_puc(sc);
+
+	hifn_init_dma(sc);
+	hifn_init_pci_registers(sc);
+
+	pci_set_master(sc->sc_pcidev);
+
+	/* XXX can't dynamically determine ram type for 795x; force dram */
+	if (sc->sc_flags & HIFN_IS_7956)
+		sc->sc_drammodel = 1;
+	else if (hifn_ramtype(sc))
+		goto fail;
+
+	if (sc->sc_drammodel == 0)
+		hifn_sramsize(sc);
+	else
+		hifn_dramsize(sc);
+
+	/*
+	 * Workaround for NetSec 7751 rev A: half ram size because two
+	 * of the address lines were left floating
+	 */
+	if (pci_get_vendor(dev) == PCI_VENDOR_NETSEC &&
+	    pci_get_device(dev) == PCI_PRODUCT_NETSEC_7751 &&
+	    pci_get_revid(dev) == 0x61)	/*XXX???*/
+		sc->sc_ramsize >>= 1;
+
+	/*
+	 * Arrange the interrupt line.
+	 */
+	rc = request_irq(dev->irq, hifn_intr, IRQF_SHARED, "hifn", sc);
+	if (rc) {
+		device_printf(sc->sc_dev, "could not map interrupt: %d\n", rc);
+		goto fail;
+	}
+	sc->sc_irq = dev->irq;
+
+	hifn_sessions(sc);
+
+	/*
+	 * NB: Keep only the low 16 bits; this masks the chip id
+	 *     from the 7951.
+	 */
+	rev = READ_REG_1(sc, HIFN_1_REVID) & 0xffff;
+
+	rseg = sc->sc_ramsize / 1024;
+	rbase = 'K';
+	if (sc->sc_ramsize >= (1024 * 1024)) {
+		rbase = 'M';
+		rseg /= 1024;
+	}
+	device_printf(sc->sc_dev, "%s, rev %u, %d%cB %cram",
+		hifn_partname(sc), rev,
+		rseg, rbase, sc->sc_drammodel ? 'd' : 's');
+	if (sc->sc_flags & HIFN_IS_7956)
+		printf(", pll=0x%x<%s clk, %ux mult>",
+			sc->sc_pllconfig,
+			sc->sc_pllconfig & HIFN_PLL_REF_SEL ? "ext" : "pci",
+			2 + 2*((sc->sc_pllconfig & HIFN_PLL_ND) >> 11));
+	printf("\n");
+
+	sc->sc_cid = crypto_get_driverid(softc_get_device(sc),CRYPTOCAP_F_HARDWARE);
+	if (sc->sc_cid < 0) {
+		device_printf(sc->sc_dev, "could not get crypto driver id\n");
+		goto fail;
+	}
+
+	WRITE_REG_0(sc, HIFN_0_PUCNFG,
+	    READ_REG_0(sc, HIFN_0_PUCNFG) | HIFN_PUCNFG_CHIPID);
+	ena = READ_REG_0(sc, HIFN_0_PUSTAT) & HIFN_PUSTAT_CHIPENA;
+
+	switch (ena) {
+	case HIFN_PUSTAT_ENA_2:
+		crypto_register(sc->sc_cid, CRYPTO_3DES_CBC, 0, 0);
+		crypto_register(sc->sc_cid, CRYPTO_ARC4, 0, 0);
+		if (sc->sc_flags & HIFN_HAS_AES)
+			crypto_register(sc->sc_cid, CRYPTO_AES_CBC, 0, 0);
+		/*FALLTHROUGH*/
+	case HIFN_PUSTAT_ENA_1:
+		crypto_register(sc->sc_cid, CRYPTO_MD5, 0, 0);
+		crypto_register(sc->sc_cid, CRYPTO_SHA1, 0, 0);
+		crypto_register(sc->sc_cid, CRYPTO_MD5_HMAC, 0, 0);
+		crypto_register(sc->sc_cid, CRYPTO_SHA1_HMAC, 0, 0);
+		crypto_register(sc->sc_cid, CRYPTO_DES_CBC, 0, 0);
+		break;
+	}
+
+	if (sc->sc_flags & (HIFN_HAS_PUBLIC | HIFN_HAS_RNG))
+		hifn_init_pubrng(sc);
+
+	init_timer(&sc->sc_tickto);
+	sc->sc_tickto.function = hifn_tick;
+	sc->sc_tickto.data = (unsigned long) sc->sc_num;
+	mod_timer(&sc->sc_tickto, jiffies + HZ);
+
+	return (0);
+
+fail:
+    if (sc->sc_cid >= 0)
+        crypto_unregister_all(sc->sc_cid);
+    if (sc->sc_irq != -1)
+        free_irq(sc->sc_irq, sc);
+    if (sc->sc_dma) {
+		/* Turn off DMA polling */
+		WRITE_REG_1(sc, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MSTRESET |
+			HIFN_DMACNFG_DMARESET | HIFN_DMACNFG_MODE);
+
+        pci_free_consistent(sc->sc_pcidev,
+				sizeof(*sc->sc_dma),
+                sc->sc_dma, sc->sc_dma_physaddr);
+	}
+    kfree(sc);
+	return (-ENXIO);
+}
+
+/*
+ * Detach an interface that successfully probed.
+ */
+static void
+hifn_remove(struct pci_dev *dev)
+{
+	struct hifn_softc *sc = pci_get_drvdata(dev);
+	unsigned long l_flags;
+
+	DPRINTF("%s()\n", __FUNCTION__);
+
+	KASSERT(sc != NULL, ("hifn_detach: null software carrier!"));
+
+	/* disable interrupts */
+	HIFN_LOCK(sc);
+	WRITE_REG_1(sc, HIFN_1_DMA_IER, 0);
+	HIFN_UNLOCK(sc);
+
+	/*XXX other resources */
+	del_timer_sync(&sc->sc_tickto);
+
+	/* Turn off DMA polling */
+	WRITE_REG_1(sc, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MSTRESET |
+	    HIFN_DMACNFG_DMARESET | HIFN_DMACNFG_MODE);
+
+	crypto_unregister_all(sc->sc_cid);
+
+	free_irq(sc->sc_irq, sc);
+
+	pci_free_consistent(sc->sc_pcidev, sizeof(*sc->sc_dma),
+                sc->sc_dma, sc->sc_dma_physaddr);
+}
+
+
+static int
+hifn_init_pubrng(struct hifn_softc *sc)
+{
+	int i;
+
+	DPRINTF("%s()\n", __FUNCTION__);
+
+	if ((sc->sc_flags & HIFN_IS_7811) == 0) {
+		/* Reset 7951 public key/rng engine */
+		WRITE_REG_1(sc, HIFN_1_PUB_RESET,
+		    READ_REG_1(sc, HIFN_1_PUB_RESET) | HIFN_PUBRST_RESET);
+
+		for (i = 0; i < 100; i++) {
+			DELAY(1000);
+			if ((READ_REG_1(sc, HIFN_1_PUB_RESET) &
+			    HIFN_PUBRST_RESET) == 0)
+				break;
+		}
+
+		if (i == 100) {
+			device_printf(sc->sc_dev, "public key init failed\n");
+			return (1);
+		}
+	}
+
+	/* Enable the rng, if available */
+#ifdef CONFIG_OCF_RANDOMHARVEST
+	if (sc->sc_flags & HIFN_HAS_RNG) {
+		if (sc->sc_flags & HIFN_IS_7811) {
+			u_int32_t r;
+			r = READ_REG_1(sc, HIFN_1_7811_RNGENA);
+			if (r & HIFN_7811_RNGENA_ENA) {
+				r &= ~HIFN_7811_RNGENA_ENA;
+				WRITE_REG_1(sc, HIFN_1_7811_RNGENA, r);
+			}
+			WRITE_REG_1(sc, HIFN_1_7811_RNGCFG,
+			    HIFN_7811_RNGCFG_DEFL);
+			r |= HIFN_7811_RNGENA_ENA;
+			WRITE_REG_1(sc, HIFN_1_7811_RNGENA, r);
+		} else
+			WRITE_REG_1(sc, HIFN_1_RNG_CONFIG,
+			    READ_REG_1(sc, HIFN_1_RNG_CONFIG) |
+			    HIFN_RNGCFG_ENA);
+
+		sc->sc_rngfirst = 1;
+		crypto_rregister(sc->sc_cid, hifn_read_random, sc);
+	}
+#endif
+
+	/* Enable public key engine, if available */
+	if (sc->sc_flags & HIFN_HAS_PUBLIC) {
+		WRITE_REG_1(sc, HIFN_1_PUB_IEN, HIFN_PUBIEN_DONE);
+		sc->sc_dmaier |= HIFN_DMAIER_PUBDONE;
+		WRITE_REG_1(sc, HIFN_1_DMA_IER, sc->sc_dmaier);
+#ifdef HIFN_VULCANDEV
+		sc->sc_pkdev = make_dev(&vulcanpk_cdevsw, 0, 
+					UID_ROOT, GID_WHEEL, 0666,
+					"vulcanpk");
+		sc->sc_pkdev->si_drv1 = sc;
+#endif
+	}
+
+	return (0);
+}
+
+#ifdef CONFIG_OCF_RANDOMHARVEST
+static int
+hifn_read_random(void *arg, u_int32_t *buf, int len)
+{
+	struct hifn_softc *sc = (struct hifn_softc *) arg;
+	u_int32_t sts;
+	int i, rc = 0;
+
+	if (len <= 0)
+		return rc;
+
+	if (sc->sc_flags & HIFN_IS_7811) {
+		/* ONLY VALID ON 7811!!!! */
+		for (i = 0; i < 5; i++) {
+			sts = READ_REG_1(sc, HIFN_1_7811_RNGSTS);
+			if (sts & HIFN_7811_RNGSTS_UFL) {
+				device_printf(sc->sc_dev,
+					      "RNG underflow: disabling\n");
+				/* DAVIDM perhaps return -1 */
+				break;
+			}
+			if ((sts & HIFN_7811_RNGSTS_RDY) == 0)
+				break;
+
+			/*
+			 * There are at least two words in the RNG FIFO
+			 * at this point.
+			 */
+			if (rc < len)
+				buf[rc++] = READ_REG_1(sc, HIFN_1_7811_RNGDAT);
+			if (rc < len)
+				buf[rc++] = READ_REG_1(sc, HIFN_1_7811_RNGDAT);
+		}
+	} else
+		buf[rc++] = READ_REG_1(sc, HIFN_1_RNG_DATA);
+
+	/* NB: discard first data read */
+	if (sc->sc_rngfirst) {
+		sc->sc_rngfirst = 0;
+		rc = 0;
+	}
+
+	return(rc);
+}
+#endif /* CONFIG_OCF_RANDOMHARVEST */
+
+static void
+hifn_puc_wait(struct hifn_softc *sc)
+{
+	int i;
+	int reg = HIFN_0_PUCTRL;
+
+	if (sc->sc_flags & HIFN_IS_7956) {
+		reg = HIFN_0_PUCTRL2;
+	}
+
+	for (i = 5000; i > 0; i--) {
+		DELAY(1);
+		if (!(READ_REG_0(sc, reg) & HIFN_PUCTRL_RESET))
+			break;
+	}
+	if (!i)
+		device_printf(sc->sc_dev, "proc unit did not reset(0x%x)\n",
+				READ_REG_0(sc, HIFN_0_PUCTRL));
+}
+
+/*
+ * Reset the processing unit.
+ */
+static void
+hifn_reset_puc(struct hifn_softc *sc)
+{
+	/* Reset processing unit */
+	int reg = HIFN_0_PUCTRL;
+
+	if (sc->sc_flags & HIFN_IS_7956) {
+		reg = HIFN_0_PUCTRL2;
+	}
+	WRITE_REG_0(sc, reg, HIFN_PUCTRL_DMAENA);
+
+	hifn_puc_wait(sc);
+}
+
+/*
+ * Set the Retry and TRDY registers; note that we set them to
+ * zero because the 7811 locks up when forced to retry (section
+ * 3.6 of "Specification Update SU-0014-04".  Not clear if we
+ * should do this for all Hifn parts, but it doesn't seem to hurt.
+ */
+static void
+hifn_set_retry(struct hifn_softc *sc)
+{
+	DPRINTF("%s()\n", __FUNCTION__);
+	/* NB: RETRY only responds to 8-bit reads/writes */
+	pci_write_config_byte(sc->sc_pcidev, HIFN_RETRY_TIMEOUT, 0);
+	pci_write_config_dword(sc->sc_pcidev, HIFN_TRDY_TIMEOUT, 0);
+	/* piggy back the cache line setting here */
+	pci_write_config_byte(sc->sc_pcidev, PCI_CACHE_LINE_SIZE, hifn_cache_linesize);
+}
+
+/*
+ * Resets the board.  Values in the regesters are left as is
+ * from the reset (i.e. initial values are assigned elsewhere).
+ */
+static void
+hifn_reset_board(struct hifn_softc *sc, int full)
+{
+	u_int32_t reg;
+
+	DPRINTF("%s()\n", __FUNCTION__);
+	/*
+	 * Set polling in the DMA configuration register to zero.  0x7 avoids
+	 * resetting the board and zeros out the other fields.
+	 */
+	WRITE_REG_1(sc, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MSTRESET |
+	    HIFN_DMACNFG_DMARESET | HIFN_DMACNFG_MODE);
+
+	/*
+	 * Now that polling has been disabled, we have to wait 1 ms
+	 * before resetting the board.
+	 */
+	DELAY(1000);
+
+	/* Reset the DMA unit */
+	if (full) {
+		WRITE_REG_1(sc, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MODE);
+		DELAY(1000);
+	} else {
+		WRITE_REG_1(sc, HIFN_1_DMA_CNFG,
+		    HIFN_DMACNFG_MODE | HIFN_DMACNFG_MSTRESET);
+		hifn_reset_puc(sc);
+	}
+
+	KASSERT(sc->sc_dma != NULL, ("hifn_reset_board: null DMA tag!"));
+	bzero(sc->sc_dma, sizeof(*sc->sc_dma));
+
+	/* Bring dma unit out of reset */
+	WRITE_REG_1(sc, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MSTRESET |
+	    HIFN_DMACNFG_DMARESET | HIFN_DMACNFG_MODE);
+
+	hifn_puc_wait(sc);
+	hifn_set_retry(sc);
+
+	if (sc->sc_flags & HIFN_IS_7811) {
+		for (reg = 0; reg < 1000; reg++) {
+			if (READ_REG_1(sc, HIFN_1_7811_MIPSRST) &
+			    HIFN_MIPSRST_CRAMINIT)
+				break;
+			DELAY(1000);
+		}
+		if (reg == 1000)
+			device_printf(sc->sc_dev, ": cram init timeout\n");
+	} else {
+	  /* set up DMA configuration register #2 */
+	  /* turn off all PK and BAR0 swaps */
+	  WRITE_REG_1(sc, HIFN_1_DMA_CNFG2,
+		      (3 << HIFN_DMACNFG2_INIT_WRITE_BURST_SHIFT)|
+		      (3 << HIFN_DMACNFG2_INIT_READ_BURST_SHIFT)|
+		      (2 << HIFN_DMACNFG2_TGT_WRITE_BURST_SHIFT)|
+		      (2 << HIFN_DMACNFG2_TGT_READ_BURST_SHIFT));
+	}
+}
+
+static u_int32_t
+hifn_next_signature(u_int32_t a, u_int cnt)
+{
+	int i;
+	u_int32_t v;
+
+	for (i = 0; i < cnt; i++) {
+
+		/* get the parity */
+		v = a & 0x80080125;
+		v ^= v >> 16;
+		v ^= v >> 8;
+		v ^= v >> 4;
+		v ^= v >> 2;
+		v ^= v >> 1;
+
+		a = (v & 1) ^ (a << 1);
+	}
+
+	return a;
+}
+
+
+/*
+ * Checks to see if crypto is already enabled.  If crypto isn't enable,
+ * "hifn_enable_crypto" is called to enable it.  The check is important,
+ * as enabling crypto twice will lock the board.
+ */
+static int 
+hifn_enable_crypto(struct hifn_softc *sc)
+{
+	u_int32_t dmacfg, ramcfg, encl, addr, i;
+	char offtbl[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+					  0x00, 0x00, 0x00, 0x00 };
+
+	DPRINTF("%s()\n", __FUNCTION__);
+
+	ramcfg = READ_REG_0(sc, HIFN_0_PUCNFG);
+	dmacfg = READ_REG_1(sc, HIFN_1_DMA_CNFG);
+
+	/*
+	 * The RAM config register's encrypt level bit needs to be set before
+	 * every read performed on the encryption level register.
+	 */
+	WRITE_REG_0(sc, HIFN_0_PUCNFG, ramcfg | HIFN_PUCNFG_CHIPID);
+
+	encl = READ_REG_0(sc, HIFN_0_PUSTAT) & HIFN_PUSTAT_CHIPENA;
+
+	/*
+	 * Make sure we don't re-unlock.  Two unlocks kills chip until the
+	 * next reboot.
+	 */
+	if (encl == HIFN_PUSTAT_ENA_1 || encl == HIFN_PUSTAT_ENA_2) {
+#ifdef HIFN_DEBUG
+		if (hifn_debug)
+			device_printf(sc->sc_dev,
+			    "Strong crypto already enabled!\n");
+#endif
+		goto report;
+	}
+
+	if (encl != 0 && encl != HIFN_PUSTAT_ENA_0) {
+#ifdef HIFN_DEBUG
+		if (hifn_debug)
+			device_printf(sc->sc_dev,
+			      "Unknown encryption level 0x%x\n", encl);
+#endif
+		return 1;
+	}
+
+	WRITE_REG_1(sc, HIFN_1_DMA_CNFG, HIFN_DMACNFG_UNLOCK |
+	    HIFN_DMACNFG_MSTRESET | HIFN_DMACNFG_DMARESET | HIFN_DMACNFG_MODE);
+	DELAY(1000);
+	addr = READ_REG_1(sc, HIFN_UNLOCK_SECRET1);
+	DELAY(1000);
+	WRITE_REG_1(sc, HIFN_UNLOCK_SECRET2, 0);
+	DELAY(1000);
+
+	for (i = 0; i <= 12; i++) {
+		addr = hifn_next_signature(addr, offtbl[i] + 0x101);
+		WRITE_REG_1(sc, HIFN_UNLOCK_SECRET2, addr);
+
+		DELAY(1000);
+	}
+
+	WRITE_REG_0(sc, HIFN_0_PUCNFG, ramcfg | HIFN_PUCNFG_CHIPID);
+	encl = READ_REG_0(sc, HIFN_0_PUSTAT) & HIFN_PUSTAT_CHIPENA;
+
+#ifdef HIFN_DEBUG
+	if (hifn_debug) {
+		if (encl != HIFN_PUSTAT_ENA_1 && encl != HIFN_PUSTAT_ENA_2)
+			device_printf(sc->sc_dev, "Engine is permanently "
+				"locked until next system reset!\n");
+		else
+			device_printf(sc->sc_dev, "Engine enabled "
+				"successfully!\n");
+	}
+#endif
+
+report:
+	WRITE_REG_0(sc, HIFN_0_PUCNFG, ramcfg);
+	WRITE_REG_1(sc, HIFN_1_DMA_CNFG, dmacfg);
+
+	switch (encl) {
+	case HIFN_PUSTAT_ENA_1:
+	case HIFN_PUSTAT_ENA_2:
+		break;
+	case HIFN_PUSTAT_ENA_0:
+	default:
+		device_printf(sc->sc_dev, "disabled\n");
+		break;
+	}
+
+	return 0;
+}
+
+/*
+ * Give initial values to the registers listed in the "Register Space"
+ * section of the HIFN Software Development reference manual.
+ */
+static void 
+hifn_init_pci_registers(struct hifn_softc *sc)
+{
+	DPRINTF("%s()\n", __FUNCTION__);
+
+	/* write fixed values needed by the Initialization registers */
+	WRITE_REG_0(sc, HIFN_0_PUCTRL, HIFN_PUCTRL_DMAENA);
+	WRITE_REG_0(sc, HIFN_0_FIFOCNFG, HIFN_FIFOCNFG_THRESHOLD);
+	WRITE_REG_0(sc, HIFN_0_PUIER, HIFN_PUIER_DSTOVER);
+
+	/* write all 4 ring address registers */
+	WRITE_REG_1(sc, HIFN_1_DMA_CRAR, sc->sc_dma_physaddr +
+	    offsetof(struct hifn_dma, cmdr[0]));
+	WRITE_REG_1(sc, HIFN_1_DMA_SRAR, sc->sc_dma_physaddr +
+	    offsetof(struct hifn_dma, srcr[0]));
+	WRITE_REG_1(sc, HIFN_1_DMA_DRAR, sc->sc_dma_physaddr +
+	    offsetof(struct hifn_dma, dstr[0]));
+	WRITE_REG_1(sc, HIFN_1_DMA_RRAR, sc->sc_dma_physaddr +
+	    offsetof(struct hifn_dma, resr[0]));
+
+	DELAY(2000);
+
+	/* write status register */
+	WRITE_REG_1(sc, HIFN_1_DMA_CSR,
+	    HIFN_DMACSR_D_CTRL_DIS | HIFN_DMACSR_R_CTRL_DIS |
+	    HIFN_DMACSR_S_CTRL_DIS | HIFN_DMACSR_C_CTRL_DIS |
+	    HIFN_DMACSR_D_ABORT | HIFN_DMACSR_D_DONE | HIFN_DMACSR_D_LAST |
+	    HIFN_DMACSR_D_WAIT | HIFN_DMACSR_D_OVER |
+	    HIFN_DMACSR_R_ABORT | HIFN_DMACSR_R_DONE | HIFN_DMACSR_R_LAST |
+	    HIFN_DMACSR_R_WAIT | HIFN_DMACSR_R_OVER |
+	    HIFN_DMACSR_S_ABORT | HIFN_DMACSR_S_DONE | HIFN_DMACSR_S_LAST |
+	    HIFN_DMACSR_S_WAIT |
+	    HIFN_DMACSR_C_ABORT | HIFN_DMACSR_C_DONE | HIFN_DMACSR_C_LAST |
+	    HIFN_DMACSR_C_WAIT |
+	    HIFN_DMACSR_ENGINE |
+	    ((sc->sc_flags & HIFN_HAS_PUBLIC) ?
+		HIFN_DMACSR_PUBDONE : 0) |
+	    ((sc->sc_flags & HIFN_IS_7811) ?
+		HIFN_DMACSR_ILLW | HIFN_DMACSR_ILLR : 0));
+
+	sc->sc_d_busy = sc->sc_r_busy = sc->sc_s_busy = sc->sc_c_busy = 0;
+	sc->sc_dmaier |= HIFN_DMAIER_R_DONE | HIFN_DMAIER_C_ABORT |
+	    HIFN_DMAIER_D_OVER | HIFN_DMAIER_R_OVER |
+	    HIFN_DMAIER_S_ABORT | HIFN_DMAIER_D_ABORT | HIFN_DMAIER_R_ABORT |
+	    ((sc->sc_flags & HIFN_IS_7811) ?
+		HIFN_DMAIER_ILLW | HIFN_DMAIER_ILLR : 0);
+	sc->sc_dmaier &= ~HIFN_DMAIER_C_WAIT;
+	WRITE_REG_1(sc, HIFN_1_DMA_IER, sc->sc_dmaier);
+
+
+	if (sc->sc_flags & HIFN_IS_7956) {
+		u_int32_t pll;
+
+		WRITE_REG_0(sc, HIFN_0_PUCNFG, HIFN_PUCNFG_COMPSING |
+		    HIFN_PUCNFG_TCALLPHASES |
+		    HIFN_PUCNFG_TCDRVTOTEM | HIFN_PUCNFG_BUS32);
+
+		/* turn off the clocks and insure bypass is set */
+		pll = READ_REG_1(sc, HIFN_1_PLL);
+		pll = (pll &~ (HIFN_PLL_PK_CLK_SEL | HIFN_PLL_PE_CLK_SEL))
+		  | HIFN_PLL_BP | HIFN_PLL_MBSET;
+		WRITE_REG_1(sc, HIFN_1_PLL, pll);
+		DELAY(10*1000);		/* 10ms */
+
+		/* change configuration */
+		pll = (pll &~ HIFN_PLL_CONFIG) | sc->sc_pllconfig;
+		WRITE_REG_1(sc, HIFN_1_PLL, pll);
+		DELAY(10*1000);		/* 10ms */
+
+		/* disable bypass */
+		pll &= ~HIFN_PLL_BP;
+		WRITE_REG_1(sc, HIFN_1_PLL, pll);
+		/* enable clocks with new configuration */
+		pll |= HIFN_PLL_PK_CLK_SEL | HIFN_PLL_PE_CLK_SEL;
+		WRITE_REG_1(sc, HIFN_1_PLL, pll);
+	} else {
+		WRITE_REG_0(sc, HIFN_0_PUCNFG, HIFN_PUCNFG_COMPSING |
+		    HIFN_PUCNFG_DRFR_128 | HIFN_PUCNFG_TCALLPHASES |
+		    HIFN_PUCNFG_TCDRVTOTEM | HIFN_PUCNFG_BUS32 |
+		    (sc->sc_drammodel ? HIFN_PUCNFG_DRAM : HIFN_PUCNFG_SRAM));
+	}
+
+	WRITE_REG_0(sc, HIFN_0_PUISR, HIFN_PUISR_DSTOVER);
+	WRITE_REG_1(sc, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MSTRESET |
+	    HIFN_DMACNFG_DMARESET | HIFN_DMACNFG_MODE | HIFN_DMACNFG_LAST |
+	    ((HIFN_POLL_FREQUENCY << 16 ) & HIFN_DMACNFG_POLLFREQ) |
+	    ((HIFN_POLL_SCALAR << 8) & HIFN_DMACNFG_POLLINVAL));
+}
+
+/*
+ * The maximum number of sessions supported by the card
+ * is dependent on the amount of context ram, which
+ * encryption algorithms are enabled, and how compression
+ * is configured.  This should be configured before this
+ * routine is called.
+ */
+static void
+hifn_sessions(struct hifn_softc *sc)
+{
+	u_int32_t pucnfg;
+	int ctxsize;
+
+	DPRINTF("%s()\n", __FUNCTION__);
+
+	pucnfg = READ_REG_0(sc, HIFN_0_PUCNFG);
+
+	if (pucnfg & HIFN_PUCNFG_COMPSING) {
+		if (pucnfg & HIFN_PUCNFG_ENCCNFG)
+			ctxsize = 128;
+		else
+			ctxsize = 512;
+		/*
+		 * 7955/7956 has internal context memory of 32K
+		 */
+		if (sc->sc_flags & HIFN_IS_7956)
+			sc->sc_maxses = 32768 / ctxsize;
+		else
+			sc->sc_maxses = 1 +
+			    ((sc->sc_ramsize - 32768) / ctxsize);
+	} else
+		sc->sc_maxses = sc->sc_ramsize / 16384;
+
+	if (sc->sc_maxses > 2048)
+		sc->sc_maxses = 2048;
+}
+
+/*
+ * Determine ram type (sram or dram).  Board should be just out of a reset
+ * state when this is called.
+ */
+static int
+hifn_ramtype(struct hifn_softc *sc)
+{
+	u_int8_t data[8], dataexpect[8];
+	int i;
+
+	for (i = 0; i < sizeof(data); i++)
+		data[i] = dataexpect[i] = 0x55;
+	if (hifn_writeramaddr(sc, 0, data))
+		return (-1);
+	if (hifn_readramaddr(sc, 0, data))
+		return (-1);
+	if (bcmp(data, dataexpect, sizeof(data)) != 0) {
+		sc->sc_drammodel = 1;
+		return (0);
+	}
+
+	for (i = 0; i < sizeof(data); i++)
+		data[i] = dataexpect[i] = 0xaa;
+	if (hifn_writeramaddr(sc, 0, data))
+		return (-1);
+	if (hifn_readramaddr(sc, 0, data))
+		return (-1);
+	if (bcmp(data, dataexpect, sizeof(data)) != 0) {
+		sc->sc_drammodel = 1;
+		return (0);
+	}
+
+	return (0);
+}
+
+#define	HIFN_SRAM_MAX		(32 << 20)
+#define	HIFN_SRAM_STEP_SIZE	16384
+#define	HIFN_SRAM_GRANULARITY	(HIFN_SRAM_MAX / HIFN_SRAM_STEP_SIZE)
+
+static int
+hifn_sramsize(struct hifn_softc *sc)
+{
+	u_int32_t a;
+	u_int8_t data[8];
+	u_int8_t dataexpect[sizeof(data)];
+	int32_t i;
+
+	for (i = 0; i < sizeof(data); i++)
+		data[i] = dataexpect[i] = i ^ 0x5a;
+
+	for (i = HIFN_SRAM_GRANULARITY - 1; i >= 0; i--) {
+		a = i * HIFN_SRAM_STEP_SIZE;
+		bcopy(&i, data, sizeof(i));
+		hifn_writeramaddr(sc, a, data);
+	}
+
+	for (i = 0; i < HIFN_SRAM_GRANULARITY; i++) {
+		a = i * HIFN_SRAM_STEP_SIZE;
+		bcopy(&i, dataexpect, sizeof(i));
+		if (hifn_readramaddr(sc, a, data) < 0)
+			return (0);
+		if (bcmp(data, dataexpect, sizeof(data)) != 0)
+			return (0);
+		sc->sc_ramsize = a + HIFN_SRAM_STEP_SIZE;
+	}
+
+	return (0);
+}
+
+/*
+ * XXX For dram boards, one should really try all of the
+ * HIFN_PUCNFG_DSZ_*'s.  This just assumes that PUCNFG
+ * is already set up correctly.
+ */
+static int
+hifn_dramsize(struct hifn_softc *sc)
+{
+	u_int32_t cnfg;
+
+	if (sc->sc_flags & HIFN_IS_7956) {
+		/*
+		 * 7955/7956 have a fixed internal ram of only 32K.
+		 */
+		sc->sc_ramsize = 32768;
+	} else {
+		cnfg = READ_REG_0(sc, HIFN_0_PUCNFG) &
+		    HIFN_PUCNFG_DRAMMASK;
+		sc->sc_ramsize = 1 << ((cnfg >> 13) + 18);
+	}
+	return (0);
+}
+
+static void
+hifn_alloc_slot(struct hifn_softc *sc, int *cmdp, int *srcp, int *dstp, int *resp)
+{
+	struct hifn_dma *dma = sc->sc_dma;
+
+	DPRINTF("%s()\n", __FUNCTION__);
+
+	if (dma->cmdi == HIFN_D_CMD_RSIZE) {
+		dma->cmdi = 0;
+		dma->cmdr[HIFN_D_CMD_RSIZE].l = htole32(HIFN_D_JUMP|HIFN_D_MASKDONEIRQ);
+		wmb();
+		dma->cmdr[HIFN_D_CMD_RSIZE].l |= htole32(HIFN_D_VALID);
+		HIFN_CMDR_SYNC(sc, HIFN_D_CMD_RSIZE,
+		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
+	}
+	*cmdp = dma->cmdi++;
+	dma->cmdk = dma->cmdi;
+
+	if (dma->srci == HIFN_D_SRC_RSIZE) {
+		dma->srci = 0;
+		dma->srcr[HIFN_D_SRC_RSIZE].l = htole32(HIFN_D_JUMP|HIFN_D_MASKDONEIRQ);
+		wmb();
+		dma->srcr[HIFN_D_SRC_RSIZE].l |= htole32(HIFN_D_VALID);
+		HIFN_SRCR_SYNC(sc, HIFN_D_SRC_RSIZE,
+		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
+	}
+	*srcp = dma->srci++;
+	dma->srck = dma->srci;
+
+	if (dma->dsti == HIFN_D_DST_RSIZE) {
+		dma->dsti = 0;
+		dma->dstr[HIFN_D_DST_RSIZE].l = htole32(HIFN_D_JUMP|HIFN_D_MASKDONEIRQ);
+		wmb();
+		dma->dstr[HIFN_D_DST_RSIZE].l |= htole32(HIFN_D_VALID);
+		HIFN_DSTR_SYNC(sc, HIFN_D_DST_RSIZE,
+		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
+	}
+	*dstp = dma->dsti++;
+	dma->dstk = dma->dsti;
+
+	if (dma->resi == HIFN_D_RES_RSIZE) {
+		dma->resi = 0;
+		dma->resr[HIFN_D_RES_RSIZE].l = htole32(HIFN_D_JUMP|HIFN_D_MASKDONEIRQ);
+		wmb();
+		dma->resr[HIFN_D_RES_RSIZE].l |= htole32(HIFN_D_VALID);
+		HIFN_RESR_SYNC(sc, HIFN_D_RES_RSIZE,
+		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
+	}
+	*resp = dma->resi++;
+	dma->resk = dma->resi;
+}
+
+static int
+hifn_writeramaddr(struct hifn_softc *sc, int addr, u_int8_t *data)
+{
+	struct hifn_dma *dma = sc->sc_dma;
+	hifn_base_command_t wc;
+	const u_int32_t masks = HIFN_D_VALID | HIFN_D_LAST | HIFN_D_MASKDONEIRQ;
+	int r, cmdi, resi, srci, dsti;
+
+	DPRINTF("%s()\n", __FUNCTION__);
+
+	wc.masks = htole16(3 << 13);
+	wc.session_num = htole16(addr >> 14);
+	wc.total_source_count = htole16(8);
+	wc.total_dest_count = htole16(addr & 0x3fff);
+
+	hifn_alloc_slot(sc, &cmdi, &srci, &dsti, &resi);
+
+	WRITE_REG_1(sc, HIFN_1_DMA_CSR,
+	    HIFN_DMACSR_C_CTRL_ENA | HIFN_DMACSR_S_CTRL_ENA |
+	    HIFN_DMACSR_D_CTRL_ENA | HIFN_DMACSR_R_CTRL_ENA);
+
+	/* build write command */
+	bzero(dma->command_bufs[cmdi], HIFN_MAX_COMMAND);
+	*(hifn_base_command_t *)dma->command_bufs[cmdi] = wc;
+	bcopy(data, &dma->test_src, sizeof(dma->test_src));
+
+	dma->srcr[srci].p = htole32(sc->sc_dma_physaddr
+	    + offsetof(struct hifn_dma, test_src));
+	dma->dstr[dsti].p = htole32(sc->sc_dma_physaddr
+	    + offsetof(struct hifn_dma, test_dst));
+
+	dma->cmdr[cmdi].l = htole32(16 | masks);
+	dma->srcr[srci].l = htole32(8 | masks);
+	dma->dstr[dsti].l = htole32(4 | masks);
+	dma->resr[resi].l = htole32(4 | masks);
+
+	for (r = 10000; r >= 0; r--) {
+		DELAY(10);
+		if ((dma->resr[resi].l & htole32(HIFN_D_VALID)) == 0)
+			break;
+	}
+	if (r == 0) {
+		device_printf(sc->sc_dev, "writeramaddr -- "
+		    "result[%d](addr %d) still valid\n", resi, addr);
+		r = -1;
+		return (-1);
+	} else
+		r = 0;
+
+	WRITE_REG_1(sc, HIFN_1_DMA_CSR,
+	    HIFN_DMACSR_C_CTRL_DIS | HIFN_DMACSR_S_CTRL_DIS |
+	    HIFN_DMACSR_D_CTRL_DIS | HIFN_DMACSR_R_CTRL_DIS);
+
+	return (r);
+}
+
+static int
+hifn_readramaddr(struct hifn_softc *sc, int addr, u_int8_t *data)
+{
+	struct hifn_dma *dma = sc->sc_dma;
+	hifn_base_command_t rc;
+	const u_int32_t masks = HIFN_D_VALID | HIFN_D_LAST | HIFN_D_MASKDONEIRQ;
+	int r, cmdi, srci, dsti, resi;
+
+	DPRINTF("%s()\n", __FUNCTION__);
+
+	rc.masks = htole16(2 << 13);
+	rc.session_num = htole16(addr >> 14);
+	rc.total_source_count = htole16(addr & 0x3fff);
+	rc.total_dest_count = htole16(8);
+
+	hifn_alloc_slot(sc, &cmdi, &srci, &dsti, &resi);
+
+	WRITE_REG_1(sc, HIFN_1_DMA_CSR,
+	    HIFN_DMACSR_C_CTRL_ENA | HIFN_DMACSR_S_CTRL_ENA |
+	    HIFN_DMACSR_D_CTRL_ENA | HIFN_DMACSR_R_CTRL_ENA);
+
+	bzero(dma->command_bufs[cmdi], HIFN_MAX_COMMAND);
+	*(hifn_base_command_t *)dma->command_bufs[cmdi] = rc;
+
+	dma->srcr[srci].p = htole32(sc->sc_dma_physaddr +
+	    offsetof(struct hifn_dma, test_src));
+	dma->test_src = 0;
+	dma->dstr[dsti].p =  htole32(sc->sc_dma_physaddr +
+	    offsetof(struct hifn_dma, test_dst));
+	dma->test_dst = 0;
+	dma->cmdr[cmdi].l = htole32(8 | masks);
+	dma->srcr[srci].l = htole32(8 | masks);
+	dma->dstr[dsti].l = htole32(8 | masks);
+	dma->resr[resi].l = htole32(HIFN_MAX_RESULT | masks);
+
+	for (r = 10000; r >= 0; r--) {
+		DELAY(10);
+		if ((dma->resr[resi].l & htole32(HIFN_D_VALID)) == 0)
+			break;
+	}
+	if (r == 0) {
+		device_printf(sc->sc_dev, "readramaddr -- "
+		    "result[%d](addr %d) still valid\n", resi, addr);
+		r = -1;
+	} else {
+		r = 0;
+		bcopy(&dma->test_dst, data, sizeof(dma->test_dst));
+	}
+
+	WRITE_REG_1(sc, HIFN_1_DMA_CSR,
+	    HIFN_DMACSR_C_CTRL_DIS | HIFN_DMACSR_S_CTRL_DIS |
+	    HIFN_DMACSR_D_CTRL_DIS | HIFN_DMACSR_R_CTRL_DIS);
+
+	return (r);
+}
+
+/*
+ * Initialize the descriptor rings.
+ */
+static void 
+hifn_init_dma(struct hifn_softc *sc)
+{
+	struct hifn_dma *dma = sc->sc_dma;
+	int i;
+
+	DPRINTF("%s()\n", __FUNCTION__);
+
+	hifn_set_retry(sc);
+
+	/* initialize static pointer values */
+	for (i = 0; i < HIFN_D_CMD_RSIZE; i++)
+		dma->cmdr[i].p = htole32(sc->sc_dma_physaddr +
+		    offsetof(struct hifn_dma, command_bufs[i][0]));
+	for (i = 0; i < HIFN_D_RES_RSIZE; i++)
+		dma->resr[i].p = htole32(sc->sc_dma_physaddr +
+		    offsetof(struct hifn_dma, result_bufs[i][0]));
+
+	dma->cmdr[HIFN_D_CMD_RSIZE].p =
+	    htole32(sc->sc_dma_physaddr + offsetof(struct hifn_dma, cmdr[0]));
+	dma->srcr[HIFN_D_SRC_RSIZE].p =
+	    htole32(sc->sc_dma_physaddr + offsetof(struct hifn_dma, srcr[0]));
+	dma->dstr[HIFN_D_DST_RSIZE].p =
+	    htole32(sc->sc_dma_physaddr + offsetof(struct hifn_dma, dstr[0]));
+	dma->resr[HIFN_D_RES_RSIZE].p =
+	    htole32(sc->sc_dma_physaddr + offsetof(struct hifn_dma, resr[0]));
+
+	dma->cmdu = dma->srcu = dma->dstu = dma->resu = 0;
+	dma->cmdi = dma->srci = dma->dsti = dma->resi = 0;
+	dma->cmdk = dma->srck = dma->dstk = dma->resk = 0;
+}
+
+/*
+ * Writes out the raw command buffer space.  Returns the
+ * command buffer size.
+ */
+static u_int
+hifn_write_command(struct hifn_command *cmd, u_int8_t *buf)
+{
+	struct hifn_softc *sc = NULL;
+	u_int8_t *buf_pos;
+	hifn_base_command_t *base_cmd;
+	hifn_mac_command_t *mac_cmd;
+	hifn_crypt_command_t *cry_cmd;
+	int using_mac, using_crypt, len, ivlen;
+	u_int32_t dlen, slen;
+
+	DPRINTF("%s()\n", __FUNCTION__);
+
+	buf_pos = buf;
+	using_mac = cmd->base_masks & HIFN_BASE_CMD_MAC;
+	using_crypt = cmd->base_masks & HIFN_BASE_CMD_CRYPT;
+
+	base_cmd = (hifn_base_command_t *)buf_pos;
+	base_cmd->masks = htole16(cmd->base_masks);
+	slen = cmd->src_mapsize;
+	if (cmd->sloplen)
+		dlen = cmd->dst_mapsize - cmd->sloplen + sizeof(u_int32_t);
+	else
+		dlen = cmd->dst_mapsize;
+	base_cmd->total_source_count = htole16(slen & HIFN_BASE_CMD_LENMASK_LO);
+	base_cmd->total_dest_count = htole16(dlen & HIFN_BASE_CMD_LENMASK_LO);
+	dlen >>= 16;
+	slen >>= 16;
+	base_cmd->session_num = htole16(
+	    ((slen << HIFN_BASE_CMD_SRCLEN_S) & HIFN_BASE_CMD_SRCLEN_M) |
+	    ((dlen << HIFN_BASE_CMD_DSTLEN_S) & HIFN_BASE_CMD_DSTLEN_M));
+	buf_pos += sizeof(hifn_base_command_t);
+
+	if (using_mac) {
+		mac_cmd = (hifn_mac_command_t *)buf_pos;
+		dlen = cmd->maccrd->crd_len;
+		mac_cmd->source_count = htole16(dlen & 0xffff);
+		dlen >>= 16;
+		mac_cmd->masks = htole16(cmd->mac_masks |
+		    ((dlen << HIFN_MAC_CMD_SRCLEN_S) & HIFN_MAC_CMD_SRCLEN_M));
+		mac_cmd->header_skip = htole16(cmd->maccrd->crd_skip);
+		mac_cmd->reserved = 0;
+		buf_pos += sizeof(hifn_mac_command_t);
+	}
+
+	if (using_crypt) {
+		cry_cmd = (hifn_crypt_command_t *)buf_pos;
+		dlen = cmd->enccrd->crd_len;
+		cry_cmd->source_count = htole16(dlen & 0xffff);
+		dlen >>= 16;
+		cry_cmd->masks = htole16(cmd->cry_masks |
+		    ((dlen << HIFN_CRYPT_CMD_SRCLEN_S) & HIFN_CRYPT_CMD_SRCLEN_M));
+		cry_cmd->header_skip = htole16(cmd->enccrd->crd_skip);
+		cry_cmd->reserved = 0;
+		buf_pos += sizeof(hifn_crypt_command_t);
+	}
+
+	if (using_mac && cmd->mac_masks & HIFN_MAC_CMD_NEW_KEY) {
+		bcopy(cmd->mac, buf_pos, HIFN_MAC_KEY_LENGTH);
+		buf_pos += HIFN_MAC_KEY_LENGTH;
+	}
+
+	if (using_crypt && cmd->cry_masks & HIFN_CRYPT_CMD_NEW_KEY) {
+		switch (cmd->cry_masks & HIFN_CRYPT_CMD_ALG_MASK) {
+		case HIFN_CRYPT_CMD_ALG_3DES:
+			bcopy(cmd->ck, buf_pos, HIFN_3DES_KEY_LENGTH);
+			buf_pos += HIFN_3DES_KEY_LENGTH;
+			break;
+		case HIFN_CRYPT_CMD_ALG_DES:
+			bcopy(cmd->ck, buf_pos, HIFN_DES_KEY_LENGTH);
+			buf_pos += HIFN_DES_KEY_LENGTH;
+			break;
+		case HIFN_CRYPT_CMD_ALG_RC4:
+			len = 256;
+			do {
+				int clen;
+
+				clen = MIN(cmd->cklen, len);
+				bcopy(cmd->ck, buf_pos, clen);
+				len -= clen;
+				buf_pos += clen;
+			} while (len > 0);
+			bzero(buf_pos, 4);
+			buf_pos += 4;
+			break;
+		case HIFN_CRYPT_CMD_ALG_AES:
+			/*
+			 * AES keys are variable 128, 192 and
+			 * 256 bits (16, 24 and 32 bytes).
+			 */
+			bcopy(cmd->ck, buf_pos, cmd->cklen);
+			buf_pos += cmd->cklen;
+			break;
+		}
+	}
+
+	if (using_crypt && cmd->cry_masks & HIFN_CRYPT_CMD_NEW_IV) {
+		switch (cmd->cry_masks & HIFN_CRYPT_CMD_ALG_MASK) {
+		case HIFN_CRYPT_CMD_ALG_AES:
+			ivlen = HIFN_AES_IV_LENGTH;
+			break;
+		default:
+			ivlen = HIFN_IV_LENGTH;
+			break;
+		}
+		bcopy(cmd->iv, buf_pos, ivlen);
+		buf_pos += ivlen;
+	}
+
+	if ((cmd->base_masks & (HIFN_BASE_CMD_MAC|HIFN_BASE_CMD_CRYPT)) == 0) {
+		bzero(buf_pos, 8);
+		buf_pos += 8;
+	}
+
+	return (buf_pos - buf);
+}
+
+static int
+hifn_dmamap_aligned(struct hifn_operand *op)
+{
+	struct hifn_softc *sc = NULL;
+	int i;
+
+	DPRINTF("%s()\n", __FUNCTION__);
+
+	for (i = 0; i < op->nsegs; i++) {
+		if (op->segs[i].ds_addr & 3)
+			return (0);
+		if ((i != (op->nsegs - 1)) && (op->segs[i].ds_len & 3))
+			return (0);
+	}
+	return (1);
+}
+
+static __inline int
+hifn_dmamap_dstwrap(struct hifn_softc *sc, int idx)
+{
+	struct hifn_dma *dma = sc->sc_dma;
+
+	if (++idx == HIFN_D_DST_RSIZE) {
+		dma->dstr[idx].l = htole32(HIFN_D_VALID | HIFN_D_JUMP |
+		    HIFN_D_MASKDONEIRQ);
+		HIFN_DSTR_SYNC(sc, idx,
+		    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
+		idx = 0;
+	}
+	return (idx);
+}
+
+static int
+hifn_dmamap_load_dst(struct hifn_softc *sc, struct hifn_command *cmd)
+{
+	struct hifn_dma *dma = sc->sc_dma;
+	struct hifn_operand *dst = &cmd->dst;
+	u_int32_t p, l;
+	int idx, used = 0, i;
+
+	DPRINTF("%s()\n", __FUNCTION__);
+
+	idx = dma->dsti;
+	for (i = 0; i < dst->nsegs - 1; i++) {
+		dma->dstr[idx].p = htole32(dst->segs[i].ds_addr);
+		dma->dstr[idx].l = htole32(HIFN_D_MASKDONEIRQ | dst->segs[i].ds_len);
+		wmb();
+		dma->dstr[idx].l |= htole32(HIFN_D_VALID);
+		HIFN_DSTR_SYNC(sc, idx,
+		    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
+		used++;
+
+		idx = hifn_dmamap_dstwrap(sc, idx);
+	}
+
+	if (cmd->sloplen == 0) {
+		p = dst->segs[i].ds_addr;
+		l = HIFN_D_MASKDONEIRQ | HIFN_D_LAST |
+		    dst->segs[i].ds_len;
+	} else {
+		p = sc->sc_dma_physaddr +
+		    offsetof(struct hifn_dma, slop[cmd->slopidx]);
+		l = HIFN_D_MASKDONEIRQ | HIFN_D_LAST |
+		    sizeof(u_int32_t);
+
+		if ((dst->segs[i].ds_len - cmd->sloplen) != 0) {
+			dma->dstr[idx].p = htole32(dst->segs[i].ds_addr);
+			dma->dstr[idx].l = htole32(HIFN_D_MASKDONEIRQ |
+			    (dst->segs[i].ds_len - cmd->sloplen));
+			wmb();
+			dma->dstr[idx].l |= htole32(HIFN_D_VALID);
+			HIFN_DSTR_SYNC(sc, idx,
+			    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
+			used++;
+
+			idx = hifn_dmamap_dstwrap(sc, idx);
+		}
+	}
+	dma->dstr[idx].p = htole32(p);
+	dma->dstr[idx].l = htole32(l);
+	wmb();
+	dma->dstr[idx].l |= htole32(HIFN_D_VALID);
+	HIFN_DSTR_SYNC(sc, idx, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
+	used++;
+
+	idx = hifn_dmamap_dstwrap(sc, idx);
+
+	dma->dsti = idx;
+	dma->dstu += used;
+	return (idx);
+}
+
+static __inline int
+hifn_dmamap_srcwrap(struct hifn_softc *sc, int idx)
+{
+	struct hifn_dma *dma = sc->sc_dma;
+
+	if (++idx == HIFN_D_SRC_RSIZE) {
+		dma->srcr[idx].l = htole32(HIFN_D_VALID |
+		    HIFN_D_JUMP | HIFN_D_MASKDONEIRQ);
+		HIFN_SRCR_SYNC(sc, HIFN_D_SRC_RSIZE,
+		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
+		idx = 0;
+	}
+	return (idx);
+}
+
+static int
+hifn_dmamap_load_src(struct hifn_softc *sc, struct hifn_command *cmd)
+{
+	struct hifn_dma *dma = sc->sc_dma;
+	struct hifn_operand *src = &cmd->src;
+	int idx, i;
+	u_int32_t last = 0;
+
+	DPRINTF("%s()\n", __FUNCTION__);
+
+	idx = dma->srci;
+	for (i = 0; i < src->nsegs; i++) {
+		if (i == src->nsegs - 1)
+			last = HIFN_D_LAST;
+
+		dma->srcr[idx].p = htole32(src->segs[i].ds_addr);
+		dma->srcr[idx].l = htole32(src->segs[i].ds_len |
+		    HIFN_D_MASKDONEIRQ | last);
+		wmb();
+		dma->srcr[idx].l |= htole32(HIFN_D_VALID);
+		HIFN_SRCR_SYNC(sc, idx,
+		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
+
+		idx = hifn_dmamap_srcwrap(sc, idx);
+	}
+	dma->srci = idx;
+	dma->srcu += src->nsegs;
+	return (idx);
+} 
+
+
+static int 
+hifn_crypto(
+	struct hifn_softc *sc,
+	struct hifn_command *cmd,
+	struct cryptop *crp,
+	int hint)
+{
+	struct	hifn_dma *dma = sc->sc_dma;
+	u_int32_t cmdlen, csr;
+	int cmdi, resi, err = 0;
+	unsigned long l_flags;
+
+	DPRINTF("%s()\n", __FUNCTION__);
+
+	/*
+	 * need 1 cmd, and 1 res
+	 *
+	 * NB: check this first since it's easy.
+	 */
+	HIFN_LOCK(sc);
+	if ((dma->cmdu + 1) > HIFN_D_CMD_RSIZE ||
+	    (dma->resu + 1) > HIFN_D_RES_RSIZE) {
+#ifdef HIFN_DEBUG
+		if (hifn_debug) {
+			device_printf(sc->sc_dev,
+				"cmd/result exhaustion, cmdu %u resu %u\n",
+				dma->cmdu, dma->resu);
+		}
+#endif
+		hifnstats.hst_nomem_cr++;
+		sc->sc_needwakeup |= CRYPTO_SYMQ;
+		HIFN_UNLOCK(sc);
+		return (ERESTART);
+	}
+
+	if (crp->crp_flags & CRYPTO_F_SKBUF) {
+		if (pci_map_skb(sc, &cmd->src, cmd->src_skb)) {
+			hifnstats.hst_nomem_load++;
+			err = ENOMEM;
+			goto err_srcmap1;
+		}
+	} else if (crp->crp_flags & CRYPTO_F_IOV) {
+		if (pci_map_uio(sc, &cmd->src, cmd->src_io)) {
+			hifnstats.hst_nomem_load++;
+			err = ENOMEM;
+			goto err_srcmap1;
+		}
+	} else {
+		if (pci_map_buf(sc, &cmd->src, cmd->src_buf, crp->crp_ilen)) {
+			hifnstats.hst_nomem_load++;
+			err = ENOMEM;
+			goto err_srcmap1;
+		}
+	}
+
+	if (hifn_dmamap_aligned(&cmd->src)) {
+		cmd->sloplen = cmd->src_mapsize & 3;
+		cmd->dst = cmd->src;
+	} else {
+		if (crp->crp_flags & CRYPTO_F_IOV) {
+			DPRINTF("%s,%d: %s - EINVAL\n",__FILE__,__LINE__,__FUNCTION__);
+			err = EINVAL;
+			goto err_srcmap;
+		} else if (crp->crp_flags & CRYPTO_F_SKBUF) {
+#ifdef NOTYET
+			int totlen, len;
+			struct mbuf *m, *m0, *mlast;
+
+			KASSERT(cmd->dst_m == cmd->src_m,
+				("hifn_crypto: dst_m initialized improperly"));
+			hifnstats.hst_unaligned++;
+			/*
+			 * Source is not aligned on a longword boundary.
+			 * Copy the data to insure alignment.  If we fail
+			 * to allocate mbufs or clusters while doing this
+			 * we return ERESTART so the operation is requeued
+			 * at the crypto later, but only if there are
+			 * ops already posted to the hardware; otherwise we
+			 * have no guarantee that we'll be re-entered.
+			 */
+			totlen = cmd->src_mapsize;
+			if (cmd->src_m->m_flags & M_PKTHDR) {
+				len = MHLEN;
+				MGETHDR(m0, M_DONTWAIT, MT_DATA);
+				if (m0 && !m_dup_pkthdr(m0, cmd->src_m, M_DONTWAIT)) {
+					m_free(m0);
+					m0 = NULL;
+				}
+			} else {
+				len = MLEN;
+				MGET(m0, M_DONTWAIT, MT_DATA);
+			}
+			if (m0 == NULL) {
+				hifnstats.hst_nomem_mbuf++;
+				err = dma->cmdu ? ERESTART : ENOMEM;
+				goto err_srcmap;
+			}
+			if (totlen >= MINCLSIZE) {
+				MCLGET(m0, M_DONTWAIT);
+				if ((m0->m_flags & M_EXT) == 0) {
+					hifnstats.hst_nomem_mcl++;
+					err = dma->cmdu ? ERESTART : ENOMEM;
+					m_freem(m0);
+					goto err_srcmap;
+				}
+				len = MCLBYTES;
+			}
+			totlen -= len;
+			m0->m_pkthdr.len = m0->m_len = len;
+			mlast = m0;
+
+			while (totlen > 0) {
+				MGET(m, M_DONTWAIT, MT_DATA);
+				if (m == NULL) {
+					hifnstats.hst_nomem_mbuf++;
+					err = dma->cmdu ? ERESTART : ENOMEM;
+					m_freem(m0);
+					goto err_srcmap;
+				}
+				len = MLEN;
+				if (totlen >= MINCLSIZE) {
+					MCLGET(m, M_DONTWAIT);
+					if ((m->m_flags & M_EXT) == 0) {
+						hifnstats.hst_nomem_mcl++;
+						err = dma->cmdu ? ERESTART : ENOMEM;
+						mlast->m_next = m;
+						m_freem(m0);
+						goto err_srcmap;
+					}
+					len = MCLBYTES;
+				}
+
+				m->m_len = len;
+				m0->m_pkthdr.len += len;
+				totlen -= len;
+
+				mlast->m_next = m;
+				mlast = m;
+			}
+			cmd->dst_m = m0;
+#else
+			device_printf(sc->sc_dev,
+					"%s,%d: CRYPTO_F_SKBUF unaligned not implemented\n",
+					__FILE__, __LINE__);
+			err = EINVAL;
+			goto err_srcmap;
+#endif
+		} else {
+			device_printf(sc->sc_dev,
+					"%s,%d: unaligned contig buffers not implemented\n",
+					__FILE__, __LINE__);
+			err = EINVAL;
+			goto err_srcmap;
+		}
+	}
+
+	if (cmd->dst_map == NULL) {
+		if (crp->crp_flags & CRYPTO_F_SKBUF) {
+			if (pci_map_skb(sc, &cmd->dst, cmd->dst_skb)) {
+				hifnstats.hst_nomem_map++;
+				err = ENOMEM;
+				goto err_dstmap1;
+			}
+		} else if (crp->crp_flags & CRYPTO_F_IOV) {
+			if (pci_map_uio(sc, &cmd->dst, cmd->dst_io)) {
+				hifnstats.hst_nomem_load++;
+				err = ENOMEM;
+				goto err_dstmap1;
+			}
+		} else {
+			if (pci_map_buf(sc, &cmd->dst, cmd->dst_buf, crp->crp_ilen)) {
+				hifnstats.hst_nomem_load++;
+				err = ENOMEM;
+				goto err_dstmap1;
+			}
+		}
+	}
+
+#ifdef HIFN_DEBUG
+	if (hifn_debug) {
+		device_printf(sc->sc_dev,
+		    "Entering cmd: stat %8x ien %8x u %d/%d/%d/%d n %d/%d\n",
+		    READ_REG_1(sc, HIFN_1_DMA_CSR),
+		    READ_REG_1(sc, HIFN_1_DMA_IER),
+		    dma->cmdu, dma->srcu, dma->dstu, dma->resu,
+		    cmd->src_nsegs, cmd->dst_nsegs);
+	}
+#endif
+
+#if 0
+	if (cmd->src_map == cmd->dst_map) {
+		bus_dmamap_sync(sc->sc_dmat, cmd->src_map,
+		    BUS_DMASYNC_PREWRITE|BUS_DMASYNC_PREREAD);
+	} else {
+		bus_dmamap_sync(sc->sc_dmat, cmd->src_map,
+		    BUS_DMASYNC_PREWRITE);
+		bus_dmamap_sync(sc->sc_dmat, cmd->dst_map,
+		    BUS_DMASYNC_PREREAD);
+	}
+#endif
+
+	/*
+	 * need N src, and N dst
+	 */
+	if ((dma->srcu + cmd->src_nsegs) > HIFN_D_SRC_RSIZE ||
+	    (dma->dstu + cmd->dst_nsegs + 1) > HIFN_D_DST_RSIZE) {
+#ifdef HIFN_DEBUG
+		if (hifn_debug) {
+			device_printf(sc->sc_dev,
+				"src/dst exhaustion, srcu %u+%u dstu %u+%u\n",
+				dma->srcu, cmd->src_nsegs,
+				dma->dstu, cmd->dst_nsegs);
+		}
+#endif
+		hifnstats.hst_nomem_sd++;
+		err = ERESTART;
+		goto err_dstmap;
+	}
+
+	if (dma->cmdi == HIFN_D_CMD_RSIZE) {
+		dma->cmdi = 0;
+		dma->cmdr[HIFN_D_CMD_RSIZE].l = htole32(HIFN_D_JUMP|HIFN_D_MASKDONEIRQ);
+		wmb();
+		dma->cmdr[HIFN_D_CMD_RSIZE].l |= htole32(HIFN_D_VALID);
+		HIFN_CMDR_SYNC(sc, HIFN_D_CMD_RSIZE,
+		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
+	}
+	cmdi = dma->cmdi++;
+	cmdlen = hifn_write_command(cmd, dma->command_bufs[cmdi]);
+	HIFN_CMD_SYNC(sc, cmdi, BUS_DMASYNC_PREWRITE);
+
+	/* .p for command/result already set */
+	dma->cmdr[cmdi].l = htole32(cmdlen | HIFN_D_LAST |
+	    HIFN_D_MASKDONEIRQ);
+	wmb();
+	dma->cmdr[cmdi].l |= htole32(HIFN_D_VALID);
+	HIFN_CMDR_SYNC(sc, cmdi,
+	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
+	dma->cmdu++;
+
+	/*
+	 * We don't worry about missing an interrupt (which a "command wait"
+	 * interrupt salvages us from), unless there is more than one command
+	 * in the queue.
+	 */
+	if (dma->cmdu > 1) {
+		sc->sc_dmaier |= HIFN_DMAIER_C_WAIT;
+		WRITE_REG_1(sc, HIFN_1_DMA_IER, sc->sc_dmaier);
+	}
+
+	hifnstats.hst_ipackets++;
+	hifnstats.hst_ibytes += cmd->src_mapsize;
+
+	hifn_dmamap_load_src(sc, cmd);
+
+	/*
+	 * Unlike other descriptors, we don't mask done interrupt from
+	 * result descriptor.
+	 */
+#ifdef HIFN_DEBUG
+	if (hifn_debug)
+		device_printf(sc->sc_dev, "load res\n");
+#endif
+	if (dma->resi == HIFN_D_RES_RSIZE) {
+		dma->resi = 0;
+		dma->resr[HIFN_D_RES_RSIZE].l = htole32(HIFN_D_JUMP|HIFN_D_MASKDONEIRQ);
+		wmb();
+		dma->resr[HIFN_D_RES_RSIZE].l |= htole32(HIFN_D_VALID);
+		HIFN_RESR_SYNC(sc, HIFN_D_RES_RSIZE,
+		    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
+	}
+	resi = dma->resi++;
+	KASSERT(dma->hifn_commands[resi] == NULL,
+		("hifn_crypto: command slot %u busy", resi));
+	dma->hifn_commands[resi] = cmd;
+	HIFN_RES_SYNC(sc, resi, BUS_DMASYNC_PREREAD);
+	if ((hint & CRYPTO_HINT_MORE) && sc->sc_curbatch < hifn_maxbatch) {
+		dma->resr[resi].l = htole32(HIFN_MAX_RESULT |
+		    HIFN_D_LAST | HIFN_D_MASKDONEIRQ);
+		wmb();
+		dma->resr[resi].l |= htole32(HIFN_D_VALID);
+		sc->sc_curbatch++;
+		if (sc->sc_curbatch > hifnstats.hst_maxbatch)
+			hifnstats.hst_maxbatch = sc->sc_curbatch;
+		hifnstats.hst_totbatch++;
+	} else {
+		dma->resr[resi].l = htole32(HIFN_MAX_RESULT | HIFN_D_LAST);
+		wmb();
+		dma->resr[resi].l |= htole32(HIFN_D_VALID);
+		sc->sc_curbatch = 0;
+	}
+	HIFN_RESR_SYNC(sc, resi,
+	    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
+	dma->resu++;
+
+	if (cmd->sloplen)
+		cmd->slopidx = resi;
+
+	hifn_dmamap_load_dst(sc, cmd);
+
+	csr = 0;
+	if (sc->sc_c_busy == 0) {
+		csr |= HIFN_DMACSR_C_CTRL_ENA;
+		sc->sc_c_busy = 1;
+	}
+	if (sc->sc_s_busy == 0) {
+		csr |= HIFN_DMACSR_S_CTRL_ENA;
+		sc->sc_s_busy = 1;
+	}
+	if (sc->sc_r_busy == 0) {
+		csr |= HIFN_DMACSR_R_CTRL_ENA;
+		sc->sc_r_busy = 1;
+	}
+	if (sc->sc_d_busy == 0) {
+		csr |= HIFN_DMACSR_D_CTRL_ENA;
+		sc->sc_d_busy = 1;
+	}
+	if (csr)
+		WRITE_REG_1(sc, HIFN_1_DMA_CSR, csr);
+
+#ifdef HIFN_DEBUG
+	if (hifn_debug) {
+		device_printf(sc->sc_dev, "command: stat %8x ier %8x\n",
+		    READ_REG_1(sc, HIFN_1_DMA_CSR),
+		    READ_REG_1(sc, HIFN_1_DMA_IER));
+	}
+#endif
+
+	sc->sc_active = 5;
+	HIFN_UNLOCK(sc);
+	KASSERT(err == 0, ("hifn_crypto: success with error %u", err));
+	return (err);		/* success */
+
+err_dstmap:
+	if (cmd->src_map != cmd->dst_map)
+		pci_unmap_buf(sc, &cmd->dst);
+err_dstmap1:
+err_srcmap:
+	if (crp->crp_flags & CRYPTO_F_SKBUF) {
+		if (cmd->src_skb != cmd->dst_skb)
+#ifdef NOTYET
+			m_freem(cmd->dst_m);
+#else
+			device_printf(sc->sc_dev,
+					"%s,%d: CRYPTO_F_SKBUF src != dst not implemented\n",
+					__FILE__, __LINE__);
+#endif
+	}
+	pci_unmap_buf(sc, &cmd->src);
+err_srcmap1:
+	HIFN_UNLOCK(sc);
+	return (err);
+}
+
+static void
+hifn_tick(unsigned long arg)
+{
+	struct hifn_softc *sc;
+	unsigned long l_flags;
+
+	if (arg >= HIFN_MAX_CHIPS)
+		return;
+	sc = hifn_chip_idx[arg];
+	if (!sc)
+		return;
+
+	HIFN_LOCK(sc);
+	if (sc->sc_active == 0) {
+		struct hifn_dma *dma = sc->sc_dma;
+		u_int32_t r = 0;
+
+		if (dma->cmdu == 0 && sc->sc_c_busy) {
+			sc->sc_c_busy = 0;
+			r |= HIFN_DMACSR_C_CTRL_DIS;
+		}
+		if (dma->srcu == 0 && sc->sc_s_busy) {
+			sc->sc_s_busy = 0;
+			r |= HIFN_DMACSR_S_CTRL_DIS;
+		}
+		if (dma->dstu == 0 && sc->sc_d_busy) {
+			sc->sc_d_busy = 0;
+			r |= HIFN_DMACSR_D_CTRL_DIS;
+		}
+		if (dma->resu == 0 && sc->sc_r_busy) {
+			sc->sc_r_busy = 0;
+			r |= HIFN_DMACSR_R_CTRL_DIS;
+		}
+		if (r)
+			WRITE_REG_1(sc, HIFN_1_DMA_CSR, r);
+	} else
+		sc->sc_active--;
+	HIFN_UNLOCK(sc);
+	mod_timer(&sc->sc_tickto, jiffies + HZ);
+}
+
+static irqreturn_t
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,19)
+hifn_intr(int irq, void *arg)
+#else
+hifn_intr(int irq, void *arg, struct pt_regs *regs)
+#endif
+{
+	struct hifn_softc *sc = arg;
+	struct hifn_dma *dma;
+	u_int32_t dmacsr, restart;
+	int i, u;
+	unsigned long l_flags;
+
+	dmacsr = READ_REG_1(sc, HIFN_1_DMA_CSR);
+
+	/* Nothing in the DMA unit interrupted */
+	if ((dmacsr & sc->sc_dmaier) == 0)
+		return IRQ_NONE;
+
+	HIFN_LOCK(sc);
+
+	dma = sc->sc_dma;
+
+#ifdef HIFN_DEBUG
+	if (hifn_debug) {
+		device_printf(sc->sc_dev,
+		    "irq: stat %08x ien %08x damier %08x i %d/%d/%d/%d k %d/%d/%d/%d u %d/%d/%d/%d\n",
+		    dmacsr, READ_REG_1(sc, HIFN_1_DMA_IER), sc->sc_dmaier,
+		    dma->cmdi, dma->srci, dma->dsti, dma->resi,
+		    dma->cmdk, dma->srck, dma->dstk, dma->resk,
+		    dma->cmdu, dma->srcu, dma->dstu, dma->resu);
+	}
+#endif
+
+	WRITE_REG_1(sc, HIFN_1_DMA_CSR, dmacsr & sc->sc_dmaier);
+
+	if ((sc->sc_flags & HIFN_HAS_PUBLIC) &&
+	    (dmacsr & HIFN_DMACSR_PUBDONE))
+		WRITE_REG_1(sc, HIFN_1_PUB_STATUS,
+		    READ_REG_1(sc, HIFN_1_PUB_STATUS) | HIFN_PUBSTS_DONE);
+
+	restart = dmacsr & (HIFN_DMACSR_D_OVER | HIFN_DMACSR_R_OVER);
+	if (restart)
+		device_printf(sc->sc_dev, "overrun %x\n", dmacsr);
+
+	if (sc->sc_flags & HIFN_IS_7811) {
+		if (dmacsr & HIFN_DMACSR_ILLR)
+			device_printf(sc->sc_dev, "illegal read\n");
+		if (dmacsr & HIFN_DMACSR_ILLW)
+			device_printf(sc->sc_dev, "illegal write\n");
+	}
+
+	restart = dmacsr & (HIFN_DMACSR_C_ABORT | HIFN_DMACSR_S_ABORT |
+	    HIFN_DMACSR_D_ABORT | HIFN_DMACSR_R_ABORT);
+	if (restart) {
+		device_printf(sc->sc_dev, "abort, resetting.\n");
+		hifnstats.hst_abort++;
+		hifn_abort(sc);
+		HIFN_UNLOCK(sc);
+		return IRQ_HANDLED;
+	}
+
+	if ((dmacsr & HIFN_DMACSR_C_WAIT) && (dma->cmdu == 0)) {
+		/*
+		 * If no slots to process and we receive a "waiting on
+		 * command" interrupt, we disable the "waiting on command"
+		 * (by clearing it).
+		 */
+		sc->sc_dmaier &= ~HIFN_DMAIER_C_WAIT;
+		WRITE_REG_1(sc, HIFN_1_DMA_IER, sc->sc_dmaier);
+	}
+
+	/* clear the rings */
+	i = dma->resk; u = dma->resu;
+	while (u != 0) {
+		HIFN_RESR_SYNC(sc, i,
+		    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
+		if (dma->resr[i].l & htole32(HIFN_D_VALID)) {
+			HIFN_RESR_SYNC(sc, i,
+			    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
+			break;
+		}
+
+		if (i != HIFN_D_RES_RSIZE) {
+			struct hifn_command *cmd;
+			u_int8_t *macbuf = NULL;
+
+			HIFN_RES_SYNC(sc, i, BUS_DMASYNC_POSTREAD);
+			cmd = dma->hifn_commands[i];
+			KASSERT(cmd != NULL,
+				("hifn_intr: null command slot %u", i));
+			dma->hifn_commands[i] = NULL;
+
+			if (cmd->base_masks & HIFN_BASE_CMD_MAC) {
+				macbuf = dma->result_bufs[i];
+				macbuf += 12;
+			}
+
+			hifn_callback(sc, cmd, macbuf);
+			hifnstats.hst_opackets++;
+			u--;
+		}
+
+		if (++i == (HIFN_D_RES_RSIZE + 1))
+			i = 0;
+	}
+	dma->resk = i; dma->resu = u;
+
+	i = dma->srck; u = dma->srcu;
+	while (u != 0) {
+		if (i == HIFN_D_SRC_RSIZE)
+			i = 0;
+		HIFN_SRCR_SYNC(sc, i,
+		    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
+		if (dma->srcr[i].l & htole32(HIFN_D_VALID)) {
+			HIFN_SRCR_SYNC(sc, i,
+			    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
+			break;
+		}
+		i++, u--;
+	}
+	dma->srck = i; dma->srcu = u;
+
+	i = dma->cmdk; u = dma->cmdu;
+	while (u != 0) {
+		HIFN_CMDR_SYNC(sc, i,
+		    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
+		if (dma->cmdr[i].l & htole32(HIFN_D_VALID)) {
+			HIFN_CMDR_SYNC(sc, i,
+			    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
+			break;
+		}
+		if (i != HIFN_D_CMD_RSIZE) {
+			u--;
+			HIFN_CMD_SYNC(sc, i, BUS_DMASYNC_POSTWRITE);
+		}
+		if (++i == (HIFN_D_CMD_RSIZE + 1))
+			i = 0;
+	}
+	dma->cmdk = i; dma->cmdu = u;
+
+	HIFN_UNLOCK(sc);
+
+	if (sc->sc_needwakeup) {		/* XXX check high watermark */
+		int wakeup = sc->sc_needwakeup & (CRYPTO_SYMQ|CRYPTO_ASYMQ);
+#ifdef HIFN_DEBUG
+		if (hifn_debug)
+			device_printf(sc->sc_dev,
+				"wakeup crypto (%x) u %d/%d/%d/%d\n",
+				sc->sc_needwakeup,
+				dma->cmdu, dma->srcu, dma->dstu, dma->resu);
+#endif
+		sc->sc_needwakeup &= ~wakeup;
+		crypto_unblock(sc->sc_cid, wakeup);
+	}
+
+	return IRQ_HANDLED;
+}
+
+/*
+ * Allocate a new 'session' and return an encoded session id.  'sidp'
+ * contains our registration id, and should contain an encoded session
+ * id on successful allocation.
+ */
+static int
+hifn_newsession(device_t dev, u_int32_t *sidp, struct cryptoini *cri)
+{
+	struct hifn_softc *sc = device_get_softc(dev);
+	struct cryptoini *c;
+	int mac = 0, cry = 0, sesn;
+	struct hifn_session *ses = NULL;
+	unsigned long l_flags;
+
+	DPRINTF("%s()\n", __FUNCTION__);
+
+	KASSERT(sc != NULL, ("hifn_newsession: null softc"));
+	if (sidp == NULL || cri == NULL || sc == NULL) {
+		DPRINTF("%s,%d: %s - EINVAL\n", __FILE__, __LINE__, __FUNCTION__);
+		return (EINVAL);
+	}
+
+	HIFN_LOCK(sc);
+	if (sc->sc_sessions == NULL) {
+		ses = sc->sc_sessions = (struct hifn_session *)kmalloc(sizeof(*ses),
+				SLAB_ATOMIC);
+		if (ses == NULL) {
+			HIFN_UNLOCK(sc);
+			return (ENOMEM);
+		}
+		sesn = 0;
+		sc->sc_nsessions = 1;
+	} else {
+		for (sesn = 0; sesn < sc->sc_nsessions; sesn++) {
+			if (!sc->sc_sessions[sesn].hs_used) {
+				ses = &sc->sc_sessions[sesn];
+				break;
+			}
+		}
+
+		if (ses == NULL) {
+			sesn = sc->sc_nsessions;
+			ses = (struct hifn_session *)kmalloc((sesn + 1) * sizeof(*ses),
+					SLAB_ATOMIC);
+			if (ses == NULL) {
+				HIFN_UNLOCK(sc);
+				return (ENOMEM);
+			}
+			bcopy(sc->sc_sessions, ses, sesn * sizeof(*ses));
+			bzero(sc->sc_sessions, sesn * sizeof(*ses));
+			kfree(sc->sc_sessions);
+			sc->sc_sessions = ses;
+			ses = &sc->sc_sessions[sesn];
+			sc->sc_nsessions++;
+		}
+	}
+	HIFN_UNLOCK(sc);
+
+	bzero(ses, sizeof(*ses));
+	ses->hs_used = 1;
+
+	for (c = cri; c != NULL; c = c->cri_next) {
+		switch (c->cri_alg) {
+		case CRYPTO_MD5:
+		case CRYPTO_SHA1:
+		case CRYPTO_MD5_HMAC:
+		case CRYPTO_SHA1_HMAC:
+			if (mac) {
+				DPRINTF("%s,%d: %s - EINVAL\n",__FILE__,__LINE__,__FUNCTION__);
+				return (EINVAL);
+			}
+			mac = 1;
+			ses->hs_mlen = c->cri_mlen;
+			if (ses->hs_mlen == 0) {
+				switch (c->cri_alg) {
+				case CRYPTO_MD5:
+				case CRYPTO_MD5_HMAC:
+					ses->hs_mlen = 16;
+					break;
+				case CRYPTO_SHA1:
+				case CRYPTO_SHA1_HMAC:
+					ses->hs_mlen = 20;
+					break;
+				}
+			}
+			break;
+		case CRYPTO_DES_CBC:
+		case CRYPTO_3DES_CBC:
+		case CRYPTO_AES_CBC:
+			/* XXX this may read fewer, does it matter? */
+			read_random(ses->hs_iv,
+				c->cri_alg == CRYPTO_AES_CBC ?
+					HIFN_AES_IV_LENGTH : HIFN_IV_LENGTH);
+			/*FALLTHROUGH*/
+		case CRYPTO_ARC4:
+			if (cry) {
+				DPRINTF("%s,%d: %s - EINVAL\n",__FILE__,__LINE__,__FUNCTION__);
+				return (EINVAL);
+			}
+			cry = 1;
+			break;
+		default:
+			DPRINTF("%s,%d: %s - EINVAL\n",__FILE__,__LINE__,__FUNCTION__);
+			return (EINVAL);
+		}
+	}
+	if (mac == 0 && cry == 0) {
+		DPRINTF("%s,%d: %s - EINVAL\n",__FILE__,__LINE__,__FUNCTION__);
+		return (EINVAL);
+	}
+
+	*sidp = HIFN_SID(device_get_unit(sc->sc_dev), sesn);
+
+	return (0);
+}
+
+/*
+ * Deallocate a session.
+ * XXX this routine should run a zero'd mac/encrypt key into context ram.
+ * XXX to blow away any keys already stored there.
+ */
+static int
+hifn_freesession(device_t dev, u_int64_t tid)
+{
+	struct hifn_softc *sc = device_get_softc(dev);
+	int session, error;
+	u_int32_t sid = CRYPTO_SESID2LID(tid);
+	unsigned long l_flags;
+
+	DPRINTF("%s()\n", __FUNCTION__);
+
+	KASSERT(sc != NULL, ("hifn_freesession: null softc"));
+	if (sc == NULL) {
+		DPRINTF("%s,%d: %s - EINVAL\n",__FILE__,__LINE__,__FUNCTION__);
+		return (EINVAL);
+	}
+
+	HIFN_LOCK(sc);
+	session = HIFN_SESSION(sid);
+	if (session < sc->sc_nsessions) {
+		bzero(&sc->sc_sessions[session], sizeof(struct hifn_session));
+		error = 0;
+	} else {
+		DPRINTF("%s,%d: %s - EINVAL\n",__FILE__,__LINE__,__FUNCTION__);
+		error = EINVAL;
+	}
+	HIFN_UNLOCK(sc);
+
+	return (error);
+}
+
+static int
+hifn_process(device_t dev, struct cryptop *crp, int hint)
+{
+	struct hifn_softc *sc = device_get_softc(dev);
+	struct hifn_command *cmd = NULL;
+	int session, err, ivlen;
+	struct cryptodesc *crd1, *crd2, *maccrd, *enccrd;
+
+	DPRINTF("%s()\n", __FUNCTION__);
+
+	if (crp == NULL || crp->crp_callback == NULL) {
+		hifnstats.hst_invalid++;
+		DPRINTF("%s,%d: %s - EINVAL\n",__FILE__,__LINE__,__FUNCTION__);
+		return (EINVAL);
+	}
+	session = HIFN_SESSION(crp->crp_sid);
+
+	if (sc == NULL || session >= sc->sc_nsessions) {
+		DPRINTF("%s,%d: %s - EINVAL\n",__FILE__,__LINE__,__FUNCTION__);
+		err = EINVAL;
+		goto errout;
+	}
+
+	cmd = kmalloc(sizeof(struct hifn_command), SLAB_ATOMIC);
+	if (cmd == NULL) {
+		hifnstats.hst_nomem++;
+		err = ENOMEM;
+		goto errout;
+	}
+	memset(cmd, 0, sizeof(*cmd));
+
+	if (crp->crp_flags & CRYPTO_F_SKBUF) {
+		cmd->src_skb = (struct sk_buff *)crp->crp_buf;
+		cmd->dst_skb = (struct sk_buff *)crp->crp_buf;
+	} else if (crp->crp_flags & CRYPTO_F_IOV) {
+		cmd->src_io = (struct uio *)crp->crp_buf;
+		cmd->dst_io = (struct uio *)crp->crp_buf;
+	} else {
+		cmd->src_buf = crp->crp_buf;
+		cmd->dst_buf = crp->crp_buf;
+	}
+
+	crd1 = crp->crp_desc;
+	if (crd1 == NULL) {
+		DPRINTF("%s,%d: %s - EINVAL\n",__FILE__,__LINE__,__FUNCTION__);
+		err = EINVAL;
+		goto errout;
+	}
+	crd2 = crd1->crd_next;
+
+	if (crd2 == NULL) {
+		if (crd1->crd_alg == CRYPTO_MD5_HMAC ||
+		    crd1->crd_alg == CRYPTO_SHA1_HMAC ||
+		    crd1->crd_alg == CRYPTO_SHA1 ||
+		    crd1->crd_alg == CRYPTO_MD5) {
+			maccrd = crd1;
+			enccrd = NULL;
+		} else if (crd1->crd_alg == CRYPTO_DES_CBC ||
+		    crd1->crd_alg == CRYPTO_3DES_CBC ||
+		    crd1->crd_alg == CRYPTO_AES_CBC ||
+		    crd1->crd_alg == CRYPTO_ARC4) {
+			if ((crd1->crd_flags & CRD_F_ENCRYPT) == 0)
+				cmd->base_masks |= HIFN_BASE_CMD_DECODE;
+			maccrd = NULL;
+			enccrd = crd1;
+		} else {
+			DPRINTF("%s,%d: %s - EINVAL\n",__FILE__,__LINE__,__FUNCTION__);
+			err = EINVAL;
+			goto errout;
+		}
+	} else {
+		if ((crd1->crd_alg == CRYPTO_MD5_HMAC ||
+                     crd1->crd_alg == CRYPTO_SHA1_HMAC ||
+                     crd1->crd_alg == CRYPTO_MD5 ||
+                     crd1->crd_alg == CRYPTO_SHA1) &&
+		    (crd2->crd_alg == CRYPTO_DES_CBC ||
+		     crd2->crd_alg == CRYPTO_3DES_CBC ||
+		     crd2->crd_alg == CRYPTO_AES_CBC ||
+		     crd2->crd_alg == CRYPTO_ARC4) &&
+		    ((crd2->crd_flags & CRD_F_ENCRYPT) == 0)) {
+			cmd->base_masks = HIFN_BASE_CMD_DECODE;
+			maccrd = crd1;
+			enccrd = crd2;
+		} else if ((crd1->crd_alg == CRYPTO_DES_CBC ||
+		     crd1->crd_alg == CRYPTO_ARC4 ||
+		     crd1->crd_alg == CRYPTO_3DES_CBC ||
+		     crd1->crd_alg == CRYPTO_AES_CBC) &&
+		    (crd2->crd_alg == CRYPTO_MD5_HMAC ||
+                     crd2->crd_alg == CRYPTO_SHA1_HMAC ||
+                     crd2->crd_alg == CRYPTO_MD5 ||
+                     crd2->crd_alg == CRYPTO_SHA1) &&
+		    (crd1->crd_flags & CRD_F_ENCRYPT)) {
+			enccrd = crd1;
+			maccrd = crd2;
+		} else {
+			/*
+			 * We cannot order the 7751 as requested
+			 */
+			DPRINTF("%s,%d: %s %d,%d,%d - EINVAL\n",__FILE__,__LINE__,__FUNCTION__, crd1->crd_alg, crd2->crd_alg, crd1->crd_flags & CRD_F_ENCRYPT);
+			err = EINVAL;
+			goto errout;
+		}
+	}
+
+	if (enccrd) {
+		cmd->enccrd = enccrd;
+		cmd->base_masks |= HIFN_BASE_CMD_CRYPT;
+		switch (enccrd->crd_alg) {
+		case CRYPTO_ARC4:
+			cmd->cry_masks |= HIFN_CRYPT_CMD_ALG_RC4;
+			break;
+		case CRYPTO_DES_CBC:
+			cmd->cry_masks |= HIFN_CRYPT_CMD_ALG_DES |
+			    HIFN_CRYPT_CMD_MODE_CBC |
+			    HIFN_CRYPT_CMD_NEW_IV;
+			break;
+		case CRYPTO_3DES_CBC:
+			cmd->cry_masks |= HIFN_CRYPT_CMD_ALG_3DES |
+			    HIFN_CRYPT_CMD_MODE_CBC |
+			    HIFN_CRYPT_CMD_NEW_IV;
+			break;
+		case CRYPTO_AES_CBC:
+			cmd->cry_masks |= HIFN_CRYPT_CMD_ALG_AES |
+			    HIFN_CRYPT_CMD_MODE_CBC |
+			    HIFN_CRYPT_CMD_NEW_IV;
+			break;
+		default:
+			DPRINTF("%s,%d: %s - EINVAL\n",__FILE__,__LINE__,__FUNCTION__);
+			err = EINVAL;
+			goto errout;
+		}
+		if (enccrd->crd_alg != CRYPTO_ARC4) {
+			ivlen = ((enccrd->crd_alg == CRYPTO_AES_CBC) ?
+				HIFN_AES_IV_LENGTH : HIFN_IV_LENGTH);
+			if (enccrd->crd_flags & CRD_F_ENCRYPT) {
+				if (enccrd->crd_flags & CRD_F_IV_EXPLICIT)
+					bcopy(enccrd->crd_iv, cmd->iv, ivlen);
+				else
+					bcopy(sc->sc_sessions[session].hs_iv,
+					    cmd->iv, ivlen);
+
+				if ((enccrd->crd_flags & CRD_F_IV_PRESENT)
+				    == 0) {
+					crypto_copyback(crp->crp_flags,
+					    crp->crp_buf, enccrd->crd_inject,
+					    ivlen, cmd->iv);
+				}
+			} else {
+				if (enccrd->crd_flags & CRD_F_IV_EXPLICIT)
+					bcopy(enccrd->crd_iv, cmd->iv, ivlen);
+				else {
+					crypto_copydata(crp->crp_flags,
+					    crp->crp_buf, enccrd->crd_inject,
+					    ivlen, cmd->iv);
+				}
+			}
+		}
+
+		if (enccrd->crd_flags & CRD_F_KEY_EXPLICIT)
+			cmd->cry_masks |= HIFN_CRYPT_CMD_NEW_KEY;
+		cmd->ck = enccrd->crd_key;
+		cmd->cklen = enccrd->crd_klen >> 3;
+		cmd->cry_masks |= HIFN_CRYPT_CMD_NEW_KEY;
+
+		/* 
+		 * Need to specify the size for the AES key in the masks.
+		 */
+		if ((cmd->cry_masks & HIFN_CRYPT_CMD_ALG_MASK) ==
+		    HIFN_CRYPT_CMD_ALG_AES) {
+			switch (cmd->cklen) {
+			case 16:
+				cmd->cry_masks |= HIFN_CRYPT_CMD_KSZ_128;
+				break;
+			case 24:
+				cmd->cry_masks |= HIFN_CRYPT_CMD_KSZ_192;
+				break;
+			case 32:
+				cmd->cry_masks |= HIFN_CRYPT_CMD_KSZ_256;
+				break;
+			default:
+				DPRINTF("%s,%d: %s - EINVAL\n",__FILE__,__LINE__,__FUNCTION__);
+				err = EINVAL;
+				goto errout;
+			}
+		}
+	}
+
+	if (maccrd) {
+		cmd->maccrd = maccrd;
+		cmd->base_masks |= HIFN_BASE_CMD_MAC;
+
+		switch (maccrd->crd_alg) {
+		case CRYPTO_MD5:
+			cmd->mac_masks |= HIFN_MAC_CMD_ALG_MD5 |
+			    HIFN_MAC_CMD_RESULT | HIFN_MAC_CMD_MODE_HASH |
+			    HIFN_MAC_CMD_POS_IPSEC;
+                       break;
+		case CRYPTO_MD5_HMAC:
+			cmd->mac_masks |= HIFN_MAC_CMD_ALG_MD5 |
+			    HIFN_MAC_CMD_RESULT | HIFN_MAC_CMD_MODE_HMAC |
+			    HIFN_MAC_CMD_POS_IPSEC | HIFN_MAC_CMD_TRUNC;
+			break;
+		case CRYPTO_SHA1:
+			cmd->mac_masks |= HIFN_MAC_CMD_ALG_SHA1 |
+			    HIFN_MAC_CMD_RESULT | HIFN_MAC_CMD_MODE_HASH |
+			    HIFN_MAC_CMD_POS_IPSEC;
+			break;
+		case CRYPTO_SHA1_HMAC:
+			cmd->mac_masks |= HIFN_MAC_CMD_ALG_SHA1 |
+			    HIFN_MAC_CMD_RESULT | HIFN_MAC_CMD_MODE_HMAC |
+			    HIFN_MAC_CMD_POS_IPSEC | HIFN_MAC_CMD_TRUNC;
+			break;
+		}
+
+		if (maccrd->crd_alg == CRYPTO_SHA1_HMAC ||
+		     maccrd->crd_alg == CRYPTO_MD5_HMAC) {
+			cmd->mac_masks |= HIFN_MAC_CMD_NEW_KEY;
+			bcopy(maccrd->crd_key, cmd->mac, maccrd->crd_klen >> 3);
+			bzero(cmd->mac + (maccrd->crd_klen >> 3),
+			    HIFN_MAC_KEY_LENGTH - (maccrd->crd_klen >> 3));
+		}
+	}
+
+	cmd->crp = crp;
+	cmd->session_num = session;
+	cmd->softc = sc;
+
+	err = hifn_crypto(sc, cmd, crp, hint);
+	if (!err) {
+		return 0;
+	} else if (err == ERESTART) {
+		/*
+		 * There weren't enough resources to dispatch the request
+		 * to the part.  Notify the caller so they'll requeue this
+		 * request and resubmit it again soon.
+		 */
+#ifdef HIFN_DEBUG
+		if (hifn_debug)
+			device_printf(sc->sc_dev, "requeue request\n");
+#endif
+		kfree(cmd);
+		sc->sc_needwakeup |= CRYPTO_SYMQ;
+		return (err);
+	}
+
+errout:
+	if (cmd != NULL)
+		kfree(cmd);
+	if (err == EINVAL)
+		hifnstats.hst_invalid++;
+	else
+		hifnstats.hst_nomem++;
+	crp->crp_etype = err;
+	crypto_done(crp);
+	return (err);
+}
+
+static void
+hifn_abort(struct hifn_softc *sc)
+{
+	struct hifn_dma *dma = sc->sc_dma;
+	struct hifn_command *cmd;
+	struct cryptop *crp;
+	int i, u;
+
+	DPRINTF("%s()\n", __FUNCTION__);
+
+	i = dma->resk; u = dma->resu;
+	while (u != 0) {
+		cmd = dma->hifn_commands[i];
+		KASSERT(cmd != NULL, ("hifn_abort: null command slot %u", i));
+		dma->hifn_commands[i] = NULL;
+		crp = cmd->crp;
+
+		if ((dma->resr[i].l & htole32(HIFN_D_VALID)) == 0) {
+			/* Salvage what we can. */
+			u_int8_t *macbuf;
+
+			if (cmd->base_masks & HIFN_BASE_CMD_MAC) {
+				macbuf = dma->result_bufs[i];
+				macbuf += 12;
+			} else
+				macbuf = NULL;
+			hifnstats.hst_opackets++;
+			hifn_callback(sc, cmd, macbuf);
+		} else {
+#if 0
+			if (cmd->src_map == cmd->dst_map) {
+				bus_dmamap_sync(sc->sc_dmat, cmd->src_map,
+				    BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
+			} else {
+				bus_dmamap_sync(sc->sc_dmat, cmd->src_map,
+				    BUS_DMASYNC_POSTWRITE);
+				bus_dmamap_sync(sc->sc_dmat, cmd->dst_map,
+				    BUS_DMASYNC_POSTREAD);
+			}
+#endif
+
+			if (cmd->src_skb != cmd->dst_skb) {
+#ifdef NOTYET
+				m_freem(cmd->src_m);
+				crp->crp_buf = (caddr_t)cmd->dst_m;
+#else
+				device_printf(sc->sc_dev,
+						"%s,%d: CRYPTO_F_SKBUF src != dst not implemented\n",
+						__FILE__, __LINE__);
+#endif
+			}
+
+			/* non-shared buffers cannot be restarted */
+			if (cmd->src_map != cmd->dst_map) {
+				/*
+				 * XXX should be EAGAIN, delayed until
+				 * after the reset.
+				 */
+				crp->crp_etype = ENOMEM;
+				pci_unmap_buf(sc, &cmd->dst);
+			} else
+				crp->crp_etype = ENOMEM;
+
+			pci_unmap_buf(sc, &cmd->src);
+
+			kfree(cmd);
+			if (crp->crp_etype != EAGAIN)
+				crypto_done(crp);
+		}
+
+		if (++i == HIFN_D_RES_RSIZE)
+			i = 0;
+		u--;
+	}
+	dma->resk = i; dma->resu = u;
+
+	hifn_reset_board(sc, 1);
+	hifn_init_dma(sc);
+	hifn_init_pci_registers(sc);
+}
+
+static void
+hifn_callback(struct hifn_softc *sc, struct hifn_command *cmd, u_int8_t *macbuf)
+{
+	struct hifn_dma *dma = sc->sc_dma;
+	struct cryptop *crp = cmd->crp;
+	struct cryptodesc *crd;
+	int i, u, ivlen;
+
+	DPRINTF("%s()\n", __FUNCTION__);
+
+#if 0
+	if (cmd->src_map == cmd->dst_map) {
+		bus_dmamap_sync(sc->sc_dmat, cmd->src_map,
+		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
+	} else {
+		bus_dmamap_sync(sc->sc_dmat, cmd->src_map,
+		    BUS_DMASYNC_POSTWRITE);
+		bus_dmamap_sync(sc->sc_dmat, cmd->dst_map,
+		    BUS_DMASYNC_POSTREAD);
+	}
+#endif
+
+	if (crp->crp_flags & CRYPTO_F_SKBUF) {
+		if (cmd->src_skb != cmd->dst_skb) {
+#ifdef NOTYET
+			crp->crp_buf = (caddr_t)cmd->dst_m;
+			totlen = cmd->src_mapsize;
+			for (m = cmd->dst_m; m != NULL; m = m->m_next) {
+				if (totlen < m->m_len) {
+					m->m_len = totlen;
+					totlen = 0;
+				} else
+					totlen -= m->m_len;
+			}
+			cmd->dst_m->m_pkthdr.len = cmd->src_m->m_pkthdr.len;
+			m_freem(cmd->src_m);
+#else
+			device_printf(sc->sc_dev,
+					"%s,%d: CRYPTO_F_SKBUF src != dst not implemented\n",
+					__FILE__, __LINE__);
+#endif
+		}
+	}
+
+	if (cmd->sloplen != 0) {
+		crypto_copyback(crp->crp_flags, crp->crp_buf,
+		    cmd->src_mapsize - cmd->sloplen, cmd->sloplen,
+		    (caddr_t)&dma->slop[cmd->slopidx]);
+	}
+
+	i = dma->dstk; u = dma->dstu;
+	while (u != 0) {
+		if (i == HIFN_D_DST_RSIZE)
+			i = 0;
+#if 0
+		bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap,
+		    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
+#endif
+		if (dma->dstr[i].l & htole32(HIFN_D_VALID)) {
+#if 0
+			bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap,
+			    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
+#endif
+			break;
+		}
+		i++, u--;
+	}
+	dma->dstk = i; dma->dstu = u;
+
+	hifnstats.hst_obytes += cmd->dst_mapsize;
+
+	if ((cmd->base_masks & (HIFN_BASE_CMD_CRYPT | HIFN_BASE_CMD_DECODE)) ==
+	    HIFN_BASE_CMD_CRYPT) {
+		for (crd = crp->crp_desc; crd; crd = crd->crd_next) {
+			if (crd->crd_alg != CRYPTO_DES_CBC &&
+			    crd->crd_alg != CRYPTO_3DES_CBC &&
+			    crd->crd_alg != CRYPTO_AES_CBC)
+				continue;
+			ivlen = ((crd->crd_alg == CRYPTO_AES_CBC) ?
+				HIFN_AES_IV_LENGTH : HIFN_IV_LENGTH);
+			crypto_copydata(crp->crp_flags, crp->crp_buf,
+			    crd->crd_skip + crd->crd_len - ivlen, ivlen,
+			    cmd->softc->sc_sessions[cmd->session_num].hs_iv);
+			break;
+		}
+	}
+
+	if (macbuf != NULL) {
+		for (crd = crp->crp_desc; crd; crd = crd->crd_next) {
+                        int len;
+
+			if (crd->crd_alg != CRYPTO_MD5 &&
+			    crd->crd_alg != CRYPTO_SHA1 &&
+			    crd->crd_alg != CRYPTO_MD5_HMAC &&
+			    crd->crd_alg != CRYPTO_SHA1_HMAC) {
+				continue;
+			}
+			len = cmd->softc->sc_sessions[cmd->session_num].hs_mlen;
+			crypto_copyback(crp->crp_flags, crp->crp_buf,
+			    crd->crd_inject, len, macbuf);
+			break;
+		}
+	}
+
+	if (cmd->src_map != cmd->dst_map)
+		pci_unmap_buf(sc, &cmd->dst);
+	pci_unmap_buf(sc, &cmd->src);
+	kfree(cmd);
+	crypto_done(crp);
+}
+
+/*
+ * 7811 PB3 rev/2 parts lock-up on burst writes to Group 0
+ * and Group 1 registers; avoid conditions that could create
+ * burst writes by doing a read in between the writes.
+ *
+ * NB: The read we interpose is always to the same register;
+ *     we do this because reading from an arbitrary (e.g. last)
+ *     register may not always work.
+ */
+static void
+hifn_write_reg_0(struct hifn_softc *sc, bus_size_t reg, u_int32_t val)
+{
+	if (sc->sc_flags & HIFN_IS_7811) {
+		if (sc->sc_bar0_lastreg == reg - 4)
+			readl(sc->sc_bar0 + HIFN_0_PUCNFG);
+		sc->sc_bar0_lastreg = reg;
+	}
+	writel(val, sc->sc_bar0 + reg);
+}
+
+static void
+hifn_write_reg_1(struct hifn_softc *sc, bus_size_t reg, u_int32_t val)
+{
+	if (sc->sc_flags & HIFN_IS_7811) {
+		if (sc->sc_bar1_lastreg == reg - 4)
+			readl(sc->sc_bar1 + HIFN_1_REVID);
+		sc->sc_bar1_lastreg = reg;
+	}
+	writel(val, sc->sc_bar1 + reg);
+}
+
+
+static struct pci_device_id hifn_pci_tbl[] = {
+	{ PCI_VENDOR_HIFN, PCI_PRODUCT_HIFN_7951,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, },
+	{ PCI_VENDOR_HIFN, PCI_PRODUCT_HIFN_7955,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, },
+	{ PCI_VENDOR_HIFN, PCI_PRODUCT_HIFN_7956,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, },
+	{ PCI_VENDOR_NETSEC, PCI_PRODUCT_NETSEC_7751,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, },
+	{ PCI_VENDOR_INVERTEX, PCI_PRODUCT_INVERTEX_AEON,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, },
+	{ PCI_VENDOR_HIFN, PCI_PRODUCT_HIFN_7811,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, },
+	/*
+	 * Other vendors share this PCI ID as well, such as
+	 * http://www.powercrypt.com, and obviously they also
+	 * use the same key.
+	 */
+	{ PCI_VENDOR_HIFN, PCI_PRODUCT_HIFN_7751,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, },
+	{ 0, 0, 0, 0, 0, 0, }
+};
+MODULE_DEVICE_TABLE(pci, hifn_pci_tbl);
+
+static struct pci_driver hifn_driver = {
+	.name         = "hifn",
+	.id_table     = hifn_pci_tbl,
+	.probe        =	hifn_probe,
+	.remove       = hifn_remove,
+	/* add PM stuff here one day */
+};
+
+static int __init hifn_init (void)
+{
+	struct hifn_softc *sc = NULL;
+	int rc;
+
+	DPRINTF("%s(%p)\n", __FUNCTION__, hifn_init);
+
+	rc = pci_register_driver(&hifn_driver);
+	pci_register_driver_compat(&hifn_driver, rc);
+
+	return rc;
+}
+
+static void __exit hifn_exit (void)
+{
+	pci_unregister_driver(&hifn_driver);
+}
+
+module_init(hifn_init);
+module_exit(hifn_exit);
+
+MODULE_LICENSE("BSD");
+MODULE_AUTHOR("David McCullough <david_mccullough@securecomputing.com>");
+MODULE_DESCRIPTION("OCF driver for hifn PCI crypto devices");
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/hifn/hifn7751reg.h
+++ linux-mvl-dove-2.6.32/crypto/ocf/hifn/hifn7751reg.h
@@ -0,0 +1,540 @@
+/* $FreeBSD: src/sys/dev/hifn/hifn7751reg.h,v 1.7 2007/03/21 03:42:49 sam Exp $ */
+/*	$OpenBSD: hifn7751reg.h,v 1.35 2002/04/08 17:49:42 jason Exp $	*/
+
+/*-
+ * Invertex AEON / Hifn 7751 driver
+ * Copyright (c) 1999 Invertex Inc. All rights reserved.
+ * Copyright (c) 1999 Theo de Raadt
+ * Copyright (c) 2000-2001 Network Security Technologies, Inc.
+ *			http://www.netsec.net
+ *
+ * Please send any comments, feedback, bug-fixes, or feature requests to
+ * software@invertex.com.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Effort sponsored in part by the Defense Advanced Research Projects
+ * Agency (DARPA) and Air Force Research Laboratory, Air Force
+ * Materiel Command, USAF, under agreement number F30602-01-2-0537.
+ *
+ */
+#ifndef __HIFN_H__
+#define	__HIFN_H__
+
+/*
+ * Some PCI configuration space offset defines.  The names were made
+ * identical to the names used by the Linux kernel.
+ */
+#define	HIFN_BAR0		PCIR_BAR(0)	/* PUC register map */
+#define	HIFN_BAR1		PCIR_BAR(1)	/* DMA register map */
+#define	HIFN_TRDY_TIMEOUT	0x40
+#define	HIFN_RETRY_TIMEOUT	0x41
+
+/*
+ * PCI vendor and device identifiers
+ * (the names are preserved from their OpenBSD source).
+ */
+#define	PCI_VENDOR_HIFN		0x13a3		/* Hifn */
+#define	PCI_PRODUCT_HIFN_7751	0x0005		/* 7751 */
+#define	PCI_PRODUCT_HIFN_6500	0x0006		/* 6500 */
+#define	PCI_PRODUCT_HIFN_7811	0x0007		/* 7811 */
+#define	PCI_PRODUCT_HIFN_7855	0x001f		/* 7855 */
+#define	PCI_PRODUCT_HIFN_7951	0x0012		/* 7951 */
+#define	PCI_PRODUCT_HIFN_7955	0x0020		/* 7954/7955 */
+#define	PCI_PRODUCT_HIFN_7956	0x001d		/* 7956 */
+
+#define	PCI_VENDOR_INVERTEX	0x14e1		/* Invertex */
+#define	PCI_PRODUCT_INVERTEX_AEON 0x0005	/* AEON */
+
+#define	PCI_VENDOR_NETSEC	0x1660		/* NetSec */
+#define	PCI_PRODUCT_NETSEC_7751	0x7751		/* 7751 */
+
+/*
+ * The values below should multiple of 4 -- and be large enough to handle
+ * any command the driver implements.
+ *
+ * MAX_COMMAND = base command + mac command + encrypt command +
+ *			mac-key + rc4-key
+ * MAX_RESULT  = base result + mac result + mac + encrypt result
+ *			
+ *
+ */
+#define	HIFN_MAX_COMMAND	(8 + 8 + 8 + 64 + 260)
+#define	HIFN_MAX_RESULT		(8 + 4 + 20 + 4)
+
+/*
+ * hifn_desc_t
+ *
+ * Holds an individual descriptor for any of the rings.
+ */
+typedef struct hifn_desc {
+	volatile u_int32_t l;		/* length and status bits */
+	volatile u_int32_t p;
+} hifn_desc_t;
+
+/*
+ * Masks for the "length" field of struct hifn_desc.
+ */
+#define	HIFN_D_LENGTH		0x0000ffff	/* length bit mask */
+#define	HIFN_D_MASKDONEIRQ	0x02000000	/* mask the done interrupt */
+#define	HIFN_D_DESTOVER		0x04000000	/* destination overflow */
+#define	HIFN_D_OVER		0x08000000	/* overflow */
+#define	HIFN_D_LAST		0x20000000	/* last descriptor in chain */
+#define	HIFN_D_JUMP		0x40000000	/* jump descriptor */
+#define	HIFN_D_VALID		0x80000000	/* valid bit */
+
+
+/*
+ * Processing Unit Registers (offset from BASEREG0)
+ */
+#define	HIFN_0_PUDATA		0x00	/* Processing Unit Data */
+#define	HIFN_0_PUCTRL		0x04	/* Processing Unit Control */
+#define	HIFN_0_PUISR		0x08	/* Processing Unit Interrupt Status */
+#define	HIFN_0_PUCNFG		0x0c	/* Processing Unit Configuration */
+#define	HIFN_0_PUIER		0x10	/* Processing Unit Interrupt Enable */
+#define	HIFN_0_PUSTAT		0x14	/* Processing Unit Status/Chip ID */
+#define	HIFN_0_FIFOSTAT		0x18	/* FIFO Status */
+#define	HIFN_0_FIFOCNFG		0x1c	/* FIFO Configuration */
+#define	HIFN_0_PUCTRL2		0x28	/* Processing Unit Control (2nd map) */
+#define	HIFN_0_MUTE1		0x80
+#define	HIFN_0_MUTE2		0x90
+#define	HIFN_0_SPACESIZE	0x100	/* Register space size */
+
+/* Processing Unit Control Register (HIFN_0_PUCTRL) */
+#define	HIFN_PUCTRL_CLRSRCFIFO	0x0010	/* clear source fifo */
+#define	HIFN_PUCTRL_STOP	0x0008	/* stop pu */
+#define	HIFN_PUCTRL_LOCKRAM	0x0004	/* lock ram */
+#define	HIFN_PUCTRL_DMAENA	0x0002	/* enable dma */
+#define	HIFN_PUCTRL_RESET	0x0001	/* Reset processing unit */
+
+/* Processing Unit Interrupt Status Register (HIFN_0_PUISR) */
+#define	HIFN_PUISR_CMDINVAL	0x8000	/* Invalid command interrupt */
+#define	HIFN_PUISR_DATAERR	0x4000	/* Data error interrupt */
+#define	HIFN_PUISR_SRCFIFO	0x2000	/* Source FIFO ready interrupt */
+#define	HIFN_PUISR_DSTFIFO	0x1000	/* Destination FIFO ready interrupt */
+#define	HIFN_PUISR_DSTOVER	0x0200	/* Destination overrun interrupt */
+#define	HIFN_PUISR_SRCCMD	0x0080	/* Source command interrupt */
+#define	HIFN_PUISR_SRCCTX	0x0040	/* Source context interrupt */
+#define	HIFN_PUISR_SRCDATA	0x0020	/* Source data interrupt */
+#define	HIFN_PUISR_DSTDATA	0x0010	/* Destination data interrupt */
+#define	HIFN_PUISR_DSTRESULT	0x0004	/* Destination result interrupt */
+
+/* Processing Unit Configuration Register (HIFN_0_PUCNFG) */
+#define	HIFN_PUCNFG_DRAMMASK	0xe000	/* DRAM size mask */
+#define	HIFN_PUCNFG_DSZ_256K	0x0000	/* 256k dram */
+#define	HIFN_PUCNFG_DSZ_512K	0x2000	/* 512k dram */
+#define	HIFN_PUCNFG_DSZ_1M	0x4000	/* 1m dram */
+#define	HIFN_PUCNFG_DSZ_2M	0x6000	/* 2m dram */
+#define	HIFN_PUCNFG_DSZ_4M	0x8000	/* 4m dram */
+#define	HIFN_PUCNFG_DSZ_8M	0xa000	/* 8m dram */
+#define	HIFN_PUNCFG_DSZ_16M	0xc000	/* 16m dram */
+#define	HIFN_PUCNFG_DSZ_32M	0xe000	/* 32m dram */
+#define	HIFN_PUCNFG_DRAMREFRESH	0x1800	/* DRAM refresh rate mask */
+#define	HIFN_PUCNFG_DRFR_512	0x0000	/* 512 divisor of ECLK */
+#define	HIFN_PUCNFG_DRFR_256	0x0800	/* 256 divisor of ECLK */
+#define	HIFN_PUCNFG_DRFR_128	0x1000	/* 128 divisor of ECLK */
+#define	HIFN_PUCNFG_TCALLPHASES	0x0200	/* your guess is as good as mine... */
+#define	HIFN_PUCNFG_TCDRVTOTEM	0x0100	/* your guess is as good as mine... */
+#define	HIFN_PUCNFG_BIGENDIAN	0x0080	/* DMA big endian mode */
+#define	HIFN_PUCNFG_BUS32	0x0040	/* Bus width 32bits */
+#define	HIFN_PUCNFG_BUS16	0x0000	/* Bus width 16 bits */
+#define	HIFN_PUCNFG_CHIPID	0x0020	/* Allow chipid from PUSTAT */
+#define	HIFN_PUCNFG_DRAM	0x0010	/* Context RAM is DRAM */
+#define	HIFN_PUCNFG_SRAM	0x0000	/* Context RAM is SRAM */
+#define	HIFN_PUCNFG_COMPSING	0x0004	/* Enable single compression context */
+#define	HIFN_PUCNFG_ENCCNFG	0x0002	/* Encryption configuration */
+
+/* Processing Unit Interrupt Enable Register (HIFN_0_PUIER) */
+#define	HIFN_PUIER_CMDINVAL	0x8000	/* Invalid command interrupt */
+#define	HIFN_PUIER_DATAERR	0x4000	/* Data error interrupt */
+#define	HIFN_PUIER_SRCFIFO	0x2000	/* Source FIFO ready interrupt */
+#define	HIFN_PUIER_DSTFIFO	0x1000	/* Destination FIFO ready interrupt */
+#define	HIFN_PUIER_DSTOVER	0x0200	/* Destination overrun interrupt */
+#define	HIFN_PUIER_SRCCMD	0x0080	/* Source command interrupt */
+#define	HIFN_PUIER_SRCCTX	0x0040	/* Source context interrupt */
+#define	HIFN_PUIER_SRCDATA	0x0020	/* Source data interrupt */
+#define	HIFN_PUIER_DSTDATA	0x0010	/* Destination data interrupt */
+#define	HIFN_PUIER_DSTRESULT	0x0004	/* Destination result interrupt */
+
+/* Processing Unit Status Register/Chip ID (HIFN_0_PUSTAT) */
+#define	HIFN_PUSTAT_CMDINVAL	0x8000	/* Invalid command interrupt */
+#define	HIFN_PUSTAT_DATAERR	0x4000	/* Data error interrupt */
+#define	HIFN_PUSTAT_SRCFIFO	0x2000	/* Source FIFO ready interrupt */
+#define	HIFN_PUSTAT_DSTFIFO	0x1000	/* Destination FIFO ready interrupt */
+#define	HIFN_PUSTAT_DSTOVER	0x0200	/* Destination overrun interrupt */
+#define	HIFN_PUSTAT_SRCCMD	0x0080	/* Source command interrupt */
+#define	HIFN_PUSTAT_SRCCTX	0x0040	/* Source context interrupt */
+#define	HIFN_PUSTAT_SRCDATA	0x0020	/* Source data interrupt */
+#define	HIFN_PUSTAT_DSTDATA	0x0010	/* Destination data interrupt */
+#define	HIFN_PUSTAT_DSTRESULT	0x0004	/* Destination result interrupt */
+#define	HIFN_PUSTAT_CHIPREV	0x00ff	/* Chip revision mask */
+#define	HIFN_PUSTAT_CHIPENA	0xff00	/* Chip enabled mask */
+#define	HIFN_PUSTAT_ENA_2	0x1100	/* Level 2 enabled */
+#define	HIFN_PUSTAT_ENA_1	0x1000	/* Level 1 enabled */
+#define	HIFN_PUSTAT_ENA_0	0x3000	/* Level 0 enabled */
+#define	HIFN_PUSTAT_REV_2	0x0020	/* 7751 PT6/2 */
+#define	HIFN_PUSTAT_REV_3	0x0030	/* 7751 PT6/3 */
+
+/* FIFO Status Register (HIFN_0_FIFOSTAT) */
+#define	HIFN_FIFOSTAT_SRC	0x7f00	/* Source FIFO available */
+#define	HIFN_FIFOSTAT_DST	0x007f	/* Destination FIFO available */
+
+/* FIFO Configuration Register (HIFN_0_FIFOCNFG) */
+#define	HIFN_FIFOCNFG_THRESHOLD	0x0400	/* must be written as this value */
+
+/*
+ * DMA Interface Registers (offset from BASEREG1)
+ */
+#define	HIFN_1_DMA_CRAR		0x0c	/* DMA Command Ring Address */
+#define	HIFN_1_DMA_SRAR		0x1c	/* DMA Source Ring Address */
+#define	HIFN_1_DMA_RRAR		0x2c	/* DMA Result Ring Address */
+#define	HIFN_1_DMA_DRAR		0x3c	/* DMA Destination Ring Address */
+#define	HIFN_1_DMA_CSR		0x40	/* DMA Status and Control */
+#define	HIFN_1_DMA_IER		0x44	/* DMA Interrupt Enable */
+#define	HIFN_1_DMA_CNFG		0x48	/* DMA Configuration */
+#define	HIFN_1_PLL		0x4c	/* 7955/7956: PLL config */
+#define	HIFN_1_7811_RNGENA	0x60	/* 7811: rng enable */
+#define	HIFN_1_7811_RNGCFG	0x64	/* 7811: rng config */
+#define	HIFN_1_7811_RNGDAT	0x68	/* 7811: rng data */
+#define	HIFN_1_7811_RNGSTS	0x6c	/* 7811: rng status */
+#define	HIFN_1_DMA_CNFG2	0x6c	/* 7955/7956: dma config #2 */
+#define	HIFN_1_7811_MIPSRST	0x94	/* 7811: MIPS reset */
+#define	HIFN_1_REVID		0x98	/* Revision ID */
+
+#define	HIFN_1_PUB_RESET	0x204	/* Public/RNG Reset */
+#define	HIFN_1_PUB_BASE		0x300	/* Public Base Address */
+#define	HIFN_1_PUB_OPLEN	0x304	/* 7951-compat Public Operand Length */
+#define	HIFN_1_PUB_OP		0x308	/* 7951-compat Public Operand */
+#define	HIFN_1_PUB_STATUS	0x30c	/* 7951-compat Public Status */
+#define	HIFN_1_PUB_IEN		0x310	/* Public Interrupt enable */
+#define	HIFN_1_RNG_CONFIG	0x314	/* RNG config */
+#define	HIFN_1_RNG_DATA		0x318	/* RNG data */
+#define	HIFN_1_PUB_MODE		0x320	/* PK mode */
+#define	HIFN_1_PUB_FIFO_OPLEN	0x380	/* first element of oplen fifo */
+#define	HIFN_1_PUB_FIFO_OP	0x384	/* first element of op fifo */
+#define	HIFN_1_PUB_MEM		0x400	/* start of Public key memory */
+#define	HIFN_1_PUB_MEMEND	0xbff	/* end of Public key memory */
+
+/* DMA Status and Control Register (HIFN_1_DMA_CSR) */
+#define	HIFN_DMACSR_D_CTRLMASK	0xc0000000	/* Destinition Ring Control */
+#define	HIFN_DMACSR_D_CTRL_NOP	0x00000000	/* Dest. Control: no-op */
+#define	HIFN_DMACSR_D_CTRL_DIS	0x40000000	/* Dest. Control: disable */
+#define	HIFN_DMACSR_D_CTRL_ENA	0x80000000	/* Dest. Control: enable */
+#define	HIFN_DMACSR_D_ABORT	0x20000000	/* Destinition Ring PCIAbort */
+#define	HIFN_DMACSR_D_DONE	0x10000000	/* Destinition Ring Done */
+#define	HIFN_DMACSR_D_LAST	0x08000000	/* Destinition Ring Last */
+#define	HIFN_DMACSR_D_WAIT	0x04000000	/* Destinition Ring Waiting */
+#define	HIFN_DMACSR_D_OVER	0x02000000	/* Destinition Ring Overflow */
+#define	HIFN_DMACSR_R_CTRL	0x00c00000	/* Result Ring Control */
+#define	HIFN_DMACSR_R_CTRL_NOP	0x00000000	/* Result Control: no-op */
+#define	HIFN_DMACSR_R_CTRL_DIS	0x00400000	/* Result Control: disable */
+#define	HIFN_DMACSR_R_CTRL_ENA	0x00800000	/* Result Control: enable */
+#define	HIFN_DMACSR_R_ABORT	0x00200000	/* Result Ring PCI Abort */
+#define	HIFN_DMACSR_R_DONE	0x00100000	/* Result Ring Done */
+#define	HIFN_DMACSR_R_LAST	0x00080000	/* Result Ring Last */
+#define	HIFN_DMACSR_R_WAIT	0x00040000	/* Result Ring Waiting */
+#define	HIFN_DMACSR_R_OVER	0x00020000	/* Result Ring Overflow */
+#define	HIFN_DMACSR_S_CTRL	0x0000c000	/* Source Ring Control */
+#define	HIFN_DMACSR_S_CTRL_NOP	0x00000000	/* Source Control: no-op */
+#define	HIFN_DMACSR_S_CTRL_DIS	0x00004000	/* Source Control: disable */
+#define	HIFN_DMACSR_S_CTRL_ENA	0x00008000	/* Source Control: enable */
+#define	HIFN_DMACSR_S_ABORT	0x00002000	/* Source Ring PCI Abort */
+#define	HIFN_DMACSR_S_DONE	0x00001000	/* Source Ring Done */
+#define	HIFN_DMACSR_S_LAST	0x00000800	/* Source Ring Last */
+#define	HIFN_DMACSR_S_WAIT	0x00000400	/* Source Ring Waiting */
+#define	HIFN_DMACSR_ILLW	0x00000200	/* Illegal write (7811 only) */
+#define	HIFN_DMACSR_ILLR	0x00000100	/* Illegal read (7811 only) */
+#define	HIFN_DMACSR_C_CTRL	0x000000c0	/* Command Ring Control */
+#define	HIFN_DMACSR_C_CTRL_NOP	0x00000000	/* Command Control: no-op */
+#define	HIFN_DMACSR_C_CTRL_DIS	0x00000040	/* Command Control: disable */
+#define	HIFN_DMACSR_C_CTRL_ENA	0x00000080	/* Command Control: enable */
+#define	HIFN_DMACSR_C_ABORT	0x00000020	/* Command Ring PCI Abort */
+#define	HIFN_DMACSR_C_DONE	0x00000010	/* Command Ring Done */
+#define	HIFN_DMACSR_C_LAST	0x00000008	/* Command Ring Last */
+#define	HIFN_DMACSR_C_WAIT	0x00000004	/* Command Ring Waiting */
+#define	HIFN_DMACSR_PUBDONE	0x00000002	/* Public op done (7951 only) */
+#define	HIFN_DMACSR_ENGINE	0x00000001	/* Command Ring Engine IRQ */
+
+/* DMA Interrupt Enable Register (HIFN_1_DMA_IER) */
+#define	HIFN_DMAIER_D_ABORT	0x20000000	/* Destination Ring PCIAbort */
+#define	HIFN_DMAIER_D_DONE	0x10000000	/* Destination Ring Done */
+#define	HIFN_DMAIER_D_LAST	0x08000000	/* Destination Ring Last */
+#define	HIFN_DMAIER_D_WAIT	0x04000000	/* Destination Ring Waiting */
+#define	HIFN_DMAIER_D_OVER	0x02000000	/* Destination Ring Overflow */
+#define	HIFN_DMAIER_R_ABORT	0x00200000	/* Result Ring PCI Abort */
+#define	HIFN_DMAIER_R_DONE	0x00100000	/* Result Ring Done */
+#define	HIFN_DMAIER_R_LAST	0x00080000	/* Result Ring Last */
+#define	HIFN_DMAIER_R_WAIT	0x00040000	/* Result Ring Waiting */
+#define	HIFN_DMAIER_R_OVER	0x00020000	/* Result Ring Overflow */
+#define	HIFN_DMAIER_S_ABORT	0x00002000	/* Source Ring PCI Abort */
+#define	HIFN_DMAIER_S_DONE	0x00001000	/* Source Ring Done */
+#define	HIFN_DMAIER_S_LAST	0x00000800	/* Source Ring Last */
+#define	HIFN_DMAIER_S_WAIT	0x00000400	/* Source Ring Waiting */
+#define	HIFN_DMAIER_ILLW	0x00000200	/* Illegal write (7811 only) */
+#define	HIFN_DMAIER_ILLR	0x00000100	/* Illegal read (7811 only) */
+#define	HIFN_DMAIER_C_ABORT	0x00000020	/* Command Ring PCI Abort */
+#define	HIFN_DMAIER_C_DONE	0x00000010	/* Command Ring Done */
+#define	HIFN_DMAIER_C_LAST	0x00000008	/* Command Ring Last */
+#define	HIFN_DMAIER_C_WAIT	0x00000004	/* Command Ring Waiting */
+#define	HIFN_DMAIER_PUBDONE	0x00000002	/* public op done (7951 only) */
+#define	HIFN_DMAIER_ENGINE	0x00000001	/* Engine IRQ */
+
+/* DMA Configuration Register (HIFN_1_DMA_CNFG) */
+#define	HIFN_DMACNFG_BIGENDIAN	0x10000000	/* big endian mode */
+#define	HIFN_DMACNFG_POLLFREQ	0x00ff0000	/* Poll frequency mask */
+#define	HIFN_DMACNFG_UNLOCK	0x00000800
+#define	HIFN_DMACNFG_POLLINVAL	0x00000700	/* Invalid Poll Scalar */
+#define	HIFN_DMACNFG_LAST	0x00000010	/* Host control LAST bit */
+#define	HIFN_DMACNFG_MODE	0x00000004	/* DMA mode */
+#define	HIFN_DMACNFG_DMARESET	0x00000002	/* DMA Reset # */
+#define	HIFN_DMACNFG_MSTRESET	0x00000001	/* Master Reset # */
+
+/* DMA Configuration Register (HIFN_1_DMA_CNFG2) */
+#define	HIFN_DMACNFG2_PKSWAP32	(1 << 19)	/* swap the OPLEN/OP reg */
+#define	HIFN_DMACNFG2_PKSWAP8	(1 << 18)	/* swap the bits of OPLEN/OP */
+#define	HIFN_DMACNFG2_BAR0_SWAP32 (1<<17)	/* swap the bytes of BAR0 */
+#define	HIFN_DMACNFG2_BAR1_SWAP8 (1<<16)	/* swap the bits  of BAR0 */
+#define	HIFN_DMACNFG2_INIT_WRITE_BURST_SHIFT 12
+#define	HIFN_DMACNFG2_INIT_READ_BURST_SHIFT 8
+#define	HIFN_DMACNFG2_TGT_WRITE_BURST_SHIFT 4
+#define	HIFN_DMACNFG2_TGT_READ_BURST_SHIFT  0
+
+/* 7811 RNG Enable Register (HIFN_1_7811_RNGENA) */
+#define	HIFN_7811_RNGENA_ENA	0x00000001	/* enable RNG */
+
+/* 7811 RNG Config Register (HIFN_1_7811_RNGCFG) */
+#define	HIFN_7811_RNGCFG_PRE1	0x00000f00	/* first prescalar */
+#define	HIFN_7811_RNGCFG_OPRE	0x00000080	/* output prescalar */
+#define	HIFN_7811_RNGCFG_DEFL	0x00000f80	/* 2 words/ 1/100 sec */
+
+/* 7811 RNG Status Register (HIFN_1_7811_RNGSTS) */
+#define	HIFN_7811_RNGSTS_RDY	0x00004000	/* two numbers in FIFO */
+#define	HIFN_7811_RNGSTS_UFL	0x00001000	/* rng underflow */
+
+/* 7811 MIPS Reset Register (HIFN_1_7811_MIPSRST) */
+#define	HIFN_MIPSRST_BAR2SIZE	0xffff0000	/* sdram size */
+#define	HIFN_MIPSRST_GPRAMINIT	0x00008000	/* gpram can be accessed */
+#define	HIFN_MIPSRST_CRAMINIT	0x00004000	/* ctxram can be accessed */
+#define	HIFN_MIPSRST_LED2	0x00000400	/* external LED2 */
+#define	HIFN_MIPSRST_LED1	0x00000200	/* external LED1 */
+#define	HIFN_MIPSRST_LED0	0x00000100	/* external LED0 */
+#define	HIFN_MIPSRST_MIPSDIS	0x00000004	/* disable MIPS */
+#define	HIFN_MIPSRST_MIPSRST	0x00000002	/* warm reset MIPS */
+#define	HIFN_MIPSRST_MIPSCOLD	0x00000001	/* cold reset MIPS */
+
+/* Public key reset register (HIFN_1_PUB_RESET) */
+#define	HIFN_PUBRST_RESET	0x00000001	/* reset public/rng unit */
+
+/* Public operation register (HIFN_1_PUB_OP) */
+#define	HIFN_PUBOP_AOFFSET	0x0000003e	/* A offset */
+#define	HIFN_PUBOP_BOFFSET	0x00000fc0	/* B offset */
+#define	HIFN_PUBOP_MOFFSET	0x0003f000	/* M offset */
+#define	HIFN_PUBOP_OP_MASK	0x003c0000	/* Opcode: */
+#define	HIFN_PUBOP_OP_NOP	0x00000000	/*  NOP */
+#define	HIFN_PUBOP_OP_ADD	0x00040000	/*  ADD */
+#define	HIFN_PUBOP_OP_ADDC	0x00080000	/*  ADD w/carry */
+#define	HIFN_PUBOP_OP_SUB	0x000c0000	/*  SUB */
+#define	HIFN_PUBOP_OP_SUBC	0x00100000	/*  SUB w/carry */
+#define	HIFN_PUBOP_OP_MODADD	0x00140000	/*  Modular ADD */
+#define	HIFN_PUBOP_OP_MODSUB	0x00180000	/*  Modular SUB */
+#define	HIFN_PUBOP_OP_INCA	0x001c0000	/*  INC A */
+#define	HIFN_PUBOP_OP_DECA	0x00200000	/*  DEC A */
+#define	HIFN_PUBOP_OP_MULT	0x00240000	/*  MULT */
+#define	HIFN_PUBOP_OP_MODMULT	0x00280000	/*  Modular MULT */
+#define	HIFN_PUBOP_OP_MODRED	0x002c0000	/*  Modular Red */
+#define	HIFN_PUBOP_OP_MODEXP	0x00300000	/*  Modular Exp */
+
+/* Public operand length register (HIFN_1_PUB_OPLEN) */
+#define	HIFN_PUBOPLEN_MODLEN	0x0000007f
+#define	HIFN_PUBOPLEN_EXPLEN	0x0003ff80
+#define	HIFN_PUBOPLEN_REDLEN	0x003c0000
+
+/* Public status register (HIFN_1_PUB_STATUS) */
+#define	HIFN_PUBSTS_DONE	0x00000001	/* operation done */
+#define	HIFN_PUBSTS_CARRY	0x00000002	/* carry */
+#define	HIFN_PUBSTS_FIFO_EMPTY	0x00000100	/* fifo empty */
+#define	HIFN_PUBSTS_FIFO_FULL	0x00000200	/* fifo full */
+#define	HIFN_PUBSTS_FIFO_OVFL	0x00000400	/* fifo overflow */
+#define	HIFN_PUBSTS_FIFO_WRITE	0x000f0000	/* fifo write */
+#define	HIFN_PUBSTS_FIFO_READ	0x0f000000	/* fifo read */
+
+/* Public interrupt enable register (HIFN_1_PUB_IEN) */
+#define	HIFN_PUBIEN_DONE	0x00000001	/* operation done interrupt */
+
+/* Random number generator config register (HIFN_1_RNG_CONFIG) */
+#define	HIFN_RNGCFG_ENA		0x00000001	/* enable rng */
+
+/*
+ * Register offsets in register set 1
+ */
+
+#define	HIFN_UNLOCK_SECRET1	0xf4
+#define	HIFN_UNLOCK_SECRET2	0xfc
+
+/*
+ * PLL config register
+ *
+ * This register is present only on 7954/7955/7956 parts. It must be
+ * programmed according to the bus interface method used by the h/w.
+ * Note that the parts require a stable clock.  Since the PCI clock
+ * may vary the reference clock must usually be used.  To avoid
+ * overclocking the core logic, setup must be done carefully, refer
+ * to the driver for details.  The exact multiplier required varies
+ * by part and system configuration; refer to the Hifn documentation.
+ */
+#define	HIFN_PLL_REF_SEL	0x00000001	/* REF/HBI clk selection */
+#define	HIFN_PLL_BP		0x00000002	/* bypass (used during setup) */
+/* bit 2 reserved */
+#define	HIFN_PLL_PK_CLK_SEL	0x00000008	/* public key clk select */
+#define	HIFN_PLL_PE_CLK_SEL	0x00000010	/* packet engine clk select */
+/* bits 5-9 reserved */
+#define	HIFN_PLL_MBSET		0x00000400	/* must be set to 1 */
+#define	HIFN_PLL_ND		0x00003800	/* Fpll_ref multiplier select */
+#define	HIFN_PLL_ND_SHIFT	11
+#define	HIFN_PLL_ND_2		0x00000000	/* 2x */
+#define	HIFN_PLL_ND_4		0x00000800	/* 4x */
+#define	HIFN_PLL_ND_6		0x00001000	/* 6x */
+#define	HIFN_PLL_ND_8		0x00001800	/* 8x */
+#define	HIFN_PLL_ND_10		0x00002000	/* 10x */
+#define	HIFN_PLL_ND_12		0x00002800	/* 12x */
+/* bits 14-15 reserved */
+#define	HIFN_PLL_IS		0x00010000	/* charge pump current select */
+/* bits 17-31 reserved */
+
+/*
+ * Board configuration specifies only these bits.
+ */
+#define	HIFN_PLL_CONFIG		(HIFN_PLL_IS|HIFN_PLL_ND|HIFN_PLL_REF_SEL)
+
+/*
+ * Public Key Engine Mode Register
+ */
+#define	HIFN_PKMODE_HOSTINVERT	(1 << 0)	/* HOST INVERT */
+#define	HIFN_PKMODE_ENHANCED	(1 << 1)	/* Enable enhanced mode */
+
+
+/*********************************************************************
+ * Structs for board commands 
+ *
+ *********************************************************************/
+
+/*
+ * Structure to help build up the command data structure.
+ */
+typedef struct hifn_base_command {
+	volatile u_int16_t masks;
+	volatile u_int16_t session_num;
+	volatile u_int16_t total_source_count;
+	volatile u_int16_t total_dest_count;
+} hifn_base_command_t;
+
+#define	HIFN_BASE_CMD_MAC		0x0400
+#define	HIFN_BASE_CMD_CRYPT		0x0800
+#define	HIFN_BASE_CMD_DECODE		0x2000
+#define	HIFN_BASE_CMD_SRCLEN_M		0xc000
+#define	HIFN_BASE_CMD_SRCLEN_S		14
+#define	HIFN_BASE_CMD_DSTLEN_M		0x3000
+#define	HIFN_BASE_CMD_DSTLEN_S		12
+#define	HIFN_BASE_CMD_LENMASK_HI	0x30000
+#define	HIFN_BASE_CMD_LENMASK_LO	0x0ffff
+
+/*
+ * Structure to help build up the command data structure.
+ */
+typedef struct hifn_crypt_command {
+	volatile u_int16_t masks;
+	volatile u_int16_t header_skip;
+	volatile u_int16_t source_count;
+	volatile u_int16_t reserved;
+} hifn_crypt_command_t;
+
+#define	HIFN_CRYPT_CMD_ALG_MASK		0x0003		/* algorithm: */
+#define	HIFN_CRYPT_CMD_ALG_DES		0x0000		/*   DES */
+#define	HIFN_CRYPT_CMD_ALG_3DES		0x0001		/*   3DES */
+#define	HIFN_CRYPT_CMD_ALG_RC4		0x0002		/*   RC4 */
+#define	HIFN_CRYPT_CMD_ALG_AES		0x0003		/*   AES */
+#define	HIFN_CRYPT_CMD_MODE_MASK	0x0018		/* Encrypt mode: */
+#define	HIFN_CRYPT_CMD_MODE_ECB		0x0000		/*   ECB */
+#define	HIFN_CRYPT_CMD_MODE_CBC		0x0008		/*   CBC */
+#define	HIFN_CRYPT_CMD_MODE_CFB		0x0010		/*   CFB */
+#define	HIFN_CRYPT_CMD_MODE_OFB		0x0018		/*   OFB */
+#define	HIFN_CRYPT_CMD_CLR_CTX		0x0040		/* clear context */
+#define	HIFN_CRYPT_CMD_NEW_KEY		0x0800		/* expect new key */
+#define	HIFN_CRYPT_CMD_NEW_IV		0x1000		/* expect new iv */
+
+#define	HIFN_CRYPT_CMD_SRCLEN_M		0xc000
+#define	HIFN_CRYPT_CMD_SRCLEN_S		14
+
+#define	HIFN_CRYPT_CMD_KSZ_MASK		0x0600		/* AES key size: */
+#define	HIFN_CRYPT_CMD_KSZ_128		0x0000		/*   128 bit */
+#define	HIFN_CRYPT_CMD_KSZ_192		0x0200		/*   192 bit */
+#define	HIFN_CRYPT_CMD_KSZ_256		0x0400		/*   256 bit */
+
+/*
+ * Structure to help build up the command data structure.
+ */
+typedef struct hifn_mac_command {
+	volatile u_int16_t masks;
+	volatile u_int16_t header_skip;
+	volatile u_int16_t source_count;
+	volatile u_int16_t reserved;
+} hifn_mac_command_t;
+
+#define	HIFN_MAC_CMD_ALG_MASK		0x0001
+#define	HIFN_MAC_CMD_ALG_SHA1		0x0000
+#define	HIFN_MAC_CMD_ALG_MD5		0x0001
+#define	HIFN_MAC_CMD_MODE_MASK		0x000c
+#define	HIFN_MAC_CMD_MODE_HMAC		0x0000
+#define	HIFN_MAC_CMD_MODE_SSL_MAC	0x0004
+#define	HIFN_MAC_CMD_MODE_HASH		0x0008
+#define	HIFN_MAC_CMD_MODE_FULL		0x0004
+#define	HIFN_MAC_CMD_TRUNC		0x0010
+#define	HIFN_MAC_CMD_RESULT		0x0020
+#define	HIFN_MAC_CMD_APPEND		0x0040
+#define	HIFN_MAC_CMD_SRCLEN_M		0xc000
+#define	HIFN_MAC_CMD_SRCLEN_S		14
+
+/*
+ * MAC POS IPsec initiates authentication after encryption on encodes
+ * and before decryption on decodes.
+ */
+#define	HIFN_MAC_CMD_POS_IPSEC		0x0200
+#define	HIFN_MAC_CMD_NEW_KEY		0x0800
+
+/*
+ * The poll frequency and poll scalar defines are unshifted values used
+ * to set fields in the DMA Configuration Register.
+ */
+#ifndef HIFN_POLL_FREQUENCY
+#define	HIFN_POLL_FREQUENCY	0x1
+#endif
+
+#ifndef HIFN_POLL_SCALAR
+#define	HIFN_POLL_SCALAR	0x0
+#endif
+
+#define	HIFN_MAX_SEGLEN 	0xffff		/* maximum dma segment len */
+#define	HIFN_MAX_DMALEN		0x3ffff		/* maximum dma length */
+#endif /* __HIFN_H__ */
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/hifn/hifn7751var.h
+++ linux-mvl-dove-2.6.32/crypto/ocf/hifn/hifn7751var.h
@@ -0,0 +1,369 @@
+/* $FreeBSD: src/sys/dev/hifn/hifn7751var.h,v 1.9 2007/03/21 03:42:49 sam Exp $ */
+/*	$OpenBSD: hifn7751var.h,v 1.42 2002/04/08 17:49:42 jason Exp $	*/
+
+/*-
+ * Invertex AEON / Hifn 7751 driver
+ * Copyright (c) 1999 Invertex Inc. All rights reserved.
+ * Copyright (c) 1999 Theo de Raadt
+ * Copyright (c) 2000-2001 Network Security Technologies, Inc.
+ *			http://www.netsec.net
+ *
+ * Please send any comments, feedback, bug-fixes, or feature requests to
+ * software@invertex.com.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Effort sponsored in part by the Defense Advanced Research Projects
+ * Agency (DARPA) and Air Force Research Laboratory, Air Force
+ * Materiel Command, USAF, under agreement number F30602-01-2-0537.
+ *
+ */
+
+#ifndef __HIFN7751VAR_H__
+#define __HIFN7751VAR_H__
+
+#ifdef __KERNEL__
+
+/*
+ * Some configurable values for the driver.  By default command+result
+ * descriptor rings are the same size.  The src+dst descriptor rings
+ * are sized at 3.5x the number of potential commands.  Slower parts
+ * (e.g. 7951) tend to run out of src descriptors; faster parts (7811)
+ * src+cmd/result descriptors.  It's not clear that increasing the size
+ * of the descriptor rings helps performance significantly as other
+ * factors tend to come into play (e.g. copying misaligned packets).
+ */
+#define	HIFN_D_CMD_RSIZE	24	/* command descriptors */
+#define	HIFN_D_SRC_RSIZE	((HIFN_D_CMD_RSIZE * 7) / 2)	/* source descriptors */
+#define	HIFN_D_RES_RSIZE	HIFN_D_CMD_RSIZE	/* result descriptors */
+#define	HIFN_D_DST_RSIZE	HIFN_D_SRC_RSIZE	/* destination descriptors */
+
+/*
+ *  Length values for cryptography
+ */
+#define HIFN_DES_KEY_LENGTH		8
+#define HIFN_3DES_KEY_LENGTH		24
+#define HIFN_MAX_CRYPT_KEY_LENGTH	HIFN_3DES_KEY_LENGTH
+#define HIFN_IV_LENGTH			8
+#define	HIFN_AES_IV_LENGTH		16
+#define HIFN_MAX_IV_LENGTH		HIFN_AES_IV_LENGTH
+
+/*
+ *  Length values for authentication
+ */
+#define HIFN_MAC_KEY_LENGTH		64
+#define HIFN_MD5_LENGTH			16
+#define HIFN_SHA1_LENGTH		20
+#define HIFN_MAC_TRUNC_LENGTH		12
+
+#define MAX_SCATTER 64
+
+/*
+ * Data structure to hold all 4 rings and any other ring related data.
+ */
+struct hifn_dma {
+	/*
+	 *  Descriptor rings.  We add +1 to the size to accomidate the
+	 *  jump descriptor.
+	 */
+	struct hifn_desc	cmdr[HIFN_D_CMD_RSIZE+1];
+	struct hifn_desc	srcr[HIFN_D_SRC_RSIZE+1];
+	struct hifn_desc	dstr[HIFN_D_DST_RSIZE+1];
+	struct hifn_desc	resr[HIFN_D_RES_RSIZE+1];
+
+	struct hifn_command	*hifn_commands[HIFN_D_RES_RSIZE];
+
+	u_char			command_bufs[HIFN_D_CMD_RSIZE][HIFN_MAX_COMMAND];
+	u_char			result_bufs[HIFN_D_CMD_RSIZE][HIFN_MAX_RESULT];
+	u_int32_t		slop[HIFN_D_CMD_RSIZE];
+
+	u_int64_t		test_src, test_dst;
+
+	/*
+	 *  Our current positions for insertion and removal from the desriptor
+	 *  rings. 
+	 */
+	int			cmdi, srci, dsti, resi;
+	volatile int		cmdu, srcu, dstu, resu;
+	int			cmdk, srck, dstk, resk;
+};
+
+struct hifn_session {
+	int hs_used;
+	int hs_mlen;
+	u_int8_t hs_iv[HIFN_MAX_IV_LENGTH];
+};
+
+#define	HIFN_RING_SYNC(sc, r, i, f)					\
+	/* DAVIDM bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_dmamap, (f)) */
+
+#define	HIFN_CMDR_SYNC(sc, i, f)	HIFN_RING_SYNC((sc), cmdr, (i), (f))
+#define	HIFN_RESR_SYNC(sc, i, f)	HIFN_RING_SYNC((sc), resr, (i), (f))
+#define	HIFN_SRCR_SYNC(sc, i, f)	HIFN_RING_SYNC((sc), srcr, (i), (f))
+#define	HIFN_DSTR_SYNC(sc, i, f)	HIFN_RING_SYNC((sc), dstr, (i), (f))
+
+#define	HIFN_CMD_SYNC(sc, i, f)						\
+	/* DAVIDM bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_dmamap, (f)) */
+
+#define	HIFN_RES_SYNC(sc, i, f)						\
+	/* DAVIDM bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_dmamap, (f)) */
+
+typedef int bus_size_t;
+
+/*
+ * Holds data specific to a single HIFN board.
+ */
+struct hifn_softc {
+	softc_device_decl		 sc_dev;
+
+	struct pci_dev		*sc_pcidev;	/* PCI device pointer */
+	spinlock_t		sc_mtx;		/* per-instance lock */
+
+	int			sc_num;		/* for multiple devs */
+
+	ocf_iomem_t		sc_bar0;
+	bus_size_t		sc_bar0_lastreg;/* bar0 last reg written */
+	ocf_iomem_t		sc_bar1;
+	bus_size_t		sc_bar1_lastreg;/* bar1 last reg written */
+
+	int			sc_irq;
+
+	u_int32_t		sc_dmaier;
+	u_int32_t		sc_drammodel;	/* 1=dram, 0=sram */
+	u_int32_t		sc_pllconfig;	/* 7954/7955/7956 PLL config */
+
+	struct hifn_dma		*sc_dma;
+	dma_addr_t		sc_dma_physaddr;/* physical address of sc_dma */
+
+	int			sc_dmansegs;
+	int32_t			sc_cid;
+	int			sc_maxses;
+	int			sc_nsessions;
+	struct hifn_session	*sc_sessions;
+	int			sc_ramsize;
+	int			sc_flags;
+#define	HIFN_HAS_RNG		0x1	/* includes random number generator */
+#define	HIFN_HAS_PUBLIC		0x2	/* includes public key support */
+#define	HIFN_HAS_AES		0x4	/* includes AES support */
+#define	HIFN_IS_7811		0x8	/* Hifn 7811 part */
+#define	HIFN_IS_7956		0x10	/* Hifn 7956/7955 don't have SDRAM */
+
+	struct timer_list	sc_tickto;	/* for managing DMA */
+
+	int			sc_rngfirst;
+	int			sc_rnghz;	/* RNG polling frequency */
+
+	int			sc_c_busy;	/* command ring busy */
+	int			sc_s_busy;	/* source data ring busy */
+	int			sc_d_busy;	/* destination data ring busy */
+	int			sc_r_busy;	/* result ring busy */
+	int			sc_active;	/* for initial countdown */
+	int			sc_needwakeup;	/* ops q'd wating on resources */
+	int			sc_curbatch;	/* # ops submitted w/o int */
+	int			sc_suspended;
+#ifdef HIFN_VULCANDEV
+	struct cdev            *sc_pkdev;
+#endif
+};
+
+#define	HIFN_LOCK(_sc)		spin_lock_irqsave(&(_sc)->sc_mtx, l_flags)
+#define	HIFN_UNLOCK(_sc)	spin_unlock_irqrestore(&(_sc)->sc_mtx, l_flags)
+
+/*
+ *  hifn_command_t
+ *
+ *  This is the control structure used to pass commands to hifn_encrypt().
+ *
+ *  flags
+ *  -----
+ *  Flags is the bitwise "or" values for command configuration.  A single
+ *  encrypt direction needs to be set:
+ *
+ *	HIFN_ENCODE or HIFN_DECODE
+ *
+ *  To use cryptography, a single crypto algorithm must be included:
+ *
+ *	HIFN_CRYPT_3DES or HIFN_CRYPT_DES
+ *
+ *  To use authentication is used, a single MAC algorithm must be included:
+ *
+ *	HIFN_MAC_MD5 or HIFN_MAC_SHA1
+ *
+ *  By default MD5 uses a 16 byte hash and SHA-1 uses a 20 byte hash.
+ *  If the value below is set, hash values are truncated or assumed
+ *  truncated to 12 bytes:
+ *
+ *	HIFN_MAC_TRUNC
+ *
+ *  Keys for encryption and authentication can be sent as part of a command,
+ *  or the last key value used with a particular session can be retrieved
+ *  and used again if either of these flags are not specified.
+ *
+ *	HIFN_CRYPT_NEW_KEY, HIFN_MAC_NEW_KEY
+ *
+ *  session_num
+ *  -----------
+ *  A number between 0 and 2048 (for DRAM models) or a number between 
+ *  0 and 768 (for SRAM models).  Those who don't want to use session
+ *  numbers should leave value at zero and send a new crypt key and/or
+ *  new MAC key on every command.  If you use session numbers and
+ *  don't send a key with a command, the last key sent for that same
+ *  session number will be used.
+ *
+ *  Warning:  Using session numbers and multiboard at the same time
+ *            is currently broken.
+ *
+ *  mbuf
+ *  ----
+ *  Either fill in the mbuf pointer and npa=0 or
+ *	 fill packp[] and packl[] and set npa to > 0
+ * 
+ *  mac_header_skip
+ *  ---------------
+ *  The number of bytes of the source_buf that are skipped over before
+ *  authentication begins.  This must be a number between 0 and 2^16-1
+ *  and can be used by IPsec implementers to skip over IP headers.
+ *  *** Value ignored if authentication not used ***
+ *
+ *  crypt_header_skip
+ *  -----------------
+ *  The number of bytes of the source_buf that are skipped over before
+ *  the cryptographic operation begins.  This must be a number between 0
+ *  and 2^16-1.  For IPsec, this number will always be 8 bytes larger
+ *  than the auth_header_skip (to skip over the ESP header).
+ *  *** Value ignored if cryptography not used ***
+ *
+ */
+struct hifn_operand {
+	union {
+		struct sk_buff *skb;
+		struct uio *io;
+		unsigned char *buf;
+	} u;
+	void		*map;
+	bus_size_t	mapsize;
+	int		nsegs;
+	struct {
+	    dma_addr_t  ds_addr;
+	    int         ds_len;
+	} segs[MAX_SCATTER];
+};
+
+struct hifn_command {
+	u_int16_t session_num;
+	u_int16_t base_masks, cry_masks, mac_masks;
+	u_int8_t iv[HIFN_MAX_IV_LENGTH], *ck, mac[HIFN_MAC_KEY_LENGTH];
+	int cklen;
+	int sloplen, slopidx;
+
+	struct hifn_operand src;
+	struct hifn_operand dst;
+
+	struct hifn_softc *softc;
+	struct cryptop *crp;
+	struct cryptodesc *enccrd, *maccrd;
+};
+
+#define	src_skb		src.u.skb
+#define	src_io		src.u.io
+#define	src_map		src.map
+#define	src_mapsize	src.mapsize
+#define	src_segs	src.segs
+#define	src_nsegs	src.nsegs
+#define	src_buf		src.u.buf
+
+#define	dst_skb		dst.u.skb
+#define	dst_io		dst.u.io
+#define	dst_map		dst.map
+#define	dst_mapsize	dst.mapsize
+#define	dst_segs	dst.segs
+#define	dst_nsegs	dst.nsegs
+#define	dst_buf		dst.u.buf
+
+/*
+ *  Return values for hifn_crypto()
+ */
+#define HIFN_CRYPTO_SUCCESS	0
+#define HIFN_CRYPTO_BAD_INPUT	(-1)
+#define HIFN_CRYPTO_RINGS_FULL	(-2)
+
+/**************************************************************************
+ *
+ *  Function:  hifn_crypto
+ *
+ *  Purpose:   Called by external drivers to begin an encryption on the
+ *             HIFN board.
+ *
+ *  Blocking/Non-blocking Issues
+ *  ============================
+ *  The driver cannot block in hifn_crypto (no calls to tsleep) currently.
+ *  hifn_crypto() returns HIFN_CRYPTO_RINGS_FULL if there is not enough
+ *  room in any of the rings for the request to proceed.
+ *
+ *  Return Values
+ *  =============
+ *  0 for success, negative values on error
+ *
+ *  Defines for negative error codes are:
+ *  
+ *    HIFN_CRYPTO_BAD_INPUT  :  The passed in command had invalid settings.
+ *    HIFN_CRYPTO_RINGS_FULL :  All DMA rings were full and non-blocking
+ *                              behaviour was requested.
+ *
+ *************************************************************************/
+
+/*
+ * Convert back and forth from 'sid' to 'card' and 'session'
+ */
+#define HIFN_CARD(sid)		(((sid) & 0xf0000000) >> 28)
+#define HIFN_SESSION(sid)	((sid) & 0x000007ff)
+#define HIFN_SID(crd,ses)	(((crd) << 28) | ((ses) & 0x7ff))
+
+#endif /* _KERNEL */
+
+struct hifn_stats {
+	u_int64_t hst_ibytes;
+	u_int64_t hst_obytes;
+	u_int32_t hst_ipackets;
+	u_int32_t hst_opackets;
+	u_int32_t hst_invalid;
+	u_int32_t hst_nomem;		/* malloc or one of hst_nomem_* */
+	u_int32_t hst_abort;
+	u_int32_t hst_noirq;		/* IRQ for no reason */
+	u_int32_t hst_totbatch;		/* ops submitted w/o interrupt */
+	u_int32_t hst_maxbatch;		/* max ops submitted together */
+	u_int32_t hst_unaligned;	/* unaligned src caused copy */
+	/*
+	 * The following divides hst_nomem into more specific buckets.
+	 */
+	u_int32_t hst_nomem_map;	/* bus_dmamap_create failed */
+	u_int32_t hst_nomem_load;	/* bus_dmamap_load_* failed */
+	u_int32_t hst_nomem_mbuf;	/* MGET* failed */
+	u_int32_t hst_nomem_mcl;	/* MCLGET* failed */
+	u_int32_t hst_nomem_cr;		/* out of command/result descriptor */
+	u_int32_t hst_nomem_sd;		/* out of src/dst descriptors */
+};
+
+#endif /* __HIFN7751VAR_H__ */
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/hifn/Makefile
+++ linux-mvl-dove-2.6.32/crypto/ocf/hifn/Makefile
@@ -0,0 +1,13 @@
+# for SGlinux builds
+-include $(ROOTDIR)/modules/.config
+
+obj-$(CONFIG_OCF_HIFN)     += hifn7751.o
+obj-$(CONFIG_OCF_HIFNHIPP) += hifnHIPP.o
+
+obj ?= .
+EXTRA_CFLAGS += -I$(obj)/.. -I$(obj)/
+
+ifdef TOPDIR
+-include $(TOPDIR)/Rules.make
+endif
+
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/hifn/hifnHIPPreg.h
+++ linux-mvl-dove-2.6.32/crypto/ocf/hifn/hifnHIPPreg.h
@@ -0,0 +1,46 @@
+/*-
+ * Hifn HIPP-I/HIPP-II (7855/8155) driver.
+ * Copyright (c) 2006 Michael Richardson <mcr@xelerance.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Effort sponsored by Hifn inc.
+ *
+ */
+
+#ifndef __HIFNHIPP_H__
+#define	__HIFNHIPP_H__
+
+/*
+ * PCI vendor and device identifiers
+ */
+#define	PCI_VENDOR_HIFN		0x13a3		/* Hifn */
+#define	PCI_PRODUCT_HIFN_6500	0x0006		/* 6500 */
+#define	PCI_PRODUCT_HIFN_7855	0x001f		/* 7855 */
+#define	PCI_PRODUCT_HIFN_8155	0x999		/* XXX 8155 */
+
+#define HIPP_1_REVID            0x01 /* BOGUS */
+
+#endif /* __HIPP_H__ */
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/hifn/hifnHIPP.c
+++ linux-mvl-dove-2.6.32/crypto/ocf/hifn/hifnHIPP.c
@@ -0,0 +1,420 @@
+/*-
+ * Driver for Hifn HIPP-I/II chipset
+ * Copyright (c) 2006 Michael Richardson <mcr@xelerance.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Effort sponsored by Hifn Inc.
+ *
+ */
+
+/*
+ * Driver for various Hifn encryption processors.
+ */
+#ifndef AUTOCONF_INCLUDED
+#include <linux/config.h>
+#endif
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/list.h>
+#include <linux/slab.h>
+#include <linux/wait.h>
+#include <linux/sched.h>
+#include <linux/pci.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/spinlock.h>
+#include <linux/random.h>
+#include <linux/version.h>
+#include <linux/skbuff.h>
+#include <linux/uio.h>
+#include <linux/sysfs.h>
+#include <linux/miscdevice.h>
+#include <asm/io.h>
+
+#include <cryptodev.h>
+
+#include "hifnHIPPreg.h"
+#include "hifnHIPPvar.h"
+
+#if 1
+#define	DPRINTF(a...)	if (hipp_debug) { \
+							printk("%s: ", sc ? \
+								device_get_nameunit(sc->sc_dev) : "hifn"); \
+							printk(a); \
+						} else
+#else
+#define	DPRINTF(a...)
+#endif
+
+typedef int bus_size_t;
+
+static inline int
+pci_get_revid(struct pci_dev *dev)
+{
+	u8 rid = 0;
+	pci_read_config_byte(dev, PCI_REVISION_ID, &rid);
+	return rid;
+}
+
+#define debug hipp_debug
+int hipp_debug = 0;
+module_param(hipp_debug, int, 0644);
+MODULE_PARM_DESC(hipp_debug, "Enable debug");
+
+int hipp_maxbatch = 1;
+module_param(hipp_maxbatch, int, 0644);
+MODULE_PARM_DESC(hipp_maxbatch, "max ops to batch w/o interrupt");
+
+static	int  hipp_probe(struct pci_dev *dev, const struct pci_device_id *ent);
+static	void hipp_remove(struct pci_dev *dev);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,19)
+static irqreturn_t hipp_intr(int irq, void *arg);
+#else
+static irqreturn_t hipp_intr(int irq, void *arg, struct pt_regs *regs);
+#endif
+
+static int hipp_num_chips = 0;
+static struct hipp_softc *hipp_chip_idx[HIPP_MAX_CHIPS];
+
+static	int hipp_newsession(device_t, u_int32_t *, struct cryptoini *);
+static	int hipp_freesession(device_t, u_int64_t);
+static	int hipp_process(device_t, struct cryptop *, int);
+
+static device_method_t hipp_methods = {
+	/* crypto device methods */
+	DEVMETHOD(cryptodev_newsession,	hipp_newsession),
+	DEVMETHOD(cryptodev_freesession,hipp_freesession),
+	DEVMETHOD(cryptodev_process,	hipp_process),
+};
+
+static __inline u_int32_t
+READ_REG(struct hipp_softc *sc, unsigned int barno, bus_size_t reg)
+{
+	u_int32_t v = readl(sc->sc_bar[barno] + reg);
+	//sc->sc_bar0_lastreg = (bus_size_t) -1;
+	return (v);
+}
+static __inline void
+WRITE_REG(struct hipp_softc *sc, unsigned int barno, bus_size_t reg, u_int32_t val)
+{
+	writel(val, sc->sc_bar[barno] + reg);
+}
+
+#define READ_REG_0(sc, reg)         READ_REG(sc, 0, reg)
+#define WRITE_REG_0(sc, reg, val)   WRITE_REG(sc,0, reg, val)
+#define READ_REG_1(sc, reg)         READ_REG(sc, 1, reg)
+#define WRITE_REG_1(sc, reg, val)   WRITE_REG(sc,1, reg, val)
+
+static int
+hipp_newsession(device_t dev, u_int32_t *sidp, struct cryptoini *cri)
+{
+	return EINVAL;
+}
+
+static int
+hipp_freesession(device_t dev, u_int64_t tid)
+{
+	return EINVAL;
+}
+
+static int
+hipp_process(device_t dev, struct cryptop *crp, int hint)
+{
+	return EINVAL;
+}
+
+static const char*
+hipp_partname(struct hipp_softc *sc, char buf[128], size_t blen)
+{
+	char *n = NULL;
+
+	switch (pci_get_vendor(sc->sc_pcidev)) {
+	case PCI_VENDOR_HIFN:
+		switch (pci_get_device(sc->sc_pcidev)) {
+		case PCI_PRODUCT_HIFN_7855:	n = "Hifn 7855";
+		case PCI_PRODUCT_HIFN_8155:	n = "Hifn 8155";
+		case PCI_PRODUCT_HIFN_6500:	n = "Hifn 6500";
+		}
+	}
+
+	if(n==NULL) {
+		snprintf(buf, blen, "VID=%02x,PID=%02x",
+			 pci_get_vendor(sc->sc_pcidev),
+			 pci_get_device(sc->sc_pcidev));
+	} else {
+		buf[0]='\0';
+		strncat(buf, n, blen);
+	}
+	return buf;
+}
+
+struct hipp_fs_entry {
+	struct attribute attr;
+	/* other stuff */
+};
+
+
+static ssize_t
+cryptoid_show(struct device *dev,
+	      struct device_attribute *attr,
+	      char *buf)						
+{								
+	struct hipp_softc *sc;					
+
+	sc = pci_get_drvdata(to_pci_dev (dev));
+	return sprintf (buf, "%d\n", sc->sc_cid);
+}
+
+struct device_attribute hipp_dev_cryptoid = __ATTR_RO(cryptoid);
+
+/*
+ * Attach an interface that successfully probed.
+ */
+static int
+hipp_probe(struct pci_dev *dev, const struct pci_device_id *ent)
+{
+	struct hipp_softc *sc = NULL;
+	int i;
+	//char rbase;
+	//u_int16_t ena;
+	int rev;
+	//int rseg;
+	int rc;
+
+	DPRINTF("%s()\n", __FUNCTION__);
+
+	if (pci_enable_device(dev) < 0)
+		return(-ENODEV);
+
+	if (pci_set_mwi(dev))
+		return(-ENODEV);
+
+	if (!dev->irq) {
+		printk("hifn: found device with no IRQ assigned. check BIOS settings!");
+		pci_disable_device(dev);
+		return(-ENODEV);
+	}
+
+	sc = (struct hipp_softc *) kmalloc(sizeof(*sc), GFP_KERNEL);
+	if (!sc)
+		return(-ENOMEM);
+	memset(sc, 0, sizeof(*sc));
+
+	softc_device_init(sc, "hifn-hipp", hipp_num_chips, hipp_methods);
+
+	sc->sc_pcidev = dev;
+	sc->sc_irq = -1;
+	sc->sc_cid = -1;
+	sc->sc_num = hipp_num_chips++;
+
+	if (sc->sc_num < HIPP_MAX_CHIPS)
+		hipp_chip_idx[sc->sc_num] = sc;
+
+	pci_set_drvdata(sc->sc_pcidev, sc);
+
+	spin_lock_init(&sc->sc_mtx);
+
+	/*
+	 * Setup PCI resources.
+	 * The READ_REG_0, WRITE_REG_0, READ_REG_1,
+	 * and WRITE_REG_1 macros throughout the driver are used
+	 * to permit better debugging.
+	 */
+	for(i=0; i<4; i++) {
+		unsigned long mem_start, mem_len;
+		mem_start = pci_resource_start(sc->sc_pcidev, i);
+		mem_len   = pci_resource_len(sc->sc_pcidev, i);
+		sc->sc_barphy[i] = (caddr_t)mem_start;
+		sc->sc_bar[i] = (ocf_iomem_t) ioremap(mem_start, mem_len);
+		if (!sc->sc_bar[i]) {
+			device_printf(sc->sc_dev, "cannot map bar%d register space\n", i);
+			goto fail;
+		}
+	}
+
+	//hipp_reset_board(sc, 0);
+	pci_set_master(sc->sc_pcidev);
+
+	/*
+	 * Arrange the interrupt line.
+	 */
+	rc = request_irq(dev->irq, hipp_intr, IRQF_SHARED, "hifn", sc);
+	if (rc) {
+		device_printf(sc->sc_dev, "could not map interrupt: %d\n", rc);
+		goto fail;
+	}
+	sc->sc_irq = dev->irq;
+
+	rev = READ_REG_1(sc, HIPP_1_REVID) & 0xffff;
+
+	{
+		char b[32];
+		device_printf(sc->sc_dev, "%s, rev %u",
+			      hipp_partname(sc, b, sizeof(b)), rev);
+	}
+
+#if 0
+	if (sc->sc_flags & HIFN_IS_7956)
+		printf(", pll=0x%x<%s clk, %ux mult>",
+			sc->sc_pllconfig,
+			sc->sc_pllconfig & HIFN_PLL_REF_SEL ? "ext" : "pci",
+			2 + 2*((sc->sc_pllconfig & HIFN_PLL_ND) >> 11));
+#endif
+	printf("\n");
+
+	sc->sc_cid = crypto_get_driverid(softc_get_device(sc),CRYPTOCAP_F_HARDWARE);
+	if (sc->sc_cid < 0) {
+		device_printf(sc->sc_dev, "could not get crypto driver id\n");
+		goto fail;
+	}
+
+#if 0 /* cannot work with a non-GPL module */
+	/* make a sysfs entry to let the world know what entry we got */
+	sysfs_create_file(&sc->sc_pcidev->dev.kobj, &hipp_dev_cryptoid.attr);
+#endif
+
+#if 0
+	init_timer(&sc->sc_tickto);
+	sc->sc_tickto.function = hifn_tick;
+	sc->sc_tickto.data = (unsigned long) sc->sc_num;
+	mod_timer(&sc->sc_tickto, jiffies + HZ);
+#endif
+
+#if 0 /* no code here yet ?? */
+	crypto_register(sc->sc_cid, CRYPTO_3DES_CBC, 0, 0);
+#endif
+
+	return (0);
+
+fail:
+	if (sc->sc_cid >= 0)
+		crypto_unregister_all(sc->sc_cid);
+	if (sc->sc_irq != -1)
+		free_irq(sc->sc_irq, sc);
+	
+#if 0
+	if (sc->sc_dma) {
+		/* Turn off DMA polling */
+		WRITE_REG_1(sc, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MSTRESET |
+			    HIFN_DMACNFG_DMARESET | HIFN_DMACNFG_MODE);
+		
+		pci_free_consistent(sc->sc_pcidev,
+				    sizeof(*sc->sc_dma),
+				    sc->sc_dma, sc->sc_dma_physaddr);
+	}
+#endif
+	kfree(sc);
+	return (-ENXIO);
+}
+
+/*
+ * Detach an interface that successfully probed.
+ */
+static void
+hipp_remove(struct pci_dev *dev)
+{
+	struct hipp_softc *sc = pci_get_drvdata(dev);
+	unsigned long l_flags;
+
+	DPRINTF("%s()\n", __FUNCTION__);
+
+	/* disable interrupts */
+	HIPP_LOCK(sc);
+
+#if 0
+	WRITE_REG_1(sc, HIFN_1_DMA_IER, 0);
+	HIFN_UNLOCK(sc);
+
+	/*XXX other resources */
+	del_timer_sync(&sc->sc_tickto);
+
+	/* Turn off DMA polling */
+	WRITE_REG_1(sc, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MSTRESET |
+	    HIFN_DMACNFG_DMARESET | HIFN_DMACNFG_MODE);
+#endif
+
+	crypto_unregister_all(sc->sc_cid);
+
+	free_irq(sc->sc_irq, sc);
+
+#if 0
+	pci_free_consistent(sc->sc_pcidev, sizeof(*sc->sc_dma),
+                sc->sc_dma, sc->sc_dma_physaddr);
+#endif
+}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,19)
+static irqreturn_t hipp_intr(int irq, void *arg)
+#else
+static irqreturn_t hipp_intr(int irq, void *arg, struct pt_regs *regs)
+#endif
+{
+	struct hipp_softc *sc = arg;
+
+	sc = sc; /* shut up compiler */
+
+	return IRQ_HANDLED;
+}
+
+static struct pci_device_id hipp_pci_tbl[] = {
+	{ PCI_VENDOR_HIFN, PCI_PRODUCT_HIFN_7855,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, },
+	{ PCI_VENDOR_HIFN, PCI_PRODUCT_HIFN_8155,
+	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, },
+};
+MODULE_DEVICE_TABLE(pci, hipp_pci_tbl);
+
+static struct pci_driver hipp_driver = {
+	.name         = "hipp",
+	.id_table     = hipp_pci_tbl,
+	.probe        =	hipp_probe,
+	.remove       = hipp_remove,
+	/* add PM stuff here one day */
+};
+
+static int __init hipp_init (void)
+{
+	struct hipp_softc *sc = NULL;
+	int rc;
+
+	DPRINTF("%s(%p)\n", __FUNCTION__, hipp_init);
+
+	rc = pci_register_driver(&hipp_driver);
+	pci_register_driver_compat(&hipp_driver, rc);
+
+	return rc;
+}
+
+static void __exit hipp_exit (void)
+{
+	pci_unregister_driver(&hipp_driver);
+}
+
+module_init(hipp_init);
+module_exit(hipp_exit);
+
+MODULE_LICENSE("BSD");
+MODULE_AUTHOR("Michael Richardson <mcr@xelerance.com>");
+MODULE_DESCRIPTION("OCF driver for hifn HIPP-I/II PCI crypto devices");
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/hifn/hifnHIPPvar.h
+++ linux-mvl-dove-2.6.32/crypto/ocf/hifn/hifnHIPPvar.h
@@ -0,0 +1,93 @@
+/*
+ * Hifn HIPP-I/HIPP-II (7855/8155) driver.
+ * Copyright (c) 2006 Michael Richardson <mcr@xelerance.com> * 
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Effort sponsored by Hifn inc.
+ *
+ */
+
+#ifndef __HIFNHIPPVAR_H__
+#define __HIFNHIPPVAR_H__
+
+#define HIPP_MAX_CHIPS 8
+
+/*
+ * Holds data specific to a single Hifn HIPP-I board.
+ */
+struct hipp_softc {
+	softc_device_decl		 sc_dev;
+
+	struct pci_dev		*sc_pcidev;	/* device backpointer */
+	ocf_iomem_t             sc_bar[5];
+	caddr_t		        sc_barphy[5];   /* physical address */
+	int			sc_num;		/* for multiple devs */
+	spinlock_t		sc_mtx;		/* per-instance lock */
+	int32_t			sc_cid;
+	int			sc_irq;
+
+#if 0
+
+	u_int32_t		sc_dmaier;
+	u_int32_t		sc_drammodel;	/* 1=dram, 0=sram */
+	u_int32_t		sc_pllconfig;	/* 7954/7955/7956 PLL config */
+
+	struct hifn_dma		*sc_dma;
+	dma_addr_t		sc_dma_physaddr;/* physical address of sc_dma */
+
+	int			sc_dmansegs;
+	int			sc_maxses;
+	int			sc_nsessions;
+	struct hifn_session	*sc_sessions;
+	int			sc_ramsize;
+	int			sc_flags;
+#define	HIFN_HAS_RNG		0x1	/* includes random number generator */
+#define	HIFN_HAS_PUBLIC		0x2	/* includes public key support */
+#define	HIFN_HAS_AES		0x4	/* includes AES support */
+#define	HIFN_IS_7811		0x8	/* Hifn 7811 part */
+#define	HIFN_IS_7956		0x10	/* Hifn 7956/7955 don't have SDRAM */
+
+	struct timer_list	sc_tickto;	/* for managing DMA */
+
+	int			sc_rngfirst;
+	int			sc_rnghz;	/* RNG polling frequency */
+
+	int			sc_c_busy;	/* command ring busy */
+	int			sc_s_busy;	/* source data ring busy */
+	int			sc_d_busy;	/* destination data ring busy */
+	int			sc_r_busy;	/* result ring busy */
+	int			sc_active;	/* for initial countdown */
+	int			sc_needwakeup;	/* ops q'd wating on resources */
+	int			sc_curbatch;	/* # ops submitted w/o int */
+	int			sc_suspended;
+	struct miscdevice       sc_miscdev;
+#endif
+};
+
+#define	HIPP_LOCK(_sc)		spin_lock_irqsave(&(_sc)->sc_mtx, l_flags)
+#define	HIPP_UNLOCK(_sc)	spin_unlock_irqrestore(&(_sc)->sc_mtx, l_flags)
+
+#endif /* __HIFNHIPPVAR_H__ */
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/cryptocteon/Makefile
+++ linux-mvl-dove-2.6.32/crypto/ocf/cryptocteon/Makefile
@@ -0,0 +1,17 @@
+# for SGlinux builds
+-include $(ROOTDIR)/modules/.config
+
+obj-$(CONFIG_OCF_CRYPTOCTEON) += cryptocteon.o
+
+obj ?= .
+EXTRA_CFLAGS += -I$(obj)/.. -I$(obj)/
+
+ifdef CONFIG_OCF_CRYPTOCTEON
+# you need the cavium crypto component installed
+EXTRA_CFLAGS += -I/usr/local/Cavium_Networks/OCTEON-SDK/components/crypto-api/core/cryptolinux
+endif
+
+ifdef TOPDIR
+-include $(TOPDIR)/Rules.make
+endif
+
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/cryptocteon/cryptocteon.c
+++ linux-mvl-dove-2.6.32/crypto/ocf/cryptocteon/cryptocteon.c
@@ -0,0 +1,574 @@
+/*
+ * Octeon Crypto for OCF
+ *
+ * Written by David McCullough <david_mccullough@securecomputing.com>
+ * Copyright (C) 2009 David McCullough
+ *
+ * LICENSE TERMS
+ *
+ * The free distribution and use of this software in both source and binary
+ * form is allowed (with or without changes) provided that:
+ *
+ *   1. distributions of this source code include the above copyright
+ *      notice, this list of conditions and the following disclaimer;
+ *
+ *   2. distributions in binary form include the above copyright
+ *      notice, this list of conditions and the following disclaimer
+ *      in the documentation and/or other associated materials;
+ *
+ *   3. the copyright holder's name is not used to endorse products
+ *      built using this software without specific written permission.
+ *
+ * DISCLAIMER
+ *
+ * This software is provided 'as is' with no explicit or implied warranties
+ * in respect of its properties, including, but not limited to, correctness
+ * and/or fitness for purpose.
+ * ---------------------------------------------------------------------------
+ */
+
+#ifndef AUTOCONF_INCLUDED
+#include <linux/config.h>
+#endif
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/list.h>
+#include <linux/slab.h>
+#include <linux/sched.h>
+#include <linux/wait.h>
+#include <linux/crypto.h>
+#include <linux/mm.h>
+#include <linux/skbuff.h>
+#include <linux/random.h>
+#include <linux/scatterlist.h>
+
+#include <cryptodev.h>
+#include <uio.h>
+
+struct {
+	softc_device_decl	sc_dev;
+} octo_softc;
+
+#define offset_in_page(p) ((unsigned long)(p) & ~PAGE_MASK)
+
+struct octo_sess {
+	int					 octo_encalg;
+	#define MAX_CIPHER_KEYLEN	64
+	char				 octo_enckey[MAX_CIPHER_KEYLEN];
+	int					 octo_encklen;
+
+	int					 octo_macalg;
+	#define MAX_HASH_KEYLEN	64
+	char				 octo_mackey[MAX_HASH_KEYLEN];
+	int					 octo_macklen;
+	int					 octo_mackey_set;
+
+	int					 octo_mlen;
+	int					 octo_ivsize;
+
+#if 0
+	int					(*octo_decrypt)(struct scatterlist *sg, int sg_len,
+							uint8_t *key, int key_len, uint8_t * iv,
+							uint64_t *hminner, uint64_t *hmouter);
+
+	int					(*octo_encrypt)(struct scatterlist *sg, int sg_len,
+							uint8_t *key, int key_len, uint8_t * iv,
+							uint64_t *hminner, uint64_t *hmouter);
+#else
+	int					(*octo_encrypt)(struct octo_sess *od,
+	                      struct scatterlist *sg, int sg_len,
+						  int auth_off, int auth_len,
+						  int crypt_off, int crypt_len,
+						  int icv_off, uint8_t *ivp);
+	int					(*octo_decrypt)(struct octo_sess *od,
+	                      struct scatterlist *sg, int sg_len,
+						  int auth_off, int auth_len,
+						  int crypt_off, int crypt_len,
+						  int icv_off, uint8_t *ivp);
+#endif
+
+	uint64_t			 octo_hminner[3];
+	uint64_t			 octo_hmouter[3];
+};
+
+int32_t octo_id = -1;
+module_param(octo_id, int, 0444);
+MODULE_PARM_DESC(octo_id, "Read-Only OCF ID for cryptocteon driver");
+
+static struct octo_sess **octo_sessions = NULL;
+static u_int32_t octo_sesnum = 0;
+
+static	int octo_process(device_t, struct cryptop *, int);
+static	int octo_newsession(device_t, u_int32_t *, struct cryptoini *);
+static	int octo_freesession(device_t, u_int64_t);
+
+static device_method_t octo_methods = {
+	/* crypto device methods */
+	DEVMETHOD(cryptodev_newsession,	octo_newsession),
+	DEVMETHOD(cryptodev_freesession,octo_freesession),
+	DEVMETHOD(cryptodev_process,	octo_process),
+};
+
+#define debug octo_debug
+int octo_debug = 0;
+module_param(octo_debug, int, 0644);
+MODULE_PARM_DESC(octo_debug, "Enable debug");
+
+
+#include "cavium_crypto.c"
+
+
+/*
+ * Generate a new octo session.  We artifically limit it to a single
+ * hash/cipher or hash-cipher combo just to make it easier, most callers
+ * do not expect more than this anyway.
+ */
+static int
+octo_newsession(device_t dev, u_int32_t *sid, struct cryptoini *cri)
+{
+	struct cryptoini *c, *encini = NULL, *macini = NULL;
+	struct octo_sess **ocd;
+	int i;
+
+	dprintk("%s()\n", __FUNCTION__);
+	if (sid == NULL || cri == NULL) {
+		dprintk("%s,%d - EINVAL\n", __FILE__, __LINE__);
+		return EINVAL;
+	}
+
+	/*
+	 * To keep it simple, we only handle hash, cipher or hash/cipher in a
+	 * session,  you cannot currently do multiple ciphers/hashes in one
+	 * session even though it would be possibel to code this driver to
+	 * handle it.
+	 */
+	for (i = 0, c = cri; c && i < 2; i++) {
+		if (c->cri_alg == CRYPTO_MD5_HMAC ||
+				c->cri_alg == CRYPTO_SHA1_HMAC ||
+				c->cri_alg == CRYPTO_NULL_HMAC) {
+			if (macini) {
+				break;
+			}
+			macini = c;
+		}
+		if (c->cri_alg == CRYPTO_DES_CBC ||
+				c->cri_alg == CRYPTO_3DES_CBC ||
+				c->cri_alg == CRYPTO_AES_CBC ||
+				c->cri_alg == CRYPTO_NULL_CBC) {
+			if (encini) {
+				break;
+			}
+			encini = c;
+		}
+		c = c->cri_next;
+	}
+	if (!macini && !encini) {
+		dprintk("%s,%d - EINVAL bad cipher/hash or combination\n",
+				__FILE__, __LINE__);
+		return EINVAL;
+	}
+	if (c) {
+		dprintk("%s,%d - EINVAL cannot handle chained cipher/hash combos\n",
+				__FILE__, __LINE__);
+		return EINVAL;
+	}
+
+	/*
+	 * So we have something we can do, lets setup the session
+	 */
+
+	if (octo_sessions) {
+		for (i = 1; i < octo_sesnum; i++)
+			if (octo_sessions[i] == NULL)
+				break;
+	} else
+		i = 1;		/* NB: to silence compiler warning */
+
+	if (octo_sessions == NULL || i == octo_sesnum) {
+		if (octo_sessions == NULL) {
+			i = 1; /* We leave octo_sessions[0] empty */
+			octo_sesnum = CRYPTO_SW_SESSIONS;
+		} else
+			octo_sesnum *= 2;
+
+		ocd = kmalloc(octo_sesnum * sizeof(struct octo_sess *), SLAB_ATOMIC);
+		if (ocd == NULL) {
+			/* Reset session number */
+			if (octo_sesnum == CRYPTO_SW_SESSIONS)
+				octo_sesnum = 0;
+			else
+				octo_sesnum /= 2;
+			dprintk("%s,%d: ENOBUFS\n", __FILE__, __LINE__);
+			return ENOBUFS;
+		}
+		memset(ocd, 0, octo_sesnum * sizeof(struct octo_sess *));
+
+		/* Copy existing sessions */
+		if (octo_sessions) {
+			memcpy(ocd, octo_sessions,
+			    (octo_sesnum / 2) * sizeof(struct octo_sess *));
+			kfree(octo_sessions);
+		}
+
+		octo_sessions = ocd;
+	}
+
+	ocd = &octo_sessions[i];
+	*sid = i;
+
+
+	*ocd = (struct octo_sess *) kmalloc(sizeof(struct octo_sess), SLAB_ATOMIC);
+	if (*ocd == NULL) {
+		octo_freesession(NULL, i);
+		dprintk("%s,%d: ENOBUFS\n", __FILE__, __LINE__);
+		return ENOBUFS;
+	}
+	memset(*ocd, 0, sizeof(struct octo_sess));
+
+	if (encini && encini->cri_key) {
+		(*ocd)->octo_encklen = (encini->cri_klen + 7) / 8;
+		memcpy((*ocd)->octo_enckey, encini->cri_key, (*ocd)->octo_encklen);
+	}
+
+	if (macini && macini->cri_key) {
+		(*ocd)->octo_macklen = (macini->cri_klen + 7) / 8;
+		memcpy((*ocd)->octo_mackey, macini->cri_key, (*ocd)->octo_macklen);
+	}
+
+	(*ocd)->octo_mlen = 0;
+	if (encini && encini->cri_mlen)
+		(*ocd)->octo_mlen = encini->cri_mlen;
+	else if (macini && macini->cri_mlen)
+		(*ocd)->octo_mlen = macini->cri_mlen;
+	else
+		(*ocd)->octo_mlen = 12;
+
+	/*
+	 * point c at the enc if it exists, otherwise the mac
+	 */
+	c = encini ? encini : macini;
+
+	switch (c->cri_alg) {
+	case CRYPTO_DES_CBC:
+	case CRYPTO_3DES_CBC:
+		(*ocd)->octo_ivsize  = 8;
+		switch (macini ? macini->cri_alg : -1) {
+		case CRYPTO_MD5_HMAC:
+			(*ocd)->octo_encrypt = octo_des_cbc_md5_encrypt;
+			(*ocd)->octo_decrypt = octo_des_cbc_md5_decrypt;
+			octo_calc_hash(0, macini->cri_key, (*ocd)->octo_hminner,
+					(*ocd)->octo_hmouter);
+			break;
+		case CRYPTO_SHA1_HMAC:
+			(*ocd)->octo_encrypt = octo_des_cbc_sha1_encrypt;
+			(*ocd)->octo_decrypt = octo_des_cbc_sha1_encrypt;
+			octo_calc_hash(1, macini->cri_key, (*ocd)->octo_hminner,
+					(*ocd)->octo_hmouter);
+			break;
+		case -1:
+			(*ocd)->octo_encrypt = octo_des_cbc_encrypt;
+			(*ocd)->octo_decrypt = octo_des_cbc_decrypt;
+			break;
+		default:
+			octo_freesession(NULL, i);
+			dprintk("%s,%d: EINVALn", __FILE__, __LINE__);
+			return EINVAL;
+		}
+		break;
+	case CRYPTO_AES_CBC:
+		(*ocd)->octo_ivsize  = 16;
+		switch (macini ? macini->cri_alg : -1) {
+		case CRYPTO_MD5_HMAC:
+			(*ocd)->octo_encrypt = octo_aes_cbc_md5_encrypt;
+			(*ocd)->octo_decrypt = octo_aes_cbc_md5_decrypt;
+			octo_calc_hash(0, macini->cri_key, (*ocd)->octo_hminner,
+					(*ocd)->octo_hmouter);
+			break;
+		case CRYPTO_SHA1_HMAC:
+			(*ocd)->octo_encrypt = octo_aes_cbc_sha1_encrypt;
+			(*ocd)->octo_decrypt = octo_aes_cbc_sha1_decrypt;
+			octo_calc_hash(1, macini->cri_key, (*ocd)->octo_hminner,
+					(*ocd)->octo_hmouter);
+			break;
+		case -1:
+			(*ocd)->octo_encrypt = octo_aes_cbc_encrypt;
+			(*ocd)->octo_decrypt = octo_aes_cbc_decrypt;
+			break;
+		default:
+			octo_freesession(NULL, i);
+			dprintk("%s,%d: EINVALn", __FILE__, __LINE__);
+			return EINVAL;
+		}
+		break;
+	case CRYPTO_MD5_HMAC:
+		(*ocd)->octo_encrypt = octo_null_md5_encrypt;
+		(*ocd)->octo_decrypt = octo_null_md5_encrypt;
+		octo_calc_hash(0, macini->cri_key, (*ocd)->octo_hminner,
+				(*ocd)->octo_hmouter);
+		break;
+	case CRYPTO_SHA1_HMAC:
+		(*ocd)->octo_encrypt = octo_null_sha1_encrypt;
+		(*ocd)->octo_decrypt = octo_null_sha1_encrypt;
+		octo_calc_hash(1, macini->cri_key, (*ocd)->octo_hminner,
+				(*ocd)->octo_hmouter);
+		break;
+	default:
+		octo_freesession(NULL, i);
+		dprintk("%s,%d: EINVALn", __FILE__, __LINE__);
+		return EINVAL;
+	}
+
+	(*ocd)->octo_encalg = encini ? encini->cri_alg : -1;
+	(*ocd)->octo_macalg = macini ? macini->cri_alg : -1;
+
+	return 0;
+}
+
+/*
+ * Free a session.
+ */
+static int
+octo_freesession(device_t dev, u_int64_t tid)
+{
+	u_int32_t sid = CRYPTO_SESID2LID(tid);
+
+	dprintk("%s()\n", __FUNCTION__);
+	if (sid > octo_sesnum || octo_sessions == NULL ||
+			octo_sessions[sid] == NULL) {
+		dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__);
+		return(EINVAL);
+	}
+
+	/* Silently accept and return */
+	if (sid == 0)
+		return(0);
+
+	if (octo_sessions[sid])
+		kfree(octo_sessions[sid]);
+	octo_sessions[sid] = NULL;
+	return 0;
+}
+
+/*
+ * Process a request.
+ */
+static int
+octo_process(device_t dev, struct cryptop *crp, int hint)
+{
+	struct cryptodesc *crd;
+	struct octo_sess *od;
+	u_int32_t lid;
+#define SCATTERLIST_MAX 16
+	struct scatterlist sg[SCATTERLIST_MAX];
+	int sg_num, sg_len;
+	struct sk_buff *skb = NULL;
+	struct uio *uiop = NULL;
+	struct cryptodesc *enccrd = NULL, *maccrd = NULL;
+	unsigned char *ivp = NULL;
+	unsigned char iv_data[HASH_MAX_LEN];
+	int auth_off = 0, auth_len = 0, crypt_off = 0, crypt_len = 0, icv_off = 0;
+
+	dprintk("%s()\n", __FUNCTION__);
+	/* Sanity check */
+	if (crp == NULL) {
+		dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__);
+		return EINVAL;
+	}
+
+	crp->crp_etype = 0;
+
+	if (crp->crp_desc == NULL || crp->crp_buf == NULL) {
+		dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__);
+		crp->crp_etype = EINVAL;
+		goto done;
+	}
+
+	lid = crp->crp_sid & 0xffffffff;
+	if (lid >= octo_sesnum || lid == 0 || octo_sessions == NULL ||
+			octo_sessions[lid] == NULL) {
+		crp->crp_etype = ENOENT;
+		dprintk("%s,%d: ENOENT\n", __FILE__, __LINE__);
+		goto done;
+	}
+	od = octo_sessions[lid];
+
+	/*
+	 * do some error checking outside of the loop for SKB and IOV processing
+	 * this leaves us with valid skb or uiop pointers for later
+	 */
+	if (crp->crp_flags & CRYPTO_F_SKBUF) {
+		skb = (struct sk_buff *) crp->crp_buf;
+		if (skb_shinfo(skb)->nr_frags >= SCATTERLIST_MAX) {
+			printk("%s,%d: %d nr_frags > SCATTERLIST_MAX", __FILE__, __LINE__,
+					skb_shinfo(skb)->nr_frags);
+			goto done;
+		}
+	} else if (crp->crp_flags & CRYPTO_F_IOV) {
+		uiop = (struct uio *) crp->crp_buf;
+		if (uiop->uio_iovcnt > SCATTERLIST_MAX) {
+			printk("%s,%d: %d uio_iovcnt > SCATTERLIST_MAX", __FILE__, __LINE__,
+					uiop->uio_iovcnt);
+			goto done;
+		}
+	}
+
+	/* point our enccrd and maccrd appropriately */
+	crd = crp->crp_desc;
+	if (crd->crd_alg == od->octo_encalg) enccrd = crd;
+	if (crd->crd_alg == od->octo_macalg) maccrd = crd;
+	crd = crd->crd_next;
+	if (crd) {
+		if (crd->crd_alg == od->octo_encalg) enccrd = crd;
+		if (crd->crd_alg == od->octo_macalg) maccrd = crd;
+		crd = crd->crd_next;
+	}
+	if (crd) {
+		crp->crp_etype = EINVAL;
+		dprintk("%s,%d: ENOENT - descriptors do not match session\n",
+				__FILE__, __LINE__);
+		goto done;
+	}
+
+	if (enccrd) {
+		if (enccrd->crd_flags & CRD_F_IV_EXPLICIT) {
+			ivp = enccrd->crd_iv;
+		} else {
+			ivp = iv_data;
+			crypto_copydata(crp->crp_flags, crp->crp_buf,
+					enccrd->crd_inject, od->octo_ivsize, (caddr_t) ivp);
+		}
+
+		if (maccrd) {
+			auth_off = maccrd->crd_skip;
+			auth_len = maccrd->crd_len;
+			icv_off  = maccrd->crd_inject;
+		}
+
+		crypt_off = enccrd->crd_skip;
+		crypt_len = enccrd->crd_len;
+	} else { /* if (maccrd) */
+		auth_off = maccrd->crd_skip;
+		auth_len = maccrd->crd_len;
+		icv_off  = maccrd->crd_inject;
+	}
+
+
+	/*
+	 * setup the SG list to cover the buffer
+	 */
+	memset(sg, 0, sizeof(sg));
+	if (crp->crp_flags & CRYPTO_F_SKBUF) {
+		int i, len;
+
+		sg_num = 0;
+		sg_len = 0;
+
+		len = skb_headlen(skb);
+		sg_set_page(&sg[sg_num], virt_to_page(skb->data), len,
+				offset_in_page(skb->data));
+		sg_len += len;
+		sg_num++;
+
+		for (i = 0; i < skb_shinfo(skb)->nr_frags && sg_num < SCATTERLIST_MAX;
+				i++) {
+			len = skb_shinfo(skb)->frags[i].size;
+			sg_set_page(&sg[sg_num], skb_shinfo(skb)->frags[i].page,
+					len, skb_shinfo(skb)->frags[i].page_offset);
+			sg_len += len;
+			sg_num++;
+		}
+	} else if (crp->crp_flags & CRYPTO_F_IOV) {
+		int len;
+
+		sg_len = 0;
+		for (sg_num = 0; sg_len < crp->crp_ilen &&
+				sg_num < uiop->uio_iovcnt &&
+				sg_num < SCATTERLIST_MAX; sg_num++) {
+			len = uiop->uio_iov[sg_num].iov_len;
+			sg_set_page(&sg[sg_num],
+					virt_to_page(uiop->uio_iov[sg_num].iov_base), len,
+					offset_in_page(uiop->uio_iov[sg_num].iov_base));
+			sg_len += len;
+		}
+	} else {
+		sg_len = crp->crp_ilen;
+		sg_set_page(&sg[0], virt_to_page(crp->crp_buf), sg_len,
+				offset_in_page(crp->crp_buf));
+		sg_num = 1;
+	}
+
+
+	/*
+	 * setup a new explicit key
+	 */
+	if (enccrd) {
+		if (enccrd->crd_flags & CRD_F_KEY_EXPLICIT) {
+			od->octo_encklen = (enccrd->crd_klen + 7) / 8;
+			memcpy(od->octo_enckey, enccrd->crd_key, od->octo_encklen);
+		}
+	}
+	if (maccrd) {
+		if (maccrd->crd_flags & CRD_F_KEY_EXPLICIT) {
+			od->octo_macklen = (maccrd->crd_klen + 7) / 8;
+			memcpy(od->octo_mackey, maccrd->crd_key, od->octo_macklen);
+			od->octo_mackey_set = 0;
+		}
+		if (!od->octo_mackey_set) {
+			octo_calc_hash(maccrd->crd_alg == CRYPTO_MD5_HMAC ? 0 : 1,
+				maccrd->crd_key, od->octo_hminner, od->octo_hmouter);
+			od->octo_mackey_set = 1;
+		}
+	}
+
+
+	if (!enccrd || (enccrd->crd_flags & CRD_F_ENCRYPT))
+		(*od->octo_encrypt)(od, sg, sg_len,
+				auth_off, auth_len, crypt_off, crypt_len, icv_off, ivp);
+	else
+		(*od->octo_decrypt)(od, sg, sg_len,
+				auth_off, auth_len, crypt_off, crypt_len, icv_off, ivp);
+
+done:
+	crypto_done(crp);
+	return 0;
+}
+
+static int
+cryptocteon_init(void)
+{
+	dprintk("%s(%p)\n", __FUNCTION__, cryptocteon_init);
+
+	softc_device_init(&octo_softc, "cryptocteon", 0, octo_methods);
+
+	octo_id = crypto_get_driverid(softc_get_device(&octo_softc),
+			CRYPTOCAP_F_HARDWARE | CRYPTOCAP_F_SYNC);
+	if (octo_id < 0) {
+		printk("Cryptocteon device cannot initialize!");
+		return -ENODEV;
+	}
+
+	crypto_register(octo_id, CRYPTO_MD5_HMAC, 0,0);
+	crypto_register(octo_id, CRYPTO_SHA1_HMAC, 0,0);
+	//crypto_register(octo_id, CRYPTO_MD5, 0,0);
+	//crypto_register(octo_id, CRYPTO_SHA1, 0,0);
+	crypto_register(octo_id, CRYPTO_DES_CBC, 0,0);
+	crypto_register(octo_id, CRYPTO_3DES_CBC, 0,0);
+	crypto_register(octo_id, CRYPTO_AES_CBC, 0,0);
+
+	return(0);
+}
+
+static void
+cryptocteon_exit(void)
+{
+	dprintk("%s()\n", __FUNCTION__);
+	crypto_unregister_all(octo_id);
+	octo_id = -1;
+}
+
+module_init(cryptocteon_init);
+module_exit(cryptocteon_exit);
+
+MODULE_LICENSE("BSD");
+MODULE_AUTHOR("David McCullough <david_mccullough@securecomputing.com>");
+MODULE_DESCRIPTION("Cryptocteon (OCF module for Cavium OCTEON crypto)");
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/cryptocteon/cavium_crypto.c
+++ linux-mvl-dove-2.6.32/crypto/ocf/cryptocteon/cavium_crypto.c
@@ -0,0 +1,2217 @@
+/*
+ * Copyright (c) 2009 David McCullough <david.mccullough@securecomputing.com>
+ *
+ * Copyright (c) 2003-2007 Cavium Networks (support@cavium.com). All rights
+ * reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Cavium Networks
+ * 4. Cavium Networks' name may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ * 
+ * This Software, including technical data, may be subject to U.S. export
+ * control laws, including the U.S. Export Administration Act and its
+ * associated regulations, and may be subject to export or import regulations
+ * in other countries. You warrant that You will comply strictly in all
+ * respects with all such regulations and acknowledge that you have the
+ * responsibility to obtain licenses to export, re-export or import the
+ * Software.
+ * 
+ * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" AND
+ * WITH ALL FAULTS AND CAVIUM MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES,
+ * EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE
+ * SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
+ * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
+ * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
+ * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
+ * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
+ * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR
+ * PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
+*/
+/****************************************************************************/
+
+#include <linux/scatterlist.h>
+#include <asm/octeon/octeon.h>
+#include "octeon-asm.h"
+
+/****************************************************************************/
+
+extern unsigned long octeon_crypto_enable(struct octeon_cop2_state *);
+extern void octeon_crypto_disable(struct octeon_cop2_state *, unsigned long);
+
+#define SG_INIT(s, p, i, l) \
+	{ \
+	    (i) = 0; \
+	    (l) = (s)[0].length; \
+	    (p) = (typeof(p)) sg_virt((s)); \
+		CVMX_PREFETCH0((p)); \
+	}
+
+#define SG_CONSUME(s, p, i, l) \
+	{ \
+		(p)++; \
+		(l) -= sizeof(*(p)); \
+		if ((l) < 0) { \
+			dprintk("%s, %d: l = %d\n", __FILE__, __LINE__, l); \
+		} else if ((l) == 0) { \
+		    (i)++; \
+		    (l) = (s)[0].length; \
+		    (p) = (typeof(p)) sg_virt(s); \
+			CVMX_PREFETCH0((p)); \
+		} \
+	}
+
+#define ESP_HEADER_LENGTH     8
+#define DES_CBC_IV_LENGTH     8
+#define AES_CBC_IV_LENGTH     16
+#define ESP_HMAC_LEN          12
+
+#define ESP_HEADER_LENGTH 8
+#define DES_CBC_IV_LENGTH 8
+
+/****************************************************************************/
+
+#define CVM_LOAD_SHA_UNIT(dat, next)  { \
+   if (next == 0) {                     \
+      next = 1;                         \
+      CVMX_MT_HSH_DAT (dat, 0);         \
+   } else if (next == 1) {              \
+      next = 2;                         \
+      CVMX_MT_HSH_DAT (dat, 1);         \
+   } else if (next == 2) {              \
+      next = 3;                    \
+      CVMX_MT_HSH_DAT (dat, 2);         \
+   } else if (next == 3) {              \
+      next = 4;                         \
+      CVMX_MT_HSH_DAT (dat, 3);         \
+   } else if (next == 4) {              \
+      next = 5;                           \
+      CVMX_MT_HSH_DAT (dat, 4);         \
+   } else if (next == 5) {              \
+      next = 6;                         \
+      CVMX_MT_HSH_DAT (dat, 5);         \
+   } else if (next == 6) {              \
+      next = 7;                         \
+      CVMX_MT_HSH_DAT (dat, 6);         \
+   } else {                             \
+     CVMX_MT_HSH_STARTSHA (dat);        \
+     next = 0;                          \
+   }                                    \
+}
+
+#define CVM_LOAD2_SHA_UNIT(dat1, dat2, next)  { \
+   if (next == 0) {                      \
+      CVMX_MT_HSH_DAT (dat1, 0);         \
+      CVMX_MT_HSH_DAT (dat2, 1);         \
+      next = 2;                          \
+   } else if (next == 1) {               \
+      CVMX_MT_HSH_DAT (dat1, 1);         \
+      CVMX_MT_HSH_DAT (dat2, 2);         \
+      next = 3;                          \
+   } else if (next == 2) {               \
+      CVMX_MT_HSH_DAT (dat1, 2);         \
+      CVMX_MT_HSH_DAT (dat2, 3);         \
+      next = 4;                          \
+   } else if (next == 3) {               \
+      CVMX_MT_HSH_DAT (dat1, 3);         \
+      CVMX_MT_HSH_DAT (dat2, 4);         \
+      next = 5;                          \
+   } else if (next == 4) {               \
+      CVMX_MT_HSH_DAT (dat1, 4);         \
+      CVMX_MT_HSH_DAT (dat2, 5);         \
+      next = 6;                          \
+   } else if (next == 5) {               \
+      CVMX_MT_HSH_DAT (dat1, 5);         \
+      CVMX_MT_HSH_DAT (dat2, 6);         \
+      next = 7;                          \
+   } else if (next == 6) {               \
+      CVMX_MT_HSH_DAT (dat1, 6);         \
+      CVMX_MT_HSH_STARTSHA (dat2);       \
+      next = 0;                          \
+   } else {                              \
+     CVMX_MT_HSH_STARTSHA (dat1);        \
+     CVMX_MT_HSH_DAT (dat2, 0);          \
+     next = 1;                           \
+   }                                     \
+}
+
+/****************************************************************************/
+
+#define CVM_LOAD_MD5_UNIT(dat, next)  { \
+   if (next == 0) {                     \
+      next = 1;                         \
+      CVMX_MT_HSH_DAT (dat, 0);         \
+   } else if (next == 1) {              \
+      next = 2;                         \
+      CVMX_MT_HSH_DAT (dat, 1);         \
+   } else if (next == 2) {              \
+      next = 3;                    \
+      CVMX_MT_HSH_DAT (dat, 2);         \
+   } else if (next == 3) {              \
+      next = 4;                         \
+      CVMX_MT_HSH_DAT (dat, 3);         \
+   } else if (next == 4) {              \
+      next = 5;                           \
+      CVMX_MT_HSH_DAT (dat, 4);         \
+   } else if (next == 5) {              \
+      next = 6;                         \
+      CVMX_MT_HSH_DAT (dat, 5);         \
+   } else if (next == 6) {              \
+      next = 7;                         \
+      CVMX_MT_HSH_DAT (dat, 6);         \
+   } else {                             \
+     CVMX_MT_HSH_STARTMD5 (dat);        \
+     next = 0;                          \
+   }                                    \
+}
+
+#define CVM_LOAD2_MD5_UNIT(dat1, dat2, next)  { \
+   if (next == 0) {                      \
+      CVMX_MT_HSH_DAT (dat1, 0);         \
+      CVMX_MT_HSH_DAT (dat2, 1);         \
+      next = 2;                          \
+   } else if (next == 1) {               \
+      CVMX_MT_HSH_DAT (dat1, 1);         \
+      CVMX_MT_HSH_DAT (dat2, 2);         \
+      next = 3;                          \
+   } else if (next == 2) {               \
+      CVMX_MT_HSH_DAT (dat1, 2);         \
+      CVMX_MT_HSH_DAT (dat2, 3);         \
+      next = 4;                          \
+   } else if (next == 3) {               \
+      CVMX_MT_HSH_DAT (dat1, 3);         \
+      CVMX_MT_HSH_DAT (dat2, 4);         \
+      next = 5;                          \
+   } else if (next == 4) {               \
+      CVMX_MT_HSH_DAT (dat1, 4);         \
+      CVMX_MT_HSH_DAT (dat2, 5);         \
+      next = 6;                          \
+   } else if (next == 5) {               \
+      CVMX_MT_HSH_DAT (dat1, 5);         \
+      CVMX_MT_HSH_DAT (dat2, 6);         \
+      next = 7;                          \
+   } else if (next == 6) {               \
+      CVMX_MT_HSH_DAT (dat1, 6);         \
+      CVMX_MT_HSH_STARTMD5 (dat2);       \
+      next = 0;                          \
+   } else {                              \
+     CVMX_MT_HSH_STARTMD5 (dat1);        \
+     CVMX_MT_HSH_DAT (dat2, 0);          \
+     next = 1;                           \
+   }                                     \
+}
+
+/****************************************************************************/
+
+static inline uint64_t
+swap64(uint64_t a)
+{
+    return ((a >> 56) |
+       (((a >> 48) & 0xfful) << 8) |
+       (((a >> 40) & 0xfful) << 16) |
+       (((a >> 32) & 0xfful) << 24) |
+       (((a >> 24) & 0xfful) << 32) |
+       (((a >> 16) & 0xfful) << 40) |
+       (((a >> 8) & 0xfful) << 48) | (((a >> 0) & 0xfful) << 56));
+}
+
+/****************************************************************************/
+
+void
+octo_calc_hash(__u8 auth, unsigned char *key, uint64_t *inner, uint64_t *outer)
+{
+    uint8_t hash_key[64];
+    uint64_t *key1;
+    register uint64_t xor1 = 0x3636363636363636ULL;
+    register uint64_t xor2 = 0x5c5c5c5c5c5c5c5cULL;
+    struct octeon_cop2_state state;
+    unsigned long flags;
+
+    dprintk("%s()\n", __FUNCTION__);
+
+    memset(hash_key, 0, sizeof(hash_key));
+    memcpy(hash_key, (uint8_t *) key, (auth ? 20 : 16));
+    key1 = (uint64_t *) hash_key;
+    flags = octeon_crypto_enable(&state);
+    if (auth) {
+       CVMX_MT_HSH_IV(0x67452301EFCDAB89ULL, 0);
+       CVMX_MT_HSH_IV(0x98BADCFE10325476ULL, 1);
+       CVMX_MT_HSH_IV(0xC3D2E1F000000000ULL, 2);
+    } else {
+       CVMX_MT_HSH_IV(0x0123456789ABCDEFULL, 0);
+       CVMX_MT_HSH_IV(0xFEDCBA9876543210ULL, 1);
+    }
+
+    CVMX_MT_HSH_DAT((*key1 ^ xor1), 0);
+    key1++;
+    CVMX_MT_HSH_DAT((*key1 ^ xor1), 1);
+    key1++;
+    CVMX_MT_HSH_DAT((*key1 ^ xor1), 2);
+    key1++;
+    CVMX_MT_HSH_DAT((*key1 ^ xor1), 3);
+    key1++;
+    CVMX_MT_HSH_DAT((*key1 ^ xor1), 4);
+    key1++;
+    CVMX_MT_HSH_DAT((*key1 ^ xor1), 5);
+    key1++;
+    CVMX_MT_HSH_DAT((*key1 ^ xor1), 6);
+    key1++;
+    if (auth)
+		CVMX_MT_HSH_STARTSHA((*key1 ^ xor1));
+    else
+		CVMX_MT_HSH_STARTMD5((*key1 ^ xor1));
+
+    CVMX_MF_HSH_IV(inner[0], 0);
+    CVMX_MF_HSH_IV(inner[1], 1);
+    if (auth) {
+		inner[2] = 0;
+		CVMX_MF_HSH_IV(((uint64_t *) inner)[2], 2);
+    }
+
+    memset(hash_key, 0, sizeof(hash_key));
+    memcpy(hash_key, (uint8_t *) key, (auth ? 20 : 16));
+    key1 = (uint64_t *) hash_key;
+    if (auth) {
+      CVMX_MT_HSH_IV(0x67452301EFCDAB89ULL, 0);
+      CVMX_MT_HSH_IV(0x98BADCFE10325476ULL, 1);
+      CVMX_MT_HSH_IV(0xC3D2E1F000000000ULL, 2);
+    } else {
+      CVMX_MT_HSH_IV(0x0123456789ABCDEFULL, 0);
+      CVMX_MT_HSH_IV(0xFEDCBA9876543210ULL, 1);
+    }
+
+    CVMX_MT_HSH_DAT((*key1 ^ xor2), 0);
+    key1++;
+    CVMX_MT_HSH_DAT((*key1 ^ xor2), 1);
+    key1++;
+    CVMX_MT_HSH_DAT((*key1 ^ xor2), 2);
+    key1++;
+    CVMX_MT_HSH_DAT((*key1 ^ xor2), 3);
+    key1++;
+    CVMX_MT_HSH_DAT((*key1 ^ xor2), 4);
+    key1++;
+    CVMX_MT_HSH_DAT((*key1 ^ xor2), 5);
+    key1++;
+    CVMX_MT_HSH_DAT((*key1 ^ xor2), 6);
+    key1++;
+    if (auth)
+       CVMX_MT_HSH_STARTSHA((*key1 ^ xor2));
+    else 
+       CVMX_MT_HSH_STARTMD5((*key1 ^ xor2));
+
+    CVMX_MF_HSH_IV(outer[0], 0);
+    CVMX_MF_HSH_IV(outer[1], 1);
+    if (auth) {
+      outer[2] = 0;
+      CVMX_MF_HSH_IV(outer[2], 2);
+    }
+    octeon_crypto_disable(&state, flags);
+    return;
+}
+
+/****************************************************************************/
+/* DES functions */
+
+int
+octo_des_cbc_encrypt(
+    struct octo_sess *od,
+    struct scatterlist *sg, int sg_len,
+    int auth_off, int auth_len,
+    int crypt_off, int crypt_len,
+    int icv_off, uint8_t *ivp)
+{
+    uint64_t *data;
+    int data_i, data_l;
+    struct octeon_cop2_state state;
+    unsigned long flags;
+
+    dprintk("%s()\n", __FUNCTION__);
+
+    if (unlikely(od == NULL || sg==NULL || sg_len==0 || ivp==NULL ||
+	    (crypt_off & 0x7) || (crypt_off + crypt_len > sg_len))) {
+	dprintk("%s: Bad parameters od=%p sg=%p sg_len=%d "
+		"auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d "
+		"icv_off=%d ivp=%p\n", __FUNCTION__, od, sg, sg_len,
+		auth_off, auth_len, crypt_off, crypt_len, icv_off, ivp);
+	return -EINVAL;
+    }
+
+    SG_INIT(sg, data, data_i, data_l);
+
+    CVMX_PREFETCH0(ivp);
+    CVMX_PREFETCH0(od->octo_enckey);
+
+    flags = octeon_crypto_enable(&state);
+
+    /* load 3DES Key */
+    CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[0], 0);
+    if (od->octo_encklen == 24) {
+	CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[1], 1);
+	CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[2], 2);
+    } else if (od->octo_encklen == 8) {
+	CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[0], 1);
+	CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[0], 2);
+    } else {
+	octeon_crypto_disable(&state, flags);
+	dprintk("%s: Bad key length %d\n", __FUNCTION__, od->octo_encklen);
+	return -EINVAL;
+    }
+
+    CVMX_MT_3DES_IV(* (uint64_t *) ivp);
+
+    while (crypt_off > 0) {
+	SG_CONSUME(sg, data, data_i, data_l);
+	crypt_off -= 8;
+    }
+
+    while (crypt_len > 0) {
+	CVMX_MT_3DES_ENC_CBC(*data);
+	CVMX_MF_3DES_RESULT(*data);
+	SG_CONSUME(sg, data, data_i, data_l);
+	crypt_len -= 8;
+    }
+
+    octeon_crypto_disable(&state, flags);
+    return 0;
+}
+
+
+int
+octo_des_cbc_decrypt(
+    struct octo_sess *od,
+    struct scatterlist *sg, int sg_len,
+    int auth_off, int auth_len,
+    int crypt_off, int crypt_len,
+    int icv_off, uint8_t *ivp)
+{
+    uint64_t *data;
+    int data_i, data_l;
+    struct octeon_cop2_state state;
+    unsigned long flags;
+
+    dprintk("%s()\n", __FUNCTION__);
+
+    if (unlikely(od == NULL || sg==NULL || sg_len==0 || ivp==NULL ||
+	    (crypt_off & 0x7) || (crypt_off + crypt_len > sg_len))) {
+	dprintk("%s: Bad parameters od=%p sg=%p sg_len=%d "
+		"auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d "
+		"icv_off=%d ivp=%p\n", __FUNCTION__, od, sg, sg_len,
+		auth_off, auth_len, crypt_off, crypt_len, icv_off, ivp);
+	return -EINVAL;
+    }
+
+    SG_INIT(sg, data, data_i, data_l);
+
+    CVMX_PREFETCH0(ivp);
+    CVMX_PREFETCH0(od->octo_enckey);
+
+    flags = octeon_crypto_enable(&state);
+
+    /* load 3DES Key */
+    CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[0], 0);
+    if (od->octo_encklen == 24) {
+	CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[1], 1);
+	CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[2], 2);
+    } else if (od->octo_encklen == 8) {
+	CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[0], 1);
+	CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[0], 2);
+    } else {
+	octeon_crypto_disable(&state, flags);
+	dprintk("%s: Bad key length %d\n", __FUNCTION__, od->octo_encklen);
+	return -EINVAL;
+    }
+
+    CVMX_MT_3DES_IV(* (uint64_t *) ivp);
+
+    while (crypt_off > 0) {
+	SG_CONSUME(sg, data, data_i, data_l);
+	crypt_off -= 8;
+    }
+
+    while (crypt_len > 0) {
+	CVMX_MT_3DES_DEC_CBC(*data);
+	CVMX_MF_3DES_RESULT(*data);
+	SG_CONSUME(sg, data, data_i, data_l);
+	crypt_len -= 8;
+    }
+
+    octeon_crypto_disable(&state, flags);
+    return 0;
+}
+
+/****************************************************************************/
+/* AES functions */
+
+int
+octo_aes_cbc_encrypt(
+    struct octo_sess *od,
+    struct scatterlist *sg, int sg_len,
+    int auth_off, int auth_len,
+    int crypt_off, int crypt_len,
+    int icv_off, uint8_t *ivp)
+{
+    uint64_t *data, *pdata;
+    int data_i, data_l;
+    struct octeon_cop2_state state;
+    unsigned long flags;
+
+    dprintk("%s()\n", __FUNCTION__);
+
+    if (unlikely(od == NULL || sg==NULL || sg_len==0 || ivp==NULL ||
+	    (crypt_off & 0x7) || (crypt_off + crypt_len > sg_len))) {
+	dprintk("%s: Bad parameters od=%p sg=%p sg_len=%d "
+		"auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d "
+		"icv_off=%d ivp=%p\n", __FUNCTION__, od, sg, sg_len,
+		auth_off, auth_len, crypt_off, crypt_len, icv_off, ivp);
+	return -EINVAL;
+    }
+
+    SG_INIT(sg, data, data_i, data_l);
+
+    CVMX_PREFETCH0(ivp);
+    CVMX_PREFETCH0(od->octo_enckey);
+
+    flags = octeon_crypto_enable(&state);
+
+    /* load AES Key */
+    CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[0], 0);
+    CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[1], 1);
+
+    if (od->octo_encklen == 16) {
+	CVMX_MT_AES_KEY(0x0, 2);
+	CVMX_MT_AES_KEY(0x0, 3);
+    } else if (od->octo_encklen == 24) {
+	CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2);
+	CVMX_MT_AES_KEY(0x0, 3);
+    } else if (od->octo_encklen == 32) {
+	CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2);
+	CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[3], 3);
+    } else {
+	octeon_crypto_disable(&state, flags);
+	dprintk("%s: Bad key length %d\n", __FUNCTION__, od->octo_encklen);
+	return -EINVAL;
+    }
+    CVMX_MT_AES_KEYLENGTH(od->octo_encklen / 8 - 1);
+
+    CVMX_MT_AES_IV(((uint64_t *) ivp)[0], 0);
+    CVMX_MT_AES_IV(((uint64_t *) ivp)[1], 1);
+
+    while (crypt_off > 0) {
+	SG_CONSUME(sg, data, data_i, data_l);
+	crypt_off -= 8;
+    }
+
+    while (crypt_len > 0) {
+	pdata = data;
+	CVMX_MT_AES_ENC_CBC0(*data);
+	SG_CONSUME(sg, data, data_i, data_l);
+	CVMX_MT_AES_ENC_CBC1(*data);
+	CVMX_MF_AES_RESULT(*pdata, 0);
+	CVMX_MF_AES_RESULT(*data, 1);
+	SG_CONSUME(sg, data, data_i, data_l);
+	crypt_len -= 16;
+    }
+
+    octeon_crypto_disable(&state, flags);
+    return 0;
+}
+
+
+int
+octo_aes_cbc_decrypt(
+    struct octo_sess *od,
+    struct scatterlist *sg, int sg_len,
+    int auth_off, int auth_len,
+    int crypt_off, int crypt_len,
+    int icv_off, uint8_t *ivp)
+{
+    uint64_t *data, *pdata;
+    int data_i, data_l;
+    struct octeon_cop2_state state;
+    unsigned long flags;
+
+    dprintk("%s()\n", __FUNCTION__);
+
+    if (unlikely(od == NULL || sg==NULL || sg_len==0 || ivp==NULL ||
+	    (crypt_off & 0x7) || (crypt_off + crypt_len > sg_len))) {
+	dprintk("%s: Bad parameters od=%p sg=%p sg_len=%d "
+		"auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d "
+		"icv_off=%d ivp=%p\n", __FUNCTION__, od, sg, sg_len,
+		auth_off, auth_len, crypt_off, crypt_len, icv_off, ivp);
+	return -EINVAL;
+    }
+
+    SG_INIT(sg, data, data_i, data_l);
+
+    CVMX_PREFETCH0(ivp);
+    CVMX_PREFETCH0(od->octo_enckey);
+
+    flags = octeon_crypto_enable(&state);
+
+    /* load AES Key */
+    CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[0], 0);
+    CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[1], 1);
+
+    if (od->octo_encklen == 16) {
+	CVMX_MT_AES_KEY(0x0, 2);
+	CVMX_MT_AES_KEY(0x0, 3);
+    } else if (od->octo_encklen == 24) {
+	CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2);
+	CVMX_MT_AES_KEY(0x0, 3);
+    } else if (od->octo_encklen == 32) {
+	CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2);
+	CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[3], 3);
+    } else {
+	octeon_crypto_disable(&state, flags);
+	dprintk("%s: Bad key length %d\n", __FUNCTION__, od->octo_encklen);
+	return -EINVAL;
+    }
+    CVMX_MT_AES_KEYLENGTH(od->octo_encklen / 8 - 1);
+
+    CVMX_MT_AES_IV(((uint64_t *) ivp)[0], 0);
+    CVMX_MT_AES_IV(((uint64_t *) ivp)[1], 1);
+
+    while (crypt_off > 0) {
+	SG_CONSUME(sg, data, data_i, data_l);
+	crypt_off -= 8;
+    }
+
+    while (crypt_len > 0) {
+	pdata = data;
+	CVMX_MT_AES_DEC_CBC0(*data);
+	SG_CONSUME(sg, data, data_i, data_l);
+	CVMX_MT_AES_DEC_CBC1(*data);
+	CVMX_MF_AES_RESULT(*pdata, 0);
+	CVMX_MF_AES_RESULT(*data, 1);
+	SG_CONSUME(sg, data, data_i, data_l);
+	crypt_len -= 16;
+    }
+
+    octeon_crypto_disable(&state, flags);
+    return 0;
+}
+
+/****************************************************************************/
+/* MD5 */
+
+int
+octo_null_md5_encrypt(
+    struct octo_sess *od,
+    struct scatterlist *sg, int sg_len,
+    int auth_off, int auth_len,
+    int crypt_off, int crypt_len,
+    int icv_off, uint8_t *ivp)
+{
+    register int next = 0;
+    uint64_t *data;
+    uint64_t tmp1, tmp2;
+    int data_i, data_l, alen = auth_len;
+    struct octeon_cop2_state state;
+    unsigned long flags;
+
+    dprintk("%s()\n", __FUNCTION__);
+
+    if (unlikely(od == NULL || sg==NULL || sg_len==0 ||
+	    (auth_off & 0x7) || (auth_off + auth_len > sg_len))) {
+	dprintk("%s: Bad parameters od=%p sg=%p sg_len=%d "
+		"auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d "
+		"icv_off=%d ivp=%p\n", __FUNCTION__, od, sg, sg_len,
+		auth_off, auth_len, crypt_off, crypt_len, icv_off, ivp);
+	return -EINVAL;
+    }
+
+    SG_INIT(sg, data, data_i, data_l);
+
+    flags = octeon_crypto_enable(&state);
+
+    /* Load MD5 IV */
+    CVMX_MT_HSH_IV(od->octo_hminner[0], 0);
+    CVMX_MT_HSH_IV(od->octo_hminner[1], 1);
+
+    while (auth_off > 0) {
+	SG_CONSUME(sg, data, data_i, data_l);
+	auth_off -= 8;
+    }
+
+    while (auth_len > 0) {
+	CVM_LOAD_MD5_UNIT(*data, next);
+	auth_len -= 8;
+	SG_CONSUME(sg, data, data_i, data_l);
+    }
+
+    /* finish the hash */
+    CVMX_PREFETCH0(od->octo_hmouter);
+#if 0
+    if (unlikely(inplen)) {
+	uint64_t tmp = 0;
+	uint8_t *p = (uint8_t *) & tmp;
+	p[inplen] = 0x80;
+	do {
+	    inplen--;
+	    p[inplen] = ((uint8_t *) data)[inplen];
+	} while (inplen);
+	CVM_LOAD_MD5_UNIT(tmp, next);
+    } else {
+	CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next);
+    }
+#else
+    CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next);
+#endif
+
+    /* Finish Inner hash */
+    while (next != 7) {
+	CVM_LOAD_MD5_UNIT(((uint64_t) 0x0ULL), next);
+    }
+    CVMX_ES64(tmp1, ((alen + 64) << 3));
+    CVM_LOAD_MD5_UNIT(tmp1, next);
+
+    /* Get the inner hash of HMAC */
+    CVMX_MF_HSH_IV(tmp1, 0);
+    CVMX_MF_HSH_IV(tmp2, 1);
+
+    /* Initialize hash unit */
+    CVMX_MT_HSH_IV(od->octo_hmouter[0], 0);
+    CVMX_MT_HSH_IV(od->octo_hmouter[1], 1);
+
+    CVMX_MT_HSH_DAT(tmp1, 0);
+    CVMX_MT_HSH_DAT(tmp2, 1);
+    CVMX_MT_HSH_DAT(0x8000000000000000ULL, 2);
+    CVMX_MT_HSH_DATZ(3);
+    CVMX_MT_HSH_DATZ(4);
+    CVMX_MT_HSH_DATZ(5);
+    CVMX_MT_HSH_DATZ(6);
+    CVMX_ES64(tmp1, ((64 + 16) << 3));
+    CVMX_MT_HSH_STARTMD5(tmp1);
+
+    /* save the HMAC */
+    SG_INIT(sg, data, data_i, data_l);
+    while (icv_off > 0) {
+	SG_CONSUME(sg, data, data_i, data_l);
+	icv_off -= 8;
+    }
+    CVMX_MF_HSH_IV(*data, 0);
+    SG_CONSUME(sg, data, data_i, data_l);
+    CVMX_MF_HSH_IV(tmp1, 1);
+    *(uint32_t *)data = (uint32_t) (tmp1 >> 32);
+
+    octeon_crypto_disable(&state, flags);
+    return 0;
+}
+
+/****************************************************************************/
+/* SHA1 */
+
+int
+octo_null_sha1_encrypt(
+    struct octo_sess *od,
+    struct scatterlist *sg, int sg_len,
+    int auth_off, int auth_len,
+    int crypt_off, int crypt_len,
+    int icv_off, uint8_t *ivp)
+{
+    register int next = 0;
+    uint64_t *data;
+    uint64_t tmp1, tmp2, tmp3;
+    int data_i, data_l, alen = auth_len;
+    struct octeon_cop2_state state;
+    unsigned long flags;
+
+    dprintk("%s()\n", __FUNCTION__);
+
+    if (unlikely(od == NULL || sg==NULL || sg_len==0 ||
+	    (auth_off & 0x7) || (auth_off + auth_len > sg_len))) {
+	dprintk("%s: Bad parameters od=%p sg=%p sg_len=%d "
+		"auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d "
+		"icv_off=%d ivp=%p\n", __FUNCTION__, od, sg, sg_len,
+		auth_off, auth_len, crypt_off, crypt_len, icv_off, ivp);
+	return -EINVAL;
+    }
+
+    SG_INIT(sg, data, data_i, data_l);
+
+    flags = octeon_crypto_enable(&state);
+
+    /* Load SHA1 IV */
+    CVMX_MT_HSH_IV(od->octo_hminner[0], 0);
+    CVMX_MT_HSH_IV(od->octo_hminner[1], 1);
+    CVMX_MT_HSH_IV(od->octo_hminner[2], 2);
+
+    while (auth_off > 0) {
+	SG_CONSUME(sg, data, data_i, data_l);
+	auth_off -= 8;
+    }
+
+    while (auth_len > 0) {
+	CVM_LOAD_SHA_UNIT(*data, next);
+	auth_len -= 8;
+	SG_CONSUME(sg, data, data_i, data_l);
+    }
+
+    /* finish the hash */
+    CVMX_PREFETCH0(od->octo_hmouter);
+#if 0
+    if (unlikely(inplen)) {
+	uint64_t tmp = 0;
+	uint8_t *p = (uint8_t *) & tmp;
+	p[inplen] = 0x80;
+	do {
+	    inplen--;
+	    p[inplen] = ((uint8_t *) data)[inplen];
+	} while (inplen);
+	CVM_LOAD_MD5_UNIT(tmp, next);
+    } else {
+	CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next);
+    }
+#else
+    CVM_LOAD_SHA_UNIT(0x8000000000000000ULL, next);
+#endif
+
+    /* Finish Inner hash */
+    while (next != 7) {
+	CVM_LOAD_SHA_UNIT(((uint64_t) 0x0ULL), next);
+    }
+	CVM_LOAD_SHA_UNIT((uint64_t) ((alen + 64) << 3), next);
+
+    /* Get the inner hash of HMAC */
+    CVMX_MF_HSH_IV(tmp1, 0);
+    CVMX_MF_HSH_IV(tmp2, 1);
+    tmp3 = 0;
+    CVMX_MF_HSH_IV(tmp3, 2);
+
+    /* Initialize hash unit */
+    CVMX_MT_HSH_IV(od->octo_hmouter[0], 0);
+    CVMX_MT_HSH_IV(od->octo_hmouter[1], 1);
+    CVMX_MT_HSH_IV(od->octo_hmouter[2], 2);
+
+    CVMX_MT_HSH_DAT(tmp1, 0);
+    CVMX_MT_HSH_DAT(tmp2, 1);
+    tmp3 |= 0x0000000080000000;
+    CVMX_MT_HSH_DAT(tmp3, 2);
+    CVMX_MT_HSH_DATZ(3);
+    CVMX_MT_HSH_DATZ(4);
+    CVMX_MT_HSH_DATZ(5);
+    CVMX_MT_HSH_DATZ(6);
+    CVMX_MT_HSH_STARTSHA((uint64_t) ((64 + 20) << 3));
+
+    /* save the HMAC */
+    SG_INIT(sg, data, data_i, data_l);
+    while (icv_off > 0) {
+	SG_CONSUME(sg, data, data_i, data_l);
+	icv_off -= 8;
+    }
+    CVMX_MF_HSH_IV(*data, 0);
+    SG_CONSUME(sg, data, data_i, data_l);
+    CVMX_MF_HSH_IV(tmp1, 1);
+    *(uint32_t *)data = (uint32_t) (tmp1 >> 32);
+
+    octeon_crypto_disable(&state, flags);
+    return 0;
+}
+
+/****************************************************************************/
+/* DES MD5 */
+
+int
+octo_des_cbc_md5_encrypt(
+    struct octo_sess *od,
+    struct scatterlist *sg, int sg_len,
+    int auth_off, int auth_len,
+    int crypt_off, int crypt_len,
+    int icv_off, uint8_t *ivp)
+{
+    register int next = 0;
+    union {
+	uint32_t data32[2];
+	uint64_t data64[1];
+    } mydata;
+    uint64_t *data = &mydata.data64[0];
+    uint32_t *data32;
+    uint64_t tmp1, tmp2;
+    int data_i, data_l, alen = auth_len;
+    struct octeon_cop2_state state;
+    unsigned long flags;
+
+    dprintk("%s()\n", __FUNCTION__);
+
+    if (unlikely(od == NULL || sg==NULL || sg_len==0 || ivp==NULL ||
+	    (crypt_off & 0x3) || (crypt_off + crypt_len > sg_len) ||
+	    (crypt_len  & 0x7) ||
+	    (auth_len  & 0x7) ||
+	    (auth_off & 0x3) || (auth_off + auth_len > sg_len))) {
+	dprintk("%s: Bad parameters od=%p sg=%p sg_len=%d "
+		"auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d "
+		"icv_off=%d ivp=%p\n", __FUNCTION__, od, sg, sg_len,
+		auth_off, auth_len, crypt_off, crypt_len, icv_off, ivp);
+	return -EINVAL;
+    }
+
+    SG_INIT(sg, data32, data_i, data_l);
+
+    CVMX_PREFETCH0(ivp);
+    CVMX_PREFETCH0(od->octo_enckey);
+
+    flags = octeon_crypto_enable(&state);
+
+    /* load 3DES Key */
+    CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[0], 0);
+    if (od->octo_encklen == 24) {
+	CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[1], 1);
+	CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[2], 2);
+    } else if (od->octo_encklen == 8) {
+	CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[0], 1);
+	CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[0], 2);
+    } else {
+	octeon_crypto_disable(&state, flags);
+	dprintk("%s: Bad key length %d\n", __FUNCTION__, od->octo_encklen);
+	return -EINVAL;
+    }
+
+    CVMX_MT_3DES_IV(* (uint64_t *) ivp);
+
+    /* Load MD5 IV */
+    CVMX_MT_HSH_IV(od->octo_hminner[0], 0);
+    CVMX_MT_HSH_IV(od->octo_hminner[1], 1);
+
+    while (crypt_off > 0 && auth_off > 0) {
+	SG_CONSUME(sg, data32, data_i, data_l);
+	crypt_off -= 4;
+	auth_off -= 4;
+    }
+
+    while (crypt_len > 0 || auth_len > 0) {
+    	uint32_t *first = data32;
+	mydata.data32[0] = *first;
+	SG_CONSUME(sg, data32, data_i, data_l);
+	mydata.data32[1] = *data32;
+    	if (crypt_off <= 0) {
+	    if (crypt_len > 0) {
+		CVMX_MT_3DES_ENC_CBC(*data);
+		CVMX_MF_3DES_RESULT(*data);
+		crypt_len -= 8;
+	    }
+	} else
+	    crypt_off -= 8;
+    	if (auth_off <= 0) {
+	    if (auth_len > 0) {
+		CVM_LOAD_MD5_UNIT(*data, next);
+		auth_len -= 8;
+	    }
+	} else
+	    auth_off -= 8;
+	*first = mydata.data32[0];
+	*data32 = mydata.data32[1];
+	SG_CONSUME(sg, data32, data_i, data_l);
+    }
+
+    /* finish the hash */
+    CVMX_PREFETCH0(od->octo_hmouter);
+#if 0
+    if (unlikely(inplen)) {
+	uint64_t tmp = 0;
+	uint8_t *p = (uint8_t *) & tmp;
+	p[inplen] = 0x80;
+	do {
+	    inplen--;
+	    p[inplen] = ((uint8_t *) data)[inplen];
+	} while (inplen);
+	CVM_LOAD_MD5_UNIT(tmp, next);
+    } else {
+	CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next);
+    }
+#else
+    CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next);
+#endif
+
+    /* Finish Inner hash */
+    while (next != 7) {
+	CVM_LOAD_MD5_UNIT(((uint64_t) 0x0ULL), next);
+    }
+    CVMX_ES64(tmp1, ((alen + 64) << 3));
+    CVM_LOAD_MD5_UNIT(tmp1, next);
+
+    /* Get the inner hash of HMAC */
+    CVMX_MF_HSH_IV(tmp1, 0);
+    CVMX_MF_HSH_IV(tmp2, 1);
+
+    /* Initialize hash unit */
+    CVMX_MT_HSH_IV(od->octo_hmouter[0], 0);
+    CVMX_MT_HSH_IV(od->octo_hmouter[1], 1);
+
+    CVMX_MT_HSH_DAT(tmp1, 0);
+    CVMX_MT_HSH_DAT(tmp2, 1);
+    CVMX_MT_HSH_DAT(0x8000000000000000ULL, 2);
+    CVMX_MT_HSH_DATZ(3);
+    CVMX_MT_HSH_DATZ(4);
+    CVMX_MT_HSH_DATZ(5);
+    CVMX_MT_HSH_DATZ(6);
+    CVMX_ES64(tmp1, ((64 + 16) << 3));
+    CVMX_MT_HSH_STARTMD5(tmp1);
+
+    /* save the HMAC */
+    SG_INIT(sg, data32, data_i, data_l);
+    while (icv_off > 0) {
+	SG_CONSUME(sg, data32, data_i, data_l);
+	icv_off -= 4;
+    }
+    CVMX_MF_HSH_IV(tmp1, 0);
+    *data32 = (uint32_t) (tmp1 >> 32);
+    SG_CONSUME(sg, data32, data_i, data_l);
+    *data32 = (uint32_t) tmp1;
+    SG_CONSUME(sg, data32, data_i, data_l);
+    CVMX_MF_HSH_IV(tmp1, 1);
+    *data32 = (uint32_t) (tmp1 >> 32);
+
+    octeon_crypto_disable(&state, flags);
+    return 0;
+}
+
+int
+octo_des_cbc_md5_decrypt(
+    struct octo_sess *od,
+    struct scatterlist *sg, int sg_len,
+    int auth_off, int auth_len,
+    int crypt_off, int crypt_len,
+    int icv_off, uint8_t *ivp)
+{
+    register int next = 0;
+    union {
+	uint32_t data32[2];
+	uint64_t data64[1];
+    } mydata;
+    uint64_t *data = &mydata.data64[0];
+    uint32_t *data32;
+    uint64_t tmp1, tmp2;
+    int data_i, data_l, alen = auth_len;
+    struct octeon_cop2_state state;
+    unsigned long flags;
+
+    dprintk("%s()\n", __FUNCTION__);
+
+    if (unlikely(od == NULL || sg==NULL || sg_len==0 || ivp==NULL ||
+	    (crypt_off & 0x3) || (crypt_off + crypt_len > sg_len) ||
+	    (crypt_len  & 0x7) ||
+	    (auth_len  & 0x7) ||
+	    (auth_off & 0x3) || (auth_off + auth_len > sg_len))) {
+	dprintk("%s: Bad parameters od=%p sg=%p sg_len=%d "
+		"auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d "
+		"icv_off=%d ivp=%p\n", __FUNCTION__, od, sg, sg_len,
+		auth_off, auth_len, crypt_off, crypt_len, icv_off, ivp);
+	return -EINVAL;
+    }
+
+    SG_INIT(sg, data32, data_i, data_l);
+
+    CVMX_PREFETCH0(ivp);
+    CVMX_PREFETCH0(od->octo_enckey);
+
+    flags = octeon_crypto_enable(&state);
+
+    /* load 3DES Key */
+    CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[0], 0);
+    if (od->octo_encklen == 24) {
+	CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[1], 1);
+	CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[2], 2);
+    } else if (od->octo_encklen == 8) {
+	CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[0], 1);
+	CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[0], 2);
+    } else {
+	octeon_crypto_disable(&state, flags);
+	dprintk("%s: Bad key length %d\n", __FUNCTION__, od->octo_encklen);
+	return -EINVAL;
+    }
+
+    CVMX_MT_3DES_IV(* (uint64_t *) ivp);
+
+    /* Load MD5 IV */
+    CVMX_MT_HSH_IV(od->octo_hminner[0], 0);
+    CVMX_MT_HSH_IV(od->octo_hminner[1], 1);
+
+    while (crypt_off > 0 && auth_off > 0) {
+	SG_CONSUME(sg, data32, data_i, data_l);
+	crypt_off -= 4;
+	auth_off -= 4;
+    }
+
+    while (crypt_len > 0 || auth_len > 0) {
+    	uint32_t *first = data32;
+	mydata.data32[0] = *first;
+	SG_CONSUME(sg, data32, data_i, data_l);
+	mydata.data32[1] = *data32;
+    	if (auth_off <= 0) {
+	    if (auth_len > 0) {
+		CVM_LOAD_MD5_UNIT(*data, next);
+		auth_len -= 8;
+	    }
+	} else
+	    auth_off -= 8;
+    	if (crypt_off <= 0) {
+	    if (crypt_len > 0) {
+		CVMX_MT_3DES_DEC_CBC(*data);
+		CVMX_MF_3DES_RESULT(*data);
+		crypt_len -= 8;
+	    }
+	} else
+	    crypt_off -= 8;
+	*first = mydata.data32[0];
+	*data32 = mydata.data32[1];
+	SG_CONSUME(sg, data32, data_i, data_l);
+    }
+
+    /* finish the hash */
+    CVMX_PREFETCH0(od->octo_hmouter);
+#if 0
+    if (unlikely(inplen)) {
+	uint64_t tmp = 0;
+	uint8_t *p = (uint8_t *) & tmp;
+	p[inplen] = 0x80;
+	do {
+	    inplen--;
+	    p[inplen] = ((uint8_t *) data)[inplen];
+	} while (inplen);
+	CVM_LOAD_MD5_UNIT(tmp, next);
+    } else {
+	CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next);
+    }
+#else
+    CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next);
+#endif
+
+    /* Finish Inner hash */
+    while (next != 7) {
+	CVM_LOAD_MD5_UNIT(((uint64_t) 0x0ULL), next);
+    }
+    CVMX_ES64(tmp1, ((alen + 64) << 3));
+    CVM_LOAD_MD5_UNIT(tmp1, next);
+
+    /* Get the inner hash of HMAC */
+    CVMX_MF_HSH_IV(tmp1, 0);
+    CVMX_MF_HSH_IV(tmp2, 1);
+
+    /* Initialize hash unit */
+    CVMX_MT_HSH_IV(od->octo_hmouter[0], 0);
+    CVMX_MT_HSH_IV(od->octo_hmouter[1], 1);
+
+    CVMX_MT_HSH_DAT(tmp1, 0);
+    CVMX_MT_HSH_DAT(tmp2, 1);
+    CVMX_MT_HSH_DAT(0x8000000000000000ULL, 2);
+    CVMX_MT_HSH_DATZ(3);
+    CVMX_MT_HSH_DATZ(4);
+    CVMX_MT_HSH_DATZ(5);
+    CVMX_MT_HSH_DATZ(6);
+    CVMX_ES64(tmp1, ((64 + 16) << 3));
+    CVMX_MT_HSH_STARTMD5(tmp1);
+
+    /* save the HMAC */
+    SG_INIT(sg, data32, data_i, data_l);
+    while (icv_off > 0) {
+	SG_CONSUME(sg, data32, data_i, data_l);
+	icv_off -= 4;
+    }
+    CVMX_MF_HSH_IV(tmp1, 0);
+    *data32 = (uint32_t) (tmp1 >> 32);
+    SG_CONSUME(sg, data32, data_i, data_l);
+    *data32 = (uint32_t) tmp1;
+    SG_CONSUME(sg, data32, data_i, data_l);
+    CVMX_MF_HSH_IV(tmp1, 1);
+    *data32 = (uint32_t) (tmp1 >> 32);
+
+    octeon_crypto_disable(&state, flags);
+    return 0;
+}
+
+/****************************************************************************/
+/* DES SHA */
+
+int
+octo_des_cbc_sha1_encrypt(
+    struct octo_sess *od,
+    struct scatterlist *sg, int sg_len,
+    int auth_off, int auth_len,
+    int crypt_off, int crypt_len,
+    int icv_off, uint8_t *ivp)
+{
+    register int next = 0;
+    union {
+	uint32_t data32[2];
+	uint64_t data64[1];
+    } mydata;
+    uint64_t *data = &mydata.data64[0];
+    uint32_t *data32;
+    uint64_t tmp1, tmp2, tmp3;
+    int data_i, data_l, alen = auth_len;
+    struct octeon_cop2_state state;
+    unsigned long flags;
+
+    dprintk("%s()\n", __FUNCTION__);
+
+    if (unlikely(od == NULL || sg==NULL || sg_len==0 || ivp==NULL ||
+	    (crypt_off & 0x3) || (crypt_off + crypt_len > sg_len) ||
+	    (crypt_len  & 0x7) ||
+	    (auth_len  & 0x7) ||
+	    (auth_off & 0x3) || (auth_off + auth_len > sg_len))) {
+	dprintk("%s: Bad parameters od=%p sg=%p sg_len=%d "
+		"auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d "
+		"icv_off=%d ivp=%p\n", __FUNCTION__, od, sg, sg_len,
+		auth_off, auth_len, crypt_off, crypt_len, icv_off, ivp);
+	return -EINVAL;
+    }
+
+    SG_INIT(sg, data32, data_i, data_l);
+
+    CVMX_PREFETCH0(ivp);
+    CVMX_PREFETCH0(od->octo_enckey);
+
+    flags = octeon_crypto_enable(&state);
+
+    /* load 3DES Key */
+    CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[0], 0);
+    if (od->octo_encklen == 24) {
+	CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[1], 1);
+	CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[2], 2);
+    } else if (od->octo_encklen == 8) {
+	CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[0], 1);
+	CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[0], 2);
+    } else {
+	octeon_crypto_disable(&state, flags);
+	dprintk("%s: Bad key length %d\n", __FUNCTION__, od->octo_encklen);
+	return -EINVAL;
+    }
+
+    CVMX_MT_3DES_IV(* (uint64_t *) ivp);
+
+    /* Load SHA1 IV */
+    CVMX_MT_HSH_IV(od->octo_hminner[0], 0);
+    CVMX_MT_HSH_IV(od->octo_hminner[1], 1);
+    CVMX_MT_HSH_IV(od->octo_hminner[2], 2);
+
+    while (crypt_off > 0 && auth_off > 0) {
+	SG_CONSUME(sg, data32, data_i, data_l);
+	crypt_off -= 4;
+	auth_off -= 4;
+    }
+
+    while (crypt_len > 0 || auth_len > 0) {
+    	uint32_t *first = data32;
+	mydata.data32[0] = *first;
+	SG_CONSUME(sg, data32, data_i, data_l);
+	mydata.data32[1] = *data32;
+    	if (crypt_off <= 0) {
+	    if (crypt_len > 0) {
+		CVMX_MT_3DES_ENC_CBC(*data);
+		CVMX_MF_3DES_RESULT(*data);
+		crypt_len -= 8;
+	    }
+	} else
+	    crypt_off -= 8;
+    	if (auth_off <= 0) {
+	    if (auth_len > 0) {
+		CVM_LOAD_SHA_UNIT(*data, next);
+		auth_len -= 8;
+	    }
+	} else
+	    auth_off -= 8;
+	*first = mydata.data32[0];
+	*data32 = mydata.data32[1];
+	SG_CONSUME(sg, data32, data_i, data_l);
+    }
+
+    /* finish the hash */
+    CVMX_PREFETCH0(od->octo_hmouter);
+#if 0
+    if (unlikely(inplen)) {
+	uint64_t tmp = 0;
+	uint8_t *p = (uint8_t *) & tmp;
+	p[inplen] = 0x80;
+	do {
+	    inplen--;
+	    p[inplen] = ((uint8_t *) data)[inplen];
+	} while (inplen);
+	CVM_LOAD_SHA_UNIT(tmp, next);
+    } else {
+	CVM_LOAD_SHA_UNIT(0x8000000000000000ULL, next);
+    }
+#else
+    CVM_LOAD_SHA_UNIT(0x8000000000000000ULL, next);
+#endif
+
+    /* Finish Inner hash */
+    while (next != 7) {
+	CVM_LOAD_SHA_UNIT(((uint64_t) 0x0ULL), next);
+    }
+	CVM_LOAD_SHA_UNIT((uint64_t) ((alen + 64) << 3), next);
+
+    /* Get the inner hash of HMAC */
+    CVMX_MF_HSH_IV(tmp1, 0);
+    CVMX_MF_HSH_IV(tmp2, 1);
+    tmp3 = 0;
+    CVMX_MF_HSH_IV(tmp3, 2);
+
+    /* Initialize hash unit */
+    CVMX_MT_HSH_IV(od->octo_hmouter[0], 0);
+    CVMX_MT_HSH_IV(od->octo_hmouter[1], 1);
+    CVMX_MT_HSH_IV(od->octo_hmouter[2], 2);
+
+    CVMX_MT_HSH_DAT(tmp1, 0);
+    CVMX_MT_HSH_DAT(tmp2, 1);
+    tmp3 |= 0x0000000080000000;
+    CVMX_MT_HSH_DAT(tmp3, 2);
+    CVMX_MT_HSH_DATZ(3);
+    CVMX_MT_HSH_DATZ(4);
+    CVMX_MT_HSH_DATZ(5);
+    CVMX_MT_HSH_DATZ(6);
+    CVMX_MT_HSH_STARTSHA((uint64_t) ((64 + 20) << 3));
+
+    /* save the HMAC */
+    SG_INIT(sg, data32, data_i, data_l);
+    while (icv_off > 0) {
+	SG_CONSUME(sg, data32, data_i, data_l);
+	icv_off -= 4;
+    }
+    CVMX_MF_HSH_IV(tmp1, 0);
+    *data32 = (uint32_t) (tmp1 >> 32);
+    SG_CONSUME(sg, data32, data_i, data_l);
+    *data32 = (uint32_t) tmp1;
+    SG_CONSUME(sg, data32, data_i, data_l);
+    CVMX_MF_HSH_IV(tmp1, 1);
+    *data32 = (uint32_t) (tmp1 >> 32);
+
+    octeon_crypto_disable(&state, flags);
+    return 0;
+}
+
+int
+octo_des_cbc_sha1_decrypt(
+    struct octo_sess *od,
+    struct scatterlist *sg, int sg_len,
+    int auth_off, int auth_len,
+    int crypt_off, int crypt_len,
+    int icv_off, uint8_t *ivp)
+{
+    register int next = 0;
+    union {
+	uint32_t data32[2];
+	uint64_t data64[1];
+    } mydata;
+    uint64_t *data = &mydata.data64[0];
+    uint32_t *data32;
+    uint64_t tmp1, tmp2, tmp3;
+    int data_i, data_l, alen = auth_len;
+    struct octeon_cop2_state state;
+    unsigned long flags;
+
+    dprintk("%s()\n", __FUNCTION__);
+
+    if (unlikely(od == NULL || sg==NULL || sg_len==0 || ivp==NULL ||
+	    (crypt_off & 0x3) || (crypt_off + crypt_len > sg_len) ||
+	    (crypt_len  & 0x7) ||
+	    (auth_len  & 0x7) ||
+	    (auth_off & 0x3) || (auth_off + auth_len > sg_len))) {
+	dprintk("%s: Bad parameters od=%p sg=%p sg_len=%d "
+		"auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d "
+		"icv_off=%d ivp=%p\n", __FUNCTION__, od, sg, sg_len,
+		auth_off, auth_len, crypt_off, crypt_len, icv_off, ivp);
+	return -EINVAL;
+    }
+
+    SG_INIT(sg, data32, data_i, data_l);
+
+    CVMX_PREFETCH0(ivp);
+    CVMX_PREFETCH0(od->octo_enckey);
+
+    flags = octeon_crypto_enable(&state);
+
+    /* load 3DES Key */
+    CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[0], 0);
+    if (od->octo_encklen == 24) {
+	CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[1], 1);
+	CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[2], 2);
+    } else if (od->octo_encklen == 8) {
+	CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[0], 1);
+	CVMX_MT_3DES_KEY(((uint64_t *) od->octo_enckey)[0], 2);
+    } else {
+	octeon_crypto_disable(&state, flags);
+	dprintk("%s: Bad key length %d\n", __FUNCTION__, od->octo_encklen);
+	return -EINVAL;
+    }
+
+    CVMX_MT_3DES_IV(* (uint64_t *) ivp);
+
+    /* Load SHA1 IV */
+    CVMX_MT_HSH_IV(od->octo_hminner[0], 0);
+    CVMX_MT_HSH_IV(od->octo_hminner[1], 1);
+    CVMX_MT_HSH_IV(od->octo_hminner[2], 2);
+
+    while (crypt_off > 0 && auth_off > 0) {
+	SG_CONSUME(sg, data32, data_i, data_l);
+	crypt_off -= 4;
+	auth_off -= 4;
+    }
+
+    while (crypt_len > 0 || auth_len > 0) {
+    	uint32_t *first = data32;
+	mydata.data32[0] = *first;
+	SG_CONSUME(sg, data32, data_i, data_l);
+	mydata.data32[1] = *data32;
+    	if (auth_off <= 0) {
+	    if (auth_len > 0) {
+		CVM_LOAD_SHA_UNIT(*data, next);
+		auth_len -= 8;
+	    }
+	} else
+	    auth_off -= 8;
+    	if (crypt_off <= 0) {
+	    if (crypt_len > 0) {
+		CVMX_MT_3DES_DEC_CBC(*data);
+		CVMX_MF_3DES_RESULT(*data);
+		crypt_len -= 8;
+	    }
+	} else
+	    crypt_off -= 8;
+	*first = mydata.data32[0];
+	*data32 = mydata.data32[1];
+	SG_CONSUME(sg, data32, data_i, data_l);
+    }
+
+    /* finish the hash */
+    CVMX_PREFETCH0(od->octo_hmouter);
+#if 0
+    if (unlikely(inplen)) {
+	uint64_t tmp = 0;
+	uint8_t *p = (uint8_t *) & tmp;
+	p[inplen] = 0x80;
+	do {
+	    inplen--;
+	    p[inplen] = ((uint8_t *) data)[inplen];
+	} while (inplen);
+	CVM_LOAD_SHA_UNIT(tmp, next);
+    } else {
+	CVM_LOAD_SHA_UNIT(0x8000000000000000ULL, next);
+    }
+#else
+    CVM_LOAD_SHA_UNIT(0x8000000000000000ULL, next);
+#endif
+
+    /* Finish Inner hash */
+    while (next != 7) {
+	CVM_LOAD_SHA_UNIT(((uint64_t) 0x0ULL), next);
+    }
+	CVM_LOAD_SHA_UNIT((uint64_t) ((alen + 64) << 3), next);
+
+    /* Get the inner hash of HMAC */
+    CVMX_MF_HSH_IV(tmp1, 0);
+    CVMX_MF_HSH_IV(tmp2, 1);
+    tmp3 = 0;
+    CVMX_MF_HSH_IV(tmp3, 2);
+
+    /* Initialize hash unit */
+    CVMX_MT_HSH_IV(od->octo_hmouter[0], 0);
+    CVMX_MT_HSH_IV(od->octo_hmouter[1], 1);
+    CVMX_MT_HSH_IV(od->octo_hmouter[2], 2);
+
+    CVMX_MT_HSH_DAT(tmp1, 0);
+    CVMX_MT_HSH_DAT(tmp2, 1);
+    tmp3 |= 0x0000000080000000;
+    CVMX_MT_HSH_DAT(tmp3, 2);
+    CVMX_MT_HSH_DATZ(3);
+    CVMX_MT_HSH_DATZ(4);
+    CVMX_MT_HSH_DATZ(5);
+    CVMX_MT_HSH_DATZ(6);
+    CVMX_MT_HSH_STARTSHA((uint64_t) ((64 + 20) << 3));
+    /* save the HMAC */
+    SG_INIT(sg, data32, data_i, data_l);
+    while (icv_off > 0) {
+	SG_CONSUME(sg, data32, data_i, data_l);
+	icv_off -= 4;
+    }
+    CVMX_MF_HSH_IV(tmp1, 0);
+    *data32 = (uint32_t) (tmp1 >> 32);
+    SG_CONSUME(sg, data32, data_i, data_l);
+    *data32 = (uint32_t) tmp1;
+    SG_CONSUME(sg, data32, data_i, data_l);
+    CVMX_MF_HSH_IV(tmp1, 1);
+    *data32 = (uint32_t) (tmp1 >> 32);
+
+    octeon_crypto_disable(&state, flags);
+    return 0;
+}
+
+/****************************************************************************/
+/* AES MD5 */
+
+int
+octo_aes_cbc_md5_encrypt(
+    struct octo_sess *od,
+    struct scatterlist *sg, int sg_len,
+    int auth_off, int auth_len,
+    int crypt_off, int crypt_len,
+    int icv_off, uint8_t *ivp)
+{
+    register int next = 0;
+    union {
+	uint32_t data32[2];
+	uint64_t data64[1];
+    } mydata[2];
+    uint64_t *pdata = &mydata[0].data64[0];
+    uint64_t *data =  &mydata[1].data64[0];
+    uint32_t *data32;
+    uint64_t tmp1, tmp2;
+    int data_i, data_l, alen = auth_len;
+    struct octeon_cop2_state state;
+    unsigned long flags;
+
+    dprintk("%s()\n", __FUNCTION__);
+
+    if (unlikely(od == NULL || sg==NULL || sg_len==0 || ivp==NULL ||
+	    (crypt_off & 0x3) || (crypt_off + crypt_len > sg_len) ||
+	    (crypt_len  & 0x7) ||
+	    (auth_len  & 0x7) ||
+	    (auth_off & 0x3) || (auth_off + auth_len > sg_len))) {
+	dprintk("%s: Bad parameters od=%p sg=%p sg_len=%d "
+		"auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d "
+		"icv_off=%d ivp=%p\n", __FUNCTION__, od, sg, sg_len,
+		auth_off, auth_len, crypt_off, crypt_len, icv_off, ivp);
+	return -EINVAL;
+    }
+
+    SG_INIT(sg, data32, data_i, data_l);
+
+    CVMX_PREFETCH0(ivp);
+    CVMX_PREFETCH0(od->octo_enckey);
+
+    flags = octeon_crypto_enable(&state);
+
+    /* load AES Key */
+    CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[0], 0);
+    CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[1], 1);
+
+    if (od->octo_encklen == 16) {
+	CVMX_MT_AES_KEY(0x0, 2);
+	CVMX_MT_AES_KEY(0x0, 3);
+    } else if (od->octo_encklen == 24) {
+	CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2);
+	CVMX_MT_AES_KEY(0x0, 3);
+    } else if (od->octo_encklen == 32) {
+	CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2);
+	CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[3], 3);
+    } else {
+	octeon_crypto_disable(&state, flags);
+	dprintk("%s: Bad key length %d\n", __FUNCTION__, od->octo_encklen);
+	return -EINVAL;
+    }
+    CVMX_MT_AES_KEYLENGTH(od->octo_encklen / 8 - 1);
+
+    CVMX_MT_AES_IV(((uint64_t *) ivp)[0], 0);
+    CVMX_MT_AES_IV(((uint64_t *) ivp)[1], 1);
+
+    /* Load MD5 IV */
+    CVMX_MT_HSH_IV(od->octo_hminner[0], 0);
+    CVMX_MT_HSH_IV(od->octo_hminner[1], 1);
+
+    while (crypt_off > 0 && auth_off > 0) {
+	SG_CONSUME(sg, data32, data_i, data_l);
+	crypt_off -= 4;
+	auth_off -= 4;
+    }
+
+    while (crypt_len > 0 || auth_len > 0) {
+    	uint32_t *pdata32[3];
+
+	pdata32[0] = data32;
+	mydata[0].data32[0] = *data32;
+	SG_CONSUME(sg, data32, data_i, data_l);
+
+	pdata32[1] = data32;
+	mydata[0].data32[1] = *data32;
+	SG_CONSUME(sg, data32, data_i, data_l);
+
+	pdata32[2] = data32;
+	mydata[1].data32[0] = *data32;
+	SG_CONSUME(sg, data32, data_i, data_l);
+
+	mydata[1].data32[1] = *data32;
+
+
+    	if (crypt_off <= 0) {
+	    if (crypt_len > 0) {
+		CVMX_MT_AES_ENC_CBC0(*pdata);
+		CVMX_MT_AES_ENC_CBC1(*data);
+		CVMX_MF_AES_RESULT(*pdata, 0);
+		CVMX_MF_AES_RESULT(*data, 1);
+		crypt_len -= 16;
+	    }
+	} else
+	    crypt_off -= 16;
+
+    	if (auth_off <= 0) {
+	    if (auth_len > 0) {
+		CVM_LOAD_MD5_UNIT(*pdata, next);
+		CVM_LOAD_MD5_UNIT(*data, next);
+		auth_len -= 16;
+	    }
+	} else
+	    auth_off -= 16;
+
+	*pdata32[0] = mydata[0].data32[0];
+	*pdata32[1] = mydata[0].data32[1];
+	*pdata32[2] = mydata[1].data32[0];
+	*data32     = mydata[1].data32[1];
+
+	SG_CONSUME(sg, data32, data_i, data_l);
+    }
+
+    /* finish the hash */
+    CVMX_PREFETCH0(od->octo_hmouter);
+#if 0
+    if (unlikely(inplen)) {
+	uint64_t tmp = 0;
+	uint8_t *p = (uint8_t *) & tmp;
+	p[inplen] = 0x80;
+	do {
+	    inplen--;
+	    p[inplen] = ((uint8_t *) data)[inplen];
+	} while (inplen);
+	CVM_LOAD_MD5_UNIT(tmp, next);
+    } else {
+	CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next);
+    }
+#else
+    CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next);
+#endif
+
+    /* Finish Inner hash */
+    while (next != 7) {
+	CVM_LOAD_MD5_UNIT(((uint64_t) 0x0ULL), next);
+    }
+    CVMX_ES64(tmp1, ((alen + 64) << 3));
+    CVM_LOAD_MD5_UNIT(tmp1, next);
+
+    /* Get the inner hash of HMAC */
+    CVMX_MF_HSH_IV(tmp1, 0);
+    CVMX_MF_HSH_IV(tmp2, 1);
+
+    /* Initialize hash unit */
+    CVMX_MT_HSH_IV(od->octo_hmouter[0], 0);
+    CVMX_MT_HSH_IV(od->octo_hmouter[1], 1);
+
+    CVMX_MT_HSH_DAT(tmp1, 0);
+    CVMX_MT_HSH_DAT(tmp2, 1);
+    CVMX_MT_HSH_DAT(0x8000000000000000ULL, 2);
+    CVMX_MT_HSH_DATZ(3);
+    CVMX_MT_HSH_DATZ(4);
+    CVMX_MT_HSH_DATZ(5);
+    CVMX_MT_HSH_DATZ(6);
+    CVMX_ES64(tmp1, ((64 + 16) << 3));
+    CVMX_MT_HSH_STARTMD5(tmp1);
+
+    /* save the HMAC */
+    SG_INIT(sg, data32, data_i, data_l);
+    while (icv_off > 0) {
+	SG_CONSUME(sg, data32, data_i, data_l);
+	icv_off -= 4;
+    }
+    CVMX_MF_HSH_IV(tmp1, 0);
+    *data32 = (uint32_t) (tmp1 >> 32);
+    SG_CONSUME(sg, data32, data_i, data_l);
+    *data32 = (uint32_t) tmp1;
+    SG_CONSUME(sg, data32, data_i, data_l);
+    CVMX_MF_HSH_IV(tmp1, 1);
+    *data32 = (uint32_t) (tmp1 >> 32);
+
+    octeon_crypto_disable(&state, flags);
+    return 0;
+}
+
+int
+octo_aes_cbc_md5_decrypt(
+    struct octo_sess *od,
+    struct scatterlist *sg, int sg_len,
+    int auth_off, int auth_len,
+    int crypt_off, int crypt_len,
+    int icv_off, uint8_t *ivp)
+{
+    register int next = 0;
+    union {
+	uint32_t data32[2];
+	uint64_t data64[1];
+    } mydata[2];
+    uint64_t *pdata = &mydata[0].data64[0];
+    uint64_t *data =  &mydata[1].data64[0];
+    uint32_t *data32;
+    uint64_t tmp1, tmp2;
+    int data_i, data_l, alen = auth_len;
+    struct octeon_cop2_state state;
+    unsigned long flags;
+
+    dprintk("%s()\n", __FUNCTION__);
+
+    if (unlikely(od == NULL || sg==NULL || sg_len==0 || ivp==NULL ||
+	    (crypt_off & 0x3) || (crypt_off + crypt_len > sg_len) ||
+	    (crypt_len  & 0x7) ||
+	    (auth_len  & 0x7) ||
+	    (auth_off & 0x3) || (auth_off + auth_len > sg_len))) {
+	dprintk("%s: Bad parameters od=%p sg=%p sg_len=%d "
+		"auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d "
+		"icv_off=%d ivp=%p\n", __FUNCTION__, od, sg, sg_len,
+		auth_off, auth_len, crypt_off, crypt_len, icv_off, ivp);
+	return -EINVAL;
+    }
+
+    SG_INIT(sg, data32, data_i, data_l);
+
+    CVMX_PREFETCH0(ivp);
+    CVMX_PREFETCH0(od->octo_enckey);
+
+    flags = octeon_crypto_enable(&state);
+
+    /* load AES Key */
+    CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[0], 0);
+    CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[1], 1);
+
+    if (od->octo_encklen == 16) {
+	CVMX_MT_AES_KEY(0x0, 2);
+	CVMX_MT_AES_KEY(0x0, 3);
+    } else if (od->octo_encklen == 24) {
+	CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2);
+	CVMX_MT_AES_KEY(0x0, 3);
+    } else if (od->octo_encklen == 32) {
+	CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2);
+	CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[3], 3);
+    } else {
+	octeon_crypto_disable(&state, flags);
+	dprintk("%s: Bad key length %d\n", __FUNCTION__, od->octo_encklen);
+	return -EINVAL;
+    }
+    CVMX_MT_AES_KEYLENGTH(od->octo_encklen / 8 - 1);
+
+    CVMX_MT_AES_IV(((uint64_t *) ivp)[0], 0);
+    CVMX_MT_AES_IV(((uint64_t *) ivp)[1], 1);
+
+    /* Load MD5 IV */
+    CVMX_MT_HSH_IV(od->octo_hminner[0], 0);
+    CVMX_MT_HSH_IV(od->octo_hminner[1], 1);
+
+    while (crypt_off > 0 && auth_off > 0) {
+	SG_CONSUME(sg, data32, data_i, data_l);
+	crypt_off -= 4;
+	auth_off -= 4;
+    }
+
+    while (crypt_len > 0 || auth_len > 0) {
+    	uint32_t *pdata32[3];
+
+	pdata32[0] = data32;
+	mydata[0].data32[0] = *data32;
+	SG_CONSUME(sg, data32, data_i, data_l);
+	pdata32[1] = data32;
+	mydata[0].data32[1] = *data32;
+	SG_CONSUME(sg, data32, data_i, data_l);
+	pdata32[2] = data32;
+	mydata[1].data32[0] = *data32;
+	SG_CONSUME(sg, data32, data_i, data_l);
+	mydata[1].data32[1] = *data32;
+
+    	if (auth_off <= 0) {
+	    if (auth_len > 0) {
+		CVM_LOAD_MD5_UNIT(*pdata, next);
+		CVM_LOAD_MD5_UNIT(*data, next);
+		auth_len -= 16;
+	    }
+	} else
+	    auth_off -= 16;
+
+    	if (crypt_off <= 0) {
+	    if (crypt_len > 0) {
+		CVMX_MT_AES_DEC_CBC0(*pdata);
+		CVMX_MT_AES_DEC_CBC1(*data);
+		CVMX_MF_AES_RESULT(*pdata, 0);
+		CVMX_MF_AES_RESULT(*data, 1);
+		crypt_len -= 16;
+	    }
+	} else
+	    crypt_off -= 16;
+
+	*pdata32[0] = mydata[0].data32[0];
+	*pdata32[1] = mydata[0].data32[1];
+	*pdata32[2] = mydata[1].data32[0];
+	*data32     = mydata[1].data32[1];
+
+	SG_CONSUME(sg, data32, data_i, data_l);
+    }
+
+    /* finish the hash */
+    CVMX_PREFETCH0(od->octo_hmouter);
+#if 0
+    if (unlikely(inplen)) {
+	uint64_t tmp = 0;
+	uint8_t *p = (uint8_t *) & tmp;
+	p[inplen] = 0x80;
+	do {
+	    inplen--;
+	    p[inplen] = ((uint8_t *) data)[inplen];
+	} while (inplen);
+	CVM_LOAD_MD5_UNIT(tmp, next);
+    } else {
+	CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next);
+    }
+#else
+    CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next);
+#endif
+
+    /* Finish Inner hash */
+    while (next != 7) {
+	CVM_LOAD_MD5_UNIT(((uint64_t) 0x0ULL), next);
+    }
+    CVMX_ES64(tmp1, ((alen + 64) << 3));
+    CVM_LOAD_MD5_UNIT(tmp1, next);
+
+    /* Get the inner hash of HMAC */
+    CVMX_MF_HSH_IV(tmp1, 0);
+    CVMX_MF_HSH_IV(tmp2, 1);
+
+    /* Initialize hash unit */
+    CVMX_MT_HSH_IV(od->octo_hmouter[0], 0);
+    CVMX_MT_HSH_IV(od->octo_hmouter[1], 1);
+
+    CVMX_MT_HSH_DAT(tmp1, 0);
+    CVMX_MT_HSH_DAT(tmp2, 1);
+    CVMX_MT_HSH_DAT(0x8000000000000000ULL, 2);
+    CVMX_MT_HSH_DATZ(3);
+    CVMX_MT_HSH_DATZ(4);
+    CVMX_MT_HSH_DATZ(5);
+    CVMX_MT_HSH_DATZ(6);
+    CVMX_ES64(tmp1, ((64 + 16) << 3));
+    CVMX_MT_HSH_STARTMD5(tmp1);
+
+    /* save the HMAC */
+    SG_INIT(sg, data32, data_i, data_l);
+    while (icv_off > 0) {
+	SG_CONSUME(sg, data32, data_i, data_l);
+	icv_off -= 4;
+    }
+    CVMX_MF_HSH_IV(tmp1, 0);
+    *data32 = (uint32_t) (tmp1 >> 32);
+    SG_CONSUME(sg, data32, data_i, data_l);
+    *data32 = (uint32_t) tmp1;
+    SG_CONSUME(sg, data32, data_i, data_l);
+    CVMX_MF_HSH_IV(tmp1, 1);
+    *data32 = (uint32_t) (tmp1 >> 32);
+
+    octeon_crypto_disable(&state, flags);
+    return 0;
+}
+
+/****************************************************************************/
+/* AES SHA1 */
+
+int
+octo_aes_cbc_sha1_encrypt(
+    struct octo_sess *od,
+    struct scatterlist *sg, int sg_len,
+    int auth_off, int auth_len,
+    int crypt_off, int crypt_len,
+    int icv_off, uint8_t *ivp)
+{
+    register int next = 0;
+    union {
+	uint32_t data32[2];
+	uint64_t data64[1];
+    } mydata[2];
+    uint64_t *pdata = &mydata[0].data64[0];
+    uint64_t *data =  &mydata[1].data64[0];
+    uint32_t *data32;
+    uint64_t tmp1, tmp2, tmp3;
+    int data_i, data_l, alen = auth_len;
+    struct octeon_cop2_state state;
+    unsigned long flags;
+
+    dprintk("%s()\n", __FUNCTION__);
+
+    if (unlikely(od == NULL || sg==NULL || sg_len==0 || ivp==NULL ||
+	    (crypt_off & 0x3) || (crypt_off + crypt_len > sg_len) ||
+	    (crypt_len  & 0x7) ||
+	    (auth_len  & 0x7) ||
+	    (auth_off & 0x3) || (auth_off + auth_len > sg_len))) {
+	dprintk("%s: Bad parameters od=%p sg=%p sg_len=%d "
+		"auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d "
+		"icv_off=%d ivp=%p\n", __FUNCTION__, od, sg, sg_len,
+		auth_off, auth_len, crypt_off, crypt_len, icv_off, ivp);
+	return -EINVAL;
+    }
+
+    SG_INIT(sg, data32, data_i, data_l);
+
+    CVMX_PREFETCH0(ivp);
+    CVMX_PREFETCH0(od->octo_enckey);
+
+    flags = octeon_crypto_enable(&state);
+
+    /* load AES Key */
+    CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[0], 0);
+    CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[1], 1);
+
+    if (od->octo_encklen == 16) {
+	CVMX_MT_AES_KEY(0x0, 2);
+	CVMX_MT_AES_KEY(0x0, 3);
+    } else if (od->octo_encklen == 24) {
+	CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2);
+	CVMX_MT_AES_KEY(0x0, 3);
+    } else if (od->octo_encklen == 32) {
+	CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2);
+	CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[3], 3);
+    } else {
+	octeon_crypto_disable(&state, flags);
+	dprintk("%s: Bad key length %d\n", __FUNCTION__, od->octo_encklen);
+	return -EINVAL;
+    }
+    CVMX_MT_AES_KEYLENGTH(od->octo_encklen / 8 - 1);
+
+    CVMX_MT_AES_IV(((uint64_t *) ivp)[0], 0);
+    CVMX_MT_AES_IV(((uint64_t *) ivp)[1], 1);
+
+    /* Load SHA IV */
+    CVMX_MT_HSH_IV(od->octo_hminner[0], 0);
+    CVMX_MT_HSH_IV(od->octo_hminner[1], 1);
+    CVMX_MT_HSH_IV(od->octo_hminner[2], 2);
+
+    while (crypt_off > 0 && auth_off > 0) {
+	SG_CONSUME(sg, data32, data_i, data_l);
+	crypt_off -= 4;
+	auth_off -= 4;
+    }
+
+    while (crypt_len > 0 || auth_len > 0) {
+    	uint32_t *pdata32[3];
+
+	pdata32[0] = data32;
+	mydata[0].data32[0] = *data32;
+	SG_CONSUME(sg, data32, data_i, data_l);
+	pdata32[1] = data32;
+	mydata[0].data32[1] = *data32;
+	SG_CONSUME(sg, data32, data_i, data_l);
+	pdata32[2] = data32;
+	mydata[1].data32[0] = *data32;
+	SG_CONSUME(sg, data32, data_i, data_l);
+	mydata[1].data32[1] = *data32;
+
+
+    	if (crypt_off <= 0) {
+	    if (crypt_len > 0) {
+		CVMX_MT_AES_ENC_CBC0(*pdata);
+		CVMX_MT_AES_ENC_CBC1(*data);
+		CVMX_MF_AES_RESULT(*pdata, 0);
+		CVMX_MF_AES_RESULT(*data, 1);
+		crypt_len -= 16;
+	    }
+	} else
+	    crypt_off -= 16;
+
+    	if (auth_off <= 0) {
+	    if (auth_len > 0) {
+		CVM_LOAD_SHA_UNIT(*pdata, next);
+		CVM_LOAD_SHA_UNIT(*data, next);
+		auth_len -= 16;
+	    }
+	} else
+	    auth_off -= 16;
+
+	*pdata32[0] = mydata[0].data32[0];
+	*pdata32[1] = mydata[0].data32[1];
+	*pdata32[2] = mydata[1].data32[0];
+	*data32     = mydata[1].data32[1];
+
+	SG_CONSUME(sg, data32, data_i, data_l);
+    }
+
+    /* finish the hash */
+    CVMX_PREFETCH0(od->octo_hmouter);
+#if 0
+    if (unlikely(inplen)) {
+	uint64_t tmp = 0;
+	uint8_t *p = (uint8_t *) & tmp;
+	p[inplen] = 0x80;
+	do {
+	    inplen--;
+	    p[inplen] = ((uint8_t *) data)[inplen];
+	} while (inplen);
+	CVM_LOAD_SHA_UNIT(tmp, next);
+    } else {
+	CVM_LOAD_SHA_UNIT(0x8000000000000000ULL, next);
+    }
+#else
+    CVM_LOAD_SHA_UNIT(0x8000000000000000ULL, next);
+#endif
+
+    /* Finish Inner hash */
+    while (next != 7) {
+	CVM_LOAD_SHA_UNIT(((uint64_t) 0x0ULL), next);
+    }
+	CVM_LOAD_SHA_UNIT((uint64_t) ((alen + 64) << 3), next);
+
+    /* Get the inner hash of HMAC */
+    CVMX_MF_HSH_IV(tmp1, 0);
+    CVMX_MF_HSH_IV(tmp2, 1);
+    tmp3 = 0;
+    CVMX_MF_HSH_IV(tmp3, 2);
+
+    /* Initialize hash unit */
+    CVMX_MT_HSH_IV(od->octo_hmouter[0], 0);
+    CVMX_MT_HSH_IV(od->octo_hmouter[1], 1);
+    CVMX_MT_HSH_IV(od->octo_hmouter[2], 2);
+
+    CVMX_MT_HSH_DAT(tmp1, 0);
+    CVMX_MT_HSH_DAT(tmp2, 1);
+    tmp3 |= 0x0000000080000000;
+    CVMX_MT_HSH_DAT(tmp3, 2);
+    CVMX_MT_HSH_DATZ(3);
+    CVMX_MT_HSH_DATZ(4);
+    CVMX_MT_HSH_DATZ(5);
+    CVMX_MT_HSH_DATZ(6);
+    CVMX_MT_HSH_STARTSHA((uint64_t) ((64 + 20) << 3));
+
+    /* finish the hash */
+    CVMX_PREFETCH0(od->octo_hmouter);
+#if 0
+    if (unlikely(inplen)) {
+	uint64_t tmp = 0;
+	uint8_t *p = (uint8_t *) & tmp;
+	p[inplen] = 0x80;
+	do {
+	    inplen--;
+	    p[inplen] = ((uint8_t *) data)[inplen];
+	} while (inplen);
+	CVM_LOAD_MD5_UNIT(tmp, next);
+    } else {
+	CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next);
+    }
+#else
+    CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next);
+#endif
+
+    /* save the HMAC */
+    SG_INIT(sg, data32, data_i, data_l);
+    while (icv_off > 0) {
+	SG_CONSUME(sg, data32, data_i, data_l);
+	icv_off -= 4;
+    }
+    CVMX_MF_HSH_IV(tmp1, 0);
+    *data32 = (uint32_t) (tmp1 >> 32);
+    SG_CONSUME(sg, data32, data_i, data_l);
+    *data32 = (uint32_t) tmp1;
+    SG_CONSUME(sg, data32, data_i, data_l);
+    CVMX_MF_HSH_IV(tmp1, 1);
+    *data32 = (uint32_t) (tmp1 >> 32);
+
+    octeon_crypto_disable(&state, flags);
+    return 0;
+}
+
+int
+octo_aes_cbc_sha1_decrypt(
+    struct octo_sess *od,
+    struct scatterlist *sg, int sg_len,
+    int auth_off, int auth_len,
+    int crypt_off, int crypt_len,
+    int icv_off, uint8_t *ivp)
+{
+    register int next = 0;
+    union {
+	uint32_t data32[2];
+	uint64_t data64[1];
+    } mydata[2];
+    uint64_t *pdata = &mydata[0].data64[0];
+    uint64_t *data =  &mydata[1].data64[0];
+    uint32_t *data32;
+    uint64_t tmp1, tmp2, tmp3;
+    int data_i, data_l, alen = auth_len;
+    struct octeon_cop2_state state;
+    unsigned long flags;
+
+    dprintk("%s()\n", __FUNCTION__);
+
+    if (unlikely(od == NULL || sg==NULL || sg_len==0 || ivp==NULL ||
+	    (crypt_off & 0x3) || (crypt_off + crypt_len > sg_len) ||
+	    (crypt_len  & 0x7) ||
+	    (auth_len  & 0x7) ||
+	    (auth_off & 0x3) || (auth_off + auth_len > sg_len))) {
+	dprintk("%s: Bad parameters od=%p sg=%p sg_len=%d "
+		"auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d "
+		"icv_off=%d ivp=%p\n", __FUNCTION__, od, sg, sg_len,
+		auth_off, auth_len, crypt_off, crypt_len, icv_off, ivp);
+	return -EINVAL;
+    }
+
+    SG_INIT(sg, data32, data_i, data_l);
+
+    CVMX_PREFETCH0(ivp);
+    CVMX_PREFETCH0(od->octo_enckey);
+
+    flags = octeon_crypto_enable(&state);
+
+    /* load AES Key */
+    CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[0], 0);
+    CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[1], 1);
+
+    if (od->octo_encklen == 16) {
+	CVMX_MT_AES_KEY(0x0, 2);
+	CVMX_MT_AES_KEY(0x0, 3);
+    } else if (od->octo_encklen == 24) {
+	CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2);
+	CVMX_MT_AES_KEY(0x0, 3);
+    } else if (od->octo_encklen == 32) {
+	CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2);
+	CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[3], 3);
+    } else {
+	octeon_crypto_disable(&state, flags);
+	dprintk("%s: Bad key length %d\n", __FUNCTION__, od->octo_encklen);
+	return -EINVAL;
+    }
+    CVMX_MT_AES_KEYLENGTH(od->octo_encklen / 8 - 1);
+
+    CVMX_MT_AES_IV(((uint64_t *) ivp)[0], 0);
+    CVMX_MT_AES_IV(((uint64_t *) ivp)[1], 1);
+
+    /* Load MD5 IV */
+    CVMX_MT_HSH_IV(od->octo_hminner[0], 0);
+    CVMX_MT_HSH_IV(od->octo_hminner[1], 1);
+    CVMX_MT_HSH_IV(od->octo_hminner[2], 2);
+
+    while (crypt_off > 0 && auth_off > 0) {
+	SG_CONSUME(sg, data32, data_i, data_l);
+	crypt_off -= 4;
+	auth_off -= 4;
+    }
+
+    while (crypt_len > 0 || auth_len > 0) {
+    	uint32_t *pdata32[3];
+
+	pdata32[0] = data32;
+	mydata[0].data32[0] = *data32;
+	SG_CONSUME(sg, data32, data_i, data_l);
+	pdata32[1] = data32;
+	mydata[0].data32[1] = *data32;
+	SG_CONSUME(sg, data32, data_i, data_l);
+	pdata32[2] = data32;
+	mydata[1].data32[0] = *data32;
+	SG_CONSUME(sg, data32, data_i, data_l);
+	mydata[1].data32[1] = *data32;
+
+    	if (auth_off <= 0) {
+	    if (auth_len > 0) {
+		CVM_LOAD_SHA_UNIT(*pdata, next);
+		CVM_LOAD_SHA_UNIT(*data, next);
+		auth_len -= 16;
+	    }
+	} else
+	    auth_off -= 16;
+
+    	if (crypt_off <= 0) {
+	    if (crypt_len > 0) {
+		CVMX_MT_AES_DEC_CBC0(*pdata);
+		CVMX_MT_AES_DEC_CBC1(*data);
+		CVMX_MF_AES_RESULT(*pdata, 0);
+		CVMX_MF_AES_RESULT(*data, 1);
+		crypt_len -= 16;
+	    }
+	} else
+	    crypt_off -= 16;
+
+	*pdata32[0] = mydata[0].data32[0];
+	*pdata32[1] = mydata[0].data32[1];
+	*pdata32[2] = mydata[1].data32[0];
+	*data32     = mydata[1].data32[1];
+
+	SG_CONSUME(sg, data32, data_i, data_l);
+    }
+
+    /* finish the hash */
+    CVMX_PREFETCH0(od->octo_hmouter);
+#if 0
+    if (unlikely(inplen)) {
+	uint64_t tmp = 0;
+	uint8_t *p = (uint8_t *) & tmp;
+	p[inplen] = 0x80;
+	do {
+	    inplen--;
+	    p[inplen] = ((uint8_t *) data)[inplen];
+	} while (inplen);
+	CVM_LOAD_SHA_UNIT(tmp, next);
+    } else {
+	CVM_LOAD_SHA_UNIT(0x8000000000000000ULL, next);
+    }
+#else
+    CVM_LOAD_SHA_UNIT(0x8000000000000000ULL, next);
+#endif
+
+    /* Finish Inner hash */
+    while (next != 7) {
+	CVM_LOAD_SHA_UNIT(((uint64_t) 0x0ULL), next);
+    }
+	CVM_LOAD_SHA_UNIT((uint64_t) ((alen + 64) << 3), next);
+
+    /* Get the inner hash of HMAC */
+    CVMX_MF_HSH_IV(tmp1, 0);
+    CVMX_MF_HSH_IV(tmp2, 1);
+    tmp3 = 0;
+    CVMX_MF_HSH_IV(tmp3, 2);
+
+    /* Initialize hash unit */
+    CVMX_MT_HSH_IV(od->octo_hmouter[0], 0);
+    CVMX_MT_HSH_IV(od->octo_hmouter[1], 1);
+    CVMX_MT_HSH_IV(od->octo_hmouter[2], 2);
+
+    CVMX_MT_HSH_DAT(tmp1, 0);
+    CVMX_MT_HSH_DAT(tmp2, 1);
+    tmp3 |= 0x0000000080000000;
+    CVMX_MT_HSH_DAT(tmp3, 2);
+    CVMX_MT_HSH_DATZ(3);
+    CVMX_MT_HSH_DATZ(4);
+    CVMX_MT_HSH_DATZ(5);
+    CVMX_MT_HSH_DATZ(6);
+    CVMX_MT_HSH_STARTSHA((uint64_t) ((64 + 20) << 3));
+
+    /* finish the hash */
+    CVMX_PREFETCH0(od->octo_hmouter);
+#if 0
+    if (unlikely(inplen)) {
+	uint64_t tmp = 0;
+	uint8_t *p = (uint8_t *) & tmp;
+	p[inplen] = 0x80;
+	do {
+	    inplen--;
+	    p[inplen] = ((uint8_t *) data)[inplen];
+	} while (inplen);
+	CVM_LOAD_MD5_UNIT(tmp, next);
+    } else {
+	CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next);
+    }
+#else
+    CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next);
+#endif
+
+    /* save the HMAC */
+    SG_INIT(sg, data32, data_i, data_l);
+    while (icv_off > 0) {
+	SG_CONSUME(sg, data32, data_i, data_l);
+	icv_off -= 4;
+    }
+    CVMX_MF_HSH_IV(tmp1, 0);
+    *data32 = (uint32_t) (tmp1 >> 32);
+    SG_CONSUME(sg, data32, data_i, data_l);
+    *data32 = (uint32_t) tmp1;
+    SG_CONSUME(sg, data32, data_i, data_l);
+    CVMX_MF_HSH_IV(tmp1, 1);
+    *data32 = (uint32_t) (tmp1 >> 32);
+
+    octeon_crypto_disable(&state, flags);
+    return 0;
+}
+
+/****************************************************************************/
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/ocfnull/Makefile
+++ linux-mvl-dove-2.6.32/crypto/ocf/ocfnull/Makefile
@@ -0,0 +1,12 @@
+# for SGlinux builds
+-include $(ROOTDIR)/modules/.config
+
+obj-$(CONFIG_OCF_OCFNULL) += ocfnull.o
+
+obj ?= .
+EXTRA_CFLAGS += -I$(obj)/..
+
+ifdef TOPDIR
+-include $(TOPDIR)/Rules.make
+endif
+
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/ocfnull/ocfnull.c
+++ linux-mvl-dove-2.6.32/crypto/ocf/ocfnull/ocfnull.c
@@ -0,0 +1,203 @@
+/*
+ * An OCF module for determining the cost of crypto versus the cost of
+ * IPSec processing outside of OCF.  This modules gives us the effect of
+ * zero cost encryption,  of course you will need to run it at both ends
+ * since it does no crypto at all.
+ *
+ * Written by David McCullough <david_mccullough@securecomputing.com>
+ * Copyright (C) 2006-2007 David McCullough 
+ *
+ * LICENSE TERMS
+ *
+ * The free distribution and use of this software in both source and binary
+ * form is allowed (with or without changes) provided that:
+ *
+ *   1. distributions of this source code include the above copyright
+ *      notice, this list of conditions and the following disclaimer;
+ *
+ *   2. distributions in binary form include the above copyright
+ *      notice, this list of conditions and the following disclaimer
+ *      in the documentation and/or other associated materials;
+ *
+ *   3. the copyright holder's name is not used to endorse products
+ *      built using this software without specific written permission.
+ *
+ * ALTERNATIVELY, provided that this notice is retained in full, this product
+ * may be distributed under the terms of the GNU General Public License (GPL),
+ * in which case the provisions of the GPL apply INSTEAD OF those given above.
+ *
+ * DISCLAIMER
+ *
+ * This software is provided 'as is' with no explicit or implied warranties
+ * in respect of its properties, including, but not limited to, correctness
+ * and/or fitness for purpose.
+ */
+
+#ifndef AUTOCONF_INCLUDED
+#include <linux/config.h>
+#endif
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/list.h>
+#include <linux/slab.h>
+#include <linux/sched.h>
+#include <linux/wait.h>
+#include <linux/crypto.h>
+#include <linux/interrupt.h>
+
+#include <cryptodev.h>
+#include <uio.h>
+
+static int32_t			 null_id = -1;
+static u_int32_t		 null_sesnum = 0;
+
+static int null_process(device_t, struct cryptop *, int);
+static int null_newsession(device_t, u_int32_t *, struct cryptoini *);
+static int null_freesession(device_t, u_int64_t);
+
+#define debug ocfnull_debug
+int ocfnull_debug = 0;
+module_param(ocfnull_debug, int, 0644);
+MODULE_PARM_DESC(ocfnull_debug, "Enable debug");
+
+/*
+ * dummy device structure
+ */
+
+static struct {
+	softc_device_decl	sc_dev;
+} nulldev;
+
+static device_method_t null_methods = {
+	/* crypto device methods */
+	DEVMETHOD(cryptodev_newsession,	null_newsession),
+	DEVMETHOD(cryptodev_freesession,null_freesession),
+	DEVMETHOD(cryptodev_process,	null_process),
+};
+
+/*
+ * Generate a new software session.
+ */
+static int
+null_newsession(device_t arg, u_int32_t *sid, struct cryptoini *cri)
+{
+	dprintk("%s()\n", __FUNCTION__);
+	if (sid == NULL || cri == NULL) {
+		dprintk("%s,%d - EINVAL\n", __FILE__, __LINE__);
+		return EINVAL;
+	}
+
+	if (null_sesnum == 0)
+		null_sesnum++;
+	*sid = null_sesnum++;
+	return 0;
+}
+
+
+/*
+ * Free a session.
+ */
+static int
+null_freesession(device_t arg, u_int64_t tid)
+{
+	u_int32_t sid = CRYPTO_SESID2LID(tid);
+
+	dprintk("%s()\n", __FUNCTION__);
+	if (sid > null_sesnum) {
+		dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__);
+		return EINVAL;
+	}
+
+	/* Silently accept and return */
+	if (sid == 0)
+		return 0;
+	return 0;
+}
+
+
+/*
+ * Process a request.
+ */
+static int
+null_process(device_t arg, struct cryptop *crp, int hint)
+{
+	unsigned int lid;
+
+	dprintk("%s()\n", __FUNCTION__);
+
+	/* Sanity check */
+	if (crp == NULL) {
+		dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__);
+		return EINVAL;
+	}
+
+	crp->crp_etype = 0;
+
+	if (crp->crp_desc == NULL || crp->crp_buf == NULL) {
+		dprintk("%s,%d: EINVAL\n", __FILE__, __LINE__);
+		crp->crp_etype = EINVAL;
+		goto done;
+	}
+
+	/*
+	 * find the session we are using
+	 */
+
+	lid = crp->crp_sid & 0xffffffff;
+	if (lid >= null_sesnum || lid == 0) {
+		crp->crp_etype = ENOENT;
+		dprintk("%s,%d: ENOENT\n", __FILE__, __LINE__);
+		goto done;
+	}
+
+done:
+	crypto_done(crp);
+	return 0;
+}
+
+
+/*
+ * our driver startup and shutdown routines
+ */
+
+static int
+null_init(void)
+{
+	dprintk("%s(%p)\n", __FUNCTION__, null_init);
+
+	memset(&nulldev, 0, sizeof(nulldev));
+	softc_device_init(&nulldev, "ocfnull", 0, null_methods);
+
+	null_id = crypto_get_driverid(softc_get_device(&nulldev),
+				CRYPTOCAP_F_HARDWARE);
+	if (null_id < 0)
+		panic("ocfnull: crypto device cannot initialize!");
+
+#define	REGISTER(alg) \
+	crypto_register(null_id,alg,0,0)
+	REGISTER(CRYPTO_DES_CBC);
+	REGISTER(CRYPTO_3DES_CBC);
+	REGISTER(CRYPTO_RIJNDAEL128_CBC);
+	REGISTER(CRYPTO_MD5);
+	REGISTER(CRYPTO_SHA1);
+	REGISTER(CRYPTO_MD5_HMAC);
+	REGISTER(CRYPTO_SHA1_HMAC);
+#undef REGISTER
+
+	return 0;
+}
+
+static void
+null_exit(void)
+{
+	dprintk("%s()\n", __FUNCTION__);
+	crypto_unregister_all(null_id);
+	null_id = -1;
+}
+
+module_init(null_init);
+module_exit(null_exit);
+
+MODULE_LICENSE("Dual BSD/GPL");
+MODULE_AUTHOR("David McCullough <david_mccullough@securecomputing.com>");
+MODULE_DESCRIPTION("ocfnull - claims a lot but does nothing");
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/talitos/talitos.c
+++ linux-mvl-dove-2.6.32/crypto/ocf/talitos/talitos.c
@@ -0,0 +1,1359 @@
+/*
+ * crypto/ocf/talitos/talitos.c
+ *
+ * An OCF-Linux module that uses Freescale's SEC to do the crypto.
+ * Based on crypto/ocf/hifn and crypto/ocf/safe OCF drivers
+ *
+ * Copyright (c) 2006 Freescale Semiconductor, Inc.
+ *
+ * This code written by Kim A. B. Phillips <kim.phillips@freescale.com>
+ * some code copied from files with the following:
+ * Copyright (C) 2004-2007 David McCullough <david_mccullough@securecomputing.com
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ---------------------------------------------------------------------------
+ *
+ * NOTES:
+ *
+ * The Freescale SEC (also known as 'talitos') resides on the
+ * internal bus, and runs asynchronous to the processor core.  It has
+ * a wide gamut of cryptographic acceleration features, including single-
+ * pass IPsec (also known as algorithm chaining).  To properly utilize 
+ * all of the SEC's performance enhancing features, further reworking 
+ * of higher level code (framework, applications) will be necessary.
+ *
+ * The following table shows which SEC version is present in which devices:
+ * 
+ * Devices       SEC version
+ *
+ * 8272, 8248    SEC 1.0
+ * 885, 875      SEC 1.2
+ * 8555E, 8541E  SEC 2.0
+ * 8349E         SEC 2.01
+ * 8548E         SEC 2.1
+ *
+ * The following table shows the features offered by each SEC version:
+ *
+ * 	                       Max.   chan-
+ * version  Bus I/F       Clock  nels  DEU AESU AFEU MDEU PKEU RNG KEU
+ *
+ * SEC 1.0  internal 64b  100MHz   4     1    1    1    1    1   1   0
+ * SEC 1.2  internal 32b   66MHz   1     1    1    0    1    0   0   0
+ * SEC 2.0  internal 64b  166MHz   4     1    1    1    1    1   1   0
+ * SEC 2.01 internal 64b  166MHz   4     1    1    1    1    1   1   0
+ * SEC 2.1  internal 64b  333MHz   4     1    1    1    1    1   1   1
+ *
+ * Each execution unit in the SEC has two modes of execution; channel and
+ * slave/debug.  This driver employs the channel infrastructure in the
+ * device for convenience.  Only the RNG is directly accessed due to the
+ * convenience of its random fifo pool.  The relationship between the
+ * channels and execution units is depicted in the following diagram:
+ *
+ *    -------   ------------
+ * ---| ch0 |---|          |
+ *    -------   |          |
+ *              |          |------+-------+-------+-------+------------
+ *    -------   |          |      |       |       |       |           |
+ * ---| ch1 |---|          |      |       |       |       |           |
+ *    -------   |          |   ------  ------  ------  ------      ------
+ *              |controller|   |DEU |  |AESU|  |MDEU|  |PKEU| ...  |RNG |
+ *    -------   |          |   ------  ------  ------  ------      ------
+ * ---| ch2 |---|          |      |       |       |       |           |
+ *    -------   |          |      |       |       |       |           |
+ *              |          |------+-------+-------+-------+------------
+ *    -------   |          |
+ * ---| ch3 |---|          |
+ *    -------   ------------
+ *
+ * Channel ch0 may drive an aes operation to the aes unit (AESU),
+ * and, at the same time, ch1 may drive a message digest operation
+ * to the mdeu. Each channel has an input descriptor FIFO, and the 
+ * FIFO can contain, e.g. on the 8541E, up to 24 entries, before a
+ * a buffer overrun error is triggered. The controller is responsible
+ * for fetching the data from descriptor pointers, and passing the 
+ * data to the appropriate EUs. The controller also writes the 
+ * cryptographic operation's result to memory. The SEC notifies 
+ * completion by triggering an interrupt and/or setting the 1st byte 
+ * of the hdr field to 0xff.
+ *
+ * TODO:
+ * o support more algorithms
+ * o support more versions of the SEC
+ * o add support for linux 2.4
+ * o scatter-gather (sg) support
+ * o add support for public key ops (PKEU)
+ * o add statistics
+ */
+
+#ifndef AUTOCONF_INCLUDED
+#include <linux/config.h>
+#endif
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/spinlock.h>
+#include <linux/random.h>
+#include <linux/skbuff.h>
+#include <asm/scatterlist.h>
+#include <linux/dma-mapping.h>  /* dma_map_single() */
+#include <linux/moduleparam.h>
+
+#include <linux/version.h>
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,15)
+#include <linux/platform_device.h>
+#endif
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,19)
+#include <linux/of_platform.h>
+#endif
+
+#include <cryptodev.h>
+#include <uio.h>
+
+#define DRV_NAME "talitos" 
+
+#include "talitos_dev.h"
+#include "talitos_soft.h"
+
+#define read_random(p,l) get_random_bytes(p,l)
+
+const char talitos_driver_name[] = "Talitos OCF";
+const char talitos_driver_version[] = "0.2";
+
+static int talitos_newsession(device_t dev, u_int32_t *sidp,
+								struct cryptoini *cri);
+static int talitos_freesession(device_t dev, u_int64_t tid);
+static int talitos_process(device_t dev, struct cryptop *crp, int hint);
+static void dump_talitos_status(struct talitos_softc *sc);
+static int talitos_submit(struct talitos_softc *sc, struct talitos_desc *td, 
+								int chsel);
+static void talitos_doneprocessing(struct talitos_softc *sc);
+static void talitos_init_device(struct talitos_softc *sc);
+static void talitos_reset_device_master(struct talitos_softc *sc);
+static void talitos_reset_device(struct talitos_softc *sc);
+static void talitos_errorprocessing(struct talitos_softc *sc);
+#ifdef CONFIG_PPC_MERGE
+static int talitos_probe(struct of_device *ofdev, const struct of_device_id *match);
+static int talitos_remove(struct of_device *ofdev);
+#else
+static int talitos_probe(struct platform_device *pdev);
+static int talitos_remove(struct platform_device *pdev);
+#endif
+#ifdef CONFIG_OCF_RANDOMHARVEST
+static int talitos_read_random(void *arg, u_int32_t *buf, int maxwords);
+static void talitos_rng_init(struct talitos_softc *sc);
+#endif
+
+static device_method_t talitos_methods = {
+	/* crypto device methods */
+	DEVMETHOD(cryptodev_newsession,	talitos_newsession),
+	DEVMETHOD(cryptodev_freesession,talitos_freesession),
+	DEVMETHOD(cryptodev_process,	talitos_process),
+};
+
+#define debug talitos_debug
+int talitos_debug = 0;
+module_param(talitos_debug, int, 0644);
+MODULE_PARM_DESC(talitos_debug, "Enable debug");
+
+static inline void talitos_write(volatile unsigned *addr, u32 val)
+{
+        out_be32(addr, val);
+}
+
+static inline u32 talitos_read(volatile unsigned *addr)
+{
+        u32 val;
+        val = in_be32(addr);
+        return val;
+}
+
+static void dump_talitos_status(struct talitos_softc *sc)
+{
+	unsigned int v, v_hi, i, *ptr;
+	v = talitos_read(sc->sc_base_addr + TALITOS_MCR);
+	v_hi = talitos_read(sc->sc_base_addr + TALITOS_MCR_HI);
+	printk(KERN_INFO "%s: MCR          0x%08x_%08x\n",
+			device_get_nameunit(sc->sc_cdev), v, v_hi);
+	v = talitos_read(sc->sc_base_addr + TALITOS_IMR);
+	v_hi = talitos_read(sc->sc_base_addr + TALITOS_IMR_HI);
+	printk(KERN_INFO "%s: IMR          0x%08x_%08x\n",
+			device_get_nameunit(sc->sc_cdev), v, v_hi);
+	v = talitos_read(sc->sc_base_addr + TALITOS_ISR);
+	v_hi = talitos_read(sc->sc_base_addr + TALITOS_ISR_HI);
+	printk(KERN_INFO "%s: ISR          0x%08x_%08x\n",
+			device_get_nameunit(sc->sc_cdev), v, v_hi);
+	for (i = 0; i < sc->sc_num_channels; i++) { 
+		v = talitos_read(sc->sc_base_addr + i*TALITOS_CH_OFFSET + 
+			TALITOS_CH_CDPR);
+		v_hi = talitos_read(sc->sc_base_addr + i*TALITOS_CH_OFFSET + 
+			TALITOS_CH_CDPR_HI);
+		printk(KERN_INFO "%s: CDPR     ch%d 0x%08x_%08x\n", 
+				device_get_nameunit(sc->sc_cdev), i, v, v_hi);
+	}
+	for (i = 0; i < sc->sc_num_channels; i++) { 
+		v = talitos_read(sc->sc_base_addr + i*TALITOS_CH_OFFSET + 
+			TALITOS_CH_CCPSR);
+		v_hi = talitos_read(sc->sc_base_addr + i*TALITOS_CH_OFFSET + 
+			TALITOS_CH_CCPSR_HI);
+		printk(KERN_INFO "%s: CCPSR    ch%d 0x%08x_%08x\n", 
+				device_get_nameunit(sc->sc_cdev), i, v, v_hi);
+	}
+	ptr = sc->sc_base_addr + TALITOS_CH_DESCBUF;
+	for (i = 0; i < 16; i++) { 
+		v = talitos_read(ptr++); v_hi = talitos_read(ptr++);
+		printk(KERN_INFO "%s: DESCBUF  ch0 0x%08x_%08x (tdp%02d)\n", 
+				device_get_nameunit(sc->sc_cdev), v, v_hi, i);
+	}
+	return;
+}
+
+
+#ifdef CONFIG_OCF_RANDOMHARVEST
+/* 
+ * pull random numbers off the RNG FIFO, not exceeding amount available
+ */
+static int
+talitos_read_random(void *arg, u_int32_t *buf, int maxwords)
+{
+	struct talitos_softc *sc = (struct talitos_softc *) arg;
+	int rc;
+	u_int32_t v;
+
+	DPRINTF("%s()\n", __FUNCTION__);
+
+	/* check for things like FIFO underflow */
+	v = talitos_read(sc->sc_base_addr + TALITOS_RNGISR_HI);
+	if (unlikely(v)) {
+		printk(KERN_ERR "%s: RNGISR_HI error %08x\n",
+				device_get_nameunit(sc->sc_cdev), v);
+		return 0;
+	}
+	/*
+	 * OFL is number of available 64-bit words, 
+	 * shift and convert to a 32-bit word count
+	 */
+	v = talitos_read(sc->sc_base_addr + TALITOS_RNGSR_HI);
+	v = (v & TALITOS_RNGSR_HI_OFL) >> (16 - 1);
+	if (maxwords > v)
+		maxwords = v;
+	for (rc = 0; rc < maxwords; rc++) {
+		buf[rc] = talitos_read(sc->sc_base_addr + 
+			TALITOS_RNG_FIFO + rc*sizeof(u_int32_t));
+	}
+	if (maxwords & 1) {
+		/* 
+		 * RNG will complain with an AE in the RNGISR
+		 * if we don't complete the pairs of 32-bit reads
+		 * to its 64-bit register based FIFO
+		 */
+		v = talitos_read(sc->sc_base_addr + 
+			TALITOS_RNG_FIFO + rc*sizeof(u_int32_t));
+	}
+
+	return rc;
+}
+
+static void
+talitos_rng_init(struct talitos_softc *sc)
+{
+	u_int32_t v;
+
+	DPRINTF("%s()\n", __FUNCTION__);
+	/* reset RNG EU */
+	v = talitos_read(sc->sc_base_addr + TALITOS_RNGRCR_HI);
+	v |= TALITOS_RNGRCR_HI_SR;
+	talitos_write(sc->sc_base_addr + TALITOS_RNGRCR_HI, v);
+	while ((talitos_read(sc->sc_base_addr + TALITOS_RNGSR_HI) 
+		& TALITOS_RNGSR_HI_RD) == 0)
+			cpu_relax();
+	/*
+	 * we tell the RNG to start filling the RNG FIFO
+	 * by writing the RNGDSR 
+	 */
+	v = talitos_read(sc->sc_base_addr + TALITOS_RNGDSR_HI);
+	talitos_write(sc->sc_base_addr + TALITOS_RNGDSR_HI, v);
+	/*
+	 * 64 bits of data will be pushed onto the FIFO every 
+	 * 256 SEC cycles until the FIFO is full.  The RNG then 
+	 * attempts to keep the FIFO full.
+	 */
+	v = talitos_read(sc->sc_base_addr + TALITOS_RNGISR_HI);
+	if (v) {
+		printk(KERN_ERR "%s: RNGISR_HI error %08x\n",
+			device_get_nameunit(sc->sc_cdev), v);
+		return;
+	}
+	/*
+	 * n.b. we need to add a FIPS test here - if the RNG is going 
+	 * to fail, it's going to fail at reset time
+	 */
+	return;
+}
+#endif /* CONFIG_OCF_RANDOMHARVEST */
+
+/*
+ * Generate a new software session.
+ */
+static int
+talitos_newsession(device_t dev, u_int32_t *sidp, struct cryptoini *cri)
+{
+	struct cryptoini *c, *encini = NULL, *macini = NULL;
+	struct talitos_softc *sc = device_get_softc(dev);
+	struct talitos_session *ses = NULL;
+	int sesn;
+
+	DPRINTF("%s()\n", __FUNCTION__);
+	if (sidp == NULL || cri == NULL || sc == NULL) {
+		DPRINTF("%s,%d - EINVAL\n", __FILE__, __LINE__);
+		return EINVAL;
+	}
+	for (c = cri; c != NULL; c = c->cri_next) {
+		if (c->cri_alg == CRYPTO_MD5 ||
+		    c->cri_alg == CRYPTO_MD5_HMAC ||
+		    c->cri_alg == CRYPTO_SHA1 ||
+		    c->cri_alg == CRYPTO_SHA1_HMAC ||
+		    c->cri_alg == CRYPTO_NULL_HMAC) {
+			if (macini)
+				return EINVAL;
+			macini = c;
+		} else if (c->cri_alg == CRYPTO_DES_CBC ||
+		    c->cri_alg == CRYPTO_3DES_CBC ||
+		    c->cri_alg == CRYPTO_AES_CBC ||
+		    c->cri_alg == CRYPTO_NULL_CBC) {
+			if (encini)
+				return EINVAL;
+			encini = c;
+		} else {
+			DPRINTF("UNKNOWN c->cri_alg %d\n", encini->cri_alg);
+			return EINVAL;
+		}
+	}
+	if (encini == NULL && macini == NULL)
+		return EINVAL;
+	if (encini) {	
+		/* validate key length */
+		switch (encini->cri_alg) {
+		case CRYPTO_DES_CBC:
+			if (encini->cri_klen != 64)
+				return EINVAL;
+			break;
+		case CRYPTO_3DES_CBC:
+			if (encini->cri_klen != 192) {
+				return EINVAL;
+			}
+			break;
+		case CRYPTO_AES_CBC:
+			if (encini->cri_klen != 128 &&
+			    encini->cri_klen != 192 &&
+			    encini->cri_klen != 256)
+				return EINVAL;
+			break;
+		default:
+			DPRINTF("UNKNOWN encini->cri_alg %d\n", 
+				encini->cri_alg);
+			return EINVAL;
+		}
+	}
+
+	if (sc->sc_sessions == NULL) {
+		ses = sc->sc_sessions = (struct talitos_session *)
+			kmalloc(sizeof(struct talitos_session), SLAB_ATOMIC);
+		if (ses == NULL)
+			return ENOMEM;
+		memset(ses, 0, sizeof(struct talitos_session));
+		sesn = 0;
+		sc->sc_nsessions = 1;
+	} else {
+		for (sesn = 0; sesn < sc->sc_nsessions; sesn++) {
+			if (sc->sc_sessions[sesn].ses_used == 0) {
+				ses = &sc->sc_sessions[sesn];
+				break;
+			}
+		}
+
+		if (ses == NULL) {
+			/* allocating session */
+			sesn = sc->sc_nsessions;
+			ses = (struct talitos_session *) kmalloc(
+				(sesn + 1) * sizeof(struct talitos_session), 
+				SLAB_ATOMIC);
+			if (ses == NULL)
+				return ENOMEM;
+			memset(ses, 0,
+				(sesn + 1) * sizeof(struct talitos_session));
+			memcpy(ses, sc->sc_sessions, 
+				sesn * sizeof(struct talitos_session));
+			memset(sc->sc_sessions, 0,
+				sesn * sizeof(struct talitos_session));
+			kfree(sc->sc_sessions);
+			sc->sc_sessions = ses;
+			ses = &sc->sc_sessions[sesn];
+			sc->sc_nsessions++;
+		}
+	}
+
+	ses->ses_used = 1;
+
+	if (encini) {
+		/* get an IV */
+		/* XXX may read fewer than requested */
+		read_random(ses->ses_iv, sizeof(ses->ses_iv));
+
+		ses->ses_klen = (encini->cri_klen + 7) / 8;
+		memcpy(ses->ses_key, encini->cri_key, ses->ses_klen);
+		if (macini) {
+			/* doing hash on top of cipher */
+			ses->ses_hmac_len = (macini->cri_klen + 7) / 8;
+			memcpy(ses->ses_hmac, macini->cri_key,
+				ses->ses_hmac_len);
+		}
+	} else if (macini) {
+		/* doing hash */
+		ses->ses_klen = (macini->cri_klen + 7) / 8;
+		memcpy(ses->ses_key, macini->cri_key, ses->ses_klen);
+	}
+
+	/* back compat way of determining MSC result len */
+	if (macini) {
+		ses->ses_mlen = macini->cri_mlen;
+		if (ses->ses_mlen == 0) {
+			if (macini->cri_alg == CRYPTO_MD5_HMAC)
+				ses->ses_mlen = MD5_HASH_LEN;
+			else
+				ses->ses_mlen = SHA1_HASH_LEN;
+		}
+	}
+
+	/* really should make up a template td here, 
+	 * and only fill things like i/o and direction in process() */
+
+	/* assign session ID */
+	*sidp = TALITOS_SID(sc->sc_num, sesn);
+	return 0;
+}
+
+/*
+ * Deallocate a session.
+ */
+static int
+talitos_freesession(device_t dev, u_int64_t tid)
+{
+	struct talitos_softc *sc = device_get_softc(dev);
+	int session, ret;
+	u_int32_t sid = ((u_int32_t) tid) & 0xffffffff;
+
+	if (sc == NULL)
+		return EINVAL;
+	session = TALITOS_SESSION(sid);
+	if (session < sc->sc_nsessions) {
+		memset(&sc->sc_sessions[session], 0,
+			sizeof(sc->sc_sessions[session]));
+		ret = 0;
+	} else
+		ret = EINVAL;
+	return ret;
+}
+
+/*
+ * launch device processing - it will come back with done notification 
+ * in the form of an interrupt and/or HDR_DONE_BITS in header 
+ */
+static int 
+talitos_submit(
+	struct talitos_softc *sc,
+	struct talitos_desc *td,
+	int chsel)
+{
+	u_int32_t v;
+
+	v = dma_map_single(NULL, td, sizeof(*td), DMA_TO_DEVICE);
+	talitos_write(sc->sc_base_addr + 
+		chsel*TALITOS_CH_OFFSET + TALITOS_CH_FF, 0);
+	talitos_write(sc->sc_base_addr + 
+		chsel*TALITOS_CH_OFFSET + TALITOS_CH_FF_HI, v);
+	return 0;
+}
+
+static int
+talitos_process(device_t dev, struct cryptop *crp, int hint)
+{
+	int i, err = 0, ivsize;
+	struct talitos_softc *sc = device_get_softc(dev);
+	struct cryptodesc *crd1, *crd2, *maccrd, *enccrd;
+	caddr_t iv;
+	struct talitos_session *ses;
+	struct talitos_desc *td;
+	unsigned long flags;
+	/* descriptor mappings */
+	int hmac_key, hmac_data, cipher_iv, cipher_key, 
+		in_fifo, out_fifo, cipher_iv_out;
+	static int chsel = -1;
+
+	DPRINTF("%s()\n", __FUNCTION__);
+
+	if (crp == NULL || crp->crp_callback == NULL || sc == NULL) {
+		return EINVAL;
+	}
+	crp->crp_etype = 0;
+	if (TALITOS_SESSION(crp->crp_sid) >= sc->sc_nsessions) {
+		return EINVAL;
+	}
+
+	ses = &sc->sc_sessions[TALITOS_SESSION(crp->crp_sid)];
+
+        /* enter the channel scheduler */ 
+	spin_lock_irqsave(&sc->sc_chnfifolock[sc->sc_num_channels], flags);
+
+	/* reuse channel that already had/has requests for the required EU */
+	for (i = 0; i < sc->sc_num_channels; i++) {
+		if (sc->sc_chnlastalg[i] == crp->crp_desc->crd_alg)
+			break;
+	}
+	if (i == sc->sc_num_channels) {
+		/*
+		 * haven't seen this algo the last sc_num_channels or more
+		 * use round robin in this case
+	 	 * nb: sc->sc_num_channels must be power of 2 
+		 */
+		chsel = (chsel + 1) & (sc->sc_num_channels - 1);
+	} else {
+		/*
+		 * matches channel with same target execution unit; 
+		 * use same channel in this case
+		 */
+		chsel = i;
+	}
+	sc->sc_chnlastalg[chsel] = crp->crp_desc->crd_alg;
+
+        /* release the channel scheduler lock */ 
+	spin_unlock_irqrestore(&sc->sc_chnfifolock[sc->sc_num_channels], flags);
+
+	/* acquire the selected channel fifo lock */
+	spin_lock_irqsave(&sc->sc_chnfifolock[chsel], flags);
+
+	/* find and reserve next available descriptor-cryptop pair */
+	for (i = 0; i < sc->sc_chfifo_len; i++) {
+		if (sc->sc_chnfifo[chsel][i].cf_desc.hdr == 0) {
+			/* 
+			 * ensure correct descriptor formation by
+			 * avoiding inadvertently setting "optional" entries
+			 * e.g. not using "optional" dptr2 for MD/HMAC descs
+			 */
+			memset(&sc->sc_chnfifo[chsel][i].cf_desc,
+				0, sizeof(*td));
+			/* reserve it with done notification request bit */
+			sc->sc_chnfifo[chsel][i].cf_desc.hdr |= 
+				TALITOS_DONE_NOTIFY;
+			break;
+		}
+	}
+	spin_unlock_irqrestore(&sc->sc_chnfifolock[chsel], flags);
+
+	if (i == sc->sc_chfifo_len) {
+		/* fifo full */
+		err = ERESTART;
+		goto errout;
+	}
+	
+	td = &sc->sc_chnfifo[chsel][i].cf_desc;
+	sc->sc_chnfifo[chsel][i].cf_crp = crp;
+
+	crd1 = crp->crp_desc;
+	if (crd1 == NULL) {
+		err = EINVAL;
+		goto errout;
+	}
+	crd2 = crd1->crd_next;
+	/* prevent compiler warning */
+	hmac_key = 0;
+	hmac_data = 0;
+	if (crd2 == NULL) {
+		td->hdr |= TD_TYPE_COMMON_NONSNOOP_NO_AFEU;
+		/* assign descriptor dword ptr mappings for this desc. type */
+		cipher_iv = 1;
+		cipher_key = 2;
+		in_fifo = 3;
+		cipher_iv_out = 5;
+		if (crd1->crd_alg == CRYPTO_MD5_HMAC ||
+		    crd1->crd_alg == CRYPTO_SHA1_HMAC ||
+		    crd1->crd_alg == CRYPTO_SHA1 ||
+		    crd1->crd_alg == CRYPTO_MD5) {
+			out_fifo = 5;
+			maccrd = crd1;
+			enccrd = NULL;
+		} else if (crd1->crd_alg == CRYPTO_DES_CBC ||
+		    crd1->crd_alg == CRYPTO_3DES_CBC ||
+		    crd1->crd_alg == CRYPTO_AES_CBC ||
+		    crd1->crd_alg == CRYPTO_ARC4) {
+			out_fifo = 4;
+			maccrd = NULL;
+			enccrd = crd1;
+		} else {
+			DPRINTF("UNKNOWN crd1->crd_alg %d\n", crd1->crd_alg);
+			err = EINVAL;
+			goto errout;
+		}
+	} else {
+		if (sc->sc_desc_types & TALITOS_HAS_DT_IPSEC_ESP) {
+			td->hdr |= TD_TYPE_IPSEC_ESP;
+		} else {
+			DPRINTF("unimplemented: multiple descriptor ipsec\n");
+			err = EINVAL;
+			goto errout;
+		}
+		/* assign descriptor dword ptr mappings for this desc. type */
+		hmac_key = 0;
+		hmac_data = 1;
+		cipher_iv = 2;
+		cipher_key = 3;
+		in_fifo = 4;
+		out_fifo = 5;
+		cipher_iv_out = 6;
+		if ((crd1->crd_alg == CRYPTO_MD5_HMAC ||
+                     crd1->crd_alg == CRYPTO_SHA1_HMAC ||
+                     crd1->crd_alg == CRYPTO_MD5 ||
+                     crd1->crd_alg == CRYPTO_SHA1) &&
+		    (crd2->crd_alg == CRYPTO_DES_CBC ||
+		     crd2->crd_alg == CRYPTO_3DES_CBC ||
+		     crd2->crd_alg == CRYPTO_AES_CBC ||
+		     crd2->crd_alg == CRYPTO_ARC4) &&
+		    ((crd2->crd_flags & CRD_F_ENCRYPT) == 0)) {
+			maccrd = crd1;
+			enccrd = crd2;
+		} else if ((crd1->crd_alg == CRYPTO_DES_CBC ||
+		     crd1->crd_alg == CRYPTO_ARC4 ||
+		     crd1->crd_alg == CRYPTO_3DES_CBC ||
+		     crd1->crd_alg == CRYPTO_AES_CBC) &&
+		    (crd2->crd_alg == CRYPTO_MD5_HMAC ||
+                     crd2->crd_alg == CRYPTO_SHA1_HMAC ||
+                     crd2->crd_alg == CRYPTO_MD5 ||
+                     crd2->crd_alg == CRYPTO_SHA1) &&
+		    (crd1->crd_flags & CRD_F_ENCRYPT)) {
+			enccrd = crd1;
+			maccrd = crd2;
+		} else {
+			/* We cannot order the SEC as requested */
+			printk("%s: cannot do the order\n",
+					device_get_nameunit(sc->sc_cdev));
+			err = EINVAL;
+			goto errout;
+		}
+	}
+	/* assign in_fifo and out_fifo based on input/output struct type */
+	if (crp->crp_flags & CRYPTO_F_SKBUF) {
+		/* using SKB buffers */
+		struct sk_buff *skb = (struct sk_buff *)crp->crp_buf;
+		if (skb_shinfo(skb)->nr_frags) {
+			printk("%s: skb frags unimplemented\n",
+					device_get_nameunit(sc->sc_cdev));
+			err = EINVAL;
+			goto errout;
+		}
+		td->ptr[in_fifo].ptr = dma_map_single(NULL, skb->data, 
+			skb->len, DMA_TO_DEVICE);
+		td->ptr[in_fifo].len = skb->len;
+		td->ptr[out_fifo].ptr = dma_map_single(NULL, skb->data, 
+			skb->len, DMA_TO_DEVICE);
+		td->ptr[out_fifo].len = skb->len;
+		td->ptr[hmac_data].ptr = dma_map_single(NULL, skb->data,
+			skb->len, DMA_TO_DEVICE);
+	} else if (crp->crp_flags & CRYPTO_F_IOV) {
+		/* using IOV buffers */
+		struct uio *uiop = (struct uio *)crp->crp_buf;
+		if (uiop->uio_iovcnt > 1) {
+			printk("%s: iov frags unimplemented\n",
+					device_get_nameunit(sc->sc_cdev));
+			err = EINVAL;
+			goto errout;
+		}
+		td->ptr[in_fifo].ptr = dma_map_single(NULL,
+			uiop->uio_iov->iov_base, crp->crp_ilen, DMA_TO_DEVICE);
+		td->ptr[in_fifo].len = crp->crp_ilen;
+		/* crp_olen is never set; always use crp_ilen */
+		td->ptr[out_fifo].ptr = dma_map_single(NULL,
+			uiop->uio_iov->iov_base,
+			crp->crp_ilen, DMA_TO_DEVICE);
+		td->ptr[out_fifo].len = crp->crp_ilen;
+	} else {
+		/* using contig buffers */
+		td->ptr[in_fifo].ptr = dma_map_single(NULL,
+			crp->crp_buf, crp->crp_ilen, DMA_TO_DEVICE);
+		td->ptr[in_fifo].len = crp->crp_ilen;
+		td->ptr[out_fifo].ptr = dma_map_single(NULL,
+			crp->crp_buf, crp->crp_ilen, DMA_TO_DEVICE);
+		td->ptr[out_fifo].len = crp->crp_ilen;
+	}
+	if (enccrd) {
+		switch (enccrd->crd_alg) {
+		case CRYPTO_3DES_CBC:
+			td->hdr |= TALITOS_MODE0_DEU_3DES;
+			/* FALLTHROUGH */
+		case CRYPTO_DES_CBC:
+			td->hdr |= TALITOS_SEL0_DEU
+				|  TALITOS_MODE0_DEU_CBC;
+			if (enccrd->crd_flags & CRD_F_ENCRYPT)
+				td->hdr |= TALITOS_MODE0_DEU_ENC;
+			ivsize = 2*sizeof(u_int32_t);
+			DPRINTF("%cDES ses %d ch %d len %d\n",
+				(td->hdr & TALITOS_MODE0_DEU_3DES)?'3':'1',
+				(u32)TALITOS_SESSION(crp->crp_sid),
+				chsel, td->ptr[in_fifo].len);
+			break;
+		case CRYPTO_AES_CBC:
+			td->hdr |= TALITOS_SEL0_AESU
+				|  TALITOS_MODE0_AESU_CBC;
+			if (enccrd->crd_flags & CRD_F_ENCRYPT)
+				td->hdr |= TALITOS_MODE0_AESU_ENC;
+			ivsize = 4*sizeof(u_int32_t);
+			DPRINTF("AES  ses %d ch %d len %d\n",
+				(u32)TALITOS_SESSION(crp->crp_sid),
+				chsel, td->ptr[in_fifo].len);
+			break;
+		default:
+			printk("%s: unimplemented enccrd->crd_alg %d\n",
+					device_get_nameunit(sc->sc_cdev), enccrd->crd_alg);
+			err = EINVAL;
+			goto errout;
+		}
+		/*
+		 * Setup encrypt/decrypt state.  When using basic ops
+		 * we can't use an inline IV because hash/crypt offset
+		 * must be from the end of the IV to the start of the
+		 * crypt data and this leaves out the preceding header
+		 * from the hash calculation.  Instead we place the IV
+		 * in the state record and set the hash/crypt offset to
+		 * copy both the header+IV.
+		 */
+		if (enccrd->crd_flags & CRD_F_ENCRYPT) {
+			td->hdr |= TALITOS_DIR_OUTBOUND; 
+			if (enccrd->crd_flags & CRD_F_IV_EXPLICIT)
+				iv = enccrd->crd_iv;
+			else
+				iv = (caddr_t) ses->ses_iv;
+			if ((enccrd->crd_flags & CRD_F_IV_PRESENT) == 0) {
+				crypto_copyback(crp->crp_flags, crp->crp_buf,
+				    enccrd->crd_inject, ivsize, iv);
+			}
+		} else {
+			td->hdr |= TALITOS_DIR_INBOUND; 
+			if (enccrd->crd_flags & CRD_F_IV_EXPLICIT) {
+				iv = enccrd->crd_iv;
+				bcopy(enccrd->crd_iv, iv, ivsize);
+			} else {
+				iv = (caddr_t) ses->ses_iv;
+				crypto_copydata(crp->crp_flags, crp->crp_buf,
+				    enccrd->crd_inject, ivsize, iv);
+			}
+		}
+		td->ptr[cipher_iv].ptr = dma_map_single(NULL, iv, ivsize, 
+			DMA_TO_DEVICE);
+		td->ptr[cipher_iv].len = ivsize;
+		/*
+		 * we don't need the cipher iv out length/pointer
+		 * field to do ESP IPsec. Therefore we set the len field as 0,
+		 * which tells the SEC not to do anything with this len/ptr
+		 * field. Previously, when length/pointer as pointing to iv,
+		 * it gave us corruption of packets.
+		 */
+		td->ptr[cipher_iv_out].len = 0;
+	}
+	if (enccrd && maccrd) {
+		/* this is ipsec only for now */
+		td->hdr |= TALITOS_SEL1_MDEU
+			|  TALITOS_MODE1_MDEU_INIT
+			|  TALITOS_MODE1_MDEU_PAD;
+		switch (maccrd->crd_alg) {
+			case	CRYPTO_MD5:	
+				td->hdr |= TALITOS_MODE1_MDEU_MD5;
+				break;
+			case	CRYPTO_MD5_HMAC:	
+				td->hdr |= TALITOS_MODE1_MDEU_MD5_HMAC;
+				break;
+			case	CRYPTO_SHA1:	
+				td->hdr |= TALITOS_MODE1_MDEU_SHA1;
+				break;
+			case	CRYPTO_SHA1_HMAC:	
+				td->hdr |= TALITOS_MODE1_MDEU_SHA1_HMAC;
+				break;
+			default:
+				/* We cannot order the SEC as requested */
+				printk("%s: cannot do the order\n",
+						device_get_nameunit(sc->sc_cdev));
+				err = EINVAL;
+				goto errout;
+		}
+		if ((maccrd->crd_alg == CRYPTO_MD5_HMAC) ||
+		   (maccrd->crd_alg == CRYPTO_SHA1_HMAC)) {
+			/*
+			 * The offset from hash data to the start of
+			 * crypt data is the difference in the skips.
+			 */
+			/* ipsec only for now */
+			td->ptr[hmac_key].ptr = dma_map_single(NULL, 
+				ses->ses_hmac, ses->ses_hmac_len, DMA_TO_DEVICE);
+			td->ptr[hmac_key].len = ses->ses_hmac_len;
+			td->ptr[in_fifo].ptr  += enccrd->crd_skip;
+			td->ptr[in_fifo].len  =  enccrd->crd_len;
+			td->ptr[out_fifo].ptr += enccrd->crd_skip;
+			td->ptr[out_fifo].len =  enccrd->crd_len;
+			/* bytes of HMAC to postpend to ciphertext */
+			td->ptr[out_fifo].extent =  ses->ses_mlen;
+			td->ptr[hmac_data].ptr += maccrd->crd_skip; 
+			td->ptr[hmac_data].len = enccrd->crd_skip - maccrd->crd_skip;
+		}
+		if (enccrd->crd_flags & CRD_F_KEY_EXPLICIT) {
+			printk("%s: CRD_F_KEY_EXPLICIT unimplemented\n",
+					device_get_nameunit(sc->sc_cdev));
+		}
+	}
+	if (!enccrd && maccrd) {
+		/* single MD5 or SHA */
+		td->hdr |= TALITOS_SEL0_MDEU
+				|  TALITOS_MODE0_MDEU_INIT
+				|  TALITOS_MODE0_MDEU_PAD;
+		switch (maccrd->crd_alg) {
+			case	CRYPTO_MD5:	
+				td->hdr |= TALITOS_MODE0_MDEU_MD5;
+				DPRINTF("MD5  ses %d ch %d len %d\n",
+					(u32)TALITOS_SESSION(crp->crp_sid), 
+					chsel, td->ptr[in_fifo].len);
+				break;
+			case	CRYPTO_MD5_HMAC:	
+				td->hdr |= TALITOS_MODE0_MDEU_MD5_HMAC;
+				break;
+			case	CRYPTO_SHA1:	
+				td->hdr |= TALITOS_MODE0_MDEU_SHA1;
+				DPRINTF("SHA1 ses %d ch %d len %d\n",
+					(u32)TALITOS_SESSION(crp->crp_sid), 
+					chsel, td->ptr[in_fifo].len);
+				break;
+			case	CRYPTO_SHA1_HMAC:	
+				td->hdr |= TALITOS_MODE0_MDEU_SHA1_HMAC;
+				break;
+			default:
+				/* We cannot order the SEC as requested */
+				DPRINTF("cannot do the order\n");
+				err = EINVAL;
+				goto errout;
+		}
+
+		if (crp->crp_flags & CRYPTO_F_IOV)
+			td->ptr[out_fifo].ptr += maccrd->crd_inject;
+
+		if ((maccrd->crd_alg == CRYPTO_MD5_HMAC) ||
+		   (maccrd->crd_alg == CRYPTO_SHA1_HMAC)) {
+			td->ptr[hmac_key].ptr = dma_map_single(NULL, 
+				ses->ses_hmac, ses->ses_hmac_len, 
+				DMA_TO_DEVICE);
+			td->ptr[hmac_key].len = ses->ses_hmac_len;
+		}
+	} 
+	else {
+		/* using process key (session data has duplicate) */
+		td->ptr[cipher_key].ptr = dma_map_single(NULL, 
+			enccrd->crd_key, (enccrd->crd_klen + 7) / 8, 
+			DMA_TO_DEVICE);
+		td->ptr[cipher_key].len = (enccrd->crd_klen + 7) / 8;
+	}
+	/* descriptor complete - GO! */
+	return talitos_submit(sc, td, chsel);
+
+errout:
+	if (err != ERESTART) {
+		crp->crp_etype = err;
+		crypto_done(crp);
+	}
+	return err;
+}
+
+/* go through all channels descriptors, notifying OCF what has 
+ * _and_hasn't_ successfully completed and reset the device 
+ * (otherwise it's up to decoding desc hdrs!)
+ */
+static void talitos_errorprocessing(struct talitos_softc *sc)
+{
+	unsigned long flags;
+	int i, j;
+
+	/* disable further scheduling until under control */
+	spin_lock_irqsave(&sc->sc_chnfifolock[sc->sc_num_channels], flags);
+
+	if (debug) dump_talitos_status(sc);
+	/* go through descriptors, try and salvage those successfully done, 
+	 * and EIO those that weren't
+	 */
+	for (i = 0; i < sc->sc_num_channels; i++) {
+		spin_lock_irqsave(&sc->sc_chnfifolock[i], flags);
+		for (j = 0; j < sc->sc_chfifo_len; j++) {
+			if (sc->sc_chnfifo[i][j].cf_desc.hdr) {
+				if ((sc->sc_chnfifo[i][j].cf_desc.hdr 
+					& TALITOS_HDR_DONE_BITS) 
+					!= TALITOS_HDR_DONE_BITS) {
+					/* this one didn't finish */
+					/* signify in crp->etype */
+					sc->sc_chnfifo[i][j].cf_crp->crp_etype 
+						= EIO;
+				}
+			} else
+				continue; /* free entry */
+			/* either way, notify ocf */
+			crypto_done(sc->sc_chnfifo[i][j].cf_crp);
+			/* and tag it available again
+			 *
+			 * memset to ensure correct descriptor formation by
+			 * avoiding inadvertently setting "optional" entries
+			 * e.g. not using "optional" dptr2 MD/HMAC processing
+			 */
+			memset(&sc->sc_chnfifo[i][j].cf_desc,
+				0, sizeof(struct talitos_desc));
+		}
+		spin_unlock_irqrestore(&sc->sc_chnfifolock[i], flags);
+	}
+	/* reset and initialize the SEC h/w device */
+	talitos_reset_device(sc);
+	talitos_init_device(sc);
+#ifdef CONFIG_OCF_RANDOMHARVEST
+	if (sc->sc_exec_units & TALITOS_HAS_EU_RNG)
+		talitos_rng_init(sc);
+#endif
+
+	/* Okay. Stand by. */
+	spin_unlock_irqrestore(&sc->sc_chnfifolock[sc->sc_num_channels], flags);
+
+	return;
+}
+
+/* go through all channels descriptors, notifying OCF what's been done */
+static void talitos_doneprocessing(struct talitos_softc *sc)
+{
+	unsigned long flags;
+	int i, j;
+
+	/* go through descriptors looking for done bits */
+	for (i = 0; i < sc->sc_num_channels; i++) {
+		spin_lock_irqsave(&sc->sc_chnfifolock[i], flags);
+		for (j = 0; j < sc->sc_chfifo_len; j++) {
+			/* descriptor has done bits set? */
+			if ((sc->sc_chnfifo[i][j].cf_desc.hdr 
+				& TALITOS_HDR_DONE_BITS) 
+				== TALITOS_HDR_DONE_BITS) {
+				/* notify ocf */
+				crypto_done(sc->sc_chnfifo[i][j].cf_crp);
+				/* and tag it available again
+				 *
+				 * memset to ensure correct descriptor formation by
+				 * avoiding inadvertently setting "optional" entries
+				 * e.g. not using "optional" dptr2 MD/HMAC processing
+				 */
+				memset(&sc->sc_chnfifo[i][j].cf_desc,
+					0, sizeof(struct talitos_desc));
+			}
+		}
+		spin_unlock_irqrestore(&sc->sc_chnfifolock[i], flags);
+	}
+	return;
+}
+
+static irqreturn_t
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,19)
+talitos_intr(int irq, void *arg)
+#else
+talitos_intr(int irq, void *arg, struct pt_regs *regs)
+#endif
+{
+	struct talitos_softc *sc = arg;
+	u_int32_t v, v_hi;
+	
+	/* ack */
+	v = talitos_read(sc->sc_base_addr + TALITOS_ISR);
+	v_hi = talitos_read(sc->sc_base_addr + TALITOS_ISR_HI);
+	talitos_write(sc->sc_base_addr + TALITOS_ICR, v);
+	talitos_write(sc->sc_base_addr + TALITOS_ICR_HI, v_hi);
+
+	if (unlikely(v & TALITOS_ISR_ERROR)) {
+		/* Okay, Houston, we've had a problem here. */
+		printk(KERN_DEBUG "%s: got error interrupt - ISR 0x%08x_%08x\n",
+				device_get_nameunit(sc->sc_cdev), v, v_hi);
+		talitos_errorprocessing(sc);
+	} else
+	if (likely(v & TALITOS_ISR_DONE)) {
+		talitos_doneprocessing(sc);
+	}
+	return IRQ_HANDLED;
+}
+
+/*
+ * Initialize registers we need to touch only once.
+ */
+static void
+talitos_init_device(struct talitos_softc *sc)
+{
+	u_int32_t v;
+	int i;
+
+	DPRINTF("%s()\n", __FUNCTION__);
+
+	/* init all channels */
+	for (i = 0; i < sc->sc_num_channels; i++) {
+		v = talitos_read(sc->sc_base_addr + 
+			i*TALITOS_CH_OFFSET + TALITOS_CH_CCCR_HI);
+		v |= TALITOS_CH_CCCR_HI_CDWE
+		  |  TALITOS_CH_CCCR_HI_CDIE;  /* invoke interrupt if done */
+		talitos_write(sc->sc_base_addr + 
+			i*TALITOS_CH_OFFSET + TALITOS_CH_CCCR_HI, v);
+	}
+	/* enable all interrupts */
+	v = talitos_read(sc->sc_base_addr + TALITOS_IMR);
+	v |= TALITOS_IMR_ALL;
+	talitos_write(sc->sc_base_addr + TALITOS_IMR, v);
+	v = talitos_read(sc->sc_base_addr + TALITOS_IMR_HI);
+	v |= TALITOS_IMR_HI_ERRONLY;
+	talitos_write(sc->sc_base_addr + TALITOS_IMR_HI, v);
+	return;
+}
+
+/*
+ * set the master reset bit on the device.
+ */
+static void
+talitos_reset_device_master(struct talitos_softc *sc)
+{
+	u_int32_t v;
+
+	/* Reset the device by writing 1 to MCR:SWR and waiting 'til cleared */
+	v = talitos_read(sc->sc_base_addr + TALITOS_MCR);
+	talitos_write(sc->sc_base_addr + TALITOS_MCR, v | TALITOS_MCR_SWR);
+
+	while (talitos_read(sc->sc_base_addr + TALITOS_MCR) & TALITOS_MCR_SWR)
+		cpu_relax();
+
+	return;
+}
+
+/*
+ * Resets the device.  Values in the registers are left as is
+ * from the reset (i.e. initial values are assigned elsewhere).
+ */
+static void
+talitos_reset_device(struct talitos_softc *sc)
+{
+	u_int32_t v;
+	int i;
+
+	DPRINTF("%s()\n", __FUNCTION__);
+
+	/*
+	 * Master reset
+	 * errata documentation: warning: certain SEC interrupts 
+	 * are not fully cleared by writing the MCR:SWR bit, 
+	 * set bit twice to completely reset 
+	 */
+	talitos_reset_device_master(sc);	/* once */
+	talitos_reset_device_master(sc);	/* and once again */
+	
+	/* reset all channels */
+	for (i = 0; i < sc->sc_num_channels; i++) {
+		v = talitos_read(sc->sc_base_addr + i*TALITOS_CH_OFFSET +
+			TALITOS_CH_CCCR);
+		talitos_write(sc->sc_base_addr + i*TALITOS_CH_OFFSET +
+			TALITOS_CH_CCCR, v | TALITOS_CH_CCCR_RESET);
+	}
+}
+
+/* Set up the crypto device structure, private data,
+ * and anything else we need before we start */
+#ifdef CONFIG_PPC_MERGE
+static int talitos_probe(struct of_device *ofdev, const struct of_device_id *match)
+#else
+static int talitos_probe(struct platform_device *pdev)
+#endif
+{
+	struct talitos_softc *sc = NULL;
+	struct resource *r;
+#ifdef CONFIG_PPC_MERGE
+	struct device *device = &ofdev->dev;
+	struct device_node *np = ofdev->node;
+	const unsigned int *prop;
+	int err;
+	struct resource res;
+#endif
+	static int num_chips = 0;
+	int rc;
+	int i;
+
+	DPRINTF("%s()\n", __FUNCTION__);
+
+	sc = (struct talitos_softc *) kmalloc(sizeof(*sc), GFP_KERNEL);
+	if (!sc)
+		return -ENOMEM;
+	memset(sc, 0, sizeof(*sc));
+
+	softc_device_init(sc, DRV_NAME, num_chips, talitos_methods);
+
+	sc->sc_irq = -1;
+	sc->sc_cid = -1;
+#ifndef CONFIG_PPC_MERGE
+	sc->sc_dev = pdev;
+#endif
+	sc->sc_num = num_chips++;
+
+#ifdef CONFIG_PPC_MERGE
+	dev_set_drvdata(device, sc);
+#else
+	platform_set_drvdata(sc->sc_dev, sc);
+#endif
+
+	/* get the irq line */
+#ifdef CONFIG_PPC_MERGE
+	err = of_address_to_resource(np, 0, &res);
+	if (err)
+		return -EINVAL;
+	r = &res;
+
+	sc->sc_irq = irq_of_parse_and_map(np, 0);
+#else
+	/* get a pointer to the register memory */
+	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+
+	sc->sc_irq = platform_get_irq(pdev, 0);
+#endif
+	rc = request_irq(sc->sc_irq, talitos_intr, 0,
+			device_get_nameunit(sc->sc_cdev), sc);
+	if (rc) {
+		printk(KERN_ERR "%s: failed to hook irq %d\n", 
+				device_get_nameunit(sc->sc_cdev), sc->sc_irq);
+		sc->sc_irq = -1;
+		goto out;
+	}
+
+	sc->sc_base_addr = (ocf_iomem_t) ioremap(r->start, (r->end - r->start));
+	if (!sc->sc_base_addr) {
+		printk(KERN_ERR "%s: failed to ioremap\n",
+				device_get_nameunit(sc->sc_cdev));
+		goto out;
+	}
+
+	/* figure out our SEC's properties and capabilities */
+	sc->sc_chiprev = (u64)talitos_read(sc->sc_base_addr + TALITOS_ID) << 32
+		 | talitos_read(sc->sc_base_addr + TALITOS_ID_HI);
+	DPRINTF("sec id 0x%llx\n", sc->sc_chiprev);
+
+#ifdef CONFIG_PPC_MERGE
+	/* get SEC properties from device tree, defaulting to SEC 2.0 */
+
+	prop = of_get_property(np, "num-channels", NULL);
+	sc->sc_num_channels = prop ? *prop : TALITOS_NCHANNELS_SEC_2_0;
+
+	prop = of_get_property(np, "channel-fifo-len", NULL);
+	sc->sc_chfifo_len = prop ? *prop : TALITOS_CHFIFOLEN_SEC_2_0;
+
+	prop = of_get_property(np, "exec-units-mask", NULL);
+	sc->sc_exec_units = prop ? *prop : TALITOS_HAS_EUS_SEC_2_0;
+
+	prop = of_get_property(np, "descriptor-types-mask", NULL);
+	sc->sc_desc_types = prop ? *prop : TALITOS_HAS_DESCTYPES_SEC_2_0;
+#else
+	/* bulk should go away with openfirmware flat device tree support */
+	if (sc->sc_chiprev & TALITOS_ID_SEC_2_0) {
+		sc->sc_num_channels = TALITOS_NCHANNELS_SEC_2_0;
+		sc->sc_chfifo_len = TALITOS_CHFIFOLEN_SEC_2_0;
+		sc->sc_exec_units = TALITOS_HAS_EUS_SEC_2_0;
+		sc->sc_desc_types = TALITOS_HAS_DESCTYPES_SEC_2_0;
+	} else {
+		printk(KERN_ERR "%s: failed to id device\n",
+				device_get_nameunit(sc->sc_cdev));
+		goto out;
+	}
+#endif
+
+	/* + 1 is for the meta-channel lock used by the channel scheduler */
+	sc->sc_chnfifolock = (spinlock_t *) kmalloc(
+		(sc->sc_num_channels + 1) * sizeof(spinlock_t), GFP_KERNEL);
+	if (!sc->sc_chnfifolock)
+		goto out;
+	for (i = 0; i < sc->sc_num_channels + 1; i++) {
+		spin_lock_init(&sc->sc_chnfifolock[i]);
+	}
+
+	sc->sc_chnlastalg = (int *) kmalloc(
+		sc->sc_num_channels * sizeof(int), GFP_KERNEL);
+	if (!sc->sc_chnlastalg)
+		goto out;
+	memset(sc->sc_chnlastalg, 0, sc->sc_num_channels * sizeof(int));
+
+	sc->sc_chnfifo = (struct desc_cryptop_pair **) kmalloc(
+		sc->sc_num_channels * sizeof(struct desc_cryptop_pair *), 
+		GFP_KERNEL);
+	if (!sc->sc_chnfifo)
+		goto out;
+	for (i = 0; i < sc->sc_num_channels; i++) {
+		sc->sc_chnfifo[i] = (struct desc_cryptop_pair *) kmalloc(
+			sc->sc_chfifo_len * sizeof(struct desc_cryptop_pair), 
+			GFP_KERNEL);
+		if (!sc->sc_chnfifo[i])
+			goto out;
+		memset(sc->sc_chnfifo[i], 0, 
+			sc->sc_chfifo_len * sizeof(struct desc_cryptop_pair));
+	}
+
+	/* reset and initialize the SEC h/w device */
+	talitos_reset_device(sc);
+	talitos_init_device(sc);
+
+	sc->sc_cid = crypto_get_driverid(softc_get_device(sc),CRYPTOCAP_F_HARDWARE);
+	if (sc->sc_cid < 0) {
+		printk(KERN_ERR "%s: could not get crypto driver id\n",
+				device_get_nameunit(sc->sc_cdev));
+		goto out;
+	}
+
+	/* register algorithms with the framework */
+	printk("%s:", device_get_nameunit(sc->sc_cdev));
+
+	if (sc->sc_exec_units & TALITOS_HAS_EU_RNG)  {
+		printk(" rng");
+#ifdef CONFIG_OCF_RANDOMHARVEST
+		talitos_rng_init(sc);
+		crypto_rregister(sc->sc_cid, talitos_read_random, sc);
+#endif
+	}
+	if (sc->sc_exec_units & TALITOS_HAS_EU_DEU) {
+		printk(" des/3des");
+		crypto_register(sc->sc_cid, CRYPTO_3DES_CBC, 0, 0);
+		crypto_register(sc->sc_cid, CRYPTO_DES_CBC, 0, 0);
+	}
+	if (sc->sc_exec_units & TALITOS_HAS_EU_AESU) {
+		printk(" aes");
+		crypto_register(sc->sc_cid, CRYPTO_AES_CBC, 0, 0);
+	}
+	if (sc->sc_exec_units & TALITOS_HAS_EU_MDEU) {
+		printk(" md5");
+		crypto_register(sc->sc_cid, CRYPTO_MD5, 0, 0);
+		/* HMAC support only with IPsec for now */
+		crypto_register(sc->sc_cid, CRYPTO_MD5_HMAC, 0, 0);
+		printk(" sha1");
+		crypto_register(sc->sc_cid, CRYPTO_SHA1, 0, 0);
+		/* HMAC support only with IPsec for now */
+		crypto_register(sc->sc_cid, CRYPTO_SHA1_HMAC, 0, 0);
+	}
+	printk("\n");
+	return 0;
+
+out:
+#ifndef CONFIG_PPC_MERGE
+	talitos_remove(pdev);
+#endif
+	return -ENOMEM;
+}
+
+#ifdef CONFIG_PPC_MERGE
+static int talitos_remove(struct of_device *ofdev)
+#else
+static int talitos_remove(struct platform_device *pdev)
+#endif
+{
+#ifdef CONFIG_PPC_MERGE
+	struct talitos_softc *sc = dev_get_drvdata(&ofdev->dev);
+#else
+	struct talitos_softc *sc = platform_get_drvdata(pdev);
+#endif
+	int i;
+
+	DPRINTF("%s()\n", __FUNCTION__);
+	if (sc->sc_cid >= 0)
+		crypto_unregister_all(sc->sc_cid);
+	if (sc->sc_chnfifo) {
+		for (i = 0; i < sc->sc_num_channels; i++)
+			if (sc->sc_chnfifo[i])
+				kfree(sc->sc_chnfifo[i]);
+		kfree(sc->sc_chnfifo);
+	}
+	if (sc->sc_chnlastalg)
+		kfree(sc->sc_chnlastalg);
+	if (sc->sc_chnfifolock)
+		kfree(sc->sc_chnfifolock);
+	if (sc->sc_irq != -1)
+		free_irq(sc->sc_irq, sc);
+	if (sc->sc_base_addr)
+		iounmap((void *) sc->sc_base_addr);
+	kfree(sc);
+	return 0;
+}
+
+#ifdef CONFIG_PPC_MERGE
+static struct of_device_id talitos_match[] = {
+	{
+		.type = "crypto",
+		.compatible = "talitos",
+	},
+	{},
+};
+
+MODULE_DEVICE_TABLE(of, talitos_match);
+
+static struct of_platform_driver talitos_driver = {
+	.name		= DRV_NAME,
+	.match_table	= talitos_match,
+	.probe		= talitos_probe,
+	.remove		= talitos_remove,
+};
+
+static int __init talitos_init(void)
+{
+	return of_register_platform_driver(&talitos_driver);
+}
+
+static void __exit talitos_exit(void)
+{
+	of_unregister_platform_driver(&talitos_driver);
+}
+#else
+/* Structure for a platform device driver */
+static struct platform_driver talitos_driver = {
+	.probe = talitos_probe,
+	.remove = talitos_remove,
+	.driver = {
+		.name = "fsl-sec2",
+	}
+};
+
+static int __init talitos_init(void)
+{
+	return platform_driver_register(&talitos_driver);
+}
+
+static void __exit talitos_exit(void)
+{
+	platform_driver_unregister(&talitos_driver);
+}
+#endif
+
+module_init(talitos_init);
+module_exit(talitos_exit);
+
+MODULE_LICENSE("Dual BSD/GPL");
+MODULE_AUTHOR("kim.phillips@freescale.com");
+MODULE_DESCRIPTION("OCF driver for Freescale SEC (talitos)");
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/talitos/talitos_dev.h
+++ linux-mvl-dove-2.6.32/crypto/ocf/talitos/talitos_dev.h
@@ -0,0 +1,277 @@
+/*
+ * Freescale SEC (talitos) device dependent data structures
+ *
+ * Copyright (c) 2006 Freescale Semiconductor, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/* device ID register values */
+#define TALITOS_ID_SEC_2_0	0x40
+#define TALITOS_ID_SEC_2_1	0x40 /* cross ref with IP block revision reg */
+
+/*
+ * following num_channels, channel-fifo-depth, exec-unit-mask, and 
+ * descriptor-types-mask are for forward-compatibility with openfirmware
+ * flat device trees
+ */
+
+/*
+ *  num_channels : the number of channels available in each SEC version.
+ */
+
+/* n.b. this driver requires these values be a power of 2 */
+#define TALITOS_NCHANNELS_SEC_1_0	4
+#define TALITOS_NCHANNELS_SEC_1_2	1
+#define TALITOS_NCHANNELS_SEC_2_0	4
+#define TALITOS_NCHANNELS_SEC_2_01	4
+#define TALITOS_NCHANNELS_SEC_2_1	4
+#define TALITOS_NCHANNELS_SEC_2_4	4
+
+/*
+ *  channel-fifo-depth : The number of descriptor
+ *  pointers a channel fetch fifo can hold.
+ */
+#define TALITOS_CHFIFOLEN_SEC_1_0	1
+#define TALITOS_CHFIFOLEN_SEC_1_2	1
+#define TALITOS_CHFIFOLEN_SEC_2_0	24
+#define TALITOS_CHFIFOLEN_SEC_2_01	24
+#define TALITOS_CHFIFOLEN_SEC_2_1	24
+#define TALITOS_CHFIFOLEN_SEC_2_4	24
+
+/* 
+ *  exec-unit-mask : The bitmask representing what Execution Units (EUs)
+ *  are available. EU information should be encoded following the SEC's 
+ *  EU_SEL0 bitfield documentation, i.e. as follows:
+ * 
+ *    bit 31 = set if SEC permits no-EU selection (should be always set)
+ *    bit 30 = set if SEC has the ARC4 EU (AFEU)
+ *    bit 29 = set if SEC has the des/3des EU (DEU)
+ *    bit 28 = set if SEC has the message digest EU (MDEU)
+ *    bit 27 = set if SEC has the random number generator EU (RNG)
+ *    bit 26 = set if SEC has the public key EU (PKEU)
+ *    bit 25 = set if SEC has the aes EU (AESU)
+ *    bit 24 = set if SEC has the Kasumi EU (KEU)
+ * 
+ */
+#define TALITOS_HAS_EU_NONE		(1<<0)
+#define TALITOS_HAS_EU_AFEU		(1<<1)
+#define TALITOS_HAS_EU_DEU		(1<<2)
+#define TALITOS_HAS_EU_MDEU		(1<<3)
+#define TALITOS_HAS_EU_RNG		(1<<4)
+#define TALITOS_HAS_EU_PKEU		(1<<5)
+#define TALITOS_HAS_EU_AESU		(1<<6)
+#define TALITOS_HAS_EU_KEU		(1<<7)
+
+/* the corresponding masks for each SEC version */
+#define TALITOS_HAS_EUS_SEC_1_0		0x7f
+#define TALITOS_HAS_EUS_SEC_1_2		0x4d
+#define TALITOS_HAS_EUS_SEC_2_0		0x7f
+#define TALITOS_HAS_EUS_SEC_2_01	0x7f
+#define TALITOS_HAS_EUS_SEC_2_1		0xff
+#define TALITOS_HAS_EUS_SEC_2_4		0x7f
+
+/*
+ *  descriptor-types-mask : The bitmask representing what descriptors
+ *  are available. Descriptor type information should be encoded 
+ *  following the SEC's Descriptor Header Dword DESC_TYPE field 
+ *  documentation, i.e. as follows:
+ *
+ *    bit 0  = set if SEC supports the aesu_ctr_nonsnoop desc. type
+ *    bit 1  = set if SEC supports the ipsec_esp descriptor type
+ *    bit 2  = set if SEC supports the common_nonsnoop desc. type
+ *    bit 3  = set if SEC supports the 802.11i AES ccmp desc. type
+ *    bit 4  = set if SEC supports the hmac_snoop_no_afeu desc. type
+ *    bit 5  = set if SEC supports the srtp descriptor type
+ *    bit 6  = set if SEC supports the non_hmac_snoop_no_afeu desc.type
+ *    bit 7  = set if SEC supports the pkeu_assemble descriptor type
+ *    bit 8  = set if SEC supports the aesu_key_expand_output desc.type
+ *    bit 9  = set if SEC supports the pkeu_ptmul descriptor type
+ *    bit 10 = set if SEC supports the common_nonsnoop_afeu desc. type
+ *    bit 11 = set if SEC supports the pkeu_ptadd_dbl descriptor type
+ *
+ *  ..and so on and so forth.
+ */
+#define TALITOS_HAS_DT_AESU_CTR_NONSNOOP	(1<<0)
+#define TALITOS_HAS_DT_IPSEC_ESP		(1<<1)
+#define TALITOS_HAS_DT_COMMON_NONSNOOP		(1<<2)
+
+/* the corresponding masks for each SEC version */
+#define TALITOS_HAS_DESCTYPES_SEC_2_0	0x01010ebf
+#define TALITOS_HAS_DESCTYPES_SEC_2_1	0x012b0ebf
+
+/* 
+ * a TALITOS_xxx_HI address points to the low data bits (32-63) of the register
+ */
+
+/* global register offset addresses */
+#define TALITOS_ID		0x1020
+#define TALITOS_ID_HI		0x1024
+#define TALITOS_MCR		0x1030		/* master control register */
+#define TALITOS_MCR_HI		0x1038		/* master control register */
+#define TALITOS_MCR_SWR		0x1
+#define TALITOS_IMR		0x1008		/* interrupt mask register */
+#define TALITOS_IMR_ALL		0x00010fff	/* enable all interrupts mask */
+#define TALITOS_IMR_ERRONLY	0x00010aaa	/* enable error interrupts */
+#define TALITOS_IMR_HI		0x100C		/* interrupt mask register */
+#define TALITOS_IMR_HI_ALL	0x00323333	/* enable all interrupts mask */
+#define TALITOS_IMR_HI_ERRONLY	0x00222222	/* enable error interrupts */
+#define TALITOS_ISR		0x1010		/* interrupt status register */
+#define TALITOS_ISR_ERROR	0x00010faa	/* errors mask */
+#define TALITOS_ISR_DONE	0x00000055	/* channel(s) done mask */
+#define TALITOS_ISR_HI		0x1014		/* interrupt status register */
+#define TALITOS_ICR		0x1018		/* interrupt clear register */
+#define TALITOS_ICR_HI		0x101C		/* interrupt clear register */
+
+/* channel register address stride */
+#define TALITOS_CH_OFFSET	0x100
+
+/* channel register offset addresses and bits */
+#define TALITOS_CH_CCCR		0x1108	/* Crypto-Channel Config Register */
+#define TALITOS_CH_CCCR_RESET	0x1	/* Channel Reset bit */
+#define TALITOS_CH_CCCR_HI	0x110c	/* Crypto-Channel Config Register */
+#define TALITOS_CH_CCCR_HI_CDWE	0x10	/* Channel done writeback enable bit */
+#define TALITOS_CH_CCCR_HI_NT	0x4	/* Notification type bit */
+#define TALITOS_CH_CCCR_HI_CDIE	0x2	/* Channel Done Interrupt Enable bit */
+#define TALITOS_CH_CCPSR	0x1110	/* Crypto-Channel Pointer Status Reg */
+#define TALITOS_CH_CCPSR_HI	0x1114	/* Crypto-Channel Pointer Status Reg */
+#define TALITOS_CH_FF		0x1148	/* Fetch FIFO */
+#define TALITOS_CH_FF_HI	0x114c	/* Fetch FIFO's FETCH_ADRS */
+#define TALITOS_CH_CDPR		0x1140	/* Crypto-Channel Pointer Status Reg */
+#define TALITOS_CH_CDPR_HI	0x1144	/* Crypto-Channel Pointer Status Reg */
+#define TALITOS_CH_DESCBUF	0x1180	/* (thru 11bf) Crypto-Channel 
+					 * Descriptor Buffer (debug) */
+
+/* execution unit register offset addresses and bits */
+#define TALITOS_DEUSR		0x2028	/* DEU status register */
+#define TALITOS_DEUSR_HI	0x202c	/* DEU status register */
+#define TALITOS_DEUISR		0x2030	/* DEU interrupt status register */
+#define TALITOS_DEUISR_HI	0x2034	/* DEU interrupt status register */
+#define TALITOS_DEUICR		0x2038	/* DEU interrupt control register */
+#define TALITOS_DEUICR_HI	0x203c	/* DEU interrupt control register */
+#define TALITOS_AESUISR		0x4030	/* AESU interrupt status register */
+#define TALITOS_AESUISR_HI	0x4034	/* AESU interrupt status register */
+#define TALITOS_AESUICR		0x4038	/* AESU interrupt control register */
+#define TALITOS_AESUICR_HI	0x403c	/* AESU interrupt control register */
+#define TALITOS_MDEUISR		0x6030	/* MDEU interrupt status register */
+#define TALITOS_MDEUISR_HI	0x6034	/* MDEU interrupt status register */
+#define TALITOS_RNGSR		0xa028	/* RNG status register */
+#define TALITOS_RNGSR_HI	0xa02c	/* RNG status register */
+#define TALITOS_RNGSR_HI_RD	0x1	/* RNG Reset done */
+#define TALITOS_RNGSR_HI_OFL	0xff0000/* number of dwords in RNG output FIFO*/
+#define TALITOS_RNGDSR		0xa010	/* RNG data size register */
+#define TALITOS_RNGDSR_HI	0xa014	/* RNG data size register */
+#define TALITOS_RNG_FIFO	0xa800	/* RNG FIFO - pool of random numbers */
+#define TALITOS_RNGISR		0xa030	/* RNG Interrupt status register */
+#define TALITOS_RNGISR_HI	0xa034	/* RNG Interrupt status register */
+#define TALITOS_RNGRCR		0xa018	/* RNG Reset control register */
+#define TALITOS_RNGRCR_HI	0xa01c	/* RNG Reset control register */
+#define TALITOS_RNGRCR_HI_SR	0x1	/* RNG RNGRCR:Software Reset */
+
+/* descriptor pointer entry */
+struct talitos_desc_ptr {
+	u16	len;		/* length */
+	u8	extent;		/* jump (to s/g link table) and extent */
+	u8	res;		/* reserved */
+	u32	ptr;		/* pointer */
+};
+
+/* descriptor */
+struct talitos_desc {
+	u32	hdr;				/* header */
+	u32	res;				/* reserved */
+	struct talitos_desc_ptr		ptr[7];	/* ptr/len pair array */
+};
+
+/* talitos descriptor header (hdr) bits */
+
+/* primary execution unit select */
+#define	TALITOS_SEL0_AFEU	0x10000000
+#define	TALITOS_SEL0_DEU	0x20000000
+#define	TALITOS_SEL0_MDEU	0x30000000
+#define	TALITOS_SEL0_RNG	0x40000000
+#define	TALITOS_SEL0_PKEU	0x50000000
+#define	TALITOS_SEL0_AESU	0x60000000
+
+/* primary execution unit mode (MODE0) and derivatives */
+#define	TALITOS_MODE0_AESU_CBC		0x00200000
+#define	TALITOS_MODE0_AESU_ENC		0x00100000
+#define	TALITOS_MODE0_DEU_CBC		0x00400000
+#define	TALITOS_MODE0_DEU_3DES		0x00200000
+#define	TALITOS_MODE0_DEU_ENC		0x00100000
+#define	TALITOS_MODE0_MDEU_INIT		0x01000000	/* init starting regs */
+#define	TALITOS_MODE0_MDEU_HMAC		0x00800000
+#define	TALITOS_MODE0_MDEU_PAD		0x00400000	/* PD */
+#define	TALITOS_MODE0_MDEU_MD5		0x00200000
+#define	TALITOS_MODE0_MDEU_SHA256	0x00100000
+#define	TALITOS_MODE0_MDEU_SHA1		0x00000000	/* SHA-160 */
+#define	TALITOS_MODE0_MDEU_MD5_HMAC	\
+		(TALITOS_MODE0_MDEU_MD5 | TALITOS_MODE0_MDEU_HMAC)
+#define	TALITOS_MODE0_MDEU_SHA256_HMAC	\
+		(TALITOS_MODE0_MDEU_SHA256 | TALITOS_MODE0_MDEU_HMAC)
+#define	TALITOS_MODE0_MDEU_SHA1_HMAC	\
+		(TALITOS_MODE0_MDEU_SHA1 | TALITOS_MODE0_MDEU_HMAC)
+
+/* secondary execution unit select (SEL1) */
+/* it's MDEU or nothing */
+#define	TALITOS_SEL1_MDEU	0x00030000
+
+/* secondary execution unit mode (MODE1) and derivatives */
+#define	TALITOS_MODE1_MDEU_INIT		0x00001000	/* init starting regs */
+#define	TALITOS_MODE1_MDEU_HMAC		0x00000800
+#define	TALITOS_MODE1_MDEU_PAD		0x00000400	/* PD */
+#define	TALITOS_MODE1_MDEU_MD5		0x00000200
+#define	TALITOS_MODE1_MDEU_SHA256	0x00000100
+#define	TALITOS_MODE1_MDEU_SHA1		0x00000000	/* SHA-160 */
+#define	TALITOS_MODE1_MDEU_MD5_HMAC	\
+	(TALITOS_MODE1_MDEU_MD5 | TALITOS_MODE1_MDEU_HMAC)
+#define	TALITOS_MODE1_MDEU_SHA256_HMAC	\
+	(TALITOS_MODE1_MDEU_SHA256 | TALITOS_MODE1_MDEU_HMAC)
+#define	TALITOS_MODE1_MDEU_SHA1_HMAC	\
+	(TALITOS_MODE1_MDEU_SHA1 | TALITOS_MODE1_MDEU_HMAC)
+
+/* direction of overall data flow (DIR) */
+#define	TALITOS_DIR_OUTBOUND	0x00000000
+#define	TALITOS_DIR_INBOUND	0x00000002
+
+/* done notification (DN) */
+#define	TALITOS_DONE_NOTIFY	0x00000001
+
+/* descriptor types */
+/* odd numbers here are valid on SEC2 and greater only (e.g. ipsec_esp) */
+#define TD_TYPE_AESU_CTR_NONSNOOP	(0 << 3)
+#define TD_TYPE_IPSEC_ESP		(1 << 3)
+#define TD_TYPE_COMMON_NONSNOOP_NO_AFEU	(2 << 3)
+#define TD_TYPE_HMAC_SNOOP_NO_AFEU	(4 << 3)
+
+#define TALITOS_HDR_DONE_BITS	0xff000000
+
+#define	DPRINTF(a...)	do { \
+						if (debug) { \
+							printk("%s: ", sc ? \
+								device_get_nameunit(sc->sc_cdev) : "talitos"); \
+							printk(a); \
+						} \
+					} while (0)
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/talitos/Makefile
+++ linux-mvl-dove-2.6.32/crypto/ocf/talitos/Makefile
@@ -0,0 +1,12 @@
+# for SGlinux builds
+-include $(ROOTDIR)/modules/.config
+
+obj-$(CONFIG_OCF_TALITOS) += talitos.o
+
+obj ?= .
+EXTRA_CFLAGS += -I$(obj)/.. -I$(obj)/
+
+ifdef TOPDIR
+-include $(TOPDIR)/Rules.make
+endif
+
--- linux-mvl-dove-2.6.32.orig/crypto/ocf/talitos/talitos_soft.h
+++ linux-mvl-dove-2.6.32/crypto/ocf/talitos/talitos_soft.h
@@ -0,0 +1,77 @@
+/*
+ * Freescale SEC data structures for integration with ocf-linux
+ *
+ * Copyright (c) 2006 Freescale Semiconductor, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * paired descriptor and associated crypto operation
+ */
+struct desc_cryptop_pair {
+	struct talitos_desc	cf_desc;	/* descriptor ptr */
+	struct cryptop		*cf_crp;	/* cryptop ptr */
+};
+
+/*
+ * Holds data specific to a single talitos device.
+ */
+struct talitos_softc {
+	softc_device_decl	sc_cdev;
+	struct platform_device	*sc_dev;	/* device backpointer */
+	ocf_iomem_t		sc_base_addr;
+	int			sc_irq;
+	int			sc_num;		/* if we have multiple chips */
+	int32_t			sc_cid;		/* crypto tag */
+	u64			sc_chiprev;	/* major/minor chip revision */
+	int			sc_nsessions;
+	struct talitos_session	*sc_sessions;
+	int			sc_num_channels;/* number of crypto channels */
+	int			sc_chfifo_len;	/* channel fetch fifo len */
+	int			sc_exec_units;	/* execution units mask */
+	int			sc_desc_types;	/* descriptor types mask */
+	/*
+	 * mutual exclusion for intra-channel resources, e.g. fetch fifos
+	 * the last entry is a meta-channel lock used by the channel scheduler
+	 */
+	spinlock_t		*sc_chnfifolock;
+	/* sc_chnlastalgo contains last algorithm for that channel */
+	int			*sc_chnlastalg;
+	/* sc_chnfifo holds pending descriptor--crypto operation pairs */
+	struct desc_cryptop_pair	**sc_chnfifo;
+};
+
+struct talitos_session {
+	u_int32_t	ses_used;
+	u_int32_t	ses_klen;		/* key length in bits */
+	u_int32_t	ses_key[8];		/* DES/3DES/AES key */
+	u_int32_t	ses_hmac[5];		/* hmac inner state */
+	u_int32_t	ses_hmac_len;		/* hmac length */
+	u_int32_t	ses_iv[4];		/* DES/3DES/AES iv */
+	u_int32_t	ses_mlen;		/* desired hash result len (12=ipsec or 16) */
+};
+
+#define	TALITOS_SESSION(sid)	((sid) & 0x0fffffff)
+#define	TALITOS_SID(crd, sesn)	(((crd) << 28) | ((sesn) & 0x0fffffff))
--- linux-mvl-dove-2.6.32.orig/drivers/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/Kconfig
@@ -90,6 +90,8 @@
 
 source "drivers/leds/Kconfig"
 
+source "drivers/switch/Kconfig"
+
 source "drivers/accessibility/Kconfig"
 
 source "drivers/infiniband/Kconfig"
--- linux-mvl-dove-2.6.32.orig/drivers/Makefile
+++ linux-mvl-dove-2.6.32/drivers/Makefile
@@ -9,7 +9,6 @@
 obj-$(CONFIG_PCI)		+= pci/
 obj-$(CONFIG_PARISC)		+= parisc/
 obj-$(CONFIG_RAPIDIO)		+= rapidio/
-obj-y				+= video/
 obj-$(CONFIG_ACPI)		+= acpi/
 obj-$(CONFIG_SFI)		+= sfi/
 # PnP must come after ACPI since it will eventually need to check if acpi
@@ -17,6 +16,7 @@
 obj-$(CONFIG_PNP)		+= pnp/
 obj-$(CONFIG_ARM_AMBA)		+= amba/
 
+obj-$(CONFIG_VIRTIO)		+= virtio/
 obj-$(CONFIG_XEN)		+= xen/
 
 # regulators early, since some subsystems rely on them to initialize
@@ -28,6 +28,8 @@
 
 # gpu/ comes after char for AGP vs DRM startup
 obj-y				+= gpu/
+# video/ needs to come after gpu for framebuffer fallback.
+obj-y				+= video/
 
 obj-$(CONFIG_CONNECTOR)		+= connector/
 
@@ -94,6 +96,7 @@
 obj-$(CONFIG_MMC)		+= mmc/
 obj-$(CONFIG_MEMSTICK)		+= memstick/
 obj-$(CONFIG_NEW_LEDS)		+= leds/
+obj-$(CONFIG_SWITCH)		+= switch/
 obj-$(CONFIG_INFINIBAND)	+= infiniband/
 obj-$(CONFIG_SGI_SN)		+= sn/
 obj-y				+= firmware/
@@ -106,7 +109,6 @@
 obj-$(CONFIG_PPC_PS3)		+= ps3/
 obj-$(CONFIG_OF)		+= of/
 obj-$(CONFIG_SSB)		+= ssb/
-obj-$(CONFIG_VIRTIO)		+= virtio/
 obj-$(CONFIG_VLYNQ)		+= vlynq/
 obj-$(CONFIG_STAGING)		+= staging/
 obj-y				+= platform/
--- linux-mvl-dove-2.6.32.orig/drivers/pnp/isapnp/core.c
+++ linux-mvl-dove-2.6.32/drivers/pnp/isapnp/core.c
@@ -42,6 +42,7 @@
 #include <linux/init.h>
 #include <linux/isapnp.h>
 #include <linux/mutex.h>
+#include <linux/async.h>
 #include <asm/io.h>
 
 #include "../base.h"
@@ -1002,7 +1003,7 @@
 	.disable = isapnp_disable_resources,
 };
 
-static int __init isapnp_init(void)
+static int __init real_isapnp_init(void)
 {
 	int cards;
 	struct pnp_card *card;
@@ -1096,6 +1097,15 @@
 	return 0;
 }
 
+static void __init async_isapnp_init(void *unused, async_cookie_t cookie)
+{
+	(void)real_isapnp_init();
+}
+
+static int __init isapnp_init(void)
+{
+       async_schedule(async_isapnp_init, NULL);
+}
 device_initcall(isapnp_init);
 
 /* format is: noisapnp */
--- linux-mvl-dove-2.6.32.orig/drivers/misc/uid_stat.c
+++ linux-mvl-dove-2.6.32/drivers/misc/uid_stat.c
@@ -0,0 +1,153 @@
+/* drivers/misc/uid_stat.c
+ *
+ * Copyright (C) 2008 - 2009 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <asm/atomic.h>
+
+#include <linux/err.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/proc_fs.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+#include <linux/stat.h>
+#include <linux/uid_stat.h>
+
+static DEFINE_SPINLOCK(uid_lock);
+static LIST_HEAD(uid_list);
+static struct proc_dir_entry *parent;
+
+struct uid_stat {
+	struct list_head link;
+	uid_t uid;
+	atomic_t tcp_rcv;
+	atomic_t tcp_snd;
+};
+
+static struct uid_stat *find_uid_stat(uid_t uid) {
+	unsigned long flags;
+	struct uid_stat *entry;
+
+	spin_lock_irqsave(&uid_lock, flags);
+	list_for_each_entry(entry, &uid_list, link) {
+		if (entry->uid == uid) {
+			spin_unlock_irqrestore(&uid_lock, flags);
+			return entry;
+		}
+	}
+	spin_unlock_irqrestore(&uid_lock, flags);
+	return NULL;
+}
+
+static int tcp_snd_read_proc(char *page, char **start, off_t off,
+				int count, int *eof, void *data)
+{
+	int len;
+	unsigned int bytes;
+	char *p = page;
+	struct uid_stat *uid_entry = (struct uid_stat *) data;
+	if (!data)
+		return 0;
+
+	bytes = (unsigned int) (atomic_read(&uid_entry->tcp_snd) + INT_MIN);
+	p += sprintf(p, "%u\n", bytes);
+	len = (p - page) - off;
+	*eof = (len <= count) ? 1 : 0;
+	*start = page + off;
+	return len;
+}
+
+static int tcp_rcv_read_proc(char *page, char **start, off_t off,
+				int count, int *eof, void *data)
+{
+	int len;
+	unsigned int bytes;
+	char *p = page;
+	struct uid_stat *uid_entry = (struct uid_stat *) data;
+	if (!data)
+		return 0;
+
+	bytes = (unsigned int) (atomic_read(&uid_entry->tcp_rcv) + INT_MIN);
+	p += sprintf(p, "%u\n", bytes);
+	len = (p - page) - off;
+	*eof = (len <= count) ? 1 : 0;
+	*start = page + off;
+	return len;
+}
+
+/* Create a new entry for tracking the specified uid. */
+static struct uid_stat *create_stat(uid_t uid) {
+	unsigned long flags;
+	char uid_s[32];
+	struct uid_stat *new_uid;
+	struct proc_dir_entry *entry;
+
+	/* Create the uid stat struct and append it to the list. */
+	if ((new_uid = kmalloc(sizeof(struct uid_stat), GFP_KERNEL)) == NULL)
+		return NULL;
+
+	new_uid->uid = uid;
+	/* Counters start at INT_MIN, so we can track 4GB of network traffic. */
+	atomic_set(&new_uid->tcp_rcv, INT_MIN);
+	atomic_set(&new_uid->tcp_snd, INT_MIN);
+
+	spin_lock_irqsave(&uid_lock, flags);
+	list_add_tail(&new_uid->link, &uid_list);
+	spin_unlock_irqrestore(&uid_lock, flags);
+
+	sprintf(uid_s, "%d", uid);
+	entry = proc_mkdir(uid_s, parent);
+
+	/* Keep reference to uid_stat so we know what uid to read stats from. */
+	create_proc_read_entry("tcp_snd", S_IRUGO, entry , tcp_snd_read_proc,
+		(void *) new_uid);
+
+	create_proc_read_entry("tcp_rcv", S_IRUGO, entry, tcp_rcv_read_proc,
+		(void *) new_uid);
+
+	return new_uid;
+}
+
+int update_tcp_snd(uid_t uid, int size) {
+	struct uid_stat *entry;
+	if ((entry = find_uid_stat(uid)) == NULL &&
+		((entry = create_stat(uid)) == NULL)) {
+			return -1;
+	}
+	atomic_add(size, &entry->tcp_snd);
+	return 0;
+}
+
+int update_tcp_rcv(uid_t uid, int size) {
+	struct uid_stat *entry;
+	if ((entry = find_uid_stat(uid)) == NULL &&
+		((entry = create_stat(uid)) == NULL)) {
+			return -1;
+	}
+	atomic_add(size, &entry->tcp_rcv);
+	return 0;
+}
+
+static int __init uid_stat_init(void)
+{
+	parent = proc_mkdir("uid_stat", NULL);
+	if (!parent) {
+		pr_err("uid_stat: failed to create proc entry\n");
+		return -1;
+	}
+	return 0;
+}
+
+__initcall(uid_stat_init);
--- linux-mvl-dove-2.6.32.orig/drivers/misc/pmem.c
+++ linux-mvl-dove-2.6.32/drivers/misc/pmem.c
@@ -0,0 +1,1345 @@
+/* drivers/android/pmem.c
+ *
+ * Copyright (C) 2007 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/miscdevice.h>
+#include <linux/platform_device.h>
+#include <linux/fs.h>
+#include <linux/file.h>
+#include <linux/mm.h>
+#include <linux/list.h>
+#include <linux/debugfs.h>
+#include <linux/android_pmem.h>
+#include <linux/mempolicy.h>
+#include <linux/sched.h>
+#include <asm/io.h>
+#include <asm/uaccess.h>
+#include <asm/cacheflush.h>
+
+#define PMEM_MAX_DEVICES 10
+#define PMEM_MAX_ORDER 128
+#define PMEM_MIN_ALLOC PAGE_SIZE
+
+#define PMEM_DEBUG 1
+
+/* indicates that a refernce to this file has been taken via get_pmem_file,
+ * the file should not be released until put_pmem_file is called */
+#define PMEM_FLAGS_BUSY 0x1
+/* indicates that this is a suballocation of a larger master range */
+#define PMEM_FLAGS_CONNECTED 0x1 << 1
+/* indicates this is a master and not a sub allocation and that it is mmaped */
+#define PMEM_FLAGS_MASTERMAP 0x1 << 2
+/* submap and unsubmap flags indicate:
+ * 00: subregion has never been mmaped
+ * 10: subregion has been mmaped, reference to the mm was taken
+ * 11: subretion has ben released, refernece to the mm still held
+ * 01: subretion has been released, reference to the mm has been released
+ */
+#define PMEM_FLAGS_SUBMAP 0x1 << 3
+#define PMEM_FLAGS_UNSUBMAP 0x1 << 4
+
+
+struct pmem_data {
+	/* in alloc mode: an index into the bitmap
+	 * in no_alloc mode: the size of the allocation */
+	int index;
+	/* see flags above for descriptions */
+	unsigned int flags;
+	/* protects this data field, if the mm_mmap sem will be held at the
+	 * same time as this sem, the mm sem must be taken first (as this is
+	 * the order for vma_open and vma_close ops */
+	struct rw_semaphore sem;
+	/* info about the mmaping process */
+	struct vm_area_struct *vma;
+	/* task struct of the mapping process */
+	struct task_struct *task;
+	/* process id of teh mapping process */
+	pid_t pid;
+	/* file descriptor of the master */
+	int master_fd;
+	/* file struct of the master */
+	struct file *master_file;
+	/* a list of currently available regions if this is a suballocation */
+	struct list_head region_list;
+	/* a linked list of data so we can access them for debugging */
+	struct list_head list;
+#if PMEM_DEBUG
+	int ref;
+#endif
+};
+
+struct pmem_bits {
+	unsigned allocated:1;		/* 1 if allocated, 0 if free */
+	unsigned order:7;		/* size of the region in pmem space */
+};
+
+struct pmem_region_node {
+	struct pmem_region region;
+	struct list_head list;
+};
+
+#define PMEM_DEBUG_MSGS 0
+#if PMEM_DEBUG_MSGS
+#define DLOG(fmt,args...) \
+	do { printk(KERN_INFO "[%s:%s:%d] "fmt, __FILE__, __func__, __LINE__, \
+		    ##args); } \
+	while (0)
+#else
+#define DLOG(x...) do {} while (0)
+#endif
+
+struct pmem_info {
+	struct miscdevice dev;
+	/* physical start address of the remaped pmem space */
+	unsigned long base;
+	/* vitual start address of the remaped pmem space */
+	unsigned char __iomem *vbase;
+	/* total size of the pmem space */
+	unsigned long size;
+	/* number of entries in the pmem space */
+	unsigned long num_entries;
+	/* pfn of the garbage page in memory */
+	unsigned long garbage_pfn;
+	/* index of the garbage page in the pmem space */
+	int garbage_index;
+	/* the bitmap for the region indicating which entries are allocated
+	 * and which are free */
+	struct pmem_bits *bitmap;
+	/* indicates the region should not be managed with an allocator */
+	unsigned no_allocator;
+	/* indicates maps of this region should be cached, if a mix of
+	 * cached and uncached is desired, set this and open the device with
+	 * O_SYNC to get an uncached region */
+	unsigned cached;
+	unsigned buffered;
+	/* in no_allocator mode the first mapper gets the whole space and sets
+	 * this flag */
+	unsigned allocated;
+	/* for debugging, creates a list of pmem file structs, the
+	 * data_list_sem should be taken before pmem_data->sem if both are
+	 * needed */
+	struct semaphore data_list_sem;
+	struct list_head data_list;
+	/* pmem_sem protects the bitmap array
+	 * a write lock should be held when modifying entries in bitmap
+	 * a read lock should be held when reading data from bits or
+	 * dereferencing a pointer into bitmap
+	 *
+	 * pmem_data->sem protects the pmem data of a particular file
+	 * Many of the function that require the pmem_data->sem have a non-
+	 * locking version for when the caller is already holding that sem.
+	 *
+	 * IF YOU TAKE BOTH LOCKS TAKE THEM IN THIS ORDER:
+	 * down(pmem_data->sem) => down(bitmap_sem)
+	 */
+	struct rw_semaphore bitmap_sem;
+
+	long (*ioctl)(struct file *, unsigned int, unsigned long);
+	int (*release)(struct inode *, struct file *);
+};
+
+static struct pmem_info pmem[PMEM_MAX_DEVICES];
+static int id_count;
+
+#define PMEM_IS_FREE(id, index) !(pmem[id].bitmap[index].allocated)
+#define PMEM_ORDER(id, index) pmem[id].bitmap[index].order
+#define PMEM_BUDDY_INDEX(id, index) (index ^ (1 << PMEM_ORDER(id, index)))
+#define PMEM_NEXT_INDEX(id, index) (index + (1 << PMEM_ORDER(id, index)))
+#define PMEM_OFFSET(index) (index * PMEM_MIN_ALLOC)
+#define PMEM_START_ADDR(id, index) (PMEM_OFFSET(index) + pmem[id].base)
+#define PMEM_LEN(id, index) ((1 << PMEM_ORDER(id, index)) * PMEM_MIN_ALLOC)
+#define PMEM_END_ADDR(id, index) (PMEM_START_ADDR(id, index) + \
+	PMEM_LEN(id, index))
+#define PMEM_START_VADDR(id, index) (PMEM_OFFSET(id, index) + pmem[id].vbase)
+#define PMEM_END_VADDR(id, index) (PMEM_START_VADDR(id, index) + \
+	PMEM_LEN(id, index))
+#define PMEM_REVOKED(data) (data->flags & PMEM_FLAGS_REVOKED)
+#define PMEM_IS_PAGE_ALIGNED(addr) (!((addr) & (~PAGE_MASK)))
+#define PMEM_IS_SUBMAP(data) ((data->flags & PMEM_FLAGS_SUBMAP) && \
+	(!(data->flags & PMEM_FLAGS_UNSUBMAP)))
+
+static int pmem_release(struct inode *, struct file *);
+static int pmem_mmap(struct file *, struct vm_area_struct *);
+static int pmem_open(struct inode *, struct file *);
+static long pmem_ioctl(struct file *, unsigned int, unsigned long);
+
+struct file_operations pmem_fops = {
+	.release = pmem_release,
+	.mmap = pmem_mmap,
+	.open = pmem_open,
+	.unlocked_ioctl = pmem_ioctl,
+};
+
+static int get_id(struct file *file)
+{
+	return MINOR(file->f_dentry->d_inode->i_rdev);
+}
+
+static int is_pmem_file(struct file *file)
+{
+	int id;
+
+	if (unlikely(!file || !file->f_dentry || !file->f_dentry->d_inode))
+		return 0;
+	id = get_id(file);
+	if (unlikely(id >= PMEM_MAX_DEVICES))
+		return 0;
+	if (unlikely(file->f_dentry->d_inode->i_rdev !=
+	     MKDEV(MISC_MAJOR, pmem[id].dev.minor)))
+		return 0;
+	return 1;
+}
+
+static int has_allocation(struct file *file)
+{
+	struct pmem_data *data;
+	/* check is_pmem_file first if not accessed via pmem_file_ops */
+
+	if (unlikely(!file->private_data))
+		return 0;
+	data = (struct pmem_data *)file->private_data;
+	if (unlikely(data->index < 0))
+		return 0;
+	return 1;
+}
+
+static int is_master_owner(struct file *file)
+{
+	struct file *master_file;
+	struct pmem_data *data;
+	int put_needed, ret = 0;
+
+	if (!is_pmem_file(file) || !has_allocation(file))
+		return 0;
+	data = (struct pmem_data *)file->private_data;
+	if (PMEM_FLAGS_MASTERMAP & data->flags)
+		return 1;
+	master_file = fget_light(data->master_fd, &put_needed);
+	if (master_file && data->master_file == master_file)
+		ret = 1;
+	fput_light(master_file, put_needed);
+	return ret;
+}
+
+static int pmem_free(int id, int index)
+{
+	/* caller should hold the write lock on pmem_sem! */
+	int buddy, curr = index;
+	DLOG("index %d\n", index);
+
+	if (pmem[id].no_allocator) {
+		pmem[id].allocated = 0;
+		return 0;
+	}
+	/* clean up the bitmap, merging any buddies */
+	pmem[id].bitmap[curr].allocated = 0;
+	/* find a slots buddy Buddy# = Slot# ^ (1 << order)
+	 * if the buddy is also free merge them
+	 * repeat until the buddy is not free or end of the bitmap is reached
+	 */
+	do {
+		buddy = PMEM_BUDDY_INDEX(id, curr);
+		if (PMEM_IS_FREE(id, buddy) &&
+				PMEM_ORDER(id, buddy) == PMEM_ORDER(id, curr)) {
+			PMEM_ORDER(id, buddy)++;
+			PMEM_ORDER(id, curr)++;
+			curr = min(buddy, curr);
+		} else {
+			break;
+		}
+	} while (curr < pmem[id].num_entries);
+
+	return 0;
+}
+
+static void pmem_revoke(struct file *file, struct pmem_data *data);
+
+static int pmem_release(struct inode *inode, struct file *file)
+{
+	struct pmem_data *data = (struct pmem_data *)file->private_data;
+	struct pmem_region_node *region_node;
+	struct list_head *elt, *elt2;
+	int id = get_id(file), ret = 0;
+
+
+	down(&pmem[id].data_list_sem);
+	/* if this file is a master, revoke all the memory in the connected
+	 *  files */
+	if (PMEM_FLAGS_MASTERMAP & data->flags) {
+		struct pmem_data *sub_data;
+		list_for_each(elt, &pmem[id].data_list) {
+			sub_data = list_entry(elt, struct pmem_data, list);
+			down_read(&sub_data->sem);
+			if (PMEM_IS_SUBMAP(sub_data) &&
+			    file == sub_data->master_file) {
+				up_read(&sub_data->sem);
+				pmem_revoke(file, sub_data);
+			}  else
+				up_read(&sub_data->sem);
+		}
+	}
+	list_del(&data->list);
+	up(&pmem[id].data_list_sem);
+
+
+	down_write(&data->sem);
+
+	/* if its not a conencted file and it has an allocation, free it */
+	if (!(PMEM_FLAGS_CONNECTED & data->flags) && has_allocation(file)) {
+		down_write(&pmem[id].bitmap_sem);
+		ret = pmem_free(id, data->index);
+		up_write(&pmem[id].bitmap_sem);
+	}
+
+	/* if this file is a submap (mapped, connected file), downref the
+	 * task struct */
+	if (PMEM_FLAGS_SUBMAP & data->flags)
+		if (data->task) {
+			put_task_struct(data->task);
+			data->task = NULL;
+		}
+
+	file->private_data = NULL;
+
+	list_for_each_safe(elt, elt2, &data->region_list) {
+		region_node = list_entry(elt, struct pmem_region_node, list);
+		list_del(elt);
+		kfree(region_node);
+	}
+	BUG_ON(!list_empty(&data->region_list));
+
+	up_write(&data->sem);
+	kfree(data);
+	if (pmem[id].release)
+		ret = pmem[id].release(inode, file);
+
+	return ret;
+}
+
+static int pmem_open(struct inode *inode, struct file *file)
+{
+	struct pmem_data *data;
+	int id = get_id(file);
+	int ret = 0;
+
+	DLOG("current %u file %p(%d)\n", current->pid, file, file_count(file));
+	/* setup file->private_data to indicate its unmapped */
+	/*  you can only open a pmem device one time */
+	if (file->private_data != NULL)
+		return -1;
+	data = kmalloc(sizeof(struct pmem_data), GFP_KERNEL);
+	if (!data) {
+		printk("pmem: unable to allocate memory for pmem metadata.");
+		return -1;
+	}
+	data->flags = 0;
+	data->index = -1;
+	data->task = NULL;
+	data->vma = NULL;
+	data->pid = 0;
+	data->master_file = NULL;
+#if PMEM_DEBUG
+	data->ref = 0;
+#endif
+	INIT_LIST_HEAD(&data->region_list);
+	init_rwsem(&data->sem);
+
+	file->private_data = data;
+	INIT_LIST_HEAD(&data->list);
+
+	down(&pmem[id].data_list_sem);
+	list_add(&data->list, &pmem[id].data_list);
+	up(&pmem[id].data_list_sem);
+	return ret;
+}
+
+static unsigned long pmem_order(unsigned long len)
+{
+	int i;
+
+	len = (len + PMEM_MIN_ALLOC - 1)/PMEM_MIN_ALLOC;
+	len--;
+	for (i = 0; i < sizeof(len)*8; i++)
+		if (len >> i == 0)
+			break;
+	return i;
+}
+
+static int pmem_allocate(int id, unsigned long len)
+{
+	/* caller should hold the write lock on pmem_sem! */
+	/* return the corresponding pdata[] entry */
+	int curr = 0;
+	int end = pmem[id].num_entries;
+	int best_fit = -1;
+	unsigned long order = pmem_order(len);
+
+	if (pmem[id].no_allocator) {
+		DLOG("no allocator");
+		if ((len > pmem[id].size) || pmem[id].allocated)
+			return -1;
+		pmem[id].allocated = 1;
+		return len;
+	}
+
+	if (order > PMEM_MAX_ORDER)
+		return -1;
+	DLOG("order %lx\n", order);
+
+	/* look through the bitmap:
+	 * 	if you find a free slot of the correct order use it
+	 * 	otherwise, use the best fit (smallest with size > order) slot
+	 */
+	while (curr < end) {
+		if (PMEM_IS_FREE(id, curr)) {
+			if (PMEM_ORDER(id, curr) == (unsigned char)order) {
+				/* set the not free bit and clear others */
+				best_fit = curr;
+				break;
+			}
+			if (PMEM_ORDER(id, curr) > (unsigned char)order &&
+			    (best_fit < 0 ||
+			     PMEM_ORDER(id, curr) < PMEM_ORDER(id, best_fit)))
+				best_fit = curr;
+		}
+		curr = PMEM_NEXT_INDEX(id, curr);
+	}
+
+	/* if best_fit < 0, there are no suitable slots,
+	 * return an error
+	 */
+	if (best_fit < 0) {
+		printk("pmem: no space left to allocate!\n");
+		return -1;
+	}
+
+	/* now partition the best fit:
+	 * 	split the slot into 2 buddies of order - 1
+	 * 	repeat until the slot is of the correct order
+	 */
+	while (PMEM_ORDER(id, best_fit) > (unsigned char)order) {
+		int buddy;
+		PMEM_ORDER(id, best_fit) -= 1;
+		buddy = PMEM_BUDDY_INDEX(id, best_fit);
+		PMEM_ORDER(id, buddy) = PMEM_ORDER(id, best_fit);
+	}
+	pmem[id].bitmap[best_fit].allocated = 1;
+	return best_fit;
+}
+
+static pgprot_t phys_mem_access_prot(struct file *file, pgprot_t vma_prot)
+{
+	int id = get_id(file);
+#ifdef pgprot_noncached
+	if (pmem[id].cached == 0 || file->f_flags & O_SYNC)
+		return pgprot_noncached(vma_prot);
+#endif
+#ifdef pgprot_ext_buffered
+	else if (pmem[id].buffered)
+		return pgprot_ext_buffered(vma_prot);
+#endif
+	return vma_prot;
+}
+
+static unsigned long pmem_start_addr(int id, struct pmem_data *data)
+{
+	if (pmem[id].no_allocator)
+		return PMEM_START_ADDR(id, 0);
+	else
+		return PMEM_START_ADDR(id, data->index);
+
+}
+
+static void *pmem_start_vaddr(int id, struct pmem_data *data)
+{
+	return pmem_start_addr(id, data) - pmem[id].base + pmem[id].vbase;
+}
+
+static unsigned long pmem_len(int id, struct pmem_data *data)
+{
+	if (pmem[id].no_allocator)
+		return data->index;
+	else
+		return PMEM_LEN(id, data->index);
+}
+
+static int pmem_map_garbage(int id, struct vm_area_struct *vma,
+			    struct pmem_data *data, unsigned long offset,
+			    unsigned long len)
+{
+	int i, garbage_pages = len >> PAGE_SHIFT;
+
+	vma->vm_flags |= VM_IO | VM_RESERVED | VM_PFNMAP | VM_SHARED | VM_WRITE;
+	for (i = 0; i < garbage_pages; i++) {
+		if (vm_insert_pfn(vma, vma->vm_start + offset + (i * PAGE_SIZE),
+		    pmem[id].garbage_pfn))
+			return -EAGAIN;
+	}
+	return 0;
+}
+
+static int pmem_unmap_pfn_range(int id, struct vm_area_struct *vma,
+				struct pmem_data *data, unsigned long offset,
+				unsigned long len)
+{
+	int garbage_pages;
+	DLOG("unmap offset %lx len %lx\n", offset, len);
+
+	BUG_ON(!PMEM_IS_PAGE_ALIGNED(len));
+
+	garbage_pages = len >> PAGE_SHIFT;
+	zap_page_range(vma, vma->vm_start + offset, len, NULL);
+	pmem_map_garbage(id, vma, data, offset, len);
+	return 0;
+}
+
+static int pmem_map_pfn_range(int id, struct vm_area_struct *vma,
+			      struct pmem_data *data, unsigned long offset,
+			      unsigned long len)
+{
+	DLOG("map offset %lx len %lx\n", offset, len);
+	BUG_ON(!PMEM_IS_PAGE_ALIGNED(vma->vm_start));
+	BUG_ON(!PMEM_IS_PAGE_ALIGNED(vma->vm_end));
+	BUG_ON(!PMEM_IS_PAGE_ALIGNED(len));
+	BUG_ON(!PMEM_IS_PAGE_ALIGNED(offset));
+
+	if (io_remap_pfn_range(vma, vma->vm_start + offset,
+		(pmem_start_addr(id, data) + offset) >> PAGE_SHIFT,
+		len, vma->vm_page_prot)) {
+		return -EAGAIN;
+	}
+	return 0;
+}
+
+static int pmem_remap_pfn_range(int id, struct vm_area_struct *vma,
+			      struct pmem_data *data, unsigned long offset,
+			      unsigned long len)
+{
+	/* hold the mm semp for the vma you are modifying when you call this */
+	BUG_ON(!vma);
+	zap_page_range(vma, vma->vm_start + offset, len, NULL);
+	return pmem_map_pfn_range(id, vma, data, offset, len);
+}
+
+static void pmem_vma_open(struct vm_area_struct *vma)
+{
+	struct file *file = vma->vm_file;
+	struct pmem_data *data = file->private_data;
+	int id = get_id(file);
+	/* this should never be called as we don't support copying pmem
+	 * ranges via fork */
+	BUG_ON(!has_allocation(file));
+	down_write(&data->sem);
+	/* remap the garbage pages, forkers don't get access to the data */
+	pmem_unmap_pfn_range(id, vma, data, 0, vma->vm_start - vma->vm_end);
+	up_write(&data->sem);
+}
+
+static void pmem_vma_close(struct vm_area_struct *vma)
+{
+	struct file *file = vma->vm_file;
+	struct pmem_data *data = file->private_data;
+
+	DLOG("current %u ppid %u file %p count %d\n", current->pid,
+	     current->parent->pid, file, file_count(file));
+	if (unlikely(!is_pmem_file(file) || !has_allocation(file))) {
+		printk(KERN_WARNING "pmem: something is very wrong, you are "
+		       "closing a vm backing an allocation that doesn't "
+		       "exist!\n");
+		return;
+	}
+	down_write(&data->sem);
+	if (data->vma == vma) {
+		data->vma = NULL;
+		if ((data->flags & PMEM_FLAGS_CONNECTED) &&
+		    (data->flags & PMEM_FLAGS_SUBMAP))
+			data->flags |= PMEM_FLAGS_UNSUBMAP;
+	}
+	/* the kernel is going to free this vma now anyway */
+	up_write(&data->sem);
+}
+
+static struct vm_operations_struct vm_ops = {
+	.open = pmem_vma_open,
+	.close = pmem_vma_close,
+};
+
+static int pmem_mmap(struct file *file, struct vm_area_struct *vma)
+{
+	struct pmem_data *data;
+	int index;
+	unsigned long vma_size =  vma->vm_end - vma->vm_start;
+	int ret = 0, id = get_id(file);
+
+	if (vma->vm_pgoff || !PMEM_IS_PAGE_ALIGNED(vma_size)) {
+#if PMEM_DEBUG
+		printk(KERN_ERR "pmem: mmaps must be at offset zero, aligned"
+				" and a multiple of pages_size.\n");
+#endif
+		return -EINVAL;
+	}
+
+	data = (struct pmem_data *)file->private_data;
+	down_write(&data->sem);
+	/* check this file isn't already mmaped, for submaps check this file
+	 * has never been mmaped */
+	if ((data->flags & PMEM_FLAGS_MASTERMAP) ||
+	    (data->flags & PMEM_FLAGS_SUBMAP) ||
+	    (data->flags & PMEM_FLAGS_UNSUBMAP)) {
+#if PMEM_DEBUG
+		printk(KERN_ERR "pmem: you can only mmap a pmem file once, "
+		       "this file is already mmaped. %x\n", data->flags);
+#endif
+		ret = -EINVAL;
+		goto error;
+	}
+	/* if file->private_data == unalloced, alloc*/
+	if (data && data->index == -1) {
+		down_write(&pmem[id].bitmap_sem);
+		index = pmem_allocate(id, vma->vm_end - vma->vm_start);
+		up_write(&pmem[id].bitmap_sem);
+		data->index = index;
+	}
+	/* either no space was available or an error occured */
+	if (!has_allocation(file)) {
+		ret = -EINVAL;
+		printk("pmem: could not find allocation for map.\n");
+		goto error;
+	}
+
+	if (pmem_len(id, data) < vma_size) {
+#if PMEM_DEBUG
+		printk(KERN_WARNING "pmem: mmap size [%lu] does not match"
+		       "size of backing region [%lu].\n", vma_size,
+		       pmem_len(id, data));
+#endif
+		ret = -EINVAL;
+		goto error;
+	}
+
+	vma->vm_pgoff = pmem_start_addr(id, data) >> PAGE_SHIFT;
+	vma->vm_page_prot = phys_mem_access_prot(file, vma->vm_page_prot);
+
+	if (data->flags & PMEM_FLAGS_CONNECTED) {
+		struct pmem_region_node *region_node;
+		struct list_head *elt;
+		if (pmem_map_garbage(id, vma, data, 0, vma_size)) {
+			printk("pmem: mmap failed in kernel!\n");
+			ret = -EAGAIN;
+			goto error;
+		}
+		list_for_each(elt, &data->region_list) {
+			region_node = list_entry(elt, struct pmem_region_node,
+						 list);
+			DLOG("remapping file: %p %lx %lx\n", file,
+				region_node->region.offset,
+				region_node->region.len);
+			if (pmem_remap_pfn_range(id, vma, data,
+						 region_node->region.offset,
+						 region_node->region.len)) {
+				ret = -EAGAIN;
+				goto error;
+			}
+		}
+		data->flags |= PMEM_FLAGS_SUBMAP;
+		get_task_struct(current->group_leader);
+		data->task = current->group_leader;
+		data->vma = vma;
+#if PMEM_DEBUG
+		data->pid = current->pid;
+#endif
+		DLOG("submmapped file %p vma %p pid %u\n", file, vma,
+		     current->pid);
+	} else {
+		if (pmem_map_pfn_range(id, vma, data, 0, vma_size)) {
+			printk(KERN_INFO "pmem: mmap failed in kernel!\n");
+			ret = -EAGAIN;
+			goto error;
+		}
+		data->flags |= PMEM_FLAGS_MASTERMAP;
+		data->pid = current->pid;
+	}
+	vma->vm_ops = &vm_ops;
+error:
+	up_write(&data->sem);
+	return ret;
+}
+
+/* the following are the api for accessing pmem regions by other drivers
+ * from inside the kernel */
+int get_pmem_user_addr(struct file *file, unsigned long *start,
+		   unsigned long *len)
+{
+	struct pmem_data *data;
+	if (!is_pmem_file(file) || !has_allocation(file)) {
+#if PMEM_DEBUG
+		printk(KERN_INFO "pmem: requested pmem data from invalid"
+				  "file.\n");
+#endif
+		return -1;
+	}
+	data = (struct pmem_data *)file->private_data;
+	down_read(&data->sem);
+	if (data->vma) {
+		*start = data->vma->vm_start;
+		*len = data->vma->vm_end - data->vma->vm_start;
+	} else {
+		*start = 0;
+		*len = 0;
+	}
+	up_read(&data->sem);
+	return 0;
+}
+
+int get_pmem_addr(struct file *file, unsigned long *start,
+		  unsigned long *vstart, unsigned long *len)
+{
+	struct pmem_data *data;
+	int id;
+
+	if (!is_pmem_file(file) || !has_allocation(file)) {
+		return -1;
+	}
+
+	data = (struct pmem_data *)file->private_data;
+	if (data->index == -1) {
+#if PMEM_DEBUG
+		printk(KERN_INFO "pmem: requested pmem data from file with no "
+		       "allocation.\n");
+		return -1;
+#endif
+	}
+	id = get_id(file);
+
+	down_read(&data->sem);
+	*start = pmem_start_addr(id, data);
+	*len = pmem_len(id, data);
+	*vstart = (unsigned long)pmem_start_vaddr(id, data);
+	up_read(&data->sem);
+#if PMEM_DEBUG
+	down_write(&data->sem);
+	data->ref++;
+	up_write(&data->sem);
+#endif
+	return 0;
+}
+
+int get_pmem_file(int fd, unsigned long *start, unsigned long *vstart,
+		  unsigned long *len, struct file **filp)
+{
+	struct file *file;
+
+	file = fget(fd);
+	if (unlikely(file == NULL)) {
+		printk(KERN_INFO "pmem: requested data from file descriptor "
+		       "that doesn't exist.");
+		return -1;
+	}
+
+	if (get_pmem_addr(file, start, vstart, len))
+		goto end;
+
+	if (filp)
+		*filp = file;
+	return 0;
+end:
+	fput(file);
+	return -1;
+}
+
+void put_pmem_file(struct file *file)
+{
+	struct pmem_data *data;
+	int id;
+
+	if (!is_pmem_file(file))
+		return;
+	id = get_id(file);
+	data = (struct pmem_data *)file->private_data;
+#if PMEM_DEBUG
+	down_write(&data->sem);
+	if (data->ref == 0) {
+		printk("pmem: pmem_put > pmem_get %s (pid %d)\n",
+		       pmem[id].dev.name, data->pid);
+		BUG();
+	}
+	data->ref--;
+	up_write(&data->sem);
+#endif
+	fput(file);
+}
+
+void flush_pmem_file(struct file *file, unsigned long offset, unsigned long len)
+{
+	struct pmem_data *data;
+	int id;
+	void *vaddr;
+	struct pmem_region_node *region_node;
+	struct list_head *elt;
+	void *flush_start, *flush_end;
+
+	if (!is_pmem_file(file) || !has_allocation(file)) {
+		return;
+	}
+
+	id = get_id(file);
+	data = (struct pmem_data *)file->private_data;
+	if (!pmem[id].cached || file->f_flags & O_SYNC)
+		return;
+
+	down_read(&data->sem);
+	vaddr = pmem_start_vaddr(id, data);
+	/* if this isn't a submmapped file, flush the whole thing */
+	if (unlikely(!(data->flags & PMEM_FLAGS_CONNECTED))) {
+		dmac_flush_range(vaddr, vaddr + pmem_len(id, data));
+		goto end;
+	}
+	/* otherwise, flush the region of the file we are drawing */
+	list_for_each(elt, &data->region_list) {
+		region_node = list_entry(elt, struct pmem_region_node, list);
+		if ((offset >= region_node->region.offset) &&
+		    ((offset + len) <= (region_node->region.offset +
+			region_node->region.len))) {
+			flush_start = vaddr + region_node->region.offset;
+			flush_end = flush_start + region_node->region.len;
+			dmac_flush_range(flush_start, flush_end);
+			break;
+		}
+	}
+end:
+	up_read(&data->sem);
+}
+
+static int pmem_connect(unsigned long connect, struct file *file)
+{
+	struct pmem_data *data = (struct pmem_data *)file->private_data;
+	struct pmem_data *src_data;
+	struct file *src_file;
+	int ret = 0, put_needed;
+
+	down_write(&data->sem);
+	/* retrieve the src file and check it is a pmem file with an alloc */
+	src_file = fget_light(connect, &put_needed);
+	DLOG("connect %p to %p\n", file, src_file);
+	if (!src_file) {
+		printk("pmem: src file not found!\n");
+		ret = -EINVAL;
+		goto err_no_file;
+	}
+	if (unlikely(!is_pmem_file(src_file) || !has_allocation(src_file))) {
+		printk(KERN_INFO "pmem: src file is not a pmem file or has no "
+		       "alloc!\n");
+		ret = -EINVAL;
+		goto err_bad_file;
+	}
+	src_data = (struct pmem_data *)src_file->private_data;
+
+	if (has_allocation(file) && (data->index != src_data->index)) {
+		printk("pmem: file is already mapped but doesn't match this"
+		       " src_file!\n");
+		ret = -EINVAL;
+		goto err_bad_file;
+	}
+	data->index = src_data->index;
+	data->flags |= PMEM_FLAGS_CONNECTED;
+	data->master_fd = connect;
+	data->master_file = src_file;
+
+err_bad_file:
+	fput_light(src_file, put_needed);
+err_no_file:
+	up_write(&data->sem);
+	return ret;
+}
+
+static void pmem_unlock_data_and_mm(struct pmem_data *data,
+				    struct mm_struct *mm)
+{
+	up_write(&data->sem);
+	if (mm != NULL) {
+		up_write(&mm->mmap_sem);
+		mmput(mm);
+	}
+}
+
+static int pmem_lock_data_and_mm(struct file *file, struct pmem_data *data,
+				 struct mm_struct **locked_mm)
+{
+	int ret = 0;
+	struct mm_struct *mm = NULL;
+	*locked_mm = NULL;
+lock_mm:
+	down_read(&data->sem);
+	if (PMEM_IS_SUBMAP(data)) {
+		mm = get_task_mm(data->task);
+		if (!mm) {
+#if PMEM_DEBUG
+			printk("pmem: can't remap task is gone!\n");
+#endif
+			up_read(&data->sem);
+			return -1;
+		}
+	}
+	up_read(&data->sem);
+
+	if (mm)
+		down_write(&mm->mmap_sem);
+
+	down_write(&data->sem);
+	/* check that the file didn't get mmaped before we could take the
+	 * data sem, this should be safe b/c you can only submap each file
+	 * once */
+	if (PMEM_IS_SUBMAP(data) && !mm) {
+		pmem_unlock_data_and_mm(data, mm);
+		up_write(&data->sem);
+		goto lock_mm;
+	}
+	/* now check that vma.mm is still there, it could have been
+	 * deleted by vma_close before we could get the data->sem */
+	if ((data->flags & PMEM_FLAGS_UNSUBMAP) && (mm != NULL)) {
+		/* might as well release this */
+		if (data->flags & PMEM_FLAGS_SUBMAP) {
+			put_task_struct(data->task);
+			data->task = NULL;
+			/* lower the submap flag to show the mm is gone */
+			data->flags &= ~(PMEM_FLAGS_SUBMAP);
+		}
+		pmem_unlock_data_and_mm(data, mm);
+		return -1;
+	}
+	*locked_mm = mm;
+	return ret;
+}
+
+int pmem_remap(struct pmem_region *region, struct file *file,
+		      unsigned operation)
+{
+	int ret;
+	struct pmem_region_node *region_node;
+	struct mm_struct *mm = NULL;
+	struct list_head *elt, *elt2;
+	int id = get_id(file);
+	struct pmem_data *data = (struct pmem_data *)file->private_data;
+
+	/* pmem region must be aligned on a page boundry */
+	if (unlikely(!PMEM_IS_PAGE_ALIGNED(region->offset) ||
+		 !PMEM_IS_PAGE_ALIGNED(region->len))) {
+#if PMEM_DEBUG
+		printk("pmem: request for unaligned pmem suballocation "
+		       "%lx %lx\n", region->offset, region->len);
+#endif
+		return -EINVAL;
+	}
+
+	/* if userspace requests a region of len 0, there's nothing to do */
+	if (region->len == 0)
+		return 0;
+
+	/* lock the mm and data */
+	ret = pmem_lock_data_and_mm(file, data, &mm);
+	if (ret)
+		return 0;
+
+	/* only the owner of the master file can remap the client fds
+	 * that back in it */
+	if (!is_master_owner(file)) {
+#if PMEM_DEBUG
+		printk("pmem: remap requested from non-master process\n");
+#endif
+		ret = -EINVAL;
+		goto err;
+	}
+
+	/* check that the requested range is within the src allocation */
+	if (unlikely((region->offset > pmem_len(id, data)) ||
+		     (region->len > pmem_len(id, data)) ||
+		     (region->offset + region->len > pmem_len(id, data)))) {
+#if PMEM_DEBUG
+		printk(KERN_INFO "pmem: suballoc doesn't fit in src_file!\n");
+#endif
+		ret = -EINVAL;
+		goto err;
+	}
+
+	if (operation == PMEM_MAP) {
+		region_node = kmalloc(sizeof(struct pmem_region_node),
+			      GFP_KERNEL);
+		if (!region_node) {
+			ret = -ENOMEM;
+#if PMEM_DEBUG
+			printk(KERN_INFO "No space to allocate metadata!");
+#endif
+			goto err;
+		}
+		region_node->region = *region;
+		list_add(&region_node->list, &data->region_list);
+	} else if (operation == PMEM_UNMAP) {
+		int found = 0;
+		list_for_each_safe(elt, elt2, &data->region_list) {
+			region_node = list_entry(elt, struct pmem_region_node,
+				      list);
+			if (region->len == 0 ||
+			    (region_node->region.offset == region->offset &&
+			    region_node->region.len == region->len)) {
+				list_del(elt);
+				kfree(region_node);
+				found = 1;
+			}
+		}
+		if (!found) {
+#if PMEM_DEBUG
+			printk("pmem: Unmap region does not map any mapped "
+				"region!");
+#endif
+			ret = -EINVAL;
+			goto err;
+		}
+	}
+
+	if (data->vma && PMEM_IS_SUBMAP(data)) {
+		if (operation == PMEM_MAP)
+			ret = pmem_remap_pfn_range(id, data->vma, data,
+						   region->offset, region->len);
+		else if (operation == PMEM_UNMAP)
+			ret = pmem_unmap_pfn_range(id, data->vma, data,
+						   region->offset, region->len);
+	}
+
+err:
+	pmem_unlock_data_and_mm(data, mm);
+	return ret;
+}
+
+static void pmem_revoke(struct file *file, struct pmem_data *data)
+{
+	struct pmem_region_node *region_node;
+	struct list_head *elt, *elt2;
+	struct mm_struct *mm = NULL;
+	int id = get_id(file);
+	int ret = 0;
+
+	data->master_file = NULL;
+	ret = pmem_lock_data_and_mm(file, data, &mm);
+	/* if lock_data_and_mm fails either the task that mapped the fd, or
+	 * the vma that mapped it have already gone away, nothing more
+	 * needs to be done */
+	if (ret)
+		return;
+	/* unmap everything */
+	/* delete the regions and region list nothing is mapped any more */
+	if (data->vma)
+		list_for_each_safe(elt, elt2, &data->region_list) {
+			region_node = list_entry(elt, struct pmem_region_node,
+						 list);
+			pmem_unmap_pfn_range(id, data->vma, data,
+					     region_node->region.offset,
+					     region_node->region.len);
+			list_del(elt);
+			kfree(region_node);
+	}
+	/* delete the master file */
+	pmem_unlock_data_and_mm(data, mm);
+}
+
+static void pmem_get_size(struct pmem_region *region, struct file *file)
+{
+	struct pmem_data *data = (struct pmem_data *)file->private_data;
+	int id = get_id(file);
+
+	if (!has_allocation(file)) {
+		region->offset = 0;
+		region->len = 0;
+		return;
+	} else {
+		region->offset = pmem_start_addr(id, data);
+		region->len = pmem_len(id, data);
+	}
+	DLOG("offset %lx len %lx\n", region->offset, region->len);
+}
+
+
+static long pmem_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+	struct pmem_data *data;
+	int id = get_id(file);
+
+	switch (cmd) {
+	case PMEM_GET_PHYS:
+		{
+			struct pmem_region region;
+			DLOG("get_phys\n");
+			if (!has_allocation(file)) {
+				region.offset = 0;
+				region.len = 0;
+			} else {
+				data = (struct pmem_data *)file->private_data;
+				region.offset = pmem_start_addr(id, data);
+				region.len = pmem_len(id, data);
+			}
+			printk(KERN_INFO "pmem: request for physical address of pmem region "
+					"from process %d.\n", current->pid);
+			if (copy_to_user((void __user *)arg, &region,
+						sizeof(struct pmem_region)))
+				return -EFAULT;
+			break;
+		}
+	case PMEM_MAP:
+		{
+			struct pmem_region region;
+			if (copy_from_user(&region, (void __user *)arg,
+						sizeof(struct pmem_region)))
+				return -EFAULT;
+			data = (struct pmem_data *)file->private_data;
+			return pmem_remap(&region, file, PMEM_MAP);
+		}
+		break;
+	case PMEM_UNMAP:
+		{
+			struct pmem_region region;
+			if (copy_from_user(&region, (void __user *)arg,
+						sizeof(struct pmem_region)))
+				return -EFAULT;
+			data = (struct pmem_data *)file->private_data;
+			return pmem_remap(&region, file, PMEM_UNMAP);
+			break;
+		}
+	case PMEM_GET_SIZE:
+		{
+			struct pmem_region region;
+			DLOG("get_size\n");
+			pmem_get_size(&region, file);
+			if (copy_to_user((void __user *)arg, &region,
+						sizeof(struct pmem_region)))
+				return -EFAULT;
+			break;
+		}
+	case PMEM_GET_TOTAL_SIZE:
+		{
+			struct pmem_region region;
+			DLOG("get total size\n");
+			region.offset = 0;
+			get_id(file);
+			region.len = pmem[id].size;
+			if (copy_to_user((void __user *)arg, &region,
+						sizeof(struct pmem_region)))
+				return -EFAULT;
+			break;
+		}
+	case PMEM_ALLOCATE:
+		{
+			if (has_allocation(file))
+				return -EINVAL;
+			data = (struct pmem_data *)file->private_data;
+			data->index = pmem_allocate(id, arg);
+			break;
+		}
+	case PMEM_CONNECT:
+		DLOG("connect\n");
+		return pmem_connect(arg, file);
+		break;
+	case PMEM_CACHE_FLUSH:
+		{
+			struct pmem_region region;
+			DLOG("flush\n");
+			if (copy_from_user(&region, (void __user *)arg,
+					   sizeof(struct pmem_region)))
+				return -EFAULT;
+			flush_pmem_file(file, region.offset, region.len);
+			break;
+		}
+	default:
+		if (pmem[id].ioctl)
+			return pmem[id].ioctl(file, cmd, arg);
+		return -EINVAL;
+	}
+	return 0;
+}
+
+#if PMEM_DEBUG
+static ssize_t debug_open(struct inode *inode, struct file *file)
+{
+	file->private_data = inode->i_private;
+	return 0;
+}
+
+static ssize_t debug_read(struct file *file, char __user *buf, size_t count,
+			  loff_t *ppos)
+{
+	struct list_head *elt, *elt2;
+	struct pmem_data *data;
+	struct pmem_region_node *region_node;
+	int id = (int)file->private_data;
+	const int debug_bufmax = 4096;
+	static char buffer[4096];
+	int n = 0;
+
+	DLOG("debug open\n");
+	n = scnprintf(buffer, debug_bufmax,
+		      "pid #: mapped regions (offset, len) (offset,len)...\n");
+
+	down(&pmem[id].data_list_sem);
+	list_for_each(elt, &pmem[id].data_list) {
+		data = list_entry(elt, struct pmem_data, list);
+		down_read(&data->sem);
+		n += scnprintf(buffer + n, debug_bufmax - n, "pid %u:",
+				data->pid);
+		list_for_each(elt2, &data->region_list) {
+			region_node = list_entry(elt2, struct pmem_region_node,
+				      list);
+			n += scnprintf(buffer + n, debug_bufmax - n,
+					"(%lx,%lx) ",
+					region_node->region.offset,
+					region_node->region.len);
+		}
+		n += scnprintf(buffer + n, debug_bufmax - n, "\n");
+		up_read(&data->sem);
+	}
+	up(&pmem[id].data_list_sem);
+
+	n++;
+	buffer[n] = 0;
+	return simple_read_from_buffer(buf, count, ppos, buffer, n);
+}
+
+static struct file_operations debug_fops = {
+	.read = debug_read,
+	.open = debug_open,
+};
+#endif
+
+#if 0
+static struct miscdevice pmem_dev = {
+	.name = "pmem",
+	.fops = &pmem_fops,
+};
+#endif
+
+int pmem_setup(struct android_pmem_platform_data *pdata,
+	       long (*ioctl)(struct file *, unsigned int, unsigned long),
+	       int (*release)(struct inode *, struct file *))
+{
+	int err = 0;
+	int i, index = 0;
+	int id = id_count;
+	id_count++;
+
+	pmem[id].no_allocator = pdata->no_allocator;
+	pmem[id].cached = pdata->cached;
+	pmem[id].buffered = pdata->buffered;
+	pmem[id].base = pdata->start;
+	pmem[id].size = pdata->size;
+	pmem[id].ioctl = ioctl;
+	pmem[id].release = release;
+	init_rwsem(&pmem[id].bitmap_sem);
+	init_MUTEX(&pmem[id].data_list_sem);
+	INIT_LIST_HEAD(&pmem[id].data_list);
+	pmem[id].dev.name = pdata->name;
+	pmem[id].dev.minor = id;
+	pmem[id].dev.fops = &pmem_fops;
+	printk(KERN_INFO "%s: %d init\n", pdata->name, pdata->cached);
+
+	err = misc_register(&pmem[id].dev);
+	if (err) {
+		printk(KERN_ALERT "Unable to register pmem driver!\n");
+		goto err_cant_register_device;
+	}
+	pmem[id].num_entries = pmem[id].size / PMEM_MIN_ALLOC;
+
+	pmem[id].bitmap = kmalloc(pmem[id].num_entries *
+				  sizeof(struct pmem_bits), GFP_KERNEL);
+	if (!pmem[id].bitmap)
+		goto err_no_mem_for_metadata;
+
+	memset(pmem[id].bitmap, 0, sizeof(struct pmem_bits) *
+					  pmem[id].num_entries);
+
+	for (i = sizeof(pmem[id].num_entries) * 8 - 1; i >= 0; i--) {
+		if ((pmem[id].num_entries) &  1<<i) {
+			PMEM_ORDER(id, index) = i;
+			index = PMEM_NEXT_INDEX(id, index);
+		}
+	}
+
+	if (pmem[id].cached)
+		pmem[id].vbase = ioremap_cached(pmem[id].base,
+						pmem[id].size);
+#ifdef ioremap_ext_buffered
+	else if (pmem[id].buffered)
+		pmem[id].vbase = ioremap_ext_buffered(pmem[id].base,
+						      pmem[id].size);
+#endif
+	else
+		pmem[id].vbase = ioremap(pmem[id].base, pmem[id].size);
+
+	if (pmem[id].vbase == 0)
+		goto error_cant_remap;
+
+	pmem[id].garbage_pfn = page_to_pfn(alloc_page(GFP_KERNEL));
+	if (pmem[id].no_allocator)
+		pmem[id].allocated = 0;
+
+#if PMEM_DEBUG
+	debugfs_create_file(pdata->name, S_IFREG | S_IRUGO, NULL, (void *)id,
+			    &debug_fops);
+#endif
+	return 0;
+error_cant_remap:
+	kfree(pmem[id].bitmap);
+err_no_mem_for_metadata:
+	misc_deregister(&pmem[id].dev);
+err_cant_register_device:
+	return -1;
+}
+
+static int pmem_probe(struct platform_device *pdev)
+{
+	struct android_pmem_platform_data *pdata;
+
+	if (!pdev || !pdev->dev.platform_data) {
+		printk(KERN_ALERT "Unable to probe pmem!\n");
+		return -1;
+	}
+	pdata = pdev->dev.platform_data;
+	return pmem_setup(pdata, NULL, NULL);
+}
+
+
+static int pmem_remove(struct platform_device *pdev)
+{
+	int id = pdev->id;
+	__free_page(pfn_to_page(pmem[id].garbage_pfn));
+	misc_deregister(&pmem[id].dev);
+	return 0;
+}
+
+static struct platform_driver pmem_driver = {
+	.probe = pmem_probe,
+	.remove = pmem_remove,
+	.driver = { .name = "android_pmem" }
+};
+
+
+static int __init pmem_init(void)
+{
+	return platform_driver_register(&pmem_driver);
+}
+
+static void __exit pmem_exit(void)
+{
+	platform_driver_unregister(&pmem_driver);
+}
+
+module_init(pmem_init);
+module_exit(pmem_exit);
+
--- linux-mvl-dove-2.6.32.orig/drivers/misc/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/misc/Kconfig
@@ -13,6 +13,10 @@
 
 if MISC_DEVICES
 
+config ANDROID_PMEM
+	bool "Android pmem allocator"
+	default y
+
 config ATMEL_PWM
 	tristate "Atmel AT32/AT91 PWM support"
 	depends on AVR32 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || ARCH_AT91CAP9
@@ -159,6 +163,13 @@
 	  driver (SCSI/ATA) which supports enclosures
 	  or a SCSI enclosure device (SES) to use these services.
 
+config KERNEL_DEBUGGER_CORE
+	bool "Kernel Debugger Core"
+	default n
+	---help---
+	  Generic kernel debugging command processor used by low level
+	  (interrupt context) platform-specific debuggers.
+
 config SGI_XP
 	tristate "Support communication between SGI SSIs"
 	depends on NET
@@ -223,6 +234,10 @@
 	This driver adds support for rfkill and backlight control to Dell
 	laptops.
 
+config UID_STAT
+	bool "UID based statistics tracking exported to /proc/uid_stat"
+	default n
+
 config ISL29003
 	tristate "Intersil ISL29003 ambient light sensor"
 	depends on I2C && SYSFS
@@ -249,5 +264,6 @@
 source "drivers/misc/c2port/Kconfig"
 source "drivers/misc/eeprom/Kconfig"
 source "drivers/misc/cb710/Kconfig"
+source "drivers/misc/mrvl-bmm/Kconfig"
 
 endif # MISC_DEVICES
--- linux-mvl-dove-2.6.32.orig/drivers/misc/ep93xx_pwm.c
+++ linux-mvl-dove-2.6.32/drivers/misc/ep93xx_pwm.c
@@ -248,11 +248,11 @@
 
 static DEVICE_ATTR(min_freq, S_IRUGO, ep93xx_pwm_get_min_freq, NULL);
 static DEVICE_ATTR(max_freq, S_IRUGO, ep93xx_pwm_get_max_freq, NULL);
-static DEVICE_ATTR(freq, S_IWUGO | S_IRUGO,
+static DEVICE_ATTR(freq, S_IWUSR | S_IRUGO,
 		   ep93xx_pwm_get_freq, ep93xx_pwm_set_freq);
-static DEVICE_ATTR(duty_percent, S_IWUGO | S_IRUGO,
+static DEVICE_ATTR(duty_percent, S_IWUSR | S_IRUGO,
 		   ep93xx_pwm_get_duty_percent, ep93xx_pwm_set_duty_percent);
-static DEVICE_ATTR(invert, S_IWUGO | S_IRUGO,
+static DEVICE_ATTR(invert, S_IWUSR | S_IRUGO,
 		   ep93xx_pwm_get_invert, ep93xx_pwm_set_invert);
 
 static struct attribute *ep93xx_pwm_attrs[] = {
--- linux-mvl-dove-2.6.32.orig/drivers/misc/Makefile
+++ linux-mvl-dove-2.6.32/drivers/misc/Makefile
@@ -12,14 +12,18 @@
 obj-$(CONFIG_TIFM_CORE)       	+= tifm_core.o
 obj-$(CONFIG_TIFM_7XX1)       	+= tifm_7xx1.o
 obj-$(CONFIG_PHANTOM)		+= phantom.o
+obj-$(CONFIG_ANDROID_PMEM)	+= pmem.o
 obj-$(CONFIG_SGI_IOC4)		+= ioc4.o
 obj-$(CONFIG_ENCLOSURE_SERVICES) += enclosure.o
+obj-$(CONFIG_KERNEL_DEBUGGER_CORE)	+= kernel_debugger.o
 obj-$(CONFIG_KGDB_TESTS)	+= kgdbts.o
 obj-$(CONFIG_SGI_XP)		+= sgi-xp/
 obj-$(CONFIG_SGI_GRU)		+= sgi-gru/
 obj-$(CONFIG_HP_ILO)		+= hpilo.o
+obj-$(CONFIG_UID_STAT)		+= uid_stat.o
 obj-$(CONFIG_ISL29003)		+= isl29003.o
 obj-$(CONFIG_EP93XX_PWM)	+= ep93xx_pwm.o
 obj-$(CONFIG_C2PORT)		+= c2port/
 obj-y				+= eeprom/
 obj-y				+= cb710/
+obj-$(CONFIG_DOVE_MRVL_BMM)	+= mrvl-bmm/
--- linux-mvl-dove-2.6.32.orig/drivers/misc/enclosure.c
+++ linux-mvl-dove-2.6.32/drivers/misc/enclosure.c
@@ -284,8 +284,11 @@
 	cdev->groups = enclosure_groups;
 
 	err = device_register(cdev);
-	if (err)
-		ERR_PTR(err);
+	if (err) {
+		ecomp->number = -1;
+		put_device(cdev);
+		return ERR_PTR(err);
+	}
 
 	return ecomp;
 }
@@ -391,6 +394,7 @@
 	[ENCLOSURE_STATUS_NOT_INSTALLED] = "not installed",
 	[ENCLOSURE_STATUS_UNKNOWN] = "unknown",
 	[ENCLOSURE_STATUS_UNAVAILABLE] = "unavailable",
+	[ENCLOSURE_STATUS_MAX] = NULL,
 };
 
 static const char *const enclosure_type [] = {
--- linux-mvl-dove-2.6.32.orig/drivers/misc/kernel_debugger.c
+++ linux-mvl-dove-2.6.32/drivers/misc/kernel_debugger.c
@@ -0,0 +1,79 @@
+/* drivers/android/kernel_debugger.c
+ *
+ * Guts of the kernel debugger.
+ * Needs something to actually push commands to it.
+ *
+ * Copyright (C) 2007-2008 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/ctype.h>
+#include <linux/device.h>
+#include <linux/sched.h>
+#include <linux/spinlock.h>
+#include <linux/sysrq.h>
+#include <linux/kernel_debugger.h>
+
+#define dprintf(fmt...) (ctxt->printf(ctxt->cookie, fmt))
+
+static void do_ps(struct kdbg_ctxt *ctxt)
+{
+	struct task_struct *g, *p;
+	unsigned state;
+	static const char stat_nam[] = "RSDTtZX";
+
+	dprintf("pid   ppid  prio task            pc\n");
+	read_lock(&tasklist_lock);
+	do_each_thread(g, p) {
+		state = p->state ? __ffs(p->state) + 1 : 0;
+		dprintf("%5d %5d %4d ", p->pid, p->parent->pid, p->prio);
+		dprintf("%-13.13s %c", p->comm,
+			state >= sizeof(stat_nam) ? '?' : stat_nam[state]);
+		if (state == TASK_RUNNING)
+			dprintf(" running\n");
+		else
+			dprintf(" %08lx\n", thread_saved_pc(p));
+	} while_each_thread(g, p);
+	read_unlock(&tasklist_lock);
+}
+
+int log_buf_copy(char *dest, int idx, int len);
+extern int do_syslog(int type, char __user *bug, int count);
+static void do_sysrq(struct kdbg_ctxt *ctxt, char rq)
+{
+	char buf[128];
+	int ret;
+	int idx = 0;
+	do_syslog(5 /* clear */, NULL, 0);
+	__handle_sysrq(rq, NULL, 0);
+	while (1) {
+		ret = log_buf_copy(buf, idx, sizeof(buf) - 1);
+		if (ret <= 0)
+			break;
+		buf[ret] = 0;
+		dprintf("%s", buf);
+		idx += ret;
+	}
+}
+
+int kernel_debugger(struct kdbg_ctxt *ctxt, char *cmd)
+{
+	if (!strcmp(cmd, "ps"))
+		do_ps(ctxt);
+	if (!strcmp(cmd, "sysrq"))
+		do_sysrq(ctxt, 'h');
+	if (!strncmp(cmd, "sysrq ", 6))
+		do_sysrq(ctxt, cmd[6]);
+
+	return 0;
+}
+
--- linux-mvl-dove-2.6.32.orig/drivers/misc/mrvl-bmm/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/misc/mrvl-bmm/Kconfig
@@ -0,0 +1,20 @@
+config DOVE_MRVL_BMM
+	tristate "Marvell Buffer management module"
+	default y
+	help
+	  This driver needs to co-work with user space BMM library.
+	  The user space driver can use this driver/library to maintain it's own buffer.
+
+config DOVE_VPU_USE_BMM
+	bool "Dove VPU use BMM"
+	depends on DOVE_MRVL_BMM
+	default y
+	help
+	  Dove VPU use BMM to maintian buffer.
+
+config DOVE_GPU_USE_BMM
+	bool "Dove GPU use BMM"
+	depends on DOVE_MRVL_BMM && DOVE_VPU_USE_BMM
+	default n
+	help
+	  Dove GPU use BMM to maintian buffer.
--- linux-mvl-dove-2.6.32.orig/drivers/misc/mrvl-bmm/Makefile
+++ linux-mvl-dove-2.6.32/drivers/misc/mrvl-bmm/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_DOVE_MRVL_BMM)	+= bmm_drv.o
--- linux-mvl-dove-2.6.32.orig/drivers/misc/mrvl-bmm/bmm_drv.h
+++ linux-mvl-dove-2.6.32/drivers/misc/mrvl-bmm/bmm_drv.h
@@ -0,0 +1,77 @@
+/*
+ *  bmm_drv.h
+ *
+ *  Buffer Management Module
+ *
+ *  User/Driver level BMM Defines/Globals/Functions
+ *
+ *  Li Li (lea.li@marvell.com)
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  published by the Free Software Foundation.
+
+ *(C) Copyright 2007 Marvell International Ltd.
+ * All Rights Reserved
+ */
+
+#ifndef _BMM_DRV_H
+#define _BMM_DRV_H
+
+#include <linux/dma-mapping.h>
+
+#define BMM_MINOR		94
+
+typedef struct {
+	unsigned long input;		/* the starting address of the block of memory */
+	unsigned long output;		/* the starting address of the block of memory */
+	unsigned long length;		/* the length of the block of memory */
+	unsigned long arg;		/* the arg of cmd */
+} ioctl_arg_t;
+
+#define BMEM_IOCTL_MAGIC 'G'
+/* ioctl commands */
+#define BMM_MALLOC		_IOWR(BMEM_IOCTL_MAGIC, 0, ioctl_arg_t)
+#define BMM_FREE		_IOWR(BMEM_IOCTL_MAGIC, 1, ioctl_arg_t)
+#define BMM_GET_VIRT_ADDR	_IOWR(BMEM_IOCTL_MAGIC, 2, ioctl_arg_t)
+#define BMM_GET_PHYS_ADDR	_IOWR(BMEM_IOCTL_MAGIC, 3, ioctl_arg_t)
+#define BMM_GET_MEM_ATTR	_IOWR(BMEM_IOCTL_MAGIC, 4, ioctl_arg_t)
+#define BMM_SET_MEM_ATTR	_IOWR(BMEM_IOCTL_MAGIC, 5, ioctl_arg_t)
+#define BMM_GET_MEM_SIZE	_IOWR(BMEM_IOCTL_MAGIC, 6, ioctl_arg_t)
+#define BMM_GET_TOTAL_SPACE	_IOWR(BMEM_IOCTL_MAGIC, 7, ioctl_arg_t)
+#define BMM_GET_FREE_SPACE	_IOWR(BMEM_IOCTL_MAGIC, 8, ioctl_arg_t)
+#define BMM_FLUSH_CACHE		_IOWR(BMEM_IOCTL_MAGIC, 9, ioctl_arg_t)
+#define BMM_DMA_MEMCPY		_IOWR(BMEM_IOCTL_MAGIC, 10, ioctl_arg_t)
+#define BMM_DMA_SYNC		_IOWR(BMEM_IOCTL_MAGIC, 11, ioctl_arg_t)
+#define BMM_CONSISTENT_SYNC	_IOWR(BMEM_IOCTL_MAGIC, 12, ioctl_arg_t)
+#define BMM_DUMP		_IOWR(BMEM_IOCTL_MAGIC, 13, ioctl_arg_t)
+#define BMM_GET_ALLOCATED_SPACE	_IOWR(BMEM_IOCTL_MAGIC, 14, ioctl_arg_t)
+#define BMM_GET_KERN_PHYS_ADDR	_IOWR(BMEM_IOCTL_MAGIC, 15, ioctl_arg_t)
+
+/* ioctl arguments: memory attributes */
+#define BMM_ATTR_DEFAULT	(0)		/* cacheable bufferable */
+#define BMM_ATTR_WRITECOMBINE	(1 << 0)	/* non-cacheable & bufferable */
+#define BMM_ATTR_NONCACHED	(1 << 1)	/* non-cacheable & non-bufferable */
+/* Note: extra attributes below are not supported yet! */
+#define BMM_ATTR_HUGE_PAGE	(1 << 2)	/* 64KB page size */
+#define BMM_ATTR_WRITETHROUGH	(1 << 3)	/* implies L1 Cacheable */
+#define BMM_ATTR_L2_CACHEABLE	(1 << 4)	/* implies L1 Cacheable */
+
+/* ioctl arguments: cache flush direction */
+#define BMM_DMA_BIDIRECTIONAL	DMA_BIDIRECTIONAL	/* 0 */
+#define BMM_DMA_TO_DEVICE	DMA_TO_DEVICE		/* 1 */
+#define BMM_DMA_FROM_DEVICE	DMA_FROM_DEVICE		/* 2 */
+#define BMM_DMA_NONE		DMA_NONE		/* 3 */
+
+#ifdef CONFIG_DOVE_VPU_USE_BMM
+extern unsigned int dove_vmeta_get_memory_start(void);
+extern int dove_vmeta_get_memory_size(void);
+#endif
+
+#ifdef CONFIG_DOVE_GPU_USE_BMM
+extern unsigned int dove_gpu_get_memory_start(void);
+extern int dove_gpu_get_memory_size(void);
+#endif
+
+#endif
+
--- linux-mvl-dove-2.6.32.orig/drivers/misc/mrvl-bmm/bmm_drv.c
+++ linux-mvl-dove-2.6.32/drivers/misc/mrvl-bmm/bmm_drv.c
@@ -0,0 +1,1052 @@
+/*
+ *  bmm_drv.c
+ *
+ *  Buffer Management Module
+ *
+ *  User/Driver level BMM Defines/Globals/Functions
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  published by the Free Software Foundation.
+
+ *(C) Copyright 2007 Marvell International Ltd.
+ * All Rights Reserved
+ */
+
+/******************************************************************************
+ *
+ * Usage notes:
+ *
+ * 1. Compile using make
+ * 2. Install lodable module using "insmod bmm.ko"
+ * 3. Create symbolic device link using "mknod /dev/bmm c 10 94"
+ *
+ *****************************************************************************/
+
+//#define DEBUG
+
+#include <linux/kernel.h>
+#include <linux/version.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)
+#include <linux/module.h>
+#endif
+#include <linux/miscdevice.h>
+#include <linux/ioctl.h>
+#include <linux/fs.h>
+
+#include <asm/page.h>
+#include <asm/uaccess.h>
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28)
+#include <mach/hardware.h>
+#include <mach/irqs.h>
+#include <linux/sched.h>
+#else
+#include <asm/arch/hardware.h>
+#include <asm/arch/pxa-regs.h>
+#include <asm/arch/dma.h>
+#endif
+#include <asm/cacheflush.h>
+
+#include "bmm_drv.h"
+
+/* Switch uva to pa translation */
+#define BMM_USE_UVA_TO_PA
+
+/* Switch DMA memcpy */
+//#define BMM_HAS_DMA_MEMCPY
+
+/* Switch PTE page */
+//#define BMM_HAS_PTE_PAGE
+
+static unsigned long bmm_size_mb = 8;
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Li Li <lea.li@marvell.com>");
+MODULE_DESCRIPTION("Buffer Management Module");
+MODULE_PARM_DESC(bmm_size_mb, "Total memory size (in MB) reserved for BMM");
+module_param(bmm_size_mb, ulong, S_IRUGO);
+
+typedef struct {
+	pid_t pid;		/* current->tgid */
+	unsigned long vaddr;	/* the starting address of the block of memory */
+	unsigned long paddr;	/* the starting address of the block of memory */
+	unsigned long size;	/* the size in bytes of the block of memory */
+	unsigned long attr;	/* the attribute of the block of memory */
+	struct list_head list;
+} bmm_block_t;
+
+static unsigned long bmm_paddr;
+static unsigned long bmm_size;
+static unsigned long bmm_free_size;
+static bmm_block_t bmm_free_block;
+static bmm_block_t bmm_used_block;
+static struct mutex bmm_mutex;	/* mutex for block list */
+
+#define UNUSED_PARAM(x)	(void)(x)
+
+static unsigned long uva_to_pa(struct mm_struct *mm, unsigned long addr)
+{
+        unsigned long ret = 0UL;
+        pgd_t *pgd;
+        pud_t *pud;
+        pmd_t *pmd;
+        pte_t *pte;
+
+        pgd = pgd_offset(mm, addr);
+        if (!pgd_none(*pgd)) {
+                pud = pud_offset(pgd, addr);
+                if (!pud_none(*pud)) {
+                        pmd = pmd_offset(pud, addr);
+                        if (!pmd_none(*pmd)) {
+                                pte = pte_offset_map(pmd, addr);
+                                if (!pte_none(*pte) && pte_present(*pte)) {
+#ifdef BMM_HAS_PTE_PAGE
+					/* Use page struct */
+					struct page *page = pte_page(*pte);
+					if(page) {
+	                                        ret = page_to_phys(page);
+        	                                ret |= (addr & (PAGE_SIZE-1));
+					}
+#else
+					/* Use hard PTE */
+					pte = (pte_t *)((u32)pte - 2048);
+					if(pte)
+						ret = (*pte & 0xfffff000)
+							| (addr & 0xfff);
+#endif
+                                }
+                        }
+                }
+        }
+        return ret;
+}
+
+unsigned long va_to_pa(unsigned long user_addr, unsigned int size)
+{
+	unsigned long  paddr, paddr_tmp;
+	unsigned long  size_tmp = 0;
+	int page_num = PAGE_ALIGN(size) / PAGE_SIZE;
+	unsigned int vaddr = PAGE_ALIGN(user_addr);
+	int i = 0;
+	struct mm_struct *mm = current->mm;
+
+	if(vaddr == 0)
+		return 0;
+
+	paddr = uva_to_pa(mm, vaddr);
+
+	for (i = 0; i < page_num; i++) {
+		paddr_tmp = uva_to_pa(mm, vaddr);
+		if ((paddr_tmp - paddr) != size_tmp)
+			return 0;
+		vaddr += PAGE_SIZE;
+		size_tmp += PAGE_SIZE;
+	}
+	return paddr;
+}
+
+static void bmm_dump(bmm_block_t *pbmm)
+{
+	pr_info("\tpbmm = 0x%08lx\n", (unsigned long)pbmm);
+	pr_info("\t\tpid  : 0x%08x\n", pbmm->pid);
+	pr_info("\t\tvaddr: 0x%08lx\n", pbmm->vaddr);
+	pr_info("\t\tpaddr: 0x%08lx\n", pbmm->paddr);
+	pr_info("\t\tsize : 0x%08lx\n", pbmm->size);
+}
+
+static void bmm_dump_list(struct list_head *head)
+{
+	int i = 0;
+	bmm_block_t *pbmm;
+
+	list_for_each_entry(pbmm, head, list) {
+		pr_info("\t[%3d]: \n", i++);
+		bmm_dump(pbmm);
+	}
+}
+
+static void bmm_dump_all(void)
+{
+	pr_info("free block list:\n");
+	bmm_dump_list(&(bmm_free_block.list));
+	pr_info("used block list:\n");
+	bmm_dump_list(&(bmm_used_block.list));
+}
+
+static bmm_block_t * bmm_search_vaddr(struct list_head *head, unsigned long vaddr)
+{
+	bmm_block_t *pbmm;
+
+	mutex_lock(&bmm_mutex);
+	list_for_each_entry(pbmm, head, list) {
+		if(pbmm->vaddr == vaddr && pbmm->pid == current->tgid) {
+			mutex_unlock(&bmm_mutex);
+			return pbmm;
+		}
+	}
+	mutex_unlock(&bmm_mutex);
+
+	return NULL;
+}
+
+static bmm_block_t * bmm_search_vaddr_ex(struct list_head *head, unsigned long vaddr)
+{
+	bmm_block_t *pbmm;
+
+	mutex_lock(&bmm_mutex);
+	list_for_each_entry(pbmm, head, list) {
+		if(pbmm->vaddr <= vaddr && pbmm->vaddr + pbmm->size > vaddr && pbmm->pid == current->tgid) {
+			mutex_unlock(&bmm_mutex);
+			return pbmm;
+		}
+	}
+	mutex_unlock(&bmm_mutex);
+
+	return NULL;
+}
+
+static bmm_block_t * bmm_search_paddr_ex(struct list_head *head, unsigned long paddr)
+{
+	bmm_block_t *pbmm;
+
+	mutex_lock(&bmm_mutex);
+	list_for_each_entry(pbmm, head, list) {
+		if(pbmm->paddr <= paddr && pbmm->paddr + pbmm->size > paddr) {
+			mutex_unlock(&bmm_mutex);
+			return pbmm;
+		}
+	}
+	mutex_unlock(&bmm_mutex);
+
+	return NULL;
+}
+
+static bmm_block_t * bmm_search_paddr(struct list_head *head, unsigned long paddr)
+{
+	bmm_block_t *pbmm;
+
+	mutex_lock(&bmm_mutex);
+	list_for_each_entry(pbmm, head, list) {
+		if(pbmm->paddr == paddr) {
+			mutex_unlock(&bmm_mutex);
+			return pbmm;
+		}
+	}
+	mutex_unlock(&bmm_mutex);
+
+	return NULL;
+}
+
+static void __bmm_insert(bmm_block_t *new, bmm_block_t *pbmm)
+{
+	pr_debug("insert 0x%08lx before 0x%08lx\n", new->paddr, pbmm->paddr);
+	list_add_tail(&(new->list), &(pbmm->list));
+}
+
+static int bmm_merge(bmm_block_t *new, bmm_block_t *prev, bmm_block_t *next)
+{
+	if(prev && prev->paddr + prev->size == new->paddr) {
+		if(new->paddr + new->size == next->paddr) {
+			/* merge prev + new + next */
+			prev->size += new->size + next->size;
+			list_del(&(next->list));
+			kfree(new);
+			kfree(next);
+			return 2;
+		} else {
+			/* merge prev + new */
+			prev->size += new->size;
+			kfree(new);
+			return 1;
+		}
+	} else {
+		if(new->paddr + new->size == next->paddr) {
+			/* merge new + next */
+			next->paddr -= new->size;
+			next->size += new->size;
+			kfree(new);
+			return 1;
+		} else {
+			/* cannot merge */
+			return 0;
+		}
+	}
+
+	return 0;
+}
+
+static void bmm_insert(struct list_head *head, bmm_block_t *new, int merge)
+{
+	bmm_block_t *pbmm;
+	bmm_block_t *prev = NULL;
+
+	list_for_each_entry(pbmm, head, list) {
+		if(pbmm->paddr > new->paddr) {
+			/* can merge? */
+			if(!merge || !bmm_merge(new, prev, pbmm))
+				__bmm_insert(new, pbmm);
+			return;
+		}
+		prev = pbmm;
+	}
+
+	/* can merge? */
+	if(!merge || !bmm_merge(new, prev, pbmm))
+		__bmm_insert(new, pbmm);
+}
+
+static unsigned long bmm_malloc(size_t size, unsigned long attr)
+{
+	bmm_block_t *pbmm;
+	bmm_block_t *new;
+	unsigned long paddr = 0;
+
+	size = PAGE_ALIGN(size);
+	if(size == 0 || size > bmm_free_size || size > TASK_SIZE)
+		return 0;
+
+	mutex_lock(&bmm_mutex);
+	list_for_each_entry(pbmm, &(bmm_free_block.list), list) {
+		if(pbmm->size == size) {	/* Found an exact match */
+			list_del_init(&(pbmm->list));
+			pbmm->pid = current->tgid;
+			pbmm->attr = attr;
+			bmm_insert(&(bmm_used_block.list), pbmm, 0);
+			paddr = pbmm->paddr;
+			bmm_free_size -= size;
+			break;
+		} else if(pbmm->size > size) {	/* Found a larger one */
+			/* before: |---------pbmm/size+left-------|
+			   after:  |---pbmm/left---|---new/size---|
+			             in free list    to used list */
+			new = kmalloc(sizeof(bmm_block_t), GFP_KERNEL);
+			pbmm->size -= size;
+			new->size = size;
+			new->vaddr = 0;
+			new->paddr = pbmm->paddr + pbmm->size;
+			new->pid = current->tgid;
+			new->attr = attr;
+			INIT_LIST_HEAD(&(new->list));
+			bmm_insert(&(bmm_used_block.list), new, 0);
+			paddr = new->paddr;
+			bmm_free_size -= size;
+			break;
+		}
+	}
+	mutex_unlock(&bmm_mutex);
+
+	pr_debug("bmm_malloc return paddr=0x%08lx\n", paddr);
+
+	return paddr;
+}
+
+static void bmm_free(unsigned long vaddr)
+{
+	bmm_block_t *pbmm;
+	pid_t pid = current->tgid;
+
+	pr_debug("bmm_free(vaddr=0x%08lx) pid=%d\n", vaddr, pid);
+
+	mutex_lock(&bmm_mutex);
+	list_for_each_entry(pbmm, &(bmm_used_block.list), list) {
+		pr_debug("\t(vaddr=0x%08lx, pid=0x%08x)\n", pbmm->vaddr, pbmm->pid);
+		if(pbmm->vaddr == vaddr && pbmm->pid == pid) {
+			pr_debug("\tbmm_free(paddr=0x%08lx)\n", pbmm->paddr);
+
+			list_del_init(&(pbmm->list));
+			pbmm->vaddr = 0;
+			pbmm->attr = 0;
+			pbmm->pid = 0;
+			bmm_free_size += pbmm->size;
+			bmm_insert(&(bmm_free_block.list), pbmm, 1);
+			break;
+		}
+	}
+	mutex_unlock(&bmm_mutex);
+}
+
+unsigned long bmm_malloc_kernel(size_t size, unsigned long attr)
+{
+	return bmm_malloc(size, attr);
+}
+EXPORT_SYMBOL(bmm_malloc_kernel);
+
+void bmm_free_kernel(unsigned long paddr)
+{
+	bmm_block_t *pbmm;
+
+	mutex_lock(&bmm_mutex);
+	list_for_each_entry(pbmm, &(bmm_used_block.list), list) {
+		if(pbmm->paddr == paddr) {
+			pr_debug("\tbmm_free(paddr=0x%08lx)\n", pbmm->paddr);
+
+			list_del_init(&(pbmm->list));
+			pbmm->vaddr = 0;
+			pbmm->attr = 0;
+			pbmm->pid = 0;
+			bmm_free_size += pbmm->size;
+			bmm_insert(&(bmm_free_block.list), pbmm, 1);
+			break;
+		}
+	}
+	mutex_unlock(&bmm_mutex);
+}
+EXPORT_SYMBOL(bmm_free_kernel);
+
+static void bmm_vm_close(struct vm_area_struct *vma)
+{
+	pr_debug("vm_close(%p)\n", vma);
+	bmm_free(vma->vm_start);
+}
+
+static struct vm_operations_struct bmm_vm_ops = {
+	.close = bmm_vm_close,
+};
+
+static int bmm_mmap(struct file *file, struct vm_area_struct *vma)
+{
+	unsigned long vm_len = vma->vm_end - vma->vm_start;
+	unsigned long paddr = (vma->vm_pgoff) << PAGE_SHIFT;
+	bmm_block_t *pbmm;
+
+	UNUSED_PARAM(file);
+
+	pr_debug("bmm_mmap(vma=0x%08lx-0x%08lx, paddr=0x%08lx)\n", vma->vm_start, vma->vm_end, paddr);
+	pbmm = bmm_search_paddr_ex(&(bmm_used_block.list), paddr);
+	if(pbmm == NULL) {
+		pr_debug("bmm_mmap: invalid paddr(0x%08lx)\n", paddr);
+		return -EINVAL;
+	}
+
+	vma->vm_flags |= VM_RESERVED;	/* Don't swap */
+	vma->vm_flags |= VM_DONTEXPAND; /* Don't remap */
+	vma->vm_flags |= VM_DONTCOPY;	/* Don't fork */
+
+	if(pbmm->attr & BMM_ATTR_NONCACHED)
+		vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
+	if((pbmm->attr & BMM_ATTR_WRITECOMBINE))
+		vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
+
+	if(remap_pfn_range(vma, vma->vm_start, paddr >> PAGE_SHIFT, vm_len, vma->vm_page_prot)) {
+		pr_debug("bmm_mmap: EAGAIN\n");
+		return -EAGAIN;
+	}
+
+	/* Register the first/master virtual address only
+           Shared or sub- buffer are not registered */
+	if(pbmm->paddr == paddr && pbmm->vaddr == 0)
+		pbmm->vaddr = vma->vm_start;
+
+	vma->vm_ops = &bmm_vm_ops;
+
+	//consistent_sync(vma->vm_start, vm_len, DMA_BIDIRECTIONAL);
+
+	return 0;
+}
+
+static unsigned long bmm_get_allocated_size(void)
+{
+	unsigned long size = 0;
+	bmm_block_t *pbmm;
+
+	mutex_lock(&bmm_mutex);
+	list_for_each_entry(pbmm, &(bmm_used_block.list), list) {
+		if(pbmm->pid == current->tgid)
+			size += pbmm->size;
+	}
+	mutex_unlock(&bmm_mutex);
+
+	return size;
+}
+
+static unsigned long bmm_get_vaddr_ex(unsigned long paddr)
+{
+	bmm_block_t *pbmm = bmm_search_paddr_ex(&(bmm_used_block.list), paddr);
+	if(pbmm == NULL)
+		return 0;
+	return pbmm->vaddr + (paddr - pbmm->paddr);
+}
+
+/* Replaced by bmm_get_vaddr_ex */
+static unsigned long __attribute__ ((unused)) bmm_get_vaddr(unsigned long paddr)
+{
+	bmm_block_t *pbmm = bmm_search_paddr(&(bmm_used_block.list), paddr);
+	if(pbmm == NULL)
+		return 0;
+	return pbmm->vaddr;
+}
+
+/* Replaced by bmm_get_paddr_ex */
+static unsigned long __attribute__ ((unused)) bmm_get_paddr(unsigned long vaddr)
+{
+#ifndef BMM_USE_UVA_TO_PA
+	bmm_block_t *pbmm = bmm_search_vaddr(&(bmm_used_block.list), vaddr);
+	if(pbmm == NULL)
+		return 0;
+
+	return pbmm->paddr;
+#else
+        unsigned long paddr;
+	struct mm_struct *mm = current->mm;
+
+	spin_lock(&mm->page_table_lock);
+	paddr = uva_to_pa(mm, vaddr);
+	spin_unlock(&mm->page_table_lock);
+
+	if(paddr >= bmm_paddr && paddr < bmm_paddr + bmm_size)
+		return paddr;
+	else
+		return 0;
+#endif
+}
+
+static unsigned long bmm_get_paddr_ex(unsigned long vaddr, unsigned long size)
+{
+	unsigned long paddr;
+	struct mm_struct *mm = current->mm;
+
+	spin_lock(&mm->page_table_lock);
+	paddr = va_to_pa(vaddr, size);
+	spin_unlock(&mm->page_table_lock);
+
+	return paddr;
+}
+
+static unsigned long bmm_get_paddr_inside_ex(unsigned long vaddr)
+{
+#ifndef BMM_USE_UVA_TO_PA
+        unsigned long paddr;
+
+	bmm_block_t *pbmm = bmm_search_vaddr_ex(&(bmm_used_block.list), vaddr);
+	if(pbmm == NULL)
+		return 0;
+	paddr = pbmm->paddr + (vaddr - pbmm->vaddr);
+
+	return paddr;
+#else
+        unsigned long paddr;
+	struct mm_struct *mm = current->mm;
+
+	spin_lock(&mm->page_table_lock);
+	paddr = uva_to_pa(mm, vaddr);
+	spin_unlock(&mm->page_table_lock);
+
+	if(paddr >= bmm_paddr && paddr < bmm_paddr + bmm_size)
+		return paddr;
+	else
+		return 0;
+#endif
+}
+
+static unsigned long bmm_get_mem_attr(unsigned long vaddr)
+{
+	bmm_block_t *pbmm = bmm_search_vaddr_ex(&(bmm_used_block.list), vaddr);
+	if(pbmm == NULL)
+		return 0;
+	return pbmm->attr;
+}
+
+static unsigned long bmm_set_mem_attr(unsigned long vaddr, unsigned long attr)
+{
+	bmm_block_t *pbmm = bmm_search_vaddr_ex(&(bmm_used_block.list), vaddr);
+	if(pbmm == NULL)
+		return 0;
+	/* TODO: change attributes here */
+	//pbmm->attr = attr;
+	return pbmm->attr;
+}
+
+static unsigned long bmm_get_mem_size(unsigned long vaddr)
+{
+	bmm_block_t *pbmm = bmm_search_vaddr(&(bmm_used_block.list), vaddr);
+	if(pbmm == NULL)
+		return 0;
+	return pbmm->size;
+}
+
+void bmm_consistent_sync(unsigned long start, size_t size, int direction)
+{
+	/* support addr both from kernel space and bmm space */
+	unsigned long end = start + size;
+	unsigned long paddr;
+
+	/* bmm space */
+	paddr = bmm_get_paddr_inside_ex(start);
+
+	/* kernel space */
+	if (paddr == 0)
+		paddr = bmm_get_paddr_ex(start, size);
+
+	if (paddr == 0)
+		BUG();
+
+	switch (direction) {
+	case BMM_DMA_FROM_DEVICE:	/* invalidate only */
+		dmac_inv_range((void *)start, (void *)end);
+		outer_inv_range(paddr, paddr + size);
+		break;
+	case BMM_DMA_TO_DEVICE:		/* writeback only */
+		dmac_clean_range((void *)start, (void *)end);
+		outer_clean_range(paddr, paddr + size);
+		break;
+	case BMM_DMA_BIDIRECTIONAL:	/* writeback and invalidate */
+		dmac_flush_range((void *)start, (void *)end);
+		outer_flush_range(paddr, paddr + size);
+		break;
+	default:
+		BUG();
+	}
+}
+
+static unsigned long bmm_flush_cache(unsigned long vaddr, int dir)
+{
+	bmm_block_t *pbmm = NULL;
+
+	pr_debug("bmm flush cache(0x%08lx)\n", vaddr);
+	pbmm = bmm_search_vaddr_ex(&(bmm_used_block.list), vaddr);
+	if(pbmm == NULL) {
+		pr_debug("ERROR: vaddr(0x%08lx) not found\n", vaddr);
+		return -EINVAL;
+	}
+	if(dir == BMM_DMA_FROM_DEVICE || dir == BMM_DMA_TO_DEVICE || dir == BMM_DMA_BIDIRECTIONAL) {
+		pr_debug("Flushing vaddr=0x%08lx, paddr=0x%08lx, size=0x%08lx\n",
+			pbmm->vaddr, pbmm->paddr, pbmm->size);
+		bmm_consistent_sync(pbmm->vaddr, pbmm->size, dir);
+	} else {
+		pr_debug("ERROR: dir=0x%08x\n", dir);
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+#ifdef BMM_HAS_DMA_MEMCPY
+extern void disable_irq(unsigned int irq);
+extern void enable_irq(unsigned int irq);
+
+static DECLARE_WAIT_QUEUE_HEAD(dma_wait);
+
+static int 			dma_ch = -1;
+static int 			dma_end = 0;
+static pxa_dma_desc 		*dma_desc;
+static unsigned long 		dma_desc_p;
+static int 			is_dma_pending;
+
+static void dma_irq(int channel, void *data, struct pt_regs *regs)
+{
+	UNUSED_PARAM(data);
+	UNUSED_PARAM(regs);
+
+	DCSR(channel) = DCSR_STARTINTR|DCSR_ENDINTR|DCSR_BUSERR;
+	dma_end	= 1;
+	wake_up_interruptible(&dma_wait);
+	pr_debug("dma_irq: dma_end --> 1\n");
+
+	return;
+}
+
+static unsigned long bmm_dma_memcpy(unsigned long src, unsigned long dst, int len)
+{
+#define MAX_DESC_NUM		0x1000
+#define SINGLE_DESC_TRANS_MAX  	8000
+
+	unsigned long srcphyaddr, dstphyaddr;
+	pxa_dma_desc 	*dma_desc_tmp;
+	unsigned long 	dma_desc_p_tmp;
+	unsigned long 	len_tmp;
+	struct mm_struct *mm = current->mm;
+
+	spin_lock(&mm->page_table_lock);
+	srcphyaddr = uva_to_pa(mm, src);
+	dstphyaddr = uva_to_pa(mm, dst);
+	spin_unlock(&mm->page_table_lock);
+
+	pr_debug("src: v=0x%08x, p=0x%08x\n", src, srcphyaddr);
+	pr_debug("dst: v=0x%08x, p=0x%08x\n", dst, dstphyaddr);
+	pr_debug("len = %d\n", len);
+
+	if (srcphyaddr == 0 || dstphyaddr == 0)
+		return -1;
+
+	if (len > (MAX_DESC_NUM-2)*SINGLE_DESC_TRANS_MAX) {
+		printk(KERN_ERR "size is too large\n");
+		return -1;
+	}
+	if (len & 0x1f) {
+		printk(KERN_ERR "size is not 32 bytes aligned\n");
+		return -1;
+	}
+
+	if (dma_ch == -1) {
+		dma_ch = pxa_request_dma("bmm_memcpy",
+					DMA_PRIO_HIGH, 
+					dma_irq, 
+					NULL);
+		if (dma_ch < 0) {
+			printk(KERN_ERR 
+				"MVED: Cann't request DMA for bmm memcpy\n");
+			return -1;
+		} 		
+	}
+	pr_debug("dma_ch = %d\n", dma_ch);
+	
+	if (dma_desc == NULL) {
+		dma_desc = dma_alloc_writecombine( NULL, 
+					MAX_DESC_NUM * sizeof(pxa_dma_desc),
+					(void *)&dma_desc_p, 
+				GFP_KERNEL);
+		if (dma_desc == NULL) {
+			printk(KERN_ERR "dma desc allocate error!!\n");
+			return -1;
+		}
+	}
+	pr_debug("dma_desc = 0x%08x\n", dma_desc);
+
+	dma_desc_tmp = dma_desc;
+	dma_desc_p_tmp = dma_desc_p;
+	while(len) {
+		len_tmp = len>SINGLE_DESC_TRANS_MAX ? 
+				SINGLE_DESC_TRANS_MAX : len;
+		pr_debug("\t0x%08x[%d]\n", dma_desc_tmp, len_tmp);
+	        dma_desc_tmp->ddadr = dma_desc_p_tmp
+		       			+ sizeof(pxa_dma_desc);
+		dma_desc_tmp->dsadr = srcphyaddr;
+		dma_desc_tmp->dtadr = dstphyaddr;
+		dma_desc_tmp->dcmd = len_tmp | DCMD_INCSRCADDR 
+					| DCMD_INCTRGADDR | DCMD_BURST32;
+		if (len <= SINGLE_DESC_TRANS_MAX) {
+			dma_desc_tmp->dcmd |= DCMD_ENDIRQEN;
+			break;
+		}
+		len -= len_tmp;
+		dma_desc_tmp ++;
+		dma_desc_p_tmp += sizeof(pxa_dma_desc);
+		srcphyaddr += len_tmp;
+		dstphyaddr += len_tmp;
+	}
+
+        dma_desc_tmp->ddadr = DDADR_STOP;
+	dma_end = 0;
+        DDADR(dma_ch) = (int) dma_desc_p;
+	is_dma_pending = 1;
+        DCSR(dma_ch) |= DCSR_RUN;
+
+	pr_debug("memcpy OK\n");
+
+	return 0;
+}
+
+void bmm_dma_sync()
+{
+	int poll = 1;
+
+	pr_debug("sync\n");
+
+	DECLARE_WAITQUEUE(wait, current);
+
+	if (!is_dma_pending)
+		return;
+
+	if (poll) {
+		while(!dma_end) {
+			cpu_relax();
+		}		
+		is_dma_pending = 0;
+		return;
+	}
+
+	add_wait_queue(&dma_wait, &wait);
+	set_current_state(TASK_INTERRUPTIBLE);
+	disable_irq(IRQ_DMA);
+	if (dma_end) {
+		enable_irq(IRQ_DMA);
+		set_current_state(TASK_RUNNING);
+		remove_wait_queue(&dma_wait, &wait);
+		is_dma_pending = 0;
+		return;
+	}
+	enable_irq(IRQ_DMA);
+	schedule();
+	set_current_state(TASK_RUNNING);
+	remove_wait_queue(&dma_wait, &wait);
+	is_dma_pending = 0;
+	return;
+}
+#endif
+
+/*
+ *********************************************************************  
+ * Function:  	bmm_ioctl
+ * Description: General ioctl routine.
+ *********************************************************************
+ */
+
+static int bmm_ioctl(struct inode *inode, struct file * filp, 
+		   unsigned int cmd, unsigned long arg)
+{
+	unsigned int bmm_arg;
+	unsigned long input;
+	unsigned long output = 0;
+	unsigned long length;
+	ioctl_arg_t io;
+
+	UNUSED_PARAM(inode);
+	UNUSED_PARAM(filp);
+
+	if(copy_from_user(&io, (void *)arg, sizeof(io))) {
+		pr_debug("bmm_ioctl() error in copy_from_user()\n");
+		return -EFAULT;
+	}
+
+	input = io.input;
+	output = io.output;
+	length = io.length;
+	bmm_arg = io.arg;
+
+	pr_debug("bmm_ioctl(cmd=0x%08x, arg=0x%08lx, io=0x%08lx/0x%08lx)\n",
+		cmd, arg, io.input, io.output);
+
+	switch(cmd) {
+	case BMM_MALLOC:
+		output = bmm_malloc(input, bmm_arg);
+		break;
+	case BMM_FREE:
+		bmm_free(input);
+		break;
+	case BMM_GET_VIRT_ADDR:
+		output = bmm_get_vaddr_ex(input);
+		break;
+	case BMM_GET_PHYS_ADDR:
+		output = bmm_get_paddr_inside_ex(input);
+		break;
+	case BMM_GET_KERN_PHYS_ADDR:
+		output = bmm_get_paddr_ex(input, length);
+		break;
+	case BMM_GET_MEM_ATTR:
+		output = bmm_get_mem_attr(input);
+		break;
+	case BMM_SET_MEM_ATTR:
+		output = bmm_set_mem_attr(input, bmm_arg);
+		break;
+	case BMM_GET_MEM_SIZE:
+		output = bmm_get_mem_size(input);
+		break;
+	case BMM_GET_TOTAL_SPACE:
+		output = bmm_size;
+		break;
+	case BMM_GET_FREE_SPACE:
+		output = bmm_free_size;
+		break;
+	case BMM_GET_ALLOCATED_SPACE:
+		output = bmm_get_allocated_size();
+		break;
+	case BMM_FLUSH_CACHE:
+		output = bmm_flush_cache(input, bmm_arg);
+		break;
+#ifdef BMM_HAS_DMA_MEMCPY
+	case BMM_DMA_MEMCPY:
+		output = bmm_dma_memcpy(input, output, length);
+		break;
+	case BMM_DMA_SYNC:
+		bmm_dma_sync();
+		break;
+#endif
+	case BMM_CONSISTENT_SYNC:
+		bmm_consistent_sync(input, length, bmm_arg);
+		break;
+	case BMM_DUMP:
+		bmm_dump_all();
+		break;
+	default:
+		output = -EINVAL;
+		break;
+	}
+
+	io.output = output;
+	if(copy_to_user((void *)arg, &io, sizeof(io))) {
+		pr_debug("bmm_ioctl() error in copy_to_user()\n");
+		return -EFAULT;
+	}
+
+	if(IS_ERR((void *)output))
+		return (int)output;
+	else
+		return 0;
+}
+
+/*
+ *********************************************************************  
+ * Structure:  	file operations structure
+ * Description: General I/O file operations functions.
+ *********************************************************************
+ */
+ 
+static struct file_operations bmm_fops = 
+{
+	.ioctl		= bmm_ioctl,
+	.mmap		= bmm_mmap,
+};
+
+static struct miscdevice bmm_misc = {
+	.minor	= BMM_MINOR,
+	.name	= "bmm",
+	.fops	= &bmm_fops,
+};
+
+#ifndef CONFIG_DOVE_VPU_USE_BMM
+static int __bmm_init(void)
+{
+	struct page *page;
+	unsigned long size;
+
+	bmm_size = bmm_size_mb * 1024 * 1024;
+	pr_debug("Trying to allocate %ldMB memory with an order=%d\n", bmm_size_mb, get_order(bmm_size));
+	
+	page = alloc_pages(GFP_KERNEL | __GFP_HIGHMEM, get_order(bmm_size));
+	if (page == NULL){
+		printk(KERN_ERR "Error allocating memory %ldMB\n", bmm_size_mb);
+		return -ENOMEM;
+	}
+	
+	bmm_paddr = page_to_pfn(page) << PAGE_SHIFT;
+
+	pr_debug("bmm_init: allocate page = 0x%08lx, pa = 0x%08lx\n", (unsigned long)page, bmm_paddr);
+
+	size = bmm_size;
+	while(size > 0) {
+		SetPageReserved(page);
+		page++;
+		size -= PAGE_SIZE;
+	}
+	return 0;
+}
+
+static void __bmm_exit(void)
+{
+	unsigned long size;
+	struct page *page;
+
+	pr_debug("BMM free memory\n");
+
+	page = pfn_to_page(bmm_paddr >> PAGE_SHIFT);
+	size = bmm_size;
+	while(size > 0) {
+		ClearPageReserved(page);
+		page++;
+		size -= PAGE_SIZE;
+	}
+
+	page = pfn_to_page(bmm_paddr >> PAGE_SHIFT);
+
+	pr_debug("bmm_exit: free page = 0x%08lx, pa = 0x%08lx, size=0x%08lx\n", (unsigned long)page, bmm_paddr, bmm_size);
+
+	__free_pages(page, get_order(bmm_size));
+}
+#else
+static int __bmm_init(void)
+{
+	unsigned int vmeta_memory_start, gpu_memory_start=0xffffffff;
+	int vmeta_size, gpu_size=0;
+
+	vmeta_memory_start = dove_vmeta_get_memory_start();
+	vmeta_size = dove_vmeta_get_memory_size();
+	printk("BMM Module Vmeta memroy start: 0x%x, size: %d\n", vmeta_memory_start, vmeta_size);
+
+#ifdef CONFIG_DOVE_GPU_USE_BMM
+	gpu_memory_start = dove_gpu_get_memory_start();
+	gpu_size = dove_gpu_get_memory_size();
+	printk("BMM Module GPU memory start: 0x%x, size %d\n", gpu_memory_start, gpu_size);
+#endif
+
+	bmm_size = vmeta_size + gpu_size;
+	bmm_size_mb = bmm_size / 1024 / 1024;
+	bmm_paddr = (vmeta_memory_start > gpu_memory_start) ? gpu_memory_start : vmeta_memory_start;
+	return 0;
+}
+
+static void __bmm_exit(void)
+{
+	return;
+}
+
+#endif
+
+/*
+ *********************************************************************  
+ * Function:  	bmm_init
+ * Description: General I/O initialization routine.
+ *********************************************************************
+ */
+
+static int __init bmm_init(void)
+{
+	bmm_block_t *new;
+	if(IS_ERR((void *)__bmm_init()))
+		return -ENOMEM;
+
+	mutex_init(&bmm_mutex);
+
+	bmm_free_size = bmm_size;
+	INIT_LIST_HEAD(&(bmm_free_block.list));
+	INIT_LIST_HEAD(&(bmm_used_block.list));
+
+	new = kmalloc(sizeof(bmm_block_t), GFP_KERNEL);
+	new->size = bmm_free_size;
+	new->vaddr = 0;
+	new->pid = 0;
+	new->attr = 0;
+	new->paddr = bmm_paddr;
+	INIT_LIST_HEAD(&(new->list));
+	bmm_insert(&(bmm_free_block.list), new, 0);
+
+	pr_debug("Trying to register misc device %s\n", bmm_misc.name);
+	if (misc_register(&bmm_misc)) {
+		printk(KERN_ERR "Error registering device %s\n", bmm_misc.name);
+		__bmm_exit();
+		return -EAGAIN;
+	}
+
+	pr_info("BMM init with size=%ldMB\n", bmm_size_mb);
+
+	return 0;
+}
+
+/*
+ *********************************************************************  
+ * Function:  	bmm_exit
+ * Description: General I/O deregister routine.
+ **********************************************************************
+ */
+static void __exit bmm_exit(void)
+{
+	bmm_block_t *pbmm;
+	struct list_head *head;
+
+#ifdef DEBUG
+	bmm_dump_all();
+#endif
+
+	pr_debug("Trying to free bmm_free_list.\n");
+	head = &(bmm_free_block.list);
+	while(!list_empty(head)) {
+		pbmm = list_entry(head->next, bmm_block_t, list);
+		list_del(&(pbmm->list));
+		kfree(pbmm);
+	}
+	pr_debug("Trying to free bmm_used_list.\n");
+	head = &(bmm_used_block.list);
+	while(!list_empty(head)) {
+		pbmm = list_entry(head->next, bmm_block_t, list);
+		list_del(&(pbmm->list));
+		kfree(pbmm);
+	}
+	pr_debug("Trying to deregister misc device %s\n", bmm_misc.name);
+	misc_deregister(&bmm_misc);
+	__bmm_exit();
+	pr_info("BMM exit\n");
+}
+
+module_init(bmm_init);
+module_exit(bmm_exit);
+
--- linux-mvl-dove-2.6.32.orig/drivers/misc/sgi-xp/xpc_uv.c
+++ linux-mvl-dove-2.6.32/drivers/misc/sgi-xp/xpc_uv.c
@@ -203,6 +203,7 @@
 	enum xp_retval xp_ret;
 	int ret;
 	int nid;
+	int nasid;
 	int pg_order;
 	struct page *page;
 	struct xpc_gru_mq_uv *mq;
@@ -258,9 +259,11 @@
 		goto out_5;
 	}
 
+	nasid = UV_PNODE_TO_NASID(uv_cpu_to_pnode(cpu));
+
 	mmr_value = (struct uv_IO_APIC_route_entry *)&mq->mmr_value;
 	ret = gru_create_message_queue(mq->gru_mq_desc, mq->address, mq_size,
-				       nid, mmr_value->vector, mmr_value->dest);
+				     nasid, mmr_value->vector, mmr_value->dest);
 	if (ret != 0) {
 		dev_err(xpc_part, "gru_create_message_queue() returned "
 			"error=%d\n", ret);
@@ -409,6 +412,7 @@
 static void
 xpc_handle_activate_mq_msg_uv(struct xpc_partition *part,
 			      struct xpc_activate_mq_msghdr_uv *msg_hdr,
+			      int part_setup,
 			      int *wakeup_hb_checker)
 {
 	unsigned long irq_flags;
@@ -473,6 +477,9 @@
 	case XPC_ACTIVATE_MQ_MSG_CHCTL_CLOSEREQUEST_UV: {
 		struct xpc_activate_mq_msg_chctl_closerequest_uv *msg;
 
+		if (!part_setup)
+			break;
+
 		msg = container_of(msg_hdr, struct
 				   xpc_activate_mq_msg_chctl_closerequest_uv,
 				   hdr);
@@ -489,6 +496,9 @@
 	case XPC_ACTIVATE_MQ_MSG_CHCTL_CLOSEREPLY_UV: {
 		struct xpc_activate_mq_msg_chctl_closereply_uv *msg;
 
+		if (!part_setup)
+			break;
+
 		msg = container_of(msg_hdr, struct
 				   xpc_activate_mq_msg_chctl_closereply_uv,
 				   hdr);
@@ -503,6 +513,9 @@
 	case XPC_ACTIVATE_MQ_MSG_CHCTL_OPENREQUEST_UV: {
 		struct xpc_activate_mq_msg_chctl_openrequest_uv *msg;
 
+		if (!part_setup)
+			break;
+
 		msg = container_of(msg_hdr, struct
 				   xpc_activate_mq_msg_chctl_openrequest_uv,
 				   hdr);
@@ -520,6 +533,9 @@
 	case XPC_ACTIVATE_MQ_MSG_CHCTL_OPENREPLY_UV: {
 		struct xpc_activate_mq_msg_chctl_openreply_uv *msg;
 
+		if (!part_setup)
+			break;
+
 		msg = container_of(msg_hdr, struct
 				   xpc_activate_mq_msg_chctl_openreply_uv, hdr);
 		args = &part->remote_openclose_args[msg->ch_number];
@@ -537,6 +553,9 @@
 	case XPC_ACTIVATE_MQ_MSG_CHCTL_OPENCOMPLETE_UV: {
 		struct xpc_activate_mq_msg_chctl_opencomplete_uv *msg;
 
+		if (!part_setup)
+			break;
+
 		msg = container_of(msg_hdr, struct
 				xpc_activate_mq_msg_chctl_opencomplete_uv, hdr);
 		spin_lock_irqsave(&part->chctl_lock, irq_flags);
@@ -613,6 +632,7 @@
 
 			part_referenced = xpc_part_ref(part);
 			xpc_handle_activate_mq_msg_uv(part, msg_hdr,
+						      part_referenced,
 						      &wakeup_hb_checker);
 			if (part_referenced)
 				xpc_part_deref(part);
@@ -945,11 +965,13 @@
 		head->first = first->next;
 		if (head->first == NULL)
 			head->last = NULL;
+
+		head->n_entries--;
+		BUG_ON(head->n_entries < 0);
+
+		first->next = NULL;
 	}
-	head->n_entries--;
-	BUG_ON(head->n_entries < 0);
 	spin_unlock_irqrestore(&head->lock, irq_flags);
-	first->next = NULL;
 	return first;
 }
 
@@ -1018,7 +1040,8 @@
 	xpc_send_activate_IRQ_part_uv(part, &msg, sizeof(msg),
 				      XPC_ACTIVATE_MQ_MSG_SYNC_ACT_STATE_UV);
 
-	while (part->sn.uv.remote_act_state != XPC_P_AS_ACTIVATING) {
+	while (!((part->sn.uv.remote_act_state == XPC_P_AS_ACTIVATING) ||
+		 (part->sn.uv.remote_act_state == XPC_P_AS_ACTIVE))) {
 
 		dev_dbg(xpc_part, "waiting to make first contact with "
 			"partition %d\n", XPC_PARTID(part));
@@ -1421,7 +1444,6 @@
 	msg_slot = ch_uv->recv_msg_slots +
 	    (msg->hdr.msg_slot_number % ch->remote_nentries) * ch->entry_size;
 
-	BUG_ON(msg->hdr.msg_slot_number != msg_slot->hdr.msg_slot_number);
 	BUG_ON(msg_slot->hdr.size != 0);
 
 	memcpy(msg_slot, msg, msg->hdr.size);
@@ -1645,8 +1667,6 @@
 			       sizeof(struct xpc_notify_mq_msghdr_uv));
 	if (ret != xpSuccess)
 		XPC_DEACTIVATE_PARTITION(&xpc_partitions[ch->partid], ret);
-
-	msg->hdr.msg_slot_number += ch->remote_nentries;
 }
 
 static struct xpc_arch_operations xpc_arch_ops_uv = {
--- linux-mvl-dove-2.6.32.orig/drivers/misc/sgi-xp/xpc_partition.c
+++ linux-mvl-dove-2.6.32/drivers/misc/sgi-xp/xpc_partition.c
@@ -433,18 +433,23 @@
 	 * nodes that can comprise an access protection grouping. The access
 	 * protection is in regards to memory, IOI and IPI.
 	 */
-	max_regions = 64;
 	region_size = xp_region_size;
 
-	switch (region_size) {
-	case 128:
-		max_regions *= 2;
-	case 64:
-		max_regions *= 2;
-	case 32:
-		max_regions *= 2;
-		region_size = 16;
-		DBUG_ON(!is_shub2());
+	if (is_uv())
+		max_regions = 256;
+	else {
+		max_regions = 64;
+
+		switch (region_size) {
+		case 128:
+			max_regions *= 2;
+		case 64:
+			max_regions *= 2;
+		case 32:
+			max_regions *= 2;
+			region_size = 16;
+			DBUG_ON(!is_shub2());
+		}
 	}
 
 	for (region = 0; region < max_regions; region++) {
--- linux-mvl-dove-2.6.32.orig/drivers/mtd/mtdconcat.c
+++ linux-mvl-dove-2.6.32/drivers/mtd/mtdconcat.c
@@ -306,7 +306,7 @@
 	if (!(mtd->flags & MTD_WRITEABLE))
 		return -EROFS;
 
-	ops->retlen = 0;
+	ops->retlen = ops->oobretlen = 0;
 
 	for (i = 0; i < concat->num_subdev; i++) {
 		struct mtd_info *subdev = concat->subdev[i];
@@ -321,7 +321,7 @@
 			devops.len = subdev->size - to;
 
 		err = subdev->write_oob(subdev, to, &devops);
-		ops->retlen += devops.retlen;
+		ops->retlen += devops.oobretlen;
 		if (err)
 			return err;
 
--- linux-mvl-dove-2.6.32.orig/drivers/mtd/cmdlinepart.c
+++ linux-mvl-dove-2.6.32/drivers/mtd/cmdlinepart.c
@@ -41,8 +41,8 @@
 
 
 /* special size referring to all the remaining space in a partition */
-#define SIZE_REMAINING UINT_MAX
-#define OFFSET_CONTINUOUS UINT_MAX
+#define SIZE_REMAINING LLONG_MAX
+#define OFFSET_CONTINUOUS LLONG_MAX
 
 struct cmdline_mtd_partition {
 	struct cmdline_mtd_partition *next;
@@ -74,8 +74,8 @@
                                       int extra_mem_size)
 {
 	struct mtd_partition *parts;
-	unsigned long size;
-	unsigned long offset = OFFSET_CONTINUOUS;
+	unsigned long long size;
+	unsigned long long offset = OFFSET_CONTINUOUS;
 	char *name;
 	int name_len;
 	unsigned char *extra_mem;
@@ -93,7 +93,7 @@
 		size = memparse(s, &s);
 		if (size < PAGE_SIZE)
 		{
-			printk(KERN_ERR ERRP "partition size too small (%lx)\n", size);
+			printk(KERN_ERR ERRP "partition size too small (%llx)\n", size);
 			return NULL;
 		}
 	}
@@ -304,7 +304,7 @@
                              struct mtd_partition **pparts,
                              unsigned long origin)
 {
-	unsigned long offset;
+	unsigned long long offset;
 	int i;
 	struct cmdline_mtd_partition *part;
 	const char *mtd_id = master->name;
--- linux-mvl-dove-2.6.32.orig/drivers/mtd/nand/orion_nfc.c
+++ linux-mvl-dove-2.6.32/drivers/mtd/nand/orion_nfc.c
@@ -0,0 +1,1403 @@
+/*
+ * drivers/mtd/nand/pxa3xx_nand.c
+ *
+ * Copyright c 2005 Intel Corporation
+ * Copyright c 2006 Marvell International Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+#include <linux/delay.h>
+#include <linux/clk.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <asm/dma.h>
+
+#include <mach/pxa-regs.h>
+//#include <asm/hardware/pxa-dma-regs.h>
+#include <asm/hardware/pxa-dma.h>
+#include <plat/orion_nfc.h>
+
+#define	CHIP_DELAY_TIMEOUT	(2 * HZ/10)
+
+/* registers and bit definitions */
+#define NDCR		(0x00) /* Control register */
+#define NDTR0CS0	(0x04) /* Timing Parameter 0 for CS0 */
+#define NDTR1CS0	(0x0C) /* Timing Parameter 1 for CS0 */
+#define NDSR		(0x14) /* Status Register */
+#define NDPCR		(0x18) /* Page Count Register */
+#define NDBDR0		(0x1C) /* Bad Block Register 0 */
+#define NDBDR1		(0x20) /* Bad Block Register 1 */
+#define NDECCCR		(0x28) /* ECC Control Register */
+#define NDDB		(0x40) /* Data Buffer */
+#define NDCB0		(0x48) /* Command Buffer0 */
+#define NDCB1		(0x4C) /* Command Buffer1 */
+#define NDCB2		(0x50) /* Command Buffer2 */
+
+#define NDCR_SPARE_EN		(0x1 << 31)
+#define NDCR_ECC_EN		(0x1 << 30)
+#define NDCR_DMA_EN		(0x1 << 29)
+#define NDCR_ND_RUN		(0x1 << 28)
+#define NDCR_DWIDTH_C		(0x1 << 27)
+#define NDCR_DWIDTH_M		(0x1 << 26)
+#define NDCR_PAGE_SZ		(0x1 << 24)
+#define NDCR_NCSX		(0x1 << 23)
+#define NDCR_ND_MODE		(0x3 << 21)
+#define NDCR_NAND_MODE   	(0x0)
+#define NDCR_CLR_PG_CNT		(0x1 << 20)
+#define NDCR_CLR_ECC		(0x1 << 19)
+#define NDCR_RD_ID_CNT_MASK	(0x7 << 16)
+#define NDCR_RD_ID_CNT(x)	(((x) << 16) & NDCR_RD_ID_CNT_MASK)
+
+#define NDCR_RA_START		(0x1 << 15)
+#define NDCR_PG_PER_BLK		(0x1 << 14)
+#define NDCR_ND_ARB_EN		(0x1 << 12)
+
+#define NDSR_MASK		(0xfff)
+#define NDSR_RDY		(0x1 << 11)
+#define NDSR_CS0_PAGED		(0x1 << 10)
+#define NDSR_CS1_PAGED		(0x1 << 9)
+#define NDSR_CS0_CMDD		(0x1 << 8)
+#define NDSR_CS1_CMDD		(0x1 << 7)
+#define NDSR_CS0_BBD		(0x1 << 6)
+#define NDSR_CS1_BBD		(0x1 << 5)
+#define NDSR_DBERR		(0x1 << 4)
+#define NDSR_SBERR		(0x1 << 3)
+#define NDSR_WRDREQ		(0x1 << 2)
+#define NDSR_RDDREQ		(0x1 << 1)
+#define NDSR_WRCMDREQ		(0x1)
+
+#define NDCB0_AUTO_RS		(0x1 << 25)
+#define NDCB0_CSEL		(0x1 << 24)
+#define NDCB0_CMD_TYPE_MASK	(0x7 << 21)
+#define NDCB0_CMD_TYPE(x)	(((x) << 21) & NDCB0_CMD_TYPE_MASK)
+#define NDCB0_NC		(0x1 << 20)
+#define NDCB0_DBC		(0x1 << 19)
+#define NDCB0_ADDR_CYC_MASK	(0x7 << 16)
+#define NDCB0_ADDR_CYC(x)	(((x) << 16) & NDCB0_ADDR_CYC_MASK)
+#define NDCB0_CMD2_MASK		(0xff << 8)
+#define NDCB0_CMD1_MASK		(0xff)
+#define NDCB0_ADDR_CYC_SHIFT	(16)
+
+#define NDECCCR_BCH_EN		(0x1 << 0)
+
+/* macros for registers read/write */
+#define nand_writel(info, off, val)	\
+	__raw_writel((val), (info)->mmio_base + (off))
+
+#define nand_readl(info, off)		\
+	__raw_readl((info)->mmio_base + (off))
+
+/* error code and state */
+enum {
+	ERR_NONE	= 0,
+	ERR_DMABUSERR	= -1,
+	ERR_SENDCMD	= -2,
+	ERR_DBERR	= -3,
+	ERR_BBERR	= -4,
+};
+
+enum {
+	STATE_READY	= 0,
+	STATE_CMD_HANDLE,
+	STATE_DMA_READING,
+	STATE_DMA_WRITING,
+	STATE_DMA_DONE,
+	STATE_PIO_READING,
+	STATE_PIO_WRITING,
+};
+
+struct pxa3xx_nand_timing {
+	unsigned int	tCH;  /* Enable signal hold time */
+	unsigned int	tCS;  /* Enable signal setup time */
+	unsigned int	tWH;  /* ND_nWE high duration */
+	unsigned int	tWP;  /* ND_nWE pulse time */
+	unsigned int	tRH;  /* ND_nRE high duration */
+	unsigned int	tRP;  /* ND_nRE pulse width */
+	unsigned int	tR;   /* ND_nWE high to ND_nRE low for read */
+	unsigned int	tWHR; /* ND_nWE high to ND_nRE low for status read */
+	unsigned int	tAR;  /* ND_ALE low to ND_nRE low delay */
+	unsigned int	tRHW; /* ND_nRE high to ND_nWE low delay */
+};
+
+struct pxa3xx_nand_cmdset {
+	uint16_t	read1;
+	uint16_t	read2;
+	uint16_t	program;
+	uint16_t	read_status;
+	uint16_t	read_id;
+	uint16_t	erase;
+	uint16_t	reset;
+	uint16_t	lock;
+	uint16_t	unlock;
+	uint16_t	lock_status;
+};
+
+struct pxa3xx_nand_flash {
+	struct pxa3xx_nand_timing *timing; /* NAND Flash timing */
+	struct pxa3xx_nand_cmdset *cmdset;
+
+	uint32_t page_per_block;/* Pages per block (PG_PER_BLK) */
+	uint32_t page_size;	/* Page size in bytes (PAGE_SZ) */
+	uint32_t flash_width;	/* Width of Flash memory (DWIDTH_M) */
+	uint32_t num_blocks;	/* Number of physical blocks in Flash */
+	uint32_t chip_id;
+
+	/* NOTE: these are automatically calculated, do not define */
+	size_t		oob_size;
+	size_t		read_id_bytes;
+
+	unsigned int	col_addr_cycles;
+	unsigned int	row_addr_cycles;
+};
+
+struct pxa3xx_nand_info {
+	struct nand_chip	nand_chip;
+
+	struct platform_device	 *pdev;
+	struct pxa3xx_nand_flash *flash_info;
+
+	struct clk		*clk;
+	void __iomem		*mmio_base;
+	unsigned int		mmio_phys_base;
+
+	unsigned int 		buf_start;
+	unsigned int		buf_count;
+
+	/* DMA information */
+	int			drcmr_dat;
+	int			drcmr_cmd;
+
+	unsigned char		*data_buff;
+	dma_addr_t 		data_buff_phys;
+	size_t			data_buff_size;
+	int 			data_dma_ch;
+	struct pxa_dma_desc	*data_desc;
+	dma_addr_t 		data_desc_addr;
+
+	uint32_t		reg_ndcr;
+
+	/* saved column/page_addr during CMD_SEQIN */
+	int			seqin_column;
+	int			seqin_page_addr;
+
+	/* relate to the command */
+	unsigned int		state;
+
+	int			use_ecc;	/* use HW ECC ? */
+	int			use_dma;	/* use DMA ? */
+	int			use_bch;	/* use BCH if use_ecc == 1 */
+
+	size_t			data_size;	/* data size in FIFO */
+	int 			retcode;
+	struct completion 	cmd_complete;
+
+	/* generated NDCBx register values */
+	uint32_t		ndcb0;
+	uint32_t		ndcb1;
+	uint32_t		ndcb2;
+};
+#if 0
+void nand_writel(struct pxa3xx_nand_info *info, unsigned int off, unsigned int val)
+{
+	printk("NFC Write: %08x = %08x\n", ((unsigned int)info->mmio_base + (off)), val);
+	__raw_writel(val, (info->mmio_base + off));
+}
+
+unsigned int nand_readl(struct pxa3xx_nand_info *info, unsigned int off)
+{
+	unsigned int reg = __raw_readl(info->mmio_base + off);
+	printk("NFC Read:  %08x = %08x\n", (unsigned int)(info->mmio_base + off), reg);
+	return reg;
+}
+#endif
+static int use_dma = 0;
+module_param(use_dma, bool, 0444);
+MODULE_PARM_DESC(use_dma, "enable DMA for data transfering to/from NAND HW");
+static int use_ecc = 0;
+module_param(use_ecc, bool, 0444);
+MODULE_PARM_DESC(use_ecc, "enable ECC calculation/checking for data transfering to/from NAND HW");
+static int use_bch = 0;
+module_param(use_bch, bool, 0444);
+MODULE_PARM_DESC(use_bch, "enable 16bit BCH ECC calculation if ECC operations are enabled");
+
+static struct pxa3xx_nand_cmdset smallpage_cmdset = {
+	.read1		= 0x0000,
+	.read2		= 0x0050,
+	.program	= 0x1080,
+	.read_status	= 0x0070,
+	.read_id	= 0x0090,
+	.erase		= 0xD060,
+	.reset		= 0x00FF,
+	.lock		= 0x002A,
+	.unlock		= 0x2423,
+	.lock_status	= 0x007A,
+};
+
+static struct pxa3xx_nand_cmdset largepage_cmdset = {
+	.read1		= 0x3000,
+	.read2		= 0x0050,
+	.program	= 0x1080,
+	.read_status	= 0x0070,
+	.read_id	= 0x0090,
+	.erase		= 0xD060,
+	.reset		= 0x00FF,
+	.lock		= 0x002A,
+	.unlock		= 0x2423,
+	.lock_status	= 0x007A,
+};
+
+static struct pxa3xx_nand_timing samsung512MbX16_timing = {
+	.tCH	= 10,
+	.tCS	= 0,
+	.tWH	= 20,
+	.tWP	= 40,
+	.tRH	= 30,
+	.tRP	= 40,
+	.tR	= 11123,
+	.tWHR	= 110,
+	.tAR	= 10,
+};
+
+static struct pxa3xx_nand_flash samsung512MbX16 = {
+	.timing		= &samsung512MbX16_timing,
+	.cmdset		= &smallpage_cmdset,
+	.page_per_block	= 32,
+	.page_size	= 512,
+	.flash_width	= 16,
+	.num_blocks	= 4096,
+	.chip_id	= 0x46ec,
+};
+
+static struct pxa3xx_nand_timing samsung16GbX8_timing = {
+	.tCH	= 5,
+	.tCS	= 20,
+	.tWH	= 10,
+	.tWP	= 15,
+	.tRH	= 15,
+	.tRP	= 15,
+	.tR	= 60000,
+	.tWHR	= 60,
+	.tAR	= 10,
+	.tRHW	= 100,
+};
+
+static struct pxa3xx_nand_flash samsung16GbX8 = {
+	.timing		= &samsung16GbX8_timing,
+	.cmdset		= &largepage_cmdset,
+	.page_per_block	= 128,
+	.page_size	= 2048,
+	.flash_width	= 8,
+	.num_blocks	= 4096,
+	.chip_id	= 0xd5ec,
+};
+
+static struct pxa3xx_nand_timing micron_timing = {
+	.tCH	= 10,
+	.tCS	= 25,
+	.tWH	= 15,
+	.tWP	= 25,
+	.tRH	= 15,
+	.tRP	= 25,
+	.tR	= 25000,
+	.tWHR	= 60,
+	.tAR	= 10,
+};
+
+static struct pxa3xx_nand_flash micron1GbX8 = {
+	.timing		= &micron_timing,
+	.cmdset		= &largepage_cmdset,
+	.page_per_block	= 64,
+	.page_size	= 2048,
+	.flash_width	= 8,
+	.num_blocks	= 1024,
+	.chip_id	= 0xa12c,
+};
+
+static struct pxa3xx_nand_flash micron1GbX16 = {
+	.timing		= &micron_timing,
+	.cmdset		= &largepage_cmdset,
+	.page_per_block	= 64,
+	.page_size	= 2048,
+	.flash_width	= 16,
+	.num_blocks	= 1024,
+	.chip_id	= 0xb12c,
+};
+
+static struct pxa3xx_nand_timing st_timing = {
+	.tCH	= 5,
+	.tCS	= 20,
+	.tWH	= 10,
+	.tWP	= 12,
+	.tRH	= 10,
+	.tRP	= 12,
+	.tR	= 60000,
+	.tWHR	= 80,
+	.tAR	= 10,
+	.tRHW	= 100,
+};
+
+static struct pxa3xx_nand_flash st8GbX8 = {
+	.timing		= &st_timing,
+	.cmdset		= &largepage_cmdset,
+	.page_per_block	= 64,
+	.page_size	= 2048,
+	.flash_width	= 8,
+	.num_blocks	= 2048,
+	.chip_id	= 0xD320,
+};
+
+static struct pxa3xx_nand_flash *builtin_flash_types[] = {
+	&st8GbX8,
+	&samsung512MbX16,
+	&samsung16GbX8,
+	&micron1GbX8,
+	&micron1GbX16,
+};
+
+#define NDTR0_tCH(c)	(min((c), 7) << 19)
+#define NDTR0_tCS(c)	(min((c), 7) << 16)
+#define NDTR0_tWH(c)	(min((c), 7) << 11)
+#define NDTR0_tWP(c)	(min((c), 7) << 8)
+#define NDTR0_tRH(c)	(min((c), 7) << 3)
+#define NDTR0_tRP(c)	(min((c), 7) << 0)
+
+#define NDTR1_tR(c)	(min((c), 65535) << 16)
+#define NDTR1_tWHR(c)	(min((c), 15) << 4)
+#define NDTR1_tAR(c)	(min((c), 15) << 0)
+#define NDTR1_tRHW(c)	(min((c), 3) << 8)
+
+/* convert nano-seconds to nand flash controller clock cycles */
+#define ns2cycle(ns, clk)	(int)(((ns) * (clk / 1000000) / 1000) + 1)
+
+static void pxa3xx_nand_set_timing(struct pxa3xx_nand_info *info,
+				   struct pxa3xx_nand_timing *t)
+{
+	struct nfc_platform_data *pdata = info->pdev->dev.platform_data;	
+	unsigned int nand_clk = pdata->tclk;	
+	uint32_t ndtr0, ndtr1;
+
+	ndtr0 = NDTR0_tCH(ns2cycle(t->tCH, nand_clk)) |
+		NDTR0_tCS(ns2cycle(t->tCS, nand_clk)) |
+		NDTR0_tWH(ns2cycle(t->tWH, nand_clk)) |
+		NDTR0_tWP(ns2cycle(t->tWP, nand_clk)) |
+		NDTR0_tRH(ns2cycle(t->tRH, nand_clk)) |
+		NDTR0_tRP(ns2cycle(t->tRP, nand_clk));
+
+	ndtr1 = NDTR1_tR(ns2cycle(t->tR, nand_clk)) |
+		NDTR1_tWHR(ns2cycle(t->tWHR, nand_clk)) |
+		NDTR1_tAR(ns2cycle(t->tAR, nand_clk));
+	if (t->tRHW != 0) {
+		ndtr1 |= NDTR1_tRHW(ns2cycle(t->tRHW, nand_clk));
+	}
+
+	nand_writel(info, NDTR0CS0, ndtr0);
+	nand_writel(info, NDTR1CS0, ndtr1);
+}
+
+#define WAIT_EVENT_TIMEOUT	10
+
+static int wait_for_event(struct pxa3xx_nand_info *info, uint32_t event)
+{
+	int timeout = WAIT_EVENT_TIMEOUT;
+	uint32_t ndsr;
+
+	while (timeout--) {
+		ndsr = nand_readl(info, NDSR) & NDSR_MASK;
+		if (ndsr & event) {
+			nand_writel(info, NDSR, ndsr);
+			return 0;
+		}
+		udelay(10);
+	}
+
+	return -ETIMEDOUT;
+}
+
+static int prepare_read_prog_cmd(struct pxa3xx_nand_info *info,
+			uint16_t cmd, int column, int page_addr)
+{
+	struct pxa3xx_nand_flash *f = info->flash_info;
+	struct pxa3xx_nand_cmdset *cmdset = f->cmdset;
+#if 0
+	/* calculate data size */
+	if (info->use_dma)
+		if (f->page_size < 2048)
+			info->data_size = 544;				
+		else
+			info->data_size = (info->use_bch) ? 2080 : 2112;
+	else
+		if (f->page_size < 2048)
+			info->data_size = (info->use_ecc) ? 520 : 528;				
+		else
+			if (info->use_bch) info->data_size = 2080;
+			else if (info->use_ecc) info->data_size = 2088;
+			else info->data_size = 2112;
+#endif
+	
+	switch (f->page_size) {
+	case 2048:
+		info->data_size = (info->use_ecc) ? 2088 : 2112;
+		break;
+	case 512:
+		info->data_size = (info->use_ecc) ? 520 : 528;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	/* generate values for NDCBx registers */
+	info->ndcb0 = cmd | ((cmd & 0xff00) ? NDCB0_DBC : 0);
+	info->ndcb1 = 0;
+	info->ndcb2 = 0;
+	info->ndcb0 |= NDCB0_ADDR_CYC(f->row_addr_cycles + f->col_addr_cycles);
+
+	if (f->col_addr_cycles == 2) {
+		/* large block, 2 cycles for column address
+		 * row address starts from 3rd cycle
+		 */
+		info->ndcb1 |= (page_addr << 16) | (column & 0xffff);
+		if (f->row_addr_cycles == 3)
+			info->ndcb2 = (page_addr >> 16) & 0xff;
+	} else
+		/* small block, 1 cycles for column address
+		 * row address starts from 2nd cycle
+		 */
+		info->ndcb1 = (page_addr << 8) | (column & 0xff);
+
+	if (cmd == cmdset->program)
+		info->ndcb0 |= NDCB0_CMD_TYPE(1) | NDCB0_AUTO_RS;
+
+	return 0;
+}
+
+static int prepare_erase_cmd(struct pxa3xx_nand_info *info,
+			uint16_t cmd, int page_addr)
+{
+	info->ndcb0 = cmd | ((cmd & 0xff00) ? NDCB0_DBC : 0);
+	info->ndcb0 |= NDCB0_CMD_TYPE(2) | NDCB0_AUTO_RS | NDCB0_ADDR_CYC(3);
+	info->ndcb1 = page_addr;
+	info->ndcb2 = 0;
+	return 0;
+}
+
+static int prepare_other_cmd(struct pxa3xx_nand_info *info, uint16_t cmd)
+{
+	struct pxa3xx_nand_cmdset *cmdset = info->flash_info->cmdset;
+
+	info->ndcb0 = cmd | ((cmd & 0xff00) ? NDCB0_DBC : 0);
+	info->ndcb1 = 0;
+	info->ndcb2 = 0;
+
+	if (cmd == cmdset->read_id) {
+		info->ndcb0 |= NDCB0_CMD_TYPE(3);
+		info->ndcb0 |= 0x10000;
+		info->data_size = 8;
+	} else if (cmd == cmdset->read_status) {
+		info->ndcb0 |= NDCB0_CMD_TYPE(4);
+		info->data_size = 8;
+	} else if (cmd == cmdset->reset || cmd == cmdset->lock ||
+		   cmd == cmdset->unlock) {
+		info->ndcb0 |= NDCB0_CMD_TYPE(5);
+	} else
+		return -EINVAL;
+
+	return 0;
+}
+
+static void enable_int(struct pxa3xx_nand_info *info, uint32_t int_mask)
+{
+	uint32_t ndcr;
+
+	ndcr = nand_readl(info, NDCR);
+	nand_writel(info, NDCR, ndcr & ~int_mask);
+}
+
+static void disable_int(struct pxa3xx_nand_info *info, uint32_t int_mask)
+{
+	uint32_t ndcr;
+
+	ndcr = nand_readl(info, NDCR);
+	nand_writel(info, NDCR, ndcr | int_mask);
+}
+
+/* NOTE: it is a must to set ND_RUN firstly, then write command buffer
+ * otherwise, it does not work
+ */
+static int write_cmd(struct pxa3xx_nand_info *info, int allow_ecc)
+{
+	uint32_t ndcr, ecc_ctrl;
+
+	ecc_ctrl = nand_readl(info, NDECCCR);
+
+	/* clear status bits and run */
+	nand_writel(info, NDSR, NDSR_MASK);
+
+	ndcr = info->reg_ndcr;
+	if (allow_ecc) {
+		ndcr |= info->use_ecc ? NDCR_ECC_EN : 0;
+		ecc_ctrl |= info->use_bch ? NDECCCR_BCH_EN : 0;
+	}
+	else {
+		ndcr &= ~NDCR_ECC_EN;
+		ecc_ctrl &= ~NDECCCR_BCH_EN;
+	}
+
+	ndcr |= info->use_dma ? NDCR_DMA_EN : 0;
+	ndcr |= NDCR_ND_RUN;
+
+	nand_writel(info, NDCR, ndcr);
+	nand_writel(info, NDECCCR, ecc_ctrl);
+
+	if (wait_for_event(info, NDSR_WRCMDREQ)) {
+		printk(KERN_ERR "timed out writing command\n");
+		return -ETIMEDOUT;
+	}
+
+	nand_writel(info, NDCB0, info->ndcb0);
+	nand_writel(info, NDCB0, info->ndcb1);
+	nand_writel(info, NDCB0, info->ndcb2);
+	return 0;
+}
+
+static int handle_data_pio(struct pxa3xx_nand_info *info)
+{
+	int ret, timeout = CHIP_DELAY_TIMEOUT;
+
+	switch (info->state) {
+	case STATE_PIO_WRITING:
+		__raw_writesl(info->mmio_base + NDDB, info->data_buff,
+				info->data_size >> 2);
+
+		enable_int(info, NDSR_CS0_BBD | NDSR_CS0_CMDD);
+
+		ret = wait_for_completion_timeout(&info->cmd_complete, timeout);
+		if (!ret) {
+			printk(KERN_ERR "program command time out\n");
+			return -1;
+		}
+		break;
+	case STATE_PIO_READING:
+		__raw_readsl(info->mmio_base + NDDB, info->data_buff,
+				info->data_size >> 2);
+		break;
+	default:
+		printk(KERN_ERR "%s: invalid state %d\n", __func__,
+				info->state);
+		return -EINVAL;
+	}
+
+	info->state = STATE_READY;
+	return 0;
+}
+
+static void start_data_dma(struct pxa3xx_nand_info *info, int dir_out)
+{
+	struct pxa_dma_desc *desc = info->data_desc;
+	int dma_len = ALIGN(info->data_size, 32);
+
+	desc->ddadr = DDADR_STOP;
+	desc->dcmd = DCMD_ENDIRQEN | DCMD_WIDTH8 | DCMD_BURST32 | dma_len;
+
+	if (dir_out) {
+		desc->dsadr = info->data_buff_phys;
+		desc->dtadr = (info->mmio_phys_base + NDDB);
+		desc->dcmd |= DCMD_INCSRCADDR | DCMD_FLOWTRG | DCMD_OVERREAD;
+	} else {
+		desc->dtadr = info->data_buff_phys;
+		desc->dsadr = (info->mmio_phys_base + NDDB);
+		desc->dcmd |= DCMD_INCTRGADDR | DCMD_FLOWSRC | DCMD_OVERREAD;
+	}
+
+	DRCMR(info->drcmr_dat) = DRCMR_MAPVLD | info->data_dma_ch;
+	DDADR(info->data_dma_ch) = info->data_desc_addr;
+	DCSR(info->data_dma_ch) |= DCSR_RUN;
+}
+
+static void pxa3xx_nand_data_dma_irq(int channel, void *data)
+{
+	struct pxa3xx_nand_info *info = data;
+	uint32_t dcsr;
+
+	dcsr = DCSR(channel);
+	DCSR(channel) = dcsr;
+
+	if (dcsr & DCSR_BUSERR) {
+		info->retcode = ERR_DMABUSERR;
+		complete(&info->cmd_complete);
+	}
+
+	if (info->state == STATE_DMA_WRITING) {
+		info->state = STATE_DMA_DONE;
+		enable_int(info, NDSR_CS0_BBD | NDSR_CS0_CMDD);
+	} else {
+		info->state = STATE_READY;
+		complete(&info->cmd_complete);
+	}
+}
+
+static irqreturn_t pxa3xx_nand_irq(int irq, void *devid)
+{
+	struct pxa3xx_nand_info *info = devid;
+	unsigned int status;
+
+	status = nand_readl(info, NDSR);
+
+	if (status & (NDSR_RDDREQ | NDSR_DBERR)) {
+		if (status & NDSR_DBERR)
+			info->retcode = ERR_DBERR;
+
+		disable_int(info, NDSR_RDDREQ | NDSR_DBERR);
+
+		if (info->use_dma) {
+			info->state = STATE_DMA_READING;
+			start_data_dma(info, 0);
+		} else {
+			info->state = STATE_PIO_READING;
+			complete(&info->cmd_complete);
+		}
+	} else if (status & NDSR_WRDREQ) {
+		disable_int(info, NDSR_WRDREQ);
+		if (info->use_dma) {
+			info->state = STATE_DMA_WRITING;
+			start_data_dma(info, 1);
+		} else {
+			info->state = STATE_PIO_WRITING;
+			complete(&info->cmd_complete);
+		}
+	} else if (status & (NDSR_CS0_BBD | NDSR_CS0_CMDD)) {
+		if (status & NDSR_CS0_BBD)
+			info->retcode = ERR_BBERR;
+
+		disable_int(info, NDSR_CS0_BBD | NDSR_CS0_CMDD);
+		info->state = STATE_READY;
+		complete(&info->cmd_complete);
+	}
+	nand_writel(info, NDSR, status);
+	return IRQ_HANDLED;
+}
+
+static int pxa3xx_nand_do_cmd(struct pxa3xx_nand_info *info, uint32_t event, int allow_ecc)
+{
+	uint32_t ndcr;
+	int ret, timeout = CHIP_DELAY_TIMEOUT;
+
+	if (write_cmd(info, allow_ecc)) {
+		info->retcode = ERR_SENDCMD;
+		goto fail_stop;
+	}
+
+	info->state = STATE_CMD_HANDLE;
+
+	enable_int(info, event);
+
+	ret = wait_for_completion_timeout(&info->cmd_complete, timeout);
+	if (!ret) {
+		printk(KERN_ERR "command execution timed out\n");
+		info->retcode = ERR_SENDCMD;
+		goto fail_stop;
+	}
+
+	if (info->use_dma == 0 && info->data_size > 0)
+		if (handle_data_pio(info))
+			goto fail_stop;
+
+	return 0;
+
+fail_stop:
+	ndcr = nand_readl(info, NDCR);
+	nand_writel(info, NDCR, ndcr & ~NDCR_ND_RUN);
+	udelay(10);
+	return -ETIMEDOUT;
+}
+
+static int pxa3xx_nand_dev_ready(struct mtd_info *mtd)
+{
+	struct pxa3xx_nand_info *info = mtd->priv;
+	return (nand_readl(info, NDSR) & NDSR_RDY) ? 1 : 0;
+}
+
+static inline int is_buf_blank(uint8_t *buf, size_t len)
+{
+	for (; len > 0; len--)
+		if (*buf++ != 0xff)
+			return 0;
+	return 1;
+}
+
+static void pxa3xx_nand_cmdfunc(struct mtd_info *mtd, unsigned command,
+				int column, int page_addr)
+{
+	struct pxa3xx_nand_info *info = mtd->priv;
+	struct pxa3xx_nand_flash *flash_info = info->flash_info;
+	struct pxa3xx_nand_cmdset *cmdset = flash_info->cmdset;
+	int ret;
+
+	info->use_dma = (use_dma) ? 1 : 0;
+	info->use_bch = (use_bch) ? 1 : 0;
+	info->use_ecc = 0;
+	info->data_size = 0;
+	info->state = STATE_READY;
+
+	init_completion(&info->cmd_complete);
+
+	switch (command) {
+	case NAND_CMD_READOOB:
+		/* disable HW ECC to get all the OOB data */
+		info->buf_count = mtd->writesize + mtd->oobsize;
+		info->buf_start = mtd->writesize + column;
+
+		if (prepare_read_prog_cmd(info, cmdset->read1, column, page_addr))
+			break;
+
+		pxa3xx_nand_do_cmd(info, (NDSR_RDDREQ | NDSR_DBERR), 1);
+
+		/* We only are OOB, so if the data has error, does not matter */
+		if (info->retcode == ERR_DBERR)
+			info->retcode = ERR_NONE;
+		break;
+
+	case NAND_CMD_READ0:
+		info->use_ecc = 1;
+		info->retcode = ERR_NONE;
+		info->buf_start = column;
+		info->buf_count = mtd->writesize + mtd->oobsize;
+		memset(info->data_buff, 0xFF, info->buf_count);
+
+		if (prepare_read_prog_cmd(info, cmdset->read1, column, page_addr))
+			break;
+
+		pxa3xx_nand_do_cmd(info, (NDSR_RDDREQ | NDSR_DBERR), 1);
+
+		if (info->retcode == ERR_DBERR) {
+			/* for blank page (all 0xff), HW will calculate its ECC as
+			 * 0, which is different from the ECC information within
+			 * OOB, ignore such double bit errors
+			 */
+			if (is_buf_blank(info->data_buff, mtd->writesize))
+				info->retcode = ERR_NONE;
+		}
+		break;
+	case NAND_CMD_SEQIN:
+		info->buf_start = column;
+		info->buf_count = mtd->writesize + mtd->oobsize;
+		memset(info->data_buff, 0xff, info->buf_count);
+
+		/* save column/page_addr for next CMD_PAGEPROG */
+		info->seqin_column = column;
+		info->seqin_page_addr = page_addr;
+		break;
+	case NAND_CMD_PAGEPROG:
+		info->use_ecc = (info->seqin_column >= mtd->writesize) ? 0 : 1;
+
+		if (prepare_read_prog_cmd(info, cmdset->program,
+				info->seqin_column, info->seqin_page_addr))
+			break;
+
+		pxa3xx_nand_do_cmd(info, NDSR_WRDREQ, 1);
+		break;
+	case NAND_CMD_ERASE1:
+		if (prepare_erase_cmd(info, cmdset->erase, page_addr))
+			break;
+
+		pxa3xx_nand_do_cmd(info, (NDSR_CS0_BBD | NDSR_CS0_CMDD), 0);
+		break;
+	case NAND_CMD_ERASE2:
+		break;
+	case NAND_CMD_READID:
+	case NAND_CMD_STATUS:
+		info->use_dma = 0;	/* force PIO read */
+		info->buf_start = 0;
+		info->buf_count = (command == NAND_CMD_READID) ?
+				flash_info->read_id_bytes : 1;
+
+		if (prepare_other_cmd(info, (command == NAND_CMD_READID) ?
+				cmdset->read_id : cmdset->read_status))
+			break;
+
+		pxa3xx_nand_do_cmd(info, NDSR_RDDREQ, 0);
+		break;
+	case NAND_CMD_RESET:
+		if (prepare_other_cmd(info, cmdset->reset))
+			break;
+
+		ret = pxa3xx_nand_do_cmd(info, NDSR_CS0_CMDD, 0);
+		if (ret == 0) {
+			int timeout = 2;
+			uint32_t ndcr;
+
+			while (timeout--) {
+				if (nand_readl(info, NDSR) & NDSR_RDY)
+					break;
+				msleep(10);
+			}
+
+			ndcr = nand_readl(info, NDCR);
+			nand_writel(info, NDCR, ndcr & ~NDCR_ND_RUN);
+		}
+		break;
+	default:
+		printk(KERN_ERR "non-supported command.\n");
+		break;
+	}
+
+	if (info->retcode == ERR_DBERR) {
+		printk(KERN_ERR "double bit error @ page %08x\n", page_addr);
+		info->retcode = ERR_NONE;
+	}
+}
+
+static uint8_t pxa3xx_nand_read_byte(struct mtd_info *mtd)
+{
+	struct pxa3xx_nand_info *info = mtd->priv;
+	char retval = 0xFF;
+
+	if (info->buf_start < info->buf_count)
+		/* Has just send a new command? */
+		retval = info->data_buff[info->buf_start++];
+
+	return retval;
+}
+
+static u16 pxa3xx_nand_read_word(struct mtd_info *mtd)
+{
+	struct pxa3xx_nand_info *info = mtd->priv;
+	u16 retval = 0xFFFF;
+
+	if (!(info->buf_start & 0x01) && info->buf_start < info->buf_count) {
+		retval = *((u16 *)(info->data_buff+info->buf_start));
+		info->buf_start += 2;
+	}
+	return retval;
+}
+
+static void pxa3xx_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
+{
+	struct pxa3xx_nand_info *info = mtd->priv;
+	int real_len = min_t(size_t, len, info->buf_count - info->buf_start);
+
+	memcpy(buf, info->data_buff + info->buf_start, real_len);
+	info->buf_start += real_len;
+}
+
+static void pxa3xx_nand_write_buf(struct mtd_info *mtd,
+		const uint8_t *buf, int len)
+{
+	struct pxa3xx_nand_info *info = mtd->priv;
+	int real_len = min_t(size_t, len, info->buf_count - info->buf_start);
+
+	memcpy(info->data_buff + info->buf_start, buf, real_len);
+	info->buf_start += real_len;
+}
+
+static int pxa3xx_nand_verify_buf(struct mtd_info *mtd,
+		const uint8_t *buf, int len)
+{
+	return 0;
+}
+
+static void pxa3xx_nand_select_chip(struct mtd_info *mtd, int chip)
+{
+	return;
+}
+
+static int pxa3xx_nand_waitfunc(struct mtd_info *mtd, struct nand_chip *this)
+{
+	struct pxa3xx_nand_info *info = mtd->priv;
+
+	/* pxa3xx_nand_send_command has waited for command complete */
+	if (this->state == FL_WRITING || this->state == FL_ERASING) {
+		if (info->retcode == ERR_NONE)
+			return 0;
+		else {
+			/*
+			 * any error make it return 0x01 which will tell
+			 * the caller the erase and write fail
+			 */
+			return 0x01;
+		}
+	}
+
+	return 0;
+}
+
+static void pxa3xx_nand_ecc_hwctl(struct mtd_info *mtd, int mode)
+{
+	return;
+}
+
+static int pxa3xx_nand_ecc_calculate(struct mtd_info *mtd,
+		const uint8_t *dat, uint8_t *ecc_code)
+{
+	return 0;
+}
+
+static int pxa3xx_nand_ecc_correct(struct mtd_info *mtd,
+		uint8_t *dat, uint8_t *read_ecc, uint8_t *calc_ecc)
+{
+	struct pxa3xx_nand_info *info = mtd->priv;
+	/*
+	 * Any error include ERR_SEND_CMD, ERR_DBERR, ERR_BUSERR, we
+	 * consider it as a ecc error which will tell the caller the
+	 * read fail We have distinguish all the errors, but the
+	 * nand_read_ecc only check this function return value
+	 */
+	if (info->retcode != ERR_NONE)
+		return -1;
+
+	return 0;
+}
+
+static int __readid(struct pxa3xx_nand_info *info, uint32_t *id)
+{
+	struct pxa3xx_nand_flash *f = info->flash_info;
+	struct pxa3xx_nand_cmdset *cmdset = f->cmdset;
+	uint32_t ndcr;
+	uint8_t  id_buff[8];
+
+	if (prepare_other_cmd(info, cmdset->read_id)) {
+		printk(KERN_ERR "failed to prepare command\n");
+		return -EINVAL;
+	}
+
+	/* Send command, don't allow ecc for read_id command */
+	if (write_cmd(info, 0))
+		goto fail_timeout;
+
+	/* Wait for CMDDM(command done successfully) */
+	if (wait_for_event(info, NDSR_RDDREQ))
+		goto fail_timeout;
+
+	__raw_readsl(info->mmio_base + NDDB, id_buff, 2);
+	*id = id_buff[0] | (id_buff[1] << 8);
+	return 0;
+
+fail_timeout:
+	ndcr = nand_readl(info, NDCR);
+	nand_writel(info, NDCR, ndcr & ~NDCR_ND_RUN);
+	udelay(10);
+	return -ETIMEDOUT;
+}
+
+static int pxa3xx_nand_config_flash(struct pxa3xx_nand_info *info,
+				    struct pxa3xx_nand_flash *f)
+{
+	struct platform_device *pdev = info->pdev;
+	struct nfc_platform_data *pdata = pdev->dev.platform_data;
+	uint32_t ndcr = 0x00000FFF; /* disable all interrupts */
+
+	if (f->page_size != 2048 && f->page_size != 512)
+		return -EINVAL;
+
+	if (f->flash_width != 16 && f->flash_width != 8)
+		return -EINVAL;
+
+	/* calculate flash information */
+	f->oob_size = (f->page_size == 2048) ? 64 : 16;
+	f->read_id_bytes = (f->page_size == 2048) ? 4 : 2;
+
+	/* calculate addressing information */
+	f->col_addr_cycles = (f->page_size == 2048) ? 2 : 1;
+
+	if (f->num_blocks * f->page_per_block > 65536)
+		f->row_addr_cycles = 3;
+	else
+		f->row_addr_cycles = 2;
+
+	ndcr |= NDCR_ND_ARB_EN; /* enable arbiter always for NAND */
+	ndcr |= (f->col_addr_cycles == 2) ? NDCR_RA_START : 0;
+	ndcr |= (f->page_per_block == 64) ? NDCR_PG_PER_BLK : 0;
+	ndcr |= (f->page_size == 2048) ? NDCR_PAGE_SZ : 0;
+	ndcr |= (f->flash_width == 16) ? NDCR_DWIDTH_M : 0;
+	ndcr |= (pdata->nfc_width == 16) ? NDCR_DWIDTH_C : 0;
+
+	ndcr |= NDCR_RD_ID_CNT(f->read_id_bytes);
+	ndcr |= NDCR_SPARE_EN; /* enable spare by default */
+
+	info->reg_ndcr = ndcr;
+
+	pxa3xx_nand_set_timing(info, f->timing);
+	info->flash_info = f;
+	return 0;
+}
+
+static int pxa3xx_nand_detect_flash(struct pxa3xx_nand_info *info)
+{
+	struct pxa3xx_nand_flash *f;
+	uint32_t id;
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(builtin_flash_types); i++) {
+		f = builtin_flash_types[i];
+
+		if (pxa3xx_nand_config_flash(info, f))
+			continue;
+
+		if (__readid(info, &id))
+			continue;
+
+		if (id == f->chip_id)
+			return 0;
+	}
+
+	return -ENODEV;
+}
+
+/* the maximum possible buffer size for large page with OOB data
+ * is: 2048 + 64 = 2112 bytes, allocate a page here for both the
+ * data buffer and the DMA descriptor
+ */
+#define MAX_BUFF_SIZE	PAGE_SIZE
+
+static int pxa3xx_nand_init_buff(struct pxa3xx_nand_info *info)
+{
+	struct platform_device *pdev = info->pdev;
+	int data_desc_offset = MAX_BUFF_SIZE - sizeof(struct pxa_dma_desc);
+
+	if (use_dma == 0) {
+		info->data_buff = kmalloc(MAX_BUFF_SIZE, GFP_KERNEL);
+		if (info->data_buff == NULL)
+			return -ENOMEM;
+		return 0;
+	}
+
+	info->data_buff = dma_alloc_coherent(&pdev->dev, MAX_BUFF_SIZE,
+				&info->data_buff_phys, GFP_KERNEL);
+	if (info->data_buff == NULL) {
+		dev_err(&pdev->dev, "failed to allocate dma buffer\n");
+		return -ENOMEM;
+	}
+
+	info->data_buff_size = MAX_BUFF_SIZE;
+	info->data_desc = (void *)info->data_buff + data_desc_offset;
+	info->data_desc_addr = info->data_buff_phys + data_desc_offset;
+
+	info->data_dma_ch = pxa_request_dma("nand-data", DMA_PRIO_LOW,
+				pxa3xx_nand_data_dma_irq, info);
+	if (info->data_dma_ch < 0) {
+		dev_err(&pdev->dev, "failed to request data dma\n");
+		dma_free_coherent(&pdev->dev, info->data_buff_size,
+				info->data_buff, info->data_buff_phys);
+		return info->data_dma_ch;
+	}
+
+	return 0;
+}
+
+static struct nand_ecclayout hw_smallpage_ecclayout = {
+	.eccbytes = 6,
+	.eccpos = {8, 9, 10, 11, 12, 13 },
+	.oobfree = { {2, 6} }
+};
+
+static struct nand_ecclayout hw_largepage_ecclayout = {
+	.eccbytes = 24,
+	.eccpos = {
+		40, 41, 42, 43, 44, 45, 46, 47,
+		48, 49, 50, 51, 52, 53, 54, 55,
+		56, 57, 58, 59, 60, 61, 62, 63},
+	.oobfree = { {2, 38} }
+};
+
+static uint8_t mv_bbt_pattern[] = {'M', 'V', 'B', 'b', 't', '0' };
+static uint8_t mv_mirror_pattern[] = {'1', 't', 'b', 'B', 'V', 'M' };
+
+static struct nand_bbt_descr mvbbt_main_descr = {
+	.options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
+		| NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP,
+	.offs =	8,
+	.len = 6,
+	.veroffs = 14,
+	.maxblocks = 8,		/* Last 8 blocks in each chip */
+	.pattern = mv_bbt_pattern
+};
+
+static struct nand_bbt_descr mvbbt_mirror_descr = {
+	.options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
+		| NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP,
+	.offs =	8,
+	.len = 6,
+	.veroffs = 14,
+	.maxblocks = 8,		/* Last 8 blocks in each chip */
+	.pattern = mv_mirror_pattern
+};
+
+static void pxa3xx_nand_init_mtd(struct mtd_info *mtd,
+				 struct pxa3xx_nand_info *info)
+{
+	struct pxa3xx_nand_flash *f = info->flash_info;
+	struct nand_chip *this = &info->nand_chip;
+
+#ifdef CONFIG_MV_MTD_GANG_SUPPORT
+	this->num_devs = pdata->num_devs;
+#endif
+	this->options = (f->flash_width == 16) ? NAND_BUSWIDTH_16: 0;
+	this->options |= NAND_USE_FLASH_BBT; 
+
+	this->waitfunc		= pxa3xx_nand_waitfunc;
+	this->select_chip	= pxa3xx_nand_select_chip;
+	this->dev_ready		= pxa3xx_nand_dev_ready;
+	this->cmdfunc		= pxa3xx_nand_cmdfunc;
+	this->read_word		= pxa3xx_nand_read_word;
+	this->read_byte		= pxa3xx_nand_read_byte;
+	this->read_buf		= pxa3xx_nand_read_buf;
+	this->write_buf		= pxa3xx_nand_write_buf;
+	this->verify_buf	= pxa3xx_nand_verify_buf;
+
+	this->ecc.mode		= NAND_ECC_HW;
+	this->ecc.hwctl		= pxa3xx_nand_ecc_hwctl;
+	this->ecc.calculate	= pxa3xx_nand_ecc_calculate;
+	this->ecc.correct	= pxa3xx_nand_ecc_correct;
+	this->ecc.size		= f->page_size;
+
+	if (f->page_size == 2048)
+		this->ecc.layout = &hw_largepage_ecclayout;
+	else
+		this->ecc.layout = &hw_smallpage_ecclayout;
+
+	this->bbt_td = &mvbbt_main_descr;
+	this->bbt_md = &mvbbt_mirror_descr;
+
+	this->chip_delay = 25;
+}
+
+static int pxa3xx_nand_probe(struct platform_device *pdev)
+{
+	struct nfc_platform_data *pdata;
+	struct pxa3xx_nand_info *info;
+	struct nand_chip *this;
+	struct mtd_info *mtd;
+	struct resource *r;
+	int ret = 0, irq;
+	char * stat[2] = {"Disabled", "Enabled"};
+
+	pdata = pdev->dev.platform_data;
+
+	if (!pdata) {
+		dev_err(&pdev->dev, "no platform data defined\n");
+		return -ENODEV;
+	}
+	
+	/* Set global parameters based on platform data */
+	if (pdata->use_dma) use_dma = 1;
+	if (pdata->ecc_type == MV_NFC_ECC_DISABLE)
+	{
+		use_ecc = 0;
+		use_bch = 0;
+	}
+	else if (pdata->ecc_type == MV_NFC_ECC_HAMMING)
+	{
+		use_ecc = 1;
+		use_bch = 0;
+	}
+	else /* All BCH types */
+	{
+		use_ecc = 1;
+		use_bch = 1;
+	}
+		
+	dev_info(&pdev->dev, "Initialize NFC in %dbit mode with DMA %s, ECC %s, BCH %s\n", 
+				pdata->nfc_width, stat[use_dma], stat[use_ecc], stat[use_bch]);
+
+	mtd = kzalloc(sizeof(struct mtd_info) + sizeof(struct pxa3xx_nand_info),
+			GFP_KERNEL);
+	if (!mtd) {
+		dev_err(&pdev->dev, "failed to allocate memory\n");
+		return -ENOMEM;
+	}
+
+	info = (struct pxa3xx_nand_info *)(&mtd[1]);
+	info->pdev = pdev;
+
+	this = &info->nand_chip;
+	mtd->priv = info;
+	mtd->owner = THIS_MODULE;
+
+        info->clk = clk_get(&pdev->dev, NULL);
+        if (IS_ERR(info->clk)) {
+		dev_err(&pdev->dev, "failed to get nand clock\n");
+		ret = PTR_ERR(info->clk);
+		goto fail_free_mtd;
+        }
+        clk_enable(info->clk);
+
+	r = platform_get_resource(pdev, IORESOURCE_DMA, 0);
+	if (r == NULL) {
+		dev_err(&pdev->dev, "no resource defined for data DMA\n");
+		ret = -ENXIO;
+		goto fail_put_clk;
+	}
+	info->drcmr_dat = r->start;
+
+	r = platform_get_resource(pdev, IORESOURCE_DMA, 1);
+	if (r == NULL) {
+		dev_err(&pdev->dev, "no resource defined for command DMA\n");
+		ret = -ENXIO;
+		goto fail_put_clk;
+	}
+	info->drcmr_cmd = r->start;
+
+	irq = platform_get_irq(pdev, 0);
+	if (irq < 0) {
+		dev_err(&pdev->dev, "no IRQ resource defined\n");
+		ret = -ENXIO;
+		goto fail_put_clk;
+	}
+
+	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (r == NULL) {
+		dev_err(&pdev->dev, "no IO memory resource defined\n");
+		ret = -ENODEV;
+		goto fail_put_clk;
+	}
+
+	r = devm_request_mem_region(&pdev->dev, r->start, r->end - r->start + 1,
+				    pdev->name);
+	if (r == NULL) {
+		dev_err(&pdev->dev, "failed to request memory resource\n");
+		ret = -EBUSY;
+		goto fail_put_clk;
+	}
+
+	info->mmio_base = devm_ioremap(&pdev->dev, r->start,
+				       r->end - r->start + 1);
+	if (info->mmio_base == NULL) {
+		dev_err(&pdev->dev, "ioremap() failed\n");
+		ret = -ENODEV;
+		goto fail_put_clk;
+	}
+
+	info->mmio_phys_base = r->start;
+
+	ret = pxa3xx_nand_init_buff(info);
+	if (ret)
+		goto fail_put_clk;
+
+	ret = request_irq(IRQ_NAND, pxa3xx_nand_irq, IRQF_DISABLED,
+				pdev->name, info);
+	if (ret < 0) {
+		dev_err(&pdev->dev, "failed to request IRQ\n");
+		goto fail_free_buf;
+	}
+
+	ret = pxa3xx_nand_detect_flash(info);
+	if (ret) {
+		dev_err(&pdev->dev, "failed to detect flash\n");
+		ret = -ENODEV;
+		goto fail_free_irq;
+	}
+
+	pxa3xx_nand_init_mtd(mtd, info);
+
+	platform_set_drvdata(pdev, mtd);
+
+	if (nand_scan(mtd, 1)) {
+		dev_err(&pdev->dev, "failed to scan nand\n");
+		ret = -ENXIO;
+		goto fail_free_irq;
+	}
+
+	return add_mtd_partitions(mtd, pdata->parts, pdata->nr_parts);
+
+fail_free_irq:
+	free_irq(IRQ_NAND, info);
+fail_free_buf:
+	if (use_dma) {
+		pxa_free_dma(info->data_dma_ch);
+		dma_free_coherent(&pdev->dev, info->data_buff_size,
+			info->data_buff, info->data_buff_phys);
+	} else
+		kfree(info->data_buff);
+fail_put_clk:
+	clk_disable(info->clk);
+	clk_put(info->clk);
+fail_free_mtd:
+	kfree(mtd);
+	return ret;
+}
+
+static int pxa3xx_nand_remove(struct platform_device *pdev)
+{
+	struct mtd_info *mtd = platform_get_drvdata(pdev);
+	struct pxa3xx_nand_info *info = mtd->priv;
+
+	platform_set_drvdata(pdev, NULL);
+
+	del_mtd_device(mtd);
+	del_mtd_partitions(mtd);
+	free_irq(IRQ_NAND, info);
+	if (use_dma) {
+		pxa_free_dma(info->data_dma_ch);
+		dma_free_writecombine(&pdev->dev, info->data_buff_size,
+				info->data_buff, info->data_buff_phys);
+	} else
+		kfree(info->data_buff);
+
+	clk_disable(info->clk);
+	clk_put(info->clk);
+	kfree(mtd);
+	return 0;
+}
+
+#ifdef CONFIG_PM
+static int pxa3xx_nand_suspend(struct platform_device *pdev, pm_message_t state)
+{
+	struct mtd_info *mtd = (struct mtd_info *)platform_get_drvdata(pdev);
+	struct pxa3xx_nand_info *info = mtd->priv;
+
+	if (info->state != STATE_READY) {
+		dev_err(&pdev->dev, "driver busy, state = %d\n", info->state);
+		return -EAGAIN;
+	}
+
+	return 0;
+}
+
+static int pxa3xx_nand_resume(struct platform_device *pdev)
+{
+	struct mtd_info *mtd = (struct mtd_info *)platform_get_drvdata(pdev);
+	struct pxa3xx_nand_info *info = mtd->priv;
+
+	clk_enable(info->clk);
+
+	return pxa3xx_nand_config_flash(info, info->flash_info);
+}
+#else
+#define pxa3xx_nand_suspend	NULL
+#define pxa3xx_nand_resume	NULL
+#endif
+
+static struct platform_driver pxa3xx_nand_driver = {
+	.driver = {
+		.name	= "orion-nfc",
+		.owner	= THIS_MODULE,
+	},
+	.probe		= pxa3xx_nand_probe,
+	.remove		= pxa3xx_nand_remove,
+	.suspend	= pxa3xx_nand_suspend,
+	.resume		= pxa3xx_nand_resume,
+};
+
+static int __init pxa3xx_nand_init(void)
+{
+	return platform_driver_register(&pxa3xx_nand_driver);
+}
+module_init(pxa3xx_nand_init);
+
+static void __exit pxa3xx_nand_exit(void)
+{
+	platform_driver_unregister(&pxa3xx_nand_driver);
+}
+module_exit(pxa3xx_nand_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("Dove NAND controller driver");
--- linux-mvl-dove-2.6.32.orig/drivers/mtd/nand/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/mtd/nand/Kconfig
@@ -411,10 +411,11 @@
 	  SmartMedia and xD allow raw flash access.
 
 config MTD_NAND_ORION
-	tristate "NAND Flash support for Marvell Orion SoC"
+	tristate "Legacy NAND Flash support for Marvell Orion SoC"
 	depends on PLAT_ORION && MTD_NAND
 	help
-	  This enables the NAND flash controller on Orion machines.
+	  This enables the NAND flash support on Marvell's SoC machines
+          using the legacy NAND controller
 
 	  No board specific support is done by this driver, each board
 	  must advertise a platform_device for the driver to attach.
@@ -437,11 +438,11 @@
 	  processor localbus with User-Programmable Machine support.
 
 config MTD_NAND_MXC
-	tristate "MXC NAND support"
-	depends on ARCH_MX2 || ARCH_MX3
-	help
-	  This enables the driver for the NAND flash controller on the
-	  MXC processors.
+        tristate "MXC NAND support"
+        depends on ARCH_MX2 || ARCH_MX3
+        help
+          This enables the driver for the NAND flash controller on the
+          MXC processors.
 
 config MTD_NAND_NOMADIK
 	tristate "ST Nomadik 8815 NAND support"
@@ -450,11 +451,42 @@
 	  Driver for the NAND flash controller on the Nomadik, with ECC.
 
 config MTD_NAND_SH_FLCTL
-	tristate "Support for NAND on Renesas SuperH FLCTL"
-	depends on MTD_NAND && SUPERH && CPU_SUBTYPE_SH7723
+        tristate "Support for NAND on Renesas SuperH FLCTL"
+        depends on MTD_NAND && SUPERH && CPU_SUBTYPE_SH7723
+        help
+          Several Renesas SuperH CPU has FLCTL. This option enables support
+          for NAND Flash using FLCTL. This driver support SH7723.
+
+config MTD_NFC_ORION
+	tristate "Support for NAND flash controller in Marvell's SoCs"
+	depends on PLAT_ORION && MTD_NAND
 	help
-	  Several Renesas SuperH CPU has FLCTL. This option enables support
-	  for NAND Flash using FLCTL. This driver support SH7723.
+	  This enables the driver for the NAND flash controller found in
+	  the Marvell SoC devices
+
+config MTD_NFC_HAL_ORION
+	tristate "HAL based support for NAND flash controller in Marvell's SoCs"
+	depends on PLAT_ORION && MTD_NAND
+ 	select MV_MTD_GANG_SUPPORT
+	select MV_MTD_MLC_NAND_SUPPORT
+ 	help
+	  This enables the driver for the NAND flash controller found in
+	  the Marvell SoC devices. This driver uses the NFC HAL.
+
+config MV_MTD_GANG_SUPPORT
+        bool "NAND Ganged mode support"
+        depends on MTD_NFC_HAL_ORION
+        help
+          This option enables the support for 2x8bit ganged mode in
+          Marvell's NFC HAL driver and the MTD stack.
+
+config MV_MTD_MLC_NAND_SUPPORT
+        bool "NAND MLC devices support"
+        depends on MTD_NFC_HAL_ORION
+         help
+          This option allows support for Nand devices with non-standard
+	  page/oob layout. These devices are detected incorrectly with
+          standard autodetection mechanism based on the READ_ID command.
 
 config MTD_NAND_DAVINCI
         tristate "Support NAND on DaVinci SoC"
--- linux-mvl-dove-2.6.32.orig/drivers/mtd/nand/pxa3xx_nand.c
+++ linux-mvl-dove-2.6.32/drivers/mtd/nand/pxa3xx_nand.c
@@ -316,7 +316,7 @@
 #define tAR_NDTR1(r)	(((r) >> 0) & 0xf)
 
 /* convert nano-seconds to nand flash controller clock cycles */
-#define ns2cycle(ns, clk)	(int)(((ns) * (clk / 1000000) / 1000) - 1)
+#define ns2cycle(ns, clk)	(int)((ns) * (clk / 1000000) / 1000)
 
 /* convert nand flash controller clock cycles to nano-seconds */
 #define cycle2ns(c, clk)	((((c) + 1) * 1000000 + clk / 500) / (clk / 1000))
--- linux-mvl-dove-2.6.32.orig/drivers/mtd/nand/Makefile
+++ linux-mvl-dove-2.6.32/drivers/mtd/nand/Makefile
@@ -1,6 +1,9 @@
 #
 # linux/drivers/nand/Makefile
 #
+ifdef CONFIG_MV_HAL_RULES_PATH
+include $(srctree)/$(subst ",,$(CONFIG_MV_HAL_RULES_PATH))
+endif
 
 obj-$(CONFIG_MTD_NAND)			+= nand.o nand_ecc.o
 obj-$(CONFIG_MTD_NAND_IDS)		+= nand_ids.o
@@ -42,5 +45,7 @@
 obj-$(CONFIG_MTD_NAND_TXX9NDFMC)	+= txx9ndfmc.o
 obj-$(CONFIG_MTD_NAND_W90P910)		+= w90p910_nand.o
 obj-$(CONFIG_MTD_NAND_NOMADIK)		+= nomadik_nand.o
+obj-$(CONFIG_MTD_NFC_ORION)		+= orion_nfc.o
+obj-$(CONFIG_MTD_NFC_HAL_ORION)		+= orion_nfc_hal.o
 
 nand-objs := nand_base.o nand_bbt.o
--- linux-mvl-dove-2.6.32.orig/drivers/mtd/nand/nand_bbt.c
+++ linux-mvl-dove-2.6.32/drivers/mtd/nand/nand_bbt.c
@@ -301,7 +301,34 @@
 	}
 	return 1;
 }
+#ifdef CONFIG_MV_MTD_MLC_NAND_SUPPORT
+/*
+ * Scan a given block in the custom location based on Naked symantics
+ */
+static int scan_block_custom(struct mtd_info *mtd, struct nand_bbt_descr *bd,
+			loff_t offs, uint8_t *buf, int page, int pos)
+{	
+	int ret;
+	struct mtd_oob_ops ops;
+
+	ops.mode = MTD_OOB_RAW;
+	ops.ooboffs = 0;
+	ops.ooblen = mtd->oobsize;
+	ops.oobbuf = (buf + mtd->writesize);
+	ops.datbuf = buf;
+	ops.len = mtd->writesize;
 
+	ret = mtd->read_oob(mtd, (offs + (mtd->writesize * page)), &ops);
+	if (ret)
+		return ret;
+
+	/* Check 2 bytes to cover the ganaged case */
+	if ((buf[pos] != 0xFF) || (buf[pos+1] != 0xFF))
+		return 1;
+
+	return 0;
+}
+#endif
 /*
  * Scan a given block full
  */
@@ -416,7 +443,12 @@
 
 	for (i = startblock; i < numblocks;) {
 		int ret;
-
+#ifdef CONFIG_MV_MTD_MLC_NAND_SUPPORT
+		if (bd->options & NAND_BBT_SCANMVCUSTOM)
+			ret = scan_block_custom(mtd, bd, from, buf,
+						this->bb_page, this->bb_location);
+		else
+#endif
 		if (bd->options & NAND_BBT_SCANALLPAGES)
 			ret = scan_block_full(mtd, bd, from, buf, readlen,
 					      scanlen, len);
--- linux-mvl-dove-2.6.32.orig/drivers/mtd/nand/nand_ids.c
+++ linux-mvl-dove-2.6.32/drivers/mtd/nand/nand_ids.c
@@ -109,6 +109,15 @@
 	{"NAND 2GiB 1,8V 16-bit",	0xB5, 0, 2048, 0, LP_OPTIONS16},
 	{"NAND 2GiB 3,3V 16-bit",	0xC5, 0, 2048, 0, LP_OPTIONS16},
 
+#ifdef CONFIG_MV_MTD_MLC_NAND_SUPPORT
+	/* 32 Gigabit - wrongly detected due to changes in READ_ID decoding */
+	{"NAND 4GiB 3,3V 8-bit",	0xD7, 4096, 4096, 524288, LP_OPTIONS},
+	/* 32 Gigabit - wrongly detected due to changes in READ_ID decoding */
+	{"NAND 8GiB 3,3V 8-bit",	0x88, 8192, 8192, 2097152, LP_OPTIONS},
+#else
+	/* 32 Gigabit */
+	{"NAND 4GiB 3,3V 8-bit",	0xD7, 0, 4096, 0, LP_OPTIONS},
+#endif
 	/*
 	 * Renesas AND 1 Gigabit. Those chips do not support extended id and
 	 * have a strange page/block layout !  The chosen minimum erasesize is
--- linux-mvl-dove-2.6.32.orig/drivers/mtd/nand/nand_base.c
+++ linux-mvl-dove-2.6.32/drivers/mtd/nand/nand_base.c
@@ -52,6 +52,10 @@
 #include <linux/mtd/partitions.h>
 #endif
 
+#ifdef CONFIG_MV_MTD_GANG_SUPPORT
+static char nand_name[128];
+#endif
+
 /* Define default oob placement schemes for large and small page devices */
 static struct nand_ecclayout nand_oob_8 = {
 	.eccbytes = 3,
@@ -2518,10 +2522,21 @@
 	if (!type)
 		return ERR_PTR(-ENODEV);
 
-	if (!mtd->name)
+	if (!mtd->name) {
+#ifdef CONFIG_MV_MTD_GANG_SUPPORT
+		sprintf(nand_name, "%s%s", type->name,
+				(chip->num_devs == 2) ? " - Ganged" : "");
+		type->name = nand_name;
+#endif
 		mtd->name = type->name;
+	}
 
 	chip->chipsize = (uint64_t)type->chipsize << 20;
+#ifdef CONFIG_MV_MTD_GANG_SUPPORT
+	chip->chipsize *= chip->num_devs;
+	if(chip->num_devs > 1)
+		type->options |= NAND_BUSWIDTH_16;
+#endif
 
 	/* Newer devices have all the information in additional id bytes */
 	if (!type->pagesize) {
@@ -2532,16 +2547,25 @@
 		extid = chip->read_byte(mtd);
 		/* Calc pagesize */
 		mtd->writesize = 1024 << (extid & 0x3);
+#ifdef CONFIG_MV_MTD_GANG_SUPPORT
+		mtd->writesize *= chip->num_devs;
+#endif
 		extid >>= 2;
 		/* Calc oobsize */
 		mtd->oobsize = (8 << (extid & 0x01)) * (mtd->writesize >> 9);
 		extid >>= 2;
 		/* Calc blocksize. Blocksize is multiples of 64KiB */
 		mtd->erasesize = (64 * 1024) << (extid & 0x03);
+#ifdef CONFIG_MV_MTD_GANG_SUPPORT
+		mtd->erasesize *= chip->num_devs;
+#endif
 		extid >>= 2;
 		/* Get buswidth information */
 		busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0;
-
+#ifdef CONFIG_MV_MTD_GANG_SUPPORT
+		if(chip->num_devs > 1)
+			busw = NAND_BUSWIDTH_16;
+#endif
 	} else {
 		/*
 		 * Old devices have chip data hardcoded in the device id table
@@ -2549,7 +2573,16 @@
 		mtd->erasesize = type->erasesize;
 		mtd->writesize = type->pagesize;
 		mtd->oobsize = mtd->writesize / 32;
+#ifdef CONFIG_MV_MTD_MLC_NAND_SUPPORT
+		/* New devices have non standard OOB size */
+		if (chip->oobsize_ovrd)
+			mtd->oobsize = chip->oobsize_ovrd;
+#endif
 		busw = type->options & NAND_BUSWIDTH_16;
+#ifdef CONFIG_MV_MTD_GANG_SUPPORT
+		mtd->erasesize *= chip->num_devs;
+		mtd->writesize *= chip->num_devs;
+#endif
 	}
 
 	/* Try to identify manufacturer */
--- linux-mvl-dove-2.6.32.orig/drivers/mtd/nand/orion_nfc_hal.c
+++ linux-mvl-dove-2.6.32/drivers/mtd/nand/orion_nfc_hal.c
@@ -0,0 +1,1720 @@
+/*
+ * drivers/mtd/nand/orion_nfc.c
+ *
+ * Copyright c 2005 Intel Corporation
+ * Copyright c 2006 Marvell International Ltd.
+ *
+ * This driver is based on the PXA drivers/mtd/nand/pxa3xx_nand.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+#include <linux/delay.h>
+#include <linux/clk.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <asm/dma.h>
+
+#include <plat/orion_nfc.h>
+#include <asm/hardware/pxa-dma.h>
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "pdma/mvPdma.h"
+#include "pdma/mvPdmaRegs.h"
+#include "nfc/mvNfc.h"
+#include "nfc/mvNfcRegs.h"
+
+#define NFC_DPRINT(x) 		//printk x
+#define PRINT_LVL		KERN_DEBUG
+
+#define	CHIP_DELAY_TIMEOUT		(20 * HZ/10)
+#define NFC_MAX_NUM_OF_DESCR	(33) /* worst case in 8K ganaged */
+#define NFC_8BIT1K_ECC_SPARE	(32)
+
+#define NFC_SR_MASK		(0xfff)
+#define NFC_SR_BBD_MASK		(NFC_SR_CS0_BBD_MASK | NFC_SR_CS1_BBD_MASK)
+
+
+char *cmd_text[]= {
+	"MV_NFC_CMD_READ_ID",
+	"MV_NFC_CMD_READ_STATUS",
+	"MV_NFC_CMD_ERASE",
+	"MV_NFC_CMD_MULTIPLANE_ERASE",
+	"MV_NFC_CMD_RESET",
+
+	"MV_NFC_CMD_CACHE_READ_SEQ",
+	"MV_NFC_CMD_CACHE_READ_RAND",
+	"MV_NFC_CMD_EXIT_CACHE_READ",
+	"MV_NFC_CMD_CACHE_READ_START",
+	"MV_NFC_CMD_READ_MONOLITHIC",
+	"MV_NFC_CMD_READ_MULTIPLE",
+	"MV_NFC_CMD_READ_NAKED",
+	"MV_NFC_CMD_READ_LAST_NAKED",
+	"MV_NFC_CMD_READ_DISPATCH",
+
+	"MV_NFC_CMD_WRITE_MONOLITHIC",
+	"MV_NFC_CMD_WRITE_MULTIPLE",
+	"MV_NFC_CMD_WRITE_NAKED",
+	"MV_NFC_CMD_WRITE_LAST_NAKED",
+	"MV_NFC_CMD_WRITE_DISPATCH",
+	"MV_NFC_CMD_WRITE_DISPATCH_START",
+	"MV_NFC_CMD_WRITE_DISPATCH_END",
+
+	"MV_NFC_CMD_COUNT"	/* This should be the last enum */
+
+};
+
+MV_U32 pg_sz[NFC_PAGE_SIZE_MAX_CNT] = {512, 2048, 4096, 8192, 16384};
+
+/* error code and state */
+enum {
+	ERR_NONE	= 0,
+	ERR_DMABUSERR	= -1,
+	ERR_CMD_TO	= -2,
+	ERR_DATA_TO	= -3,
+	ERR_DBERR	= -4,
+	ERR_BBD		= -5,
+};
+
+enum {
+	STATE_READY	= 0,
+	STATE_CMD_HANDLE,
+	STATE_DMA_READING,
+	STATE_DMA_WRITING,
+	STATE_DMA_DONE,
+	STATE_PIO_READING,
+	STATE_PIO_WRITING,
+};
+
+struct orion_nfc_info {
+	struct platform_device	 *pdev;
+
+	struct clk		*clk;
+	void __iomem		*mmio_base;
+	unsigned int		mmio_phys_base;
+
+	unsigned int 		buf_start;
+	unsigned int		buf_count;
+
+	unsigned char		*data_buff;
+	dma_addr_t 		data_buff_phys;
+	size_t			data_buff_size;
+
+	/* saved column/page_addr during CMD_SEQIN */
+	int			seqin_column;
+	int			seqin_page_addr;
+
+	/* relate to the command */
+	unsigned int		state;
+	unsigned int		use_dma;	/* use DMA ? */
+
+	/* flash information */
+	unsigned int		tclk;		/* Clock supplied to NFC */
+	unsigned int		nfc_width;	/* Width of NFC 16/8 bits */
+	unsigned int		num_devs;	/* Number of NAND devices 
+						   (2 for ganged mode).   */
+	unsigned int		num_cs;		/* Number of NAND devices 
+						   chip-selects.	  */
+	MV_NFC_ECC_MODE		ecc_type;
+	enum nfc_page_size	page_size;
+	uint32_t 		page_per_block;	/* Pages per block (PG_PER_BLK) */	
+	uint32_t 		flash_width;	/* Width of Flash memory (DWIDTH_M) */
+	size_t	 		read_id_bytes;
+
+	size_t			data_size;	/* data size in FIFO */
+	size_t			read_size;
+	int 			retcode;
+	uint32_t		dscr;		/* IRQ events - status */
+	struct completion 	cmd_complete;
+
+	int			chained_cmd;
+	uint32_t		column;
+	uint32_t		page_addr;
+	MV_NFC_CMD_TYPE		cmd;
+	MV_NFC_CTRL		nfcCtrl;
+
+	/* RW buffer chunks config */
+	MV_U32			sgBuffAddr[MV_NFC_RW_MAX_BUFF_NUM];
+	MV_U32			sgBuffSize[MV_NFC_RW_MAX_BUFF_NUM];
+	MV_U32			sgNumBuffs;
+
+	/* suspend / resume data */
+	MV_U32			nfcUnitData[128];
+	MV_U32			nfcDataLen;
+	MV_U32			pdmaUnitData[128];
+	MV_U32			pdmaDataLen;
+};
+
+/*
+ * ECC Layout
+ */
+
+static struct nand_ecclayout ecc_latout_512B_hamming = {
+	.eccbytes = 6,
+	.eccpos = {8, 9, 10, 11, 12, 13 },
+	.oobfree = { {2, 6} }
+};
+
+static struct nand_ecclayout ecc_layout_2KB_hamming = {
+	.eccbytes = 24,
+	.eccpos = {
+		40, 41, 42, 43, 44, 45, 46, 47,
+		48, 49, 50, 51, 52, 53, 54, 55,
+		56, 57, 58, 59, 60, 61, 62, 63},
+	.oobfree = { {2, 38} }
+};
+
+static struct nand_ecclayout ecc_layout_2KB_bch4bit = {
+	.eccbytes = 32,
+	.eccpos = {
+		32, 33, 34, 35, 36, 37, 38, 39,
+		40, 41, 42, 43, 44, 45, 46, 47,
+		48, 49, 50, 51, 52, 53, 54, 55,
+		56, 57, 58, 59, 60, 61, 62, 63},
+	.oobfree = { {2, 30} }
+};
+
+static struct nand_ecclayout ecc_layout_4KB_bch4bit = {
+	.eccbytes = 64,
+	.eccpos = {
+		32,  33,  34,  35,  36,  37,  38,  39,
+		40,  41,  42,  43,  44,  45,  46,  47,
+		48,  49,  50,  51,  52,  53,  54,  55,
+		56,  57,  58,  59,  60,  61,  62,  63,
+		96,  97,  98,  99,  100, 101, 102, 103,
+		104, 105, 106, 107, 108, 109, 110, 111,
+		112, 113, 114, 115, 116, 117, 118, 119,
+		120, 121, 122, 123, 124, 125, 126, 127},
+	/* Bootrom looks in bytes 0 & 5 for bad blocks */
+	.oobfree = { {1, 4}, {6, 26}, { 64, 32} }
+};
+
+static struct nand_ecclayout ecc_layout_8KB_bch4bit = {
+	.eccbytes = 128,
+	.eccpos = {
+		32,  33,  34,  35,  36,  37,  38,  39,
+		40,  41,  42,  43,  44,  45,  46,  47,
+		48,  49,  50,  51,  52,  53,  54,  55,
+		56,  57,  58,  59,  60,  61,  62,  63,
+
+		96,  97,  98,  99,  100, 101, 102, 103,
+		104, 105, 106, 107, 108, 109, 110, 111,
+		112, 113, 114, 115, 116, 117, 118, 119,
+		120, 121, 122, 123, 124, 125, 126, 127,
+
+		160, 161, 162, 163, 164, 165, 166, 167,
+		168, 169, 170, 171, 172, 173, 174, 175,
+		176, 177, 178, 179, 180, 181, 182, 183,
+		184, 185, 186, 187, 188, 189, 190, 191,
+
+		224, 225, 226, 227, 228, 229, 230, 231,
+		232, 233, 234, 235, 236, 237, 238, 239,
+		240, 241, 242, 243, 244, 245, 246, 247,
+		248, 249, 250, 251, 252, 253, 254, 255},
+
+	/* Bootrom looks in bytes 0 & 5 for bad blocks */
+	.oobfree = { {1, 4}, {6, 26}, { 64, 32}, {128, 32}, {192, 32} }
+};
+
+static struct nand_ecclayout ecc_layout_4KB_bch8bit = {
+	.eccbytes = 64,
+	.eccpos = {
+		32,  33,  34,  35,  36,  37,  38,  39,
+		40,  41,  42,  43,  44,  45,  46,  47,
+		48,  49,  50,  51,  52,  53,  54,  55,
+		56,  57,  58,  59,  60,  61,  62,  63},
+	/* Bootrom looks in bytes 0 & 5 for bad blocks */
+	.oobfree = { {1, 4}, {6, 26},  }
+};
+
+static struct nand_ecclayout ecc_layout_8KB_bch8bit = {
+	.eccbytes = 160,
+	.eccpos = {
+		128, 129, 130, 131, 132, 133, 134, 135,
+		136, 137, 138, 139, 140, 141, 142, 143,
+		144, 145, 146, 147, 148, 149, 150, 151,
+		152, 153, 154, 155, 156, 157, 158, 159},
+	/* Bootrom looks in bytes 0 & 5 for bad blocks */
+	.oobfree = { {1, 4}, {6, 122},  }
+};
+
+static struct nand_ecclayout ecc_layout_8KB_bch12bit = {
+	.eccbytes = 0,
+	.eccpos = { },
+	/* Bootrom looks in bytes 0 & 5 for bad blocks */
+	.oobfree = { {1, 4}, {6, 58}, }
+};
+
+static struct nand_ecclayout ecc_layout_16KB_bch12bit = {
+	.eccbytes = 0,
+	.eccpos = { },
+	/* Bootrom looks in bytes 0 & 5 for bad blocks */
+	.oobfree = { {1, 4}, {6, 122},  }
+};
+
+/*
+ * Define bad block scan pattern when scanning a device for factory 
+ * marked blocks.
+ */
+static uint8_t mv_scan_pattern[] = { 0xff, 0xff };
+
+static struct nand_bbt_descr mv_sp_bb = {
+	.options = NAND_BBT_SCANMVCUSTOM,
+	.offs = 5,
+	.len = 1,
+	.pattern = mv_scan_pattern
+};
+
+static struct nand_bbt_descr mv_lp_bb = {
+	.options = NAND_BBT_SCANMVCUSTOM,
+	.offs = 0,
+	.len = 2,
+	.pattern = mv_scan_pattern
+};
+
+/*
+ * Lookup Tables
+ */
+
+struct orion_nfc_naked_info {
+	
+	struct nand_ecclayout* 	ecc_layout;
+	struct nand_bbt_descr*	bb_info;
+	uint32_t		bb_bytepos;
+	uint32_t		chunk_size;
+	uint32_t		chunk_spare;
+	uint32_t		chunk_cnt;
+	uint32_t		last_chunk_size;
+	uint32_t		last_chunk_spare;
+};
+
+			                     /* PageSize*/          /* ECc Type */
+static struct orion_nfc_naked_info orion_nfc_naked_info_lkup[NFC_PAGE_SIZE_MAX_CNT][MV_NFC_ECC_MAX_CNT] = {
+	/* 512B Pages */
+	{{    	/* Hamming */
+		&ecc_latout_512B_hamming, &mv_sp_bb, 512, 512, 16, 1, 0, 0
+	}, { 	/* BCH 4bit */
+		NULL, NULL, 0, 0, 0, 0, 0, 0
+	}, { 	/* BCH 8bit */
+		NULL, NULL, 0, 0, 0, 0, 0, 0
+	}, { 	/* BCH 12bit */
+		NULL, NULL, 0, 0, 0, 0, 0, 0
+	}, { 	/* BCH 16bit */
+		NULL, NULL, 0, 0, 0, 0, 0, 0
+	}, { 	/* No ECC */
+		NULL, NULL, 0, 0, 0, 0, 0, 0
+	}},
+	/* 2KB Pages */
+	{{	/* Hamming */
+		&ecc_layout_2KB_hamming, &mv_lp_bb, 2048, 2048, 40, 1, 0, 0
+	}, { 	/* BCH 4bit */
+		&ecc_layout_2KB_bch4bit, &mv_lp_bb, 2048, 2048, 32, 1, 0, 0
+	}, { 	/* BCH 8bit */
+		NULL, NULL, 2018, 1024, 0, 1, 1024, 32
+	}, { 	/* BCH 12bit */
+		NULL, NULL, 1988, 704, 0, 2, 640, 0
+	}, { 	/* BCH 16bit */
+		NULL, NULL, 1958, 512, 0, 4, 0, 32
+	}, { 	/* No ECC */
+		NULL, NULL, 0, 0, 0, 0, 0, 0
+	}},
+	/* 4KB Pages */
+	{{	/* Hamming */
+		NULL, 0, 0, 0, 0, 0, 0, 0
+	}, { 	/* BCH 4bit */
+		&ecc_layout_4KB_bch4bit, &mv_lp_bb, 4034, 2048, 32, 2, 0, 0
+	}, { 	/* BCH 8bit */
+		&ecc_layout_4KB_bch8bit, &mv_lp_bb, 4006, 1024, 0, 4, 0, 64
+	}, { 	/* BCH 12bit */
+		NULL, NULL, 3946, 704,  0, 5, 576, 32
+	}, { 	/* BCH 16bit */
+		NULL, NULL, 3886, 512, 0, 8, 0, 32
+	}, { 	/* No ECC */
+		NULL, NULL, 0, 0, 0, 0, 0, 0
+	}},
+	/* 8KB Pages */
+	{{	/* Hamming */
+		NULL, 0, 0, 0, 0, 0, 0, 0
+	}, { 	/* BCH 4bit */
+		&ecc_layout_8KB_bch4bit, &mv_lp_bb, 8102, 2048, 32, 4, 0, 0
+	}, { 	/* BCH 8bit */
+		&ecc_layout_8KB_bch8bit, &mv_lp_bb, 7982, 1024, 0, 8, 0, 160
+	}, { 	/* BCH 12bit */
+		&ecc_layout_8KB_bch12bit, &mv_lp_bb,7862, 704, 0, 11, 448, 64
+	}, { 	/* BCH 16bit */
+		NULL, NULL, 7742, 512, 0, 16, 0, 32
+	}, { 	/* No ECC */
+		NULL, NULL, 0, 0, 0, 0, 0, 0
+	}},
+	/* 16KB Pages */
+	{{	/* Hamming */
+		NULL, NULL, 0, 0, 0, 0, 0, 0
+	}, { 	/* BCH 4bit */
+		NULL, NULL, 15914, 2048, 32, 8, 0, 0
+	}, { 	/* BCH 8bit */
+		NULL, NULL, 15930, 1024, 0, 16, 0, 352
+	}, { 	/* BCH 12bit */
+		&ecc_layout_16KB_bch12bit, &mv_lp_bb, 15724, 704, 0, 23, 192, 128
+	}, { 	/* BCH 16bit */
+		NULL, NULL, 15484, 512, 0, 32, 0, 32
+	}, { 	/* No ECC */
+		NULL, NULL, 0, 0, 0, 0, 0, 0
+	}}};
+		
+
+#define ECC_LAYOUT	(orion_nfc_naked_info_lkup[info->page_size][info->ecc_type].ecc_layout)
+#define BB_INFO		(orion_nfc_naked_info_lkup[info->page_size][info->ecc_type].bb_info)
+#define	BB_BYTE_POS	(orion_nfc_naked_info_lkup[info->page_size][info->ecc_type].bb_bytepos)
+#define CHUNK_CNT	(orion_nfc_naked_info_lkup[info->page_size][info->ecc_type].chunk_cnt)
+#define CHUNK_SZ	(orion_nfc_naked_info_lkup[info->page_size][info->ecc_type].chunk_size)
+#define CHUNK_SPR	(orion_nfc_naked_info_lkup[info->page_size][info->ecc_type].chunk_spare)
+#define LST_CHUNK_SZ	(orion_nfc_naked_info_lkup[info->page_size][info->ecc_type].last_chunk_size)
+#define LST_CHUNK_SPR	(orion_nfc_naked_info_lkup[info->page_size][info->ecc_type].last_chunk_spare)
+
+struct orion_nfc_cmd_info {
+	
+	uint32_t		events_p1;	/* post command events */
+	uint32_t		events_p2;	/* post data events */
+	MV_NFC_PIO_RW_MODE	rw;
+};
+
+static struct orion_nfc_cmd_info orion_nfc_cmd_info_lkup[MV_NFC_CMD_COUNT] = {
+	/* Phase 1 interrupts */			/* Phase 2 interrupts */			/* Read/Write */  /* MV_NFC_CMD_xxxxxx */
+	{(NFC_SR_RDDREQ_MASK), 				(0),						MV_NFC_PIO_READ}, /* READ_ID */
+	{(NFC_SR_RDDREQ_MASK), 				(0),						MV_NFC_PIO_READ}, /* READ_STATUS */
+	{(0), 						(MV_NFC_STATUS_RDY | MV_NFC_STATUS_BBD),	MV_NFC_PIO_NONE}, /* ERASE */
+	{(0), 						(0), 						MV_NFC_PIO_NONE}, /* MULTIPLANE_ERASE */
+	{(0), 						(MV_NFC_STATUS_RDY), 				MV_NFC_PIO_NONE}, /* RESET */
+	{(0), 						(0), 						MV_NFC_PIO_READ}, /* CACHE_READ_SEQ */
+	{(0), 						(0), 						MV_NFC_PIO_READ}, /* CACHE_READ_RAND */
+	{(0), 						(0), 						MV_NFC_PIO_NONE}, /* EXIT_CACHE_READ */
+	{(0), 						(0), 						MV_NFC_PIO_READ}, /* CACHE_READ_START */
+	{(NFC_SR_RDDREQ_MASK | NFC_SR_UNCERR_MASK), 	(0), 						MV_NFC_PIO_READ}, /* READ_MONOLITHIC */
+	{(0), 						(0),						MV_NFC_PIO_READ}, /* READ_MULTIPLE */
+	{(NFC_SR_RDDREQ_MASK | NFC_SR_UNCERR_MASK), 	(0), 						MV_NFC_PIO_READ}, /* READ_NAKED */
+	{(NFC_SR_RDDREQ_MASK | NFC_SR_UNCERR_MASK), 	(0), 						MV_NFC_PIO_READ}, /* READ_LAST_NAKED */
+	{(0), 						(0), 						MV_NFC_PIO_NONE}, /* READ_DISPATCH */
+	{(MV_NFC_STATUS_WRD_REQ), 			(MV_NFC_STATUS_RDY | MV_NFC_STATUS_BBD),	MV_NFC_PIO_WRITE},/* WRITE_MONOLITHIC */
+	{(0), 						(0), 						MV_NFC_PIO_WRITE},/* WRITE_MULTIPLE */
+	{(MV_NFC_STATUS_WRD_REQ),			(MV_NFC_STATUS_PAGED),				MV_NFC_PIO_WRITE},/* WRITE_NAKED */
+	{(0), 						(0), 						MV_NFC_PIO_WRITE},/* WRITE_LAST_NAKED */
+	{(0), 						(0), 						MV_NFC_PIO_NONE}, /* WRITE_DISPATCH */
+	{(MV_NFC_STATUS_CMDD),				(0),						MV_NFC_PIO_NONE}, /* WRITE_DISPATCH_START */
+	{(0),						(MV_NFC_STATUS_RDY | MV_NFC_STATUS_BBD), 	MV_NFC_PIO_NONE}, /* WRITE_DISPATCH_END */
+};
+
+static int prepare_read_prog_cmd(struct orion_nfc_info *info,
+			int column, int page_addr)
+{
+	MV_U32 size;
+
+	if (mvNfcFlashPageSizeGet(&info->nfcCtrl, &size, &info->data_size) 
+	    != MV_OK)
+		return -EINVAL;
+
+	return 0;
+}
+int orion_nfc_wait_for_completion_timeout(struct orion_nfc_info *info, int timeout)
+{
+	return wait_for_completion_timeout(&info->cmd_complete, timeout);
+
+}
+static void orion_nfc_data_dma_irq(int irq, void *data)
+{
+	struct orion_nfc_info *info = data;
+	uint32_t dcsr, intr;
+	int channel = info->nfcCtrl.dataChanHndl.chanNumber;
+
+	intr = MV_REG_READ(PDMA_INTR_CAUSE_REG);
+	dcsr = MV_REG_READ(PDMA_CTRL_STATUS_REG(channel));
+	MV_REG_WRITE(PDMA_CTRL_STATUS_REG(channel), dcsr);
+
+	NFC_DPRINT((PRINT_LVL "orion_nfc_data_dma_irq(0x%x, 0x%x) - 1.\n", dcsr, intr));
+
+	if(info->chained_cmd) {
+		if (dcsr & DCSR_BUSERRINTR) {
+			info->retcode = ERR_DMABUSERR;
+			complete(&info->cmd_complete);
+		}
+		if ((info->state == STATE_DMA_READING) && (dcsr & DCSR_ENDINTR)) {
+			info->state = STATE_READY;
+			complete(&info->cmd_complete);
+		}
+		return;
+	}
+
+	if (dcsr & DCSR_BUSERRINTR) {
+		info->retcode = ERR_DMABUSERR;
+		complete(&info->cmd_complete);
+	}
+
+	if (info->state == STATE_DMA_WRITING) {
+		info->state = STATE_DMA_DONE;
+		mvNfcIntrSet(&info->nfcCtrl,  MV_NFC_STATUS_BBD | MV_NFC_STATUS_RDY , MV_TRUE);
+	} else {
+		info->state = STATE_READY;
+		complete(&info->cmd_complete);
+	}
+
+	return;
+}
+
+static irqreturn_t orion_nfc_irq_pio(int irq, void *devid)
+{
+	struct orion_nfc_info *info = devid;
+
+	/* Disable all interrupts */
+	mvNfcIntrSet(&info->nfcCtrl, 0xFFF, MV_FALSE);
+
+	/* Clear the interrupt and pass the status UP */
+	info->dscr = MV_REG_READ(NFC_STATUS_REG);
+	NFC_DPRINT((PRINT_LVL ">>> orion_nfc_irq_pio(0x%x)\n", info->dscr));
+	MV_REG_WRITE(NFC_STATUS_REG, info->dscr);
+	complete(&info->cmd_complete);
+
+	return IRQ_HANDLED;
+}
+	
+
+static irqreturn_t orion_nfc_irq_dma(int irq, void *devid)
+{
+	struct orion_nfc_info *info = devid;
+	unsigned int status;
+
+	status = MV_REG_READ(NFC_STATUS_REG);
+
+	NFC_DPRINT((PRINT_LVL "orion_nfc_irq_dma(0x%x) - 1.\n", status));
+
+	if(!info->chained_cmd) {
+		if (status & (NFC_SR_RDDREQ_MASK | NFC_SR_UNCERR_MASK)) {
+			if (status & NFC_SR_UNCERR_MASK)
+				info->retcode = ERR_DBERR;
+			mvNfcIntrSet(&info->nfcCtrl, NFC_SR_RDDREQ_MASK | NFC_SR_UNCERR_MASK, MV_FALSE);
+			if (info->use_dma) {
+				info->state = STATE_DMA_READING;
+				mvNfcReadWrite(&info->nfcCtrl, info->cmd, (MV_U32*)info->data_buff, info->data_buff_phys);
+			} else {
+				info->state = STATE_PIO_READING;
+				complete(&info->cmd_complete);
+			}
+		} else if (status & NFC_SR_WRDREQ_MASK) {
+			mvNfcIntrSet(&info->nfcCtrl, NFC_SR_WRDREQ_MASK, MV_FALSE);
+			if (info->use_dma) {
+				info->state = STATE_DMA_WRITING;
+				NFC_DPRINT((PRINT_LVL "Calling mvNfcReadWrite().\n"));
+				if (mvNfcReadWrite(&info->nfcCtrl, info->cmd,
+						   (MV_U32 *)info->data_buff,
+						   info->data_buff_phys) 
+				    != MV_OK)
+					printk(KERN_ERR "mvNfcReadWrite() failed.\n");
+			} else {
+				info->state = STATE_PIO_WRITING;
+				complete(&info->cmd_complete);
+			}
+		} else if (status & (NFC_SR_BBD_MASK | MV_NFC_CS0_CMD_DONE_INT |
+				     NFC_SR_RDY0_MASK | MV_NFC_CS1_CMD_DONE_INT |
+				     NFC_SR_RDY1_MASK)) {
+			if (status & NFC_SR_BBD_MASK)
+				info->retcode = ERR_BBD;
+			mvNfcIntrSet(&info->nfcCtrl,  MV_NFC_STATUS_BBD |
+					MV_NFC_STATUS_CMDD | MV_NFC_STATUS_RDY,
+					MV_FALSE);
+			info->state = STATE_READY;
+			complete(&info->cmd_complete);
+		}
+	} else if (status & (NFC_SR_BBD_MASK | NFC_SR_RDY0_MASK |
+				NFC_SR_RDY1_MASK | NFC_SR_UNCERR_MASK)) {
+		if (status & (NFC_SR_BBD_MASK | NFC_SR_UNCERR_MASK))
+			info->retcode = ERR_DBERR;
+		mvNfcIntrSet(&info->nfcCtrl, MV_NFC_STATUS_BBD |
+				MV_NFC_STATUS_RDY | MV_NFC_STATUS_CMDD,
+				MV_FALSE);
+		if ((info->state != STATE_DMA_READING) ||
+		    (info->retcode == ERR_DBERR)) {
+			info->state = STATE_READY;
+			complete(&info->cmd_complete);
+		}
+	}
+	MV_REG_WRITE(NFC_STATUS_REG, status);
+	return IRQ_HANDLED;
+}
+
+static int orion_nfc_cmd_prepare(struct orion_nfc_info *info,
+		MV_NFC_MULTI_CMD *descInfo, u32 *numCmds)
+{
+	MV_U32	i;
+	MV_NFC_MULTI_CMD *currDesc;	
+
+	currDesc = descInfo;
+	if (info->cmd == MV_NFC_CMD_READ_MONOLITHIC) {
+		/* Main Chunks */
+		for (i=0; i<CHUNK_CNT; i++)
+		{
+			if (i == 0)
+				currDesc->cmd = MV_NFC_CMD_READ_MONOLITHIC;
+			else if ((i == (CHUNK_CNT-1)) && (LST_CHUNK_SZ == 0) && (LST_CHUNK_SPR == 0))
+				currDesc->cmd = MV_NFC_CMD_READ_LAST_NAKED;
+			else
+				currDesc->cmd = MV_NFC_CMD_READ_NAKED;
+
+			currDesc->pageAddr = info->page_addr;
+			currDesc->pageCount = 1;
+			currDesc->virtAddr = (MV_U32 *)(info->data_buff + (i * CHUNK_SZ));
+			currDesc->physAddr = info->data_buff_phys + (i * CHUNK_SZ);
+			currDesc->length = (CHUNK_SZ + CHUNK_SPR);
+
+			if (CHUNK_SPR == 0)
+				currDesc->numSgBuffs = 1;
+			else
+			{
+				currDesc->numSgBuffs = 2;
+				currDesc->sgBuffAddr[0] = (info->data_buff_phys + (i * CHUNK_SZ));
+				currDesc->sgBuffAddrVirt[0] = (MV_U32 *)(info->data_buff + (i * CHUNK_SZ));
+				currDesc->sgBuffSize[0] = CHUNK_SZ;
+				currDesc->sgBuffAddr[1] = (info->data_buff_phys + (CHUNK_SZ * CHUNK_CNT) + LST_CHUNK_SZ + (i * CHUNK_SPR));
+				currDesc->sgBuffAddrVirt[1] = (MV_U32 *)(info->data_buff + (CHUNK_SZ * CHUNK_CNT) + LST_CHUNK_SZ + (i * CHUNK_SPR));
+				currDesc->sgBuffSize[1] = CHUNK_SPR;
+			}
+
+			currDesc++;
+		}
+		
+		/* Last chunk if existing */
+		if ((LST_CHUNK_SZ != 0) || (LST_CHUNK_SPR != 0))
+		{
+			currDesc->cmd = MV_NFC_CMD_READ_LAST_NAKED;
+			currDesc->pageAddr = info->page_addr;
+			currDesc->pageCount = 1;				
+			currDesc->length = (LST_CHUNK_SPR + LST_CHUNK_SZ);
+
+			if ((LST_CHUNK_SZ == 0) && (LST_CHUNK_SPR != 0))	/* Spare only */
+			{
+				currDesc->virtAddr = (MV_U32 *)(info->data_buff + (CHUNK_SZ * CHUNK_CNT) + LST_CHUNK_SZ + (CHUNK_SPR * CHUNK_CNT));
+				currDesc->physAddr = info->data_buff_phys + (CHUNK_SZ * CHUNK_CNT) + LST_CHUNK_SZ + (CHUNK_SPR * CHUNK_CNT);
+				currDesc->numSgBuffs = 1;
+				currDesc->length = LST_CHUNK_SPR;
+			}
+			else if ((LST_CHUNK_SZ != 0) && (LST_CHUNK_SPR == 0))	/* Data only */
+			{
+				currDesc->virtAddr = (MV_U32 *)(info->data_buff + (CHUNK_SZ * CHUNK_CNT));
+				currDesc->physAddr = info->data_buff_phys + (CHUNK_SZ * CHUNK_CNT);
+				currDesc->numSgBuffs = 1;
+				currDesc->length = LST_CHUNK_SZ;
+			}
+			else /* Both spare and data */
+			{
+				currDesc->numSgBuffs = 2;
+				currDesc->sgBuffAddr[0] = (info->data_buff_phys + (CHUNK_SZ * CHUNK_CNT));
+				currDesc->sgBuffAddrVirt[0] = (MV_U32 *)(info->data_buff + (CHUNK_SZ * CHUNK_CNT));
+				currDesc->sgBuffSize[0] = LST_CHUNK_SZ;
+				currDesc->sgBuffAddr[1] = (info->data_buff_phys + (CHUNK_SZ * CHUNK_CNT) + LST_CHUNK_SZ + (CHUNK_SPR * CHUNK_CNT));
+				currDesc->sgBuffAddrVirt[1] =  (MV_U32 *)(info->data_buff + (CHUNK_SZ * CHUNK_CNT) + LST_CHUNK_SZ + (CHUNK_SPR * CHUNK_CNT));
+				currDesc->sgBuffSize[1] = LST_CHUNK_SPR;
+			}
+			currDesc++;
+		}
+
+		*numCmds = CHUNK_CNT + (((LST_CHUNK_SZ) || (LST_CHUNK_SPR)) ? 1 : 0);
+	} else if (info->cmd == MV_NFC_CMD_WRITE_MONOLITHIC) {
+		/* Write Dispatch */
+		currDesc->cmd = MV_NFC_CMD_WRITE_DISPATCH_START;
+		currDesc->pageAddr = info->page_addr;
+		currDesc->pageCount = 1;
+		currDesc->numSgBuffs = 1;
+		currDesc->length = 0;
+		currDesc++;
+
+		/* Main Chunks */
+		for (i=0; i<CHUNK_CNT; i++)
+		{
+			currDesc->cmd = MV_NFC_CMD_WRITE_NAKED;
+			currDesc->pageAddr = info->page_addr;
+			currDesc->pageCount = 1;
+			currDesc->virtAddr = (MV_U32 *)(info->data_buff + (i * CHUNK_SZ));
+			currDesc->physAddr = info->data_buff_phys + (i * CHUNK_SZ);
+			currDesc->length = (CHUNK_SZ + CHUNK_SPR);
+
+			if (CHUNK_SPR == 0)
+				currDesc->numSgBuffs = 1;
+			else
+			{
+				currDesc->numSgBuffs = 2;
+				currDesc->sgBuffAddr[0] = (info->data_buff_phys + (i * CHUNK_SZ));
+				currDesc->sgBuffAddrVirt[0] = (MV_U32 *)(info->data_buff + (i * CHUNK_SZ));
+				currDesc->sgBuffSize[0] = CHUNK_SZ;
+				currDesc->sgBuffAddr[1] = (info->data_buff_phys + (CHUNK_SZ * CHUNK_CNT) + LST_CHUNK_SZ + (i * CHUNK_SPR));
+				currDesc->sgBuffAddrVirt[1] = (MV_U32 *)(info->data_buff + (CHUNK_SZ * CHUNK_CNT) + LST_CHUNK_SZ + (i * CHUNK_SPR));
+				currDesc->sgBuffSize[1] = CHUNK_SPR;
+			}
+
+			currDesc++;
+		}
+		
+		/* Last chunk if existing */
+		if ((LST_CHUNK_SZ != 0) || (LST_CHUNK_SPR != 0))
+		{
+			currDesc->cmd = MV_NFC_CMD_WRITE_NAKED;
+			currDesc->pageAddr = info->page_addr;
+			currDesc->pageCount = 1;
+			currDesc->length = (LST_CHUNK_SZ + LST_CHUNK_SPR);
+
+			if ((LST_CHUNK_SZ == 0) && (LST_CHUNK_SPR != 0))	/* Spare only */
+			{
+				currDesc->virtAddr = (MV_U32 *)(info->data_buff + (CHUNK_SZ * CHUNK_CNT) + LST_CHUNK_SZ + (CHUNK_SPR * CHUNK_CNT));
+				currDesc->physAddr = info->data_buff_phys + (CHUNK_SZ * CHUNK_CNT) + LST_CHUNK_SZ + (CHUNK_SPR * CHUNK_CNT);
+				currDesc->numSgBuffs = 1;
+			}
+			else if ((LST_CHUNK_SZ != 0) && (LST_CHUNK_SPR == 0))	/* Data only */
+			{
+				currDesc->virtAddr = (MV_U32 *)(info->data_buff + (CHUNK_SZ * CHUNK_CNT));
+				currDesc->physAddr = info->data_buff_phys + (CHUNK_SZ * CHUNK_CNT);
+				currDesc->numSgBuffs = 1;
+			}
+			else /* Both spare and data */
+			{
+				currDesc->numSgBuffs = 2;
+				currDesc->sgBuffAddr[0] = (info->data_buff_phys + (CHUNK_SZ * CHUNK_CNT));
+				currDesc->sgBuffAddrVirt[0] = (MV_U32 *)(info->data_buff + (CHUNK_SZ * CHUNK_CNT));
+				currDesc->sgBuffSize[0] = LST_CHUNK_SZ;
+				currDesc->sgBuffAddr[1] = (info->data_buff_phys + (CHUNK_SZ * CHUNK_CNT) + LST_CHUNK_SZ + (CHUNK_SPR * CHUNK_CNT));
+				currDesc->sgBuffAddrVirt[1] = (MV_U32 *)(info->data_buff + (CHUNK_SZ * CHUNK_CNT) + LST_CHUNK_SZ + (CHUNK_SPR * CHUNK_CNT));
+				currDesc->sgBuffSize[1] = LST_CHUNK_SPR;
+			}
+			currDesc++;
+		}
+
+		/* Write Dispatch END */
+		currDesc->cmd = MV_NFC_CMD_WRITE_DISPATCH_END;
+		currDesc->pageAddr = info->page_addr;
+		currDesc->pageCount = 1;
+		currDesc->numSgBuffs = 1;
+		currDesc->length = 0;
+
+		*numCmds = CHUNK_CNT + (((LST_CHUNK_SZ) || (LST_CHUNK_SPR)) ? 1 : 0) + 2;
+	} else {
+		descInfo[0].cmd = info->cmd;
+		descInfo[0].pageAddr = info->page_addr;
+		descInfo[0].pageCount = 1;
+		descInfo[0].virtAddr = (MV_U32 *)info->data_buff;
+		descInfo[0].physAddr = info->data_buff_phys;
+		descInfo[0].numSgBuffs = 1;
+		descInfo[0].length = info->data_size;
+		*numCmds = 1;
+	}
+
+	return 0;
+}
+
+static int orion_nfc_do_cmd_dma(struct orion_nfc_info *info,
+		uint32_t event)
+{
+	uint32_t ndcr;
+	int ret, timeout = CHIP_DELAY_TIMEOUT;
+	MV_STATUS status;
+	MV_U32	numCmds;
+
+	/* static allocation to avoid stack overflow*/
+	static MV_NFC_MULTI_CMD descInfo[NFC_MAX_NUM_OF_DESCR];
+
+	/* Clear all status bits. */
+	MV_REG_WRITE(NFC_STATUS_REG, NFC_SR_MASK);
+
+	mvNfcIntrSet(&info->nfcCtrl, event, MV_TRUE);
+
+	NFC_DPRINT((PRINT_LVL "\nAbout to issue dma cmd %d (cs %d) - 0x%x.\n",
+				info->cmd, info->nfcCtrl.currCs,
+				MV_REG_READ(NFC_CONTROL_REG)));
+	if ((info->cmd == MV_NFC_CMD_READ_MONOLITHIC) ||
+	    (info->cmd == MV_NFC_CMD_READ_ID) ||
+	    (info->cmd == MV_NFC_CMD_READ_STATUS))
+		info->state = STATE_DMA_READING;
+	else
+		info->state = STATE_CMD_HANDLE;
+	info->chained_cmd = 1;
+
+	orion_nfc_cmd_prepare(info, descInfo, &numCmds);
+
+	status = mvNfcCommandMultiple(&info->nfcCtrl,descInfo, numCmds);
+	if (status != MV_OK) {
+		printk(KERN_ERR "nfcCmdMultiple() failed for cmd %d (%d).\n",
+				info->cmd, status);
+		goto fail;
+	}
+
+	NFC_DPRINT((PRINT_LVL "After issue command %d - 0x%x.\n",
+				info->cmd, MV_REG_READ(NFC_STATUS_REG)));
+
+	ret = orion_nfc_wait_for_completion_timeout(info, timeout);
+	if (!ret) {
+		printk(KERN_ERR "Cmd %d execution timed out (0x%x) - cs %d.\n",
+				info->cmd, MV_REG_READ(NFC_STATUS_REG),
+				info->nfcCtrl.currCs);
+		info->retcode = ERR_CMD_TO;
+		goto fail_stop;
+	}
+
+	mvNfcIntrSet(&info->nfcCtrl, event | MV_NFC_STATUS_CMDD, MV_FALSE);
+
+	while (MV_PDMA_CHANNEL_STOPPED !=
+			mvPdmaChannelStateGet(&info->nfcCtrl.dataChanHndl)) {
+		if (info->retcode == ERR_NONE)
+			BUG();
+
+	}
+
+	return 0;
+
+fail_stop:
+	ndcr = MV_REG_READ(NFC_CONTROL_REG);
+	MV_REG_WRITE(NFC_CONTROL_REG, ndcr & ~NFC_CTRL_ND_RUN_MASK);
+	udelay(10);
+fail:
+	return -ETIMEDOUT;
+}
+
+static int orion_nfc_error_check(struct orion_nfc_info *info)
+{
+	switch (info->cmd) {
+		case MV_NFC_CMD_ERASE:
+		case MV_NFC_CMD_MULTIPLANE_ERASE:
+		case MV_NFC_CMD_WRITE_MONOLITHIC:
+		case MV_NFC_CMD_WRITE_MULTIPLE:
+		case MV_NFC_CMD_WRITE_NAKED:
+		case MV_NFC_CMD_WRITE_LAST_NAKED:
+		case MV_NFC_CMD_WRITE_DISPATCH:
+		case MV_NFC_CMD_WRITE_DISPATCH_START:
+		case MV_NFC_CMD_WRITE_DISPATCH_END:
+			if (info->dscr & (MV_NFC_CS0_BAD_BLK_DETECT_INT | MV_NFC_CS1_BAD_BLK_DETECT_INT)) {
+				info->retcode = ERR_BBD;
+				return 1;
+			}
+			break;
+		
+		case MV_NFC_CMD_CACHE_READ_SEQ:
+		case MV_NFC_CMD_CACHE_READ_RAND:
+		case MV_NFC_CMD_EXIT_CACHE_READ:
+		case MV_NFC_CMD_CACHE_READ_START:
+		case MV_NFC_CMD_READ_MONOLITHIC:
+		case MV_NFC_CMD_READ_MULTIPLE:
+		case MV_NFC_CMD_READ_NAKED:
+		case MV_NFC_CMD_READ_LAST_NAKED:
+		case MV_NFC_CMD_READ_DISPATCH:
+			if (info->dscr & MV_NFC_UNCORR_ERR_INT) {
+				info->dscr = ERR_DBERR;
+				return 1;
+			}
+			break;
+
+		default:
+			break;
+	}
+
+	info->retcode = ERR_NONE;
+	return 0;
+}
+
+/* ==================================================================================================
+ *           STEP  1		|   STEP  2   |   STEP  3   |   STEP  4   |   STEP  5   |   STEP 6
+ *           COMMAND		|   WAIT FOR  |   CHK ERRS  |     PIO     |   WAIT FOR  |   CHK ERRS
+ * =========================|=============|=============|=============|=============|============
+ *   READ MONOLITHIC		|   RDDREQ    |   UNCERR    |    READ     |     NONE    |    NONE
+ *   READ NAKED				|   RDDREQ    |   UNCERR    |    READ     |     NONE    |    NONE
+ *   READ LAST NAKED		|   RDDREQ    |   UNCERR    |    READ     |     NONE    |    NONE
+ *   WRITE MONOLITHIC		|   WRDREQ    |    NONE     |    WRITE    |     RDY     |    BBD
+ *   WRITE DISPATCH START	|   CMDD      |    NONE     |    NONE     |     NONE    |    NONE
+ *   WRITE NAKED			|   WRDREQ    |    NONE     |    WRITE    |     PAGED   |    NONE
+ *   WRITE DISPATCH END		|   NONE      |    NONE     |    NONE     |     RDY     |    BBD
+ *   ERASE					|   NONE      |    NONE     |    NONE     |     RDY     |    BBD
+ *   READ ID				|   RDDREQ    |    NONE     |    READ     |     NONE    |    NONE
+ *   READ STAT				|   RDDREQ    |    NONE     |    READ     |     NONE    |    NONE
+ *   RESET					|   NONE      |    NONE     |    NONE     |     RDY     |    NONE
+ */
+static int orion_nfc_do_cmd_pio(struct orion_nfc_info *info)
+{
+	int timeout = CHIP_DELAY_TIMEOUT;
+	MV_STATUS status;
+	MV_U32	i, j, numCmds;
+	MV_U32 ndcr;
+
+	/* static allocation to avoid stack overflow */
+	static MV_NFC_MULTI_CMD descInfo[NFC_MAX_NUM_OF_DESCR];
+
+	/* Clear all status bits */
+	MV_REG_WRITE(NFC_STATUS_REG, NFC_SR_MASK);	
+	
+	NFC_DPRINT((PRINT_LVL "\nStarting PIO command %d (cs %d) - NDCR=0x%08x\n",
+				info->cmd, info->nfcCtrl.currCs, MV_REG_READ(NFC_CONTROL_REG)));
+
+	/* Build the chain of commands */
+	orion_nfc_cmd_prepare(info, descInfo, &numCmds);
+	NFC_DPRINT((PRINT_LVL "Prepared %d commands in sequence\n", numCmds));
+
+	/* Execute the commands */
+	for (i=0; i < numCmds; i++) {
+		/* Verify that command is supported in PIO mode */
+		if ((orion_nfc_cmd_info_lkup[descInfo[i].cmd].events_p1 == 0) &&
+		    (orion_nfc_cmd_info_lkup[descInfo[i].cmd].events_p2 == 0)) {
+			goto fail_stop;
+		}
+		
+		/* clear the return code */
+		info->dscr = 0;
+
+		/* STEP1: Initiate the command */
+		NFC_DPRINT((PRINT_LVL "About to issue Descriptor #%d (command %d, pageaddr 0x%x, length %d).\n", 
+			    i, descInfo[i].cmd, descInfo[i].pageAddr, descInfo[i].length));
+		if ((status = mvNfcCommandPio(&info->nfcCtrl, &descInfo[i], MV_FALSE)) != MV_OK) {
+			printk(KERN_ERR "mvNfcCommandPio() failed for command %d (%d).\n", descInfo[i].cmd, status);
+			goto fail_stop;
+		}
+		NFC_DPRINT((PRINT_LVL "After issue command %d (NDSR=0x%x)\n", descInfo[i].cmd, MV_REG_READ(NFC_STATUS_REG)));
+	
+		/* Check if command phase interrupts events are needed */
+		if (orion_nfc_cmd_info_lkup[descInfo[i].cmd].events_p1) {
+			/* Enable necessary interrupts for command phase */
+			NFC_DPRINT((PRINT_LVL "Enabling part1 interrupts (IRQs 0x%x)\n", orion_nfc_cmd_info_lkup[descInfo[i].cmd].events_p1));
+			mvNfcIntrSet(&info->nfcCtrl, orion_nfc_cmd_info_lkup[descInfo[i].cmd].events_p1, MV_TRUE);	
+			
+			/* STEP2: wait for interrupt */
+			if (!orion_nfc_wait_for_completion_timeout(info, timeout)) {
+				printk(KERN_ERR "command %d execution timed out (CS %d, NDCR=0x%x, NDSR=0x%x).\n",
+				       descInfo[i].cmd, info->nfcCtrl.currCs, MV_REG_READ(NFC_CONTROL_REG), MV_REG_READ(NFC_STATUS_REG));
+				info->retcode = ERR_CMD_TO;
+				goto fail_stop;
+			}
+		
+			/* STEP3: Check for errors */
+			if (orion_nfc_error_check(info)) {
+				NFC_DPRINT((PRINT_LVL "Command level errors (DSCR=%08x, retcode=%d)\n", info->dscr, info->retcode));
+				goto fail_stop;
+			}
+		}		
+				
+		/* STEP4: PIO Read/Write data if needed */
+		if (descInfo[i].numSgBuffs > 1)
+		{
+			for (j=0; j< descInfo[i].numSgBuffs; j++) {
+				NFC_DPRINT((PRINT_LVL "Starting SG#%d PIO Read/Write (%d bytes, R/W mode %d)\n", j, 
+					    descInfo[i].sgBuffSize[j], orion_nfc_cmd_info_lkup[descInfo[i].cmd].rw));
+				mvNfcReadWritePio(&info->nfcCtrl, descInfo[i].sgBuffAddrVirt[j], 
+						  descInfo[i].sgBuffSize[j], orion_nfc_cmd_info_lkup[descInfo[i].cmd].rw);
+			}
+		}
+		else {
+			NFC_DPRINT((PRINT_LVL "Starting nonSG PIO Read/Write (%d bytes, R/W mode %d)\n", 
+				    descInfo[i].length, orion_nfc_cmd_info_lkup[descInfo[i].cmd].rw));
+			mvNfcReadWritePio(&info->nfcCtrl, descInfo[i].virtAddr, 
+					  descInfo[i].length, orion_nfc_cmd_info_lkup[descInfo[i].cmd].rw);
+		}
+
+		/* check if data phase events are needed */
+		if (orion_nfc_cmd_info_lkup[descInfo[i].cmd].events_p2) {
+			/* Enable the RDY interrupt to close the transaction */
+			NFC_DPRINT((PRINT_LVL "Enabling part2 interrupts (IRQs 0x%x)\n", orion_nfc_cmd_info_lkup[descInfo[i].cmd].events_p2));
+			mvNfcIntrSet(&info->nfcCtrl, orion_nfc_cmd_info_lkup[descInfo[i].cmd].events_p2, MV_TRUE);			
+
+			/* STEP5: Wait for transaction to finish */
+			if (!orion_nfc_wait_for_completion_timeout(info, timeout)) {
+				printk(KERN_ERR "command %d execution timed out (NDCR=0x%08x, NDSR=0x%08x, NDECCCTRL=0x%08x)\n", descInfo[i].cmd, 
+						MV_REG_READ(NFC_CONTROL_REG), MV_REG_READ(NFC_STATUS_REG), MV_REG_READ(NFC_ECC_CONTROL_REG));
+				info->retcode = ERR_DATA_TO;
+				goto fail_stop;
+			}
+		
+			/* STEP6: Check for errors BB errors (in erase) */
+			if (orion_nfc_error_check(info)) {
+				NFC_DPRINT((PRINT_LVL "Data level errors (DSCR=0x%08x, retcode=%d)\n", info->dscr, info->retcode));
+				goto fail_stop;
+			}
+		}
+	
+		/* Fallback - in case the NFC did not reach the idle state */
+		ndcr = MV_REG_READ(NFC_CONTROL_REG);
+		if (ndcr & NFC_CTRL_ND_RUN_MASK) {
+			printk(KERN_DEBUG "WRONG NFC STAUS: command %d, NDCR=0x%08x, NDSR=0x%08x, NDECCCTRL=0x%08x)\n", 
+		       	info->cmd, MV_REG_READ(NFC_CONTROL_REG), MV_REG_READ(NFC_STATUS_REG), MV_REG_READ(NFC_ECC_CONTROL_REG));
+			MV_REG_WRITE(NFC_CONTROL_REG, (ndcr & ~NFC_CTRL_ND_RUN_MASK));
+		}
+	}
+
+	NFC_DPRINT((PRINT_LVL "Command done (NDCR=0x%08x, NDSR=0x%08x)\n", MV_REG_READ(NFC_CONTROL_REG), MV_REG_READ(NFC_STATUS_REG)));
+	info->retcode = ERR_NONE;	
+	
+	return 0;
+
+fail_stop:
+	ndcr = MV_REG_READ(NFC_CONTROL_REG);
+	if (ndcr & NFC_CTRL_ND_RUN_MASK) {
+		printk(KERN_ERR "WRONG NFC STAUS: command %d, NDCR=0x%08x, NDSR=0x%08x, NDECCCTRL=0x%08x)\n", 
+		       info->cmd, MV_REG_READ(NFC_CONTROL_REG), MV_REG_READ(NFC_STATUS_REG), MV_REG_READ(NFC_ECC_CONTROL_REG));
+		MV_REG_WRITE(NFC_CONTROL_REG, (ndcr & ~NFC_CTRL_ND_RUN_MASK));
+	}
+	mvNfcIntrSet(&info->nfcCtrl, 0xFFF, MV_FALSE);
+	udelay(10);
+	return -ETIMEDOUT;
+}
+
+static int orion_nfc_dev_ready(struct mtd_info *mtd)
+{
+	return (MV_REG_READ(NFC_STATUS_REG) & (NFC_SR_RDY0_MASK | NFC_SR_RDY1_MASK)) ? 1 : 0;
+}
+
+static inline int is_buf_blank(uint8_t *buf, size_t len)
+{
+	for (; len > 0; len--)
+		if (*buf++ != 0xff)
+			return 0;
+	return 1;
+}
+
+static void orion_nfc_cmdfunc(struct mtd_info *mtd, unsigned command,
+				int column, int page_addr)
+{
+	struct orion_nfc_info *info = (struct orion_nfc_info *)((struct nand_chip *)mtd->priv)->priv;
+	int ret;
+
+	info->data_size = 0;
+	info->state = STATE_READY;
+	info->chained_cmd = 0;
+	info->retcode = ERR_NONE;
+
+	init_completion(&info->cmd_complete);
+
+	switch (command) {
+	case NAND_CMD_READOOB:
+		info->buf_count = mtd->writesize + mtd->oobsize;
+		info->buf_start = mtd->writesize + column;
+		info->cmd = MV_NFC_CMD_READ_MONOLITHIC;
+		info->column = column;
+		info->page_addr = page_addr;
+		if (prepare_read_prog_cmd(info, column, page_addr))
+			break;
+
+		if (info->use_dma)
+			orion_nfc_do_cmd_dma(info, MV_NFC_STATUS_RDY | NFC_SR_UNCERR_MASK);
+		else
+			orion_nfc_do_cmd_pio(info);
+
+		/* We only are OOB, so if the data has error, does not matter */
+		if (info->retcode == ERR_DBERR)
+			info->retcode = ERR_NONE;
+		break;
+
+	case NAND_CMD_READ0:
+		info->buf_start = column;
+		info->buf_count = mtd->writesize + mtd->oobsize;
+		memset(info->data_buff, 0xff, info->buf_count);
+		info->cmd = MV_NFC_CMD_READ_MONOLITHIC;
+		info->column = column;
+		info->page_addr = page_addr;
+
+		if (prepare_read_prog_cmd(info, column, page_addr))
+			break;
+
+		if (info->use_dma)
+			orion_nfc_do_cmd_dma(info, MV_NFC_STATUS_RDY | NFC_SR_UNCERR_MASK);
+		else
+			orion_nfc_do_cmd_pio(info);
+
+		if (info->retcode == ERR_DBERR) {
+			/* for blank page (all 0xff), HW will calculate its ECC as
+			 * 0, which is different from the ECC information within
+			 * OOB, ignore such double bit errors
+			 */
+			if (is_buf_blank(info->data_buff, mtd->writesize))
+				info->retcode = ERR_NONE;
+			else
+				printk(PRINT_LVL "%s: retCode == ERR_DBERR\n", __FUNCTION__);
+		}
+		break;
+	case NAND_CMD_SEQIN:
+		info->buf_start = column;
+		info->buf_count = mtd->writesize + mtd->oobsize;
+		memset(info->data_buff + mtd->writesize, 0xff, mtd->oobsize);
+
+		/* save column/page_addr for next CMD_PAGEPROG */
+		info->seqin_column = column;
+		info->seqin_page_addr = page_addr;
+		break;
+	case NAND_CMD_PAGEPROG:
+		info->column = info->seqin_column;
+		info->page_addr = info->seqin_page_addr;
+		info->cmd = MV_NFC_CMD_WRITE_MONOLITHIC;
+		if (prepare_read_prog_cmd(info,
+				info->seqin_column, info->seqin_page_addr)) {
+			printk(KERN_ERR "prepare_read_prog_cmd() failed.\n");
+			break;
+		}
+	
+		if (info->use_dma)
+			orion_nfc_do_cmd_dma(info, MV_NFC_STATUS_RDY);
+		else
+			orion_nfc_do_cmd_pio(info);
+
+		break;
+	case NAND_CMD_ERASE1:
+		info->column = 0;
+		info->page_addr = page_addr;
+		info->cmd = MV_NFC_CMD_ERASE;
+
+		if (info->use_dma)
+			orion_nfc_do_cmd_dma(info, MV_NFC_STATUS_BBD | MV_NFC_STATUS_RDY);
+		else
+			orion_nfc_do_cmd_pio(info);
+
+		break;
+	case NAND_CMD_ERASE2:
+		break;
+	case NAND_CMD_READID:
+	case NAND_CMD_STATUS:
+		info->buf_start = 0;
+		info->buf_count = (command == NAND_CMD_READID) ?
+				info->read_id_bytes : 1;
+		info->data_size = 8;
+		info->column = 0;
+		info->page_addr = 0;
+		info->cmd = (command == NAND_CMD_READID) ?
+			MV_NFC_CMD_READ_ID : MV_NFC_CMD_READ_STATUS;
+
+		if (info->use_dma)
+			orion_nfc_do_cmd_dma(info,MV_NFC_STATUS_RDY);
+		else
+			orion_nfc_do_cmd_pio(info);
+
+		break;
+	case NAND_CMD_RESET:
+		info->column = 0;
+		info->page_addr = 0;
+		info->cmd = MV_NFC_CMD_RESET;
+
+		if (info->use_dma)
+			ret = orion_nfc_do_cmd_dma(info, MV_NFC_STATUS_CMDD);
+		else
+			ret = orion_nfc_do_cmd_pio(info);
+
+		if (ret == 0) {
+			int timeout = 2;
+			uint32_t ndcr;
+
+			while (timeout--) {
+				if (MV_REG_READ(NFC_STATUS_REG) & (NFC_SR_RDY0_MASK | NFC_SR_RDY1_MASK))
+					break;
+				msleep(10);
+			}
+
+			ndcr = MV_REG_READ(NFC_CONTROL_REG);
+			MV_REG_WRITE(NFC_CONTROL_REG, ndcr & ~NFC_CTRL_ND_RUN_MASK);
+		}
+		break;
+	default:
+		printk(KERN_ERR "non-supported command.\n");
+		break;
+	}
+
+	if (info->retcode == ERR_DBERR) {
+		printk(KERN_ERR "double bit error @ page %08x (%d)\n",
+				page_addr, info->cmd);
+		info->retcode = ERR_NONE;
+	}
+}
+
+static uint8_t orion_nfc_read_byte(struct mtd_info *mtd)
+{
+	struct orion_nfc_info *info = (struct orion_nfc_info *)((struct nand_chip *)mtd->priv)->priv;
+	char retval = 0xFF;
+
+	if (info->buf_start < info->buf_count)
+		/* Has just send a new command? */
+		retval = info->data_buff[info->buf_start++];
+	return retval;
+}
+
+static u16 orion_nfc_read_word(struct mtd_info *mtd)
+{
+	struct orion_nfc_info *info = (struct orion_nfc_info *)((struct nand_chip *)mtd->priv)->priv;
+	u16 retval = 0xFFFF;
+
+	if (!(info->buf_start & 0x01) && info->buf_start < info->buf_count) {
+		retval = *((u16 *)(info->data_buff+info->buf_start));
+		info->buf_start += 2;
+	}
+	else
+		printk(KERN_ERR "\n%s: returning 0xFFFF (%d, %d).\n",__FUNCTION__, info->buf_start,info->buf_count);
+
+	return retval;
+}
+
+static void orion_nfc_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
+{
+	struct orion_nfc_info *info = (struct orion_nfc_info *)((struct nand_chip *)mtd->priv)->priv;
+	int real_len = min_t(size_t, len, info->buf_count - info->buf_start);
+
+	memcpy(buf, info->data_buff + info->buf_start, real_len);
+	info->buf_start += real_len;
+}
+
+static void orion_nfc_write_buf(struct mtd_info *mtd,
+		const uint8_t *buf, int len)
+{
+	struct orion_nfc_info *info = (struct orion_nfc_info *)((struct nand_chip *)mtd->priv)->priv;
+	int real_len = min_t(size_t, len, info->buf_count - info->buf_start);
+
+	memcpy(info->data_buff + info->buf_start, buf, real_len);
+	info->buf_start += real_len;
+}
+
+static int orion_nfc_verify_buf(struct mtd_info *mtd,
+		const uint8_t *buf, int len)
+{
+	return 0;
+}
+
+static void orion_nfc_select_chip(struct mtd_info *mtd, int chip)
+{
+	struct orion_nfc_info *info = (struct orion_nfc_info *)((struct nand_chip *)mtd->priv)->priv;
+	mvNfcSelectChip(&info->nfcCtrl, MV_NFC_CS_0 + chip);
+	return;
+}
+
+static int orion_nfc_waitfunc(struct mtd_info *mtd, struct nand_chip *this)
+{
+	struct orion_nfc_info *info = (struct orion_nfc_info *)((struct nand_chip *)mtd->priv)->priv;
+
+	/* orion_nfc_send_command has waited for command complete */
+	if (this->state == FL_WRITING || this->state == FL_ERASING) {
+		if (info->retcode == ERR_NONE)
+			return 0;
+		else {
+			/*
+			 * any error make it return 0x01 which will tell
+			 * the caller the erase and write fail
+			 */
+			return 0x01;
+		}
+	}
+
+	return 0;
+}
+
+static void orion_nfc_ecc_hwctl(struct mtd_info *mtd, int mode)
+{
+	return;
+}
+
+static int orion_nfc_ecc_calculate(struct mtd_info *mtd,
+		const uint8_t *dat, uint8_t *ecc_code)
+{
+	return 0;
+}
+
+static int orion_nfc_ecc_correct(struct mtd_info *mtd,
+		uint8_t *dat, uint8_t *read_ecc, uint8_t *calc_ecc)
+{
+	struct orion_nfc_info *info = (struct orion_nfc_info *)((struct nand_chip *)mtd->priv)->priv;
+	/*
+	 * Any error include ERR_SEND_CMD, ERR_DBERR, ERR_BUSERR, we
+	 * consider it as a ecc error which will tell the caller the
+	 * read fail We have distinguish all the errors, but the
+	 * nand_read_ecc only check this function return value
+	 */
+	if (info->retcode != ERR_NONE)
+		return -1;
+
+	return 0;
+}
+
+static int orion_nfc_detect_flash(struct orion_nfc_info *info)
+{
+	MV_U32 my_page_size;
+
+	mvNfcFlashPageSizeGet(&info->nfcCtrl, &my_page_size, NULL);
+
+	/* Translate page size to enum */
+	switch (my_page_size)
+	{
+		case 512:
+			info->page_size = NFC_PAGE_512B;
+			break;
+
+		case 2048:
+			info->page_size = NFC_PAGE_2KB;
+			break;
+
+		case 4096:
+			info->page_size = NFC_PAGE_4KB;
+			break;
+		
+		case 8192:
+			info->page_size = NFC_PAGE_8KB;
+			break;
+
+		case 16384:
+			info->page_size = NFC_PAGE_16KB;
+			break;
+
+		default:
+			return -EINVAL;
+	}
+
+	info->flash_width = info->nfc_width;
+	if (info->flash_width != 16 && info->flash_width != 8)
+		return -EINVAL;
+
+	/* calculate flash information */
+	info->read_id_bytes = (pg_sz[info->page_size] >= 2048) ? 4 : 2;
+
+	return 0;
+}
+
+/* the maximum possible buffer size for ganaged 8K page with OOB data
+ * is: 2 * (8K + Spare) ==> to be alligned allocate 5 MMU (4K) pages
+ */
+#define MAX_BUFF_SIZE	(PAGE_SIZE * 5)
+
+static int orion_nfc_init_buff(struct orion_nfc_info *info)
+{
+	struct platform_device *pdev = info->pdev;
+	int ret;
+
+	if (info->use_dma == 0) {
+		info->data_buff = kmalloc(MAX_BUFF_SIZE, GFP_KERNEL);
+		if (info->data_buff == NULL)
+			return -ENOMEM;
+		return 0;
+	}
+
+	info->data_buff = dma_alloc_coherent(&pdev->dev, MAX_BUFF_SIZE,
+				&info->data_buff_phys, GFP_KERNEL);
+	if (info->data_buff == NULL) {
+		dev_err(&pdev->dev, "failed to allocate dma buffer\n");
+		return -ENOMEM;
+	}
+	memset(info->data_buff, 0xff, MAX_BUFF_SIZE);
+
+	ret = pxa_request_dma_intr ("nand-data", info->nfcCtrl.dataChanHndl.chanNumber,
+			orion_nfc_data_dma_irq, info);
+	if (ret < 0) {
+		dev_err(&pdev->dev, "failed to request PDMA IRQ\n");
+		return -ENOMEM;
+	}
+	return 0;
+}
+
+static uint8_t mv_bbt_pattern[] = {'M', 'V', 'B', 'b', 't', '0' };
+static uint8_t mv_mirror_pattern[] = {'1', 't', 'b', 'B', 'V', 'M' };
+
+static struct nand_bbt_descr mvbbt_main_descr = {
+	.options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
+		| NAND_BBT_2BIT | NAND_BBT_VERSION,
+	.offs =	8,
+	.len = 6,
+	.veroffs = 14,
+	.maxblocks = 8,		/* Last 8 blocks in each chip */
+	.pattern = mv_bbt_pattern
+};
+
+static struct nand_bbt_descr mvbbt_mirror_descr = {
+	.options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
+		| NAND_BBT_2BIT | NAND_BBT_VERSION,
+	.offs =	8,
+	.len = 6,
+	.veroffs = 14,
+	.maxblocks = 8,		/* Last 8 blocks in each chip */
+	.pattern = mv_mirror_pattern
+};
+
+
+static int orion_nfc_markbad(struct mtd_info *mtd, loff_t ofs)
+{
+	struct nand_chip *chip = mtd->priv;
+	uint8_t buf[6] = {0, 0, 0, 0, 0, 0};
+	int block, ret = 0;
+	loff_t page_addr;
+
+	/* Get block number */
+	block = (int)(ofs >> chip->bbt_erase_shift);
+	if (chip->bbt)
+		chip->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
+	ret = nand_update_bbt(mtd, ofs);
+
+	if (ret == 0) {
+		/* Get address of the next block */
+		ofs += mtd->erasesize;
+		ofs &= ~(mtd->erasesize - 1);
+
+		/* Get start of oob in last page */
+		ofs -= mtd->oobsize;
+
+		page_addr = ofs;
+		do_div(page_addr, mtd->writesize);
+
+		orion_nfc_cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize,
+				page_addr);
+		orion_nfc_write_buf(mtd, buf, 6);
+		orion_nfc_cmdfunc(mtd, NAND_CMD_PAGEPROG, 0, page_addr);
+	}
+
+	return ret;
+}
+
+
+static void orion_nfc_init_nand(struct nand_chip *nand, struct orion_nfc_info *info)
+{
+	if (info->nfc_width == 16)
+		nand->options 	= (NAND_USE_FLASH_BBT | NAND_BUSWIDTH_16);
+	else
+		nand->options 	= NAND_USE_FLASH_BBT;
+	nand->num_devs		= info->num_devs;
+	nand->oobsize_ovrd	= ((CHUNK_SPR * CHUNK_CNT) + LST_CHUNK_SPR);
+	nand->bb_location	= BB_BYTE_POS;
+	nand->bb_page		= mvNfcBadBlockPageNumber(&info->nfcCtrl);
+	nand->waitfunc		= orion_nfc_waitfunc;
+	nand->select_chip	= orion_nfc_select_chip;
+	nand->dev_ready		= orion_nfc_dev_ready;
+	nand->cmdfunc		= orion_nfc_cmdfunc;
+	nand->read_word		= orion_nfc_read_word;
+	nand->read_byte		= orion_nfc_read_byte;
+	nand->read_buf		= orion_nfc_read_buf;
+	nand->write_buf		= orion_nfc_write_buf;
+	nand->verify_buf	= orion_nfc_verify_buf;
+	nand->block_markbad	= orion_nfc_markbad;
+	nand->ecc.mode		= NAND_ECC_HW;
+	nand->ecc.hwctl		= orion_nfc_ecc_hwctl;
+	nand->ecc.calculate	= orion_nfc_ecc_calculate;
+	nand->ecc.correct	= orion_nfc_ecc_correct;
+	nand->ecc.size		= pg_sz[info->page_size];
+	nand->ecc.layout	= ECC_LAYOUT;
+	nand->bbt_td 		= &mvbbt_main_descr;
+	nand->bbt_md 		= &mvbbt_mirror_descr;
+	nand->badblock_pattern	= BB_INFO;
+	nand->chip_delay 	= 25;
+}
+
+static int orion_nfc_probe(struct platform_device *pdev)
+{
+	struct nfc_platform_data *pdata;
+	struct orion_nfc_info *info;
+	struct nand_chip *nand;
+	struct mtd_info *mtd;
+	struct resource *r;
+	int ret = 0, irq;
+	char * stat[2] = {"Disabled", "Enabled"};
+	char * ecc_stat[] = {"Hamming", "BCH 4bit", "BCH 8bit", "BCH 12bit", "BCH 16bit", "No"};
+	MV_NFC_INFO nfcInfo;
+
+	pdata = pdev->dev.platform_data;
+
+	if (!pdata) {
+		dev_err(&pdev->dev, "no platform data defined\n");
+		return -ENODEV;
+	}
+
+	dev_info(&pdev->dev, "Initialize HAL based NFC in %dbit mode with DMA %s using %s ECC\n",
+			pdata->nfc_width, stat[pdata->use_dma], ecc_stat[pdata->ecc_type]);
+
+	/* Allocate all data: mtd_info -> nand_chip -> orion_nfc_info */
+	mtd = kzalloc(sizeof(struct mtd_info),	GFP_KERNEL);
+	if (!mtd) {
+		dev_err(&pdev->dev, "failed to allocate memory for mtd_info\n");
+		return -ENOMEM;
+	}
+
+	info = kzalloc(sizeof(struct orion_nfc_info), GFP_KERNEL);
+	if (!info) {
+		dev_err(&pdev->dev, "failed to allocate memory for orion_nfc_info\n");
+		return -ENOMEM;
+	}
+
+	nand = kzalloc(sizeof(struct nand_chip), GFP_KERNEL);
+	if (!nand) {
+		dev_err(&pdev->dev, "failed to allocate memory for nand_chip\n");
+		return -ENOMEM;
+	}	
+
+	/* Hookup pointers */
+	info->pdev = pdev;
+	nand->priv = info;
+	mtd->priv = nand;
+	mtd->owner = THIS_MODULE;
+
+	/* Copy all necessary information from platform data */
+	info->use_dma = pdata->use_dma;
+	info->ecc_type = pdata->ecc_type;
+	info->nfc_width = pdata->nfc_width;
+	info->num_devs = pdata->num_devs;
+	info->num_cs = pdata->num_cs;
+	info->tclk = pdata->tclk;
+
+	/* Get the TCLK */
+        info->clk = clk_get_sys("dove-nand", NULL);
+        if (IS_ERR(info->clk)) {
+		dev_err(&pdev->dev, "failed to get nand clock\n");
+		ret = PTR_ERR(info->clk);
+		goto fail_free_mtd;
+        }
+        clk_enable(info->clk);
+
+	irq = platform_get_irq(pdev, 0);
+	if (irq < 0) {
+		dev_err(&pdev->dev, "no IRQ resource defined\n");
+		ret = -ENXIO;
+		goto fail_put_clk;
+	}
+
+	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (r == NULL) {
+		dev_err(&pdev->dev, "no IO memory resource defined\n");
+		ret = -ENODEV;
+		goto fail_put_clk;
+	}
+
+	r = devm_request_mem_region(&pdev->dev, r->start, r->end - r->start + 1,
+				    pdev->name);
+	if (r == NULL) {
+		dev_err(&pdev->dev, "failed to request memory resource\n");
+		ret = -EBUSY;
+		goto fail_put_clk;
+	}
+
+	info->mmio_base = devm_ioremap(&pdev->dev, r->start,
+				       r->end - r->start + 1);
+	if (info->mmio_base == NULL) {
+		dev_err(&pdev->dev, "ioremap() failed\n");
+		ret = -ENODEV;
+		goto fail_put_clk;
+	}
+
+	info->mmio_phys_base = r->start;
+
+#if 0
+	if (mvPdmaHalInit(MV_PDMA_MAX_CHANNELS_NUM) != MV_OK) {
+		dev_err(&pdev->dev, "mvPdmaHalInit() failed.\n");
+		goto fail_put_clk;
+	}
+#endif
+	/* Initialize NFC HAL */
+	nfcInfo.ioMode = (info->use_dma ? MV_NFC_PDMA_ACCESS : MV_NFC_PIO_ACCESS);
+	nfcInfo.eccMode = info->ecc_type;
+		
+	if(info->num_devs == 1)
+		nfcInfo.ifMode = ((info->nfc_width == 8) ? MV_NFC_IF_1X8 : MV_NFC_IF_1X16);
+	else
+		nfcInfo.ifMode = MV_NFC_IF_2X8;
+	nfcInfo.autoStatusRead = MV_FALSE;
+	nfcInfo.tclk = info->tclk;
+	nfcInfo.readyBypass = MV_FALSE;
+	nfcInfo.osHandle = NULL;
+	nfcInfo.regsPhysAddr = DOVE_SB_REGS_PHYS_BASE;
+	nfcInfo.dataPdmaIntMask = MV_PDMA_END_OF_RX_INTR_EN | MV_PDMA_END_INTR_EN;
+	nfcInfo.cmdPdmaIntMask = 0x0;
+	if (mvNfcInit(&nfcInfo, &info->nfcCtrl) != MV_OK) {
+		dev_err(&pdev->dev, "mvNfcInit() failed.\n");
+		goto fail_put_clk;
+	}
+
+	mvNfcSelectChip(&info->nfcCtrl, MV_NFC_CS_0);
+	mvNfcIntrSet(&info->nfcCtrl,  0xFFF, MV_FALSE);
+	mvNfcSelectChip(&info->nfcCtrl, MV_NFC_CS_1);
+	mvNfcIntrSet(&info->nfcCtrl,  0xFFF, MV_FALSE);
+	mvNfcSelectChip(&info->nfcCtrl, MV_NFC_CS_NONE);
+
+	ret = orion_nfc_init_buff(info);
+	if (ret)
+		goto fail_put_clk;
+
+	/* Clear all old events on the status register */
+	MV_REG_WRITE(NFC_STATUS_REG, MV_REG_READ(NFC_STATUS_REG));
+	if (info->use_dma)
+		ret = request_irq(IRQ_NAND, orion_nfc_irq_dma, IRQF_DISABLED,
+				pdev->name, info);
+	else
+		ret = request_irq(IRQ_NAND, orion_nfc_irq_pio, IRQF_DISABLED,
+				pdev->name, info);
+
+	if (ret < 0) {
+		dev_err(&pdev->dev, "failed to request IRQ\n");
+		goto fail_free_buf;
+	}	
+
+	ret = orion_nfc_detect_flash(info);
+	if (ret) {
+		dev_err(&pdev->dev, "failed to detect flash\n");
+		ret = -ENODEV;
+		goto fail_free_irq;
+	}
+
+	orion_nfc_init_nand(nand, info);
+
+	if (nand->ecc.layout == NULL) {
+		dev_err(&pdev->dev, "Undefined ECC layout for selected nand device\n");
+		ret = -ENXIO;
+		goto fail_free_irq;
+	}
+
+	platform_set_drvdata(pdev, mtd);
+
+	if (nand_scan(mtd, info->num_cs)) {
+		dev_err(&pdev->dev, "failed to scan nand\n");
+		ret = -ENXIO;
+		goto fail_free_irq;
+	}
+
+	if (mtd_has_partitions()) {
+		struct mtd_partition	*parts = NULL;
+		int			i, nr_parts = 0;
+
+		if (mtd_has_cmdlinepart()) {
+			static const char *part_probes[]
+					= { "cmdlinepart", NULL, };
+			mtd->name = "dove-nand";
+			nr_parts = parse_mtd_partitions(mtd,
+					part_probes, &parts, 0);
+		}
+
+		if (nr_parts <= 0 && pdata && pdata->parts) {
+			parts = pdata->parts;
+			nr_parts = pdata->nr_parts;
+		}
+
+		if (nr_parts > 0) {
+			for (i = 0; i < nr_parts; i++) {
+				DEBUG(MTD_DEBUG_LEVEL2, "partitions[%d] = "
+					"{.name = %s, .offset = 0x%llx, "
+						".size = 0x%llx (%lldKiB) }\n",
+					i, parts[i].name,
+					(long long)parts[i].offset,
+					(long long)parts[i].size,
+					(long long)(parts[i].size >> 10));
+			}
+			return add_mtd_partitions(mtd, parts, nr_parts);
+		}
+	} else if (pdata && pdata->nr_parts)
+		dev_warn(&info->pdev->dev, "ignoring %d default partitions on %s\n",
+				pdata->nr_parts, info->pdev->name);
+
+	return add_mtd_device(mtd) == 1 ? -ENODEV : 0;
+
+fail_free_irq:
+	free_irq(IRQ_NAND, info);
+fail_free_buf:
+	if (pdata->use_dma) {
+		dma_free_coherent(&pdev->dev, info->data_buff_size,
+			info->data_buff, info->data_buff_phys);
+	} else
+		kfree(info->data_buff);
+fail_put_clk:
+	clk_disable(info->clk);
+	clk_put(info->clk);
+fail_free_mtd:
+	kfree(mtd);
+	kfree(nand);
+	kfree(info);
+	return ret;
+}
+
+static int orion_nfc_remove(struct platform_device *pdev)
+{
+	struct mtd_info *mtd = platform_get_drvdata(pdev);
+	struct orion_nfc_info *info = (struct orion_nfc_info *)((struct nand_chip *)mtd->priv)->priv;
+
+	platform_set_drvdata(pdev, NULL);
+
+	del_mtd_device(mtd);
+	del_mtd_partitions(mtd);
+	free_irq(IRQ_NAND, info);
+	if (info->use_dma) {
+		dma_free_writecombine(&pdev->dev, info->data_buff_size,
+				info->data_buff, info->data_buff_phys);
+	} else
+		kfree(info->data_buff);
+
+	clk_disable(info->clk);
+	clk_put(info->clk);
+	kfree(mtd);
+	return 0;
+}
+
+#ifdef CONFIG_PM
+static int orion_nfc_suspend(struct platform_device *pdev, pm_message_t state)
+{
+	struct mtd_info *mtd = (struct mtd_info *)platform_get_drvdata(pdev);
+	struct orion_nfc_info *info = (struct orion_nfc_info *)((struct nand_chip *)mtd->priv)->priv;
+
+	if (info->state != STATE_READY) {
+		dev_err(&pdev->dev, "driver busy, state = %d\n", info->state);
+		return -EAGAIN;
+	}
+
+	/* Store PDMA registers.	*/
+	info->pdmaDataLen = 128;
+	mvPdmaUnitStateStore(info->pdmaUnitData, &info->pdmaDataLen);
+
+	/* Store NFC registers.	*/
+	info->nfcDataLen = 128;
+	mvNfcUnitStateStore(info->nfcUnitData, &info->nfcDataLen);
+
+	clk_disable(info->clk);
+	return 0;
+}
+
+static int orion_nfc_resume(struct platform_device *pdev)
+{
+	struct mtd_info *mtd = (struct mtd_info *)platform_get_drvdata(pdev);
+	struct orion_nfc_info *info = (struct orion_nfc_info *)((struct nand_chip *)mtd->priv)->priv;
+	MV_U32	i;
+
+	clk_enable(info->clk);
+
+	/* restore PDMA registers */
+	for(i = 0; i < info->pdmaDataLen; i+=2)
+		MV_REG_WRITE(info->pdmaUnitData[i], info->pdmaUnitData[i+1]);
+
+	/* Clear all NAND interrupts */
+	MV_REG_WRITE(NFC_STATUS_REG, MV_REG_READ(NFC_STATUS_REG));
+
+	/* restore NAND registers */
+	for(i = 0; i < info->nfcDataLen; i+=2)
+		MV_REG_WRITE(info->nfcUnitData[i], info->nfcUnitData[i+1]);
+
+	return 0;
+}
+#else
+#define orion_nfc_suspend	NULL
+#define orion_nfc_resume	NULL
+#endif
+
+static struct platform_driver orion_nfc_driver = {
+	.driver = {
+		.name	= "orion-nfc-hal",
+		.owner	= THIS_MODULE,
+	},
+	.probe		= orion_nfc_probe,
+	.remove		= orion_nfc_remove,
+	.suspend	= orion_nfc_suspend,
+	.resume		= orion_nfc_resume,
+};
+
+static int __init orion_nfc_init(void)
+{
+	return platform_driver_register(&orion_nfc_driver);
+}
+module_init(orion_nfc_init);
+
+static void __exit orion_nfc_exit(void)
+{
+	platform_driver_unregister(&orion_nfc_driver);
+}
+module_exit(orion_nfc_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("Dove NAND controller driver")
--- linux-mvl-dove-2.6.32.orig/drivers/mtd/nand/omap2.c
+++ linux-mvl-dove-2.6.32/drivers/mtd/nand/omap2.c
@@ -1099,6 +1099,6 @@
 module_init(omap_nand_init);
 module_exit(omap_nand_exit);
 
-MODULE_ALIAS(DRIVER_NAME);
+MODULE_ALIAS("platform:" DRIVER_NAME);
 MODULE_LICENSE("GPL");
 MODULE_DESCRIPTION("Glue layer for NAND flash on TI OMAP boards");
--- linux-mvl-dove-2.6.32.orig/drivers/mtd/onenand/generic.c
+++ linux-mvl-dove-2.6.32/drivers/mtd/onenand/generic.c
@@ -131,7 +131,7 @@
 	.remove		= __devexit_p(generic_onenand_remove),
 };
 
-MODULE_ALIAS(DRIVER_NAME);
+MODULE_ALIAS("platform:" DRIVER_NAME);
 
 static int __init generic_onenand_init(void)
 {
--- linux-mvl-dove-2.6.32.orig/drivers/mtd/onenand/omap2.c
+++ linux-mvl-dove-2.6.32/drivers/mtd/onenand/omap2.c
@@ -800,7 +800,7 @@
 module_init(omap2_onenand_init);
 module_exit(omap2_onenand_exit);
 
-MODULE_ALIAS(DRIVER_NAME);
+MODULE_ALIAS("platform:" DRIVER_NAME);
 MODULE_LICENSE("GPL");
 MODULE_AUTHOR("Jarkko Lavinen <jarkko.lavinen@nokia.com>");
 MODULE_DESCRIPTION("Glue layer for OneNAND flash on OMAP2 / OMAP3");
--- linux-mvl-dove-2.6.32.orig/drivers/mtd/devices/m25p80.c
+++ linux-mvl-dove-2.6.32/drivers/mtd/devices/m25p80.c
@@ -57,6 +57,7 @@
 #define	SR_BP0			4	/* Block protect 0 */
 #define	SR_BP1			8	/* Block protect 1 */
 #define	SR_BP2			0x10	/* Block protect 2 */
+#define SR_BP3			0x20	/* Block protect 3 */
 #define	SR_SRWD			0x80	/* SR write protect */
 
 /* Define max times to check status register before we give up. */
@@ -80,6 +81,7 @@
 	unsigned		partitioned:1;
 	u8			erase_opcode;
 	u8			command[CMD_SIZE + FAST_READ_DUMMY_BYTE];
+	u8			vendor_id;
 };
 
 static inline struct m25p *mtd_to_m25p(struct mtd_info *mtd)
@@ -575,6 +577,84 @@
 	return ret;
 }
 
+static int m25p80_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
+{
+	struct m25p *flash = mtd_to_m25p(mtd);
+	u8 sr;
+
+	DEBUG(MTD_DEBUG_LEVEL2, "%s: %s %s 0x%08x, len %llu\n",
+	      dev_name(&flash->spi->dev), __func__, "offset",
+			(u32)ofs, len);
+
+	/* sanity checks */
+	if (!len)
+		return 0;
+
+	if (ofs + len > flash->mtd.size)
+		return -EINVAL;
+
+	mutex_lock(&flash->lock);
+
+	/* Wait till previous write/erase is done. */
+	if (wait_till_ready(flash)) {
+		/* REVISIT status return?? */
+		mutex_unlock(&flash->lock);
+		return 1;
+	}
+
+	/* Lock all */
+	sr = (SR_BP0 | SR_BP1 | SR_BP2);
+
+	if (flash->vendor_id == 0xc2)
+		sr |= SR_BP3;
+
+	sr |= SR_SRWD;
+
+	write_enable(flash);
+	write_sr(flash, sr);
+
+	mutex_unlock(&flash->lock);
+
+	return 0;
+}
+
+static int m25p80_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
+{
+	struct m25p *flash = mtd_to_m25p(mtd);
+	u8 sr;
+
+	DEBUG(MTD_DEBUG_LEVEL2, "%s: %s %s 0x%08x, len %llu\n",
+	      dev_name(&flash->spi->dev), __func__, "offset",
+			(u32)ofs, (long long) len);
+
+	/* sanity checks */
+	if (!len)
+		return 0;
+
+	if (ofs + len > flash->mtd.size)
+		return -EINVAL;
+
+	mutex_lock(&flash->lock);
+
+	/* Wait till previous write/erase is done. */
+	if (wait_till_ready(flash)) {
+		/* REVISIT status return?? */
+		mutex_unlock(&flash->lock);
+		return 1;
+	}
+
+	/* Unlock all */
+	sr = 0;
+	sr |= SR_SRWD;
+
+	write_enable(flash);
+	write_sr(flash, sr);
+
+	mutex_unlock(&flash->lock);
+
+	return 0;
+}
+
 /****************************************************************************/
 
 /*
@@ -675,6 +755,11 @@
 	{ "w25x16", 0xef3015, 0, 64 * 1024, 32, SECT_4K, },
 	{ "w25x32", 0xef3016, 0, 64 * 1024, 64, SECT_4K, },
 	{ "w25x64", 0xef3017, 0, 64 * 1024, 128, SECT_4K, },
+
+	/* MXIC -- single (large) sector size only */
+	{ "mx25l1605", 0xc22015, 0, 64 * 1024, 32, },
+	{ "mx25l3205", 0xc22016, 0, 64 * 1024, 64, },
+	{ "mx25l6405", 0xc22017, 0, 64 * 1024, 128, },
 };
 
 static struct flash_info *__devinit jedec_probe(struct spi_device *spi)
@@ -803,6 +888,12 @@
 	else
 		flash->mtd.write = m25p80_write;
 
+	flash->mtd.lock = m25p80_lock;
+	flash->mtd.unlock = m25p80_unlock;
+
+	/* keep the vendor id here */
+	flash->vendor_id = (u8)(info->jedec_id >> 16);
+
 	/* prefer "small sector" erase if possible */
 	if (info->flags & SECT_4K) {
 		flash->erase_opcode = OPCODE_BE_4K;
--- linux-mvl-dove-2.6.32.orig/drivers/mtd/devices/block2mtd.c
+++ linux-mvl-dove-2.6.32/drivers/mtd/devices/block2mtd.c
@@ -21,6 +21,7 @@
 #define ERROR(fmt, args...) printk(KERN_ERR "block2mtd: " fmt "\n" , ## args)
 #define INFO(fmt, args...) printk(KERN_INFO "block2mtd: " fmt "\n" , ## args)
 
+#define MTD_PAGE_MASK	(~((loff_t)(PAGE_SIZE-1)))
 
 /* Info for the block device */
 struct block2mtd_dev {
@@ -146,7 +147,7 @@
 	struct page *page;
 	struct address_space *mapping = dev->blkdev->bd_inode->i_mapping;
 	int index = to >> PAGE_SHIFT;	// page index
-	int offset = to & ~PAGE_MASK;	// page offset
+	int offset = to & ~MTD_PAGE_MASK;	// page offset
 	int cpylen;
 
 	if (retlen)
@@ -283,7 +284,7 @@
 	sprintf(name, "block2mtd: %s", devname);
 	dev->mtd.name = name;
 
-	dev->mtd.size = dev->blkdev->bd_inode->i_size & PAGE_MASK;
+	dev->mtd.size = dev->blkdev->bd_inode->i_size & MTD_PAGE_MASK;
 	dev->mtd.erasesize = erase_size;
 	dev->mtd.writesize = 1;
 	dev->mtd.type = MTD_RAM;
--- linux-mvl-dove-2.6.32.orig/drivers/mtd/ubi/cdev.c
+++ linux-mvl-dove-2.6.32/drivers/mtd/ubi/cdev.c
@@ -853,7 +853,6 @@
 			break;
 		}
 
-		req.name[req.name_len] = '\0';
 		err = verify_mkvol_req(ubi, &req);
 		if (err)
 			break;
--- linux-mvl-dove-2.6.32.orig/drivers/mtd/ubi/upd.c
+++ linux-mvl-dove-2.6.32/drivers/mtd/ubi/upd.c
@@ -147,12 +147,15 @@
 	}
 
 	if (bytes == 0) {
+		err = ubi_wl_flush(ubi);
+		if (err)
+			return err;
+
 		err = clear_update_marker(ubi, vol, 0);
 		if (err)
 			return err;
-		err = ubi_wl_flush(ubi);
-		if (!err)
-			vol->updating = 0;
+		vol->updating = 0;
+		return 0;
 	}
 
 	vol->upd_buf = vmalloc(ubi->leb_size);
@@ -362,16 +365,16 @@
 
 	ubi_assert(vol->upd_received <= vol->upd_bytes);
 	if (vol->upd_received == vol->upd_bytes) {
+		err = ubi_wl_flush(ubi);
+		if (err)
+			return err;
 		/* The update is finished, clear the update marker */
 		err = clear_update_marker(ubi, vol, vol->upd_bytes);
 		if (err)
 			return err;
-		err = ubi_wl_flush(ubi);
-		if (err == 0) {
-			vol->updating = 0;
-			err = to_write;
-			vfree(vol->upd_buf);
-		}
+		vol->updating = 0;
+		err = to_write;
+		vfree(vol->upd_buf);
 	}
 
 	return err;
--- linux-mvl-dove-2.6.32.orig/drivers/mtd/ubi/vtbl.c
+++ linux-mvl-dove-2.6.32/drivers/mtd/ubi/vtbl.c
@@ -566,6 +566,7 @@
 		vol->reserved_pebs = be32_to_cpu(vtbl[i].reserved_pebs);
 		vol->alignment = be32_to_cpu(vtbl[i].alignment);
 		vol->data_pad = be32_to_cpu(vtbl[i].data_pad);
+		vol->upd_marker = vtbl[i].upd_marker;
 		vol->vol_type = vtbl[i].vol_type == UBI_VID_DYNAMIC ?
 					UBI_DYNAMIC_VOLUME : UBI_STATIC_VOLUME;
 		vol->name_len = be16_to_cpu(vtbl[i].name_len);
--- linux-mvl-dove-2.6.32.orig/drivers/mtd/ubi/build.c
+++ linux-mvl-dove-2.6.32/drivers/mtd/ubi/build.c
@@ -851,8 +851,6 @@
 	struct ubi_device *ubi;
 
 	ubi = container_of(n, struct ubi_device, reboot_notifier);
-	if (ubi->bgt_thread)
-		kthread_stop(ubi->bgt_thread);
 	ubi_sync(ubi->ubi_num);
 	return NOTIFY_DONE;
 }
--- linux-mvl-dove-2.6.32.orig/drivers/ide/ide-taskfile.c
+++ linux-mvl-dove-2.6.32/drivers/ide/ide-taskfile.c
@@ -428,13 +428,11 @@
 {
 	struct request *rq;
 	int error;
+	int rw = !(cmd->tf_flags & IDE_TFLAG_WRITE) ? READ : WRITE;
 
-	rq = blk_get_request(drive->queue, READ, __GFP_WAIT);
+	rq = blk_get_request(drive->queue, rw, __GFP_WAIT);
 	rq->cmd_type = REQ_TYPE_ATA_TASKFILE;
 
-	if (cmd->tf_flags & IDE_TFLAG_WRITE)
-		rq->cmd_flags |= REQ_RW;
-
 	/*
 	 * (ks) We transfer currently only whole sectors.
 	 * This is suffient for now.  But, it would be great,
--- linux-mvl-dove-2.6.32.orig/drivers/ide/ide-cd.c
+++ linux-mvl-dove-2.6.32/drivers/ide/ide-cd.c
@@ -506,15 +506,22 @@
 	return (flags & REQ_FAILED) ? -EIO : 0;
 }
 
-static void ide_cd_error_cmd(ide_drive_t *drive, struct ide_cmd *cmd)
+/*
+ * returns true if rq has been completed
+ */
+static bool ide_cd_error_cmd(ide_drive_t *drive, struct ide_cmd *cmd)
 {
 	unsigned int nr_bytes = cmd->nbytes - cmd->nleft;
 
 	if (cmd->tf_flags & IDE_TFLAG_WRITE)
 		nr_bytes -= cmd->last_xfer_len;
 
-	if (nr_bytes > 0)
+	if (nr_bytes > 0) {
 		ide_complete_rq(drive, 0, nr_bytes);
+		return true;
+	}
+
+	return false;
 }
 
 static ide_startstop_t cdrom_newpc_intr(ide_drive_t *drive)
@@ -679,7 +686,8 @@
 		}
 
 		if (uptodate == 0 && rq->bio)
-			ide_cd_error_cmd(drive, cmd);
+			if (ide_cd_error_cmd(drive, cmd))
+				return ide_stopped;
 
 		/* make sure it's fully ended */
 		if (blk_fs_request(rq) == 0) {
--- linux-mvl-dove-2.6.32.orig/drivers/ide/slc90e66.c
+++ linux-mvl-dove-2.6.32/drivers/ide/slc90e66.c
@@ -91,8 +91,7 @@
 
 		if (!(reg48 & u_flag))
 			pci_write_config_word(dev, 0x48, reg48|u_flag);
-		/* FIXME: (reg4a & a_speed) ? */
-		if ((reg4a & u_speed) != u_speed) {
+		if ((reg4a & a_speed) != u_speed) {
 			pci_write_config_word(dev, 0x4a, reg4a & ~a_speed);
 			pci_read_config_word(dev, 0x4a, &reg4a);
 			pci_write_config_word(dev, 0x4a, reg4a|u_speed);
--- linux-mvl-dove-2.6.32.orig/drivers/ide/cmd640.c
+++ linux-mvl-dove-2.6.32/drivers/ide/cmd640.c
@@ -632,12 +632,10 @@
 
 static int cmd640_test_irq(ide_hwif_t *hwif)
 {
-	struct pci_dev *dev	= to_pci_dev(hwif->dev);
 	int irq_reg		= hwif->channel ? ARTTIM23 : CFR;
-	u8  irq_stat, irq_mask	= hwif->channel ? ARTTIM23_IDE23INTR :
+	u8  irq_mask		= hwif->channel ? ARTTIM23_IDE23INTR :
 						  CFR_IDE01INTR;
-
-	pci_read_config_byte(dev, irq_reg, &irq_stat);
+	u8  irq_stat		= get_cmd640_reg(irq_reg);
 
 	return (irq_stat & irq_mask) ? 1 : 0;
 }
--- linux-mvl-dove-2.6.32.orig/drivers/virtio/virtio_pci.c
+++ linux-mvl-dove-2.6.32/drivers/virtio/virtio_pci.c
@@ -95,11 +95,6 @@
 
 MODULE_DEVICE_TABLE(pci, virtio_pci_id_table);
 
-/* A PCI device has it's own struct device and so does a virtio device so
- * we create a place for the virtio devices to show up in sysfs.  I think it
- * would make more sense for virtio to not insist on having it's own device. */
-static struct device *virtio_pci_root;
-
 /* Convert a generic virtio device to our structure */
 static struct virtio_pci_device *to_vp_device(struct virtio_device *vdev)
 {
@@ -473,7 +468,8 @@
 
 	list_for_each_entry_safe(vq, n, &vdev->vqs, list) {
 		info = vq->priv;
-		if (vp_dev->per_vq_vectors)
+		if (vp_dev->per_vq_vectors &&
+			info->msix_vector != VIRTIO_MSI_NO_VECTOR)
 			free_irq(vp_dev->msix_entries[info->msix_vector].vector,
 				 vq);
 		vp_del_vq(vq);
@@ -627,13 +623,16 @@
 	if (vp_dev == NULL)
 		return -ENOMEM;
 
-	vp_dev->vdev.dev.parent = virtio_pci_root;
+	vp_dev->vdev.dev.parent = &pci_dev->dev;
 	vp_dev->vdev.dev.release = virtio_pci_release_dev;
 	vp_dev->vdev.config = &virtio_pci_config_ops;
 	vp_dev->pci_dev = pci_dev;
 	INIT_LIST_HEAD(&vp_dev->virtqueues);
 	spin_lock_init(&vp_dev->lock);
 
+	/* Disable MSI/MSIX to bring device to a known good state. */
+	pci_msi_off(pci_dev);
+
 	/* enable the device */
 	err = pci_enable_device(pci_dev);
 	if (err)
@@ -648,6 +647,7 @@
 		goto out_req_regions;
 
 	pci_set_drvdata(pci_dev, vp_dev);
+	pci_set_master(pci_dev);
 
 	/* we use the subsystem vendor/device id as the virtio vendor/device
 	 * id.  this allows us to use the same PCI vendor/device id for all
@@ -711,17 +711,7 @@
 
 static int __init virtio_pci_init(void)
 {
-	int err;
-
-	virtio_pci_root = root_device_register("virtio-pci");
-	if (IS_ERR(virtio_pci_root))
-		return PTR_ERR(virtio_pci_root);
-
-	err = pci_register_driver(&virtio_pci_driver);
-	if (err)
-		root_device_unregister(virtio_pci_root);
-
-	return err;
+	return pci_register_driver(&virtio_pci_driver);
 }
 
 module_init(virtio_pci_init);
@@ -729,7 +719,6 @@
 static void __exit virtio_pci_exit(void)
 {
 	pci_unregister_driver(&virtio_pci_driver);
-	root_device_unregister(virtio_pci_root);
 }
 
 module_exit(virtio_pci_exit);
--- linux-mvl-dove-2.6.32.orig/drivers/serial/68360serial.c
+++ linux-mvl-dove-2.6.32/drivers/serial/68360serial.c
@@ -1381,6 +1381,30 @@
 }
 
 
+/*
+ * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
+ * Return: write counters to the user passed counter struct
+ * NB: both 1->0 and 0->1 transitions are counted except for
+ *     RI where only 0->1 is counted.
+ */
+static int rs_360_get_icount(struct tty_struct *tty,
+				struct serial_icounter_struct *icount)
+{
+	ser_info_t *info = (ser_info_t *)tty->driver_data;
+	struct async_icount cnow;
+
+	local_irq_disable();
+	cnow = info->state->icount;
+	local_irq_enable();
+
+	icount->cts = cnow.cts;
+	icount->dsr = cnow.dsr;
+	icount->rng = cnow.rng;
+	icount->dcd = cnow.dcd;
+
+	return 0;
+}
+
 static int rs_360_ioctl(struct tty_struct *tty, struct file * file,
 		    unsigned int cmd, unsigned long arg)
 {
@@ -1394,7 +1418,7 @@
 	if (serial_paranoia_check(info, tty->name, "rs_ioctl"))
 		return -ENODEV;
 
-	if ((cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
+	if (cmd != TIOCMIWAIT) {
 		if (tty->flags & (1 << TTY_IO_ERROR))
 		    return -EIO;
 	}
@@ -1477,31 +1501,6 @@
 			return 0;
 #endif
 
-		/* 
-		 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
-		 * Return: write counters to the user passed counter struct
-		 * NB: both 1->0 and 0->1 transitions are counted except for
-		 *     RI where only 0->1 is counted.
-		 */
-		case TIOCGICOUNT:
-			local_irq_disable();
-			cnow = info->state->icount;
-			local_irq_enable();
-			p_cuser = (struct serial_icounter_struct *) arg;
-/* 			error = put_user(cnow.cts, &p_cuser->cts); */
-/* 			if (error) return error; */
-/* 			error = put_user(cnow.dsr, &p_cuser->dsr); */
-/* 			if (error) return error; */
-/* 			error = put_user(cnow.rng, &p_cuser->rng); */
-/* 			if (error) return error; */
-/* 			error = put_user(cnow.dcd, &p_cuser->dcd); */
-/* 			if (error) return error; */
-
-			put_user(cnow.cts, &p_cuser->cts);
-			put_user(cnow.dsr, &p_cuser->dsr);
-			put_user(cnow.rng, &p_cuser->rng);
-			put_user(cnow.dcd, &p_cuser->dcd);
-			return 0;
 
 		default:
 			return -ENOIOCTLCMD;
--- linux-mvl-dove-2.6.32.orig/drivers/serial/imx.c
+++ linux-mvl-dove-2.6.32/drivers/serial/imx.c
@@ -119,7 +119,8 @@
 #define  MX2_UCR3_RXDMUXSEL	 (1<<2)  /* RXD Muxed Input Select, on mx2/mx3 */
 #define  UCR3_INVT  	 (1<<1)  /* Inverted Infrared transmission */
 #define  UCR3_BPEN  	 (1<<0)  /* Preset registers enable */
-#define  UCR4_CTSTL_32   (32<<10) /* CTS trigger level (32 chars) */
+#define  UCR4_CTSTL_SHF  10      /* CTS trigger level shift */
+#define  UCR4_CTSTL_MASK 0x3F    /* CTS trigger is 6 bits wide */
 #define  UCR4_INVR  	 (1<<9)  /* Inverted infrared reception */
 #define  UCR4_ENIRI 	 (1<<8)  /* Serial infrared interrupt enable */
 #define  UCR4_WKEN  	 (1<<7)  /* Wake interrupt enable */
@@ -381,12 +382,13 @@
 static irqreturn_t imx_rtsint(int irq, void *dev_id)
 {
 	struct imx_port *sport = dev_id;
-	unsigned int val = readl(sport->port.membase + USR1) & USR1_RTSS;
+	unsigned int val;
 	unsigned long flags;
 
 	spin_lock_irqsave(&sport->port.lock, flags);
 
 	writel(USR1_RTSD, sport->port.membase + USR1);
+	val = readl(sport->port.membase + USR1) & USR1_RTSS;
 	uart_handle_cts_change(&sport->port, !!val);
 	wake_up_interruptible(&sport->port.state->port.delta_msr_wait);
 
@@ -590,6 +592,9 @@
 	return 0;
 }
 
+/* half the RX buffer size */
+#define CTSTL 16
+
 static int imx_startup(struct uart_port *port)
 {
 	struct imx_port *sport = (struct imx_port *)port;
@@ -606,6 +611,10 @@
 	if (USE_IRDA(sport))
 		temp |= UCR4_IRSC;
 
+	/* set the trigger level for CTS */
+	temp &= ~(UCR4_CTSTL_MASK<<  UCR4_CTSTL_SHF);
+	temp |= CTSTL<<  UCR4_CTSTL_SHF;
+
 	writel(temp & ~UCR4_DREN, sport->port.membase + UCR4);
 
 	if (USE_IRDA(sport)) {
@@ -1279,7 +1288,7 @@
 		sport->use_irda = 1;
 #endif
 
-	if (pdata->init) {
+	if (pdata && pdata->init) {
 		ret = pdata->init(pdev);
 		if (ret)
 			goto clkput;
@@ -1292,7 +1301,7 @@
 
 	return 0;
 deinit:
-	if (pdata->exit)
+	if (pdata && pdata->exit)
 		pdata->exit(pdev);
 clkput:
 	clk_put(sport->clk);
@@ -1321,7 +1330,7 @@
 
 	clk_disable(sport->clk);
 
-	if (pdata->exit)
+	if (pdata && pdata->exit)
 		pdata->exit(pdev);
 
 	iounmap(sport->port.membase);
--- linux-mvl-dove-2.6.32.orig/drivers/serial/serial_core.c
+++ linux-mvl-dove-2.6.32/drivers/serial/serial_core.c
@@ -1067,10 +1067,10 @@
  * NB: both 1->0 and 0->1 transitions are counted except for
  *     RI where only 0->1 is counted.
  */
-static int uart_get_count(struct uart_state *state,
-			  struct serial_icounter_struct __user *icnt)
+static int uart_get_icount(struct tty_struct *tty,
+			  struct serial_icounter_struct *icount)
 {
-	struct serial_icounter_struct icount;
+	struct uart_state *state = tty->driver_data;
 	struct uart_icount cnow;
 	struct uart_port *uport = state->uart_port;
 
@@ -1078,19 +1078,19 @@
 	memcpy(&cnow, &uport->icount, sizeof(struct uart_icount));
 	spin_unlock_irq(&uport->lock);
 
-	icount.cts         = cnow.cts;
-	icount.dsr         = cnow.dsr;
-	icount.rng         = cnow.rng;
-	icount.dcd         = cnow.dcd;
-	icount.rx          = cnow.rx;
-	icount.tx          = cnow.tx;
-	icount.frame       = cnow.frame;
-	icount.overrun     = cnow.overrun;
-	icount.parity      = cnow.parity;
-	icount.brk         = cnow.brk;
-	icount.buf_overrun = cnow.buf_overrun;
+	icount->cts         = cnow.cts;
+	icount->dsr         = cnow.dsr;
+	icount->rng         = cnow.rng;
+	icount->dcd         = cnow.dcd;
+	icount->rx          = cnow.rx;
+	icount->tx          = cnow.tx;
+	icount->frame       = cnow.frame;
+	icount->overrun     = cnow.overrun;
+	icount->parity      = cnow.parity;
+	icount->brk         = cnow.brk;
+	icount->buf_overrun = cnow.buf_overrun;
 
-	return copy_to_user(icnt, &icount, sizeof(icount)) ? -EFAULT : 0;
+	return 0;
 }
 
 /*
@@ -1143,10 +1143,6 @@
 	case TIOCMIWAIT:
 		ret = uart_wait_modem_status(state, arg);
 		break;
-
-	case TIOCGICOUNT:
-		ret = uart_get_count(state, uarg);
-		break;
 	}
 
 	if (ret != -ENOIOCTLCMD)
@@ -2322,6 +2318,7 @@
 #endif
 	.tiocmget	= uart_tiocmget,
 	.tiocmset	= uart_tiocmset,
+	.get_icount	= uart_get_icount,
 #ifdef CONFIG_CONSOLE_POLL
 	.poll_init	= uart_poll_init,
 	.poll_get_char	= uart_poll_get_char,
--- linux-mvl-dove-2.6.32.orig/drivers/serial/8250_pnp.c
+++ linux-mvl-dove-2.6.32/drivers/serial/8250_pnp.c
@@ -328,15 +328,7 @@
 	/* U.S. Robotics 56K Voice INT PnP*/
 	{	"USR9190",		0	},
 	/* Wacom tablets */
-	{	"WACF004",		0	},
-	{	"WACF005",		0	},
-	{       "WACF006",              0       },
-	{       "WACF007",              0       },
-	{       "WACF008",              0       },
-	{       "WACF009",              0       },
-	{       "WACF00A",              0       },
-	{       "WACF00B",              0       },
-	{       "WACF00C",              0       },
+	{	"WACFXXX",		0	},
 	/* Compaq touchscreen */
 	{       "FPI2002",              0 },
 	/* Fujitsu Stylistic touchscreens */
@@ -354,6 +346,10 @@
 	{	"FUJ02E5",		0	},
 	/* Fujitsu P-series tablet PC device */
 	{	"FUJ02E6",		0	},
+	/* Fujitsu Wacom 2FGT Tablet PC device */
+	{	"FUJ02E7",		0	},
+	/* Fujitsu Wacom 1FGT Tablet PC device */
+	{	"FUJ02E9",		0	},
 	/*
 	 * LG C1 EXPRESS DUAL (C1-PB11A3) touch screen (actually a FUJ02E6 in
 	 * disguise)
--- linux-mvl-dove-2.6.32.orig/drivers/serial/uartlite.c
+++ linux-mvl-dove-2.6.32/drivers/serial/uartlite.c
@@ -394,7 +394,7 @@
 		spin_unlock_irqrestore(&port->lock, flags);
 }
 
-static int __init ulite_console_setup(struct console *co, char *options)
+static int __devinit ulite_console_setup(struct console *co, char *options)
 {
 	struct uart_port *port;
 	int baud = 9600;
--- linux-mvl-dove-2.6.32.orig/drivers/serial/8250.c
+++ linux-mvl-dove-2.6.32/drivers/serial/8250.c
@@ -83,6 +83,9 @@
 
 #define PASS_LIMIT	256
 
+#define BOTH_EMPTY 	(UART_LSR_TEMT | UART_LSR_THRE)
+
+
 /*
  * We default to IRQ0 for the "no irq" hack.   Some
  * machine types want others as well - they're free
@@ -252,7 +255,8 @@
 		.fifo_size	= 128,
 		.tx_loadsz	= 128,
 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
-		.flags		= UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
+		/* UART_CAP_EFR breaks billionon CF bluetooth card. */
+		.flags		= UART_CAP_FIFO | UART_CAP_SLEEP,
 	},
 	[PORT_RSA] = {
 		.name		= "RSA",
@@ -1339,14 +1343,12 @@
 		serial_out(up, UART_IER, up->ier);
 
 		if (up->bugs & UART_BUG_TXEN) {
-			unsigned char lsr, iir;
+			unsigned char lsr;
 			lsr = serial_in(up, UART_LSR);
 			up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
-			iir = serial_in(up, UART_IIR) & 0x0f;
 			if ((up->port.type == PORT_RM9000) ?
-				(lsr & UART_LSR_THRE &&
-				(iir == UART_IIR_NO_INT || iir == UART_IIR_THRI)) :
-				(lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT))
+				(lsr & UART_LSR_THRE) :
+				(lsr & UART_LSR_TEMT))
 				transmit_chars(up);
 		}
 	}
@@ -1794,7 +1796,7 @@
 	up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
 	spin_unlock_irqrestore(&up->port.lock, flags);
 
-	return lsr & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
+	return (lsr & BOTH_EMPTY) == BOTH_EMPTY ? TIOCSER_TEMT : 0;
 }
 
 static unsigned int serial8250_get_mctrl(struct uart_port *port)
@@ -1852,8 +1854,6 @@
 	spin_unlock_irqrestore(&up->port.lock, flags);
 }
 
-#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
-
 /*
  *	Wait for transmitter & holding register to empty
  */
--- linux-mvl-dove-2.6.32.orig/drivers/serial/cpm_uart/cpm_uart_core.c
+++ linux-mvl-dove-2.6.32/drivers/serial/cpm_uart/cpm_uart_core.c
@@ -930,6 +930,83 @@
 	}
 }
 
+#if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_CPM_CONSOLE)
+/*
+ * Write a string to the serial port
+ * Note that this is called with interrupts already disabled
+ */
+static void cpm_uart_early_write(struct uart_cpm_port *pinfo,
+		const char *string, u_int count)
+{
+	unsigned int i;
+	cbd_t __iomem *bdp, *bdbase;
+	unsigned char *cpm_outp_addr;
+
+	/* Get the address of the host memory buffer.
+	 */
+	bdp = pinfo->tx_cur;
+	bdbase = pinfo->tx_bd_base;
+
+	/*
+	 * Now, do each character.  This is not as bad as it looks
+	 * since this is a holding FIFO and not a transmitting FIFO.
+	 * We could add the complexity of filling the entire transmit
+	 * buffer, but we would just wait longer between accesses......
+	 */
+	for (i = 0; i < count; i++, string++) {
+		/* Wait for transmitter fifo to empty.
+		 * Ready indicates output is ready, and xmt is doing
+		 * that, not that it is ready for us to send.
+		 */
+		while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
+			;
+
+		/* Send the character out.
+		 * If the buffer address is in the CPM DPRAM, don't
+		 * convert it.
+		 */
+		cpm_outp_addr = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr),
+					pinfo);
+		*cpm_outp_addr = *string;
+
+		out_be16(&bdp->cbd_datlen, 1);
+		setbits16(&bdp->cbd_sc, BD_SC_READY);
+
+		if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
+			bdp = bdbase;
+		else
+			bdp++;
+
+		/* if a LF, also do CR... */
+		if (*string == 10) {
+			while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
+				;
+
+			cpm_outp_addr = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr),
+						pinfo);
+			*cpm_outp_addr = 13;
+
+			out_be16(&bdp->cbd_datlen, 1);
+			setbits16(&bdp->cbd_sc, BD_SC_READY);
+
+			if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
+				bdp = bdbase;
+			else
+				bdp++;
+		}
+	}
+
+	/*
+	 * Finally, Wait for transmitter & holding register to empty
+	 *  and restore the IER
+	 */
+	while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
+		;
+
+	pinfo->tx_cur = bdp;
+}
+#endif
+
 #ifdef CONFIG_CONSOLE_POLL
 /* Serial polling routines for writing and reading from the uart while
  * in an interrupt or debug context.
@@ -999,7 +1076,7 @@
 	static char ch[2];
 
 	ch[0] = (char)c;
-	cpm_uart_early_write(pinfo->port.line, ch, 1);
+	cpm_uart_early_write(pinfo, ch, 1);
 }
 #endif /* CONFIG_CONSOLE_POLL */
 
@@ -1130,9 +1207,6 @@
 				   u_int count)
 {
 	struct uart_cpm_port *pinfo = &cpm_uart_ports[co->index];
-	unsigned int i;
-	cbd_t __iomem *bdp, *bdbase;
-	unsigned char *cp;
 	unsigned long flags;
 	int nolock = oops_in_progress;
 
@@ -1142,66 +1216,7 @@
 		spin_lock_irqsave(&pinfo->port.lock, flags);
 	}
 
-	/* Get the address of the host memory buffer.
-	 */
-	bdp = pinfo->tx_cur;
-	bdbase = pinfo->tx_bd_base;
-
-	/*
-	 * Now, do each character.  This is not as bad as it looks
-	 * since this is a holding FIFO and not a transmitting FIFO.
-	 * We could add the complexity of filling the entire transmit
-	 * buffer, but we would just wait longer between accesses......
-	 */
-	for (i = 0; i < count; i++, s++) {
-		/* Wait for transmitter fifo to empty.
-		 * Ready indicates output is ready, and xmt is doing
-		 * that, not that it is ready for us to send.
-		 */
-		while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
-			;
-
-		/* Send the character out.
-		 * If the buffer address is in the CPM DPRAM, don't
-		 * convert it.
-		 */
-		cp = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
-		*cp = *s;
-
-		out_be16(&bdp->cbd_datlen, 1);
-		setbits16(&bdp->cbd_sc, BD_SC_READY);
-
-		if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
-			bdp = bdbase;
-		else
-			bdp++;
-
-		/* if a LF, also do CR... */
-		if (*s == 10) {
-			while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
-				;
-
-			cp = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
-			*cp = 13;
-
-			out_be16(&bdp->cbd_datlen, 1);
-			setbits16(&bdp->cbd_sc, BD_SC_READY);
-
-			if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
-				bdp = bdbase;
-			else
-				bdp++;
-		}
-	}
-
-	/*
-	 * Finally, Wait for transmitter & holding register to empty
-	 *  and restore the IER
-	 */
-	while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
-		;
-
-	pinfo->tx_cur = bdp;
+	cpm_uart_early_write(pinfo, s, count);
 
 	if (unlikely(nolock)) {
 		local_irq_restore(flags);
--- linux-mvl-dove-2.6.32.orig/drivers/cdrom/cdrom.c
+++ linux-mvl-dove-2.6.32/drivers/cdrom/cdrom.c
@@ -290,7 +290,7 @@
 /* default compatibility mode */
 static int autoclose=1;
 static int autoeject;
-static int lockdoor = 1;
+static int lockdoor = 0;
 /* will we ever get to use this... sigh. */
 static int check_media_type;
 /* automatically restart mrw format */
--- linux-mvl-dove-2.6.32.orig/drivers/edac/amd64_edac.c
+++ linux-mvl-dove-2.6.32/drivers/edac/amd64_edac.c
@@ -13,6 +13,8 @@
 static int ecc_enable_override;
 module_param(ecc_enable_override, int, 0644);
 
+static struct msr *msrs;
+
 /* Lookup table for all possible MC control instances */
 struct amd64_pvt;
 static struct mem_ctl_info *mci_lookup[EDAC_MAX_NUMNODES];
@@ -154,7 +156,7 @@
 
 	default:
 		amd64_printk(KERN_ERR, "Unsupported family!\n");
-		break;
+		return -EINVAL;
 	}
 	return amd64_search_set_scrub_rate(pvt->misc_f3_ctl, *bandwidth,
 			min_scrubrate);
@@ -1489,7 +1491,7 @@
 	u64 chan_off;
 
 	if (hi_range_sel) {
-		if (!(dct_sel_base_addr & 0xFFFFF800) &&
+		if (!(dct_sel_base_addr & 0xFFFF0000) &&
 		   hole_valid && (sys_addr >= 0x100000000ULL))
 			chan_off = hole_off << 16;
 		else
@@ -1626,7 +1628,7 @@
 	debugf1("   HoleOffset=0x%x  HoleValid=0x%x IntlvSel=0x%x\n",
 			hole_off, hole_valid, intlv_sel);
 
-	if (intlv_en ||
+	if (intlv_en &&
 	    (intlv_sel != ((sys_addr >> 12) & intlv_en)))
 		return -EINVAL;
 
@@ -2618,6 +2620,90 @@
 	return empty;
 }
 
+/* get all cores on this DCT */
+static void get_cpus_on_this_dct_cpumask(struct cpumask *mask, int nid)
+{
+	int cpu;
+
+	for_each_online_cpu(cpu)
+		if (amd_get_nb_id(cpu) == nid)
+			cpumask_set_cpu(cpu, mask);
+}
+
+/* check MCG_CTL on all the cpus on this node */
+static bool amd64_nb_mce_bank_enabled_on_node(int nid)
+{
+	cpumask_var_t mask;
+	int cpu, nbe;
+	bool ret = false;
+
+	if (!zalloc_cpumask_var(&mask, GFP_KERNEL)) {
+		amd64_printk(KERN_WARNING, "%s: error allocating mask\n",
+			     __func__);
+		return false;
+	}
+
+	get_cpus_on_this_dct_cpumask(mask, nid);
+
+	rdmsr_on_cpus(mask, MSR_IA32_MCG_CTL, msrs);
+
+	for_each_cpu(cpu, mask) {
+		struct msr *reg = per_cpu_ptr(msrs, cpu);
+		nbe = reg->l & K8_MSR_MCGCTL_NBE;
+
+		debugf0("core: %u, MCG_CTL: 0x%llx, NB MSR is %s\n",
+			cpu, reg->q,
+			(nbe ? "enabled" : "disabled"));
+
+		if (!nbe)
+			goto out;
+	}
+	ret = true;
+
+out:
+	free_cpumask_var(mask);
+	return ret;
+}
+
+static int amd64_toggle_ecc_err_reporting(struct amd64_pvt *pvt, bool on)
+{
+	cpumask_var_t cmask;
+	int cpu;
+
+	if (!zalloc_cpumask_var(&cmask, GFP_KERNEL)) {
+		amd64_printk(KERN_WARNING, "%s: error allocating mask\n",
+			     __func__);
+		return false;
+	}
+
+	get_cpus_on_this_dct_cpumask(cmask, pvt->mc_node_id);
+
+	rdmsr_on_cpus(cmask, MSR_IA32_MCG_CTL, msrs);
+
+	for_each_cpu(cpu, cmask) {
+
+		struct msr *reg = per_cpu_ptr(msrs, cpu);
+
+		if (on) {
+			if (reg->l & K8_MSR_MCGCTL_NBE)
+				pvt->flags.ecc_report = 1;
+
+			reg->l |= K8_MSR_MCGCTL_NBE;
+		} else {
+			/*
+			 * Turn off ECC reporting only when it was off before
+			 */
+			if (!pvt->flags.ecc_report)
+				reg->l &= ~K8_MSR_MCGCTL_NBE;
+		}
+	}
+	wrmsr_on_cpus(cmask, MSR_IA32_MCG_CTL, msrs);
+
+	free_cpumask_var(cmask);
+
+	return 0;
+}
+
 /*
  * Only if 'ecc_enable_override' is set AND BIOS had ECC disabled, do "we"
  * enable it.
@@ -2625,17 +2711,12 @@
 static void amd64_enable_ecc_error_reporting(struct mem_ctl_info *mci)
 {
 	struct amd64_pvt *pvt = mci->pvt_info;
-	const cpumask_t *cpumask = cpumask_of_node(pvt->mc_node_id);
-	int cpu, idx = 0, err = 0;
-	struct msr msrs[cpumask_weight(cpumask)];
-	u32 value;
-	u32 mask = K8_NBCTL_CECCEn | K8_NBCTL_UECCEn;
+	int err = 0;
+	u32 value, mask = K8_NBCTL_CECCEn | K8_NBCTL_UECCEn;
 
 	if (!ecc_enable_override)
 		return;
 
-	memset(msrs, 0, sizeof(msrs));
-
 	amd64_printk(KERN_WARNING,
 		"'ecc_enable_override' parameter is active, "
 		"Enabling AMD ECC hardware now: CAUTION\n");
@@ -2651,16 +2732,9 @@
 	value |= mask;
 	pci_write_config_dword(pvt->misc_f3_ctl, K8_NBCTL, value);
 
-	rdmsr_on_cpus(cpumask, K8_MSR_MCGCTL, msrs);
-
-	for_each_cpu(cpu, cpumask) {
-		if (msrs[idx].l & K8_MSR_MCGCTL_NBE)
-			set_bit(idx, &pvt->old_mcgctl);
-
-		msrs[idx].l |= K8_MSR_MCGCTL_NBE;
-		idx++;
-	}
-	wrmsr_on_cpus(cpumask, K8_MSR_MCGCTL, msrs);
+	if (amd64_toggle_ecc_err_reporting(pvt, ON))
+		amd64_printk(KERN_WARNING, "Error enabling ECC reporting over "
+					   "MCGCTL!\n");
 
 	err = pci_read_config_dword(pvt->misc_f3_ctl, K8_NBCFG, &value);
 	if (err)
@@ -2701,17 +2775,12 @@
 
 static void amd64_restore_ecc_error_reporting(struct amd64_pvt *pvt)
 {
-	const cpumask_t *cpumask = cpumask_of_node(pvt->mc_node_id);
-	int cpu, idx = 0, err = 0;
-	struct msr msrs[cpumask_weight(cpumask)];
-	u32 value;
-	u32 mask = K8_NBCTL_CECCEn | K8_NBCTL_UECCEn;
+	int err = 0;
+	u32 value, mask = K8_NBCTL_CECCEn | K8_NBCTL_UECCEn;
 
 	if (!pvt->nbctl_mcgctl_saved)
 		return;
 
-	memset(msrs, 0, sizeof(msrs));
-
 	err = pci_read_config_dword(pvt->misc_f3_ctl, K8_NBCTL, &value);
 	if (err)
 		debugf0("Reading K8_NBCTL failed\n");
@@ -2721,66 +2790,9 @@
 	/* restore the NB Enable MCGCTL bit */
 	pci_write_config_dword(pvt->misc_f3_ctl, K8_NBCTL, value);
 
-	rdmsr_on_cpus(cpumask, K8_MSR_MCGCTL, msrs);
-
-	for_each_cpu(cpu, cpumask) {
-		msrs[idx].l &= ~K8_MSR_MCGCTL_NBE;
-		msrs[idx].l |=
-			test_bit(idx, &pvt->old_mcgctl) << K8_MSR_MCGCTL_NBE;
-		idx++;
-	}
-
-	wrmsr_on_cpus(cpumask, K8_MSR_MCGCTL, msrs);
-}
-
-/* get all cores on this DCT */
-static void get_cpus_on_this_dct_cpumask(cpumask_t *mask, int nid)
-{
-	int cpu;
-
-	for_each_online_cpu(cpu)
-		if (amd_get_nb_id(cpu) == nid)
-			cpumask_set_cpu(cpu, mask);
-}
-
-/* check MCG_CTL on all the cpus on this node */
-static bool amd64_nb_mce_bank_enabled_on_node(int nid)
-{
-	cpumask_t mask;
-	struct msr *msrs;
-	int cpu, nbe, idx = 0;
-	bool ret = false;
-
-	cpumask_clear(&mask);
-
-	get_cpus_on_this_dct_cpumask(&mask, nid);
-
-	msrs = kzalloc(sizeof(struct msr) * cpumask_weight(&mask), GFP_KERNEL);
-	if (!msrs) {
-		amd64_printk(KERN_WARNING, "%s: error allocating msrs\n",
-			      __func__);
-		 return false;
-	}
-
-	rdmsr_on_cpus(&mask, MSR_IA32_MCG_CTL, msrs);
-
-	for_each_cpu(cpu, &mask) {
-		nbe = msrs[idx].l & K8_MSR_MCGCTL_NBE;
-
-		debugf0("core: %u, MCG_CTL: 0x%llx, NB MSR is %s\n",
-			cpu, msrs[idx].q,
-			(nbe ? "enabled" : "disabled"));
-
-		if (!nbe)
-			goto out;
-
-		idx++;
-	}
-	ret = true;
-
-out:
-	kfree(msrs);
-	return ret;
+	if (amd64_toggle_ecc_err_reporting(pvt, OFF))
+		amd64_printk(KERN_WARNING, "Error restoring ECC reporting over "
+					   "MCGCTL!\n");
 }
 
 /*
@@ -2789,10 +2801,11 @@
  * the memory system completely. A command line option allows to force-enable
  * hardware ECC later in amd64_enable_ecc_error_reporting().
  */
-static const char *ecc_warning =
-	"WARNING: ECC is disabled by BIOS. Module will NOT be loaded.\n"
-	" Either Enable ECC in the BIOS, or set 'ecc_enable_override'.\n"
-	" Also, use of the override can cause unknown side effects.\n";
+static const char *ecc_msg =
+	"ECC disabled in the BIOS or no ECC capability, module will not load.\n"
+	" Either enable ECC checking or force module loading by setting "
+	"'ecc_enable_override'.\n"
+	" (Note that use of the override may cause unknown side effects.)\n";
 
 static int amd64_check_ecc_enabled(struct amd64_pvt *pvt)
 {
@@ -2807,7 +2820,7 @@
 
 	ecc_enabled = !!(value & K8_NBCFG_ECC_ENABLE);
 	if (!ecc_enabled)
-		amd64_printk(KERN_WARNING, "This node reports that Memory ECC "
+		amd64_printk(KERN_NOTICE, "This node reports that Memory ECC "
 			     "is currently disabled, set F3x%x[22] (%s).\n",
 			     K8_NBCFG, pci_name(pvt->misc_f3_ctl));
 	else
@@ -2815,18 +2828,17 @@
 
 	nb_mce_en = amd64_nb_mce_bank_enabled_on_node(pvt->mc_node_id);
 	if (!nb_mce_en)
-		amd64_printk(KERN_WARNING, "NB MCE bank disabled, set MSR "
+		amd64_printk(KERN_NOTICE, "NB MCE bank disabled, set MSR "
 			     "0x%08x[4] on node %d to enable.\n",
 			     MSR_IA32_MCG_CTL, pvt->mc_node_id);
 
 	if (!ecc_enabled || !nb_mce_en) {
 		if (!ecc_enable_override) {
-			amd64_printk(KERN_WARNING, "%s", ecc_warning);
+			amd64_printk(KERN_NOTICE, "%s", ecc_msg);
 			return -ENODEV;
 		}
-	} else
-		/* CLEAR the override, since BIOS controlled it */
 		ecc_enable_override = 0;
+	}
 
 	return 0;
 }
@@ -2909,7 +2921,6 @@
 	pvt->ext_model		= boot_cpu_data.x86_model >> 4;
 	pvt->mc_type_index	= mc_type_index;
 	pvt->ops		= family_ops(mc_type_index);
-	pvt->old_mcgctl		= 0;
 
 	/*
 	 * We have the dram_f2_ctl device as an argument, now go reserve its
@@ -3071,16 +3082,15 @@
 
 	amd64_free_mc_sibling_devices(pvt);
 
-	kfree(pvt);
-	mci->pvt_info = NULL;
-
-	mci_lookup[pvt->mc_node_id] = NULL;
-
 	/* unregister from EDAC MCE */
 	amd_report_gart_errors(false);
 	amd_unregister_ecc_decoder(amd64_decode_bus_error);
 
 	/* Free the EDAC CORE resources */
+	mci->pvt_info = NULL;
+	mci_lookup[pvt->mc_node_id] = NULL;
+
+	kfree(pvt);
 	edac_mc_free(mci);
 }
 
@@ -3157,23 +3167,29 @@
 static int __init amd64_edac_init(void)
 {
 	int nb, err = -ENODEV;
+	bool load_ok = false;
 
 	edac_printk(KERN_INFO, EDAC_MOD_STR, EDAC_AMD64_VERSION "\n");
 
 	opstate_init();
 
 	if (cache_k8_northbridges() < 0)
-		return err;
+		goto err_ret;
+
+	msrs = msrs_alloc();
+	if (!msrs)
+		goto err_ret;
 
 	err = pci_register_driver(&amd64_pci_driver);
 	if (err)
-		return err;
+		goto err_pci;
 
 	/*
 	 * At this point, the array 'pvt_lookup[]' contains pointers to alloc'd
 	 * amd64_pvt structs. These will be used in the 2nd stage init function
 	 * to finish initialization of the MC instances.
 	 */
+	err = -ENODEV;
 	for (nb = 0; nb < num_k8_northbridges; nb++) {
 		if (!pvt_lookup[nb])
 			continue;
@@ -3181,16 +3197,21 @@
 		err = amd64_init_2nd_stage(pvt_lookup[nb]);
 		if (err)
 			goto err_2nd_stage;
-	}
 
-	amd64_setup_pci_device();
+		load_ok = true;
+	}
 
-	return 0;
+	if (load_ok) {
+		amd64_setup_pci_device();
+		return 0;
+	}
 
 err_2nd_stage:
-	debugf0("2nd stage failed\n");
 	pci_unregister_driver(&amd64_pci_driver);
-
+err_pci:
+	msrs_free(msrs);
+	msrs = NULL;
+err_ret:
 	return err;
 }
 
@@ -3200,6 +3221,9 @@
 		edac_pci_release_generic_ctl(amd64_ctl_pci);
 
 	pci_unregister_driver(&amd64_pci_driver);
+
+	msrs_free(msrs);
+	msrs = NULL;
 }
 
 module_init(amd64_edac_init);
--- linux-mvl-dove-2.6.32.orig/drivers/edac/i5000_edac.c
+++ linux-mvl-dove-2.6.32/drivers/edac/i5000_edac.c
@@ -577,7 +577,13 @@
 		debugf0("\tUncorrected bits= 0x%x\n", ue_errors);
 
 		branch = EXTRACT_FBDCHAN_INDX(info->ferr_nf_fbd);
-		channel = branch;
+
+		/*
+		 * According with i5000 datasheet, bit 28 has no significance
+		 * for errors M4Err-M12Err and M17Err-M21Err, on FERR_NF_FBD
+		 */
+		channel = branch & 2;
+
 		bank = NREC_BANK(info->nrecmema);
 		rank = NREC_RANK(info->nrecmema);
 		rdwr = NREC_RDWR(info->nrecmema);
--- linux-mvl-dove-2.6.32.orig/drivers/edac/amd64_edac.h
+++ linux-mvl-dove-2.6.32/drivers/edac/amd64_edac.h
@@ -147,6 +147,8 @@
 #define MAX_CS_COUNT			8
 #define DRAM_REG_COUNT			8
 
+#define ON true
+#define OFF false
 
 /*
  * PCI-defined configuration space registers
@@ -386,10 +388,7 @@
 #define K8_NBCAP_DUAL_NODE		BIT(1)
 #define K8_NBCAP_DCT_DUAL		BIT(0)
 
-/*
- * MSR Regs
- */
-#define K8_MSR_MCGCTL			0x017b
+/* MSRs */
 #define K8_MSR_MCGCTL_NBE		BIT(4)
 
 #define K8_MSR_MC4CTL			0x0410
@@ -487,7 +486,6 @@
 	/* Save old hw registers' values before we modified them */
 	u32 nbctl_mcgctl_saved;		/* When true, following 2 are valid */
 	u32 old_nbctl;
-	unsigned long old_mcgctl;	/* per core on this node */
 
 	/* MC Type Index value: socket F vs Family 10h */
 	u32 mc_type_index;
@@ -495,6 +493,7 @@
 	/* misc settings */
 	struct flags {
 		unsigned long cf8_extcfg:1;
+		unsigned long ecc_report:1;
 	} flags;
 };
 
--- linux-mvl-dove-2.6.32.orig/drivers/edac/edac_mce_amd.c
+++ linux-mvl-dove-2.6.32/drivers/edac/edac_mce_amd.c
@@ -295,7 +295,6 @@
 void amd_decode_nb_mce(int node_id, struct err_regs *regs, int handle_errors)
 {
 	u32 ec  = ERROR_CODE(regs->nbsl);
-	u32 xec = EXT_ERROR_CODE(regs->nbsl);
 
 	if (!handle_errors)
 		return;
@@ -311,11 +310,15 @@
 		if (regs->nbsh & K8_NBSH_ERR_CPU_VAL)
 			pr_cont(", core: %u\n", (u8)(regs->nbsh & 0xf));
 	} else {
-		pr_cont(", core: %d\n", ilog2((regs->nbsh & 0xf)));
-	}
+		u8 assoc_cpus = regs->nbsh & 0xf;
+
+		if (assoc_cpus > 0)
+			pr_cont(", core: %d", fls(assoc_cpus) - 1);
 
+		pr_cont("\n");
+	}
 
-	pr_emerg("%s.\n", EXT_ERR_MSG(xec));
+	pr_emerg("%s.\n", EXT_ERR_MSG(regs->nbsl));
 
 	if (BUS_ERROR(ec) && nb_bus_decoder)
 		nb_bus_decoder(node_id, regs);
@@ -378,7 +381,7 @@
 		 ((m->status & MCI_STATUS_PCC) ? "yes" : "no"));
 
 	/* do the two bits[14:13] together */
-	ecc = m->status & (3ULL << 45);
+	ecc = (m->status >> 45) & 0x3;
 	if (ecc)
 		pr_cont(", %sECC Error", ((ecc == 2) ? "C" : "U"));
 
--- linux-mvl-dove-2.6.32.orig/drivers/memstick/core/mspro_block.c
+++ linux-mvl-dove-2.6.32/drivers/memstick/core/mspro_block.c
@@ -1330,13 +1330,14 @@
 	struct mspro_block_data *msb = memstick_get_drvdata(card);
 	unsigned long flags;
 
-	del_gendisk(msb->disk);
-	dev_dbg(&card->dev, "mspro block remove\n");
 	spin_lock_irqsave(&msb->q_lock, flags);
 	msb->eject = 1;
 	blk_start_queue(msb->queue);
 	spin_unlock_irqrestore(&msb->q_lock, flags);
 
+	del_gendisk(msb->disk);
+	dev_dbg(&card->dev, "mspro block remove\n");
+
 	blk_cleanup_queue(msb->queue);
 	msb->queue = NULL;
 
--- linux-mvl-dove-2.6.32.orig/drivers/leds/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/leds/Kconfig
@@ -236,6 +236,13 @@
 	  This option enables support for BD2802GU RGB LED driver chips
 	  accessed via the I2C bus.
 
+config LEDS_DELL_NETBOOKS
+	tristate "External LED on Dell Business Netbooks"
+	depends on LEDS_CLASS && X86 && ACPI_WMI
+	help
+	  This adds support for the Latitude 2100 and similar
+	  notebooks that have an external LED.
+
 comment "LED Triggers"
 
 config LEDS_TRIGGERS
--- linux-mvl-dove-2.6.32.orig/drivers/leds/Makefile
+++ linux-mvl-dove-2.6.32/drivers/leds/Makefile
@@ -29,6 +29,7 @@
 obj-$(CONFIG_LEDS_WM831X_STATUS)	+= leds-wm831x-status.o
 obj-$(CONFIG_LEDS_WM8350)		+= leds-wm8350.o
 obj-$(CONFIG_LEDS_PWM)			+= leds-pwm.o
+obj-$(CONFIG_LEDS_DELL_NETBOOKS)	+= dell-led.o
 
 # LED SPI Drivers
 obj-$(CONFIG_LEDS_DAC124S085)		+= leds-dac124s085.o
--- linux-mvl-dove-2.6.32.orig/drivers/leds/dell-led.c
+++ linux-mvl-dove-2.6.32/drivers/leds/dell-led.c
@@ -0,0 +1,200 @@
+/*
+ * dell_led.c - Dell LED Driver
+ *
+ * Copyright (C) 2010 Dell Inc.
+ * Louis Davis <louis_davis@dell.com>
+ * Jim Dailey <jim_dailey@dell.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/acpi.h>
+#include <linux/leds.h>
+
+MODULE_AUTHOR("Louis Davis/Jim Dailey");
+MODULE_DESCRIPTION("Dell LED Control Driver");
+MODULE_LICENSE("GPL");
+
+#define DELL_LED_BIOS_GUID "F6E4FE6E-909D-47cb-8BAB-C9F6F2F8D396"
+MODULE_ALIAS("wmi:" DELL_LED_BIOS_GUID);
+
+/* Error Result Codes: */
+#define INVALID_DEVICE_ID	250
+#define INVALID_PARAMETER	251
+#define INVALID_BUFFER		252
+#define INTERFACE_ERROR		253
+#define UNSUPPORTED_COMMAND	254
+#define UNSPECIFIED_ERROR	255
+
+/* Device ID */
+#define DEVICE_ID_PANEL_BACK	1
+
+/* LED Commands */
+#define CMD_LED_ON	16
+#define CMD_LED_OFF	17
+#define CMD_LED_BLINK	18
+
+struct bios_args {
+	unsigned char length;
+	unsigned char result_code;
+	unsigned char device_id;
+	unsigned char command;
+	unsigned char on_time;
+	unsigned char off_time;
+};
+
+static int dell_led_perform_fn(u8 length,
+		u8 result_code,
+		u8 device_id,
+		u8 command,
+		u8 on_time,
+		u8 off_time)
+{
+	struct bios_args *bios_return;
+	u8 return_code;
+	union acpi_object *obj;
+	struct acpi_buffer output = { ACPI_ALLOCATE_BUFFER, NULL };
+	struct acpi_buffer input;
+	acpi_status status;
+
+	struct bios_args args;
+	args.length = length;
+	args.result_code = result_code;
+	args.device_id = device_id;
+	args.command = command;
+	args.on_time = on_time;
+	args.off_time = off_time;
+
+	input.length = sizeof(struct bios_args);
+	input.pointer = &args;
+
+	status = wmi_evaluate_method(DELL_LED_BIOS_GUID,
+		1,
+		1,
+		&input,
+		&output);
+
+	if (ACPI_FAILURE(status))
+		return status;
+
+	obj = output.pointer;
+
+	if (!obj)
+		return -EINVAL;
+	else if (obj->type != ACPI_TYPE_BUFFER) {
+		kfree(obj);
+		return -EINVAL;
+	}
+
+	bios_return = ((struct bios_args *)obj->buffer.pointer);
+	return_code = bios_return->result_code;
+
+	kfree(obj);
+
+	return return_code;
+}
+
+static int led_on(void)
+{
+	return dell_led_perform_fn(3,	/* Length of command */
+		INTERFACE_ERROR,	/* Init to  INTERFACE_ERROR */
+		DEVICE_ID_PANEL_BACK,	/* Device ID */
+		CMD_LED_ON,		/* Command */
+		0,			/* not used */
+		0);			/* not used */
+}
+
+static int led_off(void)
+{
+	return dell_led_perform_fn(3,	/* Length of command */
+		INTERFACE_ERROR,	/* Init to  INTERFACE_ERROR */
+		DEVICE_ID_PANEL_BACK,	/* Device ID */
+		CMD_LED_OFF,		/* Command */
+		0,			/* not used */
+		0);			/* not used */
+}
+
+static int led_blink(unsigned char on_eighths,
+		unsigned char off_eighths)
+{
+	return dell_led_perform_fn(5,	/* Length of command */
+		INTERFACE_ERROR,	/* Init to  INTERFACE_ERROR */
+		DEVICE_ID_PANEL_BACK,	/* Device ID */
+		CMD_LED_BLINK,		/* Command */
+		on_eighths,		/* blink on in eigths of a second */
+		off_eighths);		/* blink off in eights of a second */
+}
+
+static void dell_led_set(struct led_classdev *led_cdev,
+		enum led_brightness value)
+{
+	if (value == LED_OFF)
+		led_off();
+	else
+		led_on();
+}
+
+static int dell_led_blink(struct led_classdev *led_cdev,
+		unsigned long *delay_on,
+		unsigned long *delay_off)
+{
+	unsigned long on_eighths;
+	unsigned long off_eighths;
+
+	/* The Dell LED delay is based on 125ms intervals.
+	   Need to round up to next interval. */
+
+	on_eighths = (*delay_on + 124) / 125;
+	if (0 == on_eighths)
+		on_eighths = 1;
+	if (on_eighths > 255)
+		on_eighths = 255;
+	*delay_on = on_eighths * 125;
+
+	off_eighths = (*delay_off + 124) / 125;
+	if (0 == off_eighths)
+		off_eighths = 1;
+	if (off_eighths > 255)
+		off_eighths = 255;
+	*delay_off = off_eighths * 125;
+
+	led_blink(on_eighths, off_eighths);
+
+	return 0;
+}
+
+static struct led_classdev dell_led = {
+	.name		= "dell::lid",
+	.brightness	= LED_OFF,
+	.max_brightness = 1,
+	.brightness_set = dell_led_set,
+	.blink_set	= dell_led_blink,
+	.flags		= LED_CORE_SUSPENDRESUME,
+};
+
+static int __init dell_led_init(void)
+{
+	int error = 0;
+
+	if (!wmi_has_guid(DELL_LED_BIOS_GUID))
+		return -ENODEV;
+
+	error = led_off();
+	if (error != 0)
+		return -ENODEV;
+
+	return led_classdev_register(NULL, &dell_led);
+}
+
+static void __exit dell_led_exit(void)
+{
+	led_classdev_unregister(&dell_led);
+
+	led_off();
+}
+
+module_init(dell_led_init);
+module_exit(dell_led_exit);
--- linux-mvl-dove-2.6.32.orig/drivers/leds/leds-gpio.c
+++ linux-mvl-dove-2.6.32/drivers/leds/leds-gpio.c
@@ -211,7 +211,6 @@
 					const struct of_device_id *match)
 {
 	struct device_node *np = ofdev->node, *child;
-	struct gpio_led led;
 	struct gpio_led_of_platform_data *pdata;
 	int count = 0, ret;
 
@@ -226,8 +225,8 @@
 	if (!pdata)
 		return -ENOMEM;
 
-	memset(&led, 0, sizeof(led));
 	for_each_child_of_node(np, child) {
+		struct gpio_led led = {};
 		enum of_gpio_flags flags;
 		const char *state;
 
--- linux-mvl-dove-2.6.32.orig/drivers/video/bfin-t350mcqb-fb.c
+++ linux-mvl-dove-2.6.32/drivers/video/bfin-t350mcqb-fb.c
@@ -515,9 +515,9 @@
 	fbinfo->fbops = &bfin_t350mcqb_fb_ops;
 	fbinfo->flags = FBINFO_FLAG_DEFAULT;
 
-	info->fb_buffer =
-	    dma_alloc_coherent(NULL, fbinfo->fix.smem_len, &info->dma_handle,
-			       GFP_KERNEL);
+	info->fb_buffer = dma_alloc_coherent(NULL, fbinfo->fix.smem_len +
+				ACTIVE_VIDEO_MEM_OFFSET,
+				&info->dma_handle, GFP_KERNEL);
 
 	if (NULL == info->fb_buffer) {
 		printk(KERN_ERR DRIVER_NAME
@@ -587,8 +587,8 @@
 out6:
 	fb_dealloc_cmap(&fbinfo->cmap);
 out4:
-	dma_free_coherent(NULL, fbinfo->fix.smem_len, info->fb_buffer,
-			  info->dma_handle);
+	dma_free_coherent(NULL, fbinfo->fix.smem_len + ACTIVE_VIDEO_MEM_OFFSET,
+			 info->fb_buffer, info->dma_handle);
 out3:
 	framebuffer_release(fbinfo);
 out2:
@@ -611,8 +611,9 @@
 	free_irq(info->irq, info);
 
 	if (info->fb_buffer != NULL)
-		dma_free_coherent(NULL, fbinfo->fix.smem_len, info->fb_buffer,
-				  info->dma_handle);
+		dma_free_coherent(NULL, fbinfo->fix.smem_len +
+			ACTIVE_VIDEO_MEM_OFFSET, info->fb_buffer,
+			info->dma_handle);
 
 	fb_dealloc_cmap(&fbinfo->cmap);
 
--- linux-mvl-dove-2.6.32.orig/drivers/video/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/video/Kconfig
@@ -21,6 +21,23 @@
 	  This framework adds support for low-level control of the video 
 	  output switch.
 
+
+config DOVE_GPU
+       bool "Enable DOVE GPU support"
+       depends on ARCH_DOVE
+       default y
+       help
+         This framework adds support for dove gpu.
+
+config DOVE_GPU_MEM_SIZE
+       int "DOVE GPU memory size (MB)"
+       depends on DOVE_GPU
+       default 128
+       help
+         Set the memory size to be reserved for GPU usage. The value should be
+	 between 64 and 128.
+
+
 menuconfig FB
 	tristate "Support for frame buffer devices"
 	---help---
@@ -688,8 +705,8 @@
 	  If unsure, say N.
 
 config FB_VESA
-	bool "VESA VGA graphics support"
-	depends on (FB = y) && X86
+	tristate "VESA VGA graphics support"
+	depends on FB && X86
 	select FB_CFB_FILLRECT
 	select FB_CFB_COPYAREA
 	select FB_CFB_IMAGEBLIT
@@ -2160,6 +2177,7 @@
 	  and could also have been called by other names when coupled with
 	  a bridge adapter.
 
+source "drivers/video/marvell/Kconfig"
 source "drivers/video/omap/Kconfig"
 
 source "drivers/video/backlight/Kconfig"
--- linux-mvl-dove-2.6.32.orig/drivers/video/sunxvr500.c
+++ linux-mvl-dove-2.6.32/drivers/video/sunxvr500.c
@@ -242,11 +242,27 @@
 static int __devinit e3d_pci_register(struct pci_dev *pdev,
 				      const struct pci_device_id *ent)
 {
+	struct device_node *of_node;
+	const char *device_type;
 	struct fb_info *info;
 	struct e3d_info *ep;
 	unsigned int line_length;
 	int err;
 
+	of_node = pci_device_to_OF_node(pdev);
+	if (!of_node) {
+		printk(KERN_ERR "e3d: Cannot find OF node of %s\n",
+		       pci_name(pdev));
+		return -ENODEV;
+	}
+
+	device_type = of_get_property(of_node, "device_type", NULL);
+	if (!device_type) {
+		printk(KERN_INFO "e3d: Ignoring secondary output device "
+		       "at %s\n", pci_name(pdev));
+		return -ENODEV;
+	}
+
 	err = pci_enable_device(pdev);
 	if (err < 0) {
 		printk(KERN_ERR "e3d: Cannot enable PCI device %s\n",
@@ -265,13 +281,7 @@
 	ep->info = info;
 	ep->pdev = pdev;
 	spin_lock_init(&ep->lock);
-	ep->of_node = pci_device_to_OF_node(pdev);
-	if (!ep->of_node) {
-		printk(KERN_ERR "e3d: Cannot find OF node of %s\n",
-		       pci_name(pdev));
-		err = -ENODEV;
-		goto err_release_fb;
-	}
+	ep->of_node = of_node;
 
 	/* Read the PCI base register of the frame buffer, which we
 	 * need in order to interpret the RAMDAC_VID_*FB* values in
@@ -400,6 +410,7 @@
 
 static struct pci_device_id e3d_pci_table[] = {
 	{	PCI_DEVICE(PCI_VENDOR_ID_3DLABS, 0x7a0),	},
+	{	PCI_DEVICE(0x1091, 0x7a0),			},
 	{	PCI_DEVICE(PCI_VENDOR_ID_3DLABS, 0x7a2),	},
 	{	.vendor = PCI_VENDOR_ID_3DLABS,
 		.device = PCI_ANY_ID,
--- linux-mvl-dove-2.6.32.orig/drivers/video/fbmon.c
+++ linux-mvl-dove-2.6.32/drivers/video/fbmon.c
@@ -40,8 +40,8 @@
  * EDID parser
  */
 
-#undef DEBUG  /* define this for verbose EDID parsing output */
-
+//#undef DEBUG  /* define this for verbose EDID parsing output */
+#define DEBUG
 #ifdef DEBUG
 #define DPRINTK(fmt, args...) printk(fmt,## args)
 #else
--- linux-mvl-dove-2.6.32.orig/drivers/video/Makefile
+++ linux-mvl-dove-2.6.32/drivers/video/Makefile
@@ -28,6 +28,8 @@
 obj-$(CONFIG_FB_DEFERRED_IO)   += fb_defio.o
 
 # Hardware specific drivers go first
+obj-$(CONFIG_FB_DOVE)          += marvell/
+
 obj-$(CONFIG_FB_AMIGA)            += amifb.o c2p_planar.o
 obj-$(CONFIG_FB_ARC)              += arcfb.o
 obj-$(CONFIG_FB_CLPS711X)         += clps711xfb.o
--- linux-mvl-dove-2.6.32.orig/drivers/video/mx3fb.c
+++ linux-mvl-dove-2.6.32/drivers/video/mx3fb.c
@@ -324,8 +324,11 @@
 	unsigned long flags;
 	dma_cookie_t cookie;
 
-	dev_dbg(mx3fb->dev, "mx3fbi %p, desc %p, sg %p\n", mx3_fbi,
-		to_tx_desc(mx3_fbi->txd), to_tx_desc(mx3_fbi->txd)->sg);
+	if (mx3_fbi->txd)
+		dev_dbg(mx3fb->dev, "mx3fbi %p, desc %p, sg %p\n", mx3_fbi,
+			to_tx_desc(mx3_fbi->txd), to_tx_desc(mx3_fbi->txd)->sg);
+	else
+		dev_dbg(mx3fb->dev, "mx3fbi %p, txd = NULL\n", mx3_fbi);
 
 	/* This enables the channel */
 	if (mx3_fbi->cookie < 0) {
@@ -646,6 +649,7 @@
 
 static void sdc_set_brightness(struct mx3fb_data *mx3fb, uint8_t value)
 {
+	dev_dbg(mx3fb->dev, "%s: value = %d\n", __func__, value);
 	/* This might be board-specific */
 	mx3fb_write_reg(mx3fb, 0x03000000UL | value << 16, SDC_PWM_CTRL);
 	return;
@@ -1486,12 +1490,12 @@
 		goto ersdc0;
 	}
 
+	mx3fb->backlight_level = 255;
+
 	ret = init_fb_chan(mx3fb, to_idmac_chan(chan));
 	if (ret < 0)
 		goto eisdc0;
 
-	mx3fb->backlight_level = 255;
-
 	return 0;
 
 eisdc0:
--- linux-mvl-dove-2.6.32.orig/drivers/video/efifb.c
+++ linux-mvl-dove-2.6.32/drivers/video/efifb.c
@@ -13,7 +13,7 @@
 #include <linux/platform_device.h>
 #include <linux/screen_info.h>
 #include <linux/dmi.h>
-
+#include <linux/pci.h>
 #include <video/vga.h>
 
 static struct fb_var_screeninfo efifb_defined __initdata = {
@@ -39,16 +39,31 @@
 	M_I20,		/* 20-Inch iMac */
 	M_I20_SR,	/* 20-Inch iMac (Santa Rosa) */
 	M_I24,		/* 24-Inch iMac */
+	M_I24_8_1,	/* 24-Inch iMac, 8,1th gen */
+	M_I24_10_1,	/* 24-Inch iMac, 10,1th gen */
+	M_I27_11_1,	/* 27-Inch iMac, 11,1th gen */
 	M_MINI,		/* Mac Mini */
+	M_MINI_3_1,	/* Mac Mini, 3,1th gen */
+	M_MINI_4_1,	/* Mac Mini, 4,1th gen */
 	M_MB,		/* MacBook */
 	M_MB_2,		/* MacBook, 2nd rev. */
 	M_MB_3,		/* MacBook, 3rd rev. */
+	M_MB_5_1,	/* MacBook, 5th rev. */
+	M_MB_6_1,	/* MacBook, 6th rev. */
+	M_MB_7_1,	/* MacBook, 7th rev. */
 	M_MB_SR,	/* MacBook, 2nd gen, (Santa Rosa) */
 	M_MBA,		/* MacBook Air */
 	M_MBP,		/* MacBook Pro */
 	M_MBP_2,	/* MacBook Pro 2nd gen */
+	M_MBP_2_2,	/* MacBook Pro 2,2nd gen */
 	M_MBP_SR,	/* MacBook Pro (Santa Rosa) */
 	M_MBP_4,	/* MacBook Pro, 4th gen */
+	M_MBP_5_1,    /* MacBook Pro, 5,1th gen */
+	M_MBP_5_2,	/* MacBook Pro, 5,2th gen */
+	M_MBP_5_3,	/* MacBook Pro, 5,3rd gen */
+	M_MBP_6_1,	/* MacBook Pro, 6,1th gen */
+	M_MBP_6_2,	/* MacBook Pro, 6,2th gen */
+	M_MBP_7_1,	/* MacBook Pro, 7,1th gen */
 	M_UNKNOWN	/* placeholder */
 };
 
@@ -63,13 +78,28 @@
 	[M_I20] = { "i20", 0x80010000, 1728 * 4, 1680, 1050 }, /* guess */
 	[M_I20_SR] = { "imac7", 0x40010000, 1728 * 4, 1680, 1050 },
 	[M_I24] = { "i24", 0x80010000, 2048 * 4, 1920, 1200 }, /* guess */
+	[M_I24_8_1] = { "imac8", 0xc0060000, 2048 * 4, 1920, 1200 },
+	[M_I24_10_1] = { "imac10", 0xc0010000, 2048 * 4, 1920, 1080 },
+	[M_I27_11_1] = { "imac11", 0xc0010000, 2560 * 4, 2560, 1440 },
 	[M_MINI]= { "mini", 0x80000000, 2048 * 4, 1024, 768 },
+	[M_MINI_3_1] = { "mini31", 0x40010000, 1024 * 4, 1024, 768 },
+	[M_MINI_4_1] = { "mini41", 0xc0010000, 2048 * 4, 1920, 1200 },
 	[M_MB] = { "macbook", 0x80000000, 2048 * 4, 1280, 800 },
+	[M_MB_5_1] = { "macbook51", 0x80010000, 2048 * 4, 1280, 800 },
+	[M_MB_6_1] = { "macbook61", 0x80010000, 2048 * 4, 1280, 800 },
+	[M_MB_7_1] = { "macbook71", 0x80010000, 2048 * 4, 1280, 800 },
 	[M_MBA] = { "mba", 0x80000000, 2048 * 4, 1280, 800 },
 	[M_MBP] = { "mbp", 0x80010000, 1472 * 4, 1440, 900 },
 	[M_MBP_2] = { "mbp2", 0, 0, 0, 0 }, /* placeholder */
+	[M_MBP_2_2] = { "mbp22", 0x80010000, 1472 * 4, 1440, 900 },
 	[M_MBP_SR] = { "mbp3", 0x80030000, 2048 * 4, 1440, 900 },
 	[M_MBP_4] = { "mbp4", 0xc0060000, 2048 * 4, 1920, 1200 },
+	[M_MBP_5_1] = { "mbp51", 0xc0010000, 2048 * 4, 1440, 900 },
+	[M_MBP_5_2] = { "mbp52", 0xc0010000, 2048 * 4, 1920, 1200 },
+	[M_MBP_5_3] = { "mbp53", 0xd0010000, 2048 * 4, 1440, 900 },
+	[M_MBP_6_1] = { "mbp61", 0x90030000, 2048 * 4, 1920, 1200 },
+	[M_MBP_6_2] = { "mbp62", 0x90030000, 2048 * 4, 1680, 1050 },
+	[M_MBP_7_1] = { "mbp71", 0xc0010000, 2048 * 4, 1280, 800 },
 	[M_UNKNOWN] = { NULL, 0, 0, 0, 0 }
 };
 
@@ -90,7 +120,12 @@
 	EFIFB_DMI_SYSTEM_ID("Apple Computer, Inc.", "iMac6,1", M_I24),
 	EFIFB_DMI_SYSTEM_ID("Apple Inc.", "iMac6,1", M_I24),
 	EFIFB_DMI_SYSTEM_ID("Apple Inc.", "iMac7,1", M_I20_SR),
+	EFIFB_DMI_SYSTEM_ID("Apple Inc.", "iMac8,1", M_I24_8_1),
+	EFIFB_DMI_SYSTEM_ID("Apple Inc.", "iMac10,1", M_I24_10_1),
+	EFIFB_DMI_SYSTEM_ID("Apple Inc.", "iMac11,1", M_I27_11_1),
 	EFIFB_DMI_SYSTEM_ID("Apple Computer, Inc.", "Macmini1,1", M_MINI),
+	EFIFB_DMI_SYSTEM_ID("Apple Inc.", "Macmini3,1", M_MINI_3_1),
+	EFIFB_DMI_SYSTEM_ID("Apple Inc.", "Macmini4,1", M_MINI_4_1),
 	EFIFB_DMI_SYSTEM_ID("Apple Computer, Inc.", "MacBook1,1", M_MB),
 	/* At least one of these two will be right; maybe both? */
 	EFIFB_DMI_SYSTEM_ID("Apple Computer, Inc.", "MacBook2,1", M_MB),
@@ -99,13 +134,23 @@
 	EFIFB_DMI_SYSTEM_ID("Apple Computer, Inc.", "MacBook3,1", M_MB),
 	EFIFB_DMI_SYSTEM_ID("Apple Inc.", "MacBook3,1", M_MB),
 	EFIFB_DMI_SYSTEM_ID("Apple Inc.", "MacBook4,1", M_MB),
+	EFIFB_DMI_SYSTEM_ID("Apple Inc.", "MacBook5,1", M_MB_5_1),
+	EFIFB_DMI_SYSTEM_ID("Apple Inc.", "MacBook6,1", M_MB_6_1),
+	EFIFB_DMI_SYSTEM_ID("Apple Inc.", "MacBook7,1", M_MB_7_1),
 	EFIFB_DMI_SYSTEM_ID("Apple Inc.", "MacBookAir1,1", M_MBA),
 	EFIFB_DMI_SYSTEM_ID("Apple Computer, Inc.", "MacBookPro1,1", M_MBP),
 	EFIFB_DMI_SYSTEM_ID("Apple Computer, Inc.", "MacBookPro2,1", M_MBP_2),
+	EFIFB_DMI_SYSTEM_ID("Apple Computer, Inc.", "MacBookPro2,2", M_MBP_2_2),
 	EFIFB_DMI_SYSTEM_ID("Apple Inc.", "MacBookPro2,1", M_MBP_2),
 	EFIFB_DMI_SYSTEM_ID("Apple Computer, Inc.", "MacBookPro3,1", M_MBP_SR),
 	EFIFB_DMI_SYSTEM_ID("Apple Inc.", "MacBookPro3,1", M_MBP_SR),
 	EFIFB_DMI_SYSTEM_ID("Apple Inc.", "MacBookPro4,1", M_MBP_4),
+	EFIFB_DMI_SYSTEM_ID("Apple Inc.", "MacBookPro5,1", M_MBP_5_1),
+	EFIFB_DMI_SYSTEM_ID("Apple Inc.", "MacBookPro5,2", M_MBP_5_2),
+	EFIFB_DMI_SYSTEM_ID("Apple Inc.", "MacBookPro5,3", M_MBP_5_3),
+	EFIFB_DMI_SYSTEM_ID("Apple Inc.", "MacBookPro6,1", M_MBP_6_1),
+	EFIFB_DMI_SYSTEM_ID("Apple Inc.", "MacBookPro6,2", M_MBP_6_2),
+	EFIFB_DMI_SYSTEM_ID("Apple Inc.", "MacBookPro7,1", M_MBP_7_1),
 	{},
 };
 
@@ -113,7 +158,7 @@
 {
 	struct efifb_dmi_info *info = id->driver_data;
 	if (info->base == 0)
-		return -ENODEV;
+		return 0;
 
 	printk(KERN_INFO "efifb: dmi detected %s - framebuffer at %p "
 			 "(%dx%d, stride %d)\n", id->ident,
@@ -121,18 +166,55 @@
 			 info->stride);
 
 	/* Trust the bootloader over the DMI tables */
-	if (screen_info.lfb_base == 0)
+	if (screen_info.lfb_base == 0) {
+#if defined(CONFIG_PCI)
+		struct pci_dev *dev = NULL;
+		int found_bar = 0;
+#endif
 		screen_info.lfb_base = info->base;
-	if (screen_info.lfb_linelength == 0)
-		screen_info.lfb_linelength = info->stride;
-	if (screen_info.lfb_width == 0)
-		screen_info.lfb_width = info->width;
-	if (screen_info.lfb_height == 0)
-		screen_info.lfb_height = info->height;
-	if (screen_info.orig_video_isVGA == 0)
-		screen_info.orig_video_isVGA = VIDEO_TYPE_EFI;
 
-	return 0;
+#if defined(CONFIG_PCI)
+		/* make sure that the address in the table is actually on a
+		 * VGA device's PCI BAR */
+
+		for_each_pci_dev(dev) {
+			int i;
+			if ((dev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
+				continue;
+			for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
+				resource_size_t start, end;
+
+				start = pci_resource_start(dev, i);
+				if (start == 0)
+					break;
+				end = pci_resource_end(dev, i);
+				if (screen_info.lfb_base >= start &&
+						screen_info.lfb_base < end) {
+					found_bar = 1;
+				}
+			}
+		}
+		if (!found_bar)
+			screen_info.lfb_base = 0;
+#endif
+	}
+	if (screen_info.lfb_base) {
+		if (screen_info.lfb_linelength == 0)
+			screen_info.lfb_linelength = info->stride;
+		if (screen_info.lfb_width == 0)
+			screen_info.lfb_width = info->width;
+		if (screen_info.lfb_height == 0)
+			screen_info.lfb_height = info->height;
+		if (screen_info.orig_video_isVGA == 0)
+			screen_info.orig_video_isVGA = VIDEO_TYPE_EFI;
+	} else {
+		screen_info.lfb_linelength = 0;
+		screen_info.lfb_width = 0;
+		screen_info.lfb_height = 0;
+		screen_info.orig_video_isVGA = 0;
+		return 0;
+	}
+	return 1;
 }
 
 static int efifb_setcolreg(unsigned regno, unsigned red, unsigned green,
@@ -161,8 +243,17 @@
 	return 0;
 }
 
+static void efifb_destroy(struct fb_info *info)
+{
+	if (info->screen_base)
+		iounmap(info->screen_base);
+	release_mem_region(info->aperture_base, info->aperture_size);
+	framebuffer_release(info);
+}
+
 static struct fb_ops efifb_ops = {
 	.owner		= THIS_MODULE,
+	.fb_destroy	= efifb_destroy,
 	.fb_setcolreg	= efifb_setcolreg,
 	.fb_fillrect	= cfb_fillrect,
 	.fb_copyarea	= cfb_copyarea,
@@ -281,7 +372,7 @@
 	info->par = NULL;
 
 	info->aperture_base = efifb_fix.smem_start;
-	info->aperture_size = size_total;
+	info->aperture_size = size_remap;
 
 	info->screen_base = ioremap(efifb_fix.smem_start, efifb_fix.smem_len);
 	if (!info->screen_base) {
--- linux-mvl-dove-2.6.32.orig/drivers/video/s3c-fb.c
+++ linux-mvl-dove-2.6.32/drivers/video/s3c-fb.c
@@ -211,21 +211,23 @@
 
 /**
  * s3c_fb_calc_pixclk() - calculate the divider to create the pixel clock.
- * @id: window id.
  * @sfb: The hardware state.
  * @pixclock: The pixel clock wanted, in picoseconds.
  *
  * Given the specified pixel clock, work out the necessary divider to get
  * close to the output frequency.
  */
-static int s3c_fb_calc_pixclk(unsigned char id, struct s3c_fb *sfb, unsigned int pixclk)
+static int s3c_fb_calc_pixclk(struct s3c_fb *sfb, unsigned int pixclk)
 {
-	struct s3c_fb_pd_win *win = sfb->pdata->win[id];
 	unsigned long clk = clk_get_rate(sfb->bus_clk);
+	unsigned long long tmp;
 	unsigned int result;
 
-	pixclk *= win->win_mode.refresh;
-	result = clk / pixclk;
+	tmp = (unsigned long long)clk;
+	tmp *= pixclk;
+
+	do_div(tmp, 1000000000UL);
+	result = (unsigned int)tmp / 1000;
 
 	dev_dbg(sfb->dev, "pixclk=%u, clk=%lu, div=%d (%lu)\n",
 		pixclk, clk, result, clk / result);
@@ -301,7 +303,7 @@
 	/* use window 0 as the basis for the lcd output timings */
 
 	if (win_no == 0) {
-		clkdiv = s3c_fb_calc_pixclk(win_no, sfb, var->pixclock);
+		clkdiv = s3c_fb_calc_pixclk(sfb, var->pixclock);
 
 		data = sfb->pdata->vidcon0;
 		data &= ~(VIDCON0_CLKVAL_F_MASK | VIDCON0_CLKDIR);
--- linux-mvl-dove-2.6.32.orig/drivers/video/vga16fb.c
+++ linux-mvl-dove-2.6.32/drivers/video/vga16fb.c
@@ -1355,6 +1355,16 @@
 
 	vga16fb_update_fix(info);
 
+	/*
+	 * Ubuntu: Don't register vga16fb if another fb exists. Bad interactions
+	 * can occur.
+	 */
+	if (num_registered_fb > 0) {
+		printk(KERN_NOTICE "vga16fb: not registering due to another "
+		       "framebuffer present\n");
+		goto err_check_var;
+	}
+
 	if (register_framebuffer(info) < 0) {
 		printk(KERN_ERR "vga16fb: unable to register framebuffer\n");
 		ret = -EINVAL;
@@ -1440,6 +1450,8 @@
 
 MODULE_DESCRIPTION("Legacy VGA framebuffer device driver");
 MODULE_LICENSE("GPL");
+/* Attempt to load for any VGA compatible device. */
+MODULE_ALIAS("pci:*bc03sc00i*");
 module_init(vga16fb_init);
 module_exit(vga16fb_exit);
 
--- linux-mvl-dove-2.6.32.orig/drivers/video/offb.c
+++ linux-mvl-dove-2.6.32/drivers/video/offb.c
@@ -282,8 +282,17 @@
 	return 0;
 }
 
+static void offb_destroy(struct fb_info *info)
+{
+	if (info->screen_base)
+		iounmap(info->screen_base);
+	release_mem_region(info->aperture_base, info->aperture_size);
+	framebuffer_release(info);
+}
+
 static struct fb_ops offb_ops = {
 	.owner		= THIS_MODULE,
+	.fb_destroy	= offb_destroy,
 	.fb_setcolreg	= offb_setcolreg,
 	.fb_set_par	= offb_set_par,
 	.fb_blank	= offb_blank,
@@ -482,10 +491,14 @@
 	var->sync = 0;
 	var->vmode = FB_VMODE_NONINTERLACED;
 
+	/* set offb aperture size for generic probing */
+	info->aperture_base = address;
+	info->aperture_size = fix->smem_len;
+
 	info->fbops = &offb_ops;
 	info->screen_base = ioremap(address, fix->smem_len);
 	info->pseudo_palette = (void *) (info + 1);
-	info->flags = FBINFO_DEFAULT | foreign_endian;
+	info->flags = FBINFO_DEFAULT | FBINFO_MISC_FIRMWARE | foreign_endian;
 
 	fb_alloc_cmap(&info->cmap, 256, 0);
 
--- linux-mvl-dove-2.6.32.orig/drivers/video/vesafb.c
+++ linux-mvl-dove-2.6.32/drivers/video/vesafb.c
@@ -28,6 +28,12 @@
 #define dac_reg	(0x3c8)
 #define dac_val	(0x3c9)
 
+struct vesafb_info
+{
+	u32 pseudo_palette[256];
+	int mtrr_hdl;
+};
+
 /* --------------------------------------------------------------------- */
 
 static struct fb_var_screeninfo vesafb_defined __initdata = {
@@ -47,16 +53,37 @@
 	.accel	= FB_ACCEL_NONE,
 };
 
+#ifndef MODULE
 static int   inverse    __read_mostly;
+#endif
 static int   mtrr       __read_mostly;		/* disable mtrr */
 static int   vram_remap __initdata;		/* Set amount of memory to be used */
 static int   vram_total __initdata;		/* Set total amount of memory */
 static int   pmi_setpal __read_mostly = 1;	/* pmi for palette changes ??? */
+static int	redraw		__read_mostly;
 static int   ypan       __read_mostly;		/* 0..nothing, 1..ypan, 2..ywrap */
+static int	ywrap		__read_mostly;
 static void  (*pmi_start)(void) __read_mostly;
 static void  (*pmi_pal)  (void) __read_mostly;
 static int   depth      __read_mostly;
 static int   vga_compat __read_mostly;
+
+module_param(redraw, bool, 0);
+module_param(ypan, bool, 0);
+module_param(ywrap, bool, 0);
+module_param_named(vgapal, pmi_setpal, invbool, 0);
+MODULE_PARM_DESC(vgapal, "Use VGA for setting palette (default)");
+module_param_named(pmipal, pmi_setpal, bool, 0);
+MODULE_PARM_DESC(pmipal, "Use PMI for setting palette");
+module_param(mtrr, uint, 0);
+MODULE_PARM_DESC(mtrr, "Enable MTRR support (default)");
+module_param_named(nomtrr, mtrr, invbool, 0);
+MODULE_PARM_DESC(nomtrr, "Disable MTRR support");
+module_param(vram_remap, int, 0);
+MODULE_PARM_DESC(vram_remap, "Set total amount of memory to be used");
+module_param(vram_total, int, 0);
+MODULE_PARM_DESC(vram_total, "Total amount of memory");
+
 /* --------------------------------------------------------------------- */
 
 static int vesafb_pan_display(struct fb_var_screeninfo *var,
@@ -192,6 +219,7 @@
 	.fb_imageblit	= cfb_imageblit,
 };
 
+#ifndef MODULE
 static int __init vesafb_setup(char *options)
 {
 	char *this_opt;
@@ -225,10 +253,12 @@
 	}
 	return 0;
 }
+#endif
 
 static int __init vesafb_probe(struct platform_device *dev)
 {
 	struct fb_info *info;
+	struct vesafb_info *vfb_info;
 	int i, err;
 	unsigned int size_vmode;
 	unsigned int size_remap;
@@ -287,13 +317,14 @@
 		   spaces our resource handlers simply don't know about */
 	}
 
-	info = framebuffer_alloc(sizeof(u32) * 256, &dev->dev);
+	info = framebuffer_alloc(sizeof(struct vesafb_info), &dev->dev);
 	if (!info) {
 		release_mem_region(vesafb_fix.smem_start, size_total);
 		return -ENOMEM;
 	}
-	info->pseudo_palette = info->par;
-	info->par = NULL;
+	vfb_info = (struct vesafb_info *) info->par;
+	vfb_info->mtrr_hdl = -1;
+	info->pseudo_palette = vfb_info->pseudo_palette;
 
 	/* set vesafb aperture size for generic probing */
 	info->aperture_base = screen_info.lfb_base;
@@ -431,18 +462,16 @@
 		}
 
 		if (type) {
-			int rc;
-
 			/* Find the largest power-of-two */
 			while (temp_size & (temp_size - 1))
 				temp_size &= (temp_size - 1);
 
 			/* Try and find a power of two to add */
 			do {
-				rc = mtrr_add(vesafb_fix.smem_start, temp_size,
+				vfb_info->mtrr_hdl = mtrr_add(vesafb_fix.smem_start, temp_size,
 					      type, 1);
 				temp_size >>= 1;
-			} while (temp_size >= PAGE_SIZE && rc == -EINVAL);
+			} while (temp_size >= PAGE_SIZE && vfb_info->mtrr_hdl == -EINVAL);
 		}
 	}
 #endif
@@ -476,8 +505,28 @@
 	return err;
 }
 
+static int __exit vesafb_remove(struct platform_device *device)
+{
+	struct fb_info *info = dev_get_drvdata(&device->dev);
+
+	unregister_framebuffer(info);
+#ifdef CONFIG_MTRR
+	{
+		struct vesafb_info *vfb_info = (struct vesafb_info *) info->par;
+		if (vfb_info->mtrr_hdl >= 0)
+			mtrr_del(vfb_info->mtrr_hdl, 0, 0);
+	}
+#endif
+	iounmap(info->screen_base);
+	framebuffer_release(info);
+	release_mem_region(vesafb_fix.smem_start, vesafb_fix.smem_len);
+
+	return 0;
+}
+
 static struct platform_driver vesafb_driver = {
 	.probe	= vesafb_probe,
+	.remove = vesafb_remove,
 	.driver	= {
 		.name	= "vesafb",
 	},
@@ -488,11 +537,18 @@
 static int __init vesafb_init(void)
 {
 	int ret;
+#ifndef MODULE
 	char *option = NULL;
 
 	/* ignore error return of fb_get_options */
 	fb_get_options("vesafb", &option);
 	vesafb_setup(option);
+#else
+	if (redraw)
+		ypan = 0;
+	if (ywrap)
+		ypan = 2;
+#endif
 	ret = platform_driver_register(&vesafb_driver);
 
 	if (!ret) {
@@ -511,6 +567,14 @@
 
 	return ret;
 }
+
+static void __exit vesafb_exit(void)
+{
+	platform_device_unregister(vesafb_device);
+	platform_driver_unregister(&vesafb_driver);
+}
+
 module_init(vesafb_init);
+module_exit(vesafb_exit);
 
 MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/drivers/video/fbmem.c
+++ linux-mvl-dove-2.6.32/drivers/video/fbmem.c
@@ -1362,7 +1362,11 @@
 	vma->vm_pgoff = off >> PAGE_SHIFT;
 	/* This is an IO map - tell maydump to skip this VMA */
 	vma->vm_flags |= VM_IO | VM_RESERVED;
-	fb_pgprotect(file, vma, off);
+	/* io control needs non-cacheable attribute. */
+	if (start == info->fix.mmio_start)
+		vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
+	else
+		fb_pgprotect(file, vma, off);
 	if (io_remap_pfn_range(vma, vma->vm_start, off >> PAGE_SHIFT,
 			     vma->vm_end - vma->vm_start, vma->vm_page_prot))
 		return -EAGAIN;
--- linux-mvl-dove-2.6.32.orig/drivers/video/imxfb.c
+++ linux-mvl-dove-2.6.32/drivers/video/imxfb.c
@@ -593,7 +593,8 @@
  */
 static int imxfb_suspend(struct platform_device *dev, pm_message_t state)
 {
-	struct imxfb_info *fbi = platform_get_drvdata(dev);
+	struct fb_info *info = platform_get_drvdata(dev);
+	struct imxfb_info *fbi = info->par;
 
 	pr_debug("%s\n", __func__);
 
@@ -603,7 +604,8 @@
 
 static int imxfb_resume(struct platform_device *dev)
 {
-	struct imxfb_info *fbi = platform_get_drvdata(dev);
+	struct fb_info *info = platform_get_drvdata(dev);
+	struct imxfb_info *fbi = info->par;
 
 	pr_debug("%s\n", __func__);
 
--- linux-mvl-dove-2.6.32.orig/drivers/video/w100fb.c
+++ linux-mvl-dove-2.6.32/drivers/video/w100fb.c
@@ -857,9 +857,9 @@
 void w100fb_gpio_write(int port, unsigned long value)
 {
 	if (port==W100_GPIO_PORT_A)
-		value = writel(value, remapped_regs + mmGPIO_DATA);
+		writel(value, remapped_regs + mmGPIO_DATA);
 	else
-		value = writel(value, remapped_regs + mmGPIO_DATA2);
+		writel(value, remapped_regs + mmGPIO_DATA2);
 }
 EXPORT_SYMBOL(w100fb_gpio_read);
 EXPORT_SYMBOL(w100fb_gpio_write);
--- linux-mvl-dove-2.6.32.orig/drivers/video/fb_ddc.c
+++ linux-mvl-dove-2.6.32/drivers/video/fb_ddc.c
@@ -40,9 +40,28 @@
 			 "block.\n");
 		return NULL;
 	}
-
-	if (i2c_transfer(adapter, msgs, 2) == 2)
+	if (adapter->algo->master_xfer) {
+		if (i2c_transfer(adapter, msgs, 2) == 2)
+			return buf;
+	} else {
+		int i;
+		dev_info(&adapter->dev, "use SMBUS adapter for reading EDID\n");
+		if (0 != i2c_smbus_xfer(adapter, msgs[0].addr, msgs[0].flags,
+					I2C_SMBUS_READ, 0, I2C_SMBUS_BYTE_DATA, buf)) {
+                        printk("%s: failed for address 0\n", __func__);
+			return NULL;
+                }
+		for (i=0; i < EDID_LENGTH; i++) {
+			if (0 != i2c_smbus_xfer(adapter, msgs[1].addr, 0,
+						I2C_SMBUS_READ, i, I2C_SMBUS_BYTE_DATA, 
+						buf + i)) {
+				printk("%s: failed for address %d\n", __func__, i);
+				return NULL;
+			}
+			
+		}
 		return buf;
+	}
 
 	dev_warn(&adapter->dev, "unable to read EDID block.\n");
 	kfree(buf);
@@ -55,6 +74,15 @@
 	unsigned char *edid = NULL;
 	int i, j;
 
+	if (!algo_data)	{
+		/* No direct control on I2C bus */
+		for (i = 0; i < 3; i++) {
+			edid = fb_do_probe_ddc_edid(adapter);
+			if (edid)
+				break;
+		}
+		return edid;
+	}
 	algo_data->setscl(algo_data->data, 1);
 
 	for (i = 0; i < 3; i++) {
--- linux-mvl-dove-2.6.32.orig/drivers/video/via/ioctl.c
+++ linux-mvl-dove-2.6.32/drivers/video/via/ioctl.c
@@ -25,6 +25,8 @@
 {
 	struct viafb_ioctl_info viainfo;
 
+	memset(&viainfo, 0, sizeof(struct viafb_ioctl_info));
+
 	viainfo.viafb_id = VIAID;
 	viainfo.vendor_id = PCI_VIA_VENDOR_ID;
 
--- linux-mvl-dove-2.6.32.orig/drivers/video/via/accel.c
+++ linux-mvl-dove-2.6.32/drivers/video/via/accel.c
@@ -277,11 +277,12 @@
 		writel(tmp, engine + 0x1C);
 	}
 
-	if (op != VIA_BITBLT_COLOR)
+	if (op == VIA_BITBLT_FILL) {
+		writel(fg_color, engine + 0x58);
+	} else if (op == VIA_BITBLT_MONO) {
 		writel(fg_color, engine + 0x4C);
-
-	if (op == VIA_BITBLT_MONO)
 		writel(bg_color, engine + 0x50);
+	}
 
 	if (op == VIA_BITBLT_FILL)
 		ge_cmd |= fill_rop << 24 | 0x00002000 | 0x00000001;
--- linux-mvl-dove-2.6.32.orig/drivers/video/console/tileblit.c
+++ linux-mvl-dove-2.6.32/drivers/video/console/tileblit.c
@@ -83,7 +83,7 @@
 			int softback_lines, int fg, int bg)
 {
 	struct fb_tilecursor cursor;
-	int use_sw = (vc->vc_cursor_type & 0x01);
+	int use_sw = (vc->vc_cursor_type & 0x10);
 
 	cursor.sx = vc->vc_x;
 	cursor.sy = vc->vc_y;
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/video/display/Kconfig
@@ -21,4 +21,29 @@
 comment "Display hardware drivers"
 	depends on DISPLAY_SUPPORT
 
+config CH7025_COMPOSITE
+    tristate "TV-OUT support (Chrontel CH7025/CH7026 TV Composite)"
+    default y
+    help
+       The device is able to encode the video signals and generate
+       synchronization signals SDTV format for NTSC and PAL standards.
+
+config KG2_ANX7150
+	tristate "KG2_ANX7150 support"
+	default y
+	help
+	  KG2/ANX7150 device driver support.
+
+config ADI9889
+	tristate "ADI9889 support"
+	default n
+	help
+	  ADI9889 device driver support.
+
+config THS8200
+       tristate "THS8200 support"
+
+       default y
+       help
+         THS8200 device driver support.
 endmenu
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/Makefile
+++ linux-mvl-dove-2.6.32/drivers/video/display/Makefile
@@ -1,6 +1,11 @@
 # Display drivers
 
-display-objs				:= display-sysfs.o
+display-objs			:= display-sysfs.o
 
-obj-$(CONFIG_DISPLAY_SUPPORT)		+= display.o
+obj-$(CONFIG_DISPLAY_SUPPORT)	+= display.o
 
+obj-$(CONFIG_CH7025_COMPOSITE)  += ch7025_composite.o
+obj-$(CONFIG_KG2_ANX7150)	+= kg2/
+obj-$(CONFIG_KG2_ANX7150)	+= ANX7150/
+obj-$(CONFIG_ADI9889)		+= adi9889/
+obj-$(CONFIG_THS8200)		+= ths_8200.o
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/ths_8200.c
+++ linux-mvl-dove-2.6.32/drivers/video/display/ths_8200.c
@@ -0,0 +1,85 @@
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/param.h>
+#include <linux/platform_device.h>
+#include <linux/i2c.h>
+#include <linux/delay.h>
+
+//#define DEBUG
+
+#ifdef DEBUG
+#include <linux/debugfs.h>
+#include <asm/uaccess.h>
+#endif
+
+static const struct i2c_device_id ths8200_register_id[] = {
+	{ "ths8200_i2c", 0 },
+	{ }
+};
+MODULE_DEVICE_TABLE(i2c, ths8200_register_id);
+
+
+static int ths8200_i2c_remove(struct i2c_client *client)
+{
+        return 0;
+}
+
+static int ths8200_i2c_probe(struct i2c_client *client,
+                        const struct i2c_device_id *id)
+{
+        int rc;
+
+	printk ("Probing in %s, name %s, addr 0x%x\n",__FUNCTION__,client->name,client->addr);
+
+        if (!i2c_check_functionality(client->adapter,
+                                     I2C_FUNC_SMBUS_I2C_BLOCK)) {
+                dev_err(&client->dev, "i2c bus does not support the THS8200.\n");
+                rc = -ENODEV;
+                goto exit;
+        }
+
+	i2c_smbus_write_byte_data(client, 0x1C, 0x30);
+	i2c_smbus_write_byte_data(client, 0x82, 0x5C);
+
+        return 0;
+
+ exit:
+        return rc;
+}
+
+static struct i2c_driver ths8200_driver = {
+     .driver = {
+          .name   = "ths8200_i2c",
+          .owner  = THIS_MODULE,
+     },
+     .probe          = ths8200_i2c_probe,
+     .remove         = ths8200_i2c_remove,
+     .id_table       = ths8200_register_id,
+};
+
+static int __init ths8200_init(void)
+{
+        int ret;
+
+	printk ("Initializing %s\n",__FUNCTION__);
+
+        if ((ret = i2c_add_driver(&ths8200_driver)) < 0)
+        {
+                return ret;
+        }
+        return ret;
+}
+
+static void __exit ths8200_exit(void)
+{
+	i2c_del_driver(&ths8200_driver);
+}
+
+module_init(ths8200_init);
+module_exit(ths8200_exit);
+
+MODULE_AUTHOR("shadi@marvell.com");
+MODULE_DESCRIPTION("THS8200 D2A converter.");
+MODULE_LICENSE("GPL");
+
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/ch7025_composite.c
+++ linux-mvl-dove-2.6.32/drivers/video/display/ch7025_composite.c
@@ -0,0 +1,427 @@
+/*
+    This driver supports Chrontel CH7025/CH7026 TV/VGA Encoder.
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; version 2 of the License.
+*/
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/i2c.h>
+#include <linux/proc_fs.h>
+#include <video/ch7025_composite.h>
+
+#define CH7025_DEVICE_ID_CMD		0x00
+#define CH7025_DEVICE_REVISION_ID_CMD	0x01
+#define CH7025_OUTPUT_FORMAT		0x0D
+#define CH7025_DID 0x55
+#define CH7026_DID 0x54
+
+static const struct i2c_device_id ch7025_id[] = {
+	{ "ch7025_i2c", 0 },
+	{ }
+};
+
+struct i2c_client *ch7025_client = NULL;
+static struct input_stream_info gInputInfo;
+static int gEnable;
+unsigned char REG_MAP_320_240[ ][2] = 
+{
+	{ 0x07, 0x18 }, { 0x12, 0x40 }, { 0x4D, 0x03 }, { 0x4E, 0xC5 },
+	{ 0x4F, 0x7F }, { 0x50, 0x7B }, { 0x51, 0x59 }, { 0x52, 0x12 },
+	{ 0x53, 0x1B }, { 0x55, 0xE5 }, { 0x5E, 0x80 },
+	{ 0x09, 0x80 }, { 0x16, 0xF6 }, { 0x1C, 0x64 }, { 0x21, 0x51 },
+	{ 0x32, 0x77 }, { 0x33, 0x07 }, { 0x34, 0xF5 }, { 0x36, 0x32 },
+	{ 0x3D, 0x98 }, 
+};
+#define REG_MAP_320_240_LENGTH ( sizeof(REG_MAP_320_240) / (2*sizeof(unsigned char)) )
+unsigned char REG_MAP_640_480[ ][2] = 
+{
+	{ 0x07, 0x18 }, { 0x0D, 0x80 }, { 0x0F, 0x1A }, { 0x10, 0x80 },
+	{ 0x11, 0x20 }, { 0x12, 0x40 }, { 0x13, 0x10 }, { 0x14, 0x60 },
+	{ 0x15, 0x11 }, { 0x16, 0xE0 }, { 0x17, 0x0D }, { 0x19, 0x0A },
+	{ 0x1A, 0x02 }, { 0x4D, 0x03 }, { 0x4E, 0xC5 }, { 0x4F, 0x7F },
+	{ 0x50, 0x7B }, { 0x51, 0x59 }, { 0x52, 0x12 }, { 0x53, 0x1B },
+	{ 0x55, 0xE5 }, { 0x5E, 0x80 },
+	{ 0x09, 0x80 }, { 0x16, 0xEA }, { 0x1C, 0x64 }, { 0x21, 0x51 },
+	{ 0x32, 0x77 }, { 0x36, 0x2E }, { 0x3D, 0x98 }, { 0x3E, 0x20 },
+};
+#define REG_MAP_640_480_LENGTH ( sizeof(REG_MAP_640_480) / (2*sizeof(unsigned char)) )
+unsigned char REG_MAP_800_600[ ][2] = //800x600
+{
+	{ 0x06, 0x6B }, { 0x07, 0x18 }, { 0x0D, 0x80 }, { 0x0F, 0x1B },
+	{ 0x10, 0x20 }, { 0x11, 0xC0 }, { 0x12, 0x40 }, { 0x13, 0x32 },
+	{ 0x14, 0x3C }, { 0x15, 0x12 }, { 0x16, 0x58 }, { 0x17, 0x6C },
+	{ 0x19, 0x08 }, { 0x1A, 0x04 }, { 0x4D, 0x03 }, { 0x4E, 0xC5 },
+	{ 0x4F, 0x7F }, { 0x50, 0x7B }, { 0x51, 0x59 }, { 0x52, 0x12 }, 
+	{ 0x53, 0x1B }, { 0x55, 0xE5 }, { 0x5E, 0x80 }, { 0x69, 0x64 },
+	{ 0x09, 0x80 }, { 0x13, 0x48 }, { 0x17, 0x76 }, { 0x19, 0x09 },
+	{ 0x1C, 0x64 }, { 0x21, 0x51 }, { 0x22, 0xD8 }, { 0x32, 0x77 },
+	{ 0x33, 0x07 }, { 0x34, 0xFB }, { 0x36, 0x32 }, { 0x3D, 0x98 },
+	{ 0x3E, 0x20 },
+};
+#define REG_MAP_800_600_LENGTH ( sizeof(REG_MAP_800_600) / (2*sizeof(unsigned char)) )
+unsigned char REG_MAP_1024_600[ ][2] = 
+{
+	{ 0x06, 0x6B }, { 0x07, 0x18 }, { 0x0D, 0x80 }, { 0x0E, 0xE4 },
+	{ 0x0F, 0x24 }, { 0x10, 0x00 }, { 0x11, 0xB0 }, { 0x12, 0x40 },
+	{ 0x13, 0x26 }, { 0x14, 0x64 }, { 0x15, 0x12 }, { 0x16, 0x5D },
+	{ 0x17, 0x6C }, { 0x19, 0x08 }, { 0x1A, 0x04 }, { 0x4D, 0x03 },
+	{ 0x4E, 0xC5 }, { 0x4F, 0x7F }, { 0x50, 0x7B }, { 0x51, 0x59 },
+	{ 0x52, 0x12 }, { 0x53, 0x1B }, { 0x55, 0xE5 }, { 0x5E, 0x80 },
+	{ 0x69, 0x60 },
+	{ 0x09, 0x80 }, { 0x1C, 0x63 }, { 0x21, 0x51 }, { 0x22, 0xD8 },
+	{ 0x32, 0x77 }, { 0x33, 0x07 }, { 0x34, 0xFB }, { 0x35, 0x08 }, 
+	{ 0x36, 0x35 }, { 0x3D, 0x98 }, { 0x3E, 0x20 },
+
+};
+#define REG_MAP_1024_600_LENGTH ( sizeof(REG_MAP_1024_600) / (2*sizeof(unsigned char)) )
+
+void ch7025_write_data(u8 cmd, u8 val)
+{
+	i2c_smbus_write_byte_data(ch7025_client, (u8)cmd, (u8)val);
+}
+int ch7025_read_data(u8 cmd)
+{
+	return i2c_smbus_read_byte_data(ch7025_client, cmd);
+}
+
+void ch7025_enable(bool enable)
+{
+	int i;
+	int regmap_length, val;
+	unsigned char *reg_map;
+
+	if(ch7025_client==NULL){
+		printk("can't find ch7025 chip\n");
+		return;
+	}
+	val = ch7025_read_data(0x00);
+	if ( (val != CH7025_DID ) && (val != CH7026_DID))
+	{
+		printk("ch7025 vendor ID error!");
+		return;
+	}
+	/* init sequence. */
+	ch7025_write_data(0x02, 0x01);
+	ch7025_write_data(0x02, 0x03);
+	ch7025_write_data(0x03, 0x00);
+	ch7025_write_data(0x04, 0x39);
+
+	if(!enable) { 
+		gEnable = 0;
+		return;
+	}
+	gEnable = 1;
+	/* the settings programmer wanna set. */
+	if( (gInputInfo.xres==1024) && (gInputInfo.yres==600) ){
+		reg_map = REG_MAP_1024_600;
+		regmap_length = REG_MAP_1024_600_LENGTH;
+	}else if( (gInputInfo.xres==800) && (gInputInfo.yres==600) ){
+		reg_map = REG_MAP_800_600;
+		regmap_length = REG_MAP_800_600_LENGTH;	
+	}else if( (gInputInfo.xres==640) && (gInputInfo.yres=480) ){
+		reg_map = REG_MAP_640_480;
+		regmap_length = REG_MAP_640_480_LENGTH;	
+	}else{
+		reg_map = REG_MAP_320_240;
+		regmap_length = REG_MAP_320_240_LENGTH;	
+	}
+
+	for (i = 0 ; i < regmap_length ; i++ )
+		ch7025_write_data(reg_map[2*i], reg_map[2*i+1]);
+
+	if(gInputInfo.iformat > CH7025_RGB888){//input format setting
+		i = ch7025_read_data(0x0C);
+		i = (i&0xf0) | (gInputInfo.iformat&0xf);
+		ch7025_write_data(0x0C, i);
+		if( (gInputInfo.iformat>=CH7025_YCbCr422_8bit) 
+		     && (gInputInfo.iformat<=CH7025_YCbCr444_8bit)){
+			i = (ch7025_read_data(0x0D) | 0x20);
+			ch7025_write_data(0x0D, i);	 
+		}
+	}
+	if(gInputInfo.swap > CH7025_RGB_ORDER){//output format setting
+		i = ch7025_read_data(0x0C);
+		i = (i&0x8f) | ((gInputInfo.swap&0x7)<<4);
+		ch7025_write_data(0x0C, i);
+	}
+	if(gInputInfo.oformat > CH7025_NTSC_M){//output format setting
+		i = ch7025_read_data(0x0D);
+		i = (i&0xf0) | (gInputInfo.oformat&0xf);
+		ch7025_write_data(0x0D, i);
+	}
+	
+	/* finalize sequence. */
+	ch7025_write_data(0x7D, 0x62);
+	ch7025_write_data(0x04, 0x38);
+	if(gInputInfo.xres > 720)
+		ch7025_write_data(0x06, 0x69);
+	else
+		ch7025_write_data(0x06, 0x71);	
+	ch7025_write_data(0x03, 0x00);
+	ch7025_write_data(0x03, 0x00);
+	ch7025_write_data(0x03, 0x00);
+	ch7025_write_data(0x03, 0x00);
+	ch7025_write_data(0x03, 0x00);
+	ch7025_write_data(0x06, 0x70);
+	ch7025_write_data(0x02, 0x02);
+	ch7025_write_data(0x02, 0x03);
+	ch7025_write_data(0x04, 0x00);
+
+}
+void ch7025_set_input_stream(struct input_stream_info *info)
+{
+	gInputInfo.xres = info->xres;
+	gInputInfo.yres = info->yres;
+	gInputInfo.iformat = info->iformat;
+	gInputInfo.oformat = info->oformat;
+	gInputInfo.swap = info->swap;
+}
+
+int Limit(int val, int min, int max)
+{
+	if(val < min) return min;
+	else if(val > max) return max;
+	else return val;
+}
+static ssize_t show_AllParam(struct device *dev, struct device_attribute *attr,
+			  char *buf)
+{
+	int len = 0;
+	int i;
+	s32 rd;
+
+	if ((rd = (int)ch7025_read_data(CH7025_DEVICE_ID_CMD)) < 0) {
+          	return -EIO;
+     	}
+	len += sprintf(buf+len, "DEVICE ID (0x00) = 0x%02x\n", rd);
+	
+	len += sprintf(buf+len, "\nDump CH7025 registers(HEX):\n");
+	for(i=0; i<0x80; i++){
+		if ((rd = (int)ch7025_read_data((u8)i)) < 0) {
+			return -EIO;
+		}
+		len  += sprintf(buf+len, "%02x ", rd);
+		if(i%16 == 15)
+			len  += sprintf(buf+len, "\n");
+	}
+
+	return len;
+}
+static ssize_t show_Resolution(struct device *dev, struct device_attribute *attr,
+			  char *buf)
+{
+	//horizontal
+	int it, ha, va;
+	it = ch7025_read_data(0x0F) & 0x07;
+	ha = (it << 8) | ch7025_read_data(0x10);
+	//vertical
+	it = ch7025_read_data(0x15) & 0x07;
+	va = (it << 8) | ch7025_read_data(0x16);
+	
+	return sprintf(buf, "horizontal = %d, vertical=%d\n", ha, va);
+	
+}
+static ssize_t show_Saturation(struct device *dev, struct device_attribute *attr,
+			  char *buf)
+{
+	int sat = ch7025_read_data(0x2F) & 0x7F ;
+
+	return sprintf(buf, "Saturation = %d\n", sat);
+}
+static ssize_t store_Saturation(struct device *dev, struct device_attribute *attr,
+			 const char *buf, size_t count)
+{
+	int sat;
+	u8 old;
+
+	sscanf(buf, "%d", &sat);
+	old = ch7025_read_data(0x2F);
+	old = (old & 0x80) | (Limit(sat,0,127) & 0x7F);
+	ch7025_write_data(0x2F,old);
+
+	return count;
+}
+static ssize_t show_Hue(struct device *dev, struct device_attribute *attr,
+			  char *buf)
+{
+	int hue = ch7025_read_data(0x2E) & 0x7F;
+
+	return sprintf(buf, "Hue = %d\n", hue);
+}
+static ssize_t store_Hue(struct device *dev, struct device_attribute *attr,
+			 const char *buf, size_t count)
+{
+	int hue;
+	u8 old;
+
+    	sscanf(buf, "%d", &hue);
+	old = ch7025_read_data(0x2E);
+	old = (old & 0x80) | (Limit(hue,0,127) & 0x7F);
+	ch7025_write_data(0x2E,old);
+	
+	return count;
+}
+static ssize_t show_Contrast(struct device *dev, struct device_attribute *attr,
+			  char *buf)
+{
+	int contrast = ch7025_read_data(0x30) & 0x7F;
+
+	return sprintf(buf, "contrast = %d\n", contrast);
+}
+static ssize_t store_Contrast(struct device *dev, struct device_attribute *attr,
+			 const char *buf, size_t count)
+{
+	int cta;
+	u8 old;
+
+	sscanf(buf, "%d", &cta);
+	old = ch7025_read_data(0x30);
+	old = (old & 0x80) | (Limit(cta,0,127) & 0x7F);
+	ch7025_write_data(0x30,old);
+
+	return count;
+}
+static ssize_t show_Brightness(struct device *dev, struct device_attribute *attr,
+			  char *buf)
+{
+	int brightness = ch7025_read_data(0x31) & 0xFF;
+
+	return sprintf(buf, "brightness = %d\n", brightness);
+}
+static ssize_t store_Brightness(struct device *dev, struct device_attribute *attr,
+			 const char *buf, size_t count)
+{
+	int bri;
+
+	sscanf(buf, "%d", &bri);
+	ch7025_write_data(0x31, (Limit(bri,0,255) & 0xFF));
+
+	return count;
+}
+
+static ssize_t store_SetInputSignal(struct device *dev, struct device_attribute *attr,
+			 const char *buf, size_t count)
+{
+	sscanf(buf, "%d %d %d %d %d", &(gInputInfo.xres), &(gInputInfo.yres), 
+			&(gInputInfo.iformat), &(gInputInfo.oformat), &(gInputInfo.swap));
+	
+	return count;
+}
+static ssize_t store_ResetChip(struct device *dev, struct device_attribute *attr,
+			 const char *buf, size_t count)
+{
+	int enable;
+	sscanf(buf, "%d", &enable);
+	ch7025_enable((bool)enable);
+	
+	return count;
+}
+
+
+static DEVICE_ATTR(AllParam, S_IRUGO, show_AllParam, NULL);
+static DEVICE_ATTR(Resolution, S_IRUGO, show_Resolution, NULL);
+static DEVICE_ATTR(Saturation, S_IWUSR | S_IRUGO, show_Saturation, store_Saturation);
+static DEVICE_ATTR(Hue, S_IWUSR | S_IRUGO, show_Hue, store_Hue);
+static DEVICE_ATTR(Contrast, S_IWUSR | S_IRUGO, show_Contrast, store_Contrast);
+static DEVICE_ATTR(Brightness, S_IWUSR | S_IRUGO, show_Brightness, store_Brightness);
+static DEVICE_ATTR(SetInputSignal, S_IWUSR , NULL, store_SetInputSignal);
+static DEVICE_ATTR(ResetChip, S_IWUSR , NULL, store_ResetChip);
+
+static struct attribute *ch7025_attributes[] = {
+	&dev_attr_AllParam.attr,
+	&dev_attr_Resolution.attr,
+	&dev_attr_Saturation.attr,
+	&dev_attr_Hue.attr,
+	&dev_attr_Contrast.attr,
+	&dev_attr_Brightness.attr,
+	&dev_attr_SetInputSignal,
+	&dev_attr_ResetChip,	
+	NULL
+};
+
+static const struct attribute_group ch7025_attr_group = {
+	.attrs = ch7025_attributes,
+};
+static int __devinit ch7025_probe(struct i2c_client *client,
+			       const struct i2c_device_id *id)
+{
+	u8 val;
+	int err;
+	struct i2c_adapter *adapter = client->adapter;
+
+	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
+		return -ENODEV;
+	
+	//Make sure CH7025/26B in the system:
+	val = i2c_smbus_read_byte_data(client, 0x00);
+	if ( (val != CH7025_DID ) && (val != CH7026_DID))
+	{
+		dev_err(&client->dev, "Failed to initialize Chrontel CH7025/CH7026 TV/VGA Encoder");
+		return -EIO; // CH7025/26B was not found
+	}
+	
+	//initialize variable
+	gInputInfo.xres = 320;
+	gInputInfo.yres = 240;
+	gInputInfo.iformat = CH7025_RGB888;
+	gInputInfo.oformat = CH7025_NTSC_M;
+	gInputInfo.swap = CH7025_RGB_ORDER;
+	gEnable = 0;
+	ch7025_client = client;
+
+	printk("Chrontel CH7025/CH7026 TV/VGA Encoder driver loaded successfully\n");
+	
+	err = sysfs_create_group(&client->dev.kobj, &ch7025_attr_group);
+	
+	if(err)
+		printk("ch7025 sysfs create fail!\n");	
+
+	return 0;
+}
+static int ch7025_remove(struct i2c_client *client)
+{
+	sysfs_remove_group(&client->dev.kobj, &ch7025_attr_group);
+	return 0;
+}
+static int ch7025_suspend(struct i2c_client *client)
+{
+	return 0;
+}
+static int ch7025_resume(struct i2c_client *client)
+{
+	ch7025_enable(gEnable);
+	return 0;
+}
+static struct i2c_driver ch7025_driver = {
+	.driver = {
+		.name   = "ch7025_i2c",
+		.owner  = THIS_MODULE,
+	},
+	.probe          = ch7025_probe,
+	.remove         = ch7025_remove,
+	.suspend        = ch7025_suspend,
+	.resume         = ch7025_resume,
+	.id_table       = ch7025_id,
+};
+
+static int __init ch7025_init(void)
+{
+	return i2c_add_driver(&ch7025_driver);
+}
+
+static void __exit ch7025_exit(void)
+{
+	i2c_del_driver(&ch7025_driver);
+}
+
+MODULE_AUTHOR("Marcel Chang <marcelc@marvell.com>");
+MODULE_DESCRIPTION("Chrontel CH7025/CH7026 TV/VGA Encoder");
+MODULE_LICENSE("GPL");
+
+module_init(ch7025_init);
+module_exit(ch7025_exit);
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/kg2/kg2_netlink.h
+++ linux-mvl-dove-2.6.32/drivers/video/display/kg2/kg2_netlink.h
@@ -0,0 +1,63 @@
+/*
+ * kg2_netlink.h - Linux Driver for Marvell 88DE2750 Digital Video Format Converter
+ *
+ *                 This file handles Generic Netlink communication, which is used to
+ *                 send KG2 configuration request to the user space daemon - kg2d.
+ */
+
+#ifndef _KG2_NETLINK_H
+#define _KG2_NETLINK_H
+
+#include <net/genetlink.h>
+#include <video/kg2.h>
+
+
+#define KG2_GENL_NAME		"KG2"
+#define KG2_GENL_VERSION	1
+
+// Generic netlink attributes
+enum kg2_genl_attributes {
+	KG2_GENL_ATTR_UNSPEC,
+	KG2_GENL_ATTR_PID,
+	KG2_GENL_ATTR_HTOTAL,
+	KG2_GENL_ATTR_HACTIVE,
+	KG2_GENL_ATTR_HFRONTPORCH,
+	KG2_GENL_ATTR_HSYNCWIDTH,
+	KG2_GENL_ATTR_HPOLARITY,
+	KG2_GENL_ATTR_VTOTAL,
+	KG2_GENL_ATTR_VACTIVE,
+	KG2_GENL_ATTR_VFRONTPORCH,
+	KG2_GENL_ATTR_VSYNCWIDTH,
+	KG2_GENL_ATTR_VPOLARITY,
+	KG2_GENL_ATTR_ASPRATIO,
+	KG2_GENL_ATTR_ISPROGRESSIVE,
+	KG2_GENL_ATTR_REFRATE,
+	__KG2_GENL_ATTR_MAX,
+};
+#define KG2_GENL_ATTR_MAX	(__KG2_GENL_ATTR_MAX - 1)
+
+// Generic netlink commands
+enum kg2_genl_commands {
+	KG2_GENL_CMD_UNSPEC,
+	KG2_GENL_CMD_SET_DAEMON_PID,
+	KG2_GENL_CMD_SET_INPUT_TIMING,
+	KG2_GENL_CMD_SET_OUTPUT_TIMING,
+	KG2_GENL_EVT_SYSTEM_IS_RESUMED,
+	KG2_GENL_CMD_GET_DAEMON_PID,
+	KG2_GENL_CMD_GET_INPUT_TIMING,
+	KG2_GENL_CMD_GET_OUTPUT_TIMING,
+	__KG2_GENL_CMD_MAX,
+};
+#define KG2_GENL_CMD_MAX	(__KG2_GENL_CMD_MAX - 1)
+
+/* Generic netlink functions */
+bool kg2_genl_daemon_pid_available(void);
+int kg2_genl_set_input_timing(AVC_CMD_TIMING_PARAM * timing);
+int kg2_genl_set_output_timing(AVC_CMD_TIMING_PARAM * timing);
+int kg2_genl_system_is_resumed(void);
+int kg2_genl_register(void);
+int kg2_genl_unregister(void);
+
+
+#endif /* _KG2_NETLINK_H */
+
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/kg2/autocalib.c
+++ linux-mvl-dove-2.6.32/drivers/video/display/kg2/autocalib.c
@@ -0,0 +1,483 @@
+/*******************************************************************************
+*                Copyright 2008, MARVELL SEMICONDUCTOR, LTD.                   *
+* THIS CODE CONTAINS CONFIDENTIAL INFORMATION OF MARVELL.                      *
+* NO RIGHTS ARE GRANTED HEREIN UNDER ANY PATENT, MASK WORK RIGHT OR COPYRIGHT  *
+* OF MARVELL OR ANY THIRD PARTY. MARVELL RESERVES THE RIGHT AT ITS SOLE        *
+* DISCRETION TO REQUEST THAT THIS CODE BE IMMEDIATELY RETURNED TO MARVELL.     *
+* THIS CODE IS PROVIDED "AS IS". MARVELL MAKES NO WARRANTIES, EXPRESSED,       *
+* IMPLIED OR OTHERWISE, REGARDING ITS ACCURACY, COMPLETENESS OR PERFORMANCE.   *
+*                                                                              *
+* MARVELL COMPRISES MARVELL TECHNOLOGY GROUP LTD. (MTGL) AND ITS SUBSIDIARIES, *
+* MARVELL INTERNATIONAL LTD. (MIL), MARVELL TECHNOLOGY, INC. (MTI), MARVELL    *
+* SEMICONDUCTOR, INC. (MSI), MARVELL ASIA PTE LTD. (MAPL), MARVELL JAPAN K.K.  *
+* (MJKK), MARVELL ISRAEL LTD. (MSIL). MARVELL INDIA PVT LTD (MIPL)             *
+*******************************************************************************/
+
+#include "kg2_i2c.h"
+
+//Use 0x20 as device address for 88DE   2 Page addressing
+#define AVC275X_BASE_ADDR               (0x20)
+//Example 0x20, 0x00, 0x0F (0x20 - 88DE275X Device ID, 0x00 - default, 0x0F - Analog PLL Page ID AVC275X_PLL_PAGE_ID)
+
+//Use 0x22 as the Sub address for addressing an Offset register within a Page
+#define AVC275X_SUB_ADDR                (0x22)
+//Example 0x22, 0x06, 0x01 (0x22 - 88DE275X Base Address, 0x06 - register Offset for AVC275X_SA_DAPLL_KVCO_CAL_CTRL, 0x01 - value)
+
+//Page ID for addressing the Analog Pll Page
+#define AVC275X_PLL_PAGE_ID             (0x0F)
+
+//--------------------  ANA_CTRL MACROS ---------------------------
+
+//SubAdress(SA) for DAPLL registers
+#define AVC275X_SA_DAPLL_KVCO_CAL_CTRL  (0x06)     //ANA_CTRL6
+#define AVC275X_SA_DAPLL_CTRL           (0x07)     //ANA_CTRL7
+#define AVC275X_SA_DAPLL_VCO_CTRL       (0x08)     //ANA_CTRL8
+
+//SubAdress(SA) for SAPLL1 registers
+#define AVC275X_SA_SAPLL1_KVCO_CAL_CTRL  (0x0E)    //ANA_CTRL14
+#define AVC275X_SA_SAPLL1_CTRL           (0x10)    //ANA_CTRL16
+#define AVC275X_SA_SAPLL1_VCO_CTRL       (0x11)    //ANA_CTRL17
+
+//SubAdress(SA) for SAPLL2 registers
+#define AVC275X_SA_SAPLL2_KVCO_CAL_CTRL  (0x17)   //ANA_CTRL23
+#define AVC275X_SA_SAPLL2_CTRL           (0x19)   //ANA_CTRL25
+#define AVC275X_SA_SAPLL2_VCO_CTRL       (0x1A)   //ANA_CTRL26
+
+#define AVC275X_SA_PLL_STATUS            (0x41)    //ANA_STAT0
+
+#define AVC275X_SA_PLL_STAT14		     (0x4F)	   //ANA_STAT14
+
+//SubAddress(SA) for XTAL setting
+#define AVC275X_XTAL_AMP_SEL			 (0x1E)	   //ANA_CTRL30
+
+//SubAddress(SA) for DAC current selection.
+#define AVC275X_DAC_CURRENT_SEL			 (0x1F)    //ANA_CTRL31
+
+// SubAddredd(SA) for XTAL control.
+#define AVC275X_XTAL_CTRL				 (0x20)	   //ANA_CTRL32
+
+
+//--------------------  SDRAM MACROS ---------------------------
+
+//Page ID for addressing the Sdram Control Page
+#define AVC275X_DDR_PAGE_ID              (0x04)
+
+//SubAddress(SA) for SDRAM Request monitor
+#define AVC275X_DDR_REQ_MON				 (0x48)   //DDR_REQ_MON0_0
+
+//Page ID for addressing the Sdram Phy registers Page
+#define AVC275X_DDR_PHY_PAGE_ID          (0x05)
+
+//SubAddress(SA) for Calibration registers
+#define AVC275X_DDR_CAL_TRIG			 (0xC7)   //DDR_CAL_TRIG
+#define AVC275X_DDR_CALP_L				 (0xC8)   //DDR_CALP_L
+#define AVC275X_DDR_CALP_H				 (0xC9)   //DDR_CALP_H
+#define AVC275X_DDR_CALN_L				 (0xCA)   //DDR_CALN_L
+#define AVC275X_DDR_CALN_H				 (0xCB)   //DDR_CALN_H
+
+//SubAddress(SA) for ZPR/ZNR registers
+#define AVC275X_DDR_ZPR_0				 (0x5C)   //DS_PHY_ZPR_0
+#define AVC275X_DDR_ZNR_0				 (0x5D)   //DS_PHY_ZNR_0
+#define AVC275X_DDR_ZPR_1				 (0x5E)   //DS_PHY_ZPR_1
+#define AVC275X_DDR_ZNR_1				 (0x5F)   //DS_PHY_ZNR_1
+
+#define AVC_SDRAM_CLNT_NUM1   			 (1)
+#define AVC_SDRAM_CLNT_NUM14			 (14)
+
+// According to windows application
+#define AVC_DELAY_WEIGHTING_FACTOR		 (0.00000265)               //Delay weighting factor based on Window platform
+
+//Pll types
+typedef enum AVC275X_PLL_TYPE
+{
+    AVC_DAPLL = 0,
+    AVC_SAPLL1,
+    AVC_SAPLL2
+
+}AVC275X_PLL_TYPE;
+
+typedef enum
+{
+    FALSE = 0,
+    TRUE  = 1
+
+}BOOLOP;
+
+typedef unsigned char   UINT8;
+typedef unsigned int    UINT16;
+typedef signed int      INT;
+typedef unsigned long   UINT32;
+
+//Function Prototypes
+UINT16 StartPllAutoCalibration(AVC275X_PLL_TYPE PllType);
+UINT16 StartSdramAutoCalibration(void);
+static UINT16 ConfigureAnalogMacroSettings(void);
+
+#if 0
+// i2c functions for read and write The function should be implemented by <customer> based
+// on the i2c implementation
+/**************************************************************************************/
+BOOLOP AVC275X_i2csend(UINT8 BaseAddr,
+                       UINT8 subAddr,
+                       UINT8 *data,
+                       UINT32 length)
+/**************************************************************************************/
+{
+    //To be filled by customer with appropriate I2C Send function
+    return(TRUE);
+}
+
+/**************************************************************************************/
+BOOLOP AVC275X_i2crecv(UINT8 BaseAddr,
+                       UINT8 subAddr,
+                       UINT8 *data,
+                       UINT32 length)
+/**************************************************************************************/
+{
+    //To be filled by customer with appropriate I2C Receive function
+    return(TRUE);
+}
+#endif
+
+#define AVC275X_i2csend(baseaddr, subaddr, data, length) kg2_i2c_write(baseaddr, subaddr, data, length)
+#define AVC275X_i2crecv(baseaddr, subaddr, data, length) kg2_i2c_read(baseaddr, subaddr, data, length)
+
+/**************************************************************************************/
+void AvcDelay(UINT32 DelayTics)
+/**************************************************************************************/
+{
+    //The delay function is windows specific to be modified as per platform.
+    UINT32 Counter = 0;
+    Counter = (DelayTics/(AVC_DELAY_WEIGHTING_FACTOR));
+    while(Counter > 0)
+    {
+        Counter--;
+    }
+}
+
+/*****************************************************************************
+- Function Name         : StartAutoCalibration
+- Function Parameters   : ClkPllType - decides the fpll type
+- Function Return type  : static AVC_RETURNS
+- Function Description  :
+
+This function sets the VCO range based on input FPLL type.
+******************************************************************************/
+UINT16 StartPllAutoCalibration(AVC275X_PLL_TYPE PllType)
+{
+    UINT8 Value;
+    UINT8 Cnt;
+
+    Value = AVC275X_PLL_PAGE_ID;
+    //Address the 88DE275X page, as all the registers are in the same page addressing of the page will be done only once
+    AVC275X_i2csend(AVC275X_BASE_ADDR, 0x0, &Value, 1);
+
+    if(AVC_DAPLL == PllType)
+    {
+        //Step 1. Power Down the Pll (DAPLL, SAPLL1, SAPLL2)
+        //refer ANA_CTRL7 - [bit 0] for DAPLL,
+        AVC275X_i2crecv(AVC275X_SUB_ADDR, AVC275X_SA_DAPLL_CTRL, &Value, 1);
+        Value |= 0x01;
+        AVC275X_i2csend(AVC275X_SUB_ADDR, AVC275X_SA_DAPLL_CTRL, &Value, 1);
+
+        //Step 2. Power Up the Pll
+        //refer ANA_CTRL7 - [bit 0] for DAPLL,
+        Value = (Value & 0xFE);
+        AVC275X_i2csend(AVC275X_SUB_ADDR, AVC275X_SA_DAPLL_CTRL, &Value, 1);
+
+        //Step 3. Enable VCO Calibration control bit
+        //refer ANA_CTRL8 - [bit 2] for DAPLL
+        AVC275X_i2crecv(AVC275X_SUB_ADDR, AVC275X_SA_DAPLL_VCO_CTRL, &Value, 1);
+        Value = (Value | 0x04);
+        AVC275X_i2csend(AVC275X_SUB_ADDR, AVC275X_SA_DAPLL_VCO_CTRL, &Value, 1);
+
+        //Step 4. Set the KVCO with value starting with 7 and check the VCO Overthreshold status
+        //Test the VCO Overthreshold status as 0 (bit set as Low)
+        //In case the above condition is not satified decrement the KVCO and repeat the above step untill the
+        //the condition is satisfied. KVCO value can be decremented until it becomes 0.
+
+        for(Cnt = 8;Cnt > 0;Cnt--)
+        {
+            //refer ANA_CTRL6 - [bit 2:0] for DAPLL_KVCO
+            Value = Cnt;
+            if(Value >= 1)
+                Value = Value - 1;
+            else
+                Value = 0;
+
+            AVC275X_i2csend(AVC275X_SUB_ADDR, AVC275X_SA_DAPLL_KVCO_CAL_CTRL, &Value, 1);
+
+            //refer ANA_STAT0 - [bit 1] for the VCO Overthreshold indicator status
+            AVC275X_i2crecv(AVC275X_SUB_ADDR, AVC275X_SA_PLL_STATUS, &Value, 1);
+            if(0 == (Value & 0x02))
+                break;
+        }
+
+        //Step 5. After the KVCO calibration is completed, disable the VCO Calibration control bit
+        //refer ANA_CTRL8 - [bit 2] for DAPLL
+        AVC275X_i2crecv(AVC275X_SUB_ADDR, AVC275X_SA_DAPLL_VCO_CTRL, &Value, 1);
+        Value = (Value & 0xFB);
+        AVC275X_i2csend(AVC275X_SUB_ADDR, AVC275X_SA_DAPLL_VCO_CTRL, &Value, 1);
+    }
+    else if(AVC_SAPLL1 == PllType)
+    {
+        //Step 1. Power Down the Pll (DAPLL, SAPLL1, SAPLL2)
+        //refer ANA_CTRL16 - [bit 1] for SAPLL1,
+        AVC275X_i2crecv(AVC275X_SUB_ADDR, AVC275X_SA_SAPLL1_CTRL, &Value, 1);
+        Value |= 0x02;
+        AVC275X_i2csend(AVC275X_SUB_ADDR, AVC275X_SA_SAPLL1_CTRL, &Value, 1);
+
+
+        //Step 2. Power Up the Pll
+        //refer ANA_CTRL16 - [bit 1] for SAPLL1,
+        Value = (Value & 0xFD);
+        AVC275X_i2csend(AVC275X_SUB_ADDR, AVC275X_SA_SAPLL1_CTRL, &Value, 1);
+
+        //Step 3. Enable VCO Calibration control bit
+        //refer ANA_CTRL17 - [bit 2] for DAPLL
+        AVC275X_i2crecv(AVC275X_SUB_ADDR, AVC275X_SA_SAPLL1_VCO_CTRL, &Value, 1);
+        Value = (Value | 0x04);
+        AVC275X_i2csend(AVC275X_SUB_ADDR, AVC275X_SA_SAPLL1_VCO_CTRL, &Value, 1);
+
+        //Step 4. Set the KVCO with value starting with 7 and check the VCO Overthreshold status
+        //Test the VCO Overthreshold status as 0 (bit set as Low)
+        //In case the above condition is not satified decrement the KVCO and repeat the above step untill the
+        //the condition is satisfied. KVCO value can be decremented until it becomes 0.
+
+        for(Cnt = 8;Cnt > 0;Cnt--)
+        {
+            //refer ANA_CTRL14 - [bit 2:0] for DAPLL_KVCO
+            Value = Cnt;
+            if(Value >= 1)
+                Value = Value - 1;
+            else
+                Value = 0;
+
+            AVC275X_i2csend(AVC275X_SUB_ADDR, AVC275X_SA_SAPLL1_KVCO_CAL_CTRL, &Value, 1);
+
+            //refer ANA_STAT0 - [bit 3] for the VCO Overthreshold indicator status
+            AVC275X_i2crecv(AVC275X_SUB_ADDR, AVC275X_SA_PLL_STATUS, &Value, 1);
+            if(0 == (Value & 0x08))
+                    break;
+        }
+
+        //Step 5. After the KVCO calibration is completed, disable the VCO Calibration control bit
+        //refer ANA_CTRL17 - [bit 2] for DAPLL
+        AVC275X_i2crecv(AVC275X_SUB_ADDR, AVC275X_SA_SAPLL1_VCO_CTRL, &Value, 1);
+        Value = (Value & 0xFB);
+        AVC275X_i2csend(AVC275X_SUB_ADDR, AVC275X_SA_SAPLL1_VCO_CTRL, &Value, 1);
+    }
+    else if(AVC_SAPLL2 == PllType)
+    {
+        //Step 1. Power Down the Pll (DAPLL, SAPLL1, SAPLL2)
+        //refer ANA_CTRL25 - [bit 1] for SAPLL1,
+        AVC275X_i2crecv(AVC275X_SUB_ADDR, AVC275X_SA_SAPLL2_CTRL, &Value, 1);
+        Value |= 0x02;
+        AVC275X_i2csend(AVC275X_SUB_ADDR, AVC275X_SA_SAPLL2_CTRL, &Value, 1);
+
+        //Step 2. Power Up the Pll
+        //refer ANA_CTRL25 - [bit 1] for SAPLL1,
+        Value = (Value & 0xFD);
+        AVC275X_i2csend(AVC275X_SUB_ADDR, AVC275X_SA_SAPLL2_CTRL, &Value, 1);
+
+        //Step 3. Enable VCO Calibration control bit
+        //refer ANA_CTRL26 - [bit 2] for DAPLL
+        AVC275X_i2crecv(AVC275X_SUB_ADDR, AVC275X_SA_SAPLL2_VCO_CTRL, &Value, 1);
+        Value = (Value | 0x04);
+        AVC275X_i2csend(AVC275X_SUB_ADDR, AVC275X_SA_SAPLL2_VCO_CTRL, &Value, 1);
+
+        //Step 4. Set the KVCO with value starting with 7 and check the VCO Overthreshold status
+        //Test the VCO Overthreshold status as 0 (bit set as Low)
+        //In case the above condition is not satified decrement the KVCO and repeat the above step untill the
+        //the condition is satisfied. KVCO value can be decremented until it becomes 0.
+
+        for(Cnt = 8;Cnt > 0;Cnt--)
+        {
+            //refer ANA_CTRL23 - [bit 2:0] for DAPLL_KVCO
+            Value = Cnt;
+            if(Value >= 1)
+                Value = Value - 1;
+            else
+                Value = 0;
+
+            AVC275X_i2csend(AVC275X_SUB_ADDR, AVC275X_SA_SAPLL2_KVCO_CAL_CTRL, &Value, 1);
+
+            //refer ANA_STAT0 - [bit 5] for the VCO Overthreshold indicator status
+            AVC275X_i2crecv(AVC275X_SUB_ADDR, AVC275X_SA_PLL_STATUS, &Value, 1);
+            if(0 == (Value & 0x20))
+                    break;
+        }
+
+        //Step 5. After the KVCO calibration is completed, disable the VCO Calibration control bit
+        //refer ANA_CTRL26 - [bit 2] for DAPLL
+        AVC275X_i2crecv(AVC275X_SUB_ADDR, AVC275X_SA_SAPLL2_VCO_CTRL, &Value, 1);
+        Value = (Value & 0xFB);
+        AVC275X_i2csend(AVC275X_SUB_ADDR, AVC275X_SA_SAPLL2_VCO_CTRL, &Value, 1);
+    }
+
+    return 1;
+}
+
+
+/*****************************************************************************
+- Function Name         : StartSdramAutoCalibration
+- Function Parameters   : None
+- Function Return type  : static AVC_RETURNS
+- Function Description  :
+
+This function does SDRAM auto calibration.
+******************************************************************************/
+UINT16 StartSdramAutoCalibration(void)
+{
+    UINT8 index = 0,Value = 0,Cnt = 0;
+    UINT8 Value_L = 0,Value_H = 0;
+    UINT16 CalibVal;
+
+    // These settings are done before SDRAM Auto calibration and before PLL calibration.
+    ConfigureAnalogMacroSettings();
+
+    Value = AVC275X_DDR_PAGE_ID;
+    // Address the 88DE275X page to access DDR Control registers
+    AVC275X_i2csend(AVC275X_BASE_ADDR, 0x0, &Value, 1);
+
+    // Step:1
+    // Make all request monitors to 0 so that there is no activity on DDR pads
+    // refer DDR_REQ_MON0_0 to DDR_REQ_MON6_1
+    for(index = AVC_SDRAM_CLNT_NUM1; index <= AVC_SDRAM_CLNT_NUM14; index++ )
+    {
+        Value = 0x0;
+        AVC275X_i2csend(AVC275X_SUB_ADDR, AVC275X_DDR_REQ_MON + (index - 1), &Value, 1);
+    }
+
+    // DDR phy registers are addressed in different page.
+    Value = AVC275X_DDR_PHY_PAGE_ID;
+    // Change the page address to access DDR Phy registers
+    AVC275X_i2csend(AVC275X_BASE_ADDR, 0x0, &Value, 1);
+
+    // Step:2
+    // Trigger DDR_CAL_TRIG with any value.
+    // refer DDR_CAL_TRIG
+    Value = 0x0;
+    AVC275X_i2csend(AVC275X_SUB_ADDR, AVC275X_DDR_CAL_TRIG, &Value, 1);
+
+    // Wait for 100ms
+    AvcDelay(100);
+
+    // Step:3
+    // Calculate ZPR low and high value.
+    // refer DDR_CALP_L, DDR_CALP_H
+    AVC275X_i2crecv(AVC275X_SUB_ADDR, AVC275X_DDR_CALP_L, &Value_L, 1);
+    AVC275X_i2crecv(AVC275X_SUB_ADDR, AVC275X_DDR_CALP_H, &Value_H, 1);
+
+    // Calibration value is of 16-bits.
+    CalibVal = ((Value_L) | (Value_H << 8));
+
+    // Continue the loop for 16 times and count the number of trailing zeroe's
+    for(index = 0; index < 16; index++)
+    {
+        Value = (CalibVal & 0x1);
+        if(!Value)
+            Cnt++;
+        else
+            break;
+
+        CalibVal >>= 1;
+    }
+
+    // Total trailing zeroes + 1 gives the Zpr value.
+    Value = (Cnt + 1);
+
+    // refer DS_PHY_ZPR_0, DS_PHY_ZPR_1
+    AVC275X_i2csend(AVC275X_SUB_ADDR, AVC275X_DDR_ZPR_0, &Value, 1);
+    AVC275X_i2csend(AVC275X_SUB_ADDR, AVC275X_DDR_ZPR_1, &Value, 1);
+
+    // Set the Same value as ZPR.
+    // refer DS_PHY_ZNR_0, DS_PHY_ZNR_1
+    AVC275X_i2csend(AVC275X_SUB_ADDR, AVC275X_DDR_ZNR_0, &Value, 1);
+    AVC275X_i2csend(AVC275X_SUB_ADDR, AVC275X_DDR_ZNR_1, &Value, 1);
+
+    Value = AVC275X_DDR_PAGE_ID;
+    // Address the 88DE275X page to access DDR Control registers
+    AVC275X_i2csend(AVC275X_BASE_ADDR, 0x0, &Value, 1);
+
+    // Step:5
+    // Enable all the request monitors.
+    // refer DDR_REQ_MON0_0 to DDR_REQ_MON6_1
+    for(index = AVC_SDRAM_CLNT_NUM1; index <= AVC_SDRAM_CLNT_NUM14; index++ )
+    {
+        Value = 0xFF;
+        AVC275X_i2csend(AVC275X_SUB_ADDR, AVC275X_DDR_REQ_MON + (index - 1), &Value, 1);
+    }
+
+    return 1;
+}
+
+
+/*****************************************************************************
+- Function Name         : ConfigureAnalogMacroSettings
+- Function Parameters   : None
+- Function Return type  : static AVC_RETURNS
+- Function Description  :
+
+This function sets the Analog Control registers.
+******************************************************************************/
+static UINT16 ConfigureAnalogMacroSettings(void)
+{
+    UINT8 Value;
+
+    Value = AVC275X_PLL_PAGE_ID;
+    // Address the 88DE275X page, as all the registers are in the same page addressing
+    // of the page will be done only once
+    AVC275X_i2csend(AVC275X_BASE_ADDR, 0x0, &Value, 1);
+
+    AVC275X_i2crecv(AVC275X_SUB_ADDR, AVC275X_SA_PLL_STAT14, &Value, 1);
+
+    // Check the value.
+    if(0x02 == Value)
+    {
+        // If the value is 0x02, set the following Ana_Ctrl settings
+        Value = 0x3C;
+        AVC275X_i2csend(AVC275X_SUB_ADDR,AVC275X_SA_DAPLL_CTRL, &Value, 1);
+
+        Value = 0x05;
+        AVC275X_i2csend(AVC275X_SUB_ADDR,AVC275X_XTAL_AMP_SEL, &Value, 1);
+
+        Value = 0x03;
+        AVC275X_i2csend(AVC275X_SUB_ADDR,AVC275X_DAC_CURRENT_SEL, &Value, 1);
+
+        Value = 0x10;
+        AVC275X_i2csend(AVC275X_SUB_ADDR,AVC275X_XTAL_CTRL, &Value, 1);
+    }
+    else if(0x03 == Value)
+    {
+        // If the value is 0x03, set the following Ana_Ctrl settings
+        Value = 0x1C;
+        AVC275X_i2csend(AVC275X_SUB_ADDR,AVC275X_SA_DAPLL_CTRL, &Value, 1);
+
+        Value = 0x07;
+        AVC275X_i2csend(AVC275X_SUB_ADDR,AVC275X_XTAL_AMP_SEL, &Value, 1);
+
+        Value = 0x03;
+        AVC275X_i2csend(AVC275X_SUB_ADDR,AVC275X_DAC_CURRENT_SEL, &Value, 1);
+
+        Value = 0x9;
+        AVC275X_i2csend(AVC275X_SUB_ADDR,AVC275X_XTAL_CTRL, &Value, 1);
+    }
+    return 1;
+}
+
+
+/******************************************************************************/
+
+#if 0
+//README
+// The order in which these functions to be called.
+
+// Before setting any PLL calibration, set these registers
+1. ConfigureAnalogMacroSettings()
+// First set all the SDRAM registers and its calibration.
+2. StartSdramAutoCalibration()
+// Calibrate the PLL registers.
+3. StartPllAutoCalibration(PllType)
+
+#endif
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/kg2/kg2.c
+++ linux-mvl-dove-2.6.32/drivers/video/display/kg2/kg2.c
@@ -0,0 +1,543 @@
+/*
+ * kg2.c - Linux Driver for Marvell 88DE2750 Digital Video Format Converter
+ */
+
+#include <linux/i2c.h>
+#include <video/kg2.h>
+#include "autocalib.h"
+#include "kg2_i2c.h"
+#include "kg2_netlink.h"
+#include "kg2_regs.h"
+#include "scripts/step1_INIT_part1.h"
+#include "scripts/step2_INIT_part2.h"
+#include "scripts/step3_INIT_IP_Flexiport_RGB24_or_YCbCCr24_for_Dove.h"
+#include "scripts/step4_INIT_OP_Flexiport_RGB24_or_YCbCr24_for_Dove_RG-swap.h"
+#include "scripts/step5_Dove_1024x600_1080P.h"
+#include "scripts/step6_scaler.h"
+
+
+#define I2C_PAGE_WRITE		0x20	// 0x40 while DEV_ADDR_SEL = 1
+#define I2C_PAGE_READ		0x21	// 0x41 while DEV_ADDR_SEL = 1
+#define I2C_REG_WRITE		0x22	// 0x42 while DEV_ADDR_SEL = 1
+#define I2C_REG_READ		0x23	// 0x43 while DEV_ADDR_SEL = 1
+#define TOTAL_PAGE		16	// Total number of pages
+#define TOTAL_OFFSET		256	// Total number of offsets in each page
+
+#if 0
+#define DEBUG				// For detail debug messages
+#endif
+
+
+// Glocal variable definitions
+bool bI2CBusy = false;				// Used to detect I2C bus collision
+unsigned char regCurrentPage = 0xFF;
+extern struct i2c_client * i2c_client_kg2;
+
+// Default input timing parameters
+AVC_CMD_TIMING_PARAM avcInputTiming = {
+	1200,	1024,	38,	100,	AVC_CMD_POLARITY_INVERT,
+	620,	600,	8,	4,	AVC_CMD_POLARITY_NO_INVERT,
+	AVC_CMD_ASP_RATIO_16_9,	1,	60
+};
+
+// Default output timing parameters
+AVC_CMD_TIMING_PARAM avcOutputTiming = {
+	2200,	1920,	88,	44,	AVC_CMD_POLARITY_INVERT,
+	1125,	1080,	4,	5,	AVC_CMD_POLARITY_INVERT,
+	AVC_CMD_ASP_RATIO_16_9,	1,	60
+};
+
+
+static int kg2_i2c_probe(struct i2c_client * client, const struct i2c_device_id * id);
+static int kg2_i2c_remove(struct i2c_client * client);
+static int kg2_i2c_suspend(struct i2c_client * client, pm_message_t msg);
+static int kg2_i2c_resume(struct i2c_client * client);
+
+static const struct i2c_device_id kg2_i2c_id[] = {
+	{"kg2_i2c", 0},
+	{}
+};
+
+static struct i2c_driver kg2_driver = {
+	.driver = {
+		.name  = "kg2_i2c",
+		.owner = THIS_MODULE,
+	},
+	.probe         = kg2_i2c_probe,
+	.remove        = kg2_i2c_remove,
+	.suspend       = kg2_i2c_suspend,
+	.resume        = kg2_i2c_resume,
+	.id_table      = kg2_i2c_id,
+};
+
+
+static int kg2_i2c_probe(struct i2c_client * client,
+                         const struct i2c_device_id * id)
+{
+	printk(KERN_INFO "kg2: probed\n");
+
+	i2c_client_kg2 = client;
+	kg2_genl_register();
+
+	return 0;
+}
+
+static int kg2_i2c_remove(struct i2c_client * client)
+{
+	kg2_genl_unregister();
+	i2c_client_kg2 = NULL;
+
+	return 0;
+}
+
+static int kg2_i2c_suspend(struct i2c_client * client, pm_message_t msg)
+{
+	printk(KERN_DEBUG "kg2: kg2_i2c_suspend\n");
+
+	return 0;
+}
+
+static int kg2_i2c_resume(struct i2c_client * client)
+{
+	printk(KERN_DEBUG "kg2: kg2_i2c_resume\n");
+
+	// Make sure we'll set input timing after resume
+	avcInputTiming.HTotal = 0;
+	avcInputTiming.HActive = 0;
+	avcInputTiming.HFrontPorch = 0;
+	avcInputTiming.HSyncWidth = 0;
+	avcInputTiming.HPolarity = 0;
+	avcInputTiming.VTotal = 0;
+	avcInputTiming.VActive = 0;
+	avcInputTiming.VFrontPorch = 0;
+	avcInputTiming.VSyncWidth = 0;
+	avcInputTiming.VPolarity = 0;
+	avcInputTiming.AspRatio = 0;
+	avcInputTiming.IsProgressive = 0;
+	avcInputTiming.RefRate = 0;
+
+	// Notify KG2 daemon about system resuming
+	printk(KERN_DEBUG "kg2: Notify KG2 daemon that system is resumed\n");
+
+	if (kg2_genl_daemon_pid_available() == false)
+	{
+		printk(KERN_ERR "kg2: Abort - No daemon PID\n");
+		return -EDESTADDRREQ;
+	}
+
+	kg2_genl_system_is_resumed();
+
+	return 0;
+}
+
+int kg2_initialize(void)
+{
+	unsigned char ana_stat0, page, reg;
+
+	printk(KERN_INFO "kg2: Initialize KG2\n");
+
+	if (i2c_client_kg2 == NULL)
+	{
+		printk(KERN_ERR "kg2: Abort - Not an i2c client\n");
+		return -1;
+	}
+
+	bI2CBusy = true;
+
+	// Run script - step1_INIT_part1
+	printk(KERN_INFO "kg2: Run script    - INIT_Part1\n");
+	if (kg2_run_script(step1_INIT_part1, step1_INIT_part1_Count) < 0)
+	{
+		bI2CBusy = false;
+		return -1;
+	}
+
+	// Wait until SSPLL is locked (ANA_STAT0 - bit 6, 0xF41)
+	printk(KERN_INFO "kg2: Check status  - SSPLL");
+	page = 0x0F;
+	reg = 0x41;
+
+	if (kg2_i2c_write(I2C_PAGE_WRITE, 0x00, &page, sizeof(page)) == 0)
+	{
+		do
+		{
+			if (kg2_i2c_read(I2C_REG_READ, reg, &ana_stat0, sizeof(ana_stat0)) < 0)
+			{
+				goto ABORT_SSPLL_CHECK;
+			}
+		}
+		while ((ana_stat0 & 0x40) == 0);
+	}
+
+ABORT_SSPLL_CHECK:
+
+	// Run script - step2_INIT_part2.h
+	printk(KERN_INFO "kg2: Run script    - INIT_Part2\n");
+	if (kg2_run_script(step2_INIT_part2, step2_INIT_part2_Count) < 0)
+	{
+		bI2CBusy = false;
+		return -1;
+	}
+
+	// Run script - step3_INIT_IP_Flexiport_RGB24_or_YCbCCr24_for_Dove.h
+	printk(KERN_INFO "kg2: Run script    - INIT_IP_Flexiport\n");
+	if (kg2_run_script(step3_INIT_IP_Flexiport_RGB24_or_YCbCCr24_for_Dove,
+	                   step3_INIT_IP_Flexiport_RGB24_or_YCbCCr24_for_Dove_Count) < 0)
+	{
+		bI2CBusy = false;
+		return -1;
+	}
+
+	// Run script - step4_INIT_OP_Flexiport_RGB24_or_YCbCr24_for_Dove_RG-swap.h
+	printk(KERN_INFO "kg2: Run script    - INIT_OP_Flexiport\n");
+	if (kg2_run_script(step4_INIT_OP_Flexiport_RGB24_or_YCbCr24_for_Dove_RG_swap,
+	                   step4_INIT_OP_Flexiport_RGB24_or_YCbCr24_for_Dove_RG_swap_Count) < 0)
+	{
+		bI2CBusy = false;
+		return -1;
+	}
+
+	// Autocalibrate DDR2's drive strength
+	printk(KERN_INFO "kg2: Autocalibrate - SDRAM\n");
+	if (StartSdramAutoCalibration() != 1)
+	{
+		printk(KERN_ERR "kg2: Failed to do autocalibration.\n");
+	}
+
+	// Autocalibrate DAPLL
+	printk(KERN_INFO "kg2: Autocalibrate - DAPLL\n");
+	if (StartPllAutoCalibration(AVC_DAPLL) != 1)
+	{
+		printk(KERN_ERR "kg2: Failed to do autocalibration.\n");
+	}
+
+	// Run script - step5_Dove_1024x600_1080P.h
+	printk(KERN_INFO "kg2: Run script    - IP_1024x600_OP_1080P\n");
+	if (kg2_run_script(step5_Dove_1024x600_1080P,
+	                   step5_Dove_1024x600_1080P_Count) < 0)
+	{
+		bI2CBusy = false;
+		return -1;
+	}
+
+	// Autocalibrate SAPLL2
+	printk(KERN_INFO "kg2: Autocalibrate - SAPLL2\n");
+	if (StartPllAutoCalibration(AVC_SAPLL2) != 1)
+	{
+		printk(KERN_ERR "kg2: Failed to do autocalibration.\n");
+	}
+
+	// Run script - step6_scaler.h
+	printk(KERN_INFO "kg2: Run script    - Scaler\n");
+	if (kg2_run_script(step6_scaler,
+	                   step6_scaler_Count) < 0)
+	{
+		bI2CBusy = false;
+		return -1;
+	}
+
+	bI2CBusy = false;
+	return 0;
+}
+
+int kg2_set_input_timing(AVC_CMD_TIMING_PARAM * timing)
+{
+	printk(KERN_INFO "kg2: Set input timing (%dx%d%s%d)\n",
+	       timing->HActive,
+	       timing->VActive,
+	       (timing->IsProgressive == 1)? "p": "i",
+	       timing->RefRate);
+
+#ifdef DEBUG
+	printk(KERN_DEBUG "kg2: Ht: %5d, Ha: %5d, Hfp:%5d, Hsw:%5d, Hsp: %d\n",
+               timing->HTotal, timing->HActive, timing->HFrontPorch, timing->HSyncWidth, timing->HPolarity);
+	printk(KERN_DEBUG "kg2: Vt: %5d, Va: %5d, Vfp:%5d, Vsw:%5d, Vsp: %d\n",
+               timing->VTotal, timing->VActive, timing->VFrontPorch, timing->VSyncWidth, timing->VPolarity);
+	printk(KERN_DEBUG "kg2: AR: %5d, Pr: %5d, Rt: %5d\n",
+               timing->AspRatio, timing->IsProgressive, timing->RefRate);
+#endif
+
+	// Error handling
+	if (i2c_client_kg2 == NULL)
+	{
+		printk(KERN_ERR "kg2: Abort - Not an i2c client\n");
+		return -1;
+	}
+
+	if (kg2_genl_daemon_pid_available() == false)
+	{
+		printk(KERN_WARNING "kg2: Abort - No daemon PID\n");
+		return -EDESTADDRREQ;
+	}
+#if 0
+	// This is added temporarily, because it seems changing timing too 
+	// quickly in a short time will cause unstable HDMI output
+	if (timing->VPolarity == 1)
+	{
+		printk(KERN_INFO "kg2: Skip - Vsp: 1\n");
+		return 0;
+	}
+#endif
+	// Prevent re-sending the same parameters
+	if ((timing->HTotal == avcInputTiming.HTotal) &&
+	    (timing->HActive == avcInputTiming.HActive) &&
+	    (timing->HFrontPorch == avcInputTiming.HFrontPorch) &&
+	    (timing->HSyncWidth == avcInputTiming.HSyncWidth) &&
+	    (timing->HPolarity == avcInputTiming.HPolarity) &&
+	    (timing->VTotal == avcInputTiming.VTotal) &&
+	    (timing->VActive == avcInputTiming.VActive) &&
+	    (timing->VFrontPorch == avcInputTiming.VFrontPorch) &&
+	    (timing->VSyncWidth == avcInputTiming.VSyncWidth) &&
+	    (timing->VPolarity == avcInputTiming.VPolarity) &&
+	    (timing->AspRatio == avcInputTiming.AspRatio) &&
+	    (timing->IsProgressive == avcInputTiming.IsProgressive) &&
+	    (timing->RefRate == avcInputTiming.RefRate))
+	{
+		printk(KERN_INFO "kg2: Skip - No change\n");
+		return 0;
+	}
+
+	kg2_genl_set_input_timing(timing);
+
+	// Keep the last setting
+	avcInputTiming.HTotal = timing->HTotal;
+	avcInputTiming.HActive = timing->HActive;
+	avcInputTiming.HFrontPorch = timing->HFrontPorch;
+	avcInputTiming.HSyncWidth = timing->HSyncWidth;
+	avcInputTiming.HPolarity = timing->HPolarity;
+	avcInputTiming.VTotal = timing->VTotal;
+	avcInputTiming.VActive = timing->VActive;
+	avcInputTiming.VFrontPorch = timing->VFrontPorch;
+	avcInputTiming.VSyncWidth = timing->VSyncWidth;
+	avcInputTiming.VPolarity = timing->VPolarity;
+	avcInputTiming.AspRatio = timing->AspRatio;
+	avcInputTiming.IsProgressive = timing->IsProgressive;
+	avcInputTiming.RefRate = timing->RefRate;
+#if 0
+	unsigned char			len, page, reg, * data;
+	unsigned short			dht;
+	HWI_FLEXIPORT_PIN_CONTROL_BITS	regFlexiPort = {{0x00}, 0x00, 0x00};
+	HWI_FE_CHANNEL_REG		regFrontEnd;
+
+	if (i2c_client_kg2 == NULL) {
+		pr_info("No KG2 device found\n");
+		return -1;
+	}
+
+	printk(KERN_INFO "Set KG2 input timing\n");
+
+	// Log if KG2 is accessed by two or more drivers simultaneously
+	if (bI2CBusy == true)
+	{
+		printk(KERN_ERR "KG2 is still under access\n");
+		return -1;
+	}
+
+	bI2CBusy = true;
+
+	if (timing != NULL)
+	{
+		avcInputTiming = *timing;
+	}
+
+	printk(KERN_INFO "Ht:%5d, Ha:%5d, Hfp:%5d, Hsw:%5d, Hsp: %d\n",
+	         avcInputTiming.HTotal, avcInputTiming.HActive, avcInputTiming.HFrontPorch, avcInputTiming.HSyncWidth, avcInputTiming.HPolarity);
+	printk(KERN_INFO "Vt:%5d, Va:%5d, Vfp:%5d, Vsw:%5d, Vsp: %d\n",
+	         avcInputTiming.VTotal, avcInputTiming.VActive, avcInputTiming.VFrontPorch, avcInputTiming.VSyncWidth, avcInputTiming.VPolarity);
+
+	// Calculate the values of the active window coordinates
+	regFlexiPort.MiscInputControl.PolarityInversionforHSync	= avcInputTiming.HPolarity;
+	regFlexiPort.MiscInputControl.PolarityInversionforVSync	= avcInputTiming.VPolarity;
+	regFrontEnd.FeDcStrX.Value				= avcInputTiming.HTotal - avcInputTiming.HActive - avcInputTiming.HFrontPorch;
+	regFrontEnd.FeDcStrY.Value				= avcInputTiming.VTotal - avcInputTiming.VActive - avcInputTiming.VFrontPorch;
+	regFrontEnd.FeDcEndX.Value				= regFrontEnd.FeDcStrX.Value + avcInputTiming.HActive;
+	regFrontEnd.FeDcEndY.Value				= regFrontEnd.FeDcStrY.Value + avcInputTiming.VActive;
+	regFrontEnd.FeDcFrst					= (avcInputTiming.VTotal - avcInputTiming.VActive) / 2;
+	regFrontEnd.FeDcLrst.Value				= (avcInputTiming.HTotal - avcInputTiming.HActive - avcInputTiming.HSyncWidth) / 4;
+	dht							= avcInputTiming.HSyncWidth + avcInputTiming.HFrontPorch;
+	regFrontEnd.FeDeltaHtot					= (dht > 0xFF) ? (0xFF) : dht;
+
+	printk(KERN_DEBUG "PolarityInversionforHSync: %d\n", regFlexiPort.MiscInputControl.PolarityInversionforHSync);
+	printk(KERN_DEBUG "PolarityInversionforVSync: %d\n", regFlexiPort.MiscInputControl.PolarityInversionforVSync);
+	printk(KERN_DEBUG "FeDcStrX: %d\n", regFrontEnd.FeDcStrX.Value);
+	printk(KERN_DEBUG "FeDcStrY: %d\n", regFrontEnd.FeDcStrY.Value);
+	printk(KERN_DEBUG "FeDcEndX: %d\n", regFrontEnd.FeDcEndX.Value);
+	printk(KERN_DEBUG "FeDcEndY: %d\n", regFrontEnd.FeDcEndY.Value);
+	printk(KERN_DEBUG "FeDcFrst: %d\n", regFrontEnd.FeDcFrst);
+	printk(KERN_DEBUG "FeDcLrst: %d\n", regFrontEnd.FeDcLrst.Value);
+	printk(KERN_DEBUG "FeDeltaHtot: %d\n", regFrontEnd.FeDeltaHtot);
+
+	// Change KG2 register page if needed
+	page = (unsigned char) (REG_PINH >> 8);
+
+	if (regCurrentPage != page)
+	{
+		if (kg2_i2c_write(I2C_PAGE_WRITE, 0x00, &page, 1) < 0)
+		{
+			bI2CBusy = false;
+			return -1;
+		}
+
+		regCurrentPage = page;
+	}
+
+	// Write to KG2 registers (0x0D7)
+	reg  = (unsigned char) (REG_PINH & 0xFF);
+	data = (unsigned char *) &regFlexiPort.MiscInputControl;
+	len  = (unsigned short) ((void *) &regFlexiPort.CCIR656Control - (void *) &regFlexiPort.MiscInputControl);
+
+	if (kg2_i2c_write(I2C_REG_WRITE, reg, data, len) < 0)
+	{
+		bI2CBusy = false;
+		return -1;
+	}
+
+	// Change KG2 register page if needed
+	page = (unsigned char) (REG_FE >> 8);
+
+	if (regCurrentPage != page)
+	{
+		if (kg2_i2c_write(I2C_PAGE_WRITE, 0x00, &page, 1) < 0)
+		{
+			bI2CBusy = false;
+			return -1;
+		}
+
+		regCurrentPage = page;
+	}
+
+	// Write to KG2 registers (0x100 ~ 0x107)
+	reg  = (unsigned char) (REG_FE & 0xFF);
+	data = (unsigned char *) &regFrontEnd.FeDcStrX;
+	len  = (unsigned short) ((void *) &regFrontEnd.FeDcVSamp - (void *) &regFrontEnd.FeDcStrX);
+
+	if (kg2_i2c_write(I2C_REG_WRITE, reg, data, len) < 0)
+	{
+		bI2CBusy = false;
+		return -1;
+	}
+
+	// Write to KG2 registers (0x157 ~ 0x159)
+	reg  = (unsigned char) ((REG_FE & 0xFF) + ((void *) &regFrontEnd.FeDcFrst - (void *) &regFrontEnd));
+	data = (unsigned char *) &regFrontEnd.FeDcFrst;
+	len  = (unsigned short) ((void *) &regFrontEnd.FeDcTgLoadFlg - (void *) &regFrontEnd.FeDcFrst);
+
+	if (kg2_i2c_write(I2C_REG_WRITE, reg, data, len) < 0)
+	{
+		bI2CBusy = false;
+		return -1;
+	}
+
+	// Write to KG2 registers (0x15E)
+	reg  = (unsigned char) ((REG_FE & 0xFF) + ((void *) &regFrontEnd.FeDeltaHtot - (void *) &regFrontEnd));
+	data = (unsigned char *) &regFrontEnd.FeDeltaHtot;
+	len  = (unsigned short) ((void *) &regFrontEnd.Unused2 - (void *) &regFrontEnd.FeDeltaHtot);
+
+	if (kg2_i2c_write(I2C_REG_WRITE, reg, data, len) < 0)
+	{
+		bI2CBusy = false;
+		return -1;
+	}
+
+	bI2CBusy = false;
+#endif
+
+	return 0;
+}
+
+int kg2_set_output_timing(AVC_CMD_TIMING_PARAM * timing)
+{
+	printk(KERN_INFO "kg2: Set output timing (%dx%d%s%d)\n",
+	       timing->HActive,
+	       (timing->IsProgressive > 0) ? (timing->VActive) : (timing->VActive * 2),
+	       (timing->IsProgressive > 0) ? "p" : "i",
+	       timing->RefRate);
+
+#ifdef DEBUG
+	printk(KERN_DEBUG "kg2: Ht: %5d, Ha: %5d, Hfp:%5d, Hsw:%5d, Hsp: %d\n",
+               timing->HTotal, timing->HActive, timing->HFrontPorch, timing->HSyncWidth, timing->HPolarity);
+	printk(KERN_DEBUG "kg2: Vt: %5d, Va: %5d, Vfp:%5d, Vsw:%5d, Vsp: %d\n",
+               timing->VTotal, timing->VActive, timing->VFrontPorch, timing->VSyncWidth, timing->VPolarity);
+	printk(KERN_DEBUG "kg2: AR: %5d, Pr: %5d, Rt: %5d\n",
+               timing->AspRatio, timing->IsProgressive, timing->RefRate);
+#endif
+
+	// Error handling
+	if (i2c_client_kg2 == NULL)
+	{
+		printk(KERN_ERR "kg2: Abort - Not an i2c client\n");
+		return -1;
+	}
+
+	if (kg2_genl_daemon_pid_available() == false)
+	{
+		printk(KERN_WARNING "kg2: Abort - No daemon PID\n");
+		return -EDESTADDRREQ;
+	}
+
+	// Prevent re-sending the same parameters
+	if ((timing->HActive == avcOutputTiming.HActive) &&
+	    (timing->VActive == avcOutputTiming.VActive) &&
+	    (timing->IsProgressive == avcOutputTiming.IsProgressive) &&
+	    (timing->RefRate == avcOutputTiming.RefRate))
+	{
+		printk(KERN_INFO "kg2: Skip - No change\n");
+		return 0;
+	}
+
+	kg2_genl_set_output_timing(timing);
+
+	// Keep the last setting
+	avcOutputTiming.HActive = timing->HActive;
+	avcOutputTiming.VActive = timing->VActive;
+	avcOutputTiming.IsProgressive = timing->IsProgressive;
+	avcOutputTiming.RefRate = timing->RefRate;
+
+	return 0;
+}
+
+/*-----------------------------------------------------------------------------
+ * Description : Run KG2 script
+ * Parameters  : array - The i2c array to be sent, contained in .h script file
+ *               count - i2c array element count, contained in .h script file
+ * Return Type : =0 - Success
+ *               <0 - Fail
+ *-----------------------------------------------------------------------------
+ */
+
+int kg2_run_script(const unsigned char * array, int count)
+{
+	const unsigned char * pArr = array;
+	int i;
+
+	for (i = 0; i < count;)
+	{
+		if (kg2_i2c_write(pArr[1], pArr[2], &pArr[3], pArr[0]) < 0)
+		{
+			return -1;
+		}
+
+		i += pArr[0] + 3;
+		pArr += pArr[0] + 3;
+	}
+
+	return 0;
+}
+
+static int __init dove_kg2_init(void)
+{
+	return i2c_add_driver(&kg2_driver);
+}
+
+static void __exit dove_kg2_exit(void)
+{
+	i2c_del_driver(&kg2_driver);
+}
+
+module_init(dove_kg2_init);
+module_exit(dove_kg2_exit);
+
+MODULE_AUTHOR("Marvell");
+MODULE_DESCRIPTION("Kyoto G2 driver");
+MODULE_DEVICE_TABLE(i2c, kg2_i2c_id);
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/kg2/kg2_i2c.h
+++ linux-mvl-dove-2.6.32/drivers/video/display/kg2/kg2_i2c.h
@@ -0,0 +1,13 @@
+/*
+ * kg2_i2c.h - Linux Driver for Marvell 88DE2750 Digital Video Format Converter
+ */
+
+#ifndef __KG2_I2C_H__
+#define __KG2_I2C_H__
+
+
+int kg2_i2c_read(unsigned char baseaddr, unsigned char subaddr, unsigned char * data, unsigned short dataLen);
+int kg2_i2c_write(unsigned char baseaddr, unsigned char subaddr, const unsigned char * data, unsigned short dataLen);
+
+
+#endif
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/kg2/kg2_regs.h
+++ linux-mvl-dove-2.6.32/drivers/video/display/kg2/kg2_regs.h
@@ -0,0 +1,119 @@
+/*
+ * kg2_regs.h - Linux Driver for Marvell 88DE2750 Digital Video Format Converter
+ */
+
+#ifndef __KG2_REGS_H__
+#define __KG2_REGS_H__
+
+
+typedef enum tagKG2_REG_BASE_TYPE
+{
+	REG_FPLL	= 0x000,	// Clock Control and FPLL Register						0x000 ~ 0x05C
+	REG_PAT		= 0x080,	// Flexiport									0x080 ~ 0x0AA
+	REG_IP		= 0x0B0,	// Flexiport									0x0B0 ~ 0x0D6
+	REG_PINH	= 0x0D7,	// Flexiport									0x0D7 ~ 0x0D9
+	REG_FE		= 0x100,	// Frontend									0x100 ~ 0x162
+	REG_FE_DI	= 0x170,	// Frontend - Data Instrumentation						0x170 ~ 0x1DF
+	REG_VNR		= 0x200,	// Video Noise Reducer								0x200 ~ 0x229
+	REG_CAR		= 0x235,	// Compression Artifact Reducer (CAR)						0x235 ~ 0x23C, 0x280 ~ 0x2C8
+	REG_VP		= 0x2F2,	// Video Processor								0x2F2 ~ 0x2F7
+	REG_DIN		= 0x300,	// Deinterlacer									0x300 ~ 0x3B1
+	REG_DET		= 0x3E0,	// Edge Enhancement								0x3E0 ~ 0x3FA
+	REG_DDR		= 0x400,	// SDRam Subsystem								0x400 ~ 0x4BA
+	REG_DDR_PHY	= 0x500,	// SDRam PHY Registers								0x500 ~ 0x5CD
+	REG_FRC_MAIN	= 0x600,	// Scaler and Frame Rate Conversion						0x600 ~ 0x62D
+	REG_SCL_MAIN	= 0x660,	// Scaler and Frame Rate Conversion						0x660 ~ 0x6A5
+	REG_FRC_DET	= 0x700,	// Scaler and Frame Rate Conversion						0x700 ~ 0x72D
+	REG_SCL_DET	= 0x760,	// Scaler and Frame Rate Conversion						0x760 ~ 0x7A5
+	REG_CPCB_ICSC	= 0x800,	// Color Management Unit - Input Color Space Converter				0x800 ~ 0x81E
+	REG_CPCB_ACE	= 0x820,	// Color Management Unit - Adaptive Contrast Enhancement (ACE)			0x820 ~ 0x83F
+	REG_CMU_FTDC	= 0x840,	// Color Management Unit - Intelligent Color Remapper - FTDC			0x840 ~ 0x887
+	REG_CMU_GCSC	= 0x8A0,	// Color Management Unit - Global Color Space Converter and Gamut Compression	0x8A0 ~ 0x8E0
+	REG_CMU_GAMMA	= 0x8F0,	// Gamma									0x8F0 ~ 0x8F9
+	REG_CMU_HS	= 0x900,	// Color Management Unit - Intelligent Color Remapper - Hue/Sat			0x900 ~ 0x950
+	REG_QTC		= 0x980,	// Qdeo True Color (QTC)							0x980 ~ 0x986
+	REG_BE		= 0xA00,	// BE Timing Generator								0xA00 ~ 0xA3F, 0xA43, 0xAA0 ~ 0xAA7
+	REG_EE		= 0xA40,	// Edge Enhancement - LTI, CTI							0xA40 ~ 0xA42
+	REG_BE_FGG	= 0xA48,	// Film Grain Generator								0xA48 ~ 0xA4F
+	REG_BE_INT	= 0xA50,	// Interlacer									0xA50 ~ 0xA79
+	REG_BE_DNS	= 0xA44,	// Overlay									0xA44 ~ 0xA45, 0xA90 ~ 0xA9A
+	REG_NEST	= 0xB00,	// Noise Estimator (NEST)							0xB00 ~ 0xB77
+	REG_OP		= 0xD00,	// Output Formatter								0xD00 ~ 0xD2D
+	REG_ANA		= 0xF00,	// Analog (Analog Macro Control Registers)					0xF00 ~ 0xF4F
+} KG2_REG_BASE;
+
+
+// Adapted from "88DE2750/sdk/2750_core/private/88DE2750/avc/ddr/bdr/pinselection/src/hwipinselection.h" +
+
+struct tagHWI_MISC_CONTROL_FOR_FLEXIPORT
+{
+	unsigned char PolarityControlforPin0Clock	: 1;
+	unsigned char PolarityControlforPin1Clock	: 1;
+	unsigned char InputStreamSelection		: 1;
+	unsigned char SourceSelection			: 1;
+	unsigned char PolarityInversionforHSync		: 1;
+	unsigned char PolarityInversionforVSync		: 1;
+	unsigned char PolarityInversionforField		: 1;
+	unsigned char Reserved				: 1;
+};
+
+typedef struct tagHWI_MISC_CONTROL_FOR_FLEXIPORT HWI_MISC_CONTROL_FOR_FLEXIPORT;
+
+typedef struct tagHWI_FLEXIPORT_PIN_CONTROL_BITS
+{
+	HWI_MISC_CONTROL_FOR_FLEXIPORT		MiscInputControl;				// PINH_CTRL0		0x0D7	 8-bits
+	unsigned char				CCIR656Control;					// PINH_CTRL1		0x0D8	 8-bits
+	unsigned char				BT1120Control;					// PINH_CTRL2		0x0D9	 8-bits
+
+} HWI_FLEXIPORT_PIN_CONTROL_BITS;
+
+// Adapted from "88DE2750/sdk/2750_core/private/88DE2750/avc/ddr/bdr/pinselection/src/hwipinselection.h" -
+
+// Adapted from "88DE2750/sdk/2750_core/private/88DE2750/avc/ddr/bdr/datachannel/src/hwidatachannel.h" +
+
+/*This macro defines number of color coefficients in case of front end
+color conversion*/
+#define MAX_SIZE_COL_COEFF_CHNL        (9)
+
+/*This macro defines number of color offsets in case of front end
+color conversion*/
+#define MAX_SIZE_COL_OFFSET_CHNL       (3)
+
+/*This structure defines data type,which will represnt 12 bit registers*/
+struct tagHWI_DC_REG_12BIT_TYPE
+{
+	unsigned short Value	: 12;
+	unsigned short Reserved	: 4;
+};
+
+typedef struct tagHWI_DC_REG_12BIT_TYPE HWI_DC_REG_12BIT_TYPE;
+
+typedef struct tagHWI_FE_CHANNEL_REG
+{
+	HWI_DC_REG_12BIT_TYPE			FeDcStrX;					// FE_STR_X		0x100	12-bits
+	HWI_DC_REG_12BIT_TYPE			FeDcStrY;					// FE_STR_Y		0x102	12-bits
+	HWI_DC_REG_12BIT_TYPE			FeDcEndX;					// FE_END_X		0x104	12-bits
+	HWI_DC_REG_12BIT_TYPE			FeDcEndY;					// FE_END_Y		0x106	12-bits
+	HWI_DC_REG_12BIT_TYPE			FeDcVSamp;					// FE_VSAMP		0x108	12-bits
+	unsigned short				FeDcColCoeff[MAX_SIZE_COL_COEFF_CHNL];		// FE_C0 ~ FE_C8	0x10A	14-bits for each
+	unsigned short 				FeDcColOffset[MAX_SIZE_COL_OFFSET_CHNL];	// FE_A0 ~ FE_A2	0x11C	16-bits for each
+	unsigned char				FeDcCntrl;					// FE_CTRL1		0x122	 8-bits
+	unsigned char				FeDcYbl;					// FE_YBLK		0x123	 8-bits
+	unsigned char				FeDcCbl;					// FE_CBLK		0x124	 8-bits
+	unsigned char				Unused1[49];
+	unsigned char				FeDcSyncRef;					// FE_SYNCREF		0x156	 7-bits
+	unsigned char				FeDcFrst;					// FE_FRST		0x157	 8-bits
+	HWI_DC_REG_12BIT_TYPE			FeDcLrst;					// FE_LRST		0x158	12-bits
+	unsigned char				FeDcTgLoadFlg;					// FE_TG_LOAD		0x15A	 1-bit
+	unsigned char				FeDcTgDbCtrl;					// FE_TG_DB_CTRL	0x15B	 1-bit
+	unsigned short				FeDcDelCtrl;					// FE_DEL_BL		0x15C	16-bits
+	unsigned char				FeDeltaHtot;					// FE_DHT		0x15E	 8-bits
+	unsigned char 				Unused2[2];
+	unsigned char				FeDithCtrl;					// FE_DIT_CTRL		0x161	 1-bit
+	unsigned char				FeDithRes;					// FE_DIT_RES		0x162	 8-bits
+} HWI_FE_CHANNEL_REG;
+
+// Adapted from "88DE2750/sdk/2750_core/private/88DE2750/avc/ddr/bdr/datachannel/src/hwidatachannel.h" -
+
+
+#endif
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/kg2/Makefile
+++ linux-mvl-dove-2.6.32/drivers/video/display/kg2/Makefile
@@ -0,0 +1,4 @@
+obj-$(CONFIG_KG2_ANX7150) += kg2_i2c.o
+obj-$(CONFIG_KG2_ANX7150) += autocalib.o
+obj-$(CONFIG_KG2_ANX7150) += kg2_netlink.o
+obj-$(CONFIG_KG2_ANX7150) += kg2.o
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/kg2/autocalib.h
+++ linux-mvl-dove-2.6.32/drivers/video/display/kg2/autocalib.h
@@ -0,0 +1,48 @@
+/*******************************************************************************
+*                Copyright 2008, MARVELL SEMICONDUCTOR, LTD.                   *
+* THIS CODE CONTAINS CONFIDENTIAL INFORMATION OF MARVELL.                      *
+* NO RIGHTS ARE GRANTED HEREIN UNDER ANY PATENT, MASK WORK RIGHT OR COPYRIGHT  *
+* OF MARVELL OR ANY THIRD PARTY. MARVELL RESERVES THE RIGHT AT ITS SOLE        *
+* DISCRETION TO REQUEST THAT THIS CODE BE IMMEDIATELY RETURNED TO MARVELL.     *
+* THIS CODE IS PROVIDED "AS IS". MARVELL MAKES NO WARRANTIES, EXPRESSED,       *
+* IMPLIED OR OTHERWISE, REGARDING ITS ACCURACY, COMPLETENESS OR PERFORMANCE.   *
+*                                                                              *
+* MARVELL COMPRISES MARVELL TECHNOLOGY GROUP LTD. (MTGL) AND ITS SUBSIDIARIES, *
+* MARVELL INTERNATIONAL LTD. (MIL), MARVELL TECHNOLOGY, INC. (MTI), MARVELL    *
+* SEMICONDUCTOR, INC. (MSI), MARVELL ASIA PTE LTD. (MAPL), MARVELL JAPAN K.K.  *
+* (MJKK), MARVELL ISRAEL LTD. (MSIL). MARVELL INDIA PVT LTD (MIPL)             *
+*******************************************************************************/
+
+//Pll types
+typedef enum AVC275X_PLL_TYPE
+{
+    AVC_DAPLL = 0,
+    AVC_SAPLL1,
+    AVC_SAPLL2
+
+}AVC275X_PLL_TYPE;
+
+typedef unsigned char   UINT8;
+typedef unsigned int    UINT16;
+typedef signed int      INT;
+typedef unsigned long   UINT32;
+
+//Function Prototypes
+UINT16 StartPllAutoCalibration(AVC275X_PLL_TYPE PllType);
+UINT16 StartSdramAutoCalibration(void);
+
+
+/******************************************************************************/
+
+#if 0
+//README
+// The order in which these functions to be called.
+
+// Before setting any PLL calibration, set these registers
+1. ConfigureAnalogMacroSettings()
+// First set all the SDRAM registers and its calibration.
+2. StartSdramAutoCalibration()
+// Calibrate the PLL registers.
+3. StartPllAutoCalibration(PllType)
+
+#endif
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/kg2/kg2_i2c.c
+++ linux-mvl-dove-2.6.32/drivers/video/display/kg2/kg2_i2c.c
@@ -0,0 +1,147 @@
+/*
+ * kg2_i2c.c - Linux Driver for Marvell 88DE2750 Digital Video Format Converter
+ */
+
+#include <linux/i2c.h>
+#include "kg2_i2c.h"
+
+#define DBG_I2C_DATA_PER_LINE   16
+#define DBG_I2C_LENGTH_PER_DATA 3
+#define DBG_I2C_LENGTH_PER_LINE (DBG_I2C_DATA_PER_LINE * DBG_I2C_LENGTH_PER_DATA + 1)
+//#define DEBUG				// For detail debug messages, including I2C write operations
+
+
+struct i2c_client * i2c_client_kg2 = NULL;
+
+
+/*-----------------------------------------------------------------------------
+ * Description : Read data from KG2 via I2C bus
+ * Parameters  : baseaddr - Page/Register access (0x21/0x23 or 0x41/0x43)
+ *               subaddr  - Page access: 0x00, Register access: register offset
+ *               data     - Page access: page number, Register access: data
+ *               dataLen  - Length of data
+ * Return Type : =0 - Success
+ *               <0 - Fail
+ *-----------------------------------------------------------------------------
+ */
+
+int kg2_i2c_read(unsigned char baseaddr, unsigned char subaddr,
+                 unsigned char * data, unsigned short dataLen)
+{
+#if defined(DEBUG)
+	char input[DBG_I2C_LENGTH_PER_LINE];
+	int count = 0;
+#endif
+	unsigned short i = 0;
+	int result = 0;
+
+	for (i = 0; i < dataLen; i++)
+	{
+		i2c_client_kg2->addr = baseaddr >> 1;
+		result = i2c_smbus_read_byte_data(i2c_client_kg2,
+		                                  subaddr + i);
+		if (result < 0)
+		{
+			printk(KERN_ERR
+			       "Failed to read data via i2c. (baseaddr: 0x%02X, subaddr: 0x%02X)\n",
+			       baseaddr, subaddr + i);
+
+			return -1;
+		}
+
+		data[i] = (unsigned char) result;
+
+#if defined(DEBUG)
+		count += snprintf(input + count,
+		                  DBG_I2C_LENGTH_PER_LINE - count,
+		                  " %02X",
+		                  data[i]);
+
+		if ((i == (dataLen - 1)) || (i % DBG_I2C_DATA_PER_LINE == (DBG_I2C_DATA_PER_LINE - 1)))
+		{
+			if (i < DBG_I2C_DATA_PER_LINE)
+			{
+				dev_info(&i2c_client_kg2->dev,
+				         "R - %02X %02X%s\n",
+				         baseaddr, subaddr, input);
+			}
+			else
+			{
+				dev_info(&i2c_client_kg2->dev,
+				         "         %s\n",
+				         input);
+			}
+
+			count = 0;
+		}
+#endif
+	}
+
+	return 0;
+}
+
+/*-----------------------------------------------------------------------------
+ * Description : Write data to KG2 via I2C bus
+ * Parameters  : baseaddr - Page/Register access (0x20/0x22 or 0x40/0x42)
+ *               subaddr  - Page access: 0x00, Register access: register offset
+ *               data     - Page access: page number, Register access: data
+ *               dataLen  - Length of data
+ * Return Type : =0 - Success
+ *               <0 - Fail
+ *-----------------------------------------------------------------------------
+ */
+
+int kg2_i2c_write(unsigned char baseaddr, unsigned char subaddr,
+                  const unsigned char * data, unsigned short dataLen)
+{
+#if defined(DEBUG)
+	char output[DBG_I2C_LENGTH_PER_LINE];
+	int count = 0;
+#endif
+	unsigned short i = 0;
+	int result = 0;
+
+	for (i = 0; i < dataLen; i++)
+	{
+		i2c_client_kg2->addr = baseaddr >> 1;
+		result = i2c_smbus_write_byte_data(i2c_client_kg2,
+		                                   subaddr + i,
+		                                   data[i]);
+		if (result < 0)
+		{
+			printk(KERN_ERR
+			       "Failed to write data via i2c. (baseaddr: 0x%02X, subaddr: 0x%02X, data: 0x%02X)\n",
+			       baseaddr, subaddr + i, data[i]);
+
+			return -1;
+		}
+
+#if defined(DEBUG)
+		count += snprintf(output + count,
+		                  DBG_I2C_LENGTH_PER_LINE - count,
+		                  " %02X",
+		                  data[i]);
+
+		if ((i == (dataLen - 1)) || (i % DBG_I2C_DATA_PER_LINE == (DBG_I2C_DATA_PER_LINE - 1)))
+		{
+			if (i < DBG_I2C_DATA_PER_LINE)
+			{
+				dev_info(&i2c_client_kg2->dev,
+				         "W - %02X %02X%s\n",
+				         baseaddr, subaddr, output);
+			}
+			else
+			{
+				dev_info(&i2c_client_kg2->dev,
+				         "         %s\n",
+				         output);
+			}
+
+			count = 0;
+		}
+#endif
+	}
+
+	return 0;
+}
+
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/kg2/kg2_netlink.c
+++ linux-mvl-dove-2.6.32/drivers/video/display/kg2/kg2_netlink.c
@@ -0,0 +1,544 @@
+/*
+ * kg2_netlink.c - Linux Driver for Marvell 88DE2750 Digital Video Format Converter
+ *
+ *                 This file handles Generic Netlink communication, which is used to
+ *                 send KG2 configuration request to the user space daemon - kg2d.
+ */
+
+#include "kg2_netlink.h"
+
+
+// Generic netlink operation handlers
+static int kg2_genl_get_daemon_pid(struct sk_buff * skb, struct genl_info * info);
+static int kg2_genl_set_daemon_pid(struct sk_buff * skb, struct genl_info * info);
+
+// Generic netlink family definition
+static struct genl_family kg2_genl_family = {
+	.id		= GENL_ID_GENERATE,
+	.hdrsize	= 0,
+	.name		= KG2_GENL_NAME,
+	.version	= KG2_GENL_VERSION,
+	.maxattr	= KG2_GENL_ATTR_MAX,
+};
+
+// Generic netlink attribute policy
+static struct nla_policy kg2_genl_policy[KG2_GENL_ATTR_MAX + 1] = {
+	[KG2_GENL_ATTR_PID] = {
+		.type		= NLA_U32,
+	},
+	[KG2_GENL_ATTR_HTOTAL] = {
+		.type		= NLA_U16,
+	},
+	[KG2_GENL_ATTR_HACTIVE] = {
+		.type		= NLA_U16,
+	},
+	[KG2_GENL_ATTR_HFRONTPORCH] = {
+		.type		= NLA_U16,
+	},
+	[KG2_GENL_ATTR_HSYNCWIDTH] = {
+		.type		= NLA_U8,
+	},
+	[KG2_GENL_ATTR_HPOLARITY] = {
+		.type		= NLA_U32,
+	},
+	[KG2_GENL_ATTR_VTOTAL] = {
+		.type		= NLA_U16,
+	},
+	[KG2_GENL_ATTR_VACTIVE] = {
+		.type		= NLA_U16,
+	},
+	[KG2_GENL_ATTR_VFRONTPORCH] = {
+		.type		= NLA_U16,
+	},
+	[KG2_GENL_ATTR_VSYNCWIDTH] = {
+		.type		= NLA_U8,
+	},
+	[KG2_GENL_ATTR_VPOLARITY] = {
+		.type		= NLA_U32,
+	},
+	[KG2_GENL_ATTR_ASPRATIO] = {
+		.type		= NLA_U32,
+	},
+	[KG2_GENL_ATTR_ISPROGRESSIVE] = {
+		.type		= NLA_U8,
+	},
+	[KG2_GENL_ATTR_REFRATE] = {
+		.type		= NLA_U16,
+	},
+};
+
+// Generic netlink operation definition
+static struct genl_ops kg2_genl_ops[] = {
+	{
+		.cmd		= KG2_GENL_CMD_GET_DAEMON_PID,
+		.flags		= 0,
+		.policy		= kg2_genl_policy,
+		.doit		= kg2_genl_get_daemon_pid,
+		.dumpit		= NULL,
+		.done		= NULL,
+	},
+	{
+		.cmd		= KG2_GENL_CMD_SET_DAEMON_PID,
+		.flags		= 0,
+		.policy		= kg2_genl_policy,
+		.doit		= kg2_genl_set_daemon_pid,
+		.dumpit		= NULL,
+		.done		= NULL,
+	}
+};
+
+unsigned int g_daemon_pid = 0;
+
+
+/*-----------------------------------------------------------------------------
+ * Description : Generic Netlink operation handler for KG2 family
+ * Parameter   : skb
+ *               info
+ * Return      : =0 - Success
+ *-----------------------------------------------------------------------------
+ */
+
+static int kg2_genl_get_daemon_pid(struct sk_buff * skb, struct genl_info * info)
+{
+	int ret = 0;
+	void * hdr;
+	struct sk_buff * msg;
+
+	printk(KERN_INFO "kg2: Send daemon PID to user: %u\n", info->snd_pid);
+
+	if (g_daemon_pid == 0)
+		return -EINVAL;
+
+	// Allocate message
+	msg = genlmsg_new(NLMSG_GOODSIZE, GFP_KERNEL);
+
+	if (msg == NULL)
+		return -ENOMEM;
+
+	// Set message header
+	hdr = genlmsg_put(msg, info->snd_pid, info->snd_seq, &kg2_genl_family,
+	                  0, KG2_GENL_CMD_SET_DAEMON_PID);
+
+	if (hdr == NULL)
+	{
+		ret = -EMSGSIZE;
+		goto err;
+	}
+
+	// Set message payload
+	ret = nla_put_u32(msg, KG2_GENL_ATTR_PID, g_daemon_pid);
+
+	if (ret)
+	{
+		ret = -ENOBUFS;
+		goto err;
+	}
+
+	// Finalize message
+	genlmsg_end(msg, hdr);
+
+	// Reply message
+	return genlmsg_reply(msg, info);
+ err:
+	nlmsg_free(msg);
+
+	return ret;
+}
+
+/*-----------------------------------------------------------------------------
+ * Description : Generic Netlink operation handler for KG2 family
+ * Parameter   : skb
+ *               info
+ * Return      : =0 - Success
+ *-----------------------------------------------------------------------------
+ */
+
+static int kg2_genl_set_daemon_pid(struct sk_buff * skb, struct genl_info * info)
+{
+	printk(KERN_INFO "kg2: Receive daemon PID: %u\n", info->snd_pid);
+
+	g_daemon_pid = info->snd_pid;
+
+	return 0;
+}
+
+/*-----------------------------------------------------------------------------
+ * Description : Check if the daemon PID is available
+ * Parameter   : N/A
+ * Return      : =true - Available 
+ *             : =false - Not available
+ *-----------------------------------------------------------------------------
+ */
+
+bool kg2_genl_daemon_pid_available(void)
+{
+	if (g_daemon_pid > 0)
+		return true;
+
+	return false;
+}
+
+/*-----------------------------------------------------------------------------
+ * Description : Generic Netlink operation handler for KG2 family
+ * Parameter   : timing
+ * Return      : =0 - Success
+ *-----------------------------------------------------------------------------
+ */
+
+int kg2_genl_set_input_timing(AVC_CMD_TIMING_PARAM * timing)
+{
+	int ret = 0;
+	void * hdr;
+	struct sk_buff * msg;
+
+	msg = genlmsg_new(NLMSG_GOODSIZE, GFP_KERNEL);
+
+	if (msg == NULL)
+	{
+		return -ENOMEM;
+	}
+
+	// Create Generic Netlink message header
+	hdr = genlmsg_put(msg, g_daemon_pid, 0, &kg2_genl_family, NLM_F_REQUEST, KG2_GENL_CMD_SET_INPUT_TIMING);
+
+	if (hdr == NULL)
+	{
+		ret = -EMSGSIZE;
+		goto err;
+	}
+
+	// Add a KG2_GENL_ATTR_MSG attribute
+	ret = nla_put_u16(msg, KG2_GENL_ATTR_HTOTAL, timing->HTotal);
+
+	if (ret)
+	{
+		ret = -ENOBUFS;
+		goto err;
+	}
+
+	ret = nla_put_u16(msg, KG2_GENL_ATTR_HACTIVE, timing->HActive);
+
+	if (ret)
+	{
+		ret = -ENOBUFS;
+		goto err;
+	}
+
+	ret = nla_put_u16(msg, KG2_GENL_ATTR_HFRONTPORCH, timing->HFrontPorch);
+
+	if (ret)
+	{
+		ret = -ENOBUFS;
+		goto err;
+	}
+
+	ret = nla_put_u8(msg, KG2_GENL_ATTR_HSYNCWIDTH, timing->HSyncWidth);
+
+	if (ret)
+	{
+		ret = -ENOBUFS;
+		goto err;
+	}
+
+	ret = nla_put_u32(msg, KG2_GENL_ATTR_HPOLARITY, timing->HPolarity);
+
+	if (ret)
+	{
+		ret = -ENOBUFS;
+		goto err;
+	}
+
+	ret = nla_put_u16(msg, KG2_GENL_ATTR_VTOTAL, timing->VTotal);
+
+	if (ret)
+	{
+		ret = -ENOBUFS;
+		goto err;
+	}
+
+	ret = nla_put_u16(msg, KG2_GENL_ATTR_VACTIVE, timing->VActive);
+
+	if (ret)
+	{
+		ret = -ENOBUFS;
+		goto err;
+	}
+
+	ret = nla_put_u16(msg, KG2_GENL_ATTR_VFRONTPORCH, timing->VFrontPorch);
+
+	if (ret)
+	{
+		ret = -ENOBUFS;
+		goto err;
+	}
+
+	ret = nla_put_u8(msg, KG2_GENL_ATTR_VSYNCWIDTH, timing->VSyncWidth);
+
+	if (ret)
+	{
+		ret = -ENOBUFS;
+		goto err;
+	}
+
+	ret = nla_put_u32(msg, KG2_GENL_ATTR_VPOLARITY, timing->VPolarity);
+
+	if (ret)
+	{
+		ret = -ENOBUFS;
+		goto err;
+	}
+
+	ret = nla_put_u32(msg, KG2_GENL_ATTR_ASPRATIO, timing->AspRatio);
+
+	if (ret)
+	{
+		ret = -ENOBUFS;
+		goto err;
+	}
+
+	ret = nla_put_u8(msg, KG2_GENL_ATTR_ISPROGRESSIVE, timing->IsProgressive);
+
+	if (ret)
+	{
+		ret = -ENOBUFS;
+		goto err;
+	}
+
+	ret = nla_put_u16(msg, KG2_GENL_ATTR_REFRATE, timing->RefRate);
+
+	if (ret)
+	{
+		ret = -ENOBUFS;
+		goto err;
+	}
+
+	// Finalize the message
+	genlmsg_end(msg, hdr);
+
+	// Send the message
+	ret = genlmsg_unicast(&init_net, msg, g_daemon_pid);
+
+	return ret;
+ err:
+	nlmsg_free(msg);
+
+	return ret;
+}
+
+/*-----------------------------------------------------------------------------
+ * Description : Generic Netlink operation handler for KG2 family
+ * Parameter   : timing
+ * Return      : =0 - Success
+ *-----------------------------------------------------------------------------
+ */
+
+int kg2_genl_set_output_timing(AVC_CMD_TIMING_PARAM * timing)
+{
+	int ret = 0;
+	void * hdr;
+	struct sk_buff * msg;
+
+	msg = genlmsg_new(NLMSG_GOODSIZE, GFP_KERNEL);
+
+	if (msg == NULL)
+	{
+		return -ENOMEM;
+	}
+
+	// Create Generic Netlink message header
+	hdr = genlmsg_put(msg, g_daemon_pid, 0, &kg2_genl_family, NLM_F_REQUEST, KG2_GENL_CMD_SET_OUTPUT_TIMING);
+
+	if (hdr == NULL)
+	{
+		ret = -EMSGSIZE;
+		goto err;
+	}
+
+	// Add a KG2_GENL_ATTR_MSG attribute
+	ret = nla_put_u16(msg, KG2_GENL_ATTR_HTOTAL, timing->HTotal);
+
+	if (ret)
+	{
+		ret = -ENOBUFS;
+		goto err;
+	}
+
+	ret = nla_put_u16(msg, KG2_GENL_ATTR_HACTIVE, timing->HActive);
+
+	if (ret)
+	{
+		ret = -ENOBUFS;
+		goto err;
+	}
+
+	ret = nla_put_u16(msg, KG2_GENL_ATTR_HFRONTPORCH, timing->HFrontPorch);
+
+	if (ret)
+	{
+		ret = -ENOBUFS;
+		goto err;
+	}
+
+	ret = nla_put_u8(msg, KG2_GENL_ATTR_HSYNCWIDTH, timing->HSyncWidth);
+
+	if (ret)
+	{
+		ret = -ENOBUFS;
+		goto err;
+	}
+
+	ret = nla_put_u32(msg, KG2_GENL_ATTR_HPOLARITY, timing->HPolarity);
+
+	if (ret)
+	{
+		ret = -ENOBUFS;
+		goto err;
+	}
+
+	ret = nla_put_u16(msg, KG2_GENL_ATTR_VTOTAL, timing->VTotal);
+
+	if (ret)
+	{
+		ret = -ENOBUFS;
+		goto err;
+	}
+
+	ret = nla_put_u16(msg, KG2_GENL_ATTR_VACTIVE, timing->VActive);
+
+	if (ret)
+	{
+		ret = -ENOBUFS;
+		goto err;
+	}
+
+	ret = nla_put_u16(msg, KG2_GENL_ATTR_VFRONTPORCH, timing->VFrontPorch);
+
+	if (ret)
+	{
+		ret = -ENOBUFS;
+		goto err;
+	}
+
+	ret = nla_put_u8(msg, KG2_GENL_ATTR_VSYNCWIDTH, timing->VSyncWidth);
+
+	if (ret)
+	{
+		ret = -ENOBUFS;
+		goto err;
+	}
+
+	ret = nla_put_u32(msg, KG2_GENL_ATTR_VPOLARITY, timing->VPolarity);
+
+	if (ret)
+	{
+		ret = -ENOBUFS;
+		goto err;
+	}
+
+	ret = nla_put_u32(msg, KG2_GENL_ATTR_ASPRATIO, timing->AspRatio);
+
+	if (ret)
+	{
+		ret = -ENOBUFS;
+		goto err;
+	}
+
+	ret = nla_put_u8(msg, KG2_GENL_ATTR_ISPROGRESSIVE, timing->IsProgressive);
+
+	if (ret)
+	{
+		ret = -ENOBUFS;
+		goto err;
+	}
+
+	ret = nla_put_u16(msg, KG2_GENL_ATTR_REFRATE, timing->RefRate);
+
+	if (ret)
+	{
+		ret = -ENOBUFS;
+		goto err;
+	}
+
+	// Finalize the message
+	genlmsg_end(msg, hdr);
+
+	// Send the message
+	ret = genlmsg_unicast(&init_net, msg, g_daemon_pid);
+
+	return ret;
+ err:
+	nlmsg_free(msg);
+
+	return ret;
+}
+
+/*-----------------------------------------------------------------------------
+ * Description : Generic Netlink operation handler for KG2 family
+ * Parameter   : N/A
+ * Return      : =0 - Success
+ *-----------------------------------------------------------------------------
+ */
+
+int kg2_genl_system_is_resumed(void)
+{
+	int ret = 0;
+	void * hdr;
+	struct sk_buff * msg;
+
+	msg = genlmsg_new(NLMSG_GOODSIZE, GFP_KERNEL);
+
+	if (msg == NULL)
+	{
+		return -ENOMEM;
+	}
+
+	// Create Generic Netlink message header
+	hdr = genlmsg_put(msg, g_daemon_pid, 0, &kg2_genl_family, NLM_F_REQUEST, KG2_GENL_EVT_SYSTEM_IS_RESUMED);
+
+	if (hdr == NULL)
+	{
+		ret = -EMSGSIZE;
+		goto err;
+	}
+
+	// Finalize the message
+	genlmsg_end(msg, hdr);
+
+	// Send the message
+	ret = genlmsg_unicast(&init_net, msg, g_daemon_pid);
+
+	return ret;
+ err:
+	nlmsg_free(msg);
+
+	return ret;
+}
+
+/*-----------------------------------------------------------------------------
+ * Description : Register KG2 to Generic Netlink subsystem
+ * Parameter   : N/A
+ * Return      : =0 - Success
+ *               <0 - Fail
+ *-----------------------------------------------------------------------------
+ */
+
+int kg2_genl_register(void)
+{
+	return genl_register_family_with_ops(&kg2_genl_family,
+	                                     kg2_genl_ops,
+	                                     ARRAY_SIZE(kg2_genl_ops));
+}
+
+/*-----------------------------------------------------------------------------
+ * Description : Unregister KG2 from Generic Netlink subsystem
+ * Parameter   : N/A
+ * Return      : =0 - Success
+ *               <0 - Fail
+ *-----------------------------------------------------------------------------
+ */
+
+int kg2_genl_unregister(void)
+{
+	return genl_unregister_family(&kg2_genl_family);
+}
+
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/kg2/scripts/step3_INIT_IP_Flexiport_RGB24_or_YCbCCr24_for_Dove.h
+++ linux-mvl-dove-2.6.32/drivers/video/display/kg2/scripts/step3_INIT_IP_Flexiport_RGB24_or_YCbCCr24_for_Dove.h
@@ -0,0 +1,28 @@
+/*---------------------------------------------------------------------
+ * Copyright © 2008 by Marvell International Ltd.
+ * All rights reserved.
+ *---------------------------------------------------------------------
+ */
+/*---------------------------------------------------------------------
+ * Ini2h Tool Version 2.10, April 15 2009 Build
+ * Command            : "ini2h -i step3_INIT_IP_Flexiport_RGB24_or_YCbCCr24_for_Dove.ini -o step3_INIT_IP_Flexiport_RGB24_or_YCbCCr24_for_Dove.h -a step3_INIT_IP_Flexiport_RGB24_or_YCbCCr24_for_Dove -c -t"
+ * Source Name        : step3_INIT_IP_Flexiport_RGB24_or_YCbCCr24_for_Dove.ini
+ * Converted Name     : step3_INIT_IP_Flexiport_RGB24_or_YCbCCr24_for_Dove.h
+ * Date Of Generation : November 06 2009, 10:33:45
+ *---------------------------------------------------------------------
+ */
+
+#ifndef _step3_INIT_IP_Flexiport_RGB24_or_YCbCCr24_for_Dove_H_
+#define _step3_INIT_IP_Flexiport_RGB24_or_YCbCCr24_for_Dove_H_
+
+
+const unsigned char step3_INIT_IP_Flexiport_RGB24_or_YCbCCr24_for_Dove[] = {
+	1,
+	0x20, 0x00, 0x00,
+	39,
+	0x22, 0xB0, 0x21, 0x21, 0x21, 0x21, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x21, 0x21, 0x21, 0x21, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x21, 0x21, 0x21, 0x21, 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x1E, 0x1F, 0x20
+};
+
+#define step3_INIT_IP_Flexiport_RGB24_or_YCbCCr24_for_Dove_Count 46
+
+#endif //step3_INIT_IP_Flexiport_RGB24_or_YCbCCr24_for_Dove_H_
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/kg2/scripts/step5_Dove_1024x600_720P.h
+++ linux-mvl-dove-2.6.32/drivers/video/display/kg2/scripts/step5_Dove_1024x600_720P.h
@@ -0,0 +1,256 @@
+/*---------------------------------------------------------------------
+ * Copyright © 2008 by Marvell International Ltd.
+ * All rights reserved.
+ *---------------------------------------------------------------------
+ */
+/*---------------------------------------------------------------------
+ * Ini2h Tool Version 2.10, April 15 2009 Build
+ * Command            : "ini2h -i step5_Dove_1024x600_720P.ini -o step5_Dove_1024x600_720P.h -a step5_Dove_1024x600_720P -c -t"
+ * Source Name        : step5_Dove_1024x600_720P.ini
+ * Converted Name     : step5_Dove_1024x600_720P.h
+ * Date Of Generation : November 10 2009, 10:53:38
+ *---------------------------------------------------------------------
+ */
+
+#ifndef _step5_Dove_1024x600_720P_H_
+#define _step5_Dove_1024x600_720P_H_
+
+
+const unsigned char step5_Dove_1024x600_720P[] = {
+	1,
+	0x20, 0x00, 0x02,
+	1,
+	0x22, 0xF4, 0x3F,
+	1,
+	0x20, 0x00, 0x06,
+	1,
+	0x22, 0x00, 0x03,
+	1,
+	0x20, 0x00, 0x07,
+	1,
+	0x22, 0x00, 0x03,
+	1,
+	0x20, 0x00, 0x04,
+	2,
+	0x22, 0x20, 0x00, 0x00,
+	1,
+	0x20, 0x00, 0x0A,
+	1,
+	0x22, 0x43, 0x00,
+	1,
+	0x20, 0x00, 0x00,
+	3,
+	0x22, 0x03, 0x00, 0x1B, 0x04,
+	7,
+	0x22, 0x30, 0x01, 0x00, 0x07, 0x80, 0xB8, 0x1E, 0x45,
+	17,
+	0x22, 0x38, 0xB8, 0x1E, 0x45, 0x00, 0x05, 0x05, 0x00, 0x00, 0x00, 0x00, 0x15, 0x00, 0x07, 0x40, 0xFC, 0xE1, 0x12,
+	12,
+	0x22, 0x4A, 0xB8, 0x1E, 0x45, 0x00, 0x05, 0x05, 0x00, 0x00, 0x00, 0x05, 0x03, 0x03,
+	5,
+	0x22, 0x58, 0x66, 0x66, 0xE6, 0x00, 0x00,
+	7,
+	0x22, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	3,
+	0x22, 0x88, 0x00, 0x00, 0x00,
+	3,
+	0x22, 0x8C, 0x00, 0x00, 0x00,
+	3,
+	0x22, 0x90, 0x00, 0x00, 0x00,
+	19,
+	0x22, 0x94, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	3,
+	0x22, 0xA8, 0x00, 0x00, 0x00,
+	3,
+	0x22, 0xD7, 0x30, 0x00, 0x00,
+	1,
+	0x20, 0x00, 0x01,
+	37,
+	0x22, 0x00, 0x8B, 0x00, 0x0C, 0x00, 0x8B, 0x04, 0x64, 0x02, 0x00, 0x00, 0x06, 0x01, 0xCA, 0x20, 0x3C, 0x20, 0x25, 0x00, 0x6E, 0x01, 0x6D, 0x00, 0x18, 0x20, 0xEE, 0x20, 0x06, 0x01, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x0E, 0x10, 0x80,
+	10,
+	0x22, 0x56, 0x04, 0x0A, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x89, 0x00,
+	2,
+	0x22, 0x61, 0x05, 0x88,
+	1,
+	0x20, 0x00, 0x02,
+	29,
+	0x22, 0x00, 0x00, 0x30, 0x2D, 0xAD, 0x00, 0x0E, 0x00, 0x0E, 0x3B, 0x16, 0x1E, 0x08, 0x1E, 0x08, 0x03, 0x06, 0x12, 0x06, 0x12, 0x18, 0x18, 0x00, 0x2C, 0x38, 0x26, 0x3E, 0x2C, 0xEB, 0x64,
+	12,
+	0x22, 0x1E, 0xBE, 0x0A, 0x20, 0x43, 0x65, 0x87, 0x20, 0x43, 0x65, 0x87, 0x08, 0x23,
+	73,
+	0x22, 0x80, 0x90, 0x23, 0x11, 0x05, 0x0C, 0x03, 0x0C, 0x10, 0x30, 0x40, 0x3C, 0x03, 0x70, 0x00, 0x00, 0x06, 0x10, 0x20, 0x68, 0x54, 0x54, 0x20, 0x12, 0x08, 0x10, 0x06, 0x02, 0x03, 0x66, 0x20, 0x28, 0x28, 0x99, 0x44, 0x20, 0xAA, 0xAA, 0x99, 0x00, 0x19, 0x00, 0x16, 0x00, 0x10, 0x00, 0x17, 0x00, 0x14, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x19, 0x01, 0x19, 0x03, 0x03, 0xFF, 0x8F, 0x15, 0x20, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	8,
+	0x22, 0x35, 0x07, 0x0E, 0x00, 0x22, 0xE0, 0x01, 0x00, 0x00,
+	2,
+	0x22, 0xF2, 0x67, 0x60,
+	2,
+	0x22, 0xF6, 0x7F, 0x07,
+	1,
+	0x20, 0x00, 0x03,
+	42,
+	0x22, 0x00, 0x40, 0xE8, 0x77, 0x0F, 0x0A, 0x14, 0x00, 0x80, 0x00, 0x11, 0x00, 0x00, 0x56, 0xFF, 0x04, 0x8B, 0x10, 0x02, 0x12, 0x10, 0x02, 0x22, 0x18, 0x04, 0x22, 0x0D, 0x07, 0x02, 0x1E, 0x0A, 0x24, 0x30, 0x0F, 0x06, 0x48, 0x0A, 0x20, 0x06, 0x07, 0x0F, 0x02, 0x1E,
+	42,
+	0x22, 0x2C, 0x00, 0x60, 0x00, 0x00, 0x00, 0xC0, 0x00, 0x00, 0x00, 0x80, 0x01, 0x0D, 0x10, 0x14, 0x18, 0x12, 0x12, 0x12, 0x0C, 0x01, 0x20, 0x12, 0x00, 0x6F, 0x3F, 0x03, 0x00, 0x00, 0x00, 0x00, 0x7D, 0xEA, 0x08, 0x02, 0xFF, 0x14, 0x30, 0x0C, 0x04, 0x1D, 0xEA, 0x00,
+	43,
+	0x22, 0x58, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x18, 0x24, 0x54, 0x48, 0x24, 0x2A, 0x00, 0x2A, 0x00, 0x2A, 0xCA, 0x02, 0x00, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0E, 0x0F, 0x10, 0x10, 0x01, 0x08, 0x00, 0x00,
+	1,
+	0x20, 0x00, 0x04,
+	8,
+	0x22, 0xB4, 0x00, 0x00, 0x00, 0x00, 0xE4, 0x2C, 0x0D, 0x00,
+	1,
+	0x20, 0x00, 0x03,
+	27,
+	0x22, 0xE0, 0x51, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10, 0x0C, 0x00, 0x00,
+	1,
+	0x20, 0x00, 0x06,
+	3,
+	0x22, 0x01, 0x80, 0x03, 0x0F,
+	5,
+	0x22, 0x03, 0x00, 0x34, 0x14, 0x14, 0x14,
+	3,
+	0x22, 0x20, 0x00, 0x00, 0x00,
+	7,
+	0x22, 0x24, 0x00, 0x04, 0x58, 0x02, 0x58, 0x02, 0x00,
+	1,
+	0x22, 0x2D, 0x00,
+	10,
+	0x22, 0x60, 0x58, 0x02, 0x00, 0x04, 0xD0, 0x02, 0x00, 0x05, 0x7F, 0x07,
+	3,
+	0x22, 0x6C, 0x55, 0x55, 0x0D,
+	3,
+	0x22, 0x70, 0xCC, 0xCC, 0x0C,
+	5,
+	0x22, 0x74, 0x00, 0x00, 0x00, 0x00, 0x00,
+	1,
+	0x22, 0x7B, 0x03,
+	6,
+	0x22, 0x7D, 0x00, 0x00, 0x80, 0x00, 0x00, 0x10,
+	3,
+	0x22, 0x84, 0x00, 0x00, 0x10,
+	2,
+	0x22, 0x88, 0x00, 0x00,
+	1,
+	0x22, 0xA5, 0x00,
+	1,
+	0x20, 0x00, 0x07,
+	3,
+	0x22, 0x01, 0x80, 0x03, 0x0F,
+	5,
+	0x22, 0x03, 0x00, 0x34, 0x14, 0x14, 0x14,
+	3,
+	0x22, 0x20, 0x00, 0x00, 0x00,
+	7,
+	0x22, 0x24, 0x00, 0x04, 0x58, 0x02, 0x58, 0x02, 0x00,
+	1,
+	0x22, 0x2D, 0x00,
+	10,
+	0x22, 0x60, 0x58, 0x02, 0x00, 0x04, 0xD0, 0x02, 0x00, 0x05, 0x7F, 0x07,
+	3,
+	0x22, 0x6C, 0x55, 0x55, 0x0D,
+	3,
+	0x22, 0x70, 0xCC, 0xCC, 0x0C,
+	15,
+	0x22, 0x74, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1A, 0x1A, 0x03, 0xC8, 0x00, 0x00, 0x80, 0x00, 0x00, 0x10,
+	3,
+	0x22, 0x84, 0x00, 0x00, 0x10,
+	2,
+	0x22, 0x88, 0x00, 0x00,
+	2,
+	0x22, 0xA2, 0x11, 0xFF,
+	1,
+	0x22, 0xA5, 0x00,
+	1,
+	0x20, 0x00, 0x08,
+	18,
+	0x22, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02,
+	3,
+	0x22, 0x14, 0x00, 0x00, 0x00,
+	3,
+	0x22, 0x18, 0x00, 0x00, 0x00,
+	3,
+	0x22, 0x1C, 0x00, 0x00, 0x00,
+	1,
+	0x22, 0x20, 0x40,
+	4,
+	0x22, 0x22, 0x40, 0x00, 0xAC, 0x03,
+	19,
+	0x22, 0x2D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0xAA, 0xFF, 0xFF, 0x00, 0x00, 0xFF, 0x03, 0x0A, 0x04, 0x28, 0x1E, 0x14,
+	1,
+	0x22, 0x4B, 0xEB,
+	18,
+	0x22, 0x76, 0x64, 0x00, 0xF4, 0x01, 0x1C, 0x0C, 0xAC, 0x0D, 0x99, 0x01, 0x51, 0x00, 0x36, 0x87, 0x87, 0x36, 0x00, 0x00,
+	18,
+	0x22, 0xA0, 0xA2, 0x03, 0x00, 0x02, 0x01, 0x20, 0x5E, 0x20, 0x00, 0x02, 0xEB, 0x20, 0x00, 0x00, 0x00, 0x02, 0x15, 0x03,
+	3,
+	0x22, 0xB4, 0x14, 0x3A, 0x02,
+	3,
+	0x22, 0xB8, 0x8A, 0x14, 0x00,
+	3,
+	0x22, 0xBC, 0x50, 0x31, 0x02,
+	1,
+	0x22, 0xE0, 0x00,
+	5,
+	0x22, 0xF0, 0x00, 0x01, 0x00, 0x00, 0x00,
+	4,
+	0x22, 0xF6, 0x00, 0x00, 0x00, 0x00,
+	1,
+	0x20, 0x00, 0x09,
+	21,
+	0x22, 0x3C, 0x00, 0x12, 0x14, 0x03, 0x00, 0xE0, 0xEB, 0x58, 0x5E, 0x08, 0x00, 0xA0, 0xAE, 0x43, 0x50, 0xB1, 0x8A, 0x14, 0x14, 0xBA, 0x00,
+	7,
+	0x22, 0x80, 0x00, 0x82, 0x03, 0x04, 0x40, 0x01, 0x00,
+	1,
+	0x20, 0x00, 0x0A,
+	67,
+	0x22, 0x00, 0x00, 0x00, 0x40, 0x00, 0xED, 0x02, 0x71, 0x06, 0x00, 0x00, 0x00, 0x00, 0x6E, 0x05, 0xDA, 0x02, 0x6E, 0x05, 0x96, 0x05, 0xD5, 0x02, 0xDA, 0x02, 0xD8, 0x07, 0x04, 0x08, 0x3C, 0x04, 0x41, 0x04, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0xD0, 0x02, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0xD0, 0x02, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0xD0, 0x02, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0xD0, 0x02, 0x01, 0x0A, 0x10,
+	2,
+	0x22, 0x44, 0x80, 0x00,
+	3,
+	0x22, 0x48, 0x00, 0x00, 0x00,
+	4,
+	0x22, 0x4C, 0x00, 0x00, 0xFF, 0x0F,
+	8,
+	0x22, 0xA0, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0xD0, 0x02,
+	1,
+	0x22, 0x50, 0x00,
+	40,
+	0x22, 0x52, 0x7F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0x00, 0xFF, 0x07,
+	3,
+	0x22, 0x90, 0x00, 0x00, 0x00,
+	3,
+	0x22, 0x94, 0x00, 0x00, 0x00,
+	3,
+	0x22, 0x98, 0x00, 0x00, 0x00,
+	1,
+	0x20, 0x00, 0x0D,
+	4,
+	0x22, 0x2A, 0x02, 0x00, 0x1E, 0x00,
+	1,
+	0x20, 0x00, 0x0F,
+	18,
+	0x22, 0x0B, 0x00, 0x20, 0x14, 0x07, 0x21, 0x00, 0x00, 0x1A, 0x00, 0x00, 0x20, 0x14, 0x07, 0x13, 0x00, 0x00, 0x1A, 0x00,
+	1,
+	0x20, 0x00, 0x04,
+	1,
+	0x22, 0x13, 0x00,
+	1,
+	0x22, 0x13, 0x01,
+	1,
+	0x22, 0x13, 0x00,
+	1,
+	0x20, 0x00, 0x02,
+	1,
+	0x22, 0xF4, 0x58,
+	1,
+	0x20, 0x00, 0x06,
+	1,
+	0x22, 0x00, 0x00,
+	1,
+	0x20, 0x00, 0x07,
+	1,
+	0x22, 0x00, 0x00
+};
+
+#define step5_Dove_1024x600_720P_Count 1206
+
+#endif //step5_Dove_1024x600_720P_H_
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/kg2/scripts/step6_scaler.h
+++ linux-mvl-dove-2.6.32/drivers/video/display/kg2/scripts/step6_scaler.h
@@ -0,0 +1,424 @@
+/*---------------------------------------------------------------------
+ * Copyright © 2008 by Marvell International Ltd.
+ * All rights reserved.
+ *---------------------------------------------------------------------
+ */
+/*---------------------------------------------------------------------
+ * Ini2h Tool Version 2.10, April 15 2009 Build
+ * Command            : "ini2h -i step6_scaler.ini -o step6_scaler.h -a step6_scaler -c -t"
+ * Source Name        : step6_scaler.ini
+ * Converted Name     : step6_scaler.h
+ * Date Of Generation : November 11 2009, 13:41:09
+ *---------------------------------------------------------------------
+ */
+
+#ifndef _step6_scaler_H_
+#define _step6_scaler_H_
+
+
+const unsigned char step6_scaler[] = {
+	1,
+	0x20, 0x00, 0x06,
+	4,
+	0x22, 0x79, 0x1A, 0x1A, 0x03, 0xC8,
+	1,
+	0x22, 0xA2, 0x40,
+	24,
+	0x22, 0x8A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x08, 0x00, 0x00, 0x03, 0x04, 0x00, 0x00, 0x01, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x08,
+	1,
+	0x22, 0xA3, 0xFF,
+	1,
+	0x22, 0xA2, 0x41,
+	24,
+	0x22, 0x8A, 0x01, 0x08, 0x01, 0x08, 0x01, 0x08, 0x02, 0x00, 0x0D, 0x08, 0x06, 0x04, 0x0D, 0x00, 0x04, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x08,
+	1,
+	0x22, 0xA3, 0xFF,
+	1,
+	0x22, 0xA2, 0x42,
+	24,
+	0x22, 0x8A, 0x01, 0x08, 0x01, 0x08, 0x01, 0x08, 0x05, 0x00, 0x19, 0x08, 0x04, 0x04, 0x1B, 0x00, 0x07, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x08,
+	1,
+	0x22, 0xA3, 0xFF,
+	1,
+	0x22, 0xA2, 0x43,
+	24,
+	0x22, 0x8A, 0x01, 0x08, 0x01, 0x08, 0x01, 0x08, 0x08, 0x00, 0x25, 0x08, 0x02, 0x04, 0x29, 0x00, 0x0A, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x08,
+	1,
+	0x22, 0xA3, 0xFF,
+	1,
+	0x22, 0xA2, 0x44,
+	24,
+	0x22, 0x8A, 0x01, 0x08, 0x01, 0x08, 0x01, 0x08, 0x0A, 0x00, 0x30, 0x08, 0x00, 0x04, 0x38, 0x00, 0x0E, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x02, 0x08,
+	1,
+	0x22, 0xA3, 0xFF,
+	1,
+	0x22, 0xA2, 0x45,
+	24,
+	0x22, 0x8A, 0x01, 0x08, 0x02, 0x08, 0x01, 0x08, 0x0D, 0x00, 0x3A, 0x08, 0xFB, 0x03, 0x48, 0x00, 0x12, 0x08, 0x01, 0x00, 0x01, 0x00, 0x00, 0x00, 0x02, 0x08,
+	1,
+	0x22, 0xA3, 0xFF,
+	1,
+	0x22, 0xA2, 0x46,
+	24,
+	0x22, 0x8A, 0x02, 0x08, 0x02, 0x08, 0x01, 0x08, 0x0F, 0x00, 0x44, 0x08, 0xF8, 0x03, 0x58, 0x00, 0x16, 0x08, 0x01, 0x00, 0x01, 0x00, 0x00, 0x00, 0x02, 0x08,
+	1,
+	0x22, 0xA3, 0xFF,
+	1,
+	0x22, 0xA2, 0x47,
+	24,
+	0x22, 0x8A, 0x02, 0x08, 0x02, 0x08, 0x01, 0x08, 0x11, 0x00, 0x4D, 0x08, 0xF3, 0x03, 0x69, 0x00, 0x1A, 0x08, 0x01, 0x00, 0x01, 0x00, 0x00, 0x00, 0x03, 0x08,
+	1,
+	0x22, 0xA3, 0xFF,
+	1,
+	0x22, 0xA2, 0x48,
+	24,
+	0x22, 0x8A, 0x02, 0x08, 0x02, 0x08, 0x00, 0x00, 0x13, 0x00, 0x56, 0x08, 0xEA, 0x03, 0x7A, 0x00, 0x1E, 0x08, 0x02, 0x00, 0x02, 0x00, 0x00, 0x00, 0x03, 0x08,
+	1,
+	0x22, 0xA3, 0xFF,
+	1,
+	0x22, 0xA2, 0x49,
+	24,
+	0x22, 0x8A, 0x02, 0x08, 0x02, 0x08, 0x00, 0x00, 0x14, 0x00, 0x5D, 0x08, 0xE3, 0x03, 0x8B, 0x00, 0x22, 0x08, 0x02, 0x00, 0x02, 0x00, 0x00, 0x00, 0x03, 0x08,
+	1,
+	0x22, 0xA3, 0xFF,
+	1,
+	0x22, 0xA2, 0x4A,
+	24,
+	0x22, 0x8A, 0x02, 0x08, 0x02, 0x08, 0x00, 0x00, 0x16, 0x00, 0x65, 0x08, 0xDB, 0x03, 0x9D, 0x00, 0x26, 0x08, 0x03, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x08,
+	1,
+	0x22, 0xA3, 0xFF,
+	1,
+	0x22, 0xA2, 0x4B,
+	24,
+	0x22, 0x8A, 0x03, 0x08, 0x03, 0x08, 0x00, 0x00, 0x17, 0x00, 0x6C, 0x08, 0xD4, 0x03, 0xB0, 0x00, 0x2B, 0x08, 0x04, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x08,
+	1,
+	0x22, 0xA3, 0xFF,
+	1,
+	0x22, 0xA2, 0x4C,
+	24,
+	0x22, 0x8A, 0x03, 0x08, 0x03, 0x08, 0x00, 0x00, 0x18, 0x00, 0x72, 0x08, 0xC9, 0x03, 0xC3, 0x00, 0x2F, 0x08, 0x04, 0x00, 0x03, 0x00, 0x00, 0x00, 0x04, 0x08,
+	1,
+	0x22, 0xA3, 0xFF,
+	1,
+	0x22, 0xA2, 0x4D,
+	24,
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+	0x22, 0xA3, 0xFF,
+	1,
+	0x22, 0xA2, 0x1F,
+	24,
+	0x22, 0x8A, 0x01, 0x08, 0x12, 0x00, 0x75, 0x08, 0x77, 0x02, 0x4C, 0x02, 0x6F, 0x08, 0x11, 0x00, 0x01, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	1,
+	0x22, 0xA3, 0xFF,
+	1,
+	0x22, 0xA2, 0x20,
+	24,
+	0x22, 0x8A, 0x01, 0x08, 0x12, 0x00, 0x72, 0x08, 0x61, 0x02, 0x61, 0x02, 0x72, 0x08, 0x12, 0x00, 0x01, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	1,
+	0x22, 0xA3, 0xFF
+};
+
+#define step6_scaler_Count 2321
+
+#endif //step6_scaler_H_
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/kg2/scripts/step4_INIT_OP_Flexiport_RGB24_or_YCbCr24_for_Dove_RG-swap.h
+++ linux-mvl-dove-2.6.32/drivers/video/display/kg2/scripts/step4_INIT_OP_Flexiport_RGB24_or_YCbCr24_for_Dove_RG-swap.h
@@ -0,0 +1,34 @@
+/*---------------------------------------------------------------------
+ * Copyright © 2008 by Marvell International Ltd.
+ * All rights reserved.
+ *---------------------------------------------------------------------
+ */
+/*---------------------------------------------------------------------
+ * Ini2h Tool Version 2.10, April 15 2009 Build
+ * Command            : "ini2h -i step4_INIT_OP_Flexiport_RGB24_or_YCbCr24_for_Dove_RG-swap.ini -o step4_INIT_OP_Flexiport_RGB24_or_YCbCr24_for_Dove_RG-swap.h -a step4_INIT_OP_Flexiport_RGB24_or_YCbCr24_for_Dove_RG-swap -c -t"
+ * Source Name        : step4_INIT_OP_Flexiport_RGB24_or_YCbCr24_for_Dove_RG-swap.ini
+ * Converted Name     : step4_INIT_OP_Flexiport_RGB24_or_YCbCr24_for_Dove_RG-swap.h
+ * Date Of Generation : November 06 2009, 10:33:45
+ *---------------------------------------------------------------------
+ */
+
+#ifndef _step4_INIT_OP_Flexiport_RGB24_or_YCbCr24_for_Dove_RG_swap_H_
+#define _step4_INIT_OP_Flexiport_RGB24_or_YCbCr24_for_Dove_RG_swap_H_
+
+
+const unsigned char step4_INIT_OP_Flexiport_RGB24_or_YCbCr24_for_Dove_RG_swap[] = {
+	1,
+	0x20, 0x00, 0x0D,
+	8,
+	0x22, 0x10, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B,
+	8,
+	0x22, 0x08, 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
+	8,
+	0x22, 0x00, 0x1C, 0x1D, 0x1E, 0x1F, 0x20, 0x21, 0x22, 0x23,
+	18,
+	0x22, 0x18, 0x2B, 0x2B, 0x2B, 0x2B, 0x2B, 0x2B, 0x2B, 0x2B, 0x2B, 0x2B, 0x2B, 0x2B, 0x24, 0x25, 0x2A, 0x27, 0x28, 0x2A
+};
+
+#define step4_INIT_OP_Flexiport_RGB24_or_YCbCr24_for_Dove_RG_swap_Count 58
+
+#endif //step4_INIT_OP_Flexiport_RGB24_or_YCbCr24_for_Dove_RG_swap_H_
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/kg2/scripts/step1_INIT_part1.h
+++ linux-mvl-dove-2.6.32/drivers/video/display/kg2/scripts/step1_INIT_part1.h
@@ -0,0 +1,132 @@
+/*---------------------------------------------------------------------
+ * Copyright © 2008 by Marvell International Ltd.
+ * All rights reserved.
+ *---------------------------------------------------------------------
+ */
+/*---------------------------------------------------------------------
+ * Ini2h Tool Version 2.10, April 15 2009 Build
+ * Command            : "ini2h -i step1_INIT_part1.ini -o step1_INIT_part1.h -a step1_INIT_part1 -c -t"
+ * Source Name        : step1_INIT_part1.ini
+ * Converted Name     : step1_INIT_part1.h
+ * Date Of Generation : November 06 2009, 10:33:45
+ *---------------------------------------------------------------------
+ */
+
+#ifndef _step1_INIT_part1_H_
+#define _step1_INIT_part1_H_
+
+
+const unsigned char step1_INIT_part1[] = {
+	1,
+	0x20, 0x00, 0x02,
+	1,
+	0x22, 0x00, 0x00,
+	1,
+	0x22, 0x80, 0x80,
+	1,
+	0x20, 0x00, 0x08,
+	1,
+	0x22, 0x40, 0x00,
+	1,
+	0x22, 0xE0, 0x00,
+	1,
+	0x22, 0xF0, 0x00,
+	1,
+	0x20, 0x00, 0x09,
+	1,
+	0x22, 0x00, 0x00,
+	1,
+	0x22, 0x80, 0x00,
+	1,
+	0x20, 0x00, 0x0A,
+	1,
+	0x22, 0x00, 0x00,
+	1,
+	0x22, 0x40, 0x01,
+	1,
+	0x22, 0x48, 0x00,
+	1,
+	0x20, 0x00, 0x02,
+	1,
+	0x22, 0x3A, 0x01,
+	1,
+	0x22, 0xF4, 0x3F,
+	1,
+	0x20, 0x00, 0x06,
+	1,
+	0x22, 0x00, 0x03,
+	1,
+	0x20, 0x00, 0x07,
+	1,
+	0x22, 0x00, 0x03,
+	1,
+	0x20, 0x00, 0x04,
+	2,
+	0x22, 0x20, 0x00, 0x00,
+	1,
+	0x20, 0x00, 0x0F,
+	11,
+	0x22, 0x00, 0x00, 0x00, 0x01, 0x00, 0x28, 0x14, 0x02, 0x1C, 0x00, 0x1A, 0x20,
+	11,
+	0x22, 0x1D, 0x04, 0x07, 0x03, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	1,
+	0x22, 0x2F, 0x26,
+	15,
+	0x22, 0x31, 0x00, 0x83, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0x00, 0x00, 0x01,
+	1,
+	0x20, 0x00, 0x04,
+	11,
+	0x22, 0x00, 0x0A, 0x03, 0x05, 0x03, 0x05, 0x05, 0x06, 0x04, 0xC9, 0x2B, 0xA0,
+	7,
+	0x22, 0x0C, 0x04, 0x12, 0x17, 0x02, 0x01, 0x00, 0x11,
+	14,
+	0x22, 0x14, 0x52, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xAA, 0x2E, 0xF0, 0x0A,
+	8,
+	0x22, 0x25, 0xFF, 0x80, 0x80, 0xFF, 0xFF, 0x80, 0x80, 0xFF,
+	1,
+	0x20, 0x00, 0x0D,
+	1,
+	0x22, 0x41, 0x12,
+	1,
+	0x22, 0x45, 0x12,
+	1,
+	0x20, 0x00, 0x04,
+	8,
+	0x22, 0xB4, 0x00, 0x00, 0x00, 0x00, 0xE3, 0x2C, 0x0D, 0x00,
+	1,
+	0x20, 0x00, 0x06,
+	24,
+	0x22, 0x08, 0xE3, 0x2E, 0x0D, 0x00, 0x63, 0x0C, 0x19, 0x00, 0xE4, 0xE9, 0x24, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x40, 0x00,
+	1,
+	0x20, 0x00, 0x07,
+	24,
+	0x22, 0x08, 0x64, 0xC9, 0x30, 0x00, 0xE4, 0xBD, 0x34, 0x00, 0x64, 0xB2, 0x38, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x40, 0x00,
+	1,
+	0x20, 0x00, 0x0F,
+	1,
+	0x22, 0x28, 0x80,
+	1,
+	0x22, 0x28, 0x80,
+	1,
+	0x22, 0x28, 0x00,
+	1,
+	0x22, 0x30, 0x4E,
+	1,
+	0x22, 0x28, 0x01,
+	7,
+	0x22, 0x28, 0x01, 0x13, 0x40, 0x05, 0x0D, 0xDD, 0x07,
+	1,
+	0x20, 0x00, 0x03,
+	1,
+	0x22, 0x6E, 0x00,
+	1,
+	0x22, 0x93, 0x00,
+	1,
+	0x20, 0x00, 0x0B,
+	1,
+	0x22, 0x26, 0x01
+};
+
+#define step1_INIT_part1_Count 346
+
+#endif //step1_INIT_part1_H_
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/kg2/scripts/step2_INIT_part2.h
+++ linux-mvl-dove-2.6.32/drivers/video/display/kg2/scripts/step2_INIT_part2.h
@@ -0,0 +1,96 @@
+/*---------------------------------------------------------------------
+ * Copyright © 2008 by Marvell International Ltd.
+ * All rights reserved.
+ *---------------------------------------------------------------------
+ */
+/*---------------------------------------------------------------------
+ * Ini2h Tool Version 2.10, April 15 2009 Build
+ * Command            : "ini2h -i step2_INIT_part2.ini -o step2_INIT_part2.h -a step2_INIT_part2 -c -t"
+ * Source Name        : step2_INIT_part2.ini
+ * Converted Name     : step2_INIT_part2.h
+ * Date Of Generation : November 06 2009, 10:33:45
+ *---------------------------------------------------------------------
+ */
+
+#ifndef _step2_INIT_part2_H_
+#define _step2_INIT_part2_H_
+
+
+const unsigned char step2_INIT_part2[] = {
+	1,
+	0x20, 0x00, 0x05,
+	1,
+	0x22, 0xAB, 0x00,
+	1,
+	0x22, 0xAA, 0x01,
+	1,
+	0x22, 0xAA, 0x00,
+	1,
+	0x22, 0xAA, 0x00,
+	1,
+	0x22, 0xAA, 0x01,
+	1,
+	0x22, 0xA9, 0x00,
+	1,
+	0x22, 0xA9, 0x01,
+	1,
+	0x22, 0xA9, 0x01,
+	1,
+	0x22, 0xA9, 0x00,
+	1,
+	0x22, 0x2D, 0x01,
+	1,
+	0x22, 0x39, 0x01,
+	5,
+	0x22, 0x6E, 0x00, 0x00, 0x00, 0x00, 0x00,
+	1,
+	0x22, 0x2D, 0x01,
+	1,
+	0x22, 0x39, 0x01,
+	1,
+	0x22, 0x2F, 0x50,
+	1,
+	0x22, 0x3B, 0x50,
+	2,
+	0x22, 0x24, 0x01, 0x01,
+	2,
+	0x22, 0x28, 0x01, 0x01,
+	5,
+	0x22, 0x6E, 0x00, 0x00, 0x00, 0x00, 0x00,
+	2,
+	0x22, 0x34, 0x02, 0x01,
+	2,
+	0x22, 0x40, 0x02, 0x01,
+	2,
+	0x22, 0x00, 0x07, 0x07,
+	2,
+	0x22, 0x04, 0x07, 0x07,
+	2,
+	0x22, 0x08, 0x0C, 0x0C,
+	2,
+	0x22, 0x0C, 0x02, 0x02,
+	4,
+	0x22, 0x5C, 0x0F, 0x0F, 0x0F, 0x0F,
+	12,
+	0x22, 0x73, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	12,
+	0x22, 0x84, 0x02, 0x02, 0x02, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x00, 0x00, 0x00,
+	2,
+	0x22, 0x30, 0x01, 0x00,
+	2,
+	0x22, 0x3C, 0x01, 0x00,
+	3,
+	0x22, 0xAC, 0x01, 0x01, 0x01,
+	7,
+	0x22, 0x93, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	4,
+	0x22, 0xB8, 0x0F, 0x0F, 0x0F, 0x0F,
+	5,
+	0x22, 0xBE, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F,
+	2,
+	0x22, 0xC5, 0x00, 0x00
+};
+
+#define step2_INIT_part2_Count 203
+
+#endif //step2_INIT_part2_H_
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/kg2/scripts/step5_Dove_1024x600_1080P.h
+++ linux-mvl-dove-2.6.32/drivers/video/display/kg2/scripts/step5_Dove_1024x600_1080P.h
@@ -0,0 +1,256 @@
+/*---------------------------------------------------------------------
+ * Copyright © 2008 by Marvell International Ltd.
+ * All rights reserved.
+ *---------------------------------------------------------------------
+ */
+/*---------------------------------------------------------------------
+ * Ini2h Tool Version 2.10, April 15 2009 Build
+ * Command            : "ini2h -i Dove_1024x600_1080P_new.ini -o step5_Dove_1024x600_1080P.h -a step5_Dove_1024x600_1080P -c -t"
+ * Source Name        : Dove_1024x600_1080P_new.ini
+ * Converted Name     : step5_Dove_1024x600_1080P.h
+ * Date Of Generation : November 25 2009, 15:35:36
+ *---------------------------------------------------------------------
+ */
+
+#ifndef _step5_Dove_1024x600_1080P_H_
+#define _step5_Dove_1024x600_1080P_H_
+
+
+const unsigned char step5_Dove_1024x600_1080P[] = {
+	1,
+	0x20, 0x00, 0x02,
+	1,
+	0x22, 0xF4, 0x3F,
+	1,
+	0x20, 0x00, 0x06,
+	1,
+	0x22, 0x00, 0x03,
+	1,
+	0x20, 0x00, 0x07,
+	1,
+	0x22, 0x00, 0x03,
+	1,
+	0x20, 0x00, 0x04,
+	2,
+	0x22, 0x20, 0x00, 0x00,
+	1,
+	0x20, 0x00, 0x0A,
+	1,
+	0x22, 0x43, 0x00,
+	1,
+	0x20, 0x00, 0x00,
+	3,
+	0x22, 0x03, 0x00, 0x1B, 0x04,
+	7,
+	0x22, 0x30, 0x01, 0x00, 0x07, 0x80, 0xB8, 0x1E, 0x45,
+	17,
+	0x22, 0x38, 0xB8, 0x1E, 0x45, 0x00, 0x05, 0x05, 0x00, 0x00, 0x00, 0x00, 0x15, 0x00, 0x07, 0x40, 0xF8, 0xC3, 0x25,
+	12,
+	0x22, 0x4A, 0xB8, 0x1E, 0x45, 0x00, 0x05, 0x05, 0x00, 0x00, 0x00, 0x05, 0x03, 0x03,
+	5,
+	0x22, 0x58, 0x66, 0x66, 0xE6, 0x00, 0x00,
+	7,
+	0x22, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	3,
+	0x22, 0x88, 0x00, 0x00, 0x00,
+	3,
+	0x22, 0x8C, 0x00, 0x00, 0x00,
+	3,
+	0x22, 0x90, 0x00, 0x00, 0x00,
+	19,
+	0x22, 0x94, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	3,
+	0x22, 0xA8, 0x00, 0x00, 0x00,
+	3,
+	0x22, 0xD7, 0x30, 0x00, 0x00,
+	1,
+	0x20, 0x00, 0x01,
+	37,
+	0x22, 0x00, 0xF0, 0x00, 0x15, 0x00, 0xF0, 0x04, 0x6D, 0x02, 0x00, 0x00, 0x06, 0x01, 0xCA, 0x20, 0x3C, 0x20, 0x25, 0x00, 0x6E, 0x01, 0x6D, 0x00, 0x18, 0x20, 0xEE, 0x20, 0x06, 0x01, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x0E, 0x10, 0x80,
+	10,
+	0x22, 0x56, 0x04, 0x0C, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC0, 0x00,
+	2,
+	0x22, 0x61, 0x05, 0x88,
+	1,
+	0x20, 0x00, 0x02,
+	29,
+	0x22, 0x00, 0x00, 0x30, 0x2D, 0xAD, 0x00, 0x0E, 0x00, 0x0E, 0x3B, 0x16, 0x1E, 0x08, 0x1E, 0x08, 0x03, 0x06, 0x12, 0x06, 0x12, 0x18, 0x18, 0x00, 0x2C, 0x38, 0x26, 0x3E, 0x2C, 0xEB, 0x64,
+	12,
+	0x22, 0x1E, 0xBE, 0x0A, 0x20, 0x43, 0x65, 0x87, 0x20, 0x43, 0x65, 0x87, 0x08, 0x23,
+	73,
+	0x22, 0x80, 0x90, 0x23, 0x11, 0x05, 0x0C, 0x03, 0x0C, 0x10, 0x30, 0x40, 0x3C, 0x03, 0x70, 0x00, 0x00, 0x06, 0x10, 0x20, 0x68, 0x54, 0x54, 0x20, 0x12, 0x08, 0x10, 0x06, 0x02, 0x03, 0x66, 0x20, 0x28, 0x28, 0x99, 0x44, 0x20, 0xAA, 0xAA, 0x99, 0x00, 0x19, 0x00, 0x16, 0x00, 0x10, 0x00, 0x17, 0x00, 0x14, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x19, 0x01, 0x19, 0x03, 0x03, 0xFF, 0x8F, 0x15, 0x20, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	8,
+	0x22, 0x35, 0x07, 0x0E, 0x00, 0x22, 0xE0, 0x01, 0x00, 0x00,
+	2,
+	0x22, 0xF2, 0x67, 0x60,
+	2,
+	0x22, 0xF6, 0x7F, 0x07,
+	1,
+	0x20, 0x00, 0x03,
+	42,
+	0x22, 0x00, 0x40, 0xE8, 0x77, 0x0F, 0x0A, 0x14, 0x00, 0x80, 0x00, 0x11, 0x00, 0x00, 0x56, 0xFF, 0x04, 0x8B, 0x10, 0x02, 0x12, 0x10, 0x02, 0x22, 0x18, 0x04, 0x22, 0x0D, 0x07, 0x02, 0x1E, 0x0A, 0x24, 0x30, 0x0F, 0x06, 0x48, 0x0A, 0x20, 0x06, 0x07, 0x0F, 0x02, 0x1E,
+	42,
+	0x22, 0x2C, 0x00, 0x60, 0x00, 0x00, 0x00, 0xC0, 0x00, 0x00, 0x00, 0x80, 0x01, 0x0D, 0x10, 0x14, 0x18, 0x12, 0x12, 0x12, 0x0C, 0x01, 0x20, 0x12, 0x00, 0x6F, 0x3F, 0x03, 0x00, 0x00, 0x00, 0x00, 0x7D, 0xEA, 0x08, 0x02, 0xFF, 0x14, 0x30, 0x0C, 0x04, 0x1D, 0xEA, 0x00,
+	43,
+	0x22, 0x58, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x18, 0x24, 0x54, 0x48, 0x24, 0x2A, 0x00, 0x2A, 0x00, 0x2A, 0xCA, 0x02, 0x00, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0E, 0x0F, 0x10, 0x10, 0x01, 0x08, 0x00, 0x00,
+	1,
+	0x20, 0x00, 0x04,
+	8,
+	0x22, 0xB4, 0x00, 0x00, 0x00, 0x00, 0xE4, 0x2C, 0x0D, 0x00,
+	1,
+	0x20, 0x00, 0x03,
+	27,
+	0x22, 0xE0, 0x51, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10, 0x0C, 0x00, 0x00,
+	1,
+	0x20, 0x00, 0x06,
+	3,
+	0x22, 0x01, 0x80, 0x03, 0x0F,
+	5,
+	0x22, 0x03, 0x00, 0x34, 0x14, 0x14, 0x14,
+	3,
+	0x22, 0x20, 0x00, 0x00, 0x00,
+	7,
+	0x22, 0x24, 0x00, 0x04, 0x58, 0x02, 0x58, 0x02, 0x00,
+	1,
+	0x22, 0x2D, 0x00,
+	10,
+	0x22, 0x60, 0x58, 0x02, 0x00, 0x04, 0x38, 0x04, 0x80, 0x07, 0x7F, 0x07,
+	3,
+	0x22, 0x6C, 0x8E, 0xE3, 0x08,
+	3,
+	0x22, 0x70, 0x88, 0x88, 0x08,
+	5,
+	0x22, 0x74, 0x00, 0x00, 0x00, 0x00, 0x00,
+	1,
+	0x22, 0x7B, 0x03,
+	6,
+	0x22, 0x7D, 0x00, 0x00, 0x80, 0x00, 0x00, 0x10,
+	3,
+	0x22, 0x84, 0x00, 0x00, 0x10,
+	2,
+	0x22, 0x88, 0x00, 0x00,
+	1,
+	0x22, 0xA5, 0x00,
+	1,
+	0x20, 0x00, 0x07,
+	3,
+	0x22, 0x01, 0x80, 0x03, 0x0F,
+	5,
+	0x22, 0x03, 0x00, 0x34, 0x14, 0x14, 0x14,
+	3,
+	0x22, 0x20, 0x00, 0x00, 0x00,
+	7,
+	0x22, 0x24, 0x00, 0x04, 0x58, 0x02, 0x58, 0x02, 0x00,
+	1,
+	0x22, 0x2D, 0x00,
+	10,
+	0x22, 0x60, 0x58, 0x02, 0x00, 0x04, 0x38, 0x04, 0x80, 0x07, 0x7F, 0x07,
+	3,
+	0x22, 0x6C, 0x8E, 0xE3, 0x08,
+	3,
+	0x22, 0x70, 0x88, 0x88, 0x08,
+	15,
+	0x22, 0x74, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1A, 0x1A, 0x03, 0xC8, 0x00, 0x00, 0x80, 0x00, 0x00, 0x10,
+	3,
+	0x22, 0x84, 0x00, 0x00, 0x10,
+	2,
+	0x22, 0x88, 0x00, 0x00,
+	2,
+	0x22, 0xA2, 0x11, 0xFF,
+	1,
+	0x22, 0xA5, 0x00,
+	1,
+	0x20, 0x00, 0x08,
+	18,
+	0x22, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02,
+	3,
+	0x22, 0x14, 0x00, 0x00, 0x00,
+	3,
+	0x22, 0x18, 0x00, 0x00, 0x00,
+	3,
+	0x22, 0x1C, 0x00, 0x00, 0x00,
+	1,
+	0x22, 0x20, 0x40,
+	4,
+	0x22, 0x22, 0x40, 0x00, 0xAC, 0x03,
+	19,
+	0x22, 0x2D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0xAA, 0xFF, 0xFF, 0x00, 0x00, 0xFF, 0x03, 0x0A, 0x04, 0x28, 0x1E, 0x14,
+	1,
+	0x22, 0x4B, 0xEB,
+	18,
+	0x22, 0x76, 0x64, 0x00, 0xF4, 0x01, 0x1C, 0x0C, 0xAC, 0x0D, 0x99, 0x01, 0x51, 0x00, 0x36, 0x87, 0x87, 0x36, 0x00, 0x00,
+	18,
+	0x22, 0xA0, 0xA2, 0x03, 0x00, 0x02, 0x01, 0x20, 0x5E, 0x20, 0x00, 0x02, 0xEB, 0x20, 0x00, 0x00, 0x00, 0x02, 0x15, 0x03,
+	3,
+	0x22, 0xB4, 0x14, 0x3A, 0x02,
+	3,
+	0x22, 0xB8, 0x8A, 0x14, 0x00,
+	3,
+	0x22, 0xBC, 0x50, 0x31, 0x02,
+	1,
+	0x22, 0xE0, 0x00,
+	5,
+	0x22, 0xF0, 0x00, 0x01, 0x00, 0x00, 0x00,
+	4,
+	0x22, 0xF6, 0x00, 0x00, 0x00, 0x00,
+	1,
+	0x20, 0x00, 0x09,
+	21,
+	0x22, 0x3C, 0x00, 0x12, 0x14, 0x03, 0x00, 0xE0, 0xEB, 0x58, 0x5E, 0x08, 0x00, 0xA0, 0xAE, 0x43, 0x50, 0xB1, 0x8A, 0x14, 0x14, 0xBA, 0x00,
+	7,
+	0x22, 0x80, 0x00, 0x82, 0x03, 0x04, 0x40, 0x01, 0x00,
+	1,
+	0x20, 0x00, 0x0A,
+	67,
+	0x22, 0x00, 0x00, 0x00, 0x40, 0x00, 0x64, 0x04, 0x97, 0x08, 0x00, 0x00, 0x00, 0x00, 0xD8, 0x07, 0x41, 0x04, 0xD8, 0x07, 0x04, 0x08, 0x3C, 0x04, 0x41, 0x04, 0xD8, 0x07, 0x04, 0x08, 0x3C, 0x04, 0x41, 0x04, 0x00, 0x00, 0x80, 0x07, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, 0x80, 0x07, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, 0x80, 0x07, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, 0x80, 0x07, 0x00, 0x00, 0x38, 0x04, 0x01, 0x0A, 0x10,
+	2,
+	0x22, 0x44, 0x80, 0x00,
+	3,
+	0x22, 0x48, 0x00, 0x00, 0x00,
+	4,
+	0x22, 0x4C, 0x00, 0x00, 0xFF, 0x0F,
+	8,
+	0x22, 0xA0, 0x00, 0x00, 0x80, 0x07, 0x00, 0x00, 0x38, 0x04,
+	1,
+	0x22, 0x50, 0x00,
+	40,
+	0x22, 0x52, 0x7F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0x00, 0xFF, 0x07,
+	3,
+	0x22, 0x90, 0x00, 0x00, 0x00,
+	3,
+	0x22, 0x94, 0x00, 0x00, 0x00,
+	3,
+	0x22, 0x98, 0x00, 0x00, 0x00,
+	1,
+	0x20, 0x00, 0x0D,
+	4,
+	0x22, 0x2A, 0x01, 0x00, 0x1E, 0x00,
+	1,
+	0x20, 0x00, 0x0F,
+	18,
+	0x22, 0x0B, 0x00, 0x20, 0x14, 0x07, 0x21, 0x00, 0x00, 0x1A, 0x00, 0x00, 0x20, 0x14, 0x07, 0x1A, 0x00, 0x00, 0x1A, 0x00,
+	1,
+	0x20, 0x00, 0x04,
+	1,
+	0x22, 0x13, 0x00,
+	1,
+	0x22, 0x13, 0x01,
+	1,
+	0x22, 0x13, 0x00,
+	1,
+	0x20, 0x00, 0x02,
+	1,
+	0x22, 0xF4, 0x58,
+	1,
+	0x20, 0x00, 0x06,
+	1,
+	0x22, 0x00, 0x00,
+	1,
+	0x20, 0x00, 0x07,
+	1,
+	0x22, 0x00, 0x00
+};
+
+#define step5_Dove_1024x600_1080P_Count 1206
+
+#endif //step5_Dove_1024x600_1080P_H_
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/ANX7150/HDMI_RX_DRV.h
+++ linux-mvl-dove-2.6.32/drivers/video/display/ANX7150/HDMI_RX_DRV.h
@@ -0,0 +1,1217 @@
+
+
+
+#ifndef HDMI_RX_h
+#define HDMI_RX_h
+
+//#include <stdio.h>
+//#include <stdarg.h>
+//#include "i2c_intf.h"
+//#include "HDMI_TX_i2c_intf.h"
+#include "ANX7150_i2c_intf.h"
+
+//#include "Timer.h"
+//#include "mcu.h"
+//#include "Uart_int.h"/'/
+
+//typedef unsigned int WORD;
+//typedef unsigned char BYTE;
+//typedef bit bool;
+
+#define HDMI_RX_FW_VER 0.70
+#define INPUT_PORT int //#define INPUT_PORT bool 
+
+#define ANX8770 0x00
+#define ANX8775 0x01
+
+#define DVI_MODE 0x00
+#define HDMI_MODE 0x01
+#define PORT0 0
+#define PORT1 1
+#define HDMI_PORT0 0x11
+#define HDMI_PORT1 0x22
+#define KILL_BOOST 0
+
+#define IntPin_Out_Type_open_drain 0x02
+#define IntPin_Out_Type_push_pull 0x00
+#define IntPin_Out_Polarity_Low 0x01
+#define IntPin_Out_Polarity_High 0x00
+#define HDMI_POWER_ON 0x00;
+#define HDMI_POWER_OFF 0x01;
+
+#define null_state 0x0a
+
+
+extern int enable_debug_output;//extern bool enable_debug_output;
+extern BYTE g_Sys_State,video_format_supported;
+extern int g_Video_Muted;//extern bool g_Video_Muted;
+extern int g_Audio_Muted;//extern bool g_Audio_Muted;
+extern BYTE hdmi_rx_chip_id;
+typedef enum {
+	_32KHz,
+	_44KHz,//44.1KHz
+	_48KHz,
+	_82KHz,
+	_96KHz,
+	_192KHz
+} HDMI_Audio_Fs;
+//extern HDMI_Audio_Fs *HDMI_AUD_Fs;
+
+typedef enum {
+	_128Fs,
+	_256Fs,
+	_384Fs,
+	_512Fs
+} HDMI_MCLK_Freq;
+//extern HDMI_MCLK_Freq *HDMI_MCLK_Fs;
+
+typedef struct{
+	BYTE I2S_enable;
+	BYTE SPDIF_enable;
+}HDMI_Audio_Mode;
+extern HDMI_Audio_Mode HDMI_AUD_Mode;
+
+typedef struct {
+	BYTE SCK_edge;
+	BYTE Size_Select;
+	BYTE MSB_SIGN_EXT;
+	BYTE WS_POL;
+	BYTE JUST_CTRL;
+	BYTE DIR_CTRL;
+	BYTE SHIFT;
+	BYTE Audio_Channel_Swap;
+} HDMI_I2S_Format;
+extern HDMI_I2S_Format HDMI_I2S_Fmt;
+
+typedef enum{
+       Hdmi_legacy,
+	Hdmi_24bit,
+	Hdmi_30bit,
+	Hdmi_36bit
+} HDMI_color_depth;
+//extern HDMI_color_depth *HDMI_Color_Depth;
+
+typedef struct {
+   BYTE Type;
+   BYTE Version;
+   BYTE Length;
+   BYTE CRC;
+   BYTE Data[30];
+} HDMI_Infoframe_Type;
+extern HDMI_Infoframe_Type HDMI_InfoFrame;
+
+typedef enum {
+	Monitor_CKDT = 1,
+	Wait_SCDT,
+	Wait_VIDEO,
+	Wait_AUDIO,
+	Playback
+}HDMI_System_State;
+extern HDMI_System_State *HDMI_SysState;
+
+typedef struct {
+  int H_Tot;
+  int V_Tol;
+  int H_Act;
+  int V_Act;
+  int V_Freq;
+  BYTE H_Front_Porch;
+  int Hsync_width;
+  BYTE V_Front_Porch;
+  BYTE V_Back_Porth;
+  BYTE HSYNC_POL;
+  BYTE VSYNC_POL;
+  BYTE pixel_repeat_times;
+} HDMI_Video_Detailed_Info_t;
+extern HDMI_Video_Detailed_Info_t HDMI_Vid_Info;
+
+typedef enum {
+   HDMI_SIGNAL_INTERLACED,
+   HDMI_SIGNAL_PROGRESSIVE
+} HDMI_interlace;
+//extern HDMI_interlace *HDMI_Intl;
+
+typedef enum {
+   HDMI_RGB,
+   HDMI_YCBCR422,
+   HDMI_YCBCR444
+} HDMI_color_space;
+//extern HDMI_color_space *HDMI_CS;
+
+
+
+//******************************************************************************
+//  F U N C T I O N     P R O T O T Y P E S
+//******************************************************************************
+void HDMI_RX_Mute_Video(void);
+void HDMI_RX_Mute_Audio(void);
+void HDMI_RX_Unmute_Video(void);
+void HDMI_RX_Unmute_Audio(void);
+void HDMI_RX_Initialize(void);
+void HDMI_RX_AVC_On(void);
+void HDMI_RX_Port_Select(INPUT_PORT Selected_Port);
+void HDMI_RX_Set_HPD(BYTE Port, int delaytime);
+void HDMI_RX_SoftReset(void);
+void HDMI_RX_VID_Output_Fmt(BYTE Vid_HW_Interface_fmt);
+void HDMI_RX_AUD_Output_Fmt(BYTE Aud_HW_Interface_fmt);
+void HDMI_RX_MCLK_Source(BYTE MCLK_Source);
+void HDMI_RX_Set_MCLK_Freq(BYTE MCLK_Fs_Relationship);
+//void HDMI_RX_I2S_Mode(bool SCK_EDGE, bool size_sel, bool msb_sign_ext,
+//        bool ws_pol, bool JUST_CTRL, bool DIR_CTRL, bool SHIFT1);
+void HDMI_RX_I2S_Mode(int SCK_EDGE, int size_sel, int msb_sign_ext,
+        int ws_pol, int JUST_CTRL, int DIR_CTRL, int SHIFT1);
+void HDMI_RX_Set_IntPin(BYTE Pin_Output_Type, 
+    BYTE Pin_Output_Polarity);
+void HDMI_RX_Set_IntMask(BYTE Int_ID, BYTE MaskBits);
+void HDMI_RX_Init_var(void);
+void HDMI_RX_Video_Timer_Slot(void);
+void HDMI_RX_Audio_Timer_Slot(void);
+void HDMI_RX_Timer_Slot2(void);
+void HDMI_RX_Set_Sys_State(BYTE ss);
+void HDMI_RX_Sync_Det_Int(void);
+void HDMI_RX_Cts_Rcv_Int(void);
+void HDMI_RX_Audio_Rcv_Int(void);
+void HDMI_RX_HDCP_Error_Int(void);
+void HDMI_RX_Aac_Done_Int(void);
+void HDMI_RX_HDMI_DVI_Int(void);
+void HDMI_RX_Get_Video_Info(void);
+char HDMI_RX_Is_Video_Change(void);
+void HDMI_RX_Restart_Audio_Chk(void);
+void HDMI_RX_Clk_Detected_Int(void);
+void HDMI_RX_Show_Video_Info(void);
+void HDMI_RX_New_AVI_Int(void);
+BYTE HDMI_RX_ReadI2C_RX0(BYTE sub_addr, BYTE *rxdata);
+BYTE HDMI_RX_WriteI2C_RX0(BYTE sub_addr, BYTE txdata);
+BYTE HDMI_RX_ReadI2C_RX1(BYTE sub_addr,  BYTE *rxdata);
+BYTE HDMI_RX_WriteI2C_RX1(BYTE sub_addr,  BYTE txdata);
+BYTE HDMI_RX_Chip_Located(void);
+void HDMI_RX_Int_Process(void);
+void HDMI_RX_Timer_Process(void);
+BYTE HDMI_RX_Get_Power_Status(void);
+void HDMI_RX_HardReset(void);
+BYTE HDMI_RX_Get_Port_Status(void);
+void HDMI_RX_Power_On(void);
+void HDMI_RX_Power_Off(void);
+BYTE HDMI_RX_Get_VID_Output_Fmt(void);
+BYTE HDMI_RX_Get_AUD_MCLK_Freq(void);
+BYTE HDMI_RX_Get_AUD_Fs(void);
+void HDMI_RX_Get_I2S_Info(void);
+void HDMI_RX_Get_AUD_HW_Interface_Fmt(void);
+BYTE HDMI_RX_Get_IntMask(BYTE Int_ID);
+BYTE HDMI_RX_Get_IntStatus(BYTE Int_ID);
+void HDMI_RX_Clear_Int(BYTE Int_ID, BYTE ClrBits);
+void HDMI_RX_Set_AEC_CtrlBits(BYTE AEC_ID, BYTE CtrlBits);
+void HDMI_RX_AVC_Off(void);
+void HDMI_RX_Set_Video_CH_Mapping(BYTE MappingValue);
+void HDMI_RX_Set_Color_Depth(BYTE ColorDepth);
+BYTE HDMI_RX_Get_Input_Color_Depth(void);
+BYTE HDMI_RX_Get_Output_Color_Depth(void);
+void HDMI_RX_Get_Infoframe(BYTE infoframe_type); 
+BYTE HDMI_RX_Get_SysState(void);
+int HDMI_RX_Get_HDMI_DVI_Mode(void);//bool HDMI_RX_Get_HDMI_DVI_Mode(void);
+int HDMI_RX_Get_Vid_H_Tol(void);
+int HDMI_RX_Get_Vid_V_Tol(void);
+int HDMI_RX_Get_Vid_H_Act(void);
+int HDMI_RX_Get_Vid_V_Act(void);
+int HDMI_RX_Get_Vid_V_Freq(void);
+BYTE HDMI_RX_Get_Vid_H_FrontPorch(void);
+int HDMI_RX_Get_Vid_Hsync_Width(void);
+BYTE HDMI_RX_Get_Vid_V_FrontPorch(void);
+BYTE HDMI_RX_Get_Vid_V_BackPorch(void);
+int HDMI_RX_Get_Vid_Vsync_Pol(void);//bool HDMI_RX_Get_Vid_Vsync_Pol(void);
+int HDMI_RX_Get_Vid_Hsync_Pol(void);//bool HDMI_RX_Get_Vid_Hsync_Pol(void);
+BYTE HDMI_RX_Get_Vid_Repeat_Times(void);
+BYTE HDMI_RX_Get_Vid_I_P(void);
+BYTE HDMI_RX_Get_Vid_CS(void);
+BYTE HDMI_RX_Get_Device_ID_Low(void);
+BYTE HDMI_RX_Get_Device_ID_High(void);
+BYTE HDMI_RX_Get_Device_Revision(void);
+BYTE HDMI_RX_Get_AEC_CtrlBits(BYTE AEC_id);
+void HDMI_RX_Set_Video_Bit_Swap(int swap_value);//void HDMI_RX_Set_Video_Bit_Swap(bool swap_value);
+void HDMI_RX_Set_Video_Bus_Mode(int bus_mode);//void HDMI_RX_Set_Video_Bus_Mode(bool bus_mode);
+void HDMI_RX_AUDIO_BIST(void);
+void HDMI_RX_Set_Color_Mode(void);
+
+//extern unsigned char sysState,sysState_bkp;
+
+/****************API Function begins***************************/
+
+/****************API Function ends***************************/
+
+//Use for digital video output fomat   
+#define RGB444 0x00
+#define RGB444_CLK48B 0x80
+#define YCbCr444 0x01
+#define YCbCr444_CLK48B 0x81
+#define YCbCR422 0x03
+#define YCbCr422_656 0x0b
+#define YCbCr422_YCMUX 0x07
+#define YCbCr422_656_YCMUX 0x0f
+
+#define POL_positive 1
+#define POL_negative 0
+
+//**************** User defines of chip configuration******************//
+
+// Analog video ouput enable
+#define ANALOG_VID_EN 0x00      //0x00  Disable analog video output
+                                //0x01  Enable analog video output
+
+#define VIDEO_OUTPUT_FORMAT RGB444
+
+#define Ext_MCLK_Selected      0x01
+#define HDMI_MCLK_Selected      0x00
+#define MCLK_Fs_128 0x00     // 0x00 Fmclk = 128*Fs
+#define MCLK_Fs_256 0x10                              // 0x10 Fmclk = 256*Fs
+#define MCLK_Fs_384 0x20                               // 0x20 Fmclk = 384*Fs
+#define MCLK_Fs_512 0x30                               // 0x30 Fmclk = 512*Fs
+
+#define I2S_Output_Selected    0x01
+#define SPDIF_Output_Selected  0x02
+#define I2SandSPDIF_Output_Selected 0x03
+
+#define I2S_SCK_EDGE_Rising 0
+#define I2S_SCK_EDGE_Falling 1
+#define I2S_Size_16bit 1
+#define I2S_Size_32bit 0
+#define I2S_MSB_SIGN_EXT_Enable 0
+#define I2S_MSB_SIGN_EXT_Disable 1
+#define I2S_WS_POL_Low 0 
+#define I2S_WS_POL_High 1
+#define I2S_JUST_CTRL_Left 0
+#define I2S_JUST_CTRL_Right 1
+#define I2S_DIR_CTRL_MSB 0
+#define I2S_DIR_CTRL_LSB 1
+#define I2S_SHIFT 0
+#define I2S_NO_SHIFT 1
+
+#define VID_MAP_Red_Green_Blue 0x00
+#define VID_MAP_Red_Blue_Green 0x01
+#define VID_MAP_Green_Red_Blue 0x02
+#define VID_MAP_Blue_Red_Green 0x03
+#define VID_MAP_Green_Blue_Red 0x04
+#define VID_MAP_Blue_Green_Red 0x05
+
+#define Deep_Color_legacy 0x00
+#define Deep_Color_24bit 0x40
+#define Deep_Color_30bit 0x50
+#define Deep_Color_36bit 0x60
+
+#define InfoFrame_AVI 0
+#define InfoFrame_AUD 1
+#define InfoFrame_SPD 2
+#define InfoFrame_ACP 3
+#define InfoFrame_MPEG 4
+
+//**************** End of User Defines ********************************//
+
+
+
+//Use For ANX STATE Machine //
+#define MONITOR_CKDT 0x01
+#define WAIT_SCDT 0x02
+#define WAIT_VIDEO 0x03
+#define WAIT_AUDIO 0x04
+#define PLAYBACK 0x05
+
+
+
+// Threshhold Time //
+#define VIDEO_STABLE_TH 3     
+#define AUDIO_STABLE_TH 1
+#define SCDT_EXPIRE_TH 10
+#define SCDT_EXPIRE_TH_1 5
+#define AFIFO_OV_TH 4
+#define AUTH_START_TH 1
+#define AUTH_TIMER_TH 20
+#define HDMI_RX_FIFO_TH 50   
+#define HDMI_RX_POP_NOISE_CNT 5
+#define HDMI_RX_POP_NOISE_TH 2
+
+#define HDMI_RX_CTS_ACR_CHANGE 0x38
+
+
+//*************************************************************
+//HDMI_RX Register define
+
+// Registers in address 0x60 
+#define HDMI_RX_DEV_IDL_REG 0x00
+#define HDMI_RX_DEV_IDH_REG 0x01
+#define HDMI_RX_DEV_REV_REG 0x02
+#define HDMI_RX_VND_IDL_REG 0x03
+#define HDMI_RX_VND_IDH_REG 0x04
+
+#define HDMI_RX_PORT_SEL_REG 0x10
+#define HDMI_RX_DDC1_EN	0x20		//bit	
+#define HDMI_RX_DDC0_EN 0x10
+#define HDMI_RX_TMDS1_EN 0x02
+#define HDMI_RX_TMDS0_EN 0x01
+
+#define HDMI_RX_SRST_REG 0x11
+#define HDMI_RX_VIDEO_RST 0x10		//BIT
+#define HDMI_RX_ACR_MAN_RST 0x08
+#define HDMI_RX_HDCP_MAN_RST 0X04
+#define HDMI_RX_TMDS_RST 0X02
+#define HDMI_RX_SW_MAN_RST 0X01
+
+#define HDMI_RX_SRST2_REG 0X12
+#define HDMI_RX_AFIFO_RST 0X10		//BIT
+#define HDMI_RX_VFIFO_RST 0X08
+#define HDMI_RX_DDC_RST 	0X04
+#define HDMI_RX_MISC_RST  0X02
+#define HDMI_RX_HW_RST		0X01
+
+#define HDMI_RX_SARST_REG 0X13
+#define HDMI_RX_DDC_RST_CTRL 0X10  		//BIT
+#define HDMI_RX_MISC_RST_CTRL 0X08
+#define HDMI_RX_ACR_RST_CTRL  0X04
+#define HDMI_RX_HDCP_RST_CTRL 0X02
+#define HDMI_RX_SW_RST_CTRL 	0X01
+
+#define HDMI_RX_SYS_STATUS_REG			0X14
+#define HDMI_RX_P1_PWR5V	0X80
+#define HDMI_RX_P0_PWR5V  0X40
+#define HDMI_RX_PWR5V			0X08
+#define HDMI_RX_VSYNC			0X04
+#define HDMI_RX_CLK_DET		0X02
+#define HDMI_RX_HDMI_DET  0X01
+
+#define HDMI_RX_HDMI_STATUS_REG	0X15
+#define HDMI_RX_DEEP_COLOR_MODE 0X40
+#define HDMI_RX_HDMI_AUD_LAYOUT 0X08
+#define HDMI_RX_MUTE_STAT				0X04
+#define HDMI_RX_HDMI_MODE				0X01
+
+#define HDMI_RX_HDMI_MUTE_CTRL_REG 0X16
+#define HDMI_RX_MUTE_POL	0X04
+#define HDMI_RX_AUD_MUTE	0X02
+#define HDMI_RX_VID_MUTE	0X01
+
+#define HDMI_RX_SYS_CTRL1_REG 0X17
+#define HDMI_RX_DV_BUS_MODE 0X04
+#define HDMI_RX_OUT_CLK_INV	0X02	
+#define HDMI_RX_I2C_CLK_SEL 0X01
+
+#define HDMI_RX_SYS_PWDN1_REG 0X18
+#define HDMI_RX_PWDN_CTRL	0X01
+
+#define HDMI_RX_SYS_PWDN2_REG 0X19
+#define HDMI_RX_PD_PCLK 0X80
+#define HDMI_RX_PD_MCLK 0X40
+#define HDMI_RX_PD_AO	0X20
+#define HDMI_RX_PD_VO 0X10
+#define HDMI_RX_PD_DV_OUT 0X04
+#define HDMI_RX_PD_SYNC_DE 0X02
+#define HDMI_RX_PD_DV_CLK 0X01
+
+#define HDMI_RX_SYS_PWDN3_REG 0X1A
+#define HDMI_RX_PD_TERM1 0X80
+#define HDMI_RX_PD_TERM0 0X40
+#define HDMI_RX_PD_APLL	0X20
+#define HDMI_RX_PD_TMDS 0X10
+#define HDMI_RX_PD_PLL  0X08
+#define HDMI_RX_PD_ALL  0X01
+
+#define HDMI_RX_PIO_CTRL_REG 0X1B
+#define HDMI_RX_PIO_DEV_ADDR_IN 0X40
+#define HDMI_RX_PIO_CLK_TEST_IN 0X20
+#define HDMI_RX_PIO_SPDIF_IN 0X10
+#define HDMI_RX_PIO_CLK_TEST_PIN_EN 0X08
+#define HDMI_RX_PIO_SPDIF_PIN_EN 0X04
+#define HDMI_RX_PIO_CLK_TEST_PIN 0X02
+#define HDMI_RX_PIO_SPDIF_PIN 0X01
+
+#define HDMI_RX_AEC_CTRL_REG 0X20		//9021:B5
+#define HDMI_RX_AVC_OE 0X20
+#define HDMI_RX_AAC_OE 0X10
+#define HDMI_RX_AVC_EN 0X02
+#define HDMI_RX_AAC_EN 0X01
+
+#define HDMI_RX_VID_AOF_REG 0X21		//9021:5F
+
+#define HDMI_RX_AVC_EXCEPTION_MASK1_REG 0X22
+#define HDMI_RX_DOWN_SAMPLE_MASK 0X80
+#define HDMI_RX_UP_SAMPLE_MASK 0X40
+#define HDMI_RX_Y2R_BT709_EN_MASK 0X20
+#define HDMI_RX_RANGE_Y2R_MASK 0X10
+#define HDMI_RX_CSPACE_Y2R_MASK 0X08
+#define HDMI_RX_R2Y_BT709_EN_MASK 0X04
+#define HDMI_RX_RANGE_R2Y_MASK 0X02
+#define HDMI_RX_CSPACE_R2Y_MASK 0X01
+
+#define HDMI_RX_AVC_EXCEPTION_MASK2_REG 0X23
+#define HDMI_RX_OUT_CLK_DIV_MASK 0X40
+#define HDMI_RX_PIXEL_REP_MASK 0X20
+#define HDMI_RX_BLANK_MASK 0X10
+#define HDMI_RX_EMBED_SYNC_MASK 0X08
+#define HDMI_RX_MUX_YC_MASK 0X04
+
+#define HDMI_RX_AEC_EN0_REG 0X24 //0XB6
+#define HDMI_RX_AEC_EN07 0X80
+#define HDMI_RX_AEC_EN06 0X40
+#define HDMI_RX_AEC_EN05 0X20
+#define HDMI_RX_AEC_EN04 0X10
+#define HDMI_RX_AEC_EN03 0X08
+#define HDMI_RX_AEC_EN02 0X04
+#define HDMI_RX_AEC_EN01 0X02
+#define HDMI_RX_AEC_EN00 0X01
+
+#define HDMI_RX_AEC_EN1_REG 0X25
+#define HDMI_RX_AEC_EN15 0X80
+#define HDMI_RX_AEC_EN14 0X40
+#define HDMI_RX_AEC_EN13 0X20
+#define HDMI_RX_AEC_EN12 0X10
+#define HDMI_RX_AEC_EN11 0X08
+#define HDMI_RX_AEC_EN10 0X04
+#define HDMI_RX_AEC_EN09 0X02
+#define HDMI_RX_AEC_EN08 0X01
+
+#define HDMI_RX_AEC_EN2_REG 0X26
+#define HDMI_RX_AEC_EN23 0X80
+#define HDMI_RX_AEC_EN22 0X40
+#define HDMI_RX_AEC_EN21 0X20
+#define HDMI_RX_AEC_EN20 0X10
+#define HDMI_RX_AEC_EN19 0X08
+#define HDMI_RX_AEC_EN18 0X04
+#define HDMI_RX_AEC_EN17 0X02
+#define HDMI_RX_AEC_EN16 0X01
+
+#define HDMI_RX_INT_STATE_REG 0X30
+#define HDMI_RX_INTR 0X01
+
+#define HDMI_RX_INT_STATUS1_REG 0X31
+#define HDMI_RX_HDMI_DVI 0X80
+#define HDMI_RX_CKDT_CHANGE 0X40
+#define HDMI_RX_SCDT_CHANGE 0X20
+#define HDMI_RX_PCLK_CHANGE 0X10
+#define HDMI_RX_PLL_UNLOCK  0X08
+#define HDMI_RX_CABLE_UNPLUG 0X04
+#define HDMI_RX_SET_MUTE 0X02
+#define HDMI_RX_SW_INTR 0X01
+
+#define HDMI_RX_INT_STATUS2_REG 0X32
+#define HDMI_RX_AUTH_START 0X80
+#define HDMI_RX_AUTH_DONE 0X40
+#define HDMI_RX_HDCP_ERR 0X20
+#define HDMI_RX_ECC_ERR 0X10
+#define HDMI_RX_SPDIF_ERR 0X08
+#define HDMI_RX_AUD_LINK_ERR 0X04
+#define HDMI_RX_MUTE_DONE 0X02
+#define HDMI_RX_FS_CHANGE 0X01
+
+#define HDMI_RX_INT_STATUS3_REG 0X33
+#define HDMI_RX_AFIFO_FULL 0X80
+#define HDMI_RX_AFIFO_EMPTY 0X40
+#define HDMI_RX_AFIFO_OVERFLOW 0X20
+#define HDMI_RX_AFIFO_UNDERFLOW 0X10
+#define HDMI_RX_ACR_PLL_UNLOCK 0X08
+#define HDMI_RX_STATIC_DSD 0X04
+#define HDMI_RX_INVALID_DSD 0X02
+#define HDMI_RX_AUD_MODE_CHANGE 0X01
+
+#define HDMI_RX_INT_STATUS4_REG 0X34
+#define HDMI_RX_VSYNC_DET 0X80
+#define HDMI_RX_SYNC_POL_CHANGE 0X40
+#define HDMI_RX_V_RES_CHANGE 0X20
+#define HDMI_RX_H_RES_CHANGE 0X10
+#define HDMI_RX_I_P_CHANGE 0X08
+#define HDMI_RX_DP_CHANGE 0X04
+#define HDMI_RX_COLOR_DEPTH_CHANGE 0X02
+#define HDMI_RX_COLOR_MODE_CHANGE 0X01
+
+#define HDMI_RX_INT_STATUS5_REG 0X35
+#define HDMI_RX_VFIFO_OVERFLOW 0X80
+#define HDMI_RX_VFIFO_UNDERFLOW 0X40
+#define HDMI_RX_ACR_CTS 0X20
+#define HDMI_RX_ACR_N 0X10
+#define HDMI_RX_CTS_N_ERR 0X08
+#define HDMI_RX_APACKET_ECC_ERR 0X04
+#define HDMI_RX_NO_AVI 0X02
+#define HDMI_RX_AUDIO_RCV 0X01
+
+#define HDMI_RX_INT_STATUS6_REG 0X36
+#define HDMI_RX_CTS_RCV 0X80
+#define HDMI_RX_NEW_UNR_PKT 0X40
+#define HDMI_RX_NEW_MPEG 0X20
+#define HDMI_RX_NEW_AUD 0X10
+#define HDMI_RX_NEW_SPD 0X08
+#define HDMI_RX_NEW_ACP 0X04
+#define HDMI_RX_NEW_AVI 0X02
+#define HDMI_RX_NEW_CP  0X01
+
+#define HDMI_RX_INT_STATUS7_REG 0X37
+#define HDMI_RX_REF_CLK_CHG 0X04
+#define HDMI_RX_CEC_RX_READY 0X02
+#define HDMI_RX_CEC_TX_DONE 0X01
+
+#define HDMI_RX_ECC_CTRL_REG 0X3E
+
+#define HDMI_RX_PACKET_RECEIVING_INDUCED_INT_CTRL_REG 0X3F
+#define HDMI_RX_NEW_UNR 0X40
+#define HDMI_RX_NEW_MPEG 0X20
+#define HDMI_RX_NEW_AUD 0X10
+#define HDMI_RX_NEW_SPD 0X08
+#define HDMI_RX_NEW_ACP 0X04
+#define HDMI_RX_NEW_AVI 0X02
+
+#define HDMI_RX_INT_CTRL_REG 0X40
+#define HDMI_RX_SOFT_INTR 0X04
+#define HDMI_RX_INTR_TYPE 0X02
+#define HDMI_RX_INTR_POL  0X01
+
+#define HDMI_RX_INT_MASK1_REG 0X41
+#define HDMI_RX_INT_MASK2_REG 0X42
+#define HDMI_RX_INT_MASK3_REG 0X43
+#define HDMI_RX_INT_MASK4_REG 0X44
+#define HDMI_RX_INT_MASK5_REG 0X45
+#define HDMI_RX_INT_MASK6_REG 0X46
+#define HDMI_RX_INT_MASK7_REG 0X47
+
+#define HDMI_RX_TMDS_P0_EQ_REG 0X50
+#define HDMI_RX_TMDS_P1_EQ_REG 0X51
+#define HDMI_RX_TMDS_EQ2_REG 0X52
+
+#define HDMI_RX_TMDS_EQ_VCOM_REG 0X53
+#define HDMI_RX_HI_BOOST 0X20
+#define HDMI_RX_EQCOM_BYPASS 0X10
+
+#define HDMI_RX_TMDS_RX_TERMINATION_CTRL_REG 0X54
+#define HDMI_RX_CLK_TEST_EN 0X08
+
+#define HDMI_RX_TMDS_PLL_CTRL1_REG 0X55
+#define HDMI_RX_CPREG_BLEED 0X20
+
+#define HDMI_RX_TMDS_PLL_CTRL2_REG 0X56
+
+#define HDMI_RX_TMDS_DLL_CTRL_REG 0X57
+#define HDMI_RX_CH2_DLL_HSP_TH 0X20
+#define HDMI_RX_CH2_DLL_LSP_TH 0X10
+#define HDMI_RX_CH1_DLL_HSP_TH 0X08
+#define HDMI_RX_CH1_DLL_LSP_TH 0X04
+#define HDMI_RX_CH0_DLL_HSP_TH 0X02
+#define HDMI_RX_CH0_DLL_LSP_TH 0X01
+
+#define HDMI_RX_TMDS_MANUAL_CTRL_REG 0X58
+#define HDMI_RX_MAN_RST 0X08
+#define HDMI_RX_PLL_RST 0X04
+#define HDMI_RX_DLL_RST 0X02
+#define HDMI_RX_PLL_DONE 0X01
+
+#define HDMI_RX_TMDS_TEST_CTRL_REG 0X59
+#define HDMI_RX_PLL_TEST_EN 0X08
+#define HDMI_RX_DLL_CH2_TEST_EN 0X04
+#define HDMI_RX_DLL_CH1_TEST_EN 0X02
+#define HDMI_RX_DLL_CH0_TEST_EN 0X01
+
+#define HDMI_RX_TMDS_DEBUG_REG 0X5A
+#define HDMI_RX_SEL_DVDD 0X80
+#define HDMI_RX_BG_SEL 0X10
+
+#define HDMI_RX_TMDS_PLL_RANGE_CTRL_REG 0X5B
+#define HDMI_RX_MISC_LONG_TIMER 0X80
+#define HDMI_RX_MAN_RNG 0X10
+#define HDMI_RX_PLL_RNG 0X08
+#define HDMI_RX_CH2_DLL_RNG 0X04
+#define HDMI_RX_CH1_DLL_RNG 0X02
+#define HDMI_RX_CH0_DLL_RNG 0X01
+
+#define HDMI_RX_TMDS_PLL_RNG_STATUS_REG 0X5C
+#define HDMI_RX_AUTO_PLL_TH 0X80
+#define HDMI_RX_AUTO_DLL_TH 0X40
+#define HDMI_RX_PLL_LOCK 0X20
+#define HDMI_RX_DLL_LOCK 0X10
+#define HDMI_RX_PLL_HSPO 0X08
+#define HDMI_RX_CH2_DLL_HSPO 0X04
+#define HDMI_RX_CH1_DLL_HSPO 0X02
+#define HDMI_RX_CH0_DLL_HSPO 0X01
+
+#define HDMI_RX_TMDS_PLL_PCLK_STATUS_REG 0X5D
+
+#define HDMI_RX_TMDS_CLK_TEST_REG 0X5E
+#define HDMI_RX_TMDS_CLK_SEL 0X40
+#define HDMI_RX_SEL_FBC 0X20
+#define HDMI_RX_TESTCK_EN 0X10
+
+#define HDMI_RX_TMDS_SWING_DET_REG 0X5F
+#define HDMI_RX_SWDET_PD 0X20
+#define HDMI_RX_SWDET_RST 0X10
+#define HDMI_RX_SWING_DET 0X01
+
+#define HDMI_RX_TIMING_LOOP_CNFG1_REG 0X60
+
+#define HDMI_RX_TIMING_LOOP_CNFG2_REG 0X61
+#define HDMI_RX_INV_PHASE 0X08
+#define HDMI_RX_PHASE_EN 0X04
+#define HDMI_RX_SNDLOOP_OFF 0X02
+
+#define HDMI_RX_TMDS_CH0_SYNC_STATUS_REG 0X62
+#define HDMI_RX_TMDS_CH1_SYNC_STATUS_REG 0X63
+#define HDMI_RX_TMDS_CH2_SYNC_STATUS_REG 0X64
+
+#define HDMI_RX_TMDS_CH_ALIGNMENT_STATUS_REG 0X65
+
+#define HDMI_RX_ECC_ERR_CNT_REG 0X66
+#define HDMI_RX_CAP_CNT 0X80
+
+#define HDMI_RX_REF_CLK_MONITOR_REG 0X67
+#define HDMI_RX_MON_REF_CLK 0X80
+#define HDMI_RX_MON_REF_CLK_MODE 0X40
+
+#define HDMI_RX_VIDEO_STATUS_REG 0X70
+#define HDMI_RX_DEFAULT_PHASE 0X08
+#define HDMI_RX_VIDEO_TYPE 0X04
+#define HDMI_RX_VSYNC_POL 0X02
+#define HDMI_RX_HSYNC_POL 0X01
+
+#define HDMI_RX_H_RESL_REG 0X71
+#define HDMI_RX_H_RESH_REG 0X72
+#define HDMI_RX_V_RESL_REG 0X73
+#define HDMI_RX_V_RESH_REG 0X74
+
+#define HDMI_RX_DE_PIXL_REG 0X75
+#define HDMI_RX_DE_PIXH_REG 0X76
+#define HDMI_RX_DE_LINL_REG 0X77
+#define HDMI_RX_DE_LINH_REG 0X78
+
+#define HDMI_RX_VSYNC_TO_ACTIVE_LIN_REG 0X79
+#define HDMI_RX_ACTIVE_LIN_TO_VSYNC_REG 0X7A
+#define HDMI_RX_H_FRONT_PORCH_REG 0X7B
+#define HDMI_RX_HSYNC_ACTIVE_WIDTHL_REG 0X7C
+#define HDMI_RX_HSYNC_ACTIVE_WIDTHH_REG 0X7D
+
+#define HDMI_RX_VIDEO_MODE1_REG 0X80
+#define HDMI_RX_CSC_BT709_EN 0X10
+#define HDMI_RX_RANGE_Y2R 0X08
+#define HDMI_RX_CSPACE_Y2R 0X04
+#define HDMI_RX_RANGE_R2Y 0X02
+#define HDMI_RX_CSPACE_R2Y 0X01
+
+#define HDMI_RX_VIDEO_MODE2_REG 0X81
+#define HDMI_RX_VID_DS_MODE 0X08
+#define HDMI_RX_VID_US_MODE 0X04
+#define HDMI_RX_UP_SAMPLE 0X02
+#define HDMI_RX_DOWN_SAMPLE 0X01
+
+#define HDMI_RX_VID_PROCESSING_CTRL_REG 0X82
+#define HDMI_RX_BRU_EN 0X80
+#define HDMI_RX_BRU_RND_DIR 0X10
+#define HDMI_RX_BACK_PORCH_MODE 0X04
+#define HDMI_RX_DE_DELAY 0X02
+#define HDMI_RX_INV_FIELD 0X01
+
+#define HDMI_RX_VID_DATA_RNG_CTRL_REG 0X83
+#define HDMI_RX_YC_LIMT 0X10
+#define HDMI_RX_OUTPUT_LIMIT_EN 0X08
+#define HDMI_RX_OUTPUT_LIMIT_RANGE 0X04
+#define HDMI_RX_R2Y_INPUT_LIMIT 0X02
+#define HDMI_RX_XVYCC_LIMIT 0X01
+
+#define HDMI_RX_VID_OUTPUT_CTRL1_REG 0X84
+#define HDMI_RX_INV_VSYNC 0X80
+#define HDMI_RX_INV_HSYNC 0X40
+#define HDMI_RX_CLK48B_POL 0X20
+#define HDMI_RX_EMBED_SYNC 0X02
+#define HDMI_RX_MUX_YC 0X01
+
+#define HDMI_RX_VID_OUTPUT_CTRL2_REG 0X85
+#define HDMI_RX_BIT_SWAP 0X08
+#define HDMI_RX_BUS_MODE 0X04
+#define HDMI_RX_O_YC422 0X02
+#define HDMI_RX_O_YCBCR 0X01
+
+#define HDMI_RX_VID_DDR_OUTPUT_CTRL_REG 0X86
+#define HDMI_RX_O_DDR_POL 0X10
+#define HDMI_RX_O_DDR_REV 0X02
+#define HDMI_RX_O_DDR_MODE 0X01
+
+#define HDMI_RX_CH1_VID_BLANK_REG 0X87
+#define HDMI_RX_CH2_VID_BLANK_REG 0X88
+#define HDMI_RX_CH3_VID_BLANK_REG 0X89
+
+#define HDMI_RX_VID_CH_MAP_REG 0X8A
+
+#define HDMI_RX_VID_PCLK_CNTR_REG 0X8B
+
+#define HDMI_RX_ACR_CTRL1_REG 0XA0
+#define HDMI_RX_DSM_MODE_SEL 0X80
+#define HDMI_RX_CTS_SEL 0X10
+#define HDMI_RX_N_SEL 0X08
+#define HDMI_RX_LPF_SEL 0X04
+#define HDMI_RX_N_FIX_MODE 0X02
+#define HDMI_RX_MCLK_SEL 0X01
+
+#define HDMI_RX_ACR_CTRL2_REG 0XA1
+
+#define HDMI_RX_ACR_AUD_FS_REG 0XA2
+
+#define HDMI_RX_ACR_N_SOFTWARE_VALUE1_REG 0XA3
+#define HDMI_RX_ACR_N_SOFTWARE_VALUE2_REG 0XA4
+#define HDMI_RX_ACR_N_SOFTWARE_VALUE3_REG 0XA5
+
+#define HDMI_RX_ACR_N_HARDWARE_VALUE1_REG 0XA6
+#define HDMI_RX_ACR_N_HARDWARE_VALUE2_REG 0XA7
+#define HDMI_RX_ACR_N_HARDWARE_VALUE3_REG 0XA8
+
+#define HDMI_RX_ACR_CTS_SOFTWARE_VALUE1_REG 0XA9
+#define HDMI_RX_ACR_CTS_SOFTWARE_VALUE2_REG 0XAA
+#define HDMI_RX_ACR_CTS_SOFTWARE_VALUE3_REG 0XAB
+
+#define HDMI_RX_ACR_CTS_HARDWARE_VALUE1_REG 0XAC
+#define HDMI_RX_ACR_CTS_HARDWARE_VALUE2_REG 0XAD
+#define HDMI_RX_ACR_CTS_HARDWARE_VALUE3_REG 0XAE
+
+#define HDMI_RX_ACR_FRACTIONAL_INTEGER_PORTION_REG 0XAF
+#define HDMI_RX_ACR_FRACTIONAL_INTEGER_PORTION1_REG 0XB0
+#define HDMI_RX_ACR_FRACTIONAL_INTEGER_PORTION2_REG 0XB1
+#define HDMI_RX_ACR_FRACTIONAL_INTEGER_PORTION3_REG 0XB2
+
+#define HDMI_RX_ACR_PLL_DEBUG1_REG 0XB3
+#define HDMI_RX_TEST_EN 0X08
+
+#define HDMI_RX_ACR_PLL_DEBUG2_REG 0XB4
+#define HDMI_RX_CP_REG_CTRL 0X10
+#define HDMI_RX_AUD_PLL_RST 0X01
+
+#define HDMI_RX_ACR_CTRL3_REG 0XB5
+#define HDMI_RX_AUTO_CTS_EN 0X10
+
+#define HDMI_RX_ACR_HARDWARE_EXTRACTED_FS_REG 0XB6
+#define HDMI_RX_CTS_ADJUST_STEP_REG 0XB7 
+#define HDMI_RX_CTS_ADJUST_INTERVAL_REG 0XB8
+#define HDMI_RX_DELTA_CTS_REG 0XB9
+
+#define HDMI_RX_AUD_SAMPLE_CNTR1_REG 0XBA
+#define HDMI_RX_AUD_SAMPLE_CNTR2_REG 0XBB
+
+#define HDMI_RX_CLK_RNG_OFFSET_REG 0XBC
+
+#define HDMI_RX_CLK_RNG_CNTR1_REG 0XBD
+#define HDMI_RX_K1_SEL 0X80
+#define HDMI_RX_CLK_RNG_SEL 0X08
+
+#define HDMI_RX_CLK_RNG_CNTR2_REG 0XBE
+
+#define HDMI_RX_ACR_DEBUG_REG 0XBF
+
+#define HDMI_RX_MCLK_FREQUENCY_CNTR_REG 0XC0
+#define HDMI_RX_DSD_MUTE_PATTERN_REG 0XC1
+
+#define HDMI_RX_DSD_AUD_CTRL_REG 0XC2
+#define HDMI_RX_DSD_MODE 0X02
+#define HDMI_RX_DSD_SCK_EDGE 0X01
+
+#define HDMI_RX_AUD_OUT_I2S_CTRL1_REG 0XC3
+#define HDMI_RX_SCK_EDGE 0X40
+#define HDMI_RX_SIZE_SEL 0X20
+#define HDMI_RX_MSB_SIGN_EXT 0X10
+#define HDMI_RX_WS_POL 0X08
+#define HDMI_RX_JUST_CTRL 0X04
+#define HDMI_RX_DIR_CTRL 0X02
+#define HDMI_RX_SHIFT1 0X01
+
+#define HDMI_RX_AUD_OUT_I2S_CTRL2_REG 0XC4
+#define HDMI_RX_SD3_EN 0X80
+#define HDMI_RX_SD2_EN 0X40
+#define HDMI_RX_SD1_EN 0X20
+#define HDMI_RX_SD0_EN 0X10
+#define HDMI_RX_MCLK_EN 0X08
+#define HDMI_RX_VUCP_EN 0X02
+#define HDMI_RX_PCM_DET 0X01
+
+#define HDMI_RX_AUD_OUT_I2S_MAP_REG 0XC5
+
+#define HDMI_RX_AUDIO_OUT_CTRL_REG 0XC6
+#define HDMI_RX_LENOV 0X80
+#define HDMI_RX_HBR_CHST_MODE 0X40
+#define HDMI_RX_SOFT_MUTE_EN 0X20
+#define HDMI_RX_PASS_SPDIF_ERR 0X10
+#define HDMI_RX_PASS_AUDIO_ERR 0X08
+#define HDMI_RX_I2S_MODE 0X04
+#define HDMI_RX_SP_MODE 0X02 
+#define HDMI_RX_SP_EN 0X01
+
+#define HDMI_RX_AUD_IN_SPDIF_CH_STATUS1_REG 0XC7
+#define HDMI_RX_SW_CPRGT 0X04
+#define HDMI_RX_NON_PCM 0X02
+#define HDMI_RX_PROF_APP 0X01
+
+#define HDMI_RX_AUD_IN_SPDIF_CH_STATUS2_REG 0XC8
+#define HDMI_RX_AUD_IN_SPDIF_CH_STATUS3_REG 0XC9
+#define HDMI_RX_AUD_IN_SPDIF_CH_STATUS4_REG 0XCA
+#define HDMI_RX_AUD_IN_SPDIF_CH_STATUS5_REG 0XCB
+
+#define HDMI_RX_AUD_SWAP_OVERWRITE_REG 0XCC
+#define HDMI_RX_SW3 0X80
+#define HDMI_RX_SW2 0X40
+#define HDMI_RX_SW1 0X20
+#define HDMI_RX_SW0 0X10
+#define HDMI_RX_OW_B2 0X04
+#define HDMI_RX_OW_CHEN 0X01
+
+#define HDMI_RX_AUD_CHST5_OVERWRITE_REG 0XCD
+#define HDMI_RX_AUD_CH_MUTE_REG 0XCE
+#define HDMI_RX_CH3_MU 0X08
+#define HDMI_RX_CH2_MU 0X04
+#define HDMI_RX_CH1_MU 0X02
+#define HDMI_RX_CH0_MU 0X01
+
+#define HDMI_RX_CEC_CTRL_REG 0XD0
+#define HDMI_RX_CEC_RX_EN 0X08
+#define HDMI_RX_CEC_TX_ST 0X04
+#define HDMI_RX_CEC_PIN_SEL 0X02
+#define HDMI_RX_CEC_RST 0X01
+
+#define HDMI_RX_CEC_RX_STATUS_REG 0XD1
+#define HDMI_RX_CEC_RX_BUSY 0X80
+#define HDMI_RX_CEC_RX_FULL 0X20
+#define HDMI_RX_CEC_RX_EMP 0X10
+
+#define HDMI_RX_CEC_TX_STATUS_REG 0XD2
+#define HDMI_RX_CEC_TX_BUSY 0X80
+#define HDMI_RX_CEC_TX_FAIL 0X40
+#define HDMI_RX_CEC_TX_FULL 0X20
+#define HDMI_RX_CEC_TX_EMP 0X10
+
+#define HDMI_RX_CEC_FIFO_REG 0XD3
+
+#define HDMI_RX_CEC_SPEED_CTRL_REG 0XD4
+
+#define HDMI_RX_TMDS_PRBS_TEST_REG 0XE0
+#define HDMI_RX_PRBS_TEST_EN 0X80
+
+#define HDMI_RX_HDMI_CRITERIA_REG 0XE1
+
+#define HDMI_RX_HDCP_EN_CRITERIA_REG 0XE2
+#define HDMI_RX_ENC_EN_MODE 0X20
+
+#define HDMI_RX_CHIP_CTRL_REG 0XE3
+#define HDMI_RX_FIFO_START_METHOD 0X20
+#define HDMI_RX_FIFO_AUTO_ADJ 0X10
+#define HDMI_RX_MAN_HDMI5V_DET 0X08
+#define HDMI_RX_PLLLOCK_CKDT_EN 0X04
+#define HDMI_RX_ANALOG_CKDT_EN 0X02
+#define HDMI_RX_DIGITAL_CKDT_EN 0X01
+
+#define HDMI_RX_HARDWARE_REG 0XE4
+#define HDMI_RX_MAN_OSCCLK_DET 0X80
+#define HDMI_RX_CHIP_DEBUG_SEL 0X40
+#define HDMI_RX_CHIP_DEBUG_EN 0X20
+#define HDMI_RX_AUD_FIFO_ENFORCE 0X10
+
+#define HDMI_RX_AUD_SOFTMUTE_CTRL_REG 0XE5
+#define HDMI_RX_UNMUTE_CTRL_EN 0X40
+#define HDMI_RX_UNMUTE_ON_VSYNC 0X20
+#define HDMI_RX_UNMUTE_ON_DE 0X10
+#define HDMI_RX_MUTE_DOWN_INT_ON_UNMUTE 0X08
+
+#define HDMI_RX_AUD_FIFO_CTRL_REG 0XE6
+
+#define HDMI_RX_AUD_FIFO_CTRL2_REG 0XE7
+
+#define HDMI_RX_PACKET_DECODE_CTRL_REG 0XE8
+#define HDMI_RX_AUTO_STOP_DEC_ON_HDCPERR 0X02
+#define HDMI_RX_STOP_DEC 0X01
+
+#define HDMI_RX_HDCP_KEY_STATUS_REG 0XE9
+#define HDMI_RX_BIST_ERR 0X02
+#define HDMI_RX_CMD_DONE 0X01
+
+#define HDMI_RX_HDCP_KEY_COMMAND_REG 0XEA 
+#define HDMI_RX_AUTO_BIST 0X80
+
+#define HDMI_RX_DEEP_COLOR_DEBUG_REG 0XEB
+#define HDMI_RX_VFIFO_OVERFLOW 0X80
+#define HDMI_RX_VFIFO_UNDERFLOW 0X40
+#define HDMI_RX_VFIFO_TMDS_PHASE_MATCH 0X20
+#define HDMI_RX_VFIFO_SYNC_ERR 0X10
+
+#define HDMI_RX_DEEP_COLOR_CTRL_REG 0XEC
+#define HDMI_RX_EN_MAN_DEEP_COLOR 0X08
+
+#define HDMI_RX_VID_DEBUG_REG 0XED
+#define HDMI_RX_MAN_DEF_PHASE 0X08
+#define HDMI_RX_MAN_DEF_PHASE_VAL 0X04
+
+#define HDMI_RX_EEPROM_KEY_PROTECT1_REG 0XF9
+#define HDMI_RX_EEPROM_KEY_PROTECT2_REG 0XFA
+#define HDMI_RX_EEPROM_KEY_PROTECT3_REG 0XFB
+
+#define HDMI_RX_EEPROM_ACCESS_CNFG_REG 0XFC
+#define HDMI_RX_RW_ROM_ADDR8 0X80
+#define HDMI_RX_ROM_RW_DONE 0X10
+#define HDMI_RX_ROM_BIST_EN 0X08
+#define HDMI_RX_ROM_WRITE_EN 0X04
+#define HDMI_RX_ROM_READ_EN 0X02
+#define HDMI_RX_EESK_MODE 0X01
+
+#define HDMI_RX_EEPROM_RW_ADDR_REG 0XFD
+
+#define HDMI_RX_EEPROM_READ_DATA_REG 0XFE
+#define HDMI_RX_EEPROM_WRITE_DATA_REG 0XFF
+
+//0X68/0X6A
+#define HDMI_RX_HDCP_BKSV_SHADOW1_REG 0X00
+#define HDMI_RX_HDCP_BKSV_SHADOW2_REG 0X01
+#define HDMI_RX_HDCP_BKSV_SHADOW3_REG 0X02
+#define HDMI_RX_HDCP_BKSV_SHADOW4_REG 0X03
+#define HDMI_RX_HDCP_BKSV_SHADOW5_REG 0X04
+
+#define HDMI_RX_HDCP_RI_SHADOW1_REG 0X05
+#define HDMI_RX_HDCP_RI_SHADOW2_REG 0X06
+
+#define HDMI_RX_HDCP_PJ_SHADOW_REG 0X07
+#define HDMI_RX_HDCP_AKSV_SHADOW1_REG 0X08
+#define HDMI_RX_HDCP_AKSV_SHADOW2_REG 0X09
+#define HDMI_RX_HDCP_AKSV_SHADOW3_REG 0X0A
+#define HDMI_RX_HDCP_AKSV_SHADOW4_REG 0X0B
+#define HDMI_RX_HDCP_AKSV_SHADOW5_REG 0X0C
+
+#define HDMI_RX_HDCP_AINFO_SHADOW_REG 0X0D
+#define HDMI_RX_11EN 0X02
+
+#define HDMI_RX_HDCP_AN_SHADOW1_REG 0X0E
+#define HDMI_RX_HDCP_AN_SHADOW2_REG 0X0F
+#define HDMI_RX_HDCP_AN_SHADOW3_REG 0X10
+#define HDMI_RX_HDCP_AN_SHADOW4_REG 0X11
+#define HDMI_RX_HDCP_AN_SHADOW5_REG 0X12
+#define HDMI_RX_HDCP_AN_SHADOW6_REG 0X13
+#define HDMI_RX_HDCP_AN_SHADOW7_REG 0X14
+#define HDMI_RX_HDCP_AN_SHADOW8_REG 0X15
+
+#define HDMI_RX_DOWNSTREAM_VH0_0_REG 0X16
+#define HDMI_RX_DOWNSTREAM_VH0_1_REG 0X17
+#define HDMI_RX_DOWNSTREAM_VH0_2_REG 0X18
+#define HDMI_RX_DOWNSTREAM_VH0_3_REG 0X19
+#define HDMI_RX_DOWNSTREAM_VH1_0_REG 0X1A
+#define HDMI_RX_DOWNSTREAM_VH1_1_REG 0X1B
+#define HDMI_RX_DOWNSTREAM_VH1_2_REG 0X1C
+#define HDMI_RX_DOWNSTREAM_VH1_3_REG 0X1D
+#define HDMI_RX_DOWNSTREAM_VH2_0_REG 0X1E
+#define HDMI_RX_DOWNSTREAM_VH2_1_REG 0X1F
+#define HDMI_RX_DOWNSTREAM_VH2_2_REG 0X20
+#define HDMI_RX_DOWNSTREAM_VH2_3_REG 0X21
+#define HDMI_RX_DOWNSTREAM_VH3_0_REG 0X22
+#define HDMI_RX_DOWNSTREAM_VH3_1_REG 0X23
+#define HDMI_RX_DOWNSTREAM_VH3_2_REG 0X24
+#define HDMI_RX_DOWNSTREAM_VH3_3_REG 0X25
+#define HDMI_RX_DOWNSTREAM_VH4_0_REG 0X26
+#define HDMI_RX_DOWNSTREAM_VH4_1_REG 0X27
+#define HDMI_RX_DOWNSTREAM_VH4_2_REG 0X28
+#define HDMI_RX_DOWNSTREAM_VH4_3_REG 0X29
+
+#define HDMI_RX_HDCP_BCAPS_SHADOW_REG 0X2A
+#define HDMI_RX_HDMI_CAP 0X80
+#define HDMI_RX_REPERTER 0X40
+#define HDMI_RX_READY 0X20
+#define HDMI_RX_FAST 0X10
+#define HDMI_RX_11FEATURE 0X02
+#define HDMI_RX_FAST_REAUTH 0X01
+
+#define HDMI_RX_HDCP_BSTATUS_SHADOW1_REG 0X2B
+#define HDMI_RX_DEV_EXC 0X80
+
+#define HDMI_RX_HDCP_BSTATUS_SHADOW2_REG 0X2C
+#define HDMI_RX_HDMI_MODE_IN_BSTATUS 0X10
+#define HDMI_RX_CAS_EXC 0X08
+
+#define HDMI_RX_HDCP_REPEATER_KSV_FIFO_REG 0X2D
+
+#define HDMI_RX_DEVICE_IDENTIFICATION_SHADOW_REG 0X2E
+
+#define HDMI_RX_HDCP_KSV_SHA_STARTL_REG 0X2F
+#define HDMI_RX_HDCP_KSV_SHA_STARTH_REG 0X30
+
+#define HDMI_RX_HDCP_SHA_LENGTHL_REG 0X31
+#define HDMI_RX_HDCP_SHA_LENGTHH_REG 0X32
+
+#define HDMI_RX_HDCP_SHA_CTRL_REG 0X33
+#define HDMI_RX_SHA_MODE 0X02
+#define HDMI_RX_SHA_GO 0X01
+
+#define HDMI_RX_DOWNSTREAM_BSTATUSL_REG 0X34
+#define HDMI_RX_DOWNSTREAM_BSTATUSH_REG 0X35
+
+#define HDMI_RX_DOWNSTREAM_M0_0_REG 0X36
+#define HDMI_RX_DOWNSTREAM_M0_1_REG 0X37
+#define HDMI_RX_DOWNSTREAM_M0_2_REG 0X38
+#define HDMI_RX_DOWNSTREAM_M0_3_REG 0X39
+#define HDMI_RX_DOWNSTREAM_M0_4_REG 0X3A
+#define HDMI_RX_DOWNSTREAM_M0_5_REG 0X3B
+#define HDMI_RX_DOWNSTREAM_M0_6_REG 0X3C
+#define HDMI_RX_DOWNSTREAM_M0_7_REG 0X3D
+
+#define HDMI_RX_HDCP_DEBUG_REG 0X3E
+#define HDMI_RX_STOPHDCP 0X80
+#define HDMI_RX_BYPASSHDCP 0X40
+#define HDMI_RX_KEY_MODE 0X20
+#define HDMI_RX_DDC_DLY_EN 0X10
+
+#define HDMI_RX_HDCP_STATUS_REG 0X3F
+#define HDMI_RX_ADV_CIPHER 0X80
+#define HDMI_RX_LOAD_KEY_DONE 0X40
+#define HDMI_RX_DECRYPT 0X20
+#define HDMI_RX_AUTHEN 0X10
+#define HDMI_RX_BKSV_DISABLE 0X02
+#define HDMI_RX_CLEAR_RI 0X01
+
+#define HDMI_RX_SPD_TYPE_REG 0X40
+#define HDMI_RX_SPD_VER_REG 0X41
+#define HDMI_RX_SPD_LEN_REG 0X42
+#define HDMI_RX_SPD_CHKSUM_REG 0X43
+#define HDMI_RX_SPD_DATA00_REG 0X44
+#define HDMI_RX_SPD_DATA01_REG 0X45
+#define HDMI_RX_SPD_DATA02_REG 0X46
+#define HDMI_RX_SPD_DATA03_REG 0X47
+#define HDMI_RX_SPD_DATA04_REG 0X48
+#define HDMI_RX_SPD_DATA05_REG 0X49
+#define HDMI_RX_SPD_DATA06_REG 0X4A
+#define HDMI_RX_SPD_DATA07_REG 0X4B
+#define HDMI_RX_SPD_DATA08_REG 0X4C
+#define HDMI_RX_SPD_DATA09_REG 0X4D
+#define HDMI_RX_SPD_DATA0A_REG 0X4E
+#define HDMI_RX_SPD_DATA0B_REG 0X4F
+#define HDMI_RX_SPD_DATA0C_REG 0X50
+#define HDMI_RX_SPD_DATA0D_REG 0X51
+#define HDMI_RX_SPD_DATA0E_REG 0X52
+#define HDMI_RX_SPD_DATA0F_REG 0X53
+#define HDMI_RX_SPD_DATA10_REG 0X54
+#define HDMI_RX_SPD_DATA11_REG 0X55
+#define HDMI_RX_SPD_DATA12_REG 0X56
+#define HDMI_RX_SPD_DATA13_REG 0X57
+#define HDMI_RX_SPD_DATA14_REG 0X58
+#define HDMI_RX_SPD_DATA15_REG 0X59
+#define HDMI_RX_SPD_DATA16_REG 0X5A
+#define HDMI_RX_SPD_DATA17_REG 0X5B
+#define HDMI_RX_SPD_DATA18_REG 0X5C
+#define HDMI_RX_SPD_DATA19_REG 0X5D
+#define HDMI_RX_SPD_DATA1A_REG 0X5E
+
+#define HDMI_RX_ACP_HB0_REG 0X60
+#define HDMI_RX_ACP_HB1_REG 0X61
+#define HDMI_RX_ACP_HB2_REG 0X62
+#define HDMI_RX_ACP_DATA00_REG 0X63
+#define HDMI_RX_ACP_DATA01_REG 0X64
+#define HDMI_RX_ACP_DATA02_REG 0X65
+#define HDMI_RX_ACP_DATA03_REG 0X66
+#define HDMI_RX_ACP_DATA04_REG 0X67
+#define HDMI_RX_ACP_DATA05_REG 0X68
+#define HDMI_RX_ACP_DATA06_REG 0X69
+#define HDMI_RX_ACP_DATA07_REG 0X6A
+#define HDMI_RX_ACP_DATA08_REG 0X6B
+#define HDMI_RX_ACP_DATA09_REG 0X6C
+#define HDMI_RX_ACP_DATA0A_REG 0X6D
+#define HDMI_RX_ACP_DATA0B_REG 0X6E
+#define HDMI_RX_ACP_DATA0C_REG 0X6F
+#define HDMI_RX_ACP_DATA0D_REG 0X70
+#define HDMI_RX_ACP_DATA0E_REG 0X71
+#define HDMI_RX_ACP_DATA0F_REG 0X72
+#define HDMI_RX_ACP_DATA10_REG 0X73
+#define HDMI_RX_ACP_DATA11_REG 0X74
+#define HDMI_RX_ACP_DATA12_REG 0X75
+#define HDMI_RX_ACP_DATA13_REG 0X76
+#define HDMI_RX_ACP_DATA14_REG 0X77
+#define HDMI_RX_ACP_DATA15_REG 0X78
+#define HDMI_RX_ACP_DATA16_REG 0X79
+#define HDMI_RX_ACP_DATA17_REG 0X7A
+#define HDMI_RX_ACP_DATA18_REG 0X7B
+#define HDMI_RX_ACP_DATA19_REG 0X7C
+#define HDMI_RX_ACP_DATA1A_REG 0X7D
+#define HDMI_RX_ACP_DATA1B_REG 0X7E
+
+#define HDMI_RX_UNRECOGNIZED_PACKET_REG 0X80
+
+#define HDMI_RX_AVI_TYPE_REG 0XA0
+#define HDMI_RX_AVI_VER_REG 0XA1
+#define HDMI_RX_AVI_LEN_REG 0XA2
+#define HDMI_RX_AVI_CHKSUM_REG 0XA3
+#define HDMI_RX_AVI_DATA00_REG 0XA4
+#define HDMI_RX_AVI_DATA01_REG 0XA5
+#define HDMI_RX_AVI_DATA02_REG 0XA6
+#define HDMI_RX_AVI_DATA03_REG 0XA7
+#define HDMI_RX_AVI_DATA04_REG 0XA8
+#define HDMI_RX_AVI_DATA05_REG 0XA9
+#define HDMI_RX_AVI_DATA06_REG 0XAA
+#define HDMI_RX_AVI_DATA07_REG 0XAB
+#define HDMI_RX_AVI_DATA08_REG 0XAC
+#define HDMI_RX_AVI_DATA09_REG 0XAD
+#define HDMI_RX_AVI_DATA0A_REG 0XAE
+#define HDMI_RX_AVI_DATA0B_REG 0XAF
+#define HDMI_RX_AVI_DATA0C_REG 0XB0
+#define HDMI_RX_AVI_DATA0D_REG 0XB1
+#define HDMI_RX_AVI_DATA0E_REG 0XB2
+
+#define HDMI_RX_AUDIO_TYPE_REG 0XC0
+#define HDMI_RX_AUDIO_VER_REG 0XC1
+#define HDMI_RX_AUDIO_LEN_REG 0XC2
+#define HDMI_RX_AUDIO_CHKSUM_REG 0XC3
+#define HDMI_RX_AUDIO_DATA00_REG 0XC4
+#define HDMI_RX_AUDIO_DATA01_REG 0XC5
+#define HDMI_RX_AUDIO_DATA02_REG 0XC6
+#define HDMI_RX_AUDIO_DATA03_REG 0XC7
+#define HDMI_RX_AUDIO_DATA04_REG 0XC8
+#define HDMI_RX_AUDIO_DATA05_REG 0XC9
+#define HDMI_RX_AUDIO_DATA06_REG 0XCA
+#define HDMI_RX_AUDIO_DATA07_REG 0XCB
+#define HDMI_RX_AUDIO_DATA08_REG 0XCC
+#define HDMI_RX_AUDIO_DATA09_REG 0XCD
+#define HDMI_RX_AUDIO_DATA0A_REG 0XCE
+#define HDMI_RX_AUDIO_DATA0B_REG 0XCF
+#define HDMI_RX_AUDIO_DATA0C_REG 0XD0
+#define HDMI_RX_AUDIO_DATA0D_REG 0XD1
+#define HDMI_RX_AUDIO_DATA0E_REG 0XD2
+#define HDMI_RX_AUDIO_DATA0F_REG 0XD3
+#define HDMI_RX_AUDIO_DATA10_REG 0XD4
+#define HDMI_RX_AUDIO_DATA11_REG 0XD5
+#define HDMI_RX_AUDIO_DATA12_REG 0XD6
+#define HDMI_RX_AUDIO_DATA13_REG 0XD6
+#define HDMI_RX_AUDIO_DATA14_REG 0XD7
+#define HDMI_RX_AUDIO_DATA15_REG 0XD9
+#define HDMI_RX_AUDIO_DATA16_REG 0XDA
+#define HDMI_RX_AUDIO_DATA17_REG 0XDB
+#define HDMI_RX_AUDIO_DATA18_REG 0XDC
+#define HDMI_RX_AUDIO_DATA19_REG 0XDD
+
+#define HDMI_RX_MPEG_TYPE_REG 0XE0
+#define HDMI_RX_MPEG_VER_REG 0XE1
+#define HDMI_RX_MPEG_LEN_REG 0XE2
+#define HDMI_RX_MPEG_CHKSUM_REG 0XE3
+#define HDMI_RX_MPEG_DATA00_REG 0XE4
+#define HDMI_RX_MPEG_DATA01_REG 0XE5
+#define HDMI_RX_MPEG_DATA02_REG 0XE6
+#define HDMI_RX_MPEG_DATA03_REG 0XE7
+#define HDMI_RX_MPEG_DATA04_REG 0XE8
+#define HDMI_RX_MPEG_DATA05_REG 0XE9
+#define HDMI_RX_MPEG_DATA06_REG 0XEA
+#define HDMI_RX_MPEG_DATA07_REG 0XEB
+#define HDMI_RX_MPEG_DATA08_REG 0XEC
+#define HDMI_RX_MPEG_DATA09_REG 0XED
+#define HDMI_RX_MPEG_DATA0A_REG 0XEF
+#define HDMI_RX_MPEG_DATA0B_REG 0XF0
+#define HDMI_RX_MPEG_DATA0C_REG 0XF1
+#define HDMI_RX_MPEG_DATA0D_REG 0XF2
+#define HDMI_RX_MPEG_DATA0E_REG 0XF3
+#define HDMI_RX_MPEG_DATA0F_REG 0XF4
+#define HDMI_RX_MPEG_DATA10_REG 0XF5
+#define HDMI_RX_MPEG_DATA11_REG 0XF6
+#define HDMI_RX_MPEG_DATA12_REG 0XF7
+#define HDMI_RX_MPEG_DATA13_REG 0XF8
+#define HDMI_RX_MPEG_DATA14_REG 0XF9
+#define HDMI_RX_MPEG_DATA15_REG 0XFA
+#define HDMI_RX_MPEG_DATA16_REG 0XFB
+#define HDMI_RX_MPEG_DATA17_REG 0XFC
+#define HDMI_RX_MPEG_DATA18_REG 0XFD
+#define HDMI_RX_MPEG_DATA19_REG 0XFE
+
+#define HDMI_RX_SPD_INFO_PACKET_CTRL_REG 0X5F
+#define HDMI_RX_ACP_INFO_PACKET_CTRL_REG 0X7F
+#define HDMI_RX_GENERAL_CTRL_REG 0X9F
+#define HDMI_RX_MPEG_INFO_PACKET_CTRL_REG 0XFF
+
+
+
+
+//*************************************************************
+
+
+#endif
+
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/ANX7150/HDMI_RX_DRV.c
+++ linux-mvl-dove-2.6.32/drivers/video/display/ANX7150/HDMI_RX_DRV.c
@@ -0,0 +1,1911 @@
+
+
+//******************************************************************************
+//  I N C L U D E    F I L E S
+//******************************************************************************
+
+#include "HDMI_RX_DRV.h"   
+//#include "i2c_intf.h"
+//#include "HDMI_TX_i2c_intf.h"
+//#include "ANX7150_i2C_intf.h"
+
+//#include "Timer.h"
+//#include "mcu.h"
+#include "ANX7150.h"
+
+
+//******************************************************************************
+//  G L O B A L    V A R I A B L E S
+//******************************************************************************
+BYTE g_HDMI_DVI_Status;
+BYTE g_Sys_State;
+BYTE g_Cur_Pix_Clk;
+BYTE g_Video_Stable_Cntr;
+BYTE g_Audio_Stable_Cntr;
+BYTE g_Sync_Expire_Cntr;
+BYTE g_Timer_Slot ;  
+BYTE g_HDCP_Err_Cnt;
+BYTE g_Sync_Change; //record sync interrupt
+
+WORD g_Cur_H_Res;
+WORD g_Cur_V_Res;
+BIT g_Video_Muted;
+BIT g_Audio_Muted;
+BIT g_CTS_Got;
+BIT g_Audio_Got;
+BIT g_Restart_System; 
+
+BYTE set_color_mode_counter, deep_color_set_done,video_format_supported;
+BIT hdmi_rx_ycmux_setting,hdmi_rx_auth_done;
+BYTE hdmi_rx_avi_repeat_time;
+BYTE hdmi_rx_chip_id;
+
+
+HDMI_Audio_Mode HDMI_AUD_Mode;
+HDMI_I2S_Format HDMI_I2S_Fmt;
+HDMI_Infoframe_Type HDMI_InfoFrame;
+HDMI_Video_Detailed_Info_t HDMI_Vid_Info;
+
+//xdata unsigned char sysState,sysState_bkp;
+
+/*
+void HDMI_RX_Get_Infoframe(BYTE infoframe_type)
+{
+    BYTE i;
+    switch(infoframe_type)
+    {
+        case InfoFrame_AVI:
+            HDMI_RX_ReadI2C_RX1(HDMI_RX_AVI_TYPE_REG, &HDMI_InfoFrame.Type);
+            HDMI_RX_ReadI2C_RX1(HDMI_RX_AVI_VER_REG, &HDMI_InfoFrame.Version);
+            HDMI_RX_ReadI2C_RX1(HDMI_RX_AVI_LEN_REG, &HDMI_InfoFrame.Length);
+            HDMI_RX_ReadI2C_RX1(HDMI_RX_AVI_CHKSUM_REG, &HDMI_InfoFrame.CRC);
+            for(i = 0; i < 13; i ++)
+            {
+                HDMI_RX_ReadI2C_RX1(HDMI_RX_AVI_DATA00_REG + i, &HDMI_InfoFrame.Data[i]);
+            }
+            break;
+        case InfoFrame_AUD:
+            HDMI_RX_ReadI2C_RX1(HDMI_RX_AUDIO_TYPE_REG, &HDMI_InfoFrame.Type);
+            HDMI_RX_ReadI2C_RX1(HDMI_RX_AUDIO_VER_REG, &HDMI_InfoFrame.Version);
+            HDMI_RX_ReadI2C_RX1(HDMI_RX_AUDIO_LEN_REG, &HDMI_InfoFrame.Length);
+            HDMI_RX_ReadI2C_RX1(HDMI_RX_AUDIO_CHKSUM_REG, &HDMI_InfoFrame.CRC);
+            for(i = 0; i < 10; i ++)
+            {
+                HDMI_RX_ReadI2C_RX1(HDMI_RX_AUDIO_DATA00_REG + i, &HDMI_InfoFrame.Data[i]);
+            }
+            break;
+        case InfoFrame_SPD:
+            HDMI_RX_ReadI2C_RX1(HDMI_RX_SPD_TYPE_REG, &HDMI_InfoFrame.Type);
+            HDMI_RX_ReadI2C_RX1(HDMI_RX_SPD_VER_REG, &HDMI_InfoFrame.Version);
+            HDMI_RX_ReadI2C_RX1(HDMI_RX_SPD_LEN_REG, &HDMI_InfoFrame.Length);
+            HDMI_RX_ReadI2C_RX1(HDMI_RX_SPD_CHKSUM_REG, &HDMI_InfoFrame.CRC);
+            for(i = 0; i < 25; i ++)
+            {
+                HDMI_RX_ReadI2C_RX1(HDMI_RX_SPD_DATA00_REG + i, &HDMI_InfoFrame.Data[i]);
+            }
+            break;
+        case InfoFrame_ACP:
+            HDMI_RX_ReadI2C_RX1(HDMI_RX_ACP_HB0_REG, &HDMI_InfoFrame.Type);
+            for(i = 0; i < 30; i ++)
+            {
+                HDMI_RX_ReadI2C_RX1(HDMI_RX_ACP_HB1_REG + i, &HDMI_InfoFrame.Data[i]);
+            }
+            break;
+        case InfoFrame_MPEG:
+            HDMI_RX_ReadI2C_RX1(HDMI_RX_MPEG_TYPE_REG, &HDMI_InfoFrame.Type);
+            HDMI_RX_ReadI2C_RX1(HDMI_RX_MPEG_VER_REG, &HDMI_InfoFrame.Version);
+            HDMI_RX_ReadI2C_RX1(HDMI_RX_MPEG_LEN_REG, &HDMI_InfoFrame.Length);
+            HDMI_RX_ReadI2C_RX1(HDMI_RX_MPEG_CHKSUM_REG, &HDMI_InfoFrame.CRC);
+            for(i = 0; i < 10; i ++)
+            {
+                HDMI_RX_ReadI2C_RX1(HDMI_RX_MPEG_DATA00_REG + i, &HDMI_InfoFrame.Data[i]);
+            }
+            break;
+        default:
+            break;
+    }
+//    return(HDMI_InfoFrame);
+}
+
+BYTE HDMI_RX_Get_SysState(void)
+{
+    if(g_Sys_State == MONITOR_CKDT)
+        return Monitor_CKDT;
+    else if(g_Sys_State == WAIT_SCDT)
+        return Wait_SCDT;
+    else if(g_Sys_State == WAIT_VIDEO)
+        return Wait_VIDEO;
+    else if(g_Sys_State == WAIT_AUDIO)
+        return Wait_AUDIO;
+    else if(g_Sys_State == PLAYBACK)
+        return Playback;
+}
+
+bit HDMI_RX_Get_HDMI_DVI_Mode(void)
+{
+    BYTE hdmi_dvi,c;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_HDMI_STATUS_REG, &c);
+    if (c & HDMI_RX_HDMI_MODE)
+        hdmi_dvi = HDMI_MODE;
+    else
+        hdmi_dvi = DVI_MODE;
+    return hdmi_dvi;
+}
+*/
+int HDMI_RX_Get_Vid_H_Tol(void)
+{
+    BYTE c,c1;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_H_RESH_REG, &c);
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_H_RESL_REG, &c1);
+    HDMI_Vid_Info.H_Tot = c;
+    HDMI_Vid_Info.H_Tot = (HDMI_Vid_Info.H_Tot << 8) + c1;
+    return HDMI_Vid_Info.H_Tot;
+}
+
+int HDMI_RX_Get_Vid_V_Tol(void)
+{
+    BYTE c,c1;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_V_RESH_REG, &c);
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_V_RESL_REG, &c1);
+    HDMI_Vid_Info.V_Tol = c;
+     HDMI_Vid_Info.V_Tol = ( HDMI_Vid_Info.V_Tol << 8) + c1;
+    return  HDMI_Vid_Info.V_Tol;
+}
+
+int HDMI_RX_Get_Vid_H_Act(void)
+{
+    BYTE c,c1;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_DE_PIXH_REG, &c);
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_DE_PIXL_REG, &c1);
+     HDMI_Vid_Info.H_Act = c;
+    HDMI_Vid_Info.H_Act = (HDMI_Vid_Info.H_Act << 8) + c1;
+    return HDMI_Vid_Info.H_Act;
+}
+
+int HDMI_RX_Get_Vid_V_Act(void)
+{
+    BYTE c,c1;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_DE_LINH_REG, &c);
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_DE_LINL_REG, &c1);
+    HDMI_Vid_Info.V_Act = c;
+    HDMI_Vid_Info.V_Act = (HDMI_Vid_Info.V_Act << 8) + c1;
+    return HDMI_Vid_Info.V_Act;
+}
+/*
+int HDMI_RX_Get_Vid_V_Freq(void)
+{
+    BYTE c;
+    long int c1,c2,c3,c4;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_VID_PCLK_CNTR_REG, &c);
+    c1 = HDMI_RX_Get_Vid_H_Tol();
+    c2 = HDMI_RX_Get_Vid_V_Tol();
+    c3 = c;
+    c4 = c1 * c2 * c3;
+    HDMI_Vid_Info.V_Freq = 13.5*1000000*128 / c4; 
+    return HDMI_Vid_Info.V_Freq;
+}
+
+BYTE HDMI_RX_Get_Vid_V_FrontPorch(void)
+{
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_ACTIVE_LIN_TO_VSYNC_REG, &HDMI_Vid_Info.V_Front_Porch);
+    return HDMI_Vid_Info.V_Front_Porch;
+}
+
+BYTE HDMI_RX_Get_Vid_V_BackPorch(void)
+{
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_VSYNC_TO_ACTIVE_LIN_REG, &HDMI_Vid_Info.V_Back_Porth);
+    return HDMI_Vid_Info.V_Back_Porth;
+}
+
+BYTE HDMI_RX_Get_Vid_H_FrontPorch(void)
+{
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_H_FRONT_PORCH_REG, &HDMI_Vid_Info.H_Front_Porch);
+    return HDMI_Vid_Info.H_Front_Porch;
+}
+
+int HDMI_RX_Get_Vid_Hsync_Width(void)
+{
+    BYTE c,c1;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_HSYNC_ACTIVE_WIDTHH_REG, &c);
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_HSYNC_ACTIVE_WIDTHL_REG, &c1);
+    HDMI_Vid_Info.Hsync_width = c;
+    HDMI_Vid_Info.Hsync_width = (HDMI_Vid_Info.Hsync_width << 8) + c1;
+    return HDMI_Vid_Info.Hsync_width;
+}
+
+bit HDMI_RX_Get_Vid_Vsync_Pol(void)
+{
+    BYTE c;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_VIDEO_STATUS_REG, &c);
+    if(c & HDMI_RX_VSYNC_POL)
+        HDMI_Vid_Info.VSYNC_POL = POL_positive;
+    else
+        HDMI_Vid_Info.VSYNC_POL = POL_negative;
+    return HDMI_Vid_Info.VSYNC_POL;
+}
+
+bit HDMI_RX_Get_Vid_Hsync_Pol(void)
+{
+    BYTE c;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_VIDEO_STATUS_REG, &c);
+    if(c & HDMI_RX_HSYNC_POL)
+        HDMI_Vid_Info.HSYNC_POL = POL_positive;
+    else
+        HDMI_Vid_Info.HSYNC_POL = POL_negative;
+    return HDMI_Vid_Info.HSYNC_POL;
+}
+
+BYTE HDMI_RX_Get_Vid_I_P(void)
+{
+    BYTE c;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_VIDEO_STATUS_REG, &c);
+    if(c & HDMI_RX_VIDEO_TYPE)
+        return HDMI_SIGNAL_INTERLACED;
+    else
+        return HDMI_SIGNAL_PROGRESSIVE;
+}
+
+BYTE HDMI_RX_Get_Vid_CS(void)
+{
+    BYTE c;
+    HDMI_RX_ReadI2C_RX1(HDMI_RX_AVI_DATA00_REG, &c);
+    if(c & 0x60 == 0x00)
+        return HDMI_RGB;
+    else if(c & 0x60 == 0x20)
+        return HDMI_YCBCR422;
+    else if(c & 0x60 == 0x40)
+        return HDMI_YCBCR444;
+}
+
+BYTE HDMI_RX_Get_Device_ID_Low(void)
+{
+    BYTE id_low;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_DEV_IDL_REG, &id_low);
+    return id_low;
+}
+
+BYTE HDMI_RX_Get_Device_ID_High(void)
+{
+    BYTE id_high;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_DEV_IDH_REG, &id_high);
+    return id_high;
+}
+
+BYTE HDMI_RX_Get_Device_Revision(void)
+{
+    BYTE revision;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_DEV_REV_REG, &revision);
+    return revision;
+}
+
+BYTE HDMI_RX_Get_Vid_Repeat_Times(void)
+{
+    BYTE c;
+    HDMI_RX_ReadI2C_RX1(HDMI_RX_AVI_DATA04_REG, &c);
+    HDMI_Vid_Info.pixel_repeat_times = c & 0x0f;
+    return HDMI_Vid_Info.pixel_repeat_times;
+}
+
+void HDMI_RX_Power_On(void)
+{
+    BYTE c;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_SYS_PWDN1_REG, &c);
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_SYS_PWDN1_REG, c & (~HDMI_RX_PWDN_CTRL)); 
+}
+
+void HDMI_RX_Power_Off(void)
+{
+    BYTE c;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_SYS_PWDN1_REG, &c);
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_SYS_PWDN1_REG, c |HDMI_RX_PWDN_CTRL); 
+}
+
+BYTE HDMI_RX_Get_Power_Status(void)
+{
+    BYTE PWR_Status;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_SYS_PWDN1_REG, &PWR_Status);
+    if(PWR_Status & 0x01)
+        return 0;//power down
+    else
+        return 1;//power on
+}
+
+BYTE HDMI_RX_Get_VID_Output_Fmt(void)
+{
+    BYTE Vid_HW_Interface_fmt;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_VID_AOF_REG, &Vid_HW_Interface_fmt);
+    return Vid_HW_Interface_fmt;
+}
+*/
+BYTE HDMI_RX_Get_Input_Color_Depth(void)
+{
+    BYTE input_color_depth;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_VIDEO_STATUS_REG, &input_color_depth);
+    input_color_depth = input_color_depth & 0xf0;
+    if (input_color_depth == Deep_Color_legacy)
+        return Hdmi_legacy;
+    else if (input_color_depth == Deep_Color_24bit)
+        return Hdmi_24bit;
+    else if (input_color_depth == Deep_Color_30bit)
+        return Hdmi_30bit;
+    else if (input_color_depth == Deep_Color_36bit)
+        return Hdmi_36bit;
+}
+/*
+BYTE HDMI_RX_Get_Output_Color_Depth(void)
+{
+    BYTE output_color_depth;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_DEEP_COLOR_CTRL_REG, &output_color_depth);
+    if(output_color_depth & HDMI_RX_EN_MAN_DEEP_COLOR)
+        output_color_depth = output_color_depth & 0xf0;
+    else 
+    {
+        HDMI_RX_ReadI2C_RX0(HDMI_RX_VIDEO_STATUS_REG, &output_color_depth);
+        output_color_depth = output_color_depth & 0xf0;
+    }
+    if (output_color_depth == Deep_Color_legacy)
+        return Hdmi_legacy;
+    else if (output_color_depth == Deep_Color_24bit)
+        return Hdmi_24bit;
+    else if (output_color_depth == Deep_Color_30bit)
+        return Hdmi_30bit;
+    else if (output_color_depth == Deep_Color_36bit)
+        return Hdmi_36bit;
+}
+
+void HDMI_RX_Get_AUD_HW_Interface_Fmt(void)
+{
+    BYTE aud_hw_interface = 0,c;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_AUD_OUT_I2S_CTRL2_REG, &c);
+    c = c & 0xf0;
+    if(c)
+        aud_hw_interface = I2S_Output_Selected;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_AUDIO_OUT_CTRL_REG, &c);
+    c = c & HDMI_RX_SP_EN;
+    if(c)
+        aud_hw_interface = aud_hw_interface | SPDIF_Output_Selected;
+    switch(aud_hw_interface)
+    {
+        case I2S_Output_Selected:
+            HDMI_AUD_Mode.I2S_enable = 1;
+            break;
+        case SPDIF_Output_Selected:
+            HDMI_AUD_Mode.SPDIF_enable = 1;
+            break;
+        case I2SandSPDIF_Output_Selected:
+            HDMI_AUD_Mode.I2S_enable = 1;
+            HDMI_AUD_Mode.SPDIF_enable = 1;
+            break;
+        default:
+            break;
+    }
+//    return HDMI_AUD_Mode;
+}
+
+BYTE HDMI_RX_Get_AUD_Fs(void)
+{
+    BYTE Fs;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_AUD_IN_SPDIF_CH_STATUS4_REG, &Fs);
+    if(Fs == 0x00)
+        return _44KHz;
+    else if(Fs == 0x02)
+        return _48KHz;
+    else if(Fs == 0x03)
+        return _32KHz;
+    else if(Fs == 0x08)
+        return _82KHz;
+    else if(Fs == 0x0a)
+        return _96KHz;
+    else if(Fs == 0x0e)
+        return _192KHz;
+}
+
+BYTE HDMI_RX_Get_AUD_MCLK_Freq(void)
+{
+    BYTE MCLK;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_ACR_AUD_FS_REG, &MCLK);
+    MCLK = MCLK & 0x30;
+    if(MCLK == 0x00)
+        return _128Fs;
+    else if(MCLK == 0x10)
+        return _256Fs;
+    else if(MCLK == 0x20)
+        return _384Fs;
+    else if(MCLK == 0x30)
+        return _512Fs;
+}
+
+void HDMI_RX_Get_I2S_Info(void)
+{
+    BYTE I2S_Info;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_AUD_OUT_I2S_CTRL1_REG, &I2S_Info);
+    if(I2S_Info & HDMI_RX_SCK_EDGE)
+        HDMI_I2S_Fmt.SCK_edge = 1;
+    else
+        HDMI_I2S_Fmt.SCK_edge = 0;
+    if(I2S_Info & HDMI_RX_SIZE_SEL)
+        HDMI_I2S_Fmt.Size_Select = 1;
+    else
+        HDMI_I2S_Fmt.Size_Select = 0;
+    if(I2S_Info & HDMI_RX_MSB_SIGN_EXT)
+        HDMI_I2S_Fmt.MSB_SIGN_EXT = 1;
+    else
+        HDMI_I2S_Fmt.MSB_SIGN_EXT = 0;
+    if(I2S_Info & HDMI_RX_WS_POL)
+        HDMI_I2S_Fmt.WS_POL = 1;
+    else
+        HDMI_I2S_Fmt.WS_POL = 0;
+    if(I2S_Info & HDMI_RX_JUST_CTRL)
+        HDMI_I2S_Fmt.JUST_CTRL = 1;
+    else
+        HDMI_I2S_Fmt.JUST_CTRL = 0;
+    if(I2S_Info & HDMI_RX_DIR_CTRL)
+        HDMI_I2S_Fmt.DIR_CTRL = 1;
+    else
+        HDMI_I2S_Fmt.DIR_CTRL = 0;
+    if(I2S_Info & HDMI_RX_SHIFT1)
+        HDMI_I2S_Fmt.SHIFT = 1;
+    else
+        HDMI_I2S_Fmt.SHIFT = 0;
+//    return (HDMI_I2S_Format);
+}
+
+BYTE HDMI_RX_Get_IntMask(BYTE Int_ID)
+{
+    BYTE MaskBits;
+    HDMI_RX_ReadI2C_RX0(Int_ID, &MaskBits);
+    return MaskBits;
+}
+
+BYTE HDMI_RX_Get_IntStatus(BYTE Int_ID)
+{
+    BYTE IntStatus;
+    HDMI_RX_ReadI2C_RX0(Int_ID, &IntStatus);
+    return IntStatus;
+}
+
+BYTE HDMI_RX_Get_Port_Status(void)
+{
+    BYTE Port_Status;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_PORT_SEL_REG, &Port_Status);
+    if(Port_Status == 0x11)
+        return 1;
+    else if(Port_Status == 0x22)
+        return 2;
+    else
+        return 0;
+}
+*/
+
+
+void HDMI_RX_Int_Process(void)
+{
+    BYTE s1, s2, s3, s4, s5, s6,s7;
+    if(g_Sys_State != MONITOR_CKDT)
+    {
+            HDMI_RX_ReadI2C_RX0(HDMI_RX_INT_STATUS1_REG , &s1);
+            HDMI_RX_WriteI2C_RX0(HDMI_RX_INT_STATUS1_REG , s1);
+
+            HDMI_RX_ReadI2C_RX0(HDMI_RX_INT_STATUS2_REG, &s2);
+            HDMI_RX_WriteI2C_RX0(HDMI_RX_INT_STATUS2_REG, s2);
+
+            HDMI_RX_ReadI2C_RX0(HDMI_RX_INT_STATUS3_REG, &s3);
+            HDMI_RX_WriteI2C_RX0(HDMI_RX_INT_STATUS3_REG, s3);
+
+
+            HDMI_RX_ReadI2C_RX0(HDMI_RX_INT_STATUS4_REG, &s4);
+            HDMI_RX_WriteI2C_RX0(HDMI_RX_INT_STATUS4_REG, s4);
+
+            HDMI_RX_ReadI2C_RX0(HDMI_RX_INT_STATUS5_REG, &s5);
+            HDMI_RX_WriteI2C_RX0(HDMI_RX_INT_STATUS5_REG, s5);
+
+            HDMI_RX_ReadI2C_RX0(HDMI_RX_INT_STATUS6_REG, &s6);
+            HDMI_RX_WriteI2C_RX0(HDMI_RX_INT_STATUS6_REG, s6);
+            
+            HDMI_RX_ReadI2C_RX0(HDMI_RX_INT_STATUS7_REG, &s7);
+            HDMI_RX_WriteI2C_RX0(HDMI_RX_INT_STATUS7_REG, s7);
+
+            if (s1 & HDMI_RX_CKDT_CHANGE)//clk detect change interrupt
+            {
+                HDMI_RX_Clk_Detected_Int();
+            }
+            
+            if (s1 & HDMI_RX_SCDT_CHANGE)  // SYNC detect interrupt
+            {
+                HDMI_RX_Sync_Det_Int();
+            }
+            
+            if (s1 & HDMI_RX_HDMI_DVI) // HDMI_DVI detect interrupt
+            {                
+                HDMI_RX_HDMI_DVI_Int();
+            }
+
+            if (s6 & HDMI_RX_NEW_AVI) 
+            {
+                HDMI_RX_New_AVI_Int();
+            }
+
+            if ((s5 & HDMI_RX_CTS_ACR_CHANGE) || (s3 & HDMI_RX_ACR_PLL_UNLOCK))  
+            { 
+                HDMI_RX_Restart_Audio_Chk();
+            }
+
+            if (s6 & HDMI_RX_CTS_RCV)  
+            {
+                HDMI_RX_Cts_Rcv_Int();
+            }
+
+            if (s5 & HDMI_RX_AUDIO_RCV)  
+            {
+                HDMI_RX_Audio_Rcv_Int();
+            }
+      
+            if ( s2 & HDMI_RX_HDCP_ERR)   // HDCP error
+            {
+                HDMI_RX_HDCP_Error_Int();
+            }
+            else
+            {
+                g_HDCP_Err_Cnt = 0;
+            }
+            
+            if (s2 & HDMI_RX_MUTE_DONE)  // AAC done
+            {
+                HDMI_RX_Aac_Done_Int();
+            }
+
+			//debug
+			//i2c_read_p0_reg(0xca, &ch4);
+		    //debug_printf("$$$$$$ch4= %.2x\n", (unsigned int) ch4 );
+        } 
+    }
+
+void HDMI_RX_Video_Timer_Slot(void)
+{
+    BYTE c, c1,avi_rpt;
+    BYTE AVMUTE_STATUS;
+
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_SYS_STATUS_REG, &c);
+
+    if(!(c & HDMI_RX_PWR5V))
+    {
+        HDMI_RX_ReadI2C_RX0(HDMI_RX_SYS_PWDN1_REG , &c1);
+        HDMI_RX_WriteI2C_RX0(HDMI_RX_SYS_PWDN1_REG , c1 | HDMI_RX_PWDN_CTRL); // power down all	
+        HDMI_RX_Set_Sys_State(MONITOR_CKDT);
+    }
+    else
+    {
+         if ((g_Sys_State == MONITOR_CKDT) )
+        {
+            HDMI_RX_ReadI2C_RX0(HDMI_RX_SYS_PWDN1_REG , &c1);
+            HDMI_RX_WriteI2C_RX0(HDMI_RX_SYS_PWDN1_REG , c1 & (~HDMI_RX_PWDN_CTRL)); // power up all	
+        }
+    }
+
+    c1 = c & HDMI_RX_CLK_DET;
+    if( c1 ) 
+    {					// KW 07/02/25
+       if ((g_Sys_State == MONITOR_CKDT) )
+       {
+        	HDMI_RX_Set_Sys_State(WAIT_SCDT);
+    	}
+    }
+    else
+    {
+        HDMI_RX_Set_Sys_State(MONITOR_CKDT);
+    }
+
+    if (g_Sys_State == MONITOR_CKDT) { return; }
+
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_SYS_STATUS_REG, &c);
+    if (!(c & HDMI_RX_HDMI_DET)) // No sync in WAIT_VIDEO, WAIT_AUDIO, PLAYBACK
+    {
+            if (g_Sync_Expire_Cntr >= SCDT_EXPIRE_TH) 
+            {
+                printk("No sync for long time."); 
+                HDMI_RX_WriteI2C_RX0(0x12, 0x02);
+                HDMI_RX_Set_Sys_State(MONITOR_CKDT);
+                g_Sync_Expire_Cntr = 0;
+            }
+            else
+            {
+                g_Sync_Expire_Cntr++;
+            }
+        return;
+    }
+    else// clear sync expire counter
+    {
+        g_Sync_Expire_Cntr = 0;
+    }
+
+    if ( g_Sys_State < WAIT_VIDEO )  
+    { 
+        g_HDMI_DVI_Status = DVI_MODE;
+        return; 
+    }
+
+    HDMI_RX_Set_Color_Mode();
+
+    //General Control Packet AV mute handler
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_HDMI_STATUS_REG, &c);
+    AVMUTE_STATUS = (c & HDMI_RX_MUTE_STAT);
+    if(AVMUTE_STATUS == HDMI_RX_MUTE_STAT) 
+    {
+        printk("HDMI_RX AV mute packet received."); 
+
+        if (!g_Video_Muted) 
+        {
+            HDMI_RX_Mute_Video();
+        }
+        if (!g_Audio_Muted)
+        {
+            HDMI_RX_Mute_Audio();
+        }
+        HDMI_RX_Set_Sys_State(WAIT_VIDEO);
+        //In HDMI_RX, AV mute status bit is write clear.
+        HDMI_RX_WriteI2C_RX0(HDMI_RX_HDMI_STATUS_REG, c & (~HDMI_RX_MUTE_STAT));
+    }
+
+    if (HDMI_RX_Is_Video_Change()) 
+    {
+        printk("Video Changed , mute video and mute audio");
+        HDMI_RX_Set_Sys_State(WAIT_VIDEO);
+        g_Video_Stable_Cntr = 0;
+
+        if (!g_Video_Muted)
+        {  
+            HDMI_RX_Mute_Video();
+        }
+        if (!g_Audio_Muted)
+        {
+            HDMI_RX_Mute_Audio();
+        }
+    } 
+    else if (g_Video_Stable_Cntr < VIDEO_STABLE_TH) 
+    {
+        g_Video_Stable_Cntr++;
+        printk("WAIT_VIDEO: Wait for video stable cntr.");
+    } 
+    else if ((g_Sys_State == WAIT_VIDEO) && (AVMUTE_STATUS==0x00))
+    {
+        if (g_HDMI_DVI_Status) 
+        {
+            if (g_Sys_State == WAIT_VIDEO) 
+            {
+                HDMI_RX_Get_Video_Info();
+                printk("HDMI mode: Video is stable."); 
+                HDMI_RX_Unmute_Video();	
+                HDMI_RX_Set_Sys_State(WAIT_AUDIO);
+            }
+        } 
+        else 
+        {
+            HDMI_RX_Get_Video_Info();
+            printk("DVI mode: Video is stable.");
+            HDMI_RX_Unmute_Video();
+            HDMI_RX_Unmute_Audio();
+            HDMI_RX_Set_Sys_State(PLAYBACK);
+            HDMI_RX_Show_Video_Info();
+        }
+    }
+
+    if((g_Sys_State >= WAIT_VIDEO) && (hdmi_rx_ycmux_setting == 1))
+    {
+        HDMI_RX_ReadI2C_RX1(0xa8,&avi_rpt);//get pixel repeat times in avi.
+        avi_rpt = avi_rpt & 0x0f;
+        if( hdmi_rx_avi_repeat_time != avi_rpt)
+        {
+            if(avi_rpt)
+            {
+                HDMI_RX_ReadI2C_RX0(HDMI_RX_AVC_EXCEPTION_MASK2_REG, &c);
+                HDMI_RX_WriteI2C_RX0(HDMI_RX_AVC_EXCEPTION_MASK2_REG, c & ~HDMI_RX_OUT_CLK_DIV_MASK);
+
+				 //for 480i DDR yc mux 601 demo, divide video clock.
+				 if (P2_5)
+			 	{
+					 HDMI_RX_ReadI2C_RX0(HDMI_RX_AVC_EXCEPTION_MASK2_REG, &c);
+	                HDMI_RX_WriteI2C_RX0(HDMI_RX_AVC_EXCEPTION_MASK2_REG, c | HDMI_RX_OUT_CLK_DIV_MASK);
+	                HDMI_RX_ReadI2C_RX0(HDMI_RX_SYS_CTRL1_REG, &c);
+	                HDMI_RX_WriteI2C_RX0(HDMI_RX_SYS_CTRL1_REG, (c & 0x3f ) | 0x40);
+	                printk("HDMI_RX DDR YC-MUX 601 output re-setting!");
+			 	}
+            }
+            else
+            {
+                HDMI_RX_ReadI2C_RX0(HDMI_RX_AVC_EXCEPTION_MASK2_REG, &c);
+                HDMI_RX_WriteI2C_RX0(HDMI_RX_AVC_EXCEPTION_MASK2_REG, c | HDMI_RX_OUT_CLK_DIV_MASK);
+                HDMI_RX_ReadI2C_RX0(HDMI_RX_SYS_CTRL1_REG, &c);
+                HDMI_RX_WriteI2C_RX0(HDMI_RX_SYS_CTRL1_REG, c | 0x80);
+                printk("HDMI_RX YC-MUX output re-setting!");
+            }
+        }
+        hdmi_rx_avi_repeat_time = avi_rpt;
+    }
+    else
+    {
+        HDMI_RX_ReadI2C_RX0(HDMI_RX_AVC_EXCEPTION_MASK2_REG, &c);
+        HDMI_RX_WriteI2C_RX0(HDMI_RX_AVC_EXCEPTION_MASK2_REG, c & ~HDMI_RX_OUT_CLK_DIV_MASK);
+    }
+
+    HDMI_RX_Get_Video_Info();
+}
+
+void HDMI_RX_Audio_Timer_Slot(void)
+{
+    BYTE c;//,c1,c2,c3;
+
+    if (g_Sys_State == MONITOR_CKDT)
+    {
+        return; 
+    }
+
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_HDMI_STATUS_REG, &c);
+    if (!(c & HDMI_RX_HDMI_MODE)) // if not HDMI mode, do nothing
+    {
+        return; 
+    }
+
+    if (g_Sys_State == PLAYBACK) 
+    {
+        HDMI_RX_ReadI2C_RX0(HDMI_RX_HDMI_MUTE_CTRL_REG, &c);
+        if (c & HDMI_RX_AUD_MUTE) 
+        {
+            HDMI_RX_Set_Sys_State(WAIT_AUDIO);
+        }
+    }
+
+    if ((g_Sys_State != WAIT_AUDIO)) 
+    {
+        return;
+    }
+
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_SYS_STATUS_REG, &c);
+    if (!(c & HDMI_RX_HDMI_DET  )) 
+    {
+        return ; 
+    }
+
+
+    if (g_CTS_Got && g_Audio_Got) 
+    {
+        if (g_Audio_Stable_Cntr >= AUDIO_STABLE_TH) 
+        {
+            HDMI_RX_Unmute_Audio();
+            HDMI_RX_Unmute_Video();
+            g_Audio_Stable_Cntr = 0;
+            HDMI_RX_Set_Sys_State(PLAYBACK);
+            HDMI_RX_Show_Video_Info();
+        } 
+        else 
+        {
+            g_Audio_Stable_Cntr++;
+        }
+    } 
+    else 
+    {
+        g_Audio_Stable_Cntr = 0;
+    }
+}
+
+void HDMI_RX_Timer_Slot2(void) 
+{
+    BYTE c;
+
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_INT_MASK1_REG, &c);
+    if (c == 0) { g_Restart_System = 1; }
+    
+    if(g_Restart_System)
+    {
+        g_Restart_System = 0;
+        HDMI_RX_Chip_Located();
+	 HDMI_RX_Initialize();  
+
+    }
+}
+
+void HDMI_RX_Timer_Process(void)
+{
+    if(g_Timer_Slot == 3) 
+        g_Timer_Slot = 0;
+    else 
+        g_Timer_Slot ++;
+
+    if(g_Timer_Slot == 0) 
+        HDMI_RX_Video_Timer_Slot();
+    else if(g_Timer_Slot == 1) 
+        HDMI_RX_Audio_Timer_Slot();
+    else if(g_Timer_Slot == 2) 
+        HDMI_RX_Timer_Slot2(); 
+}
+
+BYTE HDMI_RX_Chip_Located(void)
+{
+    BYTE c,c1;
+    HDMI_RX_HardReset();
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_HDMI_MUTE_CTRL_REG , 0x3);
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_DEV_IDL_REG, &c);
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_DEV_IDH_REG, &c1);
+    if((c == 0x35) && (c1 == 0x91))
+    {
+        printk("Repeater ANX8775 found");
+        hdmi_rx_chip_id = ANX8775;
+        return 1;
+    }
+    else if((c == 0x25) && (c1 == 0x91))
+    {
+        printk("Receiver ANX8770 found");
+        hdmi_rx_chip_id = ANX8770;
+        return 1;
+    }
+    else
+    {
+        printk("\n Can not read registers from chip, something wrong with I2C or chip.");
+        //enable_debug_output = 0;//
+        return 0;
+    }
+}
+
+void HDMI_RX_HardReset(void)
+{
+    HDMIRX_reset_pin = 0;
+    delay_ms(10);
+    HDMIRX_reset_pin = 1;
+    delay_ms(10);
+}
+
+void HDMI_RX_Init_var(void)
+{
+    HDMI_RX_Set_Sys_State(MONITOR_CKDT);
+    g_Cur_H_Res = 0;
+    g_Cur_V_Res = 0;
+    g_Cur_Pix_Clk = 0;
+    g_Video_Muted = 1;
+    g_Audio_Muted = 1;
+    g_Audio_Stable_Cntr = 0;
+    g_Sync_Expire_Cntr = 0;
+    g_Restart_System = 0;
+    g_HDCP_Err_Cnt = 0;
+    g_Sync_Change = 0;
+    set_color_mode_counter = 0;
+    video_format_supported = 1;
+    hdmi_rx_avi_repeat_time = 0xff;
+}
+
+void HDMI_RX_Set_Sys_State(BYTE ss)
+{
+    if(g_Sys_State != ss)
+    {
+        printk("");
+        g_Sys_State = ss;
+        switch (ss)
+        {
+            case MONITOR_CKDT:
+                printk("HDMI_RX:  MONITOR_CKDT");
+                break;
+            case WAIT_SCDT:
+                printk("HDMI_RX:  WAIT_SCDT");
+                break;
+            case WAIT_VIDEO:
+                printk("HDMI_RX:  WAIT_VIDEO");
+                break;
+            case WAIT_AUDIO:
+                printk("HDMI_RX:  WAIT_AUDIO");
+                HDMI_RX_Restart_Audio_Chk();
+                break;
+            case PLAYBACK:
+                printk("HDMI_RX:  PLAYBACK");
+                break;
+            default:
+                break;
+        }
+    }
+}
+
+void  HDMI_RX_Restart_Audio_Chk(void)
+{
+    if (g_Sys_State == WAIT_AUDIO)  
+    {
+        printk("WAIT_AUDIO: HDMI_RX_Restart_Audio_Chk.");
+        g_CTS_Got = 0;
+        g_Audio_Got = 0;
+    }
+}
+
+void HDMI_RX_Mute_Video(void)
+{
+    BYTE c;
+
+    printk("Mute Video.");
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_HDMI_MUTE_CTRL_REG, &c);
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_HDMI_MUTE_CTRL_REG, c | HDMI_RX_VID_MUTE);
+    g_Video_Muted = 1;
+}
+void HDMI_RX_Unmute_Video(void)
+{
+    BYTE c;
+
+    printk("Unmute Video.");
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_HDMI_MUTE_CTRL_REG, &c);
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_HDMI_MUTE_CTRL_REG, c & (~HDMI_RX_VID_MUTE));	
+    g_Video_Muted =0;
+}
+
+void HDMI_RX_Mute_Audio(void)
+{
+    BYTE c;
+
+    printk("Mute Audio.");
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_HDMI_MUTE_CTRL_REG, &c);
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_HDMI_MUTE_CTRL_REG, c | HDMI_RX_AUD_MUTE);
+
+    g_Audio_Muted = 1;
+}
+
+void HDMI_RX_Unmute_Audio(void)
+{
+    BYTE c;
+
+    printk("Unmute Audio.");
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_HDMI_MUTE_CTRL_REG, &c);
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_HDMI_MUTE_CTRL_REG, c & (~HDMI_RX_AUD_MUTE));
+    g_Audio_Muted = 0;
+}
+
+
+char HDMI_RX_Is_Video_Change(void)
+{
+    BYTE ch, cl;
+    xdata unsigned long n; //WORD n;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_H_RESL_REG, &cl);
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_H_RESH_REG, &ch);
+    n = ch;
+    n = (n << 8) + cl;
+    if ((g_Cur_H_Res < (n-10)) || (g_Cur_H_Res > (n+10))) 
+    {
+        deep_color_set_done = 0;
+        return 1;
+    }
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_V_RESL_REG, &cl);  
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_V_RESH_REG, &ch);
+    n = ch;
+    n = (n << 8) + cl;
+    if ((g_Cur_V_Res < (n-10)) || (g_Cur_V_Res > (n+10)))
+    {
+        deep_color_set_done = 0;
+        return 1;
+    }
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_HDMI_STATUS_REG, &cl);
+
+    cl &= HDMI_RX_HDMI_MODE;
+    if(g_HDMI_DVI_Status != cl)
+    {
+        printk("DVI to HDMI or HDMI to DVI Change.");
+        deep_color_set_done = 0;
+        return 1;
+    }
+
+    return 0;
+}
+
+void HDMI_RX_Get_Video_Info(void)
+{
+    BYTE ch, cl;
+    unsigned int n;
+
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_H_RESL_REG, &cl);
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_H_RESH_REG, &ch);
+    n = ch;
+    n = (n << 8) + cl;
+    g_Cur_H_Res = n;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_V_RESL_REG, &cl);
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_V_RESH_REG, &ch);
+    n = ch;
+    n = (n << 8) + cl;
+    g_Cur_V_Res = n;
+
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_VID_PCLK_CNTR_REG, &cl);
+    g_Cur_Pix_Clk = cl;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_HDMI_STATUS_REG, &cl);
+    g_HDMI_DVI_Status = ((cl & HDMI_RX_HDMI_MODE) == HDMI_RX_HDMI_MODE);
+}
+
+void HDMI_RX_Sync_Det_Int(void)
+{
+    BYTE c;
+    
+    printk("*HDMI_RX Interrupt: Sync Detect."); 
+    g_Sync_Change = 1;    // record sync change
+    deep_color_set_done = 0;
+    set_color_mode_counter = 0;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_SYS_STATUS_REG, &c);
+    
+    if (c & HDMI_RX_HDMI_DET) // sync existed
+    {
+            printk("Sync found.");
+            HDMI_RX_Mute_Audio();
+            HDMI_RX_Mute_Video();
+            HDMI_RX_Set_Sys_State(WAIT_VIDEO);
+            g_Video_Stable_Cntr = 0;
+            HDMI_RX_Get_Video_Info();// save first video info  
+    } 
+    else    // sync lost
+    {
+        printk("Sync lost."); 
+        HDMI_RX_Mute_Audio();
+        HDMI_RX_Mute_Video();
+        if(c & 0x02) //check if the clock lost
+        {
+            HDMI_RX_Set_Sys_State(WAIT_SCDT); 
+        }
+        else 
+        { 
+            HDMI_RX_Set_Sys_State(MONITOR_CKDT); 
+        }
+    }// end of sync lost
+}
+
+void HDMI_RX_Aac_Done_Int(void)
+{
+    BYTE c;
+
+    printk("*HDMI_RX Interrupt: AEC AAC Done.");
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_HDMI_MUTE_CTRL_REG, &c);
+    if (c & HDMI_RX_AUD_MUTE) 
+    {
+        g_Audio_Muted = 1;
+        if (g_Sys_State == PLAYBACK) 
+        {
+            HDMI_RX_ReadI2C_RX0(HDMI_RX_HDMI_STATUS_REG, &c);
+            if (c & HDMI_RX_HDMI_MODE)
+            {
+                HDMI_RX_Set_Sys_State(WAIT_AUDIO); 
+            }
+        }
+    } 
+}
+
+
+void HDMI_RX_HDMI_DVI_Int(void)
+{
+    BYTE c;
+
+    printk("*HDMI_RX Interrupt: HDMI-DVI Mode Change."); 
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_HDMI_STATUS_REG, &c);
+    HDMI_RX_Get_Video_Info();
+    if ((c & HDMI_RX_HDMI_MODE) == HDMI_RX_HDMI_MODE) 
+    {
+        printk("HDMI_RX_HDMI_DVI_Int: HDMI MODE."); 
+        if ( g_Sys_State==PLAYBACK )
+        {
+            HDMI_RX_Set_Sys_State(WAIT_AUDIO); 
+        }
+    } 
+    else 
+    {
+        HDMI_RX_Unmute_Audio();
+    }
+}
+
+void HDMI_RX_Cts_Rcv_Int(void)
+{
+    g_CTS_Got = 1;
+}
+
+void HDMI_RX_Audio_Rcv_Int(void)
+{
+    g_Audio_Got = 1;
+}
+
+void HDMI_RX_HDCP_Error_Int(void)
+{
+    BYTE c;
+
+    g_Audio_Got = 0;
+    g_CTS_Got = 0;
+    
+    if(g_HDCP_Err_Cnt >= 40 )
+    {
+        g_HDCP_Err_Cnt = 0;
+        printk("Lots of hdcp error occured ..."); 
+        HDMI_RX_Mute_Audio();
+        HDMI_RX_Mute_Video();
+
+        //issue hotplug
+        HDMI_RX_ReadI2C_RX0(HDMI_RX_PORT_SEL_REG, &c);
+        if( c&0x01 )    //port 0
+        {
+            HDMI_RX_Set_HPD(0,300);
+            printk("++++++++++Debug information:   HDCP error interrupt: port 0 HPD issued."); 
+        }
+        else
+        {
+            HDMI_RX_Set_HPD(1,300);
+            printk("++++++++++Debug information:   HDCP error interrupt: port 1 HPD issued."); 
+        }
+    }
+    else if((g_Sys_State==MONITOR_CKDT) || (g_Sys_State == WAIT_SCDT))
+    {
+        g_HDCP_Err_Cnt = 0;
+    }
+    else
+    {
+        g_HDCP_Err_Cnt ++;
+    }
+
+}
+
+void HDMI_RX_New_AVI_Int(void)
+{
+    BYTE c;
+    
+    printk("*HDMI_RX Interrupt: New AVI Packet."); 
+
+    HDMI_RX_ReadI2C_RX1(HDMI_RX_AVI_TYPE_REG, &c);
+    debug_printf("AVI Infoframe:\n");
+    debug_printf("0x%.2x ",(WORD)c);
+    HDMI_RX_ReadI2C_RX1(HDMI_RX_AVI_VER_REG, &c);
+    debug_printf("0x%.2x ",(WORD)c);
+    HDMI_RX_ReadI2C_RX1(HDMI_RX_AVI_LEN_REG, &c);
+    debug_printf("0x%.2x ",(WORD)c);
+    HDMI_RX_ReadI2C_RX1(HDMI_RX_AVI_CHKSUM_REG, &c);
+    debug_printf("    Check Sum = 0x%.2x \n",(WORD)c);
+    HDMI_RX_ReadI2C_RX1(HDMI_RX_AVI_DATA00_REG, &c);
+    debug_printf("0x%.2x ",(WORD)c);
+    HDMI_RX_ReadI2C_RX1(HDMI_RX_AVI_DATA01_REG, &c);
+    debug_printf("0x%.2x ",(WORD)c);
+    HDMI_RX_ReadI2C_RX1(HDMI_RX_AVI_DATA02_REG, &c);
+    debug_printf("0x%.2x ",(WORD)c);
+    HDMI_RX_ReadI2C_RX1(HDMI_RX_AVI_DATA03_REG, &c);
+    debug_printf("0x%.2x ",(WORD)c);
+    HDMI_RX_ReadI2C_RX1(HDMI_RX_AVI_DATA04_REG, &c);
+    debug_printf("0x%.2x ",(WORD)c);
+    HDMI_RX_ReadI2C_RX1(HDMI_RX_AVI_DATA05_REG, &c);
+    debug_printf("0x%.2x ",(WORD)c);
+    HDMI_RX_ReadI2C_RX1(HDMI_RX_AVI_DATA06_REG, &c);
+    debug_printf("0x%.2x ",(WORD)c);
+    HDMI_RX_ReadI2C_RX1(HDMI_RX_AVI_DATA07_REG, &c);
+    debug_printf("0x%.2x ",(WORD)c);
+    HDMI_RX_ReadI2C_RX1(HDMI_RX_AVI_DATA08_REG, &c);
+    debug_printf("0x%.2x ",(WORD)c);
+    HDMI_RX_ReadI2C_RX1(HDMI_RX_AVI_DATA09_REG, &c);
+    debug_printf("0x%.2x \n",(WORD)c);
+}
+
+void HDMI_RX_VID_Output_Fmt(BYTE Vid_HW_Interface_fmt)
+{
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_VID_AOF_REG, Vid_HW_Interface_fmt);
+    if((Vid_HW_Interface_fmt == YCbCr422_YCMUX) || (Vid_HW_Interface_fmt == YCbCr422_656_YCMUX))
+        hdmi_rx_ycmux_setting = 1;
+    else 
+        hdmi_rx_ycmux_setting = 0;
+}
+
+void HDMI_RX_MCLK_Source(BYTE MCLK_Source)
+{
+    BYTE c;
+    // MCLK select 
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_ACR_CTRL1_REG, &c);
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_ACR_CTRL1_REG, 
+        (c & 0xfe) |MCLK_Source);
+}
+
+void HDMI_RX_Set_MCLK_Freq(BYTE MCLK_Fs_Relationship)
+{
+    BYTE c;
+    // MCLK frequence select
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_ACR_AUD_FS_REG, &c);
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_ACR_AUD_FS_REG, 
+        (c & 0xcf) | MCLK_Fs_Relationship);
+}
+
+void HDMI_RX_I2S_Mode(bit SCK_EDGE, bit size_sel, bit msb_sign_ext,
+        bit ws_pol, bit JUST_CTRL, bit DIR_CTRL, bit SHIFT1)
+{
+    BYTE c,c0,c1,c2,c3,c4,c5,c6;
+    c6 = SCK_EDGE;
+    c6 = c6 << 6;
+    c5 = size_sel;
+    c5 = c5 << 5;
+    c4 = msb_sign_ext;
+    c4 = c4 << 4;
+    c3 = ws_pol;
+    c3 = c3 << 3;
+    c2 = JUST_CTRL;
+    c2 = c2 << 2;
+    c1 = DIR_CTRL;
+    c1 = c1 << 1;
+    c0 = SHIFT1;
+    c = c0 | c1 | c2 | c3 | c4 | c5 | c6;
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_AUD_OUT_I2S_CTRL1_REG, c);
+}
+
+void HDMI_RX_AUD_Output_Fmt(BYTE Aud_HW_Interface_fmt)
+{
+    BYTE c;
+    // Enable I2S output 
+    if((Aud_HW_Interface_fmt == I2S_Output_Selected)
+        ||(Aud_HW_Interface_fmt == I2SandSPDIF_Output_Selected))
+    {
+        printk("Enable I2S audio output.");
+        HDMI_RX_ReadI2C_RX0(HDMI_RX_AUD_OUT_I2S_CTRL2_REG, &c);
+        HDMI_RX_WriteI2C_RX0(HDMI_RX_AUD_OUT_I2S_CTRL2_REG, c | 0xf9);
+		// Set I2S_MODE on  KW 07/02/24
+        HDMI_RX_ReadI2C_RX0(HDMI_RX_AUDIO_OUT_CTRL_REG, &c);
+        HDMI_RX_WriteI2C_RX0(HDMI_RX_AUDIO_OUT_CTRL_REG, c | HDMI_RX_I2S_MODE);
+    }
+    else  // Disable I2S 
+    {
+        printk("Disable I2S audio output.");
+        HDMI_RX_ReadI2C_RX0(HDMI_RX_AUD_OUT_I2S_CTRL2_REG, &c);
+        HDMI_RX_WriteI2C_RX0(HDMI_RX_AUD_OUT_I2S_CTRL2_REG, c & 0x0f);
+// KW
+        HDMI_RX_ReadI2C_RX0(HDMI_RX_AUDIO_OUT_CTRL_REG, &c);
+        HDMI_RX_WriteI2C_RX0(HDMI_RX_AUDIO_OUT_CTRL_REG, c & (~HDMI_RX_I2S_MODE));
+    }
+
+     if((Aud_HW_Interface_fmt == SPDIF_Output_Selected)
+        ||(Aud_HW_Interface_fmt == I2SandSPDIF_Output_Selected))    // Enable SPDIF
+    {
+        printk("Enable SPDIF audio output.");
+        HDMI_RX_ReadI2C_RX0(HDMI_RX_AUDIO_OUT_CTRL_REG, &c);
+        HDMI_RX_WriteI2C_RX0(HDMI_RX_AUDIO_OUT_CTRL_REG, c | HDMI_RX_SP_EN);
+		 HDMI_RX_ReadI2C_RX0(HDMI_RX_AUD_OUT_I2S_CTRL2_REG, &c); //
+        HDMI_RX_WriteI2C_RX0(HDMI_RX_AUD_OUT_I2S_CTRL2_REG, c | 0x08);
+    }
+    else        //Disable SPDIF
+    {
+        printk("Disable SPDIF audio output.");
+        HDMI_RX_ReadI2C_RX0(HDMI_RX_AUDIO_OUT_CTRL_REG, &c);
+        HDMI_RX_WriteI2C_RX0(HDMI_RX_AUDIO_OUT_CTRL_REG, c & (~HDMI_RX_SP_EN));
+    }
+
+}
+
+void HDMI_RX_Set_IntPin(BYTE Pin_Output_Type, 
+    BYTE Pin_Output_Polarity)
+{
+    BYTE c;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_INT_CTRL_REG, &c);
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_INT_CTRL_REG, (c & 0xfc) 
+        |Pin_Output_Type | Pin_Output_Polarity);
+}
+
+void HDMI_RX_Set_IntMask(BYTE Int_ID, BYTE MaskBits)
+{
+    HDMI_RX_WriteI2C_RX0(Int_ID, MaskBits);
+}
+/*
+void HDMI_RX_Clear_Int(BYTE Int_ID, BYTE ClrBits)
+{
+    HDMI_RX_WriteI2C_RX0(Int_ID, ClrBits);
+}
+*/
+void HDMI_RX_Set_AEC_CtrlBits(BYTE AEC_ID, BYTE CtrlBits)
+{
+    HDMI_RX_WriteI2C_RX0(AEC_ID, CtrlBits);
+}
+/*
+BYTE HDMI_RX_Get_AEC_CtrlBits(BYTE AEC_id)
+{
+    BYTE CtrlBits;
+    HDMI_RX_ReadI2C_RX0(AEC_id, &CtrlBits);
+    return CtrlBits;
+}
+*/
+void HDMI_RX_AVC_On(void)
+{
+    BYTE c;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_AEC_CTRL_REG , &c);
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_AEC_CTRL_REG , c | HDMI_RX_AVC_EN );
+}
+
+/*
+void HDMI_RX_AVC_Off(void)
+{
+    BYTE c;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_AEC_CTRL_REG , &c);
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_AEC_CTRL_REG , c & ~HDMI_RX_AVC_EN );
+}
+*/
+
+void HDMI_RX_Set_Video_CH_Mapping(BYTE MappingValue)
+{
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_VID_CH_MAP_REG, MappingValue);
+}
+/*
+void HDMI_RX_Set_Video_Bit_Swap(bit swap_value)
+{
+    BYTE c,c1;
+    c1 = swap_value;
+    c1 = c1 << 3;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_VID_OUTPUT_CTRL2_REG, &c);
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_VID_OUTPUT_CTRL2_REG , (c & 0xf7) | c1);
+}
+
+void HDMI_RX_Set_Video_Bus_Mode(bit bus_mode)
+{
+    BYTE c,c1;
+    c1 = bus_mode;
+    c1 = c1 << 2;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_VID_OUTPUT_CTRL2_REG, &c);
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_VID_OUTPUT_CTRL2_REG , (c & 0xfb) | c1);
+}
+*/
+void HDMI_RX_Set_Color_Depth(BYTE ColorDepth)
+{
+    BYTE c;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_DEEP_COLOR_CTRL_REG , &c);
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_DEEP_COLOR_CTRL_REG , 
+        c | HDMI_RX_EN_MAN_DEEP_COLOR | ColorDepth);
+}
+
+void HDMI_RX_Set_HPD(BYTE Port, int delaytime)
+{
+    if(Port)
+    {
+        ;
+/*
+        printk("port 1 HPD issued... ");
+        HDMI_RX_Port1_HPD = 0;
+        delay_ms(delaytime);
+        HDMI_RX_Port1_HPD = 1;    
+*/        
+    }
+    else
+    {
+        printk("port 0 HPD issued... ");
+        HDMIRX_Hotplug_pin = 0;
+        delay_ms(delaytime);
+        HDMIRX_Hotplug_pin = 1;    
+    }    
+}
+
+void HDMI_RX_Initialize()
+{
+    BYTE c;
+
+    HDMI_RX_Init_var();
+
+    // Mute audio and video output
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_HDMI_MUTE_CTRL_REG, 0x03);
+    HDMI_RX_WriteI2C_RX1(HDMI_RX_HDCP_BCAPS_SHADOW_REG, 0x81);
+    
+    // Set clock detect source
+    // Enable pll_lock, digital clock detect, disable analog clock detect
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_CHIP_CTRL_REG, 0xe5);
+
+    // Init Interrupt
+    HDMI_RX_Set_IntPin(IntPin_Out_Type_open_drain,IntPin_Out_Polarity_Low);
+    HDMI_RX_Set_IntMask(HDMI_RX_INT_MASK1_REG, 0xff);    
+    HDMI_RX_Set_IntMask(HDMI_RX_INT_MASK2_REG, 0xf3);    
+    HDMI_RX_Set_IntMask(HDMI_RX_INT_MASK3_REG, 0x3f);    
+    HDMI_RX_Set_IntMask(HDMI_RX_INT_MASK4_REG, 0x17);    
+    HDMI_RX_Set_IntMask(HDMI_RX_INT_MASK5_REG, 0xff);    
+    HDMI_RX_Set_IntMask(HDMI_RX_INT_MASK6_REG, 0xff);
+    HDMI_RX_Set_IntMask(HDMI_RX_INT_MASK7_REG, 0x07);
+
+    HDMI_RX_Set_AEC_CtrlBits(HDMI_RX_AEC_EN0_REG, 0xe7);   
+    HDMI_RX_Set_AEC_CtrlBits(HDMI_RX_AEC_EN1_REG, 0x17);    // KW
+    HDMI_RX_Set_AEC_CtrlBits(HDMI_RX_AEC_EN2_REG, 0xf4);    // KW
+
+    // Init CTS threshold
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_ACR_CTRL1_REG, 0xc0);  // for 1080P Audio at Deep Color By KW
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_ACR_CTRL3_REG, 0x07);
+
+	//# Enable AVC and AAC
+    HDMI_RX_AVC_On();
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_AEC_CTRL_REG, &c);
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_AEC_CTRL_REG, c | HDMI_RX_AAC_EN);
+
+	if (!BIST_EN ) //no bist
+	{
+	    if(QFN48_EN)
+    	{
+			c = P2_6;
+			//c = (c<<1) | P2_6;
+			debug_printf("video interface***c= %.2x\n", (unsigned int)c);
+			switch (c)
+			{
+				case 0:
+					HDMI_RX_VID_Output_Fmt(YCbCr422_YCMUX); //yc mux 601
+					break;
+				case 1:
+					HDMI_RX_VID_Output_Fmt(YCbCr422_656_YCMUX); //yc mux 656
+					break;
+#if 0
+				case 2:
+					HDMI_RX_VID_Output_Fmt(YCbCr422_YCMUX); //DDR yc422 601
+					hdmi_rx_ycmux_setting = 0;
+					//HDMI_RX_AVC_Off();
+					/*
+					HDMI_RX_ReadI2C_RX0(HDMI_RX_AVC_EXCEPTION_MASK2_REG, &c); //for 8770 internal divide.
+				    HDMI_RX_WriteI2C_RX0(HDMI_RX_AVC_EXCEPTION_MASK2_REG, ((c & 0xbf) | 0x40));
+					HDMI_RX_ReadI2C_RX0(HDMI_RX_SYS_CTRL1_REG, &c);
+				    HDMI_RX_WriteI2C_RX0(HDMI_RX_SYS_CTRL1_REG, ((c & 0x3f) | 0x40));
+				    */
+					break;
+
+				case 3:
+					HDMI_RX_VID_Output_Fmt(YCbCr422_656_YCMUX); //DDR yc422 656
+					hdmi_rx_ycmux_setting = 0;
+
+					//HDMI_RX_AVC_Off();
+					/*
+					HDMI_RX_ReadI2C_RX0(HDMI_RX_AVC_EXCEPTION_MASK2_REG, &c);
+				    HDMI_RX_WriteI2C_RX0(HDMI_RX_AVC_EXCEPTION_MASK2_REG, ((c & 0xbf) | 0x40));
+					HDMI_RX_ReadI2C_RX0(HDMI_RX_SYS_CTRL1_REG, &c);
+	    			HDMI_RX_WriteI2C_RX0(HDMI_RX_SYS_CTRL1_REG, ((c & 0x3f) | 0x40));
+	    			*/
+					break;
+#endif
+	      default: 
+	            break;
+								
+				}
+	    	}
+			else
+			{
+				HDMI_RX_VID_Output_Fmt(RGB444);
+			   HDMI_RX_ReadI2C_RX0(HDMI_RX_VID_OUTPUT_CTRL2_REG, &c);
+              HDMI_RX_WriteI2C_RX0(HDMI_RX_VID_OUTPUT_CTRL2_REG, c | 0x04);
+			}
+	}
+	else
+		HDMI_RX_VID_Output_Fmt(RGB444);
+
+    //Swap color Red and Blue to simplify video DAC routing 0x8a
+    HDMI_RX_Set_Video_CH_Mapping(VID_MAP_Red_Green_Blue);
+//* 
+    //For debug purpose disable this function temporary //zjn 070212
+    //Set output video bus width to 30bits by using the rounding feature
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_VID_DDR_OUTPUT_CTRL_REG, &c);
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_VID_DDR_OUTPUT_CTRL_REG, ((c & 0xf3) | 0x04));
+//*/
+    
+
+//    HDMI_RX_AUD_Output_Fmt(I2S_Output_Selected);
+    HDMI_RX_AUD_Output_Fmt(SPDIF_Output_Selected);
+    HDMI_RX_MCLK_Source(HDMI_MCLK_Selected);
+    HDMI_RX_Set_MCLK_Freq(MCLK_Fs_128);
+    HDMI_RX_I2S_Mode(I2S_SCK_EDGE_Rising, I2S_Size_32bit, I2S_MSB_SIGN_EXT_Enable,
+        I2S_WS_POL_Low,I2S_JUST_CTRL_Left,I2S_DIR_CTRL_MSB,I2S_SHIFT);
+
+    //swap the i2s output form sd0~3 to sd3~0 to match the 8560 bu board design
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_AUD_OUT_I2S_MAP_REG, 0xe4);//0x1b);
+
+    //  reset HDCP
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_SRST_REG, &c);
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_SRST_REG , c | HDMI_RX_HDCP_MAN_RST);
+	delay_ms(10);
+// KW 07/02/22
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_SRST_REG, &c);
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_SRST_REG , c & ~HDMI_RX_HDCP_MAN_RST);
+
+    HDMI_RX_SoftReset();
+
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_SYS_PWDN1_REG, &c);
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_SYS_PWDN1_REG, c &(~HDMI_RX_PWDN_CTRL)); // power up all
+
+    // Set EQ Value
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_TMDS_P0_EQ_REG, 0xec);
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_TMDS_P1_EQ_REG, 0xec);
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_TMDS_EQ2_REG, 0x28);
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_TMDS_EQ_VCOM_REG, 0x20);
+    //Set PLL LOOP GAIN
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_TMDS_PLL_CTRL1_REG, 0xe0); 
+    // set cdr bandwidth
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_TIMING_LOOP_CNFG2_REG, 0x5a); 
+
+	HDMI_RX_WriteI2C_RX0(HDMI_RX_AUD_OUT_I2S_CTRL1_REG, 0x00);  	//wen updated
+
+    //Range limitation for RGB input
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_VID_DATA_RNG_CTRL_REG, &c);
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_VID_DATA_RNG_CTRL_REG, (c | HDMI_RX_R2Y_INPUT_LIMIT)); 
+
+	HDMI_RX_ReadI2C_RX0(HDMI_RX_SYS_CTRL1_REG, &c);
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_SYS_CTRL1_REG, (c | HDMI_RX_OUT_CLK_INV)); 
+
+		HDMI_RX_ReadI2C_RX0(HDMI_RX_SYS_PWDN2_REG, &c);	//dis output of 8770, 090630
+	    HDMI_RX_WriteI2C_RX0(HDMI_RX_SYS_PWDN2_REG, c | 0x07);
+			
+    printk("Chip is initialized..."); 
+}
+
+void HDMI_RX_SoftReset(void)
+{
+    BYTE c;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_SRST_REG, &c);
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_SRST_REG , c | HDMI_RX_SW_MAN_RST);
+    delay_ms(10);
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_SRST_REG, &c);
+    HDMI_RX_WriteI2C_RX0(HDMI_RX_SRST_REG , c & ~HDMI_RX_SW_MAN_RST);
+}
+
+
+void HDMI_RX_Port_Select(INPUT_PORT Selected_Port)
+{
+    BYTE CurrentInputPort, c ;
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_PORT_SEL_REG, &CurrentInputPort);
+
+    if( (Selected_Port == PORT1) && (CurrentInputPort != HDMI_PORT1) )  
+    {
+        printk("**** switch to port1"); 
+        HDMI_RX_Initialize();
+
+// KW 07/02/25
+// Power down port0 termination and on port1
+        HDMI_RX_ReadI2C_RX0(HDMI_RX_SYS_PWDN3_REG, &c);
+        HDMI_RX_WriteI2C_RX0(HDMI_RX_SYS_PWDN3_REG , (c | HDMI_RX_PD_TERM0) & ~HDMI_RX_PD_TERM1); 
+
+        HDMI_RX_WriteI2C_RX0(HDMI_RX_PORT_SEL_REG, 0x02); 
+        HDMI_RX_Set_HPD(PORT1, 300);
+        HDMI_RX_WriteI2C_RX0(HDMI_RX_PORT_SEL_REG, 0x22); // Enable DDC after HPD
+    }
+    else if((Selected_Port == PORT0) && (CurrentInputPort != HDMI_PORT0) ) 
+    {
+        printk("**** switch to port0"); 
+        HDMI_RX_Initialize();
+
+// KW 07/02/25
+// Power down port1 termination and on port0
+        HDMI_RX_ReadI2C_RX0(HDMI_RX_SYS_PWDN3_REG, &c);
+        HDMI_RX_WriteI2C_RX0(HDMI_RX_SYS_PWDN3_REG , ( c | HDMI_RX_PD_TERM1) & ~HDMI_RX_PD_TERM0);
+        
+        HDMI_RX_WriteI2C_RX0(HDMI_RX_PORT_SEL_REG, 0x01);
+        HDMI_RX_Set_HPD(PORT0, 300);
+        HDMI_RX_WriteI2C_RX0(HDMI_RX_PORT_SEL_REG, 0x11); 
+
+    }
+}
+
+void HDMI_RX_Clk_Detected_Int(void)
+{
+    BYTE c;
+
+    debug_printf("*HDMI_RX Interrupt: Pixel Clock Change.\n");
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_SYS_STATUS_REG, &c);
+    if (c & HDMI_RX_CLK_DET)
+    {
+        debug_printf("   Pixel clock existed. \n");
+        return;
+    } 
+    else
+    {
+        debug_printf("   Pixel clock lost. \n");
+        HDMI_RX_Set_Sys_State(MONITOR_CKDT);
+        g_Sync_Expire_Cntr = 0;
+    }	
+}
+
+void HDMI_RX_Show_Video_Info(void)
+{
+    BYTE c;
+    BYTE cl,ch;
+    WORD n;
+    WORD h_res,v_res;
+    
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_DE_PIXL_REG, &cl);
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_DE_PIXH_REG, &ch);
+    n = ch;
+    n = (n << 8) + cl;
+    h_res = n;
+    
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_DE_LINL_REG, &cl);
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_DE_LINH_REG, &ch);	// KW 07/02/25
+    n = ch;
+    n = (n << 8) + cl;
+    v_res = n;
+    
+    printk("");
+    printk("******************************HDMI_RX Info*******************************");
+    debug_printf("HDMI_RX Is Normally Play Back.\n");
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_HDMI_STATUS_REG, &c); 
+    if(c & HDMI_RX_HDMI_MODE)
+        debug_printf("HDMI_RX Mode = HDMI Mode.\n");
+    else
+        debug_printf("HDMI_RX Mode = DVI Mode.\n");
+
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_VIDEO_STATUS_REG, &c); 
+    if(c & HDMI_RX_VIDEO_TYPE)
+    {
+        v_res += v_res;
+    }       
+    debug_printf("HDMI_RX Video Resolution = %d * %d ",h_res,v_res);
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_VIDEO_STATUS_REG, &c); 
+    if(c & HDMI_RX_VIDEO_TYPE)
+        printk("    Interlace Video.");
+    else
+        printk("    Progressive Video.");
+
+
+    debug_printf("The Video Interface = Digital Video");
+    if(ANALOG_VID_EN)
+        debug_printf("  +  Analog Video.\n");
+    else
+        debug_printf(" .\n");
+    
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_SYS_CTRL1_REG, &c);  
+    if((c & 0x30) == 0x00)
+        debug_printf("Input Pixel Clock = Not Repeated.\n");
+    else if((c & 0x30) == 0x10)
+        debug_printf("Input Pixel Clock = 2x Video Clock. Repeated.\n");
+    else if((c & 0x30) == 0x30)
+        debug_printf("Input Pixel Clock = 4x Video Clock. Repeated.\n");
+
+    if((c & 0xc0) == 0x00)
+        debug_printf("Output Video Clock = Not Divided.\n");
+    else if((c & 0xc0) == 0x40)
+        debug_printf("Output Video Clock = Divided By 2.\n");
+    else if((c & 0xc0) == 0xc0)
+        debug_printf("Output Video Clock = Divided By 4.\n");
+
+    if(c & 0x02)
+        debug_printf("Output Video Using Rising Edge To Latch Data.\n");
+    else
+        debug_printf("Output Video Using Falling Edge To Latch Data.\n");
+
+	if ( c & 0x80)
+  		debug_printf("Output Video Clock = 2x Video Clock. For YC MUX.\n");
+
+    debug_printf("Input Video Color Depth = "); // KW 07/02/25
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_VIDEO_STATUS_REG, &c);  
+    c &= 0xF0;
+    if(c == 0x00)        
+        debug_printf("Legacy Mode.\n");
+    else if(c == 0x40)   
+        debug_printf("24 Bit Mode.\n");
+    else if(c == 0x50)   
+        debug_printf("30 Bit Mode.\n");
+    else if(c == 0x60)   
+        debug_printf("36 Bit Mode.\n");
+    else if(c == 0x70)   
+        debug_printf("48 Bit Mode.\n");
+    else                 
+        debug_printf("Unknow 0x44 = 0x%.2x\n",(int)c);
+
+    debug_printf("Input Video Color Space = ");
+    HDMI_RX_ReadI2C_RX1(HDMI_RX_AVI_DATA00_REG, &c);  
+    c &= 0x60;
+    if(c == 0x20)        
+        debug_printf("YCbCr4:2:2 .\n");
+    else if(c == 0x40)   
+        debug_printf("YCbCr4:4:4 .\n");
+    else if(c == 0x00)   
+        debug_printf("RGB.\n");
+    else                 
+        debug_printf("Unknow 0x44 = 0x%.2x\n",(int)c);
+    
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_VID_AOF_REG, &c);
+    if((c == 0x00) || (c == 0x80))
+        debug_printf("Output Video Format = RGB.\n");
+    else if((c == 0x01) || (c == 0x81))
+        debug_printf("Output Video Format = YCbCr4:4:4.\n");
+    else if (c == 0x07)
+        debug_printf("Output Video Format = YCbCr4:2:2 YCMUX.\n");
+	else if (c == 0x0f)
+        debug_printf("Output Video Format = YCbCr4:2:2 YCMUX+656.\n");
+	HDMI_RX_ReadI2C_RX0(HDMI_RX_AUDIO_OUT_CTRL_REG, &c);
+    if( c & 0x04)
+    {
+        debug_printf("Output Audio Interface = I2S.\n");
+	}
+	else if ( c & 0x02)
+        debug_printf("Output Audio Interface = SPDIF.\n");
+
+    HDMI_RX_ReadI2C_RX0(0xa0,&c);
+    c = c & 0x01;
+    if(!c)
+    {
+        printk("Input MCLK is selected.");
+    }
+    else
+        printk("External MCLK is selected.");
+    
+    HDMI_RX_ReadI2C_RX0(0xa2,&c);
+    c = c & 0x30;
+    debug_printf("Output MCLK Frequence = ");
+    
+    switch(c)
+    {
+        case 0x00: 
+            printk("128 * Fs.");
+            break;
+        case 0x10: 
+            printk("256 * Fs.");
+            break;
+        case 0x20:
+            printk("384 * Fs.");
+            break;
+        case 0x30: 
+            printk("512 * Fs.");
+            break;
+        default :         
+            printk("Wrong MCLK output.");
+            break;
+    }
+    
+
+    debug_printf("Audio Fs = ");
+    HDMI_RX_ReadI2C_RX0(HDMI_RX_AUD_IN_SPDIF_CH_STATUS4_REG, &c); // KW 07/02/25
+    c &= 0x0f;
+    switch(c)
+    {
+        case 0x00: 
+            printk("44.1 KHz.");
+            break;
+        case 0x02: 
+            printk("48 KHz.");
+            break;
+        case 0x03: 
+            printk("32 KHz.");
+            break;
+        case 0x08: 
+            printk("88.2 KHz.");
+            break;        
+        case 0x0a: 
+            printk("96 KHz.");
+            break;
+		case 0x0c: 
+		      printk("176.4 KHz.");
+            break;
+        case 0x0e: 
+            printk("192 KHz.");
+            break;
+        default :         
+            printk("Wrong MCLK output.");
+            break;
+    }
+
+    HDMI_RX_ReadI2C_RX1(HDMI_RX_HDCP_STATUS_REG, &c); 
+    if(c & HDMI_RX_AUTHEN)
+        printk("Authentication is attempted.");
+    else
+        printk("Authentication is not attempted.");
+
+    for(cl=0;cl<20;cl++)
+    {
+        HDMI_RX_ReadI2C_RX1(HDMI_RX_HDCP_STATUS_REG, &c); 
+        if(c & HDMI_RX_DECRYPT)
+            break;
+        else
+            delay_ms(10);
+    }
+    if(cl < 20)
+        printk("Decryption is active.");
+    else
+        printk("Decryption is not active.");
+             
+    printk("***********************************************************************************");
+    printk("");
+}
+
+/*
+void HDMI_RX_AUDIO_BIST()
+{
+	unsigned char c1;
+	
+		HDMI_RX_WriteI2C_RX0(HDMI_RX_PORT_SEL_REG, 0x00);
+		HDMI_RX_WriteI2C_RX0(HDMI_RX_SYS_PWDN1_REG, 0x00);
+	   HDMI_RX_WriteI2C_RX0(HDMI_RX_VID_AOF_REG, 0x03);
+	   	HDMI_RX_WriteI2C_RX0(HDMI_RX_ACR_CTRL1_REG, 0x38);				//wen updated
+	   	HDMI_RX_WriteI2C_RX0(HDMI_RX_AUD_OUT_I2S_CTRL2_REG, 0x09);
+	    HDMI_RX_WriteI2C_RX0(HDMI_RX_ACR_PLL_DEBUG2_REG, 0x93);	 
+	    HDMI_RX_WriteI2C_RX0(HDMI_RX_ACR_PLL_DEBUG2_REG, 0x92);
+	    HDMI_RX_ReadI2C_RX0(HDMI_RX_ACR_DEBUG_REG, &c1);
+	    c1 = c1 & 0x1f;
+
+	
+	//#if 1
+	if(c1 >=20) 
+	{
+		   HDMI_RX_WriteI2C_RX0(HDMI_RX_ACR_CTS_SOFTWARE_VALUE1_REG, 0x50);
+			HDMI_RX_WriteI2C_RX0(HDMI_RX_ACR_CTS_SOFTWARE_VALUE2_REG, 0x46);
+			HDMI_RX_WriteI2C_RX0(HDMI_RX_ACR_CTS_SOFTWARE_VALUE3_REG, 0x00);
+    	} 
+	else 
+	{
+       	HDMI_RX_WriteI2C_RX0(HDMI_RX_ACR_CTS_SOFTWARE_VALUE1_REG, 0x9a);
+       	HDMI_RX_WriteI2C_RX0(HDMI_RX_ACR_CTS_SOFTWARE_VALUE2_REG, 0x9e);
+			HDMI_RX_WriteI2C_RX0(HDMI_RX_ACR_CTS_SOFTWARE_VALUE3_REG, 0x00);
+	}
+	//#endif
+}
+*/
+void HDMI_RX_Set_Color_Mode(void)
+{
+    if(!video_format_supported)
+    { 
+        printk("video format not supported!");
+         if (!g_Video_Muted)
+        {  
+            HDMI_RX_Mute_Video();
+        }
+        if (!g_Audio_Muted)
+        {
+            HDMI_RX_Mute_Audio();
+        }
+        deep_color_set_done = 0;
+        if(set_color_mode_counter > 3)
+            set_color_mode_counter = 0;
+    }
+    else 
+        set_color_mode_counter = 0;
+
+    if(!deep_color_set_done && (g_Sys_State >= WAIT_VIDEO))
+    {
+        if((HDMI_RX_Get_Input_Color_Depth() == Hdmi_24bit) ||
+            (HDMI_RX_Get_Input_Color_Depth() == Hdmi_30bit) || 
+            (HDMI_RX_Get_Input_Color_Depth() == Hdmi_36bit))
+        {
+            HDMI_RX_WriteI2C_RX0(HDMI_RX_DEEP_COLOR_CTRL_REG , 0x00);
+            delay_ms(32);
+            printk("RX gets 3 GCP and works in deep color mode!");
+        }
+        else
+        {
+            printk("RX doesn't get 3 GCP and trys to judge which color mode it should work in !");
+            debug_printf("set_color_mode_counter = %.2x\n", (WORD)set_color_mode_counter);
+	     debug_printf("video_format_supported = %.2x\n", (WORD)video_format_supported);
+	     switch(set_color_mode_counter)
+            {
+                case 0:
+                    HDMI_RX_Set_Color_Depth(Deep_Color_legacy);
+                    delay_ms(32);
+                    break;
+                case 1:
+                    HDMI_RX_Set_Color_Depth(Deep_Color_36bit);
+                    delay_ms(32);
+                    break;
+                case 2:
+                    HDMI_RX_Set_Color_Depth(Deep_Color_30bit);
+                    delay_ms(32);
+                    break;
+                case 3:
+                    HDMI_RX_Set_Color_Depth(Deep_Color_24bit);
+                    delay_ms(32);
+                    break;
+                default:
+                    break;
+            }
+            set_color_mode_counter++;
+        }
+        deep_color_set_done = 1;
+        video_format_supported = 1;
+    }
+}
+
+
+BYTE HDMI_RX_ReadI2C_RX0(BYTE sub_addr, BYTE *rxdata)
+{
+    BYTE rc;
+    rc = i2c_read_p0_reg(sub_addr,rxdata);
+    if(rc) { printk("**** HDMI_RX RX0 Read Error"); }
+    return	rc;
+}
+
+BYTE HDMI_RX_WriteI2C_RX0(BYTE sub_addr, BYTE txdata)
+{
+    BYTE rc;
+    rc = i2c_write_p0_reg(sub_addr,txdata);
+    if(rc) { printk("**** HDMI_RX RX0 Write Error"); }
+    return	rc;	
+}
+
+BYTE HDMI_RX_ReadI2C_RX1(BYTE sub_addr,  BYTE *rxdata)
+{
+    BYTE rc;
+    rc = i2c_read_p1_reg(sub_addr,rxdata);
+    if(rc) { printk("**** HDMI_RX RX1 Read Error"); }
+    return	rc;
+}
+
+BYTE HDMI_RX_WriteI2C_RX1(BYTE sub_addr,  BYTE txdata)
+{
+    BYTE	rc;
+    rc = i2c_write_p1_reg(sub_addr,txdata);
+    if(rc) { printk("**** HDMI_RX RX1 Write Error"); }
+    return	rc;
+}
+
+
+
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/ANX7150/ANX7150.h
+++ linux-mvl-dove-2.6.32/drivers/video/display/ANX7150/ANX7150.h
@@ -0,0 +1,12 @@
+
+#define BIST_EN 0
+#define BIST3_EN 0
+#define EXT_INT_EN 0
+#define QFN48_EN 0
+#define HDCP_EN 0
+#define KG2_APP
+/*
+#define ANX7150_DEBUG(format, args...)\
+	printk(KERN_DEBUG "%s(%d): "format"\n", __FUNCTION__, __LINE__, ##args)
+*/
+#define ANX7150_DEBUG(format, args...)	
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/ANX7150/ANX7150_System_Config.c
+++ linux-mvl-dove-2.6.32/drivers/video/display/ANX7150/ANX7150_System_Config.c
@@ -0,0 +1,284 @@
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/param.h>
+#include <linux/jiffies.h>
+#include <linux/platform_device.h>
+#include <linux/i2c.h>
+#include <linux/delay.h>
+#include <linux/proc_fs.h>
+
+
+#include "ANX7150_System_Config.h"
+#include "ANX7150_i2c_intf.h"
+#include "ANX7150_Sys7150.h"
+#include "HDMI_RX_DRV.h"   
+#include "ANX7150.h"
+//#include "Mcu.h"
+//#include "Uart_int.h"
+//#include "Timer.h"
+
+//BYTE ANX7150_new_HW_interface_parameter;
+extern struct i2c_client *g_client;
+
+void ANX7150_API_System_Config()
+{
+#if 0//#if ANX8770_USED
+    ANX7150_8770_Video_Config();
+    ANX7150_8770_Audio_Config();
+    ANX7150_8770_Packets_Config();
+#else
+    //ANX7150_API_Video_Config(ANX7150_V1920x1080i_60Hz,input_pixel_clk_1x_repeatition);
+    ANX7150_API_Video_Config(ANX7150_V1920x1080p_60Hz,input_pixel_clk_1x_repeatition);
+    //printk("###ANX7150_API_System_Config()--> ANX7150_V1280x720p_60Hz is configured\n");
+    //ANX7150_API_Video_Config(ANX7150_V1280x720p_60Hz,input_pixel_clk_1x_repeatition);
+
+
+    ANX7150_API_Packets_Config(ANX7150_avi_sel | ANX7150_audio_sel);
+    if(s_ANX7150_packet_config.packets_need_config & ANX7150_avi_sel)
+        ANX7150_API_AVI_Config(YCbCr422,source_ratio,null,null,null,null,null,null,null,null,null,null,null);
+    if(s_ANX7150_packet_config.packets_need_config & ANX7150_audio_sel)
+        ANX7150_API_AUD_INFO_Config(null,null,null,null,null,null,null,null,null,null);
+    ANX7150_API_AUD_CHStatus_Config(null,null,null,null,null,null,null,null,null,null);
+#endif
+}
+
+
+
+void ANX7150_API_Video_Config(BYTE video_id,BYTE input_pixel_rpt_time)
+{
+    ANX7150_video_timing_id = video_id;
+    ANX7150_in_pix_rpt = input_pixel_rpt_time;
+}
+
+
+
+
+void ANX7150_API_Packets_Config(BYTE pkt_sel)
+{
+    s_ANX7150_packet_config.packets_need_config = pkt_sel;
+}
+
+
+
+
+void ANX7150_API_AUD_CHStatus_Config(BYTE MODE,BYTE PCM_MODE,BYTE SW_CPRGT,BYTE NON_PCM,
+    BYTE PROF_APP,BYTE CAT_CODE,BYTE CH_NUM,BYTE SOURCE_NUM,BYTE CLK_ACCUR,BYTE Fs)
+{
+    //MODE: 0x00 = PCM Audio
+    //PCM_MODE: 0x00 = 2 audio channels without pre-emphasis;
+                                //0x01 = 2 audio channels with 50/15 usec pre-emphasis;
+    //SW_CPRGT: 0x00 = copyright is asserted; 
+                                // 0x01 = copyright is not asserted;
+    //NON_PCM: 0x00 = Represents linear PCM
+                            //0x01 = For other purposes
+    //PROF_APP: 0x00 = consumer applications;
+                              // 0x01 = professional applications;
+
+    //CAT_CODE: Category code
+    //CH_NUM: 0x00 = Do not take into account
+                           // 0x01 = left channel for stereo channel format
+                           // 0x02 = right channel for stereo channel format                           
+    //SOURCE_NUM: source number
+                                   // 0x00 = Do not take into account
+                                  // 0x01 = 1; 0x02 = 2; 0x03 = 3
+    //CLK_ACCUR: 0x00 = level II
+                                   // 0x01 = level I
+                                   // 0x02 = level III 
+                                   // else reserved;
+
+    s_ANX7150_audio_config.i2s_config.Channel_status1 = (MODE << 7) | (PCM_MODE << 5) | 
+        (SW_CPRGT << 2) | (NON_PCM << 1) | PROF_APP;
+    s_ANX7150_audio_config.i2s_config.Channel_status2 = CAT_CODE;
+    s_ANX7150_audio_config.i2s_config.Channel_status3 = (CH_NUM << 7) | SOURCE_NUM;
+    s_ANX7150_audio_config.i2s_config.Channel_status4 = (CLK_ACCUR << 5) | Fs;
+}
+
+
+
+
+void ANX7150_API_AVI_Config(BYTE pb1,BYTE pb2,BYTE pb3,BYTE pb4,BYTE pb5,
+    BYTE pb6,BYTE pb7,BYTE pb8,BYTE pb9,BYTE pb10,BYTE pb11,BYTE pb12,BYTE pb13)
+{
+    s_ANX7150_packet_config.avi_info.pb_byte[1] = pb1;
+    s_ANX7150_packet_config.avi_info.pb_byte[2] = pb2;
+    s_ANX7150_packet_config.avi_info.pb_byte[3] = pb3;
+    s_ANX7150_packet_config.avi_info.pb_byte[4] = pb4;
+    s_ANX7150_packet_config.avi_info.pb_byte[5] = pb5;
+    s_ANX7150_packet_config.avi_info.pb_byte[6] = pb6;
+    s_ANX7150_packet_config.avi_info.pb_byte[7] = pb7;
+    s_ANX7150_packet_config.avi_info.pb_byte[8] = pb8;
+    s_ANX7150_packet_config.avi_info.pb_byte[9] = pb9;
+    s_ANX7150_packet_config.avi_info.pb_byte[10] = pb10;
+    s_ANX7150_packet_config.avi_info.pb_byte[11] = pb11;
+    s_ANX7150_packet_config.avi_info.pb_byte[12] = pb12;
+    s_ANX7150_packet_config.avi_info.pb_byte[13] = pb13;
+}
+
+
+
+void ANX7150_API_AUD_INFO_Config(BYTE pb1,BYTE pb2,BYTE pb3,BYTE pb4,BYTE pb5,
+    BYTE pb6,BYTE pb7,BYTE pb8,BYTE pb9,BYTE pb10)
+{
+    s_ANX7150_packet_config.audio_info.pb_byte[1] = pb1;  
+    s_ANX7150_packet_config.audio_info.pb_byte[2] = pb2;
+    s_ANX7150_packet_config.audio_info.pb_byte[3] = pb3;
+    s_ANX7150_packet_config.audio_info.pb_byte[4] = pb4;
+    s_ANX7150_packet_config.audio_info.pb_byte[5] = pb5;
+    s_ANX7150_packet_config.audio_info.pb_byte[6] = pb6;
+    s_ANX7150_packet_config.audio_info.pb_byte[7] = pb7;
+    s_ANX7150_packet_config.audio_info.pb_byte[8] = pb8;
+    s_ANX7150_packet_config.audio_info.pb_byte[9] = pb9;
+    s_ANX7150_packet_config.audio_info.pb_byte[10] = pb10;
+}
+
+
+/*
+
+void ANX7150_8770_Video_Config()
+{
+    BYTE video_id;
+    i2c_read_p1_reg(0xa7, &video_id); //
+    ANX7150_API_Video_Config(video_id,input_pixel_clk_1x_repeatition);
+}
+*/
+/*
+
+void ANX7150_8770_Packets_Config()
+{
+    BYTE c[13],c1[10],c2,c3,c4,i;
+    // AVI & Audio infoframe 
+    c2 = ANX7150_avi_sel;
+    c3 = ANX7150_audio_sel;
+    c4 = c2 | c3;
+    ANX7150_API_Packets_Config(c4);
+    
+    for(i = 0; i < 13; i++)
+        i2c_read_p1_reg(0xa4 + i, &c[i]);
+    // audio infoframe
+    for(i=0; i<10; i++)
+        i2c_read_p1_reg((0xc4+i), &c1[i]);
+    ANX7150_API_AVI_Config(c[0],c[1],c[2],c[3],c[4],c[5],c[6],c[7],c[8],c[9],c[10],c[11],c[12]);
+    ANX7150_API_AUD_INFO_Config(c1[0],c1[1],c1[2],c1[3],c1[4],c1[5],c1[6],c1[7],c1[8],c1[9]);
+}
+*/
+
+/*
+
+void ANX7150_8770_Audio_Config()
+{
+    BYTE c,ch1,ch2,ch3,ch4,ch5;
+    
+    BYTE mode; //0x00 = PCM Audio
+    BYTE pcm_mode;  //0x00 = 2 audio channels without pre-emphasis;
+                                //0x01 = 2 audio channels with 50/15 usec pre-emphasis;
+    BYTE sw_cprt; // 0x00 = copyright is asserted; 
+                                // 0x01 = copyright is not asserted;
+    BYTE non_pcm;//0x00 = Represents linear PCM
+                            //0x01 = For other purposes
+    BYTE prof_app; //0x00 = consumer applications;
+                              // 0x01 = professional applications;
+
+    BYTE cat_code;// Category code
+    BYTE ch_num;// 0x00 = Do not take into account
+                           // 0x01 = left channel for stereo channel format
+                           // 0x02 = right channel for stereo channel format                           
+    BYTE source_num;// source number
+                                   // 0x00 = Do not take into account
+                                  // 0x01 = 1; 0x02 = 2; 0x03 = 3
+    BYTE clk_accur;   // 0x00 = level II
+                                   // 0x01 = level I
+                                   // 0x02 = level III 
+                                   // else reserved;
+    BYTE Fs;
+    // read channel status from anx9011                                   
+    i2c_read_p0_reg(0xc7, &ch1);
+    i2c_read_p0_reg(0xc8, &ch2);
+    i2c_read_p0_reg(0xc9, &ch3);
+    i2c_read_p0_reg(0xca, &ch4);
+    i2c_read_p0_reg(0xcb, &ch5);
+    i2c_read_p0_reg(0x15, &c);
+	if (c & 0x08)
+	{
+			s_ANX7150_audio_config.audio_layout = 0x80;
+	}
+	else
+	{
+			s_ANX7150_audio_config.audio_layout = 0x00;
+	}
+    //debug_printf("@@@@@@ch4= %.2x\n", (unsigned int) ch4 );//
+
+    // audio channel status config
+    // system should give value to below varibles according its need.
+    mode = (ch1>>6) & 0x03;
+    pcm_mode =  (ch1>>3) & 0x07;
+    sw_cprt = (ch1>>2) & 0x01;
+    non_pcm = (ch1>>1) & 0x01;
+    prof_app = ch1 & 0x01;
+
+    cat_code = ch2;
+
+    ch_num = (ch3>>4) & 0x0f;
+    source_num = ch3 & 0x0f;
+    
+    clk_accur = (ch4>>4) & 0x03;
+
+    Fs = ch4 & 0x0f;
+
+	//debug_printf("@@@@@@Fs= %.2x\n", (unsigned int) Fs );//
+    ANX7150_API_AUD_CHStatus_Config(mode,pcm_mode,sw_cprt,non_pcm,
+        prof_app,cat_code,ch_num,source_num,clk_accur,Fs);
+
+}
+*/
+
+int ANX7150_API_DetectDevice()
+{
+    printk("!ANX7150_API_DetectDevice enter\n");
+    return ANX7150_Chip_Located();
+}
+
+
+
+void ANX7150_API_HoldSystemConfig(BIT bHold_ANX7150)
+{
+	ANX7150_app_hold_system_config = bHold_ANX7150;
+}
+
+
+
+
+void ANX7150_API_ShutDown(BIT bShutDown_ANX7150)
+{
+    ANX7150_shutdown = bShutDown_ANX7150;
+}
+
+
+
+void ANX7150_API_HDCP_ONorOFF(BIT HDCP_ONorOFF)
+{
+    ANX7150_HDCP_enable = HDCP_ONorOFF;// 1: on;  0:off
+}
+
+
+
+void ANX7150_API_Input_Changed()
+{
+    BYTE c,c1,c2,c3,c4,c5;
+}
+
+
+
+void ANX7150_API_Set_AVMute()
+{
+    ANX7150_Set_AVMute();//wen
+}
+
+
+
+void ANX7150_API_Clean_HDCP()
+{
+    ANX7150_Clean_HDCP();
+}
+
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/ANX7150/ANX7150_Sys7150.h
+++ linux-mvl-dove-2.6.32/drivers/video/display/ANX7150/ANX7150_Sys7150.h
@@ -0,0 +1,1318 @@
+
+#include <linux/i2c.h>
+#ifndef _ANX7150_Sys_H
+#define _ANX7150_Sys_H
+
+#define ANX7150_FW_VER 0.23
+
+
+typedef unsigned char BYTE;
+typedef int BIT;//typedef bool BIT;//typedef bit BIT;
+typedef unsigned int WORD;
+
+
+
+extern BYTE timer_slot,misc_reset_needed;
+extern BYTE bist_switch_value_pc,switch_value;
+extern BYTE switch_value_sw_backup,switch_value_pc_backup;
+extern BYTE ANX7150_system_state;
+extern int ANX7150_srm_checked;//extern BIT ANX7150_srm_checked;
+extern int ANX7150_HDCP_enable;//extern BIT ANX7150_HDCP_enable;
+extern int ANX7150_INT_Done;//extern BIT ANX7150_INT_Done;
+extern BYTE FREQ_MCLK;
+extern BYTE int_s1, int_s2, int_s3;
+
+struct Bist_Video_Format {
+    //BYTE number;
+    WORD h_total_length;
+    WORD h_active_length;
+    WORD v_total_length;
+    WORD v_active_length;
+    WORD h_front_porch;
+    WORD h_sync_width;
+    WORD h_back_porch;
+    WORD v_front_porch;
+    WORD v_sync_width;
+    WORD v_back_porch;
+    BYTE h_sync_polarity;
+    BYTE v_sync_polarity;
+    BYTE is_interlaced;
+    BYTE video_mode;
+};
+
+typedef struct 
+{
+    BYTE is_HDMI;
+    BYTE ycbcr444_supported;
+    BYTE ycbcr422_supported;
+    BYTE supported_1080p_60Hz;
+    BYTE supported_1080p_50Hz;
+    BYTE supported_1080i_60Hz;
+    BYTE supported_1080i_50Hz;
+    BYTE supported_720p_60Hz;
+    BYTE supported_720p_50Hz;
+    BYTE supported_576p_50Hz;
+    BYTE supported_576i_50Hz;
+    BYTE supported_640x480p_60Hz;
+    BYTE supported_720x480p_60Hz;
+    BYTE supported_720x480i_60Hz;
+    BYTE AudioFormat[10];//MAX audio STD block is 10(0x1f / 3)
+    BYTE AudioChannel[10];
+    BYTE AudioFs[10];
+    BYTE AudioLength[10];
+    BYTE SpeakerFormat;BYTE edid_errcode;}ANX7150_edid_result_4_system;
+
+extern ANX7150_edid_result_4_system ANX7150_edid_result;
+//#define ITU656
+//#ifdef ITU656
+struct ANX7150_video_timingtype{ //CEA-861C format
+    BYTE ANX7150_640x480p_60Hz[18];//format 1
+    BYTE ANX7150_720x480p_60Hz[18];//format 2 & 3
+    BYTE ANX7150_1280x720p_60Hz[18];//format 4
+    BYTE ANX7150_1920x1080i_60Hz[18];//format 5
+    BYTE ANX7150_720x480i_60Hz[18];//format 6 & 7
+    //BYTE ANX7150_720x240p_60Hz[18];//format 8 & 9
+    //BYTE ANX7150_2880x480i_60Hz[18];//format 10 & 11
+    //BYTE ANX7150_2880x240p_60Hz[18];//format 12 & 13
+    //BYTE ANX7150_1440x480p_60Hz[18];//format 14 & 15
+    //BYTE ANX7150_1920x1080p_60Hz[18];//format 16
+    BYTE ANX7150_720x576p_50Hz[18];//format 17 & 18
+    BYTE ANX7150_1280x720p_50Hz[18];//format 19
+    BYTE ANX7150_1920x1080i_50Hz[18];//format 20*/
+    BYTE ANX7150_720x576i_50Hz[18];//format 21 & 22
+    /* BYTE ANX7150_720x288p_50Hz[18];//formats 23 & 24 
+    BYTE ANX7150_2880x576i_50Hz[18];//formats 25 & 26 
+    BYTE ANX7150_2880x288p_50Hz[18];//formats 27 & 28
+    BYTE ANX7150_1440x576p_50Hz[18];//formats 29 & 30
+    BYTE ANX7150_1920x1080p_50Hz[18];//format 31
+    BYTE ANX7150_1920x1080p_24Hz[18];//format 32
+    BYTE ANX7150_1920x1080p_25Hz[18];//format 33
+    BYTE ANX7150_1920x1080p_30Hz[18];//format 34*/
+};
+//#endif
+// 8 type of packets are legal, It is possible to sent 6 types in the same time;
+// So select 6 types below at most;
+// avi_infoframe and audio_infoframe have fixxed address;
+// config other selected types of packet to the rest 4 address with no limits.
+typedef enum
+{
+    ANX7150_avi_infoframe,
+    ANX7150_audio_infoframe,
+    /*ANX7150_spd_infoframe,
+    ANX7150_mpeg_infoframe,
+    ANX7150_acp_packet,
+    ANX7150_isrc1_packet,
+    ANX7150_isrc2_packet,
+    ANX7150_vendor_infoframe,*/
+}packet_type;
+
+typedef struct
+{
+    BYTE type;
+    BYTE version; 
+    BYTE length;
+    BYTE pb_byte[28];    
+}infoframe_struct;
+
+typedef struct
+{
+    BYTE packets_need_config;    //which infoframe packet is need updated
+    infoframe_struct avi_info;
+    infoframe_struct audio_info;    
+    /*  for the funture use
+    infoframe_struct spd_info;
+    infoframe_struct mpeg_info;
+    infoframe_struct acp_pkt;
+    infoframe_struct isrc1_pkt;
+    infoframe_struct isrc2_pkt;
+    infoframe_struct vendor_info; */
+   
+} config_packets;
+/*
+    BYTE i2s_format;
+
+    Bit(s)	Name	Type	Default 	Description
+    7	EXT_VUCP	R/W	        0x0	
+            Enable indicator of VUCP BITs extraction from input
+            I2S audio stream. 0 = disable; 1 = enable.
+    6:5	MCLK_PHS_CTRL	R/W	    0x0	
+            MCLK phase control for audio SPDIF input, which value 
+            is depended on the value of MCLK frequency set and not great than it.
+    4	Reserved			
+    3	SHIFT_CTRL 	R/W 	0x0	
+            WS to SD shift first BIT. 0 = fist BIT shift (Philips Spec); 1 = no shift.
+    2	DIR_CTRL	R/W	    0x0	
+            SD data Indian (MSB or LSB first) control. 0 = MSB first; 1 = LSB first.
+    1	WS_POL	    R/W 	0x0	
+            Word select left/right polarity select. 0 = left polarity 
+            when works select is low; 1 = left polarity when word select is high.
+    0	JUST_CTRL	R/W 	0x0	
+            SD Justification control. 1 = data is right justified; 
+            0 = data is left justified.
+
+*/
+/*
+    BYTE audio_channel
+Bit(s)	Name	Type Default 	Description    
+5	AUD_SD3_IN	R/W	0x0	Set I2S input channel #3 enable. 0 = disable; 1 = enable.
+4	AUD_SD2_IN	R/W	0x0	Set I2S input channel #2 enable. 0 = disable; 1 = enable.
+3	AUD_SD1_IN	R/W	0x0	Set I2S input channel #1 enable. 0 = disable; 1 = enable.
+2	AUD_SD0_IN	R/W	0x0	Set I2S input channel #0 enable. 0 = disable; 1 = enable.
+
+
+*/
+/*
+    BYTE i2s_map0
+Bit(s)	Name	Type	Default 	Description
+7:6	FIFO3_SEL	R/W	0x3	I2S Channel data stream select for audio FIFO 3. 0 = SD 0; 1 = SD 1; 2 = SD 2; 3 = SD 3;
+5:4	FIFO2_SEL	R/W	0x2	I2S Channel data stream select for audio FIFO 2. 0 = SD 0; 1 = SD 1; 2 = SD 2; 3 = SD 3;
+3:2	FIFO1_SEL	R/W	0x1	I2S Channel data stream select for audio FIFO 1. 0 = SD 0; 1 = SD 1; 2 = SD 2; 3 = SD 3;
+1:0	FIFO0_SEL	R/W	0x0	I2S Channel data stream select for audio FIFO 0. 0 = SD 0; 1 = SD 1; 2 = SD 2; 3 = SD 3;
+
+    BYTE i2s_map1
+Bit(s)	Name	Type	Default 	Description
+7	SW3	R/W	0x0	Swap left/right channel on I2S channel 3. 1 = swap; 0 = no swap.
+6	SW2	R/W	0x0	Swap left/right channel on I2S channel 2. 1 = swap; 0 = no swap.
+5	SW1	R/W	0x0	Swap left/right channel on I2S channel 1. 1 = swap; 0 = no swap.
+4	SW0	R/W	0x0	Swap left/right channel on I2S channel 0. 1 = swap; 0 = no swap.
+3:1	IN_WORD_LEN	R/W	0x5	Input I2S audio word length (corresponding to channel status BITs [35:33]).  When IN_WORD_MAX = 0, 001 = 16 BITs; 010 = 18 BITs; 100 = 19 BITs; 101 = 20 BITs; 110 = 17 BITs; when IN_WORD_MAX = 1, 001 = 20 BITs; 010 = 22 BITs; 100 = 23 BITs; 101 = 24 BITs; 110 = 21 BITs.
+0	IN_WORD_MAX	R/W	0x1	Input I2S audio word length Max (corresponding to channel status BITs 32). 0 = maximal word length is 20 BITs; 1 = maximal word length is 24 BITs.
+*/
+/*
+    BYTE Channel_status1
+Bit(s)	Name	Type	Default 	Description
+7:6	MODE	R/W	0x0	00 = PCM Audio
+5:3	PCM_MODE	R/W	0x0	000 = 2 audio channels without pre-emphasis;
+                        001 = 2 audio channels with 50/15 usec pre-emphasis
+2	SW_CPRGT	R/W	0x0	0 = software for which copyright is asserted;
+                        1 = software for which no copyright is asserted
+1	NON_PCM	R/W	0x0	0 = audio sample word represents linear PCM samples;
+                    1 = audio sample word used for other purposes.
+0	PROF_APP	R/W	0x0	0 = consumer applications; 1 = professional applications.
+
+    BYTE Channel_status2
+Bit(s)	Name	Type	Default 	Description
+7:0	CAT_CODE	R/W	0x0	Category code (corresponding to channel status BITs [15:8])
+
+    BYTE Channel_status3
+Bit(s)	Name	Type	Default 	Description
+7:4	CH_NUM	R/W	0x0	Channel number (corresponding to channel status BITs [23:20])
+3:0	SOURCE_NUM	R/W	0x0	Source number (corresponding to channel status BITs [19:16])
+
+    BYTE Channel_status4
+Bit(s)	Name	Type	Default 	Description
+7:6	CHNL_BIT1	R/W	0x0	corresponding to channels status BITs [31:30]
+5:4	CLK_ACCUR	R/W	0x0	Clock accuracy (corresponding to channels status BITs [29:28]). These two BITs define the sampling frequency tolerance. The BITs are set in the transmitter. 
+3:0	FS_FREQ	R/W	0x0	Sampling clock frequency (corresponding to channel status BITs [27:24]). 0000 = 44.1 KHz; 0010 = 48 KHz; 0011 = 32 KHz; 1000 = 88.2 KHz; 1010 = 96 KHz; 176.4 KHz; 1110 = 192 KHz; others = reserved.
+
+    BYTE Channel_status5
+Bit(s)	Name	Type	Default 	Description
+7:4	CHNL_BIT2	R/W	0x0	corresponding to channels status BITs [39:36]
+3:1	WORD_LENGTH	R/W	0x5	Audio word length (corresponding to channel status BITs [35:33]).  When WORD_MAX = 0, 001 = 16 BITs; 010 = 18 BITs; 100 = 19 BITs; 101 = 20 BITs; 110 = 17 BITs; when WORD_MAX = 1, 001 = 20 BITs; 010 = 22 BITs; 100 = 23 BITs; 101 = 24 BITs; 110 = 21 BITs.
+0	WORD_MAX	R/W	0x1	Audio word length Max (corresponding to channel status BITs 32). 0 = maximal word length is 20 BITs; 1 = maximal word length is 24 BITs.
+
+*/
+typedef struct
+{
+    BYTE audio_channel;
+    BYTE i2s_format;
+    BYTE i2s_swap;
+    BYTE Channel_status1;
+    BYTE Channel_status2;
+    BYTE Channel_status3;
+    BYTE Channel_status4;
+    BYTE Channel_status5;
+} i2s_config_struct;
+/*
+    BYTE FS_FREQ;
+
+    7:4	FS_FREQ	R	0x0	
+        Sampling clock frequency (corresponding to channel status BITs [27:24]). 
+        0000 = 44.1 KHz; 0010 = 48 KHz; 0011 = 32 KHz; 1000 = 88.2 KHz; 1010 = 96 KHz;
+        176.4 KHz; 1110 = 192 KHz; others = reserved.
+*/
+
+typedef struct
+{
+    BYTE one_BIT_ctrl;
+
+} super_audio_config_struct;
+
+typedef struct
+{
+    BYTE audio_type;            // audio type 
+                                // #define ANX7150_i2s_input 0x01
+                                // #define ANX7150_spdif_input 0x02
+                                // #define ANX7150_super_audio_input 0x04
+
+    BYTE down_sample;     // 0x72:0x50
+                                // 0x00:    00  no down sample
+                                // 0x20:    01  2 to 1 down sample
+                                // 0x60:    11  4 to 1 down sample
+                                // 0x40:    10  reserved
+     BYTE audio_layout;//audio layout; 
+     								//0x00, 2-channel
+     								//0x80, 8-channel
+
+    i2s_config_struct i2s_config;
+    super_audio_config_struct super_audio_config;
+    
+} audio_config_struct;
+
+/*added by gerard.zhu*/
+/*DDC type*/
+typedef enum {
+    DDC_Hdcp,
+    DDC_Edid,
+}ANX7150_DDC_Type;
+
+/*Read DDC status type*/
+typedef enum {
+    report,
+    Judge,
+}ANX7150_DDC_Status_Check_Type;
+
+/*Define DDC address struction*/
+typedef struct {
+    BYTE dev_addr;
+    BYTE sgmt_addr;
+    BYTE offset_addr;
+}ANX7150_DDC_Addr;
+
+/*DDC status bit*/
+#define DDC_Error_bit   0x07
+#define DDC_Occup_bit  0x06
+#define DDC_Fifo_Full_bit  0x05
+#define DDC_Fifo_Empt_bit  0x04
+#define DDC_No_Ack_bit 0x03
+#define DDC_Fifo_Rd_bit    0x02
+#define DDC_Fifo_Wr_bit    0x01
+#define DDC_Progress_bit   0x00
+
+#define YCbCr422 0x20
+#define null 0
+#define source_ratio 0x08
+
+/*DDC Command*/
+#define Abort_Current_Operation 0x00
+#define Sequential_Byte_Read 0x01
+#define Sequential_Byte_Write 0x02
+#define Implicit_Offset_Address_Read 0x3
+#define Enhanced_DDC_Sequenital_Read 0x04
+#define Clear_DDC_Fifo 0x05
+#define I2c_reset 0x06
+
+/*DDC result*/
+#define DDC_NO_Err 0x00
+#define DDC_Status_Err 0x01
+#define DDC_Data_Addr_Err 0x02
+#define DDC_Length_Err  0x03
+
+/*checksum result*/
+#define Edid_Checksum_No_Err     0x00
+#define Edid_Checksum_Err   0x01
+
+/*HDCP device base address*/
+#define HDCP_Dev_Addr   0x74
+
+/*HDCP Bksv offset*/
+#define HDCP_Bksv_Offset 0x00
+
+/*HDCP Bcaps offset*/
+#define HDCP_Bcaps_Offset   0x40
+
+/*HDCP Bstatus offset*/
+#define HDCP_Bstatus_offset     0x41 
+
+/*HDCP KSV Fifo offset */
+#define HDCP_Ksv_Fifo_Offset    0x43
+
+/*HDCP bksv data nums*/
+#define Bksv_Data_Nums  5
+
+/*HDCP ksvs data number by defult*/
+#define ksvs_data_nums 50
+
+/*DDC Max bytes*/
+#define DDC_Max_Length 1024
+
+/*DDC fifo depth*/
+#define DDC_Fifo_Depth  16
+
+/*DDC read delay ms*/
+#define DDC_Read_Delay 3
+
+/*DDC Write delay ms*/
+#define DDC_Write_Delay 3
+/*end*/
+
+extern int ANX7150_parse_edid_done;//extern BIT ANX7150_parse_edid_done;
+extern int ANX7150_system_config_done;//extern BIT ANX7150_system_config_done;
+extern BYTE ANX7150_video_format_config,ANX7150_video_timing_id;
+extern int ANX7150_new_csc,ANX7150_new_vid_id,ANX7150_new_HW_interface;//extern BIT ANX7150_new_csc,ANX7150_new_vid_id,ANX7150_new_HW_interface;
+extern int ANX7150_ddr_edge;//extern BIT ANX7150_ddr_edge;
+extern BYTE ANX7150_in_pix_rpt_bkp,ANX7150_tx_pix_rpt_bkp;
+extern BYTE ANX7150_in_pix_rpt,ANX7150_tx_pix_rpt;
+extern int ANX7150_pix_rpt_set_by_sys;//extern BIT ANX7150_pix_rpt_set_by_sys;
+extern BYTE ANX7150_RGBorYCbCr;
+extern audio_config_struct s_ANX7150_audio_config;
+extern config_packets s_ANX7150_packet_config;
+extern int ANX7150_app_hold_system_config;//extern BIT ANX7150_app_hold_system_config;
+extern int ANX7150_shutdown;//extern BIT ANX7150_shutdown;
+//********************** BIST Enable***********************************
+#define BIST_MODE_USED 1
+#define ANX8770_USED 0//#define ANX8770_USED 1//
+#define rpt_auto_setting 0
+#define rpt_manual_setting 1
+#define ddr_falling_edge 1
+#define ddr_rising_edge 0
+
+#define input_pixel_clk_1x_repeatition 0x00
+#define input_pixel_clk_2x_repeatition 0x01
+#define input_pixel_clk_4x_repeatition 0x03
+
+//***********************Video Config***********************************
+#define ANX7150_RGB_YCrCb444_SepSync 0
+#define ANX7150_YCrCb422_SepSync 1
+#define ANX7150_YCrCb422_EmbSync 2
+#define ANX7150_YCMux422_SepSync_Mode1 3
+#define ANX7150_YCMux422_SepSync_Mode2 4
+#define ANX7150_YCMux422_EmbSync_Mode1 5
+#define ANX7150_YCMux422_EmbSync_Mode2 6
+#define ANX7150_RGB_YCrCb444_DDR_SepSync 7
+#define ANX7150_RGB_YCrCb444_DDR_EmbSync 8
+
+#define ANX7150_RGB_YCrCb444_SepSync_No_DE 9
+#define ANX7150_YCrCb422_SepSync_No_DE 10
+
+#define ANX7150_Progressive 0
+#define ANX7150_Interlace 0x08
+#define ANX7150_Neg_Hsync_pol 0x20
+#define ANX7150_Pos_Hsync_pol 0
+#define ANX7150_Neg_Vsync_pol 0x40
+#define ANX7150_Pos_Vsync_pol 0
+
+#define ANX7150_V640x480p_60Hz 1
+#define ANX7150_V720x480p_60Hz_4x3 2
+#define ANX7150_V720x480p_60Hz_16x9 3
+#define ANX7150_V1280x720p_60Hz 4
+#define ANX7150_V1280x720p_50Hz 19
+#define ANX7150_V1920x1080i_60Hz 5
+#define ANX7150_V1920x1080p_60Hz 16
+#define ANX7150_V1920x1080p_50Hz 31
+#define ANX7150_V1920x1080i_50Hz 20
+#define ANX7150_V720x480i_60Hz_4x3 6
+#define ANX7150_V720x480i_60Hz_16x9 7
+#define ANX7150_V720x576i_50Hz_4x3 21
+#define ANX7150_V720x576i_50Hz_16x9 22
+#define ANX7150_V720x576p_50Hz_4x3 17
+#define ANX7150_V720x576p_50Hz_16x9 18
+
+#define ANX7150_RGB 0x00
+#define ANX7150_YCbCr422 0x01
+#define ANX7150_YCbCr444 0x02 
+#define ANX7150_CSC_BT709 1
+#define ANX7150_CSC_BT601 0
+
+#define ANX7150_EMBEDED_BLUE_SCREEN_ENABLE 1
+#define ANX7150_HDCP_FAIL_THRESHOLD 10
+
+#define ANX7150_avi_sel 0x01
+#define ANX7150_audio_sel 0x02
+#define ANX7150_spd_sel 0x04
+#define ANX7150_mpeg_sel 0x08
+#define ANX7150_acp_sel 0x10
+#define ANX7150_isrc1_sel 0x20
+#define ANX7150_isrc2_sel 0x40
+#define ANX7150_vendor_sel 0x80
+
+#define sim
+// audio type
+#define ANX7150_i2s_input 0x01
+#define ANX7150_spdif_input 0x02
+#define ANX7150_super_audio_input 0x04
+// freq_mclk
+#define ANX7150_mclk_128_Fs 0x00
+#define ANX7150_mclk_256_Fs 0x01
+#define ANX7150_mclk_384_Fs 0x02
+#define ANX7150_mclk_512_Fs 0x03
+// thresholds
+#define ANX7150_spdif_stable_th 0x03
+// fs -> N(ACR)
+#define ANX7150_N_32k 0x1000
+#define ANX7150_N_44k 0x1880
+#define ANX7150_N_88k 0x3100
+#define ANX7150_N_176k 0x6200
+#define ANX7150_N_48k 0x1800
+#define ANX7150_N_96k 0x3000
+#define ANX7150_N_192k 0x6000
+
+#define ANX7150_INITIAL 0x01
+#define ANX7150_WAIT_HOTPLUG 0x02
+#define ANX7150_READ_PARSE_EDID 0x03
+#define ANX7150_CONFIG_VIDEO 0x04
+#define ANX7150_CONFIG_AUDIO 0x05
+#define ANX7150_CONFIG_PACKETS 0x06
+#define ANX7150_HDCP_AUTHENTICATION 0x07
+#define ANX7150_PLAY_BACK 0x08
+#define ANX7150_RESET_LINK 0x09
+#define ANX7150_WAIT_RX_SENSE 0x0a
+#define ANX7150_UNKNOWN 0x0b
+
+#define spdif_error_th 0x0a
+
+#define Hresolution_1920 1920
+#define Vresolution_540 540
+#define Vresolution_1080 1080
+#define Hresolution_1280 1280
+#define Vresolution_720 720
+#define Hresolution_640 640
+#define Vresolution_480 480
+#define Hresolution_720 720
+#define Vresolution_240 240
+#define Vresolution_576 576
+#define Vresolution_288 288
+#define Hz_50 50
+#define Hz_60 60
+#define Interlace_EDID 0
+#define Progressive_EDID 1
+#define ratio_16_9 1.777778
+#define ratio_4_3 1.333333
+
+#define ANX7150_EDID_BadHeader 0x01;
+#define ANX7150_EDID_861B_not_supported 0x02;
+#define ANX7150_EDID_CheckSum_ERR 0x03;
+#define ANX7150_EDID_No_ExtBlock 0x04;
+#define ANX7150_EDID_ExtBlock_NotFor_861B 0x05;
+
+#define ANX7150_VND_IDL_REG 0x00
+#define ANX7150_VND_IDH_REG 0x01
+#define ANX7150_DEV_IDL_REG 0x02
+#define ANX7150_DEV_IDH_REG 0x03
+#define ANX7150_DEV_REV_REG 0x04
+
+#define ANX7150_SRST_REG 0x05
+#define ANX7150_TX_RST 0x40
+#define ANX7150_SRST_VIDCAP_RST	        0x20	// bit position
+#define ANX7150_SRST_AFIFO_RST	       	 0x10	// bit position
+#define ANX7150_SRST_HDCP_RST		        0x08	// bit position
+#define ANX7150_SRST_VID_FIFO_RST		 0x04	// bit position
+#define ANX7150_SRST_AUD_RST		 0x02	// bit position
+#define ANX7150_SRST_SW_RST			 0x01	// bit position
+
+#define ANX7150_SYS_STATE_REG 0x06
+#define ANX7150_SYS_STATE_AUD_CLK_DET	        0x20	// bit position
+#define ANX7150_SYS_STATE_AVMUTE	       	 0x10	// bit position
+#define ANX7150_SYS_STATE_HP		       	 0x08	// bit position
+#define ANX7150_SYS_STATE_VSYNC		 		 0x04	// bit position
+#define ANX7150_SYS_STATE_CLK_DET		 	 0x02	// bit position
+#define ANX7150_SYS_STATE_RSV_DET			 0x01	// bit position
+
+#define ANX7150_SYS_CTRL1_REG 0x07
+#define ANX7150_SYS_CTRL1_LINKMUTE_EN	        0x80	// bit position
+#define ANX7150_SYS_CTRL1_HDCPHPD_RST		 0x40	// bit position
+#define ANX7150_SYS_CTRL1_PDINT_SEL		 0x20	// bit position
+#define ANX7150_SYS_CTRL1_DDC_FAST	        	 0x10	// bit position
+#define ANX7150_SYS_CTRL1_DDC_SWCTRL	        0x08	// bit position
+#define ANX7150_SYS_CTRL1_HDCPMODE		 0x04	// bit position
+#define ANX7150_SYS_CTRL1_HDMI				 0x02	// bit position
+#define ANX7150_SYS_CTRL1_PWDN_CTRL	        0x01	// bit position
+
+#define ANX7150_SYS_CTRL2_REG 0x08
+#define ANX7150_SYS_CTRL2_DDC_RST	      		  0x08	// bit position
+#define ANX7150_SYS_CTRL2_TMDSBIST_RST	  0x04	// bit position
+#define ANX7150_SYS_CTRL2_MISC_RST		 	  0x02	// bit position
+#define ANX7150_SYS_CTRL2_HW_RST	     		  0x01	// bit position
+
+#define ANX7150_SYS_CTRL3_REG 0x09
+#define ANX7150_SYS_CTRL3_I2C_PWON 0x02
+#define ANX7150_SYS_CTRL3_PWON_ALL 0x01
+
+#define ANX7150_SYS_CTRL4_REG 0x0b
+
+#define ANX7150_VID_STATUS_REG 0x10
+#define ANX7150_VID_STATUS_VID_STABLE		 0x20	// bit position
+#define ANX7150_VID_STATUS_EMSYNC_ERR	        0x10	// bit position
+#define ANX7150_VID_STATUS_FLD_POL	    		 0x08	// bit position
+#define ANX7150_VID_STATUS_TYPE		 	 0x04	// bit position
+#define ANX7150_VID_STATUS_VSYNC_POL		 0x02	// bit position
+#define ANX7150_VID_STATUS_HSYNC_POL	        0x01	// bit position
+
+#define ANX7150_VID_MODE_REG 0x11
+#define ANX7150_VID_MODE_CHKSHARED_EN	 0x80	// bit position
+#define ANX7150_VID_MODE_LINKVID_EN		 0x40	// bit position
+#define ANX7150_VID_MODE_RANGE_Y2R		 0x20	// bit position
+#define ANX7150_VID_MODE_CSPACE_Y2R	        0x10	// bit position
+#define ANX7150_VID_MODE_Y2R_SEL	        	 0x08	// bit position
+#define ANX7150_VID_MODE_UPSAMPLE			 0x04	// bit position
+
+#define ANX7150_VID_CTRL_REG  0x12
+#define ANX7150_VID_CTRL_IN_EN	    		 0x10	// bit position
+#define ANX7150_VID_CTRL_YCBIT_SEL        	 0x08	// bit position
+#define ANX7150_VID_CTRL_BITCTRL_EN	 		0x04	// bit position
+
+#define ANX7150_VID_CAPCTRL0_REG  0x13
+#define ANX7150_VID_CAPCTRL0_DEGEN_EN	 	 0x80	// bit position
+#define ANX7150_VID_CAPCTRL0_EMSYNC_EN	 0x40	// bit position
+#define ANX7150_VID_CAPCTRL0_DEMUX_EN		 0x20	// bit position
+#define ANX7150_VID_CAPCTRL0_INV_IDCK	        0x10	// bit position
+#define ANX7150_VID_CAPCTRL0_DV_BUSMODE	 0x08	// bit position
+#define ANX7150_VID_CAPCTRL0_DDR_EDGE		 0x04	// bit position
+#define ANX7150_VID_CAPCTRL0_VIDBIT_SWAP	 0x02	// bit position
+#define ANX7150_VID_CAPCTRL0_VIDBIST_EN	 0x01	// bit position
+	
+#define ANX7150_VID_CAPCTRL1_REG 0x14
+#define ANX7150_VID_CAPCTRL1_FORMAT_SEL	 	 0x80	// bit position
+#define ANX7150_VID_CAPCTRL1_VSYNC_POL	   	 0x40	// bit position
+#define ANX7150_VID_CAPCTRL1_HSYNC_POL		 0x20	// bit position
+#define ANX7150_VID_CAPCTRL1_INV_FLDPOL	        0x10	// bit position
+#define ANX7150_VID_CAPCTRL1_VID_TYPE	 		0x08	// bit position
+
+#define ANX7150_H_RESL_REG 0x15
+#define ANX7150_H_RESH_REG 0x16
+#define ANX7150_VID_PIXL_REG 0x17
+#define ANX7150_VID_PIXH_REG 0x18
+#define ANX7150_H_FRONTPORCHL_REG 0x19
+#define ANX7150_H_FRONTPORCHH_REG 0x1A
+#define ANX7150_HSYNC_ACT_WIDTHL_REG 0x1B
+#define ANX7150_HSYNC_ACT_WIDTHH_REG 0x1C
+#define ANX7150_H_BACKPORCHL_REG 0x1D
+#define ANX7150_H_BACKPORCHH_REG 0x1E
+#define ANX7150_V_RESL_REG 0x1F
+#define ANX7150_V_RESH_REG 0x20
+#define ANX7150_ACT_LINEL_REG 0x21
+#define ANX7150_ACT_LINEH_REG 0x22
+#define ANX7150_ACT_LINE2VSYNC_REG 0x23
+#define ANX7150_VSYNC_WID_REG 0x24
+#define ANX7150_VSYNC_TAIL2VIDLINE_REG 0x25
+#define ANX7150_VIDF_HRESL_REG 0x26
+#define ANX7150_VIDF_HRESH_REG 0x27
+#define ANX7150_VIDF_PIXL_REG 0x28
+#define ANX7150_VIDF_PIXH_REG 0x29
+#define ANX7150_VIDF_HFORNTPORCHL_REG 0x2A
+#define ANX7150_VIDF_HFORNTPORCHH_REG 0x2B
+#define ANX7150_VIDF_HSYNCWIDL_REG 0x2C
+#define ANX7150_VIDF_HSYNCWIDH_REG 0x2D
+#define ANX7150_VIDF_HBACKPORCHL_REG 0x2E
+#define ANX7150_VIDF_HBACKPORCHH_REG 0x2F
+#define ANX7150_VIDF_VRESL_REG 0x30
+#define ANX7150_VIDF_VRESH_REG 0x31
+#define ANX7150_VIDF_ACTVIDLINEL_REG 0x32
+#define ANX7150_VIDF_ACTVIDLINEH_REG 0x33
+#define ANX7150_VIDF_ACTLINE2VSYNC_REG 0x34
+#define ANX7150_VIDF_VSYNCWIDLINE_REG 0x35
+#define ANX7150_VIDF_VSYNCTAIL2VIDLINE_REG 0x36
+
+//Video input data bit control registers    
+
+#define VID_BIT_CTRL0 0x37      //added
+#define VID_BIT_CTRL1 0x38 
+#define VID_BIT_CTRL2 0x39
+#define VID_BIT_CTRL3 0x3A
+#define VID_BIT_CTRL4 0x3B
+#define VID_BIT_CTRL5 0x3C
+#define VID_BIT_CTRL6 0x3D
+#define VID_BIT_CTRL7 0x3E
+#define VID_BIT_CTRL8 0x3F
+#define VID_BIT_CTRL9 0x48
+#define VID_BIT_CTRL10 0x49
+#define VID_BIT_CTRL11 0x4A
+#define VID_BIT_CTRL12 0x4B
+#define VID_BIT_CTRL13 0x4C
+#define VID_BIT_CTRL14 0x4D
+#define VID_BIT_CTRL15 0x4E
+#define VID_BIT_CTRL16 0x4F
+#define VID_BIT_CTRL17 0x89
+#define VID_BIT_CTRL18 0x8A
+#define VID_BIT_CTRL19 0x8B
+#define VID_BIT_CTRL20 0x8C
+#define VID_BIT_CTRL21 0x8D
+#define VID_BIT_CTRL22 0x8E
+#define VID_BIT_CTRL23 0x8F
+
+
+#define ANX7150_INTR_STATE_REG 0x40
+
+#define ANX7150_INTR_CTRL_REG 0x41
+
+#define ANX7150_INTR_CTRL_SOFT_INTR	 0x04	// bit position
+#define ANX7150_INTR_CTRL_TYPE			 0x02	// bit position
+#define ANX7150_INTR_CTRL_POL	 		 0x01	// bit position
+
+#define ANX7150_INTR1_STATUS_REG 0x42
+#define ANX7150_INTR1_STATUS_CTS_CHG 	 	 0x80	// bit position
+#define ANX7150_INTR1_STATUS_AFIFO_UNDER	 0x40	// bit position
+#define ANX7150_INTR1_STATUS_AFIFO_OVER	 0x20	// bit position
+#define ANX7150_INTR1_STATUS_SPDIF_ERR	        0x10	// bit position
+#define ANX7150_INTR1_STATUS_SW_INT	 	0x08	// bit position
+#define ANX7150_INTR1_STATUS_HP_CHG		 0x04	// bit position
+#define ANX7150_INTR1_STATUS_CTS_OVRWR	 	0x02	// bit position
+#define ANX7150_INTR1_STATUS_CLK_CHG		 0x01	// bit position
+
+#define ANX7150_INTR2_STATUS_REG 0x43
+#define ANX7150_INTR2_STATUS_ENCEN_CHG 	 	0x80	// bit position
+#define ANX7150_INTR2_STATUS_HDCPLINK_CHK	 	0x40	// bit position
+#define ANX7150_INTR2_STATUS_HDCPENHC_CHK 	0x20	// bit position
+#define ANX7150_INTR2_STATUS_BKSV_RDY		        0x10	// bit position
+#define ANX7150_INTR2_STATUS_PLLLOCK_CHG	 	0x08	// bit position
+#define ANX7150_INTR2_STATUS_SHA_DONE			 0x04	// bit position
+#define ANX7150_INTR2_STATUS_AUTH_CHG	 		0x02	// bit position
+#define ANX7150_INTR2_STATUS_AUTH_DONE		 0x01	// bit position
+
+#define ANX7150_INTR3_STATUS_REG 0x44
+#define ANX7150_INTR3_STATUS_SPDIFBI_ERR 	 	0x80	// bit position
+#define ANX7150_INTR3_STATUS_VIDF_CHG	 		0x40	// bit position
+#define ANX7150_INTR3_STATUS_AUDCLK_CHG 		0x20	// bit position
+#define ANX7150_INTR3_STATUS_DDCACC_ERR	        0x10	// bit position
+#define ANX7150_INTR3_STATUS_DDC_NOACK	 	0x08	// bit position
+#define ANX7150_INTR3_STATUS_VSYNC_DET		 0x04	// bit position
+#define ANX7150_INTR3_STATUS_RXSEN_CHG		0x02	// bit position
+#define ANX7150_INTR3_STATUS_SPDIF_UNSTBL		 0x01	// bit position
+
+#define ANX7150_INTR1_MASK_REG 0x45
+#define ANX7150_INTR2_MASK_REG 0x46
+#define ANX7150_INTR3_MASK_REG 0x47
+
+#define ANX7150_HDMI_AUDCTRL0_REG 0x50
+#define ANX7150_HDMI_AUDCTRL0_LAYOUT 	 	0x80	// bit position
+#define ANX7150_HDMI_AUDCTRL0_DOWN_SMPL 	0x60	// bit position
+#define ANX7150_HDMI_AUDCTRL0_CTSGEN_SC 	 	0x10	// bit position
+#define ANX7150_HDMI_AUDCTRL0_INV_AUDCLK 	 	0x08	// bit position
+
+#define ANX7150_HDMI_AUDCTRL1_REG 0x51
+#define ANX7150_HDMI_AUDCTRL1_IN_EN 	 		0x80	// bit position
+#define ANX7150_HDMI_AUDCTRL1_SPDIFIN_EN	 	0x40	// bit position
+#define ANX7150_HDMI_AUDCTRL1_SD3IN_EN		0x20	// bit position
+#define ANX7150_HDMI_AUDCTRL1_SD2IN_EN	        0x10	// bit position
+#define ANX7150_HDMI_AUDCTRL1_SD1IN_EN	 	0x08	// bit position
+#define ANX7150_HDMI_AUDCTRL1_SD0IN_EN		 0x04	// bit position
+#define ANX7150_HDMI_AUDCTRL1_SPDIFFS_OVRWR	0x02	// bit position
+#define ANX7150_HDMI_AUDCTRL1_CLK_SEL		 0x01	// bit position
+
+#define ANX7150_I2S_CTRL_REG 0x52
+#define ANX7150_I2S_CTRL_VUCP 	 		0x80	// bit position
+#define SPDIF_IN_SEL 0x10 //0-spdif, 1-multi with sd0
+#define ANX7150_I2S_CTRL_SHIFT_CTRL	 	0x08	// bit position
+#define ANX7150_I2S_CTRL_DIR_CTRL		 0x04	// bit position
+#define ANX7150_I2S_CTRL_WS_POL		0x02	// bit position
+#define ANX7150_I2S_CTRL_JUST_CTRL		 0x01	// bit position
+
+#define ANX7150_I2SCH_CTRL_REG 0x53
+#define ANX7150_I2SCH_FIFO3_SEL	 	0xC0	// bit position
+#define ANX7150_I2SCH_FIFO2_SEL	 0x30	// bit position
+#define ANX7150_I2SCH_FIFO1_SEL	 0x0C	// bit position
+#define ANX7150_I2SCH_FIFO0_SEL	 0x03	// bit position
+
+#define ANX7150_I2SCH_SWCTRL_REG 0x54
+
+#define ANX7150_I2SCH_SWCTRL_SW3 	 		0x80	// bit position
+#define ANX7150_I2SCH_SWCTRL_SW2	 	0x40	// bit position
+#define ANX7150_I2SCH_SWCTRL_SW1		0x20	// bit position
+#define ANX7150_I2SCH_SWCTRL_SW0	        0x10	// bit position
+#define ANX7150_I2SCH_SWCTRL_INWD_LEN		0xE0	// bit position
+#define ANX7150_I2SCH_SWCTRL_INWD_MAX		 0x01	// bit position
+
+#define ANX7150_SPDIFCH_STATUS_REG 0x55
+#define ANX7150_SPDIFCH_STATUS_FS_FREG	0xF0	// bit position
+#define ANX7150_SPDIFCH_STATUS_WD_LEN 0x0E	// bit position
+#define ANX7150_SPDIFCH_STATUS_WD_MX 0x01	// bit position
+
+#define ANX7150_I2SCH_STATUS1_REG 0x56
+#define ANX7150_I2SCH_STATUS1_MODE	 0xC0	// bit position
+#define ANX7150_I2SCH_STATUS1_PCM_MODE	 0x38	// bit position
+#define ANX7150_I2SCH_STATUS1_SW_CPRGT	 0x04	// bit position
+#define ANX7150_I2SCH_STATUS1_NON_PCM	0x02	// bit position
+#define ANX7150_I2SCH_STATUS1_PROF_APP	 0x01	// bit position
+
+#define ANX7150_I2SCH_STATUS2_REG 0x57
+
+#define ANX7150_I2SCH_STATUS3_REG 0x58
+#define ANX7150_I2SCH_STATUS3_CH_NUM	0xF0	// bit position
+#define ANX7150_I2SCH_STATUS3_SRC_NUM	0x0F	// bit position
+
+
+
+#define ANX7150_I2SCH_STATUS4_REG 0x59
+
+#define ANX7150_I2SCH_STATUS5_REG 0x5A
+
+#define ANX7150_I2SCH_STATUS5_WORD_MAX 0x01	// bit position
+
+#define ANX7150_HDMI_AUDSTATUS_REG 0x5B
+
+#define ANX7150_HDMI_AUDSTATUS_SPDIF_DET 0x01	// bit position
+
+#define ANX7150_HDMI_AUDBIST_CTRL_REG 0x5C
+
+#define ANX7150_HDMI_AUDBIST_EN3	 	0x08	// bit position
+#define ANX7150_HDMI_AUDBIST_EN2		 0x04	// bit position
+#define ANX7150_HDMI_AUDBIST_EN1		0x02	// bit position
+#define ANX7150_HDMI_AUDBIST_EN0		 0x01	// bit position
+
+#define ANX7150_AUD_INCLK_CNT_REG 0x5D
+#define ANX7150_AUD_DEBUG_STATUS_REG 0x5E
+
+#define ANX7150_ONEBIT_AUD_CTRL_REG 0x60
+
+#define ANX7150_ONEBIT_AUD_CTRL_SEN7 	 	0x80	// bit position
+#define ANX7150_ONEBIT_AUD_CTRL_SEN6	 	0x40	// bit position
+#define ANX7150_ONEBIT_AUD_CTRL_SEN5		0x20	// bit position
+#define ANX7150_ONEBIT_AUD_CTRL_SEN4	    0x10	// bit position
+#define ANX7150_ONEBIT_AUD_CTRL_SEN3	 	0x08	// bit position
+#define ANX7150_ONEBIT_AUD_CTRL_SEN2		0x04	// bit position
+#define ANX7150_ONEBIT_AUD_CTRL_SEN1		0x02	// bit position
+#define ANX7150_ONEBIT_AUD_CTRL_SEN0		0x01	// bit position
+
+#define ANX7150_ONEBIT_AUD0_CTRL_REG 0x61
+#define ANX7150_ONEBIT_AUD1_CTRL_REG 0x62
+#define ANX7150_ONEBIT_AUD2_CTRL_REG 0x63
+#define ANX7150_ONEBIT_AUD3_CTRL_REG 0x64
+
+#define ANX7150_ONEBIT_AUDCLK_CTRL_REG 0x65
+
+#define ANX7150_ONEBIT_AUDCLK_DET 	0x08	// bit position
+
+#define ANX7150_SPDIF_ERR_THRSHLD_REG 0x66
+#define ANX7150_SPDIF_ERR_CNT_REG 0x67
+
+#define ANX7150_HDMI_LINK_CTRL_REG 0x70
+
+#define ANX7150_HDMI_LINK_DATA_MUTEEN1 	 	0x80	// bit position
+#define ANX7150_HDMI_LINK_DATA_MUTEEN0	 	0x40	// bit position
+#define ANX7150_HDMI_LINK_CLK_MUTEEN2		0x20	// bit position
+#define ANX7150_HDMI_LINK_CLK_MUTEEN1	    0x10	// bit position
+#define ANX7150_HDMI_LINK_CLK_MUTEEN0	 	0x08	// bit position
+#define ANX7150_HDMI_LINK_DEC_DE			0x04	// bit position
+#define ANX7150_HDMI_LINK_PRMB_INC			0x02	// bit position
+#define ANX7150_HDMI_LINK_AUTO_PROG			0x01	// bit position
+
+#define ANX7150_VID_CAPCTRL2_REG  0x71
+
+#define ANX7150_VID_CAPCTRL2_CHK_UPDATEEN    0x10	// bit position
+
+#define ANX7150_LINK_MUTEEE_REG 0x72
+
+#define ANX7150_LINK_MUTEEE_AVMUTE_EN2		0x20	// bit position
+#define ANX7150_LINK_MUTEEE_AVMUTE_EN1	    0x10	// bit position
+#define ANX7150_LINK_MUTEEE_AVMUTE_EN0	 	0x08	// bit position
+#define ANX7150_LINK_MUTEEE_AUDMUTE_EN2		0x04	// bit position
+#define ANX7150_LINK_MUTEEE_AUDMUTE_EN1		0x02	// bit position
+#define ANX7150_LINK_MUTEEE_AUDMUTE_EN0		0x01	// bit position
+
+#define ANX7150_SERDES_TEST0_REG 0x73
+#define ANX7150_SERDES_TEST1_REG 0x74
+#define ANX7150_SERDES_TEST2_REG 0x75
+
+#define ANX7150_PLL_TX_AMP 0x76
+
+
+#define ANX7150_DDC_SLV_ADDR_REG 0x80
+#define ANX7150_DDC_SLV_SEGADDR_REG 0x81
+#define ANX7150_DDC_SLV_OFFADDR_REG 0x82
+#define ANX7150_DDC_ACC_CMD_REG 0x83
+#define ANX7150_DDC_ACCNUM0_REG 0x84
+#define ANX7150_DDC_ACCNUM1_REG 0x85
+
+#define ANX7150_DDC_CHSTATUS_REG 0x86
+
+#define ANX7150_DDC_CHSTATUS_DDCERR	 	0x80	// bit position
+#define ANX7150_DDC_CHSTATUS_DDC_OCCUPY	 	0x40	// bit position
+#define ANX7150_DDC_CHSTATUS_FIFO_FULL		0x20	// bit position
+#define ANX7150_DDC_CHSTATUS_FIFO_EMPT	    0x10	// bit position
+#define ANX7150_DDC_CHSTATUS_NOACK	 	0x08	// bit position
+#define ANX7150_DDC_CHSTATUS_FIFO_RD			0x04	// bit position
+#define ANX7150_DDC_CHSTATUS_FIFO_WR			0x02	// bit position
+#define ANX7150_DDC_CHSTATUS_INPRO			0x01	// bit position
+
+#define ANX7150_DDC_FIFO_ACC_REG 0x87
+#define ANX7150_DDC_FIFOCNT_REG 0x88
+
+#define ANX7150_SYS_PD_REG 0x90
+#define ANX7150_SYS_PD_PLL 	 	0x80	// bit position
+#define ANX7150_SYS_PD_TMDS	 	0x40	// bit position
+#define ANX7150_SYS_PD_TMDS_CLK		0x20	// bit position
+#define ANX7150_SYS_PD_MISC	    0x10	// bit position
+#define ANX7150_SYS_PD_LINK	 	0x08	// bit position
+#define ANX7150_SYS_PD_IDCK			0x04	// bit position
+#define ANX7150_SYS_PD_AUD			0x02	// bit position
+#define ANX7150_SYS_PD_MACRO_ALL	0x01	// bit position
+
+#define ANX7150_LINKFSM_DEBUG0_REG 0x91
+#define ANX7150_LINKFSM_DEBUG1_REG 0x92
+
+#define ANX7150_PLL_CTRL0_REG 0x93
+#define ANX7150_PLL_CTRL0_CPREG_BLEED			0x02	// bit position
+#define ANX7150_PLL_CTRL0_TEST_EN	0x01	// bit position
+
+#define ANX7150_PLL_CTRL1_REG 0x94
+#define ANX7150_PLL_CTRL1_TESTEN 	 	0x80	// bit position
+
+#define ANX7150_OSC_CTRL_REG 0x95
+#define ANX7150_OSC_CTRL_TESTEN	 	0x80	// bit position
+#define ANX7150_OSC_CTRL_SEL_BG	 	0x40	// bit position
+
+#define ANX7150_TMDS_CH0_CONFIG_REG 0x96
+#define ANX7150_TMDS_CH0_TESTEN		0x20	// bit position
+#define ANX7150_TMDS_CH0_AMP		0x1C	// bit position
+#define ANX7150_TMDS_CHO_EMP		0x03	// bit position 
+
+#define ANX7150_TMDS_CH1_CONFIG_REG 0x97
+#define ANX7150_TMDS_CH1_TESTEN		0x20	// bit position
+#define ANX7150_TMDS_CH1_AMP		0x1C	// bit position
+#define ANX7150_TMDS_CH1_EMP		0x03	// bit position 
+
+#define ANX7150_TMDS_CH2_CONFIG_REG 0x98
+#define ANX7150_TMDS_CH2_TESTEN		0x20	// bit position
+#define ANX7150_TMDS_CH2_AMP		0x1C	// bit position
+#define ANX7150_TMDS_CH2_EMP		0x03	// bit position 
+
+#define ANX7150_TMDS_CLKCH_CONFIG_REG 0x99
+#define ANX7150_TMDS_CLKCH_MUTE	 	0x80	// bit position
+#define ANX7150_TMDS_CLKCH_TESTEN	0x08	// bit position
+#define ANX7150_TMDS_CLKCH_AMP		0x07	// bit position 
+
+#define ANX7150_CHIP_CTRL_REG 0x9A
+#define ANX7150_CHIP_CTRL_PRBS_GENEN 	 	0x80	// bit position
+#define ANX7150_CHIP_CTRL_LINK_DBGSEL	 	0x70	// bit position
+#define ANX7150_CHIP_CTRL_VIDCHK_EN		 	0x08	// bit position
+#define ANX7150_CHIP_CTRL_MISC_TIMER		0x04	// bit position
+#define ANX7150_CHIP_CTRL_PLL_RNG		0x02	// bit position
+#define ANX7150_CHIP_CTRL_PLL_MAN		0x01	// bit position
+
+#define ANX7150_CHIP_STATUS_REG 0x9B
+#define ANX7150_CHIP_STATUS_GPIO	 	0x80	// bit position
+#define ANX7150_CHIP_STATUS_SDA	 		0x40	// bit position
+#define ANX7150_CHIP_STATUS_SCL			0x20	// bit position
+#define ANX7150_CHIP_STATUS_PLL_HSPO	0x04	// bit position
+#define ANX7150_CHIP_STATUS_PLL_LOCK	0x02	// bit position
+#define ANX7150_CHIP_STATUS_MISC_LOCK	0x01	// bit position
+
+#define ANX7150_DBG_PINGPIO_CTRL_REG  0x9C
+#define ANX7150_DBG_PINGPIO_VDLOW_SHAREDEN		0x04	// bit position
+#define ANX7150_DBG_PINGPIO_GPIO_ADDREN			0x02	// bit position
+#define ANX7150_DBG_PINGPIO_GPIO_OUT			0x01	// bit position
+
+#define ANX7150_CHIP_DEBUG0_CTRL_REG  0x9D
+#define ANX7150_CHIP_DEBUG0_PRBS_ERR 0xE0		// bit position
+#define ANX7150_CHIP_DEBUG0_CAPST  	 0x1F		// bit position
+
+#define ANX7150_CHIP_DEBUG1_CTRL_REG  0x9E
+#define ANX7150_CHIP_DEBUG1_SDA_SW 	 	0x80	// bit position
+#define ANX7150_CHIP_DEBUG1_SCL_SW	 	0x40	// bit position
+#define ANX7150_CHIP_DEBUG1_SERDES_TESTEN		0x20	// bit position
+#define ANX7150_CHIP_DEBUG1_CLK_BYPASS	    0x10	// bit position
+#define ANX7150_CHIP_DEBUG1_FORCE_PLLLOCK	 	0x08	// bit position
+#define ANX7150_CHIP_DEBUG1_PLLLOCK_BYPASS			0x04	// bit position
+#define ANX7150_CHIP_DEBUG1_FORCE_HP			0x02	// bit position
+#define ANX7150_CHIP_DEBUG1_HP_DEGLITCH			0x01	// bit position
+
+#define ANX7150_CHIP_DEBUG2_CTRL_REG  0x9F
+#define ANX7150_CHIP_DEBUG2_EXEMB_SYNCEN		0x04	// bit position
+#define ANX7150_CHIP_DEBUG2_VIDBIST			0x02	// bit position
+
+#define ANX7150_VID_INCLK_REG  0x5F
+
+#define ANX7150_HDCP_STATUS_REG  0xA0
+#define ANX7150_HDCP_STATUS_ADV_CIPHER 	 	0x80	// bit position
+#define ANX7150_HDCP_STATUS_R0_READY	    0x10	// bit position
+#define ANX7150_HDCP_STATUS_AKSV_ACT	 	0x08	// bit position
+#define ANX7150_HDCP_STATUS_ENCRYPT			0x04	// bit position
+#define ANX7150_HDCP_STATUS_AUTH_PASS			0x02	// bit position
+#define ANX7150_HDCP_STATUS_KEY_DONE			0x01	// bit position
+
+#define ANX7150_HDCP_CTRL0_REG  0xA1
+#define ANX7150_HDCP_CTRL0_STORE_AN 	 	0x80	// bit position
+#define ANX7150_HDCP_CTRL0_RX_REP	 	0x40	// bit position
+#define ANX7150_HDCP_CTRL0_RE_AUTH		0x20	// bit position
+#define ANX7150_HDCP_CTRL0_SW_AUTHOK	    0x10	// bit position
+#define ANX7150_HDCP_CTRL0_HW_AUTHEN	 	0x08	// bit position
+#define ANX7150_HDCP_CTRL0_ENC_EN			0x04	// bit position
+#define ANX7150_HDCP_CTRL0_BKSV_SRM			0x02	// bit position
+#define ANX7150_HDCP_CTRL0_KSV_VLD			0x01	// bit position
+
+#define ANX7150_HDCP_CTRL1_REG  0xA2
+#define ANX7150_LINK_CHK_12_EN  0x40
+#define ANX7150_HDCP_CTRL1_DDC_NOSTOP		0x20	// bit position
+#define ANX7150_HDCP_CTRL1_DDC_NOACK	    0x10	// bit position
+#define ANX7150_HDCP_CTRL1_EDDC_NOACK	 	0x08	// bit position
+#define ANX7150_HDCP_CTRL1_BLUE_SCREEN_EN			0x04	// bit position
+#define ANX7150_HDCP_CTRL1_RCV11_EN			0x02	// bit position
+#define ANX7150_HDCP_CTRL1_HDCP11_EN			0x01	// bit position
+
+#define ANX7150_HDCP_Link_Check_FRAME_NUM_REG  0xA3
+#define ANX7150_HDCP_AKSV1_REG  0xA5
+#define ANX7150_HDCP_AKSV2_REG  0xA6
+#define ANX7150_HDCP_AKSV3_REG  0xA7
+#define ANX7150_HDCP_AKSV4_REG  0xA8
+#define ANX7150_HDCP_AKSV5_REG  0xA9
+
+#define ANX7150_HDCP_AN1_REG  0xAA
+#define ANX7150_HDCP_AN2_REG  0xAB
+#define ANX7150_HDCP_AN3_REG  0xAC
+#define ANX7150_HDCP_AN4_REG  0xAD
+#define ANX7150_HDCP_AN5_REG  0xAE
+#define ANX7150_HDCP_AN6_REG  0xAF
+#define ANX7150_HDCP_AN7_REG  0xB0
+#define ANX7150_HDCP_AN8_REG  0xB1
+
+#define ANX7150_HDCP_BKSV1_REG  0xB2
+#define ANX7150_HDCP_BKSV2_REG  0xB3
+#define ANX7150_HDCP_BKSV3_REG  0xB4
+#define ANX7150_HDCP_BKSV4_REG  0xB5
+#define ANX7150_HDCP_BKSV5_REG  0xB6
+
+#define ANX7150_HDCP_RI1_REG  0xB7
+#define ANX7150_HDCP_RI2_REG  0xB8
+
+#define ANX7150_HDCP_PJ_REG  0xB9
+#define ANX7150_HDCP_RX_CAPS_REG  0xBA
+#define ANX7150_HDCP_BSTATUS0_REG  0xBB
+#define ANX7150_HDCP_BSTATUS1_REG  0xBC
+
+#define ANX7150_HDCP_AMO0_REG  0xD0
+#define ANX7150_HDCP_AMO1_REG  0xD1
+#define ANX7150_HDCP_AMO2_REG  0xD2
+#define ANX7150_HDCP_AMO3_REG  0xD3
+#define ANX7150_HDCP_AMO4_REG  0xD4
+#define ANX7150_HDCP_AMO5_REG  0xD5
+#define ANX7150_HDCP_AMO6_REG  0xD6
+#define ANX7150_HDCP_AMO7_REG  0xD7
+
+#define ANX7150_HDCP_DBG_CTRL_REG  0xBD
+
+#define ANX7150_HDCP_DBG_ENC_INC 	0x08	// bit position
+#define ANX7150_HDCP_DBG_DDC_SPEED	0x06	// bit position
+#define ANX7150_HDCP_DBG_SKIP_RPT	0x01	// bit position
+
+#define ANX7150_HDCP_KEY_STATUS_REG  0xBE
+#define ANX7150_HDCP_KEY_BIST_EN	0x04	// bit position
+#define ANX7150_HDCP_KEY_BIST_ERR	0x02	// bit position
+#define ANX7150_HDCP_KEY_CMD_DONE	0x01	// bit position
+
+#define ANX7150_KEY_CMD_REGISTER 0xBF   //added
+
+#define ANX7150_HDCP_AUTHDBG_STATUS_REG  0xC7 
+#define ANX7150_HDCP_ENCRYPTDBG_STATUS_REG  0xC8
+#define ANX7150_HDCP_FRAME_NUM_REG  0xC9
+
+#define ANX7150_DDC_MSTR_INTER_REG  0xCA
+#define ANX7150_DDC_MSTR_LINK_REG  0xCB
+
+#define ANX7150_HDCP_BLUESCREEN0_REG  0xCC
+#define ANX7150_HDCP_BLUESCREEN1_REG  0xCD
+#define ANX7150_HDCP_BLUESCREEN2_REG  0xCE
+//	DEV_ADDR = 0x7A or 0x7E
+#define ANX7150_INFO_PKTCTRL1_REG  0xC0
+#define ANX7150_INFO_PKTCTRL1_SPD_RPT 	 	0x80	// bit position
+#define ANX7150_INFO_PKTCTRL1_SPD_EN	 	0x40	// bit position
+#define ANX7150_INFO_PKTCTRL1_AVI_RPT		0x20	// bit position
+#define ANX7150_INFO_PKTCTRL1_AVI_EN	    0x10	// bit position
+#define ANX7150_INFO_PKTCTRL1_GCP_RPT	 	0x08	// bit position
+#define ANX7150_INFO_PKTCTRL1_GCP_EN		0x04	// bit position
+#define ANX7150_INFO_PKTCTRL1_ACR_NEW		0x02	// bit position
+#define ANX7150_INFO_PKTCTRL1_ACR_EN		0x01	// bit position
+
+#define ANX7150_INFO_PKTCTRL2_REG  0xC1
+#define ANX7150_INFO_PKTCTRL2_UD1_RPT 	 	0x80	// bit position
+#define ANX7150_INFO_PKTCTRL2_UD1_EN	 	0x40	// bit position
+#define ANX7150_INFO_PKTCTRL2_UD0_RPT		0x20	// bit position
+#define ANX7150_INFO_PKTCTRL2_UD0_EN	    0x10	// bit position
+#define ANX7150_INFO_PKTCTRL2_MPEG_RPT	 	0x08	// bit position
+#define ANX7150_INFO_PKTCTRL2_MPEG_EN		0x04	// bit position
+#define ANX7150_INFO_PKTCTRL2_AIF_RPT		0x02	// bit position
+#define ANX7150_INFO_PKTCTRL2_AIF_EN		0x01	// bit position
+
+#define ANX7150_ACR_N1_SW_REG  0xC2
+#define ANX7150_ACR_N2_SW_REG  0xC3
+#define ANX7150_ACR_N3_SW_REG  0xC4
+
+#define ANX7150_ACR_CTS1_SW_REG  0xC5
+#define ANX7150_ACR_CTS2_SW_REG  0xC6
+#define ANX7150_ACR_CTS3_SW_REG  0xC7
+
+#define ANX7150_ACR_CTS1_HW_REG  0xC8
+#define ANX7150_ACR_CTS2_HW_REG  0xC9
+#define ANX7150_ACR_CTS3_HW_REG  0xCA
+
+#define ANX7150_ACR_CTS_CTRL_REG  0xCB
+
+#define ANX7150_GNRL_CTRL_PKT_REG  0xCC
+#define ANX7150_GNRL_CTRL_CLR_AVMUTE		0x02	// bit position
+#define ANX7150_GNRL_CTRL_SET_AVMUTE		0x01	// bit position
+
+#define ANX7150_AUD_PKT_FLATCTRL_REG  0xCD
+#define ANX7150_AUD_PKT_AUTOFLAT_EN 		0x80	// bit position
+#define ANX7150_AUD_PKT_FLAT 	 			0x07	// bit position
+//InfoFrame and Control Packet Registers 
+// 0x7A or 0X7E
+/*
+#define AVI_HB0  0x00
+#define AVI_HB1  0x01
+#define AVI_HB2  0x02
+#define AVI_PB0   0x03
+#define AVI_PB1   0x04
+#define AVI_PB2   0x05
+#define AVI_PB3   0x06
+#define AVI_PB4   0x07
+#define AVI_PB5   0x08
+#define AVI_PB6   0x09
+#define AVI_PB7   0x0A
+#define AVI_PB8   0x0B
+#define AVI_PB9   0x0C
+#define AVI_PB10   0x0D
+#define AVI_PB11   0x0E
+#define AVI_PB12   0x0F
+#define AVI_PB13   0x10
+#define AVI_PB14   0x11
+#define AVI_PB15   0x12
+
+#define AUD_HBO  0x20
+#define AUD_HB1  0x21
+#define AUD_HB2  0x22
+#define AUD_PB0  0x23
+#define AUD_PB1  0x24
+#define AUD_PB2  0x25
+#define AUD_PB3  0x26
+#define AUD_PB4  0x27
+#define AUD_PB5  0x28
+#define AUD_PB6  0x29
+#define AUD_PB7  0x2A
+#define AUD_PB8  0x2B
+#define AUD_PB9  0x2C
+#define AUD_PB10  0x2D
+
+#define SPD_HBO  0x40
+#define SPD_HB1  0x41
+#define SPD_HB2  0x42
+#define SPD_PB0  0x43
+#define SPD_PB1  0x44
+#define SPD_PB2  0x45
+#define SPD_PB3  0x46
+#define SPD_PB4  0x47
+#define SPD_PB5  0x48
+#define SPD_PB6  0x49
+#define SPD_PB7  0x4A
+#define SPD_PB8  0x4B
+#define SPD_PB9  0x4C
+#define SPD_PB10  0x4D
+#define SPD_PB11  0x4E
+#define SPD_PB12  0x4F
+#define SPD_PB13  0x50
+#define SPD_PB14  0x51
+#define SPD_PB15  0x52
+#define SPD_PB16  0x53
+#define SPD_PB17  0x54
+#define SPD_PB18  0x55
+#define SPD_PB19  0x56
+#define SPD_PB20  0x57
+#define SPD_PB21  0x58
+#define SPD_PB22  0x59
+#define SPD_PB23  0x5A
+#define SPD_PB24  0x5B
+#define SPD_PB25  0x5C
+#define SPD_PB26  0x5D
+#define SPD_PB27  0x5E
+
+#define MPEG_HBO  0x60
+#define MPEG_HB1  0x61
+#define MPEG_HB2  0x62
+#define MPEG_PB0  0x63
+#define MPEG_PB1  0x64
+#define MPEG_PB2  0x65
+#define MPEG_PB3  0x66
+#define MPEG_PB4  0x67
+#define MPEG_PB5  0x68
+#define MPEG_PB6  0x69
+#define MPEG_PB7  0x6A
+#define MPEG_PB8  0x6B
+#define MPEG_PB9  0x6C
+#define MPEG_PB10  0x6D
+#define MPEG_PB11  0x6E
+#define MPEG_PB12  0x6F
+#define MPEG_PB13  0x70
+#define MPEG_PB14  0x71
+#define MPEG_PB15  0x72
+#define MPEG_PB16  0x73
+#define MPEG_PB17  0x74
+#define MPEG_PB18  0x75
+#define MPEG_PB19  0x76
+#define MPEG_PB20  0x77
+#define MPEG_PB21  0x78
+#define MPEG_PB22  0x79
+#define MPEG_PB23  0x7A
+#define MPEG_PB24  0x7B
+#define MPEG_PB25  0x7C
+#define MPEG_PB26  0x7D
+#define MPEG_PB27  0x7E
+
+#define USRDF0_HBO  0x80
+#define USRDF0_HB1  0x81
+#define USRDF0_HB2  0x82
+#define USRDF0_PB0  0x83
+#define USRDF0_PB1  0x84
+#define USRDF0_PB2  0x85
+#define USRDF0_PB3  0x86
+#define USRDF0_PB4  0x87
+#define USRDF0_PB5  0x88
+#define USRDF0_PB6  0x89
+#define USRDF0_PB7  0x8A
+#define USRDF0_PB8  0x8B
+#define USRDF0_PB9  0x8C
+#define USRDF0_PB10  0x8D
+#define USRDF0_PB11  0x8E
+#define USRDF0_PB12  0x8F
+#define USRDF0_PB13  0x90
+#define USRDF0_PB14  0x91
+#define USRDF0_PB15  0x92
+#define USRDF0_PB16  0x93
+#define USRDF0_PB17  0x94
+#define USRDF0_PB18  0x95
+#define USRDF0_PB19  0x96
+#define USRDF0_PB20  0x97
+#define USRDF0_PB21  0x98
+#define USRDF0_PB22  0x99
+#define USRDF0_PB23  0x9A
+#define USRDF0_PB24  0x9B
+#define USRDF0_PB25  0x9C
+#define USRDF0_PB26  0x9D
+#define USRDF0_PB27  0x9E
+
+#define USRDF1_HBO  0xA0
+#define USRDF1_HB1  0xA1
+#define USRDF1_HB2  0xA2
+#define USRDF1_PB0  0xA3
+#define USRDF1_PB1  0xA4
+#define USRDF1_PB2  0xA5
+#define USRDF1_PB3  0xA6
+#define USRDF1_PB4  0xA7
+#define USRDF1_PB5  0xA8
+#define USRDF1_PB6  0xA9
+#define USRDF1_PB7  0xAA
+#define USRDF1_PB8  0xAB
+#define USRDF1_PB9  0xAC
+#define USRDF1_PB10  0xAD
+#define USRDF1_PB11  0xAE
+#define USRDF1_PB12  0xAF
+#define USRDF1_PB13  0xB0
+#define USRDF1_PB14  0xB1
+#define USRDF1_PB15  0xB2
+#define USRDF1_PB16  0xB3
+#define USRDF1_PB17  0xB4
+#define USRDF1_PB18  0xB5
+#define USRDF1_PB19  0xB6
+#define USRDF1_PB20  0xB7
+#define USRDF1_PB21  0xB8
+#define USRDF1_PB22  0xB9
+#define USRDF1_PB23  0xBA
+#define USRDF1_PB24  0xBB
+#define USRDF1_PB25  0xBC
+#define USRDF1_PB26  0xBD
+#define USRDF1_PB27  0xBE
+*/
+#define init_timer_slot()   do { timer_slot = 0; } while (0)
+void ANX7150_Timer_Process (void);
+
+void ANX7150_Config_Video(void);
+void ANX7150_Parse_Video_Format(void);
+void ANX7150_Get_Video_Timing(void);
+void ANX7150_DE_Generator(void);
+void ANX7150_Embed_Sync_Decode(void);
+void ANX7150_Show_Video_Parameter(void);
+void ANX7150_Clean_HDCP(void);
+
+BYTE ANX7150_Config_Packet(void);
+BYTE ANX7150_Load_Infoframe(packet_type member,
+                            infoframe_struct *p);
+
+BYTE ANX7150_Checksum(infoframe_struct *p);
+BYTE ANX7150_Config_Audio(void);
+BYTE ANX7150_Config_I2s(void);
+BYTE ANX7150_Config_Spdif(void);
+BYTE ANX7150_Config_Super_Audio(void);
+void ANX7150_HDCP_Process(void);
+void ANX7150_PLAYBACK_Process(void);
+void ANX7150_Timer_Slot1(void);
+void ANX7150_Timer_Slot2(void);
+void ANX7150_Timer_Slot3(void);
+void ANX7150_Timer_Slot4(void);
+void ANX7150_Hotplug_Change_Interrupt(void);
+void ANX7150_Variable_Initial(void);
+void ANX7150_HW_Interface_Variable_Initial(void);
+//void ANX7150_Config_Bist_Video(WORD bist_select_number);
+void ANX7150_Video_Format_Change_Interrupt(void);
+//void ANX7150_Video_Clock_Change_Interrupt(void);
+//void ANX7150_Audio_CLK_Change_Interrupt(void);
+void ANX7150_Set_AVMute(void);
+void ANX7150_Clear_AVMute(void);
+BYTE ANX7150_BKSV_SRM(void);
+void ANX7150_Auth_Done_Interrupt(void);
+void ANX7150_Auth_Change_Interrupt(void);
+void ANX7150_Blue_Screen_Format_Config(void);
+void ANX7150_Blue_Screen_Enable(void);
+void ANX7150_Blue_Screen_Disable(void);
+void ANX7150_HDCP_Encryption_Enable(void);
+void ANX7150_HDCP_Encryption_Disable(void);
+void ANX7150_AFIFO_Overrun_Interrupt(void);  
+void ANX7150_PllLock_Interrupt(void);
+void ANX7150_Rx_Sense_Interrupt(void);
+void ANX7150_HDCPLINK_CHK_Interrupt(void);
+
+void ANX7150_SPDIF_Error_Interrupt(BYTE int1, BYTE int3);
+void ANX7150_RST_DDCChannel(void);
+void ANX7150_Hardware_HDCP_Auth_Init(void);
+void ANX7150_Hardware_Reset(void);
+void ANX7150_Set_System_State(BYTE ss);
+void ANX7150_Hardware_Initial(void);
+void ANX7150_API_Initial(void);
+void ANX7150_Interrupt_Process(void);
+//void ANX7150_Interrupt_Information(BYTE c, BYTE n);
+
+BYTE ANX7150_Parse_EDID(void);
+void ANX7150_Read_EDID(void); 
+void ANX7150_DDC_Mass_Read(WORD length, BYTE segment);
+BYTE ANX7150_Parse_EDIDHeader(void);
+BYTE ANX7150_Parse_EDIDVersion(void);
+void ANX7150_Parse_DTD(void);
+//void ANX7150_Parse_BasicDis(void);
+void ANX7150_Parse_VendorSTD(void);
+void ANX7150_Parse_SpeakerSTD(void);
+void ANX7150_Parse_VideoSTD(void);
+void ANX7150_Parse_AudioSTD(void);
+void ANX7150_Parse_STD(void);
+void ANX7150_Parse_NativeFormat(void);
+void ANX7150_Parse_DTDinBlockONE(void);
+void ANX7150_Parse_DTDinExtBlock(void);
+BYTE ANX7150_Parse_ExtBlock(void);
+void ANX7150_GetEDIDLength(void);
+BYTE ANX7150_EDID_Checksum(BYTE block_number) ;
+void ANX7150_InitDDC_Read(BYTE devaddr, BYTE segmentpointer,BYTE offset, BYTE  access_num_Low,BYTE access_num_high);
+BYTE ANX7150_Read_EDID_BYTE(BYTE segmentpointer,BYTE offset);
+int ANX7150_Chip_Located(void);//BIT ANX7150_Chip_Located(void);
+
+/*added by gerard.zhu*/
+BYTE ANX7150_DDC_Parameter_Validity(BYTE * Addr, WORD length);
+void ANX7150_DDC_Set_Address(ANX7150_DDC_Addr ddc_address, ANX7150_DDC_Type ddc_type);
+void ANX7150_DDC_Set_Number(WORD length);
+void ANX7150_DDC_Command(BYTE DDC_command);
+BYTE ANX7150_DDC_Check_Status(ANX7150_DDC_Status_Check_Type DDC_status_need_type, BYTE status_bit);
+BYTE ANX7150_DDC_Count_Compare(BYTE length);
+BYTE ANX7150_DDC_Read(ANX7150_DDC_Addr ddc_address, const BYTE *DDC_data, WORD length, ANX7150_DDC_Type DDC_type);
+//BYTE ANX7150_DDC_Write(ANX7150_DDC_Addr ddc_address, const BYTE *DDC_data, WORD length, ANX7150_DDC_Type DDC_type);//wen
+/*end*/
+
+//void Write_data_to_EE();
+
+#if BIST_MODE_USED
+void ANX7150_BIST(void);
+//void ANX7150_Config_Bist_Video_RefreshF(BYTE switch_value);
+void ANX7150_Reset_AVI(void) ;
+void ANX7150_Reset_BIST_Setting(void) ;
+void ANX7150_Config_Bist_Video(WORD bist_select_number); 
+#endif
+
+BYTE ANX7150_IS_KSVList_VLD(void);
+//void ANX7150_IS_KSVFIFO_Ready(void);//wen
+//BYTE ANX7150_Check_KSV_SRM(void);//wen
+void ANX7150_Task(void);
+void ANX7150_Timer_Process_Re_init(void);
+#endif
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/ANX7150/ANX7150.c
+++ linux-mvl-dove-2.6.32/drivers/video/display/ANX7150/ANX7150.c
@@ -0,0 +1,414 @@
+/*
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/param.h>
+#include <linux/jiffies.h>
+#include <linux/platform_device.h>
+#include <linux/i2c.h>
+#include <linux/delay.h>
+#include <linux/proc_fs.h>
+#include <linux/freezer.h>
+#include <linux/workqueue.h>
+
+
+//Extra include for ANX7150 here
+#include "ANX7150_i2c_intf.h"
+#include "ANX7150_Sys7150.h"
+#include "ANX7150_System_Config.h"
+#include "HDMI_RX_DRV.h"
+#include "ANX7150.h"
+#include <video/kg2.h>
+int bist_reset=1;
+
+struct kg2_device_info {
+	struct device *dev;
+};
+
+#define REG_MIDL 0
+#define REG_MIDH 1
+#define REG_PIDH 2
+#define REG_PIDL 3
+
+//int ANX7150_shutdown=0;
+struct i2c_client *g_client;
+
+static const struct i2c_device_id anx7150_register_id[] = {
+     { "anx7150_i2c", 0 },
+     { }
+};
+
+MODULE_DEVICE_TABLE(i2c, anx7150_i2c_id);
+
+
+
+
+static struct i2c_driver anx7150_i2c_driver;
+static struct i2c_client *anx7150_i2c_client;
+
+static struct i2c_client *get_anx7150_i2c_client(void)
+{
+	return anx7150_i2c_client;
+}
+
+static struct workqueue_struct * anx7150_workqueue;
+static struct delayed_work anx7150_work;
+static long last_jiffies;
+
+
+static int anx7150_reg_get(int offset, unsigned char *pDataBuf, int datasize)
+{
+	int rc;
+	struct i2c_client *i2c_client;
+
+	if((i2c_client = get_anx7150_i2c_client()))
+	{
+		rc = i2c_smbus_read_i2c_block_data(i2c_client, offset, datasize, pDataBuf);
+		if (rc < 0)
+			return -EIO;
+	}else{
+		return -ENODEV;
+	}
+    	return 0;	
+}
+
+static int anx7150_reg_set(int offset, unsigned char data)
+{
+	struct i2c_client *i2c_client;
+
+	if((i2c_client = get_anx7150_i2c_client()))
+	{
+		i2c_smbus_write_byte_data(i2c_client, offset, data);
+
+	}else{
+		return -ENODEV;
+	}
+    	return 0;	
+}
+
+
+
+
+int BIST3(void)
+{
+//HW_Initial
+BYTE c;
+int i;
+    ANX7150_i2c_write_p0_reg(ANX7150_SYS_CTRL3_REG, 0x02);
+    ANX7150_i2c_write_p0_reg(ANX7150_SYS_CTRL2_REG, 0x00);
+    ANX7150_i2c_write_p0_reg(ANX7150_SRST_REG, 0x00);
+    ANX7150_i2c_read_p0_reg(ANX7150_SYS_PD_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_SYS_PD_REG, (c | 0x06));
+    ANX7150_i2c_read_p0_reg(ANX7150_CHIP_CTRL_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_CHIP_CTRL_REG, (c & 0xfe));
+    ANX7150_i2c_read_p0_reg(ANX7150_TMDS_CLKCH_CONFIG_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_TMDS_CLKCH_CONFIG_REG, (c | 0x80));
+    ANX7150_i2c_write_p0_reg(ANX7150_PLL_CTRL0_REG, 0xa8);
+    ANX7150_i2c_read_p0_reg(ANX7150_PLL_TX_AMP, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_PLL_TX_AMP, (c | 0x01));
+    ANX7150_i2c_write_p0_reg(ANX7150_PLL_CTRL1_REG,0x00);
+    ANX7150_i2c_write_p0_reg(ANX7150_SYS_CTRL1_REG, 0x00);
+    ANX7150_i2c_write_p0_reg(0x13, 0x11);//enable BIST
+
+//HPD
+
+    ANX7150_i2c_read_p0_reg(ANX7150_SYS_CTRL3_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_SYS_CTRL3_REG, c | 0x01);//power up all, 090630
+    ANX7150_i2c_read_p0_reg(ANX7150_SYS_STATE_REG, &c);
+    if (c & ANX7150_SYS_STATE_HP == 0)
+    { }//TODO: if the HDMI cable is not plugged }
+    
+    ANX7150_i2c_read_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, c & (~ANX7150_HDMI_AUDCTRL1_IN_EN));
+        ANX7150_i2c_read_p0_reg(ANX7150_VID_CTRL_REG, &c);
+
+        ANX7150_i2c_write_p0_reg(ANX7150_VID_CTRL_REG, c & (~ANX7150_VID_CTRL_IN_EN));
+        ANX7150_i2c_read_p0_reg(ANX7150_TMDS_CLKCH_CONFIG_REG, &c);
+
+        ANX7150_i2c_write_p0_reg(ANX7150_TMDS_CLKCH_CONFIG_REG, c & (~ANX7150_TMDS_CLKCH_MUTE));
+        ANX7150_i2c_read_p0_reg(ANX7150_HDCP_CTRL0_REG, &c);
+
+        ANX7150_i2c_write_p0_reg(ANX7150_HDCP_CTRL0_REG, (c & (~ANX7150_HDCP_CTRL0_HW_AUTHEN)));
+        ANX7150_i2c_read_p0_reg(ANX7150_SYS_CTRL1_REG, &c);
+        ANX7150_i2c_write_p0_reg(ANX7150_SYS_CTRL1_REG, c | 0x03); //HDMI
+	//ANX7150_i2c_write_p0_reg(ANX7150_SYS_CTRL1_REG, (c | 0x01)&0xFD); //DVI
+
+//RX Sense
+
+        ANX7150_i2c_read_p0_reg(ANX7150_SYS_STATE_REG, &c);
+        if(c & ANX7150_SYS_STATE_RSV_DET == 0)
+        {} //TODO: Receive sense is not active }
+
+//Config Video
+
+    ANX7150_i2c_write_p0_reg(ANX7150_VID_MODE_REG, 0x00);
+    ANX7150_i2c_read_p0_reg(ANX7150_SYS_STATE_REG, &c);
+    if(!(c & 0x02))
+    {}//TODO: Input clock not detected}
+
+    ANX7150_i2c_write_p0_reg(ANX7150_SYS_CTRL4_REG, 0x00);
+    ANX7150_i2c_write_p0_reg(ANX7150_VID_CAPCTRL0_REG, 0x10);
+    ANX7150_i2c_write_p0_reg(ANX7150_VID_CAPCTRL1_REG, 0x00);// patch
+    ANX7150_i2c_write_p0_reg(ANX7150_VID_MODE_REG, 0x1C);
+    ANX7150_i2c_write_p0_reg(ANX7150_VID_CTRL_REG, 0x3C);
+    ANX7150_i2c_read_p0_reg(ANX7150_SRST_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_SRST_REG, c | ANX7150_SRST_SW_RST);
+    ANX7150_i2c_write_p0_reg(ANX7150_SRST_REG, (c & (~ANX7150_SRST_SW_RST)));
+    ANX7150_i2c_read_p0_reg(ANX7150_SRST_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_SRST_REG, (c | ANX7150_TX_RST));
+    ANX7150_i2c_write_p0_reg(ANX7150_SRST_REG, (c & (~ANX7150_TX_RST)));
+    ANX7150_i2c_read_p0_reg(ANX7150_TMDS_CLKCH_CONFIG_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_TMDS_CLKCH_CONFIG_REG, (c | ANX7150_TMDS_CLKCH_MUTE));
+    
+    
+    //ANX7150_Config_Bist_Video(1);
+//Now it is in PLAYBACK state¡K..
+
+    //patch
+    ANX7150_i2c_write_p0_reg(0x71, 0x0f); // It's necessary!?, 0x0f
+
+    ANX7150_i2c_write_p0_reg(0x11, 0x00);//ALex: must be 0x00
+    ANX7150_i2c_write_p0_reg(0x12, 0x3c);
+
+// Config Audio
+//Single tone
+/*
+            ANX7150_i2c_write_p1_reg(ANX7150_ACR_N1_SW_REG, 0x00);
+            ANX7150_i2c_write_p1_reg(ANX7150_ACR_N2_SW_REG, 0x18);
+            ANX7150_i2c_write_p1_reg(ANX7150_ACR_N3_SW_REG, 0x00);
+            //Enable control of ACR
+            ANX7150_i2c_write_p1_reg(ANX7150_INFO_PKTCTRL1_REG, 0x01);
+            //audio enable: 
+            ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, 0x81);
+            ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDCTRL0_REG, 0x01);
+            ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDBIST_CTRL_REG, 0xCF);
+*/
+//pass through
+            ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDCTRL0_REG, 0x01);
+            ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, 0xC1);
+            ANX7150_i2c_write_p0_reg(ANX7150_SPDIFCH_STATUS_REG, 0x00);//0x55, 0xXY
+
+}
+
+int BIST(void)
+{
+BYTE c;
+int j=100;
+
+    int rc=-1;
+    if(bist_reset)
+    {
+        i2c_smbus_write_byte_data(g_client, 0x1a, 0x01);
+	  msleep(10);
+	  i2c_smbus_write_byte_data(g_client, 0x1a, 0x00);
+	  msleep(10);
+        {
+            i2c_smbus_write_byte_data(g_client, 0x18, 0x00);
+            //Temporary remove it//HDMI_RX_Initialize ();
+            i2c_smbus_write_byte_data(g_client, 0x16, 0x00);
+        }
+	//HW reset
+        rc=i2c_smbus_write_byte_data(g_client, 0x08,1);
+	msleep(60);
+        ANX7150_API_Initial();
+        bist_reset = 0;
+    }
+
+	if(!EXT_INT_EN)
+	{
+		int_s1=i2c_smbus_read_byte_data(g_client, ANX7150_INTR1_STATUS_REG);
+		i2c_smbus_write_byte_data(g_client, ANX7150_INTR1_STATUS_REG, int_s1);
+
+		int_s2=i2c_smbus_read_byte_data(g_client, ANX7150_INTR2_STATUS_REG);
+		i2c_smbus_write_byte_data(g_client, ANX7150_INTR2_STATUS_REG, int_s2);
+
+		int_s3=i2c_smbus_read_byte_data(g_client, ANX7150_INTR3_STATUS_REG);
+		i2c_smbus_write_byte_data(g_client, ANX7150_INTR3_STATUS_REG, int_s3);
+
+		ANX7150_INT_Done = 1;		
+	}
+
+    if(ANX7150_INT_Done)
+	{
+	    ANX7150_Interrupt_Process();
+		ANX7150_INT_Done = 0;
+	}
+    ANX7150_i2c_read_p0_reg(ANX7150_INTR_STATE_REG, &c);
+    ANX7150_BIST();
+	msleep(500);
+	return 1;
+}
+
+
+//int anx7150_thread (void) 
+void anx7150_work_func(struct work_struct * work)
+{
+/*
+   int j=100,k=100;
+
+    while (1) 
+    {
+*/
+        set_freezable();
+	unsigned long interval = jiffies_to_msecs((unsigned long)((long) jiffies - last_jiffies));
+//	printk("anx7150: anx7150_work_func() is called, intervel: %lu msec.\n", interval);
+	last_jiffies = (long) jiffies;
+
+	while(BIST_EN)
+	{
+		BIST();
+		msleep(500);
+	}
+
+	if (1) 
+	{
+		if(!ANX7150_shutdown)
+		{
+			ANX7150_API_Input_Changed();
+			ANX7150_Task();
+			if(1)
+			{
+				if( ANX7150_parse_edid_done == 1 
+				    &&   ANX7150_system_config_done == 0)
+				{
+					//system should config all the parameters here
+					//ANX7150_API_PRINT_EDID_Parsing_Result();
+					ANX7150_API_System_Config();
+					ANX7150_system_config_done = 1;
+				}
+			}
+			else
+			{
+				ANX7150_system_config_done = 0;
+			}
+		}
+	}
+
+	queue_delayed_work(anx7150_workqueue, &anx7150_work, msecs_to_jiffies(500));
+/*
+        msleep(500);
+
+    }
+
+return 0;
+*/
+}
+
+static int anx7150_i2c_probe(struct i2c_client *client,
+			const struct i2c_device_id *id)
+{
+	int rc,i;
+
+	memcpy(&g_client, &client, sizeof(client));	
+	if (!i2c_check_functionality(client->adapter,
+				     I2C_FUNC_SMBUS_I2C_BLOCK)) {
+		dev_err(&client->dev, "i2c bus does not support the anx7150\n");
+		rc = -ENODEV;
+		goto exit;
+	}
+
+	//HW reset
+	rc=i2c_smbus_write_byte_data(client, 0x08,1);
+	msleep(50);
+
+	rc=i2c_smbus_read_byte_data(client, 0x02);
+	printk("##ANX7150..REG[%x]=%x\n",0x02,rc);
+	rc=i2c_smbus_read_byte_data(client, 0x03);
+	printk("##ANX7150..REG[%x]=%x\n",0x03,rc);
+	msleep(2000);
+
+	ANX7150_API_DetectDevice();
+	ANX7150_API_Initial();
+	ANX7150_API_ShutDown(0);
+	ANX7150_API_HDCP_ONorOFF(HDCP_EN);
+
+	if (BIST3_EN)
+    		BIST3();
+	else
+	{
+
+		anx7150_workqueue = create_singlethread_workqueue("ANX7150_WORKQUEUE");
+
+		if (anx7150_workqueue == NULL)
+		{
+			printk("anx7150: Failed to creat work queue.\n");
+			goto exit;
+		}
+
+		last_jiffies = (long) jiffies;
+		INIT_DELAYED_WORK(&anx7150_work, anx7150_work_func);
+		queue_delayed_work(anx7150_workqueue, &anx7150_work, 0);
+/*
+
+		rc=kernel_thread(anx7150_thread, NULL, CLONE_VM);
+
+		if (rc < 0)
+			printk("!!!Fail to creat ANX7150 thread!!!\n");
+		else
+			printk("##ANX7150 thread ok!!!\n");
+*/
+	}
+
+	return 0;
+	
+ exit:
+	return rc;
+}
+
+static int anx7150_i2c_remove(struct i2c_client *client)
+{
+	destroy_workqueue(anx7150_workqueue);
+
+	anx7150_i2c_client = NULL;
+	return 0;
+}
+
+static int anx7150_suspend(struct i2c_client *client)
+{
+	ANX7150_Timer_Process_Re_init();
+	return 0;
+}
+static int anx7150_resume(struct i2c_client *client)
+{
+	ANX7150_API_Initial();
+	ANX7150_Timer_Process_Re_init();
+	return 0;
+}
+
+static struct i2c_driver anx7150_driver = {
+     .driver = {
+	  .name   = "anx7150_i2c",
+	  .owner  = THIS_MODULE,
+     },
+     .probe          = anx7150_i2c_probe,
+     .remove         = anx7150_i2c_remove,
+     .suspend        = anx7150_suspend,
+     .resume         = anx7150_resume,
+     .id_table       = anx7150_register_id,
+};
+
+static int __init dove_anx7150_init(void)
+{
+	int ret;
+	if ((ret = i2c_add_driver(&anx7150_driver)) < 0)
+	{
+		return ret;		
+
+	}
+	return ret;
+}
+
+static void __exit dove_anx7150_exit(void)
+{
+	i2c_del_driver(&anx7150_driver);
+}
+
+module_init(dove_anx7150_init);
+module_exit(dove_anx7150_exit);
+
+MODULE_AUTHOR("Marvell");
+MODULE_DESCRIPTION("ANX7150 driver");
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/ANX7150/Makefile
+++ linux-mvl-dove-2.6.32/drivers/video/display/ANX7150/Makefile
@@ -0,0 +1,4 @@
+obj-$(CONFIG_KG2_ANX7150) += ANX7150_i2c_intf.o
+obj-$(CONFIG_KG2_ANX7150) += ANX7150_Sys7150.o
+obj-$(CONFIG_KG2_ANX7150) += ANX7150_System_Config.o
+obj-$(CONFIG_KG2_ANX7150) += ANX7150.o
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/ANX7150/ANX7150_i2c_intf.h
+++ linux-mvl-dove-2.6.32/drivers/video/display/ANX7150/ANX7150_i2c_intf.h
@@ -0,0 +1,33 @@
+
+#ifndef _ANX7150__I2C__INTF_H
+#define _ANX7150__I2C__INTF_H
+#include "ANX7150_Sys7150.h"
+
+#define PORT0_ADDR	0x60
+#define PORT1_ADDR	0x68
+#define ANX7150_PORT0_ADDR	0x72  //ANX7150
+#define ANX7150_PORT1_ADDR	0x7A  //ANX7150
+
+extern unsigned char i2c_dev_addr;
+char i2c_read_reg(unsigned char offset, unsigned char *d);
+char i2c_write_reg(unsigned char offset, unsigned char d);
+void i2c_init(void);
+void i2c_set_dev_addr(unsigned char daddr);
+char i2c_write_p0_reg(unsigned char offset, unsigned char d);
+char i2c_write_p1_reg(unsigned char offset, unsigned char d);
+char i2c_write_p0_regs(unsigned char offset, unsigned char *dat, unsigned char len);
+char i2c_write_p1_regs(unsigned char offset, unsigned char *dat, unsigned char len);
+char i2c_read_p0_reg(unsigned char offset, unsigned char *d);
+char i2c_read_p1_reg(unsigned char offset, unsigned char *d);
+char i2c_read_p0_regs(unsigned char offset, unsigned char *dat, unsigned char len);
+char i2c_read_p1_regs(unsigned char offset, unsigned char *dat, unsigned char len);
+
+void ANX7150_i2c_init(void);
+void ANX7150_i2c_set_dev_addr(BYTE daddr);
+BYTE ANX7150_i2c_write_p0_reg(BYTE offset, BYTE d);
+BYTE ANX7150_i2c_write_p1_reg(BYTE offset, BYTE d);
+
+BYTE ANX7150_i2c_read_p0_reg(BYTE offset, BYTE *d);
+BYTE ANX7150_i2c_read_p1_reg(BYTE offset, BYTE *d);
+#endif
+
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/ANX7150/ANX7150_i2c_intf.c
+++ linux-mvl-dove-2.6.32/drivers/video/display/ANX7150/ANX7150_i2c_intf.c
@@ -0,0 +1,57 @@
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/param.h>
+#include <linux/jiffies.h>
+#include <linux/platform_device.h>
+#include <linux/i2c.h>
+#include <linux/delay.h>
+#include <linux/proc_fs.h>
+
+#include "ANX7150_i2c_intf.h"
+#include "ANX7150.h"
+extern struct i2c_client *g_client;
+//ANX7150 I2C address 
+//{0x72/2,0x7A/2} or {0x76/2+0x7E/2}
+BYTE ANX7150_i2c_write_p0_reg(BYTE offset, BYTE d)
+{
+    int rc;
+    rc=i2c_smbus_write_byte_data(g_client, offset, d);
+    msleep(10);
+    return 1;
+
+}
+
+BYTE ANX7150_i2c_read_p0_reg(BYTE offset, BYTE *d)
+{
+    int rc;
+    rc=i2c_smbus_read_byte_data(g_client, offset);
+    *d=rc;
+    msleep(10);	
+    return 1;
+     
+}
+
+BYTE ANX7150_i2c_write_p1_reg(BYTE offset, BYTE d)
+{
+    int rc;
+    g_client-> addr=0x3F;
+    rc=i2c_smbus_write_byte_data(g_client, offset, d);
+    g_client-> addr=0x3B;
+    msleep(10);
+    return 1;
+
+}
+
+BYTE ANX7150_i2c_read_p1_reg(BYTE offset, BYTE *d)
+{
+    int rc;
+    g_client-> addr=0x3F;
+    rc=i2c_smbus_read_byte_data(g_client, offset);
+    g_client-> addr=0x3B;
+    *d=rc;
+    msleep(10);
+    return 1;
+     
+}
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/ANX7150/ANX7150_System_Config.h
+++ linux-mvl-dove-2.6.32/drivers/video/display/ANX7150/ANX7150_System_Config.h
@@ -0,0 +1,84 @@
+
+#include <linux/i2c.h>
+#include "ANX7150_Sys7150.h"
+
+//user interface define begins
+
+//select video hardware interface
+#define ANX7150_VID_HW_INTERFACE 0x03//0x00:RGB and YcbCr 4:4:4 Formats with Separate Syncs (24-bpp mode)
+                                                                 //0x01:YCbCr 4:2:2 Formats with Separate Syncs(16-bbp)
+                                                                 //0x02:YCbCr 4:2:2 Formats with Embedded Syncs(No HS/VS/DE)
+                                                                 //0x03:YC Mux 4:2:2 Formats with Separate Sync Mode1(bit15:8 and bit 3:0 are used)
+                                                                 //0x04:YC Mux 4:2:2 Formats with Separate Sync Mode2(bit11:0 are used)
+                                                                 //0x05:YC Mux 4:2:2 Formats with Embedded Sync Mode1(bit15:8 and bit 3:0 are used)
+                                                                 //0x06:YC Mux 4:2:2 Formats with Embedded Sync Mode2(bit11:0 are used)
+                                                                 //0x07:RGB and YcbCr 4:4:4 DDR Formats with Separate Syncs
+                                                                 //0x08:RGB and YcbCr 4:4:4 DDR Formats with Embedded Syncs
+                                                                 //0x09:RGB and YcbCr 4:4:4 Formats with Separate Syncs but no DE
+                                                                 //0x0a:YCbCr 4:2:2 Formats with Separate Syncs but no DE
+//select input color space
+#define ANX7150_INPUT_COLORSPACE 0x01//0x00: input color space is RGB
+                                                                //0x01: input color space is YCbCr422
+                                                                //0x02: input color space is YCbCr444
+//select input pixel clock edge for DDR mode
+#define ANX7150_IDCK_EDGE_DDR 0x00  //0x00:use rising edge to latch even numbered pixel data//jack wen
+                                                                //0x01:use falling edge to latch even numbered pixel data 
+
+//select audio hardware interface
+#define ANX7150_AUD_HW_INTERFACE 0x02//0x01:audio input comes from I2S
+                                                                  //0x02:audio input comes from SPDIF
+                                                                  //0x04:audio input comes from one bit audio
+//select MCLK and Fs relationship if audio HW interface is I2S
+#define ANX7150_MCLK_Fs_RELATION 0x01//0x00:MCLK = 128 * Fs
+                                                                //0x01:MCLK = 256 * Fs
+                                                                //0x02:MCLK = 384 * Fs
+                                                                //0x03:MCLK = 512 * Fs			//wen updated error
+
+#define ANX7150_AUD_CLK_EDGE 0x00  //0x00:use MCLK and SCK rising edge to latch audio data
+                                                                //0x08, revised by wen. //0x80:use MCLK and SCK falling edge to latch audio data
+//select I2S channel numbers if audio HW interface is I2S
+#define ANX7150_I2S_CH0_ENABLE 0x01 //0x01:enable channel 0 input; 0x00: disable
+#define ANX7150_I2S_CH1_ENABLE 0x00 //0x01:enable channel 0 input; 0x00: disable
+#define ANX7150_I2S_CH2_ENABLE 0x00 //0x01:enable channel 0 input; 0x00: disable
+#define ANX7150_I2S_CH3_ENABLE 0x00 //0x01:enable channel 0 input; 0x00: disable
+//select I2S word length if audio HW interface is I2S
+#define ANX7150_I2S_WORD_LENGTH 0x0b
+                                        //0x02 = 16bits; 0x04 = 18 bits; 0x08 = 19 bits; 0x0a = 20 bits(maximal word length is 20bits); 0x0c = 17 bits;
+                                        // 0x03 = 20bits(maximal word length is 24bits); 0x05 = 22 bits; 0x09 = 23 bits; 0x0b = 24 bits; 0x0d = 21 bits;
+
+//select I2S format if audio HW interface is I2S
+#define ANX7150_I2S_SHIFT_CTRL 0x00//0x00: fist bit shift(philips spec)
+                                                                //0x01:no shift
+#define ANX7150_I2S_DIR_CTRL 0x00//0x00:SD data MSB first
+                                                            //0x01:LSB first
+#define ANX7150_I2S_WS_POL 0x00//0x00:left polarity when word select is low
+                                                        //0x01:left polarity when word select is high
+#define ANX7150_I2S_JUST_CTRL 0x00//0x00:data is left justified
+                                                             //0x01:data is right justified
+
+//user interface define ends
+
+extern BYTE ANX7150_new_HW_interface_parameter;
+
+void ANX7150_API_System_Config(void);
+void ANX7150_8770_Video_Config(void);
+void ANX7150_8770_Packets_Config(void);
+void ANX7150_8770_Audio_Config(void);
+void ANX7150_API_Video_Config(BYTE video_id,BYTE input_pixel_rpt_time);
+void ANX7150_API_AUD_CHStatus_Config(BYTE MODE,BYTE PCM_MODE,BYTE SW_CPRGT,BYTE NON_PCM,
+    BYTE PROF_APP,BYTE CAT_CODE,BYTE CH_NUM,BYTE SOURCE_NUM,BYTE CLK_ACCUR,BYTE Fs);
+int ANX7150_API_DetectDevice(void);//BIT ANX7150_API_DetectDevice(void);
+void ANX7150_API_HoldSystemConfig(int bHold_ANX7150);//void ANX7150_API_HoldSystemConfig(BIT bHold_ANX7150);
+void ANX7150_API_ShutDown(int bShutDown_ANX7150);//void ANX7150_API_ShutDown(BIT bShutDown_ANX7150);
+void ANX7150_API_HDCP_ONorOFF(int HDCP_ONorOFF);//void ANX7150_API_HDCP_ONorOFF(BIT HDCP_ONorOFF);
+void ANX7150_API_Packets_Config(BYTE pkt_sel);//void ANX7150_API_Packets_Config(BYTE pkt_sel);
+void ANX7150_API_AVI_Config(BYTE pb1,BYTE pb2,BYTE pb3,BYTE pb4,BYTE pb5,
+    BYTE pb6,BYTE pb7,BYTE pb8,BYTE pb9,BYTE pb10,BYTE pb11,BYTE pb12,BYTE pb13);
+void ANX7150_API_AUD_INFO_Config(BYTE pb1,BYTE pb2,BYTE pb3,BYTE pb4,BYTE pb5,
+    BYTE pb6,BYTE pb7,BYTE pb8,BYTE pb9,BYTE pb10);
+void ANX7150_API_Input_Changed(void);
+//void ANX7150_User_Change_Input ();		//wen
+void ANX7150_API_Set_AVMute(void);
+void ANX7150_API_Clean_HDCP(void);
+void ANX7150_API_Audio_Config(BYTE aud_fs);
+
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/ANX7150/ANX7150_Sys7150.c
+++ linux-mvl-dove-2.6.32/drivers/video/display/ANX7150/ANX7150_Sys7150.c
@@ -0,0 +1,4985 @@
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/param.h>
+#include <linux/jiffies.h>
+#include <linux/platform_device.h>
+#include <linux/i2c.h>
+#include <linux/delay.h>
+#include <linux/proc_fs.h>
+#include "ANX7150_Sys7150.h"
+#include "ANX7150_System_Config.h"
+#include "ANX7150_i2c_intf.h"
+#ifdef ANX8770_USED
+#include "HDMI_RX_DRV.h"   
+#endif
+#include "ANX7150.h"
+#include <video/kg2.h>
+
+extern struct i2c_client *g_client;
+bool EX0;
+char timer_done=1;
+BYTE timer_slot =-1;//BYTE timer_slot =0;
+
+
+//code struct ANX7150_video_timingtype ANX7150_video_timingtype_table =
+struct ANX7150_video_timingtype ANX7150_video_timingtype_table =  
+{
+     //640x480p-60hz
+    {0x20/*H_RES_LOW*/, 0x03/*H_RES_HIGH*/,0x80 /*ACT_PIX_LOW*/,0x02 /*ACT_PIX_HIGH*/, 
+    0x60/*HSYNC_WIDTH_LOW*/,0x00 /*HSYNC_WIDTH_HIGH*/,0x30 /*H_BP_LOW*/,0x00 /*H_BP_HIGH*/, 
+    0xe0/*ACT_LINE_LOW*/, 0x01/*ACT_LINE_HIGH*/,0x02 /*VSYNC_WIDTH*/, 0x21/*V_BP_LINE*/, 
+    0x0a/*V_FP_LINE*/,0x10 /*H_FP_LOW*/, 0x00/*H_FP_HIGH*/, 
+    ANX7150_Progressive, ANX7150_Neg_Hsync_pol, ANX7150_Neg_Vsync_pol},
+    //720x480p-60hz
+    {0x5a/*H_RES_LOW*/,0x03 /*H_RES_HIGH*/,0xd0/*ACT_PIX_LOW*/, 0x02/*ACT_PIX_HIGH*/, 
+    0x3e/*HSYNC_WIDTH_LOW*/, 0x00/*HSYNC_WIDTH_HIGH*/, 0x3c/*H_BP_LOW*/, 0x00/*H_BP_HIGH*/, 
+    0xe0/*ACT_LINE_LOW*/, 0x01/*ACT_LINE_HIGH*/, 0x06/*VSYNC_WIDTH*/, 0x1e/*V_BP_LINE*/, 
+    0x09/*V_FP_LINE*/, 0x10/*H_FP_LOW*/, 0x00/*H_FP_HIGH*/, 
+    ANX7150_Progressive, ANX7150_Neg_Hsync_pol, ANX7150_Neg_Vsync_pol},
+    //720p-60hz
+    {0x72/*H_RES_LOW*/, 0x06/*H_RES_HIGH*/, 0x00/*ACT_PIX_LOW*/, 0x05/*ACT_PIX_HIGH*/, 
+    0x28/*HSYNC_WIDTH_LOW*/, 0x00/*HSYNC_WIDTH_HIGH*/, 0xdc/*H_BP_LOW*/, 0x00/*H_BP_HIGH*/, 
+    0xd0/*ACT_LINE_LOW*/, 0x02/*ACT_LINE_HIGH*/, 0x05/*VSYNC_WIDTH*/, 0x14/*V_BP_LINE*/, 
+    0x05/*V_FP_LINE*/, 0x6e/*H_FP_LOW*/, 0x00/*H_FP_HIGH*/, 
+    ANX7150_Progressive, ANX7150_Pos_Hsync_pol, ANX7150_Pos_Vsync_pol},
+    //1080i-60hz
+    {0x98/*H_RES_LOW*/, 0x08/*H_RES_HIGH*/, 0x80/*ACT_PIX_LOW*/, 0x07/*ACT_PIX_HIGH*/, 
+    0x2c/*HSYNC_WIDTH_LOW*/, 0x00/*HSYNC_WIDTH_HIGH*/, 0x94/*H_BP_LOW*/, 0x00/*H_BP_HIGH*/, 
+    0x38/*ACT_LINE_LOW*/, 0x04/*ACT_LINE_HIGH*/, 0x05/*VSYNC_WIDTH*/, 0x0f/*V_BP_LINE*/, 
+    0x02/*V_FP_LINE*/, 0x58/*H_FP_LOW*/, 0x00/*H_FP_HIGH*/, 
+    ANX7150_Interlace, ANX7150_Pos_Hsync_pol, ANX7150_Pos_Vsync_pol},
+    //720x480i-60hz
+    {0x5a/*H_RES_LOW*/,0x03 /*H_RES_HIGH*/,0xd0/*ACT_PIX_LOW*/, 0x02/*ACT_PIX_HIGH*/, 
+    0x3e/*HSYNC_WIDTH_LOW*/, 0x00/*HSYNC_WIDTH_HIGH*/, 0x39/*H_BP_LOW*/, 0x00/*H_BP_HIGH*/, 
+    0xe0/*ACT_LINE_LOW*/, 0x01/*ACT_LINE_HIGH*/, 0x03/*VSYNC_WIDTH*/, 0x0f/*V_BP_LINE*/, 
+    0x04/*V_FP_LINE*/, 0x13/*H_FP_LOW*/, 0x00/*H_FP_HIGH*/, 
+    ANX7150_Interlace, ANX7150_Neg_Hsync_pol, ANX7150_Neg_Vsync_pol},											//update
+    //576p-50hz
+    {0x60/*H_RES_LOW*/,0x03 /*H_RES_HIGH*/,0xd0 /*ACT_PIX_LOW*/, 0x02/*ACT_PIX_HIGH*/, 
+    0x40/*HSYNC_WIDTH_LOW*/, 0x00/*HSYNC_WIDTH_HIGH*/, 0x44/*H_BP_LOW*/,0x00 /*H_BP_HIGH*/, 
+    0x40/*ACT_LINE_LOW*/, 0x02/*ACT_LINE_HIGH*/, 0x05/*VSYNC_WIDTH*/, 0x27/*V_BP_LINE*/, 
+    0x05/*V_FP_LINE*/, 0x0c/*H_FP_LOW*/, 0x00/*H_FP_HIGH*/, 
+    ANX7150_Progressive, ANX7150_Neg_Hsync_pol, ANX7150_Neg_Vsync_pol},
+    //720p-50hz
+    {0xbc/*H_RES_LOW*/, 0x07/*H_RES_HIGH*/, 0x00/*ACT_PIX_LOW*/, 0x05/*ACT_PIX_HIGH*/, 
+    0x28/*HSYNC_WIDTH_LOW*/, 0x00/*HSYNC_WIDTH_HIGH*/, 0xdc/*H_BP_LOW*/, 0x00/*H_BP_HIGH*/, 
+    0xd0/*ACT_LINE_LOW*/, 0x02/*ACT_LINE_HIGH*/, 0x05/*VSYNC_WIDTH*/, 0x14/*V_BP_LINE*/, 
+    0x05/*V_FP_LINE*/, 0xb8/*H_FP_LOW*/, 0x01/*H_FP_HIGH*/, 
+    ANX7150_Progressive, ANX7150_Pos_Hsync_pol, ANX7150_Pos_Vsync_pol},
+    //1080i-50hz
+    {0x50/*H_RES_LOW*/, 0x0a/*H_RES_HIGH*/, 0x80/*ACT_PIX_LOW*/, 0x07/*ACT_PIX_HIGH*/, 
+    0x2c/*HSYNC_WIDTH_LOW*/, 0x00/*HSYNC_WIDTH_HIGH*/, 0x94/*H_BP_LOW*/, 0x00/*H_BP_HIGH*/, 
+    0x38/*ACT_LINE_LOW*/, 0x04/*ACT_LINE_HIGH*/, 0x05/*VSYNC_WIDTH*/, 0x0f/*V_BP_LINE*/, 
+    0x02/*V_FP_LINE*/, 0x10/*H_FP_LOW*/, 0x02/*H_FP_HIGH*/, 
+    ANX7150_Interlace, ANX7150_Pos_Hsync_pol, ANX7150_Pos_Vsync_pol},
+     //576i-50hz
+    {0x60/*H_RES_LOW*/,0x03 /*H_RES_HIGH*/,0xd0 /*ACT_PIX_LOW*/, 0x02/*ACT_PIX_HIGH*/, 
+    0x3f/*HSYNC_WIDTH_LOW*/, 0x00/*HSYNC_WIDTH_HIGH*/, 0x45/*H_BP_LOW*/,0x00 /*H_BP_HIGH*/, 
+    0x40/*ACT_LINE_LOW*/,0x02 /*ACT_LINE_HIGH*/, 0x03/*VSYNC_WIDTH*/, 0x13/*V_BP_LINE*/, 
+    0x02/*V_FP_LINE*/, 0x0c/*H_FP_LOW*/, 0x00/*H_FP_HIGH*/, 
+    ANX7150_Interlace, ANX7150_Neg_Hsync_pol, ANX7150_Neg_Vsync_pol},
+};
+//#endif
+//code struct Bist_Video_Format bist_demo[] = {
+struct Bist_Video_Format bist_demo[] = {  
+//h_total  h_act   v_total v_act   h_fp  h_wid h_bp v_fp v_wid v_bp  h_pol v_pol    I_P  mode
+    {800,    640,    525,    480,     16,     96,    48,    10,    2,    33,     1,        1,       0,      0},//640x480p@60
+    {1650,   1280,  750,    720,    110,   40,    220,   5,      5,    20,     0,        0,       0,      1},//1280x720p@60
+    {2200,   1920,  1125,  1080,    88,    44,    148,   2,     5,    15,     0,        0,        1,     2},//1920x1080i@60 
+    {2200,   1920,  1125,  1080,    88,    44,     148,   4,    5,    36,     0,        0,        0,     2},//1920x1080p@60
+    {1980,    1280,  750,    720,     440,  40,     220,   5,    5,    20,     0,        0,        0,     0},//1280x720p@50
+    {2640,    1920,  1125,  1080,    528,  44,     148,   2,    5,   15,      0,        0,        1,     1},//1920x1080i@50
+    {864,    720,     625,    576,    12,     64,    68,     5,     5,    39,     1,         1,       0,      0},//720x576p@50
+    {864,    720,     625,    576,    12,     63,    69,     2,     3,    19,     1,         1,       1,      1},//720x576i@50
+    {858,    720,     525,    480,    19,     63,    57,     4,     3,    15,     1,         1,       1,      2},//720x480i@60
+    {2080,  1920,   1235,   1200,  88,     44,   28,      4,     5,    26,     0,         0,       0,      0},
+};
+BYTE ANX7150_EDID_Buf[256];
+BYTE ANX7150_avi_data[19];//, ANX7150_avi_checksum;
+BYTE ANX7150_system_state;
+BYTE spdif_error_cnt = 0x00;
+BYTE misc_reset_needed;
+BYTE ANX7150_stdaddr,ANX7150_stdreg,ANX7150_ext_block_num;
+BYTE ANX7150_svd_length,ANX7150_sau_length;
+BYTE ANX7150_edid_dtd[18];
+WORD ANX7150_edid_length;
+ANX7150_edid_result_4_system ANX7150_edid_result;
+
+BIT ANX7150_ddc_fifo_full;
+BIT ANX7150_ddc_progress;
+BIT ANX7150_hdcp_auth_en;
+//BIT ANX7150_bksv_ready; //replace by srm_checked xy 01.09
+BIT ANX7150_HDCP_enable;
+BIT ANX7150_ksv_srm_pass;
+BYTE ANX7150_hdcp_bcaps;
+BYTE ANX7150_hdcp_bstatus[2];
+BIT ANX7150_srm_checked;
+BIT ANX7150_hdcp_auth_pass;
+BIT ANX7150_avmute_enable;
+BIT ANX7150_send_blue_screen;
+BIT ANX7150_hdcp_encryption;
+BIT ANX7150_hdcp_init_done;
+BIT ANX7150_hdcp_wait_100ms_needed;
+BIT ANX7150_auth_fully_pass;
+BIT ANX7150_parse_edid_done;//060714 XY
+//BIT testen;
+//BYTE ANX7150_avi_data[19], ANX7150_avi_checksum;
+BYTE ANX7150_hdcp_auth_fail_counter ;
+
+BYTE ANX7150_video_format_config;
+BIT ANX7150_emb_sync_mode,ANX7150_de_gen_en,ANX7150_demux_yc_en,ANX7150_ddr_bus_mode;
+BIT ANX7150_ddr_edge,ANX7150_ycmux_BIT_sel;
+BIT ANX7150_system_config_done;
+BYTE ANX7150_RGBorYCbCr; //modified by zy 060814   
+BYTE ANX7150_in_pix_rpt,ANX7150_tx_pix_rpt;
+BYTE ANX7150_in_pix_rpt_bkp,ANX7150_tx_pix_rpt_bkp;
+BYTE ANX7150_video_timing_id;
+BIT ANX7150_pix_rpt_set_by_sys;
+BYTE ANX7150_video_timing_parameter[18];
+BYTE switch_value_sw_backup,switch_value_pc_backup;
+BYTE switch_value,bist_switch_value_pc;
+BIT ANX7150_new_csc,ANX7150_new_vid_id,ANX7150_new_HW_interface;
+BIT ANX7150_INT_Done;
+
+audio_config_struct s_ANX7150_audio_config;
+config_packets s_ANX7150_packet_config;
+
+BYTE FREQ_MCLK;         //0X72:0X50 bit2:0
+                                //000b:Fm = 128*Fs 
+                                //001b:Fm = 256*Fs 
+                                //010b:Fm = 384*Fs 
+                                //011b:Fm = 512*Fs 
+BYTE ANX7150_audio_clock_edge;
+int ANX7150_app_hold_system_config;
+int ANX7150_shutdown;
+
+                                
+void ANX7150_Task()
+{
+	if(!EXT_INT_EN)
+	{
+		ANX7150_i2c_read_p0_reg(ANX7150_INTR1_STATUS_REG, &int_s1);
+		ANX7150_i2c_write_p0_reg(ANX7150_INTR1_STATUS_REG, int_s1);
+
+		ANX7150_i2c_read_p0_reg(ANX7150_INTR2_STATUS_REG, &int_s2);
+		ANX7150_i2c_write_p0_reg(ANX7150_INTR2_STATUS_REG, int_s2);
+
+		ANX7150_i2c_read_p0_reg(ANX7150_INTR3_STATUS_REG, &int_s3);
+		ANX7150_i2c_write_p0_reg(ANX7150_INTR3_STATUS_REG, int_s3);
+
+		ANX7150_INT_Done = 1;		
+	}
+	
+    if(ANX7150_INT_Done)
+	{
+                ANX7150_DEBUG("### int_s1=%x\n",int_s1);
+		ANX7150_Interrupt_Process();
+		ANX7150_INT_Done = 0;
+	}
+    ANX7150_Timer_Process ();
+	
+}
+
+void ANX7150_Timer_Slot1() 
+{
+    BYTE c;
+
+    ANX7150_DEBUG("###ANX7150_Timer_Slot1\n");
+    if(ANX7150_system_state == ANX7150_INITIAL)
+    {
+        ANX7150_DEBUG("###ANX7150_INITIAL at timer slot1\n");
+        return;
+    }
+    		
+    //while(ANX7150_system_state == ANX7150_WAIT_HOTPLUG)
+    if(ANX7150_system_state == ANX7150_WAIT_HOTPLUG)
+	{
+                ANX7150_DEBUG("###ANX7150_WAIT_HOTPLUG at timer slot1\n");
+		ANX7150_i2c_read_p0_reg(ANX7150_INTR_STATE_REG, &c);
+                ANX7150_DEBUG("###0x40=%x\n",c);
+        	if(c & 0x01)
+        	{
+				ANX7150_i2c_read_p0_reg(ANX7150_SYS_CTRL3_REG, &c);
+		        ANX7150_i2c_write_p0_reg(ANX7150_SYS_CTRL3_REG, c | 0x01);//power up all, 090630
+				//HDMI_RX_ReadI2C_RX0(HDMI_RX_SYS_PWDN2_REG, &c);	//en output of 8770,
+			    //HDMI_RX_WriteI2C_RX0(HDMI_RX_SYS_PWDN2_REG, c & 0xf8);
+						
+	            ANX7150_Hotplug_Change_Interrupt();
+				 ANX7150_DEBUG("###HPD Det at timer slot1\n");
+			}
+			//else
+			//{
+			//	msleep(1000);
+			//}
+	msleep(500);
+	}
+	
+    
+    if(ANX7150_system_state == ANX7150_READ_PARSE_EDID)
+    {
+
+        ANX7150_i2c_read_p0_reg(ANX7150_TMDS_CLKCH_CONFIG_REG, &c);
+        ANX7150_DEBUG("ANX7150_WAIT_HOTPLUG--->111111111ANX7150_TMDS_CLKCH_CONFIG_REG=%x\n",c);	
+        ANX7150_i2c_write_p0_reg(ANX7150_TMDS_CLKCH_CONFIG_REG, c |0x80);
+        ANX7150_DEBUG("ANX7150_WAIT_HOTPLUG--->222222222ANX7150_TMDS_CLKCH_CONFIG_REG=%x\n",c);
+
+//        ANX7150_DEBUG("###ANX7150_READ_PARSE_EDID\n");
+        ANX7150_i2c_read_p0_reg(ANX7150_HDCP_CTRL0_REG, &c);
+        ANX7150_i2c_write_p0_reg(ANX7150_HDCP_CTRL0_REG, (c &(~ANX7150_HDCP_CTRL0_HW_AUTHEN)));
+        ANX7150_hdcp_auth_en = 0;
+
+        ANX7150_RST_DDCChannel();
+    //enable video input
+    ANX7150_i2c_read_p0_reg(ANX7150_VID_CTRL_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_VID_CTRL_REG, c | ANX7150_VID_CTRL_IN_EN);  
+    ANX7150_DEBUG("Video pre-onfigure OK~~!\n");
+        
+        ANX7150_Parse_EDID();
+	 ANX7150_parse_edid_done = 1;
+
+        ANX7150_Set_System_State(ANX7150_WAIT_RX_SENSE);//060819
+    }
+
+    if(ANX7150_system_state == ANX7150_WAIT_RX_SENSE)
+    {
+        ANX7150_i2c_read_p0_reg(ANX7150_SYS_STATE_REG, &c);
+        if(c & ANX7150_SYS_STATE_RSV_DET)
+        {
+            ANX7150_DEBUG("###Receiver sense active.\n");
+            ANX7150_Set_System_State(ANX7150_CONFIG_VIDEO);//060819
+        }
+        else
+        {
+            ANX7150_Set_System_State(ANX7150_CONFIG_VIDEO);//060819 
+        } 
+    }
+}
+
+void ANX7150_Timer_Slot2(void)
+{
+    ANX7150_DEBUG("###ANX7150_Timer_Slot2\n");
+    if(ANX7150_system_state == ANX7150_CONFIG_VIDEO)
+    {
+        ANX7150_Config_Video();
+    }
+
+    if(ANX7150_system_state == ANX7150_CONFIG_AUDIO)
+    {
+        ANX7150_Config_Audio();
+    }
+
+    if(ANX7150_system_state == ANX7150_CONFIG_PACKETS)
+    {
+        ANX7150_Config_Packet();
+    }
+}    
+ 
+void ANX7150_Timer_Slot3(void)
+{
+     ANX7150_DEBUG("###ANX7150_Timer_Slot3\n");
+    if(ANX7150_system_state == ANX7150_HDCP_AUTHENTICATION)
+    {
+        ANX7150_HDCP_Process();
+    }
+    
+    if(ANX7150_system_state == ANX7150_PLAY_BACK)
+    {            
+        ANX7150_PLAYBACK_Process();
+
+    }
+}    
+
+void ANX7150_Timer_Slot4() 
+{
+    BYTE c;
+    ANX7150_i2c_read_p0_reg(0x10, &c);
+    ANX7150_DEBUG("###timer_slot4,[0x10]=0x%x ----\n",c);
+}
+
+void ANX7150_Variable_Initial() 
+{
+    BYTE i;
+    ANX7150_DEBUG("+++ANX7150_Variable_Initial+++\n");   
+    ANX7150_Set_System_State(ANX7150_INITIAL);
+    ANX7150_hdcp_auth_en = 0;
+    ANX7150_ksv_srm_pass =0;
+    ANX7150_srm_checked = 0;
+    ANX7150_hdcp_auth_pass = 0;
+    ANX7150_avmute_enable = 1;
+    ANX7150_hdcp_auth_fail_counter =0;
+    ANX7150_hdcp_encryption = 0;
+    ANX7150_send_blue_screen = 0;
+    ANX7150_hdcp_init_done = 0;
+    ANX7150_hdcp_wait_100ms_needed = 1;
+    ANX7150_auth_fully_pass = 0;
+    //********************for video config**************
+    ANX7150_video_timing_id = 0;
+    ANX7150_in_pix_rpt = 0;
+    ANX7150_tx_pix_rpt = 0;
+    ANX7150_new_csc = 0;
+    ANX7150_new_vid_id = 0;
+    ANX7150_new_HW_interface = 0;
+    //********************end of video config*********
+
+    //********************for edid parse***********
+    ANX7150_edid_result.is_HDMI = 0;
+    ANX7150_edid_result.ycbcr422_supported = 0;
+    ANX7150_edid_result.ycbcr444_supported = 0;
+    ANX7150_edid_result.supported_720p_60Hz = 0;
+    ANX7150_edid_result.supported_720p_50Hz = 0;
+    ANX7150_edid_result.supported_576p_50Hz = 0;
+    ANX7150_edid_result.supported_576i_50Hz = 0;
+    ANX7150_edid_result.supported_1080i_60Hz = 0;
+    ANX7150_edid_result.supported_1080i_50Hz = 0;
+    ANX7150_edid_result.supported_640x480p_60Hz = 0;
+    ANX7150_edid_result.supported_720x480p_60Hz = 0;
+    ANX7150_edid_result.supported_720x480i_60Hz = 0;
+    ANX7150_edid_result.edid_errcode = 0;
+    ANX7150_edid_result.SpeakerFormat = 0;
+    for(i = 0; i < 8; i ++)
+    {
+        ANX7150_edid_result.AudioChannel[i] = 0;
+        ANX7150_edid_result.AudioFormat[i] = 0;
+        ANX7150_edid_result.AudioFs[i] = 0;
+        ANX7150_edid_result.AudioLength[i] = 0;
+    }
+    //********************end of edid**************
+
+    s_ANX7150_packet_config.packets_need_config = 0x03;   //new avi infoframe
+    s_ANX7150_packet_config.avi_info.type = 0x82;
+    s_ANX7150_packet_config.avi_info.version = 0x02;
+    s_ANX7150_packet_config.avi_info.length = 0x0d;
+    s_ANX7150_packet_config.avi_info.pb_byte[1] = 0x21;//YCbCr422
+    s_ANX7150_packet_config.avi_info.pb_byte[2] = 0x08; 
+    s_ANX7150_packet_config.avi_info.pb_byte[3] = 0x00; 
+    s_ANX7150_packet_config.avi_info.pb_byte[4] = 0x00; 
+    s_ANX7150_packet_config.avi_info.pb_byte[5] = 0x00; 
+    s_ANX7150_packet_config.avi_info.pb_byte[6] = 0x00; 
+    s_ANX7150_packet_config.avi_info.pb_byte[7] = 0x00; 
+    s_ANX7150_packet_config.avi_info.pb_byte[8] = 0x00; 
+    s_ANX7150_packet_config.avi_info.pb_byte[9] = 0x00; 
+    s_ANX7150_packet_config.avi_info.pb_byte[10] = 0x00; 
+    s_ANX7150_packet_config.avi_info.pb_byte[11] = 0x00; 
+    s_ANX7150_packet_config.avi_info.pb_byte[12] = 0x00; 
+    s_ANX7150_packet_config.avi_info.pb_byte[13] = 0x00; 
+
+    // audio infoframe
+    s_ANX7150_packet_config.audio_info.type = 0x84;
+    s_ANX7150_packet_config.audio_info.version = 0x01;
+    s_ANX7150_packet_config.audio_info.length = 0x0a;
+    s_ANX7150_packet_config.audio_info.pb_byte[1] = 0x00;  //zy 061123 for ATC
+    s_ANX7150_packet_config.audio_info.pb_byte[2] = 0x00;
+    s_ANX7150_packet_config.audio_info.pb_byte[3] = 0x00;
+    s_ANX7150_packet_config.audio_info.pb_byte[4] = 0x00;
+    s_ANX7150_packet_config.audio_info.pb_byte[5] = 0x00;
+    s_ANX7150_packet_config.audio_info.pb_byte[6] = 0x00;
+    s_ANX7150_packet_config.audio_info.pb_byte[7] = 0x00;
+    s_ANX7150_packet_config.audio_info.pb_byte[8] = 0x00;
+    s_ANX7150_packet_config.audio_info.pb_byte[9] = 0x00;
+    s_ANX7150_packet_config.audio_info.pb_byte[10] = 0x00;
+
+    ANX7150_Reset_AVI(); 
+	ANX7150_INT_Done = 0;
+    ANX7150_DEBUG("---ANX7150_Variable_Initial---\n");  
+}
+
+void ANX7150_HW_Interface_Variable_Initial()
+{
+    BYTE c;
+    ANX7150_DEBUG("+++ANX7150_HW_Interface_Variable_Initial+++\n");
+
+		if (!BIST_EN ) //no bist
+		{
+			if(QFN48_EN)
+			{
+/*
+				c = P2_5;
+				c = (c<<1) | P2_6;
+				debug_printf("QFN48: video interface###c= %.2x\n", (unsigned int)c);
+
+				switch (c)
+				{
+					case 0:
+						ANX7150_video_format_config = 0x03;//yc mux, 601, 15-8,3-0
+						//HDMI_RX_VID_Output_Fmt(YCbCr422_YCMUX); //yc mux 601
+						break;
+					case 1:
+						ANX7150_video_format_config = 0x05;//yc mux, 656, 15-8,3-0
+						//HDMI_RX_VID_Output_Fmt(YCbCr422_656_YCMUX); //yc mux 656
+						break;
+					case 2:
+						ANX7150_video_format_config = 0x07;//DDR yc422, 601, 
+						break;
+					case 3:
+						ANX7150_video_format_config = 0x08;//DDR yc422, 656, 
+						break;
+		      			default: 
+				                break;	
+
+				}
+*/							
+				    ANX7150_RGBorYCbCr = 0x01;
+			}
+			else
+			{
+			    ANX7150_DEBUG("TQFP80/GBA81: video interface\n");
+			    ANX7150_video_format_config = 0x00;	
+			    ANX7150_RGBorYCbCr = 0x00;
+			}
+		}
+
+//		if (!BIST_EN ) //no bist
+//		{
+//			{
+//				ANX7150_DEBUG("TQFP80/GBA81: video interface\n");
+//			    ANX7150_video_format_config = 0x00;	
+//			    ANX7150_RGBorYCbCr = 0x00;
+//			}
+//		}
+
+//    ANX7150_RGBorYCbCr = ANX7150_INPUT_COLORSPACE;
+    ANX7150_ddr_edge = ANX7150_IDCK_EDGE_DDR;
+
+    c = 0;
+    c = (ANX7150_I2S_CH0_ENABLE << 2) | (ANX7150_I2S_CH1_ENABLE << 3) |
+        (ANX7150_I2S_CH2_ENABLE << 4) | (ANX7150_I2S_CH3_ENABLE << 5);
+    s_ANX7150_audio_config.audio_type = ANX7150_AUD_HW_INTERFACE;     // input I2S
+    s_ANX7150_audio_config.down_sample = 0x00;
+    s_ANX7150_audio_config.i2s_config.audio_channel = c;//0x04;
+    s_ANX7150_audio_config.i2s_config.Channel_status1 =0x00;
+    s_ANX7150_audio_config.i2s_config.Channel_status1 = 0x00;
+    s_ANX7150_audio_config.i2s_config.Channel_status2 = 0x00;
+    s_ANX7150_audio_config.i2s_config.Channel_status3 = 0x00;
+    s_ANX7150_audio_config.i2s_config.Channel_status4 = 0x00;//0x02;//48k
+    s_ANX7150_audio_config.i2s_config.Channel_status5 = ANX7150_I2S_WORD_LENGTH;//0x0b;
+	s_ANX7150_audio_config.audio_layout = 0x00;
+
+    c = (ANX7150_I2S_SHIFT_CTRL << 3) | (ANX7150_I2S_DIR_CTRL << 2)  |
+          (ANX7150_I2S_WS_POL << 1) | ANX7150_I2S_JUST_CTRL;  
+    s_ANX7150_audio_config.i2s_config.i2s_format = c;//0x00;
+
+    FREQ_MCLK = ANX7150_MCLK_Fs_RELATION;//set the relation of MCLK and WS 
+    ANX7150_audio_clock_edge = ANX7150_AUD_CLK_EDGE;
+
+    ANX7150_DEBUG("---ANX7150_HW_Interface_Variable_Initial---\n");	
+}
+
+void ANX7150_Hotplug_Change_Interrupt(void) 
+{
+    BYTE c;
+    ANX7150_i2c_read_p0_reg(ANX7150_SYS_STATE_REG, &c);
+    if (c & ANX7150_SYS_STATE_HP) 
+    {
+        ANX7150_DEBUG("##ANX7150 HotPlug detected.\n");
+        //disable audio & video & hdcp & TMDS and init    begin
+        ANX7150_i2c_read_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, &c);
+        ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, c & (~ANX7150_HDMI_AUDCTRL1_IN_EN));
+
+        ANX7150_i2c_read_p0_reg(ANX7150_VID_CTRL_REG, &c);
+        ANX7150_i2c_write_p0_reg(ANX7150_VID_CTRL_REG, c & (~ANX7150_VID_CTRL_IN_EN));
+
+
+
+        ANX7150_DEBUG("ANX7150_Hotplug_Change_Interrupt--->&&&&&& 0xef\n");
+        ANX7150_i2c_read_p0_reg(ANX7150_TMDS_CLKCH_CONFIG_REG, &c);
+        ANX7150_DEBUG("ANX7150_Hotplug_Change_Interrupt--->ANX7150_TMDS_CLKCH_CONFIG_REG=%x\n",c);
+        ANX7150_i2c_write_p0_reg(ANX7150_TMDS_CLKCH_CONFIG_REG, c & (~ANX7150_TMDS_CLKCH_MUTE));
+
+        ANX7150_i2c_read_p0_reg(ANX7150_HDCP_CTRL0_REG, &c);
+        ANX7150_i2c_write_p0_reg(ANX7150_HDCP_CTRL0_REG, (c & (~ANX7150_HDCP_CTRL0_HW_AUTHEN)));
+
+        ANX7150_Variable_Initial();
+        //disable video & audio & hdcp & TMDS and init    end
+
+        ANX7150_Set_System_State(ANX7150_READ_PARSE_EDID);//060819
+        //Power on chip and select DVI mode
+        ANX7150_i2c_read_p0_reg(ANX7150_SYS_CTRL1_REG, &c);
+        ANX7150_i2c_write_p0_reg(ANX7150_SYS_CTRL1_REG, c | 0x01); 
+        ANX7150_i2c_read_p0_reg(ANX7150_SYS_CTRL1_REG, &c);
+        ANX7150_i2c_write_p0_reg(ANX7150_SYS_CTRL1_REG, c & 0xfd); 
+        //ANX7150_DEBUG("ANX7150 is set to DVI mode\n");
+        ANX7150_RST_DDCChannel();      
+#if 1
+		 //Initial Interrupt 
+	    // disable video/audio CLK,Format change and before config video. 060713 xy
+	    ANX7150_i2c_write_p0_reg(ANX7150_INTR1_MASK_REG, 0x04);//3
+	    ANX7150_i2c_write_p0_reg(ANX7150_INTR2_MASK_REG, 0x00);
+	    ANX7150_i2c_write_p0_reg(ANX7150_INTR3_MASK_REG, 0x00);
+
+		ANX7150_i2c_read_p0_reg(ANX7150_INTR1_STATUS_REG, &c);
+		ANX7150_i2c_write_p0_reg(ANX7150_INTR1_STATUS_REG, c);
+
+		ANX7150_i2c_read_p0_reg(ANX7150_INTR2_STATUS_REG, &c);
+		ANX7150_i2c_write_p0_reg(ANX7150_INTR2_STATUS_REG, c);
+
+		ANX7150_i2c_read_p0_reg(ANX7150_INTR3_STATUS_REG, &c);
+		ANX7150_i2c_write_p0_reg(ANX7150_INTR3_STATUS_REG, c);
+
+		ANX7150_i2c_write_p0_reg(ANX7150_INTR_CTRL_REG, 0x09);
+
+		if(EXT_INT_EN)
+		{
+	        ANX7150_DEBUG("enable ext int");
+			 EX0 = 1;
+		}
+#endif		 
+    }  
+    else 
+    { 
+    	 //ANX7150_DEBUG("disable ext int");
+        //EX0 = 0;
+//HDCP CTS
+    	 ANX7150_Variable_Initial();   
+    	 ANX7150_HW_Interface_Variable_Initial();  
+    	 ANX7150_Hardware_Initial();   
+    	 ANX7150_i2c_write_p0_reg(ANX7150_HDCP_CTRL0_REG, 0x00);   
+//HDCP CTS
+        ANX7150_hdcp_wait_100ms_needed = 1;
+        ANX7150_auth_fully_pass = 0;
+		 #if 0//#if ANX8770_USED
+		 HDMI_RX_ReadI2C_RX0(HDMI_RX_SYS_PWDN2_REG, &c);	//dis output of 8770,090630
+	    HDMI_RX_WriteI2C_RX0(HDMI_RX_SYS_PWDN2_REG, c | 0x07);
+		#endif
+    }
+    // clear ANX7150_parse_edid_done & ANX7150_system_config_done
+    ANX7150_parse_edid_done = 0;
+    ANX7150_system_config_done = 0;
+    ANX7150_srm_checked = 0;
+}
+
+
+/*
+void ANX7150_Video_Clock_Change_Interrupt(void) 
+{
+    BYTE c;
+    if((ANX7150_system_state != ANX7150_INITIAL) && (ANX7150_system_state != ANX7150_WAIT_HOTPLUG)
+     &&  (ANX7150_system_state != ANX7150_READ_PARSE_EDID)
+     &&  (ANX7150_system_state != ANX7150_WAIT_RX_SENSE)) 
+    {
+         ANX7150_Set_AVMute(); 
+         //stop HDCP and reset DDC
+         ANX7150_i2c_read_p0_reg(ANX7150_HDCP_CTRL0_REG, &c);
+         ANX7150_i2c_write_p0_reg(ANX7150_HDCP_CTRL0_REG, (c & (~ANX7150_HDCP_CTRL0_HW_AUTHEN)));
+         ANX7150_RST_DDCChannel(); 
+         ANX7150_DEBUG("after video clock change int ");
+         ANX7150_Set_System_State(ANX7150_CONFIG_VIDEO);
+    }
+    //when clock change, clear this reg to avoid error in package config
+    ANX7150_i2c_write_p1_reg(ANX7150_INFO_PKTCTRL1_REG, 0x00);
+    ANX7150_i2c_write_p1_reg(ANX7150_INFO_PKTCTRL2_REG, 0x00);
+    //xy 11.06 when clock change, need system config again
+    ANX7150_system_config_done = 0;
+}
+*/
+
+void ANX7150_Video_Format_Change_Interrupt(void) 
+{
+    BYTE c;
+    if((ANX7150_system_state != ANX7150_INITIAL) 
+     && (ANX7150_system_state != ANX7150_WAIT_HOTPLUG)
+     &&  (ANX7150_system_state != ANX7150_READ_PARSE_EDID)
+     && (ANX7150_system_state != ANX7150_WAIT_RX_SENSE)) 
+    {
+        ANX7150_DEBUG("after video format change int ");
+        ANX7150_Set_AVMute();
+         //stop HDCP and reset DDC
+        ANX7150_i2c_read_p0_reg(ANX7150_HDCP_CTRL0_REG, &c);
+        ANX7150_i2c_write_p0_reg(ANX7150_HDCP_CTRL0_REG, (c & (~ANX7150_HDCP_CTRL0_HW_AUTHEN)));
+        ANX7150_RST_DDCChannel(); 
+        ANX7150_Set_System_State(ANX7150_CONFIG_VIDEO);
+    } 
+    //when format change, clear this reg to avoid error in package config
+    ANX7150_i2c_write_p1_reg(ANX7150_INFO_PKTCTRL1_REG, 0x00);
+    ANX7150_i2c_write_p1_reg(ANX7150_INFO_PKTCTRL2_REG, 0x00);
+    //xy 11.06 when format change, need system config again
+    ANX7150_system_config_done = 0;
+}
+
+/*
+void ANX7150_Audio_CLK_Change_Interrupt(void) 
+{
+
+    BYTE c;
+    if((ANX7150_system_state != ANX7150_INITIAL) 
+        && (ANX7150_system_state != ANX7150_WAIT_HOTPLUG) 
+        && (ANX7150_system_state != ANX7150_READ_PARSE_EDID)
+        && (ANX7150_system_state != ANX7150_WAIT_RX_SENSE)
+        && (ANX7150_system_state != ANX7150_CONFIG_VIDEO))
+    {
+        ANX7150_DEBUG("ANX7150: audio clock changed interrupt,disable audio.");
+        // disable audio 
+        ANX7150_i2c_read_p0_reg(ANX7150_HDMI_AUDCTRL1_REG,&c);
+        c &= ~ANX7150_HDMI_AUDCTRL1_IN_EN;
+        ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDCTRL1_REG,c);
+        ANX7150_Set_System_State(ANX7150_CONFIG_AUDIO);
+    }
+    
+    //xy 11.06 when format change, need system config again
+    ANX7150_system_config_done = 0;
+}
+*/
+
+void ANX7150_Set_AVMute(void) 
+{
+    BYTE c;
+
+    ANX7150_i2c_write_p1_reg(ANX7150_GNRL_CTRL_PKT_REG, 0x01);
+    ANX7150_i2c_read_p1_reg(ANX7150_INFO_PKTCTRL1_REG, &c);
+    ANX7150_i2c_write_p1_reg(ANX7150_INFO_PKTCTRL1_REG, (c | 0x0c));
+    ANX7150_avmute_enable = 1;
+    ANX7150_DEBUG("@@@@@@@@@@@@@@@@@@@@ANX7150_Set_AVMute\n");
+
+}
+
+void ANX7150_Clear_AVMute(void) 
+{
+    BYTE c;
+    ANX7150_i2c_write_p1_reg(ANX7150_GNRL_CTRL_PKT_REG, 0x02);
+    ANX7150_i2c_read_p1_reg(ANX7150_INFO_PKTCTRL1_REG, &c);
+    ANX7150_i2c_write_p1_reg(ANX7150_INFO_PKTCTRL1_REG, (c | 0x0c));
+    ANX7150_avmute_enable = 0;
+    ANX7150_DEBUG("@@@@@@@@@@@@@@@@@@@@ANX7150_Clear_AVMute\n");
+
+}
+
+void ANX7150_Auth_Done_Interrupt() 
+{
+    BYTE c;
+    ANX7150_i2c_read_p0_reg(ANX7150_HDCP_STATUS_REG, &c);
+    if(c & ANX7150_HDCP_STATUS_AUTH_PASS) 
+    {
+        ANX7150_DEBUG("ANX7150_Authentication pass in Auth_Done\n");
+        ANX7150_Blue_Screen_Disable();
+        ANX7150_hdcp_auth_pass = 1;
+        ANX7150_hdcp_auth_fail_counter = 0;
+    } 
+    else 
+    {
+        ANX7150_DEBUG("ANX7150_Authentication failed\n");
+        ANX7150_hdcp_wait_100ms_needed = 1;
+        ANX7150_auth_fully_pass = 0;
+        ANX7150_hdcp_auth_pass = 0;
+        ANX7150_hdcp_auth_fail_counter ++;
+        if(ANX7150_hdcp_auth_fail_counter >= ANX7150_HDCP_FAIL_THRESHOLD) 
+        {
+            ANX7150_hdcp_auth_fail_counter = 0;
+            //ANX7150_bksv_ready = 0;
+            // TODO: Reset link; 
+            ANX7150_Blue_Screen_Enable();
+            ANX7150_HDCP_Encryption_Disable();
+            //disable audio
+            ANX7150_i2c_read_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, &c);
+            ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, c & (~ANX7150_HDMI_AUDCTRL1_IN_EN));
+        }
+    }
+}
+
+void ANX7150_Auth_Change_Interrupt() 
+{
+    BYTE c;
+    ANX7150_i2c_read_p0_reg(ANX7150_HDCP_STATUS_REG, &c);
+    if(c & ANX7150_HDCP_STATUS_AUTH_PASS) 
+    {
+        ANX7150_hdcp_auth_pass = 1;
+        ANX7150_DEBUG("ANX7150_Authentication pass in Auth_Change************************\n");
+    } 
+    else 
+    {
+			ANX7150_Set_AVMute();
+         ANX7150_DEBUG("ANX7150_Authentication failed_by_Auth_change\n");
+         ANX7150_hdcp_auth_pass = 0;
+         ANX7150_hdcp_wait_100ms_needed = 1;
+         ANX7150_auth_fully_pass = 0;
+		  ANX7150_hdcp_init_done=0;
+         ANX7150_hdcp_auth_en=0;
+         ANX7150_HDCP_Encryption_Disable();
+         if(ANX7150_system_state == ANX7150_PLAY_BACK) 
+         {
+             	ANX7150_auth_fully_pass = 0;
+             	ANX7150_Set_System_State(ANX7150_HDCP_AUTHENTICATION);//ANX7150_CONFIG_VIDEO);	//updated for Changhong TV;
+             	//disable audio
+            	ANX7150_i2c_read_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, &c);
+            	ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, c & (~ANX7150_HDMI_AUDCTRL1_IN_EN));
+				ANX7150_Clean_HDCP();							//updated for Changhong TV
+	    }
+      }
+}
+
+
+void ANX7150_AFIFO_Overrun_Interrupt(void)
+{
+    BYTE c;
+    
+    if(ANX7150_system_state != ANX7150_INITIAL 
+        && ANX7150_system_state != ANX7150_WAIT_HOTPLUG 
+        && ANX7150_system_state != ANX7150_READ_PARSE_EDID
+        && ANX7150_system_state != ANX7150_WAIT_RX_SENSE
+        && ANX7150_system_state != ANX7150_CONFIG_VIDEO)
+    {
+        ANX7150_DEBUG("ANX7150: AFIFO overrun interrupt,disable audio.\n");
+        // disable audio 
+        ANX7150_i2c_read_p0_reg(ANX7150_HDMI_AUDCTRL1_REG,&c);
+        c &= ~ANX7150_HDMI_AUDCTRL1_IN_EN;
+        ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDCTRL1_REG,c);
+        ANX7150_Set_System_State(ANX7150_CONFIG_AUDIO);
+    }
+}
+/*
+void ANX7150_PllLock_Interrupt()
+{
+    BYTE c;
+
+    if((ANX7150_system_state != ANX7150_INITIAL) 
+        && (ANX7150_system_state != ANX7150_WAIT_HOTPLUG) 
+        && (ANX7150_system_state != ANX7150_READ_PARSE_EDID)
+        && (ANX7150_system_state != ANX7150_WAIT_RX_SENSE))
+    {
+        ANX7150_Set_AVMute();
+        ANX7150_DEBUG("ANX7150: PLL unlock interrupt,disable audio.\n");
+        // disable audio & video
+        ANX7150_i2c_read_p0_reg(ANX7150_HDMI_AUDCTRL1_REG,&c);
+        c &= ~ANX7150_HDMI_AUDCTRL1_IN_EN;
+        ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDCTRL1_REG,c);
+
+        ANX7150_i2c_read_p0_reg(ANX7150_VID_CTRL_REG,&c);
+        c &= ~ANX7150_VID_CTRL_IN_EN;
+        ANX7150_i2c_write_p0_reg(ANX7150_VID_CTRL_REG,c);
+        ANX7150_Set_System_State(ANX7150_CONFIG_VIDEO);
+    }
+    //when pll change, clear this reg to avoid error in package config
+    ANX7150_i2c_write_p1_reg(ANX7150_INFO_PKTCTRL1_REG, 0x00);
+    ANX7150_i2c_write_p1_reg(ANX7150_INFO_PKTCTRL2_REG, 0x00);
+
+		    
+		    ANX7150_system_config_done = 0;//
+
+}
+*/
+void ANX7150_PllLock_Interrupt()
+{
+    BYTE c;
+
+    if((ANX7150_system_state != ANX7150_INITIAL) 
+        && (ANX7150_system_state != ANX7150_WAIT_HOTPLUG) 
+        && (ANX7150_system_state != ANX7150_READ_PARSE_EDID)
+        && (ANX7150_system_state != ANX7150_WAIT_RX_SENSE))
+    {
+        ANX7150_i2c_read_p0_reg(ANX7150_CHIP_STATUS_REG,&c);
+
+    	if (!(c & ANX7150_CHIP_STATUS_PLL_LOCK))
+		{
+			ANX7150_Set_AVMute();
+			ANX7150_DEBUG("ANX7150: PLL unlock interrupt,disable audio.");
+			// disable audio & video
+			ANX7150_i2c_read_p0_reg(ANX7150_HDMI_AUDCTRL1_REG,&c);
+			c &= ~ANX7150_HDMI_AUDCTRL1_IN_EN;
+			ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDCTRL1_REG,c);
+
+			ANX7150_i2c_read_p0_reg(ANX7150_VID_CTRL_REG,&c);
+			c &= ~ANX7150_VID_CTRL_IN_EN;
+			ANX7150_i2c_write_p0_reg(ANX7150_VID_CTRL_REG,c);
+			ANX7150_Set_System_State(ANX7150_CONFIG_VIDEO);
+
+	    //when pll change, clear this reg to avoid error in package config
+			ANX7150_i2c_write_p1_reg(ANX7150_INFO_PKTCTRL1_REG, 0x00);
+    		ANX7150_i2c_write_p1_reg(ANX7150_INFO_PKTCTRL2_REG, 0x00);
+		    ANX7150_system_config_done = 0;
+
+			}
+    }
+    
+
+}
+
+void ANX7150_SPDIF_Error_Interrupt(BYTE int1, BYTE int3)
+{
+    if((ANX7150_system_state == ANX7150_CONFIG_AUDIO
+        || ANX7150_system_state == ANX7150_CONFIG_PACKETS
+        || ANX7150_system_state == ANX7150_HDCP_AUTHENTICATION
+        || ANX7150_system_state == ANX7150_PLAY_BACK ) 
+        && (int3 & 0x81)) 
+    {
+        ANX7150_DEBUG("SPDIF BI Phase or Unstable error.\n");
+        spdif_error_cnt += 0x03; 
+    }
+    if((ANX7150_system_state == ANX7150_CONFIG_AUDIO
+        || ANX7150_system_state == ANX7150_CONFIG_PACKETS
+        || ANX7150_system_state == ANX7150_HDCP_AUTHENTICATION
+        || ANX7150_system_state == ANX7150_PLAY_BACK ) 
+        && (int1 & ANX7150_INTR1_STATUS_SPDIF_ERR))
+    {
+        ANX7150_DEBUG("SPDIF Parity error.\n");
+        spdif_error_cnt += 0x01; 
+    }
+    // adjust spdif phase
+    if(spdif_error_cnt >= spdif_error_th)
+    {
+        BYTE freq_mclk,c1,c;
+        spdif_error_cnt = 0x00;
+        ANX7150_DEBUG("adjust mclk phase!\n");
+        ANX7150_i2c_read_p0_reg(ANX7150_HDMI_AUDCTRL0_REG, &c);
+        ANX7150_i2c_read_p0_reg(ANX7150_I2S_CTRL_REG, &c1);
+
+        freq_mclk = c & 0x07; 
+        switch(freq_mclk)
+        {
+            case ANX7150_mclk_128_Fs:   //invert 0x50[3]
+                ANX7150_DEBUG("adjust mclk phase when 128*Fs!\n");
+                if( c & 0x08 )    c &= 0xf7;
+                else   c |= 0x08;
+                ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDCTRL0_REG, c);
+                break;
+                
+            case ANX7150_mclk_256_Fs:
+            case ANX7150_mclk_384_Fs:
+                ANX7150_DEBUG("adjust mclk phase when 256*Fs or 384*Fs!\n");
+                if( c1 & 0x60 )   c1 &= 0x9f;
+                else     c1 |= 0x20;
+                ANX7150_i2c_write_p0_reg(ANX7150_I2S_CTRL_REG, c1);
+                break;
+
+            case ANX7150_mclk_512_Fs:
+                ANX7150_DEBUG("adjust mclk phase when 512*Fs!\n");
+                if( c1 & 0x60 )   c1 &= 0x9f;
+                else    c1 |= 0x40;
+                ANX7150_i2c_write_p0_reg(ANX7150_I2S_CTRL_REG, c1);
+                break;
+            default:
+                break;
+
+        }     
+    }
+  }
+
+void ANX7150_Rx_Sense_Interrupt(void)
+{
+    BYTE c;
+
+    ANX7150_i2c_read_p0_reg(ANX7150_SYS_STATE_REG,&c);
+    ANX7150_DEBUG("ANX7150_Rx_Sense_Interrupt, ANX7150_SYS_STATE_REG = %.2x\n", (unsigned int)c);
+
+    if( c & ANX7150_SYS_STATE_RSV_DET)
+    {
+         //xy 11.06 Power on chip
+        ANX7150_i2c_read_p0_reg(ANX7150_SYS_CTRL1_REG, &c);
+        ANX7150_i2c_write_p0_reg(ANX7150_SYS_CTRL1_REG, c | 0x01);
+	s_ANX7150_packet_config.packets_need_config = 0x03;   //new avi infoframe
+    }
+    else
+    {
+        // Rx is not active
+        if((ANX7150_system_state != ANX7150_INITIAL) 
+            && (ANX7150_system_state != ANX7150_WAIT_HOTPLUG) 
+            && (ANX7150_system_state != ANX7150_READ_PARSE_EDID))
+        {
+            ANX7150_Set_System_State(ANX7150_WAIT_RX_SENSE);
+            //stop HDCP and reset DDC when lost Rx sense
+            ANX7150_i2c_read_p0_reg(ANX7150_HDCP_CTRL0_REG, &c);
+            ANX7150_i2c_write_p0_reg(ANX7150_HDCP_CTRL0_REG, (c & (~ANX7150_HDCP_CTRL0_HW_AUTHEN)));
+            ANX7150_RST_DDCChannel(); 
+            ANX7150_i2c_read_p0_reg(ANX7150_SYS_CTRL1_REG, &c);
+            ANX7150_i2c_write_p0_reg(ANX7150_SYS_CTRL1_REG, c & 0xfd);
+            // mute TMDS link
+            ANX7150_DEBUG("ANX7150_Rx_Sense_Interrupt--->&&&&&&&&0xef\n");
+            ANX7150_i2c_read_p0_reg(ANX7150_TMDS_CLKCH_CONFIG_REG, &c);
+	    ANX7150_DEBUG("ANX7150_Rx_Sense_Interrupt=%x\n",c);
+            ANX7150_i2c_write_p0_reg(ANX7150_TMDS_CLKCH_CONFIG_REG, c & (~ANX7150_TMDS_CLKCH_MUTE));
+        }
+        //Power down chip
+        ANX7150_i2c_read_p0_reg(ANX7150_SYS_CTRL1_REG, &c);
+        ANX7150_i2c_write_p0_reg(ANX7150_SYS_CTRL1_REG, c & 0xfe);
+    }
+	 //xy 11.06 when format change, need system config again
+    ANX7150_system_config_done = 0;
+}
+
+void ANX7150_HDCPLINK_CHK_Interrupt(void)
+{
+			BYTE c,c1, ri0,ri1;
+		    //ANX7150_InitDDC_Read(0x74, segmentpointer, offset, 0x01, 0x00);
+			//Write slave device address
+			ANX7150_i2c_write_p0_reg(ANX7150_DDC_SLV_ADDR_REG, 0x74);
+			// Write segment address
+			//ANX7150_i2c_write_p0_reg(ANX7150_DDC_SLV_SEGADDR_REG, segmentpointer);
+			//Write offset
+			ANX7150_i2c_write_p0_reg(ANX7150_DDC_SLV_OFFADDR_REG, 0x08);
+			//Write number for access
+			ANX7150_i2c_write_p0_reg(ANX7150_DDC_ACCNUM0_REG, 0x02);
+			ANX7150_i2c_write_p0_reg(ANX7150_DDC_ACCNUM1_REG, 0x00);
+			//Clear FIFO
+			ANX7150_i2c_write_p0_reg(ANX7150_DDC_ACC_CMD_REG, 0x05);
+			//EDDC sequential Read
+			ANX7150_i2c_write_p0_reg(ANX7150_DDC_ACC_CMD_REG, 0x01);
+
+			msleep(1);
+
+	        ANX7150_i2c_read_p0_reg(ANX7150_DDC_FIFO_ACC_REG, &ri0);      
+	        ANX7150_i2c_read_p0_reg(ANX7150_DDC_FIFO_ACC_REG, &ri1);      
+
+			
+			ANX7150_i2c_read_p0_reg(ANX7150_HDCP_RI1_REG, &c);
+			ANX7150_i2c_read_p0_reg(ANX7150_HDCP_RI2_REG, &c1);
+			//ANX7150_DEBUG("DDC read Ri0= %.2x\n", (unsigned int)ri0);
+			//ANX7150_DEBUG("DDC read Ri1= %.2x\n", (unsigned int)ri1);
+			//ANX7150_DEBUG("###ANX7150 Ri0= %.2x\n", (unsigned int)c);
+			//ANX7150_DEBUG("###ANX7150 Ri1= %.2x\n", (unsigned int)c1);
+			if ((ri0 != c) || (ri1 != c1))
+			{
+					ANX7150_DEBUG("Ri check error!!!!!!!\n");
+
+					ANX7150_hdcp_auth_fail_counter ++;
+			        if(ANX7150_hdcp_auth_fail_counter >= ANX7150_HDCP_FAIL_THRESHOLD) 
+			        {					
+								ANX7150_Set_AVMute();
+								ANX7150_DEBUG("ANX7150_Authentication failed_by_Ri check error!\n");
+								ANX7150_hdcp_auth_pass = 0;
+								ANX7150_hdcp_wait_100ms_needed = 1;
+								ANX7150_auth_fully_pass = 0;
+								ANX7150_hdcp_init_done=0;   //HDCP CTS
+								ANX7150_hdcp_auth_en=0;   //HDCP CTS
+								ANX7150_HDCP_Encryption_Disable();
+								ANX7150_hdcp_auth_fail_counter = 0;
+								if(ANX7150_system_state == ANX7150_PLAY_BACK) 
+								{
+								   	ANX7150_auth_fully_pass = 0;
+								   	ANX7150_Set_System_State(ANX7150_HDCP_AUTHENTICATION);//ANX7150_CONFIG_VIDEO);	//updated for Changhong TV;
+								   	//disable audio
+								  	ANX7150_i2c_read_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, &c);
+								  	ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, c & (~ANX7150_HDMI_AUDCTRL1_IN_EN));
+									ANX7150_Clean_HDCP();//updated for Changhong TV
+								}
+			        	}
+			}
+
+}
+
+
+void ANX7150_Blue_Screen_Format_Config(void) 
+{
+    // TODO:Add ITU 601 format.(Now only ITU 709 format added)
+    switch (ANX7150_RGBorYCbCr) 
+    {
+        case ANX7150_RGB: //select RGB mode
+	    ANX7150_DEBUG("##ANX7150_Blue_Screen_Format_Config..ANX7150_RGB\n");
+            ANX7150_i2c_write_p0_reg(ANX7150_HDCP_BLUESCREEN0_REG, 0x10);
+            ANX7150_i2c_write_p0_reg(ANX7150_HDCP_BLUESCREEN1_REG, 0xeb);
+            ANX7150_i2c_write_p0_reg(ANX7150_HDCP_BLUESCREEN2_REG, 0x10);
+            break;
+        case ANX7150_YCbCr422: //select YCbCr4:2:2 mode
+	    ANX7150_DEBUG("##ANX7150_Blue_Screen_Format_Config..ANX7150_YCbCr422\n");
+            ANX7150_i2c_write_p0_reg(ANX7150_HDCP_BLUESCREEN0_REG, 0x00);
+            ANX7150_i2c_write_p0_reg(ANX7150_HDCP_BLUESCREEN1_REG, 0xad);
+            ANX7150_i2c_write_p0_reg(ANX7150_HDCP_BLUESCREEN2_REG, 0x2a);
+            break;
+        case ANX7150_YCbCr444: //select YCbCr4:4:4 mode
+	    ANX7150_DEBUG("##ANX7150_Blue_Screen_Format_Config..ANX7150_YCbCr444\n");
+            ANX7150_i2c_write_p0_reg(ANX7150_HDCP_BLUESCREEN0_REG, 0x1a);
+            ANX7150_i2c_write_p0_reg(ANX7150_HDCP_BLUESCREEN1_REG, 0xad);
+            ANX7150_i2c_write_p0_reg(ANX7150_HDCP_BLUESCREEN2_REG, 0x2a);
+            break;
+        default: 
+            break;
+    }
+}
+
+void ANX7150_Blue_Screen_Enable(void) 
+{
+    BYTE c;
+    ANX7150_i2c_read_p0_reg(ANX7150_HDCP_CTRL1_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_HDCP_CTRL1_REG,  c | ANX7150_HDCP_CTRL1_BLUE_SCREEN_EN);
+    ANX7150_send_blue_screen = 1;
+}    
+
+void ANX7150_Blue_Screen_Disable(void) 
+{
+    BYTE c;
+    ANX7150_i2c_read_p0_reg(ANX7150_HDCP_CTRL1_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_HDCP_CTRL1_REG,  (c & 0xfb));
+    ANX7150_send_blue_screen = 0;
+}
+
+void ANX7150_HDCP_Encryption_Enable(void) 
+{
+    BYTE c;
+    ANX7150_i2c_read_p0_reg(ANX7150_HDCP_CTRL0_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_HDCP_CTRL0_REG, (c | ANX7150_HDCP_CTRL0_ENC_EN));
+    ANX7150_hdcp_encryption = 1;
+}    
+
+void ANX7150_HDCP_Encryption_Disable(void) 
+{
+    BYTE c;
+    ANX7150_i2c_read_p0_reg(ANX7150_HDCP_CTRL0_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_HDCP_CTRL0_REG, (c & 0xfb));
+    ANX7150_hdcp_encryption = 0;
+}    
+
+
+//******************************Video Config***************************************
+void ANX7150_Config_Video()
+{
+    BYTE c,TX_is_HDMI;
+    BIT cspace_y2r, y2r_sel, up_sample,range_y2r;
+
+    cspace_y2r = 0;
+    y2r_sel = 0;
+    up_sample = 0;
+    range_y2r = 0;
+
+	if (QFN48_EN)
+		ANX7150_RGBorYCbCr = 0x01;						//YCbCr 422
+	else
+		ANX7150_RGBorYCbCr = 0x00;						//RGB
+	//ANX7150_RGBorYCbCr = ANX7150_INPUT_COLORSPACE;						//update
+	ANX7150_i2c_write_p0_reg(ANX7150_VID_MODE_REG, 0x00);			//update
+
+	ANX7150_i2c_read_p0_reg(ANX7150_VID_CTRL_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_VID_CTRL_REG, c & (~ANX7150_VID_CTRL_BITCTRL_EN));
+	
+    if(!ANX7150_system_config_done)
+    {
+        ANX7150_DEBUG("System has not finished config!\n");
+        return;
+    }
+
+    ANX7150_i2c_read_p0_reg(ANX7150_SYS_STATE_REG, &c);
+    if(!(c & 0x02))
+    {
+        ANX7150_DEBUG("No clock detected !\n");
+        //ANX7150_i2c_write_p0_reg(ANX7150_SYS_CTRL2_REG, 0x02);
+        return;
+    }
+
+    ANX7150_Clean_HDCP();
+    
+    //color space issue
+    switch(ANX7150_video_timing_id)
+    {
+        case ANX7150_V1280x720p_50Hz:
+        case ANX7150_V1280x720p_60Hz:
+        case ANX7150_V1920x1080i_60Hz:
+        case ANX7150_V1920x1080i_50Hz: 
+        case ANX7150_V1920x1080p_60Hz:
+        case ANX7150_V1920x1080p_50Hz:
+           y2r_sel = ANX7150_CSC_BT709; 
+           break;
+        default:
+           y2r_sel = ANX7150_CSC_BT601; 
+           break;
+    }
+    //rang[0~255]/[16~235] select
+    if(ANX7150_video_timing_id == ANX7150_V640x480p_60Hz)
+        range_y2r = 1;//rang[0~255]
+    else
+        range_y2r = 0;//rang[16~235]
+    if((ANX7150_RGBorYCbCr == ANX7150_YCbCr422) && (!ANX7150_edid_result.ycbcr422_supported))
+    {
+        up_sample = 1;
+	 if(ANX7150_edid_result.ycbcr444_supported)
+	    cspace_y2r = 0;
+	 else
+	    cspace_y2r = 1;
+    }
+    if((ANX7150_RGBorYCbCr == ANX7150_YCbCr444) && (!ANX7150_edid_result.ycbcr444_supported))
+    {
+        cspace_y2r = 1;
+    }
+    //Config the embeded blue screen format according to output video format.
+    ANX7150_Blue_Screen_Format_Config();
+    
+    ANX7150_Parse_Video_Format();
+
+    if(ANX7150_de_gen_en)
+    {
+        ANX7150_DEBUG("ANX7150_de_gen_en!\n");
+        ANX7150_DE_Generator();
+    }
+    else
+    {
+        ANX7150_i2c_read_p0_reg(ANX7150_VID_CAPCTRL0_REG, &c);
+        ANX7150_i2c_write_p0_reg(ANX7150_VID_CAPCTRL0_REG, c & (~ANX7150_VID_CAPCTRL0_DEGEN_EN));
+    }
+    if(ANX7150_emb_sync_mode)
+    {
+        ANX7150_DEBUG("ANX7150_Embed_Sync_Decode!\n");
+        ANX7150_Embed_Sync_Decode();
+		if (ANX7150_ddr_bus_mode) //for DDR embeded sync
+		{
+			ANX7150_i2c_read_p0_reg(ANX7150_SYS_CTRL4_REG, &c);
+        	ANX7150_i2c_write_p0_reg(ANX7150_SYS_CTRL4_REG, c | 0x04);
+		}
+		else
+		{
+			ANX7150_i2c_read_p0_reg(ANX7150_SYS_CTRL4_REG, &c);
+        	ANX7150_i2c_write_p0_reg(ANX7150_SYS_CTRL4_REG, c & 0xfb);
+		}
+    }
+    else
+    {
+        ANX7150_i2c_read_p0_reg(ANX7150_VID_CAPCTRL0_REG, &c);
+        ANX7150_i2c_write_p0_reg(ANX7150_VID_CAPCTRL0_REG, c & (~ANX7150_VID_CAPCTRL0_EMSYNC_EN));
+    }
+    if(ANX7150_demux_yc_en)
+    {
+        ANX7150_DEBUG("ANX7150_demux_yc_en!\n");
+        ANX7150_i2c_read_p0_reg(ANX7150_VID_CAPCTRL0_REG, &c);
+        ANX7150_i2c_write_p0_reg(ANX7150_VID_CAPCTRL0_REG, c | ANX7150_VID_CAPCTRL0_DEMUX_EN);
+        if(ANX7150_ycmux_BIT_sel)
+        {
+            ANX7150_i2c_read_p0_reg(ANX7150_VID_CTRL_REG, &c);
+            ANX7150_i2c_write_p0_reg(ANX7150_VID_CTRL_REG, c | ANX7150_VID_CTRL_YCBIT_SEL);//bit mapping for yc mux, D13-8,1-0 -->D11-4
+			  ANX7150_DEBUG("ANX7150_demux_yc_en!####D11-4\n");
+
+            ANX7150_i2c_read_p0_reg(ANX7150_VID_CTRL_REG, &c);
+            ANX7150_i2c_write_p0_reg(ANX7150_VID_CTRL_REG, c | ANX7150_VID_CTRL_BITCTRL_EN);
+
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL11,  0x0d);
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL10,  0x0c);
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL9,  0x0b);
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL8,  0x0a);
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL7,  0x09);
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL6,  0x08);
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL5,  0x01);
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL4,  0x00);		
+								
+						//
+         }
+         else
+         {
+	            ANX7150_i2c_read_p0_reg(ANX7150_VID_CTRL_REG, &c);
+	            ANX7150_i2c_write_p0_reg(ANX7150_VID_CTRL_REG, c & (~ANX7150_VID_CTRL_YCBIT_SEL));//bit mapping for yc mux, D13-8,1-0 -->D15-8, 
+				 ANX7150_DEBUG("ANX7150_demux_yc_en!####D15-8");
+
+				ANX7150_i2c_read_p0_reg(ANX7150_VID_CTRL_REG, &c);
+            	ANX7150_i2c_write_p0_reg(ANX7150_VID_CTRL_REG, c | ANX7150_VID_CTRL_BITCTRL_EN);					
+
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL15, 0x0d);
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL14, 0x0c);
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL13,  0x0b);
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL12, 0x0a);
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL11, 0x09);
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL10, 0x08);
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL9, 0x01);
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL8, 0x00);	
+						//
+
+			}
+     }
+    else
+    {
+        ANX7150_i2c_read_p0_reg(ANX7150_VID_CAPCTRL0_REG, &c);
+        ANX7150_i2c_write_p0_reg(ANX7150_VID_CAPCTRL0_REG, c & (~ANX7150_VID_CAPCTRL0_DEMUX_EN));
+
+		}
+     if(ANX7150_ddr_bus_mode)
+     {
+         ANX7150_DEBUG("ANX7150_ddr_bus_mode!\n");
+         ANX7150_i2c_read_p0_reg(ANX7150_VID_CAPCTRL0_REG, &c);
+         ANX7150_i2c_write_p0_reg(ANX7150_VID_CAPCTRL0_REG, c | ANX7150_VID_CAPCTRL0_DV_BUSMODE);
+
+
+			ANX7150_i2c_read_p0_reg(ANX7150_SYS_CTRL4_REG, &c); //qfn48
+        	ANX7150_i2c_write_p0_reg(ANX7150_SYS_CTRL4_REG, (c & 0xfc) | 0x02);
+			ANX7150_i2c_read_p0_reg(ANX7150_VID_CTRL_REG, &c); //bit map for 
+			ANX7150_i2c_write_p0_reg(ANX7150_VID_CTRL_REG, c |ANX7150_VID_CTRL_YCBIT_SEL);		
+
+				 
+         if(ANX7150_ddr_edge)
+        {
+            ANX7150_i2c_read_p0_reg(ANX7150_VID_CAPCTRL0_REG, &c);
+            ANX7150_i2c_write_p0_reg(ANX7150_VID_CAPCTRL0_REG, c | ANX7150_VID_CAPCTRL0_DDR_EDGE);
+        }  
+		 else
+		 {
+            ANX7150_i2c_read_p0_reg(ANX7150_VID_CAPCTRL0_REG, &c);
+            ANX7150_i2c_write_p0_reg(ANX7150_VID_CAPCTRL0_REG, c & (~ANX7150_VID_CAPCTRL0_DDR_EDGE));
+        }
+
+		//for DDR+seperate maping
+		 if (ANX7150_video_format_config == 0x07)//DDR yc422, 601, 
+		 {
+				ANX7150_DEBUG("ANX7150_DDR_601_Maping!\n");
+
+				ANX7150_i2c_read_p0_reg(ANX7150_VID_CTRL_REG, &c);
+            	ANX7150_i2c_write_p0_reg(ANX7150_VID_CTRL_REG, c | ANX7150_VID_CTRL_BITCTRL_EN);					
+
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL23,  0x0B);
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL22,  0x0A);				
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL21,  0x09);				
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL20,  0x08);
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL19,  0x07);
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL18,  0x06);
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL17,  0x05);
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL16, 0x04);
+
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL15,  0x17);
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL14,  0x16);
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL13,  0x15);
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL12,  0x14);
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL11,  0x13);
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL10,  0x12);
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL9,  0x11);
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL8,  0x10);	
+
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL7,  0x03);
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL6,  0x02);
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL5,  0x01);
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL4,  0x00);
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL3,  0x0F);
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL2,  0x0E);
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL1, 0x0D);
+				ANX7150_i2c_write_p0_reg(VID_BIT_CTRL0,  0x0C);					
+
+		 }
+		 else if (ANX7150_video_format_config == 0x08)//DDR yc422, 656,
+		 {
+				ANX7150_DEBUG("ANX7150_DDR_656_Maping!\n");
+
+				ANX7150_i2c_read_p0_reg(ANX7150_VID_CTRL_REG, &c);
+            	ANX7150_i2c_write_p0_reg(ANX7150_VID_CTRL_REG, c & (~ANX7150_VID_CTRL_BITCTRL_EN));		
+
+		 }
+		 
+     }
+     else
+    {
+         ANX7150_i2c_read_p0_reg(ANX7150_VID_CAPCTRL0_REG, &c);
+         ANX7150_i2c_write_p0_reg(ANX7150_VID_CAPCTRL0_REG, c & (~ANX7150_VID_CAPCTRL0_DV_BUSMODE));
+         ANX7150_i2c_read_p0_reg(ANX7150_VID_CAPCTRL0_REG, &c);
+         ANX7150_i2c_write_p0_reg(ANX7150_VID_CAPCTRL0_REG, c & (~ANX7150_VID_CAPCTRL0_DDR_EDGE));
+		  ANX7150_i2c_read_p0_reg(ANX7150_SYS_CTRL4_REG, &c); //qfn48
+        	ANX7150_i2c_write_p0_reg(ANX7150_SYS_CTRL4_REG, c & 0xfc);
+     }
+
+    if(cspace_y2r)
+    {
+        ANX7150_DEBUG("Color space Y2R enabled********\n");
+        ANX7150_i2c_read_p0_reg(ANX7150_VID_MODE_REG, &c);
+        ANX7150_i2c_write_p0_reg(ANX7150_VID_MODE_REG, c | ANX7150_VID_MODE_CSPACE_Y2R);
+        if(y2r_sel)
+        {
+            ANX7150_DEBUG("Y2R_SEL!\n");
+            ANX7150_i2c_read_p0_reg(ANX7150_VID_MODE_REG, &c);
+            ANX7150_i2c_write_p0_reg(ANX7150_VID_MODE_REG, c | ANX7150_VID_MODE_Y2R_SEL);
+        }
+        else
+        {
+            ANX7150_i2c_read_p0_reg(ANX7150_VID_MODE_REG, &c);
+            ANX7150_i2c_write_p0_reg(ANX7150_VID_MODE_REG, c & (~ANX7150_VID_MODE_Y2R_SEL));
+        }
+    }
+    else
+    {
+        ANX7150_i2c_read_p0_reg(ANX7150_VID_MODE_REG, &c);
+        ANX7150_i2c_write_p0_reg(ANX7150_VID_MODE_REG, c & (~ANX7150_VID_MODE_CSPACE_Y2R));
+    }
+        
+    if(up_sample)
+    {
+        ANX7150_DEBUG("UP_SAMPLE!\n");
+        ANX7150_i2c_read_p0_reg(ANX7150_VID_MODE_REG, &c);
+        ANX7150_i2c_write_p0_reg(ANX7150_VID_MODE_REG, c | ANX7150_VID_MODE_UPSAMPLE);
+    }
+    else
+    {
+        ANX7150_i2c_read_p0_reg(ANX7150_VID_MODE_REG, &c);
+        ANX7150_i2c_write_p0_reg(ANX7150_VID_MODE_REG, c & (~ANX7150_VID_MODE_UPSAMPLE));
+    }
+    
+    if(range_y2r)
+    {
+        ANX7150_i2c_read_p0_reg(ANX7150_VID_MODE_REG, &c);
+        ANX7150_i2c_write_p0_reg(ANX7150_VID_MODE_REG, c | ANX7150_VID_MODE_RANGE_Y2R);
+    }
+    else
+    {
+        ANX7150_i2c_read_p0_reg(ANX7150_VID_MODE_REG, &c);
+        ANX7150_i2c_write_p0_reg(ANX7150_VID_MODE_REG, c & (~ANX7150_VID_MODE_RANGE_Y2R));
+    }
+
+    if(!ANX7150_pix_rpt_set_by_sys)
+    {
+        if((ANX7150_video_timing_id == ANX7150_V720x480i_60Hz_16x9) 
+            || (ANX7150_video_timing_id == ANX7150_V720x576i_50Hz_16x9)
+            || (ANX7150_video_timing_id == ANX7150_V720x480i_60Hz_4x3) 
+            || (ANX7150_video_timing_id == ANX7150_V720x576i_50Hz_4x3))
+            ANX7150_tx_pix_rpt = 1;
+        else
+            ANX7150_tx_pix_rpt = 0;
+    }
+    //set input pixel repeat times
+    ANX7150_i2c_read_p0_reg(ANX7150_VID_MODE_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_VID_MODE_REG, ((c & 0xfc) |ANX7150_in_pix_rpt));
+    //set link pixel repeat times
+    ANX7150_i2c_read_p0_reg(ANX7150_VID_CTRL_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_VID_CTRL_REG, ((c & 0xfc) |ANX7150_tx_pix_rpt));
+
+     if((ANX7150_in_pix_rpt != ANX7150_in_pix_rpt_bkp) 
+        ||(ANX7150_tx_pix_rpt != ANX7150_tx_pix_rpt_bkp) )
+    {
+        ANX7150_i2c_write_p0_reg(ANX7150_SYS_CTRL2_REG, 0x02);
+        ANX7150_i2c_write_p0_reg(ANX7150_SYS_CTRL2_REG, 0x00);
+        ANX7150_DEBUG("MISC_Reset!\n");
+        ANX7150_in_pix_rpt_bkp = ANX7150_in_pix_rpt;
+        ANX7150_tx_pix_rpt_bkp = ANX7150_tx_pix_rpt;
+    }
+    //enable video input
+    ANX7150_i2c_read_p0_reg(ANX7150_VID_CTRL_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_VID_CTRL_REG, c | ANX7150_VID_CTRL_IN_EN);
+    
+    ANX7150_DEBUG("Video configure OK!\n");
+
+    ANX7150_i2c_read_p0_reg(ANX7150_VID_STATUS_REG, &c);
+    ANX7150_DEBUG("ANX7150_VID_STATUS_REG=%x\n",c);
+//    for (i=0;i<300;i++)
+{
+    if(!(c & ANX7150_VID_STATUS_VID_STABLE))
+    {
+        ANX7150_DEBUG("Video not stable!\n");
+//	msleep(100);
+//	if(i==298)
+           return;
+    }
+}
+    if(cspace_y2r)
+        ANX7150_RGBorYCbCr = ANX7150_RGB;
+    //Enable video CLK,Format change after config video.
+   // ANX7150_i2c_read_p0_reg(ANX7150_INTR1_MASK_REG, &c);
+   // ANX7150_i2c_write_p0_reg(ANX7150_INTR1_MASK_REG, c |0x01);//3
+   ANX7150_i2c_read_p0_reg(ANX7150_INTR2_MASK_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_INTR2_MASK_REG, c | 0x48);
+    ANX7150_i2c_read_p0_reg(ANX7150_INTR3_MASK_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_INTR3_MASK_REG, c | 0x40);
+
+
+    if(ANX7150_edid_result.is_HDMI)
+    {
+        ANX7150_i2c_read_p0_reg(ANX7150_SYS_CTRL1_REG, &c);
+        ANX7150_i2c_write_p0_reg(ANX7150_SYS_CTRL1_REG, c | 0x02);
+        ANX7150_DEBUG("ANX7150 is set to HDMI mode\n");
+    }
+    else
+    {
+	ANX7150_DEBUG("ANX7150 is none HDMI mode\n");	
+    }
+    ANX7150_i2c_read_p0_reg(ANX7150_SYS_CTRL1_REG, &c);
+    TX_is_HDMI = c & 0x02;
+
+    if(TX_is_HDMI == 0x02) 
+    {
+        ANX7150_Set_AVMute();
+        ANX7150_Set_System_State(ANX7150_CONFIG_AUDIO);
+    }  
+    else 
+    {
+    //To-Do: Config to DVI mode. 
+        ANX7150_Set_System_State(ANX7150_HDCP_AUTHENTICATION);
+    }
+
+    //SW reset before TMDS clock enable  
+	ANX7150_i2c_read_p0_reg(ANX7150_SRST_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_SRST_REG, c | ANX7150_SRST_SW_RST);
+	ANX7150_i2c_write_p0_reg(ANX7150_SRST_REG, (c & (~ANX7150_SRST_SW_RST)));
+
+    //reset TMDS link to align 4 channels  xy 061120
+    ANX7150_i2c_read_p0_reg(ANX7150_SRST_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_SRST_REG, (c | ANX7150_TX_RST));
+    ANX7150_i2c_write_p0_reg(ANX7150_SRST_REG, (c & (~ANX7150_TX_RST)));
+    //Enable TMDS clock output // just enable bit7, and let the other bits along to avoid overwriting.
+    ANX7150_DEBUG("ANX7150_Config_Video--->|||||||||0x80\n");
+    ANX7150_i2c_read_p0_reg(ANX7150_TMDS_CLKCH_CONFIG_REG, &c);
+    ANX7150_DEBUG("ANX7150_TMDS_CLKCH_CONFIG_REG=%x\n",c);
+    ANX7150_i2c_write_p0_reg(ANX7150_TMDS_CLKCH_CONFIG_REG, (c | ANX7150_TMDS_CLKCH_MUTE));
+    msleep(100);  //msleep(10); //HDCP CTS
+
+    //ANX7150_i2c_read_p0_reg(ANX7150_VID_MODE_REG, &c);  //zy 061110
+}
+
+void ANX7150_Parse_Video_Format(void)
+{
+    switch(ANX7150_video_format_config)
+    {
+        case ANX7150_RGB_YCrCb444_SepSync:
+            ANX7150_emb_sync_mode = 0;
+            ANX7150_demux_yc_en = 0;
+            ANX7150_ddr_bus_mode = 0;
+            ANX7150_de_gen_en = 0;
+            ANX7150_DEBUG("RGB_YCrCb444_SepSync mode!\n");
+            break;
+        case ANX7150_YCrCb422_SepSync:
+            ANX7150_emb_sync_mode = 0;
+            ANX7150_demux_yc_en = 0;
+            ANX7150_ddr_bus_mode = 0;
+            ANX7150_de_gen_en = 0;
+            ANX7150_DEBUG("YCrCb422_SepSync mode!\n");
+            break;
+        case ANX7150_YCrCb422_EmbSync:
+            ANX7150_DEBUG("YCrCb422_EmbSync mode!\n");
+            ANX7150_demux_yc_en = 0;
+            ANX7150_ddr_bus_mode = 0;
+            ANX7150_de_gen_en = 0;
+            ANX7150_emb_sync_mode = 1;
+            ANX7150_Get_Video_Timing();
+            break;
+        case ANX7150_YCMux422_SepSync_Mode1:
+            ANX7150_DEBUG("YCMux422_SepSync_Mode1 mode!\n");
+            ANX7150_emb_sync_mode = 0;
+            ANX7150_ddr_bus_mode = 0;
+            ANX7150_de_gen_en = 0;
+            ANX7150_ycmux_BIT_sel = 0;
+            ANX7150_demux_yc_en = 1;
+            break;
+        case ANX7150_YCMux422_SepSync_Mode2:
+            ANX7150_DEBUG("YCMux422_SepSync_Mode2 mode!\n");
+            ANX7150_emb_sync_mode = 0;
+            ANX7150_ddr_bus_mode = 0;
+            ANX7150_de_gen_en = 0;
+            ANX7150_ycmux_BIT_sel = 1;
+            ANX7150_demux_yc_en = 1;
+            break;
+        case ANX7150_YCMux422_EmbSync_Mode1:
+            ANX7150_DEBUG("YCMux422_EmbSync_Mode1 mode!\n");
+            ANX7150_ddr_bus_mode = 0;
+            ANX7150_de_gen_en = 0;
+            ANX7150_emb_sync_mode = 1;
+            ANX7150_ycmux_BIT_sel = 0;
+            ANX7150_demux_yc_en = 1;
+            ANX7150_Get_Video_Timing();
+            break;
+        case ANX7150_YCMux422_EmbSync_Mode2:
+            ANX7150_DEBUG("YCMux422_EmbSync_Mode2 mode!\n");
+            ANX7150_ddr_bus_mode = 0;
+            ANX7150_de_gen_en = 0;
+            ANX7150_emb_sync_mode = 1;
+            ANX7150_ycmux_BIT_sel = 1;
+            ANX7150_demux_yc_en = 1;
+            ANX7150_Get_Video_Timing();
+            break;
+        case ANX7150_RGB_YCrCb444_DDR_SepSync:
+            ANX7150_DEBUG("RGB_YCrCb444_DDR_SepSync mode!\n");
+            ANX7150_emb_sync_mode = 0;
+            ANX7150_demux_yc_en = 0;
+            ANX7150_de_gen_en = 0;
+            ANX7150_ddr_bus_mode = 1;
+            break;
+        case ANX7150_RGB_YCrCb444_DDR_EmbSync:
+            ANX7150_DEBUG("RGB_YCrCb444_DDR_EmbSync mode!\n");
+            ANX7150_demux_yc_en = 0;
+            ANX7150_de_gen_en = 0;
+            ANX7150_emb_sync_mode = 1;
+            ANX7150_ddr_bus_mode = 1;
+            ANX7150_Get_Video_Timing();
+            break;
+        case ANX7150_RGB_YCrCb444_SepSync_No_DE:
+            ANX7150_DEBUG("RGB_YCrCb444_SepSync_No_DE mode!\n");
+            ANX7150_emb_sync_mode = 0;
+            ANX7150_demux_yc_en = 0;
+            ANX7150_ddr_bus_mode = 0;
+            ANX7150_de_gen_en = 1;
+            ANX7150_Get_Video_Timing();
+            break;
+        case ANX7150_YCrCb422_SepSync_No_DE:
+            ANX7150_DEBUG("YCrCb422_SepSync_No_DE mode!\n");
+            ANX7150_emb_sync_mode = 0;
+            ANX7150_demux_yc_en = 0;
+            ANX7150_ddr_bus_mode = 0;
+            ANX7150_de_gen_en = 1;
+            ANX7150_Get_Video_Timing();
+            break;
+        default:
+            break;
+    }
+}
+
+void ANX7150_Get_Video_Timing()
+{
+    BYTE i;
+//#ifdef ITU656
+    for(i = 0; i < 18; i++)
+    {
+        switch(ANX7150_video_timing_id)
+        {
+            case ANX7150_V640x480p_60Hz:
+                ANX7150_DEBUG("640x480p_60Hz!\n");
+                ANX7150_video_timing_parameter[i] = ANX7150_video_timingtype_table.ANX7150_640x480p_60Hz[i];
+                break;
+            case ANX7150_V720x480p_60Hz_4x3:
+            case ANX7150_V720x480p_60Hz_16x9:
+                ANX7150_DEBUG("720x480p_60Hz!\n");
+                ANX7150_video_timing_parameter[i] = ANX7150_video_timingtype_table.ANX7150_720x480p_60Hz[i];
+                break;
+            case ANX7150_V1280x720p_60Hz:
+                ANX7150_DEBUG("1280x720p_60Hz!\n");
+                ANX7150_video_timing_parameter[i] = ANX7150_video_timingtype_table.ANX7150_1280x720p_60Hz[i];
+                break;
+            case ANX7150_V1920x1080i_60Hz:
+                ANX7150_DEBUG("1920x1080i_60Hz!\n");
+                ANX7150_video_timing_parameter[i] = ANX7150_video_timingtype_table.ANX7150_1920x1080i_60Hz[i];
+                break;
+            case ANX7150_V720x480i_60Hz_4x3:
+            case ANX7150_V720x480i_60Hz_16x9:
+                ANX7150_DEBUG("720x480i_60Hz!\n");
+                ANX7150_video_timing_parameter[i] = ANX7150_video_timingtype_table.ANX7150_720x480i_60Hz[i];
+                break;
+            case ANX7150_V720x576p_50Hz_4x3:
+            case ANX7150_V720x576p_50Hz_16x9:
+                ANX7150_DEBUG("720x576p_50Hz!\n");
+                ANX7150_video_timing_parameter[i] = ANX7150_video_timingtype_table.ANX7150_720x576p_50Hz[i];
+                break;
+            case ANX7150_V1280x720p_50Hz:
+                ANX7150_DEBUG("1280x720p_50Hz!\n");
+                ANX7150_video_timing_parameter[i] = ANX7150_video_timingtype_table.ANX7150_1280x720p_50Hz[i];
+                break;
+            case ANX7150_V1920x1080i_50Hz:
+                ANX7150_DEBUG("1920x1080i_50Hz!\n");
+                ANX7150_video_timing_parameter[i] = ANX7150_video_timingtype_table.ANX7150_1920x1080i_50Hz[i];
+                break;
+            case ANX7150_V720x576i_50Hz_4x3:
+            case ANX7150_V720x576i_50Hz_16x9:
+                ANX7150_DEBUG("720x576i_50Hz!\n");
+                ANX7150_video_timing_parameter[i] = ANX7150_video_timingtype_table.ANX7150_720x576i_50Hz[i];
+                break;
+
+            default:
+                break;
+        }
+        ANX7150_DEBUG("Video_Timing_Parameter[%.2x]=%.2x\n", (WORD)i, (WORD) ANX7150_video_timing_parameter[i]);
+    }
+/*#else
+    for(i = 0; i < 18; i++)
+    {
+        switch(ANX7150_video_timing_id)
+        {
+            case ANX7150_V640x480p_60Hz:
+                //ANX7150_DEBUG("640x480p_60Hz!\n");
+                ANX7150_video_timing_parameter[i] = Load_from_EEPROM(0, i);
+                msleep(3);
+                break;
+            case ANX7150_V720x480p_60Hz_4x3:
+            case ANX7150_V720x480p_60Hz_16x9:
+                //ANX7150_DEBUG("720x480p_60Hz!\n");
+                ANX7150_video_timing_parameter[i] = Load_from_EEPROM(0, 18 + i);
+                msleep(3);
+                break;
+            case ANX7150_V1280x720p_60Hz:
+                //ANX7150_DEBUG("1280x720p_60Hz!\n");
+                ANX7150_video_timing_parameter[i] = Load_from_EEPROM(0, 36 + i);
+                msleep(3);
+                break;
+            case ANX7150_V1920x1080i_60Hz:
+                //ANX7150_DEBUG("1920x1080i_60Hz!\n");
+                ANX7150_video_timing_parameter[i] = Load_from_EEPROM(0, 54 + i);
+                msleep(3);
+                break;
+            case ANX7150_V720x480i_60Hz_4x3:
+            case ANX7150_V720x480i_60Hz_16x9:
+                //ANX7150_DEBUG("720x480i_60Hz!\n");
+                ANX7150_video_timing_parameter[i] = Load_from_EEPROM(0, 72 + i);
+                msleep(3);
+                break;
+            case ANX7150_V720x576p_50Hz_4x3:
+            case ANX7150_V720x576p_50Hz_16x9:
+                //ANX7150_DEBUG("720x576p_50Hz!\n");
+                ANX7150_video_timing_parameter[i] = Load_from_EEPROM(0, 90 + i);
+                msleep(3);
+                break;
+            case ANX7150_V1280x720p_50Hz:
+                //ANX7150_DEBUG("1280x720p_50Hz!\n");
+                ANX7150_video_timing_parameter[i] = Load_from_EEPROM(0, 108 + i);
+                msleep(3);
+                break;
+            case ANX7150_V1920x1080i_50Hz:
+                //ANX7150_DEBUG("1920x1080i_50Hz!\n");
+                ANX7150_video_timing_parameter[i] = Load_from_EEPROM(0, 126 + i);
+                msleep(3);
+                break;
+            case ANX7150_V720x576i_50Hz_4x3:
+            case ANX7150_V720x576i_50Hz_16x9:
+                //ANX7150_DEBUG("720x576i_50Hz!\n");
+                ANX7150_video_timing_parameter[i] = Load_from_EEPROM(0, 144 + i);
+                msleep(3);
+                break;
+
+            default:
+                break;
+        }
+        //ANX7150_DEBUG("Video_Timing_Parameter[%.2x]=%.2x\n", (WORD)i, (WORD) ANX7150_video_timing_parameter[i]);
+    }
+#endif*/
+}
+
+void ANX7150_DE_Generator()
+{
+    BYTE c,video_type,hsync_pol,vsync_pol,v_fp,v_bp,vsync_width;	
+    BYTE hsync_width_low,hsync_width_high,v_active_low,v_active_high;
+    BYTE h_active_low,h_active_high,h_res_low,h_res_high,h_bp_low,h_bp_high;
+    WORD hsync_width,h_active,h_res,h_bp;
+
+    video_type = ANX7150_video_timing_parameter[15];
+    hsync_pol = ANX7150_video_timing_parameter[16];
+    vsync_pol = ANX7150_video_timing_parameter[17];
+    v_fp = ANX7150_video_timing_parameter[12];
+    v_bp = ANX7150_video_timing_parameter[11];
+    vsync_width = ANX7150_video_timing_parameter[10];
+    hsync_width = ANX7150_video_timing_parameter[5];
+    hsync_width = (hsync_width << 8) + ANX7150_video_timing_parameter[4];
+    v_active_high = ANX7150_video_timing_parameter[9];
+    v_active_low = ANX7150_video_timing_parameter[8];
+    h_active = ANX7150_video_timing_parameter[3];
+    h_active = (h_active << 8) + ANX7150_video_timing_parameter[2];
+    h_res = ANX7150_video_timing_parameter[1];
+    h_res = (h_res << 8) + ANX7150_video_timing_parameter[0];
+    h_bp = ANX7150_video_timing_parameter[7];
+    h_bp = (h_bp << 8) + ANX7150_video_timing_parameter[6];
+    if(ANX7150_demux_yc_en)
+    {
+        hsync_width = 2* hsync_width;
+        h_active = 2 * h_active;
+        h_res = 2 * h_res;
+        h_bp = 2 * h_bp;
+    }
+    hsync_width_low = hsync_width & 0xff;
+    hsync_width_high = (hsync_width >> 8) & 0xff;
+    h_active_low = h_active & 0xff;
+    h_active_high = (h_active >> 8) & 0xff;
+    h_res_low = h_res & 0xff;
+    h_res_high = (h_res >> 8) & 0xff;
+    h_bp_low = h_bp & 0xff;
+    h_bp_high = (h_bp >> 8) & 0xff;
+    
+    ANX7150_i2c_read_p0_reg(ANX7150_VID_CAPCTRL1_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_VID_CAPCTRL1_REG, c & 0xf7 |video_type);//set video type
+    ANX7150_i2c_read_p0_reg(ANX7150_VID_CAPCTRL1_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_VID_CAPCTRL1_REG, c  & 0xdf |hsync_pol);//set HSYNC polarity
+    ANX7150_i2c_read_p0_reg(ANX7150_VID_CAPCTRL1_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_VID_CAPCTRL1_REG, c & 0xbf |vsync_pol);//set VSYNC polarity
+    ANX7150_i2c_write_p0_reg(ANX7150_ACT_LINEL_REG, v_active_low);
+    ANX7150_i2c_write_p0_reg(ANX7150_ACT_LINEH_REG, v_active_high);
+    ANX7150_i2c_write_p0_reg(ANX7150_VSYNC_WID_REG, vsync_width);
+    ANX7150_i2c_write_p0_reg(ANX7150_VSYNC_TAIL2VIDLINE_REG, v_bp);
+    ANX7150_i2c_write_p0_reg(ANX7150_VID_PIXL_REG, h_active_low);
+    ANX7150_i2c_write_p0_reg(ANX7150_VID_PIXH_REG, h_active_high);
+    ANX7150_i2c_write_p0_reg(ANX7150_H_RESL_REG, h_res_low);
+    ANX7150_i2c_write_p0_reg(ANX7150_H_RESH_REG, h_res_high);
+    ANX7150_i2c_write_p0_reg(ANX7150_HSYNC_ACT_WIDTHL_REG, hsync_width_low);
+    ANX7150_i2c_write_p0_reg(ANX7150_HSYNC_ACT_WIDTHH_REG, hsync_width_high);
+    ANX7150_i2c_write_p0_reg(ANX7150_H_BACKPORCHL_REG, h_bp_low);
+    ANX7150_i2c_write_p0_reg(ANX7150_H_BACKPORCHH_REG, h_bp_high);
+    ANX7150_i2c_read_p0_reg(ANX7150_VID_CAPCTRL0_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_VID_CAPCTRL0_REG, c | ANX7150_VID_CAPCTRL0_DEGEN_EN);
+}
+
+void ANX7150_Embed_Sync_Decode()
+{
+    BYTE c,video_type,hsync_pol,vsync_pol,v_fp,vsync_width;	
+    BYTE h_fp_low,h_fp_high,hsync_width_low,hsync_width_high;
+    WORD h_fp,hsync_width;
+
+    video_type = ANX7150_video_timing_parameter[15];
+    hsync_pol = ANX7150_video_timing_parameter[16];
+    vsync_pol = ANX7150_video_timing_parameter[17];
+    v_fp = ANX7150_video_timing_parameter[12];
+    vsync_width = ANX7150_video_timing_parameter[10];
+    h_fp = ANX7150_video_timing_parameter[14];
+    h_fp = (h_fp << 8) + ANX7150_video_timing_parameter[13];
+    hsync_width = ANX7150_video_timing_parameter[5];
+    hsync_width = (hsync_width << 8) + ANX7150_video_timing_parameter[4];
+    if(ANX7150_demux_yc_en)
+    {
+        h_fp = 2 * h_fp;
+        hsync_width = 2* hsync_width;
+    }
+    h_fp_low = h_fp & 0xff;
+    h_fp_high = (h_fp >> 8) & 0xff;
+    hsync_width_low = hsync_width & 0xff;
+    hsync_width_high = (hsync_width >> 8) & 0xff;
+    
+    ANX7150_i2c_read_p0_reg(ANX7150_VID_CAPCTRL1_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_VID_CAPCTRL1_REG, c & 0xf7 |video_type);//set video type
+    ANX7150_i2c_read_p0_reg(ANX7150_VID_CAPCTRL1_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_VID_CAPCTRL1_REG, c & 0xdf |hsync_pol);//set HSYNC polarity
+    ANX7150_i2c_read_p0_reg(ANX7150_VID_CAPCTRL1_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_VID_CAPCTRL1_REG, c & 0xbf |vsync_pol);//set VSYNC polarity
+    ANX7150_i2c_read_p0_reg(ANX7150_VID_CAPCTRL0_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_VID_CAPCTRL0_REG, c | ANX7150_VID_CAPCTRL0_EMSYNC_EN);
+    ANX7150_i2c_write_p0_reg(ANX7150_ACT_LINE2VSYNC_REG, v_fp);
+    ANX7150_i2c_write_p0_reg(ANX7150_VSYNC_WID_REG, vsync_width);
+    ANX7150_i2c_write_p0_reg(ANX7150_H_FRONTPORCHL_REG, h_fp_low);
+    ANX7150_i2c_write_p0_reg(ANX7150_H_FRONTPORCHH_REG, h_fp_high);
+    ANX7150_i2c_write_p0_reg(ANX7150_HSYNC_ACT_WIDTHL_REG, hsync_width_low);
+    ANX7150_i2c_write_p0_reg(ANX7150_HSYNC_ACT_WIDTHH_REG, hsync_width_high);
+}
+
+void ANX7150_Show_Video_Parameter()
+{
+   // int h_res,h_act,v_res,v_act,h_fp,hsync_width,h_bp;
+//Add for KG2+
+#ifdef KG2_APP
+    unsigned short HActive = 0, VActive = 0;
+    unsigned char  IsProgressive = 0;		
+    unsigned short RefRate = 0;			
+#endif
+//Add for  KG2-
+    BYTE c, c1;
+   
+    ANX7150_DEBUG("***********************************ANX7150 Info************************************\n");
+    if(BIST_EN)
+        ANX7150_DEBUG("   ANX7150 mode = BIST mode");
+    else
+        ANX7150_DEBUG("   ANX7150 mode = Normal mode");
+    if((ANX7150_demux_yc_en == 1) && (ANX7150_emb_sync_mode == 0))
+        ANX7150_DEBUG("   Input video format = YC_MUX");
+    if((ANX7150_demux_yc_en == 0) && (ANX7150_emb_sync_mode == 1))
+        ANX7150_DEBUG("   Input video format = 656");
+    if((ANX7150_demux_yc_en == 1) && (ANX7150_emb_sync_mode == 1))
+        ANX7150_DEBUG("   Input video format = YC_MUX + 656");
+    if((ANX7150_demux_yc_en == 0) && (ANX7150_emb_sync_mode == 0))
+        ANX7150_DEBUG("   Input video format = Seperate Sync");
+    if(ANX7150_de_gen_en)
+        ANX7150_DEBUG("   DE generator = Enable");
+    else
+        ANX7150_DEBUG("   DE generator = Disable");
+    if((ANX7150_ddr_bus_mode == 1)&& (ANX7150_emb_sync_mode == 0))
+        ANX7150_DEBUG("   Input video format = DDR mode");
+    else if ((ANX7150_ddr_bus_mode == 1)&& (ANX7150_emb_sync_mode == 1))
+        ANX7150_DEBUG("   Input video format = DDR mode + 656");
+    ANX7150_i2c_read_p0_reg(ANX7150_SYS_CTRL1_REG, &c1);
+    c1 = (c1 & 0x02);
+    if(c1)
+    {
+        ANX7150_DEBUG("   Output video mode = HDMI\n");
+        ANX7150_i2c_read_p1_reg(0x04, &c);
+        c = (c & 0x60) >> 5; 
+        switch(c)
+        {
+            case ANX7150_RGB:
+                ANX7150_DEBUG("   Output video color format = RGB\n");
+                break;
+            case ANX7150_YCbCr422:
+                ANX7150_DEBUG("   Output video color format = YCbCr422\n");
+                break;
+            case ANX7150_YCbCr444:
+                ANX7150_DEBUG("   Output video color format = YCbCr444\n");
+                break;
+            default:
+		ANX7150_DEBUG("??????Output video color format = %x\n",c);
+                break;
+        }
+    }
+    else
+    {
+        ANX7150_DEBUG("   Output video mode = DVI");
+        ANX7150_DEBUG("   Output video color format = RGB");
+    }
+    
+    /*for(i = 0x10; i < 0x25; i ++)
+    {
+        ANX7150_i2c_read_p0_reg(i, &c );
+        ANX7150_DEBUG("0x%.2x = 0x%.2x\n",(unsigned int)i,(unsigned int)c);
+    }*/
+ /*   ANX7150_i2c_read_p0_reg(ANX7150_VID_STATUS_REG, &c);
+    if((c & ANX7150_VID_STATUS_TYPE) == 0x04)
+        ANX7150_DEBUG("Video Type = Interlace");
+    else
+        ANX7150_DEBUG("Video Type = Progressive");
+    ANX7150_i2c_read_p0_reg(ANX7150_VIDF_HRESH_REG, &c);
+    h_res = c;
+    h_res = h_res << 8;
+    ANX7150_i2c_read_p0_reg(ANX7150_VIDF_HRESL_REG, &c);
+    h_res = h_res + c;
+    ANX7150_DEBUG("H_resolution = %u\n",h_res);
+    ANX7150_i2c_read_p0_reg(ANX7150_VIDF_PIXH_REG, &c);
+    h_act = c;
+    h_act = h_act << 8;
+    ANX7150_i2c_read_p0_reg(ANX7150_VIDF_PIXL_REG, &c);
+    h_act = h_act + c;
+    ANX7150_DEBUG("H_active = %u\n",h_act);
+
+    ANX7150_i2c_read_p0_reg(ANX7150_VIDF_VRESH_REG, &c);
+    v_res = c;
+    v_res = v_res << 8;
+    ANX7150_i2c_read_p0_reg(ANX7150_VIDF_VRESL_REG, &c);
+    v_res = v_res + c;
+    ANX7150_DEBUG("V_resolution = %u\n",v_res);
+    ANX7150_i2c_read_p0_reg(ANX7150_VIDF_ACTVIDLINEH_REG, &c);
+    v_act = c;
+    v_act = v_act << 8;
+    ANX7150_i2c_read_p0_reg(ANX7150_VIDF_ACTVIDLINEL_REG, &c);
+    v_act = v_act + c;
+    ANX7150_DEBUG("V_active = %u\n",v_act);
+
+    ANX7150_i2c_read_p0_reg(ANX7150_VIDF_HFORNTPORCHH_REG, &c);
+    h_fp = c;
+    h_fp = h_fp << 8;
+    ANX7150_i2c_read_p0_reg(ANX7150_VIDF_HFORNTPORCHL_REG, &c);
+    h_fp = h_fp + c;
+    ANX7150_DEBUG("H_FP = %u\n",h_fp);
+
+    ANX7150_i2c_read_p0_reg(ANX7150_VIDF_HBACKPORCHH_REG, &c);
+    h_bp = c;
+    h_bp = h_bp << 8;
+    ANX7150_i2c_read_p0_reg(ANX7150_VIDF_HBACKPORCHL_REG, &c);
+    h_bp = h_bp + c;
+    ANX7150_DEBUG("H_BP = %u\n",h_bp);
+
+    ANX7150_i2c_read_p0_reg(ANX7150_VIDF_HSYNCWIDH_REG, &c);
+    hsync_width = c;
+    hsync_width = hsync_width << 8;
+    ANX7150_i2c_read_p0_reg(ANX7150_VIDF_HSYNCWIDL_REG, &c);
+    hsync_width = hsync_width + c;
+    ANX7150_DEBUG("Hsync_width = %u\n",hsync_width);
+
+    ANX7150_i2c_read_p0_reg(ANX7150_VIDF_ACTLINE2VSYNC_REG, &c);
+    ANX7150_DEBUG("Vsync_FP = %bu\n",c);
+
+    ANX7150_i2c_read_p0_reg(ANX7150_VIDF_VSYNCTAIL2VIDLINE_REG, &c);
+    ANX7150_DEBUG("Vsync_BP = %bu\n",c);
+
+    ANX7150_i2c_read_p0_reg(ANX7150_VIDF_VSYNCWIDLINE_REG, &c);
+    ANX7150_DEBUG("Vsync_width = %bu\n",c);*/
+    ANX7150_DEBUG("");
+    if(BIST_EN)
+    {
+        ANX7150_DEBUG("   BIST mode output video format is ");
+        if(0)
+        	;
+        else
+        {
+            ANX7150_DEBUG("1280x720p@60, ");
+            if(ANX7150_edid_result.supported_720p_60Hz)
+                ANX7150_DEBUG("and sink supports this format.");
+            else
+                ANX7150_DEBUG("but sink does not support this format.");
+        }
+    }
+    else
+    {
+        ANX7150_DEBUG("   Normal mode output video format is ");
+        switch(ANX7150_video_timing_id)
+        {
+            case ANX7150_V720x480p_60Hz_4x3:
+            case ANX7150_V720x480p_60Hz_16x9:
+#ifdef KG2_APP
+		HActive=720;
+		VActive=480;
+		IsProgressive=1;
+		RefRate=60;
+#endif 
+                ANX7150_DEBUG("720x480p@60, ");
+                if(ANX7150_edid_result.supported_720x480p_60Hz)
+                    ANX7150_DEBUG("and sink supports this format.");
+                else
+                    ANX7150_DEBUG("but sink does not support this format.");
+                break;
+            case ANX7150_V1280x720p_60Hz:
+#ifdef KG2_APP
+		HActive=1280;
+		VActive=720;
+		IsProgressive=1;
+		RefRate=60;
+#endif 
+                ANX7150_DEBUG("1280x720p@60, ");
+                if(ANX7150_edid_result.supported_720p_60Hz)
+                    ANX7150_DEBUG("and sink supports this format.");
+                else
+                    ANX7150_DEBUG("but sink does not support this format.");
+                break;
+            case ANX7150_V1920x1080i_60Hz:
+#ifdef KG2_APP
+		HActive=1920;
+		VActive=540;
+		IsProgressive=0;
+		RefRate=60;
+#endif
+                ANX7150_DEBUG("1920x1080i@60, ");
+                if(ANX7150_edid_result.supported_1080i_60Hz)
+                    ANX7150_DEBUG("and sink supports this format.");
+                else
+                    ANX7150_DEBUG("but sink does not support this format.");
+                break;
+            case ANX7150_V1920x1080p_60Hz:
+#ifdef KG2_APP
+		HActive=1920;
+		VActive=1080;
+		IsProgressive=1;
+		RefRate=60;
+#endif
+                ANX7150_DEBUG("1920x1080p@60, ");
+                if(ANX7150_edid_result.supported_1080p_60Hz)
+                    ANX7150_DEBUG("and sink supports this format.");
+                else
+                    ANX7150_DEBUG("but sink does not support this format.");
+                break;
+            case ANX7150_V1920x1080p_50Hz:
+#ifdef KG2_APP
+		HActive=1920;
+		VActive=1080;
+		IsProgressive=1;
+		RefRate=50;
+#endif
+                ANX7150_DEBUG("1920x1080p@50, ");
+                if(ANX7150_edid_result.supported_1080p_50Hz)
+                    ANX7150_DEBUG("and sink supports this format.");
+                else
+                    ANX7150_DEBUG("but sink does not support this format.");
+                break;
+            case ANX7150_V1280x720p_50Hz:
+#ifdef KG2_APP
+		HActive=1280;
+		VActive=720;
+		IsProgressive=1;
+		RefRate=50;
+#endif
+                ANX7150_DEBUG("1280x720p@50, ");
+                if(ANX7150_edid_result.supported_720p_50Hz)
+                    ANX7150_DEBUG("and sink supports this format.");
+                else
+                    ANX7150_DEBUG("but sink does not support this format.");
+                break;
+            case ANX7150_V1920x1080i_50Hz:
+#ifdef KG2_APP
+		HActive=1920;
+		VActive=540;
+		IsProgressive=0;
+		RefRate=50;
+#endif
+                ANX7150_DEBUG("1920x1080i@50, ");
+                if(ANX7150_edid_result.supported_1080i_50Hz)
+                    ANX7150_DEBUG("and sink supports this format.");
+                else
+                    ANX7150_DEBUG("but sink does not support this format.");
+                break;
+            case ANX7150_V720x576p_50Hz_4x3:
+            case ANX7150_V720x576p_50Hz_16x9:
+#ifdef KG2_APP
+		HActive=720;
+		VActive=576;
+		IsProgressive=1;
+		RefRate=50;
+#endif
+                ANX7150_DEBUG("720x576p@50, ");
+                if(ANX7150_edid_result.supported_576p_50Hz)
+                    ANX7150_DEBUG("and sink supports this format.");
+                else
+                    ANX7150_DEBUG("but sink does not support this format.");
+                break;
+            case ANX7150_V720x576i_50Hz_4x3:
+            case ANX7150_V720x576i_50Hz_16x9:
+#ifdef KG2_APP
+		HActive=720;
+		VActive=288;
+		IsProgressive=0;
+		RefRate=50;
+#endif
+                ANX7150_DEBUG("720x576i@50, ");
+                if(ANX7150_edid_result.supported_576i_50Hz)
+                    ANX7150_DEBUG("and sink supports this format.");
+                else
+                    ANX7150_DEBUG("but sink does not support this format.");
+                break;
+            case ANX7150_V720x480i_60Hz_4x3:
+            case ANX7150_V720x480i_60Hz_16x9:
+#ifdef KG2_APP
+		HActive=720;
+		VActive=240;
+		IsProgressive=0;
+		RefRate=60;
+#endif
+
+                ANX7150_DEBUG("720x480i@60, ");
+                if(ANX7150_edid_result.supported_720x480i_60Hz)
+                    ANX7150_DEBUG("and sink supports this format.");
+                else
+                    ANX7150_DEBUG("but sink does not support this format.");
+                break;
+            default:
+                ANX7150_DEBUG("unknown(video ID is: %.2x).\n",(WORD)ANX7150_video_timing_id);
+                break;
+        }
+    }
+#ifdef KG2_APP
+//for testing sending msg to KG2 API+
+                ANX7150_DEBUG("***********+add for testing sending msg to KG2 API+**********");
+		AVC_CMD_TIMING_PARAM kg2_timing_param;
+		
+		{
+			printk(KERN_INFO "anx7150: Change kg2 output timing\n");
+
+			kg2_timing_param.HTotal = 0;				// Filled by kg2 daemon
+			kg2_timing_param.HActive = HActive;
+			kg2_timing_param.HFrontPorch = 0;			// Filled by kg2 daemon
+			kg2_timing_param.HSyncWidth = 0;			// Filled by kg2 daemon
+			kg2_timing_param.HPolarity = AVC_CMD_POLARITY_INVERT;	// Filled by kg2 daemon
+			kg2_timing_param.VTotal = 0;				// Filled by kg2 daemon
+			kg2_timing_param.VActive = VActive;
+			kg2_timing_param.VFrontPorch = 0;			// Filled by kg2 daemon
+			kg2_timing_param.VSyncWidth = 0;			// Filled by kg2 daemon
+			kg2_timing_param.VPolarity = AVC_CMD_POLARITY_INVERT;	// Filled by kg2 daemon
+			kg2_timing_param.AspRatio = 0;				// Filled by kg2 daemon
+			kg2_timing_param.IsProgressive = IsProgressive;
+			kg2_timing_param.RefRate = RefRate;
+
+			kg2_set_output_timing(&kg2_timing_param);
+		}
+                ANX7150_DEBUG("***********-add for testing sending msg to KG2 API-**********");
+//for testing sending msg to KG2 API-
+#endif
+	    if(c1)//HDMI output
+		{
+				ANX7150_i2c_read_p0_reg(ANX7150_HDMI_AUDCTRL0_REG, &c);
+				c = c & 0x03;    
+				ANX7150_DEBUG("   MCLK Frequence = ");
+
+				switch(c)
+				{
+				  case 0x00: 
+				      ANX7150_DEBUG("128 * Fs.");
+				      break;
+				  case 0x10: 
+				      ANX7150_DEBUG("256 * Fs.");
+				      break;
+				  case 0x20:
+				      ANX7150_DEBUG("384 * Fs.");
+				      break;
+				  case 0x30: 
+				      ANX7150_DEBUG("512 * Fs.");
+				      break;
+				  default :         
+				      ANX7150_DEBUG("Wrong MCLK output.");
+				      break;
+				}
+				
+				if( ANX7150_AUD_HW_INTERFACE == 0x01)
+				{
+				  ANX7150_DEBUG("   Input Audio Interface = I2S.\n");
+				  ANX7150_i2c_read_p0_reg(ANX7150_I2SCH_STATUS4_REG, &c);
+				}
+				else if (ANX7150_AUD_HW_INTERFACE == 0x02)
+				{
+				  ANX7150_DEBUG("   Input Audio Interface = SPDIF.\n");
+				  ANX7150_i2c_read_p0_reg(ANX7150_SPDIFCH_STATUS_REG, &c);
+				 c=c>>4;
+				}
+				
+				ANX7150_DEBUG("   Audio Fs = ");
+				c &= 0x0f;
+				switch(c)
+				{
+				  case 0x00: 
+				      ANX7150_DEBUG("44.1 KHz.");
+				      break;
+				  case 0x02: 
+				      ANX7150_DEBUG("48 KHz.");
+				      break;
+				  case 0x03: 
+				      ANX7150_DEBUG("32 KHz.");
+				      break;
+				  case 0x08: 
+				      ANX7150_DEBUG("88.2 KHz.");
+				      break;        
+				  case 0x0a: 
+				      ANX7150_DEBUG("96 KHz.");
+				      break;
+				case 0x0c: 
+				      ANX7150_DEBUG("176.4 KHz.");
+				      break;
+				  case 0x0e: 
+				      ANX7150_DEBUG("192 KHz.");
+				      break;
+				  default :         
+				      ANX7150_DEBUG("Wrong Fs output.");
+				      break;
+				}
+
+				if	(ANX7150_HDCP_enable == 1)
+					  ANX7150_DEBUG("   ANX7150_HDCP_Enable.");
+				else
+					  ANX7150_DEBUG("   ANX7150_HDCP_Disable.");	
+				
+			}         
+    ANX7150_DEBUG("***********************************************************************************");    
+    ANX7150_DEBUG("**********************************ANX7150 Info*************************************");
+
+
+    ANX7150_i2c_read_p0_reg(ANX7150_H_RESL_REG, &c);
+    ANX7150_DEBUG("##ANX7150_H_RESL_REG= %x\n",c);
+    ANX7150_i2c_read_p0_reg(ANX7150_H_RESH_REG, &c);
+    ANX7150_DEBUG("##ANX7150_H_RESH_REG=%x\n",c);
+    ANX7150_i2c_read_p0_reg(ANX7150_VID_PIXL_REG, &c);
+    ANX7150_DEBUG("##ANX7150_VID_PIXL_REG=%x\n",c);
+    ANX7150_i2c_read_p0_reg(ANX7150_VID_PIXH_REG, &c);
+    ANX7150_DEBUG("##ANX7150_VID_PIXH_REG=%x\n",c);
+
+
+}
+
+//********************************************end video config*******************************
+
+BYTE ANX7150_Config_Audio()
+{
+    BYTE exe_result = 0x00;
+    BYTE c = 0x00;
+    BYTE audio_layout = 0x00;
+    BYTE fs = 0x00;
+    WORD ACR_N = 0x0000;
+
+
+    //set audio clock edge
+    ANX7150_i2c_read_p0_reg(ANX7150_HDMI_AUDCTRL0_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDCTRL0_REG,  (c & 0xf7) | ANX7150_audio_clock_edge);
+    //cts get select 
+    ANX7150_i2c_read_p0_reg(ANX7150_HDMI_AUDCTRL0_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDCTRL0_REG,  (c & 0xef));
+    ANX7150_DEBUG("audio_type = 0x%.2x\n",(WORD)s_ANX7150_audio_config.audio_type);
+    if (s_ANX7150_audio_config.audio_type & ANX7150_i2s_input)
+    {
+        exe_result |= ANX7150_Config_I2s();
+    }
+    else
+    {
+        //disable I2S audio input
+        //ANX7150_DEBUG("ANX7150: disable I2S audio input.");
+        ANX7150_i2c_read_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, &c);
+        c &= 0xc3;
+        ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, c);
+    }
+    
+    if (s_ANX7150_audio_config.audio_type & ANX7150_spdif_input)
+    {
+        exe_result |= ANX7150_Config_Spdif();
+    }
+    else
+    {
+        //disable SPDIF audio input
+        ANX7150_DEBUG("ANX7150: disable SPDIF audio input.");
+        ANX7150_i2c_read_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, &c);
+        c &= ~ANX7150_HDMI_AUDCTRL1_SPDIFIN_EN;
+        ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, c);
+  
+    }
+    
+    if (s_ANX7150_audio_config.audio_type & ANX7150_super_audio_input)
+    {
+        exe_result |= ANX7150_Config_Super_Audio();
+    }
+    else
+    {
+        //disable super audio output
+        ANX7150_DEBUG("ANX7150: disable super audio output.");
+        ANX7150_i2c_write_p0_reg(ANX7150_ONEBIT_AUD_CTRL_REG, 0x00);
+    }
+    
+    if (s_ANX7150_audio_config.audio_type & 0x07 == 0x00)
+    {
+        ;ANX7150_DEBUG("ANX7150 input no audio type.");
+    }
+
+    //audio layout 
+    if (s_ANX7150_audio_config.audio_type & ANX7150_i2s_input)
+    {
+        //ANX7150_i2c_read_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, &c);
+		audio_layout = s_ANX7150_audio_config.audio_layout;
+
+        //HDMI_RX_ReadI2C_RX0(0x15, &c);
+        #if 0
+        if((c & 0x08) ==0x08 )    //BIT[5:3]
+        {
+            audio_layout = 0x80;
+        }
+		else 
+			{
+				audio_layout = 0x00;
+			}
+		#endif
+    }
+    if (s_ANX7150_audio_config.audio_type & ANX7150_super_audio_input)
+    {
+        ANX7150_i2c_read_p0_reg(ANX7150_ONEBIT_AUD_CTRL_REG, &c);
+        if( c & 0xfc)       //BIT[5:3]
+        {
+            audio_layout = 0x80;
+        }
+    }
+
+    ANX7150_i2c_read_p0_reg(ANX7150_HDMI_AUDCTRL0_REG, &c);
+	c &= ~0x80;
+    c |= audio_layout;
+    ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDCTRL0_REG, c);
+
+    if(  (s_ANX7150_audio_config.audio_type & 0x07) == exe_result )
+    {
+        //Initial N value
+        
+        ANX7150_i2c_read_p0_reg(ANX7150_I2SCH_STATUS4_REG, &c);
+        fs = c & 0x0f;
+        // set default value to N
+        ACR_N = ANX7150_N_48k;
+        switch(fs)
+        {
+            case(0x00)://44.1k
+                ACR_N = ANX7150_N_44k;
+                break;
+            case(0x02)://48k
+                ACR_N = ANX7150_N_48k;
+                break;
+            case(0x03)://32k
+                ACR_N = ANX7150_N_32k;
+                break;
+            case(0x08)://88k
+                ACR_N = ANX7150_N_88k;
+                break;
+            case(0x0a)://96k
+                ACR_N = ANX7150_N_96k;
+                break;
+            case(0x0c)://176k
+                ACR_N = ANX7150_N_176k;
+                break;
+            case(0x0e)://192k
+                ACR_N = ANX7150_N_192k;
+                break;
+            default:
+                ANX7150_DEBUG("note wrong fs.");
+                break;
+        }
+        // write N(ACR) to corresponding regs
+        c = ACR_N;
+        ANX7150_i2c_write_p1_reg(ANX7150_ACR_N1_SW_REG, c);
+        c = ACR_N>>8;
+        ANX7150_i2c_write_p1_reg(ANX7150_ACR_N2_SW_REG, c);
+        
+        ANX7150_i2c_write_p1_reg(ANX7150_ACR_N3_SW_REG, 0x00);
+
+        // set the relation of MCLK and Fs  xy 070117
+        ANX7150_i2c_read_p0_reg(ANX7150_HDMI_AUDCTRL0_REG, &c);
+        ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDCTRL0_REG, (c & 0xf8) | FREQ_MCLK);
+        ANX7150_DEBUG("Audio MCLK input mode is: %.2x\n",(WORD)FREQ_MCLK);
+
+        //Enable control of ACR
+        ANX7150_i2c_read_p1_reg(ANX7150_INFO_PKTCTRL1_REG, &c);
+        ANX7150_i2c_write_p1_reg(ANX7150_INFO_PKTCTRL1_REG, (c | ANX7150_INFO_PKTCTRL1_ACR_EN));
+
+        //audio enable: 
+        ANX7150_i2c_read_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, &c);
+        c |= ANX7150_HDMI_AUDCTRL1_IN_EN;
+        ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, c);
+        
+        ANX7150_Set_System_State(ANX7150_CONFIG_PACKETS); 
+    }
+
+    return exe_result;
+
+}
+
+BYTE ANX7150_Config_I2s()
+{
+    BYTE exe_result = 0x00;
+    BYTE c = 0x00;
+    BYTE c1 = 0x00;
+    
+    ANX7150_DEBUG("ANX7150: config i2s audio.");
+
+    //select SCK as source
+    ANX7150_i2c_read_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, &c);
+    c &=  ~ANX7150_HDMI_AUDCTRL1_CLK_SEL;
+    ANX7150_DEBUG("select SCK as source, c = 0x%.2x\n",(WORD)c);
+    ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, c);
+
+    
+    //config i2s channel
+    ANX7150_i2c_read_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, &c);
+    c1 = s_ANX7150_audio_config.i2s_config.audio_channel;    // need BYTE[5:2]
+    c1 &= 0x3c;
+    c &= ~0x3c;
+    c |= c1;
+    ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, c);
+    ANX7150_DEBUG("config i2s channel, c = 0x%.2x\n",(WORD)c);
+
+    //config i2s format
+    //ANX7150_i2c_read_p0_reg(ANX7150_I2S_CTRL_REG, &c);
+    c = s_ANX7150_audio_config.i2s_config.i2s_format;
+    ANX7150_i2c_write_p0_reg(ANX7150_I2S_CTRL_REG, c);
+    ANX7150_DEBUG("config i2s format, c = 0x%.2x\n",(WORD)c);
+
+    //map i2s fifo
+     
+    // TODO: config I2S channel map register according to system    
+
+    
+    //ANX7150_i2c_write_p0_reg(ANX7150_I2SCH_CTRL_REG, c);
+
+    //swap right/left channel
+    /*ANX7150_i2c_read_p0_reg(ANX7150_I2SCH_SWCTRL_REG, &c);
+    c1 = 0x00;
+    c1 &= 0xf0;
+    c &= ~0xf0;
+    c |= c1;
+    ANX7150_i2c_write_p0_reg(ANX7150_I2SCH_SWCTRL_REG, c);
+    ANX7150_DEBUG("map i2s ffio, c = 0x%.2x\n",(WORD)c);*/
+    
+    //down sample   
+    ANX7150_i2c_read_p0_reg(ANX7150_HDMI_AUDCTRL0_REG, &c);
+    c1 = s_ANX7150_audio_config.down_sample;
+    c1 &= 0x60;
+    c &= ~0x60;
+    c |= c1;
+    ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDCTRL0_REG, c);
+    ANX7150_DEBUG("down sample, c = 0x%.2x\n",(WORD)c);
+
+    //config i2s channel status(5 regs)
+    c = s_ANX7150_audio_config.i2s_config.Channel_status1;
+    ANX7150_i2c_write_p0_reg(ANX7150_I2SCH_STATUS1_REG, c);
+    c = s_ANX7150_audio_config.i2s_config.Channel_status2;
+    ANX7150_i2c_write_p0_reg(ANX7150_I2SCH_STATUS2_REG, c);
+    c = s_ANX7150_audio_config.i2s_config.Channel_status3;
+    ANX7150_i2c_write_p0_reg(ANX7150_I2SCH_STATUS3_REG, c);
+    c = s_ANX7150_audio_config.i2s_config.Channel_status4;
+    ANX7150_i2c_write_p0_reg(ANX7150_I2SCH_STATUS4_REG, c);
+	//ANX7150_DEBUG("@@@@@@@@config i2s channel status4, c = 0x%.2x\n",(unsigned int)c);//
+
+    c = s_ANX7150_audio_config.i2s_config.Channel_status5;
+    ANX7150_i2c_write_p0_reg(ANX7150_I2SCH_STATUS5_REG, c);
+    ANX7150_DEBUG("config i2s channel status, c = 0x%.2x\n",(WORD)c);
+    
+    exe_result = ANX7150_i2s_input;
+    //ANX7150_DEBUG("return = 0x%.2x\n",(WORD)exe_result);
+
+    // open corresponding interrupt
+    //ANX7150_i2c_read_p0_reg(ANX7150_INTR1_MASK_REG, &c);
+    //ANX7150_i2c_write_p0_reg(ANX7150_INTR1_MASK_REG, (c | 0x22) );
+    //ANX7150_i2c_read_p0_reg(ANX7150_INTR3_MASK_REG, &c);
+    //ANX7150_i2c_write_p0_reg(ANX7150_INTR3_MASK_REG, (c | 0x20) );
+
+    
+    return exe_result;
+}
+
+
+
+BYTE ANX7150_Config_Spdif()
+{
+    BYTE exe_result = 0x00;
+    BYTE c = 0x00;
+    BYTE c1 = 0x00;
+    BYTE c2 = 0x00;
+    BYTE freq_mclk = 0x00;
+
+    ANX7150_DEBUG("ANX7150: config SPDIF audio.");
+
+        
+    //Select MCLK
+    ANX7150_i2c_read_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, &c);
+    c |= ANX7150_HDMI_AUDCTRL1_CLK_SEL;
+    ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, c);
+
+    //ANX7150_DEBUG("ANX7150: enable SPDIF audio.");
+    //Enable SPDIF
+    ANX7150_i2c_read_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, &c);
+    c |= ANX7150_HDMI_AUDCTRL1_SPDIFIN_EN;
+    ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, c);
+
+    //adjust MCLK phase in interrupt routine
+
+    // adjust FS_FREQ   //FS_FREQ 
+    c1 = s_ANX7150_audio_config.i2s_config.Channel_status4 & 0x0f;
+    ANX7150_i2c_read_p0_reg(ANX7150_SPDIFCH_STATUS_REG, &c);
+    c &= ANX7150_SPDIFCH_STATUS_FS_FREG;
+    c = c >> 4;
+    
+    if( c != c1)
+    {
+        //ANX7150_DEBUG("adjust FS_FREQ by system!");
+        ANX7150_i2c_read_p0_reg(ANX7150_I2SCH_STATUS4_REG, &c);
+        c &= 0xf0;
+        c |= c1;
+        ANX7150_i2c_write_p0_reg(ANX7150_I2SCH_STATUS4_REG, c);
+        
+        //enable using FS_FREQ from 0x59
+        ANX7150_i2c_read_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, &c);
+        c |= 0x02;
+        ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, c);
+    }
+    
+    // down sample
+    ANX7150_i2c_read_p0_reg(ANX7150_HDMI_AUDCTRL0_REG, &c);
+    c1 = s_ANX7150_audio_config.down_sample;
+    c1 &= 0x60;
+    c &= ~0x60;
+    c |= c1;
+    ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDCTRL0_REG, c);
+
+    if(s_ANX7150_audio_config.down_sample)      //zy 060816
+    {
+        // adjust FS_FREQ by system because down sample
+        //ANX7150_DEBUG("adjust FS_FREQ by system because down sample!");
+        
+        c1 = s_ANX7150_audio_config.i2s_config.Channel_status4 & 0x0f;
+        ANX7150_i2c_read_p0_reg(ANX7150_I2SCH_STATUS4_REG, &c);
+        c &= 0xf0;
+        c |= c1;
+        ANX7150_i2c_write_p0_reg(ANX7150_I2SCH_STATUS4_REG, c);
+    }
+    
+    
+    // spdif is stable
+    ANX7150_DEBUG("config SPDIF audio done");
+    exe_result = ANX7150_spdif_input;
+
+    // open corresponding interrupt
+    ANX7150_i2c_read_p0_reg(ANX7150_INTR1_MASK_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_INTR1_MASK_REG, (c | 0x32) );
+    //ANX7150_i2c_read_p0_reg(ANX7150_INTR3_MASK_REG, &c);
+    //ANX7150_i2c_write_p0_reg(ANX7150_INTR3_MASK_REG, (c | 0xa1) );
+    return exe_result;
+}
+
+BYTE ANX7150_Config_Super_Audio()
+{
+    BYTE exe_result = 0x00;
+    BYTE c = 0x00;
+
+
+    //ANX7150_DEBUG("ANX7150: config one BIT audio.");
+
+    // select sck as source
+    ANX7150_i2c_read_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, &c);
+    c &=  ~ANX7150_HDMI_AUDCTRL1_CLK_SEL;
+    ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, c);
+
+    // Enable stream  0x60
+    c = s_ANX7150_audio_config.super_audio_config.one_BIT_ctrl;
+    ANX7150_i2c_write_p0_reg(ANX7150_ONEBIT_AUD_CTRL_REG, c);
+
+    
+    // Map stream 0x61  
+    // TODO: config super audio  map register according to system    
+    
+    exe_result = ANX7150_super_audio_input;
+    return exe_result;
+
+}
+
+//*************** Config Packet ****************************
+BYTE ANX7150_Config_Packet()
+{
+    BYTE exe_result = 0x00;     // There is no use in current solution
+    BYTE info_packet_sel;
+    BYTE c;
+
+    
+    info_packet_sel = s_ANX7150_packet_config.packets_need_config;
+    ANX7150_DEBUG("info_packet_sel = 0x%.2x\n",(WORD) info_packet_sel);
+    // New packet?
+    if( info_packet_sel != 0x00)
+    { 
+    // avi infoframe
+        if( info_packet_sel & ANX7150_avi_sel )
+        {  
+            c = s_ANX7150_packet_config.avi_info.pb_byte[1];  //color space
+            c &= 0x9f;
+            c |= (ANX7150_RGBorYCbCr << 5);
+            s_ANX7150_packet_config.avi_info.pb_byte[1] = c | 0x10;
+            c = s_ANX7150_packet_config.avi_info.pb_byte[4];// vid ID
+            c = c & 0x80;
+            s_ANX7150_packet_config.avi_info.pb_byte[4] = c | ANX7150_video_timing_id;
+            c = s_ANX7150_packet_config.avi_info.pb_byte[5]; //repeat times
+            c = c & 0xf0;
+            c |= (ANX7150_tx_pix_rpt & 0x0f);
+            s_ANX7150_packet_config.avi_info.pb_byte[5] = c;
+            ANX7150_DEBUG("config avi infoframe packet."); 
+            // Disable repeater
+            ANX7150_i2c_read_p1_reg(ANX7150_INFO_PKTCTRL1_REG, &c);
+
+            c &= ~ANX7150_INFO_PKTCTRL1_AVI_RPT;
+            ANX7150_i2c_write_p1_reg(ANX7150_INFO_PKTCTRL1_REG, c);
+
+            // Enable?wait:go
+            ANX7150_i2c_read_p1_reg(ANX7150_INFO_PKTCTRL1_REG, &c);
+            if(c & ANX7150_INFO_PKTCTRL1_AVI_EN)
+            {
+                //ANX7150_DEBUG("wait disable, config avi infoframe packet.");
+                //return exe_result; //
+            }
+
+            // load packet data to regs
+            ANX7150_Load_Infoframe( ANX7150_avi_infoframe,
+                                    &(s_ANX7150_packet_config.avi_info));
+            // Enable and repeater
+            ANX7150_i2c_read_p1_reg(ANX7150_INFO_PKTCTRL1_REG, &c);
+            c |= 0x30;
+            ANX7150_i2c_write_p1_reg(ANX7150_INFO_PKTCTRL1_REG, c);
+
+            // complete avi packet
+            ANX7150_DEBUG("config avi infoframe packet done.");
+            s_ANX7150_packet_config.packets_need_config &= ~ANX7150_avi_sel;
+            
+        }
+        
+    // audio infoframe
+        if( info_packet_sel & ANX7150_audio_sel )
+        {
+            ANX7150_DEBUG("config audio infoframe packet.");
+
+            // Disable repeater
+            ANX7150_i2c_read_p1_reg(ANX7150_INFO_PKTCTRL2_REG, &c);
+            c &= ~ANX7150_INFO_PKTCTRL2_AIF_RPT;
+            ANX7150_i2c_write_p1_reg(ANX7150_INFO_PKTCTRL2_REG, c);
+            
+            // Enable?wait:go
+            ANX7150_i2c_read_p1_reg(ANX7150_INFO_PKTCTRL2_REG, &c);
+            if(c & ANX7150_INFO_PKTCTRL2_AIF_EN)
+            {
+                //ANX7150_DEBUG("wait disable, config audio infoframe packet.");
+                //return exe_result;//
+            }
+            // config packet
+
+            // load packet data to regs
+            ANX7150_Load_Infoframe( ANX7150_audio_infoframe,
+                                    &(s_ANX7150_packet_config.audio_info));
+            // Enable and repeater
+            ANX7150_i2c_read_p1_reg(ANX7150_INFO_PKTCTRL2_REG, &c);
+            c |= 0x03;
+            ANX7150_i2c_write_p1_reg(ANX7150_INFO_PKTCTRL2_REG, c);
+
+            // complete avi packet
+
+            ANX7150_DEBUG("config audio infoframe packet done.");
+            s_ANX7150_packet_config.packets_need_config &= ~ANX7150_audio_sel;
+            
+        }
+
+        // config other 4 packets
+/*
+        
+        if( info_packet_sel & 0xfc )
+        {
+            ANX7150_DEBUG("other packets.");
+
+            //find the current type need config
+            if(info_packet_sel & ANX7150_spd_sel)    type_sel = ANX7150_spd_sel;
+            else if(info_packet_sel & ANX7150_mpeg_sel)    type_sel = ANX7150_mpeg_sel;
+            else if(info_packet_sel & ANX7150_acp_sel)    type_sel = ANX7150_acp_sel;
+            else if(info_packet_sel & ANX7150_isrc1_sel)    type_sel = ANX7150_isrc1_sel;
+            else if(info_packet_sel & ANX7150_isrc2_sel)    type_sel = ANX7150_isrc2_sel;
+            else  type_sel = ANX7150_vendor_sel;
+            
+
+            // Disable repeater
+            ANX7150_i2c_read_p1_reg(ANX7150_INFO_PKTCTRL2_REG, &c);
+            c &= ~ANX7150_INFO_PKTCTRL2_AIF_RPT;
+            ANX7150_i2c_write_p1_reg(ANX7150_INFO_PKTCTRL2_REG, c);
+
+            switch(type_sel)
+            {
+                case ANX7150_spd_sel:
+                    ANX7150_i2c_read_p1_reg(ANX7150_INFO_PKTCTRL1_REG, &c);
+                    c &= ~ANX7150_INFO_PKTCTRL1_SPD_RPT;
+                    ANX7150_i2c_write_p1_reg(ANX7150_INFO_PKTCTRL1_REG, c);
+
+                    ANX7150_i2c_read_p1_reg(ANX7150_INFO_PKTCTRL1_REG, &c);
+                    if(c & ANX7150_INFO_PKTCTRL1_SPD_EN)
+                    {
+                        ANX7150_DEBUG("wait disable, config spd infoframe packet.");
+                        return exe_result;
+                    }
+                    break;
+                    
+                case ANX7150_mpeg_sel:
+                    ANX7150_i2c_read_p1_reg(ANX7150_INFO_PKTCTRL2_REG, &c);
+                    c &= ~ANX7150_INFO_PKTCTRL2_MPEG_RPT;
+                    ANX7150_i2c_write_p1_reg(ANX7150_INFO_PKTCTRL2_REG, c);
+                    
+                    ANX7150_i2c_read_p1_reg(ANX7150_INFO_PKTCTRL2_REG, &c);
+                    if(c & ANX7150_INFO_PKTCTRL2_MPEG_EN)
+                    {
+                        ANX7150_DEBUG("wait disable, config mpeg infoframe packet.");
+                        return exe_result;
+                    }
+                    break;
+                    
+                case ANX7150_acp_sel:
+                    ANX7150_i2c_read_p1_reg(ANX7150_INFO_PKTCTRL2_REG, &c);
+                    c &= ~ANX7150_INFO_PKTCTRL2_UD0_RPT;
+                    ANX7150_i2c_write_p1_reg(ANX7150_INFO_PKTCTRL2_REG, c);
+
+                    ANX7150_i2c_read_p1_reg(ANX7150_INFO_PKTCTRL2_REG, &c);
+                    if(c & ANX7150_INFO_PKTCTRL2_UD0_EN)
+                    {
+                        ANX7150_DEBUG("wait disable, config mpeg infoframe packet.");
+                        return exe_result;
+                    }
+                    break;
+                    
+                case ANX7150_isrc1_sel:
+                    ANX7150_i2c_read_p1_reg(ANX7150_INFO_PKTCTRL2_REG, &c);
+                    c &= ~ANX7150_INFO_PKTCTRL2_UD0_RPT;
+                    ANX7150_i2c_write_p1_reg(ANX7150_INFO_PKTCTRL2_REG, c);
+                    ANX7150_i2c_read_p1_reg(ANX7150_INFO_PKTCTRL2_REG, &c);
+                    if(c & ANX7150_INFO_PKTCTRL2_UD0_EN)
+                    {
+                        ANX7150_DEBUG("wait disable, config isrc1 packet.");
+                        return exe_result;
+                    }
+                    break;
+                    
+                case ANX7150_isrc2_sel:
+                    ANX7150_i2c_read_p1_reg(ANX7150_INFO_PKTCTRL2_REG, &c);
+                    c &= ~ANX7150_INFO_PKTCTRL2_UD1_RPT;
+                    ANX7150_i2c_write_p1_reg(ANX7150_INFO_PKTCTRL2_REG, c);
+                    ANX7150_i2c_read_p1_reg(ANX7150_INFO_PKTCTRL2_REG, &c);
+                    if(c & ANX7150_INFO_PKTCTRL2_UD1_EN)
+                    {
+                        ANX7150_DEBUG("wait disable, config isrc2 packet.");
+                        return exe_result;
+                    }
+                    break;
+                    
+                case ANX7150_vendor_sel:
+                    ANX7150_i2c_read_p1_reg(ANX7150_INFO_PKTCTRL2_REG, &c);
+                    c &= ~ANX7150_INFO_PKTCTRL2_UD1_RPT;
+                    ANX7150_i2c_write_p1_reg(ANX7150_INFO_PKTCTRL2_REG, c);
+                    ANX7150_i2c_read_p1_reg(ANX7150_INFO_PKTCTRL2_REG, &c);
+                    if(c & ANX7150_INFO_PKTCTRL2_UD1_EN)
+                    {
+                        ANX7150_DEBUG("wait disable, config vendor packet.");
+                        return exe_result;
+                    }
+                    break;
+                    
+                default : break;
+            }   
+                
+      
+            // config packet
+            // TODO: config packet in top level
+
+            // load packet data to regs
+            switch(type_sel)
+            {
+                case ANX7150_spd_sel:
+                    ANX7150_Load_Infoframe( ANX7150_spd_infoframe,
+                                            &(s_ANX7150_packet_config.spd_info));
+                    ANX7150_DEBUG("config spd done.");
+                    ANX7150_i2c_read_p1_reg(ANX7150_INFO_PKTCTRL1_REG, &c);
+                    c |= 0xc0;
+                    ANX7150_i2c_write_p1_reg(ANX7150_INFO_PKTCTRL1_REG, c);
+                    break;
+                    
+                case ANX7150_mpeg_sel:
+                    ANX7150_Load_Infoframe( ANX7150_mpeg_infoframe,
+                                            &(s_ANX7150_packet_config.mpeg_info));
+                    ANX7150_DEBUG("config mpeg done.");
+                    ANX7150_i2c_read_p1_reg(ANX7150_INFO_PKTCTRL2_REG, &c);
+                    c |= 0x0c;
+                    ANX7150_i2c_write_p1_reg(ANX7150_INFO_PKTCTRL2_REG, c);
+                    break;
+                    
+                case ANX7150_acp_sel:
+                    ANX7150_Load_Packet( ANX7150_acp_packet,
+                                            &(s_ANX7150_packet_config.acp_pkt));
+                    ANX7150_DEBUG("config acp done.");
+                    ANX7150_i2c_read_p1_reg(ANX7150_INFO_PKTCTRL2_REG, &c);
+                    c |= 0x30;
+                    ANX7150_i2c_write_p1_reg(ANX7150_INFO_PKTCTRL2_REG, c);
+                    break;
+                    
+                case ANX7150_isrc1_sel:
+                    ANX7150_Load_Packet( ANX7150_isrc1_packet,
+                                            &(s_ANX7150_packet_config.acp_pkt));
+                    ANX7150_DEBUG("config isrc1 done.");
+                    ANX7150_i2c_read_p1_reg(ANX7150_INFO_PKTCTRL2_REG, &c);
+                    c |= 0x30;
+                    ANX7150_i2c_write_p1_reg(ANX7150_INFO_PKTCTRL2_REG, c);
+                    break;
+                    
+                case ANX7150_isrc2_sel:
+                    ANX7150_Load_Packet( ANX7150_isrc2_packet,
+                                            &(s_ANX7150_packet_config.acp_pkt));
+                    ANX7150_DEBUG("config isrc2 done.");
+                    ANX7150_i2c_read_p1_reg(ANX7150_INFO_PKTCTRL2_REG, &c);
+                    c |= 0xc0;
+                    ANX7150_i2c_write_p1_reg(ANX7150_INFO_PKTCTRL2_REG, c);
+                    break;
+                    
+                case ANX7150_vendor_sel:
+                    ANX7150_Load_Infoframe( ANX7150_vendor_infoframe,
+                                            &(s_ANX7150_packet_config.vendor_info));
+                    ANX7150_DEBUG("config vendor done.");
+                    ANX7150_i2c_read_p1_reg(ANX7150_INFO_PKTCTRL2_REG, &c);
+                    c |= 0xc0;
+                    ANX7150_i2c_write_p1_reg(ANX7150_INFO_PKTCTRL2_REG, c);
+                    break;
+                    
+                default : break;
+            }   
+
+            // Enable and repeater
+            ANX7150_i2c_read_p1_reg(ANX7150_INFO_PKTCTRL2_REG, &c);
+            c |= 0x03;
+            ANX7150_i2c_write_p1_reg(ANX7150_INFO_PKTCTRL2_REG, c);
+
+            // complete config packet
+            ANX7150_DEBUG("config other packets done.");
+            s_ANX7150_packet_config.packets_need_config &= ~type_sel;
+            
+        }
+        */
+    }
+
+	
+    if( s_ANX7150_packet_config.packets_need_config  == 0x00)
+    {
+         ANX7150_DEBUG("config packets done\n");
+         ANX7150_Set_System_State(ANX7150_HDCP_AUTHENTICATION);
+    }
+
+    
+    return exe_result;
+}
+
+
+
+BYTE ANX7150_Load_Infoframe(packet_type member,
+                            infoframe_struct *p)
+{
+    BYTE exe_result = 0x00;
+    BYTE address[8] = {0x00,0x20,0x40,0x60,0x80,0x80,0xa0,0xa0};
+    BYTE i;
+    BYTE c;
+
+    p->pb_byte[0] = ANX7150_Checksum(p);        
+
+    // write infoframe to according regs
+    ANX7150_i2c_write_p1_reg(address[member], p->type);
+    ANX7150_i2c_write_p1_reg(address[member]+1, p->version);
+    ANX7150_i2c_write_p1_reg(address[member]+2, p->length);
+    
+    for(i=0; i <= p->length; i++)
+    {
+        ANX7150_i2c_write_p1_reg(address[member]+3+i, p->pb_byte[i]);
+        ANX7150_i2c_read_p1_reg(address[member]+3+i, &c);
+    }
+    return exe_result;
+}
+
+BYTE ANX7150_Checksum(infoframe_struct *p)
+{
+    BYTE checksum = 0x00;
+    BYTE i;
+
+    checksum = p->type + p->length + p->version;
+    for(i=1; i <= p->length; i++)
+    {
+        checksum += p->pb_byte[i];
+    }
+    checksum = ~checksum;
+    checksum += 0x01;
+
+    return checksum;
+}
+
+/*
+BYTE ANX7150_Load_Packet(packet_type member,
+                            infoframe_struct *p)
+{
+    BYTE exe_result = 0x00;
+    BYTE address[8] = {0x00,0x20,0x40,0x60,0x80,0x80,0xa0,0xa0};
+    BYTE i;
+
+    ANX7150_DEBUG("address  = 0x%.2x\n",(WORD) address[member]);
+
+    // write packet to according regs
+    ANX7150_i2c_write_p1_reg(address[member], p->type);
+
+    ANX7150_i2c_write_p1_reg(address[member]+1, p->version);
+    
+    ANX7150_i2c_write_p1_reg(address[member]+2, p->length);
+    
+    for(i=0; i < 28; i++)
+    {
+      ANX7150_i2c_write_p1_reg(address[member]+3+i, p->pb_byte[i]);
+    }
+    return exe_result;
+}
+*/
+//***************  end of Config Packet ****************************
+
+//******************** HDCP process ********************************
+
+void ANX7150_HDCP_Process(void)
+{
+    BYTE c;
+	BYTE Bksv_valid=0;//HDCP CTS
+    ANX7150_DEBUG("############ANX7150_HDCP_Process, ANX7150_HDCP_enable=%d\n",ANX7150_HDCP_enable);
+    if(ANX7150_HDCP_enable) 
+    { //HDCP_EN =1 means to do HDCP authentication,SWITCH4 = 0 means not to do HDCP authentication.
+    
+		ANX7150_i2c_read_p0_reg(ANX7150_SYS_CTRL1_REG, &c);
+        ANX7150_i2c_write_p0_reg(ANX7150_SYS_CTRL1_REG, c | 0x04);//power on HDCP, 090630
+
+		ANX7150_i2c_read_p0_reg(ANX7150_INTR2_MASK_REG, &c);
+            ANX7150_i2c_write_p0_reg(ANX7150_INTR2_MASK_REG, c |0x03);  
+		msleep(10);//let unencrypted video play a while, required by HDCP CTS. SY//HDCP CTS
+        ANX7150_Set_AVMute();//before auth, set_avmute
+		msleep(10);//HDCP CTS
+         
+        if( !ANX7150_hdcp_init_done )
+        {
+				ANX7150_i2c_read_p0_reg(ANX7150_SYS_CTRL1_REG, &c); //72:07.2 hdcp on//HDCP CTS
+				ANX7150_i2c_write_p0_reg(ANX7150_SYS_CTRL1_REG, (c | ANX7150_SYS_CTRL1_HDCPMODE));//HDCP CTS
+            if(ANX7150_edid_result.is_HDMI)
+	                ANX7150_Hardware_HDCP_Auth_Init();
+            else
+            {   //DVI, disable 1.1 feature and enable HDCP two special point check
+	                ANX7150_i2c_read_p0_reg(ANX7150_HDCP_CTRL1_REG, &c);
+	                ANX7150_i2c_write_p0_reg(ANX7150_HDCP_CTRL1_REG, 
+	                                                     (c & (~ANX7150_HDCP_CTRL1_HDCP11_EN) | ANX7150_LINK_CHK_12_EN));
+            }
+
+			//HDCP CTS
+			if(!ANX7150_BKSV_SRM())
+			{
+				ANX7150_Blue_Screen_Enable();
+				ANX7150_Clear_AVMute();
+				Bksv_valid=0;
+				return;
+			}
+			else //SY.
+			{
+				Bksv_valid=1;
+				ANX7150_i2c_read_p0_reg(ANX7150_HDCP_CTRL0_REG, &c);
+				ANX7150_i2c_write_p0_reg(ANX7150_HDCP_CTRL0_REG, (c | 0x03));
+			}
+
+            ANX7150_hdcp_init_done = 1;
+//HDCP CTS		  
+        }
+
+
+//HDCP CTS	
+		if((Bksv_valid) && (!ANX7150_hdcp_auth_en))
+        {
+				ANX7150_DEBUG("enable hw hdcp");
+				ANX7150_RST_DDCChannel();
+				ANX7150_i2c_read_p0_reg(ANX7150_HDCP_CTRL0_REG, &c);
+				ANX7150_i2c_write_p0_reg(ANX7150_HDCP_CTRL0_REG, (c | ANX7150_HDCP_CTRL0_HW_AUTHEN));
+				ANX7150_hdcp_auth_en = 1;
+        }
+
+		 if((Bksv_valid) && (ANX7150_hdcp_wait_100ms_needed))
+        {
+            ANX7150_hdcp_wait_100ms_needed = 0;
+            //disable audio
+            ANX7150_i2c_read_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, &c);
+            ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, c & (~ANX7150_HDMI_AUDCTRL1_IN_EN));
+            ANX7150_DEBUG("++++++++ANX7150_hdcp_wait_100ms_needed----------+++++++++\n");
+            msleep(100);				          
+			return;
+        }
+//HDCP CTS	
+
+        if(ANX7150_hdcp_auth_pass) //HDCP CTS
+        {
+				//Clear the SRM_Check_Pass BIT, then when reauthentication occurs, firmware can catch it.
+				ANX7150_i2c_read_p0_reg(ANX7150_HDCP_CTRL0_REG, &c);
+				ANX7150_i2c_write_p0_reg(ANX7150_HDCP_CTRL0_REG, c & 0xfc);
+
+            //Enable HDCP Hardware encryption
+            if(!ANX7150_hdcp_encryption)
+            {
+                ANX7150_HDCP_Encryption_Enable();
+            }
+            if(ANX7150_send_blue_screen)
+            {
+                ANX7150_Blue_Screen_Disable();
+            }
+		     if(ANX7150_avmute_enable)
+		     {
+				  ANX7150_Clear_AVMute();
+		     }
+            //enable audio SY.
+            ANX7150_i2c_read_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, &c);
+            c |= ANX7150_HDMI_AUDCTRL1_IN_EN;
+            ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, c);
+            ANX7150_DEBUG("@@@@@  HDCP Auth PASSED!   @@@@@\n");
+
+			if (ANX7150_hdcp_bcaps & 0x40) //repeater
+			{
+				ANX7150_DEBUG("Find a repeater!");
+				//actually it is KSVList check. we can't do SRM check due to the lack of SRM file. SY.
+				if(!ANX7150_srm_checked)
+				{
+					if (!ANX7150_IS_KSVList_VLD())
+					{
+						ANX7150_DEBUG("ksvlist not good. disable encryption");
+						ANX7150_HDCP_Encryption_Disable();
+						ANX7150_Blue_Screen_Enable();
+						ANX7150_Clear_AVMute();
+						ANX7150_ksv_srm_pass = 0;
+						ANX7150_Clean_HDCP();//SY.
+						//remove below will pass 1b-05/1b-06
+						//ANX7150_Set_System_State(ANX7150_WAIT_HOTPLUG);//SY.
+						return;
+					}
+					ANX7150_srm_checked=1;
+					ANX7150_ksv_srm_pass = 1;
+				}
+			}
+			else
+			{
+				ANX7150_DEBUG("Find a receiver.");
+
+			}
+
+#if 1
+				ANX7150_i2c_read_p0_reg(ANX7150_HDCP_CTRL0_REG, &c);
+				ANX7150_i2c_write_p0_reg(ANX7150_HDCP_CTRL0_REG, (c| ANX7150_HDCP_CTRL0_SW_AUTHOK) & (~ANX7150_HDCP_CTRL0_HW_AUTHEN));//dis hw hdcp, en sw hdcp
+
+
+#endif
+
+
+			
+        }
+        else 							//HDCP CTS
+        {
+            ANX7150_DEBUG("#####   HDCP Auth FAILED!   #####\n");
+		//also need to disable HW AUTHEN
+				//ANX7150_hdcp_auth_en = 0;
+				//ANX7150_hdcp_init_done = 0;
+				//ANX7150_hdcp_wait_100ms_needed = 1; //update 080703
+		
+		     if(ANX7150_hdcp_encryption)
+            {
+                ANX7150_HDCP_Encryption_Disable();
+            }
+            if(!ANX7150_send_blue_screen)
+            {
+                ANX7150_Blue_Screen_Enable();
+            }
+            if(ANX7150_avmute_enable)
+            {
+                ANX7150_Clear_AVMute();
+            }
+            //disable audio
+            ANX7150_i2c_read_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, &c);
+            ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, c & (~ANX7150_HDMI_AUDCTRL1_IN_EN));
+
+			return;
+        }
+
+    }
+    else				//HDCP CTS
+    {
+		ANX7150_DEBUG("hdcp pin is off.");
+		if(ANX7150_send_blue_screen)
+		{
+			ANX7150_Blue_Screen_Disable();
+		}
+		if(ANX7150_avmute_enable)
+		{
+			ANX7150_Clear_AVMute();
+		}
+		//enable audio SY.
+		ANX7150_i2c_read_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, &c);
+		c |= ANX7150_HDMI_AUDCTRL1_IN_EN;
+		ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, c);
+	}
+
+//HDCP CTS
+		ANX7150_i2c_read_p0_reg(ANX7150_SYS_CTRL1_REG, &c); //72:07.1 hdmi or dvi mode
+    	c = c & 0x02;
+    	if(c == 0x02)
+		{
+      		ANX7150_DEBUG("end of ANX7150_HDCP_Process(): in HDMI mode.");
+		}
+    	else
+    	{
+			ANX7150_DEBUG("!end of ANX7150_HDCP_Process(): in DVI mode.");
+			//To-Do: Config to DVI mode.
+    	}
+		ANX7150_Set_System_State(ANX7150_PLAY_BACK);
+		ANX7150_Show_Video_Parameter();
+//HDCP CTS
+                
+}
+//******************** end of HDCP process ********************************
+
+
+//************************Play back process   **************************
+void ANX7150_PLAYBACK_Process(void)
+{
+    BYTE c;
+        ANX7150_DEBUG("####ANX7150_PLAYBACK_Process enter\n");
+    if((s_ANX7150_packet_config.packets_need_config != 0x00) && (ANX7150_edid_result.is_HDMI == 1))
+    {
+        ANX7150_DEBUG("####ANX7150_PLAYBACK_Process CONFIG PACKETS\n");
+        ANX7150_Set_System_State(ANX7150_CONFIG_PACKETS);
+    }
+    
+}
+//******************** end of Play back process ********************************
+
+void ANX7150_RST_DDCChannel(void)
+{
+    BYTE c;
+    //Reset the DDC channel
+    ANX7150_i2c_read_p0_reg(ANX7150_SYS_CTRL2_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_SYS_CTRL2_REG, (c | ANX7150_SYS_CTRL2_DDC_RST));
+    ANX7150_i2c_write_p0_reg(ANX7150_SYS_CTRL2_REG, (c & (~ANX7150_SYS_CTRL2_DDC_RST)));
+    ANX7150_i2c_write_p0_reg(ANX7150_DDC_ACC_CMD_REG, 0x00); //abort current operation
+    ANX7150_i2c_write_p0_reg(ANX7150_DDC_ACC_CMD_REG, 0x06);//reset I2C command
+//Clear FIFO
+    ANX7150_i2c_write_p0_reg(ANX7150_DDC_ACC_CMD_REG, 0x05);
+}
+
+
+BYTE ANX7150_BKSV_SRM(void) 
+{
+
+    #if 1
+    BYTE bksv[5],i,bksv_one,c1;
+    ANX7150_InitDDC_Read(0x74, 0x00, 0x00, 0x05, 0x00);
+    msleep(15);
+    for(i = 0; i < 5; i ++)
+    {
+         ANX7150_i2c_read_p0_reg(ANX7150_DDC_FIFO_ACC_REG, &bksv[i]);      
+    }
+    
+    bksv_one = 0;
+    for(i = 0; i < 8; i++)
+    {
+        c1 = 0x01 << i;
+        if(bksv[0] & c1)
+            bksv_one ++;
+        if(bksv[1] & c1)
+            bksv_one ++;
+        if(bksv[2] & c1)
+            bksv_one ++;
+        if(bksv[3] & c1)
+            bksv_one ++;
+        if(bksv[4] & c1)
+            bksv_one ++;
+    }
+    //HDCP CTS
+    if(bksv_one != 20)
+    {
+        ANX7150_DEBUG("BKSV check fail");
+        return 0;
+    }
+    else
+    {
+		ANX7150_DEBUG("BKSV check OK");
+    	return 1;
+	}
+    #endif
+
+#if 0//HDCP CTS
+
+    BYTE i,j,bksv_ones_count,bksv_data[Bksv_Data_Nums] = {0};
+    ANX7150_DDC_Addr bksv_ddc_addr;
+    WORD bksv_length;
+    ANX7150_DDC_Type ddc_type;
+
+    i = 0;
+    j = 0;
+    bksv_ones_count = 0;
+    bksv_ddc_addr.dev_addr = HDCP_Dev_Addr;
+    bksv_ddc_addr.sgmt_addr = 0;
+    bksv_ddc_addr.offset_addr = HDCP_Bksv_Offset;
+    bksv_length = Bksv_Data_Nums;
+    ddc_type = DDC_Hdcp;
+    
+    if (!ANX7150_DDC_Read(bksv_ddc_addr, bksv_data, bksv_length, ddc_type)){
+        /*Judge validity for Bksv*/
+        while (i < Bksv_Data_Nums){
+            while (j < 8){
+                if (((bksv_data[i] >> j) & 0x01) == 1){
+                    bksv_ones_count++;
+                }
+                j++;
+                }
+            i++;
+            j = 0;
+            }
+        if (bksv_ones_count != 20){
+            ANX7150_DEBUG ("!!!!BKSV 1s ¡Ù20\n");					//update  ANX7150_DEBUG ("!!!!BKSV 1s ¡Ù20\n");
+            return 0;
+        }
+    }
+    /*end*/
+  
+    ANX7150_DEBUG("bksv is ready.");
+    // TODO: Compare the bskv[] value to the revocation list to decide if this value is a illegal BKSV. This is system depended.
+    //If illegal, return 0; legal, return 1. Now just return 1
+    return 1;
+    #endif
+}
+
+BYTE ANX7150_IS_KSVList_VLD(void)
+{
+//HDCP CTS
+#if 1
+    ANX7150_DEBUG("ANX7150_IS_KSVList_VLD() is called.");
+    ANX7150_InitDDC_Read(0x74, 0x00, 0x41, 0x02, 0x00); //Bstatus, two bytes
+    msleep(5);
+    ANX7150_i2c_read_p0_reg(ANX7150_DDC_FIFO_ACC_REG, &ANX7150_hdcp_bstatus[0]);
+    ANX7150_i2c_read_p0_reg(ANX7150_DDC_FIFO_ACC_REG, &ANX7150_hdcp_bstatus[1]);
+    if((ANX7150_hdcp_bstatus[0] & 0x80) | (ANX7150_hdcp_bstatus[1] & 0x08))
+    {
+        ANX7150_DEBUG("Max dev/cascade exceeded: ANX7150_hdcp_bstatus[0]: 0x%x,ANX7150_hdcp_bstatus[1]:0x%x\n", (WORD)ANX7150_hdcp_bstatus[0],(WORD)ANX7150_hdcp_bstatus[1]);
+        return 0;//HDCP topology error. More than 127 RX are attached or more than seven levels of repeater are cascaded.
+	}
+	return 1;
+   #endif
+//HDCP CTS
+
+    
+}
+
+void ANX7150_Hardware_HDCP_Auth_Init(void) 
+{
+    BYTE c;
+
+    #if 1
+    ANX7150_DDC_Type DDC_type;
+    ANX7150_DDC_Addr ddc_bcaps_address;
+    BYTE BCaps_Nums;
+    #endif
+    /*end*/
+    ANX7150_i2c_write_p0_reg(ANX7150_HDCP_CTRL0_REG, 0x00);  
+    // disable hdcp
+    ANX7150_i2c_read_p0_reg(ANX7150_HDCP_CTRL0_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_HDCP_CTRL0_REG, (c & (~ANX7150_HDCP_CTRL0_HW_AUTHEN)));
+    
+
+   #if 0
+    // DDC reset
+    ANX7150_RST_DDCChannel();
+
+    ANX7150_InitDDC_Read(0x74, 0x00, 0x40, 0x01, 0x00);
+    msleep(5);
+    ANX7150_i2c_read_p0_reg(ANX7150_DDC_FIFO_ACC_REG, &ANX7150_hdcp_bcaps);
+    ANX7150_DEBUG("ANX7150_hdcp_bcaps = 0x%.2x\n",
+    (WORD)ANX7150_hdcp_bcaps);
+    #endif
+
+
+    #if 1
+    DDC_type = DDC_Hdcp;
+    ddc_bcaps_address.dev_addr = HDCP_Dev_Addr;
+    ddc_bcaps_address.sgmt_addr = 0;
+    ddc_bcaps_address.offset_addr = HDCP_Bcaps_Offset;
+    BCaps_Nums = 1;
+
+    if (!ANX7150_DDC_Read(ddc_bcaps_address, &ANX7150_hdcp_bcaps, BCaps_Nums, DDC_type)){
+            ANX7150_DEBUG ("!!!!ANX7150_hdcp_bcaps = 0x%.2x\n", (WORD)ANX7150_hdcp_bcaps);
+    }
+    #endif
+    /*end*/
+   
+    if(ANX7150_hdcp_bcaps & 0x02)  
+    {   //enable 1.1 feature
+        ANX7150_i2c_read_p0_reg(ANX7150_HDCP_CTRL1_REG, &c);
+        ANX7150_i2c_write_p0_reg(ANX7150_HDCP_CTRL1_REG, (c |ANX7150_HDCP_CTRL1_HDCP11_EN));
+    } 
+    else 
+    {   //disable 1.1 feature and enable HDCP two special point check
+        ANX7150_i2c_read_p0_reg(ANX7150_HDCP_CTRL1_REG, &c);
+        ANX7150_i2c_write_p0_reg(ANX7150_HDCP_CTRL1_REG, 
+                                                     (c & (~ANX7150_HDCP_CTRL1_HDCP11_EN) | ANX7150_LINK_CHK_12_EN));
+    }
+    ANX7150_RST_DDCChannel();
+    ANX7150_hdcp_auth_en = 0;
+}
+
+
+void ANX7150_Clean_HDCP(void)
+{
+    BYTE c;
+    //mute TMDS link
+    //ANX7150_i2c_read_p0_reg(ANX7150_TMDS_CLKCH_CONFIG_REG, &c);
+    //ANX7150_i2c_write_p0_reg(ANX7150_TMDS_CLKCH_CONFIG_REG, c & (~ANX7150_TMDS_CLKCH_MUTE));
+
+    //Disable hardware HDCP
+    ANX7150_i2c_read_p0_reg(ANX7150_HDCP_CTRL0_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_HDCP_CTRL0_REG, (c & (~ANX7150_HDCP_CTRL0_HW_AUTHEN)));
+
+    //Reset HDCP logic
+    ANX7150_i2c_read_p0_reg(ANX7150_SRST_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_SRST_REG, (c | ANX7150_SRST_HDCP_RST) );
+    ANX7150_i2c_write_p0_reg(ANX7150_SRST_REG, (c & (~ANX7150_SRST_HDCP_RST)) );
+    
+    //Set ReAuth
+    ANX7150_i2c_read_p0_reg(ANX7150_HDCP_CTRL0_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_HDCP_CTRL0_REG, c |ANX7150_HDCP_CTRL0_RE_AUTH);
+    ANX7150_i2c_write_p0_reg(ANX7150_HDCP_CTRL0_REG, c & (~ANX7150_HDCP_CTRL0_RE_AUTH));
+    ANX7150_hdcp_auth_en = 0;
+    //ANX7150_bksv_ready = 0;
+    ANX7150_hdcp_auth_pass = 0;
+    ANX7150_hdcp_auth_fail_counter =0 ;
+    ANX7150_hdcp_encryption = 0;
+    ANX7150_send_blue_screen = 0;
+    ANX7150_hdcp_init_done = 0;
+    ANX7150_hdcp_wait_100ms_needed = 1;
+    ANX7150_auth_fully_pass = 0;
+    ANX7150_srm_checked = 0;
+    ANX7150_RST_DDCChannel();      
+}
+
+void ANX7150_Hardware_Reset() 
+{
+
+//    ANX7150_Resetn_Pin = 0;
+//    msleep(20);
+//    ANX7150_Resetn_Pin = 1;
+//    msleep(10);
+
+    //ANX7150_DEBUG("ANX7150 hardware reset OK");
+     ANX7150_i2c_write_p0_reg( 0x08, 0x01);
+     msleep(30);
+     ANX7150_DEBUG("ANX7150 hardware reset OK\n");
+
+}
+
+void ANX7150_Set_System_State(BYTE ss) 
+{
+    ANX7150_system_state = ss;
+    ANX7150_DEBUG("ANX7150 To System State: ");
+    switch (ss) 
+    {
+        case ANX7150_INITIAL:
+            ANX7150_DEBUG("ANX7150_INITIAL");
+            break;
+        case ANX7150_WAIT_HOTPLUG: 
+            ANX7150_DEBUG("ANX7150_WAIT_HOTPLUG");
+            break;
+        case ANX7150_READ_PARSE_EDID:
+            ANX7150_DEBUG("ANX7150_READ_PARSE_EDID");
+            break;
+        case ANX7150_WAIT_RX_SENSE:
+            ANX7150_DEBUG("ANX7150_WAIT_RX_SENSE");
+            break;
+        case ANX7150_CONFIG_VIDEO:
+            ANX7150_DEBUG("ANX7150_CONFIG_VIDEO");
+            break;
+        case ANX7150_CONFIG_AUDIO:
+            ANX7150_DEBUG("ANX7150_CONFIG_AUDIO");
+            break;
+        case ANX7150_CONFIG_PACKETS:
+            ANX7150_DEBUG("ANX7150_CONFIG_PACKETS");
+            break;		
+        case ANX7150_HDCP_AUTHENTICATION:
+            ANX7150_DEBUG("ANX7150_HDCP_AUTHENTICATION");
+            break;
+        ////////////////////////////////////////////////
+        // System ANX7150_RESET_LINK is kept for RX clock recovery error case, not used in normal case.
+        case ANX7150_RESET_LINK:
+            ANX7150_DEBUG("ANX7150_RESET_LINK");
+            break;
+        ////////////////////////////////////////////////        
+        case ANX7150_PLAY_BACK:
+            ANX7150_DEBUG("ANX7150_PLAY_BACK");
+            break;
+    }	
+}
+
+void ANX7150_Hardware_Initial() 
+{
+    BYTE c;
+    ANX7150_DEBUG("+++ANX7150_Hardware_Initial+++\n");
+    ANX7150_Hardware_Reset();
+    //Power on I2C
+    //ANX7150_i2c_read_p0_reg(ANX7150_SYS_CTRL3_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_SYS_CTRL3_REG, 0x02);//(c | ANX7150_SYS_CTRL3_I2C_PWON));
+
+    ANX7150_i2c_write_p0_reg(ANX7150_SYS_CTRL2_REG, 0x00);
+    ANX7150_i2c_write_p0_reg(ANX7150_SRST_REG, 0x00);
+    //clear HDCP_HPD_RST
+    ANX7150_i2c_read_p0_reg(ANX7150_SYS_CTRL1_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_SYS_CTRL1_REG, c & 0xbf);
+    //Power on Audio capture and Video capture module clock
+    ANX7150_i2c_read_p0_reg(ANX7150_SYS_PD_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_SYS_PD_REG, (c | 0x06));
+    
+
+    //Enable auto set clock range for video PLL
+    ANX7150_i2c_read_p0_reg(ANX7150_CHIP_CTRL_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_CHIP_CTRL_REG, (c & 0xfe));
+
+    //Set registers value of Blue Screen when HDCP authentication failed--RGB mode,green field
+    ANX7150_i2c_write_p0_reg(ANX7150_HDCP_BLUESCREEN0_REG, 0x10);
+    ANX7150_i2c_write_p0_reg(ANX7150_HDCP_BLUESCREEN1_REG, 0xeb);
+    ANX7150_i2c_write_p0_reg(ANX7150_HDCP_BLUESCREEN2_REG, 0x10);
+
+        ANX7150_DEBUG("ANX7150_Hardware_Initial--->|||||||||0x80\n");   
+	ANX7150_i2c_read_p0_reg(ANX7150_TMDS_CLKCH_CONFIG_REG, &c);
+        ANX7150_DEBUG("ANX7150_TMDS_CLKCH_CONFIG_REG=%x\n",c);   
+    ANX7150_i2c_write_p0_reg(ANX7150_TMDS_CLKCH_CONFIG_REG, (c | 0x80));
+		
+    ANX7150_i2c_read_p0_reg(ANX7150_PLL_CTRL0_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_PLL_CTRL0_REG, 0xa8);//(c & 0xf3)); //change to 0xa8
+
+	ANX7150_i2c_read_p0_reg(ANX7150_PLL_TX_AMP, &c);
+	ANX7150_i2c_write_p0_reg(ANX7150_PLL_TX_AMP, (c | 0x01));//TMDS swing
+
+	ANX7150_i2c_write_p0_reg(ANX7150_PLL_CTRL1_REG,0x00);//Added for PLL unlock issue in high temperature - Feiw
+    //if (ANX7150_AUD_HW_INTERFACE == 0x02) //spdif
+    if((QFN48_EN ==1) && (s_ANX7150_audio_config.audio_type == 0x02))
+    {
+			ANX7150_i2c_read_p0_reg(ANX7150_I2S_CTRL_REG, &c);//for spdif input from SD0.
+			ANX7150_i2c_write_p0_reg(ANX7150_I2S_CTRL_REG, (c | 0x10));//
+	}
+	else
+	{
+			ANX7150_i2c_read_p0_reg(ANX7150_I2S_CTRL_REG, &c);//for spdif input from SD0.
+			ANX7150_i2c_write_p0_reg(ANX7150_I2S_CTRL_REG, (c&  0xef));//
+	}
+
+		//ANX7150_i2c_read_p0_reg(ANX7150_SYS_CTRL1_REG, &c);
+		ANX7150_i2c_write_p0_reg(ANX7150_SYS_CTRL1_REG, 0);//c & 0xfb);//power down HDCP, 090630
+		ANX7150_i2c_read_p0_reg(ANX7150_SYS_CTRL3_REG, &c);
+		ANX7150_i2c_write_p0_reg(ANX7150_SYS_CTRL3_REG, c & 0xfe);//power down all, 090630
+	
+    ANX7150_Set_System_State(ANX7150_WAIT_HOTPLUG);
+    ANX7150_DEBUG("---ANX7150_Hardware_Initial---\n");
+}
+
+void ANX7150_API_Initial() 
+{
+    ANX7150_DEBUG("+++++++++++ANX7150_API_Initial()++++++++++ \n"); 
+    ANX7150_Variable_Initial(); 
+    ANX7150_HW_Interface_Variable_Initial();
+    ANX7150_Hardware_Initial();
+}
+ 
+/*void ANX7150_Interrupt_Information(BYTE c, BYTE n) 
+{
+    BYTE TX_is_HDMI,c1;
+    
+    ANX7150_i2c_read_p0_reg(ANX7150_SYS_CTRL1_REG, &c1);
+    TX_is_HDMI = c1 & 0x02;
+    
+    switch (n) 
+    {
+        case 1:
+            if (c & ANX7150_INTR1_STATUS_CLK_CHG)
+                ;//ANX7150_DEBUG("ANX7150_Int: Video input clock change detected.");
+            if ((c & ANX7150_INTR1_STATUS_CTS_OVRWR) && (TX_is_HDMI == 0x02))
+                ;//ANX7150_DEBUG("ANX7150_Int: Audio CTS is overwrite before sending by ACR packer.");
+            if (c & ANX7150_INTR1_STATUS_HP_CHG)
+                ANX7150_DEBUG("ANX7150_Int: Hotplug change detected.");
+            if (c & ANX7150_INTR1_STATUS_SW_INT)
+                ANX7150_DEBUG("ANX7150_Int: Software induced interrupt.");
+            if ((c & ANX7150_INTR1_STATUS_SPDIF_ERR)&& (TX_is_HDMI == 0x02))
+                ANX7150_DEBUG("ANX7150_Int: S/PDIF parity errors.");
+            if ((c & ANX7150_INTR1_STATUS_AFIFO_OVER)&& (TX_is_HDMI == 0x02))
+                ANX7150_DEBUG("ANX7150_Int: Audio FIFO is overrun.");
+            if ((c & ANX7150_INTR1_STATUS_AFIFO_UNDER)&& (TX_is_HDMI == 0x02))
+                ANX7150_DEBUG("ANX7150_Int: Audio FIFO is underrun.");
+            if ((c & ANX7150_INTR1_STATUS_CTS_CHG)&& (TX_is_HDMI == 0x02))
+                ANX7150_DEBUG("ANX7150_Int: Audio CTS changed.");
+            break;
+        case 2:
+            if (c & ANX7150_INTR2_STATUS_AUTH_DONE)
+                ANX7150_DEBUG("ANX7150_Int: HDCP authentication ended.");
+            if (c & ANX7150_INTR2_STATUS_AUTH_CHG)
+                ANX7150_DEBUG("ANX7150_Int: Hardware HDCP authentication state changed.");
+            if (c & ANX7150_INTR2_STATUS_SHA_DONE)
+                ANX7150_DEBUG("ANX7150_Int: Hardware HDCP computing V ended.");
+            if (c & ANX7150_INTR2_STATUS_PLLLOCK_CHG)
+                ANX7150_DEBUG("ANX7150_Int: PLL clock state changed.");
+            if (c & ANX7150_INTR2_STATUS_BKSV_RDY)
+                ANX7150_DEBUG("ANX7150_Int: BKSV ready for check.");
+            if (c & ANX7150_INTR2_STATUS_HDCPENHC_CHK)
+                ANX7150_DEBUG("ANX7150_Int: Enhanced link verification is need.");
+            if (c & ANX7150_INTR2_STATUS_HDCPLINK_CHK)
+                ANX7150_DEBUG("ANX7150_Int: Link integrity check is need.");
+            if (c & ANX7150_INTR2_STATUS_ENCEN_CHG)
+                //ANX7150_DEBUG("ANX7150_Int: ENC_EN changed detected.");
+            break;
+        case 3:
+            if ((c & ANX7150_INTR3_STATUS_SPDIF_UNSTBL)&& (TX_is_HDMI == 0x02))
+                ANX7150_DEBUG("ANX7150_Int: Not find expected preamble for SPDIF input.");
+            if (c & ANX7150_INTR3_STATUS_RXSEN_CHG)
+                ANX7150_DEBUG("ANX7150_Int: Receiver active sense changed.");
+            if (c & ANX7150_INTR3_STATUS_VSYNC_DET)
+                ANX7150_DEBUG("ANX7150_Int: VSYNC active edge detected.");
+            if (c & ANX7150_INTR3_STATUS_DDC_NOACK)
+                ANX7150_DEBUG("ANX7150_Int: DDC master not detected any ACK.");
+            if (c & ANX7150_INTR3_STATUS_DDCACC_ERR)
+                ANX7150_DEBUG("ANX7150_Int: DDC channel access error.");
+            if ((c & ANX7150_INTR3_STATUS_AUDCLK_CHG)&& (TX_is_HDMI == 0x02))
+                ANX7150_DEBUG("ANX7150_Int: Audio input clock changed.");
+            if (c & ANX7150_INTR3_STATUS_VIDF_CHG)
+                ANX7150_DEBUG("ANX7150_Int: Video input format changed.");
+            if ((c & ANX7150_INTR3_STATUS_SPDIFBI_ERR )&& (TX_is_HDMI == 0x02))
+                ANX7150_DEBUG("ANX7150_Int: SPDIF bi-phase error.");
+            break;
+    }
+}
+*/
+BYTE int_s1, int_s2, int_s3;
+
+
+/*
+Please check programmer guide Revision 0.93 page 23 for flow chart
+*/
+ void ANX7150_Interrupt_Process() 
+ {
+    BYTE c,c1;
+
+ANX7150_DEBUG("##Inside ANX7150_Interrupt_Process, ANX7150_system_state=%x\n",ANX7150_system_state);
+		    if((ANX7150_system_state == ANX7150_INITIAL) || (ANX7150_system_state == ANX7150_WAIT_HOTPLUG))
+		        return;
+
+		/*
+		    if(ANX7150_system_state == ANX7150_WAIT_HOTPLUG)
+		    {
+		        ANX7150_i2c_read_p0_reg(ANX7150_INTR_STATE_REG, &c);
+		        if(c & 0x01)
+		        	{
+						ANX7150_i2c_read_p0_reg(ANX7150_SYS_CTRL3_REG, &c);
+				        ANX7150_i2c_write_p0_reg(ANX7150_SYS_CTRL3_REG, c | 0x01);//power up all, 090630
+						HDMI_RX_ReadI2C_RX0(HDMI_RX_SYS_PWDN2_REG, &c);	//en output of 8770,
+					    HDMI_RX_WriteI2C_RX0(HDMI_RX_SYS_PWDN2_REG, c & 0xf8);
+								
+			            ANX7150_Hotplug_Change_Interrupt();
+
+					}
+		    }
+		    */
+		    //else 
+		    {
+
+		        if(int_s1 & ANX7150_INTR1_STATUS_HP_CHG)
+		            ANX7150_Hotplug_Change_Interrupt();
+
+		        //if(int_s1 & ANX7150_INTR1_STATUS_CLK_CHG) 
+		            //ANX7150_Video_Clock_Change_Interrupt();
+
+		        if(int_s3 & ANX7150_INTR3_STATUS_VIDF_CHG) 
+		            ANX7150_Video_Format_Change_Interrupt();
+
+		        if(int_s2 & ANX7150_INTR2_STATUS_AUTH_DONE) 
+		            ANX7150_Auth_Done_Interrupt();
+
+		        if(int_s2 & ANX7150_INTR2_STATUS_AUTH_CHG) 
+		            ANX7150_Auth_Change_Interrupt();
+
+		        ANX7150_i2c_read_p0_reg(ANX7150_SYS_CTRL1_REG, &c);
+		        c = c & 0x02;          // HDMI mode
+		        if(c == 0x02)
+		        {
+		            //if(int_s3 & ANX7150_INTR3_STATUS_AUDCLK_CHG)
+		                //ANX7150_Audio_CLK_Change_Interrupt();
+		            if(int_s1 & ANX7150_INTR1_STATUS_AFIFO_OVER)
+		                ANX7150_AFIFO_Overrun_Interrupt();
+
+		          // SPDIF error
+		            if((int_s3 & 0x81) || (int_s1 & ANX7150_INTR1_STATUS_SPDIF_ERR))
+		            {
+		                ANX7150_i2c_read_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, &c1);
+		                if( c1 & ANX7150_HDMI_AUDCTRL1_SPDIFIN_EN)    
+		                {
+		                    ANX7150_SPDIF_Error_Interrupt(int_s1,int_s3);
+		                }
+		            }
+		            else
+		            {
+		                if(spdif_error_cnt > 0 && ANX7150_system_state == ANX7150_PLAY_BACK)    spdif_error_cnt --;
+		                if(spdif_error_cnt > 0 && ANX7150_system_state < ANX7150_CONFIG_AUDIO)    spdif_error_cnt = 0x00;
+		            }
+		        }
+
+		        if(int_s2 & ANX7150_INTR2_STATUS_PLLLOCK_CHG)
+		            ANX7150_PllLock_Interrupt();
+
+		        if(int_s3 & ANX7150_INTR3_STATUS_RXSEN_CHG)
+		        {
+		            ANX7150_Rx_Sense_Interrupt(); //060819
+		        }
+
+				if(int_s2 & ANX7150_INTR2_STATUS_HDCPLINK_CHK)
+				{
+					  if(ANX7150_HDCP_enable)
+		            		ANX7150_HDCPLINK_CHK_Interrupt();
+				}
+
+		    }
+		
+    //}
+}
+
+
+BYTE ANX7150_Parse_EDID(void)
+{
+    BYTE i;
+    ANX7150_GetEDIDLength();
+
+    ANX7150_DEBUG("EDIDLength is %.u\n",  ANX7150_edid_length);
+
+    ANX7150_Read_EDID();
+
+    if(!(ANX7150_Parse_EDIDHeader()))
+    {	
+        ANX7150_DEBUG("BAD EDID Header, Stop parsing \n");
+        ANX7150_edid_result.edid_errcode = ANX7150_EDID_BadHeader;
+        return ANX7150_edid_result.edid_errcode;
+    }
+
+    if(!(ANX7150_Parse_EDIDVersion()))
+    {
+        ANX7150_DEBUG("EDID does not support 861B, Stop parsing\n");
+        ANX7150_edid_result.edid_errcode = ANX7150_EDID_861B_not_supported;
+        return ANX7150_edid_result.edid_errcode;
+    }
+		
+    if(ANX7150_EDID_Checksum(0) == 0)
+    {
+        ANX7150_DEBUG("EDID Block one check sum error, Stop parsing\n");
+        ANX7150_edid_result.edid_errcode = ANX7150_EDID_CheckSum_ERR;
+        return ANX7150_edid_result.edid_errcode;
+    }
+
+    //ANX7150_Parse_BasicDis();
+    ANX7150_Parse_DTDinBlockONE();
+    if(ANX7150_EDID_Buf[0x7e] == 0)
+    {
+        ANX7150_DEBUG("No EDID extension blocks.\n");
+        ANX7150_edid_result.edid_errcode = ANX7150_EDID_No_ExtBlock;
+        return ANX7150_edid_result.edid_errcode;
+    }
+    ANX7150_Parse_NativeFormat();
+    ANX7150_Parse_ExtBlock();
+
+    if(ANX7150_edid_result.edid_errcode == 0x05)
+        return ANX7150_edid_result.edid_errcode;
+
+    if(ANX7150_edid_result.edid_errcode == 0x03)
+        return ANX7150_edid_result.edid_errcode;
+
+    ANX7150_DEBUG("EDID parsing finished!\n");
+
+	{
+        ANX7150_DEBUG("ANX7150_edid_result.edid_errcode = 0x%.2x\n",(WORD)ANX7150_edid_result.edid_errcode);
+        ANX7150_DEBUG("ANX7150_edid_result.is_HDMI = 0x%.2x\n",(WORD)ANX7150_edid_result.is_HDMI);
+        ANX7150_DEBUG("ANX7150_edid_result.ycbcr422_supported = 0x%.2x\n",(WORD)ANX7150_edid_result.ycbcr422_supported);
+        ANX7150_DEBUG("ANX7150_edid_result.ycbcr444_supported = 0x%.2x\n",(WORD)ANX7150_edid_result.ycbcr444_supported);
+        ANX7150_DEBUG("ANX7150_edid_result.supported_1080i_60Hz = 0x%.2x\n",(WORD)ANX7150_edid_result.supported_1080i_60Hz);
+        ANX7150_DEBUG("ANX7150_edid_result.supported_1080i_50Hz = 0x%.2x\n",(WORD)ANX7150_edid_result.supported_1080i_50Hz);
+        ANX7150_DEBUG("ANX7150_edid_result.supported_720p_60Hz = 0x%.2x\n",(WORD)ANX7150_edid_result.supported_720p_60Hz);
+        ANX7150_DEBUG("ANX7150_edid_result.supported_720p_50Hz = 0x%.2x\n",(WORD)ANX7150_edid_result.supported_720p_50Hz);
+        ANX7150_DEBUG("ANX7150_edid_result.supported_640x480p_60Hz = 0x%.2x\n",(WORD)ANX7150_edid_result.supported_640x480p_60Hz); 
+        ANX7150_DEBUG("ANX7150_edid_result.supported_720x480p_60Hz = 0x%.2x\n",(WORD)ANX7150_edid_result.supported_720x480p_60Hz); 
+        ANX7150_DEBUG("ANX7150_edid_result.supported_720x480i_60Hz = 0x%.2x\n",(WORD)ANX7150_edid_result.supported_720x480i_60Hz);   
+        ANX7150_DEBUG("ANX7150_edid_result.supported_576p_50Hz = 0x%.2x\n",(WORD)ANX7150_edid_result.supported_576p_50Hz);
+        ANX7150_DEBUG("ANX7150_edid_result.supported_576i_50Hz = 0x%.2x\n",(WORD)ANX7150_edid_result.supported_576i_50Hz);       
+    if(!ANX7150_edid_result.edid_errcode)
+    {
+        for(i = 0; i < ANX7150_sau_length/3; i++)
+        {
+            ANX7150_DEBUG("ANX7150_edid_result.AudioChannel = 0x%.2x\n",(WORD)ANX7150_edid_result.AudioChannel[i]);
+            ANX7150_DEBUG("ANX7150_edid_result.AudioFormat = 0x%.2x\n",(WORD)ANX7150_edid_result.AudioFormat[i]);
+            ANX7150_DEBUG("ANX7150_edid_result.AudioFs = 0x%.2x\n",(WORD)ANX7150_edid_result.AudioFs[i]);
+            ANX7150_DEBUG("ANX7150_edid_result.AudioLength = 0x%.2x\n",(WORD)ANX7150_edid_result.AudioLength[i]);
+        }
+        ANX7150_DEBUG("ANX7150_edid_result.SpeakerFormat = 0x%.2x\n",(WORD)ANX7150_edid_result.SpeakerFormat);
+    }
+}
+}
+
+void ANX7150_GetEDIDLength()
+{
+    BYTE edid_data_length;
+
+    ANX7150_RST_DDCChannel();
+
+     ANX7150_InitDDC_Read(0xa0, 0x00, 0x7e, 0x01, 0x00);
+     /*ANX7150_i2c_read_p0_reg(ANX7150_DDC_FIFOCNT_REG, &c);
+	 while(c==0)
+	 	ANX7150_i2c_read_p0_reg(ANX7150_DDC_FIFOCNT_REG, &c);*/
+	 	msleep(10);
+	 
+    ANX7150_i2c_read_p0_reg(ANX7150_DDC_FIFO_ACC_REG, &edid_data_length);
+
+    ANX7150_edid_length = edid_data_length * 128 + 128;
+
+}
+void ANX7150_Read_EDID(void) 
+{
+    BYTE edid_segment,segmentpointer,k;
+
+    ANX7150_RST_DDCChannel();
+
+    edid_segment = ANX7150_edid_length / 256;
+	if(edid_segment==0)																			//update
+ 		segmentpointer =0;
+    else 
+        segmentpointer = edid_segment - 1;
+    //segmentpointer = edid_segment - 1;
+    
+    for(k = 0; k <= segmentpointer; k ++)
+    {
+        ANX7150_InitDDC_Read(0xa0, k, 0x00, 0x80, 0x00);
+        ANX7150_DDC_Mass_Read(128, k);
+        ANX7150_InitDDC_Read(0xa0, k, 0x80, 0x80, 0x00);
+        ANX7150_DDC_Mass_Read(128, k + 1);
+    }
+
+    if((ANX7150_edid_length - 256 * edid_segment) == 0)
+        ANX7150_DEBUG("Finish reading EDID");
+    else
+    {
+        ANX7150_DEBUG("Read one more block(128 bytes).........");
+        ANX7150_InitDDC_Read(0xa0, segmentpointer + 1, 0x00, 0x80, 0x00);
+        ANX7150_DDC_Mass_Read(128, segmentpointer + 1);
+        ANX7150_DEBUG("Finish reading EDID");
+    }
+}
+
+
+void ANX7150_DDC_Mass_Read(WORD length, BYTE segment)
+{
+    WORD i, j;    
+    BYTE c, c1,ddc_empty_cnt;
+
+    i = length;
+    while (i > 0) 
+    {
+        //check DDC FIFO statue
+        ANX7150_i2c_read_p0_reg(ANX7150_DDC_CHSTATUS_REG, &c);
+        if(c & ANX7150_DDC_CHSTATUS_DDC_OCCUPY)
+        {
+            //ANX7150_DEBUG("ANX7150 DDC channel is accessed by an external device, break!.");
+            break;
+        }
+        if(c & ANX7150_DDC_CHSTATUS_FIFO_FULL)
+            ANX7150_ddc_fifo_full = 1;
+        else 
+            ANX7150_ddc_fifo_full = 0;
+        if(c & ANX7150_DDC_CHSTATUS_INPRO)
+            ANX7150_ddc_progress = 1;
+        else
+            ANX7150_ddc_progress = 0;
+        if(ANX7150_ddc_fifo_full) 
+        {
+            //ANX7150_DEBUG("DDC FIFO is full during edid reading");
+            ANX7150_i2c_read_p0_reg(ANX7150_DDC_FIFOCNT_REG, &c);
+            //ANX7150_DEBUG("FIFO counter is %.2x\n", (WORD) c);
+            for(j=0; j<c; j++) 
+            {
+                ANX7150_i2c_read_p0_reg(ANX7150_DDC_FIFO_ACC_REG, &c1);
+				  if(segment == 0)
+				  	{
+						ANX7150_EDID_Buf[length - i + j] = c1;
+						//ANX7150_DEBUG("EDID[0x%.2x]=0x%.2x    ", (WORD)(length - i + j), (WORD) c1);
+				  	}
+				  else if(segment == 1)
+				  	{
+						ANX7150_EDID_Buf[length - i + j + 0x80] = c1;
+						//ANX7150_DEBUG("EDID[0x%.2x]=0x%.2x    ", (WORD)(length - i + j + 0x80), (WORD) c1);
+				  	}
+                
+                ANX7150_ddc_fifo_full = 0;
+            }
+			  i = i - c;
+            //ANX7150_DEBUG("\n");
+        } 
+        else if(!ANX7150_ddc_progress) 
+        {
+            //ANX7150_DEBUG("ANX7150 DDC FIFO access finished.");
+            ANX7150_i2c_read_p0_reg(ANX7150_DDC_FIFOCNT_REG, &c);
+            //ANX7150_DEBUG("FIFO counter is %.2x\n", (WORD) c);
+            if(!c)
+            {
+                i =0;
+                break;
+            }
+            for(j=0; j<c; j++) 
+            {
+                ANX7150_i2c_read_p0_reg(ANX7150_DDC_FIFO_ACC_REG, &c1);
+				  if(segment == 0)
+				  	{
+						ANX7150_EDID_Buf[length - i + j] = c1;
+						//ANX7150_DEBUG("EDID[0x%.2x]=0x%.2x    ", (WORD)(length - i + j), (WORD) c1);
+				  	}
+				  else if(segment == 1)
+				  	{
+						ANX7150_EDID_Buf[length - i + j + 0x80] = c1;
+						//ANX7150_DEBUG("EDID[0x%.2x]=0x%.2x    ", (WORD)(length - i + j + 0x80), (WORD) c1);
+				  	}
+            }
+            i = i - c;
+            //ANX7150_DEBUG("\ni=%d\n", i);
+        } 
+        else 
+        {
+            ddc_empty_cnt = 0x00;
+            for(c1=0; c1<0x0a; c1++)
+            {
+                ANX7150_i2c_read_p0_reg(ANX7150_DDC_CHSTATUS_REG, &c);
+                //ANX7150_DEBUG("DDC FIFO access is progressing.");
+                //ANX7150_DEBUG("DDC Channel status is 0x%.2x\n",(WORD)c);
+                if(c & ANX7150_DDC_CHSTATUS_FIFO_EMPT)
+                    ddc_empty_cnt++;
+                msleep(5);
+                //ANX7150_DEBUG("ddc_empty_cnt =  0x%.2x\n",(WORD)ddc_empty_cnt);
+            }
+            if(ddc_empty_cnt >= 0x0a)
+            i = 0;
+        }
+    }
+}
+
+
+BYTE ANX7150_Parse_EDIDHeader(void)
+{
+    BYTE i,temp;
+    temp = 0;
+    // the EDID header should begin with 0x00,0xff,0xff,0xff,0xff,0xff,0xff,0x00
+    if((ANX7150_Read_EDID_BYTE(0, 0) == 0x00) && (ANX7150_Read_EDID_BYTE(0, 7) == 0x00))
+    {
+        for(i = 1; i < 7; i++)
+        {
+            if(ANX7150_Read_EDID_BYTE(0, i) != 0xff)
+            {
+                temp = 0x01;
+                break;
+            }
+        }
+    }
+    else
+    {
+        temp = 0x01;
+    }
+    if(temp == 0x01)
+    {
+        return 0;
+    }
+    else
+    {
+        return 1;
+    }
+}
+BYTE ANX7150_Parse_EDIDVersion(void)
+{
+     
+    if(!((ANX7150_Read_EDID_BYTE(0, 0x12) == 1) && (ANX7150_Read_EDID_BYTE(0, 0x13) >= 3) ))
+    {	
+        return 0;
+    }
+    else
+    {	
+        return 1;
+    }
+}
+BYTE ANX7150_Parse_ExtBlock()
+{
+    BYTE i,c;
+
+    for(i = 0; i < ANX7150_Read_EDID_BYTE(0, 0x7e); i++)    //read in blocks
+    {
+        c = ANX7150_Read_EDID_BYTE(i/2, 0x80);
+        if( c == 0x02)
+        {
+            ANX7150_ext_block_num = i + 1;
+            ANX7150_Parse_DTDinExtBlock();
+            ANX7150_Parse_STD();
+            if(!(ANX7150_EDID_Checksum(ANX7150_ext_block_num)))
+            {
+                ANX7150_edid_result.edid_errcode = ANX7150_EDID_CheckSum_ERR;
+                return ANX7150_edid_result.edid_errcode;
+            }
+        }
+        else
+        {
+            ANX7150_edid_result.edid_errcode = ANX7150_EDID_ExtBlock_NotFor_861B;
+            return ANX7150_edid_result.edid_errcode;
+        }
+    }
+}
+void ANX7150_Parse_DTDinBlockONE()
+{
+    BYTE i;
+    for(i = 0; i < 18; i++)
+    {
+        ANX7150_edid_dtd[i] = ANX7150_Read_EDID_BYTE(0, (i + 0x36));
+    }
+    //ANX7150_DEBUG("Parse the first DTD in Block one:\n");
+    ANX7150_Parse_DTD();
+
+    if((ANX7150_Read_EDID_BYTE(0, 0x48) == 0) 
+    && (ANX7150_Read_EDID_BYTE(0, 0x49) == 0)
+    && (ANX7150_Read_EDID_BYTE(0, 0x4a) == 0))
+    {
+        ;//ANX7150_DEBUG("the second DTD in Block one is not used to descript video timing.\n");
+    }
+    else
+    {
+        for(i = 0; i < 18; i++)
+        {
+            ANX7150_edid_dtd[i] = ANX7150_Read_EDID_BYTE(0, (i + 0x48));
+        }
+        ANX7150_Parse_DTD();
+    }
+
+    if((ANX7150_Read_EDID_BYTE(0,0x5a) == 0)
+    && (ANX7150_Read_EDID_BYTE(0,0x5b) == 0)
+    && (ANX7150_Read_EDID_BYTE(0,0x5c) == 0))
+    {
+        ;//ANX7150_DEBUG("the third DTD in Block one is not used to descript video timing.\n");
+    }
+    else
+    {
+        for(i = 0; i < 18; i++)
+        {
+            ANX7150_edid_dtd[i] = ANX7150_Read_EDID_BYTE(0, (i + 0x5a));
+        }
+        ANX7150_Parse_DTD();
+    }
+
+    if((ANX7150_Read_EDID_BYTE(0,0x6c) == 0)
+    && (ANX7150_Read_EDID_BYTE(0,0x6d) == 0)
+    && (ANX7150_Read_EDID_BYTE(0,0x6e) == 0))
+    {
+        ;//ANX7150_DEBUG("the fourth DTD in Block one is not used to descript video timing.\n");
+    }
+    else
+    {
+        for(i = 0; i < 18; i++)
+        {
+            ANX7150_edid_dtd[i] = ANX7150_Read_EDID_BYTE(0,(i + 0x6c));
+        }
+        ANX7150_Parse_DTD();
+    }
+}
+
+void ANX7150_Parse_DTDinExtBlock()
+{
+    BYTE i,DTDbeginAddr;
+    DTDbeginAddr = ANX7150_Read_EDID_BYTE(ANX7150_ext_block_num/2, 0x82)
+    + 0x80;
+    while(DTDbeginAddr < (0x6c + 0x80))
+    {   
+        if((ANX7150_Read_EDID_BYTE(ANX7150_ext_block_num/2,DTDbeginAddr) == 0)
+        && (ANX7150_Read_EDID_BYTE(ANX7150_ext_block_num/2,(DTDbeginAddr + 1)) == 0)
+        && (ANX7150_Read_EDID_BYTE(ANX7150_ext_block_num/2,(DTDbeginAddr + 2)) == 0))
+        {
+            ;//ANX7150_DEBUG("this DTD in Extension Block is not used to descript video timing.\n");
+        }
+        else
+        {
+            for(i = 0; i < 18; i++)
+            {
+                ANX7150_edid_dtd[i] = ANX7150_Read_EDID_BYTE(ANX7150_ext_block_num/2,(i + DTDbeginAddr));
+            }
+            //ANX7150_DEBUG("Parse the DTD in Extension Block :\n");
+            ANX7150_Parse_DTD();
+        }
+        DTDbeginAddr = DTDbeginAddr + 18;
+    }
+}
+
+void ANX7150_Parse_DTD()
+{
+    WORD temp;
+    unsigned long temp1,temp2;
+    WORD Hresolution,Vresolution,Hblanking,Vblanking;
+    WORD PixelCLK,Vtotal,H_image_size,V_image_size;
+    BYTE Hz;
+    //float Ratio;
+    
+    temp = ANX7150_edid_dtd[1];
+    temp = temp << 8;
+    PixelCLK = temp + ANX7150_edid_dtd[0];
+    //	ANX7150_DEBUG("Pixel clock is 10000 * %u\n",  temp);
+
+    temp = ANX7150_edid_dtd[4];
+    temp = (temp << 4) & 0x0f00;
+    Hresolution = temp + ANX7150_edid_dtd[2];
+    //ANX7150_DEBUG("Horizontal Active is  %u\n",  Hresolution);
+
+    temp = ANX7150_edid_dtd[4];
+    temp = (temp << 8) & 0x0f00;
+    Hblanking = temp + ANX7150_edid_dtd[3];
+    //ANX7150_DEBUG("Horizontal Blanking is  %u\n",  temp);
+
+    temp = ANX7150_edid_dtd[7];
+    temp = (temp << 4) & 0x0f00;
+    Vresolution = temp + ANX7150_edid_dtd[5];
+   //ANX7150_DEBUG("Vertical Active is  %u\n",  Vresolution);
+
+    temp = ANX7150_edid_dtd[7];
+    temp = (temp << 8) & 0x0f00;
+    Vblanking = temp + ANX7150_edid_dtd[6];
+    //ANX7150_DEBUG("Vertical Blanking is  %u\n",  temp);
+
+    temp = ANX7150_edid_dtd[11];
+    temp = (temp << 2) & 0x0300;
+    temp = temp + ANX7150_edid_dtd[8];
+    //ANX7150_DEBUG("Horizontal Sync Offset is  %u\n",  temp);
+
+    temp = ANX7150_edid_dtd[11];
+    temp = (temp << 4) & 0x0300;
+    temp = temp + ANX7150_edid_dtd[9];
+    //ANX7150_DEBUG("Horizontal Sync Pulse is  %u\n",  temp);
+
+    temp = ANX7150_edid_dtd[11];
+    temp = (temp << 2) & 0x0030;
+    temp = temp + (ANX7150_edid_dtd[10] >> 4);
+    //ANX7150_DEBUG("Vertical Sync Offset is  %u\n",  temp);
+
+    temp = ANX7150_edid_dtd[11];
+    temp = (temp << 4) & 0x0030;
+    temp = temp + (ANX7150_edid_dtd[8] & 0x0f);
+    //ANX7150_DEBUG("Vertical Sync Pulse is  %u\n",  temp);
+
+    temp = ANX7150_edid_dtd[14];
+    temp = (temp << 4) & 0x0f00;
+    H_image_size = temp + ANX7150_edid_dtd[12];
+    //ANX7150_DEBUG("Horizontal Image size is  %u\n",  temp);
+
+    temp = ANX7150_edid_dtd[14];
+    temp = (temp << 8) & 0x0f00;
+    V_image_size = temp + ANX7150_edid_dtd[13];
+    //ANX7150_DEBUG("Vertical Image size is  %u\n",  temp);
+
+    //ANX7150_DEBUG("Horizontal Border is  %bu\n",  ANX7150_edid_dtd[15]);
+
+    //ANX7150_DEBUG("Vertical Border is  %bu\n",  ANX7150_edid_dtd[16]);
+    
+    temp1 = Hresolution + Hblanking;
+    Vtotal = Vresolution + Vblanking;
+    temp1 = temp1 * Vtotal;
+    temp2 = PixelCLK;
+    temp2 = temp2 * 10000;
+		if (temp1 == 0)																												//update
+       Hz=0;
+    else 
+        Hz = temp2 / temp1;
+    //Hz = temp2 / temp1;
+    if((Hz == 59) || (Hz == 60))
+    {
+        Hz = 60;
+        //ANX7150_DEBUG("_______________Vertical Active is  %u\n",  Vresolution);
+        if(Vresolution == 540)
+            ANX7150_edid_result.supported_1080i_60Hz = 1;
+        if(Vresolution == 1080)
+            ANX7150_edid_result.supported_1080p_60Hz = 1;
+        if(Vresolution == 720)
+            ANX7150_edid_result.supported_720p_60Hz = 1;
+        if((Hresolution == 640) && (Vresolution == 480))
+            ANX7150_edid_result.supported_640x480p_60Hz = 1;
+        if((Hresolution == 720) && (Vresolution == 480))
+            ANX7150_edid_result.supported_720x480p_60Hz = 1;
+        if((Hresolution == 720) && (Vresolution == 240))
+            ANX7150_edid_result.supported_720x480i_60Hz = 1;
+    }
+    if(Hz == 50)
+    {
+        //ANX7150_DEBUG("+++++++++++++++Vertical Active is  %u\n",  Vresolution);
+        if(Vresolution == 540)
+            ANX7150_edid_result.supported_1080i_50Hz = 1;
+        if(Vresolution == 1080)
+            ANX7150_edid_result.supported_1080p_50Hz = 1;
+        if(Vresolution == 720)
+            ANX7150_edid_result.supported_720p_50Hz = 1;
+        if(Vresolution == 576)
+            ANX7150_edid_result.supported_576p_50Hz = 1;
+        if(Vresolution == 288)
+            ANX7150_edid_result.supported_576i_50Hz = 1;
+    }
+    //ANX7150_DEBUG("Fresh rate :% bu Hz\n", Hz);
+    //Ratio = H_image_size;
+    //Ratio = Ratio / V_image_size;
+    //ANX7150_DEBUG("Picture ratio : %f \n", Ratio);
+}
+/*void ANX7150_Parse_BasicDis()
+{
+    BYTE temp;
+    temp = ANX7150_Read_EDID_BYTE(0,0x18) & 0x18;
+    	if(temp == 0x00)
+    	//ANX7150_DEBUG("EDID Display type: mon/gray display.\n");
+    else if(temp == 0x08)
+    	//ANX7150_DEBUG("EDID Display type: RGB color display.\n");
+    else if(temp == 0x10)
+    	//ANX7150_DEBUG("EDID Display type: non-RGB color display.\n");
+    else 
+    	//ANX7150_DEBUG("EDID Display type: Undefined.\n");
+    temp = ANX7150_Read_EDID_BYTE(0,0x18) & 0x02;
+    if(temp == 0x00)
+    	//ANX7150_DEBUG("EDID Preferred_timing: not supported.\n");
+    else
+    	//ANX7150_DEBUG("EDID Preferred_timing: supported.\n");
+}
+*/
+void ANX7150_Parse_NativeFormat()
+{
+    BYTE temp;
+    temp = ANX7150_Read_EDID_BYTE(0,0x83) & 0xf0;
+   /*if(temp & 0x80)
+    	;//ANX7150_DEBUG("DTV supports underscan.\n");
+    if(temp & 0x40)
+    	;//ANX7150_DEBUG("DTV supports BasicAudio.\n");*/
+    if(temp & 0x20)
+    {
+        //ANX7150_DEBUG("DTV supports YCbCr 4:4:4.\n");
+        ANX7150_edid_result.ycbcr444_supported= 1;
+    }
+    if(temp & 0x10)
+    {
+        //ANX7150_DEBUG("DTV supports YCbCr 4:2:2.\n");
+        ANX7150_edid_result.ycbcr422_supported= 1;
+    }
+}
+
+void ANX7150_Parse_STD()
+{
+    BYTE DTDbeginAddr;
+    ANX7150_stdaddr = 0x84;
+    DTDbeginAddr = ANX7150_Read_EDID_BYTE(ANX7150_ext_block_num/2,0x82) + 0x80;
+    // ANX7150_DEBUG("Video DTDbeginAddr Register :%.2x\n", (WORD) DTDbeginAddr);
+    while(ANX7150_stdaddr < DTDbeginAddr)
+    {
+        ANX7150_stdreg = ANX7150_Read_EDID_BYTE(ANX7150_ext_block_num/2,ANX7150_stdaddr); 
+        switch(ANX7150_stdreg & 0xe0) 
+        {
+            case 0x20:
+                ANX7150_Parse_AudioSTD();
+                ANX7150_sau_length = ANX7150_stdreg & 0x1f;
+                break;
+            case 0x40:
+               ANX7150_Parse_VideoSTD();
+                ANX7150_svd_length = ANX7150_stdreg & 0x1f;
+                break;
+            case 0x80:
+                ANX7150_Parse_SpeakerSTD();
+               break;
+            case 0x60:
+                ANX7150_Parse_VendorSTD();
+                break;
+            default:
+                break;
+        }
+        ANX7150_stdaddr = ANX7150_stdaddr + (ANX7150_stdreg & 0x1f) + 0x01;	
+    }
+}
+
+void ANX7150_Parse_AudioSTD()
+{
+    BYTE i,AudioFormat,STDReg_tmp,STDAddr_tmp;
+    STDReg_tmp = ANX7150_stdreg & 0x1f;
+    STDAddr_tmp = ANX7150_stdaddr + 1;
+    i = 0;
+    while(i < STDReg_tmp)
+    {
+        AudioFormat = (ANX7150_Read_EDID_BYTE(ANX7150_ext_block_num/2,STDAddr_tmp ) & 0xF8) >> 3;
+        ANX7150_edid_result.AudioChannel[i/3] = (ANX7150_Read_EDID_BYTE(ANX7150_ext_block_num/2,STDAddr_tmp) & 0x07) + 1;
+        ANX7150_edid_result.AudioFormat[i/3] = AudioFormat;
+        ANX7150_edid_result.AudioFs[i/3] = ANX7150_Read_EDID_BYTE(ANX7150_ext_block_num/2,(STDAddr_tmp + 1)) & 0x7f;
+
+        if(AudioFormat == 1)
+            ANX7150_edid_result.AudioLength[i/3] = ANX7150_Read_EDID_BYTE(ANX7150_ext_block_num/2,(STDAddr_tmp + 2)) & 0x07;
+        else
+            ANX7150_edid_result.AudioLength[i/3] = ANX7150_Read_EDID_BYTE(ANX7150_ext_block_num/2,(STDAddr_tmp + 2)) << 3;
+
+        i = i + 3;
+        STDAddr_tmp = STDAddr_tmp + 3;
+    }
+}
+
+void ANX7150_Parse_VideoSTD()
+{
+    BYTE i,STDReg_tmp,STDAddr_tmp;
+    BYTE SVD_ID[34];
+    STDReg_tmp = ANX7150_stdreg & 0x1f;
+    STDAddr_tmp = ANX7150_stdaddr + 1;
+       i = 0;
+    while(i < STDReg_tmp)
+    {
+        SVD_ID[i] = ANX7150_Read_EDID_BYTE(ANX7150_ext_block_num/2,STDAddr_tmp) & 0x7F;
+        //ANX7150_DEBUG("ANX7150_edid_result.SVD_ID[%.2x]=0x%.2x\n",(WORD)i,(WORD)ANX7150_edid_result.SVD_ID[i]);
+        //if(ANX7150_Read_EDID_BYTE(ANX7150_ext_block_num/2,STDAddr_tmp) & 0x80)
+        //    ANX7150_DEBUG(" Native mode");
+        if(SVD_ID[i] == 1)
+            ANX7150_edid_result.supported_640x480p_60Hz = 1;
+        else if(SVD_ID[i] == 4)
+            ANX7150_edid_result.supported_720p_60Hz = 1;
+        else if(SVD_ID[i] == 19)
+            ANX7150_edid_result.supported_720p_50Hz = 1;
+        else if(SVD_ID[i] == 16)
+            ANX7150_edid_result.supported_1080p_60Hz = 1;
+        else if(SVD_ID[i] == 31)
+            ANX7150_edid_result.supported_1080p_50Hz = 1;
+        else if(SVD_ID[i] == 5)
+            ANX7150_edid_result.supported_1080i_60Hz = 1;
+        else if(SVD_ID[i] == 20)
+            ANX7150_edid_result.supported_1080i_50Hz = 1;
+        else if((SVD_ID[i] == 2) ||(SVD_ID[i] == 3))
+            ANX7150_edid_result.supported_720x480p_60Hz = 1;
+        else if((SVD_ID[i] == 6) ||(SVD_ID[i] == 7))
+            ANX7150_edid_result.supported_720x480i_60Hz = 1;
+        else if((SVD_ID[i] == 17) ||(SVD_ID[i] == 18))
+            ANX7150_edid_result.supported_576p_50Hz = 1;
+        else if((SVD_ID[i] == 21) ||(SVD_ID[i] == 22))
+            ANX7150_edid_result.supported_576i_50Hz = 1;
+
+        i = i + 1;
+        STDAddr_tmp = STDAddr_tmp + 1;
+    }
+}
+
+void ANX7150_Parse_SpeakerSTD()
+{
+    ANX7150_edid_result.SpeakerFormat = ANX7150_Read_EDID_BYTE(ANX7150_ext_block_num/2,(ANX7150_stdaddr + 1)) ;
+}
+
+void ANX7150_Parse_VendorSTD()
+{
+    //BYTE c;
+    if((ANX7150_Read_EDID_BYTE(ANX7150_ext_block_num/2,(ANX7150_stdaddr + 1)) == 0x03) 
+    && (ANX7150_Read_EDID_BYTE(ANX7150_ext_block_num/2,(ANX7150_stdaddr + 2)) == 0x0c) 
+    && (ANX7150_Read_EDID_BYTE(ANX7150_ext_block_num/2,(ANX7150_stdaddr + 3)) == 0x00))
+    {
+        ANX7150_edid_result.is_HDMI = 1;
+        //ANX7150_i2c_read_p0_reg(ANX7150_SYS_CTRL1_REG, &c);
+        //ANX7150_i2c_write_p0_reg(ANX7150_SYS_CTRL1_REG, c |ANX7150_SYS_CTRL1_HDMI);
+    }    
+    else
+    {
+        ANX7150_edid_result.is_HDMI = 0;
+        //ANX7150_i2c_read_p0_reg(ANX7150_SYS_CTRL1_REG, &c);
+        //ANX7150_i2c_write_p0_reg(ANX7150_SYS_CTRL1_REG, c & (~ANX7150_SYS_CTRL1_HDMI));
+    }     
+}
+
+BYTE ANX7150_EDID_Checksum(BYTE block_number) 
+{
+    BYTE i, real_checksum;  
+    BYTE edid_block_checksum;
+	
+    edid_block_checksum = 0;
+    for(i = 0; i < 127; i ++) 
+    {           
+        if((block_number / 2) * 2 == block_number)
+            edid_block_checksum = edid_block_checksum + ANX7150_Read_EDID_BYTE(block_number/2, i);
+        else
+            edid_block_checksum = edid_block_checksum + ANX7150_Read_EDID_BYTE(block_number/2, i + 0x80);
+    }
+    edid_block_checksum = (~edid_block_checksum) + 1;
+   // ANX7150_DEBUG("edid_block_checksum = 0x%.2x\n",(WORD)edid_block_checksum);
+    if((block_number / 2) * 2 == block_number)
+        real_checksum = ANX7150_Read_EDID_BYTE(block_number/2, 0x7f);
+    else
+        real_checksum = ANX7150_Read_EDID_BYTE(block_number/2, 0xff);
+    if(real_checksum == edid_block_checksum) 
+        return 1;
+    else 
+	 return 0;
+}    
+
+
+void ANX7150_InitDDC_Read(BYTE devaddr, BYTE segmentpointer,
+    BYTE offset, BYTE  access_num_Low,BYTE access_num_high)
+{
+    //Write slave device address
+    ANX7150_i2c_write_p0_reg(ANX7150_DDC_SLV_ADDR_REG, devaddr);
+    // Write segment address
+    ANX7150_i2c_write_p0_reg(ANX7150_DDC_SLV_SEGADDR_REG, segmentpointer);
+    //Write offset
+    ANX7150_i2c_write_p0_reg(ANX7150_DDC_SLV_OFFADDR_REG, offset);
+    //Write number for access
+    ANX7150_i2c_write_p0_reg(ANX7150_DDC_ACCNUM0_REG, access_num_Low);
+    ANX7150_i2c_write_p0_reg(ANX7150_DDC_ACCNUM1_REG, access_num_high);
+    //Clear FIFO
+    ANX7150_i2c_write_p0_reg(ANX7150_DDC_ACC_CMD_REG, 0x05);
+    //EDDC sequential Read
+    ANX7150_i2c_write_p0_reg(ANX7150_DDC_ACC_CMD_REG, 0x04);
+}
+
+BYTE ANX7150_Read_EDID_BYTE(BYTE segmentpointer,BYTE offset)
+{
+    /*BYTE c;
+    ANX7150_InitDDC_Read(0xa0, segmentpointer, offset, 0x01, 0x00);
+     ANX7150_i2c_read_p0_reg(ANX7150_DDC_FIFOCNT_REG, &c);
+	 while(c==0)
+    	ANX7150_i2c_read_p0_reg(ANX7150_DDC_FIFO_ACC_REG, &c);
+    return c;*/
+
+	 return ANX7150_EDID_Buf[offset];
+}
+
+
+
+void ANX7150_Timer_Process () 
+{
+    //if (timer_done) 
+    {
+//	ANX7150_DEBUG("timer_slot == %d\n",timer_slot);
+//        timer_done = 0;
+        if (timer_slot == 4) 
+            timer_slot = 0;
+        else 
+            timer_slot ++;
+        if (timer_slot == 0) 
+        {
+	    ANX7150_DEBUG("ANX7150_Timer_Slot1()\n");
+            ANX7150_Timer_Slot1(); 
+        }
+        else if (timer_slot == 1) 
+        {
+	    ANX7150_DEBUG("ANX7150_Timer_Slot2()\n");
+            ANX7150_Timer_Slot2(); 
+        } 
+        else if (timer_slot == 2) 
+        {
+	    ANX7150_DEBUG("ANX7150_Timer_Slot3()\n");
+            ANX7150_Timer_Slot3(); 
+        } 
+        else if (timer_slot == 3) 
+        {
+	    ANX7150_DEBUG("ANX7150_Timer_Slot4()\n");
+            ANX7150_Timer_Slot4();
+        }
+    }
+}
+
+/*
+(1)Reset the ANX7150 chip
+(2)Read the chip ID via I2C interface
+*/
+BIT ANX7150_Chip_Located(void)
+{
+        BYTE i;
+        BYTE c, d1, d2;
+
+        for (i=0; i<10; i++)
+        {
+//            ANX7150_Resetn_Pin = 0;
+//            msleep(2);
+//            ANX7150_Resetn_Pin = 1;
+//            msleep(2);
+     	    ANX7150_i2c_write_p0_reg( 0x08, 0x01);
+	    msleep(30);
+
+            c = ANX7150_i2c_read_p0_reg(ANX7150_DEV_IDL_REG, &d1);
+            if (c) continue;
+
+            c = ANX7150_i2c_read_p0_reg(ANX7150_DEV_IDH_REG, &d2);
+            if (c) continue;
+
+            if (d1 == 0x50 && d2 == 0x71) 
+            {
+                ANX7150_DEBUG("ANX7150 detected!");
+                return 1;
+            }
+        }
+        ANX7150_DEBUG("device not detected");
+        return 0;
+}
+
+
+#if BIST_MODE_USED
+
+void ANX7150_BIST() 
+{
+    BYTE c, c1,i,temp;
+
+    if((ANX7150_system_state != ANX7150_INITIAL)
+        && (ANX7150_system_state != ANX7150_WAIT_HOTPLUG)
+        && (ANX7150_system_state != ANX7150_READ_PARSE_EDID)
+        && (ANX7150_system_state != ANX7150_WAIT_RX_SENSE))
+    {
+        ANX7150_Reset_BIST_Setting();     
+        ANX7150_Reset_AVI();
+        ANX7150_Set_System_State(ANX7150_CONFIG_VIDEO);
+    }
+
+        if(ANX7150_system_state == ANX7150_INITIAL) 
+            return;
+
+        if(ANX7150_system_state == ANX7150_WAIT_HOTPLUG)
+	{ 
+
+	    ANX7150_DEBUG("!!!!!!ANX7150_WAIT_HOTPLUG\n");
+
+	    ANX7150_i2c_read_p0_reg(ANX7150_INTR_STATE_REG, &c);
+            if(c & 0x01)
+        	{
+			ANX7150_i2c_read_p0_reg(ANX7150_SYS_CTRL3_REG, &c);
+		        ANX7150_i2c_write_p0_reg(ANX7150_SYS_CTRL3_REG, c | 0x01);//power up all, 090630
+			//HDMI_RX_ReadI2C_RX0(HDMI_RX_SYS_PWDN2_REG, &c);	//en output of 8770,
+			//HDMI_RX_WriteI2C_RX0(HDMI_RX_SYS_PWDN2_REG, c & 0xf8);				
+	                ANX7150_Hotplug_Change_Interrupt();
+		        ANX7150_DEBUG("ANX7150_BIST() -->HPD Det at timer slot1");
+			}
+
+            return;
+	}
+        
+        if(ANX7150_system_state == ANX7150_READ_PARSE_EDID) 
+        {
+            ANX7150_i2c_read_p0_reg(ANX7150_HDCP_CTRL0_REG, &c);
+            ANX7150_i2c_write_p0_reg(ANX7150_HDCP_CTRL0_REG, (c &(~ANX7150_HDCP_CTRL0_HW_AUTHEN)));
+            ANX7150_hdcp_auth_en = 0;
+            ANX7150_RST_DDCChannel();        
+            ANX7150_Parse_EDID();
+            ANX7150_parse_edid_done = 1;
+            ANX7150_Set_System_State(ANX7150_WAIT_RX_SENSE);
+        }
+        
+        if(ANX7150_system_state == ANX7150_WAIT_RX_SENSE)
+        {
+            ANX7150_i2c_read_p0_reg(ANX7150_SYS_STATE_REG, &c);
+            if(c & ANX7150_SYS_STATE_RSV_DET)
+            {
+                ANX7150_Set_System_State(ANX7150_CONFIG_VIDEO);//060819
+            }
+            else
+            {
+                ;//ANX7150_Set_System_State(ANX7150_CONFIG_VIDEO);//060819
+            }
+        }
+     
+        if(ANX7150_system_state == ANX7150_CONFIG_VIDEO) 
+        {
+            ANX7150_Clean_HDCP();
+            if(0) 
+					;           
+			else 
+            { //use ANX9011 video clock as clock source, ANX9011 must receive a 720P mode stream
+                ANX7150_Config_Bist_Video(1);
+            }
+    	  //enable video input
+    	     ANX7150_i2c_read_p0_reg(ANX7150_VID_CTRL_REG, &c);
+            ANX7150_i2c_write_p0_reg(ANX7150_VID_CTRL_REG, c | ANX7150_VID_CTRL_IN_EN);
+            ANX7150_i2c_read_p0_reg(ANX7150_VID_STATUS_REG, &c);
+            if(!(c & ANX7150_VID_STATUS_VID_STABLE))
+            {
+                return;
+            }
+
+            if(ANX7150_edid_result.is_HDMI)
+            {
+                ANX7150_i2c_read_p0_reg(ANX7150_SYS_CTRL1_REG, &c);
+                ANX7150_i2c_write_p0_reg(ANX7150_SYS_CTRL1_REG, c | 0x02);
+            }
+            //reset TMDS link
+            ANX7150_i2c_read_p0_reg(ANX7150_SRST_REG, &c);
+            ANX7150_i2c_write_p0_reg(ANX7150_SRST_REG, (c | ANX7150_TX_RST));
+            ANX7150_i2c_write_p0_reg(ANX7150_SRST_REG, (c & (~ANX7150_TX_RST)));
+            
+            //Enable TMDS output
+        ANX7150_DEBUG("ANX7150_BIST--->|||||||||0x80\n");
+            ANX7150_i2c_read_p0_reg(ANX7150_TMDS_CLKCH_CONFIG_REG, &c);
+        ANX7150_DEBUG("ANX7150_TMDS_CLKCH_CONFIG_REG=%x\n",c);
+            ANX7150_i2c_write_p0_reg(ANX7150_TMDS_CLKCH_CONFIG_REG, (c | ANX7150_TMDS_CLKCH_MUTE));
+
+            ANX7150_i2c_read_p0_reg(ANX7150_SYS_CTRL1_REG, &c);
+            if((c & 0x02) == 0x02)
+                ANX7150_Set_System_State(ANX7150_CONFIG_AUDIO);
+            if((c & 0x02) == 0x00)
+                ANX7150_Set_System_State(ANX7150_HDCP_AUTHENTICATION);
+        } 
+
+        if(ANX7150_system_state == ANX7150_CONFIG_AUDIO) 
+        {
+          // ACR_N
+            ANX7150_i2c_write_p1_reg(ANX7150_ACR_N1_SW_REG, 0x00);
+            ANX7150_i2c_write_p1_reg(ANX7150_ACR_N2_SW_REG, 0x18);
+            ANX7150_i2c_write_p1_reg(ANX7150_ACR_N3_SW_REG, 0x00);
+
+            //Enable control of ACR
+            ANX7150_i2c_read_p1_reg(ANX7150_INFO_PKTCTRL1_REG, &c);
+            ANX7150_i2c_write_p1_reg(ANX7150_INFO_PKTCTRL1_REG, (c | ANX7150_INFO_PKTCTRL1_ACR_EN));
+
+            //audio enable: 
+            ANX7150_i2c_read_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, &c);
+            c |= ANX7150_HDMI_AUDCTRL1_IN_EN;
+            ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, c);
+
+            ANX7150_i2c_read_p0_reg(ANX7150_HDMI_AUDCTRL0_REG, &c);
+            ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDCTRL0_REG, (c & 0xef));
+            ANX7150_i2c_read_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, &c);
+            ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDCTRL1_REG, (c | 0x01));
+            ANX7150_i2c_read_p0_reg(ANX7150_HDMI_AUDBIST_CTRL_REG, &c);
+            ANX7150_i2c_write_p0_reg(ANX7150_HDMI_AUDBIST_CTRL_REG, (c | 0xcf));
+
+            ANX7150_Set_System_State(ANX7150_CONFIG_PACKETS);
+        }
+
+        if(ANX7150_system_state == ANX7150_CONFIG_PACKETS)/* {
+            s_ANX7150_packet_config.packets_need_config=1;
+             i2c_read_p0_reg(0x5f, &c);
+            if(c < 0x80) 
+                ANX7150_RGBorYCbCr = ANX7150_RGB;
+            else if(c >= 0xc0)
+                ANX7150_RGBorYCbCr = ANX7150_YCbCr422;
+            else
+                ANX7150_RGBorYCbCr = ANX7150_YCbCr444;
+            ANX7150_Config_Packet();}*/
+        {
+            s_ANX7150_packet_config.packets_need_config = 0x00;
+          //config Y0, Y1 of AVI
+            c1 = ANX7150_edid_result.ycbcr444_supported;
+            temp = ANX7150_edid_result.ycbcr422_supported;
+            c1 = (c1<<1) + temp;
+          /*  i2c_read_p0_reg(0x5f,&c);
+            if(c < 0x80) 
+                c1 = 0;
+            else if(c >= 0xc0)
+                c1 = 1;
+            else
+                c1 = 2;*/
+            
+            ANX7150_i2c_read_p1_reg(ANX7150_INFO_PKTCTRL1_REG, &c);
+
+            c &= ~ANX7150_INFO_PKTCTRL1_AVI_RPT;
+            ANX7150_i2c_write_p1_reg(ANX7150_INFO_PKTCTRL1_REG, c);
+            switch (c1) 
+            {
+                case 0: //config to RGB mode
+                    ANX7150_avi_data[4] = ANX7150_avi_data[4] & 0x9f;
+                    break;
+                case 1: //config to YCbCr4:2:2 mode
+                    ANX7150_avi_data[4] = (ANX7150_avi_data[4] & 0x9f) | 0x20;
+                    break;
+                case 2: //config to YCbCr4:4:4 mode
+                    ANX7150_avi_data[4] = (ANX7150_avi_data[4] & 0x9f) | 0x40;
+                    break;
+                case 3: //config to YCbCr4:2:2 mode
+                    ANX7150_avi_data[4] = (ANX7150_avi_data[4] & 0x9f) | 0x20;
+            }
+
+          //config AVI data byte4
+            switch (switch_value) 
+            { 
+                case 0: //640x480p@60
+                    ANX7150_avi_data[7] = 0x01;
+                    ANX7150_avi_data[5] = 0x58; //ITU601, Pixcure Aspect Ration = 4:3, ACtive Format Aspect Ration same as picture aspect ratio.
+                    break;
+                case 1: //1280x720p@60
+                    ANX7150_avi_data[7] = 0x04;
+                    ANX7150_avi_data[5] = 0xa8; //ITU709, Pixcure Aspect Ration = 16:9, ACtive Format Aspect Ration same as picture aspect ratio.          
+                    break;
+                case 2: //1920x10800i@60
+                    ANX7150_avi_data[7] = 0x05;
+                    ANX7150_avi_data[5] = 0xa8; //ITU709, Pixcure Aspect Ration = 16:9, ACtive Format Aspect Ration same as picture aspect ratio.          
+                    break;
+                case 3: //1920x1080p@60
+                    ANX7150_avi_data[7] = 0x10;
+                    ANX7150_avi_data[5] = 0xa8; //ITU709, Pixcure Aspect Ration = 16:9, ACtive Format Aspect Ration same as picture aspect ratio.          
+            }
+
+          //Caculate Checksum
+            ANX7150_avi_data[3] = 0;
+            c =0;
+            for(i=0; i<17;i++) 
+            {
+                c = c + ANX7150_avi_data[i];
+            }
+            c = (~c) +1;
+            ANX7150_avi_data[3] = c;
+
+            ANX7150_i2c_read_p1_reg(ANX7150_INFO_PKTCTRL1_REG, &c);
+            if(c & ANX7150_INFO_PKTCTRL1_AVI_EN)
+            {
+                //ANX7150_DEBUG("wait disable, config avi infoframe packet.");
+                return ;
+            }
+
+        //Config AVI infoframe
+            for(i=0; i<17; i++ )
+            {
+                ANX7150_i2c_write_p1_reg(i, ANX7150_avi_data[i]);
+            }
+
+           //Enable send AVI InfoFrame 
+            ANX7150_i2c_read_p1_reg(ANX7150_INFO_PKTCTRL1_REG, &c);
+            ANX7150_i2c_write_p1_reg(ANX7150_INFO_PKTCTRL1_REG, (c | 0x30));    
+
+            //Config Audio Infoframe
+            ANX7150_Load_Infoframe( ANX7150_audio_infoframe,
+                                   &(s_ANX7150_packet_config.audio_info));
+
+            ANX7150_i2c_read_p1_reg(ANX7150_INFO_PKTCTRL2_REG, &c);
+            c |= 0x03;
+            ANX7150_i2c_write_p1_reg(ANX7150_INFO_PKTCTRL2_REG, c);
+
+            //Config Channel Status
+            c = s_ANX7150_audio_config.i2s_config.Channel_status1;
+            ANX7150_i2c_write_p0_reg(ANX7150_I2SCH_STATUS1_REG, c);
+            c = s_ANX7150_audio_config.i2s_config.Channel_status2;
+            ANX7150_i2c_write_p0_reg(ANX7150_I2SCH_STATUS2_REG, c);
+            c = s_ANX7150_audio_config.i2s_config.Channel_status3;
+            ANX7150_i2c_write_p0_reg(ANX7150_I2SCH_STATUS3_REG, c);
+            c = s_ANX7150_audio_config.i2s_config.Channel_status4;
+            ANX7150_i2c_write_p0_reg(ANX7150_I2SCH_STATUS4_REG, c);
+            c = s_ANX7150_audio_config.i2s_config.Channel_status5;
+            ANX7150_i2c_write_p0_reg(ANX7150_I2SCH_STATUS5_REG, c);
+            
+            ANX7150_Set_System_State(ANX7150_HDCP_AUTHENTICATION);
+        }
+        
+        if(ANX7150_system_state == ANX7150_HDCP_AUTHENTICATION)
+        {
+            ANX7150_HDCP_Process();
+        }
+        
+        if(ANX7150_system_state == ANX7150_PLAY_BACK)
+        {            
+            ANX7150_PLAYBACK_Process();
+        }
+    
+}
+
+
+
+
+void ANX7150_Reset_BIST_Setting(void) 
+{
+    BYTE c;
+    //Reset video mode register to disable up sampling.
+    ANX7150_i2c_read_p0_reg(ANX7150_VID_MODE_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_VID_MODE_REG, (c & 0xfb));
+}
+
+void ANX7150_Config_Bist_Video(WORD bist_select_number) 
+{
+    WORD bist_data;
+    BYTE c, c1;
+
+    bist_data = bist_demo[bist_select_number].h_total_length;
+    ANX7150_i2c_write_p0_reg(ANX7150_H_RESL_REG,  bist_data);
+    ANX7150_i2c_write_p0_reg(ANX7150_H_RESH_REG,  (bist_data>>8));
+
+    bist_data = bist_demo[bist_select_number].h_active_length;
+    ANX7150_i2c_write_p0_reg(ANX7150_VID_PIXL_REG,  bist_data);
+    ANX7150_i2c_write_p0_reg(ANX7150_VID_PIXH_REG,  (bist_data>>8));
+
+    bist_data = bist_demo[bist_select_number].v_total_length;
+    ANX7150_i2c_write_p0_reg(ANX7150_V_RESL_REG,  bist_data);
+    ANX7150_i2c_write_p0_reg(ANX7150_V_RESH_REG,  (bist_data>>8));
+
+    bist_data = bist_demo[bist_select_number].v_active_length;
+    ANX7150_i2c_write_p0_reg(ANX7150_ACT_LINEL_REG,  bist_data);
+    ANX7150_i2c_write_p0_reg(ANX7150_ACT_LINEH_REG,  (bist_data>>8));
+
+    bist_data = bist_demo[bist_select_number].h_front_porch;
+    ANX7150_i2c_write_p0_reg(ANX7150_H_FRONTPORCHL_REG,  bist_data);
+    ANX7150_i2c_write_p0_reg(ANX7150_H_FRONTPORCHH_REG,  (bist_data>>8));
+
+    bist_data = bist_demo[bist_select_number].h_sync_width;
+    ANX7150_i2c_write_p0_reg(ANX7150_HSYNC_ACT_WIDTHL_REG,  bist_data);
+    ANX7150_i2c_write_p0_reg(ANX7150_HSYNC_ACT_WIDTHH_REG,  (bist_data>>8));
+
+    bist_data = bist_demo[bist_select_number].h_back_porch;
+    ANX7150_i2c_write_p0_reg(ANX7150_H_BACKPORCHL_REG,  bist_data);
+    ANX7150_i2c_write_p0_reg(ANX7150_H_BACKPORCHH_REG,  (bist_data>>8));
+
+    bist_data = bist_demo[bist_select_number].v_front_porch;
+    ANX7150_i2c_write_p0_reg(ANX7150_ACT_LINE2VSYNC_REG,  bist_data);
+
+    bist_data = bist_demo[bist_select_number].v_sync_width;
+    ANX7150_i2c_write_p0_reg(ANX7150_VSYNC_WID_REG,  bist_data);
+
+    bist_data = bist_demo[bist_select_number].v_back_porch;
+    ANX7150_i2c_write_p0_reg(ANX7150_VSYNC_TAIL2VIDLINE_REG,  bist_data);
+
+    bist_data = bist_demo[bist_select_number].h_sync_polarity;
+    ANX7150_i2c_read_p0_reg(ANX7150_VID_CAPCTRL1_REG, &c);
+    if(bist_data == 1) 
+    {
+        ANX7150_i2c_write_p0_reg(ANX7150_VID_CAPCTRL1_REG, (c | ANX7150_VID_CAPCTRL1_HSYNC_POL));
+    } 
+    else 
+    {
+        ANX7150_i2c_write_p0_reg(ANX7150_VID_CAPCTRL1_REG, (c & 0xdf));
+    }
+
+    bist_data = bist_demo[bist_select_number].v_sync_polarity;
+    ANX7150_i2c_read_p0_reg(ANX7150_VID_CAPCTRL1_REG, &c);
+    if(bist_data == 1) 
+    {
+        ANX7150_i2c_write_p0_reg(ANX7150_VID_CAPCTRL1_REG, (c | ANX7150_VID_CAPCTRL1_VSYNC_POL));
+    } 
+    else 
+    {
+        ANX7150_i2c_write_p0_reg(ANX7150_VID_CAPCTRL1_REG, (c & 0xbf));
+    }
+
+    bist_data = bist_demo[bist_select_number].is_interlaced;
+    ANX7150_i2c_read_p0_reg(ANX7150_VID_CAPCTRL1_REG, &c);
+    if(bist_data == 1) 
+    {
+        ANX7150_i2c_write_p0_reg(ANX7150_VID_CAPCTRL1_REG, (c | ANX7150_VID_CAPCTRL1_VID_TYPE));
+    } 
+    else 
+    {
+        ANX7150_i2c_write_p0_reg(ANX7150_VID_CAPCTRL1_REG, (c & 0xf7));
+    }
+
+    c1 = ANX7150_edid_result.ycbcr444_supported;
+    c1 = (c1<<1) + (BYTE) ANX7150_edid_result.ycbcr422_supported;
+   /* i2c_read_p0_reg(0x5f,&c);
+    if(c < 0x80) 
+        c1 = 0;
+    else if(c >= 0xc0)
+        c1 = 1;
+    else
+        c1 = 2;*/
+
+    ANX7150_i2c_write_p0_reg(ANX7150_VID_MODE_REG, 0x00);
+    
+    switch (c1) 
+    {
+        case 0: //select RGB mode
+            ANX7150_i2c_read_p0_reg(ANX7150_VID_CTRL_REG, &c);
+            ANX7150_i2c_write_p0_reg(ANX7150_VID_CTRL_REG,((c & 0x1f) | 0x20));
+            break;
+        case 1: //select YCbCr4:2:2 mode
+            ANX7150_i2c_read_p0_reg(ANX7150_VID_CTRL_REG, &c);
+            ANX7150_i2c_write_p0_reg(ANX7150_VID_CTRL_REG,((c & 0x1f) | 0xa0)); 
+            break;
+        case 2: //select YCbCr4:4:4 mode
+            ANX7150_i2c_read_p0_reg(ANX7150_VID_CTRL_REG, &c);
+            ANX7150_i2c_write_p0_reg(ANX7150_VID_CTRL_REG,((c & 0x1f) | 0xa0));
+            //do upsample(from YCbCr4:2:2 to YCbCr4:4:4) 
+            ANX7150_i2c_read_p0_reg(ANX7150_VID_MODE_REG, &c);
+            ANX7150_i2c_write_p0_reg(ANX7150_VID_MODE_REG, (c |0x04));
+            break;
+        case 3: //Both YCbCr4:2:2 and YCbCr4:4:4 modes supported, then select YCbCr4:2:2 mode
+            ANX7150_i2c_read_p0_reg(ANX7150_VID_CTRL_REG, &c);
+            ANX7150_i2c_write_p0_reg(ANX7150_VID_CTRL_REG,((c & 0x1f) | 0xa0));
+    }
+
+    bist_data = bist_demo[bist_select_number].video_mode;
+    ANX7150_i2c_read_p0_reg(ANX7150_VID_STATUS_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_VID_STATUS_REG, ((c & 0x3f) | (bist_data<<6))); 
+
+    ANX7150_i2c_read_p0_reg(ANX7150_VID_CAPCTRL0_REG, &c);
+    ANX7150_i2c_write_p0_reg(ANX7150_VID_CAPCTRL0_REG, (c | ANX7150_VID_CAPCTRL0_VIDBIST_EN));	
+
+
+}
+
+/*
+AVI infoframe location
+*/
+void ANX7150_Reset_AVI(void) 
+{
+    ANX7150_avi_data[0] = 0x82; //type, HDMI defined
+    ANX7150_avi_data[1] = 0x02; //Version
+    ANX7150_avi_data[2] = 0x0d; //AVI data byte length is 13
+    ANX7150_avi_data[3] = 0x00; //checksum
+    ANX7150_avi_data[4] = 0x00; //data byte 1
+    ANX7150_avi_data[5] = 0x08; //data byte 2
+    ANX7150_avi_data[6] = 0x00; //data byte 3
+    ANX7150_avi_data[7] = 0x01; //data byte 4
+    ANX7150_avi_data[8] = 0x00; //data byte 5
+    ANX7150_avi_data[9] = 0x00; //data byte 6
+    ANX7150_avi_data[10] = 0x00; //data byte 7
+    ANX7150_avi_data[11] = 0x00; //data byte 8
+    ANX7150_avi_data[12] = 0x00; //data byte 9
+    ANX7150_avi_data[13] = 0x00; //data byte 10
+    ANX7150_avi_data[14] = 0x00; //data byte 11
+    ANX7150_avi_data[15] = 0x00; //data byte 12
+    ANX7150_avi_data[16] = 0x00; //data byte 13
+    ANX7150_avi_data[17] = 0x00; //for firmware use
+    ANX7150_avi_data[18] = 0x00; //for firmware use
+}    
+#endif 
+
+
+/*DDC operate start*/
+
+
+/*Function name  :ANX7150_DDC_Parameter_Validity()*/
+/*Function  :Judge the validity for input parameter*/
+/*Parameter  :   Addr,length*/
+/*Return  :Judge result is DDC_Data_Addr_Err,DDC_Length_Err,DDC_NO_Err*/
+BYTE ANX7150_DDC_Parameter_Validity(BYTE *Addr,WORD length)
+{
+    if (Addr == NULL){
+        return DDC_Data_Addr_Err;
+    }
+    else if (length > DDC_Max_Length){
+        return DDC_Length_Err;
+    }
+    else{
+        return DDC_NO_Err;
+    }
+ 
+}
+
+/*Function name :ANX7150_DDC_Set_Address()*/
+/*Function  :Set address for DDC device*/
+/*Parameter :   ddc_address,ddc_type*/
+/*Return  :None*/
+void ANX7150_DDC_Set_Address(ANX7150_DDC_Addr ddc_address, ANX7150_DDC_Type ddc_type)
+{
+    /*set DDC channel slave device address*/
+    ANX7150_i2c_write_p0_reg(ANX7150_DDC_SLV_ADDR_REG, ddc_address.dev_addr);
+    /*set DDC channel slave segment address,when ddc type is edid*/
+    if (ddc_type == DDC_Edid)
+        ANX7150_i2c_write_p0_reg(ANX7150_DDC_SLV_SEGADDR_REG, ddc_address.sgmt_addr);
+    /*set DDC channel slave offset address*/
+    ANX7150_i2c_write_p0_reg(ANX7150_DDC_SLV_OFFADDR_REG, ddc_address.offset_addr);
+}
+
+/*Function name :ANX7150_DDC_Set_Number()*/
+/*Function  :Set number for DDC data access*/
+/*Parameter :   length*/
+/*Return  :None*/
+void ANX7150_DDC_Set_Number(WORD length)
+{
+    BYTE length_low,length_high;
+
+    ANX7150_DEBUG ("!!!!DDC_data_number :%x\n",length);
+    length_high = (BYTE)((length >> 8) & 0xff);
+    length_low = (BYTE)(length & 0xff);
+    /*set number of bytes to DDC channel*/
+    ANX7150_i2c_write_p0_reg(ANX7150_DDC_ACCNUM0_REG, length_low);
+    ANX7150_i2c_write_p0_reg(ANX7150_DDC_ACCNUM1_REG, length_high);
+}
+
+/*Function name :ANX7150_DDC_Command()*/
+/*Function  :Send command to DDC*/
+/*Parameter :   DDC_command*/
+/*Return  :None*/
+void ANX7150_DDC_Command(BYTE DDC_command)
+{
+    /*set DDC command*/
+    ANX7150_i2c_write_p0_reg(ANX7150_DDC_ACC_CMD_REG, DDC_command);
+    
+}
+
+/*Function name :ANX7150_DDC_Check_Status*/
+/*Function  :Check DDC status or report information of error*/
+/*Parameter :   DDC_status_need_type,status_bit*/
+/*Return  :always is 0 if DDC_status_need_status is "report",or return DDC status bit value
+if DDC_status_need_type is "Judge"*/
+BYTE ANX7150_DDC_Check_Status(ANX7150_DDC_Status_Check_Type DDC_status_need_type,
+        BYTE status_bit)
+{
+    BYTE DDC_status,i,j;
+    BYTE *status[8] = {
+                                "!!!!DDC____An Error is Occurred!\n",
+                                "!!!!DDC____channel is accessed by an external device!\n",
+                                "!!!!DDC____Fifo is Full!\n",
+                                "!!!!DDC____Fifo is Empty!\n",
+                                "!!!!DDC____No Acknowledge detection!\n",
+                                "!!!!DDC____Fifo is being read!\n",
+                                "!!!!DDC____Fifo is being written!\n",
+                                };
+    
+    ANX7150_i2c_read_p0_reg(ANX7150_DDC_CHSTATUS_REG, &DDC_status);
+    
+    if (DDC_status_need_type == report){
+        for (i= 0,j=7; i < 8; i++,j--){
+            if (DDC_status & (0x01 << i)){
+                ANX7150_DEBUG("%s",status[j]);
+                }
+        }
+        return 0;
+    }
+    else{
+        return ((DDC_status >> status_bit) & 0x01 );
+    }
+}
+
+/*Function name :ANX7150_DDC_Count_Compare()*/
+/*Function :Check status for access count*/
+/*Parameter :length*/
+/*Return  :0 if check success,1 if check fail*/
+BYTE ANX7150_DDC_Count_Compare(BYTE length)
+{
+    BYTE Fifo_Count;
+    ANX7150_i2c_read_p0_reg(ANX7150_DDC_FIFOCNT_REG, &Fifo_Count);
+    return ((Fifo_Count & 0x01f) == length ? 0 : 1);
+}
+
+/*Function name:    ANX7150_DDC_Read()*/
+/*Function :    read data from DDC channel*/
+/*Parameter :   ddc_address,DDC_data,length,DDC_type*/
+/*Return  :Read reslut,ex.DDC_NO_Err,DDC_Status_Err*/
+BYTE ANX7150_DDC_Read (ANX7150_DDC_Addr ddc_address, const BYTE *DDC_data, 
+    WORD length, ANX7150_DDC_Type DDC_type)
+{
+    BYTE DDC_Err,fifo_read_data_compare;
+    int data_cnt;
+    int fifo_data_cnt;
+    BYTE *Fifo_Read_P;
+
+    DDC_Err = DDC_NO_Err;
+    fifo_read_data_compare = 0;
+    fifo_data_cnt = length;
+    Fifo_Read_P = DDC_data;
+    
+    /*Judge validity for read address and length*/
+    /*if (DDC_Err = ANX7150_DDC_Parameter_Validity(Fifo_Read_P, length))
+        return (DDC_Err);
+    */ 																																		//update    
+        if (DDC_Err != ANX7150_DDC_Parameter_Validity(Fifo_Read_P, length))		//update
+        return (ANX7150_DDC_Parameter_Validity(Fifo_Read_P, length));
+				
+    /*set DDC address*/
+    ANX7150_DDC_Set_Address(ddc_address, DDC_type);
+    /*set number for DDC read*/
+    ANX7150_DDC_Set_Number(length);
+    /*send "clear DDC fifo" command*/
+    ANX7150_DDC_Command((BYTE)Clear_DDC_Fifo);
+    
+    /*check DDC channel status*/
+    if (!ANX7150_DDC_Check_Status(Judge, DDC_Error_bit) &&
+        !ANX7150_DDC_Check_Status(Judge, DDC_Occup_bit) &&
+        !ANX7150_DDC_Check_Status(Judge, DDC_No_Ack_bit)){
+        /*send "sequential byte read"command if check success*/
+        ANX7150_DDC_Command((BYTE)Sequential_Byte_Read);
+        /*delay*/
+        msleep(DDC_Read_Delay);
+    }
+    else{
+        ANX7150_DDC_Check_Status(report, NULL);
+        return DDC_Status_Err;
+    }
+    
+    /*read DDC fifo data*/
+    do {
+        /*read data from fifo if length <= DDC fifo depth*/
+        if (fifo_data_cnt <= DDC_Fifo_Depth){
+
+            fifo_read_data_compare = fifo_data_cnt;
+            
+            /*check bit DDC_Progress of DDC status,fifo count*/
+            if (!ANX7150_DDC_Check_Status(Judge, DDC_Progress_bit) &&
+                !ANX7150_DDC_Count_Compare(fifo_read_data_compare)){
+                data_cnt = fifo_data_cnt;
+                while (data_cnt--){
+                    ANX7150_i2c_read_p0_reg(ANX7150_DDC_FIFO_ACC_REG, Fifo_Read_P++);
+                }
+            }
+            else{
+                ANX7150_DDC_Check_Status(report, NULL);
+                return DDC_Status_Err;
+            }
+        }
+        /*read data from fifo if length >DDC fifo depth*/
+        else{
+            /*check bit DDC_Progress of DDC status,Fifo_full*/
+            if (ANX7150_DDC_Check_Status(Judge, DDC_Progress_bit) &&
+                ANX7150_DDC_Check_Status(Judge, DDC_Fifo_Full_bit)){
+                data_cnt = DDC_Fifo_Depth;
+                while(data_cnt--){
+                    ANX7150_i2c_read_p0_reg(ANX7150_DDC_FIFO_ACC_REG, Fifo_Read_P++);
+                }
+            }
+            else{
+                ANX7150_DDC_Check_Status(report, NULL);
+                return DDC_Status_Err;
+            }
+                
+        }
+        fifo_data_cnt -= DDC_Fifo_Depth;
+    }while(fifo_data_cnt > 0);
+    
+    return DDC_Err;
+}
+
+void ANX7150_Timer_Process_Re_init() 
+{
+	timer_slot =-1;
+}
+
+
+/*Function name:    ANX7150_DDC_Write()*/
+/*Function :    write data to DDC channel*/
+/*Parameter :   ddc_address,DDC_data,length,DDC_type*/
+/*Return  :write reslut,ex.DDC_NO_Err,DDC_Status_Err*/
+/*					
+BYTE ANX7150_DDC_Write (ANX7150_DDC_Addr ddc_address, const BYTE *DDC_data, 
+    WORD length, ANX7150_DDC_Type DDC_type)
+{
+    BYTE DDC_Err,fifo_write_data_compare;
+    int data_cnt;
+    int fifo_data_cnt;
+    BYTE *Fifo_Write_P;
+    
+    DDC_Err = DDC_NO_Err;
+    fifo_write_data_compare = 0;
+    fifo_data_cnt = length;
+    Fifo_Write_P = DDC_data;
+    
+    //Judge validity for write address and length
+    if (DDC_Err = ANX7150_DDC_Parameter_Validity(Fifo_Write_P, length))
+        return (DDC_Err);
+
+    //set DDC address
+    ANX7150_DDC_Set_Address(ddc_address, DDC_type);
+    //set number for DDC write
+    ANX7150_DDC_Set_Number(length);
+    //send "clear DDC fifo" command
+    ANX7150_DDC_Command((BYTE)Clear_DDC_Fifo);
+    
+    //check DDC channel status//
+    if (!ANX7150_DDC_Check_Status(Judge, DDC_Error_bit) &&
+        !ANX7150_DDC_Check_Status(Judge, DDC_Occup_bit) &&
+        !ANX7150_DDC_Check_Status(Judge, DDC_No_Ack_bit)){
+
+            do {
+                //write data to fifo if data length <= DDC Fifo Depth/
+                if (fifo_data_cnt <= DDC_Fifo_Depth){
+                    
+                    fifo_write_data_compare = fifo_data_cnt;
+                    
+                    while (fifo_data_cnt--){
+                        //write data to DDC fifo
+                        ANX7150_i2c_write_p0_reg(ANX7150_DDC_FIFO_ACC_REG, *(Fifo_Write_P++));
+                    }
+                    //send "sequential byte write"command after finish writing data to fifo
+                    ANX7150_DDC_Command((BYTE)Sequential_Byte_Write);
+                    //delay
+                    msleep(DDC_Write_Delay);
+                    //check DDC status when data length <= DDC Fifo Depth
+                    if (ANX7150_DDC_Check_Status(Judge, DDC_Progress_bit) ||
+                        ANX7150_DDC_Count_Compare(fifo_write_data_compare)){
+                        ANX7150_DDC_Check_Status(report, NULL);
+                        return DDC_Status_Err;
+                    }
+                }
+                //write data to fifo if data length > DDC Fifo Depth
+                else{
+                    data_cnt = DDC_Fifo_Depth;
+                    while(data_cnt--){
+                        ANX7150_i2c_write_p0_reg(ANX7150_DDC_FIFO_ACC_REG, *(Fifo_Write_P++));
+                    }
+                    //send "sequential byte write"command after finish writing data to fifo
+                    ANX7150_DDC_Command((BYTE)Sequential_Byte_Write);
+                    //delay
+                    msleep(DDC_Write_Delay);
+                    //check DDC status when data length > DDC Fifo Depth
+                    if (!ANX7150_DDC_Check_Status(Judge, DDC_Progress_bit) ||
+                        !ANX7150_DDC_Check_Status(Judge, DDC_Fifo_Full_bit)){
+                        ANX7150_DDC_Check_Status(report, NULL);
+                        return DDC_Status_Err;
+                    }
+                    
+                    fifo_data_cnt -= DDC_Fifo_Depth;
+                }
+                
+            }while(fifo_data_cnt > 0);
+    }
+    else{
+        ANX7150_DDC_Check_Status(report, NULL);
+        return DDC_Status_Err;    
+    }
+   
+    return DDC_Err;
+}
+*/
+
+                                                                /*end*/
+
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/adi9889/edid_parse.h
+++ linux-mvl-dove-2.6.32/drivers/video/display/adi9889/edid_parse.h
@@ -0,0 +1,319 @@
+/******************************************************************************
+*                                                                             *
+* License Agreement                                                           *
+*                                                                             *
+* Copyright (c) 2006 Analog Devices Inc.                                      *
+* All rights reserved.                                                        *
+*                                                                             *
+* This source code is intended for the recipient only under the guidelines of *
+* the non-disclosure agreement with Analog Devices Inc.                       *
+*                                                                             *
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR  *
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,    *
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE *
+* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER      *
+* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING     *
+* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER         *
+* DEALINGS IN THE SOFTWARE.                                                   *
+*                                                                             *
+*                                                                             *
+* This software is intended for use with the AD9889A and derivative parts only*
+*                                                                             *
+******************************************************************************/
+
+/******************************************************************************
+*                                                                             *
+* THIS IS A READ-ONLY SOURCE FILE. DO NOT EDIT IT DIRECTLY.                   *
+* Author: Matthew McCarn (matthew.mccarn@analog.com)                          *
+* Date: May 16, 2006                                                          *
+*                                                                             *
+******************************************************************************/
+#include "type_def.h"
+#include "ad9889_macros.h"
+#ifndef _EDID_PARSE_H_
+#define _EDID_PARSE_H_
+
+typedef struct MyVendorProductId *VendorProductId;
+
+struct MyVendorProductId
+{
+	char manuf[4];
+	BOOL prodcode[3];
+	WORD serial[2];
+	DEPLINT week;
+	DEPLINT year;
+};
+
+typedef struct MyEdidVerRev *EdidVerRev;
+
+struct MyEdidVerRev
+{
+	DEPLINT ver;
+	DEPLINT rev;
+};
+
+typedef struct MyBasicDispParams *BasicDispParams;
+
+struct MyBasicDispParams
+{
+	BOOL anadig;
+	DEPLINT siglev;
+	BOOL setup;
+	BOOL sepsyn;
+	BOOL compsync;
+	BOOL sog;
+	BOOL vsync_ser;
+	BOOL dfp1x;
+	DEPLINT maxh;
+	DEPLINT maxv;
+	DEPLINT dtc_gam;
+	BOOL standby;
+	BOOL suspend;
+	BOOL aovlp;
+	DEPLINT disptype;
+	BOOL def_col_sp;
+	BOOL pt_mode;
+	BOOL def_gtf;
+};
+
+typedef struct MyColorCharacteristics *ColorCharacteristics;
+
+struct MyColorCharacteristics
+{
+	DEPLINT rx;
+	DEPLINT ry;
+	DEPLINT gx;
+	DEPLINT gy;
+	DEPLINT bx;
+	DEPLINT by;
+	DEPLINT wx;
+	DEPLINT wy;
+};
+
+typedef struct MyEstablishedTiming *EstablishedTiming;
+
+struct MyEstablishedTiming
+{
+	// Established Timing I
+	BOOL m720_400_70;
+	BOOL m720_400_88;
+	BOOL m640_480_60;
+	BOOL m640_480_67;
+	BOOL m640_480_72;
+	BOOL m640_480_75;
+	BOOL m800_600_56;
+	BOOL m800_600_60;
+	// Established Timing II
+	BOOL m800_600_72;
+	BOOL m800_600_75;
+	BOOL m832_624_75;
+	BOOL m1024_768_87;
+	BOOL m1024_768_60;
+	BOOL m1024_768_70;
+	BOOL m1024_768_75;
+	BOOL m1280_1024_75;
+	// Manufacturer's Timings
+	BOOL m1152_870_75;
+	// Reserved
+	BOOL res_7;
+	BOOL res_6;
+	BOOL res_5;
+	BOOL res_4;
+	BOOL res_3;
+	BOOL res_2;
+	BOOL res_1;
+};
+
+typedef struct MyStandardTimingList *StandardTimingList;
+
+struct MyStandardTimingList
+{
+	DEPLINT hap;
+	DEPLINT imasp;
+	DEPLINT ref;
+};
+
+typedef struct MyDetailedTimingBlockList *DetailedTimingBlockList;
+
+struct MyDetailedTimingBlockList
+{
+	BOOL preferred_timing;
+	DEPLINT pix_clk;
+	DEPLINT h_active;
+	DEPLINT h_blank;
+	DEPLINT h_act_blank;
+	DEPLINT v_active;
+	DEPLINT v_blank;
+	DEPLINT v_act_blank;
+	DEPLINT hsync_offset;
+	DEPLINT hsync_pw;
+	DEPLINT vsync_offset;
+	DEPLINT vsync_pw;
+	DEPLINT h_image_size;
+	DEPLINT v_image_size;
+	DEPLINT h_border;
+	DEPLINT v_border;
+	BOOL ilace;
+	DEPLINT stereo;
+	DEPLINT comp_sep;
+	BOOL serr_v_pol;
+	BOOL sync_comp_h_pol;
+};
+
+typedef struct MyMonitorDescriptorBlock *MonitorDescriptorBlock;
+
+struct MyMonitorDescriptorBlock
+{
+	char mon_snum[14];
+	char ascii_data[14];
+	DEPLINT mrl_min_vrate;
+	DEPLINT mrl_max_vrate;
+	DEPLINT mrl_min_hrate;
+	DEPLINT mrl_max_hrate;
+	DEPLINT mrl_max_pix_clk;
+	DEPLINT mrl_gtf_support;
+	BOOL mrl_bad_stf;
+	DEPLINT mrl_reserved_11;
+	DEPLINT mrl_gtf_start_freq;
+	DEPLINT mrl_gtf_c;
+	DEPLINT mrl_gtf_m;
+	DEPLINT mrl_gtf_k;
+	DEPLINT mrl_gtf_j;
+	char mon_name[14];
+	DEPLINT cp_wpoint_index1;
+	DEPLINT cp_w_lb1;
+	BOOL cp_w_x1;
+	BOOL cp_w_y1;
+	BOOL cp_w_gam1;
+	DEPLINT cp_wpoint_index2;
+	DEPLINT cp_w_lb2;
+	BOOL cp_w_x2;
+	BOOL cp_w_y2;
+	BOOL cp_w_gam2;
+	BOOL cp_bad_set;
+	DEPLINT  cp_pad1;
+	DEPLINT cp_pad2;
+	DEPLINT cp_pad3;
+	DEPLINT st9_hap;
+	DEPLINT st9_imasp;
+	DEPLINT st9_ref;
+	DEPLINT st10_hap;
+	DEPLINT st10_imasp;
+	DEPLINT st10_ref;
+	DEPLINT st11_hap;
+	DEPLINT st11_imasp;
+	DEPLINT st11_ref;
+	DEPLINT st12_hap;
+	DEPLINT st12_imasp;
+	DEPLINT st12_ref;
+	DEPLINT st13_hap;
+	DEPLINT st13_imasp;
+	DEPLINT st13_ref;
+	DEPLINT st14_hap;
+	DEPLINT st14_imasp;
+	DEPLINT st14_ref;
+	BOOL st_set;
+	DEPLINT ms_byte[13];
+};
+
+typedef struct MySVDescriptorList *SVDescriptorList;
+
+struct MySVDescriptorList
+{
+	BOOL native;
+	DEPLINT vid_id;
+};
+
+typedef struct MySADescriptorList *SADescriptorList;
+
+struct MySADescriptorList
+{
+	BOOL rsvd1;
+	DEPLINT aud_format;
+	DEPLINT max_num_chan;
+	BOOL rsvd2;
+	BOOL khz_192;
+	BOOL khz_176;
+	BOOL khz_96;
+	BOOL khz_88;
+	BOOL khz_48;
+	BOOL khz_44;
+	BOOL khz_32;
+	DEPLINT unc_rsrvd;
+	BOOL unc_24bit;
+	BOOL unc_20bit;
+	BOOL unc_16bit;
+	DEPLINT comp_maxbitrate;
+	BYTE sample_sizes;
+	BYTE sample_rates;
+};
+
+typedef struct MySpadPayload *SpadPayload;
+
+struct MySpadPayload
+{
+	BOOL rlc_rrc;
+	BOOL flc_frc;
+	BOOL rc;
+	BOOL rl_rr;
+	BOOL fc;
+	BOOL lfe;
+	BOOL fl_fr;
+};
+
+typedef struct MyCeaDataBlock *CeaDataBlock;
+
+struct MyCeaDataBlock
+{
+	struct MySVDescriptorList svd[SVD_MAX];
+	struct MySADescriptorList sad[SAD_MAX];
+	SpadPayload spad;
+	WORD ieee_reg[2];
+	BOOL vsdb_hdmi;
+	char *vsdb_payload;
+	DEPLINT hdmi_addr_a;
+	DEPLINT hdmi_addr_b;
+	DEPLINT hdmi_addr_c;
+	DEPLINT hdmi_addr_d;
+	DEPLINT vsdb_ext[26];
+	BOOL supports_ai;
+};
+
+typedef struct MyCeaTimingExtension *CeaTimingExtension;
+
+struct MyCeaTimingExtension
+{
+	DEPLINT cea_rev;
+	BOOL underscan;
+	BOOL audio;
+	BOOL YCC444;
+	BOOL YCC422;
+	DEPLINT native_formats;
+	CeaDataBlock cea;
+	DEPLINT checksum;
+};
+
+typedef struct MyEdidInfo *EdidInfo;
+
+struct MyEdidInfo{
+	BOOL edid_header;
+	DEPLINT edid_extensions;
+	DEPLINT edid_checksum;
+	DEPLINT ext_block_count;
+	VendorProductId vpi;
+	EdidVerRev evr;
+	BasicDispParams bdp;
+	ColorCharacteristics cc;
+	EstablishedTiming et;
+	struct MyStandardTimingList st[ST_MAX];
+	struct MyDetailedTimingBlockList dtb[DTD_MAX];
+	MonitorDescriptorBlock mdb;
+	CeaTimingExtension cea;
+
+};
+
+DEPLINT parse_edid(EdidInfo e,BYTE *d);
+EdidInfo init_edid_info(EdidInfo edid);
+void clear_edid(EdidInfo e);
+
+#endif
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/adi9889/AD9889_setup.c
+++ linux-mvl-dove-2.6.32/drivers/video/display/adi9889/AD9889_setup.c
@@ -0,0 +1,964 @@
+/******************************************************************************
+*                                                                             *
+* License Agreement                                                           *
+*                                                                             *
+* Copyright (c) 2006 Analog Devices Inc.                                      *
+* All rights reserved.                                                        *
+*                                                                             *
+* This source code is intended for the recipient only under the guidelines of *
+* the non-disclosure agreement with Analog Devices Inc.                       *
+*                                                                             *
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR  *
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,    *
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE *
+* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER      *
+* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING     *
+* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER         *
+* DEALINGS IN THE SOFTWARE.                                                   *
+*                                                                             *
+*                                                                             *
+* This software is intended for use with the AD9889A and derivative parts only*
+*																		                                          *
+******************************************************************************/
+
+/******************************************************************************
+*                                                                             *
+* THIS IS A READ-ONLY SOURCE FILE. DO NOT EDIT IT DIRECTLY.                   *
+* Author: Matthew McCarn (matthew.mccarn@analog.com)                          *
+* Date: May 16, 2006                                                          *
+*                                                                             *
+******************************************************************************/
+//#include <stdio.h>
+//#include <stdlib.h>
+//#include <system.h>
+#include "type_def.h"
+#include "edid_parse.h"
+#include "reg_handler.h"
+#include "AD9889_setup.h"
+#include "ad9889_macros.h"
+#include "AD9889A_i2c_handler.h"
+
+
+#if defined(HDCP_OPTION)
+//static DEPLINT bksv_flag_count = 0;
+static DEPLINT hdcp_status = 0;
+static DEPLINT hdcp_enabled = 0;
+static DEPLINT hdcp_requested = 0;
+static DEPLINT bksv_flag_counter = 0;
+static DEPLINT bksv_count = 0;
+static DEPLINT total_bksvs = 0;
+static BYTE bksv[BKSV_MAX];
+static BYTE hdcp_bstatus[2];
+#endif
+
+EdidInfo edid = NULL;
+DEPLINT (*i2c_write_bytes)(DEPLINT dev_addr_in, DEPLINT reg_addr_in, BYTE *data_in, DEPLINT count_in);
+DEPLINT (*i2c_read_bytes)(DEPLINT dev_addr_in, DEPLINT reg_addr_in, BYTE *data_out, DEPLINT count_in);
+
+void (*error_callback_function)(int);
+
+DEPLINT next_segment_number;
+
+BOOL edid_ready = FALSE;
+
+BOOL csc_444_422;
+
+
+void av_mute_on()
+{
+	ADI89_SET_CH0PWRDWNI2C(1);
+	ADI89_SET_CH1PWRDWNI2C(1);
+	ADI89_SET_CH2PWRDWNI2C(1);
+	ADI89_SET_SET_AVMUTE(1);
+	ADI89_SET_CLEAR_AVMUTE(0);
+}
+
+void av_mute_off()
+{
+	ADI89_SET_CH0PWRDWNI2C(0);
+	ADI89_SET_CH1PWRDWNI2C(0);
+	ADI89_SET_CH2PWRDWNI2C(0);
+	ADI89_SET_SET_AVMUTE(0);
+	ADI89_SET_CLEAR_AVMUTE(1);
+}
+
+void set_MCLK_ratio(int val)
+{
+	ADI89_SET_MCLK_RATIO(val);
+}
+
+#if defined(HDCP_OPTION)
+BOOL is_repeater()
+{
+	return ADI89_GET_BCAPS;
+}
+#endif
+
+void clear_interrupts()
+{
+	BYTE hexFF[2] = {0xFF,0xFF};
+
+	i2c_write_bytes(AD9889_ADDRESS, 0x96, hexFF, 2);
+}
+
+extern void msleep(int);
+
+void handle_hpd_interrupt()
+{
+	if (ADI89_GET_HPD_STATE)
+	{
+		// Power down TMDS
+		DEBUG_MESSAGE("POWER DOWN TMDS");
+		ADI89_SET_CH0PWRDWNI2C(1);
+		ADI89_SET_CH1PWRDWNI2C(1);
+		ADI89_SET_CH2PWRDWNI2C(1);
+		ADI89_SET_POWER_DOWN(0); /* Rabeeh - review this - TODO */
+		msleep(1000);
+#if defined(HDCP_OPTION)
+		disable_hdcp();
+#endif
+		ADI89_SET_MASK1(0x84);
+		ADI89_SET_MASK2(0x3);
+	}
+
+	if (edid)
+		clear_edid(edid);
+}
+
+void set_EDID_ready(BOOL value)
+{
+	edid_ready = value;
+}
+
+BOOL edid_reading_complete()
+{
+	return edid_ready;
+}
+
+DEPLINT handle_edid_interrupt()
+{
+	BYTE edid_dat[256];
+
+	i2c_read_bytes(0x7e, 0x00, edid_dat, 256);
+	edid = init_edid_info(edid);
+
+	return parse_edid(edid, edid_dat);
+}
+
+void initialize_raptor()
+{
+	BYTE value;
+
+	printk ("Initializing raptor\n");
+
+#if defined(HDCP_OPTION)
+	// Set internal or external HDCP keys
+	ADI89_SET_INT_EPP_ON(HDMI_TX);
+#endif
+
+	// Power Down TMDS lines
+	av_mute_on();
+	ADI89_SET_I2S3_ENABLE(0);
+	ADI89_SET_I2S2_ENABLE(0);
+	ADI89_SET_I2S1_ENABLE(0);
+	ADI89_SET_I2S0_ENABLE(0);
+
+	// Power up chip
+	ADI89_SET_POWER_DOWN(0);
+
+	// Set static reserved registers
+	ADI89_SET_AVE_MODE(0);
+	value = 0x03;
+	i2c_write_bytes(AD9889_ADDRESS, 0x98, &value, 1);
+	value = 0x38;
+	i2c_write_bytes(AD9889_ADDRESS, 0x9C, &value, 1);
+	value = 0x87;
+	i2c_write_bytes(AD9889_ADDRESS, 0xA2, &value, 1);
+	i2c_write_bytes(AD9889_ADDRESS, 0xA3, &value, 1);
+	value = 0xFF;
+	i2c_write_bytes(AD9889_ADDRESS, 0xBB, &value, 1);
+	ADI89_SET_CLK_DELAY(3);
+	ADI89_SET_R30(0x8);
+
+	DEBUG_MESSAGE("Raptor Presets Loaded\n");
+}
+
+void AD9889_reset(void)
+{
+	ADI89_SET_LOGIC_RESET(1);
+	ADI89_SET_LOGIC_RESET(0);
+}
+
+void setup_colorspace(Colorspace colorspace_in, Range colorspace_range)
+{
+	BYTE rgb_rgb[24] = {8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0};
+//	BYTE rgb_rgb[24] = {0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0};
+	BYTE rgb_hdtv_ycrcb_0[24] = {8, 45, 24, 147, 31, 63, 8, 0, 3, 104, 11, 113, 1, 39, 0, 0, 30, 33, 25, 178, 8, 45, 8, 0};
+	BYTE rgb_hdtv_ycrcb_16[24] = {7, 6, 25, 160, 31, 91, 8, 0, 2, 237, 9, 211, 0, 253, 1, 0, 30, 100, 26, 150, 7, 6, 8, 0};
+	BYTE rgb_sdtv_ycrcb_0[24] = {8, 45, 25, 39, 30, 172, 8, 0, 4, 201, 9, 100, 1, 211, 0, 0, 29, 63, 26, 147, 8, 45, 8, 0};
+	BYTE rgb_sdtv_ycrcb_16[24] = {7, 6, 26, 30, 30, 220, 8, 0, 4, 28, 8, 17, 1, 145, 1, 0, 29, 163, 27, 87, 7, 6, 8, 0};
+	BYTE hdtv_ycrcb_0_rgb[24] = {12, 82, 8, 0, 0, 0, 25, 215, 28, 84, 8, 0, 30, 137, 2, 145, 0, 0, 8, 0, 14, 135, 24, 188};
+	BYTE hdtv_ycrcb_0_hdtv_ycrcb_0[24] = {8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0};
+	BYTE hdtv_ycrcb_0_hdtv_ycrcb_16[24] = {13, 190, 0, 0, 0, 0, 1, 33, 0, 0, 13, 190, 0, 0, 1, 0, 0, 0, 0, 0, 13, 190, 1, 33};
+	BYTE hdtv_ycrcb_16_rgb[24] = {7, 44, 4, 168, 0, 0, 28, 31, 29, 221, 4, 168, 31, 38, 1, 52, 0, 0, 4, 168, 8, 117, 27, 123};
+	BYTE hdtv_ycrcb_16_hdtv_ycrcb_0[24] = {9, 81, 0, 0, 0, 0, 31, 88, 0, 0, 9, 81, 0, 0, 31, 107, 0, 0, 0, 0, 9, 81, 31, 88};
+	BYTE hdtv_ycrcb_16_hdtv_ycrcb_16[24] = {8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0};
+	BYTE sdtv_ycrcb_0_rgb[24] = {10, 248, 8, 0, 0, 0, 26, 132, 26, 106, 8, 0, 29, 80, 4, 35, 0, 0, 8, 0, 13, 219, 25, 18};
+	BYTE sdtv_ycrcb_0_sdtv_ycrcb_0[24] = {8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0};
+	BYTE sdtv_ycrcb_0_sdtv_ycrcb_16[24] = {13, 190, 0, 0, 0, 0, 1, 33, 0, 0, 13, 190, 0, 0, 1, 0, 0, 0, 0, 0, 13, 190, 1, 33};
+	BYTE sdtv_ycrcb_16_rgb[24] = {6, 99, 4, 168, 0, 0, 28, 132, 28, 192, 4, 168, 30, 111, 2, 30, 0, 0, 4, 168, 8, 17, 27, 173};
+	BYTE sdtv_ycrcb_16_sdtv_ycrcb_0[24] = {9, 81, 0, 0, 0, 0, 31, 88, 0, 0, 9, 81, 0, 0, 31, 107, 0, 0, 0, 0, 9, 81, 31, 88};
+	BYTE sdtv_ycrcb_16_sdtv_ycrcb_16[24] = {8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0};
+	// Select colorspace in based on parameters
+	DEPLINT space_in = 0;
+	DEPLINT space_out;
+
+	if (colorspace_in == RGB)
+	{
+		space_in = 1;
+		if (colorspace_range != AD9889_0_255)
+		{
+			ERROR_MESSAGE("Error: Colorspace in not supported");
+			error_callback_function(0x11);
+		}
+	}
+	else if (colorspace_in == YCbCr709)
+	{
+		if (colorspace_range == AD9889_0_255)
+		{
+			space_in = 2;
+		}
+		else if (colorspace_range == AD9889_16_235)
+		{
+			space_in = 3;
+		}
+		else
+		{
+			ERROR_MESSAGE("Error: Colorspace in not supported");
+			error_callback_function(0x11);
+		}
+	}
+        else if (colorspace_in == YCbCr601)
+	{
+		if (colorspace_range == AD9889_0_255)
+		{
+			space_in = 4;
+		}
+		else if (colorspace_range == AD9889_16_235)
+		{
+			space_in = 5;
+		}
+		else
+		{
+			ERROR_MESSAGE("Error: Problem selecting colorspace");
+			error_callback_function(0x11);
+		}
+	}
+	else
+	{
+		ERROR_MESSAGE("Error: Problem selecting colorspace");
+		error_callback_function(0x11);
+	}
+
+	// Select colorspace out based on EDID information and colorspace in
+	if (space_in == 1)
+		space_out = 1;
+	if ((space_in == 2) || (space_in == 3) || (space_in == 4) || (space_in == 5))
+	{
+		if (((edid->cea->YCC444)==TRUE) || ((edid->cea->YCC422)==TRUE))
+			space_out = space_in;
+		else
+			space_out = 1;
+	}
+
+	// Set colorspace registers
+	if (space_out == space_in)
+	{
+		if (colorspace_in == RGB)
+		{
+			ADI89_SET_VFE_OUT_FMT(0);
+			ADI89_SET_Y1Y0(0);
+		}
+		if (((colorspace_in == YCbCr709) || (colorspace_in == YCbCr601)) && !csc_444_422)
+		{
+			ADI89_SET_VFE_OUT_FMT(2);
+			ADI89_SET_Y1Y0(1);
+		}
+		if (((colorspace_in == YCbCr709) || (colorspace_in == YCbCr601)) && csc_444_422)
+		{
+			ADI89_SET_VFE_OUT_FMT(1);
+			ADI89_SET_Y1Y0(2);
+		}
+	}
+	else
+	{
+		ADI89_SET_VFE_OUT_FMT(0);
+		ADI89_SET_Y1Y0(0);
+	}
+
+	if (space_in==1 && space_out==1)
+	{
+		i2c_write_bytes(AD9889_ADDRESS,0x18,rgb_rgb ,24);
+		ADI89_SET_CSC_MODE(1);
+	}
+
+	if (space_in==1 && space_out==2)
+	{
+		i2c_write_bytes(AD9889_ADDRESS,0x18,rgb_hdtv_ycrcb_0 ,24);
+		ADI89_SET_CSC_MODE(0);
+	}
+
+	if (space_in==1 && space_out==3)
+	{
+		i2c_write_bytes(AD9889_ADDRESS,0x18,rgb_hdtv_ycrcb_16 ,24);
+		ADI89_SET_CSC_MODE(0);
+	}
+
+	if (space_in==2 && space_out==1)
+	{
+		i2c_write_bytes(AD9889_ADDRESS,0x18,hdtv_ycrcb_0_rgb ,24);
+		ADI89_SET_CSC_MODE(1);
+	}
+
+	if (space_in==2 && space_out==2)
+	{
+		i2c_write_bytes(AD9889_ADDRESS,0x18,hdtv_ycrcb_0_hdtv_ycrcb_0 ,24);
+		ADI89_SET_CSC_MODE(1);
+	}
+
+	if (space_in==2 && space_out==3)
+	{
+		i2c_write_bytes(AD9889_ADDRESS,0x18,hdtv_ycrcb_0_hdtv_ycrcb_16 ,24);
+		ADI89_SET_CSC_MODE(0);
+	}
+
+	if (space_in==3 && space_out==1)
+	{
+		i2c_write_bytes(AD9889_ADDRESS,0x18,hdtv_ycrcb_16_rgb ,24);
+		ADI89_SET_CSC_MODE(2);
+	}
+
+	if (space_in==3 && space_out==2)
+	{
+		i2c_write_bytes(AD9889_ADDRESS,0x18,hdtv_ycrcb_16_hdtv_ycrcb_0 ,24);
+		ADI89_SET_CSC_MODE(0);
+	}
+
+	if (space_in==3 && space_out==3)
+	{
+		i2c_write_bytes(AD9889_ADDRESS,0x18,hdtv_ycrcb_16_hdtv_ycrcb_16 ,24);
+		ADI89_SET_CSC_MODE(1);
+	}
+
+	if (space_in==1 && space_out==4)
+	{
+		i2c_write_bytes(AD9889_ADDRESS,0x18,rgb_sdtv_ycrcb_0 ,24);
+		ADI89_SET_CSC_MODE(0);
+	}
+
+	if (space_in==1 && space_out==5)
+	{
+		i2c_write_bytes(AD9889_ADDRESS,0x18,rgb_sdtv_ycrcb_16 ,24);
+		ADI89_SET_CSC_MODE(0);
+	}
+
+	if (space_in==4 && space_out==1)
+	{
+		i2c_write_bytes(AD9889_ADDRESS,0x18,sdtv_ycrcb_0_rgb ,24);
+		ADI89_SET_CSC_MODE(1);
+	}
+
+	if (space_in==4 && space_out==4)
+	{
+		i2c_write_bytes(AD9889_ADDRESS,0x18,sdtv_ycrcb_0_sdtv_ycrcb_0 ,24);
+		ADI89_SET_CSC_MODE(1);
+	}
+
+	if (space_in==4 && space_out==5)
+	{
+		i2c_write_bytes(AD9889_ADDRESS,0x18,sdtv_ycrcb_0_sdtv_ycrcb_16 ,24);
+		ADI89_SET_CSC_MODE(1);
+	}
+
+	if (space_in==5 && space_out==1)
+	{
+		i2c_write_bytes(AD9889_ADDRESS,0x18,sdtv_ycrcb_16_rgb ,24);
+		ADI89_SET_CSC_MODE(2);
+	}
+
+	if (space_in==5 && space_out==4)
+	{
+		i2c_write_bytes(AD9889_ADDRESS,0x18,sdtv_ycrcb_16_sdtv_ycrcb_0 ,24);
+		ADI89_SET_CSC_MODE(1);
+	}
+
+	if (space_in==5 && space_out==5)
+	{
+		i2c_write_bytes(AD9889_ADDRESS,0x18,sdtv_ycrcb_16_sdtv_ycrcb_16 ,24);
+		ADI89_SET_CSC_MODE(1);
+	}
+
+	ADI89_SET_CSC_ENABLE(1);
+}
+
+#if defined(HDCP_OPTION)
+void enable_hdcp(void)
+{
+	hdcp_requested = 1;
+	ADI89_SET_FRAME_ENC(1);
+	ADI89_SET_HDCP_DESIRED(1);
+}
+
+void disable_hdcp()
+{
+	ADI89_SET_HDCP_DESIRED(0);
+	ADI89_SET_FRAME_ENC(0);
+	hdcp_enabled = 0;
+	hdcp_requested = 0;
+	hdcp_status = 0;
+}
+
+BOOL get_hdcp_status()
+{
+	return hdcp_status;
+}
+
+void set_hdcp_status(BOOL status)
+{
+	hdcp_status = status;
+}
+
+BOOL get_hdcp_hdcp_requested()
+{
+	return hdcp_requested;
+}
+
+void set_hdcp_hdcp_requested(BOOL requested)
+{
+	hdcp_requested = requested;
+}
+
+BOOL get_hdcp_hdcp_enabled()
+{
+	return hdcp_enabled;
+}
+
+void set_hdcp_hdcp_enabled(BOOL enabled)
+{
+	hdcp_enabled = enabled;
+}
+
+void compare_bksvs()
+{
+}
+#endif
+
+BOOL get_hdmi_status()
+{
+	return ADI89_GET_EXT_HDMI_MODE;
+}
+
+#if defined(HDCP_OPTION)
+void handle_bksv_ready_interrupt()
+{
+	if (hdcp_requested == 1)
+	{
+		//DEPLINT i = 0;
+		bksv_count = ADI89_GET_BKSV_COUNT;
+
+		hdcp_enabled = 1;
+
+		if (bksv_count == 0)
+		{
+			// Read BKSV registers first
+			total_bksvs = 1;
+			bksv_flag_counter = 0;
+			//free(bksv);
+			//bksv = (BYTE *)chkmalloc(5);
+			//DEPLINT wait;
+			// for(wait = 0;wait < 1000000; wait++);
+			bksv[4] = ADI89_GET_BKSV1;
+			bksv[3] = ADI89_GET_BKSV2;
+			bksv[2] = ADI89_GET_BKSV3;
+			bksv[1] = ADI89_GET_BKSV4;
+			bksv[0] = ADI89_GET_BKSV5;
+
+			hdcp_bstatus[1] = 0;
+			hdcp_bstatus[0] = 0;
+
+			if(ADI89_GET_HDMI_MODE)
+				hdcp_bstatus[1] = 0x10;
+		}
+
+		// Read downstream KSVs from EDID memory for a repeater
+		if (bksv_count > 0)
+		{
+			if (bksv_flag_counter == 0)
+			{
+				i2c_read_bytes(AD9889_MEMORY_ADDRESS,0xF9,hdcp_bstatus,2);
+			}
+
+			i2c_read_bytes(AD9889_MEMORY_ADDRESS, 0x00, bksv + 5 + (bksv_flag_counter*65), (bksv_count*5));
+
+			total_bksvs += bksv_count;
+			bksv_flag_counter++;
+		}
+	}
+	else
+	{
+		ERROR_MESSAGE("Error: BKSV Interrupt with no Request\n");
+	}
+}
+#endif
+
+void initialize_ad9889_i2c(DEPLINT (*read_function)(DEPLINT, DEPLINT, BYTE *, DEPLINT), DEPLINT (*write_function)(DEPLINT, DEPLINT, BYTE *, DEPLINT))
+{
+	i2c_read_bytes = read_function;
+	i2c_write_bytes = write_function;
+	DEBUG_MESSAGE("I2C read and write functions assigned\n");
+}
+
+void initialize_error_callback(void (*error_function)(int))
+{
+	error_callback_function = error_function;
+}
+
+void set_video_mode(Timing video_timing, Colorspace colorspace_in, Range colorspace_range, AspectRatio aspect_ratio)
+{
+	setup_colorspace(colorspace_in, colorspace_range);
+
+	if (aspect_ratio == _4x3)
+	{
+		ADI89_SET_ASP_RATIO(0);
+		ADI89_SET_M1M0(1);
+	}
+	if (aspect_ratio == _16x9)
+	{
+		ADI89_SET_ASP_RATIO(1);
+		ADI89_SET_M1M0(2);
+	}
+
+	hdmi_or_dvi();
+}
+
+void set_input_format(DEPLINT input_format, DEPLINT input_style, DEPLINT input_bit_width, DEPLINT clock_edge)
+{
+	ADI89_SET_VFE_INPUT_ID(input_format);
+	ADI89_SET_VFE_422_WIDTH(input_bit_width);
+	ADI89_SET_VFE_INPUT_STYLE(input_style);
+	ADI89_SET_VFE_INPUT_EDGE(clock_edge);
+
+#if 0 /* TODO - Rabeeh - review this code */
+	if(edid->cea->YCC444)
+	{
+		csc_444_422 = TRUE;
+	}
+	else if(edid->cea->YCC422)
+	{
+		csc_444_422 = FALSE;
+	}
+	else
+	{
+		csc_444_422 = TRUE;
+	}
+#endif
+}
+
+void set_audio_mode(SamplingFrequency sampling_frequency, DEPLINT bit_width, DEPLINT channel_count, DEPLINT channel_map)
+{
+	DEPLINT fs;
+	DEPLINT sample[8]={0,4096,6272,6144,12544,12288,25088,24576};
+	BYTE n[3];
+
+	if (sampling_frequency == _32k)
+	{
+		ADI89_SET_I2S_SF(3);
+		fs = 1;
+	}
+
+	if (sampling_frequency == _44k)
+	{
+		ADI89_SET_I2S_SF(0);
+		fs = 2;
+	}
+
+	if (sampling_frequency == _48k)
+	{
+		ADI89_SET_I2S_SF(2);
+		fs = 3;
+	}
+
+	if (sampling_frequency == _88k)
+	{
+		ADI89_SET_I2S_SF(8);
+		fs = 4;
+	}
+
+	if (sampling_frequency == _96k)
+	{
+		ADI89_SET_I2S_SF(10);
+		fs = 5;
+	}
+
+	if (sampling_frequency == _176k)
+	{
+		ADI89_SET_I2S_SF(12);
+		fs = 6;
+	}
+
+	if (sampling_frequency == _192k)
+	{
+		ADI89_SET_I2S_SF(14);
+		fs = 7;
+	}
+
+	n[0] = (char)((sample[fs] >> 16) & 0x0F);
+	n[1] = (char)((sample[fs] >> 8) & 0xFF);
+	n[2] = (char)(sample[fs] & 0xFF);
+
+	i2c_write_bytes(AD9889_ADDRESS,0x01,n,3);
+
+	ADI89_SET_I2S_BIT_WIDTH(bit_width);
+
+	if (channel_count)
+		ADI89_SET_AUDIO_IF_CC(channel_count-1);
+	else
+		ADI89_SET_AUDIO_IF_CC(0);
+
+	if (channel_count >= 0)
+		ADI89_SET_I2S0_ENABLE(1);
+	else
+		ADI89_SET_I2S0_ENABLE(0);
+
+	if (channel_count > 2)
+		ADI89_SET_I2S1_ENABLE(1);
+	else
+		ADI89_SET_I2S1_ENABLE(0);
+
+	if (channel_count > 4)
+		ADI89_SET_I2S2_ENABLE(1);
+	else
+		ADI89_SET_I2S2_ENABLE(0);
+
+	if (channel_count > 6)
+		ADI89_SET_I2S3_ENABLE(1);
+	else
+		ADI89_SET_I2S3_ENABLE(0);
+
+	ADI89_SET_SPEAKER_MAPPING(channel_map);
+}
+
+void adi9889_early_setup(void)
+{
+	adi_set_i2c_reg(AD9889_ADDRESS,0xa5, 0xc0, 6, 0x3);
+	adi_set_i2c_reg(AD9889_ADDRESS,0x9d, 0xff, 0, 0x68);
+}
+
+void set_spdif_audio(void)
+{
+	ADI89_SET_EXT_AUDIOSF_SEL(0);
+	ADI89_SET_CR_BIT(1);
+}
+
+void set_audio_format(AudioInputMode input_mode)
+{
+	if (input_mode == SPDIF)
+	{
+		ADI89_SET_SPDIF_EN(1);
+		ADI89_SET_AUDIO_SEL(1);
+	}
+
+	if (input_mode == I2S)
+	{
+		ADI89_SET_AUDIO_SEL(0);
+		ADI89_SET_I2S_FORMAT(0);
+	}
+
+	if (input_mode == I2S_LEFT)
+	{
+		ADI89_SET_AUDIO_SEL(0);
+		ADI89_SET_I2S_FORMAT(2);
+	}
+
+	if (input_mode == I2S_RIGHT)
+	{
+		ADI89_SET_AUDIO_SEL(0);
+		ADI89_SET_I2S_FORMAT(1);
+	}
+}
+
+BOOL query_vid(DEPLINT vid)
+{
+	DEPLINT i;
+
+	for (i = 0; i < SVD_MAX; i++)
+	{
+		if (edid->cea->cea->svd[i].vid_id == vid)
+			return TRUE;
+	}
+	return FALSE;
+}
+
+BOOL query_colorspace_in(Colorspace colorspace_in)
+{
+/*
+	if(colorspace_in == RGB)
+		return TRUE;
+	else if((colorspace_in == YCbCr444) && edid->cea->YCC444)
+		return TRUE;
+	else if((colorspace_in == YCbCr422) && edid->cea->YCC422)
+		return TRUE;
+	else
+*/
+        return FALSE;
+}
+
+BOOL query_aspect_ratio(AspectRatio aspect_ratio)
+{
+	if (aspect_ratio == edid->st->imasp)
+		return TRUE;
+	else
+		return FALSE;
+}
+
+BOOL query_sampling_frequency(SamplingFrequency sampling_frequency)
+{
+	DEPLINT i;
+
+	for (i = 0; i < SAD_MAX; i++)
+	{
+		if ((sampling_frequency == _32k) && edid->cea->cea->sad[i].khz_32)
+			return TRUE;
+		if ((sampling_frequency == _44k) && edid->cea->cea->sad[i].khz_44)
+			return TRUE;
+		if ((sampling_frequency == _48k) && edid->cea->cea->sad[i].khz_48)
+			return TRUE;
+		if ((sampling_frequency == _88k) && edid->cea->cea->sad[i].khz_88)
+			return TRUE;
+		if ((sampling_frequency == _96k) && edid->cea->cea->sad[i].khz_96)
+			return TRUE;
+		if ((sampling_frequency == _176k) && edid->cea->cea->sad[i].khz_176)
+			return TRUE;
+		if ((sampling_frequency == _192k) && edid->cea->cea->sad[i].khz_192)
+			return TRUE;
+	}
+	return FALSE;
+}
+
+BOOL query_bit_width(DEPLINT bit_width)
+{
+	DEPLINT i;
+
+	for (i = 0; i < SAD_MAX; i++)
+	{
+		if ((bit_width == 16) && edid->cea->cea->sad[i].unc_16bit)
+			return TRUE;
+		if ((bit_width == 20) && edid->cea->cea->sad[i].unc_20bit)
+			return TRUE;
+		if ((bit_width == 24) && edid->cea->cea->sad[i].unc_24bit)
+			return TRUE;
+	}
+	return FALSE;
+}
+
+BOOL query_channel_count(DEPLINT channel_count)
+{
+	DEPLINT i;
+
+	for (i = 0; i < SAD_MAX; i++)
+	{
+		if (channel_count <= (edid->cea->cea->sad[i].max_num_chan)+1)
+			return TRUE;
+	}
+	return FALSE;
+}
+
+BOOL query_channel_map(DEPLINT channel_map)
+{
+	if (channel_map & 1)
+	{
+		if (!(edid->cea->cea->spad->fl_fr))
+			return FALSE;
+	}
+	if (channel_map & 2)
+	{
+		if (!(edid->cea->cea->spad->lfe))
+			return FALSE;
+	}
+	if (channel_map & 4)
+	{
+		if (!(edid->cea->cea->spad->fc))
+			return FALSE;
+	}
+	if (channel_map & 8)
+	{
+		if (!(edid->cea->cea->spad->rl_rr))
+			return FALSE;
+	}
+	if (channel_map & 16)
+	{
+		if (!(edid->cea->cea->spad->rc))
+			return FALSE;
+	}
+	if (channel_map & 32)
+	{
+		if (!(edid->cea->cea->spad->flc_frc))
+			return FALSE;
+	}
+	if (channel_map & 64)
+	{
+		if (!(edid->cea->cea->spad->rlc_rrc))
+			return FALSE;
+	}
+	return TRUE;
+}
+
+void hdmi_or_dvi()
+{
+	if (edid_ready)
+	{
+		if (edid->cea->cea->vsdb_hdmi)
+		{
+			printk ("Setting mode to HDMI\n");
+			ADI89_SET_EXT_HDMI_MODE(1);
+		}
+		else
+		{
+			printk ("Setting mode to DVI\n");
+			ADI89_SET_EXT_HDMI_MODE(0);
+		}
+	}
+	else
+	{
+		printk ("Setting mode to DVI - But this is fallback !!!\n");
+		ADI89_SET_EXT_HDMI_MODE(0);
+	}
+}
+
+void force_hdmi(BOOL hdmi)
+{
+	ADI89_SET_EXT_HDMI_MODE(hdmi);
+}
+
+BOOL check_Rx_sense()
+{
+	return ADI89_GET_RX_SENSE;
+}
+
+void set_avi_if(AVIInfoframe info)
+{
+	ADI89_SET_A0(info->active_format);
+	ADI89_SET_B1B0(info->bar_info);
+	ADI89_SET_S1S0(info->scan_info);
+	ADI89_SET_C1C0(info->colorimetry);
+	ADI89_SET_SC(info->non_unif_pic_scaling);
+	ADI89_SET_R30(info->active_fmt_asp_rat);
+	ADI89_SET_AVI_LINE_START(info->active_line_start);
+	ADI89_SET_AVI_LINE_END(info->active_line_end);
+	ADI89_SET_AVI_PIXEL_START(info->active_pixel_start);
+	ADI89_SET_AVI_PIXEL_END(info->active_pixel_end);
+	ADI89_SET_AVIIF_PKT_EN(1);
+}
+
+void set_audio_if(AudioInfoframe info)
+{
+	ADI89_SET_AUDIO_IF_DM_INH(info->down_mix_inh);
+	ADI89_SET_AUDIO_IF_LSV(info->level_shift);
+	ADI89_SET_AUDIOIF_PKT_EN(1);
+}
+
+void set_spd_packet(SPDPacket info)
+{
+	i2c_write_bytes(AD9889_ADDRESS, 0x52, info->spd_byte_1to25, 25);
+	ADI89_SET_SPD_PKT_EN(1);
+}
+
+void set_mpeg_packet(MPEGPacket info)
+{
+	i2c_write_bytes(AD9889_ADDRESS, 0x6B, info->mpeg_byte_0to3, 4);
+	ADI89_SET_MPEG_FR(info->frame_repeat);
+	ADI89_SET_MPEG_MF(info->frame_indicator);
+	ADI89_SET_MPEG_PKT_EN(1);
+}
+
+void set_acp_packet(ACPPacket info)
+{
+	ADI89_SET_ACP_TYPE(info->acp_type);
+	ADI89_SET_ACP_BYTE1(info->acp_byte_1);
+	ADI89_SET_ACP_PKT_EN(1);
+}
+
+void set_isrc_packet(ISRCPacket info)
+{
+	ADI89_SET_ISRC_CONT(info->isrc_continued);
+	ADI89_SET_ISRC_VALID(info->isrc_valid);
+	ADI89_SET_ISRC_STATUS(info->isrc_status);
+	i2c_write_bytes(AD9889_ADDRESS, 0x74, info->isrc_1, 16);
+	i2c_write_bytes(AD9889_ADDRESS, 0x84, info->isrc_2, 16);
+	ADI89_SET_ISRC_PKT_EN(1);
+}
+
+void set_sync_params(DEPLINT h_dur, DEPLINT h_fp, DEPLINT v_dur, DEPLINT v_fp,DEPLINT h_pol,DEPLINT v_pol)
+{
+	ADI89_SET_VFE_HS_PLA(h_fp);
+	ADI89_SET_VFE_HS_DUR(h_dur);
+	ADI89_SET_VFE_VS_PLA(v_fp);
+	ADI89_SET_VFE_VS_DUR(v_dur);
+	ADI89_SET_ITU_HYSNC_POL(h_pol);
+	ADI89_SET_ITU_VSYNC_POL(v_pol);
+	ADI89_SET_SYNC_GEN_EN(1);
+}
+
+void set_clock_delay(DEPLINT setting)
+{
+	ADI89_SET_CLK_DELAY(setting);
+}
+
+void input_data_clock_2x(BOOL value)
+{
+	BYTE x = 0x04;
+	BYTE y = 0x40;
+
+	if (value == TRUE)
+	{
+		ADI89_SET_CLK_DELAY(0);
+		i2c_write_bytes(AD9889_ADDRESS,0x9D,&x,1);
+		i2c_write_bytes(AD9889_ADDRESS,0xA4,&y,1);
+	}
+	else
+	{
+		ADI89_SET_CLK_DELAY(3);
+		i2c_write_bytes(AD9889_ADDRESS,0x9D,&x,1);
+		i2c_write_bytes(AD9889_ADDRESS,0xA4,&y,1);
+	}
+}
+
+DEPLINT get_version()
+{
+	return 0x12;
+}
+
+void enable_sync_gen(BOOL val)
+{
+	ADI89_SET_SYNC_GEN_EN(val);
+}
+
+void enable_de_gen(BOOL val)
+{
+	ADI89_SET_DEGEN_EN(val);
+}
+
+void set_de_params(DEPLINT h_delay, DEPLINT v_delay, DEPLINT int_offset,DEPLINT act_width,DEPLINT act_height)
+{
+	ADI89_SET_VFE_HSYNCDELAYIN(h_delay);
+	ADI89_SET_VFE_VSYNCDELAYIN(v_delay);
+	ADI89_SET_VFE_OFFSET(int_offset);
+	ADI89_SET_VFE_WIDTH(act_width);
+	ADI89_SET_VFE_HEIGHT(act_height);
+	ADI89_SET_DEGEN_EN(1);
+}
+
+void AD9889_audio_mute(BOOL val)
+{
+
+}
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/adi9889/reg_handler.h
+++ linux-mvl-dove-2.6.32/drivers/video/display/adi9889/reg_handler.h
@@ -0,0 +1,16 @@
+//#include "AD9889_setup.h"
+#include "type_def.h"
+//#include "AD9889A_i2c_handler.h"
+//#include "AD9880_i2c_handler.h"
+
+#ifndef _REG_HANDLER_H_
+#define _REG_HANDLER_H_
+
+#define MAX_BYTES 4
+
+DEPLINT adi_get_i2c_reg(BYTE dev_add,DEPLINT reg_add, BYTE mask_reg0, DEPLINT bit2shift);
+void adi_set_i2c_reg(BYTE dev_add,DEPLINT reg_add, BYTE mask_reg0, DEPLINT bit2shift, DEPLINT val);
+DEPLINT adi_get_i2c_reg_mult(BYTE dev_add,DEPLINT reg_add, BYTE mask_reg0, BYTE mask_reg1, DEPLINT bit2shift, DEPLINT bytes);
+void adi_set_i2c_reg_mult(BYTE dev_add,DEPLINT reg_add, BYTE mask_reg0, BYTE mask_reg1, DEPLINT bit2shift, DEPLINT bytes, DEPLINT val);
+
+#endif //_REG_HANDLER_H_
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/adi9889/ad9889_macros.h
+++ linux-mvl-dove-2.6.32/drivers/video/display/adi9889/ad9889_macros.h
@@ -0,0 +1,65 @@
+/******************************************************************************
+*                                                                             *
+* License Agreement                                                           *
+*                                                                             *
+* Copyright (c) 2006 Analog Devices Inc.                                      *
+* All rights reserved.                                                        *
+*                                                                             *
+* This source code is intended for the recipient only under the guidelines of *
+* the non-disclosure agreement with Analog Devices Inc.                       *
+*                                                                             *
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR  *
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,    *
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE *
+* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER      *
+* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING     *
+* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER         *
+* DEALINGS IN THE SOFTWARE.                                                   *
+*                                                                             *
+*                                                                             *
+* This software is intended for use with the AD9889A and derivative parts only*
+*                                                                             *
+******************************************************************************/
+
+/******************************************************************************
+*                                                                             *
+* THIS IS A READ-ONLY SOURCE FILE. DO NOT EDIT IT DIRECTLY.                   *
+* Author: Matthew McCarn (matthew.mccarn@analog.com)                          *
+* Date: May 16, 2006                                                          *
+*                                                                             *
+******************************************************************************/
+#ifndef _AD9889_MACROS_H_
+#define _AD9889_MACROS_H_
+
+#define AD9889_ADDRESS		0x72
+#define AD9889_MEMORY_ADDRESS	0x7E
+#define AD9889A			0
+#define AD9389A			1
+#define HDMI_TX			AD9889A
+#define HDCP_OPTION
+
+//#define AD9889_DEBUG
+#define ERROR_MESSAGE(A)	printk(KERN_ERR A)
+#ifdef AD9889_DEBUG
+#define DEBUG_MESSAGE(A)	printk(A)
+#define DEBUG_MESSAGE_1(A,B)	printk(A,B)
+#define DEBUG_MESSAGE_2(A,B,C)	printk(A,B,C)
+#else
+#define DEBUG_MESSAGE(A)
+#define DEBUG_MESSAGE_1(A,B)
+#define DEBUG_MESSAGE_2(A,B,C)
+#endif
+#define ST_MAX			5
+#define DTD_MAX			5
+#define SAD_MAX			5
+#define SVD_MAX			5
+
+#define BKSV_MAX		75
+#define MAX_HDCP_NACK		4
+
+#define TIMER_CALLS_PER_2_SEC	20
+
+void *chkmalloc(size_t sz);
+void *chkrealloc(void *ptr,size_t sz);
+
+#endif //_AD9889_MACROS_H_
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/adi9889/edid_parse.c
+++ linux-mvl-dove-2.6.32/drivers/video/display/adi9889/edid_parse.c
@@ -0,0 +1,1034 @@
+/******************************************************************************
+*                                                                             *
+* License Agreement                                                           *
+*                                                                             *
+* Copyright (c) 2006 Analog Devices Inc.                                      *
+* All rights reserved.                                                        *
+*                                                                             *
+* This source code is intended for the recipient only under the guidelines of *
+* the non-disclosure agreement with Analog Devices Inc.                       *
+*                                                                             *
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR  *
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,    *
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE *
+* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER      *
+* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING     *
+* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER         *
+* DEALINGS IN THE SOFTWARE.                                                   *
+*                                                                             *
+*                                                                             *
+* This software is intended for use with the AD9889A and derivative parts only*
+*																		                                          *
+******************************************************************************/
+
+/******************************************************************************
+*                                                                             *
+* THIS IS A READ-ONLY SOURCE FILE. DO NOT EDIT IT DIRECTLY.                   *
+* Author: Matthew McCarn (matthew.mccarn@analog.com)                          *
+* Date: May 16, 2006                                                          *
+*                                                                             *
+******************************************************************************/
+//#include <stdio.h>
+//#include <stdlib.h>
+//#include <stddef.h>
+//#include <string.h>
+#include "edid_parse.h"
+#include "ad9889_macros.h"
+
+struct MyEdidInfo		cMyEdidInfo;
+struct MyVendorProductId	cMyVendorProductId;
+struct MyEdidVerRev		cMyEdidVerRev;
+struct MyBasicDispParams	cMyBasicDispParams;
+struct MyColorCharacteristics	cMyColorCharacteristics;
+struct MyEstablishedTiming	cMyEstablishedTiming;
+struct MyMonitorDescriptorBlock	cMyMonitorDescriptorBlock;
+
+struct MySpadPayload		cMySpadPayload;
+struct MyCeaDataBlock		cMyCeaDataBlock;
+struct MyCeaTimingExtension	cMyCeaTimingExtension;
+
+DEPLINT segment_number[128];
+
+DEPLINT st_count = 0;
+DEPLINT dtd_count = 0;
+DEPLINT sad_count = 0;
+DEPLINT svd_count = 0;
+
+
+void *chkmalloc(size_t);
+VendorProductId init_vendor_product_id(VendorProductId vpi);
+EdidVerRev init_edid_ver_rev(EdidVerRev evr);
+BasicDispParams init_basic_disp_params(BasicDispParams bdp);
+ColorCharacteristics init_color_characteristics(ColorCharacteristics cc);
+EstablishedTiming init_established_timing(EstablishedTiming et);
+StandardTimingList init_standard_timing_list(StandardTimingList st);
+DetailedTimingBlockList init_detailed_timing_block_list(DetailedTimingBlockList dtb);
+MonitorDescriptorBlock init_monitor_descriptor_block(MonitorDescriptorBlock mdb);
+SVDescriptorList init_sv_descriptor_list(SVDescriptorList svd);
+SADescriptorList init_sa_descriptor_list(SADescriptorList sad);
+SpadPayload init_spad_payload(SpadPayload sp);
+CeaDataBlock init_cea_data_block(CeaDataBlock cea);
+CeaTimingExtension init_cea_timing_extension(CeaTimingExtension cea);
+EdidInfo init_edid_info(EdidInfo edid);
+//This function adds a dtb to the end (->next = NULL) of the list.  This is because
+//1st DTB = preferred timing and first instance of a timing is preferred aspect ratio.
+void add_dtb(struct MyDetailedTimingBlockList dtb,EdidInfo e);
+void delete_dtbs(EdidInfo e);
+//this function creates an empty sad at the beginning (pointer) of the list
+void add_sad(struct MySADescriptorList sad,EdidInfo e);
+void delete_sads(EdidInfo e);
+//this funciton creates an empty svd at the beginning (pointer) of the list
+void add_svd(struct MySVDescriptorList svd,EdidInfo e);
+void delete_svds(EdidInfo e);
+//This function creates an empty st at the beginning (pointer) of the list
+void add_st(struct MyStandardTimingList st,EdidInfo e);
+void delete_sts(EdidInfo e);
+void clear_edid(EdidInfo e);
+DEPLINT get_bits(BYTE in,DEPLINT high_bit,DEPLINT low_bit);
+float color_calc(DEPLINT in);
+
+void parse_0_block(EdidInfo e,BYTE *d);
+void parse_cea_block(EdidInfo e, BYTE *d, DEPLINT block_number);
+void parse_block_map(BYTE *d, DEPLINT block_number);
+struct MyDetailedTimingBlockList parse_dtb(DEPLINT i, BYTE *d);
+
+DEPLINT segment_number_counter;
+
+
+void parse_block_map(BYTE *d, DEPLINT block_number)
+{
+	DEPLINT array_size=0;
+	DEPLINT i;
+
+	segment_number_counter = 0;
+	for (i = block_number + 1; i < (block_number+0x80); i += 2)
+	{
+		if ((d[i]==0x02)||(d[i+1]==0x02))
+			array_size++;
+	}
+	for (i = block_number + 1; i < (block_number+0x80); i += 2)
+	{
+		if ((d[i]==0x02)||(d[i+1]==0x02))
+		{
+			segment_number[segment_number_counter] = (((i - block_number) + 1)/2);
+			segment_number_counter++;
+		}
+	}
+	segment_number[segment_number_counter] = 0;
+
+	if (segment_number_counter != (array_size))
+		ERROR_MESSAGE("Error: Problem parsing block map");
+
+	segment_number_counter = 0;
+}
+
+struct MyDetailedTimingBlockList parse_dtb(DEPLINT i, BYTE *d)
+{
+	struct MyDetailedTimingBlockList tmp;
+
+	tmp.pix_clk = ((int)d[i]|(int)(d[i+1]<<8))*10000;
+	tmp.h_active = d[i+2]|(get_bits(d[i+4],7,4)<<8);
+	tmp.h_blank = d[i+3]|(get_bits(d[i+4],3,0)<<8);
+	tmp.v_active = d[i+5]|(get_bits(d[i+7],7,4)<<8);
+	tmp.v_blank = d[i+6]|(get_bits(d[i+7],3,0)<<8);
+	tmp.hsync_offset = d[i+8]|(get_bits(d[i+11],7,6)<<8);
+	tmp.hsync_pw = d[i+9]|(get_bits(d[i+11],5,4)<<8);
+	tmp.vsync_offset = get_bits(d[i+10],8,4)|(get_bits(d[i+11],3,2)<<8);
+	tmp.vsync_pw = get_bits(d[i+10],3,0)|(get_bits(d[i+11],0,1)<<8);
+	tmp.h_image_size = d[i+12]|(get_bits(d[i+14],7,4)<<8);
+	tmp.v_image_size = d[i+13]|(get_bits(d[i+14],3,0)<<8);
+	tmp.h_border = d[i+15];
+	tmp.v_border = d[i+16];
+	tmp.ilace = get_bits(d[i+17],7,7);
+	tmp.stereo = get_bits(d[i+17],6,5);
+	tmp.comp_sep = get_bits(d[i+17],4,3);
+	tmp.serr_v_pol = get_bits(d[i+17],2,2);
+	tmp.sync_comp_h_pol = get_bits(d[i+17],1,1);
+	tmp.v_act_blank = 0;
+	tmp.h_act_blank = 0;
+	//need this??
+	tmp.preferred_timing = 0;
+
+	return tmp;
+}
+
+void clear_edid(EdidInfo e)
+{
+	delete_dtbs(e);//&(e->dtb));
+	delete_sads(e);//&(e->cea->cea->sad));
+	delete_svds(e);//&(e->cea->cea->svd));
+	delete_sts(e);//&(e->st));
+	init_edid_info(e);
+	segment_number_counter = 0;
+}
+
+/*
+ * This function should locate every segment of EDID with understandable blocks and return
+ * the next segment number, or zero if finished.
+ */
+DEPLINT parse_edid(EdidInfo e,BYTE *d)
+{
+	DEPLINT i;
+
+	if (!((d[0] == 0)||(d[0] == 2)||(d[0] == 0xF0)||(d[0x80] == 0)||(d[0x80] == 2)||(d[0x80] == 0xF0)))
+	{
+		ERROR_MESSAGE("Error: Trying to parse edid segment with no valid blocks");
+
+		// to keep from returning a strange value
+		segment_number[0] = 0;
+		segment_number_counter = 0;
+	}
+
+	if ((d[0]==0) && (d[1]==0xFF))
+	{
+		parse_0_block(e,d);
+		if (e->edid_extensions <= 1)
+			segment_number[0] = 0;
+		segment_number_counter = 0;
+	}
+
+	if (d[0x00]==0xF0)
+	{
+		parse_block_map(d,0x00);
+	}
+
+	if (d[0x80]==0xF0)
+	{
+		parse_block_map(d,0x80);
+	}
+
+	for (i = 0; i < 2; i++)
+	{
+		if ((d[i*0x80])==0x2)
+		{
+			DEBUG_MESSAGE("cea extension block found\n");
+			parse_cea_block(e,d,i*0x80);
+		}
+	}
+
+	if ((segment_number[segment_number_counter]==0)&&(e->edid_extensions>127))
+		return 0x40;
+	else
+		segment_number_counter++;
+
+        return segment_number[segment_number_counter-1];
+}
+
+void parse_cea_block(EdidInfo e, BYTE *d,DEPLINT block_number)
+{
+        struct MySADescriptorList sad;
+	DEPLINT i;
+
+	i = block_number;
+
+	/*
+	 * Checksum calculation for CEA extension
+	 */
+	{
+		DEPLINT j;
+		BYTE sum = 0;
+		for(j = i; j < (i + 128); j++)
+			sum += d[j];
+		if(sum)
+		{
+			ERROR_MESSAGE("Check sum does not match, EDID information corrupted\n");
+			e->cea->checksum = FALSE;
+		}
+		else
+		{
+			DEBUG_MESSAGE("checksum ok\n");
+			e->cea->checksum = TRUE;
+		}
+	}
+	e->cea->cea_rev = d[i+1];
+	e->cea->underscan = get_bits(d[i+3],7,7);
+	e->cea->audio = get_bits(d[i+3],6,6);
+	e->cea->YCC444 = get_bits(d[i+3],5,5);
+	e->cea->YCC422 = get_bits(d[i+3],4,4);
+	e->cea->native_formats = get_bits(d[i+3],3,0);
+	//iterrate through data block
+	{
+		DEPLINT j = i + 4;
+		while(j < i+d[i+2])
+		{
+			DEPLINT tag = get_bits(d[j],7,5);
+			if(tag==1)
+			{
+				DEBUG_MESSAGE("Short Audio Descriptor\n");
+
+				sad.aud_format = get_bits(d[j+1],6,3);
+				sad.max_num_chan = get_bits(d[j+1],2,0)+1;
+				sad.khz_192 = get_bits(d[j+2],6,6);
+				sad.khz_176 = get_bits(d[j+2],5,5);
+				sad.khz_96 = get_bits(d[j+2],4,4);
+				sad.khz_88 = get_bits(d[j+2],3,3);
+				sad.khz_48 = get_bits(d[j+2],2,2);
+				sad.khz_44 = get_bits(d[j+2],1,1);
+				sad.khz_32 = get_bits(d[j+2],0,0);
+				sad.sample_rates = get_bits(d[j+2],6,0);
+
+				if(sad.aud_format == 1)
+				{
+					sad.unc_24bit = get_bits(d[j+3],2,2);
+					sad.unc_20bit = get_bits(d[j+3],1,1);
+					sad.unc_16bit = get_bits(d[j+3],0,0);
+					sad.sample_sizes = get_bits(d[j+3],2,0);
+				}
+				else
+				{
+					sad.comp_maxbitrate = d[j+3]*8;
+				}
+				add_sad(sad,e);
+			}
+			else if(tag==2)
+			{
+				struct MySVDescriptorList svd;
+				DEPLINT k;// = j+1;
+				DEBUG_MESSAGE("Short Video Descriptor\n");
+				for(k = j +1;k<=(j+get_bits(d[j],4,0));k++)
+				{
+
+					svd.vid_id = get_bits(d[k],6,0);
+					svd.native = get_bits(d[k],7,7);
+					add_svd(svd,e);
+				}
+			}
+			else if(tag==3)
+			{
+				DEBUG_MESSAGE("Vendor Specific Data Block\n");
+				//lsb
+				e->cea->cea->ieee_reg[1] = (WORD)((d[j+1])|(d[j+2]<<8));
+				//msb
+				e->cea->cea->ieee_reg[0] = (WORD)(d[j+3]);
+				e->cea->cea->hdmi_addr_a = get_bits(d[j+4],7,4);
+				e->cea->cea->hdmi_addr_b = get_bits(d[j+4],3,0);
+				e->cea->cea->hdmi_addr_c = get_bits(d[j+5],7,4);
+				e->cea->cea->hdmi_addr_d = get_bits(d[j+5],3,0);
+				if(get_bits(d[j],4,0)>=6)
+				{
+					DEPLINT k = 1;
+					e->cea->cea->supports_ai = get_bits(d[j+6],1,1);
+					e->cea->cea->vsdb_ext[0] = get_bits(d[j+6],6,0);
+					while((k<(get_bits(d[j],4,0)-5))&&(k<24))
+						e->cea->cea->vsdb_ext[k++] = d[j+6+k];
+				}
+				if((e->cea->cea->ieee_reg[1] == 0x0C03) || (e->cea->cea->ieee_reg[0] == 0x00))
+					e->cea->cea->vsdb_hdmi=TRUE;
+			}
+			else if(tag==4)
+			{
+				DEBUG_MESSAGE("Speaker Allocation Block\n");
+				e->cea->cea->spad->rlc_rrc = get_bits(d[j+1],6,6);
+				e->cea->cea->spad->flc_frc =get_bits(d[j+1],5,5);
+				e->cea->cea->spad->rc =get_bits(d[j+1],4,4);
+				e->cea->cea->spad->rl_rr =get_bits(d[j+1],3,3);
+				e->cea->cea->spad->fc =get_bits(d[j+1],2,2);
+				e->cea->cea->spad->lfe =get_bits(d[j+1],1,1);
+				e->cea->cea->spad->fl_fr =get_bits(d[j+1],0,0);
+				//e->cea->cea->spad->
+			}
+			else if((tag==0)||(tag==5)||(tag==6)||(tag==7))
+				DEBUG_MESSAGE("Reserved\n");
+			else
+				ERROR_MESSAGE("invalid tag in cea data block\n");
+
+			j+= (get_bits(d[j],4,0)+1);
+		}
+	}
+	//iterrate through Detailed Timing Descriptors
+	{
+		DEPLINT j = d[i+2] + i;
+		//look for 18 bit detailed timing descriptors until 0xFF - 18
+		while((d[j]!=0x0) && (j<=0xED))
+		{
+			add_dtb(parse_dtb(j,d),e);
+			j+=18;
+		}
+	}
+}
+
+void parse_0_block(EdidInfo e,BYTE *d)
+{
+	DEPLINT first_dtb = 0x36;
+	DEPLINT last_dtb = 0x6C;
+	DEPLINT i;
+	DEPLINT j;
+	BYTE header[8] = {0x00, 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x00};
+
+	if (memcmp(header,d,8))
+		e->edid_header=FALSE;
+	else
+		e->edid_header=TRUE;
+
+	e->edid_extensions = d[0x7E];
+
+/*
+ *Checksum calculation for block 0
+ */
+	{
+		DEPLINT i;
+		BYTE sum = 0;
+		for(i = 0; i < 128; i++)
+			sum += d[i];
+		if(sum)
+		{
+			ERROR_MESSAGE("Check sum does not match, EDID information corrupted\n");
+			e->edid_checksum = FALSE;
+		}
+		else
+		{
+			DEBUG_MESSAGE("checksum ok\n");
+			e->edid_checksum = TRUE;
+		}
+	}
+/*
+ *Manufacturer name is 3 5-bit ascii characters packed into 16-bit, big endian format
+ */
+
+	e->vpi->manuf[0] = (char)(get_bits(d[0x8],6,2)+'A'-1);
+	e->vpi->manuf[1] = (char)(((get_bits(d[0x8],1,0)<<3)|get_bits(d[9],7,5))+('A'-1));
+	e->vpi->manuf[2] = (char)(get_bits(d[0x9],4,0)+'A'-1);
+	e->vpi->manuf[3] = '\0';
+/*
+ *product code is little endian 16-bit
+ */
+	e->vpi->prodcode[0] = d[0xA];
+	e->vpi->prodcode[1] = d[0xB];
+
+/*
+ *optional product serial is little endian 32-bit 0x010101 = UNUSED
+ */
+	//lsb
+	e->vpi->serial[1] = (WORD)d[0xC]|(WORD)(d[0xD]<<8);
+	//msb
+	e->vpi->serial[0] = (WORD)d[0xE]|(WORD)(d[0xF]<<8);
+
+
+	e->vpi->week = (int)d[0x10];
+	e->vpi->year = 1990 + (int)d[0x11];
+
+	e->evr->ver = d[0x12];
+	e->evr->rev = d[0x13];
+
+/*
+ *Basic display parameter byte bits[6:0] are
+ *defined differently for analog and digital
+ */
+	e->bdp->anadig = get_bits(d[0x14],7,7);
+	if(e->bdp->anadig)
+	{
+		e->bdp->dfp1x = get_bits(d[0x14],0,0);
+
+
+	}
+	else
+	{
+		e->bdp->siglev = get_bits(d[0x14],6,5);
+		e->bdp->setup = get_bits(d[0x14],4,4);
+		e->bdp->sepsyn = get_bits(d[0x14],3,3);
+		e->bdp->compsync = get_bits(d[0x14],2,2);
+		e->bdp->sog = get_bits(d[0x14],1,1);
+		e->bdp->vsync_ser = get_bits(d[0x14],0,0);
+	}
+
+	e->bdp->maxh = d[0x15];
+	e->bdp->maxv = d[0x16];
+	e->bdp->dtc_gam = d[0x17];
+	e->bdp->standby = get_bits(d[0x18],7,7);
+	e->bdp->suspend = get_bits(d[0x18],6,6);
+	e->bdp->aovlp  = get_bits(d[0x18],5,5);
+	e->bdp->disptype = get_bits(d[0x18],4,3);
+	e->bdp->def_col_sp = get_bits(d[0x18],2,2);
+	e->bdp->pt_mode = get_bits(d[0x18],1,1);
+	e->bdp->def_gtf = get_bits(d[0x18],0,0);
+
+/*
+ *colorimetry bits are converted into binary fractions
+ */
+
+
+	e->cc->rx = get_bits(d[0x19],7,6)|(d[0x1B]<<2);
+	e->cc->ry = get_bits(d[0x19],5,4)|(d[0x1C]<<2);
+	e->cc->gx = get_bits(d[0x19],3,2)|(d[0x1D]<<2);
+	e->cc->gy = get_bits(d[0x19],1,0)|(d[0x1E]<<2);
+	e->cc->bx = get_bits(d[0x19],7,6)|(d[0x1F]<<2);
+	e->cc->by = get_bits(d[0x19],5,4)|(d[0x20]<<2);
+	e->cc->wx = get_bits(d[0x19],3,2)|(d[0x21]<<2);
+	e->cc->wy = get_bits(d[0x19],1,0)|(d[0x22]<<2);
+
+	e->et->m720_400_70 = get_bits(d[0x23],7,7);
+	e->et->m720_400_88 = get_bits(d[0x23],6,6);
+	e->et->m640_480_60 = get_bits(d[0x23],5,5);
+	e->et->m640_480_67 = get_bits(d[0x23],4,4);
+	e->et->m640_480_72 = get_bits(d[0x23],3,3);
+	e->et->m640_480_75 = get_bits(d[0x23],2,2);
+	e->et->m800_600_56 = get_bits(d[0x23],1,1);
+	e->et->m800_600_60 = get_bits(d[0x23],0,0);
+//   Established Timing II
+	e->et->m800_600_72  = get_bits(d[0x24],7,7);
+	e->et->m800_600_75  = get_bits(d[0x24],6,6);
+	e->et->m832_624_75  = get_bits(d[0x24],5,5);
+	e->et->m1024_768_87 = get_bits(d[0x24],4,4);
+	e->et->m1024_768_60 = get_bits(d[0x24],3,3);
+	e->et->m1024_768_70 = get_bits(d[0x24],2,2);
+	e->et->m1024_768_75 = get_bits(d[0x24],1,1);
+	e->et->m1280_1024_75= get_bits(d[0x24],0,0);
+//   Manufacturer's Timings
+	e->et->m1152_870_75 = get_bits(d[0x25],7,7);
+//   Reserved
+	e->et->res_7 = get_bits(d[0x25],6,6);
+	e->et->res_6 = get_bits(d[0x25],5,5);
+	e->et->res_5 = get_bits(d[0x25],4,4);
+	e->et->res_4 = get_bits(d[0x25],3,3);
+	e->et->res_3 = get_bits(d[0x25],2,2);
+	e->et->res_2 = get_bits(d[0x25],1,1);
+	e->et->res_1 = get_bits(d[0x25],0,0);
+
+	for(j=0x26;j<=0x34;j+=2)
+	{
+		struct MyStandardTimingList st;
+		st.hap   = d[j] * 8 + 248;
+		st.imasp = get_bits(d[j+1],7,6);
+		st.ref   = get_bits(d[j+1],5,0) + 60;
+		add_st(st,e);
+	}
+
+	for(i=first_dtb;i<=last_dtb;i+=0x12)
+	{
+/*
+ *Monitor Descriptor
+ */
+		if((d[i]==0x0)&&(d[i+1]==0x0))
+		{
+/*
+ *Monitor S/N
+ */
+			if(d[i+3]==0xFF)
+			{
+				DEPLINT j;
+				DEBUG_MESSAGE("Monitor S/N\n");
+				for(j=0;j<13;j++)
+				{
+					e->mdb->mon_snum[j] = d[i + 5 + j];
+					if(d[i + 5 + j] == 0xA)
+						e->mdb->mon_name[j] = '\0';
+				}
+			}
+
+/*
+ *ASCII Data String
+ */
+			if(d[i+3]==0xFE)
+			{
+				DEPLINT j;
+				DEBUG_MESSAGE("ASCII String\n");
+				for(j=0;j<13;j++)
+				{
+					e->mdb->ascii_data[j] = d[i + 5 + j];
+					if(d[i + 5 + j] == 0xA)
+						e->mdb->mon_name[j] = '\0';
+				}
+			}
+
+/*
+ *Monitor Range Limits
+ */
+			if(d[i+3]==0xFD)
+			{
+				DEBUG_MESSAGE("Range Limits\n");
+				e->mdb->mrl_min_vrate = d[i+5];
+				e->mdb->mrl_max_vrate = d[i+6];
+				e->mdb->mrl_min_hrate=d[i+7];
+				e->mdb->mrl_max_hrate=d[i+8];
+				e->mdb->mrl_max_pix_clk = d[i+9]*10;
+
+				if(d[i+10]==0x2)
+				{
+					e->mdb->mrl_gtf_support = TRUE;
+					e->mdb->mrl_gtf_start_freq = d[i+12]*2000;
+					e->mdb->mrl_gtf_c = d[i+13]/2;
+					e->mdb->mrl_gtf_m = d[i+14]|(d[1+15]<<8);
+					e->mdb->mrl_gtf_k =d[i+16];
+					e->mdb->mrl_gtf_j = d[i+17]/2;
+				}
+				else
+					e->mdb->mrl_gtf_support=FALSE;
+
+
+			}
+
+/*
+ *Monitor Name
+ */
+			if(d[i+3]==0xFC)
+			{
+				DEPLINT j;
+				DEBUG_MESSAGE("Monitor Name\n");
+				for(j=0;j<13;j++)
+				{
+					e->mdb->mon_name[j] = d[i + 5 + j];
+					if(d[i + 5 + j] == 0xA)
+						e->mdb->mon_name[j] = '\0';
+				}
+			}
+/*
+ *Additional Color PoDEPLINT Data
+ */
+			if(d[i+3]==0xFB)
+			{
+				DEBUG_MESSAGE("Additional Color PoDEPLINT Data\n");
+				e->mdb->cp_wpoint_index1 = d[i+5];
+				e->mdb->cp_w_lb1 = d[i+6];
+				e->mdb->cp_w_x1 = d[i+7];
+				e->mdb->cp_w_y1 = d[i+8];
+				e->mdb->cp_w_gam1 = d[i+9];
+				if(d[i+10]!=0x00)
+				{
+					e->mdb->cp_wpoint_index2 = d[i+10];
+					e->mdb->cp_w_lb2 = d[i+11];
+					e->mdb->cp_w_x2 = d[i+12];
+					e->mdb->cp_w_y2 = d[i+13];
+					e->mdb->cp_w_gam2 = d[i+14];
+				}
+			}
+/*
+ *Additional Standard Timing Definitions
+ */
+			if(d[i+3]==0xFA)
+			{
+				DEPLINT j;
+				DEBUG_MESSAGE("Additional Standard Timing Definitions\n");
+				for(j=5;j<18;j+=2)
+				{
+					struct MyStandardTimingList st;
+					st.hap   = (d[i + j]/28)-31;
+					st.imasp = get_bits(d[i + j+1],7,6);
+					st.ref   = get_bits(d[i + j+1],5,0) + 60;
+				  add_st(st,e);
+        }
+
+			}
+
+/*
+ *Dummy Descriptor
+ */
+			if(d[i+3]==0x10)
+			{
+				DEBUG_MESSAGE("Dummy Descriptor\n");
+			}
+
+/*
+ *Manufacturer Defined descriptor
+ *Only supports one for now.  To more e->mbd->ms_byte can be converted into a linked list of ms[]
+ */
+			if(d[i+3]<=0x0F)
+			{
+				DEPLINT j;
+				DEBUG_MESSAGE("Manufacturer Defined Descriptor\n");
+				for(j=0;j<13;j++)
+				{
+					e->mdb->ms_byte[j] = d[i + 5 + j];
+				}
+			}
+
+		}
+		else
+		{
+			DEBUG_MESSAGE("DTB\n");
+
+/*
+ *Flag 1st DTB as preferred timing
+ */
+
+			add_dtb(parse_dtb(i,d),e);
+
+		}
+	}
+}
+
+
+VendorProductId init_vendor_product_id(VendorProductId vpi)
+{
+	vpi = &cMyVendorProductId;
+	vpi->manuf[0] = 0;
+	vpi->manuf[1] = 0;
+	vpi->manuf[2] = 0;
+	vpi->manuf[3] = '\0';
+	vpi->prodcode[0] = 0;
+	vpi->prodcode[1] = 0;
+	vpi->prodcode[2] = '\0';
+	vpi->serial[0] = 0;
+	vpi->serial[1] = 0;
+	vpi->week = 0;
+	vpi->year = 0;
+	return vpi;
+}
+
+EdidVerRev init_edid_ver_rev(EdidVerRev evr)
+{
+	evr = &cMyEdidVerRev;
+	evr->ver = 0;
+	evr->rev = 0;
+	return evr;
+}
+
+BasicDispParams init_basic_disp_params(BasicDispParams bdp)
+{
+	bdp = &cMyBasicDispParams;
+	bdp->anadig = FALSE;
+	bdp->siglev = 0;
+	bdp->setup = FALSE;
+	bdp->sepsyn = FALSE;
+	bdp->compsync = FALSE;
+	bdp->sog = FALSE;
+	bdp->vsync_ser = FALSE;
+	bdp->dfp1x = FALSE;
+	bdp->maxh = 0;
+	bdp->maxv = 0;
+	bdp->dtc_gam = 0;
+	bdp->standby = FALSE;
+	bdp->suspend = FALSE;
+	bdp->aovlp  = FALSE;
+	bdp->disptype = 0;
+	bdp->def_col_sp = FALSE;
+	bdp->pt_mode = FALSE;
+	bdp->def_gtf = FALSE;
+	return bdp;
+}
+
+ColorCharacteristics init_color_characteristics(ColorCharacteristics cc)
+{
+	cc = &cMyColorCharacteristics;
+	cc->rx = 0;
+	cc->ry = 0;
+	cc->gx = 0;
+	cc->gy = 0;
+	cc->bx = 0;
+	cc->by = 0;
+	cc->wx = 0;
+	cc->wy = 0;
+	return cc;
+}
+
+EstablishedTiming init_established_timing(EstablishedTiming et)
+{
+	et = &cMyEstablishedTiming;
+	// Established Timing I
+	et->m720_400_70 = FALSE;
+	et->m720_400_88 = FALSE;
+	et->m640_480_60 = FALSE;
+	et->m640_480_67 = FALSE;
+	et->m640_480_72 = FALSE;
+	et->m640_480_75 = FALSE;
+	et->m800_600_56 = FALSE;
+	et->m800_600_60 = FALSE;
+	// Established Timing II
+	et->m800_600_72 = FALSE;
+	et->m800_600_75 = FALSE;
+	et->m832_624_75 = FALSE;
+	et->m1024_768_87 = FALSE;
+	et->m1024_768_60 = FALSE;
+	et->m1024_768_70 = FALSE;
+	et->m1024_768_75 = FALSE;
+	et->m1280_1024_75 = FALSE;
+	// Manufacturer's Timings
+	et->m1152_870_75 = FALSE;
+	// Reserved
+	et->res_7 = FALSE;
+	et->res_6 = FALSE;
+	et->res_5 = FALSE;
+	et->res_4 = FALSE;
+	et->res_3 = FALSE;
+	et->res_2 = FALSE;
+	et->res_1 = FALSE;
+	return et;
+}
+
+MonitorDescriptorBlock init_monitor_descriptor_block(MonitorDescriptorBlock mdb)
+{
+	DEPLINT i;
+
+	mdb = &cMyMonitorDescriptorBlock;
+	for(i=0;i<13;i++)
+	{
+		mdb->mon_snum[i] = 0;
+		mdb->ascii_data[i] = 0;
+		mdb->mon_name[i] = 0;
+	}
+	mdb->mon_snum[13] = '\0';
+	mdb->ascii_data[13] = '\0';
+	mdb->mon_name[13] = '\0';
+	mdb->mrl_min_vrate = 0;
+	mdb->mrl_max_vrate = 0;
+	mdb->mrl_min_hrate = 0;
+	mdb->mrl_max_hrate = 0;
+	mdb->mrl_max_pix_clk = 0;
+	mdb->mrl_gtf_support = 0;
+	mdb->mrl_bad_stf = FALSE;
+	mdb->mrl_reserved_11 = 0;
+	mdb->mrl_gtf_start_freq = 0;
+	mdb->mrl_gtf_c = 0;
+	mdb->mrl_gtf_m = 0;
+	mdb->mrl_gtf_k = 0;
+	mdb->mrl_gtf_j = 0;
+	mdb->cp_wpoint_index1 = 0;
+	mdb->cp_w_lb1 = 0;
+	mdb->cp_w_x1 = 0;
+	mdb->cp_w_y1 = 0;
+	mdb->cp_w_gam1 = 0;
+	mdb->cp_wpoint_index2 = 0;
+	mdb->cp_w_lb2 = 0;
+	mdb->cp_w_x2 = 0;
+	mdb->cp_w_y2 = 0;
+	mdb->cp_w_gam2 = 0;
+	mdb->cp_bad_set = FALSE;
+	mdb->cp_pad1 = 0;
+	mdb->cp_pad2 = 0;
+	mdb->cp_pad3 = 0;
+	mdb->st9_hap = 0;
+	mdb->st9_imasp = 0;
+	mdb->st9_ref = 0;
+	mdb->st10_hap = 0;
+	mdb->st10_imasp = 0;
+	mdb->st10_ref = 0;
+	mdb->st11_hap = 0;
+	mdb->st11_imasp = 0;
+	mdb->st11_ref = 0;
+	mdb->st12_hap = 0;
+	mdb->st12_imasp = 0;
+	mdb->st12_ref = 0;
+	mdb->st13_hap = 0;
+	mdb->st13_imasp = 0;
+	mdb->st13_ref = 0;
+	mdb->st14_hap = 0;
+	mdb->st14_imasp = 0;
+	mdb->st14_ref = 0;
+	mdb->st_set = FALSE;
+	for(i=0;i<13;i++)
+	{
+		mdb->ms_byte[i] = 0;
+	}
+	return mdb;
+}
+
+SpadPayload init_spad_payload(SpadPayload sp)
+{
+	sp = &cMySpadPayload;
+	sp->rlc_rrc = FALSE;
+	sp->flc_frc = FALSE;
+	sp->rc = FALSE;
+	sp->rl_rr = FALSE;
+	sp->fc = FALSE;
+	sp->lfe = FALSE;
+	sp->fl_fr = FALSE;
+	return sp;
+}
+
+CeaDataBlock init_cea_data_block(CeaDataBlock cea)
+{
+	cea = &cMyCeaDataBlock;
+	cea->spad = NULL;
+	cea->spad = init_spad_payload(cea->spad);
+	cea->ieee_reg[0] = 0;
+	cea->ieee_reg[1] = 0;
+	cea->vsdb_hdmi = FALSE;
+	cea->vsdb_payload = NULL;
+	cea->hdmi_addr_a = 0;
+	cea->hdmi_addr_b = 0;
+	cea->hdmi_addr_c = 0;
+	cea->hdmi_addr_d = 0;
+	{
+		DEPLINT i;
+		for(i = 0;i<26;i++);
+			cea->vsdb_ext[i] = 0;
+	}
+	cea->supports_ai = FALSE;
+	return cea;
+}
+
+CeaTimingExtension init_cea_timing_extension(CeaTimingExtension cea)
+{
+	cea = &cMyCeaTimingExtension;
+	cea->cea = NULL;
+	cea->cea_rev = 0;
+	cea->underscan = FALSE;
+	cea->audio = FALSE;
+	cea->YCC444 = FALSE;
+	cea->YCC422 = FALSE;
+	cea->native_formats = 0;
+	cea->cea = init_cea_data_block(cea->cea);
+	cea->checksum = 0;
+	return cea;
+}
+
+EdidInfo init_edid_info(EdidInfo edid)
+{
+	edid = &cMyEdidInfo;
+	edid->vpi = NULL;
+	edid->evr = NULL;
+	edid->bdp = NULL;
+	edid->cc = NULL;
+	edid->et = NULL;
+	edid->mdb = NULL;
+	edid->cea = NULL;
+	//}
+	edid->edid_header = FALSE;
+	edid->edid_extensions = 0;
+	edid->edid_checksum = 0;
+	edid->ext_block_count = 0;
+	edid->vpi = init_vendor_product_id(edid->vpi);
+	edid->evr = init_edid_ver_rev(edid->evr);
+	edid->bdp = init_basic_disp_params(edid->bdp);
+	edid->cc = init_color_characteristics(edid->cc);
+	edid->et = init_established_timing(edid->et);
+	//edid->st = NULL;
+	//edid->dtb = NULL;//init_detailed_timing_block_list();
+	edid->mdb = init_monitor_descriptor_block(edid->mdb);
+	edid->cea = init_cea_timing_extension(edid->cea);
+	return edid;
+}
+
+void add_st(struct MyStandardTimingList st,EdidInfo e)
+{
+	if((st_count)<ST_MAX)
+	{
+		e->st[st_count] = st;
+		st_count++;
+	}
+	else
+	{
+
+	}
+}
+
+void add_dtb(struct MyDetailedTimingBlockList dtb,EdidInfo e)
+{
+	if((dtd_count)<DTD_MAX)
+	{
+		e->dtb[dtd_count] = dtb;
+		dtd_count++;
+	}
+	else
+	{
+
+	}
+}
+
+void add_svd(struct MySVDescriptorList svd,EdidInfo e)
+{
+	if((svd_count)<SVD_MAX)
+	{
+		e->cea->cea->svd[svd_count] = svd;
+		svd_count++;
+	}
+	else
+	{
+
+	}
+}
+
+void add_sad(struct MySADescriptorList sad,EdidInfo e)
+{
+	if((sad_count)<SAD_MAX)
+	{
+		e->cea->cea->sad[sad_count] = sad;
+		sad_count++;
+	}
+	else
+	{
+
+	}
+}
+
+void delete_sts(EdidInfo e)
+{
+	DEPLINT i;
+
+	for(i = 0;i < ST_MAX;i++)
+	{
+		e->st[i].hap = 0;
+		e->st[i].imasp = 0;
+		e->st[i].ref = 0;
+	}
+}
+void delete_dtbs(EdidInfo e)
+{
+	DEPLINT i;
+
+	for(i = 0;i < DTD_MAX;i++)
+	{
+		e->dtb[i].preferred_timing = 0;
+		e->dtb[i].pix_clk = 0;
+		e->dtb[i].h_active = 0;
+		e->dtb[i].h_blank = 0;
+		e->dtb[i].h_act_blank = 0;
+		e->dtb[i].v_active = 0;
+		e->dtb[i].v_blank = 0;
+		e->dtb[i].v_act_blank = 0;
+		e->dtb[i].hsync_offset = 0;
+		e->dtb[i].hsync_pw = 0;
+		e->dtb[i].vsync_offset = 0;
+		e->dtb[i].vsync_pw = 0;
+		e->dtb[i].h_image_size = 0;
+		e->dtb[i].v_image_size = 0;
+		e->dtb[i].h_border = 0;
+		e->dtb[i].v_border = 0;
+		e->dtb[i].ilace = 0;
+		e->dtb[i].stereo = 0;
+		e->dtb[i].comp_sep = 0;
+		e->dtb[i].serr_v_pol = 0;
+		e->dtb[i].sync_comp_h_pol = 0;
+	}
+}
+
+void delete_svds(EdidInfo e)
+{
+	DEPLINT i;
+
+	for(i = 0;i < SVD_MAX;i++)
+	{
+		e->cea->cea->svd[i].native = 0;
+		e->cea->cea->svd[i].vid_id = 0;
+	}
+}
+
+void delete_sads(EdidInfo e)
+{
+	DEPLINT i;
+
+	for(i = 0;i < SAD_MAX;i++)
+	{
+		e->cea->cea->sad[i].aud_format = 0;
+		e->cea->cea->sad[i].max_num_chan = 0;
+		e->cea->cea->sad[i].rsvd1 = 0;
+		e->cea->cea->sad[i].rsvd2 = 0;
+		e->cea->cea->sad[i].khz_192 = 0;
+		e->cea->cea->sad[i].khz_176 = 0;
+		e->cea->cea->sad[i].khz_96 = 0;
+		e->cea->cea->sad[i].khz_88 = 0;
+		e->cea->cea->sad[i].khz_48 = 0;
+		e->cea->cea->sad[i].khz_44 = 0;
+		e->cea->cea->sad[i].khz_32 = 0;
+		e->cea->cea->sad[i].unc_rsrvd = 0;
+		e->cea->cea->sad[i].unc_24bit = 0;
+		e->cea->cea->sad[i].unc_20bit = 0;
+		e->cea->cea->sad[i].unc_16bit = 0;
+		e->cea->cea->sad[i].comp_maxbitrate = 0;
+		e->cea->cea->sad[i].sample_sizes = 0;
+		e->cea->cea->sad[i].sample_rates = 0;
+	}
+}
+
+DEPLINT get_bits(BYTE in, DEPLINT high_bit,DEPLINT low_bit)
+{
+
+	DEPLINT i;
+	BYTE mask = 0;
+
+	for(i = 0; i <= (high_bit-low_bit);i++)
+		mask += (1<<i);
+	mask <<= low_bit;
+	in &= mask;
+
+	return (int)(in >>= low_bit);
+}
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/adi9889/AD9889_interrupt_handler.h
+++ linux-mvl-dove-2.6.32/drivers/video/display/adi9889/AD9889_interrupt_handler.h
@@ -0,0 +1,46 @@
+/******************************************************************************
+*                                                                             *
+* License Agreement                                                           *
+*                                                                             *
+* Copyright (c) 2006 Analog Devices Inc.                                      *
+* All rights reserved.                                                        *
+*                                                                             *
+* This source code is intended for the recipient only under the guidelines of *
+* the non-disclosure agreement with Analog Devices Inc.                       *
+*                                                                             *
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR  *
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,    *
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE *
+* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER      *
+* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING     *
+* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER         *
+* DEALINGS IN THE SOFTWARE.                                                   *
+*                                                                             *
+*                                                                             *
+* This software is intended for use with the AD9889A and derivative parts only*
+*                                                                             *
+******************************************************************************/
+
+/******************************************************************************
+*                                                                             *
+* THIS IS A READ-ONLY SOURCE FILE. DO NOT EDIT IT DIRECTLY.                   *
+* Author: Matthew McCarn (matthew.mccarn@analog.com)                          *
+* Date: May 16, 2006                                                          *
+*                                                                             *
+******************************************************************************/
+#ifndef _INTERRUPT_HANDLER_H_
+#define _INTERRUPT_HANDLER_H_
+
+#define HPD_INT 	0x1
+#define HDCP_INT 	0x2
+#define EDID_INT 	0x4
+#define CTL_ERR_INT 	0x8
+#define INT_ERROR 	0x10
+
+typedef enum MyEvent Event;
+
+DEPLINT ad9889_interrupt_handler(void (* setup_audio_video)(void));
+
+void timer_2_second_handler(void);
+
+#endif
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/adi9889/AD9889A_i2c_handler.h
+++ linux-mvl-dove-2.6.32/drivers/video/display/adi9889/AD9889A_i2c_handler.h
@@ -0,0 +1,638 @@
+#include "ad9889_macros.h"
+
+#define ADI89_GET_CHIP_REVISION			adi_get_i2c_reg(AD9889_ADDRESS,0x0, 0xff, 0)
+#define ADI89_GET_N_HIGH_BYTE			adi_get_i2c_reg(AD9889_ADDRESS,0x1, 0xf, 0)
+#define ADI89_SET_N_HIGH_BYTE(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x1, 0xf, 0, val)
+#define ADI89_GET_N_MID_BYTE			adi_get_i2c_reg(AD9889_ADDRESS,0x2, 0xff, 0)
+#define ADI89_SET_N_MID_BYTE(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x2, 0xff, 0, val)
+#define ADI89_GET_N_LOW_BYTE			adi_get_i2c_reg(AD9889_ADDRESS,0x3, 0xff, 0)
+#define ADI89_SET_N_LOW_BYTE(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x3, 0xff, 0, val)
+#define ADI89_GET_SPDIF_SF			adi_get_i2c_reg(AD9889_ADDRESS,0x4, 0xf0, 4)
+#define ADI89_GET_INT_CTS_HIGH_BYTE		adi_get_i2c_reg(AD9889_ADDRESS,0x4, 0xf, 0)
+#define ADI89_GET_INT_CTS_MID_BYTE		adi_get_i2c_reg(AD9889_ADDRESS,0x5, 0xff, 0)
+#define ADI89_GET_INT_CTS_LOW_BYTE		adi_get_i2c_reg(AD9889_ADDRESS,0x6, 0xff, 0)
+#define ADI89_GET_EXT_CTS_HIGH_BYTE		adi_get_i2c_reg(AD9889_ADDRESS,0x7, 0xf, 0)
+#define ADI89_SET_EXT_CTS_HIGH_BYTE(val)	adi_set_i2c_reg(AD9889_ADDRESS,0x7, 0xf, 0, val)
+#define ADI89_GET_EXT_CTS_MID_BYTE		adi_get_i2c_reg(AD9889_ADDRESS,0x8, 0xff, 0)
+#define ADI89_SET_EXT_CTS_MID_BYTE(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x8, 0xff, 0, val)
+#define ADI89_GET_EXT_CTS_LOW_BYTE		adi_get_i2c_reg(AD9889_ADDRESS,0x9, 0xff, 0)
+#define ADI89_SET_EXT_CTS_LOW_BYTE(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x9, 0xff, 0, val)
+#define ADI89_GET_CTS_SEL			adi_get_i2c_reg(AD9889_ADDRESS,0xa, 0x80, 7)
+#define ADI89_SET_CTS_SEL(val)			adi_set_i2c_reg(AD9889_ADDRESS,0xa, 0x80, 7, val)
+#define ADI89_GET_AVE_MODE			adi_get_i2c_reg(AD9889_ADDRESS,0xa, 0x60, 5)
+#define ADI89_SET_AVE_MODE(val)			adi_set_i2c_reg(AD9889_ADDRESS,0xa, 0x60, 5, val)
+#define ADI89_GET_AUDIO_SEL			adi_get_i2c_reg(AD9889_ADDRESS,0xa, 0x10, 4)
+#define ADI89_SET_AUDIO_SEL(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xa, 0x10, 4, val)
+#define ADI89_GET_MCLK_ON_SPDIF			adi_get_i2c_reg(AD9889_ADDRESS,0xa, 0x8, 3)
+#define ADI89_SET_MCLK_ON_SPDIF(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xa, 0x8, 3, val)
+#define ADI89_GET_MCLK_ON_I2S			adi_get_i2c_reg(AD9889_ADDRESS,0xa, 0x4, 2)
+#define ADI89_SET_MCLK_ON_I2S(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xa, 0x4, 2, val)
+#define ADI89_GET_MCLK_RATIO			adi_get_i2c_reg(AD9889_ADDRESS,0xa, 0x3, 0)
+#define ADI89_SET_MCLK_RATIO(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xa, 0x3, 0, val)
+#define ADI89_GET_MCLK_POL			adi_get_i2c_reg(AD9889_ADDRESS,0xb, 0x40, 6)
+#define ADI89_SET_MCLK_POL(val)			adi_set_i2c_reg(AD9889_ADDRESS,0xb, 0x40, 6, val)
+#define ADI89_GET_FLAT_LINE			adi_get_i2c_reg(AD9889_ADDRESS,0xb, 0x20, 5)
+#define ADI89_SET_FLAT_LINE(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xb, 0x20, 5, val)
+#define ADI89_GET_DELTA				adi_get_i2c_reg(AD9889_ADDRESS,0xb, 0x18, 3)
+#define ADI89_SET_DELTA(val)			adi_set_i2c_reg(AD9889_ADDRESS,0xb, 0x18, 3, val)
+#define ADI89_GET_P_RANGE			adi_get_i2c_reg(AD9889_ADDRESS,0xb, 0x6, 1)
+#define ADI89_SET_P_RANGE(val)			adi_set_i2c_reg(AD9889_ADDRESS,0xb, 0x6, 1, val)
+#define ADI89_GET_I2S3_ENABLE			adi_get_i2c_reg(AD9889_ADDRESS,0xc, 0x20, 5)
+#define ADI89_SET_I2S3_ENABLE(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xc, 0x20, 5, val)
+#define ADI89_GET_I2S2_ENABLE			adi_get_i2c_reg(AD9889_ADDRESS,0xc, 0x10, 4)
+#define ADI89_SET_I2S2_ENABLE(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xc, 0x10, 4, val)
+#define ADI89_GET_I2S1_ENABLE			adi_get_i2c_reg(AD9889_ADDRESS,0xc, 0x8, 3)
+#define ADI89_SET_I2S1_ENABLE(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xc, 0x8, 3, val)
+#define ADI89_GET_I2S0_ENABLE			adi_get_i2c_reg(AD9889_ADDRESS,0xc, 0x4, 2)
+#define ADI89_SET_I2S0_ENABLE(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xc, 0x4, 2, val)
+#define ADI89_GET_I2S_FORMAT			adi_get_i2c_reg(AD9889_ADDRESS,0xc, 0x3, 0)
+#define ADI89_SET_I2S_FORMAT(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xc, 0x3, 0, val)
+#define ADI89_GET_I2S_BIT_WIDTH			adi_get_i2c_reg(AD9889_ADDRESS,0xd, 0x1f, 0)
+#define ADI89_SET_I2S_BIT_WIDTH(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xd, 0x1f, 0, val)
+#define ADI89_GET_SUBPKT0_L_SRC			adi_get_i2c_reg(AD9889_ADDRESS,0xe, 0x38, 3)
+#define ADI89_SET_SUBPKT0_L_SRC(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xe, 0x38, 3, val)
+#define ADI89_GET_SUBPKT0_R_SRC			adi_get_i2c_reg(AD9889_ADDRESS,0xe, 0x7, 0)
+#define ADI89_SET_SUBPKT0_R_SRC(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xe, 0x7, 0, val)
+#define ADI89_GET_SUBPKT1_L_SRC			adi_get_i2c_reg(AD9889_ADDRESS,0xf, 0x38, 3)
+#define ADI89_SET_SUBPKT1_L_SRC(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xf, 0x38, 3, val)
+#define ADI89_GET_SUBPKT1_R_SRC			adi_get_i2c_reg(AD9889_ADDRESS,0xf, 0x7, 0)
+#define ADI89_SET_SUBPKT1_R_SRC(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xf, 0x7, 0, val)
+#define ADI89_GET_SUBPKT2_L_SRC			adi_get_i2c_reg(AD9889_ADDRESS,0x10, 0x38, 3)
+#define ADI89_SET_SUBPKT2_L_SRC(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x10, 0x38, 3, val)
+#define ADI89_GET_SUBPKT2_R_SRC			adi_get_i2c_reg(AD9889_ADDRESS,0x10, 0x7, 0)
+#define ADI89_SET_SUBPKT2_R_SRC(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x10, 0x7, 0, val)
+#define ADI89_GET_SUBPKT3_L_SRC			adi_get_i2c_reg(AD9889_ADDRESS,0x11, 0x38, 3)
+#define ADI89_SET_SUBPKT3_L_SRC(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x11, 0x38, 3, val)
+#define ADI89_GET_SUBPKT3_R_SRC			adi_get_i2c_reg(AD9889_ADDRESS,0x11, 0x7, 0)
+#define ADI89_SET_SUBPKT3_R_SRC(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x11, 0x7, 0, val)
+#define ADI89_GET_CR_BIT			adi_get_i2c_reg(AD9889_ADDRESS,0x12, 0x20, 5)
+#define ADI89_SET_CR_BIT(val)			adi_set_i2c_reg(AD9889_ADDRESS,0x12, 0x20, 5, val)
+#define ADI89_GET_A_INFO			adi_get_i2c_reg(AD9889_ADDRESS,0x12, 0x1c, 2)
+#define ADI89_SET_A_INFO(val)			adi_set_i2c_reg(AD9889_ADDRESS,0x12, 0x1c, 2, val)
+#define ADI89_GET_CLK_ACC			adi_get_i2c_reg(AD9889_ADDRESS,0x12, 0x3, 0)
+#define ADI89_SET_CLK_ACC(val)			adi_set_i2c_reg(AD9889_ADDRESS,0x12, 0x3, 0, val)
+#define ADI89_GET_CATEGORY_CODE			adi_get_i2c_reg(AD9889_ADDRESS,0x13, 0xff, 0)
+#define ADI89_SET_CATEGORY_CODE(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x13, 0xff, 0, val)
+#define ADI89_GET_SOURCE_NUMBER			adi_get_i2c_reg(AD9889_ADDRESS,0x14, 0xf0, 4)
+#define ADI89_SET_SOURCE_NUMBER(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x14, 0xf0, 4, val)
+#define ADI89_GET_WORD_LENGTH			adi_get_i2c_reg(AD9889_ADDRESS,0x14, 0xf, 0)
+#define ADI89_SET_WORD_LENGTH(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x14, 0xf, 0, val)
+#define ADI89_GET_I2S_SF			adi_get_i2c_reg(AD9889_ADDRESS,0x15, 0xf0, 4)
+#define ADI89_SET_I2S_SF(val)			adi_set_i2c_reg(AD9889_ADDRESS,0x15, 0xf0, 4, val)
+#define ADI89_GET_VFE_INPUT_ID			adi_get_i2c_reg(AD9889_ADDRESS,0x15, 0xe, 1)
+#define ADI89_SET_VFE_INPUT_ID(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x15, 0xe, 1, val)
+#define ADI89_GET_LOW_FRQ_VIDEO			adi_get_i2c_reg(AD9889_ADDRESS,0x15, 0x1, 0)
+#define ADI89_SET_LOW_FRQ_VIDEO(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x15, 0x1, 0, val)
+#define ADI89_GET_VFE_OUT_FMT			adi_get_i2c_reg(AD9889_ADDRESS,0x16, 0xc0, 6)
+#define ADI89_SET_VFE_OUT_FMT(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x16, 0xc0, 6, val)
+#define ADI89_GET_VFE_422_WIDTH			adi_get_i2c_reg(AD9889_ADDRESS,0x16, 0x30, 4)
+#define ADI89_SET_VFE_422_WIDTH(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x16, 0x30, 4, val)
+#define ADI89_GET_VFE_INPUT_STYLE		adi_get_i2c_reg(AD9889_ADDRESS,0x16, 0xc, 2)
+#define ADI89_SET_VFE_INPUT_STYLE(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x16, 0xc, 2, val)
+#define ADI89_GET_VFE_INPUT_EDGE		adi_get_i2c_reg(AD9889_ADDRESS,0x16, 0x2, 1)
+#define ADI89_SET_VFE_INPUT_EDGE(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x16, 0x2, 1, val)
+#define ADI89_GET_VFE_INPUT_CS			adi_get_i2c_reg(AD9889_ADDRESS,0x16, 0x1, 0)
+#define ADI89_SET_VFE_INPUT_CS(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x16, 0x1, 0, val)
+#define ADI89_GET_ITU_ERROR_CORRECT_EN		adi_get_i2c_reg(AD9889_ADDRESS,0x17, 0x80, 7)
+#define ADI89_SET_ITU_ERROR_CORRECT_EN(val)	adi_set_i2c_reg(AD9889_ADDRESS,0x17, 0x80, 7, val)
+#define ADI89_GET_ITU_VSYNC_POL			adi_get_i2c_reg(AD9889_ADDRESS,0x17, 0x40, 6)
+#define ADI89_SET_ITU_VSYNC_POL(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x17, 0x40, 6, val)
+#define ADI89_GET_ITU_HYSNC_POL			adi_get_i2c_reg(AD9889_ADDRESS,0x17, 0x20, 5)
+#define ADI89_SET_ITU_HYSNC_POL(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x17, 0x20, 5, val)
+#define ADI89_GET_CSC_MODE			adi_get_i2c_reg(AD9889_ADDRESS,0x17, 0x18, 3)
+#define ADI89_SET_CSC_MODE(val)			adi_set_i2c_reg(AD9889_ADDRESS,0x17, 0x18, 3, val)
+#define ADI89_GET_GEN_444_EN			adi_get_i2c_reg(AD9889_ADDRESS,0x17, 0x4, 2)
+#define ADI89_SET_GEN_444_EN(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x17, 0x4, 2, val)
+#define ADI89_GET_ASP_RATIO			adi_get_i2c_reg(AD9889_ADDRESS,0x17, 0x2, 1)
+#define ADI89_SET_ASP_RATIO(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x17, 0x2, 1, val)
+#define ADI89_GET_DEGEN_EN			adi_get_i2c_reg(AD9889_ADDRESS,0x17, 0x1, 0)
+#define ADI89_SET_DEGEN_EN(val)			adi_set_i2c_reg(AD9889_ADDRESS,0x17, 0x1, 0, val)
+#define ADI89_GET_CSC_COEFF_A1			adi_get_i2c_reg_mult(AD9889_ADDRESS, 0x18, 0x1f, 0xff, 0, 2)
+#define ADI89_SET_CSC_COEFF_A1(val)		adi_set_i2c_reg_mult(AD9889_ADDRESS, 0x18, 0x1f, 0xff, 0, 2, val)
+#define ADI89_GET_CSC_COEFF_A2			adi_get_i2c_reg_mult(AD9889_ADDRESS, 0x1a, 0x1f, 0xff, 0, 2)
+#define ADI89_SET_CSC_COEFF_A2(val)		adi_set_i2c_reg_mult(AD9889_ADDRESS, 0x1a, 0x1f, 0xff, 0, 2, val)
+#define ADI89_GET_CSC_COEFF_A3			adi_get_i2c_reg_mult(AD9889_ADDRESS, 0x1c, 0x1f, 0xff, 0, 2)
+#define ADI89_SET_CSC_COEFF_A3(val)		adi_set_i2c_reg_mult(AD9889_ADDRESS, 0x1c, 0x1f, 0xff, 0, 2, val)
+#define ADI89_GET_CSC_COEFF_A4			adi_get_i2c_reg_mult(AD9889_ADDRESS, 0x1e, 0x1f, 0xff, 0, 2)
+#define ADI89_SET_CSC_COEFF_A4(val)		adi_set_i2c_reg_mult(AD9889_ADDRESS, 0x1e, 0x1f, 0xff, 0, 2, val)
+#define ADI89_GET_CSC_COEFF_B1			adi_get_i2c_reg_mult(AD9889_ADDRESS, 0x20, 0x1f, 0xff, 0, 2)
+#define ADI89_SET_CSC_COEFF_B1(val)		adi_set_i2c_reg_mult(AD9889_ADDRESS, 0x20, 0x1f, 0xff, 0, 2, val)
+#define ADI89_GET_CSC_COEFF_B2			adi_get_i2c_reg_mult(AD9889_ADDRESS, 0x22, 0x1f, 0xff, 0, 2)
+#define ADI89_SET_CSC_COEFF_B2(val)		adi_set_i2c_reg_mult(AD9889_ADDRESS, 0x22, 0x1f, 0xff, 0, 2, val)
+#define ADI89_GET_CSC_COEFF_B3			adi_get_i2c_reg_mult(AD9889_ADDRESS, 0x24, 0x1f, 0xff, 0, 2)
+#define ADI89_SET_CSC_COEFF_B3(val)		adi_set_i2c_reg_mult(AD9889_ADDRESS, 0x24, 0x1f, 0xff, 0, 2, val)
+#define ADI89_GET_CSC_COEFF_B4			adi_get_i2c_reg_mult(AD9889_ADDRESS, 0x26, 0x1f, 0xff, 0, 2)
+#define ADI89_SET_CSC_COEFF_B4(val)		adi_set_i2c_reg_mult(AD9889_ADDRESS, 0x26, 0x1f, 0xff, 0, 2, val)
+#define ADI89_GET_CSC_COEFF_C1			adi_get_i2c_reg_mult(AD9889_ADDRESS, 0x28, 0x1f, 0xff, 0, 2)
+#define ADI89_SET_CSC_COEFF_C1(val)		adi_set_i2c_reg_mult(AD9889_ADDRESS, 0x28, 0x1f, 0xff, 0, 2, val)
+#define ADI89_GET_CSC_COEFF_C2			adi_get_i2c_reg_mult(AD9889_ADDRESS, 0x2a, 0x1f, 0xff, 0, 2)
+#define ADI89_SET_CSC_COEFF_C2(val)		adi_set_i2c_reg_mult(AD9889_ADDRESS, 0x2a, 0x1f, 0xff, 0, 2, val)
+#define ADI89_GET_CSC_COEFF_C3			adi_get_i2c_reg_mult(AD9889_ADDRESS, 0x2c, 0x1f, 0xff, 0, 2)
+#define ADI89_SET_CSC_COEFF_C3(val)		adi_set_i2c_reg_mult(AD9889_ADDRESS, 0x2c, 0x1f, 0xff, 0, 2, val)
+#define ADI89_GET_CSC_COEFF_C4			adi_get_i2c_reg_mult(AD9889_ADDRESS, 0x2e, 0x1f, 0xff, 0, 2)
+#define ADI89_SET_CSC_COEFF_C4(val)		adi_set_i2c_reg_mult(AD9889_ADDRESS, 0x2e, 0x1f, 0xff, 0, 2, val)
+#define ADI89_GET_VFE_HS_PLA			adi_get_i2c_reg_mult(AD9889_ADDRESS, 0x30, 0xff, 0xc0, 6, 2)
+#define ADI89_SET_VFE_HS_PLA(val)		adi_set_i2c_reg_mult(AD9889_ADDRESS, 0x30, 0xff, 0xc0, 6, 2, val)
+#define ADI89_GET_VFE_HS_DUR			adi_get_i2c_reg_mult(AD9889_ADDRESS, 0x30, 0x3f, 0xf0, 4, 2)
+#define ADI89_SET_VFE_HS_DUR(val)		adi_set_i2c_reg_mult(AD9889_ADDRESS, 0x30, 0x3f, 0xf0, 4, 2, val)
+#define ADI89_GET_VFE_VS_PLA			adi_get_i2c_reg_mult(AD9889_ADDRESS, 0x30, 0xf, 0xfc, 2, 2)
+#define ADI89_SET_VFE_VS_PLA(val)		adi_set_i2c_reg_mult(AD9889_ADDRESS, 0x30, 0xf, 0xfc, 2, 2, val)
+#define ADI89_GET_VFE_VS_DUR			adi_get_i2c_reg_mult(AD9889_ADDRESS, 0x30, 0x3, 0xff, 0, 2)
+#define ADI89_SET_VFE_VS_DUR(val)		adi_set_i2c_reg_mult(AD9889_ADDRESS, 0x30, 0x3, 0xff, 0, 2, val)
+#define ADI89_GET_VFE_HSYNCDELAYIN		adi_get_i2c_reg_mult(AD9889_ADDRESS, 0x35, 0xff, 0xc0, 6, 2)
+#define ADI89_SET_VFE_HSYNCDELAYIN(val)		adi_set_i2c_reg_mult(AD9889_ADDRESS, 0x35, 0xff, 0xc0, 6, 2, val)
+#define ADI89_GET_VFE_VSYNCDELAYIN		adi_get_i2c_reg(AD9889_ADDRESS,0x35, 0x3f, 0)
+#define ADI89_SET_VFE_VSYNCDELAYIN(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x35, 0x3f, 0, val)
+#define ADI89_GET_VFE_OFFSET			adi_get_i2c_reg(AD9889_ADDRESS,0x37, 0xe0, 5)
+#define ADI89_SET_VFE_OFFSET(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x37, 0xe0, 5, val)
+#define ADI89_GET_VFE_WIDTH			adi_get_i2c_reg_mult(AD9889_ADDRESS, 0x37, 0x1f, 0xfe, 1, 2)
+#define ADI89_SET_VFE_WIDTH(val)		adi_set_i2c_reg_mult(AD9889_ADDRESS, 0x37, 0x1f, 0xfe, 1, 2, val)
+#define ADI89_GET_VFE_HEIGHT			adi_get_i2c_reg_mult(AD9889_ADDRESS, 0x39, 0xff, 0xf0, 4, 2)
+#define ADI89_SET_VFE_HEIGHT(val)		adi_set_i2c_reg_mult(AD9889_ADDRESS, 0x39, 0xff, 0xf0, 4, 2, val)
+#define ADI89_GET_EXT_AUDIOSF_SEL		adi_get_i2c_reg(AD9889_ADDRESS,0x3b, 0x80, 7)
+#define ADI89_SET_EXT_AUDIOSF_SEL(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x3b, 0x80, 7, val)
+#define ADI89_GET_PR_MODE			adi_get_i2c_reg(AD9889_ADDRESS,0x3b, 0x60, 5)
+#define ADI89_SET_PR_MODE(val)			adi_set_i2c_reg(AD9889_ADDRESS,0x3b, 0x60, 5, val)
+#define ADI89_GET_EXT_PLL_PR			adi_get_i2c_reg(AD9889_ADDRESS,0x3b, 0x18, 3)
+#define ADI89_SET_EXT_PLL_PR(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x3b, 0x18, 3, val)
+#define ADI89_GET_EXT_TARGET_PR			adi_get_i2c_reg(AD9889_ADDRESS,0x3b, 0x6, 1)
+#define ADI89_SET_EXT_TARGET_PR(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x3b, 0x6, 1, val)
+#define ADI89_GET_CSC_ENABLE			adi_get_i2c_reg(AD9889_ADDRESS,0x3b, 0x1, 0)
+#define ADI89_SET_CSC_ENABLE(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x3b, 0x1, 0, val)
+#define ADI89_GET_EXT_VID_TO_RX			adi_get_i2c_reg(AD9889_ADDRESS,0x3c, 0x3f, 0)
+#define ADI89_SET_EXT_VID_TO_RX(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x3c, 0x3f, 0, val)
+#define ADI89_GET_PR_TO_RX			adi_get_i2c_reg(AD9889_ADDRESS,0x3d, 0xc0, 6)
+#define ADI89_GET_VID_TO_RX			adi_get_i2c_reg(AD9889_ADDRESS,0x3d, 0x3f, 0)
+#define ADI89_GET_VFE_FMT_VID			adi_get_i2c_reg(AD9889_ADDRESS,0x3e, 0xfc, 2)
+#define ADI89_GET_VFE_AUX_VID			adi_get_i2c_reg(AD9889_ADDRESS,0x3f, 0xe0, 5)
+#define ADI89_GET_VFE_PROG_MODE			adi_get_i2c_reg(AD9889_ADDRESS,0x3f, 0x18, 3)
+#define ADI89_GET_GC_PKT_EN			adi_get_i2c_reg(AD9889_ADDRESS,0x40, 0x80, 7)
+#define ADI89_SET_GC_PKT_EN(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x40, 0x80, 7, val)
+#define ADI89_GET_SPD_PKT_EN adi		get_i2c_reg(AD9889_ADDRESS,0x40, 0x40, 6)
+#define ADI89_SET_SPD_PKT_EN(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x40, 0x40, 6, val)
+#define ADI89_GET_MPEG_PKT_EN			adi_get_i2c_reg(AD9889_ADDRESS,0x40, 0x20, 5)
+#define ADI89_SET_MPEG_PKT_EN(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x40, 0x20, 5, val)
+#define ADI89_GET_ACP_PKT_EN			adi_get_i2c_reg(AD9889_ADDRESS,0x40, 0x10, 4)
+#define ADI89_SET_ACP_PKT_EN(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x40, 0x10, 4, val)
+#define ADI89_GET_ISRC_PKT_EN			adi_get_i2c_reg(AD9889_ADDRESS,0x40, 0x8, 3)
+#define ADI89_SET_ISRC_PKT_EN(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x40, 0x8, 3, val)
+#define ADI89_GET_POWER_DOWN			adi_get_i2c_reg(AD9889_ADDRESS,0x41, 0x40, 6)
+#define ADI89_SET_POWER_DOWN(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x41, 0x40, 6, val)
+#define ADI89_GET_LOGIC_RESET			adi_get_i2c_reg(AD9889_ADDRESS,0x41, 0x20, 5)
+#define ADI89_SET_LOGIC_RESET(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x41, 0x20, 5, val)
+#define ADI89_GET_INTR_POL			adi_get_i2c_reg(AD9889_ADDRESS,0x41, 0x10, 4)
+#define ADI89_SET_INTR_POL(val)			adi_set_i2c_reg(AD9889_ADDRESS,0x41, 0x10, 4, val)
+#define ADI89_GET_INITIATE_SCAN			adi_get_i2c_reg(AD9889_ADDRESS,0x41, 0x8, 3)
+#define ADI89_SET_INITIATE_SCAN(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x41, 0x8, 3, val)
+#define ADI89_GET_AUDIOFIFO_TESTEN		adi_get_i2c_reg(AD9889_ADDRESS,0x41, 0x4, 2)
+#define ADI89_SET_AUDIOFIFO_TESTEN(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x41, 0x4, 2, val)
+#define ADI89_GET_SYNC_GEN_EN			adi_get_i2c_reg(AD9889_ADDRESS,0x41, 0x2, 1)
+#define ADI89_SET_SYNC_GEN_EN(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x41, 0x2, 1, val)
+#define ADI89_GET_MAIN_OPEN_1			adi_get_i2c_reg(AD9889_ADDRESS,0x41, 0x1, 0)
+#define ADI89_SET_MAIN_OPEN_1(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x41, 0x1, 0, val)
+#define ADI89_GET_PD_POL			adi_get_i2c_reg(AD9889_ADDRESS,0x42, 0x80, 7)
+#define ADI89_GET_HPD_STATE			adi_get_i2c_reg(AD9889_ADDRESS,0x42, 0x40, 6)
+#define ADI89_GET_MSEN_STATE 			adi_get_i2c_reg(AD9889_ADDRESS,0x42, 0x20, 5)
+#define ADI89_GET_AUDIOFIFO_TESTERROR		adi_get_i2c_reg(AD9889_ADDRESS,0x42, 0x10, 4)
+#define ADI89_GET_EDID_ID			adi_get_i2c_reg(AD9889_ADDRESS,0x43, 0xff, 0)
+#define ADI89_SET_EDID_ID(val)			adi_set_i2c_reg(AD9889_ADDRESS,0x43, 0xff, 0, val)
+#define ADI89_GET_SPDIF_EN			adi_get_i2c_reg(AD9889_ADDRESS,0x44, 0x80, 7)
+#define ADI89_SET_SPDIF_EN(val)			adi_set_i2c_reg(AD9889_ADDRESS,0x44, 0x80, 7, val)
+#define ADI89_GET_N_CTS_PKT_EN			adi_get_i2c_reg(AD9889_ADDRESS,0x44, 0x40, 6)
+#define ADI89_SET_N_CTS_PKT_EN(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x44, 0x40, 6, val)
+#define ADI89_GET_AUDIO_SAMPLE_PKT_EN		adi_get_i2c_reg(AD9889_ADDRESS,0x44, 0x20, 5)
+#define ADI89_SET_AUDIO_SAMPLE_PKT_EN(val)	adi_set_i2c_reg(AD9889_ADDRESS,0x44, 0x20, 5, val)
+#define ADI89_GET_AVIIF_PKT_EN			adi_get_i2c_reg(AD9889_ADDRESS,0x44, 0x10, 4)
+#define ADI89_SET_AVIIF_PKT_EN(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x44, 0x10, 4, val)
+#define ADI89_GET_AUDIOIF_PKT_EN		adi_get_i2c_reg(AD9889_ADDRESS,0x44, 0x8, 3)
+#define ADI89_SET_AUDIOIF_PKT_EN(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x44, 0x8, 3, val)
+#define ADI89_GET_IO_RING_FILT_OFF		adi_get_i2c_reg(AD9889_ADDRESS,0x44, 0x4, 2)
+#define ADI89_SET_IO_RING_FILT_OFF(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x44, 0x4, 2, val)
+#define ADI89_GET_MAIN_OPEN_2			adi_get_i2c_reg(AD9889_ADDRESS,0x44, 0x3, 0)
+#define ADI89_SET_MAIN_OPEN_2(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x44, 0x3, 0, val)
+#define ADI89_GET_CLEAR_AVMUTE			adi_get_i2c_reg(AD9889_ADDRESS,0x45, 0x80, 7)
+#define ADI89_SET_CLEAR_AVMUTE(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x45, 0x80, 7, val)
+#define ADI89_GET_SET_AVMUTE			adi_get_i2c_reg(AD9889_ADDRESS,0x45, 0x40, 6)
+#define ADI89_SET_SET_AVMUTE(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x45, 0x40, 6, val)
+#define ADI89_GET_Y1Y0				adi_get_i2c_reg(AD9889_ADDRESS,0x45, 0x30, 4)
+#define ADI89_SET_Y1Y0(val)			adi_set_i2c_reg(AD9889_ADDRESS,0x45, 0x30, 4, val)
+#define ADI89_GET_A0				adi_get_i2c_reg(AD9889_ADDRESS,0x45, 0x8, 3)
+#define ADI89_SET_A0(val)			adi_set_i2c_reg(AD9889_ADDRESS,0x45, 0x8, 3, val)
+#define ADI89_GET_B1B0				adi_get_i2c_reg(AD9889_ADDRESS,0x45, 0x6, 1)
+#define ADI89_SET_B1B0(val)			adi_set_i2c_reg(AD9889_ADDRESS,0x45, 0x6, 1, val)
+#define ADI89_GET_S1S0				adi_get_i2c_reg(AD9889_ADDRESS,0x46, 0xc0, 6)
+#define ADI89_SET_S1S0(val)			adi_set_i2c_reg(AD9889_ADDRESS,0x46, 0xc0, 6, val)
+#define ADI89_GET_C1C0				adi_get_i2c_reg(AD9889_ADDRESS,0x46, 0x30, 4)
+#define ADI89_SET_C1C0(val)			adi_set_i2c_reg(AD9889_ADDRESS,0x46, 0x30, 4, val)
+#define ADI89_GET_M1M0				adi_get_i2c_reg(AD9889_ADDRESS,0x46, 0xc, 2)
+#define ADI89_SET_M1M0(val)			adi_set_i2c_reg(AD9889_ADDRESS,0x46, 0xc, 2, val)
+#define ADI89_GET_SC				adi_get_i2c_reg(AD9889_ADDRESS,0x46, 0x3, 0)
+#define ADI89_SET_SC(val)			adi_set_i2c_reg(AD9889_ADDRESS,0x46, 0x3, 0, val)
+#define ADI89_GET_R30				adi_get_i2c_reg(AD9889_ADDRESS,0x47, 0xf0, 4)
+#define ADI89_SET_R30(val)			adi_set_i2c_reg(AD9889_ADDRESS,0x47, 0xf0, 4, val)
+#define ADI89_SET_AVI_LINE_START(val)		adi_set_i2c_reg_mult(AD9889_ADDRESS, 0x48, 0xff, 0xff, 0, 2, val)
+#define ADI89_SET_AVI_LINE_END(val)		adi_set_i2c_reg_mult(AD9889_ADDRESS, 0x4A, 0xff, 0xff, 0, 2, val)
+#define ADI89_SET_AVI_PIXEL_START(val)		adi_set_i2c_reg_mult(AD9889_ADDRESS, 0x4C, 0xff, 0xff, 0, 2, val)
+#define ADI89_SET_AVI_PIXEL_END(val)		adi_set_i2c_reg_mult(AD9889_ADDRESS, 0x4E, 0xff, 0xff, 0, 2, val)
+#define ADI89_GET_AVI_BYTE6			adi_get_i2c_reg(AD9889_ADDRESS,0x48, 0xff, 0)
+#define ADI89_SET_AVI_BYTE6(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x48, 0xff, 0, val)
+#define ADI89_GET_AVI_BYTE7			adi_get_i2c_reg(AD9889_ADDRESS,0x49, 0xff, 0)
+#define ADI89_SET_AVI_BYTE7(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x49, 0xff, 0, val)
+#define ADI89_GET_AVI_BYTE8			adi_get_i2c_reg(AD9889_ADDRESS,0x4a, 0xff, 0)
+#define ADI89_SET_AVI_BYTE8(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x4a, 0xff, 0, val)
+#define ADI89_GET_AVI_BYTE9			adi_get_i2c_reg(AD9889_ADDRESS,0x4b, 0xff, 0)
+#define ADI89_SET_AVI_BYTE9(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x4b, 0xff, 0, val)
+#define ADI89_GET_AVI_BYTE10			adi_get_i2c_reg(AD9889_ADDRESS,0x4c, 0xff, 0)
+#define ADI89_SET_AVI_BYTE10(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x4c, 0xff, 0, val)
+#define ADI89_GET_AVI_BYTE11			adi_get_i2c_reg(AD9889_ADDRESS,0x4d, 0xff, 0)
+#define ADI89_SET_AVI_BYTE11(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x4d, 0xff, 0, val)
+#define ADI89_GET_AVI_BYTE12			adi_get_i2c_reg(AD9889_ADDRESS,0x4e, 0xff, 0)
+#define ADI89_SET_AVI_BYTE12(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x4e, 0xff, 0, val)
+#define ADI89_GET_AVI_BYTE13			adi_get_i2c_reg(AD9889_ADDRESS,0x4f, 0xff, 0)
+#define ADI89_SET_AVI_BYTE13(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x4f, 0xff, 0, val)
+#define ADI89_GET_AUDIO_IF_CC			adi_get_i2c_reg(AD9889_ADDRESS,0x50, 0xe0, 5)
+#define ADI89_SET_AUDIO_IF_CC(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x50, 0xe0, 5, val)
+#define ADI89_GET_AUDIO_IF_DM_INH		adi_get_i2c_reg(AD9889_ADDRESS,0x50, 0x10, 4)
+#define ADI89_SET_AUDIO_IF_DM_INH(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x50, 0x10, 4, val)
+#define ADI89_GET_AUDIO_IF_LSV			adi_get_i2c_reg(AD9889_ADDRESS,0x50, 0xf, 0)
+#define ADI89_SET_AUDIO_IF_LSV(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x50, 0xf, 0, val)
+#define ADI89_GET_SPEAKER_MAPPING		adi_get_i2c_reg(AD9889_ADDRESS,0x51, 0x1f, 0)
+#define ADI89_SET_SPEAKER_MAPPING(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x51, 0x1f, 0, val)
+#define ADI89_GET_SPD_BYTE1			adi_get_i2c_reg(AD9889_ADDRESS,0x52, 0xff, 0)
+#define ADI89_SET_SPD_BYTE1(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x52, 0xff, 0, val)
+#define ADI89_GET_SPD_BYTE2			adi_get_i2c_reg(AD9889_ADDRESS,0x53, 0xff, 0)
+#define ADI89_SET_SPD_BYTE2(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x53, 0xff, 0, val)
+#define ADI89_GET_SPD_BYTE3			adi_get_i2c_reg(AD9889_ADDRESS,0x54, 0xff, 0)
+#define ADI89_SET_SPD_BYTE3(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x54, 0xff, 0, val)
+#define ADI89_GET_SPD_BYTE4			adi_get_i2c_reg(AD9889_ADDRESS,0x55, 0xff, 0)
+#define ADI89_SET_SPD_BYTE4(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x55, 0xff, 0, val)
+#define ADI89_GET_SPD_BYTE5			adi_get_i2c_reg(AD9889_ADDRESS,0x56, 0xff, 0)
+#define ADI89_SET_SPD_BYTE5(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x56, 0xff, 0, val)
+#define ADI89_GET_SPD_BYTE6			adi_get_i2c_reg(AD9889_ADDRESS,0x57, 0xff, 0)
+#define ADI89_SET_SPD_BYTE6(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x57, 0xff, 0, val)
+#define ADI89_GET_SPD_BYTE7			adi_get_i2c_reg(AD9889_ADDRESS,0x58, 0xff, 0)
+#define ADI89_SET_SPD_BYTE7(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x58, 0xff, 0, val)
+#define ADI89_GET_SPD_BYTE8			adi_get_i2c_reg(AD9889_ADDRESS,0x59, 0xff, 0)
+#define ADI89_SET_SPD_BYTE8(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x59, 0xff, 0, val)
+#define ADI89_GET_SPD_BYTE9			adi_get_i2c_reg(AD9889_ADDRESS,0x5a, 0xff, 0)
+#define ADI89_SET_SPD_BYTE9(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x5a, 0xff, 0, val)
+#define ADI89_GET_SPD_BYTE10			adi_get_i2c_reg(AD9889_ADDRESS,0x5b, 0xff, 0)
+#define ADI89_SET_SPD_BYTE10(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x5b, 0xff, 0, val)
+#define ADI89_GET_SPD_BYTE11			adi_get_i2c_reg(AD9889_ADDRESS,0x5c, 0xff, 0)
+#define ADI89_SET_SPD_BYTE11(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x5c, 0xff, 0, val)
+#define ADI89_GET_SPD_BYTE12			adi_get_i2c_reg(AD9889_ADDRESS,0x5d, 0xff, 0)
+#define ADI89_SET_SPD_BYTE12(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x5d, 0xff, 0, val)
+#define ADI89_GET_SPD_BYTE13			adi_get_i2c_reg(AD9889_ADDRESS,0x5e, 0xff, 0)
+#define ADI89_SET_SPD_BYTE13(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x5e, 0xff, 0, val)
+#define ADI89_GET_SPD_BYTE14			adi_get_i2c_reg(AD9889_ADDRESS,0x5f, 0xff, 0)
+#define ADI89_SET_SPD_BYTE14(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x5f, 0xff, 0, val)
+#define ADI89_GET_SPD_BYTE15			adi_get_i2c_reg(AD9889_ADDRESS,0x60, 0xff, 0)
+#define ADI89_SET_SPD_BYTE15(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x60, 0xff, 0, val)
+#define ADI89_GET_SPD_BYTE16			adi_get_i2c_reg(AD9889_ADDRESS,0x61, 0xff, 0)
+#define ADI89_SET_SPD_BYTE16(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x61, 0xff, 0, val)
+#define ADI89_GET_SPD_BYTE17			adi_get_i2c_reg(AD9889_ADDRESS,0x62, 0xff, 0)
+#define ADI89_SET_SPD_BYTE17(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x62, 0xff, 0, val)
+#define ADI89_GET_SPD_BYTE18			adi_get_i2c_reg(AD9889_ADDRESS,0x63, 0xff, 0)
+#define ADI89_SET_SPD_BYTE18(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x63, 0xff, 0, val)
+#define ADI89_GET_SPD_BYTE19			adi_get_i2c_reg(AD9889_ADDRESS,0x64, 0xff, 0)
+#define ADI89_SET_SPD_BYTE19(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x64, 0xff, 0, val)
+#define ADI89_GET_SPD_BYTE20			adi_get_i2c_reg(AD9889_ADDRESS,0x65, 0xff, 0)
+#define ADI89_SET_SPD_BYTE20(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x65, 0xff, 0, val)
+#define ADI89_GET_SPD_BYTE21			adi_get_i2c_reg(AD9889_ADDRESS,0x66, 0xff, 0)
+#define ADI89_SET_SPD_BYTE21(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x66, 0xff, 0, val)
+#define ADI89_GET_SPD_BYTE22			adi_get_i2c_reg(AD9889_ADDRESS,0x67, 0xff, 0)
+#define ADI89_SET_SPD_BYTE22(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x67, 0xff, 0, val)
+#define ADI89_GET_SPD_BYTE23			adi_get_i2c_reg(AD9889_ADDRESS,0x68, 0xff, 0)
+#define ADI89_SET_SPD_BYTE23(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x68, 0xff, 0, val)
+#define ADI89_GET_SPD_BYTE24			adi_get_i2c_reg(AD9889_ADDRESS,0x69, 0xff, 0)
+#define ADI89_SET_SPD_BYTE24(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x69, 0xff, 0, val)
+#define ADI89_GET_SPD_BYTE25			adi_get_i2c_reg(AD9889_ADDRESS,0x6a, 0xff, 0)
+#define ADI89_SET_SPD_BYTE25(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x6a, 0xff, 0, val)
+#define ADI89_GET_MPEG_BYTE1			adi_get_i2c_reg(AD9889_ADDRESS,0x6b, 0xff, 0)
+#define ADI89_SET_MPEG_BYTE1(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x6b, 0xff, 0, val)
+#define ADI89_GET_MPEG_BYTE2			adi_get_i2c_reg(AD9889_ADDRESS,0x6c, 0xff, 0)
+#define ADI89_SET_MPEG_BYTE2(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x6c, 0xff, 0, val)
+#define ADI89_GET_MPEG_BYTE3			adi_get_i2c_reg(AD9889_ADDRESS,0x6d, 0xff, 0)
+#define ADI89_SET_MPEG_BYTE3(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x6d, 0xff, 0, val)
+#define ADI89_GET_MPEG_BYTE4			adi_get_i2c_reg(AD9889_ADDRESS,0x6e, 0xff, 0)
+#define ADI89_SET_MPEG_BYTE4(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x6e, 0xff, 0, val)
+#define ADI89_GET_MPEG_FR			adi_get_i2c_reg(AD9889_ADDRESS,0x6f, 0x80, 7)
+#define ADI89_SET_MPEG_FR(val)			adi_set_i2c_reg(AD9889_ADDRESS,0x6f, 0x80, 7, val)
+#define ADI89_GET_MPEG_MF			adi_get_i2c_reg(AD9889_ADDRESS,0x70, 0x60, 5)
+#define ADI89_SET_MPEG_MF(val)			adi_set_i2c_reg(AD9889_ADDRESS,0x70, 0x60, 5, val)
+#define ADI89_GET_ACP_TYPE			adi_get_i2c_reg(AD9889_ADDRESS,0x71, 0xff, 0)
+#define ADI89_SET_ACP_TYPE(val)			adi_set_i2c_reg(AD9889_ADDRESS,0x71, 0xff, 0, val)
+#define ADI89_GET_ACP_BYTE1			adi_get_i2c_reg(AD9889_ADDRESS,0x72, 0xff, 0)
+#define ADI89_SET_ACP_BYTE1(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x72, 0xff, 0, val)
+#define ADI89_GET_ISRC_CONT			adi_get_i2c_reg(AD9889_ADDRESS,0x73, 0x80, 7)
+#define ADI89_SET_ISRC_CONT(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x73, 0x80, 7, val)
+#define ADI89_GET_ISRC_VALID			adi_get_i2c_reg(AD9889_ADDRESS,0x73, 0x40, 6)
+#define ADI89_SET_ISRC_VALID(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x73, 0x40, 6, val)
+#define ADI89_GET_ISRC_STATUS			adi_get_i2c_reg(AD9889_ADDRESS,0x73, 0x38, 3)
+#define ADI89_SET_ISRC_STATUS(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x73, 0x38, 3, val)
+#define ADI89_GET_ISRC1_BYTE0			adi_get_i2c_reg(AD9889_ADDRESS,0x74, 0xff, 0)
+#define ADI89_SET_ISRC1_BYTE0(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x74, 0xff, 0, val)
+#define ADI89_GET_ISRC1_BYTE1			adi_get_i2c_reg(AD9889_ADDRESS,0x75, 0xff, 0)
+#define ADI89_SET_ISRC1_BYTE1(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x75, 0xff, 0, val)
+#define ADI89_GET_ISRC1_BYTE2			adi_get_i2c_reg(AD9889_ADDRESS,0x76, 0xff, 0)
+#define ADI89_SET_ISRC1_BYTE2(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x76, 0xff, 0, val)
+#define ADI89_GET_ISRC1_BYTE3			adi_get_i2c_reg(AD9889_ADDRESS,0x77, 0xff, 0)
+#define ADI89_SET_ISRC1_BYTE3(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x77, 0xff, 0, val)
+#define ADI89_GET_ISRC1_BYTE4			adi_get_i2c_reg(AD9889_ADDRESS,0x78, 0xff, 0)
+#define ADI89_SET_ISRC1_BYTE4(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x78, 0xff, 0, val)
+#define ADI89_GET_ISRC1_BYTE5			adi_get_i2c_reg(AD9889_ADDRESS,0x79, 0xff, 0)
+#define ADI89_SET_ISRC1_BYTE5(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x79, 0xff, 0, val)
+#define ADI89_GET_ISRC1_BYTE6			adi_get_i2c_reg(AD9889_ADDRESS,0x7a, 0xff, 0)
+#define ADI89_SET_ISRC1_BYTE6(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x7a, 0xff, 0, val)
+#define ADI89_GET_ISRC1_BYTE7			adi_get_i2c_reg(AD9889_ADDRESS,0x7b, 0xff, 0)
+#define ADI89_SET_ISRC1_BYTE7(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x7b, 0xff, 0, val)
+#define ADI89_GET_ISRC1_BYTE8			adi_get_i2c_reg(AD9889_ADDRESS,0x7c, 0xff, 0)
+#define ADI89_SET_ISRC1_BYTE8(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x7c, 0xff, 0, val)
+#define ADI89_GET_ISRC1_BYTE9			adi_get_i2c_reg(AD9889_ADDRESS,0x7d, 0xff, 0)
+#define ADI89_SET_ISRC1_BYTE9(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x7d, 0xff, 0, val)
+#define ADI89_GET_ISRC1_BYTE10			adi_get_i2c_reg(AD9889_ADDRESS,0x7e, 0xff, 0)
+#define ADI89_SET_ISRC1_BYTE10(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x7e, 0xff, 0, val)
+#define ADI89_GET_ISRC1_BYTE11			adi_get_i2c_reg(AD9889_ADDRESS,0x7f, 0xff, 0)
+#define ADI89_SET_ISRC1_BYTE11(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x7f, 0xff, 0, val)
+#define ADI89_GET_ISRC1_BYTE12			adi_get_i2c_reg(AD9889_ADDRESS,0x80, 0xff, 0)
+#define ADI89_SET_ISRC1_BYTE12(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x80, 0xff, 0, val)
+#define ADI89_GET_ISRC1_BYTE13			adi_get_i2c_reg(AD9889_ADDRESS,0x81, 0xff, 0)
+#define ADI89_SET_ISRC1_BYTE13(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x81, 0xff, 0, val)
+#define ADI89_GET_ISRC1_BYTE14			adi_get_i2c_reg(AD9889_ADDRESS,0x82, 0xff, 0)
+#define ADI89_SET_ISRC1_BYTE14(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x82, 0xff, 0, val)
+#define ADI89_GET_ISRC1_BYTE15			adi_get_i2c_reg(AD9889_ADDRESS,0x83, 0xff, 0)
+#define ADI89_SET_ISRC1_BYTE15(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x83, 0xff, 0, val)
+#define ADI89_GET_ISRC2_BYTE0			adi_get_i2c_reg(AD9889_ADDRESS,0x84, 0xff, 0)
+#define ADI89_SET_ISRC2_BYTE0(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x84, 0xff, 0, val)
+#define ADI89_GET_ISRC2_BYTE1			adi_get_i2c_reg(AD9889_ADDRESS,0x85, 0xff, 0)
+#define ADI89_SET_ISRC2_BYTE1(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x85, 0xff, 0, val)
+#define ADI89_GET_ISRC2_BYTE2			adi_get_i2c_reg(AD9889_ADDRESS,0x86, 0xff, 0)
+#define ADI89_SET_ISRC2_BYTE2(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x86, 0xff, 0, val)
+#define ADI89_GET_ISRC2_BYTE3			adi_get_i2c_reg(AD9889_ADDRESS,0x87, 0xff, 0)
+#define ADI89_SET_ISRC2_BYTE3(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x87, 0xff, 0, val)
+#define ADI89_GET_ISRC2_BYTE4			adi_get_i2c_reg(AD9889_ADDRESS,0x88, 0xff, 0)
+#define ADI89_SET_ISRC2_BYTE4(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x88, 0xff, 0, val)
+#define ADI89_GET_ISRC2_BYTE5			adi_get_i2c_reg(AD9889_ADDRESS,0x89, 0xff, 0)
+#define ADI89_SET_ISRC2_BYTE5(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x89, 0xff, 0, val)
+#define ADI89_GET_ISRC2_BYTE6			adi_get_i2c_reg(AD9889_ADDRESS,0x8a, 0xff, 0)
+#define ADI89_SET_ISRC2_BYTE6(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x8a, 0xff, 0, val)
+#define ADI89_GET_ISRC2_BYTE7			adi_get_i2c_reg(AD9889_ADDRESS,0x8b, 0xff, 0)
+#define ADI89_SET_ISRC2_BYTE7(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x8b, 0xff, 0, val)
+#define ADI89_GET_ISRC2_BYTE8			adi_get_i2c_reg(AD9889_ADDRESS,0x8c, 0xff, 0)
+#define ADI89_SET_ISRC2_BYTE8(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x8c, 0xff, 0, val)
+#define ADI89_GET_ISRC2_BYTE9			adi_get_i2c_reg(AD9889_ADDRESS,0x8d, 0xff, 0)
+#define ADI89_SET_ISRC2_BYTE9(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x8d, 0xff, 0, val)
+#define ADI89_GET_ISRC2_BYTE10			adi_get_i2c_reg(AD9889_ADDRESS,0x8e, 0xff, 0)
+#define ADI89_SET_ISRC2_BYTE10(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x8e, 0xff, 0, val)
+#define ADI89_GET_ISRC2_BYTE11			adi_get_i2c_reg(AD9889_ADDRESS,0x8f, 0xff, 0)
+#define ADI89_SET_ISRC2_BYTE11(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x8f, 0xff, 0, val)
+#define ADI89_GET_ISRC2_BYTE12			adi_get_i2c_reg(AD9889_ADDRESS,0x90, 0xff, 0)
+#define ADI89_SET_ISRC2_BYTE12(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x90, 0xff, 0, val)
+#define ADI89_GET_ISRC2_BYTE13			adi_get_i2c_reg(AD9889_ADDRESS,0x91, 0xff, 0)
+#define ADI89_SET_ISRC2_BYTE13(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x91, 0xff, 0, val)
+#define ADI89_GET_ISRC2_BYTE14			adi_get_i2c_reg(AD9889_ADDRESS,0x92, 0xff, 0)
+#define ADI89_SET_ISRC2_BYTE14(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x92, 0xff, 0, val)
+#define ADI89_GET_ISRC2_BYTE15			adi_get_i2c_reg(AD9889_ADDRESS,0x93, 0xff, 0)
+#define ADI89_SET_ISRC2_BYTE15(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x93, 0xff, 0, val)
+#define ADI89_GET_MASK1				adi_get_i2c_reg(AD9889_ADDRESS,0x94, 0xff, 0)
+#define ADI89_SET_MASK1(val)			adi_set_i2c_reg(AD9889_ADDRESS,0x94, 0xff, 0, val)
+#define ADI89_GET_MASK2				adi_get_i2c_reg(AD9889_ADDRESS,0x95, 0xC0, 6)
+#define ADI89_SET_MASK2(val)			adi_set_i2c_reg(AD9889_ADDRESS,0x95, 0xc0, 6, val)
+#define ADI89_GET_HPD_INTR			adi_get_i2c_reg(AD9889_ADDRESS,0x96, 0x80, 7)
+#define ADI89_SET_HPD_INTR(val)			adi_set_i2c_reg(AD9889_ADDRESS,0x96, 0x80, 7, val)
+#define ADI89_GET_MSEN_INTR			adi_get_i2c_reg(AD9889_ADDRESS,0x96, 0x40, 6)
+#define ADI89_SET_MSEN_INTR(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x96, 0x40, 6, val)
+#define ADI89_GET_VS_INTR			adi_get_i2c_reg(AD9889_ADDRESS,0x96, 0x20, 5)
+#define ADI89_SET_VS_INTR(val)			adi_set_i2c_reg(AD9889_ADDRESS,0x96, 0x20, 5, val)
+#define ADI89_GET_AUDIOFIFO_FULL_INT		adi_get_i2c_reg(AD9889_ADDRESS,0x96, 0x10, 4)
+#define ADI89_SET_AUDIOFIFO_FULL_INT(val)	adi_set_i2c_reg(AD9889_ADDRESS,0x96, 0x10, 4, val)
+#define ADI89_GET_ITU656_ERROR_INTR		adi_get_i2c_reg(AD9889_ADDRESS,0x96, 0x8, 3)
+#define ADI89_SET_ITU656_ERROR_INTR(val)	adi_set_i2c_reg(AD9889_ADDRESS,0x96, 0x8, 3, val)
+#define ADI89_GET_EDID_RDY_INTR			adi_get_i2c_reg(AD9889_ADDRESS,0x96, 0x4, 2)
+#define ADI89_SET_EDID_RDY_INTR(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x96, 0x4, 2, val)
+#define ADI89_GET_RI_RDY_INTR			adi_get_i2c_reg(AD9889_ADDRESS,0x96, 0x2, 1)
+#define ADI89_SET_RI_RDY_INTR(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x96, 0x2, 1, val)
+#define ADI89_GET_PJ_RDY_INTR			adi_get_i2c_reg(AD9889_ADDRESS,0x96, 0x1, 0)
+#define ADI89_SET_PJ_RDY_INTR(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x96, 0x1, 0, val)
+#define ADI89_GET_HDCP_ERROR_INT		adi_get_i2c_reg(AD9889_ADDRESS,0x97, 0x80, 7)
+#define ADI89_SET_HDCP_ERROR_INT(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x97, 0x80, 7, val)
+#define ADI89_GET_BKSV_FLAG			adi_get_i2c_reg(AD9889_ADDRESS,0x97, 0x40, 6)
+#define ADI89_SET_BKSV_FLAG(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x97, 0x40, 6, val)
+#define ADI89_GET_SET_BIT_TO_1			adi_get_i2c_reg(AD9889_ADDRESS,0x97, 0x4, 2)
+#define ADI89_SET_SET_BIT_TO_1(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x97, 0x4, 2, val)
+#define ADI89_GET_EXTERNAL_GEAR_I2C		adi_get_i2c_reg(AD9889_ADDRESS,0x98, 0x80, 7)
+#define ADI89_SET_EXTERNAL_GEAR_I2C(val)	adi_set_i2c_reg(AD9889_ADDRESS,0x98, 0x80, 7, val)
+#define ADI89_GET_VCO_GEAR_FROM_I2C		adi_get_i2c_reg(AD9889_ADDRESS,0x98, 0x70, 4)
+#define ADI89_SET_VCO_GEAR_FROM_I2C(val)	adi_set_i2c_reg(AD9889_ADDRESS,0x98, 0x70, 4, val)
+#define ADI89_GET_CHARGE_PUMP_SETTING		adi_get_i2c_reg(AD9889_ADDRESS,0x98, 0xf, 0)
+#define ADI89_SET_CHARGE_PUMP_SETTING(val)	adi_set_i2c_reg(AD9889_ADDRESS,0x98, 0xf, 0, val)
+#define ADI89_GET_LOCKCOUNTLIMIT		adi_get_i2c_reg(AD9889_ADDRESS,0x99, 0xff, 0)
+#define ADI89_SET_LOCKCOUNTLIMIT(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x99, 0xff, 0, val)
+#define ADI89_GET_LOCK_FILT_EN			adi_get_i2c_reg(AD9889_ADDRESS,0x9a, 0x80, 7)
+#define ADI89_SET_LOCK_FILT_EN(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x9a, 0x80, 7, val)
+#define ADI89_GET_WAIT_TIME_SEL			adi_get_i2c_reg(AD9889_ADDRESS,0x9a, 0x60, 5)
+#define ADI89_SET_WAIT_TIME_SEL(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x9a, 0x60, 5, val)
+#define ADI89_GET_HALFLSB_DATADRIVER		adi_get_i2c_reg(AD9889_ADDRESS,0x9a, 0x10, 4)
+#define ADI89_SET_HALFLSB_DATADRIVER(val)	adi_set_i2c_reg(AD9889_ADDRESS,0x9a, 0x10, 4, val)
+#define ADI89_GET_QTRLSB_DATADRIVER		adi_get_i2c_reg(AD9889_ADDRESS,0x9a, 0x8, 3)
+#define ADI89_SET_QTRLSB_DATADRIVER(val)	adi_set_i2c_reg(AD9889_ADDRESS,0x9a, 0x8, 3, val)
+#define ADI89_GET_HALFLSB_CLKDRIVER		adi_get_i2c_reg(AD9889_ADDRESS,0x9a, 0x4, 2)
+#define ADI89_SET_HALFLSB_CLKDRIVER(val)	adi_set_i2c_reg(AD9889_ADDRESS,0x9a, 0x4, 2, val)
+#define ADI89_GET_QTRLSB_CLKDRIVER		adi_get_i2c_reg(AD9889_ADDRESS,0x9a, 0x2, 1)
+#define ADI89_SET_QTRLSB_CLKDRIVER(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x9a, 0x2, 1, val)
+#define ADI89_GET_SERICTRLI2C			adi_get_i2c_reg(AD9889_ADDRESS,0x9b, 0x38, 3)
+#define ADI89_SET_SERICTRLI2C(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x9b, 0x38, 3, val)
+#define ADI89_GET_FORCEFILTERNODEI2C		adi_get_i2c_reg(AD9889_ADDRESS,0x9b, 0x4, 2)
+#define ADI89_SET_FORCEFILTERNODEI2C(val)	adi_set_i2c_reg(AD9889_ADDRESS,0x9b, 0x4, 2, val)
+#define ADI89_GET_LOCK_SEL			adi_get_i2c_reg(AD9889_ADDRESS,0x9b, 0x3, 0)
+#define ADI89_SET_LOCK_SEL(val)			adi_set_i2c_reg(AD9889_ADDRESS,0x9b, 0x3, 0, val)
+#define ADI89_GET_PLL_FILTER_R1_VALUE		adi_get_i2c_reg(AD9889_ADDRESS,0x9c, 0xe0, 5)
+#define ADI89_SET_PLL_FILTER_R1_VALUE(val)	adi_set_i2c_reg(AD9889_ADDRESS,0x9c, 0xe0, 5, val)
+#define ADI89_GET_PLL_FILTER_C1_VALUE		adi_get_i2c_reg(AD9889_ADDRESS,0x9c, 0x1c, 2)
+#define ADI89_SET_PLL_FILTER_C1_VALUE(val)	adi_set_i2c_reg(AD9889_ADDRESS,0x9c, 0x1c, 2, val)
+#define ADI89_GET_PLL_FILTER_C2_VALUE		adi_get_i2c_reg(AD9889_ADDRESS,0x9c, 0x3, 0)
+#define ADI89_SET_PLL_FILTER_C2_VALUE(val)	adi_set_i2c_reg(AD9889_ADDRESS,0x9c, 0x3, 0, val)
+#define ADI89_GET_CLKICTRL			adi_get_i2c_reg(AD9889_ADDRESS,0x9d, 0xe0, 5)
+#define ADI89_SET_CLKICTRL(val)			adi_set_i2c_reg(AD9889_ADDRESS,0x9d, 0xe0, 5, val)
+#define ADI89_GET_I2CAGFORCE_CP_OFF		adi_get_i2c_reg(AD9889_ADDRESS,0x9d, 0x10, 4)
+#define ADI89_SET_I2CAGFORCE_CP_OFF(val)	adi_set_i2c_reg(AD9889_ADDRESS,0x9d, 0x10, 4, val)
+#define ADI89_GET_ANALOG_OPEN110		adi_get_i2c_reg(AD9889_ADDRESS,0x9d, 0xc, 2)
+#define ADI89_SET_ANALOG_OPEN110(val)		adi_set_i2c_reg(AD9889_ADDRESS,0x9d, 0xc, 2, val)
+#define ADI89_GET_IREFINCREASE_MSB10		adi_get_i2c_reg(AD9889_ADDRESS,0x9d, 0x3, 0)
+#define ADI89_SET_IREFINCREASE_MSB10(val)	adi_set_i2c_reg(AD9889_ADDRESS,0x9d, 0x3, 0, val)
+#define ADI89_GET_PLLLOCKED			adi_get_i2c_reg(AD9889_ADDRESS,0x9e, 0x10, 4)
+#define ADI89_GET_GEAR_SELECTED			adi_get_i2c_reg(AD9889_ADDRESS,0x9e, 0xe, 1)
+#define ADI89_GET_LEADLAG			adi_get_i2c_reg(AD9889_ADDRESS,0x9e, 0x1, 0)
+#define ADI89_GET_IREFINCREASE_LSB		adi_get_i2c_reg(AD9889_ADDRESS,0x9f, 0xff, 0)
+#define ADI89_GET_LOCKCOUNTDIFF			adi_get_i2c_reg(AD9889_ADDRESS,0xa0, 0xff, 0)
+#define ADI89_GET_TERMMONRESET			adi_get_i2c_reg(AD9889_ADDRESS,0xa1, 0x80, 7)
+#define ADI89_SET_TERMMONRESET(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xa1, 0x80, 7, val)
+#define ADI89_GET_TERMPWRDWNI2C			adi_get_i2c_reg(AD9889_ADDRESS,0xa1, 0x40, 6)
+#define ADI89_SET_TERMPWRDWNI2C(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xa1, 0x40, 6, val)
+#define ADI89_GET_CH0PWRDWNI2C			adi_get_i2c_reg(AD9889_ADDRESS,0xa1, 0x20, 5)
+#define ADI89_SET_CH0PWRDWNI2C(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xa1, 0x20, 5, val)
+#define ADI89_GET_CH1PWRDWNI2C			adi_get_i2c_reg(AD9889_ADDRESS,0xa1, 0x10, 4)
+#define ADI89_SET_CH1PWRDWNI2C(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xa1, 0x10, 4, val)
+#define ADI89_GET_CH2PWRDWNI2C			adi_get_i2c_reg(AD9889_ADDRESS,0xa1, 0x8, 3)
+#define ADI89_SET_CH2PWRDWNI2C(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xa1, 0x8, 3, val)
+#define ADI89_GET_CLKDRVPWRDWNI2C		adi_get_i2c_reg(AD9889_ADDRESS,0xa1, 0x4, 2)
+#define ADI89_SET_CLKDRVPWRDWNI2C(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xa1, 0x4, 2, val)
+#define ADI89_GET_TXOUTPUTLVL			adi_get_i2c_reg(AD9889_ADDRESS,0xa2, 0xf8, 3)
+#define ADI89_SET_TXOUTPUTLVL(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xa2, 0xf8, 3, val)
+#define ADI89_GET_TXDRVLVL			adi_get_i2c_reg(AD9889_ADDRESS,0xa2, 0x4, 2)
+#define ADI89_SET_TXDRVLVL(val)			adi_set_i2c_reg(AD9889_ADDRESS,0xa2, 0x4, 2, val)
+#define ADI89_GET_IDRIVE			adi_get_i2c_reg(AD9889_ADDRESS,0xa2, 0x3, 0)
+#define ADI89_SET_IDRIVE(val)			adi_set_i2c_reg(AD9889_ADDRESS,0xa2, 0x3, 0, val)
+#define ADI89_GET_CLKTXOUTPUTLVL		adi_get_i2c_reg(AD9889_ADDRESS,0xa3, 0xf8, 3)
+#define ADI89_SET_CLKTXOUTPUTLVL(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xa3, 0xf8, 3, val)
+#define ADI89_GET_CLKTXDRVLVL			adi_get_i2c_reg(AD9889_ADDRESS,0xa3, 0x4, 2)
+#define ADI89_SET_CLKTXDRVLVL(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xa3, 0x4, 2, val)
+#define ADI89_GET_CLKIDRIVE			adi_get_i2c_reg(AD9889_ADDRESS,0xa3, 0x3, 0)
+#define ADI89_SET_CLKIDRIVE(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xa3, 0x3, 0, val)
+#define ADI89_GET_CHANSELLBKI2C			adi_get_i2c_reg(AD9889_ADDRESS,0xa4, 0xe0, 5)
+#define ADI89_SET_CHANSELLBKI2C(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xa4, 0xe0, 5, val)
+#define ADI89_GET_LBKLOGICRESETI2C		adi_get_i2c_reg(AD9889_ADDRESS,0xa4, 0x10, 4)
+#define ADI89_SET_LBKLOGICRESETI2C(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xa4, 0x10, 4, val)
+#define ADI89_GET_LBKPWRDWNI2C			adi_get_i2c_reg(AD9889_ADDRESS,0xa4, 0x8, 3)
+#define ADI89_SET_LBKPWRDWNI2C(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xa4, 0x8, 3, val)
+#define ADI89_GET_OSCPWRDWNI2C			adi_get_i2c_reg(AD9889_ADDRESS,0xa4, 0x4, 2)
+#define ADI89_SET_OSCPWRDWNI2C(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xa4, 0x4, 2, val)
+#define ADI89_GET_PLLPWRDWNI2C			adi_get_i2c_reg(AD9889_ADDRESS,0xa4, 0x2, 1)
+#define ADI89_SET_PLLPWRDWNI2C(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xa4, 0x2, 1, val)
+#define ADI89_GET_LBCHANSEL			adi_get_i2c_reg(AD9889_ADDRESS,0xa5, 0xc0, 6)
+#define ADI89_SET_LBCHANSEL(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xa5, 0xc0, 6, val)
+#define ADI89_GET_LBTESTSTART			adi_get_i2c_reg(AD9889_ADDRESS,0xa5, 0x20, 5)
+#define ADI89_SET_LBTESTSTART(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xa5, 0x20, 5, val)
+#define ADI89_GET_LBRUNCNTSEL			adi_get_i2c_reg(AD9889_ADDRESS,0xa5, 0x18, 3)
+#define ADI89_SET_LBRUNCNTSEL(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xa5, 0x18, 3, val)
+#define ADI89_GET_LBPATDATAMODE			adi_get_i2c_reg(AD9889_ADDRESS,0xa5, 0x6, 1)
+#define ADI89_SET_LBPATDATAMODE(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xa5, 0x6, 1, val)
+#define ADI89_GET_LBTESTPAT_MSB			adi_get_i2c_reg(AD9889_ADDRESS,0xa6, 0xff, 0)
+#define ADI89_SET_LBTESTPAT_MSB(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xa6, 0xff, 0, val)
+#define ADI89_GET_LBTESTPAT_MID_1		adi_get_i2c_reg(AD9889_ADDRESS,0xa7, 0xff, 0)
+#define ADI89_SET_LBTESTPAT_MID_1(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xa7, 0xff, 0, val)
+#define ADI89_GET_LBTESTPAT_MID_2		adi_get_i2c_reg(AD9889_ADDRESS,0xa8, 0xff, 0)
+#define ADI89_SET_LBTESTPAT_MID_2(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xa8, 0xff, 0, val)
+#define ADI89_GET_LBTESTPAT_LSB			adi_get_i2c_reg(AD9889_ADDRESS,0xa9, 0xfc, 2)
+#define ADI89_SET_LBTESTPAT_LSB(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xa9, 0xfc, 2, val)
+#define ADI89_GET_LB_FORCE_BITLOC		adi_get_i2c_reg(AD9889_ADDRESS,0xa9, 0x2, 1)
+#define ADI89_SET_LB_FORCE_BITLOC(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xa9, 0x2, 1, val)
+#define ADI89_GET_LBFORCEPH			adi_get_i2c_reg(AD9889_ADDRESS,0xaa, 0x80, 7)
+#define ADI89_SET_LBFORCEPH(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xaa, 0x80, 7, val)
+#define ADI89_GET_LBFORCEPHSEL			adi_get_i2c_reg(AD9889_ADDRESS,0xaa, 0x60, 5)
+#define ADI89_SET_LBFORCEPHSEL(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xaa, 0x60, 5, val)
+#define ADI89_GET_LBBITLOCSEL			adi_get_i2c_reg(AD9889_ADDRESS,0xaa, 0x1f, 0)
+#define ADI89_SET_LBBITLOCSEL(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xaa, 0x1f, 0, val)
+#define ADI89_GET_LBERRCNTMODE			adi_get_i2c_reg(AD9889_ADDRESS,0xab, 0x80, 7)
+#define ADI89_SET_LBERRCNTMODE(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xab, 0x80, 7, val)
+#define ADI89_GET_LBREFDLYNUM			adi_get_i2c_reg(AD9889_ADDRESS,0xab, 0x70, 4)
+#define ADI89_SET_LBREFDLYNUM(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xab, 0x70, 4, val)
+#define ADI89_GET_ERR_NUM_MSB			adi_get_i2c_reg(AD9889_ADDRESS,0xac, 0xff, 0)
+#define ADI89_GET_ERR_NUM_LSB			adi_get_i2c_reg(AD9889_ADDRESS,0xad, 0xff, 0)
+#define ADI89_GET_TEST_OVER			adi_get_i2c_reg(AD9889_ADDRESS,0xae, 0x80, 7)
+#define ADI89_GET_TEST_FAIL			adi_get_i2c_reg(AD9889_ADDRESS,0xae, 0x40, 6)
+#define ADI89_GET_LB_GOODPHASE			adi_get_i2c_reg(AD9889_ADDRESS,0xae, 0x20, 5)
+#define ADI89_GET_HDCP_DESIRED			adi_get_i2c_reg(AD9889_ADDRESS,0xaf, 0x80, 7)
+#define ADI89_SET_HDCP_DESIRED(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xaf, 0x80, 7, val)
+#define ADI89_GET_SIG_CHECK_EN			adi_get_i2c_reg(AD9889_ADDRESS,0xaf, 0x20, 5)
+#define ADI89_SET_SIG_CHECK_EN(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xaf, 0x20, 5, val)
+#define ADI89_GET_FRAME_ENC			adi_get_i2c_reg(AD9889_ADDRESS,0xaf, 0x10, 4)
+#define ADI89_SET_FRAME_ENC(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xaf, 0x10, 4, val)
+#define ADI89_GET_EPP_PROG_EN			adi_get_i2c_reg(AD9889_ADDRESS,0xaf, 0x8, 3)
+#define ADI89_SET_EPP_PROG_EN(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xaf, 0x8, 3, val)
+#define ADI89_GET_HDMI_MODE_SEL			adi_get_i2c_reg(AD9889_ADDRESS,0xaf, 0x4, 2)
+#define ADI89_SET_HDMI_MODE_SEL(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xaf, 0x4, 2, val)
+#define ADI89_GET_EXT_HDMI_MODE			adi_get_i2c_reg(AD9889_ADDRESS,0xaf, 0x2, 1)
+#define ADI89_SET_EXT_HDMI_MODE(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xaf, 0x2, 1, val)
+#define ADI89_GET_HDCPVUMASK			adi_get_i2c_reg(AD9889_ADDRESS,0xaf, 0x1, 0)
+#define ADI89_SET_HDCPVUMASK(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xaf, 0x1, 0, val)
+#define ADI89_GET_AN_0				adi_get_i2c_reg(AD9889_ADDRESS,0xb0, 0xff, 0)
+#define ADI89_GET_AN_1				adi_get_i2c_reg(AD9889_ADDRESS,0xb1, 0xff, 0)
+#define ADI89_GET_AN_2				adi_get_i2c_reg(AD9889_ADDRESS,0xb2, 0xff, 0)
+#define ADI89_GET_AN_3				adi_get_i2c_reg(AD9889_ADDRESS,0xb3, 0xff, 0)
+#define ADI89_GET_AN_4				adi_get_i2c_reg(AD9889_ADDRESS,0xb4, 0xff, 0)
+#define ADI89_GET_AN_5				adi_get_i2c_reg(AD9889_ADDRESS,0xb5, 0xff, 0)
+#define ADI89_GET_AN_6				adi_get_i2c_reg(AD9889_ADDRESS,0xb6, 0xff, 0)
+#define ADI89_GET_AN_7				adi_get_i2c_reg(AD9889_ADDRESS,0xb7, 0xff, 0)
+#define ADI89_GET_SIG_CHECK_FAIL		adi_get_i2c_reg(AD9889_ADDRESS,0xb8, 0x80, 7)
+#define ADI89_GET_ENC_ON			adi_get_i2c_reg(AD9889_ADDRESS,0xb8, 0x40, 6)
+#define ADI89_GET_INT_HDMI_MODE			adi_get_i2c_reg(AD9889_ADDRESS,0xb8, 0x20, 5)
+#define ADI89_GET_KEYS_READ_ERR			adi_get_i2c_reg(AD9889_ADDRESS,0xb8, 0x10, 4)
+#define ADI89_GET_OUTPUT_TEST_EN		adi_get_i2c_reg(AD9889_ADDRESS,0xb9, 0x80, 7)
+#define ADI89_SET_OUTPUT_TEST_EN(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xb9, 0x80, 7, val)
+#define ADI89_GET_INPUTTESTEN			adi_get_i2c_reg(AD9889_ADDRESS,0xb9, 0x40, 6)
+#define ADI89_SET_INPUTTESTEN(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xb9, 0x40, 6, val)
+#define ADI89_GET_INPUTTESTGP			adi_get_i2c_reg(AD9889_ADDRESS,0xb9, 0x20, 5)
+#define ADI89_SET_INPUTTESTGP(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xb9, 0x20, 5, val)
+#define ADI89_GET_TESTSEL			adi_get_i2c_reg(AD9889_ADDRESS,0xb9, 0x1f, 0)
+#define ADI89_SET_TESTSEL(val)			adi_set_i2c_reg(AD9889_ADDRESS,0xb9, 0x1f, 0, val)
+#define ADI89_GET_CLK_DELAY			adi_get_i2c_reg(AD9889_ADDRESS,0xba, 0xe0, 5)
+#define ADI89_SET_CLK_DELAY(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xba, 0xe0, 5, val)
+#define ADI89_GET_INT_EPP_ON			adi_get_i2c_reg(AD9889_ADDRESS,0xba, 0x10, 4)
+#define ADI89_SET_INT_EPP_ON(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xba, 0x10, 4, val)
+#define ADI89_GET_EPP_CONFIG			adi_get_i2c_reg(AD9889_ADDRESS,0xba, 0x8, 3)
+#define ADI89_SET_EPP_CONFIG(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xba, 0x8, 3, val)
+#define ADI89_GET_EPP_PROG_PWD			adi_get_i2c_reg(AD9889_ADDRESS,0xbb, 0xff, 0)
+#define ADI89_SET_EPP_PROG_PWD(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xbb, 0xff, 0, val)
+#define ADI89_GET_EPP_SIG_MSB			adi_get_i2c_reg(AD9889_ADDRESS,0xbc, 0xff, 0)
+#define ADI89_GET_EPP_SIG_LSB			adi_get_i2c_reg(AD9889_ADDRESS,0xbd, 0xff, 0)
+#define ADI89_GET_BCAPS				adi_get_i2c_reg(AD9889_ADDRESS,0xbe, 0x80, 7)
+#define ADI89_GET_REPEATER			adi_get_i2c_reg(AD9889_ADDRESS,0xbe, 0x40, 6)
+#define ADI89_GET_KSV_READY			adi_get_i2c_reg(AD9889_ADDRESS,0xbe, 0x20, 5)
+#define ADI89_GET_TEST_BIT			adi_get_i2c_reg(AD9889_ADDRESS,0xbe, 0x10, 4)
+#define ADI89_GET_TEST_BITS			adi_get_i2c_reg(AD9889_ADDRESS,0xbe, 0xc, 2)
+#define ADI89_GET_HDCP_SUPPORT			adi_get_i2c_reg(AD9889_ADDRESS,0xbe, 0x2, 1)
+#define ADI89_GET_FAST_HDCP			adi_get_i2c_reg(AD9889_ADDRESS,0xbe, 0x1, 0)
+#define ADI89_GET_BKSV1				adi_get_i2c_reg(AD9889_ADDRESS,0xbf, 0xff, 0)
+#define ADI89_GET_BKSV2				adi_get_i2c_reg(AD9889_ADDRESS,0xbf, 0xff, 0)
+#define ADI89_GET_BKSV3				adi_get_i2c_reg(AD9889_ADDRESS,0xbf, 0xff, 0)
+#define ADI89_GET_BKSV4				adi_get_i2c_reg(AD9889_ADDRESS,0xbf, 0xff, 0)
+#define ADI89_GET_BKSV5				adi_get_i2c_reg(AD9889_ADDRESS,0xbf, 0xff, 0)
+#define ADI89_GET_EDID_SEGMENT			adi_get_i2c_reg(AD9889_ADDRESS,0xc4, 0xff, 0)
+#define ADI89_SET_EDID_SEGMENT(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xc4, 0xff, 0, val)
+#define ADI89_GET_ERR_FLAG			adi_get_i2c_reg(AD9889_ADDRESS,0xc5, 0x80, 7)
+#define ADI89_GET_AN_STOP			adi_get_i2c_reg(AD9889_ADDRESS,0xc5, 0x40, 6)
+#define ADI89_GET_HDCP_ENABLED			adi_get_i2c_reg(AD9889_ADDRESS,0xc5, 0x20, 5)
+#define ADI89_GET_EDID_READY_FLAG		adi_get_i2c_reg(AD9889_ADDRESS,0xc5, 0x10, 4)
+#define ADI89_GET_I2C_INTERRUPT			adi_get_i2c_reg(AD9889_ADDRESS,0xc5, 0x8, 3)
+#define ADI89_GET_RI_FLAG			adi_get_i2c_reg(AD9889_ADDRESS,0xc5, 0x4, 2)
+#define ADI89_GET_BKSV_UPDATE_FLAG		adi_get_i2c_reg(AD9889_ADDRESS,0xc5, 0x2, 1)
+#define ADI89_GET_PJ_FLAG			adi_get_i2c_reg(AD9889_ADDRESS,0xc5, 0x1, 0)
+#define ADI89_GET_FREE_FLAGS			adi_get_i2c_reg(AD9889_ADDRESS,0xc6, 0xe0, 5)
+#define ADI89_GET_HDMI_MODE			adi_get_i2c_reg(AD9889_ADDRESS,0xc6, 0x10, 4)
+#define ADI89_GET_HDCP_REQUESTED		adi_get_i2c_reg(AD9889_ADDRESS,0xc6, 0x8, 3)
+#define ADI89_GET_RX_SENSE			adi_get_i2c_reg(AD9889_ADDRESS,0xc6, 0x4, 2)
+#define ADI89_GET_EEPROM_READ_OK		adi_get_i2c_reg(AD9889_ADDRESS,0xc6, 0x2, 1)
+#define ADI89_GET_TMDS_OUTPUT_ENABLED		adi_get_i2c_reg(AD9889_ADDRESS,0xc6, 0x1, 0)
+#define ADI89_GET_BKSV_FLAG2			adi_get_i2c_reg(AD9889_ADDRESS,0xc7, 0x80, 7)
+#define ADI89_GET_BKSV_COUNT			adi_get_i2c_reg(AD9889_ADDRESS,0xc7, 0x7f, 0)
+#define ADI89_GET_HDCP_CONTROLLER_ERROR		adi_get_i2c_reg(AD9889_ADDRESS,0xc8, 0xf0, 4)
+#define ADI89_GET_HDCP_CONTROLLER_STATE		adi_get_i2c_reg(AD9889_ADDRESS,0xc8, 0xf, 0)
+#define ADI89_GET_EDID_TRYS			adi_get_i2c_reg(AD9889_ADDRESS,0xc9, 0xf, 0)
+#define ADI89_SET_EDID_TRYS(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xc9, 0xf, 0, val)
+#define ADI89_GET_FREE_REGISTER_0		adi_get_i2c_reg(AD9889_ADDRESS,0xca, 0xff, 0)
+#define ADI89_SET_FREE_REGISTER_0(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xca, 0xff, 0, val)
+#define ADI89_GET_FREE_REGISTER_1		adi_get_i2c_reg(AD9889_ADDRESS,0xcb, 0xff, 0)
+#define ADI89_SET_FREE_REGISTER_1(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xcb, 0xff, 0, val)
+#define ADI89_GET_IROM_BIST_PASS		adi_get_i2c_reg(AD9889_ADDRESS,0xcc, 0x4, 2)
+#define ADI89_SET_IROM_BIST_PASS(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xcc, 0x4, 2, val)
+#define ADI89_GET_IROM_BIST_DONE		adi_get_i2c_reg(AD9889_ADDRESS,0xcc, 0x2, 1)
+#define ADI89_SET_IROM_BIST_DONE(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xcc, 0x2, 1, val)
+#define ADI89_GET_IROM_BIST_ENABLE		adi_get_i2c_reg(AD9889_ADDRESS,0xcc, 0x1, 0)
+#define ADI89_SET_IROM_BIST_ENABLE(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xcc, 0x1, 0, val)
+#define ADI89_GET_LBAUTOTRYNUM			adi_get_i2c_reg(AD9889_ADDRESS,0xfa, 0xf0, 4)
+#define ADI89_SET_LBAUTOTRYNUM(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xfa, 0xf0, 4, val)
+#define ADI89_GET_LBFIFO_WRITE_ADDR		adi_get_i2c_reg(AD9889_ADDRESS,0xfa, 0xc, 2)
+#define ADI89_SET_LBFIFO_WRITE_ADDR(val)	adi_set_i2c_reg(AD9889_ADDRESS,0xfa, 0xc, 2, val)
+#define ADI89_GET_LBALIGN_LENGTH		adi_get_i2c_reg(AD9889_ADDRESS,0xfa, 0x3, 0)
+#define ADI89_SET_LBALIGN_LENGTH(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xfa, 0x3, 0, val)
+#define ADI89_GET_LBSTARTDELAY			adi_get_i2c_reg_mult(AD9889_ADDRESS, 0xfb, 0xff, 0x80, 7, 2)
+#define ADI89_SET_LBSTARTDELAY(val)		adi_set_i2c_reg_mult(AD9889_ADDRESS, 0xfb, 0xff, 0x80, 7, 2, val)
+#define ADI89_GET_LBALIGN_START			adi_get_i2c_reg(AD9889_ADDRESS,0xfb, 0x70, 4)
+#define ADI89_SET_LBALIGN_START(val)		adi_set_i2c_reg(AD9889_ADDRESS,0xfb, 0x70, 4, val)
+#define ADI89_GET_LBPHASECHANGEMARGIN		adi_get_i2c_reg(AD9889_ADDRESS,0xfb, 0xf, 0)
+#define ADI89_SET_LBPHASECHANGEMARGIN(val)	adi_set_i2c_reg(AD9889_ADDRESS,0xfb, 0xf, 0, val)
+#define ADI89_GET_LBCURRENTPHASE		adi_get_i2c_reg(AD9889_ADDRESS,0xfd, 0xc0, 6)
+#define ADI89_GET_LBPHASERESULT			adi_get_i2c_reg(AD9889_ADDRESS,0xfd, 0x3c, 2)
+#define ADI89_GET_LBCURRENTBITLOC		adi_get_i2c_reg(AD9889_ADDRESS,0xfe, 0xf8, 3)
+#define ADI89_GET_LBNOWTRYNUM			adi_get_i2c_reg(AD9889_ADDRESS,0xff, 0xf0, 4)
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/adi9889/Makefile
+++ linux-mvl-dove-2.6.32/drivers/video/display/adi9889/Makefile
@@ -0,0 +1,6 @@
+#
+# Makefile for HDMI transmitters that connect to Dove framebuffer
+#
+
+obj-$(CONFIG_ADI9889) += adi9889.o
+adi9889-objs := AD9889_interrupt_handler.o AD9889_setup.o edid_parse.o reg_handler.o adi9889_setup.o
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/adi9889/ad9889_driver.h
+++ linux-mvl-dove-2.6.32/drivers/video/display/adi9889/ad9889_driver.h
@@ -0,0 +1,211 @@
+/******************************************************************************
+*                                                                             *
+* License Agreement                                                           *
+*                                                                             *
+* Copyright (c) 2006 Analog Devices Inc.                                      *
+* All rights reserved.                                                        *
+*                                                                             *
+* This source code is intended for the recipient only under the guidelines of *
+* the non-disclosure agreement with Analog Devices Inc.                       *
+*                                                                             *
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR  *
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,    *
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE *
+* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER      *
+* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING     *
+* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER         *
+* DEALINGS IN THE SOFTWARE.                                                   *
+*                                                                             *
+*                                                                             *
+* This software is intended for use with the AD9889A and derivative parts only*
+*                                                                             *
+******************************************************************************/
+
+/******************************************************************************
+*                                                                             *
+* THIS IS A READ-ONLY SOURCE FILE. DO NOT EDIT IT DIRECTLY.                   *
+* Author: Matthew McCarn (matthew.mccarn@analog.com)                          *
+* Date: May 16, 2006                                                          *
+*                                                                             *
+******************************************************************************/
+
+#ifndef _AD9889_DRIVER_H_
+#define _AD9998_DRIVER_H_
+
+#include "type_def.h"
+
+// Return values from interrupt handler
+#define HPD_INT 	0x1
+#define HDCP_INT 	0x2
+#define EDID_INT 	0x4
+#define CTL_ERR_INT 	0x8
+#define INT_ERROR 	0x10
+
+enum mytiming
+{
+	AD9889_480i,
+	AD9889_720_480p,
+	AD9889_720p,
+	AD9889_1080i,
+	AD9889_640_480p,
+};
+
+typedef enum mytiming Timing;
+
+enum mycolorspace
+{
+	RGB,
+	YCbCr601,
+	YCbCr709,
+};
+
+typedef enum mycolorspace Colorspace;
+
+enum myrange
+{
+	AD9889_0_255,
+	AD9889_16_235,
+};
+
+typedef enum myrange Range;
+
+enum myaspectratio
+{
+	_4x3,
+	_16x9,
+};
+
+typedef enum myaspectratio AspectRatio;
+
+enum mysamplingfrequency
+{
+	_32k,
+	_44k,
+	_48k,
+	_88k,
+	_96k,
+	_176k,
+	_192k,
+};
+
+typedef enum mysamplingfrequency SamplingFrequency;
+
+enum myaudioinputmode
+{
+	SPDIF,
+	I2S,
+	I2S_LEFT,
+	I2S_RIGHT,
+};
+
+typedef enum myaudioinputmode AudioInputMode;
+
+struct aviinfoframe
+{
+	DEPLINT	active_format;
+	DEPLINT	bar_info;
+	DEPLINT	scan_info;
+	DEPLINT	colorimetry;
+	DEPLINT	non_unif_pic_scaling;
+	DEPLINT	active_fmt_asp_rat;
+	DEPLINT	active_line_start;
+	DEPLINT	active_line_end;
+	DEPLINT	active_pixel_start;
+	DEPLINT	active_pixel_end;
+};
+
+typedef struct aviinfoframe * AVIInfoframe;
+
+struct audioinfoframe
+{
+	DEPLINT	down_mix_inh;
+	DEPLINT	level_shift;
+};
+
+typedef struct audioinfoframe * AudioInfoframe;
+
+struct spdpacket
+{
+	BYTE	*spd_byte_1to25;
+};
+
+typedef struct spdpacket * SPDPacket;
+
+struct mpegpacket
+{
+	BYTE	*mpeg_byte_0to3;
+	DEPLINT	frame_repeat;
+	DEPLINT	frame_indicator;
+};
+
+typedef struct mpegpacket * MPEGPacket;
+
+struct acppacket
+{
+	DEPLINT	acp_type;
+	DEPLINT	acp_byte_1;
+};
+
+typedef struct acppacket * ACPPacket;
+
+struct isrcpacket
+{
+	DEPLINT	isrc_continued;
+	DEPLINT	isrc_valid;
+	DEPLINT	isrc_status;
+	BYTE	*isrc_1;
+	BYTE	*isrc_2;
+};
+
+typedef struct isrcpacket * ISRCPacket;
+
+void enable_hdcp(void (*compare_bksvs)(BYTE *, DEPLINT,BYTE *));
+void disable_hdcp();
+BOOL get_hdcp_status();
+BOOL get_hdmi_status();
+
+DEPLINT ad9889_interrupt_handler(void (* setup_audio_video)());
+void timer_2_second_handler(void);
+
+void initialize_ad9889_i2c(DEPLINT (*)(DEPLINT, DEPLINT, BYTE *, DEPLINT), DEPLINT (*)(DEPLINT, DEPLINT, BYTE *, DEPLINT));
+void initialize_error_callback(void (*error_function)(int));
+
+BOOL edid_reading_complete();
+
+void set_video_mode(Timing video_timing, Colorspace colorspace_in, Range colorspace_range, AspectRatio aspect_ratio);
+void set_input_format(DEPLINT input_format, DEPLINT input_style, DEPLINT input_bit_width,DEPLINT clock_edge);
+void set_audio_mode(SamplingFrequency sampling_frequency, DEPLINT bit_width, DEPLINT channel_count, DEPLINT channel_map);
+void set_audio_format(AudioInputMode input_mode);
+void force_hdmi(BOOL hdmi);
+BOOL check_Rx_sense();
+void set_avi_if(AVIInfoframe info);
+void set_audio_if(AudioInfoframe info);
+void set_spd_packet(SPDPacket info);
+void set_mpeg_packet(MPEGPacket info);
+void set_acp_packet(ACPPacket info);
+void set_isrc_packet(ISRCPacket info);
+void set_sync_params(DEPLINT h_dur, DEPLINT h_fp, DEPLINT v_dur, DEPLINT v_fp,DEPLINT h_pol,DEPLINT v_pol);
+void set_clock_delay(DEPLINT setting);
+void input_data_clock_2x(BOOL value);
+void AD9889_reset();
+void AD9889_audio_mute(BOOL val);
+void enable_sync_gen(BOOL val);
+void enable_de_gen(BOOL val);
+void set_de_params(DEPLINT h_delay, DEPLINT v_delay, DEPLINT int_offset,DEPLINT act_width,DEPLINT act_height);
+
+void av_mute_on();
+void av_mute_off();
+
+DEPLINT get_version();
+
+BOOL query_vid(DEPLINT vid);
+BOOL query_colorspace_in(Colorspace colorspace_in);
+BOOL query_aspect_ratio(AspectRatio aspect_ratio);
+BOOL query_sampling_frequency(SamplingFrequency sampling_frequency);
+BOOL query_bit_width(DEPLINT bit_width);
+BOOL query_channel_count(DEPLINT channel_count);
+BOOL query_channel_map(DEPLINT channel_map);
+
+void set_MCLK_ratio(int val);
+
+#endif //_AD9998_DRIVER_H_
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/adi9889/type_def.h
+++ linux-mvl-dove-2.6.32/drivers/video/display/adi9889/type_def.h
@@ -0,0 +1,51 @@
+/******************************************************************************
+*                                                                             *
+* License Agreement                                                           *
+*                                                                             *
+* Copyright (c) 2006 Analog Devices Inc.                                      *
+* All rights reserved.                                                        *
+*                                                                             *
+* This source code is intended for the recipient only under the guidelines of *
+* the non-disclosure agreement with Analog Devices Inc.                       *
+*                                                                             *
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR  *
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,    *
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE *
+* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER      *
+* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING     *
+* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER         *
+* DEALINGS IN THE SOFTWARE.                                                   *
+*                                                                             *
+*                                                                             *
+* This software is intended for use with the AD9889A and derivative parts only*
+*                                                                             *
+******************************************************************************/
+
+/******************************************************************************
+*                                                                             *
+* THIS IS A READ-ONLY SOURCE FILE. DO NOT EDIT IT DIRECTLY.                   *
+* Author: Matthew McCarn (matthew.mccarn@analog.com)                          *
+* Date: May 16, 2006                                                          *
+*                                                                             *
+******************************************************************************/
+
+#ifndef _TYPE_DEF_H
+#define _TYPE_DEF_H
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/errno.h>
+#include <linux/types.h>
+
+typedef unsigned char	BYTE;			/**< unsigned 8-bit */
+typedef unsigned short	WORD;			/**< unsigned 16-bit */
+//typedef unsigned long DWORD;			/**< unsigned 32-bit */
+typedef int		DEPLINT;		/** < signed 16-bit*/
+typedef int		BOOL;			/**< boolean (TRUE or FALSE) */
+
+#define TRUE		1
+#define FALSE		0
+
+#endif  // //
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/adi9889/adi9889_setup.c
+++ linux-mvl-dove-2.6.32/drivers/video/display/adi9889/adi9889_setup.c
@@ -0,0 +1,311 @@
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/param.h>
+#include <linux/jiffies.h>
+#include <linux/platform_device.h>
+#include <linux/i2c.h>
+#include <linux/delay.h>
+#include <linux/proc_fs.h>
+#include <linux/kthread.h>
+#include <linux/freezer.h>
+#include "AD9889_setup.h"
+#include "AD9889_interrupt_handler.h"
+#include "AD9889A_i2c_handler.h"
+
+//#define DEBUG
+
+#ifdef DEBUG
+#include <linux/debugfs.h>
+#include <asm/uaccess.h>
+#endif
+
+struct i2c_client *adi9889_g_client, *adi9889_edid_g_client;
+
+#ifdef DEBUG
+/*
+ * Debugfs stuff.
+ */
+static char adi9889_debug_buf[2048];
+static struct dentry *adi9889_dfs_root;
+static struct dentry *adi9889_dfs_regs;
+#endif
+
+static const struct i2c_device_id adi9889_register_id[] = {
+	{ "adi9889_i2c", 0 },
+	{ "adi9889_edid_i2c", 1},
+	{ }
+};
+MODULE_DEVICE_TABLE(i2c, adi9889_register_id);
+static struct i2c_client *adi9889_i2c_client;
+
+#ifdef DEBUG
+static void adi9889_dfs_shutdown(void)
+{
+	if (! IS_ERR(adi9889_dfs_regs))
+		debugfs_remove(adi9889_dfs_regs);
+	if (adi9889_dfs_root)
+		debugfs_remove(adi9889_dfs_root);
+}
+
+static int adi9889_dfs_open(struct inode *inode, struct file *file)
+{
+	file->private_data = inode->i_private;
+	return 0;
+}
+
+static ssize_t adi9889_dfs_read_reg(struct file *file,
+		char __user *buf, size_t count, loff_t *ppos)
+{
+	char *s = adi9889_debug_buf;
+	int offset = 0;
+	static BYTE data[256];
+
+	i2c_read_bytes(AD9889_ADDRESS, offset, data, 256);
+
+	for (offset = 0; offset < 256; offset++)
+	{
+		s += sprintf(s, "%02x: %02x\n", offset, data[offset]);
+	}
+
+	return simple_read_from_buffer(buf, count, ppos, adi9889_debug_buf,
+			s - adi9889_debug_buf);
+}
+
+/**
+ *  @brief proc write function
+ *
+ *  @param file    file pointer
+ *  @param buf     pointer to data buffer
+ *  @param count   data number to write
+ *  @param data    data to write
+ *  @return 	   number of data
+ */
+static ssize_t adi9889_dfs_write_reg(struct file *file, const char __user *buf,
+			    size_t count, loff_t *ppos)
+{
+	unsigned int offset, value, len;
+	int ret;
+	BYTE byte;
+	static char data[32];
+
+	len = (count < 32) ? count : 31;
+
+	if (copy_from_user(data, buf, len)) {
+		printk(KERN_NOTICE "Copy from user failed\n");
+		return 0;
+	}
+
+	data[len] = 0;
+
+	if (sscanf(data, "%x=%x", &offset, &value) != 2)
+		return 0;
+
+	byte = (BYTE)value;
+
+	ret = i2c_write_bytes(AD9889_ADDRESS, offset, &byte, 1);
+
+	return (ssize_t)len;
+}
+
+static const struct file_operations adi9889_dfs_reg_ops = {
+	.owner = THIS_MODULE,
+	.read = adi9889_dfs_read_reg,
+	.write = adi9889_dfs_write_reg,
+	.open = adi9889_dfs_open
+};
+
+static void adi9889_dfs_setup(void)
+{
+	char fname[40];
+
+	adi9889_dfs_root = debugfs_create_dir("adi9889", NULL);
+	if (IS_ERR(adi9889_dfs_root)) {
+		adi9889_dfs_root = NULL;  /* Never mind */
+		printk(KERN_NOTICE "adi9889 was unable to set up debugfs\n");
+		return;
+	}
+	sprintf(fname, "regs");
+	adi9889_dfs_regs = debugfs_create_file(fname, 0644, adi9889_dfs_root,
+			NULL, &adi9889_dfs_reg_ops);
+}
+#endif
+
+static int adi9889_i2c_remove(struct i2c_client *client)
+{
+        adi9889_i2c_client = NULL;
+        return 0;
+}
+
+static DEPLINT adi9889_read_byte(DEPLINT devaddr, DEPLINT regaddr, BYTE *buffer, DEPLINT count)
+{
+	int i;
+#if 0
+	return adi9889_reg_get (regaddr, buffer, count);
+#else
+	for (i = 0 ; i < count ; i ++) {
+		if (devaddr == 0x72)
+			buffer[i]=i2c_smbus_read_byte_data(adi9889_g_client, regaddr + i);
+		else if (devaddr == 0x7E)
+			buffer[i]=i2c_smbus_read_byte_data(adi9889_edid_g_client, regaddr + i);
+		else
+			printk (KERN_ERR "Got WRONG addr in %s (0x%x)\n",__FUNCTION__,devaddr);
+		//printk ("READ devaddr 0x%x, 0x%x = 0x%x\n",devaddr, regaddr+i,buffer[i]);
+	}
+#endif
+	return 0;
+}
+
+static DEPLINT adi9889_write_function(DEPLINT devaddr, DEPLINT regaddr, BYTE *buffer, DEPLINT count)
+{
+	int i;
+	s32 rc;
+	for (i = 0 ; i < count ; i ++) {
+		if (devaddr == 0x72)
+			rc = i2c_smbus_write_byte_data(adi9889_g_client, regaddr + i, buffer[i]);
+		else if (devaddr == 0x7E)
+			rc = i2c_smbus_write_byte_data(adi9889_edid_g_client, regaddr + i, buffer[i]);
+		else
+			printk (KERN_ERR "Got WRONG addr in %s (0x%x)\n",__FUNCTION__,devaddr);
+		//printk ("WRITE devaddr 0x%x, 0x%x = 0x%x\n",devaddr, regaddr+i,buffer[i]);
+	}
+	return 0;
+
+}
+
+void adi9889_error_callback(int errcode)
+{
+	printk ("ERROR at %s - error code %d\n",__FUNCTION__, errcode);
+}
+
+static void setup_audio_video(void)
+{
+	printk ("Got into %s\n",__FUNCTION__);
+	/*
+	 * 0 - input select - RGB 4:4:4
+	 * 0 - input style - RGB
+	 * 0 - ?
+	 * 0 - ?
+	 */
+/*
+	Red --> Blue
+	Blue --> red
+	Gree --> Green ?
+*/
+//	set_input_format(0, 0, 0, 0);
+//	msleep(1000);
+	/*
+	 * 0 - video_timing - Not used in the driver !
+	 * RGB - Input color space
+	 * AD9889_0_255 - Color space range
+	 * _16x9 - Aspect ratio
+	 */
+	set_input_format(0, 0, 0, 0);
+//	set_video_mode(AD9889_1080i, RGB, AD9889_0_255, _16x9);
+	set_video_mode(AD9889_1080i, RGB, AD9889_0_255, _16x9);
+	set_audio_format(SPDIF);
+	set_spdif_audio();
+	//set_audio_format(I2S);
+	set_audio_mode(_44k, 24, 2, 2);
+	av_mute_off();
+
+}
+struct task_struct *adi9889_thread_struct;
+
+int adi9889_thread (void *data)
+{
+	int counter = 0;
+
+	while (1) {
+		int ret;
+		counter ++;
+		try_to_freeze();
+		ret = ad9889_interrupt_handler(setup_audio_video);
+		msleep(2000);
+	}
+
+	return 0;
+}
+static int adi9889_i2c_probe(struct i2c_client *client,
+                        const struct i2c_device_id *id)
+{
+        int rc;
+
+	printk ("Probing in %s, name %s, addr 0x%x\n",__FUNCTION__,client->name,client->addr);
+
+        if (id->driver_data == 0) {
+		memcpy(&adi9889_g_client, &client, sizeof(client));
+	}
+	else if (id->driver_data == 1) {
+		memcpy(&adi9889_edid_g_client, &client, sizeof(client));
+		return 0;
+	}
+	else {
+		return -ENODEV;
+	}
+
+        if (!i2c_check_functionality(client->adapter,
+                                     I2C_FUNC_SMBUS_I2C_BLOCK)) {
+                dev_err(&client->dev, "i2c bus does not support the adi9889\n");
+                rc = -ENODEV;
+                goto exit;
+        }
+
+        //HW reset
+	initialize_ad9889_i2c(adi9889_read_byte, adi9889_write_function);
+	initialize_error_callback (adi9889_error_callback);
+	AD9889_reset();
+	adi9889_early_setup();
+	disable_hdcp();
+
+	adi9889_thread_struct = kthread_run (adi9889_thread, client, "adi9889_int_thread");
+
+	if (!adi9889_thread_struct)
+		printk (KERN_ERR "Error creating kernel thread in %s\n",__FUNCTION__);
+
+#ifdef DEBUG
+	adi9889_dfs_setup();
+#endif
+        return 0;
+
+ exit:
+        return rc;
+}
+
+static struct i2c_driver adi9889_driver = {
+     .driver = {
+          .name   = "adi9889_i2c",
+          .owner  = THIS_MODULE,
+     },
+     .probe          = adi9889_i2c_probe,
+     .remove         = adi9889_i2c_remove,
+     .id_table       = adi9889_register_id,
+};
+
+static int __init dove_adi9889_init(void)
+{
+        int ret;
+
+	printk ("Initializing %s\n",__FUNCTION__);
+
+        if ((ret = i2c_add_driver(&adi9889_driver)) < 0)
+        {
+                return ret;
+        }
+        return ret;
+}
+
+static void __exit dove_adi9889_exit(void)
+{
+#ifdef DEBUG
+	adi9889_dfs_shutdown();
+#endif
+	i2c_del_driver(&adi9889_driver);
+}
+
+module_init(dove_adi9889_init);
+module_exit(dove_adi9889_exit);
+
+MODULE_AUTHOR("rabeeh@marvell.com");
+MODULE_DESCRIPTION("ADI9889 of Video plug - based on ANX7150 driver and code from ADI");
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/adi9889/AD9889_interrupt_handler.c
+++ linux-mvl-dove-2.6.32/drivers/video/display/adi9889/AD9889_interrupt_handler.c
@@ -0,0 +1,242 @@
+/******************************************************************************
+*                                                                             *
+* License Agreement                                                           *
+*                                                                             *
+* Copyright (c) 2006 Analog Devices Inc.                                      *
+* All rights reserved.                                                        *
+*                                                                             *
+* This source code is intended for the recipient only under the guidelines of *
+* the non-disclosure agreement with Analog Devices Inc.                       *
+*                                                                             *
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR  *
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,    *
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE *
+* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER      *
+* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING     *
+* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER         *
+* DEALINGS IN THE SOFTWARE.                                                   *
+*                                                                             *
+*                                                                             *
+* This software is intended for use with the AD9889A and derivative parts only*
+*																		                                          *
+******************************************************************************/
+
+/******************************************************************************
+*                                                                             *
+* THIS IS A READ-ONLY SOURCE FILE. DO NOT EDIT IT DIRECTLY.                   *
+* Author: Matthew McCarn (matthew.mccarn@analog.com)                          *
+* Date: May 16, 2006                                                          *
+*                                                                             *
+******************************************************************************/
+//#include <stdio.h>
+//#include <system.h>
+//#include <altera_avalon_pio_regs.h>
+#include "type_def.h"
+#include "AD9889_setup.h"
+#include "AD9889A_i2c_handler.h"
+#include "reg_handler.h"
+#include "AD9889_interrupt_handler.h"
+#include "ad9889_macros.h"
+
+
+//unsigned char edid_dat[256];
+//unsigned char revocation_list[64];
+static DEPLINT next_segment = 0;
+static DEPLINT edid_block_map_offset = 0;
+static DEPLINT timer_count = 0;
+static DEPLINT hdcp_check_count = 0;
+static DEPLINT hdcp_nack_count = 0;
+//static BOOL retry_edid = FALSE;
+
+DEPLINT ad9889_interrupt_handler(void (* setup_audio_video)(void))
+{
+	// to contain the interupt information from AD9889
+	BYTE interrupt_registers[2];
+	DEPLINT interrupt_code = 0;
+	BYTE interrupt_remain[2] = {0xFF,0xFF};
+
+	// read interrupt registers
+	while ((interrupt_remain[0]&0xC4) | (interrupt_remain[1]&0xc0))
+	{
+		//printk ("\n\n\n\n\nprintk before first i2c read\n");
+		i2c_read_bytes(AD9889_ADDRESS, 0x96, interrupt_registers, 2);
+		//printk ("After 0x%x, 0x%x\n",interrupt_registers[0], interrupt_registers[1]);
+
+		// clear interrupt reigisters
+		//DEBUG_MESSAGE_2("AD9889 Interrupt Detected\n  Register 0x97 = 0x%2.2x\n  Register 0x96 = 0x%2.2x\n",
+		//		(DEPLINT)interrupt_registers[1],(DEPLINT)interrupt_registers[0]);
+
+		// process error flag
+		if ((interrupt_registers[1] & 0x80))
+		{
+			DEPLINT error;
+			//after 4 No Acks when HDCP is requested, assume that sink is not HDCP capable
+			if (ADI89_GET_HDCP_CONTROLLER_ERROR == 4)
+			{
+				//if EDID times out attempt more times
+#if defined(HDCP_OPTION)
+				if (get_hdcp_hdcp_requested()==FALSE)
+				{
+#endif
+					ADI89_SET_EDID_TRYS(15);
+#if defined(HDCP_OPTION)
+				}
+				else
+				{
+					hdcp_nack_count++;
+					if (hdcp_nack_count > MAX_HDCP_NACK)
+					{
+						error_callback_function(0x14);
+						hdcp_nack_count = 0;
+					}
+				}
+#endif
+			}
+			error = ADI89_GET_HDCP_CONTROLLER_ERROR;
+			printk ("HDCP controller status = 0x%x\n",adi_get_i2c_reg(AD9889_ADDRESS,0xc8, 0xff, 0));
+			if (error == 2)
+			{
+				if (ADI89_GET_RX_SENSE)
+				{
+					printk ("Here %d\n",__LINE__);
+					error_callback_function(error);
+				}
+			}
+			else
+			{
+				printk ("Here %d\n",__LINE__);
+				error_callback_function(error);
+				interrupt_code |= INT_ERROR;
+#if 1
+			{
+				static int workaround = 0;
+
+				if (workaround == 0) {
+					workaround=1;
+					av_mute_on();
+					initialize_raptor();
+					set_EDID_ready(FALSE);
+					setup_audio_video();
+					av_mute_off();
+				}
+			}
+#endif
+			}
+		}
+
+		// AD9889 reverts to defaults on powerdown, so it is reinitialized every HPD
+		if ((interrupt_registers[0] & 0x80))
+		{
+			handle_hpd_interrupt();
+			set_EDID_ready(FALSE);
+#if defined(HDCP_OPTION)
+			set_hdcp_hdcp_enabled(FALSE);
+			set_hdcp_hdcp_requested(FALSE);
+			set_hdcp_status(FALSE);
+#endif
+			edid_block_map_offset = 0;
+			interrupt_code |= HPD_INT;
+		}
+
+		// check for EDID ready flag, then call EDID Handler
+		if ((interrupt_registers[0] & 0x04))
+		{
+			if (!edid_reading_complete())
+			{
+				DEBUG_MESSAGE("processing EDID...\n");
+				next_segment = handle_edid_interrupt();
+				interrupt_code |= EDID_INT;
+			}
+		}
+
+		// verify BKSV
+#if defined(HDCP_OPTION)
+		if (interrupt_registers[1]&0x40)
+		{
+			handle_bksv_ready_interrupt();
+			interrupt_code |= HDCP_INT;
+		}
+#endif
+
+		// re-enable the interrupt before requesting additional EDID
+		i2c_write_bytes(AD9889_ADDRESS, 0x96, interrupt_registers, 2);
+
+		// if final EDID interrupt was processed tell system that EDID is ready and
+		// initiate audio video setup
+		if (interrupt_code&EDID_INT)
+		{
+			// setup_audio_video();
+			DEBUG_MESSAGE_1("next segment is %d\n",edid_block_map_offset + next_segment);
+
+			if (next_segment==0)
+			{
+				av_mute_on();
+				initialize_raptor();
+				set_EDID_ready(TRUE);
+				setup_audio_video();
+				av_mute_off();
+			}
+			else
+			{
+				ADI89_SET_EDID_SEGMENT(edid_block_map_offset+next_segment);
+			}
+			if (next_segment==0x40)
+			{
+				edid_block_map_offset=0x40;
+			}
+		}
+
+		// Check to see if additional interrupts occured during processing
+		i2c_read_bytes(AD9889_ADDRESS, 0x96, interrupt_remain, 2);
+	}
+
+	return interrupt_code;
+}
+
+/*
+ * Every 2 seconds this function is called.  The HDMI and HDCP leds are updated.
+ * If HDCP is supposed to be enabled, the status is checked.
+ */
+#if defined(HDCP_OPTION)
+void timer_2_second_handler(void)
+{
+	timer_count++;
+
+	if ((get_hdcp_hdcp_requested()==TRUE) && (get_hdcp_status()==FALSE))
+	{
+		hdcp_check_count++;
+		if (hdcp_check_count == 16)
+		{
+			// disable hdcp so it will reset
+			DEBUG_MESSAGE("disabling hdcp");
+			disable_hdcp();
+			hdcp_check_count = 0;
+		}
+
+		DEBUG_MESSAGE("check hdcp");
+
+		if (ADI89_GET_HDCP_CONTROLLER_STATE==4)
+		{
+			set_hdcp_status(TRUE);
+			compare_bksvs();
+		}
+	}
+
+	if (timer_count == TIMER_CALLS_PER_2_SEC)
+	{
+		timer_count = 0;
+
+		//DEBUG_MESSAGE("tick");
+
+		if ((get_hdcp_hdcp_enabled()) && (!ADI89_GET_ENC_ON) && ADI89_GET_RX_SENSE)
+		{
+			ERROR_MESSAGE("Unexpected loss of HDCP, Stop audio/video transmission and reauthenticate\n");
+			ADI89_SET_HDCP_DESIRED(1);
+			set_hdcp_status(FALSE);
+			set_hdcp_hdcp_enabled(FALSE);
+			set_hdcp_hdcp_requested(TRUE);
+			error_callback_function(0x10);
+		}
+	}
+}
+#endif
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/adi9889/AD9889_setup.h
+++ linux-mvl-dove-2.6.32/drivers/video/display/adi9889/AD9889_setup.h
@@ -0,0 +1,222 @@
+/******************************************************************************
+*                                                                             *
+* License Agreement                                                           *
+*                                                                             *
+* Copyright (c) 2006 Analog Devices Inc.                                      *
+* All rights reserved.                                                        *
+*                                                                             *
+* This source code is intended for the recipient only under the guidelines of *
+* the non-disclosure agreement with Analog Devices Inc.                       *
+*                                                                             *
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR  *
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,    *
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE *
+* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER      *
+* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING     *
+* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER         *
+* DEALINGS IN THE SOFTWARE.                                                   *
+*                                                                             *
+*                                                                             *
+* This software is intended for use with the AD9889A and derivative parts only*
+*																		                                          *
+******************************************************************************/
+
+/******************************************************************************
+*                                                                             *
+* THIS IS A READ-ONLY SOURCE FILE. DO NOT EDIT IT DIRECTLY.                   *
+* Author: Matthew McCarn (matthew.mccarn@analog.com)                          *
+* Date: May 16, 2006                                                          *
+*                                                                             *
+******************************************************************************/
+
+#ifndef _RAPTOR_SETUP_H_
+#define _RAPTOR_SETUP_H_
+
+#include "type_def.h"
+#include "ad9889_macros.h"
+
+enum mytiming
+{
+	AD9889_480i,
+	AD9889_720_480p,
+	AD9889_720p,
+	AD9889_1080i,
+	AD9889_640_480p,
+};
+
+typedef enum mytiming Timing;
+
+enum mycolorspace
+{
+	RGB,
+	YCbCr601,
+	YCbCr709,
+};
+
+typedef enum mycolorspace Colorspace;
+
+enum myrange
+{
+	AD9889_0_255,
+	AD9889_16_235,
+};
+
+typedef enum myrange Range;
+
+enum myaspectratio
+{
+	_4x3,
+	_16x9,
+};
+
+typedef enum myaspectratio AspectRatio;
+
+enum mysamplingfrequency
+{
+	_32k,
+	_44k,
+	_48k,
+	_88k,
+	_96k,
+	_176k,
+	_192k,
+};
+
+typedef enum mysamplingfrequency SamplingFrequency;
+
+enum myaudioinputmode
+{
+	SPDIF,
+	I2S,
+	I2S_LEFT,
+	I2S_RIGHT,
+};
+
+typedef enum myaudioinputmode AudioInputMode;
+
+struct aviinfoframe
+{
+	DEPLINT	active_format;
+	DEPLINT	bar_info;
+	DEPLINT	scan_info;
+	DEPLINT	colorimetry;
+	DEPLINT	non_unif_pic_scaling;
+	DEPLINT	active_fmt_asp_rat;
+	DEPLINT	active_line_start;
+	DEPLINT	active_line_end;
+	DEPLINT	active_pixel_start;
+	DEPLINT	active_pixel_end;
+};
+
+typedef struct aviinfoframe * AVIInfoframe;
+
+struct audioinfoframe
+{
+	DEPLINT	down_mix_inh;
+	DEPLINT	level_shift;
+};
+
+typedef struct audioinfoframe * AudioInfoframe;
+
+struct spdpacket
+{
+	BYTE	*spd_byte_1to25;
+};
+
+typedef struct spdpacket * SPDPacket;
+
+struct mpegpacket
+{
+	BYTE	*mpeg_byte_0to3;
+	DEPLINT	frame_repeat;
+	DEPLINT	frame_indicator;
+};
+
+typedef struct mpegpacket * MPEGPacket;
+
+struct acppacket
+{
+	DEPLINT	acp_type;
+	DEPLINT	acp_byte_1;
+};
+
+typedef struct acppacket * ACPPacket;
+
+struct isrcpacket
+{
+	DEPLINT	isrc_continued;
+	DEPLINT	isrc_valid;
+	DEPLINT	isrc_status;
+	BYTE	*isrc_1;
+	BYTE	*isrc_2;
+};
+
+typedef struct isrcpacket * ISRCPacket;
+
+void initialize_raptor(void);
+void set_spdif_audio(void);
+void adi9889_early_setup(void);
+void hdmi_or_dvi(void);
+DEPLINT handle_edid_interrupt(void);
+void handle_bksv_ready_interrupt(void);
+void handle_hpd_interrupt(void);
+void enable_hdcp(void);
+void disable_hdcp(void);
+BOOL get_hdcp_status(void);
+void set_hdcp_status(BOOL);
+BOOL get_hdcp_hdcp_requested(void);
+void set_hdcp_hdcp_requested(BOOL);
+BOOL get_hdcp_hdcp_enabled(void);
+void set_hdcp_hdcp_enabled(BOOL);
+BOOL get_hdmi_status(void);
+void compare_bksvs(void);
+
+//since a polling function is needed
+
+void initialize_ad9889_i2c(DEPLINT (*)(DEPLINT, DEPLINT, BYTE *, DEPLINT), DEPLINT (*)(DEPLINT, DEPLINT, BYTE *, DEPLINT));
+void initialize_error_callback(void (*error_function)(int));
+
+extern void (*error_callback_function)(int);
+extern DEPLINT (*i2c_write_bytes)(DEPLINT dev_addr_in, DEPLINT reg_addr_in, BYTE *data_in, DEPLINT count_in);
+extern DEPLINT (*i2c_read_bytes)(DEPLINT dev_addr_in, DEPLINT reg_addr_in, BYTE *data_out, DEPLINT count_in);
+
+BOOL is_repeater(void);
+BOOL edid_reading_complete(void);
+void set_EDID_ready(BOOL value);
+void set_video_mode(Timing video_timing, Colorspace colorspace_in, Range colorspace_range, AspectRatio aspect_ratio);
+void set_input_format(DEPLINT input_format, DEPLINT input_style, DEPLINT input_bit_width, DEPLINT clock_edge);
+void set_audio_mode(SamplingFrequency sampling_frequency, DEPLINT bit_width, DEPLINT channel_count, DEPLINT channel_map);
+void set_audio_format(AudioInputMode input_mode);
+void force_hdmi(BOOL hdmi);
+void clear_interrupts(void);
+void set_MCLK_ratio(DEPLINT val);
+void set_avi_if(AVIInfoframe info);
+void set_audio_if(AudioInfoframe info);
+void set_spd_packet(SPDPacket info);
+void set_mpeg_packet(MPEGPacket info);
+void set_acp_packet(ACPPacket info);
+void set_isrc_packet(ISRCPacket info);
+void set_sync_params(DEPLINT h_dur, DEPLINT h_fp, DEPLINT v_dur, DEPLINT v_fp,DEPLINT h_hpol,DEPLINT v_pol);
+void set_clock_delay(DEPLINT setting);
+void input_data_clock_2x(BOOL value);
+DEPLINT get_version(void);
+
+void av_mute_on(void);
+void av_mute_off(void);
+
+void AD9889_reset(void);
+void AD9889_audio_mute(BOOL val);
+void enable_sync_gen(BOOL val);
+void enable_de_gen(BOOL val);
+void set_de_params(DEPLINT h_delay, DEPLINT v_delay, DEPLINT int_offset,DEPLINT act_width,DEPLINT act_height);
+
+BOOL check_Rx_sense(void);
+BOOL query_vid(DEPLINT vid);
+BOOL query_colorspace_in(Colorspace colorspace_in);
+BOOL query_aspect_ratio(AspectRatio aspect_ratio);
+BOOL query_sampling_frequency(SamplingFrequency sampling_frequency);
+BOOL query_bit_width(DEPLINT bit_width);
+BOOL query_channel_count(DEPLINT channel_count);
+BOOL query_channel_map(DEPLINT channel_map);
+
+#endif //_RAPTOR_SETUP_H_
--- linux-mvl-dove-2.6.32.orig/drivers/video/display/adi9889/reg_handler.c
+++ linux-mvl-dove-2.6.32/drivers/video/display/adi9889/reg_handler.c
@@ -0,0 +1,90 @@
+//#include <stdio.h>
+#include "reg_handler.h"
+#include "ad9889_macros.h"
+
+extern DEPLINT (*i2c_write_bytes)(DEPLINT dev_addr_in, DEPLINT reg_addr_in, BYTE *data_in, DEPLINT count_in);
+extern DEPLINT (*i2c_read_bytes)(DEPLINT dev_addr_in, DEPLINT reg_addr_in, BYTE *data_out, DEPLINT count_in);
+
+
+DEPLINT adi_get_i2c_reg(BYTE dev_add, DEPLINT reg_add, BYTE mask_reg0, DEPLINT bit2shift)
+{
+	BYTE x;
+
+	i2c_read_bytes(dev_add, reg_add, &x, 1);
+	
+	return ((DEPLINT) x & mask_reg0) >> bit2shift;
+}
+
+
+void adi_set_i2c_reg(BYTE dev_add, DEPLINT reg_add, BYTE mask_reg0, DEPLINT bit2shift, DEPLINT val)
+{
+	BYTE x;
+  
+	i2c_read_bytes(dev_add, reg_add, &x, 1);
+         
+	x = (x & ~mask_reg0) | (BYTE)((val<<bit2shift) & mask_reg0);
+         
+	i2c_write_bytes(dev_add, reg_add, &x, 1);
+}
+
+
+DEPLINT adi_get_i2c_reg_mult(BYTE dev_add, DEPLINT reg_add, BYTE mask_reg0, BYTE mask_reg1, DEPLINT bit2shift, DEPLINT bytes)
+{
+         
+	BYTE x[MAX_BYTES];
+	DEPLINT i;
+	DEPLINT val = 0;
+
+	for (i = 0; i < MAX_BYTES; i++)
+		x[i] = 0;
+
+	i2c_read_bytes(dev_add, reg_add, x, bytes);
+	
+	for(i = 0; i < bytes; i++)
+	{
+		
+		if(i == (bytes-1))
+		{
+			val += ((DEPLINT) x[i] & mask_reg1) >> bit2shift;
+		}
+		else
+		{
+			val += ((DEPLINT) x[i] & mask_reg0) << (8*(bytes-i-1)-bit2shift);
+		}
+	}
+	return val;
+}
+
+
+void adi_set_i2c_reg_mult(BYTE dev_add, DEPLINT reg_add, BYTE mask_reg0, BYTE mask_reg1, DEPLINT bit2shift, DEPLINT bytes, DEPLINT val)
+{
+	BYTE x[MAX_BYTES];
+	DEPLINT i;
+
+	for (i = 0; i < MAX_BYTES; i++)
+		x[i] = 0;
+
+	i2c_read_bytes(dev_add, reg_add, x, bytes);
+	
+	for (i = 0; i < bytes; i++)
+	{
+		//lsb
+		if(i == (bytes-1))
+		{
+			x[i] = (x[i] & ~mask_reg1) | ((val<<bit2shift) & mask_reg1);
+		}
+		//msb
+		else if(i == 0)
+		{
+			x[i] = (x[i] & ~mask_reg0) | (val>>(8*(bytes-1)-bit2shift)&mask_reg0);
+		}
+		//middle
+		else
+		{
+			x[i] = x[i] | (val>>(8*(bytes-i-1)-bit2shift));
+				
+		}
+	}
+
+	i2c_write_bytes(AD9889_ADDRESS, reg_add, x, bytes);
+}
--- linux-mvl-dove-2.6.32.orig/drivers/video/matrox/g450_pll.c
+++ linux-mvl-dove-2.6.32/drivers/video/matrox/g450_pll.c
@@ -368,7 +368,8 @@
 					M1064_XDVICLKCTRL_C1DVICLKEN |
 					M1064_XDVICLKCTRL_DVILOOPCTL |
 					M1064_XDVICLKCTRL_P1LOOPBWDTCTL;
-				matroxfb_DAC_out(minfo, M1064_XDVICLKCTRL, tmp);
+                                /* Setting this breaks PC systems so don't do it */
+				/* matroxfb_DAC_out(minfo, M1064_XDVICLKCTRL, tmp); */
 				matroxfb_DAC_out(minfo, M1064_XPWRCTRL,
 						 xpwrctrl);
 
--- linux-mvl-dove-2.6.32.orig/drivers/video/sis/sis_main.c
+++ linux-mvl-dove-2.6.32/drivers/video/sis/sis_main.c
@@ -1701,6 +1701,9 @@
 		break;
 
 	   case FBIOGET_VBLANK:
+
+		memset(&sisvbblank, 0, sizeof(struct fb_vblank));
+
 		sisvbblank.count = 0;
 		sisvbblank.flags = sisfb_setupvbblankflags(ivideo, &sisvbblank.vcount, &sisvbblank.hcount);
 
--- linux-mvl-dove-2.6.32.orig/drivers/video/backlight/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/video/backlight/Kconfig
@@ -148,6 +148,14 @@
 	  known as the Corgi backlight driver. If you have a Sharp Zaurus
 	  SL-C7xx, SL-Cxx00 or SL-6000x say y.
 
+config BACKLIGHT_DOVE
+	tristate "Marvell Dove LCD/Backlight Driver"
+	depends on BACKLIGHT_CLASS_DEVICE && FB_DOVE_CLCD
+	select LCD_CLASS_DEVICE
+	default n
+	help
+	  Say y to enable the Marvell Dove LCD/Backlight driver.
+
 config BACKLIGHT_LOCOMO
 	tristate "Sharp LOCOMO LCD/Backlight Driver"
 	depends on BACKLIGHT_CLASS_DEVICE && SHARP_LOCOMO
--- linux-mvl-dove-2.6.32.orig/drivers/video/backlight/dove_bl.c
+++ linux-mvl-dove-2.6.32/drivers/video/backlight/dove_bl.c
@@ -0,0 +1,364 @@
+/*
+ * linux/drivers/backlight/dove_bl.c -- Marvell DOVE LCD Backlight driver.
+ *
+ * Copyright (C) Marvell Semiconductor Company.  All rights reserved.
+ *
+ * Written by Shadi Ammouri <shadi@marvell.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive for
+ * more details.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/mutex.h>
+#include <linux/fb.h>
+#include <linux/backlight.h>
+#include <linux/lcd.h>
+#include <linux/clk.h>
+#include <video/dovefbreg.h>
+#include <mach/dove_bl.h>
+
+#define DOVEBL_BL_DIV	     0x146	/* 100Hz */
+
+struct dove_backlight {
+	int powermode;          /* blacklight */
+	int lcd_powermode;      /* lcd panel */
+	int current_intensity;
+
+	struct clk *clk;
+	void *lcdpwr_reg;
+	void *blpwr_reg;
+	void *btn_reg;
+	struct device *dev;
+	struct dovebl_platform_data platform_data;
+
+	unsigned long lcd_mask;		/* mask */
+	unsigned long lcd_on;		/* value to enable lcd power */
+	unsigned long lcd_off;		/* value to disable lcd power */
+
+	unsigned long blpwr_mask;	/* mask */
+	unsigned long blpwr_on;		/* value to enable bl power */
+	unsigned long blpwr_off;	/* value to disable bl power */
+
+	unsigned long btn_mask;	/* mask */
+	unsigned long btn_level;	/* how many level can be configured. */
+	unsigned long btn_min;	/* min value */
+	unsigned long btn_max;	/* max value */
+	unsigned long btn_inc;	/* increment */
+
+};
+
+void dovebl_config_reg(unsigned long *reg, unsigned long mask, unsigned long value)
+{
+	unsigned int x;
+	volatile unsigned long* addr;
+
+	addr = reg;
+	x = *addr;
+	x &= ~(mask);	/* clear */
+	x |= value;
+	*addr = x;
+}
+
+static int dovebl_update_status(struct backlight_device *dev)
+{
+	struct dove_backlight *bl = dev_get_drvdata(&dev->dev);
+	u32 brightness = dev->props.brightness;
+
+	if ((dev->props.power != FB_BLANK_UNBLANK) ||
+		(dev->props.fb_blank != FB_BLANK_UNBLANK) ||
+		(bl->powermode == FB_BLANK_POWERDOWN)) {
+		brightness = 0;
+	} else {
+		/*
+		 * brightness = 0 is 1 in the duty cycle in order not to
+		 * fully shutdown the backlight. framework check max
+		 * automatically.
+		 */
+		if (bl->btn_min > brightness) {
+			brightness = bl->btn_min;
+			printk(KERN_WARNING "brightness level is too small, "
+				"use min value\n");
+		}
+	}
+	
+	if (bl->current_intensity != brightness) {
+		dovebl_config_reg(bl->btn_reg,
+			bl->btn_mask,
+			(bl->btn_inc*brightness*0x10000000)); 
+		bl->current_intensity = brightness;
+
+		if (brightness != 0) {
+			/* Set backlight power on. */
+			dovebl_config_reg(bl->blpwr_reg,
+			    bl->blpwr_mask,
+			    bl->blpwr_on);
+			printk( KERN_INFO "backlight power on\n");
+		} else {
+			/* Set backlight power down. */
+			dovebl_config_reg(bl->blpwr_reg,
+			    bl->blpwr_mask,
+			    bl->blpwr_off);
+			printk( KERN_INFO "backlight power down\n");
+		}
+	}
+
+	return 0;
+}
+
+static int dovebl_get_brightness(struct backlight_device *dev)
+{
+	struct dove_backlight *bl = dev_get_drvdata(&dev->dev);
+
+	return bl->current_intensity;
+}
+
+
+static struct backlight_ops dovebl_ops = {
+	.get_brightness = dovebl_get_brightness,
+	.update_status  = dovebl_update_status,
+};
+
+#ifdef CONFIG_PM
+static int dovebl_suspend(struct platform_device *pdev, pm_message_t state)
+{
+	struct backlight_device *bd = platform_get_drvdata(pdev);
+	struct dove_backlight *bl = bl_get_data(bd);
+
+	bl->powermode = FB_BLANK_POWERDOWN;
+	backlight_update_status(bd);
+	clk_disable(bl->clk);
+
+	return 0;
+}
+
+static int dovebl_resume(struct platform_device *pdev)
+{
+	struct backlight_device *bd = platform_get_drvdata(pdev);
+	struct dove_backlight *bl = bl_get_data(bd);
+
+
+	clk_enable(bl->clk);
+
+	bl->powermode = FB_BLANK_UNBLANK;
+	backlight_update_status(bd);
+
+	return 0;
+}
+#endif
+
+static int dove_lcd_get_power(struct lcd_device *ld)
+{
+	struct dove_backlight *bl = lcd_get_data(ld);
+
+	return bl->lcd_powermode;
+}
+
+/* Enable or disable power to the LCD (0: on; 4: off, see FB_BLANK_XXX) */
+static int dove_lcd_set_power(struct lcd_device *ld, int power)
+{
+	struct dove_backlight *bl = lcd_get_data(ld);
+
+	switch (power) {
+	case FB_BLANK_UNBLANK:          /* 0 */
+		/* Set LCD panel power on. */
+		dovebl_config_reg(bl->lcdpwr_reg, bl->lcd_mask, bl->lcd_on);
+		printk(KERN_INFO "panel power on(FB_BLANK_UNBLANK)\n");
+		break;
+	case FB_BLANK_POWERDOWN:        /* 4 */
+		/* Set LCD panel power down. */
+		dovebl_config_reg(bl->lcdpwr_reg, bl->lcd_mask, bl->lcd_off);
+		printk(KERN_INFO "panel power down(FB_BLANK_POWERDOWN)\n");
+		break;
+	case FB_BLANK_NORMAL:
+	case FB_BLANK_VSYNC_SUSPEND:
+	case FB_BLANK_HSYNC_SUSPEND:
+		/* Set LCD panel power down. */
+		dovebl_config_reg(bl->lcdpwr_reg,
+			bl->lcd_mask,
+			bl->lcd_off);
+
+		printk(KERN_INFO "panel power down(FB_BLANK_NORMAL)\n");
+		break;
+
+	default:
+		return -EIO;
+	}
+
+	bl->lcd_powermode = power;
+
+	return 0;
+}
+
+static struct lcd_ops dove_lcd_ops = {
+	.get_power      = dove_lcd_get_power,
+	.set_power      = dove_lcd_set_power,
+};
+
+static int dovebl_probe(struct platform_device *pdev)
+{
+	struct backlight_device *dev;
+	struct dove_backlight *bl;
+	struct lcd_device *ldp;
+	struct dovebl_platform_data *dbm = pdev->dev.platform_data;
+	struct resource *res;
+
+	if (!dbm)
+		return -ENXIO;
+
+	bl = kzalloc(sizeof(struct dove_backlight), GFP_KERNEL);
+	if (bl == NULL)
+		return -ENOMEM;
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (res == NULL) {
+		kfree(bl);
+		return -EINVAL;
+	}
+
+	/* Get lcd power control reg. */
+	if (0 == dbm->lcd_mapped) 
+		bl->lcdpwr_reg = ioremap_nocache(dbm->lcd_start,
+			dbm->lcd_end - dbm->lcd_start);
+	else
+		bl->lcdpwr_reg = (void *)dbm->lcd_start;
+
+	if (bl->lcdpwr_reg == NULL) {
+		printk(KERN_ERR "Can't map lcd power control reg\n");
+		kfree(bl);
+		return -ENOMEM;
+	}
+	bl->lcdpwr_reg += dbm->lcd_offset;
+
+	/* Get backlight power control reg. */
+	if (0 == dbm->blpwr_mapped) 
+		bl->blpwr_reg = ioremap_nocache(dbm->blpwr_start,
+			dbm->blpwr_end - dbm->blpwr_start);
+	else
+		bl->blpwr_reg = (void*)dbm->blpwr_start;
+		
+	if (bl->blpwr_reg == NULL) {
+		kfree(bl);
+		return -ENOMEM;
+	}
+	bl->blpwr_reg += dbm->blpwr_offset;
+
+	/* Get brightness control reg. */
+	if (0 == dbm->btn_mapped) 
+		bl->btn_reg = ioremap_nocache(dbm->btn_start,
+			dbm->btn_end - dbm->btn_start);
+	else
+		bl->btn_reg = (void*)dbm->btn_start;
+	
+	if (bl->btn_reg == NULL) {
+		kfree(bl);
+		return -ENOMEM;
+	}
+	bl->btn_reg += dbm->btn_offset;
+
+	dev = backlight_device_register("dove-bl", &pdev->dev, bl, &dovebl_ops);
+	if (IS_ERR(dev)) {
+		iounmap(bl->btn_reg);
+		iounmap(bl->blpwr_reg);
+		iounmap(bl->lcdpwr_reg);
+		kfree(bl);
+		return PTR_ERR(dev);
+	}
+
+	if (dbm->gpio_pm_control) {
+		ldp = lcd_device_register("dove-lcd", &pdev->dev, bl,
+					  &dove_lcd_ops);
+		if (IS_ERR(ldp))
+			return PTR_ERR(ldp);
+	}
+
+	bl->powermode = FB_BLANK_UNBLANK;
+	bl->lcd_powermode = FB_BLANK_UNBLANK;
+	bl->platform_data = *dbm;
+	bl->dev = &pdev->dev;
+
+        bl->lcd_mask	= dbm->lcd_mask;
+	bl->lcd_on	= dbm->lcd_on;
+        bl->lcd_off	= dbm->lcd_off;
+
+	bl->blpwr_mask	= dbm->blpwr_mask;
+	bl->blpwr_on	= dbm->blpwr_on;
+	bl->blpwr_off	= dbm->blpwr_off;
+
+	bl->btn_mask	= dbm->btn_mask;
+	bl->btn_level	= dbm->btn_level;
+	bl->btn_min	= dbm->btn_min;
+	bl->btn_max	= dbm->btn_max;
+	bl->btn_inc	= dbm->btn_inc;
+
+	platform_set_drvdata(pdev, dev);
+
+	/* Get LCD clock information. */
+	bl->clk = clk_get(&pdev->dev, "LCDCLK");
+
+	dev->props.fb_blank = FB_BLANK_UNBLANK;
+	dev->props.max_brightness = dbm->btn_max;
+	dev->props.brightness = dbm->default_intensity;
+
+	/* set default PWN to 100Hz. */
+	dovebl_config_reg(bl->btn_reg,
+			0x0FFF0000,
+			(DOVEBL_BL_DIV << 16)); 
+
+	printk(KERN_INFO "Dove Backlight Driver start power on sequence.\n");
+	/* power on backlight and set default brightness */
+	dovebl_update_status(dev);
+
+	/* power on LCD panel. */
+	printk(KERN_INFO "first time to"
+		"panel power on(FB_BLANK_UNBLANK)\n");
+	dovebl_config_reg(bl->lcdpwr_reg, bl->lcd_mask, bl->lcd_on);
+
+	printk(KERN_INFO "Dove Backlight Driver Initialized.\n");
+	return 0;
+}
+
+static int dovebl_remove(struct platform_device *pdev)
+{
+	struct backlight_device *dev = platform_get_drvdata(pdev);
+	struct dove_backlight *bl = dev_get_drvdata(&dev->dev);
+
+	backlight_device_unregister(dev);
+	kfree(bl);
+
+	printk(KERN_INFO "Dove Backlight Driver Unloaded\n");
+	return 0;
+}
+
+static struct platform_driver dovebl_driver = {
+	.probe		= dovebl_probe,
+	.remove		= dovebl_remove,
+#ifdef CONFIG_PM
+	.suspend	= dovebl_suspend,
+	.resume		= dovebl_resume,
+#endif
+	.driver		= {
+		.name	= "dove-bl",
+	},
+};
+
+static int __init dovebl_init(void)
+{
+	return platform_driver_register(&dovebl_driver);
+}
+
+static void __exit dovebl_exit(void)
+{
+	platform_driver_unregister(&dovebl_driver);
+}
+
+module_init(dovebl_init);
+module_exit(dovebl_exit);
+
+MODULE_AUTHOR("Shadi Ammouri <shadi@marvell.com>");
+MODULE_DESCRIPTION("Dove Backlight Driver");
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/drivers/video/backlight/mbp_nvidia_bl.c
+++ linux-mvl-dove-2.6.32/drivers/video/backlight/mbp_nvidia_bl.c
@@ -139,6 +139,51 @@
 static const struct dmi_system_id __initdata mbp_device_table[] = {
 	{
 		.callback	= mbp_dmi_match,
+		.ident		= "MacBook 1,1",
+		.matches	= {
+			DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
+			DMI_MATCH(DMI_PRODUCT_NAME, "MacBook1,1"),
+		},
+		.driver_data	= (void *)&intel_chipset_data,
+	},
+	{
+		.callback	= mbp_dmi_match,
+		.ident		= "MacBook 2,1",
+		.matches	= {
+			DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
+			DMI_MATCH(DMI_PRODUCT_NAME, "MacBook2,1"),
+		},
+		.driver_data	= (void *)&intel_chipset_data,
+	},
+	{
+		.callback	= mbp_dmi_match,
+		.ident		= "MacBook 3,1",
+		.matches	= {
+			DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
+			DMI_MATCH(DMI_PRODUCT_NAME, "MacBook3,1"),
+		},
+		.driver_data	= (void *)&intel_chipset_data,
+	},
+	{
+		.callback	= mbp_dmi_match,
+		.ident		= "MacBook 4,1",
+		.matches	= {
+			DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
+			DMI_MATCH(DMI_PRODUCT_NAME, "MacBook4,1"),
+		},
+		.driver_data	= (void *)&intel_chipset_data,
+	},
+	{
+		.callback	= mbp_dmi_match,
+		.ident		= "MacBook 4,2",
+		.matches	= {
+			DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
+			DMI_MATCH(DMI_PRODUCT_NAME, "MacBook4,2"),
+		},
+		.driver_data	= (void *)&intel_chipset_data,
+	},
+	{
+		.callback	= mbp_dmi_match,
 		.ident		= "MacBookPro 3,1",
 		.matches	= {
 			DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
@@ -227,6 +272,24 @@
 		},
 		.driver_data	= (void *)&nvidia_chipset_data,
 	},
+	{
+		.callback	= mbp_dmi_match,
+		.ident		= "MacBookAir 3,1",
+		.matches	= {
+			DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
+			DMI_MATCH(DMI_PRODUCT_NAME, "MacBookAir3,1"),
+		},
+		.driver_data	= (void *)&nvidia_chipset_data,
+	},
+	{
+		.callback	= mbp_dmi_match,
+		.ident		= "MacBookAir 3,2",
+		.matches	= {
+			DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
+			DMI_MATCH(DMI_PRODUCT_NAME, "MacBookAir3,2"),
+		},
+		.driver_data	= (void *)&nvidia_chipset_data,
+	},
 	{ }
 };
 
--- linux-mvl-dove-2.6.32.orig/drivers/video/backlight/Makefile
+++ linux-mvl-dove-2.6.32/drivers/video/backlight/Makefile
@@ -15,6 +15,7 @@
 obj-$(CONFIG_BACKLIGHT_ATMEL_PWM)    += atmel-pwm-bl.o
 obj-$(CONFIG_BACKLIGHT_GENERIC)	+= generic_bl.o
 obj-$(CONFIG_BACKLIGHT_HP700)	+= jornada720_bl.o
+obj-$(CONFIG_BACKLIGHT_DOVE)	+= dove_bl.o
 obj-$(CONFIG_BACKLIGHT_HP680)	+= hp680_bl.o
 obj-$(CONFIG_BACKLIGHT_LOCOMO)	+= locomolcd.o
 obj-$(CONFIG_BACKLIGHT_OMAP1)	+= omap1_bl.o
--- linux-mvl-dove-2.6.32.orig/drivers/video/backlight/backlight.c
+++ linux-mvl-dove-2.6.32/drivers/video/backlight/backlight.c
@@ -196,12 +196,12 @@
 {
 	struct backlight_device *bd = to_backlight_device(dev);
 
-	if (bd->ops->options & BL_CORE_SUSPENDRESUME) {
-		mutex_lock(&bd->ops_lock);
+	mutex_lock(&bd->ops_lock);
+	if (bd->ops && bd->ops->options & BL_CORE_SUSPENDRESUME) {
 		bd->props.state |= BL_CORE_SUSPENDED;
 		backlight_update_status(bd);
-		mutex_unlock(&bd->ops_lock);
 	}
+	mutex_unlock(&bd->ops_lock);
 
 	return 0;
 }
@@ -210,12 +210,12 @@
 {
 	struct backlight_device *bd = to_backlight_device(dev);
 
-	if (bd->ops->options & BL_CORE_SUSPENDRESUME) {
-		mutex_lock(&bd->ops_lock);
+	mutex_lock(&bd->ops_lock);
+	if (bd->ops && bd->ops->options & BL_CORE_SUSPENDRESUME) {
 		bd->props.state &= ~BL_CORE_SUSPENDED;
 		backlight_update_status(bd);
-		mutex_unlock(&bd->ops_lock);
 	}
+	mutex_unlock(&bd->ops_lock);
 
 	return 0;
 }
--- linux-mvl-dove-2.6.32.orig/drivers/video/marvell/dovefb_if.h
+++ linux-mvl-dove-2.6.32/drivers/video/marvell/dovefb_if.h
@@ -0,0 +1,40 @@
+/*
+ * linux/drivers/video/marvell/dovefb_if.h -- Interface functions for Marvell
+ * GFX & Overlay FB drivers.
+ *
+ * Copyright (C) Marvell Semiconductor Company.  All rights reserved.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive for
+ * more details.
+ *
+ */
+
+
+int dovefb_gfx_handle_irq(u32 isr, struct dovefb_layer_info *dfli);
+int dovefb_gfx_init(struct dovefb_info *info, struct dovefb_mach_info *dmi);
+int dovefb_gfx_suspend(struct dovefb_layer_info *dfli, pm_message_t mesg);
+int dovefb_gfx_resume(struct dovefb_layer_info *dfli);
+
+int dovefb_ovly_handle_irq(u32 isr, struct dovefb_layer_info *dfli);
+int dovefb_ovly_init(struct dovefb_info *info, struct dovefb_mach_info *dmi);
+int dovefb_ovly_suspend(struct dovefb_layer_info *dfli, pm_message_t mesg);
+int dovefb_ovly_resume(struct dovefb_layer_info *dfli);
+
+int dovefb_determine_best_pix_fmt(struct fb_var_screeninfo *var,
+		struct dovefb_layer_info *dfli);
+unsigned int dovefb_dump_regs(struct dovefb_info *dfi);
+int dovefb_check_var(struct fb_var_screeninfo *var, struct fb_info *fi);
+int dovefb_setcolreg(unsigned int regno, unsigned int red, unsigned int green,
+		unsigned int blue, unsigned int trans, struct fb_info *fi);
+void dovefb_set_pix_fmt(struct fb_var_screeninfo *var, int pix_fmt);
+void dovefb_set_mode(struct dovefb_layer_info *dfli,
+		struct fb_var_screeninfo *var, struct fb_videomode *mode,
+		int pix_fmt, int ystretch);
+
+
+extern struct fb_ops dovefb_gfx_ops;
+extern struct fb_ops dovefb_ovly_ops;
+extern struct timer_list checkbuf_timer;
+
+
--- linux-mvl-dove-2.6.32.orig/drivers/video/marvell/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/video/marvell/Kconfig
@@ -0,0 +1,214 @@
+config FB_DOVE
+	bool "Marvell LCD controller"
+	depends on FB && ARCH_DOVE
+	help
+	  Support for Marvell Dove SoC LCD controller.
+
+config FB_DOVE_CONSISTENT_DMA_SIZE
+	int "Consistent DMA memory size (MB)"
+	depends on FB_DOVE && (FB_DOVE_CLCD || FB_DOVE_CLCD1)
+	range 2 46
+	default 46
+	help
+	  Increase the DMA consistent memory size according to your video
+	  memory needs.
+	  The size must be 2MB aligned.
+
+config FB_DOVE_CLCD
+	tristate "Marvell DOVE Color LCD support"
+	depends on FB && ARM && FB_DOVE
+	select FB_CFB_FILLRECT
+	select FB_CFB_COPYAREA
+	select FB_CFB_IMAGEBLIT
+	---help---
+	Marvell DOVE Color LCD. If not sure, say N. If want to config 
+	resolution, please use bootargs, e.g. dovefb:640x480-16@60.
+
+menu "LCD0 I2C setting"
+	depends on FB_DOVE && FB_DOVE_CLCD
+
+config FB_DOVE_CLCD0_I2C_DEFAULT_SETTING
+	bool "Use LCD0 I2C default setting"
+	default y
+	---help---
+	LCD0 I2C default setting: use I2C channel 1 and I2C address 0x3F
+	to get EDID data.
+
+config FB_DOVE_CLCD0_I2C_CHANNEL
+	int "Set I2C Channel"
+	depends on !FB_DOVE_CLCD0_I2C_DEFAULT_SETTING
+	range 0 2
+	default 1
+	---help---
+	You can set I2C channel number between 0~2.
+
+config FB_DOVE_CLCD0_I2C_ADDRESS
+	hex "Set I2C Address"
+	depends on !FB_DOVE_CLCD0_I2C_DEFAULT_SETTING
+	range 0x0 0x7f
+	default 0x3f
+	---help---
+	You can set I2C address number between 0~0x7f
+
+endmenu
+
+config FB_DOVE_CLCD1
+	tristate "Marvell DOVE Secondary Color LCD support"
+	depends on FB && ARM && FB_DOVE
+	select FB_CFB_FILLRECT
+	select FB_CFB_COPYAREA
+	select FB_CFB_IMAGEBLIT
+	select FB_DOVE_DCON
+	---help---
+	Say Y here if your Secondary LCD panel is VGA. Default is N.
+
+menu "LCD1 I2C setting"
+	depends on FB_DOVE && FB_DOVE_CLCD1
+
+config FB_DOVE_CLCD1_I2C_DEFAULT_SETTING
+	bool "Use LCD1 I2C default setting"
+	default y
+	---help---
+	LCD1 I2C default setting: use I2C channel 1 and I2C address 0x50
+	to get EDID data.
+
+config FB_DOVE_CLCD1_I2C_CHANNEL
+	int "Set I2C Channel"
+	depends on !FB_DOVE_CLCD1_I2C_DEFAULT_SETTING
+	range 0 2
+	default 1
+	---help---
+	You can set I2C channel number between 0~2.
+
+config FB_DOVE_CLCD1_I2C_ADDRESS
+	hex "Set I2C Address"
+	depends on !FB_DOVE_CLCD1_I2C_DEFAULT_SETTING
+	range 0x0 0x7f
+	default 0x50
+	---help---
+	You can set I2C address number between 0~0x7f
+
+endmenu
+
+config FB_DOVE_CLCD_EDID
+	bool "Marvell DOVE read EDID utility"
+	depends on FB_DOVE
+	select I2C
+	select I2C_MV64XXX
+	select FB_DDC
+	select FB_MODE_HELPERS
+	---help---
+	Enable reading the EDID information of the screen. Default is N.
+
+config FB_DOVE_DCON
+	tristate "Marvell DOVE DCON support"
+	depends on ARM && FB_DOVE
+	---help---
+	Say Y here if want to enable DCON. (HW default bypass.)
+
+choice
+	depends on FB_DOVE && FB_DOVE_DCON
+	prompt "DOVE DCON Panel PortA" 
+	default FB_DOVE_CLCD_DCONA_BYPASS
+
+config FB_DOVE_CLCD_DCONA_BYPASS
+	bool "LCD0 Bypass"
+	help
+	  Marvell DOVE DCON LCD0 Bypass mode. Default is Y.
+
+config FB_DOVE_CLCD_DCONA_OLPC
+	bool "OLPC DCON Mode(Not support now)"
+	help
+	  Say Y here if your DCON is OLPC mode. Default is N.
+
+config FB_DOVE_CLCD_DCONA_DUALVIEW
+	bool "LCD0/1 dual view Mode(Not support now)"
+	help
+	  Say Y here if you have two LCD panel. Default is N.
+
+config FB_DOVE_CLCD_DCONA_MODE
+	bool "DCON Mode, LCD0 data (Not support now)"
+	help
+	  Say Y here if your DCON is DCON mode. Default is N.
+
+endchoice
+
+choice
+	depends on FB_DOVE && FB_DOVE_DCON
+	prompt "DOVE DCON Panel PortB"
+	default FB_DOVE_CLCD_DCONB_BYPASS1
+
+config FB_DOVE_CLCD_DCONB_BYPASS1
+	bool "LCD1 Bypass"
+	help
+	  Marvell DOVE DCON LCD1 Bypass mode. Default is Y.
+
+config FB_DOVE_CLCD_DCONB_BYPASS0
+	bool "LCD0 Bypass"
+	help
+	  Say Y here if your DCON is bypass LCD0. Default is N.
+
+endchoice
+
+menu "PLL clock speed when under inaccurate mode"
+	depends on FB_DOVE && (FB_DOVE_CLCD || FB_DOVE_CLCD1)
+
+config FB_DOVE_CLCD_SCLK_VALUE
+	int "PLL clock speed"
+	default "1000"
+	depends on (FB_DOVE_CLCD || FB_DOVE_CLCD1)
+	---help---
+	This paramter (in MHz) determines the source clock rate.
+	The default is 1000MHz(PLL). This value only is applied
+	when system is under inaccurate mode and two lcds use
+	PLL as refclk at the same time. The real frquency depends
+	on HW setting. Change this if you know how to set it.
+
+endmenu
+
+config FB_DOVE_CLCD_DEFAULT_OPTION
+	string "Default Dove FB kernel parameter"
+	depends on FB_DOVE && (FB_DOVE_CLCD || FB_DOVE_CLCD1)
+	default "lcd0:1280x768-24@60,lcd1:1024x768-16@60"
+
+config DOVEFB_DISPLAY_MODE
+	tristate "Support display configuration."
+	depends on FB_DOVE && FB_DOVE_CLCD && FB_DOVE_CLCD1
+	default n if ARCH_DOVE
+	---help---
+	Say Y here if you want to build driver into kernel. Default is N.
+
+config FB_DOVE_CLCD_FLAREON_GV
+	tristate "Marvell DOVE Color LCD - Flareon GV"
+	depends on FB_DOVE && (FB_DOVE_CLCD || FB_DOVE_CLCD1)
+	default y if ARCH_REALVIEW
+	---help---
+	Say Y here if your LCD version is on Flareon GV. Default is N.
+
+## Following is for MUSTANG LCD config
+config FB_MUSTANG_CLCD
+    tristate "Marvell Mustang Color LCD support"
+    default n
+    depends on FB_DOVE
+    select FB_CFB_FILLRECT
+    select FB_CFB_COPYAREA
+    select FB_CFB_IMAGEBLIT
+    ---help---
+    Marvell Mustang Color LCD. If not sure, say N.
+
+config FB_MUSTANG_QVGA
+    bool "Marvell Mustang Color LCD - QVGA"
+    default n
+    depends on FB_MUSTANG_CLCD
+    ---help---
+       Say Y here if your LCD panel is QVGA. Default is N.
+config FB_MUSTANG_LOW_REFLESH_RATE
+	bool "Lower Reflesh Rate of LCD DMA"
+	default n
+	depends on FB_MUSTANG_CLCD
+	help
+	  Say Y if you are using Tahoe FPGA System
+	  It will slow down to 1/2 original LCD  refresh rate
+## End of MUSTANG LCD config
+
+
--- linux-mvl-dove-2.6.32.orig/drivers/video/marvell/dovefb_base.c
+++ linux-mvl-dove-2.6.32/drivers/video/marvell/dovefb_base.c
@@ -0,0 +1,1264 @@
+/*
+ * linux/drivers/video/marvell/marvell_base.c -- Marvell DOVE LCD Controller
+ *
+ * Copyright (C) Marvell Semiconductor Company.  All rights reserved.
+ *
+ * Written by:
+ *	Green Wan <gwan@marvell.com>
+ *	Shadi Ammouri <shadi@marvell.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive for
+ * more details.
+ */
+
+/*
+ * 1. Adapted from:  linux/drivers/video/skeletonfb.c
+ * 2. Merged code base from: linux/drivers/video/dovefb.c (Lennert Buytenhek)
+ */
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/interrupt.h>
+#include <linux/console.h>
+#include <linux/slab.h>
+#include <linux/fb.h>
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/ioport.h>
+#include <linux/cpufreq.h>
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+//#include <asm/hardware.h>
+#include <linux/uaccess.h>
+#include <linux/io.h>
+#include <asm/irq.h>
+#include <linux/proc_fs.h>
+
+#include <video/dovefb.h>
+#include <video/dovefbreg.h>
+#include "dovefb_if.h"
+
+#define MAX_HWC_SIZE		(64*64*2)
+#define DEFAULT_REFRESH		60	/* Hz */
+
+#define DOVEFB_INT_MASK  (DOVEFB_VSYNC_INT_MASK |\
+			  DOVEFB_GFX_INT_MASK |\
+			  DOVEFB_VID_INT_MASK)
+
+#define USING_SAME_BUFF
+#ifdef USING_SAME_BUFF
+void *gfx_fb_start = 0;
+dma_addr_t gfx_fb_start_dma = 0;
+void *vid_fb_start = 0;
+dma_addr_t vid_fb_start_dma = 0;
+#endif
+
+static int dovefb_init_layer(struct platform_device *pdev,
+		enum dovefb_type type, struct dovefb_info *info,
+		struct resource *res);
+static int dovefb_enable_lcd0(struct platform_device *pdev);
+
+struct lcd_debug_data {
+	int id;			/* lcd0 or lcd1 */
+	struct fb_info *fi;	/* fb info data */
+};
+static int
+proc_lcd_write(struct file *file, const char *buffer, unsigned long count, void *data)
+{
+	char *request;
+	unsigned int offset = 0, value = 0;
+	struct lcd_debug_data *db_data = data;
+	struct fb_info *fi;
+	struct dovefb_layer_info *dfli;
+
+	db_data = data;
+	fi = db_data->fi;
+	dfli = fi->par;
+
+	/*
+	 * Get configuration
+	 */
+	request = kmalloc(count, GFP_KERNEL);
+	if (copy_from_user(request, buffer, count))
+		return 0;
+	request[count-1] = '\0';
+
+	/*
+	 * Parse configuration
+	 */
+	offset = simple_strtoul( request, &request, 16);
+	request++;
+	value = simple_strtoul(request, &request, 16);
+
+	/*
+	 * Check offset range.
+	 */
+	if (offset >= 0 && offset <= 0x1C4) {
+		printk(KERN_ERR "write value <0x%08x> to LCD reg offset <0x%08x>\n", value, offset);
+		writel(value, dfli->reg_base + offset);
+	} else {
+		printk(KERN_ERR "usage: echo \"reg_offset value\" > /proc/mv_lcdx\n");
+	}
+
+	kfree(request);
+
+	return count;
+}
+
+static int
+proc_lcd_read(char *page, char **start, off_t off, int count, int *eof,
+			void *data)
+{
+	char *p = page;
+	int len;
+	struct lcd_debug_data *db_data = data;
+	u32 i;
+	u32 reg;
+	u32 x, bit0to15, bit16to31, total_v, total_h, active_h, active_v;
+	u32 orig_buff_x, orig_buff_y, zoomed_x, zoomed_y;
+	struct fb_info *fi;
+	struct dovefb_layer_info *dfli;
+
+	db_data = data;
+	fi = db_data->fi;
+	dfli = fi->par;
+
+	p += sprintf(p, "Inside LCD%d\n", db_data->id);
+	p += sprintf(p, "Physical addr: 0x%08x\n", (unsigned int)fi->fix.mmio_start);
+	p += sprintf(p, "Virtual addr: 0x%08x\n", (unsigned int)dfli->reg_base);
+
+	/*
+	 * Get resolution
+	 */
+	x = readl(dfli->reg_base+0x118);
+	active_h = x & 0x0000ffff;
+	active_v = (x & 0xffff0000) >> 16;
+	p += sprintf(p, "Resolution is: <%dx%d>\n", active_h, active_v);
+
+	/*
+	 * Get total line
+	 */
+	x = readl(dfli->reg_base+0x114);
+	total_h = x & 0x0000ffff;
+	total_v = (x & 0xffff0000) >> 16;
+	p += sprintf(p, "----total--------------------------<%4dx%4d>-------------------------\n", total_h, total_v);
+
+	p += sprintf(p, "----active--------------|");
+	/*
+	 * Get H Timings
+	 */
+	x = readl(dfli->reg_base+0x11c);
+	bit0to15 = x & 0x0000ffff;
+	bit16to31 = (x & 0xffff0000) >> 16;
+	p += sprintf(p, "->front porch(%d)->hsync(%d)->back porch(%d)\n",
+		bit0to15, total_h-bit0to15-bit16to31-active_h, bit16to31);
+
+	p += sprintf(p, "|\t\t\t|\n");
+	p += sprintf(p, "|\t\t\t|\n");
+	p += sprintf(p, "|\t<%4dx%4d>\t|\n", active_h, active_v);
+	p += sprintf(p, "|\t\t\t|\n");
+	p += sprintf(p, "|\t\t\t|\n");
+	p += sprintf(p, "------------------------|\n");
+	/*
+	 * Get V Timings
+	 */
+	x = readl(dfli->reg_base+0x120);
+	bit0to15 = x & 0x0000ffff;
+	bit16to31 = (x & 0xffff0000) >> 16;
+	p += sprintf(p, "|\n|front porch(%d)\n|vsync(%d)\n|back porch(%d)\n",
+		bit0to15, total_v-bit0to15-bit16to31-active_v, bit16to31);
+	p += sprintf(p, "---------------------------------------------------------------------\n");
+	/*
+	 * Get Line Pitch
+	 */
+	x = readl(dfli->reg_base+0xfc);
+	bit0to15 = x & 0x0000ffff;
+	p += sprintf(p, "gfx line pitch in memory is <%d>\n",
+		bit0to15);
+
+	/*
+	 * Get scaling info
+	 */
+	x = readl(dfli->reg_base+0x104);
+	orig_buff_x = x & 0x0000ffff;
+	orig_buff_y = (x & 0xffff0000) >> 16;
+	x = readl(dfli->reg_base+0x108);
+	zoomed_x = x & 0x0000ffff;
+	zoomed_y = (x & 0xffff0000) >> 16;
+	
+	p += sprintf(p, "Scaled from <%dx%d> to <%dx%d>\n",
+		orig_buff_x, orig_buff_y, zoomed_x, zoomed_y);
+
+	p += sprintf(p, "============================================\n");
+
+	for (i = 0x0; i <= 0x01C4; i += 4) {
+		reg = readl(dfli->reg_base + i);
+		p += sprintf(p, "0x%08x "
+			"0x%08x\n", i, reg);
+	}
+
+
+	p += sprintf(p, "-------<End>-------\n");
+
+	len = (p - page) - off;
+	if (len < 0)
+		len = 0;
+	
+	*eof = (len <= count) ? 1 : 0;
+	*start = page + off;
+
+	return len;
+}
+
+__init int
+dump_lcd_init_module( int id, struct fb_info *fi)
+{
+#ifdef CONFIG_PROC_FS
+	struct proc_dir_entry *res;
+	struct lcd_debug_data *db_data;
+	char dump_entry[30];
+
+	printk(KERN_INFO "Initialize /proc/mv_dump_lcd%d\n", id);
+	printk(KERN_INFO "use cat /proc/mv_dump_lcd%d to see reg settings\n",
+		id);
+	sprintf( dump_entry, "mv_lcd%d", id);
+	res = create_proc_entry(dump_entry, S_IRUSR, NULL);
+	if (!res)
+		return -ENOMEM;
+
+	/*
+	 * Prepare private data.
+	 */
+	db_data = kzalloc(sizeof(struct lcd_debug_data), GFP_KERNEL);
+	db_data->id = id;
+	db_data->fi = fi;
+	res->read_proc = proc_lcd_read;
+	res->write_proc = proc_lcd_write;
+	res->data = db_data;
+#endif
+
+	return 0;
+}
+
+
+
+int dovefb_determine_best_pix_fmt(struct fb_var_screeninfo *var,
+		struct dovefb_layer_info *dfli)
+{
+	/*
+	 * Pseudocolor mode?
+	 */
+	if (var->bits_per_pixel == 8)
+		return PIX_FMT_PSEUDOCOLOR;
+
+	/* YUV for video layer only. */
+	if (dfli->type == DOVEFB_OVLY_PLANE) {
+		/*
+		 * Check for YUV422PACK.
+		 */
+		if (var->bits_per_pixel == 16 && var->red.length == 16 &&
+		    var->green.length == 16 && var->blue.length == 16) {
+			if (var->red.offset >= var->blue.offset) {
+				if (var->red.offset == 4)
+					return PIX_FMT_UYVY422PACK;
+				else
+					return PIX_FMT_YUV422PACK;
+			} else
+				return PIX_FMT_YVU422PACK;
+		}
+
+		/*
+		 * Check for YUV422PLANAR.
+		 */
+		if (var->bits_per_pixel == 16 && var->red.length == 8 &&
+		    var->green.length == 4 && var->blue.length == 4) {
+			if (var->red.offset >= var->blue.offset)
+				return PIX_FMT_YUV422PLANAR;
+			else
+				return PIX_FMT_YVU422PLANAR;
+		}
+
+		/*
+		 * Check for YUV420PLANAR.
+		 */
+		if (var->bits_per_pixel == 12 && var->red.length == 8 &&
+		    var->green.length == 2 && var->blue.length == 2) {
+			if (var->red.offset >= var->blue.offset)
+				return PIX_FMT_YUV420PLANAR;
+			else
+				return PIX_FMT_YVU420PLANAR;
+		}
+	}
+
+	/*
+	 * Check for 565/1555.
+	 */
+	if (var->bits_per_pixel == 16 && var->red.length <= 5 &&
+	    var->green.length <= 6 && var->blue.length <= 5) {
+		if (var->transp.length == 0) {
+			if (var->red.offset >= var->blue.offset)
+				return PIX_FMT_RGB565;
+			else
+				return PIX_FMT_BGR565;
+		}
+
+		if (var->transp.length == 1 && var->green.length <= 5) {
+			if (var->red.offset >= var->blue.offset)
+				return PIX_FMT_RGB1555;
+			else
+				return PIX_FMT_BGR1555;
+		}
+
+		/* fall through */
+	}
+
+	/*
+	 * Check for 888/A888.
+	 */
+	if (var->bits_per_pixel <= 32 && var->red.length <= 8 &&
+	    var->green.length <= 8 && var->blue.length <= 8) {
+		if (var->bits_per_pixel == 24 && var->transp.length == 0) {
+			if (var->red.offset >= var->blue.offset)
+				return PIX_FMT_RGB888PACK;
+			else
+				return PIX_FMT_BGR888PACK;
+		}
+
+		if (var->bits_per_pixel == 32 && var->transp.length == 8) {
+			if (var->red.offset >= var->blue.offset)
+				return PIX_FMT_RGBA888;
+			else
+				return PIX_FMT_BGRA888;
+		} else {
+			if (var->red.offset >= var->blue.offset)
+				return PIX_FMT_RGB888UNPACK;
+			else
+				return PIX_FMT_BGR888UNPACK;
+		}
+
+
+		/* fall through */
+	}
+
+	return -EINVAL;
+}
+
+
+void dovefb_set_pix_fmt(struct fb_var_screeninfo *var, int pix_fmt)
+{
+	switch (pix_fmt) {
+	case PIX_FMT_RGB565:
+		var->bits_per_pixel = 16;
+		var->red.offset = 11;    var->red.length = 5;
+		var->green.offset = 5;   var->green.length = 6;
+		var->blue.offset = 0;    var->blue.length = 5;
+		var->transp.offset = 0;  var->transp.length = 0;
+		break;
+	case PIX_FMT_BGR565:
+		var->bits_per_pixel = 16;
+		var->red.offset = 0;     var->red.length = 5;
+		var->green.offset = 5;   var->green.length = 6;
+		var->blue.offset = 11;   var->blue.length = 5;
+		var->transp.offset = 0;  var->transp.length = 0;
+		break;
+	case PIX_FMT_RGB1555:
+		var->bits_per_pixel = 16;
+		var->red.offset = 10;    var->red.length = 5;
+		var->green.offset = 5;   var->green.length = 5;
+		var->blue.offset = 0;    var->blue.length = 5;
+		var->transp.offset = 15; var->transp.length = 1;
+		break;
+	case PIX_FMT_BGR1555:
+		var->bits_per_pixel = 16;
+		var->red.offset = 0;     var->red.length = 5;
+		var->green.offset = 5;   var->green.length = 5;
+		var->blue.offset = 10;   var->blue.length = 5;
+		var->transp.offset = 15; var->transp.length = 1;
+		break;
+	case PIX_FMT_RGB888PACK:
+		var->bits_per_pixel = 24;
+		var->red.offset = 16;    var->red.length = 8;
+		var->green.offset = 8;   var->green.length = 8;
+		var->blue.offset = 0;    var->blue.length = 8;
+		var->transp.offset = 0;  var->transp.length = 0;
+		break;
+	case PIX_FMT_BGR888PACK:
+		var->bits_per_pixel = 24;
+		var->red.offset = 0;     var->red.length = 8;
+		var->green.offset = 8;   var->green.length = 8;
+		var->blue.offset = 16;   var->blue.length = 8;
+		var->transp.offset = 0;  var->transp.length = 0;
+		break;
+	case PIX_FMT_RGB888UNPACK:
+		var->bits_per_pixel = 32;
+		var->red.offset = 16;    var->red.length = 8;
+		var->green.offset = 8;   var->green.length = 8;
+		var->blue.offset = 0;    var->blue.length = 8;
+		var->transp.offset = 0;  var->transp.length = 0;
+		break;
+	case PIX_FMT_BGR888UNPACK:
+		var->bits_per_pixel = 32;
+		var->red.offset = 0;     var->red.length = 8;
+		var->green.offset = 8;   var->green.length = 8;
+		var->blue.offset = 16;   var->blue.length = 8;
+		var->transp.offset = 0;  var->transp.length = 0;
+		break;
+	case PIX_FMT_RGBA888:
+		var->bits_per_pixel = 32;
+		var->red.offset = 16;    var->red.length = 8;
+		var->green.offset = 8;   var->green.length = 8;
+		var->blue.offset = 0;    var->blue.length = 8;
+		var->transp.offset = 24; var->transp.length = 8;
+		break;
+	case PIX_FMT_BGRA888:
+		var->bits_per_pixel = 32;
+		var->red.offset = 0;     var->red.length = 8;
+		var->green.offset = 8;   var->green.length = 8;
+		var->blue.offset = 16;   var->blue.length = 8;
+		var->transp.offset = 24; var->transp.length = 8;
+		break;
+	case PIX_FMT_PSEUDOCOLOR:
+		var->bits_per_pixel = 8;
+		var->red.offset = 0;     var->red.length = 8;
+		var->green.offset = 0;   var->green.length = 8;
+		var->blue.offset = 0;    var->blue.length = 8;
+		var->transp.offset = 0;  var->transp.length = 0;
+		break;
+
+	/* Video layer only */
+	case PIX_FMT_YUV422PACK:
+		var->bits_per_pixel = 16;
+		var->red.offset = 8;	 var->red.length = 16;
+		var->green.offset = 4;   var->green.length = 16;
+		var->blue.offset = 0;   var->blue.length = 16;
+		var->transp.offset = 0;  var->transp.length = 0;
+		break;
+	case PIX_FMT_YVU422PACK:
+		var->bits_per_pixel = 16;
+		var->red.offset = 0;	 var->red.length = 16;
+		var->green.offset = 8;   var->green.length = 16;
+		var->blue.offset = 12;   var->blue.length = 16;
+		var->transp.offset = 0;  var->transp.length = 0;
+		break;
+	case PIX_FMT_YUV422PLANAR:
+		var->bits_per_pixel = 16;
+		var->red.offset = 8;	 var->red.length = 8;
+		var->green.offset = 4;   var->green.length = 4;
+		var->blue.offset = 0;   var->blue.length = 4;
+		var->transp.offset = 0;  var->transp.length = 0;
+		break;
+	case PIX_FMT_YVU422PLANAR:
+		var->bits_per_pixel = 16;
+		var->red.offset = 0;	 var->red.length = 8;
+		var->green.offset = 8;   var->green.length = 4;
+		var->blue.offset = 12;   var->blue.length = 4;
+		var->transp.offset = 0;  var->transp.length = 0;
+		break;
+	case PIX_FMT_YUV420PLANAR:
+		var->bits_per_pixel = 12;
+		var->red.offset = 4;	 var->red.length = 8;
+		var->green.offset = 2;   var->green.length = 2;
+		var->blue.offset = 0;   var->blue.length = 2;
+		var->transp.offset = 0;  var->transp.length = 0;
+		break;
+	case PIX_FMT_YVU420PLANAR:
+		var->bits_per_pixel = 12;
+		var->red.offset = 0;	 var->red.length = 8;
+		var->green.offset = 8;   var->green.length = 2;
+		var->blue.offset = 10;   var->blue.length = 2;
+		var->transp.offset = 0;  var->transp.length = 0;
+		break;
+	case PIX_FMT_UYVY422PACK:
+		var->bits_per_pixel = 16;
+		var->red.offset = 4;     var->red.length = 16;
+		var->green.offset = 12;   var->green.length = 16;
+		var->blue.offset = 0;    var->blue.length = 16;
+		var->transp.offset = 0;  var->transp.length = 0;
+		break;
+	default:
+	     printk(KERN_ERR "Unknown pixel format (%d).\n", pix_fmt);
+	     dump_stack();
+	}
+}
+
+void dovefb_set_mode(struct dovefb_layer_info *dfli,
+		struct fb_var_screeninfo *var, struct fb_videomode *mode,
+		int pix_fmt, int ystretch)
+{
+	dovefb_set_pix_fmt(var, pix_fmt);
+
+	var->xres = mode->xres;
+	var->yres = mode->yres;
+	var->xres_virtual = max(var->xres, var->xres_virtual);
+	if (ystretch)
+		var->yres_virtual = dfli->fb_size /
+			(var->xres_virtual * (var->bits_per_pixel >> 3));
+	else
+		var->yres_virtual = max(var->yres, var->yres_virtual);
+	var->grayscale = 0;
+	var->accel_flags = FB_ACCEL_NONE;
+	var->pixclock = mode->pixclock;
+	var->left_margin = mode->left_margin;
+	var->right_margin = mode->right_margin;
+	var->upper_margin = mode->upper_margin;
+	var->lower_margin = mode->lower_margin;
+	var->hsync_len = mode->hsync_len;
+	var->vsync_len = mode->vsync_len;
+	var->sync = mode->sync;
+	var->vmode = FB_VMODE_NONINTERLACED;
+	var->rotate = FB_ROTATE_UR;
+}
+
+int dovefb_check_var(struct fb_var_screeninfo *var, struct fb_info *fi)
+{
+	struct dovefb_layer_info *dfli = fi->par;
+
+	/*
+	 * Basic geometry sanity checks.
+	 */
+	if (var->xoffset + var->xres > var->xres_virtual)
+		return -EINVAL;
+	if (var->yoffset + var->yres > var->yres_virtual)
+		return -EINVAL;
+
+	/*
+	 * Check size of framebuffer.
+	 */
+	if (var->xres_virtual * var->yres_virtual *
+	    (var->bits_per_pixel >> 3) > dfli->fb_size)
+		return -EINVAL;
+
+	return 0;
+}
+
+static unsigned int chan_to_field(unsigned int chan, struct fb_bitfield *bf)
+{
+	return ((chan & 0xffff) >> (16 - bf->length)) << bf->offset;
+}
+
+
+static u32 to_rgb(u16 red, u16 green, u16 blue)
+{
+	red >>= 8;
+	green >>= 8;
+	blue >>= 8;
+
+	return (red << 16) | (green << 8) | blue;
+}
+
+int dovefb_setcolreg(unsigned int regno, unsigned int red, unsigned int green,
+		unsigned int blue, unsigned int trans, struct fb_info *fi)
+{
+	struct dovefb_layer_info *dlfi = fi->par;
+	u32 val;
+
+	if (fi->fix.visual == FB_VISUAL_TRUECOLOR && regno < 16) {
+		val =  chan_to_field(red,   &fi->var.red);
+		val |= chan_to_field(green, &fi->var.green);
+		val |= chan_to_field(blue , &fi->var.blue);
+		dlfi->pseudo_palette[regno] = val;
+	}
+
+	if (fi->fix.visual == FB_VISUAL_PSEUDOCOLOR && regno < 256) {
+		val = to_rgb(red, green, blue);
+		writel(val, dlfi->reg_base + LCD_SPU_SRAM_WRDAT);
+		writel(0x8300 | regno, dlfi->reg_base + LCD_SPU_SRAM_CTRL);
+	}
+
+	return 0;
+}
+
+/*
+ *  dovefb_handle_irq (two lcd controllers)
+ */
+static irqreturn_t dovefb_handle_irq(int irq, void *dev_id)
+{
+	struct dovefb_info *dfi = (struct dovefb_info *)dev_id;
+	u32     isr;
+	u32	ret = 0;
+
+	isr = readl(dfi->reg_base + SPU_IRQ_ISR);
+
+	/*
+	 * Fix me:
+	 * Currently, hardware won't generate video layer IRQ to
+	 * bit31 while setting reg, IOPAD_CONTROL, bit [19:18]
+	 * to 0x3. We check vsync to make a workaround version. 
+	 */
+	if (isr & (DOVEFB_VID_INT_MASK|DOVEFB_VSYNC_INT_MASK)) {
+		ret += dovefb_ovly_handle_irq(isr, dfi->vid_plane);
+		isr &= ~DOVEFB_VID_INT_MASK;
+	}
+	
+	if (isr & (DOVEFB_GFX_INT_MASK|DOVEFB_VSYNC_INT_MASK)) {
+		ret += dovefb_gfx_handle_irq(isr, dfi->gfx_plane);
+		isr &= ~DOVEFB_GFX_INT_MASK;
+	}
+
+	if (isr & DOVEFB_VSYNC_INT_MASK)
+		isr &= ~DOVEFB_VSYNC_INT_MASK;
+
+	writel(isr, dfi->reg_base + SPU_IRQ_ISR);
+
+	return IRQ_RETVAL(ret);
+}
+
+
+unsigned int dovefb_dump_regs(struct dovefb_info *dfi)
+{
+	u32 i;
+	u32 reg;
+	printk(KERN_INFO "Inside dovefb_lcd_dump:\n");
+
+	for (i = 0xC0; i <= 0x01C4; i += 4) {
+		reg = readl(dfi->reg_base + i);
+		printk(KERN_INFO "Dumping LCD: offset=0x%08x, "
+			"reg=0x%08x\n", i, reg);
+	}
+
+	return 0;
+}
+
+
+#ifndef MODULE
+int __init dovefb_parse_options(char *options, struct dovefb_info *info,
+		struct dovefb_mach_info *dmi, int id)
+{
+	char *name;
+	unsigned int namelen;
+	unsigned int xres = 0, yres = 0, bpp = 16, refresh = 0;
+	char devname[8];
+
+	info->mode_option = NULL;
+
+	if (!options)
+		return -1;
+
+	sprintf(devname, "lcd%d:", id);
+	name = strstr(options, devname);
+	if (name == NULL)
+		return -1;
+	name += strlen(devname);
+
+	info->edid_en = 0;
+
+	namelen = strlen(name);
+	info->mode_option = options;
+
+	xres = simple_strtoul(name, &name, 10);
+	if (xres == 0)
+		goto bad_options;
+	if ((name[0] != 'x') && (name[0] != 'X'))
+		goto bad_options;
+	name++;
+
+	yres = simple_strtoul(name, &name, 10);
+	if (yres == 0)
+		goto bad_options;
+	if (name[0] != '-')
+		goto bad_options;
+	name++;
+
+	bpp = simple_strtoul(name, &name, 10);
+	if (bpp == 0)
+		goto bad_options;
+	if (name[0] != '@')
+		goto bad_options;
+	name++;
+
+	refresh = simple_strtoul(name, &name, 10);
+	if (refresh == 0)
+		goto bad_options;
+
+	if (name[0] == '-') {
+		/* This can be either "edid" or the fixed output resolution */
+		if (strncmp("-edid", name, 5) == 0) {
+			info->edid_en = 1;
+			name += 5;
+		}
+
+		if (name[0] == '-') {
+			/* Get the fixed output resolution */
+			name++;
+			info->out_vmode.xres = simple_strtoul(name, &name, 10);
+			if (info->out_vmode.xres == 0)
+				goto bad_options;
+			if ((name[0] != 'x') && (name[0] != 'X'))
+				goto bad_options;
+			name++;
+
+			info->out_vmode.yres = simple_strtoul(name, &name, 10);
+			if (info->out_vmode.yres == 0)
+				goto bad_options;
+			info->fixed_output = 1;
+		}
+	}
+	printk(KERN_INFO "  o Kernel parameter: %dx%d-%d@%d.\n", xres, yres,
+			bpp, refresh);
+	if (info->fixed_output)
+		printk(KERN_INFO "  o Fixed output resolution %dx%d.\n",
+				info->out_vmode.xres, info->out_vmode.yres);
+	info->dft_vmode.xres = xres;
+	info->dft_vmode.yres = yres;
+	info->dft_vmode.refresh = refresh;
+	info->gfx_plane->fb_info->var.bits_per_pixel = bpp;
+	switch (bpp) {
+	case (8):
+		dmi->pix_fmt = PIX_FMT_PSEUDOCOLOR;
+		break;
+	case(16):
+		dmi->pix_fmt = PIX_FMT_RGB565;
+		break;
+	case (24):
+		dmi->pix_fmt = PIX_FMT_RGB888PACK;
+		break;
+	case (32):
+		dmi->pix_fmt = PIX_FMT_RGBA888;
+		break;
+	default:
+		goto bad_options;
+	}
+
+	return 0;
+
+bad_options:
+	if (!info->edid_en) {
+		printk(KERN_INFO "  o Bad FB driver option %s , \
+			use <xres>x<yres>-<bpp>@<refresh>[-edid][-out res]"
+			"[-<outx>x<outy>].\n", options);
+		return -1;
+	}
+
+	return 0;
+}
+#endif
+
+static int dovefb_init_layer(struct platform_device *pdev,
+		enum dovefb_type type, struct dovefb_info *info,
+		struct resource *res)
+{
+	struct dovefb_mach_info *dmi = pdev->dev.platform_data;
+	struct fb_info *fi = 0;
+	struct dovefb_layer_info *dfli = 0;
+	int ret;
+
+	fi = framebuffer_alloc(sizeof(struct dovefb_layer_info), &pdev->dev);
+	if (fi == NULL) {
+		ret = -ENOMEM;
+		goto failed;
+	}
+
+	/* Initialize private data */
+	dfli = fi->par;
+	dfli->fb_info = fi;
+	dfli->dev = &pdev->dev;
+	dfli->is_blanked = 0;
+	dfli->active = dmi->active;
+	dfli->enabled = 1;
+	dfli->type = type;
+	dfli->info = info;
+	dfli->reg_base = info->reg_base;
+	dfli->cur_fbid = 0;
+	dfli->src_mode = SHM_NORMAL;
+	dfli->checkbuf_timer_exist = 0;
+
+	if (type == DOVEFB_GFX_PLANE) {
+		dfli->cursor_enabled = 0;
+		dfli->cursor_cfg = 1;
+		dfli->hwc_buf = (u8 *)__get_free_pages(GFP_DMA|GFP_KERNEL,
+						get_order(MAX_HWC_SIZE));
+		strcpy(fi->fix.id, dmi->id_gfx);
+	} else {
+		strcpy(fi->fix.id, dmi->id_ovly);
+	}
+
+	/*
+	 * Initialise static fb parameters.
+	 */
+	fi->flags = FBINFO_DEFAULT | FBINFO_PARTIAL_PAN_OK |
+		    FBINFO_HWACCEL_XPAN | FBINFO_HWACCEL_YPAN;
+	fi->node = -1;
+	fi->fix.type = FB_TYPE_PACKED_PIXELS;
+	fi->fix.type_aux = 0;
+	fi->fix.xpanstep = 1;
+	fi->fix.ypanstep = 1;
+	fi->fix.ywrapstep = 0;
+	fi->fix.mmio_start = res->start;
+	fi->fix.mmio_len = res->end - res->start + 1;
+	fi->fix.accel = FB_ACCEL_NONE;
+	fi->fbops = ((type == DOVEFB_GFX_PLANE) ?
+			&dovefb_gfx_ops : &dovefb_ovly_ops);
+	fi->pseudo_palette = dfli->pseudo_palette;
+
+	/*
+	 * Allocate framebuffer memory.
+	 */
+	dfli->fb_size = PAGE_ALIGN(DEFAULT_FB_SIZE*4);
+#ifdef USING_SAME_BUFF
+	if ((gfx_fb_start == 0) || (vid_fb_start == 0) ) {
+#endif
+//#ifdef CONFIG_ARCH_DOVE
+#if 0
+	dfli->fb_start = dma_alloc_writecombine(dfli->dev, dfli->fb_size,
+						&dfli->fb_start_dma,
+						GFP_KERNEL);
+	if (!dfli->fb_start || !dfli->fb_start_dma) {
+#else
+	{
+#endif
+		dfli->new_addr = 0;
+		dfli->mem_status = 1;
+		dfli->fb_start = (void *)__get_free_pages(GFP_DMA | GFP_KERNEL,
+					get_order(dfli->fb_size));
+		dfli->fb_start_dma = (dma_addr_t)__virt_to_phys(dfli->fb_start);
+	}
+
+	if (dfli->fb_start == NULL) {
+		ret = -ENOMEM;
+		goto failed;
+	}
+#ifdef USING_SAME_BUFF
+		if(strstr(fi->fix.id, "GFX")) {
+			gfx_fb_start = dfli->fb_start;
+			gfx_fb_start_dma = dfli->fb_start_dma;
+		} else {
+			vid_fb_start = dfli->fb_start;
+			vid_fb_start_dma = dfli->fb_start_dma;
+		}
+		memset(dfli->fb_start, 0, dfli->fb_size);
+	} else {
+		if(strstr(fi->fix.id, "GFX")) {
+			dfli->fb_start = gfx_fb_start;
+			dfli->fb_start_dma = gfx_fb_start_dma;
+		} else {
+			dfli->fb_start = vid_fb_start;
+			dfli->fb_start_dma = vid_fb_start_dma;
+		}
+	}
+#else
+	memset(dfli->fb_start, 0, dfli->fb_size);
+#endif
+	fi->fix.smem_start = dfli->fb_start_dma;
+	fi->fix.smem_len = dfli->fb_size;
+	fi->screen_base = dfli->fb_start;
+	fi->screen_size = dfli->fb_size;
+
+	/*
+	 * Set video mode according to platform data.
+	 */
+	dovefb_set_mode(dfli, &fi->var, dmi->modes, dmi->pix_fmt, 0);
+
+	/*
+	 * Allocate color map.
+	 */
+	if (fb_alloc_cmap(&fi->cmap, 256, 0) < 0) {
+		ret = -ENOMEM;
+		goto failed;
+	}
+
+	if (type == DOVEFB_GFX_PLANE) {
+		info->gfx_plane = dfli;
+ 		dump_lcd_init_module( strstr(fi->fix.id, "1") ? 1:0,
+			fi);
+	} else
+		info->vid_plane = dfli;
+
+	return 0;
+
+failed:
+	printk(KERN_INFO "DoveFB: dovefb_init_layer() failed (%d).\n", ret);
+	fb_dealloc_cmap(&fi->cmap);
+
+	if (dfli->fb_start != NULL) {
+		if (dfli->mem_status)
+			free_pages((unsigned long)dfli->fb_start,
+				get_order(dfli->fb_size));
+//#ifdef CONFIG_ARCH_DOVE
+#if 0
+		else
+			dma_free_writecombine(dfli->dev, dfli->fb_size,
+				dfli->fb_start, dfli->fb_start_dma);
+#endif
+	}
+
+	if (type == DOVEFB_GFX_PLANE)
+		free_pages((unsigned long)dfli->hwc_buf,
+				get_order(MAX_HWC_SIZE));
+
+	if (fi != NULL)
+		framebuffer_release(fi);
+
+	return ret;
+}
+
+/*
+ * Enable LCD0 output, this is a needed till the issue is fixed in future
+ * revisions.
+ */
+static int dovefb_enable_lcd0(struct platform_device *pdev)
+{
+	struct dovefb_mach_info *dmi;
+	struct resource *res;
+	void *lcd0_base;
+
+	dmi = pdev->dev.platform_data;
+	if (dmi == NULL)
+		return -EINVAL;
+
+	if (dmi->enable_lcd0) {
+		res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+		if (res == NULL)
+			return -EINVAL;
+		lcd0_base = ioremap_nocache(res->start,
+				res->end - res->start);
+		if (lcd0_base == NULL)
+			return -ENOMEM;
+		writel(0x01, lcd0_base + LCD_CFG_SCLK_DIV);
+		iounmap(lcd0_base);
+	}
+
+	return 0;
+}
+
+static void dovefb_config_vga_calibration(struct dovefb_info *info)
+{
+	if (info->id == 1) {
+//		u32 portB_config = readl(DOVE_LCD1_CONFIG_VIRT);
+		writel(0x90, DOVE_LCD1_CONFIG_VIRT);
+	}
+}
+
+#include <video/dovefb_gpio.h>
+
+static int __init dovefb_probe(struct platform_device *pdev)
+{
+	struct dovefb_mach_info *dmi;
+	struct dovefb_info *info = NULL;
+	struct resource *res;
+	int ret;
+	char *option = NULL;
+
+	dmi = pdev->dev.platform_data;
+	if (dmi == NULL)
+		return -EINVAL;
+
+	printk(KERN_INFO "Dove FB driver:\n");
+	ret = dovefb_enable_lcd0(pdev);
+	if (ret)
+		return -EINVAL;
+
+	info = kzalloc(sizeof(struct dovefb_info), GFP_KERNEL);
+	if (info == NULL) {
+		printk(KERN_ERR "DoveFB: Failed to allocate mem.\n");
+		ret = -ENOMEM;
+		goto failed;
+	}
+
+	/*
+	 * Map LCD controller registers.
+	 */
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (res == NULL) {
+		printk(KERN_ERR "DoveFB: Failed to retrieve resources.\n");
+		ret = -EINVAL;
+		goto failed;
+	}
+
+	info->reg_base = ioremap_nocache(res->start, res->end - res->start);
+	if (info->reg_base == NULL) {
+		printk(KERN_ERR "DoveFB: Failed to map regs memory.\n");
+		ret = -ENOMEM;
+		goto failed;
+	}
+
+	/*
+	* initialize lcd gpio access interface
+	*/
+	dovefb_save_regbase(info->reg_base, pdev->id);
+
+	if (dovefb_init_layer(pdev, DOVEFB_GFX_PLANE, info, res)) {
+		printk(KERN_ERR "dovefb_init_layer() for GFX layer failed.\n");
+		ret = -EINVAL;
+		goto failed;
+	}
+
+	if (dovefb_init_layer(pdev, DOVEFB_OVLY_PLANE, info, res)) {
+		printk(KERN_ERR "dovefb_init_layer() for VID layer failed.\n");
+		ret = -EINVAL;
+		goto failed;
+	}
+
+	/* Initialize private data */
+	platform_set_drvdata(pdev, info);
+	info->dev = &pdev->dev;
+
+	/* General FB info */
+	info->id = pdev->id;
+	info->edid = 0;
+	info->io_pin_allocation = dmi->io_pin_allocation;
+	info->pix_fmt = dmi->pix_fmt;
+	info->panel_rbswap = dmi->panel_rbswap;
+
+	/* get LCD clock information. */
+	info->clk = clk_get(&pdev->dev, dmi->clk_name);
+	info->clk_src = dmi->clk_src;
+	dev_info(&pdev->dev, "use ref clock %s\n", dmi->clk_name);
+
+	if (IS_ERR(info->clk))
+		dev_notice(&pdev->dev, "cannot get clkdev\n");
+	else
+		clk_enable(info->clk);
+#ifndef MODULE
+	/*
+	 * Get video option from boot args
+	 */
+	if (fb_get_options("dovefb", &option))
+		return -ENODEV;
+
+	if (!option) {
+		printk(KERN_WARNING "DoveFB: No kernel parameters provided, "
+				"using default.\n");
+		option = CONFIG_FB_DOVE_CLCD_DEFAULT_OPTION;
+	}
+	/*
+	 * Parse video mode out and save into var&par.
+	 */
+	ret = dovefb_parse_options(option, info, dmi, pdev->id);
+#endif
+	dovefb_config_vga_calibration(info);
+
+	ret = dovefb_gfx_init(info, dmi);
+	if (ret) {
+		printk(KERN_ERR "DoveFB: dovefb_gfx_init() "
+				"returned %d.\n", ret);
+		goto failed;
+	}
+
+	ret = dovefb_ovly_init(info, dmi);
+	if (ret) {
+		printk(KERN_ERR "DoveFB: dovefb_ovly_init() "
+				"returned %d.\n", ret);
+		goto failed;
+	}
+
+	/*
+	 * Get IRQ number.
+	 */
+	res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+	if (res == NULL) {
+		ret = -EINVAL;
+		goto failed;
+	}
+
+	/*
+	 * Register irq handler.
+	 */
+	ret = request_irq(res->start, dovefb_handle_irq, IRQF_SHARED,
+			pdev->name, info);
+	if (ret < 0) {
+		printk(KERN_ERR "DoveFB: Failed to register IRQ.\n");
+		goto failed_irq;
+	}
+
+	/*
+	 * Disable interrupts in default.
+	 */
+	writel( 0x0, info->reg_base + SPU_IRQ_ENA);
+
+	/*
+	 * Register framebuffers.
+	 */
+	ret = register_framebuffer(info->gfx_plane->fb_info);
+	if (ret < 0) {
+		printk(KERN_ERR "DoveFB: Failed to register GFX FB.\n");
+		goto failed_irq;
+	}
+
+
+	ret = register_framebuffer(info->vid_plane->fb_info);
+	if (ret < 0) {
+		printk(KERN_ERR "doveFB: Failed to register VID FB.\n");
+		ret = -ENXIO;
+		goto failed_fb;
+	}
+
+	printk(KERN_INFO "  o dovefb: frame buffer device was successfully "
+			"loaded.\n");
+	return 0;
+
+
+failed_fb:
+	unregister_framebuffer(info->vid_plane->fb_info);
+failed_irq:
+	free_irq(res->start, info);
+failed:
+
+	if (info && !IS_ERR(info->clk)) {
+		clk_disable(info->clk);
+		clk_put(info->clk);
+	}
+	platform_set_drvdata(pdev, NULL);
+
+	if (info && info->reg_base)
+		iounmap(info->reg_base);
+
+	kfree(info);
+
+	printk(KERN_INFO "dovefb: frame buffer device init failed (%d)\n", ret);
+
+	return ret;
+}
+
+#ifdef CONFIG_PM
+static int dovefb_suspend(struct platform_device *pdev, pm_message_t mesg)
+{
+	struct dovefb_info *dfi = platform_get_drvdata(pdev);
+
+	printk(KERN_INFO "dovefb_suspend(): state = %d.\n", mesg.event);	
+
+	/* Disable all interrupts */
+	writel( 0x0, dfi->reg_base+SPU_IRQ_ENA);
+
+	/* Save cursor related registers */
+	dfi->LCD_SPU_HWC_HPXL_VLN_saved_value =
+		readl(dfi->reg_base + LCD_SPU_HWC_HPXL_VLN);
+	dfi->LCD_SPU_ALPHA_COLOR1_saved_value =
+		readl(dfi->reg_base + LCD_SPU_ALPHA_COLOR1);
+	dfi->LCD_SPU_ALPHA_COLOR2_saved_value =
+		readl(dfi->reg_base + LCD_SPU_ALPHA_COLOR2);
+
+	/* Save colorkey related regiters */
+	dfi->LCD_SPU_COLORKEY_Y_saved_value =
+		readl(dfi->reg_base + LCD_SPU_COLORKEY_Y);
+	dfi->LCD_SPU_COLORKEY_U_saved_value =
+		readl(dfi->reg_base + LCD_SPU_COLORKEY_U);
+	dfi->LCD_SPU_COLORKEY_V_saved_value =
+		readl(dfi->reg_base + LCD_SPU_COLORKEY_V);
+	dfi->LCD_SPU_DMA_CTRL1_saved_value =
+		readl(dfi->reg_base + LCD_SPU_DMA_CTRL1);
+	dfi->LCD_SPU_ADV_REG_saved_value =
+		readl(dfi->reg_base + LCD_SPU_ADV_REG);
+
+	acquire_console_sem();
+
+	if (dovefb_gfx_suspend(dfi->gfx_plane, mesg)) {
+		printk(KERN_INFO "dovefb_suspend(): "
+				"dovefb_gfx_suspend() failed.\n");
+		release_console_sem();
+		return -1;
+	}
+
+	if (dovefb_ovly_suspend(dfi->vid_plane, mesg)) {
+		printk(KERN_INFO "dovefb_suspend(): "
+				"dovefb_ovly_suspend() failed.\n");
+		release_console_sem();
+		return -1;
+	}
+
+	pdev->dev.power.power_state = mesg;
+	if (!IS_ERR(dfi->clk))
+		clk_disable(dfi->clk);
+	release_console_sem();
+
+	return 0;
+}
+int lcd_set_clock(struct clk *clk, unsigned long rate);
+static int dovefb_resume(struct platform_device *pdev)
+{
+	struct dovefb_info *dfi = platform_get_drvdata(pdev);
+
+	printk(KERN_INFO "dovefb_resume().\n");
+
+	acquire_console_sem();
+	if (!IS_ERR(dfi->clk))
+		clk_enable(dfi->clk);
+
+	if (dovefb_enable_lcd0(pdev)) {
+		printk(KERN_INFO "dovefb_resume(): "
+				"dovefb_enable_lcd0() failed.\n");
+		return -1;
+	}
+
+	dovefb_config_vga_calibration(dfi);
+
+	if (dovefb_gfx_resume(dfi->gfx_plane)) {
+		printk(KERN_INFO "dovefb_resume(): "
+				"dovefb_gfx_resume() failed.\n");
+		return -1;
+	}
+
+	if (dovefb_ovly_resume(dfi->vid_plane)) {
+		printk(KERN_INFO "dovefb_resume(): "
+				"dovefb_ovly_resume() failed.\n");
+		return -1;
+	}
+
+	/* Restore cursor related registers */
+	writel(dfi->LCD_SPU_HWC_HPXL_VLN_saved_value,
+		dfi->reg_base + LCD_SPU_HWC_HPXL_VLN);
+	writel(dfi->LCD_SPU_ALPHA_COLOR1_saved_value,
+		dfi->reg_base + LCD_SPU_ALPHA_COLOR1);
+	writel(dfi->LCD_SPU_ALPHA_COLOR2_saved_value,
+		dfi->reg_base + LCD_SPU_ALPHA_COLOR2);
+
+	/* Restore colorkey related regiters */
+	writel(dfi->LCD_SPU_COLORKEY_Y_saved_value,
+		dfi->reg_base + LCD_SPU_COLORKEY_Y);
+	writel(dfi->LCD_SPU_COLORKEY_U_saved_value,
+		dfi->reg_base + LCD_SPU_COLORKEY_U);
+	writel(dfi->LCD_SPU_COLORKEY_V_saved_value,
+		dfi->reg_base + LCD_SPU_COLORKEY_V);
+	writel(dfi->LCD_SPU_DMA_CTRL1_saved_value,
+		dfi->reg_base + LCD_SPU_DMA_CTRL1);
+	writel(dfi->LCD_SPU_ADV_REG_saved_value,
+		dfi->reg_base + LCD_SPU_ADV_REG);
+
+	/* Disable all interrupts */
+	writel( 0x0, dfi->reg_base + SPU_IRQ_ENA);
+
+	release_console_sem();
+
+	return 0;
+}
+#endif
+
+static struct platform_driver dovefb_driver = {
+	.probe		= dovefb_probe,
+#ifdef CONFIG_PM
+	.suspend	= dovefb_suspend,
+	.resume		= dovefb_resume,
+#endif
+	.driver		= {
+		.name	= "dovefb",
+		.owner	= THIS_MODULE,
+	},
+};
+#ifdef CONFIG_SPI_MV
+extern int __devinit mv_spi_init(void);
+#endif
+static int __devinit dovefb_init(void)
+{
+	int rc;
+	rc = platform_driver_register(&dovefb_driver);
+	if (rc)
+		return rc;
+#ifdef CONFIG_SPI_MV
+	return mv_spi_init();
+#else
+	return rc;
+#endif
+}
+
+late_initcall(dovefb_init);
+
+MODULE_AUTHOR("Green Wan <gwan@marvell.com>");
+MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
+MODULE_AUTHOR("Shadi Ammouri <shadi@marvell.com>");
+MODULE_DESCRIPTION("Framebuffer driver for Dove");
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/drivers/video/marvell/dovedcon.c
+++ linux-mvl-dove-2.6.32/drivers/video/marvell/dovedcon.c
@@ -0,0 +1,651 @@
+/*
+ * linux/drivers/video/dovedcon.c -- Marvell DCON driver for DOVE
+ *
+ *
+ * Copyright (C) Marvell Semiconductor Company.  All rights reserved.
+ *
+ * Written by:
+ *	Green Wan <gwan@marvell.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive for
+ * more details.
+ *
+ */
+
+#include <video/dovedcon.h>
+
+#define VGA_CHANNEL_DEFAULT	0x90C78
+static int dovedcon_enable(struct dovedcon_info *ddi)
+{
+	unsigned int channel_ctrl;
+	unsigned int ctrl0;
+
+	/*
+	 * Get current configuration of CTRL0
+	 */
+	ctrl0 = readl(ddi->reg_base+DCON_CTRL0);
+
+#ifdef CONFIG_FB_DOVE_CLCD_DCONB_BYPASS0
+	/* enable lcd0 pass to PortB */
+	ctrl0 &= ~(0x3 << 8);
+	ctrl0 |= (0x1 << 8);
+	ddi->port_b = 1;
+#endif
+	
+	/*
+	 * Enable VGA clock, clear it to enable.
+	 */
+	ctrl0 &= ~(ddi->port_b << 25);	
+		
+	/*
+	 * Enable LCD clock, clear it to enable
+	 */
+	ctrl0 &= ~(ddi->port_a << 24);	
+
+	/*
+	 * Enable LCD Parallel Interface, clear it to enable
+	 */
+	ctrl0 &= ~(0x1 << 17);	
+
+	writel(ctrl0, ddi->reg_base+DCON_CTRL0);
+
+	/*
+	 * Configure VGA data channel and power on them.
+	 */
+	if (ddi->port_b) {
+		channel_ctrl = VGA_CHANNEL_DEFAULT;
+		writel(channel_ctrl, ddi->reg_base+DCON_VGA_DAC_CHANNEL_A_CTRL);
+		writel(channel_ctrl, ddi->reg_base+DCON_VGA_DAC_CHANNEL_B_CTRL);
+		writel(channel_ctrl, ddi->reg_base+DCON_VGA_DAC_CHANNEL_C_CTRL);
+	}
+
+	return 0;
+}
+
+static int dovedcon_disable(struct dovedcon_info *ddi)
+{
+	unsigned int channel_ctrl;
+	unsigned int ctrl0;
+
+	/*
+	 * Power down VGA data channel.
+	 */
+	channel_ctrl = (0x1 << 22);
+	writel(channel_ctrl, ddi->reg_base+DCON_VGA_DAC_CHANNEL_A_CTRL);
+	writel(channel_ctrl, ddi->reg_base+DCON_VGA_DAC_CHANNEL_B_CTRL);
+	writel(channel_ctrl, ddi->reg_base+DCON_VGA_DAC_CHANNEL_C_CTRL);
+
+	/*
+	 * Get current configuration of CTRL0
+	 */
+	ctrl0 = readl(ddi->reg_base+DCON_CTRL0);
+
+	/*
+	 * Disable LCD Parallel Interface, set to 1 to disable it.
+	 */
+	ctrl0 |= (0x1 << 17);	
+
+	/*
+	 * Disable LCD clock, set to 1 to disable it.
+	 */
+	ctrl0 |= (0x1 << 24);	
+
+	/*
+	 * Disable VGA clock, set to 1 to disable it.
+	 */
+	ctrl0 |= (0x1 << 25);	
+		
+	writel(ctrl0, ddi->reg_base+DCON_CTRL0);
+	
+	return 0;
+}
+
+
+#ifdef CONFIG_PM
+
+/* suspend and resume support */
+static int dovedcon_suspend(struct platform_device *pdev, pm_message_t state)
+{
+	struct dovedcon_info *ddi = platform_get_drvdata(pdev);
+
+	printk(KERN_INFO "dovedcon_suspend().\n");
+
+	dovedcon_disable(ddi);
+	clk_disable(ddi->clk);
+
+	return 0;
+}
+
+static int dovedcon_resume(struct platform_device *pdev)
+{
+	struct dovedcon_info *ddi = platform_get_drvdata(pdev);
+
+	printk(KERN_INFO "dovedcon_resume().\n");
+	clk_enable(ddi->clk);
+	dovedcon_enable(ddi);
+
+	return 0;
+}
+
+#endif
+
+static int dovedcon_fb_event_callback(struct notifier_block *self,
+				unsigned long event, void *data)
+{
+	struct fb_event *evdata = data;
+	struct dovedcon_info *ddi;
+
+	/* If we aren't interested in this event, skip it immediately ... */
+	if (event != FB_EVENT_BLANK && event != FB_EVENT_CONBLANK)
+		return 0;
+
+	ddi = container_of(self, struct dovedcon_info, fb_notif);
+
+	if (*(int *)evdata->data == FB_BLANK_UNBLANK) {
+		printk(KERN_NOTICE "DCON fb callback: unblanking...\n");
+		dovedcon_enable(ddi);
+	}
+	else {
+		printk(KERN_NOTICE "DCON fb callback: blank...\n");
+		dovedcon_disable(ddi);
+	}
+
+	return 0;
+}
+
+static int dovedcon_hook_fb_event(struct dovedcon_info *ddi)
+{
+	memset(&ddi->fb_notif, 0, sizeof(ddi->fb_notif));
+	ddi->fb_notif.notifier_call = dovedcon_fb_event_callback;
+	return fb_register_client(&ddi->fb_notif);
+}
+
+/*
+ * dcon sysfs interface implementation
+ */
+static ssize_t dcon_show_pa_clk(struct device *dev,
+		struct device_attribute *attr,char *buf)
+{
+	struct dovedcon_info *ddi;
+
+	ddi = dev_get_drvdata(dev);
+
+	return sprintf(buf, "%d\n", ddi->port_a);
+}
+
+static ssize_t dcon_ena_pa_clk(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count)
+{
+	int rc;
+	struct dovedcon_info *ddi;
+	unsigned long ena_clk;
+
+	ddi = dev_get_drvdata(dev);
+	rc = strict_strtoul(buf, 0, &ena_clk);
+	if (rc)
+		return rc;
+
+	rc = -ENXIO;
+	
+	if (ddi->port_a != ena_clk) {
+		unsigned int ctrl0;
+
+		ddi->port_a = ena_clk;
+
+		/*
+		 * Get current configuration of CTRL0
+		 */
+		ctrl0 = readl(ddi->reg_base+DCON_CTRL0);
+
+		/* enable or disable LCD clk. */
+		if (0 == ddi->port_a)
+			ctrl0 |= (0x1 << 24);
+		else
+			ctrl0 &= ~(0x1 << 24);
+
+		/* Apply setting. */
+		writel(ctrl0, ddi->reg_base+DCON_CTRL0);
+	}
+
+	rc = count;
+
+	return rc;
+}
+
+static ssize_t dcon_show_pb_clk(struct device *dev,
+		struct device_attribute *attr,char *buf)
+{
+	struct dovedcon_info *ddi;
+
+	ddi = dev_get_drvdata(dev);
+
+	return sprintf(buf, "%d\n", ddi->port_b);
+}
+
+static ssize_t dcon_ena_pb_clk(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count)
+{
+	int rc;
+	struct dovedcon_info *ddi;
+	unsigned long ena_clk;
+
+	ddi = dev_get_drvdata(dev);
+	rc = strict_strtoul(buf, 0, &ena_clk);
+	if (rc)
+		return rc;
+
+	if (ddi->port_b != ena_clk) {
+		unsigned int ctrl0;
+
+		ddi->port_b = ena_clk;
+
+		/*
+		 * Get current configuration of CTRL0
+		 */
+		ctrl0 = readl(ddi->reg_base+DCON_CTRL0);
+
+		/* enable or disable LCD clk. */
+		if (0 == ddi->port_b)
+			ctrl0 |= (0x1 << 25);
+		else
+			ctrl0 &= ~(0x1 << 25);
+
+		/* Apply setting. */
+		writel(ctrl0, ddi->reg_base+DCON_CTRL0);
+	}
+
+	rc = count;
+
+	return rc;
+}
+
+static ssize_t dcon_show_pa_mode(struct device *dev,
+		struct device_attribute *attr,char *buf)
+{
+	struct dovedcon_info *ddi;
+	unsigned int ctrl0;
+
+	ddi = dev_get_drvdata(dev);
+
+	/*
+	 * Get current configuration of CTRL0
+	 */
+	ctrl0 = readl(ddi->reg_base+DCON_CTRL0);
+
+	return sprintf(buf, "%d\n", (ctrl0 & (0x3 << 6)) >> 6 );
+}
+
+static ssize_t dcon_cfg_pa_mode(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count)
+{
+	int rc;
+	struct dovedcon_info *ddi;
+	unsigned long value;
+	unsigned int ctrl0;
+
+	ddi = dev_get_drvdata(dev);
+	rc = strict_strtoul(buf, 0, &value);
+	if (rc)
+		return rc;
+
+	rc = -ENXIO;
+
+	/*
+	 * Get current configuration of CTRL0
+	 */
+	ctrl0 = readl(ddi->reg_base+DCON_CTRL0);
+
+	if (value <= 3) {
+		ctrl0 &= ~(0x3 << 6);
+		ctrl0 |= (value << 6);
+
+		/* Apply setting. */
+		writel(ctrl0, ddi->reg_base+DCON_CTRL0);
+		rc = count;
+	}
+
+	return rc;
+}
+
+static ssize_t dcon_show_pb_mode(struct device *dev,
+		struct device_attribute *attr,char *buf)
+{
+	struct dovedcon_info *ddi;
+	unsigned int ctrl0;
+
+	ddi = dev_get_drvdata(dev);
+
+	/*
+	 * Get current configuration of CTRL0
+	 */
+	ctrl0 = readl(ddi->reg_base+DCON_CTRL0);
+
+	return sprintf(buf, "%d\n", (ctrl0 & (0x3 << 8)) >> 8 );
+}
+
+static ssize_t dcon_cfg_pb_mode(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count)
+{
+	int rc;
+	struct dovedcon_info *ddi;
+	unsigned long value;
+	unsigned int ctrl0;
+
+	ddi = dev_get_drvdata(dev);
+	rc = strict_strtoul(buf, 0, &value);
+	if (rc)
+		return rc;
+
+	rc = -ENXIO;
+
+	/*
+	 * Get current configuration of CTRL0
+	 */
+	ctrl0 = readl(ddi->reg_base+DCON_CTRL0);
+
+	if (value <= 3) {
+		ctrl0 &= ~(0x3 << 8);
+		ctrl0 |= (value << 8);
+
+		/* Apply setting. */
+		writel(ctrl0, ddi->reg_base+DCON_CTRL0);
+		rc = count;
+	}
+
+	return rc;
+}
+
+static ssize_t dcon_show_parallel_ena(struct device *dev,
+		struct device_attribute *attr,char *buf)
+{
+	struct dovedcon_info *ddi;
+	unsigned int ctrl0;
+
+	ddi = dev_get_drvdata(dev);
+
+	/*
+	 * Get current configuration of CTRL0
+	 */
+	ctrl0 = readl(ddi->reg_base+DCON_CTRL0);
+
+	return sprintf(buf, "%d\n", (ctrl0 & (0x1 << 17)) ? 0x0:0x1 );
+}
+
+static ssize_t dcon_ena_parallel(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count)
+{
+	int rc;
+	struct dovedcon_info *ddi;
+	unsigned long value;
+	unsigned int ctrl0;
+
+	ddi = dev_get_drvdata(dev);
+	rc = strict_strtoul(buf, 0, &value);
+	if (rc)
+		return rc;
+
+	rc = -ENXIO;
+
+	/*
+	 * Get current configuration of CTRL0
+	 */
+	ctrl0 = readl(ddi->reg_base+DCON_CTRL0);
+
+	if (value <= 1) {
+		if (0 == value)
+			ctrl0 |= (0x1 << 17);
+		else
+			ctrl0 &= ~(0x1 << 17);
+
+		/* Apply setting. */
+		writel(ctrl0, ddi->reg_base+DCON_CTRL0);
+		rc = count;
+	}
+
+	return rc;
+}
+
+static ssize_t dcon_show_vga_pwr(struct device *dev,
+		struct device_attribute *attr,char *buf)
+{
+	struct dovedcon_info *ddi;
+	unsigned int channel;
+	unsigned int result;
+
+	result = 0;
+	ddi = dev_get_drvdata(dev);
+
+	/*
+	 * Get channel A power status
+	 */
+	channel = readl(ddi->reg_base+DCON_VGA_DAC_CHANNEL_A_CTRL);
+	result |= (channel & (0x1 << 22)) ? 0x0:0x1;
+	
+	/*
+	 * Get channel B power status
+	 */
+	channel = readl(ddi->reg_base+DCON_VGA_DAC_CHANNEL_B_CTRL);
+	result |= (channel & (0x1 << 22)) ? 0x0:0x2;
+	
+	/*
+	 * Get channel C power status
+	 */
+	channel = readl(ddi->reg_base+DCON_VGA_DAC_CHANNEL_C_CTRL);
+	result |= (channel & (0x1 << 22)) ? 0x0:0x4;
+
+	return sprintf(buf, "%d\n", result);
+}
+
+static ssize_t dcon_ena_vga_pwr(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count)
+{
+	int rc;
+	struct dovedcon_info *ddi;
+	unsigned long value;
+	unsigned int channel;
+
+	ddi = dev_get_drvdata(dev);
+	rc = strict_strtoul(buf, 0, &value);
+	if (rc)
+		return rc;
+
+	rc = -ENXIO;
+	channel = 0;
+
+	/*
+	 * bit[0] for channel A power status.
+	 * bit[1] for channel B power status.
+	 * bit[2] for channel C power status.
+	 */
+	if (value <= 0x7) {
+		/* config channel A */
+		if (value & 0x1)
+			channel = VGA_CHANNEL_DEFAULT;
+		else
+			channel |= (0x1 << 22);
+
+		/* Apply setting. */
+		writel(channel, ddi->reg_base+DCON_VGA_DAC_CHANNEL_A_CTRL);
+
+		/* config channel B */
+		if (value & 0x2)
+			channel = VGA_CHANNEL_DEFAULT;
+		else
+			channel |= (0x1 << 22);
+
+		/* Apply setting. */
+		writel(channel, ddi->reg_base+DCON_VGA_DAC_CHANNEL_B_CTRL);
+
+		/* config channel C */
+		if (value & 0x4)
+			channel = VGA_CHANNEL_DEFAULT;
+		else
+			channel |= (0x1 << 22);
+
+		/* Apply setting. */
+		writel(channel, ddi->reg_base+DCON_VGA_DAC_CHANNEL_C_CTRL);
+
+		rc = count;
+	}
+
+	return rc;
+}
+
+/* Using sysfs to configure DCON function. */
+static struct class *dcon_class;
+#define DCON_ATTR_NUM 6
+static struct device_attribute dcon_device_attributes[DCON_ATTR_NUM+1] = {
+	__ATTR(pa_clk_ena, 0644, dcon_show_pa_clk, dcon_ena_pa_clk),
+	__ATTR(pb_clk_ena, 0644, dcon_show_pb_clk, dcon_ena_pb_clk),
+	__ATTR(pa_mode, 0644, dcon_show_pa_mode, dcon_cfg_pa_mode),
+	__ATTR(pb_mode, 0644, dcon_show_pb_mode, dcon_cfg_pb_mode),
+	__ATTR(parallel_ena, 0644, dcon_show_parallel_ena, dcon_ena_parallel),
+	__ATTR(vga_ch_pwr, 0644, dcon_show_vga_pwr, dcon_ena_vga_pwr),
+	__ATTR_NULL,
+};
+
+static int __init dcon_class_init(void)
+{
+	dcon_class = class_create(THIS_MODULE, "dcon");
+	if (IS_ERR(dcon_class)) {
+		printk(KERN_WARNING "Unable to create dcon class; errno = %ld\n",
+				PTR_ERR(dcon_class));
+		return PTR_ERR(dcon_class);
+	}
+
+	dcon_class->dev_attrs = dcon_device_attributes;
+	dcon_class->suspend = NULL;
+	dcon_class->resume = NULL;
+	return 0;
+}
+
+static void dcon_device_release(struct device *dev)
+{
+	struct dovedcon_info *ddi;
+
+	ddi = dev_get_drvdata(dev);
+	kfree(ddi);
+}
+
+/* Initialization */
+static int __init dovedcon_probe(struct platform_device *pdev)
+{
+	struct dovedcon_mach_info *ddmi;
+	struct dovedcon_info *ddi;
+	struct resource *res;
+
+	ddmi = pdev->dev.platform_data;
+	if (!ddmi)
+		return -EINVAL;
+
+	ddi = kzalloc(sizeof(struct dovedcon_info), GFP_KERNEL);
+	if (ddi == NULL)
+		return -ENOMEM;
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (!res) {
+		kfree(ddi);
+		return -EINVAL;
+	}
+
+	if (!request_mem_region(res->start, res->end - res->start,
+	    "MRVL DCON Regs")) {
+		printk(KERN_INFO "Cannot reserve DCON memory mapped"
+			" area 0x%lx @ 0x%lx\n",
+			(unsigned long)res->start,
+			(unsigned long)res->end - res->start);
+		kfree(ddi);
+		return -ENXIO;
+	}
+
+	ddi->reg_base = ioremap_nocache(res->start, res->end - res->start);
+
+	if (!ddi->reg_base) {
+		kfree(ddi);
+		return -EINVAL;
+	}
+
+	platform_set_drvdata(pdev, ddi);
+//	dev_set_drvdata(&pdev->dev, ddi);
+
+	//printk(KERN_INFO "DCON: pdev->dev.class=<0x%x>\n", pdev->dev.class);
+	//printk(KERN_INFO "DCON: pdev->dev.parent=<0x%x>\n", pdev->dev.parent);
+	//printk(KERN_INFO "DCON: pdev->dev.release=<0x%x>\n", pdev->dev.release);
+	ddi->clk = clk_get(&pdev->dev, "LCDCLK");
+	if (!IS_ERR(ddi->clk))
+		clk_enable(ddi->clk);
+
+	ddi->port_a = ddmi->port_a;
+	ddi->port_b = ddmi->port_b;
+
+	/* Initialize DCON hardware */
+	dovedcon_enable(ddi);
+
+	/*
+	 * Register to receive fb blank event.
+	 */
+	dovedcon_hook_fb_event(ddi);
+
+	dcon_class_init();
+	pdev->dev.class = dcon_class;
+	pdev->dev.release = dcon_device_release;
+
+	{
+		int i;
+
+		for(i = 0; i < DCON_ATTR_NUM; i++)
+			if (device_create_file(&pdev->dev,
+			    &dcon_device_attributes[i]))
+				printk(KERN_ERR
+				    "dcon register <%d> sysfs failed\n", i);
+	}
+
+	printk(KERN_INFO "dovedcon has been initialized.\n");
+
+	return 0;
+}
+
+/*
+ *  Cleanup
+ */
+static int dovedcon_remove(struct platform_device *pdev)
+{
+	struct dovedcon_info *ddi = platform_get_drvdata(pdev);
+
+	clk_disable(ddi->clk);
+	clk_put(ddi->clk);
+	iounmap(ddi->reg_base);
+	kfree(ddi);
+
+	return 0;
+}
+
+static struct platform_driver dovedcon_pdriver = {
+	.probe		= dovedcon_probe,
+	.remove		= dovedcon_remove,
+#ifdef CONFIG_PM
+	.suspend	= dovedcon_suspend,
+	.resume		= dovedcon_resume,
+#endif /* CONFIG_PM */
+	.driver		=	{
+		.name	=	"dovedcon",
+		.owner	=	THIS_MODULE,
+	},
+};
+static int __init dovedcon_init(void)
+{
+	return platform_driver_register(&dovedcon_pdriver);
+}
+
+static void __exit dovedcon_exit(void)
+{
+	platform_driver_unregister(&dovedcon_pdriver);
+}
+
+module_init(dovedcon_init);
+module_exit(dovedcon_exit);
+
+MODULE_AUTHOR("Green Wan <gwan@marvell.com>");
+MODULE_DESCRIPTION("DCON driver for Dove LCD unit");
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/drivers/video/marvell/dovefb_display.c
+++ linux-mvl-dove-2.6.32/drivers/video/marvell/dovefb_display.c
@@ -0,0 +1,203 @@
+#include <linux/module.h>
+
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/smp_lock.h>
+#include <linux/kernel.h>
+#include <linux/major.h>
+#include <linux/slab.h>
+#include <linux/mm.h>
+#include <linux/mman.h>
+#include <linux/vt.h>
+#include <linux/init.h>
+#include <linux/linux_logo.h>
+#include <linux/proc_fs.h>
+#include <linux/seq_file.h>
+#include <linux/console.h>
+#include <linux/kmod.h>
+#include <linux/err.h>
+#include <linux/device.h>
+#include <linux/efi.h>
+#include <linux/fb.h>
+
+#include <video/dovefb.h>
+#include <video/dovefbreg.h>
+#include <video/dovedcon.h>
+#include <video/dovefb_display.h>
+
+/*
+ * LCD controll register physical address
+ */
+static unsigned int lcd_regbase;
+//module_param(lcd_regbase, uint, 0xf1810000);
+module_param(lcd_regbase, uint, 0);
+MODULE_PARM_DESC(lcd_regbase, "DCON register base");
+
+/*
+ * 0 means lcd0 = regbase + 0x0, lcd1 = regbase + 0x10000;
+ * 1 means lcd0 = regbase + 0x10000, lcd1 = regbase + 0x0;
+ */
+static unsigned int lcdseq;
+module_param(lcdseq, uint, 1);
+MODULE_PARM_DESC(lcdseq, "LCD sequence");
+
+extern struct class *fb_class;
+static void *lcd0_regbase;
+static void *lcd1_regbase;
+static void *dcon_regbase;
+
+static int config_dcon(unsigned int settings)
+{
+	writel(settings, dcon_regbase+DCON_CTRL0);
+	return 0;
+}
+
+static int config_porta(unsigned int settings)
+{
+	unsigned int ctrl0;
+
+	ctrl0 = readl(dcon_regbase+DCON_CTRL0);
+	ctrl0 &= ~(0x3 << 6);
+	ctrl0 |= (settings << 6);
+	writel(ctrl0, dcon_regbase+DCON_CTRL0);
+
+	return 0;
+}
+
+static int config_portb(unsigned int settings)
+{
+	unsigned int ctrl0;
+
+	ctrl0 = readl(dcon_regbase+DCON_CTRL0);
+	ctrl0 &= ~(0x3 << 8);
+	ctrl0 |= (settings << 8);
+	writel(ctrl0, dcon_regbase+DCON_CTRL0);
+
+	return 0;
+}
+
+/*
+ * #define FBIO_SET_DISPLAY_MODE   0
+ * #define FBIO_GET_DISPLAY_MODE   1
+ * #define FBIO_CONFIG_DCON        2
+ * #define FBIO_CONFIG_PORTA       3
+ * #define FBIO_CONFIG_PORTB       4
+ * #define FBIO_GET_DCON_STATUS    5
+ */
+static long display_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+	switch (cmd) {
+	case FBIO_SET_DISPLAY_MODE:
+		/* configure display mode. */
+		printk(KERN_INFO "Reserved!! Not implement yet.\n");
+		break;
+	case FBIO_GET_DISPLAY_MODE:
+		/* get display configuration. */
+		printk(KERN_INFO "Reserved!! Not implement yet.\n");
+		break;
+	case FBIO_CONFIG_DCON:
+	{
+		unsigned int settings;
+		/* Get data from user space. */
+		if (copy_from_user(&settings, (void *)arg, sizeof(unsigned int)))
+			return -EFAULT;
+		config_dcon(settings);
+		break;
+	}
+	case FBIO_CONFIG_PORTA:
+	{
+		unsigned int settings;
+		/* Get data from user space. */
+		if (copy_from_user(&settings, (void *)arg, sizeof(unsigned int)))
+			return -EFAULT;
+
+		config_porta(settings);
+		break;
+	}
+	case FBIO_CONFIG_PORTB:
+	{
+		unsigned int settings;
+
+		/* Get data from user space. */
+		if (copy_from_user(&settings, (void *)arg, sizeof(unsigned int)))
+			return -EFAULT;
+
+		config_portb(settings);
+		break;
+	}
+	case FBIO_GET_DCON_STATUS:
+	{
+		unsigned int dc_status;
+
+		/* get dcon configuration. */
+		dc_status = readl(dcon_regbase+DCON_CTRL0);
+
+		printk(KERN_INFO "get dcon config.\n");
+		if (copy_to_user((void *)arg, &dc_status, sizeof(unsigned int)))
+			return -EFAULT;
+		break;
+	}
+	default:
+		printk(KERN_ERR "Unknown command\n");
+	}
+
+	return 0;
+}
+
+static const struct file_operations display_fops = {
+	.owner =	THIS_MODULE,
+	.unlocked_ioctl = display_ioctl,
+};
+
+
+static int __init
+dovefb_display_init(void)
+{
+#ifdef MTL_DEBUG
+	uint x;
+
+	printk(KERN_INFO "lcd_regbase = 0x%08x\n", lcd_regbase);
+	printk(KERN_INFO "lcdseq = %d, 1^lcdseq = %d\n", lcdseq, 1^lcdseq);
+	printk(KERN_INFO "lcdseq = %d, 0^lcdseq = %d\n", lcdseq, 0^lcdseq);
+#endif
+	printk(KERN_WARNING "dovefb_display_init\n");
+
+	/* register character. */
+	if (register_chrdev(30, "display tools", &display_fops))
+		printk("unable to get major %d for fb devs\n", 30);
+
+	if (lcd_regbase) {
+		/* remap to ctrl registers. */
+		lcd0_regbase = ioremap_nocache( lcd_regbase + (0x10000*(0^lcdseq)), (0x10000 - 1));
+		lcd1_regbase = ioremap_nocache( lcd_regbase + (0x10000*(1^lcdseq)), (0x10000 - 1));
+		dcon_regbase = ioremap_nocache( lcd_regbase + 0x20000,		    (0x10000 - 1));
+#ifdef MTL_DEBUG
+		x = readl( lcd0_regbase + 0x104 );
+		printk(KERN_INFO "debug lcd0 reg 0x104 = 0x%08x\n", x);
+		x = readl( lcd1_regbase + 0x108 );
+		printk(KERN_INFO "debug lcd0 reg 0x104 = 0x%08x\n", x);
+		x = readl( dcon_regbase + 0x000 );
+		printk(KERN_INFO "debug dcon reg 0x000 = 0x%08x\n", x);
+#endif
+	}
+
+	printk(KERN_WARNING "dovefb_display driver init ok.\n");
+	return 0;
+}
+
+static void __exit
+dovefb_display_exit(void)
+{
+	iounmap(lcd0_regbase);
+	iounmap(lcd1_regbase);
+	iounmap(dcon_regbase);
+	unregister_chrdev(30, "display tools");
+	printk(KERN_WARNING "dovefb_display driver unload OK.\n");
+}
+
+module_init(dovefb_display_init);
+module_exit(dovefb_display_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("Display mode driver");
+
--- linux-mvl-dove-2.6.32.orig/drivers/video/marvell/Makefile
+++ linux-mvl-dove-2.6.32/drivers/video/marvell/Makefile
@@ -0,0 +1,9 @@
+#
+# Makefile for Marvell's framebuffer device driver
+#
+
+obj-$(CONFIG_FB_DOVE)          += dovefb_base.o dovefb_gfx.o dovefb_ovly.o dovefb_gpio.o
+
+obj-$(CONFIG_FB_DOVE_DCON)     += dovedcon.o
+
+obj-$(CONFIG_DOVEFB_DISPLAY_MODE)	+=	dovefb_display.o
--- linux-mvl-dove-2.6.32.orig/drivers/video/marvell/dovefb_gfx.c
+++ linux-mvl-dove-2.6.32/drivers/video/marvell/dovefb_gfx.c
@@ -0,0 +1,1626 @@
+/*
+ * linux/drivers/video/dovefb.c -- Marvell DOVE LCD Controller
+ *
+ * Copyright (C) Marvell Semiconductor Company.  All rights reserved.
+ *
+ * Written by:
+ *	Green Wan <gwan@marvell.com>
+ *	Shadi Ammouri <shadi@marvell.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive for
+ * more details.
+ */
+
+/*
+ * 1. Adapted from:  linux/drivers/video/skeletonfb.c
+ * 2. Merged code base from: linux/drivers/video/dovefb.c (Lennert Buytenhek)
+ */
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/interrupt.h>
+#include <linux/console.h>
+#include <linux/slab.h>
+#include <linux/fb.h>
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/ioport.h>
+#include <linux/cpufreq.h>
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+//#include <asm/hardware.h>
+#include <linux/timer.h>
+#include <linux/uaccess.h>
+#include <linux/io.h>
+#include <linux/i2c-algo-bit.h>
+#include <asm/irq.h>
+
+#include "../edid.h"
+#include <video/dovefb.h>
+#include <video/dovefbreg.h>
+
+#include "dovefb_if.h"
+#include <video/ch7025_composite.h>
+#include <video/kg2.h>
+#define MAX_HWC_SIZE		(64*64*2)
+#define DEFAULT_REFRESH		60	/* Hz */
+#define DEFAULT_EDID_INTERVAL   30	/* seconds */
+
+static int dovefb_fill_edid(struct fb_info *fi,
+				struct dovefb_mach_info *dmi);
+static int wait_for_vsync(struct dovefb_layer_info *dfli);
+static void dovefb_set_defaults(struct dovefb_layer_info *dfli);
+
+#define AXI_BASE_CLK	(2000000000ll)	/* 2000MHz */
+
+static const u8 edid_header[] = {
+        0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
+};
+
+static void set_clock_divider(struct dovefb_layer_info *dfli,
+	const struct fb_videomode *m)
+{
+	int divider_int;
+	u32 needed_pixclk;
+	u64 div_result;
+	u32 x = 0, x_bk;
+	struct dovefb_info *info = dfli->info;
+	u32 ref_clk;
+	u32 isInterlaced = 0;
+
+	/*
+	 * Notice: The field pixclock is used by linux fb
+	 * is in pixel second. E.g. struct fb_videomode &
+	 * struct fb_var_screeninfo
+	 */
+
+	/*
+	 * Check input values.
+	 */
+	if (!m || !m->pixclock || !m->refresh) {
+		printk(KERN_ERR "Input refresh or pixclock is wrong.\n");
+		return;
+	}
+
+	/*
+	 * Check interlaced mode
+	 */
+	isInterlaced = (m->vmode & FB_VMODE_INTERLACED) ? 1 : 0;
+
+	/* Select clk source.
+	 * 0x0 = AXI Clock, 333MHz, We don't change it.
+	 * 0x1 = external reference clock#0
+	 * 0x2 = PLL Clock, Original PLL clock is 2GHz.
+	 *       a. when under inaccurate mode, we fix it to a specific
+	 *          speed according Kconfig(default 1GHz).
+	 *       b. When under accurate mode, PLL clk divider and LCD
+	 *          internal divider will be configured to apropriate
+	 *          value to get most accurate pixel clock.
+	 * 0x3 = external reference clock#1
+	 */
+	x = info->clk_src << 30;
+
+	/*
+	 * If under fixed output mode, choosing fixed video mode.
+	 */
+	if(info->fixed_output)
+		m = &info->out_vmode;
+
+	/*
+	 * fb video mode is pico second not pixel clock speed.
+	 * Pixel clock = 1000,000,000,000 / pico second
+	 */
+	div_result = 1000000000000ll;
+	do_div(div_result, m->pixclock);
+
+	/*
+	 * If turn on interlaced mode, pixel clock only needs half speed.
+	 */
+	needed_pixclk = (u32)(isInterlaced ? (div_result/2) : div_result);
+
+	/*
+	 * Configure reference clock speed and lcd internal internal divider.
+	 */
+	/*
+	 * 1. Set up reference clock speed.
+	 */
+	clk_set_rate(info->clk, needed_pixclk);
+	/*
+	 * 2. Calc LCD internal divider
+	 */
+	ref_clk = clk_get_rate(info->clk);
+	divider_int = (ref_clk + (needed_pixclk / 2)) / needed_pixclk;
+
+	/* check whether internal divisor is too small. */
+	if (divider_int < 1) {
+		printk(KERN_WARNING "Warning: clock source is too slow."
+		       "Try smaller resolution\n");
+		divider_int = 1;
+	}
+
+	/*
+	 * Set setting to reg.
+	 */
+	x_bk = readl(dfli->reg_base + LCD_CFG_SCLK_DIV);
+	x |= divider_int;
+
+	if (x != x_bk)
+		writel(x, dfli->reg_base + LCD_CFG_SCLK_DIV);
+}
+
+static void set_dma_control0(struct dovefb_layer_info *dfli)
+{
+	u32 x, x_bk;
+	struct fb_var_screeninfo *var = &dfli->fb_info->var;
+
+	/*
+	 * Set bit to enable graphics DMA.
+	 */
+	x_bk = x = readl(dfli->reg_base + LCD_SPU_DMA_CTRL0);
+	//x |= (dfli->active && dfli->enabled) ? CFG_GRA_ENA_MASK : 0;
+	x |= CFG_GRA_ENA_MASK;
+	dfli->active = 0;
+
+	/*
+	 * If we are in a pseudo-color mode, we need to enable
+	 * palette lookup.
+	 */
+	if (dfli->pix_fmt == PIX_FMT_PSEUDOCOLOR)
+		x |= 0x10000000;
+	else
+		x &= ~0x10000000;
+
+	/*
+	 * enable horizontal smooth scaling.
+	 */
+	x |= 0x1 << 14;
+
+	/*
+	 * Cursor enabled?
+	 */
+	if (dfli->cursor_enabled)
+		x |= 0x01000000;
+
+	/*
+	 * Configure hardware pixel format.
+	 */
+	x &= ~(0xF << 16);
+	x |= (dfli->pix_fmt >> 1) << 16;
+
+	/*
+	 * Check red and blue pixel swap.
+	 * 1. source data swap
+	 * 2. panel output data swap
+	 */
+	x &= ~(1 << 12);
+	x |= ((dfli->pix_fmt & 1) ^ (dfli->info->panel_rbswap)) << 12;
+
+	/*
+	 * Enable toogle to generate interlace mode.
+	 */
+	if (FB_VMODE_INTERLACED & var->vmode) {
+		x |= CFG_GRA_FTOGGLE_MASK;
+		dfli->reserved |= 0x1;
+	} else {
+		x &= ~CFG_GRA_FTOGGLE_MASK;
+		dfli->reserved &= ~0x1;
+	}
+
+	if (x != x_bk)
+		writel(x, dfli->reg_base + LCD_SPU_DMA_CTRL0);
+}
+
+static void set_dma_control1(struct dovefb_layer_info *dfli, int sync)
+{
+	u32 x, x_bk;
+
+	/*
+	 * Configure default bits: vsync triggers DMA, gated clock
+	 * enable, power save enable, configure alpha registers to
+	 * display 100% graphics, and set pixel command.
+	 */
+	x_bk = x = readl(dfli->reg_base + LCD_SPU_DMA_CTRL1);
+
+	/*
+	 * We trigger DMA on the falling edge of vsync if vsync is
+	 * active low, or on the rising edge if vsync is active high.
+	 */
+	if (!(sync & FB_SYNC_VERT_HIGH_ACT))
+		x |= 0x08000000;
+
+	if (x != x_bk)
+		writel(x, dfli->reg_base + LCD_SPU_DMA_CTRL1);
+}
+
+static int wait_for_vsync(struct dovefb_layer_info *dfli)
+{
+	if (dfli) {
+		u32 irq_ena = readl(dfli->reg_base + SPU_IRQ_ENA);
+		int rc = 0;
+		unsigned int mask = DOVEFB_GFX_INT_MASK | DOVEFB_VSYNC_INT_MASK;
+
+		writel(irq_ena | mask, dfli->reg_base + SPU_IRQ_ENA);
+
+		rc = wait_event_interruptible_timeout(dfli->w_intr_wq,
+						      atomic_read(&dfli->w_intr), 4);
+		if ( rc < 0) {
+			u32 irq_isr = readl(dfli->reg_base + SPU_IRQ_ISR);
+			if ((irq_isr & mask) != 0)
+				printk(KERN_WARNING "%s: gfx wait for vsync"
+				" timed out, rc %d\n",
+				__func__, rc);
+		}
+
+		writel(irq_ena,
+		       dfli->reg_base + SPU_IRQ_ENA);
+		atomic_set(&dfli->w_intr, 0);
+		return 0;
+	}
+
+	return 0;
+}
+
+static void set_dumb_panel_control(struct fb_info *fi, int gpio_only)
+{
+	struct dovefb_layer_info *dfli = fi->par;
+	struct dovefb_mach_info *dmi = dfli->dev->platform_data;
+	u32	mask = 0x1;
+	u32 x, x_bk;
+
+	/*
+	 * Preserve enable flag.
+	 */
+	if (gpio_only)
+		mask |= ~(0xffff << 12);
+	x_bk = readl(dfli->reg_base + LCD_SPU_DUMB_CTRL) & mask;
+	x = dfli->is_blanked ? 0x0:0x1;
+
+	x |= dmi->gpio_output_data << 20;
+	x |= dmi->gpio_output_mask << 12;
+	if (!gpio_only) {
+		if (dfli->is_blanked &&
+			(dmi->panel_rgb_type == DUMB24_RGB888_0))
+			x |= 0x7 << 28;
+		else
+			/*
+			 * When dumb interface isn't under 24bit
+			 * It might be under SPI or GPIO. If set
+			 * to 0x7 will force LCD_D[23:0] output
+			 * blank color and damage GPIO and SPI
+			 * behavior.
+			 */
+			x |= dmi->panel_rgb_type << 28;
+		x |= dmi->panel_rgb_reverse_lanes ? 0x00000080 : 0;
+		x |= dmi->invert_composite_blank ? 0x00000040 : 0;
+		x |= (fi->var.sync & FB_SYNC_COMP_HIGH_ACT) ? 0x00000020 : 0;
+		x |= dmi->invert_pix_val_ena ? 0x00000010 : 0;
+		x |= (fi->var.sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : 0x00000008;
+		x |= (fi->var.sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : 0x00000004;
+		x |= dmi->invert_pixclock ? 0x00000002 : 0;
+	}
+
+	if (x != x_bk)
+		writel(x, dfli->reg_base + LCD_SPU_DUMB_CTRL);
+}
+
+static void set_graphics_start(struct fb_info *fi, int xoffset, int yoffset)
+{
+	struct dovefb_layer_info *dfli = fi->par;
+	struct fb_var_screeninfo *var = &fi->var;
+	int pixel_offset0, pixel_offset1;
+	unsigned long addr0, addr1, x;
+
+	pixel_offset0 = (yoffset * var->xres_virtual) + xoffset;
+	addr0 = dfli->fb_start_dma +
+		(pixel_offset0 * (var->bits_per_pixel >> 3));
+	/*
+	 * Configure interlace mode.
+	 */
+	if ( FB_VMODE_INTERLACED & var->vmode) {
+		/*
+		 * Calc offset. (double offset).
+		 * frame0 point to odd line,
+		 * frame1 point to even line.
+		 */
+		pixel_offset1 = pixel_offset0 + var->xres_virtual;
+		addr1 = dfli->fb_start_dma +
+			(pixel_offset1 * (var->bits_per_pixel >> 3));
+
+		/*
+		 * Calc Pitch. (double pitch length)
+		 */
+		x = readl(dfli->reg_base + LCD_CFG_GRA_PITCH);
+		x = (x & ~0xFFFF) | ((var->xres_virtual * var->bits_per_pixel) >> 2);
+
+	} else {
+		/*
+		 * Calc offset.
+		 */
+		addr1 = addr0;
+
+		/*
+		 * Calc Pitch.
+		 */
+		x = readl(dfli->reg_base + LCD_CFG_GRA_PITCH);
+		x = (x & ~0xFFFF) | ((var->xres_virtual * var->bits_per_pixel) >> 3);
+	}
+
+	writel(addr0, dfli->reg_base + LCD_CFG_GRA_START_ADDR0);
+	writel(addr1, dfli->reg_base + LCD_CFG_GRA_START_ADDR1);
+	writel(x, dfli->reg_base + LCD_CFG_GRA_PITCH);
+}
+
+static int set_frame_timings(const struct dovefb_layer_info *dfli,
+	const struct fb_var_screeninfo *var)
+{
+	struct dovefb_info *info = dfli->info;
+	unsigned int active_w, active_h;
+	unsigned int ow, oh;
+	unsigned int zoomed_w, zoomed_h;
+	unsigned int lem, rim, lom, upm, hs, vs;
+	unsigned int x;
+	int total_w, total_h;
+	unsigned int reg, reg_bk;
+
+	/*
+	 * Calc active size, zoomed size, porch.
+	 */
+	if (info->fixed_output) {
+		active_w = info->out_vmode.xres;
+		active_h = info->out_vmode.yres;
+		zoomed_w = info->out_vmode.xres;
+		zoomed_h = info->out_vmode.yres;
+		lem = info->out_vmode.left_margin;
+		rim = info->out_vmode.right_margin;
+		upm = info->out_vmode.upper_margin;
+		lom = info->out_vmode.lower_margin;
+		hs = info->out_vmode.hsync_len;
+		vs = info->out_vmode.vsync_len;
+	} else {
+		active_w = var->xres;
+		active_h = var->yres;
+		zoomed_w = var->xres;
+		zoomed_h = var->yres;
+		lem = var->left_margin;
+		rim = var->right_margin;
+		upm = var->upper_margin;
+		lom = var->lower_margin;
+		hs = var->hsync_len;
+		vs = var->vsync_len;
+	}
+
+	/*
+	 * Calc original size.
+	 */
+	ow = var->xres;
+	oh = var->yres;
+
+	/* interlaced workaround */
+	if (FB_VMODE_INTERLACED & var->vmode) {
+		active_h /= 2;
+		zoomed_h /= 2;
+		oh /= 2;
+	}
+
+	/* calc total width and height.*/
+	total_w = active_w + rim + hs + lem;
+	total_h = active_h + lom + vs + upm;
+
+	/*
+	 * Apply setting to registers.
+	 */
+	writel((active_h << 16) | active_w,
+		dfli->reg_base + LCD_SPU_V_H_ACTIVE);
+
+	writel((oh << 16) | ow,
+		dfli->reg_base + LCD_SPU_GRA_HPXL_VLN);
+
+	writel((zoomed_h << 16) | zoomed_w,
+		dfli->reg_base + LCD_SPU_GZM_HPXL_VLN);
+
+	writel((lem << 16) | rim, dfli->reg_base + LCD_SPU_H_PORCH);
+	writel((upm << 16) | lom, dfli->reg_base + LCD_SPU_V_PORCH);
+
+	reg_bk = readl(dfli->reg_base + LCD_SPUT_V_H_TOTAL);
+	reg = (total_h << 16)|total_w;
+
+	if (reg != reg_bk)
+		writel(reg, dfli->reg_base + LCD_SPUT_V_H_TOTAL);
+	/*
+	 * Configure vsync adjust logic
+	 */
+	x = readl(dfli->reg_base+LCD_SPU_ADV_REG);
+	x &= ~((0x1 << 12) | (0xfff << 20) | 0xfff);
+	x |=	(0x1 << 12) | (active_w+rim) << 20 | (active_w+rim);
+	writel( x, dfli->reg_base+LCD_SPU_ADV_REG);
+
+	return 0;
+}
+
+/*
+ * fake edid is for all LCD default support modes.
+ * [Supported Mode]                     [from which spec]
+ * ------------------------------------------------------
+ * 1. Supported established timings:
+ *     640x480  @60Hz                   (Industry Standard)
+ *     800x600  @56Hz                   (VESA Guidlines)
+ *     800x600  @60Hz                   (VESA Guidlines)
+ *     1024x768 @60Hz                   (VESA Guidlines)
+ *     1280x1024@75Hz                   (VESA Standard)
+ * 2. Supported standard timings:
+ *     1600x1200@60Hz                   (VESA Standard)
+ *     1280x1024@60Hz                   (VESA Standard)
+ *     1280x960 @60Hz                   (VESA Standard)
+ *     1280x800 @60Hz                   (Reduced Blanking)
+ *     1280x720 @60Hz                   (CEA-861)
+ *     1680x1050@60Hz                   (Reduced Blanking)
+ *     1152x864 @60Hz                   (Reduced Blanking)
+ *     1440x900 @60Hz                   (Reduced Blanking)
+ * 3. Supported detailed timing:
+ *     1920x1200@60Hz pixclk 154.0MHz   (Reduced Blanking)
+ *     1920x1080@60Hz pixclk 148.5MHz   (CEA-861)
+ *     1366x768 @60Hz pixclk  85.8MHz   (VESA standard)
+ *     1280x768 @60Hz pixclk  68.2MHz   (Reduced Blanking)
+ * 4. Detailed timing from extension:
+ *     1024x600 @60Hz pixclk  44.64MHz  (MRVL specified)
+ */
+static u8 fake_edid[] = {
+	0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x36, 0xCC, 0x10, 0x05, 0x01, 0x00, 0x00, 0x00,
+	0x1E, 0x14, 0x01, 0x03, 0x80, 0x34, 0x20, 0x78, 0x22, 0xFE, 0x25, 0xA8, 0x53, 0x37, 0xAE, 0x24,
+	0x11, 0x50, 0x54, 0x23, 0x09, 0x00, 0xA9, 0x40, 0x81, 0x80, 0x81, 0x40, 0x81, 0x00, 0x81, 0xC0,
+	0xB3, 0x00, 0x71, 0x40, 0x95, 0x00, 0x28, 0x3C, 0x80, 0xA0, 0x70, 0xB0, 0x23, 0x40, 0x30, 0x20,
+	0x36, 0x00, 0x06, 0x44, 0x21, 0x00, 0x00, 0x1A, 0x02, 0x3A, 0x80, 0x18, 0x71, 0x38, 0x2D, 0x40,
+	0x58, 0x2C, 0x45, 0x00, 0x06, 0x24, 0x21, 0x00, 0x00, 0x1A, 0x7F, 0x21, 0x56, 0xAA, 0x51, 0x00,
+	0x1E, 0x30, 0x46, 0x8F, 0x33, 0x00, 0x71, 0xD0, 0x10, 0x00, 0x00, 0x1A, 0xA9, 0x1A, 0x00, 0xA0,
+	0x50, 0x00, 0x16, 0x30, 0x30, 0x20, 0x37, 0x00, 0x5A, 0xD0, 0x10, 0x00, 0x00, 0x1A, 0x01, 0x2B,
+	/* extended block 1. */
+	0x02, 0x01, 0x04, 0x00, 0x70, 0x11, 0x00, 0xB0, 0x40, 0x58, 0x14, 0x20, 0x26, 0x64, 0x84, 0x00,
+	0x2C, 0xDE, 0x10, 0x00, 0x00, 0x1A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xA5,
+};
+
+static u8 *make_fake_edid(void)
+{
+	u8 *edid_block;
+	u32 edid_size;
+
+	edid_size = EDID_LENGTH * (1 + fake_edid[0x7e]);
+	edid_block = kmalloc(edid_size, GFP_KERNEL);
+
+	if (!edid_block)
+		return edid_block;
+
+	memcpy(edid_block, fake_edid, edid_size);
+
+	return edid_block;
+}
+
+static u8 *make_analog_fake_edid(void)
+{
+	u8 *edid_block;
+
+	edid_block = make_fake_edid();
+
+	/* change analog input field.*/
+	if (edid_block) {
+		edid_block[20] = 0x06; /* Analog signal features. */
+		edid_block[127] = 0xA5; /* Checksum */
+	}
+
+	return edid_block;
+}
+
+static int dovefb_gfx_set_par(struct fb_info *fi)
+{
+	struct dovefb_layer_info *dfli = fi->par;
+	struct fb_var_screeninfo *var = &fi->var;
+	const struct fb_videomode *m = 0;
+	struct fb_videomode mode;
+	int pix_fmt;
+	u32 x;
+	struct dovefb_mach_info *dmi;
+
+	dmi = dfli->info->dev->platform_data;
+
+	/*
+	 * Determine which pixel format we're going to use.
+	 */
+	pix_fmt = dovefb_determine_best_pix_fmt(&fi->var, dfli);
+	if (pix_fmt < 0)
+		return pix_fmt;
+	dfli->pix_fmt = pix_fmt;
+
+	/*
+	 * Set RGB bit field info.
+	 */
+	dovefb_set_pix_fmt(var, pix_fmt);
+
+	/*
+	 * Set additional mode info.
+	 */
+	if (pix_fmt == PIX_FMT_PSEUDOCOLOR)
+		fi->fix.visual = FB_VISUAL_PSEUDOCOLOR;
+	else
+		fi->fix.visual = FB_VISUAL_TRUECOLOR;
+	fi->fix.line_length = var->xres_virtual * var->bits_per_pixel / 8;
+
+	x = readl(dfli->reg_base + SPU_IRQ_ENA);
+	if (x & DOVEFB_GFX_INT_MASK)
+		wait_for_vsync(dfli);
+
+	/*
+	 * Configure frame timings.
+	 */
+	set_frame_timings(dfli, var);
+
+	/*
+	 * convet var to video mode
+	 */
+	fb_var_to_videomode(&mode, &fi->var);
+	m = &mode;
+
+	/* Calculate clock divisor. */
+	set_clock_divider(dfli, &mode);
+
+	/* Configure dma ctrl regs. */
+	set_dma_control0(dfli);
+	set_dma_control1(dfli, fi->var.sync);
+
+	/*
+	 * Configure graphics DMA parameters.
+	 */
+	set_graphics_start(fi, fi->var.xoffset, fi->var.yoffset);
+
+	/*
+	 * Configure dumb panel ctrl regs & timings.
+	 */
+	set_dumb_panel_control(fi, 0);
+
+	/*
+	 * Re-enable panel output.
+	 */
+	x = readl(dfli->reg_base + LCD_SPU_DUMB_CTRL);
+	if ((x & 0x1) == 0)
+		writel(x | 1, dfli->reg_base + LCD_SPU_DUMB_CTRL);
+#ifdef CONFIG_CH7025_COMPOSITE
+	{
+		struct input_stream_info info;
+		if (strstr(fi->fix.id, "GFX Layer 0")) {
+			info.xres = var->xres;
+			info.yres = var->yres;
+			info.iformat = CH7025_RGB888;
+			info.oformat = CH7025_NTSC_M;
+			info.swap = CH7025_RGB_ORDER;
+
+			printk(KERN_INFO "video ch7025 enable.......\n");
+			ch7025_set_input_stream(&info);
+			ch7025_enable(1);
+		}
+	}
+#endif
+#ifdef CONFIG_KG2_ANX7150
+	{
+		AVC_CMD_TIMING_PARAM kg2_timing_param;
+
+		if (strstr(fi->fix.id, "GFX Layer 0"))
+		{
+			printk(KERN_INFO "dovefb_gfx: Change kg2 input timing\n");
+
+			kg2_timing_param.HTotal = var->left_margin + var->xres + var->right_margin + var->hsync_len;
+			kg2_timing_param.HActive = var->xres;
+			kg2_timing_param.HFrontPorch = var->right_margin;
+			kg2_timing_param.HSyncWidth = var->hsync_len;
+			kg2_timing_param.HPolarity = (var->sync & FB_SYNC_HOR_HIGH_ACT) ? 0: 1;
+			kg2_timing_param.VTotal = var->upper_margin + var->yres + var->lower_margin + var->vsync_len;
+			kg2_timing_param.VActive = var->yres;
+			kg2_timing_param.VFrontPorch = var->lower_margin;
+			kg2_timing_param.VSyncWidth = var->vsync_len;
+			kg2_timing_param.VPolarity = (var->sync & FB_SYNC_VERT_HIGH_ACT) ? 0: 1;
+			kg2_timing_param.AspRatio = (var->xres * 100 / var->yres >= 160) ? AVC_CMD_ASP_RATIO_16_9: AVC_CMD_ASP_RATIO_4_3;
+			kg2_timing_param.IsProgressive = 1;
+			kg2_timing_param.RefRate = mode.refresh;
+
+			kg2_set_input_timing(&kg2_timing_param);
+		}
+	}
+#endif
+
+	return 0;
+}
+
+static int dovefb_pan_display(struct fb_var_screeninfo *var,
+    struct fb_info *fi)
+{
+	wait_for_vsync(fi->par);
+	set_graphics_start(fi, var->xoffset, var->yoffset);
+
+	return 0;
+}
+
+static int dovefb_pwr_off_sram(struct dovefb_layer_info *dfli)
+{
+	unsigned int x;
+
+	if (dfli) {
+		x = readl(dfli->reg_base + LCD_SPU_SRAM_PARA1);
+		x |=	CFG_PDWN256x32_MASK |
+			CFG_PDWN256x24_MASK |
+			CFG_PDWN256x8_MASK;
+		writel(x, dfli->reg_base + LCD_SPU_SRAM_PARA1);
+	}
+
+	return 0;
+}
+
+static int dovefb_pwr_on_sram(struct dovefb_layer_info *dfli)
+{
+	unsigned int x;
+
+	if (dfli) {
+		x = readl(dfli->reg_base + LCD_SPU_SRAM_PARA1);
+		x &=	~(CFG_PDWN256x32_MASK |
+			CFG_PDWN256x24_MASK |
+			CFG_PDWN256x8_MASK);
+		writel(x, dfli->reg_base + LCD_SPU_SRAM_PARA1);
+	}
+
+	return 0;
+}
+
+static int dovefb_blank(int blank, struct fb_info *fi)
+{
+	struct dovefb_layer_info *dfli = fi->par;
+	u32 reg;
+
+	dfli->is_blanked = (blank == FB_BLANK_UNBLANK) ? 0 : 1;
+	set_dumb_panel_control(fi, 0);
+
+	/*
+	 * Fix me: Currently, hardware won't generate video layer
+	 * IRQ or VSync IRQ if diable dumb LCD panel. However, if
+	 * we are playing movies and enter blank mode, video player
+	 * still decode frame to video driver and we can't handle
+	 * those frame data without IRQ events.
+	 * We create a timer to check video buffer and handle those
+	 * frame data to make a workaround version.
+	 */
+	reg = readl(dfli->reg_base + LCD_SPU_DMA_CTRL0) & 0x01;
+	if (reg && dfli->is_blanked && !dfli->checkbuf_timer_exist) {
+		add_timer(&checkbuf_timer);
+		dfli->checkbuf_timer_exist = 1;
+	}
+	if (!dfli->is_blanked && dfli->checkbuf_timer_exist) {
+		del_timer_sync(&checkbuf_timer);
+		dfli->checkbuf_timer_exist = 0;
+	}
+
+	if (dfli->is_blanked)
+		clk_disable(dfli->info->clk);
+	else
+		clk_enable(dfli->info->clk);
+
+	return 0;
+}
+
+#ifdef DOVE_USING_HWC
+static int dovefb_cursor(struct fb_info *fi, struct fb_cursor *cursor)
+{
+	struct dovefb_layer_info *dfli = fi->par;
+	unsigned int x;
+
+	/*
+	 * in some case we don't want to anyone access hwc.
+	 */
+	if (dfli->cursor_cfg == 0)
+		return 0;
+
+	/* Too large of a cursor :-(*/
+	if (cursor->image.width > 64 || cursor->image.height > 64) {
+		printk(KERN_INFO "Error: cursor->image.width = %d"
+				", cursor->image.height = %d\n",
+				cursor->image.width, cursor->image.height);
+		return -ENXIO;
+	}
+
+	/* 1. Disable cursor for updating anything. */
+	if (!cursor->enable) {
+		/* Disable cursor */
+		x = readl(dfli->reg_base + LCD_SPU_DMA_CTRL0) &
+				~CFG_HWC_ENA_MASK;
+		writel(x, dfli->reg_base + LCD_SPU_DMA_CTRL0);
+		dfli->cursor_enabled = 0;
+	}
+
+	/* 2. Set Cursor Image */
+	if (cursor->set & FB_CUR_SETIMAGE) {
+		/*
+		 * Not supported
+		 */
+	}
+
+	/* 3. Set Cursor position */
+	if (cursor->set & FB_CUR_SETPOS) {
+		/* set position */
+		x =  ((CFG_HWC_OVSA_VLN((cursor->image.dy - fi->var.yoffset)))|
+			(cursor->image.dx - fi->var.xoffset));
+		writel(x, dfli->reg_base + LCD_SPU_HWC_OVSA_HPXL_VLN);
+	}
+
+	/* 4. Set Cursor Hot spot */
+	if (cursor->set & FB_CUR_SETHOT);
+	/* set input value to HW register */
+
+	/* 5. set Cursor color, Hermon2 support 2 cursor color. */
+	if (cursor->set & FB_CUR_SETCMAP) {
+		u32 bg_col_idx;
+		u32 fg_col_idx;
+		u32 fg_col, bg_col;
+
+		bg_col_idx = cursor->image.bg_color;
+		fg_col_idx = cursor->image.fg_color;
+		fg_col = (((u32)fi->cmap.red[fg_col_idx] & 0xff00) << 8) |
+			 (((u32)fi->cmap.green[fg_col_idx] & 0xff00) << 0) |
+			 (((u32)fi->cmap.blue[fg_col_idx] & 0xff00) >> 8);
+		bg_col = (((u32)fi->cmap.red[bg_col_idx] & 0xff00) << 8) |
+			 (((u32)fi->cmap.green[bg_col_idx] & 0xff00) << 0) |
+			 (((u32)fi->cmap.blue[bg_col_idx] & 0xff00) >> 8);
+
+		/* set color1. */
+		writel(fg_col, dfli->reg_base + LCD_SPU_ALPHA_COLOR1);
+
+		/* set color2. */
+		writel(bg_col, dfli->reg_base + LCD_SPU_ALPHA_COLOR2);
+	}
+
+	/* don't know how to set bitmask yet. */
+	if (cursor->set & FB_CUR_SETSHAPE);
+
+	if (cursor->set & FB_CUR_SETSIZE) {
+		int i;
+		int data_len;
+		u32 data_tmp;
+		u32 addr = 0;
+		int width;
+		int height;
+
+		width = cursor->image.width;
+		height = cursor->image.height;
+
+		data_len = ((width*height*2) + 31) >> 5;
+
+		/* 2. prepare cursor data */
+		for (i = 0; i < data_len; i++) {
+			/* Prepare data */
+			writel(0xffffffff, dfli->reg_base+LCD_SPU_SRAM_WRDAT);
+
+			/* write hwc sram */
+			data_tmp = CFG_SRAM_INIT_WR_RD(SRAMID_INIT_WRITE)|
+					CFG_SRAM_ADDR_LCDID(SRAMID_hwc)|
+					addr;
+			writel(data_tmp, dfli->reg_base+LCD_SPU_SRAM_CTRL);
+
+			/* increasing address */
+			addr++;
+		}
+
+		/* set size to register */
+		x = CFG_HWC_VLN(cursor->image.height)|cursor->image.width;
+		writel(x, dfli->reg_base + LCD_SPU_HWC_HPXL_VLN);
+	}
+
+	if (cursor->set & FB_CUR_SETALL);
+	/* We have set all the flag above. Enable H/W Cursor. */
+
+	/* if needed, enable cursor again */
+	if (cursor->enable) {
+		/* Enable cursor. */
+		x = readl(dfli->reg_base + LCD_SPU_DMA_CTRL0) |
+			CFG_HWC_ENA(0x1);
+		writel(x, dfli->reg_base + LCD_SPU_DMA_CTRL0);
+		dfli->cursor_enabled = 1;
+	}
+	return 0;
+}
+#endif
+
+static int dovefb_fb_sync(struct fb_info *info)
+{
+	/*struct dovefb_layer_info *dfli = info->par;*/
+
+	return 0; /*wait_for_vsync(dfli);*/
+}
+
+
+/*
+ *  dovefb_handle_irq(two lcd controllers)
+ */
+int dovefb_gfx_handle_irq(u32 isr, struct dovefb_layer_info *dfli)
+{
+	if (0x1 & dfli->reserved) {
+		unsigned int vs_adj, x;
+		unsigned int active_w, h_fp;
+
+		active_w = 0xffff & readl(dfli->reg_base + LCD_SPU_V_H_ACTIVE);
+		h_fp = 0xffff & readl(dfli->reg_base + LCD_SPU_H_PORCH);
+
+		/* interlace mode workaround. */
+		if (GRA_FRAME_IRQ0_ENA_MASK & isr) {
+			vs_adj = active_w + h_fp;
+		} else {
+			vs_adj = (active_w/2) + h_fp;
+		}
+
+		x = readl(dfli->reg_base+LCD_SPU_ADV_REG);
+		x &= ~((0x1 << 12) | (0xfff << 20) | 0xfff);
+		x |= (0x1 << 12) | (vs_adj << 20) | vs_adj;
+		writel( x, dfli->reg_base+LCD_SPU_ADV_REG);
+	}
+
+	/* wake up queue. */
+	atomic_set(&dfli->w_intr, 1);
+	wake_up(&dfli->w_intr_wq);
+	return 1;
+}
+
+
+static u32 dovefb_moveHWC2SRAM(struct dovefb_layer_info *dfli, u32 size)
+{
+	u32 i, addr, count, sramCtrl, data_length, count_mod;
+	u32 *tmpData = 0;
+	u8 *pBuffer = dfli->hwc_buf;
+
+	/* Initializing value. */
+	addr = 0;
+	sramCtrl = 0;
+	data_length = size ; /* in byte. */
+	count = data_length / 4;
+	count_mod = data_length % 4;
+	tmpData  = (u32 *)pBuffer;
+
+	/* move new cursor bitmap to SRAM */
+	/* printk(KERN_INFO "\n-------< cursor binary data >--------\n\n"); */
+	for (i = 0; i < count; i++) {
+		/* Prepare data */
+		writel(*tmpData, dfli->reg_base + LCD_SPU_SRAM_WRDAT);
+
+		/* printk(KERN_INFO "%d %8x\n\n", i, tmpData); */
+		/* write hwc sram */
+		sramCtrl = CFG_SRAM_INIT_WR_RD(SRAMID_INIT_WRITE)|
+				CFG_SRAM_ADDR_LCDID(SRAMID_hwc)|
+				addr;
+		writel(sramCtrl, dfli->reg_base + LCD_SPU_SRAM_CTRL);
+
+		/* increasing address */
+		addr++;
+		tmpData++;
+	}
+	/* printk(KERN_INFO "\n---< end of cursor binary data >---\n\n");
+	*/
+
+	/* not multiple of 4 bytes. */
+	if (count_mod != 0) {
+		printk(KERN_INFO "Error: move_count_mod != 0 \n");
+		return -ENXIO;
+	}
+
+	return 0;
+}
+
+
+static u32 dovefb_set_cursor(struct fb_info *info,
+			      struct _sCursorConfig *cursor_cfg)
+{
+	u16 w;
+	u16 h;
+	unsigned int x;
+	struct dovefb_layer_info *dfli = info->par;
+
+	/* Disable cursor */
+	dfli->cursor_enabled = 0;
+	dfli->cursor_cfg = 0;
+	x = readl(dfli->reg_base + LCD_SPU_DMA_CTRL0) &
+		~(CFG_HWC_ENA_MASK|CFG_HWC_1BITENA_MASK|CFG_HWC_1BITMOD_MASK);
+	writel(x, dfli->reg_base + LCD_SPU_DMA_CTRL0);
+
+	if (cursor_cfg->enable) {
+		dfli->cursor_enabled = 1;
+		dfli->cursor_cfg = 1;
+		w  = cursor_cfg->width;
+		h = cursor_cfg->height;
+
+		/* set cursor display mode */
+		if (DOVEFB_HWCMODE_1BITMODE == cursor_cfg->mode) {
+			/* set to 1bit mode */
+			x |= CFG_HWC_1BITENA(0x1);
+
+			/* copy HWC buffer */
+			if (cursor_cfg->pBuffer) {
+				memcpy(dfli->hwc_buf, cursor_cfg->pBuffer,
+					(w*h)>>3);
+				dovefb_moveHWC2SRAM(dfli, (w*h)>>3);
+			}
+		} else if (DOVEFB_HWCMODE_2BITMODE == cursor_cfg->mode) {
+			/* set to 2bit mode */
+			/* do nothing, clear to 0 is 2bit mode. */
+
+			/* copy HWC buffer */
+			if (cursor_cfg->pBuffer) {
+				memcpy(dfli->hwc_buf, cursor_cfg->pBuffer,
+					(w*h*2)>>3) ;
+				dovefb_moveHWC2SRAM(dfli, (w*h*2)>>3);
+			}
+		} else {
+			printk(KERN_INFO "dovefb: Unsupported HWC mode\n");
+			return -ENXIO;
+		}
+
+		/* set color1 & color2 */
+		writel(cursor_cfg->color1,
+			dfli->reg_base + LCD_SPU_ALPHA_COLOR1);
+		writel(cursor_cfg->color2,
+			dfli->reg_base + LCD_SPU_ALPHA_COLOR2);
+
+		/* set position on screen */
+		writel((CFG_HWC_OVSA_VLN(cursor_cfg->yoffset))|
+			(cursor_cfg->xoffset),
+			dfli->reg_base + LCD_SPU_HWC_OVSA_HPXL_VLN);
+
+		/* set cursor size */
+		writel(CFG_HWC_VLN(cursor_cfg->height)|cursor_cfg->width,
+			dfli->reg_base + LCD_SPU_HWC_HPXL_VLN);
+
+		/* Enable cursor */
+		x |= CFG_HWC_ENA(0x1);
+		writel(x, dfli->reg_base + LCD_SPU_DMA_CTRL0);
+	} else {
+		/* do nothing, we disabled it already. */
+	}
+
+	return 0;
+}
+
+
+static int dovefb_gfx_ioctl(struct fb_info *info, unsigned int cmd,
+		unsigned long arg)
+{
+	void __user *argp = (void __user *)arg;
+	struct dovefb_layer_info *dfli = info->par;
+
+	switch (cmd) {
+	case DOVEFB_IOCTL_WAIT_VSYNC:
+		wait_for_vsync(dfli);
+		break;
+	case DOVEFB_IOCTL_CONFIG_CURSOR:
+	{
+		struct _sCursorConfig cursor_cfg;
+
+		if (copy_from_user(&cursor_cfg, argp, sizeof(cursor_cfg)))
+			return -EFAULT;
+
+		return dovefb_set_cursor(info, &cursor_cfg);
+	}
+	case DOVEFB_IOCTL_DUMP_REGS:
+		dovefb_dump_regs(dfli->info);
+		break;
+	case DOVEFB_IOCTL_GET_EDID_INFO:
+		if (copy_to_user(argp, &dfli->edid_info,
+					sizeof(struct _sEdidInfo)))
+			return -EFAULT;
+		dfli->edid_info.change = 0;
+		break;
+	case DOVEFB_IOCTL_GET_EDID_DATA:
+		if (dfli->raw_edid != NULL) {
+			if (copy_to_user(argp, dfli->raw_edid, EDID_LENGTH *
+					 (dfli->edid_info.extension + 1)))
+				return -EFAULT;
+		}
+		break;
+	case DOVEFB_IOCTL_SET_EDID_INTERVAL:
+		if (!dfli->ddc_polling_disable) {
+			dfli->edid_info.interval = (arg > 0) ? arg :
+				DEFAULT_EDID_INTERVAL;
+			mod_timer(&dfli->get_edid_timer, jiffies +
+				  dfli->edid_info.interval * HZ);
+		}
+		break;
+
+	default:
+		;
+	}
+
+	return 0;
+}
+
+static bool dovefb_edid_block_valid(u8 *raw_edid)
+{
+        int i;
+
+	if (raw_edid[0] == 0x00)
+		for (i = 0; i < sizeof(edid_header); i++)
+			if (raw_edid[i] != edid_header[i])
+				return 0;
+
+	return 1;
+}
+
+static int dovefb_do_probe_ddc_edid(struct i2c_adapter *adapter, int address,
+			unsigned char *buf, int block, int len)
+{
+        unsigned char start = block * EDID_LENGTH;
+        struct i2c_msg msgs[] = {
+                {
+                        .addr   = address,
+                        .flags  = 0,
+                        .len    = 1,
+                        .buf    = &start,
+                }, {
+                        .addr   = address,
+                        .flags  = I2C_M_RD,
+                        .len    = len,
+                        .buf    = buf + start,
+                }
+        };
+
+        if (i2c_transfer(adapter, msgs, 2) == 2)
+                return 0;
+
+        return -1;
+}
+
+static u8 *dovefb_get_edid(struct i2c_adapter *adapter, int address)
+{
+        int i, j = 0;
+        u8 *block, *new;
+
+        if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
+                return NULL;
+
+        /* base block fetch */
+        for (i = 0; i < 4; i++) {
+                if (dovefb_do_probe_ddc_edid(adapter, address, block, 0, EDID_LENGTH))
+                        goto out;
+                if (dovefb_edid_block_valid(block))
+                        break;
+        }
+        if (i == 4)
+                goto carp;
+
+        /* if there's no extensions, we're done */
+        if (block[0x7e] == 0)
+                return block;
+
+        new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL);
+        if (!new)
+                goto out;
+        block = new;
+
+        for (j = 1; j <= block[0x7e]; j++) {
+                for (i = 0; i < 4; i++) {
+                        if (dovefb_do_probe_ddc_edid(adapter, address, block, j,
+                                                  EDID_LENGTH))
+                                goto out;
+                        if (dovefb_edid_block_valid(block + j * EDID_LENGTH))
+                                break;
+                }
+                if (i == 4)
+                        goto carp;
+        }
+
+        return block;
+
+carp:
+        //printk(KERN_ERR " EDID block %d invalid.\n", j);
+
+out:
+        kfree(block);
+        return NULL;
+}
+
+static u8 *dove_read_edid(struct fb_info *fi, struct dovefb_mach_info *dmi)
+{
+#ifdef CONFIG_FB_DOVE_CLCD_EDID
+	struct i2c_adapter *dove_i2c;
+#endif
+	char *edid_data = NULL;
+	if (-1 == dmi->ddc_i2c_adapter)
+		return edid_data;
+
+#ifdef CONFIG_FB_DOVE_CLCD_EDID
+	dove_i2c = i2c_get_adapter(dmi->ddc_i2c_adapter);
+	/*
+	 * Check match or not.
+	 */
+	if (dove_i2c){
+		//printk(KERN_INFO "  o Found i2c adapter for EDID detection\n");
+	} else {
+		printk(KERN_WARNING "Couldn't find any I2C bus for EDID"
+		       " provider\n");
+		return NULL;
+	}
+	/* Look for EDID data on the selected bus */
+	edid_data = dovefb_get_edid(dove_i2c,dmi->ddc_i2c_address);
+#endif
+	return edid_data;
+}
+
+static int dovefb_fill_edid(struct fb_info *fi,
+				struct dovefb_mach_info *dmi)
+{
+	struct dovefb_layer_info *dfli = fi->par;
+	struct dovefb_info *info = dfli->info;
+	int ret = 0;
+	char *edid;
+
+	/*
+	 * check edid is ready.
+	 */
+	if (info->edid)
+		return ret;
+
+	if (!info->edid_en)
+		return -3;
+
+	/*
+	 * Try to read EDID
+	 */
+	edid = dove_read_edid(fi, dmi);
+	if (edid == NULL) {
+		printk(KERN_INFO "  o Failed to read EDID information,"
+		    "using driver resolutions table.\n");
+		ret = -1;
+	} else {
+		/*
+		 * parse and store edid.
+		 */
+		struct fb_monspecs *specs = &fi->monspecs;
+
+		fb_edid_to_monspecs(edid, specs);
+
+		if (specs->modedb) {
+			fb_videomode_to_modelist(specs->modedb,
+						specs->modedb_len,
+						&fi->modelist);
+			info->edid = 1;
+		} else {
+			ret = -2;
+		}
+		if (dfli->raw_edid) kfree(dfli->raw_edid);
+		dfli->raw_edid = edid;
+	}
+
+	return ret;
+}
+
+
+static void dovefb_set_defaults(struct dovefb_layer_info *dfli)
+{
+	unsigned int x;
+
+	writel(0x80000001, dfli->reg_base + LCD_CFG_SCLK_DIV);
+	writel(0x00000000, dfli->reg_base + LCD_SPU_BLANKCOLOR);
+	/* known h/w issue. The bit [18:19] might
+	 * 1. make h/w irq not workable. */
+	/* 2. make h/w output skew data. */
+	writel(dfli->info->io_pin_allocation,
+			dfli->reg_base + SPU_IOPAD_CONTROL);
+	writel(0x00000000, dfli->reg_base + LCD_CFG_GRA_START_ADDR1);
+	writel(0x00000000, dfli->reg_base + LCD_SPU_GRA_OVSA_HPXL_VLN);
+	writel(0x0, dfli->reg_base + LCD_SPU_SRAM_PARA0);
+	writel(CFG_CSB_256x32(0x1)|CFG_CSB_256x24(0x1)|CFG_CSB_256x8(0x1),
+		dfli->reg_base + LCD_SPU_SRAM_PARA1);
+	writel(0x2032FF81, dfli->reg_base + LCD_SPU_DMA_CTRL1);
+
+	/*
+	 * Fix me: to avoid jiggling issue for high resolution in
+	 * dual display, we set watermark to affect LCD AXI read
+	 * from MC (default 0x80). Lower watermark means LCD will
+	 * do DMA read more often.
+	 */
+	x = readl(dfli->reg_base + LCD_CFG_RDREG4F);
+	/* watermark */
+	x &= ~0xFF;
+	x |= 0x20;
+	/* Disable LCD SRAM Read Wait State to resolve HWC32 make
+	 * system hang while use external clock.
+	 */
+	x &= ~(1<<11);
+	writel(x, dfli->reg_base + LCD_CFG_RDREG4F);
+
+	return;
+}
+
+const struct fb_videomode *dovefb_find_nearest_mode(const struct fb_videomode *mode,
+					        struct list_head *head)
+{
+	struct list_head *pos;
+	struct fb_modelist *modelist;
+	struct fb_videomode *cmode, *best = NULL;
+	u32 diff = -1, diff_refresh = -1;
+	u32 idx = 0;
+
+	list_for_each(pos, head) {
+		u32 d;
+
+		modelist = list_entry(pos, struct fb_modelist, list);
+		cmode = &modelist->mode;
+		d = abs(cmode->xres - mode->xres) +
+			abs(cmode->yres - mode->yres);
+		if (diff > d) {
+			diff = d;
+			best = cmode;
+			diff_refresh = -1;
+
+			d = abs(cmode->refresh - mode->refresh);
+			if (diff_refresh > d) {
+				diff_refresh = d;
+			}
+		} else if (diff == d) {
+			d = abs(cmode->refresh - mode->refresh);
+			if (diff_refresh > d) {
+				diff_refresh = d;
+				best = cmode;
+			}
+		}
+
+		idx++;
+	}
+
+	return best;
+}
+
+static void dovefb_list_vmode(const char *id, struct list_head *head)
+{
+	struct list_head *pos;
+	struct fb_modelist *modelist;
+	struct fb_videomode *m = NULL;
+	u32 idx = 0;
+
+	printk(KERN_INFO "------------<%s video mode database>-----------\n", id);
+	list_for_each(pos, head) {
+
+		modelist = list_entry(pos, struct fb_modelist, list);
+		m = &modelist->mode;
+
+		if (m)
+			printk(KERN_INFO "mode %d: <%4dx%4d@%d> pico=%d\n"
+				"\tfb timings   %4d %4d %4d %4d %4d %4d\n"
+				"\txorg timings %4d %4d %4d %4d %4d %4d %4d %4d\n",
+				idx++, m->xres, m->yres, m->refresh, m->pixclock,
+				m->left_margin, m->right_margin, m->upper_margin, m->lower_margin, m->hsync_len, m->vsync_len,
+				m->xres,
+				m->xres + m->right_margin,
+				m->xres + m->right_margin + m->hsync_len,
+				m->xres + m->right_margin + m->hsync_len + m->left_margin,
+				m->yres,
+				m->yres + m->lower_margin,
+				m->yres + m->lower_margin + m->vsync_len,
+				m->yres + m->lower_margin + m->vsync_len + m->upper_margin);
+
+	}
+}
+
+static int dovefb_init_mode(struct fb_info *fi,
+				struct dovefb_mach_info *dmi)
+{
+	struct dovefb_layer_info *dfli = fi->par;
+	struct dovefb_info *info = dfli->info;
+	struct fb_var_screeninfo *var = &fi->var;
+	int ret = 0;
+	u32 total_w, total_h, refresh;
+	u64 div_result;
+	const struct fb_videomode *m;
+
+	/*
+	 * Set default value
+	 */
+	refresh = DEFAULT_REFRESH;
+
+	/*
+	 * Fill up mode data to modelist.
+	 */
+	dfli->raw_edid = NULL;
+	if (dovefb_fill_edid(fi, dmi)) {
+		fb_videomode_to_modelist(dmi->modes,
+					dmi->num_modes,
+					&fi->modelist);
+		dfli->raw_edid = make_fake_edid();
+	}
+	/*
+	 * Print all video mode in current mode list.
+	 */
+	dovefb_list_vmode(fi->fix.id, &fi->modelist);
+
+	/*
+	 * Check if we are in fixed output mode.
+	 */
+	if (info->fixed_output) {
+		var->xres = info->out_vmode.xres;
+		var->yres = info->out_vmode.yres;
+		m = dovefb_find_nearest_mode(&info->out_vmode, &fi->modelist);
+		if (m)
+			info->out_vmode = *m;
+		else {
+			info->fixed_output = 0;
+			printk(KERN_WARNING "DoveFB: Unsupported "
+					"output resolution.\n");
+		}
+	}
+
+	/*
+	 * If has bootargs, apply it first.
+	 */
+	if (info->dft_vmode.xres && info->dft_vmode.yres &&
+	    info->dft_vmode.refresh) {
+		/* set data according bootargs */
+		var->xres = info->dft_vmode.xres;
+		var->yres = info->dft_vmode.yres;
+		refresh = info->dft_vmode.refresh;
+	}
+
+	/* try to find best video mode. */
+	m = dovefb_find_nearest_mode(&info->dft_vmode, &fi->modelist);
+	if (m) {
+		printk(KERN_INFO "found <%dx%d@%d>, pixclock=%d\n", m->xres, m->yres, m->refresh, m->pixclock);
+		fb_videomode_to_var(&fi->var, m);
+	} else {
+		printk("Video mode list doesn't contain %dx%d, "
+			"Please check display's edid support this mode "
+			"or add built-in Mode\n"
+			"Now we try 1024x768 mode.",
+			var->xres, var->yres);
+		fi->var.xres = 1024;
+		fi->var.yres = 768;
+
+		m = fb_find_best_mode(&fi->var, &fi->modelist);
+		if (!m) {
+			printk("Can't find 1024x768 either!!!\n");
+			return -1;
+		}
+		fb_videomode_to_var(&fi->var, m);
+	}
+
+	/*
+	 * if not using fixed output mode, fixed output mode should be
+	 * equal to current video mode.
+	 */
+	if(!info->fixed_output)
+		info->out_vmode = *m;
+
+	/* Init settings. */
+	var->xres_virtual = var->xres;
+	var->yres_virtual = var->yres;
+
+	/* correct pixclock. */
+	total_w = var->xres + var->left_margin + var->right_margin +
+		  var->hsync_len;
+	total_h = var->yres + var->upper_margin + var->lower_margin +
+		  var->vsync_len;
+
+	div_result = 1000000000000ll;
+	do_div(div_result, total_w * total_h * refresh);
+	var->pixclock = (u32)div_result;
+
+	return ret;
+}
+
+
+#ifdef CONFIG_PM
+int dovefb_gfx_suspend(struct dovefb_layer_info *dfli, pm_message_t mesg)
+{
+	struct fb_info *fi = dfli->fb_info;
+	struct fb_var_screeninfo *var = &fi->var;
+
+	printk(KERN_INFO "dovefb_gfx: dovefb_gfx_suspend(): state = %d.\n",
+		mesg.event);
+	printk(KERN_INFO "dovefb_gfx: suspend lcd %s\n", fi->fix.id);
+	printk(KERN_INFO "dovefb_gfx: save resolution: <%dx%d>\n",
+		var->xres, var->yres);
+
+	if (mesg.event & PM_EVENT_SLEEP) {
+		fb_set_suspend(fi, 1);
+		dovefb_blank(FB_BLANK_POWERDOWN, fi);
+		dovefb_pwr_off_sram(dfli);
+	}
+
+	return 0;
+}
+
+int dovefb_gfx_resume(struct dovefb_layer_info *dfli)
+{
+	struct fb_info *fi = dfli->fb_info;
+	struct fb_var_screeninfo *var = &fi->var;
+
+	printk(KERN_INFO "dovefb_gfx: dovefb_gfx_resume().\n");
+	printk(KERN_INFO "dovefb_gfx: resume lcd %s\n", fi->fix.id);
+	printk(KERN_INFO "dovefb_gfx: restore resolution: <%dx%d>\n",
+		var->xres, var->yres);
+
+	dovefb_set_defaults(dfli);
+	dfli->active = 1;
+
+	dovefb_pwr_on_sram(dfli);
+	if (dovefb_gfx_set_par(fi) != 0) {
+		printk(KERN_INFO "dovefb_gfx_resume(): Failed in "
+				"dovefb_gfx_set_par().\n");
+		return -1;
+	}
+
+	fb_set_suspend(fi, 0);
+	dovefb_blank(FB_BLANK_UNBLANK, fi);
+
+	return 0;
+}
+#endif
+
+static void dynamic_get_edid(unsigned long data)
+{
+	struct dovefb_layer_info *dfli = (struct dovefb_layer_info *) data;
+
+	mod_timer(&dfli->get_edid_timer, jiffies + dfli->edid_info.interval * HZ);
+	schedule_work(&dfli->work_queue);
+}
+
+static bool is_new_edid(u8* new_edid, struct dovefb_layer_info *dfli)
+{
+	/*
+	 * check if EDID menufactor information is the same.
+	 */
+	int i;
+	if (!dfli->raw_edid) return true;
+
+	for (i = ID_MANUFACTURER_NAME; i < EDID_STRUCT_REVISION; i++) {
+		if ( *(new_edid + i) != *(dfli->raw_edid + i)) {
+			return true;
+		}
+	}
+	return false;
+}
+
+static void get_edid_work(struct work_struct *work)
+{
+	struct dovefb_layer_info *dfli =
+		container_of(work, struct dovefb_layer_info, work_queue);
+	struct fb_info *fi = dfli->fb_info;
+	struct dovefb_mach_info *dmi = dfli->dev->platform_data;
+	char* edid_data = NULL;
+
+	edid_data = dove_read_edid(fi, dmi);
+
+	if (edid_data) {
+		if (is_new_edid(edid_data, dfli)) {
+			if (dfli->raw_edid) kfree(dfli->raw_edid);
+			dfli->raw_edid = edid_data;
+			dfli->edid_info.connect = 1;
+			dfli->edid_info.change = 1;
+			dfli->edid_info.extension = dfli->raw_edid[0x7e];
+		} else {
+			if (!dfli->edid_info.connect) {
+				dfli->edid_info.connect = 1;
+				dfli->edid_info.change = 1;
+				dfli->edid_info.extension = dfli->raw_edid[0x7e];
+			}
+			kfree(edid_data);
+		}
+	} else {
+		if (strstr(fi->fix.id, "GFX Layer 0")) {
+			if (dfli->edid_info.connect != 2){
+				if (!dfli->raw_edid) kfree(dfli->raw_edid);
+				dfli->raw_edid = make_fake_edid();
+				dfli->edid_info.connect = 2;
+				dfli->edid_info.change = 1;
+				dfli->edid_info.extension =
+					dfli->raw_edid[0x7e];
+			}
+		} else if (strstr(fi->fix.id, "GFX Layer 1")) {
+			if (dfli->edid_info.connect != 2) {
+				if (!dfli->raw_edid)
+					kfree(dfli->raw_edid);
+				dfli->raw_edid = make_analog_fake_edid();
+				dfli->edid_info.connect = 2;
+				dfli->edid_info.change = 1;
+				dfli->edid_info.extension =
+					dfli->raw_edid[0x7e];
+			}
+		}
+	}
+}
+
+int dovefb_gfx_init(struct dovefb_info *info, struct dovefb_mach_info *dmi)
+{
+	int ret;
+	struct dovefb_layer_info *dfli = info->gfx_plane;
+	struct fb_info *fi = dfli->fb_info;
+
+	init_waitqueue_head(&dfli->w_intr_wq);
+
+	/*
+	 * Configure default register values.
+	 */
+	dovefb_set_defaults(dfli);
+
+	/*
+	 * init video mode data.
+	 */
+	dovefb_set_mode(dfli, &fi->var, dmi->modes, dmi->pix_fmt, 0);
+
+	/*
+	 * configure GPIO's in order to enable the LCD panel to be ready for
+	 * reading the edid data
+	 */
+	set_dumb_panel_control(fi, 1);
+	ret = dovefb_init_mode(fi, dmi);
+	if (ret)
+		goto failed;
+
+	/*
+	 * Fill in sane defaults.
+	 */
+	ret = dovefb_gfx_set_par(fi);
+	if (ret)
+		goto failed;
+
+	/*
+	 * init EDID information
+	 */
+	dfli->edid_info.connect = 0;
+	dfli->edid_info.change = 0;
+	dfli->edid_info.extension = 0;
+	dfli->edid_info.interval = DEFAULT_EDID_INTERVAL;
+
+	/*
+	 * Initialize dynamic get edid timer
+	 */
+	dfli->ddc_polling_disable = dmi->ddc_polling_disable;
+	if(!dmi->ddc_polling_disable) {
+		init_timer(&dfli->get_edid_timer);
+		dfli->get_edid_timer.expires = jiffies + HZ;
+		dfli->get_edid_timer.data = (unsigned long)dfli;
+		dfli->get_edid_timer.function = dynamic_get_edid;
+		add_timer(&dfli->get_edid_timer);
+
+		INIT_WORK(&dfli->work_queue, get_edid_work);
+	} else {
+		dfli->edid_info.connect = 1;
+		dfli->edid_info.change = 1;
+		dfli->edid_info.extension = dfli->raw_edid[0x7e];
+	}
+
+	return 0;
+failed:
+	printk(KERN_ERR "dovefb_gfx_init() returned %d.\n", ret);
+	return ret;
+}
+
+struct fb_ops dovefb_gfx_ops = {
+	.owner		= THIS_MODULE,
+	.fb_check_var	= dovefb_check_var,
+	.fb_set_par	= dovefb_gfx_set_par,
+	.fb_setcolreg	= dovefb_setcolreg,
+	.fb_blank	= dovefb_blank,
+	.fb_pan_display	= dovefb_pan_display,
+	.fb_fillrect	= cfb_fillrect,
+	.fb_copyarea	= cfb_copyarea,
+	.fb_imageblit	= cfb_imageblit,
+#ifdef DOVE_USING_HWC
+	.fb_cursor	= dovefb_cursor,
+#endif
+	.fb_sync	= dovefb_fb_sync,
+	.fb_ioctl	= dovefb_gfx_ioctl,
+};
+
+MODULE_AUTHOR("Green Wan <gwan@marvell.com>");
+MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
+MODULE_AUTHOR("Shadi Ammouri <shadi@marvell.com>");
+MODULE_DESCRIPTION("Framebuffer driver for Dove");
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/drivers/video/marvell/dovefb_ovly.c
+++ linux-mvl-dove-2.6.32/drivers/video/marvell/dovefb_ovly.c
@@ -0,0 +1,1263 @@
+/*
+ * linux/drivers/video/dovefb.c -- Marvell DOVE LCD Controller
+ *
+ * Copyright (C) Marvell Semiconductor Company.  All rights reserved.
+ *
+ * Written by:
+ *	Green Wan <gwan@marvell.com>
+ *	Shadi Ammouri <shadi@marvell.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive for
+ * more details.
+ */
+
+/*
+ * 1. Adapted from:  linux/drivers/video/skeletonfb.c
+ * 2. Merged from: linux/drivers/video/dovefb.c (Lennert Buytenhek)
+ */
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/smp_lock.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/interrupt.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/ioport.h>
+#include <linux/cpufreq.h>
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/uaccess.h>
+#include <linux/console.h>
+#include <linux/io.h>
+#include <linux/timer.h>
+#include <asm/mach-types.h>
+#include <asm/irq.h>
+
+#include <video/dovefb.h>
+#include <video/dovefbreg.h>
+#include "dovefb_if.h"
+
+#define MAX_QUEUE_NUM	60
+#define RESET_BUF	0x1
+#define FREE_ENTRY	0x2
+#define CHECKBUF_TIMER_DELAY	33 // check video buffer 30 timers per second
+
+static int dovefb_ovly_set_par(struct fb_info *fi);
+static void set_graphics_start(struct fb_info *fi, int xoffset, int yoffset);
+static void set_dma_control0(struct dovefb_layer_info *dfli);
+static int wait_for_vsync(struct dovefb_layer_info *dfli);
+static void dovefb_do_tasklet(unsigned long data);
+
+static int addFreeBuf(u8 **bufList, u8 *freeBuf);
+static void clearFreeBuf(u8 **bufList, int iFlag);
+static int dovefb_switch_buff(struct fb_info *fi);
+static void collectFreeBuf(u8 **filterList, u8 **freeList, int count);
+static u8 *filterBufList[MAX_QUEUE_NUM];
+static u8 *freeBufList[MAX_QUEUE_NUM];
+
+struct timer_list checkbuf_timer;
+
+static struct _sViewPortInfo gViewPortInfo = {
+	.srcWidth = 640,	/* video source size */
+	.srcHeight = 480,
+	.zoomXSize = 640,	/* size after zooming */
+	.zoomYSize = 480,
+};
+
+static struct _sViewPortOffset gViewPortOffset = {
+	.xOffset = 0,	/* position on screen */
+	.yOffset = 0
+};
+
+
+static void dovefb_do_tasklet(unsigned long data)
+{
+	struct fb_info *fi;
+
+	fi = (struct fb_info *)data;
+	dovefb_switch_buff(fi);
+}
+
+static int convert_pix_fmt(u32 vmode)
+{
+	switch (vmode) {
+	case DOVEFB_VMODE_YUV422PACKED:
+		return PIX_FMT_YUV422PACK;
+	case DOVEFB_VMODE_YUV422PACKED_SWAPUV:
+		return PIX_FMT_YVU422PACK;
+	case DOVEFB_VMODE_YUV422PLANAR:
+		return PIX_FMT_YUV422PLANAR;
+	case DOVEFB_VMODE_YUV422PLANAR_SWAPUV:
+		return PIX_FMT_YVU422PLANAR;
+	case DOVEFB_VMODE_YUV420PLANAR:
+		return PIX_FMT_YUV420PLANAR;
+	case DOVEFB_VMODE_YUV420PLANAR_SWAPUV:
+		return PIX_FMT_YVU420PLANAR;
+	case DOVEFB_VMODE_YUV422PACKED_SWAPYUorV:
+		return PIX_FMT_UYVY422PACK;
+	case DOVEFB_VMODE_RGB565:
+		return PIX_FMT_RGB565;
+	case DOVEFB_VMODE_BGR565:
+		return PIX_FMT_BGR565;
+	case DOVEFB_VMODE_RGB1555:
+		return PIX_FMT_RGB1555;
+	case DOVEFB_VMODE_BGR1555:
+		return PIX_FMT_BGR1555;
+	case DOVEFB_VMODE_RGB888PACK:
+		return PIX_FMT_RGB888PACK;
+	case DOVEFB_VMODE_BGR888PACK:
+		return PIX_FMT_BGR888PACK;
+	case DOVEFB_VMODE_RGBA888:
+		return PIX_FMT_RGBA888;
+	case DOVEFB_VMODE_BGRA888:
+		return PIX_FMT_BGRA888;
+	case DOVEFB_VMODE_RGB888UNPACK:
+	case DOVEFB_VMODE_BGR888UNPACK:
+	case DOVEFB_VMODE_YUV422PLANAR_SWAPYUorV:
+	case DOVEFB_VMODE_YUV420PLANAR_SWAPYUorV:
+	default:
+		printk(KERN_ERR "%s: Unknown vmode (%d).\n", __func__, vmode);
+		return -1;
+	}
+}
+
+static u32 dovefb_ovly_create_surface(struct _sOvlySurface *pOvlySurface)
+{
+	u16 surfaceWidth;
+	u16 surfaceHeight;
+	u32 surfaceSize;
+	DOVEFBVideoMode vmode;
+	u8 *surfVABase;
+	u8 *surfPABase;
+
+	surfaceWidth = pOvlySurface->viewPortInfo.srcWidth;
+	surfaceHeight = pOvlySurface->viewPortInfo.srcHeight;
+	vmode	= pOvlySurface->videoMode;
+
+	/* calculate video surface size */
+	switch (vmode) {
+	case DOVEFB_VMODE_YUV422PACKED:
+	case DOVEFB_VMODE_YUV422PACKED_SWAPUV:
+	case DOVEFB_VMODE_YUV422PACKED_SWAPYUorV:
+	case DOVEFB_VMODE_YUV422PLANAR:
+	case DOVEFB_VMODE_YUV422PLANAR_SWAPUV:
+	case DOVEFB_VMODE_YUV422PLANAR_SWAPYUorV:
+		surfaceSize = surfaceWidth * surfaceHeight * 2;
+		break;
+	case DOVEFB_VMODE_YUV420PLANAR:
+	case DOVEFB_VMODE_YUV420PLANAR_SWAPUV:
+	case DOVEFB_VMODE_YUV420PLANAR_SWAPYUorV:
+		surfaceSize = surfaceWidth * surfaceHeight * 3/2;
+		break;
+	default:
+		printk(KERN_INFO "Unknown video mode.\n");
+		return -ENXIO;
+	}
+
+	/* get new video buffer */
+	surfVABase = (u_char *)__get_free_pages(GFP_ATOMIC | GFP_DMA,
+				get_order(surfaceSize*2));
+
+	if (surfVABase == NULL) {
+		printk(KERN_INFO "Unable to allocate surface memory\n");
+		return -ENOMEM;
+	}
+
+	/* printk(KERN_INFO "\n create surface buffer"
+		" = 0x%08x \n", (u32)surfVABase); */
+
+	surfPABase = (u8 *)__pa(surfVABase);
+
+	memset(surfVABase, 0x0, surfaceSize);
+
+	pOvlySurface->videoBufferAddr.startAddr = surfPABase;
+	return 0;
+}
+
+static u32 dovefb_ovly_set_colorkeyalpha(struct dovefb_layer_info *dfli)
+{
+	unsigned int rb;
+	unsigned int temp;
+	unsigned int x, x_ckey;
+	struct _sColorKeyNAlpha *color_a = &dfli->ckey_alpha;
+
+	/* reset to 0x0 to disable color key. */
+	x = readl(dfli->reg_base + LCD_SPU_DMA_CTRL1) &
+		~(CFG_COLOR_KEY_MASK | CFG_ALPHA_MODE_MASK | CFG_ALPHA_MASK);
+
+	/* switch to color key mode */
+	switch (color_a->mode) {
+	case DOVEFB_DISABLE_COLORKEY_MODE:
+		/* do nothing */
+		break;
+	case DOVEFB_ENABLE_Y_COLORKEY_MODE:
+		x |= CFG_COLOR_KEY_MODE(0x1);
+		break;
+	case DOVEFB_ENABLE_U_COLORKEY_MODE:
+		x |= CFG_COLOR_KEY_MODE(0x2);
+		break;
+	case DOVEFB_ENABLE_V_COLORKEY_MODE:
+		x |= CFG_COLOR_KEY_MODE(0x4);
+		break;
+	case DOVEFB_ENABLE_RGB_COLORKEY_MODE:
+		x |= CFG_COLOR_KEY_MODE(0x3);
+
+                /* check whether h/w turn on RB swap. */
+                rb = readl(dfli->reg_base + LCD_SPU_DMA_CTRL0);
+                if (rb & CFG_DMA_SWAPRB_MASK) {
+                        /* exchange r b fields. */
+                        temp = color_a->Y_ColorAlpha;
+                        color_a->Y_ColorAlpha = color_a->V_ColorAlpha;
+                        color_a->V_ColorAlpha = temp;
+                }
+
+		break;
+	case DOVEFB_ENABLE_R_COLORKEY_MODE:
+		x |= CFG_COLOR_KEY_MODE(0x5);
+		break;
+	case DOVEFB_ENABLE_G_COLORKEY_MODE:
+		x |= CFG_COLOR_KEY_MODE(0x6);
+	break;
+	case DOVEFB_ENABLE_B_COLORKEY_MODE:
+		x |= CFG_COLOR_KEY_MODE(0x7);
+		break;
+	default:
+		printk(KERN_INFO "unknown mode");
+		return -1;
+	}
+
+	/* switch to alpha path selection */
+	switch (color_a->alphapath) {
+	case DOVEFB_VID_PATH_ALPHA:
+		x |= CFG_ALPHA_MODE(0x0);
+		break;
+	case DOVEFB_GRA_PATH_ALPHA:
+		x |= CFG_ALPHA_MODE(0x1);
+		break;
+	case DOVEFB_CONFIG_ALPHA:
+		x |= CFG_ALPHA_MODE(0x2);
+		break;
+	default:
+		printk(KERN_INFO "unknown alpha path");
+		return -1;
+	}
+
+	/* configure alpha */
+	x |= CFG_ALPHA((color_a->config & 0xff));
+
+	/* Have to program new regs to enable color key for new chip. */
+	x_ckey = readl(dfli->reg_base + LCD_SPU_ADV_REG);
+	writel( x_ckey | (0x1 << 19), dfli->reg_base + LCD_SPU_ADV_REG);
+
+	writel(x, dfli->reg_base + LCD_SPU_DMA_CTRL1);
+	writel(color_a->Y_ColorAlpha, dfli->reg_base + LCD_SPU_COLORKEY_Y);
+	writel(color_a->U_ColorAlpha, dfli->reg_base + LCD_SPU_COLORKEY_U);
+	writel(color_a->V_ColorAlpha, dfli->reg_base + LCD_SPU_COLORKEY_V);
+
+	return 0;
+}
+
+static int check_surface(struct fb_info *fi,
+			DOVEFBVideoMode new_mode,
+			struct _sViewPortInfo *new_info,
+			struct _sViewPortOffset *new_offset,
+			struct _sVideoBufferAddr *new_addr)
+{
+	struct dovefb_layer_info *dfli = fi->par;
+	struct fb_var_screeninfo *var = &fi->var;
+	int changed = 0;
+	/*
+	 * check mode
+	 */
+	if (new_mode >= 0 && dfli->surface.videoMode != new_mode) {
+		dfli->surface.videoMode = new_mode;
+		dfli->pix_fmt = convert_pix_fmt(new_mode);
+		dovefb_set_pix_fmt(var, dfli->pix_fmt);
+		changed = 1;
+	}
+
+	/*
+	 * check view port settings.
+	 */
+	if (new_info &&
+	    (dfli->surface.viewPortInfo.srcWidth != new_info->srcWidth ||
+	    dfli->surface.viewPortInfo.srcHeight != new_info->srcHeight ||
+	    dfli->surface.viewPortInfo.zoomXSize != new_info->zoomXSize ||
+	    dfli->surface.viewPortInfo.zoomYSize != new_info->zoomYSize)) {
+		var->xres = new_info->srcWidth;
+		var->yres = new_info->srcHeight;
+		var->xres_virtual = new_info->srcWidth;
+		var->yres_virtual = new_info->srcHeight;
+		dfli->surface.viewPortInfo = *new_info;
+		dovefb_set_pix_fmt(var, dfli->pix_fmt);
+		changed = 1;
+	}
+
+	/*
+	 * Check offset
+	 */
+	if (new_offset &&
+	    (dfli->surface.viewPortOffset.xOffset != new_offset->xOffset ||
+	    dfli->surface.viewPortOffset.yOffset != new_offset->yOffset)) {
+		dfli->surface.viewPortOffset.xOffset = new_offset->xOffset;
+		dfli->surface.viewPortOffset.yOffset = new_offset->yOffset;
+		changed = 1;
+	}
+
+	/*
+	 * Check buffer address
+	 */
+	if (new_addr && new_addr->startAddr &&
+	    dfli->new_addr != (unsigned long)new_addr->startAddr) {
+		dfli->new_addr = (unsigned long)new_addr->startAddr;
+		changed = 1;
+	}
+
+	return changed;
+}
+
+static int dovefb_ovly_ioctl(struct fb_info *fi, unsigned int cmd,
+		unsigned long arg)
+{
+	void __user *argp = (void __user *)arg;
+	struct dovefb_layer_info *dfli = fi->par;
+	u32 x;
+	int vmode = 0;
+	int gfx_on = 1;
+	int vid_on = 1;
+
+	switch (cmd) {
+	case DOVEFB_IOCTL_WAIT_VSYNC:
+		wait_for_vsync(dfli);
+		break;
+	case DOVEFB_IOCTL_GET_VIEWPORT_INFO:
+		return copy_to_user(argp, &dfli->surface.viewPortInfo,
+			sizeof(struct _sViewPortInfo)) ? -EFAULT : 0;
+	case DOVEFB_IOCTL_SET_VIEWPORT_INFO:
+		mutex_lock(&dfli->access_ok);
+		if (copy_from_user(&gViewPortInfo, argp,
+				sizeof(gViewPortInfo))) {
+			mutex_unlock(&dfli->access_ok);
+			return -EFAULT;
+		}
+
+		if (check_surface(fi, -1, &gViewPortInfo, 0, 0))
+			dovefb_ovly_set_par(fi);
+
+		mutex_unlock(&dfli->access_ok);
+		break;
+	case DOVEFB_IOCTL_SET_VIDEO_MODE:
+		/*
+		 * Get data from user space.
+		 */
+		if (copy_from_user(&vmode, argp, sizeof(vmode)))
+			return -EFAULT;
+
+		if (check_surface(fi, vmode, 0, 0, 0))
+			dovefb_ovly_set_par(fi);
+		break;
+	case DOVEFB_IOCTL_GET_VIDEO_MODE:
+		return copy_to_user(argp, &dfli->surface.videoMode,
+			sizeof(u32)) ? -EFAULT : 0;
+	case DOVEFB_IOCTL_CREATE_VID_BUFFER:
+	{
+		struct _sOvlySurface OvlySurface;
+
+		mutex_lock(&dfli->access_ok);
+		if (copy_from_user(&OvlySurface, argp,
+				sizeof(struct _sOvlySurface))) {
+			mutex_unlock(&dfli->access_ok);
+			return -EFAULT;
+		}
+
+		/* Request a video buffer. */
+		dovefb_ovly_create_surface(&OvlySurface);
+
+		if (copy_to_user(argp, &OvlySurface,
+				sizeof(struct _sOvlySurface))) {
+			mutex_unlock(&dfli->access_ok);
+			return -EFAULT;
+		}
+
+		mutex_unlock(&dfli->access_ok);
+
+		break;
+	}
+	case DOVEFB_IOCTL_FLIP_VID_BUFFER:
+	{
+		struct _sOvlySurface *surface = 0;
+		u8 *start_addr, *input_data, *dst_addr;
+		u32 length;
+		surface = kmalloc(sizeof(struct _sOvlySurface),
+				GFP_KERNEL);
+
+		/* Get user-mode data. */
+		if (copy_from_user(surface, argp,
+		    sizeof(struct _sOvlySurface))) {
+			kfree(surface);
+			return -EFAULT;
+		}
+		mutex_lock(&dfli->access_ok);
+		length = surface->videoBufferAddr.length;
+		dst_addr = dfli->surface.videoBufferAddr.startAddr;
+		start_addr = surface->videoBufferAddr.startAddr;
+		input_data = surface->videoBufferAddr.inputData;
+
+		/*
+		 * Has DMA addr?
+		 */
+		if (start_addr &&
+		    (!input_data)) {
+			if (0 != addFreeBuf(freeBufList, (u8 *)surface)) {
+				printk(KERN_INFO "Error: addFreeBuf()\n");
+				mutex_unlock(&dfli->access_ok);
+				kfree(surface);
+				return -EFAULT;
+			} else {
+				/* printk(KERN_INFO "addFreeBuf(0x%08x) ok.\n",
+					start_addr); */
+			}
+		} else {
+			if (check_surface(fi, surface->videoMode,
+					&surface->viewPortInfo,
+					&surface->viewPortOffset,
+					&surface->videoBufferAddr))
+				dovefb_ovly_set_par(fi);
+
+			/* copy buffer */
+			if (input_data) {
+				wait_for_vsync(dfli);
+				/* if support hw DMA, replace this. */
+				if (copy_from_user(dfli->fb_start,
+						   input_data, length)) {
+					mutex_unlock(&dfli->access_ok);
+					kfree(surface);
+					return -EFAULT;
+				}
+				mutex_unlock(&dfli->access_ok);
+				kfree(surface);
+				return 0;
+			}
+
+			kfree(surface);
+#if 0
+			/*
+			 * Fix me: Currently not implemented yet.
+			 * Application allocate a physical contiguous
+			 * buffer and pass it into driver. Here is to
+			 * update fb's info to new buffer and free
+			 * old buffer.
+			 */
+			if (start_addr) {
+				if (dfli->mem_status)
+					free_pages(
+					    (unsigned long)dfli->fb_start,
+					    get_order(dfli->fb_size));
+				else
+					dma_free_writecombine(dfli->dev,
+					    dfli->fb_size,
+					    dfli->fb_start,
+					    dfli->fb_start_dma);
+
+				dfli->fb_start = __va(start_addr);
+				dfli->fb_size = length;
+				dfli->fb_start_dma =
+				    (dma_addr_t)__pa(dfli->fb_start);
+				dfli->mem_status = 1;
+				fi->fix.smem_start = dfli->fb_start_dma;
+				fi->fix.smem_len = dfli->fb_size;
+				fi->screen_base = dfli->fb_start;
+				fi->screen_size = dfli->fb_size;
+			}
+#endif
+		}
+		mutex_unlock(&dfli->access_ok);
+		return 0;
+	}
+	case DOVEFB_IOCTL_GET_FREELIST:
+	{
+		mutex_lock(&dfli->access_ok);
+
+		if (copy_to_user(argp, filterBufList,
+				MAX_QUEUE_NUM*sizeof(u8 *))) {
+			mutex_unlock(&dfli->access_ok);
+			return -EFAULT;
+		}
+
+		clearFreeBuf(filterBufList, RESET_BUF);
+
+		mutex_unlock(&dfli->access_ok);
+		return 0;
+	}
+	case DOVEFB_IOCTL_GET_BUFF_ADDR:
+	{
+		return copy_to_user(argp, &dfli->surface.videoBufferAddr,
+			sizeof(struct _sVideoBufferAddr)) ? -EFAULT : 0;
+	}
+	case DOVEFB_IOCTL_SET_VID_OFFSET:
+		mutex_lock(&dfli->access_ok);
+		if (copy_from_user(&gViewPortOffset, argp,
+				sizeof(gViewPortOffset))) {
+			mutex_unlock(&dfli->access_ok);
+			return -EFAULT;
+		}
+
+		if (check_surface(fi, -1, 0, &gViewPortOffset, 0))
+			dovefb_ovly_set_par(fi);
+		mutex_unlock(&dfli->access_ok);
+		break;
+	case DOVEFB_IOCTL_GET_VID_OFFSET:
+		return copy_to_user(argp, &dfli->surface.viewPortOffset,
+			sizeof(struct _sViewPortOffset)) ? -EFAULT : 0;
+	case DOVEFB_IOCTL_SET_MEMORY_TOGGLE:
+		break;
+	case DOVEFB_IOCTL_SET_COLORKEYnALPHA:
+		if (copy_from_user(&dfli->ckey_alpha, argp,
+		    sizeof(struct _sColorKeyNAlpha)))
+			return -EFAULT;
+
+		dovefb_ovly_set_colorkeyalpha(dfli);
+		break;
+	case DOVEFB_IOCTL_GET_COLORKEYnALPHA:
+		if (copy_to_user(argp, &dfli->ckey_alpha,
+		    sizeof(struct _sColorKeyNAlpha)))
+			return -EFAULT;
+		break;
+	case DOVEFB_IOCTL_SWITCH_VID_OVLY:
+		if (copy_from_user(&vid_on, argp, sizeof(int)))
+			return -EFAULT;
+		if (0 == vid_on) {
+			x = readl(dfli->reg_base + LCD_SPU_DMA_CTRL0) &
+				~CFG_DMA_ENA_MASK;
+			writel(x, dfli->reg_base + LCD_SPU_DMA_CTRL0);
+		} else {
+			x = readl(dfli->reg_base + LCD_SPU_DMA_CTRL0) |
+				CFG_DMA_ENA(0x1);
+			writel(x, dfli->reg_base + LCD_SPU_DMA_CTRL0);
+			/* Enable VID & VSync. */
+			x = readl(dfli->reg_base + SPU_IRQ_ENA) |
+				DOVEFB_VID_INT_MASK | DOVEFB_VSYNC_INT_MASK;
+			writel( x, dfli->reg_base + SPU_IRQ_ENA);
+		}
+		break;
+	case DOVEFB_IOCTL_SWITCH_GRA_OVLY:
+		if (copy_from_user(&gfx_on, argp, sizeof(int)))
+			return -EFAULT;
+		if (0 == gfx_on) {
+			x = readl(dfli->reg_base + LCD_SPU_DMA_CTRL0) &
+				~CFG_GRA_ENA_MASK;
+			writel(x, dfli->reg_base + LCD_SPU_DMA_CTRL0);
+		} else {
+			x = readl(dfli->reg_base + LCD_SPU_DMA_CTRL0) |
+				CFG_GRA_ENA(0x1);
+			writel(x, dfli->reg_base + LCD_SPU_DMA_CTRL0);
+		}
+		break;
+	case DOVEFB_IOCTL_GET_FBID:
+		mutex_lock(&dfli->access_ok);
+		if (copy_to_user(argp, &dfli->cur_fbid, sizeof(unsigned int))) {
+			mutex_unlock(&dfli->access_ok);
+			return -EFAULT;
+		}
+		mutex_unlock(&dfli->access_ok);
+		break;
+	case DOVEFB_IOCTL_GET_SRC_MODE:
+		mutex_lock(&dfli->access_ok);
+		if (copy_to_user(argp, &dfli->src_mode, sizeof(int))) {
+			mutex_unlock(&dfli->access_ok);
+			return -EFAULT;
+		}
+		mutex_unlock(&dfli->access_ok);
+		break;
+	case DOVEFB_IOCTL_SET_SRC_MODE:
+		mutex_lock(&dfli->access_ok);
+		if (copy_from_user(&dfli->src_mode, argp, sizeof(int))) {
+			mutex_unlock(&dfli->access_ok);
+			return -EFAULT;
+		}
+		mutex_unlock(&dfli->access_ok);
+		break;
+	case DOVEFB_IOCTL_GET_FBPA:
+		{
+		struct shm_private_info info;
+		int index;
+
+		if (copy_from_user(&info, argp,
+		    sizeof(struct shm_private_info)))
+			return -EFAULT;
+
+		/* which frame want to find. */
+		index = info.fbid;
+
+		/* calc physical address. */
+		info.fb_pa = (unsigned long)(dfli->fb_start_dma+
+				(index*info.width*info.height*MAX_YUV_PIXEL));
+		if (copy_to_user(argp, &info, sizeof(struct shm_private_info)))
+			return -EFAULT;
+
+		break;
+		}
+	default:
+		printk(KERN_INFO "ioctl_ovly(0x%x) No match.\n", cmd);
+		break;
+	}
+
+	return 0;
+}
+
+static void collectFreeBuf(u8 **filterList, u8 **freeList, int count)
+{
+	int i = 0, j = 0;
+	struct _sOvlySurface *srf = 0;
+	u8 *ptr;
+
+	if ((count < 1) || !filterList || !freeList)
+		return;
+
+	for (i = 0, j = 0; i < count; i++) {
+
+		ptr = freeList[i];
+
+		/* Check freeList's content. */
+		if (ptr) {
+			for (; j < MAX_QUEUE_NUM; j++) {
+				if (!(filterList[j])) {
+					/* get surface's ptr. */
+					srf = (struct _sOvlySurface *)ptr;
+
+					/*
+					 * save ptrs which need
+					 * to be freed.
+					 */
+					filterList[j] =
+					    srf->videoBufferAddr.startAddr;
+
+					break;
+				}
+			}
+
+			if (j >= MAX_QUEUE_NUM)
+				break;
+
+			kfree(freeList[i]);
+			freeList[i] = 0;
+		} else {
+			/* till content is null. */
+			break;
+		}
+	}
+
+	freeList[0] = freeList[count];
+	freeList[count] = 0;
+}
+
+static int addFreeBuf(u8 **ppBufList, u8 *pFreeBuf)
+{
+	int i = 0 ;
+	struct _sOvlySurface *srf0 = (struct _sOvlySurface *)(pFreeBuf);
+	struct _sOvlySurface *srf1 = 0;
+
+	/* Error checking */
+	if (!srf0)
+		return -1;
+
+	for (; i < MAX_QUEUE_NUM; i++) {
+		srf1 = (struct _sOvlySurface *)ppBufList[i];
+
+		if (!srf1) {
+			/* printk(KERN_INFO "Set pFreeBuf "
+				"into %d entry.\n", i);
+			*/
+			ppBufList[i] = pFreeBuf;
+			return 0;
+		}
+
+		if (srf1->videoBufferAddr.startAddr ==
+		     srf0->videoBufferAddr.startAddr) {
+			/* same address, free this request. */
+			kfree(pFreeBuf);
+			return 0;
+		}
+	}
+
+
+	if (i >= MAX_QUEUE_NUM)
+	    printk(KERN_INFO "buffer overflow\n");
+
+	return -3;
+}
+
+static void clearFreeBuf(u8 **ppBufList, int iFlag)
+{
+	int i = 0;
+
+	/* Check null pointer. */
+	if (!ppBufList)
+		return;
+
+	/* free */
+	if (FREE_ENTRY & iFlag) {
+		for (i = 0; i < MAX_QUEUE_NUM; i++) {
+			if (ppBufList && ppBufList[i])
+				kfree(ppBufList[i]);
+		}
+	}
+
+	if (RESET_BUF & iFlag)
+		memset(ppBufList, 0, MAX_QUEUE_NUM * sizeof(u8 *));
+}
+
+static int dovefb_ovly_open(struct fb_info *fi, int user)
+{
+	struct dovefb_mach_info *dmi;
+	struct dovefb_layer_info *dfli = fi->par;
+	struct fb_var_screeninfo *var = &fi->var;
+
+	dmi = dfli->dev->platform_data;
+	dfli->new_addr = 0;
+	dfli->cur_fbid = 0;
+	fi->fix.smem_start = dfli->fb_start_dma;
+	fi->fix.smem_len = dfli->fb_size;
+	fi->screen_base = dfli->fb_start;
+	fi->screen_size = dfli->fb_size;
+	memset(dfli->fb_start, 0, dfli->fb_size);
+
+	dfli->pix_fmt = dmi->pix_fmt;
+	dfli->surface.videoMode = -1;
+	dfli->surface.viewPortInfo.srcWidth = var->xres;
+	dfli->surface.viewPortInfo.srcHeight = var->yres;
+	dfli->surface.viewPortInfo.zoomXSize = var->xres;
+	dfli->surface.viewPortInfo.zoomYSize = var->yres;
+	dfli->surface.videoBufferAddr.startAddr = (unsigned char *)fi->fix.smem_start;
+	dovefb_set_pix_fmt(var, dfli->pix_fmt);
+	dovefb_ovly_set_par(fi);
+
+	if (mutex_is_locked(&dfli->access_ok))
+		mutex_unlock(&dfli->access_ok);
+
+	/* clear buffer list. */
+	mutex_lock(&dfli->access_ok);
+	clearFreeBuf(filterBufList, RESET_BUF);
+	clearFreeBuf(freeBufList, RESET_BUF|FREE_ENTRY);
+	mutex_unlock(&dfli->access_ok);
+
+	return 0;
+}
+
+static int dovefb_release(struct fb_info *fi, int user)
+{
+	struct dovefb_layer_info *dfli = fi->par;
+
+	/* Disable all interrupts. */
+	writel( 0x0, dfli->reg_base + SPU_IRQ_ENA);
+
+	/* clear buffer list. */
+	mutex_lock(&dfli->access_ok);
+	clearFreeBuf(filterBufList, RESET_BUF);
+	clearFreeBuf(freeBufList, RESET_BUF|FREE_ENTRY);
+	mutex_unlock(&dfli->access_ok);
+	return 0;
+}
+
+static int dovefb_switch_buff(struct fb_info *fi)
+{
+	struct dovefb_layer_info *dfli = fi->par;
+	int i = 0;
+	struct _sOvlySurface *pOvlySurface = 0;
+	unsigned long startaddr;
+	int fbid;
+
+	/*
+	 * Find the latest frame.
+	 */
+	for (i = (MAX_QUEUE_NUM-1); i >= 0; i--) {
+		if (freeBufList[i]) {
+			pOvlySurface = (struct _sOvlySurface *)freeBufList[i];
+			break;
+		}
+	}
+
+	if (!pOvlySurface) {
+		/*printk(KERN_INFO "********Oops: pOvlySurface"
+			" is NULL!!!!\n\n");*/
+		return -1;
+	}
+
+	startaddr = (unsigned long)pOvlySurface->videoBufferAddr.startAddr;
+	fbid = (int)pOvlySurface->videoBufferAddr.frameID;
+	/*
+	 * Got new frame?
+	 */
+	if (dfli->new_addr != startaddr) {
+		/*
+		 * Collect expired frame to list.
+		 */
+		collectFreeBuf(filterBufList, freeBufList, (i));
+
+		/*
+		 * Update new surface.
+		 */
+		if (check_surface(fi, pOvlySurface->videoMode,
+				&pOvlySurface->viewPortInfo,
+				&pOvlySurface->viewPortOffset,
+				&pOvlySurface->videoBufferAddr)) {
+			dovefb_ovly_set_par(fi);
+			dfli->cur_fbid = fbid;
+		}
+	}
+
+	return 0;
+}
+
+
+
+static void set_dma_control0(struct dovefb_layer_info *dfli)
+{
+	u32 x, x_bk;
+	int pix_fmt;
+
+	pix_fmt = dfli->pix_fmt;
+
+	/*
+	 * Get reg's current value
+	 */
+	x_bk = x = readl(dfli->reg_base + LCD_SPU_DMA_CTRL0);
+	/*
+	 * clear video layer's field
+	 */
+	x &= 0xef0fff01;
+
+	/*
+	 * enable horizontal smooth scaling.
+	 */
+	x |= 0x1 << 6;
+
+	/*
+	 * If we are in a pseudo-color mode, we need to enable
+	 * palette lookup.
+	 */
+	if (pix_fmt == PIX_FMT_PSEUDOCOLOR)
+		x |= 0x10000000;
+
+	/*
+	 * Configure hardware pixel format.
+	 */
+	x |= ((pix_fmt & ~0x1000) >> 1) << 20;
+
+	/*
+	 * configure video format into HW.
+	 * HW default use UYVY as YUV422Packed format
+	 *            use YUV as planar format
+	 */
+	if ((pix_fmt & 0x1000)) {	/* UYVY. */
+		x |= 0x00000002;
+	} else if ((pix_fmt == 10) || (pix_fmt == 11)) { /* YUYV, YVYU */
+		x |= 1				<< 1;
+		x |= 1				<< 2;
+		x |= (pix_fmt & 1) 		<< 3;
+		x |= (dfli->info->panel_rbswap) << 4;
+	} else if (pix_fmt >= 12) {	/* YUV Planar */
+		x |= 1				<< 1;
+		x |= ((pix_fmt & 1) ^ 1)	<< 3;
+		x |= dfli->info->panel_rbswap	<< 4;
+	} else {	/* RGB, BGR format */
+		x |= ((pix_fmt & 1)^(dfli->info->panel_rbswap)) << 4;
+	}
+
+	if (x_bk != x)
+		writel(x, dfli->reg_base + LCD_SPU_DMA_CTRL0);
+}
+
+static void set_dma_control1(struct dovefb_layer_info *dfli, int sync)
+{
+	u32 x, x_bk;
+
+	/*
+	 * Get current settings.
+	 */
+	x_bk = x = readl(dfli->reg_base + LCD_SPU_DMA_CTRL1);
+
+	/*
+	 * We trigger DMA on the falling edge of vsync if vsync is
+	 * active low, or on the rising edge if vsync is active high.
+	 */
+	if (!(sync & FB_SYNC_VERT_HIGH_ACT))
+		x |= 0x08000000;
+
+	if (x_bk != x)
+		writel(x, dfli->reg_base + LCD_SPU_DMA_CTRL1);
+}
+
+static int wait_for_vsync(struct dovefb_layer_info *dfli)
+{
+	if (dfli) {
+		u32 irq_ena = readl(dfli->reg_base + SPU_IRQ_ENA);
+		int rc = 0;
+
+		writel(irq_ena | DOVEFB_VID_INT_MASK | DOVEFB_VSYNC_INT_MASK,
+		       dfli->reg_base + SPU_IRQ_ENA);
+
+		rc = wait_event_interruptible_timeout(dfli->w_intr_wq,
+						      atomic_read(&dfli->w_intr), 40);
+
+		if ( rc <= 0)
+			printk(KERN_ERR "%s: vid wait for vsync timed out, rc %d\n",
+			       __func__, rc);
+
+		writel(irq_ena,
+		       dfli->reg_base + SPU_IRQ_ENA);
+		atomic_set(&dfli->w_intr, 0);
+		return 0;
+	}
+
+	return 0;
+}
+
+static void set_graphics_start(struct fb_info *fi, int xoffset, int yoffset)
+{
+	struct dovefb_layer_info *dfli = fi->par;
+	struct fb_var_screeninfo *var = &fi->var;
+	int pixel_offset;
+	unsigned long addr;
+
+	pixel_offset = (yoffset * var->xres_virtual) + xoffset;
+
+	if (dfli->new_addr) {
+		addr = dfli->new_addr +
+			(pixel_offset * (var->bits_per_pixel >> 3));
+	} else {
+		addr = dfli->fb_start_dma +
+			(pixel_offset * (var->bits_per_pixel >> 3));
+	}
+
+	writel(addr, dfli->reg_base + LCD_SPU_DMA_START_ADDR_Y0);
+
+	if (dfli->pix_fmt >= 12 && dfli->pix_fmt <= 15)
+		addr += var->xres * var->yres;
+	writel(addr, dfli->reg_base + LCD_SPU_DMA_START_ADDR_U0);
+
+	if ((dfli->pix_fmt>>1) == 6)
+		addr += var->xres * var->yres/2;
+	else if ((dfli->pix_fmt>>1) == 7)
+		addr += var->xres * var->yres/4;
+	writel(addr, dfli->reg_base + LCD_SPU_DMA_START_ADDR_V0);
+}
+
+static int dovefb_ovly_pan_display(struct fb_var_screeninfo *var,
+    struct fb_info *fi)
+{
+	set_graphics_start(fi, var->xoffset, var->yoffset);
+
+	return 0;
+}
+
+static int set_pitch(struct dovefb_layer_info *dfli,
+	struct fb_var_screeninfo *var)
+{
+	int ycp, uvp;
+
+	ycp =	dfli->surface.viewPortInfo.ycPitch;
+	uvp =	dfli->surface.viewPortInfo.uvPitch;
+	if (ycp <= 0) {
+		printk(KERN_WARNING "YC pitch is 0."
+			"User program needs refine\n");
+		if ((dfli->pix_fmt >= 0) && (dfli->pix_fmt < 10)) {
+			writel((var->xres_virtual * var->bits_per_pixel) >> 3,
+				dfli->reg_base + LCD_SPU_DMA_PITCH_YC);
+		} else {
+			if (((dfli->pix_fmt & ~0x1000) >> 1) == 5) {
+				writel((var->xres*2),
+					dfli->reg_base + LCD_SPU_DMA_PITCH_YC);
+			} else {
+				writel((var->xres),
+					dfli->reg_base + LCD_SPU_DMA_PITCH_YC);
+			}
+		}
+	} else {
+		writel(ycp, dfli->reg_base + LCD_SPU_DMA_PITCH_YC);
+	}
+
+	if (uvp <= 0) {
+		if ((dfli->pix_fmt >= 0) && (dfli->pix_fmt < 10)) {
+			;
+		} else {
+			if (((dfli->pix_fmt & ~0x1000) >> 1) == 5) {
+				writel(((var->xres) << 16) | (var->xres) ,
+					dfli->reg_base + LCD_SPU_DMA_PITCH_UV);
+			} else {
+				writel((var->xres >> 1) << 16 |
+					(var->xres >> 1) ,
+					dfli->reg_base + LCD_SPU_DMA_PITCH_UV);
+			}
+		}
+	} else {
+		writel((uvp << 16) | uvp,
+			dfli->reg_base + LCD_SPU_DMA_PITCH_UV);
+	}
+
+	return 0;
+}
+
+static int dovefb_ovly_set_par(struct fb_info *fi)
+{
+	struct dovefb_layer_info *dfli = fi->par;
+	struct dovefb_info *info = dfli->info;
+	struct dovefb_layer_info *gfxli = info->gfx_plane;
+	struct fb_var_screeninfo *var = &fi->var;
+	int pix_fmt;
+	int xzoom, yzoom;
+
+	/*
+	 * Determine which pixel format we're going to use.
+	 */
+	pix_fmt = dovefb_determine_best_pix_fmt(&fi->var, dfli);
+	if (pix_fmt < 0)
+		return pix_fmt;
+	dfli->pix_fmt = pix_fmt;
+
+	/*
+	 * Set RGB bit field info.
+	 */
+	dovefb_set_pix_fmt(var, pix_fmt);
+
+	/*
+	 * Set additional mode info.
+	 */
+	if (pix_fmt == PIX_FMT_PSEUDOCOLOR)
+		fi->fix.visual = FB_VISUAL_PSEUDOCOLOR;
+	else
+		fi->fix.visual = FB_VISUAL_TRUECOLOR;
+	fi->fix.line_length = var->xres_virtual * var->bits_per_pixel / 8;
+
+	/*
+	 * Configure global panel parameters.
+	 */
+	set_dma_control0(dfli);
+	set_dma_control1(dfli, fi->var.sync);
+
+	/*
+	 * Configure graphics DMA parameters.
+	 */
+	set_graphics_start(fi, fi->var.xoffset, fi->var.yoffset);
+
+	/*
+	 * Configure yuv pitch.
+	 */
+	set_pitch(dfli, var);
+
+	/*
+	 * program original size.
+	 */
+	writel((var->yres << 16) | (var->xres),
+		dfli->reg_base + LCD_SPU_DMA_HPXL_VLN);
+
+	/*
+	 * program size after scaling.
+	 */
+	if (info->fixed_output == 0) {
+		yzoom = dfli->surface.viewPortInfo.zoomYSize;
+		xzoom = dfli->surface.viewPortInfo.zoomXSize;
+	} else {
+		yzoom = dfli->surface.viewPortInfo.zoomYSize *
+			info->out_vmode.yres / gfxli->fb_info->var.yres;
+		xzoom = dfli->surface.viewPortInfo.zoomXSize *
+			info->out_vmode.xres / gfxli->fb_info->var.xres;
+	}
+	writel((yzoom << 16) | xzoom,
+		dfli->reg_base + LCD_SPU_DZM_HPXL_VLN);
+
+	/* update video position offset */
+	writel(CFG_DMA_OVSA_VLN(dfli->surface.viewPortOffset.yOffset)|
+		dfli->surface.viewPortOffset.xOffset,
+		dfli->reg_base + LCD_SPUT_DMA_OVSA_HPXL_VLN);
+
+	return 0;
+}
+
+
+static int dovefb_ovly_fb_sync(struct fb_info *info)
+{
+	struct dovefb_layer_info *dfli = info->par;
+
+	return wait_for_vsync(dfli);
+}
+
+static void checkbuf_func(unsigned long data){
+
+	struct dovefb_layer_info *dfli = (struct dovefb_layer_info *) data;
+
+	/* wake up queue. */
+	atomic_set(&dfli->w_intr, 1);
+	wake_up(&dfli->w_intr_wq);
+
+	/* add a tasklet. */
+	tasklet_schedule(&dfli->tasklet);
+
+	/* kick off timer */
+	add_timer(&checkbuf_timer);
+}
+/*
+ *  dovefb_handle_irq(two lcd controllers)
+ */
+int dovefb_ovly_handle_irq(u32 isr, struct dovefb_layer_info *dfli)
+{
+	/* wake up queue. */
+	atomic_set(&dfli->w_intr, 1);
+	wake_up(&dfli->w_intr_wq);
+
+	/* add a tasklet. */
+	tasklet_schedule(&dfli->tasklet);
+
+	return 1;
+}
+
+
+#ifdef CONFIG_PM
+int dovefb_ovly_suspend(struct dovefb_layer_info *dfli, pm_message_t mesg)
+{
+	struct fb_info *fi = dfli->fb_info;
+
+	if (mesg.event & PM_EVENT_SLEEP)
+		fb_set_suspend(fi, 1);
+
+	return 0;
+}
+
+int dovefb_ovly_resume(struct dovefb_layer_info *dfli)
+{
+	struct fb_info *fi = dfli->fb_info;
+
+	dfli->active = 1;
+
+	if (dovefb_ovly_set_par(fi) != 0) {
+		printk(KERN_INFO "dovefb_ovly_resume(): Failed in "
+				"dovefb_ovly_set_par().\n");
+		return -1;
+	}
+
+	fb_set_suspend(fi, 0);
+
+	return 0;
+}
+#endif
+
+int dovefb_ovly_init(struct dovefb_info *info, struct dovefb_mach_info *dmi)
+{
+	struct dovefb_layer_info *dfli = info->vid_plane;
+	struct fb_info *fi = dfli->fb_info;
+
+	dfli->tasklet.next = NULL;
+	dfli->tasklet.state = 0;
+	atomic_set(&dfli->tasklet.count, 0);
+	dfli->tasklet.func = dovefb_do_tasklet;
+	dfli->tasklet.data = (unsigned long)fi;
+	dfli->surface.videoBufferAddr.startAddr = (unsigned char *)fi->fix.smem_start; 
+
+	init_waitqueue_head(&dfli->w_intr_wq);
+	mutex_init(&dfli->access_ok);
+
+	/*
+	 * Initialize check buffer timer
+	 */
+	init_timer(&checkbuf_timer);
+	checkbuf_timer.expires = jiffies + msecs_to_jiffies(CHECKBUF_TIMER_DELAY);
+	checkbuf_timer.data = (unsigned long)dfli;
+	checkbuf_timer.function = checkbuf_func;
+
+	/*
+	 * Fill in sane defaults.
+	 */
+	dovefb_set_mode(dfli, &fi->var, dmi->modes, dmi->pix_fmt, 0);
+	dovefb_ovly_set_par(fi);
+
+	/*
+	 * Configure default register values.
+	 */
+	writel(0x00000000, dfli->reg_base + LCD_SPU_DMA_START_ADDR_Y1);
+	writel(0x00000000, dfli->reg_base + LCD_SPU_DMA_START_ADDR_U1);
+	writel(0x00000000, dfli->reg_base + LCD_SPU_DMA_START_ADDR_V1);
+	writel(0x00000000, dfli->reg_base + LCD_SPUT_DMA_OVSA_HPXL_VLN);
+
+	return 0;
+}
+
+
+/* Fix me: Currently, bufferable property can't be enabled correctly. It has
+ * to be enabled cacheable. Or write buffer won't act properly. Here
+ * we override the attribute when any program wants to map to this
+ * buffer. When HW is ready, this function could simply be removed.
+ */
+static int dovefb_ovly_mmap(struct fb_info *info, struct vm_area_struct *vma)
+{
+	unsigned long off;
+	unsigned long start;
+	u32 len;
+
+	if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT))
+		return -EINVAL;
+	off = vma->vm_pgoff << PAGE_SHIFT;
+
+	lock_kernel();
+
+	/* frame buffer memory */
+	start = info->fix.smem_start;
+	len = PAGE_ALIGN((start & ~PAGE_MASK) + info->fix.smem_len);
+	if (off >= len) {
+		/* memory mapped io */
+		off -= len;
+		if (info->var.accel_flags) {
+			unlock_kernel();
+			return -EINVAL;
+		}
+		start = info->fix.mmio_start;
+		len = PAGE_ALIGN((start & ~PAGE_MASK) + info->fix.mmio_len);
+	}
+	unlock_kernel();
+	start &= PAGE_MASK;
+	if ((vma->vm_end - vma->vm_start + off) > len)
+		return -EINVAL;
+	off += start;
+	vma->vm_pgoff = off >> PAGE_SHIFT;
+	/* This is an IO map - tell maydump to skip this VMA */
+	vma->vm_flags |= VM_IO | VM_RESERVED;
+
+	/* io control needs non-cacheable attribute. */
+	if (start == info->fix.mmio_start)
+		vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
+	else
+		vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
+
+	if (io_remap_pfn_range(vma, vma->vm_start, off >> PAGE_SHIFT,
+			     vma->vm_end - vma->vm_start, vma->vm_page_prot))
+		return -EAGAIN;
+	return 0;
+}
+
+struct fb_ops dovefb_ovly_ops = {
+	.owner		= THIS_MODULE,
+	.fb_open	= dovefb_ovly_open,
+	.fb_release	= dovefb_release,
+	.fb_mmap	= dovefb_ovly_mmap,
+	.fb_check_var	= dovefb_check_var,
+	.fb_set_par	= dovefb_ovly_set_par,
+/*	.fb_setcolreg	= dovefb_setcolreg,*/
+	.fb_pan_display	= dovefb_ovly_pan_display,
+	.fb_fillrect	= cfb_fillrect,
+	.fb_copyarea	= cfb_copyarea,
+	.fb_imageblit	= cfb_imageblit,
+	.fb_sync	= dovefb_ovly_fb_sync,
+	.fb_ioctl	= dovefb_ovly_ioctl,
+};
+
+
+MODULE_AUTHOR("Green Wan <gwan@marvell.com>");
+MODULE_AUTHOR("Shadi Ammouri <shadi@marvell.com>");
+MODULE_DESCRIPTION("Framebuffer driver for Dove");
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/drivers/video/marvell/dovefb_gpio.c
+++ linux-mvl-dove-2.6.32/drivers/video/marvell/dovefb_gpio.c
@@ -0,0 +1,201 @@
+#include <linux/uaccess.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <video/dovefbreg.h>
+
+static unsigned int *lcd0_regbase;
+static unsigned int *lcd1_regbase;
+
+/*
+ * Initialize lcd reg base address.
+ * If success, return 0.
+ * If failed, return -1.
+ */
+int dovefb_save_regbase(void *reg_base, unsigned int id)
+{
+	if (!reg_base)
+		return -1;
+
+	switch (id) {
+	case 0:
+		lcd0_regbase = reg_base;
+		break;
+	case 1:
+		lcd1_regbase = reg_base;
+		break;
+	default:
+		printk(KERN_WARNING "Unknown lcd id\n");
+		return -2;
+	}
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(dovefb_save_regbase);
+
+/*
+ * Get base addr by lcd id
+ * if success, return addr;
+ * if failed, return 0;
+ */
+void *dovefb_get_addr_by_id(unsigned int lcd_id)
+{
+	switch (lcd_id) {
+	case 0:
+		return lcd0_regbase;
+	case 1:
+		return lcd1_regbase;
+	default:
+		printk(KERN_WARNING "Unknown lcd id\n");
+	}
+
+	return 0;
+}
+
+/*
+ * Get current dumb panel io pad mode.
+ * if success, return current mode.
+ * if failed, return -1.
+ */
+int dovefb_get_cur_mode(void *reg_base)
+{
+	if (!reg_base)
+		return -1;
+
+	return readl(reg_base+SPU_IOPAD_CONTROL) & 0x0000000F;
+}
+
+/*
+ * Get total gpio mask length
+ * if success, return gpio mask.
+ * if failed, return 0.
+ */
+unsigned int dovefb_get_gpio_mask(unsigned int mode)
+{
+	unsigned int gpio_mask = 0;
+
+	switch (mode) {
+	case 0x2:
+		gpio_mask = 0x1F; /* 0~4 */
+		break;
+	case 0x3:
+		gpio_mask = 0x3;  /* 0~1 */
+		break;
+	case 0x4:
+		gpio_mask = 0x7F; /* 0~6 */
+		break;
+	case 0x5:
+		gpio_mask = 0x3F; /* 0~5 */
+		break;
+	case 0x8:
+		gpio_mask = 0xFF; /* 0~7 */
+		break;
+	default:
+		printk(KERN_WARNING "Current IO PAD mode"
+			"doesn't has GPIO output\n");
+	}
+
+	return 0;
+}
+
+/*
+ * Get current mask & output gpio settings
+ * if success, return 0.
+ * if failed, return -1.
+ */
+int dovefb_get_current_setting(unsigned int lcd_id,
+	unsigned int *mask,
+	unsigned int *output)
+{
+	void *reg_base;
+	unsigned int reg_val;
+
+	reg_base = dovefb_get_addr_by_id(lcd_id);
+
+	if (!reg_base || !mask || !output)
+		return -1;
+
+	reg_val	= readl(reg_base+LCD_SPU_DUMB_CTRL);
+	*mask	= (reg_val & 0x000FF000) >> 12;
+	*output	= (reg_val & 0x0FF00000) >> 20;
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(dovefb_get_current_setting);
+
+/*
+ * set LCD GPIO data.
+ * mask, is the bit mask you want to set. bit 0 = lcd gpio mask 0
+ * data, is the output data you want to set. bit 0 = lcd gpio 0
+ * if success, return 0.
+ * if failed, return -1.
+ */
+int dovefb_set_gpio(unsigned int lcd_id, unsigned int mask, unsigned int output)
+{
+	unsigned int cur_mode;
+	unsigned int gpio_mask;
+	unsigned int reg_val;
+	void *reg_base;
+
+	reg_base = dovefb_get_addr_by_id(lcd_id);
+
+	if (!reg_base) {
+		printk(KERN_WARNING "Must init lcd reg base first!!\n");
+		return -1;
+	}
+
+	/* check current mode. */
+	cur_mode = dovefb_get_cur_mode(reg_base);
+
+	/* get total mask */
+	gpio_mask = dovefb_get_gpio_mask(cur_mode);
+
+	/* check mask length. */
+	if ((gpio_mask == 0) || (mask > gpio_mask))
+		return -2;
+
+	/* get current output data */
+	reg_val	= readl(reg_base+LCD_SPU_DUMB_CTRL);
+
+	/* clear all settings. */
+	reg_val &= ~0x0ffff000;
+
+	/* apply new setting. */
+	reg_val |= (mask & 0x000000FF) << 12;
+	reg_val |= (output & 0x000000FF) << 20;
+
+	/* write new setting back. */
+	writel(reg_val, reg_base+LCD_SPU_DUMB_CTRL);
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(dovefb_set_gpio);
+
+/*
+ * set specific gpio pin state.
+ * pin, is gpio number. 0~7
+ * state, is gpio state. 0 or 1.
+ * if success, return 0.
+ * if failed, return -1.
+ */
+int dovefb_set_pin_state(unsigned int lcd_id,
+	unsigned int pin, unsigned int state)
+{
+	unsigned int mask;
+	unsigned int output;
+
+	dovefb_get_current_setting(lcd_id, &mask, &output);
+
+	/* clear old setting */
+	mask &= ~(0x1 << pin);
+	output &= ~(0x1 << pin);
+
+	/* calc new setting */
+	mask |= 0x1 << pin;
+	output |= state << pin;
+
+	/* apply it */
+	dovefb_set_gpio(lcd_id, mask, output);
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(dovefb_set_pin_state);
--- linux-mvl-dove-2.6.32.orig/drivers/crypto/padlock-aes.c
+++ linux-mvl-dove-2.6.32/drivers/crypto/padlock-aes.c
@@ -285,7 +285,7 @@
 	if (initial)
 		asm volatile (".byte 0xf3,0x0f,0xa7,0xd0"	/* rep xcryptcbc */
 			      : "+S" (input), "+D" (output), "+a" (iv)
-			      : "d" (control_word), "b" (key), "c" (count));
+			      : "d" (control_word), "b" (key), "c" (initial));
 
 	asm volatile (".byte 0xf3,0x0f,0xa7,0xd0"	/* rep xcryptcbc */
 		      : "+S" (input), "+D" (output), "+a" (iv)
--- linux-mvl-dove-2.6.32.orig/drivers/crypto/padlock-sha.c
+++ linux-mvl-dove-2.6.32/drivers/crypto/padlock-sha.c
@@ -57,6 +57,23 @@
 	return crypto_shash_update(&dctx->fallback, data, length);
 }
 
+static int padlock_sha_export(struct shash_desc *desc, void *out)
+{
+	struct padlock_sha_desc *dctx = shash_desc_ctx(desc);
+
+	return crypto_shash_export(&dctx->fallback, out);
+}
+
+static int padlock_sha_import(struct shash_desc *desc, const void *in)
+{
+	struct padlock_sha_desc *dctx = shash_desc_ctx(desc);
+	struct padlock_sha_ctx *ctx = crypto_shash_ctx(desc->tfm);
+
+	dctx->fallback.tfm = ctx->fallback;
+	dctx->fallback.flags = desc->flags & CRYPTO_TFM_REQ_MAY_SLEEP;
+	return crypto_shash_import(&dctx->fallback, in);
+}
+
 static inline void padlock_output_block(uint32_t *src,
 		 	uint32_t *dst, size_t count)
 {
@@ -235,7 +252,10 @@
 	.update 	=	padlock_sha_update,
 	.finup  	=	padlock_sha1_finup,
 	.final  	=	padlock_sha1_final,
+	.export		=	padlock_sha_export,
+	.import		=	padlock_sha_import,
 	.descsize	=	sizeof(struct padlock_sha_desc),
+	.statesize	=	sizeof(struct sha1_state),
 	.base		=	{
 		.cra_name		=	"sha1",
 		.cra_driver_name	=	"sha1-padlock",
@@ -256,7 +276,10 @@
 	.update 	=	padlock_sha_update,
 	.finup  	=	padlock_sha256_finup,
 	.final  	=	padlock_sha256_final,
+	.export		=	padlock_sha_export,
+	.import		=	padlock_sha_import,
 	.descsize	=	sizeof(struct padlock_sha_desc),
+	.statesize	=	sizeof(struct sha256_state),
 	.base		=	{
 		.cra_name		=	"sha256",
 		.cra_driver_name	=	"sha256-padlock",
--- linux-mvl-dove-2.6.32.orig/drivers/parisc/led.c
+++ linux-mvl-dove-2.6.32/drivers/parisc/led.c
@@ -182,16 +182,18 @@
 static int led_proc_write(struct file *file, const char *buf, 
 	unsigned long count, void *data)
 {
-	char *cur, lbuf[count + 1];
+	char *cur, lbuf[32];
 	int d;
 
 	if (!capable(CAP_SYS_ADMIN))
 		return -EACCES;
 
-	memset(lbuf, 0, count + 1);
+	if (count >= sizeof(lbuf))
+		count = sizeof(lbuf)-1;
 
 	if (copy_from_user(lbuf, buf, count))
 		return -EFAULT;
+	lbuf[count] = 0;
 
 	cur = lbuf;
 
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/vga/vgaarb.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/vga/vgaarb.c
@@ -954,6 +954,7 @@
 		}
 
 	} else if (strncmp(curr_pos, "target ", 7) == 0) {
+		struct pci_bus *pbus;
 		unsigned int domain, bus, devfn;
 		struct vga_device *vgadev;
 
@@ -961,7 +962,7 @@
 		remaining -= 7;
 		pr_devel("client 0x%p called 'target'\n", priv);
 		/* if target is default */
-		if (!strncmp(buf, "default", 7))
+		if (!strncmp(curr_pos, "default", 7))
 			pdev = pci_dev_get(vga_default_device());
 		else {
 			if (!vga_pci_str_to_vars(curr_pos, remaining,
@@ -969,18 +970,31 @@
 				ret_val = -EPROTO;
 				goto done;
 			}
+			pr_devel("vgaarb: %s ==> %x:%x:%x.%x\n", curr_pos,
+				domain, bus, PCI_SLOT(devfn), PCI_FUNC(devfn));
 
-			pdev = pci_get_bus_and_slot(bus, devfn);
+			pbus = pci_find_bus(domain, bus);
+			pr_devel("vgaarb: pbus %p\n", pbus);
+			if (pbus == NULL) {
+				pr_err("vgaarb: invalid PCI domain and/or bus address %x:%x\n",
+					domain, bus);
+				ret_val = -ENODEV;
+				goto done;
+			}
+			pdev = pci_get_slot(pbus, devfn);
+			pr_devel("vgaarb: pdev %p\n", pdev);
 			if (!pdev) {
-				pr_info("vgaarb: invalid PCI address!\n");
+				pr_err("vgaarb: invalid PCI address %x:%x\n",
+					bus, devfn);
 				ret_val = -ENODEV;
 				goto done;
 			}
 		}
 
 		vgadev = vgadev_find(pdev);
+		pr_devel("vgaarb: vgadev %p\n", vgadev);
 		if (vgadev == NULL) {
-			pr_info("vgaarb: this pci device is not a vga device\n");
+			pr_err("vgaarb: this pci device is not a vga device\n");
 			pci_dev_put(pdev);
 			ret_val = -ENODEV;
 			goto done;
@@ -998,7 +1012,8 @@
 			}
 		}
 		if (i == MAX_USER_CARDS) {
-			pr_err("vgaarb: maximum user cards number reached!\n");
+			pr_err("vgaarb: maximum user cards (%d) number reached!\n",
+				MAX_USER_CARDS);
 			pci_dev_put(pdev);
 			/* XXX: which value to return? */
 			ret_val =  -ENOMEM;
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/drm_irq.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/drm_irq.c
@@ -115,6 +115,7 @@
 
 	dev->num_crtcs = 0;
 }
+EXPORT_SYMBOL(drm_vblank_cleanup);
 
 int drm_vblank_init(struct drm_device *dev, int num_crtcs)
 {
@@ -163,7 +164,6 @@
 	}
 
 	dev->vblank_disable_allowed = 0;
-
 	return 0;
 
 err:
@@ -429,15 +429,21 @@
 
 	spin_lock_irqsave(&dev->vbl_lock, irqflags);
 	/* Going from 0->1 means we have to enable interrupts again */
-	if (atomic_add_return(1, &dev->vblank_refcount[crtc]) == 1 &&
-	    !dev->vblank_enabled[crtc]) {
-		ret = dev->driver->enable_vblank(dev, crtc);
-		DRM_DEBUG("enabling vblank on crtc %d, ret: %d\n", crtc, ret);
-		if (ret)
+	if (atomic_add_return(1, &dev->vblank_refcount[crtc]) == 1) {
+		if (!dev->vblank_enabled[crtc]) {
+			ret = dev->driver->enable_vblank(dev, crtc);
+			DRM_DEBUG("enabling vblank on crtc %d, ret: %d\n", crtc, ret);
+			if (ret)
+				atomic_dec(&dev->vblank_refcount[crtc]);
+			else {
+				dev->vblank_enabled[crtc] = 1;
+				drm_update_vblank_count(dev, crtc);
+			}
+		}
+	} else {
+		if (!dev->vblank_enabled[crtc]) {
 			atomic_dec(&dev->vblank_refcount[crtc]);
-		else {
-			dev->vblank_enabled[crtc] = 1;
-			drm_update_vblank_count(dev, crtc);
+			ret = -EINVAL;
 		}
 	}
 	spin_unlock_irqrestore(&dev->vbl_lock, irqflags);
@@ -464,6 +470,18 @@
 }
 EXPORT_SYMBOL(drm_vblank_put);
 
+void drm_vblank_off(struct drm_device *dev, int crtc)
+{
+	unsigned long irqflags;
+
+	spin_lock_irqsave(&dev->vbl_lock, irqflags);
+	DRM_WAKEUP(&dev->vbl_queue[crtc]);
+	dev->vblank_enabled[crtc] = 0;
+	dev->last_vblank[crtc] = dev->driver->get_vblank_counter(dev, crtc);
+	spin_unlock_irqrestore(&dev->vbl_lock, irqflags);
+}
+EXPORT_SYMBOL(drm_vblank_off);
+
 /**
  * drm_vblank_pre_modeset - account for vblanks across mode sets
  * @dev: DRM device
@@ -475,6 +493,9 @@
  */
 void drm_vblank_pre_modeset(struct drm_device *dev, int crtc)
 {
+	/* vblank is not initialized (IRQ not installed ?) */
+	if (!dev->num_crtcs)
+		return;
 	/*
 	 * To avoid all the problems that might happen if interrupts
 	 * were enabled/disabled around or between these calls, we just
@@ -522,7 +543,8 @@
 		    struct drm_file *file_priv)
 {
 	struct drm_modeset_ctl *modeset = data;
-	int crtc, ret = 0;
+	int ret = 0;
+	unsigned int crtc;
 
 	/* If drm_vblank_init() hasn't been called yet, just no-op */
 	if (!dev->num_crtcs)
@@ -550,6 +572,63 @@
 	return ret;
 }
 
+static int drm_queue_vblank_event(struct drm_device *dev, int pipe,
+				  union drm_wait_vblank *vblwait,
+				  struct drm_file *file_priv)
+{
+	struct drm_pending_vblank_event *e;
+	struct timeval now;
+	unsigned long flags;
+	unsigned int seq;
+
+	e = kzalloc(sizeof *e, GFP_KERNEL);
+	if (e == NULL)
+		return -ENOMEM;
+
+	e->pipe = pipe;
+	e->event.base.type = DRM_EVENT_VBLANK;
+	e->event.base.length = sizeof e->event;
+	e->event.user_data = vblwait->request.signal;
+	e->base.event = &e->event.base;
+	e->base.file_priv = file_priv;
+	e->base.destroy = (void (*) (struct drm_pending_event *)) kfree;
+
+	do_gettimeofday(&now);
+	spin_lock_irqsave(&dev->event_lock, flags);
+
+	if (file_priv->event_space < sizeof e->event) {
+		spin_unlock_irqrestore(&dev->event_lock, flags);
+		kfree(e);
+		return -ENOMEM;
+	}
+
+	file_priv->event_space -= sizeof e->event;
+	seq = drm_vblank_count(dev, pipe);
+	if ((vblwait->request.type & _DRM_VBLANK_NEXTONMISS) &&
+	    (seq - vblwait->request.sequence) <= (1 << 23)) {
+		vblwait->request.sequence = seq + 1;
+		vblwait->reply.sequence = vblwait->request.sequence;
+	}
+
+	DRM_DEBUG("event on vblank count %d, current %d, crtc %d\n",
+		  vblwait->request.sequence, seq, pipe);
+
+	e->event.sequence = vblwait->request.sequence;
+	if ((seq - vblwait->request.sequence) <= (1 << 23)) {
+		e->event.tv_sec = now.tv_sec;
+		e->event.tv_usec = now.tv_usec;
+		drm_vblank_put(dev, e->pipe);
+		list_add_tail(&e->base.link, &e->base.file_priv->event_list);
+		wake_up_interruptible(&e->base.file_priv->event_wait);
+	} else {
+		list_add_tail(&e->base.link, &dev->vblank_event_list);
+	}
+
+	spin_unlock_irqrestore(&dev->event_lock, flags);
+
+	return 0;
+}
+
 /**
  * Wait for VBLANK.
  *
@@ -609,6 +688,9 @@
 		goto done;
 	}
 
+	if (flags & _DRM_VBLANK_EVENT)
+		return drm_queue_vblank_event(dev, crtc, vblwait, file_priv);
+
 	if ((flags & _DRM_VBLANK_NEXTONMISS) &&
 	    (seq - vblwait->request.sequence) <= (1<<23)) {
 		vblwait->request.sequence = seq + 1;
@@ -641,6 +723,38 @@
 	return ret;
 }
 
+void drm_handle_vblank_events(struct drm_device *dev, int crtc)
+{
+	struct drm_pending_vblank_event *e, *t;
+	struct timeval now;
+	unsigned long flags;
+	unsigned int seq;
+
+	do_gettimeofday(&now);
+	seq = drm_vblank_count(dev, crtc);
+
+	spin_lock_irqsave(&dev->event_lock, flags);
+
+	list_for_each_entry_safe(e, t, &dev->vblank_event_list, base.link) {
+		if (e->pipe != crtc)
+			continue;
+		if ((seq - e->event.sequence) > (1<<23))
+			continue;
+
+		DRM_DEBUG("vblank event on %d, current %d\n",
+			  e->event.sequence, seq);
+
+		e->event.sequence = seq;
+		e->event.tv_sec = now.tv_sec;
+		e->event.tv_usec = now.tv_usec;
+		drm_vblank_put(dev, e->pipe);
+		list_move_tail(&e->base.link, &e->base.file_priv->event_list);
+		wake_up_interruptible(&e->base.file_priv->event_wait);
+	}
+
+	spin_unlock_irqrestore(&dev->event_lock, flags);
+}
+
 /**
  * drm_handle_vblank - handle a vblank event
  * @dev: DRM device
@@ -651,7 +765,11 @@
  */
 void drm_handle_vblank(struct drm_device *dev, int crtc)
 {
+	if (!dev->num_crtcs)
+		return;
+
 	atomic_inc(&dev->_vblank_count[crtc]);
 	DRM_WAKEUP(&dev->vbl_queue[crtc]);
+	drm_handle_vblank_events(dev, crtc);
 }
 EXPORT_SYMBOL(drm_handle_vblank);
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/drm_drv.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/drm_drv.c
@@ -145,6 +145,8 @@
 	DRM_IOCTL_DEF(DRM_IOCTL_MODE_GETFB, drm_mode_getfb, DRM_MASTER|DRM_CONTROL_ALLOW),
 	DRM_IOCTL_DEF(DRM_IOCTL_MODE_ADDFB, drm_mode_addfb, DRM_MASTER|DRM_CONTROL_ALLOW),
 	DRM_IOCTL_DEF(DRM_IOCTL_MODE_RMFB, drm_mode_rmfb, DRM_MASTER|DRM_CONTROL_ALLOW),
+	DRM_IOCTL_DEF(DRM_IOCTL_MODE_PAGE_FLIP, drm_mode_page_flip_ioctl, DRM_MASTER|DRM_CONTROL_ALLOW),
+	DRM_IOCTL_DEF(DRM_IOCTL_MODE_DIRTYFB, drm_mode_dirtyfb_ioctl, DRM_MASTER|DRM_CONTROL_ALLOW)
 };
 
 #define DRM_CORE_IOCTL_COUNT	ARRAY_SIZE( drm_ioctls )
@@ -366,6 +368,29 @@
 module_exit(drm_core_exit);
 
 /**
+ * Copy and IOCTL return string to user space
+ */
+static int drm_copy_field(char *buf, size_t *buf_len, const char *value)
+{
+	int len;
+
+	/* don't overflow userbuf */
+	len = strlen(value);
+	if (len > *buf_len)
+		len = *buf_len;
+
+	/* let userspace know exact length of driver value (which could be
+	 * larger than the userspace-supplied buffer) */
+	*buf_len = strlen(value);
+
+	/* finally, try filling in the userbuf */
+	if (len && buf)
+		if (copy_to_user(buf, value, len))
+			return -EFAULT;
+	return 0;
+}
+
+/**
  * Get version information
  *
  * \param inode device inode.
@@ -380,16 +405,21 @@
 		       struct drm_file *file_priv)
 {
 	struct drm_version *version = data;
-	int len;
+	int err;
 
 	version->version_major = dev->driver->major;
 	version->version_minor = dev->driver->minor;
 	version->version_patchlevel = dev->driver->patchlevel;
-	DRM_COPY(version->name, dev->driver->name);
-	DRM_COPY(version->date, dev->driver->date);
-	DRM_COPY(version->desc, dev->driver->desc);
+	err = drm_copy_field(version->name, &version->name_len,
+			dev->driver->name);
+	if (!err)
+		err = drm_copy_field(version->date, &version->date_len,
+				dev->driver->date);
+	if (!err)
+		err = drm_copy_field(version->desc, &version->desc_len,
+				dev->driver->desc);
 
-	return 0;
+	return err;
 }
 
 /**
@@ -404,11 +434,11 @@
  * Looks up the ioctl function in the ::ioctls table, checking for root
  * previleges if so required, and dispatches to the respective function.
  */
-int drm_ioctl(struct inode *inode, struct file *filp,
+long drm_ioctl(struct file *filp,
 	      unsigned int cmd, unsigned long arg)
 {
 	struct drm_file *file_priv = filp->private_data;
-	struct drm_device *dev = file_priv->minor->dev;
+	struct drm_device *dev;
 	struct drm_ioctl_desc *ioctl;
 	drm_ioctl_t *func;
 	unsigned int nr = DRM_IOCTL_NR(cmd);
@@ -416,6 +446,7 @@
 	char stack_kdata[128];
 	char *kdata = NULL;
 
+	dev = file_priv->minor->dev;
 	atomic_inc(&dev->ioctl_count);
 	atomic_inc(&dev->counts[_DRM_STAT_IOCTLS]);
 	++file_priv->ioctl_count;
@@ -470,8 +501,16 @@
 				retcode = -EFAULT;
 				goto err_i1;
 			}
+		} else
+			memset(kdata, 0, _IOC_SIZE(cmd));
+
+		if (ioctl->flags & DRM_UNLOCKED)
+			retcode = func(dev, kdata, file_priv);
+		else {
+			lock_kernel();
+			retcode = func(dev, kdata, file_priv);
+			unlock_kernel();
 		}
-		retcode = func(dev, kdata, file_priv);
 
 		if (cmd & IOC_OUT) {
 			if (copy_to_user((void __user *)arg, kdata,
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/ati_pcigart.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/ati_pcigart.c
@@ -39,8 +39,7 @@
 				       struct drm_ati_pcigart_info *gart_info)
 {
 	gart_info->table_handle = drm_pci_alloc(dev, gart_info->table_size,
-						PAGE_SIZE,
-						gart_info->table_mask);
+						PAGE_SIZE);
 	if (gart_info->table_handle == NULL)
 		return -ENOMEM;
 
@@ -112,6 +111,13 @@
 	if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) {
 		DRM_DEBUG("PCI: no table in VRAM: using normal RAM\n");
 
+		if (pci_set_dma_mask(dev->pdev, gart_info->table_mask)) {
+			DRM_ERROR("fail to set dma mask to 0x%Lx\n",
+				  (unsigned long long)gart_info->table_mask);
+			ret = 1;
+			goto done;
+		}
+
 		ret = drm_ati_alloc_pcigart_table(dev, gart_info);
 		if (ret) {
 			DRM_ERROR("cannot allocate PCI GART page!\n");
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/drm_stub.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/drm_stub.c
@@ -128,6 +128,7 @@
 	kref_get(&master->refcount);
 	return master;
 }
+EXPORT_SYMBOL(drm_master_get);
 
 static void drm_master_destroy(struct kref *kref)
 {
@@ -170,10 +171,13 @@
 	kref_put(&(*master)->refcount, drm_master_destroy);
 	*master = NULL;
 }
+EXPORT_SYMBOL(drm_master_put);
 
 int drm_setmaster_ioctl(struct drm_device *dev, void *data,
 			struct drm_file *file_priv)
 {
+	int ret = 0;
+
 	if (file_priv->is_master)
 		return 0;
 
@@ -188,6 +192,13 @@
 		mutex_lock(&dev->struct_mutex);
 		file_priv->minor->master = drm_master_get(file_priv->master);
 		file_priv->is_master = 1;
+		if (dev->driver->master_set) {
+			ret = dev->driver->master_set(dev, file_priv, false);
+			if (unlikely(ret != 0)) {
+				file_priv->is_master = 0;
+				drm_master_put(&file_priv->minor->master);
+			}
+		}
 		mutex_unlock(&dev->struct_mutex);
 	}
 
@@ -204,6 +215,8 @@
 		return -EINVAL;
 
 	mutex_lock(&dev->struct_mutex);
+	if (dev->driver->master_drop)
+		dev->driver->master_drop(dev, file_priv, false);
 	drm_master_put(&file_priv->minor->master);
 	file_priv->is_master = 0;
 	mutex_unlock(&dev->struct_mutex);
@@ -220,9 +233,11 @@
 	INIT_LIST_HEAD(&dev->ctxlist);
 	INIT_LIST_HEAD(&dev->vmalist);
 	INIT_LIST_HEAD(&dev->maplist);
+	INIT_LIST_HEAD(&dev->vblank_event_list);
 
 	spin_lock_init(&dev->count_lock);
 	spin_lock_init(&dev->drw_lock);
+	spin_lock_init(&dev->event_lock);
 	init_timer(&dev->timer);
 	mutex_init(&dev->struct_mutex);
 	mutex_init(&dev->ctxlist_mutex);
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/drm_edid.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/drm_edid.c
@@ -85,6 +85,8 @@
 
 	/* Envision Peripherals, Inc. EN-7100e */
 	{ "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
+	/* Envision EN2028 */
+	{ "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
 
 	/* Funai Electronics PM36B */
 	{ "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
@@ -123,18 +125,20 @@
  */
 static bool edid_is_valid(struct edid *edid)
 {
-	int i;
+	int i, score = 0;
 	u8 csum = 0;
 	u8 *raw_edid = (u8 *)edid;
 
-	if (memcmp(edid->header, edid_header, sizeof(edid_header)))
-		goto bad;
-	if (edid->version != 1) {
-		DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
+	for (i = 0; i < sizeof(edid_header); i++)
+		if (raw_edid[i] == edid_header[i])
+			score++;
+
+	if (score == 8) ;
+	else if (score >= 6) {
+		DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
+		memcpy(raw_edid, edid_header, sizeof(edid_header));
+	} else
 		goto bad;
-	}
-	if (edid->revision > 4)
-		DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
 
 	for (i = 0; i < EDID_LENGTH; i++)
 		csum += raw_edid[i];
@@ -143,6 +147,14 @@
 		goto bad;
 	}
 
+	if (edid->version != 1) {
+		DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
+		goto bad;
+	}
+
+	if (edid->revision > 4)
+		DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
+
 	return 1;
 
 bad:
@@ -322,7 +334,7 @@
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 1024x768@85Hz */
 	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
-		   1072, 1376, 0, 768, 769, 772, 808, 0,
+		   1168, 1376, 0, 768, 769, 772, 808, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 1152x864@75Hz */
 	{ DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
@@ -481,16 +493,17 @@
 		   3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 };
+static const int drm_num_dmt_modes =
+	sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
 
 static struct drm_display_mode *drm_find_dmt(struct drm_device *dev,
 			int hsize, int vsize, int fresh)
 {
-	int i, count;
+	int i;
 	struct drm_display_mode *ptr, *mode;
 
-	count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
 	mode = NULL;
-	for (i = 0; i < count; i++) {
+	for (i = 0; i < drm_num_dmt_modes; i++) {
 		ptr = &drm_dmt_modes[i];
 		if (hsize == ptr->hdisplay &&
 			vsize == ptr->vdisplay &&
@@ -563,8 +576,8 @@
 		mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
 				    false);
 		mode->hdisplay = 1366;
-		mode->vsync_start = mode->vsync_start - 1;
-		mode->vsync_end = mode->vsync_end - 1;
+		mode->hsync_start = mode->hsync_start - 1;
+		mode->hsync_end = mode->hsync_end - 1;
 		return mode;
 	}
 	mode = NULL;
@@ -587,6 +600,50 @@
 	return mode;
 }
 
+/*
+ * EDID is delightfully ambiguous about how interlaced modes are to be
+ * encoded.  Our internal representation is of frame height, but some
+ * HDTV detailed timings are encoded as field height.
+ *
+ * The format list here is from CEA, in frame size.  Technically we
+ * should be checking refresh rate too.  Whatever.
+ */
+static void
+drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
+			    struct detailed_pixel_timing *pt)
+{
+	int i;
+	static const struct {
+		int w, h;
+	} cea_interlaced[] = {
+		{ 1920, 1080 },
+		{  720,  480 },
+		{ 1440,  480 },
+		{ 2880,  480 },
+		{  720,  576 },
+		{ 1440,  576 },
+		{ 2880,  576 },
+	};
+	static const int n_sizes =
+		sizeof(cea_interlaced)/sizeof(cea_interlaced[0]);
+
+	if (!(pt->misc & DRM_EDID_PT_INTERLACED))
+		return;
+
+	for (i = 0; i < n_sizes; i++) {
+		if ((mode->hdisplay == cea_interlaced[i].w) &&
+		    (mode->vdisplay == cea_interlaced[i].h / 2)) {
+			mode->vdisplay *= 2;
+			mode->vsync_start *= 2;
+			mode->vsync_end *= 2;
+			mode->vtotal *= 2;
+			mode->vtotal |= 1;
+		}
+	}
+
+	mode->flags |= DRM_MODE_FLAG_INTERLACE;
+}
+
 /**
  * drm_mode_detailed - create a new mode from an EDID detailed timing section
  * @dev: DRM device (needed to create new mode)
@@ -622,8 +679,7 @@
 		return NULL;
 	}
 	if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
-		printk(KERN_WARNING "integrated sync not supported\n");
-		return NULL;
+		printk(KERN_WARNING "composite sync not supported\n");
 	}
 
 	/* it is incorrect if hsync/vsync width is zero */
@@ -653,15 +709,6 @@
 	mode->vsync_end = mode->vsync_start + vsync_pulse_width;
 	mode->vtotal = mode->vdisplay + vblank;
 
-	/* perform the basic check for the detailed timing */
-	if (mode->hsync_end > mode->htotal ||
-		mode->vsync_end > mode->vtotal) {
-		drm_mode_destroy(dev, mode);
-		DRM_DEBUG_KMS("Incorrect detailed timing. "
-				"Sync is beyond the blank.\n");
-		return NULL;
-	}
-
 	/* Some EDIDs have bogus h/vtotal values */
 	if (mode->hsync_end > mode->htotal)
 		mode->htotal = mode->hsync_end + 1;
@@ -670,8 +717,7 @@
 
 	drm_mode_set_name(mode);
 
-	if (pt->misc & DRM_EDID_PT_INTERLACED)
-		mode->flags |= DRM_MODE_FLAG_INTERLACE;
+	drm_mode_do_interlace_quirk(mode, pt);
 
 	if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
 		pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
@@ -834,8 +880,169 @@
 	return modes;
 }
 
+/*
+ * XXX fix this for:
+ * - GTF secondary curve formula
+ * - EDID 1.4 range offsets
+ * - CVT extended bits
+ */
+static bool
+mode_in_range(struct drm_display_mode *mode, struct detailed_timing *timing)
+{
+	struct detailed_data_monitor_range *range;
+	int hsync, vrefresh;
+
+	range = &timing->data.other_data.data.range;
+
+	hsync = drm_mode_hsync(mode);
+	vrefresh = drm_mode_vrefresh(mode);
+
+	if (hsync < range->min_hfreq_khz || hsync > range->max_hfreq_khz)
+		return false;
+
+	if (vrefresh < range->min_vfreq || vrefresh > range->max_vfreq)
+		return false;
+
+	if (range->pixel_clock_mhz && range->pixel_clock_mhz != 0xff) {
+		/* be forgiving since it's in units of 10MHz */
+		int max_clock = range->pixel_clock_mhz * 10 + 9;
+		max_clock *= 1000;
+		if (mode->clock > max_clock)
+			return false;
+	}
+
+	return true;
+}
+
+/*
+ * XXX If drm_dmt_modes ever regrows the CVT-R modes (and it will) this will
+ * need to account for them.
+ */
+static int drm_gtf_modes_for_range(struct drm_connector *connector,
+				   struct detailed_timing *timing)
+{
+	int i, modes = 0;
+	struct drm_display_mode *newmode;
+	struct drm_device *dev = connector->dev;
+
+	for (i = 0; i < drm_num_dmt_modes; i++) {
+		if (mode_in_range(drm_dmt_modes + i, timing)) {
+			newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
+			if (newmode) {
+				drm_mode_probed_add(connector, newmode);
+				modes++;
+			}
+		}
+	}
+
+	return modes;
+}
+
+static int drm_cvt_modes(struct drm_connector *connector,
+			 struct detailed_timing *timing)
+{
+	int i, j, modes = 0;
+	struct drm_display_mode *newmode;
+	struct drm_device *dev = connector->dev;
+	struct cvt_timing *cvt;
+	const int rates[] = { 60, 85, 75, 60, 50 };
+	const u8 empty[3] = { 0, 0, 0 };
+
+	for (i = 0; i < 4; i++) {
+		int uninitialized_var(width), height;
+		cvt = &(timing->data.other_data.data.cvt[i]);
+
+		if (!memcmp(cvt->code, empty, 3))
+			continue;
+
+		height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
+		switch (cvt->code[1] & 0x0c) {
+		case 0x00:
+			width = height * 4 / 3;
+			break;
+		case 0x04:
+			width = height * 16 / 9;
+			break;
+		case 0x08:
+			width = height * 16 / 10;
+			break;
+		case 0x0c:
+			width = height * 15 / 9;
+			break;
+		}
+
+		for (j = 1; j < 5; j++) {
+			if (cvt->code[2] & (1 << j)) {
+				newmode = drm_cvt_mode(dev, width, height,
+						       rates[j], j == 0,
+						       false, false);
+				if (newmode) {
+					drm_mode_probed_add(connector, newmode);
+					modes++;
+				}
+			}
+		}
+	}
+
+	return modes;
+}
+
+static int add_detailed_modes(struct drm_connector *connector,
+			      struct detailed_timing *timing,
+			      struct edid *edid, u32 quirks, int preferred)
+{
+	int i, modes = 0;
+	struct detailed_non_pixel *data = &timing->data.other_data;
+	int timing_level = standard_timing_level(edid);
+	int gtf = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF);
+	struct drm_display_mode *newmode;
+	struct drm_device *dev = connector->dev;
+
+	if (timing->pixel_clock) {
+		newmode = drm_mode_detailed(dev, edid, timing, quirks);
+		if (!newmode)
+			return 0;
+
+		if (preferred)
+			newmode->type |= DRM_MODE_TYPE_PREFERRED;
+
+		drm_mode_probed_add(connector, newmode);
+		return 1;
+	}
+
+	/* other timing types */
+	switch (data->type) {
+	case EDID_DETAIL_MONITOR_RANGE:
+		if (gtf)
+			modes += drm_gtf_modes_for_range(connector, timing);
+		break;
+	case EDID_DETAIL_STD_MODES:
+		/* Six modes per detailed section */
+		for (i = 0; i < 6; i++) {
+			struct std_timing *std;
+			struct drm_display_mode *newmode;
+
+			std = &data->data.timings[i];
+			newmode = drm_mode_std(dev, std, edid->revision,
+					       timing_level);
+			if (newmode) {
+				drm_mode_probed_add(connector, newmode);
+				modes++;
+			}
+		}
+		break;
+	case EDID_DETAIL_CVT_3BYTE:
+		modes += drm_cvt_modes(connector, timing);
+		break;
+	default:
+		break;
+	}
+
+	return modes;
+}
+
 /**
- * add_detailed_modes - get detailed mode info from EDID data
+ * add_detailed_info - get detailed mode info from EDID data
  * @connector: attached connector
  * @edid: EDID block to scan
  * @quirks: quirks to apply
@@ -846,67 +1053,24 @@
 static int add_detailed_info(struct drm_connector *connector,
 			     struct edid *edid, u32 quirks)
 {
-	struct drm_device *dev = connector->dev;
-	int i, j, modes = 0;
-	int timing_level;
-
-	timing_level = standard_timing_level(edid);
+	int i, modes = 0;
 
 	for (i = 0; i < EDID_DETAILED_TIMINGS; i++) {
 		struct detailed_timing *timing = &edid->detailed_timings[i];
-		struct detailed_non_pixel *data = &timing->data.other_data;
-		struct drm_display_mode *newmode;
-
-		/* X server check is version 1.1 or higher */
-		if (edid->version == 1 && edid->revision >= 1 &&
-		    !timing->pixel_clock) {
-			/* Other timing or info */
-			switch (data->type) {
-			case EDID_DETAIL_MONITOR_SERIAL:
-				break;
-			case EDID_DETAIL_MONITOR_STRING:
-				break;
-			case EDID_DETAIL_MONITOR_RANGE:
-				/* Get monitor range data */
-				break;
-			case EDID_DETAIL_MONITOR_NAME:
-				break;
-			case EDID_DETAIL_MONITOR_CPDATA:
-				break;
-			case EDID_DETAIL_STD_MODES:
-				for (j = 0; j < 6; i++) {
-					struct std_timing *std;
-					struct drm_display_mode *newmode;
-
-					std = &data->data.timings[j];
-					newmode = drm_mode_std(dev, std,
-							       edid->revision,
-							       timing_level);
-					if (newmode) {
-						drm_mode_probed_add(connector, newmode);
-						modes++;
-					}
-				}
-				break;
-			default:
-				break;
-			}
-		} else {
-			newmode = drm_mode_detailed(dev, edid, timing, quirks);
-			if (!newmode)
-				continue;
+		int preferred = (i == 0) && (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
 
-			/* First detailed mode is preferred */
-			if (i == 0 && (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING))
-				newmode->type |= DRM_MODE_TYPE_PREFERRED;
-			drm_mode_probed_add(connector, newmode);
+		/* In 1.0, only timings are allowed */
+		if (!timing->pixel_clock && edid->version == 1 &&
+			edid->revision == 0)
+			continue;
 
-			modes++;
-		}
+		modes += add_detailed_modes(connector, timing, edid, quirks,
+					    preferred);
 	}
 
 	return modes;
 }
+
 /**
  * add_detailed_mode_eedid - get detailed mode info from addtional timing
  * 			EDID block
@@ -920,12 +1084,9 @@
 static int add_detailed_info_eedid(struct drm_connector *connector,
 			     struct edid *edid, u32 quirks)
 {
-	struct drm_device *dev = connector->dev;
-	int i, j, modes = 0;
+	int i, modes = 0;
 	char *edid_ext = NULL;
 	struct detailed_timing *timing;
-	struct detailed_non_pixel *data;
-	struct drm_display_mode *newmode;
 	int edid_ext_num;
 	int start_offset, end_offset;
 	int timing_level;
@@ -976,51 +1137,7 @@
 	for (i = start_offset; i < end_offset;
 			i += sizeof(struct detailed_timing)) {
 		timing = (struct detailed_timing *)(edid_ext + i);
-		data = &timing->data.other_data;
-		/* Detailed mode timing */
-		if (timing->pixel_clock) {
-			newmode = drm_mode_detailed(dev, edid, timing, quirks);
-			if (!newmode)
-				continue;
-
-			drm_mode_probed_add(connector, newmode);
-
-			modes++;
-			continue;
-		}
-
-		/* Other timing or info */
-		switch (data->type) {
-		case EDID_DETAIL_MONITOR_SERIAL:
-			break;
-		case EDID_DETAIL_MONITOR_STRING:
-			break;
-		case EDID_DETAIL_MONITOR_RANGE:
-			/* Get monitor range data */
-			break;
-		case EDID_DETAIL_MONITOR_NAME:
-			break;
-		case EDID_DETAIL_MONITOR_CPDATA:
-			break;
-		case EDID_DETAIL_STD_MODES:
-			/* Five modes per detailed section */
-			for (j = 0; j < 5; i++) {
-				struct std_timing *std;
-				struct drm_display_mode *newmode;
-
-				std = &data->data.timings[j];
-				newmode = drm_mode_std(dev, std,
-						       edid->revision,
-						       timing_level);
-				if (newmode) {
-					drm_mode_probed_add(connector, newmode);
-					modes++;
-				}
-			}
-			break;
-		default:
-			break;
-		}
+		modes += add_detailed_modes(connector, timing, edid, quirks, 0);
 	}
 
 	return modes;
@@ -1066,19 +1183,19 @@
 			     struct i2c_adapter *adapter,
 			     char *buf, int len)
 {
-	int ret;
+	int i;
 
-	ret = drm_do_probe_ddc_edid(adapter, buf, len);
-	if (ret != 0) {
-		goto end;
-	}
-	if (!edid_is_valid((struct edid *)buf)) {
-		dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n",
-			 drm_get_connector_name(connector));
-		ret = -1;
+	for (i = 0; i < 4; i++) {
+		if (drm_do_probe_ddc_edid(adapter, buf, len))
+			return -1;
+		if (edid_is_valid((struct edid *)buf))
+			return 0;
 	}
-end:
-	return ret;
+
+	/* repeated checksum failures; warn, but carry on */
+	dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n",
+		 drm_get_connector_name(connector));
+	return -1;
 }
 
 /**
@@ -1296,6 +1413,8 @@
 					ptr->vdisplay > vdisplay)
 				continue;
 		}
+		if (drm_mode_vrefresh(ptr) > 61)
+			continue;
 		mode = drm_mode_duplicate(dev, ptr);
 		if (mode) {
 			drm_mode_probed_add(connector, mode);
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/Kconfig
@@ -66,6 +66,8 @@
 
 	  If M is selected, the module will be called radeon.
 
+source "drivers/gpu/drm/radeon/Kconfig"
+
 config DRM_I810
 	tristate "Intel I810"
 	depends on DRM && AGP && AGP_INTEL
@@ -92,7 +94,10 @@
 config DRM_I915
 	tristate "i915 driver"
 	depends on AGP_INTEL
+	# we need shmfs for the swappable backing store, and in particular
+	# the shmem_readpage() which depends upon tmpfs
 	select SHMEM
+	select TMPFS
 	select DRM_KMS_HELPER
 	select FB_CFB_FILLRECT
 	select FB_CFB_COPYAREA
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/drm_modes.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/drm_modes.c
@@ -1,9 +1,4 @@
 /*
- * The list_sort function is (presumably) licensed under the GPL (see the
- * top level "COPYING" file for details).
- *
- * The remainder of this file is:
- *
  * Copyright © 1997-2003 by The XFree86 Project, Inc.
  * Copyright © 2007 Dave Airlie
  * Copyright © 2007-2008 Intel Corporation
@@ -36,6 +31,7 @@
  */
 
 #include <linux/list.h>
+#include <linux/list_sort.h>
 #include "drmP.h"
 #include "drm.h"
 #include "drm_crtc.h"
@@ -553,6 +549,32 @@
 }
 EXPORT_SYMBOL(drm_mode_height);
 
+/** drm_mode_hsync - get the hsync of a mode
+ * @mode: mode
+ *
+ * LOCKING:
+ * None.
+ *
+ * Return @modes's hsync rate in kHz, rounded to the nearest int.
+ */
+int drm_mode_hsync(struct drm_display_mode *mode)
+{
+	unsigned int calc_val;
+
+	if (mode->hsync)
+		return mode->hsync;
+
+	if (mode->htotal < 0)
+		return 0;
+
+	calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */
+	calc_val += 500;				/* round to 1000Hz */
+	calc_val /= 1000;				/* truncate to kHz */
+
+	return calc_val;
+}
+EXPORT_SYMBOL(drm_mode_hsync);
+
 /**
  * drm_mode_vrefresh - get the vrefresh of a mode
  * @mode: mode
@@ -560,7 +582,7 @@
  * LOCKING:
  * None.
  *
- * Return @mode's vrefresh rate or calculate it if necessary.
+ * Return @mode's vrefresh rate in Hz or calculate it if necessary.
  *
  * FIXME: why is this needed?  shouldn't vrefresh be set already?
  *
@@ -829,6 +851,7 @@
 
 /**
  * drm_mode_compare - compare modes for favorability
+ * @priv: unused
  * @lh_a: list_head for first mode
  * @lh_b: list_head for second mode
  *
@@ -842,7 +865,7 @@
  * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or
  * positive if @lh_b is better than @lh_a.
  */
-static int drm_mode_compare(struct list_head *lh_a, struct list_head *lh_b)
+static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b)
 {
 	struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head);
 	struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head);
@@ -859,85 +882,6 @@
 	return diff;
 }
 
-/* FIXME: what we don't have a list sort function? */
-/* list sort from Mark J Roberts (mjr@znex.org) */
-void list_sort(struct list_head *head,
-	       int (*cmp)(struct list_head *a, struct list_head *b))
-{
-	struct list_head *p, *q, *e, *list, *tail, *oldhead;
-	int insize, nmerges, psize, qsize, i;
-
-	list = head->next;
-	list_del(head);
-	insize = 1;
-	for (;;) {
-		p = oldhead = list;
-		list = tail = NULL;
-		nmerges = 0;
-
-		while (p) {
-			nmerges++;
-			q = p;
-			psize = 0;
-			for (i = 0; i < insize; i++) {
-				psize++;
-				q = q->next == oldhead ? NULL : q->next;
-				if (!q)
-					break;
-			}
-
-			qsize = insize;
-			while (psize > 0 || (qsize > 0 && q)) {
-				if (!psize) {
-					e = q;
-					q = q->next;
-					qsize--;
-					if (q == oldhead)
-						q = NULL;
-				} else if (!qsize || !q) {
-					e = p;
-					p = p->next;
-					psize--;
-					if (p == oldhead)
-						p = NULL;
-				} else if (cmp(p, q) <= 0) {
-					e = p;
-					p = p->next;
-					psize--;
-					if (p == oldhead)
-						p = NULL;
-				} else {
-					e = q;
-					q = q->next;
-					qsize--;
-					if (q == oldhead)
-						q = NULL;
-				}
-				if (tail)
-					tail->next = e;
-				else
-					list = e;
-				e->prev = tail;
-				tail = e;
-			}
-			p = q;
-		}
-
-		tail->next = list;
-		list->prev = tail;
-
-		if (nmerges <= 1)
-			break;
-
-		insize *= 2;
-	}
-
-	head->next = list;
-	head->prev = list->prev;
-	list->prev->next = head;
-	list->prev = head;
-}
-
 /**
  * drm_mode_sort - sort mode list
  * @mode_list: list to sort
@@ -949,7 +893,7 @@
  */
 void drm_mode_sort(struct list_head *mode_list)
 {
-	list_sort(mode_list, drm_mode_compare);
+	list_sort(NULL, mode_list, drm_mode_compare);
 }
 EXPORT_SYMBOL(drm_mode_sort);
 
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/drm_fb_helper.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/drm_fb_helper.c
@@ -156,7 +156,7 @@
 			force = DRM_FORCE_ON;
 			break;
 		case 'D':
-			if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) ||
+			if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) &&
 			    (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB))
 				force = DRM_FORCE_ON;
 			else
@@ -373,11 +373,9 @@
 					mutex_unlock(&dev->mode_config.mutex);
 				}
 			}
-			if (dpms_mode == DRM_MODE_DPMS_OFF) {
-				mutex_lock(&dev->mode_config.mutex);
-				crtc_funcs->dpms(crtc, dpms_mode);
-				mutex_unlock(&dev->mode_config.mutex);
-			}
+			mutex_lock(&dev->mode_config.mutex);
+			crtc_funcs->dpms(crtc, DRM_MODE_DPMS_OFF);
+			mutex_unlock(&dev->mode_config.mutex);
 		}
 	}
 }
@@ -385,18 +383,23 @@
 int drm_fb_helper_blank(int blank, struct fb_info *info)
 {
 	switch (blank) {
+	/* Display: On; HSync: On, VSync: On */
 	case FB_BLANK_UNBLANK:
 		drm_fb_helper_on(info);
 		break;
+	/* Display: Off; HSync: On, VSync: On */
 	case FB_BLANK_NORMAL:
 		drm_fb_helper_off(info, DRM_MODE_DPMS_STANDBY);
 		break;
+	/* Display: Off; HSync: Off, VSync: On */
 	case FB_BLANK_HSYNC_SUSPEND:
 		drm_fb_helper_off(info, DRM_MODE_DPMS_STANDBY);
 		break;
+	/* Display: Off; HSync: On, VSync: Off */
 	case FB_BLANK_VSYNC_SUSPEND:
 		drm_fb_helper_off(info, DRM_MODE_DPMS_SUSPEND);
 		break;
+	/* Display: Off; HSync: Off, VSync: Off */
 	case FB_BLANK_POWERDOWN:
 		drm_fb_helper_off(info, DRM_MODE_DPMS_OFF);
 		break;
@@ -603,11 +606,10 @@
 		return -EINVAL;
 
 	/* Need to resize the fb object !!! */
-	if (var->xres > fb->width || var->yres > fb->height) {
-		DRM_ERROR("Requested width/height is greater than current fb "
-			   "object %dx%d > %dx%d\n", var->xres, var->yres,
-			   fb->width, fb->height);
-		DRM_ERROR("Need resizing code.\n");
+	if (var->bits_per_pixel > fb->bits_per_pixel || var->xres > fb->width || var->yres > fb->height) {
+		DRM_DEBUG("fb userspace requested width/height/bpp is greater than current fb "
+			  "object %dx%d-%d > %dx%d-%d\n", var->xres, var->yres, var->bits_per_pixel,
+			  fb->width, fb->height, fb->bits_per_pixel);
 		return -EINVAL;
 	}
 
@@ -905,8 +907,13 @@
 
 	if (new_fb) {
 		info->var.pixclock = 0;
-		if (register_framebuffer(info) < 0)
+		ret = fb_alloc_cmap(&info->cmap, modeset->crtc->gamma_size, 0);
+		if (ret)
+			return ret;
+		if (register_framebuffer(info) < 0) {
+			fb_dealloc_cmap(&info->cmap);
 			return -EINVAL;
+		}
 	} else {
 		drm_fb_helper_set_par(info);
 	}
@@ -936,6 +943,7 @@
 		unregister_sysrq_key('v', &sysrq_drm_fb_helper_restore_op);
 	}
 	drm_fb_helper_crtc_free(helper);
+	fb_dealloc_cmap(&helper->fb->fbdev->cmap);
 }
 EXPORT_SYMBOL(drm_fb_helper_free);
 
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/drm_crtc.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/drm_crtc.c
@@ -125,6 +125,15 @@
 DRM_ENUM_NAME_FN(drm_get_tv_subconnector_name,
 		 drm_tv_subconnector_enum_list)
 
+static struct drm_prop_enum_list drm_dirty_info_enum_list[] = {
+	{ DRM_MODE_DIRTY_OFF,      "Off"      },
+	{ DRM_MODE_DIRTY_ON,       "On"       },
+	{ DRM_MODE_DIRTY_ANNOTATE, "Annotate" },
+};
+
+DRM_ENUM_NAME_FN(drm_get_dirty_info_name,
+		 drm_dirty_info_enum_list)
+
 struct drm_conn_prop_enum_list {
 	int type;
 	char *name;
@@ -144,11 +153,12 @@
 	{ DRM_MODE_CONNECTOR_SVIDEO, "SVIDEO", 0 },
 	{ DRM_MODE_CONNECTOR_LVDS, "LVDS", 0 },
 	{ DRM_MODE_CONNECTOR_Component, "Component", 0 },
-	{ DRM_MODE_CONNECTOR_9PinDIN, "9-pin DIN", 0 },
-	{ DRM_MODE_CONNECTOR_DisplayPort, "DisplayPort", 0 },
-	{ DRM_MODE_CONNECTOR_HDMIA, "HDMI Type A", 0 },
-	{ DRM_MODE_CONNECTOR_HDMIB, "HDMI Type B", 0 },
+	{ DRM_MODE_CONNECTOR_9PinDIN, "DIN", 0 },
+	{ DRM_MODE_CONNECTOR_DisplayPort, "DP", 0 },
+	{ DRM_MODE_CONNECTOR_HDMIA, "HDMI-A", 0 },
+	{ DRM_MODE_CONNECTOR_HDMIB, "HDMI-B", 0 },
 	{ DRM_MODE_CONNECTOR_TV, "TV", 0 },
+	{ DRM_MODE_CONNECTOR_eDP, "eDP", 0 },
 };
 
 static struct drm_prop_enum_list drm_encoder_enum_list[] =
@@ -247,7 +257,8 @@
 	mutex_unlock(&dev->mode_config.idr_mutex);
 }
 
-void *drm_mode_object_find(struct drm_device *dev, uint32_t id, uint32_t type)
+struct drm_mode_object *drm_mode_object_find(struct drm_device *dev,
+		uint32_t id, uint32_t type)
 {
 	struct drm_mode_object *obj = NULL;
 
@@ -272,7 +283,7 @@
  * functions & device file and adds it to the master fd list.
  *
  * RETURNS:
- * Zero on success, error code on falure.
+ * Zero on success, error code on failure.
  */
 int drm_framebuffer_init(struct drm_device *dev, struct drm_framebuffer *fb,
 			 const struct drm_framebuffer_funcs *funcs)
@@ -802,6 +813,36 @@
 EXPORT_SYMBOL(drm_mode_create_dithering_property);
 
 /**
+ * drm_mode_create_dirty_property - create dirty property
+ * @dev: DRM device
+ *
+ * Called by a driver the first time it's needed, must be attached to desired
+ * connectors.
+ */
+int drm_mode_create_dirty_info_property(struct drm_device *dev)
+{
+	struct drm_property *dirty_info;
+	int i;
+
+	if (dev->mode_config.dirty_info_property)
+		return 0;
+
+	dirty_info =
+		drm_property_create(dev, DRM_MODE_PROP_ENUM |
+				    DRM_MODE_PROP_IMMUTABLE,
+				    "dirty",
+				    ARRAY_SIZE(drm_dirty_info_enum_list));
+	for (i = 0; i < ARRAY_SIZE(drm_dirty_info_enum_list); i++)
+		drm_property_add_enum(dirty_info, i,
+				      drm_dirty_info_enum_list[i].type,
+				      drm_dirty_info_enum_list[i].name);
+	dev->mode_config.dirty_info_property = dirty_info;
+
+	return 0;
+}
+EXPORT_SYMBOL(drm_mode_create_dirty_info_property);
+
+/**
  * drm_mode_config_init - initialize DRM mode_configuration structure
  * @dev: DRM device
  *
@@ -1753,6 +1794,71 @@
 	return ret;
 }
 
+int drm_mode_dirtyfb_ioctl(struct drm_device *dev,
+			   void *data, struct drm_file *file_priv)
+{
+	struct drm_clip_rect __user *clips_ptr;
+	struct drm_clip_rect *clips = NULL;
+	struct drm_mode_fb_dirty_cmd *r = data;
+	struct drm_mode_object *obj;
+	struct drm_framebuffer *fb;
+	unsigned flags;
+	int num_clips;
+	int ret = 0;
+
+	mutex_lock(&dev->mode_config.mutex);
+	obj = drm_mode_object_find(dev, r->fb_id, DRM_MODE_OBJECT_FB);
+	if (!obj) {
+		DRM_ERROR("invalid framebuffer id\n");
+		ret = -EINVAL;
+		goto out_err1;
+	}
+	fb = obj_to_fb(obj);
+
+	num_clips = r->num_clips;
+	clips_ptr = (struct drm_clip_rect *)(unsigned long)r->clips_ptr;
+
+	if (!num_clips != !clips_ptr) {
+		ret = -EINVAL;
+		goto out_err1;
+	}
+
+	flags = DRM_MODE_FB_DIRTY_FLAGS & r->flags;
+
+	/* If userspace annotates copy, clips must come in pairs */
+	if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY && (num_clips % 2)) {
+		ret = -EINVAL;
+		goto out_err1;
+	}
+
+	if (num_clips && clips_ptr) {
+		clips = kzalloc(num_clips * sizeof(*clips), GFP_KERNEL);
+		if (!clips) {
+			ret = -ENOMEM;
+			goto out_err1;
+		}
+
+		ret = copy_from_user(clips, clips_ptr,
+				     num_clips * sizeof(*clips));
+		if (ret)
+			goto out_err2;
+	}
+
+	if (fb->funcs->dirty) {
+		ret = fb->funcs->dirty(fb, flags, r->color, clips, num_clips);
+	} else {
+		ret = -ENOSYS;
+		goto out_err2;
+	}
+
+out_err2:
+	kfree(clips);
+out_err1:
+	mutex_unlock(&dev->mode_config.mutex);
+	return ret;
+}
+
+
 /**
  * drm_fb_release - remove and free the FBs on this file
  * @filp: file * from the ioctl
@@ -2328,7 +2434,7 @@
 	} else if (connector->funcs->set_property)
 		ret = connector->funcs->set_property(connector, property, out_resp->value);
 
-	/* store the property value if succesful */
+	/* store the property value if successful */
 	if (!ret)
 		drm_connector_property_set_value(connector, property, out_resp->value);
 out:
@@ -2478,3 +2584,72 @@
 	mutex_unlock(&dev->mode_config.mutex);
 	return ret;
 }
+
+int drm_mode_page_flip_ioctl(struct drm_device *dev,
+			     void *data, struct drm_file *file_priv)
+{
+	struct drm_mode_crtc_page_flip *page_flip = data;
+	struct drm_mode_object *obj;
+	struct drm_crtc *crtc;
+	struct drm_framebuffer *fb;
+	struct drm_pending_vblank_event *e = NULL;
+	unsigned long flags;
+	int ret = -EINVAL;
+
+	if (page_flip->flags & ~DRM_MODE_PAGE_FLIP_FLAGS ||
+	    page_flip->reserved != 0)
+		return -EINVAL;
+
+	mutex_lock(&dev->mode_config.mutex);
+	obj = drm_mode_object_find(dev, page_flip->crtc_id, DRM_MODE_OBJECT_CRTC);
+	if (!obj)
+		goto out;
+	crtc = obj_to_crtc(obj);
+
+	if (crtc->funcs->page_flip == NULL)
+		goto out;
+
+	obj = drm_mode_object_find(dev, page_flip->fb_id, DRM_MODE_OBJECT_FB);
+	if (!obj)
+		goto out;
+	fb = obj_to_fb(obj);
+
+	if (page_flip->flags & DRM_MODE_PAGE_FLIP_EVENT) {
+		ret = -ENOMEM;
+		spin_lock_irqsave(&dev->event_lock, flags);
+		if (file_priv->event_space < sizeof e->event) {
+			spin_unlock_irqrestore(&dev->event_lock, flags);
+			goto out;
+		}
+		file_priv->event_space -= sizeof e->event;
+		spin_unlock_irqrestore(&dev->event_lock, flags);
+
+		e = kzalloc(sizeof *e, GFP_KERNEL);
+		if (e == NULL) {
+			spin_lock_irqsave(&dev->event_lock, flags);
+			file_priv->event_space += sizeof e->event;
+			spin_unlock_irqrestore(&dev->event_lock, flags);
+			goto out;
+		}
+
+		e->event.base.type = DRM_EVENT_FLIP_COMPLETE;
+		e->event.base.length = sizeof e->event;
+		e->event.user_data = page_flip->user_data;
+		e->base.event = &e->event.base;
+		e->base.file_priv = file_priv;
+		e->base.destroy =
+			(void (*) (struct drm_pending_event *)) kfree;
+	}
+
+	ret = crtc->funcs->page_flip(crtc, fb, e);
+	if (ret) {
+		spin_lock_irqsave(&dev->event_lock, flags);
+		file_priv->event_space += sizeof e->event;
+		spin_unlock_irqrestore(&dev->event_lock, flags);
+		kfree(e);
+	}
+
+out:
+	mutex_unlock(&dev->mode_config.mutex);
+	return ret;
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/drm_pci.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/drm_pci.c
@@ -47,8 +47,7 @@
 /**
  * \brief Allocate a PCI consistent memory block, for DMA.
  */
-drm_dma_handle_t *drm_pci_alloc(struct drm_device * dev, size_t size, size_t align,
-				dma_addr_t maxaddr)
+drm_dma_handle_t *drm_pci_alloc(struct drm_device * dev, size_t size, size_t align)
 {
 	drm_dma_handle_t *dmah;
 #if 1
@@ -63,11 +62,6 @@
 	if (align > size)
 		return NULL;
 
-	if (pci_set_dma_mask(dev->pdev, maxaddr) != 0) {
-		DRM_ERROR("Setting pci dma mask failed\n");
-		return NULL;
-	}
-
 	dmah = kmalloc(sizeof(drm_dma_handle_t), GFP_KERNEL);
 	if (!dmah)
 		return NULL;
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/drm_crtc_helper.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/drm_crtc_helper.c
@@ -104,12 +104,13 @@
 	if (connector->status == connector_status_disconnected) {
 		DRM_DEBUG_KMS("%s is disconnected\n",
 			  drm_get_connector_name(connector));
+		drm_mode_connector_update_edid_property(connector, NULL);
 		goto prune;
 	}
 
 	count = (*connector_funcs->get_modes)(connector);
 	if (!count) {
-		count = drm_add_modes_noedid(connector, 800, 600);
+		count = drm_add_modes_noedid(connector, 1024, 768);
 		if (!count)
 			return 0;
 	}
@@ -216,7 +217,7 @@
 EXPORT_SYMBOL(drm_helper_crtc_in_use);
 
 /**
- * drm_disable_unused_functions - disable unused objects
+ * drm_helper_disable_unused_functions - disable unused objects
  * @dev: DRM device
  *
  * LOCKING:
@@ -702,7 +703,7 @@
 		if (encoder->crtc != crtc)
 			continue;
 
-		DRM_INFO("%s: set mode %s %x\n", drm_get_encoder_name(encoder),
+		DRM_DEBUG("%s: set mode %s %x\n", drm_get_encoder_name(encoder),
 			 mode->name, mode->base.id);
 		encoder_funcs = encoder->helper_private;
 		encoder_funcs->mode_set(encoder, mode, adjusted_mode);
@@ -924,13 +925,13 @@
 		mode_changed = true;
 
 	if (mode_changed) {
-		old_fb = set->crtc->fb;
-		set->crtc->fb = set->fb;
 		set->crtc->enabled = (set->mode != NULL);
 		if (set->mode != NULL) {
 			DRM_DEBUG_KMS("attempting to set mode from"
 					" userspace\n");
 			drm_mode_debug_printmodeline(set->mode);
+			old_fb = set->crtc->fb;
+			set->crtc->fb = set->fb;
 			if (!drm_crtc_helper_set_mode(set->crtc, set->mode,
 						      set->x, set->y,
 						      old_fb)) {
@@ -1020,6 +1021,9 @@
 {
 	int count = 0;
 
+	/* disable all the possible outputs/crtcs before entering KMS mode */
+	drm_helper_disable_unused_functions(dev);
+
 	drm_fb_helper_parse_command_line(dev);
 
 	count = drm_helper_probe_connector_modes(dev,
@@ -1029,7 +1033,8 @@
 	/*
 	 * we shouldn't end up with no modes here.
 	 */
-	WARN(!count, "No connectors reported connected with modes\n");
+	if (count == 0)
+		printk(KERN_INFO "No connectors reported connected with modes\n");
 
 	drm_setup_crtcs(dev);
 
@@ -1159,6 +1164,9 @@
 int drm_helper_resume_force_mode(struct drm_device *dev)
 {
 	struct drm_crtc *crtc;
+	struct drm_encoder *encoder;
+	struct drm_encoder_helper_funcs *encoder_funcs;
+	struct drm_crtc_helper_funcs *crtc_funcs;
 	int ret;
 
 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
@@ -1171,6 +1179,25 @@
 
 		if (ret == false)
 			DRM_ERROR("failed to set mode on crtc %p\n", crtc);
+
+		/* Turn off outputs that were already powered off */
+		if (drm_helper_choose_crtc_dpms(crtc)) {
+			list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
+
+				if(encoder->crtc != crtc)
+					continue;
+
+				encoder_funcs = encoder->helper_private;
+				if (encoder_funcs->dpms)
+					(*encoder_funcs->dpms) (encoder,
+								drm_helper_choose_encoder_dpms(encoder));
+
+				crtc_funcs = crtc->helper_private;
+				if (crtc_funcs->dpms)
+					(*crtc_funcs->dpms) (crtc,
+							     drm_helper_choose_crtc_dpms(crtc));
+			}
+		}
 	}
 	/* disable the unused connectors while restoring the modesetting */
 	drm_helper_disable_unused_functions(dev);
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/drm_bufs.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/drm_bufs.c
@@ -326,7 +326,7 @@
 		 * As we're limiting the address to 2^32-1 (or less),
 		 * casting it down to 32 bits is no problem, but we
 		 * need to point to a 64bit variable first. */
-		dmah = drm_pci_alloc(dev, map->size, map->size, 0xffffffffUL);
+		dmah = drm_pci_alloc(dev, map->size, map->size);
 		if (!dmah) {
 			kfree(map);
 			return -ENOMEM;
@@ -885,7 +885,7 @@
 
 	while (entry->buf_count < count) {
 
-		dmah = drm_pci_alloc(dev, PAGE_SIZE << page_order, 0x1000, 0xfffffffful);
+		dmah = drm_pci_alloc(dev, PAGE_SIZE << page_order, 0x1000);
 
 		if (!dmah) {
 			/* Set count correctly so we free the proper amount. */
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/Makefile
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/Makefile
@@ -15,7 +15,7 @@
 
 drm-$(CONFIG_COMPAT) += drm_ioc32.o
 
-drm_kms_helper-y := drm_fb_helper.o drm_crtc_helper.o
+drm_kms_helper-y := drm_fb_helper.o drm_crtc_helper.o drm_dp_i2c_helper.o
 
 obj-$(CONFIG_DRM_KMS_HELPER) += drm_kms_helper.o
 
@@ -30,4 +30,7 @@
 obj-$(CONFIG_DRM_I915)  += i915/
 obj-$(CONFIG_DRM_SIS)   += sis/
 obj-$(CONFIG_DRM_SAVAGE)+= savage/
+obj-$(CONFIG_DRM_VMWGFX)+= vmwgfx/
 obj-$(CONFIG_DRM_VIA)	+=via/
+obj-$(CONFIG_DRM_NOUVEAU) +=nouveau/
+obj-y			+= i2c/
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/drm_dp_i2c_helper.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/drm_dp_i2c_helper.c
@@ -0,0 +1,209 @@
+/*
+ * Copyright © 2009 Keith Packard
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that copyright
+ * notice and this permission notice appear in supporting documentation, and
+ * that the name of the copyright holders not be used in advertising or
+ * publicity pertaining to distribution of the software without specific,
+ * written prior permission.  The copyright holders make no representations
+ * about the suitability of this software for any purpose.  It is provided "as
+ * is" without express or implied warranty.
+ *
+ * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
+ * OF THIS SOFTWARE.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/slab.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/sched.h>
+#include <linux/i2c.h>
+#include "drm_dp_helper.h"
+#include "drmP.h"
+
+/* Run a single AUX_CH I2C transaction, writing/reading data as necessary */
+static int
+i2c_algo_dp_aux_transaction(struct i2c_adapter *adapter, int mode,
+			    uint8_t write_byte, uint8_t *read_byte)
+{
+	struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
+	int ret;
+	
+	ret = (*algo_data->aux_ch)(adapter, mode,
+				   write_byte, read_byte);
+	return ret;
+}
+
+/*
+ * I2C over AUX CH
+ */
+
+/*
+ * Send the address. If the I2C link is running, this 'restarts'
+ * the connection with the new address, this is used for doing
+ * a write followed by a read (as needed for DDC)
+ */
+static int
+i2c_algo_dp_aux_address(struct i2c_adapter *adapter, u16 address, bool reading)
+{
+	struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
+	int mode = MODE_I2C_START;
+	int ret;
+
+	if (reading)
+		mode |= MODE_I2C_READ;
+	else
+		mode |= MODE_I2C_WRITE;
+	algo_data->address = address;
+	algo_data->running = true;
+	ret = i2c_algo_dp_aux_transaction(adapter, mode, 0, NULL);
+	return ret;
+}
+
+/*
+ * Stop the I2C transaction. This closes out the link, sending
+ * a bare address packet with the MOT bit turned off
+ */
+static void
+i2c_algo_dp_aux_stop(struct i2c_adapter *adapter, bool reading)
+{
+	struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
+	int mode = MODE_I2C_STOP;
+
+	if (reading)
+		mode |= MODE_I2C_READ;
+	else
+		mode |= MODE_I2C_WRITE;
+	if (algo_data->running) {
+		(void) i2c_algo_dp_aux_transaction(adapter, mode, 0, NULL);
+		algo_data->running = false;
+	}
+}
+
+/*
+ * Write a single byte to the current I2C address, the
+ * the I2C link must be running or this returns -EIO
+ */
+static int
+i2c_algo_dp_aux_put_byte(struct i2c_adapter *adapter, u8 byte)
+{
+	struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
+	int ret;
+
+	if (!algo_data->running)
+		return -EIO;
+
+	ret = i2c_algo_dp_aux_transaction(adapter, MODE_I2C_WRITE, byte, NULL);
+	return ret;
+}
+
+/*
+ * Read a single byte from the current I2C address, the
+ * I2C link must be running or this returns -EIO
+ */
+static int
+i2c_algo_dp_aux_get_byte(struct i2c_adapter *adapter, u8 *byte_ret)
+{
+	struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
+	int ret;
+
+	if (!algo_data->running)
+		return -EIO;
+
+	ret = i2c_algo_dp_aux_transaction(adapter, MODE_I2C_READ, 0, byte_ret);
+	return ret;
+}
+
+static int
+i2c_algo_dp_aux_xfer(struct i2c_adapter *adapter,
+		     struct i2c_msg *msgs,
+		     int num)
+{
+	int ret = 0;
+	bool reading = false;
+	int m;
+	int b;
+
+	for (m = 0; m < num; m++) {
+		u16 len = msgs[m].len;
+		u8 *buf = msgs[m].buf;
+		reading = (msgs[m].flags & I2C_M_RD) != 0;
+		ret = i2c_algo_dp_aux_address(adapter, msgs[m].addr, reading);
+		if (ret < 0)
+			break;
+		if (reading) {
+			for (b = 0; b < len; b++) {
+				ret = i2c_algo_dp_aux_get_byte(adapter, &buf[b]);
+				if (ret < 0)
+					break;
+			}
+		} else {
+			for (b = 0; b < len; b++) {
+				ret = i2c_algo_dp_aux_put_byte(adapter, buf[b]);
+				if (ret < 0)
+					break;
+			}
+		}
+		if (ret < 0)
+			break;
+	}
+	if (ret >= 0)
+		ret = num;
+	i2c_algo_dp_aux_stop(adapter, reading);
+	DRM_DEBUG_KMS("dp_aux_xfer return %d\n", ret);
+	return ret;
+}
+
+static u32
+i2c_algo_dp_aux_functionality(struct i2c_adapter *adapter)
+{
+	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL |
+	       I2C_FUNC_SMBUS_READ_BLOCK_DATA |
+	       I2C_FUNC_SMBUS_BLOCK_PROC_CALL |
+	       I2C_FUNC_10BIT_ADDR;
+}
+
+static const struct i2c_algorithm i2c_dp_aux_algo = {
+	.master_xfer	= i2c_algo_dp_aux_xfer,
+	.functionality	= i2c_algo_dp_aux_functionality,
+};
+
+static void
+i2c_dp_aux_reset_bus(struct i2c_adapter *adapter)
+{
+	(void) i2c_algo_dp_aux_address(adapter, 0, false);
+	(void) i2c_algo_dp_aux_stop(adapter, false);
+					   
+}
+
+static int
+i2c_dp_aux_prepare_bus(struct i2c_adapter *adapter)
+{
+	adapter->algo = &i2c_dp_aux_algo;
+	adapter->retries = 3;
+	i2c_dp_aux_reset_bus(adapter);
+	return 0;
+}
+
+int
+i2c_dp_aux_add_bus(struct i2c_adapter *adapter)
+{
+	int error;
+	
+	error = i2c_dp_aux_prepare_bus(adapter);
+	if (error)
+		return error;
+	error = i2c_add_adapter(adapter);
+	return error;
+}
+EXPORT_SYMBOL(i2c_dp_aux_add_bus);
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/drm_gem.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/drm_gem.c
@@ -142,19 +142,6 @@
 	if (IS_ERR(obj->filp))
 		goto free;
 
-	/* Basically we want to disable the OOM killer and handle ENOMEM
-	 * ourselves by sacrificing pages from cached buffers.
-	 * XXX shmem_file_[gs]et_gfp_mask()
-	 */
-	mapping_set_gfp_mask(obj->filp->f_path.dentry->d_inode->i_mapping,
-			     GFP_HIGHUSER |
-			     __GFP_COLD |
-			     __GFP_FS |
-			     __GFP_RECLAIMABLE |
-			     __GFP_NORETRY |
-			     __GFP_NOWARN |
-			     __GFP_NOMEMALLOC);
-
 	kref_init(&obj->refcount);
 	kref_init(&obj->handlecount);
 	obj->size = size;
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/drm_mm.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/drm_mm.c
@@ -83,9 +83,9 @@
 	struct drm_mm_node *child;
 
 	if (atomic)
-		child = kmalloc(sizeof(*child), GFP_ATOMIC);
+		child = kzalloc(sizeof(*child), GFP_ATOMIC);
 	else
-		child = kmalloc(sizeof(*child), GFP_KERNEL);
+		child = kzalloc(sizeof(*child), GFP_KERNEL);
 
 	if (unlikely(child == NULL)) {
 		spin_lock(&mm->unused_lock);
@@ -115,7 +115,7 @@
 	spin_lock(&mm->unused_lock);
 	while (mm->num_unused < MM_UNUSED_TARGET) {
 		spin_unlock(&mm->unused_lock);
-		node = kmalloc(sizeof(*node), GFP_KERNEL);
+		node = kzalloc(sizeof(*node), GFP_KERNEL);
 		spin_lock(&mm->unused_lock);
 
 		if (unlikely(node == NULL)) {
@@ -179,7 +179,6 @@
 
 	INIT_LIST_HEAD(&child->fl_entry);
 
-	child->free = 0;
 	child->size = size;
 	child->start = parent->start;
 	child->mm = parent->mm;
@@ -226,6 +225,44 @@
 }
 EXPORT_SYMBOL(drm_mm_get_block_generic);
 
+struct drm_mm_node *drm_mm_get_block_range_generic(struct drm_mm_node *node,
+						unsigned long size,
+						unsigned alignment,
+						unsigned long start,
+						unsigned long end,
+						int atomic)
+{
+	struct drm_mm_node *align_splitoff = NULL;
+	unsigned tmp = 0;
+	unsigned wasted = 0;
+
+	if (node->start < start)
+		wasted += start - node->start;
+	if (alignment)
+		tmp = ((node->start + wasted) % alignment);
+
+	if (tmp)
+		wasted += alignment - tmp;
+	if (wasted) {
+		align_splitoff = drm_mm_split_at_start(node, wasted, atomic);
+		if (unlikely(align_splitoff == NULL))
+			return NULL;
+	}
+
+	if (node->size == size) {
+		list_del_init(&node->fl_entry);
+		node->free = 0;
+	} else {
+		node = drm_mm_split_at_start(node, size, atomic);
+	}
+
+	if (align_splitoff)
+		drm_mm_put_block(align_splitoff);
+
+	return node;
+}
+EXPORT_SYMBOL(drm_mm_get_block_range_generic);
+
 /*
  * Put a block. Merge with the previous and / or next block if they are free.
  * Otherwise add to the free stack.
@@ -242,6 +279,9 @@
 
 	int merged = 0;
 
+	BUG_ON(cur->scanned_block || cur->scanned_prev_free
+				  || cur->scanned_next_free);
+
 	if (cur_head->prev != root_head) {
 		prev_node =
 		    list_entry(cur_head->prev, struct drm_mm_node, ml_entry);
@@ -290,6 +330,27 @@
 
 EXPORT_SYMBOL(drm_mm_put_block);
 
+static int check_free_mm_node(struct drm_mm_node *entry, unsigned long size,
+			      unsigned alignment)
+{
+	unsigned wasted = 0;
+
+	if (entry->size < size)
+		return 0;
+
+	if (alignment) {
+		register unsigned tmp = entry->start % alignment;
+		if (tmp)
+			wasted = alignment - tmp;
+	}
+
+	if (entry->size >= size + wasted) {
+		return 1;
+	}
+
+	return 0;
+}
+
 struct drm_mm_node *drm_mm_search_free(const struct drm_mm *mm,
 				       unsigned long size,
 				       unsigned alignment, int best_match)
@@ -299,31 +360,24 @@
 	struct drm_mm_node *entry;
 	struct drm_mm_node *best;
 	unsigned long best_size;
-	unsigned wasted;
+
+	BUG_ON(mm->scanned_blocks);
 
 	best = NULL;
 	best_size = ~0UL;
 
 	list_for_each(list, free_stack) {
 		entry = list_entry(list, struct drm_mm_node, fl_entry);
-		wasted = 0;
 
-		if (entry->size < size)
+		if (!check_free_mm_node(entry, size, alignment))
 			continue;
 
-		if (alignment) {
-			register unsigned tmp = entry->start % alignment;
-			if (tmp)
-				wasted += alignment - tmp;
-		}
+		if (!best_match)
+			return entry;
 
-		if (entry->size >= size + wasted) {
-			if (!best_match)
-				return entry;
-			if (size < best_size) {
-				best = entry;
-				best_size = entry->size;
-			}
+		if (entry->size < best_size) {
+			best = entry;
+			best_size = entry->size;
 		}
 	}
 
@@ -331,6 +385,198 @@
 }
 EXPORT_SYMBOL(drm_mm_search_free);
 
+struct drm_mm_node *drm_mm_search_free_in_range(const struct drm_mm *mm,
+						unsigned long size,
+						unsigned alignment,
+						unsigned long start,
+						unsigned long end,
+						int best_match)
+{
+	struct list_head *list;
+	const struct list_head *free_stack = &mm->fl_entry;
+	struct drm_mm_node *entry;
+	struct drm_mm_node *best;
+	unsigned long best_size;
+
+	BUG_ON(mm->scanned_blocks);
+
+	best = NULL;
+	best_size = ~0UL;
+
+	list_for_each(list, free_stack) {
+		entry = list_entry(list, struct drm_mm_node, fl_entry);
+
+		if (entry->start > end || (entry->start+entry->size) < start)
+			continue;
+
+		if (!check_free_mm_node(entry, size, alignment))
+			continue;
+
+		if (!best_match)
+			return entry;
+
+		if (entry->size < best_size) {
+			best = entry;
+			best_size = entry->size;
+		}
+	}
+
+	return best;
+}
+EXPORT_SYMBOL(drm_mm_search_free_in_range);
+
+/**
+ * Initializa lru scanning.
+ *
+ * This simply sets up the scanning routines with the parameters for the desired
+ * hole.
+ *
+ * Warning: As long as the scan list is non-empty, no other operations than
+ * adding/removing nodes to/from the scan list are allowed.
+ */
+void drm_mm_init_scan(struct drm_mm *mm, unsigned long size,
+		      unsigned alignment)
+{
+	mm->scan_alignment = alignment;
+	mm->scan_size = size;
+	mm->scanned_blocks = 0;
+	mm->scan_hit_start = 0;
+	mm->scan_hit_size = 0;
+}
+EXPORT_SYMBOL(drm_mm_init_scan);
+
+/**
+ * Add a node to the scan list that might be freed to make space for the desired
+ * hole.
+ *
+ * Returns non-zero, if a hole has been found, zero otherwise.
+ */
+int drm_mm_scan_add_block(struct drm_mm_node *node)
+{
+	struct drm_mm *mm = node->mm;
+	struct list_head *prev_free, *next_free;
+	struct drm_mm_node *prev_node, *next_node;
+
+	mm->scanned_blocks++;
+
+	prev_free = next_free = NULL;
+
+	BUG_ON(node->free);
+	node->scanned_block = 1;
+	node->free = 1;
+
+	if (node->ml_entry.prev != &mm->ml_entry) {
+		prev_node = list_entry(node->ml_entry.prev, struct drm_mm_node,
+				       ml_entry);
+
+		if (prev_node->free) {
+			list_del(&prev_node->ml_entry);
+
+			node->start = prev_node->start;
+			node->size += prev_node->size;
+
+			prev_node->scanned_prev_free = 1;
+
+			prev_free = &prev_node->fl_entry;
+		}
+	}
+
+	if (node->ml_entry.next != &mm->ml_entry) {
+		next_node = list_entry(node->ml_entry.next, struct drm_mm_node,
+				       ml_entry);
+
+		if (next_node->free) {
+			list_del(&next_node->ml_entry);
+
+			node->size += next_node->size;
+
+			next_node->scanned_next_free = 1;
+
+			next_free = &next_node->fl_entry;
+		}
+	}
+
+	/* The fl_entry list is not used for allocated objects, so these two
+	 * pointers can be abused (as long as no allocations in this memory
+	 * manager happens). */
+	node->fl_entry.prev = prev_free;
+	node->fl_entry.next = next_free;
+
+	if (check_free_mm_node(node, mm->scan_size, mm->scan_alignment)) {
+		mm->scan_hit_start = node->start;
+		mm->scan_hit_size = node->size;
+
+		return 1;
+	}
+
+	return 0;
+}
+EXPORT_SYMBOL(drm_mm_scan_add_block);
+
+/**
+ * Remove a node from the scan list.
+ *
+ * Nodes _must_ be removed in the exact same order from the scan list as they
+ * have been added, otherwise the internal state of the memory manager will be
+ * corrupted.
+ *
+ * When the scan list is empty, the selected memory nodes can be freed. An
+ * immediatly following drm_mm_search_free with best_match = 0 will then return
+ * the just freed block (because its at the top of the fl_entry list).
+ *
+ * Returns one if this block should be evicted, zero otherwise. Will always
+ * return zero when no hole has been found.
+ */
+int drm_mm_scan_remove_block(struct drm_mm_node *node)
+{
+	struct drm_mm *mm = node->mm;
+	struct drm_mm_node *prev_node, *next_node;
+
+	mm->scanned_blocks--;
+
+	BUG_ON(!node->scanned_block);
+	node->scanned_block = 0;
+	node->free = 0;
+
+	prev_node = list_entry(node->fl_entry.prev, struct drm_mm_node,
+			       fl_entry);
+	next_node = list_entry(node->fl_entry.next, struct drm_mm_node,
+			       fl_entry);
+
+	if (prev_node) {
+		BUG_ON(!prev_node->scanned_prev_free);
+		prev_node->scanned_prev_free = 0;
+
+		list_add_tail(&prev_node->ml_entry, &node->ml_entry);
+
+		node->start = prev_node->start + prev_node->size;
+		node->size -= prev_node->size;
+	}
+
+	if (next_node) {
+		BUG_ON(!next_node->scanned_next_free);
+		next_node->scanned_next_free = 0;
+
+		list_add(&next_node->ml_entry, &node->ml_entry);
+
+		node->size -= next_node->size;
+	}
+
+	INIT_LIST_HEAD(&node->fl_entry);
+
+	/* Only need to check for containement because start&size for the
+	 * complete resulting free block (not just the desired part) is
+	 * stored. */
+	if (node->start >= mm->scan_hit_start &&
+	    node->start + node->size
+	    		<= mm->scan_hit_start + mm->scan_hit_size) {
+		return 1;
+	}
+
+	return 0;
+}
+EXPORT_SYMBOL(drm_mm_scan_remove_block);
+
 int drm_mm_clean(struct drm_mm * mm)
 {
 	struct list_head *head = &mm->ml_entry;
@@ -345,6 +591,7 @@
 	INIT_LIST_HEAD(&mm->fl_entry);
 	INIT_LIST_HEAD(&mm->unused_nodes);
 	mm->num_unused = 0;
+	mm->scanned_blocks = 0;
 	spin_lock_init(&mm->unused_lock);
 
 	return drm_mm_create_tail_node(mm, start, size, 0);
@@ -381,6 +628,26 @@
 }
 EXPORT_SYMBOL(drm_mm_takedown);
 
+void drm_mm_debug_table(struct drm_mm *mm, const char *prefix)
+{
+	struct drm_mm_node *entry;
+	int total_used = 0, total_free = 0, total = 0;
+
+	list_for_each_entry(entry, &mm->ml_entry, ml_entry) {
+		printk(KERN_DEBUG "%s 0x%08lx-0x%08lx: %8ld: %s\n",
+			prefix, entry->start, entry->start + entry->size,
+			entry->size, entry->free ? "free" : "used");
+		total += entry->size;
+		if (entry->free)
+			total_free += entry->size;
+		else
+			total_used += entry->size;
+	}
+	printk(KERN_DEBUG "%s total: %d, used %d free %d\n", prefix, total,
+		total_used, total_free);
+}
+EXPORT_SYMBOL(drm_mm_debug_table);
+
 #if defined(CONFIG_DEBUG_FS)
 int drm_mm_dump_table(struct seq_file *m, struct drm_mm *mm)
 {
@@ -395,7 +662,7 @@
 		else
 			total_used += entry->size;
 	}
-	seq_printf(m, "total: %d, used %d free %d\n", total, total_free, total_used);
+	seq_printf(m, "total: %d, used %d free %d\n", total, total_used, total_free);
 	return 0;
 }
 EXPORT_SYMBOL(drm_mm_dump_table);
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/drm_ioc32.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/drm_ioc32.c
@@ -104,7 +104,7 @@
 			  &version->desc))
 		return -EFAULT;
 
-	err = drm_ioctl(file->f_path.dentry->d_inode, file,
+	err = drm_ioctl(file,
 			DRM_IOCTL_VERSION, (unsigned long)version);
 	if (err)
 		return err;
@@ -145,8 +145,7 @@
 			  &u->unique))
 		return -EFAULT;
 
-	err = drm_ioctl(file->f_path.dentry->d_inode, file,
-			DRM_IOCTL_GET_UNIQUE, (unsigned long)u);
+	err = drm_ioctl(file, DRM_IOCTL_GET_UNIQUE, (unsigned long)u);
 	if (err)
 		return err;
 
@@ -174,8 +173,7 @@
 			  &u->unique))
 		return -EFAULT;
 
-	return drm_ioctl(file->f_path.dentry->d_inode, file,
-			 DRM_IOCTL_SET_UNIQUE, (unsigned long)u);
+	return drm_ioctl(file, DRM_IOCTL_SET_UNIQUE, (unsigned long)u);
 }
 
 typedef struct drm_map32 {
@@ -205,8 +203,7 @@
 	if (__put_user(idx, &map->offset))
 		return -EFAULT;
 
-	err = drm_ioctl(file->f_path.dentry->d_inode, file,
-			DRM_IOCTL_GET_MAP, (unsigned long)map);
+	err = drm_ioctl(file, DRM_IOCTL_GET_MAP, (unsigned long)map);
 	if (err)
 		return err;
 
@@ -246,8 +243,7 @@
 	    || __put_user(m32.flags, &map->flags))
 		return -EFAULT;
 
-	err = drm_ioctl(file->f_path.dentry->d_inode, file,
-			DRM_IOCTL_ADD_MAP, (unsigned long)map);
+	err = drm_ioctl(file, DRM_IOCTL_ADD_MAP, (unsigned long)map);
 	if (err)
 		return err;
 
@@ -284,8 +280,7 @@
 	if (__put_user((void *)(unsigned long)handle, &map->handle))
 		return -EFAULT;
 
-	return drm_ioctl(file->f_path.dentry->d_inode, file,
-			 DRM_IOCTL_RM_MAP, (unsigned long)map);
+	return drm_ioctl(file, DRM_IOCTL_RM_MAP, (unsigned long)map);
 }
 
 typedef struct drm_client32 {
@@ -314,8 +309,7 @@
 	if (__put_user(idx, &client->idx))
 		return -EFAULT;
 
-	err = drm_ioctl(file->f_path.dentry->d_inode, file,
-			DRM_IOCTL_GET_CLIENT, (unsigned long)client);
+	err = drm_ioctl(file, DRM_IOCTL_GET_CLIENT, (unsigned long)client);
 	if (err)
 		return err;
 
@@ -351,8 +345,7 @@
 	if (!access_ok(VERIFY_WRITE, stats, sizeof(*stats)))
 		return -EFAULT;
 
-	err = drm_ioctl(file->f_path.dentry->d_inode, file,
-			DRM_IOCTL_GET_STATS, (unsigned long)stats);
+	err = drm_ioctl(file, DRM_IOCTL_GET_STATS, (unsigned long)stats);
 	if (err)
 		return err;
 
@@ -395,8 +388,7 @@
 	    || __put_user(agp_start, &buf->agp_start))
 		return -EFAULT;
 
-	err = drm_ioctl(file->f_path.dentry->d_inode, file,
-			DRM_IOCTL_ADD_BUFS, (unsigned long)buf);
+	err = drm_ioctl(file, DRM_IOCTL_ADD_BUFS, (unsigned long)buf);
 	if (err)
 		return err;
 
@@ -427,8 +419,7 @@
 	    || __put_user(b32.high_mark, &buf->high_mark))
 		return -EFAULT;
 
-	return drm_ioctl(file->f_path.dentry->d_inode, file,
-			 DRM_IOCTL_MARK_BUFS, (unsigned long)buf);
+	return drm_ioctl(file, DRM_IOCTL_MARK_BUFS, (unsigned long)buf);
 }
 
 typedef struct drm_buf_info32 {
@@ -469,8 +460,7 @@
 	    || __put_user(list, &request->list))
 		return -EFAULT;
 
-	err = drm_ioctl(file->f_path.dentry->d_inode, file,
-			DRM_IOCTL_INFO_BUFS, (unsigned long)request);
+	err = drm_ioctl(file, DRM_IOCTL_INFO_BUFS, (unsigned long)request);
 	if (err)
 		return err;
 
@@ -531,8 +521,7 @@
 	    || __put_user(list, &request->list))
 		return -EFAULT;
 
-	err = drm_ioctl(file->f_path.dentry->d_inode, file,
-			DRM_IOCTL_MAP_BUFS, (unsigned long)request);
+	err = drm_ioctl(file, DRM_IOCTL_MAP_BUFS, (unsigned long)request);
 	if (err)
 		return err;
 
@@ -578,8 +567,7 @@
 			  &request->list))
 		return -EFAULT;
 
-	return drm_ioctl(file->f_path.dentry->d_inode, file,
-			 DRM_IOCTL_FREE_BUFS, (unsigned long)request);
+	return drm_ioctl(file, DRM_IOCTL_FREE_BUFS, (unsigned long)request);
 }
 
 typedef struct drm_ctx_priv_map32 {
@@ -605,8 +593,7 @@
 			  &request->handle))
 		return -EFAULT;
 
-	return drm_ioctl(file->f_path.dentry->d_inode, file,
-			 DRM_IOCTL_SET_SAREA_CTX, (unsigned long)request);
+	return drm_ioctl(file, DRM_IOCTL_SET_SAREA_CTX, (unsigned long)request);
 }
 
 static int compat_drm_getsareactx(struct file *file, unsigned int cmd,
@@ -628,8 +615,7 @@
 	if (__put_user(ctx_id, &request->ctx_id))
 		return -EFAULT;
 
-	err = drm_ioctl(file->f_path.dentry->d_inode, file,
-			DRM_IOCTL_GET_SAREA_CTX, (unsigned long)request);
+	err = drm_ioctl(file, DRM_IOCTL_GET_SAREA_CTX, (unsigned long)request);
 	if (err)
 		return err;
 
@@ -664,8 +650,7 @@
 			  &res->contexts))
 		return -EFAULT;
 
-	err = drm_ioctl(file->f_path.dentry->d_inode, file,
-			DRM_IOCTL_RES_CTX, (unsigned long)res);
+	err = drm_ioctl(file, DRM_IOCTL_RES_CTX, (unsigned long)res);
 	if (err)
 		return err;
 
@@ -718,8 +703,7 @@
 			  &d->request_sizes))
 		return -EFAULT;
 
-	err = drm_ioctl(file->f_path.dentry->d_inode, file,
-			DRM_IOCTL_DMA, (unsigned long)d);
+	err = drm_ioctl(file, DRM_IOCTL_DMA, (unsigned long)d);
 	if (err)
 		return err;
 
@@ -751,8 +735,7 @@
 	if (put_user(m32.mode, &mode->mode))
 		return -EFAULT;
 
-	return drm_ioctl(file->f_path.dentry->d_inode, file,
-			 DRM_IOCTL_AGP_ENABLE, (unsigned long)mode);
+	return drm_ioctl(file, DRM_IOCTL_AGP_ENABLE, (unsigned long)mode);
 }
 
 typedef struct drm_agp_info32 {
@@ -781,8 +764,7 @@
 	if (!access_ok(VERIFY_WRITE, info, sizeof(*info)))
 		return -EFAULT;
 
-	err = drm_ioctl(file->f_path.dentry->d_inode, file,
-			DRM_IOCTL_AGP_INFO, (unsigned long)info);
+	err = drm_ioctl(file, DRM_IOCTL_AGP_INFO, (unsigned long)info);
 	if (err)
 		return err;
 
@@ -827,16 +809,14 @@
 	    || __put_user(req32.type, &request->type))
 		return -EFAULT;
 
-	err = drm_ioctl(file->f_path.dentry->d_inode, file,
-			DRM_IOCTL_AGP_ALLOC, (unsigned long)request);
+	err = drm_ioctl(file, DRM_IOCTL_AGP_ALLOC, (unsigned long)request);
 	if (err)
 		return err;
 
 	if (__get_user(req32.handle, &request->handle)
 	    || __get_user(req32.physical, &request->physical)
 	    || copy_to_user(argp, &req32, sizeof(req32))) {
-		drm_ioctl(file->f_path.dentry->d_inode, file,
-			  DRM_IOCTL_AGP_FREE, (unsigned long)request);
+		drm_ioctl(file, DRM_IOCTL_AGP_FREE, (unsigned long)request);
 		return -EFAULT;
 	}
 
@@ -856,8 +836,7 @@
 	    || __put_user(handle, &request->handle))
 		return -EFAULT;
 
-	return drm_ioctl(file->f_path.dentry->d_inode, file,
-			 DRM_IOCTL_AGP_FREE, (unsigned long)request);
+	return drm_ioctl(file, DRM_IOCTL_AGP_FREE, (unsigned long)request);
 }
 
 typedef struct drm_agp_binding32 {
@@ -881,8 +860,7 @@
 	    || __put_user(req32.offset, &request->offset))
 		return -EFAULT;
 
-	return drm_ioctl(file->f_path.dentry->d_inode, file,
-			 DRM_IOCTL_AGP_BIND, (unsigned long)request);
+	return drm_ioctl(file, DRM_IOCTL_AGP_BIND, (unsigned long)request);
 }
 
 static int compat_drm_agp_unbind(struct file *file, unsigned int cmd,
@@ -898,8 +876,7 @@
 	    || __put_user(handle, &request->handle))
 		return -EFAULT;
 
-	return drm_ioctl(file->f_path.dentry->d_inode, file,
-			 DRM_IOCTL_AGP_UNBIND, (unsigned long)request);
+	return drm_ioctl(file, DRM_IOCTL_AGP_UNBIND, (unsigned long)request);
 }
 #endif				/* __OS_HAS_AGP */
 
@@ -923,8 +900,7 @@
 	    || __put_user(x, &request->size))
 		return -EFAULT;
 
-	err = drm_ioctl(file->f_path.dentry->d_inode, file,
-			DRM_IOCTL_SG_ALLOC, (unsigned long)request);
+	err = drm_ioctl(file, DRM_IOCTL_SG_ALLOC, (unsigned long)request);
 	if (err)
 		return err;
 
@@ -950,8 +926,7 @@
 	    || __put_user(x << PAGE_SHIFT, &request->handle))
 		return -EFAULT;
 
-	return drm_ioctl(file->f_path.dentry->d_inode, file,
-			 DRM_IOCTL_SG_FREE, (unsigned long)request);
+	return drm_ioctl(file, DRM_IOCTL_SG_FREE, (unsigned long)request);
 }
 
 #if defined(CONFIG_X86) || defined(CONFIG_IA64)
@@ -981,8 +956,7 @@
 	    __put_user(update32.data, &request->data))
 		return -EFAULT;
 
-	err = drm_ioctl(file->f_path.dentry->d_inode, file,
-			DRM_IOCTL_UPDATE_DRAW, (unsigned long)request);
+	err = drm_ioctl(file, DRM_IOCTL_UPDATE_DRAW, (unsigned long)request);
 	return err;
 }
 #endif
@@ -1023,8 +997,7 @@
 	    || __put_user(req32.request.signal, &request->request.signal))
 		return -EFAULT;
 
-	err = drm_ioctl(file->f_path.dentry->d_inode, file,
-			DRM_IOCTL_WAIT_VBLANK, (unsigned long)request);
+	err = drm_ioctl(file, DRM_IOCTL_WAIT_VBLANK, (unsigned long)request);
 	if (err)
 		return err;
 
@@ -1094,16 +1067,14 @@
 	 * than always failing.
 	 */
 	if (nr >= ARRAY_SIZE(drm_compat_ioctls))
-		return drm_ioctl(filp->f_dentry->d_inode, filp, cmd, arg);
+		return drm_ioctl(filp, cmd, arg);
 
 	fn = drm_compat_ioctls[nr];
 
-	lock_kernel();		/* XXX for now */
 	if (fn != NULL)
 		ret = (*fn) (filp, cmd, arg);
 	else
-		ret = drm_ioctl(filp->f_path.dentry->d_inode, filp, cmd, arg);
-	unlock_kernel();
+		ret = drm_ioctl(filp, cmd, arg);
 
 	return ret;
 }
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/drm_fops.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/drm_fops.c
@@ -140,14 +140,16 @@
 		spin_unlock(&dev->count_lock);
 	}
 out:
-	mutex_lock(&dev->struct_mutex);
-	if (minor->type == DRM_MINOR_LEGACY) {
-		BUG_ON((dev->dev_mapping != NULL) &&
-			(dev->dev_mapping != inode->i_mapping));
-		if (dev->dev_mapping == NULL)
-			dev->dev_mapping = inode->i_mapping;
+	if (!retcode) {
+		mutex_lock(&dev->struct_mutex);
+		if (minor->type == DRM_MINOR_LEGACY) {
+			if (dev->dev_mapping == NULL)
+				dev->dev_mapping = inode->i_mapping;
+			else if (dev->dev_mapping != inode->i_mapping)
+				retcode = -ENODEV;
+		}
+		mutex_unlock(&dev->struct_mutex);
 	}
-	mutex_unlock(&dev->struct_mutex);
 
 	return retcode;
 }
@@ -257,6 +259,9 @@
 
 	INIT_LIST_HEAD(&priv->lhead);
 	INIT_LIST_HEAD(&priv->fbs);
+	INIT_LIST_HEAD(&priv->event_list);
+	init_waitqueue_head(&priv->event_wait);
+	priv->event_space = 4096; /* set aside 4k for event buffer */
 
 	if (dev->driver->driver_features & DRIVER_GEM)
 		drm_gem_open(dev, priv);
@@ -297,6 +302,18 @@
 				goto out_free;
 			}
 		}
+		mutex_lock(&dev->struct_mutex);
+		if (dev->driver->master_set) {
+			ret = dev->driver->master_set(dev, priv, true);
+			if (ret) {
+				/* drop both references if this fails */
+				drm_master_put(&priv->minor->master);
+				drm_master_put(&priv->master);
+				mutex_unlock(&dev->struct_mutex);
+				goto out_free;
+			}
+		}
+		mutex_unlock(&dev->struct_mutex);
 	} else {
 		/* get a reference to the master */
 		priv->master = drm_master_get(priv->minor->master);
@@ -413,6 +430,30 @@
 	}
 }
 
+static void drm_events_release(struct drm_file *file_priv)
+{
+	struct drm_device *dev = file_priv->minor->dev;
+	struct drm_pending_event *e, *et;
+	struct drm_pending_vblank_event *v, *vt;
+	unsigned long flags;
+
+	spin_lock_irqsave(&dev->event_lock, flags);
+
+	/* Remove pending flips */
+	list_for_each_entry_safe(v, vt, &dev->vblank_event_list, base.link)
+		if (v->base.file_priv == file_priv) {
+			list_del(&v->base.link);
+			drm_vblank_put(dev, v->pipe);
+			v->base.destroy(&v->base);
+		}
+
+	/* Remove unconsumed events */
+	list_for_each_entry_safe(e, et, &file_priv->event_list, link)
+		e->destroy(e);
+
+	spin_unlock_irqrestore(&dev->event_lock, flags);
+}
+
 /**
  * Release file.
  *
@@ -451,6 +492,8 @@
 	if (file_priv->minor->master)
 		drm_master_release(dev, filp);
 
+	drm_events_release(file_priv);
+
 	if (dev->driver->driver_features & DRIVER_GEM)
 		drm_gem_release(dev, file_priv);
 
@@ -504,6 +547,8 @@
 
 		if (file_priv->minor->master == file_priv->master) {
 			/* drop the reference held my the minor */
+			if (dev->driver->master_drop)
+				dev->driver->master_drop(dev, file_priv, true);
 			drm_master_put(&file_priv->minor->master);
 		}
 	}
@@ -544,9 +589,74 @@
 }
 EXPORT_SYMBOL(drm_release);
 
-/** No-op. */
+static bool
+drm_dequeue_event(struct drm_file *file_priv,
+		  size_t total, size_t max, struct drm_pending_event **out)
+{
+	struct drm_device *dev = file_priv->minor->dev;
+	struct drm_pending_event *e;
+	unsigned long flags;
+	bool ret = false;
+
+	spin_lock_irqsave(&dev->event_lock, flags);
+
+	*out = NULL;
+	if (list_empty(&file_priv->event_list))
+		goto out;
+	e = list_first_entry(&file_priv->event_list,
+			     struct drm_pending_event, link);
+	if (e->event->length + total > max)
+		goto out;
+
+	file_priv->event_space += e->event->length;
+	list_del(&e->link);
+	*out = e;
+	ret = true;
+
+out:
+	spin_unlock_irqrestore(&dev->event_lock, flags);
+	return ret;
+}
+
+ssize_t drm_read(struct file *filp, char __user *buffer,
+		 size_t count, loff_t *offset)
+{
+	struct drm_file *file_priv = filp->private_data;
+	struct drm_pending_event *e;
+	size_t total;
+	ssize_t ret;
+
+	ret = wait_event_interruptible(file_priv->event_wait,
+				       !list_empty(&file_priv->event_list));
+	if (ret < 0)
+		return ret;
+
+	total = 0;
+	while (drm_dequeue_event(file_priv, total, count, &e)) {
+		if (copy_to_user(buffer + total,
+				 e->event, e->event->length)) {
+			total = -EFAULT;
+			break;
+		}
+
+		total += e->event->length;
+		e->destroy(e);
+	}
+
+	return total;
+}
+EXPORT_SYMBOL(drm_read);
+
 unsigned int drm_poll(struct file *filp, struct poll_table_struct *wait)
 {
-	return 0;
+	struct drm_file *file_priv = filp->private_data;
+	unsigned int mask = 0;
+
+	poll_wait(filp, &file_priv->event_wait, wait);
+
+	if (!list_empty(&file_priv->event_list))
+		mask |= POLLIN | POLLRDNORM;
+
+	return mask;
 }
 EXPORT_SYMBOL(drm_poll);
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -121,7 +121,7 @@
 				     0,   pcibios_align_resource,
 				     dev_priv->bridge_dev);
 	if (ret) {
-		DRM_DEBUG("failed bus alloc: %d\n", ret);
+		DRM_DEBUG_DRIVER("failed bus alloc: %d\n", ret);
 		dev_priv->mch_res.start = 0;
 		goto out;
 	}
@@ -209,8 +209,8 @@
 	uint32_t swizzle_y = I915_BIT_6_SWIZZLE_UNKNOWN;
 	bool need_disable;
 
-	if (IS_IGDNG(dev)) {
-		/* On IGDNG whatever DRAM config, GPU always do
+	if (IS_IRONLAKE(dev) || IS_GEN6(dev)) {
+		/* On Ironlake whatever DRAM config, GPU always do
 		 * same swizzling setup.
 		 */
 		swizzle_x = I915_BIT_6_SWIZZLE_9_10;
@@ -304,35 +304,39 @@
 
 
 /**
- * Returns the size of the fence for a tiled object of the given size.
+ * Returns whether an object is currently fenceable.  If not, it may need
+ * to be unbound and have its pitch adjusted.
  */
-static int
-i915_get_fence_size(struct drm_device *dev, int size)
+bool
+i915_obj_fenceable(struct drm_device *dev, struct drm_gem_object *obj)
 {
-	int i;
-	int start;
+	struct drm_i915_gem_object *obj_priv = obj->driver_private;
 
 	if (IS_I965G(dev)) {
 		/* The 965 can have fences at any page boundary. */
-		return ALIGN(size, 4096);
+		if (obj->size & 4095)
+			return false;
+		return true;
+	} else if (IS_I9XX(dev)) {
+		if (obj_priv->gtt_offset & ~I915_FENCE_START_MASK)
+			return false;
 	} else {
-		/* Align the size to a power of two greater than the smallest
-		 * fence size.
-		 */
-		if (IS_I9XX(dev))
-			start = 1024 * 1024;
-		else
-			start = 512 * 1024;
+		if (obj_priv->gtt_offset & ~I830_FENCE_START_MASK)
+			return false;
+	}
 
-		for (i = start; i < size; i <<= 1)
-			;
+	/* Power of two sized... */
+	if (obj->size & (obj->size - 1))
+		return false;
 
-		return i;
-	}
+	/* Objects must be size aligned as well */
+	if (obj_priv->gtt_offset & (obj->size - 1))
+		return false;
+	return true;
 }
 
 /* Check pitch constriants for all chips & tiling formats */
-static bool
+bool
 i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode)
 {
 	int tile_width;
@@ -353,21 +357,17 @@
 		 * reg, so dont bother to check the size */
 		if (stride / 128 > I965_FENCE_MAX_PITCH_VAL)
 			return false;
-	} else if (IS_I9XX(dev)) {
-		uint32_t pitch_val = ffs(stride / tile_width) - 1;
-
-		/* XXX: For Y tiling, FENCE_MAX_PITCH_VAL is actually 6 (8KB)
-		 * instead of 4 (2KB) on 945s.
-		 */
-		if (pitch_val > I915_FENCE_MAX_PITCH_VAL ||
-		    size > (I830_FENCE_MAX_SIZE_VAL << 20))
+	} else if (IS_GEN3(dev) || IS_GEN2(dev)) {
+		if (stride > 8192)
 			return false;
-	} else {
-		uint32_t pitch_val = ffs(stride / tile_width) - 1;
 
-		if (pitch_val > I830_FENCE_MAX_PITCH_VAL ||
-		    size > (I830_FENCE_MAX_SIZE_VAL << 19))
-			return false;
+		if (IS_GEN3(dev)) {
+			if (size > I830_FENCE_MAX_SIZE_VAL << 20)
+				return false;
+		} else {
+			if (size > I830_FENCE_MAX_SIZE_VAL << 19)
+				return false;
+		}
 	}
 
 	/* 965+ just needs multiples of tile width */
@@ -384,12 +384,6 @@
 	if (stride & (stride - 1))
 		return false;
 
-	/* We don't 0handle the aperture area covered by the fence being bigger
-	 * than the object size.
-	 */
-	if (i915_get_fence_size(dev, size) != size)
-		return false;
-
 	return true;
 }
 
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i915/i915_irq.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i915/i915_irq.c
@@ -43,10 +43,13 @@
  * we leave them always unmasked in IMR and then control enabling them through
  * PIPESTAT alone.
  */
-#define I915_INTERRUPT_ENABLE_FIX (I915_ASLE_INTERRUPT |		 \
-				   I915_DISPLAY_PIPE_A_EVENT_INTERRUPT | \
-				   I915_DISPLAY_PIPE_B_EVENT_INTERRUPT | \
-				   I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT)
+#define I915_INTERRUPT_ENABLE_FIX			\
+	(I915_ASLE_INTERRUPT |				\
+	 I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |		\
+	 I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |		\
+	 I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT |	\
+	 I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT |	\
+	 I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT)
 
 /** Interrupts that we mask and unmask at runtime. */
 #define I915_INTERRUPT_ENABLE_VAR (I915_USER_INTERRUPT)
@@ -61,7 +64,7 @@
 					 DRM_I915_VBLANK_PIPE_B)
 
 void
-igdng_enable_graphics_irq(drm_i915_private_t *dev_priv, u32 mask)
+ironlake_enable_graphics_irq(drm_i915_private_t *dev_priv, u32 mask)
 {
 	if ((dev_priv->gt_irq_mask_reg & mask) != 0) {
 		dev_priv->gt_irq_mask_reg &= ~mask;
@@ -71,7 +74,7 @@
 }
 
 static inline void
-igdng_disable_graphics_irq(drm_i915_private_t *dev_priv, u32 mask)
+ironlake_disable_graphics_irq(drm_i915_private_t *dev_priv, u32 mask)
 {
 	if ((dev_priv->gt_irq_mask_reg & mask) != mask) {
 		dev_priv->gt_irq_mask_reg |= mask;
@@ -82,7 +85,7 @@
 
 /* For display hotplug interrupt */
 void
-igdng_enable_display_irq(drm_i915_private_t *dev_priv, u32 mask)
+ironlake_enable_display_irq(drm_i915_private_t *dev_priv, u32 mask)
 {
 	if ((dev_priv->irq_mask_reg & mask) != 0) {
 		dev_priv->irq_mask_reg &= ~mask;
@@ -92,7 +95,7 @@
 }
 
 static inline void
-igdng_disable_display_irq(drm_i915_private_t *dev_priv, u32 mask)
+ironlake_disable_display_irq(drm_i915_private_t *dev_priv, u32 mask)
 {
 	if ((dev_priv->irq_mask_reg & mask) != mask) {
 		dev_priv->irq_mask_reg |= mask;
@@ -157,6 +160,20 @@
 }
 
 /**
+ * intel_enable_asle - enable ASLE interrupt for OpRegion
+ */
+void intel_enable_asle (struct drm_device *dev)
+{
+	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
+
+	if (IS_IRONLAKE(dev))
+		ironlake_enable_display_irq(dev_priv, DE_GSE);
+	else
+		i915_enable_pipestat(dev_priv, 1,
+				     I915_LEGACY_BLC_EVENT_ENABLE);
+}
+
+/**
  * i915_pipe_enabled - check if a pipe is enabled
  * @dev: DRM device
  * @pipe: pipe to check
@@ -191,7 +208,8 @@
 	low_frame = pipe ? PIPEBFRAMEPIXEL : PIPEAFRAMEPIXEL;
 
 	if (!i915_pipe_enabled(dev, pipe)) {
-		DRM_DEBUG("trying to get vblank count for disabled pipe %d\n", pipe);
+		DRM_DEBUG_DRIVER("trying to get vblank count for disabled "
+				"pipe %d\n", pipe);
 		return 0;
 	}
 
@@ -220,7 +238,8 @@
 	int reg = pipe ? PIPEB_FRMCOUNT_GM45 : PIPEA_FRMCOUNT_GM45;
 
 	if (!i915_pipe_enabled(dev, pipe)) {
-		DRM_DEBUG("trying to get vblank count for disabled pipe %d\n", pipe);
+		DRM_DEBUG_DRIVER("trying to get vblank count for disabled "
+					"pipe %d\n", pipe);
 		return 0;
 	}
 
@@ -250,12 +269,11 @@
 	drm_sysfs_hotplug_event(dev);
 }
 
-irqreturn_t igdng_irq_handler(struct drm_device *dev)
+irqreturn_t ironlake_irq_handler(struct drm_device *dev)
 {
 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 	int ret = IRQ_NONE;
-	u32 de_iir, gt_iir, de_ier;
-	u32 new_de_iir, new_gt_iir;
+	u32 de_iir, gt_iir, de_ier, pch_iir;
 	struct drm_i915_master_private *master_priv;
 
 	/* disable master interrupt before clearing iir  */
@@ -265,36 +283,60 @@
 
 	de_iir = I915_READ(DEIIR);
 	gt_iir = I915_READ(GTIIR);
+	pch_iir = I915_READ(SDEIIR);
 
-	for (;;) {
-		if (de_iir == 0 && gt_iir == 0)
-			break;
+	if (de_iir == 0 && gt_iir == 0 && pch_iir == 0)
+		goto done;
 
-		ret = IRQ_HANDLED;
+	ret = IRQ_HANDLED;
 
-		I915_WRITE(DEIIR, de_iir);
-		new_de_iir = I915_READ(DEIIR);
-		I915_WRITE(GTIIR, gt_iir);
-		new_gt_iir = I915_READ(GTIIR);
+	if (dev->primary->master) {
+		master_priv = dev->primary->master->driver_priv;
+		if (master_priv->sarea_priv)
+			master_priv->sarea_priv->last_dispatch =
+				READ_BREADCRUMB(dev_priv);
+	}
 
-		if (dev->primary->master) {
-			master_priv = dev->primary->master->driver_priv;
-			if (master_priv->sarea_priv)
-				master_priv->sarea_priv->last_dispatch =
-					READ_BREADCRUMB(dev_priv);
-		}
+	if (gt_iir & GT_PIPE_NOTIFY) {
+		u32 seqno = i915_get_gem_seqno(dev);
+		dev_priv->mm.irq_gem_seqno = seqno;
+		trace_i915_gem_request_complete(dev, seqno);
+		DRM_WAKEUP(&dev_priv->irq_queue);
+		dev_priv->hangcheck_count = 0;
+		mod_timer(&dev_priv->hangcheck_timer, jiffies + DRM_I915_HANGCHECK_PERIOD);
+	}
 
-		if (gt_iir & GT_USER_INTERRUPT) {
-			u32 seqno = i915_get_gem_seqno(dev);
-			dev_priv->mm.irq_gem_seqno = seqno;
-			trace_i915_gem_request_complete(dev, seqno);
-			DRM_WAKEUP(&dev_priv->irq_queue);
-		}
+	if (de_iir & DE_GSE)
+		ironlake_opregion_gse_intr(dev);
+
+	if (de_iir & DE_PLANEA_FLIP_DONE) {
+		intel_prepare_page_flip(dev, 0);
+		intel_finish_page_flip(dev, 0);
+	}
+
+	if (de_iir & DE_PLANEB_FLIP_DONE) {
+		intel_prepare_page_flip(dev, 1);
+		intel_finish_page_flip(dev, 1);
+	}
+
+	if (de_iir & DE_PIPEA_VBLANK)
+		drm_handle_vblank(dev, 0);
+
+	if (de_iir & DE_PIPEB_VBLANK)
+		drm_handle_vblank(dev, 1);
 
-		de_iir = new_de_iir;
-		gt_iir = new_gt_iir;
+	/* check event from PCH */
+	if ((de_iir & DE_PCH_EVENT) &&
+	    (pch_iir & SDE_HOTPLUG_MASK)) {
+		queue_work(dev_priv->wq, &dev_priv->hotplug_work);
 	}
 
+	/* should clear PCH hotplug event before clear CPU irq */
+	I915_WRITE(SDEIIR, pch_iir);
+	I915_WRITE(GTIIR, gt_iir);
+	I915_WRITE(DEIIR, de_iir);
+
+done:
 	I915_WRITE(DEIER, de_ier);
 	(void)I915_READ(DEIER);
 
@@ -317,19 +359,19 @@
 	char *reset_event[] = { "RESET=1", NULL };
 	char *reset_done_event[] = { "ERROR=0", NULL };
 
-	DRM_DEBUG("generating error event\n");
+	DRM_DEBUG_DRIVER("generating error event\n");
 	kobject_uevent_env(&dev->primary->kdev.kobj, KOBJ_CHANGE, error_event);
 
 	if (atomic_read(&dev_priv->mm.wedged)) {
 		if (IS_I965G(dev)) {
-			DRM_DEBUG("resetting chip\n");
+			DRM_DEBUG_DRIVER("resetting chip\n");
 			kobject_uevent_env(&dev->primary->kdev.kobj, KOBJ_CHANGE, reset_event);
 			if (!i965_reset(dev, GDRST_RENDER)) {
 				atomic_set(&dev_priv->mm.wedged, 0);
 				kobject_uevent_env(&dev->primary->kdev.kobj, KOBJ_CHANGE, reset_done_event);
 			}
 		} else {
-			printk("reboot required\n");
+			DRM_DEBUG_DRIVER("reboot required\n");
 		}
 	}
 }
@@ -355,7 +397,7 @@
 
 	error = kmalloc(sizeof(*error), GFP_ATOMIC);
 	if (!error) {
-		DRM_DEBUG("out ot memory, not capturing error state\n");
+		DRM_DEBUG_DRIVER("out ot memory, not capturing error state\n");
 		goto out;
 	}
 
@@ -512,7 +554,6 @@
 		/*
 		 * Wakeup waiting processes so they don't hang
 		 */
-		printk("i915: Waking up sleeping processes\n");
 		DRM_WAKEUP(&dev_priv->irq_queue);
 	}
 
@@ -535,8 +576,8 @@
 
 	atomic_inc(&dev_priv->irq_received);
 
-	if (IS_IGDNG(dev))
-		return igdng_irq_handler(dev);
+	if (HAS_PCH_SPLIT(dev))
+		return ironlake_irq_handler(dev);
 
 	iir = I915_READ(IIR);
 
@@ -568,14 +609,14 @@
 		 */
 		if (pipea_stats & 0x8000ffff) {
 			if (pipea_stats &  PIPE_FIFO_UNDERRUN_STATUS)
-				DRM_DEBUG("pipe a underrun\n");
+				DRM_DEBUG_DRIVER("pipe a underrun\n");
 			I915_WRITE(PIPEASTAT, pipea_stats);
 			irq_received = 1;
 		}
 
 		if (pipeb_stats & 0x8000ffff) {
 			if (pipeb_stats &  PIPE_FIFO_UNDERRUN_STATUS)
-				DRM_DEBUG("pipe b underrun\n");
+				DRM_DEBUG_DRIVER("pipe b underrun\n");
 			I915_WRITE(PIPEBSTAT, pipeb_stats);
 			irq_received = 1;
 		}
@@ -591,7 +632,7 @@
 		    (iir & I915_DISPLAY_PORT_INTERRUPT)) {
 			u32 hotplug_status = I915_READ(PORT_HOTPLUG_STAT);
 
-			DRM_DEBUG("hotplug event received, stat 0x%08x\n",
+			DRM_DEBUG_DRIVER("hotplug event received, stat 0x%08x\n",
 				  hotplug_status);
 			if (hotplug_status & dev_priv->hotplug_supported_mask)
 				queue_work(dev_priv->wq,
@@ -599,27 +640,6 @@
 
 			I915_WRITE(PORT_HOTPLUG_STAT, hotplug_status);
 			I915_READ(PORT_HOTPLUG_STAT);
-
-			/* EOS interrupts occurs */
-			if (IS_IGD(dev) &&
-				(hotplug_status & CRT_EOS_INT_STATUS)) {
-				u32 temp;
-
-				DRM_DEBUG("EOS interrupt occurs\n");
-				/* status is already cleared */
-				temp = I915_READ(ADPA);
-				temp &= ~ADPA_DAC_ENABLE;
-				I915_WRITE(ADPA, temp);
-
-				temp = I915_READ(PORT_HOTPLUG_EN);
-				temp &= ~CRT_EOS_INT_EN;
-				I915_WRITE(PORT_HOTPLUG_EN, temp);
-
-				temp = I915_READ(PORT_HOTPLUG_STAT);
-				if (temp & CRT_EOS_INT_STATUS)
-					I915_WRITE(PORT_HOTPLUG_STAT,
-						CRT_EOS_INT_STATUS);
-			}
 		}
 
 		I915_WRITE(IIR, iir);
@@ -641,14 +661,30 @@
 			mod_timer(&dev_priv->hangcheck_timer, jiffies + DRM_I915_HANGCHECK_PERIOD);
 		}
 
+		if (iir & I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT) {
+			intel_prepare_page_flip(dev, 0);
+			if (dev_priv->flip_pending_is_done)
+				intel_finish_page_flip_plane(dev, 0);
+		}
+
+		if (iir & I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT) {
+			if (dev_priv->flip_pending_is_done)
+				intel_finish_page_flip_plane(dev, 1);
+			intel_prepare_page_flip(dev, 1);
+		}
+
 		if (pipea_stats & vblank_status) {
 			vblank++;
 			drm_handle_vblank(dev, 0);
+			if (!dev_priv->flip_pending_is_done)
+				intel_finish_page_flip(dev, 0);
 		}
 
 		if (pipeb_stats & vblank_status) {
 			vblank++;
 			drm_handle_vblank(dev, 1);
+			if (!dev_priv->flip_pending_is_done)
+				intel_finish_page_flip(dev, 1);
 		}
 
 		if ((pipeb_stats & I915_LEGACY_BLC_EVENT_STATUS) ||
@@ -684,7 +720,7 @@
 
 	i915_kernel_lost_context(dev);
 
-	DRM_DEBUG("\n");
+	DRM_DEBUG_DRIVER("\n");
 
 	dev_priv->counter++;
 	if (dev_priv->counter > 0x7FFFFFFFUL)
@@ -709,8 +745,8 @@
 
 	spin_lock_irqsave(&dev_priv->user_irq_lock, irqflags);
 	if (dev->irq_enabled && (++dev_priv->user_irq_refcount == 1)) {
-		if (IS_IGDNG(dev))
-			igdng_enable_graphics_irq(dev_priv, GT_USER_INTERRUPT);
+		if (HAS_PCH_SPLIT(dev))
+			ironlake_enable_graphics_irq(dev_priv, GT_PIPE_NOTIFY);
 		else
 			i915_enable_irq(dev_priv, I915_USER_INTERRUPT);
 	}
@@ -725,8 +761,8 @@
 	spin_lock_irqsave(&dev_priv->user_irq_lock, irqflags);
 	BUG_ON(dev->irq_enabled && dev_priv->user_irq_refcount <= 0);
 	if (dev->irq_enabled && (--dev_priv->user_irq_refcount == 0)) {
-		if (IS_IGDNG(dev))
-			igdng_disable_graphics_irq(dev_priv, GT_USER_INTERRUPT);
+		if (HAS_PCH_SPLIT(dev))
+			ironlake_disable_graphics_irq(dev_priv, GT_PIPE_NOTIFY);
 		else
 			i915_disable_irq(dev_priv, I915_USER_INTERRUPT);
 	}
@@ -749,7 +785,7 @@
 	struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
 	int ret = 0;
 
-	DRM_DEBUG("irq_nr=%d breadcrumb=%d\n", irq_nr,
+	DRM_DEBUG_DRIVER("irq_nr=%d breadcrumb=%d\n", irq_nr,
 		  READ_BREADCRUMB(dev_priv));
 
 	if (READ_BREADCRUMB(dev_priv) >= irq_nr) {
@@ -832,11 +868,11 @@
 	if (!(pipeconf & PIPEACONF_ENABLE))
 		return -EINVAL;
 
-	if (IS_IGDNG(dev))
-		return 0;
-
 	spin_lock_irqsave(&dev_priv->user_irq_lock, irqflags);
-	if (IS_I965G(dev))
+	if (HAS_PCH_SPLIT(dev))
+		ironlake_enable_display_irq(dev_priv, (pipe == 0) ? 
+					    DE_PIPEA_VBLANK: DE_PIPEB_VBLANK);
+	else if (IS_I965G(dev))
 		i915_enable_pipestat(dev_priv, pipe,
 				     PIPE_START_VBLANK_INTERRUPT_ENABLE);
 	else
@@ -854,13 +890,14 @@
 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 	unsigned long irqflags;
 
-	if (IS_IGDNG(dev))
-		return;
-
 	spin_lock_irqsave(&dev_priv->user_irq_lock, irqflags);
-	i915_disable_pipestat(dev_priv, pipe,
-			      PIPE_VBLANK_INTERRUPT_ENABLE |
-			      PIPE_START_VBLANK_INTERRUPT_ENABLE);
+	if (HAS_PCH_SPLIT(dev))
+		ironlake_disable_display_irq(dev_priv, (pipe == 0) ? 
+					     DE_PIPEA_VBLANK: DE_PIPEB_VBLANK);
+	else
+		i915_disable_pipestat(dev_priv, pipe,
+				      PIPE_VBLANK_INTERRUPT_ENABLE |
+				      PIPE_START_VBLANK_INTERRUPT_ENABLE);
 	spin_unlock_irqrestore(&dev_priv->user_irq_lock, irqflags);
 }
 
@@ -868,7 +905,7 @@
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 
-	if (!IS_IGDNG(dev))
+	if (!HAS_PCH_SPLIT(dev))
 		opregion_enable_asle(dev);
 	dev_priv->irq_enabled = 1;
 }
@@ -976,7 +1013,7 @@
 
 /* drm_dma.h hooks
 */
-static void igdng_irq_preinstall(struct drm_device *dev)
+static void ironlake_irq_preinstall(struct drm_device *dev)
 {
 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 
@@ -992,17 +1029,25 @@
 	I915_WRITE(GTIMR, 0xffffffff);
 	I915_WRITE(GTIER, 0x0);
 	(void) I915_READ(GTIER);
+
+	/* south display irq */
+	I915_WRITE(SDEIMR, 0xffffffff);
+	I915_WRITE(SDEIER, 0x0);
+	(void) I915_READ(SDEIER);
 }
 
-static int igdng_irq_postinstall(struct drm_device *dev)
+static int ironlake_irq_postinstall(struct drm_device *dev)
 {
 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 	/* enable kind of interrupts always enabled */
-	u32 display_mask = DE_MASTER_IRQ_CONTROL /*| DE_PCH_EVENT */;
-	u32 render_mask = GT_USER_INTERRUPT;
+	u32 display_mask = DE_MASTER_IRQ_CONTROL | DE_GSE | DE_PCH_EVENT |
+			   DE_PLANEA_FLIP_DONE | DE_PLANEB_FLIP_DONE;
+	u32 render_mask = GT_PIPE_NOTIFY;
+	u32 hotplug_mask = SDE_CRT_HOTPLUG | SDE_PORTB_HOTPLUG |
+			   SDE_PORTC_HOTPLUG | SDE_PORTD_HOTPLUG;
 
 	dev_priv->irq_mask_reg = ~display_mask;
-	dev_priv->de_irq_enable_reg = display_mask;
+	dev_priv->de_irq_enable_reg = display_mask | DE_PIPEA_VBLANK | DE_PIPEB_VBLANK;
 
 	/* should always can generate irq */
 	I915_WRITE(DEIIR, I915_READ(DEIIR));
@@ -1019,6 +1064,14 @@
 	I915_WRITE(GTIER, dev_priv->gt_irq_enable_reg);
 	(void) I915_READ(GTIER);
 
+	dev_priv->pch_irq_mask_reg = ~hotplug_mask;
+	dev_priv->pch_irq_enable_reg = hotplug_mask;
+
+	I915_WRITE(SDEIIR, I915_READ(SDEIIR));
+	I915_WRITE(SDEIMR, dev_priv->pch_irq_mask_reg);
+	I915_WRITE(SDEIER, dev_priv->pch_irq_enable_reg);
+	(void) I915_READ(SDEIER);
+
 	return 0;
 }
 
@@ -1031,8 +1084,8 @@
 	INIT_WORK(&dev_priv->hotplug_work, i915_hotplug_work_func);
 	INIT_WORK(&dev_priv->error_work, i915_error_work_func);
 
-	if (IS_IGDNG(dev)) {
-		igdng_irq_preinstall(dev);
+	if (HAS_PCH_SPLIT(dev)) {
+		ironlake_irq_preinstall(dev);
 		return;
 	}
 
@@ -1049,6 +1102,10 @@
 	(void) I915_READ(IER);
 }
 
+/*
+ * Must be called after intel_modeset_init or hotplug interrupts won't be
+ * enabled correctly.
+ */
 int i915_driver_irq_postinstall(struct drm_device *dev)
 {
 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
@@ -1059,8 +1116,8 @@
 
 	dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B;
 
-	if (IS_IGDNG(dev))
-		return igdng_irq_postinstall(dev);
+	if (HAS_PCH_SPLIT(dev))
+		return ironlake_irq_postinstall(dev);
 
 	/* Unmask the interrupts that we always want on. */
 	dev_priv->irq_mask_reg = ~I915_INTERRUPT_ENABLE_FIX;
@@ -1071,19 +1128,23 @@
 	if (I915_HAS_HOTPLUG(dev)) {
 		u32 hotplug_en = I915_READ(PORT_HOTPLUG_EN);
 
-		/* Leave other bits alone */
-		hotplug_en |= HOTPLUG_EN_MASK;
+		/* Note HDMI and DP share bits */
+		if (dev_priv->hotplug_supported_mask & HDMIB_HOTPLUG_INT_STATUS)
+			hotplug_en |= HDMIB_HOTPLUG_INT_EN;
+		if (dev_priv->hotplug_supported_mask & HDMIC_HOTPLUG_INT_STATUS)
+			hotplug_en |= HDMIC_HOTPLUG_INT_EN;
+		if (dev_priv->hotplug_supported_mask & HDMID_HOTPLUG_INT_STATUS)
+			hotplug_en |= HDMID_HOTPLUG_INT_EN;
+		if (dev_priv->hotplug_supported_mask & SDVOC_HOTPLUG_INT_STATUS)
+			hotplug_en |= SDVOC_HOTPLUG_INT_EN;
+		if (dev_priv->hotplug_supported_mask & SDVOB_HOTPLUG_INT_STATUS)
+			hotplug_en |= SDVOB_HOTPLUG_INT_EN;
+		if (dev_priv->hotplug_supported_mask & CRT_HOTPLUG_INT_STATUS)
+			hotplug_en |= CRT_HOTPLUG_INT_EN;
+		/* Ignore TV since it's buggy */
+
 		I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
 
-		dev_priv->hotplug_supported_mask = CRT_HOTPLUG_INT_STATUS |
-			TV_HOTPLUG_INT_STATUS | SDVOC_HOTPLUG_INT_STATUS |
-			SDVOB_HOTPLUG_INT_STATUS;
-		if (IS_G4X(dev)) {
-			dev_priv->hotplug_supported_mask |=
-				HDMIB_HOTPLUG_INT_STATUS |
-				HDMIC_HOTPLUG_INT_STATUS |
-				HDMID_HOTPLUG_INT_STATUS;
-		}
 		/* Enable in IER... */
 		enable_mask |= I915_DISPLAY_PORT_INTERRUPT;
 		/* and unmask in IMR */
@@ -1120,7 +1181,7 @@
 	return 0;
 }
 
-static void igdng_irq_uninstall(struct drm_device *dev)
+static void ironlake_irq_uninstall(struct drm_device *dev)
 {
 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
 	I915_WRITE(HWSTAM, 0xffffffff);
@@ -1143,8 +1204,8 @@
 
 	dev_priv->vblank_pipe = 0;
 
-	if (IS_IGDNG(dev)) {
-		igdng_irq_uninstall(dev);
+	if (HAS_PCH_SPLIT(dev)) {
+		ironlake_irq_uninstall(dev);
 		return;
 	}
 
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i915/i915_gem_evict.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i915/i915_gem_evict.c
@@ -0,0 +1,253 @@
+/*
+ * Copyright © 2008-2010 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Eric Anholt <eric@anholt.net>
+ *    Chris Wilson <chris@chris-wilson.co.uuk>
+ *
+ */
+
+#include "drmP.h"
+#include "drm.h"
+#include "i915_drv.h"
+#include "i915_drm.h"
+
+static struct drm_i915_gem_object *
+i915_gem_next_active_object(struct drm_device *dev,
+			    struct list_head **iter)
+{
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	struct drm_i915_gem_object *obj = NULL;
+
+	if (*iter != &dev_priv->mm.active_list)
+		obj = list_entry(*iter,
+				 struct drm_i915_gem_object,
+				 list);
+
+	*iter = (*iter)->next;
+	return obj;
+}
+
+static bool
+mark_free(struct drm_i915_gem_object *obj_priv,
+	   struct list_head *unwind)
+{
+	list_add(&obj_priv->evict_list, unwind);
+	return drm_mm_scan_add_block(obj_priv->gtt_space);
+}
+
+#define i915_for_each_active_object(OBJ, I) \
+	*(I) = dev_priv->mm.active_list.next; \
+	while (((OBJ) = i915_gem_next_active_object(dev, (I))) != NULL)
+
+int
+i915_gem_evict_something(struct drm_device *dev, int min_size, unsigned alignment)
+{
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	struct list_head eviction_list, unwind_list;
+	struct drm_i915_gem_object *obj_priv, *tmp_obj_priv;
+	struct list_head *iter;
+	int ret = 0;
+
+	i915_gem_retire_requests(dev);
+
+	/* Re-check for free space after retiring requests */
+	if (drm_mm_search_free(&dev_priv->mm.gtt_space,
+			       min_size, alignment, 0))
+		return 0;
+
+	/*
+	 * The goal is to evict objects and amalgamate space in LRU order.
+	 * The oldest idle objects reside on the inactive list, which is in
+	 * retirement order. The next objects to retire are those on the
+	 * active list that do not have an outstanding flush. Once the
+	 * hardware reports completion (the seqno is updated after the
+	 * batchbuffer has been finished) the clean buffer objects would
+	 * be retired to the inactive list. Any dirty objects would be added
+	 * to the tail of the flushing list. So after processing the clean
+	 * active objects we need to emit a MI_FLUSH to retire the flushing
+	 * list, hence the retirement order of the flushing list is in
+	 * advance of the dirty objects on the active list.
+	 *
+	 * The retirement sequence is thus:
+	 *   1. Inactive objects (already retired)
+	 *   2. Clean active objects
+	 *   3. Flushing list
+	 *   4. Dirty active objects.
+	 *
+	 * On each list, the oldest objects lie at the HEAD with the freshest
+	 * object on the TAIL.
+	 */
+
+	INIT_LIST_HEAD(&unwind_list);
+	drm_mm_init_scan(&dev_priv->mm.gtt_space, min_size, alignment);
+
+	/* First see if there is a large enough contiguous idle region... */
+	list_for_each_entry(obj_priv, &dev_priv->mm.inactive_list, list) {
+		if (mark_free(obj_priv, &unwind_list))
+			goto found;
+	}
+
+	/* Now merge in the soon-to-be-expired objects... */
+	i915_for_each_active_object(obj_priv, &iter) {
+		/* Does the object require an outstanding flush? */
+		if (obj_priv->obj->write_domain || obj_priv->pin_count)
+			continue;
+
+		if (mark_free(obj_priv, &unwind_list))
+			goto found;
+	}
+
+	/* Finally add anything with a pending flush (in order of retirement) */
+	list_for_each_entry(obj_priv, &dev_priv->mm.flushing_list, list) {
+		if (obj_priv->pin_count)
+			continue;
+
+		if (mark_free(obj_priv, &unwind_list))
+			goto found;
+	}
+	i915_for_each_active_object(obj_priv, &iter) {
+		if (! obj_priv->obj->write_domain || obj_priv->pin_count)
+			continue;
+
+		if (mark_free(obj_priv, &unwind_list))
+			goto found;
+	}
+
+	/* Nothing found, clean up and bail out! */
+	while (!list_empty(&unwind_list)) {
+		obj_priv = list_first_entry(&unwind_list,
+					    struct drm_i915_gem_object,
+					    evict_list);
+
+		ret = drm_mm_scan_remove_block(obj_priv->gtt_space);
+		BUG_ON(ret);
+
+		list_del_init(&obj_priv->evict_list);
+	}
+
+	/* We expect the caller to unpin, evict all and try again, or give up.
+	 * So calling i915_gem_evict_everything() is unnecessary.
+	 */
+	return -ENOSPC;
+
+found:
+	/* drm_mm doesn't allow any other other operations while
+	 * scanning, therefore store to be evicted objects on a
+	 * temporary list. */
+	INIT_LIST_HEAD(&eviction_list);
+	list_for_each_entry_safe(obj_priv, tmp_obj_priv,
+				 &unwind_list, evict_list) {
+		if (drm_mm_scan_remove_block(obj_priv->gtt_space)) {
+			list_move(&obj_priv->evict_list, &eviction_list);
+			continue;
+		}
+		list_del_init(&obj_priv->evict_list);
+	}
+
+	/* Unbinding will emit any required flushes */
+	while (!list_empty(&eviction_list)) {
+		obj_priv = list_first_entry(&eviction_list,
+					    struct drm_i915_gem_object,
+					    evict_list);
+		if (ret == 0)
+			ret = i915_gem_object_unbind(obj_priv->obj);
+
+		list_del_init(&obj_priv->evict_list);
+	}
+
+	/* The just created free hole should be on the top of the free stack
+	 * maintained by drm_mm, so this BUG_ON actually executes in O(1).
+	 * Furthermore all accessed data has just recently been used, so it
+	 * should be really fast, too. */
+	BUG_ON(!drm_mm_search_free(&dev_priv->mm.gtt_space, min_size,
+				   alignment, 0));
+
+	return 0;
+}
+
+int
+i915_gem_evict_everything(struct drm_device *dev)
+{
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	int ret;
+	uint32_t seqno;
+	bool lists_empty;
+
+	spin_lock(&dev_priv->mm.active_list_lock);
+	lists_empty = (list_empty(&dev_priv->mm.inactive_list) &&
+		       list_empty(&dev_priv->mm.flushing_list) &&
+		       list_empty(&dev_priv->mm.active_list));
+	spin_unlock(&dev_priv->mm.active_list_lock);
+
+	if (lists_empty)
+		return -ENOSPC;
+
+	/* Flush everything (on to the inactive lists) and evict */
+	i915_gem_flush(dev, I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
+	seqno = i915_add_request(dev, NULL, I915_GEM_GPU_DOMAINS);
+	if (seqno == 0)
+		return -ENOMEM;
+
+	ret = i915_do_wait_request(dev, seqno, true);
+	if (ret)
+		return ret;
+
+	BUG_ON(!list_empty(&dev_priv->mm.flushing_list));
+
+	ret = i915_gem_evict_inactive(dev);
+	if (ret)
+		return ret;
+
+	spin_lock(&dev_priv->mm.active_list_lock);
+	lists_empty = (list_empty(&dev_priv->mm.inactive_list) &&
+		       list_empty(&dev_priv->mm.flushing_list) &&
+		       list_empty(&dev_priv->mm.active_list));
+	spin_unlock(&dev_priv->mm.active_list_lock);
+	BUG_ON(!lists_empty);
+
+	return 0;
+}
+
+/** Unbinds all inactive objects. */
+int
+i915_gem_evict_inactive(struct drm_device *dev)
+{
+	drm_i915_private_t *dev_priv = dev->dev_private;
+
+	while (!list_empty(&dev_priv->mm.inactive_list)) {
+		struct drm_gem_object *obj;
+		int ret;
+
+		obj = list_first_entry(&dev_priv->mm.inactive_list,
+				       struct drm_i915_gem_object,
+				       list)->obj;
+
+		ret = i915_gem_object_unbind(obj);
+		if (ret != 0) {
+			DRM_ERROR("Error unbinding object: %d\n", ret);
+			return ret;
+		}
+	}
+
+	return 0;
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i915/intel_fb.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i915/intel_fb.c
@@ -70,7 +70,7 @@
 
 
 /**
- * Curretly it is assumed that the old framebuffer is reused.
+ * Currently it is assumed that the old framebuffer is reused.
  *
  * LOCKING
  * caller should hold the mode config lock.
@@ -148,7 +148,7 @@
 
 	mutex_lock(&dev->struct_mutex);
 
-	ret = i915_gem_object_pin(fbo, PAGE_SIZE);
+	ret = i915_gem_object_pin(fbo, 64*1024);
 	if (ret) {
 		DRM_ERROR("failed to pin fb: %d\n", ret);
 		goto out_unref;
@@ -230,8 +230,9 @@
 	par->intel_fb = intel_fb;
 
 	/* To allow resizeing without swapping buffers */
-	DRM_DEBUG("allocated %dx%d fb: 0x%08x, bo %p\n", intel_fb->base.width,
-		  intel_fb->base.height, obj_priv->gtt_offset, fbo);
+	DRM_DEBUG_KMS("allocated %dx%d fb: 0x%08x, bo %p\n",
+			intel_fb->base.width, intel_fb->base.height,
+			obj_priv->gtt_offset, fbo);
 
 	mutex_unlock(&dev->struct_mutex);
 	return 0;
@@ -249,7 +250,7 @@
 {
 	int ret;
 
-	DRM_DEBUG("\n");
+	DRM_DEBUG_KMS("\n");
 	ret = drm_fb_helper_single_fb_probe(dev, 32, intelfb_create);
 	return ret;
 }
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i915/intel_bios.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i915/intel_bios.c
@@ -33,6 +33,8 @@
 #define	SLAVE_ADDR1	0x70
 #define	SLAVE_ADDR2	0x72
 
+static int panel_type;
+
 static void *
 find_section(struct bdb_header *bdb, int section_id)
 {
@@ -114,6 +116,8 @@
 	struct lvds_dvo_timing *dvo_timing;
 	struct drm_display_mode *panel_fixed_mode;
 	int lfp_data_size, dvo_timing_offset;
+	int i, temp_downclock;
+	struct drm_display_mode *temp_mode;
 
 	/* Defaults if we can't find VBT info */
 	dev_priv->lvds_dither = 0;
@@ -126,6 +130,7 @@
 	dev_priv->lvds_dither = lvds_options->pixel_dither;
 	if (lvds_options->panel_type == 0xff)
 		return;
+	panel_type = lvds_options->panel_type;
 
 	lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
 	if (!lvds_lfp_data)
@@ -159,9 +164,50 @@
 
 	dev_priv->lfp_lvds_vbt_mode = panel_fixed_mode;
 
-	DRM_DEBUG("Found panel mode in BIOS VBT tables:\n");
+	DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n");
 	drm_mode_debug_printmodeline(panel_fixed_mode);
 
+	temp_mode = kzalloc(sizeof(*temp_mode), GFP_KERNEL);
+	temp_downclock = panel_fixed_mode->clock;
+	/*
+	 * enumerate the LVDS panel timing info entry in VBT to check whether
+	 * the LVDS downclock is found.
+	 */
+	for (i = 0; i < 16; i++) {
+		entry = (struct bdb_lvds_lfp_data_entry *)
+			((uint8_t *)lvds_lfp_data->data + (lfp_data_size * i));
+		dvo_timing = (struct lvds_dvo_timing *)
+			((unsigned char *)entry + dvo_timing_offset);
+
+		fill_detail_timing_data(temp_mode, dvo_timing);
+
+		if (temp_mode->hdisplay == panel_fixed_mode->hdisplay &&
+		temp_mode->hsync_start == panel_fixed_mode->hsync_start &&
+		temp_mode->hsync_end == panel_fixed_mode->hsync_end &&
+		temp_mode->htotal == panel_fixed_mode->htotal &&
+		temp_mode->vdisplay == panel_fixed_mode->vdisplay &&
+		temp_mode->vsync_start == panel_fixed_mode->vsync_start &&
+		temp_mode->vsync_end == panel_fixed_mode->vsync_end &&
+		temp_mode->vtotal == panel_fixed_mode->vtotal &&
+		temp_mode->clock < temp_downclock) {
+			/*
+			 * downclock is already found. But we expect
+			 * to find the lower downclock.
+			 */
+			temp_downclock = temp_mode->clock;
+		}
+		/* clear it to zero */
+		memset(temp_mode, 0, sizeof(*temp_mode));
+	}
+	kfree(temp_mode);
+	if (temp_downclock < panel_fixed_mode->clock &&
+	    i915_lvds_downclock) {
+		dev_priv->lvds_downclock_avail = 1;
+		dev_priv->lvds_downclock = temp_downclock;
+		DRM_DEBUG_KMS("LVDS downclock is found in VBT. ",
+				"Normal Clock %dKHz, downclock %dKHz\n",
+				temp_downclock, panel_fixed_mode->clock);
+	}
 	return;
 }
 
@@ -201,6 +247,7 @@
 parse_general_features(struct drm_i915_private *dev_priv,
 		       struct bdb_header *bdb)
 {
+	struct drm_device *dev = dev_priv->dev;
 	struct bdb_general_features *general;
 
 	/* Set sensible defaults in case we can't find the general block */
@@ -217,7 +264,7 @@
 			if (IS_I85X(dev_priv->dev))
 				dev_priv->lvds_ssc_freq =
 					general->ssc_freq ? 66 : 48;
-			else if (IS_IGDNG(dev_priv->dev))
+			else if (IS_IRONLAKE(dev_priv->dev) || IS_GEN6(dev))
 				dev_priv->lvds_ssc_freq =
 					general->ssc_freq ? 100 : 120;
 			else
@@ -241,22 +288,18 @@
 		GPIOF,
 	};
 
-	/* Set sensible defaults in case we can't find the general block
-	   or it is the wrong chipset */
-	dev_priv->crt_ddc_bus = -1;
-
 	general = find_section(bdb, BDB_GENERAL_DEFINITIONS);
 	if (general) {
 		u16 block_size = get_blocksize(general);
 		if (block_size >= sizeof(*general)) {
 			int bus_pin = general->crt_ddc_gmbus_pin;
-			DRM_DEBUG("crt_ddc_bus_pin: %d\n", bus_pin);
+			DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin);
 			if ((bus_pin >= 1) && (bus_pin <= 6)) {
 				dev_priv->crt_ddc_bus =
 					crt_bus_map_table[bus_pin-1];
 			}
 		} else {
-			DRM_DEBUG("BDB_GD too small (%d). Invalid.\n",
+			DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n",
 				  block_size);
 		}
 	}
@@ -274,7 +317,7 @@
 
 	p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
 	if (!p_defs) {
-		DRM_DEBUG("No general definition block is found\n");
+		DRM_DEBUG_KMS("No general definition block is found\n");
 		return;
 	}
 	/* judge whether the size of child device meets the requirements.
@@ -284,7 +327,7 @@
 	 */
 	if (p_defs->child_dev_size != sizeof(*p_child)) {
 		/* different child dev size . Ignore it */
-		DRM_DEBUG("different child size is found. Invalid.\n");
+		DRM_DEBUG_KMS("different child size is found. Invalid.\n");
 		return;
 	}
 	/* get the block size of general definitions */
@@ -310,11 +353,11 @@
 		if (p_child->dvo_port != DEVICE_PORT_DVOB &&
 			p_child->dvo_port != DEVICE_PORT_DVOC) {
 			/* skip the incorrect SDVO port */
-			DRM_DEBUG("Incorrect SDVO port. Skip it \n");
+			DRM_DEBUG_KMS("Incorrect SDVO port. Skip it \n");
 			continue;
 		}
-		DRM_DEBUG("the SDVO device with slave addr %2x is found on "
-				"%s port\n",
+		DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on"
+				" %s port\n",
 				p_child->slave_addr,
 				(p_child->dvo_port == DEVICE_PORT_DVOB) ?
 					"SDVOB" : "SDVOC");
@@ -325,21 +368,21 @@
 			p_mapping->dvo_wiring = p_child->dvo_wiring;
 			p_mapping->initialized = 1;
 		} else {
-			DRM_DEBUG("Maybe one SDVO port is shared by "
+			DRM_DEBUG_KMS("Maybe one SDVO port is shared by "
 					 "two SDVO device.\n");
 		}
 		if (p_child->slave2_addr) {
 			/* Maybe this is a SDVO device with multiple inputs */
 			/* And the mapping info is not added */
-			DRM_DEBUG("there exists the slave2_addr. Maybe this "
-				"is a SDVO device with multiple inputs.\n");
+			DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this"
+				" is a SDVO device with multiple inputs.\n");
 		}
 		count++;
 	}
 
 	if (!count) {
 		/* No SDVO device info is found */
-		DRM_DEBUG("No SDVO device info is found in VBT\n");
+		DRM_DEBUG_KMS("No SDVO device info is found in VBT\n");
 	}
 	return;
 }
@@ -366,6 +409,98 @@
 		dev_priv->render_reclock_avail = true;
 }
 
+static void
+parse_edp(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
+{
+	struct bdb_edp *edp;
+
+	edp = find_section(bdb, BDB_EDP);
+	if (!edp) {
+		if (SUPPORTS_EDP(dev_priv->dev) && dev_priv->edp_support) {
+			DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported,\
+				       assume 18bpp panel color depth.\n");
+			dev_priv->edp_bpp = 18;
+		}
+		return;
+	}
+
+	switch ((edp->color_depth >> (panel_type * 2)) & 3) {
+	case EDP_18BPP:
+		dev_priv->edp_bpp = 18;
+		break;
+	case EDP_24BPP:
+		dev_priv->edp_bpp = 24;
+		break;
+	case EDP_30BPP:
+		dev_priv->edp_bpp = 30;
+		break;
+	}
+}
+
+static void
+parse_device_mapping(struct drm_i915_private *dev_priv,
+		       struct bdb_header *bdb)
+{
+	struct bdb_general_definitions *p_defs;
+	struct child_device_config *p_child, *child_dev_ptr;
+	int i, child_device_num, count;
+	u16	block_size;
+
+	p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
+	if (!p_defs) {
+		DRM_DEBUG_KMS("No general definition block is found\n");
+		return;
+	}
+	/* judge whether the size of child device meets the requirements.
+	 * If the child device size obtained from general definition block
+	 * is different with sizeof(struct child_device_config), skip the
+	 * parsing of sdvo device info
+	 */
+	if (p_defs->child_dev_size != sizeof(*p_child)) {
+		/* different child dev size . Ignore it */
+		DRM_DEBUG_KMS("different child size is found. Invalid.\n");
+		return;
+	}
+	/* get the block size of general definitions */
+	block_size = get_blocksize(p_defs);
+	/* get the number of child device */
+	child_device_num = (block_size - sizeof(*p_defs)) /
+				sizeof(*p_child);
+	count = 0;
+	/* get the number of child device that is present */
+	for (i = 0; i < child_device_num; i++) {
+		p_child = &(p_defs->devices[i]);
+		if (!p_child->device_type) {
+			/* skip the device block if device type is invalid */
+			continue;
+		}
+		count++;
+	}
+	if (!count) {
+		DRM_DEBUG_KMS("no child dev is parsed from VBT \n");
+		return;
+	}
+	dev_priv->child_dev = kzalloc(sizeof(*p_child) * count, GFP_KERNEL);
+	if (!dev_priv->child_dev) {
+		DRM_DEBUG_KMS("No memory space for child device\n");
+		return;
+	}
+
+	dev_priv->child_dev_num = count;
+	count = 0;
+	for (i = 0; i < child_device_num; i++) {
+		p_child = &(p_defs->devices[i]);
+		if (!p_child->device_type) {
+			/* skip the device block if device type is invalid */
+			continue;
+		}
+		child_dev_ptr = dev_priv->child_dev + count;
+		count++;
+		memcpy((void *)child_dev_ptr, (void *)p_child,
+					sizeof(*p_child));
+	}
+	return;
+}
 /**
  * intel_init_bios - initialize VBIOS settings & find VBT
  * @dev: DRM device
@@ -417,7 +552,9 @@
 	parse_lfp_panel_data(dev_priv, bdb);
 	parse_sdvo_panel_data(dev_priv, bdb);
 	parse_sdvo_device_mapping(dev_priv, bdb);
+	parse_device_mapping(dev_priv, bdb);
 	parse_driver_features(dev_priv, bdb);
+	parse_edp(dev_priv, bdb);
 
 	pci_unmap_rom(pdev, bios);
 
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i915/i915_drv.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i915/i915_drv.h
@@ -55,6 +55,8 @@
 
 #define I915_NUM_PIPE	2
 
+#define I915_GEM_GPU_DOMAINS	(~(I915_GEM_DOMAIN_CPU | I915_GEM_DOMAIN_GTT))
+
 /* Interface history:
  *
  * 1.1: Original.
@@ -170,9 +172,34 @@
 	/* clock gating init */
 };
 
+struct intel_overlay;
+
+struct intel_device_info {
+	u8 is_mobile : 1;
+	u8 is_i8xx : 1;
+	u8 is_i85x : 1;
+	u8 is_i915g : 1;
+	u8 is_i9xx : 1;
+	u8 is_i945gm : 1;
+	u8 is_i965g : 1;
+	u8 is_i965gm : 1;
+	u8 is_g33 : 1;
+	u8 need_gfx_hws : 1;
+	u8 is_g4x : 1;
+	u8 is_pineview : 1;
+	u8 is_ironlake : 1;
+	u8 has_fbc : 1;
+	u8 has_rc6 : 1;
+	u8 has_pipe_cxsr : 1;
+	u8 has_hotplug : 1;
+	u8 cursor_needs_physical : 1;
+};
+
 typedef struct drm_i915_private {
 	struct drm_device *dev;
 
+	const struct intel_device_info *info;
+
 	int has_gem;
 
 	void __iomem *regs;
@@ -182,11 +209,15 @@
 
 	drm_dma_handle_t *status_page_dmah;
 	void *hw_status_page;
+	void *seqno_page;
 	dma_addr_t dma_status_page;
 	uint32_t counter;
 	unsigned int status_gfx_addr;
+	unsigned int seqno_gfx_addr;
 	drm_local_map_t hws_map;
 	struct drm_gem_object *hws_obj;
+	struct drm_gem_object *seqno_obj;
+	struct drm_gem_object *pwrctx;
 
 	struct resource mch_res;
 
@@ -206,11 +237,13 @@
 	/** Cached value of IMR to avoid reads in updating the bitfield */
 	u32 irq_mask_reg;
 	u32 pipestat[2];
-	/** splitted irq regs for graphics and display engine on IGDNG,
+	/** splitted irq regs for graphics and display engine on Ironlake,
 	    irq_mask_reg is still used for display irq. */
 	u32 gt_irq_mask_reg;
 	u32 gt_irq_enable_reg;
 	u32 de_irq_enable_reg;
+	u32 pch_irq_mask_reg;
+	u32 pch_irq_enable_reg;
 
 	u32 hotplug_supported_mask;
 	struct work_struct hotplug_work;
@@ -227,8 +260,6 @@
 	int hangcheck_count;
 	uint32_t last_acthd;
 
-	bool cursor_needs_physical;
-
 	struct drm_mm vram;
 
 	unsigned long cfb_size;
@@ -240,6 +271,9 @@
 
 	struct intel_opregion opregion;
 
+	/* overlay */
+	struct intel_overlay *overlay;
+
 	/* LVDS info */
 	int backlight_duty_cycle;  /* restore backlight to this value */
 	bool panel_wants_dither;
@@ -255,10 +289,11 @@
 	unsigned int lvds_use_ssc:1;
 	unsigned int edp_support:1;
 	int lvds_ssc_freq;
+	int edp_bpp;
 
 	struct notifier_block lid_notifier;
 
-	int crt_ddc_bus; /* -1 = unknown, else GPIO to use for CRT DDC */
+	int crt_ddc_bus; /* 0 = unknown, else GPIO to use for CRT DDC */
 	struct drm_i915_fence_reg fence_regs[16]; /* assume 965 */
 	int fence_reg_start; /* 4 if userland hasn't ioctl'd us yet */
 	int num_fence_regs; /* 8 on pre-965, 16 otherwise */
@@ -279,7 +314,6 @@
 	u32 saveDSPACNTR;
 	u32 saveDSPBCNTR;
 	u32 saveDSPARB;
-	u32 saveRENDERSTANDBY;
 	u32 saveHWS;
 	u32 savePIPEACONF;
 	u32 savePIPEBCONF;
@@ -374,8 +408,6 @@
 	u32 saveFDI_RXA_IMR;
 	u32 saveFDI_RXB_IMR;
 	u32 saveCACHE_MODE_0;
-	u32 saveD_STATE;
-	u32 saveDSPCLK_GATE_D;
 	u32 saveMI_ARB_STATE;
 	u32 saveSWF0[16];
 	u32 saveSWF1[16];
@@ -467,6 +499,15 @@
 		struct list_head flushing_list;
 
 		/**
+		 * List of objects currently pending a GPU write flush.
+		 *
+		 * All elements on this list will belong to either the
+		 * active_list or flushing_list, last_rendering_seqno can
+		 * be used to differentiate between the two elements.
+		 */
+		struct list_head gpu_write_list;
+
+		/**
 		 * LRU list of objects which are not in the ringbuffer and
 		 * are ready to unbind, but are still in the GTT.
 		 *
@@ -539,13 +580,23 @@
 	/* indicate whether the LVDS_BORDER should be enabled or not */
 	unsigned int lvds_border_bits;
 
+	struct drm_crtc *plane_to_crtc_mapping[2];
+	struct drm_crtc *pipe_to_crtc_mapping[2];
+	wait_queue_head_t pending_flip_queue;
+	bool flip_pending_is_done;
+
 	/* Reclocking support */
 	bool render_reclock_avail;
 	bool lvds_downclock_avail;
+	/* indicates the reduced downclock for LVDS*/
+	int lvds_downclock;
 	struct work_struct idle_work;
 	struct timer_list idle_timer;
 	bool busy;
 	u16 orig_clock;
+	int child_dev_num;
+	struct child_device_config *child_dev;
+	struct drm_connector *int_lvds_connector;
 } drm_i915_private_t;
 
 /** driver private structure attached to each drm_gem_object */
@@ -557,6 +608,10 @@
 
 	/** This object's place on the active/flushing/inactive lists */
 	struct list_head list;
+	/** This object's place on GPU write list */
+	struct list_head gpu_write_list;
+	/** This object's place on eviction list */
+	struct list_head evict_list;
 
 	/** This object's place on the fenced object LRU */
 	struct list_head fence_list;
@@ -638,6 +693,13 @@
 	 * Advice: are the backing pages purgeable?
 	 */
 	int madv;
+
+	/**
+	 * Number of crtcs where this object is currently the fb, but
+	 * will be page flipped away on the next vblank.  When it
+	 * reaches 0, dev_priv->pending_flip_queue will be woken up.
+	 */
+	atomic_t pending_flip;
 };
 
 /**
@@ -681,6 +743,7 @@
 extern int i915_max_ioctl;
 extern unsigned int i915_fbpercrtc;
 extern unsigned int i915_powersave;
+extern unsigned int i915_lvds_downclock;
 
 extern void i915_save_display(struct drm_device *dev);
 extern void i915_restore_display(struct drm_device *dev);
@@ -738,6 +801,8 @@
 void
 i915_disable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask);
 
+void intel_enable_asle (struct drm_device *dev);
+
 
 /* i915_mem.c */
 extern int i915_mem_alloc(struct drm_device *dev, void *data,
@@ -770,6 +835,8 @@
 			     struct drm_file *file_priv);
 int i915_gem_execbuffer(struct drm_device *dev, void *data,
 			struct drm_file *file_priv);
+int i915_gem_execbuffer2(struct drm_device *dev, void *data,
+			 struct drm_file *file_priv);
 int i915_gem_pin_ioctl(struct drm_device *dev, void *data,
 		       struct drm_file *file_priv);
 int i915_gem_unpin_ioctl(struct drm_device *dev, void *data,
@@ -795,6 +862,9 @@
 void i915_gem_free_object(struct drm_gem_object *obj);
 int i915_gem_object_pin(struct drm_gem_object *obj, uint32_t alignment);
 void i915_gem_object_unpin(struct drm_gem_object *obj);
+void i915_gem_flush(struct drm_device *dev,
+		    uint32_t invalidate_domains,
+		    uint32_t flush_domains);
 int i915_gem_object_unbind(struct drm_gem_object *obj);
 void i915_gem_release_mmap(struct drm_gem_object *obj);
 void i915_gem_lastclose(struct drm_device *dev);
@@ -812,26 +882,40 @@
 void i915_gem_cleanup_ringbuffer(struct drm_device *dev);
 int i915_gem_do_init(struct drm_device *dev, unsigned long start,
 		     unsigned long end);
+int i915_gpu_idle(struct drm_device *dev);
 int i915_gem_idle(struct drm_device *dev);
+uint32_t i915_add_request(struct drm_device *dev, struct drm_file *file_priv,
+			  uint32_t flush_domains);
+int i915_do_wait_request(struct drm_device *dev, uint32_t seqno, int interruptible);
 int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf);
 int i915_gem_object_set_to_gtt_domain(struct drm_gem_object *obj,
 				      int write);
+int i915_gem_object_set_to_display_plane(struct drm_gem_object *obj);
 int i915_gem_attach_phys_object(struct drm_device *dev,
 				struct drm_gem_object *obj, int id);
 void i915_gem_detach_phys_object(struct drm_device *dev,
 				 struct drm_gem_object *obj);
 void i915_gem_free_all_phys_object(struct drm_device *dev);
-int i915_gem_object_get_pages(struct drm_gem_object *obj);
+int i915_gem_object_get_pages(struct drm_gem_object *obj, gfp_t gfpmask);
 void i915_gem_object_put_pages(struct drm_gem_object *obj);
 void i915_gem_release(struct drm_device * dev, struct drm_file *file_priv);
+void i915_gem_object_flush_write_domain(struct drm_gem_object *obj);
 
 void i915_gem_shrinker_init(void);
 void i915_gem_shrinker_exit(void);
 
+/* i915_gem_evict.c */
+int i915_gem_evict_something(struct drm_device *dev, int min_size, unsigned alignment);
+int i915_gem_evict_everything(struct drm_device *dev);
+int i915_gem_evict_inactive(struct drm_device *dev);
+
 /* i915_gem_tiling.c */
 void i915_gem_detect_bit_6_swizzle(struct drm_device *dev);
 void i915_gem_object_do_bit_17_swizzle(struct drm_gem_object *obj);
 void i915_gem_object_save_bit_17_swizzle(struct drm_gem_object *obj);
+bool i915_tiling_ok(struct drm_device *dev, int stride, int size,
+		    int tiling_mode);
+bool i915_obj_fenceable(struct drm_device *dev, struct drm_gem_object *obj);
 
 /* i915_gem_debug.c */
 void i915_gem_dump_object(struct drm_gem_object *obj, int len,
@@ -863,11 +947,13 @@
 extern int intel_opregion_init(struct drm_device *dev, int resume);
 extern void intel_opregion_free(struct drm_device *dev, int suspend);
 extern void opregion_asle_intr(struct drm_device *dev);
+extern void ironlake_opregion_gse_intr(struct drm_device *dev);
 extern void opregion_enable_asle(struct drm_device *dev);
 #else
 static inline int intel_opregion_init(struct drm_device *dev, int resume) { return 0; }
 static inline void intel_opregion_free(struct drm_device *dev, int suspend) { return; }
 static inline void opregion_asle_intr(struct drm_device *dev) { return; }
+static inline void ironlake_opregion_gse_intr(struct drm_device *dev) { return; }
 static inline void opregion_enable_asle(struct drm_device *dev) { return; }
 #endif
 
@@ -952,85 +1038,78 @@
 extern int i915_wrap_ring(struct drm_device * dev);
 extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
 
-#define IS_I830(dev) ((dev)->pci_device == 0x3577)
-#define IS_845G(dev) ((dev)->pci_device == 0x2562)
-#define IS_I85X(dev) ((dev)->pci_device == 0x3582)
-#define IS_I855(dev) ((dev)->pci_device == 0x3582)
-#define IS_I865G(dev) ((dev)->pci_device == 0x2572)
-
-#define IS_I915G(dev) ((dev)->pci_device == 0x2582 || (dev)->pci_device == 0x258a)
-#define IS_I915GM(dev) ((dev)->pci_device == 0x2592)
-#define IS_I945G(dev) ((dev)->pci_device == 0x2772)
-#define IS_I945GM(dev) ((dev)->pci_device == 0x27A2 ||\
-		        (dev)->pci_device == 0x27AE)
-#define IS_I965G(dev) ((dev)->pci_device == 0x2972 || \
-		       (dev)->pci_device == 0x2982 || \
-		       (dev)->pci_device == 0x2992 || \
-		       (dev)->pci_device == 0x29A2 || \
-		       (dev)->pci_device == 0x2A02 || \
-		       (dev)->pci_device == 0x2A12 || \
-		       (dev)->pci_device == 0x2A42 || \
-		       (dev)->pci_device == 0x2E02 || \
-		       (dev)->pci_device == 0x2E12 || \
-		       (dev)->pci_device == 0x2E22 || \
-		       (dev)->pci_device == 0x2E32 || \
-		       (dev)->pci_device == 0x2E42 || \
-		       (dev)->pci_device == 0x0042 || \
-		       (dev)->pci_device == 0x0046)
-
-#define IS_I965GM(dev) ((dev)->pci_device == 0x2A02 || \
-			(dev)->pci_device == 0x2A12)
-
-#define IS_GM45(dev) ((dev)->pci_device == 0x2A42)
-
-#define IS_G4X(dev) ((dev)->pci_device == 0x2E02 || \
-		     (dev)->pci_device == 0x2E12 || \
-		     (dev)->pci_device == 0x2E22 || \
-		     (dev)->pci_device == 0x2E32 || \
-		     (dev)->pci_device == 0x2E42 || \
-		     IS_GM45(dev))
-
-#define IS_IGDG(dev) ((dev)->pci_device == 0xa001)
-#define IS_IGDGM(dev) ((dev)->pci_device == 0xa011)
-#define IS_IGD(dev) (IS_IGDG(dev) || IS_IGDGM(dev))
-
-#define IS_G33(dev)    ((dev)->pci_device == 0x29C2 ||	\
-			(dev)->pci_device == 0x29B2 ||	\
-			(dev)->pci_device == 0x29D2 ||  \
-			(IS_IGD(dev)))
-
-#define IS_IGDNG_D(dev)	((dev)->pci_device == 0x0042)
-#define IS_IGDNG_M(dev)	((dev)->pci_device == 0x0046)
-#define IS_IGDNG(dev)	(IS_IGDNG_D(dev) || IS_IGDNG_M(dev))
-
-#define IS_I9XX(dev) (IS_I915G(dev) || IS_I915GM(dev) || IS_I945G(dev) || \
-		      IS_I945GM(dev) || IS_I965G(dev) || IS_G33(dev) || \
-		      IS_IGDNG(dev))
-
-#define IS_MOBILE(dev) (IS_I830(dev) || IS_I85X(dev) || IS_I915GM(dev) || \
-			IS_I945GM(dev) || IS_I965GM(dev) || IS_GM45(dev) || \
-			IS_IGD(dev) || IS_IGDNG_M(dev))
+#define INTEL_INFO(dev)	(((struct drm_i915_private *) (dev)->dev_private)->info)
+
+#define IS_I830(dev)		((dev)->pci_device == 0x3577)
+#define IS_845G(dev)		((dev)->pci_device == 0x2562)
+#define IS_I85X(dev)		(INTEL_INFO(dev)->is_i85x)
+#define IS_I865G(dev)		((dev)->pci_device == 0x2572)
+#define IS_GEN2(dev)		(INTEL_INFO(dev)->is_i8xx)
+#define IS_I915G(dev)		(INTEL_INFO(dev)->is_i915g)
+#define IS_I915GM(dev)		((dev)->pci_device == 0x2592)
+#define IS_I945G(dev)		((dev)->pci_device == 0x2772)
+#define IS_I945GM(dev)		(INTEL_INFO(dev)->is_i945gm)
+#define IS_I965G(dev)		(INTEL_INFO(dev)->is_i965g)
+#define IS_I965GM(dev)		(INTEL_INFO(dev)->is_i965gm)
+#define IS_GM45(dev)		((dev)->pci_device == 0x2A42)
+#define IS_G4X(dev)		(INTEL_INFO(dev)->is_g4x)
+#define IS_PINEVIEW_G(dev)	((dev)->pci_device == 0xa001)
+#define IS_PINEVIEW_M(dev)	((dev)->pci_device == 0xa011)
+#define IS_PINEVIEW(dev)	(INTEL_INFO(dev)->is_pineview)
+#define IS_G33(dev)		(INTEL_INFO(dev)->is_g33)
+#define IS_IRONLAKE_D(dev)	((dev)->pci_device == 0x0042)
+#define IS_IRONLAKE_M(dev)	((dev)->pci_device == 0x0046)
+#define IS_IRONLAKE(dev)	(INTEL_INFO(dev)->is_ironlake)
+#define IS_I9XX(dev)		(INTEL_INFO(dev)->is_i9xx)
+#define IS_MOBILE(dev)		(INTEL_INFO(dev)->is_mobile)
+
+#define IS_GEN3(dev)	(IS_I915G(dev) ||			\
+			 IS_I915GM(dev) ||			\
+			 IS_I945G(dev) ||			\
+			 IS_I945GM(dev) ||			\
+			 IS_G33(dev) || \
+			 IS_PINEVIEW(dev))
+#define IS_GEN4(dev)	((dev)->pci_device == 0x2972 ||		\
+			 (dev)->pci_device == 0x2982 ||		\
+			 (dev)->pci_device == 0x2992 ||		\
+			 (dev)->pci_device == 0x29A2 ||		\
+			 (dev)->pci_device == 0x2A02 ||		\
+			 (dev)->pci_device == 0x2A12 ||		\
+			 (dev)->pci_device == 0x2E02 ||		\
+			 (dev)->pci_device == 0x2E12 ||		\
+			 (dev)->pci_device == 0x2E22 ||		\
+			 (dev)->pci_device == 0x2E32 ||		\
+			 (dev)->pci_device == 0x2A42 ||		\
+			 (dev)->pci_device == 0x2E42 ||		\
+			 (dev)->pci_device == 0x2E92)
+
+#define I915_NEED_GFX_HWS(dev)	(INTEL_INFO(dev)->need_gfx_hws)
+
+#define IS_GEN6(dev)	((dev)->pci_device == 0x0102)
 
-#define I915_NEED_GFX_HWS(dev) (IS_G33(dev) || IS_GM45(dev) || IS_G4X(dev) || \
-				IS_IGDNG(dev))
 /* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte
  * rows, which changed the alignment requirements and fence programming.
  */
 #define HAS_128_BYTE_Y_TILING(dev) (IS_I9XX(dev) && !(IS_I915G(dev) || \
 						      IS_I915GM(dev)))
-#define SUPPORTS_INTEGRATED_HDMI(dev)	(IS_G4X(dev) || IS_IGDNG(dev))
-#define SUPPORTS_INTEGRATED_DP(dev)	(IS_G4X(dev) || IS_IGDNG(dev))
-#define SUPPORTS_EDP(dev)		(IS_IGDNG_M(dev))
-#define I915_HAS_HOTPLUG(dev) (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev) || IS_I965G(dev))
+#define SUPPORTS_DIGITAL_OUTPUTS(dev)	(IS_I9XX(dev) && !IS_PINEVIEW(dev))
+#define SUPPORTS_INTEGRATED_HDMI(dev)	(IS_G4X(dev) || IS_IRONLAKE(dev))
+#define SUPPORTS_INTEGRATED_DP(dev)	(IS_G4X(dev) || IS_IRONLAKE(dev))
+#define SUPPORTS_EDP(dev)		(IS_IRONLAKE_M(dev))
+#define SUPPORTS_TV(dev)		(IS_I9XX(dev) && IS_MOBILE(dev) && \
+					!IS_IRONLAKE(dev) && !IS_PINEVIEW(dev))
+#define I915_HAS_HOTPLUG(dev)		 (INTEL_INFO(dev)->has_hotplug)
 /* dsparb controlled by hw only */
-#define DSPARB_HWCONTROL(dev) (IS_G4X(dev) || IS_IGDNG(dev))
+#define DSPARB_HWCONTROL(dev) (IS_G4X(dev) || IS_IRONLAKE(dev))
 
-#define HAS_FW_BLC(dev) (IS_I9XX(dev) || IS_G4X(dev) || IS_IGDNG(dev))
-#define HAS_PIPE_CXSR(dev) (IS_G4X(dev) || IS_IGDNG(dev))
-#define I915_HAS_FBC(dev) (IS_MOBILE(dev) && \
-			   (IS_I9XX(dev) || IS_GM45(dev)) && \
-			   !IS_IGD(dev) && \
-			   !IS_IGDNG(dev))
+#define HAS_FW_BLC(dev) (IS_I9XX(dev) || IS_G4X(dev) || IS_IRONLAKE(dev))
+#define HAS_PIPE_CXSR(dev) (INTEL_INFO(dev)->has_pipe_cxsr)
+#define I915_HAS_FBC(dev) (INTEL_INFO(dev)->has_fbc)
+#define I915_HAS_RC6(dev) (INTEL_INFO(dev)->has_rc6)
+
+#define HAS_PCH_SPLIT(dev) (IS_IRONLAKE(dev) ||	\
+			    IS_GEN6(dev))
+#define HAS_PIPE_CONTROL(dev) (IS_IRONLAKE(dev) || IS_GEN6(dev))
 
 #define PRIMARY_RINGBUFFER_SIZE         (128*1024)
 
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i915/i915_drv.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i915/i915_drv.c
@@ -33,7 +33,6 @@
 #include "i915_drm.h"
 #include "i915_drv.h"
 
-#include "drm_pciids.h"
 #include <linux/console.h>
 #include "drm_crtc_helper.h"
 
@@ -46,36 +45,152 @@
 unsigned int i915_powersave = 1;
 module_param_named(powersave, i915_powersave, int, 0400);
 
+unsigned int i915_lvds_downclock = 0;
+module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);
+
 static struct drm_driver driver;
+extern int intel_agp_enabled;
+
+#define INTEL_VGA_DEVICE(id, info) {		\
+	.class = PCI_CLASS_DISPLAY_VGA << 8,	\
+	.class_mask = 0xffff00,			\
+	.vendor = 0x8086,			\
+	.device = id,				\
+	.subvendor = PCI_ANY_ID,		\
+	.subdevice = PCI_ANY_ID,		\
+	.driver_data = (unsigned long) info }
+
+const static struct intel_device_info intel_i830_info = {
+	.is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
+};
+
+const static struct intel_device_info intel_845g_info = {
+	.is_i8xx = 1,
+};
+
+const static struct intel_device_info intel_i85x_info = {
+	.is_i8xx = 1, .is_i85x = 1, .is_mobile = 1,
+	.cursor_needs_physical = 1,
+};
+
+const static struct intel_device_info intel_i865g_info = {
+	.is_i8xx = 1,
+};
+
+const static struct intel_device_info intel_i915g_info = {
+	.is_i915g = 1, .is_i9xx = 1, .cursor_needs_physical = 1,
+};
+const static struct intel_device_info intel_i915gm_info = {
+	.is_i9xx = 1,  .is_mobile = 1,
+	.cursor_needs_physical = 1,
+};
+const static struct intel_device_info intel_i945g_info = {
+	.is_i9xx = 1, .has_hotplug = 1, .cursor_needs_physical = 1,
+};
+const static struct intel_device_info intel_i945gm_info = {
+	.is_i945gm = 1, .is_i9xx = 1, .is_mobile = 1,
+	.has_hotplug = 1, .cursor_needs_physical = 1,
+};
+
+const static struct intel_device_info intel_i965g_info = {
+	.is_i965g = 1, .is_i9xx = 1, .has_hotplug = 1,
+};
+
+const static struct intel_device_info intel_i965gm_info = {
+	.is_i965g = 1, .is_mobile = 1, .is_i965gm = 1, .is_i9xx = 1,
+	.is_mobile = 1, .has_fbc = 1, .has_rc6 = 1,
+	.has_hotplug = 1,
+};
+
+const static struct intel_device_info intel_g33_info = {
+	.is_g33 = 1, .is_i9xx = 1, .need_gfx_hws = 1,
+	.has_hotplug = 1,
+};
 
-static struct pci_device_id pciidlist[] = {
-	i915_PCI_IDS
+const static struct intel_device_info intel_g45_info = {
+	.is_i965g = 1, .is_g4x = 1, .is_i9xx = 1, .need_gfx_hws = 1,
+	.has_pipe_cxsr = 1,
+	.has_hotplug = 1,
+};
+
+const static struct intel_device_info intel_gm45_info = {
+	.is_i965g = 1, .is_mobile = 1, .is_g4x = 1, .is_i9xx = 1,
+	.is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1,
+	.has_pipe_cxsr = 1,
+	.has_hotplug = 1,
+};
+
+const static struct intel_device_info intel_pineview_info = {
+	.is_g33 = 1, .is_pineview = 1, .is_mobile = 1, .is_i9xx = 1,
+	.need_gfx_hws = 1,
+	.has_hotplug = 1,
+};
+
+const static struct intel_device_info intel_ironlake_d_info = {
+	.is_ironlake = 1, .is_i965g = 1, .is_i9xx = 1, .need_gfx_hws = 1,
+	.has_pipe_cxsr = 1,
+	.has_hotplug = 1,
+};
+
+const static struct intel_device_info intel_ironlake_m_info = {
+	.is_ironlake = 1, .is_mobile = 1, .is_i965g = 1, .is_i9xx = 1,
+	.need_gfx_hws = 1, .has_rc6 = 1,
+	.has_hotplug = 1,
+};
+
+const static struct pci_device_id pciidlist[] = {
+	INTEL_VGA_DEVICE(0x3577, &intel_i830_info),
+	INTEL_VGA_DEVICE(0x2562, &intel_845g_info),
+	INTEL_VGA_DEVICE(0x3582, &intel_i85x_info),
+	INTEL_VGA_DEVICE(0x358e, &intel_i85x_info),
+	INTEL_VGA_DEVICE(0x2572, &intel_i865g_info),
+	INTEL_VGA_DEVICE(0x2582, &intel_i915g_info),
+	INTEL_VGA_DEVICE(0x258a, &intel_i915g_info),
+	INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info),
+	INTEL_VGA_DEVICE(0x2772, &intel_i945g_info),
+	INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info),
+	INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info),
+	INTEL_VGA_DEVICE(0x2972, &intel_i965g_info),
+	INTEL_VGA_DEVICE(0x2982, &intel_i965g_info),
+	INTEL_VGA_DEVICE(0x2992, &intel_i965g_info),
+	INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info),
+	INTEL_VGA_DEVICE(0x29b2, &intel_g33_info),
+	INTEL_VGA_DEVICE(0x29c2, &intel_g33_info),
+	INTEL_VGA_DEVICE(0x29d2, &intel_g33_info),
+	INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info),
+	INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info),
+	INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info),
+	INTEL_VGA_DEVICE(0x2e02, &intel_g45_info),
+	INTEL_VGA_DEVICE(0x2e12, &intel_g45_info),
+	INTEL_VGA_DEVICE(0x2e22, &intel_g45_info),
+	INTEL_VGA_DEVICE(0x2e32, &intel_g45_info),
+	INTEL_VGA_DEVICE(0x2e42, &intel_g45_info),
+	INTEL_VGA_DEVICE(0x2e92, &intel_g45_info),
+	INTEL_VGA_DEVICE(0xa001, &intel_pineview_info),
+	INTEL_VGA_DEVICE(0xa011, &intel_pineview_info),
+	INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info),
+	INTEL_VGA_DEVICE(0x0046, &intel_ironlake_m_info),
+	{0, 0, 0}
 };
 
 #if defined(CONFIG_DRM_I915_KMS)
 MODULE_DEVICE_TABLE(pci, pciidlist);
 #endif
 
-static int i915_suspend(struct drm_device *dev, pm_message_t state)
+static int i915_drm_freeze(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 
-	if (!dev || !dev_priv) {
-		DRM_ERROR("dev: %p, dev_priv: %p\n", dev, dev_priv);
-		DRM_ERROR("DRM not initialized, aborting suspend.\n");
-		return -ENODEV;
-	}
-
-	if (state.event == PM_EVENT_PRETHAW)
-		return 0;
-
 	pci_save_state(dev->pdev);
 
 	/* If KMS is active, we do the leavevt stuff here */
 	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
-		if (i915_gem_idle(dev))
+		int error = i915_gem_idle(dev);
+		if (error) {
 			dev_err(&dev->pdev->dev,
-				"GEM idle failed, resume may fail\n");
+				"GEM idle failed, resume might fail\n");
+			return error;
+		}
 		drm_irq_uninstall(dev);
 	}
 
@@ -83,26 +198,42 @@
 
 	intel_opregion_free(dev, 1);
 
+	/* Modeset on resume, not lid events */
+	dev_priv->modeset_on_lid = 0;
+
+	return 0;
+}
+
+static int i915_suspend(struct drm_device *dev, pm_message_t state)
+{
+	int error;
+
+	if (!dev || !dev->dev_private) {
+		DRM_ERROR("dev: %p\n", dev);
+		DRM_ERROR("DRM not initialized, aborting suspend.\n");
+		return -ENODEV;
+	}
+
+	if (state.event == PM_EVENT_PRETHAW)
+		return 0;
+
+	error = i915_drm_freeze(dev);
+	if (error)
+		return error;
+
 	if (state.event == PM_EVENT_SUSPEND) {
 		/* Shut down the device */
 		pci_disable_device(dev->pdev);
 		pci_set_power_state(dev->pdev, PCI_D3hot);
 	}
 
-	/* Modeset on resume, not lid events */
-	dev_priv->modeset_on_lid = 0;
-
 	return 0;
 }
 
-static int i915_resume(struct drm_device *dev)
+static int i915_drm_thaw(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
-	int ret = 0;
-
-	if (pci_enable_device(dev->pdev))
-		return -1;
-	pci_set_master(dev->pdev);
+	int error = 0;
 
 	i915_restore_state(dev);
 
@@ -113,21 +244,28 @@
 		mutex_lock(&dev->struct_mutex);
 		dev_priv->mm.suspended = 0;
 
-		ret = i915_gem_init_ringbuffer(dev);
-		if (ret != 0)
-			ret = -1;
+		error = i915_gem_init_ringbuffer(dev);
 		mutex_unlock(&dev->struct_mutex);
 
 		drm_irq_install(dev);
-	}
-	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
+
 		/* Resume the modeset for every activated CRTC */
 		drm_helper_resume_force_mode(dev);
 	}
 
 	dev_priv->modeset_on_lid = 0;
 
-	return ret;
+	return error;
+}
+
+static int i915_resume(struct drm_device *dev)
+{
+	if (pci_enable_device(dev->pdev))
+		return -EIO;
+
+	pci_set_master(dev->pdev);
+
+	return i915_drm_thaw(dev);
 }
 
 /**
@@ -192,6 +330,7 @@
 		}
 	} else {
 		DRM_ERROR("Error occurred. Don't know how to reset this chip.\n");
+		mutex_unlock(&dev->struct_mutex);
 		return -ENODEV;
 	}
 
@@ -268,22 +407,73 @@
 	drm_put_dev(dev);
 }
 
-static int
-i915_pci_suspend(struct pci_dev *pdev, pm_message_t state)
+static int i915_pm_suspend(struct device *dev)
 {
-	struct drm_device *dev = pci_get_drvdata(pdev);
+	struct pci_dev *pdev = to_pci_dev(dev);
+	struct drm_device *drm_dev = pci_get_drvdata(pdev);
+	int error;
+
+	if (!drm_dev || !drm_dev->dev_private) {
+		dev_err(dev, "DRM not initialized, aborting suspend.\n");
+		return -ENODEV;
+	}
 
-	return i915_suspend(dev, state);
+	error = i915_drm_freeze(drm_dev);
+	if (error)
+		return error;
+
+	pci_disable_device(pdev);
+	pci_set_power_state(pdev, PCI_D3hot);
+
+	return 0;
 }
 
-static int
-i915_pci_resume(struct pci_dev *pdev)
+static int i915_pm_resume(struct device *dev)
 {
-	struct drm_device *dev = pci_get_drvdata(pdev);
+	struct pci_dev *pdev = to_pci_dev(dev);
+	struct drm_device *drm_dev = pci_get_drvdata(pdev);
+
+	return i915_resume(drm_dev);
+}
+
+static int i915_pm_freeze(struct device *dev)
+{
+	struct pci_dev *pdev = to_pci_dev(dev);
+	struct drm_device *drm_dev = pci_get_drvdata(pdev);
+
+	if (!drm_dev || !drm_dev->dev_private) {
+		dev_err(dev, "DRM not initialized, aborting suspend.\n");
+		return -ENODEV;
+	}
 
-	return i915_resume(dev);
+	return i915_drm_freeze(drm_dev);
 }
 
+static int i915_pm_thaw(struct device *dev)
+{
+	struct pci_dev *pdev = to_pci_dev(dev);
+	struct drm_device *drm_dev = pci_get_drvdata(pdev);
+
+	return i915_drm_thaw(drm_dev);
+}
+
+static int i915_pm_poweroff(struct device *dev)
+{
+	struct pci_dev *pdev = to_pci_dev(dev);
+	struct drm_device *drm_dev = pci_get_drvdata(pdev);
+
+	return i915_drm_freeze(drm_dev);
+}
+
+const struct dev_pm_ops i915_pm_ops = {
+     .suspend = i915_pm_suspend,
+     .resume = i915_pm_resume,
+     .freeze = i915_pm_freeze,
+     .thaw = i915_pm_thaw,
+     .poweroff = i915_pm_poweroff,
+     .restore = i915_pm_resume,
+};
+
 static struct vm_operations_struct i915_gem_vm_ops = {
 	.fault = i915_gem_fault,
 	.open = drm_gem_vm_open,
@@ -303,8 +493,11 @@
 	.lastclose = i915_driver_lastclose,
 	.preclose = i915_driver_preclose,
 	.postclose = i915_driver_postclose,
+
+	/* Used in place of i915_pm_ops for non-DRIVER_MODESET */
 	.suspend = i915_suspend,
 	.resume = i915_resume,
+
 	.device_is_agp = i915_driver_device_is_agp,
 	.enable_vblank = i915_enable_vblank,
 	.disable_vblank = i915_disable_vblank,
@@ -329,10 +522,11 @@
 		 .owner = THIS_MODULE,
 		 .open = drm_open,
 		 .release = drm_release,
-		 .ioctl = drm_ioctl,
+		 .unlocked_ioctl = drm_ioctl,
 		 .mmap = drm_gem_mmap,
 		 .poll = drm_poll,
 		 .fasync = drm_fasync,
+		 .read = drm_read,
 #ifdef CONFIG_COMPAT
 		 .compat_ioctl = i915_compat_ioctl,
 #endif
@@ -343,10 +537,7 @@
 		 .id_table = pciidlist,
 		 .probe = i915_pci_probe,
 		 .remove = i915_pci_remove,
-#ifdef CONFIG_PM
-		 .resume = i915_pci_resume,
-		 .suspend = i915_pci_suspend,
-#endif
+		 .driver.pm = &i915_pm_ops,
 	},
 
 	.name = DRIVER_NAME,
@@ -359,6 +550,11 @@
 
 static int __init i915_init(void)
 {
+	if (!intel_agp_enabled) {
+		DRM_ERROR("drm/i915 can't work without intel_agp module!\n");
+		return -ENODEV;
+	}
+
 	driver.num_ioctls = i915_max_ioctl;
 
 	i915_gem_shrinker_init();
@@ -372,6 +568,22 @@
 	 * Allow optional vga_text_mode_force boot option to override
 	 * the default behavior.
 	 */
+	/*
+	 * If the user has not specified modesetting the check for known
+         * bad devices and disable them.
+         */
+	if (i915_modeset == -1) {
+		static struct pci_device_id i915_badmodeset[] = {
+			INTEL_VGA_DEVICE(0x3577, 0),
+			INTEL_VGA_DEVICE(0x2562, 0),
+			INTEL_VGA_DEVICE(0x3582, 0),
+			{ },
+		};
+		if (pci_dev_present(i915_badmodeset)) {
+			DRM_INFO("i915 disabling kernel modesetting for known bad device.\n");
+			i915_modeset = 0;
+		}
+	}
 #if defined(CONFIG_DRM_I915_KMS)
 	if (i915_modeset != 0)
 		driver.driver_features |= DRIVER_MODESET;
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i915/i915_ioc32.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i915/i915_ioc32.c
@@ -66,8 +66,7 @@
 			  &batchbuffer->cliprects))
 		return -EFAULT;
 
-	return drm_ioctl(file->f_path.dentry->d_inode, file,
-			 DRM_IOCTL_I915_BATCHBUFFER,
+	return drm_ioctl(file, DRM_IOCTL_I915_BATCHBUFFER,
 			 (unsigned long)batchbuffer);
 }
 
@@ -102,8 +101,8 @@
 			  &cmdbuffer->cliprects))
 		return -EFAULT;
 
-	return drm_ioctl(file->f_path.dentry->d_inode, file,
-			 DRM_IOCTL_I915_CMDBUFFER, (unsigned long)cmdbuffer);
+	return drm_ioctl(file, DRM_IOCTL_I915_CMDBUFFER,
+			 (unsigned long)cmdbuffer);
 }
 
 typedef struct drm_i915_irq_emit32 {
@@ -125,8 +124,8 @@
 			  &request->irq_seq))
 		return -EFAULT;
 
-	return drm_ioctl(file->f_path.dentry->d_inode, file,
-			 DRM_IOCTL_I915_IRQ_EMIT, (unsigned long)request);
+	return drm_ioctl(file, DRM_IOCTL_I915_IRQ_EMIT,
+			 (unsigned long)request);
 }
 typedef struct drm_i915_getparam32 {
 	int param;
@@ -149,8 +148,8 @@
 			  &request->value))
 		return -EFAULT;
 
-	return drm_ioctl(file->f_path.dentry->d_inode, file,
-			 DRM_IOCTL_I915_GETPARAM, (unsigned long)request);
+	return drm_ioctl(file, DRM_IOCTL_I915_GETPARAM,
+			 (unsigned long)request);
 }
 
 typedef struct drm_i915_mem_alloc32 {
@@ -178,8 +177,8 @@
 			  &request->region_offset))
 		return -EFAULT;
 
-	return drm_ioctl(file->f_path.dentry->d_inode, file,
-			 DRM_IOCTL_I915_ALLOC, (unsigned long)request);
+	return drm_ioctl(file, DRM_IOCTL_I915_ALLOC,
+			 (unsigned long)request);
 }
 
 drm_ioctl_compat_t *i915_compat_ioctls[] = {
@@ -211,12 +210,10 @@
 	if (nr < DRM_COMMAND_BASE + DRM_ARRAY_SIZE(i915_compat_ioctls))
 		fn = i915_compat_ioctls[nr - DRM_COMMAND_BASE];
 
-	lock_kernel();		/* XXX for now */
 	if (fn != NULL)
 		ret = (*fn) (filp, cmd, arg);
 	else
-		ret = drm_ioctl(filp->f_path.dentry->d_inode, filp, cmd, arg);
-	unlock_kernel();
+		ret = drm_ioctl(filp, cmd, arg);
 
 	return ret;
 }
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i915/intel_hdmi.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i915/intel_hdmi.c
@@ -82,7 +82,7 @@
 	/* HW workaround, need to toggle enable bit off and on for 12bpc, but
 	 * we do this anyway which shows more stable in testing.
 	 */
-	if (IS_IGDNG(dev)) {
+	if (IS_IRONLAKE(dev)) {
 		I915_WRITE(hdmi_priv->sdvox_reg, temp & ~SDVO_ENABLE);
 		POSTING_READ(hdmi_priv->sdvox_reg);
 	}
@@ -99,7 +99,7 @@
 	/* HW workaround, need to write this twice for issue that may result
 	 * in first write getting masked.
 	 */
-	if (IS_IGDNG(dev)) {
+	if (IS_IRONLAKE(dev)) {
 		I915_WRITE(hdmi_priv->sdvox_reg, temp);
 		POSTING_READ(hdmi_priv->sdvox_reg);
 	}
@@ -225,7 +225,6 @@
 	.destroy = intel_hdmi_enc_destroy,
 };
 
-
 void intel_hdmi_init(struct drm_device *dev, int sdvox_reg)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
@@ -254,21 +253,26 @@
 	if (sdvox_reg == SDVOB) {
 		intel_output->clone_mask = (1 << INTEL_HDMIB_CLONE_BIT);
 		intel_output->ddc_bus = intel_i2c_create(dev, GPIOE, "HDMIB");
+		dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
 	} else if (sdvox_reg == SDVOC) {
 		intel_output->clone_mask = (1 << INTEL_HDMIC_CLONE_BIT);
 		intel_output->ddc_bus = intel_i2c_create(dev, GPIOD, "HDMIC");
+		dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
 	} else if (sdvox_reg == HDMIB) {
 		intel_output->clone_mask = (1 << INTEL_HDMID_CLONE_BIT);
 		intel_output->ddc_bus = intel_i2c_create(dev, PCH_GPIOE,
 								"HDMIB");
+		dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
 	} else if (sdvox_reg == HDMIC) {
 		intel_output->clone_mask = (1 << INTEL_HDMIE_CLONE_BIT);
 		intel_output->ddc_bus = intel_i2c_create(dev, PCH_GPIOD,
 								"HDMIC");
+		dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
 	} else if (sdvox_reg == HDMID) {
 		intel_output->clone_mask = (1 << INTEL_HDMIF_CLONE_BIT);
 		intel_output->ddc_bus = intel_i2c_create(dev, PCH_GPIOF,
 								"HDMID");
+		dev_priv->hotplug_supported_mask |= HDMID_HOTPLUG_INT_STATUS;
 	}
 	if (!intel_output->ddc_bus)
 		goto err_connector;
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i915/intel_i2c.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i915/intel_i2c.c
@@ -39,7 +39,7 @@
 	struct drm_i915_private *dev_priv = dev->dev_private;
 
 	/* When using bit bashing for I2C, this bit needs to be set to 1 */
-	if (!IS_IGD(dev))
+	if (!IS_PINEVIEW(dev))
 		return;
 	if (enable)
 		I915_WRITE(DSPCLK_GATE_D,
@@ -118,6 +118,23 @@
 	udelay(I2C_RISEFALL_TIME); /* wait for the line to change state */
 }
 
+/* Clears the GMBUS setup.  Our driver doesn't make use of the GMBUS I2C
+ * engine, but if the BIOS leaves it enabled, then that can break our use
+ * of the bit-banging I2C interfaces.  This is notably the case with the
+ * Mac Mini in EFI mode.
+ */
+void
+intel_i2c_reset_gmbus(struct drm_device *dev)
+{
+	struct drm_i915_private *dev_priv = dev->dev_private;
+
+	if (IS_IRONLAKE(dev)) {
+		I915_WRITE(PCH_GMBUS0, 0);
+	} else {
+		I915_WRITE(GMBUS0, 0);
+	}
+}
+
 /**
  * intel_i2c_create - instantiate an Intel i2c bus using the specified GPIO reg
  * @dev: DRM device
@@ -168,6 +185,8 @@
 	if(i2c_bit_add_bus(&chan->adapter))
 		goto out_free;
 
+	intel_i2c_reset_gmbus(dev);
+
 	/* JJJ:  raise SCL and SDA? */
 	intel_i2c_quirk_set(dev, true);
 	set_data(chan, 1);
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i915/intel_bios.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i915/intel_bios.h
@@ -98,6 +98,7 @@
 #define BDB_SDVO_LVDS_PNP_IDS	 24
 #define BDB_SDVO_LVDS_POWER_SEQ	 25
 #define BDB_TV_OPTIONS		 26
+#define BDB_EDP			 27
 #define BDB_LVDS_OPTIONS	 40
 #define BDB_LVDS_LFP_DATA_PTRS	 41
 #define BDB_LVDS_LFP_DATA	 42
@@ -426,6 +427,45 @@
 	u8 custom_vbt_version;
 } __attribute__((packed));
 
+#define EDP_18BPP	0
+#define EDP_24BPP	1
+#define EDP_30BPP	2
+#define EDP_RATE_1_62	0
+#define EDP_RATE_2_7	1
+#define EDP_LANE_1	0
+#define EDP_LANE_2	1
+#define EDP_LANE_4	3
+#define EDP_PREEMPHASIS_NONE	0
+#define EDP_PREEMPHASIS_3_5dB	1
+#define EDP_PREEMPHASIS_6dB	2
+#define EDP_PREEMPHASIS_9_5dB	3
+#define EDP_VSWING_0_4V		0
+#define EDP_VSWING_0_6V		1
+#define EDP_VSWING_0_8V		2
+#define EDP_VSWING_1_2V		3
+
+struct edp_power_seq {
+	u16 t3;
+	u16 t7;
+	u16 t9;
+	u16 t10;
+	u16 t12;
+} __attribute__ ((packed));
+
+struct edp_link_params {
+	u8 rate:4;
+	u8 lanes:4;
+	u8 preemphasis:4;
+	u8 vswing:4;
+} __attribute__ ((packed));
+
+struct bdb_edp {
+	struct edp_power_seq power_seqs[16];
+	u32 color_depth;
+	u32 sdrrs_msa_timing_delay;
+	struct edp_link_params link_params[16];
+} __attribute__ ((packed));
+
 bool intel_init_bios(struct drm_device *dev);
 
 /*
@@ -549,4 +589,21 @@
 #define   SWF14_APM_STANDBY	0x1
 #define   SWF14_APM_RESTORE	0x0
 
+/* Add the device class for LFP, TV, HDMI */
+#define	 DEVICE_TYPE_INT_LFP	0x1022
+#define	 DEVICE_TYPE_INT_TV	0x1009
+#define	 DEVICE_TYPE_HDMI	0x60D2
+#define	 DEVICE_TYPE_DP		0x68C6
+#define	 DEVICE_TYPE_eDP	0x78C6
+
+/* define the DVO port for HDMI output type */
+#define		DVO_B		1
+#define		DVO_C		2
+#define		DVO_D		3
+
+/* define the PORT for DP output type */
+#define		PORT_IDPB	7
+#define		PORT_IDPC	8
+#define		PORT_IDPD	9
+
 #endif /* _I830_BIOS_H_ */
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i915/i915_gem.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i915/i915_gem.c
@@ -34,8 +34,7 @@
 #include <linux/swap.h>
 #include <linux/pci.h>
 
-#define I915_GEM_GPU_DOMAINS	(~(I915_GEM_DOMAIN_CPU | I915_GEM_DOMAIN_GTT))
-
+static uint32_t i915_gem_get_gtt_alignment(struct drm_gem_object *obj);
 static void i915_gem_object_flush_gpu_write_domain(struct drm_gem_object *obj);
 static void i915_gem_object_flush_gtt_write_domain(struct drm_gem_object *obj);
 static void i915_gem_object_flush_cpu_write_domain(struct drm_gem_object *obj);
@@ -49,8 +48,6 @@
 static int i915_gem_object_bind_to_gtt(struct drm_gem_object *obj,
 					   unsigned alignment);
 static void i915_gem_clear_fence_reg(struct drm_gem_object *obj);
-static int i915_gem_evict_something(struct drm_device *dev, int min_size);
-static int i915_gem_evict_from_inactive_list(struct drm_device *dev);
 static int i915_gem_phys_pwrite(struct drm_device *dev, struct drm_gem_object *obj,
 				struct drm_i915_gem_pwrite *args,
 				struct drm_file *file_priv);
@@ -58,6 +55,14 @@
 static LIST_HEAD(shrink_list);
 static DEFINE_SPINLOCK(shrink_list_lock);
 
+static inline bool
+i915_gem_object_is_inactive(struct drm_i915_gem_object *obj_priv)
+{
+	return obj_priv->gtt_space &&
+		!obj_priv->active &&
+		obj_priv->pin_count == 0;
+}
+
 int i915_gem_do_init(struct drm_device *dev, unsigned long start,
 		     unsigned long end)
 {
@@ -277,7 +282,7 @@
 
 	mutex_lock(&dev->struct_mutex);
 
-	ret = i915_gem_object_get_pages(obj);
+	ret = i915_gem_object_get_pages(obj, 0);
 	if (ret != 0)
 		goto fail_unlock;
 
@@ -321,40 +326,25 @@
 	return ret;
 }
 
-static inline gfp_t
-i915_gem_object_get_page_gfp_mask (struct drm_gem_object *obj)
-{
-	return mapping_gfp_mask(obj->filp->f_path.dentry->d_inode->i_mapping);
-}
-
-static inline void
-i915_gem_object_set_page_gfp_mask (struct drm_gem_object *obj, gfp_t gfp)
-{
-	mapping_set_gfp_mask(obj->filp->f_path.dentry->d_inode->i_mapping, gfp);
-}
-
 static int
 i915_gem_object_get_pages_or_evict(struct drm_gem_object *obj)
 {
 	int ret;
 
-	ret = i915_gem_object_get_pages(obj);
+	ret = i915_gem_object_get_pages(obj, __GFP_NORETRY | __GFP_NOWARN);
 
 	/* If we've insufficient memory to map in the pages, attempt
 	 * to make some space by throwing out some old buffers.
 	 */
 	if (ret == -ENOMEM) {
 		struct drm_device *dev = obj->dev;
-		gfp_t gfp;
 
-		ret = i915_gem_evict_something(dev, obj->size);
+		ret = i915_gem_evict_something(dev, obj->size,
+					       i915_gem_get_gtt_alignment(obj));
 		if (ret)
 			return ret;
 
-		gfp = i915_gem_object_get_page_gfp_mask(obj);
-		i915_gem_object_set_page_gfp_mask(obj, gfp & ~__GFP_NORETRY);
-		ret = i915_gem_object_get_pages(obj);
-		i915_gem_object_set_page_gfp_mask (obj, gfp);
+		ret = i915_gem_object_get_pages(obj, 0);
 	}
 
 	return ret;
@@ -498,14 +488,17 @@
 		return -EBADF;
 	obj_priv = obj->driver_private;
 
-	/* Bounds check source.
-	 *
-	 * XXX: This could use review for overflow issues...
-	 */
-	if (args->offset > obj->size || args->size > obj->size ||
-	    args->offset + args->size > obj->size) {
-		drm_gem_object_unreference(obj);
-		return -EINVAL;
+	/* Bounds check source.  */
+	if (args->offset > obj->size || args->size > obj->size - args->offset) {
+		ret = -EINVAL;
+		goto err;
+	}
+
+	if (!access_ok(VERIFY_WRITE,
+		       (char __user *)(uintptr_t)args->data_ptr,
+		       args->size)) {
+		ret = -EFAULT;
+		goto err;
 	}
 
 	if (i915_gem_object_needs_bit17_swizzle(obj)) {
@@ -517,8 +510,8 @@
 							file_priv);
 	}
 
+err:
 	drm_gem_object_unreference(obj);
-
 	return ret;
 }
 
@@ -608,8 +601,6 @@
 
 	user_data = (char __user *) (uintptr_t) args->data_ptr;
 	remain = args->size;
-	if (!access_ok(VERIFY_READ, user_data, remain))
-		return -EFAULT;
 
 
 	mutex_lock(&dev->struct_mutex);
@@ -790,7 +781,7 @@
 
 	mutex_lock(&dev->struct_mutex);
 
-	ret = i915_gem_object_get_pages(obj);
+	ret = i915_gem_object_get_pages(obj, 0);
 	if (ret != 0)
 		goto fail_unlock;
 
@@ -971,14 +962,17 @@
 		return -EBADF;
 	obj_priv = obj->driver_private;
 
-	/* Bounds check destination.
-	 *
-	 * XXX: This could use review for overflow issues...
-	 */
-	if (args->offset > obj->size || args->size > obj->size ||
-	    args->offset + args->size > obj->size) {
-		drm_gem_object_unreference(obj);
-		return -EINVAL;
+	/* Bounds check destination. */
+	if (args->offset > obj->size || args->size > obj->size - args->offset) {
+		ret = -EINVAL;
+		goto err;
+	}
+
+	if (!access_ok(VERIFY_READ,
+		       (char __user *)(uintptr_t)args->data_ptr,
+		       args->size)) {
+		ret = -EFAULT;
+		goto err;
 	}
 
 	/* We can only do the GTT pwrite on untiled buffers, as otherwise
@@ -1011,8 +1005,8 @@
 		DRM_INFO("pwrite failed %d\n", ret);
 #endif
 
+err:
 	drm_gem_object_unreference(obj);
-
 	return ret;
 }
 
@@ -1082,6 +1076,11 @@
 		ret = i915_gem_object_set_to_cpu_domain(obj, write_domain != 0);
 	}
 
+	
+	/* Maintain LRU order of "inactive" objects */
+	if (ret == 0 && i915_gem_object_is_inactive(obj_priv))
+		list_move_tail(&obj_priv->list, &dev_priv->mm.inactive_list);
+
 	drm_gem_object_unreference(obj);
 	mutex_unlock(&dev->struct_mutex);
 	return ret;
@@ -1217,6 +1216,9 @@
 			goto unlock;
 	}
 
+	if (i915_gem_object_is_inactive(obj_priv))
+		list_move_tail(&obj_priv->list, &dev_priv->mm.inactive_list);
+
 	pfn = ((dev->agp->base + obj_priv->gtt_offset) >> PAGE_SHIFT) +
 		page_offset;
 
@@ -1288,6 +1290,7 @@
 	list->hash.key = list->file_offset_node->start;
 	if (drm_ht_insert_item(&mm->offset_hash, &list->hash)) {
 		DRM_ERROR("failed to add to map hash\n");
+		ret = -ENOMEM;
 		goto out_free_mm;
 	}
 
@@ -1309,7 +1312,7 @@
  * i915_gem_release_mmap - remove physical page mappings
  * @obj: obj in question
  *
- * Preserve the reservation of the mmaping with the DRM core code, but
+ * Preserve the reservation of the mmapping with the DRM core code, but
  * relinquish ownership of the pages back to the system.
  *
  * It is vital that we remove the page mapping if we have mapped a tiled
@@ -1485,9 +1488,6 @@
 		obj_priv->dirty = 0;
 
 	for (i = 0; i < page_count; i++) {
-		if (obj_priv->pages[i] == NULL)
-			break;
-
 		if (obj_priv->dirty)
 			set_page_dirty(obj_priv->pages[i]);
 
@@ -1567,6 +1567,8 @@
 	else
 		list_move_tail(&obj_priv->list, &dev_priv->mm.inactive_list);
 
+	BUG_ON(!list_empty(&obj_priv->gpu_write_list));
+
 	obj_priv->last_rendering_seqno = 0;
 	if (obj_priv->active) {
 		obj_priv->active = 0;
@@ -1575,6 +1577,13 @@
 	i915_verify_inactive(dev, __FILE__, __LINE__);
 }
 
+#define PIPE_CONTROL_FLUSH(addr)					\
+	OUT_RING(GFX_OP_PIPE_CONTROL | PIPE_CONTROL_QW_WRITE |		\
+		 PIPE_CONTROL_DEPTH_STALL);				\
+	OUT_RING(addr | PIPE_CONTROL_GLOBAL_GTT);			\
+	OUT_RING(0);							\
+	OUT_RING(0);							\
+
 /**
  * Creates a new sequence number, emitting a write of it to the status page
  * plus an interrupt, which will trigger i915_user_interrupt_handler.
@@ -1583,7 +1592,7 @@
  *
  * Returned sequence numbers are nonzero on success.
  */
-static uint32_t
+uint32_t
 i915_add_request(struct drm_device *dev, struct drm_file *file_priv,
 		 uint32_t flush_domains)
 {
@@ -1609,15 +1618,49 @@
 	if (dev_priv->mm.next_gem_seqno == 0)
 		dev_priv->mm.next_gem_seqno++;
 
-	BEGIN_LP_RING(4);
-	OUT_RING(MI_STORE_DWORD_INDEX);
-	OUT_RING(I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
-	OUT_RING(seqno);
+	if (HAS_PIPE_CONTROL(dev)) {
+		u32 scratch_addr = dev_priv->seqno_gfx_addr + 128;
 
-	OUT_RING(MI_USER_INTERRUPT);
-	ADVANCE_LP_RING();
+		/*
+		 * Workaround qword write incoherence by flushing the
+		 * PIPE_NOTIFY buffers out to memory before requesting
+		 * an interrupt.
+		 */
+		BEGIN_LP_RING(32);
+		OUT_RING(GFX_OP_PIPE_CONTROL | PIPE_CONTROL_QW_WRITE |
+			 PIPE_CONTROL_WC_FLUSH | PIPE_CONTROL_TC_FLUSH);
+		OUT_RING(dev_priv->seqno_gfx_addr | PIPE_CONTROL_GLOBAL_GTT);
+		OUT_RING(seqno);
+		OUT_RING(0);
+		PIPE_CONTROL_FLUSH(scratch_addr);
+		scratch_addr += 128; /* write to separate cachelines */
+		PIPE_CONTROL_FLUSH(scratch_addr);
+		scratch_addr += 128;
+		PIPE_CONTROL_FLUSH(scratch_addr);
+		scratch_addr += 128;
+		PIPE_CONTROL_FLUSH(scratch_addr);
+		scratch_addr += 128;
+		PIPE_CONTROL_FLUSH(scratch_addr);
+		scratch_addr += 128;
+		PIPE_CONTROL_FLUSH(scratch_addr);
+		OUT_RING(GFX_OP_PIPE_CONTROL | PIPE_CONTROL_QW_WRITE |
+			 PIPE_CONTROL_WC_FLUSH | PIPE_CONTROL_TC_FLUSH |
+			 PIPE_CONTROL_NOTIFY);
+		OUT_RING(dev_priv->seqno_gfx_addr | PIPE_CONTROL_GLOBAL_GTT);
+		OUT_RING(seqno);
+		OUT_RING(0);
+		ADVANCE_LP_RING();
+	} else {
+		BEGIN_LP_RING(4);
+		OUT_RING(MI_STORE_DWORD_INDEX);
+		OUT_RING(I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
+		OUT_RING(seqno);
+
+		OUT_RING(MI_USER_INTERRUPT);
+		ADVANCE_LP_RING();
+	}
 
-	DRM_DEBUG("%d\n", seqno);
+	DRM_DEBUG_DRIVER("%d\n", seqno);
 
 	request->seqno = seqno;
 	request->emitted_jiffies = jiffies;
@@ -1637,7 +1680,8 @@
 		struct drm_i915_gem_object *obj_priv, *next;
 
 		list_for_each_entry_safe(obj_priv, next,
-					 &dev_priv->mm.flushing_list, list) {
+					 &dev_priv->mm.gpu_write_list,
+					 gpu_write_list) {
 			struct drm_gem_object *obj = obj_priv->obj;
 
 			if ((obj->write_domain & flush_domains) ==
@@ -1645,6 +1689,7 @@
 				uint32_t old_write_domain = obj->write_domain;
 
 				obj->write_domain = 0;
+				list_del_init(&obj_priv->gpu_write_list);
 				i915_gem_object_move_to_active(obj, seqno);
 
 				trace_i915_gem_object_change_domain(obj,
@@ -1758,7 +1803,10 @@
 {
 	drm_i915_private_t *dev_priv = dev->dev_private;
 
-	return READ_HWSP(dev_priv, I915_GEM_HWS_INDEX);
+	if (HAS_PIPE_CONTROL(dev))
+		return ((volatile u32 *)(dev_priv->seqno_page))[0];
+	else
+		return READ_HWSP(dev_priv, I915_GEM_HWS_INDEX);
 }
 
 /**
@@ -1814,18 +1862,21 @@
 
 	mutex_lock(&dev->struct_mutex);
 	i915_gem_retire_requests(dev);
+
+	if (!list_empty(&dev_priv->mm.gpu_write_list)) {
+		i915_gem_flush(dev, 0, I915_GEM_GPU_DOMAINS);
+		i915_add_request(dev, NULL, I915_GEM_GPU_DOMAINS);
+	}
+
 	if (!dev_priv->mm.suspended &&
 	    !list_empty(&dev_priv->mm.request_list))
 		queue_delayed_work(dev_priv->wq, &dev_priv->mm.retire_work, HZ);
+
 	mutex_unlock(&dev->struct_mutex);
 }
 
-/**
- * Waits for a sequence number to be signaled, and cleans up the
- * request and object lists appropriately for that event.
- */
-static int
-i915_wait_request(struct drm_device *dev, uint32_t seqno)
+int
+i915_do_wait_request(struct drm_device *dev, uint32_t seqno, int interruptible)
 {
 	drm_i915_private_t *dev_priv = dev->dev_private;
 	u32 ier;
@@ -1837,7 +1888,7 @@
 		return -EIO;
 
 	if (!i915_seqno_passed(i915_get_gem_seqno(dev), seqno)) {
-		if (IS_IGDNG(dev))
+		if (HAS_PCH_SPLIT(dev))
 			ier = I915_READ(DEIER) | I915_READ(GTIER);
 		else
 			ier = I915_READ(IER);
@@ -1852,10 +1903,15 @@
 
 		dev_priv->mm.waiting_gem_seqno = seqno;
 		i915_user_irq_get(dev);
-		ret = wait_event_interruptible(dev_priv->irq_queue,
-					       i915_seqno_passed(i915_get_gem_seqno(dev),
-								 seqno) ||
-					       atomic_read(&dev_priv->mm.wedged));
+		if (interruptible)
+			ret = wait_event_interruptible(dev_priv->irq_queue,
+				i915_seqno_passed(i915_get_gem_seqno(dev), seqno) ||
+				atomic_read(&dev_priv->mm.wedged));
+		else
+			wait_event(dev_priv->irq_queue,
+				i915_seqno_passed(i915_get_gem_seqno(dev), seqno) ||
+				atomic_read(&dev_priv->mm.wedged));
+
 		i915_user_irq_put(dev);
 		dev_priv->mm.waiting_gem_seqno = 0;
 
@@ -1879,7 +1935,17 @@
 	return ret;
 }
 
-static void
+/**
+ * Waits for a sequence number to be signaled, and cleans up the
+ * request and object lists appropriately for that event.
+ */
+static int
+i915_wait_request(struct drm_device *dev, uint32_t seqno)
+{
+	return i915_do_wait_request(dev, seqno, 1);
+}
+
+void
 i915_gem_flush(struct drm_device *dev,
 	       uint32_t invalidate_domains,
 	       uint32_t flush_domains)
@@ -1947,7 +2013,7 @@
 #endif
 		BEGIN_LP_RING(2);
 		OUT_RING(cmd);
-		OUT_RING(0); /* noop */
+		OUT_RING(MI_NOOP);
 		ADVANCE_LP_RING();
 	}
 }
@@ -2009,9 +2075,6 @@
 	/* blow away mappings if mapped through GTT */
 	i915_gem_release_mmap(obj);
 
-	if (obj_priv->fence_reg != I915_FENCE_REG_NONE)
-		i915_gem_clear_fence_reg(obj);
-
 	/* Move the object to the CPU domain to ensure that
 	 * any possible CPU writes while it's not in the GTT
 	 * are flushed when we go to remap it. This will
@@ -2027,6 +2090,10 @@
 
 	BUG_ON(obj_priv->active);
 
+	/* release the fence reg _after_ flushing */
+	if (obj_priv->fence_reg != I915_FENCE_REG_NONE)
+		i915_gem_clear_fence_reg(obj);
+
 	if (obj_priv->agp_mem != NULL) {
 		drm_unbind_agp(obj_priv->agp_mem);
 		drm_free_agp(obj_priv->agp_mem, obj->size / PAGE_SIZE);
@@ -2056,175 +2123,15 @@
 	return 0;
 }
 
-static struct drm_gem_object *
-i915_gem_find_inactive_object(struct drm_device *dev, int min_size)
-{
-	drm_i915_private_t *dev_priv = dev->dev_private;
-	struct drm_i915_gem_object *obj_priv;
-	struct drm_gem_object *best = NULL;
-	struct drm_gem_object *first = NULL;
-
-	/* Try to find the smallest clean object */
-	list_for_each_entry(obj_priv, &dev_priv->mm.inactive_list, list) {
-		struct drm_gem_object *obj = obj_priv->obj;
-		if (obj->size >= min_size) {
-			if ((!obj_priv->dirty ||
-			     i915_gem_object_is_purgeable(obj_priv)) &&
-			    (!best || obj->size < best->size)) {
-				best = obj;
-				if (best->size == min_size)
-					return best;
-			}
-			if (!first)
-			    first = obj;
-		}
-	}
-
-	return best ? best : first;
-}
-
-static int
-i915_gem_evict_everything(struct drm_device *dev)
-{
-	drm_i915_private_t *dev_priv = dev->dev_private;
-	uint32_t seqno;
-	int ret;
-	bool lists_empty;
-
-	spin_lock(&dev_priv->mm.active_list_lock);
-	lists_empty = (list_empty(&dev_priv->mm.inactive_list) &&
-		       list_empty(&dev_priv->mm.flushing_list) &&
-		       list_empty(&dev_priv->mm.active_list));
-	spin_unlock(&dev_priv->mm.active_list_lock);
-
-	if (lists_empty)
-		return -ENOSPC;
-
-	/* Flush everything (on to the inactive lists) and evict */
-	i915_gem_flush(dev, I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
-	seqno = i915_add_request(dev, NULL, I915_GEM_GPU_DOMAINS);
-	if (seqno == 0)
-		return -ENOMEM;
-
-	ret = i915_wait_request(dev, seqno);
-	if (ret)
-		return ret;
-
-	ret = i915_gem_evict_from_inactive_list(dev);
-	if (ret)
-		return ret;
-
-	spin_lock(&dev_priv->mm.active_list_lock);
-	lists_empty = (list_empty(&dev_priv->mm.inactive_list) &&
-		       list_empty(&dev_priv->mm.flushing_list) &&
-		       list_empty(&dev_priv->mm.active_list));
-	spin_unlock(&dev_priv->mm.active_list_lock);
-	BUG_ON(!lists_empty);
-
-	return 0;
-}
-
-static int
-i915_gem_evict_something(struct drm_device *dev, int min_size)
-{
-	drm_i915_private_t *dev_priv = dev->dev_private;
-	struct drm_gem_object *obj;
-	int ret;
-
-	for (;;) {
-		i915_gem_retire_requests(dev);
-
-		/* If there's an inactive buffer available now, grab it
-		 * and be done.
-		 */
-		obj = i915_gem_find_inactive_object(dev, min_size);
-		if (obj) {
-			struct drm_i915_gem_object *obj_priv;
-
-#if WATCH_LRU
-			DRM_INFO("%s: evicting %p\n", __func__, obj);
-#endif
-			obj_priv = obj->driver_private;
-			BUG_ON(obj_priv->pin_count != 0);
-			BUG_ON(obj_priv->active);
-
-			/* Wait on the rendering and unbind the buffer. */
-			return i915_gem_object_unbind(obj);
-		}
-
-		/* If we didn't get anything, but the ring is still processing
-		 * things, wait for the next to finish and hopefully leave us
-		 * a buffer to evict.
-		 */
-		if (!list_empty(&dev_priv->mm.request_list)) {
-			struct drm_i915_gem_request *request;
-
-			request = list_first_entry(&dev_priv->mm.request_list,
-						   struct drm_i915_gem_request,
-						   list);
-
-			ret = i915_wait_request(dev, request->seqno);
-			if (ret)
-				return ret;
-
-			continue;
-		}
-
-		/* If we didn't have anything on the request list but there
-		 * are buffers awaiting a flush, emit one and try again.
-		 * When we wait on it, those buffers waiting for that flush
-		 * will get moved to inactive.
-		 */
-		if (!list_empty(&dev_priv->mm.flushing_list)) {
-			struct drm_i915_gem_object *obj_priv;
-
-			/* Find an object that we can immediately reuse */
-			list_for_each_entry(obj_priv, &dev_priv->mm.flushing_list, list) {
-				obj = obj_priv->obj;
-				if (obj->size >= min_size)
-					break;
-
-				obj = NULL;
-			}
-
-			if (obj != NULL) {
-				uint32_t seqno;
-
-				i915_gem_flush(dev,
-					       obj->write_domain,
-					       obj->write_domain);
-				seqno = i915_add_request(dev, NULL, obj->write_domain);
-				if (seqno == 0)
-					return -ENOMEM;
-
-				ret = i915_wait_request(dev, seqno);
-				if (ret)
-					return ret;
-
-				continue;
-			}
-		}
-
-		/* If we didn't do any of the above, there's no single buffer
-		 * large enough to swap out for the new one, so just evict
-		 * everything and start again. (This should be rare.)
-		 */
-		if (!list_empty (&dev_priv->mm.inactive_list))
-			return i915_gem_evict_from_inactive_list(dev);
-		else
-			return i915_gem_evict_everything(dev);
-	}
-}
-
 int
-i915_gem_object_get_pages(struct drm_gem_object *obj)
+i915_gem_object_get_pages(struct drm_gem_object *obj,
+			  gfp_t gfpmask)
 {
 	struct drm_i915_gem_object *obj_priv = obj->driver_private;
 	int page_count, i;
 	struct address_space *mapping;
 	struct inode *inode;
 	struct page *page;
-	int ret;
 
 	if (obj_priv->pages_refcount++ != 0)
 		return 0;
@@ -2243,12 +2150,14 @@
 	inode = obj->filp->f_path.dentry->d_inode;
 	mapping = inode->i_mapping;
 	for (i = 0; i < page_count; i++) {
-		page = read_mapping_page(mapping, i, NULL);
-		if (IS_ERR(page)) {
-			ret = PTR_ERR(page);
-			i915_gem_object_put_pages(obj);
-			return ret;
-		}
+		page = read_cache_page_gfp(mapping, i,
+					   GFP_HIGHUSER |
+					   __GFP_COLD |
+					   __GFP_RECLAIMABLE |
+					   gfpmask);
+		if (IS_ERR(page))
+			goto err_pages;
+
 		obj_priv->pages[i] = page;
 	}
 
@@ -2256,6 +2165,15 @@
 		i915_gem_object_do_bit_17_swizzle(obj);
 
 	return 0;
+
+err_pages:
+	while (i--)
+		page_cache_release(obj_priv->pages[i]);
+
+	drm_free_large(obj_priv->pages);
+	obj_priv->pages = NULL;
+	obj_priv->pages_refcount--;
+	return PTR_ERR(page);
 }
 
 static void i965_write_fence_reg(struct drm_i915_fence_reg *reg)
@@ -2306,6 +2224,12 @@
 	pitch_val = obj_priv->stride / tile_width;
 	pitch_val = ffs(pitch_val) - 1;
 
+	if (obj_priv->tiling_mode == I915_TILING_Y &&
+	    HAS_128_BYTE_Y_TILING(dev))
+		WARN_ON(pitch_val > I830_FENCE_MAX_PITCH_VAL);
+	else
+		WARN_ON(pitch_val > I915_FENCE_MAX_PITCH_VAL);
+
 	val = obj_priv->gtt_offset;
 	if (obj_priv->tiling_mode == I915_TILING_Y)
 		val |= 1 << I830_FENCE_TILING_Y_SHIFT;
@@ -2566,12 +2490,9 @@
 	drm_i915_private_t *dev_priv = dev->dev_private;
 	struct drm_i915_gem_object *obj_priv = obj->driver_private;
 	struct drm_mm_node *free_space;
-	bool retry_alloc = false;
+	gfp_t gfpmask =  __GFP_NORETRY | __GFP_NOWARN;
 	int ret;
 
-	if (dev_priv->mm.suspended)
-		return -EBUSY;
-
 	if (obj_priv->madv != I915_MADV_WILLNEED) {
 		DRM_ERROR("Attempting to bind a purgeable object\n");
 		return -EINVAL;
@@ -2584,6 +2505,14 @@
 		return -EINVAL;
 	}
 
+	/* If the object is bigger than the entire aperture, reject it early
+	 * before evicting everything in a vain attempt to find space.
+	 */
+	if (obj->size > dev->gtt_total) {
+		DRM_ERROR("Attempting to bind an object larger than the aperture\n");
+		return -E2BIG;
+	}
+
  search_free:
 	free_space = drm_mm_search_free(&dev_priv->mm.gtt_space,
 					obj->size, alignment, 0);
@@ -2602,7 +2531,7 @@
 #if WATCH_LRU
 		DRM_INFO("%s: GTT full, evicting something\n", __func__);
 #endif
-		ret = i915_gem_evict_something(dev, obj->size);
+		ret = i915_gem_evict_something(dev, obj->size, alignment);
 		if (ret)
 			return ret;
 
@@ -2613,27 +2542,20 @@
 	DRM_INFO("Binding object of size %zd at 0x%08x\n",
 		 obj->size, obj_priv->gtt_offset);
 #endif
-	if (retry_alloc) {
-		i915_gem_object_set_page_gfp_mask (obj,
-						   i915_gem_object_get_page_gfp_mask (obj) & ~__GFP_NORETRY);
-	}
-	ret = i915_gem_object_get_pages(obj);
-	if (retry_alloc) {
-		i915_gem_object_set_page_gfp_mask (obj,
-						   i915_gem_object_get_page_gfp_mask (obj) | __GFP_NORETRY);
-	}
+	ret = i915_gem_object_get_pages(obj, gfpmask);
 	if (ret) {
 		drm_mm_put_block(obj_priv->gtt_space);
 		obj_priv->gtt_space = NULL;
 
 		if (ret == -ENOMEM) {
 			/* first try to clear up some space from the GTT */
-			ret = i915_gem_evict_something(dev, obj->size);
+			ret = i915_gem_evict_something(dev, obj->size,
+						       alignment);
 			if (ret) {
 				/* now try to shrink everyone else */
-				if (! retry_alloc) {
-				    retry_alloc = true;
-				    goto search_free;
+				if (gfpmask) {
+					gfpmask = 0;
+					goto search_free;
 				}
 
 				return ret;
@@ -2658,7 +2580,7 @@
 		drm_mm_put_block(obj_priv->gtt_space);
 		obj_priv->gtt_space = NULL;
 
-		ret = i915_gem_evict_something(dev, obj->size);
+		ret = i915_gem_evict_something(dev, obj->size, alignment);
 		if (ret)
 			return ret;
 
@@ -2711,7 +2633,7 @@
 	old_write_domain = obj->write_domain;
 	i915_gem_flush(dev, 0, obj->write_domain);
 	seqno = i915_add_request(dev, NULL, obj->write_domain);
-	obj->write_domain = 0;
+	BUG_ON(obj->write_domain);
 	i915_gem_object_move_to_active(obj, seqno);
 
 	trace_i915_gem_object_change_domain(obj,
@@ -2760,6 +2682,22 @@
 					    old_write_domain);
 }
 
+void
+i915_gem_object_flush_write_domain(struct drm_gem_object *obj)
+{
+	switch (obj->write_domain) {
+	case I915_GEM_DOMAIN_GTT:
+		i915_gem_object_flush_gtt_write_domain(obj);
+		break;
+	case I915_GEM_DOMAIN_CPU:
+		i915_gem_object_flush_cpu_write_domain(obj);
+		break;
+	default:
+		i915_gem_object_flush_gpu_write_domain(obj);
+		break;
+	}
+}
+
 /**
  * Moves a single object to the GTT read, and possibly write domain.
  *
@@ -2811,6 +2749,57 @@
 	return 0;
 }
 
+/*
+ * Prepare buffer for display plane. Use uninterruptible for possible flush
+ * wait, as in modesetting process we're not supposed to be interrupted.
+ */
+int
+i915_gem_object_set_to_display_plane(struct drm_gem_object *obj)
+{
+	struct drm_device *dev = obj->dev;
+	struct drm_i915_gem_object *obj_priv = obj->driver_private;
+	uint32_t old_write_domain, old_read_domains;
+	int ret;
+
+	/* Not valid to be called on unbound objects. */
+	if (obj_priv->gtt_space == NULL)
+		return -EINVAL;
+
+	i915_gem_object_flush_gpu_write_domain(obj);
+
+	/* Wait on any GPU rendering and flushing to occur. */
+	if (obj_priv->active) {
+#if WATCH_BUF
+		DRM_INFO("%s: object %p wait for seqno %08x\n",
+			  __func__, obj, obj_priv->last_rendering_seqno);
+#endif
+		ret = i915_do_wait_request(dev, obj_priv->last_rendering_seqno, 0);
+		if (ret != 0)
+			return ret;
+	}
+
+	old_write_domain = obj->write_domain;
+	old_read_domains = obj->read_domains;
+
+	obj->read_domains &= I915_GEM_DOMAIN_GTT;
+
+	i915_gem_object_flush_cpu_write_domain(obj);
+
+	/* It should now be out of any other write domains, and we can update
+	 * the domain values for our changes.
+	 */
+	BUG_ON((obj->write_domain & ~I915_GEM_DOMAIN_GTT) != 0);
+	obj->read_domains |= I915_GEM_DOMAIN_GTT;
+	obj->write_domain = I915_GEM_DOMAIN_GTT;
+	obj_priv->dirty = 1;
+
+	trace_i915_gem_object_change_domain(obj,
+					    old_read_domains,
+					    old_write_domain);
+
+	return 0;
+}
+
 /**
  * Moves a single object to the CPU read, and possibly write domain.
  *
@@ -3170,7 +3159,7 @@
 static int
 i915_gem_object_pin_and_relocate(struct drm_gem_object *obj,
 				 struct drm_file *file_priv,
-				 struct drm_i915_gem_exec_object *entry,
+				 struct drm_i915_gem_exec_object2 *entry,
 				 struct drm_i915_gem_relocation_entry *relocs)
 {
 	struct drm_device *dev = obj->dev;
@@ -3178,12 +3167,35 @@
 	struct drm_i915_gem_object *obj_priv = obj->driver_private;
 	int i, ret;
 	void __iomem *reloc_page;
+	bool need_fence;
+
+	need_fence = entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
+	             obj_priv->tiling_mode != I915_TILING_NONE;
+
+	/* Check fence reg constraints and rebind if necessary */
+	if (need_fence && !i915_obj_fenceable(dev, obj))
+		i915_gem_object_unbind(obj);
 
 	/* Choose the GTT offset for our buffer and put it there. */
 	ret = i915_gem_object_pin(obj, (uint32_t) entry->alignment);
 	if (ret)
 		return ret;
 
+	/*
+	 * Pre-965 chips need a fence register set up in order to
+	 * properly handle blits to/from tiled surfaces.
+	 */
+	if (need_fence) {
+		ret = i915_gem_object_get_fence_reg(obj);
+		if (ret != 0) {
+			if (ret != -EBUSY && ret != -ERESTARTSYS)
+				DRM_ERROR("Failure to install fence: %d\n",
+					  ret);
+			i915_gem_object_unpin(obj);
+			return ret;
+		}
+	}
+
 	entry->offset = obj_priv->gtt_offset;
 
 	/* Apply the relocations, using the GTT aperture to avoid cache
@@ -3345,7 +3357,7 @@
  */
 static int
 i915_dispatch_gem_execbuffer(struct drm_device *dev,
-			      struct drm_i915_gem_execbuffer *exec,
+			      struct drm_i915_gem_execbuffer2 *exec,
 			      struct drm_clip_rect *cliprects,
 			      uint64_t exec_offset)
 {
@@ -3435,7 +3447,7 @@
 }
 
 static int
-i915_gem_get_relocs_from_user(struct drm_i915_gem_exec_object *exec_list,
+i915_gem_get_relocs_from_user(struct drm_i915_gem_exec_object2 *exec_list,
 			      uint32_t buffer_count,
 			      struct drm_i915_gem_relocation_entry **relocs)
 {
@@ -3450,8 +3462,10 @@
 	}
 
 	*relocs = drm_calloc_large(reloc_count, sizeof(**relocs));
-	if (*relocs == NULL)
+	if (*relocs == NULL) {
+		DRM_ERROR("failed to alloc relocs, count %d\n", reloc_count);
 		return -ENOMEM;
+	}
 
 	for (i = 0; i < buffer_count; i++) {
 		struct drm_i915_gem_relocation_entry __user *user_relocs;
@@ -3475,13 +3489,16 @@
 }
 
 static int
-i915_gem_put_relocs_to_user(struct drm_i915_gem_exec_object *exec_list,
+i915_gem_put_relocs_to_user(struct drm_i915_gem_exec_object2 *exec_list,
 			    uint32_t buffer_count,
 			    struct drm_i915_gem_relocation_entry *relocs)
 {
 	uint32_t reloc_count = 0, i;
 	int ret = 0;
 
+	if (relocs == NULL)
+	    return 0;
+
 	for (i = 0; i < buffer_count; i++) {
 		struct drm_i915_gem_relocation_entry __user *user_relocs;
 		int unwritten;
@@ -3508,7 +3525,7 @@
 }
 
 static int
-i915_gem_check_execbuffer (struct drm_i915_gem_execbuffer *exec,
+i915_gem_check_execbuffer (struct drm_i915_gem_execbuffer2 *exec,
 			   uint64_t exec_offset)
 {
 	uint32_t exec_start, exec_len;
@@ -3525,22 +3542,57 @@
 	return 0;
 }
 
+static int
+i915_gem_wait_for_pending_flip(struct drm_device *dev,
+			       struct drm_gem_object **object_list,
+			       int count)
+{
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	struct drm_i915_gem_object *obj_priv;
+	DEFINE_WAIT(wait);
+	int i, ret = 0;
+
+	for (;;) {
+		prepare_to_wait(&dev_priv->pending_flip_queue,
+				&wait, TASK_INTERRUPTIBLE);
+		for (i = 0; i < count; i++) {
+			obj_priv = object_list[i]->driver_private;
+			if (atomic_read(&obj_priv->pending_flip) > 0)
+				break;
+		}
+		if (i == count)
+			break;
+
+		if (!signal_pending(current)) {
+			mutex_unlock(&dev->struct_mutex);
+			schedule();
+			mutex_lock(&dev->struct_mutex);
+			continue;
+		}
+		ret = -ERESTARTSYS;
+		break;
+	}
+	finish_wait(&dev_priv->pending_flip_queue, &wait);
+
+	return ret;
+}
+
 int
-i915_gem_execbuffer(struct drm_device *dev, void *data,
-		    struct drm_file *file_priv)
+i915_gem_do_execbuffer(struct drm_device *dev, void *data,
+		       struct drm_file *file_priv,
+		       struct drm_i915_gem_execbuffer2 *args,
+		       struct drm_i915_gem_exec_object2 *exec_list)
 {
 	drm_i915_private_t *dev_priv = dev->dev_private;
-	struct drm_i915_gem_execbuffer *args = data;
-	struct drm_i915_gem_exec_object *exec_list = NULL;
 	struct drm_gem_object **object_list = NULL;
 	struct drm_gem_object *batch_obj;
 	struct drm_i915_gem_object *obj_priv;
 	struct drm_clip_rect *cliprects = NULL;
-	struct drm_i915_gem_relocation_entry *relocs;
-	int ret, ret2, i, pinned = 0;
+	struct drm_i915_gem_relocation_entry *relocs = NULL;
+	int ret = 0, ret2, i, pinned = 0;
 	uint64_t exec_offset;
 	uint32_t seqno, flush_domains, reloc_index;
-	int pin_tries;
+	int pin_tries, flips;
 
 #if WATCH_EXEC
 	DRM_INFO("buffers_ptr %d buffer_count %d len %08x\n",
@@ -3551,31 +3603,21 @@
 		DRM_ERROR("execbuf with %d buffers\n", args->buffer_count);
 		return -EINVAL;
 	}
-	/* Copy in the exec list from userland */
-	exec_list = drm_calloc_large(sizeof(*exec_list), args->buffer_count);
-	object_list = drm_calloc_large(sizeof(*object_list), args->buffer_count);
-	if (exec_list == NULL || object_list == NULL) {
-		DRM_ERROR("Failed to allocate exec or object list "
-			  "for %d buffers\n",
+	object_list = drm_malloc_ab(sizeof(*object_list), args->buffer_count);
+	if (object_list == NULL) {
+		DRM_ERROR("Failed to allocate object list for %d buffers\n",
 			  args->buffer_count);
 		ret = -ENOMEM;
 		goto pre_mutex_err;
 	}
-	ret = copy_from_user(exec_list,
-			     (struct drm_i915_relocation_entry __user *)
-			     (uintptr_t) args->buffers_ptr,
-			     sizeof(*exec_list) * args->buffer_count);
-	if (ret != 0) {
-		DRM_ERROR("copy %d exec entries failed %d\n",
-			  args->buffer_count, ret);
-		goto pre_mutex_err;
-	}
 
 	if (args->num_cliprects != 0) {
 		cliprects = kcalloc(args->num_cliprects, sizeof(*cliprects),
 				    GFP_KERNEL);
-		if (cliprects == NULL)
+		if (cliprects == NULL) {
+			ret = -ENOMEM;
 			goto pre_mutex_err;
+		}
 
 		ret = copy_from_user(cliprects,
 				     (struct drm_clip_rect __user *)
@@ -3584,6 +3626,7 @@
 		if (ret != 0) {
 			DRM_ERROR("copy %d cliprects failed: %d\n",
 				  args->num_cliprects, ret);
+			ret = -EFAULT;
 			goto pre_mutex_err;
 		}
 	}
@@ -3598,26 +3641,27 @@
 	i915_verify_inactive(dev, __FILE__, __LINE__);
 
 	if (atomic_read(&dev_priv->mm.wedged)) {
-		DRM_ERROR("Execbuf while wedged\n");
 		mutex_unlock(&dev->struct_mutex);
 		ret = -EIO;
 		goto pre_mutex_err;
 	}
 
 	if (dev_priv->mm.suspended) {
-		DRM_ERROR("Execbuf while VT-switched.\n");
 		mutex_unlock(&dev->struct_mutex);
 		ret = -EBUSY;
 		goto pre_mutex_err;
 	}
 
 	/* Look up object handles */
+	flips = 0;
 	for (i = 0; i < args->buffer_count; i++) {
 		object_list[i] = drm_gem_object_lookup(dev, file_priv,
 						       exec_list[i].handle);
 		if (object_list[i] == NULL) {
 			DRM_ERROR("Invalid object handle %d at index %d\n",
 				   exec_list[i].handle, i);
+			/* prevent error path from reading uninitialized data */
+			args->buffer_count = i + 1;
 			ret = -EBADF;
 			goto err;
 		}
@@ -3626,10 +3670,20 @@
 		if (obj_priv->in_execbuffer) {
 			DRM_ERROR("Object %p appears more than once in object list\n",
 				   object_list[i]);
+			/* prevent error path from reading uninitialized data */
+			args->buffer_count = i + 1;
 			ret = -EBADF;
 			goto err;
 		}
 		obj_priv->in_execbuffer = true;
+		flips += atomic_read(&obj_priv->pending_flip);
+	}
+
+	if (flips > 0) {
+		ret = i915_gem_wait_for_pending_flip(dev, object_list,
+						     args->buffer_count);
+		if (ret)
+			goto err;
 	}
 
 	/* Pin and relocate */
@@ -3731,16 +3785,23 @@
 		i915_gem_flush(dev,
 			       dev->invalidate_domains,
 			       dev->flush_domains);
-		if (dev->flush_domains)
+		if (dev->flush_domains & I915_GEM_GPU_DOMAINS)
 			(void)i915_add_request(dev, file_priv,
 					       dev->flush_domains);
 	}
 
 	for (i = 0; i < args->buffer_count; i++) {
 		struct drm_gem_object *obj = object_list[i];
+		struct drm_i915_gem_object *obj_priv = obj->driver_private;
 		uint32_t old_write_domain = obj->write_domain;
 
 		obj->write_domain = obj->pending_write_domain;
+		if (obj->write_domain)
+			list_move_tail(&obj_priv->gpu_write_list,
+				       &dev_priv->mm.gpu_write_list);
+		else
+			list_del_init(&obj_priv->gpu_write_list);
+
 		trace_i915_gem_object_change_domain(obj,
 						    obj->read_domains,
 						    old_write_domain);
@@ -3814,8 +3875,101 @@
 
 	mutex_unlock(&dev->struct_mutex);
 
+pre_mutex_err:
+	/* Copy the updated relocations out regardless of current error
+	 * state.  Failure to update the relocs would mean that the next
+	 * time userland calls execbuf, it would do so with presumed offset
+	 * state that didn't match the actual object state.
+	 */
+	ret2 = i915_gem_put_relocs_to_user(exec_list, args->buffer_count,
+					   relocs);
+	if (ret2 != 0) {
+		DRM_ERROR("Failed to copy relocations back out: %d\n", ret2);
+
+		if (ret == 0)
+			ret = ret2;
+	}
+
+	drm_free_large(object_list);
+	kfree(cliprects);
+
+	return ret;
+}
+
+/*
+ * Legacy execbuffer just creates an exec2 list from the original exec object
+ * list array and passes it to the real function.
+ */
+int
+i915_gem_execbuffer(struct drm_device *dev, void *data,
+		    struct drm_file *file_priv)
+{
+	struct drm_i915_gem_execbuffer *args = data;
+	struct drm_i915_gem_execbuffer2 exec2;
+	struct drm_i915_gem_exec_object *exec_list = NULL;
+	struct drm_i915_gem_exec_object2 *exec2_list = NULL;
+	int ret, i;
+
+#if WATCH_EXEC
+	DRM_INFO("buffers_ptr %d buffer_count %d len %08x\n",
+		  (int) args->buffers_ptr, args->buffer_count, args->batch_len);
+#endif
+
+	if (args->buffer_count < 1) {
+		DRM_ERROR("execbuf with %d buffers\n", args->buffer_count);
+		return -EINVAL;
+	}
+
+	/* Copy in the exec list from userland */
+	exec_list = drm_malloc_ab(sizeof(*exec_list), args->buffer_count);
+	exec2_list = drm_malloc_ab(sizeof(*exec2_list), args->buffer_count);
+	if (exec_list == NULL || exec2_list == NULL) {
+		DRM_ERROR("Failed to allocate exec list for %d buffers\n",
+			  args->buffer_count);
+		drm_free_large(exec_list);
+		drm_free_large(exec2_list);
+		return -ENOMEM;
+	}
+	ret = copy_from_user(exec_list,
+			     (struct drm_i915_relocation_entry __user *)
+			     (uintptr_t) args->buffers_ptr,
+			     sizeof(*exec_list) * args->buffer_count);
+	if (ret != 0) {
+		DRM_ERROR("copy %d exec entries failed %d\n",
+			  args->buffer_count, ret);
+		drm_free_large(exec_list);
+		drm_free_large(exec2_list);
+		return -EFAULT;
+	}
+
+	for (i = 0; i < args->buffer_count; i++) {
+		exec2_list[i].handle = exec_list[i].handle;
+		exec2_list[i].relocation_count = exec_list[i].relocation_count;
+		exec2_list[i].relocs_ptr = exec_list[i].relocs_ptr;
+		exec2_list[i].alignment = exec_list[i].alignment;
+		exec2_list[i].offset = exec_list[i].offset;
+		if (!IS_I965G(dev))
+			exec2_list[i].flags = EXEC_OBJECT_NEEDS_FENCE;
+		else
+			exec2_list[i].flags = 0;
+	}
+
+	exec2.buffers_ptr = args->buffers_ptr;
+	exec2.buffer_count = args->buffer_count;
+	exec2.batch_start_offset = args->batch_start_offset;
+	exec2.batch_len = args->batch_len;
+	exec2.DR1 = args->DR1;
+	exec2.DR4 = args->DR4;
+	exec2.num_cliprects = args->num_cliprects;
+	exec2.cliprects_ptr = args->cliprects_ptr;
+	exec2.flags = 0;
+
+	ret = i915_gem_do_execbuffer(dev, data, file_priv, &exec2, exec2_list);
 	if (!ret) {
 		/* Copy the new buffer offsets back to the user's exec list. */
+		for (i = 0; i < args->buffer_count; i++)
+			exec_list[i].offset = exec2_list[i].offset;
+		/* ... and back out to userspace */
 		ret = copy_to_user((struct drm_i915_relocation_entry __user *)
 				   (uintptr_t) args->buffers_ptr,
 				   exec_list,
@@ -3828,25 +3982,62 @@
 		}
 	}
 
-	/* Copy the updated relocations out regardless of current error
-	 * state.  Failure to update the relocs would mean that the next
-	 * time userland calls execbuf, it would do so with presumed offset
-	 * state that didn't match the actual object state.
-	 */
-	ret2 = i915_gem_put_relocs_to_user(exec_list, args->buffer_count,
-					   relocs);
-	if (ret2 != 0) {
-		DRM_ERROR("Failed to copy relocations back out: %d\n", ret2);
+	drm_free_large(exec_list);
+	drm_free_large(exec2_list);
+	return ret;
+}
 
-		if (ret == 0)
-			ret = ret2;
+int
+i915_gem_execbuffer2(struct drm_device *dev, void *data,
+		     struct drm_file *file_priv)
+{
+	struct drm_i915_gem_execbuffer2 *args = data;
+	struct drm_i915_gem_exec_object2 *exec2_list = NULL;
+	int ret;
+
+#if WATCH_EXEC
+	DRM_INFO("buffers_ptr %d buffer_count %d len %08x\n",
+		  (int) args->buffers_ptr, args->buffer_count, args->batch_len);
+#endif
+
+	if (args->buffer_count < 1) {
+		DRM_ERROR("execbuf2 with %d buffers\n", args->buffer_count);
+		return -EINVAL;
 	}
 
-pre_mutex_err:
-	drm_free_large(object_list);
-	drm_free_large(exec_list);
-	kfree(cliprects);
+	exec2_list = drm_malloc_ab(sizeof(*exec2_list), args->buffer_count);
+	if (exec2_list == NULL) {
+		DRM_ERROR("Failed to allocate exec list for %d buffers\n",
+			  args->buffer_count);
+		return -ENOMEM;
+	}
+	ret = copy_from_user(exec2_list,
+			     (struct drm_i915_relocation_entry __user *)
+			     (uintptr_t) args->buffers_ptr,
+			     sizeof(*exec2_list) * args->buffer_count);
+	if (ret != 0) {
+		DRM_ERROR("copy %d exec entries failed %d\n",
+			  args->buffer_count, ret);
+		drm_free_large(exec2_list);
+		return -EFAULT;
+	}
+
+	ret = i915_gem_do_execbuffer(dev, data, file_priv, args, exec2_list);
+	if (!ret) {
+		/* Copy the new buffer offsets back to the user's exec list. */
+		ret = copy_to_user((struct drm_i915_relocation_entry __user *)
+				   (uintptr_t) args->buffers_ptr,
+				   exec2_list,
+				   sizeof(*exec2_list) * args->buffer_count);
+		if (ret) {
+			ret = -EFAULT;
+			DRM_ERROR("failed to copy %d exec entries "
+				  "back to user (%d)\n",
+				  args->buffer_count, ret);
+		}
+	}
 
+	drm_free_large(exec2_list);
 	return ret;
 }
 
@@ -3858,24 +4049,23 @@
 	int ret;
 
 	i915_verify_inactive(dev, __FILE__, __LINE__);
+
+	if (obj_priv->gtt_space != NULL) {
+		if (alignment == 0)
+			alignment = i915_gem_get_gtt_alignment(obj);
+		if (obj_priv->gtt_offset & (alignment - 1)) {
+			ret = i915_gem_object_unbind(obj);
+			if (ret)
+				return ret;
+		}
+	}
+
 	if (obj_priv->gtt_space == NULL) {
 		ret = i915_gem_object_bind_to_gtt(obj, alignment);
 		if (ret)
 			return ret;
 	}
-	/*
-	 * Pre-965 chips need a fence register set up in order to
-	 * properly handle tiled surfaces.
-	 */
-	if (!IS_I965G(dev) && obj_priv->tiling_mode != I915_TILING_NONE) {
-		ret = i915_gem_object_get_fence_reg(obj);
-		if (ret != 0) {
-			if (ret != -EBUSY && ret != -ERESTARTSYS)
-				DRM_ERROR("Failure to install fence: %d\n",
-					  ret);
-			return ret;
-		}
-	}
+
 	obj_priv->pin_count++;
 
 	/* If the object is not active and not pending a flush,
@@ -4133,6 +4323,7 @@
 	obj_priv->obj = obj;
 	obj_priv->fence_reg = I915_FENCE_REG_NONE;
 	INIT_LIST_HEAD(&obj_priv->list);
+	INIT_LIST_HEAD(&obj_priv->gpu_write_list);
 	INIT_LIST_HEAD(&obj_priv->fence_list);
 	obj_priv->madv = I915_MADV_WILLNEED;
 
@@ -4164,30 +4355,6 @@
 	kfree(obj->driver_private);
 }
 
-/** Unbinds all inactive objects. */
-static int
-i915_gem_evict_from_inactive_list(struct drm_device *dev)
-{
-	drm_i915_private_t *dev_priv = dev->dev_private;
-
-	while (!list_empty(&dev_priv->mm.inactive_list)) {
-		struct drm_gem_object *obj;
-		int ret;
-
-		obj = list_first_entry(&dev_priv->mm.inactive_list,
-				       struct drm_i915_gem_object,
-				       list)->obj;
-
-		ret = i915_gem_object_unbind(obj);
-		if (ret != 0) {
-			DRM_ERROR("Error unbinding object: %d\n", ret);
-			return ret;
-		}
-	}
-
-	return 0;
-}
-
 int
 i915_gem_idle(struct drm_device *dev)
 {
@@ -4301,7 +4468,7 @@
 
 
 	/* Move all inactive buffers out of the GTT. */
-	ret = i915_gem_evict_from_inactive_list(dev);
+	ret = i915_gem_evict_inactive(dev);
 	WARN_ON(!list_empty(&dev_priv->mm.inactive_list));
 	if (ret) {
 		mutex_unlock(&dev->struct_mutex);
@@ -4314,6 +4481,49 @@
 	return 0;
 }
 
+/*
+ * 965+ support PIPE_CONTROL commands, which provide finer grained control
+ * over cache flushing.
+ */
+static int
+i915_gem_init_pipe_control(struct drm_device *dev)
+{
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	struct drm_gem_object *obj;
+	struct drm_i915_gem_object *obj_priv;
+	int ret;
+
+	obj = drm_gem_object_alloc(dev, 4096);
+	if (obj == NULL) {
+		DRM_ERROR("Failed to allocate seqno page\n");
+		ret = -ENOMEM;
+		goto err;
+	}
+	obj_priv = obj->driver_private;
+	obj_priv->agp_type = AGP_USER_CACHED_MEMORY;
+
+	ret = i915_gem_object_pin(obj, 4096);
+	if (ret)
+		goto err_unref;
+
+	dev_priv->seqno_gfx_addr = obj_priv->gtt_offset;
+	dev_priv->seqno_page =  kmap(obj_priv->pages[0]);
+	if (dev_priv->seqno_page == NULL)
+		goto err_unpin;
+
+	dev_priv->seqno_obj = obj;
+	memset(dev_priv->seqno_page, 0, PAGE_SIZE);
+
+	return 0;
+
+err_unpin:
+	i915_gem_object_unpin(obj);
+err_unref:
+	drm_gem_object_unreference(obj);
+err:
+	return ret;
+}
+
 static int
 i915_gem_init_hws(struct drm_device *dev)
 {
@@ -4331,7 +4541,8 @@
 	obj = drm_gem_object_alloc(dev, 4096);
 	if (obj == NULL) {
 		DRM_ERROR("Failed to allocate status page\n");
-		return -ENOMEM;
+		ret = -ENOMEM;
+		goto err;
 	}
 	obj_priv = obj->driver_private;
 	obj_priv->agp_type = AGP_USER_CACHED_MEMORY;
@@ -4339,7 +4550,7 @@
 	ret = i915_gem_object_pin(obj, 4096);
 	if (ret != 0) {
 		drm_gem_object_unreference(obj);
-		return ret;
+		goto err_unref;
 	}
 
 	dev_priv->status_gfx_addr = obj_priv->gtt_offset;
@@ -4348,17 +4559,47 @@
 	if (dev_priv->hw_status_page == NULL) {
 		DRM_ERROR("Failed to map status page.\n");
 		memset(&dev_priv->hws_map, 0, sizeof(dev_priv->hws_map));
-		i915_gem_object_unpin(obj);
-		drm_gem_object_unreference(obj);
-		return -EINVAL;
+		ret = -EINVAL;
+		goto err_unpin;
 	}
+
+	if (HAS_PIPE_CONTROL(dev)) {
+		ret = i915_gem_init_pipe_control(dev);
+		if (ret)
+			goto err_unpin;
+	}
+
 	dev_priv->hws_obj = obj;
 	memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
 	I915_WRITE(HWS_PGA, dev_priv->status_gfx_addr);
 	I915_READ(HWS_PGA); /* posting read */
-	DRM_DEBUG("hws offset: 0x%08x\n", dev_priv->status_gfx_addr);
+	DRM_DEBUG_DRIVER("hws offset: 0x%08x\n", dev_priv->status_gfx_addr);
 
 	return 0;
+
+err_unpin:
+	i915_gem_object_unpin(obj);
+err_unref:
+	drm_gem_object_unreference(obj);
+err:
+	return 0;
+}
+
+static void
+i915_gem_cleanup_pipe_control(struct drm_device *dev)
+{
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	struct drm_gem_object *obj;
+	struct drm_i915_gem_object *obj_priv;
+
+	obj = dev_priv->seqno_obj;
+	obj_priv = obj->driver_private;
+	kunmap(obj_priv->pages[0]);
+	i915_gem_object_unpin(obj);
+	drm_gem_object_unreference(obj);
+	dev_priv->seqno_obj = NULL;
+
+	dev_priv->seqno_page = NULL;
 }
 
 static void
@@ -4382,6 +4623,9 @@
 	memset(&dev_priv->hws_map, 0, sizeof(dev_priv->hws_map));
 	dev_priv->hw_status_page = NULL;
 
+	if (HAS_PIPE_CONTROL(dev))
+		i915_gem_cleanup_pipe_control(dev);
+
 	/* Write high address into HWS_PGA when disabling. */
 	I915_WRITE(HWS_PGA, 0x1ffff000);
 }
@@ -4584,6 +4828,7 @@
 	spin_lock_init(&dev_priv->mm.active_list_lock);
 	INIT_LIST_HEAD(&dev_priv->mm.active_list);
 	INIT_LIST_HEAD(&dev_priv->mm.flushing_list);
+	INIT_LIST_HEAD(&dev_priv->mm.gpu_write_list);
 	INIT_LIST_HEAD(&dev_priv->mm.inactive_list);
 	INIT_LIST_HEAD(&dev_priv->mm.request_list);
 	INIT_LIST_HEAD(&dev_priv->mm.fence_list);
@@ -4595,6 +4840,16 @@
 	list_add(&dev_priv->mm.shrink_list, &shrink_list);
 	spin_unlock(&shrink_list_lock);
 
+	/* On GEN3 we really need to make sure the ARB C3 LP bit is set */
+	if (IS_GEN3(dev)) {
+		u32 tmp = I915_READ(MI_ARB_STATE);
+		if (!(tmp & MI_ARB_C3_LP_WRITE_ENABLE)) {
+			/* arb state is a masked write, so set bit + bit in mask */
+			tmp = MI_ARB_C3_LP_WRITE_ENABLE | (MI_ARB_C3_LP_WRITE_ENABLE << MI_ARB_MASK_SHIFT);
+			I915_WRITE(MI_ARB_STATE, tmp);
+		}
+	}
+
 	/* Old X drivers will take 0-2 for front, back, depth buffers */
 	dev_priv->fence_reg_start = 3;
 
@@ -4614,8 +4869,8 @@
 			for (i = 0; i < 8; i++)
 				I915_WRITE(FENCE_REG_945_8 + (i * 4), 0);
 	}
-
 	i915_gem_detect_bit_6_swizzle(dev);
+	init_waitqueue_head(&dev_priv->pending_flip_queue);
 }
 
 /*
@@ -4638,7 +4893,7 @@
 
 	phys_obj->id = id;
 
-	phys_obj->handle = drm_pci_alloc(dev, size, 0, 0xffffffff);
+	phys_obj->handle = drm_pci_alloc(dev, size, 0);
 	if (!phys_obj->handle) {
 		ret = -ENOMEM;
 		goto kfree_obj;
@@ -4696,7 +4951,7 @@
 	if (!obj_priv->phys_obj)
 		return;
 
-	ret = i915_gem_object_get_pages(obj);
+	ret = i915_gem_object_get_pages(obj, 0);
 	if (ret)
 		goto out;
 
@@ -4754,7 +5009,7 @@
 	obj_priv->phys_obj = dev_priv->mm.phys_objs[id - 1];
 	obj_priv->phys_obj->cur_obj = obj;
 
-	ret = i915_gem_object_get_pages(obj);
+	ret = i915_gem_object_get_pages(obj, 0);
 	if (ret) {
 		DRM_ERROR("failed to get page list\n");
 		goto out;
@@ -4790,7 +5045,7 @@
 	user_data = (char __user *) (uintptr_t) args->data_ptr;
 	obj_addr = obj_priv->phys_obj->handle->vaddr + args->offset;
 
-	DRM_DEBUG("obj_addr %p, %lld\n", obj_addr, args->size);
+	DRM_DEBUG_DRIVER("obj_addr %p, %lld\n", obj_addr, args->size);
 	ret = copy_from_user(obj_addr, user_data, args->size);
 	if (ret)
 		return -EFAULT;
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i915/intel_drv.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i915/intel_drv.h
@@ -110,17 +110,49 @@
 	int clone_mask;
 };
 
+struct intel_crtc;
+struct intel_overlay {
+	struct drm_device *dev;
+	struct intel_crtc *crtc;
+	struct drm_i915_gem_object *vid_bo;
+	struct drm_i915_gem_object *old_vid_bo;
+	int active;
+	int pfit_active;
+	u32 pfit_vscale_ratio; /* shifted-point number, (1<<12) == 1.0 */
+	u32 color_key;
+	u32 brightness, contrast, saturation;
+	u32 old_xscale, old_yscale;
+	/* register access */
+	u32 flip_addr;
+	struct drm_i915_gem_object *reg_bo;
+	void *virt_addr;
+	/* flip handling */
+	uint32_t last_flip_req;
+	int hw_wedged;
+#define HW_WEDGED		1
+#define NEEDS_WAIT_FOR_FLIP	2
+#define RELEASE_OLD_VID		3
+#define SWITCH_OFF_STAGE_1	4
+#define SWITCH_OFF_STAGE_2	5
+};
+
 struct intel_crtc {
 	struct drm_crtc base;
 	enum pipe pipe;
 	enum plane plane;
-	struct drm_gem_object *cursor_bo;
-	uint32_t cursor_addr;
 	u8 lut_r[256], lut_g[256], lut_b[256];
 	int dpms_mode;
 	bool busy; /* is scanout buffer being updated frequently? */
 	struct timer_list idle_timer;
 	bool lowfreq_avail;
+	struct intel_overlay *overlay;
+	struct intel_unpin_work *unpin_work;
+
+	struct drm_gem_object *cursor_bo;
+	uint32_t cursor_addr;
+	int16_t cursor_x, cursor_y;
+	int16_t cursor_width, cursor_height;
+	bool cursor_visble;
 };
 
 #define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
@@ -134,6 +166,8 @@
 int intel_ddc_get_modes(struct intel_output *intel_output);
 extern bool intel_ddc_probe(struct intel_output *intel_output);
 void intel_i2c_quirk_set(struct drm_device *dev, bool enable);
+void intel_i2c_reset_gmbus(struct drm_device *dev);
+
 extern void intel_crt_init(struct drm_device *dev);
 extern void intel_hdmi_init(struct drm_device *dev, int sdvox_reg);
 extern bool intel_sdvo_init(struct drm_device *dev, int output_device);
@@ -148,6 +182,7 @@
 extern void intel_edp_link_config (struct intel_output *, int *, int *);
 
 
+extern int intel_panel_fitter_pipe (struct drm_device *dev);
 extern void intel_crtc_load_lut(struct drm_crtc *crtc);
 extern void intel_encoder_prepare (struct drm_encoder *encoder);
 extern void intel_encoder_commit (struct drm_encoder *encoder);
@@ -177,10 +212,24 @@
 				    u16 blue, int regno);
 extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
 				    u16 *blue, int regno);
+extern void intel_init_clock_gating(struct drm_device *dev);
 
 extern int intel_framebuffer_create(struct drm_device *dev,
 				    struct drm_mode_fb_cmd *mode_cmd,
 				    struct drm_framebuffer **fb,
 				    struct drm_gem_object *obj);
 
+extern void intel_prepare_page_flip(struct drm_device *dev, int plane);
+extern void intel_finish_page_flip(struct drm_device *dev, int pipe);
+extern void intel_finish_page_flip_plane(struct drm_device *dev, int plane);
+
+extern void intel_setup_overlay(struct drm_device *dev);
+extern void intel_cleanup_overlay(struct drm_device *dev);
+extern int intel_overlay_switch_off(struct intel_overlay *overlay);
+extern int intel_overlay_recover_from_interrupt(struct intel_overlay *overlay,
+						int interruptible);
+extern int intel_overlay_put_image(struct drm_device *dev, void *data,
+				   struct drm_file *file_priv);
+extern int intel_overlay_attrs(struct drm_device *dev, void *data,
+			       struct drm_file *file_priv);
 #endif /* __INTEL_DRV_H__ */
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i915/i915_suspend.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i915/i915_suspend.c
@@ -27,14 +27,14 @@
 #include "drmP.h"
 #include "drm.h"
 #include "i915_drm.h"
-#include "i915_drv.h"
+#include "intel_drv.h"
 
 static bool i915_pipe_enabled(struct drm_device *dev, enum pipe pipe)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	u32	dpll_reg;
 
-	if (IS_IGDNG(dev)) {
+	if (IS_IRONLAKE(dev)) {
 		dpll_reg = (pipe == PIPE_A) ? PCH_DPLL_A: PCH_DPLL_B;
 	} else {
 		dpll_reg = (pipe == PIPE_A) ? DPLL_A: DPLL_B;
@@ -53,7 +53,7 @@
 	if (!i915_pipe_enabled(dev, pipe))
 		return;
 
-	if (IS_IGDNG(dev))
+	if (IS_IRONLAKE(dev))
 		reg = (pipe == PIPE_A) ? LGC_PALETTE_A : LGC_PALETTE_B;
 
 	if (pipe == PIPE_A)
@@ -75,7 +75,7 @@
 	if (!i915_pipe_enabled(dev, pipe))
 		return;
 
-	if (IS_IGDNG(dev))
+	if (IS_IRONLAKE(dev))
 		reg = (pipe == PIPE_A) ? LGC_PALETTE_A : LGC_PALETTE_B;
 
 	if (pipe == PIPE_A)
@@ -239,7 +239,7 @@
 	if (drm_core_check_feature(dev, DRIVER_MODESET))
 		return;
 
-	if (IS_IGDNG(dev)) {
+	if (IS_IRONLAKE(dev)) {
 		dev_priv->savePCH_DREF_CONTROL = I915_READ(PCH_DREF_CONTROL);
 		dev_priv->saveDISP_ARB_CTL = I915_READ(DISP_ARB_CTL);
 	}
@@ -247,7 +247,7 @@
 	/* Pipe & plane A info */
 	dev_priv->savePIPEACONF = I915_READ(PIPEACONF);
 	dev_priv->savePIPEASRC = I915_READ(PIPEASRC);
-	if (IS_IGDNG(dev)) {
+	if (IS_IRONLAKE(dev)) {
 		dev_priv->saveFPA0 = I915_READ(PCH_FPA0);
 		dev_priv->saveFPA1 = I915_READ(PCH_FPA1);
 		dev_priv->saveDPLL_A = I915_READ(PCH_DPLL_A);
@@ -256,7 +256,7 @@
 		dev_priv->saveFPA1 = I915_READ(FPA1);
 		dev_priv->saveDPLL_A = I915_READ(DPLL_A);
 	}
-	if (IS_I965G(dev) && !IS_IGDNG(dev))
+	if (IS_I965G(dev) && !IS_IRONLAKE(dev))
 		dev_priv->saveDPLL_A_MD = I915_READ(DPLL_A_MD);
 	dev_priv->saveHTOTAL_A = I915_READ(HTOTAL_A);
 	dev_priv->saveHBLANK_A = I915_READ(HBLANK_A);
@@ -264,10 +264,10 @@
 	dev_priv->saveVTOTAL_A = I915_READ(VTOTAL_A);
 	dev_priv->saveVBLANK_A = I915_READ(VBLANK_A);
 	dev_priv->saveVSYNC_A = I915_READ(VSYNC_A);
-	if (!IS_IGDNG(dev))
+	if (!IS_IRONLAKE(dev))
 		dev_priv->saveBCLRPAT_A = I915_READ(BCLRPAT_A);
 
-	if (IS_IGDNG(dev)) {
+	if (IS_IRONLAKE(dev)) {
 		dev_priv->savePIPEA_DATA_M1 = I915_READ(PIPEA_DATA_M1);
 		dev_priv->savePIPEA_DATA_N1 = I915_READ(PIPEA_DATA_N1);
 		dev_priv->savePIPEA_LINK_M1 = I915_READ(PIPEA_LINK_M1);
@@ -304,7 +304,7 @@
 	/* Pipe & plane B info */
 	dev_priv->savePIPEBCONF = I915_READ(PIPEBCONF);
 	dev_priv->savePIPEBSRC = I915_READ(PIPEBSRC);
-	if (IS_IGDNG(dev)) {
+	if (IS_IRONLAKE(dev)) {
 		dev_priv->saveFPB0 = I915_READ(PCH_FPB0);
 		dev_priv->saveFPB1 = I915_READ(PCH_FPB1);
 		dev_priv->saveDPLL_B = I915_READ(PCH_DPLL_B);
@@ -313,7 +313,7 @@
 		dev_priv->saveFPB1 = I915_READ(FPB1);
 		dev_priv->saveDPLL_B = I915_READ(DPLL_B);
 	}
-	if (IS_I965G(dev) && !IS_IGDNG(dev))
+	if (IS_I965G(dev) && !IS_IRONLAKE(dev))
 		dev_priv->saveDPLL_B_MD = I915_READ(DPLL_B_MD);
 	dev_priv->saveHTOTAL_B = I915_READ(HTOTAL_B);
 	dev_priv->saveHBLANK_B = I915_READ(HBLANK_B);
@@ -321,10 +321,10 @@
 	dev_priv->saveVTOTAL_B = I915_READ(VTOTAL_B);
 	dev_priv->saveVBLANK_B = I915_READ(VBLANK_B);
 	dev_priv->saveVSYNC_B = I915_READ(VSYNC_B);
-	if (!IS_IGDNG(dev))
+	if (!IS_IRONLAKE(dev))
 		dev_priv->saveBCLRPAT_B = I915_READ(BCLRPAT_B);
 
-	if (IS_IGDNG(dev)) {
+	if (IS_IRONLAKE(dev)) {
 		dev_priv->savePIPEB_DATA_M1 = I915_READ(PIPEB_DATA_M1);
 		dev_priv->savePIPEB_DATA_N1 = I915_READ(PIPEB_DATA_N1);
 		dev_priv->savePIPEB_LINK_M1 = I915_READ(PIPEB_LINK_M1);
@@ -369,7 +369,7 @@
 	if (drm_core_check_feature(dev, DRIVER_MODESET))
 		return;
 
-	if (IS_IGDNG(dev)) {
+	if (IS_IRONLAKE(dev)) {
 		dpll_a_reg = PCH_DPLL_A;
 		dpll_b_reg = PCH_DPLL_B;
 		fpa0_reg = PCH_FPA0;
@@ -385,7 +385,7 @@
 		fpb1_reg = FPB1;
 	}
 
-	if (IS_IGDNG(dev)) {
+	if (IS_IRONLAKE(dev)) {
 		I915_WRITE(PCH_DREF_CONTROL, dev_priv->savePCH_DREF_CONTROL);
 		I915_WRITE(DISP_ARB_CTL, dev_priv->saveDISP_ARB_CTL);
 	}
@@ -402,7 +402,7 @@
 	/* Actually enable it */
 	I915_WRITE(dpll_a_reg, dev_priv->saveDPLL_A);
 	DRM_UDELAY(150);
-	if (IS_I965G(dev) && !IS_IGDNG(dev))
+	if (IS_I965G(dev) && !IS_IRONLAKE(dev))
 		I915_WRITE(DPLL_A_MD, dev_priv->saveDPLL_A_MD);
 	DRM_UDELAY(150);
 
@@ -413,10 +413,10 @@
 	I915_WRITE(VTOTAL_A, dev_priv->saveVTOTAL_A);
 	I915_WRITE(VBLANK_A, dev_priv->saveVBLANK_A);
 	I915_WRITE(VSYNC_A, dev_priv->saveVSYNC_A);
-	if (!IS_IGDNG(dev))
+	if (!IS_IRONLAKE(dev))
 		I915_WRITE(BCLRPAT_A, dev_priv->saveBCLRPAT_A);
 
-	if (IS_IGDNG(dev)) {
+	if (IS_IRONLAKE(dev)) {
 		I915_WRITE(PIPEA_DATA_M1, dev_priv->savePIPEA_DATA_M1);
 		I915_WRITE(PIPEA_DATA_N1, dev_priv->savePIPEA_DATA_N1);
 		I915_WRITE(PIPEA_LINK_M1, dev_priv->savePIPEA_LINK_M1);
@@ -467,7 +467,7 @@
 	/* Actually enable it */
 	I915_WRITE(dpll_b_reg, dev_priv->saveDPLL_B);
 	DRM_UDELAY(150);
-	if (IS_I965G(dev) && !IS_IGDNG(dev))
+	if (IS_I965G(dev) && !IS_IRONLAKE(dev))
 		I915_WRITE(DPLL_B_MD, dev_priv->saveDPLL_B_MD);
 	DRM_UDELAY(150);
 
@@ -478,10 +478,10 @@
 	I915_WRITE(VTOTAL_B, dev_priv->saveVTOTAL_B);
 	I915_WRITE(VBLANK_B, dev_priv->saveVBLANK_B);
 	I915_WRITE(VSYNC_B, dev_priv->saveVSYNC_B);
-	if (!IS_IGDNG(dev))
+	if (!IS_IRONLAKE(dev))
 		I915_WRITE(BCLRPAT_B, dev_priv->saveBCLRPAT_B);
 
-	if (IS_IGDNG(dev)) {
+	if (IS_IRONLAKE(dev)) {
 		I915_WRITE(PIPEB_DATA_M1, dev_priv->savePIPEB_DATA_M1);
 		I915_WRITE(PIPEB_DATA_N1, dev_priv->savePIPEB_DATA_N1);
 		I915_WRITE(PIPEB_LINK_M1, dev_priv->savePIPEB_LINK_M1);
@@ -546,14 +546,14 @@
 		dev_priv->saveCURSIZE = I915_READ(CURSIZE);
 
 	/* CRT state */
-	if (IS_IGDNG(dev)) {
+	if (IS_IRONLAKE(dev)) {
 		dev_priv->saveADPA = I915_READ(PCH_ADPA);
 	} else {
 		dev_priv->saveADPA = I915_READ(ADPA);
 	}
 
 	/* LVDS state */
-	if (IS_IGDNG(dev)) {
+	if (IS_IRONLAKE(dev)) {
 		dev_priv->savePP_CONTROL = I915_READ(PCH_PP_CONTROL);
 		dev_priv->saveBLC_PWM_CTL = I915_READ(BLC_PWM_PCH_CTL1);
 		dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_PCH_CTL2);
@@ -571,10 +571,10 @@
 			dev_priv->saveLVDS = I915_READ(LVDS);
 	}
 
-	if (!IS_I830(dev) && !IS_845G(dev) && !IS_IGDNG(dev))
+	if (!IS_I830(dev) && !IS_845G(dev) && !IS_IRONLAKE(dev))
 		dev_priv->savePFIT_CONTROL = I915_READ(PFIT_CONTROL);
 
-	if (IS_IGDNG(dev)) {
+	if (IS_IRONLAKE(dev)) {
 		dev_priv->savePP_ON_DELAYS = I915_READ(PCH_PP_ON_DELAYS);
 		dev_priv->savePP_OFF_DELAYS = I915_READ(PCH_PP_OFF_DELAYS);
 		dev_priv->savePP_DIVISOR = I915_READ(PCH_PP_DIVISOR);
@@ -614,7 +614,7 @@
 	dev_priv->saveVGA0 = I915_READ(VGA0);
 	dev_priv->saveVGA1 = I915_READ(VGA1);
 	dev_priv->saveVGA_PD = I915_READ(VGA_PD);
-	if (IS_IGDNG(dev))
+	if (IS_IRONLAKE(dev))
 		dev_priv->saveVGACNTRL = I915_READ(CPU_VGACNTRL);
 	else
 		dev_priv->saveVGACNTRL = I915_READ(VGACNTRL);
@@ -656,24 +656,24 @@
 		I915_WRITE(CURSIZE, dev_priv->saveCURSIZE);
 
 	/* CRT state */
-	if (IS_IGDNG(dev))
+	if (IS_IRONLAKE(dev))
 		I915_WRITE(PCH_ADPA, dev_priv->saveADPA);
 	else
 		I915_WRITE(ADPA, dev_priv->saveADPA);
 
 	/* LVDS state */
-	if (IS_I965G(dev) && !IS_IGDNG(dev))
+	if (IS_I965G(dev) && !IS_IRONLAKE(dev))
 		I915_WRITE(BLC_PWM_CTL2, dev_priv->saveBLC_PWM_CTL2);
 
-	if (IS_IGDNG(dev)) {
+	if (IS_IRONLAKE(dev)) {
 		I915_WRITE(PCH_LVDS, dev_priv->saveLVDS);
 	} else if (IS_MOBILE(dev) && !IS_I830(dev))
 		I915_WRITE(LVDS, dev_priv->saveLVDS);
 
-	if (!IS_I830(dev) && !IS_845G(dev) && !IS_IGDNG(dev))
+	if (!IS_I830(dev) && !IS_845G(dev) && !IS_IRONLAKE(dev))
 		I915_WRITE(PFIT_CONTROL, dev_priv->savePFIT_CONTROL);
 
-	if (IS_IGDNG(dev)) {
+	if (IS_IRONLAKE(dev)) {
 		I915_WRITE(BLC_PWM_PCH_CTL1, dev_priv->saveBLC_PWM_CTL);
 		I915_WRITE(BLC_PWM_PCH_CTL2, dev_priv->saveBLC_PWM_CTL2);
 		I915_WRITE(BLC_PWM_CPU_CTL, dev_priv->saveBLC_CPU_PWM_CTL);
@@ -713,7 +713,7 @@
 	}
 
 	/* VGA state */
-	if (IS_IGDNG(dev))
+	if (IS_IRONLAKE(dev))
 		I915_WRITE(CPU_VGACNTRL, dev_priv->saveVGACNTRL);
 	else
 		I915_WRITE(VGACNTRL, dev_priv->saveVGACNTRL);
@@ -732,17 +732,13 @@
 
 	pci_read_config_byte(dev->pdev, LBB, &dev_priv->saveLBB);
 
-	/* Render Standby */
-	if (IS_I965G(dev) && IS_MOBILE(dev))
-		dev_priv->saveRENDERSTANDBY = I915_READ(MCHBAR_RENDER_STANDBY);
-
 	/* Hardware status page */
 	dev_priv->saveHWS = I915_READ(HWS_PGA);
 
 	i915_save_display(dev);
 
 	/* Interrupt state */
-	if (IS_IGDNG(dev)) {
+	if (IS_IRONLAKE(dev)) {
 		dev_priv->saveDEIER = I915_READ(DEIER);
 		dev_priv->saveDEIMR = I915_READ(DEIMR);
 		dev_priv->saveGTIER = I915_READ(GTIER);
@@ -754,10 +750,6 @@
 		dev_priv->saveIMR = I915_READ(IMR);
 	}
 
-	/* Clock gating state */
-	dev_priv->saveD_STATE = I915_READ(D_STATE);
-	dev_priv->saveDSPCLK_GATE_D = I915_READ(DSPCLK_GATE_D); /* Not sure about this */
-
 	/* Cache mode state */
 	dev_priv->saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0);
 
@@ -795,10 +787,6 @@
 
 	pci_write_config_byte(dev->pdev, LBB, dev_priv->saveLBB);
 
-	/* Render Standby */
-	if (IS_I965G(dev) && IS_MOBILE(dev))
-		I915_WRITE(MCHBAR_RENDER_STANDBY, dev_priv->saveRENDERSTANDBY);
-
 	/* Hardware status page */
 	I915_WRITE(HWS_PGA, dev_priv->saveHWS);
 
@@ -817,7 +805,7 @@
 	i915_restore_display(dev);
 
 	/* Interrupt state */
-	if (IS_IGDNG(dev)) {
+	if (IS_IRONLAKE(dev)) {
 		I915_WRITE(DEIER, dev_priv->saveDEIER);
 		I915_WRITE(DEIMR, dev_priv->saveDEIMR);
 		I915_WRITE(GTIER, dev_priv->saveGTIER);
@@ -830,8 +818,7 @@
 	}
 
 	/* Clock gating state */
-	I915_WRITE (D_STATE, dev_priv->saveD_STATE);
-	I915_WRITE (DSPCLK_GATE_D, dev_priv->saveDSPCLK_GATE_D);
+	intel_init_clock_gating(dev);
 
 	/* Cache mode state */
 	I915_WRITE (CACHE_MODE_0, dev_priv->saveCACHE_MODE_0 | 0xffff0000);
@@ -846,6 +833,9 @@
 	for (i = 0; i < 3; i++)
 		I915_WRITE(SWF30 + (i << 2), dev_priv->saveSWF2[i]);
 
+	/* I2C state */
+	intel_i2c_reset_gmbus(dev);
+
 	return 0;
 }
 
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i915/Makefile
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i915/Makefile
@@ -8,6 +8,7 @@
           i915_suspend.o \
 	  i915_gem.o \
 	  i915_gem_debug.o \
+	  i915_gem_evict.o \
 	  i915_gem_tiling.o \
 	  i915_trace_points.o \
 	  intel_display.o \
@@ -15,7 +16,6 @@
 	  intel_lvds.o \
 	  intel_bios.o \
 	  intel_dp.o \
-	  intel_dp_i2c.o \
 	  intel_hdmi.o \
 	  intel_sdvo.o \
 	  intel_modes.o \
@@ -23,6 +23,7 @@
 	  intel_fb.o \
 	  intel_tv.o \
 	  intel_dvo.o \
+	  intel_overlay.o \
 	  dvo_ch7xxx.o \
 	  dvo_ch7017.o \
 	  dvo_ivch.o \
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i915/dvo_sil164.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i915/dvo_sil164.c
@@ -105,7 +105,7 @@
 	};
 
 	if (!sil->quiet) {
-		DRM_DEBUG("Unable to read register 0x%02x from %s:%02x.\n",
+		DRM_DEBUG_KMS("Unable to read register 0x%02x from %s:%02x.\n",
 			  addr, i2cbus->adapter.name, dvo->slave_addr);
 	}
 	return false;
@@ -131,7 +131,7 @@
 		return true;
 
 	if (!sil->quiet) {
-		DRM_DEBUG("Unable to write register 0x%02x to %s:%d.\n",
+		DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n",
 			  addr, i2cbus->adapter.name, dvo->slave_addr);
 	}
 
@@ -158,7 +158,7 @@
 		goto out;
 
 	if (ch != (SIL164_VID & 0xff)) {
-		DRM_DEBUG("sil164 not detected got %d: from %s Slave %d.\n",
+		DRM_DEBUG_KMS("sil164 not detected got %d: from %s Slave %d.\n",
 			  ch, adapter->name, dvo->slave_addr);
 		goto out;
 	}
@@ -167,13 +167,13 @@
 		goto out;
 
 	if (ch != (SIL164_DID & 0xff)) {
-		DRM_DEBUG("sil164 not detected got %d: from %s Slave %d.\n",
+		DRM_DEBUG_KMS("sil164 not detected got %d: from %s Slave %d.\n",
 			  ch, adapter->name, dvo->slave_addr);
 		goto out;
 	}
 	sil->quiet = false;
 
-	DRM_DEBUG("init sil164 dvo controller successfully!\n");
+	DRM_DEBUG_KMS("init sil164 dvo controller successfully!\n");
 	return true;
 
 out:
@@ -241,15 +241,15 @@
 	uint8_t val;
 
 	sil164_readb(dvo, SIL164_FREQ_LO, &val);
-	DRM_DEBUG("SIL164_FREQ_LO: 0x%02x\n", val);
+	DRM_LOG_KMS("SIL164_FREQ_LO: 0x%02x\n", val);
 	sil164_readb(dvo, SIL164_FREQ_HI, &val);
-	DRM_DEBUG("SIL164_FREQ_HI: 0x%02x\n", val);
+	DRM_LOG_KMS("SIL164_FREQ_HI: 0x%02x\n", val);
 	sil164_readb(dvo, SIL164_REG8, &val);
-	DRM_DEBUG("SIL164_REG8: 0x%02x\n", val);
+	DRM_LOG_KMS("SIL164_REG8: 0x%02x\n", val);
 	sil164_readb(dvo, SIL164_REG9, &val);
-	DRM_DEBUG("SIL164_REG9: 0x%02x\n", val);
+	DRM_LOG_KMS("SIL164_REG9: 0x%02x\n", val);
 	sil164_readb(dvo, SIL164_REGC, &val);
-	DRM_DEBUG("SIL164_REGC: 0x%02x\n", val);
+	DRM_LOG_KMS("SIL164_REGC: 0x%02x\n", val);
 }
 
 static void sil164_save(struct intel_dvo_device *dvo)
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i915/dvo_ch7xxx.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i915/dvo_ch7xxx.c
@@ -152,7 +152,7 @@
 	};
 
 	if (!ch7xxx->quiet) {
-		DRM_DEBUG("Unable to read register 0x%02x from %s:%02x.\n",
+		DRM_DEBUG_KMS("Unable to read register 0x%02x from %s:%02x.\n",
 			  addr, i2cbus->adapter.name, dvo->slave_addr);
 	}
 	return false;
@@ -179,7 +179,7 @@
 		return true;
 
 	if (!ch7xxx->quiet) {
-		DRM_DEBUG("Unable to write register 0x%02x to %s:%d.\n",
+		DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n",
 			  addr, i2cbus->adapter.name, dvo->slave_addr);
 	}
 
@@ -207,7 +207,8 @@
 
 	name = ch7xxx_get_id(vendor);
 	if (!name) {
-		DRM_DEBUG("ch7xxx not detected; got 0x%02x from %s slave %d.\n",
+		DRM_DEBUG_KMS("ch7xxx not detected; got 0x%02x from %s "
+				"slave %d.\n",
 			  vendor, adapter->name, dvo->slave_addr);
 		goto out;
 	}
@@ -217,13 +218,14 @@
 		goto out;
 
 	if (device != CH7xxx_DID) {
-		DRM_DEBUG("ch7xxx not detected; got 0x%02x from %s slave %d.\n",
+		DRM_DEBUG_KMS("ch7xxx not detected; got 0x%02x from %s "
+				"slave %d.\n",
 			  vendor, adapter->name, dvo->slave_addr);
 		goto out;
 	}
 
 	ch7xxx->quiet = false;
-	DRM_DEBUG("Detected %s chipset, vendor/device ID 0x%02x/0x%02x\n",
+	DRM_DEBUG_KMS("Detected %s chipset, vendor/device ID 0x%02x/0x%02x\n",
 		  name, vendor, device);
 	return true;
 out:
@@ -315,8 +317,8 @@
 
 	for (i = 0; i < CH7xxx_NUM_REGS; i++) {
 		if ((i % 8) == 0 )
-			DRM_DEBUG("\n %02X: ", i);
-		DRM_DEBUG("%02X ", ch7xxx->mode_reg.regs[i]);
+			DRM_LOG_KMS("\n %02X: ", i);
+		DRM_LOG_KMS("%02X ", ch7xxx->mode_reg.regs[i]);
 	}
 }
 
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i915/intel_overlay.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i915/intel_overlay.c
@@ -0,0 +1,1432 @@
+/*
+ * Copyright © 2009
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Authors:
+ *    Daniel Vetter <daniel@ffwll.ch>
+ *
+ * Derived from Xorg ddx, xf86-video-intel, src/i830_video.c
+ */
+#include "drmP.h"
+#include "drm.h"
+#include "i915_drm.h"
+#include "i915_drv.h"
+#include "i915_reg.h"
+#include "intel_drv.h"
+
+/* Limits for overlay size. According to intel doc, the real limits are:
+ * Y width: 4095, UV width (planar): 2047, Y height: 2047,
+ * UV width (planar): * 1023. But the xorg thinks 2048 for height and width. Use
+ * the mininum of both.  */
+#define IMAGE_MAX_WIDTH		2048
+#define IMAGE_MAX_HEIGHT	2046 /* 2 * 1023 */
+/* on 830 and 845 these large limits result in the card hanging */
+#define IMAGE_MAX_WIDTH_LEGACY	1024
+#define IMAGE_MAX_HEIGHT_LEGACY	1088
+
+/* overlay register definitions */
+/* OCMD register */
+#define OCMD_TILED_SURFACE	(0x1<<19)
+#define OCMD_MIRROR_MASK	(0x3<<17)
+#define OCMD_MIRROR_MODE	(0x3<<17)
+#define OCMD_MIRROR_HORIZONTAL	(0x1<<17)
+#define OCMD_MIRROR_VERTICAL	(0x2<<17)
+#define OCMD_MIRROR_BOTH	(0x3<<17)
+#define OCMD_BYTEORDER_MASK	(0x3<<14) /* zero for YUYV or FOURCC YUY2 */
+#define OCMD_UV_SWAP		(0x1<<14) /* YVYU */
+#define OCMD_Y_SWAP		(0x2<<14) /* UYVY or FOURCC UYVY */
+#define OCMD_Y_AND_UV_SWAP	(0x3<<14) /* VYUY */
+#define OCMD_SOURCE_FORMAT_MASK (0xf<<10)
+#define OCMD_RGB_888		(0x1<<10) /* not in i965 Intel docs */
+#define OCMD_RGB_555		(0x2<<10) /* not in i965 Intel docs */
+#define OCMD_RGB_565		(0x3<<10) /* not in i965 Intel docs */
+#define OCMD_YUV_422_PACKED	(0x8<<10)
+#define OCMD_YUV_411_PACKED	(0x9<<10) /* not in i965 Intel docs */
+#define OCMD_YUV_420_PLANAR	(0xc<<10)
+#define OCMD_YUV_422_PLANAR	(0xd<<10)
+#define OCMD_YUV_410_PLANAR	(0xe<<10) /* also 411 */
+#define OCMD_TVSYNCFLIP_PARITY	(0x1<<9)
+#define OCMD_TVSYNCFLIP_ENABLE	(0x1<<7)
+#define OCMD_BUF_TYPE_MASK	(Ox1<<5)
+#define OCMD_BUF_TYPE_FRAME	(0x0<<5)
+#define OCMD_BUF_TYPE_FIELD	(0x1<<5)
+#define OCMD_TEST_MODE		(0x1<<4)
+#define OCMD_BUFFER_SELECT	(0x3<<2)
+#define OCMD_BUFFER0		(0x0<<2)
+#define OCMD_BUFFER1		(0x1<<2)
+#define OCMD_FIELD_SELECT	(0x1<<2)
+#define OCMD_FIELD0		(0x0<<1)
+#define OCMD_FIELD1		(0x1<<1)
+#define OCMD_ENABLE		(0x1<<0)
+
+/* OCONFIG register */
+#define OCONF_PIPE_MASK		(0x1<<18)
+#define OCONF_PIPE_A		(0x0<<18)
+#define OCONF_PIPE_B		(0x1<<18)
+#define OCONF_GAMMA2_ENABLE	(0x1<<16)
+#define OCONF_CSC_MODE_BT601	(0x0<<5)
+#define OCONF_CSC_MODE_BT709	(0x1<<5)
+#define OCONF_CSC_BYPASS	(0x1<<4)
+#define OCONF_CC_OUT_8BIT	(0x1<<3)
+#define OCONF_TEST_MODE		(0x1<<2)
+#define OCONF_THREE_LINE_BUFFER	(0x1<<0)
+#define OCONF_TWO_LINE_BUFFER	(0x0<<0)
+
+/* DCLRKM (dst-key) register */
+#define DST_KEY_ENABLE		(0x1<<31)
+#define CLK_RGB24_MASK		0x0
+#define CLK_RGB16_MASK		0x070307
+#define CLK_RGB15_MASK		0x070707
+#define CLK_RGB8I_MASK		0xffffff
+
+#define RGB16_TO_COLORKEY(c) \
+	(((c & 0xF800) << 8) | ((c & 0x07E0) << 5) | ((c & 0x001F) << 3))
+#define RGB15_TO_COLORKEY(c) \
+	(((c & 0x7c00) << 9) | ((c & 0x03E0) << 6) | ((c & 0x001F) << 3))
+
+/* overlay flip addr flag */
+#define OFC_UPDATE		0x1
+
+/* polyphase filter coefficients */
+#define N_HORIZ_Y_TAPS          5
+#define N_VERT_Y_TAPS           3
+#define N_HORIZ_UV_TAPS         3
+#define N_VERT_UV_TAPS          3
+#define N_PHASES                17
+#define MAX_TAPS                5
+
+/* memory bufferd overlay registers */
+struct overlay_registers {
+    u32 OBUF_0Y;
+    u32 OBUF_1Y;
+    u32 OBUF_0U;
+    u32 OBUF_0V;
+    u32 OBUF_1U;
+    u32 OBUF_1V;
+    u32 OSTRIDE;
+    u32 YRGB_VPH;
+    u32 UV_VPH;
+    u32 HORZ_PH;
+    u32 INIT_PHS;
+    u32 DWINPOS;
+    u32 DWINSZ;
+    u32 SWIDTH;
+    u32 SWIDTHSW;
+    u32 SHEIGHT;
+    u32 YRGBSCALE;
+    u32 UVSCALE;
+    u32 OCLRC0;
+    u32 OCLRC1;
+    u32 DCLRKV;
+    u32 DCLRKM;
+    u32 SCLRKVH;
+    u32 SCLRKVL;
+    u32 SCLRKEN;
+    u32 OCONFIG;
+    u32 OCMD;
+    u32 RESERVED1; /* 0x6C */
+    u32 OSTART_0Y;
+    u32 OSTART_1Y;
+    u32 OSTART_0U;
+    u32 OSTART_0V;
+    u32 OSTART_1U;
+    u32 OSTART_1V;
+    u32 OTILEOFF_0Y;
+    u32 OTILEOFF_1Y;
+    u32 OTILEOFF_0U;
+    u32 OTILEOFF_0V;
+    u32 OTILEOFF_1U;
+    u32 OTILEOFF_1V;
+    u32 FASTHSCALE; /* 0xA0 */
+    u32 UVSCALEV; /* 0xA4 */
+    u32 RESERVEDC[(0x200 - 0xA8) / 4]; /* 0xA8 - 0x1FC */
+    u16 Y_VCOEFS[N_VERT_Y_TAPS * N_PHASES]; /* 0x200 */
+    u16 RESERVEDD[0x100 / 2 - N_VERT_Y_TAPS * N_PHASES];
+    u16 Y_HCOEFS[N_HORIZ_Y_TAPS * N_PHASES]; /* 0x300 */
+    u16 RESERVEDE[0x200 / 2 - N_HORIZ_Y_TAPS * N_PHASES];
+    u16 UV_VCOEFS[N_VERT_UV_TAPS * N_PHASES]; /* 0x500 */
+    u16 RESERVEDF[0x100 / 2 - N_VERT_UV_TAPS * N_PHASES];
+    u16 UV_HCOEFS[N_HORIZ_UV_TAPS * N_PHASES]; /* 0x600 */
+    u16 RESERVEDG[0x100 / 2 - N_HORIZ_UV_TAPS * N_PHASES];
+};
+
+/* overlay flip addr flag */
+#define OFC_UPDATE		0x1
+
+#define OVERLAY_NONPHYSICAL(dev) (IS_G33(dev) || IS_I965G(dev))
+#define OVERLAY_EXISTS(dev) (!IS_G4X(dev) && !IS_IRONLAKE(dev) && !IS_GEN6(dev))
+
+
+static struct overlay_registers *intel_overlay_map_regs_atomic(struct intel_overlay *overlay)
+{
+        drm_i915_private_t *dev_priv = overlay->dev->dev_private;
+	struct overlay_registers *regs;
+
+	/* no recursive mappings */
+	BUG_ON(overlay->virt_addr);
+
+	if (OVERLAY_NONPHYSICAL(overlay->dev)) {
+		regs = io_mapping_map_atomic_wc(dev_priv->mm.gtt_mapping,
+				overlay->reg_bo->gtt_offset);
+
+		if (!regs) {
+			DRM_ERROR("failed to map overlay regs in GTT\n");
+			return NULL;
+		}
+	} else
+		regs = overlay->reg_bo->phys_obj->handle->vaddr;
+
+	return overlay->virt_addr = regs;
+}
+
+static void intel_overlay_unmap_regs_atomic(struct intel_overlay *overlay)
+{
+	struct drm_device *dev = overlay->dev;
+        drm_i915_private_t *dev_priv = dev->dev_private;
+
+	if (OVERLAY_NONPHYSICAL(overlay->dev))
+		io_mapping_unmap_atomic(overlay->virt_addr);
+
+	overlay->virt_addr = NULL;
+
+	I915_READ(OVADD); /* flush wc cashes */
+
+	return;
+}
+
+/* overlay needs to be disable in OCMD reg */
+static int intel_overlay_on(struct intel_overlay *overlay)
+{
+	struct drm_device *dev = overlay->dev;
+        drm_i915_private_t *dev_priv = dev->dev_private;
+	int ret;
+	RING_LOCALS;
+
+	BUG_ON(overlay->active);
+
+	overlay->active = 1;
+	overlay->hw_wedged = NEEDS_WAIT_FOR_FLIP;
+
+	BEGIN_LP_RING(6);
+	OUT_RING(MI_FLUSH);
+	OUT_RING(MI_NOOP);
+	OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_ON);
+	OUT_RING(overlay->flip_addr | OFC_UPDATE);
+	OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
+	OUT_RING(MI_NOOP);
+	ADVANCE_LP_RING();
+
+	overlay->last_flip_req = i915_add_request(dev, NULL, 0);
+	if (overlay->last_flip_req == 0)
+		return -ENOMEM;
+
+	ret = i915_do_wait_request(dev, overlay->last_flip_req, 1);
+	if (ret != 0)
+		return ret;
+
+	overlay->hw_wedged = 0;
+	overlay->last_flip_req = 0;
+	return 0;
+}
+
+/* overlay needs to be enabled in OCMD reg */
+static void intel_overlay_continue(struct intel_overlay *overlay,
+			    bool load_polyphase_filter)
+{
+	struct drm_device *dev = overlay->dev;
+        drm_i915_private_t *dev_priv = dev->dev_private;
+	u32 flip_addr = overlay->flip_addr;
+	u32 tmp;
+	RING_LOCALS;
+
+	BUG_ON(!overlay->active);
+
+	if (load_polyphase_filter)
+		flip_addr |= OFC_UPDATE;
+
+	/* check for underruns */
+	tmp = I915_READ(DOVSTA);
+	if (tmp & (1 << 17))
+		DRM_DEBUG("overlay underrun, DOVSTA: %x\n", tmp);
+
+	BEGIN_LP_RING(4);
+	OUT_RING(MI_FLUSH);
+	OUT_RING(MI_NOOP);
+	OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_CONTINUE);
+	OUT_RING(flip_addr);
+        ADVANCE_LP_RING();
+
+	overlay->last_flip_req = i915_add_request(dev, NULL, 0);
+}
+
+static int intel_overlay_wait_flip(struct intel_overlay *overlay)
+{
+	struct drm_device *dev = overlay->dev;
+        drm_i915_private_t *dev_priv = dev->dev_private;
+	int ret;
+	u32 tmp;
+	RING_LOCALS;
+
+	if (overlay->last_flip_req != 0) {
+		ret = i915_do_wait_request(dev, overlay->last_flip_req, 1);
+		if (ret == 0) {
+			overlay->last_flip_req = 0;
+
+			tmp = I915_READ(ISR);
+
+			if (!(tmp & I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT))
+				return 0;
+		}
+	}
+
+	/* synchronous slowpath */
+	overlay->hw_wedged = RELEASE_OLD_VID;
+
+	BEGIN_LP_RING(2);
+        OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
+        OUT_RING(MI_NOOP);
+        ADVANCE_LP_RING();
+
+	overlay->last_flip_req = i915_add_request(dev, NULL, 0);
+	if (overlay->last_flip_req == 0)
+		return -ENOMEM;
+
+	ret = i915_do_wait_request(dev, overlay->last_flip_req, 1);
+	if (ret != 0)
+		return ret;
+
+	overlay->hw_wedged = 0;
+	overlay->last_flip_req = 0;
+	return 0;
+}
+
+/* overlay needs to be disabled in OCMD reg */
+static int intel_overlay_off(struct intel_overlay *overlay)
+{
+	u32 flip_addr = overlay->flip_addr;
+	struct drm_device *dev = overlay->dev;
+        drm_i915_private_t *dev_priv = dev->dev_private;
+	int ret;
+	RING_LOCALS;
+
+	BUG_ON(!overlay->active);
+
+	/* According to intel docs the overlay hw may hang (when switching
+	 * off) without loading the filter coeffs. It is however unclear whether
+	 * this applies to the disabling of the overlay or to the switching off
+	 * of the hw. Do it in both cases */
+	flip_addr |= OFC_UPDATE;
+
+	/* wait for overlay to go idle */
+	overlay->hw_wedged = SWITCH_OFF_STAGE_1;
+
+	BEGIN_LP_RING(6);
+	OUT_RING(MI_FLUSH);
+	OUT_RING(MI_NOOP);
+	OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_CONTINUE);
+	OUT_RING(flip_addr);
+        OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
+        OUT_RING(MI_NOOP);
+        ADVANCE_LP_RING();
+
+	overlay->last_flip_req = i915_add_request(dev, NULL, 0);
+	if (overlay->last_flip_req == 0)
+		return -ENOMEM;
+
+	ret = i915_do_wait_request(dev, overlay->last_flip_req, 1);
+	if (ret != 0)
+		return ret;
+
+	/* turn overlay off */
+	overlay->hw_wedged = SWITCH_OFF_STAGE_2;
+
+	BEGIN_LP_RING(6);
+        OUT_RING(MI_FLUSH);
+        OUT_RING(MI_NOOP);
+        OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_OFF);
+	OUT_RING(flip_addr);
+        OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
+        OUT_RING(MI_NOOP);
+	ADVANCE_LP_RING();
+
+	overlay->last_flip_req = i915_add_request(dev, NULL, 0);
+	if (overlay->last_flip_req == 0)
+		return -ENOMEM;
+
+	ret = i915_do_wait_request(dev, overlay->last_flip_req, 1);
+	if (ret != 0)
+		return ret;
+
+	overlay->hw_wedged = 0;
+	overlay->last_flip_req = 0;
+	return ret;
+}
+
+static void intel_overlay_off_tail(struct intel_overlay *overlay)
+{
+	struct drm_gem_object *obj;
+
+	/* never have the overlay hw on without showing a frame */
+	BUG_ON(!overlay->vid_bo);
+	obj = overlay->vid_bo->obj;
+
+	i915_gem_object_unpin(obj);
+	drm_gem_object_unreference(obj);
+	overlay->vid_bo = NULL;
+
+	overlay->crtc->overlay = NULL;
+	overlay->crtc = NULL;
+	overlay->active = 0;
+}
+
+/* recover from an interruption due to a signal
+ * We have to be careful not to repeat work forever an make forward progess. */
+int intel_overlay_recover_from_interrupt(struct intel_overlay *overlay,
+					 int interruptible)
+{
+	struct drm_device *dev = overlay->dev;
+        drm_i915_private_t *dev_priv = dev->dev_private;
+	struct drm_gem_object *obj;
+	u32 flip_addr;
+	int ret;
+	RING_LOCALS;
+
+	if (overlay->hw_wedged == HW_WEDGED)
+		return -EIO;
+
+	if (overlay->last_flip_req == 0) {
+		overlay->last_flip_req = i915_add_request(dev, NULL, 0);
+		if (overlay->last_flip_req == 0)
+			return -ENOMEM;
+	}
+
+	ret = i915_do_wait_request(dev, overlay->last_flip_req, interruptible);
+	if (ret != 0)
+		return ret;
+
+	switch (overlay->hw_wedged) {
+		case RELEASE_OLD_VID:
+			obj = overlay->old_vid_bo->obj;
+			i915_gem_object_unpin(obj);
+			drm_gem_object_unreference(obj);
+			overlay->old_vid_bo = NULL;
+			break;
+		case SWITCH_OFF_STAGE_1:
+			flip_addr = overlay->flip_addr;
+			flip_addr |= OFC_UPDATE;
+
+			overlay->hw_wedged = SWITCH_OFF_STAGE_2;
+
+			BEGIN_LP_RING(6);
+			OUT_RING(MI_FLUSH);
+			OUT_RING(MI_NOOP);
+			OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_OFF);
+			OUT_RING(flip_addr);
+			OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
+			OUT_RING(MI_NOOP);
+			ADVANCE_LP_RING();
+
+			overlay->last_flip_req = i915_add_request(dev, NULL, 0);
+			if (overlay->last_flip_req == 0)
+				return -ENOMEM;
+
+			ret = i915_do_wait_request(dev, overlay->last_flip_req,
+					interruptible);
+			if (ret != 0)
+				return ret;
+
+		case SWITCH_OFF_STAGE_2:
+			intel_overlay_off_tail(overlay);
+			break;
+		default:
+			BUG_ON(overlay->hw_wedged != NEEDS_WAIT_FOR_FLIP);
+	}
+
+	overlay->hw_wedged = 0;
+	overlay->last_flip_req = 0;
+	return 0;
+}
+
+/* Wait for pending overlay flip and release old frame.
+ * Needs to be called before the overlay register are changed
+ * via intel_overlay_(un)map_regs_atomic */
+static int intel_overlay_release_old_vid(struct intel_overlay *overlay)
+{
+	int ret;
+	struct drm_gem_object *obj;
+
+	/* only wait if there is actually an old frame to release to
+	 * guarantee forward progress */
+	if (!overlay->old_vid_bo)
+		return 0;
+
+	ret = intel_overlay_wait_flip(overlay);
+	if (ret != 0)
+		return ret;
+
+	obj = overlay->old_vid_bo->obj;
+	i915_gem_object_unpin(obj);
+	drm_gem_object_unreference(obj);
+	overlay->old_vid_bo = NULL;
+
+	return 0;
+}
+
+struct put_image_params {
+	int format;
+	short dst_x;
+	short dst_y;
+	short dst_w;
+	short dst_h;
+	short src_w;
+	short src_scan_h;
+	short src_scan_w;
+	short src_h;
+	short stride_Y;
+	short stride_UV;
+	int offset_Y;
+	int offset_U;
+	int offset_V;
+};
+
+static int packed_depth_bytes(u32 format)
+{
+	switch (format & I915_OVERLAY_DEPTH_MASK) {
+		case I915_OVERLAY_YUV422:
+			return 4;
+		case I915_OVERLAY_YUV411:
+			/* return 6; not implemented */
+		default:
+			return -EINVAL;
+	}
+}
+
+static int packed_width_bytes(u32 format, short width)
+{
+	switch (format & I915_OVERLAY_DEPTH_MASK) {
+		case I915_OVERLAY_YUV422:
+			return width << 1;
+		default:
+			return -EINVAL;
+	}
+}
+
+static int uv_hsubsampling(u32 format)
+{
+	switch (format & I915_OVERLAY_DEPTH_MASK) {
+		case I915_OVERLAY_YUV422:
+		case I915_OVERLAY_YUV420:
+			return 2;
+		case I915_OVERLAY_YUV411:
+		case I915_OVERLAY_YUV410:
+			return 4;
+		default:
+			return -EINVAL;
+	}
+}
+
+static int uv_vsubsampling(u32 format)
+{
+	switch (format & I915_OVERLAY_DEPTH_MASK) {
+		case I915_OVERLAY_YUV420:
+		case I915_OVERLAY_YUV410:
+			return 2;
+		case I915_OVERLAY_YUV422:
+		case I915_OVERLAY_YUV411:
+			return 1;
+		default:
+			return -EINVAL;
+	}
+}
+
+static u32 calc_swidthsw(struct drm_device *dev, u32 offset, u32 width)
+{
+	u32 mask, shift, ret;
+	if (IS_I9XX(dev)) {
+		mask = 0x3f;
+		shift = 6;
+	} else {
+		mask = 0x1f;
+		shift = 5;
+	}
+	ret = ((offset + width + mask) >> shift) - (offset >> shift);
+	if (IS_I9XX(dev))
+		ret <<= 1;
+	ret -=1;
+	return ret << 2;
+}
+
+static const u16 y_static_hcoeffs[N_HORIZ_Y_TAPS * N_PHASES] = {
+	0x3000, 0xb4a0, 0x1930, 0x1920, 0xb4a0,
+	0x3000, 0xb500, 0x19d0, 0x1880, 0xb440,
+	0x3000, 0xb540, 0x1a88, 0x2f80, 0xb3e0,
+	0x3000, 0xb580, 0x1b30, 0x2e20, 0xb380,
+	0x3000, 0xb5c0, 0x1bd8, 0x2cc0, 0xb320,
+	0x3020, 0xb5e0, 0x1c60, 0x2b80, 0xb2c0,
+	0x3020, 0xb5e0, 0x1cf8, 0x2a20, 0xb260,
+	0x3020, 0xb5e0, 0x1d80, 0x28e0, 0xb200,
+	0x3020, 0xb5c0, 0x1e08, 0x3f40, 0xb1c0,
+	0x3020, 0xb580, 0x1e78, 0x3ce0, 0xb160,
+	0x3040, 0xb520, 0x1ed8, 0x3aa0, 0xb120,
+	0x3040, 0xb4a0, 0x1f30, 0x3880, 0xb0e0,
+	0x3040, 0xb400, 0x1f78, 0x3680, 0xb0a0,
+	0x3020, 0xb340, 0x1fb8, 0x34a0, 0xb060,
+	0x3020, 0xb240, 0x1fe0, 0x32e0, 0xb040,
+	0x3020, 0xb140, 0x1ff8, 0x3160, 0xb020,
+	0xb000, 0x3000, 0x0800, 0x3000, 0xb000};
+static const u16 uv_static_hcoeffs[N_HORIZ_UV_TAPS * N_PHASES] = {
+	0x3000, 0x1800, 0x1800, 0xb000, 0x18d0, 0x2e60,
+	0xb000, 0x1990, 0x2ce0, 0xb020, 0x1a68, 0x2b40,
+	0xb040, 0x1b20, 0x29e0, 0xb060, 0x1bd8, 0x2880,
+	0xb080, 0x1c88, 0x3e60, 0xb0a0, 0x1d28, 0x3c00,
+	0xb0c0, 0x1db8, 0x39e0, 0xb0e0, 0x1e40, 0x37e0,
+	0xb100, 0x1eb8, 0x3620, 0xb100, 0x1f18, 0x34a0,
+	0xb100, 0x1f68, 0x3360, 0xb0e0, 0x1fa8, 0x3240,
+	0xb0c0, 0x1fe0, 0x3140, 0xb060, 0x1ff0, 0x30a0,
+	0x3000, 0x0800, 0x3000};
+
+static void update_polyphase_filter(struct overlay_registers *regs)
+{
+	memcpy(regs->Y_HCOEFS, y_static_hcoeffs, sizeof(y_static_hcoeffs));
+	memcpy(regs->UV_HCOEFS, uv_static_hcoeffs, sizeof(uv_static_hcoeffs));
+}
+
+static bool update_scaling_factors(struct intel_overlay *overlay,
+				   struct overlay_registers *regs,
+				   struct put_image_params *params)
+{
+	/* fixed point with a 12 bit shift */
+	u32 xscale, yscale, xscale_UV, yscale_UV;
+#define FP_SHIFT 12
+#define FRACT_MASK 0xfff
+	bool scale_changed = false;
+	int uv_hscale = uv_hsubsampling(params->format);
+	int uv_vscale = uv_vsubsampling(params->format);
+
+	if (params->dst_w > 1)
+		xscale = ((params->src_scan_w - 1) << FP_SHIFT)
+			/(params->dst_w);
+	else
+		xscale = 1 << FP_SHIFT;
+
+	if (params->dst_h > 1)
+		yscale = ((params->src_scan_h - 1) << FP_SHIFT)
+			/(params->dst_h);
+	else
+		yscale = 1 << FP_SHIFT;
+
+	/*if (params->format & I915_OVERLAY_YUV_PLANAR) {*/
+		xscale_UV = xscale/uv_hscale;
+		yscale_UV = yscale/uv_vscale;
+		/* make the Y scale to UV scale ratio an exact multiply */
+		xscale = xscale_UV * uv_hscale;
+		yscale = yscale_UV * uv_vscale;
+	/*} else {
+		xscale_UV = 0;
+		yscale_UV = 0;
+	}*/
+
+	if (xscale != overlay->old_xscale || yscale != overlay->old_yscale)
+		scale_changed = true;
+	overlay->old_xscale = xscale;
+	overlay->old_yscale = yscale;
+
+	regs->YRGBSCALE = ((yscale & FRACT_MASK) << 20)
+		| ((xscale >> FP_SHIFT) << 16)
+		| ((xscale & FRACT_MASK) << 3);
+	regs->UVSCALE = ((yscale_UV & FRACT_MASK) << 20)
+		| ((xscale_UV >> FP_SHIFT) << 16)
+		| ((xscale_UV & FRACT_MASK) << 3);
+	regs->UVSCALEV = ((yscale >> FP_SHIFT) << 16)
+		| ((yscale_UV >> FP_SHIFT) << 0);
+
+	if (scale_changed)
+		update_polyphase_filter(regs);
+
+	return scale_changed;
+}
+
+static void update_colorkey(struct intel_overlay *overlay,
+			    struct overlay_registers *regs)
+{
+	u32 key = overlay->color_key;
+	switch (overlay->crtc->base.fb->bits_per_pixel) {
+		case 8:
+			regs->DCLRKV = 0;
+			regs->DCLRKM = CLK_RGB8I_MASK | DST_KEY_ENABLE;
+		case 16:
+			if (overlay->crtc->base.fb->depth == 15) {
+				regs->DCLRKV = RGB15_TO_COLORKEY(key);
+				regs->DCLRKM = CLK_RGB15_MASK | DST_KEY_ENABLE;
+			} else {
+				regs->DCLRKV = RGB16_TO_COLORKEY(key);
+				regs->DCLRKM = CLK_RGB16_MASK | DST_KEY_ENABLE;
+			}
+		case 24:
+		case 32:
+			regs->DCLRKV = key;
+			regs->DCLRKM = CLK_RGB24_MASK | DST_KEY_ENABLE;
+	}
+}
+
+static u32 overlay_cmd_reg(struct put_image_params *params)
+{
+	u32 cmd = OCMD_ENABLE | OCMD_BUF_TYPE_FRAME | OCMD_BUFFER0;
+
+	if (params->format & I915_OVERLAY_YUV_PLANAR) {
+		switch (params->format & I915_OVERLAY_DEPTH_MASK) {
+			case I915_OVERLAY_YUV422:
+				cmd |= OCMD_YUV_422_PLANAR;
+				break;
+			case I915_OVERLAY_YUV420:
+				cmd |= OCMD_YUV_420_PLANAR;
+				break;
+			case I915_OVERLAY_YUV411:
+			case I915_OVERLAY_YUV410:
+				cmd |= OCMD_YUV_410_PLANAR;
+				break;
+		}
+	} else { /* YUV packed */
+		switch (params->format & I915_OVERLAY_DEPTH_MASK) {
+			case I915_OVERLAY_YUV422:
+				cmd |= OCMD_YUV_422_PACKED;
+				break;
+			case I915_OVERLAY_YUV411:
+				cmd |= OCMD_YUV_411_PACKED;
+				break;
+		}
+
+		switch (params->format & I915_OVERLAY_SWAP_MASK) {
+			case I915_OVERLAY_NO_SWAP:
+				break;
+			case I915_OVERLAY_UV_SWAP:
+				cmd |= OCMD_UV_SWAP;
+				break;
+			case I915_OVERLAY_Y_SWAP:
+				cmd |= OCMD_Y_SWAP;
+				break;
+			case I915_OVERLAY_Y_AND_UV_SWAP:
+				cmd |= OCMD_Y_AND_UV_SWAP;
+				break;
+		}
+	}
+
+	return cmd;
+}
+
+int intel_overlay_do_put_image(struct intel_overlay *overlay,
+			       struct drm_gem_object *new_bo,
+			       struct put_image_params *params)
+{
+	int ret, tmp_width;
+	struct overlay_registers *regs;
+	bool scale_changed = false;
+	struct drm_i915_gem_object *bo_priv = new_bo->driver_private;
+	struct drm_device *dev = overlay->dev;
+
+	BUG_ON(!mutex_is_locked(&dev->struct_mutex));
+	BUG_ON(!mutex_is_locked(&dev->mode_config.mutex));
+	BUG_ON(!overlay);
+
+	ret = intel_overlay_release_old_vid(overlay);
+	if (ret != 0)
+		return ret;
+
+	ret = i915_gem_object_pin(new_bo, PAGE_SIZE);
+	if (ret != 0)
+		return ret;
+
+	ret = i915_gem_object_set_to_gtt_domain(new_bo, 0);
+	if (ret != 0)
+		goto out_unpin;
+
+	if (!overlay->active) {
+		regs = intel_overlay_map_regs_atomic(overlay);
+		if (!regs) {
+			ret = -ENOMEM;
+			goto out_unpin;
+		}
+		regs->OCONFIG = OCONF_CC_OUT_8BIT;
+		if (IS_I965GM(overlay->dev))
+			regs->OCONFIG |= OCONF_CSC_MODE_BT709;
+		regs->OCONFIG |= overlay->crtc->pipe == 0 ?
+			OCONF_PIPE_A : OCONF_PIPE_B;
+		intel_overlay_unmap_regs_atomic(overlay);
+
+		ret = intel_overlay_on(overlay);
+		if (ret != 0)
+			goto out_unpin;
+	}
+
+	regs = intel_overlay_map_regs_atomic(overlay);
+	if (!regs) {
+		ret = -ENOMEM;
+		goto out_unpin;
+	}
+
+	regs->DWINPOS = (params->dst_y << 16) | params->dst_x;
+	regs->DWINSZ = (params->dst_h << 16) | params->dst_w;
+
+	if (params->format & I915_OVERLAY_YUV_PACKED)
+		tmp_width = packed_width_bytes(params->format, params->src_w);
+	else
+		tmp_width = params->src_w;
+
+	regs->SWIDTH = params->src_w;
+	regs->SWIDTHSW = calc_swidthsw(overlay->dev,
+			params->offset_Y, tmp_width);
+	regs->SHEIGHT = params->src_h;
+	regs->OBUF_0Y = bo_priv->gtt_offset + params-> offset_Y;
+	regs->OSTRIDE = params->stride_Y;
+
+	if (params->format & I915_OVERLAY_YUV_PLANAR) {
+		int uv_hscale = uv_hsubsampling(params->format);
+		int uv_vscale = uv_vsubsampling(params->format);
+		u32 tmp_U, tmp_V;
+		regs->SWIDTH |= (params->src_w/uv_hscale) << 16;
+		tmp_U = calc_swidthsw(overlay->dev, params->offset_U,
+				params->src_w/uv_hscale);
+		tmp_V = calc_swidthsw(overlay->dev, params->offset_V,
+				params->src_w/uv_hscale);
+		regs->SWIDTHSW |= max_t(u32, tmp_U, tmp_V) << 16;
+		regs->SHEIGHT |= (params->src_h/uv_vscale) << 16;
+		regs->OBUF_0U = bo_priv->gtt_offset + params->offset_U;
+		regs->OBUF_0V = bo_priv->gtt_offset + params->offset_V;
+		regs->OSTRIDE |= params->stride_UV << 16;
+	}
+
+	scale_changed = update_scaling_factors(overlay, regs, params);
+
+	update_colorkey(overlay, regs);
+
+	regs->OCMD = overlay_cmd_reg(params);
+
+	intel_overlay_unmap_regs_atomic(overlay);
+
+	intel_overlay_continue(overlay, scale_changed);
+
+	overlay->old_vid_bo = overlay->vid_bo;
+	overlay->vid_bo = new_bo->driver_private;
+
+	return 0;
+
+out_unpin:
+	i915_gem_object_unpin(new_bo);
+	return ret;
+}
+
+int intel_overlay_switch_off(struct intel_overlay *overlay)
+{
+	int ret;
+	struct overlay_registers *regs;
+	struct drm_device *dev = overlay->dev;
+
+	BUG_ON(!mutex_is_locked(&dev->struct_mutex));
+	BUG_ON(!mutex_is_locked(&dev->mode_config.mutex));
+
+	if (overlay->hw_wedged) {
+		ret = intel_overlay_recover_from_interrupt(overlay, 1);
+		if (ret != 0)
+			return ret;
+	}
+
+	if (!overlay->active)
+		return 0;
+
+	ret = intel_overlay_release_old_vid(overlay);
+	if (ret != 0)
+		return ret;
+
+	regs = intel_overlay_map_regs_atomic(overlay);
+	regs->OCMD = 0;
+	intel_overlay_unmap_regs_atomic(overlay);
+
+	ret = intel_overlay_off(overlay);
+	if (ret != 0)
+		return ret;
+
+	intel_overlay_off_tail(overlay);
+
+	return 0;
+}
+
+static int check_overlay_possible_on_crtc(struct intel_overlay *overlay,
+					  struct intel_crtc *crtc)
+{
+        drm_i915_private_t *dev_priv = overlay->dev->dev_private;
+	u32 pipeconf;
+	int pipeconf_reg = (crtc->pipe == 0) ? PIPEACONF : PIPEBCONF;
+
+	if (!crtc->base.enabled || crtc->dpms_mode != DRM_MODE_DPMS_ON)
+		return -EINVAL;
+
+	pipeconf = I915_READ(pipeconf_reg);
+
+	/* can't use the overlay with double wide pipe */
+	if (!IS_I965G(overlay->dev) && pipeconf & PIPEACONF_DOUBLE_WIDE)
+		return -EINVAL;
+
+	return 0;
+}
+
+static void update_pfit_vscale_ratio(struct intel_overlay *overlay)
+{
+	struct drm_device *dev = overlay->dev;
+        drm_i915_private_t *dev_priv = dev->dev_private;
+	u32 ratio;
+	u32 pfit_control = I915_READ(PFIT_CONTROL);
+
+	/* XXX: This is not the same logic as in the xorg driver, but more in
+	 * line with the intel documentation for the i965 */
+	if (!IS_I965G(dev) && (pfit_control & VERT_AUTO_SCALE)) {
+		ratio = I915_READ(PFIT_AUTO_RATIOS) >> PFIT_VERT_SCALE_SHIFT;
+	} else { /* on i965 use the PGM reg to read out the autoscaler values */
+		ratio = I915_READ(PFIT_PGM_RATIOS);
+		if (IS_I965G(dev))
+			ratio >>= PFIT_VERT_SCALE_SHIFT_965;
+		else
+			ratio >>= PFIT_VERT_SCALE_SHIFT;
+	}
+
+	overlay->pfit_vscale_ratio = ratio;
+}
+
+static int check_overlay_dst(struct intel_overlay *overlay,
+			     struct drm_intel_overlay_put_image *rec)
+{
+	struct drm_display_mode *mode = &overlay->crtc->base.mode;
+
+	if ((rec->dst_x < mode->crtc_hdisplay)
+	    && (rec->dst_x + rec->dst_width
+		    <= mode->crtc_hdisplay)
+	    && (rec->dst_y < mode->crtc_vdisplay)
+	    && (rec->dst_y + rec->dst_height
+		    <= mode->crtc_vdisplay))
+		return 0;
+	else
+		return -EINVAL;
+}
+
+static int check_overlay_scaling(struct put_image_params *rec)
+{
+	u32 tmp;
+
+	/* downscaling limit is 8.0 */
+	tmp = ((rec->src_scan_h << 16) / rec->dst_h) >> 16;
+	if (tmp > 7)
+		return -EINVAL;
+	tmp = ((rec->src_scan_w << 16) / rec->dst_w) >> 16;
+	if (tmp > 7)
+		return -EINVAL;
+
+	return 0;
+}
+
+static int check_overlay_src(struct drm_device *dev,
+			     struct drm_intel_overlay_put_image *rec,
+			     struct drm_gem_object *new_bo)
+{
+	u32 stride_mask;
+	int depth;
+	int uv_hscale = uv_hsubsampling(rec->flags);
+	int uv_vscale = uv_vsubsampling(rec->flags);
+	size_t tmp;
+
+	/* check src dimensions */
+	if (IS_845G(dev) || IS_I830(dev)) {
+		if (rec->src_height > IMAGE_MAX_HEIGHT_LEGACY
+		    || rec->src_width > IMAGE_MAX_WIDTH_LEGACY)
+			return -EINVAL;
+	} else {
+		if (rec->src_height > IMAGE_MAX_HEIGHT
+		    || rec->src_width > IMAGE_MAX_WIDTH)
+			return -EINVAL;
+	}
+	/* better safe than sorry, use 4 as the maximal subsampling ratio */
+	if (rec->src_height < N_VERT_Y_TAPS*4
+	    || rec->src_width < N_HORIZ_Y_TAPS*4)
+		return -EINVAL;
+
+	/* check alignment constraints */
+	switch (rec->flags & I915_OVERLAY_TYPE_MASK) {
+		case I915_OVERLAY_RGB:
+			/* not implemented */
+			return -EINVAL;
+		case I915_OVERLAY_YUV_PACKED:
+			depth = packed_depth_bytes(rec->flags);
+			if (uv_vscale != 1)
+				return -EINVAL;
+			if (depth < 0)
+				return depth;
+			/* ignore UV planes */
+			rec->stride_UV = 0;
+			rec->offset_U = 0;
+			rec->offset_V = 0;
+			/* check pixel alignment */
+			if (rec->offset_Y % depth)
+				return -EINVAL;
+			break;
+		case I915_OVERLAY_YUV_PLANAR:
+			if (uv_vscale < 0 || uv_hscale < 0)
+				return -EINVAL;
+			/* no offset restrictions for planar formats */
+			break;
+		default:
+			return -EINVAL;
+	}
+
+	if (rec->src_width % uv_hscale)
+		return -EINVAL;
+
+	/* stride checking */
+	if (IS_I830(dev) || IS_845G(dev))
+		stride_mask = 255;
+	else
+		stride_mask = 63;
+
+	if (rec->stride_Y & stride_mask || rec->stride_UV & stride_mask)
+		return -EINVAL;
+	if (IS_I965G(dev) && rec->stride_Y < 512)
+		return -EINVAL;
+
+	tmp = (rec->flags & I915_OVERLAY_TYPE_MASK) == I915_OVERLAY_YUV_PLANAR ?
+		4 : 8;
+	if (rec->stride_Y > tmp*1024 || rec->stride_UV > 2*1024)
+		return -EINVAL;
+
+	/* check buffer dimensions */
+	switch (rec->flags & I915_OVERLAY_TYPE_MASK) {
+		case I915_OVERLAY_RGB:
+		case I915_OVERLAY_YUV_PACKED:
+			/* always 4 Y values per depth pixels */
+			if (packed_width_bytes(rec->flags, rec->src_width)
+					> rec->stride_Y)
+				return -EINVAL;
+
+			tmp = rec->stride_Y*rec->src_height;
+			if (rec->offset_Y + tmp > new_bo->size)
+				return -EINVAL;
+			break;
+		case I915_OVERLAY_YUV_PLANAR:
+			if (rec->src_width > rec->stride_Y)
+				return -EINVAL;
+			if (rec->src_width/uv_hscale > rec->stride_UV)
+				return -EINVAL;
+
+			tmp = rec->stride_Y*rec->src_height;
+			if (rec->offset_Y + tmp > new_bo->size)
+				return -EINVAL;
+			tmp = rec->stride_UV*rec->src_height;
+			tmp /= uv_vscale;
+			if (rec->offset_U + tmp > new_bo->size
+			    || rec->offset_V + tmp > new_bo->size)
+				return -EINVAL;
+			break;
+	}
+
+	return 0;
+}
+
+int intel_overlay_put_image(struct drm_device *dev, void *data,
+                            struct drm_file *file_priv)
+{
+	struct drm_intel_overlay_put_image *put_image_rec = data;
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	struct intel_overlay *overlay;
+	struct drm_mode_object *drmmode_obj;
+	struct intel_crtc *crtc;
+	struct drm_gem_object *new_bo;
+	struct put_image_params *params;
+	int ret;
+
+	if (!dev_priv) {
+		DRM_ERROR("called with no initialization\n");
+		return -EINVAL;
+	}
+
+	overlay = dev_priv->overlay;
+	if (!overlay) {
+		DRM_DEBUG("userspace bug: no overlay\n");
+		return -ENODEV;
+	}
+
+	if (!(put_image_rec->flags & I915_OVERLAY_ENABLE)) {
+		mutex_lock(&dev->mode_config.mutex);
+		mutex_lock(&dev->struct_mutex);
+
+		ret = intel_overlay_switch_off(overlay);
+
+		mutex_unlock(&dev->struct_mutex);
+		mutex_unlock(&dev->mode_config.mutex);
+
+		return ret;
+	}
+
+	params = kmalloc(sizeof(struct put_image_params), GFP_KERNEL);
+	if (!params)
+		return -ENOMEM;
+
+	drmmode_obj = drm_mode_object_find(dev, put_image_rec->crtc_id,
+                        DRM_MODE_OBJECT_CRTC);
+	if (!drmmode_obj) {
+		ret = -ENOENT;
+		goto out_free;
+	}
+	crtc = to_intel_crtc(obj_to_crtc(drmmode_obj));
+
+	new_bo = drm_gem_object_lookup(dev, file_priv,
+			put_image_rec->bo_handle);
+	if (!new_bo) {
+		ret = -ENOENT;
+		goto out_free;
+	}
+
+	mutex_lock(&dev->mode_config.mutex);
+	mutex_lock(&dev->struct_mutex);
+
+	if (overlay->hw_wedged) {
+		ret = intel_overlay_recover_from_interrupt(overlay, 1);
+		if (ret != 0)
+			goto out_unlock;
+	}
+
+	if (overlay->crtc != crtc) {
+		struct drm_display_mode *mode = &crtc->base.mode;
+		ret = intel_overlay_switch_off(overlay);
+		if (ret != 0)
+			goto out_unlock;
+
+		ret = check_overlay_possible_on_crtc(overlay, crtc);
+		if (ret != 0)
+			goto out_unlock;
+
+		overlay->crtc = crtc;
+		crtc->overlay = overlay;
+
+		if (intel_panel_fitter_pipe(dev) == crtc->pipe
+		    /* and line to wide, i.e. one-line-mode */
+		    && mode->hdisplay > 1024) {
+			overlay->pfit_active = 1;
+			update_pfit_vscale_ratio(overlay);
+		} else
+			overlay->pfit_active = 0;
+	}
+
+	ret = check_overlay_dst(overlay, put_image_rec);
+	if (ret != 0)
+		goto out_unlock;
+
+	if (overlay->pfit_active) {
+		params->dst_y = ((((u32)put_image_rec->dst_y) << 12) /
+			overlay->pfit_vscale_ratio);
+		/* shifting right rounds downwards, so add 1 */
+		params->dst_h = ((((u32)put_image_rec->dst_height) << 12) /
+			overlay->pfit_vscale_ratio) + 1;
+	} else {
+		params->dst_y = put_image_rec->dst_y;
+		params->dst_h = put_image_rec->dst_height;
+	}
+	params->dst_x = put_image_rec->dst_x;
+	params->dst_w = put_image_rec->dst_width;
+
+	params->src_w = put_image_rec->src_width;
+	params->src_h = put_image_rec->src_height;
+	params->src_scan_w = put_image_rec->src_scan_width;
+	params->src_scan_h = put_image_rec->src_scan_height;
+	if (params->src_scan_h > params->src_h
+	    || params->src_scan_w > params->src_w) {
+		ret = -EINVAL;
+		goto out_unlock;
+	}
+
+	ret = check_overlay_src(dev, put_image_rec, new_bo);
+	if (ret != 0)
+		goto out_unlock;
+	params->format = put_image_rec->flags & ~I915_OVERLAY_FLAGS_MASK;
+	params->stride_Y = put_image_rec->stride_Y;
+	params->stride_UV = put_image_rec->stride_UV;
+	params->offset_Y = put_image_rec->offset_Y;
+	params->offset_U = put_image_rec->offset_U;
+	params->offset_V = put_image_rec->offset_V;
+
+	/* Check scaling after src size to prevent a divide-by-zero. */
+	ret = check_overlay_scaling(params);
+	if (ret != 0)
+		goto out_unlock;
+
+	ret = intel_overlay_do_put_image(overlay, new_bo, params);
+	if (ret != 0)
+		goto out_unlock;
+
+	mutex_unlock(&dev->struct_mutex);
+	mutex_unlock(&dev->mode_config.mutex);
+
+	kfree(params);
+
+	return 0;
+
+out_unlock:
+	mutex_unlock(&dev->struct_mutex);
+	mutex_unlock(&dev->mode_config.mutex);
+	drm_gem_object_unreference(new_bo);
+out_free:
+	kfree(params);
+
+	return ret;
+}
+
+static void update_reg_attrs(struct intel_overlay *overlay,
+			     struct overlay_registers *regs)
+{
+	regs->OCLRC0 = (overlay->contrast << 18) | (overlay->brightness & 0xff);
+	regs->OCLRC1 = overlay->saturation;
+}
+
+static bool check_gamma_bounds(u32 gamma1, u32 gamma2)
+{
+	int i;
+
+	if (gamma1 & 0xff000000 || gamma2 & 0xff000000)
+		return false;
+
+	for (i = 0; i < 3; i++) {
+		if (((gamma1 >> i * 8) & 0xff) >= ((gamma2 >> i*8) & 0xff))
+			return false;
+	}
+
+	return true;
+}
+
+static bool check_gamma5_errata(u32 gamma5)
+{
+	int i;
+
+	for (i = 0; i < 3; i++) {
+		if (((gamma5 >> i*8) & 0xff) == 0x80)
+			return false;
+	}
+
+	return true;
+}
+
+static int check_gamma(struct drm_intel_overlay_attrs *attrs)
+{
+	if (!check_gamma_bounds(0, attrs->gamma0)
+	    || !check_gamma_bounds(attrs->gamma0, attrs->gamma1)
+	    || !check_gamma_bounds(attrs->gamma1, attrs->gamma2)
+	    || !check_gamma_bounds(attrs->gamma2, attrs->gamma3)
+	    || !check_gamma_bounds(attrs->gamma3, attrs->gamma4)
+	    || !check_gamma_bounds(attrs->gamma4, attrs->gamma5)
+	    || !check_gamma_bounds(attrs->gamma5, 0x00ffffff))
+		return -EINVAL;
+	if (!check_gamma5_errata(attrs->gamma5))
+		return -EINVAL;
+	return 0;
+}
+
+int intel_overlay_attrs(struct drm_device *dev, void *data,
+                        struct drm_file *file_priv)
+{
+	struct drm_intel_overlay_attrs *attrs = data;
+        drm_i915_private_t *dev_priv = dev->dev_private;
+	struct intel_overlay *overlay;
+	struct overlay_registers *regs;
+	int ret;
+
+	if (!dev_priv) {
+		DRM_ERROR("called with no initialization\n");
+		return -EINVAL;
+	}
+
+	overlay = dev_priv->overlay;
+	if (!overlay) {
+		DRM_DEBUG("userspace bug: no overlay\n");
+		return -ENODEV;
+	}
+
+	mutex_lock(&dev->mode_config.mutex);
+	mutex_lock(&dev->struct_mutex);
+
+	if (!(attrs->flags & I915_OVERLAY_UPDATE_ATTRS)) {
+		attrs->color_key = overlay->color_key;
+		attrs->brightness = overlay->brightness;
+		attrs->contrast = overlay->contrast;
+		attrs->saturation = overlay->saturation;
+
+		if (IS_I9XX(dev)) {
+			attrs->gamma0 = I915_READ(OGAMC0);
+			attrs->gamma1 = I915_READ(OGAMC1);
+			attrs->gamma2 = I915_READ(OGAMC2);
+			attrs->gamma3 = I915_READ(OGAMC3);
+			attrs->gamma4 = I915_READ(OGAMC4);
+			attrs->gamma5 = I915_READ(OGAMC5);
+		}
+		ret = 0;
+	} else {
+		overlay->color_key = attrs->color_key;
+		if (attrs->brightness >= -128 && attrs->brightness <= 127) {
+			overlay->brightness = attrs->brightness;
+		} else {
+			ret = -EINVAL;
+			goto out_unlock;
+		}
+		if (attrs->contrast <= 255) {
+			overlay->contrast = attrs->contrast;
+		} else {
+			ret = -EINVAL;
+			goto out_unlock;
+		}
+		if (attrs->saturation <= 1023) {
+			overlay->saturation = attrs->saturation;
+		} else {
+			ret = -EINVAL;
+			goto out_unlock;
+		}
+
+		regs = intel_overlay_map_regs_atomic(overlay);
+		if (!regs) {
+			ret = -ENOMEM;
+			goto out_unlock;
+		}
+
+		update_reg_attrs(overlay, regs);
+
+		intel_overlay_unmap_regs_atomic(overlay);
+
+		if (attrs->flags & I915_OVERLAY_UPDATE_GAMMA) {
+			if (!IS_I9XX(dev)) {
+				ret = -EINVAL;
+				goto out_unlock;
+			}
+
+			if (overlay->active) {
+				ret = -EBUSY;
+				goto out_unlock;
+			}
+
+			ret = check_gamma(attrs);
+			if (ret != 0)
+				goto out_unlock;
+
+			I915_WRITE(OGAMC0, attrs->gamma0);
+			I915_WRITE(OGAMC1, attrs->gamma1);
+			I915_WRITE(OGAMC2, attrs->gamma2);
+			I915_WRITE(OGAMC3, attrs->gamma3);
+			I915_WRITE(OGAMC4, attrs->gamma4);
+			I915_WRITE(OGAMC5, attrs->gamma5);
+		}
+		ret = 0;
+	}
+
+out_unlock:
+	mutex_unlock(&dev->struct_mutex);
+	mutex_unlock(&dev->mode_config.mutex);
+
+	return ret;
+}
+
+void intel_setup_overlay(struct drm_device *dev)
+{
+        drm_i915_private_t *dev_priv = dev->dev_private;
+	struct intel_overlay *overlay;
+	struct drm_gem_object *reg_bo;
+	struct overlay_registers *regs;
+	int ret;
+
+	if (!OVERLAY_EXISTS(dev))
+		return;
+
+	overlay = kzalloc(sizeof(struct intel_overlay), GFP_KERNEL);
+	if (!overlay)
+		return;
+	overlay->dev = dev;
+
+	reg_bo = drm_gem_object_alloc(dev, PAGE_SIZE);
+	if (!reg_bo)
+		goto out_free;
+	overlay->reg_bo = reg_bo->driver_private;
+
+	if (OVERLAY_NONPHYSICAL(dev)) {
+		ret = i915_gem_object_pin(reg_bo, PAGE_SIZE);
+		if (ret) {
+                        DRM_ERROR("failed to pin overlay register bo\n");
+                        goto out_free_bo;
+                }
+		overlay->flip_addr = overlay->reg_bo->gtt_offset;
+
+		ret = i915_gem_object_set_to_gtt_domain(reg_bo, true);
+		if (ret) {
+                        DRM_ERROR("failed to move overlay register bo into the GTT\n");
+                        goto out_unpin_bo;
+                }
+	} else {
+		ret = i915_gem_attach_phys_object(dev, reg_bo,
+				I915_GEM_PHYS_OVERLAY_REGS);
+                if (ret) {
+                        DRM_ERROR("failed to attach phys overlay regs\n");
+                        goto out_free_bo;
+                }
+		overlay->flip_addr = overlay->reg_bo->phys_obj->handle->busaddr;
+	}
+
+	/* init all values */
+	overlay->color_key = 0x0101fe;
+	overlay->brightness = -19;
+	overlay->contrast = 75;
+	overlay->saturation = 146;
+
+	regs = intel_overlay_map_regs_atomic(overlay);
+	if (!regs)
+		goto out_free_bo;
+
+	memset(regs, 0, sizeof(struct overlay_registers));
+	update_polyphase_filter(regs);
+
+	update_reg_attrs(overlay, regs);
+
+	intel_overlay_unmap_regs_atomic(overlay);
+
+	dev_priv->overlay = overlay;
+	DRM_INFO("initialized overlay support\n");
+	return;
+
+out_unpin_bo:
+	i915_gem_object_unpin(reg_bo);
+out_free_bo:
+	drm_gem_object_unreference(reg_bo);
+out_free:
+	kfree(overlay);
+	return;
+}
+
+void intel_cleanup_overlay(struct drm_device *dev)
+{
+        drm_i915_private_t *dev_priv = dev->dev_private;
+
+	if (dev_priv->overlay) {
+		/* The bo's should be free'd by the generic code already.
+		 * Furthermore modesetting teardown happens beforehand so the
+		 * hardware should be off already */
+		BUG_ON(dev_priv->overlay->active);
+
+		kfree(dev_priv->overlay);
+	}
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i915/intel_crt.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i915/intel_crt.c
@@ -39,7 +39,7 @@
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	u32 temp, reg;
 
-	if (IS_IGDNG(dev))
+	if (HAS_PCH_SPLIT(dev))
 		reg = PCH_ADPA;
 	else
 		reg = ADPA;
@@ -64,34 +64,6 @@
 	}
 
 	I915_WRITE(reg, temp);
-
-	if (IS_IGD(dev)) {
-		if (mode == DRM_MODE_DPMS_OFF) {
-			/* turn off DAC */
-			temp = I915_READ(PORT_HOTPLUG_EN);
-			temp &= ~CRT_EOS_INT_EN;
-			I915_WRITE(PORT_HOTPLUG_EN, temp);
-
-			temp = I915_READ(PORT_HOTPLUG_STAT);
-			if (temp & CRT_EOS_INT_STATUS)
-				I915_WRITE(PORT_HOTPLUG_STAT,
-					CRT_EOS_INT_STATUS);
-		} else {
-			/* turn on DAC. EOS interrupt must be enabled after DAC
-			 * is enabled, so it sounds not good to enable it in
-			 * i915_driver_irq_postinstall()
-			 * wait 12.5ms after DAC is enabled
-			 */
-			msleep(13);
-			temp = I915_READ(PORT_HOTPLUG_STAT);
-			if (temp & CRT_EOS_INT_STATUS)
-				I915_WRITE(PORT_HOTPLUG_STAT,
-					CRT_EOS_INT_STATUS);
-			temp = I915_READ(PORT_HOTPLUG_EN);
-			temp |= CRT_EOS_INT_EN;
-			I915_WRITE(PORT_HOTPLUG_EN, temp);
-		}
-	}
 }
 
 static int intel_crt_mode_valid(struct drm_connector *connector,
@@ -141,7 +113,7 @@
 	else
 		dpll_md_reg = DPLL_B_MD;
 
-	if (IS_IGDNG(dev))
+	if (HAS_PCH_SPLIT(dev))
 		adpa_reg = PCH_ADPA;
 	else
 		adpa_reg = ADPA;
@@ -150,7 +122,7 @@
 	 * Disable separate mode multiplier used when cloning SDVO to CRT
 	 * XXX this needs to be adjusted when we really are cloning
 	 */
-	if (IS_I965G(dev) && !IS_IGDNG(dev)) {
+	if (IS_I965G(dev) && !HAS_PCH_SPLIT(dev)) {
 		dpll_md = I915_READ(dpll_md_reg);
 		I915_WRITE(dpll_md_reg,
 			   dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
@@ -164,18 +136,18 @@
 
 	if (intel_crtc->pipe == 0) {
 		adpa |= ADPA_PIPE_A_SELECT;
-		if (!IS_IGDNG(dev))
+		if (!HAS_PCH_SPLIT(dev))
 			I915_WRITE(BCLRPAT_A, 0);
 	} else {
 		adpa |= ADPA_PIPE_B_SELECT;
-		if (!IS_IGDNG(dev))
+		if (!HAS_PCH_SPLIT(dev))
 			I915_WRITE(BCLRPAT_B, 0);
 	}
 
 	I915_WRITE(adpa_reg, adpa);
 }
 
-static bool intel_igdng_crt_detect_hotplug(struct drm_connector *connector)
+static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
 {
 	struct drm_device *dev = connector->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
@@ -185,6 +157,9 @@
 	adpa = I915_READ(PCH_ADPA);
 
 	adpa &= ~ADPA_CRT_HOTPLUG_MASK;
+	/* disable HPD first */
+	I915_WRITE(PCH_ADPA, adpa);
+	(void)I915_READ(PCH_ADPA);
 
 	adpa |= (ADPA_CRT_HOTPLUG_PERIOD_128 |
 			ADPA_CRT_HOTPLUG_WARMUP_10MS |
@@ -194,7 +169,7 @@
 			ADPA_CRT_HOTPLUG_ENABLE |
 			ADPA_CRT_HOTPLUG_FORCE_TRIGGER);
 
-	DRM_DEBUG("pch crt adpa 0x%x", adpa);
+	DRM_DEBUG_KMS("pch crt adpa 0x%x", adpa);
 	I915_WRITE(PCH_ADPA, adpa);
 
 	while ((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) != 0)
@@ -227,8 +202,8 @@
 	u32 hotplug_en;
 	int i, tries = 0;
 
-	if (IS_IGDNG(dev))
-		return intel_igdng_crt_detect_hotplug(connector);
+	if (HAS_PCH_SPLIT(dev))
+		return intel_ironlake_crt_detect_hotplug(connector);
 
 	/*
 	 * On 4 series desktop, CRT detect sequence need to be done twice
@@ -549,12 +524,12 @@
 					  &intel_output->enc);
 
 	/* Set up the DDC bus. */
-	if (IS_IGDNG(dev))
+	if (HAS_PCH_SPLIT(dev))
 		i2c_reg = PCH_GPIOA;
 	else {
 		i2c_reg = GPIOA;
 		/* Use VBT information for CRT DDC if available */
-		if (dev_priv->crt_ddc_bus != -1)
+		if (dev_priv->crt_ddc_bus != 0)
 			i2c_reg = dev_priv->crt_ddc_bus;
 	}
 	intel_output->ddc_bus = intel_i2c_create(dev, i2c_reg, "CRTDDC_A");
@@ -576,4 +551,6 @@
 	drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
 
 	drm_sysfs_connector_add(connector);
+
+	dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;
 }
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i915/i915_dma.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i915/i915_dma.c
@@ -123,7 +123,7 @@
 	drm_i915_private_t *dev_priv = dev->dev_private;
 	/* Program Hardware Status Page */
 	dev_priv->status_page_dmah =
-		drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE, 0xffffffff);
+		drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE);
 
 	if (!dev_priv->status_page_dmah) {
 		DRM_ERROR("Can not allocate hardware status page\n");
@@ -134,6 +134,10 @@
 
 	memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
 
+	if (IS_I965G(dev))
+		dev_priv->dma_status_page |= (dev_priv->dma_status_page >> 28) &
+					     0xf0;
+
 	I915_WRITE(HWS_PGA, dev_priv->dma_status_page);
 	DRM_DEBUG_DRIVER("Enabled hardware status page\n");
 	return 0;
@@ -683,8 +687,10 @@
 		ret = copy_from_user(cliprects, batch->cliprects,
 				     batch->num_cliprects *
 				     sizeof(struct drm_clip_rect));
-		if (ret != 0)
+		if (ret != 0) {
+			ret = -EFAULT;
 			goto fail_free;
+		}
 	}
 
 	mutex_lock(&dev->struct_mutex);
@@ -725,20 +731,26 @@
 		return -ENOMEM;
 
 	ret = copy_from_user(batch_data, cmdbuf->buf, cmdbuf->sz);
-	if (ret != 0)
+	if (ret != 0) {
+		ret = -EFAULT;
 		goto fail_batch_free;
+	}
 
 	if (cmdbuf->num_cliprects) {
 		cliprects = kcalloc(cmdbuf->num_cliprects,
 				    sizeof(struct drm_clip_rect), GFP_KERNEL);
-		if (cliprects == NULL)
+		if (cliprects == NULL) {
+			ret = -ENOMEM;
 			goto fail_batch_free;
+		}
 
 		ret = copy_from_user(cliprects, cmdbuf->cliprects,
 				     cmdbuf->num_cliprects *
 				     sizeof(struct drm_clip_rect));
-		if (ret != 0)
+		if (ret != 0) {
+			ret = -EFAULT;
 			goto fail_clip_free;
+		}
 	}
 
 	mutex_lock(&dev->struct_mutex);
@@ -807,9 +819,19 @@
 	case I915_PARAM_NUM_FENCES_AVAIL:
 		value = dev_priv->num_fence_regs - dev_priv->fence_reg_start;
 		break;
+	case I915_PARAM_HAS_OVERLAY:
+		value = dev_priv->overlay ? 1 : 0;
+		break;
+	case I915_PARAM_HAS_PAGEFLIPPING:
+		value = 1;
+		break;
+	case I915_PARAM_HAS_EXECBUF2:
+		/* depends on GEM */
+		value = dev_priv->has_gem;
+		break;
 	default:
 		DRM_DEBUG_DRIVER("Unknown parameter %d\n",
-					param->param);
+				 param->param);
 		return -EINVAL;
 	}
 
@@ -962,15 +984,21 @@
 	 * Some of the preallocated space is taken by the GTT
 	 * and popup.  GTT is 1K per MB of aperture size, and popup is 4K.
 	 */
-	if (IS_G4X(dev) || IS_IGD(dev) || IS_IGDNG(dev))
+	if (IS_G4X(dev) || IS_PINEVIEW(dev) || IS_IRONLAKE(dev) || IS_GEN6(dev))
 		overhead = 4096;
 	else
 		overhead = (*aperture_size / 1024) + 4096;
 
 	switch (tmp & INTEL_GMCH_GMS_MASK) {
 	case INTEL_855_GMCH_GMS_DISABLED:
-		DRM_ERROR("video memory is disabled\n");
-		return -1;
+		/* XXX: This is what my A1 silicon has. */
+		if (IS_GEN6(dev)) {
+			stolen = 64 * 1024 * 1024;
+		} else {
+			DRM_ERROR("video memory is disabled\n");
+			return -1;
+		}
+		break;
 	case INTEL_855_GMCH_GMS_STOLEN_1M:
 		stolen = 1 * 1024 * 1024;
 		break;
@@ -1048,7 +1076,7 @@
 	int gtt_offset, gtt_size;
 
 	if (IS_I965G(dev)) {
-		if (IS_G4X(dev) || IS_IGDNG(dev)) {
+		if (IS_G4X(dev) || IS_IRONLAKE(dev) || IS_GEN6(dev)) {
 			gtt_offset = 2*1024*1024;
 			gtt_size = 2*1024*1024;
 		} else {
@@ -1070,7 +1098,7 @@
 
 	entry = *(volatile u32 *)(gtt + (gtt_addr / 1024));
 
-	DRM_DEBUG("GTT addr: 0x%08lx, PTE: 0x%08lx\n", gtt_addr, entry);
+	DRM_DEBUG_DRIVER("GTT addr: 0x%08lx, PTE: 0x%08lx\n", gtt_addr, entry);
 
 	/* Mask out these reserved bits on this hardware. */
 	if (!IS_I9XX(dev) || IS_I915G(dev) || IS_I915GM(dev) ||
@@ -1096,7 +1124,7 @@
 	phys =(entry & PTE_ADDRESS_MASK) |
 		((uint64_t)(entry & PTE_ADDRESS_MASK_HIGH) << (32 - 4));
 
-	DRM_DEBUG("GTT addr: 0x%08lx, phys addr: 0x%08lx\n", gtt_addr, phys);
+	DRM_DEBUG_DRIVER("GTT addr: 0x%08lx, phys addr: 0x%08lx\n", gtt_addr, phys);
 
 	return phys;
 }
@@ -1111,7 +1139,8 @@
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct drm_mm_node *compressed_fb, *compressed_llb;
-	unsigned long cfb_base, ll_base;
+	unsigned long cfb_base;
+	unsigned long ll_base = 0;
 
 	/* Leave 1M for line length buffer & misc. */
 	compressed_fb = drm_mm_search_free(&dev_priv->vram, size, 4096, 0);
@@ -1194,14 +1223,6 @@
 	dev->mode_config.fb_base = drm_get_resource_start(dev, fb_bar) &
 		0xff000000;
 
-	if (IS_MOBILE(dev) || IS_I9XX(dev))
-		dev_priv->cursor_needs_physical = true;
-	else
-		dev_priv->cursor_needs_physical = false;
-
-	if (IS_I965G(dev) || IS_G33(dev))
-		dev_priv->cursor_needs_physical = false;
-
 	/* Basic memrange allocator for stolen space (aka vram) */
 	drm_mm_init(&dev_priv->vram, 0, prealloc_size);
 	DRM_INFO("set up %ldM of stolen space\n", prealloc_size / (1024*1024));
@@ -1251,6 +1272,12 @@
 	if (ret)
 		goto destroy_ringbuffer;
 
+	/* IIR "flip pending" bit means done if this bit is set */
+	if (IS_GEN3(dev) && (I915_READ(ECOSKPD) & ECO_FLIP_DONE))
+		dev_priv->flip_pending_is_done = true;
+
+	intel_modeset_init(dev);
+
 	ret = drm_irq_install(dev);
 	if (ret)
 		goto destroy_ringbuffer;
@@ -1265,8 +1292,6 @@
 
 	I915_WRITE(INSTPM, (1 << 5) | (1 << 21));
 
-	intel_modeset_init(dev);
-
 	drm_helper_initial_config(dev);
 
 	return 0;
@@ -1306,7 +1331,7 @@
 	drm_i915_private_t *dev_priv = dev->dev_private;
 	u32 tmp;
 
-	if (!IS_IGD(dev))
+	if (!IS_PINEVIEW(dev))
 		return;
 
 	tmp = I915_READ(CLKCFG);
@@ -1354,7 +1379,7 @@
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	resource_size_t base, size;
-	int ret = 0, mmio_bar = IS_I9XX(dev) ? 0 : 1;
+	int ret = 0, mmio_bar;
 	uint32_t agp_size, prealloc_size, prealloc_start;
 
 	/* i915 has 4 more counters */
@@ -1370,8 +1395,10 @@
 
 	dev->dev_private = (void *)dev_priv;
 	dev_priv->dev = dev;
+	dev_priv->info = (struct intel_device_info *) flags;
 
 	/* Add register map (needed for suspend/resume) */
+	mmio_bar = IS_I9XX(dev) ? 0 : 1;
 	base = drm_get_resource_start(dev, mmio_bar);
 	size = drm_get_resource_len(dev, mmio_bar);
 
@@ -1380,6 +1407,21 @@
 		goto free_priv;
 	}
 
+	/* overlay on gen2 is broken and can't address above 1G */
+	if (IS_GEN2(dev))
+		pci_set_consistent_dma_mask(dev->pdev, DMA_BIT_MASK(30));
+
+	/* 965GM sometimes incorrectly writes to hardware status page (HWS)
+	 * using 32bit addressing, overwriting memory if HWS is located
+	 * above 4GB.
+	 *
+	 * The documentation also mentions an issue with undefined
+	 * behaviour if any general state is accessed within a page above 4GB,
+	 * which also needs to be handled carefully.
+	 */
+	if (IS_I965G(dev) && !IS_G4X(dev) && !IS_IRONLAKE(dev))
+		pci_set_consistent_dma_mask(dev->pdev, DMA_BIT_MASK(32));
+
 	dev_priv->regs = ioremap(base, size);
 	if (!dev_priv->regs) {
 		DRM_ERROR("failed to map registers\n");
@@ -1413,7 +1455,7 @@
 	if (ret)
 		goto out_iomapfree;
 
-	dev_priv->wq = create_workqueue("i915");
+	dev_priv->wq = create_singlethread_workqueue("i915");
 	if (dev_priv->wq == NULL) {
 		DRM_ERROR("Failed to create our workqueue.\n");
 		ret = -ENOMEM;
@@ -1434,7 +1476,7 @@
 
 	dev->driver->get_vblank_counter = i915_get_vblank_counter;
 	dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
-	if (IS_G4X(dev) || IS_IGDNG(dev)) {
+	if (IS_G4X(dev) || IS_IRONLAKE(dev) || IS_GEN6(dev)) {
 		dev->max_vblank_count = 0xffffffff; /* full 32 bit counter */
 		dev->driver->get_vblank_counter = gm45_get_vblank_counter;
 	}
@@ -1489,9 +1531,7 @@
 	}
 
 	/* Must be done after probing outputs */
-	/* FIXME: verify on IGDNG */
-	if (!IS_IGDNG(dev))
-		intel_opregion_init(dev, 0);
+	intel_opregion_init(dev, 0);
 
 	setup_timer(&dev_priv->hangcheck_timer, i915_hangcheck_elapsed,
 		    (unsigned long) dev);
@@ -1525,6 +1565,15 @@
 	}
 
 	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
+		/*
+		 * free the memory space allocated for the child device
+		 * config parsed from VBT
+		 */
+		if (dev_priv->child_dev && dev_priv->child_dev_num) {
+			kfree(dev_priv->child_dev);
+			dev_priv->child_dev = NULL;
+			dev_priv->child_dev_num = 0;
+		}
 		drm_irq_uninstall(dev);
 		vga_client_register(dev->pdev, NULL, NULL, NULL);
 	}
@@ -1535,8 +1584,7 @@
 	if (dev_priv->regs != NULL)
 		iounmap(dev_priv->regs);
 
-	if (!IS_IGDNG(dev))
-		intel_opregion_free(dev, 0);
+	intel_opregion_free(dev, 0);
 
 	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
 		intel_modeset_cleanup(dev);
@@ -1548,6 +1596,11 @@
 		mutex_unlock(&dev->struct_mutex);
 		drm_mm_takedown(&dev_priv->vram);
 		i915_gem_lastclose(dev);
+
+		intel_cleanup_overlay(dev);
+
+		if (!I915_NEED_GFX_HWS(dev))
+			i915_free_hws(dev);
 	}
 
 	pci_dev_put(dev_priv->bridge_dev);
@@ -1638,6 +1691,7 @@
 	DRM_IOCTL_DEF(DRM_I915_HWS_ADDR, i915_set_status_page, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
 	DRM_IOCTL_DEF(DRM_I915_GEM_INIT, i915_gem_init_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
 	DRM_IOCTL_DEF(DRM_I915_GEM_EXECBUFFER, i915_gem_execbuffer, DRM_AUTH),
+	DRM_IOCTL_DEF(DRM_I915_GEM_EXECBUFFER2, i915_gem_execbuffer2, DRM_AUTH),
 	DRM_IOCTL_DEF(DRM_I915_GEM_PIN, i915_gem_pin_ioctl, DRM_AUTH|DRM_ROOT_ONLY),
 	DRM_IOCTL_DEF(DRM_I915_GEM_UNPIN, i915_gem_unpin_ioctl, DRM_AUTH|DRM_ROOT_ONLY),
 	DRM_IOCTL_DEF(DRM_I915_GEM_BUSY, i915_gem_busy_ioctl, DRM_AUTH),
@@ -1656,6 +1710,8 @@
 	DRM_IOCTL_DEF(DRM_I915_GEM_GET_APERTURE, i915_gem_get_aperture_ioctl, 0),
 	DRM_IOCTL_DEF(DRM_I915_GET_PIPE_FROM_CRTC_ID, intel_get_pipe_from_crtc_id, 0),
 	DRM_IOCTL_DEF(DRM_I915_GEM_MADVISE, i915_gem_madvise_ioctl, 0),
+	DRM_IOCTL_DEF(DRM_I915_OVERLAY_PUT_IMAGE, intel_overlay_put_image, DRM_MASTER|DRM_CONTROL_ALLOW),
+	DRM_IOCTL_DEF(DRM_I915_OVERLAY_ATTRS, intel_overlay_attrs, DRM_MASTER|DRM_CONTROL_ALLOW),
 };
 
 int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i915/dvo_ch7017.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i915/dvo_ch7017.c
@@ -249,7 +249,8 @@
 	if (val != CH7017_DEVICE_ID_VALUE &&
 	    val != CH7018_DEVICE_ID_VALUE &&
 	    val != CH7019_DEVICE_ID_VALUE) {
-		DRM_DEBUG("ch701x not detected, got %d: from %s Slave %d.\n",
+		DRM_DEBUG_KMS("ch701x not detected, got %d: from %s "
+				"Slave %d.\n",
 			  val, i2cbus->adapter.name,dvo->slave_addr);
 		goto fail;
 	}
@@ -284,7 +285,7 @@
 	uint8_t horizontal_active_pixel_output, vertical_active_line_output;
 	uint8_t active_input_line_output;
 
-	DRM_DEBUG("Registers before mode setting\n");
+	DRM_DEBUG_KMS("Registers before mode setting\n");
 	ch7017_dump_regs(dvo);
 
 	/* LVDS PLL settings from page 75 of 7017-7017ds.pdf*/
@@ -346,7 +347,7 @@
 	/* Turn the LVDS back on with new settings. */
 	ch7017_write(dvo, CH7017_LVDS_POWER_DOWN, lvds_power_down);
 
-	DRM_DEBUG("Registers after mode setting\n");
+	DRM_DEBUG_KMS("Registers after mode setting\n");
 	ch7017_dump_regs(dvo);
 }
 
@@ -386,7 +387,7 @@
 #define DUMP(reg)					\
 do {							\
 	ch7017_read(dvo, reg, &val);			\
-	DRM_DEBUG(#reg ": %02x\n", val);		\
+	DRM_DEBUG_KMS(#reg ": %02x\n", val);		\
 } while (0)
 
 	DUMP(CH7017_HORIZONTAL_ACTIVE_PIXEL_INPUT);
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i915/dvo_tfp410.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i915/dvo_tfp410.c
@@ -130,7 +130,7 @@
 	};
 
 	if (!tfp->quiet) {
-		DRM_DEBUG("Unable to read register 0x%02x from %s:%02x.\n",
+		DRM_DEBUG_KMS("Unable to read register 0x%02x from %s:%02x.\n",
 			  addr, i2cbus->adapter.name, dvo->slave_addr);
 	}
 	return false;
@@ -156,7 +156,7 @@
 		return true;
 
 	if (!tfp->quiet) {
-		DRM_DEBUG("Unable to write register 0x%02x to %s:%d.\n",
+		DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n",
 			  addr, i2cbus->adapter.name, dvo->slave_addr);
 	}
 
@@ -191,13 +191,15 @@
 	tfp->quiet = true;
 
 	if ((id = tfp410_getid(dvo, TFP410_VID_LO)) != TFP410_VID) {
-		DRM_DEBUG("tfp410 not detected got VID %X: from %s Slave %d.\n",
+		DRM_DEBUG_KMS("tfp410 not detected got VID %X: from %s "
+				"Slave %d.\n",
 			  id, adapter->name, dvo->slave_addr);
 		goto out;
 	}
 
 	if ((id = tfp410_getid(dvo, TFP410_DID_LO)) != TFP410_DID) {
-		DRM_DEBUG("tfp410 not detected got DID %X: from %s Slave %d.\n",
+		DRM_DEBUG_KMS("tfp410 not detected got DID %X: from %s "
+				"Slave %d.\n",
 			  id, adapter->name, dvo->slave_addr);
 		goto out;
 	}
@@ -214,7 +216,7 @@
 	uint8_t ctl2;
 
 	if (tfp410_readb(dvo, TFP410_CTL_2, &ctl2)) {
-		if (ctl2 & TFP410_CTL_2_HTPLG)
+		if (ctl2 & TFP410_CTL_2_RSEN)
 			ret = connector_status_connected;
 		else
 			ret = connector_status_disconnected;
@@ -262,33 +264,33 @@
 	uint8_t val, val2;
 
 	tfp410_readb(dvo, TFP410_REV, &val);
-	DRM_DEBUG("TFP410_REV: 0x%02X\n", val);
+	DRM_LOG_KMS("TFP410_REV: 0x%02X\n", val);
 	tfp410_readb(dvo, TFP410_CTL_1, &val);
-	DRM_DEBUG("TFP410_CTL1: 0x%02X\n", val);
+	DRM_LOG_KMS("TFP410_CTL1: 0x%02X\n", val);
 	tfp410_readb(dvo, TFP410_CTL_2, &val);
-	DRM_DEBUG("TFP410_CTL2: 0x%02X\n", val);
+	DRM_LOG_KMS("TFP410_CTL2: 0x%02X\n", val);
 	tfp410_readb(dvo, TFP410_CTL_3, &val);
-	DRM_DEBUG("TFP410_CTL3: 0x%02X\n", val);
+	DRM_LOG_KMS("TFP410_CTL3: 0x%02X\n", val);
 	tfp410_readb(dvo, TFP410_USERCFG, &val);
-	DRM_DEBUG("TFP410_USERCFG: 0x%02X\n", val);
+	DRM_LOG_KMS("TFP410_USERCFG: 0x%02X\n", val);
 	tfp410_readb(dvo, TFP410_DE_DLY, &val);
-	DRM_DEBUG("TFP410_DE_DLY: 0x%02X\n", val);
+	DRM_LOG_KMS("TFP410_DE_DLY: 0x%02X\n", val);
 	tfp410_readb(dvo, TFP410_DE_CTL, &val);
-	DRM_DEBUG("TFP410_DE_CTL: 0x%02X\n", val);
+	DRM_LOG_KMS("TFP410_DE_CTL: 0x%02X\n", val);
 	tfp410_readb(dvo, TFP410_DE_TOP, &val);
-	DRM_DEBUG("TFP410_DE_TOP: 0x%02X\n", val);
+	DRM_LOG_KMS("TFP410_DE_TOP: 0x%02X\n", val);
 	tfp410_readb(dvo, TFP410_DE_CNT_LO, &val);
 	tfp410_readb(dvo, TFP410_DE_CNT_HI, &val2);
-	DRM_DEBUG("TFP410_DE_CNT: 0x%02X%02X\n", val2, val);
+	DRM_LOG_KMS("TFP410_DE_CNT: 0x%02X%02X\n", val2, val);
 	tfp410_readb(dvo, TFP410_DE_LIN_LO, &val);
 	tfp410_readb(dvo, TFP410_DE_LIN_HI, &val2);
-	DRM_DEBUG("TFP410_DE_LIN: 0x%02X%02X\n", val2, val);
+	DRM_LOG_KMS("TFP410_DE_LIN: 0x%02X%02X\n", val2, val);
 	tfp410_readb(dvo, TFP410_H_RES_LO, &val);
 	tfp410_readb(dvo, TFP410_H_RES_HI, &val2);
-	DRM_DEBUG("TFP410_H_RES: 0x%02X%02X\n", val2, val);
+	DRM_LOG_KMS("TFP410_H_RES: 0x%02X%02X\n", val2, val);
 	tfp410_readb(dvo, TFP410_V_RES_LO, &val);
 	tfp410_readb(dvo, TFP410_V_RES_HI, &val2);
-	DRM_DEBUG("TFP410_V_RES: 0x%02X%02X\n", val2, val);
+	DRM_LOG_KMS("TFP410_V_RES: 0x%02X%02X\n", val2, val);
 }
 
 static void tfp410_save(struct intel_dvo_device *dvo)
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i915/intel_display.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i915/intel_display.c
@@ -32,7 +32,7 @@
 #include "intel_drv.h"
 #include "i915_drm.h"
 #include "i915_drv.h"
-#include "intel_dp.h"
+#include "drm_dp_helper.h"
 
 #include "drm_crtc_helper.h"
 
@@ -41,6 +41,7 @@
 bool intel_pipe_has_type (struct drm_crtc *crtc, int type);
 static void intel_update_watermarks(struct drm_device *dev);
 static void intel_increase_pllclock(struct drm_crtc *crtc, bool schedule);
+static void intel_crtc_update_cursor(struct drm_crtc *crtc);
 
 typedef struct {
     /* given values */
@@ -70,8 +71,6 @@
     intel_p2_t	    p2;
     bool (* find_pll)(const intel_limit_t *, struct drm_crtc *,
 		      int, int, intel_clock_t *);
-    bool (* find_reduced_pll)(const intel_limit_t *, struct drm_crtc *,
-			      int, int, intel_clock_t *);
 };
 
 #define I8XX_DOT_MIN		  25000
@@ -102,32 +101,32 @@
 #define I9XX_DOT_MAX		 400000
 #define I9XX_VCO_MIN		1400000
 #define I9XX_VCO_MAX		2800000
-#define IGD_VCO_MIN		1700000
-#define IGD_VCO_MAX		3500000
+#define PINEVIEW_VCO_MIN		1700000
+#define PINEVIEW_VCO_MAX		3500000
 #define I9XX_N_MIN		      1
 #define I9XX_N_MAX		      6
-/* IGD's Ncounter is a ring counter */
-#define IGD_N_MIN		      3
-#define IGD_N_MAX		      6
+/* Pineview's Ncounter is a ring counter */
+#define PINEVIEW_N_MIN		      3
+#define PINEVIEW_N_MAX		      6
 #define I9XX_M_MIN		     70
 #define I9XX_M_MAX		    120
-#define IGD_M_MIN		      2
-#define IGD_M_MAX		    256
+#define PINEVIEW_M_MIN		      2
+#define PINEVIEW_M_MAX		    256
 #define I9XX_M1_MIN		     10
 #define I9XX_M1_MAX		     22
 #define I9XX_M2_MIN		      5
 #define I9XX_M2_MAX		      9
-/* IGD M1 is reserved, and must be 0 */
-#define IGD_M1_MIN		      0
-#define IGD_M1_MAX		      0
-#define IGD_M2_MIN		      0
-#define IGD_M2_MAX		      254
+/* Pineview M1 is reserved, and must be 0 */
+#define PINEVIEW_M1_MIN		      0
+#define PINEVIEW_M1_MAX		      0
+#define PINEVIEW_M2_MIN		      0
+#define PINEVIEW_M2_MAX		      254
 #define I9XX_P_SDVO_DAC_MIN	      5
 #define I9XX_P_SDVO_DAC_MAX	     80
 #define I9XX_P_LVDS_MIN		      7
 #define I9XX_P_LVDS_MAX		     98
-#define IGD_P_LVDS_MIN		      7
-#define IGD_P_LVDS_MAX		     112
+#define PINEVIEW_P_LVDS_MIN		      7
+#define PINEVIEW_P_LVDS_MAX		     112
 #define I9XX_P1_MIN		      1
 #define I9XX_P1_MAX		      8
 #define I9XX_P2_SDVO_DAC_SLOW		     10
@@ -234,53 +233,108 @@
 #define G4X_P2_DISPLAY_PORT_FAST           10
 #define G4X_P2_DISPLAY_PORT_LIMIT          0
 
-/* IGDNG */
+/* Ironlake / Sandybridge */
 /* as we calculate clock using (register_value + 2) for
    N/M1/M2, so here the range value for them is (actual_value-2).
  */
-#define IGDNG_DOT_MIN         25000
-#define IGDNG_DOT_MAX         350000
-#define IGDNG_VCO_MIN         1760000
-#define IGDNG_VCO_MAX         3510000
-#define IGDNG_N_MIN           1
-#define IGDNG_N_MAX           5
-#define IGDNG_M_MIN           79
-#define IGDNG_M_MAX           118
-#define IGDNG_M1_MIN          12
-#define IGDNG_M1_MAX          23
-#define IGDNG_M2_MIN          5
-#define IGDNG_M2_MAX          9
-#define IGDNG_P_SDVO_DAC_MIN  5
-#define IGDNG_P_SDVO_DAC_MAX  80
-#define IGDNG_P_LVDS_MIN      28
-#define IGDNG_P_LVDS_MAX      112
-#define IGDNG_P1_MIN          1
-#define IGDNG_P1_MAX          8
-#define IGDNG_P2_SDVO_DAC_SLOW 10
-#define IGDNG_P2_SDVO_DAC_FAST 5
-#define IGDNG_P2_LVDS_SLOW    14 /* single channel */
-#define IGDNG_P2_LVDS_FAST    7  /* double channel */
-#define IGDNG_P2_DOT_LIMIT    225000 /* 225Mhz */
+#define IRONLAKE_DOT_MIN         25000
+#define IRONLAKE_DOT_MAX         350000
+#define IRONLAKE_VCO_MIN         1760000
+#define IRONLAKE_VCO_MAX         3510000
+#define IRONLAKE_M1_MIN          12
+#define IRONLAKE_M1_MAX          22
+#define IRONLAKE_M2_MIN          5
+#define IRONLAKE_M2_MAX          9
+#define IRONLAKE_P2_DOT_LIMIT    225000 /* 225Mhz */
+
+/* We have parameter ranges for different type of outputs. */
+
+/* DAC & HDMI Refclk 120Mhz */
+#define IRONLAKE_DAC_N_MIN	1
+#define IRONLAKE_DAC_N_MAX	5
+#define IRONLAKE_DAC_M_MIN	79
+#define IRONLAKE_DAC_M_MAX	127
+#define IRONLAKE_DAC_P_MIN	5
+#define IRONLAKE_DAC_P_MAX	80
+#define IRONLAKE_DAC_P1_MIN	1
+#define IRONLAKE_DAC_P1_MAX	8
+#define IRONLAKE_DAC_P2_SLOW	10
+#define IRONLAKE_DAC_P2_FAST	5
+
+/* LVDS single-channel 120Mhz refclk */
+#define IRONLAKE_LVDS_S_N_MIN	1
+#define IRONLAKE_LVDS_S_N_MAX	3
+#define IRONLAKE_LVDS_S_M_MIN	79
+#define IRONLAKE_LVDS_S_M_MAX	118
+#define IRONLAKE_LVDS_S_P_MIN	28
+#define IRONLAKE_LVDS_S_P_MAX	112
+#define IRONLAKE_LVDS_S_P1_MIN	2
+#define IRONLAKE_LVDS_S_P1_MAX	8
+#define IRONLAKE_LVDS_S_P2_SLOW	14
+#define IRONLAKE_LVDS_S_P2_FAST	14
+
+/* LVDS dual-channel 120Mhz refclk */
+#define IRONLAKE_LVDS_D_N_MIN	1
+#define IRONLAKE_LVDS_D_N_MAX	3
+#define IRONLAKE_LVDS_D_M_MIN	79
+#define IRONLAKE_LVDS_D_M_MAX	127
+#define IRONLAKE_LVDS_D_P_MIN	14
+#define IRONLAKE_LVDS_D_P_MAX	56
+#define IRONLAKE_LVDS_D_P1_MIN	2
+#define IRONLAKE_LVDS_D_P1_MAX	8
+#define IRONLAKE_LVDS_D_P2_SLOW	7
+#define IRONLAKE_LVDS_D_P2_FAST	7
+
+/* LVDS single-channel 100Mhz refclk */
+#define IRONLAKE_LVDS_S_SSC_N_MIN	1
+#define IRONLAKE_LVDS_S_SSC_N_MAX	2
+#define IRONLAKE_LVDS_S_SSC_M_MIN	79
+#define IRONLAKE_LVDS_S_SSC_M_MAX	126
+#define IRONLAKE_LVDS_S_SSC_P_MIN	28
+#define IRONLAKE_LVDS_S_SSC_P_MAX	112
+#define IRONLAKE_LVDS_S_SSC_P1_MIN	2
+#define IRONLAKE_LVDS_S_SSC_P1_MAX	8
+#define IRONLAKE_LVDS_S_SSC_P2_SLOW	14
+#define IRONLAKE_LVDS_S_SSC_P2_FAST	14
+
+/* LVDS dual-channel 100Mhz refclk */
+#define IRONLAKE_LVDS_D_SSC_N_MIN	1
+#define IRONLAKE_LVDS_D_SSC_N_MAX	3
+#define IRONLAKE_LVDS_D_SSC_M_MIN	79
+#define IRONLAKE_LVDS_D_SSC_M_MAX	126
+#define IRONLAKE_LVDS_D_SSC_P_MIN	14
+#define IRONLAKE_LVDS_D_SSC_P_MAX	42
+#define IRONLAKE_LVDS_D_SSC_P1_MIN	2
+#define IRONLAKE_LVDS_D_SSC_P1_MAX	6
+#define IRONLAKE_LVDS_D_SSC_P2_SLOW	7
+#define IRONLAKE_LVDS_D_SSC_P2_FAST	7
+
+/* DisplayPort */
+#define IRONLAKE_DP_N_MIN		1
+#define IRONLAKE_DP_N_MAX		2
+#define IRONLAKE_DP_M_MIN		81
+#define IRONLAKE_DP_M_MAX		90
+#define IRONLAKE_DP_P_MIN		10
+#define IRONLAKE_DP_P_MAX		20
+#define IRONLAKE_DP_P2_FAST		10
+#define IRONLAKE_DP_P2_SLOW		10
+#define IRONLAKE_DP_P2_LIMIT		0
+#define IRONLAKE_DP_P1_MIN		1
+#define IRONLAKE_DP_P1_MAX		2
 
 static bool
 intel_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
 		    int target, int refclk, intel_clock_t *best_clock);
 static bool
-intel_find_best_reduced_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
-			    int target, int refclk, intel_clock_t *best_clock);
-static bool
 intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
 			int target, int refclk, intel_clock_t *best_clock);
-static bool
-intel_igdng_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
-			int target, int refclk, intel_clock_t *best_clock);
 
 static bool
 intel_find_pll_g4x_dp(const intel_limit_t *, struct drm_crtc *crtc,
 		      int target, int refclk, intel_clock_t *best_clock);
 static bool
-intel_find_pll_igdng_dp(const intel_limit_t *, struct drm_crtc *crtc,
-		      int target, int refclk, intel_clock_t *best_clock);
+intel_find_pll_ironlake_dp(const intel_limit_t *, struct drm_crtc *crtc,
+			   int target, int refclk, intel_clock_t *best_clock);
 
 static const intel_limit_t intel_limits_i8xx_dvo = {
         .dot = { .min = I8XX_DOT_MIN,		.max = I8XX_DOT_MAX },
@@ -294,7 +348,6 @@
 	.p2  = { .dot_limit = I8XX_P2_SLOW_LIMIT,
 		 .p2_slow = I8XX_P2_SLOW,	.p2_fast = I8XX_P2_FAST },
 	.find_pll = intel_find_best_PLL,
-	.find_reduced_pll = intel_find_best_reduced_PLL,
 };
 
 static const intel_limit_t intel_limits_i8xx_lvds = {
@@ -309,7 +362,6 @@
 	.p2  = { .dot_limit = I8XX_P2_SLOW_LIMIT,
 		 .p2_slow = I8XX_P2_LVDS_SLOW,	.p2_fast = I8XX_P2_LVDS_FAST },
 	.find_pll = intel_find_best_PLL,
-	.find_reduced_pll = intel_find_best_reduced_PLL,
 };
 	
 static const intel_limit_t intel_limits_i9xx_sdvo = {
@@ -324,7 +376,6 @@
 	.p2  = { .dot_limit = I9XX_P2_SDVO_DAC_SLOW_LIMIT,
 		 .p2_slow = I9XX_P2_SDVO_DAC_SLOW,	.p2_fast = I9XX_P2_SDVO_DAC_FAST },
 	.find_pll = intel_find_best_PLL,
-	.find_reduced_pll = intel_find_best_reduced_PLL,
 };
 
 static const intel_limit_t intel_limits_i9xx_lvds = {
@@ -342,7 +393,6 @@
 	.p2  = { .dot_limit = I9XX_P2_LVDS_SLOW_LIMIT,
 		 .p2_slow = I9XX_P2_LVDS_SLOW,	.p2_fast = I9XX_P2_LVDS_FAST },
 	.find_pll = intel_find_best_PLL,
-	.find_reduced_pll = intel_find_best_reduced_PLL,
 };
 
     /* below parameter and function is for G4X Chipset Family*/
@@ -360,7 +410,6 @@
 		 .p2_fast = G4X_P2_SDVO_FAST
 	},
 	.find_pll = intel_g4x_find_best_PLL,
-	.find_reduced_pll = intel_g4x_find_best_PLL,
 };
 
 static const intel_limit_t intel_limits_g4x_hdmi = {
@@ -377,7 +426,6 @@
 		 .p2_fast = G4X_P2_HDMI_DAC_FAST
 	},
 	.find_pll = intel_g4x_find_best_PLL,
-	.find_reduced_pll = intel_g4x_find_best_PLL,
 };
 
 static const intel_limit_t intel_limits_g4x_single_channel_lvds = {
@@ -402,7 +450,6 @@
 		 .p2_fast = G4X_P2_SINGLE_CHANNEL_LVDS_FAST
 	},
 	.find_pll = intel_g4x_find_best_PLL,
-	.find_reduced_pll = intel_g4x_find_best_PLL,
 };
 
 static const intel_limit_t intel_limits_g4x_dual_channel_lvds = {
@@ -427,7 +474,6 @@
 		 .p2_fast = G4X_P2_DUAL_CHANNEL_LVDS_FAST
 	},
 	.find_pll = intel_g4x_find_best_PLL,
-	.find_reduced_pll = intel_g4x_find_best_PLL,
 };
 
 static const intel_limit_t intel_limits_g4x_display_port = {
@@ -453,74 +499,162 @@
         .find_pll = intel_find_pll_g4x_dp,
 };
 
-static const intel_limit_t intel_limits_igd_sdvo = {
+static const intel_limit_t intel_limits_pineview_sdvo = {
         .dot = { .min = I9XX_DOT_MIN,		.max = I9XX_DOT_MAX},
-        .vco = { .min = IGD_VCO_MIN,		.max = IGD_VCO_MAX },
-        .n   = { .min = IGD_N_MIN,		.max = IGD_N_MAX },
-        .m   = { .min = IGD_M_MIN,		.max = IGD_M_MAX },
-        .m1  = { .min = IGD_M1_MIN,		.max = IGD_M1_MAX },
-        .m2  = { .min = IGD_M2_MIN,		.max = IGD_M2_MAX },
+        .vco = { .min = PINEVIEW_VCO_MIN,		.max = PINEVIEW_VCO_MAX },
+        .n   = { .min = PINEVIEW_N_MIN,		.max = PINEVIEW_N_MAX },
+        .m   = { .min = PINEVIEW_M_MIN,		.max = PINEVIEW_M_MAX },
+        .m1  = { .min = PINEVIEW_M1_MIN,		.max = PINEVIEW_M1_MAX },
+        .m2  = { .min = PINEVIEW_M2_MIN,		.max = PINEVIEW_M2_MAX },
         .p   = { .min = I9XX_P_SDVO_DAC_MIN,    .max = I9XX_P_SDVO_DAC_MAX },
         .p1  = { .min = I9XX_P1_MIN,		.max = I9XX_P1_MAX },
 	.p2  = { .dot_limit = I9XX_P2_SDVO_DAC_SLOW_LIMIT,
 		 .p2_slow = I9XX_P2_SDVO_DAC_SLOW,	.p2_fast = I9XX_P2_SDVO_DAC_FAST },
 	.find_pll = intel_find_best_PLL,
-	.find_reduced_pll = intel_find_best_reduced_PLL,
 };
 
-static const intel_limit_t intel_limits_igd_lvds = {
+static const intel_limit_t intel_limits_pineview_lvds = {
         .dot = { .min = I9XX_DOT_MIN,		.max = I9XX_DOT_MAX },
-        .vco = { .min = IGD_VCO_MIN,		.max = IGD_VCO_MAX },
-        .n   = { .min = IGD_N_MIN,		.max = IGD_N_MAX },
-        .m   = { .min = IGD_M_MIN,		.max = IGD_M_MAX },
-        .m1  = { .min = IGD_M1_MIN,		.max = IGD_M1_MAX },
-        .m2  = { .min = IGD_M2_MIN,		.max = IGD_M2_MAX },
-        .p   = { .min = IGD_P_LVDS_MIN,	.max = IGD_P_LVDS_MAX },
+        .vco = { .min = PINEVIEW_VCO_MIN,		.max = PINEVIEW_VCO_MAX },
+        .n   = { .min = PINEVIEW_N_MIN,		.max = PINEVIEW_N_MAX },
+        .m   = { .min = PINEVIEW_M_MIN,		.max = PINEVIEW_M_MAX },
+        .m1  = { .min = PINEVIEW_M1_MIN,		.max = PINEVIEW_M1_MAX },
+        .m2  = { .min = PINEVIEW_M2_MIN,		.max = PINEVIEW_M2_MAX },
+        .p   = { .min = PINEVIEW_P_LVDS_MIN,	.max = PINEVIEW_P_LVDS_MAX },
         .p1  = { .min = I9XX_P1_MIN,		.max = I9XX_P1_MAX },
-	/* IGD only supports single-channel mode. */
+	/* Pineview only supports single-channel mode. */
 	.p2  = { .dot_limit = I9XX_P2_LVDS_SLOW_LIMIT,
 		 .p2_slow = I9XX_P2_LVDS_SLOW,	.p2_fast = I9XX_P2_LVDS_SLOW },
 	.find_pll = intel_find_best_PLL,
-	.find_reduced_pll = intel_find_best_reduced_PLL,
 };
 
-static const intel_limit_t intel_limits_igdng_sdvo = {
-	.dot = { .min = IGDNG_DOT_MIN,          .max = IGDNG_DOT_MAX },
-	.vco = { .min = IGDNG_VCO_MIN,          .max = IGDNG_VCO_MAX },
-	.n   = { .min = IGDNG_N_MIN,            .max = IGDNG_N_MAX },
-	.m   = { .min = IGDNG_M_MIN,            .max = IGDNG_M_MAX },
-	.m1  = { .min = IGDNG_M1_MIN,           .max = IGDNG_M1_MAX },
-	.m2  = { .min = IGDNG_M2_MIN,           .max = IGDNG_M2_MAX },
-	.p   = { .min = IGDNG_P_SDVO_DAC_MIN,   .max = IGDNG_P_SDVO_DAC_MAX },
-	.p1  = { .min = IGDNG_P1_MIN,           .max = IGDNG_P1_MAX },
-	.p2  = { .dot_limit = IGDNG_P2_DOT_LIMIT,
-		 .p2_slow = IGDNG_P2_SDVO_DAC_SLOW,
-		 .p2_fast = IGDNG_P2_SDVO_DAC_FAST },
-	.find_pll = intel_igdng_find_best_PLL,
+static const intel_limit_t intel_limits_ironlake_dac = {
+	.dot = { .min = IRONLAKE_DOT_MIN,          .max = IRONLAKE_DOT_MAX },
+	.vco = { .min = IRONLAKE_VCO_MIN,          .max = IRONLAKE_VCO_MAX },
+	.n   = { .min = IRONLAKE_DAC_N_MIN,        .max = IRONLAKE_DAC_N_MAX },
+	.m   = { .min = IRONLAKE_DAC_M_MIN,        .max = IRONLAKE_DAC_M_MAX },
+	.m1  = { .min = IRONLAKE_M1_MIN,           .max = IRONLAKE_M1_MAX },
+	.m2  = { .min = IRONLAKE_M2_MIN,           .max = IRONLAKE_M2_MAX },
+	.p   = { .min = IRONLAKE_DAC_P_MIN,	   .max = IRONLAKE_DAC_P_MAX },
+	.p1  = { .min = IRONLAKE_DAC_P1_MIN,       .max = IRONLAKE_DAC_P1_MAX },
+	.p2  = { .dot_limit = IRONLAKE_P2_DOT_LIMIT,
+		 .p2_slow = IRONLAKE_DAC_P2_SLOW,
+		 .p2_fast = IRONLAKE_DAC_P2_FAST },
+	.find_pll = intel_g4x_find_best_PLL,
+};
+
+static const intel_limit_t intel_limits_ironlake_single_lvds = {
+	.dot = { .min = IRONLAKE_DOT_MIN,          .max = IRONLAKE_DOT_MAX },
+	.vco = { .min = IRONLAKE_VCO_MIN,          .max = IRONLAKE_VCO_MAX },
+	.n   = { .min = IRONLAKE_LVDS_S_N_MIN,     .max = IRONLAKE_LVDS_S_N_MAX },
+	.m   = { .min = IRONLAKE_LVDS_S_M_MIN,     .max = IRONLAKE_LVDS_S_M_MAX },
+	.m1  = { .min = IRONLAKE_M1_MIN,           .max = IRONLAKE_M1_MAX },
+	.m2  = { .min = IRONLAKE_M2_MIN,           .max = IRONLAKE_M2_MAX },
+	.p   = { .min = IRONLAKE_LVDS_S_P_MIN,     .max = IRONLAKE_LVDS_S_P_MAX },
+	.p1  = { .min = IRONLAKE_LVDS_S_P1_MIN,    .max = IRONLAKE_LVDS_S_P1_MAX },
+	.p2  = { .dot_limit = IRONLAKE_P2_DOT_LIMIT,
+		 .p2_slow = IRONLAKE_LVDS_S_P2_SLOW,
+		 .p2_fast = IRONLAKE_LVDS_S_P2_FAST },
+	.find_pll = intel_g4x_find_best_PLL,
+};
+
+static const intel_limit_t intel_limits_ironlake_dual_lvds = {
+	.dot = { .min = IRONLAKE_DOT_MIN,          .max = IRONLAKE_DOT_MAX },
+	.vco = { .min = IRONLAKE_VCO_MIN,          .max = IRONLAKE_VCO_MAX },
+	.n   = { .min = IRONLAKE_LVDS_D_N_MIN,     .max = IRONLAKE_LVDS_D_N_MAX },
+	.m   = { .min = IRONLAKE_LVDS_D_M_MIN,     .max = IRONLAKE_LVDS_D_M_MAX },
+	.m1  = { .min = IRONLAKE_M1_MIN,           .max = IRONLAKE_M1_MAX },
+	.m2  = { .min = IRONLAKE_M2_MIN,           .max = IRONLAKE_M2_MAX },
+	.p   = { .min = IRONLAKE_LVDS_D_P_MIN,     .max = IRONLAKE_LVDS_D_P_MAX },
+	.p1  = { .min = IRONLAKE_LVDS_D_P1_MIN,    .max = IRONLAKE_LVDS_D_P1_MAX },
+	.p2  = { .dot_limit = IRONLAKE_P2_DOT_LIMIT,
+		 .p2_slow = IRONLAKE_LVDS_D_P2_SLOW,
+		 .p2_fast = IRONLAKE_LVDS_D_P2_FAST },
+	.find_pll = intel_g4x_find_best_PLL,
+};
+
+static const intel_limit_t intel_limits_ironlake_single_lvds_100m = {
+	.dot = { .min = IRONLAKE_DOT_MIN,          .max = IRONLAKE_DOT_MAX },
+	.vco = { .min = IRONLAKE_VCO_MIN,          .max = IRONLAKE_VCO_MAX },
+	.n   = { .min = IRONLAKE_LVDS_S_SSC_N_MIN, .max = IRONLAKE_LVDS_S_SSC_N_MAX },
+	.m   = { .min = IRONLAKE_LVDS_S_SSC_M_MIN, .max = IRONLAKE_LVDS_S_SSC_M_MAX },
+	.m1  = { .min = IRONLAKE_M1_MIN,           .max = IRONLAKE_M1_MAX },
+	.m2  = { .min = IRONLAKE_M2_MIN,           .max = IRONLAKE_M2_MAX },
+	.p   = { .min = IRONLAKE_LVDS_S_SSC_P_MIN, .max = IRONLAKE_LVDS_S_SSC_P_MAX },
+	.p1  = { .min = IRONLAKE_LVDS_S_SSC_P1_MIN,.max = IRONLAKE_LVDS_S_SSC_P1_MAX },
+	.p2  = { .dot_limit = IRONLAKE_P2_DOT_LIMIT,
+		 .p2_slow = IRONLAKE_LVDS_S_SSC_P2_SLOW,
+		 .p2_fast = IRONLAKE_LVDS_S_SSC_P2_FAST },
+	.find_pll = intel_g4x_find_best_PLL,
+};
+
+static const intel_limit_t intel_limits_ironlake_dual_lvds_100m = {
+	.dot = { .min = IRONLAKE_DOT_MIN,          .max = IRONLAKE_DOT_MAX },
+	.vco = { .min = IRONLAKE_VCO_MIN,          .max = IRONLAKE_VCO_MAX },
+	.n   = { .min = IRONLAKE_LVDS_D_SSC_N_MIN, .max = IRONLAKE_LVDS_D_SSC_N_MAX },
+	.m   = { .min = IRONLAKE_LVDS_D_SSC_M_MIN, .max = IRONLAKE_LVDS_D_SSC_M_MAX },
+	.m1  = { .min = IRONLAKE_M1_MIN,           .max = IRONLAKE_M1_MAX },
+	.m2  = { .min = IRONLAKE_M2_MIN,           .max = IRONLAKE_M2_MAX },
+	.p   = { .min = IRONLAKE_LVDS_D_SSC_P_MIN, .max = IRONLAKE_LVDS_D_SSC_P_MAX },
+	.p1  = { .min = IRONLAKE_LVDS_D_SSC_P1_MIN,.max = IRONLAKE_LVDS_D_SSC_P1_MAX },
+	.p2  = { .dot_limit = IRONLAKE_P2_DOT_LIMIT,
+		 .p2_slow = IRONLAKE_LVDS_D_SSC_P2_SLOW,
+		 .p2_fast = IRONLAKE_LVDS_D_SSC_P2_FAST },
+	.find_pll = intel_g4x_find_best_PLL,
 };
 
-static const intel_limit_t intel_limits_igdng_lvds = {
-	.dot = { .min = IGDNG_DOT_MIN,          .max = IGDNG_DOT_MAX },
-	.vco = { .min = IGDNG_VCO_MIN,          .max = IGDNG_VCO_MAX },
-	.n   = { .min = IGDNG_N_MIN,            .max = IGDNG_N_MAX },
-	.m   = { .min = IGDNG_M_MIN,            .max = IGDNG_M_MAX },
-	.m1  = { .min = IGDNG_M1_MIN,           .max = IGDNG_M1_MAX },
-	.m2  = { .min = IGDNG_M2_MIN,           .max = IGDNG_M2_MAX },
-	.p   = { .min = IGDNG_P_LVDS_MIN,       .max = IGDNG_P_LVDS_MAX },
-	.p1  = { .min = IGDNG_P1_MIN,           .max = IGDNG_P1_MAX },
-	.p2  = { .dot_limit = IGDNG_P2_DOT_LIMIT,
-		 .p2_slow = IGDNG_P2_LVDS_SLOW,
-		 .p2_fast = IGDNG_P2_LVDS_FAST },
-	.find_pll = intel_igdng_find_best_PLL,
+static const intel_limit_t intel_limits_ironlake_display_port = {
+        .dot = { .min = IRONLAKE_DOT_MIN,
+                 .max = IRONLAKE_DOT_MAX },
+        .vco = { .min = IRONLAKE_VCO_MIN,
+                 .max = IRONLAKE_VCO_MAX},
+        .n   = { .min = IRONLAKE_DP_N_MIN,
+                 .max = IRONLAKE_DP_N_MAX },
+        .m   = { .min = IRONLAKE_DP_M_MIN,
+                 .max = IRONLAKE_DP_M_MAX },
+        .m1  = { .min = IRONLAKE_M1_MIN,
+                 .max = IRONLAKE_M1_MAX },
+        .m2  = { .min = IRONLAKE_M2_MIN,
+                 .max = IRONLAKE_M2_MAX },
+        .p   = { .min = IRONLAKE_DP_P_MIN,
+                 .max = IRONLAKE_DP_P_MAX },
+        .p1  = { .min = IRONLAKE_DP_P1_MIN,
+                 .max = IRONLAKE_DP_P1_MAX},
+        .p2  = { .dot_limit = IRONLAKE_DP_P2_LIMIT,
+                 .p2_slow = IRONLAKE_DP_P2_SLOW,
+                 .p2_fast = IRONLAKE_DP_P2_FAST },
+        .find_pll = intel_find_pll_ironlake_dp,
 };
 
-static const intel_limit_t *intel_igdng_limit(struct drm_crtc *crtc)
+static const intel_limit_t *intel_ironlake_limit(struct drm_crtc *crtc)
 {
+	struct drm_device *dev = crtc->dev;
+	struct drm_i915_private *dev_priv = dev->dev_private;
 	const intel_limit_t *limit;
-	if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS))
-		limit = &intel_limits_igdng_lvds;
+	int refclk = 120;
+
+	if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
+		if (dev_priv->lvds_use_ssc && dev_priv->lvds_ssc_freq == 100)
+			refclk = 100;
+
+		if ((I915_READ(PCH_LVDS) & LVDS_CLKB_POWER_MASK) ==
+		    LVDS_CLKB_POWER_UP) {
+			/* LVDS dual channel */
+			if (refclk == 100)
+				limit = &intel_limits_ironlake_dual_lvds_100m;
+			else
+				limit = &intel_limits_ironlake_dual_lvds;
+		} else {
+			if (refclk == 100)
+				limit = &intel_limits_ironlake_single_lvds_100m;
+			else
+				limit = &intel_limits_ironlake_single_lvds;
+		}
+	} else if (intel_pipe_has_type(crtc, INTEL_OUTPUT_DISPLAYPORT) ||
+			HAS_eDP)
+		limit = &intel_limits_ironlake_display_port;
 	else
-		limit = &intel_limits_igdng_sdvo;
+		limit = &intel_limits_ironlake_dac;
 
 	return limit;
 }
@@ -557,20 +691,20 @@
 	struct drm_device *dev = crtc->dev;
 	const intel_limit_t *limit;
 
-	if (IS_IGDNG(dev))
-		limit = intel_igdng_limit(crtc);
+	if (HAS_PCH_SPLIT(dev))
+		limit = intel_ironlake_limit(crtc);
 	else if (IS_G4X(dev)) {
 		limit = intel_g4x_limit(crtc);
-	} else if (IS_I9XX(dev) && !IS_IGD(dev)) {
+	} else if (IS_I9XX(dev) && !IS_PINEVIEW(dev)) {
 		if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS))
 			limit = &intel_limits_i9xx_lvds;
 		else
 			limit = &intel_limits_i9xx_sdvo;
-	} else if (IS_IGD(dev)) {
+	} else if (IS_PINEVIEW(dev)) {
 		if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS))
-			limit = &intel_limits_igd_lvds;
+			limit = &intel_limits_pineview_lvds;
 		else
-			limit = &intel_limits_igd_sdvo;
+			limit = &intel_limits_pineview_sdvo;
 	} else {
 		if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS))
 			limit = &intel_limits_i8xx_lvds;
@@ -580,8 +714,8 @@
 	return limit;
 }
 
-/* m1 is reserved as 0 in IGD, n is a ring counter */
-static void igd_clock(int refclk, intel_clock_t *clock)
+/* m1 is reserved as 0 in Pineview, n is a ring counter */
+static void pineview_clock(int refclk, intel_clock_t *clock)
 {
 	clock->m = clock->m2 + 2;
 	clock->p = clock->p1 * clock->p2;
@@ -591,8 +725,8 @@
 
 static void intel_clock(struct drm_device *dev, int refclk, intel_clock_t *clock)
 {
-	if (IS_IGD(dev)) {
-		igd_clock(refclk, clock);
+	if (IS_PINEVIEW(dev)) {
+		pineview_clock(refclk, clock);
 		return;
 	}
 	clock->m = 5 * (clock->m1 + 2) + (clock->m2 + 2);
@@ -657,7 +791,7 @@
 		INTELPllInvalid ("m2 out of range\n");
 	if (clock->m1  < limit->m1.min  || limit->m1.max  < clock->m1)
 		INTELPllInvalid ("m1 out of range\n");
-	if (clock->m1 <= clock->m2 && !IS_IGD(dev))
+	if (clock->m1 <= clock->m2 && !IS_PINEVIEW(dev))
 		INTELPllInvalid ("m1 <= m2\n");
 	if (clock->m   < limit->m.min   || limit->m.max   < clock->m)
 		INTELPllInvalid ("m out of range\n");
@@ -706,16 +840,17 @@
 
 	memset (best_clock, 0, sizeof (*best_clock));
 
-	for (clock.p1 = limit->p1.max; clock.p1 >= limit->p1.min; clock.p1--) {
-		for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max;
-		     clock.m1++) {
-			for (clock.m2 = limit->m2.min;
-			     clock.m2 <= limit->m2.max; clock.m2++) {
-				/* m1 is always 0 in IGD */
-				if (clock.m2 >= clock.m1 && !IS_IGD(dev))
-					break;
-				for (clock.n = limit->n.min;
-				     clock.n <= limit->n.max; clock.n++) {
+	for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max;
+	     clock.m1++) {
+		for (clock.m2 = limit->m2.min;
+		     clock.m2 <= limit->m2.max; clock.m2++) {
+			/* m1 is always 0 in Pineview */
+			if (clock.m2 >= clock.m1 && !IS_PINEVIEW(dev))
+				break;
+			for (clock.n = limit->n.min;
+			     clock.n <= limit->n.max; clock.n++) {
+				for (clock.p1 = limit->p1.min;
+					clock.p1 <= limit->p1.max; clock.p1++) {
 					int this_err;
 
 					intel_clock(dev, refclk, &clock);
@@ -736,46 +871,6 @@
 	return (err != target);
 }
 
-
-static bool
-intel_find_best_reduced_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
-			    int target, int refclk, intel_clock_t *best_clock)
-
-{
-	struct drm_device *dev = crtc->dev;
-	intel_clock_t clock;
-	int err = target;
-	bool found = false;
-
-	memcpy(&clock, best_clock, sizeof(intel_clock_t));
-
-	for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max; clock.m1++) {
-		for (clock.m2 = limit->m2.min; clock.m2 <= limit->m2.max; clock.m2++) {
-			/* m1 is always 0 in IGD */
-			if (clock.m2 >= clock.m1 && !IS_IGD(dev))
-				break;
-			for (clock.n = limit->n.min; clock.n <= limit->n.max;
-			     clock.n++) {
-				int this_err;
-
-				intel_clock(dev, refclk, &clock);
-
-				if (!intel_PLL_is_valid(crtc, &clock))
-					continue;
-
-				this_err = abs(clock.dot - target);
-				if (this_err < err) {
-					*best_clock = clock;
-					err = this_err;
-					found = true;
-				}
-			}
-		}
-	}
-
-	return found;
-}
-
 static bool
 intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
 			int target, int refclk, intel_clock_t *best_clock)
@@ -785,12 +880,18 @@
 	intel_clock_t clock;
 	int max_n;
 	bool found;
-	/* approximately equals target * 0.00488 */
-	int err_most = (target >> 8) + (target >> 10);
+	/* approximately equals target * 0.00585 */
+	int err_most = (target >> 8) + (target >> 9);
 	found = false;
 
 	if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
-		if ((I915_READ(LVDS) & LVDS_CLKB_POWER_MASK) ==
+		int lvds_reg;
+
+		if (IS_IRONLAKE(dev))
+			lvds_reg = PCH_LVDS;
+		else
+			lvds_reg = LVDS;
+		if ((I915_READ(lvds_reg) & LVDS_CLKB_POWER_MASK) ==
 		    LVDS_CLKB_POWER_UP)
 			clock.p2 = limit->p2.p2_fast;
 		else
@@ -833,11 +934,16 @@
 }
 
 static bool
-intel_find_pll_igdng_dp(const intel_limit_t *limit, struct drm_crtc *crtc,
-		      int target, int refclk, intel_clock_t *best_clock)
+intel_find_pll_ironlake_dp(const intel_limit_t *limit, struct drm_crtc *crtc,
+			   int target, int refclk, intel_clock_t *best_clock)
 {
 	struct drm_device *dev = crtc->dev;
 	intel_clock_t clock;
+
+	/* return directly when it is eDP */
+	if (HAS_eDP)
+		return true;
+
 	if (target < 200000) {
 		clock.n = 1;
 		clock.p1 = 2;
@@ -856,68 +962,6 @@
 	return true;
 }
 
-static bool
-intel_igdng_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
-			int target, int refclk, intel_clock_t *best_clock)
-{
-	struct drm_device *dev = crtc->dev;
-	struct drm_i915_private *dev_priv = dev->dev_private;
-	intel_clock_t clock;
-	int err_most = 47;
-	int err_min = 10000;
-
-	/* eDP has only 2 clock choice, no n/m/p setting */
-	if (HAS_eDP)
-		return true;
-
-	if (intel_pipe_has_type(crtc, INTEL_OUTPUT_DISPLAYPORT))
-		return intel_find_pll_igdng_dp(limit, crtc, target,
-					       refclk, best_clock);
-
-	if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
-		if ((I915_READ(PCH_LVDS) & LVDS_CLKB_POWER_MASK) ==
-		    LVDS_CLKB_POWER_UP)
-			clock.p2 = limit->p2.p2_fast;
-		else
-			clock.p2 = limit->p2.p2_slow;
-	} else {
-		if (target < limit->p2.dot_limit)
-			clock.p2 = limit->p2.p2_slow;
-		else
-			clock.p2 = limit->p2.p2_fast;
-	}
-
-	memset(best_clock, 0, sizeof(*best_clock));
-	for (clock.p1 = limit->p1.max; clock.p1 >= limit->p1.min; clock.p1--) {
-		/* based on hardware requriment prefer smaller n to precision */
-		for (clock.n = limit->n.min; clock.n <= limit->n.max; clock.n++) {
-			/* based on hardware requirment prefere larger m1,m2 */
-			for (clock.m1 = limit->m1.max;
-			     clock.m1 >= limit->m1.min; clock.m1--) {
-				for (clock.m2 = limit->m2.max;
-				     clock.m2 >= limit->m2.min; clock.m2--) {
-					int this_err;
-
-					intel_clock(dev, refclk, &clock);
-					if (!intel_PLL_is_valid(crtc, &clock))
-						continue;
-					this_err = abs((10000 - (target*10000/clock.dot)));
-					if (this_err < err_most) {
-						*best_clock = clock;
-						/* found on first matching */
-						goto out;
-					} else if (this_err < err_min) {
-						*best_clock = clock;
-						err_min = this_err;
-					}
-				}
-			}
-		}
-	}
-out:
-	return true;
-}
-
 /* DisplayPort has only two frequencies, 162MHz and 270MHz */
 static bool
 intel_find_pll_g4x_dp(const intel_limit_t *limit, struct drm_crtc *crtc,
@@ -949,7 +993,7 @@
 intel_wait_for_vblank(struct drm_device *dev)
 {
 	/* Wait for 20ms, i.e. one cycle at 50hz. */
-	mdelay(20);
+	msleep(20);
 }
 
 /* Parameters have changed, update FBC info */
@@ -988,13 +1032,15 @@
 
 	/* enable it... */
 	fbc_ctl = FBC_CTL_EN | FBC_CTL_PERIODIC;
+	if (IS_I945GM(dev))
+		fbc_ctl |= FBC_C3_IDLE; /* 945 needs special SR handling */
 	fbc_ctl |= (dev_priv->cfb_pitch & 0xff) << FBC_CTL_STRIDE_SHIFT;
 	fbc_ctl |= (interval & 0x2fff) << FBC_CTL_INTERVAL_SHIFT;
 	if (obj_priv->tiling_mode != I915_TILING_NONE)
 		fbc_ctl |= dev_priv->cfb_fence;
 	I915_WRITE(FBC_CONTROL, fbc_ctl);
 
-	DRM_DEBUG("enabled FBC, pitch %ld, yoff %d, plane %d, ",
+	DRM_DEBUG_KMS("enabled FBC, pitch %ld, yoff %d, plane %d, ",
 		  dev_priv->cfb_pitch, crtc->y, dev_priv->cfb_plane);
 }
 
@@ -1017,7 +1063,7 @@
 
 	intel_wait_for_vblank(dev);
 
-	DRM_DEBUG("disabled FBC\n");
+	DRM_DEBUG_KMS("disabled FBC\n");
 }
 
 static bool i8xx_fbc_enabled(struct drm_crtc *crtc)
@@ -1062,7 +1108,7 @@
 	/* enable it... */
 	I915_WRITE(DPFC_CONTROL, I915_READ(DPFC_CONTROL) | DPFC_CTL_EN);
 
-	DRM_DEBUG("enabled fbc on plane %d\n", intel_crtc->plane);
+	DRM_DEBUG_KMS("enabled fbc on plane %d\n", intel_crtc->plane);
 }
 
 void g4x_disable_fbc(struct drm_device *dev)
@@ -1076,7 +1122,7 @@
 	I915_WRITE(DPFC_CONTROL, dpfc_ctl);
 	intel_wait_for_vblank(dev);
 
-	DRM_DEBUG("disabled FBC\n");
+	DRM_DEBUG_KMS("disabled FBC\n");
 }
 
 static bool g4x_fbc_enabled(struct drm_crtc *crtc)
@@ -1115,8 +1161,12 @@
 	struct drm_framebuffer *fb = crtc->fb;
 	struct intel_framebuffer *intel_fb;
 	struct drm_i915_gem_object *obj_priv;
+	struct drm_crtc *tmp_crtc;
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 	int plane = intel_crtc->plane;
+	int crtcs_enabled = 0;
+
+	DRM_DEBUG_KMS("\n");
 
 	if (!i915_powersave)
 		return;
@@ -1136,30 +1186,42 @@
 	 * If FBC is already on, we just have to verify that we can
 	 * keep it that way...
 	 * Need to disable if:
+	 *   - more than one pipe is active
 	 *   - changing FBC params (stride, fence, mode)
 	 *   - new fb is too large to fit in compressed buffer
 	 *   - going to an unsupported config (interlace, pixel multiply, etc.)
 	 */
+	list_for_each_entry(tmp_crtc, &dev->mode_config.crtc_list, head) {
+		if (tmp_crtc->enabled)
+			crtcs_enabled++;
+	}
+	DRM_DEBUG_KMS("%d pipes active\n", crtcs_enabled);
+	if (crtcs_enabled > 1) {
+		DRM_DEBUG_KMS("more than one pipe active, disabling compression\n");
+		goto out_disable;
+	}
 	if (intel_fb->obj->size > dev_priv->cfb_size) {
-		DRM_DEBUG("framebuffer too large, disabling compression\n");
+		DRM_DEBUG_KMS("framebuffer too large, disabling "
+				"compression\n");
 		goto out_disable;
 	}
 	if ((mode->flags & DRM_MODE_FLAG_INTERLACE) ||
 	    (mode->flags & DRM_MODE_FLAG_DBLSCAN)) {
-		DRM_DEBUG("mode incompatible with compression, disabling\n");
+		DRM_DEBUG_KMS("mode incompatible with compression, "
+				"disabling\n");
 		goto out_disable;
 	}
 	if ((mode->hdisplay > 2048) ||
 	    (mode->vdisplay > 1536)) {
-		DRM_DEBUG("mode too large for compression, disabling\n");
+		DRM_DEBUG_KMS("mode too large for compression, disabling\n");
 		goto out_disable;
 	}
 	if ((IS_I915GM(dev) || IS_I945GM(dev)) && plane != 0) {
-		DRM_DEBUG("plane not 0, disabling compression\n");
+		DRM_DEBUG_KMS("plane not 0, disabling compression\n");
 		goto out_disable;
 	}
 	if (obj_priv->tiling_mode != I915_TILING_X) {
-		DRM_DEBUG("framebuffer not tiled, disabling compression\n");
+		DRM_DEBUG_KMS("framebuffer not tiled, disabling compression\n");
 		goto out_disable;
 	}
 
@@ -1181,13 +1243,57 @@
 	return;
 
 out_disable:
-	DRM_DEBUG("unsupported config, disabling FBC\n");
+	DRM_DEBUG_KMS("unsupported config, disabling FBC\n");
 	/* Multiple disables should be harmless */
 	if (dev_priv->display.fbc_enabled(crtc))
 		dev_priv->display.disable_fbc(dev);
 }
 
 static int
+intel_pin_and_fence_fb_obj(struct drm_device *dev, struct drm_gem_object *obj)
+{
+	struct drm_i915_gem_object *obj_priv = obj->driver_private;
+	u32 alignment;
+	int ret;
+
+	switch (obj_priv->tiling_mode) {
+	case I915_TILING_NONE:
+		alignment = 64 * 1024;
+		break;
+	case I915_TILING_X:
+		/* pin() will align the object as required by fence */
+		alignment = 0;
+		break;
+	case I915_TILING_Y:
+		/* FIXME: Is this true? */
+		DRM_ERROR("Y tiled not allowed for scan out buffers\n");
+		return -EINVAL;
+	default:
+		BUG();
+	}
+
+	ret = i915_gem_object_pin(obj, alignment);
+	if (ret != 0)
+		return ret;
+
+	/* Install a fence for tiled scan-out. Pre-i965 always needs a
+	 * fence, whereas 965+ only requires a fence if using
+	 * framebuffer compression.  For simplicity, we always install
+	 * a fence as the cost is not that onerous.
+	 */
+	if (obj_priv->fence_reg == I915_FENCE_REG_NONE &&
+	    obj_priv->tiling_mode != I915_TILING_NONE) {
+		ret = i915_gem_object_get_fence_reg(obj);
+		if (ret != 0) {
+			i915_gem_object_unpin(obj);
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
+static int
 intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
 		    struct drm_framebuffer *old_fb)
 {
@@ -1206,12 +1312,12 @@
 	int dspstride = (plane == 0) ? DSPASTRIDE : DSPBSTRIDE;
 	int dsptileoff = (plane == 0 ? DSPATILEOFF : DSPBTILEOFF);
 	int dspcntr_reg = (plane == 0) ? DSPACNTR : DSPBCNTR;
-	u32 dspcntr, alignment;
+	u32 dspcntr;
 	int ret;
 
 	/* no fb bound */
 	if (!crtc->fb) {
-		DRM_DEBUG("No FB bound\n");
+		DRM_DEBUG_KMS("No FB bound\n");
 		return 0;
 	}
 
@@ -1228,50 +1334,20 @@
 	obj = intel_fb->obj;
 	obj_priv = obj->driver_private;
 
-	switch (obj_priv->tiling_mode) {
-	case I915_TILING_NONE:
-		alignment = 64 * 1024;
-		break;
-	case I915_TILING_X:
-		/* pin() will align the object as required by fence */
-		alignment = 0;
-		break;
-	case I915_TILING_Y:
-		/* FIXME: Is this true? */
-		DRM_ERROR("Y tiled not allowed for scan out buffers\n");
-		return -EINVAL;
-	default:
-		BUG();
-	}
-
 	mutex_lock(&dev->struct_mutex);
-	ret = i915_gem_object_pin(obj, alignment);
+	ret = intel_pin_and_fence_fb_obj(dev, obj);
 	if (ret != 0) {
 		mutex_unlock(&dev->struct_mutex);
 		return ret;
 	}
 
-	ret = i915_gem_object_set_to_gtt_domain(obj, 1);
+	ret = i915_gem_object_set_to_display_plane(obj);
 	if (ret != 0) {
 		i915_gem_object_unpin(obj);
 		mutex_unlock(&dev->struct_mutex);
 		return ret;
 	}
 
-	/* Install a fence for tiled scan-out. Pre-i965 always needs a fence,
-	 * whereas 965+ only requires a fence if using framebuffer compression.
-	 * For simplicity, we always install a fence as the cost is not that onerous.
-	 */
-	if (obj_priv->fence_reg == I915_FENCE_REG_NONE &&
-	    obj_priv->tiling_mode != I915_TILING_NONE) {
-		ret = i915_gem_object_get_fence_reg(obj);
-		if (ret != 0) {
-			i915_gem_object_unpin(obj);
-			mutex_unlock(&dev->struct_mutex);
-			return ret;
-		}
-	}
-
 	dspcntr = I915_READ(dspcntr_reg);
 	/* Mask out pixel format bits in case we change it */
 	dspcntr &= ~DISPPLANE_PIXFORMAT_MASK;
@@ -1287,7 +1363,10 @@
 		break;
 	case 24:
 	case 32:
-		dspcntr |= DISPPLANE_32BPP_NO_ALPHA;
+		if (crtc->fb->depth == 30)
+			dspcntr |= DISPPLANE_32BPP_30BIT_NO_ALPHA;
+		else
+			dspcntr |= DISPPLANE_32BPP_NO_ALPHA;
 		break;
 	default:
 		DRM_ERROR("Unknown color depth\n");
@@ -1302,7 +1381,7 @@
 			dspcntr &= ~DISPPLANE_TILED;
 	}
 
-	if (IS_IGDNG(dev))
+	if (HAS_PCH_SPLIT(dev))
 		/* must disable */
 		dspcntr |= DISPPLANE_TRICKLE_FEED_DISABLE;
 
@@ -1311,7 +1390,7 @@
 	Start = obj_priv->gtt_offset;
 	Offset = y * crtc->fb->pitch + x * (crtc->fb->bits_per_pixel / 8);
 
-	DRM_DEBUG("Writing base %08lX %08lX %d %d\n", Start, Offset, x, y);
+	DRM_DEBUG_KMS("Writing base %08lX %08lX %d %d\n", Start, Offset, x, y);
 	I915_WRITE(dspstride, crtc->fb->pitch);
 	if (IS_I965G(dev)) {
 		I915_WRITE(dspbase, Offset);
@@ -1363,7 +1442,7 @@
 	u8 sr1;
 	u32 vga_reg;
 
-	if (IS_IGDNG(dev))
+	if (HAS_PCH_SPLIT(dev))
 		vga_reg = CPU_VGACNTRL;
 	else
 		vga_reg = VGACNTRL;
@@ -1379,19 +1458,19 @@
 	I915_WRITE(vga_reg, VGA_DISP_DISABLE);
 }
 
-static void igdng_disable_pll_edp (struct drm_crtc *crtc)
+static void ironlake_disable_pll_edp (struct drm_crtc *crtc)
 {
 	struct drm_device *dev = crtc->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	u32 dpa_ctl;
 
-	DRM_DEBUG("\n");
+	DRM_DEBUG_KMS("\n");
 	dpa_ctl = I915_READ(DP_A);
 	dpa_ctl &= ~DP_PLL_ENABLE;
 	I915_WRITE(DP_A, dpa_ctl);
 }
 
-static void igdng_enable_pll_edp (struct drm_crtc *crtc)
+static void ironlake_enable_pll_edp (struct drm_crtc *crtc)
 {
 	struct drm_device *dev = crtc->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
@@ -1400,17 +1479,18 @@
 	dpa_ctl = I915_READ(DP_A);
 	dpa_ctl |= DP_PLL_ENABLE;
 	I915_WRITE(DP_A, dpa_ctl);
+	POSTING_READ(DP_A);
 	udelay(200);
 }
 
 
-static void igdng_set_pll_edp (struct drm_crtc *crtc, int clock)
+static void ironlake_set_pll_edp (struct drm_crtc *crtc, int clock)
 {
 	struct drm_device *dev = crtc->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	u32 dpa_ctl;
 
-	DRM_DEBUG("eDP PLL enable for clock %d\n", clock);
+	DRM_DEBUG_KMS("eDP PLL enable for clock %d\n", clock);
 	dpa_ctl = I915_READ(DP_A);
 	dpa_ctl &= ~DP_PLL_FREQ_MASK;
 
@@ -1440,7 +1520,7 @@
 	udelay(500);
 }
 
-static void igdng_crtc_dpms(struct drm_crtc *crtc, int mode)
+static void ironlake_crtc_dpms(struct drm_crtc *crtc, int mode)
 {
 	struct drm_device *dev = crtc->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
@@ -1473,6 +1553,10 @@
 	int trans_vsync_reg = (pipe == 0) ? TRANS_VSYNC_A : TRANS_VSYNC_B;
 	u32 temp;
 	int tries = 5, j, n;
+	u32 pipe_bpc;
+
+	temp = I915_READ(pipeconf_reg);
+	pipe_bpc = temp & PIPE_BPC_MASK;
 
 	/* XXX: When our outputs are all unaware of DPMS modes other than off
 	 * and on, we should map those modes to DRM_MODE_DPMS_OFF in the CRTC.
@@ -1481,10 +1565,19 @@
 	case DRM_MODE_DPMS_ON:
 	case DRM_MODE_DPMS_STANDBY:
 	case DRM_MODE_DPMS_SUSPEND:
-		DRM_DEBUG("crtc %d dpms on\n", pipe);
+		DRM_DEBUG_KMS("crtc %d dpms on\n", pipe);
+
+		if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
+			temp = I915_READ(PCH_LVDS);
+			if ((temp & LVDS_PORT_EN) == 0) {
+				I915_WRITE(PCH_LVDS, temp | LVDS_PORT_EN);
+				POSTING_READ(PCH_LVDS);
+			}
+		}
+
 		if (HAS_eDP) {
 			/* enable eDP PLL */
-			igdng_enable_pll_edp(crtc);
+			ironlake_enable_pll_edp(crtc);
 		} else {
 			/* enable PCH DPLL */
 			temp = I915_READ(pch_dpll_reg);
@@ -1495,13 +1588,19 @@
 
 			/* enable PCH FDI RX PLL, wait warmup plus DMI latency */
 			temp = I915_READ(fdi_rx_reg);
+			/*
+			 * make the BPC in FDI Rx be consistent with that in
+			 * pipeconf reg.
+			 */
+			temp &= ~(0x7 << 16);
+			temp |= (pipe_bpc << 11);
 			I915_WRITE(fdi_rx_reg, temp | FDI_RX_PLL_ENABLE |
 					FDI_SEL_PCDCLK |
 					FDI_DP_PORT_WIDTH_X4); /* default 4 lanes */
 			I915_READ(fdi_rx_reg);
 			udelay(200);
 
-			/* Enable CPU FDI TX PLL, always on for IGDNG */
+			/* Enable CPU FDI TX PLL, always on for Ironlake */
 			temp = I915_READ(fdi_tx_reg);
 			if ((temp & FDI_TX_PLL_ENABLE) == 0) {
 				I915_WRITE(fdi_tx_reg, temp | FDI_TX_PLL_ENABLE);
@@ -1568,12 +1667,13 @@
 			udelay(150);
 
 			temp = I915_READ(fdi_rx_iir_reg);
-			DRM_DEBUG("FDI_RX_IIR 0x%x\n", temp);
+			DRM_DEBUG_KMS("FDI_RX_IIR 0x%x\n", temp);
 
 			if ((temp & FDI_RX_BIT_LOCK) == 0) {
 				for (j = 0; j < tries; j++) {
 					temp = I915_READ(fdi_rx_iir_reg);
-					DRM_DEBUG("FDI_RX_IIR 0x%x\n", temp);
+					DRM_DEBUG_KMS("FDI_RX_IIR 0x%x\n",
+								temp);
 					if (temp & FDI_RX_BIT_LOCK)
 						break;
 					udelay(200);
@@ -1582,11 +1682,11 @@
 					I915_WRITE(fdi_rx_iir_reg,
 							temp | FDI_RX_BIT_LOCK);
 				else
-					DRM_DEBUG("train 1 fail\n");
+					DRM_DEBUG_KMS("train 1 fail\n");
 			} else {
 				I915_WRITE(fdi_rx_iir_reg,
 						temp | FDI_RX_BIT_LOCK);
-				DRM_DEBUG("train 1 ok 2!\n");
+				DRM_DEBUG_KMS("train 1 ok 2!\n");
 			}
 			temp = I915_READ(fdi_tx_reg);
 			temp &= ~FDI_LINK_TRAIN_NONE;
@@ -1601,12 +1701,13 @@
 			udelay(150);
 
 			temp = I915_READ(fdi_rx_iir_reg);
-			DRM_DEBUG("FDI_RX_IIR 0x%x\n", temp);
+			DRM_DEBUG_KMS("FDI_RX_IIR 0x%x\n", temp);
 
 			if ((temp & FDI_RX_SYMBOL_LOCK) == 0) {
 				for (j = 0; j < tries; j++) {
 					temp = I915_READ(fdi_rx_iir_reg);
-					DRM_DEBUG("FDI_RX_IIR 0x%x\n", temp);
+					DRM_DEBUG_KMS("FDI_RX_IIR 0x%x\n",
+								temp);
 					if (temp & FDI_RX_SYMBOL_LOCK)
 						break;
 					udelay(200);
@@ -1614,15 +1715,15 @@
 				if (j != tries) {
 					I915_WRITE(fdi_rx_iir_reg,
 							temp | FDI_RX_SYMBOL_LOCK);
-					DRM_DEBUG("train 2 ok 1!\n");
+					DRM_DEBUG_KMS("train 2 ok 1!\n");
 				} else
-					DRM_DEBUG("train 2 fail\n");
+					DRM_DEBUG_KMS("train 2 fail\n");
 			} else {
 				I915_WRITE(fdi_rx_iir_reg,
 						temp | FDI_RX_SYMBOL_LOCK);
-				DRM_DEBUG("train 2 ok 2!\n");
+				DRM_DEBUG_KMS("train 2 ok 2!\n");
 			}
-			DRM_DEBUG("train done\n");
+			DRM_DEBUG_KMS("train done\n");
 
 			/* set transcoder timing */
 			I915_WRITE(trans_htot_reg, I915_READ(cpu_htot_reg));
@@ -1635,6 +1736,12 @@
 
 			/* enable PCH transcoder */
 			temp = I915_READ(transconf_reg);
+			/*
+			 * make the BPC in transcoder be consistent with
+			 * that in pipeconf reg.
+			 */
+			temp &= ~PIPE_BPC_MASK;
+			temp |= pipe_bpc;
 			I915_WRITE(transconf_reg, temp | TRANS_ENABLE);
 			I915_READ(transconf_reg);
 
@@ -1664,10 +1771,9 @@
 
 	break;
 	case DRM_MODE_DPMS_OFF:
-		DRM_DEBUG("crtc %d dpms off\n", pipe);
-
-		i915_disable_vga(dev);
+		DRM_DEBUG_KMS("crtc %d dpms off\n", pipe);
 
+		drm_vblank_off(dev, pipe);
 		/* Disable display plane */
 		temp = I915_READ(dspcntr_reg);
 		if ((temp & DISPLAY_PLANE_ENABLE) != 0) {
@@ -1677,6 +1783,8 @@
 			I915_READ(dspbase_reg);
 		}
 
+		i915_disable_vga(dev);
+
 		/* disable cpu pipe, disable after all planes disabled */
 		temp = I915_READ(pipeconf_reg);
 		if ((temp & PIPEACONF_ENABLE) != 0) {
@@ -1690,16 +1798,23 @@
 					udelay(500);
 					continue;
 				} else {
-					DRM_DEBUG("pipe %d off delay\n", pipe);
+					DRM_DEBUG_KMS("pipe %d off delay\n",
+								pipe);
 					break;
 				}
 			}
 		} else
-			DRM_DEBUG("crtc %d is disabled\n", pipe);
+			DRM_DEBUG_KMS("crtc %d is disabled\n", pipe);
 
-		if (HAS_eDP) {
-			igdng_disable_pll_edp(crtc);
+		udelay(100);
+
+		/* Disable PF */
+		temp = I915_READ(pf_ctl_reg);
+		if ((temp & PF_ENABLE) != 0) {
+			I915_WRITE(pf_ctl_reg, temp & ~PF_ENABLE);
+			I915_READ(pf_ctl_reg);
 		}
+		I915_WRITE(pf_win_size, 0);
 
 		/* disable CPU FDI tx and PCH FDI rx */
 		temp = I915_READ(fdi_tx_reg);
@@ -1707,6 +1822,9 @@
 		I915_READ(fdi_tx_reg);
 
 		temp = I915_READ(fdi_rx_reg);
+		/* BPC in FDI rx is consistent with that in pipeconf */
+		temp &= ~(0x07 << 16);
+		temp |= (pipe_bpc << 11);
 		I915_WRITE(fdi_rx_reg, temp & ~FDI_RX_ENABLE);
 		I915_READ(fdi_rx_reg);
 
@@ -1725,6 +1843,13 @@
 
 		udelay(100);
 
+		if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
+			temp = I915_READ(PCH_LVDS);
+			I915_WRITE(PCH_LVDS, temp & ~LVDS_PORT_EN);
+			I915_READ(PCH_LVDS);
+			udelay(100);
+		}
+
 		/* disable PCH transcoder */
 		temp = I915_READ(transconf_reg);
 		if ((temp & TRANS_ENABLE) != 0) {
@@ -1738,11 +1863,19 @@
 					udelay(500);
 					continue;
 				} else {
-					DRM_DEBUG("transcoder %d off delay\n", pipe);
+					DRM_DEBUG_KMS("transcoder %d off "
+							"delay\n", pipe);
 					break;
 				}
 			}
 		}
+		temp = I915_READ(transconf_reg);
+		/* BPC in transcoder is consistent with that in pipeconf */
+		temp &= ~PIPE_BPC_MASK;
+		temp |= pipe_bpc;
+		I915_WRITE(transconf_reg, temp);
+		I915_READ(transconf_reg);
+		udelay(100);
 
 		/* disable PCH DPLL */
 		temp = I915_READ(pch_dpll_reg);
@@ -1751,14 +1884,20 @@
 			I915_READ(pch_dpll_reg);
 		}
 
-		temp = I915_READ(fdi_rx_reg);
-		if ((temp & FDI_RX_PLL_ENABLE) != 0) {
-			temp &= ~FDI_SEL_PCDCLK;
-			temp &= ~FDI_RX_PLL_ENABLE;
-			I915_WRITE(fdi_rx_reg, temp);
-			I915_READ(fdi_rx_reg);
+		if (HAS_eDP) {
+			ironlake_disable_pll_edp(crtc);
 		}
 
+		temp = I915_READ(fdi_rx_reg);
+		temp &= ~FDI_SEL_PCDCLK;
+		I915_WRITE(fdi_rx_reg, temp);
+		I915_READ(fdi_rx_reg);
+
+		temp = I915_READ(fdi_rx_reg);
+		temp &= ~FDI_RX_PLL_ENABLE;
+		I915_WRITE(fdi_rx_reg, temp);
+		I915_READ(fdi_rx_reg);
+
 		/* Disable CPU FDI TX PLL */
 		temp = I915_READ(fdi_tx_reg);
 		if ((temp & FDI_TX_PLL_ENABLE) != 0) {
@@ -1767,20 +1906,43 @@
 			udelay(100);
 		}
 
-		/* Disable PF */
-		temp = I915_READ(pf_ctl_reg);
-		if ((temp & PF_ENABLE) != 0) {
-			I915_WRITE(pf_ctl_reg, temp & ~PF_ENABLE);
-			I915_READ(pf_ctl_reg);
-		}
-		I915_WRITE(pf_win_size, 0);
-
 		/* Wait for the clocks to turn off. */
-		udelay(150);
+		udelay(100);
 		break;
 	}
 }
 
+static void intel_crtc_dpms_overlay(struct intel_crtc *intel_crtc, bool enable)
+{
+	struct intel_overlay *overlay;
+	int ret;
+
+	if (!enable && intel_crtc->overlay) {
+		overlay = intel_crtc->overlay;
+		mutex_lock(&overlay->dev->struct_mutex);
+		for (;;) {
+			ret = intel_overlay_switch_off(overlay);
+			if (ret == 0)
+				break;
+
+			ret = intel_overlay_recover_from_interrupt(overlay, 0);
+			if (ret != 0) {
+				/* overlay doesn't react anymore. Usually
+				 * results in a black screen and an unkillable
+				 * X server. */
+				BUG();
+				overlay->hw_wedged = HW_WEDGED;
+				break;
+			}
+		}
+		mutex_unlock(&overlay->dev->struct_mutex);
+	}
+	/* Let userspace switch the overlay on again. In most cases userspace
+	 * has to recompute where to put it anyway. */
+
+	return;
+}
+
 static void i9xx_crtc_dpms(struct drm_crtc *crtc, int mode)
 {
 	struct drm_device *dev = crtc->dev;
@@ -1839,12 +2001,14 @@
 			intel_update_fbc(crtc, &crtc->mode);
 
 		/* Give the overlay scaler a chance to enable if it's on this pipe */
-		//intel_crtc_dpms_video(crtc, true); TODO
+		intel_crtc_dpms_overlay(intel_crtc, true);
 	break;
 	case DRM_MODE_DPMS_OFF:
 		intel_update_watermarks(dev);
+
 		/* Give the overlay scaler a chance to disable if it's on this pipe */
-		//intel_crtc_dpms_video(crtc, FALSE); TODO
+		intel_crtc_dpms_overlay(intel_crtc, false);
+		drm_vblank_off(dev, pipe);
 
 		if (dev_priv->cfb_plane == plane &&
 		    dev_priv->display.disable_fbc)
@@ -1904,6 +2068,9 @@
 	int pipe = intel_crtc->pipe;
 	bool enabled;
 
+	if (intel_crtc->dpms_mode == mode)
+		return;
+
 	dev_priv->display.dpms(crtc, mode);
 
 	intel_crtc->dpms_mode = mode;
@@ -1963,7 +2130,7 @@
 				  struct drm_display_mode *adjusted_mode)
 {
 	struct drm_device *dev = crtc->dev;
-	if (IS_IGDNG(dev)) {
+	if (HAS_PCH_SPLIT(dev)) {
 		/* FDI link clock is fixed at 2.7G */
 		if (mode->clock * 3 > 27000 * 4)
 			return MODE_CLOCK_HIGH;
@@ -2039,7 +2206,7 @@
  * Return the pipe currently connected to the panel fitter,
  * or -1 if the panel fitter is not present or not in use
  */
-static int intel_panel_fitter_pipe (struct drm_device *dev)
+int intel_panel_fitter_pipe (struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	u32  pfit_control;
@@ -2083,9 +2250,8 @@
 #define LINK_N 0x80000
 
 static void
-igdng_compute_m_n(int bits_per_pixel, int nlanes,
-		int pixel_clock, int link_clock,
-		struct fdi_m_n *m_n)
+ironlake_compute_m_n(int bits_per_pixel, int nlanes, int pixel_clock,
+		     int link_clock, struct fdi_m_n *m_n)
 {
 	u64 temp;
 
@@ -2113,34 +2279,34 @@
 	unsigned long cacheline_size;
 };
 
-/* IGD has different values for various configs */
-static struct intel_watermark_params igd_display_wm = {
-	IGD_DISPLAY_FIFO,
-	IGD_MAX_WM,
-	IGD_DFT_WM,
-	IGD_GUARD_WM,
-	IGD_FIFO_LINE_SIZE
+/* Pineview has different values for various configs */
+static struct intel_watermark_params pineview_display_wm = {
+	PINEVIEW_DISPLAY_FIFO,
+	PINEVIEW_MAX_WM,
+	PINEVIEW_DFT_WM,
+	PINEVIEW_GUARD_WM,
+	PINEVIEW_FIFO_LINE_SIZE
 };
-static struct intel_watermark_params igd_display_hplloff_wm = {
-	IGD_DISPLAY_FIFO,
-	IGD_MAX_WM,
-	IGD_DFT_HPLLOFF_WM,
-	IGD_GUARD_WM,
-	IGD_FIFO_LINE_SIZE
+static struct intel_watermark_params pineview_display_hplloff_wm = {
+	PINEVIEW_DISPLAY_FIFO,
+	PINEVIEW_MAX_WM,
+	PINEVIEW_DFT_HPLLOFF_WM,
+	PINEVIEW_GUARD_WM,
+	PINEVIEW_FIFO_LINE_SIZE
 };
-static struct intel_watermark_params igd_cursor_wm = {
-	IGD_CURSOR_FIFO,
-	IGD_CURSOR_MAX_WM,
-	IGD_CURSOR_DFT_WM,
-	IGD_CURSOR_GUARD_WM,
-	IGD_FIFO_LINE_SIZE,
+static struct intel_watermark_params pineview_cursor_wm = {
+	PINEVIEW_CURSOR_FIFO,
+	PINEVIEW_CURSOR_MAX_WM,
+	PINEVIEW_CURSOR_DFT_WM,
+	PINEVIEW_CURSOR_GUARD_WM,
+	PINEVIEW_FIFO_LINE_SIZE,
 };
-static struct intel_watermark_params igd_cursor_hplloff_wm = {
-	IGD_CURSOR_FIFO,
-	IGD_CURSOR_MAX_WM,
-	IGD_CURSOR_DFT_WM,
-	IGD_CURSOR_GUARD_WM,
-	IGD_FIFO_LINE_SIZE
+static struct intel_watermark_params pineview_cursor_hplloff_wm = {
+	PINEVIEW_CURSOR_FIFO,
+	PINEVIEW_CURSOR_MAX_WM,
+	PINEVIEW_CURSOR_DFT_WM,
+	PINEVIEW_CURSOR_GUARD_WM,
+	PINEVIEW_FIFO_LINE_SIZE
 };
 static struct intel_watermark_params g4x_wm_info = {
 	G4X_FIFO_SIZE,
@@ -2213,11 +2379,11 @@
 		1000;
 	entries_required /= wm->cacheline_size;
 
-	DRM_DEBUG("FIFO entries required for mode: %d\n", entries_required);
+	DRM_DEBUG_KMS("FIFO entries required for mode: %d\n", entries_required);
 
 	wm_size = wm->fifo_size - (entries_required + wm->guard_size);
 
-	DRM_DEBUG("FIFO watermark level: %d\n", wm_size);
+	DRM_DEBUG_KMS("FIFO watermark level: %d\n", wm_size);
 
 	/* Don't promote wm_size to unsigned... */
 	if (wm_size > (long)wm->max_wm)
@@ -2279,50 +2445,50 @@
 			return latency;
 	}
 
-	DRM_DEBUG("Unknown FSB/MEM found, disable CxSR\n");
+	DRM_DEBUG_KMS("Unknown FSB/MEM found, disable CxSR\n");
 
 	return NULL;
 }
 
-static void igd_disable_cxsr(struct drm_device *dev)
+static void pineview_disable_cxsr(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	u32 reg;
 
 	/* deactivate cxsr */
 	reg = I915_READ(DSPFW3);
-	reg &= ~(IGD_SELF_REFRESH_EN);
+	reg &= ~(PINEVIEW_SELF_REFRESH_EN);
 	I915_WRITE(DSPFW3, reg);
 	DRM_INFO("Big FIFO is disabled\n");
 }
 
-static void igd_enable_cxsr(struct drm_device *dev, unsigned long clock,
-			    int pixel_size)
+static void pineview_enable_cxsr(struct drm_device *dev, unsigned long clock,
+				 int pixel_size)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	u32 reg;
 	unsigned long wm;
 	struct cxsr_latency *latency;
 
-	latency = intel_get_cxsr_latency(IS_IGDG(dev), dev_priv->fsb_freq,
+	latency = intel_get_cxsr_latency(IS_PINEVIEW_G(dev), dev_priv->fsb_freq,
 		dev_priv->mem_freq);
 	if (!latency) {
-		DRM_DEBUG("Unknown FSB/MEM found, disable CxSR\n");
-		igd_disable_cxsr(dev);
+		DRM_DEBUG_KMS("Unknown FSB/MEM found, disable CxSR\n");
+		pineview_disable_cxsr(dev);
 		return;
 	}
 
 	/* Display SR */
-	wm = intel_calculate_wm(clock, &igd_display_wm, pixel_size,
+	wm = intel_calculate_wm(clock, &pineview_display_wm, pixel_size,
 				latency->display_sr);
 	reg = I915_READ(DSPFW1);
 	reg &= 0x7fffff;
 	reg |= wm << 23;
 	I915_WRITE(DSPFW1, reg);
-	DRM_DEBUG("DSPFW1 register is %x\n", reg);
+	DRM_DEBUG_KMS("DSPFW1 register is %x\n", reg);
 
 	/* cursor SR */
-	wm = intel_calculate_wm(clock, &igd_cursor_wm, pixel_size,
+	wm = intel_calculate_wm(clock, &pineview_cursor_wm, pixel_size,
 				latency->cursor_sr);
 	reg = I915_READ(DSPFW3);
 	reg &= ~(0x3f << 24);
@@ -2330,7 +2496,7 @@
 	I915_WRITE(DSPFW3, reg);
 
 	/* Display HPLL off SR */
-	wm = intel_calculate_wm(clock, &igd_display_hplloff_wm,
+	wm = intel_calculate_wm(clock, &pineview_display_hplloff_wm,
 		latency->display_hpll_disable, I915_FIFO_LINE_SIZE);
 	reg = I915_READ(DSPFW3);
 	reg &= 0xfffffe00;
@@ -2338,17 +2504,17 @@
 	I915_WRITE(DSPFW3, reg);
 
 	/* cursor HPLL off SR */
-	wm = intel_calculate_wm(clock, &igd_cursor_hplloff_wm, pixel_size,
+	wm = intel_calculate_wm(clock, &pineview_cursor_hplloff_wm, pixel_size,
 				latency->cursor_hpll_disable);
 	reg = I915_READ(DSPFW3);
 	reg &= ~(0x3f << 16);
 	reg |= (wm & 0x3f) << 16;
 	I915_WRITE(DSPFW3, reg);
-	DRM_DEBUG("DSPFW3 register is %x\n", reg);
+	DRM_DEBUG_KMS("DSPFW3 register is %x\n", reg);
 
 	/* activate cxsr */
 	reg = I915_READ(DSPFW3);
-	reg |= IGD_SELF_REFRESH_EN;
+	reg |= PINEVIEW_SELF_REFRESH_EN;
 	I915_WRITE(DSPFW3, reg);
 
 	DRM_INFO("Big FIFO is enabled\n");
@@ -2370,7 +2536,7 @@
  * A value of 5us seems to be a good balance; safe for very low end
  * platforms but not overly aggressive on lower latency configs.
  */
-const static int latency_ns = 5000;
+static const int latency_ns = 5000;
 
 static int i9xx_get_fifo_size(struct drm_device *dev, int plane)
 {
@@ -2384,8 +2550,8 @@
 		size = ((dsparb >> DSPARB_CSTART_SHIFT) & 0x7f) -
 			(dsparb & 0x7f);
 
-	DRM_DEBUG("FIFO size - (0x%08x) %s: %d\n", dsparb, plane ? "B" : "A",
-		  size);
+	DRM_DEBUG_KMS("FIFO size - (0x%08x) %s: %d\n", dsparb,
+			plane ? "B" : "A", size);
 
 	return size;
 }
@@ -2403,8 +2569,8 @@
 			(dsparb & 0x1ff);
 	size >>= 1; /* Convert to cachelines */
 
-	DRM_DEBUG("FIFO size - (0x%08x) %s: %d\n", dsparb, plane ? "B" : "A",
-		  size);
+	DRM_DEBUG_KMS("FIFO size - (0x%08x) %s: %d\n", dsparb,
+			plane ? "B" : "A", size);
 
 	return size;
 }
@@ -2418,7 +2584,8 @@
 	size = dsparb & 0x7f;
 	size >>= 2; /* Convert to cachelines */
 
-	DRM_DEBUG("FIFO size - (0x%08x) %s: %d\n", dsparb, plane ? "B" : "A",
+	DRM_DEBUG_KMS("FIFO size - (0x%08x) %s: %d\n", dsparb,
+			plane ? "B" : "A",
 		  size);
 
 	return size;
@@ -2433,8 +2600,8 @@
 	size = dsparb & 0x7f;
 	size >>= 1; /* Convert to cachelines */
 
-	DRM_DEBUG("FIFO size - (0x%08x) %s: %d\n", dsparb, plane ? "B" : "A",
-		  size);
+	DRM_DEBUG_KMS("FIFO size - (0x%08x) %s: %d\n", dsparb,
+			plane ? "B" : "A", size);
 
 	return size;
 }
@@ -2480,7 +2647,7 @@
 	/* Calc sr entries for one plane configs */
 	if (sr_hdisplay && (!planea_clock || !planeb_clock)) {
 		/* self-refresh has much higher latency */
-		const static int sr_latency_ns = 12000;
+		static const int sr_latency_ns = 12000;
 
 		sr_clock = planea_clock ? planea_clock : planeb_clock;
 		line_time_us = ((sr_hdisplay * 1000) / sr_clock);
@@ -2491,6 +2658,10 @@
 		sr_entries = roundup(sr_entries / cacheline_size, 1);
 		DRM_DEBUG("self-refresh entries: %d\n", sr_entries);
 		I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN);
+	} else {
+		/* Turn off self refresh if both pipes are enabled */
+		I915_WRITE(FW_BLC_SELF, I915_READ(FW_BLC_SELF)
+					& ~FW_BLC_SELF_EN);
 	}
 
 	DRM_DEBUG("Setting FIFO watermarks - A: %d, B: %d, SR %d\n",
@@ -2509,15 +2680,45 @@
 		   (cursor_sr << DSPFW_CURSOR_SR_SHIFT));
 }
 
-static void i965_update_wm(struct drm_device *dev, int unused, int unused2,
-			   int unused3, int unused4)
+static void i965_update_wm(struct drm_device *dev, int planea_clock,
+			   int planeb_clock, int sr_hdisplay, int pixel_size)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
+	unsigned long line_time_us;
+	int sr_clock, sr_entries, srwm = 1;
+
+	/* Calc sr entries for one plane configs */
+	if (sr_hdisplay && (!planea_clock || !planeb_clock)) {
+		/* self-refresh has much higher latency */
+		static const int sr_latency_ns = 12000;
+
+		sr_clock = planea_clock ? planea_clock : planeb_clock;
+		line_time_us = ((sr_hdisplay * 1000) / sr_clock);
+
+		/* Use ns/us then divide to preserve precision */
+		sr_entries = (((sr_latency_ns / line_time_us) + 1) *
+			      pixel_size * sr_hdisplay) / 1000;
+		sr_entries = roundup(sr_entries / I915_FIFO_LINE_SIZE, 1);
+		DRM_DEBUG("self-refresh entries: %d\n", sr_entries);
+		srwm = I945_FIFO_SIZE - sr_entries;
+		if (srwm < 0)
+			srwm = 1;
+		srwm &= 0x3f;
+		if (IS_I965GM(dev))
+			I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN);
+	} else {
+		/* Turn off self refresh if both pipes are enabled */
+		if (IS_I965GM(dev))
+			I915_WRITE(FW_BLC_SELF, I915_READ(FW_BLC_SELF)
+				   & ~FW_BLC_SELF_EN);
+	}
 
-	DRM_DEBUG("Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 8\n");
+	DRM_DEBUG_KMS("Setting FIFO watermarks - A: 8, B: 8, C: 8, SR %d\n",
+		      srwm);
 
 	/* 965 has limitations... */
-	I915_WRITE(DSPFW1, (8 << 16) | (8 << 8) | (8 << 0));
+	I915_WRITE(DSPFW1, (srwm << DSPFW_SR_SHIFT) | (8 << 16) | (8 << 8) |
+		   (8 << 0));
 	I915_WRITE(DSPFW2, (8 << 8) | (8 << 0));
 }
 
@@ -2553,7 +2754,7 @@
 				       pixel_size, latency_ns);
 	planeb_wm = intel_calculate_wm(planeb_clock, &planeb_params,
 				       pixel_size, latency_ns);
-	DRM_DEBUG("FIFO watermarks - A: %d, B: %d\n", planea_wm, planeb_wm);
+	DRM_DEBUG_KMS("FIFO watermarks - A: %d, B: %d\n", planea_wm, planeb_wm);
 
 	/*
 	 * Overlay gets an aggressive default since video jitter is bad.
@@ -2564,7 +2765,7 @@
 	if (HAS_FW_BLC(dev) && sr_hdisplay &&
 	    (!planea_clock || !planeb_clock)) {
 		/* self-refresh has much higher latency */
-		const static int sr_latency_ns = 6000;
+		static const int sr_latency_ns = 6000;
 
 		sr_clock = planea_clock ? planea_clock : planeb_clock;
 		line_time_us = ((sr_hdisplay * 1000) / sr_clock);
@@ -2573,14 +2774,18 @@
 		sr_entries = (((sr_latency_ns / line_time_us) + 1) *
 			      pixel_size * sr_hdisplay) / 1000;
 		sr_entries = roundup(sr_entries / cacheline_size, 1);
-		DRM_DEBUG("self-refresh entries: %d\n", sr_entries);
+		DRM_DEBUG_KMS("self-refresh entries: %d\n", sr_entries);
 		srwm = total_size - sr_entries;
 		if (srwm < 0)
 			srwm = 1;
 		I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN | (srwm & 0x3f));
+	} else {
+		/* Turn off self refresh if both pipes are enabled */
+		I915_WRITE(FW_BLC_SELF, I915_READ(FW_BLC_SELF)
+					& ~FW_BLC_SELF_EN);
 	}
 
-	DRM_DEBUG("Setting FIFO watermarks - A: %d, B: %d, C: %d, SR %d\n",
+	DRM_DEBUG_KMS("Setting FIFO watermarks - A: %d, B: %d, C: %d, SR %d\n",
 		  planea_wm, planeb_wm, cwm, srwm);
 
 	fwater_lo = ((planeb_wm & 0x3f) << 16) | (planea_wm & 0x3f);
@@ -2607,7 +2812,7 @@
 				       pixel_size, latency_ns);
 	fwater_lo |= (3<<8) | planea_wm;
 
-	DRM_DEBUG("Setting FIFO watermarks - A: %d\n", planea_wm);
+	DRM_DEBUG_KMS("Setting FIFO watermarks - A: %d\n", planea_wm);
 
 	I915_WRITE(FW_BLC, fwater_lo);
 }
@@ -2661,11 +2866,11 @@
 		if (crtc->enabled) {
 			enabled++;
 			if (intel_crtc->plane == 0) {
-				DRM_DEBUG("plane A (pipe %d) clock: %d\n",
+				DRM_DEBUG_KMS("plane A (pipe %d) clock: %d\n",
 					  intel_crtc->pipe, crtc->mode.clock);
 				planea_clock = crtc->mode.clock;
 			} else {
-				DRM_DEBUG("plane B (pipe %d) clock: %d\n",
+				DRM_DEBUG_KMS("plane B (pipe %d) clock: %d\n",
 					  intel_crtc->pipe, crtc->mode.clock);
 				planeb_clock = crtc->mode.clock;
 			}
@@ -2682,10 +2887,10 @@
 		return;
 
 	/* Single plane configs can enable self refresh */
-	if (enabled == 1 && IS_IGD(dev))
-		igd_enable_cxsr(dev, sr_clock, pixel_size);
-	else if (IS_IGD(dev))
-		igd_disable_cxsr(dev);
+	if (enabled == 1 && IS_PINEVIEW(dev))
+		pineview_enable_cxsr(dev, sr_clock, pixel_size);
+	else if (IS_PINEVIEW(dev))
+		pineview_disable_cxsr(dev);
 
 	dev_priv->display.update_wm(dev, planea_clock, planeb_clock,
 				    sr_hdisplay, pixel_size);
@@ -2779,10 +2984,11 @@
 
 	if (is_lvds && dev_priv->lvds_use_ssc && num_outputs < 2) {
 		refclk = dev_priv->lvds_ssc_freq * 1000;
-		DRM_DEBUG("using SSC reference clock of %d MHz\n", refclk / 1000);
+		DRM_DEBUG_KMS("using SSC reference clock of %d MHz\n",
+					refclk / 1000);
 	} else if (IS_I9XX(dev)) {
 		refclk = 96000;
-		if (IS_IGDNG(dev))
+		if (HAS_PCH_SPLIT(dev))
 			refclk = 120000; /* 120Mhz refclk */
 	} else {
 		refclk = 48000;
@@ -2802,14 +3008,26 @@
 		return -EINVAL;
 	}
 
-	if (limit->find_reduced_pll && dev_priv->lvds_downclock_avail) {
-		memcpy(&reduced_clock, &clock, sizeof(intel_clock_t));
-		has_reduced_clock = limit->find_reduced_pll(limit, crtc,
-							    (adjusted_mode->clock*3/4),
+	/* Ensure that the cursor is valid for the new mode before changing... */
+	intel_crtc_update_cursor(crtc);
+
+	if (is_lvds && dev_priv->lvds_downclock_avail) {
+		has_reduced_clock = limit->find_pll(limit, crtc,
+							    dev_priv->lvds_downclock,
 							    refclk,
 							    &reduced_clock);
+		if (has_reduced_clock && (clock.p != reduced_clock.p)) {
+			/*
+			 * If the different P is found, it means that we can't
+			 * switch the display clock by using the FP0/FP1.
+			 * In such case we will disable the LVDS downclock
+			 * feature.
+			 */
+			DRM_DEBUG_KMS("Different P is found for "
+						"LVDS clock/downclock\n");
+			has_reduced_clock = 0;
+		}
 	}
-
 	/* SDVO TV has fixed PLL values depend on its clock range,
 	   this mirrors vbios setting. */
 	if (is_sdvo && is_tv) {
@@ -2831,7 +3049,7 @@
 	}
 
 	/* FDI link */
-	if (IS_IGDNG(dev)) {
+	if (HAS_PCH_SPLIT(dev)) {
 		int lane, link_bw, bpp;
 		/* eDP doesn't require FDI link, so just set DP M/N
 		   according to current link config */
@@ -2854,6 +3072,33 @@
 
 		/* determine panel color depth */
 		temp = I915_READ(pipeconf_reg);
+		temp &= ~PIPE_BPC_MASK;
+		if (is_lvds) {
+			int lvds_reg = I915_READ(PCH_LVDS);
+			/* the BPC will be 6 if it is 18-bit LVDS panel */
+			if ((lvds_reg & LVDS_A3_POWER_MASK) == LVDS_A3_POWER_UP)
+				temp |= PIPE_8BPC;
+			else
+				temp |= PIPE_6BPC;
+		} else if (is_edp) {
+			switch (dev_priv->edp_bpp/3) {
+			case 8:
+				temp |= PIPE_8BPC;
+				break;
+			case 10:
+				temp |= PIPE_10BPC;
+				break;
+			case 6:
+				temp |= PIPE_6BPC;
+				break;
+			case 12:
+				temp |= PIPE_12BPC;
+				break;
+			}
+		} else
+			temp |= PIPE_8BPC;
+		I915_WRITE(pipeconf_reg, temp);
+		I915_READ(pipeconf_reg);
 
 		switch (temp & PIPE_BPC_MASK) {
 		case PIPE_8BPC:
@@ -2873,8 +3118,7 @@
 			bpp = 24;
 		}
 
-		igdng_compute_m_n(bpp, lane, target_clock,
-				  link_bw, &m_n);
+		ironlake_compute_m_n(bpp, lane, target_clock, link_bw, &m_n);
 	}
 
 	/* Ironlake: try to setup display ref clock before DPLL
@@ -2882,7 +3126,7 @@
 	 * PCH B stepping, previous chipset stepping should be
 	 * ignoring this setting.
 	 */
-	if (IS_IGDNG(dev)) {
+	if (HAS_PCH_SPLIT(dev)) {
 		temp = I915_READ(PCH_DREF_CONTROL);
 		/* Always enable nonspread source */
 		temp &= ~DREF_NONSPREAD_SOURCE_MASK;
@@ -2917,7 +3161,7 @@
 		}
 	}
 
-	if (IS_IGD(dev)) {
+	if (IS_PINEVIEW(dev)) {
 		fp = (1 << clock.n) << 16 | clock.m1 << 8 | clock.m2;
 		if (has_reduced_clock)
 			fp2 = (1 << reduced_clock.n) << 16 |
@@ -2929,7 +3173,7 @@
 				reduced_clock.m2;
 	}
 
-	if (!IS_IGDNG(dev))
+	if (!HAS_PCH_SPLIT(dev))
 		dpll = DPLL_VGA_MODE_DIS;
 
 	if (IS_I9XX(dev)) {
@@ -2942,19 +3186,19 @@
 			sdvo_pixel_multiply = adjusted_mode->clock / mode->clock;
 			if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev))
 				dpll |= (sdvo_pixel_multiply - 1) << SDVO_MULTIPLIER_SHIFT_HIRES;
-			else if (IS_IGDNG(dev))
+			else if (HAS_PCH_SPLIT(dev))
 				dpll |= (sdvo_pixel_multiply - 1) << PLL_REF_SDVO_HDMI_MULTIPLIER_SHIFT;
 		}
 		if (is_dp)
 			dpll |= DPLL_DVO_HIGH_SPEED;
 
 		/* compute bitmask from p1 value */
-		if (IS_IGD(dev))
-			dpll |= (1 << (clock.p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT_IGD;
+		if (IS_PINEVIEW(dev))
+			dpll |= (1 << (clock.p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT_PINEVIEW;
 		else {
 			dpll |= (1 << (clock.p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT;
 			/* also FPA1 */
-			if (IS_IGDNG(dev))
+			if (HAS_PCH_SPLIT(dev))
 				dpll |= (1 << (clock.p1 - 1)) << DPLL_FPA1_P1_POST_DIV_SHIFT;
 			if (IS_G4X(dev) && has_reduced_clock)
 				dpll |= (1 << (reduced_clock.p1 - 1)) << DPLL_FPA1_P1_POST_DIV_SHIFT;
@@ -2973,7 +3217,7 @@
 			dpll |= DPLLB_LVDS_P2_CLOCK_DIV_14;
 			break;
 		}
-		if (IS_I965G(dev) && !IS_IGDNG(dev))
+		if (IS_I965G(dev) && !HAS_PCH_SPLIT(dev))
 			dpll |= (6 << PLL_LOAD_PULSE_PHASE_SHIFT);
 	} else {
 		if (is_lvds) {
@@ -3005,9 +3249,9 @@
 	/* Set up the display plane register */
 	dspcntr = DISPPLANE_GAMMA_ENABLE;
 
-	/* IGDNG's plane is forced to pipe, bit 24 is to
+	/* Ironlake's plane is forced to pipe, bit 24 is to
 	   enable color space conversion */
-	if (!IS_IGDNG(dev)) {
+	if (!HAS_PCH_SPLIT(dev)) {
 		if (pipe == 0)
 			dspcntr &= ~DISPPLANE_SEL_PIPE_MASK;
 		else
@@ -3034,20 +3278,20 @@
 
 
 	/* Disable the panel fitter if it was on our pipe */
-	if (!IS_IGDNG(dev) && intel_panel_fitter_pipe(dev) == pipe)
+	if (!HAS_PCH_SPLIT(dev) && intel_panel_fitter_pipe(dev) == pipe)
 		I915_WRITE(PFIT_CONTROL, 0);
 
-	DRM_DEBUG("Mode for pipe %c:\n", pipe == 0 ? 'A' : 'B');
+	DRM_DEBUG_KMS("Mode for pipe %c:\n", pipe == 0 ? 'A' : 'B');
 	drm_mode_debug_printmodeline(mode);
 
-	/* assign to IGDNG registers */
-	if (IS_IGDNG(dev)) {
+	/* assign to Ironlake registers */
+	if (HAS_PCH_SPLIT(dev)) {
 		fp_reg = pch_fp_reg;
 		dpll_reg = pch_dpll_reg;
 	}
 
 	if (is_edp) {
-		igdng_disable_pll_edp(crtc);
+		ironlake_disable_pll_edp(crtc);
 	} else if ((dpll & DPLL_VCO_ENABLE)) {
 		I915_WRITE(fp_reg, fp);
 		I915_WRITE(dpll_reg, dpll & ~DPLL_VCO_ENABLE);
@@ -3062,7 +3306,7 @@
 	if (is_lvds) {
 		u32 lvds;
 
-		if (IS_IGDNG(dev))
+		if (HAS_PCH_SPLIT(dev))
 			lvds_reg = PCH_LVDS;
 
 		lvds = I915_READ(lvds_reg);
@@ -3081,7 +3325,20 @@
 		 * appropriately here, but we need to look more thoroughly into how
 		 * panels behave in the two modes.
 		 */
-
+		/* set the dithering flag */
+		if (IS_I965G(dev)) {
+			if (dev_priv->lvds_dither) {
+				if (IS_IRONLAKE(dev))
+					pipeconf |= PIPE_ENABLE_DITHER;
+				else
+					lvds |= LVDS_ENABLE_DITHER;
+			} else {
+				if (IS_IRONLAKE(dev))
+					pipeconf &= ~PIPE_ENABLE_DITHER;
+				else
+					lvds &= ~LVDS_ENABLE_DITHER;
+			}
+		}
 		I915_WRITE(lvds_reg, lvds);
 		I915_READ(lvds_reg);
 	}
@@ -3095,7 +3352,7 @@
 		/* Wait for the clocks to stabilize. */
 		udelay(150);
 
-		if (IS_I965G(dev) && !IS_IGDNG(dev)) {
+		if (IS_I965G(dev) && !HAS_PCH_SPLIT(dev)) {
 			if (is_sdvo) {
 				sdvo_pixel_multiply = adjusted_mode->clock / mode->clock;
 				I915_WRITE(dpll_md_reg, (0 << DPLL_MD_UDI_DIVIDER_SHIFT) |
@@ -3115,14 +3372,14 @@
 		I915_WRITE(fp_reg + 4, fp2);
 		intel_crtc->lowfreq_avail = true;
 		if (HAS_PIPE_CXSR(dev)) {
-			DRM_DEBUG("enabling CxSR downclocking\n");
+			DRM_DEBUG_KMS("enabling CxSR downclocking\n");
 			pipeconf |= PIPECONF_CXSR_DOWNCLOCK;
 		}
 	} else {
 		I915_WRITE(fp_reg + 4, fp);
 		intel_crtc->lowfreq_avail = false;
 		if (HAS_PIPE_CXSR(dev)) {
-			DRM_DEBUG("disabling CxSR downclocking\n");
+			DRM_DEBUG_KMS("disabling CxSR downclocking\n");
 			pipeconf &= ~PIPECONF_CXSR_DOWNCLOCK;
 		}
 	}
@@ -3142,21 +3399,21 @@
 	/* pipesrc and dspsize control the size that is scaled from, which should
 	 * always be the user's requested size.
 	 */
-	if (!IS_IGDNG(dev)) {
+	if (!HAS_PCH_SPLIT(dev)) {
 		I915_WRITE(dspsize_reg, ((mode->vdisplay - 1) << 16) |
 				(mode->hdisplay - 1));
 		I915_WRITE(dsppos_reg, 0);
 	}
 	I915_WRITE(pipesrc_reg, ((mode->hdisplay - 1) << 16) | (mode->vdisplay - 1));
 
-	if (IS_IGDNG(dev)) {
+	if (HAS_PCH_SPLIT(dev)) {
 		I915_WRITE(data_m1_reg, TU_SIZE(m_n.tu) | m_n.gmch_m);
 		I915_WRITE(data_n1_reg, TU_SIZE(m_n.tu) | m_n.gmch_n);
 		I915_WRITE(link_m1_reg, m_n.link_m);
 		I915_WRITE(link_n1_reg, m_n.link_n);
 
 		if (is_edp) {
-			igdng_set_pll_edp(crtc, adjusted_mode->clock);
+			ironlake_set_pll_edp(crtc, adjusted_mode->clock);
 		} else {
 			/* enable FDI RX PLL too */
 			temp = I915_READ(fdi_rx_reg);
@@ -3170,7 +3427,7 @@
 
 	intel_wait_for_vblank(dev);
 
-	if (IS_IGDNG(dev)) {
+	if (HAS_PCH_SPLIT(dev)) {
 		/* enable address swizzle for tiling buffer */
 		temp = I915_READ(DISP_ARB_CTL);
 		I915_WRITE(DISP_ARB_CTL, temp | DISP_TILE_SURFACE_SWIZZLING);
@@ -3204,8 +3461,8 @@
 	if (!crtc->enabled)
 		return;
 
-	/* use legacy palette for IGDNG */
-	if (IS_IGDNG(dev))
+	/* use legacy palette for Ironlake */
+	if (HAS_PCH_SPLIT(dev))
 		palreg = (intel_crtc->pipe == 0) ? LGC_PALETTE_A :
 						   LGC_PALETTE_B;
 
@@ -3217,6 +3474,85 @@
 	}
 }
 
+/* If no-part of the cursor is visible on the framebuffer, then the GPU may hang... */
+static void intel_crtc_update_cursor(struct drm_crtc *crtc)
+{
+	struct drm_device *dev = crtc->dev;
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+	int pipe = intel_crtc->pipe;
+	int x = intel_crtc->cursor_x;
+	int y = intel_crtc->cursor_y;
+	uint32_t base, pos;
+	bool visible;
+
+	pos = 0;
+
+	if (crtc->fb) {
+		base = intel_crtc->cursor_addr;
+		if (x > (int) crtc->fb->width)
+			base = 0;
+
+		if (y > (int) crtc->fb->height)
+			base = 0;
+	} else
+		base = 0;
+
+	if (x < 0) {
+		if (x + intel_crtc->cursor_width < 0)
+			base = 0;
+
+		pos |= CURSOR_POS_SIGN << CURSOR_X_SHIFT;
+		x = -x;
+	}
+	pos |= x << CURSOR_X_SHIFT;
+
+	if (y < 0) {
+		if (y + intel_crtc->cursor_height < 0)
+			base = 0;
+
+		pos |= CURSOR_POS_SIGN << CURSOR_Y_SHIFT;
+		y = -y;
+	}
+	pos |= y << CURSOR_Y_SHIFT;
+
+	visible = base != 0;
+	if (!visible && !intel_crtc->cursor_visble)
+		return;
+
+	I915_WRITE(pipe == 0 ? CURAPOS : CURBPOS, pos);
+	if (intel_crtc->cursor_visble != visible) {
+		uint32_t cntl = I915_READ(pipe == 0 ? CURACNTR : CURBCNTR);
+		if (base) {
+			/* Hooray for CUR*CNTR differences */
+			if (IS_MOBILE(dev) || IS_I9XX(dev)) {
+				cntl &= ~(CURSOR_MODE | MCURSOR_PIPE_SELECT);
+				cntl |= CURSOR_MODE_64_ARGB_AX | MCURSOR_GAMMA_ENABLE;
+				cntl |= pipe << 28; /* Connect to correct pipe */
+			} else {
+				cntl &= ~(CURSOR_FORMAT_MASK);
+				cntl |= CURSOR_ENABLE;
+				cntl |= CURSOR_FORMAT_ARGB | CURSOR_GAMMA_ENABLE;
+			}
+		} else {
+			if (IS_MOBILE(dev) || IS_I9XX(dev)) {
+				cntl &= ~(CURSOR_MODE | MCURSOR_GAMMA_ENABLE);
+				cntl |= CURSOR_MODE_DISABLE;
+			} else {
+				cntl &= ~(CURSOR_ENABLE | CURSOR_GAMMA_ENABLE);
+			}
+		}
+		I915_WRITE(pipe == 0 ? CURACNTR : CURBCNTR, cntl);
+
+		intel_crtc->cursor_visble = visible;
+	}
+	/* and commit changes on next vblank */
+	I915_WRITE(pipe == 0 ? CURABASE : CURBBASE, base);
+
+	if (visible)
+		intel_mark_busy(dev, to_intel_framebuffer(crtc->fb)->obj);
+}
+
 static int intel_crtc_cursor_set(struct drm_crtc *crtc,
 				 struct drm_file *file_priv,
 				 uint32_t handle,
@@ -3227,24 +3563,14 @@
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 	struct drm_gem_object *bo;
 	struct drm_i915_gem_object *obj_priv;
-	int pipe = intel_crtc->pipe;
-	uint32_t control = (pipe == 0) ? CURACNTR : CURBCNTR;
-	uint32_t base = (pipe == 0) ? CURABASE : CURBBASE;
-	uint32_t temp = I915_READ(control);
-	size_t addr;
+	uint32_t addr;
 	int ret;
 
-	DRM_DEBUG("\n");
+	DRM_DEBUG_KMS("\n");
 
 	/* if we want to turn off the cursor ignore width and height */
 	if (!handle) {
-		DRM_DEBUG("cursor off\n");
-		if (IS_MOBILE(dev) || IS_I9XX(dev)) {
-			temp &= ~(CURSOR_MODE | MCURSOR_GAMMA_ENABLE);
-			temp |= CURSOR_MODE_DISABLE;
-		} else {
-			temp &= ~(CURSOR_ENABLE | CURSOR_GAMMA_ENABLE);
-		}
+		DRM_DEBUG_KMS("cursor off\n");
 		addr = 0;
 		bo = NULL;
 		mutex_lock(&dev->struct_mutex);
@@ -3271,7 +3597,7 @@
 
 	/* we only need to pin inside GTT if cursor is non-phy */
 	mutex_lock(&dev->struct_mutex);
-	if (!dev_priv->cursor_needs_physical) {
+	if (!dev_priv->info->cursor_needs_physical) {
 		ret = i915_gem_object_pin(bo, PAGE_SIZE);
 		if (ret) {
 			DRM_ERROR("failed to pin cursor bo\n");
@@ -3279,7 +3605,9 @@
 		}
 		addr = obj_priv->gtt_offset;
 	} else {
-		ret = i915_gem_attach_phys_object(dev, bo, (pipe == 0) ? I915_GEM_PHYS_CURSOR_0 : I915_GEM_PHYS_CURSOR_1);
+		ret = i915_gem_attach_phys_object(dev, bo,
+						  (intel_crtc->pipe == 0) ? I915_GEM_PHYS_CURSOR_0 : I915_GEM_PHYS_CURSOR_1);
+
 		if (ret) {
 			DRM_ERROR("failed to attach phys object\n");
 			goto fail_locked;
@@ -3290,23 +3618,9 @@
 	if (!IS_I9XX(dev))
 		I915_WRITE(CURSIZE, (height << 12) | width);
 
-	/* Hooray for CUR*CNTR differences */
-	if (IS_MOBILE(dev) || IS_I9XX(dev)) {
-		temp &= ~(CURSOR_MODE | MCURSOR_PIPE_SELECT);
-		temp |= CURSOR_MODE_64_ARGB_AX | MCURSOR_GAMMA_ENABLE;
-		temp |= (pipe << 28); /* Connect to correct pipe */
-	} else {
-		temp &= ~(CURSOR_FORMAT_MASK);
-		temp |= CURSOR_ENABLE;
-		temp |= CURSOR_FORMAT_ARGB | CURSOR_GAMMA_ENABLE;
-	}
-
  finish:
-	I915_WRITE(control, temp);
-	I915_WRITE(base, addr);
-
 	if (intel_crtc->cursor_bo) {
-		if (dev_priv->cursor_needs_physical) {
+		if (dev_priv->info->cursor_needs_physical) {
 			if (intel_crtc->cursor_bo != bo)
 				i915_gem_detach_phys_object(dev, intel_crtc->cursor_bo);
 		} else
@@ -3318,6 +3632,10 @@
 
 	intel_crtc->cursor_addr = addr;
 	intel_crtc->cursor_bo = bo;
+	intel_crtc->cursor_width = width;
+	intel_crtc->cursor_height = height;
+
+	intel_crtc_update_cursor(crtc);
 
 	return 0;
 fail:
@@ -3330,34 +3648,12 @@
 
 static int intel_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
 {
-	struct drm_device *dev = crtc->dev;
-	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-	struct intel_framebuffer *intel_fb;
-	int pipe = intel_crtc->pipe;
-	uint32_t temp = 0;
-	uint32_t adder;
 
-	if (crtc->fb) {
-		intel_fb = to_intel_framebuffer(crtc->fb);
-		intel_mark_busy(dev, intel_fb->obj);
-	}
+	intel_crtc->cursor_x = x;
+	intel_crtc->cursor_y = y;
 
-	if (x < 0) {
-		temp |= CURSOR_POS_SIGN << CURSOR_X_SHIFT;
-		x = -x;
-	}
-	if (y < 0) {
-		temp |= CURSOR_POS_SIGN << CURSOR_Y_SHIFT;
-		y = -y;
-	}
-
-	temp |= x << CURSOR_X_SHIFT;
-	temp |= y << CURSOR_Y_SHIFT;
-
-	adder = intel_crtc->cursor_addr;
-	I915_WRITE((pipe == 0) ? CURAPOS : CURBPOS, temp);
-	I915_WRITE((pipe == 0) ? CURABASE : CURBBASE, adder);
+	intel_crtc_update_cursor(crtc);
 
 	return 0;
 }
@@ -3509,7 +3805,6 @@
 void intel_release_load_detect_pipe(struct intel_output *intel_output, int dpms_mode)
 {
 	struct drm_encoder *encoder = &intel_output->enc;
-	struct drm_device *dev = encoder->dev;
 	struct drm_crtc *crtc = encoder->crtc;
 	struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private;
 	struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;
@@ -3519,7 +3814,6 @@
 		intel_output->base.encoder = NULL;
 		intel_output->load_detect_temp = false;
 		crtc->enabled = drm_helper_crtc_in_use(crtc);
-		drm_helper_disable_unused_functions(dev);
 	}
 
 	/* Switch crtc and output back off if necessary */
@@ -3546,18 +3840,18 @@
 		fp = I915_READ((pipe == 0) ? FPA1 : FPB1);
 
 	clock.m1 = (fp & FP_M1_DIV_MASK) >> FP_M1_DIV_SHIFT;
-	if (IS_IGD(dev)) {
-		clock.n = ffs((fp & FP_N_IGD_DIV_MASK) >> FP_N_DIV_SHIFT) - 1;
-		clock.m2 = (fp & FP_M2_IGD_DIV_MASK) >> FP_M2_DIV_SHIFT;
+	if (IS_PINEVIEW(dev)) {
+		clock.n = ffs((fp & FP_N_PINEVIEW_DIV_MASK) >> FP_N_DIV_SHIFT) - 1;
+		clock.m2 = (fp & FP_M2_PINEVIEW_DIV_MASK) >> FP_M2_DIV_SHIFT;
 	} else {
 		clock.n = (fp & FP_N_DIV_MASK) >> FP_N_DIV_SHIFT;
 		clock.m2 = (fp & FP_M2_DIV_MASK) >> FP_M2_DIV_SHIFT;
 	}
 
 	if (IS_I9XX(dev)) {
-		if (IS_IGD(dev))
-			clock.p1 = ffs((dpll & DPLL_FPA01_P1_POST_DIV_MASK_IGD) >>
-				DPLL_FPA01_P1_POST_DIV_SHIFT_IGD);
+		if (IS_PINEVIEW(dev))
+			clock.p1 = ffs((dpll & DPLL_FPA01_P1_POST_DIV_MASK_PINEVIEW) >>
+				DPLL_FPA01_P1_POST_DIV_SHIFT_PINEVIEW);
 		else
 			clock.p1 = ffs((dpll & DPLL_FPA01_P1_POST_DIV_MASK) >>
 			       DPLL_FPA01_P1_POST_DIV_SHIFT);
@@ -3572,7 +3866,7 @@
 				7 : 14;
 			break;
 		default:
-			DRM_DEBUG("Unknown DPLL mode %08x in programmed "
+			DRM_DEBUG_KMS("Unknown DPLL mode %08x in programmed "
 				  "mode\n", (int)(dpll & DPLL_MODE_MASK));
 			return 0;
 		}
@@ -3658,132 +3952,13 @@
 	struct drm_device *dev = (struct drm_device *)arg;
 	drm_i915_private_t *dev_priv = dev->dev_private;
 
-	DRM_DEBUG("idle timer fired, downclocking\n");
+	DRM_DEBUG_DRIVER("idle timer fired, downclocking\n");
 
 	dev_priv->busy = false;
 
 	queue_work(dev_priv->wq, &dev_priv->idle_work);
 }
 
-void intel_increase_renderclock(struct drm_device *dev, bool schedule)
-{
-	drm_i915_private_t *dev_priv = dev->dev_private;
-
-	if (IS_IGDNG(dev))
-		return;
-
-	if (!dev_priv->render_reclock_avail) {
-		DRM_DEBUG("not reclocking render clock\n");
-		return;
-	}
-
-	/* Restore render clock frequency to original value */
-	if (IS_G4X(dev) || IS_I9XX(dev))
-		pci_write_config_word(dev->pdev, GCFGC, dev_priv->orig_clock);
-	else if (IS_I85X(dev))
-		pci_write_config_word(dev->pdev, HPLLCC, dev_priv->orig_clock);
-	DRM_DEBUG("increasing render clock frequency\n");
-
-	/* Schedule downclock */
-	if (schedule)
-		mod_timer(&dev_priv->idle_timer, jiffies +
-			  msecs_to_jiffies(GPU_IDLE_TIMEOUT));
-}
-
-void intel_decrease_renderclock(struct drm_device *dev)
-{
-	drm_i915_private_t *dev_priv = dev->dev_private;
-
-	if (IS_IGDNG(dev))
-		return;
-
-	if (!dev_priv->render_reclock_avail) {
-		DRM_DEBUG("not reclocking render clock\n");
-		return;
-	}
-
-	if (IS_G4X(dev)) {
-		u16 gcfgc;
-
-		/* Adjust render clock... */
-		pci_read_config_word(dev->pdev, GCFGC, &gcfgc);
-
-		/* Down to minimum... */
-		gcfgc &= ~GM45_GC_RENDER_CLOCK_MASK;
-		gcfgc |= GM45_GC_RENDER_CLOCK_266_MHZ;
-
-		pci_write_config_word(dev->pdev, GCFGC, gcfgc);
-	} else if (IS_I965G(dev)) {
-		u16 gcfgc;
-
-		/* Adjust render clock... */
-		pci_read_config_word(dev->pdev, GCFGC, &gcfgc);
-
-		/* Down to minimum... */
-		gcfgc &= ~I965_GC_RENDER_CLOCK_MASK;
-		gcfgc |= I965_GC_RENDER_CLOCK_267_MHZ;
-
-		pci_write_config_word(dev->pdev, GCFGC, gcfgc);
-	} else if (IS_I945G(dev) || IS_I945GM(dev)) {
-		u16 gcfgc;
-
-		/* Adjust render clock... */
-		pci_read_config_word(dev->pdev, GCFGC, &gcfgc);
-
-		/* Down to minimum... */
-		gcfgc &= ~I945_GC_RENDER_CLOCK_MASK;
-		gcfgc |= I945_GC_RENDER_CLOCK_166_MHZ;
-
-		pci_write_config_word(dev->pdev, GCFGC, gcfgc);
-	} else if (IS_I915G(dev)) {
-		u16 gcfgc;
-
-		/* Adjust render clock... */
-		pci_read_config_word(dev->pdev, GCFGC, &gcfgc);
-
-		/* Down to minimum... */
-		gcfgc &= ~I915_GC_RENDER_CLOCK_MASK;
-		gcfgc |= I915_GC_RENDER_CLOCK_166_MHZ;
-
-		pci_write_config_word(dev->pdev, GCFGC, gcfgc);
-	} else if (IS_I85X(dev)) {
-		u16 hpllcc;
-
-		/* Adjust render clock... */
-		pci_read_config_word(dev->pdev, HPLLCC, &hpllcc);
-
-		/* Up to maximum... */
-		hpllcc &= ~GC_CLOCK_CONTROL_MASK;
-		hpllcc |= GC_CLOCK_133_200;
-
-		pci_write_config_word(dev->pdev, HPLLCC, hpllcc);
-	}
-	DRM_DEBUG("decreasing render clock frequency\n");
-}
-
-/* Note that no increase function is needed for this - increase_renderclock()
- *  will also rewrite these bits
- */
-void intel_decrease_displayclock(struct drm_device *dev)
-{
-	if (IS_IGDNG(dev))
-		return;
-
-	if (IS_I945G(dev) || IS_I945GM(dev) || IS_I915G(dev) ||
-	    IS_I915GM(dev)) {
-		u16 gcfgc;
-
-		/* Adjust render clock... */
-		pci_read_config_word(dev->pdev, GCFGC, &gcfgc);
-
-		/* Down to minimum... */
-		gcfgc &= ~0xf0;
-		gcfgc |= 0x80;
-
-		pci_write_config_word(dev->pdev, GCFGC, gcfgc);
-	}
-}
-
 #define CRTC_IDLE_TIMEOUT 1000 /* ms */
 
 static void intel_crtc_idle_timer(unsigned long arg)
@@ -3792,7 +3967,7 @@
 	struct drm_crtc *crtc = &intel_crtc->base;
 	drm_i915_private_t *dev_priv = crtc->dev->dev_private;
 
-	DRM_DEBUG("idle timer fired, downclocking\n");
+	DRM_DEBUG_DRIVER("idle timer fired, downclocking\n");
 
 	intel_crtc->busy = false;
 
@@ -3808,17 +3983,18 @@
 	int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B;
 	int dpll = I915_READ(dpll_reg);
 
-	if (IS_IGDNG(dev))
+	if (HAS_PCH_SPLIT(dev))
 		return;
 
 	if (!dev_priv->lvds_downclock_avail)
 		return;
 
 	if (!HAS_PIPE_CXSR(dev) && (dpll & DISPLAY_RATE_SELECT_FPA1)) {
-		DRM_DEBUG("upclocking LVDS\n");
+		DRM_DEBUG_DRIVER("upclocking LVDS\n");
 
 		/* Unlock panel regs */
-		I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) | (0xabcd << 16));
+		I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) |
+			   PANEL_UNLOCK_REGS);
 
 		dpll &= ~DISPLAY_RATE_SELECT_FPA1;
 		I915_WRITE(dpll_reg, dpll);
@@ -3826,7 +4002,7 @@
 		intel_wait_for_vblank(dev);
 		dpll = I915_READ(dpll_reg);
 		if (dpll & DISPLAY_RATE_SELECT_FPA1)
-			DRM_DEBUG("failed to upclock LVDS!\n");
+			DRM_DEBUG_DRIVER("failed to upclock LVDS!\n");
 
 		/* ...and lock them again */
 		I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) & 0x3);
@@ -3847,7 +4023,7 @@
 	int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B;
 	int dpll = I915_READ(dpll_reg);
 
-	if (IS_IGDNG(dev))
+	if (HAS_PCH_SPLIT(dev))
 		return;
 
 	if (!dev_priv->lvds_downclock_avail)
@@ -3858,10 +4034,11 @@
 	 * the manual case.
 	 */
 	if (!HAS_PIPE_CXSR(dev) && intel_crtc->lowfreq_avail) {
-		DRM_DEBUG("downclocking LVDS\n");
+		DRM_DEBUG_DRIVER("downclocking LVDS\n");
 
 		/* Unlock panel regs */
-		I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) | (0xabcd << 16));
+		I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) |
+			   PANEL_UNLOCK_REGS);
 
 		dpll |= DISPLAY_RATE_SELECT_FPA1;
 		I915_WRITE(dpll_reg, dpll);
@@ -3869,7 +4046,7 @@
 		intel_wait_for_vblank(dev);
 		dpll = I915_READ(dpll_reg);
 		if (!(dpll & DISPLAY_RATE_SELECT_FPA1))
-			DRM_DEBUG("failed to downclock LVDS!\n");
+			DRM_DEBUG_DRIVER("failed to downclock LVDS!\n");
 
 		/* ...and lock them again */
 		I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) & 0x3);
@@ -3897,12 +4074,6 @@
 
 	mutex_lock(&dev->struct_mutex);
 
-	/* GPU isn't processing, downclock it. */
-	if (!dev_priv->busy) {
-		intel_decrease_renderclock(dev);
-		intel_decrease_displayclock(dev);
-	}
-
 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
 		/* Skip inactive CRTCs */
 		if (!crtc->fb)
@@ -3936,8 +4107,11 @@
 	if (!drm_core_check_feature(dev, DRIVER_MODESET))
 		return;
 
-	dev_priv->busy = true;
-	intel_increase_renderclock(dev, true);
+	if (!dev_priv->busy)
+		dev_priv->busy = true;
+	else
+		mod_timer(&dev_priv->idle_timer, jiffies +
+			  msecs_to_jiffies(GPU_IDLE_TIMEOUT));
 
 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
 		if (!crtc->fb)
@@ -3967,6 +4141,220 @@
 	kfree(intel_crtc);
 }
 
+struct intel_unpin_work {
+	struct work_struct work;
+	struct drm_device *dev;
+	struct drm_gem_object *old_fb_obj;
+	struct drm_gem_object *pending_flip_obj;
+	struct drm_pending_vblank_event *event;
+	int pending;
+};
+
+static void intel_unpin_work_fn(struct work_struct *__work)
+{
+	struct intel_unpin_work *work =
+		container_of(__work, struct intel_unpin_work, work);
+
+	mutex_lock(&work->dev->struct_mutex);
+	i915_gem_object_unpin(work->old_fb_obj);
+	drm_gem_object_unreference(work->pending_flip_obj);
+	drm_gem_object_unreference(work->old_fb_obj);
+	mutex_unlock(&work->dev->struct_mutex);
+	kfree(work);
+}
+
+static void do_intel_finish_page_flip(struct drm_device *dev,
+				      struct drm_crtc *crtc)
+{
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+	struct intel_unpin_work *work;
+	struct drm_i915_gem_object *obj_priv;
+	struct drm_pending_vblank_event *e;
+	struct timeval now;
+	unsigned long flags;
+
+	/* Ignore early vblank irqs */
+	if (intel_crtc == NULL)
+		return;
+
+	spin_lock_irqsave(&dev->event_lock, flags);
+	work = intel_crtc->unpin_work;
+	if (work == NULL || !work->pending) {
+		spin_unlock_irqrestore(&dev->event_lock, flags);
+		return;
+	}
+
+	intel_crtc->unpin_work = NULL;
+	drm_vblank_put(dev, intel_crtc->pipe);
+
+	if (work->event) {
+		e = work->event;
+		do_gettimeofday(&now);
+		e->event.sequence = drm_vblank_count(dev, intel_crtc->pipe);
+		e->event.tv_sec = now.tv_sec;
+		e->event.tv_usec = now.tv_usec;
+		list_add_tail(&e->base.link,
+			      &e->base.file_priv->event_list);
+		wake_up_interruptible(&e->base.file_priv->event_wait);
+	}
+
+	spin_unlock_irqrestore(&dev->event_lock, flags);
+
+	obj_priv = work->pending_flip_obj->driver_private;
+
+	/* Initial scanout buffer will have a 0 pending flip count */
+	if ((atomic_read(&obj_priv->pending_flip) == 0) ||
+	    atomic_dec_and_test(&obj_priv->pending_flip))
+		DRM_WAKEUP(&dev_priv->pending_flip_queue);
+	schedule_work(&work->work);
+}
+
+void intel_finish_page_flip(struct drm_device *dev, int pipe)
+{
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
+
+	do_intel_finish_page_flip(dev, crtc);
+}
+
+void intel_finish_page_flip_plane(struct drm_device *dev, int plane)
+{
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	struct drm_crtc *crtc = dev_priv->plane_to_crtc_mapping[plane];
+
+	do_intel_finish_page_flip(dev, crtc);
+}
+
+void intel_prepare_page_flip(struct drm_device *dev, int plane)
+{
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	struct intel_crtc *intel_crtc =
+		to_intel_crtc(dev_priv->plane_to_crtc_mapping[plane]);
+	unsigned long flags;
+
+	spin_lock_irqsave(&dev->event_lock, flags);
+	if (intel_crtc->unpin_work) {
+		intel_crtc->unpin_work->pending = 1;
+	} else {
+		DRM_DEBUG_DRIVER("preparing flip with no unpin work?\n");
+	}
+	spin_unlock_irqrestore(&dev->event_lock, flags);
+}
+
+static int intel_crtc_page_flip(struct drm_crtc *crtc,
+				struct drm_framebuffer *fb,
+				struct drm_pending_vblank_event *event)
+{
+	struct drm_device *dev = crtc->dev;
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct intel_framebuffer *intel_fb;
+	struct drm_i915_gem_object *obj_priv;
+	struct drm_gem_object *obj;
+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+	struct intel_unpin_work *work;
+	unsigned long flags, offset;
+	int pipesrc_reg = (intel_crtc->pipe == 0) ? PIPEASRC : PIPEBSRC;
+	int ret, pipesrc;
+	u32 flip_mask;
+	RING_LOCALS;
+
+	work = kzalloc(sizeof *work, GFP_KERNEL);
+	if (work == NULL)
+		return -ENOMEM;
+
+	work->event = event;
+	work->dev = crtc->dev;
+	intel_fb = to_intel_framebuffer(crtc->fb);
+	work->old_fb_obj = intel_fb->obj;
+	INIT_WORK(&work->work, intel_unpin_work_fn);
+
+	/* We borrow the event spin lock for protecting unpin_work */
+	spin_lock_irqsave(&dev->event_lock, flags);
+	if (intel_crtc->unpin_work) {
+		spin_unlock_irqrestore(&dev->event_lock, flags);
+		kfree(work);
+
+		DRM_DEBUG_DRIVER("flip queue: crtc already busy\n");
+		return -EBUSY;
+	}
+	intel_crtc->unpin_work = work;
+	spin_unlock_irqrestore(&dev->event_lock, flags);
+
+	intel_fb = to_intel_framebuffer(fb);
+	obj = intel_fb->obj;
+
+	mutex_lock(&dev->struct_mutex);
+	ret = intel_pin_and_fence_fb_obj(dev, obj);
+	if (ret != 0) {
+		mutex_unlock(&dev->struct_mutex);
+
+		spin_lock_irqsave(&dev->event_lock, flags);
+		intel_crtc->unpin_work = NULL;
+		spin_unlock_irqrestore(&dev->event_lock, flags);
+
+		kfree(work);
+
+		DRM_DEBUG_DRIVER("flip queue: %p pin & fence failed\n",
+			  obj->driver_private);
+		return ret;
+	}
+
+	/* Reference the objects for the scheduled work. */
+	drm_gem_object_reference(work->old_fb_obj);
+	drm_gem_object_reference(obj);
+
+	crtc->fb = fb;
+	i915_gem_object_flush_write_domain(obj);
+	drm_vblank_get(dev, intel_crtc->pipe);
+	obj_priv = obj->driver_private;
+	atomic_inc(&obj_priv->pending_flip);
+	work->pending_flip_obj = obj;
+
+	if (intel_crtc->plane)
+		flip_mask = MI_WAIT_FOR_PLANE_B_FLIP;
+	else
+		flip_mask = MI_WAIT_FOR_PLANE_A_FLIP;
+
+	if (IS_GEN3(dev) || IS_GEN2(dev)) {
+		BEGIN_LP_RING(2);
+		OUT_RING(MI_WAIT_FOR_EVENT | flip_mask);
+		OUT_RING(0);
+		ADVANCE_LP_RING();
+	}
+
+	/* Offset into the new buffer for cases of shared fbs between CRTCs */
+	offset = obj_priv->gtt_offset;
+	offset += (crtc->y * fb->pitch) + (crtc->x * (fb->bits_per_pixel) / 8);
+
+	BEGIN_LP_RING(4);
+	if (IS_I965G(dev)) {
+		OUT_RING(MI_DISPLAY_FLIP |
+			 MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
+		OUT_RING(fb->pitch);
+		OUT_RING(offset | obj_priv->tiling_mode);
+		pipesrc = I915_READ(pipesrc_reg); 
+		OUT_RING(pipesrc & 0x0fff0fff);
+	} else if (IS_GEN3(dev)) {
+		OUT_RING(MI_DISPLAY_FLIP_I915 |
+			 MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
+		OUT_RING(fb->pitch);
+		OUT_RING(offset);
+		OUT_RING(MI_NOOP);
+	} else {
+		OUT_RING(MI_DISPLAY_FLIP |
+			 MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
+		OUT_RING(fb->pitch);
+		OUT_RING(offset);
+		OUT_RING(MI_NOOP);
+	}
+	ADVANCE_LP_RING();
+
+	mutex_unlock(&dev->struct_mutex);
+
+	return 0;
+}
+
 static const struct drm_crtc_helper_funcs intel_helper_funcs = {
 	.dpms = intel_crtc_dpms,
 	.mode_fixup = intel_crtc_mode_fixup,
@@ -3983,11 +4371,13 @@
 	.gamma_set = intel_crtc_gamma_set,
 	.set_config = drm_crtc_helper_set_config,
 	.destroy = intel_crtc_destroy,
+	.page_flip = intel_crtc_page_flip,
 };
 
 
 static void intel_crtc_init(struct drm_device *dev, int pipe)
 {
+	drm_i915_private_t *dev_priv = dev->dev_private;
 	struct intel_crtc *intel_crtc;
 	int i;
 
@@ -4010,12 +4400,17 @@
 	intel_crtc->pipe = pipe;
 	intel_crtc->plane = pipe;
 	if (IS_MOBILE(dev) && (IS_I9XX(dev) && !IS_I965G(dev))) {
-		DRM_DEBUG("swapping pipes & planes for FBC\n");
+		DRM_DEBUG_KMS("swapping pipes & planes for FBC\n");
 		intel_crtc->plane = ((pipe == 0) ? 1 : 0);
 	}
 
+	BUG_ON(pipe >= ARRAY_SIZE(dev_priv->plane_to_crtc_mapping) ||
+	       dev_priv->plane_to_crtc_mapping[intel_crtc->plane] != NULL);
+	dev_priv->plane_to_crtc_mapping[intel_crtc->plane] = &intel_crtc->base;
+	dev_priv->pipe_to_crtc_mapping[intel_crtc->pipe] = &intel_crtc->base;
+
 	intel_crtc->cursor_addr = 0;
-	intel_crtc->dpms_mode = DRM_MODE_DPMS_OFF;
+	intel_crtc->dpms_mode = -1;
 	drm_crtc_helper_add(&intel_crtc->base, &intel_helper_funcs);
 
 	intel_crtc->busy = false;
@@ -4090,7 +4485,7 @@
 	if (IS_MOBILE(dev) && !IS_I830(dev))
 		intel_lvds_init(dev);
 
-	if (IS_IGDNG(dev)) {
+	if (HAS_PCH_SPLIT(dev)) {
 		int found;
 
 		if (IS_MOBILE(dev) && (I915_READ(DP_A) & DP_DETECTED))
@@ -4118,37 +4513,51 @@
 		if (I915_READ(PCH_DP_D) & DP_DETECTED)
 			intel_dp_init(dev, PCH_DP_D);
 
-	} else if (IS_I9XX(dev)) {
+	} else if (SUPPORTS_DIGITAL_OUTPUTS(dev)) {
 		bool found = false;
 
 		if (I915_READ(SDVOB) & SDVO_DETECTED) {
+			DRM_DEBUG_KMS("probing SDVOB\n");
 			found = intel_sdvo_init(dev, SDVOB);
-			if (!found && SUPPORTS_INTEGRATED_HDMI(dev))
+			if (!found && SUPPORTS_INTEGRATED_HDMI(dev)) {
+				DRM_DEBUG_KMS("probing HDMI on SDVOB\n");
 				intel_hdmi_init(dev, SDVOB);
+			}
 
-			if (!found && SUPPORTS_INTEGRATED_DP(dev))
+			if (!found && SUPPORTS_INTEGRATED_DP(dev)) {
+				DRM_DEBUG_KMS("probing DP_B\n");
 				intel_dp_init(dev, DP_B);
+			}
 		}
 
 		/* Before G4X SDVOC doesn't have its own detect register */
 
-		if (I915_READ(SDVOB) & SDVO_DETECTED)
+		if (I915_READ(SDVOB) & SDVO_DETECTED) {
+			DRM_DEBUG_KMS("probing SDVOC\n");
 			found = intel_sdvo_init(dev, SDVOC);
+		}
 
 		if (!found && (I915_READ(SDVOC) & SDVO_DETECTED)) {
 
-			if (SUPPORTS_INTEGRATED_HDMI(dev))
+			if (SUPPORTS_INTEGRATED_HDMI(dev)) {
+				DRM_DEBUG_KMS("probing HDMI on SDVOC\n");
 				intel_hdmi_init(dev, SDVOC);
-			if (SUPPORTS_INTEGRATED_DP(dev))
+			}
+			if (SUPPORTS_INTEGRATED_DP(dev)) {
+				DRM_DEBUG_KMS("probing DP_C\n");
 				intel_dp_init(dev, DP_C);
+			}
 		}
 
-		if (SUPPORTS_INTEGRATED_DP(dev) && (I915_READ(DP_D) & DP_DETECTED))
+		if (SUPPORTS_INTEGRATED_DP(dev) &&
+		    (I915_READ(DP_D) & DP_DETECTED)) {
+			DRM_DEBUG_KMS("probing DP_D\n");
 			intel_dp_init(dev, DP_D);
-	} else
+		}
+	} else if (IS_GEN2(dev))
 		intel_dvo_init(dev);
 
-	if (IS_I9XX(dev) && IS_MOBILE(dev) && !IS_IGDNG(dev))
+	if (SUPPORTS_TV(dev))
 		intel_tv_init(dev);
 
 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
@@ -4249,6 +4658,42 @@
 	.fb_changed = intelfb_probe,
 };
 
+static struct drm_gem_object *
+intel_alloc_power_context(struct drm_device *dev)
+{
+	struct drm_gem_object *pwrctx;
+	int ret;
+
+	pwrctx = drm_gem_object_alloc(dev, 4096);
+	if (!pwrctx) {
+		DRM_DEBUG("failed to alloc power context, RC6 disabled\n");
+		return NULL;
+	}
+
+	mutex_lock(&dev->struct_mutex);
+	ret = i915_gem_object_pin(pwrctx, 4096);
+	if (ret) {
+		DRM_ERROR("failed to pin power context: %d\n", ret);
+		goto err_unref;
+	}
+
+	ret = i915_gem_object_set_to_gtt_domain(pwrctx, 1);
+	if (ret) {
+		DRM_ERROR("failed to set-domain on power context: %d\n", ret);
+		goto err_unpin;
+	}
+	mutex_unlock(&dev->struct_mutex);
+
+	return pwrctx;
+
+err_unpin:
+	i915_gem_object_unpin(pwrctx);
+err_unref:
+	drm_gem_object_unreference(pwrctx);
+	mutex_unlock(&dev->struct_mutex);
+	return NULL;
+}
+
 void intel_init_clock_gating(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
@@ -4257,7 +4702,7 @@
 	 * Disable clock gating reported to work incorrectly according to the
 	 * specs, but enable as much else as we can.
 	 */
-	if (IS_IGDNG(dev)) {
+	if (HAS_PCH_SPLIT(dev)) {
 		return;
 	} else if (IS_G4X(dev)) {
 		uint32_t dspclk_gate;
@@ -4291,11 +4736,37 @@
 		dstate |= DSTATE_PLL_D3_OFF | DSTATE_GFX_CLOCK_GATING |
 			DSTATE_DOT_CLOCK_GATING;
 		I915_WRITE(D_STATE, dstate);
-	} else if (IS_I855(dev) || IS_I865G(dev)) {
+	} else if (IS_I85X(dev) || IS_I865G(dev)) {
 		I915_WRITE(RENCLK_GATE_D1, SV_CLOCK_GATE_DISABLE);
 	} else if (IS_I830(dev)) {
 		I915_WRITE(DSPCLK_GATE_D, OVRUNIT_CLOCK_GATE_DISABLE);
 	}
+
+	/*
+	 * GPU can automatically power down the render unit if given a page
+	 * to save state.
+	 */
+	if (I915_HAS_RC6(dev) && drm_core_check_feature(dev, DRIVER_MODESET)) {
+		struct drm_i915_gem_object *obj_priv = NULL;
+
+		if (dev_priv->pwrctx) {
+			obj_priv = dev_priv->pwrctx->driver_private;
+		} else {
+			struct drm_gem_object *pwrctx;
+
+			pwrctx = intel_alloc_power_context(dev);
+			if (pwrctx) {
+				dev_priv->pwrctx = pwrctx;
+				obj_priv = pwrctx->driver_private;
+			}
+		}
+
+		if (obj_priv) {
+			I915_WRITE(PWRCTXA, obj_priv->gtt_offset | PWRCTX_EN);
+			I915_WRITE(MCHBAR_RENDER_STANDBY,
+				   I915_READ(MCHBAR_RENDER_STANDBY) & ~RCX_SW_EXIT);
+		}
+	}
 }
 
 /* Set up chip specific display functions */
@@ -4304,8 +4775,8 @@
 	struct drm_i915_private *dev_priv = dev->dev_private;
 
 	/* We always want a DPMS function */
-	if (IS_IGDNG(dev))
-		dev_priv->display.dpms = igdng_crtc_dpms;
+	if (HAS_PCH_SPLIT(dev))
+		dev_priv->display.dpms = ironlake_crtc_dpms;
 	else
 		dev_priv->display.dpms = i9xx_crtc_dpms;
 
@@ -4315,7 +4786,7 @@
 			dev_priv->display.fbc_enabled = g4x_fbc_enabled;
 			dev_priv->display.enable_fbc = g4x_enable_fbc;
 			dev_priv->display.disable_fbc = g4x_disable_fbc;
-		} else if (IS_I965GM(dev) || IS_I945GM(dev) || IS_I915GM(dev)) {
+		} else if (IS_I965GM(dev)) {
 			dev_priv->display.fbc_enabled = i8xx_fbc_enabled;
 			dev_priv->display.enable_fbc = i8xx_enable_fbc;
 			dev_priv->display.disable_fbc = i8xx_disable_fbc;
@@ -4324,13 +4795,13 @@
 	}
 
 	/* Returns the core display clock speed */
-	if (IS_I945G(dev))
+	if (IS_I945G(dev) || (IS_G33(dev) && ! IS_PINEVIEW_M(dev)))
 		dev_priv->display.get_display_clock_speed =
 			i945_get_display_clock_speed;
 	else if (IS_I915G(dev))
 		dev_priv->display.get_display_clock_speed =
 			i915_get_display_clock_speed;
-	else if (IS_I945GM(dev) || IS_845G(dev) || IS_IGDGM(dev))
+	else if (IS_I945GM(dev) || IS_845G(dev) || IS_PINEVIEW_M(dev))
 		dev_priv->display.get_display_clock_speed =
 			i9xx_misc_get_display_clock_speed;
 	else if (IS_I915GM(dev))
@@ -4339,7 +4810,7 @@
 	else if (IS_I865G(dev))
 		dev_priv->display.get_display_clock_speed =
 			i865_get_display_clock_speed;
-	else if (IS_I855(dev))
+	else if (IS_I85X(dev))
 		dev_priv->display.get_display_clock_speed =
 			i855_get_display_clock_speed;
 	else /* 852, 830 */
@@ -4347,7 +4818,7 @@
 			i830_get_display_clock_speed;
 
 	/* For FIFO watermark updates */
-	if (IS_IGDNG(dev))
+	if (HAS_PCH_SPLIT(dev))
 		dev_priv->display.update_wm = NULL;
 	else if (IS_G4X(dev))
 		dev_priv->display.update_wm = g4x_update_wm;
@@ -4403,7 +4874,7 @@
 		num_pipe = 2;
 	else
 		num_pipe = 1;
-	DRM_DEBUG("%d display pipe%s available.\n",
+	DRM_DEBUG_KMS("%d display pipe%s available.\n",
 		  num_pipe, num_pipe > 1 ? "s" : "");
 
 	if (IS_I85X(dev))
@@ -4422,6 +4893,15 @@
 	INIT_WORK(&dev_priv->idle_work, intel_idle_update);
 	setup_timer(&dev_priv->idle_timer, intel_gpu_idle_timer,
 		    (unsigned long)dev);
+
+	intel_setup_overlay(dev);
+
+	if (IS_PINEVIEW(dev) && !intel_get_cxsr_latency(IS_PINEVIEW_G(dev),
+							dev_priv->fsb_freq,
+							dev_priv->mem_freq))
+		DRM_INFO("failed to find known CxSR latency "
+			 "(found fsb freq %d, mem freq %d), disabling CxSR\n",
+			 dev_priv->fsb_freq, dev_priv->mem_freq);
 }
 
 void intel_modeset_cleanup(struct drm_device *dev)
@@ -4442,14 +4922,23 @@
 		del_timer_sync(&intel_crtc->idle_timer);
 	}
 
-	intel_increase_renderclock(dev, false);
 	del_timer_sync(&dev_priv->idle_timer);
 
-	mutex_unlock(&dev->struct_mutex);
-
 	if (dev_priv->display.disable_fbc)
 		dev_priv->display.disable_fbc(dev);
 
+	if (dev_priv->pwrctx) {
+		struct drm_i915_gem_object *obj_priv;
+
+		obj_priv = dev_priv->pwrctx->driver_private;
+		I915_WRITE(PWRCTXA, obj_priv->gtt_offset &~ PWRCTX_EN);
+		I915_READ(PWRCTXA);
+		i915_gem_object_unpin(dev_priv->pwrctx);
+		drm_gem_object_unreference(dev_priv->pwrctx);
+	}
+
+	mutex_unlock(&dev->struct_mutex);
+
 	drm_mode_config_cleanup(dev);
 }
 
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i915/i915_opregion.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i915/i915_opregion.c
@@ -118,6 +118,10 @@
 #define ASLE_BACKLIGHT_FAIL    (2<<12)
 #define ASLE_PFIT_FAIL         (2<<14)
 #define ASLE_PWM_FREQ_FAIL     (2<<16)
+#define ASLE_ALS_ILLUM_FAILED	(1<<10)
+#define ASLE_BACKLIGHT_FAILED	(1<<12)
+#define ASLE_PFIT_FAILED	(1<<14)
+#define ASLE_PWM_FREQ_FAILED	(1<<16)
 
 /* ASLE backlight brightness to set */
 #define ASLE_BCLP_VALID                (1<<31)
@@ -163,7 +167,7 @@
 	if (IS_I965G(dev) && (blc_pwm_ctl2 & BLM_COMBINATION_MODE))
 		pci_write_config_dword(dev->pdev, PCI_LBPC, bclp);
 	else {
-		if (IS_IGD(dev)) {
+		if (IS_PINEVIEW(dev)) {
 			blc_pwm_ctl &= ~(BACKLIGHT_DUTY_CYCLE_MASK - 1);
 			max_backlight = (blc_pwm_ctl & BACKLIGHT_MODULATION_FREQ_MASK) >> 
 					BACKLIGHT_MODULATION_FREQ_SHIFT;
@@ -224,7 +228,7 @@
 	asle_req = asle->aslc & ASLE_REQ_MSK;
 
 	if (!asle_req) {
-		DRM_DEBUG("non asle set request??\n");
+		DRM_DEBUG_DRIVER("non asle set request??\n");
 		return;
 	}
 
@@ -243,6 +247,73 @@
 	asle->aslc = asle_stat;
 }
 
+static u32 asle_set_backlight_ironlake(struct drm_device *dev, u32 bclp)
+{
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct opregion_asle *asle = dev_priv->opregion.asle;
+	u32 cpu_pwm_ctl, pch_pwm_ctl2;
+	u32 max_backlight, level;
+
+	if (!(bclp & ASLE_BCLP_VALID))
+		return ASLE_BACKLIGHT_FAILED;
+
+	bclp &= ASLE_BCLP_MSK;
+	if (bclp < 0 || bclp > 255)
+		return ASLE_BACKLIGHT_FAILED;
+
+	cpu_pwm_ctl = I915_READ(BLC_PWM_CPU_CTL);
+	pch_pwm_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
+	/* get the max PWM frequency */
+	max_backlight = (pch_pwm_ctl2 >> 16) & BACKLIGHT_DUTY_CYCLE_MASK;
+	/* calculate the expected PMW frequency */
+	level = (bclp * max_backlight) / 255;
+	/* reserve the high 16 bits */
+	cpu_pwm_ctl &= ~(BACKLIGHT_DUTY_CYCLE_MASK);
+	/* write the updated PWM frequency */
+	I915_WRITE(BLC_PWM_CPU_CTL, cpu_pwm_ctl | level);
+
+	asle->cblv = (bclp*0x64)/0xff | ASLE_CBLV_VALID;
+
+	return 0;
+}
+
+void ironlake_opregion_gse_intr(struct drm_device *dev)
+{
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct opregion_asle *asle = dev_priv->opregion.asle;
+	u32 asle_stat = 0;
+	u32 asle_req;
+
+	if (!asle)
+		return;
+
+	asle_req = asle->aslc & ASLE_REQ_MSK;
+
+	if (!asle_req) {
+		DRM_DEBUG_DRIVER("non asle set request??\n");
+		return;
+	}
+
+	if (asle_req & ASLE_SET_ALS_ILLUM) {
+		DRM_DEBUG_DRIVER("Illum is not supported\n");
+		asle_stat |= ASLE_ALS_ILLUM_FAILED;
+	}
+
+	if (asle_req & ASLE_SET_BACKLIGHT)
+		asle_stat |= asle_set_backlight_ironlake(dev, asle->bclp);
+
+	if (asle_req & ASLE_SET_PFIT) {
+		DRM_DEBUG_DRIVER("Pfit is not supported\n");
+		asle_stat |= ASLE_PFIT_FAILED;
+	}
+
+	if (asle_req & ASLE_SET_PWM_FREQ) {
+		DRM_DEBUG_DRIVER("PWM freq is not supported\n");
+		asle_stat |= ASLE_PWM_FREQ_FAILED;
+	}
+
+	asle->aslc = asle_stat;
+}
 #define ASLE_ALS_EN    (1<<0)
 #define ASLE_BLC_EN    (1<<1)
 #define ASLE_PFIT_EN   (1<<2)
@@ -258,8 +329,7 @@
 			unsigned long irqflags;
 
 			spin_lock_irqsave(&dev_priv->user_irq_lock, irqflags);
-			i915_enable_pipestat(dev_priv, 1,
-					     I915_LEGACY_BLC_EVENT_ENABLE);
+			intel_enable_asle(dev);
 			spin_unlock_irqrestore(&dev_priv->user_irq_lock,
 					       irqflags);
 		}
@@ -312,8 +382,57 @@
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_opregion *opregion = &dev_priv->opregion;
 	struct drm_connector *connector;
+	acpi_handle handle;
+	struct acpi_device *acpi_dev, *acpi_cdev, *acpi_video_bus = NULL;
+	unsigned long long device_id;
+	acpi_status status;
 	int i = 0;
 
+	handle = DEVICE_ACPI_HANDLE(&dev->pdev->dev);
+	if (!handle || ACPI_FAILURE(acpi_bus_get_device(handle, &acpi_dev)))
+		return;
+
+	if (acpi_is_video_device(acpi_dev))
+		acpi_video_bus = acpi_dev;
+	else {
+		list_for_each_entry(acpi_cdev, &acpi_dev->children, node) {
+			if (acpi_is_video_device(acpi_cdev)) {
+				acpi_video_bus = acpi_cdev;
+				break;
+			}
+		}
+	}
+
+	if (!acpi_video_bus) {
+		printk(KERN_WARNING "No ACPI video bus found\n");
+		return;
+	}
+
+	list_for_each_entry(acpi_cdev, &acpi_video_bus->children, node) {
+		if (i >= 8) {
+			dev_printk (KERN_ERR, &dev->pdev->dev,
+				    "More than 8 outputs detected\n");
+			return;
+		}
+		status =
+			acpi_evaluate_integer(acpi_cdev->handle, "_ADR",
+						NULL, &device_id);
+		if (ACPI_SUCCESS(status)) {
+			if (!device_id)
+				goto blind_set;
+			opregion->acpi->didl[i] = (u32)(device_id & 0x0f0f);
+			i++;
+		}
+	}
+
+end:
+	/* If fewer than 8 outputs, the list must be null terminated */
+	if (i < 8)
+		opregion->acpi->didl[i] = 0;
+	return;
+
+blind_set:
+	i = 0;
 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
 		int output_type = ACPI_OTHER_OUTPUT;
 		if (i >= 8) {
@@ -346,10 +465,7 @@
 		opregion->acpi->didl[i] |= (1<<31) | output_type | i;
 		i++;
 	}
-
-	/* If fewer than 8 outputs, the list must be null terminated */
-	if (i < 8)
-		opregion->acpi->didl[i] = 0;
+	goto end;
 }
 
 int intel_opregion_init(struct drm_device *dev, int resume)
@@ -361,9 +477,9 @@
 	int err = 0;
 
 	pci_read_config_dword(dev->pdev, PCI_ASLS, &asls);
-	DRM_DEBUG("graphic opregion physical addr: 0x%x\n", asls);
+	DRM_DEBUG_DRIVER("graphic opregion physical addr: 0x%x\n", asls);
 	if (asls == 0) {
-		DRM_DEBUG("ACPI OpRegion not supported!\n");
+		DRM_DEBUG_DRIVER("ACPI OpRegion not supported!\n");
 		return -ENOTSUPP;
 	}
 
@@ -373,30 +489,30 @@
 
 	opregion->header = base;
 	if (memcmp(opregion->header->signature, OPREGION_SIGNATURE, 16)) {
-		DRM_DEBUG("opregion signature mismatch\n");
+		DRM_DEBUG_DRIVER("opregion signature mismatch\n");
 		err = -EINVAL;
 		goto err_out;
 	}
 
 	mboxes = opregion->header->mboxes;
 	if (mboxes & MBOX_ACPI) {
-		DRM_DEBUG("Public ACPI methods supported\n");
+		DRM_DEBUG_DRIVER("Public ACPI methods supported\n");
 		opregion->acpi = base + OPREGION_ACPI_OFFSET;
 		if (drm_core_check_feature(dev, DRIVER_MODESET))
 			intel_didl_outputs(dev);
 	} else {
-		DRM_DEBUG("Public ACPI methods not supported\n");
+		DRM_DEBUG_DRIVER("Public ACPI methods not supported\n");
 		err = -ENOTSUPP;
 		goto err_out;
 	}
 	opregion->enabled = 1;
 
 	if (mboxes & MBOX_SWSCI) {
-		DRM_DEBUG("SWSCI supported\n");
+		DRM_DEBUG_DRIVER("SWSCI supported\n");
 		opregion->swsci = base + OPREGION_SWSCI_OFFSET;
 	}
 	if (mboxes & MBOX_ASLE) {
-		DRM_DEBUG("ASLE supported\n");
+		DRM_DEBUG_DRIVER("ASLE supported\n");
 		opregion->asle = base + OPREGION_ASLE_OFFSET;
 		opregion_enable_asle(dev);
 	}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i915/intel_tv.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i915/intel_tv.c
@@ -1213,20 +1213,17 @@
 		tv_ctl |= TV_TRILEVEL_SYNC;
 	if (tv_mode->pal_burst)
 		tv_ctl |= TV_PAL_BURST;
+
 	scctl1 = 0;
-	/* dda1 implies valid video levels */
-	if (tv_mode->dda1_inc) {
+	if (tv_mode->dda1_inc)
 		scctl1 |= TV_SC_DDA1_EN;
-	}
-
 	if (tv_mode->dda2_inc)
 		scctl1 |= TV_SC_DDA2_EN;
-
 	if (tv_mode->dda3_inc)
 		scctl1 |= TV_SC_DDA3_EN;
-
 	scctl1 |= tv_mode->sc_reset;
-	scctl1 |= video_levels->burst << TV_BURST_LEVEL_SHIFT;
+	if (video_levels)
+		scctl1 |= video_levels->burst << TV_BURST_LEVEL_SHIFT;
 	scctl1 |= tv_mode->dda1_inc << TV_SCDDA1_INC_SHIFT;
 
 	scctl2 = tv_mode->dda2_size << TV_SCDDA2_SIZE_SHIFT |
@@ -1416,16 +1413,16 @@
 	 *  0 0 0 Component
 	 */
 	if ((tv_dac & TVDAC_SENSE_MASK) == (TVDAC_B_SENSE | TVDAC_C_SENSE)) {
-		DRM_DEBUG("Detected Composite TV connection\n");
+		DRM_DEBUG_KMS("Detected Composite TV connection\n");
 		type = DRM_MODE_CONNECTOR_Composite;
 	} else if ((tv_dac & (TVDAC_A_SENSE|TVDAC_B_SENSE)) == TVDAC_A_SENSE) {
-		DRM_DEBUG("Detected S-Video TV connection\n");
+		DRM_DEBUG_KMS("Detected S-Video TV connection\n");
 		type = DRM_MODE_CONNECTOR_SVIDEO;
 	} else if ((tv_dac & TVDAC_SENSE_MASK) == 0) {
-		DRM_DEBUG("Detected Component TV connection\n");
+		DRM_DEBUG_KMS("Detected Component TV connection\n");
 		type = DRM_MODE_CONNECTOR_Component;
 	} else {
-		DRM_DEBUG("No TV connection detected\n");
+		DRM_DEBUG_KMS("No TV connection detected\n");
 		type = -1;
 	}
 
@@ -1702,6 +1699,41 @@
 	.destroy = intel_tv_enc_destroy,
 };
 
+/*
+ * Enumerate the child dev array parsed from VBT to check whether
+ * the integrated TV is present.
+ * If it is present, return 1.
+ * If it is not present, return false.
+ * If no child dev is parsed from VBT, it assumes that the TV is present.
+ */
+static int tv_is_present_in_vbt(struct drm_device *dev)
+{
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct child_device_config *p_child;
+	int i, ret;
+
+	if (!dev_priv->child_dev_num)
+		return 1;
+
+	ret = 0;
+	for (i = 0; i < dev_priv->child_dev_num; i++) {
+		p_child = dev_priv->child_dev + i;
+		/*
+		 * If the device type is not TV, continue.
+		 */
+		if (p_child->device_type != DEVICE_TYPE_INT_TV &&
+			p_child->device_type != DEVICE_TYPE_TV)
+			continue;
+		/* Only when the addin_offset is non-zero, it is regarded
+		 * as present.
+		 */
+		if (p_child->addin_offset) {
+			ret = 1;
+			break;
+		}
+	}
+	return ret;
+}
 
 void
 intel_tv_init(struct drm_device *dev)
@@ -1717,6 +1749,10 @@
 	if ((I915_READ(TV_CTL) & TV_FUSE_STATE_MASK) == TV_FUSE_STATE_DISABLED)
 		return;
 
+	if (!tv_is_present_in_vbt(dev)) {
+		DRM_DEBUG_KMS("Integrated TV is not present.\n");
+		return;
+	}
 	/* Even if we have an encoder we may not have a connector */
 	if (!dev_priv->int_tv_support)
 		return;
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i915/i915_debugfs.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i915/i915_debugfs.c
@@ -27,6 +27,7 @@
  */
 
 #include <linux/seq_file.h>
+#include <linux/debugfs.h>
 #include "drmP.h"
 #include "drm.h"
 #include "i915_drm.h"
@@ -96,13 +97,14 @@
 	{
 		struct drm_gem_object *obj = obj_priv->obj;
 
-		seq_printf(m, "    %p: %s %8zd %08x %08x %d %s",
+		seq_printf(m, "    %p: %s %8zd %08x %08x %d%s%s",
 			   obj,
 			   get_pin_flag(obj_priv),
 			   obj->size,
 			   obj->read_domains, obj->write_domain,
 			   obj_priv->last_rendering_seqno,
-			   obj_priv->dirty ? "dirty" : "");
+			   obj_priv->dirty ? " dirty" : "",
+			   obj_priv->madv == I915_MADV_DONTNEED ? " purgeable" : "");
 
 		if (obj->name)
 			seq_printf(m, " (name: %d)", obj->name);
@@ -160,7 +162,7 @@
 	struct drm_device *dev = node->minor->dev;
 	drm_i915_private_t *dev_priv = dev->dev_private;
 
-	if (!IS_IGDNG(dev)) {
+	if (!HAS_PCH_SPLIT(dev)) {
 		seq_printf(m, "Interrupt enable:    %08x\n",
 			   I915_READ(IER));
 		seq_printf(m, "Interrupt identity:  %08x\n",
@@ -270,7 +272,7 @@
 		mem = kmap_atomic(pages[page], KM_USER0);
 		for (i = 0; i < PAGE_SIZE; i += 4)
 			seq_printf(m, "%08x :  %08x\n", i, mem[i / 4]);
-		kunmap_atomic(pages[page], KM_USER0);
+		kunmap_atomic(mem, KM_USER0);
 	}
 }
 
@@ -288,7 +290,7 @@
 	list_for_each_entry(obj_priv, &dev_priv->mm.active_list, list) {
 		obj = obj_priv->obj;
 		if (obj->read_domains & I915_GEM_DOMAIN_COMMAND) {
-		    ret = i915_gem_object_get_pages(obj);
+		    ret = i915_gem_object_get_pages(obj, 0);
 		    if (ret) {
 			    DRM_ERROR("Failed to get pages: %d\n", ret);
 			    spin_unlock(&dev_priv->mm.active_list_lock);
@@ -384,37 +386,111 @@
 	return 0;
 }
 
-static int i915_registers_info(struct seq_file *m, void *data) {
-	struct drm_info_node *node = (struct drm_info_node *) m->private;
-	struct drm_device *dev = node->minor->dev;
+static int
+i915_wedged_open(struct inode *inode,
+		 struct file *filp)
+{
+	filp->private_data = inode->i_private;
+	return 0;
+}
+
+static ssize_t
+i915_wedged_read(struct file *filp,
+		 char __user *ubuf,
+		 size_t max,
+		 loff_t *ppos)
+{
+	struct drm_device *dev = filp->private_data;
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	char buf[80];
+	int len;
+
+	len = snprintf(buf, sizeof (buf),
+		       "wedged :  %d\n",
+		       atomic_read(&dev_priv->mm.wedged));
+
+	return simple_read_from_buffer(ubuf, max, ppos, buf, len);
+}
+
+static ssize_t
+i915_wedged_write(struct file *filp,
+		  const char __user *ubuf,
+		  size_t cnt,
+		  loff_t *ppos)
+{
+	struct drm_device *dev = filp->private_data;
 	drm_i915_private_t *dev_priv = dev->dev_private;
-	uint32_t reg;
+	char buf[20];
+	int val = 1;
+
+	if (cnt > 0) {
+		if (cnt > sizeof (buf) - 1)
+			return -EINVAL;
+
+		if (copy_from_user(buf, ubuf, cnt))
+			return -EFAULT;
+		buf[cnt] = 0;
+
+		val = simple_strtoul(buf, NULL, 0);
+	}
+
+	DRM_INFO("Manually setting wedged to %d\n", val);
 
-#define DUMP_RANGE(start, end) \
-	for (reg=start; reg < end; reg += 4) \
-	seq_printf(m, "%08x\t%08x\n", reg, I915_READ(reg));
-
-	DUMP_RANGE(0x00000, 0x00fff);   /* VGA registers */
-	DUMP_RANGE(0x02000, 0x02fff);   /* instruction, memory, interrupt control registers */
-	DUMP_RANGE(0x03000, 0x031ff);   /* FENCE and PPGTT control registers */
-	DUMP_RANGE(0x03200, 0x03fff);   /* frame buffer compression registers */
-	DUMP_RANGE(0x05000, 0x05fff);   /* I/O control registers */
-	DUMP_RANGE(0x06000, 0x06fff);   /* clock control registers */
-	DUMP_RANGE(0x07000, 0x07fff);   /* 3D internal debug registers */
-	DUMP_RANGE(0x07400, 0x088ff);   /* GPE debug registers */
-	DUMP_RANGE(0x0a000, 0x0afff);   /* display palette registers */
-	DUMP_RANGE(0x10000, 0x13fff);   /* MMIO MCHBAR */
-	DUMP_RANGE(0x30000, 0x3ffff);   /* overlay registers */
-	DUMP_RANGE(0x60000, 0x6ffff);   /* display engine pipeline registers */
-	DUMP_RANGE(0x70000, 0x72fff);   /* display and cursor registers */
-	DUMP_RANGE(0x73000, 0x73fff);   /* performance counters */
+	atomic_set(&dev_priv->mm.wedged, val);
+	if (val) {
+		DRM_WAKEUP(&dev_priv->irq_queue);
+		queue_work(dev_priv->wq, &dev_priv->error_work);
+	}
+
+	return cnt;
+}
+
+static const struct file_operations i915_wedged_fops = {
+	.owner = THIS_MODULE,
+	.open = i915_wedged_open,
+	.read = i915_wedged_read,
+	.write = i915_wedged_write,
+};
+
+/* As the drm_debugfs_init() routines are called before dev->dev_private is
+ * allocated we need to hook into the minor for release. */
+static int
+drm_add_fake_info_node(struct drm_minor *minor,
+		       struct dentry *ent,
+		       const void *key)
+{
+	struct drm_info_node *node;
+
+	node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
+	if (node == NULL) {
+		debugfs_remove(ent);
+		return -ENOMEM;
+	}
+
+	node->minor = minor;
+	node->dent = ent;
+	node->info_ent = (void *) key;
+	list_add(&node->list, &minor->debugfs_nodes.list);
 
 	return 0;
 }
 
+static int i915_wedged_create(struct dentry *root, struct drm_minor *minor)
+{
+	struct drm_device *dev = minor->dev;
+	struct dentry *ent;
+
+	ent = debugfs_create_file("i915_wedged",
+				  S_IRUGO | S_IWUSR,
+				  root, dev,
+				  &i915_wedged_fops);
+	if (IS_ERR(ent))
+		return PTR_ERR(ent);
+
+	return drm_add_fake_info_node(minor, ent, &i915_wedged_fops);
+}
 
 static struct drm_info_list i915_debugfs_list[] = {
-	{"i915_regs", i915_registers_info, 0},
 	{"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
 	{"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
 	{"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
@@ -432,6 +508,12 @@
 
 int i915_debugfs_init(struct drm_minor *minor)
 {
+	int ret;
+
+	ret = i915_wedged_create(minor->debugfs_root, minor);
+	if (ret)
+		return ret;
+
 	return drm_debugfs_create_files(i915_debugfs_list,
 					I915_DEBUGFS_ENTRIES,
 					minor->debugfs_root, minor);
@@ -441,7 +523,8 @@
 {
 	drm_debugfs_remove_files(i915_debugfs_list,
 				 I915_DEBUGFS_ENTRIES, minor);
+	drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
+				 1, minor);
 }
 
 #endif /* CONFIG_DEBUG_FS */
-
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i915/intel_dp.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i915/intel_dp.c
@@ -33,7 +33,8 @@
 #include "intel_drv.h"
 #include "i915_drm.h"
 #include "i915_drv.h"
-#include "intel_dp.h"
+#include "drm_dp_helper.h"
+
 
 #define DP_LINK_STATUS_SIZE	6
 #define DP_LINK_CHECK_TIMEOUT	(10 * 1000)
@@ -124,9 +125,21 @@
 
 /* I think this is a fiction */
 static int
-intel_dp_link_required(int pixel_clock)
+intel_dp_link_required(struct drm_device *dev,
+		       struct intel_output *intel_output, int pixel_clock)
+{
+	struct drm_i915_private *dev_priv = dev->dev_private;
+
+	if (IS_eDP(intel_output))
+		return (pixel_clock * dev_priv->edp_bpp) / 8;
+	else
+		return pixel_clock * 3;
+}
+
+static int
+intel_dp_max_data_rate(int max_link_clock, int max_lanes)
 {
-	return pixel_clock * 3;
+	return (max_link_clock * max_lanes * 8) / 10;
 }
 
 static int
@@ -137,7 +150,11 @@
 	int max_link_clock = intel_dp_link_clock(intel_dp_max_link_bw(intel_output));
 	int max_lanes = intel_dp_max_lane_count(intel_output);
 
-	if (intel_dp_link_required(mode->clock) > max_link_clock * max_lanes)
+	/* only refuse the mode on non eDP since we have seen some wierd eDP panels
+	   which are outside spec tolerances but somehow work by magic */
+	if (!IS_eDP(intel_output) &&
+	    (intel_dp_link_required(connector->dev, intel_output, mode->clock)
+	     > intel_dp_max_data_rate(max_link_clock, max_lanes)))
 		return MODE_CLOCK_HIGH;
 
 	if (mode->clock < 10000)
@@ -223,8 +240,8 @@
 	 */
 	if (IS_eDP(intel_output))
 		aux_clock_divider = 225; /* eDP input clock at 450Mhz */
-	else if (IS_IGDNG(dev))
-		aux_clock_divider = 62; /* IGDNG: input clock fixed at 125Mhz */
+	else if (IS_IRONLAKE(dev))
+		aux_clock_divider = 62; /* IRL input clock fixed at 125Mhz */
 	else
 		aux_clock_divider = intel_hrawclk(dev) / 2;
 
@@ -282,7 +299,7 @@
 	/* Timeouts occur when the device isn't connected, so they're
 	 * "normal" -- don't fill the kernel log with these */
 	if (status & DP_AUX_CH_CTL_TIME_OUT_ERROR) {
-		DRM_DEBUG("dp_aux_ch timeout status 0x%08x\n", status);
+		DRM_DEBUG_KMS("dp_aux_ch timeout status 0x%08x\n", status);
 		return -ETIMEDOUT;
 	}
 
@@ -382,17 +399,77 @@
 }
 
 static int
-intel_dp_i2c_aux_ch(struct i2c_adapter *adapter,
-		    uint8_t *send, int send_bytes,
-		    uint8_t *recv, int recv_bytes)
+intel_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
+		    uint8_t write_byte, uint8_t *read_byte)
 {
+	struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
 	struct intel_dp_priv *dp_priv = container_of(adapter,
 						     struct intel_dp_priv,
 						     adapter);
 	struct intel_output *intel_output = dp_priv->intel_output;
+	uint16_t address = algo_data->address;
+	uint8_t msg[5];
+	uint8_t reply[2];
+	int msg_bytes;
+	int reply_bytes;
+	int ret;
+
+	/* Set up the command byte */
+	if (mode & MODE_I2C_READ)
+		msg[0] = AUX_I2C_READ << 4;
+	else
+		msg[0] = AUX_I2C_WRITE << 4;
+
+	if (!(mode & MODE_I2C_STOP))
+		msg[0] |= AUX_I2C_MOT << 4;
+
+	msg[1] = address >> 8;
+	msg[2] = address;
 
-	return intel_dp_aux_ch(intel_output,
-			       send, send_bytes, recv, recv_bytes);
+	switch (mode) {
+	case MODE_I2C_WRITE:
+		msg[3] = 0;
+		msg[4] = write_byte;
+		msg_bytes = 5;
+		reply_bytes = 1;
+		break;
+	case MODE_I2C_READ:
+		msg[3] = 0;
+		msg_bytes = 4;
+		reply_bytes = 2;
+		break;
+	default:
+		msg_bytes = 3;
+		reply_bytes = 1;
+		break;
+	}
+
+	for (;;) {
+	  ret = intel_dp_aux_ch(intel_output,
+				msg, msg_bytes,
+				reply, reply_bytes);
+		if (ret < 0) {
+			DRM_DEBUG_KMS("aux_ch failed %d\n", ret);
+			return ret;
+		}
+		switch (reply[0] & AUX_I2C_REPLY_MASK) {
+		case AUX_I2C_REPLY_ACK:
+			if (mode == MODE_I2C_READ) {
+				*read_byte = reply[1];
+			}
+			return reply_bytes - 1;
+		case AUX_I2C_REPLY_NACK:
+			DRM_DEBUG_KMS("aux_ch nack\n");
+			return -EREMOTEIO;
+		case AUX_I2C_REPLY_DEFER:
+			DRM_DEBUG_KMS("aux_ch defer\n");
+			udelay(100);
+			break;
+		default:
+			DRM_ERROR("aux_ch invalid reply 0x%02x\n", reply[0]);
+			return -EREMOTEIO;
+		}
+	}
 }
 
 static int
@@ -429,19 +506,33 @@
 
 	for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) {
 		for (clock = 0; clock <= max_clock; clock++) {
-			int link_avail = intel_dp_link_clock(bws[clock]) * lane_count;
+			int link_avail = intel_dp_max_data_rate(intel_dp_link_clock(bws[clock]), lane_count);
 
-			if (intel_dp_link_required(mode->clock) <= link_avail) {
+			if (intel_dp_link_required(encoder->dev, intel_output, mode->clock)
+					<= link_avail) {
 				dp_priv->link_bw = bws[clock];
 				dp_priv->lane_count = lane_count;
 				adjusted_mode->clock = intel_dp_link_clock(dp_priv->link_bw);
-				DRM_DEBUG("Display port link bw %02x lane count %d clock %d\n",
+				DRM_DEBUG_KMS("Display port link bw %02x lane "
+						"count %d clock %d\n",
 				       dp_priv->link_bw, dp_priv->lane_count,
 				       adjusted_mode->clock);
 				return true;
 			}
 		}
 	}
+
+	if (IS_eDP(intel_output)) {
+		/* okay we failed just pick the highest */
+		dp_priv->lane_count = max_lane_count;
+		dp_priv->link_bw = bws[max_clock];
+		adjusted_mode->clock = intel_dp_link_clock(dp_priv->link_bw);
+		DRM_DEBUG_KMS("Force picking display port link bw %02x lane "
+			      "count %d clock %d\n",
+			      dp_priv->link_bw, dp_priv->lane_count,
+			      adjusted_mode->clock);
+		return true;
+	}
 	return false;
 }
 
@@ -514,7 +605,7 @@
 	intel_dp_compute_m_n(3, lane_count,
 			     mode->clock, adjusted_mode->clock, &m_n);
 
-	if (IS_IGDNG(dev)) {
+	if (IS_IRONLAKE(dev)) {
 		if (intel_crtc->pipe == 0) {
 			I915_WRITE(TRANSA_DATA_M1,
 				   ((m_n.tu - 1) << PIPE_GMCH_DATA_M_TU_SIZE_SHIFT) |
@@ -606,23 +697,68 @@
 	}
 }
 
-static void igdng_edp_backlight_on (struct drm_device *dev)
+static void ironlake_edp_panel_on (struct drm_device *dev)
+{
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	unsigned long timeout = jiffies + msecs_to_jiffies(5000);
+	u32 pp, pp_status;
+
+	pp_status = I915_READ(PCH_PP_STATUS);
+	if (pp_status & PP_ON)
+		return;
+
+	pp = I915_READ(PCH_PP_CONTROL);
+	pp |= PANEL_UNLOCK_REGS | POWER_TARGET_ON;
+	I915_WRITE(PCH_PP_CONTROL, pp);
+	do {
+		pp_status = I915_READ(PCH_PP_STATUS);
+	} while (((pp_status & PP_ON) == 0) && !time_after(jiffies, timeout));
+
+	if (time_after(jiffies, timeout))
+		DRM_DEBUG_KMS("panel on wait timed out: 0x%08x\n", pp_status);
+
+	pp &= ~(PANEL_UNLOCK_REGS | EDP_FORCE_VDD);
+	I915_WRITE(PCH_PP_CONTROL, pp);
+}
+
+static void ironlake_edp_panel_off (struct drm_device *dev)
+{
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	unsigned long timeout = jiffies + msecs_to_jiffies(5000);
+	u32 pp, pp_status;
+
+	pp = I915_READ(PCH_PP_CONTROL);
+	pp &= ~POWER_TARGET_ON;
+	I915_WRITE(PCH_PP_CONTROL, pp);
+	do {
+		pp_status = I915_READ(PCH_PP_STATUS);
+	} while ((pp_status & PP_ON) && !time_after(jiffies, timeout));
+
+	if (time_after(jiffies, timeout))
+		DRM_DEBUG_KMS("panel off wait timed out\n");
+
+	/* Make sure VDD is enabled so DP AUX will work */
+	pp |= EDP_FORCE_VDD;
+	I915_WRITE(PCH_PP_CONTROL, pp);
+}
+
+static void ironlake_edp_backlight_on (struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	u32 pp;
 
-	DRM_DEBUG("\n");
+	DRM_DEBUG_KMS("\n");
 	pp = I915_READ(PCH_PP_CONTROL);
 	pp |= EDP_BLC_ENABLE;
 	I915_WRITE(PCH_PP_CONTROL, pp);
 }
 
-static void igdng_edp_backlight_off (struct drm_device *dev)
+static void ironlake_edp_backlight_off (struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	u32 pp;
 
-	DRM_DEBUG("\n");
+	DRM_DEBUG_KMS("\n");
 	pp = I915_READ(PCH_PP_CONTROL);
 	pp &= ~EDP_BLC_ENABLE;
 	I915_WRITE(PCH_PP_CONTROL, pp);
@@ -640,14 +776,18 @@
 	if (mode != DRM_MODE_DPMS_ON) {
 		if (dp_reg & DP_PORT_EN) {
 			intel_dp_link_down(intel_output, dp_priv->DP);
-			if (IS_eDP(intel_output))
-				igdng_edp_backlight_off(dev);
+			if (IS_eDP(intel_output)) {
+				ironlake_edp_backlight_off(dev);
+				ironlake_edp_panel_off(dev);
+			}
 		}
 	} else {
 		if (!(dp_reg & DP_PORT_EN)) {
 			intel_dp_link_train(intel_output, dp_priv->DP, dp_priv->link_configuration);
-			if (IS_eDP(intel_output))
-				igdng_edp_backlight_on(dev);
+			if (IS_eDP(intel_output)) {
+				ironlake_edp_panel_on(dev);
+				ironlake_edp_backlight_on(dev);
+			}
 		}
 	}
 	dp_priv->dpms_mode = mode;
@@ -1010,7 +1150,7 @@
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_dp_priv *dp_priv = intel_output->dev_priv;
 
-	DRM_DEBUG("\n");
+	DRM_DEBUG_KMS("\n");
 
 	if (IS_eDP(intel_output)) {
 		DP &= ~DP_PLL_ENABLE;
@@ -1071,7 +1211,7 @@
 }
 
 static enum drm_connector_status
-igdng_dp_detect(struct drm_connector *connector)
+ironlake_dp_detect(struct drm_connector *connector)
 {
 	struct intel_output *intel_output = to_intel_output(connector);
 	struct intel_dp_priv *dp_priv = intel_output->dev_priv;
@@ -1106,18 +1246,8 @@
 
 	dp_priv->has_audio = false;
 
-	if (IS_IGDNG(dev))
-		return igdng_dp_detect(connector);
-
-	temp = I915_READ(PORT_HOTPLUG_EN);
-
-	I915_WRITE(PORT_HOTPLUG_EN,
-	       temp |
-	       DPB_HOTPLUG_INT_EN |
-	       DPC_HOTPLUG_INT_EN |
-	       DPD_HOTPLUG_INT_EN);
-
-	POSTING_READ(PORT_HOTPLUG_EN);
+	if (IS_IRONLAKE(dev))
+		return ironlake_dp_detect(connector);
 
 	switch (dp_priv->output_reg) {
 	case DP_B:
@@ -1254,18 +1384,17 @@
 	else
 		intel_output->type = INTEL_OUTPUT_DISPLAYPORT;
 
-	if (output_reg == DP_B)
+	if (output_reg == DP_B || output_reg == PCH_DP_B)
 		intel_output->clone_mask = (1 << INTEL_DP_B_CLONE_BIT);
-	else if (output_reg == DP_C)
+	else if (output_reg == DP_C || output_reg == PCH_DP_C)
 		intel_output->clone_mask = (1 << INTEL_DP_C_CLONE_BIT);
-	else if (output_reg == DP_D)
+	else if (output_reg == DP_D || output_reg == PCH_DP_D)
 		intel_output->clone_mask = (1 << INTEL_DP_D_CLONE_BIT);
 
-	if (IS_eDP(intel_output)) {
-		intel_output->crtc_mask = (1 << 1);
+	if (IS_eDP(intel_output))
 		intel_output->clone_mask = (1 << INTEL_EDP_CLONE_BIT);
-	} else
-		intel_output->crtc_mask = (1 << 0) | (1 << 1);
+
+	intel_output->crtc_mask = (1 << 0) | (1 << 1);
 	connector->interlace_allowed = true;
 	connector->doublescan_allowed = 0;
 
@@ -1290,14 +1419,20 @@
 			break;
 		case DP_B:
 		case PCH_DP_B:
+			dev_priv->hotplug_supported_mask |=
+				HDMIB_HOTPLUG_INT_STATUS;
 			name = "DPDDC-B";
 			break;
 		case DP_C:
 		case PCH_DP_C:
+			dev_priv->hotplug_supported_mask |=
+				HDMIC_HOTPLUG_INT_STATUS;
 			name = "DPDDC-C";
 			break;
 		case DP_D:
 		case PCH_DP_D:
+			dev_priv->hotplug_supported_mask |=
+				HDMID_HOTPLUG_INT_STATUS;
 			name = "DPDDC-D";
 			break;
 	}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i915/dvo_ivch.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i915/dvo_ivch.c
@@ -202,7 +202,8 @@
 	};
 
 	if (!priv->quiet) {
-		DRM_DEBUG("Unable to read register 0x%02x from %s:%02x.\n",
+		DRM_DEBUG_KMS("Unable to read register 0x%02x from "
+				"%s:%02x.\n",
 			  addr, i2cbus->adapter.name, dvo->slave_addr);
 	}
 	return false;
@@ -230,7 +231,7 @@
 		return true;
 
 	if (!priv->quiet) {
-		DRM_DEBUG("Unable to write register 0x%02x to %s:%d.\n",
+		DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n",
 			  addr, i2cbus->adapter.name, dvo->slave_addr);
 	}
 
@@ -261,7 +262,7 @@
 	 * the address it's responding on.
 	 */
 	if ((temp & VR00_BASE_ADDRESS_MASK) != dvo->slave_addr) {
-		DRM_DEBUG("ivch detect failed due to address mismatch "
+		DRM_DEBUG_KMS("ivch detect failed due to address mismatch "
 			  "(%d vs %d)\n",
 			  (temp & VR00_BASE_ADDRESS_MASK), dvo->slave_addr);
 		goto out;
@@ -367,41 +368,41 @@
 	uint16_t val;
 
 	ivch_read(dvo, VR00, &val);
-	DRM_DEBUG("VR00: 0x%04x\n", val);
+	DRM_LOG_KMS("VR00: 0x%04x\n", val);
 	ivch_read(dvo, VR01, &val);
-	DRM_DEBUG("VR01: 0x%04x\n", val);
+	DRM_LOG_KMS("VR01: 0x%04x\n", val);
 	ivch_read(dvo, VR30, &val);
-	DRM_DEBUG("VR30: 0x%04x\n", val);
+	DRM_LOG_KMS("VR30: 0x%04x\n", val);
 	ivch_read(dvo, VR40, &val);
-	DRM_DEBUG("VR40: 0x%04x\n", val);
+	DRM_LOG_KMS("VR40: 0x%04x\n", val);
 
 	/* GPIO registers */
 	ivch_read(dvo, VR80, &val);
-	DRM_DEBUG("VR80: 0x%04x\n", val);
+	DRM_LOG_KMS("VR80: 0x%04x\n", val);
 	ivch_read(dvo, VR81, &val);
-	DRM_DEBUG("VR81: 0x%04x\n", val);
+	DRM_LOG_KMS("VR81: 0x%04x\n", val);
 	ivch_read(dvo, VR82, &val);
-	DRM_DEBUG("VR82: 0x%04x\n", val);
+	DRM_LOG_KMS("VR82: 0x%04x\n", val);
 	ivch_read(dvo, VR83, &val);
-	DRM_DEBUG("VR83: 0x%04x\n", val);
+	DRM_LOG_KMS("VR83: 0x%04x\n", val);
 	ivch_read(dvo, VR84, &val);
-	DRM_DEBUG("VR84: 0x%04x\n", val);
+	DRM_LOG_KMS("VR84: 0x%04x\n", val);
 	ivch_read(dvo, VR85, &val);
-	DRM_DEBUG("VR85: 0x%04x\n", val);
+	DRM_LOG_KMS("VR85: 0x%04x\n", val);
 	ivch_read(dvo, VR86, &val);
-	DRM_DEBUG("VR86: 0x%04x\n", val);
+	DRM_LOG_KMS("VR86: 0x%04x\n", val);
 	ivch_read(dvo, VR87, &val);
-	DRM_DEBUG("VR87: 0x%04x\n", val);
+	DRM_LOG_KMS("VR87: 0x%04x\n", val);
 	ivch_read(dvo, VR88, &val);
-	DRM_DEBUG("VR88: 0x%04x\n", val);
+	DRM_LOG_KMS("VR88: 0x%04x\n", val);
 
 	/* Scratch register 0 - AIM Panel type */
 	ivch_read(dvo, VR8E, &val);
-	DRM_DEBUG("VR8E: 0x%04x\n", val);
+	DRM_LOG_KMS("VR8E: 0x%04x\n", val);
 
 	/* Scratch register 1 - Status register */
 	ivch_read(dvo, VR8F, &val);
-	DRM_DEBUG("VR8F: 0x%04x\n", val);
+	DRM_LOG_KMS("VR8F: 0x%04x\n", val);
 }
 
 static void ivch_save(struct intel_dvo_device *dvo)
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i915/intel_sdvo.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i915/intel_sdvo.c
@@ -35,8 +35,7 @@
 #include "i915_drm.h"
 #include "i915_drv.h"
 #include "intel_sdvo_regs.h"
-
-#undef SDVO_DEBUG
+#include <linux/dmi.h>
 
 static char *tv_format_names[] = {
 	"NTSC_M"   , "NTSC_J"  , "NTSC_443",
@@ -356,7 +355,6 @@
 #define SDVO_NAME(dev_priv) ((dev_priv)->output_device == SDVOB ? "SDVOB" : "SDVOC")
 #define SDVO_PRIV(output)   ((struct intel_sdvo_priv *) (output)->dev_priv)
 
-#ifdef SDVO_DEBUG
 static void intel_sdvo_debug_write(struct intel_output *intel_output, u8 cmd,
 				   void *args, int args_len)
 {
@@ -379,9 +377,6 @@
 		DRM_LOG_KMS("(%02X)", cmd);
 	DRM_LOG_KMS("\n");
 }
-#else
-#define intel_sdvo_debug_write(o, c, a, l)
-#endif
 
 static void intel_sdvo_write_cmd(struct intel_output *intel_output, u8 cmd,
 				 void *args, int args_len)
@@ -398,7 +393,6 @@
 	intel_sdvo_write_byte(intel_output, SDVO_I2C_OPCODE, cmd);
 }
 
-#ifdef SDVO_DEBUG
 static const char *cmd_status_names[] = {
 	"Power on",
 	"Success",
@@ -427,9 +421,6 @@
 		DRM_LOG_KMS("(??? %d)", status);
 	DRM_LOG_KMS("\n");
 }
-#else
-#define intel_sdvo_debug_response(o, r, l, s)
-#endif
 
 static u8 intel_sdvo_read_response(struct intel_output *intel_output,
 				   void *response, int response_len)
@@ -472,14 +463,63 @@
 }
 
 /**
- * Don't check status code from this as it switches the bus back to the
- * SDVO chips which defeats the purpose of doing a bus switch in the first
- * place.
+ * Try to read the response after issuie the DDC switch command. But it
+ * is noted that we must do the action of reading response and issuing DDC
+ * switch command in one I2C transaction. Otherwise when we try to start
+ * another I2C transaction after issuing the DDC bus switch, it will be
+ * switched to the internal SDVO register.
  */
 static void intel_sdvo_set_control_bus_switch(struct intel_output *intel_output,
 					      u8 target)
 {
-	intel_sdvo_write_cmd(intel_output, SDVO_CMD_SET_CONTROL_BUS_SWITCH, &target, 1);
+	struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv;
+	u8 out_buf[2], cmd_buf[2], ret_value[2], ret;
+	struct i2c_msg msgs[] = {
+		{
+			.addr = sdvo_priv->slave_addr >> 1,
+			.flags = 0,
+			.len = 2,
+			.buf = out_buf,
+		},
+		/* the following two are to read the response */
+		{
+			.addr = sdvo_priv->slave_addr >> 1,
+			.flags = 0,
+			.len = 1,
+			.buf = cmd_buf,
+		},
+		{
+			.addr = sdvo_priv->slave_addr >> 1,
+			.flags = I2C_M_RD,
+			.len = 1,
+			.buf = ret_value,
+		},
+	};
+
+	intel_sdvo_debug_write(intel_output, SDVO_CMD_SET_CONTROL_BUS_SWITCH,
+					&target, 1);
+	/* write the DDC switch command argument */
+	intel_sdvo_write_byte(intel_output, SDVO_I2C_ARG_0, target);
+
+	out_buf[0] = SDVO_I2C_OPCODE;
+	out_buf[1] = SDVO_CMD_SET_CONTROL_BUS_SWITCH;
+	cmd_buf[0] = SDVO_I2C_CMD_STATUS;
+	cmd_buf[1] = 0;
+	ret_value[0] = 0;
+	ret_value[1] = 0;
+
+	ret = i2c_transfer(intel_output->i2c_bus, msgs, 3);
+	if (ret != 3) {
+		/* failure in I2C transfer */
+		DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
+		return;
+	}
+	if (ret_value[0] != SDVO_CMD_STATUS_SUCCESS) {
+		DRM_DEBUG_KMS("DDC switch command returns response %d\n",
+					ret_value[0]);
+		return;
+	}
+	return;
 }
 
 static bool intel_sdvo_set_target_input(struct intel_output *intel_output, bool target_0, bool target_1)
@@ -1589,6 +1629,32 @@
 	edid = drm_get_edid(&intel_output->base,
 			    intel_output->ddc_bus);
 
+	/* This is only applied to SDVO cards with multiple outputs */
+	if (edid == NULL && intel_sdvo_multifunc_encoder(intel_output)) {
+		uint8_t saved_ddc, temp_ddc;
+		saved_ddc = sdvo_priv->ddc_bus;
+		temp_ddc = sdvo_priv->ddc_bus >> 1;
+		/*
+		 * Don't use the 1 as the argument of DDC bus switch to get
+		 * the EDID. It is used for SDVO SPD ROM.
+		 */
+		while(temp_ddc > 1) {
+			sdvo_priv->ddc_bus = temp_ddc;
+			edid = drm_get_edid(&intel_output->base,
+				intel_output->ddc_bus);
+			if (edid) {
+				/*
+				 * When we can get the EDID, maybe it is the
+				 * correct DDC bus. Update it.
+				 */
+				sdvo_priv->ddc_bus = temp_ddc;
+				break;
+			}
+			temp_ddc >>= 1;
+		}
+		if (edid == NULL)
+			sdvo_priv->ddc_bus = saved_ddc;
+	}
 	/* when there is no edid and no monitor is connected with VGA
 	 * port, try to use the CRT ddc to read the EDID for DVI-connector
 	 */
@@ -1627,6 +1693,10 @@
 
 	intel_sdvo_write_cmd(intel_output,
 			     SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0);
+	/* add 30ms delay when the output type might be TV */
+	if (sdvo_priv->caps.output_flags &
+	    (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0))
+ 		mdelay(30);
 	status = intel_sdvo_read_response(intel_output, &response, 2);
 
 	DRM_DEBUG_KMS("SDVO response %d %d\n", response & 0xff, response >> 8);
@@ -2214,6 +2284,25 @@
 		return 0x72;
 }
 
+static int intel_sdvo_bad_tv_callback(const struct dmi_system_id *id)
+{
+	DRM_DEBUG_KMS("Ignoring bad SDVO TV connector for %s\n", id->ident);
+	return 1;
+}
+
+static struct dmi_system_id intel_sdvo_bad_tv[] = {
+	{
+		.callback = intel_sdvo_bad_tv_callback,
+		.ident = "IntelG45/ICH10R/DME1737",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "IBM CORPORATION"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "4800784"),
+		},
+	},
+
+	{ }	/* terminating entry */
+};
+
 static bool
 intel_sdvo_output_setup(struct intel_output *intel_output, uint16_t flags)
 {
@@ -2254,7 +2343,8 @@
 					(1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
 					(1 << INTEL_ANALOG_CLONE_BIT);
 		}
-	} else if (flags & SDVO_OUTPUT_SVID0) {
+	} else if ((flags & SDVO_OUTPUT_SVID0) &&
+		   !dmi_check_system(intel_sdvo_bad_tv)) {
 
 		sdvo_priv->controlled_output = SDVO_OUTPUT_SVID0;
 		encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
@@ -2276,6 +2366,14 @@
 		connector->connector_type = DRM_MODE_CONNECTOR_VGA;
 		intel_output->clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
 					(1 << INTEL_ANALOG_CLONE_BIT);
+	} else if (flags & SDVO_OUTPUT_CVBS0) {
+
+		sdvo_priv->controlled_output = SDVO_OUTPUT_CVBS0;
+		encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
+		connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
+		sdvo_priv->is_tv = true;
+		intel_output->needs_tv_clock = true;
+		intel_output->clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
 	} else if (flags & SDVO_OUTPUT_LVDS0) {
 
 		sdvo_priv->controlled_output = SDVO_OUTPUT_LVDS0;
@@ -2668,6 +2766,7 @@
 
 bool intel_sdvo_init(struct drm_device *dev, int output_device)
 {
+	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct drm_connector *connector;
 	struct intel_output *intel_output;
 	struct intel_sdvo_priv *sdvo_priv;
@@ -2714,10 +2813,12 @@
 		intel_output->ddc_bus = intel_i2c_create(dev, GPIOE, "SDVOB DDC BUS");
 		sdvo_priv->analog_ddc_bus = intel_i2c_create(dev, GPIOA,
 						"SDVOB/VGA DDC BUS");
+		dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
 	} else {
 		intel_output->ddc_bus = intel_i2c_create(dev, GPIOE, "SDVOC DDC BUS");
 		sdvo_priv->analog_ddc_bus = intel_i2c_create(dev, GPIOA,
 						"SDVOC/VGA DDC BUS");
+		dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
 	}
 
 	if (intel_output->ddc_bus == NULL)
@@ -2726,7 +2827,7 @@
 	/* Wrap with our custom algo which switches to DDC mode */
 	intel_output->ddc_bus->algo = &intel_sdvo_i2c_bit_algo;
 
-	/* In defaut case sdvo lvds is false */
+	/* In default case sdvo lvds is false */
 	intel_sdvo_get_capabilities(intel_output, &sdvo_priv->caps);
 
 	if (intel_sdvo_output_setup(intel_output,
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i915/intel_lvds.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i915/intel_lvds.c
@@ -56,7 +56,7 @@
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	u32 blc_pwm_ctl, reg;
 
-	if (IS_IGDNG(dev))
+	if (IS_IRONLAKE(dev))
 		reg = BLC_PWM_CPU_CTL;
 	else
 		reg = BLC_PWM_CTL;
@@ -74,7 +74,7 @@
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	u32 reg;
 
-	if (IS_IGDNG(dev))
+	if (IS_IRONLAKE(dev))
 		reg = BLC_PWM_PCH_CTL2;
 	else
 		reg = BLC_PWM_CTL;
@@ -91,7 +91,7 @@
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	u32 pp_status, ctl_reg, status_reg;
 
-	if (IS_IGDNG(dev)) {
+	if (IS_IRONLAKE(dev)) {
 		ctl_reg = PCH_PP_CONTROL;
 		status_reg = PCH_PP_STATUS;
 	} else {
@@ -137,7 +137,7 @@
 	u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg;
 	u32 pwm_ctl_reg;
 
-	if (IS_IGDNG(dev)) {
+	if (IS_IRONLAKE(dev)) {
 		pp_on_reg = PCH_PP_ON_DELAYS;
 		pp_off_reg = PCH_PP_OFF_DELAYS;
 		pp_ctl_reg = PCH_PP_CONTROL;
@@ -174,7 +174,7 @@
 	u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg;
 	u32 pwm_ctl_reg;
 
-	if (IS_IGDNG(dev)) {
+	if (IS_IRONLAKE(dev)) {
 		pp_on_reg = PCH_PP_ON_DELAYS;
 		pp_off_reg = PCH_PP_OFF_DELAYS;
 		pp_ctl_reg = PCH_PP_CONTROL;
@@ -297,7 +297,7 @@
 	}
 
 	/* full screen scale for now */
-	if (IS_IGDNG(dev))
+	if (IS_IRONLAKE(dev))
 		goto out;
 
 	/* 965+ wants fuzzy fitting */
@@ -327,7 +327,7 @@
 	 * to register description and PRM.
 	 * Change the value here to see the borders for debugging
 	 */
-	if (!IS_IGDNG(dev)) {
+	if (!IS_IRONLAKE(dev)) {
 		I915_WRITE(BCLRPAT_A, 0);
 		I915_WRITE(BCLRPAT_B, 0);
 	}
@@ -548,7 +548,7 @@
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	u32 reg;
 
-	if (IS_IGDNG(dev))
+	if (IS_IRONLAKE(dev))
 		reg = BLC_PWM_CPU_CTL;
 	else
 		reg = BLC_PWM_CTL;
@@ -587,7 +587,7 @@
 	 * settings.
 	 */
 
-	if (IS_IGDNG(dev))
+	if (IS_IRONLAKE(dev))
 		return;
 
 	/*
@@ -599,18 +599,6 @@
 	I915_WRITE(PFIT_CONTROL, lvds_priv->pfit_control);
 }
 
-/* Some lid devices report incorrect lid status, assume they're connected */
-static const struct dmi_system_id bad_lid_status[] = {
-	{
-		.ident = "Aspire One",
-		.matches = {
-			DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
-			DMI_MATCH(DMI_PRODUCT_NAME, "Aspire one"),
-		},
-	},
-	{ }
-};
-
 /**
  * Detect the LVDS connection.
  *
@@ -620,10 +608,14 @@
  */
 static enum drm_connector_status intel_lvds_detect(struct drm_connector *connector)
 {
+	struct drm_device *dev = connector->dev;
 	enum drm_connector_status status = connector_status_connected;
 
-	if (!acpi_lid_open() && !dmi_check_system(bad_lid_status))
-		status = connector_status_disconnected;
+	/* ACPI lid methods were generally unreliable in this generation, so
+	 * don't even bother.
+	 */
+	if (IS_GEN2(dev) || IS_GEN3(dev))
+		return connector_status_connected;
 
 	return status;
 }
@@ -679,7 +671,14 @@
 	struct drm_i915_private *dev_priv =
 		container_of(nb, struct drm_i915_private, lid_notifier);
 	struct drm_device *dev = dev_priv->dev;
+	struct drm_connector *connector = dev_priv->int_lvds_connector;
 
+	/*
+	 * check and update the status of LVDS connector after receiving
+	 * the LID nofication event.
+	 */
+	if (connector)
+		connector->status = connector->funcs->detect(connector);
 	if (!acpi_lid_open()) {
 		dev_priv->modeset_on_lid = 1;
 		return NOTIFY_OK;
@@ -845,73 +844,134 @@
 	},
 	{
 		.callback = intel_no_lvds_dmi_callback,
+		.ident = "AOpen i915GMm-HFS",
+		.matches = {
+			DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
+			DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
+		},
+	},
+	{
+		.callback = intel_no_lvds_dmi_callback,
 		.ident = "Aopen i945GTt-VFA",
 		.matches = {
 			DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
 		},
 	},
+	{
+		.callback = intel_no_lvds_dmi_callback,
+		.ident = "Clientron U800",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
+		},
+	},
+	{
+		.callback = intel_no_lvds_dmi_callback,
+		.ident = "Asus EeeBox PC EB1007",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
+			DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
+		},
+	},
 
 	{ }	/* terminating entry */
 };
 
-#ifdef CONFIG_ACPI
-/*
- * check_lid_device -- check whether @handle is an ACPI LID device.
- * @handle: ACPI device handle
- * @level : depth in the ACPI namespace tree
- * @context: the number of LID device when we find the device
- * @rv: a return value to fill if desired (Not use)
+/**
+ * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
+ * @dev: drm device
+ * @connector: LVDS connector
+ *
+ * Find the reduced downclock for LVDS in EDID.
  */
-static acpi_status
-check_lid_device(acpi_handle handle, u32 level, void *context,
-			void **return_value)
+static void intel_find_lvds_downclock(struct drm_device *dev,
+				struct drm_connector *connector)
 {
-	struct acpi_device *acpi_dev;
-	int *lid_present = context;
-
-	acpi_dev = NULL;
-	/* Get the acpi device for device handle */
-	if (acpi_bus_get_device(handle, &acpi_dev) || !acpi_dev) {
-		/* If there is no ACPI device for handle, return */
-		return AE_OK;
-	}
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct drm_display_mode *scan, *panel_fixed_mode;
+	int temp_downclock;
 
-	if (!strncmp(acpi_device_hid(acpi_dev), "PNP0C0D", 7))
-		*lid_present = 1;
+	panel_fixed_mode = dev_priv->panel_fixed_mode;
+	temp_downclock = panel_fixed_mode->clock;
 
-	return AE_OK;
+	mutex_lock(&dev->mode_config.mutex);
+	list_for_each_entry(scan, &connector->probed_modes, head) {
+		/*
+		 * If one mode has the same resolution with the fixed_panel
+		 * mode while they have the different refresh rate, it means
+		 * that the reduced downclock is found for the LVDS. In such
+		 * case we can set the different FPx0/1 to dynamically select
+		 * between low and high frequency.
+		 */
+		if (scan->hdisplay == panel_fixed_mode->hdisplay &&
+			scan->hsync_start == panel_fixed_mode->hsync_start &&
+			scan->hsync_end == panel_fixed_mode->hsync_end &&
+			scan->htotal == panel_fixed_mode->htotal &&
+			scan->vdisplay == panel_fixed_mode->vdisplay &&
+			scan->vsync_start == panel_fixed_mode->vsync_start &&
+			scan->vsync_end == panel_fixed_mode->vsync_end &&
+			scan->vtotal == panel_fixed_mode->vtotal) {
+			if (scan->clock < temp_downclock) {
+				/*
+				 * The downclock is already found. But we
+				 * expect to find the lower downclock.
+				 */
+				temp_downclock = scan->clock;
+			}
+		}
+	}
+	mutex_unlock(&dev->mode_config.mutex);
+	if (temp_downclock < panel_fixed_mode->clock &&
+	    i915_lvds_downclock) {
+		/* We found the downclock for LVDS. */
+		dev_priv->lvds_downclock_avail = 1;
+		dev_priv->lvds_downclock = temp_downclock;
+		DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
+				"Normal clock %dKhz, downclock %dKhz\n",
+				panel_fixed_mode->clock, temp_downclock);
+	}
+	return;
 }
 
-/**
- * check whether there exists the ACPI LID device by enumerating the ACPI
- * device tree.
+/*
+ * Enumerate the child dev array parsed from VBT to check whether
+ * the LVDS is present.
+ * If it is present, return 1.
+ * If it is not present, return false.
+ * If no child dev is parsed from VBT, it assumes that the LVDS is present.
+ * Note: The addin_offset should also be checked for LVDS panel.
+ * Only when it is non-zero, it is assumed that it is present.
  */
-static int intel_lid_present(void)
+static int lvds_is_present_in_vbt(struct drm_device *dev)
 {
-	int lid_present = 0;
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct child_device_config *p_child;
+	int i, ret;
 
-	if (acpi_disabled) {
-		/* If ACPI is disabled, there is no ACPI device tree to
-		 * check, so assume the LID device would have been present.
-		 */
+	if (!dev_priv->child_dev_num)
 		return 1;
-	}
 
-	acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT,
-				ACPI_UINT32_MAX,
-				check_lid_device, &lid_present, NULL);
+	ret = 0;
+	for (i = 0; i < dev_priv->child_dev_num; i++) {
+		p_child = dev_priv->child_dev + i;
+		/*
+		 * If the device type is not LFP, continue.
+		 * If the device type is 0x22, it is also regarded as LFP.
+		 */
+		if (p_child->device_type != DEVICE_TYPE_INT_LFP &&
+			p_child->device_type != DEVICE_TYPE_LFP)
+			continue;
 
-	return lid_present;
-}
-#else
-static int intel_lid_present(void)
-{
-	/* In the absence of ACPI built in, assume that the LID device would
-	 * have been present.
-	 */
-	return 1;
+		/* The addin_offset should be checked. Only when it is
+		 * non-zero, it is regarded as present.
+		 */
+		if (p_child->addin_offset) {
+			ret = 1;
+			break;
+		}
+	}
+	return ret;
 }
-#endif
 
 /**
  * intel_lvds_init - setup LVDS connectors on this device
@@ -936,21 +996,16 @@
 	if (dmi_check_system(intel_no_lvds))
 		return;
 
-	/* Assume that any device without an ACPI LID device also doesn't
-	 * have an integrated LVDS.  We would be better off parsing the BIOS
-	 * to get a reliable indicator, but that code isn't written yet.
-	 *
-	 * In the case of all-in-one desktops using LVDS that we've seen,
-	 * they're using SDVO LVDS.
-	 */
-	if (!intel_lid_present())
+	if (!lvds_is_present_in_vbt(dev)) {
+		DRM_DEBUG_KMS("LVDS is not present in VBT\n");
 		return;
+	}
 
-	if (IS_IGDNG(dev)) {
+	if (IS_IRONLAKE(dev)) {
 		if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
 			return;
 		if (dev_priv->edp_support) {
-			DRM_DEBUG("disable LVDS for eDP support\n");
+			DRM_DEBUG_KMS("disable LVDS for eDP support\n");
 			return;
 		}
 		gpio = PCH_GPIOC;
@@ -1023,6 +1078,7 @@
 			dev_priv->panel_fixed_mode =
 				drm_mode_duplicate(dev, scan);
 			mutex_unlock(&dev->mode_config.mutex);
+			intel_find_lvds_downclock(dev, connector);
 			goto out;
 		}
 		mutex_unlock(&dev->mode_config.mutex);
@@ -1047,8 +1103,8 @@
 	 * correct mode.
 	 */
 
-	/* IGDNG: FIXME if still fail, not try pipe mode now */
-	if (IS_IGDNG(dev))
+	/* Ironlake: FIXME if still fail, not try pipe mode now */
+	if (IS_IRONLAKE(dev))
 		goto failed;
 
 	lvds = I915_READ(LVDS);
@@ -1069,7 +1125,7 @@
 		goto failed;
 
 out:
-	if (IS_IGDNG(dev)) {
+	if (IS_IRONLAKE(dev)) {
 		u32 pwm;
 		/* make sure PWM is enabled */
 		pwm = I915_READ(BLC_PWM_CPU_CTL2);
@@ -1082,9 +1138,11 @@
 	}
 	dev_priv->lid_notifier.notifier_call = intel_lid_notify;
 	if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
-		DRM_DEBUG("lid notifier registration failed\n");
+		DRM_DEBUG_KMS("lid notifier registration failed\n");
 		dev_priv->lid_notifier.notifier_call = NULL;
 	}
+	/* keep the LVDS connector */
+	dev_priv->int_lvds_connector = connector;
 	drm_sysfs_connector_add(connector);
 	return;
 
@@ -1093,5 +1151,6 @@
 	if (intel_output->ddc_bus)
 		intel_i2c_destroy(intel_output->ddc_bus);
 	drm_connector_cleanup(connector);
+	drm_encoder_cleanup(encoder);
 	kfree(intel_output);
 }
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i915/i915_reg.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i915/i915_reg.h
@@ -140,6 +140,7 @@
 #define MI_NOOP			MI_INSTR(0, 0)
 #define MI_USER_INTERRUPT	MI_INSTR(0x02, 0)
 #define MI_WAIT_FOR_EVENT       MI_INSTR(0x03, 0)
+#define   MI_WAIT_FOR_OVERLAY_FLIP	(1<<16)
 #define   MI_WAIT_FOR_PLANE_B_FLIP      (1<<6)
 #define   MI_WAIT_FOR_PLANE_A_FLIP      (1<<2)
 #define   MI_WAIT_FOR_PLANE_A_SCANLINES (1<<1)
@@ -151,7 +152,14 @@
 #define   MI_END_SCENE		(1 << 4) /* flush binner and incr scene count */
 #define MI_BATCH_BUFFER_END	MI_INSTR(0x0a, 0)
 #define MI_REPORT_HEAD		MI_INSTR(0x07, 0)
+#define MI_OVERLAY_FLIP		MI_INSTR(0x11,0)
+#define   MI_OVERLAY_CONTINUE	(0x0<<21)
+#define   MI_OVERLAY_ON		(0x1<<21)
+#define   MI_OVERLAY_OFF	(0x2<<21)
 #define MI_LOAD_SCAN_LINES_INCL MI_INSTR(0x12, 0)
+#define MI_DISPLAY_FLIP		MI_INSTR(0x14, 2)
+#define MI_DISPLAY_FLIP_I915	MI_INSTR(0x14, 1)
+#define   MI_DISPLAY_FLIP_PLANE(n) ((n) << 20)
 #define MI_STORE_DWORD_IMM	MI_INSTR(0x20, 1)
 #define   MI_MEM_VIRTUAL	(1 << 22) /* 965+ only */
 #define MI_STORE_DWORD_INDEX	MI_INSTR(0x21, 1)
@@ -203,6 +211,16 @@
 #define   ASYNC_FLIP                (1<<22)
 #define   DISPLAY_PLANE_A           (0<<20)
 #define   DISPLAY_PLANE_B           (1<<20)
+#define GFX_OP_PIPE_CONTROL	((0x3<<29)|(0x3<<27)|(0x2<<24)|2)
+#define   PIPE_CONTROL_QW_WRITE	(1<<14)
+#define   PIPE_CONTROL_DEPTH_STALL (1<<13)
+#define   PIPE_CONTROL_WC_FLUSH	(1<<12)
+#define   PIPE_CONTROL_IS_FLUSH	(1<<11) /* MBZ on Ironlake */
+#define   PIPE_CONTROL_TC_FLUSH (1<<10) /* GM45+ only */
+#define   PIPE_CONTROL_ISP_DIS	(1<<9)
+#define   PIPE_CONTROL_NOTIFY	(1<<8)
+#define   PIPE_CONTROL_GLOBAL_GTT (1<<2) /* in addr dword */
+#define   PIPE_CONTROL_STALL_EN	(1<<1) /* in addr word, Ironlake+ only */
 
 /*
  * Fence registers
@@ -214,7 +232,7 @@
 #define   I830_FENCE_SIZE_BITS(size)	((ffs((size) >> 19) - 1) << 8)
 #define   I830_FENCE_PITCH_SHIFT	4
 #define   I830_FENCE_REG_VALID		(1<<0)
-#define   I915_FENCE_MAX_PITCH_VAL	0x10
+#define   I915_FENCE_MAX_PITCH_VAL	4
 #define   I830_FENCE_MAX_PITCH_VAL	6
 #define   I830_FENCE_MAX_SIZE_VAL	(1<<8)
 
@@ -260,6 +278,8 @@
 #define HWS_PGA		0x02080
 #define HWS_ADDRESS_MASK	0xfffff000
 #define HWS_START_ADDRESS_SHIFT	4
+#define PWRCTXA		0x2088 /* 965GM+ only */
+#define   PWRCTX_EN	(1<<0)
 #define IPEIR		0x02088
 #define IPEHR		0x0208c
 #define INSTDONE	0x02090
@@ -307,6 +327,70 @@
 #define LM_BURST_LENGTH     0x00000700
 #define LM_FIFO_WATERMARK   0x0000001F
 #define MI_ARB_STATE	0x020e4 /* 915+ only */
+#define   MI_ARB_MASK_SHIFT	  16	/* shift for enable bits */
+
+/* Make render/texture TLB fetches lower priorty than associated data
+ *   fetches. This is not turned on by default
+ */
+#define   MI_ARB_RENDER_TLB_LOW_PRIORITY	(1 << 15)
+
+/* Isoch request wait on GTT enable (Display A/B/C streams).
+ * Make isoch requests stall on the TLB update. May cause
+ * display underruns (test mode only)
+ */
+#define   MI_ARB_ISOCH_WAIT_GTT			(1 << 14)
+
+/* Block grant count for isoch requests when block count is
+ * set to a finite value.
+ */
+#define   MI_ARB_BLOCK_GRANT_MASK		(3 << 12)
+#define   MI_ARB_BLOCK_GRANT_8			(0 << 12)	/* for 3 display planes */
+#define   MI_ARB_BLOCK_GRANT_4			(1 << 12)	/* for 2 display planes */
+#define   MI_ARB_BLOCK_GRANT_2			(2 << 12)	/* for 1 display plane */
+#define   MI_ARB_BLOCK_GRANT_0			(3 << 12)	/* don't use */
+
+/* Enable render writes to complete in C2/C3/C4 power states.
+ * If this isn't enabled, render writes are prevented in low
+ * power states. That seems bad to me.
+ */
+#define   MI_ARB_C3_LP_WRITE_ENABLE		(1 << 11)
+
+/* This acknowledges an async flip immediately instead
+ * of waiting for 2TLB fetches.
+ */
+#define   MI_ARB_ASYNC_FLIP_ACK_IMMEDIATE	(1 << 10)
+
+/* Enables non-sequential data reads through arbiter
+ */
+#define   MI_ARB_DUAL_DATA_PHASE_DISABLE       	(1 << 9)
+
+/* Disable FSB snooping of cacheable write cycles from binner/render
+ * command stream
+ */
+#define   MI_ARB_CACHE_SNOOP_DISABLE		(1 << 8)
+
+/* Arbiter time slice for non-isoch streams */
+#define   MI_ARB_TIME_SLICE_MASK		(7 << 5)
+#define   MI_ARB_TIME_SLICE_1			(0 << 5)
+#define   MI_ARB_TIME_SLICE_2			(1 << 5)
+#define   MI_ARB_TIME_SLICE_4			(2 << 5)
+#define   MI_ARB_TIME_SLICE_6			(3 << 5)
+#define   MI_ARB_TIME_SLICE_8			(4 << 5)
+#define   MI_ARB_TIME_SLICE_10			(5 << 5)
+#define   MI_ARB_TIME_SLICE_14			(6 << 5)
+#define   MI_ARB_TIME_SLICE_16			(7 << 5)
+
+/* Low priority grace period page size */
+#define   MI_ARB_LOW_PRIORITY_GRACE_4KB		(0 << 4)	/* default */
+#define   MI_ARB_LOW_PRIORITY_GRACE_8KB		(1 << 4)
+
+/* Disable display A/B trickle feed */
+#define   MI_ARB_DISPLAY_TRICKLE_FEED_DISABLE	(1 << 2)
+
+/* Set display plane priority */
+#define   MI_ARB_DISPLAY_PRIORITY_A_B		(0 << 0)	/* display A > display B */
+#define   MI_ARB_DISPLAY_PRIORITY_B_A		(1 << 0)	/* display B > display A */
+
 #define CACHE_MODE_0	0x02120 /* 915+ only */
 #define   CM0_MASK_SHIFT          16
 #define   CM0_IZ_OPT_DISABLE      (1<<6)
@@ -316,6 +400,9 @@
 #define   CM0_DEPTH_WRITE_DISABLE (1<<1)
 #define   CM0_RC_OP_FLUSH_DISABLE (1<<0)
 #define GFX_FLSH_CNTL	0x02170 /* 915+ only */
+#define ECOSKPD		0x021d0
+#define   ECO_GATING_CX_ONLY	(1<<3)
+#define   ECO_FLIP_DONE		(1<<0)
 
 
 /*
@@ -329,6 +416,7 @@
 #define   FBC_CTL_PERIODIC	(1<<30)
 #define   FBC_CTL_INTERVAL_SHIFT (16)
 #define   FBC_CTL_UNCOMPRESSIBLE (1<<14)
+#define   FBC_C3_IDLE		(1<<13)
 #define   FBC_CTL_STRIDE_SHIFT	(5)
 #define   FBC_CTL_FENCENO	(1<<0)
 #define FBC_COMMAND		0x0320c
@@ -405,6 +493,13 @@
 # define GPIO_DATA_VAL_IN		(1 << 12)
 # define GPIO_DATA_PULLUP_DISABLE	(1 << 13)
 
+#define GMBUS0			0x5100
+#define GMBUS1			0x5104
+#define GMBUS2			0x5108
+#define GMBUS3			0x510c
+#define GMBUS4			0x5110
+#define GMBUS5			0x5120
+
 /*
  * Clock control & power management
  */
@@ -435,7 +530,7 @@
 #define   DPLLB_LVDS_P2_CLOCK_DIV_7	(1 << 24) /* i915 */
 #define   DPLL_P2_CLOCK_DIV_MASK	0x03000000 /* i915 */
 #define   DPLL_FPA01_P1_POST_DIV_MASK	0x00ff0000 /* i915 */
-#define   DPLL_FPA01_P1_POST_DIV_MASK_IGD	0x00ff8000 /* IGD */
+#define   DPLL_FPA01_P1_POST_DIV_MASK_PINEVIEW	0x00ff8000 /* Pineview */
 
 #define I915_FIFO_UNDERRUN_STATUS		(1UL<<31)
 #define I915_CRC_ERROR_ENABLE			(1UL<<29)
@@ -512,7 +607,7 @@
  */
 #define   DPLL_FPA01_P1_POST_DIV_MASK_I830_LVDS	0x003f0000
 #define   DPLL_FPA01_P1_POST_DIV_SHIFT	16
-#define   DPLL_FPA01_P1_POST_DIV_SHIFT_IGD 15
+#define   DPLL_FPA01_P1_POST_DIV_SHIFT_PINEVIEW 15
 /* i830, required in DVO non-gang */
 #define   PLL_P2_DIVIDE_BY_4		(1 << 23)
 #define   PLL_P1_DIVIDE_BY_TWO		(1 << 21) /* i830 */
@@ -522,7 +617,7 @@
 #define   PLLB_REF_INPUT_SPREADSPECTRUMIN (3 << 13)
 #define   PLL_REF_INPUT_MASK		(3 << 13)
 #define   PLL_LOAD_PULSE_PHASE_SHIFT		9
-/* IGDNG */
+/* Ironlake */
 # define PLL_REF_SDVO_HDMI_MULTIPLIER_SHIFT     9
 # define PLL_REF_SDVO_HDMI_MULTIPLIER_MASK      (7 << 9)
 # define PLL_REF_SDVO_HDMI_MULTIPLIER(x)	(((x)-1) << 9)
@@ -586,12 +681,12 @@
 #define FPB0	0x06048
 #define FPB1	0x0604c
 #define   FP_N_DIV_MASK		0x003f0000
-#define   FP_N_IGD_DIV_MASK	0x00ff0000
+#define   FP_N_PINEVIEW_DIV_MASK	0x00ff0000
 #define   FP_N_DIV_SHIFT		16
 #define   FP_M1_DIV_MASK	0x00003f00
 #define   FP_M1_DIV_SHIFT		 8
 #define   FP_M2_DIV_MASK	0x0000003f
-#define   FP_M2_IGD_DIV_MASK	0x000000ff
+#define   FP_M2_PINEVIEW_DIV_MASK	0x000000ff
 #define   FP_M2_DIV_SHIFT		 0
 #define DPLL_TEST	0x606c
 #define   DPLLB_TEST_SDVO_DIV_1		(0 << 22)
@@ -769,7 +864,8 @@
 
 /** GM965 GM45 render standby register */
 #define MCHBAR_RENDER_STANDBY	0x111B8
-
+#define   RCX_SW_EXIT		(1<<23)
+#define   RSX_STATUS_MASK	0x00700000
 #define PEG_BAND_GAP_DATA	0x14d68
 
 /*
@@ -844,7 +940,6 @@
 #define   SDVOB_HOTPLUG_INT_EN			(1 << 26)
 #define   SDVOC_HOTPLUG_INT_EN			(1 << 25)
 #define   TV_HOTPLUG_INT_EN			(1 << 18)
-#define   CRT_EOS_INT_EN			(1 << 10)
 #define   CRT_HOTPLUG_INT_EN			(1 << 9)
 #define   CRT_HOTPLUG_FORCE_DETECT		(1 << 3)
 #define CRT_HOTPLUG_ACTIVATION_PERIOD_32	(0 << 8)
@@ -863,14 +958,6 @@
 #define CRT_HOTPLUG_DETECT_VOLTAGE_475MV	(1 << 2)
 #define CRT_HOTPLUG_MASK			(0x3fc) /* Bits 9-2 */
 #define CRT_FORCE_HOTPLUG_MASK			0xfffffe1f
-#define HOTPLUG_EN_MASK (HDMIB_HOTPLUG_INT_EN | \
-			 HDMIC_HOTPLUG_INT_EN |	  \
-			 HDMID_HOTPLUG_INT_EN |	  \
-			 SDVOB_HOTPLUG_INT_EN |	  \
-			 SDVOC_HOTPLUG_INT_EN |	  \
-			 TV_HOTPLUG_INT_EN |	  \
-			 CRT_HOTPLUG_INT_EN)
-
 
 #define PORT_HOTPLUG_STAT	0x61114
 #define   HDMIB_HOTPLUG_INT_STATUS		(1 << 29)
@@ -879,7 +966,6 @@
 #define   DPC_HOTPLUG_INT_STATUS		(1 << 28)
 #define   HDMID_HOTPLUG_INT_STATUS		(1 << 27)
 #define   DPD_HOTPLUG_INT_STATUS		(1 << 27)
-#define   CRT_EOS_INT_STATUS			(1 << 12)
 #define   CRT_HOTPLUG_INT_STATUS		(1 << 11)
 #define   TV_HOTPLUG_INT_STATUS			(1 << 10)
 #define   CRT_HOTPLUG_MONITOR_MASK		(3 << 8)
@@ -968,6 +1054,8 @@
 #define   LVDS_PORT_EN			(1 << 31)
 /* Selects pipe B for LVDS data.  Must be set on pre-965. */
 #define   LVDS_PIPEB_SELECT		(1 << 30)
+/* LVDS dithering flag on 965/g4x platform */
+#define   LVDS_ENABLE_DITHER		(1 << 25)
 /* Enable border for unscaled (or aspect-scaled) display */
 #define   LVDS_BORDER_ENABLE		(1 << 15)
 /*
@@ -1620,7 +1708,7 @@
 #define   DP_CLOCK_OUTPUT_ENABLE	(1 << 13)
 
 #define   DP_SCRAMBLING_DISABLE		(1 << 12)
-#define   DP_SCRAMBLING_DISABLE_IGDNG	(1 << 7)
+#define   DP_SCRAMBLING_DISABLE_IRONLAKE	(1 << 7)
 
 /** limit RGB values to avoid confusing TVs */
 #define   DP_COLOR_RANGE_16_235		(1 << 8)
@@ -1737,6 +1825,8 @@
 
 /* Display & cursor control */
 
+/* dithering flag on Ironlake */
+#define PIPE_ENABLE_DITHER	(1 << 4)
 /* Pipe A */
 #define PIPEADSL		0x70000
 #define PIPEACONF		0x70008
@@ -1804,11 +1894,11 @@
 #define   DSPFW_PLANEB_SHIFT	8
 #define DSPFW2			0x70038
 #define   DSPFW_CURSORA_MASK	0x00003f00
-#define   DSPFW_CURSORA_SHIFT	16
+#define   DSPFW_CURSORA_SHIFT	8
 #define DSPFW3			0x7003c
 #define   DSPFW_HPLL_SR_EN	(1<<31)
 #define   DSPFW_CURSOR_SR_SHIFT	24
-#define   IGD_SELF_REFRESH_EN	(1<<30)
+#define   PINEVIEW_SELF_REFRESH_EN	(1<<30)
 
 /* FIFO watermark sizes etc */
 #define G4X_FIFO_LINE_SIZE	64
@@ -1824,16 +1914,16 @@
 #define G4X_MAX_WM		0x3f
 #define I915_MAX_WM		0x3f
 
-#define IGD_DISPLAY_FIFO	512 /* in 64byte unit */
-#define IGD_FIFO_LINE_SIZE	64
-#define IGD_MAX_WM		0x1ff
-#define IGD_DFT_WM		0x3f
-#define IGD_DFT_HPLLOFF_WM	0
-#define IGD_GUARD_WM		10
-#define IGD_CURSOR_FIFO		64
-#define IGD_CURSOR_MAX_WM	0x3f
-#define IGD_CURSOR_DFT_WM	0
-#define IGD_CURSOR_GUARD_WM	5
+#define PINEVIEW_DISPLAY_FIFO	512 /* in 64byte unit */
+#define PINEVIEW_FIFO_LINE_SIZE	64
+#define PINEVIEW_MAX_WM		0x1ff
+#define PINEVIEW_DFT_WM		0x3f
+#define PINEVIEW_DFT_HPLLOFF_WM	0
+#define PINEVIEW_GUARD_WM		10
+#define PINEVIEW_CURSOR_FIFO		64
+#define PINEVIEW_CURSOR_MAX_WM	0x3f
+#define PINEVIEW_CURSOR_DFT_WM	0
+#define PINEVIEW_CURSOR_GUARD_WM	5
 
 /*
  * The two pipe frame counter registers are not synchronized, so
@@ -1907,6 +1997,7 @@
 #define   DISPPLANE_16BPP			(0x5<<26)
 #define   DISPPLANE_32BPP_NO_ALPHA		(0x6<<26)
 #define   DISPPLANE_32BPP			(0x7<<26)
+#define   DISPPLANE_32BPP_30BIT_NO_ALPHA	(0xa<<26)
 #define   DISPPLANE_STEREO_ENABLE		(1<<25)
 #define   DISPPLANE_STEREO_DISABLE		0
 #define   DISPPLANE_SEL_PIPE_MASK		(1<<24)
@@ -1918,7 +2009,7 @@
 #define   DISPPLANE_NO_LINE_DOUBLE		0
 #define   DISPPLANE_STEREO_POLARITY_FIRST	0
 #define   DISPPLANE_STEREO_POLARITY_SECOND	(1<<18)
-#define   DISPPLANE_TRICKLE_FEED_DISABLE	(1<<14) /* IGDNG */
+#define   DISPPLANE_TRICKLE_FEED_DISABLE	(1<<14) /* Ironlake */
 #define   DISPPLANE_TILED			(1<<10)
 #define DSPAADDR		0x70184
 #define DSPASTRIDE		0x70188
@@ -1971,7 +2062,7 @@
 # define VGA_2X_MODE				(1 << 30)
 # define VGA_PIPE_B_SELECT			(1 << 29)
 
-/* IGDNG */
+/* Ironlake */
 
 #define CPU_VGACNTRL	0x41000
 
@@ -2098,6 +2189,7 @@
 #define DEIER   0x4400c
 
 /* GT interrupt */
+#define GT_PIPE_NOTIFY		(1 << 4)
 #define GT_SYNC_STATUS          (1 << 2)
 #define GT_USER_INTERRUPT       (1 << 0)
 
@@ -2117,6 +2209,7 @@
 #define SDE_PORTC_HOTPLUG       (1 << 9)
 #define SDE_PORTB_HOTPLUG       (1 << 8)
 #define SDE_SDVOB_HOTPLUG       (1 << 6)
+#define SDE_HOTPLUG_MASK	(0xf << 8)
 
 #define SDEISR  0xc4000
 #define SDEIMR  0xc4004
@@ -2157,6 +2250,13 @@
 #define PCH_GPIOE               0xc5020
 #define PCH_GPIOF               0xc5024
 
+#define PCH_GMBUS0		0xc5100
+#define PCH_GMBUS1		0xc5104
+#define PCH_GMBUS2		0xc5108
+#define PCH_GMBUS3		0xc510c
+#define PCH_GMBUS4		0xc5110
+#define PCH_GMBUS5		0xc5120
+
 #define PCH_DPLL_A              0xc6014
 #define PCH_DPLL_B              0xc6018
 
@@ -2292,7 +2392,7 @@
 #define  FDI_DP_PORT_WIDTH_X3           (2<<19)
 #define  FDI_DP_PORT_WIDTH_X4           (3<<19)
 #define  FDI_TX_ENHANCE_FRAME_ENABLE    (1<<18)
-/* IGDNG: hardwired to 1 */
+/* Ironlake: hardwired to 1 */
 #define  FDI_TX_PLL_ENABLE              (1<<14)
 /* both Tx and Rx */
 #define  FDI_SCRAMBLING_ENABLE          (0<<7)
@@ -2413,6 +2513,7 @@
 
 #define PCH_PP_STATUS		0xc7200
 #define PCH_PP_CONTROL		0xc7204
+#define  PANEL_UNLOCK_REGS	(0xabcd << 16)
 #define  EDP_FORCE_VDD		(1 << 3)
 #define  EDP_BLC_ENABLE		(1 << 2)
 #define  PANEL_POWER_RESET	(1 << 1)
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/r128/r128_drv.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/r128/r128_drv.c
@@ -64,7 +64,7 @@
 		.owner = THIS_MODULE,
 		.open = drm_open,
 		.release = drm_release,
-		.ioctl = drm_ioctl,
+		.unlocked_ioctl = drm_ioctl,
 		.mmap = drm_mmap,
 		.poll = drm_poll,
 		.fasync = drm_fasync,
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/r128/r128_ioc32.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/r128/r128_ioc32.c
@@ -95,8 +95,7 @@
 			  &init->agp_textures_offset))
 		return -EFAULT;
 
-	return drm_ioctl(file->f_path.dentry->d_inode, file,
-			 DRM_IOCTL_R128_INIT, (unsigned long)init);
+	return drm_ioctl(file, DRM_IOCTL_R128_INIT, (unsigned long)init);
 }
 
 typedef struct drm_r128_depth32 {
@@ -129,8 +128,7 @@
 			  &depth->mask))
 		return -EFAULT;
 
-	return drm_ioctl(file->f_path.dentry->d_inode, file,
-			 DRM_IOCTL_R128_DEPTH, (unsigned long)depth);
+	return drm_ioctl(file, DRM_IOCTL_R128_DEPTH, (unsigned long)depth);
 
 }
 
@@ -153,8 +151,7 @@
 			  &stipple->mask))
 		return -EFAULT;
 
-	return drm_ioctl(file->f_path.dentry->d_inode, file,
-			 DRM_IOCTL_R128_STIPPLE, (unsigned long)stipple);
+	return drm_ioctl(file, DRM_IOCTL_R128_STIPPLE, (unsigned long)stipple);
 }
 
 typedef struct drm_r128_getparam32 {
@@ -178,8 +175,7 @@
 			  &getparam->value))
 		return -EFAULT;
 
-	return drm_ioctl(file->f_path.dentry->d_inode, file,
-			 DRM_IOCTL_R128_GETPARAM, (unsigned long)getparam);
+	return drm_ioctl(file, DRM_IOCTL_R128_GETPARAM, (unsigned long)getparam);
 }
 
 drm_ioctl_compat_t *r128_compat_ioctls[] = {
@@ -210,12 +206,10 @@
 	if (nr < DRM_COMMAND_BASE + DRM_ARRAY_SIZE(r128_compat_ioctls))
 		fn = r128_compat_ioctls[nr - DRM_COMMAND_BASE];
 
-	lock_kernel();		/* XXX for now */
 	if (fn != NULL)
 		ret = (*fn) (filp, cmd, arg);
 	else
-		ret = drm_ioctl(filp->f_path.dentry->d_inode, filp, cmd, arg);
-	unlock_kernel();
+		ret = drm_ioctl(filp, cmd, arg);
 
 	return ret;
 }
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/savage/savage_drv.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/savage/savage_drv.c
@@ -50,7 +50,7 @@
 		 .owner = THIS_MODULE,
 		 .open = drm_open,
 		 .release = drm_release,
-		 .ioctl = drm_ioctl,
+		 .unlocked_ioctl = drm_ioctl,
 		 .mmap = drm_mmap,
 		 .poll = drm_poll,
 		 .fasync = drm_fasync,
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_drv.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_drv.c
@@ -86,6 +86,8 @@
 int radeon_testing = 0;
 int radeon_connector_table = 0;
 int radeon_tv = 1;
+int radeon_new_pll = -1;
+int radeon_audio = 1;
 
 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
 module_param_named(no_wb, radeon_no_wb, int, 0444);
@@ -120,6 +122,12 @@
 MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
 module_param_named(tv, radeon_tv, int, 0444);
 
+MODULE_PARM_DESC(new_pll, "Select new PLL code");
+module_param_named(new_pll, radeon_new_pll, int, 0444);
+
+MODULE_PARM_DESC(audio, "Audio enable (0 = disable)");
+module_param_named(audio, radeon_audio, int, 0444);
+
 static int radeon_suspend(struct drm_device *dev, pm_message_t state)
 {
 	drm_radeon_private_t *dev_priv = dev->dev_private;
@@ -188,7 +196,7 @@
 		 .owner = THIS_MODULE,
 		 .open = drm_open,
 		 .release = drm_release,
-		 .ioctl = drm_ioctl,
+		 .unlocked_ioctl = drm_ioctl,
 		 .mmap = drm_mmap,
 		 .poll = drm_poll,
 		 .fasync = drm_fasync,
@@ -276,7 +284,7 @@
 		 .owner = THIS_MODULE,
 		 .open = drm_open,
 		 .release = drm_release,
-		 .ioctl = drm_ioctl,
+		 .unlocked_ioctl = drm_ioctl,
 		 .mmap = radeon_mmap,
 		 .poll = drm_poll,
 		 .fasync = drm_fasync,
@@ -316,6 +324,18 @@
 		radeon_modeset = 0;
 	}
 #endif
+	/* Check for known bad devices by default. */
+	if (radeon_modeset == -1) {
+		static struct pci_device_id radeon_badmodeset[] = {
+			{ PCI_DEVICE(0x1002, 0x515e) },
+			{ PCI_DEVICE(0x1002, 0x515f) },
+			{ },
+		};
+		if (pci_dev_present(radeon_badmodeset)) {
+			DRM_INFO("radeon disabling kernel modesetting for known bad device.\n");
+			radeon_modeset = 0;
+		}
+	}
 	/* if enabled by default */
 	if (radeon_modeset == -1) {
 #ifdef CONFIG_DRM_RADEON_KMS
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/rs600d.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/rs600d.h
@@ -30,27 +30,12 @@
 
 /* Registers */
 #define R_000040_GEN_INT_CNTL                        0x000040
-#define   S_000040_DISPLAY_INT_STATUS(x)               (((x) & 0x1) << 0)
-#define   G_000040_DISPLAY_INT_STATUS(x)               (((x) >> 0) & 0x1)
-#define   C_000040_DISPLAY_INT_STATUS                  0xFFFFFFFE
-#define   S_000040_DMA_VIPH0_INT_EN(x)                 (((x) & 0x1) << 12)
-#define   G_000040_DMA_VIPH0_INT_EN(x)                 (((x) >> 12) & 0x1)
-#define   C_000040_DMA_VIPH0_INT_EN                    0xFFFFEFFF
-#define   S_000040_CRTC2_VSYNC(x)                      (((x) & 0x1) << 6)
-#define   G_000040_CRTC2_VSYNC(x)                      (((x) >> 6) & 0x1)
-#define   C_000040_CRTC2_VSYNC                         0xFFFFFFBF
-#define   S_000040_SNAPSHOT2(x)                        (((x) & 0x1) << 7)
-#define   G_000040_SNAPSHOT2(x)                        (((x) >> 7) & 0x1)
-#define   C_000040_SNAPSHOT2                           0xFFFFFF7F
-#define   S_000040_CRTC2_VBLANK(x)                     (((x) & 0x1) << 9)
-#define   G_000040_CRTC2_VBLANK(x)                     (((x) >> 9) & 0x1)
-#define   C_000040_CRTC2_VBLANK                        0xFFFFFDFF
-#define   S_000040_FP2_DETECT(x)                       (((x) & 0x1) << 10)
-#define   G_000040_FP2_DETECT(x)                       (((x) >> 10) & 0x1)
-#define   C_000040_FP2_DETECT                          0xFFFFFBFF
-#define   S_000040_VSYNC_DIFF_OVER_LIMIT(x)            (((x) & 0x1) << 11)
-#define   G_000040_VSYNC_DIFF_OVER_LIMIT(x)            (((x) >> 11) & 0x1)
-#define   C_000040_VSYNC_DIFF_OVER_LIMIT               0xFFFFF7FF
+#define   S_000040_SCRATCH_INT_MASK(x)                 (((x) & 0x1) << 18)
+#define   G_000040_SCRATCH_INT_MASK(x)                 (((x) >> 18) & 0x1)
+#define   C_000040_SCRATCH_INT_MASK                    0xFFFBFFFF
+#define   S_000040_GUI_IDLE_MASK(x)                    (((x) & 0x1) << 19)
+#define   G_000040_GUI_IDLE_MASK(x)                    (((x) >> 19) & 0x1)
+#define   C_000040_GUI_IDLE_MASK                       0xFFF7FFFF
 #define   S_000040_DMA_VIPH1_INT_EN(x)                 (((x) & 0x1) << 13)
 #define   G_000040_DMA_VIPH1_INT_EN(x)                 (((x) >> 13) & 0x1)
 #define   C_000040_DMA_VIPH1_INT_EN                    0xFFFFDFFF
@@ -370,7 +355,90 @@
 #define   S_007EDC_LB_D2_VBLANK_INTERRUPT(x)           (((x) & 0x1) << 5)
 #define   G_007EDC_LB_D2_VBLANK_INTERRUPT(x)           (((x) >> 5) & 0x1)
 #define   C_007EDC_LB_D2_VBLANK_INTERRUPT              0xFFFFFFDF
-
+#define   S_007EDC_DACA_AUTODETECT_INTERRUPT(x)        (((x) & 0x1) << 16)
+#define   G_007EDC_DACA_AUTODETECT_INTERRUPT(x)        (((x) >> 16) & 0x1)
+#define   C_007EDC_DACA_AUTODETECT_INTERRUPT           0xFFFEFFFF
+#define   S_007EDC_DACB_AUTODETECT_INTERRUPT(x)        (((x) & 0x1) << 17)
+#define   G_007EDC_DACB_AUTODETECT_INTERRUPT(x)        (((x) >> 17) & 0x1)
+#define   C_007EDC_DACB_AUTODETECT_INTERRUPT           0xFFFDFFFF
+#define   S_007EDC_DC_HOT_PLUG_DETECT1_INTERRUPT(x)    (((x) & 0x1) << 18)
+#define   G_007EDC_DC_HOT_PLUG_DETECT1_INTERRUPT(x)    (((x) >> 18) & 0x1)
+#define   C_007EDC_DC_HOT_PLUG_DETECT1_INTERRUPT       0xFFFBFFFF
+#define   S_007EDC_DC_HOT_PLUG_DETECT2_INTERRUPT(x)    (((x) & 0x1) << 19)
+#define   G_007EDC_DC_HOT_PLUG_DETECT2_INTERRUPT(x)    (((x) >> 19) & 0x1)
+#define   C_007EDC_DC_HOT_PLUG_DETECT2_INTERRUPT       0xFFF7FFFF
+#define R_007828_DACA_AUTODETECT_CONTROL               0x007828
+#define   S_007828_DACA_AUTODETECT_MODE(x)             (((x) & 0x3) << 0)
+#define   G_007828_DACA_AUTODETECT_MODE(x)             (((x) >> 0) & 0x3)
+#define   C_007828_DACA_AUTODETECT_MODE                0xFFFFFFFC
+#define   S_007828_DACA_AUTODETECT_FRAME_TIME_COUNTER(x) (((x) & 0xff) << 8)
+#define   G_007828_DACA_AUTODETECT_FRAME_TIME_COUNTER(x) (((x) >> 8) & 0xff)
+#define   C_007828_DACA_AUTODETECT_FRAME_TIME_COUNTER  0xFFFF00FF
+#define   S_007828_DACA_AUTODETECT_CHECK_MASK(x)       (((x) & 0x3) << 16)
+#define   G_007828_DACA_AUTODETECT_CHECK_MASK(x)       (((x) >> 16) & 0x3)
+#define   C_007828_DACA_AUTODETECT_CHECK_MASK          0xFFFCFFFF
+#define R_007838_DACA_AUTODETECT_INT_CONTROL           0x007838
+#define   S_007838_DACA_AUTODETECT_ACK(x)              (((x) & 0x1) << 0)
+#define   C_007838_DACA_DACA_AUTODETECT_ACK            0xFFFFFFFE
+#define   S_007838_DACA_AUTODETECT_INT_ENABLE(x)       (((x) & 0x1) << 16)
+#define   G_007838_DACA_AUTODETECT_INT_ENABLE(x)       (((x) >> 16) & 0x1)
+#define   C_007838_DACA_AUTODETECT_INT_ENABLE          0xFFFCFFFF
+#define R_007A28_DACB_AUTODETECT_CONTROL               0x007A28
+#define   S_007A28_DACB_AUTODETECT_MODE(x)             (((x) & 0x3) << 0)
+#define   G_007A28_DACB_AUTODETECT_MODE(x)             (((x) >> 0) & 0x3)
+#define   C_007A28_DACB_AUTODETECT_MODE                0xFFFFFFFC
+#define   S_007A28_DACB_AUTODETECT_FRAME_TIME_COUNTER(x) (((x) & 0xff) << 8)
+#define   G_007A28_DACB_AUTODETECT_FRAME_TIME_COUNTER(x) (((x) >> 8) & 0xff)
+#define   C_007A28_DACB_AUTODETECT_FRAME_TIME_COUNTER  0xFFFF00FF
+#define   S_007A28_DACB_AUTODETECT_CHECK_MASK(x)       (((x) & 0x3) << 16)
+#define   G_007A28_DACB_AUTODETECT_CHECK_MASK(x)       (((x) >> 16) & 0x3)
+#define   C_007A28_DACB_AUTODETECT_CHECK_MASK          0xFFFCFFFF
+#define R_007A38_DACB_AUTODETECT_INT_CONTROL           0x007A38
+#define   S_007A38_DACB_AUTODETECT_ACK(x)              (((x) & 0x1) << 0)
+#define   C_007A38_DACB_DACA_AUTODETECT_ACK            0xFFFFFFFE
+#define   S_007A38_DACB_AUTODETECT_INT_ENABLE(x)       (((x) & 0x1) << 16)
+#define   G_007A38_DACB_AUTODETECT_INT_ENABLE(x)       (((x) >> 16) & 0x1)
+#define   C_007A38_DACB_AUTODETECT_INT_ENABLE          0xFFFCFFFF
+#define R_007D00_DC_HOT_PLUG_DETECT1_CONTROL           0x007D00
+#define   S_007D00_DC_HOT_PLUG_DETECT1_EN(x)           (((x) & 0x1) << 0)
+#define   G_007D00_DC_HOT_PLUG_DETECT1_EN(x)           (((x) >> 0) & 0x1)
+#define   C_007D00_DC_HOT_PLUG_DETECT1_EN              0xFFFFFFFE
+#define R_007D04_DC_HOT_PLUG_DETECT1_INT_STATUS        0x007D04
+#define   S_007D04_DC_HOT_PLUG_DETECT1_INT_STATUS(x)   (((x) & 0x1) << 0)
+#define   G_007D04_DC_HOT_PLUG_DETECT1_INT_STATUS(x)   (((x) >> 0) & 0x1)
+#define   C_007D04_DC_HOT_PLUG_DETECT1_INT_STATUS      0xFFFFFFFE
+#define   S_007D04_DC_HOT_PLUG_DETECT1_SENSE(x)        (((x) & 0x1) << 1)
+#define   G_007D04_DC_HOT_PLUG_DETECT1_SENSE(x)        (((x) >> 1) & 0x1)
+#define   C_007D04_DC_HOT_PLUG_DETECT1_SENSE           0xFFFFFFFD
+#define R_007D08_DC_HOT_PLUG_DETECT1_INT_CONTROL       0x007D08
+#define   S_007D08_DC_HOT_PLUG_DETECT1_INT_ACK(x)      (((x) & 0x1) << 0)
+#define   C_007D08_DC_HOT_PLUG_DETECT1_INT_ACK         0xFFFFFFFE
+#define   S_007D08_DC_HOT_PLUG_DETECT1_INT_POLARITY(x) (((x) & 0x1) << 8)
+#define   G_007D08_DC_HOT_PLUG_DETECT1_INT_POLARITY(x) (((x) >> 8) & 0x1)
+#define   C_007D08_DC_HOT_PLUG_DETECT1_INT_POLARITY    0xFFFFFEFF
+#define   S_007D08_DC_HOT_PLUG_DETECT1_INT_EN(x)       (((x) & 0x1) << 16)
+#define   G_007D08_DC_HOT_PLUG_DETECT1_INT_EN(x)       (((x) >> 16) & 0x1)
+#define   C_007D08_DC_HOT_PLUG_DETECT1_INT_EN          0xFFFEFFFF
+#define R_007D10_DC_HOT_PLUG_DETECT2_CONTROL           0x007D10
+#define   S_007D10_DC_HOT_PLUG_DETECT2_EN(x)           (((x) & 0x1) << 0)
+#define   G_007D10_DC_HOT_PLUG_DETECT2_EN(x)           (((x) >> 0) & 0x1)
+#define   C_007D10_DC_HOT_PLUG_DETECT2_EN              0xFFFFFFFE
+#define R_007D14_DC_HOT_PLUG_DETECT2_INT_STATUS        0x007D14
+#define   S_007D14_DC_HOT_PLUG_DETECT2_INT_STATUS(x)   (((x) & 0x1) << 0)
+#define   G_007D14_DC_HOT_PLUG_DETECT2_INT_STATUS(x)   (((x) >> 0) & 0x1)
+#define   C_007D14_DC_HOT_PLUG_DETECT2_INT_STATUS      0xFFFFFFFE
+#define   S_007D14_DC_HOT_PLUG_DETECT2_SENSE(x)        (((x) & 0x1) << 1)
+#define   G_007D14_DC_HOT_PLUG_DETECT2_SENSE(x)        (((x) >> 1) & 0x1)
+#define   C_007D14_DC_HOT_PLUG_DETECT2_SENSE           0xFFFFFFFD
+#define R_007D18_DC_HOT_PLUG_DETECT2_INT_CONTROL       0x007D18
+#define   S_007D18_DC_HOT_PLUG_DETECT2_INT_ACK(x)      (((x) & 0x1) << 0)
+#define   C_007D18_DC_HOT_PLUG_DETECT2_INT_ACK         0xFFFFFFFE
+#define   S_007D18_DC_HOT_PLUG_DETECT2_INT_POLARITY(x) (((x) & 0x1) << 8)
+#define   G_007D18_DC_HOT_PLUG_DETECT2_INT_POLARITY(x) (((x) >> 8) & 0x1)
+#define   C_007D18_DC_HOT_PLUG_DETECT2_INT_POLARITY    0xFFFFFEFF
+#define   S_007D18_DC_HOT_PLUG_DETECT2_INT_EN(x)       (((x) & 0x1) << 16)
+#define   G_007D18_DC_HOT_PLUG_DETECT2_INT_EN(x)       (((x) >> 16) & 0x1)
+#define   C_007D18_DC_HOT_PLUG_DETECT2_INT_EN          0xFFFEFFFF
 
 /* MC registers */
 #define R_000000_MC_STATUS                           0x000000
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/ObjectID.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/ObjectID.h
@@ -1,5 +1,5 @@
 /*
-* Copyright 2006-2007 Advanced Micro Devices, Inc.
+* Copyright 2006-2007 Advanced Micro Devices, Inc.  
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
@@ -41,14 +41,14 @@
 /****************************************************/
 /* Encoder Object ID Definition                     */
 /****************************************************/
-#define ENCODER_OBJECT_ID_NONE                    0x00
+#define ENCODER_OBJECT_ID_NONE                    0x00 
 
 /* Radeon Class Display Hardware */
 #define ENCODER_OBJECT_ID_INTERNAL_LVDS           0x01
 #define ENCODER_OBJECT_ID_INTERNAL_TMDS1          0x02
 #define ENCODER_OBJECT_ID_INTERNAL_TMDS2          0x03
 #define ENCODER_OBJECT_ID_INTERNAL_DAC1           0x04
-#define ENCODER_OBJECT_ID_INTERNAL_DAC2           0x05	/* TV/CV DAC */
+#define ENCODER_OBJECT_ID_INTERNAL_DAC2           0x05     /* TV/CV DAC */
 #define ENCODER_OBJECT_ID_INTERNAL_SDVOA          0x06
 #define ENCODER_OBJECT_ID_INTERNAL_SDVOB          0x07
 
@@ -56,11 +56,11 @@
 #define ENCODER_OBJECT_ID_SI170B                  0x08
 #define ENCODER_OBJECT_ID_CH7303                  0x09
 #define ENCODER_OBJECT_ID_CH7301                  0x0A
-#define ENCODER_OBJECT_ID_INTERNAL_DVO1           0x0B	/* This belongs to Radeon Class Display Hardware */
+#define ENCODER_OBJECT_ID_INTERNAL_DVO1           0x0B    /* This belongs to Radeon Class Display Hardware */
 #define ENCODER_OBJECT_ID_EXTERNAL_SDVOA          0x0C
 #define ENCODER_OBJECT_ID_EXTERNAL_SDVOB          0x0D
 #define ENCODER_OBJECT_ID_TITFP513                0x0E
-#define ENCODER_OBJECT_ID_INTERNAL_LVTM1          0x0F	/* not used for Radeon */
+#define ENCODER_OBJECT_ID_INTERNAL_LVTM1          0x0F    /* not used for Radeon */
 #define ENCODER_OBJECT_ID_VT1623                  0x10
 #define ENCODER_OBJECT_ID_HDMI_SI1930             0x11
 #define ENCODER_OBJECT_ID_HDMI_INTERNAL           0x12
@@ -68,9 +68,9 @@
 #define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1   0x13
 #define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1    0x14
 #define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1    0x15
-#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2    0x16	/* Shared with CV/TV and CRT */
-#define ENCODER_OBJECT_ID_SI178                   0X17	/* External TMDS (dual link, no HDCP.) */
-#define ENCODER_OBJECT_ID_MVPU_FPGA               0x18	/* MVPU FPGA chip */
+#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2    0x16  /* Shared with CV/TV and CRT */
+#define ENCODER_OBJECT_ID_SI178                   0X17  /* External TMDS (dual link, no HDCP.) */
+#define ENCODER_OBJECT_ID_MVPU_FPGA               0x18  /* MVPU FPGA chip */
 #define ENCODER_OBJECT_ID_INTERNAL_DDI            0x19
 #define ENCODER_OBJECT_ID_VT1625                  0x1A
 #define ENCODER_OBJECT_ID_HDMI_SI1932             0x1B
@@ -86,7 +86,7 @@
 /****************************************************/
 /* Connector Object ID Definition                   */
 /****************************************************/
-#define CONNECTOR_OBJECT_ID_NONE                  0x00
+#define CONNECTOR_OBJECT_ID_NONE                  0x00 
 #define CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I     0x01
 #define CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I       0x02
 #define CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D     0x03
@@ -96,7 +96,7 @@
 #define CONNECTOR_OBJECT_ID_SVIDEO                0x07
 #define CONNECTOR_OBJECT_ID_YPbPr                 0x08
 #define CONNECTOR_OBJECT_ID_D_CONNECTOR           0x09
-#define CONNECTOR_OBJECT_ID_9PIN_DIN              0x0A	/* Supports both CV & TV */
+#define CONNECTOR_OBJECT_ID_9PIN_DIN              0x0A  /* Supports both CV & TV */
 #define CONNECTOR_OBJECT_ID_SCART                 0x0B
 #define CONNECTOR_OBJECT_ID_HDMI_TYPE_A           0x0C
 #define CONNECTOR_OBJECT_ID_HDMI_TYPE_B           0x0D
@@ -106,6 +106,8 @@
 #define CONNECTOR_OBJECT_ID_CROSSFIRE             0x11
 #define CONNECTOR_OBJECT_ID_HARDCODE_DVI          0x12
 #define CONNECTOR_OBJECT_ID_DISPLAYPORT           0x13
+#define CONNECTOR_OBJECT_ID_eDP                   0x14
+#define CONNECTOR_OBJECT_ID_MXM                   0x15
 
 /* deleted */
 
@@ -116,6 +118,14 @@
 #define ROUTER_OBJECT_ID_I2C_EXTENDER_CNTL				0x01
 
 /****************************************************/
+/* Generic Object ID Definition                     */
+/****************************************************/
+#define GENERIC_OBJECT_ID_NONE                    0x00
+#define GENERIC_OBJECT_ID_GLSYNC                  0x01
+#define GENERIC_OBJECT_ID_PX2_NON_DRIVABLE        0x02
+#define GENERIC_OBJECT_ID_MXM_OPM                 0x03
+
+/****************************************************/
 /* Graphics Object ENUM ID Definition               */
 /****************************************************/
 #define GRAPH_OBJECT_ENUM_ID1                     0x01
@@ -124,6 +134,7 @@
 #define GRAPH_OBJECT_ENUM_ID4                     0x04
 #define GRAPH_OBJECT_ENUM_ID5                     0x05
 #define GRAPH_OBJECT_ENUM_ID6                     0x06
+#define GRAPH_OBJECT_ENUM_ID7                     0x07
 
 /****************************************************/
 /* Graphics Object ID Bit definition                */
@@ -133,35 +144,35 @@
 #define RESERVED1_ID_MASK                         0x0800
 #define OBJECT_TYPE_MASK                          0x7000
 #define RESERVED2_ID_MASK                         0x8000
-
+                                                  
 #define OBJECT_ID_SHIFT                           0x00
 #define ENUM_ID_SHIFT                             0x08
 #define OBJECT_TYPE_SHIFT                         0x0C
 
+
 /****************************************************/
 /* Graphics Object family definition                */
 /****************************************************/
-#define CONSTRUCTOBJECTFAMILYID(GRAPHICS_OBJECT_TYPE, GRAPHICS_OBJECT_ID) \
-	(GRAPHICS_OBJECT_TYPE << OBJECT_TYPE_SHIFT | \
-	 GRAPHICS_OBJECT_ID   << OBJECT_ID_SHIFT)
+#define CONSTRUCTOBJECTFAMILYID(GRAPHICS_OBJECT_TYPE, GRAPHICS_OBJECT_ID) (GRAPHICS_OBJECT_TYPE << OBJECT_TYPE_SHIFT | \
+                                                                           GRAPHICS_OBJECT_ID   << OBJECT_ID_SHIFT)
 /****************************************************/
 /* GPU Object ID definition - Shared with BIOS      */
 /****************************************************/
-#define GPU_ENUM_ID1	(GRAPH_OBJECT_TYPE_GPU << OBJECT_TYPE_SHIFT |\
-			 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT)
+#define GPU_ENUM_ID1                            ( GRAPH_OBJECT_TYPE_GPU << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT)
 
 /****************************************************/
 /* Encoder Object ID definition - Shared with BIOS  */
 /****************************************************/
 /*
-#define ENCODER_INTERNAL_LVDS_ENUM_ID1        0x2101
+#define ENCODER_INTERNAL_LVDS_ENUM_ID1        0x2101      
 #define ENCODER_INTERNAL_TMDS1_ENUM_ID1       0x2102
 #define ENCODER_INTERNAL_TMDS2_ENUM_ID1       0x2103
 #define ENCODER_INTERNAL_DAC1_ENUM_ID1        0x2104
 #define ENCODER_INTERNAL_DAC2_ENUM_ID1        0x2105
 #define ENCODER_INTERNAL_SDVOA_ENUM_ID1       0x2106
 #define ENCODER_INTERNAL_SDVOB_ENUM_ID1       0x2107
-#define ENCODER_SIL170B_ENUM_ID1              0x2108
+#define ENCODER_SIL170B_ENUM_ID1              0x2108  
 #define ENCODER_CH7303_ENUM_ID1               0x2109
 #define ENCODER_CH7301_ENUM_ID1               0x210A
 #define ENCODER_INTERNAL_DVO1_ENUM_ID1        0x210B
@@ -175,8 +186,8 @@
 #define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1   0x2113
 #define ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1    0x2114
 #define ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1    0x2115
-#define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1    0x2116
-#define ENCODER_SI178_ENUM_ID1                   0x2117
+#define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1    0x2116  
+#define ENCODER_SI178_ENUM_ID1                   0x2117 
 #define ENCODER_MVPU_FPGA_ENUM_ID1               0x2118
 #define ENCODER_INTERNAL_DDI_ENUM_ID1            0x2119
 #define ENCODER_VT1625_ENUM_ID1                  0x211A
@@ -185,205 +196,169 @@
 #define ENCODER_DP_DP501_ENUM_ID1                0x211D
 #define ENCODER_INTERNAL_UNIPHY_ENUM_ID1         0x211E
 */
-#define ENCODER_INTERNAL_LVDS_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_INTERNAL_LVDS << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_TMDS1_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_INTERNAL_TMDS1 << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_TMDS2_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_INTERNAL_TMDS2 << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_DAC1_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_INTERNAL_DAC1 << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_DAC2_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_INTERNAL_DAC2 << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_SDVOA_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_INTERNAL_SDVOA << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_SDVOA_ENUM_ID2 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_INTERNAL_SDVOA << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_SDVOB_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_INTERNAL_SDVOB << OBJECT_ID_SHIFT)
-
-#define ENCODER_SIL170B_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_SI170B << OBJECT_ID_SHIFT)
-
-#define ENCODER_CH7303_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_CH7303 << OBJECT_ID_SHIFT)
-
-#define ENCODER_CH7301_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_CH7301 << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_DVO1_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_INTERNAL_DVO1 << OBJECT_ID_SHIFT)
-
-#define ENCODER_EXTERNAL_SDVOA_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_EXTERNAL_SDVOA << OBJECT_ID_SHIFT)
-
-#define ENCODER_EXTERNAL_SDVOA_ENUM_ID2 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_EXTERNAL_SDVOA << OBJECT_ID_SHIFT)
-
-#define ENCODER_EXTERNAL_SDVOB_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_EXTERNAL_SDVOB << OBJECT_ID_SHIFT)
-
-#define ENCODER_TITFP513_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_TITFP513 << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_LVTM1_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_INTERNAL_LVTM1 << OBJECT_ID_SHIFT)
-
-#define ENCODER_VT1623_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_VT1623 << OBJECT_ID_SHIFT)
-
-#define ENCODER_HDMI_SI1930_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_HDMI_SI1930 << OBJECT_ID_SHIFT)
-
-#define ENCODER_HDMI_INTERNAL_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_HDMI_INTERNAL << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID2 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1 << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1 << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2 << OBJECT_ID_SHIFT) /* Shared with CV/TV and CRT */
-
-#define ENCODER_SI178_ENUM_ID1  \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_SI178 << OBJECT_ID_SHIFT)
-
-#define ENCODER_MVPU_FPGA_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_MVPU_FPGA << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_DDI_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_INTERNAL_DDI << OBJECT_ID_SHIFT)
-
-#define ENCODER_VT1625_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_VT1625 << OBJECT_ID_SHIFT)
-
-#define ENCODER_HDMI_SI1932_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_HDMI_SI1932 << OBJECT_ID_SHIFT)
-
-#define ENCODER_DP_DP501_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_DP_DP501 << OBJECT_ID_SHIFT)
-
-#define ENCODER_DP_AN9801_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_DP_AN9801 << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_UNIPHY_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_INTERNAL_UNIPHY << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_UNIPHY_ENUM_ID2 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_INTERNAL_UNIPHY << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_KLDSCP_LVTMA_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_UNIPHY1_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_UNIPHY1_ENUM_ID2 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_UNIPHY2_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_UNIPHY2_ENUM_ID2 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 << OBJECT_ID_SHIFT)
-
-#define ENCODER_GENERAL_EXTERNAL_DVO_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 ENCODER_OBJECT_ID_GENERAL_EXTERNAL_DVO << OBJECT_ID_SHIFT)
+#define ENCODER_INTERNAL_LVDS_ENUM_ID1     ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_INTERNAL_LVDS << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_TMDS1_ENUM_ID1    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_INTERNAL_TMDS1 << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_TMDS2_ENUM_ID1    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_INTERNAL_TMDS2 << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_DAC1_ENUM_ID1     ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_INTERNAL_DAC1 << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_DAC2_ENUM_ID1     ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_INTERNAL_DAC2 << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_SDVOA_ENUM_ID1    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_INTERNAL_SDVOA << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_SDVOA_ENUM_ID2    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_INTERNAL_SDVOA << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_SDVOB_ENUM_ID1    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_INTERNAL_SDVOB << OBJECT_ID_SHIFT)
+
+#define ENCODER_SIL170B_ENUM_ID1           ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_SI170B << OBJECT_ID_SHIFT)
+
+#define ENCODER_CH7303_ENUM_ID1            ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_CH7303 << OBJECT_ID_SHIFT)
+
+#define ENCODER_CH7301_ENUM_ID1            ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_CH7301 << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_DVO1_ENUM_ID1     ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_INTERNAL_DVO1 << OBJECT_ID_SHIFT)
+
+#define ENCODER_EXTERNAL_SDVOA_ENUM_ID1    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_EXTERNAL_SDVOA << OBJECT_ID_SHIFT)
+
+#define ENCODER_EXTERNAL_SDVOA_ENUM_ID2    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_EXTERNAL_SDVOA << OBJECT_ID_SHIFT)
+
+
+#define ENCODER_EXTERNAL_SDVOB_ENUM_ID1    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_EXTERNAL_SDVOB << OBJECT_ID_SHIFT)
+
+
+#define ENCODER_TITFP513_ENUM_ID1          ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_TITFP513 << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_LVTM1_ENUM_ID1    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_INTERNAL_LVTM1 << OBJECT_ID_SHIFT)
+
+#define ENCODER_VT1623_ENUM_ID1            ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_VT1623 << OBJECT_ID_SHIFT)
+
+#define ENCODER_HDMI_SI1930_ENUM_ID1       ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_HDMI_SI1930 << OBJECT_ID_SHIFT)
+
+#define ENCODER_HDMI_INTERNAL_ENUM_ID1     ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_HDMI_INTERNAL << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1   ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                   GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                   ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT)
+
+
+#define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID2   ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                   GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                   ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT)
+
+
+#define ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                   GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                   ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1 << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                   GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                   ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1 << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                   GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                   ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2 << OBJECT_ID_SHIFT)  // Shared with CV/TV and CRT
+
+#define ENCODER_SI178_ENUM_ID1                    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                   GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                   ENCODER_OBJECT_ID_SI178 << OBJECT_ID_SHIFT)  
+
+#define ENCODER_MVPU_FPGA_ENUM_ID1                ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                   GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                   ENCODER_OBJECT_ID_MVPU_FPGA << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_DDI_ENUM_ID1     (  GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_INTERNAL_DDI << OBJECT_ID_SHIFT) 
+
+#define ENCODER_VT1625_ENUM_ID1            ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_VT1625 << OBJECT_ID_SHIFT)
+
+#define ENCODER_HDMI_SI1932_ENUM_ID1       ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_HDMI_SI1932 << OBJECT_ID_SHIFT)
+
+#define ENCODER_DP_DP501_ENUM_ID1            ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_DP_DP501 << OBJECT_ID_SHIFT)
+
+#define ENCODER_DP_AN9801_ENUM_ID1            ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_DP_AN9801 << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_UNIPHY_ENUM_ID1         ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 ENCODER_OBJECT_ID_INTERNAL_UNIPHY << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_UNIPHY_ENUM_ID2         ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 ENCODER_OBJECT_ID_INTERNAL_UNIPHY << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_KLDSCP_LVTMA_ENUM_ID1   ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA << OBJECT_ID_SHIFT)  
+
+#define ENCODER_INTERNAL_UNIPHY1_ENUM_ID1         ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_UNIPHY1_ENUM_ID2         ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_UNIPHY2_ENUM_ID1         ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_UNIPHY2_ENUM_ID2         ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 << OBJECT_ID_SHIFT)
+
+#define ENCODER_GENERAL_EXTERNAL_DVO_ENUM_ID1    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                  GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                  ENCODER_OBJECT_ID_GENERAL_EXTERNAL_DVO << OBJECT_ID_SHIFT)
 
 /****************************************************/
 /* Connector Object ID definition - Shared with BIOS */
@@ -406,167 +381,253 @@
 #define CONNECTOR_7PIN_DIN_ENUM_ID1                 0x310F
 #define CONNECTOR_PCIE_CONNECTOR_ENUM_ID1           0x3110
 */
-#define CONNECTOR_LVDS_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 CONNECTOR_OBJECT_ID_LVDS << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID2 \
-	(GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-	 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID2 \
-	(GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-	 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID2 \
-	(GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-	 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_VGA_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 CONNECTOR_OBJECT_ID_VGA << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_VGA_ENUM_ID2 \
-	(GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-	 CONNECTOR_OBJECT_ID_VGA << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_COMPOSITE_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 CONNECTOR_OBJECT_ID_COMPOSITE << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_SVIDEO_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 CONNECTOR_OBJECT_ID_SVIDEO << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_YPbPr_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 CONNECTOR_OBJECT_ID_YPbPr << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_D_CONNECTOR_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 CONNECTOR_OBJECT_ID_D_CONNECTOR << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_9PIN_DIN_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 CONNECTOR_OBJECT_ID_9PIN_DIN << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_SCART_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 CONNECTOR_OBJECT_ID_SCART << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_HDMI_TYPE_A_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_HDMI_TYPE_B_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 CONNECTOR_OBJECT_ID_HDMI_TYPE_B << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_7PIN_DIN_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 CONNECTOR_OBJECT_ID_7PIN_DIN << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_PCIE_CONNECTOR_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 CONNECTOR_OBJECT_ID_PCIE_CONNECTOR << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_PCIE_CONNECTOR_ENUM_ID2 \
-	(GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-	 CONNECTOR_OBJECT_ID_PCIE_CONNECTOR << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_CROSSFIRE_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 CONNECTOR_OBJECT_ID_CROSSFIRE << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_CROSSFIRE_ENUM_ID2 \
-	(GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-	 CONNECTOR_OBJECT_ID_CROSSFIRE << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_HARDCODE_DVI_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 CONNECTOR_OBJECT_ID_HARDCODE_DVI << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_HARDCODE_DVI_ENUM_ID2 \
-	(GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-	 CONNECTOR_OBJECT_ID_HARDCODE_DVI << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_DISPLAYPORT_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_DISPLAYPORT_ENUM_ID2 \
-	(GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-	 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_DISPLAYPORT_ENUM_ID3 \
-	(GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
-	 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_DISPLAYPORT_ENUM_ID4 \
-	(GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID4 << ENUM_ID_SHIFT |\
-	 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
+#define CONNECTOR_LVDS_ENUM_ID1                ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_LVDS << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_LVDS_ENUM_ID2                ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_LVDS << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_eDP_ENUM_ID1                 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_eDP << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_eDP_ENUM_ID2                 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_eDP << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID1   ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID2   ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID1     ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID2     ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID1   ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID2   ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID1     ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID2     ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID3     ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_VGA_ENUM_ID1                 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_VGA << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_VGA_ENUM_ID2                 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_VGA << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_COMPOSITE_ENUM_ID1           ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_COMPOSITE << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_COMPOSITE_ENUM_ID2           ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_COMPOSITE << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_SVIDEO_ENUM_ID1              ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_SVIDEO << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_SVIDEO_ENUM_ID2              ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_SVIDEO << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_YPbPr_ENUM_ID1               ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_YPbPr << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_YPbPr_ENUM_ID2               ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_YPbPr << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_D_CONNECTOR_ENUM_ID1         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_D_CONNECTOR << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_D_CONNECTOR_ENUM_ID2         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_D_CONNECTOR << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_9PIN_DIN_ENUM_ID1            ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_9PIN_DIN << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_9PIN_DIN_ENUM_ID2            ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_9PIN_DIN << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_SCART_ENUM_ID1               ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_SCART << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_SCART_ENUM_ID2               ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_SCART << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_HDMI_TYPE_A_ENUM_ID1         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_HDMI_TYPE_A_ENUM_ID2         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_HDMI_TYPE_A_ENUM_ID3         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_HDMI_TYPE_B_ENUM_ID1         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_HDMI_TYPE_B << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_HDMI_TYPE_B_ENUM_ID2         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_HDMI_TYPE_B << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_7PIN_DIN_ENUM_ID1            ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_7PIN_DIN << OBJECT_ID_SHIFT)
+#define CONNECTOR_7PIN_DIN_ENUM_ID2            ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_7PIN_DIN << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_PCIE_CONNECTOR_ENUM_ID1      ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_PCIE_CONNECTOR << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_PCIE_CONNECTOR_ENUM_ID2      ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_PCIE_CONNECTOR << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_CROSSFIRE_ENUM_ID1           ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_CROSSFIRE << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_CROSSFIRE_ENUM_ID2           ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_CROSSFIRE << OBJECT_ID_SHIFT)
+
+
+#define CONNECTOR_HARDCODE_DVI_ENUM_ID1        ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_HARDCODE_DVI << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_HARDCODE_DVI_ENUM_ID2        ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_HARDCODE_DVI << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_DISPLAYPORT_ENUM_ID1         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_DISPLAYPORT_ENUM_ID2         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_DISPLAYPORT_ENUM_ID3         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_DISPLAYPORT_ENUM_ID4         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID4 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_DISPLAYPORT_ENUM_ID5         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID5 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_DISPLAYPORT_ENUM_ID6         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID6 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_MXM_ENUM_ID1                 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT)          //Mapping to MXM_DP_A
+
+#define CONNECTOR_MXM_ENUM_ID2                 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT)          //Mapping to MXM_DP_B
+
+#define CONNECTOR_MXM_ENUM_ID3                 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT)          //Mapping to MXM_DP_C
+
+#define CONNECTOR_MXM_ENUM_ID4                 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID4 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT)          //Mapping to MXM_DP_D
+
+#define CONNECTOR_MXM_ENUM_ID5                 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID5 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT)          //Mapping to MXM_LVDS_TXxx
+
+#define CONNECTOR_MXM_ENUM_ID6                 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID6 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT)          //Mapping to MXM_LVDS_UXxx
+
+#define CONNECTOR_MXM_ENUM_ID7                 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID7 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT)          //Mapping to MXM_DAC
 
 /****************************************************/
 /* Router Object ID definition - Shared with BIOS   */
 /****************************************************/
-#define ROUTER_I2C_EXTENDER_CNTL_ENUM_ID1 \
-	(GRAPH_OBJECT_TYPE_ROUTER << OBJECT_TYPE_SHIFT |\
-	 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-	 ROUTER_OBJECT_ID_I2C_EXTENDER_CNTL << OBJECT_ID_SHIFT)
+#define ROUTER_I2C_EXTENDER_CNTL_ENUM_ID1      ( GRAPH_OBJECT_TYPE_ROUTER << OBJECT_TYPE_SHIFT |\
+                                                GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                ROUTER_OBJECT_ID_I2C_EXTENDER_CNTL << OBJECT_ID_SHIFT)
 
 /* deleted */
 
 /****************************************************/
+/* Generic Object ID definition - Shared with BIOS  */
+/****************************************************/
+#define GENERICOBJECT_GLSYNC_ENUM_ID1           (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 GENERIC_OBJECT_ID_GLSYNC << OBJECT_ID_SHIFT)
+
+#define GENERICOBJECT_PX2_NON_DRIVABLE_ID1       (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 GENERIC_OBJECT_ID_PX2_NON_DRIVABLE<< OBJECT_ID_SHIFT)
+
+#define GENERICOBJECT_PX2_NON_DRIVABLE_ID2       (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 GENERIC_OBJECT_ID_PX2_NON_DRIVABLE<< OBJECT_ID_SHIFT)
+
+#define GENERICOBJECT_MXM_OPM_ENUM_ID1           (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 GENERIC_OBJECT_ID_MXM_OPM << OBJECT_ID_SHIFT)
+
+/****************************************************/
 /* Object Cap definition - Shared with BIOS         */
 /****************************************************/
 #define GRAPHICS_OBJECT_CAP_I2C                 0x00000001L
 #define GRAPHICS_OBJECT_CAP_TABLE_ID            0x00000002L
 
+
 #define GRAPHICS_OBJECT_I2CCOMMAND_TABLE_ID                   0x01
 #define GRAPHICS_OBJECT_HOTPLUGDETECTIONINTERUPT_TABLE_ID     0x02
 #define GRAPHICS_OBJECT_ENCODER_OUTPUT_PROTECTION_TABLE_ID    0x03
@@ -575,4 +636,8 @@
 #pragma pack()
 #endif
 
-#endif /*GRAPHICTYPE */
+#endif  /*GRAPHICTYPE */
+
+
+
+
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_fence.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_fence.c
@@ -140,16 +140,15 @@
 
 bool radeon_fence_signaled(struct radeon_fence *fence)
 {
-	struct radeon_device *rdev = fence->rdev;
 	unsigned long irq_flags;
 	bool signaled = false;
 
-	if (rdev->gpu_lockup) {
+	if (!fence)
 		return true;
-	}
-	if (fence == NULL) {
+
+	if (fence->rdev->gpu_lockup)
 		return true;
-	}
+
 	write_lock_irqsave(&fence->rdev->fence_drv.lock, irq_flags);
 	signaled = fence->signaled;
 	/* if we are shuting down report all fence as signaled */
@@ -168,37 +167,6 @@
 	return signaled;
 }
 
-int r600_fence_wait(struct radeon_fence *fence,  bool intr, bool lazy)
-{
-	struct radeon_device *rdev;
-	int ret = 0;
-
-	rdev = fence->rdev;
-
-	__set_current_state(intr ? TASK_INTERRUPTIBLE : TASK_UNINTERRUPTIBLE);
-
-	while (1) {
-		if (radeon_fence_signaled(fence))
-			break;
-
-		if (time_after_eq(jiffies, fence->timeout)) {
-			ret = -EBUSY;
-			break;
-		}
-
-		if (lazy)
-			schedule_timeout(1);
-
-		if (intr && signal_pending(current)) {
-			ret = -ERESTARTSYS;
-			break;
-		}
-	}
-	__set_current_state(TASK_RUNNING);
-	return ret;
-}
-
-
 int radeon_fence_wait(struct radeon_fence *fence, bool intr)
 {
 	struct radeon_device *rdev;
@@ -216,13 +184,6 @@
 		return 0;
 	}
 
-	if (rdev->family >= CHIP_R600) {
-		r = r600_fence_wait(fence, intr, 0);
-		if (r == -ERESTARTSYS)
-			return -EBUSY;
-		return r;
-	}
-
 retry:
 	cur_jiffies = jiffies;
 	timeout = HZ / 100;
@@ -231,14 +192,17 @@
 	}
 
 	if (intr) {
+		radeon_irq_kms_sw_irq_get(rdev);
 		r = wait_event_interruptible_timeout(rdev->fence_drv.queue,
 				radeon_fence_signaled(fence), timeout);
-		if (unlikely(r == -ERESTARTSYS)) {
-			return -EBUSY;
-		}
+		radeon_irq_kms_sw_irq_put(rdev);
+		if (unlikely(r < 0))
+			return r;
 	} else {
+		radeon_irq_kms_sw_irq_get(rdev);
 		r = wait_event_timeout(rdev->fence_drv.queue,
 			 radeon_fence_signaled(fence), timeout);
+		radeon_irq_kms_sw_irq_put(rdev);
 	}
 	if (unlikely(!radeon_fence_signaled(fence))) {
 		if (unlikely(r == 0)) {
@@ -359,7 +323,7 @@
 	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
 	r = radeon_scratch_get(rdev, &rdev->fence_drv.scratch_reg);
 	if (r) {
-		DRM_ERROR("Fence failed to get a scratch register.");
+		dev_err(rdev->dev, "fence failed to get scratch register\n");
 		write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
 		return r;
 	}
@@ -370,9 +334,10 @@
 	INIT_LIST_HEAD(&rdev->fence_drv.signaled);
 	rdev->fence_drv.count_timeout = 0;
 	init_waitqueue_head(&rdev->fence_drv.queue);
+	rdev->fence_drv.initialized = true;
 	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
 	if (radeon_debugfs_fence_init(rdev)) {
-		DRM_ERROR("Failed to register debugfs file for fence !\n");
+		dev_err(rdev->dev, "fence debugfs file creation failed\n");
 	}
 	return 0;
 }
@@ -381,11 +346,13 @@
 {
 	unsigned long irq_flags;
 
+	if (!rdev->fence_drv.initialized)
+		return;
 	wake_up_all(&rdev->fence_drv.queue);
 	write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
 	radeon_scratch_free(rdev, rdev->fence_drv.scratch_reg);
 	write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
-	DRM_INFO("radeon: fence finalized\n");
+	rdev->fence_drv.initialized = false;
 }
 
 
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_irq.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_irq.c
@@ -289,16 +289,16 @@
 	drm_radeon_irq_emit_t *emit = data;
 	int result;
 
-	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
-		return -EINVAL;
-
-	LOCK_TEST_WITH_RETURN(dev, file_priv);
-
 	if (!dev_priv) {
 		DRM_ERROR("called with no initialization\n");
 		return -EINVAL;
 	}
 
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
+		return -EINVAL;
+
+	LOCK_TEST_WITH_RETURN(dev, file_priv);
+
 	result = radeon_emit_irq(dev);
 
 	if (DRM_COPY_TO_USER(emit->irq_seq, &result, sizeof(int))) {
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_device.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_device.c
@@ -44,10 +44,11 @@
 	if (rdev->family < CHIP_R600) {
 		int i;
 
-		for (i = 0; i < 8; i++) {
-			WREG32(RADEON_SURFACE0_INFO +
-			       i * (RADEON_SURFACE1_INFO - RADEON_SURFACE0_INFO),
-			       0);
+		for (i = 0; i < RADEON_GEM_MAX_SURFACES; i++) {
+			if (rdev->surface_regs[i].bo)
+				radeon_bo_get_surface_reg(rdev->surface_regs[i].bo);
+			else
+				radeon_clear_surface_reg(rdev, i);
 		}
 		/* enable surfaces */
 		WREG32(RADEON_SURFACE_CNTL, 0);
@@ -208,6 +209,24 @@
 
 }
 
+bool radeon_boot_test_post_card(struct radeon_device *rdev)
+{
+	if (radeon_card_posted(rdev))
+		return true;
+
+	if (rdev->bios) {
+		DRM_INFO("GPU not posted. posting now...\n");
+		if (rdev->is_atom_bios)
+			atom_asic_init(rdev->mode_info.atom_context);
+		else
+			radeon_combios_asic_init(rdev->ddev);
+		return true;
+	} else {
+		dev_err(rdev->dev, "Card not posted and no BIOS - ignoring\n");
+		return false;
+	}
+}
+
 int radeon_dummy_page_init(struct radeon_device *rdev)
 {
 	rdev->dummy_page.page = alloc_page(GFP_DMA32 | GFP_KERNEL | __GFP_ZERO);
@@ -372,6 +391,12 @@
 		/* FIXME: not supported yet */
 		return -EINVAL;
 	}
+
+	if (rdev->flags & RADEON_IS_IGP) {
+		rdev->asic->get_memory_clock = NULL;
+		rdev->asic->set_memory_clock = NULL;
+	}
+
 	return 0;
 }
 
@@ -462,13 +487,18 @@
 	atom_card_info->pll_write = cail_pll_write;
 
 	rdev->mode_info.atom_context = atom_parse(atom_card_info, rdev->bios);
+	mutex_init(&rdev->mode_info.atom_context->mutex);
 	radeon_atom_initialize_bios_scratch_regs(rdev->ddev);
+	atom_allocate_fb_scratch(rdev->mode_info.atom_context);
 	return 0;
 }
 
 void radeon_atombios_fini(struct radeon_device *rdev)
 {
-	kfree(rdev->mode_info.atom_context);
+	if (rdev->mode_info.atom_context) {
+		kfree(rdev->mode_info.atom_context->scratch);
+		kfree(rdev->mode_info.atom_context);
+	}
 	kfree(rdev->mode_info.atom_card_info);
 }
 
@@ -514,11 +544,75 @@
 		rdev->asic->gart_tlb_flush = &r100_pci_gart_tlb_flush;
 		rdev->asic->gart_set_page = &r100_pci_gart_set_page;
 	}
+	rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024;
+}
+
+void radeon_check_arguments(struct radeon_device *rdev)
+{
+	/* vramlimit must be a power of two */
+	switch (radeon_vram_limit) {
+	case 0:
+	case 4:
+	case 8:
+	case 16:
+	case 32:
+	case 64:
+	case 128:
+	case 256:
+	case 512:
+	case 1024:
+	case 2048:
+	case 4096:
+		break;
+	default:
+		dev_warn(rdev->dev, "vram limit (%d) must be a power of 2\n",
+				radeon_vram_limit);
+		radeon_vram_limit = 0;
+		break;
+	}
+	radeon_vram_limit = radeon_vram_limit << 20;
+	/* gtt size must be power of two and greater or equal to 32M */
+	switch (radeon_gart_size) {
+	case 4:
+	case 8:
+	case 16:
+		dev_warn(rdev->dev, "gart size (%d) too small forcing to 512M\n",
+				radeon_gart_size);
+		radeon_gart_size = 512;
+		break;
+	case 32:
+	case 64:
+	case 128:
+	case 256:
+	case 512:
+	case 1024:
+	case 2048:
+	case 4096:
+		break;
+	default:
+		dev_warn(rdev->dev, "gart size (%d) must be a power of 2\n",
+				radeon_gart_size);
+		radeon_gart_size = 512;
+		break;
+	}
+	rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024;
+	/* AGP mode can only be -1, 1, 2, 4, 8 */
+	switch (radeon_agpmode) {
+	case -1:
+	case 0:
+	case 1:
+	case 2:
+	case 4:
+	case 8:
+		break;
+	default:
+		dev_warn(rdev->dev, "invalid AGP mode %d (valid mode: "
+				"-1, 0, 1, 2, 4, 8)\n", radeon_agpmode);
+		radeon_agpmode = 0;
+		break;
+	}
 }
 
-/*
- * Radeon device.
- */
 int radeon_device_init(struct radeon_device *rdev,
 		       struct drm_device *ddev,
 		       struct pci_dev *pdev,
@@ -544,16 +638,32 @@
 	mutex_init(&rdev->cs_mutex);
 	mutex_init(&rdev->ib_pool.mutex);
 	mutex_init(&rdev->cp.mutex);
+	if (rdev->family >= CHIP_R600)
+		spin_lock_init(&rdev->ih.lock);
+	mutex_init(&rdev->gem.mutex);
 	rwlock_init(&rdev->fence_drv.lock);
 	INIT_LIST_HEAD(&rdev->gem.objects);
 
+	/* setup workqueue */
+	rdev->wq = create_workqueue("radeon");
+	if (rdev->wq == NULL)
+		return -ENOMEM;
+
 	/* Set asic functions */
 	r = radeon_asic_init(rdev);
-	if (r) {
+	if (r)
 		return r;
+	radeon_check_arguments(rdev);
+
+	/* all of the newer IGP chips have an internal gart
+	 * However some rs4xx report as AGP, so remove that here.
+	 */
+	if ((rdev->family >= CHIP_RS400) &&
+	    (rdev->flags & RADEON_IS_IGP)) {
+		rdev->flags &= ~RADEON_IS_AGP;
 	}
 
-	if (radeon_agpmode == -1) {
+	if (rdev->flags & RADEON_IS_AGP && radeon_agpmode == -1) {
 		radeon_agp_disable(rdev);
 	}
 
@@ -572,6 +682,7 @@
 	dma_bits = rdev->need_dma32 ? 32 : 40;
 	r = pci_set_dma_mask(rdev->pdev, DMA_BIT_MASK(dma_bits));
 	if (r) {
+		rdev->need_dma32 = true;
 		printk(KERN_WARNING "radeon: No suitable DMA available.\n");
 	}
 
@@ -620,6 +731,7 @@
 	DRM_INFO("radeon: finishing device.\n");
 	rdev->shutdown = true;
 	radeon_fini(rdev);
+	destroy_workqueue(rdev->wq);
 	vga_client_register(rdev->pdev, NULL, NULL, NULL);
 	iounmap(rdev->rmmio);
 	rdev->rmmio = NULL;
@@ -631,38 +743,48 @@
  */
 int radeon_suspend_kms(struct drm_device *dev, pm_message_t state)
 {
-	struct radeon_device *rdev = dev->dev_private;
+	struct radeon_device *rdev;
 	struct drm_crtc *crtc;
+	int r;
 
-	if (dev == NULL || rdev == NULL) {
+	if (dev == NULL || dev->dev_private == NULL) {
 		return -ENODEV;
 	}
 	if (state.event == PM_EVENT_PRETHAW) {
 		return 0;
 	}
+	rdev = dev->dev_private;
+
 	/* unpin the front buffers */
 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
 		struct radeon_framebuffer *rfb = to_radeon_framebuffer(crtc->fb);
-		struct radeon_object *robj;
+		struct radeon_bo *robj;
 
 		if (rfb == NULL || rfb->obj == NULL) {
 			continue;
 		}
 		robj = rfb->obj->driver_private;
-		if (robj != rdev->fbdev_robj) {
-			radeon_object_unpin(robj);
+		if (robj != rdev->fbdev_rbo) {
+			r = radeon_bo_reserve(robj, false);
+			if (unlikely(r == 0)) {
+				radeon_bo_unpin(robj);
+				radeon_bo_unreserve(robj);
+			}
 		}
 	}
 	/* evict vram memory */
-	radeon_object_evict_vram(rdev);
+	radeon_bo_evict_vram(rdev);
 	/* wait for gpu to finish processing current batch */
 	radeon_fence_wait_last(rdev);
 
 	radeon_save_bios_scratch_regs(rdev);
 
 	radeon_suspend(rdev);
+	radeon_hpd_fini(rdev);
 	/* evict remaining vram memory */
-	radeon_object_evict_vram(rdev);
+	radeon_bo_evict_vram(rdev);
+
+	radeon_agp_suspend(rdev);
 
 	pci_save_state(dev->pdev);
 	if (state.event == PM_EVENT_SUSPEND) {
@@ -695,6 +817,8 @@
 	fb_set_suspend(rdev->fbdev_info, 0);
 	release_console_sem();
 
+	/* reset hpd state */
+	radeon_hpd_init(rdev);
 	/* blat the mode back in */
 	drm_helper_resume_force_mode(dev);
 	return 0;
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_kms.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_kms.c
@@ -30,10 +30,19 @@
 #include "radeon.h"
 #include "radeon_drm.h"
 
+int radeon_driver_unload_kms(struct drm_device *dev)
+{
+	struct radeon_device *rdev = dev->dev_private;
+
+	if (rdev == NULL)
+		return 0;
+	radeon_modeset_fini(rdev);
+	radeon_device_fini(rdev);
+	kfree(rdev);
+	dev->dev_private = NULL;
+	return 0;
+}
 
-/*
- * Driver load/unload
- */
 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags)
 {
 	struct radeon_device *rdev;
@@ -62,31 +71,20 @@
 	 */
 	r = radeon_device_init(rdev, dev, dev->pdev, flags);
 	if (r) {
-		DRM_ERROR("Fatal error while trying to initialize radeon.\n");
-		return r;
+		dev_err(&dev->pdev->dev, "Fatal error during GPU init\n");
+		goto out;
 	}
 	/* Again modeset_init should fail only on fatal error
 	 * otherwise it should provide enough functionalities
 	 * for shadowfb to run
 	 */
 	r = radeon_modeset_init(rdev);
-	if (r) {
-		return r;
-	}
-	return 0;
-}
-
-int radeon_driver_unload_kms(struct drm_device *dev)
-{
-	struct radeon_device *rdev = dev->dev_private;
-
-	if (rdev == NULL)
-		return 0;
-	radeon_modeset_fini(rdev);
-	radeon_device_fini(rdev);
-	kfree(rdev);
-	dev->dev_private = NULL;
-	return 0;
+	if (r)
+		dev_err(&dev->pdev->dev, "Fatal error during modeset init\n");
+out:
+	if (r)
+		radeon_driver_unload_kms(dev);
+	return r;
 }
 
 
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/atombios.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/atombios.h
@@ -1141,7 +1141,7 @@
 /* ucTableFormatRevision=1,ucTableContentRevision=2 */
 typedef struct _LVDS_ENCODER_CONTROL_PARAMETERS_V2 {
 	USHORT usPixelClock;	/*  in 10KHz; for bios convenient */
-	UCHAR ucMisc;		/*  see PANEL_ENCODER_MISC_xx defintions below */
+	UCHAR ucMisc;		/*  see PANEL_ENCODER_MISC_xx definitions below */
 	UCHAR ucAction;		/*  0: turn off encoder */
 	/*  1: setup and turn on encoder */
 	UCHAR ucTruncate;	/*  bit0=0: Disable truncate */
@@ -1424,7 +1424,7 @@
 /*  Structures used in FirmwareInfoTable */
 /****************************************************************************/
 
-/*  usBIOSCapability Defintion: */
+/*  usBIOSCapability Definition: */
 /*  Bit 0 = 0: Bios image is not Posted, =1:Bios image is Posted; */
 /*  Bit 1 = 0: Dual CRTC is not supported, =1: Dual CRTC is supported; */
 /*  Bit 2 = 0: Extended Desktop is not supported, =1: Extended Desktop is supported; */
@@ -2386,7 +2386,7 @@
 } ATOM_ANALOG_TV_INFO_V1_2;
 
 /**************************************************************************/
-/*  VRAM usage and their defintions */
+/*  VRAM usage and their definitions */
 
 /*  One chunk of VRAM used by Bios are for HWICON surfaces,EDID data. */
 /*  Current Mode timing and Dail Timing and/or STD timing data EACH device. They can be broken down as below. */
@@ -2680,7 +2680,7 @@
 typedef struct _ATOM_HPD_INT_RECORD {
 	ATOM_COMMON_RECORD_HEADER sheader;
 	UCHAR ucHPDIntGPIOID;	/* Corresponding block in GPIO_PIN_INFO table gives the pin info */
-	UCHAR ucPluggged_PinState;
+	UCHAR ucPlugged_PinState;
 } ATOM_HPD_INT_RECORD;
 
 typedef struct _ATOM_OUTPUT_PROTECTION_RECORD {
@@ -3046,7 +3046,7 @@
 #define ATOM_S0_SYSTEM_POWER_STATE_VALUE_DC     2
 #define ATOM_S0_SYSTEM_POWER_STATE_VALUE_LITEAC 3
 
-/* Byte aligned defintion for BIOS usage */
+/* Byte aligned definition for BIOS usage */
 #define ATOM_S0_CRT1_MONOb0             0x01
 #define ATOM_S0_CRT1_COLORb0            0x02
 #define ATOM_S0_CRT1_MASKb0             (ATOM_S0_CRT1_MONOb0+ATOM_S0_CRT1_COLORb0)
@@ -3131,7 +3131,7 @@
 #define ATOM_S2_DISPLAY_ROTATION_DEGREE_SHIFT 30
 #define ATOM_S2_DISPLAY_ROTATION_ANGLE_MASK   0xC0000000L
 
-/* Byte aligned defintion for BIOS usage */
+/* Byte aligned definition for BIOS usage */
 #define ATOM_S2_TV1_STANDARD_MASKb0     0x0F
 #define ATOM_S2_CURRENT_BL_LEVEL_MASKb1 0xFF
 #define ATOM_S2_CRT1_DPMS_STATEb2       0x01
@@ -3190,7 +3190,7 @@
 #define ATOM_S3_ALLOW_FAST_PWR_SWITCH   0x40000000L
 #define ATOM_S3_RQST_GPU_USE_MIN_PWR    0x80000000L
 
-/* Byte aligned defintion for BIOS usage */
+/* Byte aligned definition for BIOS usage */
 #define ATOM_S3_CRT1_ACTIVEb0           0x01
 #define ATOM_S3_LCD1_ACTIVEb0           0x02
 #define ATOM_S3_TV1_ACTIVEb0            0x04
@@ -3230,7 +3230,7 @@
 #define ATOM_S4_LCD1_REFRESH_MASK       0x0000FF00L
 #define ATOM_S4_LCD1_REFRESH_SHIFT      8
 
-/* Byte aligned defintion for BIOS usage */
+/* Byte aligned definition for BIOS usage */
 #define ATOM_S4_LCD1_PANEL_ID_MASKb0	  0x0FF
 #define ATOM_S4_LCD1_REFRESH_MASKb1		  ATOM_S4_LCD1_PANEL_ID_MASKb0
 #define ATOM_S4_VRAM_INFO_MASKb2        ATOM_S4_LCD1_PANEL_ID_MASKb0
@@ -3310,7 +3310,7 @@
 #define ATOM_S6_VRI_BRIGHTNESS_CHANGE       0x40000000L
 #define ATOM_S6_CONFIG_DISPLAY_CHANGE_MASK  0x80000000L
 
-/* Byte aligned defintion for BIOS usage */
+/* Byte aligned definition for BIOS usage */
 #define ATOM_S6_DEVICE_CHANGEb0         0x01
 #define ATOM_S6_SCALER_CHANGEb0         0x02
 #define ATOM_S6_LID_CHANGEb0            0x04
@@ -4690,6 +4690,205 @@
 	ATOM_POWERMODE_INFO_V3 asPowerPlayInfo[ATOM_MAX_NUMBEROF_POWER_BLOCK];
 } ATOM_POWERPLAY_INFO_V3;
 
+/* New PPlib */
+/**************************************************************************/
+typedef struct _ATOM_PPLIB_THERMALCONTROLLER
+
+{
+    UCHAR ucType;           // one of ATOM_PP_THERMALCONTROLLER_*
+    UCHAR ucI2cLine;        // as interpreted by DAL I2C
+    UCHAR ucI2cAddress;
+    UCHAR ucFanParameters;  // Fan Control Parameters.
+    UCHAR ucFanMinRPM;      // Fan Minimum RPM (hundreds) -- for display purposes only.
+    UCHAR ucFanMaxRPM;      // Fan Maximum RPM (hundreds) -- for display purposes only.
+    UCHAR ucReserved;       // ----
+    UCHAR ucFlags;          // to be defined
+} ATOM_PPLIB_THERMALCONTROLLER;
+
+#define ATOM_PP_FANPARAMETERS_TACHOMETER_PULSES_PER_REVOLUTION_MASK 0x0f
+#define ATOM_PP_FANPARAMETERS_NOFAN                                 0x80    // No fan is connected to this controller.
+
+#define ATOM_PP_THERMALCONTROLLER_NONE      0
+#define ATOM_PP_THERMALCONTROLLER_LM63      1  // Not used by PPLib
+#define ATOM_PP_THERMALCONTROLLER_ADM1032   2  // Not used by PPLib
+#define ATOM_PP_THERMALCONTROLLER_ADM1030   3  // Not used by PPLib
+#define ATOM_PP_THERMALCONTROLLER_MUA6649   4  // Not used by PPLib
+#define ATOM_PP_THERMALCONTROLLER_LM64      5
+#define ATOM_PP_THERMALCONTROLLER_F75375    6  // Not used by PPLib
+#define ATOM_PP_THERMALCONTROLLER_RV6xx     7
+#define ATOM_PP_THERMALCONTROLLER_RV770     8
+#define ATOM_PP_THERMALCONTROLLER_ADT7473   9
+
+typedef struct _ATOM_PPLIB_STATE
+{
+    UCHAR ucNonClockStateIndex;
+    UCHAR ucClockStateIndices[1]; // variable-sized
+} ATOM_PPLIB_STATE;
+
+//// ATOM_PPLIB_POWERPLAYTABLE::ulPlatformCaps
+#define ATOM_PP_PLATFORM_CAP_BACKBIAS 1
+#define ATOM_PP_PLATFORM_CAP_POWERPLAY 2
+#define ATOM_PP_PLATFORM_CAP_SBIOSPOWERSOURCE 4
+#define ATOM_PP_PLATFORM_CAP_ASPM_L0s 8
+#define ATOM_PP_PLATFORM_CAP_ASPM_L1 16
+#define ATOM_PP_PLATFORM_CAP_HARDWAREDC 32
+#define ATOM_PP_PLATFORM_CAP_GEMINIPRIMARY 64
+#define ATOM_PP_PLATFORM_CAP_STEPVDDC 128
+#define ATOM_PP_PLATFORM_CAP_VOLTAGECONTROL 256
+#define ATOM_PP_PLATFORM_CAP_SIDEPORTCONTROL 512
+#define ATOM_PP_PLATFORM_CAP_TURNOFFPLL_ASPML1 1024
+#define ATOM_PP_PLATFORM_CAP_HTLINKCONTROL 2048
+
+typedef struct _ATOM_PPLIB_POWERPLAYTABLE
+{
+      ATOM_COMMON_TABLE_HEADER sHeader;
+
+      UCHAR ucDataRevision;
+
+      UCHAR ucNumStates;
+      UCHAR ucStateEntrySize;
+      UCHAR ucClockInfoSize;
+      UCHAR ucNonClockSize;
+
+      // offset from start of this table to array of ucNumStates ATOM_PPLIB_STATE structures
+      USHORT usStateArrayOffset;
+
+      // offset from start of this table to array of ASIC-specific structures,
+      // currently ATOM_PPLIB_CLOCK_INFO.
+      USHORT usClockInfoArrayOffset;
+
+      // offset from start of this table to array of ATOM_PPLIB_NONCLOCK_INFO
+      USHORT usNonClockInfoArrayOffset;
+
+      USHORT usBackbiasTime;    // in microseconds
+      USHORT usVoltageTime;     // in microseconds
+      USHORT usTableSize;       //the size of this structure, or the extended structure
+
+      ULONG ulPlatformCaps;            // See ATOM_PPLIB_CAPS_*
+
+      ATOM_PPLIB_THERMALCONTROLLER    sThermalController;
+
+      USHORT usBootClockInfoOffset;
+      USHORT usBootNonClockInfoOffset;
+
+} ATOM_PPLIB_POWERPLAYTABLE;
+
+//// ATOM_PPLIB_NONCLOCK_INFO::usClassification
+#define ATOM_PPLIB_CLASSIFICATION_UI_MASK          0x0007
+#define ATOM_PPLIB_CLASSIFICATION_UI_SHIFT         0
+#define ATOM_PPLIB_CLASSIFICATION_UI_NONE          0
+#define ATOM_PPLIB_CLASSIFICATION_UI_BATTERY       1
+#define ATOM_PPLIB_CLASSIFICATION_UI_BALANCED      3
+#define ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE   5
+// 2, 4, 6, 7 are reserved
+
+#define ATOM_PPLIB_CLASSIFICATION_BOOT                   0x0008
+#define ATOM_PPLIB_CLASSIFICATION_THERMAL                0x0010
+#define ATOM_PPLIB_CLASSIFICATION_LIMITEDPOWERSOURCE     0x0020
+#define ATOM_PPLIB_CLASSIFICATION_REST                   0x0040
+#define ATOM_PPLIB_CLASSIFICATION_FORCED                 0x0080
+#define ATOM_PPLIB_CLASSIFICATION_3DPERFORMANCE          0x0100
+#define ATOM_PPLIB_CLASSIFICATION_OVERDRIVETEMPLATE      0x0200
+#define ATOM_PPLIB_CLASSIFICATION_UVDSTATE               0x0400
+#define ATOM_PPLIB_CLASSIFICATION_3DLOW                  0x0800
+#define ATOM_PPLIB_CLASSIFICATION_ACPI                   0x1000
+// remaining 3 bits are reserved
+
+//// ATOM_PPLIB_NONCLOCK_INFO::ulCapsAndSettings
+#define ATOM_PPLIB_SINGLE_DISPLAY_ONLY           0x00000001
+#define ATOM_PPLIB_SUPPORTS_VIDEO_PLAYBACK         0x00000002
+
+// 0 is 2.5Gb/s, 1 is 5Gb/s
+#define ATOM_PPLIB_PCIE_LINK_SPEED_MASK            0x00000004
+#define ATOM_PPLIB_PCIE_LINK_SPEED_SHIFT           2
+
+// lanes - 1: 1, 2, 4, 8, 12, 16 permitted by PCIE spec
+#define ATOM_PPLIB_PCIE_LINK_WIDTH_MASK            0x000000F8
+#define ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT           3
+
+// lookup into reduced refresh-rate table
+#define ATOM_PPLIB_LIMITED_REFRESHRATE_VALUE_MASK  0x00000F00
+#define ATOM_PPLIB_LIMITED_REFRESHRATE_VALUE_SHIFT 8
+
+#define ATOM_PPLIB_LIMITED_REFRESHRATE_UNLIMITED    0
+#define ATOM_PPLIB_LIMITED_REFRESHRATE_50HZ         1
+// 2-15 TBD as needed.
+
+#define ATOM_PPLIB_SOFTWARE_DISABLE_LOADBALANCING        0x00001000
+#define ATOM_PPLIB_SOFTWARE_ENABLE_SLEEP_FOR_TIMESTAMPS  0x00002000
+#define ATOM_PPLIB_ENABLE_VARIBRIGHT                     0x00008000
+
+#define ATOM_PPLIB_DISALLOW_ON_DC                       0x00004000
+
+// Contained in an array starting at the offset
+// in ATOM_PPLIB_POWERPLAYTABLE::usNonClockInfoArrayOffset.
+// referenced from ATOM_PPLIB_STATE_INFO::ucNonClockStateIndex
+typedef struct _ATOM_PPLIB_NONCLOCK_INFO
+{
+      USHORT usClassification;
+      UCHAR  ucMinTemperature;
+      UCHAR  ucMaxTemperature;
+      ULONG  ulCapsAndSettings;
+      UCHAR  ucRequiredPower;
+      UCHAR  ucUnused1[3];
+} ATOM_PPLIB_NONCLOCK_INFO;
+
+// Contained in an array starting at the offset
+// in ATOM_PPLIB_POWERPLAYTABLE::usClockInfoArrayOffset.
+// referenced from ATOM_PPLIB_STATE::ucClockStateIndices
+typedef struct _ATOM_PPLIB_R600_CLOCK_INFO
+{
+      USHORT usEngineClockLow;
+      UCHAR ucEngineClockHigh;
+
+      USHORT usMemoryClockLow;
+      UCHAR ucMemoryClockHigh;
+
+      USHORT usVDDC;
+      USHORT usUnused1;
+      USHORT usUnused2;
+
+      ULONG ulFlags; // ATOM_PPLIB_R600_FLAGS_*
+
+} ATOM_PPLIB_R600_CLOCK_INFO;
+
+// ulFlags in ATOM_PPLIB_R600_CLOCK_INFO
+#define ATOM_PPLIB_R600_FLAGS_PCIEGEN2          1
+#define ATOM_PPLIB_R600_FLAGS_UVDSAFE           2
+#define ATOM_PPLIB_R600_FLAGS_BACKBIASENABLE    4
+#define ATOM_PPLIB_R600_FLAGS_MEMORY_ODT_OFF    8
+#define ATOM_PPLIB_R600_FLAGS_MEMORY_DLL_OFF    16
+
+typedef struct _ATOM_PPLIB_RS780_CLOCK_INFO
+
+{
+      USHORT usLowEngineClockLow;         // Low Engine clock in MHz (the same way as on the R600).
+      UCHAR  ucLowEngineClockHigh;
+      USHORT usHighEngineClockLow;        // High Engine clock in MHz.
+      UCHAR  ucHighEngineClockHigh;
+      USHORT usMemoryClockLow;            // For now one of the ATOM_PPLIB_RS780_SPMCLK_XXXX constants.
+      UCHAR  ucMemoryClockHigh;           // Currentyl unused.
+      UCHAR  ucPadding;                   // For proper alignment and size.
+      USHORT usVDDC;                      // For the 780, use: None, Low, High, Variable
+      UCHAR  ucMaxHTLinkWidth;            // From SBIOS - {2, 4, 8, 16}
+      UCHAR  ucMinHTLinkWidth;            // From SBIOS - {2, 4, 8, 16}. Effective only if CDLW enabled. Minimum down stream width could be bigger as display BW requriement.
+      USHORT usHTLinkFreq;                // See definition ATOM_PPLIB_RS780_HTLINKFREQ_xxx or in MHz(>=200).
+      ULONG  ulFlags;
+} ATOM_PPLIB_RS780_CLOCK_INFO;
+
+#define ATOM_PPLIB_RS780_VOLTAGE_NONE       0
+#define ATOM_PPLIB_RS780_VOLTAGE_LOW        1
+#define ATOM_PPLIB_RS780_VOLTAGE_HIGH       2
+#define ATOM_PPLIB_RS780_VOLTAGE_VARIABLE   3
+
+#define ATOM_PPLIB_RS780_SPMCLK_NONE        0   // We cannot change the side port memory clock, leave it as it is.
+#define ATOM_PPLIB_RS780_SPMCLK_LOW         1
+#define ATOM_PPLIB_RS780_SPMCLK_HIGH        2
+
+#define ATOM_PPLIB_RS780_HTLINKFREQ_NONE       0
+#define ATOM_PPLIB_RS780_HTLINKFREQ_LOW        1
+#define ATOM_PPLIB_RS780_HTLINKFREQ_HIGH       2
+
 /**************************************************************************/
 
 /*  Following definitions are for compatiblity issue in different SW components. */
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
@@ -46,6 +46,7 @@
 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
 	uint32_t lvds_gen_cntl, lvds_pll_cntl, pixclks_cntl, disp_pwr_man;
 	int panel_pwr_delay = 2000;
+	bool is_mac = false;
 	DRM_DEBUG("\n");
 
 	if (radeon_encoder->enc_priv) {
@@ -58,6 +59,15 @@
 		}
 	}
 
+	/* macs (and possibly some x86 oem systems?) wire up LVDS strangely
+	 * Taken from radeonfb.
+	 */
+	if ((rdev->mode_info.connector_table == CT_IBOOK) ||
+	    (rdev->mode_info.connector_table == CT_POWERBOOK_EXTERNAL) ||
+	    (rdev->mode_info.connector_table == CT_POWERBOOK_INTERNAL) ||
+	    (rdev->mode_info.connector_table == CT_POWERBOOK_VGA))
+		is_mac = true;
+
 	switch (mode) {
 	case DRM_MODE_DPMS_ON:
 		disp_pwr_man = RREG32(RADEON_DISP_PWR_MAN);
@@ -74,6 +84,8 @@
 
 		lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL);
 		lvds_gen_cntl |= (RADEON_LVDS_ON | RADEON_LVDS_EN | RADEON_LVDS_DIGON | RADEON_LVDS_BLON);
+		if (is_mac)
+			lvds_gen_cntl |= RADEON_LVDS_BL_MOD_EN;
 		lvds_gen_cntl &= ~(RADEON_LVDS_DISPLAY_DIS);
 		udelay(panel_pwr_delay * 1000);
 		WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
@@ -85,10 +97,18 @@
 		WREG32_PLL_P(RADEON_PIXCLKS_CNTL, 0, ~RADEON_PIXCLK_LVDS_ALWAYS_ONb);
 		lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL);
 		lvds_gen_cntl |= RADEON_LVDS_DISPLAY_DIS;
-		lvds_gen_cntl &= ~(RADEON_LVDS_ON | RADEON_LVDS_BLON | RADEON_LVDS_EN | RADEON_LVDS_DIGON);
+		if (is_mac) {
+			lvds_gen_cntl &= ~RADEON_LVDS_BL_MOD_EN;
+			WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
+			lvds_gen_cntl &= ~(RADEON_LVDS_ON | RADEON_LVDS_EN);
+		} else {
+			WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
+			lvds_gen_cntl &= ~(RADEON_LVDS_ON | RADEON_LVDS_BLON | RADEON_LVDS_EN | RADEON_LVDS_DIGON);
+		}
 		udelay(panel_pwr_delay * 1000);
 		WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
 		WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl);
+		udelay(panel_pwr_delay * 1000);
 		break;
 	}
 
@@ -136,7 +156,14 @@
 	lvds_pll_cntl &= ~RADEON_LVDS_PLL_EN;
 
 	lvds_ss_gen_cntl = RREG32(RADEON_LVDS_SS_GEN_CNTL);
-	if ((!rdev->is_atom_bios)) {
+	if (rdev->is_atom_bios) {
+		/* LVDS_GEN_CNTL parameters are computed in LVDSEncoderControl
+		 * need to call that on resume to set up the reg properly.
+		 */
+		radeon_encoder->pixel_clock = adjusted_mode->clock;
+		atombios_digital_setup(encoder, PANEL_ENCODER_ACTION_ENABLE);
+		lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL);
+	} else {
 		struct radeon_encoder_lvds *lvds = (struct radeon_encoder_lvds *)radeon_encoder->enc_priv;
 		if (lvds) {
 			DRM_DEBUG("bios LVDS_GEN_CNTL: 0x%x\n", lvds->lvds_gen_cntl);
@@ -147,8 +174,7 @@
 					     (lvds->panel_blon_delay << RADEON_LVDS_PWRSEQ_DELAY2_SHIFT));
 		} else
 			lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL);
-	} else
-		lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL);
+	}
 	lvds_gen_cntl |= RADEON_LVDS_DISPLAY_DIS;
 	lvds_gen_cntl &= ~(RADEON_LVDS_ON |
 			   RADEON_LVDS_BLON |
@@ -184,9 +210,9 @@
 		radeon_combios_encoder_crtc_scratch_regs(encoder, radeon_crtc->crtc_id);
 }
 
-static bool radeon_legacy_lvds_mode_fixup(struct drm_encoder *encoder,
-					  struct drm_display_mode *mode,
-					  struct drm_display_mode *adjusted_mode)
+static bool radeon_legacy_mode_fixup(struct drm_encoder *encoder,
+				     struct drm_display_mode *mode,
+				     struct drm_display_mode *adjusted_mode)
 {
 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
 
@@ -194,15 +220,24 @@
 	radeon_encoder_set_active_device(encoder);
 	drm_mode_set_crtcinfo(adjusted_mode, 0);
 
-	if (radeon_encoder->rmx_type != RMX_OFF)
-		radeon_rmx_mode_fixup(encoder, mode, adjusted_mode);
+	/* get the native mode for LVDS */
+	if (radeon_encoder->active_device & (ATOM_DEVICE_LCD_SUPPORT)) {
+		struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
+		int mode_id = adjusted_mode->base.id;
+		*adjusted_mode = *native_mode;
+		adjusted_mode->hdisplay = mode->hdisplay;
+		adjusted_mode->vdisplay = mode->vdisplay;
+		adjusted_mode->crtc_hdisplay = mode->hdisplay;
+		adjusted_mode->crtc_vdisplay = mode->vdisplay;
+		adjusted_mode->base.id = mode_id;
+	}
 
 	return true;
 }
 
 static const struct drm_encoder_helper_funcs radeon_legacy_lvds_helper_funcs = {
 	.dpms = radeon_legacy_lvds_dpms,
-	.mode_fixup = radeon_legacy_lvds_mode_fixup,
+	.mode_fixup = radeon_legacy_mode_fixup,
 	.prepare = radeon_legacy_lvds_prepare,
 	.mode_set = radeon_legacy_lvds_mode_set,
 	.commit = radeon_legacy_lvds_commit,
@@ -214,17 +249,6 @@
 	.destroy = radeon_enc_destroy,
 };
 
-static bool radeon_legacy_primary_dac_mode_fixup(struct drm_encoder *encoder,
-						 struct drm_display_mode *mode,
-						 struct drm_display_mode *adjusted_mode)
-{
-	/* set the active encoder to connector routing */
-	radeon_encoder_set_active_device(encoder);
-	drm_mode_set_crtcinfo(adjusted_mode, 0);
-
-	return true;
-}
-
 static void radeon_legacy_primary_dac_dpms(struct drm_encoder *encoder, int mode)
 {
 	struct drm_device *dev = encoder->dev;
@@ -410,7 +434,7 @@
 
 static const struct drm_encoder_helper_funcs radeon_legacy_primary_dac_helper_funcs = {
 	.dpms = radeon_legacy_primary_dac_dpms,
-	.mode_fixup = radeon_legacy_primary_dac_mode_fixup,
+	.mode_fixup = radeon_legacy_mode_fixup,
 	.prepare = radeon_legacy_primary_dac_prepare,
 	.mode_set = radeon_legacy_primary_dac_mode_set,
 	.commit = radeon_legacy_primary_dac_commit,
@@ -423,16 +447,6 @@
 	.destroy = radeon_enc_destroy,
 };
 
-static bool radeon_legacy_tmds_int_mode_fixup(struct drm_encoder *encoder,
-					      struct drm_display_mode *mode,
-					      struct drm_display_mode *adjusted_mode)
-{
-
-	drm_mode_set_crtcinfo(adjusted_mode, 0);
-
-	return true;
-}
-
 static void radeon_legacy_tmds_int_dpms(struct drm_encoder *encoder, int mode)
 {
 	struct drm_device *dev = encoder->dev;
@@ -584,7 +598,7 @@
 
 static const struct drm_encoder_helper_funcs radeon_legacy_tmds_int_helper_funcs = {
 	.dpms = radeon_legacy_tmds_int_dpms,
-	.mode_fixup = radeon_legacy_tmds_int_mode_fixup,
+	.mode_fixup = radeon_legacy_mode_fixup,
 	.prepare = radeon_legacy_tmds_int_prepare,
 	.mode_set = radeon_legacy_tmds_int_mode_set,
 	.commit = radeon_legacy_tmds_int_commit,
@@ -596,17 +610,6 @@
 	.destroy = radeon_enc_destroy,
 };
 
-static bool radeon_legacy_tmds_ext_mode_fixup(struct drm_encoder *encoder,
-					      struct drm_display_mode *mode,
-					      struct drm_display_mode *adjusted_mode)
-{
-	/* set the active encoder to connector routing */
-	radeon_encoder_set_active_device(encoder);
-	drm_mode_set_crtcinfo(adjusted_mode, 0);
-
-	return true;
-}
-
 static void radeon_legacy_tmds_ext_dpms(struct drm_encoder *encoder, int mode)
 {
 	struct drm_device *dev = encoder->dev;
@@ -697,6 +700,8 @@
 			/*if (mode->clock > 165000)
 			  fp2_gen_cntl |= R300_FP2_DVO_DUAL_CHANNEL_EN;*/
 		}
+		if (!radeon_combios_external_tmds_setup(encoder))
+			radeon_external_tmds_setup(encoder);
 	}
 
 	if (radeon_crtc->crtc_id == 0) {
@@ -724,9 +729,22 @@
 		radeon_combios_encoder_crtc_scratch_regs(encoder, radeon_crtc->crtc_id);
 }
 
+static void radeon_ext_tmds_enc_destroy(struct drm_encoder *encoder)
+{
+	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+	struct radeon_encoder_ext_tmds *tmds = radeon_encoder->enc_priv;
+	if (tmds) {
+		if (tmds->i2c_bus)
+			radeon_i2c_destroy(tmds->i2c_bus);
+	}
+	kfree(radeon_encoder->enc_priv);
+	drm_encoder_cleanup(encoder);
+	kfree(radeon_encoder);
+}
+
 static const struct drm_encoder_helper_funcs radeon_legacy_tmds_ext_helper_funcs = {
 	.dpms = radeon_legacy_tmds_ext_dpms,
-	.mode_fixup = radeon_legacy_tmds_ext_mode_fixup,
+	.mode_fixup = radeon_legacy_mode_fixup,
 	.prepare = radeon_legacy_tmds_ext_prepare,
 	.mode_set = radeon_legacy_tmds_ext_mode_set,
 	.commit = radeon_legacy_tmds_ext_commit,
@@ -735,20 +753,9 @@
 
 
 static const struct drm_encoder_funcs radeon_legacy_tmds_ext_enc_funcs = {
-	.destroy = radeon_enc_destroy,
+	.destroy = radeon_ext_tmds_enc_destroy,
 };
 
-static bool radeon_legacy_tv_dac_mode_fixup(struct drm_encoder *encoder,
-					    struct drm_display_mode *mode,
-					    struct drm_display_mode *adjusted_mode)
-{
-	/* set the active encoder to connector routing */
-	radeon_encoder_set_active_device(encoder);
-	drm_mode_set_crtcinfo(adjusted_mode, 0);
-
-	return true;
-}
-
 static void radeon_legacy_tv_dac_dpms(struct drm_encoder *encoder, int mode)
 {
 	struct drm_device *dev = encoder->dev;
@@ -1265,7 +1272,7 @@
 
 static const struct drm_encoder_helper_funcs radeon_legacy_tv_dac_helper_funcs = {
 	.dpms = radeon_legacy_tv_dac_dpms,
-	.mode_fixup = radeon_legacy_tv_dac_mode_fixup,
+	.mode_fixup = radeon_legacy_mode_fixup,
 	.prepare = radeon_legacy_tv_dac_prepare,
 	.mode_set = radeon_legacy_tv_dac_mode_set,
 	.commit = radeon_legacy_tv_dac_commit,
@@ -1302,6 +1309,29 @@
 	return tmds;
 }
 
+static struct radeon_encoder_ext_tmds *radeon_legacy_get_ext_tmds_info(struct radeon_encoder *encoder)
+{
+	struct drm_device *dev = encoder->base.dev;
+	struct radeon_device *rdev = dev->dev_private;
+	struct radeon_encoder_ext_tmds *tmds = NULL;
+	bool ret;
+
+	if (rdev->is_atom_bios)
+		return NULL;
+
+	tmds = kzalloc(sizeof(struct radeon_encoder_ext_tmds), GFP_KERNEL);
+
+	if (!tmds)
+		return NULL;
+
+	ret = radeon_legacy_get_ext_tmds_info_from_combios(encoder, tmds);
+
+	if (ret == false)
+		radeon_legacy_get_ext_tmds_info_from_table(encoder, tmds);
+
+	return tmds;
+}
+
 void
 radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_id, uint32_t supported_device)
 {
@@ -1329,7 +1359,6 @@
 		encoder->possible_crtcs = 0x1;
 	else
 		encoder->possible_crtcs = 0x3;
-	encoder->possible_clones = 0;
 
 	radeon_encoder->enc_priv = NULL;
 
@@ -1373,7 +1402,7 @@
 		drm_encoder_init(dev, encoder, &radeon_legacy_tmds_ext_enc_funcs, DRM_MODE_ENCODER_TMDS);
 		drm_encoder_helper_add(encoder, &radeon_legacy_tmds_ext_helper_funcs);
 		if (!rdev->is_atom_bios)
-			radeon_combios_get_ext_tmds_info(radeon_encoder);
+			radeon_encoder->enc_priv = radeon_legacy_get_ext_tmds_info(radeon_encoder);
 		break;
 	}
 }
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
@@ -30,9 +30,20 @@
 #include "radeon.h"
 #include "atom.h"
 
+static void radeon_overscan_setup(struct drm_crtc *crtc,
+				  struct drm_display_mode *mode)
+{
+	struct drm_device *dev = crtc->dev;
+	struct radeon_device *rdev = dev->dev_private;
+	struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
+
+	WREG32(RADEON_OVR_CLR + radeon_crtc->crtc_offset, 0);
+	WREG32(RADEON_OVR_WID_LEFT_RIGHT + radeon_crtc->crtc_offset, 0);
+	WREG32(RADEON_OVR_WID_TOP_BOTTOM + radeon_crtc->crtc_offset, 0);
+}
+
 static void radeon_legacy_rmx_mode_set(struct drm_crtc *crtc,
-				       struct drm_display_mode *mode,
-				       struct drm_display_mode *adjusted_mode)
+				       struct drm_display_mode *mode)
 {
 	struct drm_device *dev = crtc->dev;
 	struct radeon_device *rdev = dev->dev_private;
@@ -261,7 +272,7 @@
 	if (!ref_div)
 		return 1;
 
-	vcoFreq = ((unsigned)ref_freq & fb_div) / ref_div;
+	vcoFreq = ((unsigned)ref_freq * fb_div) / ref_div;
 
 	/*
 	 * This is horribly crude: the VCO frequency range is divided into
@@ -292,8 +303,7 @@
 	uint32_t mask;
 
 	if (radeon_crtc->crtc_id)
-		mask = (RADEON_CRTC2_EN |
-			RADEON_CRTC2_DISP_DIS |
+		mask = (RADEON_CRTC2_DISP_DIS |
 			RADEON_CRTC2_VSYNC_DIS |
 			RADEON_CRTC2_HSYNC_DIS |
 			RADEON_CRTC2_DISP_REQ_EN_B);
@@ -305,7 +315,7 @@
 	switch (mode) {
 	case DRM_MODE_DPMS_ON:
 		if (radeon_crtc->crtc_id)
-			WREG32_P(RADEON_CRTC2_GEN_CNTL, RADEON_CRTC2_EN, ~mask);
+			WREG32_P(RADEON_CRTC2_GEN_CNTL, RADEON_CRTC2_EN, ~(RADEON_CRTC2_EN | mask));
 		else {
 			WREG32_P(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_EN, ~(RADEON_CRTC_EN |
 									 RADEON_CRTC_DISP_REQ_EN_B));
@@ -319,7 +329,7 @@
 	case DRM_MODE_DPMS_OFF:
 		drm_vblank_pre_modeset(dev, radeon_crtc->crtc_id);
 		if (radeon_crtc->crtc_id)
-			WREG32_P(RADEON_CRTC2_GEN_CNTL, mask, ~mask);
+			WREG32_P(RADEON_CRTC2_GEN_CNTL, mask, ~(RADEON_CRTC2_EN | mask));
 		else {
 			WREG32_P(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_DISP_REQ_EN_B, ~(RADEON_CRTC_EN |
 										    RADEON_CRTC_DISP_REQ_EN_B));
@@ -329,69 +339,6 @@
 	}
 }
 
-/* properly set crtc bpp when using atombios */
-void radeon_legacy_atom_set_surface(struct drm_crtc *crtc)
-{
-	struct drm_device *dev = crtc->dev;
-	struct radeon_device *rdev = dev->dev_private;
-	struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
-	int format;
-	uint32_t crtc_gen_cntl;
-	uint32_t disp_merge_cntl;
-	uint32_t crtc_pitch;
-
-	switch (crtc->fb->bits_per_pixel) {
-	case 8:
-		format = 2;
-		break;
-	case 15:      /*  555 */
-		format = 3;
-		break;
-	case 16:      /*  565 */
-		format = 4;
-		break;
-	case 24:      /*  RGB */
-		format = 5;
-		break;
-	case 32:      /* xRGB */
-		format = 6;
-		break;
-	default:
-		return;
-	}
-
-	crtc_pitch  = ((((crtc->fb->pitch / (crtc->fb->bits_per_pixel / 8)) * crtc->fb->bits_per_pixel) +
-			((crtc->fb->bits_per_pixel * 8) - 1)) /
-		       (crtc->fb->bits_per_pixel * 8));
-	crtc_pitch |= crtc_pitch << 16;
-
-	WREG32(RADEON_CRTC_PITCH + radeon_crtc->crtc_offset, crtc_pitch);
-
-	switch (radeon_crtc->crtc_id) {
-	case 0:
-		disp_merge_cntl = RREG32(RADEON_DISP_MERGE_CNTL);
-		disp_merge_cntl &= ~RADEON_DISP_RGB_OFFSET_EN;
-		WREG32(RADEON_DISP_MERGE_CNTL, disp_merge_cntl);
-
-		crtc_gen_cntl = RREG32(RADEON_CRTC_GEN_CNTL) & 0xfffff0ff;
-		crtc_gen_cntl |= (format << 8);
-		crtc_gen_cntl |= RADEON_CRTC_EXT_DISP_EN;
-		WREG32(RADEON_CRTC_GEN_CNTL, crtc_gen_cntl);
-		break;
-	case 1:
-		disp_merge_cntl = RREG32(RADEON_DISP2_MERGE_CNTL);
-		disp_merge_cntl &= ~RADEON_DISP2_RGB_OFFSET_EN;
-		WREG32(RADEON_DISP2_MERGE_CNTL, disp_merge_cntl);
-
-		crtc_gen_cntl = RREG32(RADEON_CRTC2_GEN_CNTL) & 0xfffff0ff;
-		crtc_gen_cntl |= (format << 8);
-		WREG32(RADEON_CRTC2_GEN_CNTL, crtc_gen_cntl);
-		WREG32(RADEON_FP_H2_SYNC_STRT_WID,   RREG32(RADEON_CRTC2_H_SYNC_STRT_WID));
-		WREG32(RADEON_FP_V2_SYNC_STRT_WID,   RREG32(RADEON_CRTC2_V_SYNC_STRT_WID));
-		break;
-	}
-}
-
 int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
 			 struct drm_framebuffer *old_fb)
 {
@@ -400,14 +347,21 @@
 	struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
 	struct radeon_framebuffer *radeon_fb;
 	struct drm_gem_object *obj;
+	struct radeon_bo *rbo;
 	uint64_t base;
 	uint32_t crtc_offset, crtc_offset_cntl, crtc_tile_x0_y0 = 0;
 	uint32_t crtc_pitch, pitch_pixels;
 	uint32_t tiling_flags;
 	int format;
 	uint32_t gen_cntl_reg, gen_cntl_val;
+	int r;
 
 	DRM_DEBUG("\n");
+	/* no fb bound */
+	if (!crtc->fb) {
+		DRM_DEBUG("No FB bound\n");
+		return 0;
+	}
 
 	radeon_fb = to_radeon_framebuffer(crtc->fb);
 
@@ -431,10 +385,22 @@
 		return false;
 	}
 
+	/* Pin framebuffer & get tilling informations */
 	obj = radeon_fb->obj;
-	if (radeon_gem_object_pin(obj, RADEON_GEM_DOMAIN_VRAM, &base)) {
+	rbo = obj->driver_private;
+	r = radeon_bo_reserve(rbo, false);
+	if (unlikely(r != 0))
+		return r;
+	r = radeon_bo_pin(rbo, RADEON_GEM_DOMAIN_VRAM, &base);
+	if (unlikely(r != 0)) {
+		radeon_bo_unreserve(rbo);
 		return -EINVAL;
 	}
+	radeon_bo_get_tiling_flags(rbo, &tiling_flags, NULL);
+	radeon_bo_unreserve(rbo);
+	if (tiling_flags & RADEON_TILING_MICRO)
+		DRM_ERROR("trying to scanout microtiled buffer\n");
+
 	/* if scanout was in GTT this really wouldn't work */
 	/* crtc offset is from display base addr not FB location */
 	radeon_crtc->legacy_display_base_addr = rdev->mc.vram_location;
@@ -449,10 +415,6 @@
 		       (crtc->fb->bits_per_pixel * 8));
 	crtc_pitch |= crtc_pitch << 16;
 
-	radeon_object_get_tiling_flags(obj->driver_private,
-				       &tiling_flags, NULL);
-	if (tiling_flags & RADEON_TILING_MICRO)
-		DRM_ERROR("trying to scanout microtiled buffer\n");
 
 	if (tiling_flags & RADEON_TILING_MACRO) {
 		if (ASIC_IS_R300(rdev))
@@ -530,7 +492,12 @@
 
 	if (old_fb && old_fb != crtc->fb) {
 		radeon_fb = to_radeon_framebuffer(old_fb);
-		radeon_gem_object_unpin(radeon_fb->obj);
+		rbo = radeon_fb->obj->driver_private;
+		r = radeon_bo_reserve(rbo, false);
+		if (unlikely(r != 0))
+			return r;
+		radeon_bo_unpin(rbo);
+		radeon_bo_unreserve(rbo);
 	}
 
 	/* Bytes per pixel may have changed */
@@ -642,12 +609,8 @@
 		uint32_t crtc2_gen_cntl;
 		uint32_t disp2_merge_cntl;
 
-		/* check to see if TV DAC is enabled for another crtc and keep it enabled */
-		if (RREG32(RADEON_CRTC2_GEN_CNTL) & RADEON_CRTC2_CRT2_ON)
-			crtc2_gen_cntl = RADEON_CRTC2_CRT2_ON;
-		else
-			crtc2_gen_cntl = 0;
-
+		/* if TV DAC is enabled for another crtc and keep it enabled */
+		crtc2_gen_cntl = RREG32(RADEON_CRTC2_GEN_CNTL) & 0x00718080;
 		crtc2_gen_cntl |= ((format << 8)
 				   | RADEON_CRTC2_VSYNC_DIS
 				   | RADEON_CRTC2_HSYNC_DIS
@@ -676,7 +639,8 @@
 		uint32_t crtc_ext_cntl;
 		uint32_t disp_merge_cntl;
 
-		crtc_gen_cntl = (RADEON_CRTC_EXT_DISP_EN
+		crtc_gen_cntl = RREG32(RADEON_CRTC_GEN_CNTL) & 0x00718000;
+		crtc_gen_cntl |= (RADEON_CRTC_EXT_DISP_EN
 				 | (format << 8)
 				 | RADEON_CRTC_DISP_REQ_EN_B
 				 | ((mode->flags & DRM_MODE_FLAG_DBLSCAN)
@@ -728,7 +692,6 @@
 	uint32_t post_divider = 0;
 	uint32_t freq = 0;
 	uint8_t pll_gain;
-	int pll_flags = RADEON_PLL_LEGACY;
 	bool use_bios_divs = false;
 	/* PLL registers */
 	uint32_t pll_ref_div = 0;
@@ -762,10 +725,16 @@
 	else
 		pll = &rdev->clock.p1pll;
 
+	pll->flags = RADEON_PLL_LEGACY;
+	if (radeon_new_pll == 1)
+		pll->algo = PLL_ALGO_NEW;
+	else
+		pll->algo = PLL_ALGO_LEGACY;
+
 	if (mode->clock > 200000) /* range limits??? */
-		pll_flags |= RADEON_PLL_PREFER_HIGH_FB_DIV;
+		pll->flags |= RADEON_PLL_PREFER_HIGH_FB_DIV;
 	else
-		pll_flags |= RADEON_PLL_PREFER_LOW_REF_DIV;
+		pll->flags |= RADEON_PLL_PREFER_LOW_REF_DIV;
 
 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
 		if (encoder->crtc == crtc) {
@@ -777,20 +746,22 @@
 			}
 
 			if (encoder->encoder_type != DRM_MODE_ENCODER_DAC)
-				pll_flags |= RADEON_PLL_NO_ODD_POST_DIV;
+				pll->flags |= RADEON_PLL_NO_ODD_POST_DIV;
 			if (encoder->encoder_type == DRM_MODE_ENCODER_LVDS) {
-				struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
-				struct radeon_encoder_lvds *lvds = (struct radeon_encoder_lvds *)radeon_encoder->enc_priv;
-				if (lvds) {
-					if (lvds->use_bios_dividers) {
-						pll_ref_div = lvds->panel_ref_divider;
-						pll_fb_post_div   = (lvds->panel_fb_divider |
-								     (lvds->panel_post_divider << 16));
-						htotal_cntl  = 0;
-						use_bios_divs = true;
+				if (!rdev->is_atom_bios) {
+					struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+					struct radeon_encoder_lvds *lvds = (struct radeon_encoder_lvds *)radeon_encoder->enc_priv;
+					if (lvds) {
+						if (lvds->use_bios_dividers) {
+							pll_ref_div = lvds->panel_ref_divider;
+							pll_fb_post_div   = (lvds->panel_fb_divider |
+									     (lvds->panel_post_divider << 16));
+							htotal_cntl  = 0;
+							use_bios_divs = true;
+						}
 					}
 				}
-				pll_flags |= RADEON_PLL_USE_REF_DIV;
+				pll->flags |= RADEON_PLL_USE_REF_DIV;
 			}
 		}
 	}
@@ -800,8 +771,7 @@
 	if (!use_bios_divs) {
 		radeon_compute_pll(pll, mode->clock,
 				   &freq, &feedback_div, &frac_fb_div,
-				   &reference_div, &post_divider,
-				   pll_flags);
+				   &reference_div, &post_divider);
 
 		for (post_div = &post_divs[0]; post_div->divider; ++post_div) {
 			if (post_div->divider == post_divider)
@@ -1027,8 +997,9 @@
 	radeon_crtc_set_base(crtc, x, y, old_fb);
 	radeon_set_crtc_timing(crtc, adjusted_mode);
 	radeon_set_pll(crtc, adjusted_mode);
+	radeon_overscan_setup(crtc, adjusted_mode);
 	if (radeon_crtc->crtc_id == 0) {
-		radeon_legacy_rmx_mode_set(crtc, mode, adjusted_mode);
+		radeon_legacy_rmx_mode_set(crtc, adjusted_mode);
 	} else {
 		if (radeon_crtc->rmx_type != RMX_OFF) {
 			/* FIXME: only first crtc has rmx what should we
@@ -1042,12 +1013,29 @@
 
 static void radeon_crtc_prepare(struct drm_crtc *crtc)
 {
-	radeon_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
+	struct drm_device *dev = crtc->dev;
+	struct drm_crtc *crtci;
+
+	/*
+	* The hardware wedges sometimes if you reconfigure one CRTC
+	* whilst another is running (see fdo bug #24611).
+	*/
+	list_for_each_entry(crtci, &dev->mode_config.crtc_list, head)
+		radeon_crtc_dpms(crtci, DRM_MODE_DPMS_OFF);
 }
 
 static void radeon_crtc_commit(struct drm_crtc *crtc)
 {
-	radeon_crtc_dpms(crtc, DRM_MODE_DPMS_ON);
+	struct drm_device *dev = crtc->dev;
+	struct drm_crtc *crtci;
+
+	/*
+	* Reenable the CRTCs that should be running.
+	*/
+	list_for_each_entry(crtci, &dev->mode_config.crtc_list, head) {
+		if (crtci->enabled)
+			radeon_crtc_dpms(crtci, DRM_MODE_DPMS_ON);
+	}
 }
 
 static const struct drm_crtc_helper_funcs legacy_helper_funcs = {
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_display.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_display.c
@@ -234,7 +234,7 @@
 	"INTERNAL_UNIPHY2",
 };
 
-static const char *connector_names[13] = {
+static const char *connector_names[15] = {
 	"Unknown",
 	"VGA",
 	"DVI-I",
@@ -248,6 +248,18 @@
 	"DisplayPort",
 	"HDMI-A",
 	"HDMI-B",
+	"TV",
+	"eDP",
+};
+
+static const char *hpd_names[7] = {
+	"NONE",
+	"HPD1",
+	"HPD2",
+	"HPD3",
+	"HPD4",
+	"HPD5",
+	"HPD6",
 };
 
 static void radeon_print_display_setup(struct drm_device *dev)
@@ -264,16 +276,27 @@
 		radeon_connector = to_radeon_connector(connector);
 		DRM_INFO("Connector %d:\n", i);
 		DRM_INFO("  %s\n", connector_names[connector->connector_type]);
-		if (radeon_connector->ddc_bus)
+		if (radeon_connector->hpd.hpd != RADEON_HPD_NONE)
+			DRM_INFO("  %s\n", hpd_names[radeon_connector->hpd.hpd]);
+		if (radeon_connector->ddc_bus) {
 			DRM_INFO("  DDC: 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n",
 				 radeon_connector->ddc_bus->rec.mask_clk_reg,
 				 radeon_connector->ddc_bus->rec.mask_data_reg,
 				 radeon_connector->ddc_bus->rec.a_clk_reg,
 				 radeon_connector->ddc_bus->rec.a_data_reg,
-				 radeon_connector->ddc_bus->rec.put_clk_reg,
-				 radeon_connector->ddc_bus->rec.put_data_reg,
-				 radeon_connector->ddc_bus->rec.get_clk_reg,
-				 radeon_connector->ddc_bus->rec.get_data_reg);
+				 radeon_connector->ddc_bus->rec.en_clk_reg,
+				 radeon_connector->ddc_bus->rec.en_data_reg,
+				 radeon_connector->ddc_bus->rec.y_clk_reg,
+				 radeon_connector->ddc_bus->rec.y_data_reg);
+		} else {
+			if (connector->connector_type == DRM_MODE_CONNECTOR_VGA ||
+			    connector->connector_type == DRM_MODE_CONNECTOR_DVII ||
+			    connector->connector_type == DRM_MODE_CONNECTOR_DVID ||
+			    connector->connector_type == DRM_MODE_CONNECTOR_DVIA ||
+			    connector->connector_type == DRM_MODE_CONNECTOR_HDMIA ||
+			    connector->connector_type == DRM_MODE_CONNECTOR_HDMIB)
+				DRM_INFO("  DDC: no ddc bus - possible BIOS bug - please report to xorg-driver-ati@lists.x.org\n");
+		}
 		DRM_INFO("  Encoders:\n");
 		list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
 			radeon_encoder = to_radeon_encoder(encoder);
@@ -317,13 +340,17 @@
 				ret = radeon_get_atom_connector_info_from_object_table(dev);
 			else
 				ret = radeon_get_atom_connector_info_from_supported_devices_table(dev);
-		} else
+		} else {
 			ret = radeon_get_legacy_connector_info_from_bios(dev);
+			if (ret == false)
+				ret = radeon_get_legacy_connector_info_from_table(dev);
+		}
 	} else {
 		if (!ASIC_IS_AVIVO(rdev))
 			ret = radeon_get_legacy_connector_info_from_table(dev);
 	}
 	if (ret) {
+		radeon_setup_encoder_clones(dev);
 		radeon_print_display_setup(dev);
 		list_for_each_entry(drm_connector, &dev->mode_config.connector_list, head)
 			radeon_ddc_dump(drm_connector);
@@ -336,12 +363,19 @@
 {
 	int ret = 0;
 
+	if ((radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_DisplayPort) ||
+	    (radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_eDP)) {
+		struct radeon_connector_atom_dig *dig = radeon_connector->con_priv;
+		if ((dig->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT ||
+		     dig->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) && dig->dp_i2c_bus)
+			radeon_connector->edid = drm_get_edid(&radeon_connector->base, &dig->dp_i2c_bus->adapter);
+	}
 	if (!radeon_connector->ddc_bus)
 		return -1;
 	if (!radeon_connector->edid) {
-		radeon_i2c_do_lock(radeon_connector, 1);
+		radeon_i2c_do_lock(radeon_connector->ddc_bus, 1);
 		radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
-		radeon_i2c_do_lock(radeon_connector, 0);
+		radeon_i2c_do_lock(radeon_connector->ddc_bus, 0);
 	}
 
 	if (radeon_connector->edid) {
@@ -361,9 +395,9 @@
 
 	if (!radeon_connector->ddc_bus)
 		return -1;
-	radeon_i2c_do_lock(radeon_connector, 1);
+	radeon_i2c_do_lock(radeon_connector->ddc_bus, 1);
 	edid = drm_get_edid(connector, &radeon_connector->ddc_bus->adapter);
-	radeon_i2c_do_lock(radeon_connector, 0);
+	radeon_i2c_do_lock(radeon_connector->ddc_bus, 0);
 	if (edid) {
 		kfree(edid);
 	}
@@ -380,17 +414,18 @@
 	return n;
 }
 
-void radeon_compute_pll(struct radeon_pll *pll,
-			uint64_t freq,
-			uint32_t *dot_clock_p,
-			uint32_t *fb_div_p,
-			uint32_t *frac_fb_div_p,
-			uint32_t *ref_div_p,
-			uint32_t *post_div_p,
-			int flags)
+static void radeon_compute_pll_legacy(struct radeon_pll *pll,
+				      uint64_t freq,
+				      uint32_t *dot_clock_p,
+				      uint32_t *fb_div_p,
+				      uint32_t *frac_fb_div_p,
+				      uint32_t *ref_div_p,
+				      uint32_t *post_div_p)
 {
 	uint32_t min_ref_div = pll->min_ref_div;
 	uint32_t max_ref_div = pll->max_ref_div;
+	uint32_t min_post_div = pll->min_post_div;
+	uint32_t max_post_div = pll->max_post_div;
 	uint32_t min_fractional_feed_div = 0;
 	uint32_t max_fractional_feed_div = 0;
 	uint32_t best_vco = pll->best_vco;
@@ -406,7 +441,7 @@
 	DRM_DEBUG("PLL freq %llu %u %u\n", freq, pll->min_ref_div, pll->max_ref_div);
 	freq = freq * 1000;
 
-	if (flags & RADEON_PLL_USE_REF_DIV)
+	if (pll->flags & RADEON_PLL_USE_REF_DIV)
 		min_ref_div = max_ref_div = pll->reference_div;
 	else {
 		while (min_ref_div < max_ref_div-1) {
@@ -421,19 +456,22 @@
 		}
 	}
 
-	if (flags & RADEON_PLL_USE_FRAC_FB_DIV) {
+	if (pll->flags & RADEON_PLL_USE_POST_DIV)
+		min_post_div = max_post_div = pll->post_div;
+
+	if (pll->flags & RADEON_PLL_USE_FRAC_FB_DIV) {
 		min_fractional_feed_div = pll->min_frac_feedback_div;
 		max_fractional_feed_div = pll->max_frac_feedback_div;
 	}
 
-	for (post_div = pll->min_post_div; post_div <= pll->max_post_div; ++post_div) {
+	for (post_div = min_post_div; post_div <= max_post_div; ++post_div) {
 		uint32_t ref_div;
 
-		if ((flags & RADEON_PLL_NO_ODD_POST_DIV) && (post_div & 1))
+		if ((pll->flags & RADEON_PLL_NO_ODD_POST_DIV) && (post_div & 1))
 			continue;
 
 		/* legacy radeons only have a few post_divs */
-		if (flags & RADEON_PLL_LEGACY) {
+		if (pll->flags & RADEON_PLL_LEGACY) {
 			if ((post_div == 5) ||
 			    (post_div == 7) ||
 			    (post_div == 9) ||
@@ -480,7 +518,7 @@
 					tmp += (uint64_t)pll->reference_freq * 1000 * frac_feedback_div;
 					current_freq = radeon_div(tmp, ref_div * post_div);
 
-					if (flags & RADEON_PLL_PREFER_CLOSEST_LOWER) {
+					if (pll->flags & RADEON_PLL_PREFER_CLOSEST_LOWER) {
 						error = freq - current_freq;
 						error = error < 0 ? 0xffffffff : error;
 					} else
@@ -507,12 +545,12 @@
 							best_freq = current_freq;
 							best_error = error;
 							best_vco_diff = vco_diff;
-						} else if (((flags & RADEON_PLL_PREFER_LOW_REF_DIV) && (ref_div < best_ref_div)) ||
-							   ((flags & RADEON_PLL_PREFER_HIGH_REF_DIV) && (ref_div > best_ref_div)) ||
-							   ((flags & RADEON_PLL_PREFER_LOW_FB_DIV) && (feedback_div < best_feedback_div)) ||
-							   ((flags & RADEON_PLL_PREFER_HIGH_FB_DIV) && (feedback_div > best_feedback_div)) ||
-							   ((flags & RADEON_PLL_PREFER_LOW_POST_DIV) && (post_div < best_post_div)) ||
-							   ((flags & RADEON_PLL_PREFER_HIGH_POST_DIV) && (post_div > best_post_div))) {
+						} else if (((pll->flags & RADEON_PLL_PREFER_LOW_REF_DIV) && (ref_div < best_ref_div)) ||
+							   ((pll->flags & RADEON_PLL_PREFER_HIGH_REF_DIV) && (ref_div > best_ref_div)) ||
+							   ((pll->flags & RADEON_PLL_PREFER_LOW_FB_DIV) && (feedback_div < best_feedback_div)) ||
+							   ((pll->flags & RADEON_PLL_PREFER_HIGH_FB_DIV) && (feedback_div > best_feedback_div)) ||
+							   ((pll->flags & RADEON_PLL_PREFER_LOW_POST_DIV) && (post_div < best_post_div)) ||
+							   ((pll->flags & RADEON_PLL_PREFER_HIGH_POST_DIV) && (post_div > best_post_div))) {
 							best_post_div = post_div;
 							best_ref_div = ref_div;
 							best_feedback_div = feedback_div;
@@ -540,6 +578,200 @@
 	*frac_fb_div_p = best_frac_feedback_div;
 	*ref_div_p = best_ref_div;
 	*post_div_p = best_post_div;
+	DRM_DEBUG_KMS("%d %d, pll dividers - fb: %d.%d ref: %d, post %d\n",
+		      freq, best_freq / 1000, best_feedback_div, best_frac_feedback_div,
+		      best_ref_div, best_post_div);
+
+}
+
+static bool
+calc_fb_div(struct radeon_pll *pll,
+	    uint32_t freq,
+            uint32_t post_div,
+            uint32_t ref_div,
+            uint32_t *fb_div,
+            uint32_t *fb_div_frac)
+{
+	fixed20_12 feedback_divider, a, b;
+	u32 vco_freq;
+
+	vco_freq = freq * post_div;
+	/* feedback_divider = vco_freq * ref_div / pll->reference_freq; */
+	a.full = rfixed_const(pll->reference_freq);
+	feedback_divider.full = rfixed_const(vco_freq);
+	feedback_divider.full = rfixed_div(feedback_divider, a);
+	a.full = rfixed_const(ref_div);
+	feedback_divider.full = rfixed_mul(feedback_divider, a);
+
+	if (pll->flags & RADEON_PLL_USE_FRAC_FB_DIV) {
+		/* feedback_divider = floor((feedback_divider * 10.0) + 0.5) * 0.1; */
+		a.full = rfixed_const(10);
+		feedback_divider.full = rfixed_mul(feedback_divider, a);
+		feedback_divider.full += rfixed_const_half(0);
+		feedback_divider.full = rfixed_floor(feedback_divider);
+		feedback_divider.full = rfixed_div(feedback_divider, a);
+
+		/* *fb_div = floor(feedback_divider); */
+		a.full = rfixed_floor(feedback_divider);
+		*fb_div = rfixed_trunc(a);
+		/* *fb_div_frac = fmod(feedback_divider, 1.0) * 10.0; */
+		a.full = rfixed_const(10);
+		b.full = rfixed_mul(feedback_divider, a);
+
+		feedback_divider.full = rfixed_floor(feedback_divider);
+		feedback_divider.full = rfixed_mul(feedback_divider, a);
+		feedback_divider.full = b.full - feedback_divider.full;
+		*fb_div_frac = rfixed_trunc(feedback_divider);
+	} else {
+		/* *fb_div = floor(feedback_divider + 0.5); */
+		feedback_divider.full += rfixed_const_half(0);
+		feedback_divider.full = rfixed_floor(feedback_divider);
+
+		*fb_div = rfixed_trunc(feedback_divider);
+		*fb_div_frac = 0;
+	}
+
+	if (((*fb_div) < pll->min_feedback_div) || ((*fb_div) > pll->max_feedback_div))
+		return false;
+	else
+		return true;
+}
+
+static bool
+calc_fb_ref_div(struct radeon_pll *pll,
+		uint32_t freq,
+		uint32_t post_div,
+		uint32_t *fb_div,
+                uint32_t *fb_div_frac,
+                uint32_t *ref_div)
+{
+	fixed20_12 ffreq, max_error, error, pll_out, a;
+	u32 vco;
+
+	ffreq.full = rfixed_const(freq);
+	/* max_error = ffreq * 0.0025; */
+	a.full = rfixed_const(400);
+	max_error.full = rfixed_div(ffreq, a);
+
+	for ((*ref_div) = pll->min_ref_div; (*ref_div) < pll->max_ref_div; ++(*ref_div)) {
+		if (calc_fb_div(pll, freq, post_div, (*ref_div), fb_div, fb_div_frac)) {
+			vco = pll->reference_freq * (((*fb_div) * 10) + (*fb_div_frac));
+			vco = vco / ((*ref_div) * 10);
+
+			if ((vco < pll->pll_out_min) || (vco > pll->pll_out_max))
+				continue;
+
+			/* pll_out = vco / post_div; */
+			a.full = rfixed_const(post_div);
+			pll_out.full = rfixed_const(vco);
+			pll_out.full = rfixed_div(pll_out, a);
+
+			if (pll_out.full >= ffreq.full) {
+				error.full = pll_out.full - ffreq.full;
+				if (error.full <= max_error.full)
+					return true;
+			}
+		}
+	}
+	return false;
+}
+
+static void radeon_compute_pll_new(struct radeon_pll *pll,
+				   uint64_t freq,
+				   uint32_t *dot_clock_p,
+				   uint32_t *fb_div_p,
+				   uint32_t *frac_fb_div_p,
+				   uint32_t *ref_div_p,
+				   uint32_t *post_div_p)
+{
+	u32 fb_div = 0, fb_div_frac = 0, post_div = 0, ref_div = 0;
+	u32 best_freq = 0, vco_frequency;
+
+	/* freq = freq / 10; */
+	do_div(freq, 10);
+
+	if (pll->flags & RADEON_PLL_USE_POST_DIV) {
+		post_div = pll->post_div;
+		if ((post_div < pll->min_post_div) || (post_div > pll->max_post_div))
+			goto done;
+
+		vco_frequency = freq * post_div;
+		if ((vco_frequency < pll->pll_out_min) || (vco_frequency > pll->pll_out_max))
+			goto done;
+
+		if (pll->flags & RADEON_PLL_USE_REF_DIV) {
+			ref_div = pll->reference_div;
+			if ((ref_div < pll->min_ref_div) || (ref_div > pll->max_ref_div))
+				goto done;
+			if (!calc_fb_div(pll, freq, post_div, ref_div, &fb_div, &fb_div_frac))
+				goto done;
+		}
+	} else {
+		for (post_div = pll->max_post_div; post_div >= pll->min_post_div; --post_div) {
+			if (pll->flags & RADEON_PLL_LEGACY) {
+				if ((post_div == 5) ||
+				    (post_div == 7) ||
+				    (post_div == 9) ||
+				    (post_div == 10) ||
+				    (post_div == 11))
+					continue;
+			}
+
+			if ((pll->flags & RADEON_PLL_NO_ODD_POST_DIV) && (post_div & 1))
+				continue;
+
+			vco_frequency = freq * post_div;
+			if ((vco_frequency < pll->pll_out_min) || (vco_frequency > pll->pll_out_max))
+				continue;
+			if (pll->flags & RADEON_PLL_USE_REF_DIV) {
+				ref_div = pll->reference_div;
+				if ((ref_div < pll->min_ref_div) || (ref_div > pll->max_ref_div))
+					goto done;
+				if (calc_fb_div(pll, freq, post_div, ref_div, &fb_div, &fb_div_frac))
+					break;
+			} else {
+				if (calc_fb_ref_div(pll, freq, post_div, &fb_div, &fb_div_frac, &ref_div))
+					break;
+			}
+		}
+	}
+
+	best_freq = pll->reference_freq * 10 * fb_div;
+	best_freq += pll->reference_freq * fb_div_frac;
+	best_freq = best_freq / (ref_div * post_div);
+
+done:
+	if (best_freq == 0)
+		DRM_ERROR("Couldn't find valid PLL dividers\n");
+
+	*dot_clock_p = best_freq / 10;
+	*fb_div_p = fb_div;
+	*frac_fb_div_p = fb_div_frac;
+	*ref_div_p = ref_div;
+	*post_div_p = post_div;
+
+	DRM_DEBUG("%u %d.%d, %d, %d\n", *dot_clock_p, *fb_div_p, *frac_fb_div_p, *ref_div_p, *post_div_p);
+}
+
+void radeon_compute_pll(struct radeon_pll *pll,
+			uint64_t freq,
+			uint32_t *dot_clock_p,
+			uint32_t *fb_div_p,
+			uint32_t *frac_fb_div_p,
+			uint32_t *ref_div_p,
+			uint32_t *post_div_p)
+{
+	switch (pll->algo) {
+	case PLL_ALGO_NEW:
+		radeon_compute_pll_new(pll, freq, dot_clock_p, fb_div_p,
+				       frac_fb_div_p, ref_div_p, post_div_p);
+		break;
+	case PLL_ALGO_LEGACY:
+	default:
+		radeon_compute_pll_legacy(pll, freq, dot_clock_p, fb_div_p,
+					  frac_fb_div_p, ref_div_p, post_div_p);
+		break;
+	}
 }
 
 static void radeon_user_framebuffer_destroy(struct drm_framebuffer *fb)
@@ -551,7 +783,6 @@
 		radeonfb_remove(dev, fb);
 
 	if (radeon_fb->obj) {
-		radeon_gem_object_unpin(radeon_fb->obj);
 		mutex_lock(&dev->struct_mutex);
 		drm_gem_object_unreference(radeon_fb->obj);
 		mutex_unlock(&dev->struct_mutex);
@@ -599,7 +830,11 @@
 	struct drm_gem_object *obj;
 
 	obj = drm_gem_object_lookup(dev, file_priv, mode_cmd->handle);
-
+	if (obj ==  NULL) {
+		dev_err(&dev->pdev->dev, "No GEM object associated to handle 0x%08X, "
+			"can't create framebuffer\n", mode_cmd->handle);
+		return NULL;
+	}
 	return radeon_framebuffer_create(dev, mode_cmd, obj);
 }
 
@@ -629,7 +864,7 @@
 	{ TV_STD_SECAM, "secam" },
 };
 
-int radeon_modeset_create_props(struct radeon_device *rdev)
+static int radeon_modeset_create_props(struct radeon_device *rdev)
 {
 	int i, sz;
 
@@ -642,7 +877,7 @@
 			return -ENOMEM;
 
 		rdev->mode_info.coherent_mode_property->values[0] = 0;
-		rdev->mode_info.coherent_mode_property->values[0] = 1;
+		rdev->mode_info.coherent_mode_property->values[1] = 1;
 	}
 
 	if (!ASIC_IS_AVIVO(rdev)) {
@@ -666,7 +901,7 @@
 	if (!rdev->mode_info.load_detect_property)
 		return -ENOMEM;
 	rdev->mode_info.load_detect_property->values[0] = 0;
-	rdev->mode_info.load_detect_property->values[0] = 1;
+	rdev->mode_info.load_detect_property->values[1] = 1;
 
 	drm_mode_create_scaling_mode_property(rdev->ddev);
 
@@ -723,6 +958,8 @@
 	if (!ret) {
 		return ret;
 	}
+	/* initialize hpd */
+	radeon_hpd_init(rdev);
 	drm_helper_initial_config(rdev->ddev);
 	return 0;
 }
@@ -730,6 +967,7 @@
 void radeon_modeset_fini(struct radeon_device *rdev)
 {
 	if (rdev->mode_info.mode_config_initialized) {
+		radeon_hpd_fini(rdev);
 		drm_mode_config_cleanup(rdev->ddev);
 		rdev->mode_info.mode_config_initialized = false;
 	}
@@ -750,9 +988,17 @@
 		if (encoder->crtc != crtc)
 			continue;
 		if (first) {
-			radeon_crtc->rmx_type = radeon_encoder->rmx_type;
+			/* set scaling */
+			if (radeon_encoder->rmx_type == RMX_OFF)
+				radeon_crtc->rmx_type = RMX_OFF;
+			else if (mode->hdisplay < radeon_encoder->native_mode.hdisplay ||
+				 mode->vdisplay < radeon_encoder->native_mode.vdisplay)
+				radeon_crtc->rmx_type = radeon_encoder->rmx_type;
+			else
+				radeon_crtc->rmx_type = RMX_OFF;
+			/* copy native mode */
 			memcpy(&radeon_crtc->native_mode,
-				&radeon_encoder->native_mode,
+			       &radeon_encoder->native_mode,
 				sizeof(struct drm_display_mode));
 			first = false;
 		} else {
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/rv770d.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/rv770d.h
@@ -128,6 +128,7 @@
 #define	HDP_NONSURFACE_SIZE				0x2C0C
 #define HDP_REG_COHERENCY_FLUSH_CNTL			0x54A0
 #define	HDP_TILING_CONFIG				0x2F3C
+#define HDP_DEBUG1                                      0x2F34
 
 #define MC_SHARED_CHMAP						0x2004
 #define		NOOFCHAN_SHIFT					12
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/r600_cs.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/r600_cs.c
@@ -36,6 +36,10 @@
 typedef int (*next_reloc_t)(struct radeon_cs_parser*, struct radeon_cs_reloc**);
 static next_reloc_t r600_cs_packet_next_reloc = &r600_cs_packet_next_reloc_mm;
 
+struct r600_cs_track {
+	u32	cb_color0_base_last;
+};
+
 /**
  * r600_cs_packet_parse() - parse cp packet and point ib index to next packet
  * @parser:	parser structure holding parsing context.
@@ -170,13 +174,35 @@
 			  idx, relocs_chunk->length_dw);
 		return -EINVAL;
 	}
-	*cs_reloc = &p->relocs[0];
+	*cs_reloc = p->relocs;
 	(*cs_reloc)->lobj.gpu_offset = (u64)relocs_chunk->kdata[idx + 3] << 32;
 	(*cs_reloc)->lobj.gpu_offset |= relocs_chunk->kdata[idx + 0];
 	return 0;
 }
 
 /**
+ * r600_cs_packet_next_is_pkt3_nop() - test if next packet is packet3 nop for reloc
+ * @parser:		parser structure holding parsing context.
+ *
+ * Check next packet is relocation packet3, do bo validation and compute
+ * GPU offset using the provided start.
+ **/
+static inline int r600_cs_packet_next_is_pkt3_nop(struct radeon_cs_parser *p)
+{
+	struct radeon_cs_packet p3reloc;
+	int r;
+
+	r = r600_cs_packet_parse(p, &p3reloc, p->idx);
+	if (r) {
+		return 0;
+	}
+	if (p3reloc.type != PACKET_TYPE3 || p3reloc.opcode != PACKET3_NOP) {
+		return 0;
+	}
+	return 1;
+}
+
+/**
  * r600_cs_packet_next_vline() - parse userspace VLINE packet
  * @parser:		parser structure holding parsing context.
  *
@@ -337,6 +363,7 @@
 				struct radeon_cs_packet *pkt)
 {
 	struct radeon_cs_reloc *reloc;
+	struct r600_cs_track *track;
 	volatile u32 *ib;
 	unsigned idx;
 	unsigned i;
@@ -344,6 +371,7 @@
 	int r;
 	u32 idx_value;
 
+	track = (struct r600_cs_track *)p->track;
 	ib = p->ib->ptr;
 	idx = pkt->idx + 1;
 	idx_value = radeon_get_ib_value(p, idx);
@@ -503,9 +531,60 @@
 		for (i = 0; i < pkt->count; i++) {
 			reg = start_reg + (4 * i);
 			switch (reg) {
+			/* This register were added late, there is userspace
+			 * which does provide relocation for those but set
+			 * 0 offset. In order to avoid breaking old userspace
+			 * we detect this and set address to point to last
+			 * CB_COLOR0_BASE, note that if userspace doesn't set
+			 * CB_COLOR0_BASE before this register we will report
+			 * error. Old userspace always set CB_COLOR0_BASE
+			 * before any of this.
+			 */
+			case R_0280E0_CB_COLOR0_FRAG:
+			case R_0280E4_CB_COLOR1_FRAG:
+			case R_0280E8_CB_COLOR2_FRAG:
+			case R_0280EC_CB_COLOR3_FRAG:
+			case R_0280F0_CB_COLOR4_FRAG:
+			case R_0280F4_CB_COLOR5_FRAG:
+			case R_0280F8_CB_COLOR6_FRAG:
+			case R_0280FC_CB_COLOR7_FRAG:
+			case R_0280C0_CB_COLOR0_TILE:
+			case R_0280C4_CB_COLOR1_TILE:
+			case R_0280C8_CB_COLOR2_TILE:
+			case R_0280CC_CB_COLOR3_TILE:
+			case R_0280D0_CB_COLOR4_TILE:
+			case R_0280D4_CB_COLOR5_TILE:
+			case R_0280D8_CB_COLOR6_TILE:
+			case R_0280DC_CB_COLOR7_TILE:
+				if (!r600_cs_packet_next_is_pkt3_nop(p)) {
+					if (!track->cb_color0_base_last) {
+						dev_err(p->dev, "Broken old userspace ? no cb_color0_base supplied before trying to write 0x%08X\n", reg);
+						return -EINVAL;
+					}
+					ib[idx+1+i] = track->cb_color0_base_last;
+					printk_once(KERN_WARNING "radeon: You have old & broken userspace "
+						"please consider updating mesa & xf86-video-ati\n");
+				} else {
+					r = r600_cs_packet_next_reloc(p, &reloc);
+					if (r) {
+						dev_err(p->dev, "bad SET_CONTEXT_REG 0x%04X\n", reg);
+						return -EINVAL;
+					}
+					ib[idx+1+i] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff);
+				}
+				break;
 			case DB_DEPTH_BASE:
 			case DB_HTILE_DATA_BASE:
 			case CB_COLOR0_BASE:
+				r = r600_cs_packet_next_reloc(p, &reloc);
+				if (r) {
+					DRM_ERROR("bad SET_CONTEXT_REG "
+							"0x%04X\n", reg);
+					return -EINVAL;
+				}
+				ib[idx+1+i] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff);
+				track->cb_color0_base_last = ib[idx+1+i];
+				break;
 			case CB_COLOR1_BASE:
 			case CB_COLOR2_BASE:
 			case CB_COLOR3_BASE:
@@ -678,8 +757,11 @@
 int r600_cs_parse(struct radeon_cs_parser *p)
 {
 	struct radeon_cs_packet pkt;
+	struct r600_cs_track *track;
 	int r;
 
+	track = kzalloc(sizeof(*track), GFP_KERNEL);
+	p->track = track;
 	do {
 		r = r600_cs_packet_parse(p, &pkt, p->idx);
 		if (r) {
@@ -717,7 +799,7 @@
 	if (p->chunk_relocs_idx == -1) {
 		return 0;
 	}
-	p->relocs = kcalloc(1, sizeof(struct radeon_cs_reloc), GFP_KERNEL);
+	p->relocs = kzalloc(sizeof(struct radeon_cs_reloc), GFP_KERNEL);
 	if (p->relocs == NULL) {
 		return -ENOMEM;
 	}
@@ -757,6 +839,7 @@
 	/* initialize parser */
 	memset(&parser, 0, sizeof(struct radeon_cs_parser));
 	parser.filp = filp;
+	parser.dev = &dev->pdev->dev;
 	parser.rdev = NULL;
 	parser.family = family;
 	parser.ib = &fake_ib;
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_mode.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_mode.h
@@ -33,6 +33,7 @@
 #include <drm_crtc.h>
 #include <drm_mode.h>
 #include <drm_edid.h>
+#include <drm_dp_helper.h>
 #include <linux/i2c.h>
 #include <linux/i2c-id.h>
 #include <linux/i2c-algo-bit.h>
@@ -45,32 +46,6 @@
 #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
 #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base)
 
-enum radeon_connector_type {
-	CONNECTOR_NONE,
-	CONNECTOR_VGA,
-	CONNECTOR_DVI_I,
-	CONNECTOR_DVI_D,
-	CONNECTOR_DVI_A,
-	CONNECTOR_STV,
-	CONNECTOR_CTV,
-	CONNECTOR_LVDS,
-	CONNECTOR_DIGITAL,
-	CONNECTOR_SCART,
-	CONNECTOR_HDMI_TYPE_A,
-	CONNECTOR_HDMI_TYPE_B,
-	CONNECTOR_0XC,
-	CONNECTOR_0XD,
-	CONNECTOR_DIN,
-	CONNECTOR_DISPLAY_PORT,
-	CONNECTOR_UNSUPPORTED
-};
-
-enum radeon_dvi_type {
-	DVI_AUTO,
-	DVI_DIGITAL,
-	DVI_ANALOG
-};
-
 enum radeon_rmx_type {
 	RMX_OFF,
 	RMX_FULL,
@@ -87,26 +62,48 @@
 	TV_STD_SCART_PAL,
 	TV_STD_SECAM,
 	TV_STD_PAL_CN,
+	TV_STD_PAL_N,
 };
 
+/* radeon gpio-based i2c
+ * 1. "mask" reg and bits
+ *    grabs the gpio pins for software use
+ *    0=not held  1=held
+ * 2. "a" reg and bits
+ *    output pin value
+ *    0=low 1=high
+ * 3. "en" reg and bits
+ *    sets the pin direction
+ *    0=input 1=output
+ * 4. "y" reg and bits
+ *    input pin value
+ *    0=low 1=high
+ */
 struct radeon_i2c_bus_rec {
 	bool valid;
+	/* id used by atom */
+	uint8_t i2c_id;
+	/* can be used with hw i2c engine */
+	bool hw_capable;
+	/* uses multi-media i2c engine */
+	bool mm_i2c;
+	/* regs and bits */
 	uint32_t mask_clk_reg;
 	uint32_t mask_data_reg;
 	uint32_t a_clk_reg;
 	uint32_t a_data_reg;
-	uint32_t put_clk_reg;
-	uint32_t put_data_reg;
-	uint32_t get_clk_reg;
-	uint32_t get_data_reg;
+	uint32_t en_clk_reg;
+	uint32_t en_data_reg;
+	uint32_t y_clk_reg;
+	uint32_t y_data_reg;
 	uint32_t mask_clk_mask;
 	uint32_t mask_data_mask;
-	uint32_t put_clk_mask;
-	uint32_t put_data_mask;
-	uint32_t get_clk_mask;
-	uint32_t get_data_mask;
 	uint32_t a_clk_mask;
 	uint32_t a_data_mask;
+	uint32_t en_clk_mask;
+	uint32_t en_data_mask;
+	uint32_t y_clk_mask;
+	uint32_t y_data_mask;
 };
 
 struct radeon_tmds_pll {
@@ -116,6 +113,7 @@
 
 #define RADEON_MAX_BIOS_CONNECTOR 16
 
+/* pll flags */
 #define RADEON_PLL_USE_BIOS_DIVS        (1 << 0)
 #define RADEON_PLL_NO_ODD_POST_DIV      (1 << 1)
 #define RADEON_PLL_USE_REF_DIV          (1 << 2)
@@ -128,16 +126,30 @@
 #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
 #define RADEON_PLL_USE_FRAC_FB_DIV      (1 << 10)
 #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
+#define RADEON_PLL_USE_POST_DIV         (1 << 12)
+
+/* pll algo */
+enum radeon_pll_algo {
+	PLL_ALGO_LEGACY,
+	PLL_ALGO_NEW
+};
 
 struct radeon_pll {
-	uint16_t reference_freq;
-	uint16_t reference_div;
+	/* reference frequency */
+	uint32_t reference_freq;
+
+	/* fixed dividers */
+	uint32_t reference_div;
+	uint32_t post_div;
+
+	/* pll in/out limits */
 	uint32_t pll_in_min;
 	uint32_t pll_in_max;
 	uint32_t pll_out_min;
 	uint32_t pll_out_max;
-	uint16_t xclk;
+	uint32_t best_vco;
 
+	/* divider limits */
 	uint32_t min_ref_div;
 	uint32_t max_ref_div;
 	uint32_t min_post_div;
@@ -146,13 +158,23 @@
 	uint32_t max_feedback_div;
 	uint32_t min_frac_feedback_div;
 	uint32_t max_frac_feedback_div;
-	uint32_t best_vco;
+
+	/* flags for the current clock */
+	uint32_t flags;
+
+	/* pll id */
+	uint32_t id;
+	/* pll algo */
+	enum radeon_pll_algo algo;
 };
 
 struct radeon_i2c_chan {
-	struct drm_device *dev;
 	struct i2c_adapter adapter;
-	struct i2c_algo_bit_data algo;
+	struct drm_device *dev;
+	union {
+		struct i2c_algo_dp_aux_data dp;
+		struct i2c_algo_bit_data bit;
+	} algo;
 	struct radeon_i2c_bus_rec rec;
 };
 
@@ -170,6 +192,11 @@
 	CT_EMAC,
 };
 
+enum radeon_dvo_chip {
+	DVO_SIL164,
+	DVO_SIL1178,
+};
+
 struct radeon_mode_info {
 	struct atom_context *atom_context;
 	struct card_info *atom_card_info;
@@ -261,6 +288,13 @@
 	struct radeon_tmds_pll tmds_pll[4];
 };
 
+struct radeon_encoder_ext_tmds {
+	/* tmds over dvo */
+	struct radeon_i2c_chan *i2c_bus;
+	uint8_t slave_addr;
+	enum radeon_dvo_chip dvo_chip;
+};
+
 /* spread spectrum */
 struct radeon_atom_ss {
 	uint16_t percentage;
@@ -274,10 +308,11 @@
 struct radeon_encoder_atom_dig {
 	/* atom dig */
 	bool coherent_mode;
-	int dig_block;
+	int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB */
 	/* atom lvds */
 	uint32_t lvds_misc;
 	uint16_t panel_pwr_delay;
+	enum radeon_pll_algo pll_algo;
 	struct radeon_atom_ss *ss;
 	/* panel mode */
 	struct drm_display_mode native_mode;
@@ -297,11 +332,43 @@
 	enum radeon_rmx_type rmx_type;
 	struct drm_display_mode native_mode;
 	void *enc_priv;
+	int hdmi_offset;
+	int hdmi_audio_workaround;
+	int hdmi_buffer_status;
 };
 
 struct radeon_connector_atom_dig {
 	uint32_t igp_lane_info;
 	bool linkb;
+	/* displayport */
+	struct radeon_i2c_chan *dp_i2c_bus;
+	u8 dpcd[8];
+	u8 dp_sink_type;
+	int dp_clock;
+	int dp_lane_count;
+};
+
+struct radeon_gpio_rec {
+	bool valid;
+	u8 id;
+	u32 reg;
+	u32 mask;
+};
+
+enum radeon_hpd_id {
+	RADEON_HPD_NONE = 0,
+	RADEON_HPD_1,
+	RADEON_HPD_2,
+	RADEON_HPD_3,
+	RADEON_HPD_4,
+	RADEON_HPD_5,
+	RADEON_HPD_6,
+};
+
+struct radeon_hpd {
+	enum radeon_hpd_id hpd;
+	u8 plugged_state;
+	struct radeon_gpio_rec gpio;
 };
 
 struct radeon_connector {
@@ -318,6 +385,7 @@
 	void *con_priv;
 	bool dac_load_detect;
 	uint16_t connector_object_id;
+	struct radeon_hpd hpd;
 };
 
 struct radeon_framebuffer {
@@ -325,10 +393,42 @@
 	struct drm_gem_object *obj;
 };
 
+extern enum radeon_tv_std
+radeon_combios_get_tv_info(struct radeon_device *rdev);
+extern enum radeon_tv_std
+radeon_atombios_get_tv_info(struct radeon_device *rdev);
+
+extern void radeon_connector_hotplug(struct drm_connector *connector);
+extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector);
+extern int radeon_dp_mode_valid_helper(struct radeon_connector *radeon_connector,
+				       struct drm_display_mode *mode);
+extern void radeon_dp_set_link_config(struct drm_connector *connector,
+				      struct drm_display_mode *mode);
+extern void dp_link_train(struct drm_encoder *encoder,
+			  struct drm_connector *connector);
+extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector);
+extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector);
+extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder,
+					   int action, uint8_t lane_num,
+					   uint8_t lane_set);
+extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
+				uint8_t write_byte, uint8_t *read_byte);
+
+extern struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev,
+						    struct radeon_i2c_bus_rec *rec,
+						    const char *name);
 extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
 						 struct radeon_i2c_bus_rec *rec,
 						 const char *name);
 extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c);
+extern void radeon_i2c_sw_get_byte(struct radeon_i2c_chan *i2c_bus,
+				   u8 slave_addr,
+				   u8 addr,
+				   u8 *val);
+extern void radeon_i2c_sw_put_byte(struct radeon_i2c_chan *i2c,
+				   u8 slave_addr,
+				   u8 addr,
+				   u8 val);
 extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector);
 extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector);
 
@@ -340,8 +440,9 @@
 			       uint32_t *fb_div_p,
 			       uint32_t *frac_fb_div_p,
 			       uint32_t *ref_div_p,
-			       uint32_t *post_div_p,
-			       int flags);
+			       uint32_t *post_div_p);
+
+extern void radeon_setup_encoder_clones(struct drm_device *dev);
 
 struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index);
 struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv);
@@ -349,6 +450,7 @@
 struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index);
 struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
 extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action);
+extern void atombios_digital_setup(struct drm_encoder *encoder, int action);
 extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
 extern void radeon_encoder_set_active_device(struct drm_encoder *encoder);
 
@@ -364,7 +466,6 @@
 
 extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
 				 struct drm_framebuffer *old_fb);
-extern void radeon_legacy_atom_set_surface(struct drm_crtc *crtc);
 
 extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
 				  struct drm_file *file_priv,
@@ -378,12 +479,16 @@
 extern bool radeon_combios_get_clock_info(struct drm_device *dev);
 extern struct radeon_encoder_atom_dig *
 radeon_atombios_get_lvds_info(struct radeon_encoder *encoder);
-bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
-				   struct radeon_encoder_int_tmds *tmds);
-bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
-					   struct radeon_encoder_int_tmds *tmds);
-bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder,
-					    struct radeon_encoder_int_tmds *tmds);
+extern bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
+					  struct radeon_encoder_int_tmds *tmds);
+extern bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
+						     struct radeon_encoder_int_tmds *tmds);
+extern bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder,
+						   struct radeon_encoder_int_tmds *tmds);
+extern bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder,
+							 struct radeon_encoder_ext_tmds *tmds);
+extern bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder,
+						       struct radeon_encoder_ext_tmds *tmds);
 extern struct radeon_encoder_primary_dac *
 radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder);
 extern struct radeon_encoder_tv_dac *
@@ -395,6 +500,8 @@
 radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder);
 extern struct radeon_encoder_primary_dac *
 radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder);
+extern bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder);
+extern void radeon_external_tmds_setup(struct drm_encoder *encoder);
 extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
 extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
 extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
@@ -426,16 +533,13 @@
 			       struct radeon_crtc *radeon_crtc);
 void radeon_legacy_init_crtc(struct drm_device *dev,
 			     struct radeon_crtc *radeon_crtc);
-void radeon_i2c_do_lock(struct radeon_connector *radeon_connector, int lock_state);
+extern void radeon_i2c_do_lock(struct radeon_i2c_chan *i2c, int lock_state);
 
 void radeon_get_clock_info(struct drm_device *dev);
 
 extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev);
 extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev);
 
-void radeon_rmx_mode_fixup(struct drm_encoder *encoder,
-			   struct drm_display_mode *mode,
-			   struct drm_display_mode *adjusted_mode);
 void radeon_enc_destroy(struct drm_encoder *encoder);
 void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj);
 void radeon_combios_asic_init(struct drm_device *dev);
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/Kconfig
@@ -1,10 +1,14 @@
 config DRM_RADEON_KMS
-	bool "Enable modesetting on radeon by default"
+	bool "Enable modesetting on radeon by default - NEW DRIVER"
 	depends on DRM_RADEON
 	help
-	  Choose this option if you want kernel modesetting enabled by default,
-	  and you have a new enough userspace to support this. Running old
-	  userspaces with this enabled will cause pain.
+	  Choose this option if you want kernel modesetting enabled by default.
+
+	  This is a completely new driver. It's only part of the existing drm
+	  for compatibility reasons. It requires an entirely different graphics
+	  stack above it and works very differently from the old drm stack.
+	  i.e. don't enable this unless you know what you are doing it may
+	  cause issues or bugs compared to the previous userspace driver stack.
 
 	  When kernel modesetting is enabled the IOCTL of radeon/drm
 	  driver are considered as invalid and an error message is printed
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/r600.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/r600.c
@@ -38,8 +38,10 @@
 
 #define PFP_UCODE_SIZE 576
 #define PM4_UCODE_SIZE 1792
+#define RLC_UCODE_SIZE 768
 #define R700_PFP_UCODE_SIZE 848
 #define R700_PM4_UCODE_SIZE 1360
+#define R700_RLC_UCODE_SIZE 1024
 
 /* Firmware Names */
 MODULE_FIRMWARE("radeon/R600_pfp.bin");
@@ -62,6 +64,8 @@
 MODULE_FIRMWARE("radeon/RV730_me.bin");
 MODULE_FIRMWARE("radeon/RV710_pfp.bin");
 MODULE_FIRMWARE("radeon/RV710_me.bin");
+MODULE_FIRMWARE("radeon/R600_rlc.bin");
+MODULE_FIRMWARE("radeon/R700_rlc.bin");
 
 int r600_debugfs_mc_info_init(struct radeon_device *rdev);
 
@@ -70,6 +74,282 @@
 void r600_gpu_init(struct radeon_device *rdev);
 void r600_fini(struct radeon_device *rdev);
 
+/* hpd for digital panel detect/disconnect */
+bool r600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd)
+{
+	bool connected = false;
+
+	if (ASIC_IS_DCE3(rdev)) {
+		switch (hpd) {
+		case RADEON_HPD_1:
+			if (RREG32(DC_HPD1_INT_STATUS) & DC_HPDx_SENSE)
+				connected = true;
+			break;
+		case RADEON_HPD_2:
+			if (RREG32(DC_HPD2_INT_STATUS) & DC_HPDx_SENSE)
+				connected = true;
+			break;
+		case RADEON_HPD_3:
+			if (RREG32(DC_HPD3_INT_STATUS) & DC_HPDx_SENSE)
+				connected = true;
+			break;
+		case RADEON_HPD_4:
+			if (RREG32(DC_HPD4_INT_STATUS) & DC_HPDx_SENSE)
+				connected = true;
+			break;
+			/* DCE 3.2 */
+		case RADEON_HPD_5:
+			if (RREG32(DC_HPD5_INT_STATUS) & DC_HPDx_SENSE)
+				connected = true;
+			break;
+		case RADEON_HPD_6:
+			if (RREG32(DC_HPD6_INT_STATUS) & DC_HPDx_SENSE)
+				connected = true;
+			break;
+		default:
+			break;
+		}
+	} else {
+		switch (hpd) {
+		case RADEON_HPD_1:
+			if (RREG32(DC_HOT_PLUG_DETECT1_INT_STATUS) & DC_HOT_PLUG_DETECTx_SENSE)
+				connected = true;
+			break;
+		case RADEON_HPD_2:
+			if (RREG32(DC_HOT_PLUG_DETECT2_INT_STATUS) & DC_HOT_PLUG_DETECTx_SENSE)
+				connected = true;
+			break;
+		case RADEON_HPD_3:
+			if (RREG32(DC_HOT_PLUG_DETECT3_INT_STATUS) & DC_HOT_PLUG_DETECTx_SENSE)
+				connected = true;
+			break;
+		default:
+			break;
+		}
+	}
+	return connected;
+}
+
+void r600_hpd_set_polarity(struct radeon_device *rdev,
+			   enum radeon_hpd_id hpd)
+{
+	u32 tmp;
+	bool connected = r600_hpd_sense(rdev, hpd);
+
+	if (ASIC_IS_DCE3(rdev)) {
+		switch (hpd) {
+		case RADEON_HPD_1:
+			tmp = RREG32(DC_HPD1_INT_CONTROL);
+			if (connected)
+				tmp &= ~DC_HPDx_INT_POLARITY;
+			else
+				tmp |= DC_HPDx_INT_POLARITY;
+			WREG32(DC_HPD1_INT_CONTROL, tmp);
+			break;
+		case RADEON_HPD_2:
+			tmp = RREG32(DC_HPD2_INT_CONTROL);
+			if (connected)
+				tmp &= ~DC_HPDx_INT_POLARITY;
+			else
+				tmp |= DC_HPDx_INT_POLARITY;
+			WREG32(DC_HPD2_INT_CONTROL, tmp);
+			break;
+		case RADEON_HPD_3:
+			tmp = RREG32(DC_HPD3_INT_CONTROL);
+			if (connected)
+				tmp &= ~DC_HPDx_INT_POLARITY;
+			else
+				tmp |= DC_HPDx_INT_POLARITY;
+			WREG32(DC_HPD3_INT_CONTROL, tmp);
+			break;
+		case RADEON_HPD_4:
+			tmp = RREG32(DC_HPD4_INT_CONTROL);
+			if (connected)
+				tmp &= ~DC_HPDx_INT_POLARITY;
+			else
+				tmp |= DC_HPDx_INT_POLARITY;
+			WREG32(DC_HPD4_INT_CONTROL, tmp);
+			break;
+		case RADEON_HPD_5:
+			tmp = RREG32(DC_HPD5_INT_CONTROL);
+			if (connected)
+				tmp &= ~DC_HPDx_INT_POLARITY;
+			else
+				tmp |= DC_HPDx_INT_POLARITY;
+			WREG32(DC_HPD5_INT_CONTROL, tmp);
+			break;
+			/* DCE 3.2 */
+		case RADEON_HPD_6:
+			tmp = RREG32(DC_HPD6_INT_CONTROL);
+			if (connected)
+				tmp &= ~DC_HPDx_INT_POLARITY;
+			else
+				tmp |= DC_HPDx_INT_POLARITY;
+			WREG32(DC_HPD6_INT_CONTROL, tmp);
+			break;
+		default:
+			break;
+		}
+	} else {
+		switch (hpd) {
+		case RADEON_HPD_1:
+			tmp = RREG32(DC_HOT_PLUG_DETECT1_INT_CONTROL);
+			if (connected)
+				tmp &= ~DC_HOT_PLUG_DETECTx_INT_POLARITY;
+			else
+				tmp |= DC_HOT_PLUG_DETECTx_INT_POLARITY;
+			WREG32(DC_HOT_PLUG_DETECT1_INT_CONTROL, tmp);
+			break;
+		case RADEON_HPD_2:
+			tmp = RREG32(DC_HOT_PLUG_DETECT2_INT_CONTROL);
+			if (connected)
+				tmp &= ~DC_HOT_PLUG_DETECTx_INT_POLARITY;
+			else
+				tmp |= DC_HOT_PLUG_DETECTx_INT_POLARITY;
+			WREG32(DC_HOT_PLUG_DETECT2_INT_CONTROL, tmp);
+			break;
+		case RADEON_HPD_3:
+			tmp = RREG32(DC_HOT_PLUG_DETECT3_INT_CONTROL);
+			if (connected)
+				tmp &= ~DC_HOT_PLUG_DETECTx_INT_POLARITY;
+			else
+				tmp |= DC_HOT_PLUG_DETECTx_INT_POLARITY;
+			WREG32(DC_HOT_PLUG_DETECT3_INT_CONTROL, tmp);
+			break;
+		default:
+			break;
+		}
+	}
+}
+
+void r600_hpd_init(struct radeon_device *rdev)
+{
+	struct drm_device *dev = rdev->ddev;
+	struct drm_connector *connector;
+
+	if (ASIC_IS_DCE3(rdev)) {
+		u32 tmp = DC_HPDx_CONNECTION_TIMER(0x9c4) | DC_HPDx_RX_INT_TIMER(0xfa);
+		if (ASIC_IS_DCE32(rdev))
+			tmp |= DC_HPDx_EN;
+
+		list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
+			struct radeon_connector *radeon_connector = to_radeon_connector(connector);
+			switch (radeon_connector->hpd.hpd) {
+			case RADEON_HPD_1:
+				WREG32(DC_HPD1_CONTROL, tmp);
+				rdev->irq.hpd[0] = true;
+				break;
+			case RADEON_HPD_2:
+				WREG32(DC_HPD2_CONTROL, tmp);
+				rdev->irq.hpd[1] = true;
+				break;
+			case RADEON_HPD_3:
+				WREG32(DC_HPD3_CONTROL, tmp);
+				rdev->irq.hpd[2] = true;
+				break;
+			case RADEON_HPD_4:
+				WREG32(DC_HPD4_CONTROL, tmp);
+				rdev->irq.hpd[3] = true;
+				break;
+				/* DCE 3.2 */
+			case RADEON_HPD_5:
+				WREG32(DC_HPD5_CONTROL, tmp);
+				rdev->irq.hpd[4] = true;
+				break;
+			case RADEON_HPD_6:
+				WREG32(DC_HPD6_CONTROL, tmp);
+				rdev->irq.hpd[5] = true;
+				break;
+			default:
+				break;
+			}
+		}
+	} else {
+		list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
+			struct radeon_connector *radeon_connector = to_radeon_connector(connector);
+			switch (radeon_connector->hpd.hpd) {
+			case RADEON_HPD_1:
+				WREG32(DC_HOT_PLUG_DETECT1_CONTROL, DC_HOT_PLUG_DETECTx_EN);
+				rdev->irq.hpd[0] = true;
+				break;
+			case RADEON_HPD_2:
+				WREG32(DC_HOT_PLUG_DETECT2_CONTROL, DC_HOT_PLUG_DETECTx_EN);
+				rdev->irq.hpd[1] = true;
+				break;
+			case RADEON_HPD_3:
+				WREG32(DC_HOT_PLUG_DETECT3_CONTROL, DC_HOT_PLUG_DETECTx_EN);
+				rdev->irq.hpd[2] = true;
+				break;
+			default:
+				break;
+			}
+		}
+	}
+	if (rdev->irq.installed)
+		r600_irq_set(rdev);
+}
+
+void r600_hpd_fini(struct radeon_device *rdev)
+{
+	struct drm_device *dev = rdev->ddev;
+	struct drm_connector *connector;
+
+	if (ASIC_IS_DCE3(rdev)) {
+		list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
+			struct radeon_connector *radeon_connector = to_radeon_connector(connector);
+			switch (radeon_connector->hpd.hpd) {
+			case RADEON_HPD_1:
+				WREG32(DC_HPD1_CONTROL, 0);
+				rdev->irq.hpd[0] = false;
+				break;
+			case RADEON_HPD_2:
+				WREG32(DC_HPD2_CONTROL, 0);
+				rdev->irq.hpd[1] = false;
+				break;
+			case RADEON_HPD_3:
+				WREG32(DC_HPD3_CONTROL, 0);
+				rdev->irq.hpd[2] = false;
+				break;
+			case RADEON_HPD_4:
+				WREG32(DC_HPD4_CONTROL, 0);
+				rdev->irq.hpd[3] = false;
+				break;
+				/* DCE 3.2 */
+			case RADEON_HPD_5:
+				WREG32(DC_HPD5_CONTROL, 0);
+				rdev->irq.hpd[4] = false;
+				break;
+			case RADEON_HPD_6:
+				WREG32(DC_HPD6_CONTROL, 0);
+				rdev->irq.hpd[5] = false;
+				break;
+			default:
+				break;
+			}
+		}
+	} else {
+		list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
+			struct radeon_connector *radeon_connector = to_radeon_connector(connector);
+			switch (radeon_connector->hpd.hpd) {
+			case RADEON_HPD_1:
+				WREG32(DC_HOT_PLUG_DETECT1_CONTROL, 0);
+				rdev->irq.hpd[0] = false;
+				break;
+			case RADEON_HPD_2:
+				WREG32(DC_HOT_PLUG_DETECT2_CONTROL, 0);
+				rdev->irq.hpd[1] = false;
+				break;
+			case RADEON_HPD_3:
+				WREG32(DC_HOT_PLUG_DETECT3_CONTROL, 0);
+				rdev->irq.hpd[2] = false;
+				break;
+			default:
+				break;
+			}
+		}
+	}
+}
+
 /*
  * R600 PCIE GART
  */
@@ -90,6 +370,22 @@
 	unsigned i;
 	u32 tmp;
 
+	/* flush hdp cache so updates hit vram */
+	if ((rdev->family >= CHIP_RV770) && (rdev->family <= CHIP_RV740) &&
+	    !(rdev->flags & RADEON_IS_AGP)) {
+		void __iomem *ptr = (void *)rdev->gart.table.vram.ptr;
+		u32 tmp;
+
+		/* r7xx hw bug.  write to HDP_DEBUG1 followed by fb read
+		 * rather than write to HDP_REG_COHERENCY_FLUSH_CNTL
+		 * This seems to cause problems on some AGP cards. Just use the old
+		 * method for them.
+		 */
+		WREG32(HDP_DEBUG1, 0);
+		tmp = readl((void __iomem *)ptr);
+	} else
+		WREG32(R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL, 0x1);
+
 	WREG32(VM_CONTEXT0_INVALIDATION_LOW_ADDR, rdev->mc.gtt_start >> 12);
 	WREG32(VM_CONTEXT0_INVALIDATION_HIGH_ADDR, (rdev->mc.gtt_end - 1) >> 12);
 	WREG32(VM_CONTEXT0_REQUEST_RESPONSE, REQUEST_TYPE(1));
@@ -180,7 +476,7 @@
 void r600_pcie_gart_disable(struct radeon_device *rdev)
 {
 	u32 tmp;
-	int i;
+	int i, r;
 
 	/* Disable all tables */
 	for (i = 0; i < 7; i++)
@@ -208,8 +504,12 @@
 	WREG32(MC_VM_L1_TLB_MCB_RD_HDP_CNTL, tmp);
 	WREG32(MC_VM_L1_TLB_MCB_WR_HDP_CNTL, tmp);
 	if (rdev->gart.table.vram.robj) {
-		radeon_object_kunmap(rdev->gart.table.vram.robj);
-		radeon_object_unpin(rdev->gart.table.vram.robj);
+		r = radeon_bo_reserve(rdev->gart.table.vram.robj, false);
+		if (likely(r == 0)) {
+			radeon_bo_kunmap(rdev->gart.table.vram.robj);
+			radeon_bo_unpin(rdev->gart.table.vram.robj);
+			radeon_bo_unreserve(rdev->gart.table.vram.robj);
+		}
 	}
 }
 
@@ -340,7 +640,6 @@
 	fixed20_12 a;
 	u32 tmp;
 	int chansize, numchan;
-	int r;
 
 	/* Get VRAM informations */
 	rdev->mc.vram_is_ddr = true;
@@ -383,9 +682,6 @@
 		rdev->mc.real_vram_size = rdev->mc.aper_size;
 
 	if (rdev->flags & RADEON_IS_AGP) {
-		r = radeon_agp_init(rdev);
-		if (r)
-			return r;
 		/* gtt_size is setup by radeon_agp_init */
 		rdev->mc.gtt_location = rdev->mc.agp_base;
 		tmp = 0xFFFFFFFFUL - rdev->mc.agp_base - rdev->mc.gtt_size;
@@ -394,11 +690,11 @@
 		 * AGP so that GPU can catch out of VRAM/AGP access
 		 */
 		if (rdev->mc.gtt_location > rdev->mc.mc_vram_size) {
-			/* Enought place before */
+			/* Enough place before */
 			rdev->mc.vram_location = rdev->mc.gtt_location -
 							rdev->mc.mc_vram_size;
 		} else if (tmp > rdev->mc.mc_vram_size) {
-			/* Enought place after */
+			/* Enough place after */
 			rdev->mc.vram_location = rdev->mc.gtt_location +
 							rdev->mc.gtt_size;
 		} else {
@@ -443,6 +739,10 @@
 	a.full = rfixed_const(100);
 	rdev->pm.sclk.full = rfixed_const(rdev->clock.default_sclk);
 	rdev->pm.sclk.full = rfixed_div(rdev->pm.sclk, a);
+
+	if (rdev->flags & RADEON_IS_IGP)
+		rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);
+
 	return 0;
 }
 
@@ -1101,7 +1401,6 @@
 	(void)RREG32(PCIE_PORT_DATA);
 }
 
-
 /*
  * CP & Ring
  */
@@ -1110,11 +1409,12 @@
 	WREG32(R_0086D8_CP_ME_CNTL, S_0086D8_CP_ME_HALT(1));
 }
 
-int r600_cp_init_microcode(struct radeon_device *rdev)
+int r600_init_microcode(struct radeon_device *rdev)
 {
 	struct platform_device *pdev;
 	const char *chip_name;
-	size_t pfp_req_size, me_req_size;
+	const char *rlc_chip_name;
+	size_t pfp_req_size, me_req_size, rlc_req_size;
 	char fw_name[30];
 	int err;
 
@@ -1128,30 +1428,62 @@
 	}
 
 	switch (rdev->family) {
-	case CHIP_R600: chip_name = "R600"; break;
-	case CHIP_RV610: chip_name = "RV610"; break;
-	case CHIP_RV630: chip_name = "RV630"; break;
-	case CHIP_RV620: chip_name = "RV620"; break;
-	case CHIP_RV635: chip_name = "RV635"; break;
-	case CHIP_RV670: chip_name = "RV670"; break;
+	case CHIP_R600:
+		chip_name = "R600";
+		rlc_chip_name = "R600";
+		break;
+	case CHIP_RV610:
+		chip_name = "RV610";
+		rlc_chip_name = "R600";
+		break;
+	case CHIP_RV630:
+		chip_name = "RV630";
+		rlc_chip_name = "R600";
+		break;
+	case CHIP_RV620:
+		chip_name = "RV620";
+		rlc_chip_name = "R600";
+		break;
+	case CHIP_RV635:
+		chip_name = "RV635";
+		rlc_chip_name = "R600";
+		break;
+	case CHIP_RV670:
+		chip_name = "RV670";
+		rlc_chip_name = "R600";
+		break;
 	case CHIP_RS780:
-	case CHIP_RS880: chip_name = "RS780"; break;
-	case CHIP_RV770: chip_name = "RV770"; break;
+	case CHIP_RS880:
+		chip_name = "RS780";
+		rlc_chip_name = "R600";
+		break;
+	case CHIP_RV770:
+		chip_name = "RV770";
+		rlc_chip_name = "R700";
+		break;
 	case CHIP_RV730:
-	case CHIP_RV740: chip_name = "RV730"; break;
-	case CHIP_RV710: chip_name = "RV710"; break;
+	case CHIP_RV740:
+		chip_name = "RV730";
+		rlc_chip_name = "R700";
+		break;
+	case CHIP_RV710:
+		chip_name = "RV710";
+		rlc_chip_name = "R700";
+		break;
 	default: BUG();
 	}
 
 	if (rdev->family >= CHIP_RV770) {
 		pfp_req_size = R700_PFP_UCODE_SIZE * 4;
 		me_req_size = R700_PM4_UCODE_SIZE * 4;
+		rlc_req_size = R700_RLC_UCODE_SIZE * 4;
 	} else {
 		pfp_req_size = PFP_UCODE_SIZE * 4;
 		me_req_size = PM4_UCODE_SIZE * 12;
+		rlc_req_size = RLC_UCODE_SIZE * 4;
 	}
 
-	DRM_INFO("Loading %s CP Microcode\n", chip_name);
+	DRM_INFO("Loading %s Microcode\n", chip_name);
 
 	snprintf(fw_name, sizeof(fw_name), "radeon/%s_pfp.bin", chip_name);
 	err = request_firmware(&rdev->pfp_fw, fw_name, &pdev->dev);
@@ -1175,6 +1507,18 @@
 		       rdev->me_fw->size, fw_name);
 		err = -EINVAL;
 	}
+
+	snprintf(fw_name, sizeof(fw_name), "radeon/%s_rlc.bin", rlc_chip_name);
+	err = request_firmware(&rdev->rlc_fw, fw_name, &pdev->dev);
+	if (err)
+		goto out;
+	if (rdev->rlc_fw->size != rlc_req_size) {
+		printk(KERN_ERR
+		       "r600_rlc: Bogus length %zu in firmware \"%s\"\n",
+		       rdev->rlc_fw->size, fw_name);
+		err = -EINVAL;
+	}
+
 out:
 	platform_device_unregister(pdev);
 
@@ -1187,6 +1531,8 @@
 		rdev->pfp_fw = NULL;
 		release_firmware(rdev->me_fw);
 		rdev->me_fw = NULL;
+		release_firmware(rdev->rlc_fw);
+		rdev->rlc_fw = NULL;
 	}
 	return err;
 }
@@ -1324,6 +1670,12 @@
 	rdev->cp.align_mask = 16 - 1;
 }
 
+void r600_cp_fini(struct radeon_device *rdev)
+{
+	r600_cp_stop(rdev);
+	radeon_ring_fini(rdev);
+}
+
 
 /*
  * GPU scratch registers helpers function.
@@ -1381,10 +1733,16 @@
 
 void r600_wb_disable(struct radeon_device *rdev)
 {
+	int r;
+
 	WREG32(SCRATCH_UMSK, 0);
 	if (rdev->wb.wb_obj) {
-		radeon_object_kunmap(rdev->wb.wb_obj);
-		radeon_object_unpin(rdev->wb.wb_obj);
+		r = radeon_bo_reserve(rdev->wb.wb_obj, false);
+		if (unlikely(r != 0))
+			return;
+		radeon_bo_kunmap(rdev->wb.wb_obj);
+		radeon_bo_unpin(rdev->wb.wb_obj);
+		radeon_bo_unreserve(rdev->wb.wb_obj);
 	}
 }
 
@@ -1392,7 +1750,7 @@
 {
 	r600_wb_disable(rdev);
 	if (rdev->wb.wb_obj) {
-		radeon_object_unref(&rdev->wb.wb_obj);
+		radeon_bo_unref(&rdev->wb.wb_obj);
 		rdev->wb.wb = NULL;
 		rdev->wb.wb_obj = NULL;
 	}
@@ -1403,22 +1761,29 @@
 	int r;
 
 	if (rdev->wb.wb_obj == NULL) {
-		r = radeon_object_create(rdev, NULL, RADEON_GPU_PAGE_SIZE, true,
-				RADEON_GEM_DOMAIN_GTT, false, &rdev->wb.wb_obj);
+		r = radeon_bo_create(rdev, NULL, RADEON_GPU_PAGE_SIZE, true,
+				RADEON_GEM_DOMAIN_GTT, &rdev->wb.wb_obj);
 		if (r) {
-			dev_warn(rdev->dev, "failed to create WB buffer (%d).\n", r);
+			dev_warn(rdev->dev, "(%d) create WB bo failed\n", r);
 			return r;
 		}
-		r = radeon_object_pin(rdev->wb.wb_obj, RADEON_GEM_DOMAIN_GTT,
+		r = radeon_bo_reserve(rdev->wb.wb_obj, false);
+		if (unlikely(r != 0)) {
+			r600_wb_fini(rdev);
+			return r;
+		}
+		r = radeon_bo_pin(rdev->wb.wb_obj, RADEON_GEM_DOMAIN_GTT,
 				&rdev->wb.gpu_addr);
 		if (r) {
-			dev_warn(rdev->dev, "failed to pin WB buffer (%d).\n", r);
+			radeon_bo_unreserve(rdev->wb.wb_obj);
+			dev_warn(rdev->dev, "(%d) pin WB bo failed\n", r);
 			r600_wb_fini(rdev);
 			return r;
 		}
-		r = radeon_object_kmap(rdev->wb.wb_obj, (void **)&rdev->wb.wb);
+		r = radeon_bo_kmap(rdev->wb.wb_obj, (void **)&rdev->wb.wb);
+		radeon_bo_unreserve(rdev->wb.wb_obj);
 		if (r) {
-			dev_warn(rdev->dev, "failed to map WB buffer (%d).\n", r);
+			dev_warn(rdev->dev, "(%d) map WB bo failed\n", r);
 			r600_wb_fini(rdev);
 			return r;
 		}
@@ -1433,41 +1798,36 @@
 void r600_fence_ring_emit(struct radeon_device *rdev,
 			  struct radeon_fence *fence)
 {
+	/* Also consider EVENT_WRITE_EOP.  it handles the interrupts + timestamps + events */
 	/* Emit fence sequence & fire IRQ */
 	radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONFIG_REG, 1));
 	radeon_ring_write(rdev, ((rdev->fence_drv.scratch_reg - PACKET3_SET_CONFIG_REG_OFFSET) >> 2));
 	radeon_ring_write(rdev, fence->seq);
-}
-
-int r600_copy_dma(struct radeon_device *rdev,
-		  uint64_t src_offset,
-		  uint64_t dst_offset,
-		  unsigned num_pages,
-		  struct radeon_fence *fence)
-{
-	/* FIXME: implement */
-	return 0;
+	radeon_ring_write(rdev, PACKET0(R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL, 0));
+	radeon_ring_write(rdev, 1);
+	/* CP_INTERRUPT packet 3 no longer exists, use packet 0 */
+	radeon_ring_write(rdev, PACKET0(CP_INT_STATUS, 0));
+	radeon_ring_write(rdev, RB_INT_STAT);
 }
 
 int r600_copy_blit(struct radeon_device *rdev,
 		   uint64_t src_offset, uint64_t dst_offset,
 		   unsigned num_pages, struct radeon_fence *fence)
 {
-	r600_blit_prepare_copy(rdev, num_pages * RADEON_GPU_PAGE_SIZE);
+	int r;
+
+	mutex_lock(&rdev->r600_blit.mutex);
+	rdev->r600_blit.vb_ib = NULL;
+	r = r600_blit_prepare_copy(rdev, num_pages * RADEON_GPU_PAGE_SIZE);
+	if (r) {
+		if (rdev->r600_blit.vb_ib)
+			radeon_ib_free(rdev, &rdev->r600_blit.vb_ib);
+		mutex_unlock(&rdev->r600_blit.mutex);
+		return r;
+	}
 	r600_kms_blit_copy(rdev, src_offset, dst_offset, num_pages * RADEON_GPU_PAGE_SIZE);
 	r600_blit_done_copy(rdev, fence);
-	return 0;
-}
-
-int r600_irq_process(struct radeon_device *rdev)
-{
-	/* FIXME: implement */
-	return 0;
-}
-
-int r600_irq_set(struct radeon_device *rdev)
-{
-	/* FIXME: implement */
+	mutex_unlock(&rdev->r600_blit.mutex);
 	return 0;
 }
 
@@ -1506,6 +1866,14 @@
 {
 	int r;
 
+	if (!rdev->me_fw || !rdev->pfp_fw || !rdev->rlc_fw) {
+		r = r600_init_microcode(rdev);
+		if (r) {
+			DRM_ERROR("Failed to load firmware!\n");
+			return r;
+		}
+	}
+
 	r600_mc_program(rdev);
 	if (rdev->flags & RADEON_IS_AGP) {
 		r600_agp_enable(rdev);
@@ -1515,13 +1883,33 @@
 			return r;
 	}
 	r600_gpu_init(rdev);
-
-	r = radeon_object_pin(rdev->r600_blit.shader_obj, RADEON_GEM_DOMAIN_VRAM,
-			      &rdev->r600_blit.shader_gpu_addr);
+	r = r600_blit_init(rdev);
 	if (r) {
-		DRM_ERROR("failed to pin blit object %d\n", r);
+		r600_blit_fini(rdev);
+		rdev->asic->copy = NULL;
+		dev_warn(rdev->dev, "failed blitter (%d) falling back to memcpy\n", r);
+	}
+	/* pin copy shader into vram */
+	if (rdev->r600_blit.shader_obj) {
+		r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false);
+		if (unlikely(r != 0))
+			return r;
+		r = radeon_bo_pin(rdev->r600_blit.shader_obj, RADEON_GEM_DOMAIN_VRAM,
+				&rdev->r600_blit.shader_gpu_addr);
+		radeon_bo_unreserve(rdev->r600_blit.shader_obj);
+		if (r) {
+			dev_err(rdev->dev, "(%d) pin blit object failed\n", r);
+			return r;
+		}
+	}
+	/* Enable IRQ */
+	r = r600_irq_init(rdev);
+	if (r) {
+		DRM_ERROR("radeon: IH init failed (%d).\n", r);
+		radeon_irq_kms_fini(rdev);
 		return r;
 	}
+	r600_irq_set(rdev);
 
 	r = radeon_ring_init(rdev, rdev->cp.ring_size);
 	if (r)
@@ -1578,18 +1966,35 @@
 		DRM_ERROR("radeon: failled testing IB (%d).\n", r);
 		return r;
 	}
+
+	r = r600_audio_init(rdev);
+	if (r) {
+		DRM_ERROR("radeon: audio resume failed\n");
+		return r;
+	}
+
 	return r;
 }
 
 int r600_suspend(struct radeon_device *rdev)
 {
+	int r;
+
+	r600_audio_fini(rdev);
 	/* FIXME: we should wait for ring to be empty */
 	r600_cp_stop(rdev);
 	rdev->cp.ready = false;
+	r600_irq_suspend(rdev);
 	r600_wb_disable(rdev);
 	r600_pcie_gart_disable(rdev);
 	/* unpin shaders bo */
-	radeon_object_unpin(rdev->r600_blit.shader_obj);
+	if (rdev->r600_blit.shader_obj) {
+		r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false);
+		if (!r) {
+			radeon_bo_unpin(rdev->r600_blit.shader_obj);
+			radeon_bo_unreserve(rdev->r600_blit.shader_obj);
+		}
+	}
 	return 0;
 }
 
@@ -1627,7 +2032,11 @@
 	if (r)
 		return r;
 	/* Post card if necessary */
-	if (!r600_card_posted(rdev) && rdev->bios) {
+	if (!r600_card_posted(rdev)) {
+		if (!rdev->bios) {
+			dev_err(rdev->dev, "Card not posted and no BIOS - ignoring\n");
+			return -EINVAL;
+		}
 		DRM_INFO("GPU not posted. posting now...\n");
 		atom_asic_init(rdev->mode_info.atom_context);
 	}
@@ -1646,73 +2055,78 @@
 	r = radeon_fence_driver_init(rdev);
 	if (r)
 		return r;
+	if (rdev->flags & RADEON_IS_AGP) {
+		r = radeon_agp_init(rdev);
+		if (r)
+			radeon_agp_disable(rdev);
+	}
 	r = r600_mc_init(rdev);
 	if (r)
 		return r;
 	/* Memory manager */
-	r = radeon_object_init(rdev);
+	r = radeon_bo_init(rdev);
+	if (r)
+		return r;
+
+	r = radeon_irq_kms_init(rdev);
 	if (r)
 		return r;
+
 	rdev->cp.ring_obj = NULL;
 	r600_ring_init(rdev, 1024 * 1024);
 
-	if (!rdev->me_fw || !rdev->pfp_fw) {
-		r = r600_cp_init_microcode(rdev);
-		if (r) {
-			DRM_ERROR("Failed to load firmware!\n");
-			return r;
-		}
-	}
+	rdev->ih.ring_obj = NULL;
+	r600_ih_ring_init(rdev, 64 * 1024);
 
 	r = r600_pcie_gart_init(rdev);
 	if (r)
 		return r;
 
 	rdev->accel_working = true;
-	r = r600_blit_init(rdev);
-	if (r) {
-		DRM_ERROR("radeon: failled blitter (%d).\n", r);
-		return r;
-	}
-
 	r = r600_startup(rdev);
 	if (r) {
-		r600_suspend(rdev);
+		dev_err(rdev->dev, "disabling GPU acceleration\n");
+		r600_cp_fini(rdev);
 		r600_wb_fini(rdev);
-		radeon_ring_fini(rdev);
+		r600_irq_fini(rdev);
+		radeon_irq_kms_fini(rdev);
 		r600_pcie_gart_fini(rdev);
 		rdev->accel_working = false;
 	}
 	if (rdev->accel_working) {
 		r = radeon_ib_pool_init(rdev);
 		if (r) {
-			DRM_ERROR("radeon: failled initializing IB pool (%d).\n", r);
-			rdev->accel_working = false;
-		}
-		r = r600_ib_test(rdev);
-		if (r) {
-			DRM_ERROR("radeon: failled testing IB (%d).\n", r);
+			dev_err(rdev->dev, "IB initialization failed (%d).\n", r);
 			rdev->accel_working = false;
+		} else {
+			r = r600_ib_test(rdev);
+			if (r) {
+				dev_err(rdev->dev, "IB test failed (%d).\n", r);
+				rdev->accel_working = false;
+			}
 		}
 	}
+
+	r = r600_audio_init(rdev);
+	if (r)
+		return r; /* TODO error handling */
 	return 0;
 }
 
 void r600_fini(struct radeon_device *rdev)
 {
-	/* Suspend operations */
-	r600_suspend(rdev);
-
+	r600_audio_fini(rdev);
 	r600_blit_fini(rdev);
-	radeon_ring_fini(rdev);
+	r600_cp_fini(rdev);
 	r600_wb_fini(rdev);
+	r600_irq_fini(rdev);
+	radeon_irq_kms_fini(rdev);
 	r600_pcie_gart_fini(rdev);
+	radeon_agp_fini(rdev);
 	radeon_gem_fini(rdev);
 	radeon_fence_driver_fini(rdev);
 	radeon_clocks_fini(rdev);
-	if (rdev->flags & RADEON_IS_AGP)
-		radeon_agp_fini(rdev);
-	radeon_object_fini(rdev);
+	radeon_bo_fini(rdev);
 	radeon_atombios_fini(rdev);
 	kfree(rdev->bios);
 	rdev->bios = NULL;
@@ -1798,8 +2212,668 @@
 	return r;
 }
 
+/*
+ * Interrupts
+ *
+ * Interrupts use a ring buffer on r6xx/r7xx hardware.  It works pretty
+ * the same as the CP ring buffer, but in reverse.  Rather than the CPU
+ * writing to the ring and the GPU consuming, the GPU writes to the ring
+ * and host consumes.  As the host irq handler processes interrupts, it
+ * increments the rptr.  When the rptr catches up with the wptr, all the
+ * current interrupts have been processed.
+ */
+
+void r600_ih_ring_init(struct radeon_device *rdev, unsigned ring_size)
+{
+	u32 rb_bufsz;
+
+	/* Align ring size */
+	rb_bufsz = drm_order(ring_size / 4);
+	ring_size = (1 << rb_bufsz) * 4;
+	rdev->ih.ring_size = ring_size;
+	rdev->ih.ptr_mask = rdev->ih.ring_size - 1;
+	rdev->ih.rptr = 0;
+}
+
+static int r600_ih_ring_alloc(struct radeon_device *rdev)
+{
+	int r;
+
+	/* Allocate ring buffer */
+	if (rdev->ih.ring_obj == NULL) {
+		r = radeon_bo_create(rdev, NULL, rdev->ih.ring_size,
+				     true,
+				     RADEON_GEM_DOMAIN_GTT,
+				     &rdev->ih.ring_obj);
+		if (r) {
+			DRM_ERROR("radeon: failed to create ih ring buffer (%d).\n", r);
+			return r;
+		}
+		r = radeon_bo_reserve(rdev->ih.ring_obj, false);
+		if (unlikely(r != 0))
+			return r;
+		r = radeon_bo_pin(rdev->ih.ring_obj,
+				  RADEON_GEM_DOMAIN_GTT,
+				  &rdev->ih.gpu_addr);
+		if (r) {
+			radeon_bo_unreserve(rdev->ih.ring_obj);
+			DRM_ERROR("radeon: failed to pin ih ring buffer (%d).\n", r);
+			return r;
+		}
+		r = radeon_bo_kmap(rdev->ih.ring_obj,
+				   (void **)&rdev->ih.ring);
+		radeon_bo_unreserve(rdev->ih.ring_obj);
+		if (r) {
+			DRM_ERROR("radeon: failed to map ih ring buffer (%d).\n", r);
+			return r;
+		}
+	}
+	return 0;
+}
+
+static void r600_ih_ring_fini(struct radeon_device *rdev)
+{
+	int r;
+	if (rdev->ih.ring_obj) {
+		r = radeon_bo_reserve(rdev->ih.ring_obj, false);
+		if (likely(r == 0)) {
+			radeon_bo_kunmap(rdev->ih.ring_obj);
+			radeon_bo_unpin(rdev->ih.ring_obj);
+			radeon_bo_unreserve(rdev->ih.ring_obj);
+		}
+		radeon_bo_unref(&rdev->ih.ring_obj);
+		rdev->ih.ring = NULL;
+		rdev->ih.ring_obj = NULL;
+	}
+}
+
+static void r600_rlc_stop(struct radeon_device *rdev)
+{
+
+	if (rdev->family >= CHIP_RV770) {
+		/* r7xx asics need to soft reset RLC before halting */
+		WREG32(SRBM_SOFT_RESET, SOFT_RESET_RLC);
+		RREG32(SRBM_SOFT_RESET);
+		udelay(15000);
+		WREG32(SRBM_SOFT_RESET, 0);
+		RREG32(SRBM_SOFT_RESET);
+	}
+
+	WREG32(RLC_CNTL, 0);
+}
+
+static void r600_rlc_start(struct radeon_device *rdev)
+{
+	WREG32(RLC_CNTL, RLC_ENABLE);
+}
+
+static int r600_rlc_init(struct radeon_device *rdev)
+{
+	u32 i;
+	const __be32 *fw_data;
+
+	if (!rdev->rlc_fw)
+		return -EINVAL;
+
+	r600_rlc_stop(rdev);
+
+	WREG32(RLC_HB_BASE, 0);
+	WREG32(RLC_HB_CNTL, 0);
+	WREG32(RLC_HB_RPTR, 0);
+	WREG32(RLC_HB_WPTR, 0);
+	WREG32(RLC_HB_WPTR_LSB_ADDR, 0);
+	WREG32(RLC_HB_WPTR_MSB_ADDR, 0);
+	WREG32(RLC_MC_CNTL, 0);
+	WREG32(RLC_UCODE_CNTL, 0);
+
+	fw_data = (const __be32 *)rdev->rlc_fw->data;
+	if (rdev->family >= CHIP_RV770) {
+		for (i = 0; i < R700_RLC_UCODE_SIZE; i++) {
+			WREG32(RLC_UCODE_ADDR, i);
+			WREG32(RLC_UCODE_DATA, be32_to_cpup(fw_data++));
+		}
+	} else {
+		for (i = 0; i < RLC_UCODE_SIZE; i++) {
+			WREG32(RLC_UCODE_ADDR, i);
+			WREG32(RLC_UCODE_DATA, be32_to_cpup(fw_data++));
+		}
+	}
+	WREG32(RLC_UCODE_ADDR, 0);
+
+	r600_rlc_start(rdev);
+
+	return 0;
+}
+
+static void r600_enable_interrupts(struct radeon_device *rdev)
+{
+	u32 ih_cntl = RREG32(IH_CNTL);
+	u32 ih_rb_cntl = RREG32(IH_RB_CNTL);
+
+	ih_cntl |= ENABLE_INTR;
+	ih_rb_cntl |= IH_RB_ENABLE;
+	WREG32(IH_CNTL, ih_cntl);
+	WREG32(IH_RB_CNTL, ih_rb_cntl);
+	rdev->ih.enabled = true;
+}
+
+static void r600_disable_interrupts(struct radeon_device *rdev)
+{
+	u32 ih_rb_cntl = RREG32(IH_RB_CNTL);
+	u32 ih_cntl = RREG32(IH_CNTL);
+
+	ih_rb_cntl &= ~IH_RB_ENABLE;
+	ih_cntl &= ~ENABLE_INTR;
+	WREG32(IH_RB_CNTL, ih_rb_cntl);
+	WREG32(IH_CNTL, ih_cntl);
+	/* set rptr, wptr to 0 */
+	WREG32(IH_RB_RPTR, 0);
+	WREG32(IH_RB_WPTR, 0);
+	rdev->ih.enabled = false;
+	rdev->ih.wptr = 0;
+	rdev->ih.rptr = 0;
+}
+
+static void r600_disable_interrupt_state(struct radeon_device *rdev)
+{
+	u32 tmp;
+
+	WREG32(CP_INT_CNTL, 0);
+	WREG32(GRBM_INT_CNTL, 0);
+	WREG32(DxMODE_INT_MASK, 0);
+	if (ASIC_IS_DCE3(rdev)) {
+		WREG32(DCE3_DACA_AUTODETECT_INT_CONTROL, 0);
+		WREG32(DCE3_DACB_AUTODETECT_INT_CONTROL, 0);
+		tmp = RREG32(DC_HPD1_INT_CONTROL) & DC_HPDx_INT_POLARITY;
+		WREG32(DC_HPD1_INT_CONTROL, tmp);
+		tmp = RREG32(DC_HPD2_INT_CONTROL) & DC_HPDx_INT_POLARITY;
+		WREG32(DC_HPD2_INT_CONTROL, tmp);
+		tmp = RREG32(DC_HPD3_INT_CONTROL) & DC_HPDx_INT_POLARITY;
+		WREG32(DC_HPD3_INT_CONTROL, tmp);
+		tmp = RREG32(DC_HPD4_INT_CONTROL) & DC_HPDx_INT_POLARITY;
+		WREG32(DC_HPD4_INT_CONTROL, tmp);
+		if (ASIC_IS_DCE32(rdev)) {
+			tmp = RREG32(DC_HPD5_INT_CONTROL) & DC_HPDx_INT_POLARITY;
+			WREG32(DC_HPD5_INT_CONTROL, 0);
+			tmp = RREG32(DC_HPD6_INT_CONTROL) & DC_HPDx_INT_POLARITY;
+			WREG32(DC_HPD6_INT_CONTROL, 0);
+		}
+	} else {
+		WREG32(DACA_AUTODETECT_INT_CONTROL, 0);
+		WREG32(DACB_AUTODETECT_INT_CONTROL, 0);
+		tmp = RREG32(DC_HOT_PLUG_DETECT1_INT_CONTROL) & DC_HOT_PLUG_DETECTx_INT_POLARITY;
+		WREG32(DC_HOT_PLUG_DETECT1_INT_CONTROL, 0);
+		tmp = RREG32(DC_HOT_PLUG_DETECT2_INT_CONTROL) & DC_HOT_PLUG_DETECTx_INT_POLARITY;
+		WREG32(DC_HOT_PLUG_DETECT2_INT_CONTROL, 0);
+		tmp = RREG32(DC_HOT_PLUG_DETECT3_INT_CONTROL) & DC_HOT_PLUG_DETECTx_INT_POLARITY;
+		WREG32(DC_HOT_PLUG_DETECT3_INT_CONTROL, 0);
+	}
+}
+
+int r600_irq_init(struct radeon_device *rdev)
+{
+	int ret = 0;
+	int rb_bufsz;
+	u32 interrupt_cntl, ih_cntl, ih_rb_cntl;
+
+	/* allocate ring */
+	ret = r600_ih_ring_alloc(rdev);
+	if (ret)
+		return ret;
+
+	/* disable irqs */
+	r600_disable_interrupts(rdev);
+
+	/* init rlc */
+	ret = r600_rlc_init(rdev);
+	if (ret) {
+		r600_ih_ring_fini(rdev);
+		return ret;
+	}
+
+	/* setup interrupt control */
+	/* set dummy read address to ring address */
+	WREG32(INTERRUPT_CNTL2, rdev->ih.gpu_addr >> 8);
+	interrupt_cntl = RREG32(INTERRUPT_CNTL);
+	/* IH_DUMMY_RD_OVERRIDE=0 - dummy read disabled with msi, enabled without msi
+	 * IH_DUMMY_RD_OVERRIDE=1 - dummy read controlled by IH_DUMMY_RD_EN
+	 */
+	interrupt_cntl &= ~IH_DUMMY_RD_OVERRIDE;
+	/* IH_REQ_NONSNOOP_EN=1 if ring is in non-cacheable memory, e.g., vram */
+	interrupt_cntl &= ~IH_REQ_NONSNOOP_EN;
+	WREG32(INTERRUPT_CNTL, interrupt_cntl);
+
+	WREG32(IH_RB_BASE, rdev->ih.gpu_addr >> 8);
+	rb_bufsz = drm_order(rdev->ih.ring_size / 4);
+
+	ih_rb_cntl = (IH_WPTR_OVERFLOW_ENABLE |
+		      IH_WPTR_OVERFLOW_CLEAR |
+		      (rb_bufsz << 1));
+	/* WPTR writeback, not yet */
+	/*ih_rb_cntl |= IH_WPTR_WRITEBACK_ENABLE;*/
+	WREG32(IH_RB_WPTR_ADDR_LO, 0);
+	WREG32(IH_RB_WPTR_ADDR_HI, 0);
+
+	WREG32(IH_RB_CNTL, ih_rb_cntl);
+
+	/* set rptr, wptr to 0 */
+	WREG32(IH_RB_RPTR, 0);
+	WREG32(IH_RB_WPTR, 0);
+
+	/* Default settings for IH_CNTL (disabled at first) */
+	ih_cntl = MC_WRREQ_CREDIT(0x10) | MC_WR_CLEAN_CNT(0x10);
+	/* RPTR_REARM only works if msi's are enabled */
+	if (rdev->msi_enabled)
+		ih_cntl |= RPTR_REARM;
+
+#ifdef __BIG_ENDIAN
+	ih_cntl |= IH_MC_SWAP(IH_MC_SWAP_32BIT);
+#endif
+	WREG32(IH_CNTL, ih_cntl);
+
+	/* force the active interrupt state to all disabled */
+	r600_disable_interrupt_state(rdev);
+
+	/* enable irqs */
+	r600_enable_interrupts(rdev);
+
+	return ret;
+}
+
+void r600_irq_suspend(struct radeon_device *rdev)
+{
+	r600_disable_interrupts(rdev);
+	r600_rlc_stop(rdev);
+}
+
+void r600_irq_fini(struct radeon_device *rdev)
+{
+	r600_irq_suspend(rdev);
+	r600_ih_ring_fini(rdev);
+}
+
+int r600_irq_set(struct radeon_device *rdev)
+{
+	u32 cp_int_cntl = CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE;
+	u32 mode_int = 0;
+	u32 hpd1, hpd2, hpd3, hpd4 = 0, hpd5 = 0, hpd6 = 0;
+
+	if (!rdev->irq.installed) {
+		WARN(1, "Can't enable IRQ/MSI because no handler is installed.\n");
+		return -EINVAL;
+	}
+	/* don't enable anything if the ih is disabled */
+	if (!rdev->ih.enabled) {
+		r600_disable_interrupts(rdev);
+		/* force the active interrupt state to all disabled */
+		r600_disable_interrupt_state(rdev);
+		return 0;
+	}
 
+	if (ASIC_IS_DCE3(rdev)) {
+		hpd1 = RREG32(DC_HPD1_INT_CONTROL) & ~DC_HPDx_INT_EN;
+		hpd2 = RREG32(DC_HPD2_INT_CONTROL) & ~DC_HPDx_INT_EN;
+		hpd3 = RREG32(DC_HPD3_INT_CONTROL) & ~DC_HPDx_INT_EN;
+		hpd4 = RREG32(DC_HPD4_INT_CONTROL) & ~DC_HPDx_INT_EN;
+		if (ASIC_IS_DCE32(rdev)) {
+			hpd5 = RREG32(DC_HPD5_INT_CONTROL) & ~DC_HPDx_INT_EN;
+			hpd6 = RREG32(DC_HPD6_INT_CONTROL) & ~DC_HPDx_INT_EN;
+		}
+	} else {
+		hpd1 = RREG32(DC_HOT_PLUG_DETECT1_INT_CONTROL) & ~DC_HPDx_INT_EN;
+		hpd2 = RREG32(DC_HOT_PLUG_DETECT2_INT_CONTROL) & ~DC_HPDx_INT_EN;
+		hpd3 = RREG32(DC_HOT_PLUG_DETECT3_INT_CONTROL) & ~DC_HPDx_INT_EN;
+	}
+
+	if (rdev->irq.sw_int) {
+		DRM_DEBUG("r600_irq_set: sw int\n");
+		cp_int_cntl |= RB_INT_ENABLE;
+	}
+	if (rdev->irq.crtc_vblank_int[0]) {
+		DRM_DEBUG("r600_irq_set: vblank 0\n");
+		mode_int |= D1MODE_VBLANK_INT_MASK;
+	}
+	if (rdev->irq.crtc_vblank_int[1]) {
+		DRM_DEBUG("r600_irq_set: vblank 1\n");
+		mode_int |= D2MODE_VBLANK_INT_MASK;
+	}
+	if (rdev->irq.hpd[0]) {
+		DRM_DEBUG("r600_irq_set: hpd 1\n");
+		hpd1 |= DC_HPDx_INT_EN;
+	}
+	if (rdev->irq.hpd[1]) {
+		DRM_DEBUG("r600_irq_set: hpd 2\n");
+		hpd2 |= DC_HPDx_INT_EN;
+	}
+	if (rdev->irq.hpd[2]) {
+		DRM_DEBUG("r600_irq_set: hpd 3\n");
+		hpd3 |= DC_HPDx_INT_EN;
+	}
+	if (rdev->irq.hpd[3]) {
+		DRM_DEBUG("r600_irq_set: hpd 4\n");
+		hpd4 |= DC_HPDx_INT_EN;
+	}
+	if (rdev->irq.hpd[4]) {
+		DRM_DEBUG("r600_irq_set: hpd 5\n");
+		hpd5 |= DC_HPDx_INT_EN;
+	}
+	if (rdev->irq.hpd[5]) {
+		DRM_DEBUG("r600_irq_set: hpd 6\n");
+		hpd6 |= DC_HPDx_INT_EN;
+	}
+
+	WREG32(CP_INT_CNTL, cp_int_cntl);
+	WREG32(DxMODE_INT_MASK, mode_int);
+	if (ASIC_IS_DCE3(rdev)) {
+		WREG32(DC_HPD1_INT_CONTROL, hpd1);
+		WREG32(DC_HPD2_INT_CONTROL, hpd2);
+		WREG32(DC_HPD3_INT_CONTROL, hpd3);
+		WREG32(DC_HPD4_INT_CONTROL, hpd4);
+		if (ASIC_IS_DCE32(rdev)) {
+			WREG32(DC_HPD5_INT_CONTROL, hpd5);
+			WREG32(DC_HPD6_INT_CONTROL, hpd6);
+		}
+	} else {
+		WREG32(DC_HOT_PLUG_DETECT1_INT_CONTROL, hpd1);
+		WREG32(DC_HOT_PLUG_DETECT2_INT_CONTROL, hpd2);
+		WREG32(DC_HOT_PLUG_DETECT3_INT_CONTROL, hpd3);
+	}
 
+	return 0;
+}
+
+static inline void r600_irq_ack(struct radeon_device *rdev,
+				u32 *disp_int,
+				u32 *disp_int_cont,
+				u32 *disp_int_cont2)
+{
+	u32 tmp;
+
+	if (ASIC_IS_DCE3(rdev)) {
+		*disp_int = RREG32(DCE3_DISP_INTERRUPT_STATUS);
+		*disp_int_cont = RREG32(DCE3_DISP_INTERRUPT_STATUS_CONTINUE);
+		*disp_int_cont2 = RREG32(DCE3_DISP_INTERRUPT_STATUS_CONTINUE2);
+	} else {
+		*disp_int = RREG32(DISP_INTERRUPT_STATUS);
+		*disp_int_cont = RREG32(DISP_INTERRUPT_STATUS_CONTINUE);
+		*disp_int_cont2 = 0;
+	}
+
+	if (*disp_int & LB_D1_VBLANK_INTERRUPT)
+		WREG32(D1MODE_VBLANK_STATUS, DxMODE_VBLANK_ACK);
+	if (*disp_int & LB_D1_VLINE_INTERRUPT)
+		WREG32(D1MODE_VLINE_STATUS, DxMODE_VLINE_ACK);
+	if (*disp_int & LB_D2_VBLANK_INTERRUPT)
+		WREG32(D2MODE_VBLANK_STATUS, DxMODE_VBLANK_ACK);
+	if (*disp_int & LB_D2_VLINE_INTERRUPT)
+		WREG32(D2MODE_VLINE_STATUS, DxMODE_VLINE_ACK);
+	if (*disp_int & DC_HPD1_INTERRUPT) {
+		if (ASIC_IS_DCE3(rdev)) {
+			tmp = RREG32(DC_HPD1_INT_CONTROL);
+			tmp |= DC_HPDx_INT_ACK;
+			WREG32(DC_HPD1_INT_CONTROL, tmp);
+		} else {
+			tmp = RREG32(DC_HOT_PLUG_DETECT1_INT_CONTROL);
+			tmp |= DC_HPDx_INT_ACK;
+			WREG32(DC_HOT_PLUG_DETECT1_INT_CONTROL, tmp);
+		}
+	}
+	if (*disp_int & DC_HPD2_INTERRUPT) {
+		if (ASIC_IS_DCE3(rdev)) {
+			tmp = RREG32(DC_HPD2_INT_CONTROL);
+			tmp |= DC_HPDx_INT_ACK;
+			WREG32(DC_HPD2_INT_CONTROL, tmp);
+		} else {
+			tmp = RREG32(DC_HOT_PLUG_DETECT2_INT_CONTROL);
+			tmp |= DC_HPDx_INT_ACK;
+			WREG32(DC_HOT_PLUG_DETECT2_INT_CONTROL, tmp);
+		}
+	}
+	if (*disp_int_cont & DC_HPD3_INTERRUPT) {
+		if (ASIC_IS_DCE3(rdev)) {
+			tmp = RREG32(DC_HPD3_INT_CONTROL);
+			tmp |= DC_HPDx_INT_ACK;
+			WREG32(DC_HPD3_INT_CONTROL, tmp);
+		} else {
+			tmp = RREG32(DC_HOT_PLUG_DETECT3_INT_CONTROL);
+			tmp |= DC_HPDx_INT_ACK;
+			WREG32(DC_HOT_PLUG_DETECT3_INT_CONTROL, tmp);
+		}
+	}
+	if (*disp_int_cont & DC_HPD4_INTERRUPT) {
+		tmp = RREG32(DC_HPD4_INT_CONTROL);
+		tmp |= DC_HPDx_INT_ACK;
+		WREG32(DC_HPD4_INT_CONTROL, tmp);
+	}
+	if (ASIC_IS_DCE32(rdev)) {
+		if (*disp_int_cont2 & DC_HPD5_INTERRUPT) {
+			tmp = RREG32(DC_HPD5_INT_CONTROL);
+			tmp |= DC_HPDx_INT_ACK;
+			WREG32(DC_HPD5_INT_CONTROL, tmp);
+		}
+		if (*disp_int_cont2 & DC_HPD6_INTERRUPT) {
+			tmp = RREG32(DC_HPD5_INT_CONTROL);
+			tmp |= DC_HPDx_INT_ACK;
+			WREG32(DC_HPD6_INT_CONTROL, tmp);
+		}
+	}
+}
+
+void r600_irq_disable(struct radeon_device *rdev)
+{
+	u32 disp_int, disp_int_cont, disp_int_cont2;
+
+	r600_disable_interrupts(rdev);
+	/* Wait and acknowledge irq */
+	mdelay(1);
+	r600_irq_ack(rdev, &disp_int, &disp_int_cont, &disp_int_cont2);
+	r600_disable_interrupt_state(rdev);
+}
+
+static inline u32 r600_get_ih_wptr(struct radeon_device *rdev)
+{
+	u32 wptr, tmp;
+
+	/* XXX use writeback */
+	wptr = RREG32(IH_RB_WPTR);
+
+	if (wptr & RB_OVERFLOW) {
+		/* When a ring buffer overflow happen start parsing interrupt
+		 * from the last not overwritten vector (wptr + 16). Hopefully
+		 * this should allow us to catchup.
+		 */
+		dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, %d, %d)\n",
+			wptr, rdev->ih.rptr, (wptr + 16) + rdev->ih.ptr_mask);
+		rdev->ih.rptr = (wptr + 16) & rdev->ih.ptr_mask;
+		tmp = RREG32(IH_RB_CNTL);
+		tmp |= IH_WPTR_OVERFLOW_CLEAR;
+		WREG32(IH_RB_CNTL, tmp);
+	}
+	return (wptr & rdev->ih.ptr_mask);
+}
+
+/*        r600 IV Ring
+ * Each IV ring entry is 128 bits:
+ * [7:0]    - interrupt source id
+ * [31:8]   - reserved
+ * [59:32]  - interrupt source data
+ * [127:60]  - reserved
+ *
+ * The basic interrupt vector entries
+ * are decoded as follows:
+ * src_id  src_data  description
+ *      1         0  D1 Vblank
+ *      1         1  D1 Vline
+ *      5         0  D2 Vblank
+ *      5         1  D2 Vline
+ *     19         0  FP Hot plug detection A
+ *     19         1  FP Hot plug detection B
+ *     19         2  DAC A auto-detection
+ *     19         3  DAC B auto-detection
+ *    176         -  CP_INT RB
+ *    177         -  CP_INT IB1
+ *    178         -  CP_INT IB2
+ *    181         -  EOP Interrupt
+ *    233         -  GUI Idle
+ *
+ * Note, these are based on r600 and may need to be
+ * adjusted or added to on newer asics
+ */
+
+int r600_irq_process(struct radeon_device *rdev)
+{
+	u32 wptr = r600_get_ih_wptr(rdev);
+	u32 rptr = rdev->ih.rptr;
+	u32 src_id, src_data;
+	u32 ring_index, disp_int, disp_int_cont, disp_int_cont2;
+	unsigned long flags;
+	bool queue_hotplug = false;
+
+	DRM_DEBUG("r600_irq_process start: rptr %d, wptr %d\n", rptr, wptr);
+	if (!rdev->ih.enabled)
+		return IRQ_NONE;
+
+	spin_lock_irqsave(&rdev->ih.lock, flags);
+
+	if (rptr == wptr) {
+		spin_unlock_irqrestore(&rdev->ih.lock, flags);
+		return IRQ_NONE;
+	}
+	if (rdev->shutdown) {
+		spin_unlock_irqrestore(&rdev->ih.lock, flags);
+		return IRQ_NONE;
+	}
+
+restart_ih:
+	/* display interrupts */
+	r600_irq_ack(rdev, &disp_int, &disp_int_cont, &disp_int_cont2);
+
+	rdev->ih.wptr = wptr;
+	while (rptr != wptr) {
+		/* wptr/rptr are in bytes! */
+		ring_index = rptr / 4;
+		src_id =  rdev->ih.ring[ring_index] & 0xff;
+		src_data = rdev->ih.ring[ring_index + 1] & 0xfffffff;
+
+		switch (src_id) {
+		case 1: /* D1 vblank/vline */
+			switch (src_data) {
+			case 0: /* D1 vblank */
+				if (disp_int & LB_D1_VBLANK_INTERRUPT) {
+					drm_handle_vblank(rdev->ddev, 0);
+					disp_int &= ~LB_D1_VBLANK_INTERRUPT;
+					DRM_DEBUG("IH: D1 vblank\n");
+				}
+				break;
+			case 1: /* D1 vline */
+				if (disp_int & LB_D1_VLINE_INTERRUPT) {
+					disp_int &= ~LB_D1_VLINE_INTERRUPT;
+					DRM_DEBUG("IH: D1 vline\n");
+				}
+				break;
+			default:
+				DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data);
+				break;
+			}
+			break;
+		case 5: /* D2 vblank/vline */
+			switch (src_data) {
+			case 0: /* D2 vblank */
+				if (disp_int & LB_D2_VBLANK_INTERRUPT) {
+					drm_handle_vblank(rdev->ddev, 1);
+					disp_int &= ~LB_D2_VBLANK_INTERRUPT;
+					DRM_DEBUG("IH: D2 vblank\n");
+				}
+				break;
+			case 1: /* D1 vline */
+				if (disp_int & LB_D2_VLINE_INTERRUPT) {
+					disp_int &= ~LB_D2_VLINE_INTERRUPT;
+					DRM_DEBUG("IH: D2 vline\n");
+				}
+				break;
+			default:
+				DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data);
+				break;
+			}
+			break;
+		case 19: /* HPD/DAC hotplug */
+			switch (src_data) {
+			case 0:
+				if (disp_int & DC_HPD1_INTERRUPT) {
+					disp_int &= ~DC_HPD1_INTERRUPT;
+					queue_hotplug = true;
+					DRM_DEBUG("IH: HPD1\n");
+				}
+				break;
+			case 1:
+				if (disp_int & DC_HPD2_INTERRUPT) {
+					disp_int &= ~DC_HPD2_INTERRUPT;
+					queue_hotplug = true;
+					DRM_DEBUG("IH: HPD2\n");
+				}
+				break;
+			case 4:
+				if (disp_int_cont & DC_HPD3_INTERRUPT) {
+					disp_int_cont &= ~DC_HPD3_INTERRUPT;
+					queue_hotplug = true;
+					DRM_DEBUG("IH: HPD3\n");
+				}
+				break;
+			case 5:
+				if (disp_int_cont & DC_HPD4_INTERRUPT) {
+					disp_int_cont &= ~DC_HPD4_INTERRUPT;
+					queue_hotplug = true;
+					DRM_DEBUG("IH: HPD4\n");
+				}
+				break;
+			case 10:
+				if (disp_int_cont2 & DC_HPD5_INTERRUPT) {
+					disp_int_cont &= ~DC_HPD5_INTERRUPT;
+					queue_hotplug = true;
+					DRM_DEBUG("IH: HPD5\n");
+				}
+				break;
+			case 12:
+				if (disp_int_cont2 & DC_HPD6_INTERRUPT) {
+					disp_int_cont &= ~DC_HPD6_INTERRUPT;
+					queue_hotplug = true;
+					DRM_DEBUG("IH: HPD6\n");
+				}
+				break;
+			default:
+				DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data);
+				break;
+			}
+			break;
+		case 176: /* CP_INT in ring buffer */
+		case 177: /* CP_INT in IB1 */
+		case 178: /* CP_INT in IB2 */
+			DRM_DEBUG("IH: CP int: 0x%08x\n", src_data);
+			radeon_fence_process(rdev);
+			break;
+		case 181: /* CP EOP event */
+			DRM_DEBUG("IH: CP EOP\n");
+			break;
+		default:
+			DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data);
+			break;
+		}
+
+		/* wptr/rptr are in bytes! */
+		rptr += 16;
+		rptr &= rdev->ih.ptr_mask;
+	}
+	/* make sure wptr hasn't changed while processing */
+	wptr = r600_get_ih_wptr(rdev);
+	if (wptr != rdev->ih.wptr)
+		goto restart_ih;
+	if (queue_hotplug)
+		queue_work(rdev->wq, &rdev->hotplug_work);
+	rdev->ih.rptr = rptr;
+	WREG32(IH_RB_RPTR, rdev->ih.rptr);
+	spin_unlock_irqrestore(&rdev->ih.lock, flags);
+	return IRQ_HANDLED;
+}
 
 /*
  * Debugfs info
@@ -1811,21 +2885,21 @@
 	struct drm_info_node *node = (struct drm_info_node *) m->private;
 	struct drm_device *dev = node->minor->dev;
 	struct radeon_device *rdev = dev->dev_private;
-	uint32_t rdp, wdp;
 	unsigned count, i, j;
 
 	radeon_ring_free_size(rdev);
-	rdp = RREG32(CP_RB_RPTR);
-	wdp = RREG32(CP_RB_WPTR);
-	count = (rdp + rdev->cp.ring_size - wdp) & rdev->cp.ptr_mask;
+	count = (rdev->cp.ring_size / 4) - rdev->cp.ring_free_dw;
 	seq_printf(m, "CP_STAT 0x%08x\n", RREG32(CP_STAT));
-	seq_printf(m, "CP_RB_WPTR 0x%08x\n", wdp);
-	seq_printf(m, "CP_RB_RPTR 0x%08x\n", rdp);
+	seq_printf(m, "CP_RB_WPTR 0x%08x\n", RREG32(CP_RB_WPTR));
+	seq_printf(m, "CP_RB_RPTR 0x%08x\n", RREG32(CP_RB_RPTR));
+	seq_printf(m, "driver's copy of the CP_RB_WPTR 0x%08x\n", rdev->cp.wptr);
+	seq_printf(m, "driver's copy of the CP_RB_RPTR 0x%08x\n", rdev->cp.rptr);
 	seq_printf(m, "%u free dwords in ring\n", rdev->cp.ring_free_dw);
 	seq_printf(m, "%u dwords in ring\n", count);
+	i = rdev->cp.rptr;
 	for (j = 0; j <= count; j++) {
-		i = (rdp + j) & rdev->cp.ptr_mask;
 		seq_printf(m, "r[%04d]=0x%08x\n", i, rdev->cp.ring[i]);
+		i = (i + 1) & rdev->cp.ptr_mask;
 	}
 	return 0;
 }
@@ -1855,3 +2929,31 @@
 	return 0;
 #endif
 }
+
+/**
+ * r600_ioctl_wait_idle - flush host path cache on wait idle ioctl
+ * rdev: radeon device structure
+ * bo: buffer object struct which userspace is waiting for idle
+ *
+ * Some R6XX/R7XX doesn't seems to take into account HDP flush performed
+ * through ring buffer, this leads to corruption in rendering, see
+ * http://bugzilla.kernel.org/show_bug.cgi?id=15186 to avoid this we
+ * directly perform HDP flush by writing register through MMIO.
+ */
+void r600_ioctl_wait_idle(struct radeon_device *rdev, struct radeon_bo *bo)
+{
+	/* r7xx hw bug.  write to HDP_DEBUG1 followed by fb read
+	 * rather than write to HDP_REG_COHERENCY_FLUSH_CNTL.
+	 * This seems to cause problems on some AGP cards. Just use the old
+	 * method for them.
+	 */
+	if ((rdev->family >= CHIP_RV770) && (rdev->family <= CHIP_RV740) &&
+	    rdev->vram_scratch.ptr && !(rdev->flags & RADEON_IS_AGP)) {
+		void __iomem *ptr = (void *)rdev->vram_scratch.ptr;
+		u32 tmp;
+
+		WREG32(HDP_DEBUG1, 0);
+		tmp = readl((void __iomem *)ptr);
+	} else
+		WREG32(R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL, 0x1);
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_fb.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_fb.c
@@ -59,7 +59,7 @@
 };
 
 /**
- * Curretly it is assumed that the old framebuffer is reused.
+ * Currently it is assumed that the old framebuffer is reused.
  *
  * LOCKING
  * caller should hold the mode config lock.
@@ -140,7 +140,7 @@
 	struct radeon_framebuffer *rfb;
 	struct drm_mode_fb_cmd mode_cmd;
 	struct drm_gem_object *gobj = NULL;
-	struct radeon_object *robj = NULL;
+	struct radeon_bo *rbo = NULL;
 	struct device *device = &rdev->pdev->dev;
 	int size, aligned_size, ret;
 	u64 fb_gpuaddr;
@@ -168,14 +168,14 @@
 	ret = radeon_gem_object_create(rdev, aligned_size, 0,
 			RADEON_GEM_DOMAIN_VRAM,
 			false, ttm_bo_type_kernel,
-			false, &gobj);
+			&gobj);
 	if (ret) {
 		printk(KERN_ERR "failed to allocate framebuffer (%d %d)\n",
 		       surface_width, surface_height);
 		ret = -ENOMEM;
 		goto out;
 	}
-	robj = gobj->driver_private;
+	rbo = gobj->driver_private;
 
 	if (fb_tiled)
 		tiling_flags = RADEON_TILING_MACRO;
@@ -192,8 +192,13 @@
 	}
 #endif
 
-	if (tiling_flags)
-		radeon_object_set_tiling_flags(robj, tiling_flags | RADEON_TILING_SURFACE, mode_cmd.pitch);
+	if (tiling_flags) {
+		ret = radeon_bo_set_tiling_flags(rbo,
+					tiling_flags | RADEON_TILING_SURFACE,
+					mode_cmd.pitch);
+		if (ret)
+			dev_err(rdev->dev, "FB failed to set tiling flags\n");
+	}
 	mutex_lock(&rdev->ddev->struct_mutex);
 	fb = radeon_framebuffer_create(rdev->ddev, &mode_cmd, gobj);
 	if (fb == NULL) {
@@ -201,10 +206,19 @@
 		ret = -ENOMEM;
 		goto out_unref;
 	}
-	ret = radeon_object_pin(robj, RADEON_GEM_DOMAIN_VRAM, &fb_gpuaddr);
+	ret = radeon_bo_reserve(rbo, false);
+	if (unlikely(ret != 0))
+		goto out_unref;
+	ret = radeon_bo_pin(rbo, RADEON_GEM_DOMAIN_VRAM, &fb_gpuaddr);
+	if (ret) {
+		radeon_bo_unreserve(rbo);
+		goto out_unref;
+	}
+	if (fb_tiled)
+		radeon_bo_check_tiling(rbo, 0, 0);
+	ret = radeon_bo_kmap(rbo, &fbptr);
+	radeon_bo_unreserve(rbo);
 	if (ret) {
-		printk(KERN_ERR "failed to pin framebuffer\n");
-		ret = -ENOMEM;
 		goto out_unref;
 	}
 
@@ -213,7 +227,7 @@
 	*fb_p = fb;
 	rfb = to_radeon_framebuffer(fb);
 	rdev->fbdev_rfb = rfb;
-	rdev->fbdev_robj = robj;
+	rdev->fbdev_rbo = rbo;
 
 	info = framebuffer_alloc(sizeof(struct radeon_fb_device), device);
 	if (info == NULL) {
@@ -234,15 +248,7 @@
 	if (ret)
 		goto out_unref;
 
-	if (fb_tiled)
-		radeon_object_check_tiling(robj, 0, 0);
-
-	ret = radeon_object_kmap(robj, &fbptr);
-	if (ret) {
-		goto out_unref;
-	}
-
-	memset_io(fbptr, 0, aligned_size);
+	memset_io(fbptr, 0x0, aligned_size);
 
 	strcpy(info->fix.id, "radeondrmfb");
 
@@ -288,8 +294,12 @@
 	return 0;
 
 out_unref:
-	if (robj) {
-		radeon_object_kunmap(robj);
+	if (rbo) {
+		ret = radeon_bo_reserve(rbo, false);
+		if (likely(ret == 0)) {
+			radeon_bo_kunmap(rbo);
+			radeon_bo_unreserve(rbo);
+		}
 	}
 	if (fb && ret) {
 		list_del(&fb->filp_head);
@@ -321,14 +331,22 @@
 
 int radeonfb_probe(struct drm_device *dev)
 {
-	return drm_fb_helper_single_fb_probe(dev, 32, &radeonfb_create);
+	struct radeon_device *rdev = dev->dev_private;
+	int bpp_sel = 32;
+
+	/* select 8 bpp console on RN50 or 16MB cards */
+	if (ASIC_IS_RN50(rdev) || rdev->mc.real_vram_size <= (32*1024*1024))
+		bpp_sel = 8;
+
+	return drm_fb_helper_single_fb_probe(dev, bpp_sel, &radeonfb_create);
 }
 
 int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb)
 {
 	struct fb_info *info;
 	struct radeon_framebuffer *rfb = to_radeon_framebuffer(fb);
-	struct radeon_object *robj;
+	struct radeon_bo *rbo;
+	int r;
 
 	if (!fb) {
 		return -EINVAL;
@@ -336,10 +354,14 @@
 	info = fb->fbdev;
 	if (info) {
 		struct radeon_fb_device *rfbdev = info->par;
-		robj = rfb->obj->driver_private;
+		rbo = rfb->obj->driver_private;
 		unregister_framebuffer(info);
-		radeon_object_kunmap(robj);
-		radeon_object_unpin(robj);
+		r = radeon_bo_reserve(rbo, false);
+		if (likely(r == 0)) {
+			radeon_bo_kunmap(rbo);
+			radeon_bo_unpin(rbo);
+			radeon_bo_unreserve(rbo);
+		}
 		drm_fb_helper_free(&rfbdev->helper);
 		framebuffer_release(info);
 	}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_object.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_object.c
@@ -34,100 +34,62 @@
 #include "radeon_drm.h"
 #include "radeon.h"
 
-struct radeon_object {
-	struct ttm_buffer_object	tobj;
-	struct list_head		list;
-	struct radeon_device		*rdev;
-	struct drm_gem_object		*gobj;
-	struct ttm_bo_kmap_obj		kmap;
-	unsigned			pin_count;
-	uint64_t			gpu_addr;
-	void				*kptr;
-	bool				is_iomem;
-	uint32_t			tiling_flags;
-	uint32_t			pitch;
-	int				surface_reg;
-};
 
 int radeon_ttm_init(struct radeon_device *rdev);
 void radeon_ttm_fini(struct radeon_device *rdev);
+static void radeon_bo_clear_surface_reg(struct radeon_bo *bo);
 
 /*
  * To exclude mutual BO access we rely on bo_reserve exclusion, as all
  * function are calling it.
  */
 
-static int radeon_object_reserve(struct radeon_object *robj, bool interruptible)
+static void radeon_ttm_bo_destroy(struct ttm_buffer_object *tbo)
 {
-	return ttm_bo_reserve(&robj->tobj, interruptible, false, false, 0);
-}
+	struct radeon_bo *bo;
 
-static void radeon_object_unreserve(struct radeon_object *robj)
-{
-	ttm_bo_unreserve(&robj->tobj);
+	bo = container_of(tbo, struct radeon_bo, tbo);
+	mutex_lock(&bo->rdev->gem.mutex);
+	list_del_init(&bo->list);
+	mutex_unlock(&bo->rdev->gem.mutex);
+	radeon_bo_clear_surface_reg(bo);
+	kfree(bo);
 }
 
-static void radeon_ttm_object_object_destroy(struct ttm_buffer_object *tobj)
+bool radeon_ttm_bo_is_radeon_bo(struct ttm_buffer_object *bo)
 {
-	struct radeon_object *robj;
-
-	robj = container_of(tobj, struct radeon_object, tobj);
-	list_del_init(&robj->list);
-	radeon_object_clear_surface_reg(robj);
-	kfree(robj);
+	if (bo->destroy == &radeon_ttm_bo_destroy)
+		return true;
+	return false;
 }
 
-static inline void radeon_object_gpu_addr(struct radeon_object *robj)
+void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain)
 {
-	/* Default gpu address */
-	robj->gpu_addr = 0xFFFFFFFFFFFFFFFFULL;
-	if (robj->tobj.mem.mm_node == NULL) {
-		return;
-	}
-	robj->gpu_addr = ((u64)robj->tobj.mem.mm_node->start) << PAGE_SHIFT;
-	switch (robj->tobj.mem.mem_type) {
-	case TTM_PL_VRAM:
-		robj->gpu_addr += (u64)robj->rdev->mc.vram_location;
-		break;
-	case TTM_PL_TT:
-		robj->gpu_addr += (u64)robj->rdev->mc.gtt_location;
-		break;
-	default:
-		DRM_ERROR("Unknown placement %d\n", robj->tobj.mem.mem_type);
-		robj->gpu_addr = 0xFFFFFFFFFFFFFFFFULL;
-		return;
-	}
-}
+	u32 c = 0;
 
-static inline uint32_t radeon_object_flags_from_domain(uint32_t domain)
-{
-	uint32_t flags = 0;
-	if (domain & RADEON_GEM_DOMAIN_VRAM) {
-		flags |= TTM_PL_FLAG_VRAM | TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED;
-	}
-	if (domain & RADEON_GEM_DOMAIN_GTT) {
-		flags |= TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING;
-	}
-	if (domain & RADEON_GEM_DOMAIN_CPU) {
-		flags |= TTM_PL_FLAG_SYSTEM | TTM_PL_MASK_CACHING;
-	}
-	if (!flags) {
-		flags |= TTM_PL_FLAG_SYSTEM | TTM_PL_MASK_CACHING;
-	}
-	return flags;
+	rbo->placement.fpfn = 0;
+	rbo->placement.lpfn = 0;
+	rbo->placement.placement = rbo->placements;
+	rbo->placement.busy_placement = rbo->placements;
+	if (domain & RADEON_GEM_DOMAIN_VRAM)
+		rbo->placements[c++] = TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED |
+					TTM_PL_FLAG_VRAM;
+	if (domain & RADEON_GEM_DOMAIN_GTT)
+		rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
+	if (domain & RADEON_GEM_DOMAIN_CPU)
+		rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
+	if (!c)
+		rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
+	rbo->placement.num_placement = c;
+	rbo->placement.num_busy_placement = c;
 }
 
-int radeon_object_create(struct radeon_device *rdev,
-			 struct drm_gem_object *gobj,
-			 unsigned long size,
-			 bool kernel,
-			 uint32_t domain,
-			 bool interruptible,
-			 struct radeon_object **robj_ptr)
+int radeon_bo_create(struct radeon_device *rdev, struct drm_gem_object *gobj,
+			unsigned long size, bool kernel, u32 domain,
+			struct radeon_bo **bo_ptr)
 {
-	struct radeon_object *robj;
+	struct radeon_bo *bo;
 	enum ttm_bo_type type;
-	uint32_t flags;
 	int r;
 
 	if (unlikely(rdev->mman.bdev.dev_mapping == NULL)) {
@@ -138,238 +100,167 @@
 	} else {
 		type = ttm_bo_type_device;
 	}
-	*robj_ptr = NULL;
-	robj = kzalloc(sizeof(struct radeon_object), GFP_KERNEL);
-	if (robj == NULL) {
+	*bo_ptr = NULL;
+
+retry:
+	bo = kzalloc(sizeof(struct radeon_bo), GFP_KERNEL);
+	if (bo == NULL)
 		return -ENOMEM;
-	}
-	robj->rdev = rdev;
-	robj->gobj = gobj;
-	robj->surface_reg = -1;
-	INIT_LIST_HEAD(&robj->list);
-
-	flags = radeon_object_flags_from_domain(domain);
-	r = ttm_buffer_object_init(&rdev->mman.bdev, &robj->tobj, size, type, flags,
-				   0, 0, false, NULL, size,
-				   &radeon_ttm_object_object_destroy);
+	bo->rdev = rdev;
+	bo->gobj = gobj;
+	bo->surface_reg = -1;
+	INIT_LIST_HEAD(&bo->list);
+	radeon_ttm_placement_from_domain(bo, domain);
+	/* Kernel allocation are uninterruptible */
+	r = ttm_bo_init(&rdev->mman.bdev, &bo->tbo, size, type,
+			&bo->placement, 0, 0, !kernel, NULL, size,
+			&radeon_ttm_bo_destroy);
 	if (unlikely(r != 0)) {
-		/* ttm call radeon_ttm_object_object_destroy if error happen */
-		DRM_ERROR("Failed to allocate TTM object (%ld, 0x%08X, %u)\n",
-			  size, flags, 0);
+		if (r != -ERESTARTSYS) {
+			if (domain == RADEON_GEM_DOMAIN_VRAM) {
+				domain |= RADEON_GEM_DOMAIN_GTT;
+				goto retry;
+			}
+			dev_err(rdev->dev,
+				"object_init failed for (%lu, 0x%08X)\n",
+				size, domain);
+		}
 		return r;
 	}
-	*robj_ptr = robj;
+	*bo_ptr = bo;
 	if (gobj) {
-		list_add_tail(&robj->list, &rdev->gem.objects);
+		mutex_lock(&bo->rdev->gem.mutex);
+		list_add_tail(&bo->list, &rdev->gem.objects);
+		mutex_unlock(&bo->rdev->gem.mutex);
 	}
 	return 0;
 }
 
-int radeon_object_kmap(struct radeon_object *robj, void **ptr)
+int radeon_bo_kmap(struct radeon_bo *bo, void **ptr)
 {
+	bool is_iomem;
 	int r;
 
-	spin_lock(&robj->tobj.lock);
-	if (robj->kptr) {
+	if (bo->kptr) {
 		if (ptr) {
-			*ptr = robj->kptr;
+			*ptr = bo->kptr;
 		}
-		spin_unlock(&robj->tobj.lock);
 		return 0;
 	}
-	spin_unlock(&robj->tobj.lock);
-	r = ttm_bo_kmap(&robj->tobj, 0, robj->tobj.num_pages, &robj->kmap);
+	r = ttm_bo_kmap(&bo->tbo, 0, bo->tbo.num_pages, &bo->kmap);
 	if (r) {
 		return r;
 	}
-	spin_lock(&robj->tobj.lock);
-	robj->kptr = ttm_kmap_obj_virtual(&robj->kmap, &robj->is_iomem);
-	spin_unlock(&robj->tobj.lock);
+	bo->kptr = ttm_kmap_obj_virtual(&bo->kmap, &is_iomem);
 	if (ptr) {
-		*ptr = robj->kptr;
+		*ptr = bo->kptr;
 	}
-	radeon_object_check_tiling(robj, 0, 0);
+	radeon_bo_check_tiling(bo, 0, 0);
 	return 0;
 }
 
-void radeon_object_kunmap(struct radeon_object *robj)
+void radeon_bo_kunmap(struct radeon_bo *bo)
 {
-	spin_lock(&robj->tobj.lock);
-	if (robj->kptr == NULL) {
-		spin_unlock(&robj->tobj.lock);
+	if (bo->kptr == NULL)
 		return;
-	}
-	robj->kptr = NULL;
-	spin_unlock(&robj->tobj.lock);
-	radeon_object_check_tiling(robj, 0, 0);
-	ttm_bo_kunmap(&robj->kmap);
+	bo->kptr = NULL;
+	radeon_bo_check_tiling(bo, 0, 0);
+	ttm_bo_kunmap(&bo->kmap);
 }
 
-void radeon_object_unref(struct radeon_object **robj)
+void radeon_bo_unref(struct radeon_bo **bo)
 {
-	struct ttm_buffer_object *tobj;
+	struct ttm_buffer_object *tbo;
 
-	if ((*robj) == NULL) {
+	if ((*bo) == NULL)
 		return;
-	}
-	tobj = &((*robj)->tobj);
-	ttm_bo_unref(&tobj);
-	if (tobj == NULL) {
-		*robj = NULL;
-	}
+	tbo = &((*bo)->tbo);
+	ttm_bo_unref(&tbo);
+	if (tbo == NULL)
+		*bo = NULL;
 }
 
-int radeon_object_mmap(struct radeon_object *robj, uint64_t *offset)
+int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr)
 {
-	*offset = robj->tobj.addr_space_offset;
-	return 0;
-}
+	int r, i;
 
-int radeon_object_pin(struct radeon_object *robj, uint32_t domain,
-		      uint64_t *gpu_addr)
-{
-	uint32_t flags;
-	uint32_t tmp;
-	int r;
-
-	flags = radeon_object_flags_from_domain(domain);
-	spin_lock(&robj->tobj.lock);
-	if (robj->pin_count) {
-		robj->pin_count++;
-		if (gpu_addr != NULL) {
-			*gpu_addr = robj->gpu_addr;
-		}
-		spin_unlock(&robj->tobj.lock);
+	radeon_ttm_placement_from_domain(bo, domain);
+	if (bo->pin_count) {
+		bo->pin_count++;
+		if (gpu_addr)
+			*gpu_addr = radeon_bo_gpu_offset(bo);
 		return 0;
 	}
-	spin_unlock(&robj->tobj.lock);
-	r = radeon_object_reserve(robj, false);
-	if (unlikely(r != 0)) {
-		DRM_ERROR("radeon: failed to reserve object for pinning it.\n");
-		return r;
+	radeon_ttm_placement_from_domain(bo, domain);
+	for (i = 0; i < bo->placement.num_placement; i++)
+		bo->placements[i] |= TTM_PL_FLAG_NO_EVICT;
+	r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
+	if (likely(r == 0)) {
+		bo->pin_count = 1;
+		if (gpu_addr != NULL)
+			*gpu_addr = radeon_bo_gpu_offset(bo);
 	}
-	tmp = robj->tobj.mem.placement;
-	ttm_flag_masked(&tmp, flags, TTM_PL_MASK_MEM);
-	robj->tobj.proposed_placement = tmp | TTM_PL_FLAG_NO_EVICT | TTM_PL_MASK_CACHING;
-	r = ttm_buffer_object_validate(&robj->tobj,
-				       robj->tobj.proposed_placement,
-				       false, false);
-	radeon_object_gpu_addr(robj);
-	if (gpu_addr != NULL) {
-		*gpu_addr = robj->gpu_addr;
-	}
-	robj->pin_count = 1;
-	if (unlikely(r != 0)) {
-		DRM_ERROR("radeon: failed to pin object.\n");
-	}
-	radeon_object_unreserve(robj);
+	if (unlikely(r != 0))
+		dev_err(bo->rdev->dev, "%p pin failed\n", bo);
 	return r;
 }
 
-void radeon_object_unpin(struct radeon_object *robj)
+int radeon_bo_unpin(struct radeon_bo *bo)
 {
-	uint32_t flags;
-	int r;
-
-	spin_lock(&robj->tobj.lock);
-	if (!robj->pin_count) {
-		spin_unlock(&robj->tobj.lock);
-		printk(KERN_WARNING "Unpin not necessary for %p !\n", robj);
-		return;
-	}
-	robj->pin_count--;
-	if (robj->pin_count) {
-		spin_unlock(&robj->tobj.lock);
-		return;
-	}
-	spin_unlock(&robj->tobj.lock);
-	r = radeon_object_reserve(robj, false);
-	if (unlikely(r != 0)) {
-		DRM_ERROR("radeon: failed to reserve object for unpinning it.\n");
-		return;
-	}
-	flags = robj->tobj.mem.placement;
-	robj->tobj.proposed_placement = flags & ~TTM_PL_FLAG_NO_EVICT;
-	r = ttm_buffer_object_validate(&robj->tobj,
-				       robj->tobj.proposed_placement,
-				       false, false);
-	if (unlikely(r != 0)) {
-		DRM_ERROR("radeon: failed to unpin buffer.\n");
-	}
-	radeon_object_unreserve(robj);
-}
+	int r, i;
 
-int radeon_object_wait(struct radeon_object *robj)
-{
-	int r = 0;
-
-	/* FIXME: should use block reservation instead */
-	r = radeon_object_reserve(robj, true);
-	if (unlikely(r != 0)) {
-		DRM_ERROR("radeon: failed to reserve object for waiting.\n");
-		return r;
-	}
-	spin_lock(&robj->tobj.lock);
-	if (robj->tobj.sync_obj) {
-		r = ttm_bo_wait(&robj->tobj, true, true, false);
-	}
-	spin_unlock(&robj->tobj.lock);
-	radeon_object_unreserve(robj);
-	return r;
-}
-
-int radeon_object_busy_domain(struct radeon_object *robj, uint32_t *cur_placement)
-{
-	int r = 0;
-
-	r = radeon_object_reserve(robj, true);
-	if (unlikely(r != 0)) {
-		DRM_ERROR("radeon: failed to reserve object for waiting.\n");
-		return r;
-	}
-	spin_lock(&robj->tobj.lock);
-	*cur_placement = robj->tobj.mem.mem_type;
-	if (robj->tobj.sync_obj) {
-		r = ttm_bo_wait(&robj->tobj, true, true, true);
+	if (!bo->pin_count) {
+		dev_warn(bo->rdev->dev, "%p unpin not necessary\n", bo);
+		return 0;
 	}
-	spin_unlock(&robj->tobj.lock);
-	radeon_object_unreserve(robj);
+	bo->pin_count--;
+	if (bo->pin_count)
+		return 0;
+	for (i = 0; i < bo->placement.num_placement; i++)
+		bo->placements[i] &= ~TTM_PL_FLAG_NO_EVICT;
+	r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
+	if (unlikely(r != 0))
+		dev_err(bo->rdev->dev, "%p validate failed for unpin\n", bo);
 	return r;
 }
 
-int radeon_object_evict_vram(struct radeon_device *rdev)
+int radeon_bo_evict_vram(struct radeon_device *rdev)
 {
-	if (rdev->flags & RADEON_IS_IGP) {
-		/* Useless to evict on IGP chips */
-		return 0;
+	/* late 2.6.33 fix IGP hibernate - we need pm ops to do this correct */
+	if (0 && (rdev->flags & RADEON_IS_IGP)) {
+		if (rdev->mc.igp_sideport_enabled == false)
+			/* Useless to evict on IGP chips */
+			return 0;
 	}
 	return ttm_bo_evict_mm(&rdev->mman.bdev, TTM_PL_VRAM);
 }
 
-void radeon_object_force_delete(struct radeon_device *rdev)
+void radeon_bo_force_delete(struct radeon_device *rdev)
 {
-	struct radeon_object *robj, *n;
+	struct radeon_bo *bo, *n;
 	struct drm_gem_object *gobj;
 
 	if (list_empty(&rdev->gem.objects)) {
 		return;
 	}
-	DRM_ERROR("Userspace still has active objects !\n");
-	list_for_each_entry_safe(robj, n, &rdev->gem.objects, list) {
+	dev_err(rdev->dev, "Userspace still has active objects !\n");
+	list_for_each_entry_safe(bo, n, &rdev->gem.objects, list) {
 		mutex_lock(&rdev->ddev->struct_mutex);
-		gobj = robj->gobj;
-		DRM_ERROR("Force free for (%p,%p,%lu,%lu)\n",
-			  gobj, robj, (unsigned long)gobj->size,
-			  *((unsigned long *)&gobj->refcount));
-		list_del_init(&robj->list);
-		radeon_object_unref(&robj);
+		gobj = bo->gobj;
+		dev_err(rdev->dev, "%p %p %lu %lu force free\n",
+			gobj, bo, (unsigned long)gobj->size,
+			*((unsigned long *)&gobj->refcount));
+		mutex_lock(&bo->rdev->gem.mutex);
+		list_del_init(&bo->list);
+		mutex_unlock(&bo->rdev->gem.mutex);
+		radeon_bo_unref(&bo);
 		gobj->driver_private = NULL;
 		drm_gem_object_unreference(gobj);
 		mutex_unlock(&rdev->ddev->struct_mutex);
 	}
 }
 
-int radeon_object_init(struct radeon_device *rdev)
+int radeon_bo_init(struct radeon_device *rdev)
 {
 	/* Add an MTRR for the VRAM */
 	rdev->mc.vram_mtrr = mtrr_add(rdev->mc.aper_base, rdev->mc.aper_size,
@@ -382,13 +273,13 @@
 	return radeon_ttm_init(rdev);
 }
 
-void radeon_object_fini(struct radeon_device *rdev)
+void radeon_bo_fini(struct radeon_device *rdev)
 {
 	radeon_ttm_fini(rdev);
 }
 
-void radeon_object_list_add_object(struct radeon_object_list *lobj,
-				   struct list_head *head)
+void radeon_bo_list_add_object(struct radeon_bo_list *lobj,
+				struct list_head *head)
 {
 	if (lobj->wdomain) {
 		list_add(&lobj->list, head);
@@ -397,125 +288,105 @@
 	}
 }
 
-int radeon_object_list_reserve(struct list_head *head)
+int radeon_bo_list_reserve(struct list_head *head)
 {
-	struct radeon_object_list *lobj;
+	struct radeon_bo_list *lobj;
 	int r;
 
 	list_for_each_entry(lobj, head, list){
-		if (!lobj->robj->pin_count) {
-			r = radeon_object_reserve(lobj->robj, true);
-			if (unlikely(r != 0)) {
-				DRM_ERROR("radeon: failed to reserve object.\n");
-				return r;
-			}
-		} else {
-		}
+		r = radeon_bo_reserve(lobj->bo, false);
+		if (unlikely(r != 0))
+			return r;
 	}
 	return 0;
 }
 
-void radeon_object_list_unreserve(struct list_head *head)
+void radeon_bo_list_unreserve(struct list_head *head)
 {
-	struct radeon_object_list *lobj;
+	struct radeon_bo_list *lobj;
 
 	list_for_each_entry(lobj, head, list) {
-		if (!lobj->robj->pin_count) {
-			radeon_object_unreserve(lobj->robj);
-		}
+		/* only unreserve object we successfully reserved */
+		if (radeon_bo_is_reserved(lobj->bo))
+			radeon_bo_unreserve(lobj->bo);
 	}
 }
 
-int radeon_object_list_validate(struct list_head *head, void *fence)
+int radeon_bo_list_validate(struct list_head *head)
 {
-	struct radeon_object_list *lobj;
-	struct radeon_object *robj;
-	struct radeon_fence *old_fence = NULL;
+	struct radeon_bo_list *lobj;
+	struct radeon_bo *bo;
+	u32 domain;
 	int r;
 
-	r = radeon_object_list_reserve(head);
+	r = radeon_bo_list_reserve(head);
 	if (unlikely(r != 0)) {
-		radeon_object_list_unreserve(head);
 		return r;
 	}
 	list_for_each_entry(lobj, head, list) {
-		robj = lobj->robj;
-		if (!robj->pin_count) {
-			if (lobj->wdomain) {
-				robj->tobj.proposed_placement =
-					radeon_object_flags_from_domain(lobj->wdomain);
-			} else {
-				robj->tobj.proposed_placement =
-					radeon_object_flags_from_domain(lobj->rdomain);
-			}
-			r = ttm_buffer_object_validate(&robj->tobj,
-						       robj->tobj.proposed_placement,
-						       true, false);
+		bo = lobj->bo;
+		if (!bo->pin_count) {
+			domain = lobj->wdomain ? lobj->wdomain : lobj->rdomain;
+			
+		retry:
+			radeon_ttm_placement_from_domain(bo, domain);
+			r = ttm_bo_validate(&bo->tbo, &bo->placement,
+						true, false);
 			if (unlikely(r)) {
-				DRM_ERROR("radeon: failed to validate.\n");
+				if (r != -ERESTARTSYS && domain == RADEON_GEM_DOMAIN_VRAM) {
+					domain |= RADEON_GEM_DOMAIN_GTT;
+					goto retry;
+				}
 				return r;
 			}
-			radeon_object_gpu_addr(robj);
-		}
-		lobj->gpu_offset = robj->gpu_addr;
-		lobj->tiling_flags = robj->tiling_flags;
-		if (fence) {
-			old_fence = (struct radeon_fence *)robj->tobj.sync_obj;
-			robj->tobj.sync_obj = radeon_fence_ref(fence);
-			robj->tobj.sync_obj_arg = NULL;
-		}
-		if (old_fence) {
-			radeon_fence_unref(&old_fence);
 		}
+		lobj->gpu_offset = radeon_bo_gpu_offset(bo);
+		lobj->tiling_flags = bo->tiling_flags;
 	}
 	return 0;
 }
 
-void radeon_object_list_unvalidate(struct list_head *head)
+void radeon_bo_list_fence(struct list_head *head, void *fence)
 {
-	struct radeon_object_list *lobj;
+	struct radeon_bo_list *lobj;
+	struct radeon_bo *bo;
 	struct radeon_fence *old_fence = NULL;
 
 	list_for_each_entry(lobj, head, list) {
-		old_fence = (struct radeon_fence *)lobj->robj->tobj.sync_obj;
-		lobj->robj->tobj.sync_obj = NULL;
+		bo = lobj->bo;
+		spin_lock(&bo->tbo.lock);
+		old_fence = (struct radeon_fence *)bo->tbo.sync_obj;
+		bo->tbo.sync_obj = radeon_fence_ref(fence);
+		bo->tbo.sync_obj_arg = NULL;
+		spin_unlock(&bo->tbo.lock);
 		if (old_fence) {
 			radeon_fence_unref(&old_fence);
 		}
 	}
-	radeon_object_list_unreserve(head);
 }
 
-void radeon_object_list_clean(struct list_head *head)
-{
-	radeon_object_list_unreserve(head);
-}
-
-int radeon_object_fbdev_mmap(struct radeon_object *robj,
+int radeon_bo_fbdev_mmap(struct radeon_bo *bo,
 			     struct vm_area_struct *vma)
 {
-	return ttm_fbdev_mmap(vma, &robj->tobj);
+	return ttm_fbdev_mmap(vma, &bo->tbo);
 }
 
-unsigned long radeon_object_size(struct radeon_object *robj)
+int radeon_bo_get_surface_reg(struct radeon_bo *bo)
 {
-	return robj->tobj.num_pages << PAGE_SHIFT;
-}
-
-int radeon_object_get_surface_reg(struct radeon_object *robj)
-{
-	struct radeon_device *rdev = robj->rdev;
+	struct radeon_device *rdev = bo->rdev;
 	struct radeon_surface_reg *reg;
-	struct radeon_object *old_object;
+	struct radeon_bo *old_object;
 	int steal;
 	int i;
 
-	if (!robj->tiling_flags)
+	BUG_ON(!atomic_read(&bo->tbo.reserved));
+
+	if (!bo->tiling_flags)
 		return 0;
 
-	if (robj->surface_reg >= 0) {
-		reg = &rdev->surface_regs[robj->surface_reg];
-		i = robj->surface_reg;
+	if (bo->surface_reg >= 0) {
+		reg = &rdev->surface_regs[bo->surface_reg];
+		i = bo->surface_reg;
 		goto out;
 	}
 
@@ -523,10 +394,10 @@
 	for (i = 0; i < RADEON_GEM_MAX_SURFACES; i++) {
 
 		reg = &rdev->surface_regs[i];
-		if (!reg->robj)
+		if (!reg->bo)
 			break;
 
-		old_object = reg->robj;
+		old_object = reg->bo;
 		if (old_object->pin_count == 0)
 			steal = i;
 	}
@@ -537,91 +408,107 @@
 			return -ENOMEM;
 		/* find someone with a surface reg and nuke their BO */
 		reg = &rdev->surface_regs[steal];
-		old_object = reg->robj;
+		old_object = reg->bo;
 		/* blow away the mapping */
 		DRM_DEBUG("stealing surface reg %d from %p\n", steal, old_object);
-		ttm_bo_unmap_virtual(&old_object->tobj);
+		ttm_bo_unmap_virtual(&old_object->tbo);
 		old_object->surface_reg = -1;
 		i = steal;
 	}
 
-	robj->surface_reg = i;
-	reg->robj = robj;
+	bo->surface_reg = i;
+	reg->bo = bo;
 
 out:
-	radeon_set_surface_reg(rdev, i, robj->tiling_flags, robj->pitch,
-			       robj->tobj.mem.mm_node->start << PAGE_SHIFT,
-			       robj->tobj.num_pages << PAGE_SHIFT);
+	radeon_set_surface_reg(rdev, i, bo->tiling_flags, bo->pitch,
+			       bo->tbo.mem.mm_node->start << PAGE_SHIFT,
+			       bo->tbo.num_pages << PAGE_SHIFT);
 	return 0;
 }
 
-void radeon_object_clear_surface_reg(struct radeon_object *robj)
+static void radeon_bo_clear_surface_reg(struct radeon_bo *bo)
 {
-	struct radeon_device *rdev = robj->rdev;
+	struct radeon_device *rdev = bo->rdev;
 	struct radeon_surface_reg *reg;
 
-	if (robj->surface_reg == -1)
+	if (bo->surface_reg == -1)
 		return;
 
-	reg = &rdev->surface_regs[robj->surface_reg];
-	radeon_clear_surface_reg(rdev, robj->surface_reg);
+	reg = &rdev->surface_regs[bo->surface_reg];
+	radeon_clear_surface_reg(rdev, bo->surface_reg);
 
-	reg->robj = NULL;
-	robj->surface_reg = -1;
+	reg->bo = NULL;
+	bo->surface_reg = -1;
 }
 
-void radeon_object_set_tiling_flags(struct radeon_object *robj,
-				    uint32_t tiling_flags, uint32_t pitch)
+int radeon_bo_set_tiling_flags(struct radeon_bo *bo,
+				uint32_t tiling_flags, uint32_t pitch)
 {
-	robj->tiling_flags = tiling_flags;
-	robj->pitch = pitch;
+	int r;
+
+	r = radeon_bo_reserve(bo, false);
+	if (unlikely(r != 0))
+		return r;
+	bo->tiling_flags = tiling_flags;
+	bo->pitch = pitch;
+	radeon_bo_unreserve(bo);
+	return 0;
 }
 
-void radeon_object_get_tiling_flags(struct radeon_object *robj,
-				    uint32_t *tiling_flags,
-				    uint32_t *pitch)
+void radeon_bo_get_tiling_flags(struct radeon_bo *bo,
+				uint32_t *tiling_flags,
+				uint32_t *pitch)
 {
+	BUG_ON(!atomic_read(&bo->tbo.reserved));
 	if (tiling_flags)
-		*tiling_flags = robj->tiling_flags;
+		*tiling_flags = bo->tiling_flags;
 	if (pitch)
-		*pitch = robj->pitch;
+		*pitch = bo->pitch;
 }
 
-int radeon_object_check_tiling(struct radeon_object *robj, bool has_moved,
-			       bool force_drop)
+int radeon_bo_check_tiling(struct radeon_bo *bo, bool has_moved,
+				bool force_drop)
 {
-	if (!(robj->tiling_flags & RADEON_TILING_SURFACE))
+	BUG_ON(!atomic_read(&bo->tbo.reserved));
+
+	if (!(bo->tiling_flags & RADEON_TILING_SURFACE))
 		return 0;
 
 	if (force_drop) {
-		radeon_object_clear_surface_reg(robj);
+		radeon_bo_clear_surface_reg(bo);
 		return 0;
 	}
 
-	if (robj->tobj.mem.mem_type != TTM_PL_VRAM) {
+	if (bo->tbo.mem.mem_type != TTM_PL_VRAM) {
 		if (!has_moved)
 			return 0;
 
-		if (robj->surface_reg >= 0)
-			radeon_object_clear_surface_reg(robj);
+		if (bo->surface_reg >= 0)
+			radeon_bo_clear_surface_reg(bo);
 		return 0;
 	}
 
-	if ((robj->surface_reg >= 0) && !has_moved)
+	if ((bo->surface_reg >= 0) && !has_moved)
 		return 0;
 
-	return radeon_object_get_surface_reg(robj);
+	return radeon_bo_get_surface_reg(bo);
 }
 
 void radeon_bo_move_notify(struct ttm_buffer_object *bo,
-			  struct ttm_mem_reg *mem)
+			   struct ttm_mem_reg *mem)
 {
-	struct radeon_object *robj = container_of(bo, struct radeon_object, tobj);
-	radeon_object_check_tiling(robj, 0, 1);
+	struct radeon_bo *rbo;
+	if (!radeon_ttm_bo_is_radeon_bo(bo))
+		return;
+	rbo = container_of(bo, struct radeon_bo, tbo);
+	radeon_bo_check_tiling(rbo, 0, 1);
 }
 
 void radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
 {
-	struct radeon_object *robj = container_of(bo, struct radeon_object, tobj);
-	radeon_object_check_tiling(robj, 0, 0);
+	struct radeon_bo *rbo;
+	if (!radeon_ttm_bo_is_radeon_bo(bo))
+		return;
+	rbo = container_of(bo, struct radeon_bo, tbo);
+	radeon_bo_check_tiling(rbo, 0, 0);
 }
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_clocks.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_clocks.c
@@ -44,6 +44,10 @@
 
 	ref_div =
 	    RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & RADEON_M_SPLL_REF_DIV_MASK;
+
+	if (ref_div == 0)
+		return 0;
+
 	sclk = fb_div / ref_div;
 
 	post_div = RREG32_PLL(RADEON_SCLK_CNTL) & RADEON_SCLK_SRC_SEL_MASK;
@@ -52,13 +56,13 @@
 	else if (post_div == 3)
 		sclk >>= 2;
 	else if (post_div == 4)
-		sclk >>= 4;
+		sclk >>= 3;
 
 	return sclk;
 }
 
 /* 10 khz */
-static uint32_t radeon_legacy_get_memory_clock(struct radeon_device *rdev)
+uint32_t radeon_legacy_get_memory_clock(struct radeon_device *rdev)
 {
 	struct radeon_pll *mpll = &rdev->clock.mpll;
 	uint32_t fb_div, ref_div, post_div, mclk;
@@ -70,6 +74,10 @@
 
 	ref_div =
 	    RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & RADEON_M_SPLL_REF_DIV_MASK;
+
+	if (ref_div == 0)
+		return 0;
+
 	mclk = fb_div / ref_div;
 
 	post_div = RREG32_PLL(RADEON_MCLK_CNTL) & 0x7;
@@ -78,7 +86,7 @@
 	else if (post_div == 3)
 		mclk >>= 2;
 	else if (post_div == 4)
-		mclk >>= 4;
+		mclk >>= 3;
 
 	return mclk;
 }
@@ -98,8 +106,19 @@
 		ret = radeon_combios_get_clock_info(dev);
 
 	if (ret) {
-		if (p1pll->reference_div < 2)
-			p1pll->reference_div = 12;
+		if (p1pll->reference_div < 2) {
+			if (!ASIC_IS_AVIVO(rdev)) {
+				u32 tmp = RREG32_PLL(RADEON_PPLL_REF_DIV);
+				if (ASIC_IS_R300(rdev))
+					p1pll->reference_div =
+						(tmp & R300_PPLL_REF_DIV_ACC_MASK) >> R300_PPLL_REF_DIV_ACC_SHIFT;
+				else
+					p1pll->reference_div = tmp & RADEON_PPLL_REF_DIV_MASK;
+				if (p1pll->reference_div < 2)
+					p1pll->reference_div = 12;
+			} else
+				p1pll->reference_div = 12;
+		}
 		if (p2pll->reference_div < 2)
 			p2pll->reference_div = 12;
 		if (rdev->family < CHIP_RS600) {
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_asic.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_asic.h
@@ -33,6 +33,7 @@
  */
 uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev);
 void radeon_legacy_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock);
+uint32_t radeon_legacy_get_memory_clock(struct radeon_device *rdev);
 void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable);
 
 uint32_t radeon_atom_get_engine_clock(struct radeon_device *rdev);
@@ -76,6 +77,11 @@
 void r100_bandwidth_update(struct radeon_device *rdev);
 void r100_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib);
 int r100_ring_test(struct radeon_device *rdev);
+void r100_hpd_init(struct radeon_device *rdev);
+void r100_hpd_fini(struct radeon_device *rdev);
+bool r100_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd);
+void r100_hpd_set_polarity(struct radeon_device *rdev,
+			   enum radeon_hpd_id hpd);
 
 static struct radeon_asic r100_asic = {
 	.init = &r100_init,
@@ -100,13 +106,18 @@
 	.copy = &r100_copy_blit,
 	.get_engine_clock = &radeon_legacy_get_engine_clock,
 	.set_engine_clock = &radeon_legacy_set_engine_clock,
-	.get_memory_clock = NULL,
+	.get_memory_clock = &radeon_legacy_get_memory_clock,
 	.set_memory_clock = NULL,
 	.set_pcie_lanes = NULL,
 	.set_clock_gating = &radeon_legacy_set_clock_gating,
 	.set_surface_reg = r100_set_surface_reg,
 	.clear_surface_reg = r100_clear_surface_reg,
 	.bandwidth_update = &r100_bandwidth_update,
+	.hpd_init = &r100_hpd_init,
+	.hpd_fini = &r100_hpd_fini,
+	.hpd_sense = &r100_hpd_sense,
+	.hpd_set_polarity = &r100_hpd_set_polarity,
+	.ioctl_wait_idle = NULL,
 };
 
 
@@ -155,13 +166,18 @@
 	.copy = &r100_copy_blit,
 	.get_engine_clock = &radeon_legacy_get_engine_clock,
 	.set_engine_clock = &radeon_legacy_set_engine_clock,
-	.get_memory_clock = NULL,
+	.get_memory_clock = &radeon_legacy_get_memory_clock,
 	.set_memory_clock = NULL,
 	.set_pcie_lanes = &rv370_set_pcie_lanes,
 	.set_clock_gating = &radeon_legacy_set_clock_gating,
 	.set_surface_reg = r100_set_surface_reg,
 	.clear_surface_reg = r100_clear_surface_reg,
 	.bandwidth_update = &r100_bandwidth_update,
+	.hpd_init = &r100_hpd_init,
+	.hpd_fini = &r100_hpd_fini,
+	.hpd_sense = &r100_hpd_sense,
+	.hpd_set_polarity = &r100_hpd_set_polarity,
+	.ioctl_wait_idle = NULL,
 };
 
 /*
@@ -201,6 +217,11 @@
 	.set_surface_reg = r100_set_surface_reg,
 	.clear_surface_reg = r100_clear_surface_reg,
 	.bandwidth_update = &r100_bandwidth_update,
+	.hpd_init = &r100_hpd_init,
+	.hpd_fini = &r100_hpd_fini,
+	.hpd_sense = &r100_hpd_sense,
+	.hpd_set_polarity = &r100_hpd_set_polarity,
+	.ioctl_wait_idle = NULL,
 };
 
 
@@ -238,13 +259,18 @@
 	.copy = &r100_copy_blit,
 	.get_engine_clock = &radeon_legacy_get_engine_clock,
 	.set_engine_clock = &radeon_legacy_set_engine_clock,
-	.get_memory_clock = NULL,
+	.get_memory_clock = &radeon_legacy_get_memory_clock,
 	.set_memory_clock = NULL,
 	.set_pcie_lanes = NULL,
 	.set_clock_gating = &radeon_legacy_set_clock_gating,
 	.set_surface_reg = r100_set_surface_reg,
 	.clear_surface_reg = r100_clear_surface_reg,
 	.bandwidth_update = &r100_bandwidth_update,
+	.hpd_init = &r100_hpd_init,
+	.hpd_fini = &r100_hpd_fini,
+	.hpd_sense = &r100_hpd_sense,
+	.hpd_set_polarity = &r100_hpd_set_polarity,
+	.ioctl_wait_idle = NULL,
 };
 
 
@@ -263,6 +289,12 @@
 uint32_t rs600_mc_rreg(struct radeon_device *rdev, uint32_t reg);
 void rs600_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
 void rs600_bandwidth_update(struct radeon_device *rdev);
+void rs600_hpd_init(struct radeon_device *rdev);
+void rs600_hpd_fini(struct radeon_device *rdev);
+bool rs600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd);
+void rs600_hpd_set_polarity(struct radeon_device *rdev,
+			    enum radeon_hpd_id hpd);
+
 static struct radeon_asic rs600_asic = {
 	.init = &rs600_init,
 	.fini = &rs600_fini,
@@ -290,7 +322,14 @@
 	.set_memory_clock = &radeon_atom_set_memory_clock,
 	.set_pcie_lanes = NULL,
 	.set_clock_gating = &radeon_atom_set_clock_gating,
+	.set_surface_reg = r100_set_surface_reg,
+	.clear_surface_reg = r100_clear_surface_reg,
 	.bandwidth_update = &rs600_bandwidth_update,
+	.hpd_init = &rs600_hpd_init,
+	.hpd_fini = &rs600_hpd_fini,
+	.hpd_sense = &rs600_hpd_sense,
+	.hpd_set_polarity = &rs600_hpd_set_polarity,
+	.ioctl_wait_idle = NULL,
 };
 
 
@@ -334,6 +373,11 @@
 	.set_surface_reg = r100_set_surface_reg,
 	.clear_surface_reg = r100_clear_surface_reg,
 	.bandwidth_update = &rs690_bandwidth_update,
+	.hpd_init = &rs600_hpd_init,
+	.hpd_fini = &rs600_hpd_fini,
+	.hpd_sense = &rs600_hpd_sense,
+	.hpd_set_polarity = &rs600_hpd_set_polarity,
+	.ioctl_wait_idle = NULL,
 };
 
 
@@ -381,6 +425,11 @@
 	.set_surface_reg = r100_set_surface_reg,
 	.clear_surface_reg = r100_clear_surface_reg,
 	.bandwidth_update = &rv515_bandwidth_update,
+	.hpd_init = &rs600_hpd_init,
+	.hpd_fini = &rs600_hpd_fini,
+	.hpd_sense = &rs600_hpd_sense,
+	.hpd_set_polarity = &rs600_hpd_set_polarity,
+	.ioctl_wait_idle = NULL,
 };
 
 
@@ -419,6 +468,11 @@
 	.set_surface_reg = r100_set_surface_reg,
 	.clear_surface_reg = r100_clear_surface_reg,
 	.bandwidth_update = &rv515_bandwidth_update,
+	.hpd_init = &rs600_hpd_init,
+	.hpd_fini = &rs600_hpd_fini,
+	.hpd_sense = &rs600_hpd_sense,
+	.hpd_set_polarity = &rs600_hpd_set_polarity,
+	.ioctl_wait_idle = NULL,
 };
 
 /*
@@ -455,6 +509,12 @@
 int r600_copy_blit(struct radeon_device *rdev,
 		   uint64_t src_offset, uint64_t dst_offset,
 		   unsigned num_pages, struct radeon_fence *fence);
+void r600_hpd_init(struct radeon_device *rdev);
+void r600_hpd_fini(struct radeon_device *rdev);
+bool r600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd);
+void r600_hpd_set_polarity(struct radeon_device *rdev,
+			   enum radeon_hpd_id hpd);
+extern void r600_ioctl_wait_idle(struct radeon_device *rdev, struct radeon_bo *bo);
 
 static struct radeon_asic r600_asic = {
 	.init = &r600_init,
@@ -470,6 +530,7 @@
 	.ring_ib_execute = &r600_ring_ib_execute,
 	.irq_set = &r600_irq_set,
 	.irq_process = &r600_irq_process,
+	.get_vblank_counter = &rs600_get_vblank_counter,
 	.fence_ring_emit = &r600_fence_ring_emit,
 	.cs_parse = &r600_cs_parse,
 	.copy_blit = &r600_copy_blit,
@@ -484,6 +545,11 @@
 	.set_surface_reg = r600_set_surface_reg,
 	.clear_surface_reg = r600_clear_surface_reg,
 	.bandwidth_update = &rv515_bandwidth_update,
+	.hpd_init = &r600_hpd_init,
+	.hpd_fini = &r600_hpd_fini,
+	.hpd_sense = &r600_hpd_sense,
+	.hpd_set_polarity = &r600_hpd_set_polarity,
+	.ioctl_wait_idle = r600_ioctl_wait_idle,
 };
 
 /*
@@ -509,6 +575,7 @@
 	.ring_ib_execute = &r600_ring_ib_execute,
 	.irq_set = &r600_irq_set,
 	.irq_process = &r600_irq_process,
+	.get_vblank_counter = &rs600_get_vblank_counter,
 	.fence_ring_emit = &r600_fence_ring_emit,
 	.cs_parse = &r600_cs_parse,
 	.copy_blit = &r600_copy_blit,
@@ -523,6 +590,11 @@
 	.set_surface_reg = r600_set_surface_reg,
 	.clear_surface_reg = r600_clear_surface_reg,
 	.bandwidth_update = &rv515_bandwidth_update,
+	.hpd_init = &r600_hpd_init,
+	.hpd_fini = &r600_hpd_fini,
+	.hpd_sense = &r600_hpd_sense,
+	.hpd_set_polarity = &r600_hpd_set_polarity,
+	.ioctl_wait_idle = r600_ioctl_wait_idle,
 };
 
 #endif
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon.h
@@ -28,8 +28,6 @@
 #ifndef __RADEON_H__
 #define __RADEON_H__
 
-#include "radeon_object.h"
-
 /* TODO: Here are things that needs to be done :
  *	- surface allocator & initializer : (bit like scratch reg) should
  *	  initialize HDP_ stuff on RS600, R600, R700 hw, well anythings
@@ -67,6 +65,11 @@
 #include <linux/list.h>
 #include <linux/kref.h>
 
+#include <ttm/ttm_bo_api.h>
+#include <ttm/ttm_bo_driver.h>
+#include <ttm/ttm_placement.h>
+#include <ttm/ttm_module.h>
+
 #include "radeon_family.h"
 #include "radeon_mode.h"
 #include "radeon_reg.h"
@@ -85,12 +88,15 @@
 extern int radeon_testing;
 extern int radeon_connector_table;
 extern int radeon_tv;
+extern int radeon_new_pll;
+extern int radeon_audio;
 
 /*
  * Copy from radeon_drv.h so we don't have to include both and have conflicting
  * symbol;
  */
 #define RADEON_MAX_USEC_TIMEOUT		100000	/* 100 ms */
+/* RADEON_IB_POOL_SIZE must be a power of 2 */
 #define RADEON_IB_POOL_SIZE		16
 #define RADEON_DEBUGFS_MAX_NUM_FILES	32
 #define RADEONFB_CONN_LIMIT		4
@@ -157,6 +163,7 @@
 	struct list_head		created;
 	struct list_head		emited;
 	struct list_head		signaled;
+	bool				initialized;
 };
 
 struct radeon_fence {
@@ -186,76 +193,63 @@
  * Tiling registers
  */
 struct radeon_surface_reg {
-	struct radeon_object *robj;
+	struct radeon_bo *bo;
 };
 
 #define RADEON_GEM_MAX_SURFACES 8
 
 /*
- * Radeon buffer.
+ * TTM.
  */
-struct radeon_object;
+struct radeon_mman {
+	struct ttm_bo_global_ref        bo_global_ref;
+	struct ttm_global_reference	mem_global_ref;
+	struct ttm_bo_device		bdev;
+	bool				mem_global_referenced;
+	bool				initialized;
+};
+
+struct radeon_bo {
+	/* Protected by gem.mutex */
+	struct list_head		list;
+	/* Protected by tbo.reserved */
+	u32				placements[3];
+	struct ttm_placement		placement;
+	struct ttm_buffer_object	tbo;
+	struct ttm_bo_kmap_obj		kmap;
+	unsigned			pin_count;
+	void				*kptr;
+	u32				tiling_flags;
+	u32				pitch;
+	int				surface_reg;
+	/* Constant after initialization */
+	struct radeon_device		*rdev;
+	struct drm_gem_object		*gobj;
+};
 
-struct radeon_object_list {
+struct radeon_bo_list {
 	struct list_head	list;
-	struct radeon_object	*robj;
+	struct radeon_bo	*bo;
 	uint64_t		gpu_offset;
 	unsigned		rdomain;
 	unsigned		wdomain;
-	uint32_t                tiling_flags;
+	u32			tiling_flags;
 };
 
-int radeon_object_init(struct radeon_device *rdev);
-void radeon_object_fini(struct radeon_device *rdev);
-int radeon_object_create(struct radeon_device *rdev,
-			 struct drm_gem_object *gobj,
-			 unsigned long size,
-			 bool kernel,
-			 uint32_t domain,
-			 bool interruptible,
-			 struct radeon_object **robj_ptr);
-int radeon_object_kmap(struct radeon_object *robj, void **ptr);
-void radeon_object_kunmap(struct radeon_object *robj);
-void radeon_object_unref(struct radeon_object **robj);
-int radeon_object_pin(struct radeon_object *robj, uint32_t domain,
-		      uint64_t *gpu_addr);
-void radeon_object_unpin(struct radeon_object *robj);
-int radeon_object_wait(struct radeon_object *robj);
-int radeon_object_busy_domain(struct radeon_object *robj, uint32_t *cur_placement);
-int radeon_object_evict_vram(struct radeon_device *rdev);
-int radeon_object_mmap(struct radeon_object *robj, uint64_t *offset);
-void radeon_object_force_delete(struct radeon_device *rdev);
-void radeon_object_list_add_object(struct radeon_object_list *lobj,
-				   struct list_head *head);
-int radeon_object_list_validate(struct list_head *head, void *fence);
-void radeon_object_list_unvalidate(struct list_head *head);
-void radeon_object_list_clean(struct list_head *head);
-int radeon_object_fbdev_mmap(struct radeon_object *robj,
-			     struct vm_area_struct *vma);
-unsigned long radeon_object_size(struct radeon_object *robj);
-void radeon_object_clear_surface_reg(struct radeon_object *robj);
-int radeon_object_check_tiling(struct radeon_object *robj, bool has_moved,
-			       bool force_drop);
-void radeon_object_set_tiling_flags(struct radeon_object *robj,
-				    uint32_t tiling_flags, uint32_t pitch);
-void radeon_object_get_tiling_flags(struct radeon_object *robj, uint32_t *tiling_flags, uint32_t *pitch);
-void radeon_bo_move_notify(struct ttm_buffer_object *bo,
-			   struct ttm_mem_reg *mem);
-void radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo);
 /*
  * GEM objects.
  */
 struct radeon_gem {
+	struct mutex		mutex;
 	struct list_head	objects;
 };
 
 int radeon_gem_init(struct radeon_device *rdev);
 void radeon_gem_fini(struct radeon_device *rdev);
 int radeon_gem_object_create(struct radeon_device *rdev, int size,
-			     int alignment, int initial_domain,
-			     bool discardable, bool kernel,
-			     bool interruptible,
-			     struct drm_gem_object **obj);
+				int alignment, int initial_domain,
+				bool discardable, bool kernel,
+				struct drm_gem_object **obj);
 int radeon_gem_object_pin(struct drm_gem_object *obj, uint32_t pin_domain,
 			  uint64_t *gpu_addr);
 void radeon_gem_object_unpin(struct drm_gem_object *obj);
@@ -271,7 +265,7 @@
 };
 
 struct radeon_gart_table_vram {
-	struct radeon_object		*robj;
+	struct radeon_bo		*robj;
 	volatile uint32_t		*ptr;
 };
 
@@ -326,10 +320,12 @@
 	u64			real_vram_size;
 	int			vram_mtrr;
 	bool			vram_is_ddr;
+	bool                    igp_sideport_enabled;
 };
 
 int radeon_mc_setup(struct radeon_device *rdev);
-
+bool radeon_combios_sideport_present(struct radeon_device *rdev);
+bool radeon_atombios_sideport_present(struct radeon_device *rdev);
 
 /*
  * GPU scratch registers structures, functions & helpers
@@ -352,22 +348,28 @@
 	bool		sw_int;
 	/* FIXME: use a define max crtc rather than hardcode it */
 	bool		crtc_vblank_int[2];
+	/* FIXME: use defines for max hpd/dacs */
+	bool            hpd[6];
+	spinlock_t sw_lock;
+	int sw_refcount;
 };
 
 int radeon_irq_kms_init(struct radeon_device *rdev);
 void radeon_irq_kms_fini(struct radeon_device *rdev);
-
+void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev);
+void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev);
 
 /*
  * CP & ring.
  */
 struct radeon_ib {
 	struct list_head	list;
-	unsigned long		idx;
+	unsigned		idx;
 	uint64_t		gpu_addr;
 	struct radeon_fence	*fence;
-	uint32_t	*ptr;
+	uint32_t		*ptr;
 	uint32_t		length_dw;
+	bool			free;
 };
 
 /*
@@ -376,15 +378,14 @@
  */
 struct radeon_ib_pool {
 	struct mutex		mutex;
-	struct radeon_object	*robj;
-	struct list_head	scheduled_ibs;
+	struct radeon_bo	*robj;
 	struct radeon_ib	ibs[RADEON_IB_POOL_SIZE];
 	bool			ready;
-	DECLARE_BITMAP(alloc_bm, RADEON_IB_POOL_SIZE);
+	unsigned		head_id;
 };
 
 struct radeon_cp {
-	struct radeon_object	*ring_obj;
+	struct radeon_bo	*ring_obj;
 	volatile uint32_t	*ring;
 	unsigned		rptr;
 	unsigned		wptr;
@@ -399,8 +400,25 @@
 	bool			ready;
 };
 
+/*
+ * R6xx+ IH ring
+ */
+struct r600_ih {
+	struct radeon_bo	*ring_obj;
+	volatile uint32_t	*ring;
+	unsigned		rptr;
+	unsigned		wptr;
+	unsigned		wptr_old;
+	unsigned		ring_size;
+	uint64_t		gpu_addr;
+	uint32_t		ptr_mask;
+	spinlock_t              lock;
+	bool                    enabled;
+};
+
 struct r600_blit {
-	struct radeon_object	*shader_obj;
+	struct mutex		mutex;
+	struct radeon_bo	*shader_obj;
 	u64 shader_gpu_addr;
 	u32 vs_offset, ps_offset;
 	u32 state_offset;
@@ -430,8 +448,8 @@
  */
 struct radeon_cs_reloc {
 	struct drm_gem_object		*gobj;
-	struct radeon_object		*robj;
-	struct radeon_object_list	lobj;
+	struct radeon_bo		*robj;
+	struct radeon_bo_list		lobj;
 	uint32_t			handle;
 	uint32_t			flags;
 };
@@ -448,6 +466,7 @@
 };
 
 struct radeon_cs_parser {
+	struct device		*dev;
 	struct radeon_device	*rdev;
 	struct drm_file		*filp;
 	/* chunks */
@@ -520,6 +539,7 @@
  */
 int radeon_agp_init(struct radeon_device *rdev);
 void radeon_agp_resume(struct radeon_device *rdev);
+void radeon_agp_suspend(struct radeon_device *rdev);
 void radeon_agp_fini(struct radeon_device *rdev);
 
 
@@ -527,7 +547,7 @@
  * Writeback
  */
 struct radeon_wb {
-	struct radeon_object	*wb_obj;
+	struct radeon_bo	*wb_obj;
 	volatile uint32_t	*wb;
 	uint64_t		gpu_addr;
 };
@@ -639,6 +659,17 @@
 			       uint32_t offset, uint32_t obj_size);
 	int (*clear_surface_reg)(struct radeon_device *rdev, int reg);
 	void (*bandwidth_update)(struct radeon_device *rdev);
+	void (*hpd_init)(struct radeon_device *rdev);
+	void (*hpd_fini)(struct radeon_device *rdev);
+	bool (*hpd_sense)(struct radeon_device *rdev, enum radeon_hpd_id hpd);
+	void (*hpd_set_polarity)(struct radeon_device *rdev, enum radeon_hpd_id hpd);
+	/* ioctl hw specific callback. Some hw might want to perform special
+	 * operation on specific ioctl. For instance on wait idle some hw
+	 * might want to perform and HDP flush through MMIO as it seems that
+	 * some R6XX/R7XX hw doesn't take HDP flush into account if programmed
+	 * through ring.
+	 */
+	void (*ioctl_wait_idle)(struct radeon_device *rdev, struct radeon_bo *bo);
 };
 
 /*
@@ -647,11 +678,14 @@
 struct r100_asic {
 	const unsigned	*reg_safe_bm;
 	unsigned	reg_safe_bm_size;
+	u32		hdp_cntl;
 };
 
 struct r300_asic {
 	const unsigned	*reg_safe_bm;
 	unsigned	reg_safe_bm_size;
+	u32		resync_scratch;
+	u32		hdp_cntl;
 };
 
 struct r600_asic {
@@ -727,6 +761,11 @@
 int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
 				struct drm_file *filp);
 
+/* VRAM scratch page for HDP bug */
+struct r700_vram_scratch {
+	struct radeon_bo		*robj;
+	volatile uint32_t		*ptr;
+};
 
 /*
  * Core structure, functions and helpers.
@@ -751,9 +790,9 @@
 	uint8_t				*bios;
 	bool				is_atom_bios;
 	uint16_t			bios_header_start;
-	struct radeon_object		*stollen_vga_memory;
+	struct radeon_bo		*stollen_vga_memory;
 	struct fb_info			*fbdev_info;
-	struct radeon_object		*fbdev_robj;
+	struct radeon_bo		*fbdev_rbo;
 	struct radeon_framebuffer	*fbdev_rfb;
 	/* Register mmio */
 	resource_size_t			rmmio_base;
@@ -791,8 +830,21 @@
 	struct radeon_surface_reg surface_regs[RADEON_GEM_MAX_SURFACES];
 	const struct firmware *me_fw;	/* all family ME firmware */
 	const struct firmware *pfp_fw;	/* r6/700 PFP firmware */
+	const struct firmware *rlc_fw;	/* r6/700 RLC firmware */
 	struct r600_blit r600_blit;
+	struct r700_vram_scratch vram_scratch;
 	int msi_enabled; /* msi enabled */
+	struct r600_ih ih; /* r6/700 interrupt ring */
+	struct workqueue_struct *wq;
+	struct work_struct hotplug_work;
+
+	/* audio stuff */
+	struct timer_list	audio_timer;
+	int			audio_channels;
+	int			audio_rate;
+	int			audio_bits_per_sample;
+	uint8_t			audio_status_bits;
+	uint8_t			audio_category_code;
 };
 
 int radeon_device_init(struct radeon_device *rdev,
@@ -811,7 +863,7 @@
 
 static inline uint32_t r100_mm_rreg(struct radeon_device *rdev, uint32_t reg)
 {
-	if (reg < 0x10000)
+	if (reg < rdev->rmmio_size)
 		return readl(((void __iomem *)rdev->rmmio) + reg);
 	else {
 		writel(reg, ((void __iomem *)rdev->rmmio) + RADEON_MM_INDEX);
@@ -821,7 +873,7 @@
 
 static inline void r100_mm_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v)
 {
-	if (reg < 0x10000)
+	if (reg < rdev->rmmio_size)
 		writel(v, ((void __iomem *)rdev->rmmio) + reg);
 	else {
 		writel(reg, ((void __iomem *)rdev->rmmio) + RADEON_MM_INDEX);
@@ -829,6 +881,10 @@
 	}
 }
 
+/*
+ * Cast helper
+ */
+#define to_radeon_fence(p) ((struct radeon_fence *)(p))
 
 /*
  * Registers read & write functions.
@@ -965,18 +1021,25 @@
 #define radeon_get_engine_clock(rdev) (rdev)->asic->get_engine_clock((rdev))
 #define radeon_set_engine_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e))
 #define radeon_get_memory_clock(rdev) (rdev)->asic->get_memory_clock((rdev))
-#define radeon_set_memory_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e))
+#define radeon_set_memory_clock(rdev, e) (rdev)->asic->set_memory_clock((rdev), (e))
 #define radeon_set_pcie_lanes(rdev, l) (rdev)->asic->set_pcie_lanes((rdev), (l))
 #define radeon_set_clock_gating(rdev, e) (rdev)->asic->set_clock_gating((rdev), (e))
 #define radeon_set_surface_reg(rdev, r, f, p, o, s) ((rdev)->asic->set_surface_reg((rdev), (r), (f), (p), (o), (s)))
 #define radeon_clear_surface_reg(rdev, r) ((rdev)->asic->clear_surface_reg((rdev), (r)))
 #define radeon_bandwidth_update(rdev) (rdev)->asic->bandwidth_update((rdev))
+#define radeon_hpd_init(rdev) (rdev)->asic->hpd_init((rdev))
+#define radeon_hpd_fini(rdev) (rdev)->asic->hpd_fini((rdev))
+#define radeon_hpd_sense(rdev, hpd) (rdev)->asic->hpd_sense((rdev), (hpd))
+#define radeon_hpd_set_polarity(rdev, hpd) (rdev)->asic->hpd_set_polarity((rdev), (hpd))
 
 /* Common functions */
+/* AGP */
+extern void radeon_agp_disable(struct radeon_device *rdev);
 extern int radeon_gart_table_vram_pin(struct radeon_device *rdev);
 extern int radeon_modeset_init(struct radeon_device *rdev);
 extern void radeon_modeset_fini(struct radeon_device *rdev);
 extern bool radeon_card_posted(struct radeon_device *rdev);
+extern bool radeon_boot_test_post_card(struct radeon_device *rdev);
 extern int radeon_clocks_init(struct radeon_device *rdev);
 extern void radeon_clocks_fini(struct radeon_device *rdev);
 extern void radeon_scratch_init(struct radeon_device *rdev);
@@ -984,6 +1047,8 @@
 extern int radeon_cs_parser_init(struct radeon_cs_parser *p, void *data);
 extern void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable);
 extern void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable);
+extern void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain);
+extern bool radeon_ttm_bo_is_radeon_bo(struct ttm_buffer_object *bo);
 
 /* r100,rv100,rs100,rv200,rs200,r200,rv250,rs300,rv280 */
 struct r100_mc_save {
@@ -1021,7 +1086,7 @@
 extern void r100_vga_render_disable(struct radeon_device *rdev);
 extern int r100_cs_track_check_pkt3_indx_buffer(struct radeon_cs_parser *p,
 						struct radeon_cs_packet *pkt,
-						struct radeon_object *robj);
+						struct radeon_bo *robj);
 extern int r100_cs_parse_packet0(struct radeon_cs_parser *p,
 				struct radeon_cs_packet *pkt,
 				const unsigned *auth, unsigned n,
@@ -1029,6 +1094,8 @@
 extern int r100_cs_packet_parse(struct radeon_cs_parser *p,
 				struct radeon_cs_packet *pkt,
 				unsigned idx);
+extern void r100_enable_bm(struct radeon_device *rdev);
+extern void r100_set_common_regs(struct radeon_device *rdev);
 
 /* rv200,rv250,rv280 */
 extern void r200_set_safe_registers(struct radeon_device *rdev);
@@ -1091,6 +1158,7 @@
 extern void r600_cp_stop(struct radeon_device *rdev);
 extern void r600_ring_init(struct radeon_device *rdev, unsigned ring_size);
 extern int r600_cp_resume(struct radeon_device *rdev);
+extern void r600_cp_fini(struct radeon_device *rdev);
 extern int r600_count_pipe_bits(uint32_t val);
 extern int r600_gart_clear_page(struct radeon_device *rdev, int i);
 extern int r600_mc_wait_for_idle(struct radeon_device *rdev);
@@ -1104,7 +1172,30 @@
 extern void r600_scratch_init(struct radeon_device *rdev);
 extern int r600_blit_init(struct radeon_device *rdev);
 extern void r600_blit_fini(struct radeon_device *rdev);
-extern int r600_cp_init_microcode(struct radeon_device *rdev);
+extern int r600_init_microcode(struct radeon_device *rdev);
 extern int r600_gpu_reset(struct radeon_device *rdev);
+/* r600 irq */
+extern int r600_irq_init(struct radeon_device *rdev);
+extern void r600_irq_fini(struct radeon_device *rdev);
+extern void r600_ih_ring_init(struct radeon_device *rdev, unsigned ring_size);
+extern int r600_irq_set(struct radeon_device *rdev);
+extern void r600_irq_suspend(struct radeon_device *rdev);
+/* r600 audio */
+extern int r600_audio_init(struct radeon_device *rdev);
+extern int r600_audio_tmds_index(struct drm_encoder *encoder);
+extern void r600_audio_set_clock(struct drm_encoder *encoder, int clock);
+extern void r600_audio_fini(struct radeon_device *rdev);
+extern void r600_hdmi_init(struct drm_encoder *encoder);
+extern void r600_hdmi_enable(struct drm_encoder *encoder, int enable);
+extern void r600_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode);
+extern int r600_hdmi_buffer_status_changed(struct drm_encoder *encoder);
+extern void r600_hdmi_update_audio_settings(struct drm_encoder *encoder,
+					    int channels,
+					    int rate,
+					    int bps,
+					    uint8_t status_bits,
+					    uint8_t category_code);
+
+#include "radeon_object.h"
 
 #endif
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_legacy_tv.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_legacy_tv.c
@@ -57,6 +57,10 @@
 #define NTSC_TV_PLL_N_14 693
 #define NTSC_TV_PLL_P_14 7
 
+#define PAL_TV_PLL_M_14 19
+#define PAL_TV_PLL_N_14 353
+#define PAL_TV_PLL_P_14 5
+
 #define VERT_LEAD_IN_LINES 2
 #define FRAC_BITS 0xe
 #define FRAC_MASK 0x3fff
@@ -77,7 +81,7 @@
 	unsigned pix_to_tv;
 };
 
-static const uint16_t hor_timing_NTSC[] = {
+static const uint16_t hor_timing_NTSC[MAX_H_CODE_TIMING_LEN] = {
 	0x0007,
 	0x003f,
 	0x0263,
@@ -98,7 +102,7 @@
 	0
 };
 
-static const uint16_t vert_timing_NTSC[] = {
+static const uint16_t vert_timing_NTSC[MAX_V_CODE_TIMING_LEN] = {
 	0x2001,
 	0x200d,
 	0x1006,
@@ -115,7 +119,7 @@
 	0
 };
 
-static const uint16_t hor_timing_PAL[] = {
+static const uint16_t hor_timing_PAL[MAX_H_CODE_TIMING_LEN] = {
 	0x0007,
 	0x0058,
 	0x027c,
@@ -136,7 +140,7 @@
 	0
 };
 
-static const uint16_t vert_timing_PAL[] = 	{
+static const uint16_t vert_timing_PAL[MAX_V_CODE_TIMING_LEN] = {
 	0x2001,
 	0x200c,
 	0x1005,
@@ -205,9 +209,24 @@
 		630627,             /* defRestart */
 		347,                /* crtcPLL_N */
 		14,                 /* crtcPLL_M */
-			8,                  /* crtcPLL_postDiv */
+		8,                  /* crtcPLL_postDiv */
 		1022,               /* pixToTV */
 	},
+	{ /* PAL timing for 14 Mhz ref clk */
+		800,                /* horResolution */
+		600,                /* verResolution */
+		TV_STD_PAL,         /* standard */
+		1131,               /* horTotal */
+		742,                /* verTotal */
+		813,                /* horStart */
+		840,                /* horSyncStart */
+		633,                /* verSyncStart */
+		708369,             /* defRestart */
+		211,                /* crtcPLL_N */
+		9,                  /* crtcPLL_M */
+		8,                  /* crtcPLL_postDiv */
+		759,                /* pixToTV */
+	},
 };
 
 #define N_AVAILABLE_MODES ARRAY_SIZE(available_tv_modes)
@@ -242,7 +261,7 @@
 		if (pll->reference_freq == 2700)
 			const_ptr = &available_tv_modes[1];
 		else
-			const_ptr = &available_tv_modes[1]; /* FIX ME */
+			const_ptr = &available_tv_modes[3];
 	}
 	return const_ptr;
 }
@@ -625,7 +644,7 @@
 
 	if (flicker_removal < 3)
 		flicker_removal = 3;
-	for (i = 0; i < 6; ++i) {
+	for (i = 0; i < ARRAY_SIZE(SLOPE_limit); ++i) {
 		if (flicker_removal == SLOPE_limit[i])
 			break;
 	}
@@ -685,9 +704,9 @@
 			n = PAL_TV_PLL_N_27;
 			p = PAL_TV_PLL_P_27;
 		} else {
-			m = PAL_TV_PLL_M_27;
-			n = PAL_TV_PLL_N_27;
-			p = PAL_TV_PLL_P_27;
+			m = PAL_TV_PLL_M_14;
+			n = PAL_TV_PLL_N_14;
+			p = PAL_TV_PLL_P_14;
 		}
 	}
 
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/r600_audio.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/r600_audio.c
@@ -0,0 +1,266 @@
+/*
+ * Copyright 2008 Advanced Micro Devices, Inc.
+ * Copyright 2008 Red Hat Inc.
+ * Copyright 2009 Christian König.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Christian König
+ */
+#include "drmP.h"
+#include "radeon.h"
+#include "radeon_reg.h"
+#include "atom.h"
+
+#define AUDIO_TIMER_INTERVALL 100 /* 1/10 sekund should be enough */
+
+/*
+ * check if the chipset is supported
+ */
+static int r600_audio_chipset_supported(struct radeon_device *rdev)
+{
+	return (rdev->family >= CHIP_R600 && rdev->family < CHIP_RV710)
+		|| rdev->family == CHIP_RS600
+		|| rdev->family == CHIP_RS690
+		|| rdev->family == CHIP_RS740;
+}
+
+/*
+ * current number of channels
+ */
+static int r600_audio_channels(struct radeon_device *rdev)
+{
+	return (RREG32(R600_AUDIO_RATE_BPS_CHANNEL) & 0x7) + 1;
+}
+
+/*
+ * current bits per sample
+ */
+static int r600_audio_bits_per_sample(struct radeon_device *rdev)
+{
+	uint32_t value = (RREG32(R600_AUDIO_RATE_BPS_CHANNEL) & 0xF0) >> 4;
+	switch (value) {
+	case 0x0: return  8;
+	case 0x1: return 16;
+	case 0x2: return 20;
+	case 0x3: return 24;
+	case 0x4: return 32;
+	}
+
+	DRM_ERROR("Unknown bits per sample 0x%x using 16 instead.\n", (int)value);
+
+	return 16;
+}
+
+/*
+ * current sampling rate in HZ
+ */
+static int r600_audio_rate(struct radeon_device *rdev)
+{
+	uint32_t value = RREG32(R600_AUDIO_RATE_BPS_CHANNEL);
+	uint32_t result;
+
+	if (value & 0x4000)
+		result = 44100;
+	else
+		result = 48000;
+
+	result *= ((value >> 11) & 0x7) + 1;
+	result /= ((value >> 8) & 0x7) + 1;
+
+	return result;
+}
+
+/*
+ * iec 60958 status bits
+ */
+static uint8_t r600_audio_status_bits(struct radeon_device *rdev)
+{
+	return RREG32(R600_AUDIO_STATUS_BITS) & 0xff;
+}
+
+/*
+ * iec 60958 category code
+ */
+static uint8_t r600_audio_category_code(struct radeon_device *rdev)
+{
+	return (RREG32(R600_AUDIO_STATUS_BITS) >> 8) & 0xff;
+}
+
+/*
+ * update all hdmi interfaces with current audio parameters
+ */
+static void r600_audio_update_hdmi(unsigned long param)
+{
+	struct radeon_device *rdev = (struct radeon_device *)param;
+	struct drm_device *dev = rdev->ddev;
+
+	int channels = r600_audio_channels(rdev);
+	int rate = r600_audio_rate(rdev);
+	int bps = r600_audio_bits_per_sample(rdev);
+	uint8_t status_bits = r600_audio_status_bits(rdev);
+	uint8_t category_code = r600_audio_category_code(rdev);
+
+	struct drm_encoder *encoder;
+	int changes = 0;
+
+	changes |= channels != rdev->audio_channels;
+	changes |= rate != rdev->audio_rate;
+	changes |= bps != rdev->audio_bits_per_sample;
+	changes |= status_bits != rdev->audio_status_bits;
+	changes |= category_code != rdev->audio_category_code;
+
+	if (changes) {
+		rdev->audio_channels = channels;
+		rdev->audio_rate = rate;
+		rdev->audio_bits_per_sample = bps;
+		rdev->audio_status_bits = status_bits;
+		rdev->audio_category_code = category_code;
+	}
+
+	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
+		if (changes || r600_hdmi_buffer_status_changed(encoder))
+			r600_hdmi_update_audio_settings(
+				encoder, channels,
+				rate, bps, status_bits,
+				category_code);
+	}
+
+	mod_timer(&rdev->audio_timer,
+		jiffies + msecs_to_jiffies(AUDIO_TIMER_INTERVALL));
+}
+
+/*
+ * initialize the audio vars and register the update timer
+ */
+int r600_audio_init(struct radeon_device *rdev)
+{
+	if (!r600_audio_chipset_supported(rdev))
+		return 0;
+
+	DRM_INFO("%s audio support", radeon_audio ? "Enabling" : "Disabling");
+	WREG32_P(R600_AUDIO_ENABLE, radeon_audio ? 0x81000000 : 0x0, ~0x81000000);
+
+	rdev->audio_channels = -1;
+	rdev->audio_rate = -1;
+	rdev->audio_bits_per_sample = -1;
+	rdev->audio_status_bits = 0;
+	rdev->audio_category_code = 0;
+
+	setup_timer(
+		&rdev->audio_timer,
+		r600_audio_update_hdmi,
+		(unsigned long)rdev);
+
+	mod_timer(&rdev->audio_timer, jiffies + 1);
+
+	return 0;
+}
+
+/*
+ * determin how the encoders and audio interface is wired together
+ */
+int r600_audio_tmds_index(struct drm_encoder *encoder)
+{
+	struct drm_device *dev = encoder->dev;
+	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+	struct drm_encoder *other;
+
+	switch (radeon_encoder->encoder_id) {
+	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
+	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
+	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
+		return 0;
+
+	case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
+		/* special case check if an TMDS1 is present */
+		list_for_each_entry(other, &dev->mode_config.encoder_list, head) {
+			if (to_radeon_encoder(other)->encoder_id ==
+				ENCODER_OBJECT_ID_INTERNAL_TMDS1)
+				return 1;
+		}
+		return 0;
+
+	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
+	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
+		return 1;
+
+	default:
+		DRM_ERROR("Unsupported encoder type 0x%02X\n",
+			  radeon_encoder->encoder_id);
+		return -1;
+	}
+}
+
+/*
+ * atach the audio codec to the clock source of the encoder
+ */
+void r600_audio_set_clock(struct drm_encoder *encoder, int clock)
+{
+	struct drm_device *dev = encoder->dev;
+	struct radeon_device *rdev = dev->dev_private;
+	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+	int base_rate = 48000;
+
+	switch (radeon_encoder->encoder_id) {
+	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
+	case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
+		WREG32_P(R600_AUDIO_TIMING, 0, ~0x301);
+		break;
+
+	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
+	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
+	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
+	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
+		WREG32_P(R600_AUDIO_TIMING, 0x100, ~0x301);
+		break;
+
+	default:
+		DRM_ERROR("Unsupported encoder type 0x%02X\n",
+			  radeon_encoder->encoder_id);
+		return;
+	}
+
+	switch (r600_audio_tmds_index(encoder)) {
+	case 0:
+		WREG32(R600_AUDIO_PLL1_MUL, base_rate*50);
+		WREG32(R600_AUDIO_PLL1_DIV, clock*100);
+		WREG32(R600_AUDIO_CLK_SRCSEL, 0);
+		break;
+
+	case 1:
+		WREG32(R600_AUDIO_PLL2_MUL, base_rate*50);
+		WREG32(R600_AUDIO_PLL2_DIV, clock*100);
+		WREG32(R600_AUDIO_CLK_SRCSEL, 1);
+		break;
+	}
+}
+
+/*
+ * release the audio timer
+ * TODO: How to do this correctly on SMP systems?
+ */
+void r600_audio_fini(struct radeon_device *rdev)
+{
+	if (!r600_audio_chipset_supported(rdev))
+		return;
+
+	del_timer(&rdev->audio_timer);
+	WREG32_P(R600_AUDIO_ENABLE, 0x0, ~0x81000000);
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/r600d.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/r600d.h
@@ -196,6 +196,7 @@
 #define	HDP_NONSURFACE_SIZE				0x2C0C
 #define HDP_REG_COHERENCY_FLUSH_CNTL			0x54A0
 #define	HDP_TILING_CONFIG				0x2F3C
+#define HDP_DEBUG1                                      0x2F34
 
 #define MC_VM_AGP_TOP					0x2184
 #define MC_VM_AGP_BOT					0x2188
@@ -456,7 +457,215 @@
 #define         WAIT_2D_IDLECLEAN_bit                           (1 << 16)
 #define         WAIT_3D_IDLECLEAN_bit                           (1 << 17)
 
-
+#define IH_RB_CNTL                                        0x3e00
+#       define IH_RB_ENABLE                               (1 << 0)
+#       define IH_IB_SIZE(x)                              ((x) << 1) /* log2 */
+#       define IH_RB_FULL_DRAIN_ENABLE                    (1 << 6)
+#       define IH_WPTR_WRITEBACK_ENABLE                   (1 << 8)
+#       define IH_WPTR_WRITEBACK_TIMER(x)                 ((x) << 9) /* log2 */
+#       define IH_WPTR_OVERFLOW_ENABLE                    (1 << 16)
+#       define IH_WPTR_OVERFLOW_CLEAR                     (1 << 31)
+#define IH_RB_BASE                                        0x3e04
+#define IH_RB_RPTR                                        0x3e08
+#define IH_RB_WPTR                                        0x3e0c
+#       define RB_OVERFLOW                                (1 << 0)
+#       define WPTR_OFFSET_MASK                           0x3fffc
+#define IH_RB_WPTR_ADDR_HI                                0x3e10
+#define IH_RB_WPTR_ADDR_LO                                0x3e14
+#define IH_CNTL                                           0x3e18
+#       define ENABLE_INTR                                (1 << 0)
+#       define IH_MC_SWAP(x)                              ((x) << 2)
+#       define IH_MC_SWAP_NONE                            0
+#       define IH_MC_SWAP_16BIT                           1
+#       define IH_MC_SWAP_32BIT                           2
+#       define IH_MC_SWAP_64BIT                           3
+#       define RPTR_REARM                                 (1 << 4)
+#       define MC_WRREQ_CREDIT(x)                         ((x) << 15)
+#       define MC_WR_CLEAN_CNT(x)                         ((x) << 20)
+
+#define RLC_CNTL                                          0x3f00
+#       define RLC_ENABLE                                 (1 << 0)
+#define RLC_HB_BASE                                       0x3f10
+#define RLC_HB_CNTL                                       0x3f0c
+#define RLC_HB_RPTR                                       0x3f20
+#define RLC_HB_WPTR                                       0x3f1c
+#define RLC_HB_WPTR_LSB_ADDR                              0x3f14
+#define RLC_HB_WPTR_MSB_ADDR                              0x3f18
+#define RLC_MC_CNTL                                       0x3f44
+#define RLC_UCODE_CNTL                                    0x3f48
+#define RLC_UCODE_ADDR                                    0x3f2c
+#define RLC_UCODE_DATA                                    0x3f30
+
+#define SRBM_SOFT_RESET                                   0xe60
+#       define SOFT_RESET_RLC                             (1 << 13)
+
+#define CP_INT_CNTL                                       0xc124
+#       define CNTX_BUSY_INT_ENABLE                       (1 << 19)
+#       define CNTX_EMPTY_INT_ENABLE                      (1 << 20)
+#       define SCRATCH_INT_ENABLE                         (1 << 25)
+#       define TIME_STAMP_INT_ENABLE                      (1 << 26)
+#       define IB2_INT_ENABLE                             (1 << 29)
+#       define IB1_INT_ENABLE                             (1 << 30)
+#       define RB_INT_ENABLE                              (1 << 31)
+#define CP_INT_STATUS                                     0xc128
+#       define SCRATCH_INT_STAT                           (1 << 25)
+#       define TIME_STAMP_INT_STAT                        (1 << 26)
+#       define IB2_INT_STAT                               (1 << 29)
+#       define IB1_INT_STAT                               (1 << 30)
+#       define RB_INT_STAT                                (1 << 31)
+
+#define GRBM_INT_CNTL                                     0x8060
+#       define RDERR_INT_ENABLE                           (1 << 0)
+#       define WAIT_COUNT_TIMEOUT_INT_ENABLE              (1 << 1)
+#       define GUI_IDLE_INT_ENABLE                        (1 << 19)
+
+#define INTERRUPT_CNTL                                    0x5468
+#       define IH_DUMMY_RD_OVERRIDE                       (1 << 0)
+#       define IH_DUMMY_RD_EN                             (1 << 1)
+#       define IH_REQ_NONSNOOP_EN                         (1 << 3)
+#       define GEN_IH_INT_EN                              (1 << 8)
+#define INTERRUPT_CNTL2                                   0x546c
+
+#define D1MODE_VBLANK_STATUS                              0x6534
+#define D2MODE_VBLANK_STATUS                              0x6d34
+#       define DxMODE_VBLANK_OCCURRED                     (1 << 0)
+#       define DxMODE_VBLANK_ACK                          (1 << 4)
+#       define DxMODE_VBLANK_STAT                         (1 << 12)
+#       define DxMODE_VBLANK_INTERRUPT                    (1 << 16)
+#       define DxMODE_VBLANK_INTERRUPT_TYPE               (1 << 17)
+#define D1MODE_VLINE_STATUS                               0x653c
+#define D2MODE_VLINE_STATUS                               0x6d3c
+#       define DxMODE_VLINE_OCCURRED                      (1 << 0)
+#       define DxMODE_VLINE_ACK                           (1 << 4)
+#       define DxMODE_VLINE_STAT                          (1 << 12)
+#       define DxMODE_VLINE_INTERRUPT                     (1 << 16)
+#       define DxMODE_VLINE_INTERRUPT_TYPE                (1 << 17)
+#define DxMODE_INT_MASK                                   0x6540
+#       define D1MODE_VBLANK_INT_MASK                     (1 << 0)
+#       define D1MODE_VLINE_INT_MASK                      (1 << 4)
+#       define D2MODE_VBLANK_INT_MASK                     (1 << 8)
+#       define D2MODE_VLINE_INT_MASK                      (1 << 12)
+#define DCE3_DISP_INTERRUPT_STATUS                        0x7ddc
+#       define DC_HPD1_INTERRUPT                          (1 << 18)
+#       define DC_HPD2_INTERRUPT                          (1 << 19)
+#define DISP_INTERRUPT_STATUS                             0x7edc
+#       define LB_D1_VLINE_INTERRUPT                      (1 << 2)
+#       define LB_D2_VLINE_INTERRUPT                      (1 << 3)
+#       define LB_D1_VBLANK_INTERRUPT                     (1 << 4)
+#       define LB_D2_VBLANK_INTERRUPT                     (1 << 5)
+#       define DACA_AUTODETECT_INTERRUPT                  (1 << 16)
+#       define DACB_AUTODETECT_INTERRUPT                  (1 << 17)
+#       define DC_HOT_PLUG_DETECT1_INTERRUPT              (1 << 18)
+#       define DC_HOT_PLUG_DETECT2_INTERRUPT              (1 << 19)
+#       define DC_I2C_SW_DONE_INTERRUPT                   (1 << 20)
+#       define DC_I2C_HW_DONE_INTERRUPT                   (1 << 21)
+#define DISP_INTERRUPT_STATUS_CONTINUE                    0x7ee8
+#define DCE3_DISP_INTERRUPT_STATUS_CONTINUE               0x7de8
+#       define DC_HPD4_INTERRUPT                          (1 << 14)
+#       define DC_HPD4_RX_INTERRUPT                       (1 << 15)
+#       define DC_HPD3_INTERRUPT                          (1 << 28)
+#       define DC_HPD1_RX_INTERRUPT                       (1 << 29)
+#       define DC_HPD2_RX_INTERRUPT                       (1 << 30)
+#define DCE3_DISP_INTERRUPT_STATUS_CONTINUE2              0x7dec
+#       define DC_HPD3_RX_INTERRUPT                       (1 << 0)
+#       define DIGA_DP_VID_STREAM_DISABLE_INTERRUPT       (1 << 1)
+#       define DIGA_DP_STEER_FIFO_OVERFLOW_INTERRUPT      (1 << 2)
+#       define DIGB_DP_VID_STREAM_DISABLE_INTERRUPT       (1 << 3)
+#       define DIGB_DP_STEER_FIFO_OVERFLOW_INTERRUPT      (1 << 4)
+#       define AUX1_SW_DONE_INTERRUPT                     (1 << 5)
+#       define AUX1_LS_DONE_INTERRUPT                     (1 << 6)
+#       define AUX2_SW_DONE_INTERRUPT                     (1 << 7)
+#       define AUX2_LS_DONE_INTERRUPT                     (1 << 8)
+#       define AUX3_SW_DONE_INTERRUPT                     (1 << 9)
+#       define AUX3_LS_DONE_INTERRUPT                     (1 << 10)
+#       define AUX4_SW_DONE_INTERRUPT                     (1 << 11)
+#       define AUX4_LS_DONE_INTERRUPT                     (1 << 12)
+#       define DIGA_DP_FAST_TRAINING_COMPLETE_INTERRUPT   (1 << 13)
+#       define DIGB_DP_FAST_TRAINING_COMPLETE_INTERRUPT   (1 << 14)
+/* DCE 3.2 */
+#       define AUX5_SW_DONE_INTERRUPT                     (1 << 15)
+#       define AUX5_LS_DONE_INTERRUPT                     (1 << 16)
+#       define AUX6_SW_DONE_INTERRUPT                     (1 << 17)
+#       define AUX6_LS_DONE_INTERRUPT                     (1 << 18)
+#       define DC_HPD5_INTERRUPT                          (1 << 19)
+#       define DC_HPD5_RX_INTERRUPT                       (1 << 20)
+#       define DC_HPD6_INTERRUPT                          (1 << 21)
+#       define DC_HPD6_RX_INTERRUPT                       (1 << 22)
+
+#define DACA_AUTO_DETECT_CONTROL                          0x7828
+#define DACB_AUTO_DETECT_CONTROL                          0x7a28
+#define DCE3_DACA_AUTO_DETECT_CONTROL                     0x7028
+#define DCE3_DACB_AUTO_DETECT_CONTROL                     0x7128
+#       define DACx_AUTODETECT_MODE(x)                    ((x) << 0)
+#       define DACx_AUTODETECT_MODE_NONE                  0
+#       define DACx_AUTODETECT_MODE_CONNECT               1
+#       define DACx_AUTODETECT_MODE_DISCONNECT            2
+#       define DACx_AUTODETECT_FRAME_TIME_COUNTER(x)      ((x) << 8)
+/* bit 18 = R/C, 17 = G/Y, 16 = B/Comp */
+#       define DACx_AUTODETECT_CHECK_MASK(x)              ((x) << 16)
+
+#define DCE3_DACA_AUTODETECT_INT_CONTROL                  0x7038
+#define DCE3_DACB_AUTODETECT_INT_CONTROL                  0x7138
+#define DACA_AUTODETECT_INT_CONTROL                       0x7838
+#define DACB_AUTODETECT_INT_CONTROL                       0x7a38
+#       define DACx_AUTODETECT_ACK                        (1 << 0)
+#       define DACx_AUTODETECT_INT_ENABLE                 (1 << 16)
+
+#define DC_HOT_PLUG_DETECT1_CONTROL                       0x7d00
+#define DC_HOT_PLUG_DETECT2_CONTROL                       0x7d10
+#define DC_HOT_PLUG_DETECT3_CONTROL                       0x7d24
+#       define DC_HOT_PLUG_DETECTx_EN                     (1 << 0)
+
+#define DC_HOT_PLUG_DETECT1_INT_STATUS                    0x7d04
+#define DC_HOT_PLUG_DETECT2_INT_STATUS                    0x7d14
+#define DC_HOT_PLUG_DETECT3_INT_STATUS                    0x7d28
+#       define DC_HOT_PLUG_DETECTx_INT_STATUS             (1 << 0)
+#       define DC_HOT_PLUG_DETECTx_SENSE                  (1 << 1)
+
+/* DCE 3.0 */
+#define DC_HPD1_INT_STATUS                                0x7d00
+#define DC_HPD2_INT_STATUS                                0x7d0c
+#define DC_HPD3_INT_STATUS                                0x7d18
+#define DC_HPD4_INT_STATUS                                0x7d24
+/* DCE 3.2 */
+#define DC_HPD5_INT_STATUS                                0x7dc0
+#define DC_HPD6_INT_STATUS                                0x7df4
+#       define DC_HPDx_INT_STATUS                         (1 << 0)
+#       define DC_HPDx_SENSE                              (1 << 1)
+#       define DC_HPDx_RX_INT_STATUS                      (1 << 8)
+
+#define DC_HOT_PLUG_DETECT1_INT_CONTROL                   0x7d08
+#define DC_HOT_PLUG_DETECT2_INT_CONTROL                   0x7d18
+#define DC_HOT_PLUG_DETECT3_INT_CONTROL                   0x7d2c
+#       define DC_HOT_PLUG_DETECTx_INT_ACK                (1 << 0)
+#       define DC_HOT_PLUG_DETECTx_INT_POLARITY           (1 << 8)
+#       define DC_HOT_PLUG_DETECTx_INT_EN                 (1 << 16)
+/* DCE 3.0 */
+#define DC_HPD1_INT_CONTROL                               0x7d04
+#define DC_HPD2_INT_CONTROL                               0x7d10
+#define DC_HPD3_INT_CONTROL                               0x7d1c
+#define DC_HPD4_INT_CONTROL                               0x7d28
+/* DCE 3.2 */
+#define DC_HPD5_INT_CONTROL                               0x7dc4
+#define DC_HPD6_INT_CONTROL                               0x7df8
+#       define DC_HPDx_INT_ACK                            (1 << 0)
+#       define DC_HPDx_INT_POLARITY                       (1 << 8)
+#       define DC_HPDx_INT_EN                             (1 << 16)
+#       define DC_HPDx_RX_INT_ACK                         (1 << 20)
+#       define DC_HPDx_RX_INT_EN                          (1 << 24)
+
+/* DCE 3.0 */
+#define DC_HPD1_CONTROL                                   0x7d08
+#define DC_HPD2_CONTROL                                   0x7d14
+#define DC_HPD3_CONTROL                                   0x7d20
+#define DC_HPD4_CONTROL                                   0x7d2c
+/* DCE 3.2 */
+#define DC_HPD5_CONTROL                                   0x7dc8
+#define DC_HPD6_CONTROL                                   0x7dfc
+#       define DC_HPDx_CONNECTION_TIMER(x)                ((x) << 0)
+#       define DC_HPDx_RX_INT_TIMER(x)                    ((x) << 16)
+/* DCE 3.2 */
+#       define DC_HPDx_EN                                 (1 << 28)
 
 /*
  * PM4
@@ -500,7 +709,6 @@
 #define	PACKET3_WAIT_REG_MEM				0x3C
 #define	PACKET3_MEM_WRITE				0x3D
 #define	PACKET3_INDIRECT_BUFFER				0x32
-#define	PACKET3_CP_INTERRUPT				0x40
 #define	PACKET3_SURFACE_SYNC				0x43
 #              define PACKET3_CB0_DEST_BASE_ENA    (1 << 6)
 #              define PACKET3_TC_ACTION_ENA        (1 << 23)
@@ -674,4 +882,30 @@
 #define		S_000E60_SOFT_RESET_TSC(x)		(((x) & 1) << 16)
 #define		S_000E60_SOFT_RESET_VMC(x)		(((x) & 1) << 17)
 
+#define R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL		0x5480
+
+#define R_0280E0_CB_COLOR0_FRAG                      0x0280E0
+#define   S_0280E0_BASE_256B(x)                        (((x) & 0xFFFFFFFF) << 0)
+#define   G_0280E0_BASE_256B(x)                        (((x) >> 0) & 0xFFFFFFFF)
+#define   C_0280E0_BASE_256B                           0x00000000
+#define R_0280E4_CB_COLOR1_FRAG                      0x0280E4
+#define R_0280E8_CB_COLOR2_FRAG                      0x0280E8
+#define R_0280EC_CB_COLOR3_FRAG                      0x0280EC
+#define R_0280F0_CB_COLOR4_FRAG                      0x0280F0
+#define R_0280F4_CB_COLOR5_FRAG                      0x0280F4
+#define R_0280F8_CB_COLOR6_FRAG                      0x0280F8
+#define R_0280FC_CB_COLOR7_FRAG                      0x0280FC
+#define R_0280C0_CB_COLOR0_TILE                      0x0280C0
+#define   S_0280C0_BASE_256B(x)                        (((x) & 0xFFFFFFFF) << 0)
+#define   G_0280C0_BASE_256B(x)                        (((x) >> 0) & 0xFFFFFFFF)
+#define   C_0280C0_BASE_256B                           0x00000000
+#define R_0280C4_CB_COLOR1_TILE                      0x0280C4
+#define R_0280C8_CB_COLOR2_TILE                      0x0280C8
+#define R_0280CC_CB_COLOR3_TILE                      0x0280CC
+#define R_0280D0_CB_COLOR4_TILE                      0x0280D0
+#define R_0280D4_CB_COLOR5_TILE                      0x0280D4
+#define R_0280D8_CB_COLOR6_TILE                      0x0280D8
+#define R_0280DC_CB_COLOR7_TILE                      0x0280DC
+
+
 #endif
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/rv515.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/rv515.c
@@ -478,8 +478,8 @@
 			return r;
 	}
 	/* Enable IRQ */
-	rdev->irq.sw_int = true;
 	rs600_irq_set(rdev);
+	rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
 	/* 1M ring buffer */
 	r = r100_cp_init(rdev, 1024 * 1024);
 	if (r) {
@@ -514,6 +514,8 @@
 	atom_asic_init(rdev->mode_info.atom_context);
 	/* Resume clock after posting */
 	rv515_clock_startup(rdev);
+	/* Initialize surface registers */
+	radeon_surface_init(rdev);
 	return rv515_startup(rdev);
 }
 
@@ -535,16 +537,15 @@
 
 void rv515_fini(struct radeon_device *rdev)
 {
-	rv515_suspend(rdev);
 	r100_cp_fini(rdev);
 	r100_wb_fini(rdev);
 	r100_ib_fini(rdev);
 	radeon_gem_fini(rdev);
-    rv370_pcie_gart_fini(rdev);
+	rv370_pcie_gart_fini(rdev);
 	radeon_agp_fini(rdev);
 	radeon_irq_kms_fini(rdev);
 	radeon_fence_driver_fini(rdev);
-	radeon_object_fini(rdev);
+	radeon_bo_fini(rdev);
 	radeon_atombios_fini(rdev);
 	kfree(rdev->bios);
 	rdev->bios = NULL;
@@ -580,10 +581,8 @@
 			RREG32(R_0007C0_CP_STAT));
 	}
 	/* check if cards are posted or not */
-	if (!radeon_card_posted(rdev) && rdev->bios) {
-		DRM_INFO("GPU not posted. posting now...\n");
-		atom_asic_init(rdev->mode_info.atom_context);
-	}
+	if (radeon_boot_test_post_card(rdev) == false)
+		return -EINVAL;
 	/* Initialize clocks */
 	radeon_get_clock_info(rdev->ddev);
 	/* Initialize power management */
@@ -603,7 +602,7 @@
 	if (r)
 		return r;
 	/* Memory manager */
-	r = radeon_object_init(rdev);
+	r = radeon_bo_init(rdev);
 	if (r)
 		return r;
 	r = rv370_pcie_gart_init(rdev);
@@ -615,13 +614,12 @@
 	if (r) {
 		/* Somethings want wront with the accel init stop accel */
 		dev_err(rdev->dev, "Disabling GPU acceleration\n");
-		rv515_suspend(rdev);
 		r100_cp_fini(rdev);
 		r100_wb_fini(rdev);
 		r100_ib_fini(rdev);
+		radeon_irq_kms_fini(rdev);
 		rv370_pcie_gart_fini(rdev);
 		radeon_agp_fini(rdev);
-		radeon_irq_kms_fini(rdev);
 		rdev->accel_working = false;
 	}
 	return 0;
@@ -892,8 +890,9 @@
 
 	b.full = rfixed_const(mode->crtc_hdisplay);
 	c.full = rfixed_const(256);
-	a.full = rfixed_mul(wm->num_line_pair, b);
-	request_fifo_depth.full = rfixed_div(a, c);
+	a.full = rfixed_div(b, c);
+	request_fifo_depth.full = rfixed_mul(a, wm->num_line_pair);
+	request_fifo_depth.full = rfixed_ceil(request_fifo_depth);
 	if (a.full < rfixed_const(4)) {
 		wm->lb_request_fifo_depth = 4;
 	} else {
@@ -995,15 +994,17 @@
 	a.full = rfixed_const(16);
 	wm->priority_mark_max.full = rfixed_const(crtc->base.mode.crtc_hdisplay);
 	wm->priority_mark_max.full = rfixed_div(wm->priority_mark_max, a);
+	wm->priority_mark_max.full = rfixed_ceil(wm->priority_mark_max);
 
 	/* Determine estimated width */
 	estimated_width.full = tolerable_latency.full - wm->worst_case_latency.full;
 	estimated_width.full = rfixed_div(estimated_width, consumption_time);
 	if (rfixed_trunc(estimated_width) > crtc->base.mode.crtc_hdisplay) {
-		wm->priority_mark.full = rfixed_const(10);
+		wm->priority_mark.full = wm->priority_mark_max.full;
 	} else {
 		a.full = rfixed_const(16);
 		wm->priority_mark.full = rfixed_div(estimated_width, a);
+		wm->priority_mark.full = rfixed_ceil(wm->priority_mark);
 		wm->priority_mark.full = wm->priority_mark_max.full - wm->priority_mark.full;
 	}
 }
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_gart.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_gart.c
@@ -78,11 +78,9 @@
 	int r;
 
 	if (rdev->gart.table.vram.robj == NULL) {
-		r = radeon_object_create(rdev, NULL,
-					 rdev->gart.table_size,
-					 true,
-					 RADEON_GEM_DOMAIN_VRAM,
-					 false, &rdev->gart.table.vram.robj);
+		r = radeon_bo_create(rdev, NULL, rdev->gart.table_size,
+					true, RADEON_GEM_DOMAIN_VRAM,
+					&rdev->gart.table.vram.robj);
 		if (r) {
 			return r;
 		}
@@ -95,32 +93,38 @@
 	uint64_t gpu_addr;
 	int r;
 
-	r = radeon_object_pin(rdev->gart.table.vram.robj,
-			      RADEON_GEM_DOMAIN_VRAM, &gpu_addr);
-	if (r) {
-		radeon_object_unref(&rdev->gart.table.vram.robj);
+	r = radeon_bo_reserve(rdev->gart.table.vram.robj, false);
+	if (unlikely(r != 0))
 		return r;
-	}
-	r = radeon_object_kmap(rdev->gart.table.vram.robj,
-			       (void **)&rdev->gart.table.vram.ptr);
+	r = radeon_bo_pin(rdev->gart.table.vram.robj,
+				RADEON_GEM_DOMAIN_VRAM, &gpu_addr);
 	if (r) {
-		radeon_object_unpin(rdev->gart.table.vram.robj);
-		radeon_object_unref(&rdev->gart.table.vram.robj);
-		DRM_ERROR("radeon: failed to map gart vram table.\n");
+		radeon_bo_unreserve(rdev->gart.table.vram.robj);
 		return r;
 	}
+	r = radeon_bo_kmap(rdev->gart.table.vram.robj,
+				(void **)&rdev->gart.table.vram.ptr);
+	if (r)
+		radeon_bo_unpin(rdev->gart.table.vram.robj);
+	radeon_bo_unreserve(rdev->gart.table.vram.robj);
 	rdev->gart.table_addr = gpu_addr;
-	return 0;
+	return r;
 }
 
 void radeon_gart_table_vram_free(struct radeon_device *rdev)
 {
+	int r;
+
 	if (rdev->gart.table.vram.robj == NULL) {
 		return;
 	}
-	radeon_object_kunmap(rdev->gart.table.vram.robj);
-	radeon_object_unpin(rdev->gart.table.vram.robj);
-	radeon_object_unref(&rdev->gart.table.vram.robj);
+	r = radeon_bo_reserve(rdev->gart.table.vram.robj, false);
+	if (likely(r == 0)) {
+		radeon_bo_kunmap(rdev->gart.table.vram.robj);
+		radeon_bo_unpin(rdev->gart.table.vram.robj);
+		radeon_bo_unreserve(rdev->gart.table.vram.robj);
+	}
+	radeon_bo_unref(&rdev->gart.table.vram.robj);
 }
 
 
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/rv770.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/rv770.c
@@ -92,7 +92,7 @@
 void rv770_pcie_gart_disable(struct radeon_device *rdev)
 {
 	u32 tmp;
-	int i;
+	int i, r;
 
 	/* Disable all tables */
 	for (i = 0; i < 7; i++)
@@ -113,8 +113,12 @@
 	WREG32(MC_VM_MB_L1_TLB2_CNTL, tmp);
 	WREG32(MC_VM_MB_L1_TLB3_CNTL, tmp);
 	if (rdev->gart.table.vram.robj) {
-		radeon_object_kunmap(rdev->gart.table.vram.robj);
-		radeon_object_unpin(rdev->gart.table.vram.robj);
+		r = radeon_bo_reserve(rdev->gart.table.vram.robj, false);
+		if (likely(r == 0)) {
+			radeon_bo_kunmap(rdev->gart.table.vram.robj);
+			radeon_bo_unpin(rdev->gart.table.vram.robj);
+			radeon_bo_unreserve(rdev->gart.table.vram.robj);
+		}
 	}
 }
 
@@ -167,7 +171,10 @@
 		WREG32((0x2c20 + j), 0x00000000);
 		WREG32((0x2c24 + j), 0x00000000);
 	}
-	WREG32(HDP_REG_COHERENCY_FLUSH_CNTL, 0);
+	/* r7xx hw bug.  Read from HDP_DEBUG1 rather
+	 * than writing to HDP_REG_COHERENCY_FLUSH_CNTL
+	 */
+	tmp = RREG32(HDP_DEBUG1);
 
 	rv515_mc_stop(rdev, &save);
 	if (r600_mc_wait_for_idle(rdev)) {
@@ -545,9 +552,12 @@
 
 	gb_tiling_config |= BANK_SWAPS(1);
 
-	backend_map = r700_get_tile_pipe_to_backend_map(rdev->config.rv770.max_tile_pipes,
-							rdev->config.rv770.max_backends,
-							(0xff << rdev->config.rv770.max_backends) & 0xff);
+	if (rdev->family == CHIP_RV740)
+		backend_map = 0x28;
+	else
+		backend_map = r700_get_tile_pipe_to_backend_map(rdev->config.rv770.max_tile_pipes,
+								rdev->config.rv770.max_backends,
+								(0xff << rdev->config.rv770.max_backends) & 0xff);
 	gb_tiling_config |= BACKEND_MAP(backend_map);
 
 	cc_gc_shader_pipe_config =
@@ -770,12 +780,59 @@
 
 }
 
+static int rv770_vram_scratch_init(struct radeon_device *rdev)
+{
+	int r;
+	u64 gpu_addr;
+
+	if (rdev->vram_scratch.robj == NULL) {
+		r = radeon_bo_create(rdev, NULL, RADEON_GPU_PAGE_SIZE,
+					true, RADEON_GEM_DOMAIN_VRAM,
+					&rdev->vram_scratch.robj);
+		if (r) {
+			return r;
+		}
+	}
+
+	r = radeon_bo_reserve(rdev->vram_scratch.robj, false);
+	if (unlikely(r != 0))
+		return r;
+	r = radeon_bo_pin(rdev->vram_scratch.robj,
+			  RADEON_GEM_DOMAIN_VRAM, &gpu_addr);
+	if (r) {
+		radeon_bo_unreserve(rdev->vram_scratch.robj);
+		return r;
+	}
+	r = radeon_bo_kmap(rdev->vram_scratch.robj,
+				(void **)&rdev->vram_scratch.ptr);
+	if (r)
+		radeon_bo_unpin(rdev->vram_scratch.robj);
+	radeon_bo_unreserve(rdev->vram_scratch.robj);
+
+	return r;
+}
+
+static void rv770_vram_scratch_fini(struct radeon_device *rdev)
+{
+	int r;
+
+	if (rdev->vram_scratch.robj == NULL) {
+		return;
+	}
+	r = radeon_bo_reserve(rdev->vram_scratch.robj, false);
+	if (likely(r == 0)) {
+		radeon_bo_kunmap(rdev->vram_scratch.robj);
+		radeon_bo_unpin(rdev->vram_scratch.robj);
+		radeon_bo_unreserve(rdev->vram_scratch.robj);
+	}
+	radeon_bo_unref(&rdev->vram_scratch.robj);
+}
+
 int rv770_mc_init(struct radeon_device *rdev)
 {
 	fixed20_12 a;
 	u32 tmp;
 	int chansize, numchan;
-	int r;
 
 	/* Get VRAM informations */
 	rdev->mc.vram_is_ddr = true;
@@ -818,9 +875,6 @@
 		rdev->mc.real_vram_size = rdev->mc.aper_size;
 
 	if (rdev->flags & RADEON_IS_AGP) {
-		r = radeon_agp_init(rdev);
-		if (r)
-			return r;
 		/* gtt_size is setup by radeon_agp_init */
 		rdev->mc.gtt_location = rdev->mc.agp_base;
 		tmp = 0xFFFFFFFFUL - rdev->mc.agp_base - rdev->mc.gtt_size;
@@ -829,11 +883,11 @@
 		 * AGP so that GPU can catch out of VRAM/AGP access
 		 */
 		if (rdev->mc.gtt_location > rdev->mc.mc_vram_size) {
-			/* Enought place before */
+			/* Enough place before */
 			rdev->mc.vram_location = rdev->mc.gtt_location -
 							rdev->mc.mc_vram_size;
 		} else if (tmp > rdev->mc.mc_vram_size) {
-			/* Enought place after */
+			/* Enough place after */
 			rdev->mc.vram_location = rdev->mc.gtt_location +
 							rdev->mc.gtt_size;
 		} else {
@@ -870,6 +924,14 @@
 {
 	int r;
 
+	if (!rdev->me_fw || !rdev->pfp_fw || !rdev->rlc_fw) {
+		r = r600_init_microcode(rdev);
+		if (r) {
+			DRM_ERROR("Failed to load firmware!\n");
+			return r;
+		}
+	}
+
 	rv770_mc_program(rdev);
 	if (rdev->flags & RADEON_IS_AGP) {
 		rv770_agp_enable(rdev);
@@ -878,14 +940,37 @@
 		if (r)
 			return r;
 	}
+	r = rv770_vram_scratch_init(rdev);
+	if (r)
+		return r;
 	rv770_gpu_init(rdev);
-
-	r = radeon_object_pin(rdev->r600_blit.shader_obj, RADEON_GEM_DOMAIN_VRAM,
-			      &rdev->r600_blit.shader_gpu_addr);
+	r = r600_blit_init(rdev);
+	if (r) {
+		r600_blit_fini(rdev);
+		rdev->asic->copy = NULL;
+		dev_warn(rdev->dev, "failed blitter (%d) falling back to memcpy\n", r);
+	}
+	/* pin copy shader into vram */
+	if (rdev->r600_blit.shader_obj) {
+		r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false);
+		if (unlikely(r != 0))
+			return r;
+		r = radeon_bo_pin(rdev->r600_blit.shader_obj, RADEON_GEM_DOMAIN_VRAM,
+				&rdev->r600_blit.shader_gpu_addr);
+		radeon_bo_unreserve(rdev->r600_blit.shader_obj);
+		if (r) {
+			DRM_ERROR("failed to pin blit object %d\n", r);
+			return r;
+		}
+	}
+	/* Enable IRQ */
+	r = r600_irq_init(rdev);
 	if (r) {
-		DRM_ERROR("failed to pin blit object %d\n", r);
+		DRM_ERROR("radeon: IH init failed (%d).\n", r);
+		radeon_irq_kms_fini(rdev);
 		return r;
 	}
+	r600_irq_set(rdev);
 
 	r = radeon_ring_init(rdev, rdev->cp.ring_size);
 	if (r)
@@ -934,13 +1019,22 @@
 
 int rv770_suspend(struct radeon_device *rdev)
 {
+	int r;
+
 	/* FIXME: we should wait for ring to be empty */
 	r700_cp_stop(rdev);
 	rdev->cp.ready = false;
+	r600_irq_suspend(rdev);
 	r600_wb_disable(rdev);
 	rv770_pcie_gart_disable(rdev);
 	/* unpin shaders bo */
-        radeon_object_unpin(rdev->r600_blit.shader_obj);
+	if (rdev->r600_blit.shader_obj) {
+		r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false);
+		if (likely(r == 0)) {
+			radeon_bo_unpin(rdev->r600_blit.shader_obj);
+			radeon_bo_unreserve(rdev->r600_blit.shader_obj);
+		}
+	}
 	return 0;
 }
 
@@ -975,7 +1069,11 @@
 	if (r)
 		return r;
 	/* Post card if necessary */
-	if (!r600_card_posted(rdev) && rdev->bios) {
+	if (!r600_card_posted(rdev)) {
+		if (!rdev->bios) {
+			dev_err(rdev->dev, "Card not posted and no BIOS - ignoring\n");
+			return -EINVAL;
+		}
 		DRM_INFO("GPU not posted. posting now...\n");
 		atom_asic_init(rdev->mode_info.atom_context);
 	}
@@ -994,53 +1092,55 @@
 	r = radeon_fence_driver_init(rdev);
 	if (r)
 		return r;
+	if (rdev->flags & RADEON_IS_AGP) {
+		r = radeon_agp_init(rdev);
+		if (r)
+			radeon_agp_disable(rdev);
+	}
 	r = rv770_mc_init(rdev);
 	if (r)
 		return r;
 	/* Memory manager */
-	r = radeon_object_init(rdev);
+	r = radeon_bo_init(rdev);
 	if (r)
 		return r;
+
+	r = radeon_irq_kms_init(rdev);
+	if (r)
+		return r;
+
 	rdev->cp.ring_obj = NULL;
 	r600_ring_init(rdev, 1024 * 1024);
 
-	if (!rdev->me_fw || !rdev->pfp_fw) {
-		r = r600_cp_init_microcode(rdev);
-		if (r) {
-			DRM_ERROR("Failed to load firmware!\n");
-			return r;
-		}
-	}
+	rdev->ih.ring_obj = NULL;
+	r600_ih_ring_init(rdev, 64 * 1024);
 
 	r = r600_pcie_gart_init(rdev);
 	if (r)
 		return r;
 
 	rdev->accel_working = true;
-	r = r600_blit_init(rdev);
-	if (r) {
-		DRM_ERROR("radeon: failled blitter (%d).\n", r);
-		rdev->accel_working = false;
-	}
-
 	r = rv770_startup(rdev);
 	if (r) {
-		rv770_suspend(rdev);
+		dev_err(rdev->dev, "disabling GPU acceleration\n");
+		r600_cp_fini(rdev);
 		r600_wb_fini(rdev);
-		radeon_ring_fini(rdev);
+		r600_irq_fini(rdev);
+		radeon_irq_kms_fini(rdev);
 		rv770_pcie_gart_fini(rdev);
 		rdev->accel_working = false;
 	}
 	if (rdev->accel_working) {
 		r = radeon_ib_pool_init(rdev);
 		if (r) {
-			DRM_ERROR("radeon: failled initializing IB pool (%d).\n", r);
-			rdev->accel_working = false;
-		}
-		r = r600_ib_test(rdev);
-		if (r) {
-			DRM_ERROR("radeon: failled testing IB (%d).\n", r);
+			dev_err(rdev->dev, "IB initialization failed (%d).\n", r);
 			rdev->accel_working = false;
+		} else {
+			r = r600_ib_test(rdev);
+			if (r) {
+				dev_err(rdev->dev, "IB test failed (%d).\n", r);
+				rdev->accel_working = false;
+			}
 		}
 	}
 	return 0;
@@ -1048,18 +1148,18 @@
 
 void rv770_fini(struct radeon_device *rdev)
 {
-	rv770_suspend(rdev);
-
 	r600_blit_fini(rdev);
-	radeon_ring_fini(rdev);
+	r600_cp_fini(rdev);
 	r600_wb_fini(rdev);
+	r600_irq_fini(rdev);
+	radeon_irq_kms_fini(rdev);
 	rv770_pcie_gart_fini(rdev);
+	rv770_vram_scratch_fini(rdev);
 	radeon_gem_fini(rdev);
 	radeon_fence_driver_fini(rdev);
 	radeon_clocks_fini(rdev);
-	if (rdev->flags & RADEON_IS_AGP)
-		radeon_agp_fini(rdev);
-	radeon_object_fini(rdev);
+	radeon_agp_fini(rdev);
+	radeon_bo_fini(rdev);
 	radeon_atombios_fini(rdev);
 	kfree(rdev->bios);
 	rdev->bios = NULL;
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/r600_reg.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/r600_reg.h
@@ -86,6 +86,7 @@
 #define R600_HDP_NONSURFACE_BASE                                0x2c04
 
 #define R600_BUS_CNTL                                           0x5420
+#       define R600_BIOS_ROM_DIS                                (1 << 1)
 #define R600_CONFIG_CNTL                                        0x5424
 #define R600_CONFIG_MEMSIZE                                     0x5428
 #define R600_CONFIG_F0_BASE                                     0x542C
@@ -110,5 +111,79 @@
 #define R600_BIOS_6_SCRATCH               0x173c
 #define R600_BIOS_7_SCRATCH               0x1740
 
+/* Audio, these regs were reverse enginered,
+ * so the chance is high that the naming is wrong
+ * R6xx+ ??? */
+
+/* Audio clocks */
+#define R600_AUDIO_PLL1_MUL               0x0514
+#define R600_AUDIO_PLL1_DIV               0x0518
+#define R600_AUDIO_PLL2_MUL               0x0524
+#define R600_AUDIO_PLL2_DIV               0x0528
+#define R600_AUDIO_CLK_SRCSEL             0x0534
+
+/* Audio general */
+#define R600_AUDIO_ENABLE                 0x7300
+#define R600_AUDIO_TIMING                 0x7344
+
+/* Audio params */
+#define R600_AUDIO_VENDOR_ID              0x7380
+#define R600_AUDIO_REVISION_ID            0x7384
+#define R600_AUDIO_ROOT_NODE_COUNT        0x7388
+#define R600_AUDIO_NID1_NODE_COUNT        0x738c
+#define R600_AUDIO_NID1_TYPE              0x7390
+#define R600_AUDIO_SUPPORTED_SIZE_RATE    0x7394
+#define R600_AUDIO_SUPPORTED_CODEC        0x7398
+#define R600_AUDIO_SUPPORTED_POWER_STATES 0x739c
+#define R600_AUDIO_NID2_CAPS              0x73a0
+#define R600_AUDIO_NID3_CAPS              0x73a4
+#define R600_AUDIO_NID3_PIN_CAPS          0x73a8
+
+/* Audio conn list */
+#define R600_AUDIO_CONN_LIST_LEN          0x73ac
+#define R600_AUDIO_CONN_LIST              0x73b0
+
+/* Audio verbs */
+#define R600_AUDIO_RATE_BPS_CHANNEL       0x73c0
+#define R600_AUDIO_PLAYING                0x73c4
+#define R600_AUDIO_IMPLEMENTATION_ID      0x73c8
+#define R600_AUDIO_CONFIG_DEFAULT         0x73cc
+#define R600_AUDIO_PIN_SENSE              0x73d0
+#define R600_AUDIO_PIN_WIDGET_CNTL        0x73d4
+#define R600_AUDIO_STATUS_BITS            0x73d8
+
+/* HDMI base register addresses */
+#define R600_HDMI_TMDS1                   0x7400
+#define R600_HDMI_TMDS2                   0x7700
+#define R600_HDMI_DIG                     0x7800
+
+/* HDMI registers */
+#define R600_HDMI_ENABLE           0x00
+#define R600_HDMI_STATUS           0x04
+#define R600_HDMI_CNTL             0x08
+#define R600_HDMI_UNKNOWN_0        0x0C
+#define R600_HDMI_AUDIOCNTL        0x10
+#define R600_HDMI_VIDEOCNTL        0x14
+#define R600_HDMI_VERSION          0x18
+#define R600_HDMI_UNKNOWN_1        0x28
+#define R600_HDMI_VIDEOINFOFRAME_0 0x54
+#define R600_HDMI_VIDEOINFOFRAME_1 0x58
+#define R600_HDMI_VIDEOINFOFRAME_2 0x5c
+#define R600_HDMI_VIDEOINFOFRAME_3 0x60
+#define R600_HDMI_32kHz_CTS        0xac
+#define R600_HDMI_32kHz_N          0xb0
+#define R600_HDMI_44_1kHz_CTS      0xb4
+#define R600_HDMI_44_1kHz_N        0xb8
+#define R600_HDMI_48kHz_CTS        0xbc
+#define R600_HDMI_48kHz_N          0xc0
+#define R600_HDMI_AUDIOINFOFRAME_0 0xcc
+#define R600_HDMI_AUDIOINFOFRAME_1 0xd0
+#define R600_HDMI_IEC60958_1       0xd4
+#define R600_HDMI_IEC60958_2       0xd8
+#define R600_HDMI_UNKNOWN_2        0xdc
+#define R600_HDMI_AUDIO_DEBUG_0    0xe0
+#define R600_HDMI_AUDIO_DEBUG_1    0xe4
+#define R600_HDMI_AUDIO_DEBUG_2    0xe8
+#define R600_HDMI_AUDIO_DEBUG_3    0xec
 
 #endif
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_bios.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_bios.c
@@ -106,7 +106,7 @@
 	bool r;
 
 	viph_control = RREG32(RADEON_VIPH_CONTROL);
-	bus_cntl = RREG32(RADEON_BUS_CNTL);
+	bus_cntl = RREG32(R600_BUS_CNTL);
 	d1vga_control = RREG32(AVIVO_D1VGA_CONTROL);
 	d2vga_control = RREG32(AVIVO_D2VGA_CONTROL);
 	vga_render_control = RREG32(AVIVO_VGA_RENDER_CONTROL);
@@ -115,7 +115,7 @@
 	/* disable VIP */
 	WREG32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN));
 	/* enable the rom */
-	WREG32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM));
+	WREG32(R600_BUS_CNTL, (bus_cntl & ~R600_BIOS_ROM_DIS));
 	/* Disable VGA mode */
 	WREG32(AVIVO_D1VGA_CONTROL,
 	       (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE |
@@ -154,7 +154,7 @@
 			cg_spll_status = RREG32(R600_CG_SPLL_STATUS);
 	}
 	WREG32(RADEON_VIPH_CONTROL, viph_control);
-	WREG32(RADEON_BUS_CNTL, bus_cntl);
+	WREG32(R600_BUS_CNTL, bus_cntl);
 	WREG32(AVIVO_D1VGA_CONTROL, d1vga_control);
 	WREG32(AVIVO_D2VGA_CONTROL, d2vga_control);
 	WREG32(AVIVO_VGA_RENDER_CONTROL, vga_render_control);
@@ -179,7 +179,7 @@
 	bool r;
 
 	viph_control = RREG32(RADEON_VIPH_CONTROL);
-	bus_cntl = RREG32(RADEON_BUS_CNTL);
+	bus_cntl = RREG32(R600_BUS_CNTL);
 	d1vga_control = RREG32(AVIVO_D1VGA_CONTROL);
 	d2vga_control = RREG32(AVIVO_D2VGA_CONTROL);
 	vga_render_control = RREG32(AVIVO_VGA_RENDER_CONTROL);
@@ -194,7 +194,7 @@
 	/* disable VIP */
 	WREG32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN));
 	/* enable the rom */
-	WREG32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM));
+	WREG32(R600_BUS_CNTL, (bus_cntl & ~R600_BIOS_ROM_DIS));
 	/* Disable VGA mode */
 	WREG32(AVIVO_D1VGA_CONTROL,
 	       (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE |
@@ -225,7 +225,7 @@
 
 	/* restore regs */
 	WREG32(RADEON_VIPH_CONTROL, viph_control);
-	WREG32(RADEON_BUS_CNTL, bus_cntl);
+	WREG32(R600_BUS_CNTL, bus_cntl);
 	WREG32(AVIVO_D1VGA_CONTROL, d1vga_control);
 	WREG32(AVIVO_D2VGA_CONTROL, d2vga_control);
 	WREG32(AVIVO_VGA_RENDER_CONTROL, vga_render_control);
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_cs.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_cs.c
@@ -76,17 +76,17 @@
 			}
 			p->relocs_ptr[i] = &p->relocs[i];
 			p->relocs[i].robj = p->relocs[i].gobj->driver_private;
-			p->relocs[i].lobj.robj = p->relocs[i].robj;
+			p->relocs[i].lobj.bo = p->relocs[i].robj;
 			p->relocs[i].lobj.rdomain = r->read_domains;
 			p->relocs[i].lobj.wdomain = r->write_domain;
 			p->relocs[i].handle = r->handle;
 			p->relocs[i].flags = r->flags;
 			INIT_LIST_HEAD(&p->relocs[i].lobj.list);
-			radeon_object_list_add_object(&p->relocs[i].lobj,
-						      &p->validated);
+			radeon_bo_list_add_object(&p->relocs[i].lobj,
+						&p->validated);
 		}
 	}
-	return radeon_object_list_validate(&p->validated, p->ib->fence);
+	return radeon_bo_list_validate(&p->validated);
 }
 
 int radeon_cs_parser_init(struct radeon_cs_parser *p, void *data)
@@ -189,16 +189,17 @@
 {
 	unsigned i;
 
-	if (error) {
-		radeon_object_list_unvalidate(&parser->validated);
-	} else {
-		radeon_object_list_clean(&parser->validated);
-	}
-	for (i = 0; i < parser->nrelocs; i++) {
-		if (parser->relocs[i].gobj) {
-			mutex_lock(&parser->rdev->ddev->struct_mutex);
-			drm_gem_object_unreference(parser->relocs[i].gobj);
-			mutex_unlock(&parser->rdev->ddev->struct_mutex);
+	if (!error && parser->ib) {
+		radeon_bo_list_fence(&parser->validated, parser->ib->fence);
+	}
+	radeon_bo_list_unreserve(&parser->validated);
+	if (parser->relocs != NULL) {
+		for (i = 0; i < parser->nrelocs; i++) {
+			if (parser->relocs[i].gobj) {
+				mutex_lock(&parser->rdev->ddev->struct_mutex);
+				drm_gem_object_unreference(parser->relocs[i].gobj);
+				mutex_unlock(&parser->rdev->ddev->struct_mutex);
+			}
 		}
 	}
 	kfree(parser->track);
@@ -230,6 +231,7 @@
 	memset(&parser, 0, sizeof(struct radeon_cs_parser));
 	parser.filp = filp;
 	parser.rdev = rdev;
+	parser.dev = rdev->dev;
 	r = radeon_cs_parser_init(&parser, data);
 	if (r) {
 		DRM_ERROR("Failed to initialize parser !\n");
@@ -246,7 +248,8 @@
 	}
 	r = radeon_cs_parser_relocs(&parser);
 	if (r) {
-		DRM_ERROR("Failed to parse relocation !\n");
+		if (r != -ERESTARTSYS)
+			DRM_ERROR("Failed to parse relocation %d!\n", r);
 		radeon_cs_parser_fini(&parser, r);
 		mutex_unlock(&rdev->cs_mutex);
 		return r;
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_ttm.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_ttm.c
@@ -150,7 +150,7 @@
 		man->default_caching = TTM_PL_FLAG_CACHED;
 		break;
 	case TTM_PL_TT:
-		man->gpu_offset = 0;
+		man->gpu_offset = rdev->mc.gtt_location;
 		man->available_caching = TTM_PL_MASK_CACHING;
 		man->default_caching = TTM_PL_FLAG_CACHED;
 		man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | TTM_MEMTYPE_FLAG_CMA;
@@ -180,7 +180,7 @@
 		break;
 	case TTM_PL_VRAM:
 		/* "On-card" video ram */
-		man->gpu_offset = 0;
+		man->gpu_offset = rdev->mc.vram_location;
 		man->flags = TTM_MEMTYPE_FLAG_FIXED |
 			     TTM_MEMTYPE_FLAG_NEEDS_IOREMAP |
 			     TTM_MEMTYPE_FLAG_MAPPABLE;
@@ -197,16 +197,34 @@
 	return 0;
 }
 
-static uint32_t radeon_evict_flags(struct ttm_buffer_object *bo)
+static void radeon_evict_flags(struct ttm_buffer_object *bo,
+				struct ttm_placement *placement)
 {
-	uint32_t cur_placement = bo->mem.placement & ~TTM_PL_MASK_MEMTYPE;
+	struct radeon_bo *rbo;
+	static u32 placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
 
+	if (!radeon_ttm_bo_is_radeon_bo(bo)) {
+		placement->fpfn = 0;
+		placement->lpfn = 0;
+		placement->placement = &placements;
+		placement->busy_placement = &placements;
+		placement->num_placement = 1;
+		placement->num_busy_placement = 1;
+		return;
+	}
+	rbo = container_of(bo, struct radeon_bo, tbo);
 	switch (bo->mem.mem_type) {
+	case TTM_PL_VRAM:
+		if (rbo->rdev->cp.ready == false)
+			radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
+		else
+			radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
+		break;
+	case TTM_PL_TT:
 	default:
-		return (cur_placement & ~TTM_PL_MASK_CACHING) |
-			TTM_PL_FLAG_SYSTEM |
-			TTM_PL_FLAG_CACHED;
+		radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
 	}
+	*placement = rbo->placement;
 }
 
 static int radeon_verify_access(struct ttm_buffer_object *bo, struct file *filp)
@@ -283,14 +301,21 @@
 	struct radeon_device *rdev;
 	struct ttm_mem_reg *old_mem = &bo->mem;
 	struct ttm_mem_reg tmp_mem;
-	uint32_t proposed_placement;
+	u32 placements;
+	struct ttm_placement placement;
 	int r;
 
 	rdev = radeon_get_rdev(bo->bdev);
 	tmp_mem = *new_mem;
 	tmp_mem.mm_node = NULL;
-	proposed_placement = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING;
-	r = ttm_bo_mem_space(bo, proposed_placement, &tmp_mem,
+	placement.fpfn = 0;
+	placement.lpfn = 0;
+	placement.num_placement = 1;
+	placement.placement = &placements;
+	placement.num_busy_placement = 1;
+	placement.busy_placement = &placements;
+	placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
+	r = ttm_bo_mem_space(bo, &placement, &tmp_mem,
 			     interruptible, no_wait);
 	if (unlikely(r)) {
 		return r;
@@ -329,15 +354,21 @@
 	struct radeon_device *rdev;
 	struct ttm_mem_reg *old_mem = &bo->mem;
 	struct ttm_mem_reg tmp_mem;
-	uint32_t proposed_flags;
+	struct ttm_placement placement;
+	u32 placements;
 	int r;
 
 	rdev = radeon_get_rdev(bo->bdev);
 	tmp_mem = *new_mem;
 	tmp_mem.mm_node = NULL;
-	proposed_flags = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING;
-	r = ttm_bo_mem_space(bo, proposed_flags, &tmp_mem,
-			     interruptible, no_wait);
+	placement.fpfn = 0;
+	placement.lpfn = 0;
+	placement.num_placement = 1;
+	placement.placement = &placements;
+	placement.num_busy_placement = 1;
+	placement.busy_placement = &placements;
+	placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
+	r = ttm_bo_mem_space(bo, &placement, &tmp_mem, interruptible, no_wait);
 	if (unlikely(r)) {
 		return r;
 	}
@@ -378,7 +409,7 @@
 	     new_mem->mem_type == TTM_PL_SYSTEM) ||
 	    (old_mem->mem_type == TTM_PL_SYSTEM &&
 	     new_mem->mem_type == TTM_PL_TT)) {
-		/* bind is enought */
+		/* bind is enough */
 		radeon_move_null(bo, new_mem);
 		return 0;
 	}
@@ -407,18 +438,6 @@
 	return r;
 }
 
-const uint32_t radeon_mem_prios[] = {
-	TTM_PL_VRAM,
-	TTM_PL_TT,
-	TTM_PL_SYSTEM,
-};
-
-const uint32_t radeon_busy_prios[] = {
-	TTM_PL_TT,
-	TTM_PL_VRAM,
-	TTM_PL_SYSTEM,
-};
-
 static int radeon_sync_obj_wait(void *sync_obj, void *sync_arg,
 				bool lazy, bool interruptible)
 {
@@ -446,10 +465,6 @@
 }
 
 static struct ttm_bo_driver radeon_bo_driver = {
-	.mem_type_prio = radeon_mem_prios,
-	.mem_busy_prio = radeon_busy_prios,
-	.num_mem_type_prio = ARRAY_SIZE(radeon_mem_prios),
-	.num_mem_busy_prio = ARRAY_SIZE(radeon_busy_prios),
 	.create_ttm_backend_entry = &radeon_create_ttm_backend_entry,
 	.invalidate_caches = &radeon_invalidate_caches,
 	.init_mem_type = &radeon_init_mem_type,
@@ -482,27 +497,32 @@
 		DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
 		return r;
 	}
-	r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_VRAM, 0,
-			   ((rdev->mc.real_vram_size) >> PAGE_SHIFT));
+	rdev->mman.initialized = true;
+	r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_VRAM,
+				rdev->mc.real_vram_size >> PAGE_SHIFT);
 	if (r) {
 		DRM_ERROR("Failed initializing VRAM heap.\n");
 		return r;
 	}
-	r = radeon_object_create(rdev, NULL, 256 * 1024, true,
-				 RADEON_GEM_DOMAIN_VRAM, false,
-				 &rdev->stollen_vga_memory);
+	r = radeon_bo_create(rdev, NULL, 256 * 1024, true,
+				RADEON_GEM_DOMAIN_VRAM,
+				&rdev->stollen_vga_memory);
 	if (r) {
 		return r;
 	}
-	r = radeon_object_pin(rdev->stollen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL);
+	r = radeon_bo_reserve(rdev->stollen_vga_memory, false);
+	if (r)
+		return r;
+	r = radeon_bo_pin(rdev->stollen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL);
+	radeon_bo_unreserve(rdev->stollen_vga_memory);
 	if (r) {
-		radeon_object_unref(&rdev->stollen_vga_memory);
+		radeon_bo_unref(&rdev->stollen_vga_memory);
 		return r;
 	}
 	DRM_INFO("radeon: %uM of VRAM memory ready\n",
 		 (unsigned)rdev->mc.real_vram_size / (1024 * 1024));
-	r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_TT, 0,
-			   ((rdev->mc.gtt_size) >> PAGE_SHIFT));
+	r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_TT,
+				rdev->mc.gtt_size >> PAGE_SHIFT);
 	if (r) {
 		DRM_ERROR("Failed initializing GTT heap.\n");
 		return r;
@@ -523,15 +543,24 @@
 
 void radeon_ttm_fini(struct radeon_device *rdev)
 {
+	int r;
+
+	if (!rdev->mman.initialized)
+		return;
 	if (rdev->stollen_vga_memory) {
-		radeon_object_unpin(rdev->stollen_vga_memory);
-		radeon_object_unref(&rdev->stollen_vga_memory);
+		r = radeon_bo_reserve(rdev->stollen_vga_memory, false);
+		if (r == 0) {
+			radeon_bo_unpin(rdev->stollen_vga_memory);
+			radeon_bo_unreserve(rdev->stollen_vga_memory);
+		}
+		radeon_bo_unref(&rdev->stollen_vga_memory);
 	}
 	ttm_bo_clean_mm(&rdev->mman.bdev, TTM_PL_VRAM);
 	ttm_bo_clean_mm(&rdev->mman.bdev, TTM_PL_TT);
 	ttm_bo_device_release(&rdev->mman.bdev);
 	radeon_gart_fini(rdev);
 	radeon_ttm_global_fini(rdev);
+	rdev->mman.initialized = false;
 	DRM_INFO("radeon: ttm finalized\n");
 }
 
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_agp.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_agp.c
@@ -144,9 +144,19 @@
 
 	ret = drm_agp_info(rdev->ddev, &info);
 	if (ret) {
+		drm_agp_release(rdev->ddev);
 		DRM_ERROR("Unable to get AGP info: %d\n", ret);
 		return ret;
 	}
+
+	if (rdev->ddev->agp->agp_info.aper_size < 32) {
+		drm_agp_release(rdev->ddev);
+		dev_warn(rdev->dev, "AGP aperture too small (%zuM) "
+			"need at least 32M, disabling AGP\n",
+			rdev->ddev->agp->agp_info.aper_size);
+		return -EINVAL;
+	}
+
 	mode.mode = info.mode;
 	agp_status = (RREG32(RADEON_AGP_STATUS) | RADEON_AGPv3_MODE) & mode.mode;
 	is_v3 = !!(agp_status & RADEON_AGPv3_MODE);
@@ -221,6 +231,7 @@
 	ret = drm_agp_enable(rdev->ddev, mode);
 	if (ret) {
 		DRM_ERROR("Unable to enable AGP (mode = 0x%lx)\n", mode.mode);
+		drm_agp_release(rdev->ddev);
 		return ret;
 	}
 
@@ -252,10 +263,13 @@
 void radeon_agp_fini(struct radeon_device *rdev)
 {
 #if __OS_HAS_AGP
-	if (rdev->flags & RADEON_IS_AGP) {
-		if (rdev->ddev->agp && rdev->ddev->agp->acquired) {
-			drm_agp_release(rdev->ddev);
-		}
+	if (rdev->ddev->agp && rdev->ddev->agp->acquired) {
+		drm_agp_release(rdev->ddev);
 	}
 #endif
 }
+
+void radeon_agp_suspend(struct radeon_device *rdev)
+{
+	radeon_agp_fini(rdev);
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/atom.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/atom.h
@@ -91,6 +91,7 @@
 #define ATOM_WS_AND_MASK	0x45
 #define ATOM_WS_FB_WINDOW	0x46
 #define ATOM_WS_ATTRIBUTES	0x47
+#define ATOM_WS_REGPTR  	0x48
 
 #define ATOM_IIO_NOP		0
 #define ATOM_IIO_START		1
@@ -120,6 +121,7 @@
 
 struct atom_context {
 	struct card_info *card;
+	struct mutex mutex;
 	void *bios;
 	uint32_t cmd_table, data_table;
 	uint16_t *iio;
@@ -132,6 +134,7 @@
 	uint8_t shift;
 	int cs_equal, cs_above;
 	int io_mode;
+	uint32_t *scratch;
 };
 
 extern int atom_debug;
@@ -142,6 +145,7 @@
 void atom_destroy(struct atom_context *);
 void atom_parse_data_header(struct atom_context *ctx, int index, uint16_t *size, uint8_t *frev, uint8_t *crev, uint16_t *data_start);
 void atom_parse_cmd_header(struct atom_context *ctx, int index, uint8_t *frev, uint8_t *crev);
+int atom_allocate_fb_scratch(struct atom_context *ctx);
 #include "atom-types.h"
 #include "atombios.h"
 #include "ObjectID.h"
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_gem.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_gem.c
@@ -38,22 +38,21 @@
 
 void radeon_gem_object_free(struct drm_gem_object *gobj)
 {
-	struct radeon_object *robj = gobj->driver_private;
+	struct radeon_bo *robj = gobj->driver_private;
 
 	gobj->driver_private = NULL;
 	if (robj) {
-		radeon_object_unref(&robj);
+		radeon_bo_unref(&robj);
 	}
 }
 
 int radeon_gem_object_create(struct radeon_device *rdev, int size,
-			     int alignment, int initial_domain,
-			     bool discardable, bool kernel,
-			     bool interruptible,
-			     struct drm_gem_object **obj)
+				int alignment, int initial_domain,
+				bool discardable, bool kernel,
+				struct drm_gem_object **obj)
 {
 	struct drm_gem_object *gobj;
-	struct radeon_object *robj;
+	struct radeon_bo *robj;
 	int r;
 
 	*obj = NULL;
@@ -65,11 +64,11 @@
 	if (alignment < PAGE_SIZE) {
 		alignment = PAGE_SIZE;
 	}
-	r = radeon_object_create(rdev, gobj, size, kernel, initial_domain,
-				 interruptible, &robj);
+	r = radeon_bo_create(rdev, gobj, size, kernel, initial_domain, &robj);
 	if (r) {
-		DRM_ERROR("Failed to allocate GEM object (%d, %d, %u)\n",
-			  size, initial_domain, alignment);
+		if (r != -ERESTARTSYS)
+			DRM_ERROR("Failed to allocate GEM object (%d, %d, %u, %d)\n",
+				  size, initial_domain, alignment, r);
 		mutex_lock(&rdev->ddev->struct_mutex);
 		drm_gem_object_unreference(gobj);
 		mutex_unlock(&rdev->ddev->struct_mutex);
@@ -83,33 +82,33 @@
 int radeon_gem_object_pin(struct drm_gem_object *obj, uint32_t pin_domain,
 			  uint64_t *gpu_addr)
 {
-	struct radeon_object *robj = obj->driver_private;
-	uint32_t flags;
+	struct radeon_bo *robj = obj->driver_private;
+	int r;
 
-	switch (pin_domain) {
-	case RADEON_GEM_DOMAIN_VRAM:
-		flags = TTM_PL_FLAG_VRAM;
-		break;
-	case RADEON_GEM_DOMAIN_GTT:
-		flags = TTM_PL_FLAG_TT;
-		break;
-	default:
-		flags = TTM_PL_FLAG_SYSTEM;
-		break;
-	}
-	return radeon_object_pin(robj, flags, gpu_addr);
+	r = radeon_bo_reserve(robj, false);
+	if (unlikely(r != 0))
+		return r;
+	r = radeon_bo_pin(robj, pin_domain, gpu_addr);
+	radeon_bo_unreserve(robj);
+	return r;
 }
 
 void radeon_gem_object_unpin(struct drm_gem_object *obj)
 {
-	struct radeon_object *robj = obj->driver_private;
-	radeon_object_unpin(robj);
+	struct radeon_bo *robj = obj->driver_private;
+	int r;
+
+	r = radeon_bo_reserve(robj, false);
+	if (likely(r == 0)) {
+		radeon_bo_unpin(robj);
+		radeon_bo_unreserve(robj);
+	}
 }
 
 int radeon_gem_set_domain(struct drm_gem_object *gobj,
 			  uint32_t rdomain, uint32_t wdomain)
 {
-	struct radeon_object *robj;
+	struct radeon_bo *robj;
 	uint32_t domain;
 	int r;
 
@@ -127,7 +126,7 @@
 	}
 	if (domain == RADEON_GEM_DOMAIN_CPU) {
 		/* Asking for cpu access wait for object idle */
-		r = radeon_object_wait(robj);
+		r = radeon_bo_wait(robj, NULL, false);
 		if (r) {
 			printk(KERN_ERR "Failed to wait for object !\n");
 			return r;
@@ -144,7 +143,7 @@
 
 void radeon_gem_fini(struct radeon_device *rdev)
 {
-	radeon_object_force_delete(rdev);
+	radeon_bo_force_delete(rdev);
 }
 
 
@@ -158,9 +157,13 @@
 	struct drm_radeon_gem_info *args = data;
 
 	args->vram_size = rdev->mc.real_vram_size;
-	/* FIXME: report somethings that makes sense */
-	args->vram_visible = rdev->mc.real_vram_size - (4 * 1024 * 1024);
-	args->gart_size = rdev->mc.gtt_size;
+	args->vram_visible = rdev->mc.real_vram_size;
+	if (rdev->stollen_vga_memory)
+		args->vram_visible -= radeon_bo_size(rdev->stollen_vga_memory);
+	if (rdev->fbdev_rbo)
+		args->vram_visible -= radeon_bo_size(rdev->fbdev_rbo);
+	args->gart_size = rdev->mc.gtt_size - rdev->cp.ring_size - 4096 -
+		RADEON_IB_POOL_SIZE*64*1024;
 	return 0;
 }
 
@@ -192,8 +195,8 @@
 	/* create a gem object to contain this object in */
 	args->size = roundup(args->size, PAGE_SIZE);
 	r = radeon_gem_object_create(rdev, args->size, args->alignment,
-				     args->initial_domain, false,
-				     false, true, &gobj);
+					args->initial_domain, false,
+					false, &gobj);
 	if (r) {
 		return r;
 	}
@@ -218,7 +221,7 @@
 	 * just validate the BO into a certain domain */
 	struct drm_radeon_gem_set_domain *args = data;
 	struct drm_gem_object *gobj;
-	struct radeon_object *robj;
+	struct radeon_bo *robj;
 	int r;
 
 	/* for now if someone requests domain CPU -
@@ -244,19 +247,18 @@
 {
 	struct drm_radeon_gem_mmap *args = data;
 	struct drm_gem_object *gobj;
-	struct radeon_object *robj;
-	int r;
+	struct radeon_bo *robj;
 
 	gobj = drm_gem_object_lookup(dev, filp, args->handle);
 	if (gobj == NULL) {
 		return -EINVAL;
 	}
 	robj = gobj->driver_private;
-	r = radeon_object_mmap(robj, &args->addr_ptr);
+	args->addr_ptr = radeon_bo_mmap_offset(robj);
 	mutex_lock(&dev->struct_mutex);
 	drm_gem_object_unreference(gobj);
 	mutex_unlock(&dev->struct_mutex);
-	return r;
+	return 0;
 }
 
 int radeon_gem_busy_ioctl(struct drm_device *dev, void *data,
@@ -264,16 +266,16 @@
 {
 	struct drm_radeon_gem_busy *args = data;
 	struct drm_gem_object *gobj;
-	struct radeon_object *robj;
+	struct radeon_bo *robj;
 	int r;
-	uint32_t cur_placement;
+	uint32_t cur_placement = 0;
 
 	gobj = drm_gem_object_lookup(dev, filp, args->handle);
 	if (gobj == NULL) {
 		return -EINVAL;
 	}
 	robj = gobj->driver_private;
-	r = radeon_object_busy_domain(robj, &cur_placement);
+	r = radeon_bo_wait(robj, &cur_placement, true);
 	switch (cur_placement) {
 	case TTM_PL_VRAM:
 		args->domain = RADEON_GEM_DOMAIN_VRAM;
@@ -297,7 +299,7 @@
 {
 	struct drm_radeon_gem_wait_idle *args = data;
 	struct drm_gem_object *gobj;
-	struct radeon_object *robj;
+	struct radeon_bo *robj;
 	int r;
 
 	gobj = drm_gem_object_lookup(dev, filp, args->handle);
@@ -305,7 +307,10 @@
 		return -EINVAL;
 	}
 	robj = gobj->driver_private;
-	r = radeon_object_wait(robj);
+	r = radeon_bo_wait(robj, NULL, false);
+	/* callback hw specific functions if any */
+	if (robj->rdev->asic->ioctl_wait_idle)
+		robj->rdev->asic->ioctl_wait_idle(robj->rdev, robj);
 	mutex_lock(&dev->struct_mutex);
 	drm_gem_object_unreference(gobj);
 	mutex_unlock(&dev->struct_mutex);
@@ -317,7 +322,7 @@
 {
 	struct drm_radeon_gem_set_tiling *args = data;
 	struct drm_gem_object *gobj;
-	struct radeon_object *robj;
+	struct radeon_bo *robj;
 	int r = 0;
 
 	DRM_DEBUG("%d \n", args->handle);
@@ -325,7 +330,7 @@
 	if (gobj == NULL)
 		return -EINVAL;
 	robj = gobj->driver_private;
-	radeon_object_set_tiling_flags(robj, args->tiling_flags, args->pitch);
+	r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
 	mutex_lock(&dev->struct_mutex);
 	drm_gem_object_unreference(gobj);
 	mutex_unlock(&dev->struct_mutex);
@@ -337,16 +342,20 @@
 {
 	struct drm_radeon_gem_get_tiling *args = data;
 	struct drm_gem_object *gobj;
-	struct radeon_object *robj;
+	struct radeon_bo *rbo;
 	int r = 0;
 
 	DRM_DEBUG("\n");
 	gobj = drm_gem_object_lookup(dev, filp, args->handle);
 	if (gobj == NULL)
 		return -EINVAL;
-	robj = gobj->driver_private;
-	radeon_object_get_tiling_flags(robj, &args->tiling_flags,
-				       &args->pitch);
+	rbo = gobj->driver_private;
+	r = radeon_bo_reserve(rbo, false);
+	if (unlikely(r != 0))
+		goto out;
+	radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
+	radeon_bo_unreserve(rbo);
+out:
 	mutex_lock(&dev->struct_mutex);
 	drm_gem_object_unreference(gobj);
 	mutex_unlock(&dev->struct_mutex);
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_fixed.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_fixed.h
@@ -38,6 +38,23 @@
 #define fixed_init_half(A) { .full = rfixed_const_half((A)) }
 #define rfixed_trunc(A) ((A).full >> 12)
 
+static inline u32 rfixed_floor(fixed20_12 A)
+{
+	u32 non_frac = rfixed_trunc(A);
+
+	return rfixed_const(non_frac);
+}
+
+static inline u32 rfixed_ceil(fixed20_12 A)
+{
+	u32 non_frac = rfixed_trunc(A);
+
+	if (A.full > rfixed_const(non_frac))
+		return rfixed_const(non_frac + 1);
+	else
+		return rfixed_const(non_frac);
+}
+
 static inline u32 rfixed_div(fixed20_12 A, fixed20_12 B)
 {
 	u64 tmp = ((u64)A.full << 13);
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/r500_reg.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/r500_reg.h
@@ -716,6 +716,8 @@
 
 #define AVIVO_DVOA_BIT_DEPTH_CONTROL			0x7988
 
+#define AVIVO_DC_GPIO_HPD_A                 0x7e94
+
 #define AVIVO_GPIO_0                        0x7e30
 #define AVIVO_GPIO_1                        0x7e40
 #define AVIVO_GPIO_2                        0x7e50
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_ring.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_ring.c
@@ -41,68 +41,55 @@
 {
 	struct radeon_fence *fence;
 	struct radeon_ib *nib;
-	unsigned long i;
-	int r = 0;
+	int r = 0, i, c;
 
 	*ib = NULL;
 	r = radeon_fence_create(rdev, &fence);
 	if (r) {
-		DRM_ERROR("failed to create fence for new IB\n");
+		dev_err(rdev->dev, "failed to create fence for new IB\n");
 		return r;
 	}
 	mutex_lock(&rdev->ib_pool.mutex);
-	i = find_first_zero_bit(rdev->ib_pool.alloc_bm, RADEON_IB_POOL_SIZE);
-	if (i < RADEON_IB_POOL_SIZE) {
-		set_bit(i, rdev->ib_pool.alloc_bm);
-		rdev->ib_pool.ibs[i].length_dw = 0;
-		*ib = &rdev->ib_pool.ibs[i];
-		mutex_unlock(&rdev->ib_pool.mutex);
-		goto out;
+	for (i = rdev->ib_pool.head_id, c = 0, nib = NULL; c < RADEON_IB_POOL_SIZE; c++, i++) {
+		i &= (RADEON_IB_POOL_SIZE - 1);
+		if (rdev->ib_pool.ibs[i].free) {
+			nib = &rdev->ib_pool.ibs[i];
+			break;
+		}
 	}
-	if (list_empty(&rdev->ib_pool.scheduled_ibs)) {
-		/* we go do nothings here */
+	if (nib == NULL) {
+		/* This should never happen, it means we allocated all
+		 * IB and haven't scheduled one yet, return EBUSY to
+		 * userspace hoping that on ioctl recall we get better
+		 * luck
+		 */
+		dev_err(rdev->dev, "no free indirect buffer !\n");
 		mutex_unlock(&rdev->ib_pool.mutex);
-		DRM_ERROR("all IB allocated none scheduled.\n");
-		r = -EINVAL;
-		goto out;
-	}
-	/* get the first ib on the scheduled list */
-	nib = list_entry(rdev->ib_pool.scheduled_ibs.next,
-			 struct radeon_ib, list);
-	if (nib->fence == NULL) {
-		/* we go do nothings here */
-		mutex_unlock(&rdev->ib_pool.mutex);
-		DRM_ERROR("IB %lu scheduled without a fence.\n", nib->idx);
-		r = -EINVAL;
-		goto out;
+		radeon_fence_unref(&fence);
+		return -EBUSY;
 	}
-	mutex_unlock(&rdev->ib_pool.mutex);
-
-	r = radeon_fence_wait(nib->fence, false);
-	if (r) {
-		DRM_ERROR("radeon: IB(%lu:0x%016lX:%u)\n", nib->idx,
-			  (unsigned long)nib->gpu_addr, nib->length_dw);
-		DRM_ERROR("radeon: GPU lockup detected, fail to get a IB\n");
-		goto out;
+	rdev->ib_pool.head_id = (nib->idx + 1) & (RADEON_IB_POOL_SIZE - 1);
+	nib->free = false;
+	if (nib->fence) {
+		mutex_unlock(&rdev->ib_pool.mutex);
+		r = radeon_fence_wait(nib->fence, false);
+		if (r) {
+			dev_err(rdev->dev, "error waiting fence of IB(%u:0x%016lX:%u)\n",
+				nib->idx, (unsigned long)nib->gpu_addr, nib->length_dw);
+			mutex_lock(&rdev->ib_pool.mutex);
+			nib->free = true;
+			mutex_unlock(&rdev->ib_pool.mutex);
+			radeon_fence_unref(&fence);
+			return r;
+		}
+		mutex_lock(&rdev->ib_pool.mutex);
 	}
 	radeon_fence_unref(&nib->fence);
-
+	nib->fence = fence;
 	nib->length_dw = 0;
-
-	/* scheduled list is accessed here */
-	mutex_lock(&rdev->ib_pool.mutex);
-	list_del(&nib->list);
-	INIT_LIST_HEAD(&nib->list);
 	mutex_unlock(&rdev->ib_pool.mutex);
-
 	*ib = nib;
-out:
-	if (r) {
-		radeon_fence_unref(&fence);
-	} else {
-		(*ib)->fence = fence;
-	}
-	return r;
+	return 0;
 }
 
 void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib **ib)
@@ -113,19 +100,10 @@
 	if (tmp == NULL) {
 		return;
 	}
-	mutex_lock(&rdev->ib_pool.mutex);
-	if (!list_empty(&tmp->list) && !radeon_fence_signaled(tmp->fence)) {
-		/* IB is scheduled & not signaled don't do anythings */
-		mutex_unlock(&rdev->ib_pool.mutex);
-		return;
-	}
-	list_del(&tmp->list);
-	INIT_LIST_HEAD(&tmp->list);
-	if (tmp->fence)
+	if (!tmp->fence->emited)
 		radeon_fence_unref(&tmp->fence);
-
-	tmp->length_dw = 0;
-	clear_bit(tmp->idx, rdev->ib_pool.alloc_bm);
+	mutex_lock(&rdev->ib_pool.mutex);
+	tmp->free = true;
 	mutex_unlock(&rdev->ib_pool.mutex);
 }
 
@@ -135,7 +113,7 @@
 
 	if (!ib->length_dw || !rdev->cp.ready) {
 		/* TODO: Nothings in the ib we should report. */
-		DRM_ERROR("radeon: couldn't schedule IB(%lu).\n", ib->idx);
+		DRM_ERROR("radeon: couldn't schedule IB(%u).\n", ib->idx);
 		return -EINVAL;
 	}
 
@@ -148,7 +126,8 @@
 	radeon_ring_ib_execute(rdev, ib);
 	radeon_fence_emit(rdev, ib->fence);
 	mutex_lock(&rdev->ib_pool.mutex);
-	list_add_tail(&ib->list, &rdev->ib_pool.scheduled_ibs);
+	/* once scheduled IB is considered free and protected by the fence */
+	ib->free = true;
 	mutex_unlock(&rdev->ib_pool.mutex);
 	radeon_ring_unlock_commit(rdev);
 	return 0;
@@ -164,20 +143,24 @@
 	if (rdev->ib_pool.robj)
 		return 0;
 	/* Allocate 1M object buffer */
-	INIT_LIST_HEAD(&rdev->ib_pool.scheduled_ibs);
-	r = radeon_object_create(rdev, NULL,  RADEON_IB_POOL_SIZE*64*1024,
-				 true, RADEON_GEM_DOMAIN_GTT,
-				 false, &rdev->ib_pool.robj);
+	r = radeon_bo_create(rdev, NULL,  RADEON_IB_POOL_SIZE*64*1024,
+				true, RADEON_GEM_DOMAIN_GTT,
+				&rdev->ib_pool.robj);
 	if (r) {
 		DRM_ERROR("radeon: failed to ib pool (%d).\n", r);
 		return r;
 	}
-	r = radeon_object_pin(rdev->ib_pool.robj, RADEON_GEM_DOMAIN_GTT, &gpu_addr);
+	r = radeon_bo_reserve(rdev->ib_pool.robj, false);
+	if (unlikely(r != 0))
+		return r;
+	r = radeon_bo_pin(rdev->ib_pool.robj, RADEON_GEM_DOMAIN_GTT, &gpu_addr);
 	if (r) {
+		radeon_bo_unreserve(rdev->ib_pool.robj);
 		DRM_ERROR("radeon: failed to pin ib pool (%d).\n", r);
 		return r;
 	}
-	r = radeon_object_kmap(rdev->ib_pool.robj, &ptr);
+	r = radeon_bo_kmap(rdev->ib_pool.robj, &ptr);
+	radeon_bo_unreserve(rdev->ib_pool.robj);
 	if (r) {
 		DRM_ERROR("radeon: failed to map ib poll (%d).\n", r);
 		return r;
@@ -190,9 +173,9 @@
 		rdev->ib_pool.ibs[i].ptr = ptr + offset;
 		rdev->ib_pool.ibs[i].idx = i;
 		rdev->ib_pool.ibs[i].length_dw = 0;
-		INIT_LIST_HEAD(&rdev->ib_pool.ibs[i].list);
+		rdev->ib_pool.ibs[i].free = true;
 	}
-	bitmap_zero(rdev->ib_pool.alloc_bm, RADEON_IB_POOL_SIZE);
+	rdev->ib_pool.head_id = 0;
 	rdev->ib_pool.ready = true;
 	DRM_INFO("radeon: ib pool ready.\n");
 	if (radeon_debugfs_ib_init(rdev)) {
@@ -203,14 +186,20 @@
 
 void radeon_ib_pool_fini(struct radeon_device *rdev)
 {
+	int r;
+
 	if (!rdev->ib_pool.ready) {
 		return;
 	}
 	mutex_lock(&rdev->ib_pool.mutex);
-	bitmap_zero(rdev->ib_pool.alloc_bm, RADEON_IB_POOL_SIZE);
 	if (rdev->ib_pool.robj) {
-		radeon_object_kunmap(rdev->ib_pool.robj);
-		radeon_object_unref(&rdev->ib_pool.robj);
+		r = radeon_bo_reserve(rdev->ib_pool.robj, false);
+		if (likely(r == 0)) {
+			radeon_bo_kunmap(rdev->ib_pool.robj);
+			radeon_bo_unpin(rdev->ib_pool.robj);
+			radeon_bo_unreserve(rdev->ib_pool.robj);
+		}
+		radeon_bo_unref(&rdev->ib_pool.robj);
 		rdev->ib_pool.robj = NULL;
 	}
 	mutex_unlock(&rdev->ib_pool.mutex);
@@ -288,29 +277,28 @@
 	rdev->cp.ring_size = ring_size;
 	/* Allocate ring buffer */
 	if (rdev->cp.ring_obj == NULL) {
-		r = radeon_object_create(rdev, NULL, rdev->cp.ring_size,
-					 true,
-					 RADEON_GEM_DOMAIN_GTT,
-					 false,
-					 &rdev->cp.ring_obj);
+		r = radeon_bo_create(rdev, NULL, rdev->cp.ring_size, true,
+					RADEON_GEM_DOMAIN_GTT,
+					&rdev->cp.ring_obj);
 		if (r) {
-			DRM_ERROR("radeon: failed to create ring buffer (%d).\n", r);
-			mutex_unlock(&rdev->cp.mutex);
+			dev_err(rdev->dev, "(%d) ring create failed\n", r);
 			return r;
 		}
-		r = radeon_object_pin(rdev->cp.ring_obj,
-				      RADEON_GEM_DOMAIN_GTT,
-				      &rdev->cp.gpu_addr);
+		r = radeon_bo_reserve(rdev->cp.ring_obj, false);
+		if (unlikely(r != 0))
+			return r;
+		r = radeon_bo_pin(rdev->cp.ring_obj, RADEON_GEM_DOMAIN_GTT,
+					&rdev->cp.gpu_addr);
 		if (r) {
-			DRM_ERROR("radeon: failed to pin ring buffer (%d).\n", r);
-			mutex_unlock(&rdev->cp.mutex);
+			radeon_bo_unreserve(rdev->cp.ring_obj);
+			dev_err(rdev->dev, "(%d) ring pin failed\n", r);
 			return r;
 		}
-		r = radeon_object_kmap(rdev->cp.ring_obj,
+		r = radeon_bo_kmap(rdev->cp.ring_obj,
 				       (void **)&rdev->cp.ring);
+		radeon_bo_unreserve(rdev->cp.ring_obj);
 		if (r) {
-			DRM_ERROR("radeon: failed to map ring buffer (%d).\n", r);
-			mutex_unlock(&rdev->cp.mutex);
+			dev_err(rdev->dev, "(%d) ring map failed\n", r);
 			return r;
 		}
 	}
@@ -321,11 +309,17 @@
 
 void radeon_ring_fini(struct radeon_device *rdev)
 {
+	int r;
+
 	mutex_lock(&rdev->cp.mutex);
 	if (rdev->cp.ring_obj) {
-		radeon_object_kunmap(rdev->cp.ring_obj);
-		radeon_object_unpin(rdev->cp.ring_obj);
-		radeon_object_unref(&rdev->cp.ring_obj);
+		r = radeon_bo_reserve(rdev->cp.ring_obj, false);
+		if (likely(r == 0)) {
+			radeon_bo_kunmap(rdev->cp.ring_obj);
+			radeon_bo_unpin(rdev->cp.ring_obj);
+			radeon_bo_unreserve(rdev->cp.ring_obj);
+		}
+		radeon_bo_unref(&rdev->cp.ring_obj);
 		rdev->cp.ring = NULL;
 		rdev->cp.ring_obj = NULL;
 	}
@@ -346,7 +340,7 @@
 	if (ib == NULL) {
 		return 0;
 	}
-	seq_printf(m, "IB %04lu\n", ib->idx);
+	seq_printf(m, "IB %04u\n", ib->idx);
 	seq_printf(m, "IB fence %p\n", ib->fence);
 	seq_printf(m, "IB size %05u dwords\n", ib->length_dw);
 	for (i = 0; i < ib->length_dw; i++) {
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/r300_cmdbuf.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/r300_cmdbuf.c
@@ -990,7 +990,7 @@
 	int sz;
 	int addr;
 	int type;
-	int clamp;
+	int isclamp;
 	int stride;
 	RING_LOCALS;
 
@@ -999,10 +999,10 @@
 	addr = ((header.r500fp.adrhi_flags & 1) << 8) | header.r500fp.adrlo;
 
 	type = !!(header.r500fp.adrhi_flags & R500FP_CONSTANT_TYPE);
-	clamp = !!(header.r500fp.adrhi_flags & R500FP_CONSTANT_CLAMP);
+	isclamp = !!(header.r500fp.adrhi_flags & R500FP_CONSTANT_CLAMP);
 
 	addr |= (type << 16);
-	addr |= (clamp << 17);
+	addr |= (isclamp << 17);
 
 	stride = type ? 4 : 6;
 
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/r300_reg.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/r300_reg.h
@@ -900,6 +900,7 @@
 #	define R300_TX_FORMAT_FL_I32		    0x1B
 #	define R300_TX_FORMAT_FL_I32A32		    0x1C
 #	define R300_TX_FORMAT_FL_R32G32B32A32	    0x1D
+#	define R300_TX_FORMAT_ATI2N		    0x1F
 	/* alpha modes, convenience mostly */
 	/* if you have alpha, pick constant appropriate to the
 	   number of channels (1 for I8, 2 for I8A8, 4 for R8G8B8A8, etc */
@@ -1368,6 +1369,8 @@
 #define R300_RB3D_COLORPITCH2               0x4E40 /* GUESS */
 #define R300_RB3D_COLORPITCH3               0x4E44 /* GUESS */
 
+#define R300_RB3D_AARESOLVE_OFFSET          0x4E80
+#define R300_RB3D_AARESOLVE_PITCH           0x4E84
 #define R300_RB3D_AARESOLVE_CTL             0x4E88
 /* gap */
 
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/r600_blit_kms.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/r600_blit_kms.c
@@ -449,6 +449,7 @@
 	u32 packet2s[16];
 	int num_packet2s = 0;
 
+	mutex_init(&rdev->r600_blit.mutex);
 	rdev->r600_blit.state_offset = 0;
 
 	if (rdev->family >= CHIP_RV770)
@@ -473,9 +474,8 @@
 	obj_size += r6xx_ps_size * 4;
 	obj_size = ALIGN(obj_size, 256);
 
-	r = radeon_object_create(rdev, NULL, obj_size,
-				 true, RADEON_GEM_DOMAIN_VRAM,
-				 false, &rdev->r600_blit.shader_obj);
+	r = radeon_bo_create(rdev, NULL, obj_size, true, RADEON_GEM_DOMAIN_VRAM,
+				&rdev->r600_blit.shader_obj);
 	if (r) {
 		DRM_ERROR("r600 failed to allocate shader\n");
 		return r;
@@ -485,12 +485,14 @@
 		  obj_size,
 		  rdev->r600_blit.vs_offset, rdev->r600_blit.ps_offset);
 
-	r = radeon_object_kmap(rdev->r600_blit.shader_obj, &ptr);
+	r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false);
+	if (unlikely(r != 0))
+		return r;
+	r = radeon_bo_kmap(rdev->r600_blit.shader_obj, &ptr);
 	if (r) {
 		DRM_ERROR("failed to map blit object %d\n", r);
 		return r;
 	}
-
 	if (rdev->family >= CHIP_RV770)
 		memcpy_toio(ptr + rdev->r600_blit.state_offset,
 			    r7xx_default_state, rdev->r600_blit.state_len * 4);
@@ -500,19 +502,28 @@
 	if (num_packet2s)
 		memcpy_toio(ptr + rdev->r600_blit.state_offset + (rdev->r600_blit.state_len * 4),
 			    packet2s, num_packet2s * 4);
-
-
 	memcpy(ptr + rdev->r600_blit.vs_offset, r6xx_vs, r6xx_vs_size * 4);
 	memcpy(ptr + rdev->r600_blit.ps_offset, r6xx_ps, r6xx_ps_size * 4);
-
-	radeon_object_kunmap(rdev->r600_blit.shader_obj);
+	radeon_bo_kunmap(rdev->r600_blit.shader_obj);
+	radeon_bo_unreserve(rdev->r600_blit.shader_obj);
 	return 0;
 }
 
 void r600_blit_fini(struct radeon_device *rdev)
 {
-	radeon_object_unpin(rdev->r600_blit.shader_obj);
-	radeon_object_unref(&rdev->r600_blit.shader_obj);
+	int r;
+
+	if (rdev->r600_blit.shader_obj == NULL)
+		return;
+	/* If we can't reserve the bo, unref should be enough to destroy
+	 * it when it becomes idle.
+	 */
+	r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false);
+	if (!r) {
+		radeon_bo_unpin(rdev->r600_blit.shader_obj);
+		radeon_bo_unreserve(rdev->r600_blit.shader_obj);
+	}
+	radeon_bo_unref(&rdev->r600_blit.shader_obj);
 }
 
 int r600_vb_ib_get(struct radeon_device *rdev)
@@ -532,9 +543,6 @@
 void r600_vb_ib_put(struct radeon_device *rdev)
 {
 	radeon_fence_emit(rdev, rdev->r600_blit.vb_ib->fence);
-	mutex_lock(&rdev->ib_pool.mutex);
-	list_add_tail(&rdev->r600_blit.vb_ib->list, &rdev->ib_pool.scheduled_ibs);
-	mutex_unlock(&rdev->ib_pool.mutex);
 	radeon_ib_free(rdev, &rdev->r600_blit.vb_ib);
 }
 
@@ -547,7 +555,8 @@
 	int dwords_per_loop = 76, num_loops;
 
 	r = r600_vb_ib_get(rdev);
-	WARN_ON(r);
+	if (r)
+		return r;
 
 	/* set_render_target emits 2 extra dwords on rv6xx */
 	if (rdev->family > CHIP_R600 && rdev->family < CHIP_RV770)
@@ -569,11 +578,12 @@
 	ring_size = num_loops * dwords_per_loop;
 	/* set default  + shaders */
 	ring_size += 40; /* shaders + def state */
-	ring_size += 3; /* fence emit for VB IB */
+	ring_size += 7; /* fence emit for VB IB */
 	ring_size += 5; /* done copy */
-	ring_size += 3; /* fence emit for done copy */
+	ring_size += 7; /* fence emit for done copy */
 	r = radeon_ring_lock(rdev, ring_size);
-	WARN_ON(r);
+	if (r)
+		return r;
 
 	set_default_state(rdev); /* 14 */
 	set_shaders(rdev); /* 26 */
@@ -619,8 +629,8 @@
 			int src_x = src_gpu_addr & 255;
 			int dst_x = dst_gpu_addr & 255;
 			int h = 1;
-			src_gpu_addr = src_gpu_addr & ~255;
-			dst_gpu_addr = dst_gpu_addr & ~255;
+			src_gpu_addr = src_gpu_addr & ~255ULL;
+			dst_gpu_addr = dst_gpu_addr & ~255ULL;
 
 			if (!src_x && !dst_x) {
 				h = (cur_size / max_bytes);
@@ -713,8 +723,8 @@
 			int src_x = (src_gpu_addr & 255);
 			int dst_x = (dst_gpu_addr & 255);
 			int h = 1;
-			src_gpu_addr = src_gpu_addr & ~255;
-			dst_gpu_addr = dst_gpu_addr & ~255;
+			src_gpu_addr = src_gpu_addr & ~255ULL;
+			dst_gpu_addr = dst_gpu_addr & ~255ULL;
 
 			if (!src_x && !dst_x) {
 				h = (cur_size / max_bytes);
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_i2c.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_i2c.c
@@ -59,35 +59,50 @@
 }
 
 
-void radeon_i2c_do_lock(struct radeon_connector *radeon_connector, int lock_state)
+void radeon_i2c_do_lock(struct radeon_i2c_chan *i2c, int lock_state)
 {
-	struct radeon_device *rdev = radeon_connector->base.dev->dev_private;
+	struct radeon_device *rdev = i2c->dev->dev_private;
+	struct radeon_i2c_bus_rec *rec = &i2c->rec;
 	uint32_t temp;
-	struct radeon_i2c_bus_rec *rec = &radeon_connector->ddc_bus->rec;
 
 	/* RV410 appears to have a bug where the hw i2c in reset
 	 * holds the i2c port in a bad state - switch hw i2c away before
 	 * doing DDC - do this for all r200s/r300s/r400s for safety sake
 	 */
-	if ((rdev->family >= CHIP_R200) && !ASIC_IS_AVIVO(rdev)) {
-		if (rec->a_clk_reg == RADEON_GPIO_MONID) {
-			WREG32(RADEON_DVI_I2C_CNTL_0, (RADEON_I2C_SOFT_RST |
-						R200_DVI_I2C_PIN_SEL(R200_SEL_DDC1)));
-		} else {
-			WREG32(RADEON_DVI_I2C_CNTL_0, (RADEON_I2C_SOFT_RST |
-						R200_DVI_I2C_PIN_SEL(R200_SEL_DDC3)));
+	if (rec->hw_capable) {
+		if ((rdev->family >= CHIP_R200) && !ASIC_IS_AVIVO(rdev)) {
+			if (rec->a_clk_reg == RADEON_GPIO_MONID) {
+				WREG32(RADEON_DVI_I2C_CNTL_0, (RADEON_I2C_SOFT_RST |
+							       R200_DVI_I2C_PIN_SEL(R200_SEL_DDC1)));
+			} else {
+				WREG32(RADEON_DVI_I2C_CNTL_0, (RADEON_I2C_SOFT_RST |
+							       R200_DVI_I2C_PIN_SEL(R200_SEL_DDC3)));
+			}
 		}
 	}
-	if (lock_state) {
-		temp = RREG32(rec->a_clk_reg);
-		temp &= ~(rec->a_clk_mask);
-		WREG32(rec->a_clk_reg, temp);
-
-		temp = RREG32(rec->a_data_reg);
-		temp &= ~(rec->a_data_mask);
-		WREG32(rec->a_data_reg, temp);
+
+	/* switch the pads to ddc mode */
+	if (ASIC_IS_DCE3(rdev) && rec->hw_capable) {
+		temp = RREG32(rec->mask_clk_reg);
+		temp &= ~(1 << 16);
+		WREG32(rec->mask_clk_reg, temp);
 	}
 
+	/* clear the output pin values */
+	temp = RREG32(rec->a_clk_reg) & ~rec->a_clk_mask;
+	WREG32(rec->a_clk_reg, temp);
+
+	temp = RREG32(rec->a_data_reg) & ~rec->a_data_mask;
+	WREG32(rec->a_data_reg, temp);
+
+	/* set the pins to input */
+	temp = RREG32(rec->en_clk_reg) & ~rec->en_clk_mask;
+	WREG32(rec->en_clk_reg, temp);
+
+	temp = RREG32(rec->en_data_reg) & ~rec->en_data_mask;
+	WREG32(rec->en_data_reg, temp);
+
+	/* mask the gpio pins for software use */
 	temp = RREG32(rec->mask_clk_reg);
 	if (lock_state)
 		temp |= rec->mask_clk_mask;
@@ -112,8 +127,9 @@
 	struct radeon_i2c_bus_rec *rec = &i2c->rec;
 	uint32_t val;
 
-	val = RREG32(rec->get_clk_reg);
-	val &= rec->get_clk_mask;
+	/* read the value off the pin */
+	val = RREG32(rec->y_clk_reg);
+	val &= rec->y_clk_mask;
 
 	return (val != 0);
 }
@@ -126,8 +142,10 @@
 	struct radeon_i2c_bus_rec *rec = &i2c->rec;
 	uint32_t val;
 
-	val = RREG32(rec->get_data_reg);
-	val &= rec->get_data_mask;
+	/* read the value off the pin */
+	val = RREG32(rec->y_data_reg);
+	val &= rec->y_data_mask;
+
 	return (val != 0);
 }
 
@@ -138,9 +156,10 @@
 	struct radeon_i2c_bus_rec *rec = &i2c->rec;
 	uint32_t val;
 
-	val = RREG32(rec->put_clk_reg) & (uint32_t)~(rec->put_clk_mask);
-	val |= clock ? 0 : rec->put_clk_mask;
-	WREG32(rec->put_clk_reg, val);
+	/* set pin direction */
+	val = RREG32(rec->en_clk_reg) & ~rec->en_clk_mask;
+	val |= clock ? 0 : rec->en_clk_mask;
+	WREG32(rec->en_clk_reg, val);
 }
 
 static void set_data(void *i2c_priv, int data)
@@ -150,14 +169,15 @@
 	struct radeon_i2c_bus_rec *rec = &i2c->rec;
 	uint32_t val;
 
-	val = RREG32(rec->put_data_reg) & (uint32_t)~(rec->put_data_mask);
-	val |= data ? 0 : rec->put_data_mask;
-	WREG32(rec->put_data_reg, val);
+	/* set pin direction */
+	val = RREG32(rec->en_data_reg) & ~rec->en_data_mask;
+	val |= data ? 0 : rec->en_data_mask;
+	WREG32(rec->en_data_reg, val);
 }
 
 struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
-		struct radeon_i2c_bus_rec *rec,
-		const char *name)
+					  struct radeon_i2c_bus_rec *rec,
+					  const char *name)
 {
 	struct radeon_i2c_chan *i2c;
 	int ret;
@@ -167,20 +187,19 @@
 		return NULL;
 
 	i2c->adapter.owner = THIS_MODULE;
-	i2c->adapter.algo_data = &i2c->algo;
 	i2c->dev = dev;
-	i2c->algo.setsda = set_data;
-	i2c->algo.setscl = set_clock;
-	i2c->algo.getsda = get_data;
-	i2c->algo.getscl = get_clock;
-	i2c->algo.udelay = 20;
+	i2c_set_adapdata(&i2c->adapter, i2c);
+	i2c->adapter.algo_data = &i2c->algo.bit;
+	i2c->algo.bit.setsda = set_data;
+	i2c->algo.bit.setscl = set_clock;
+	i2c->algo.bit.getsda = get_data;
+	i2c->algo.bit.getscl = get_clock;
+	i2c->algo.bit.udelay = 20;
 	/* vesa says 2.2 ms is enough, 1 jiffy doesn't seem to always
 	 * make this, 2 jiffies is a lot more reliable */
-	i2c->algo.timeout = 2;
-	i2c->algo.data = i2c;
+	i2c->algo.bit.timeout = 2;
+	i2c->algo.bit.data = i2c;
 	i2c->rec = *rec;
-	i2c_set_adapdata(&i2c->adapter, i2c);
-
 	ret = i2c_bit_add_bus(&i2c->adapter);
 	if (ret) {
 		DRM_INFO("Failed to register i2c %s\n", name);
@@ -194,6 +213,38 @@
 
 }
 
+struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev,
+					     struct radeon_i2c_bus_rec *rec,
+					     const char *name)
+{
+	struct radeon_i2c_chan *i2c;
+	int ret;
+
+	i2c = kzalloc(sizeof(struct radeon_i2c_chan), GFP_KERNEL);
+	if (i2c == NULL)
+		return NULL;
+
+	i2c->rec = *rec;
+	i2c->adapter.owner = THIS_MODULE;
+	i2c->dev = dev;
+	i2c_set_adapdata(&i2c->adapter, i2c);
+	i2c->adapter.algo_data = &i2c->algo.dp;
+	i2c->algo.dp.aux_ch = radeon_dp_i2c_aux_ch;
+	i2c->algo.dp.address = 0;
+	ret = i2c_dp_aux_add_bus(&i2c->adapter);
+	if (ret) {
+		DRM_INFO("Failed to register i2c %s\n", name);
+		goto out_free;
+	}
+
+	return i2c;
+out_free:
+	kfree(i2c);
+	return NULL;
+
+}
+
+
 void radeon_i2c_destroy(struct radeon_i2c_chan *i2c)
 {
 	if (!i2c)
@@ -207,3 +258,59 @@
 {
 	return NULL;
 }
+
+void radeon_i2c_sw_get_byte(struct radeon_i2c_chan *i2c_bus,
+			    u8 slave_addr,
+			    u8 addr,
+			    u8 *val)
+{
+	u8 out_buf[2];
+	u8 in_buf[2];
+	struct i2c_msg msgs[] = {
+		{
+			.addr = slave_addr,
+			.flags = 0,
+			.len = 1,
+			.buf = out_buf,
+		},
+		{
+			.addr = slave_addr,
+			.flags = I2C_M_RD,
+			.len = 1,
+			.buf = in_buf,
+		}
+	};
+
+	out_buf[0] = addr;
+	out_buf[1] = 0;
+
+	if (i2c_transfer(&i2c_bus->adapter, msgs, 2) == 2) {
+		*val = in_buf[0];
+		DRM_DEBUG("val = 0x%02x\n", *val);
+	} else {
+		DRM_ERROR("i2c 0x%02x 0x%02x read failed\n",
+			  addr, *val);
+	}
+}
+
+void radeon_i2c_sw_put_byte(struct radeon_i2c_chan *i2c_bus,
+			    u8 slave_addr,
+			    u8 addr,
+			    u8 val)
+{
+	uint8_t out_buf[2];
+	struct i2c_msg msg = {
+		.addr = slave_addr,
+		.flags = 0,
+		.len = 2,
+		.buf = out_buf,
+	};
+
+	out_buf[0] = addr;
+	out_buf[1] = val;
+
+	if (i2c_transfer(&i2c_bus->adapter, &msg, 1) != 1)
+		DRM_ERROR("i2c 0x%02x 0x%02x write failed\n",
+			  addr, val);
+}
+
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_ioc32.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_ioc32.c
@@ -92,8 +92,7 @@
 			  &init->gart_textures_offset))
 		return -EFAULT;
 
-	return drm_ioctl(file->f_path.dentry->d_inode, file,
-			 DRM_IOCTL_RADEON_CP_INIT, (unsigned long)init);
+	return drm_ioctl(file, DRM_IOCTL_RADEON_CP_INIT, (unsigned long)init);
 }
 
 typedef struct drm_radeon_clear32 {
@@ -125,8 +124,7 @@
 			  &clr->depth_boxes))
 		return -EFAULT;
 
-	return drm_ioctl(file->f_path.dentry->d_inode, file,
-			 DRM_IOCTL_RADEON_CLEAR, (unsigned long)clr);
+	return drm_ioctl(file, DRM_IOCTL_RADEON_CLEAR, (unsigned long)clr);
 }
 
 typedef struct drm_radeon_stipple32 {
@@ -149,8 +147,7 @@
 			  &request->mask))
 		return -EFAULT;
 
-	return drm_ioctl(file->f_path.dentry->d_inode, file,
-			 DRM_IOCTL_RADEON_STIPPLE, (unsigned long)request);
+	return drm_ioctl(file, DRM_IOCTL_RADEON_STIPPLE, (unsigned long)request);
 }
 
 typedef struct drm_radeon_tex_image32 {
@@ -204,8 +201,7 @@
 			  &image->data))
 		return -EFAULT;
 
-	return drm_ioctl(file->f_path.dentry->d_inode, file,
-			 DRM_IOCTL_RADEON_TEXTURE, (unsigned long)request);
+	return drm_ioctl(file, DRM_IOCTL_RADEON_TEXTURE, (unsigned long)request);
 }
 
 typedef struct drm_radeon_vertex2_32 {
@@ -238,8 +234,7 @@
 			  &request->prim))
 		return -EFAULT;
 
-	return drm_ioctl(file->f_path.dentry->d_inode, file,
-			 DRM_IOCTL_RADEON_VERTEX2, (unsigned long)request);
+	return drm_ioctl(file, DRM_IOCTL_RADEON_VERTEX2, (unsigned long)request);
 }
 
 typedef struct drm_radeon_cmd_buffer32 {
@@ -268,8 +263,7 @@
 			  &request->boxes))
 		return -EFAULT;
 
-	return drm_ioctl(file->f_path.dentry->d_inode, file,
-			 DRM_IOCTL_RADEON_CMDBUF, (unsigned long)request);
+	return drm_ioctl(file, DRM_IOCTL_RADEON_CMDBUF, (unsigned long)request);
 }
 
 typedef struct drm_radeon_getparam32 {
@@ -293,8 +287,7 @@
 			  &request->value))
 		return -EFAULT;
 
-	return drm_ioctl(file->f_path.dentry->d_inode, file,
-			 DRM_IOCTL_RADEON_GETPARAM, (unsigned long)request);
+	return drm_ioctl(file, DRM_IOCTL_RADEON_GETPARAM, (unsigned long)request);
 }
 
 typedef struct drm_radeon_mem_alloc32 {
@@ -322,8 +315,7 @@
 			  &request->region_offset))
 		return -EFAULT;
 
-	return drm_ioctl(file->f_path.dentry->d_inode, file,
-			 DRM_IOCTL_RADEON_ALLOC, (unsigned long)request);
+	return drm_ioctl(file, DRM_IOCTL_RADEON_ALLOC, (unsigned long)request);
 }
 
 typedef struct drm_radeon_irq_emit32 {
@@ -345,8 +337,7 @@
 			  &request->irq_seq))
 		return -EFAULT;
 
-	return drm_ioctl(file->f_path.dentry->d_inode, file,
-			 DRM_IOCTL_RADEON_IRQ_EMIT, (unsigned long)request);
+	return drm_ioctl(file, DRM_IOCTL_RADEON_IRQ_EMIT, (unsigned long)request);
 }
 
 /* The two 64-bit arches where alignof(u64)==4 in 32-bit code */
@@ -372,8 +363,7 @@
 			  &request->value))
 		return -EFAULT;
 
-	return drm_ioctl(file->f_dentry->d_inode, file,
-			 DRM_IOCTL_RADEON_SETPARAM, (unsigned long) request);
+	return drm_ioctl(file, DRM_IOCTL_RADEON_SETPARAM, (unsigned long) request);
 }
 #else
 #define compat_radeon_cp_setparam NULL
@@ -413,12 +403,10 @@
 	if (nr < DRM_COMMAND_BASE + DRM_ARRAY_SIZE(radeon_compat_ioctls))
 		fn = radeon_compat_ioctls[nr - DRM_COMMAND_BASE];
 
-	lock_kernel();		/* XXX for now */
 	if (fn != NULL)
 		ret = (*fn) (filp, cmd, arg);
 	else
-		ret = drm_ioctl(filp->f_path.dentry->d_inode, filp, cmd, arg);
-	unlock_kernel();
+		ret = drm_ioctl(filp, cmd, arg);
 
 	return ret;
 }
@@ -431,9 +419,7 @@
 	if (nr < DRM_COMMAND_BASE)
 		return drm_compat_ioctl(filp, cmd, arg);
 
-	lock_kernel();		/* XXX for now */
-	ret = drm_ioctl(filp->f_path.dentry->d_inode, filp, cmd, arg);
-	unlock_kernel();
+	ret = drm_ioctl(filp, cmd, arg);
 
 	return ret;
 }
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/r520.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/r520.c
@@ -185,8 +185,8 @@
 			return r;
 	}
 	/* Enable IRQ */
-	rdev->irq.sw_int = true;
 	rs600_irq_set(rdev);
+	rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
 	/* 1M ring buffer */
 	r = r100_cp_init(rdev, 1024 * 1024);
 	if (r) {
@@ -221,6 +221,8 @@
 	atom_asic_init(rdev->mode_info.atom_context);
 	/* Resume clock after posting */
 	rv515_clock_startup(rdev);
+	/* Initialize surface registers */
+	radeon_surface_init(rdev);
 	return r520_startup(rdev);
 }
 
@@ -254,6 +256,9 @@
 			RREG32(R_0007C0_CP_STAT));
 	}
 	/* check if cards are posted or not */
+	if (radeon_boot_test_post_card(rdev) == false)
+		return -EINVAL;
+
 	if (!radeon_card_posted(rdev) && rdev->bios) {
 		DRM_INFO("GPU not posted. posting now...\n");
 		atom_asic_init(rdev->mode_info.atom_context);
@@ -277,7 +282,7 @@
 	if (r)
 		return r;
 	/* Memory manager */
-	r = radeon_object_init(rdev);
+	r = radeon_bo_init(rdev);
 	if (r)
 		return r;
 	r = rv370_pcie_gart_init(rdev);
@@ -289,13 +294,12 @@
 	if (r) {
 		/* Somethings want wront with the accel init stop accel */
 		dev_err(rdev->dev, "Disabling GPU acceleration\n");
-		rv515_suspend(rdev);
 		r100_cp_fini(rdev);
 		r100_wb_fini(rdev);
 		r100_ib_fini(rdev);
+		radeon_irq_kms_fini(rdev);
 		rv370_pcie_gart_fini(rdev);
 		radeon_agp_fini(rdev);
-		radeon_irq_kms_fini(rdev);
 		rdev->accel_working = false;
 	}
 	return 0;
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/Makefile
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/Makefile
@@ -24,6 +24,9 @@
 $(obj)/r300_reg_safe.h: $(src)/reg_srcs/r300 $(obj)/mkregtable
 	$(call if_changed,mkregtable)
 
+$(obj)/r420_reg_safe.h: $(src)/reg_srcs/r420 $(obj)/mkregtable
+	$(call if_changed,mkregtable)
+
 $(obj)/rs600_reg_safe.h: $(src)/reg_srcs/rs600 $(obj)/mkregtable
 	$(call if_changed,mkregtable)
 
@@ -35,6 +38,8 @@
 
 $(obj)/r300.o: $(obj)/r300_reg_safe.h
 
+$(obj)/r420.o: $(obj)/r420_reg_safe.h
+
 $(obj)/rs600.o: $(obj)/rs600_reg_safe.h
 
 radeon-y := radeon_drv.o radeon_cp.o radeon_state.o radeon_mem.o \
@@ -49,7 +54,7 @@
 	radeon_cs.o radeon_bios.o radeon_benchmark.o r100.o r300.o r420.o \
 	rs400.o rs600.o rs690.o rv515.o r520.o r600.o rv770.o radeon_test.o \
 	r200.o radeon_legacy_tv.o r600_cs.o r600_blit.o r600_blit_shaders.o \
-	r600_blit_kms.o radeon_pm.o
+	r600_blit_kms.o radeon_pm.o atombios_dp.o r600_audio.o r600_hdmi.o
 
 radeon-$(CONFIG_COMPAT) += radeon_ioc32.o
 
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_encoders.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -35,6 +35,51 @@
 bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index,
 				struct drm_display_mode *mode);
 
+static uint32_t radeon_encoder_clones(struct drm_encoder *encoder)
+{
+	struct drm_device *dev = encoder->dev;
+	struct radeon_device *rdev = dev->dev_private;
+	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+	struct drm_encoder *clone_encoder;
+	uint32_t index_mask = 0;
+	int count;
+
+	/* DIG routing gets problematic */
+	if (rdev->family >= CHIP_R600)
+		return index_mask;
+	/* LVDS/TV are too wacky */
+	if (radeon_encoder->devices & ATOM_DEVICE_LCD_SUPPORT)
+		return index_mask;
+	/* DVO requires 2x ppll clocks depending on tmds chip */
+	if (radeon_encoder->devices & ATOM_DEVICE_DFP2_SUPPORT)
+		return index_mask;
+	
+	count = -1;
+	list_for_each_entry(clone_encoder, &dev->mode_config.encoder_list, head) {
+		struct radeon_encoder *radeon_clone = to_radeon_encoder(clone_encoder);
+		count++;
+
+		if (clone_encoder == encoder)
+			continue;
+		if (radeon_clone->devices & (ATOM_DEVICE_LCD_SUPPORT))
+			continue;
+		if (radeon_clone->devices & ATOM_DEVICE_DFP2_SUPPORT)
+			continue;
+		else
+			index_mask |= (1 << count);
+	}
+	return index_mask;
+}
+
+void radeon_setup_encoder_clones(struct drm_device *dev)
+{
+	struct drm_encoder *encoder;
+
+	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
+		encoder->possible_clones = radeon_encoder_clones(encoder);
+	}
+}
+
 uint32_t
 radeon_get_encoder_id(struct drm_device *dev, uint32_t supported_device, uint8_t dac)
 {
@@ -111,6 +156,26 @@
 	return ret;
 }
 
+static inline bool radeon_encoder_is_digital(struct drm_encoder *encoder)
+{
+	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+	switch (radeon_encoder->encoder_id) {
+	case ENCODER_OBJECT_ID_INTERNAL_LVDS:
+	case ENCODER_OBJECT_ID_INTERNAL_TMDS1:
+	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
+	case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
+	case ENCODER_OBJECT_ID_INTERNAL_DVO1:
+	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1:
+	case ENCODER_OBJECT_ID_INTERNAL_DDI:
+	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
+	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
+	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
+	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
+		return true;
+	default:
+		return false;
+	}
+}
 void
 radeon_link_encoder_connector(struct drm_device *dev)
 {
@@ -157,35 +222,12 @@
 
 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
 		radeon_connector = to_radeon_connector(connector);
-		if (radeon_encoder->devices & radeon_connector->devices)
+		if (radeon_encoder->active_device & radeon_connector->devices)
 			return connector;
 	}
 	return NULL;
 }
 
-/* used for both atom and legacy */
-void radeon_rmx_mode_fixup(struct drm_encoder *encoder,
-			   struct drm_display_mode *mode,
-			   struct drm_display_mode *adjusted_mode)
-{
-	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
-	struct drm_device *dev = encoder->dev;
-	struct radeon_device *rdev = dev->dev_private;
-	struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
-
-	if (mode->hdisplay < native_mode->hdisplay ||
-	    mode->vdisplay < native_mode->vdisplay) {
-		int mode_id = adjusted_mode->base.id;
-		*adjusted_mode = *native_mode;
-		if (!ASIC_IS_AVIVO(rdev)) {
-			adjusted_mode->hdisplay = mode->hdisplay;
-			adjusted_mode->vdisplay = mode->vdisplay;
-		}
-		adjusted_mode->base.id = mode_id;
-	}
-}
-
-
 static bool radeon_atom_mode_fixup(struct drm_encoder *encoder,
 				   struct drm_display_mode *mode,
 				   struct drm_display_mode *adjusted_mode)
@@ -198,14 +240,26 @@
 	radeon_encoder_set_active_device(encoder);
 	drm_mode_set_crtcinfo(adjusted_mode, 0);
 
-	if (radeon_encoder->rmx_type != RMX_OFF)
-		radeon_rmx_mode_fixup(encoder, mode, adjusted_mode);
-
 	/* hw bug */
 	if ((mode->flags & DRM_MODE_FLAG_INTERLACE)
 	    && (mode->crtc_vsync_start < (mode->crtc_vdisplay + 2)))
 		adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + 2;
 
+	/* get the native mode for LVDS */
+	if (radeon_encoder->active_device & (ATOM_DEVICE_LCD_SUPPORT)) {
+		struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
+		int mode_id = adjusted_mode->base.id;
+		*adjusted_mode = *native_mode;
+		if (!ASIC_IS_AVIVO(rdev)) {
+			adjusted_mode->hdisplay = mode->hdisplay;
+			adjusted_mode->vdisplay = mode->vdisplay;
+			adjusted_mode->crtc_hdisplay = mode->hdisplay;
+			adjusted_mode->crtc_vdisplay = mode->vdisplay;
+		}
+		adjusted_mode->base.id = mode_id;
+	}
+
+	/* get the native mode for TV */
 	if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT)) {
 		struct radeon_encoder_atom_dac *tv_dac = radeon_encoder->enc_priv;
 		if (tv_dac) {
@@ -218,6 +272,12 @@
 		}
 	}
 
+	if (ASIC_IS_DCE3(rdev) &&
+	    (radeon_encoder->active_device & (ATOM_DEVICE_DFP_SUPPORT))) {
+		struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
+		radeon_dp_set_link_config(connector, mode);
+	}
+
 	return true;
 }
 
@@ -392,7 +452,7 @@
 	LVDS_ENCODER_CONTROL_PS_ALLOCATION_V2 v2;
 };
 
-static void
+void
 atombios_digital_setup(struct drm_encoder *encoder, int action)
 {
 	struct drm_device *dev = encoder->dev;
@@ -400,6 +460,7 @@
 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
 	union lvds_encoder_control args;
 	int index = 0;
+	int hdmi_detected = 0;
 	uint8_t frev, crev;
 	struct radeon_encoder_atom_dig *dig;
 	struct drm_connector *connector;
@@ -420,6 +481,9 @@
 	if (!radeon_connector->con_priv)
 		return;
 
+	if (drm_detect_hdmi_monitor(radeon_connector->edid))
+		hdmi_detected = 1;
+
 	dig_connector = radeon_connector->con_priv;
 
 	memset(&args, 0, sizeof(args));
@@ -449,13 +513,13 @@
 		case 1:
 			args.v1.ucMisc = 0;
 			args.v1.ucAction = action;
-			if (drm_detect_hdmi_monitor(radeon_connector->edid))
+			if (hdmi_detected)
 				args.v1.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE;
 			args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);
 			if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
-				if (dig->lvds_misc & (1 << 0))
+				if (dig->lvds_misc & ATOM_PANEL_MISC_DUAL)
 					args.v1.ucMisc |= PANEL_ENCODER_MISC_DUAL;
-				if (dig->lvds_misc & (1 << 1))
+				if (dig->lvds_misc & ATOM_PANEL_MISC_888RGB)
 					args.v1.ucMisc |= (1 << 1);
 			} else {
 				if (dig_connector->linkb)
@@ -474,7 +538,7 @@
 				if (dig->coherent_mode)
 					args.v2.ucMisc |= PANEL_ENCODER_MISC_COHERENT;
 			}
-			if (drm_detect_hdmi_monitor(radeon_connector->edid))
+			if (hdmi_detected)
 				args.v2.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE;
 			args.v2.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);
 			args.v2.ucTruncate = 0;
@@ -482,18 +546,18 @@
 			args.v2.ucTemporal = 0;
 			args.v2.ucFRC = 0;
 			if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
-				if (dig->lvds_misc & (1 << 0))
+				if (dig->lvds_misc & ATOM_PANEL_MISC_DUAL)
 					args.v2.ucMisc |= PANEL_ENCODER_MISC_DUAL;
-				if (dig->lvds_misc & (1 << 5)) {
+				if (dig->lvds_misc & ATOM_PANEL_MISC_SPATIAL) {
 					args.v2.ucSpatial = PANEL_ENCODER_SPATIAL_DITHER_EN;
-					if (dig->lvds_misc & (1 << 1))
+					if (dig->lvds_misc & ATOM_PANEL_MISC_888RGB)
 						args.v2.ucSpatial |= PANEL_ENCODER_SPATIAL_DITHER_DEPTH;
 				}
-				if (dig->lvds_misc & (1 << 6)) {
+				if (dig->lvds_misc & ATOM_PANEL_MISC_TEMPORAL) {
 					args.v2.ucTemporal = PANEL_ENCODER_TEMPORAL_DITHER_EN;
-					if (dig->lvds_misc & (1 << 1))
+					if (dig->lvds_misc & ATOM_PANEL_MISC_888RGB)
 						args.v2.ucTemporal |= PANEL_ENCODER_TEMPORAL_DITHER_DEPTH;
-					if (((dig->lvds_misc >> 2) & 0x3) == 2)
+					if (((dig->lvds_misc >> ATOM_PANEL_MISC_GREY_LEVEL_SHIFT) & 0x3) == 2)
 						args.v2.ucTemporal |= PANEL_ENCODER_TEMPORAL_LEVEL_4;
 				}
 			} else {
@@ -514,7 +578,7 @@
 	}
 
 	atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
-
+	r600_hdmi_enable(encoder, hdmi_detected);
 }
 
 int
@@ -522,11 +586,24 @@
 {
 	struct drm_connector *connector;
 	struct radeon_connector *radeon_connector;
+	struct radeon_connector_atom_dig *radeon_dig_connector;
+	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
 
 	connector = radeon_get_connector_for_encoder(encoder);
-	if (!connector)
-		return 0;
-
+	if (!connector) {
+		switch (radeon_encoder->encoder_id) {
+		case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
+		case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
+		case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
+		case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
+		case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1:
+			return ATOM_ENCODER_MODE_DVI;
+		case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1:
+		case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2:
+		default:
+			return ATOM_ENCODER_MODE_CRT;
+		}
+	}
 	radeon_connector = to_radeon_connector(connector);
 
 	switch (connector->connector_type) {
@@ -551,21 +628,23 @@
 		return ATOM_ENCODER_MODE_LVDS;
 		break;
 	case DRM_MODE_CONNECTOR_DisplayPort:
-		/*if (radeon_output->MonType == MT_DP)
-		  return ATOM_ENCODER_MODE_DP;
-		  else*/
-		if (drm_detect_hdmi_monitor(radeon_connector->edid))
+	case DRM_MODE_CONNECTOR_eDP:
+		radeon_dig_connector = radeon_connector->con_priv;
+		if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
+		    (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
+			return ATOM_ENCODER_MODE_DP;
+		else if (drm_detect_hdmi_monitor(radeon_connector->edid))
 			return ATOM_ENCODER_MODE_HDMI;
 		else
 			return ATOM_ENCODER_MODE_DVI;
 		break;
-	case CONNECTOR_DVI_A:
-	case CONNECTOR_VGA:
+	case DRM_MODE_CONNECTOR_DVIA:
+	case DRM_MODE_CONNECTOR_VGA:
 		return ATOM_ENCODER_MODE_CRT;
 		break;
-	case CONNECTOR_STV:
-	case CONNECTOR_CTV:
-	case CONNECTOR_DIN:
+	case DRM_MODE_CONNECTOR_Composite:
+	case DRM_MODE_CONNECTOR_SVIDEO:
+	case DRM_MODE_CONNECTOR_9PinDIN:
 		/* fix me */
 		return ATOM_ENCODER_MODE_TV;
 		/*return ATOM_ENCODER_MODE_CV;*/
@@ -573,6 +652,30 @@
 	}
 }
 
+/*
+ * DIG Encoder/Transmitter Setup
+ *
+ * DCE 3.0/3.1
+ * - 2 DIG transmitter blocks. UNIPHY (links A and B) and LVTMA.
+ * Supports up to 3 digital outputs
+ * - 2 DIG encoder blocks.
+ * DIG1 can drive UNIPHY link A or link B
+ * DIG2 can drive UNIPHY link B or LVTMA
+ *
+ * DCE 3.2
+ * - 3 DIG transmitter blocks. UNIPHY0/1/2 (links A and B).
+ * Supports up to 5 digital outputs
+ * - 2 DIG encoder blocks.
+ * DIG1/2 can drive UNIPHY0/1/2 link A or link B
+ *
+ * Routing
+ * crtc -> dig encoder -> UNIPHY/LVTMA (1 or 2 links)
+ * Examples:
+ * crtc0 -> dig2 -> LVTMA   links A+B -> TMDS/HDMI
+ * crtc1 -> dig1 -> UNIPHY0 link  B   -> DP
+ * crtc0 -> dig1 -> UNIPHY2 link  A   -> LVDS
+ * crtc1 -> dig2 -> UNIPHY1 link  B+A -> TMDS/HDMI
+ */
 static void
 atombios_dig_encoder_setup(struct drm_encoder *encoder, int action)
 {
@@ -605,24 +708,11 @@
 
 	memset(&args, 0, sizeof(args));
 
-	if (ASIC_IS_DCE32(rdev)) {
-		if (dig->dig_block)
-			index = GetIndexIntoMasterTable(COMMAND, DIG2EncoderControl);
-		else
-			index = GetIndexIntoMasterTable(COMMAND, DIG1EncoderControl);
-		num = dig->dig_block + 1;
-	} else {
-		switch (radeon_encoder->encoder_id) {
-		case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
-			index = GetIndexIntoMasterTable(COMMAND, DIG1EncoderControl);
-			num = 1;
-			break;
-		case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
-			index = GetIndexIntoMasterTable(COMMAND, DIG2EncoderControl);
-			num = 2;
-			break;
-		}
-	}
+	if (dig->dig_encoder)
+		index = GetIndexIntoMasterTable(COMMAND, DIG2EncoderControl);
+	else
+		index = GetIndexIntoMasterTable(COMMAND, DIG1EncoderControl);
+	num = dig->dig_encoder + 1;
 
 	atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev);
 
@@ -652,18 +742,21 @@
 		}
 	}
 
-	if (radeon_encoder->pixel_clock > 165000) {
-		args.ucConfig |= ATOM_ENCODER_CONFIG_LINKA_B;
+	args.ucEncoderMode = atombios_get_encoder_mode(encoder);
+
+	if (args.ucEncoderMode == ATOM_ENCODER_MODE_DP) {
+		if (dig_connector->dp_clock == 270000)
+			args.ucConfig |= ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ;
+		args.ucLaneNum = dig_connector->dp_lane_count;
+	} else if (radeon_encoder->pixel_clock > 165000)
 		args.ucLaneNum = 8;
-	} else {
-		if (dig_connector->linkb)
-			args.ucConfig |= ATOM_ENCODER_CONFIG_LINKB;
-		else
-			args.ucConfig |= ATOM_ENCODER_CONFIG_LINKA;
+	else
 		args.ucLaneNum = 4;
-	}
 
-	args.ucEncoderMode = atombios_get_encoder_mode(encoder);
+	if (dig_connector->linkb)
+		args.ucConfig |= ATOM_ENCODER_CONFIG_LINKB;
+	else
+		args.ucConfig |= ATOM_ENCODER_CONFIG_LINKA;
 
 	atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
 
@@ -674,8 +767,8 @@
 	DIG_TRANSMITTER_CONTROL_PARAMETERS_V2 v2;
 };
 
-static void
-atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action)
+void
+atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t lane_num, uint8_t lane_set)
 {
 	struct drm_device *dev = encoder->dev;
 	struct radeon_device *rdev = dev->dev_private;
@@ -687,6 +780,7 @@
 	struct drm_connector *connector;
 	struct radeon_connector *radeon_connector;
 	struct radeon_connector_atom_dig *dig_connector;
+	bool is_dp = false;
 
 	connector = radeon_get_connector_for_encoder(encoder);
 	if (!connector)
@@ -704,6 +798,9 @@
 
 	dig_connector = radeon_connector->con_priv;
 
+	if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_DP)
+		is_dp = true;
+
 	memset(&args, 0, sizeof(args));
 
 	if (ASIC_IS_DCE32(rdev))
@@ -724,17 +821,23 @@
 	args.v1.ucAction = action;
 	if (action == ATOM_TRANSMITTER_ACTION_INIT) {
 		args.v1.usInitInfo = radeon_connector->connector_object_id;
+	} else if (action == ATOM_TRANSMITTER_ACTION_SETUP_VSEMPH) {
+		args.v1.asMode.ucLaneSel = lane_num;
+		args.v1.asMode.ucLaneSet = lane_set;
 	} else {
-		if (radeon_encoder->pixel_clock > 165000)
+		if (is_dp)
+			args.v1.usPixelClock =
+				cpu_to_le16(dig_connector->dp_clock / 10);
+		else if (radeon_encoder->pixel_clock > 165000)
 			args.v1.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10);
 		else
 			args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);
 	}
 	if (ASIC_IS_DCE32(rdev)) {
-		if (radeon_encoder->pixel_clock > 165000)
-			args.v2.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10);
-		if (dig->dig_block)
+		if (dig->dig_encoder == 1)
 			args.v2.acConfig.ucEncoderSel = 1;
+		if (dig_connector->linkb)
+			args.v2.acConfig.ucLinkSel = 1;
 
 		switch (radeon_encoder->encoder_id) {
 		case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
@@ -751,26 +854,32 @@
 			break;
 		}
 
-		if (radeon_encoder->devices & (ATOM_DEVICE_DFP_SUPPORT)) {
+		if (is_dp)
+			args.v2.acConfig.fCoherentMode = 1;
+		else if (radeon_encoder->devices & (ATOM_DEVICE_DFP_SUPPORT)) {
 			if (dig->coherent_mode)
 				args.v2.acConfig.fCoherentMode = 1;
+			if (radeon_encoder->pixel_clock > 165000)
+				args.v2.acConfig.fDualLinkConnector = 1;
 		}
 	} else {
+
 		args.v1.ucConfig = ATOM_TRANSMITTER_CONFIG_CLKSRC_PPLL;
 
+		if (dig->dig_encoder)
+			args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG2_ENCODER;
+		else
+			args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG1_ENCODER;
+
 		switch (radeon_encoder->encoder_id) {
 		case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
-			args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG1_ENCODER;
 			if (rdev->flags & RADEON_IS_IGP) {
 				if (radeon_encoder->pixel_clock > 165000) {
-					args.v1.ucConfig |= (ATOM_TRANSMITTER_CONFIG_8LANE_LINK |
-							     ATOM_TRANSMITTER_CONFIG_LINKA_B);
 					if (dig_connector->igp_lane_info & 0x3)
 						args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_7;
 					else if (dig_connector->igp_lane_info & 0xc)
 						args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_15;
 				} else {
-					args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKA;
 					if (dig_connector->igp_lane_info & 0x1)
 						args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_3;
 					else if (dig_connector->igp_lane_info & 0x2)
@@ -780,42 +889,27 @@
 					else if (dig_connector->igp_lane_info & 0x8)
 						args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_12_15;
 				}
-			} else {
-				if (radeon_encoder->pixel_clock > 165000)
-					args.v1.ucConfig |= (ATOM_TRANSMITTER_CONFIG_8LANE_LINK |
-							     ATOM_TRANSMITTER_CONFIG_LINKA_B |
-							     ATOM_TRANSMITTER_CONFIG_LANE_0_7);
-				else {
-					if (dig_connector->linkb)
-						args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKB | ATOM_TRANSMITTER_CONFIG_LANE_0_3;
-					else
-						args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKA | ATOM_TRANSMITTER_CONFIG_LANE_0_3;
-				}
-			}
-			break;
-		case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
-			args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG2_ENCODER;
-			if (radeon_encoder->pixel_clock > 165000)
-				args.v1.ucConfig |= (ATOM_TRANSMITTER_CONFIG_8LANE_LINK |
-						     ATOM_TRANSMITTER_CONFIG_LINKA_B |
-						     ATOM_TRANSMITTER_CONFIG_LANE_0_7);
-			else {
-				if (dig_connector->linkb)
-					args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKB | ATOM_TRANSMITTER_CONFIG_LANE_0_3;
-				else
-					args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKA | ATOM_TRANSMITTER_CONFIG_LANE_0_3;
 			}
 			break;
 		}
 
-		if (radeon_encoder->devices & (ATOM_DEVICE_DFP_SUPPORT)) {
+		if (radeon_encoder->pixel_clock > 165000)
+			args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_8LANE_LINK;
+
+		if (dig_connector->linkb)
+			args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKB;
+		else
+			args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKA;
+
+		if (is_dp)
+			args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_COHERENT;
+		else if (radeon_encoder->devices & (ATOM_DEVICE_DFP_SUPPORT)) {
 			if (dig->coherent_mode)
 				args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_COHERENT;
 		}
 	}
 
 	atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
-
 }
 
 static void
@@ -918,12 +1012,16 @@
 	if (is_dig) {
 		switch (mode) {
 		case DRM_MODE_DPMS_ON:
-			atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE);
+			atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE_OUTPUT, 0, 0);
+			{
+				struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
+				dp_link_train(encoder, connector);
+			}
 			break;
 		case DRM_MODE_DPMS_STANDBY:
 		case DRM_MODE_DPMS_SUSPEND:
 		case DRM_MODE_DPMS_OFF:
-			atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE);
+			atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE_OUTPUT, 0, 0);
 			break;
 		}
 	} else {
@@ -957,6 +1055,7 @@
 	union crtc_sourc_param args;
 	int index = GetIndexIntoMasterTable(COMMAND, SelectCRTC_Source);
 	uint8_t frev, crev;
+	struct radeon_encoder_atom_dig *dig;
 
 	memset(&args, 0, sizeof(args));
 
@@ -1020,20 +1119,16 @@
 			case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
 			case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
 			case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
-				if (ASIC_IS_DCE32(rdev)) {
-					if (radeon_crtc->crtc_id)
-						args.v2.ucEncoderID = ASIC_INT_DIG2_ENCODER_ID;
-					else
-						args.v2.ucEncoderID = ASIC_INT_DIG1_ENCODER_ID;
-				} else
+			case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
+				dig = radeon_encoder->enc_priv;
+				if (dig->dig_encoder)
+					args.v2.ucEncoderID = ASIC_INT_DIG2_ENCODER_ID;
+				else
 					args.v2.ucEncoderID = ASIC_INT_DIG1_ENCODER_ID;
 				break;
 			case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1:
 				args.v2.ucEncoderID = ASIC_INT_DVO_ENCODER_ID;
 				break;
-			case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
-				args.v2.ucEncoderID = ASIC_INT_DIG2_ENCODER_ID;
-				break;
 			case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1:
 				if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT))
 					args.v2.ucEncoderID = ASIC_INT_TV_ENCODER_ID;
@@ -1060,7 +1155,6 @@
 	}
 
 	atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
-
 }
 
 static void
@@ -1094,6 +1188,47 @@
 	}
 }
 
+static int radeon_atom_pick_dig_encoder(struct drm_encoder *encoder)
+{
+	struct drm_device *dev = encoder->dev;
+	struct radeon_device *rdev = dev->dev_private;
+	struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
+	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+	struct drm_encoder *test_encoder;
+	struct radeon_encoder_atom_dig *dig;
+	uint32_t dig_enc_in_use = 0;
+	/* on DCE32 and encoder can driver any block so just crtc id */
+	if (ASIC_IS_DCE32(rdev)) {
+		return radeon_crtc->crtc_id;
+	}
+
+	/* on DCE3 - LVTMA can only be driven by DIGB */
+	list_for_each_entry(test_encoder, &dev->mode_config.encoder_list, head) {
+		struct radeon_encoder *radeon_test_encoder;
+
+		if (encoder == test_encoder)
+			continue;
+
+		if (!radeon_encoder_is_digital(test_encoder))
+			continue;
+
+		radeon_test_encoder = to_radeon_encoder(test_encoder);
+		dig = radeon_test_encoder->enc_priv;
+
+		if (dig->dig_encoder >= 0)
+			dig_enc_in_use |= (1 << dig->dig_encoder);
+	}
+
+	if (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA) {
+		if (dig_enc_in_use & 0x2)
+			DRM_ERROR("LVDS required digital encoder 2 but it was in use - stealing\n");
+		return 1;
+	}
+	if (!(dig_enc_in_use & 1))
+		return 0;
+	return 1;
+}
+
 static void
 radeon_atom_encoder_mode_set(struct drm_encoder *encoder,
 			     struct drm_display_mode *mode,
@@ -1104,11 +1239,11 @@
 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
 	struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
 
-	if (radeon_encoder->enc_priv) {
-		struct radeon_encoder_atom_dig *dig;
-
-		dig = radeon_encoder->enc_priv;
-		dig->dig_block = radeon_crtc->crtc_id;
+	if (radeon_encoder->active_device &
+	    (ATOM_DEVICE_DFP_SUPPORT | ATOM_DEVICE_LCD_SUPPORT)) {
+		struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
+		if (dig)
+			dig->dig_encoder = radeon_atom_pick_dig_encoder(encoder);
 	}
 	radeon_encoder->pixel_clock = adjusted_mode->clock;
 
@@ -1134,14 +1269,14 @@
 	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
 	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
 		/* disable the encoder and transmitter */
-		atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE);
+		atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE, 0, 0);
 		atombios_dig_encoder_setup(encoder, ATOM_DISABLE);
 
 		/* setup and enable the encoder and transmitter */
 		atombios_dig_encoder_setup(encoder, ATOM_ENABLE);
-		atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_INIT);
-		atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_SETUP);
-		atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE);
+		atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_INIT, 0, 0);
+		atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_SETUP, 0, 0);
+		atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE, 0, 0);
 		break;
 	case ENCODER_OBJECT_ID_INTERNAL_DDI:
 		atombios_ddia_setup(encoder, ATOM_ENABLE);
@@ -1155,11 +1290,17 @@
 	case ENCODER_OBJECT_ID_INTERNAL_DAC2:
 	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2:
 		atombios_dac_setup(encoder, ATOM_ENABLE);
-		if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT | ATOM_DEVICE_CV_SUPPORT))
-			atombios_tv_setup(encoder, ATOM_ENABLE);
+		if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT | ATOM_DEVICE_CV_SUPPORT)) {
+			if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT | ATOM_DEVICE_CV_SUPPORT))
+				atombios_tv_setup(encoder, ATOM_ENABLE);
+			else
+				atombios_tv_setup(encoder, ATOM_DISABLE);
+		}
 		break;
 	}
 	atombios_apply_encoder_quirks(encoder, adjusted_mode);
+
+	r600_hdmi_setmode(encoder, adjusted_mode);
 }
 
 static bool
@@ -1266,7 +1407,13 @@
 static void radeon_atom_encoder_disable(struct drm_encoder *encoder)
 {
 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+	struct radeon_encoder_atom_dig *dig;
 	radeon_atom_encoder_dpms(encoder, DRM_MODE_DPMS_OFF);
+
+	if (radeon_encoder_is_digital(encoder)) {
+		dig = radeon_encoder->enc_priv;
+		dig->dig_encoder = -1;
+	}
 	radeon_encoder->active_device = 0;
 }
 
@@ -1323,6 +1470,7 @@
 
 	/* coherent mode by default */
 	dig->coherent_mode = true;
+	dig->dig_encoder = -1;
 
 	return dig;
 }
@@ -1354,7 +1502,6 @@
 		encoder->possible_crtcs = 0x1;
 	else
 		encoder->possible_crtcs = 0x3;
-	encoder->possible_clones = 0;
 
 	radeon_encoder->enc_priv = NULL;
 
@@ -1406,4 +1553,6 @@
 		drm_encoder_helper_add(encoder, &radeon_atom_dig_helper_funcs);
 		break;
 	}
+
+	r600_hdmi_init(encoder);
 }
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_benchmark.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_benchmark.c
@@ -29,8 +29,8 @@
 void radeon_benchmark_move(struct radeon_device *rdev, unsigned bsize,
 			   unsigned sdomain, unsigned ddomain)
 {
-	struct radeon_object *dobj = NULL;
-	struct radeon_object *sobj = NULL;
+	struct radeon_bo *dobj = NULL;
+	struct radeon_bo *sobj = NULL;
 	struct radeon_fence *fence = NULL;
 	uint64_t saddr, daddr;
 	unsigned long start_jiffies;
@@ -41,47 +41,66 @@
 
 	size = bsize;
 	n = 1024;
-	r = radeon_object_create(rdev, NULL, size, true, sdomain, false, &sobj);
+	r = radeon_bo_create(rdev, NULL, size, true, sdomain, &sobj);
 	if (r) {
 		goto out_cleanup;
 	}
-	r = radeon_object_pin(sobj, sdomain, &saddr);
+	r = radeon_bo_reserve(sobj, false);
+	if (unlikely(r != 0))
+		goto out_cleanup;
+	r = radeon_bo_pin(sobj, sdomain, &saddr);
+	radeon_bo_unreserve(sobj);
 	if (r) {
 		goto out_cleanup;
 	}
-	r = radeon_object_create(rdev, NULL, size, true, ddomain, false, &dobj);
+	r = radeon_bo_create(rdev, NULL, size, true, ddomain, &dobj);
 	if (r) {
 		goto out_cleanup;
 	}
-	r = radeon_object_pin(dobj, ddomain, &daddr);
+	r = radeon_bo_reserve(dobj, false);
+	if (unlikely(r != 0))
+		goto out_cleanup;
+	r = radeon_bo_pin(dobj, ddomain, &daddr);
+	radeon_bo_unreserve(dobj);
 	if (r) {
 		goto out_cleanup;
 	}
-	start_jiffies = jiffies;
-	for (i = 0; i < n; i++) {
-		r = radeon_fence_create(rdev, &fence);
-		if (r) {
-			goto out_cleanup;
-		}
-		r = radeon_copy_dma(rdev, saddr, daddr, size / RADEON_GPU_PAGE_SIZE, fence);
-		if (r) {
-			goto out_cleanup;
-		}
-		r = radeon_fence_wait(fence, false);
-		if (r) {
-			goto out_cleanup;
+
+	/* r100 doesn't have dma engine so skip the test */
+	if (rdev->asic->copy_dma) {
+
+		start_jiffies = jiffies;
+		for (i = 0; i < n; i++) {
+			r = radeon_fence_create(rdev, &fence);
+			if (r) {
+				goto out_cleanup;
+			}
+
+			r = radeon_copy_dma(rdev, saddr, daddr,
+					size / RADEON_GPU_PAGE_SIZE, fence);
+
+			if (r) {
+				goto out_cleanup;
+			}
+			r = radeon_fence_wait(fence, false);
+			if (r) {
+				goto out_cleanup;
+			}
+			radeon_fence_unref(&fence);
+		}
+		end_jiffies = jiffies;
+		time = end_jiffies - start_jiffies;
+		time = jiffies_to_msecs(time);
+		if (time > 0) {
+			i = ((n * size) >> 10) / time;
+			printk(KERN_INFO "radeon: dma %u bo moves of %ukb from"
+					" %d to %d in %lums (%ukb/ms %ukb/s %uM/s)\n",
+					n, size >> 10,
+					sdomain, ddomain, time,
+					i, i * 1000, (i * 1000) / 1024);
 		}
-		radeon_fence_unref(&fence);
-	}
-	end_jiffies = jiffies;
-	time = end_jiffies - start_jiffies;
-	time = jiffies_to_msecs(time);
-	if (time > 0) {
-		i = ((n * size) >> 10) / time;
-		printk(KERN_INFO "radeon: dma %u bo moves of %ukb from %d to %d"
-		       " in %lums (%ukb/ms %ukb/s %uM/s)\n", n, size >> 10,
-		       sdomain, ddomain, time, i, i * 1000, (i * 1000) / 1024);
 	}
+
 	start_jiffies = jiffies;
 	for (i = 0; i < n; i++) {
 		r = radeon_fence_create(rdev, &fence);
@@ -109,12 +128,20 @@
 	}
 out_cleanup:
 	if (sobj) {
-		radeon_object_unpin(sobj);
-		radeon_object_unref(&sobj);
+		r = radeon_bo_reserve(sobj, false);
+		if (likely(r == 0)) {
+			radeon_bo_unpin(sobj);
+			radeon_bo_unreserve(sobj);
+		}
+		radeon_bo_unref(&sobj);
 	}
 	if (dobj) {
-		radeon_object_unpin(dobj);
-		radeon_object_unref(&dobj);
+		r = radeon_bo_reserve(dobj, false);
+		if (likely(r == 0)) {
+			radeon_bo_unpin(dobj);
+			radeon_bo_unreserve(dobj);
+		}
+		radeon_bo_unref(&dobj);
 	}
 	if (fence) {
 		radeon_fence_unref(&fence);
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/atombios_dp.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/atombios_dp.c
@@ -0,0 +1,789 @@
+/*
+ * Copyright 2007-8 Advanced Micro Devices, Inc.
+ * Copyright 2008 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Dave Airlie
+ *          Alex Deucher
+ */
+#include "drmP.h"
+#include "radeon_drm.h"
+#include "radeon.h"
+
+#include "atom.h"
+#include "atom-bits.h"
+#include "drm_dp_helper.h"
+
+/* move these to drm_dp_helper.c/h */
+#define DP_LINK_CONFIGURATION_SIZE 9
+#define DP_LINK_STATUS_SIZE	   6
+#define DP_DPCD_SIZE	           8
+
+static char *voltage_names[] = {
+        "0.4V", "0.6V", "0.8V", "1.2V"
+};
+static char *pre_emph_names[] = {
+        "0dB", "3.5dB", "6dB", "9.5dB"
+};
+
+static const int dp_clocks[] = {
+	54000,  /* 1 lane, 1.62 Ghz */
+	90000,  /* 1 lane, 2.70 Ghz */
+	108000, /* 2 lane, 1.62 Ghz */
+	180000, /* 2 lane, 2.70 Ghz */
+	216000, /* 4 lane, 1.62 Ghz */
+	360000, /* 4 lane, 2.70 Ghz */
+};
+
+static const int num_dp_clocks = sizeof(dp_clocks) / sizeof(int);
+
+/* common helper functions */
+static int dp_lanes_for_mode_clock(u8 dpcd[DP_DPCD_SIZE], int mode_clock)
+{
+	int i;
+	u8 max_link_bw;
+	u8 max_lane_count;
+
+	if (!dpcd)
+		return 0;
+
+	max_link_bw = dpcd[DP_MAX_LINK_RATE];
+	max_lane_count = dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK;
+
+	switch (max_link_bw) {
+	case DP_LINK_BW_1_62:
+	default:
+		for (i = 0; i < num_dp_clocks; i++) {
+			if (i % 2)
+				continue;
+			switch (max_lane_count) {
+			case 1:
+				if (i > 1)
+					return 0;
+				break;
+			case 2:
+				if (i > 3)
+					return 0;
+				break;
+			case 4:
+			default:
+				break;
+			}
+			if (dp_clocks[i] > mode_clock) {
+				if (i < 2)
+					return 1;
+				else if (i < 4)
+					return 2;
+				else
+					return 4;
+			}
+		}
+		break;
+	case DP_LINK_BW_2_7:
+		for (i = 0; i < num_dp_clocks; i++) {
+			switch (max_lane_count) {
+			case 1:
+				if (i > 1)
+					return 0;
+				break;
+			case 2:
+				if (i > 3)
+					return 0;
+				break;
+			case 4:
+			default:
+				break;
+			}
+			if (dp_clocks[i] > mode_clock) {
+				if (i < 2)
+					return 1;
+				else if (i < 4)
+					return 2;
+				else
+					return 4;
+			}
+		}
+		break;
+	}
+
+	return 0;
+}
+
+static int dp_link_clock_for_mode_clock(u8 dpcd[DP_DPCD_SIZE], int mode_clock)
+{
+	int i;
+	u8 max_link_bw;
+	u8 max_lane_count;
+
+	if (!dpcd)
+		return 0;
+
+	max_link_bw = dpcd[DP_MAX_LINK_RATE];
+	max_lane_count = dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK;
+
+	switch (max_link_bw) {
+	case DP_LINK_BW_1_62:
+	default:
+		for (i = 0; i < num_dp_clocks; i++) {
+			if (i % 2)
+				continue;
+			switch (max_lane_count) {
+			case 1:
+				if (i > 1)
+					return 0;
+				break;
+			case 2:
+				if (i > 3)
+					return 0;
+				break;
+			case 4:
+			default:
+				break;
+			}
+			if (dp_clocks[i] > mode_clock)
+				return 162000;
+		}
+		break;
+	case DP_LINK_BW_2_7:
+		for (i = 0; i < num_dp_clocks; i++) {
+			switch (max_lane_count) {
+			case 1:
+				if (i > 1)
+					return 0;
+				break;
+			case 2:
+				if (i > 3)
+					return 0;
+				break;
+			case 4:
+			default:
+				break;
+			}
+			if (dp_clocks[i] > mode_clock)
+				return (i % 2) ? 270000 : 162000;
+		}
+	}
+
+	return 0;
+}
+
+int dp_mode_valid(u8 dpcd[DP_DPCD_SIZE], int mode_clock)
+{
+	int lanes = dp_lanes_for_mode_clock(dpcd, mode_clock);
+	int bw = dp_lanes_for_mode_clock(dpcd, mode_clock);
+
+	if ((lanes == 0) || (bw == 0))
+		return MODE_CLOCK_HIGH;
+
+	return MODE_OK;
+}
+
+static u8 dp_link_status(u8 link_status[DP_LINK_STATUS_SIZE], int r)
+{
+	return link_status[r - DP_LANE0_1_STATUS];
+}
+
+static u8 dp_get_lane_status(u8 link_status[DP_LINK_STATUS_SIZE],
+			     int lane)
+{
+	int i = DP_LANE0_1_STATUS + (lane >> 1);
+	int s = (lane & 1) * 4;
+	u8 l = dp_link_status(link_status, i);
+	return (l >> s) & 0xf;
+}
+
+static bool dp_clock_recovery_ok(u8 link_status[DP_LINK_STATUS_SIZE],
+				 int lane_count)
+{
+	int lane;
+	u8 lane_status;
+
+	for (lane = 0; lane < lane_count; lane++) {
+		lane_status = dp_get_lane_status(link_status, lane);
+		if ((lane_status & DP_LANE_CR_DONE) == 0)
+			return false;
+	}
+	return true;
+}
+
+static bool dp_channel_eq_ok(u8 link_status[DP_LINK_STATUS_SIZE],
+			     int lane_count)
+{
+	u8 lane_align;
+	u8 lane_status;
+	int lane;
+
+	lane_align = dp_link_status(link_status,
+				    DP_LANE_ALIGN_STATUS_UPDATED);
+	if ((lane_align & DP_INTERLANE_ALIGN_DONE) == 0)
+		return false;
+	for (lane = 0; lane < lane_count; lane++) {
+		lane_status = dp_get_lane_status(link_status, lane);
+		if ((lane_status & DP_CHANNEL_EQ_BITS) != DP_CHANNEL_EQ_BITS)
+			return false;
+	}
+	return true;
+}
+
+static u8 dp_get_adjust_request_voltage(uint8_t link_status[DP_LINK_STATUS_SIZE],
+					int lane)
+
+{
+	int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1);
+	int s = ((lane & 1) ?
+		 DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT :
+		 DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT);
+	u8 l = dp_link_status(link_status, i);
+
+	return ((l >> s) & 0x3) << DP_TRAIN_VOLTAGE_SWING_SHIFT;
+}
+
+static u8 dp_get_adjust_request_pre_emphasis(uint8_t link_status[DP_LINK_STATUS_SIZE],
+					     int lane)
+{
+	int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1);
+	int s = ((lane & 1) ?
+		 DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT :
+		 DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT);
+	u8 l = dp_link_status(link_status, i);
+
+	return ((l >> s) & 0x3) << DP_TRAIN_PRE_EMPHASIS_SHIFT;
+}
+
+/* XXX fix me -- chip specific */
+#define DP_VOLTAGE_MAX         DP_TRAIN_VOLTAGE_SWING_1200
+static u8 dp_pre_emphasis_max(u8 voltage_swing)
+{
+	switch (voltage_swing & DP_TRAIN_VOLTAGE_SWING_MASK) {
+	case DP_TRAIN_VOLTAGE_SWING_400:
+		return DP_TRAIN_PRE_EMPHASIS_6;
+	case DP_TRAIN_VOLTAGE_SWING_600:
+		return DP_TRAIN_PRE_EMPHASIS_6;
+	case DP_TRAIN_VOLTAGE_SWING_800:
+		return DP_TRAIN_PRE_EMPHASIS_3_5;
+	case DP_TRAIN_VOLTAGE_SWING_1200:
+	default:
+		return DP_TRAIN_PRE_EMPHASIS_0;
+	}
+}
+
+static void dp_get_adjust_train(u8 link_status[DP_LINK_STATUS_SIZE],
+				int lane_count,
+				u8 train_set[4])
+{
+	u8 v = 0;
+	u8 p = 0;
+	int lane;
+
+	for (lane = 0; lane < lane_count; lane++) {
+		u8 this_v = dp_get_adjust_request_voltage(link_status, lane);
+		u8 this_p = dp_get_adjust_request_pre_emphasis(link_status, lane);
+
+		DRM_DEBUG("requested signal parameters: lane %d voltage %s pre_emph %s\n",
+			  lane,
+			  voltage_names[this_v >> DP_TRAIN_VOLTAGE_SWING_SHIFT],
+			  pre_emph_names[this_p >> DP_TRAIN_PRE_EMPHASIS_SHIFT]);
+
+		if (this_v > v)
+			v = this_v;
+		if (this_p > p)
+			p = this_p;
+	}
+
+	if (v >= DP_VOLTAGE_MAX)
+		v = DP_VOLTAGE_MAX | DP_TRAIN_MAX_SWING_REACHED;
+
+	if (p >= dp_pre_emphasis_max(v))
+		p = dp_pre_emphasis_max(v) | DP_TRAIN_MAX_PRE_EMPHASIS_REACHED;
+
+	DRM_DEBUG("using signal parameters: voltage %s pre_emph %s\n",
+		  voltage_names[(v & DP_TRAIN_VOLTAGE_SWING_MASK) >> DP_TRAIN_VOLTAGE_SWING_SHIFT],
+		  pre_emph_names[(p & DP_TRAIN_PRE_EMPHASIS_MASK) >> DP_TRAIN_PRE_EMPHASIS_SHIFT]);
+
+	for (lane = 0; lane < 4; lane++)
+		train_set[lane] = v | p;
+}
+
+
+/* radeon aux chan functions */
+bool radeon_process_aux_ch(struct radeon_i2c_chan *chan, u8 *req_bytes,
+			   int num_bytes, u8 *read_byte,
+			   u8 read_buf_len, u8 delay)
+{
+	struct drm_device *dev = chan->dev;
+	struct radeon_device *rdev = dev->dev_private;
+	PROCESS_AUX_CHANNEL_TRANSACTION_PS_ALLOCATION args;
+	int index = GetIndexIntoMasterTable(COMMAND, ProcessAuxChannelTransaction);
+	unsigned char *base;
+	int retry_count = 0;
+
+	memset(&args, 0, sizeof(args));
+
+	base = (unsigned char *)rdev->mode_info.atom_context->scratch;
+
+retry:
+	memcpy(base, req_bytes, num_bytes);
+
+	args.lpAuxRequest = 0;
+	args.lpDataOut = 16;
+	args.ucDataOutLen = 0;
+	args.ucChannelID = chan->rec.i2c_id;
+	args.ucDelay = delay / 10;
+
+	atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
+
+	if (args.ucReplyStatus && !args.ucDataOutLen) {
+		if (args.ucReplyStatus == 0x20 && retry_count++ < 10)
+			goto retry;
+		DRM_DEBUG("failed to get auxch %02x%02x %02x %02x 0x%02x %02x after %d retries\n",
+			  req_bytes[1], req_bytes[0], req_bytes[2], req_bytes[3],
+			  chan->rec.i2c_id, args.ucReplyStatus, retry_count);
+		return false;
+	}
+
+	if (args.ucDataOutLen && read_byte && read_buf_len) {
+		if (read_buf_len < args.ucDataOutLen) {
+			DRM_ERROR("Buffer to small for return answer %d %d\n",
+				  read_buf_len, args.ucDataOutLen);
+			return false;
+		}
+		{
+			int len = min(read_buf_len, args.ucDataOutLen);
+			memcpy(read_byte, base + 16, len);
+		}
+	}
+	return true;
+}
+
+bool radeon_dp_aux_native_write(struct radeon_connector *radeon_connector, uint16_t address,
+				uint8_t send_bytes, uint8_t *send)
+{
+	struct radeon_connector_atom_dig *dig_connector = radeon_connector->con_priv;
+	u8 msg[20];
+	u8 msg_len, dp_msg_len;
+	bool ret;
+
+	dp_msg_len = 4;
+	msg[0] = address;
+	msg[1] = address >> 8;
+	msg[2] = AUX_NATIVE_WRITE << 4;
+	dp_msg_len += send_bytes;
+	msg[3] = (dp_msg_len << 4) | (send_bytes - 1);
+
+	if (send_bytes > 16)
+		return false;
+
+	memcpy(&msg[4], send, send_bytes);
+	msg_len = 4 + send_bytes;
+	ret = radeon_process_aux_ch(dig_connector->dp_i2c_bus, msg, msg_len, NULL, 0, 0);
+	return ret;
+}
+
+bool radeon_dp_aux_native_read(struct radeon_connector *radeon_connector, uint16_t address,
+			       uint8_t delay, uint8_t expected_bytes,
+			       uint8_t *read_p)
+{
+	struct radeon_connector_atom_dig *dig_connector = radeon_connector->con_priv;
+	u8 msg[20];
+	u8 msg_len, dp_msg_len;
+	bool ret = false;
+	msg_len = 4;
+	dp_msg_len = 4;
+	msg[0] = address;
+	msg[1] = address >> 8;
+	msg[2] = AUX_NATIVE_READ << 4;
+	msg[3] = (dp_msg_len) << 4;
+	msg[3] |= expected_bytes - 1;
+
+	ret = radeon_process_aux_ch(dig_connector->dp_i2c_bus, msg, msg_len, read_p, expected_bytes, delay);
+	return ret;
+}
+
+/* radeon dp functions */
+static u8 radeon_dp_encoder_service(struct radeon_device *rdev, int action, int dp_clock,
+				    uint8_t ucconfig, uint8_t lane_num)
+{
+	DP_ENCODER_SERVICE_PARAMETERS args;
+	int index = GetIndexIntoMasterTable(COMMAND, DPEncoderService);
+
+	memset(&args, 0, sizeof(args));
+	args.ucLinkClock = dp_clock / 10;
+	args.ucConfig = ucconfig;
+	args.ucAction = action;
+	args.ucLaneNum = lane_num;
+	args.ucStatus = 0;
+
+	atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
+	return args.ucStatus;
+}
+
+u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector)
+{
+	struct radeon_connector_atom_dig *dig_connector = radeon_connector->con_priv;
+	struct drm_device *dev = radeon_connector->base.dev;
+	struct radeon_device *rdev = dev->dev_private;
+
+	return radeon_dp_encoder_service(rdev, ATOM_DP_ACTION_GET_SINK_TYPE, 0,
+					 dig_connector->dp_i2c_bus->rec.i2c_id, 0);
+}
+
+bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector)
+{
+	struct radeon_connector_atom_dig *dig_connector = radeon_connector->con_priv;
+	u8 msg[25];
+	int ret;
+
+	ret = radeon_dp_aux_native_read(radeon_connector, DP_DPCD_REV, 0, 8, msg);
+	if (ret) {
+		memcpy(dig_connector->dpcd, msg, 8);
+		{
+			int i;
+			DRM_DEBUG("DPCD: ");
+			for (i = 0; i < 8; i++)
+				DRM_DEBUG("%02x ", msg[i]);
+			DRM_DEBUG("\n");
+		}
+		return true;
+	}
+	dig_connector->dpcd[0] = 0;
+	return false;
+}
+
+void radeon_dp_set_link_config(struct drm_connector *connector,
+			       struct drm_display_mode *mode)
+{
+	struct radeon_connector *radeon_connector;
+	struct radeon_connector_atom_dig *dig_connector;
+
+	if ((connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) &&
+	    (connector->connector_type != DRM_MODE_CONNECTOR_eDP))
+		return;
+
+	radeon_connector = to_radeon_connector(connector);
+	if (!radeon_connector->con_priv)
+		return;
+	dig_connector = radeon_connector->con_priv;
+
+	dig_connector->dp_clock =
+		dp_link_clock_for_mode_clock(dig_connector->dpcd, mode->clock);
+	dig_connector->dp_lane_count =
+		dp_lanes_for_mode_clock(dig_connector->dpcd, mode->clock);
+}
+
+int radeon_dp_mode_valid_helper(struct radeon_connector *radeon_connector,
+				struct drm_display_mode *mode)
+{
+	struct radeon_connector_atom_dig *dig_connector = radeon_connector->con_priv;
+
+	return dp_mode_valid(dig_connector->dpcd, mode->clock);
+}
+
+static bool atom_dp_get_link_status(struct radeon_connector *radeon_connector,
+				    u8 link_status[DP_LINK_STATUS_SIZE])
+{
+	int ret;
+	ret = radeon_dp_aux_native_read(radeon_connector, DP_LANE0_1_STATUS, 100,
+					DP_LINK_STATUS_SIZE, link_status);
+	if (!ret) {
+		DRM_ERROR("displayport link status failed\n");
+		return false;
+	}
+
+	DRM_DEBUG("link status %02x %02x %02x %02x %02x %02x\n",
+		  link_status[0], link_status[1], link_status[2],
+		  link_status[3], link_status[4], link_status[5]);
+	return true;
+}
+
+bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector)
+{
+	struct radeon_connector_atom_dig *dig_connector = radeon_connector->con_priv;
+	u8 link_status[DP_LINK_STATUS_SIZE];
+
+	if (!atom_dp_get_link_status(radeon_connector, link_status))
+		return false;
+	if (dp_channel_eq_ok(link_status, dig_connector->dp_lane_count))
+		return false;
+	return true;
+}
+
+static void dp_set_power(struct radeon_connector *radeon_connector, u8 power_state)
+{
+	struct radeon_connector_atom_dig *dig_connector = radeon_connector->con_priv;
+
+	if (dig_connector->dpcd[0] >= 0x11) {
+		radeon_dp_aux_native_write(radeon_connector, DP_SET_POWER, 1,
+					   &power_state);
+	}
+}
+
+static void dp_set_downspread(struct radeon_connector *radeon_connector, u8 downspread)
+{
+	radeon_dp_aux_native_write(radeon_connector, DP_DOWNSPREAD_CTRL, 1,
+				   &downspread);
+}
+
+static void dp_set_link_bw_lanes(struct radeon_connector *radeon_connector,
+				 u8 link_configuration[DP_LINK_CONFIGURATION_SIZE])
+{
+	radeon_dp_aux_native_write(radeon_connector, DP_LINK_BW_SET, 2,
+				   link_configuration);
+}
+
+static void dp_update_dpvs_emph(struct radeon_connector *radeon_connector,
+				struct drm_encoder *encoder,
+				u8 train_set[4])
+{
+	struct radeon_connector_atom_dig *dig_connector = radeon_connector->con_priv;
+	int i;
+
+	for (i = 0; i < dig_connector->dp_lane_count; i++)
+		atombios_dig_transmitter_setup(encoder,
+					       ATOM_TRANSMITTER_ACTION_SETUP_VSEMPH,
+					       i, train_set[i]);
+
+	radeon_dp_aux_native_write(radeon_connector, DP_TRAINING_LANE0_SET,
+				   dig_connector->dp_lane_count, train_set);
+}
+
+static void dp_set_training(struct radeon_connector *radeon_connector,
+			    u8 training)
+{
+	radeon_dp_aux_native_write(radeon_connector, DP_TRAINING_PATTERN_SET,
+				   1, &training);
+}
+
+void dp_link_train(struct drm_encoder *encoder,
+		   struct drm_connector *connector)
+{
+	struct drm_device *dev = encoder->dev;
+	struct radeon_device *rdev = dev->dev_private;
+	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+	struct radeon_encoder_atom_dig *dig;
+	struct radeon_connector *radeon_connector;
+	struct radeon_connector_atom_dig *dig_connector;
+	int enc_id = 0;
+	bool clock_recovery, channel_eq;
+	u8 link_status[DP_LINK_STATUS_SIZE];
+	u8 link_configuration[DP_LINK_CONFIGURATION_SIZE];
+	u8 tries, voltage;
+	u8 train_set[4];
+	int i;
+
+	if ((connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) &&
+	    (connector->connector_type != DRM_MODE_CONNECTOR_eDP))
+		return;
+
+	if (!radeon_encoder->enc_priv)
+		return;
+	dig = radeon_encoder->enc_priv;
+
+	radeon_connector = to_radeon_connector(connector);
+	if (!radeon_connector->con_priv)
+		return;
+	dig_connector = radeon_connector->con_priv;
+
+	if (dig->dig_encoder)
+		enc_id |= ATOM_DP_CONFIG_DIG2_ENCODER;
+	else
+		enc_id |= ATOM_DP_CONFIG_DIG1_ENCODER;
+	if (dig_connector->linkb)
+		enc_id |= ATOM_DP_CONFIG_LINK_B;
+	else
+		enc_id |= ATOM_DP_CONFIG_LINK_A;
+
+	memset(link_configuration, 0, DP_LINK_CONFIGURATION_SIZE);
+	if (dig_connector->dp_clock == 270000)
+		link_configuration[0] = DP_LINK_BW_2_7;
+	else
+		link_configuration[0] = DP_LINK_BW_1_62;
+	link_configuration[1] = dig_connector->dp_lane_count;
+	if (dig_connector->dpcd[0] >= 0x11)
+		link_configuration[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
+
+	/* power up the sink */
+	dp_set_power(radeon_connector, DP_SET_POWER_D0);
+	/* disable the training pattern on the sink */
+	dp_set_training(radeon_connector, DP_TRAINING_PATTERN_DISABLE);
+	/* set link bw and lanes on the sink */
+	dp_set_link_bw_lanes(radeon_connector, link_configuration);
+	/* disable downspread on the sink */
+	dp_set_downspread(radeon_connector, 0);
+	/* start training on the source */
+	radeon_dp_encoder_service(rdev, ATOM_DP_ACTION_TRAINING_START,
+				  dig_connector->dp_clock, enc_id, 0);
+	/* set training pattern 1 on the source */
+	radeon_dp_encoder_service(rdev, ATOM_DP_ACTION_TRAINING_PATTERN_SEL,
+				  dig_connector->dp_clock, enc_id, 0);
+
+	/* set initial vs/emph */
+	memset(train_set, 0, 4);
+	udelay(400);
+	/* set training pattern 1 on the sink */
+	dp_set_training(radeon_connector, DP_TRAINING_PATTERN_1);
+
+	dp_update_dpvs_emph(radeon_connector, encoder, train_set);
+
+	/* clock recovery loop */
+	clock_recovery = false;
+	tries = 0;
+	voltage = 0xff;
+	for (;;) {
+		udelay(100);
+		if (!atom_dp_get_link_status(radeon_connector, link_status))
+			break;
+
+		if (dp_clock_recovery_ok(link_status, dig_connector->dp_lane_count)) {
+			clock_recovery = true;
+			break;
+		}
+
+		for (i = 0; i < dig_connector->dp_lane_count; i++) {
+			if ((train_set[i] & DP_TRAIN_MAX_SWING_REACHED) == 0)
+				break;
+		}
+		if (i == dig_connector->dp_lane_count) {
+			DRM_ERROR("clock recovery reached max voltage\n");
+			break;
+		}
+
+		if ((train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK) == voltage) {
+			++tries;
+			if (tries == 5) {
+				DRM_ERROR("clock recovery tried 5 times\n");
+				break;
+			}
+		} else
+			tries = 0;
+
+		voltage = train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK;
+
+		/* Compute new train_set as requested by sink */
+		dp_get_adjust_train(link_status, dig_connector->dp_lane_count, train_set);
+		dp_update_dpvs_emph(radeon_connector, encoder, train_set);
+	}
+	if (!clock_recovery)
+		DRM_ERROR("clock recovery failed\n");
+	else
+		DRM_DEBUG("clock recovery at voltage %d pre-emphasis %d\n",
+			  train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK,
+			  (train_set[0] & DP_TRAIN_PRE_EMPHASIS_MASK) >>
+			  DP_TRAIN_PRE_EMPHASIS_SHIFT);
+
+
+	/* set training pattern 2 on the sink */
+	dp_set_training(radeon_connector, DP_TRAINING_PATTERN_2);
+	/* set training pattern 2 on the source */
+	radeon_dp_encoder_service(rdev, ATOM_DP_ACTION_TRAINING_PATTERN_SEL,
+				  dig_connector->dp_clock, enc_id, 1);
+
+	/* channel equalization loop */
+	tries = 0;
+	channel_eq = false;
+	for (;;) {
+		udelay(400);
+		if (!atom_dp_get_link_status(radeon_connector, link_status))
+			break;
+
+		if (dp_channel_eq_ok(link_status, dig_connector->dp_lane_count)) {
+			channel_eq = true;
+			break;
+		}
+
+		/* Try 5 times */
+		if (tries > 5) {
+			DRM_ERROR("channel eq failed: 5 tries\n");
+			break;
+		}
+
+		/* Compute new train_set as requested by sink */
+		dp_get_adjust_train(link_status, dig_connector->dp_lane_count, train_set);
+		dp_update_dpvs_emph(radeon_connector, encoder, train_set);
+
+		tries++;
+	}
+
+	if (!channel_eq)
+		DRM_ERROR("channel eq failed\n");
+	else
+		DRM_DEBUG("channel eq at voltage %d pre-emphasis %d\n",
+			  train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK,
+			  (train_set[0] & DP_TRAIN_PRE_EMPHASIS_MASK)
+			  >> DP_TRAIN_PRE_EMPHASIS_SHIFT);
+
+	/* disable the training pattern on the sink */
+	dp_set_training(radeon_connector, DP_TRAINING_PATTERN_DISABLE);
+
+	radeon_dp_encoder_service(rdev, ATOM_DP_ACTION_TRAINING_COMPLETE,
+				  dig_connector->dp_clock, enc_id, 0);
+}
+
+int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
+			 uint8_t write_byte, uint8_t *read_byte)
+{
+	struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
+	struct radeon_i2c_chan *auxch = (struct radeon_i2c_chan *)adapter;
+	int ret = 0;
+	uint16_t address = algo_data->address;
+	uint8_t msg[5];
+	uint8_t reply[2];
+	int msg_len, dp_msg_len;
+	int reply_bytes;
+
+	/* Set up the command byte */
+	if (mode & MODE_I2C_READ)
+		msg[2] = AUX_I2C_READ << 4;
+	else
+		msg[2] = AUX_I2C_WRITE << 4;
+
+	if (!(mode & MODE_I2C_STOP))
+		msg[2] |= AUX_I2C_MOT << 4;
+
+	msg[0] = address;
+	msg[1] = address >> 8;
+
+	reply_bytes = 1;
+
+	msg_len = 4;
+	dp_msg_len = 3;
+	switch (mode) {
+	case MODE_I2C_WRITE:
+		msg[4] = write_byte;
+		msg_len++;
+		dp_msg_len += 2;
+		break;
+	case MODE_I2C_READ:
+		dp_msg_len += 1;
+		break;
+	default:
+		break;
+	}
+
+	msg[3] = (dp_msg_len) << 4;
+	ret = radeon_process_aux_ch(auxch, msg, msg_len, reply, reply_bytes, 0);
+
+	if (ret) {
+		if (read_byte)
+			*read_byte = reply[0];
+		return reply_bytes;
+	}
+	return -EREMOTEIO;
+}
+
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_reg.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_reg.h
@@ -887,6 +887,7 @@
 #       define RADEON_FP_PANEL_FORMAT          (1 <<  3)
 #       define RADEON_FP_EN_TMDS               (1 <<  7)
 #       define RADEON_FP_DETECT_SENSE          (1 <<  8)
+#       define RADEON_FP_DETECT_INT_POL        (1 <<  9)
 #       define R200_FP_SOURCE_SEL_MASK         (3 <<  10)
 #       define R200_FP_SOURCE_SEL_CRTC1        (0 <<  10)
 #       define R200_FP_SOURCE_SEL_CRTC2        (1 <<  10)
@@ -894,6 +895,7 @@
 #       define R200_FP_SOURCE_SEL_TRANS        (3 <<  10)
 #       define RADEON_FP_SEL_CRTC1             (0 << 13)
 #       define RADEON_FP_SEL_CRTC2             (1 << 13)
+#       define R300_HPD_SEL(x)                 ((x) << 13)
 #       define RADEON_FP_CRTC_DONT_SHADOW_HPAR (1 << 15)
 #       define RADEON_FP_CRTC_DONT_SHADOW_VPAR (1 << 16)
 #       define RADEON_FP_CRTC_DONT_SHADOW_HEND (1 << 17)
@@ -909,6 +911,7 @@
 #       define RADEON_FP2_ON                   (1 <<  2)
 #       define RADEON_FP2_PANEL_FORMAT         (1 <<  3)
 #       define RADEON_FP2_DETECT_SENSE         (1 <<  8)
+#       define RADEON_FP2_DETECT_INT_POL       (1 <<  9)
 #       define R200_FP2_SOURCE_SEL_MASK        (3 << 10)
 #       define R200_FP2_SOURCE_SEL_CRTC1       (0 << 10)
 #       define R200_FP2_SOURCE_SEL_CRTC2       (1 << 10)
@@ -988,14 +991,20 @@
 
 #define RADEON_GEN_INT_CNTL                 0x0040
 #	define RADEON_CRTC_VBLANK_MASK		(1 << 0)
+#	define RADEON_FP_DETECT_MASK		(1 << 4)
 #	define RADEON_CRTC2_VBLANK_MASK		(1 << 9)
+#	define RADEON_FP2_DETECT_MASK		(1 << 10)
 #	define RADEON_SW_INT_ENABLE		(1 << 25)
 #define RADEON_GEN_INT_STATUS               0x0044
 #	define AVIVO_DISPLAY_INT_STATUS		(1 << 0)
 #	define RADEON_CRTC_VBLANK_STAT		(1 << 0)
 #	define RADEON_CRTC_VBLANK_STAT_ACK	(1 << 0)
+#	define RADEON_FP_DETECT_STAT		(1 << 4)
+#	define RADEON_FP_DETECT_STAT_ACK	(1 << 4)
 #	define RADEON_CRTC2_VBLANK_STAT		(1 << 9)
 #	define RADEON_CRTC2_VBLANK_STAT_ACK	(1 << 9)
+#	define RADEON_FP2_DETECT_STAT		(1 << 10)
+#	define RADEON_FP2_DETECT_STAT_ACK	(1 << 10)
 #	define RADEON_SW_INT_FIRE		(1 << 26)
 #	define RADEON_SW_INT_TEST		(1 << 25)
 #	define RADEON_SW_INT_TEST_ACK		(1 << 25)
@@ -1051,20 +1060,25 @@
 
        /* Multimedia I2C bus */
 #define RADEON_I2C_CNTL_0		    0x0090
-#define RADEON_I2C_DONE (1<<0)
-#define RADEON_I2C_NACK (1<<1)
-#define RADEON_I2C_HALT (1<<2)
-#define RADEON_I2C_SOFT_RST (1<<5)
-#define RADEON_I2C_DRIVE_EN (1<<6)
-#define RADEON_I2C_DRIVE_SEL (1<<7)
-#define RADEON_I2C_START (1<<8)
-#define RADEON_I2C_STOP (1<<9)
-#define RADEON_I2C_RECEIVE (1<<10)
-#define RADEON_I2C_ABORT (1<<11)
-#define RADEON_I2C_GO (1<<12)
+#define RADEON_I2C_DONE                     (1 << 0)
+#define RADEON_I2C_NACK                     (1 << 1)
+#define RADEON_I2C_HALT                     (1 << 2)
+#define RADEON_I2C_SOFT_RST                 (1 << 5)
+#define RADEON_I2C_DRIVE_EN                 (1 << 6)
+#define RADEON_I2C_DRIVE_SEL                (1 << 7)
+#define RADEON_I2C_START                    (1 << 8)
+#define RADEON_I2C_STOP                     (1 << 9)
+#define RADEON_I2C_RECEIVE                  (1 << 10)
+#define RADEON_I2C_ABORT                    (1 << 11)
+#define RADEON_I2C_GO                       (1 << 12)
+#define RADEON_I2C_PRESCALE_SHIFT           16
 #define RADEON_I2C_CNTL_1                   0x0094
-#define RADEON_I2C_SEL         (1<<16)
-#define RADEON_I2C_EN          (1<<17)
+#define RADEON_I2C_DATA_COUNT_SHIFT         0
+#define RADEON_I2C_ADDR_COUNT_SHIFT         4
+#define RADEON_I2C_INTRA_BYTE_DELAY_SHIFT   8
+#define RADEON_I2C_SEL                      (1 << 16)
+#define RADEON_I2C_EN                       (1 << 17)
+#define RADEON_I2C_TIME_LIMIT_SHIFT         24
 #define RADEON_I2C_DATA			    0x0098
 
 #define RADEON_DVI_I2C_CNTL_0		    0x02e0
@@ -1072,7 +1086,7 @@
 #       define R200_SEL_DDC1                0 /* 0x60 - VGA_DDC */
 #       define R200_SEL_DDC2                1 /* 0x64 - DVI_DDC */
 #       define R200_SEL_DDC3                2 /* 0x68 - MONID_DDC */
-#define RADEON_DVI_I2C_CNTL_1               0x02e4 /* ? */
+#define RADEON_DVI_I2C_CNTL_1               0x02e4
 #define RADEON_DVI_I2C_DATA		    0x02e8
 
 #define RADEON_INTERRUPT_LINE               0x0f3c /* PCI */
@@ -1143,15 +1157,16 @@
 #       define RADEON_IO_MCLK_MAX_DYN_STOP_LAT (1 << 13)
 #       define RADEON_MC_MCLK_DYN_ENABLE    (1 << 14)
 #       define RADEON_IO_MCLK_DYN_ENABLE    (1 << 15)
-#define RADEON_LCD_GPIO_MASK                0x01a0
-#define RADEON_GPIOPAD_EN                   0x01a0
-#define RADEON_LCD_GPIO_Y_REG               0x01a4
-#define RADEON_MDGPIO_A_REG                 0x01ac
-#define RADEON_MDGPIO_EN_REG                0x01b0
-#define RADEON_MDGPIO_MASK                  0x0198
+
 #define RADEON_GPIOPAD_MASK                 0x0198
 #define RADEON_GPIOPAD_A		    0x019c
-#define RADEON_MDGPIO_Y_REG                 0x01b4
+#define RADEON_GPIOPAD_EN                   0x01a0
+#define RADEON_GPIOPAD_Y                    0x01a4
+#define RADEON_MDGPIO_MASK                  0x01a8
+#define RADEON_MDGPIO_A                     0x01ac
+#define RADEON_MDGPIO_EN                    0x01b0
+#define RADEON_MDGPIO_Y                     0x01b4
+
 #define RADEON_MEM_ADDR_CONFIG              0x0148
 #define RADEON_MEM_BASE                     0x0f10 /* PCI */
 #define RADEON_MEM_CNTL                     0x0140
@@ -1360,6 +1375,9 @@
 #define RADEON_OVR_CLR                      0x0230
 #define RADEON_OVR_WID_LEFT_RIGHT           0x0234
 #define RADEON_OVR_WID_TOP_BOTTOM           0x0238
+#define RADEON_OVR2_CLR                     0x0330
+#define RADEON_OVR2_WID_LEFT_RIGHT          0x0334
+#define RADEON_OVR2_WID_TOP_BOTTOM          0x0338
 
 /* first capture unit */
 
@@ -2809,6 +2827,7 @@
 #       define R200_TXFORMAT_ST_ROUTE_STQ5	(5 << 24)
 #       define R200_TXFORMAT_ST_ROUTE_MASK	(7 << 24)
 #       define R200_TXFORMAT_ST_ROUTE_SHIFT	24
+#       define R200_TXFORMAT_LOOKUP_DISABLE	(1 << 27)
 #       define R200_TXFORMAT_ALPHA_MASK_ENABLE	(1 << 28)
 #       define R200_TXFORMAT_CHROMA_KEY_ENABLE	(1 << 29)
 #       define R200_TXFORMAT_CUBIC_MAP_ENABLE		(1 << 30)
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/atombios_crtc.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -241,6 +241,7 @@
 {
 	struct drm_device *dev = crtc->dev;
 	struct radeon_device *rdev = dev->dev_private;
+	struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
 
 	switch (mode) {
 	case DRM_MODE_DPMS_ON:
@@ -248,20 +249,19 @@
 		if (ASIC_IS_DCE3(rdev))
 			atombios_enable_crtc_memreq(crtc, 1);
 		atombios_blank_crtc(crtc, 0);
+		drm_vblank_post_modeset(dev, radeon_crtc->crtc_id);
+		radeon_crtc_load_lut(crtc);
 		break;
 	case DRM_MODE_DPMS_STANDBY:
 	case DRM_MODE_DPMS_SUSPEND:
 	case DRM_MODE_DPMS_OFF:
+		drm_vblank_pre_modeset(dev, radeon_crtc->crtc_id);
 		atombios_blank_crtc(crtc, 1);
 		if (ASIC_IS_DCE3(rdev))
 			atombios_enable_crtc_memreq(crtc, 0);
 		atombios_enable_crtc(crtc, 0);
 		break;
 	}
-
-	if (mode != DRM_MODE_DPMS_OFF) {
-		radeon_crtc_load_lut(crtc);
-	}
 }
 
 static void
@@ -307,7 +307,6 @@
 	args.susModeMiscInfo.usAccess = cpu_to_le16(misc);
 	args.ucCRTC = radeon_crtc->crtc_id;
 
-	printk("executing set crtc dtd timing\n");
 	atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
 }
 
@@ -347,7 +346,6 @@
 	args.susModeMiscInfo.usAccess = cpu_to_le16(misc);
 	args.ucCRTC = radeon_crtc->crtc_id;
 
-	printk("executing set crtc timing\n");
 	atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
 }
 
@@ -409,60 +407,75 @@
 	}
 }
 
-void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
+union adjust_pixel_clock {
+	ADJUST_DISPLAY_PLL_PS_ALLOCATION v1;
+};
+
+static u32 atombios_adjust_pll(struct drm_crtc *crtc,
+			       struct drm_display_mode *mode,
+			       struct radeon_pll *pll)
 {
-	struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
 	struct drm_device *dev = crtc->dev;
 	struct radeon_device *rdev = dev->dev_private;
 	struct drm_encoder *encoder = NULL;
 	struct radeon_encoder *radeon_encoder = NULL;
-	uint8_t frev, crev;
-	int index;
-	SET_PIXEL_CLOCK_PS_ALLOCATION args;
-	PIXEL_CLOCK_PARAMETERS *spc1_ptr;
-	PIXEL_CLOCK_PARAMETERS_V2 *spc2_ptr;
-	PIXEL_CLOCK_PARAMETERS_V3 *spc3_ptr;
-	uint32_t pll_clock = mode->clock;
-	uint32_t adjusted_clock;
-	uint32_t ref_div = 0, fb_div = 0, frac_fb_div = 0, post_div = 0;
-	struct radeon_pll *pll;
-	int pll_flags = 0;
+	u32 adjusted_clock = mode->clock;
 
-	memset(&args, 0, sizeof(args));
+	/* reset the pll flags */
+	pll->flags = 0;
+
+	/* select the PLL algo */
+	if (ASIC_IS_AVIVO(rdev)) {
+		if (radeon_new_pll == 0)
+			pll->algo = PLL_ALGO_LEGACY;
+		else
+			pll->algo = PLL_ALGO_NEW;
+	} else {
+		if (radeon_new_pll == 1)
+			pll->algo = PLL_ALGO_NEW;
+		else
+			pll->algo = PLL_ALGO_LEGACY;
+	}
 
 	if (ASIC_IS_AVIVO(rdev)) {
 		if ((rdev->family == CHIP_RS600) ||
 		    (rdev->family == CHIP_RS690) ||
 		    (rdev->family == CHIP_RS740))
-			pll_flags |= (RADEON_PLL_USE_FRAC_FB_DIV |
-				      RADEON_PLL_PREFER_CLOSEST_LOWER);
+			pll->flags |= (RADEON_PLL_USE_FRAC_FB_DIV |
+				       RADEON_PLL_PREFER_CLOSEST_LOWER);
 
 		if (ASIC_IS_DCE32(rdev) && mode->clock > 200000)	/* range limits??? */
-			pll_flags |= RADEON_PLL_PREFER_HIGH_FB_DIV;
+			pll->flags |= RADEON_PLL_PREFER_HIGH_FB_DIV;
 		else
-			pll_flags |= RADEON_PLL_PREFER_LOW_REF_DIV;
+			pll->flags |= RADEON_PLL_PREFER_LOW_REF_DIV;
 	} else {
-		pll_flags |= RADEON_PLL_LEGACY;
+		pll->flags |= RADEON_PLL_LEGACY;
 
 		if (mode->clock > 200000)	/* range limits??? */
-			pll_flags |= RADEON_PLL_PREFER_HIGH_FB_DIV;
+			pll->flags |= RADEON_PLL_PREFER_HIGH_FB_DIV;
 		else
-			pll_flags |= RADEON_PLL_PREFER_LOW_REF_DIV;
+			pll->flags |= RADEON_PLL_PREFER_LOW_REF_DIV;
 
 	}
 
 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
 		if (encoder->crtc == crtc) {
-			if (!ASIC_IS_AVIVO(rdev)) {
-				if (encoder->encoder_type !=
-				    DRM_MODE_ENCODER_DAC)
-					pll_flags |= RADEON_PLL_NO_ODD_POST_DIV;
-				if (!ASIC_IS_AVIVO(rdev)
-				    && (encoder->encoder_type ==
-					DRM_MODE_ENCODER_LVDS))
-					pll_flags |= RADEON_PLL_USE_REF_DIV;
-			}
 			radeon_encoder = to_radeon_encoder(encoder);
+			if (ASIC_IS_AVIVO(rdev)) {
+				/* DVO wants 2x pixel clock if the DVO chip is in 12 bit mode */
+				if (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1)
+					adjusted_clock = mode->clock * 2;
+				/* LVDS PLL quirks */
+				if (encoder->encoder_type == DRM_MODE_ENCODER_LVDS) {
+					struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
+					pll->algo = dig->pll_algo;
+				}
+			} else {
+				if (encoder->encoder_type != DRM_MODE_ENCODER_DAC)
+					pll->flags |= RADEON_PLL_NO_ODD_POST_DIV;
+				if (encoder->encoder_type == DRM_MODE_ENCODER_LVDS)
+					pll->flags |= RADEON_PLL_USE_REF_DIV;
+			}
 			break;
 		}
 	}
@@ -472,36 +485,91 @@
 	 * special hw requirements.
 	 */
 	if (ASIC_IS_DCE3(rdev)) {
-		ADJUST_DISPLAY_PLL_PS_ALLOCATION adjust_pll_args;
+		union adjust_pixel_clock args;
+		struct radeon_encoder_atom_dig *dig;
+		u8 frev, crev;
+		int index;
+
+		if (!radeon_encoder->enc_priv)
+			return adjusted_clock;
+		dig = radeon_encoder->enc_priv;
 
-		if (!encoder)
-			return;
+		index = GetIndexIntoMasterTable(COMMAND, AdjustDisplayPll);
+		atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev,
+				      &crev);
 
-		memset(&adjust_pll_args, 0, sizeof(adjust_pll_args));
-		adjust_pll_args.usPixelClock = cpu_to_le16(mode->clock / 10);
-		adjust_pll_args.ucTransmitterID = radeon_encoder->encoder_id;
-		adjust_pll_args.ucEncodeMode = atombios_get_encoder_mode(encoder);
+		memset(&args, 0, sizeof(args));
 
-		index = GetIndexIntoMasterTable(COMMAND, AdjustDisplayPll);
-		atom_execute_table(rdev->mode_info.atom_context,
-				   index, (uint32_t *)&adjust_pll_args);
-		adjusted_clock = le16_to_cpu(adjust_pll_args.usPixelClock) * 10;
-	} else {
-		/* DVO wants 2x pixel clock if the DVO chip is in 12 bit mode */
-		if (ASIC_IS_AVIVO(rdev) &&
-		    (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1))
-			adjusted_clock = mode->clock * 2;
-		else
-			adjusted_clock = mode->clock;
+		switch (frev) {
+		case 1:
+			switch (crev) {
+			case 1:
+			case 2:
+				args.v1.usPixelClock = cpu_to_le16(mode->clock / 10);
+				args.v1.ucTransmitterID = radeon_encoder->encoder_id;
+				args.v1.ucEncodeMode = atombios_get_encoder_mode(encoder);
+
+				atom_execute_table(rdev->mode_info.atom_context,
+						   index, (uint32_t *)&args);
+				adjusted_clock = le16_to_cpu(args.v1.usPixelClock) * 10;
+				break;
+			default:
+				DRM_ERROR("Unknown table version %d %d\n", frev, crev);
+				return adjusted_clock;
+			}
+			break;
+		default:
+			DRM_ERROR("Unknown table version %d %d\n", frev, crev);
+			return adjusted_clock;
+		}
+	}
+	return adjusted_clock;
+}
+
+union set_pixel_clock {
+	SET_PIXEL_CLOCK_PS_ALLOCATION base;
+	PIXEL_CLOCK_PARAMETERS v1;
+	PIXEL_CLOCK_PARAMETERS_V2 v2;
+	PIXEL_CLOCK_PARAMETERS_V3 v3;
+};
+
+void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
+{
+	struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
+	struct drm_device *dev = crtc->dev;
+	struct radeon_device *rdev = dev->dev_private;
+	struct drm_encoder *encoder = NULL;
+	struct radeon_encoder *radeon_encoder = NULL;
+	u8 frev, crev;
+	int index;
+	union set_pixel_clock args;
+	u32 pll_clock = mode->clock;
+	u32 ref_div = 0, fb_div = 0, frac_fb_div = 0, post_div = 0;
+	struct radeon_pll *pll;
+	u32 adjusted_clock;
+
+	memset(&args, 0, sizeof(args));
+
+	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
+		if (encoder->crtc == crtc) {
+			radeon_encoder = to_radeon_encoder(encoder);
+			break;
+		}
 	}
 
+	if (!radeon_encoder)
+		return;
+
 	if (radeon_crtc->crtc_id == 0)
 		pll = &rdev->clock.p1pll;
 	else
 		pll = &rdev->clock.p2pll;
 
+	/* adjust pixel clock as needed */
+	adjusted_clock = atombios_adjust_pll(crtc, mode, pll);
+
 	radeon_compute_pll(pll, adjusted_clock, &pll_clock, &fb_div, &frac_fb_div,
-			   &ref_div, &post_div, pll_flags);
+			   &ref_div, &post_div);
 
 	index = GetIndexIntoMasterTable(COMMAND, SetPixelClock);
 	atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev,
@@ -511,45 +579,38 @@
 	case 1:
 		switch (crev) {
 		case 1:
-			spc1_ptr = (PIXEL_CLOCK_PARAMETERS *) & args.sPCLKInput;
-			spc1_ptr->usPixelClock = cpu_to_le16(mode->clock / 10);
-			spc1_ptr->usRefDiv = cpu_to_le16(ref_div);
-			spc1_ptr->usFbDiv = cpu_to_le16(fb_div);
-			spc1_ptr->ucFracFbDiv = frac_fb_div;
-			spc1_ptr->ucPostDiv = post_div;
-			spc1_ptr->ucPpll =
+			args.v1.usPixelClock = cpu_to_le16(mode->clock / 10);
+			args.v1.usRefDiv = cpu_to_le16(ref_div);
+			args.v1.usFbDiv = cpu_to_le16(fb_div);
+			args.v1.ucFracFbDiv = frac_fb_div;
+			args.v1.ucPostDiv = post_div;
+			args.v1.ucPpll =
 			    radeon_crtc->crtc_id ? ATOM_PPLL2 : ATOM_PPLL1;
-			spc1_ptr->ucCRTC = radeon_crtc->crtc_id;
-			spc1_ptr->ucRefDivSrc = 1;
+			args.v1.ucCRTC = radeon_crtc->crtc_id;
+			args.v1.ucRefDivSrc = 1;
 			break;
 		case 2:
-			spc2_ptr =
-			    (PIXEL_CLOCK_PARAMETERS_V2 *) & args.sPCLKInput;
-			spc2_ptr->usPixelClock = cpu_to_le16(mode->clock / 10);
-			spc2_ptr->usRefDiv = cpu_to_le16(ref_div);
-			spc2_ptr->usFbDiv = cpu_to_le16(fb_div);
-			spc2_ptr->ucFracFbDiv = frac_fb_div;
-			spc2_ptr->ucPostDiv = post_div;
-			spc2_ptr->ucPpll =
+			args.v2.usPixelClock = cpu_to_le16(mode->clock / 10);
+			args.v2.usRefDiv = cpu_to_le16(ref_div);
+			args.v2.usFbDiv = cpu_to_le16(fb_div);
+			args.v2.ucFracFbDiv = frac_fb_div;
+			args.v2.ucPostDiv = post_div;
+			args.v2.ucPpll =
 			    radeon_crtc->crtc_id ? ATOM_PPLL2 : ATOM_PPLL1;
-			spc2_ptr->ucCRTC = radeon_crtc->crtc_id;
-			spc2_ptr->ucRefDivSrc = 1;
+			args.v2.ucCRTC = radeon_crtc->crtc_id;
+			args.v2.ucRefDivSrc = 1;
 			break;
 		case 3:
-			if (!encoder)
-				return;
-			spc3_ptr =
-			    (PIXEL_CLOCK_PARAMETERS_V3 *) & args.sPCLKInput;
-			spc3_ptr->usPixelClock = cpu_to_le16(mode->clock / 10);
-			spc3_ptr->usRefDiv = cpu_to_le16(ref_div);
-			spc3_ptr->usFbDiv = cpu_to_le16(fb_div);
-			spc3_ptr->ucFracFbDiv = frac_fb_div;
-			spc3_ptr->ucPostDiv = post_div;
-			spc3_ptr->ucPpll =
+			args.v3.usPixelClock = cpu_to_le16(mode->clock / 10);
+			args.v3.usRefDiv = cpu_to_le16(ref_div);
+			args.v3.usFbDiv = cpu_to_le16(fb_div);
+			args.v3.ucFracFbDiv = frac_fb_div;
+			args.v3.ucPostDiv = post_div;
+			args.v3.ucPpll =
 			    radeon_crtc->crtc_id ? ATOM_PPLL2 : ATOM_PPLL1;
-			spc3_ptr->ucMiscInfo = (radeon_crtc->crtc_id << 2);
-			spc3_ptr->ucTransmitterId = radeon_encoder->encoder_id;
-			spc3_ptr->ucEncoderMode =
+			args.v3.ucMiscInfo = (radeon_crtc->crtc_id << 2);
+			args.v3.ucTransmitterId = radeon_encoder->encoder_id;
+			args.v3.ucEncoderMode =
 			    atombios_get_encoder_mode(encoder);
 			break;
 		default:
@@ -562,33 +623,43 @@
 		return;
 	}
 
-	printk("executing set pll\n");
 	atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
 }
 
-int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
-			   struct drm_framebuffer *old_fb)
+static int avivo_crtc_set_base(struct drm_crtc *crtc, int x, int y,
+			       struct drm_framebuffer *old_fb)
 {
 	struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
 	struct drm_device *dev = crtc->dev;
 	struct radeon_device *rdev = dev->dev_private;
 	struct radeon_framebuffer *radeon_fb;
 	struct drm_gem_object *obj;
-	struct drm_radeon_gem_object *obj_priv;
+	struct radeon_bo *rbo;
 	uint64_t fb_location;
 	uint32_t fb_format, fb_pitch_pixels, tiling_flags;
+	int r;
 
-	if (!crtc->fb)
-		return -EINVAL;
+	/* no fb bound */
+	if (!crtc->fb) {
+		DRM_DEBUG("No FB bound\n");
+		return 0;
+	}
 
 	radeon_fb = to_radeon_framebuffer(crtc->fb);
 
+	/* Pin framebuffer & get tilling informations */
 	obj = radeon_fb->obj;
-	obj_priv = obj->driver_private;
-
-	if (radeon_gem_object_pin(obj, RADEON_GEM_DOMAIN_VRAM, &fb_location)) {
+	rbo = obj->driver_private;
+	r = radeon_bo_reserve(rbo, false);
+	if (unlikely(r != 0))
+		return r;
+	r = radeon_bo_pin(rbo, RADEON_GEM_DOMAIN_VRAM, &fb_location);
+	if (unlikely(r != 0)) {
+		radeon_bo_unreserve(rbo);
 		return -EINVAL;
 	}
+	radeon_bo_get_tiling_flags(rbo, &tiling_flags, NULL);
+	radeon_bo_unreserve(rbo);
 
 	switch (crtc->fb->bits_per_pixel) {
 	case 8:
@@ -618,8 +689,6 @@
 		return -EINVAL;
 	}
 
-	radeon_object_get_tiling_flags(obj->driver_private,
-				       &tiling_flags, NULL);
 	if (tiling_flags & RADEON_TILING_MACRO)
 		fb_format |= AVIVO_D1GRPH_MACRO_ADDRESS_MODE;
 
@@ -674,7 +743,12 @@
 
 	if (old_fb && old_fb != crtc->fb) {
 		radeon_fb = to_radeon_framebuffer(old_fb);
-		radeon_gem_object_unpin(radeon_fb->obj);
+		rbo = radeon_fb->obj->driver_private;
+		r = radeon_bo_reserve(rbo, false);
+		if (unlikely(r != 0))
+			return r;
+		radeon_bo_unpin(rbo);
+		radeon_bo_unreserve(rbo);
 	}
 
 	/* Bytes per pixel may have changed */
@@ -683,6 +757,42 @@
 	return 0;
 }
 
+int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
+			   struct drm_framebuffer *old_fb)
+{
+	struct drm_device *dev = crtc->dev;
+	struct radeon_device *rdev = dev->dev_private;
+
+	if (ASIC_IS_AVIVO(rdev))
+		return avivo_crtc_set_base(crtc, x, y, old_fb);
+	else
+		return radeon_crtc_set_base(crtc, x, y, old_fb);
+}
+
+/* properly set additional regs when using atombios */
+static void radeon_legacy_atom_fixup(struct drm_crtc *crtc)
+{
+	struct drm_device *dev = crtc->dev;
+	struct radeon_device *rdev = dev->dev_private;
+	struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
+	u32 disp_merge_cntl;
+
+	switch (radeon_crtc->crtc_id) {
+	case 0:
+		disp_merge_cntl = RREG32(RADEON_DISP_MERGE_CNTL);
+		disp_merge_cntl &= ~RADEON_DISP_RGB_OFFSET_EN;
+		WREG32(RADEON_DISP_MERGE_CNTL, disp_merge_cntl);
+		break;
+	case 1:
+		disp_merge_cntl = RREG32(RADEON_DISP2_MERGE_CNTL);
+		disp_merge_cntl &= ~RADEON_DISP2_RGB_OFFSET_EN;
+		WREG32(RADEON_DISP2_MERGE_CNTL, disp_merge_cntl);
+		WREG32(RADEON_FP_H2_SYNC_STRT_WID,   RREG32(RADEON_CRTC2_H_SYNC_STRT_WID));
+		WREG32(RADEON_FP_V2_SYNC_STRT_WID,   RREG32(RADEON_CRTC2_V_SYNC_STRT_WID));
+		break;
+	}
+}
+
 int atombios_crtc_mode_set(struct drm_crtc *crtc,
 			   struct drm_display_mode *mode,
 			   struct drm_display_mode *adjusted_mode,
@@ -704,8 +814,8 @@
 	else {
 		if (radeon_crtc->crtc_id == 0)
 			atombios_set_crtc_dtd_timing(crtc, adjusted_mode);
-		radeon_crtc_set_base(crtc, x, y, old_fb);
-		radeon_legacy_atom_set_surface(crtc);
+		atombios_crtc_set_base(crtc, x, y, old_fb);
+		radeon_legacy_atom_fixup(crtc);
 	}
 	atombios_overscan_setup(crtc, mode, adjusted_mode);
 	atombios_scaler_setup(crtc);
@@ -723,8 +833,8 @@
 
 static void atombios_crtc_prepare(struct drm_crtc *crtc)
 {
-	atombios_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
 	atombios_lock_crtc(crtc, 1);
+	atombios_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
 }
 
 static void atombios_crtc_commit(struct drm_crtc *crtc)
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_state.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_state.c
@@ -101,6 +101,7 @@
 			DRM_ERROR("Invalid depth buffer offset\n");
 			return -EINVAL;
 		}
+		dev_priv->have_z_offset = 1;
 		break;
 
 	case RADEON_EMIT_PP_CNTL:
@@ -876,6 +877,12 @@
 		if (tmp & RADEON_BACK)
 			flags |= RADEON_FRONT;
 	}
+	if (flags & (RADEON_DEPTH|RADEON_STENCIL)) {
+		if (!dev_priv->have_z_offset) {
+			printk_once(KERN_ERR "radeon: illegal depth clear request. Buggy mesa detected - please update.\n");
+			flags &= ~(RADEON_DEPTH | RADEON_STENCIL);
+		}
+	}
 
 	if (flags & (RADEON_FRONT | RADEON_BACK)) {
 
@@ -1950,7 +1957,7 @@
  * Note that refcount can be at most 2, since during a free refcount=3
  * might mean we have to allocate a new surface which might not always
  * be available.
- * For example : we allocate three contigous surfaces ABC. If B is
+ * For example : we allocate three contiguous surfaces ABC. If B is
  * freed, we suddenly need two surfaces to store A and C, which might
  * not always be available.
  */
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_combios.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_combios.c
@@ -50,7 +50,8 @@
 			    uint32_t supported_device,
 			    int connector_type,
 			    struct radeon_i2c_bus_rec *i2c_bus,
-			    uint16_t connector_object_id);
+			    uint16_t connector_object_id,
+			    struct radeon_hpd *hpd);
 
 /* from radeon_legacy_encoder.c */
 extern void
@@ -442,39 +443,71 @@
 
 }
 
-struct radeon_i2c_bus_rec combios_setup_i2c_bus(int ddc_line)
+static struct radeon_i2c_bus_rec combios_setup_i2c_bus(struct radeon_device *rdev,
+						       int ddc_line)
 {
 	struct radeon_i2c_bus_rec i2c;
 
-	i2c.mask_clk_mask = RADEON_GPIO_EN_1;
-	i2c.mask_data_mask = RADEON_GPIO_EN_0;
-	i2c.a_clk_mask = RADEON_GPIO_A_1;
-	i2c.a_data_mask = RADEON_GPIO_A_0;
-	i2c.put_clk_mask = RADEON_GPIO_EN_1;
-	i2c.put_data_mask = RADEON_GPIO_EN_0;
-	i2c.get_clk_mask = RADEON_GPIO_Y_1;
-	i2c.get_data_mask = RADEON_GPIO_Y_0;
-	if ((ddc_line == RADEON_LCD_GPIO_MASK) ||
-	    (ddc_line == RADEON_MDGPIO_EN_REG)) {
-		i2c.mask_clk_reg = ddc_line;
-		i2c.mask_data_reg = ddc_line;
-		i2c.a_clk_reg = ddc_line;
-		i2c.a_data_reg = ddc_line;
-		i2c.put_clk_reg = ddc_line;
-		i2c.put_data_reg = ddc_line;
-		i2c.get_clk_reg = ddc_line + 4;
-		i2c.get_data_reg = ddc_line + 4;
+	if (ddc_line == RADEON_GPIOPAD_MASK) {
+		i2c.mask_clk_reg = RADEON_GPIOPAD_MASK;
+		i2c.mask_data_reg = RADEON_GPIOPAD_MASK;
+		i2c.a_clk_reg = RADEON_GPIOPAD_A;
+		i2c.a_data_reg = RADEON_GPIOPAD_A;
+		i2c.en_clk_reg = RADEON_GPIOPAD_EN;
+		i2c.en_data_reg = RADEON_GPIOPAD_EN;
+		i2c.y_clk_reg = RADEON_GPIOPAD_Y;
+		i2c.y_data_reg = RADEON_GPIOPAD_Y;
+	} else if (ddc_line == RADEON_MDGPIO_MASK) {
+		i2c.mask_clk_reg = RADEON_MDGPIO_MASK;
+		i2c.mask_data_reg = RADEON_MDGPIO_MASK;
+		i2c.a_clk_reg = RADEON_MDGPIO_A;
+		i2c.a_data_reg = RADEON_MDGPIO_A;
+		i2c.en_clk_reg = RADEON_MDGPIO_EN;
+		i2c.en_data_reg = RADEON_MDGPIO_EN;
+		i2c.y_clk_reg = RADEON_MDGPIO_Y;
+		i2c.y_data_reg = RADEON_MDGPIO_Y;
 	} else {
+		i2c.mask_clk_mask = RADEON_GPIO_EN_1;
+		i2c.mask_data_mask = RADEON_GPIO_EN_0;
+		i2c.a_clk_mask = RADEON_GPIO_A_1;
+		i2c.a_data_mask = RADEON_GPIO_A_0;
+		i2c.en_clk_mask = RADEON_GPIO_EN_1;
+		i2c.en_data_mask = RADEON_GPIO_EN_0;
+		i2c.y_clk_mask = RADEON_GPIO_Y_1;
+		i2c.y_data_mask = RADEON_GPIO_Y_0;
+
 		i2c.mask_clk_reg = ddc_line;
 		i2c.mask_data_reg = ddc_line;
 		i2c.a_clk_reg = ddc_line;
 		i2c.a_data_reg = ddc_line;
-		i2c.put_clk_reg = ddc_line;
-		i2c.put_data_reg = ddc_line;
-		i2c.get_clk_reg = ddc_line;
-		i2c.get_data_reg = ddc_line;
+		i2c.en_clk_reg = ddc_line;
+		i2c.en_data_reg = ddc_line;
+		i2c.y_clk_reg = ddc_line;
+		i2c.y_data_reg = ddc_line;
 	}
 
+	if (rdev->family < CHIP_R200)
+		i2c.hw_capable = false;
+	else {
+		switch (ddc_line) {
+		case RADEON_GPIO_VGA_DDC:
+		case RADEON_GPIO_DVI_DDC:
+			i2c.hw_capable = true;
+			break;
+		case RADEON_GPIO_MONID:
+			/* hw i2c on RADEON_GPIO_MONID doesn't seem to work
+			 * reliably on some pre-r4xx hardware; not sure why.
+			 */
+			i2c.hw_capable = false;
+			break;
+		default:
+			i2c.hw_capable = false;
+			break;
+		}
+	}
+	i2c.mm_i2c = false;
+	i2c.i2c_id = 0;
+
 	if (ddc_line)
 		i2c.valid = true;
 	else
@@ -495,7 +528,7 @@
 	uint16_t sclk, mclk;
 
 	if (rdev->bios == NULL)
-		return NULL;
+		return false;
 
 	pll_info = combios_get_table_offset(dev, COMBIOS_PLL_INFO_TABLE);
 	if (pll_info) {
@@ -562,6 +595,52 @@
 	return false;
 }
 
+bool radeon_combios_sideport_present(struct radeon_device *rdev)
+{
+	struct drm_device *dev = rdev->ddev;
+	u16 igp_info;
+
+	/* sideport is AMD only */
+	if (rdev->family == CHIP_RS400)
+		return false;
+
+	igp_info = combios_get_table_offset(dev, COMBIOS_INTEGRATED_SYSTEM_INFO_TABLE);
+
+	if (igp_info) {
+		if (RBIOS16(igp_info + 0x4))
+			return true;
+	}
+	return false;
+}
+
+static const uint32_t default_primarydac_adj[CHIP_LAST] = {
+	0x00000808,		/* r100  */
+	0x00000808,		/* rv100 */
+	0x00000808,		/* rs100 */
+	0x00000808,		/* rv200 */
+	0x00000808,		/* rs200 */
+	0x00000808,		/* r200  */
+	0x00000808,		/* rv250 */
+	0x00000000,		/* rs300 */
+	0x00000808,		/* rv280 */
+	0x00000808,		/* r300  */
+	0x00000808,		/* r350  */
+	0x00000808,		/* rv350 */
+	0x00000808,		/* rv380 */
+	0x00000808,		/* r420  */
+	0x00000808,		/* r423  */
+	0x00000808,		/* rv410 */
+	0x00000000,		/* rs400 */
+	0x00000000,		/* rs480 */
+};
+
+static void radeon_legacy_get_primary_dac_info_from_table(struct radeon_device *rdev,
+							  struct radeon_encoder_primary_dac *p_dac)
+{
+	p_dac->ps2_pdac_adj = default_primarydac_adj[rdev->family];
+	return;
+}
+
 struct radeon_encoder_primary_dac *radeon_combios_get_primary_dac_info(struct
 								       radeon_encoder
 								       *encoder)
@@ -571,20 +650,20 @@
 	uint16_t dac_info;
 	uint8_t rev, bg, dac;
 	struct radeon_encoder_primary_dac *p_dac = NULL;
+	int found = 0;
 
-	if (rdev->bios == NULL)
+	p_dac = kzalloc(sizeof(struct radeon_encoder_primary_dac),
+			GFP_KERNEL);
+
+	if (!p_dac)
 		return NULL;
 
+	if (rdev->bios == NULL)
+		goto out;
+
 	/* check CRT table */
 	dac_info = combios_get_table_offset(dev, COMBIOS_CRT_INFO_TABLE);
 	if (dac_info) {
-		p_dac =
-		    kzalloc(sizeof(struct radeon_encoder_primary_dac),
-			    GFP_KERNEL);
-
-		if (!p_dac)
-			return NULL;
-
 		rev = RBIOS8(dac_info) & 0x3;
 		if (rev < 2) {
 			bg = RBIOS8(dac_info + 0x2) & 0xf;
@@ -595,20 +674,28 @@
 			dac = RBIOS8(dac_info + 0x3) & 0xf;
 			p_dac->ps2_pdac_adj = (bg << 8) | (dac);
 		}
-
+		/* if the values are all zeros, use the table */
+		if (p_dac->ps2_pdac_adj)
+			found = 1;
 	}
 
+out:
+	if (!found) /* fallback to defaults */
+		radeon_legacy_get_primary_dac_info_from_table(rdev, p_dac);
+
 	return p_dac;
 }
 
-static enum radeon_tv_std
-radeon_combios_get_tv_info(struct radeon_encoder *encoder)
+enum radeon_tv_std
+radeon_combios_get_tv_info(struct radeon_device *rdev)
 {
-	struct drm_device *dev = encoder->base.dev;
-	struct radeon_device *rdev = dev->dev_private;
+	struct drm_device *dev = rdev->ddev;
 	uint16_t tv_info;
 	enum radeon_tv_std tv_std = TV_STD_NTSC;
 
+	if (rdev->bios == NULL)
+		return tv_std;
+
 	tv_info = combios_get_table_offset(dev, COMBIOS_TV_INFO_TABLE);
 	if (tv_info) {
 		if (RBIOS8(tv_info + 6) == 'T') {
@@ -731,7 +818,9 @@
 			bg = RBIOS8(dac_info + 0x10) & 0xf;
 			dac = RBIOS8(dac_info + 0x11) & 0xf;
 			tv_dac->ntsc_tvdac_adj = (bg << 16) | (dac << 20);
-			found = 1;
+			/* if the values are all zeros, use the table */
+			if (tv_dac->ps2_tvdac_adj)
+				found = 1;
 		} else if (rev > 1) {
 			bg = RBIOS8(dac_info + 0xc) & 0xf;
 			dac = (RBIOS8(dac_info + 0xc) >> 4) & 0xf;
@@ -744,9 +833,11 @@
 			bg = RBIOS8(dac_info + 0xe) & 0xf;
 			dac = (RBIOS8(dac_info + 0xe) >> 4) & 0xf;
 			tv_dac->ntsc_tvdac_adj = (bg << 16) | (dac << 20);
-			found = 1;
+			/* if the values are all zeros, use the table */
+			if (tv_dac->ps2_tvdac_adj)
+				found = 1;
 		}
-		tv_dac->tv_std = radeon_combios_get_tv_info(encoder);
+		tv_dac->tv_std = radeon_combios_get_tv_info(rdev);
 	}
 	if (!found) {
 		/* then check CRT table */
@@ -761,7 +852,9 @@
 				    (bg << 16) | (dac << 20);
 				tv_dac->pal_tvdac_adj = tv_dac->ps2_tvdac_adj;
 				tv_dac->ntsc_tvdac_adj = tv_dac->ps2_tvdac_adj;
-				found = 1;
+				/* if the values are all zeros, use the table */
+				if (tv_dac->ps2_tvdac_adj)
+					found = 1;
 			} else {
 				bg = RBIOS8(dac_info + 0x4) & 0xf;
 				dac = RBIOS8(dac_info + 0x5) & 0xf;
@@ -769,7 +862,9 @@
 				    (bg << 16) | (dac << 20);
 				tv_dac->pal_tvdac_adj = tv_dac->ps2_tvdac_adj;
 				tv_dac->ntsc_tvdac_adj = tv_dac->ps2_tvdac_adj;
-				found = 1;
+				/* if the values are all zeros, use the table */
+				if (tv_dac->ps2_tvdac_adj)
+					found = 1;
 			}
 		} else {
 			DRM_INFO("No TV DAC info found in BIOS\n");
@@ -890,8 +985,7 @@
 			 lvds->native_mode.vdisplay);
 
 		lvds->panel_vcc_delay = RBIOS16(lcd_info + 0x2c);
-		if (lvds->panel_vcc_delay > 2000 || lvds->panel_vcc_delay < 0)
-			lvds->panel_vcc_delay = 2000;
+		lvds->panel_vcc_delay = min_t(u16, lvds->panel_vcc_delay, 2000);
 
 		lvds->panel_pwr_delay = RBIOS8(lcd_info + 0x24);
 		lvds->panel_digon_delay = RBIOS16(lcd_info + 0x38) & 0xf;
@@ -993,8 +1087,8 @@
 	{{0xffffffff, 0xb01cb}, {0, 0}, {0, 0}, {0, 0}},	/* CHIP_R420  */
 	{{0xffffffff, 0xb01cb}, {0, 0}, {0, 0}, {0, 0}},	/* CHIP_R423  */
 	{{0xffffffff, 0xb01cb}, {0, 0}, {0, 0}, {0, 0}},	/* CHIP_RV410 */
-	{{15000, 0xb0155}, {0xffffffff, 0xb01cb}, {0, 0}, {0, 0}},	/* CHIP_RS400 */
-	{{15000, 0xb0155}, {0xffffffff, 0xb01cb}, {0, 0}, {0, 0}},	/* CHIP_RS480 */
+	{ {0, 0}, {0, 0}, {0, 0}, {0, 0} },	/* CHIP_RS400 */
+	{ {0, 0}, {0, 0}, {0, 0}, {0, 0} },	/* CHIP_RS480 */
 };
 
 bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder,
@@ -1028,7 +1122,6 @@
 	tmds_info = combios_get_table_offset(dev, COMBIOS_DFP_INFO_TABLE);
 
 	if (tmds_info) {
-
 		ver = RBIOS8(tmds_info);
 		DRM_INFO("DFP table revision: %d\n", ver);
 		if (ver == 3) {
@@ -1063,51 +1156,139 @@
 					  tmds->tmds_pll[i].value);
 			}
 		}
-	} else
+	} else {
 		DRM_INFO("No TMDS info found in BIOS\n");
+		return false;
+	}
 	return true;
 }
 
-struct radeon_encoder_int_tmds *radeon_combios_get_tmds_info(struct radeon_encoder *encoder)
+bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder,
+						struct radeon_encoder_ext_tmds *tmds)
 {
-	struct radeon_encoder_int_tmds *tmds = NULL;
-	bool ret;
-
-	tmds = kzalloc(sizeof(struct radeon_encoder_int_tmds), GFP_KERNEL);
+	struct drm_device *dev = encoder->base.dev;
+	struct radeon_device *rdev = dev->dev_private;
+	struct radeon_i2c_bus_rec i2c_bus;
 
-	if (!tmds)
-		return NULL;
+	/* default for macs */
+	i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID);
+	tmds->i2c_bus = radeon_i2c_create(dev, &i2c_bus, "DVO");
 
-	ret = radeon_legacy_get_tmds_info_from_combios(encoder, tmds);
-	if (ret == false)
-		radeon_legacy_get_tmds_info_from_table(encoder, tmds);
+	/* XXX some macs have duallink chips */
+	switch (rdev->mode_info.connector_table) {
+	case CT_POWERBOOK_EXTERNAL:
+	case CT_MINI_EXTERNAL:
+	default:
+		tmds->dvo_chip = DVO_SIL164;
+		tmds->slave_addr = 0x70 >> 1; /* 7 bit addressing */
+		break;
+	}
 
-	return tmds;
+	return true;
 }
 
-void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder)
+bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder,
+						  struct radeon_encoder_ext_tmds *tmds)
 {
 	struct drm_device *dev = encoder->base.dev;
 	struct radeon_device *rdev = dev->dev_private;
-	uint16_t ext_tmds_info;
-	uint8_t ver;
+	uint16_t offset;
+	uint8_t ver, id, blocks, clk, data;
+	int i;
+	enum radeon_combios_ddc gpio;
+	struct radeon_i2c_bus_rec i2c_bus;
 
 	if (rdev->bios == NULL)
-		return;
+		return false;
 
-	ext_tmds_info =
-	    combios_get_table_offset(dev, COMBIOS_EXT_TMDS_INFO_TABLE);
-	if (ext_tmds_info) {
-		ver = RBIOS8(ext_tmds_info);
-		DRM_INFO("External TMDS Table revision: %d\n", ver);
-		// TODO
+	tmds->i2c_bus = NULL;
+	if (rdev->flags & RADEON_IS_IGP) {
+		offset = combios_get_table_offset(dev, COMBIOS_I2C_INFO_TABLE);
+		if (offset) {
+			ver = RBIOS8(offset);
+			DRM_INFO("GPIO Table revision: %d\n", ver);
+			blocks = RBIOS8(offset + 2);
+			for (i = 0; i < blocks; i++) {
+				id = RBIOS8(offset + 3 + (i * 5) + 0);
+				if (id == 136) {
+					clk = RBIOS8(offset + 3 + (i * 5) + 3);
+					data = RBIOS8(offset + 3 + (i * 5) + 4);
+					i2c_bus.valid = true;
+					i2c_bus.mask_clk_mask = (1 << clk);
+					i2c_bus.mask_data_mask = (1 << data);
+					i2c_bus.a_clk_mask = (1 << clk);
+					i2c_bus.a_data_mask = (1 << data);
+					i2c_bus.en_clk_mask = (1 << clk);
+					i2c_bus.en_data_mask = (1 << data);
+					i2c_bus.y_clk_mask = (1 << clk);
+					i2c_bus.y_data_mask = (1 << data);
+					i2c_bus.mask_clk_reg = RADEON_GPIOPAD_MASK;
+					i2c_bus.mask_data_reg = RADEON_GPIOPAD_MASK;
+					i2c_bus.a_clk_reg = RADEON_GPIOPAD_A;
+					i2c_bus.a_data_reg = RADEON_GPIOPAD_A;
+					i2c_bus.en_clk_reg = RADEON_GPIOPAD_EN;
+					i2c_bus.en_data_reg = RADEON_GPIOPAD_EN;
+					i2c_bus.y_clk_reg = RADEON_GPIOPAD_Y;
+					i2c_bus.y_data_reg = RADEON_GPIOPAD_Y;
+					tmds->i2c_bus = radeon_i2c_create(dev, &i2c_bus, "DVO");
+					tmds->dvo_chip = DVO_SIL164;
+					tmds->slave_addr = 0x70 >> 1; /* 7 bit addressing */
+					break;
+				}
+			}
+		}
+	} else {
+		offset = combios_get_table_offset(dev, COMBIOS_EXT_TMDS_INFO_TABLE);
+		if (offset) {
+			ver = RBIOS8(offset);
+			DRM_INFO("External TMDS Table revision: %d\n", ver);
+			tmds->slave_addr = RBIOS8(offset + 4 + 2);
+			tmds->slave_addr >>= 1; /* 7 bit addressing */
+			gpio = RBIOS8(offset + 4 + 3);
+			switch (gpio) {
+			case DDC_MONID:
+				i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID);
+				tmds->i2c_bus = radeon_i2c_create(dev, &i2c_bus, "DVO");
+				break;
+			case DDC_DVI:
+				i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC);
+				tmds->i2c_bus = radeon_i2c_create(dev, &i2c_bus, "DVO");
+				break;
+			case DDC_VGA:
+				i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC);
+				tmds->i2c_bus = radeon_i2c_create(dev, &i2c_bus, "DVO");
+				break;
+			case DDC_CRT2:
+				/* R3xx+ chips don't have GPIO_CRT2_DDC gpio pad */
+				if (rdev->family >= CHIP_R300)
+					i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID);
+				else
+					i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC);
+				tmds->i2c_bus = radeon_i2c_create(dev, &i2c_bus, "DVO");
+				break;
+			case DDC_LCD: /* MM i2c */
+				DRM_ERROR("MM i2c requires hw i2c engine\n");
+				break;
+			default:
+				DRM_ERROR("Unsupported gpio %d\n", gpio);
+				break;
+			}
+		}
+	}
+
+	if (!tmds->i2c_bus) {
+		DRM_INFO("No valid Ext TMDS info found in BIOS\n");
+		return false;
 	}
+
+	return true;
 }
 
 bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
 {
 	struct radeon_device *rdev = dev->dev_private;
 	struct radeon_i2c_bus_rec ddc_i2c;
+	struct radeon_hpd hpd;
 
 	rdev->mode_info.connector_table = radeon_connector_table;
 	if (rdev->mode_info.connector_table == CT_NONE) {
@@ -1168,7 +1349,8 @@
 		/* these are the most common settings */
 		if (rdev->flags & RADEON_SINGLE_CRTC) {
 			/* VGA - primary dac */
-			ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
+			ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC);
+			hpd.hpd = RADEON_HPD_NONE;
 			radeon_add_legacy_encoder(dev,
 						  radeon_get_encoder_id(dev,
 									ATOM_DEVICE_CRT1_SUPPORT,
@@ -1178,10 +1360,12 @@
 						    ATOM_DEVICE_CRT1_SUPPORT,
 						    DRM_MODE_CONNECTOR_VGA,
 						    &ddc_i2c,
-						    CONNECTOR_OBJECT_ID_VGA);
+						    CONNECTOR_OBJECT_ID_VGA,
+						    &hpd);
 		} else if (rdev->flags & RADEON_IS_MOBILITY) {
 			/* LVDS */
-			ddc_i2c = combios_setup_i2c_bus(RADEON_LCD_GPIO_MASK);
+			ddc_i2c = combios_setup_i2c_bus(rdev, 0);
+			hpd.hpd = RADEON_HPD_NONE;
 			radeon_add_legacy_encoder(dev,
 						  radeon_get_encoder_id(dev,
 									ATOM_DEVICE_LCD1_SUPPORT,
@@ -1191,10 +1375,12 @@
 						    ATOM_DEVICE_LCD1_SUPPORT,
 						    DRM_MODE_CONNECTOR_LVDS,
 						    &ddc_i2c,
-						    CONNECTOR_OBJECT_ID_LVDS);
+						    CONNECTOR_OBJECT_ID_LVDS,
+						    &hpd);
 
 			/* VGA - primary dac */
-			ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
+			ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC);
+			hpd.hpd = RADEON_HPD_NONE;
 			radeon_add_legacy_encoder(dev,
 						  radeon_get_encoder_id(dev,
 									ATOM_DEVICE_CRT1_SUPPORT,
@@ -1204,10 +1390,12 @@
 						    ATOM_DEVICE_CRT1_SUPPORT,
 						    DRM_MODE_CONNECTOR_VGA,
 						    &ddc_i2c,
-						    CONNECTOR_OBJECT_ID_VGA);
+						    CONNECTOR_OBJECT_ID_VGA,
+						    &hpd);
 		} else {
 			/* DVI-I - tv dac, int tmds */
-			ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC);
+			ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC);
+			hpd.hpd = RADEON_HPD_1;
 			radeon_add_legacy_encoder(dev,
 						  radeon_get_encoder_id(dev,
 									ATOM_DEVICE_DFP1_SUPPORT,
@@ -1223,10 +1411,12 @@
 						    ATOM_DEVICE_CRT2_SUPPORT,
 						    DRM_MODE_CONNECTOR_DVII,
 						    &ddc_i2c,
-						    CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I);
+						    CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I,
+						    &hpd);
 
 			/* VGA - primary dac */
-			ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
+			ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC);
+			hpd.hpd = RADEON_HPD_NONE;
 			radeon_add_legacy_encoder(dev,
 						  radeon_get_encoder_id(dev,
 									ATOM_DEVICE_CRT1_SUPPORT,
@@ -1236,11 +1426,14 @@
 						    ATOM_DEVICE_CRT1_SUPPORT,
 						    DRM_MODE_CONNECTOR_VGA,
 						    &ddc_i2c,
-						    CONNECTOR_OBJECT_ID_VGA);
+						    CONNECTOR_OBJECT_ID_VGA,
+						    &hpd);
 		}
 
 		if (rdev->family != CHIP_R100 && rdev->family != CHIP_R200) {
 			/* TV - tv dac */
+			ddc_i2c.valid = false;
+			hpd.hpd = RADEON_HPD_NONE;
 			radeon_add_legacy_encoder(dev,
 						  radeon_get_encoder_id(dev,
 									ATOM_DEVICE_TV1_SUPPORT,
@@ -1250,14 +1443,16 @@
 						    ATOM_DEVICE_TV1_SUPPORT,
 						    DRM_MODE_CONNECTOR_SVIDEO,
 						    &ddc_i2c,
-						    CONNECTOR_OBJECT_ID_SVIDEO);
+						    CONNECTOR_OBJECT_ID_SVIDEO,
+						    &hpd);
 		}
 		break;
 	case CT_IBOOK:
 		DRM_INFO("Connector Table: %d (ibook)\n",
 			 rdev->mode_info.connector_table);
 		/* LVDS */
-		ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC);
+		ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC);
+		hpd.hpd = RADEON_HPD_NONE;
 		radeon_add_legacy_encoder(dev,
 					  radeon_get_encoder_id(dev,
 								ATOM_DEVICE_LCD1_SUPPORT,
@@ -1265,9 +1460,11 @@
 					  ATOM_DEVICE_LCD1_SUPPORT);
 		radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT,
 					    DRM_MODE_CONNECTOR_LVDS, &ddc_i2c,
-					    CONNECTOR_OBJECT_ID_LVDS);
+					    CONNECTOR_OBJECT_ID_LVDS,
+					    &hpd);
 		/* VGA - TV DAC */
-		ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
+		ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC);
+		hpd.hpd = RADEON_HPD_NONE;
 		radeon_add_legacy_encoder(dev,
 					  radeon_get_encoder_id(dev,
 								ATOM_DEVICE_CRT2_SUPPORT,
@@ -1275,8 +1472,11 @@
 					  ATOM_DEVICE_CRT2_SUPPORT);
 		radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT,
 					    DRM_MODE_CONNECTOR_VGA, &ddc_i2c,
-					    CONNECTOR_OBJECT_ID_VGA);
+					    CONNECTOR_OBJECT_ID_VGA,
+					    &hpd);
 		/* TV - TV DAC */
+		ddc_i2c.valid = false;
+		hpd.hpd = RADEON_HPD_NONE;
 		radeon_add_legacy_encoder(dev,
 					  radeon_get_encoder_id(dev,
 								ATOM_DEVICE_TV1_SUPPORT,
@@ -1285,13 +1485,15 @@
 		radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT,
 					    DRM_MODE_CONNECTOR_SVIDEO,
 					    &ddc_i2c,
-					    CONNECTOR_OBJECT_ID_SVIDEO);
+					    CONNECTOR_OBJECT_ID_SVIDEO,
+					    &hpd);
 		break;
 	case CT_POWERBOOK_EXTERNAL:
 		DRM_INFO("Connector Table: %d (powerbook external tmds)\n",
 			 rdev->mode_info.connector_table);
 		/* LVDS */
-		ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC);
+		ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC);
+		hpd.hpd = RADEON_HPD_NONE;
 		radeon_add_legacy_encoder(dev,
 					  radeon_get_encoder_id(dev,
 								ATOM_DEVICE_LCD1_SUPPORT,
@@ -1299,9 +1501,11 @@
 					  ATOM_DEVICE_LCD1_SUPPORT);
 		radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT,
 					    DRM_MODE_CONNECTOR_LVDS, &ddc_i2c,
-					    CONNECTOR_OBJECT_ID_LVDS);
+					    CONNECTOR_OBJECT_ID_LVDS,
+					    &hpd);
 		/* DVI-I - primary dac, ext tmds */
-		ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
+		ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC);
+		hpd.hpd = RADEON_HPD_2; /* ??? */
 		radeon_add_legacy_encoder(dev,
 					  radeon_get_encoder_id(dev,
 								ATOM_DEVICE_DFP2_SUPPORT,
@@ -1317,8 +1521,11 @@
 					    ATOM_DEVICE_DFP2_SUPPORT |
 					    ATOM_DEVICE_CRT1_SUPPORT,
 					    DRM_MODE_CONNECTOR_DVII, &ddc_i2c,
-					    CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I);
+					    CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I,
+					    &hpd);
 		/* TV - TV DAC */
+		ddc_i2c.valid = false;
+		hpd.hpd = RADEON_HPD_NONE;
 		radeon_add_legacy_encoder(dev,
 					  radeon_get_encoder_id(dev,
 								ATOM_DEVICE_TV1_SUPPORT,
@@ -1327,13 +1534,15 @@
 		radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT,
 					    DRM_MODE_CONNECTOR_SVIDEO,
 					    &ddc_i2c,
-					    CONNECTOR_OBJECT_ID_SVIDEO);
+					    CONNECTOR_OBJECT_ID_SVIDEO,
+					    &hpd);
 		break;
 	case CT_POWERBOOK_INTERNAL:
 		DRM_INFO("Connector Table: %d (powerbook internal tmds)\n",
 			 rdev->mode_info.connector_table);
 		/* LVDS */
-		ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC);
+		ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC);
+		hpd.hpd = RADEON_HPD_NONE;
 		radeon_add_legacy_encoder(dev,
 					  radeon_get_encoder_id(dev,
 								ATOM_DEVICE_LCD1_SUPPORT,
@@ -1341,9 +1550,11 @@
 					  ATOM_DEVICE_LCD1_SUPPORT);
 		radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT,
 					    DRM_MODE_CONNECTOR_LVDS, &ddc_i2c,
-					    CONNECTOR_OBJECT_ID_LVDS);
+					    CONNECTOR_OBJECT_ID_LVDS,
+					    &hpd);
 		/* DVI-I - primary dac, int tmds */
-		ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
+		ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC);
+		hpd.hpd = RADEON_HPD_1; /* ??? */
 		radeon_add_legacy_encoder(dev,
 					  radeon_get_encoder_id(dev,
 								ATOM_DEVICE_DFP1_SUPPORT,
@@ -1358,8 +1569,11 @@
 					    ATOM_DEVICE_DFP1_SUPPORT |
 					    ATOM_DEVICE_CRT1_SUPPORT,
 					    DRM_MODE_CONNECTOR_DVII, &ddc_i2c,
-					    CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I);
+					    CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I,
+					    &hpd);
 		/* TV - TV DAC */
+		ddc_i2c.valid = false;
+		hpd.hpd = RADEON_HPD_NONE;
 		radeon_add_legacy_encoder(dev,
 					  radeon_get_encoder_id(dev,
 								ATOM_DEVICE_TV1_SUPPORT,
@@ -1368,13 +1582,15 @@
 		radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT,
 					    DRM_MODE_CONNECTOR_SVIDEO,
 					    &ddc_i2c,
-					    CONNECTOR_OBJECT_ID_SVIDEO);
+					    CONNECTOR_OBJECT_ID_SVIDEO,
+					    &hpd);
 		break;
 	case CT_POWERBOOK_VGA:
 		DRM_INFO("Connector Table: %d (powerbook vga)\n",
 			 rdev->mode_info.connector_table);
 		/* LVDS */
-		ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC);
+		ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC);
+		hpd.hpd = RADEON_HPD_NONE;
 		radeon_add_legacy_encoder(dev,
 					  radeon_get_encoder_id(dev,
 								ATOM_DEVICE_LCD1_SUPPORT,
@@ -1382,9 +1598,11 @@
 					  ATOM_DEVICE_LCD1_SUPPORT);
 		radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT,
 					    DRM_MODE_CONNECTOR_LVDS, &ddc_i2c,
-					    CONNECTOR_OBJECT_ID_LVDS);
+					    CONNECTOR_OBJECT_ID_LVDS,
+					    &hpd);
 		/* VGA - primary dac */
-		ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
+		ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC);
+		hpd.hpd = RADEON_HPD_NONE;
 		radeon_add_legacy_encoder(dev,
 					  radeon_get_encoder_id(dev,
 								ATOM_DEVICE_CRT1_SUPPORT,
@@ -1392,8 +1610,11 @@
 					  ATOM_DEVICE_CRT1_SUPPORT);
 		radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT1_SUPPORT,
 					    DRM_MODE_CONNECTOR_VGA, &ddc_i2c,
-					    CONNECTOR_OBJECT_ID_VGA);
+					    CONNECTOR_OBJECT_ID_VGA,
+					    &hpd);
 		/* TV - TV DAC */
+		ddc_i2c.valid = false;
+		hpd.hpd = RADEON_HPD_NONE;
 		radeon_add_legacy_encoder(dev,
 					  radeon_get_encoder_id(dev,
 								ATOM_DEVICE_TV1_SUPPORT,
@@ -1402,13 +1623,15 @@
 		radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT,
 					    DRM_MODE_CONNECTOR_SVIDEO,
 					    &ddc_i2c,
-					    CONNECTOR_OBJECT_ID_SVIDEO);
+					    CONNECTOR_OBJECT_ID_SVIDEO,
+					    &hpd);
 		break;
 	case CT_MINI_EXTERNAL:
 		DRM_INFO("Connector Table: %d (mini external tmds)\n",
 			 rdev->mode_info.connector_table);
 		/* DVI-I - tv dac, ext tmds */
-		ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_CRT2_DDC);
+		ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC);
+		hpd.hpd = RADEON_HPD_2; /* ??? */
 		radeon_add_legacy_encoder(dev,
 					  radeon_get_encoder_id(dev,
 								ATOM_DEVICE_DFP2_SUPPORT,
@@ -1424,8 +1647,11 @@
 					    ATOM_DEVICE_DFP2_SUPPORT |
 					    ATOM_DEVICE_CRT2_SUPPORT,
 					    DRM_MODE_CONNECTOR_DVII, &ddc_i2c,
-					    CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I);
+					    CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I,
+					    &hpd);
 		/* TV - TV DAC */
+		ddc_i2c.valid = false;
+		hpd.hpd = RADEON_HPD_NONE;
 		radeon_add_legacy_encoder(dev,
 					  radeon_get_encoder_id(dev,
 								ATOM_DEVICE_TV1_SUPPORT,
@@ -1434,13 +1660,15 @@
 		radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_TV1_SUPPORT,
 					    DRM_MODE_CONNECTOR_SVIDEO,
 					    &ddc_i2c,
-					    CONNECTOR_OBJECT_ID_SVIDEO);
+					    CONNECTOR_OBJECT_ID_SVIDEO,
+					    &hpd);
 		break;
 	case CT_MINI_INTERNAL:
 		DRM_INFO("Connector Table: %d (mini internal tmds)\n",
 			 rdev->mode_info.connector_table);
 		/* DVI-I - tv dac, int tmds */
-		ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_CRT2_DDC);
+		ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC);
+		hpd.hpd = RADEON_HPD_1; /* ??? */
 		radeon_add_legacy_encoder(dev,
 					  radeon_get_encoder_id(dev,
 								ATOM_DEVICE_DFP1_SUPPORT,
@@ -1455,8 +1683,11 @@
 					    ATOM_DEVICE_DFP1_SUPPORT |
 					    ATOM_DEVICE_CRT2_SUPPORT,
 					    DRM_MODE_CONNECTOR_DVII, &ddc_i2c,
-					    CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I);
+					    CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I,
+					    &hpd);
 		/* TV - TV DAC */
+		ddc_i2c.valid = false;
+		hpd.hpd = RADEON_HPD_NONE;
 		radeon_add_legacy_encoder(dev,
 					  radeon_get_encoder_id(dev,
 								ATOM_DEVICE_TV1_SUPPORT,
@@ -1465,13 +1696,15 @@
 		radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_TV1_SUPPORT,
 					    DRM_MODE_CONNECTOR_SVIDEO,
 					    &ddc_i2c,
-					    CONNECTOR_OBJECT_ID_SVIDEO);
+					    CONNECTOR_OBJECT_ID_SVIDEO,
+					    &hpd);
 		break;
 	case CT_IMAC_G5_ISIGHT:
 		DRM_INFO("Connector Table: %d (imac g5 isight)\n",
 			 rdev->mode_info.connector_table);
 		/* DVI-D - int tmds */
-		ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_MONID);
+		ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID);
+		hpd.hpd = RADEON_HPD_1; /* ??? */
 		radeon_add_legacy_encoder(dev,
 					  radeon_get_encoder_id(dev,
 								ATOM_DEVICE_DFP1_SUPPORT,
@@ -1479,9 +1712,11 @@
 					  ATOM_DEVICE_DFP1_SUPPORT);
 		radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_DFP1_SUPPORT,
 					    DRM_MODE_CONNECTOR_DVID, &ddc_i2c,
-					    CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D);
+					    CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D,
+					    &hpd);
 		/* VGA - tv dac */
-		ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC);
+		ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC);
+		hpd.hpd = RADEON_HPD_NONE;
 		radeon_add_legacy_encoder(dev,
 					  radeon_get_encoder_id(dev,
 								ATOM_DEVICE_CRT2_SUPPORT,
@@ -1489,8 +1724,11 @@
 					  ATOM_DEVICE_CRT2_SUPPORT);
 		radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT,
 					    DRM_MODE_CONNECTOR_VGA, &ddc_i2c,
-					    CONNECTOR_OBJECT_ID_VGA);
+					    CONNECTOR_OBJECT_ID_VGA,
+					    &hpd);
 		/* TV - TV DAC */
+		ddc_i2c.valid = false;
+		hpd.hpd = RADEON_HPD_NONE;
 		radeon_add_legacy_encoder(dev,
 					  radeon_get_encoder_id(dev,
 								ATOM_DEVICE_TV1_SUPPORT,
@@ -1499,13 +1737,15 @@
 		radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT,
 					    DRM_MODE_CONNECTOR_SVIDEO,
 					    &ddc_i2c,
-					    CONNECTOR_OBJECT_ID_SVIDEO);
+					    CONNECTOR_OBJECT_ID_SVIDEO,
+					    &hpd);
 		break;
 	case CT_EMAC:
 		DRM_INFO("Connector Table: %d (emac)\n",
 			 rdev->mode_info.connector_table);
 		/* VGA - primary dac */
-		ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
+		ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC);
+		hpd.hpd = RADEON_HPD_NONE;
 		radeon_add_legacy_encoder(dev,
 					  radeon_get_encoder_id(dev,
 								ATOM_DEVICE_CRT1_SUPPORT,
@@ -1513,9 +1753,11 @@
 					  ATOM_DEVICE_CRT1_SUPPORT);
 		radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_CRT1_SUPPORT,
 					    DRM_MODE_CONNECTOR_VGA, &ddc_i2c,
-					    CONNECTOR_OBJECT_ID_VGA);
+					    CONNECTOR_OBJECT_ID_VGA,
+					    &hpd);
 		/* VGA - tv dac */
-		ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_CRT2_DDC);
+		ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC);
+		hpd.hpd = RADEON_HPD_NONE;
 		radeon_add_legacy_encoder(dev,
 					  radeon_get_encoder_id(dev,
 								ATOM_DEVICE_CRT2_SUPPORT,
@@ -1523,8 +1765,11 @@
 					  ATOM_DEVICE_CRT2_SUPPORT);
 		radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT,
 					    DRM_MODE_CONNECTOR_VGA, &ddc_i2c,
-					    CONNECTOR_OBJECT_ID_VGA);
+					    CONNECTOR_OBJECT_ID_VGA,
+					    &hpd);
 		/* TV - TV DAC */
+		ddc_i2c.valid = false;
+		hpd.hpd = RADEON_HPD_NONE;
 		radeon_add_legacy_encoder(dev,
 					  radeon_get_encoder_id(dev,
 								ATOM_DEVICE_TV1_SUPPORT,
@@ -1533,7 +1778,8 @@
 		radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT,
 					    DRM_MODE_CONNECTOR_SVIDEO,
 					    &ddc_i2c,
-					    CONNECTOR_OBJECT_ID_SVIDEO);
+					    CONNECTOR_OBJECT_ID_SVIDEO,
+					    &hpd);
 		break;
 	default:
 		DRM_INFO("Connector table: %d (invalid)\n",
@@ -1550,7 +1796,8 @@
 				       int bios_index,
 				       enum radeon_combios_connector
 				       *legacy_connector,
-				       struct radeon_i2c_bus_rec *ddc_i2c)
+				       struct radeon_i2c_bus_rec *ddc_i2c,
+				       struct radeon_hpd *hpd)
 {
 	struct radeon_device *rdev = dev->dev_private;
 
@@ -1558,29 +1805,26 @@
 	if ((rdev->family == CHIP_RS400 ||
 	     rdev->family == CHIP_RS480) &&
 	    ddc_i2c->mask_clk_reg == RADEON_GPIO_CRT2_DDC)
-		*ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_MONID);
+		*ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID);
 	else if ((rdev->family == CHIP_RS400 ||
 		  rdev->family == CHIP_RS480) &&
 		 ddc_i2c->mask_clk_reg == RADEON_GPIO_MONID) {
-		ddc_i2c->valid = true;
+		*ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIOPAD_MASK);
 		ddc_i2c->mask_clk_mask = (0x20 << 8);
 		ddc_i2c->mask_data_mask = 0x80;
 		ddc_i2c->a_clk_mask = (0x20 << 8);
 		ddc_i2c->a_data_mask = 0x80;
-		ddc_i2c->put_clk_mask = (0x20 << 8);
-		ddc_i2c->put_data_mask = 0x80;
-		ddc_i2c->get_clk_mask = (0x20 << 8);
-		ddc_i2c->get_data_mask = 0x80;
-		ddc_i2c->mask_clk_reg = RADEON_GPIOPAD_MASK;
-		ddc_i2c->mask_data_reg = RADEON_GPIOPAD_MASK;
-		ddc_i2c->a_clk_reg = RADEON_GPIOPAD_A;
-		ddc_i2c->a_data_reg = RADEON_GPIOPAD_A;
-		ddc_i2c->put_clk_reg = RADEON_GPIOPAD_EN;
-		ddc_i2c->put_data_reg = RADEON_GPIOPAD_EN;
-		ddc_i2c->get_clk_reg = RADEON_LCD_GPIO_Y_REG;
-		ddc_i2c->get_data_reg = RADEON_LCD_GPIO_Y_REG;
+		ddc_i2c->en_clk_mask = (0x20 << 8);
+		ddc_i2c->en_data_mask = 0x80;
+		ddc_i2c->y_clk_mask = (0x20 << 8);
+		ddc_i2c->y_data_mask = 0x80;
 	}
 
+	/* R3xx+ chips don't have GPIO_CRT2_DDC gpio pad */
+	if ((rdev->family >= CHIP_R300) &&
+	    ddc_i2c->mask_clk_reg == RADEON_GPIO_CRT2_DDC)
+		*ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC);
+
 	/* Certain IBM chipset RN50s have a BIOS reporting two VGAs,
 	   one with VGA DDC and one with CRT2 DDC. - kill the CRT2 DDC one */
 	if (dev->pdev->device == 0x515e &&
@@ -1624,6 +1868,12 @@
 	    dev->pdev->subsystem_device == 0x280a)
 		return false;
 
+	/* MSI S270 has non-existent TV port */
+	if (dev->pdev->device == 0x5955 &&
+	    dev->pdev->subsystem_vendor == 0x1462 &&
+	    dev->pdev->subsystem_device == 0x0131)
+		return false;
+
 	return true;
 }
 
@@ -1671,6 +1921,7 @@
 	enum radeon_combios_connector connector;
 	int i = 0;
 	struct radeon_i2c_bus_rec ddc_i2c;
+	struct radeon_hpd hpd;
 
 	if (rdev->bios == NULL)
 		return false;
@@ -1691,26 +1942,40 @@
 			switch (ddc_type) {
 			case DDC_MONID:
 				ddc_i2c =
-				    combios_setup_i2c_bus(RADEON_GPIO_MONID);
+					combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID);
 				break;
 			case DDC_DVI:
 				ddc_i2c =
-				    combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC);
+					combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC);
 				break;
 			case DDC_VGA:
 				ddc_i2c =
-				    combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
+					combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC);
 				break;
 			case DDC_CRT2:
 				ddc_i2c =
-				    combios_setup_i2c_bus(RADEON_GPIO_CRT2_DDC);
+					combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC);
 				break;
 			default:
 				break;
 			}
 
+			switch (connector) {
+			case CONNECTOR_PROPRIETARY_LEGACY:
+			case CONNECTOR_DVI_I_LEGACY:
+			case CONNECTOR_DVI_D_LEGACY:
+				if ((tmp >> 4) & 0x1)
+					hpd.hpd = RADEON_HPD_2;
+				else
+					hpd.hpd = RADEON_HPD_1;
+				break;
+			default:
+				hpd.hpd = RADEON_HPD_NONE;
+				break;
+			}
+
 			if (!radeon_apply_legacy_quirks(dev, i, &connector,
-						       &ddc_i2c))
+							&ddc_i2c, &hpd))
 				continue;
 
 			switch (connector) {
@@ -1727,7 +1992,8 @@
 							    legacy_connector_convert
 							    [connector],
 							    &ddc_i2c,
-							    CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D);
+							    CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D,
+							    &hpd);
 				break;
 			case CONNECTOR_CRT_LEGACY:
 				if (tmp & 0x1) {
@@ -1753,7 +2019,8 @@
 							    legacy_connector_convert
 							    [connector],
 							    &ddc_i2c,
-							    CONNECTOR_OBJECT_ID_VGA);
+							    CONNECTOR_OBJECT_ID_VGA,
+							    &hpd);
 				break;
 			case CONNECTOR_DVI_I_LEGACY:
 				devices = 0;
@@ -1799,7 +2066,8 @@
 							    legacy_connector_convert
 							    [connector],
 							    &ddc_i2c,
-							    connector_object_id);
+							    connector_object_id,
+							    &hpd);
 				break;
 			case CONNECTOR_DVI_D_LEGACY:
 				if ((tmp >> 4) & 0x1) {
@@ -1817,7 +2085,8 @@
 							    legacy_connector_convert
 							    [connector],
 							    &ddc_i2c,
-							    connector_object_id);
+							    connector_object_id,
+							    &hpd);
 				break;
 			case CONNECTOR_CTV_LEGACY:
 			case CONNECTOR_STV_LEGACY:
@@ -1832,7 +2101,8 @@
 							    legacy_connector_convert
 							    [connector],
 							    &ddc_i2c,
-							    CONNECTOR_OBJECT_ID_SVIDEO);
+							    CONNECTOR_OBJECT_ID_SVIDEO,
+							    &hpd);
 				break;
 			default:
 				DRM_ERROR("Unknown connector type: %d\n",
@@ -1858,14 +2128,16 @@
 									0),
 						  ATOM_DEVICE_DFP1_SUPPORT);
 
-			ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC);
+			ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC);
+			hpd.hpd = RADEON_HPD_NONE;
 			radeon_add_legacy_connector(dev,
 						    0,
 						    ATOM_DEVICE_CRT1_SUPPORT |
 						    ATOM_DEVICE_DFP1_SUPPORT,
 						    DRM_MODE_CONNECTOR_DVII,
 						    &ddc_i2c,
-						    CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I);
+						    CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I,
+						    &hpd);
 		} else {
 			uint16_t crt_info =
 				combios_get_table_offset(dev, COMBIOS_CRT_INFO_TABLE);
@@ -1876,13 +2148,15 @@
 										ATOM_DEVICE_CRT1_SUPPORT,
 										1),
 							  ATOM_DEVICE_CRT1_SUPPORT);
-				ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
+				ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC);
+				hpd.hpd = RADEON_HPD_NONE;
 				radeon_add_legacy_connector(dev,
 							    0,
 							    ATOM_DEVICE_CRT1_SUPPORT,
 							    DRM_MODE_CONNECTOR_VGA,
 							    &ddc_i2c,
-							    CONNECTOR_OBJECT_ID_VGA);
+							    CONNECTOR_OBJECT_ID_VGA,
+							    &hpd);
 			} else {
 				DRM_DEBUG("No connector info found\n");
 				return false;
@@ -1910,27 +2184,27 @@
 				case DDC_MONID:
 					ddc_i2c =
 					    combios_setup_i2c_bus
-					    (RADEON_GPIO_MONID);
+						(rdev, RADEON_GPIO_MONID);
 					break;
 				case DDC_DVI:
 					ddc_i2c =
 					    combios_setup_i2c_bus
-					    (RADEON_GPIO_DVI_DDC);
+						(rdev, RADEON_GPIO_DVI_DDC);
 					break;
 				case DDC_VGA:
 					ddc_i2c =
 					    combios_setup_i2c_bus
-					    (RADEON_GPIO_VGA_DDC);
+						(rdev, RADEON_GPIO_VGA_DDC);
 					break;
 				case DDC_CRT2:
 					ddc_i2c =
 					    combios_setup_i2c_bus
-					    (RADEON_GPIO_CRT2_DDC);
+						(rdev, RADEON_GPIO_CRT2_DDC);
 					break;
 				case DDC_LCD:
 					ddc_i2c =
 					    combios_setup_i2c_bus
-					    (RADEON_LCD_GPIO_MASK);
+						(rdev, RADEON_GPIOPAD_MASK);
 					ddc_i2c.mask_clk_mask =
 					    RBIOS32(lcd_ddc_info + 3);
 					ddc_i2c.mask_data_mask =
@@ -1939,19 +2213,19 @@
 					    RBIOS32(lcd_ddc_info + 3);
 					ddc_i2c.a_data_mask =
 					    RBIOS32(lcd_ddc_info + 7);
-					ddc_i2c.put_clk_mask =
+					ddc_i2c.en_clk_mask =
 					    RBIOS32(lcd_ddc_info + 3);
-					ddc_i2c.put_data_mask =
+					ddc_i2c.en_data_mask =
 					    RBIOS32(lcd_ddc_info + 7);
-					ddc_i2c.get_clk_mask =
+					ddc_i2c.y_clk_mask =
 					    RBIOS32(lcd_ddc_info + 3);
-					ddc_i2c.get_data_mask =
+					ddc_i2c.y_data_mask =
 					    RBIOS32(lcd_ddc_info + 7);
 					break;
 				case DDC_GPIO:
 					ddc_i2c =
 					    combios_setup_i2c_bus
-					    (RADEON_MDGPIO_EN_REG);
+						(rdev, RADEON_MDGPIO_MASK);
 					ddc_i2c.mask_clk_mask =
 					    RBIOS32(lcd_ddc_info + 3);
 					ddc_i2c.mask_data_mask =
@@ -1960,13 +2234,13 @@
 					    RBIOS32(lcd_ddc_info + 3);
 					ddc_i2c.a_data_mask =
 					    RBIOS32(lcd_ddc_info + 7);
-					ddc_i2c.put_clk_mask =
+					ddc_i2c.en_clk_mask =
 					    RBIOS32(lcd_ddc_info + 3);
-					ddc_i2c.put_data_mask =
+					ddc_i2c.en_data_mask =
 					    RBIOS32(lcd_ddc_info + 7);
-					ddc_i2c.get_clk_mask =
+					ddc_i2c.y_clk_mask =
 					    RBIOS32(lcd_ddc_info + 3);
-					ddc_i2c.get_data_mask =
+					ddc_i2c.y_data_mask =
 					    RBIOS32(lcd_ddc_info + 7);
 					break;
 				default:
@@ -1977,12 +2251,14 @@
 			} else
 				ddc_i2c.valid = false;
 
+			hpd.hpd = RADEON_HPD_NONE;
 			radeon_add_legacy_connector(dev,
 						    5,
 						    ATOM_DEVICE_LCD1_SUPPORT,
 						    DRM_MODE_CONNECTOR_LVDS,
 						    &ddc_i2c,
-						    CONNECTOR_OBJECT_ID_LVDS);
+						    CONNECTOR_OBJECT_ID_LVDS,
+						    &hpd);
 		}
 	}
 
@@ -1993,6 +2269,7 @@
 		if (tv_info) {
 			if (RBIOS8(tv_info + 6) == 'T') {
 				if (radeon_apply_legacy_tv_quirks(dev)) {
+					hpd.hpd = RADEON_HPD_NONE;
 					radeon_add_legacy_encoder(dev,
 								  radeon_get_encoder_id
 								  (dev,
@@ -2003,7 +2280,8 @@
 								    ATOM_DEVICE_TV1_SUPPORT,
 								    DRM_MODE_CONNECTOR_SVIDEO,
 								    &ddc_i2c,
-								    CONNECTOR_OBJECT_ID_SVIDEO);
+								    CONNECTOR_OBJECT_ID_SVIDEO,
+								    &hpd);
 				}
 			}
 		}
@@ -2014,6 +2292,193 @@
 	return true;
 }
 
+void radeon_external_tmds_setup(struct drm_encoder *encoder)
+{
+	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+	struct radeon_encoder_ext_tmds *tmds = radeon_encoder->enc_priv;
+
+	if (!tmds)
+		return;
+
+	switch (tmds->dvo_chip) {
+	case DVO_SIL164:
+		/* sil 164 */
+		radeon_i2c_do_lock(tmds->i2c_bus, 1);
+		radeon_i2c_sw_put_byte(tmds->i2c_bus,
+				       tmds->slave_addr,
+				       0x08, 0x30);
+		radeon_i2c_sw_put_byte(tmds->i2c_bus,
+				       tmds->slave_addr,
+				       0x09, 0x00);
+		radeon_i2c_sw_put_byte(tmds->i2c_bus,
+				       tmds->slave_addr,
+				       0x0a, 0x90);
+		radeon_i2c_sw_put_byte(tmds->i2c_bus,
+				       tmds->slave_addr,
+				       0x0c, 0x89);
+		radeon_i2c_sw_put_byte(tmds->i2c_bus,
+				       tmds->slave_addr,
+				       0x08, 0x3b);
+		radeon_i2c_do_lock(tmds->i2c_bus, 0);
+		break;
+	case DVO_SIL1178:
+		/* sil 1178 - untested */
+		/*
+		 * 0x0f, 0x44
+		 * 0x0f, 0x4c
+		 * 0x0e, 0x01
+		 * 0x0a, 0x80
+		 * 0x09, 0x30
+		 * 0x0c, 0xc9
+		 * 0x0d, 0x70
+		 * 0x08, 0x32
+		 * 0x08, 0x33
+		 */
+		break;
+	default:
+		break;
+	}
+
+}
+
+bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder)
+{
+	struct drm_device *dev = encoder->dev;
+	struct radeon_device *rdev = dev->dev_private;
+	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+	uint16_t offset;
+	uint8_t blocks, slave_addr, rev;
+	uint32_t index, id;
+	uint32_t reg, val, and_mask, or_mask;
+	struct radeon_encoder_ext_tmds *tmds = radeon_encoder->enc_priv;
+
+	if (rdev->bios == NULL)
+		return false;
+
+	if (!tmds)
+		return false;
+
+	if (rdev->flags & RADEON_IS_IGP) {
+		offset = combios_get_table_offset(dev, COMBIOS_TMDS_POWER_ON_TABLE);
+		rev = RBIOS8(offset);
+		if (offset) {
+			rev = RBIOS8(offset);
+			if (rev > 1) {
+				blocks = RBIOS8(offset + 3);
+				index = offset + 4;
+				while (blocks > 0) {
+					id = RBIOS16(index);
+					index += 2;
+					switch (id >> 13) {
+					case 0:
+						reg = (id & 0x1fff) * 4;
+						val = RBIOS32(index);
+						index += 4;
+						WREG32(reg, val);
+						break;
+					case 2:
+						reg = (id & 0x1fff) * 4;
+						and_mask = RBIOS32(index);
+						index += 4;
+						or_mask = RBIOS32(index);
+						index += 4;
+						val = RREG32(reg);
+						val = (val & and_mask) | or_mask;
+						WREG32(reg, val);
+						break;
+					case 3:
+						val = RBIOS16(index);
+						index += 2;
+						udelay(val);
+						break;
+					case 4:
+						val = RBIOS16(index);
+						index += 2;
+						udelay(val * 1000);
+						break;
+					case 6:
+						slave_addr = id & 0xff;
+						slave_addr >>= 1; /* 7 bit addressing */
+						index++;
+						reg = RBIOS8(index);
+						index++;
+						val = RBIOS8(index);
+						index++;
+						radeon_i2c_do_lock(tmds->i2c_bus, 1);
+						radeon_i2c_sw_put_byte(tmds->i2c_bus,
+								       slave_addr,
+								       reg, val);
+						radeon_i2c_do_lock(tmds->i2c_bus, 0);
+						break;
+					default:
+						DRM_ERROR("Unknown id %d\n", id >> 13);
+						break;
+					}
+					blocks--;
+				}
+				return true;
+			}
+		}
+	} else {
+		offset = combios_get_table_offset(dev, COMBIOS_EXT_TMDS_INFO_TABLE);
+		if (offset) {
+			index = offset + 10;
+			id = RBIOS16(index);
+			while (id != 0xffff) {
+				index += 2;
+				switch (id >> 13) {
+				case 0:
+					reg = (id & 0x1fff) * 4;
+					val = RBIOS32(index);
+					WREG32(reg, val);
+					break;
+				case 2:
+					reg = (id & 0x1fff) * 4;
+					and_mask = RBIOS32(index);
+					index += 4;
+					or_mask = RBIOS32(index);
+					index += 4;
+					val = RREG32(reg);
+					val = (val & and_mask) | or_mask;
+					WREG32(reg, val);
+					break;
+				case 4:
+					val = RBIOS16(index);
+					index += 2;
+					udelay(val);
+					break;
+				case 5:
+					reg = id & 0x1fff;
+					and_mask = RBIOS32(index);
+					index += 4;
+					or_mask = RBIOS32(index);
+					index += 4;
+					val = RREG32_PLL(reg);
+					val = (val & and_mask) | or_mask;
+					WREG32_PLL(reg, val);
+					break;
+				case 6:
+					reg = id & 0x1fff;
+					val = RBIOS8(index);
+					index += 1;
+					radeon_i2c_do_lock(tmds->i2c_bus, 1);
+					radeon_i2c_sw_put_byte(tmds->i2c_bus,
+							       tmds->slave_addr,
+							       reg, val);
+					radeon_i2c_do_lock(tmds->i2c_bus, 0);
+					break;
+				default:
+					DRM_ERROR("Unknown id %d\n", id >> 13);
+					break;
+				}
+				id = RBIOS16(index);
+			}
+			return true;
+		}
+	}
+	return false;
+}
+
 static void combios_parse_mmio_table(struct drm_device *dev, uint16_t offset)
 {
 	struct radeon_device *rdev = dev->dev_private;
@@ -2384,6 +2849,22 @@
 		combios_write_ram_size(dev);
 	}
 
+	/* quirk for rs4xx HP nx6125 laptop to make it resume
+	 * - it hangs on resume inside the dynclk 1 table.
+	 */
+	if (rdev->family == CHIP_RS480 &&
+	    rdev->pdev->subsystem_vendor == 0x103c &&
+	    rdev->pdev->subsystem_device == 0x308b)
+		return;
+
+	/* quirk for rs4xx HP dv5000 laptop to make it resume
+	 * - it hangs on resume inside the dynclk 1 table.
+	 */
+	if (rdev->family == CHIP_RS480 &&
+	    rdev->pdev->subsystem_vendor == 0x103c &&
+	    rdev->pdev->subsystem_device == 0x30a4)
+		return;
+
 	/* DYN CLK 1 */
 	table = combios_get_table_offset(dev, COMBIOS_DYN_CLK_1_TABLE);
 	if (table)
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/atom.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/atom.c
@@ -24,6 +24,7 @@
 
 #include <linux/module.h>
 #include <linux/sched.h>
+#include <asm/unaligned.h>
 
 #define ATOM_DEBUG
 
@@ -58,6 +59,7 @@
 } atom_exec_context;
 
 int atom_debug = 0;
+static void atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params);
 void atom_execute_table(struct atom_context *ctx, int index, uint32_t * params);
 
 static uint32_t atom_arg_mask[8] =
@@ -126,7 +128,7 @@
 		case ATOM_IIO_MOVE_INDEX:
 			temp &=
 			    ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
-			      CU8(base + 2));
+			      CU8(base + 3));
 			temp |=
 			    ((index >> CU8(base + 2)) &
 			     (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
@@ -136,7 +138,7 @@
 		case ATOM_IIO_MOVE_DATA:
 			temp &=
 			    ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
-			      CU8(base + 2));
+			      CU8(base + 3));
 			temp |=
 			    ((data >> CU8(base + 2)) &
 			     (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
@@ -146,7 +148,7 @@
 		case ATOM_IIO_MOVE_ATTR:
 			temp &=
 			    ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
-			      CU8(base + 2));
+			      CU8(base + 3));
 			temp |=
 			    ((ctx->
 			      io_attr >> CU8(base + 2)) & (0xFFFFFFFF >> (32 -
@@ -211,7 +213,9 @@
 	case ATOM_ARG_PS:
 		idx = U8(*ptr);
 		(*ptr)++;
-		val = le32_to_cpu(ctx->ps[idx]);
+		/* get_unaligned_le32 avoids unaligned accesses from atombios
+		 * tables, noticed on a DEC Alpha. */
+		val = get_unaligned_le32((u32 *)&ctx->ps[idx]);
 		if (print)
 			DEBUG("PS[0x%02X,0x%04X]", idx, val);
 		break;
@@ -245,6 +249,9 @@
 		case ATOM_WS_ATTRIBUTES:
 			val = gctx->io_attr;
 			break;
+		case ATOM_WS_REGPTR:
+			val = gctx->reg_block;
+			break;
 		default:
 			val = ctx->ws[idx];
 		}
@@ -263,10 +270,10 @@
 	case ATOM_ARG_FB:
 		idx = U8(*ptr);
 		(*ptr)++;
+		val = gctx->scratch[((gctx->fb_base + idx) / 4)];
 		if (print)
 			DEBUG("FB[0x%02X]", idx);
-		printk(KERN_INFO "FB access is not implemented.\n");
-		return 0;
+		break;
 	case ATOM_ARG_IMM:
 		switch (align) {
 		case ATOM_SRC_DWORD:
@@ -384,6 +391,32 @@
 	return atom_get_src_int(ctx, attr, ptr, NULL, 1);
 }
 
+static uint32_t atom_get_src_direct(atom_exec_context *ctx, uint8_t align, int *ptr)
+{
+	uint32_t val = 0xCDCDCDCD;
+
+	switch (align) {
+	case ATOM_SRC_DWORD:
+		val = U32(*ptr);
+		(*ptr) += 4;
+		break;
+	case ATOM_SRC_WORD0:
+	case ATOM_SRC_WORD8:
+	case ATOM_SRC_WORD16:
+		val = U16(*ptr);
+		(*ptr) += 2;
+		break;
+	case ATOM_SRC_BYTE0:
+	case ATOM_SRC_BYTE8:
+	case ATOM_SRC_BYTE16:
+	case ATOM_SRC_BYTE24:
+		val = U8(*ptr);
+		(*ptr)++;
+		break;
+	}
+	return val;
+}
+
 static uint32_t atom_get_dst(atom_exec_context *ctx, int arg, uint8_t attr,
 			     int *ptr, uint32_t *saved, int print)
 {
@@ -481,6 +514,9 @@
 		case ATOM_WS_ATTRIBUTES:
 			gctx->io_attr = val;
 			break;
+		case ATOM_WS_REGPTR:
+			gctx->reg_block = val;
+			break;
 		default:
 			ctx->ws[idx] = val;
 		}
@@ -488,9 +524,9 @@
 	case ATOM_ARG_FB:
 		idx = U8(*ptr);
 		(*ptr)++;
+		gctx->scratch[((gctx->fb_base + idx) / 4)] = val;
 		DEBUG("FB[0x%02X]", idx);
-		printk(KERN_INFO "FB access is not implemented.\n");
-		return;
+		break;
 	case ATOM_ARG_PLL:
 		idx = U8(*ptr);
 		(*ptr)++;
@@ -573,7 +609,7 @@
 	else
 		SDEBUG("   table: %d\n", idx);
 	if (U16(ctx->ctx->cmd_table + 4 + 2 * idx))
-		atom_execute_table(ctx->ctx, idx, ctx->ps + ctx->ps_shift);
+		atom_execute_table_locked(ctx->ctx, idx, ctx->ps + ctx->ps_shift);
 }
 
 static void atom_op_clear(atom_exec_context *ctx, int *ptr, int arg)
@@ -607,7 +643,7 @@
 	uint8_t count = U8((*ptr)++);
 	SDEBUG("   count: %d\n", count);
 	if (arg == ATOM_UNIT_MICROSEC)
-		schedule_timeout_uninterruptible(usecs_to_jiffies(count));
+		udelay(count);
 	else
 		schedule_timeout_uninterruptible(msecs_to_jiffies(count));
 }
@@ -676,7 +712,7 @@
 	SDEBUG("   dst: ");
 	dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
 	SDEBUG("   src1: ");
-	src1 = atom_get_src(ctx, attr, ptr);
+	src1 = atom_get_src_direct(ctx, ((attr >> 3) & 7), ptr);
 	SDEBUG("   src2: ");
 	src2 = atom_get_src(ctx, attr, ptr);
 	dst &= src1;
@@ -808,7 +844,7 @@
 	SDEBUG("   base: 0x%04X\n", ctx->ctx->reg_block);
 }
 
-static void atom_op_shl(atom_exec_context *ctx, int *ptr, int arg)
+static void atom_op_shift_left(atom_exec_context *ctx, int *ptr, int arg)
 {
 	uint8_t attr = U8((*ptr)++), shift;
 	uint32_t saved, dst;
@@ -817,14 +853,14 @@
 	attr |= atom_def_dst[attr >> 3] << 6;
 	SDEBUG("   dst: ");
 	dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
-	shift = U8((*ptr)++);
+	shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);
 	SDEBUG("   shift: %d\n", shift);
 	dst <<= shift;
 	SDEBUG("   dst: ");
 	atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
 }
 
-static void atom_op_shr(atom_exec_context *ctx, int *ptr, int arg)
+static void atom_op_shift_right(atom_exec_context *ctx, int *ptr, int arg)
 {
 	uint8_t attr = U8((*ptr)++), shift;
 	uint32_t saved, dst;
@@ -833,9 +869,47 @@
 	attr |= atom_def_dst[attr >> 3] << 6;
 	SDEBUG("   dst: ");
 	dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
-	shift = U8((*ptr)++);
+	shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);
+	SDEBUG("   shift: %d\n", shift);
+	dst >>= shift;
+	SDEBUG("   dst: ");
+	atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
+}
+
+static void atom_op_shl(atom_exec_context *ctx, int *ptr, int arg)
+{
+	uint8_t attr = U8((*ptr)++), shift;
+	uint32_t saved, dst;
+	int dptr = *ptr;
+	uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3];
+	SDEBUG("   dst: ");
+	dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
+	/* op needs to full dst value */
+	dst = saved;
+	shift = atom_get_src(ctx, attr, ptr);
+	SDEBUG("   shift: %d\n", shift);
+	dst <<= shift;
+	dst &= atom_arg_mask[dst_align];
+	dst >>= atom_arg_shift[dst_align];
+	SDEBUG("   dst: ");
+	atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
+}
+
+static void atom_op_shr(atom_exec_context *ctx, int *ptr, int arg)
+{
+	uint8_t attr = U8((*ptr)++), shift;
+	uint32_t saved, dst;
+	int dptr = *ptr;
+	uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3];
+	SDEBUG("   dst: ");
+	dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
+	/* op needs to full dst value */
+	dst = saved;
+	shift = atom_get_src(ctx, attr, ptr);
 	SDEBUG("   shift: %d\n", shift);
 	dst >>= shift;
+	dst &= atom_arg_mask[dst_align];
+	dst >>= atom_arg_shift[dst_align];
 	SDEBUG("   dst: ");
 	atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
 }
@@ -936,18 +1010,18 @@
 	atom_op_or, ATOM_ARG_FB}, {
 	atom_op_or, ATOM_ARG_PLL}, {
 	atom_op_or, ATOM_ARG_MC}, {
-	atom_op_shl, ATOM_ARG_REG}, {
-	atom_op_shl, ATOM_ARG_PS}, {
-	atom_op_shl, ATOM_ARG_WS}, {
-	atom_op_shl, ATOM_ARG_FB}, {
-	atom_op_shl, ATOM_ARG_PLL}, {
-	atom_op_shl, ATOM_ARG_MC}, {
-	atom_op_shr, ATOM_ARG_REG}, {
-	atom_op_shr, ATOM_ARG_PS}, {
-	atom_op_shr, ATOM_ARG_WS}, {
-	atom_op_shr, ATOM_ARG_FB}, {
-	atom_op_shr, ATOM_ARG_PLL}, {
-	atom_op_shr, ATOM_ARG_MC}, {
+	atom_op_shift_left, ATOM_ARG_REG}, {
+	atom_op_shift_left, ATOM_ARG_PS}, {
+	atom_op_shift_left, ATOM_ARG_WS}, {
+	atom_op_shift_left, ATOM_ARG_FB}, {
+	atom_op_shift_left, ATOM_ARG_PLL}, {
+	atom_op_shift_left, ATOM_ARG_MC}, {
+	atom_op_shift_right, ATOM_ARG_REG}, {
+	atom_op_shift_right, ATOM_ARG_PS}, {
+	atom_op_shift_right, ATOM_ARG_WS}, {
+	atom_op_shift_right, ATOM_ARG_FB}, {
+	atom_op_shift_right, ATOM_ARG_PLL}, {
+	atom_op_shift_right, ATOM_ARG_MC}, {
 	atom_op_mul, ATOM_ARG_REG}, {
 	atom_op_mul, ATOM_ARG_PS}, {
 	atom_op_mul, ATOM_ARG_WS}, {
@@ -1040,7 +1114,7 @@
 	atom_op_shr, ATOM_ARG_MC}, {
 atom_op_debug, 0},};
 
-void atom_execute_table(struct atom_context *ctx, int index, uint32_t * params)
+static void atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params)
 {
 	int base = CU16(ctx->cmd_table + 4 + 2 * index);
 	int len, ws, ps, ptr;
@@ -1057,8 +1131,6 @@
 
 	SDEBUG(">> execute %04X (len %d, WS %d, PS %d)\n", base, len, ws, ps);
 
-	/* reset reg block */
-	ctx->reg_block = 0;
 	ectx.ctx = ctx;
 	ectx.ps_shift = ps / 4;
 	ectx.start = base;
@@ -1092,6 +1164,19 @@
 		kfree(ectx.ws);
 }
 
+void atom_execute_table(struct atom_context *ctx, int index, uint32_t * params)
+{
+	mutex_lock(&ctx->mutex);
+	/* reset reg block */
+	ctx->reg_block = 0;
+	/* reset fb window */
+	ctx->fb_base = 0;
+	/* reset io mode */
+	ctx->io_mode = ATOM_IO_MM;
+	atom_execute_table_locked(ctx, index, params);
+	mutex_unlock(&ctx->mutex);
+}
+
 static int atom_iio_len[] = { 1, 2, 3, 3, 3, 3, 4, 4, 4, 3 };
 
 static void atom_index_iio(struct atom_context *ctx, int base)
@@ -1214,3 +1299,28 @@
 		*crev = CU8(idx + 3);
 	return;
 }
+
+int atom_allocate_fb_scratch(struct atom_context *ctx)
+{
+	int index = GetIndexIntoMasterTable(DATA, VRAM_UsageByFirmware);
+	uint16_t data_offset;
+	int usage_bytes;
+	struct _ATOM_VRAM_USAGE_BY_FIRMWARE *firmware_usage;
+
+	atom_parse_data_header(ctx, index, NULL, NULL, NULL, &data_offset);
+
+	firmware_usage = (struct _ATOM_VRAM_USAGE_BY_FIRMWARE *)(ctx->bios + data_offset);
+
+	DRM_DEBUG("atom firmware requested %08x %dkb\n",
+		  firmware_usage->asFirmwareVramReserveInfo[0].ulStartAddrUsedByFirmware,
+		  firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb);
+
+	usage_bytes = firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb * 1024;
+	if (usage_bytes == 0)
+		usage_bytes = 20 * 1024;
+	/* allocate some scratch memory */
+	ctx->scratch = kzalloc(usage_bytes, GFP_KERNEL);
+	if (!ctx->scratch)
+		return -ENOMEM;
+	return 0;
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_cp.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_cp.c
@@ -417,8 +417,9 @@
 	return -EBUSY;
 }
 
-static void radeon_init_pipes(drm_radeon_private_t *dev_priv)
+static void radeon_init_pipes(struct drm_device *dev)
 {
+	drm_radeon_private_t *dev_priv = dev->dev_private;
 	uint32_t gb_tile_config, gb_pipe_sel = 0;
 
 	if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV530) {
@@ -436,11 +437,12 @@
 		dev_priv->num_gb_pipes = ((gb_pipe_sel >> 12) & 0x3) + 1;
 	} else {
 		/* R3xx */
-		if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R300) ||
+		if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R300 &&
+		     dev->pdev->device != 0x4144) ||
 		    ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R350)) {
 			dev_priv->num_gb_pipes = 2;
 		} else {
-			/* R3Vxx */
+			/* RV3xx/R300 AD */
 			dev_priv->num_gb_pipes = 1;
 		}
 	}
@@ -736,7 +738,7 @@
 
 	/* setup the raster pipes */
 	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R300)
-	    radeon_init_pipes(dev_priv);
+	    radeon_init_pipes(dev);
 
 	/* Reset the CP ring */
 	radeon_do_cp_reset(dev_priv);
@@ -1644,6 +1646,7 @@
 	radeon_cp_load_microcode(dev_priv);
 	radeon_cp_init_ring_buffer(dev, dev_priv, file_priv);
 
+	dev_priv->have_z_offset = 0;
 	radeon_do_engine_reset(dev);
 	radeon_irq_set_state(dev, RADEON_SW_INT_ENABLE, 1);
 
@@ -1941,8 +1944,8 @@
 	for (t = 0; t < dev_priv->usec_timeout; t++) {
 		u32 done_age = GET_SCRATCH(dev_priv, 1);
 		DRM_DEBUG("done_age = %d\n", done_age);
-		for (i = start; i < dma->buf_count; i++) {
-			buf = dma->buflist[i];
+		for (i = 0; i < dma->buf_count; i++) {
+			buf = dma->buflist[start];
 			buf_priv = buf->dev_private;
 			if (buf->file_priv == NULL || (buf->pending &&
 						       buf_priv->age <=
@@ -1951,7 +1954,8 @@
 				buf->pending = 0;
 				return buf;
 			}
-			start = 0;
+			if (++start >= dma->buf_count)
+				start = 0;
 		}
 
 		if (t) {
@@ -1960,46 +1964,8 @@
 		}
 	}
 
-	DRM_DEBUG("returning NULL!\n");
-	return NULL;
-}
-
-#if 0
-struct drm_buf *radeon_freelist_get(struct drm_device * dev)
-{
-	struct drm_device_dma *dma = dev->dma;
-	drm_radeon_private_t *dev_priv = dev->dev_private;
-	drm_radeon_buf_priv_t *buf_priv;
-	struct drm_buf *buf;
-	int i, t;
-	int start;
-	u32 done_age;
-
-	done_age = radeon_read_ring_rptr(dev_priv, RADEON_SCRATCHOFF(1));
-	if (++dev_priv->last_buf >= dma->buf_count)
-		dev_priv->last_buf = 0;
-
-	start = dev_priv->last_buf;
-	dev_priv->stats.freelist_loops++;
-
-	for (t = 0; t < 2; t++) {
-		for (i = start; i < dma->buf_count; i++) {
-			buf = dma->buflist[i];
-			buf_priv = buf->dev_private;
-			if (buf->file_priv == 0 || (buf->pending &&
-						    buf_priv->age <=
-						    done_age)) {
-				dev_priv->stats.requested_bufs++;
-				buf->pending = 0;
-				return buf;
-			}
-		}
-		start = 0;
-	}
-
 	return NULL;
 }
-#endif
 
 void radeon_freelist_reset(struct drm_device * dev)
 {
@@ -2182,6 +2148,7 @@
 			 &master_priv->sarea);
 	if (ret) {
 		DRM_ERROR("SAREA setup failed\n");
+		kfree(master_priv);
 		return ret;
 	}
 	master_priv->sarea_priv = master_priv->sarea->handle + sizeof(struct drm_sarea);
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_pm.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_pm.c
@@ -27,7 +27,7 @@
 int radeon_pm_init(struct radeon_device *rdev)
 {
 	if (radeon_debugfs_pm_init(rdev)) {
-		DRM_ERROR("Failed to register debugfs file for CP !\n");
+		DRM_ERROR("Failed to register debugfs file for PM!\n");
 	}
 
 	return 0;
@@ -44,8 +44,11 @@
 	struct drm_device *dev = node->minor->dev;
 	struct radeon_device *rdev = dev->dev_private;
 
-	seq_printf(m, "engine clock: %u0 Hz\n", radeon_get_engine_clock(rdev));
-	seq_printf(m, "memory clock: %u0 Hz\n", radeon_get_memory_clock(rdev));
+	seq_printf(m, "default engine clock: %u0 kHz\n", rdev->clock.default_sclk);
+	seq_printf(m, "current engine clock: %u0 kHz\n", radeon_get_engine_clock(rdev));
+	seq_printf(m, "default memory clock: %u0 kHz\n", rdev->clock.default_mclk);
+	if (rdev->asic->get_memory_clock)
+		seq_printf(m, "current memory clock: %u0 kHz\n", radeon_get_memory_clock(rdev));
 
 	return 0;
 }
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/rs400.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/rs400.c
@@ -223,15 +223,31 @@
 	return 0;
 }
 
+int rs400_mc_wait_for_idle(struct radeon_device *rdev)
+{
+	unsigned i;
+	uint32_t tmp;
+
+	for (i = 0; i < rdev->usec_timeout; i++) {
+		/* read MC_STATUS */
+		tmp = RREG32(0x0150);
+		if (tmp & (1 << 2)) {
+			return 0;
+		}
+		DRM_UDELAY(1);
+	}
+	return -1;
+}
+
 void rs400_gpu_init(struct radeon_device *rdev)
 {
 	/* FIXME: HDP same place on rs400 ? */
 	r100_hdp_reset(rdev);
 	/* FIXME: is this correct ? */
 	r420_pipes_init(rdev);
-	if (r300_mc_wait_for_idle(rdev)) {
-		printk(KERN_WARNING "Failed to wait MC idle while "
-		       "programming pipes. Bad things might happen.\n");
+	if (rs400_mc_wait_for_idle(rdev)) {
+		printk(KERN_WARNING "rs400: Failed to wait MC idle while "
+		       "programming pipes. Bad things might happen. %08x\n", RREG32(0x150));
 	}
 }
 
@@ -352,10 +368,11 @@
 	u32 tmp;
 
 	/* Setup GPU memory space */
-	tmp = G_00015C_MC_FB_START(RREG32(R_00015C_NB_TOM));
+	tmp = RREG32(R_00015C_NB_TOM);
 	rdev->mc.vram_location = G_00015C_MC_FB_START(tmp) << 16;
 	rdev->mc.gtt_location = 0xFFFFFFFFUL;
 	r = radeon_mc_setup(rdev);
+	rdev->mc.igp_sideport_enabled = radeon_combios_sideport_present(rdev);
 	if (r)
 		return r;
 	return 0;
@@ -369,8 +386,8 @@
 	r100_mc_stop(rdev, &save);
 
 	/* Wait for mc idle */
-	if (r300_mc_wait_for_idle(rdev))
-		dev_warn(rdev->dev, "Wait MC idle timeout before updating MC.\n");
+	if (rs400_mc_wait_for_idle(rdev))
+		dev_warn(rdev->dev, "rs400: Wait MC idle timeout before updating MC.\n");
 	WREG32(R_000148_MC_FB_LOCATION,
 		S_000148_MC_FB_START(rdev->mc.vram_start >> 16) |
 		S_000148_MC_FB_TOP(rdev->mc.vram_end >> 16));
@@ -387,14 +404,15 @@
 	r300_clock_startup(rdev);
 	/* Initialize GPU configuration (# pipes, ...) */
 	rs400_gpu_init(rdev);
+	r100_enable_bm(rdev);
 	/* Initialize GART (initialize after TTM so we can allocate
 	 * memory through TTM but finalize after TTM) */
 	r = rs400_gart_enable(rdev);
 	if (r)
 		return r;
 	/* Enable IRQ */
-	rdev->irq.sw_int = true;
 	r100_irq_set(rdev);
+	rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
 	/* 1M ring buffer */
 	r = r100_cp_init(rdev, 1024 * 1024);
 	if (r) {
@@ -430,6 +448,8 @@
 	radeon_combios_asic_init(rdev->ddev);
 	/* Resume clock after posting */
 	r300_clock_startup(rdev);
+	/* Initialize surface registers */
+	radeon_surface_init(rdev);
 	return rs400_startup(rdev);
 }
 
@@ -444,7 +464,6 @@
 
 void rs400_fini(struct radeon_device *rdev)
 {
-	rs400_suspend(rdev);
 	r100_cp_fini(rdev);
 	r100_wb_fini(rdev);
 	r100_ib_fini(rdev);
@@ -452,7 +471,7 @@
 	rs400_gart_fini(rdev);
 	radeon_irq_kms_fini(rdev);
 	radeon_fence_driver_fini(rdev);
-	radeon_object_fini(rdev);
+	radeon_bo_fini(rdev);
 	radeon_atombios_fini(rdev);
 	kfree(rdev->bios);
 	rdev->bios = NULL;
@@ -490,12 +509,13 @@
 			RREG32(R_0007C0_CP_STAT));
 	}
 	/* check if cards are posted or not */
-	if (!radeon_card_posted(rdev) && rdev->bios) {
-		DRM_INFO("GPU not posted. posting now...\n");
-		radeon_combios_asic_init(rdev->ddev);
-	}
+	if (radeon_boot_test_post_card(rdev) == false)
+		return -EINVAL;
+
 	/* Initialize clocks */
 	radeon_get_clock_info(rdev->ddev);
+	/* Initialize power management */
+	radeon_pm_init(rdev);
 	/* Get vram informations */
 	rs400_vram_info(rdev);
 	/* Initialize memory controller (also test AGP) */
@@ -510,7 +530,7 @@
 	if (r)
 		return r;
 	/* Memory manager */
-	r = radeon_object_init(rdev);
+	r = radeon_bo_init(rdev);
 	if (r)
 		return r;
 	r = rs400_gart_init(rdev);
@@ -522,7 +542,6 @@
 	if (r) {
 		/* Somethings want wront with the accel init stop accel */
 		dev_err(rdev->dev, "Disabling GPU acceleration\n");
-		rs400_suspend(rdev);
 		r100_cp_fini(rdev);
 		r100_wb_fini(rdev);
 		r100_ib_fini(rdev);
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_drv.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_drv.h
@@ -106,9 +106,10 @@
  * 1.29- R500 3D cmd buffer support
  * 1.30- Add support for occlusion queries
  * 1.31- Add support for num Z pipes from GET_PARAM
+ * 1.32- fixes for rv740 setup
  */
 #define DRIVER_MAJOR		1
-#define DRIVER_MINOR		31
+#define DRIVER_MINOR		32
 #define DRIVER_PATCHLEVEL	0
 
 enum radeon_cp_microcode_version {
@@ -267,6 +268,8 @@
 
 	u32 scratch_ages[5];
 
+	int have_z_offset;
+
 	/* starting from here on, data is preserved accross an open */
 	uint32_t flags;		/* see radeon_chip_flags */
 	resource_size_t fb_aper_offset;
@@ -1104,7 +1107,6 @@
 #       define R600_IT_WAIT_REG_MEM             0x00003C00
 #       define R600_IT_MEM_WRITE                0x00003D00
 #       define R600_IT_INDIRECT_BUFFER          0x00003200
-#       define R600_IT_CP_INTERRUPT             0x00004000
 #       define R600_IT_SURFACE_SYNC             0x00004300
 #              define R600_CB0_DEST_BASE_ENA    (1 << 6)
 #              define R600_TC_ACTION_ENA        (1 << 23)
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_connectors.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -40,6 +40,28 @@
 				       struct drm_encoder *encoder,
 				       bool connected);
 
+void radeon_connector_hotplug(struct drm_connector *connector)
+{
+	struct drm_device *dev = connector->dev;
+	struct radeon_device *rdev = dev->dev_private;
+	struct radeon_connector *radeon_connector = to_radeon_connector(connector);
+
+	if (radeon_connector->hpd.hpd != RADEON_HPD_NONE)
+		radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd);
+
+	if ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) ||
+	    (connector->connector_type == DRM_MODE_CONNECTOR_eDP)) {
+		if ((radeon_dp_getsinktype(radeon_connector) == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
+		    (radeon_dp_getsinktype(radeon_connector) == CONNECTOR_OBJECT_ID_eDP)) {
+			if (radeon_dp_needs_link_train(radeon_connector)) {
+				if (connector->encoder)
+					dp_link_train(connector->encoder, connector);
+			}
+		}
+	}
+
+}
+
 static void radeon_property_change_mode(struct drm_encoder *encoder)
 {
 	struct drm_crtc *crtc = encoder->crtc;
@@ -140,12 +162,14 @@
 {
 	struct drm_device *dev = connector->dev;
 	struct drm_connector *conflict;
+	struct radeon_connector *radeon_conflict;
 	int i;
 
 	list_for_each_entry(conflict, &dev->mode_config.connector_list, head) {
 		if (conflict == connector)
 			continue;
 
+		radeon_conflict = to_radeon_connector(conflict);
 		for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
 			if (conflict->encoder_ids[i] == 0)
 				break;
@@ -155,6 +179,9 @@
 				if (conflict->status != connector_status_connected)
 					continue;
 
+				if (radeon_conflict->use_digital)
+					continue;
+
 				if (priority == true) {
 					DRM_INFO("1: conflicting encoders switching off %s\n", drm_get_connector_name(conflict));
 					DRM_INFO("in favor of %s\n", drm_get_connector_name(connector));
@@ -188,6 +215,18 @@
 		drm_mode_set_name(mode);
 
 		DRM_DEBUG("Adding native panel mode %s\n", mode->name);
+	} else if (native_mode->hdisplay != 0 &&
+		   native_mode->vdisplay != 0) {
+		/* mac laptops without an edid */
+		/* Note that this is not necessarily the exact panel mode,
+		 * but an approximation based on the cvt formula.  For these
+		 * systems we should ideally read the mode info out of the
+		 * registers or add a mode table, but this works and is much
+		 * simpler.
+		 */
+		mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false);
+		mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
+		DRM_DEBUG("Adding cvt approximation of native panel mode %s\n", mode->name);
 	}
 	return mode;
 }
@@ -281,7 +320,7 @@
 		radeon_encoder = to_radeon_encoder(encoder);
 		if (!radeon_encoder->enc_priv)
 			return 0;
-		if (rdev->is_atom_bios) {
+		if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) {
 			struct radeon_encoder_atom_dac *dac_int;
 			dac_int = radeon_encoder->enc_priv;
 			dac_int->tv_std = val;
@@ -445,10 +484,10 @@
 		ret = connector_status_connected;
 	else {
 		if (radeon_connector->ddc_bus) {
-			radeon_i2c_do_lock(radeon_connector, 1);
+			radeon_i2c_do_lock(radeon_connector->ddc_bus, 1);
 			radeon_connector->edid = drm_get_edid(&radeon_connector->base,
 							      &radeon_connector->ddc_bus->adapter);
-			radeon_i2c_do_lock(radeon_connector, 0);
+			radeon_i2c_do_lock(radeon_connector->ddc_bus, 0);
 			if (radeon_connector->edid)
 				ret = connector_status_connected;
 		}
@@ -546,24 +585,26 @@
 	struct radeon_connector *radeon_connector = to_radeon_connector(connector);
 	struct drm_encoder *encoder;
 	struct drm_encoder_helper_funcs *encoder_funcs;
-	bool dret;
+	bool dret = false;
 	enum drm_connector_status ret = connector_status_disconnected;
 
 	encoder = radeon_best_single_encoder(connector);
 	if (!encoder)
 		ret = connector_status_disconnected;
 
-	radeon_i2c_do_lock(radeon_connector, 1);
-	dret = radeon_ddc_probe(radeon_connector);
-	radeon_i2c_do_lock(radeon_connector, 0);
+	if (radeon_connector->ddc_bus) {
+		radeon_i2c_do_lock(radeon_connector->ddc_bus, 1);
+		dret = radeon_ddc_probe(radeon_connector);
+		radeon_i2c_do_lock(radeon_connector->ddc_bus, 0);
+	}
 	if (dret) {
 		if (radeon_connector->edid) {
 			kfree(radeon_connector->edid);
 			radeon_connector->edid = NULL;
 		}
-		radeon_i2c_do_lock(radeon_connector, 1);
+		radeon_i2c_do_lock(radeon_connector->ddc_bus, 1);
 		radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
-		radeon_i2c_do_lock(radeon_connector, 0);
+		radeon_i2c_do_lock(radeon_connector->ddc_bus, 0);
 
 		if (!radeon_connector->edid) {
 			DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
@@ -583,7 +624,7 @@
 				ret = connector_status_connected;
 		}
 	} else {
-		if (radeon_connector->dac_load_detect) {
+		if (radeon_connector->dac_load_detect && encoder) {
 			encoder_funcs = encoder->helper_private;
 			ret = encoder_funcs->detect(encoder, connector);
 		}
@@ -706,19 +747,21 @@
 	struct drm_mode_object *obj;
 	int i;
 	enum drm_connector_status ret = connector_status_disconnected;
-	bool dret;
+	bool dret = false;
 
-	radeon_i2c_do_lock(radeon_connector, 1);
-	dret = radeon_ddc_probe(radeon_connector);
-	radeon_i2c_do_lock(radeon_connector, 0);
+	if (radeon_connector->ddc_bus) {
+		radeon_i2c_do_lock(radeon_connector->ddc_bus, 1);
+		dret = radeon_ddc_probe(radeon_connector);
+		radeon_i2c_do_lock(radeon_connector->ddc_bus, 0);
+	}
 	if (dret) {
 		if (radeon_connector->edid) {
 			kfree(radeon_connector->edid);
 			radeon_connector->edid = NULL;
 		}
-		radeon_i2c_do_lock(radeon_connector, 1);
+		radeon_i2c_do_lock(radeon_connector->ddc_bus, 1);
 		radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
-		radeon_i2c_do_lock(radeon_connector, 0);
+		radeon_i2c_do_lock(radeon_connector->ddc_bus, 0);
 
 		if (!radeon_connector->edid) {
 			DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
@@ -735,6 +778,36 @@
 				ret = connector_status_disconnected;
 			} else
 				ret = connector_status_connected;
+
+			/* This gets complicated.  We have boards with VGA + HDMI with a
+			 * shared DDC line and we have boards with DVI-D + HDMI with a shared
+			 * DDC line.  The latter is more complex because with DVI<->HDMI adapters
+			 * you don't really know what's connected to which port as both are digital.
+			 */
+			if (radeon_connector->shared_ddc && (ret == connector_status_connected)) {
+				struct drm_device *dev = connector->dev;
+				struct radeon_device *rdev = dev->dev_private;
+				struct drm_connector *list_connector;
+				struct radeon_connector *list_radeon_connector;
+				list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) {
+					if (connector == list_connector)
+						continue;
+					list_radeon_connector = to_radeon_connector(list_connector);
+					if (list_radeon_connector->shared_ddc &&
+					    (list_radeon_connector->ddc_bus->rec.i2c_id ==
+					     radeon_connector->ddc_bus->rec.i2c_id)) {
+						/* cases where both connectors are digital */
+						if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) {
+							/* hpd is our only option in this case */
+							if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
+								kfree(radeon_connector->edid);
+								radeon_connector->edid = NULL;
+								ret = connector_status_disconnected;
+							}
+						}
+					}
+				}
+			}
 		}
 	}
 
@@ -833,10 +906,18 @@
 static int radeon_dvi_mode_valid(struct drm_connector *connector,
 				  struct drm_display_mode *mode)
 {
+	struct drm_device *dev = connector->dev;
+	struct radeon_device *rdev = dev->dev_private;
 	struct radeon_connector *radeon_connector = to_radeon_connector(connector);
 
 	/* XXX check mode bandwidth */
 
+	/* clocks over 135 MHz have heat issues with DVI on RV100 */
+	if (radeon_connector->use_digital &&
+	    (rdev->family == CHIP_RV100) &&
+	    (mode->clock > 135000))
+		return MODE_CLOCK_HIGH;
+
 	if (radeon_connector->use_digital && (mode->clock > 165000)) {
 		if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) ||
 		    (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) ||
@@ -863,6 +944,93 @@
 	.force = radeon_dvi_force,
 };
 
+static void radeon_dp_connector_destroy(struct drm_connector *connector)
+{
+	struct radeon_connector *radeon_connector = to_radeon_connector(connector);
+	struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
+
+	if (radeon_connector->ddc_bus)
+		radeon_i2c_destroy(radeon_connector->ddc_bus);
+	if (radeon_connector->edid)
+		kfree(radeon_connector->edid);
+	if (radeon_dig_connector->dp_i2c_bus)
+		radeon_i2c_destroy(radeon_dig_connector->dp_i2c_bus);
+	kfree(radeon_connector->con_priv);
+	drm_sysfs_connector_remove(connector);
+	drm_connector_cleanup(connector);
+	kfree(connector);
+}
+
+static int radeon_dp_get_modes(struct drm_connector *connector)
+{
+	struct radeon_connector *radeon_connector = to_radeon_connector(connector);
+	int ret;
+
+	ret = radeon_ddc_get_modes(radeon_connector);
+	return ret;
+}
+
+static enum drm_connector_status radeon_dp_detect(struct drm_connector *connector)
+{
+	struct radeon_connector *radeon_connector = to_radeon_connector(connector);
+	enum drm_connector_status ret = connector_status_disconnected;
+	struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
+	u8 sink_type;
+
+	if (radeon_connector->edid) {
+		kfree(radeon_connector->edid);
+		radeon_connector->edid = NULL;
+	}
+
+	sink_type = radeon_dp_getsinktype(radeon_connector);
+	if ((sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
+	    (sink_type == CONNECTOR_OBJECT_ID_eDP)) {
+		if (radeon_dp_getdpcd(radeon_connector)) {
+			radeon_dig_connector->dp_sink_type = sink_type;
+			ret = connector_status_connected;
+		}
+	} else {
+		radeon_i2c_do_lock(radeon_connector->ddc_bus, 1);
+		if (radeon_ddc_probe(radeon_connector)) {
+			radeon_dig_connector->dp_sink_type = sink_type;
+			ret = connector_status_connected;
+		}
+		radeon_i2c_do_lock(radeon_connector->ddc_bus, 0);
+	}
+
+	return ret;
+}
+
+static int radeon_dp_mode_valid(struct drm_connector *connector,
+				  struct drm_display_mode *mode)
+{
+	struct radeon_connector *radeon_connector = to_radeon_connector(connector);
+	struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
+
+	/* XXX check mode bandwidth */
+
+	if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
+	    (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
+		return radeon_dp_mode_valid_helper(radeon_connector, mode);
+	else
+		return MODE_OK;
+}
+
+struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = {
+	.get_modes = radeon_dp_get_modes,
+	.mode_valid = radeon_dp_mode_valid,
+	.best_encoder = radeon_dvi_encoder,
+};
+
+struct drm_connector_funcs radeon_dp_connector_funcs = {
+	.dpms = drm_helper_connector_dpms,
+	.detect = radeon_dp_detect,
+	.fill_modes = drm_helper_probe_single_connector_modes,
+	.set_property = radeon_connector_set_property,
+	.destroy = radeon_dp_connector_destroy,
+	.force = radeon_dvi_force,
+};
+
 void
 radeon_add_atom_connector(struct drm_device *dev,
 			  uint32_t connector_id,
@@ -871,7 +1039,8 @@
 			  struct radeon_i2c_bus_rec *i2c_bus,
 			  bool linkb,
 			  uint32_t igp_lane_info,
-			  uint16_t connector_object_id)
+			  uint16_t connector_object_id,
+			  struct radeon_hpd *hpd)
 {
 	struct radeon_device *rdev = dev->dev_private;
 	struct drm_connector *connector;
@@ -893,8 +1062,7 @@
 			return;
 		}
 		if (radeon_connector->ddc_bus && i2c_bus->valid) {
-			if (memcmp(&radeon_connector->ddc_bus->rec, i2c_bus,
-				    sizeof(struct radeon_i2c_bus_rec)) == 0) {
+			if (radeon_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) {
 				radeon_connector->shared_ddc = true;
 				shared_ddc = true;
 			}
@@ -911,6 +1079,7 @@
 	radeon_connector->devices = supported_device;
 	radeon_connector->shared_ddc = shared_ddc;
 	radeon_connector->connector_object_id = connector_object_id;
+	radeon_connector->hpd = *hpd;
 	switch (connector_type) {
 	case DRM_MODE_CONNECTOR_VGA:
 		drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
@@ -926,6 +1095,8 @@
 		drm_connector_attach_property(&radeon_connector->base,
 					      rdev->mode_info.load_detect_property,
 					      1);
+		connector->interlace_allowed = true;
+		connector->doublescan_allowed = true;
 		break;
 	case DRM_MODE_CONNECTOR_DVIA:
 		drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
@@ -941,6 +1112,8 @@
 		drm_connector_attach_property(&radeon_connector->base,
 					      rdev->mode_info.load_detect_property,
 					      1);
+		connector->interlace_allowed = true;
+		connector->doublescan_allowed = true;
 		break;
 	case DRM_MODE_CONNECTOR_DVII:
 	case DRM_MODE_CONNECTOR_DVID:
@@ -963,10 +1136,17 @@
 		drm_connector_attach_property(&radeon_connector->base,
 					      rdev->mode_info.coherent_mode_property,
 					      1);
-		radeon_connector->dac_load_detect = true;
-		drm_connector_attach_property(&radeon_connector->base,
-					      rdev->mode_info.load_detect_property,
-					      1);
+		if (connector_type == DRM_MODE_CONNECTOR_DVII) {
+			radeon_connector->dac_load_detect = true;
+			drm_connector_attach_property(&radeon_connector->base,
+						      rdev->mode_info.load_detect_property,
+						      1);
+		}
+		connector->interlace_allowed = true;
+		if (connector_type == DRM_MODE_CONNECTOR_DVII)
+			connector->doublescan_allowed = true;
+		else
+			connector->doublescan_allowed = false;
 		break;
 	case DRM_MODE_CONNECTOR_HDMIA:
 	case DRM_MODE_CONNECTOR_HDMIB:
@@ -989,24 +1169,46 @@
 					      rdev->mode_info.coherent_mode_property,
 					      1);
 		subpixel_order = SubPixelHorizontalRGB;
+		connector->interlace_allowed = true;
+		if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
+			connector->doublescan_allowed = true;
+		else
+			connector->doublescan_allowed = false;
 		break;
 	case DRM_MODE_CONNECTOR_DisplayPort:
+	case DRM_MODE_CONNECTOR_eDP:
 		radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
 		if (!radeon_dig_connector)
 			goto failed;
 		radeon_dig_connector->linkb = linkb;
 		radeon_dig_connector->igp_lane_info = igp_lane_info;
 		radeon_connector->con_priv = radeon_dig_connector;
-		drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
-		ret = drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
+		drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type);
+		ret = drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
 		if (ret)
 			goto failed;
 		if (i2c_bus->valid) {
-			radeon_connector->ddc_bus = radeon_i2c_create(dev, i2c_bus, "DP");
+			/* add DP i2c bus */
+			if (connector_type == DRM_MODE_CONNECTOR_eDP)
+				radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch");
+			else
+				radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch");
+			if (!radeon_dig_connector->dp_i2c_bus)
+				goto failed;
+			if (connector_type == DRM_MODE_CONNECTOR_eDP)
+				radeon_connector->ddc_bus = radeon_i2c_create(dev, i2c_bus, "eDP");
+			else
+				radeon_connector->ddc_bus = radeon_i2c_create(dev, i2c_bus, "DP");
 			if (!radeon_connector->ddc_bus)
 				goto failed;
 		}
 		subpixel_order = SubPixelHorizontalRGB;
+		drm_connector_attach_property(&radeon_connector->base,
+					      rdev->mode_info.coherent_mode_property,
+					      1);
+		connector->interlace_allowed = true;
+		/* in theory with a DP to VGA converter... */
+		connector->doublescan_allowed = false;
 		break;
 	case DRM_MODE_CONNECTOR_SVIDEO:
 	case DRM_MODE_CONNECTOR_Composite:
@@ -1020,7 +1222,12 @@
 			drm_connector_attach_property(&radeon_connector->base,
 						      rdev->mode_info.load_detect_property,
 						      1);
+			drm_connector_attach_property(&radeon_connector->base,
+						      rdev->mode_info.tv_std_property,
+						      radeon_atombios_get_tv_info(rdev));
 		}
+		connector->interlace_allowed = false;
+		connector->doublescan_allowed = false;
 		break;
 	case DRM_MODE_CONNECTOR_LVDS:
 		radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
@@ -1038,11 +1245,12 @@
 			if (!radeon_connector->ddc_bus)
 				goto failed;
 		}
-		drm_mode_create_scaling_mode_property(dev);
 		drm_connector_attach_property(&radeon_connector->base,
 					      dev->mode_config.scaling_mode_property,
 					      DRM_MODE_SCALE_FULLSCREEN);
 		subpixel_order = SubPixelHorizontalRGB;
+		connector->interlace_allowed = false;
+		connector->doublescan_allowed = false;
 		break;
 	}
 
@@ -1063,7 +1271,8 @@
 			    uint32_t supported_device,
 			    int connector_type,
 			    struct radeon_i2c_bus_rec *i2c_bus,
-			    uint16_t connector_object_id)
+			    uint16_t connector_object_id,
+			    struct radeon_hpd *hpd)
 {
 	struct radeon_device *rdev = dev->dev_private;
 	struct drm_connector *connector;
@@ -1093,6 +1302,7 @@
 	radeon_connector->connector_id = connector_id;
 	radeon_connector->devices = supported_device;
 	radeon_connector->connector_object_id = connector_object_id;
+	radeon_connector->hpd = *hpd;
 	switch (connector_type) {
 	case DRM_MODE_CONNECTOR_VGA:
 		drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
@@ -1108,6 +1318,8 @@
 		drm_connector_attach_property(&radeon_connector->base,
 					      rdev->mode_info.load_detect_property,
 					      1);
+		connector->interlace_allowed = true;
+		connector->doublescan_allowed = true;
 		break;
 	case DRM_MODE_CONNECTOR_DVIA:
 		drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
@@ -1123,6 +1335,8 @@
 		drm_connector_attach_property(&radeon_connector->base,
 					      rdev->mode_info.load_detect_property,
 					      1);
+		connector->interlace_allowed = true;
+		connector->doublescan_allowed = true;
 		break;
 	case DRM_MODE_CONNECTOR_DVII:
 	case DRM_MODE_CONNECTOR_DVID:
@@ -1140,6 +1354,11 @@
 						      1);
 		}
 		subpixel_order = SubPixelHorizontalRGB;
+		connector->interlace_allowed = true;
+		if (connector_type == DRM_MODE_CONNECTOR_DVII)
+			connector->doublescan_allowed = true;
+		else
+			connector->doublescan_allowed = false;
 		break;
 	case DRM_MODE_CONNECTOR_SVIDEO:
 	case DRM_MODE_CONNECTOR_Composite:
@@ -1159,8 +1378,13 @@
 				radeon_connector->dac_load_detect = false;
 			drm_connector_attach_property(&radeon_connector->base,
 						      rdev->mode_info.load_detect_property,
-						      1);
+						      radeon_connector->dac_load_detect);
+			drm_connector_attach_property(&radeon_connector->base,
+						      rdev->mode_info.tv_std_property,
+						      radeon_combios_get_tv_info(rdev));
 		}
+		connector->interlace_allowed = false;
+		connector->doublescan_allowed = false;
 		break;
 	case DRM_MODE_CONNECTOR_LVDS:
 		drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
@@ -1176,6 +1400,8 @@
 					      dev->mode_config.scaling_mode_property,
 					      DRM_MODE_SCALE_FULLSCREEN);
 		subpixel_order = SubPixelHorizontalRGB;
+		connector->interlace_allowed = false;
+		connector->doublescan_allowed = false;
 		break;
 	}
 
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/r200.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/r200.c
@@ -368,16 +368,21 @@
 		/* 2D, 3D, CUBE */
 		switch (tmp) {
 		case 0:
+		case 3:
+		case 4:
 		case 5:
 		case 6:
 		case 7:
+			/* 1D/2D */
 			track->textures[i].tex_coord_type = 0;
 			break;
 		case 1:
-			track->textures[i].tex_coord_type = 1;
+			/* CUBE */
+			track->textures[i].tex_coord_type = 2;
 			break;
 		case 2:
-			track->textures[i].tex_coord_type = 2;
+			/* 3D */
+			track->textures[i].tex_coord_type = 1;
 			break;
 		}
 		break;
@@ -395,13 +400,15 @@
 			track->textures[i].width = 1 << ((idx_value >> RADEON_TXFORMAT_WIDTH_SHIFT) & RADEON_TXFORMAT_WIDTH_MASK);
 			track->textures[i].height = 1 << ((idx_value >> RADEON_TXFORMAT_HEIGHT_SHIFT) & RADEON_TXFORMAT_HEIGHT_MASK);
 		}
+		if (idx_value & R200_TXFORMAT_LOOKUP_DISABLE)
+			track->textures[i].lookup_disable = true;
 		switch ((idx_value & RADEON_TXFORMAT_FORMAT_MASK)) {
 		case R200_TXFORMAT_I8:
 		case R200_TXFORMAT_RGB332:
 		case R200_TXFORMAT_Y8:
 			track->textures[i].cpp = 1;
+			track->textures[i].compress_format = R100_TRACK_COMP_NONE;
 			break;
-		case R200_TXFORMAT_DXT1:
 		case R200_TXFORMAT_AI88:
 		case R200_TXFORMAT_ARGB1555:
 		case R200_TXFORMAT_RGB565:
@@ -412,15 +419,24 @@
 		case R200_TXFORMAT_DVDU88:
 		case R200_TXFORMAT_AVYU4444:
 			track->textures[i].cpp = 2;
+			track->textures[i].compress_format = R100_TRACK_COMP_NONE;
 			break;
 		case R200_TXFORMAT_ARGB8888:
 		case R200_TXFORMAT_RGBA8888:
 		case R200_TXFORMAT_ABGR8888:
 		case R200_TXFORMAT_BGR111110:
 		case R200_TXFORMAT_LDVDU8888:
+			track->textures[i].cpp = 4;
+			track->textures[i].compress_format = R100_TRACK_COMP_NONE;
+			break;
+		case R200_TXFORMAT_DXT1:
+			track->textures[i].cpp = 1;
+			track->textures[i].compress_format = R100_TRACK_COMP_DXT1;
+			break;
 		case R200_TXFORMAT_DXT23:
 		case R200_TXFORMAT_DXT45:
-			track->textures[i].cpp = 4;
+			track->textures[i].cpp = 1;
+			track->textures[i].compress_format = R100_TRACK_COMP_DXT1;
 			break;
 		}
 		track->textures[i].cube_info[4].width = 1 << ((idx_value >> 16) & 0xf);
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/rs600.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/rs600.c
@@ -45,6 +45,123 @@
 void rs600_gpu_init(struct radeon_device *rdev);
 int rs600_mc_wait_for_idle(struct radeon_device *rdev);
 
+int rs600_mc_init(struct radeon_device *rdev)
+{
+	/* read back the MC value from the hw */
+	int r;
+	u32 tmp;
+
+	/* Setup GPU memory space */
+	tmp = RREG32_MC(R_000004_MC_FB_LOCATION);
+	rdev->mc.vram_location = G_000004_MC_FB_START(tmp) << 16;
+	rdev->mc.gtt_location = 0xffffffffUL;
+	r = radeon_mc_setup(rdev);
+	if (r)
+		return r;
+	return 0;
+}
+
+/* hpd for digital panel detect/disconnect */
+bool rs600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd)
+{
+	u32 tmp;
+	bool connected = false;
+
+	switch (hpd) {
+	case RADEON_HPD_1:
+		tmp = RREG32(R_007D04_DC_HOT_PLUG_DETECT1_INT_STATUS);
+		if (G_007D04_DC_HOT_PLUG_DETECT1_SENSE(tmp))
+			connected = true;
+		break;
+	case RADEON_HPD_2:
+		tmp = RREG32(R_007D14_DC_HOT_PLUG_DETECT2_INT_STATUS);
+		if (G_007D14_DC_HOT_PLUG_DETECT2_SENSE(tmp))
+			connected = true;
+		break;
+	default:
+		break;
+	}
+	return connected;
+}
+
+void rs600_hpd_set_polarity(struct radeon_device *rdev,
+			    enum radeon_hpd_id hpd)
+{
+	u32 tmp;
+	bool connected = rs600_hpd_sense(rdev, hpd);
+
+	switch (hpd) {
+	case RADEON_HPD_1:
+		tmp = RREG32(R_007D08_DC_HOT_PLUG_DETECT1_INT_CONTROL);
+		if (connected)
+			tmp &= ~S_007D08_DC_HOT_PLUG_DETECT1_INT_POLARITY(1);
+		else
+			tmp |= S_007D08_DC_HOT_PLUG_DETECT1_INT_POLARITY(1);
+		WREG32(R_007D08_DC_HOT_PLUG_DETECT1_INT_CONTROL, tmp);
+		break;
+	case RADEON_HPD_2:
+		tmp = RREG32(R_007D18_DC_HOT_PLUG_DETECT2_INT_CONTROL);
+		if (connected)
+			tmp &= ~S_007D18_DC_HOT_PLUG_DETECT2_INT_POLARITY(1);
+		else
+			tmp |= S_007D18_DC_HOT_PLUG_DETECT2_INT_POLARITY(1);
+		WREG32(R_007D18_DC_HOT_PLUG_DETECT2_INT_CONTROL, tmp);
+		break;
+	default:
+		break;
+	}
+}
+
+void rs600_hpd_init(struct radeon_device *rdev)
+{
+	struct drm_device *dev = rdev->ddev;
+	struct drm_connector *connector;
+
+	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
+		struct radeon_connector *radeon_connector = to_radeon_connector(connector);
+		switch (radeon_connector->hpd.hpd) {
+		case RADEON_HPD_1:
+			WREG32(R_007D00_DC_HOT_PLUG_DETECT1_CONTROL,
+			       S_007D00_DC_HOT_PLUG_DETECT1_EN(1));
+			rdev->irq.hpd[0] = true;
+			break;
+		case RADEON_HPD_2:
+			WREG32(R_007D10_DC_HOT_PLUG_DETECT2_CONTROL,
+			       S_007D10_DC_HOT_PLUG_DETECT2_EN(1));
+			rdev->irq.hpd[1] = true;
+			break;
+		default:
+			break;
+		}
+	}
+	if (rdev->irq.installed)
+		rs600_irq_set(rdev);
+}
+
+void rs600_hpd_fini(struct radeon_device *rdev)
+{
+	struct drm_device *dev = rdev->ddev;
+	struct drm_connector *connector;
+
+	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
+		struct radeon_connector *radeon_connector = to_radeon_connector(connector);
+		switch (radeon_connector->hpd.hpd) {
+		case RADEON_HPD_1:
+			WREG32(R_007D00_DC_HOT_PLUG_DETECT1_CONTROL,
+			       S_007D00_DC_HOT_PLUG_DETECT1_EN(0));
+			rdev->irq.hpd[0] = false;
+			break;
+		case RADEON_HPD_2:
+			WREG32(R_007D10_DC_HOT_PLUG_DETECT2_CONTROL,
+			       S_007D10_DC_HOT_PLUG_DETECT2_EN(0));
+			rdev->irq.hpd[1] = false;
+			break;
+		default:
+			break;
+		}
+	}
+}
+
 /*
  * GART.
  */
@@ -57,7 +174,7 @@
 	WREG32_MC(R_000100_MC_PT0_CNTL, tmp);
 
 	tmp = RREG32_MC(R_000100_MC_PT0_CNTL);
-	tmp |= S_000100_INVALIDATE_ALL_L1_TLBS(1) & S_000100_INVALIDATE_L2_CACHE(1);
+	tmp |= S_000100_INVALIDATE_ALL_L1_TLBS(1) | S_000100_INVALIDATE_L2_CACHE(1);
 	WREG32_MC(R_000100_MC_PT0_CNTL, tmp);
 
 	tmp = RREG32_MC(R_000100_MC_PT0_CNTL);
@@ -100,40 +217,40 @@
 	WREG32(R_00004C_BUS_CNTL, tmp);
 	/* FIXME: setup default page */
 	WREG32_MC(R_000100_MC_PT0_CNTL,
-		 (S_000100_EFFECTIVE_L2_CACHE_SIZE(6) |
-		  S_000100_EFFECTIVE_L2_QUEUE_SIZE(6)));
+		  (S_000100_EFFECTIVE_L2_CACHE_SIZE(6) |
+		   S_000100_EFFECTIVE_L2_QUEUE_SIZE(6)));
+
 	for (i = 0; i < 19; i++) {
 		WREG32_MC(R_00016C_MC_PT0_CLIENT0_CNTL + i,
-			S_00016C_ENABLE_TRANSLATION_MODE_OVERRIDE(1) |
-			S_00016C_SYSTEM_ACCESS_MODE_MASK(
-				V_00016C_SYSTEM_ACCESS_MODE_IN_SYS) |
-			S_00016C_SYSTEM_APERTURE_UNMAPPED_ACCESS(
-				V_00016C_SYSTEM_APERTURE_UNMAPPED_DEFAULT_PAGE) |
-			S_00016C_EFFECTIVE_L1_CACHE_SIZE(1) |
-			S_00016C_ENABLE_FRAGMENT_PROCESSING(1) |
-			S_00016C_EFFECTIVE_L1_QUEUE_SIZE(1));
+			  S_00016C_ENABLE_TRANSLATION_MODE_OVERRIDE(1) |
+			  S_00016C_SYSTEM_ACCESS_MODE_MASK(
+				  V_00016C_SYSTEM_ACCESS_MODE_NOT_IN_SYS) |
+			  S_00016C_SYSTEM_APERTURE_UNMAPPED_ACCESS(
+				  V_00016C_SYSTEM_APERTURE_UNMAPPED_PASSTHROUGH) |
+			  S_00016C_EFFECTIVE_L1_CACHE_SIZE(3) |
+			  S_00016C_ENABLE_FRAGMENT_PROCESSING(1) |
+			  S_00016C_EFFECTIVE_L1_QUEUE_SIZE(3));
 	}
-
-	/* System context map to GART space */
-	WREG32_MC(R_000112_MC_PT0_SYSTEM_APERTURE_LOW_ADDR, rdev->mc.gtt_start);
-	WREG32_MC(R_000114_MC_PT0_SYSTEM_APERTURE_HIGH_ADDR, rdev->mc.gtt_end);
-
 	/* enable first context */
-	WREG32_MC(R_00013C_MC_PT0_CONTEXT0_FLAT_START_ADDR, rdev->mc.gtt_start);
-	WREG32_MC(R_00014C_MC_PT0_CONTEXT0_FLAT_END_ADDR, rdev->mc.gtt_end);
 	WREG32_MC(R_000102_MC_PT0_CONTEXT0_CNTL,
-			S_000102_ENABLE_PAGE_TABLE(1) |
-			S_000102_PAGE_TABLE_DEPTH(V_000102_PAGE_TABLE_FLAT));
+		  S_000102_ENABLE_PAGE_TABLE(1) |
+		  S_000102_PAGE_TABLE_DEPTH(V_000102_PAGE_TABLE_FLAT));
+
 	/* disable all other contexts */
-	for (i = 1; i < 8; i++) {
+	for (i = 1; i < 8; i++)
 		WREG32_MC(R_000102_MC_PT0_CONTEXT0_CNTL + i, 0);
-	}
 
 	/* setup the page table */
 	WREG32_MC(R_00012C_MC_PT0_CONTEXT0_FLAT_BASE_ADDR,
-			rdev->gart.table_addr);
+		  rdev->gart.table_addr);
+	WREG32_MC(R_00013C_MC_PT0_CONTEXT0_FLAT_START_ADDR, rdev->mc.gtt_start);
+	WREG32_MC(R_00014C_MC_PT0_CONTEXT0_FLAT_END_ADDR, rdev->mc.gtt_end);
 	WREG32_MC(R_00011C_MC_PT0_CONTEXT0_DEFAULT_READ_ADDR, 0);
 
+	/* System context maps to VRAM space */
+	WREG32_MC(R_000112_MC_PT0_SYSTEM_APERTURE_LOW_ADDR, rdev->mc.vram_start);
+	WREG32_MC(R_000114_MC_PT0_SYSTEM_APERTURE_HIGH_ADDR, rdev->mc.vram_end);
+
 	/* enable page tables */
 	tmp = RREG32_MC(R_000100_MC_PT0_CNTL);
 	WREG32_MC(R_000100_MC_PT0_CNTL, (tmp | S_000100_ENABLE_PT(1)));
@@ -146,15 +263,20 @@
 
 void rs600_gart_disable(struct radeon_device *rdev)
 {
-	uint32_t tmp;
+	u32 tmp;
+	int r;
 
 	/* FIXME: disable out of gart access */
 	WREG32_MC(R_000100_MC_PT0_CNTL, 0);
 	tmp = RREG32_MC(R_000009_MC_CNTL1);
 	WREG32_MC(R_000009_MC_CNTL1, tmp & C_000009_ENABLE_PAGE_TABLES);
 	if (rdev->gart.table.vram.robj) {
-		radeon_object_kunmap(rdev->gart.table.vram.robj);
-		radeon_object_unpin(rdev->gart.table.vram.robj);
+		r = radeon_bo_reserve(rdev->gart.table.vram.robj, false);
+		if (r == 0) {
+			radeon_bo_kunmap(rdev->gart.table.vram.robj);
+			radeon_bo_unpin(rdev->gart.table.vram.robj);
+			radeon_bo_unreserve(rdev->gart.table.vram.robj);
+		}
 	}
 }
 
@@ -189,7 +311,16 @@
 {
 	uint32_t tmp = 0;
 	uint32_t mode_int = 0;
-
+	u32 hpd1 = RREG32(R_007D08_DC_HOT_PLUG_DETECT1_INT_CONTROL) &
+		~S_007D08_DC_HOT_PLUG_DETECT1_INT_EN(1);
+	u32 hpd2 = RREG32(R_007D18_DC_HOT_PLUG_DETECT2_INT_CONTROL) &
+		~S_007D18_DC_HOT_PLUG_DETECT2_INT_EN(1);
+
+	if (!rdev->irq.installed) {
+		WARN(1, "Can't enable IRQ/MSI because no handler is installed.\n");
+		WREG32(R_000040_GEN_INT_CNTL, 0);
+		return -EINVAL;
+	}
 	if (rdev->irq.sw_int) {
 		tmp |= S_000040_SW_INT_EN(1);
 	}
@@ -199,8 +330,16 @@
 	if (rdev->irq.crtc_vblank_int[1]) {
 		mode_int |= S_006540_D2MODE_VBLANK_INT_MASK(1);
 	}
+	if (rdev->irq.hpd[0]) {
+		hpd1 |= S_007D08_DC_HOT_PLUG_DETECT1_INT_EN(1);
+	}
+	if (rdev->irq.hpd[1]) {
+		hpd2 |= S_007D18_DC_HOT_PLUG_DETECT2_INT_EN(1);
+	}
 	WREG32(R_000040_GEN_INT_CNTL, tmp);
 	WREG32(R_006540_DxMODE_INT_MASK, mode_int);
+	WREG32(R_007D08_DC_HOT_PLUG_DETECT1_INT_CONTROL, hpd1);
+	WREG32(R_007D18_DC_HOT_PLUG_DETECT2_INT_CONTROL, hpd2);
 	return 0;
 }
 
@@ -208,6 +347,7 @@
 {
 	uint32_t irqs = RREG32(R_000044_GEN_INT_STATUS);
 	uint32_t irq_mask = ~C_000044_SW_INT;
+	u32 tmp;
 
 	if (G_000044_DISPLAY_INT_STAT(irqs)) {
 		*r500_disp_int = RREG32(R_007EDC_DISP_INTERRUPT_STATUS);
@@ -219,6 +359,16 @@
 			WREG32(R_006D34_D2MODE_VBLANK_STATUS,
 				S_006D34_D2MODE_VBLANK_ACK(1));
 		}
+		if (G_007EDC_DC_HOT_PLUG_DETECT1_INTERRUPT(*r500_disp_int)) {
+			tmp = RREG32(R_007D08_DC_HOT_PLUG_DETECT1_INT_CONTROL);
+			tmp |= S_007D08_DC_HOT_PLUG_DETECT1_INT_ACK(1);
+			WREG32(R_007D08_DC_HOT_PLUG_DETECT1_INT_CONTROL, tmp);
+		}
+		if (G_007EDC_DC_HOT_PLUG_DETECT2_INTERRUPT(*r500_disp_int)) {
+			tmp = RREG32(R_007D18_DC_HOT_PLUG_DETECT2_INT_CONTROL);
+			tmp |= S_007D18_DC_HOT_PLUG_DETECT2_INT_ACK(1);
+			WREG32(R_007D18_DC_HOT_PLUG_DETECT2_INT_CONTROL, tmp);
+		}
 	} else {
 		*r500_disp_int = 0;
 	}
@@ -244,6 +394,7 @@
 {
 	uint32_t status, msi_rearm;
 	uint32_t r500_disp_int;
+	bool queue_hotplug = false;
 
 	status = rs600_irq_ack(rdev, &r500_disp_int);
 	if (!status && !r500_disp_int) {
@@ -251,15 +402,25 @@
 	}
 	while (status || r500_disp_int) {
 		/* SW interrupt */
-		if (G_000040_SW_INT_EN(status))
+		if (G_000044_SW_INT(status))
 			radeon_fence_process(rdev);
 		/* Vertical blank interrupts */
 		if (G_007EDC_LB_D1_VBLANK_INTERRUPT(r500_disp_int))
 			drm_handle_vblank(rdev->ddev, 0);
 		if (G_007EDC_LB_D2_VBLANK_INTERRUPT(r500_disp_int))
 			drm_handle_vblank(rdev->ddev, 1);
+		if (G_007EDC_DC_HOT_PLUG_DETECT1_INTERRUPT(r500_disp_int)) {
+			queue_hotplug = true;
+			DRM_DEBUG("HPD1\n");
+		}
+		if (G_007EDC_DC_HOT_PLUG_DETECT2_INTERRUPT(r500_disp_int)) {
+			queue_hotplug = true;
+			DRM_DEBUG("HPD2\n");
+		}
 		status = rs600_irq_ack(rdev, &r500_disp_int);
 	}
+	if (queue_hotplug)
+		queue_work(rdev->wq, &rdev->hotplug_work);
 	if (rdev->msi_enabled) {
 		switch (rdev->family) {
 		case CHIP_RS600:
@@ -301,9 +462,7 @@
 
 void rs600_gpu_init(struct radeon_device *rdev)
 {
-	/* FIXME: HDP same place on rs600 ? */
 	r100_hdp_reset(rdev);
-	/* FIXME: is this correct ? */
 	r420_pipes_init(rdev);
 	/* Wait for mc idle */
 	if (rs600_mc_wait_for_idle(rdev))
@@ -312,9 +471,20 @@
 
 void rs600_vram_info(struct radeon_device *rdev)
 {
-	/* FIXME: to do or is these values sane ? */
 	rdev->mc.vram_is_ddr = true;
 	rdev->mc.vram_width = 128;
+
+	rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE);
+	rdev->mc.mc_vram_size = rdev->mc.real_vram_size;
+
+	rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
+	rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0);
+
+	if (rdev->mc.mc_vram_size > rdev->mc.aper_size)
+		rdev->mc.mc_vram_size = rdev->mc.aper_size;
+
+	if (rdev->mc.real_vram_size > rdev->mc.aper_size)
+		rdev->mc.real_vram_size = rdev->mc.aper_size;
 }
 
 void rs600_bandwidth_update(struct radeon_device *rdev)
@@ -388,8 +558,8 @@
 	if (r)
 		return r;
 	/* Enable IRQ */
-	rdev->irq.sw_int = true;
 	rs600_irq_set(rdev);
+	rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
 	/* 1M ring buffer */
 	r = r100_cp_init(rdev, 1024 * 1024);
 	if (r) {
@@ -423,6 +593,8 @@
 	atom_asic_init(rdev->mode_info.atom_context);
 	/* Resume clock after posting */
 	rv515_clock_startup(rdev);
+	/* Initialize surface registers */
+	radeon_surface_init(rdev);
 	return rs600_startup(rdev);
 }
 
@@ -437,7 +609,6 @@
 
 void rs600_fini(struct radeon_device *rdev)
 {
-	rs600_suspend(rdev);
 	r100_cp_fini(rdev);
 	r100_wb_fini(rdev);
 	r100_ib_fini(rdev);
@@ -445,7 +616,7 @@
 	rs600_gart_fini(rdev);
 	radeon_irq_kms_fini(rdev);
 	radeon_fence_driver_fini(rdev);
-	radeon_object_fini(rdev);
+	radeon_bo_fini(rdev);
 	radeon_atombios_fini(rdev);
 	kfree(rdev->bios);
 	rdev->bios = NULL;
@@ -482,10 +653,9 @@
 			RREG32(R_0007C0_CP_STAT));
 	}
 	/* check if cards are posted or not */
-	if (!radeon_card_posted(rdev) && rdev->bios) {
-		DRM_INFO("GPU not posted. posting now...\n");
-		atom_asic_init(rdev->mode_info.atom_context);
-	}
+	if (radeon_boot_test_post_card(rdev) == false)
+		return -EINVAL;
+
 	/* Initialize clocks */
 	radeon_get_clock_info(rdev->ddev);
 	/* Initialize power management */
@@ -493,7 +663,7 @@
 	/* Get vram informations */
 	rs600_vram_info(rdev);
 	/* Initialize memory controller (also test AGP) */
-	r = r420_mc_init(rdev);
+	r = rs600_mc_init(rdev);
 	if (r)
 		return r;
 	rs600_debugfs(rdev);
@@ -505,7 +675,7 @@
 	if (r)
 		return r;
 	/* Memory manager */
-	r = radeon_object_init(rdev);
+	r = radeon_bo_init(rdev);
 	if (r)
 		return r;
 	r = rs600_gart_init(rdev);
@@ -517,7 +687,6 @@
 	if (r) {
 		/* Somethings want wront with the accel init stop accel */
 		dev_err(rdev->dev, "Disabling GPU acceleration\n");
-		rs600_suspend(rdev);
 		r100_cp_fini(rdev);
 		r100_wb_fini(rdev);
 		r100_ib_fini(rdev);
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/r420.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/r420.c
@@ -30,7 +30,15 @@
 #include "radeon_reg.h"
 #include "radeon.h"
 #include "atom.h"
+#include "r100d.h"
 #include "r420d.h"
+#include "r420_reg_safe.h"
+
+static void r420_set_reg_safe(struct radeon_device *rdev)
+{
+	rdev->config.r300.reg_safe_bm = r420_reg_safe_bm;
+	rdev->config.r300.reg_safe_bm_size = ARRAY_SIZE(r420_reg_safe_bm);
+}
 
 int r420_mc_init(struct radeon_device *rdev)
 {
@@ -42,9 +50,7 @@
 	if (rdev->flags & RADEON_IS_AGP) {
 		r = radeon_agp_init(rdev);
 		if (r) {
-			printk(KERN_WARNING "[drm] Disabling AGP\n");
-			rdev->flags &= ~RADEON_IS_AGP;
-			rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024;
+			radeon_agp_disable(rdev);
 		} else {
 			rdev->mc.gtt_location = rdev->mc.agp_base;
 		}
@@ -165,10 +171,41 @@
 	WREG32_PLL(R_00000D_SCLK_CNTL, sclk_cntl);
 }
 
+static void r420_cp_errata_init(struct radeon_device *rdev)
+{
+	/* RV410 and R420 can lock up if CP DMA to host memory happens
+	 * while the 2D engine is busy.
+	 *
+	 * The proper workaround is to queue a RESYNC at the beginning
+	 * of the CP init, apparently.
+	 */
+	radeon_scratch_get(rdev, &rdev->config.r300.resync_scratch);
+	radeon_ring_lock(rdev, 8);
+	radeon_ring_write(rdev, PACKET0(R300_CP_RESYNC_ADDR, 1));
+	radeon_ring_write(rdev, rdev->config.r300.resync_scratch);
+	radeon_ring_write(rdev, 0xDEADBEEF);
+	radeon_ring_unlock_commit(rdev);
+}
+
+static void r420_cp_errata_fini(struct radeon_device *rdev)
+{
+	/* Catch the RESYNC we dispatched all the way back,
+	 * at the very beginning of the CP init.
+	 */
+	radeon_ring_lock(rdev, 8);
+	radeon_ring_write(rdev, PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0));
+	radeon_ring_write(rdev, R300_RB3D_DC_FINISH);
+	radeon_ring_unlock_commit(rdev);
+	radeon_scratch_free(rdev, rdev->config.r300.resync_scratch);
+}
+
 static int r420_startup(struct radeon_device *rdev)
 {
 	int r;
 
+	/* set common regs */
+	r100_set_common_regs(rdev);
+	/* program mc */
 	r300_mc_program(rdev);
 	/* Resume clock */
 	r420_clock_resume(rdev);
@@ -186,14 +223,15 @@
 	}
 	r420_pipes_init(rdev);
 	/* Enable IRQ */
-	rdev->irq.sw_int = true;
 	r100_irq_set(rdev);
+	rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
 	/* 1M ring buffer */
 	r = r100_cp_init(rdev, 1024 * 1024);
 	if (r) {
 		dev_err(rdev->dev, "failled initializing CP (%d).\n", r);
 		return r;
 	}
+	r420_cp_errata_init(rdev);
 	r = r100_wb_init(rdev);
 	if (r) {
 		dev_err(rdev->dev, "failled initializing WB (%d).\n", r);
@@ -229,12 +267,14 @@
 	}
 	/* Resume clock after posting */
 	r420_clock_resume(rdev);
-
+	/* Initialize surface registers */
+	radeon_surface_init(rdev);
 	return r420_startup(rdev);
 }
 
 int r420_suspend(struct radeon_device *rdev)
 {
+	r420_cp_errata_fini(rdev);
 	r100_cp_disable(rdev);
 	r100_wb_disable(rdev);
 	r100_irq_disable(rdev);
@@ -258,7 +298,7 @@
 	radeon_agp_fini(rdev);
 	radeon_irq_kms_fini(rdev);
 	radeon_fence_driver_fini(rdev);
-	radeon_object_fini(rdev);
+	radeon_bo_fini(rdev);
 	if (rdev->is_atom_bios) {
 		radeon_atombios_fini(rdev);
 	} else {
@@ -301,14 +341,9 @@
 			RREG32(R_0007C0_CP_STAT));
 	}
 	/* check if cards are posted or not */
-	if (!radeon_card_posted(rdev) && rdev->bios) {
-		DRM_INFO("GPU not posted. posting now...\n");
-		if (rdev->is_atom_bios) {
-			atom_asic_init(rdev->mode_info.atom_context);
-		} else {
-			radeon_combios_asic_init(rdev->ddev);
-		}
-	}
+	if (radeon_boot_test_post_card(rdev) == false)
+		return -EINVAL;
+
 	/* Initialize clocks */
 	radeon_get_clock_info(rdev->ddev);
 	/* Initialize power management */
@@ -331,10 +366,13 @@
 		return r;
 	}
 	/* Memory manager */
-	r = radeon_object_init(rdev);
+	r = radeon_bo_init(rdev);
 	if (r) {
 		return r;
 	}
+	if (rdev->family == CHIP_R420)
+		r100_enable_bm(rdev);
+
 	if (rdev->flags & RADEON_IS_PCIE) {
 		r = rv370_pcie_gart_init(rdev);
 		if (r)
@@ -345,22 +383,21 @@
 		if (r)
 			return r;
 	}
-	r300_set_reg_safe(rdev);
+	r420_set_reg_safe(rdev);
 	rdev->accel_working = true;
 	r = r420_startup(rdev);
 	if (r) {
 		/* Somethings want wront with the accel init stop accel */
 		dev_err(rdev->dev, "Disabling GPU acceleration\n");
-		r420_suspend(rdev);
 		r100_cp_fini(rdev);
 		r100_wb_fini(rdev);
 		r100_ib_fini(rdev);
+		radeon_irq_kms_fini(rdev);
 		if (rdev->flags & RADEON_IS_PCIE)
 			rv370_pcie_gart_fini(rdev);
 		if (rdev->flags & RADEON_IS_PCI)
 			r100_pci_gart_fini(rdev);
 		radeon_agp_fini(rdev);
-		radeon_irq_kms_fini(rdev);
 		rdev->accel_working = false;
 	}
 	return 0;
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/r100.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/r100.c
@@ -65,6 +65,96 @@
  * r100,rv100,rs100,rv200,rs200,r200,rv250,rs300,rv280
  */
 
+/* hpd for digital panel detect/disconnect */
+bool r100_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd)
+{
+	bool connected = false;
+
+	switch (hpd) {
+	case RADEON_HPD_1:
+		if (RREG32(RADEON_FP_GEN_CNTL) & RADEON_FP_DETECT_SENSE)
+			connected = true;
+		break;
+	case RADEON_HPD_2:
+		if (RREG32(RADEON_FP2_GEN_CNTL) & RADEON_FP2_DETECT_SENSE)
+			connected = true;
+		break;
+	default:
+		break;
+	}
+	return connected;
+}
+
+void r100_hpd_set_polarity(struct radeon_device *rdev,
+			   enum radeon_hpd_id hpd)
+{
+	u32 tmp;
+	bool connected = r100_hpd_sense(rdev, hpd);
+
+	switch (hpd) {
+	case RADEON_HPD_1:
+		tmp = RREG32(RADEON_FP_GEN_CNTL);
+		if (connected)
+			tmp &= ~RADEON_FP_DETECT_INT_POL;
+		else
+			tmp |= RADEON_FP_DETECT_INT_POL;
+		WREG32(RADEON_FP_GEN_CNTL, tmp);
+		break;
+	case RADEON_HPD_2:
+		tmp = RREG32(RADEON_FP2_GEN_CNTL);
+		if (connected)
+			tmp &= ~RADEON_FP2_DETECT_INT_POL;
+		else
+			tmp |= RADEON_FP2_DETECT_INT_POL;
+		WREG32(RADEON_FP2_GEN_CNTL, tmp);
+		break;
+	default:
+		break;
+	}
+}
+
+void r100_hpd_init(struct radeon_device *rdev)
+{
+	struct drm_device *dev = rdev->ddev;
+	struct drm_connector *connector;
+
+	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
+		struct radeon_connector *radeon_connector = to_radeon_connector(connector);
+		switch (radeon_connector->hpd.hpd) {
+		case RADEON_HPD_1:
+			rdev->irq.hpd[0] = true;
+			break;
+		case RADEON_HPD_2:
+			rdev->irq.hpd[1] = true;
+			break;
+		default:
+			break;
+		}
+	}
+	if (rdev->irq.installed)
+		r100_irq_set(rdev);
+}
+
+void r100_hpd_fini(struct radeon_device *rdev)
+{
+	struct drm_device *dev = rdev->ddev;
+	struct drm_connector *connector;
+
+	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
+		struct radeon_connector *radeon_connector = to_radeon_connector(connector);
+		switch (radeon_connector->hpd.hpd) {
+		case RADEON_HPD_1:
+			rdev->irq.hpd[0] = false;
+			break;
+		case RADEON_HPD_2:
+			rdev->irq.hpd[1] = false;
+			break;
+		default:
+			break;
+		}
+	}
+}
+
 /*
  * PCI GART
  */
@@ -94,6 +184,15 @@
 	return radeon_gart_table_ram_alloc(rdev);
 }
 
+/* required on r1xx, r2xx, r300, r(v)350, r420/r481, rs400/rs480 */
+void r100_enable_bm(struct radeon_device *rdev)
+{
+	uint32_t tmp;
+	/* Enable bus mastering */
+	tmp = RREG32(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS;
+	WREG32(RADEON_BUS_CNTL, tmp);
+}
+
 int r100_pci_gart_enable(struct radeon_device *rdev)
 {
 	uint32_t tmp;
@@ -105,9 +204,6 @@
 	WREG32(RADEON_AIC_LO_ADDR, rdev->mc.gtt_location);
 	tmp = rdev->mc.gtt_location + rdev->mc.gtt_size - 1;
 	WREG32(RADEON_AIC_HI_ADDR, tmp);
-	/* Enable bus mastering */
-	tmp = RREG32(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS;
-	WREG32(RADEON_BUS_CNTL, tmp);
 	/* set PCI GART page-table base address */
 	WREG32(RADEON_AIC_PT_BASE, rdev->gart.table_addr);
 	tmp = RREG32(RADEON_AIC_CNTL) | RADEON_PCIGART_TRANSLATE_EN;
@@ -148,6 +244,11 @@
 {
 	uint32_t tmp = 0;
 
+	if (!rdev->irq.installed) {
+		WARN(1, "Can't enable IRQ/MSI because no handler is installed.\n");
+		WREG32(R_000040_GEN_INT_CNTL, 0);
+		return -EINVAL;
+	}
 	if (rdev->irq.sw_int) {
 		tmp |= RADEON_SW_INT_ENABLE;
 	}
@@ -157,6 +258,12 @@
 	if (rdev->irq.crtc_vblank_int[1]) {
 		tmp |= RADEON_CRTC2_VBLANK_MASK;
 	}
+	if (rdev->irq.hpd[0]) {
+		tmp |= RADEON_FP_DETECT_MASK;
+	}
+	if (rdev->irq.hpd[1]) {
+		tmp |= RADEON_FP2_DETECT_MASK;
+	}
 	WREG32(RADEON_GEN_INT_CNTL, tmp);
 	return 0;
 }
@@ -175,8 +282,9 @@
 static inline uint32_t r100_irq_ack(struct radeon_device *rdev)
 {
 	uint32_t irqs = RREG32(RADEON_GEN_INT_STATUS);
-	uint32_t irq_mask = RADEON_SW_INT_TEST | RADEON_CRTC_VBLANK_STAT |
-		RADEON_CRTC2_VBLANK_STAT;
+	uint32_t irq_mask = RADEON_SW_INT_TEST |
+		RADEON_CRTC_VBLANK_STAT | RADEON_CRTC2_VBLANK_STAT |
+		RADEON_FP_DETECT_STAT | RADEON_FP2_DETECT_STAT;
 
 	if (irqs) {
 		WREG32(RADEON_GEN_INT_STATUS, irqs);
@@ -187,6 +295,7 @@
 int r100_irq_process(struct radeon_device *rdev)
 {
 	uint32_t status, msi_rearm;
+	bool queue_hotplug = false;
 
 	status = r100_irq_ack(rdev);
 	if (!status) {
@@ -207,8 +316,18 @@
 		if (status & RADEON_CRTC2_VBLANK_STAT) {
 			drm_handle_vblank(rdev->ddev, 1);
 		}
+		if (status & RADEON_FP_DETECT_STAT) {
+			queue_hotplug = true;
+			DRM_DEBUG("HPD1\n");
+		}
+		if (status & RADEON_FP2_DETECT_STAT) {
+			queue_hotplug = true;
+			DRM_DEBUG("HPD2\n");
+		}
 		status = r100_irq_ack(rdev);
 	}
+	if (queue_hotplug)
+		queue_work(rdev->wq, &rdev->hotplug_work);
 	if (rdev->msi_enabled) {
 		switch (rdev->family) {
 		case CHIP_RS400:
@@ -235,14 +354,25 @@
 		return RREG32(RADEON_CRTC2_CRNT_FRAME);
 }
 
+/* Who ever call radeon_fence_emit should call ring_lock and ask
+ * for enough space (today caller are ib schedule and buffer move) */
 void r100_fence_ring_emit(struct radeon_device *rdev,
 			  struct radeon_fence *fence)
 {
-	/* Who ever call radeon_fence_emit should call ring_lock and ask
-	 * for enough space (today caller are ib schedule and buffer move) */
+	/* We have to make sure that caches are flushed before
+	 * CPU might read something from VRAM. */
+	radeon_ring_write(rdev, PACKET0(RADEON_RB3D_DSTCACHE_CTLSTAT, 0));
+	radeon_ring_write(rdev, RADEON_RB3D_DC_FLUSH_ALL);
+	radeon_ring_write(rdev, PACKET0(RADEON_RB3D_ZCACHE_CTLSTAT, 0));
+	radeon_ring_write(rdev, RADEON_RB3D_ZC_FLUSH_ALL);
 	/* Wait until IDLE & CLEAN */
 	radeon_ring_write(rdev, PACKET0(0x1720, 0));
 	radeon_ring_write(rdev, (1 << 16) | (1 << 17));
+	radeon_ring_write(rdev, PACKET0(RADEON_HOST_PATH_CNTL, 0));
+	radeon_ring_write(rdev, rdev->config.r100.hdp_cntl |
+				RADEON_HDP_READ_BUFFER_INVALIDATE);
+	radeon_ring_write(rdev, PACKET0(RADEON_HOST_PATH_CNTL, 0));
+	radeon_ring_write(rdev, rdev->config.r100.hdp_cntl);
 	/* Emit fence sequence & fire IRQ */
 	radeon_ring_write(rdev, PACKET0(rdev->fence_drv.scratch_reg, 0));
 	radeon_ring_write(rdev, fence->seq);
@@ -255,24 +385,27 @@
 	int r;
 
 	if (rdev->wb.wb_obj == NULL) {
-		r = radeon_object_create(rdev, NULL, RADEON_GPU_PAGE_SIZE,
-					 true,
-					 RADEON_GEM_DOMAIN_GTT,
-					 false, &rdev->wb.wb_obj);
+		r = radeon_bo_create(rdev, NULL, RADEON_GPU_PAGE_SIZE, true,
+					RADEON_GEM_DOMAIN_GTT,
+					&rdev->wb.wb_obj);
 		if (r) {
-			DRM_ERROR("radeon: failed to create WB buffer (%d).\n", r);
+			dev_err(rdev->dev, "(%d) create WB buffer failed\n", r);
 			return r;
 		}
-		r = radeon_object_pin(rdev->wb.wb_obj,
-				      RADEON_GEM_DOMAIN_GTT,
-				      &rdev->wb.gpu_addr);
+		r = radeon_bo_reserve(rdev->wb.wb_obj, false);
+		if (unlikely(r != 0))
+			return r;
+		r = radeon_bo_pin(rdev->wb.wb_obj, RADEON_GEM_DOMAIN_GTT,
+					&rdev->wb.gpu_addr);
 		if (r) {
-			DRM_ERROR("radeon: failed to pin WB buffer (%d).\n", r);
+			dev_err(rdev->dev, "(%d) pin WB buffer failed\n", r);
+			radeon_bo_unreserve(rdev->wb.wb_obj);
 			return r;
 		}
-		r = radeon_object_kmap(rdev->wb.wb_obj, (void **)&rdev->wb.wb);
+		r = radeon_bo_kmap(rdev->wb.wb_obj, (void **)&rdev->wb.wb);
+		radeon_bo_unreserve(rdev->wb.wb_obj);
 		if (r) {
-			DRM_ERROR("radeon: failed to map WB buffer (%d).\n", r);
+			dev_err(rdev->dev, "(%d) map WB buffer failed\n", r);
 			return r;
 		}
 	}
@@ -290,11 +423,19 @@
 
 void r100_wb_fini(struct radeon_device *rdev)
 {
+	int r;
+
 	r100_wb_disable(rdev);
 	if (rdev->wb.wb_obj) {
-		radeon_object_kunmap(rdev->wb.wb_obj);
-		radeon_object_unpin(rdev->wb.wb_obj);
-		radeon_object_unref(&rdev->wb.wb_obj);
+		r = radeon_bo_reserve(rdev->wb.wb_obj, false);
+		if (unlikely(r != 0)) {
+			dev_err(rdev->dev, "(%d) can't finish WB\n", r);
+			return;
+		}
+		radeon_bo_kunmap(rdev->wb.wb_obj);
+		radeon_bo_unpin(rdev->wb.wb_obj);
+		radeon_bo_unreserve(rdev->wb.wb_obj);
+		radeon_bo_unref(&rdev->wb.wb_obj);
 		rdev->wb.wb = NULL;
 		rdev->wb.wb_obj = NULL;
 	}
@@ -1243,6 +1384,7 @@
 		case RADEON_TXFORMAT_RGB332:
 		case RADEON_TXFORMAT_Y8:
 			track->textures[i].cpp = 1;
+			track->textures[i].compress_format = R100_TRACK_COMP_NONE;
 			break;
 		case RADEON_TXFORMAT_AI88:
 		case RADEON_TXFORMAT_ARGB1555:
@@ -1250,19 +1392,27 @@
 		case RADEON_TXFORMAT_ARGB4444:
 		case RADEON_TXFORMAT_VYUY422:
 		case RADEON_TXFORMAT_YVYU422:
-		case RADEON_TXFORMAT_DXT1:
 		case RADEON_TXFORMAT_SHADOW16:
 		case RADEON_TXFORMAT_LDUDV655:
 		case RADEON_TXFORMAT_DUDV88:
 			track->textures[i].cpp = 2;
+			track->textures[i].compress_format = R100_TRACK_COMP_NONE;
 			break;
 		case RADEON_TXFORMAT_ARGB8888:
 		case RADEON_TXFORMAT_RGBA8888:
-		case RADEON_TXFORMAT_DXT23:
-		case RADEON_TXFORMAT_DXT45:
 		case RADEON_TXFORMAT_SHADOW32:
 		case RADEON_TXFORMAT_LDUDUV8888:
 			track->textures[i].cpp = 4;
+			track->textures[i].compress_format = R100_TRACK_COMP_NONE;
+			break;
+		case RADEON_TXFORMAT_DXT1:
+			track->textures[i].cpp = 1;
+			track->textures[i].compress_format = R100_TRACK_COMP_DXT1;
+			break;
+		case RADEON_TXFORMAT_DXT23:
+		case RADEON_TXFORMAT_DXT45:
+			track->textures[i].cpp = 1;
+			track->textures[i].compress_format = R100_TRACK_COMP_DXT35;
 			break;
 		}
 		track->textures[i].cube_info[4].width = 1 << ((idx_value >> 16) & 0xf);
@@ -1288,17 +1438,17 @@
 
 int r100_cs_track_check_pkt3_indx_buffer(struct radeon_cs_parser *p,
 					 struct radeon_cs_packet *pkt,
-					 struct radeon_object *robj)
+					 struct radeon_bo *robj)
 {
 	unsigned idx;
 	u32 value;
 	idx = pkt->idx + 1;
 	value = radeon_get_ib_value(p, idx + 2);
-	if ((value + 1) > radeon_object_size(robj)) {
+	if ((value + 1) > radeon_bo_size(robj)) {
 		DRM_ERROR("[drm] Buffer too small for PACKET3 INDX_BUFFER "
 			  "(need %u have %lu) !\n",
 			  value + 1,
-			  radeon_object_size(robj));
+			  radeon_bo_size(robj));
 		return -EINVAL;
 	}
 	return 0;
@@ -1363,6 +1513,7 @@
 			DRM_ERROR("PRIM_WALK must be 3 for IMMD draw\n");
 			return -EINVAL;
 		}
+		track->vtx_size = r100_get_vtx_size(radeon_get_ib_value(p, idx + 0));
 		track->vap_vf_cntl = radeon_get_ib_value(p, idx + 1);
 		track->immd_dwords = pkt->count - 1;
 		r = r100_cs_track_check(p->rdev, track);
@@ -1650,6 +1801,17 @@
 	return 0;
 }
 
+void r100_set_common_regs(struct radeon_device *rdev)
+{
+	/* set these so they don't interfere with anything */
+	WREG32(RADEON_OV0_SCALE_CNTL, 0);
+	WREG32(RADEON_SUBPIC_CNTL, 0);
+	WREG32(RADEON_VIPH_CONTROL, 0);
+	WREG32(RADEON_I2C_CNTL_1, 0);
+	WREG32(RADEON_DVI_I2C_CNTL_1, 0);
+	WREG32(RADEON_CAP0_TRIG_CNTL, 0);
+	WREG32(RADEON_CAP1_TRIG_CNTL, 0);
+}
 
 /*
  * VRAM info
@@ -1756,6 +1918,9 @@
 		rdev->mc.vram_location = 0xFFFFFFFFUL;
 		 /* Fix for RN50, M6, M7 with 8/16/32(??) MBs of VRAM - 
 		  * Novell bug 204882 + along with lots of ubuntu ones */
+		if (rdev->mc.aper_size > config_aper_size)
+			config_aper_size = rdev->mc.aper_size;
+
 		if (config_aper_size > rdev->mc.real_vram_size)
 			rdev->mc.mc_vram_size = config_aper_size;
 		else
@@ -2588,28 +2753,63 @@
 	DRM_ERROR("coordinate type            %d\n", t->tex_coord_type);
 	DRM_ERROR("width round to power of 2  %d\n", t->roundup_w);
 	DRM_ERROR("height round to power of 2 %d\n", t->roundup_h);
+	DRM_ERROR("compress format            %d\n", t->compress_format);
+}
+
+static int r100_track_compress_size(int compress_format, int w, int h)
+{
+	int block_width, block_height, block_bytes;
+	int wblocks, hblocks;
+	int min_wblocks;
+	int sz;
+
+	block_width = 4;
+	block_height = 4;
+
+	switch (compress_format) {
+	case R100_TRACK_COMP_DXT1:
+		block_bytes = 8;
+		min_wblocks = 4;
+		break;
+	default:
+	case R100_TRACK_COMP_DXT35:
+		block_bytes = 16;
+		min_wblocks = 2;
+		break;
+	}
+
+	hblocks = (h + block_height - 1) / block_height;
+	wblocks = (w + block_width - 1) / block_width;
+	if (wblocks < min_wblocks)
+		wblocks = min_wblocks;
+	sz = wblocks * hblocks * block_bytes;
+	return sz;
 }
 
 static int r100_cs_track_cube(struct radeon_device *rdev,
 			      struct r100_cs_track *track, unsigned idx)
 {
 	unsigned face, w, h;
-	struct radeon_object *cube_robj;
+	struct radeon_bo *cube_robj;
 	unsigned long size;
+	unsigned compress_format = track->textures[idx].compress_format;
 
 	for (face = 0; face < 5; face++) {
 		cube_robj = track->textures[idx].cube_info[face].robj;
 		w = track->textures[idx].cube_info[face].width;
 		h = track->textures[idx].cube_info[face].height;
 
-		size = w * h;
+		if (compress_format) {
+			size = r100_track_compress_size(compress_format, w, h);
+		} else
+			size = w * h;
 		size *= track->textures[idx].cpp;
 
 		size += track->textures[idx].cube_info[face].offset;
 
-		if (size > radeon_object_size(cube_robj)) {
+		if (size > radeon_bo_size(cube_robj)) {
 			DRM_ERROR("Cube texture offset greater than object size %lu %lu\n",
-				  size, radeon_object_size(cube_robj));
+				  size, radeon_bo_size(cube_robj));
 			r100_cs_track_texture_print(&track->textures[idx]);
 			return -1;
 		}
@@ -2620,7 +2820,7 @@
 static int r100_cs_track_texture_check(struct radeon_device *rdev,
 				       struct r100_cs_track *track)
 {
-	struct radeon_object *robj;
+	struct radeon_bo *robj;
 	unsigned long size;
 	unsigned u, i, w, h;
 	int ret;
@@ -2628,6 +2828,8 @@
 	for (u = 0; u < track->num_texture; u++) {
 		if (!track->textures[u].enabled)
 			continue;
+		if (track->textures[u].lookup_disable)
+			continue;
 		robj = track->textures[u].robj;
 		if (robj == NULL) {
 			DRM_ERROR("No texture bound to unit %u\n", u);
@@ -2654,9 +2856,15 @@
 			h = h / (1 << i);
 			if (track->textures[u].roundup_h)
 				h = roundup_pow_of_two(h);
-			size += w * h;
+			if (track->textures[u].compress_format) {
+
+				size += r100_track_compress_size(track->textures[u].compress_format, w, h);
+				/* compressed textures are block based */
+			} else
+				size += w * h;
 		}
 		size *= track->textures[u].cpp;
+
 		switch (track->textures[u].tex_coord_type) {
 		case 0:
 			break;
@@ -2676,9 +2884,9 @@
 				  "%u\n", track->textures[u].tex_coord_type, u);
 			return -EINVAL;
 		}
-		if (size > radeon_object_size(robj)) {
+		if (size > radeon_bo_size(robj)) {
 			DRM_ERROR("Texture of unit %u needs %lu bytes but is "
-				  "%lu\n", u, size, radeon_object_size(robj));
+				  "%lu\n", u, size, radeon_bo_size(robj));
 			r100_cs_track_texture_print(&track->textures[u]);
 			return -EINVAL;
 		}
@@ -2695,15 +2903,19 @@
 
 	for (i = 0; i < track->num_cb; i++) {
 		if (track->cb[i].robj == NULL) {
+			if (!(track->fastfill || track->color_channel_mask ||
+			      track->blend_read_enable)) {
+				continue;
+			}
 			DRM_ERROR("[drm] No buffer for color buffer %d !\n", i);
 			return -EINVAL;
 		}
 		size = track->cb[i].pitch * track->cb[i].cpp * track->maxy;
 		size += track->cb[i].offset;
-		if (size > radeon_object_size(track->cb[i].robj)) {
+		if (size > radeon_bo_size(track->cb[i].robj)) {
 			DRM_ERROR("[drm] Buffer too small for color buffer %d "
 				  "(need %lu have %lu) !\n", i, size,
-				  radeon_object_size(track->cb[i].robj));
+				  radeon_bo_size(track->cb[i].robj));
 			DRM_ERROR("[drm] color buffer %d (%u %u %u %u)\n",
 				  i, track->cb[i].pitch, track->cb[i].cpp,
 				  track->cb[i].offset, track->maxy);
@@ -2717,16 +2929,37 @@
 		}
 		size = track->zb.pitch * track->zb.cpp * track->maxy;
 		size += track->zb.offset;
-		if (size > radeon_object_size(track->zb.robj)) {
+		if (size > radeon_bo_size(track->zb.robj)) {
 			DRM_ERROR("[drm] Buffer too small for z buffer "
 				  "(need %lu have %lu) !\n", size,
-				  radeon_object_size(track->zb.robj));
+				  radeon_bo_size(track->zb.robj));
 			DRM_ERROR("[drm] zbuffer (%u %u %u %u)\n",
 				  track->zb.pitch, track->zb.cpp,
 				  track->zb.offset, track->maxy);
 			return -EINVAL;
 		}
 	}
+
+	if (track->aa_dirty && track->aaresolve) {
+		if (track->aa.robj == NULL) {
+			DRM_ERROR("[drm] No buffer for AA resolve buffer %d !\n", i);
+			return -EINVAL;
+		}
+		/* I believe the format comes from colorbuffer0. */
+		size = track->aa.pitch * track->cb[0].cpp * track->maxy;
+		size += track->aa.offset;
+		if (size > radeon_bo_size(track->aa.robj)) {
+			DRM_ERROR("[drm] Buffer too small for AA resolve buffer %d "
+				  "(need %lu have %lu) !\n", i, size,
+				  radeon_bo_size(track->aa.robj));
+			DRM_ERROR("[drm] AA resolve buffer %d (%u %u %u %u)\n",
+				  i, track->aa.pitch, track->cb[0].cpp,
+				  track->aa.offset, track->maxy);
+			return -EINVAL;
+		}
+	}
+	track->aa_dirty = false;
+
 	prim_walk = (track->vap_vf_cntl >> 4) & 0x3;
 	nverts = (track->vap_vf_cntl >> 16) & 0xFFFF;
 	switch (prim_walk) {
@@ -2738,11 +2971,12 @@
 					  "bound\n", prim_walk, i);
 				return -EINVAL;
 			}
-			if (size > radeon_object_size(track->arrays[i].robj)) {
-				DRM_ERROR("(PW %u) Vertex array %u need %lu dwords "
-					   "have %lu dwords\n", prim_walk, i,
-					   size >> 2,
-					   radeon_object_size(track->arrays[i].robj) >> 2);
+			if (size > radeon_bo_size(track->arrays[i].robj)) {
+				dev_err(rdev->dev, "(PW %u) Vertex array %u "
+					"need %lu dwords have %lu dwords\n",
+					prim_walk, i, size >> 2,
+					radeon_bo_size(track->arrays[i].robj)
+					>> 2);
 				DRM_ERROR("Max indices %u\n", track->max_indx);
 				return -EINVAL;
 			}
@@ -2756,10 +2990,12 @@
 					  "bound\n", prim_walk, i);
 				return -EINVAL;
 			}
-			if (size > radeon_object_size(track->arrays[i].robj)) {
-				DRM_ERROR("(PW %u) Vertex array %u need %lu dwords "
-					   "have %lu dwords\n", prim_walk, i, size >> 2,
-					   radeon_object_size(track->arrays[i].robj) >> 2);
+			if (size > radeon_bo_size(track->arrays[i].robj)) {
+				dev_err(rdev->dev, "(PW %u) Vertex array %u "
+					"need %lu dwords have %lu dwords\n",
+					prim_walk, i, size >> 2,
+					radeon_bo_size(track->arrays[i].robj)
+					>> 2);
 				return -EINVAL;
 			}
 		}
@@ -2785,6 +3021,7 @@
 void r100_cs_track_clear(struct radeon_device *rdev, struct r100_cs_track *track)
 {
 	unsigned i, face;
+	track->aa_dirty = true;
 
 	if (rdev->family < CHIP_R300) {
 		track->num_cb = 1;
@@ -2799,6 +3036,8 @@
 		track->num_texture = 16;
 		track->maxy = 4096;
 		track->separate_cube = 0;
+		track->aaresolve = false;
+		track->aa.robj = NULL;
 	}
 
 	for (i = 0; i < track->num_cb; i++) {
@@ -2821,6 +3060,7 @@
 		track->arrays[i].esize = 0x7F;
 	}
 	for (i = 0; i < track->num_texture; i++) {
+		track->textures[i].compress_format = R100_TRACK_COMP_NONE;
 		track->textures[i].pitch = 16536;
 		track->textures[i].width = 16536;
 		track->textures[i].height = 16536;
@@ -2838,6 +3078,7 @@
 		track->textures[i].robj = NULL;
 		/* CS IB emission code makes sure texture unit are disabled */
 		track->textures[i].enabled = false;
+		track->textures[i].lookup_disable = false;
 		track->textures[i].roundup_w = true;
 		track->textures[i].roundup_h = true;
 		if (track->separate_cube)
@@ -3101,6 +3342,9 @@
 {
 	int r;
 
+	/* set common regs */
+	r100_set_common_regs(rdev);
+	/* program mc */
 	r100_mc_program(rdev);
 	/* Resume clock */
 	r100_clock_startup(rdev);
@@ -3108,14 +3352,15 @@
 	r100_gpu_init(rdev);
 	/* Initialize GART (initialize after TTM so we can allocate
 	 * memory through TTM but finalize after TTM) */
+	r100_enable_bm(rdev);
 	if (rdev->flags & RADEON_IS_PCI) {
 		r = r100_pci_gart_enable(rdev);
 		if (r)
 			return r;
 	}
 	/* Enable IRQ */
-	rdev->irq.sw_int = true;
 	r100_irq_set(rdev);
+	rdev->config.r100.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
 	/* 1M ring buffer */
 	r = r100_cp_init(rdev, 1024 * 1024);
 	if (r) {
@@ -3150,6 +3395,8 @@
 	radeon_combios_asic_init(rdev->ddev);
 	/* Resume clock after posting */
 	r100_clock_startup(rdev);
+	/* Initialize surface registers */
+	radeon_surface_init(rdev);
 	return r100_startup(rdev);
 }
 
@@ -3165,16 +3412,16 @@
 
 void r100_fini(struct radeon_device *rdev)
 {
-	r100_suspend(rdev);
 	r100_cp_fini(rdev);
 	r100_wb_fini(rdev);
 	r100_ib_fini(rdev);
 	radeon_gem_fini(rdev);
 	if (rdev->flags & RADEON_IS_PCI)
 		r100_pci_gart_fini(rdev);
+	radeon_agp_fini(rdev);
 	radeon_irq_kms_fini(rdev);
 	radeon_fence_driver_fini(rdev);
-	radeon_object_fini(rdev);
+	radeon_bo_fini(rdev);
 	radeon_atombios_fini(rdev);
 	kfree(rdev->bios);
 	rdev->bios = NULL;
@@ -3195,9 +3442,7 @@
 	if (rdev->flags & RADEON_IS_AGP) {
 		r = radeon_agp_init(rdev);
 		if (r) {
-			printk(KERN_WARNING "[drm] Disabling AGP\n");
-			rdev->flags &= ~RADEON_IS_AGP;
-			rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024;
+			radeon_agp_disable(rdev);
 		} else {
 			rdev->mc.gtt_location = rdev->mc.agp_base;
 		}
@@ -3242,14 +3487,14 @@
 			RREG32(R_0007C0_CP_STAT));
 	}
 	/* check if cards are posted or not */
-	if (!radeon_card_posted(rdev) && rdev->bios) {
-		DRM_INFO("GPU not posted. posting now...\n");
-		radeon_combios_asic_init(rdev->ddev);
-	}
+	if (radeon_boot_test_post_card(rdev) == false)
+		return -EINVAL;
 	/* Set asic errata */
 	r100_errata(rdev);
 	/* Initialize clocks */
 	radeon_get_clock_info(rdev->ddev);
+	/* Initialize power management */
+	radeon_pm_init(rdev);
 	/* Get vram informations */
 	r100_vram_info(rdev);
 	/* Initialize memory controller (also test AGP) */
@@ -3264,7 +3509,7 @@
 	if (r)
 		return r;
 	/* Memory manager */
-	r = radeon_object_init(rdev);
+	r = radeon_bo_init(rdev);
 	if (r)
 		return r;
 	if (rdev->flags & RADEON_IS_PCI) {
@@ -3278,13 +3523,12 @@
 	if (r) {
 		/* Somethings want wront with the accel init stop accel */
 		dev_err(rdev->dev, "Disabling GPU acceleration\n");
-		r100_suspend(rdev);
 		r100_cp_fini(rdev);
 		r100_wb_fini(rdev);
 		r100_ib_fini(rdev);
+		radeon_irq_kms_fini(rdev);
 		if (rdev->flags & RADEON_IS_PCI)
 			r100_pci_gart_fini(rdev);
-		radeon_irq_kms_fini(rdev);
 		rdev->accel_working = false;
 	}
 	return 0;
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/r100_track.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/r100_track.h
@@ -10,26 +10,30 @@
  * CS functions
  */
 struct r100_cs_track_cb {
-	struct radeon_object	*robj;
+	struct radeon_bo	*robj;
 	unsigned		pitch;
 	unsigned		cpp;
 	unsigned		offset;
 };
 
 struct r100_cs_track_array {
-	struct radeon_object	*robj;
+	struct radeon_bo	*robj;
 	unsigned		esize;
 };
 
 struct r100_cs_cube_info {
-	struct radeon_object	*robj;
-	unsigned                offset;
+	struct radeon_bo	*robj;
+	unsigned		offset;
 	unsigned		width;
 	unsigned		height;
 };
 
+#define R100_TRACK_COMP_NONE   0
+#define R100_TRACK_COMP_DXT1   1
+#define R100_TRACK_COMP_DXT35  2
+
 struct r100_cs_track_texture {
-	struct radeon_object	*robj;
+	struct radeon_bo	*robj;
 	struct r100_cs_cube_info cube_info[5]; /* info for 5 non-primary faces */
 	unsigned		pitch;
 	unsigned		width;
@@ -42,8 +46,10 @@
 	unsigned		height_11;
 	bool			use_pitch;
 	bool			enabled;
+	bool                    lookup_disable;
 	bool			roundup_w;
 	bool			roundup_h;
+	unsigned                compress_format;
 };
 
 struct r100_cs_track_limits {
@@ -62,13 +68,18 @@
 	unsigned			immd_dwords;
 	unsigned			num_arrays;
 	unsigned			max_indx;
+	unsigned			color_channel_mask;
 	struct r100_cs_track_array	arrays[11];
 	struct r100_cs_track_cb 	cb[R300_MAX_CB];
 	struct r100_cs_track_cb 	zb;
+	struct r100_cs_track_cb 	aa;
 	struct r100_cs_track_texture	textures[R300_TRACK_MAX_TEXTURE];
 	bool				z_enabled;
 	bool                            separate_cube;
-
+	bool				fastfill;
+	bool				blend_read_enable;
+	bool				aa_dirty;
+	bool				aaresolve;
 };
 
 int r100_cs_track_check(struct radeon_device *rdev, struct r100_cs_track *track);
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/mkregtable.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/mkregtable.c
@@ -661,8 +661,10 @@
 	fseek(file, 0, SEEK_SET);
 
 	/* get header */
-	if (fgets(buf, 1024, file) == NULL)
+	if (fgets(buf, 1024, file) == NULL) {
+		fclose(file);
 		return -1;
+	}
 
 	/* first line will contain the last register
 	 * and gpu name */
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_irq_kms.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_irq_kms.c
@@ -39,11 +39,32 @@
 	return radeon_irq_process(rdev);
 }
 
+/*
+ * Handle hotplug events outside the interrupt handler proper.
+ */
+static void radeon_hotplug_work_func(struct work_struct *work)
+{
+	struct radeon_device *rdev = container_of(work, struct radeon_device,
+						  hotplug_work);
+	struct drm_device *dev = rdev->ddev;
+	struct drm_mode_config *mode_config = &dev->mode_config;
+	struct drm_connector *connector;
+
+	if (mode_config->num_connector) {
+		list_for_each_entry(connector, &mode_config->connector_list, head)
+			radeon_connector_hotplug(connector);
+	}
+	/* Just fire off a uevent and let userspace tell us what to do */
+	drm_sysfs_hotplug_event(dev);
+}
+
 void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
 {
 	struct radeon_device *rdev = dev->dev_private;
 	unsigned i;
 
+	INIT_WORK(&rdev->hotplug_work, radeon_hotplug_work_func);
+
 	/* Disable *all* interrupts */
 	rdev->irq.sw_int = false;
 	for (i = 0; i < 2; i++) {
@@ -76,6 +97,7 @@
 	rdev->irq.sw_int = false;
 	for (i = 0; i < 2; i++) {
 		rdev->irq.crtc_vblank_int[i] = false;
+		rdev->irq.hpd[i] = false;
 	}
 	radeon_irq_set(rdev);
 }
@@ -87,30 +109,68 @@
 
 	if (rdev->flags & RADEON_SINGLE_CRTC)
 		num_crtc = 1;
-
+	spin_lock_init(&rdev->irq.sw_lock);
 	r = drm_vblank_init(rdev->ddev, num_crtc);
 	if (r) {
 		return r;
 	}
 	/* enable msi */
 	rdev->msi_enabled = 0;
-	if (rdev->family >= CHIP_RV380) {
+	/* MSIs don't seem to work reliably on all IGP
+	 * chips.  Disable MSI on them for now.
+	 */
+	if ((rdev->family >= CHIP_RV380) &&
+	    (!(rdev->flags & RADEON_IS_IGP)) &&
+	    (!(rdev->flags & RADEON_IS_AGP))) {
 		int ret = pci_enable_msi(rdev->pdev);
-		if (!ret)
+		if (!ret) {
 			rdev->msi_enabled = 1;
+			dev_info(rdev->dev, "radeon: using MSI.\n");
+		}
 	}
-	drm_irq_install(rdev->ddev);
 	rdev->irq.installed = true;
+	r = drm_irq_install(rdev->ddev);
+	if (r) {
+		rdev->irq.installed = false;
+		return r;
+	}
 	DRM_INFO("radeon: irq initialized.\n");
 	return 0;
 }
 
 void radeon_irq_kms_fini(struct radeon_device *rdev)
 {
+	drm_vblank_cleanup(rdev->ddev);
 	if (rdev->irq.installed) {
-		rdev->irq.installed = false;
 		drm_irq_uninstall(rdev->ddev);
+		rdev->irq.installed = false;
 		if (rdev->msi_enabled)
 			pci_disable_msi(rdev->pdev);
 	}
 }
+
+void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev)
+{
+	unsigned long irqflags;
+
+	spin_lock_irqsave(&rdev->irq.sw_lock, irqflags);
+	if (rdev->ddev->irq_enabled && (++rdev->irq.sw_refcount == 1)) {
+		rdev->irq.sw_int = true;
+		radeon_irq_set(rdev);
+	}
+	spin_unlock_irqrestore(&rdev->irq.sw_lock, irqflags);
+}
+
+void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev)
+{
+	unsigned long irqflags;
+
+	spin_lock_irqsave(&rdev->irq.sw_lock, irqflags);
+	BUG_ON(rdev->ddev->irq_enabled && rdev->irq.sw_refcount <= 0);
+	if (rdev->ddev->irq_enabled && (--rdev->irq.sw_refcount == 0)) {
+		rdev->irq.sw_int = false;
+		radeon_irq_set(rdev);
+	}
+	spin_unlock_irqrestore(&rdev->irq.sw_lock, irqflags);
+}
+
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_atombios.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_atombios.c
@@ -47,7 +47,8 @@
 			  int connector_type,
 			  struct radeon_i2c_bus_rec *i2c_bus,
 			  bool linkb, uint32_t igp_lane_info,
-			  uint16_t connector_object_id);
+			  uint16_t connector_object_id,
+			  struct radeon_hpd *hpd);
 
 /* from radeon_legacy_encoder.c */
 extern void
@@ -60,16 +61,16 @@
 	struct _ATOM_SUPPORTED_DEVICES_INFO_2d1 info_2d1;
 };
 
-static inline struct radeon_i2c_bus_rec radeon_lookup_gpio(struct drm_device
-							   *dev, uint8_t id)
+static inline struct radeon_i2c_bus_rec radeon_lookup_i2c_gpio(struct radeon_device *rdev,
+							       uint8_t id)
 {
-	struct radeon_device *rdev = dev->dev_private;
 	struct atom_context *ctx = rdev->mode_info.atom_context;
-	ATOM_GPIO_I2C_ASSIGMENT gpio;
+	ATOM_GPIO_I2C_ASSIGMENT *gpio;
 	struct radeon_i2c_bus_rec i2c;
 	int index = GetIndexIntoMasterTable(DATA, GPIO_I2C_Info);
 	struct _ATOM_GPIO_I2C_INFO *i2c_info;
 	uint16_t data_offset;
+	int i;
 
 	memset(&i2c, 0, sizeof(struct radeon_i2c_bus_rec));
 	i2c.valid = false;
@@ -78,35 +79,132 @@
 
 	i2c_info = (struct _ATOM_GPIO_I2C_INFO *)(ctx->bios + data_offset);
 
-	gpio = i2c_info->asGPIO_Info[id];
 
-	i2c.mask_clk_reg = le16_to_cpu(gpio.usClkMaskRegisterIndex) * 4;
-	i2c.mask_data_reg = le16_to_cpu(gpio.usDataMaskRegisterIndex) * 4;
-	i2c.put_clk_reg = le16_to_cpu(gpio.usClkEnRegisterIndex) * 4;
-	i2c.put_data_reg = le16_to_cpu(gpio.usDataEnRegisterIndex) * 4;
-	i2c.get_clk_reg = le16_to_cpu(gpio.usClkY_RegisterIndex) * 4;
-	i2c.get_data_reg = le16_to_cpu(gpio.usDataY_RegisterIndex) * 4;
-	i2c.a_clk_reg = le16_to_cpu(gpio.usClkA_RegisterIndex) * 4;
-	i2c.a_data_reg = le16_to_cpu(gpio.usDataA_RegisterIndex) * 4;
-	i2c.mask_clk_mask = (1 << gpio.ucClkMaskShift);
-	i2c.mask_data_mask = (1 << gpio.ucDataMaskShift);
-	i2c.put_clk_mask = (1 << gpio.ucClkEnShift);
-	i2c.put_data_mask = (1 << gpio.ucDataEnShift);
-	i2c.get_clk_mask = (1 << gpio.ucClkY_Shift);
-	i2c.get_data_mask = (1 << gpio.ucDataY_Shift);
-	i2c.a_clk_mask = (1 << gpio.ucClkA_Shift);
-	i2c.a_data_mask = (1 << gpio.ucDataA_Shift);
-	i2c.valid = true;
+	for (i = 0; i < ATOM_MAX_SUPPORTED_DEVICE; i++) {
+		gpio = &i2c_info->asGPIO_Info[i];
+
+			/* some DCE3 boards have bad data for this entry */
+			if (ASIC_IS_DCE3(rdev)) {
+				if ((i == 4) &&
+				    (gpio->usClkMaskRegisterIndex == 0x1fda) &&
+				    (gpio->sucI2cId.ucAccess == 0x94))
+					gpio->sucI2cId.ucAccess = 0x14;
+			}
+
+		if (gpio->sucI2cId.ucAccess == id) {
+			i2c.mask_clk_reg = le16_to_cpu(gpio->usClkMaskRegisterIndex) * 4;
+			i2c.mask_data_reg = le16_to_cpu(gpio->usDataMaskRegisterIndex) * 4;
+			i2c.en_clk_reg = le16_to_cpu(gpio->usClkEnRegisterIndex) * 4;
+			i2c.en_data_reg = le16_to_cpu(gpio->usDataEnRegisterIndex) * 4;
+			i2c.y_clk_reg = le16_to_cpu(gpio->usClkY_RegisterIndex) * 4;
+			i2c.y_data_reg = le16_to_cpu(gpio->usDataY_RegisterIndex) * 4;
+			i2c.a_clk_reg = le16_to_cpu(gpio->usClkA_RegisterIndex) * 4;
+			i2c.a_data_reg = le16_to_cpu(gpio->usDataA_RegisterIndex) * 4;
+			i2c.mask_clk_mask = (1 << gpio->ucClkMaskShift);
+			i2c.mask_data_mask = (1 << gpio->ucDataMaskShift);
+			i2c.en_clk_mask = (1 << gpio->ucClkEnShift);
+			i2c.en_data_mask = (1 << gpio->ucDataEnShift);
+			i2c.y_clk_mask = (1 << gpio->ucClkY_Shift);
+			i2c.y_data_mask = (1 << gpio->ucDataY_Shift);
+			i2c.a_clk_mask = (1 << gpio->ucClkA_Shift);
+			i2c.a_data_mask = (1 << gpio->ucDataA_Shift);
+
+			if (gpio->sucI2cId.sbfAccess.bfHW_Capable)
+				i2c.hw_capable = true;
+			else
+				i2c.hw_capable = false;
+
+			if (gpio->sucI2cId.ucAccess == 0xa0)
+				i2c.mm_i2c = true;
+			else
+				i2c.mm_i2c = false;
+
+			i2c.i2c_id = gpio->sucI2cId.ucAccess;
+
+			i2c.valid = true;
+			break;
+		}
+	}
 
 	return i2c;
 }
 
+static inline struct radeon_gpio_rec radeon_lookup_gpio(struct radeon_device *rdev,
+							u8 id)
+{
+	struct atom_context *ctx = rdev->mode_info.atom_context;
+	struct radeon_gpio_rec gpio;
+	int index = GetIndexIntoMasterTable(DATA, GPIO_Pin_LUT);
+	struct _ATOM_GPIO_PIN_LUT *gpio_info;
+	ATOM_GPIO_PIN_ASSIGNMENT *pin;
+	u16 data_offset, size;
+	int i, num_indices;
+
+	memset(&gpio, 0, sizeof(struct radeon_gpio_rec));
+	gpio.valid = false;
+
+	atom_parse_data_header(ctx, index, &size, NULL, NULL, &data_offset);
+
+	gpio_info = (struct _ATOM_GPIO_PIN_LUT *)(ctx->bios + data_offset);
+
+	num_indices = (size - sizeof(ATOM_COMMON_TABLE_HEADER)) / sizeof(ATOM_GPIO_PIN_ASSIGNMENT);
+
+	for (i = 0; i < num_indices; i++) {
+		pin = &gpio_info->asGPIO_Pin[i];
+		if (id == pin->ucGPIO_ID) {
+			gpio.id = pin->ucGPIO_ID;
+			gpio.reg = pin->usGpioPin_AIndex * 4;
+			gpio.mask = (1 << pin->ucGpioPinBitShift);
+			gpio.valid = true;
+			break;
+		}
+	}
+
+	return gpio;
+}
+
+static struct radeon_hpd radeon_atom_get_hpd_info_from_gpio(struct radeon_device *rdev,
+							    struct radeon_gpio_rec *gpio)
+{
+	struct radeon_hpd hpd;
+	hpd.gpio = *gpio;
+	if (gpio->reg == AVIVO_DC_GPIO_HPD_A) {
+		switch(gpio->mask) {
+		case (1 << 0):
+			hpd.hpd = RADEON_HPD_1;
+			break;
+		case (1 << 8):
+			hpd.hpd = RADEON_HPD_2;
+			break;
+		case (1 << 16):
+			hpd.hpd = RADEON_HPD_3;
+			break;
+		case (1 << 24):
+			hpd.hpd = RADEON_HPD_4;
+			break;
+		case (1 << 26):
+			hpd.hpd = RADEON_HPD_5;
+			break;
+		case (1 << 28):
+			hpd.hpd = RADEON_HPD_6;
+			break;
+		default:
+			hpd.hpd = RADEON_HPD_NONE;
+			break;
+		}
+	} else
+		hpd.hpd = RADEON_HPD_NONE;
+	return hpd;
+}
+
 static bool radeon_atom_apply_quirks(struct drm_device *dev,
 				     uint32_t supported_device,
 				     int *connector_type,
 				     struct radeon_i2c_bus_rec *i2c_bus,
-				     uint16_t *line_mux)
+				     uint16_t *line_mux,
+				     struct radeon_hpd *hpd)
 {
+	struct radeon_device *rdev = dev->dev_private;
 
 	/* Asus M2A-VM HDMI board lists the DVI port as HDMI */
 	if ((dev->pdev->device == 0x791e) &&
@@ -117,6 +215,15 @@
 			*connector_type = DRM_MODE_CONNECTOR_DVID;
 	}
 
+	/* Asrock RS600 board lists the DVI port as HDMI */
+	if ((dev->pdev->device == 0x7941) &&
+	    (dev->pdev->subsystem_vendor == 0x1849) &&
+	    (dev->pdev->subsystem_device == 0x7941)) {
+		if ((*connector_type == DRM_MODE_CONNECTOR_HDMIA) &&
+		    (supported_device == ATOM_DEVICE_DFP3_SUPPORT))
+			*connector_type = DRM_MODE_CONNECTOR_DVID;
+	}
+
 	/* a-bit f-i90hd - ciaranm on #radeonhd - this board has no DVI */
 	if ((dev->pdev->device == 0x7941) &&
 	    (dev->pdev->subsystem_vendor == 0x147b) &&
@@ -135,6 +242,23 @@
 		}
 	}
 
+	/* HIS X1300 is DVI+VGA, not DVI+DVI */
+	if ((dev->pdev->device == 0x7146) &&
+	    (dev->pdev->subsystem_vendor == 0x17af) &&
+	    (dev->pdev->subsystem_device == 0x2058)) {
+		if (supported_device == ATOM_DEVICE_DFP1_SUPPORT)
+			return false;
+	}
+
+	/* Gigabyte X1300 is DVI+VGA, not DVI+DVI */
+	if ((dev->pdev->device == 0x7142) &&
+	    (dev->pdev->subsystem_vendor == 0x1458) &&
+	    (dev->pdev->subsystem_device == 0x2134)) {
+		if (supported_device == ATOM_DEVICE_DFP1_SUPPORT)
+			return false;
+	}
+
+
 	/* Funky macbooks */
 	if ((dev->pdev->device == 0x71C5) &&
 	    (dev->pdev->subsystem_vendor == 0x106b) &&
@@ -142,6 +266,15 @@
 		if ((supported_device == ATOM_DEVICE_CRT1_SUPPORT) ||
 		    (supported_device == ATOM_DEVICE_DFP2_SUPPORT))
 			return false;
+		if (supported_device == ATOM_DEVICE_CRT2_SUPPORT)
+			*line_mux = 0x90;
+	}
+
+	/* mac rv630, rv730, others */
+	if ((supported_device == ATOM_DEVICE_TV1_SUPPORT) &&
+	    (*connector_type == DRM_MODE_CONNECTOR_DVII)) {
+		*connector_type = DRM_MODE_CONNECTOR_9PinDIN;
+		*line_mux = CONNECTOR_7PIN_DIN_ENUM_ID1;
 	}
 
 	/* ASUS HD 3600 XT board lists the DVI port as HDMI */
@@ -153,6 +286,15 @@
 		}
 	}
 
+	/* ASUS HD 3600 board lists the DVI port as HDMI */
+	if ((dev->pdev->device == 0x9598) &&
+	    (dev->pdev->subsystem_vendor == 0x1043) &&
+	    (dev->pdev->subsystem_device == 0x01e4)) {
+		if (*connector_type == DRM_MODE_CONNECTOR_HDMIA) {
+			*connector_type = DRM_MODE_CONNECTOR_DVII;
+		}
+	}
+
 	/* ASUS HD 3450 board lists the DVI port as HDMI */
 	if ((dev->pdev->device == 0x95C5) &&
 	    (dev->pdev->subsystem_vendor == 0x1043) &&
@@ -172,6 +314,33 @@
 		}
 	}
 
+	/* Acer laptop reports DVI-D as DVI-I and hpd pins reversed */
+	if ((dev->pdev->device == 0x95c4) &&
+	    (dev->pdev->subsystem_vendor == 0x1025) &&
+	    (dev->pdev->subsystem_device == 0x013c)) {
+		struct radeon_gpio_rec gpio;
+
+		if ((*connector_type == DRM_MODE_CONNECTOR_DVII) &&
+		    (supported_device == ATOM_DEVICE_DFP1_SUPPORT)) {
+			gpio = radeon_lookup_gpio(rdev, 6);
+			*hpd = radeon_atom_get_hpd_info_from_gpio(rdev, &gpio);
+			*connector_type = DRM_MODE_CONNECTOR_DVID;
+		} else if ((*connector_type == DRM_MODE_CONNECTOR_HDMIA) &&
+			   (supported_device == ATOM_DEVICE_DFP1_SUPPORT)) {
+			gpio = radeon_lookup_gpio(rdev, 7);
+			*hpd = radeon_atom_get_hpd_info_from_gpio(rdev, &gpio);
+		}
+	}
+
+	/* XFX Pine Group device rv730 reports no VGA DDC lines
+	 * even though they are wired up to record 0x93
+	 */
+	if ((dev->pdev->device == 0x9498) &&
+	    (dev->pdev->subsystem_vendor == 0x1682) &&
+	    (dev->pdev->subsystem_device == 0x2452)) {
+		struct radeon_device *rdev = dev->dev_private;
+		*i2c_bus = radeon_lookup_i2c_gpio(rdev, 0x93);
+	}
 	return true;
 }
 
@@ -231,7 +400,9 @@
 	DRM_MODE_CONNECTOR_Unknown,
 	DRM_MODE_CONNECTOR_Unknown,
 	DRM_MODE_CONNECTOR_Unknown,
-	DRM_MODE_CONNECTOR_DisplayPort
+	DRM_MODE_CONNECTOR_DisplayPort,
+	DRM_MODE_CONNECTOR_eDP,
+	DRM_MODE_CONNECTOR_Unknown
 };
 
 bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev)
@@ -240,16 +411,18 @@
 	struct radeon_mode_info *mode_info = &rdev->mode_info;
 	struct atom_context *ctx = mode_info->atom_context;
 	int index = GetIndexIntoMasterTable(DATA, Object_Header);
-	uint16_t size, data_offset;
-	uint8_t frev, crev, line_mux = 0;
+	u16 size, data_offset;
+	u8 frev, crev;
 	ATOM_CONNECTOR_OBJECT_TABLE *con_obj;
 	ATOM_DISPLAY_OBJECT_PATH_TABLE *path_obj;
 	ATOM_OBJECT_HEADER *obj_header;
 	int i, j, path_size, device_support;
 	int connector_type;
-	uint16_t igp_lane_info, conn_id, connector_object_id;
+	u16 igp_lane_info, conn_id, connector_object_id;
 	bool linkb;
 	struct radeon_i2c_bus_rec ddc_bus;
+	struct radeon_gpio_rec gpio;
+	struct radeon_hpd hpd;
 
 	atom_parse_data_header(ctx, index, &size, &frev, &crev, &data_offset);
 
@@ -276,7 +449,6 @@
 		path = (ATOM_DISPLAY_OBJECT_PATH *) addr;
 		path_size += le16_to_cpu(path->usSize);
 		linkb = false;
-
 		if (device_support & le16_to_cpu(path->usDeviceTag)) {
 			uint8_t con_obj_id, con_obj_num, con_obj_type;
 
@@ -377,10 +549,11 @@
 				}
 			}
 
-			/* look up gpio for ddc */
+			/* look up gpio for ddc, hpd */
+			ddc_bus.valid = false;
+			hpd.hpd = RADEON_HPD_NONE;
 			if ((le16_to_cpu(path->usDeviceTag) &
-			     (ATOM_DEVICE_TV_SUPPORT | ATOM_DEVICE_CV_SUPPORT))
-			    == 0) {
+			     (ATOM_DEVICE_TV_SUPPORT | ATOM_DEVICE_CV_SUPPORT)) == 0) {
 				for (j = 0; j < con_obj->ucNumberOfObjects; j++) {
 					if (le16_to_cpu(path->usConnObjectId) ==
 					    le16_to_cpu(con_obj->asObjects[j].
@@ -394,21 +567,34 @@
 								 asObjects[j].
 								 usRecordOffset));
 						ATOM_I2C_RECORD *i2c_record;
+						ATOM_HPD_INT_RECORD *hpd_record;
+						ATOM_I2C_ID_CONFIG_ACCESS *i2c_config;
+						hpd.hpd = RADEON_HPD_NONE;
 
 						while (record->ucRecordType > 0
 						       && record->
 						       ucRecordType <=
 						       ATOM_MAX_OBJECT_RECORD_NUMBER) {
-							switch (record->
-								ucRecordType) {
+							switch (record->ucRecordType) {
 							case ATOM_I2C_RECORD_TYPE:
 								i2c_record =
-								    (ATOM_I2C_RECORD
-								     *) record;
-								line_mux =
-								    i2c_record->
-								    sucI2cId.
-								    bfI2C_LineMux;
+								    (ATOM_I2C_RECORD *)
+									record;
+								i2c_config =
+									(ATOM_I2C_ID_CONFIG_ACCESS *)
+									&i2c_record->sucI2cId;
+								ddc_bus = radeon_lookup_i2c_gpio(rdev,
+												 i2c_config->
+												 ucAccess);
+								break;
+							case ATOM_HPD_INT_RECORD_TYPE:
+								hpd_record =
+									(ATOM_HPD_INT_RECORD *)
+									record;
+								gpio = radeon_lookup_gpio(rdev,
+											  hpd_record->ucHPDIntGPIOID);
+								hpd = radeon_atom_get_hpd_info_from_gpio(rdev, &gpio);
+								hpd.plugged_state = hpd_record->ucPlugged_PinState;
 								break;
 							}
 							record =
@@ -421,24 +607,13 @@
 						break;
 					}
 				}
-			} else
-				line_mux = 0;
-
-			if ((le16_to_cpu(path->usDeviceTag) ==
-			     ATOM_DEVICE_TV1_SUPPORT)
-			    || (le16_to_cpu(path->usDeviceTag) ==
-				ATOM_DEVICE_TV2_SUPPORT)
-			    || (le16_to_cpu(path->usDeviceTag) ==
-				ATOM_DEVICE_CV_SUPPORT))
-				ddc_bus.valid = false;
-			else
-				ddc_bus = radeon_lookup_gpio(dev, line_mux);
+			}
 
 			conn_id = le16_to_cpu(path->usConnObjectId);
 
 			if (!radeon_atom_apply_quirks
 			    (dev, le16_to_cpu(path->usDeviceTag), &connector_type,
-			     &ddc_bus, &conn_id))
+			     &ddc_bus, &conn_id, &hpd))
 				continue;
 
 			radeon_add_atom_connector(dev,
@@ -447,7 +622,8 @@
 							      usDeviceTag),
 						  connector_type, &ddc_bus,
 						  linkb, igp_lane_info,
-						  connector_object_id);
+						  connector_object_id,
+						  &hpd);
 
 		}
 	}
@@ -502,6 +678,7 @@
 	uint16_t devices;
 	int connector_type;
 	struct radeon_i2c_bus_rec ddc_bus;
+	struct radeon_hpd hpd;
 };
 
 bool radeon_get_atom_connector_info_from_supported_devices_table(struct
@@ -517,7 +694,7 @@
 	uint16_t device_support;
 	uint8_t dac;
 	union atom_supported_devices *supported_devices;
-	int i, j;
+	int i, j, max_device;
 	struct bios_connector bios_connectors[ATOM_MAX_SUPPORTED_DEVICE];
 
 	atom_parse_data_header(ctx, index, &size, &frev, &crev, &data_offset);
@@ -527,7 +704,12 @@
 
 	device_support = le16_to_cpu(supported_devices->info.usDeviceSupport);
 
-	for (i = 0; i < ATOM_MAX_SUPPORTED_DEVICE; i++) {
+	if (frev > 1)
+		max_device = ATOM_MAX_SUPPORTED_DEVICE;
+	else
+		max_device = ATOM_MAX_SUPPORTED_DEVICE_INFO;
+
+	for (i = 0; i < max_device; i++) {
 		ATOM_CONNECTOR_INFO_I2C ci =
 		    supported_devices->info.asConnInfo[i];
 
@@ -553,22 +735,8 @@
 
 		dac = ci.sucConnectorInfo.sbfAccess.bfAssociatedDAC;
 
-		if ((rdev->family == CHIP_RS690) ||
-		    (rdev->family == CHIP_RS740)) {
-			if ((i == ATOM_DEVICE_DFP2_INDEX)
-			    && (ci.sucI2cId.sbfAccess.bfI2C_LineMux == 2))
-				bios_connectors[i].line_mux =
-				    ci.sucI2cId.sbfAccess.bfI2C_LineMux + 1;
-			else if ((i == ATOM_DEVICE_DFP3_INDEX)
-				 && (ci.sucI2cId.sbfAccess.bfI2C_LineMux == 1))
-				bios_connectors[i].line_mux =
-				    ci.sucI2cId.sbfAccess.bfI2C_LineMux + 1;
-			else
-				bios_connectors[i].line_mux =
-				    ci.sucI2cId.sbfAccess.bfI2C_LineMux;
-		} else
-			bios_connectors[i].line_mux =
-			    ci.sucI2cId.sbfAccess.bfI2C_LineMux;
+		bios_connectors[i].line_mux =
+			ci.sucI2cId.ucAccess;
 
 		/* give tv unique connector ids */
 		if (i == ATOM_DEVICE_TV1_INDEX) {
@@ -582,8 +750,30 @@
 			bios_connectors[i].line_mux = 52;
 		} else
 			bios_connectors[i].ddc_bus =
-			    radeon_lookup_gpio(dev,
-					       bios_connectors[i].line_mux);
+			    radeon_lookup_i2c_gpio(rdev,
+						   bios_connectors[i].line_mux);
+
+		if ((crev > 1) && (frev > 1)) {
+			u8 isb = supported_devices->info_2d1.asIntSrcInfo[i].ucIntSrcBitmap;
+			switch (isb) {
+			case 0x4:
+				bios_connectors[i].hpd.hpd = RADEON_HPD_1;
+				break;
+			case 0xa:
+				bios_connectors[i].hpd.hpd = RADEON_HPD_2;
+				break;
+			default:
+				bios_connectors[i].hpd.hpd = RADEON_HPD_NONE;
+				break;
+			}
+		} else {
+			if (i == ATOM_DEVICE_DFP1_INDEX)
+				bios_connectors[i].hpd.hpd = RADEON_HPD_1;
+			else if (i == ATOM_DEVICE_DFP2_INDEX)
+				bios_connectors[i].hpd.hpd = RADEON_HPD_2;
+			else
+				bios_connectors[i].hpd.hpd = RADEON_HPD_NONE;
+		}
 
 		/* Always set the connector type to VGA for CRT1/CRT2. if they are
 		 * shared with a DVI port, we'll pick up the DVI connector when we
@@ -595,7 +785,8 @@
 
 		if (!radeon_atom_apply_quirks
 		    (dev, (1 << i), &bios_connectors[i].connector_type,
-		     &bios_connectors[i].ddc_bus, &bios_connectors[i].line_mux))
+		     &bios_connectors[i].ddc_bus, &bios_connectors[i].line_mux,
+		     &bios_connectors[i].hpd))
 			continue;
 
 		bios_connectors[i].valid = true;
@@ -610,41 +801,42 @@
 		else
 			radeon_add_legacy_encoder(dev,
 						  radeon_get_encoder_id(dev,
-									(1 <<
-									 i),
+									(1 << i),
 									dac),
 						  (1 << i));
 	}
 
 	/* combine shared connectors */
-	for (i = 0; i < ATOM_MAX_SUPPORTED_DEVICE; i++) {
+	for (i = 0; i < max_device; i++) {
 		if (bios_connectors[i].valid) {
-			for (j = 0; j < ATOM_MAX_SUPPORTED_DEVICE; j++) {
+			for (j = 0; j < max_device; j++) {
 				if (bios_connectors[j].valid && (i != j)) {
 					if (bios_connectors[i].line_mux ==
 					    bios_connectors[j].line_mux) {
-						if (((bios_connectors[i].
-						      devices &
-						      (ATOM_DEVICE_DFP_SUPPORT))
-						     && (bios_connectors[j].
-							 devices &
-							 (ATOM_DEVICE_CRT_SUPPORT)))
-						    ||
-						    ((bios_connectors[j].
-						      devices &
-						      (ATOM_DEVICE_DFP_SUPPORT))
-						     && (bios_connectors[i].
-							 devices &
-							 (ATOM_DEVICE_CRT_SUPPORT)))) {
-							bios_connectors[i].
-							    devices |=
-							    bios_connectors[j].
-							    devices;
-							bios_connectors[i].
-							    connector_type =
-							    DRM_MODE_CONNECTOR_DVII;
-							bios_connectors[j].
-							    valid = false;
+						/* make sure not to combine LVDS */
+						if (bios_connectors[i].devices & (ATOM_DEVICE_LCD_SUPPORT)) {
+							bios_connectors[i].line_mux = 53;
+							bios_connectors[i].ddc_bus.valid = false;
+							continue;
+						}
+						if (bios_connectors[j].devices & (ATOM_DEVICE_LCD_SUPPORT)) {
+							bios_connectors[j].line_mux = 53;
+							bios_connectors[j].ddc_bus.valid = false;
+							continue;
+						}
+						/* combine analog and digital for DVI-I */
+						if (((bios_connectors[i].devices & (ATOM_DEVICE_DFP_SUPPORT)) &&
+						     (bios_connectors[j].devices & (ATOM_DEVICE_CRT_SUPPORT))) ||
+						    ((bios_connectors[j].devices & (ATOM_DEVICE_DFP_SUPPORT)) &&
+						     (bios_connectors[i].devices & (ATOM_DEVICE_CRT_SUPPORT)))) {
+							bios_connectors[i].devices |=
+								bios_connectors[j].devices;
+							bios_connectors[i].connector_type =
+								DRM_MODE_CONNECTOR_DVII;
+							if (bios_connectors[j].devices & (ATOM_DEVICE_DFP_SUPPORT))
+								bios_connectors[i].hpd =
+									bios_connectors[j].hpd;
+							bios_connectors[j].valid = false;
 						}
 					}
 				}
@@ -653,7 +845,7 @@
 	}
 
 	/* add the connectors */
-	for (i = 0; i < ATOM_MAX_SUPPORTED_DEVICE; i++) {
+	for (i = 0; i < max_device; i++) {
 		if (bios_connectors[i].valid) {
 			uint16_t connector_object_id =
 				atombios_get_connector_object_id(dev,
@@ -666,7 +858,8 @@
 						  connector_type,
 						  &bios_connectors[i].ddc_bus,
 						  false, 0,
-						  connector_object_id);
+						  connector_object_id,
+						  &bios_connectors[i].hpd);
 		}
 	}
 
@@ -731,7 +924,8 @@
 			 * pre-DCE 3.0 r6xx hardware.  This might need to be adjusted per
 			 * family.
 			 */
-			p1pll->pll_out_min = 64800;
+			if (!radeon_new_pll)
+				p1pll->pll_out_min = 64800;
 		}
 
 		p1pll->pll_in_min =
@@ -797,6 +991,47 @@
 	return false;
 }
 
+union igp_info {
+	struct _ATOM_INTEGRATED_SYSTEM_INFO info;
+	struct _ATOM_INTEGRATED_SYSTEM_INFO_V2 info_2;
+};
+
+bool radeon_atombios_sideport_present(struct radeon_device *rdev)
+{
+	struct radeon_mode_info *mode_info = &rdev->mode_info;
+	int index = GetIndexIntoMasterTable(DATA, IntegratedSystemInfo);
+	union igp_info *igp_info;
+	u8 frev, crev;
+	u16 data_offset;
+
+	/* sideport is AMD only */
+	if (rdev->family == CHIP_RS600)
+		return false;
+
+	atom_parse_data_header(mode_info->atom_context, index, NULL, &frev,
+			       &crev, &data_offset);
+
+	igp_info = (union igp_info *)(mode_info->atom_context->bios +
+				      data_offset);
+
+	if (igp_info) {
+		switch (crev) {
+		case 1:
+			if (igp_info->info.ulBootUpMemoryClock)
+				return true;
+			break;
+		case 2:
+			if (igp_info->info_2.ulBootUpSidePortClock)
+				return true;
+			break;
+		default:
+			DRM_ERROR("Unsupported IGP table: %d %d\n", frev, crev);
+			break;
+		}
+	}
+	return false;
+}
+
 bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
 				   struct radeon_encoder_int_tmds *tmds)
 {
@@ -861,6 +1096,7 @@
 	struct _ATOM_SPREAD_SPECTRUM_INFO *ss_info;
 	uint8_t frev, crev;
 	struct radeon_atom_ss *ss = NULL;
+	int i;
 
 	if (id > ATOM_MAX_SS_ENTRY)
 		return NULL;
@@ -878,12 +1114,18 @@
 		if (!ss)
 			return NULL;
 
-		ss->percentage = le16_to_cpu(ss_info->asSS_Info[id].usSpreadSpectrumPercentage);
-		ss->type = ss_info->asSS_Info[id].ucSpreadSpectrumType;
-		ss->step = ss_info->asSS_Info[id].ucSS_Step;
-		ss->delay = ss_info->asSS_Info[id].ucSS_Delay;
-		ss->range = ss_info->asSS_Info[id].ucSS_Range;
-		ss->refdiv = ss_info->asSS_Info[id].ucRecommendedRef_Div;
+		for (i = 0; i < ATOM_MAX_SS_ENTRY; i++) {
+			if (ss_info->asSS_Info[i].ucSS_Id == id) {
+				ss->percentage =
+					le16_to_cpu(ss_info->asSS_Info[i].usSpreadSpectrumPercentage);
+				ss->type = ss_info->asSS_Info[i].ucSpreadSpectrumType;
+				ss->step = ss_info->asSS_Info[i].ucSS_Step;
+				ss->delay = ss_info->asSS_Info[i].ucSS_Delay;
+				ss->range = ss_info->asSS_Info[i].ucSS_Range;
+				ss->refdiv = ss_info->asSS_Info[i].ucRecommendedRef_Div;
+				break;
+			}
+		}
 	}
 	return ss;
 }
@@ -901,7 +1143,7 @@
 	struct radeon_device *rdev = dev->dev_private;
 	struct radeon_mode_info *mode_info = &rdev->mode_info;
 	int index = GetIndexIntoMasterTable(DATA, LVDS_Info);
-	uint16_t data_offset;
+	uint16_t data_offset, misc;
 	union lvds_info *lvds_info;
 	uint8_t frev, crev;
 	struct radeon_encoder_atom_dig *lvds = NULL;
@@ -934,17 +1176,42 @@
 		lvds->native_mode.vtotal = lvds->native_mode.vdisplay +
 			le16_to_cpu(lvds_info->info.sLCDTiming.usVBlanking_Time);
 		lvds->native_mode.vsync_start = lvds->native_mode.vdisplay +
-			le16_to_cpu(lvds_info->info.sLCDTiming.usVSyncWidth);
+			le16_to_cpu(lvds_info->info.sLCDTiming.usVSyncOffset);
 		lvds->native_mode.vsync_end = lvds->native_mode.vsync_start +
 			le16_to_cpu(lvds_info->info.sLCDTiming.usVSyncWidth);
 		lvds->panel_pwr_delay =
 		    le16_to_cpu(lvds_info->info.usOffDelayInMs);
 		lvds->lvds_misc = lvds_info->info.ucLVDS_Misc;
+
+		misc = le16_to_cpu(lvds_info->info.sLCDTiming.susModeMiscInfo.usAccess);
+		if (misc & ATOM_VSYNC_POLARITY)
+			lvds->native_mode.flags |= DRM_MODE_FLAG_NVSYNC;
+		if (misc & ATOM_HSYNC_POLARITY)
+			lvds->native_mode.flags |= DRM_MODE_FLAG_NHSYNC;
+		if (misc & ATOM_COMPOSITESYNC)
+			lvds->native_mode.flags |= DRM_MODE_FLAG_CSYNC;
+		if (misc & ATOM_INTERLACE)
+			lvds->native_mode.flags |= DRM_MODE_FLAG_INTERLACE;
+		if (misc & ATOM_DOUBLE_CLOCK_MODE)
+			lvds->native_mode.flags |= DRM_MODE_FLAG_DBLSCAN;
+
 		/* set crtc values */
 		drm_mode_set_crtcinfo(&lvds->native_mode, CRTC_INTERLACE_HALVE_V);
 
 		lvds->ss = radeon_atombios_get_ss_info(encoder, lvds_info->info.ucSS_Id);
 
+		if (ASIC_IS_AVIVO(rdev)) {
+			if (radeon_new_pll == 0)
+				lvds->pll_algo = PLL_ALGO_LEGACY;
+			else
+				lvds->pll_algo = PLL_ALGO_NEW;
+		} else {
+			if (radeon_new_pll == 1)
+				lvds->pll_algo = PLL_ALGO_NEW;
+			else
+				lvds->pll_algo = PLL_ALGO_LEGACY;
+		}
+
 		encoder->native_mode = lvds->native_mode;
 	}
 	return lvds;
@@ -1074,6 +1341,61 @@
 	return true;
 }
 
+enum radeon_tv_std
+radeon_atombios_get_tv_info(struct radeon_device *rdev)
+{
+	struct radeon_mode_info *mode_info = &rdev->mode_info;
+	int index = GetIndexIntoMasterTable(DATA, AnalogTV_Info);
+	uint16_t data_offset;
+	uint8_t frev, crev;
+	struct _ATOM_ANALOG_TV_INFO *tv_info;
+	enum radeon_tv_std tv_std = TV_STD_NTSC;
+
+	atom_parse_data_header(mode_info->atom_context, index, NULL, &frev, &crev, &data_offset);
+
+	tv_info = (struct _ATOM_ANALOG_TV_INFO *)(mode_info->atom_context->bios + data_offset);
+
+	switch (tv_info->ucTV_BootUpDefaultStandard) {
+	case ATOM_TV_NTSC:
+		tv_std = TV_STD_NTSC;
+		DRM_INFO("Default TV standard: NTSC\n");
+		break;
+	case ATOM_TV_NTSCJ:
+		tv_std = TV_STD_NTSC_J;
+		DRM_INFO("Default TV standard: NTSC-J\n");
+		break;
+	case ATOM_TV_PAL:
+		tv_std = TV_STD_PAL;
+		DRM_INFO("Default TV standard: PAL\n");
+		break;
+	case ATOM_TV_PALM:
+		tv_std = TV_STD_PAL_M;
+		DRM_INFO("Default TV standard: PAL-M\n");
+		break;
+	case ATOM_TV_PALN:
+		tv_std = TV_STD_PAL_N;
+		DRM_INFO("Default TV standard: PAL-N\n");
+		break;
+	case ATOM_TV_PALCN:
+		tv_std = TV_STD_PAL_CN;
+		DRM_INFO("Default TV standard: PAL-CN\n");
+		break;
+	case ATOM_TV_PAL60:
+		tv_std = TV_STD_PAL_60;
+		DRM_INFO("Default TV standard: PAL-60\n");
+		break;
+	case ATOM_TV_SECAM:
+		tv_std = TV_STD_SECAM;
+		DRM_INFO("Default TV standard: SECAM\n");
+		break;
+	default:
+		tv_std = TV_STD_NTSC;
+		DRM_INFO("Unknown TV standard; defaulting to NTSC\n");
+		break;
+	}
+	return tv_std;
+}
+
 struct radeon_encoder_tv_dac *
 radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder)
 {
@@ -1109,6 +1431,7 @@
 		dac = dac_info->ucDAC2_NTSC_DAC_Adjustment;
 		tv_dac->ntsc_tvdac_adj = (bg << 16) | (dac << 20);
 
+		tv_dac->tv_std = radeon_atombios_get_tv_info(rdev);
 	}
 	return tv_dac;
 }
@@ -1193,7 +1516,7 @@
 	bios_2_scratch &= ~ATOM_S2_VRI_BRIGHT_ENABLE;
 
 	/* tell the bios not to handle mode switching */
-	bios_6_scratch |= (ATOM_S6_ACC_BLOCK_DISPLAY_SWITCH | ATOM_S6_ACC_MODE);
+	bios_6_scratch |= ATOM_S6_ACC_BLOCK_DISPLAY_SWITCH;
 
 	if (rdev->family >= CHIP_R600) {
 		WREG32(R600_BIOS_2_SCRATCH, bios_2_scratch);
@@ -1244,10 +1567,13 @@
 	else
 		bios_6_scratch = RREG32(RADEON_BIOS_6_SCRATCH);
 
-	if (lock)
+	if (lock) {
 		bios_6_scratch |= ATOM_S6_CRITICAL_STATE;
-	else
+		bios_6_scratch &= ~ATOM_S6_ACC_MODE;
+	} else {
 		bios_6_scratch &= ~ATOM_S6_CRITICAL_STATE;
+		bios_6_scratch |= ATOM_S6_ACC_MODE;
+	}
 
 	if (rdev->family >= CHIP_R600)
 		WREG32(R600_BIOS_6_SCRATCH, bios_6_scratch);
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/r600_hdmi.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/r600_hdmi.c
@@ -0,0 +1,506 @@
+/*
+ * Copyright 2008 Advanced Micro Devices, Inc.
+ * Copyright 2008 Red Hat Inc.
+ * Copyright 2009 Christian König.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Christian König
+ */
+#include "drmP.h"
+#include "radeon_drm.h"
+#include "radeon.h"
+#include "atom.h"
+
+/*
+ * HDMI color format
+ */
+enum r600_hdmi_color_format {
+	RGB = 0,
+	YCC_422 = 1,
+	YCC_444 = 2
+};
+
+/*
+ * IEC60958 status bits
+ */
+enum r600_hdmi_iec_status_bits {
+	AUDIO_STATUS_DIG_ENABLE   = 0x01,
+	AUDIO_STATUS_V	    = 0x02,
+	AUDIO_STATUS_VCFG	 = 0x04,
+	AUDIO_STATUS_EMPHASIS     = 0x08,
+	AUDIO_STATUS_COPYRIGHT    = 0x10,
+	AUDIO_STATUS_NONAUDIO     = 0x20,
+	AUDIO_STATUS_PROFESSIONAL = 0x40,
+	AUDIO_STATUS_LEVEL	= 0x80
+};
+
+struct {
+	uint32_t Clock;
+
+	int N_32kHz;
+	int CTS_32kHz;
+
+	int N_44_1kHz;
+	int CTS_44_1kHz;
+
+	int N_48kHz;
+	int CTS_48kHz;
+
+} r600_hdmi_ACR[] = {
+    /*	     32kHz	  44.1kHz	48kHz    */
+    /* Clock      N     CTS      N     CTS      N     CTS */
+    {  25174,  4576,  28125,  7007,  31250,  6864,  28125 }, /*  25,20/1.001 MHz */
+    {  25200,  4096,  25200,  6272,  28000,  6144,  25200 }, /*  25.20       MHz */
+    {  27000,  4096,  27000,  6272,  30000,  6144,  27000 }, /*  27.00       MHz */
+    {  27027,  4096,  27027,  6272,  30030,  6144,  27027 }, /*  27.00*1.001 MHz */
+    {  54000,  4096,  54000,  6272,  60000,  6144,  54000 }, /*  54.00       MHz */
+    {  54054,  4096,  54054,  6272,  60060,  6144,  54054 }, /*  54.00*1.001 MHz */
+    {  74175, 11648, 210937, 17836, 234375, 11648, 140625 }, /*  74.25/1.001 MHz */
+    {  74250,  4096,  74250,  6272,  82500,  6144,  74250 }, /*  74.25       MHz */
+    { 148351, 11648, 421875,  8918, 234375,  5824, 140625 }, /* 148.50/1.001 MHz */
+    { 148500,  4096, 148500,  6272, 165000,  6144, 148500 }, /* 148.50       MHz */
+    {      0,  4096,      0,  6272,      0,  6144,      0 }  /* Other */
+};
+
+/*
+ * calculate CTS value if it's not found in the table
+ */
+static void r600_hdmi_calc_CTS(uint32_t clock, int *CTS, int N, int freq)
+{
+	if (*CTS == 0)
+		*CTS = clock*N/(128*freq)*1000;
+	DRM_DEBUG("Using ACR timing N=%d CTS=%d for frequency %d\n",
+		  N, *CTS, freq);
+}
+
+/*
+ * update the N and CTS parameters for a given pixel clock rate
+ */
+static void r600_hdmi_update_ACR(struct drm_encoder *encoder, uint32_t clock)
+{
+	struct drm_device *dev = encoder->dev;
+	struct radeon_device *rdev = dev->dev_private;
+	uint32_t offset = to_radeon_encoder(encoder)->hdmi_offset;
+	int CTS;
+	int N;
+	int i;
+
+	for (i = 0; r600_hdmi_ACR[i].Clock != clock && r600_hdmi_ACR[i].Clock != 0; i++);
+
+	CTS = r600_hdmi_ACR[i].CTS_32kHz;
+	N = r600_hdmi_ACR[i].N_32kHz;
+	r600_hdmi_calc_CTS(clock, &CTS, N, 32000);
+	WREG32(offset+R600_HDMI_32kHz_CTS, CTS << 12);
+	WREG32(offset+R600_HDMI_32kHz_N, N);
+
+	CTS = r600_hdmi_ACR[i].CTS_44_1kHz;
+	N = r600_hdmi_ACR[i].N_44_1kHz;
+	r600_hdmi_calc_CTS(clock, &CTS, N, 44100);
+	WREG32(offset+R600_HDMI_44_1kHz_CTS, CTS << 12);
+	WREG32(offset+R600_HDMI_44_1kHz_N, N);
+
+	CTS = r600_hdmi_ACR[i].CTS_48kHz;
+	N = r600_hdmi_ACR[i].N_48kHz;
+	r600_hdmi_calc_CTS(clock, &CTS, N, 48000);
+	WREG32(offset+R600_HDMI_48kHz_CTS, CTS << 12);
+	WREG32(offset+R600_HDMI_48kHz_N, N);
+}
+
+/*
+ * calculate the crc for a given info frame
+ */
+static void r600_hdmi_infoframe_checksum(uint8_t packetType,
+					 uint8_t versionNumber,
+					 uint8_t length,
+					 uint8_t *frame)
+{
+    int i;
+    frame[0] = packetType + versionNumber + length;
+    for (i = 1; i <= length; i++)
+	frame[0] += frame[i];
+    frame[0] = 0x100 - frame[0];
+}
+
+/*
+ * build a HDMI Video Info Frame
+ */
+static void r600_hdmi_videoinfoframe(
+	struct drm_encoder *encoder,
+	enum r600_hdmi_color_format color_format,
+	int active_information_present,
+	uint8_t active_format_aspect_ratio,
+	uint8_t scan_information,
+	uint8_t colorimetry,
+	uint8_t ex_colorimetry,
+	uint8_t quantization,
+	int ITC,
+	uint8_t picture_aspect_ratio,
+	uint8_t video_format_identification,
+	uint8_t pixel_repetition,
+	uint8_t non_uniform_picture_scaling,
+	uint8_t bar_info_data_valid,
+	uint16_t top_bar,
+	uint16_t bottom_bar,
+	uint16_t left_bar,
+	uint16_t right_bar
+)
+{
+	struct drm_device *dev = encoder->dev;
+	struct radeon_device *rdev = dev->dev_private;
+	uint32_t offset = to_radeon_encoder(encoder)->hdmi_offset;
+
+	uint8_t frame[14];
+
+	frame[0x0] = 0;
+	frame[0x1] =
+		(scan_information & 0x3) |
+		((bar_info_data_valid & 0x3) << 2) |
+		((active_information_present & 0x1) << 4) |
+		((color_format & 0x3) << 5);
+	frame[0x2] =
+		(active_format_aspect_ratio & 0xF) |
+		((picture_aspect_ratio & 0x3) << 4) |
+		((colorimetry & 0x3) << 6);
+	frame[0x3] =
+		(non_uniform_picture_scaling & 0x3) |
+		((quantization & 0x3) << 2) |
+		((ex_colorimetry & 0x7) << 4) |
+		((ITC & 0x1) << 7);
+	frame[0x4] = (video_format_identification & 0x7F);
+	frame[0x5] = (pixel_repetition & 0xF);
+	frame[0x6] = (top_bar & 0xFF);
+	frame[0x7] = (top_bar >> 8);
+	frame[0x8] = (bottom_bar & 0xFF);
+	frame[0x9] = (bottom_bar >> 8);
+	frame[0xA] = (left_bar & 0xFF);
+	frame[0xB] = (left_bar >> 8);
+	frame[0xC] = (right_bar & 0xFF);
+	frame[0xD] = (right_bar >> 8);
+
+	r600_hdmi_infoframe_checksum(0x82, 0x02, 0x0D, frame);
+
+	WREG32(offset+R600_HDMI_VIDEOINFOFRAME_0,
+		frame[0x0] | (frame[0x1] << 8) | (frame[0x2] << 16) | (frame[0x3] << 24));
+	WREG32(offset+R600_HDMI_VIDEOINFOFRAME_1,
+		frame[0x4] | (frame[0x5] << 8) | (frame[0x6] << 16) | (frame[0x7] << 24));
+	WREG32(offset+R600_HDMI_VIDEOINFOFRAME_2,
+		frame[0x8] | (frame[0x9] << 8) | (frame[0xA] << 16) | (frame[0xB] << 24));
+	WREG32(offset+R600_HDMI_VIDEOINFOFRAME_3,
+		frame[0xC] | (frame[0xD] << 8));
+}
+
+/*
+ * build a Audio Info Frame
+ */
+static void r600_hdmi_audioinfoframe(
+	struct drm_encoder *encoder,
+	uint8_t channel_count,
+	uint8_t coding_type,
+	uint8_t sample_size,
+	uint8_t sample_frequency,
+	uint8_t format,
+	uint8_t channel_allocation,
+	uint8_t level_shift,
+	int downmix_inhibit
+)
+{
+	struct drm_device *dev = encoder->dev;
+	struct radeon_device *rdev = dev->dev_private;
+	uint32_t offset = to_radeon_encoder(encoder)->hdmi_offset;
+
+	uint8_t frame[11];
+
+	frame[0x0] = 0;
+	frame[0x1] = (channel_count & 0x7) | ((coding_type & 0xF) << 4);
+	frame[0x2] = (sample_size & 0x3) | ((sample_frequency & 0x7) << 2);
+	frame[0x3] = format;
+	frame[0x4] = channel_allocation;
+	frame[0x5] = ((level_shift & 0xF) << 3) | ((downmix_inhibit & 0x1) << 7);
+	frame[0x6] = 0;
+	frame[0x7] = 0;
+	frame[0x8] = 0;
+	frame[0x9] = 0;
+	frame[0xA] = 0;
+
+	r600_hdmi_infoframe_checksum(0x84, 0x01, 0x0A, frame);
+
+	WREG32(offset+R600_HDMI_AUDIOINFOFRAME_0,
+		frame[0x0] | (frame[0x1] << 8) | (frame[0x2] << 16) | (frame[0x3] << 24));
+	WREG32(offset+R600_HDMI_AUDIOINFOFRAME_1,
+		frame[0x4] | (frame[0x5] << 8) | (frame[0x6] << 16) | (frame[0x8] << 24));
+}
+
+/*
+ * test if audio buffer is filled enough to start playing
+ */
+static int r600_hdmi_is_audio_buffer_filled(struct drm_encoder *encoder)
+{
+	struct drm_device *dev = encoder->dev;
+	struct radeon_device *rdev = dev->dev_private;
+	uint32_t offset = to_radeon_encoder(encoder)->hdmi_offset;
+
+	return (RREG32(offset+R600_HDMI_STATUS) & 0x10) != 0;
+}
+
+/*
+ * have buffer status changed since last call?
+ */
+int r600_hdmi_buffer_status_changed(struct drm_encoder *encoder)
+{
+	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+	int status, result;
+
+	if (!radeon_encoder->hdmi_offset)
+		return 0;
+
+	status = r600_hdmi_is_audio_buffer_filled(encoder);
+	result = radeon_encoder->hdmi_buffer_status != status;
+	radeon_encoder->hdmi_buffer_status = status;
+
+	return result;
+}
+
+/*
+ * write the audio workaround status to the hardware
+ */
+void r600_hdmi_audio_workaround(struct drm_encoder *encoder)
+{
+	struct drm_device *dev = encoder->dev;
+	struct radeon_device *rdev = dev->dev_private;
+	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+	uint32_t offset = radeon_encoder->hdmi_offset;
+
+	if (!offset)
+		return;
+
+	if (r600_hdmi_is_audio_buffer_filled(encoder)) {
+		/* disable audio workaround and start delivering of audio frames */
+		WREG32_P(offset+R600_HDMI_CNTL, 0x00000001, ~0x00001001);
+
+	} else if (radeon_encoder->hdmi_audio_workaround) {
+		/* enable audio workaround and start delivering of audio frames */
+		WREG32_P(offset+R600_HDMI_CNTL, 0x00001001, ~0x00001001);
+
+	} else {
+		/* disable audio workaround and stop delivering of audio frames */
+		WREG32_P(offset+R600_HDMI_CNTL, 0x00000000, ~0x00001001);
+	}
+}
+
+
+/*
+ * update the info frames with the data from the current display mode
+ */
+void r600_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode)
+{
+	struct drm_device *dev = encoder->dev;
+	struct radeon_device *rdev = dev->dev_private;
+	uint32_t offset = to_radeon_encoder(encoder)->hdmi_offset;
+
+	if (!offset)
+		return;
+
+	r600_audio_set_clock(encoder, mode->clock);
+
+	WREG32(offset+R600_HDMI_UNKNOWN_0, 0x1000);
+	WREG32(offset+R600_HDMI_UNKNOWN_1, 0x0);
+	WREG32(offset+R600_HDMI_UNKNOWN_2, 0x1000);
+
+	r600_hdmi_update_ACR(encoder, mode->clock);
+
+	WREG32(offset+R600_HDMI_VIDEOCNTL, 0x13);
+
+	WREG32(offset+R600_HDMI_VERSION, 0x202);
+
+	r600_hdmi_videoinfoframe(encoder, RGB, 0, 0, 0, 0,
+		0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
+
+	/* it's unknown what these bits do excatly, but it's indeed quite usefull for debugging */
+	WREG32(offset+R600_HDMI_AUDIO_DEBUG_0, 0x00FFFFFF);
+	WREG32(offset+R600_HDMI_AUDIO_DEBUG_1, 0x007FFFFF);
+	WREG32(offset+R600_HDMI_AUDIO_DEBUG_2, 0x00000001);
+	WREG32(offset+R600_HDMI_AUDIO_DEBUG_3, 0x00000001);
+
+	r600_hdmi_audio_workaround(encoder);
+
+	/* audio packets per line, does anyone know how to calc this ? */
+	WREG32_P(offset+R600_HDMI_CNTL, 0x00040000, ~0x001F0000);
+
+	/* update? reset? don't realy know */
+	WREG32_P(offset+R600_HDMI_CNTL, 0x14000000, ~0x14000000);
+}
+
+/*
+ * update settings with current parameters from audio engine
+ */
+void r600_hdmi_update_audio_settings(struct drm_encoder *encoder,
+				     int channels,
+				     int rate,
+				     int bps,
+				     uint8_t status_bits,
+				     uint8_t category_code)
+{
+	struct drm_device *dev = encoder->dev;
+	struct radeon_device *rdev = dev->dev_private;
+	uint32_t offset = to_radeon_encoder(encoder)->hdmi_offset;
+
+	uint32_t iec;
+
+	if (!offset)
+		return;
+
+	DRM_DEBUG("%s with %d channels, %d Hz sampling rate, %d bits per sample,\n",
+		 r600_hdmi_is_audio_buffer_filled(encoder) ? "playing" : "stopped",
+		channels, rate, bps);
+	DRM_DEBUG("0x%02X IEC60958 status bits and 0x%02X category code\n",
+		  (int)status_bits, (int)category_code);
+
+	iec = 0;
+	if (status_bits & AUDIO_STATUS_PROFESSIONAL)
+		iec |= 1 << 0;
+	if (status_bits & AUDIO_STATUS_NONAUDIO)
+		iec |= 1 << 1;
+	if (status_bits & AUDIO_STATUS_COPYRIGHT)
+		iec |= 1 << 2;
+	if (status_bits & AUDIO_STATUS_EMPHASIS)
+		iec |= 1 << 3;
+
+	iec |= category_code << 8;
+
+	switch (rate) {
+	case  32000: iec |= 0x3 << 24; break;
+	case  44100: iec |= 0x0 << 24; break;
+	case  88200: iec |= 0x8 << 24; break;
+	case 176400: iec |= 0xc << 24; break;
+	case  48000: iec |= 0x2 << 24; break;
+	case  96000: iec |= 0xa << 24; break;
+	case 192000: iec |= 0xe << 24; break;
+	}
+
+	WREG32(offset+R600_HDMI_IEC60958_1, iec);
+
+	iec = 0;
+	switch (bps) {
+	case 16: iec |= 0x2; break;
+	case 20: iec |= 0x3; break;
+	case 24: iec |= 0xb; break;
+	}
+	if (status_bits & AUDIO_STATUS_V)
+		iec |= 0x5 << 16;
+
+	WREG32_P(offset+R600_HDMI_IEC60958_2, iec, ~0x5000f);
+
+	/* 0x021 or 0x031 sets the audio frame length */
+	WREG32(offset+R600_HDMI_AUDIOCNTL, 0x31);
+	r600_hdmi_audioinfoframe(encoder, channels-1, 0, 0, 0, 0, 0, 0, 0);
+
+	r600_hdmi_audio_workaround(encoder);
+
+	/* update? reset? don't realy know */
+	WREG32_P(offset+R600_HDMI_CNTL, 0x04000000, ~0x04000000);
+}
+
+/*
+ * enable/disable the HDMI engine
+ */
+void r600_hdmi_enable(struct drm_encoder *encoder, int enable)
+{
+	struct drm_device *dev = encoder->dev;
+	struct radeon_device *rdev = dev->dev_private;
+	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+	uint32_t offset = to_radeon_encoder(encoder)->hdmi_offset;
+
+	if (!offset)
+		return;
+
+	DRM_DEBUG("%s HDMI interface @ 0x%04X\n", enable ? "Enabling" : "Disabling", offset);
+
+	/* some version of atombios ignore the enable HDMI flag
+	 * so enabling/disabling HDMI was moved here for TMDS1+2 */
+	switch (radeon_encoder->encoder_id) {
+	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
+		WREG32_P(AVIVO_TMDSA_CNTL, enable ? 0x4 : 0x0, ~0x4);
+		WREG32(offset+R600_HDMI_ENABLE, enable ? 0x101 : 0x0);
+		break;
+
+	case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
+		WREG32_P(AVIVO_LVTMA_CNTL, enable ? 0x4 : 0x0, ~0x4);
+		WREG32(offset+R600_HDMI_ENABLE, enable ? 0x105 : 0x0);
+		break;
+
+	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
+	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
+	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
+	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
+		/* This part is doubtfull in my opinion */
+		WREG32(offset+R600_HDMI_ENABLE, enable ? 0x110 : 0x0);
+		break;
+
+	default:
+		DRM_ERROR("unknown HDMI output type\n");
+		break;
+	}
+}
+
+/*
+ * determin at which register offset the HDMI encoder is
+ */
+void r600_hdmi_init(struct drm_encoder *encoder)
+{
+	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+
+	switch (radeon_encoder->encoder_id) {
+	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
+	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
+	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
+		radeon_encoder->hdmi_offset = R600_HDMI_TMDS1;
+		break;
+
+	case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
+		switch (r600_audio_tmds_index(encoder)) {
+		case 0:
+			radeon_encoder->hdmi_offset = R600_HDMI_TMDS1;
+			break;
+		case 1:
+			radeon_encoder->hdmi_offset = R600_HDMI_TMDS2;
+			break;
+		default:
+			radeon_encoder->hdmi_offset = 0;
+			break;
+		}
+	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
+		radeon_encoder->hdmi_offset = R600_HDMI_TMDS2;
+		break;
+
+	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
+		radeon_encoder->hdmi_offset = R600_HDMI_DIG;
+		break;
+
+	default:
+		radeon_encoder->hdmi_offset = 0;
+		break;
+	}
+
+	DRM_DEBUG("using HDMI engine at offset 0x%04X for encoder 0x%x\n",
+		  radeon_encoder->hdmi_offset, radeon_encoder->encoder_id);
+
+	/* TODO: make this configureable */
+	radeon_encoder->hdmi_audio_workaround = 0;
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/r600_cp.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/r600_cp.c
@@ -1428,9 +1428,12 @@
 
 	gb_tiling_config |= R600_BANK_SWAPS(1);
 
-	backend_map = r700_get_tile_pipe_to_backend_map(dev_priv->r600_max_tile_pipes,
-							dev_priv->r600_max_backends,
-							(0xff << dev_priv->r600_max_backends) & 0xff);
+	if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV740)
+		backend_map = 0x28;
+	else
+		backend_map = r700_get_tile_pipe_to_backend_map(dev_priv->r600_max_tile_pipes,
+								dev_priv->r600_max_backends,
+								(0xff << dev_priv->r600_max_backends) & 0xff);
 	gb_tiling_config |= R600_BACKEND_MAP(backend_map);
 
 	cc_gc_shader_pipe_config =
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_test.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_test.c
@@ -30,8 +30,8 @@
 /* Test BO GTT->VRAM and VRAM->GTT GPU copies across the whole GTT aperture */
 void radeon_test_moves(struct radeon_device *rdev)
 {
-	struct radeon_object *vram_obj = NULL;
-	struct radeon_object **gtt_obj = NULL;
+	struct radeon_bo *vram_obj = NULL;
+	struct radeon_bo **gtt_obj = NULL;
 	struct radeon_fence *fence = NULL;
 	uint64_t gtt_addr, vram_addr;
 	unsigned i, n, size;
@@ -42,8 +42,8 @@
 	/* Number of tests =
 	 * (Total GTT - IB pool - writeback page - ring buffer) / test size
 	 */
-	n = (rdev->mc.gtt_size - RADEON_IB_POOL_SIZE*64*1024 - RADEON_GPU_PAGE_SIZE -
-	     rdev->cp.ring_size) / size;
+	n = ((u32)(rdev->mc.gtt_size - RADEON_IB_POOL_SIZE*64*1024 - RADEON_GPU_PAGE_SIZE -
+	     rdev->cp.ring_size)) / size;
 
 	gtt_obj = kzalloc(n * sizeof(*gtt_obj), GFP_KERNEL);
 	if (!gtt_obj) {
@@ -52,38 +52,42 @@
 		goto out_cleanup;
 	}
 
-	r = radeon_object_create(rdev, NULL, size, true, RADEON_GEM_DOMAIN_VRAM,
-				 false, &vram_obj);
+	r = radeon_bo_create(rdev, NULL, size, true, RADEON_GEM_DOMAIN_VRAM,
+				&vram_obj);
 	if (r) {
 		DRM_ERROR("Failed to create VRAM object\n");
 		goto out_cleanup;
 	}
-
-	r = radeon_object_pin(vram_obj, RADEON_GEM_DOMAIN_VRAM, &vram_addr);
+	r = radeon_bo_reserve(vram_obj, false);
+	if (unlikely(r != 0))
+		goto out_cleanup;
+	r = radeon_bo_pin(vram_obj, RADEON_GEM_DOMAIN_VRAM, &vram_addr);
 	if (r) {
 		DRM_ERROR("Failed to pin VRAM object\n");
 		goto out_cleanup;
 	}
-
 	for (i = 0; i < n; i++) {
 		void *gtt_map, *vram_map;
 		void **gtt_start, **gtt_end;
 		void **vram_start, **vram_end;
 
-		r = radeon_object_create(rdev, NULL, size, true,
-					 RADEON_GEM_DOMAIN_GTT, false, gtt_obj + i);
+		r = radeon_bo_create(rdev, NULL, size, true,
+					 RADEON_GEM_DOMAIN_GTT, gtt_obj + i);
 		if (r) {
 			DRM_ERROR("Failed to create GTT object %d\n", i);
 			goto out_cleanup;
 		}
 
-		r = radeon_object_pin(gtt_obj[i], RADEON_GEM_DOMAIN_GTT, &gtt_addr);
+		r = radeon_bo_reserve(gtt_obj[i], false);
+		if (unlikely(r != 0))
+			goto out_cleanup;
+		r = radeon_bo_pin(gtt_obj[i], RADEON_GEM_DOMAIN_GTT, &gtt_addr);
 		if (r) {
 			DRM_ERROR("Failed to pin GTT object %d\n", i);
 			goto out_cleanup;
 		}
 
-		r = radeon_object_kmap(gtt_obj[i], &gtt_map);
+		r = radeon_bo_kmap(gtt_obj[i], &gtt_map);
 		if (r) {
 			DRM_ERROR("Failed to map GTT object %d\n", i);
 			goto out_cleanup;
@@ -94,7 +98,7 @@
 		     gtt_start++)
 			*gtt_start = gtt_start;
 
-		radeon_object_kunmap(gtt_obj[i]);
+		radeon_bo_kunmap(gtt_obj[i]);
 
 		r = radeon_fence_create(rdev, &fence);
 		if (r) {
@@ -116,7 +120,7 @@
 
 		radeon_fence_unref(&fence);
 
-		r = radeon_object_kmap(vram_obj, &vram_map);
+		r = radeon_bo_kmap(vram_obj, &vram_map);
 		if (r) {
 			DRM_ERROR("Failed to map VRAM object after copy %d\n", i);
 			goto out_cleanup;
@@ -131,13 +135,13 @@
 					  "expected 0x%p (GTT map 0x%p-0x%p)\n",
 					  i, *vram_start, gtt_start, gtt_map,
 					  gtt_end);
-				radeon_object_kunmap(vram_obj);
+				radeon_bo_kunmap(vram_obj);
 				goto out_cleanup;
 			}
 			*vram_start = vram_start;
 		}
 
-		radeon_object_kunmap(vram_obj);
+		radeon_bo_kunmap(vram_obj);
 
 		r = radeon_fence_create(rdev, &fence);
 		if (r) {
@@ -159,7 +163,7 @@
 
 		radeon_fence_unref(&fence);
 
-		r = radeon_object_kmap(gtt_obj[i], &gtt_map);
+		r = radeon_bo_kmap(gtt_obj[i], &gtt_map);
 		if (r) {
 			DRM_ERROR("Failed to map GTT object after copy %d\n", i);
 			goto out_cleanup;
@@ -174,12 +178,12 @@
 					  "expected 0x%p (VRAM map 0x%p-0x%p)\n",
 					  i, *gtt_start, vram_start, vram_map,
 					  vram_end);
-				radeon_object_kunmap(gtt_obj[i]);
+				radeon_bo_kunmap(gtt_obj[i]);
 				goto out_cleanup;
 			}
 		}
 
-		radeon_object_kunmap(gtt_obj[i]);
+		radeon_bo_kunmap(gtt_obj[i]);
 
 		DRM_INFO("Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x%llx\n",
 			 gtt_addr - rdev->mc.gtt_location);
@@ -187,14 +191,20 @@
 
 out_cleanup:
 	if (vram_obj) {
-		radeon_object_unpin(vram_obj);
-		radeon_object_unref(&vram_obj);
+		if (radeon_bo_is_reserved(vram_obj)) {
+			radeon_bo_unpin(vram_obj);
+			radeon_bo_unreserve(vram_obj);
+		}
+		radeon_bo_unref(&vram_obj);
 	}
 	if (gtt_obj) {
 		for (i = 0; i < n; i++) {
 			if (gtt_obj[i]) {
-				radeon_object_unpin(gtt_obj[i]);
-				radeon_object_unref(&gtt_obj[i]);
+				if (radeon_bo_is_reserved(gtt_obj[i])) {
+					radeon_bo_unpin(gtt_obj[i]);
+					radeon_bo_unreserve(gtt_obj[i]);
+				}
+				radeon_bo_unref(&gtt_obj[i]);
 			}
 		}
 		kfree(gtt_obj);
@@ -206,4 +216,3 @@
 		printk(KERN_WARNING "Error while testing BO move.\n");
 	}
 }
-
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/radeon_object.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/radeon_object.h
@@ -28,19 +28,146 @@
 #ifndef __RADEON_OBJECT_H__
 #define __RADEON_OBJECT_H__
 
-#include <ttm/ttm_bo_api.h>
-#include <ttm/ttm_bo_driver.h>
-#include <ttm/ttm_placement.h>
-#include <ttm/ttm_module.h>
+#include <drm/radeon_drm.h>
+#include "radeon.h"
 
-/*
- * TTM.
+/**
+ * radeon_mem_type_to_domain - return domain corresponding to mem_type
+ * @mem_type:	ttm memory type
+ *
+ * Returns corresponding domain of the ttm mem_type
  */
-struct radeon_mman {
-	struct ttm_bo_global_ref        bo_global_ref;
-	struct ttm_global_reference	mem_global_ref;
-	bool				mem_global_referenced;
-	struct ttm_bo_device		bdev;
-};
+static inline unsigned radeon_mem_type_to_domain(u32 mem_type)
+{
+	switch (mem_type) {
+	case TTM_PL_VRAM:
+		return RADEON_GEM_DOMAIN_VRAM;
+	case TTM_PL_TT:
+		return RADEON_GEM_DOMAIN_GTT;
+	case TTM_PL_SYSTEM:
+		return RADEON_GEM_DOMAIN_CPU;
+	default:
+		break;
+	}
+	return 0;
+}
 
+/**
+ * radeon_bo_reserve - reserve bo
+ * @bo:		bo structure
+ * @no_wait:		don't sleep while trying to reserve (return -EBUSY)
+ *
+ * Returns:
+ * -EBUSY: buffer is busy and @no_wait is true
+ * -ERESTARTSYS: A wait for the buffer to become unreserved was interrupted by
+ * a signal. Release all buffer reservations and return to user-space.
+ */
+static inline int radeon_bo_reserve(struct radeon_bo *bo, bool no_wait)
+{
+	int r;
+
+	r = ttm_bo_reserve(&bo->tbo, true, no_wait, false, 0);
+	if (unlikely(r != 0)) {
+		if (r != -ERESTARTSYS)
+			dev_err(bo->rdev->dev, "%p reserve failed\n", bo);
+		return r;
+	}
+	return 0;
+}
+
+static inline void radeon_bo_unreserve(struct radeon_bo *bo)
+{
+	ttm_bo_unreserve(&bo->tbo);
+}
+
+/**
+ * radeon_bo_gpu_offset - return GPU offset of bo
+ * @bo:	radeon object for which we query the offset
+ *
+ * Returns current GPU offset of the object.
+ *
+ * Note: object should either be pinned or reserved when calling this
+ * function, it might be usefull to add check for this for debugging.
+ */
+static inline u64 radeon_bo_gpu_offset(struct radeon_bo *bo)
+{
+	return bo->tbo.offset;
+}
+
+static inline unsigned long radeon_bo_size(struct radeon_bo *bo)
+{
+	return bo->tbo.num_pages << PAGE_SHIFT;
+}
+
+static inline bool radeon_bo_is_reserved(struct radeon_bo *bo)
+{
+	return !!atomic_read(&bo->tbo.reserved);
+}
+
+/**
+ * radeon_bo_mmap_offset - return mmap offset of bo
+ * @bo:	radeon object for which we query the offset
+ *
+ * Returns mmap offset of the object.
+ *
+ * Note: addr_space_offset is constant after ttm bo init thus isn't protected
+ * by any lock.
+ */
+static inline u64 radeon_bo_mmap_offset(struct radeon_bo *bo)
+{
+	return bo->tbo.addr_space_offset;
+}
+
+static inline int radeon_bo_wait(struct radeon_bo *bo, u32 *mem_type,
+					bool no_wait)
+{
+	int r;
+
+	r = ttm_bo_reserve(&bo->tbo, true, no_wait, false, 0);
+	if (unlikely(r != 0)) {
+		if (r != -ERESTARTSYS)
+			dev_err(bo->rdev->dev, "%p reserve failed for wait\n", bo);
+		return r;
+	}
+	spin_lock(&bo->tbo.lock);
+	if (mem_type)
+		*mem_type = bo->tbo.mem.mem_type;
+	if (bo->tbo.sync_obj)
+		r = ttm_bo_wait(&bo->tbo, true, true, no_wait);
+	spin_unlock(&bo->tbo.lock);
+	ttm_bo_unreserve(&bo->tbo);
+	return r;
+}
+
+extern int radeon_bo_create(struct radeon_device *rdev,
+				struct drm_gem_object *gobj, unsigned long size,
+				bool kernel, u32 domain,
+				struct radeon_bo **bo_ptr);
+extern int radeon_bo_kmap(struct radeon_bo *bo, void **ptr);
+extern void radeon_bo_kunmap(struct radeon_bo *bo);
+extern void radeon_bo_unref(struct radeon_bo **bo);
+extern int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr);
+extern int radeon_bo_unpin(struct radeon_bo *bo);
+extern int radeon_bo_evict_vram(struct radeon_device *rdev);
+extern void radeon_bo_force_delete(struct radeon_device *rdev);
+extern int radeon_bo_init(struct radeon_device *rdev);
+extern void radeon_bo_fini(struct radeon_device *rdev);
+extern void radeon_bo_list_add_object(struct radeon_bo_list *lobj,
+				struct list_head *head);
+extern int radeon_bo_list_reserve(struct list_head *head);
+extern void radeon_bo_list_unreserve(struct list_head *head);
+extern int radeon_bo_list_validate(struct list_head *head);
+extern void radeon_bo_list_fence(struct list_head *head, void *fence);
+extern int radeon_bo_fbdev_mmap(struct radeon_bo *bo,
+				struct vm_area_struct *vma);
+extern int radeon_bo_set_tiling_flags(struct radeon_bo *bo,
+				u32 tiling_flags, u32 pitch);
+extern void radeon_bo_get_tiling_flags(struct radeon_bo *bo,
+				u32 *tiling_flags, u32 *pitch);
+extern int radeon_bo_check_tiling(struct radeon_bo *bo, bool has_moved,
+				bool force_drop);
+extern void radeon_bo_move_notify(struct ttm_buffer_object *bo,
+					struct ttm_mem_reg *mem);
+extern void radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo);
+extern int radeon_bo_get_surface_reg(struct radeon_bo *bo);
 #endif
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/r300.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/r300.c
@@ -36,7 +36,15 @@
 #include "rv350d.h"
 #include "r300_reg_safe.h"
 
-/* This files gather functions specifics to: r300,r350,rv350,rv370,rv380 */
+/* This files gather functions specifics to: r300,r350,rv350,rv370,rv380
+ *
+ * GPU Errata:
+ * - HOST_PATH_CNTL: r300 family seems to dislike write to HOST_PATH_CNTL
+ *   using MMIO to flush host path read cache, this lead to HARDLOCKUP.
+ *   However, scheduling such write to the ring seems harmless, i suspect
+ *   the CP read collide with the flush somehow, or maybe the MC, hard to
+ *   tell. (Jerome Glisse)
+ */
 
 /*
  * rv370,rv380 PCIE GART
@@ -137,14 +145,19 @@
 
 void rv370_pcie_gart_disable(struct radeon_device *rdev)
 {
-	uint32_t tmp;
+	u32 tmp;
+	int r;
 
 	tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_CNTL);
 	tmp |= RADEON_PCIE_TX_GART_UNMAPPED_ACCESS_DISCARD;
 	WREG32_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp & ~RADEON_PCIE_TX_GART_EN);
 	if (rdev->gart.table.vram.robj) {
-		radeon_object_kunmap(rdev->gart.table.vram.robj);
-		radeon_object_unpin(rdev->gart.table.vram.robj);
+		r = radeon_bo_reserve(rdev->gart.table.vram.robj, false);
+		if (likely(r == 0)) {
+			radeon_bo_kunmap(rdev->gart.table.vram.robj);
+			radeon_bo_unpin(rdev->gart.table.vram.robj);
+			radeon_bo_unreserve(rdev->gart.table.vram.robj);
+		}
 	}
 }
 
@@ -173,6 +186,11 @@
 	/* Wait until IDLE & CLEAN */
 	radeon_ring_write(rdev, PACKET0(0x1720, 0));
 	radeon_ring_write(rdev, (1 << 17) | (1 << 16)  | (1 << 9));
+	radeon_ring_write(rdev, PACKET0(RADEON_HOST_PATH_CNTL, 0));
+	radeon_ring_write(rdev, rdev->config.r300.hdp_cntl |
+				RADEON_HDP_READ_BUFFER_INVALIDATE);
+	radeon_ring_write(rdev, PACKET0(RADEON_HOST_PATH_CNTL, 0));
+	radeon_ring_write(rdev, rdev->config.r300.hdp_cntl);
 	/* Emit fence sequence & fire IRQ */
 	radeon_ring_write(rdev, PACKET0(rdev->fence_drv.scratch_reg, 0));
 	radeon_ring_write(rdev, fence->seq);
@@ -346,11 +364,12 @@
 
 	r100_hdp_reset(rdev);
 	/* FIXME: rv380 one pipes ? */
-	if ((rdev->family == CHIP_R300) || (rdev->family == CHIP_R350)) {
+	if ((rdev->family == CHIP_R300 && rdev->pdev->device != 0x4144) ||
+	    (rdev->family == CHIP_R350)) {
 		/* r300,r350 */
 		rdev->num_gb_pipes = 2;
 	} else {
-		/* rv350,rv370,rv380 */
+		/* rv350,rv370,rv380,r300 AD */
 		rdev->num_gb_pipes = 1;
 	}
 	rdev->num_z_pipes = 1;
@@ -488,11 +507,14 @@
 
 	/* DDR for all card after R300 & IGP */
 	rdev->mc.vram_is_ddr = true;
+
 	tmp = RREG32(RADEON_MEM_CNTL);
-	if (tmp & R300_MEM_NUM_CHANNELS_MASK) {
-		rdev->mc.vram_width = 128;
-	} else {
-		rdev->mc.vram_width = 64;
+	tmp &= R300_MEM_NUM_CHANNELS_MASK;
+	switch (tmp) {
+	case 0: rdev->mc.vram_width = 64; break;
+	case 1: rdev->mc.vram_width = 128; break;
+	case 2: rdev->mc.vram_width = 256; break;
+	default:  rdev->mc.vram_width = 128; break;
 	}
 
 	r100_vram_init_sizes(rdev);
@@ -681,7 +703,15 @@
 			r100_cs_dump_packet(p, pkt);
 			return r;
 		}
-		ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset);
+
+		if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)
+			tile_flags |= R300_TXO_MACRO_TILE;
+		if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO)
+			tile_flags |= R300_TXO_MICRO_TILE;
+
+		tmp = idx_value + ((u32)reloc->lobj.gpu_offset);
+		tmp |= tile_flags;
+		ib[idx] = tmp;
 		track->textures[i].robj = reloc->robj;
 		break;
 	/* Tracked registers */
@@ -840,6 +870,7 @@
 		case R300_TX_FORMAT_Y4X4:
 		case R300_TX_FORMAT_Z3Y3X2:
 			track->textures[i].cpp = 1;
+			track->textures[i].compress_format = R100_TRACK_COMP_NONE;
 			break;
 		case R300_TX_FORMAT_X16:
 		case R300_TX_FORMAT_Y8X8:
@@ -847,11 +878,11 @@
 		case R300_TX_FORMAT_Z6Y5X5:
 		case R300_TX_FORMAT_W4Z4Y4X4:
 		case R300_TX_FORMAT_W1Z5Y5X5:
-		case R300_TX_FORMAT_DXT1:
 		case R300_TX_FORMAT_D3DMFT_CxV8U8:
 		case R300_TX_FORMAT_B8G8_B8G8:
 		case R300_TX_FORMAT_G8R8_G8B8:
 			track->textures[i].cpp = 2;
+			track->textures[i].compress_format = R100_TRACK_COMP_NONE;
 			break;
 		case R300_TX_FORMAT_Y16X16:
 		case R300_TX_FORMAT_Z11Y11X10:
@@ -861,17 +892,35 @@
 		case 0x17:
 		case R300_TX_FORMAT_FL_I32:
 		case 0x1e:
-		case R300_TX_FORMAT_DXT3:
-		case R300_TX_FORMAT_DXT5:
 			track->textures[i].cpp = 4;
+			track->textures[i].compress_format = R100_TRACK_COMP_NONE;
 			break;
 		case R300_TX_FORMAT_W16Z16Y16X16:
 		case R300_TX_FORMAT_FL_R16G16B16A16:
 		case R300_TX_FORMAT_FL_I32A32:
 			track->textures[i].cpp = 8;
+			track->textures[i].compress_format = R100_TRACK_COMP_NONE;
 			break;
 		case R300_TX_FORMAT_FL_R32G32B32A32:
 			track->textures[i].cpp = 16;
+			track->textures[i].compress_format = R100_TRACK_COMP_NONE;
+			break;
+		case R300_TX_FORMAT_DXT1:
+			track->textures[i].cpp = 1;
+			track->textures[i].compress_format = R100_TRACK_COMP_DXT1;
+			break;
+		case R300_TX_FORMAT_ATI2N:
+			if (p->rdev->family < CHIP_R420) {
+				DRM_ERROR("Invalid texture format %u\n",
+					  (idx_value & 0x1F));
+				return -EINVAL;
+			}
+			/* The same rules apply as for DXT3/5. */
+			/* Pass through. */
+		case R300_TX_FORMAT_DXT3:
+		case R300_TX_FORMAT_DXT5:
+			track->textures[i].cpp = 1;
+			track->textures[i].compress_format = R100_TRACK_COMP_DXT35;
 			break;
 		default:
 			DRM_ERROR("Invalid texture format %u\n",
@@ -932,6 +981,16 @@
 			track->textures[i].width_11 = tmp;
 			tmp = ((idx_value >> 16) & 1) << 11;
 			track->textures[i].height_11 = tmp;
+
+			/* ATI1N */
+			if (idx_value & (1 << 14)) {
+				/* The same rules apply as for DXT1. */
+				track->textures[i].compress_format =
+					R100_TRACK_COMP_DXT1;
+			}
+		} else if (idx_value & (1 << 14)) {
+			DRM_ERROR("Forbidden bit TXFORMAT_MSB\n");
+			return -EINVAL;
 		}
 		break;
 	case 0x4480:
@@ -973,6 +1032,39 @@
 		}
 		ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset);
 		break;
+	case 0x4e0c:
+		/* RB3D_COLOR_CHANNEL_MASK */
+		track->color_channel_mask = idx_value;
+		break;
+	case 0x4d1c:
+		/* ZB_BW_CNTL */
+		track->fastfill = !!(idx_value & (1 << 2));
+		break;
+	case 0x4e04:
+		/* RB3D_BLENDCNTL */
+		track->blend_read_enable = !!(idx_value & (1 << 2));
+		break;
+	case R300_RB3D_AARESOLVE_OFFSET:
+		r = r100_cs_packet_next_reloc(p, &reloc);
+		if (r) {
+			DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
+				  idx, reg);
+			r100_cs_dump_packet(p, pkt);
+			return r;
+		}
+		track->aa.robj = reloc->robj;
+		track->aa.offset = idx_value;
+		track->aa_dirty = true;
+		ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset);
+		break;
+	case R300_RB3D_AARESOLVE_PITCH:
+		track->aa.pitch = idx_value & 0x3FFE;
+		track->aa_dirty = true;
+		break;
+	case R300_RB3D_AARESOLVE_CTL:
+		track->aaresolve = idx_value & 0x1;
+		track->aa_dirty = true;
+		break;
 	case 0x4be8:
 		/* valid register only on RV530 */
 		if (p->rdev->family == CHIP_RV530)
@@ -1181,6 +1273,9 @@
 {
 	int r;
 
+	/* set common regs */
+	r100_set_common_regs(rdev);
+	/* program mc */
 	r300_mc_program(rdev);
 	/* Resume clock */
 	r300_clock_startup(rdev);
@@ -1193,14 +1288,20 @@
 		if (r)
 			return r;
 	}
+
+	if (rdev->family == CHIP_R300 ||
+	    rdev->family == CHIP_R350 ||
+	    rdev->family == CHIP_RV350)
+		r100_enable_bm(rdev);
+
 	if (rdev->flags & RADEON_IS_PCI) {
 		r = r100_pci_gart_enable(rdev);
 		if (r)
 			return r;
 	}
 	/* Enable IRQ */
-	rdev->irq.sw_int = true;
 	r100_irq_set(rdev);
+	rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
 	/* 1M ring buffer */
 	r = r100_cp_init(rdev, 1024 * 1024);
 	if (r) {
@@ -1237,6 +1338,8 @@
 	radeon_combios_asic_init(rdev->ddev);
 	/* Resume clock after posting */
 	r300_clock_startup(rdev);
+	/* Initialize surface registers */
+	radeon_surface_init(rdev);
 	return r300_startup(rdev);
 }
 
@@ -1254,7 +1357,6 @@
 
 void r300_fini(struct radeon_device *rdev)
 {
-	r300_suspend(rdev);
 	r100_cp_fini(rdev);
 	r100_wb_fini(rdev);
 	r100_ib_fini(rdev);
@@ -1263,9 +1365,10 @@
 		rv370_pcie_gart_fini(rdev);
 	if (rdev->flags & RADEON_IS_PCI)
 		r100_pci_gart_fini(rdev);
+	radeon_agp_fini(rdev);
 	radeon_irq_kms_fini(rdev);
 	radeon_fence_driver_fini(rdev);
-	radeon_object_fini(rdev);
+	radeon_bo_fini(rdev);
 	radeon_atombios_fini(rdev);
 	kfree(rdev->bios);
 	rdev->bios = NULL;
@@ -1303,14 +1406,14 @@
 			RREG32(R_0007C0_CP_STAT));
 	}
 	/* check if cards are posted or not */
-	if (!radeon_card_posted(rdev) && rdev->bios) {
-		DRM_INFO("GPU not posted. posting now...\n");
-		radeon_combios_asic_init(rdev->ddev);
-	}
+	if (radeon_boot_test_post_card(rdev) == false)
+		return -EINVAL;
 	/* Set asic errata */
 	r300_errata(rdev);
 	/* Initialize clocks */
 	radeon_get_clock_info(rdev->ddev);
+	/* Initialize power management */
+	radeon_pm_init(rdev);
 	/* Get vram informations */
 	r300_vram_info(rdev);
 	/* Initialize memory controller (also test AGP) */
@@ -1325,7 +1428,7 @@
 	if (r)
 		return r;
 	/* Memory manager */
-	r = radeon_object_init(rdev);
+	r = radeon_bo_init(rdev);
 	if (r)
 		return r;
 	if (rdev->flags & RADEON_IS_PCIE) {
@@ -1344,15 +1447,15 @@
 	if (r) {
 		/* Somethings want wront with the accel init stop accel */
 		dev_err(rdev->dev, "Disabling GPU acceleration\n");
-		r300_suspend(rdev);
 		r100_cp_fini(rdev);
 		r100_wb_fini(rdev);
 		r100_ib_fini(rdev);
+		radeon_irq_kms_fini(rdev);
 		if (rdev->flags & RADEON_IS_PCIE)
 			rv370_pcie_gart_fini(rdev);
 		if (rdev->flags & RADEON_IS_PCI)
 			r100_pci_gart_fini(rdev);
-		radeon_irq_kms_fini(rdev);
+		radeon_agp_fini(rdev);
 		rdev->accel_working = false;
 	}
 	return 0;
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/rs690.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/rs690.c
@@ -131,24 +131,26 @@
 
 void rs690_vram_info(struct radeon_device *rdev)
 {
-	uint32_t tmp;
 	fixed20_12 a;
 
 	rs400_gart_adjust_size(rdev);
-	/* DDR for all card after R300 & IGP */
+
 	rdev->mc.vram_is_ddr = true;
-	/* FIXME: is this correct for RS690/RS740 ? */
-	tmp = RREG32(RADEON_MEM_CNTL);
-	if (tmp & R300_MEM_NUM_CHANNELS_MASK) {
-		rdev->mc.vram_width = 128;
-	} else {
-		rdev->mc.vram_width = 64;
-	}
+	rdev->mc.vram_width = 128;
+
 	rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE);
 	rdev->mc.mc_vram_size = rdev->mc.real_vram_size;
 
 	rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
 	rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0);
+
+	if (rdev->mc.mc_vram_size > rdev->mc.aper_size)
+		rdev->mc.mc_vram_size = rdev->mc.aper_size;
+
+	if (rdev->mc.real_vram_size > rdev->mc.aper_size)
+		rdev->mc.real_vram_size = rdev->mc.aper_size;
+
+	rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);
 	rs690_pm_info(rdev);
 	/* FIXME: we should enforce default clock in case GPU is not in
 	 * default setup
@@ -161,6 +163,21 @@
 	rdev->pm.core_bandwidth.full = rfixed_div(rdev->pm.sclk, a);
 }
 
+static int rs690_mc_init(struct radeon_device *rdev)
+{
+	int r;
+	u32 tmp;
+
+	/* Setup GPU memory space */
+	tmp = RREG32_MC(R_000100_MCCFG_FB_LOCATION);
+	rdev->mc.vram_location = G_000100_MC_FB_START(tmp) << 16;
+	rdev->mc.gtt_location = 0xFFFFFFFFUL;
+	r = radeon_mc_setup(rdev);
+	if (r)
+		return r;
+	return 0;
+}
+
 void rs690_line_buffer_adjust(struct radeon_device *rdev,
 			      struct drm_display_mode *mode1,
 			      struct drm_display_mode *mode2)
@@ -244,8 +261,9 @@
 
 	b.full = rfixed_const(mode->crtc_hdisplay);
 	c.full = rfixed_const(256);
-	a.full = rfixed_mul(wm->num_line_pair, b);
-	request_fifo_depth.full = rfixed_div(a, c);
+	a.full = rfixed_div(b, c);
+	request_fifo_depth.full = rfixed_mul(a, wm->num_line_pair);
+	request_fifo_depth.full = rfixed_ceil(request_fifo_depth);
 	if (a.full < rfixed_const(4)) {
 		wm->lb_request_fifo_depth = 4;
 	} else {
@@ -374,6 +392,7 @@
 	a.full = rfixed_const(16);
 	wm->priority_mark_max.full = rfixed_const(crtc->base.mode.crtc_hdisplay);
 	wm->priority_mark_max.full = rfixed_div(wm->priority_mark_max, a);
+	wm->priority_mark_max.full = rfixed_ceil(wm->priority_mark_max);
 
 	/* Determine estimated width */
 	estimated_width.full = tolerable_latency.full - wm->worst_case_latency.full;
@@ -383,6 +402,7 @@
 	} else {
 		a.full = rfixed_const(16);
 		wm->priority_mark.full = rfixed_div(estimated_width, a);
+		wm->priority_mark.full = rfixed_ceil(wm->priority_mark);
 		wm->priority_mark.full = wm->priority_mark_max.full - wm->priority_mark.full;
 	}
 }
@@ -605,8 +625,8 @@
 	if (r)
 		return r;
 	/* Enable IRQ */
-	rdev->irq.sw_int = true;
 	rs600_irq_set(rdev);
+	rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
 	/* 1M ring buffer */
 	r = r100_cp_init(rdev, 1024 * 1024);
 	if (r) {
@@ -640,6 +660,8 @@
 	atom_asic_init(rdev->mode_info.atom_context);
 	/* Resume clock after posting */
 	rv515_clock_startup(rdev);
+	/* Initialize surface registers */
+	radeon_surface_init(rdev);
 	return rs690_startup(rdev);
 }
 
@@ -654,7 +676,6 @@
 
 void rs690_fini(struct radeon_device *rdev)
 {
-	rs690_suspend(rdev);
 	r100_cp_fini(rdev);
 	r100_wb_fini(rdev);
 	r100_ib_fini(rdev);
@@ -662,7 +683,7 @@
 	rs400_gart_fini(rdev);
 	radeon_irq_kms_fini(rdev);
 	radeon_fence_driver_fini(rdev);
-	radeon_object_fini(rdev);
+	radeon_bo_fini(rdev);
 	radeon_atombios_fini(rdev);
 	kfree(rdev->bios);
 	rdev->bios = NULL;
@@ -700,10 +721,9 @@
 			RREG32(R_0007C0_CP_STAT));
 	}
 	/* check if cards are posted or not */
-	if (!radeon_card_posted(rdev) && rdev->bios) {
-		DRM_INFO("GPU not posted. posting now...\n");
-		atom_asic_init(rdev->mode_info.atom_context);
-	}
+	if (radeon_boot_test_post_card(rdev) == false)
+		return -EINVAL;
+
 	/* Initialize clocks */
 	radeon_get_clock_info(rdev->ddev);
 	/* Initialize power management */
@@ -711,7 +731,7 @@
 	/* Get vram informations */
 	rs690_vram_info(rdev);
 	/* Initialize memory controller (also test AGP) */
-	r = r420_mc_init(rdev);
+	r = rs690_mc_init(rdev);
 	if (r)
 		return r;
 	rv515_debugfs(rdev);
@@ -723,7 +743,7 @@
 	if (r)
 		return r;
 	/* Memory manager */
-	r = radeon_object_init(rdev);
+	r = radeon_bo_init(rdev);
 	if (r)
 		return r;
 	r = rs400_gart_init(rdev);
@@ -735,7 +755,6 @@
 	if (r) {
 		/* Somethings want wront with the accel init stop accel */
 		dev_err(rdev->dev, "Disabling GPU acceleration\n");
-		rs690_suspend(rdev);
 		r100_cp_fini(rdev);
 		r100_wb_fini(rdev);
 		r100_ib_fini(rdev);
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/reg_srcs/rv515
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/reg_srcs/rv515
@@ -161,7 +161,12 @@
 0x401C GB_SELECT
 0x4020 GB_AA_CONFIG
 0x4024 GB_FIFO_SIZE
+0x4028 GB_Z_PEQ_CONFIG
 0x4100 TX_INVALTAGS
+0x4114 SU_TEX_WRAP_PS3
+0x4118 PS3_ENABLE
+0x411c PS3_VTX_FMT
+0x4120 PS3_TEX_SOURCE
 0x4200 GA_POINT_S0
 0x4204 GA_POINT_T0
 0x4208 GA_POINT_S1
@@ -171,6 +176,7 @@
 0x4230 GA_POINT_MINMAX
 0x4234 GA_LINE_CNTL
 0x4238 GA_LINE_STIPPLE_CONFIG
+0x4258 GA_COLOR_CONTROL_PS3
 0x4260 GA_LINE_STIPPLE_VALUE
 0x4264 GA_LINE_S0
 0x4268 GA_LINE_S1
@@ -459,9 +465,6 @@
 0x4E74 RB3D_CMASK_WRINDEX
 0x4E78 RB3D_CMASK_DWORD
 0x4E7C RB3D_CMASK_RDINDEX
-0x4E80 RB3D_AARESOLVE_OFFSET
-0x4E84 RB3D_AARESOLVE_PITCH
-0x4E88 RB3D_AARESOLVE_CTL
 0x4EA0 RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD
 0x4EA4 RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD
 0x4EF8 RB3D_CONSTANT_COLOR_AR
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/reg_srcs/r200
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/reg_srcs/r200
@@ -91,6 +91,8 @@
 0x22b8 SE_TCL_TEX_CYL_WRAP_CTL
 0x22c0 SE_TCL_UCP_VERT_BLEND_CNTL
 0x22c4 SE_TCL_POINT_SPRITE_CNTL
+0x22d0 SE_PVS_CNTL
+0x22d4 SE_PVS_CONST_CNTL
 0x2648 RE_POINTSIZE
 0x26c0 RE_TOP_LEFT
 0x26c4 RE_MISC
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/reg_srcs/rs600
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/reg_srcs/rs600
@@ -153,7 +153,7 @@
 0x42A4 SU_POLY_OFFSET_FRONT_SCALE
 0x42A8 SU_POLY_OFFSET_FRONT_OFFSET
 0x42AC SU_POLY_OFFSET_BACK_SCALE
-0x42B0 SU_POLY_OFFSET_BACK_OFFSET 
+0x42B0 SU_POLY_OFFSET_BACK_OFFSET
 0x42B4 SU_POLY_OFFSET_ENABLE
 0x42B8 SU_CULL_MODE
 0x42C0 SU_DEPTH_SCALE
@@ -291,6 +291,8 @@
 0x46AC US_OUT_FMT_2
 0x46B0 US_OUT_FMT_3
 0x46B4 US_W_FMT
+0x46B8 US_CODE_BANK
+0x46BC US_CODE_EXT
 0x46C0 US_ALU_RGB_ADDR_0
 0x46C4 US_ALU_RGB_ADDR_1
 0x46C8 US_ALU_RGB_ADDR_2
@@ -547,6 +549,70 @@
 0x4AB4 US_ALU_ALPHA_INST_61
 0x4AB8 US_ALU_ALPHA_INST_62
 0x4ABC US_ALU_ALPHA_INST_63
+0x4AC0 US_ALU_EXT_ADDR_0
+0x4AC4 US_ALU_EXT_ADDR_1
+0x4AC8 US_ALU_EXT_ADDR_2
+0x4ACC US_ALU_EXT_ADDR_3
+0x4AD0 US_ALU_EXT_ADDR_4
+0x4AD4 US_ALU_EXT_ADDR_5
+0x4AD8 US_ALU_EXT_ADDR_6
+0x4ADC US_ALU_EXT_ADDR_7
+0x4AE0 US_ALU_EXT_ADDR_8
+0x4AE4 US_ALU_EXT_ADDR_9
+0x4AE8 US_ALU_EXT_ADDR_10
+0x4AEC US_ALU_EXT_ADDR_11
+0x4AF0 US_ALU_EXT_ADDR_12
+0x4AF4 US_ALU_EXT_ADDR_13
+0x4AF8 US_ALU_EXT_ADDR_14
+0x4AFC US_ALU_EXT_ADDR_15
+0x4B00 US_ALU_EXT_ADDR_16
+0x4B04 US_ALU_EXT_ADDR_17
+0x4B08 US_ALU_EXT_ADDR_18
+0x4B0C US_ALU_EXT_ADDR_19
+0x4B10 US_ALU_EXT_ADDR_20
+0x4B14 US_ALU_EXT_ADDR_21
+0x4B18 US_ALU_EXT_ADDR_22
+0x4B1C US_ALU_EXT_ADDR_23
+0x4B20 US_ALU_EXT_ADDR_24
+0x4B24 US_ALU_EXT_ADDR_25
+0x4B28 US_ALU_EXT_ADDR_26
+0x4B2C US_ALU_EXT_ADDR_27
+0x4B30 US_ALU_EXT_ADDR_28
+0x4B34 US_ALU_EXT_ADDR_29
+0x4B38 US_ALU_EXT_ADDR_30
+0x4B3C US_ALU_EXT_ADDR_31
+0x4B40 US_ALU_EXT_ADDR_32
+0x4B44 US_ALU_EXT_ADDR_33
+0x4B48 US_ALU_EXT_ADDR_34
+0x4B4C US_ALU_EXT_ADDR_35
+0x4B50 US_ALU_EXT_ADDR_36
+0x4B54 US_ALU_EXT_ADDR_37
+0x4B58 US_ALU_EXT_ADDR_38
+0x4B5C US_ALU_EXT_ADDR_39
+0x4B60 US_ALU_EXT_ADDR_40
+0x4B64 US_ALU_EXT_ADDR_41
+0x4B68 US_ALU_EXT_ADDR_42
+0x4B6C US_ALU_EXT_ADDR_43
+0x4B70 US_ALU_EXT_ADDR_44
+0x4B74 US_ALU_EXT_ADDR_45
+0x4B78 US_ALU_EXT_ADDR_46
+0x4B7C US_ALU_EXT_ADDR_47
+0x4B80 US_ALU_EXT_ADDR_48
+0x4B84 US_ALU_EXT_ADDR_49
+0x4B88 US_ALU_EXT_ADDR_50
+0x4B8C US_ALU_EXT_ADDR_51
+0x4B90 US_ALU_EXT_ADDR_52
+0x4B94 US_ALU_EXT_ADDR_53
+0x4B98 US_ALU_EXT_ADDR_54
+0x4B9C US_ALU_EXT_ADDR_55
+0x4BA0 US_ALU_EXT_ADDR_56
+0x4BA4 US_ALU_EXT_ADDR_57
+0x4BA8 US_ALU_EXT_ADDR_58
+0x4BAC US_ALU_EXT_ADDR_59
+0x4BB0 US_ALU_EXT_ADDR_60
+0x4BB4 US_ALU_EXT_ADDR_61
+0x4BB8 US_ALU_EXT_ADDR_62
+0x4BBC US_ALU_EXT_ADDR_63
 0x4BC0 FG_FOG_BLEND
 0x4BC4 FG_FOG_FACTOR
 0x4BC8 FG_FOG_COLOR_R
@@ -705,9 +771,6 @@
 0x4E74 RB3D_CMASK_WRINDEX
 0x4E78 RB3D_CMASK_DWORD
 0x4E7C RB3D_CMASK_RDINDEX
-0x4E80 RB3D_AARESOLVE_OFFSET
-0x4E84 RB3D_AARESOLVE_PITCH
-0x4E88 RB3D_AARESOLVE_CTL
 0x4EA0 RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD
 0x4EA4 RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD
 0x4F04 ZB_ZSTENCILCNTL
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/reg_srcs/r420
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/reg_srcs/r420
@@ -0,0 +1,792 @@
+r420 0x4f60
+0x1434 SRC_Y_X
+0x1438 DST_Y_X
+0x143C DST_HEIGHT_WIDTH
+0x146C DP_GUI_MASTER_CNTL
+0x1474 BRUSH_Y_X
+0x1478 DP_BRUSH_BKGD_CLR
+0x147C DP_BRUSH_FRGD_CLR
+0x1480 BRUSH_DATA0
+0x1484 BRUSH_DATA1
+0x1598 DST_WIDTH_HEIGHT
+0x15C0 CLR_CMP_CNTL
+0x15C4 CLR_CMP_CLR_SRC
+0x15C8 CLR_CMP_CLR_DST
+0x15CC CLR_CMP_MSK
+0x15D8 DP_SRC_FRGD_CLR
+0x15DC DP_SRC_BKGD_CLR
+0x1600 DST_LINE_START
+0x1604 DST_LINE_END
+0x1608 DST_LINE_PATCOUNT
+0x16C0 DP_CNTL
+0x16CC DP_WRITE_MSK
+0x16D0 DP_CNTL_XDIR_YDIR_YMAJOR
+0x16E8 DEFAULT_SC_BOTTOM_RIGHT
+0x16EC SC_TOP_LEFT
+0x16F0 SC_BOTTOM_RIGHT
+0x16F4 SRC_SC_BOTTOM_RIGHT
+0x1714 DSTCACHE_CTLSTAT
+0x1720 WAIT_UNTIL
+0x172C RBBM_GUICNTL
+0x1D98 VAP_VPORT_XSCALE
+0x1D9C VAP_VPORT_XOFFSET
+0x1DA0 VAP_VPORT_YSCALE
+0x1DA4 VAP_VPORT_YOFFSET
+0x1DA8 VAP_VPORT_ZSCALE
+0x1DAC VAP_VPORT_ZOFFSET
+0x2080 VAP_CNTL
+0x2090 VAP_OUT_VTX_FMT_0
+0x2094 VAP_OUT_VTX_FMT_1
+0x20B0 VAP_VTE_CNTL
+0x2138 VAP_VF_MIN_VTX_INDX
+0x2140 VAP_CNTL_STATUS
+0x2150 VAP_PROG_STREAM_CNTL_0
+0x2154 VAP_PROG_STREAM_CNTL_1
+0x2158 VAP_PROG_STREAM_CNTL_2
+0x215C VAP_PROG_STREAM_CNTL_3
+0x2160 VAP_PROG_STREAM_CNTL_4
+0x2164 VAP_PROG_STREAM_CNTL_5
+0x2168 VAP_PROG_STREAM_CNTL_6
+0x216C VAP_PROG_STREAM_CNTL_7
+0x2180 VAP_VTX_STATE_CNTL
+0x2184 VAP_VSM_VTX_ASSM
+0x2188 VAP_VTX_STATE_IND_REG_0
+0x218C VAP_VTX_STATE_IND_REG_1
+0x2190 VAP_VTX_STATE_IND_REG_2
+0x2194 VAP_VTX_STATE_IND_REG_3
+0x2198 VAP_VTX_STATE_IND_REG_4
+0x219C VAP_VTX_STATE_IND_REG_5
+0x21A0 VAP_VTX_STATE_IND_REG_6
+0x21A4 VAP_VTX_STATE_IND_REG_7
+0x21A8 VAP_VTX_STATE_IND_REG_8
+0x21AC VAP_VTX_STATE_IND_REG_9
+0x21B0 VAP_VTX_STATE_IND_REG_10
+0x21B4 VAP_VTX_STATE_IND_REG_11
+0x21B8 VAP_VTX_STATE_IND_REG_12
+0x21BC VAP_VTX_STATE_IND_REG_13
+0x21C0 VAP_VTX_STATE_IND_REG_14
+0x21C4 VAP_VTX_STATE_IND_REG_15
+0x21DC VAP_PSC_SGN_NORM_CNTL
+0x21E0 VAP_PROG_STREAM_CNTL_EXT_0
+0x21E4 VAP_PROG_STREAM_CNTL_EXT_1
+0x21E8 VAP_PROG_STREAM_CNTL_EXT_2
+0x21EC VAP_PROG_STREAM_CNTL_EXT_3
+0x21F0 VAP_PROG_STREAM_CNTL_EXT_4
+0x21F4 VAP_PROG_STREAM_CNTL_EXT_5
+0x21F8 VAP_PROG_STREAM_CNTL_EXT_6
+0x21FC VAP_PROG_STREAM_CNTL_EXT_7
+0x2200 VAP_PVS_VECTOR_INDX_REG
+0x2204 VAP_PVS_VECTOR_DATA_REG
+0x2208 VAP_PVS_VECTOR_DATA_REG_128
+0x221C VAP_CLIP_CNTL
+0x2220 VAP_GB_VERT_CLIP_ADJ
+0x2224 VAP_GB_VERT_DISC_ADJ
+0x2228 VAP_GB_HORZ_CLIP_ADJ
+0x222C VAP_GB_HORZ_DISC_ADJ
+0x2230 VAP_PVS_FLOW_CNTL_ADDRS_0
+0x2234 VAP_PVS_FLOW_CNTL_ADDRS_1
+0x2238 VAP_PVS_FLOW_CNTL_ADDRS_2
+0x223C VAP_PVS_FLOW_CNTL_ADDRS_3
+0x2240 VAP_PVS_FLOW_CNTL_ADDRS_4
+0x2244 VAP_PVS_FLOW_CNTL_ADDRS_5
+0x2248 VAP_PVS_FLOW_CNTL_ADDRS_6
+0x224C VAP_PVS_FLOW_CNTL_ADDRS_7
+0x2250 VAP_PVS_FLOW_CNTL_ADDRS_8
+0x2254 VAP_PVS_FLOW_CNTL_ADDRS_9
+0x2258 VAP_PVS_FLOW_CNTL_ADDRS_10
+0x225C VAP_PVS_FLOW_CNTL_ADDRS_11
+0x2260 VAP_PVS_FLOW_CNTL_ADDRS_12
+0x2264 VAP_PVS_FLOW_CNTL_ADDRS_13
+0x2268 VAP_PVS_FLOW_CNTL_ADDRS_14
+0x226C VAP_PVS_FLOW_CNTL_ADDRS_15
+0x2284 VAP_PVS_STATE_FLUSH_REG
+0x2288 VAP_PVS_VTX_TIMEOUT_REG
+0x2290 VAP_PVS_FLOW_CNTL_LOOP_INDEX_0
+0x2294 VAP_PVS_FLOW_CNTL_LOOP_INDEX_1
+0x2298 VAP_PVS_FLOW_CNTL_LOOP_INDEX_2
+0x229C VAP_PVS_FLOW_CNTL_LOOP_INDEX_3
+0x22A0 VAP_PVS_FLOW_CNTL_LOOP_INDEX_4
+0x22A4 VAP_PVS_FLOW_CNTL_LOOP_INDEX_5
+0x22A8 VAP_PVS_FLOW_CNTL_LOOP_INDEX_6
+0x22AC VAP_PVS_FLOW_CNTL_LOOP_INDEX_7
+0x22B0 VAP_PVS_FLOW_CNTL_LOOP_INDEX_8
+0x22B4 VAP_PVS_FLOW_CNTL_LOOP_INDEX_9
+0x22B8 VAP_PVS_FLOW_CNTL_LOOP_INDEX_10
+0x22BC VAP_PVS_FLOW_CNTL_LOOP_INDEX_11
+0x22C0 VAP_PVS_FLOW_CNTL_LOOP_INDEX_12
+0x22C4 VAP_PVS_FLOW_CNTL_LOOP_INDEX_13
+0x22C8 VAP_PVS_FLOW_CNTL_LOOP_INDEX_14
+0x22CC VAP_PVS_FLOW_CNTL_LOOP_INDEX_15
+0x22D0 VAP_PVS_CODE_CNTL_0
+0x22D4 VAP_PVS_CONST_CNTL
+0x22D8 VAP_PVS_CODE_CNTL_1
+0x22DC VAP_PVS_FLOW_CNTL_OPC
+0x342C RB2D_DSTCACHE_CTLSTAT
+0x4000 GB_VAP_RASTER_VTX_FMT_0
+0x4004 GB_VAP_RASTER_VTX_FMT_1
+0x4008 GB_ENABLE
+0x401C GB_SELECT
+0x4020 GB_AA_CONFIG
+0x4024 GB_FIFO_SIZE
+0x4100 TX_INVALTAGS
+0x4200 GA_POINT_S0
+0x4204 GA_POINT_T0
+0x4208 GA_POINT_S1
+0x420C GA_POINT_T1
+0x4214 GA_TRIANGLE_STIPPLE
+0x421C GA_POINT_SIZE
+0x4230 GA_POINT_MINMAX
+0x4234 GA_LINE_CNTL
+0x4238 GA_LINE_STIPPLE_CONFIG
+0x4260 GA_LINE_STIPPLE_VALUE
+0x4264 GA_LINE_S0
+0x4268 GA_LINE_S1
+0x4278 GA_COLOR_CONTROL
+0x427C GA_SOLID_RG
+0x4280 GA_SOLID_BA
+0x4288 GA_POLY_MODE
+0x428C GA_ROUND_MODE
+0x4290 GA_OFFSET
+0x4294 GA_FOG_SCALE
+0x4298 GA_FOG_OFFSET
+0x42A0 SU_TEX_WRAP
+0x42A4 SU_POLY_OFFSET_FRONT_SCALE
+0x42A8 SU_POLY_OFFSET_FRONT_OFFSET
+0x42AC SU_POLY_OFFSET_BACK_SCALE
+0x42B0 SU_POLY_OFFSET_BACK_OFFSET
+0x42B4 SU_POLY_OFFSET_ENABLE
+0x42B8 SU_CULL_MODE
+0x42C0 SU_DEPTH_SCALE
+0x42C4 SU_DEPTH_OFFSET
+0x42C8 SU_REG_DEST
+0x4300 RS_COUNT
+0x4304 RS_INST_COUNT
+0x4310 RS_IP_0
+0x4314 RS_IP_1
+0x4318 RS_IP_2
+0x431C RS_IP_3
+0x4320 RS_IP_4
+0x4324 RS_IP_5
+0x4328 RS_IP_6
+0x432C RS_IP_7
+0x4330 RS_INST_0
+0x4334 RS_INST_1
+0x4338 RS_INST_2
+0x433C RS_INST_3
+0x4340 RS_INST_4
+0x4344 RS_INST_5
+0x4348 RS_INST_6
+0x434C RS_INST_7
+0x4350 RS_INST_8
+0x4354 RS_INST_9
+0x4358 RS_INST_10
+0x435C RS_INST_11
+0x4360 RS_INST_12
+0x4364 RS_INST_13
+0x4368 RS_INST_14
+0x436C RS_INST_15
+0x43A4 SC_HYPERZ_EN
+0x43A8 SC_EDGERULE
+0x43B0 SC_CLIP_0_A
+0x43B4 SC_CLIP_0_B
+0x43B8 SC_CLIP_1_A
+0x43BC SC_CLIP_1_B
+0x43C0 SC_CLIP_2_A
+0x43C4 SC_CLIP_2_B
+0x43C8 SC_CLIP_3_A
+0x43CC SC_CLIP_3_B
+0x43D0 SC_CLIP_RULE
+0x43E0 SC_SCISSOR0
+0x43E8 SC_SCREENDOOR
+0x4440 TX_FILTER1_0
+0x4444 TX_FILTER1_1
+0x4448 TX_FILTER1_2
+0x444C TX_FILTER1_3
+0x4450 TX_FILTER1_4
+0x4454 TX_FILTER1_5
+0x4458 TX_FILTER1_6
+0x445C TX_FILTER1_7
+0x4460 TX_FILTER1_8
+0x4464 TX_FILTER1_9
+0x4468 TX_FILTER1_10
+0x446C TX_FILTER1_11
+0x4470 TX_FILTER1_12
+0x4474 TX_FILTER1_13
+0x4478 TX_FILTER1_14
+0x447C TX_FILTER1_15
+0x4580 TX_CHROMA_KEY_0
+0x4584 TX_CHROMA_KEY_1
+0x4588 TX_CHROMA_KEY_2
+0x458C TX_CHROMA_KEY_3
+0x4590 TX_CHROMA_KEY_4
+0x4594 TX_CHROMA_KEY_5
+0x4598 TX_CHROMA_KEY_6
+0x459C TX_CHROMA_KEY_7
+0x45A0 TX_CHROMA_KEY_8
+0x45A4 TX_CHROMA_KEY_9
+0x45A8 TX_CHROMA_KEY_10
+0x45AC TX_CHROMA_KEY_11
+0x45B0 TX_CHROMA_KEY_12
+0x45B4 TX_CHROMA_KEY_13
+0x45B8 TX_CHROMA_KEY_14
+0x45BC TX_CHROMA_KEY_15
+0x45C0 TX_BORDER_COLOR_0
+0x45C4 TX_BORDER_COLOR_1
+0x45C8 TX_BORDER_COLOR_2
+0x45CC TX_BORDER_COLOR_3
+0x45D0 TX_BORDER_COLOR_4
+0x45D4 TX_BORDER_COLOR_5
+0x45D8 TX_BORDER_COLOR_6
+0x45DC TX_BORDER_COLOR_7
+0x45E0 TX_BORDER_COLOR_8
+0x45E4 TX_BORDER_COLOR_9
+0x45E8 TX_BORDER_COLOR_10
+0x45EC TX_BORDER_COLOR_11
+0x45F0 TX_BORDER_COLOR_12
+0x45F4 TX_BORDER_COLOR_13
+0x45F8 TX_BORDER_COLOR_14
+0x45FC TX_BORDER_COLOR_15
+0x4600 US_CONFIG
+0x4604 US_PIXSIZE
+0x4608 US_CODE_OFFSET
+0x460C US_RESET
+0x4610 US_CODE_ADDR_0
+0x4614 US_CODE_ADDR_1
+0x4618 US_CODE_ADDR_2
+0x461C US_CODE_ADDR_3
+0x4620 US_TEX_INST_0
+0x4624 US_TEX_INST_1
+0x4628 US_TEX_INST_2
+0x462C US_TEX_INST_3
+0x4630 US_TEX_INST_4
+0x4634 US_TEX_INST_5
+0x4638 US_TEX_INST_6
+0x463C US_TEX_INST_7
+0x4640 US_TEX_INST_8
+0x4644 US_TEX_INST_9
+0x4648 US_TEX_INST_10
+0x464C US_TEX_INST_11
+0x4650 US_TEX_INST_12
+0x4654 US_TEX_INST_13
+0x4658 US_TEX_INST_14
+0x465C US_TEX_INST_15
+0x4660 US_TEX_INST_16
+0x4664 US_TEX_INST_17
+0x4668 US_TEX_INST_18
+0x466C US_TEX_INST_19
+0x4670 US_TEX_INST_20
+0x4674 US_TEX_INST_21
+0x4678 US_TEX_INST_22
+0x467C US_TEX_INST_23
+0x4680 US_TEX_INST_24
+0x4684 US_TEX_INST_25
+0x4688 US_TEX_INST_26
+0x468C US_TEX_INST_27
+0x4690 US_TEX_INST_28
+0x4694 US_TEX_INST_29
+0x4698 US_TEX_INST_30
+0x469C US_TEX_INST_31
+0x46A4 US_OUT_FMT_0
+0x46A8 US_OUT_FMT_1
+0x46AC US_OUT_FMT_2
+0x46B0 US_OUT_FMT_3
+0x46B4 US_W_FMT
+0x46B8 US_CODE_BANK
+0x46BC US_CODE_EXT
+0x46C0 US_ALU_RGB_ADDR_0
+0x46C4 US_ALU_RGB_ADDR_1
+0x46C8 US_ALU_RGB_ADDR_2
+0x46CC US_ALU_RGB_ADDR_3
+0x46D0 US_ALU_RGB_ADDR_4
+0x46D4 US_ALU_RGB_ADDR_5
+0x46D8 US_ALU_RGB_ADDR_6
+0x46DC US_ALU_RGB_ADDR_7
+0x46E0 US_ALU_RGB_ADDR_8
+0x46E4 US_ALU_RGB_ADDR_9
+0x46E8 US_ALU_RGB_ADDR_10
+0x46EC US_ALU_RGB_ADDR_11
+0x46F0 US_ALU_RGB_ADDR_12
+0x46F4 US_ALU_RGB_ADDR_13
+0x46F8 US_ALU_RGB_ADDR_14
+0x46FC US_ALU_RGB_ADDR_15
+0x4700 US_ALU_RGB_ADDR_16
+0x4704 US_ALU_RGB_ADDR_17
+0x4708 US_ALU_RGB_ADDR_18
+0x470C US_ALU_RGB_ADDR_19
+0x4710 US_ALU_RGB_ADDR_20
+0x4714 US_ALU_RGB_ADDR_21
+0x4718 US_ALU_RGB_ADDR_22
+0x471C US_ALU_RGB_ADDR_23
+0x4720 US_ALU_RGB_ADDR_24
+0x4724 US_ALU_RGB_ADDR_25
+0x4728 US_ALU_RGB_ADDR_26
+0x472C US_ALU_RGB_ADDR_27
+0x4730 US_ALU_RGB_ADDR_28
+0x4734 US_ALU_RGB_ADDR_29
+0x4738 US_ALU_RGB_ADDR_30
+0x473C US_ALU_RGB_ADDR_31
+0x4740 US_ALU_RGB_ADDR_32
+0x4744 US_ALU_RGB_ADDR_33
+0x4748 US_ALU_RGB_ADDR_34
+0x474C US_ALU_RGB_ADDR_35
+0x4750 US_ALU_RGB_ADDR_36
+0x4754 US_ALU_RGB_ADDR_37
+0x4758 US_ALU_RGB_ADDR_38
+0x475C US_ALU_RGB_ADDR_39
+0x4760 US_ALU_RGB_ADDR_40
+0x4764 US_ALU_RGB_ADDR_41
+0x4768 US_ALU_RGB_ADDR_42
+0x476C US_ALU_RGB_ADDR_43
+0x4770 US_ALU_RGB_ADDR_44
+0x4774 US_ALU_RGB_ADDR_45
+0x4778 US_ALU_RGB_ADDR_46
+0x477C US_ALU_RGB_ADDR_47
+0x4780 US_ALU_RGB_ADDR_48
+0x4784 US_ALU_RGB_ADDR_49
+0x4788 US_ALU_RGB_ADDR_50
+0x478C US_ALU_RGB_ADDR_51
+0x4790 US_ALU_RGB_ADDR_52
+0x4794 US_ALU_RGB_ADDR_53
+0x4798 US_ALU_RGB_ADDR_54
+0x479C US_ALU_RGB_ADDR_55
+0x47A0 US_ALU_RGB_ADDR_56
+0x47A4 US_ALU_RGB_ADDR_57
+0x47A8 US_ALU_RGB_ADDR_58
+0x47AC US_ALU_RGB_ADDR_59
+0x47B0 US_ALU_RGB_ADDR_60
+0x47B4 US_ALU_RGB_ADDR_61
+0x47B8 US_ALU_RGB_ADDR_62
+0x47BC US_ALU_RGB_ADDR_63
+0x47C0 US_ALU_ALPHA_ADDR_0
+0x47C4 US_ALU_ALPHA_ADDR_1
+0x47C8 US_ALU_ALPHA_ADDR_2
+0x47CC US_ALU_ALPHA_ADDR_3
+0x47D0 US_ALU_ALPHA_ADDR_4
+0x47D4 US_ALU_ALPHA_ADDR_5
+0x47D8 US_ALU_ALPHA_ADDR_6
+0x47DC US_ALU_ALPHA_ADDR_7
+0x47E0 US_ALU_ALPHA_ADDR_8
+0x47E4 US_ALU_ALPHA_ADDR_9
+0x47E8 US_ALU_ALPHA_ADDR_10
+0x47EC US_ALU_ALPHA_ADDR_11
+0x47F0 US_ALU_ALPHA_ADDR_12
+0x47F4 US_ALU_ALPHA_ADDR_13
+0x47F8 US_ALU_ALPHA_ADDR_14
+0x47FC US_ALU_ALPHA_ADDR_15
+0x4800 US_ALU_ALPHA_ADDR_16
+0x4804 US_ALU_ALPHA_ADDR_17
+0x4808 US_ALU_ALPHA_ADDR_18
+0x480C US_ALU_ALPHA_ADDR_19
+0x4810 US_ALU_ALPHA_ADDR_20
+0x4814 US_ALU_ALPHA_ADDR_21
+0x4818 US_ALU_ALPHA_ADDR_22
+0x481C US_ALU_ALPHA_ADDR_23
+0x4820 US_ALU_ALPHA_ADDR_24
+0x4824 US_ALU_ALPHA_ADDR_25
+0x4828 US_ALU_ALPHA_ADDR_26
+0x482C US_ALU_ALPHA_ADDR_27
+0x4830 US_ALU_ALPHA_ADDR_28
+0x4834 US_ALU_ALPHA_ADDR_29
+0x4838 US_ALU_ALPHA_ADDR_30
+0x483C US_ALU_ALPHA_ADDR_31
+0x4840 US_ALU_ALPHA_ADDR_32
+0x4844 US_ALU_ALPHA_ADDR_33
+0x4848 US_ALU_ALPHA_ADDR_34
+0x484C US_ALU_ALPHA_ADDR_35
+0x4850 US_ALU_ALPHA_ADDR_36
+0x4854 US_ALU_ALPHA_ADDR_37
+0x4858 US_ALU_ALPHA_ADDR_38
+0x485C US_ALU_ALPHA_ADDR_39
+0x4860 US_ALU_ALPHA_ADDR_40
+0x4864 US_ALU_ALPHA_ADDR_41
+0x4868 US_ALU_ALPHA_ADDR_42
+0x486C US_ALU_ALPHA_ADDR_43
+0x4870 US_ALU_ALPHA_ADDR_44
+0x4874 US_ALU_ALPHA_ADDR_45
+0x4878 US_ALU_ALPHA_ADDR_46
+0x487C US_ALU_ALPHA_ADDR_47
+0x4880 US_ALU_ALPHA_ADDR_48
+0x4884 US_ALU_ALPHA_ADDR_49
+0x4888 US_ALU_ALPHA_ADDR_50
+0x488C US_ALU_ALPHA_ADDR_51
+0x4890 US_ALU_ALPHA_ADDR_52
+0x4894 US_ALU_ALPHA_ADDR_53
+0x4898 US_ALU_ALPHA_ADDR_54
+0x489C US_ALU_ALPHA_ADDR_55
+0x48A0 US_ALU_ALPHA_ADDR_56
+0x48A4 US_ALU_ALPHA_ADDR_57
+0x48A8 US_ALU_ALPHA_ADDR_58
+0x48AC US_ALU_ALPHA_ADDR_59
+0x48B0 US_ALU_ALPHA_ADDR_60
+0x48B4 US_ALU_ALPHA_ADDR_61
+0x48B8 US_ALU_ALPHA_ADDR_62
+0x48BC US_ALU_ALPHA_ADDR_63
+0x48C0 US_ALU_RGB_INST_0
+0x48C4 US_ALU_RGB_INST_1
+0x48C8 US_ALU_RGB_INST_2
+0x48CC US_ALU_RGB_INST_3
+0x48D0 US_ALU_RGB_INST_4
+0x48D4 US_ALU_RGB_INST_5
+0x48D8 US_ALU_RGB_INST_6
+0x48DC US_ALU_RGB_INST_7
+0x48E0 US_ALU_RGB_INST_8
+0x48E4 US_ALU_RGB_INST_9
+0x48E8 US_ALU_RGB_INST_10
+0x48EC US_ALU_RGB_INST_11
+0x48F0 US_ALU_RGB_INST_12
+0x48F4 US_ALU_RGB_INST_13
+0x48F8 US_ALU_RGB_INST_14
+0x48FC US_ALU_RGB_INST_15
+0x4900 US_ALU_RGB_INST_16
+0x4904 US_ALU_RGB_INST_17
+0x4908 US_ALU_RGB_INST_18
+0x490C US_ALU_RGB_INST_19
+0x4910 US_ALU_RGB_INST_20
+0x4914 US_ALU_RGB_INST_21
+0x4918 US_ALU_RGB_INST_22
+0x491C US_ALU_RGB_INST_23
+0x4920 US_ALU_RGB_INST_24
+0x4924 US_ALU_RGB_INST_25
+0x4928 US_ALU_RGB_INST_26
+0x492C US_ALU_RGB_INST_27
+0x4930 US_ALU_RGB_INST_28
+0x4934 US_ALU_RGB_INST_29
+0x4938 US_ALU_RGB_INST_30
+0x493C US_ALU_RGB_INST_31
+0x4940 US_ALU_RGB_INST_32
+0x4944 US_ALU_RGB_INST_33
+0x4948 US_ALU_RGB_INST_34
+0x494C US_ALU_RGB_INST_35
+0x4950 US_ALU_RGB_INST_36
+0x4954 US_ALU_RGB_INST_37
+0x4958 US_ALU_RGB_INST_38
+0x495C US_ALU_RGB_INST_39
+0x4960 US_ALU_RGB_INST_40
+0x4964 US_ALU_RGB_INST_41
+0x4968 US_ALU_RGB_INST_42
+0x496C US_ALU_RGB_INST_43
+0x4970 US_ALU_RGB_INST_44
+0x4974 US_ALU_RGB_INST_45
+0x4978 US_ALU_RGB_INST_46
+0x497C US_ALU_RGB_INST_47
+0x4980 US_ALU_RGB_INST_48
+0x4984 US_ALU_RGB_INST_49
+0x4988 US_ALU_RGB_INST_50
+0x498C US_ALU_RGB_INST_51
+0x4990 US_ALU_RGB_INST_52
+0x4994 US_ALU_RGB_INST_53
+0x4998 US_ALU_RGB_INST_54
+0x499C US_ALU_RGB_INST_55
+0x49A0 US_ALU_RGB_INST_56
+0x49A4 US_ALU_RGB_INST_57
+0x49A8 US_ALU_RGB_INST_58
+0x49AC US_ALU_RGB_INST_59
+0x49B0 US_ALU_RGB_INST_60
+0x49B4 US_ALU_RGB_INST_61
+0x49B8 US_ALU_RGB_INST_62
+0x49BC US_ALU_RGB_INST_63
+0x49C0 US_ALU_ALPHA_INST_0
+0x49C4 US_ALU_ALPHA_INST_1
+0x49C8 US_ALU_ALPHA_INST_2
+0x49CC US_ALU_ALPHA_INST_3
+0x49D0 US_ALU_ALPHA_INST_4
+0x49D4 US_ALU_ALPHA_INST_5
+0x49D8 US_ALU_ALPHA_INST_6
+0x49DC US_ALU_ALPHA_INST_7
+0x49E0 US_ALU_ALPHA_INST_8
+0x49E4 US_ALU_ALPHA_INST_9
+0x49E8 US_ALU_ALPHA_INST_10
+0x49EC US_ALU_ALPHA_INST_11
+0x49F0 US_ALU_ALPHA_INST_12
+0x49F4 US_ALU_ALPHA_INST_13
+0x49F8 US_ALU_ALPHA_INST_14
+0x49FC US_ALU_ALPHA_INST_15
+0x4A00 US_ALU_ALPHA_INST_16
+0x4A04 US_ALU_ALPHA_INST_17
+0x4A08 US_ALU_ALPHA_INST_18
+0x4A0C US_ALU_ALPHA_INST_19
+0x4A10 US_ALU_ALPHA_INST_20
+0x4A14 US_ALU_ALPHA_INST_21
+0x4A18 US_ALU_ALPHA_INST_22
+0x4A1C US_ALU_ALPHA_INST_23
+0x4A20 US_ALU_ALPHA_INST_24
+0x4A24 US_ALU_ALPHA_INST_25
+0x4A28 US_ALU_ALPHA_INST_26
+0x4A2C US_ALU_ALPHA_INST_27
+0x4A30 US_ALU_ALPHA_INST_28
+0x4A34 US_ALU_ALPHA_INST_29
+0x4A38 US_ALU_ALPHA_INST_30
+0x4A3C US_ALU_ALPHA_INST_31
+0x4A40 US_ALU_ALPHA_INST_32
+0x4A44 US_ALU_ALPHA_INST_33
+0x4A48 US_ALU_ALPHA_INST_34
+0x4A4C US_ALU_ALPHA_INST_35
+0x4A50 US_ALU_ALPHA_INST_36
+0x4A54 US_ALU_ALPHA_INST_37
+0x4A58 US_ALU_ALPHA_INST_38
+0x4A5C US_ALU_ALPHA_INST_39
+0x4A60 US_ALU_ALPHA_INST_40
+0x4A64 US_ALU_ALPHA_INST_41
+0x4A68 US_ALU_ALPHA_INST_42
+0x4A6C US_ALU_ALPHA_INST_43
+0x4A70 US_ALU_ALPHA_INST_44
+0x4A74 US_ALU_ALPHA_INST_45
+0x4A78 US_ALU_ALPHA_INST_46
+0x4A7C US_ALU_ALPHA_INST_47
+0x4A80 US_ALU_ALPHA_INST_48
+0x4A84 US_ALU_ALPHA_INST_49
+0x4A88 US_ALU_ALPHA_INST_50
+0x4A8C US_ALU_ALPHA_INST_51
+0x4A90 US_ALU_ALPHA_INST_52
+0x4A94 US_ALU_ALPHA_INST_53
+0x4A98 US_ALU_ALPHA_INST_54
+0x4A9C US_ALU_ALPHA_INST_55
+0x4AA0 US_ALU_ALPHA_INST_56
+0x4AA4 US_ALU_ALPHA_INST_57
+0x4AA8 US_ALU_ALPHA_INST_58
+0x4AAC US_ALU_ALPHA_INST_59
+0x4AB0 US_ALU_ALPHA_INST_60
+0x4AB4 US_ALU_ALPHA_INST_61
+0x4AB8 US_ALU_ALPHA_INST_62
+0x4ABC US_ALU_ALPHA_INST_63
+0x4AC0 US_ALU_EXT_ADDR_0
+0x4AC4 US_ALU_EXT_ADDR_1
+0x4AC8 US_ALU_EXT_ADDR_2
+0x4ACC US_ALU_EXT_ADDR_3
+0x4AD0 US_ALU_EXT_ADDR_4
+0x4AD4 US_ALU_EXT_ADDR_5
+0x4AD8 US_ALU_EXT_ADDR_6
+0x4ADC US_ALU_EXT_ADDR_7
+0x4AE0 US_ALU_EXT_ADDR_8
+0x4AE4 US_ALU_EXT_ADDR_9
+0x4AE8 US_ALU_EXT_ADDR_10
+0x4AEC US_ALU_EXT_ADDR_11
+0x4AF0 US_ALU_EXT_ADDR_12
+0x4AF4 US_ALU_EXT_ADDR_13
+0x4AF8 US_ALU_EXT_ADDR_14
+0x4AFC US_ALU_EXT_ADDR_15
+0x4B00 US_ALU_EXT_ADDR_16
+0x4B04 US_ALU_EXT_ADDR_17
+0x4B08 US_ALU_EXT_ADDR_18
+0x4B0C US_ALU_EXT_ADDR_19
+0x4B10 US_ALU_EXT_ADDR_20
+0x4B14 US_ALU_EXT_ADDR_21
+0x4B18 US_ALU_EXT_ADDR_22
+0x4B1C US_ALU_EXT_ADDR_23
+0x4B20 US_ALU_EXT_ADDR_24
+0x4B24 US_ALU_EXT_ADDR_25
+0x4B28 US_ALU_EXT_ADDR_26
+0x4B2C US_ALU_EXT_ADDR_27
+0x4B30 US_ALU_EXT_ADDR_28
+0x4B34 US_ALU_EXT_ADDR_29
+0x4B38 US_ALU_EXT_ADDR_30
+0x4B3C US_ALU_EXT_ADDR_31
+0x4B40 US_ALU_EXT_ADDR_32
+0x4B44 US_ALU_EXT_ADDR_33
+0x4B48 US_ALU_EXT_ADDR_34
+0x4B4C US_ALU_EXT_ADDR_35
+0x4B50 US_ALU_EXT_ADDR_36
+0x4B54 US_ALU_EXT_ADDR_37
+0x4B58 US_ALU_EXT_ADDR_38
+0x4B5C US_ALU_EXT_ADDR_39
+0x4B60 US_ALU_EXT_ADDR_40
+0x4B64 US_ALU_EXT_ADDR_41
+0x4B68 US_ALU_EXT_ADDR_42
+0x4B6C US_ALU_EXT_ADDR_43
+0x4B70 US_ALU_EXT_ADDR_44
+0x4B74 US_ALU_EXT_ADDR_45
+0x4B78 US_ALU_EXT_ADDR_46
+0x4B7C US_ALU_EXT_ADDR_47
+0x4B80 US_ALU_EXT_ADDR_48
+0x4B84 US_ALU_EXT_ADDR_49
+0x4B88 US_ALU_EXT_ADDR_50
+0x4B8C US_ALU_EXT_ADDR_51
+0x4B90 US_ALU_EXT_ADDR_52
+0x4B94 US_ALU_EXT_ADDR_53
+0x4B98 US_ALU_EXT_ADDR_54
+0x4B9C US_ALU_EXT_ADDR_55
+0x4BA0 US_ALU_EXT_ADDR_56
+0x4BA4 US_ALU_EXT_ADDR_57
+0x4BA8 US_ALU_EXT_ADDR_58
+0x4BAC US_ALU_EXT_ADDR_59
+0x4BB0 US_ALU_EXT_ADDR_60
+0x4BB4 US_ALU_EXT_ADDR_61
+0x4BB8 US_ALU_EXT_ADDR_62
+0x4BBC US_ALU_EXT_ADDR_63
+0x4BC0 FG_FOG_BLEND
+0x4BC4 FG_FOG_FACTOR
+0x4BC8 FG_FOG_COLOR_R
+0x4BCC FG_FOG_COLOR_G
+0x4BD0 FG_FOG_COLOR_B
+0x4BD4 FG_ALPHA_FUNC
+0x4BD8 FG_DEPTH_SRC
+0x4C00 US_ALU_CONST_R_0
+0x4C04 US_ALU_CONST_G_0
+0x4C08 US_ALU_CONST_B_0
+0x4C0C US_ALU_CONST_A_0
+0x4C10 US_ALU_CONST_R_1
+0x4C14 US_ALU_CONST_G_1
+0x4C18 US_ALU_CONST_B_1
+0x4C1C US_ALU_CONST_A_1
+0x4C20 US_ALU_CONST_R_2
+0x4C24 US_ALU_CONST_G_2
+0x4C28 US_ALU_CONST_B_2
+0x4C2C US_ALU_CONST_A_2
+0x4C30 US_ALU_CONST_R_3
+0x4C34 US_ALU_CONST_G_3
+0x4C38 US_ALU_CONST_B_3
+0x4C3C US_ALU_CONST_A_3
+0x4C40 US_ALU_CONST_R_4
+0x4C44 US_ALU_CONST_G_4
+0x4C48 US_ALU_CONST_B_4
+0x4C4C US_ALU_CONST_A_4
+0x4C50 US_ALU_CONST_R_5
+0x4C54 US_ALU_CONST_G_5
+0x4C58 US_ALU_CONST_B_5
+0x4C5C US_ALU_CONST_A_5
+0x4C60 US_ALU_CONST_R_6
+0x4C64 US_ALU_CONST_G_6
+0x4C68 US_ALU_CONST_B_6
+0x4C6C US_ALU_CONST_A_6
+0x4C70 US_ALU_CONST_R_7
+0x4C74 US_ALU_CONST_G_7
+0x4C78 US_ALU_CONST_B_7
+0x4C7C US_ALU_CONST_A_7
+0x4C80 US_ALU_CONST_R_8
+0x4C84 US_ALU_CONST_G_8
+0x4C88 US_ALU_CONST_B_8
+0x4C8C US_ALU_CONST_A_8
+0x4C90 US_ALU_CONST_R_9
+0x4C94 US_ALU_CONST_G_9
+0x4C98 US_ALU_CONST_B_9
+0x4C9C US_ALU_CONST_A_9
+0x4CA0 US_ALU_CONST_R_10
+0x4CA4 US_ALU_CONST_G_10
+0x4CA8 US_ALU_CONST_B_10
+0x4CAC US_ALU_CONST_A_10
+0x4CB0 US_ALU_CONST_R_11
+0x4CB4 US_ALU_CONST_G_11
+0x4CB8 US_ALU_CONST_B_11
+0x4CBC US_ALU_CONST_A_11
+0x4CC0 US_ALU_CONST_R_12
+0x4CC4 US_ALU_CONST_G_12
+0x4CC8 US_ALU_CONST_B_12
+0x4CCC US_ALU_CONST_A_12
+0x4CD0 US_ALU_CONST_R_13
+0x4CD4 US_ALU_CONST_G_13
+0x4CD8 US_ALU_CONST_B_13
+0x4CDC US_ALU_CONST_A_13
+0x4CE0 US_ALU_CONST_R_14
+0x4CE4 US_ALU_CONST_G_14
+0x4CE8 US_ALU_CONST_B_14
+0x4CEC US_ALU_CONST_A_14
+0x4CF0 US_ALU_CONST_R_15
+0x4CF4 US_ALU_CONST_G_15
+0x4CF8 US_ALU_CONST_B_15
+0x4CFC US_ALU_CONST_A_15
+0x4D00 US_ALU_CONST_R_16
+0x4D04 US_ALU_CONST_G_16
+0x4D08 US_ALU_CONST_B_16
+0x4D0C US_ALU_CONST_A_16
+0x4D10 US_ALU_CONST_R_17
+0x4D14 US_ALU_CONST_G_17
+0x4D18 US_ALU_CONST_B_17
+0x4D1C US_ALU_CONST_A_17
+0x4D20 US_ALU_CONST_R_18
+0x4D24 US_ALU_CONST_G_18
+0x4D28 US_ALU_CONST_B_18
+0x4D2C US_ALU_CONST_A_18
+0x4D30 US_ALU_CONST_R_19
+0x4D34 US_ALU_CONST_G_19
+0x4D38 US_ALU_CONST_B_19
+0x4D3C US_ALU_CONST_A_19
+0x4D40 US_ALU_CONST_R_20
+0x4D44 US_ALU_CONST_G_20
+0x4D48 US_ALU_CONST_B_20
+0x4D4C US_ALU_CONST_A_20
+0x4D50 US_ALU_CONST_R_21
+0x4D54 US_ALU_CONST_G_21
+0x4D58 US_ALU_CONST_B_21
+0x4D5C US_ALU_CONST_A_21
+0x4D60 US_ALU_CONST_R_22
+0x4D64 US_ALU_CONST_G_22
+0x4D68 US_ALU_CONST_B_22
+0x4D6C US_ALU_CONST_A_22
+0x4D70 US_ALU_CONST_R_23
+0x4D74 US_ALU_CONST_G_23
+0x4D78 US_ALU_CONST_B_23
+0x4D7C US_ALU_CONST_A_23
+0x4D80 US_ALU_CONST_R_24
+0x4D84 US_ALU_CONST_G_24
+0x4D88 US_ALU_CONST_B_24
+0x4D8C US_ALU_CONST_A_24
+0x4D90 US_ALU_CONST_R_25
+0x4D94 US_ALU_CONST_G_25
+0x4D98 US_ALU_CONST_B_25
+0x4D9C US_ALU_CONST_A_25
+0x4DA0 US_ALU_CONST_R_26
+0x4DA4 US_ALU_CONST_G_26
+0x4DA8 US_ALU_CONST_B_26
+0x4DAC US_ALU_CONST_A_26
+0x4DB0 US_ALU_CONST_R_27
+0x4DB4 US_ALU_CONST_G_27
+0x4DB8 US_ALU_CONST_B_27
+0x4DBC US_ALU_CONST_A_27
+0x4DC0 US_ALU_CONST_R_28
+0x4DC4 US_ALU_CONST_G_28
+0x4DC8 US_ALU_CONST_B_28
+0x4DCC US_ALU_CONST_A_28
+0x4DD0 US_ALU_CONST_R_29
+0x4DD4 US_ALU_CONST_G_29
+0x4DD8 US_ALU_CONST_B_29
+0x4DDC US_ALU_CONST_A_29
+0x4DE0 US_ALU_CONST_R_30
+0x4DE4 US_ALU_CONST_G_30
+0x4DE8 US_ALU_CONST_B_30
+0x4DEC US_ALU_CONST_A_30
+0x4DF0 US_ALU_CONST_R_31
+0x4DF4 US_ALU_CONST_G_31
+0x4DF8 US_ALU_CONST_B_31
+0x4DFC US_ALU_CONST_A_31
+0x4E04 RB3D_BLENDCNTL_R3
+0x4E08 RB3D_ABLENDCNTL_R3
+0x4E0C RB3D_COLOR_CHANNEL_MASK
+0x4E10 RB3D_CONSTANT_COLOR
+0x4E14 RB3D_COLOR_CLEAR_VALUE
+0x4E18 RB3D_ROPCNTL_R3
+0x4E1C RB3D_CLRCMP_FLIPE_R3
+0x4E20 RB3D_CLRCMP_CLR_R3
+0x4E24 RB3D_CLRCMP_MSK_R3
+0x4E48 RB3D_DEBUG_CTL
+0x4E4C RB3D_DSTCACHE_CTLSTAT_R3
+0x4E50 RB3D_DITHER_CTL
+0x4E54 RB3D_CMASK_OFFSET0
+0x4E58 RB3D_CMASK_OFFSET1
+0x4E5C RB3D_CMASK_OFFSET2
+0x4E60 RB3D_CMASK_OFFSET3
+0x4E64 RB3D_CMASK_PITCH0
+0x4E68 RB3D_CMASK_PITCH1
+0x4E6C RB3D_CMASK_PITCH2
+0x4E70 RB3D_CMASK_PITCH3
+0x4E74 RB3D_CMASK_WRINDEX
+0x4E78 RB3D_CMASK_DWORD
+0x4E7C RB3D_CMASK_RDINDEX
+0x4EA0 RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD
+0x4EA4 RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD
+0x4F04 ZB_ZSTENCILCNTL
+0x4F08 ZB_STENCILREFMASK
+0x4F14 ZB_ZTOP
+0x4F18 ZB_ZCACHE_CTLSTAT
+0x4F1C ZB_BW_CNTL
+0x4F28 ZB_DEPTHCLEARVALUE
+0x4F30 ZB_ZMASK_OFFSET
+0x4F34 ZB_ZMASK_PITCH
+0x4F38 ZB_ZMASK_WRINDEX
+0x4F3C ZB_ZMASK_DWORD
+0x4F40 ZB_ZMASK_RDINDEX
+0x4F44 ZB_HIZ_OFFSET
+0x4F48 ZB_HIZ_WRINDEX
+0x4F4C ZB_HIZ_DWORD
+0x4F50 ZB_HIZ_RDINDEX
+0x4F54 ZB_HIZ_PITCH
+0x4F58 ZB_ZPASS_DATA
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/radeon/reg_srcs/r300
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/radeon/reg_srcs/r300
@@ -705,9 +705,6 @@
 0x4E74 RB3D_CMASK_WRINDEX
 0x4E78 RB3D_CMASK_DWORD
 0x4E7C RB3D_CMASK_RDINDEX
-0x4E80 RB3D_AARESOLVE_OFFSET
-0x4E84 RB3D_AARESOLVE_PITCH
-0x4E88 RB3D_AARESOLVE_CTL
 0x4EA0 RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD
 0x4EA4 RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD
 0x4F04 ZB_ZSTENCILCNTL
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_grctx.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_grctx.c
@@ -0,0 +1,161 @@
+/*
+ * Copyright 2009 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+
+#include <linux/firmware.h>
+
+#include "drmP.h"
+#include "nouveau_drv.h"
+
+struct nouveau_ctxprog {
+	uint32_t signature;
+	uint8_t  version;
+	uint16_t length;
+	uint32_t data[];
+} __attribute__ ((packed));
+
+struct nouveau_ctxvals {
+	uint32_t signature;
+	uint8_t  version;
+	uint32_t length;
+	struct {
+		uint32_t offset;
+		uint32_t value;
+	} data[];
+} __attribute__ ((packed));
+
+int
+nouveau_grctx_prog_load(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
+	const int chipset = dev_priv->chipset;
+	const struct firmware *fw;
+	const struct nouveau_ctxprog *cp;
+	const struct nouveau_ctxvals *cv;
+	char name[32];
+	int ret, i;
+
+	if (pgraph->accel_blocked)
+		return -ENODEV;
+
+	if (!pgraph->ctxprog) {
+		sprintf(name, "nouveau/nv%02x.ctxprog", chipset);
+		ret = request_firmware(&fw, name, &dev->pdev->dev);
+		if (ret) {
+			NV_ERROR(dev, "No ctxprog for NV%02x\n", chipset);
+			return ret;
+		}
+
+		pgraph->ctxprog = kmalloc(fw->size, GFP_KERNEL);
+		if (!pgraph->ctxprog) {
+			NV_ERROR(dev, "OOM copying ctxprog\n");
+			release_firmware(fw);
+			return -ENOMEM;
+		}
+		memcpy(pgraph->ctxprog, fw->data, fw->size);
+
+		cp = pgraph->ctxprog;
+		if (le32_to_cpu(cp->signature) != 0x5043564e ||
+		    cp->version != 0 ||
+		    le16_to_cpu(cp->length) != ((fw->size - 7) / 4)) {
+			NV_ERROR(dev, "ctxprog invalid\n");
+			release_firmware(fw);
+			nouveau_grctx_fini(dev);
+			return -EINVAL;
+		}
+		release_firmware(fw);
+	}
+
+	if (!pgraph->ctxvals) {
+		sprintf(name, "nouveau/nv%02x.ctxvals", chipset);
+		ret = request_firmware(&fw, name, &dev->pdev->dev);
+		if (ret) {
+			NV_ERROR(dev, "No ctxvals for NV%02x\n", chipset);
+			nouveau_grctx_fini(dev);
+			return ret;
+		}
+
+		pgraph->ctxvals = kmalloc(fw->size, GFP_KERNEL);
+		if (!pgraph->ctxvals) {
+			NV_ERROR(dev, "OOM copying ctxvals\n");
+			release_firmware(fw);
+			nouveau_grctx_fini(dev);
+			return -ENOMEM;
+		}
+		memcpy(pgraph->ctxvals, fw->data, fw->size);
+
+		cv = (void *)pgraph->ctxvals;
+		if (le32_to_cpu(cv->signature) != 0x5643564e ||
+		    cv->version != 0 ||
+		    le32_to_cpu(cv->length) != ((fw->size - 9) / 8)) {
+			NV_ERROR(dev, "ctxvals invalid\n");
+			release_firmware(fw);
+			nouveau_grctx_fini(dev);
+			return -EINVAL;
+		}
+		release_firmware(fw);
+	}
+
+	cp = pgraph->ctxprog;
+
+	nv_wr32(dev, NV40_PGRAPH_CTXCTL_UCODE_INDEX, 0);
+	for (i = 0; i < le16_to_cpu(cp->length); i++)
+		nv_wr32(dev, NV40_PGRAPH_CTXCTL_UCODE_DATA,
+			le32_to_cpu(cp->data[i]));
+
+	return 0;
+}
+
+void
+nouveau_grctx_fini(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
+
+	if (pgraph->ctxprog) {
+		kfree(pgraph->ctxprog);
+		pgraph->ctxprog = NULL;
+	}
+
+	if (pgraph->ctxvals) {
+		kfree(pgraph->ctxprog);
+		pgraph->ctxvals = NULL;
+	}
+}
+
+void
+nouveau_grctx_vals_load(struct drm_device *dev, struct nouveau_gpuobj *ctx)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
+	struct nouveau_ctxvals *cv = pgraph->ctxvals;
+	int i;
+
+	if (!cv)
+		return;
+
+	for (i = 0; i < le32_to_cpu(cv->length); i++)
+		nv_wo32(dev, ctx, le32_to_cpu(cv->data[i].offset),
+			le32_to_cpu(cv->data[i].value));
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_encoder.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_encoder.h
@@ -0,0 +1,91 @@
+/*
+ * Copyright (C) 2008 Maarten Maathuis.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#ifndef __NOUVEAU_ENCODER_H__
+#define __NOUVEAU_ENCODER_H__
+
+#include "drm_encoder_slave.h"
+#include "nouveau_drv.h"
+
+#define NV_DPMS_CLEARED 0x80
+
+struct nouveau_encoder {
+	struct drm_encoder_slave base;
+
+	struct dcb_entry *dcb;
+	int or;
+
+	struct drm_display_mode mode;
+	int last_dpms;
+
+	struct nv04_output_reg restore;
+
+	void (*disconnect)(struct nouveau_encoder *encoder);
+
+	union {
+		struct {
+			int dpcd_version;
+			int link_nr;
+			int link_bw;
+		} dp;
+	};
+};
+
+static inline struct nouveau_encoder *nouveau_encoder(struct drm_encoder *enc)
+{
+	struct drm_encoder_slave *slave = to_encoder_slave(enc);
+
+	return container_of(slave, struct nouveau_encoder, base);
+}
+
+static inline struct drm_encoder *to_drm_encoder(struct nouveau_encoder *enc)
+{
+	return &enc->base.base;
+}
+
+struct nouveau_connector *
+nouveau_encoder_connector_get(struct nouveau_encoder *encoder);
+int nv50_sor_create(struct drm_device *dev, struct dcb_entry *entry);
+int nv50_dac_create(struct drm_device *dev, struct dcb_entry *entry);
+
+struct bit_displayport_encoder_table {
+	uint32_t match;
+	uint8_t  record_nr;
+	uint8_t  unknown;
+	uint16_t script0;
+	uint16_t script1;
+	uint16_t unknown_table;
+} __attribute__ ((packed));
+
+struct bit_displayport_encoder_table_entry {
+	uint8_t vs_level;
+	uint8_t pre_level;
+	uint8_t reg0;
+	uint8_t reg1;
+	uint8_t reg2;
+} __attribute__ ((packed));
+
+#endif /* __NOUVEAU_ENCODER_H__ */
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_dma.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_dma.h
@@ -0,0 +1,159 @@
+/*
+ * Copyright (C) 2007 Ben Skeggs.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#ifndef __NOUVEAU_DMA_H__
+#define __NOUVEAU_DMA_H__
+
+#ifndef NOUVEAU_DMA_DEBUG
+#define NOUVEAU_DMA_DEBUG 0
+#endif
+
+/*
+ * There's a hw race condition where you can't jump to your PUT offset,
+ * to avoid this we jump to offset + SKIPS and fill the difference with
+ * NOPs.
+ *
+ * xf86-video-nv configures the DMA fetch size to 32 bytes, and uses
+ * a SKIPS value of 8.  Lets assume that the race condition is to do
+ * with writing into the fetch area, we configure a fetch size of 128
+ * bytes so we need a larger SKIPS value.
+ */
+#define NOUVEAU_DMA_SKIPS (128 / 4)
+
+/* Hardcoded object assignments to subchannels (subchannel id). */
+enum {
+	NvSubM2MF	= 0,
+	NvSubSw		= 1,
+	NvSub2D		= 2,
+	NvSubCtxSurf2D  = 2,
+	NvSubGdiRect    = 3,
+	NvSubImageBlit  = 4
+};
+
+/* Object handles. */
+enum {
+	NvM2MF		= 0x80000001,
+	NvDmaFB		= 0x80000002,
+	NvDmaTT		= 0x80000003,
+	NvDmaVRAM	= 0x80000004,
+	NvDmaGART	= 0x80000005,
+	NvNotify0       = 0x80000006,
+	Nv2D		= 0x80000007,
+	NvCtxSurf2D	= 0x80000008,
+	NvRop		= 0x80000009,
+	NvImagePatt	= 0x8000000a,
+	NvClipRect	= 0x8000000b,
+	NvGdiRect	= 0x8000000c,
+	NvImageBlit	= 0x8000000d,
+	NvSw		= 0x8000000e,
+
+	/* G80+ display objects */
+	NvEvoVRAM	= 0x01000000,
+	NvEvoFB16	= 0x01000001,
+	NvEvoFB32	= 0x01000002
+};
+
+#define NV_MEMORY_TO_MEMORY_FORMAT                                    0x00000039
+#define NV_MEMORY_TO_MEMORY_FORMAT_NAME                               0x00000000
+#define NV_MEMORY_TO_MEMORY_FORMAT_SET_REF                            0x00000050
+#define NV_MEMORY_TO_MEMORY_FORMAT_NOP                                0x00000100
+#define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY                             0x00000104
+#define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY_STYLE_WRITE                 0x00000000
+#define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY_STYLE_WRITE_LE_AWAKEN       0x00000001
+#define NV_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY                         0x00000180
+#define NV_MEMORY_TO_MEMORY_FORMAT_DMA_SOURCE                         0x00000184
+#define NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN                          0x0000030c
+
+#define NV50_MEMORY_TO_MEMORY_FORMAT                                  0x00005039
+#define NV50_MEMORY_TO_MEMORY_FORMAT_UNK200                           0x00000200
+#define NV50_MEMORY_TO_MEMORY_FORMAT_UNK21C                           0x0000021c
+#define NV50_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN_HIGH                   0x00000238
+#define NV50_MEMORY_TO_MEMORY_FORMAT_OFFSET_OUT_HIGH                  0x0000023c
+
+static __must_check inline int
+RING_SPACE(struct nouveau_channel *chan, int size)
+{
+	if (chan->dma.free < size) {
+		int ret;
+
+		ret = nouveau_dma_wait(chan, size);
+		if (ret)
+			return ret;
+	}
+
+	chan->dma.free -= size;
+	return 0;
+}
+
+static inline void
+OUT_RING(struct nouveau_channel *chan, int data)
+{
+	if (NOUVEAU_DMA_DEBUG) {
+		NV_INFO(chan->dev, "Ch%d/0x%08x: 0x%08x\n",
+			chan->id, chan->dma.cur << 2, data);
+	}
+
+	nouveau_bo_wr32(chan->pushbuf_bo, chan->dma.cur++, data);
+}
+
+extern void
+OUT_RINGp(struct nouveau_channel *chan, const void *data, unsigned nr_dwords);
+
+static inline void
+BEGIN_RING(struct nouveau_channel *chan, int subc, int mthd, int size)
+{
+	OUT_RING(chan, (subc << 13) | (size << 18) | mthd);
+}
+
+#define WRITE_PUT(val) do {                                                    \
+	DRM_MEMORYBARRIER();                                                   \
+	nouveau_bo_rd32(chan->pushbuf_bo, 0);                                  \
+	nvchan_wr32(chan, chan->user_put, ((val) << 2) + chan->pushbuf_base);  \
+} while (0)
+
+static inline void
+FIRE_RING(struct nouveau_channel *chan)
+{
+	if (NOUVEAU_DMA_DEBUG) {
+		NV_INFO(chan->dev, "Ch%d/0x%08x: PUSH!\n",
+			chan->id, chan->dma.cur << 2);
+	}
+
+	if (chan->dma.cur == chan->dma.put)
+		return;
+	chan->accel_done = true;
+
+	WRITE_PUT(chan->dma.cur);
+	chan->dma.put = chan->dma.cur;
+}
+
+static inline void
+WIND_RING(struct nouveau_channel *chan)
+{
+	chan->dma.cur = chan->dma.put;
+}
+
+#endif
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv10_graph.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv10_graph.c
@@ -0,0 +1,1009 @@
+/*
+ * Copyright 2007 Matthieu CASTET <castet.matthieu@free.fr>
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#include "drmP.h"
+#include "drm.h"
+#include "nouveau_drm.h"
+#include "nouveau_drv.h"
+
+#define NV10_FIFO_NUMBER 32
+
+struct pipe_state {
+	uint32_t pipe_0x0000[0x040/4];
+	uint32_t pipe_0x0040[0x010/4];
+	uint32_t pipe_0x0200[0x0c0/4];
+	uint32_t pipe_0x4400[0x080/4];
+	uint32_t pipe_0x6400[0x3b0/4];
+	uint32_t pipe_0x6800[0x2f0/4];
+	uint32_t pipe_0x6c00[0x030/4];
+	uint32_t pipe_0x7000[0x130/4];
+	uint32_t pipe_0x7400[0x0c0/4];
+	uint32_t pipe_0x7800[0x0c0/4];
+};
+
+static int nv10_graph_ctx_regs[] = {
+	NV10_PGRAPH_CTX_SWITCH1,
+	NV10_PGRAPH_CTX_SWITCH2,
+	NV10_PGRAPH_CTX_SWITCH3,
+	NV10_PGRAPH_CTX_SWITCH4,
+	NV10_PGRAPH_CTX_SWITCH5,
+	NV10_PGRAPH_CTX_CACHE1,	/* 8 values from 0x400160 to 0x40017c */
+	NV10_PGRAPH_CTX_CACHE2,	/* 8 values from 0x400180 to 0x40019c */
+	NV10_PGRAPH_CTX_CACHE3,	/* 8 values from 0x4001a0 to 0x4001bc */
+	NV10_PGRAPH_CTX_CACHE4,	/* 8 values from 0x4001c0 to 0x4001dc */
+	NV10_PGRAPH_CTX_CACHE5,	/* 8 values from 0x4001e0 to 0x4001fc */
+	0x00400164,
+	0x00400184,
+	0x004001a4,
+	0x004001c4,
+	0x004001e4,
+	0x00400168,
+	0x00400188,
+	0x004001a8,
+	0x004001c8,
+	0x004001e8,
+	0x0040016c,
+	0x0040018c,
+	0x004001ac,
+	0x004001cc,
+	0x004001ec,
+	0x00400170,
+	0x00400190,
+	0x004001b0,
+	0x004001d0,
+	0x004001f0,
+	0x00400174,
+	0x00400194,
+	0x004001b4,
+	0x004001d4,
+	0x004001f4,
+	0x00400178,
+	0x00400198,
+	0x004001b8,
+	0x004001d8,
+	0x004001f8,
+	0x0040017c,
+	0x0040019c,
+	0x004001bc,
+	0x004001dc,
+	0x004001fc,
+	NV10_PGRAPH_CTX_USER,
+	NV04_PGRAPH_DMA_START_0,
+	NV04_PGRAPH_DMA_START_1,
+	NV04_PGRAPH_DMA_LENGTH,
+	NV04_PGRAPH_DMA_MISC,
+	NV10_PGRAPH_DMA_PITCH,
+	NV04_PGRAPH_BOFFSET0,
+	NV04_PGRAPH_BBASE0,
+	NV04_PGRAPH_BLIMIT0,
+	NV04_PGRAPH_BOFFSET1,
+	NV04_PGRAPH_BBASE1,
+	NV04_PGRAPH_BLIMIT1,
+	NV04_PGRAPH_BOFFSET2,
+	NV04_PGRAPH_BBASE2,
+	NV04_PGRAPH_BLIMIT2,
+	NV04_PGRAPH_BOFFSET3,
+	NV04_PGRAPH_BBASE3,
+	NV04_PGRAPH_BLIMIT3,
+	NV04_PGRAPH_BOFFSET4,
+	NV04_PGRAPH_BBASE4,
+	NV04_PGRAPH_BLIMIT4,
+	NV04_PGRAPH_BOFFSET5,
+	NV04_PGRAPH_BBASE5,
+	NV04_PGRAPH_BLIMIT5,
+	NV04_PGRAPH_BPITCH0,
+	NV04_PGRAPH_BPITCH1,
+	NV04_PGRAPH_BPITCH2,
+	NV04_PGRAPH_BPITCH3,
+	NV04_PGRAPH_BPITCH4,
+	NV10_PGRAPH_SURFACE,
+	NV10_PGRAPH_STATE,
+	NV04_PGRAPH_BSWIZZLE2,
+	NV04_PGRAPH_BSWIZZLE5,
+	NV04_PGRAPH_BPIXEL,
+	NV10_PGRAPH_NOTIFY,
+	NV04_PGRAPH_PATT_COLOR0,
+	NV04_PGRAPH_PATT_COLOR1,
+	NV04_PGRAPH_PATT_COLORRAM, /* 64 values from 0x400900 to 0x4009fc */
+	0x00400904,
+	0x00400908,
+	0x0040090c,
+	0x00400910,
+	0x00400914,
+	0x00400918,
+	0x0040091c,
+	0x00400920,
+	0x00400924,
+	0x00400928,
+	0x0040092c,
+	0x00400930,
+	0x00400934,
+	0x00400938,
+	0x0040093c,
+	0x00400940,
+	0x00400944,
+	0x00400948,
+	0x0040094c,
+	0x00400950,
+	0x00400954,
+	0x00400958,
+	0x0040095c,
+	0x00400960,
+	0x00400964,
+	0x00400968,
+	0x0040096c,
+	0x00400970,
+	0x00400974,
+	0x00400978,
+	0x0040097c,
+	0x00400980,
+	0x00400984,
+	0x00400988,
+	0x0040098c,
+	0x00400990,
+	0x00400994,
+	0x00400998,
+	0x0040099c,
+	0x004009a0,
+	0x004009a4,
+	0x004009a8,
+	0x004009ac,
+	0x004009b0,
+	0x004009b4,
+	0x004009b8,
+	0x004009bc,
+	0x004009c0,
+	0x004009c4,
+	0x004009c8,
+	0x004009cc,
+	0x004009d0,
+	0x004009d4,
+	0x004009d8,
+	0x004009dc,
+	0x004009e0,
+	0x004009e4,
+	0x004009e8,
+	0x004009ec,
+	0x004009f0,
+	0x004009f4,
+	0x004009f8,
+	0x004009fc,
+	NV04_PGRAPH_PATTERN,	/* 2 values from 0x400808 to 0x40080c */
+	0x0040080c,
+	NV04_PGRAPH_PATTERN_SHAPE,
+	NV03_PGRAPH_MONO_COLOR0,
+	NV04_PGRAPH_ROP3,
+	NV04_PGRAPH_CHROMA,
+	NV04_PGRAPH_BETA_AND,
+	NV04_PGRAPH_BETA_PREMULT,
+	0x00400e70,
+	0x00400e74,
+	0x00400e78,
+	0x00400e7c,
+	0x00400e80,
+	0x00400e84,
+	0x00400e88,
+	0x00400e8c,
+	0x00400ea0,
+	0x00400ea4,
+	0x00400ea8,
+	0x00400e90,
+	0x00400e94,
+	0x00400e98,
+	0x00400e9c,
+	NV10_PGRAPH_WINDOWCLIP_HORIZONTAL, /* 8 values from 0x400f00-0x400f1c */
+	NV10_PGRAPH_WINDOWCLIP_VERTICAL,   /* 8 values from 0x400f20-0x400f3c */
+	0x00400f04,
+	0x00400f24,
+	0x00400f08,
+	0x00400f28,
+	0x00400f0c,
+	0x00400f2c,
+	0x00400f10,
+	0x00400f30,
+	0x00400f14,
+	0x00400f34,
+	0x00400f18,
+	0x00400f38,
+	0x00400f1c,
+	0x00400f3c,
+	NV10_PGRAPH_XFMODE0,
+	NV10_PGRAPH_XFMODE1,
+	NV10_PGRAPH_GLOBALSTATE0,
+	NV10_PGRAPH_GLOBALSTATE1,
+	NV04_PGRAPH_STORED_FMT,
+	NV04_PGRAPH_SOURCE_COLOR,
+	NV03_PGRAPH_ABS_X_RAM,	/* 32 values from 0x400400 to 0x40047c */
+	NV03_PGRAPH_ABS_Y_RAM,	/* 32 values from 0x400480 to 0x4004fc */
+	0x00400404,
+	0x00400484,
+	0x00400408,
+	0x00400488,
+	0x0040040c,
+	0x0040048c,
+	0x00400410,
+	0x00400490,
+	0x00400414,
+	0x00400494,
+	0x00400418,
+	0x00400498,
+	0x0040041c,
+	0x0040049c,
+	0x00400420,
+	0x004004a0,
+	0x00400424,
+	0x004004a4,
+	0x00400428,
+	0x004004a8,
+	0x0040042c,
+	0x004004ac,
+	0x00400430,
+	0x004004b0,
+	0x00400434,
+	0x004004b4,
+	0x00400438,
+	0x004004b8,
+	0x0040043c,
+	0x004004bc,
+	0x00400440,
+	0x004004c0,
+	0x00400444,
+	0x004004c4,
+	0x00400448,
+	0x004004c8,
+	0x0040044c,
+	0x004004cc,
+	0x00400450,
+	0x004004d0,
+	0x00400454,
+	0x004004d4,
+	0x00400458,
+	0x004004d8,
+	0x0040045c,
+	0x004004dc,
+	0x00400460,
+	0x004004e0,
+	0x00400464,
+	0x004004e4,
+	0x00400468,
+	0x004004e8,
+	0x0040046c,
+	0x004004ec,
+	0x00400470,
+	0x004004f0,
+	0x00400474,
+	0x004004f4,
+	0x00400478,
+	0x004004f8,
+	0x0040047c,
+	0x004004fc,
+	NV03_PGRAPH_ABS_UCLIP_XMIN,
+	NV03_PGRAPH_ABS_UCLIP_XMAX,
+	NV03_PGRAPH_ABS_UCLIP_YMIN,
+	NV03_PGRAPH_ABS_UCLIP_YMAX,
+	0x00400550,
+	0x00400558,
+	0x00400554,
+	0x0040055c,
+	NV03_PGRAPH_ABS_UCLIPA_XMIN,
+	NV03_PGRAPH_ABS_UCLIPA_XMAX,
+	NV03_PGRAPH_ABS_UCLIPA_YMIN,
+	NV03_PGRAPH_ABS_UCLIPA_YMAX,
+	NV03_PGRAPH_ABS_ICLIP_XMAX,
+	NV03_PGRAPH_ABS_ICLIP_YMAX,
+	NV03_PGRAPH_XY_LOGIC_MISC0,
+	NV03_PGRAPH_XY_LOGIC_MISC1,
+	NV03_PGRAPH_XY_LOGIC_MISC2,
+	NV03_PGRAPH_XY_LOGIC_MISC3,
+	NV03_PGRAPH_CLIPX_0,
+	NV03_PGRAPH_CLIPX_1,
+	NV03_PGRAPH_CLIPY_0,
+	NV03_PGRAPH_CLIPY_1,
+	NV10_PGRAPH_COMBINER0_IN_ALPHA,
+	NV10_PGRAPH_COMBINER1_IN_ALPHA,
+	NV10_PGRAPH_COMBINER0_IN_RGB,
+	NV10_PGRAPH_COMBINER1_IN_RGB,
+	NV10_PGRAPH_COMBINER_COLOR0,
+	NV10_PGRAPH_COMBINER_COLOR1,
+	NV10_PGRAPH_COMBINER0_OUT_ALPHA,
+	NV10_PGRAPH_COMBINER1_OUT_ALPHA,
+	NV10_PGRAPH_COMBINER0_OUT_RGB,
+	NV10_PGRAPH_COMBINER1_OUT_RGB,
+	NV10_PGRAPH_COMBINER_FINAL0,
+	NV10_PGRAPH_COMBINER_FINAL1,
+	0x00400e00,
+	0x00400e04,
+	0x00400e08,
+	0x00400e0c,
+	0x00400e10,
+	0x00400e14,
+	0x00400e18,
+	0x00400e1c,
+	0x00400e20,
+	0x00400e24,
+	0x00400e28,
+	0x00400e2c,
+	0x00400e30,
+	0x00400e34,
+	0x00400e38,
+	0x00400e3c,
+	NV04_PGRAPH_PASSTHRU_0,
+	NV04_PGRAPH_PASSTHRU_1,
+	NV04_PGRAPH_PASSTHRU_2,
+	NV10_PGRAPH_DIMX_TEXTURE,
+	NV10_PGRAPH_WDIMX_TEXTURE,
+	NV10_PGRAPH_DVD_COLORFMT,
+	NV10_PGRAPH_SCALED_FORMAT,
+	NV04_PGRAPH_MISC24_0,
+	NV04_PGRAPH_MISC24_1,
+	NV04_PGRAPH_MISC24_2,
+	NV03_PGRAPH_X_MISC,
+	NV03_PGRAPH_Y_MISC,
+	NV04_PGRAPH_VALID1,
+	NV04_PGRAPH_VALID2,
+};
+
+static int nv17_graph_ctx_regs[] = {
+	NV10_PGRAPH_DEBUG_4,
+	0x004006b0,
+	0x00400eac,
+	0x00400eb0,
+	0x00400eb4,
+	0x00400eb8,
+	0x00400ebc,
+	0x00400ec0,
+	0x00400ec4,
+	0x00400ec8,
+	0x00400ecc,
+	0x00400ed0,
+	0x00400ed4,
+	0x00400ed8,
+	0x00400edc,
+	0x00400ee0,
+	0x00400a00,
+	0x00400a04,
+};
+
+struct graph_state {
+	int nv10[ARRAY_SIZE(nv10_graph_ctx_regs)];
+	int nv17[ARRAY_SIZE(nv17_graph_ctx_regs)];
+	struct pipe_state pipe_state;
+	uint32_t lma_window[4];
+};
+
+#define PIPE_SAVE(dev, state, addr)					\
+	do {								\
+		int __i;						\
+		nv_wr32(dev, NV10_PGRAPH_PIPE_ADDRESS, addr);		\
+		for (__i = 0; __i < ARRAY_SIZE(state); __i++)		\
+			state[__i] = nv_rd32(dev, NV10_PGRAPH_PIPE_DATA); \
+	} while (0)
+
+#define PIPE_RESTORE(dev, state, addr)					\
+	do {								\
+		int __i;						\
+		nv_wr32(dev, NV10_PGRAPH_PIPE_ADDRESS, addr);		\
+		for (__i = 0; __i < ARRAY_SIZE(state); __i++)		\
+			nv_wr32(dev, NV10_PGRAPH_PIPE_DATA, state[__i]); \
+	} while (0)
+
+static void nv10_graph_save_pipe(struct nouveau_channel *chan)
+{
+	struct drm_device *dev = chan->dev;
+	struct graph_state *pgraph_ctx = chan->pgraph_ctx;
+	struct pipe_state *pipe = &pgraph_ctx->pipe_state;
+
+	PIPE_SAVE(dev, pipe->pipe_0x4400, 0x4400);
+	PIPE_SAVE(dev, pipe->pipe_0x0200, 0x0200);
+	PIPE_SAVE(dev, pipe->pipe_0x6400, 0x6400);
+	PIPE_SAVE(dev, pipe->pipe_0x6800, 0x6800);
+	PIPE_SAVE(dev, pipe->pipe_0x6c00, 0x6c00);
+	PIPE_SAVE(dev, pipe->pipe_0x7000, 0x7000);
+	PIPE_SAVE(dev, pipe->pipe_0x7400, 0x7400);
+	PIPE_SAVE(dev, pipe->pipe_0x7800, 0x7800);
+	PIPE_SAVE(dev, pipe->pipe_0x0040, 0x0040);
+	PIPE_SAVE(dev, pipe->pipe_0x0000, 0x0000);
+}
+
+static void nv10_graph_load_pipe(struct nouveau_channel *chan)
+{
+	struct drm_device *dev = chan->dev;
+	struct graph_state *pgraph_ctx = chan->pgraph_ctx;
+	struct pipe_state *pipe = &pgraph_ctx->pipe_state;
+	uint32_t xfmode0, xfmode1;
+	int i;
+
+	nouveau_wait_for_idle(dev);
+	/* XXX check haiku comments */
+	xfmode0 = nv_rd32(dev, NV10_PGRAPH_XFMODE0);
+	xfmode1 = nv_rd32(dev, NV10_PGRAPH_XFMODE1);
+	nv_wr32(dev, NV10_PGRAPH_XFMODE0, 0x10000000);
+	nv_wr32(dev, NV10_PGRAPH_XFMODE1, 0x00000000);
+	nv_wr32(dev, NV10_PGRAPH_PIPE_ADDRESS, 0x000064c0);
+	for (i = 0; i < 4; i++)
+		nv_wr32(dev, NV10_PGRAPH_PIPE_DATA, 0x3f800000);
+	for (i = 0; i < 4; i++)
+		nv_wr32(dev, NV10_PGRAPH_PIPE_DATA, 0x00000000);
+
+	nv_wr32(dev, NV10_PGRAPH_PIPE_ADDRESS, 0x00006ab0);
+	for (i = 0; i < 3; i++)
+		nv_wr32(dev, NV10_PGRAPH_PIPE_DATA, 0x3f800000);
+
+	nv_wr32(dev, NV10_PGRAPH_PIPE_ADDRESS, 0x00006a80);
+	for (i = 0; i < 3; i++)
+		nv_wr32(dev, NV10_PGRAPH_PIPE_DATA, 0x00000000);
+
+	nv_wr32(dev, NV10_PGRAPH_PIPE_ADDRESS, 0x00000040);
+	nv_wr32(dev, NV10_PGRAPH_PIPE_DATA, 0x00000008);
+
+
+	PIPE_RESTORE(dev, pipe->pipe_0x0200, 0x0200);
+	nouveau_wait_for_idle(dev);
+
+	/* restore XFMODE */
+	nv_wr32(dev, NV10_PGRAPH_XFMODE0, xfmode0);
+	nv_wr32(dev, NV10_PGRAPH_XFMODE1, xfmode1);
+	PIPE_RESTORE(dev, pipe->pipe_0x6400, 0x6400);
+	PIPE_RESTORE(dev, pipe->pipe_0x6800, 0x6800);
+	PIPE_RESTORE(dev, pipe->pipe_0x6c00, 0x6c00);
+	PIPE_RESTORE(dev, pipe->pipe_0x7000, 0x7000);
+	PIPE_RESTORE(dev, pipe->pipe_0x7400, 0x7400);
+	PIPE_RESTORE(dev, pipe->pipe_0x7800, 0x7800);
+	PIPE_RESTORE(dev, pipe->pipe_0x4400, 0x4400);
+	PIPE_RESTORE(dev, pipe->pipe_0x0000, 0x0000);
+	PIPE_RESTORE(dev, pipe->pipe_0x0040, 0x0040);
+	nouveau_wait_for_idle(dev);
+}
+
+static void nv10_graph_create_pipe(struct nouveau_channel *chan)
+{
+	struct drm_device *dev = chan->dev;
+	struct graph_state *pgraph_ctx = chan->pgraph_ctx;
+	struct pipe_state *fifo_pipe_state = &pgraph_ctx->pipe_state;
+	uint32_t *fifo_pipe_state_addr;
+	int i;
+#define PIPE_INIT(addr) \
+	do { \
+		fifo_pipe_state_addr = fifo_pipe_state->pipe_##addr; \
+	} while (0)
+#define PIPE_INIT_END(addr) \
+	do { \
+		uint32_t *__end_addr = fifo_pipe_state->pipe_##addr + \
+				ARRAY_SIZE(fifo_pipe_state->pipe_##addr); \
+		if (fifo_pipe_state_addr != __end_addr) \
+			NV_ERROR(dev, "incomplete pipe init for 0x%x :  %p/%p\n", \
+				addr, fifo_pipe_state_addr, __end_addr); \
+	} while (0)
+#define NV_WRITE_PIPE_INIT(value) *(fifo_pipe_state_addr++) = value
+
+	PIPE_INIT(0x0200);
+	for (i = 0; i < 48; i++)
+		NV_WRITE_PIPE_INIT(0x00000000);
+	PIPE_INIT_END(0x0200);
+
+	PIPE_INIT(0x6400);
+	for (i = 0; i < 211; i++)
+		NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x3f800000);
+	NV_WRITE_PIPE_INIT(0x40000000);
+	NV_WRITE_PIPE_INIT(0x40000000);
+	NV_WRITE_PIPE_INIT(0x40000000);
+	NV_WRITE_PIPE_INIT(0x40000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x3f800000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x3f000000);
+	NV_WRITE_PIPE_INIT(0x3f000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x3f800000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x3f800000);
+	NV_WRITE_PIPE_INIT(0x3f800000);
+	NV_WRITE_PIPE_INIT(0x3f800000);
+	NV_WRITE_PIPE_INIT(0x3f800000);
+	PIPE_INIT_END(0x6400);
+
+	PIPE_INIT(0x6800);
+	for (i = 0; i < 162; i++)
+		NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x3f800000);
+	for (i = 0; i < 25; i++)
+		NV_WRITE_PIPE_INIT(0x00000000);
+	PIPE_INIT_END(0x6800);
+
+	PIPE_INIT(0x6c00);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0xbf800000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	PIPE_INIT_END(0x6c00);
+
+	PIPE_INIT(0x7000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x7149f2ca);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x7149f2ca);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x7149f2ca);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x7149f2ca);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x7149f2ca);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x7149f2ca);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x7149f2ca);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x00000000);
+	NV_WRITE_PIPE_INIT(0x7149f2ca);
+	for (i = 0; i < 35; i++)
+		NV_WRITE_PIPE_INIT(0x00000000);
+	PIPE_INIT_END(0x7000);
+
+	PIPE_INIT(0x7400);
+	for (i = 0; i < 48; i++)
+		NV_WRITE_PIPE_INIT(0x00000000);
+	PIPE_INIT_END(0x7400);
+
+	PIPE_INIT(0x7800);
+	for (i = 0; i < 48; i++)
+		NV_WRITE_PIPE_INIT(0x00000000);
+	PIPE_INIT_END(0x7800);
+
+	PIPE_INIT(0x4400);
+	for (i = 0; i < 32; i++)
+		NV_WRITE_PIPE_INIT(0x00000000);
+	PIPE_INIT_END(0x4400);
+
+	PIPE_INIT(0x0000);
+	for (i = 0; i < 16; i++)
+		NV_WRITE_PIPE_INIT(0x00000000);
+	PIPE_INIT_END(0x0000);
+
+	PIPE_INIT(0x0040);
+	for (i = 0; i < 4; i++)
+		NV_WRITE_PIPE_INIT(0x00000000);
+	PIPE_INIT_END(0x0040);
+
+#undef PIPE_INIT
+#undef PIPE_INIT_END
+#undef NV_WRITE_PIPE_INIT
+}
+
+static int nv10_graph_ctx_regs_find_offset(struct drm_device *dev, int reg)
+{
+	int i;
+	for (i = 0; i < ARRAY_SIZE(nv10_graph_ctx_regs); i++) {
+		if (nv10_graph_ctx_regs[i] == reg)
+			return i;
+	}
+	NV_ERROR(dev, "unknow offset nv10_ctx_regs %d\n", reg);
+	return -1;
+}
+
+static int nv17_graph_ctx_regs_find_offset(struct drm_device *dev, int reg)
+{
+	int i;
+	for (i = 0; i < ARRAY_SIZE(nv17_graph_ctx_regs); i++) {
+		if (nv17_graph_ctx_regs[i] == reg)
+			return i;
+	}
+	NV_ERROR(dev, "unknow offset nv17_ctx_regs %d\n", reg);
+	return -1;
+}
+
+int nv10_graph_load_context(struct nouveau_channel *chan)
+{
+	struct drm_device *dev = chan->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct graph_state *pgraph_ctx = chan->pgraph_ctx;
+	uint32_t tmp;
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(nv10_graph_ctx_regs); i++)
+		nv_wr32(dev, nv10_graph_ctx_regs[i], pgraph_ctx->nv10[i]);
+	if (dev_priv->chipset >= 0x17) {
+		for (i = 0; i < ARRAY_SIZE(nv17_graph_ctx_regs); i++)
+			nv_wr32(dev, nv17_graph_ctx_regs[i],
+						pgraph_ctx->nv17[i]);
+	}
+
+	nv10_graph_load_pipe(chan);
+
+	nv_wr32(dev, NV10_PGRAPH_CTX_CONTROL, 0x10010100);
+	tmp = nv_rd32(dev, NV10_PGRAPH_CTX_USER);
+	nv_wr32(dev, NV10_PGRAPH_CTX_USER, (tmp & 0xffffff) | chan->id << 24);
+	tmp = nv_rd32(dev, NV10_PGRAPH_FFINTFC_ST2);
+	nv_wr32(dev, NV10_PGRAPH_FFINTFC_ST2, tmp & 0xcfffffff);
+	return 0;
+}
+
+int
+nv10_graph_unload_context(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
+	struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
+	struct nouveau_channel *chan;
+	struct graph_state *ctx;
+	uint32_t tmp;
+	int i;
+
+	chan = pgraph->channel(dev);
+	if (!chan)
+		return 0;
+	ctx = chan->pgraph_ctx;
+
+	for (i = 0; i < ARRAY_SIZE(nv10_graph_ctx_regs); i++)
+		ctx->nv10[i] = nv_rd32(dev, nv10_graph_ctx_regs[i]);
+
+	if (dev_priv->chipset >= 0x17) {
+		for (i = 0; i < ARRAY_SIZE(nv17_graph_ctx_regs); i++)
+			ctx->nv17[i] = nv_rd32(dev, nv17_graph_ctx_regs[i]);
+	}
+
+	nv10_graph_save_pipe(chan);
+
+	nv_wr32(dev, NV10_PGRAPH_CTX_CONTROL, 0x10000000);
+	tmp  = nv_rd32(dev, NV10_PGRAPH_CTX_USER) & 0x00ffffff;
+	tmp |= (pfifo->channels - 1) << 24;
+	nv_wr32(dev, NV10_PGRAPH_CTX_USER, tmp);
+	return 0;
+}
+
+void
+nv10_graph_context_switch(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
+	struct nouveau_channel *chan = NULL;
+	int chid;
+
+	pgraph->fifo_access(dev, false);
+	nouveau_wait_for_idle(dev);
+
+	/* If previous context is valid, we need to save it */
+	nv10_graph_unload_context(dev);
+
+	/* Load context for next channel */
+	chid = (nv_rd32(dev, NV04_PGRAPH_TRAPPED_ADDR) >> 20) & 0x1f;
+	chan = dev_priv->fifos[chid];
+	if (chan)
+		nv10_graph_load_context(chan);
+
+	pgraph->fifo_access(dev, true);
+}
+
+#define NV_WRITE_CTX(reg, val) do { \
+	int offset = nv10_graph_ctx_regs_find_offset(dev, reg); \
+	if (offset > 0) \
+		pgraph_ctx->nv10[offset] = val; \
+	} while (0)
+
+#define NV17_WRITE_CTX(reg, val) do { \
+	int offset = nv17_graph_ctx_regs_find_offset(dev, reg); \
+	if (offset > 0) \
+		pgraph_ctx->nv17[offset] = val; \
+	} while (0)
+
+struct nouveau_channel *
+nv10_graph_channel(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	int chid = dev_priv->engine.fifo.channels;
+
+	if (nv_rd32(dev, NV10_PGRAPH_CTX_CONTROL) & 0x00010000)
+		chid = nv_rd32(dev, NV10_PGRAPH_CTX_USER) >> 24;
+
+	if (chid >= dev_priv->engine.fifo.channels)
+		return NULL;
+
+	return dev_priv->fifos[chid];
+}
+
+int nv10_graph_create_context(struct nouveau_channel *chan)
+{
+	struct drm_device *dev = chan->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct graph_state *pgraph_ctx;
+
+	NV_DEBUG(dev, "nv10_graph_context_create %d\n", chan->id);
+
+	chan->pgraph_ctx = pgraph_ctx = kzalloc(sizeof(*pgraph_ctx),
+						GFP_KERNEL);
+	if (pgraph_ctx == NULL)
+		return -ENOMEM;
+
+
+	NV_WRITE_CTX(0x00400e88, 0x08000000);
+	NV_WRITE_CTX(0x00400e9c, 0x4b7fffff);
+	NV_WRITE_CTX(NV03_PGRAPH_XY_LOGIC_MISC0, 0x0001ffff);
+	NV_WRITE_CTX(0x00400e10, 0x00001000);
+	NV_WRITE_CTX(0x00400e14, 0x00001000);
+	NV_WRITE_CTX(0x00400e30, 0x00080008);
+	NV_WRITE_CTX(0x00400e34, 0x00080008);
+	if (dev_priv->chipset >= 0x17) {
+		/* is it really needed ??? */
+		NV17_WRITE_CTX(NV10_PGRAPH_DEBUG_4,
+					nv_rd32(dev, NV10_PGRAPH_DEBUG_4));
+		NV17_WRITE_CTX(0x004006b0, nv_rd32(dev, 0x004006b0));
+		NV17_WRITE_CTX(0x00400eac, 0x0fff0000);
+		NV17_WRITE_CTX(0x00400eb0, 0x0fff0000);
+		NV17_WRITE_CTX(0x00400ec0, 0x00000080);
+		NV17_WRITE_CTX(0x00400ed0, 0x00000080);
+	}
+	NV_WRITE_CTX(NV10_PGRAPH_CTX_USER, chan->id << 24);
+
+	nv10_graph_create_pipe(chan);
+	return 0;
+}
+
+void nv10_graph_destroy_context(struct nouveau_channel *chan)
+{
+	struct graph_state *pgraph_ctx = chan->pgraph_ctx;
+
+	kfree(pgraph_ctx);
+	chan->pgraph_ctx = NULL;
+}
+
+void
+nv10_graph_set_region_tiling(struct drm_device *dev, int i, uint32_t addr,
+			     uint32_t size, uint32_t pitch)
+{
+	uint32_t limit = max(1u, addr + size) - 1;
+
+	if (pitch)
+		addr |= 1 << 31;
+
+	nv_wr32(dev, NV10_PGRAPH_TLIMIT(i), limit);
+	nv_wr32(dev, NV10_PGRAPH_TSIZE(i), pitch);
+	nv_wr32(dev, NV10_PGRAPH_TILE(i), addr);
+}
+
+int nv10_graph_init(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	uint32_t tmp;
+	int i;
+
+	nv_wr32(dev, NV03_PMC_ENABLE, nv_rd32(dev, NV03_PMC_ENABLE) &
+			~NV_PMC_ENABLE_PGRAPH);
+	nv_wr32(dev, NV03_PMC_ENABLE, nv_rd32(dev, NV03_PMC_ENABLE) |
+			 NV_PMC_ENABLE_PGRAPH);
+
+	nv_wr32(dev, NV03_PGRAPH_INTR   , 0xFFFFFFFF);
+	nv_wr32(dev, NV03_PGRAPH_INTR_EN, 0xFFFFFFFF);
+
+	nv_wr32(dev, NV04_PGRAPH_DEBUG_0, 0xFFFFFFFF);
+	nv_wr32(dev, NV04_PGRAPH_DEBUG_0, 0x00000000);
+	nv_wr32(dev, NV04_PGRAPH_DEBUG_1, 0x00118700);
+	/* nv_wr32(dev, NV04_PGRAPH_DEBUG_2, 0x24E00810); */ /* 0x25f92ad9 */
+	nv_wr32(dev, NV04_PGRAPH_DEBUG_2, 0x25f92ad9);
+	nv_wr32(dev, NV04_PGRAPH_DEBUG_3, 0x55DE0830 |
+				      (1<<29) |
+				      (1<<31));
+	if (dev_priv->chipset >= 0x17) {
+		nv_wr32(dev, NV10_PGRAPH_DEBUG_4, 0x1f000000);
+		nv_wr32(dev, 0x400a10, 0x3ff3fb6);
+		nv_wr32(dev, 0x400838, 0x2f8684);
+		nv_wr32(dev, 0x40083c, 0x115f3f);
+		nv_wr32(dev, 0x004006b0, 0x40000020);
+	} else
+		nv_wr32(dev, NV10_PGRAPH_DEBUG_4, 0x00000000);
+
+	/* Turn all the tiling regions off. */
+	for (i = 0; i < NV10_PFB_TILE__SIZE; i++)
+		nv10_graph_set_region_tiling(dev, i, 0, 0, 0);
+
+	nv_wr32(dev, NV10_PGRAPH_CTX_SWITCH1, 0x00000000);
+	nv_wr32(dev, NV10_PGRAPH_CTX_SWITCH2, 0x00000000);
+	nv_wr32(dev, NV10_PGRAPH_CTX_SWITCH3, 0x00000000);
+	nv_wr32(dev, NV10_PGRAPH_CTX_SWITCH4, 0x00000000);
+	nv_wr32(dev, NV10_PGRAPH_STATE      , 0xFFFFFFFF);
+
+	tmp  = nv_rd32(dev, NV10_PGRAPH_CTX_USER) & 0x00ffffff;
+	tmp |= (dev_priv->engine.fifo.channels - 1) << 24;
+	nv_wr32(dev, NV10_PGRAPH_CTX_USER, tmp);
+	nv_wr32(dev, NV10_PGRAPH_CTX_CONTROL, 0x10000100);
+	nv_wr32(dev, NV10_PGRAPH_FFINTFC_ST2, 0x08000000);
+
+	return 0;
+}
+
+void nv10_graph_takedown(struct drm_device *dev)
+{
+}
+
+static int
+nv17_graph_mthd_lma_window(struct nouveau_channel *chan, int grclass,
+			   int mthd, uint32_t data)
+{
+	struct drm_device *dev = chan->dev;
+	struct graph_state *ctx = chan->pgraph_ctx;
+	struct pipe_state *pipe = &ctx->pipe_state;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
+	uint32_t pipe_0x0040[1], pipe_0x64c0[8], pipe_0x6a80[3], pipe_0x6ab0[3];
+	uint32_t xfmode0, xfmode1;
+	int i;
+
+	ctx->lma_window[(mthd - 0x1638) / 4] = data;
+
+	if (mthd != 0x1644)
+		return 0;
+
+	nouveau_wait_for_idle(dev);
+
+	PIPE_SAVE(dev, pipe_0x0040, 0x0040);
+	PIPE_SAVE(dev, pipe->pipe_0x0200, 0x0200);
+
+	PIPE_RESTORE(dev, ctx->lma_window, 0x6790);
+
+	nouveau_wait_for_idle(dev);
+
+	xfmode0 = nv_rd32(dev, NV10_PGRAPH_XFMODE0);
+	xfmode1 = nv_rd32(dev, NV10_PGRAPH_XFMODE1);
+
+	PIPE_SAVE(dev, pipe->pipe_0x4400, 0x4400);
+	PIPE_SAVE(dev, pipe_0x64c0, 0x64c0);
+	PIPE_SAVE(dev, pipe_0x6ab0, 0x6ab0);
+	PIPE_SAVE(dev, pipe_0x6a80, 0x6a80);
+
+	nouveau_wait_for_idle(dev);
+
+	nv_wr32(dev, NV10_PGRAPH_XFMODE0, 0x10000000);
+	nv_wr32(dev, NV10_PGRAPH_XFMODE1, 0x00000000);
+	nv_wr32(dev, NV10_PGRAPH_PIPE_ADDRESS, 0x000064c0);
+	for (i = 0; i < 4; i++)
+		nv_wr32(dev, NV10_PGRAPH_PIPE_DATA, 0x3f800000);
+	for (i = 0; i < 4; i++)
+		nv_wr32(dev, NV10_PGRAPH_PIPE_DATA, 0x00000000);
+
+	nv_wr32(dev, NV10_PGRAPH_PIPE_ADDRESS, 0x00006ab0);
+	for (i = 0; i < 3; i++)
+		nv_wr32(dev, NV10_PGRAPH_PIPE_DATA, 0x3f800000);
+
+	nv_wr32(dev, NV10_PGRAPH_PIPE_ADDRESS, 0x00006a80);
+	for (i = 0; i < 3; i++)
+		nv_wr32(dev, NV10_PGRAPH_PIPE_DATA, 0x00000000);
+
+	nv_wr32(dev, NV10_PGRAPH_PIPE_ADDRESS, 0x00000040);
+	nv_wr32(dev, NV10_PGRAPH_PIPE_DATA, 0x00000008);
+
+	PIPE_RESTORE(dev, pipe->pipe_0x0200, 0x0200);
+
+	nouveau_wait_for_idle(dev);
+
+	PIPE_RESTORE(dev, pipe_0x0040, 0x0040);
+
+	nv_wr32(dev, NV10_PGRAPH_XFMODE0, xfmode0);
+	nv_wr32(dev, NV10_PGRAPH_XFMODE1, xfmode1);
+
+	PIPE_RESTORE(dev, pipe_0x64c0, 0x64c0);
+	PIPE_RESTORE(dev, pipe_0x6ab0, 0x6ab0);
+	PIPE_RESTORE(dev, pipe_0x6a80, 0x6a80);
+	PIPE_RESTORE(dev, pipe->pipe_0x4400, 0x4400);
+
+	nv_wr32(dev, NV10_PGRAPH_PIPE_ADDRESS, 0x000000c0);
+	nv_wr32(dev, NV10_PGRAPH_PIPE_DATA, 0x00000000);
+
+	nouveau_wait_for_idle(dev);
+
+	pgraph->fifo_access(dev, true);
+
+	return 0;
+}
+
+static int
+nv17_graph_mthd_lma_enable(struct nouveau_channel *chan, int grclass,
+			   int mthd, uint32_t data)
+{
+	struct drm_device *dev = chan->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
+
+	nouveau_wait_for_idle(dev);
+
+	nv_wr32(dev, NV10_PGRAPH_DEBUG_4,
+		nv_rd32(dev, NV10_PGRAPH_DEBUG_4) | 0x1 << 8);
+	nv_wr32(dev, 0x004006b0,
+		nv_rd32(dev, 0x004006b0) | 0x8 << 24);
+
+	pgraph->fifo_access(dev, true);
+
+	return 0;
+}
+
+static struct nouveau_pgraph_object_method nv17_graph_celsius_mthds[] = {
+	{ 0x1638, nv17_graph_mthd_lma_window },
+	{ 0x163c, nv17_graph_mthd_lma_window },
+	{ 0x1640, nv17_graph_mthd_lma_window },
+	{ 0x1644, nv17_graph_mthd_lma_window },
+	{ 0x1658, nv17_graph_mthd_lma_enable },
+	{}
+};
+
+struct nouveau_pgraph_object_class nv10_graph_grclass[] = {
+	{ 0x0030, false, NULL }, /* null */
+	{ 0x0039, false, NULL }, /* m2mf */
+	{ 0x004a, false, NULL }, /* gdirect */
+	{ 0x005f, false, NULL }, /* imageblit */
+	{ 0x009f, false, NULL }, /* imageblit (nv12) */
+	{ 0x008a, false, NULL }, /* ifc */
+	{ 0x0089, false, NULL }, /* sifm */
+	{ 0x0062, false, NULL }, /* surf2d */
+	{ 0x0043, false, NULL }, /* rop */
+	{ 0x0012, false, NULL }, /* beta1 */
+	{ 0x0072, false, NULL }, /* beta4 */
+	{ 0x0019, false, NULL }, /* cliprect */
+	{ 0x0044, false, NULL }, /* pattern */
+	{ 0x0052, false, NULL }, /* swzsurf */
+	{ 0x0093, false, NULL }, /* surf3d */
+	{ 0x0094, false, NULL }, /* tex_tri */
+	{ 0x0095, false, NULL }, /* multitex_tri */
+	{ 0x0056, false, NULL }, /* celcius (nv10) */
+	{ 0x0096, false, NULL }, /* celcius (nv11) */
+	{ 0x0099, false, nv17_graph_celsius_mthds }, /* celcius (nv17) */
+	{}
+};
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_acpi.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_acpi.c
@@ -0,0 +1,125 @@
+#include <linux/pci.h>
+#include <linux/acpi.h>
+#include <acpi/acpi_drivers.h>
+#include <acpi/acpi_bus.h>
+
+#include "drmP.h"
+#include "drm.h"
+#include "drm_sarea.h"
+#include "drm_crtc_helper.h"
+#include "nouveau_drv.h"
+#include "nouveau_drm.h"
+#include "nv50_display.h"
+
+#define NOUVEAU_DSM_SUPPORTED 0x00
+#define NOUVEAU_DSM_SUPPORTED_FUNCTIONS 0x00
+
+#define NOUVEAU_DSM_ACTIVE 0x01
+#define NOUVEAU_DSM_ACTIVE_QUERY 0x00
+
+#define NOUVEAU_DSM_LED 0x02
+#define NOUVEAU_DSM_LED_STATE 0x00
+#define NOUVEAU_DSM_LED_OFF 0x10
+#define NOUVEAU_DSM_LED_STAMINA 0x11
+#define NOUVEAU_DSM_LED_SPEED 0x12
+
+#define NOUVEAU_DSM_POWER 0x03
+#define NOUVEAU_DSM_POWER_STATE 0x00
+#define NOUVEAU_DSM_POWER_SPEED 0x01
+#define NOUVEAU_DSM_POWER_STAMINA 0x02
+
+static int nouveau_dsm(struct drm_device *dev, int func, int arg, int *result)
+{
+	static char muid[] = {
+		0xA0, 0xA0, 0x95, 0x9D, 0x60, 0x00, 0x48, 0x4D,
+		0xB3, 0x4D, 0x7E, 0x5F, 0xEA, 0x12, 0x9F, 0xD4,
+	};
+
+	struct pci_dev *pdev = dev->pdev;
+	struct acpi_handle *handle;
+	struct acpi_buffer output = { ACPI_ALLOCATE_BUFFER, NULL };
+	struct acpi_object_list input;
+	union acpi_object params[4];
+	union acpi_object *obj;
+	int err;
+
+	handle = DEVICE_ACPI_HANDLE(&pdev->dev);
+
+	if (!handle)
+		return -ENODEV;
+
+	input.count = 4;
+	input.pointer = params;
+	params[0].type = ACPI_TYPE_BUFFER;
+	params[0].buffer.length = sizeof(muid);
+	params[0].buffer.pointer = (char *)muid;
+	params[1].type = ACPI_TYPE_INTEGER;
+	params[1].integer.value = 0x00000102;
+	params[2].type = ACPI_TYPE_INTEGER;
+	params[2].integer.value = func;
+	params[3].type = ACPI_TYPE_INTEGER;
+	params[3].integer.value = arg;
+
+	err = acpi_evaluate_object(handle, "_DSM", &input, &output);
+	if (err) {
+		NV_INFO(dev, "failed to evaluate _DSM: %d\n", err);
+		return err;
+	}
+
+	obj = (union acpi_object *)output.pointer;
+
+	if (obj->type == ACPI_TYPE_INTEGER)
+		if (obj->integer.value == 0x80000002)
+			return -ENODEV;
+
+	if (obj->type == ACPI_TYPE_BUFFER) {
+		if (obj->buffer.length == 4 && result) {
+			*result = 0;
+			*result |= obj->buffer.pointer[0];
+			*result |= (obj->buffer.pointer[1] << 8);
+			*result |= (obj->buffer.pointer[2] << 16);
+			*result |= (obj->buffer.pointer[3] << 24);
+		}
+	}
+
+	kfree(output.pointer);
+	return 0;
+}
+
+int nouveau_hybrid_setup(struct drm_device *dev)
+{
+	int result;
+
+	if (nouveau_dsm(dev, NOUVEAU_DSM_POWER, NOUVEAU_DSM_POWER_STATE,
+								&result))
+		return -ENODEV;
+
+	NV_INFO(dev, "_DSM hardware status gave 0x%x\n", result);
+
+	if (result) { /* Ensure that the external GPU is enabled */
+		nouveau_dsm(dev, NOUVEAU_DSM_LED, NOUVEAU_DSM_LED_SPEED, NULL);
+		nouveau_dsm(dev, NOUVEAU_DSM_POWER, NOUVEAU_DSM_POWER_SPEED,
+									NULL);
+	} else { /* Stamina mode - disable the external GPU */
+		nouveau_dsm(dev, NOUVEAU_DSM_LED, NOUVEAU_DSM_LED_STAMINA,
+									NULL);
+		nouveau_dsm(dev, NOUVEAU_DSM_POWER, NOUVEAU_DSM_POWER_STAMINA,
+									NULL);
+	}
+
+	return 0;
+}
+
+bool nouveau_dsm_probe(struct drm_device *dev)
+{
+	int support = 0;
+
+	if (nouveau_dsm(dev, NOUVEAU_DSM_SUPPORTED,
+				NOUVEAU_DSM_SUPPORTED_FUNCTIONS, &support))
+		return false;
+
+	if (!support)
+		return false;
+
+	return true;
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv50_display.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv50_display.h
@@ -0,0 +1,46 @@
+/*
+ * Copyright (C) 2008 Maarten Maathuis.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#ifndef __NV50_DISPLAY_H__
+#define __NV50_DISPLAY_H__
+
+#include "drmP.h"
+#include "drm.h"
+#include "nouveau_drv.h"
+#include "nouveau_dma.h"
+#include "nouveau_reg.h"
+#include "nouveau_crtc.h"
+#include "nv50_evo.h"
+
+void nv50_display_irq_handler(struct drm_device *dev);
+void nv50_display_irq_handler_bh(struct work_struct *work);
+int nv50_display_init(struct drm_device *dev);
+int nv50_display_create(struct drm_device *dev);
+int nv50_display_destroy(struct drm_device *dev);
+int nv50_crtc_blank(struct nouveau_crtc *, bool blank);
+int nv50_crtc_set_clock(struct drm_device *, int head, int pclk);
+
+#endif /* __NV50_DISPLAY_H__ */
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_sgdma.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_sgdma.c
@@ -0,0 +1,322 @@
+#include "drmP.h"
+#include "nouveau_drv.h"
+#include <linux/pagemap.h>
+
+#define NV_CTXDMA_PAGE_SHIFT 12
+#define NV_CTXDMA_PAGE_SIZE  (1 << NV_CTXDMA_PAGE_SHIFT)
+#define NV_CTXDMA_PAGE_MASK  (NV_CTXDMA_PAGE_SIZE - 1)
+
+struct nouveau_sgdma_be {
+	struct ttm_backend backend;
+	struct drm_device *dev;
+
+	dma_addr_t *pages;
+	unsigned nr_pages;
+
+	unsigned pte_start;
+	bool bound;
+};
+
+static int
+nouveau_sgdma_populate(struct ttm_backend *be, unsigned long num_pages,
+		       struct page **pages, struct page *dummy_read_page)
+{
+	struct nouveau_sgdma_be *nvbe = (struct nouveau_sgdma_be *)be;
+	struct drm_device *dev = nvbe->dev;
+
+	NV_DEBUG(nvbe->dev, "num_pages = %ld\n", num_pages);
+
+	if (nvbe->pages)
+		return -EINVAL;
+
+	nvbe->pages = kmalloc(sizeof(dma_addr_t) * num_pages, GFP_KERNEL);
+	if (!nvbe->pages)
+		return -ENOMEM;
+
+	nvbe->nr_pages = 0;
+	while (num_pages--) {
+		nvbe->pages[nvbe->nr_pages] =
+			pci_map_page(dev->pdev, pages[nvbe->nr_pages], 0,
+				     PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
+		if (pci_dma_mapping_error(dev->pdev,
+					  nvbe->pages[nvbe->nr_pages])) {
+			be->func->clear(be);
+			return -EFAULT;
+		}
+
+		nvbe->nr_pages++;
+	}
+
+	return 0;
+}
+
+static void
+nouveau_sgdma_clear(struct ttm_backend *be)
+{
+	struct nouveau_sgdma_be *nvbe = (struct nouveau_sgdma_be *)be;
+	struct drm_device *dev;
+
+	if (nvbe && nvbe->pages) {
+		dev = nvbe->dev;
+		NV_DEBUG(dev, "\n");
+
+		if (nvbe->bound)
+			be->func->unbind(be);
+
+		while (nvbe->nr_pages--) {
+			pci_unmap_page(dev->pdev, nvbe->pages[nvbe->nr_pages],
+				       PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
+		}
+		kfree(nvbe->pages);
+		nvbe->pages = NULL;
+		nvbe->nr_pages = 0;
+	}
+}
+
+static inline unsigned
+nouveau_sgdma_pte(struct drm_device *dev, uint64_t offset)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	unsigned pte = (offset >> NV_CTXDMA_PAGE_SHIFT);
+
+	if (dev_priv->card_type < NV_50)
+		return pte + 2;
+
+	return pte << 1;
+}
+
+static int
+nouveau_sgdma_bind(struct ttm_backend *be, struct ttm_mem_reg *mem)
+{
+	struct nouveau_sgdma_be *nvbe = (struct nouveau_sgdma_be *)be;
+	struct drm_device *dev = nvbe->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_gpuobj *gpuobj = dev_priv->gart_info.sg_ctxdma;
+	unsigned i, j, pte;
+
+	NV_DEBUG(dev, "pg=0x%lx\n", mem->mm_node->start);
+
+	dev_priv->engine.instmem.prepare_access(nvbe->dev, true);
+	pte = nouveau_sgdma_pte(nvbe->dev, mem->mm_node->start << PAGE_SHIFT);
+	nvbe->pte_start = pte;
+	for (i = 0; i < nvbe->nr_pages; i++) {
+		dma_addr_t dma_offset = nvbe->pages[i];
+		uint32_t offset_l = lower_32_bits(dma_offset);
+		uint32_t offset_h = upper_32_bits(dma_offset);
+
+		for (j = 0; j < PAGE_SIZE / NV_CTXDMA_PAGE_SIZE; j++) {
+			if (dev_priv->card_type < NV_50)
+				nv_wo32(dev, gpuobj, pte++, offset_l | 3);
+			else {
+				nv_wo32(dev, gpuobj, pte++, offset_l | 0x21);
+				nv_wo32(dev, gpuobj, pte++, offset_h & 0xff);
+			}
+
+			dma_offset += NV_CTXDMA_PAGE_SIZE;
+		}
+	}
+	dev_priv->engine.instmem.finish_access(nvbe->dev);
+
+	if (dev_priv->card_type == NV_50) {
+		nv_wr32(dev, 0x100c80, 0x00050001);
+		if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) {
+			NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n");
+			NV_ERROR(dev, "0x100c80 = 0x%08x\n",
+						nv_rd32(dev, 0x100c80));
+			return -EBUSY;
+		}
+
+		nv_wr32(dev, 0x100c80, 0x00000001);
+		if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) {
+			NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n");
+			NV_ERROR(dev, "0x100c80 = 0x%08x\n",
+						nv_rd32(dev, 0x100c80));
+			return -EBUSY;
+		}
+	}
+
+	nvbe->bound = true;
+	return 0;
+}
+
+static int
+nouveau_sgdma_unbind(struct ttm_backend *be)
+{
+	struct nouveau_sgdma_be *nvbe = (struct nouveau_sgdma_be *)be;
+	struct drm_device *dev = nvbe->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_gpuobj *gpuobj = dev_priv->gart_info.sg_ctxdma;
+	unsigned i, j, pte;
+
+	NV_DEBUG(dev, "\n");
+
+	if (!nvbe->bound)
+		return 0;
+
+	dev_priv->engine.instmem.prepare_access(nvbe->dev, true);
+	pte = nvbe->pte_start;
+	for (i = 0; i < nvbe->nr_pages; i++) {
+		dma_addr_t dma_offset = dev_priv->gart_info.sg_dummy_bus;
+
+		for (j = 0; j < PAGE_SIZE / NV_CTXDMA_PAGE_SIZE; j++) {
+			if (dev_priv->card_type < NV_50)
+				nv_wo32(dev, gpuobj, pte++, dma_offset | 3);
+			else {
+				nv_wo32(dev, gpuobj, pte++, dma_offset | 0x21);
+				nv_wo32(dev, gpuobj, pte++, 0x00000000);
+			}
+
+			dma_offset += NV_CTXDMA_PAGE_SIZE;
+		}
+	}
+	dev_priv->engine.instmem.finish_access(nvbe->dev);
+
+	nvbe->bound = false;
+	return 0;
+}
+
+static void
+nouveau_sgdma_destroy(struct ttm_backend *be)
+{
+	struct nouveau_sgdma_be *nvbe = (struct nouveau_sgdma_be *)be;
+
+	if (be) {
+		NV_DEBUG(nvbe->dev, "\n");
+
+		if (nvbe) {
+			if (nvbe->pages)
+				be->func->clear(be);
+			kfree(nvbe);
+		}
+	}
+}
+
+static struct ttm_backend_func nouveau_sgdma_backend = {
+	.populate		= nouveau_sgdma_populate,
+	.clear			= nouveau_sgdma_clear,
+	.bind			= nouveau_sgdma_bind,
+	.unbind			= nouveau_sgdma_unbind,
+	.destroy		= nouveau_sgdma_destroy
+};
+
+struct ttm_backend *
+nouveau_sgdma_init_ttm(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_sgdma_be *nvbe;
+
+	if (!dev_priv->gart_info.sg_ctxdma)
+		return NULL;
+
+	nvbe = kzalloc(sizeof(*nvbe), GFP_KERNEL);
+	if (!nvbe)
+		return NULL;
+
+	nvbe->dev = dev;
+
+	nvbe->backend.func	= &nouveau_sgdma_backend;
+
+	return &nvbe->backend;
+}
+
+int
+nouveau_sgdma_init(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_gpuobj *gpuobj = NULL;
+	uint32_t aper_size, obj_size;
+	int i, ret;
+
+	if (dev_priv->card_type < NV_50) {
+		aper_size = (64 * 1024 * 1024);
+		obj_size  = (aper_size >> NV_CTXDMA_PAGE_SHIFT) * 4;
+		obj_size += 8; /* ctxdma header */
+	} else {
+		/* 1 entire VM page table */
+		aper_size = (512 * 1024 * 1024);
+		obj_size  = (aper_size >> NV_CTXDMA_PAGE_SHIFT) * 8;
+	}
+
+	ret = nouveau_gpuobj_new(dev, NULL, obj_size, 16,
+				      NVOBJ_FLAG_ALLOW_NO_REFS |
+				      NVOBJ_FLAG_ZERO_ALLOC |
+				      NVOBJ_FLAG_ZERO_FREE, &gpuobj);
+	if (ret) {
+		NV_ERROR(dev, "Error creating sgdma object: %d\n", ret);
+		return ret;
+	}
+
+	dev_priv->gart_info.sg_dummy_page =
+		alloc_page(GFP_KERNEL|__GFP_DMA32);
+	set_bit(PG_locked, &dev_priv->gart_info.sg_dummy_page->flags);
+	dev_priv->gart_info.sg_dummy_bus =
+		pci_map_page(dev->pdev, dev_priv->gart_info.sg_dummy_page, 0,
+			     PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
+
+	dev_priv->engine.instmem.prepare_access(dev, true);
+	if (dev_priv->card_type < NV_50) {
+		/* Maybe use NV_DMA_TARGET_AGP for PCIE? NVIDIA do this, and
+		 * confirmed to work on c51.  Perhaps means NV_DMA_TARGET_PCIE
+		 * on those cards? */
+		nv_wo32(dev, gpuobj, 0, NV_CLASS_DMA_IN_MEMORY |
+				       (1 << 12) /* PT present */ |
+				       (0 << 13) /* PT *not* linear */ |
+				       (NV_DMA_ACCESS_RW  << 14) |
+				       (NV_DMA_TARGET_PCI << 16));
+		nv_wo32(dev, gpuobj, 1, aper_size - 1);
+		for (i = 2; i < 2 + (aper_size >> 12); i++) {
+			nv_wo32(dev, gpuobj, i,
+				    dev_priv->gart_info.sg_dummy_bus | 3);
+		}
+	} else {
+		for (i = 0; i < obj_size; i += 8) {
+			nv_wo32(dev, gpuobj, (i+0)/4,
+				    dev_priv->gart_info.sg_dummy_bus | 0x21);
+			nv_wo32(dev, gpuobj, (i+4)/4, 0);
+		}
+	}
+	dev_priv->engine.instmem.finish_access(dev);
+
+	dev_priv->gart_info.type      = NOUVEAU_GART_SGDMA;
+	dev_priv->gart_info.aper_base = 0;
+	dev_priv->gart_info.aper_size = aper_size;
+	dev_priv->gart_info.sg_ctxdma = gpuobj;
+	return 0;
+}
+
+void
+nouveau_sgdma_takedown(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+	if (dev_priv->gart_info.sg_dummy_page) {
+		pci_unmap_page(dev->pdev, dev_priv->gart_info.sg_dummy_bus,
+			       NV_CTXDMA_PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
+		unlock_page(dev_priv->gart_info.sg_dummy_page);
+		__free_page(dev_priv->gart_info.sg_dummy_page);
+		dev_priv->gart_info.sg_dummy_page = NULL;
+		dev_priv->gart_info.sg_dummy_bus = 0;
+	}
+
+	nouveau_gpuobj_del(dev, &dev_priv->gart_info.sg_ctxdma);
+}
+
+int
+nouveau_sgdma_get_page(struct drm_device *dev, uint32_t offset, uint32_t *page)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_gpuobj *gpuobj = dev_priv->gart_info.sg_ctxdma;
+	struct nouveau_instmem_engine *instmem = &dev_priv->engine.instmem;
+	int pte;
+
+	pte = (offset >> NV_CTXDMA_PAGE_SHIFT);
+	if (dev_priv->card_type < NV_50) {
+		instmem->prepare_access(dev, false);
+		*page = nv_ro32(dev, gpuobj, (pte + 2)) & ~NV_CTXDMA_PAGE_MASK;
+		instmem->finish_access(dev);
+		return 0;
+	}
+
+	NV_ERROR(dev, "Unimplemented on NV50\n");
+	return -EINVAL;
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv04_tv.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv04_tv.c
@@ -0,0 +1,305 @@
+/*
+ * Copyright (C) 2009 Francisco Jerez.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include "drmP.h"
+#include "nouveau_drv.h"
+#include "nouveau_encoder.h"
+#include "nouveau_connector.h"
+#include "nouveau_crtc.h"
+#include "nouveau_hw.h"
+#include "drm_crtc_helper.h"
+
+#include "i2c/ch7006.h"
+
+static struct {
+	struct i2c_board_info board_info;
+	struct drm_encoder_funcs funcs;
+	struct drm_encoder_helper_funcs hfuncs;
+	void *params;
+
+} nv04_tv_encoder_info[] = {
+	{
+		.board_info = { I2C_BOARD_INFO("ch7006", 0x75) },
+		.params = &(struct ch7006_encoder_params) {
+			CH7006_FORMAT_RGB24m12I, CH7006_CLOCK_MASTER,
+			0, 0, 0,
+			CH7006_SYNC_SLAVE, CH7006_SYNC_SEPARATED,
+			CH7006_POUT_3_3V, CH7006_ACTIVE_HSYNC
+		},
+	},
+};
+
+static bool probe_i2c_addr(struct i2c_adapter *adapter, int addr)
+{
+	struct i2c_msg msg = {
+		.addr = addr,
+		.len = 0,
+	};
+
+	return i2c_transfer(adapter, &msg, 1) == 1;
+}
+
+int nv04_tv_identify(struct drm_device *dev, int i2c_index)
+{
+	struct nouveau_i2c_chan *i2c;
+	bool was_locked;
+	int i, ret;
+
+	NV_TRACE(dev, "Probing TV encoders on I2C bus: %d\n", i2c_index);
+
+	i2c = nouveau_i2c_find(dev, i2c_index);
+	if (!i2c)
+		return -ENODEV;
+
+	was_locked = NVLockVgaCrtcs(dev, false);
+
+	for (i = 0; i < ARRAY_SIZE(nv04_tv_encoder_info); i++) {
+		if (probe_i2c_addr(&i2c->adapter,
+				   nv04_tv_encoder_info[i].board_info.addr)) {
+			ret = i;
+			break;
+		}
+	}
+
+	if (i < ARRAY_SIZE(nv04_tv_encoder_info)) {
+		NV_TRACE(dev, "Detected TV encoder: %s\n",
+			 nv04_tv_encoder_info[i].board_info.type);
+
+	} else {
+		NV_TRACE(dev, "No TV encoders found.\n");
+		i = -ENODEV;
+	}
+
+	NVLockVgaCrtcs(dev, was_locked);
+	return i;
+}
+
+#define PLLSEL_TV_CRTC1_MASK				\
+	(NV_PRAMDAC_PLL_COEFF_SELECT_TV_VSCLK1		\
+	 | NV_PRAMDAC_PLL_COEFF_SELECT_TV_PCLK1)
+#define PLLSEL_TV_CRTC2_MASK				\
+	(NV_PRAMDAC_PLL_COEFF_SELECT_TV_VSCLK2		\
+	 | NV_PRAMDAC_PLL_COEFF_SELECT_TV_PCLK2)
+
+static void nv04_tv_dpms(struct drm_encoder *encoder, int mode)
+{
+	struct drm_device *dev = encoder->dev;
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nv04_mode_state *state = &dev_priv->mode_reg;
+	uint8_t crtc1A;
+
+	NV_INFO(dev, "Setting dpms mode %d on TV encoder (output %d)\n",
+		mode, nv_encoder->dcb->index);
+
+	state->pllsel &= ~(PLLSEL_TV_CRTC1_MASK | PLLSEL_TV_CRTC2_MASK);
+
+	if (mode == DRM_MODE_DPMS_ON) {
+		int head = nouveau_crtc(encoder->crtc)->index;
+		crtc1A = NVReadVgaCrtc(dev, head, NV_CIO_CRE_RPC1_INDEX);
+
+		state->pllsel |= head ? PLLSEL_TV_CRTC2_MASK :
+					PLLSEL_TV_CRTC1_MASK;
+
+		/* Inhibit hsync */
+		crtc1A |= 0x80;
+
+		NVWriteVgaCrtc(dev, head, NV_CIO_CRE_RPC1_INDEX, crtc1A);
+	}
+
+	NVWriteRAMDAC(dev, 0, NV_PRAMDAC_PLL_COEFF_SELECT, state->pllsel);
+
+	to_encoder_slave(encoder)->slave_funcs->dpms(encoder, mode);
+}
+
+static void nv04_tv_bind(struct drm_device *dev, int head, bool bind)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nv04_crtc_reg *state = &dev_priv->mode_reg.crtc_reg[head];
+
+	state->tv_setup = 0;
+
+	if (bind) {
+		state->CRTC[NV_CIO_CRE_LCD__INDEX] = 0;
+		state->CRTC[NV_CIO_CRE_49] |= 0x10;
+	} else {
+		state->CRTC[NV_CIO_CRE_49] &= ~0x10;
+	}
+
+	NVWriteVgaCrtc(dev, head, NV_CIO_CRE_LCD__INDEX,
+		       state->CRTC[NV_CIO_CRE_LCD__INDEX]);
+	NVWriteVgaCrtc(dev, head, NV_CIO_CRE_49,
+		       state->CRTC[NV_CIO_CRE_49]);
+	NVWriteRAMDAC(dev, head, NV_PRAMDAC_TV_SETUP,
+		      state->tv_setup);
+}
+
+static void nv04_tv_prepare(struct drm_encoder *encoder)
+{
+	struct drm_device *dev = encoder->dev;
+	int head = nouveau_crtc(encoder->crtc)->index;
+	struct drm_encoder_helper_funcs *helper = encoder->helper_private;
+
+	helper->dpms(encoder, DRM_MODE_DPMS_OFF);
+
+	nv04_dfp_disable(dev, head);
+
+	if (nv_two_heads(dev))
+		nv04_tv_bind(dev, head ^ 1, false);
+
+	nv04_tv_bind(dev, head, true);
+}
+
+static void nv04_tv_mode_set(struct drm_encoder *encoder,
+			     struct drm_display_mode *mode,
+			     struct drm_display_mode *adjusted_mode)
+{
+	struct drm_device *dev = encoder->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
+	struct nv04_crtc_reg *regp = &dev_priv->mode_reg.crtc_reg[nv_crtc->index];
+
+	regp->tv_htotal = adjusted_mode->htotal;
+	regp->tv_vtotal = adjusted_mode->vtotal;
+
+	/* These delay the TV signals with respect to the VGA port,
+	 * they might be useful if we ever allow a CRTC to drive
+	 * multiple outputs.
+	 */
+	regp->tv_hskew = 1;
+	regp->tv_hsync_delay = 1;
+	regp->tv_hsync_delay2 = 64;
+	regp->tv_vskew = 1;
+	regp->tv_vsync_delay = 1;
+
+	to_encoder_slave(encoder)->slave_funcs->mode_set(encoder, mode, adjusted_mode);
+}
+
+static void nv04_tv_commit(struct drm_encoder *encoder)
+{
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+	struct drm_device *dev = encoder->dev;
+	struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
+	struct drm_encoder_helper_funcs *helper = encoder->helper_private;
+
+	helper->dpms(encoder, DRM_MODE_DPMS_ON);
+
+	NV_INFO(dev, "Output %s is running on CRTC %d using output %c\n",
+		      drm_get_connector_name(&nouveau_encoder_connector_get(nv_encoder)->base), nv_crtc->index,
+		      '@' + ffs(nv_encoder->dcb->or));
+}
+
+static void nv04_tv_destroy(struct drm_encoder *encoder)
+{
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+
+	to_encoder_slave(encoder)->slave_funcs->destroy(encoder);
+
+	drm_encoder_cleanup(encoder);
+
+	kfree(nv_encoder);
+}
+
+int nv04_tv_create(struct drm_device *dev, struct dcb_entry *entry)
+{
+	struct nouveau_encoder *nv_encoder;
+	struct drm_encoder *encoder;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct i2c_adapter *adap;
+	struct drm_encoder_funcs *funcs = NULL;
+	struct drm_encoder_helper_funcs *hfuncs = NULL;
+	struct drm_encoder_slave_funcs *sfuncs = NULL;
+	int i2c_index = entry->i2c_index;
+	int type, ret;
+	bool was_locked;
+
+	/* Ensure that we can talk to this encoder */
+	type = nv04_tv_identify(dev, i2c_index);
+	if (type < 0)
+		return type;
+
+	/* Allocate the necessary memory */
+	nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
+	if (!nv_encoder)
+		return -ENOMEM;
+
+	/* Initialize the common members */
+	encoder = to_drm_encoder(nv_encoder);
+
+	funcs = &nv04_tv_encoder_info[type].funcs;
+	hfuncs = &nv04_tv_encoder_info[type].hfuncs;
+
+	drm_encoder_init(dev, encoder, funcs, DRM_MODE_ENCODER_TVDAC);
+	drm_encoder_helper_add(encoder, hfuncs);
+
+	encoder->possible_crtcs = entry->heads;
+	encoder->possible_clones = 0;
+
+	nv_encoder->dcb = entry;
+	nv_encoder->or = ffs(entry->or) - 1;
+
+	/* Run the slave-specific initialization */
+	adap = &dev_priv->vbios->dcb->i2c[i2c_index].chan->adapter;
+
+	was_locked = NVLockVgaCrtcs(dev, false);
+
+	ret = drm_i2c_encoder_init(encoder->dev, to_encoder_slave(encoder), adap,
+				   &nv04_tv_encoder_info[type].board_info);
+
+	NVLockVgaCrtcs(dev, was_locked);
+
+	if (ret < 0)
+		goto fail;
+
+	/* Fill the function pointers */
+	sfuncs = to_encoder_slave(encoder)->slave_funcs;
+
+	*funcs = (struct drm_encoder_funcs) {
+		.destroy = nv04_tv_destroy,
+	};
+
+	*hfuncs = (struct drm_encoder_helper_funcs) {
+		.dpms = nv04_tv_dpms,
+		.save = sfuncs->save,
+		.restore = sfuncs->restore,
+		.mode_fixup = sfuncs->mode_fixup,
+		.prepare = nv04_tv_prepare,
+		.commit = nv04_tv_commit,
+		.mode_set = nv04_tv_mode_set,
+		.detect = sfuncs->detect,
+	};
+
+	/* Set the slave encoder configuration */
+	sfuncs->set_config(encoder, nv04_tv_encoder_info[type].params);
+
+	return 0;
+
+fail:
+	drm_encoder_cleanup(encoder);
+
+	kfree(nv_encoder);
+	return ret;
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_object.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_object.c
@@ -0,0 +1,1295 @@
+/*
+ * Copyright (C) 2006 Ben Skeggs.
+ *
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+/*
+ * Authors:
+ *   Ben Skeggs <darktama@iinet.net.au>
+ */
+
+#include "drmP.h"
+#include "drm.h"
+#include "nouveau_drv.h"
+#include "nouveau_drm.h"
+
+/* NVidia uses context objects to drive drawing operations.
+
+   Context objects can be selected into 8 subchannels in the FIFO,
+   and then used via DMA command buffers.
+
+   A context object is referenced by a user defined handle (CARD32). The HW
+   looks up graphics objects in a hash table in the instance RAM.
+
+   An entry in the hash table consists of 2 CARD32. The first CARD32 contains
+   the handle, the second one a bitfield, that contains the address of the
+   object in instance RAM.
+
+   The format of the second CARD32 seems to be:
+
+   NV4 to NV30:
+
+   15: 0  instance_addr >> 4
+   17:16  engine (here uses 1 = graphics)
+   28:24  channel id (here uses 0)
+   31	  valid (use 1)
+
+   NV40:
+
+   15: 0  instance_addr >> 4   (maybe 19-0)
+   21:20  engine (here uses 1 = graphics)
+   I'm unsure about the other bits, but using 0 seems to work.
+
+   The key into the hash table depends on the object handle and channel id and
+   is given as:
+*/
+static uint32_t
+nouveau_ramht_hash_handle(struct drm_device *dev, int channel, uint32_t handle)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	uint32_t hash = 0;
+	int i;
+
+	NV_DEBUG(dev, "ch%d handle=0x%08x\n", channel, handle);
+
+	for (i = 32; i > 0; i -= dev_priv->ramht_bits) {
+		hash ^= (handle & ((1 << dev_priv->ramht_bits) - 1));
+		handle >>= dev_priv->ramht_bits;
+	}
+
+	if (dev_priv->card_type < NV_50)
+		hash ^= channel << (dev_priv->ramht_bits - 4);
+	hash <<= 3;
+
+	NV_DEBUG(dev, "hash=0x%08x\n", hash);
+	return hash;
+}
+
+static int
+nouveau_ramht_entry_valid(struct drm_device *dev, struct nouveau_gpuobj *ramht,
+			  uint32_t offset)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	uint32_t ctx = nv_ro32(dev, ramht, (offset + 4)/4);
+
+	if (dev_priv->card_type < NV_40)
+		return ((ctx & NV_RAMHT_CONTEXT_VALID) != 0);
+	return (ctx != 0);
+}
+
+static int
+nouveau_ramht_insert(struct drm_device *dev, struct nouveau_gpuobj_ref *ref)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_instmem_engine *instmem = &dev_priv->engine.instmem;
+	struct nouveau_channel *chan = ref->channel;
+	struct nouveau_gpuobj *ramht = chan->ramht ? chan->ramht->gpuobj : NULL;
+	uint32_t ctx, co, ho;
+
+	if (!ramht) {
+		NV_ERROR(dev, "No hash table!\n");
+		return -EINVAL;
+	}
+
+	if (dev_priv->card_type < NV_40) {
+		ctx = NV_RAMHT_CONTEXT_VALID | (ref->instance >> 4) |
+		      (chan->id << NV_RAMHT_CONTEXT_CHANNEL_SHIFT) |
+		      (ref->gpuobj->engine << NV_RAMHT_CONTEXT_ENGINE_SHIFT);
+	} else
+	if (dev_priv->card_type < NV_50) {
+		ctx = (ref->instance >> 4) |
+		      (chan->id << NV40_RAMHT_CONTEXT_CHANNEL_SHIFT) |
+		      (ref->gpuobj->engine << NV40_RAMHT_CONTEXT_ENGINE_SHIFT);
+	} else {
+		if (ref->gpuobj->engine == NVOBJ_ENGINE_DISPLAY) {
+			ctx = (ref->instance << 10) | 2;
+		} else {
+			ctx = (ref->instance >> 4) |
+			      ((ref->gpuobj->engine <<
+				NV40_RAMHT_CONTEXT_ENGINE_SHIFT));
+		}
+	}
+
+	instmem->prepare_access(dev, true);
+	co = ho = nouveau_ramht_hash_handle(dev, chan->id, ref->handle);
+	do {
+		if (!nouveau_ramht_entry_valid(dev, ramht, co)) {
+			NV_DEBUG(dev,
+				 "insert ch%d 0x%08x: h=0x%08x, c=0x%08x\n",
+				 chan->id, co, ref->handle, ctx);
+			nv_wo32(dev, ramht, (co + 0)/4, ref->handle);
+			nv_wo32(dev, ramht, (co + 4)/4, ctx);
+
+			list_add_tail(&ref->list, &chan->ramht_refs);
+			instmem->finish_access(dev);
+			return 0;
+		}
+		NV_DEBUG(dev, "collision ch%d 0x%08x: h=0x%08x\n",
+			 chan->id, co, nv_ro32(dev, ramht, co/4));
+
+		co += 8;
+		if (co >= dev_priv->ramht_size)
+			co = 0;
+	} while (co != ho);
+	instmem->finish_access(dev);
+
+	NV_ERROR(dev, "RAMHT space exhausted. ch=%d\n", chan->id);
+	return -ENOMEM;
+}
+
+static void
+nouveau_ramht_remove(struct drm_device *dev, struct nouveau_gpuobj_ref *ref)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_instmem_engine *instmem = &dev_priv->engine.instmem;
+	struct nouveau_channel *chan = ref->channel;
+	struct nouveau_gpuobj *ramht = chan->ramht ? chan->ramht->gpuobj : NULL;
+	uint32_t co, ho;
+
+	if (!ramht) {
+		NV_ERROR(dev, "No hash table!\n");
+		return;
+	}
+
+	instmem->prepare_access(dev, true);
+	co = ho = nouveau_ramht_hash_handle(dev, chan->id, ref->handle);
+	do {
+		if (nouveau_ramht_entry_valid(dev, ramht, co) &&
+		    (ref->handle == nv_ro32(dev, ramht, (co/4)))) {
+			NV_DEBUG(dev,
+				 "remove ch%d 0x%08x: h=0x%08x, c=0x%08x\n",
+				 chan->id, co, ref->handle,
+				 nv_ro32(dev, ramht, (co + 4)));
+			nv_wo32(dev, ramht, (co + 0)/4, 0x00000000);
+			nv_wo32(dev, ramht, (co + 4)/4, 0x00000000);
+
+			list_del(&ref->list);
+			instmem->finish_access(dev);
+			return;
+		}
+
+		co += 8;
+		if (co >= dev_priv->ramht_size)
+			co = 0;
+	} while (co != ho);
+	list_del(&ref->list);
+	instmem->finish_access(dev);
+
+	NV_ERROR(dev, "RAMHT entry not found. ch=%d, handle=0x%08x\n",
+		 chan->id, ref->handle);
+}
+
+int
+nouveau_gpuobj_new(struct drm_device *dev, struct nouveau_channel *chan,
+		   uint32_t size, int align, uint32_t flags,
+		   struct nouveau_gpuobj **gpuobj_ret)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_engine *engine = &dev_priv->engine;
+	struct nouveau_gpuobj *gpuobj;
+	struct mem_block *pramin = NULL;
+	int ret;
+
+	NV_DEBUG(dev, "ch%d size=%u align=%d flags=0x%08x\n",
+		 chan ? chan->id : -1, size, align, flags);
+
+	if (!dev_priv || !gpuobj_ret || *gpuobj_ret != NULL)
+		return -EINVAL;
+
+	gpuobj = kzalloc(sizeof(*gpuobj), GFP_KERNEL);
+	if (!gpuobj)
+		return -ENOMEM;
+	NV_DEBUG(dev, "gpuobj %p\n", gpuobj);
+	gpuobj->flags = flags;
+	gpuobj->im_channel = chan;
+
+	list_add_tail(&gpuobj->list, &dev_priv->gpuobj_list);
+
+	/* Choose between global instmem heap, and per-channel private
+	 * instmem heap.  On <NV50 allow requests for private instmem
+	 * to be satisfied from global heap if no per-channel area
+	 * available.
+	 */
+	if (chan) {
+		if (chan->ramin_heap) {
+			NV_DEBUG(dev, "private heap\n");
+			pramin = chan->ramin_heap;
+		} else
+		if (dev_priv->card_type < NV_50) {
+			NV_DEBUG(dev, "global heap fallback\n");
+			pramin = dev_priv->ramin_heap;
+		}
+	} else {
+		NV_DEBUG(dev, "global heap\n");
+		pramin = dev_priv->ramin_heap;
+	}
+
+	if (!pramin) {
+		NV_ERROR(dev, "No PRAMIN heap!\n");
+		return -EINVAL;
+	}
+
+	if (!chan) {
+		ret = engine->instmem.populate(dev, gpuobj, &size);
+		if (ret) {
+			nouveau_gpuobj_del(dev, &gpuobj);
+			return ret;
+		}
+	}
+
+	/* Allocate a chunk of the PRAMIN aperture */
+	gpuobj->im_pramin = nouveau_mem_alloc_block(pramin, size,
+						    drm_order(align),
+						    (struct drm_file *)-2, 0);
+	if (!gpuobj->im_pramin) {
+		nouveau_gpuobj_del(dev, &gpuobj);
+		return -ENOMEM;
+	}
+
+	if (!chan) {
+		ret = engine->instmem.bind(dev, gpuobj);
+		if (ret) {
+			nouveau_gpuobj_del(dev, &gpuobj);
+			return ret;
+		}
+	}
+
+	if (gpuobj->flags & NVOBJ_FLAG_ZERO_ALLOC) {
+		int i;
+
+		engine->instmem.prepare_access(dev, true);
+		for (i = 0; i < gpuobj->im_pramin->size; i += 4)
+			nv_wo32(dev, gpuobj, i/4, 0);
+		engine->instmem.finish_access(dev);
+	}
+
+	*gpuobj_ret = gpuobj;
+	return 0;
+}
+
+int
+nouveau_gpuobj_early_init(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+	NV_DEBUG(dev, "\n");
+
+	INIT_LIST_HEAD(&dev_priv->gpuobj_list);
+
+	return 0;
+}
+
+int
+nouveau_gpuobj_init(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	int ret;
+
+	NV_DEBUG(dev, "\n");
+
+	if (dev_priv->card_type < NV_50) {
+		ret = nouveau_gpuobj_new_fake(dev,
+			dev_priv->ramht_offset, ~0, dev_priv->ramht_size,
+			NVOBJ_FLAG_ZERO_ALLOC | NVOBJ_FLAG_ALLOW_NO_REFS,
+						&dev_priv->ramht, NULL);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+void
+nouveau_gpuobj_takedown(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+	NV_DEBUG(dev, "\n");
+
+	nouveau_gpuobj_del(dev, &dev_priv->ramht);
+}
+
+void
+nouveau_gpuobj_late_takedown(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_gpuobj *gpuobj = NULL;
+	struct list_head *entry, *tmp;
+
+	NV_DEBUG(dev, "\n");
+
+	list_for_each_safe(entry, tmp, &dev_priv->gpuobj_list) {
+		gpuobj = list_entry(entry, struct nouveau_gpuobj, list);
+
+		NV_ERROR(dev, "gpuobj %p still exists at takedown, refs=%d\n",
+			 gpuobj, gpuobj->refcount);
+		gpuobj->refcount = 0;
+		nouveau_gpuobj_del(dev, &gpuobj);
+	}
+}
+
+int
+nouveau_gpuobj_del(struct drm_device *dev, struct nouveau_gpuobj **pgpuobj)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_engine *engine = &dev_priv->engine;
+	struct nouveau_gpuobj *gpuobj;
+	int i;
+
+	NV_DEBUG(dev, "gpuobj %p\n", pgpuobj ? *pgpuobj : NULL);
+
+	if (!dev_priv || !pgpuobj || !(*pgpuobj))
+		return -EINVAL;
+	gpuobj = *pgpuobj;
+
+	if (gpuobj->refcount != 0) {
+		NV_ERROR(dev, "gpuobj refcount is %d\n", gpuobj->refcount);
+		return -EINVAL;
+	}
+
+	if (gpuobj->im_pramin && (gpuobj->flags & NVOBJ_FLAG_ZERO_FREE)) {
+		engine->instmem.prepare_access(dev, true);
+		for (i = 0; i < gpuobj->im_pramin->size; i += 4)
+			nv_wo32(dev, gpuobj, i/4, 0);
+		engine->instmem.finish_access(dev);
+	}
+
+	if (gpuobj->dtor)
+		gpuobj->dtor(dev, gpuobj);
+
+	if (gpuobj->im_backing && !(gpuobj->flags & NVOBJ_FLAG_FAKE))
+		engine->instmem.clear(dev, gpuobj);
+
+	if (gpuobj->im_pramin) {
+		if (gpuobj->flags & NVOBJ_FLAG_FAKE)
+			kfree(gpuobj->im_pramin);
+		else
+			nouveau_mem_free_block(gpuobj->im_pramin);
+	}
+
+	list_del(&gpuobj->list);
+
+	*pgpuobj = NULL;
+	kfree(gpuobj);
+	return 0;
+}
+
+static int
+nouveau_gpuobj_instance_get(struct drm_device *dev,
+			    struct nouveau_channel *chan,
+			    struct nouveau_gpuobj *gpuobj, uint32_t *inst)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_gpuobj *cpramin;
+
+	/* <NV50 use PRAMIN address everywhere */
+	if (dev_priv->card_type < NV_50) {
+		*inst = gpuobj->im_pramin->start;
+		return 0;
+	}
+
+	if (chan && gpuobj->im_channel != chan) {
+		NV_ERROR(dev, "Channel mismatch: obj %d, ref %d\n",
+			 gpuobj->im_channel->id, chan->id);
+		return -EINVAL;
+	}
+
+	/* NV50 channel-local instance */
+	if (chan) {
+		cpramin = chan->ramin->gpuobj;
+		*inst = gpuobj->im_pramin->start - cpramin->im_pramin->start;
+		return 0;
+	}
+
+	/* NV50 global (VRAM) instance */
+	if (!gpuobj->im_channel) {
+		/* ...from global heap */
+		if (!gpuobj->im_backing) {
+			NV_ERROR(dev, "AII, no VRAM backing gpuobj\n");
+			return -EINVAL;
+		}
+		*inst = gpuobj->im_backing_start;
+		return 0;
+	} else {
+		/* ...from local heap */
+		cpramin = gpuobj->im_channel->ramin->gpuobj;
+		*inst = cpramin->im_backing_start +
+			(gpuobj->im_pramin->start - cpramin->im_pramin->start);
+		return 0;
+	}
+
+	return -EINVAL;
+}
+
+int
+nouveau_gpuobj_ref_add(struct drm_device *dev, struct nouveau_channel *chan,
+		       uint32_t handle, struct nouveau_gpuobj *gpuobj,
+		       struct nouveau_gpuobj_ref **ref_ret)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_gpuobj_ref *ref;
+	uint32_t instance;
+	int ret;
+
+	NV_DEBUG(dev, "ch%d h=0x%08x gpuobj=%p\n",
+		 chan ? chan->id : -1, handle, gpuobj);
+
+	if (!dev_priv || !gpuobj || (ref_ret && *ref_ret != NULL))
+		return -EINVAL;
+
+	if (!chan && !ref_ret)
+		return -EINVAL;
+
+	if (gpuobj->engine == NVOBJ_ENGINE_SW && !gpuobj->im_pramin) {
+		/* sw object */
+		instance = 0x40;
+	} else {
+		ret = nouveau_gpuobj_instance_get(dev, chan, gpuobj, &instance);
+		if (ret)
+			return ret;
+	}
+
+	ref = kzalloc(sizeof(*ref), GFP_KERNEL);
+	if (!ref)
+		return -ENOMEM;
+	INIT_LIST_HEAD(&ref->list);
+	ref->gpuobj   = gpuobj;
+	ref->channel  = chan;
+	ref->instance = instance;
+
+	if (!ref_ret) {
+		ref->handle = handle;
+
+		ret = nouveau_ramht_insert(dev, ref);
+		if (ret) {
+			kfree(ref);
+			return ret;
+		}
+	} else {
+		ref->handle = ~0;
+		*ref_ret = ref;
+	}
+
+	ref->gpuobj->refcount++;
+	return 0;
+}
+
+int nouveau_gpuobj_ref_del(struct drm_device *dev, struct nouveau_gpuobj_ref **pref)
+{
+	struct nouveau_gpuobj_ref *ref;
+
+	NV_DEBUG(dev, "ref %p\n", pref ? *pref : NULL);
+
+	if (!dev || !pref || *pref == NULL)
+		return -EINVAL;
+	ref = *pref;
+
+	if (ref->handle != ~0)
+		nouveau_ramht_remove(dev, ref);
+
+	if (ref->gpuobj) {
+		ref->gpuobj->refcount--;
+
+		if (ref->gpuobj->refcount == 0) {
+			if (!(ref->gpuobj->flags & NVOBJ_FLAG_ALLOW_NO_REFS))
+				nouveau_gpuobj_del(dev, &ref->gpuobj);
+		}
+	}
+
+	*pref = NULL;
+	kfree(ref);
+	return 0;
+}
+
+int
+nouveau_gpuobj_new_ref(struct drm_device *dev,
+		       struct nouveau_channel *oc, struct nouveau_channel *rc,
+		       uint32_t handle, uint32_t size, int align,
+		       uint32_t flags, struct nouveau_gpuobj_ref **ref)
+{
+	struct nouveau_gpuobj *gpuobj = NULL;
+	int ret;
+
+	ret = nouveau_gpuobj_new(dev, oc, size, align, flags, &gpuobj);
+	if (ret)
+		return ret;
+
+	ret = nouveau_gpuobj_ref_add(dev, rc, handle, gpuobj, ref);
+	if (ret) {
+		nouveau_gpuobj_del(dev, &gpuobj);
+		return ret;
+	}
+
+	return 0;
+}
+
+int
+nouveau_gpuobj_ref_find(struct nouveau_channel *chan, uint32_t handle,
+			struct nouveau_gpuobj_ref **ref_ret)
+{
+	struct nouveau_gpuobj_ref *ref;
+	struct list_head *entry, *tmp;
+
+	list_for_each_safe(entry, tmp, &chan->ramht_refs) {
+		ref = list_entry(entry, struct nouveau_gpuobj_ref, list);
+
+		if (ref->handle == handle) {
+			if (ref_ret)
+				*ref_ret = ref;
+			return 0;
+		}
+	}
+
+	return -EINVAL;
+}
+
+int
+nouveau_gpuobj_new_fake(struct drm_device *dev, uint32_t p_offset,
+			uint32_t b_offset, uint32_t size,
+			uint32_t flags, struct nouveau_gpuobj **pgpuobj,
+			struct nouveau_gpuobj_ref **pref)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_gpuobj *gpuobj = NULL;
+	int i;
+
+	NV_DEBUG(dev,
+		 "p_offset=0x%08x b_offset=0x%08x size=0x%08x flags=0x%08x\n",
+		 p_offset, b_offset, size, flags);
+
+	gpuobj = kzalloc(sizeof(*gpuobj), GFP_KERNEL);
+	if (!gpuobj)
+		return -ENOMEM;
+	NV_DEBUG(dev, "gpuobj %p\n", gpuobj);
+	gpuobj->im_channel = NULL;
+	gpuobj->flags      = flags | NVOBJ_FLAG_FAKE;
+
+	list_add_tail(&gpuobj->list, &dev_priv->gpuobj_list);
+
+	if (p_offset != ~0) {
+		gpuobj->im_pramin = kzalloc(sizeof(struct mem_block),
+					    GFP_KERNEL);
+		if (!gpuobj->im_pramin) {
+			nouveau_gpuobj_del(dev, &gpuobj);
+			return -ENOMEM;
+		}
+		gpuobj->im_pramin->start = p_offset;
+		gpuobj->im_pramin->size  = size;
+	}
+
+	if (b_offset != ~0) {
+		gpuobj->im_backing = (struct nouveau_bo *)-1;
+		gpuobj->im_backing_start = b_offset;
+	}
+
+	if (gpuobj->flags & NVOBJ_FLAG_ZERO_ALLOC) {
+		dev_priv->engine.instmem.prepare_access(dev, true);
+		for (i = 0; i < gpuobj->im_pramin->size; i += 4)
+			nv_wo32(dev, gpuobj, i/4, 0);
+		dev_priv->engine.instmem.finish_access(dev);
+	}
+
+	if (pref) {
+		i = nouveau_gpuobj_ref_add(dev, NULL, 0, gpuobj, pref);
+		if (i) {
+			nouveau_gpuobj_del(dev, &gpuobj);
+			return i;
+		}
+	}
+
+	if (pgpuobj)
+		*pgpuobj = gpuobj;
+	return 0;
+}
+
+
+static uint32_t
+nouveau_gpuobj_class_instmem_size(struct drm_device *dev, int class)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+	/*XXX: dodgy hack for now */
+	if (dev_priv->card_type >= NV_50)
+		return 24;
+	if (dev_priv->card_type >= NV_40)
+		return 32;
+	return 16;
+}
+
+/*
+   DMA objects are used to reference a piece of memory in the
+   framebuffer, PCI or AGP address space. Each object is 16 bytes big
+   and looks as follows:
+
+   entry[0]
+   11:0  class (seems like I can always use 0 here)
+   12    page table present?
+   13    page entry linear?
+   15:14 access: 0 rw, 1 ro, 2 wo
+   17:16 target: 0 NV memory, 1 NV memory tiled, 2 PCI, 3 AGP
+   31:20 dma adjust (bits 0-11 of the address)
+   entry[1]
+   dma limit (size of transfer)
+   entry[X]
+   1     0 readonly, 1 readwrite
+   31:12 dma frame address of the page (bits 12-31 of the address)
+   entry[N]
+   page table terminator, same value as the first pte, as does nvidia
+   rivatv uses 0xffffffff
+
+   Non linear page tables need a list of frame addresses afterwards,
+   the rivatv project has some info on this.
+
+   The method below creates a DMA object in instance RAM and returns a handle
+   to it that can be used to set up context objects.
+*/
+int
+nouveau_gpuobj_dma_new(struct nouveau_channel *chan, int class,
+		       uint64_t offset, uint64_t size, int access,
+		       int target, struct nouveau_gpuobj **gpuobj)
+{
+	struct drm_device *dev = chan->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_instmem_engine *instmem = &dev_priv->engine.instmem;
+	int ret;
+
+	NV_DEBUG(dev, "ch%d class=0x%04x offset=0x%llx size=0x%llx\n",
+		 chan->id, class, offset, size);
+	NV_DEBUG(dev, "access=%d target=%d\n", access, target);
+
+	switch (target) {
+	case NV_DMA_TARGET_AGP:
+		offset += dev_priv->gart_info.aper_base;
+		break;
+	default:
+		break;
+	}
+
+	ret = nouveau_gpuobj_new(dev, chan,
+				 nouveau_gpuobj_class_instmem_size(dev, class),
+				 16, NVOBJ_FLAG_ZERO_ALLOC |
+				 NVOBJ_FLAG_ZERO_FREE, gpuobj);
+	if (ret) {
+		NV_ERROR(dev, "Error creating gpuobj: %d\n", ret);
+		return ret;
+	}
+
+	instmem->prepare_access(dev, true);
+
+	if (dev_priv->card_type < NV_50) {
+		uint32_t frame, adjust, pte_flags = 0;
+
+		if (access != NV_DMA_ACCESS_RO)
+			pte_flags |= (1<<1);
+		adjust = offset &  0x00000fff;
+		frame  = offset & ~0x00000fff;
+
+		nv_wo32(dev, *gpuobj, 0, ((1<<12) | (1<<13) |
+				(adjust << 20) |
+				 (access << 14) |
+				 (target << 16) |
+				  class));
+		nv_wo32(dev, *gpuobj, 1, size - 1);
+		nv_wo32(dev, *gpuobj, 2, frame | pte_flags);
+		nv_wo32(dev, *gpuobj, 3, frame | pte_flags);
+	} else {
+		uint64_t limit = offset + size - 1;
+		uint32_t flags0, flags5;
+
+		if (target == NV_DMA_TARGET_VIDMEM) {
+			flags0 = 0x00190000;
+			flags5 = 0x00010000;
+		} else {
+			flags0 = 0x7fc00000;
+			flags5 = 0x00080000;
+		}
+
+		nv_wo32(dev, *gpuobj, 0, flags0 | class);
+		nv_wo32(dev, *gpuobj, 1, lower_32_bits(limit));
+		nv_wo32(dev, *gpuobj, 2, lower_32_bits(offset));
+		nv_wo32(dev, *gpuobj, 3, ((upper_32_bits(limit) & 0xff) << 24) |
+					(upper_32_bits(offset) & 0xff));
+		nv_wo32(dev, *gpuobj, 5, flags5);
+	}
+
+	instmem->finish_access(dev);
+
+	(*gpuobj)->engine = NVOBJ_ENGINE_SW;
+	(*gpuobj)->class  = class;
+	return 0;
+}
+
+int
+nouveau_gpuobj_gart_dma_new(struct nouveau_channel *chan,
+			    uint64_t offset, uint64_t size, int access,
+			    struct nouveau_gpuobj **gpuobj,
+			    uint32_t *o_ret)
+{
+	struct drm_device *dev = chan->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	int ret;
+
+	if (dev_priv->gart_info.type == NOUVEAU_GART_AGP ||
+	    (dev_priv->card_type >= NV_50 &&
+	     dev_priv->gart_info.type == NOUVEAU_GART_SGDMA)) {
+		ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY,
+					     offset + dev_priv->vm_gart_base,
+					     size, access, NV_DMA_TARGET_AGP,
+					     gpuobj);
+		if (o_ret)
+			*o_ret = 0;
+	} else
+	if (dev_priv->gart_info.type == NOUVEAU_GART_SGDMA) {
+		*gpuobj = dev_priv->gart_info.sg_ctxdma;
+		if (offset & ~0xffffffffULL) {
+			NV_ERROR(dev, "obj offset exceeds 32-bits\n");
+			return -EINVAL;
+		}
+		if (o_ret)
+			*o_ret = (uint32_t)offset;
+		ret = (*gpuobj != NULL) ? 0 : -EINVAL;
+	} else {
+		NV_ERROR(dev, "Invalid GART type %d\n", dev_priv->gart_info.type);
+		return -EINVAL;
+	}
+
+	return ret;
+}
+
+/* Context objects in the instance RAM have the following structure.
+ * On NV40 they are 32 byte long, on NV30 and smaller 16 bytes.
+
+   NV4 - NV30:
+
+   entry[0]
+   11:0 class
+   12   chroma key enable
+   13   user clip enable
+   14   swizzle enable
+   17:15 patch config:
+       scrcopy_and, rop_and, blend_and, scrcopy, srccopy_pre, blend_pre
+   18   synchronize enable
+   19   endian: 1 big, 0 little
+   21:20 dither mode
+   23    single step enable
+   24    patch status: 0 invalid, 1 valid
+   25    context_surface 0: 1 valid
+   26    context surface 1: 1 valid
+   27    context pattern: 1 valid
+   28    context rop: 1 valid
+   29,30 context beta, beta4
+   entry[1]
+   7:0   mono format
+   15:8  color format
+   31:16 notify instance address
+   entry[2]
+   15:0  dma 0 instance address
+   31:16 dma 1 instance address
+   entry[3]
+   dma method traps
+
+   NV40:
+   No idea what the exact format is. Here's what can be deducted:
+
+   entry[0]:
+   11:0  class  (maybe uses more bits here?)
+   17    user clip enable
+   21:19 patch config
+   25    patch status valid ?
+   entry[1]:
+   15:0  DMA notifier  (maybe 20:0)
+   entry[2]:
+   15:0  DMA 0 instance (maybe 20:0)
+   24    big endian
+   entry[3]:
+   15:0  DMA 1 instance (maybe 20:0)
+   entry[4]:
+   entry[5]:
+   set to 0?
+*/
+int
+nouveau_gpuobj_gr_new(struct nouveau_channel *chan, int class,
+		      struct nouveau_gpuobj **gpuobj)
+{
+	struct drm_device *dev = chan->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	int ret;
+
+	NV_DEBUG(dev, "ch%d class=0x%04x\n", chan->id, class);
+
+	ret = nouveau_gpuobj_new(dev, chan,
+				 nouveau_gpuobj_class_instmem_size(dev, class),
+				 16,
+				 NVOBJ_FLAG_ZERO_ALLOC | NVOBJ_FLAG_ZERO_FREE,
+				 gpuobj);
+	if (ret) {
+		NV_ERROR(dev, "Error creating gpuobj: %d\n", ret);
+		return ret;
+	}
+
+	dev_priv->engine.instmem.prepare_access(dev, true);
+	if (dev_priv->card_type >= NV_50) {
+		nv_wo32(dev, *gpuobj, 0, class);
+		nv_wo32(dev, *gpuobj, 5, 0x00010000);
+	} else {
+		switch (class) {
+		case NV_CLASS_NULL:
+			nv_wo32(dev, *gpuobj, 0, 0x00001030);
+			nv_wo32(dev, *gpuobj, 1, 0xFFFFFFFF);
+			break;
+		default:
+			if (dev_priv->card_type >= NV_40) {
+				nv_wo32(dev, *gpuobj, 0, class);
+#ifdef __BIG_ENDIAN
+				nv_wo32(dev, *gpuobj, 2, 0x01000000);
+#endif
+			} else {
+#ifdef __BIG_ENDIAN
+				nv_wo32(dev, *gpuobj, 0, class | 0x00080000);
+#else
+				nv_wo32(dev, *gpuobj, 0, class);
+#endif
+			}
+		}
+	}
+	dev_priv->engine.instmem.finish_access(dev);
+
+	(*gpuobj)->engine = NVOBJ_ENGINE_GR;
+	(*gpuobj)->class  = class;
+	return 0;
+}
+
+int
+nouveau_gpuobj_sw_new(struct nouveau_channel *chan, int class,
+		      struct nouveau_gpuobj **gpuobj_ret)
+{
+	struct drm_nouveau_private *dev_priv;
+	struct nouveau_gpuobj *gpuobj;
+
+	if (!chan || !gpuobj_ret || *gpuobj_ret != NULL)
+		return -EINVAL;
+	dev_priv = chan->dev->dev_private;
+
+	gpuobj = kzalloc(sizeof(*gpuobj), GFP_KERNEL);
+	if (!gpuobj)
+		return -ENOMEM;
+	gpuobj->engine = NVOBJ_ENGINE_SW;
+	gpuobj->class = class;
+
+	list_add_tail(&gpuobj->list, &dev_priv->gpuobj_list);
+	*gpuobj_ret = gpuobj;
+	return 0;
+}
+
+static int
+nouveau_gpuobj_channel_init_pramin(struct nouveau_channel *chan)
+{
+	struct drm_device *dev = chan->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_gpuobj *pramin = NULL;
+	uint32_t size;
+	uint32_t base;
+	int ret;
+
+	NV_DEBUG(dev, "ch%d\n", chan->id);
+
+	/* Base amount for object storage (4KiB enough?) */
+	size = 0x1000;
+	base = 0;
+
+	/* PGRAPH context */
+
+	if (dev_priv->card_type == NV_50) {
+		/* Various fixed table thingos */
+		size += 0x1400; /* mostly unknown stuff */
+		size += 0x4000; /* vm pd */
+		base  = 0x6000;
+		/* RAMHT, not sure about setting size yet, 32KiB to be safe */
+		size += 0x8000;
+		/* RAMFC */
+		size += 0x1000;
+		/* PGRAPH context */
+		size += 0x70000;
+	}
+
+	NV_DEBUG(dev, "ch%d PRAMIN size: 0x%08x bytes, base alloc=0x%08x\n",
+		 chan->id, size, base);
+	ret = nouveau_gpuobj_new_ref(dev, NULL, NULL, 0, size, 0x1000, 0,
+				     &chan->ramin);
+	if (ret) {
+		NV_ERROR(dev, "Error allocating channel PRAMIN: %d\n", ret);
+		return ret;
+	}
+	pramin = chan->ramin->gpuobj;
+
+	ret = nouveau_mem_init_heap(&chan->ramin_heap,
+				    pramin->im_pramin->start + base, size);
+	if (ret) {
+		NV_ERROR(dev, "Error creating PRAMIN heap: %d\n", ret);
+		nouveau_gpuobj_ref_del(dev, &chan->ramin);
+		return ret;
+	}
+
+	return 0;
+}
+
+int
+nouveau_gpuobj_channel_init(struct nouveau_channel *chan,
+			    uint32_t vram_h, uint32_t tt_h)
+{
+	struct drm_device *dev = chan->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_instmem_engine *instmem = &dev_priv->engine.instmem;
+	struct nouveau_gpuobj *vram = NULL, *tt = NULL;
+	int ret, i;
+
+	INIT_LIST_HEAD(&chan->ramht_refs);
+
+	NV_DEBUG(dev, "ch%d vram=0x%08x tt=0x%08x\n", chan->id, vram_h, tt_h);
+
+	/* Reserve a block of PRAMIN for the channel
+	 *XXX: maybe on <NV50 too at some point
+	 */
+	if (0 || dev_priv->card_type == NV_50) {
+		ret = nouveau_gpuobj_channel_init_pramin(chan);
+		if (ret) {
+			NV_ERROR(dev, "init pramin\n");
+			return ret;
+		}
+	}
+
+	/* NV50 VM
+	 *  - Allocate per-channel page-directory
+	 *  - Map GART and VRAM into the channel's address space at the
+	 *    locations determined during init.
+	 */
+	if (dev_priv->card_type >= NV_50) {
+		uint32_t vm_offset, pde;
+
+		instmem->prepare_access(dev, true);
+
+		vm_offset = (dev_priv->chipset & 0xf0) == 0x50 ? 0x1400 : 0x200;
+		vm_offset += chan->ramin->gpuobj->im_pramin->start;
+
+		ret = nouveau_gpuobj_new_fake(dev, vm_offset, ~0, 0x4000,
+							0, &chan->vm_pd, NULL);
+		if (ret) {
+			instmem->finish_access(dev);
+			return ret;
+		}
+		for (i = 0; i < 0x4000; i += 8) {
+			nv_wo32(dev, chan->vm_pd, (i+0)/4, 0x00000000);
+			nv_wo32(dev, chan->vm_pd, (i+4)/4, 0xdeadcafe);
+		}
+
+		pde = (dev_priv->vm_gart_base / (512*1024*1024)) * 2;
+		ret = nouveau_gpuobj_ref_add(dev, NULL, 0,
+					     dev_priv->gart_info.sg_ctxdma,
+					     &chan->vm_gart_pt);
+		if (ret) {
+			instmem->finish_access(dev);
+			return ret;
+		}
+		nv_wo32(dev, chan->vm_pd, pde++,
+			    chan->vm_gart_pt->instance | 0x03);
+		nv_wo32(dev, chan->vm_pd, pde++, 0x00000000);
+
+		pde = (dev_priv->vm_vram_base / (512*1024*1024)) * 2;
+		for (i = 0; i < dev_priv->vm_vram_pt_nr; i++) {
+			ret = nouveau_gpuobj_ref_add(dev, NULL, 0,
+						     dev_priv->vm_vram_pt[i],
+						     &chan->vm_vram_pt[i]);
+			if (ret) {
+				instmem->finish_access(dev);
+				return ret;
+			}
+
+			nv_wo32(dev, chan->vm_pd, pde++,
+				    chan->vm_vram_pt[i]->instance | 0x61);
+			nv_wo32(dev, chan->vm_pd, pde++, 0x00000000);
+		}
+
+		instmem->finish_access(dev);
+	}
+
+	/* RAMHT */
+	if (dev_priv->card_type < NV_50) {
+		ret = nouveau_gpuobj_ref_add(dev, NULL, 0, dev_priv->ramht,
+					     &chan->ramht);
+		if (ret)
+			return ret;
+	} else {
+		ret = nouveau_gpuobj_new_ref(dev, chan, chan, 0,
+					     0x8000, 16,
+					     NVOBJ_FLAG_ZERO_ALLOC,
+					     &chan->ramht);
+		if (ret)
+			return ret;
+	}
+
+	/* VRAM ctxdma */
+	if (dev_priv->card_type >= NV_50) {
+		ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY,
+					     0, dev_priv->vm_end,
+					     NV_DMA_ACCESS_RW,
+					     NV_DMA_TARGET_AGP, &vram);
+		if (ret) {
+			NV_ERROR(dev, "Error creating VRAM ctxdma: %d\n", ret);
+			return ret;
+		}
+	} else {
+		ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY,
+						0, dev_priv->fb_available_size,
+						NV_DMA_ACCESS_RW,
+						NV_DMA_TARGET_VIDMEM, &vram);
+		if (ret) {
+			NV_ERROR(dev, "Error creating VRAM ctxdma: %d\n", ret);
+			return ret;
+		}
+	}
+
+	ret = nouveau_gpuobj_ref_add(dev, chan, vram_h, vram, NULL);
+	if (ret) {
+		NV_ERROR(dev, "Error referencing VRAM ctxdma: %d\n", ret);
+		return ret;
+	}
+
+	/* TT memory ctxdma */
+	if (dev_priv->card_type >= NV_50) {
+		tt = vram;
+	} else
+	if (dev_priv->gart_info.type != NOUVEAU_GART_NONE) {
+		ret = nouveau_gpuobj_gart_dma_new(chan, 0,
+						  dev_priv->gart_info.aper_size,
+						  NV_DMA_ACCESS_RW, &tt, NULL);
+	} else {
+		NV_ERROR(dev, "Invalid GART type %d\n", dev_priv->gart_info.type);
+		ret = -EINVAL;
+	}
+
+	if (ret) {
+		NV_ERROR(dev, "Error creating TT ctxdma: %d\n", ret);
+		return ret;
+	}
+
+	ret = nouveau_gpuobj_ref_add(dev, chan, tt_h, tt, NULL);
+	if (ret) {
+		NV_ERROR(dev, "Error referencing TT ctxdma: %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+void
+nouveau_gpuobj_channel_takedown(struct nouveau_channel *chan)
+{
+	struct drm_nouveau_private *dev_priv = chan->dev->dev_private;
+	struct drm_device *dev = chan->dev;
+	struct list_head *entry, *tmp;
+	struct nouveau_gpuobj_ref *ref;
+	int i;
+
+	NV_DEBUG(dev, "ch%d\n", chan->id);
+
+	if (!chan->ramht_refs.next)
+		return;
+
+	list_for_each_safe(entry, tmp, &chan->ramht_refs) {
+		ref = list_entry(entry, struct nouveau_gpuobj_ref, list);
+
+		nouveau_gpuobj_ref_del(dev, &ref);
+	}
+
+	nouveau_gpuobj_ref_del(dev, &chan->ramht);
+
+	nouveau_gpuobj_del(dev, &chan->vm_pd);
+	nouveau_gpuobj_ref_del(dev, &chan->vm_gart_pt);
+	for (i = 0; i < dev_priv->vm_vram_pt_nr; i++)
+		nouveau_gpuobj_ref_del(dev, &chan->vm_vram_pt[i]);
+
+	if (chan->ramin_heap)
+		nouveau_mem_takedown(&chan->ramin_heap);
+	if (chan->ramin)
+		nouveau_gpuobj_ref_del(dev, &chan->ramin);
+
+}
+
+int
+nouveau_gpuobj_suspend(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_gpuobj *gpuobj;
+	int i;
+
+	if (dev_priv->card_type < NV_50) {
+		dev_priv->susres.ramin_copy = vmalloc(dev_priv->ramin_rsvd_vram);
+		if (!dev_priv->susres.ramin_copy)
+			return -ENOMEM;
+
+		for (i = 0; i < dev_priv->ramin_rsvd_vram; i += 4)
+			dev_priv->susres.ramin_copy[i/4] = nv_ri32(dev, i);
+		return 0;
+	}
+
+	list_for_each_entry(gpuobj, &dev_priv->gpuobj_list, list) {
+		if (!gpuobj->im_backing || (gpuobj->flags & NVOBJ_FLAG_FAKE))
+			continue;
+
+		gpuobj->im_backing_suspend = vmalloc(gpuobj->im_pramin->size);
+		if (!gpuobj->im_backing_suspend) {
+			nouveau_gpuobj_resume(dev);
+			return -ENOMEM;
+		}
+
+		dev_priv->engine.instmem.prepare_access(dev, false);
+		for (i = 0; i < gpuobj->im_pramin->size / 4; i++)
+			gpuobj->im_backing_suspend[i] = nv_ro32(dev, gpuobj, i);
+		dev_priv->engine.instmem.finish_access(dev);
+	}
+
+	return 0;
+}
+
+void
+nouveau_gpuobj_suspend_cleanup(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_gpuobj *gpuobj;
+
+	if (dev_priv->card_type < NV_50) {
+		vfree(dev_priv->susres.ramin_copy);
+		dev_priv->susres.ramin_copy = NULL;
+		return;
+	}
+
+	list_for_each_entry(gpuobj, &dev_priv->gpuobj_list, list) {
+		if (!gpuobj->im_backing_suspend)
+			continue;
+
+		vfree(gpuobj->im_backing_suspend);
+		gpuobj->im_backing_suspend = NULL;
+	}
+}
+
+void
+nouveau_gpuobj_resume(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_gpuobj *gpuobj;
+	int i;
+
+	if (dev_priv->card_type < NV_50) {
+		for (i = 0; i < dev_priv->ramin_rsvd_vram; i += 4)
+			nv_wi32(dev, i, dev_priv->susres.ramin_copy[i/4]);
+		nouveau_gpuobj_suspend_cleanup(dev);
+		return;
+	}
+
+	list_for_each_entry(gpuobj, &dev_priv->gpuobj_list, list) {
+		if (!gpuobj->im_backing_suspend)
+			continue;
+
+		dev_priv->engine.instmem.prepare_access(dev, true);
+		for (i = 0; i < gpuobj->im_pramin->size / 4; i++)
+			nv_wo32(dev, gpuobj, i, gpuobj->im_backing_suspend[i]);
+		dev_priv->engine.instmem.finish_access(dev);
+	}
+
+	nouveau_gpuobj_suspend_cleanup(dev);
+}
+
+int nouveau_ioctl_grobj_alloc(struct drm_device *dev, void *data,
+			      struct drm_file *file_priv)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct drm_nouveau_grobj_alloc *init = data;
+	struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
+	struct nouveau_pgraph_object_class *grc;
+	struct nouveau_gpuobj *gr = NULL;
+	struct nouveau_channel *chan;
+	int ret;
+
+	NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
+	NOUVEAU_GET_USER_CHANNEL_WITH_RETURN(init->channel, file_priv, chan);
+
+	if (init->handle == ~0)
+		return -EINVAL;
+
+	grc = pgraph->grclass;
+	while (grc->id) {
+		if (grc->id == init->class)
+			break;
+		grc++;
+	}
+
+	if (!grc->id) {
+		NV_ERROR(dev, "Illegal object class: 0x%x\n", init->class);
+		return -EPERM;
+	}
+
+	if (nouveau_gpuobj_ref_find(chan, init->handle, NULL) == 0)
+		return -EEXIST;
+
+	if (!grc->software)
+		ret = nouveau_gpuobj_gr_new(chan, grc->id, &gr);
+	else
+		ret = nouveau_gpuobj_sw_new(chan, grc->id, &gr);
+
+	if (ret) {
+		NV_ERROR(dev, "Error creating object: %d (%d/0x%08x)\n",
+			 ret, init->channel, init->handle);
+		return ret;
+	}
+
+	ret = nouveau_gpuobj_ref_add(dev, chan, init->handle, gr, NULL);
+	if (ret) {
+		NV_ERROR(dev, "Error referencing object: %d (%d/0x%08x)\n",
+			 ret, init->channel, init->handle);
+		nouveau_gpuobj_del(dev, &gr);
+		return ret;
+	}
+
+	return 0;
+}
+
+int nouveau_ioctl_gpuobj_free(struct drm_device *dev, void *data,
+			      struct drm_file *file_priv)
+{
+	struct drm_nouveau_gpuobj_free *objfree = data;
+	struct nouveau_gpuobj_ref *ref;
+	struct nouveau_channel *chan;
+	int ret;
+
+	NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
+	NOUVEAU_GET_USER_CHANNEL_WITH_RETURN(objfree->channel, file_priv, chan);
+
+	ret = nouveau_gpuobj_ref_find(chan, objfree->handle, &ref);
+	if (ret)
+		return ret;
+	nouveau_gpuobj_ref_del(dev, &ref);
+
+	return 0;
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_bios.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_bios.c
@@ -0,0 +1,6066 @@
+/*
+ * Copyright 2005-2006 Erik Waling
+ * Copyright 2006 Stephane Marchesin
+ * Copyright 2007-2009 Stuart Bennett
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include "drmP.h"
+#define NV_DEBUG_NOTRACE
+#include "nouveau_drv.h"
+#include "nouveau_hw.h"
+
+/* these defines are made up */
+#define NV_CIO_CRE_44_HEADA 0x0
+#define NV_CIO_CRE_44_HEADB 0x3
+#define FEATURE_MOBILE 0x10	/* also FEATURE_QUADRO for BMP */
+#define LEGACY_I2C_CRT 0x80
+#define LEGACY_I2C_PANEL 0x81
+#define LEGACY_I2C_TV 0x82
+
+#define EDID1_LEN 128
+
+#define BIOSLOG(sip, fmt, arg...) NV_DEBUG(sip->dev, fmt, ##arg)
+#define LOG_OLD_VALUE(x)
+
+#define ROM16(x) le16_to_cpu(*(uint16_t *)&(x))
+#define ROM32(x) le32_to_cpu(*(uint32_t *)&(x))
+
+struct init_exec {
+	bool execute;
+	bool repeat;
+};
+
+static bool nv_cksum(const uint8_t *data, unsigned int length)
+{
+	/*
+	 * There's a few checksums in the BIOS, so here's a generic checking
+	 * function.
+	 */
+	int i;
+	uint8_t sum = 0;
+
+	for (i = 0; i < length; i++)
+		sum += data[i];
+
+	if (sum)
+		return true;
+
+	return false;
+}
+
+static int
+score_vbios(struct drm_device *dev, const uint8_t *data, const bool writeable)
+{
+	if (!(data[0] == 0x55 && data[1] == 0xAA)) {
+		NV_TRACEWARN(dev, "... BIOS signature not found\n");
+		return 0;
+	}
+
+	if (nv_cksum(data, data[2] * 512)) {
+		NV_TRACEWARN(dev, "... BIOS checksum invalid\n");
+		/* if a ro image is somewhat bad, it's probably all rubbish */
+		return writeable ? 2 : 1;
+	} else
+		NV_TRACE(dev, "... appears to be valid\n");
+
+	return 3;
+}
+
+static void load_vbios_prom(struct drm_device *dev, uint8_t *data)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	uint32_t pci_nv_20, save_pci_nv_20;
+	int pcir_ptr;
+	int i;
+
+	if (dev_priv->card_type >= NV_50)
+		pci_nv_20 = 0x88050;
+	else
+		pci_nv_20 = NV_PBUS_PCI_NV_20;
+
+	/* enable ROM access */
+	save_pci_nv_20 = nvReadMC(dev, pci_nv_20);
+	nvWriteMC(dev, pci_nv_20,
+		  save_pci_nv_20 & ~NV_PBUS_PCI_NV_20_ROM_SHADOW_ENABLED);
+
+	/* bail if no rom signature */
+	if (nv_rd08(dev, NV_PROM_OFFSET) != 0x55 ||
+	    nv_rd08(dev, NV_PROM_OFFSET + 1) != 0xaa)
+		goto out;
+
+	/* additional check (see note below) - read PCI record header */
+	pcir_ptr = nv_rd08(dev, NV_PROM_OFFSET + 0x18) |
+		   nv_rd08(dev, NV_PROM_OFFSET + 0x19) << 8;
+	if (nv_rd08(dev, NV_PROM_OFFSET + pcir_ptr) != 'P' ||
+	    nv_rd08(dev, NV_PROM_OFFSET + pcir_ptr + 1) != 'C' ||
+	    nv_rd08(dev, NV_PROM_OFFSET + pcir_ptr + 2) != 'I' ||
+	    nv_rd08(dev, NV_PROM_OFFSET + pcir_ptr + 3) != 'R')
+		goto out;
+
+	/* on some 6600GT/6800LE prom reads are messed up.  nvclock alleges a
+	 * a good read may be obtained by waiting or re-reading (cargocult: 5x)
+	 * each byte.  we'll hope pramin has something usable instead
+	 */
+	for (i = 0; i < NV_PROM_SIZE; i++)
+		data[i] = nv_rd08(dev, NV_PROM_OFFSET + i);
+
+out:
+	/* disable ROM access */
+	nvWriteMC(dev, pci_nv_20,
+		  save_pci_nv_20 | NV_PBUS_PCI_NV_20_ROM_SHADOW_ENABLED);
+}
+
+static void load_vbios_pramin(struct drm_device *dev, uint8_t *data)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	uint32_t old_bar0_pramin = 0;
+	int i;
+
+	if (dev_priv->card_type >= NV_50) {
+		uint32_t vbios_vram = (nv_rd32(dev, 0x619f04) & ~0xff) << 8;
+
+		if (!vbios_vram)
+			vbios_vram = (nv_rd32(dev, 0x1700) << 16) + 0xf0000;
+
+		old_bar0_pramin = nv_rd32(dev, 0x1700);
+		nv_wr32(dev, 0x1700, vbios_vram >> 16);
+	}
+
+	/* bail if no rom signature */
+	if (nv_rd08(dev, NV_PRAMIN_OFFSET) != 0x55 ||
+	    nv_rd08(dev, NV_PRAMIN_OFFSET + 1) != 0xaa)
+		goto out;
+
+	for (i = 0; i < NV_PROM_SIZE; i++)
+		data[i] = nv_rd08(dev, NV_PRAMIN_OFFSET + i);
+
+out:
+	if (dev_priv->card_type >= NV_50)
+		nv_wr32(dev, 0x1700, old_bar0_pramin);
+}
+
+static void load_vbios_pci(struct drm_device *dev, uint8_t *data)
+{
+	void __iomem *rom = NULL;
+	size_t rom_len;
+	int ret;
+
+	ret = pci_enable_rom(dev->pdev);
+	if (ret)
+		return;
+
+	rom = pci_map_rom(dev->pdev, &rom_len);
+	if (!rom)
+		goto out;
+	memcpy_fromio(data, rom, rom_len);
+	pci_unmap_rom(dev->pdev, rom);
+
+out:
+	pci_disable_rom(dev->pdev);
+}
+
+struct methods {
+	const char desc[8];
+	void (*loadbios)(struct drm_device *, uint8_t *);
+	const bool rw;
+};
+
+static struct methods nv04_methods[] = {
+	{ "PROM", load_vbios_prom, false },
+	{ "PRAMIN", load_vbios_pramin, true },
+	{ "PCIROM", load_vbios_pci, true },
+};
+
+static struct methods nv50_methods[] = {
+	{ "PRAMIN", load_vbios_pramin, true },
+	{ "PROM", load_vbios_prom, false },
+	{ "PCIROM", load_vbios_pci, true },
+};
+
+#define METHODCNT 3
+
+static bool NVShadowVBIOS(struct drm_device *dev, uint8_t *data)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct methods *methods;
+	int i;
+	int testscore = 3;
+	int scores[METHODCNT];
+
+	if (nouveau_vbios) {
+		methods = nv04_methods;
+		for (i = 0; i < METHODCNT; i++)
+			if (!strcasecmp(nouveau_vbios, methods[i].desc))
+				break;
+
+		if (i < METHODCNT) {
+			NV_INFO(dev, "Attempting to use BIOS image from %s\n",
+				methods[i].desc);
+
+			methods[i].loadbios(dev, data);
+			if (score_vbios(dev, data, methods[i].rw))
+				return true;
+		}
+
+		NV_ERROR(dev, "VBIOS source \'%s\' invalid\n", nouveau_vbios);
+	}
+
+	if (dev_priv->card_type < NV_50)
+		methods = nv04_methods;
+	else
+		methods = nv50_methods;
+
+	for (i = 0; i < METHODCNT; i++) {
+		NV_TRACE(dev, "Attempting to load BIOS image from %s\n",
+			 methods[i].desc);
+		data[0] = data[1] = 0;	/* avoid reuse of previous image */
+		methods[i].loadbios(dev, data);
+		scores[i] = score_vbios(dev, data, methods[i].rw);
+		if (scores[i] == testscore)
+			return true;
+	}
+
+	while (--testscore > 0) {
+		for (i = 0; i < METHODCNT; i++) {
+			if (scores[i] == testscore) {
+				NV_TRACE(dev, "Using BIOS image from %s\n",
+					 methods[i].desc);
+				methods[i].loadbios(dev, data);
+				return true;
+			}
+		}
+	}
+
+	NV_ERROR(dev, "No valid BIOS image found\n");
+	return false;
+}
+
+struct init_tbl_entry {
+	char *name;
+	uint8_t id;
+	int (*handler)(struct nvbios *, uint16_t, struct init_exec *);
+};
+
+struct bit_entry {
+	uint8_t id[2];
+	uint16_t length;
+	uint16_t offset;
+};
+
+static int parse_init_table(struct nvbios *, unsigned int, struct init_exec *);
+
+#define MACRO_INDEX_SIZE	2
+#define MACRO_SIZE		8
+#define CONDITION_SIZE		12
+#define IO_FLAG_CONDITION_SIZE	9
+#define IO_CONDITION_SIZE	5
+#define MEM_INIT_SIZE		66
+
+static void still_alive(void)
+{
+#if 0
+	sync();
+	msleep(2);
+#endif
+}
+
+static uint32_t
+munge_reg(struct nvbios *bios, uint32_t reg)
+{
+	struct drm_nouveau_private *dev_priv = bios->dev->dev_private;
+	struct dcb_entry *dcbent = bios->display.output;
+
+	if (dev_priv->card_type < NV_50)
+		return reg;
+
+	if (reg & 0x40000000) {
+		BUG_ON(!dcbent);
+
+		reg += (ffs(dcbent->or) - 1) * 0x800;
+		if ((reg & 0x20000000) && !(dcbent->sorconf.link & 1))
+			reg += 0x00000080;
+	}
+
+	reg &= ~0x60000000;
+	return reg;
+}
+
+static int
+valid_reg(struct nvbios *bios, uint32_t reg)
+{
+	struct drm_nouveau_private *dev_priv = bios->dev->dev_private;
+	struct drm_device *dev = bios->dev;
+
+	/* C51 has misaligned regs on purpose. Marvellous */
+	if (reg & 0x2 ||
+	    (reg & 0x1 && dev_priv->VBIOS.pub.chip_version != 0x51))
+		NV_ERROR(dev, "======= misaligned reg 0x%08X =======\n", reg);
+
+	/* warn on C51 regs that haven't been verified accessible in tracing */
+	if (reg & 0x1 && dev_priv->VBIOS.pub.chip_version == 0x51 &&
+	    reg != 0x130d && reg != 0x1311 && reg != 0x60081d)
+		NV_WARN(dev, "=== C51 misaligned reg 0x%08X not verified ===\n",
+			reg);
+
+	if (reg >= (8*1024*1024)) {
+		NV_ERROR(dev, "=== reg 0x%08x out of mapped bounds ===\n", reg);
+		return 0;
+	}
+
+	return 1;
+}
+
+static bool
+valid_idx_port(struct nvbios *bios, uint16_t port)
+{
+	struct drm_nouveau_private *dev_priv = bios->dev->dev_private;
+	struct drm_device *dev = bios->dev;
+
+	/*
+	 * If adding more ports here, the read/write functions below will need
+	 * updating so that the correct mmio range (PRMCIO, PRMDIO, PRMVIO) is
+	 * used for the port in question
+	 */
+	if (dev_priv->card_type < NV_50) {
+		if (port == NV_CIO_CRX__COLOR)
+			return true;
+		if (port == NV_VIO_SRX)
+			return true;
+	} else {
+		if (port == NV_CIO_CRX__COLOR)
+			return true;
+	}
+
+	NV_ERROR(dev, "========== unknown indexed io port 0x%04X ==========\n",
+		 port);
+
+	return false;
+}
+
+static bool
+valid_port(struct nvbios *bios, uint16_t port)
+{
+	struct drm_device *dev = bios->dev;
+
+	/*
+	 * If adding more ports here, the read/write functions below will need
+	 * updating so that the correct mmio range (PRMCIO, PRMDIO, PRMVIO) is
+	 * used for the port in question
+	 */
+	if (port == NV_VIO_VSE2)
+		return true;
+
+	NV_ERROR(dev, "========== unknown io port 0x%04X ==========\n", port);
+
+	return false;
+}
+
+static uint32_t
+bios_rd32(struct nvbios *bios, uint32_t reg)
+{
+	uint32_t data;
+
+	reg = munge_reg(bios, reg);
+	if (!valid_reg(bios, reg))
+		return 0;
+
+	/*
+	 * C51 sometimes uses regs with bit0 set in the address. For these
+	 * cases there should exist a translation in a BIOS table to an IO
+	 * port address which the BIOS uses for accessing the reg
+	 *
+	 * These only seem to appear for the power control regs to a flat panel,
+	 * and the GPIO regs at 0x60081*.  In C51 mmio traces the normal regs
+	 * for 0x1308 and 0x1310 are used - hence the mask below.  An S3
+	 * suspend-resume mmio trace from a C51 will be required to see if this
+	 * is true for the power microcode in 0x14.., or whether the direct IO
+	 * port access method is needed
+	 */
+	if (reg & 0x1)
+		reg &= ~0x1;
+
+	data = nv_rd32(bios->dev, reg);
+
+	BIOSLOG(bios, "	Read:  Reg: 0x%08X, Data: 0x%08X\n", reg, data);
+
+	return data;
+}
+
+static void
+bios_wr32(struct nvbios *bios, uint32_t reg, uint32_t data)
+{
+	struct drm_nouveau_private *dev_priv = bios->dev->dev_private;
+
+	reg = munge_reg(bios, reg);
+	if (!valid_reg(bios, reg))
+		return;
+
+	/* see note in bios_rd32 */
+	if (reg & 0x1)
+		reg &= 0xfffffffe;
+
+	LOG_OLD_VALUE(bios_rd32(bios, reg));
+	BIOSLOG(bios, "	Write: Reg: 0x%08X, Data: 0x%08X\n", reg, data);
+
+	if (dev_priv->VBIOS.execute) {
+		still_alive();
+		nv_wr32(bios->dev, reg, data);
+	}
+}
+
+static uint8_t
+bios_idxprt_rd(struct nvbios *bios, uint16_t port, uint8_t index)
+{
+	struct drm_nouveau_private *dev_priv = bios->dev->dev_private;
+	struct drm_device *dev = bios->dev;
+	uint8_t data;
+
+	if (!valid_idx_port(bios, port))
+		return 0;
+
+	if (dev_priv->card_type < NV_50) {
+		if (port == NV_VIO_SRX)
+			data = NVReadVgaSeq(dev, bios->state.crtchead, index);
+		else	/* assume NV_CIO_CRX__COLOR */
+			data = NVReadVgaCrtc(dev, bios->state.crtchead, index);
+	} else {
+		uint32_t data32;
+
+		data32 = bios_rd32(bios, NV50_PDISPLAY_VGACRTC(index & ~3));
+		data = (data32 >> ((index & 3) << 3)) & 0xff;
+	}
+
+	BIOSLOG(bios, "	Indexed IO read:  Port: 0x%04X, Index: 0x%02X, "
+		      "Head: 0x%02X, Data: 0x%02X\n",
+		port, index, bios->state.crtchead, data);
+	return data;
+}
+
+static void
+bios_idxprt_wr(struct nvbios *bios, uint16_t port, uint8_t index, uint8_t data)
+{
+	struct drm_nouveau_private *dev_priv = bios->dev->dev_private;
+	struct drm_device *dev = bios->dev;
+
+	if (!valid_idx_port(bios, port))
+		return;
+
+	/*
+	 * The current head is maintained in the nvbios member  state.crtchead.
+	 * We trap changes to CR44 and update the head variable and hence the
+	 * register set written.
+	 * As CR44 only exists on CRTC0, we update crtchead to head0 in advance
+	 * of the write, and to head1 after the write
+	 */
+	if (port == NV_CIO_CRX__COLOR && index == NV_CIO_CRE_44 &&
+	    data != NV_CIO_CRE_44_HEADB)
+		bios->state.crtchead = 0;
+
+	LOG_OLD_VALUE(bios_idxprt_rd(bios, port, index));
+	BIOSLOG(bios, "	Indexed IO write: Port: 0x%04X, Index: 0x%02X, "
+		      "Head: 0x%02X, Data: 0x%02X\n",
+		port, index, bios->state.crtchead, data);
+
+	if (bios->execute && dev_priv->card_type < NV_50) {
+		still_alive();
+		if (port == NV_VIO_SRX)
+			NVWriteVgaSeq(dev, bios->state.crtchead, index, data);
+		else	/* assume NV_CIO_CRX__COLOR */
+			NVWriteVgaCrtc(dev, bios->state.crtchead, index, data);
+	} else
+	if (bios->execute) {
+		uint32_t data32, shift = (index & 3) << 3;
+
+		still_alive();
+
+		data32  = bios_rd32(bios, NV50_PDISPLAY_VGACRTC(index & ~3));
+		data32 &= ~(0xff << shift);
+		data32 |= (data << shift);
+		bios_wr32(bios, NV50_PDISPLAY_VGACRTC(index & ~3), data32);
+	}
+
+	if (port == NV_CIO_CRX__COLOR &&
+	    index == NV_CIO_CRE_44 && data == NV_CIO_CRE_44_HEADB)
+		bios->state.crtchead = 1;
+}
+
+static uint8_t
+bios_port_rd(struct nvbios *bios, uint16_t port)
+{
+	uint8_t data, head = bios->state.crtchead;
+
+	if (!valid_port(bios, port))
+		return 0;
+
+	data = NVReadPRMVIO(bios->dev, head, NV_PRMVIO0_OFFSET + port);
+
+	BIOSLOG(bios, "	IO read:  Port: 0x%04X, Head: 0x%02X, Data: 0x%02X\n",
+		port, head, data);
+
+	return data;
+}
+
+static void
+bios_port_wr(struct nvbios *bios, uint16_t port, uint8_t data)
+{
+	int head = bios->state.crtchead;
+
+	if (!valid_port(bios, port))
+		return;
+
+	LOG_OLD_VALUE(bios_port_rd(bios, port));
+	BIOSLOG(bios, "	IO write: Port: 0x%04X, Head: 0x%02X, Data: 0x%02X\n",
+		port, head, data);
+
+	if (!bios->execute)
+		return;
+
+	still_alive();
+	NVWritePRMVIO(bios->dev, head, NV_PRMVIO0_OFFSET + port, data);
+}
+
+static bool
+io_flag_condition_met(struct nvbios *bios, uint16_t offset, uint8_t cond)
+{
+	/*
+	 * The IO flag condition entry has 2 bytes for the CRTC port; 1 byte
+	 * for the CRTC index; 1 byte for the mask to apply to the value
+	 * retrieved from the CRTC; 1 byte for the shift right to apply to the
+	 * masked CRTC value; 2 bytes for the offset to the flag array, to
+	 * which the shifted value is added; 1 byte for the mask applied to the
+	 * value read from the flag array; and 1 byte for the value to compare
+	 * against the masked byte from the flag table.
+	 */
+
+	uint16_t condptr = bios->io_flag_condition_tbl_ptr + cond * IO_FLAG_CONDITION_SIZE;
+	uint16_t crtcport = ROM16(bios->data[condptr]);
+	uint8_t crtcindex = bios->data[condptr + 2];
+	uint8_t mask = bios->data[condptr + 3];
+	uint8_t shift = bios->data[condptr + 4];
+	uint16_t flagarray = ROM16(bios->data[condptr + 5]);
+	uint8_t flagarraymask = bios->data[condptr + 7];
+	uint8_t cmpval = bios->data[condptr + 8];
+	uint8_t data;
+
+	BIOSLOG(bios, "0x%04X: Port: 0x%04X, Index: 0x%02X, Mask: 0x%02X, "
+		      "Shift: 0x%02X, FlagArray: 0x%04X, FAMask: 0x%02X, "
+		      "Cmpval: 0x%02X\n",
+		offset, crtcport, crtcindex, mask, shift, flagarray, flagarraymask, cmpval);
+
+	data = bios_idxprt_rd(bios, crtcport, crtcindex);
+
+	data = bios->data[flagarray + ((data & mask) >> shift)];
+	data &= flagarraymask;
+
+	BIOSLOG(bios, "0x%04X: Checking if 0x%02X equals 0x%02X\n",
+		offset, data, cmpval);
+
+	return (data == cmpval);
+}
+
+static bool
+bios_condition_met(struct nvbios *bios, uint16_t offset, uint8_t cond)
+{
+	/*
+	 * The condition table entry has 4 bytes for the address of the
+	 * register to check, 4 bytes for a mask to apply to the register and
+	 * 4 for a test comparison value
+	 */
+
+	uint16_t condptr = bios->condition_tbl_ptr + cond * CONDITION_SIZE;
+	uint32_t reg = ROM32(bios->data[condptr]);
+	uint32_t mask = ROM32(bios->data[condptr + 4]);
+	uint32_t cmpval = ROM32(bios->data[condptr + 8]);
+	uint32_t data;
+
+	BIOSLOG(bios, "0x%04X: Cond: 0x%02X, Reg: 0x%08X, Mask: 0x%08X\n",
+		offset, cond, reg, mask);
+
+	data = bios_rd32(bios, reg) & mask;
+
+	BIOSLOG(bios, "0x%04X: Checking if 0x%08X equals 0x%08X\n",
+		offset, data, cmpval);
+
+	return (data == cmpval);
+}
+
+static bool
+io_condition_met(struct nvbios *bios, uint16_t offset, uint8_t cond)
+{
+	/*
+	 * The IO condition entry has 2 bytes for the IO port address; 1 byte
+	 * for the index to write to io_port; 1 byte for the mask to apply to
+	 * the byte read from io_port+1; and 1 byte for the value to compare
+	 * against the masked byte.
+	 */
+
+	uint16_t condptr = bios->io_condition_tbl_ptr + cond * IO_CONDITION_SIZE;
+	uint16_t io_port = ROM16(bios->data[condptr]);
+	uint8_t port_index = bios->data[condptr + 2];
+	uint8_t mask = bios->data[condptr + 3];
+	uint8_t cmpval = bios->data[condptr + 4];
+
+	uint8_t data = bios_idxprt_rd(bios, io_port, port_index) & mask;
+
+	BIOSLOG(bios, "0x%04X: Checking if 0x%02X equals 0x%02X\n",
+		offset, data, cmpval);
+
+	return (data == cmpval);
+}
+
+static int
+nv50_pll_set(struct drm_device *dev, uint32_t reg, uint32_t clk)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	uint32_t reg0 = nv_rd32(dev, reg + 0);
+	uint32_t reg1 = nv_rd32(dev, reg + 4);
+	struct nouveau_pll_vals pll;
+	struct pll_lims pll_limits;
+	int ret;
+
+	ret = get_pll_limits(dev, reg, &pll_limits);
+	if (ret)
+		return ret;
+
+	clk = nouveau_calc_pll_mnp(dev, &pll_limits, clk, &pll);
+	if (!clk)
+		return -ERANGE;
+
+	reg0 = (reg0 & 0xfff8ffff) | (pll.log2P << 16);
+	reg1 = (reg1 & 0xffff0000) | (pll.N1 << 8) | pll.M1;
+
+	if (dev_priv->VBIOS.execute) {
+		still_alive();
+		nv_wr32(dev, reg + 4, reg1);
+		nv_wr32(dev, reg + 0, reg0);
+	}
+
+	return 0;
+}
+
+static int
+setPLL(struct nvbios *bios, uint32_t reg, uint32_t clk)
+{
+	struct drm_device *dev = bios->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	/* clk in kHz */
+	struct pll_lims pll_lim;
+	struct nouveau_pll_vals pllvals;
+	int ret;
+
+	if (dev_priv->card_type >= NV_50)
+		return nv50_pll_set(dev, reg, clk);
+
+	/* high regs (such as in the mac g5 table) are not -= 4 */
+	ret = get_pll_limits(dev, reg > 0x405c ? reg : reg - 4, &pll_lim);
+	if (ret)
+		return ret;
+
+	clk = nouveau_calc_pll_mnp(dev, &pll_lim, clk, &pllvals);
+	if (!clk)
+		return -ERANGE;
+
+	if (bios->execute) {
+		still_alive();
+		nouveau_hw_setpll(dev, reg, &pllvals);
+	}
+
+	return 0;
+}
+
+static int dcb_entry_idx_from_crtchead(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nvbios *bios = &dev_priv->VBIOS;
+
+	/*
+	 * For the results of this function to be correct, CR44 must have been
+	 * set (using bios_idxprt_wr to set crtchead), CR58 set for CR57 = 0,
+	 * and the DCB table parsed, before the script calling the function is
+	 * run.  run_digital_op_script is example of how to do such setup
+	 */
+
+	uint8_t dcb_entry = NVReadVgaCrtc5758(dev, bios->state.crtchead, 0);
+
+	if (dcb_entry > bios->bdcb.dcb.entries) {
+		NV_ERROR(dev, "CR58 doesn't have a valid DCB entry currently "
+				"(%02X)\n", dcb_entry);
+		dcb_entry = 0x7f;	/* unused / invalid marker */
+	}
+
+	return dcb_entry;
+}
+
+static struct nouveau_i2c_chan *
+init_i2c_device_find(struct drm_device *dev, int i2c_index)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct bios_parsed_dcb *bdcb = &dev_priv->VBIOS.bdcb;
+
+	if (i2c_index == 0xff) {
+		/* note: dcb_entry_idx_from_crtchead needs pre-script set-up */
+		int idx = dcb_entry_idx_from_crtchead(dev), shift = 0;
+		int default_indices = bdcb->i2c_default_indices;
+
+		if (idx != 0x7f && bdcb->dcb.entry[idx].i2c_upper_default)
+			shift = 4;
+
+		i2c_index = (default_indices >> shift) & 0xf;
+	}
+	if (i2c_index == 0x80)	/* g80+ */
+		i2c_index = bdcb->i2c_default_indices & 0xf;
+
+	return nouveau_i2c_find(dev, i2c_index);
+}
+
+static uint32_t get_tmds_index_reg(struct drm_device *dev, uint8_t mlv)
+{
+	/*
+	 * For mlv < 0x80, it is an index into a table of TMDS base addresses.
+	 * For mlv == 0x80 use the "or" value of the dcb_entry indexed by
+	 * CR58 for CR57 = 0 to index a table of offsets to the basic
+	 * 0x6808b0 address.
+	 * For mlv == 0x81 use the "or" value of the dcb_entry indexed by
+	 * CR58 for CR57 = 0 to index a table of offsets to the basic
+	 * 0x6808b0 address, and then flip the offset by 8.
+	 */
+
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	const int pramdac_offset[13] = {
+		0, 0, 0x8, 0, 0x2000, 0, 0, 0, 0x2008, 0, 0, 0, 0x2000 };
+	const uint32_t pramdac_table[4] = {
+		0x6808b0, 0x6808b8, 0x6828b0, 0x6828b8 };
+
+	if (mlv >= 0x80) {
+		int dcb_entry, dacoffset;
+
+		/* note: dcb_entry_idx_from_crtchead needs pre-script set-up */
+		dcb_entry = dcb_entry_idx_from_crtchead(dev);
+		if (dcb_entry == 0x7f)
+			return 0;
+		dacoffset = pramdac_offset[
+				dev_priv->VBIOS.bdcb.dcb.entry[dcb_entry].or];
+		if (mlv == 0x81)
+			dacoffset ^= 8;
+		return 0x6808b0 + dacoffset;
+	} else {
+		if (mlv > ARRAY_SIZE(pramdac_table)) {
+			NV_ERROR(dev, "Magic Lookup Value too big (%02X)\n",
+									mlv);
+			return 0;
+		}
+		return pramdac_table[mlv];
+	}
+}
+
+static int
+init_io_restrict_prog(struct nvbios *bios, uint16_t offset,
+		      struct init_exec *iexec)
+{
+	/*
+	 * INIT_IO_RESTRICT_PROG   opcode: 0x32 ('2')
+	 *
+	 * offset      (8  bit): opcode
+	 * offset + 1  (16 bit): CRTC port
+	 * offset + 3  (8  bit): CRTC index
+	 * offset + 4  (8  bit): mask
+	 * offset + 5  (8  bit): shift
+	 * offset + 6  (8  bit): count
+	 * offset + 7  (32 bit): register
+	 * offset + 11 (32 bit): configuration 1
+	 * ...
+	 *
+	 * Starting at offset + 11 there are "count" 32 bit values.
+	 * To find out which value to use read index "CRTC index" on "CRTC
+	 * port", AND this value with "mask" and then bit shift right "shift"
+	 * bits.  Read the appropriate value using this index and write to
+	 * "register"
+	 */
+
+	uint16_t crtcport = ROM16(bios->data[offset + 1]);
+	uint8_t crtcindex = bios->data[offset + 3];
+	uint8_t mask = bios->data[offset + 4];
+	uint8_t shift = bios->data[offset + 5];
+	uint8_t count = bios->data[offset + 6];
+	uint32_t reg = ROM32(bios->data[offset + 7]);
+	uint8_t config;
+	uint32_t configval;
+	int len = 11 + count * 4;
+
+	if (!iexec->execute)
+		return len;
+
+	BIOSLOG(bios, "0x%04X: Port: 0x%04X, Index: 0x%02X, Mask: 0x%02X, "
+		      "Shift: 0x%02X, Count: 0x%02X, Reg: 0x%08X\n",
+		offset, crtcport, crtcindex, mask, shift, count, reg);
+
+	config = (bios_idxprt_rd(bios, crtcport, crtcindex) & mask) >> shift;
+	if (config > count) {
+		NV_ERROR(bios->dev,
+			 "0x%04X: Config 0x%02X exceeds maximal bound 0x%02X\n",
+			 offset, config, count);
+		return 0;
+	}
+
+	configval = ROM32(bios->data[offset + 11 + config * 4]);
+
+	BIOSLOG(bios, "0x%04X: Writing config %02X\n", offset, config);
+
+	bios_wr32(bios, reg, configval);
+
+	return len;
+}
+
+static int
+init_repeat(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_REPEAT   opcode: 0x33 ('3')
+	 *
+	 * offset      (8 bit): opcode
+	 * offset + 1  (8 bit): count
+	 *
+	 * Execute script following this opcode up to INIT_REPEAT_END
+	 * "count" times
+	 */
+
+	uint8_t count = bios->data[offset + 1];
+	uint8_t i;
+
+	/* no iexec->execute check by design */
+
+	BIOSLOG(bios, "0x%04X: Repeating following segment %d times\n",
+		offset, count);
+
+	iexec->repeat = true;
+
+	/*
+	 * count - 1, as the script block will execute once when we leave this
+	 * opcode -- this is compatible with bios behaviour as:
+	 * a) the block is always executed at least once, even if count == 0
+	 * b) the bios interpreter skips to the op following INIT_END_REPEAT,
+	 * while we don't
+	 */
+	for (i = 0; i < count - 1; i++)
+		parse_init_table(bios, offset + 2, iexec);
+
+	iexec->repeat = false;
+
+	return 2;
+}
+
+static int
+init_io_restrict_pll(struct nvbios *bios, uint16_t offset,
+		     struct init_exec *iexec)
+{
+	/*
+	 * INIT_IO_RESTRICT_PLL   opcode: 0x34 ('4')
+	 *
+	 * offset      (8  bit): opcode
+	 * offset + 1  (16 bit): CRTC port
+	 * offset + 3  (8  bit): CRTC index
+	 * offset + 4  (8  bit): mask
+	 * offset + 5  (8  bit): shift
+	 * offset + 6  (8  bit): IO flag condition index
+	 * offset + 7  (8  bit): count
+	 * offset + 8  (32 bit): register
+	 * offset + 12 (16 bit): frequency 1
+	 * ...
+	 *
+	 * Starting at offset + 12 there are "count" 16 bit frequencies (10kHz).
+	 * Set PLL register "register" to coefficients for frequency n,
+	 * selected by reading index "CRTC index" of "CRTC port" ANDed with
+	 * "mask" and shifted right by "shift".
+	 *
+	 * If "IO flag condition index" > 0, and condition met, double
+	 * frequency before setting it.
+	 */
+
+	uint16_t crtcport = ROM16(bios->data[offset + 1]);
+	uint8_t crtcindex = bios->data[offset + 3];
+	uint8_t mask = bios->data[offset + 4];
+	uint8_t shift = bios->data[offset + 5];
+	int8_t io_flag_condition_idx = bios->data[offset + 6];
+	uint8_t count = bios->data[offset + 7];
+	uint32_t reg = ROM32(bios->data[offset + 8]);
+	uint8_t config;
+	uint16_t freq;
+	int len = 12 + count * 2;
+
+	if (!iexec->execute)
+		return len;
+
+	BIOSLOG(bios, "0x%04X: Port: 0x%04X, Index: 0x%02X, Mask: 0x%02X, "
+		      "Shift: 0x%02X, IO Flag Condition: 0x%02X, "
+		      "Count: 0x%02X, Reg: 0x%08X\n",
+		offset, crtcport, crtcindex, mask, shift,
+		io_flag_condition_idx, count, reg);
+
+	config = (bios_idxprt_rd(bios, crtcport, crtcindex) & mask) >> shift;
+	if (config > count) {
+		NV_ERROR(bios->dev,
+			 "0x%04X: Config 0x%02X exceeds maximal bound 0x%02X\n",
+			 offset, config, count);
+		return 0;
+	}
+
+	freq = ROM16(bios->data[offset + 12 + config * 2]);
+
+	if (io_flag_condition_idx > 0) {
+		if (io_flag_condition_met(bios, offset, io_flag_condition_idx)) {
+			BIOSLOG(bios, "0x%04X: Condition fulfilled -- "
+				      "frequency doubled\n", offset);
+			freq *= 2;
+		} else
+			BIOSLOG(bios, "0x%04X: Condition not fulfilled -- "
+				      "frequency unchanged\n", offset);
+	}
+
+	BIOSLOG(bios, "0x%04X: Reg: 0x%08X, Config: 0x%02X, Freq: %d0kHz\n",
+		offset, reg, config, freq);
+
+	setPLL(bios, reg, freq * 10);
+
+	return len;
+}
+
+static int
+init_end_repeat(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_END_REPEAT   opcode: 0x36 ('6')
+	 *
+	 * offset      (8 bit): opcode
+	 *
+	 * Marks the end of the block for INIT_REPEAT to repeat
+	 */
+
+	/* no iexec->execute check by design */
+
+	/*
+	 * iexec->repeat flag necessary to go past INIT_END_REPEAT opcode when
+	 * we're not in repeat mode
+	 */
+	if (iexec->repeat)
+		return 0;
+
+	return 1;
+}
+
+static int
+init_copy(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_COPY   opcode: 0x37 ('7')
+	 *
+	 * offset      (8  bit): opcode
+	 * offset + 1  (32 bit): register
+	 * offset + 5  (8  bit): shift
+	 * offset + 6  (8  bit): srcmask
+	 * offset + 7  (16 bit): CRTC port
+	 * offset + 9  (8 bit): CRTC index
+	 * offset + 10  (8 bit): mask
+	 *
+	 * Read index "CRTC index" on "CRTC port", AND with "mask", OR with
+	 * (REGVAL("register") >> "shift" & "srcmask") and write-back to CRTC
+	 * port
+	 */
+
+	uint32_t reg = ROM32(bios->data[offset + 1]);
+	uint8_t shift = bios->data[offset + 5];
+	uint8_t srcmask = bios->data[offset + 6];
+	uint16_t crtcport = ROM16(bios->data[offset + 7]);
+	uint8_t crtcindex = bios->data[offset + 9];
+	uint8_t mask = bios->data[offset + 10];
+	uint32_t data;
+	uint8_t crtcdata;
+
+	if (!iexec->execute)
+		return 11;
+
+	BIOSLOG(bios, "0x%04X: Reg: 0x%08X, Shift: 0x%02X, SrcMask: 0x%02X, "
+		      "Port: 0x%04X, Index: 0x%02X, Mask: 0x%02X\n",
+		offset, reg, shift, srcmask, crtcport, crtcindex, mask);
+
+	data = bios_rd32(bios, reg);
+
+	if (shift < 0x80)
+		data >>= shift;
+	else
+		data <<= (0x100 - shift);
+
+	data &= srcmask;
+
+	crtcdata  = bios_idxprt_rd(bios, crtcport, crtcindex) & mask;
+	crtcdata |= (uint8_t)data;
+	bios_idxprt_wr(bios, crtcport, crtcindex, crtcdata);
+
+	return 11;
+}
+
+static int
+init_not(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_NOT   opcode: 0x38 ('8')
+	 *
+	 * offset      (8  bit): opcode
+	 *
+	 * Invert the current execute / no-execute condition (i.e. "else")
+	 */
+	if (iexec->execute)
+		BIOSLOG(bios, "0x%04X: ------ Skipping following commands  ------\n", offset);
+	else
+		BIOSLOG(bios, "0x%04X: ------ Executing following commands ------\n", offset);
+
+	iexec->execute = !iexec->execute;
+	return 1;
+}
+
+static int
+init_io_flag_condition(struct nvbios *bios, uint16_t offset,
+		       struct init_exec *iexec)
+{
+	/*
+	 * INIT_IO_FLAG_CONDITION   opcode: 0x39 ('9')
+	 *
+	 * offset      (8 bit): opcode
+	 * offset + 1  (8 bit): condition number
+	 *
+	 * Check condition "condition number" in the IO flag condition table.
+	 * If condition not met skip subsequent opcodes until condition is
+	 * inverted (INIT_NOT), or we hit INIT_RESUME
+	 */
+
+	uint8_t cond = bios->data[offset + 1];
+
+	if (!iexec->execute)
+		return 2;
+
+	if (io_flag_condition_met(bios, offset, cond))
+		BIOSLOG(bios, "0x%04X: Condition fulfilled -- continuing to execute\n", offset);
+	else {
+		BIOSLOG(bios, "0x%04X: Condition not fulfilled -- skipping following commands\n", offset);
+		iexec->execute = false;
+	}
+
+	return 2;
+}
+
+static int
+init_idx_addr_latched(struct nvbios *bios, uint16_t offset,
+		      struct init_exec *iexec)
+{
+	/*
+	 * INIT_INDEX_ADDRESS_LATCHED   opcode: 0x49 ('I')
+	 *
+	 * offset      (8  bit): opcode
+	 * offset + 1  (32 bit): control register
+	 * offset + 5  (32 bit): data register
+	 * offset + 9  (32 bit): mask
+	 * offset + 13 (32 bit): data
+	 * offset + 17 (8  bit): count
+	 * offset + 18 (8  bit): address 1
+	 * offset + 19 (8  bit): data 1
+	 * ...
+	 *
+	 * For each of "count" address and data pairs, write "data n" to
+	 * "data register", read the current value of "control register",
+	 * and write it back once ANDed with "mask", ORed with "data",
+	 * and ORed with "address n"
+	 */
+
+	uint32_t controlreg = ROM32(bios->data[offset + 1]);
+	uint32_t datareg = ROM32(bios->data[offset + 5]);
+	uint32_t mask = ROM32(bios->data[offset + 9]);
+	uint32_t data = ROM32(bios->data[offset + 13]);
+	uint8_t count = bios->data[offset + 17];
+	int len = 18 + count * 2;
+	uint32_t value;
+	int i;
+
+	if (!iexec->execute)
+		return len;
+
+	BIOSLOG(bios, "0x%04X: ControlReg: 0x%08X, DataReg: 0x%08X, "
+		      "Mask: 0x%08X, Data: 0x%08X, Count: 0x%02X\n",
+		offset, controlreg, datareg, mask, data, count);
+
+	for (i = 0; i < count; i++) {
+		uint8_t instaddress = bios->data[offset + 18 + i * 2];
+		uint8_t instdata = bios->data[offset + 19 + i * 2];
+
+		BIOSLOG(bios, "0x%04X: Address: 0x%02X, Data: 0x%02X\n",
+			offset, instaddress, instdata);
+
+		bios_wr32(bios, datareg, instdata);
+		value  = bios_rd32(bios, controlreg) & mask;
+		value |= data;
+		value |= instaddress;
+		bios_wr32(bios, controlreg, value);
+	}
+
+	return len;
+}
+
+static int
+init_io_restrict_pll2(struct nvbios *bios, uint16_t offset,
+		      struct init_exec *iexec)
+{
+	/*
+	 * INIT_IO_RESTRICT_PLL2   opcode: 0x4A ('J')
+	 *
+	 * offset      (8  bit): opcode
+	 * offset + 1  (16 bit): CRTC port
+	 * offset + 3  (8  bit): CRTC index
+	 * offset + 4  (8  bit): mask
+	 * offset + 5  (8  bit): shift
+	 * offset + 6  (8  bit): count
+	 * offset + 7  (32 bit): register
+	 * offset + 11 (32 bit): frequency 1
+	 * ...
+	 *
+	 * Starting at offset + 11 there are "count" 32 bit frequencies (kHz).
+	 * Set PLL register "register" to coefficients for frequency n,
+	 * selected by reading index "CRTC index" of "CRTC port" ANDed with
+	 * "mask" and shifted right by "shift".
+	 */
+
+	uint16_t crtcport = ROM16(bios->data[offset + 1]);
+	uint8_t crtcindex = bios->data[offset + 3];
+	uint8_t mask = bios->data[offset + 4];
+	uint8_t shift = bios->data[offset + 5];
+	uint8_t count = bios->data[offset + 6];
+	uint32_t reg = ROM32(bios->data[offset + 7]);
+	int len = 11 + count * 4;
+	uint8_t config;
+	uint32_t freq;
+
+	if (!iexec->execute)
+		return len;
+
+	BIOSLOG(bios, "0x%04X: Port: 0x%04X, Index: 0x%02X, Mask: 0x%02X, "
+		      "Shift: 0x%02X, Count: 0x%02X, Reg: 0x%08X\n",
+		offset, crtcport, crtcindex, mask, shift, count, reg);
+
+	if (!reg)
+		return len;
+
+	config = (bios_idxprt_rd(bios, crtcport, crtcindex) & mask) >> shift;
+	if (config > count) {
+		NV_ERROR(bios->dev,
+			 "0x%04X: Config 0x%02X exceeds maximal bound 0x%02X\n",
+			 offset, config, count);
+		return 0;
+	}
+
+	freq = ROM32(bios->data[offset + 11 + config * 4]);
+
+	BIOSLOG(bios, "0x%04X: Reg: 0x%08X, Config: 0x%02X, Freq: %dkHz\n",
+		offset, reg, config, freq);
+
+	setPLL(bios, reg, freq);
+
+	return len;
+}
+
+static int
+init_pll2(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_PLL2   opcode: 0x4B ('K')
+	 *
+	 * offset      (8  bit): opcode
+	 * offset + 1  (32 bit): register
+	 * offset + 5  (32 bit): freq
+	 *
+	 * Set PLL register "register" to coefficients for frequency "freq"
+	 */
+
+	uint32_t reg = ROM32(bios->data[offset + 1]);
+	uint32_t freq = ROM32(bios->data[offset + 5]);
+
+	if (!iexec->execute)
+		return 9;
+
+	BIOSLOG(bios, "0x%04X: Reg: 0x%04X, Freq: %dkHz\n",
+		offset, reg, freq);
+
+	setPLL(bios, reg, freq);
+	return 9;
+}
+
+static int
+init_i2c_byte(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_I2C_BYTE   opcode: 0x4C ('L')
+	 *
+	 * offset      (8 bit): opcode
+	 * offset + 1  (8 bit): DCB I2C table entry index
+	 * offset + 2  (8 bit): I2C slave address
+	 * offset + 3  (8 bit): count
+	 * offset + 4  (8 bit): I2C register 1
+	 * offset + 5  (8 bit): mask 1
+	 * offset + 6  (8 bit): data 1
+	 * ...
+	 *
+	 * For each of "count" registers given by "I2C register n" on the device
+	 * addressed by "I2C slave address" on the I2C bus given by
+	 * "DCB I2C table entry index", read the register, AND the result with
+	 * "mask n" and OR it with "data n" before writing it back to the device
+	 */
+
+	uint8_t i2c_index = bios->data[offset + 1];
+	uint8_t i2c_address = bios->data[offset + 2];
+	uint8_t count = bios->data[offset + 3];
+	int len = 4 + count * 3;
+	struct nouveau_i2c_chan *chan;
+	struct i2c_msg msg;
+	int i;
+
+	if (!iexec->execute)
+		return len;
+
+	BIOSLOG(bios, "0x%04X: DCBI2CIndex: 0x%02X, I2CAddress: 0x%02X, "
+		      "Count: 0x%02X\n",
+		offset, i2c_index, i2c_address, count);
+
+	chan = init_i2c_device_find(bios->dev, i2c_index);
+	if (!chan)
+		return 0;
+
+	for (i = 0; i < count; i++) {
+		uint8_t i2c_reg = bios->data[offset + 4 + i * 3];
+		uint8_t mask = bios->data[offset + 5 + i * 3];
+		uint8_t data = bios->data[offset + 6 + i * 3];
+		uint8_t value;
+
+		msg.addr = i2c_address;
+		msg.flags = I2C_M_RD;
+		msg.len = 1;
+		msg.buf = &value;
+		if (i2c_transfer(&chan->adapter, &msg, 1) != 1)
+			return 0;
+
+		BIOSLOG(bios, "0x%04X: I2CReg: 0x%02X, Value: 0x%02X, "
+			      "Mask: 0x%02X, Data: 0x%02X\n",
+			offset, i2c_reg, value, mask, data);
+
+		value = (value & mask) | data;
+
+		if (bios->execute) {
+			msg.addr = i2c_address;
+			msg.flags = 0;
+			msg.len = 1;
+			msg.buf = &value;
+			if (i2c_transfer(&chan->adapter, &msg, 1) != 1)
+				return 0;
+		}
+	}
+
+	return len;
+}
+
+static int
+init_zm_i2c_byte(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_ZM_I2C_BYTE   opcode: 0x4D ('M')
+	 *
+	 * offset      (8 bit): opcode
+	 * offset + 1  (8 bit): DCB I2C table entry index
+	 * offset + 2  (8 bit): I2C slave address
+	 * offset + 3  (8 bit): count
+	 * offset + 4  (8 bit): I2C register 1
+	 * offset + 5  (8 bit): data 1
+	 * ...
+	 *
+	 * For each of "count" registers given by "I2C register n" on the device
+	 * addressed by "I2C slave address" on the I2C bus given by
+	 * "DCB I2C table entry index", set the register to "data n"
+	 */
+
+	uint8_t i2c_index = bios->data[offset + 1];
+	uint8_t i2c_address = bios->data[offset + 2];
+	uint8_t count = bios->data[offset + 3];
+	int len = 4 + count * 2;
+	struct nouveau_i2c_chan *chan;
+	struct i2c_msg msg;
+	int i;
+
+	if (!iexec->execute)
+		return len;
+
+	BIOSLOG(bios, "0x%04X: DCBI2CIndex: 0x%02X, I2CAddress: 0x%02X, "
+		      "Count: 0x%02X\n",
+		offset, i2c_index, i2c_address, count);
+
+	chan = init_i2c_device_find(bios->dev, i2c_index);
+	if (!chan)
+		return 0;
+
+	for (i = 0; i < count; i++) {
+		uint8_t i2c_reg = bios->data[offset + 4 + i * 2];
+		uint8_t data = bios->data[offset + 5 + i * 2];
+
+		BIOSLOG(bios, "0x%04X: I2CReg: 0x%02X, Data: 0x%02X\n",
+			offset, i2c_reg, data);
+
+		if (bios->execute) {
+			msg.addr = i2c_address;
+			msg.flags = 0;
+			msg.len = 1;
+			msg.buf = &data;
+			if (i2c_transfer(&chan->adapter, &msg, 1) != 1)
+				return 0;
+		}
+	}
+
+	return len;
+}
+
+static int
+init_zm_i2c(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_ZM_I2C   opcode: 0x4E ('N')
+	 *
+	 * offset      (8 bit): opcode
+	 * offset + 1  (8 bit): DCB I2C table entry index
+	 * offset + 2  (8 bit): I2C slave address
+	 * offset + 3  (8 bit): count
+	 * offset + 4  (8 bit): data 1
+	 * ...
+	 *
+	 * Send "count" bytes ("data n") to the device addressed by "I2C slave
+	 * address" on the I2C bus given by "DCB I2C table entry index"
+	 */
+
+	uint8_t i2c_index = bios->data[offset + 1];
+	uint8_t i2c_address = bios->data[offset + 2];
+	uint8_t count = bios->data[offset + 3];
+	int len = 4 + count;
+	struct nouveau_i2c_chan *chan;
+	struct i2c_msg msg;
+	uint8_t data[256];
+	int i;
+
+	if (!iexec->execute)
+		return len;
+
+	BIOSLOG(bios, "0x%04X: DCBI2CIndex: 0x%02X, I2CAddress: 0x%02X, "
+		      "Count: 0x%02X\n",
+		offset, i2c_index, i2c_address, count);
+
+	chan = init_i2c_device_find(bios->dev, i2c_index);
+	if (!chan)
+		return 0;
+
+	for (i = 0; i < count; i++) {
+		data[i] = bios->data[offset + 4 + i];
+
+		BIOSLOG(bios, "0x%04X: Data: 0x%02X\n", offset, data[i]);
+	}
+
+	if (bios->execute) {
+		msg.addr = i2c_address;
+		msg.flags = 0;
+		msg.len = count;
+		msg.buf = data;
+		if (i2c_transfer(&chan->adapter, &msg, 1) != 1)
+			return 0;
+	}
+
+	return len;
+}
+
+static int
+init_tmds(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_TMDS   opcode: 0x4F ('O')	(non-canon name)
+	 *
+	 * offset      (8 bit): opcode
+	 * offset + 1  (8 bit): magic lookup value
+	 * offset + 2  (8 bit): TMDS address
+	 * offset + 3  (8 bit): mask
+	 * offset + 4  (8 bit): data
+	 *
+	 * Read the data reg for TMDS address "TMDS address", AND it with mask
+	 * and OR it with data, then write it back
+	 * "magic lookup value" determines which TMDS base address register is
+	 * used -- see get_tmds_index_reg()
+	 */
+
+	uint8_t mlv = bios->data[offset + 1];
+	uint32_t tmdsaddr = bios->data[offset + 2];
+	uint8_t mask = bios->data[offset + 3];
+	uint8_t data = bios->data[offset + 4];
+	uint32_t reg, value;
+
+	if (!iexec->execute)
+		return 5;
+
+	BIOSLOG(bios, "0x%04X: MagicLookupValue: 0x%02X, TMDSAddr: 0x%02X, "
+		      "Mask: 0x%02X, Data: 0x%02X\n",
+		offset, mlv, tmdsaddr, mask, data);
+
+	reg = get_tmds_index_reg(bios->dev, mlv);
+	if (!reg)
+		return 0;
+
+	bios_wr32(bios, reg,
+		  tmdsaddr | NV_PRAMDAC_FP_TMDS_CONTROL_WRITE_DISABLE);
+	value = (bios_rd32(bios, reg + 4) & mask) | data;
+	bios_wr32(bios, reg + 4, value);
+	bios_wr32(bios, reg, tmdsaddr);
+
+	return 5;
+}
+
+static int
+init_zm_tmds_group(struct nvbios *bios, uint16_t offset,
+		   struct init_exec *iexec)
+{
+	/*
+	 * INIT_ZM_TMDS_GROUP   opcode: 0x50 ('P')	(non-canon name)
+	 *
+	 * offset      (8 bit): opcode
+	 * offset + 1  (8 bit): magic lookup value
+	 * offset + 2  (8 bit): count
+	 * offset + 3  (8 bit): addr 1
+	 * offset + 4  (8 bit): data 1
+	 * ...
+	 *
+	 * For each of "count" TMDS address and data pairs write "data n" to
+	 * "addr n".  "magic lookup value" determines which TMDS base address
+	 * register is used -- see get_tmds_index_reg()
+	 */
+
+	uint8_t mlv = bios->data[offset + 1];
+	uint8_t count = bios->data[offset + 2];
+	int len = 3 + count * 2;
+	uint32_t reg;
+	int i;
+
+	if (!iexec->execute)
+		return len;
+
+	BIOSLOG(bios, "0x%04X: MagicLookupValue: 0x%02X, Count: 0x%02X\n",
+		offset, mlv, count);
+
+	reg = get_tmds_index_reg(bios->dev, mlv);
+	if (!reg)
+		return 0;
+
+	for (i = 0; i < count; i++) {
+		uint8_t tmdsaddr = bios->data[offset + 3 + i * 2];
+		uint8_t tmdsdata = bios->data[offset + 4 + i * 2];
+
+		bios_wr32(bios, reg + 4, tmdsdata);
+		bios_wr32(bios, reg, tmdsaddr);
+	}
+
+	return len;
+}
+
+static int
+init_cr_idx_adr_latch(struct nvbios *bios, uint16_t offset,
+		      struct init_exec *iexec)
+{
+	/*
+	 * INIT_CR_INDEX_ADDRESS_LATCHED   opcode: 0x51 ('Q')
+	 *
+	 * offset      (8 bit): opcode
+	 * offset + 1  (8 bit): CRTC index1
+	 * offset + 2  (8 bit): CRTC index2
+	 * offset + 3  (8 bit): baseaddr
+	 * offset + 4  (8 bit): count
+	 * offset + 5  (8 bit): data 1
+	 * ...
+	 *
+	 * For each of "count" address and data pairs, write "baseaddr + n" to
+	 * "CRTC index1" and "data n" to "CRTC index2"
+	 * Once complete, restore initial value read from "CRTC index1"
+	 */
+	uint8_t crtcindex1 = bios->data[offset + 1];
+	uint8_t crtcindex2 = bios->data[offset + 2];
+	uint8_t baseaddr = bios->data[offset + 3];
+	uint8_t count = bios->data[offset + 4];
+	int len = 5 + count;
+	uint8_t oldaddr, data;
+	int i;
+
+	if (!iexec->execute)
+		return len;
+
+	BIOSLOG(bios, "0x%04X: Index1: 0x%02X, Index2: 0x%02X, "
+		      "BaseAddr: 0x%02X, Count: 0x%02X\n",
+		offset, crtcindex1, crtcindex2, baseaddr, count);
+
+	oldaddr = bios_idxprt_rd(bios, NV_CIO_CRX__COLOR, crtcindex1);
+
+	for (i = 0; i < count; i++) {
+		bios_idxprt_wr(bios, NV_CIO_CRX__COLOR, crtcindex1,
+				     baseaddr + i);
+		data = bios->data[offset + 5 + i];
+		bios_idxprt_wr(bios, NV_CIO_CRX__COLOR, crtcindex2, data);
+	}
+
+	bios_idxprt_wr(bios, NV_CIO_CRX__COLOR, crtcindex1, oldaddr);
+
+	return len;
+}
+
+static int
+init_cr(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_CR   opcode: 0x52 ('R')
+	 *
+	 * offset      (8  bit): opcode
+	 * offset + 1  (8  bit): CRTC index
+	 * offset + 2  (8  bit): mask
+	 * offset + 3  (8  bit): data
+	 *
+	 * Assign the value of at "CRTC index" ANDed with mask and ORed with
+	 * data back to "CRTC index"
+	 */
+
+	uint8_t crtcindex = bios->data[offset + 1];
+	uint8_t mask = bios->data[offset + 2];
+	uint8_t data = bios->data[offset + 3];
+	uint8_t value;
+
+	if (!iexec->execute)
+		return 4;
+
+	BIOSLOG(bios, "0x%04X: Index: 0x%02X, Mask: 0x%02X, Data: 0x%02X\n",
+		offset, crtcindex, mask, data);
+
+	value  = bios_idxprt_rd(bios, NV_CIO_CRX__COLOR, crtcindex) & mask;
+	value |= data;
+	bios_idxprt_wr(bios, NV_CIO_CRX__COLOR, crtcindex, value);
+
+	return 4;
+}
+
+static int
+init_zm_cr(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_ZM_CR   opcode: 0x53 ('S')
+	 *
+	 * offset      (8 bit): opcode
+	 * offset + 1  (8 bit): CRTC index
+	 * offset + 2  (8 bit): value
+	 *
+	 * Assign "value" to CRTC register with index "CRTC index".
+	 */
+
+	uint8_t crtcindex = ROM32(bios->data[offset + 1]);
+	uint8_t data = bios->data[offset + 2];
+
+	if (!iexec->execute)
+		return 3;
+
+	bios_idxprt_wr(bios, NV_CIO_CRX__COLOR, crtcindex, data);
+
+	return 3;
+}
+
+static int
+init_zm_cr_group(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_ZM_CR_GROUP   opcode: 0x54 ('T')
+	 *
+	 * offset      (8 bit): opcode
+	 * offset + 1  (8 bit): count
+	 * offset + 2  (8 bit): CRTC index 1
+	 * offset + 3  (8 bit): value 1
+	 * ...
+	 *
+	 * For "count", assign "value n" to CRTC register with index
+	 * "CRTC index n".
+	 */
+
+	uint8_t count = bios->data[offset + 1];
+	int len = 2 + count * 2;
+	int i;
+
+	if (!iexec->execute)
+		return len;
+
+	for (i = 0; i < count; i++)
+		init_zm_cr(bios, offset + 2 + 2 * i - 1, iexec);
+
+	return len;
+}
+
+static int
+init_condition_time(struct nvbios *bios, uint16_t offset,
+		    struct init_exec *iexec)
+{
+	/*
+	 * INIT_CONDITION_TIME   opcode: 0x56 ('V')
+	 *
+	 * offset      (8 bit): opcode
+	 * offset + 1  (8 bit): condition number
+	 * offset + 2  (8 bit): retries / 50
+	 *
+	 * Check condition "condition number" in the condition table.
+	 * Bios code then sleeps for 2ms if the condition is not met, and
+	 * repeats up to "retries" times, but on one C51 this has proved
+	 * insufficient.  In mmiotraces the driver sleeps for 20ms, so we do
+	 * this, and bail after "retries" times, or 2s, whichever is less.
+	 * If still not met after retries, clear execution flag for this table.
+	 */
+
+	uint8_t cond = bios->data[offset + 1];
+	uint16_t retries = bios->data[offset + 2] * 50;
+	unsigned cnt;
+
+	if (!iexec->execute)
+		return 3;
+
+	if (retries > 100)
+		retries = 100;
+
+	BIOSLOG(bios, "0x%04X: Condition: 0x%02X, Retries: 0x%02X\n",
+		offset, cond, retries);
+
+	if (!bios->execute) /* avoid 2s delays when "faking" execution */
+		retries = 1;
+
+	for (cnt = 0; cnt < retries; cnt++) {
+		if (bios_condition_met(bios, offset, cond)) {
+			BIOSLOG(bios, "0x%04X: Condition met, continuing\n",
+								offset);
+			break;
+		} else {
+			BIOSLOG(bios, "0x%04X: "
+				"Condition not met, sleeping for 20ms\n",
+								offset);
+			msleep(20);
+		}
+	}
+
+	if (!bios_condition_met(bios, offset, cond)) {
+		NV_WARN(bios->dev,
+			"0x%04X: Condition still not met after %dms, "
+			"skipping following opcodes\n", offset, 20 * retries);
+		iexec->execute = false;
+	}
+
+	return 3;
+}
+
+static int
+init_zm_reg_sequence(struct nvbios *bios, uint16_t offset,
+		     struct init_exec *iexec)
+{
+	/*
+	 * INIT_ZM_REG_SEQUENCE   opcode: 0x58 ('X')
+	 *
+	 * offset      (8  bit): opcode
+	 * offset + 1  (32 bit): base register
+	 * offset + 5  (8  bit): count
+	 * offset + 6  (32 bit): value 1
+	 * ...
+	 *
+	 * Starting at offset + 6 there are "count" 32 bit values.
+	 * For "count" iterations set "base register" + 4 * current_iteration
+	 * to "value current_iteration"
+	 */
+
+	uint32_t basereg = ROM32(bios->data[offset + 1]);
+	uint32_t count = bios->data[offset + 5];
+	int len = 6 + count * 4;
+	int i;
+
+	if (!iexec->execute)
+		return len;
+
+	BIOSLOG(bios, "0x%04X: BaseReg: 0x%08X, Count: 0x%02X\n",
+		offset, basereg, count);
+
+	for (i = 0; i < count; i++) {
+		uint32_t reg = basereg + i * 4;
+		uint32_t data = ROM32(bios->data[offset + 6 + i * 4]);
+
+		bios_wr32(bios, reg, data);
+	}
+
+	return len;
+}
+
+static int
+init_sub_direct(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_SUB_DIRECT   opcode: 0x5B ('[')
+	 *
+	 * offset      (8  bit): opcode
+	 * offset + 1  (16 bit): subroutine offset (in bios)
+	 *
+	 * Calls a subroutine that will execute commands until INIT_DONE
+	 * is found.
+	 */
+
+	uint16_t sub_offset = ROM16(bios->data[offset + 1]);
+
+	if (!iexec->execute)
+		return 3;
+
+	BIOSLOG(bios, "0x%04X: Executing subroutine at 0x%04X\n",
+		offset, sub_offset);
+
+	parse_init_table(bios, sub_offset, iexec);
+
+	BIOSLOG(bios, "0x%04X: End of 0x%04X subroutine\n", offset, sub_offset);
+
+	return 3;
+}
+
+static int
+init_copy_nv_reg(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_COPY_NV_REG   opcode: 0x5F ('_')
+	 *
+	 * offset      (8  bit): opcode
+	 * offset + 1  (32 bit): src reg
+	 * offset + 5  (8  bit): shift
+	 * offset + 6  (32 bit): src mask
+	 * offset + 10 (32 bit): xor
+	 * offset + 14 (32 bit): dst reg
+	 * offset + 18 (32 bit): dst mask
+	 *
+	 * Shift REGVAL("src reg") right by (signed) "shift", AND result with
+	 * "src mask", then XOR with "xor". Write this OR'd with
+	 * (REGVAL("dst reg") AND'd with "dst mask") to "dst reg"
+	 */
+
+	uint32_t srcreg = *((uint32_t *)(&bios->data[offset + 1]));
+	uint8_t shift = bios->data[offset + 5];
+	uint32_t srcmask = *((uint32_t *)(&bios->data[offset + 6]));
+	uint32_t xor = *((uint32_t *)(&bios->data[offset + 10]));
+	uint32_t dstreg = *((uint32_t *)(&bios->data[offset + 14]));
+	uint32_t dstmask = *((uint32_t *)(&bios->data[offset + 18]));
+	uint32_t srcvalue, dstvalue;
+
+	if (!iexec->execute)
+		return 22;
+
+	BIOSLOG(bios, "0x%04X: SrcReg: 0x%08X, Shift: 0x%02X, SrcMask: 0x%08X, "
+		      "Xor: 0x%08X, DstReg: 0x%08X, DstMask: 0x%08X\n",
+		offset, srcreg, shift, srcmask, xor, dstreg, dstmask);
+
+	srcvalue = bios_rd32(bios, srcreg);
+
+	if (shift < 0x80)
+		srcvalue >>= shift;
+	else
+		srcvalue <<= (0x100 - shift);
+
+	srcvalue = (srcvalue & srcmask) ^ xor;
+
+	dstvalue = bios_rd32(bios, dstreg) & dstmask;
+
+	bios_wr32(bios, dstreg, dstvalue | srcvalue);
+
+	return 22;
+}
+
+static int
+init_zm_index_io(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_ZM_INDEX_IO   opcode: 0x62 ('b')
+	 *
+	 * offset      (8  bit): opcode
+	 * offset + 1  (16 bit): CRTC port
+	 * offset + 3  (8  bit): CRTC index
+	 * offset + 4  (8  bit): data
+	 *
+	 * Write "data" to index "CRTC index" of "CRTC port"
+	 */
+	uint16_t crtcport = ROM16(bios->data[offset + 1]);
+	uint8_t crtcindex = bios->data[offset + 3];
+	uint8_t data = bios->data[offset + 4];
+
+	if (!iexec->execute)
+		return 5;
+
+	bios_idxprt_wr(bios, crtcport, crtcindex, data);
+
+	return 5;
+}
+
+static int
+init_compute_mem(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_COMPUTE_MEM   opcode: 0x63 ('c')
+	 *
+	 * offset      (8 bit): opcode
+	 *
+	 * This opcode is meant to set NV_PFB_CFG0 (0x100200) appropriately so
+	 * that the hardware can correctly calculate how much VRAM it has
+	 * (and subsequently report that value in NV_PFB_CSTATUS (0x10020C))
+	 *
+	 * The implementation of this opcode in general consists of two parts:
+	 * 1) determination of the memory bus width
+	 * 2) determination of how many of the card's RAM pads have ICs attached
+	 *
+	 * 1) is done by a cunning combination of writes to offsets 0x1c and
+	 * 0x3c in the framebuffer, and seeing whether the written values are
+	 * read back correctly. This then affects bits 4-7 of NV_PFB_CFG0
+	 *
+	 * 2) is done by a cunning combination of writes to an offset slightly
+	 * less than the maximum memory reported by NV_PFB_CSTATUS, then seeing
+	 * if the test pattern can be read back. This then affects bits 12-15 of
+	 * NV_PFB_CFG0
+	 *
+	 * In this context a "cunning combination" may include multiple reads
+	 * and writes to varying locations, often alternating the test pattern
+	 * and 0, doubtless to make sure buffers are filled, residual charges
+	 * on tracks are removed etc.
+	 *
+	 * Unfortunately, the "cunning combination"s mentioned above, and the
+	 * changes to the bits in NV_PFB_CFG0 differ with nearly every bios
+	 * trace I have.
+	 *
+	 * Therefore, we cheat and assume the value of NV_PFB_CFG0 with which
+	 * we started was correct, and use that instead
+	 */
+
+	/* no iexec->execute check by design */
+
+	/*
+	 * This appears to be a NOP on G8x chipsets, both io logs of the VBIOS
+	 * and kmmio traces of the binary driver POSTing the card show nothing
+	 * being done for this opcode.  why is it still listed in the table?!
+	 */
+
+	struct drm_nouveau_private *dev_priv = bios->dev->dev_private;
+
+	if (dev_priv->card_type >= NV_40)
+		return 1;
+
+	/*
+	 * On every card I've seen, this step gets done for us earlier in
+	 * the init scripts
+	uint8_t crdata = bios_idxprt_rd(dev, NV_VIO_SRX, 0x01);
+	bios_idxprt_wr(dev, NV_VIO_SRX, 0x01, crdata | 0x20);
+	 */
+
+	/*
+	 * This also has probably been done in the scripts, but an mmio trace of
+	 * s3 resume shows nvidia doing it anyway (unlike the NV_VIO_SRX write)
+	 */
+	bios_wr32(bios, NV_PFB_REFCTRL, NV_PFB_REFCTRL_VALID_1);
+
+	/* write back the saved configuration value */
+	bios_wr32(bios, NV_PFB_CFG0, bios->state.saved_nv_pfb_cfg0);
+
+	return 1;
+}
+
+static int
+init_reset(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_RESET   opcode: 0x65 ('e')
+	 *
+	 * offset      (8  bit): opcode
+	 * offset + 1  (32 bit): register
+	 * offset + 5  (32 bit): value1
+	 * offset + 9  (32 bit): value2
+	 *
+	 * Assign "value1" to "register", then assign "value2" to "register"
+	 */
+
+	uint32_t reg = ROM32(bios->data[offset + 1]);
+	uint32_t value1 = ROM32(bios->data[offset + 5]);
+	uint32_t value2 = ROM32(bios->data[offset + 9]);
+	uint32_t pci_nv_19, pci_nv_20;
+
+	/* no iexec->execute check by design */
+
+	pci_nv_19 = bios_rd32(bios, NV_PBUS_PCI_NV_19);
+	bios_wr32(bios, NV_PBUS_PCI_NV_19, 0);
+	bios_wr32(bios, reg, value1);
+
+	udelay(10);
+
+	bios_wr32(bios, reg, value2);
+	bios_wr32(bios, NV_PBUS_PCI_NV_19, pci_nv_19);
+
+	pci_nv_20 = bios_rd32(bios, NV_PBUS_PCI_NV_20);
+	pci_nv_20 &= ~NV_PBUS_PCI_NV_20_ROM_SHADOW_ENABLED;	/* 0xfffffffe */
+	bios_wr32(bios, NV_PBUS_PCI_NV_20, pci_nv_20);
+
+	return 13;
+}
+
+static int
+init_configure_mem(struct nvbios *bios, uint16_t offset,
+		   struct init_exec *iexec)
+{
+	/*
+	 * INIT_CONFIGURE_MEM   opcode: 0x66 ('f')
+	 *
+	 * offset      (8 bit): opcode
+	 *
+	 * Equivalent to INIT_DONE on bios version 3 or greater.
+	 * For early bios versions, sets up the memory registers, using values
+	 * taken from the memory init table
+	 */
+
+	/* no iexec->execute check by design */
+
+	uint16_t meminitoffs = bios->legacy.mem_init_tbl_ptr + MEM_INIT_SIZE * (bios_idxprt_rd(bios, NV_CIO_CRX__COLOR, NV_CIO_CRE_SCRATCH4__INDEX) >> 4);
+	uint16_t seqtbloffs = bios->legacy.sdr_seq_tbl_ptr, meminitdata = meminitoffs + 6;
+	uint32_t reg, data;
+
+	if (bios->major_version > 2)
+		return 0;
+
+	bios_idxprt_wr(bios, NV_VIO_SRX, NV_VIO_SR_CLOCK_INDEX, bios_idxprt_rd(
+		       bios, NV_VIO_SRX, NV_VIO_SR_CLOCK_INDEX) | 0x20);
+
+	if (bios->data[meminitoffs] & 1)
+		seqtbloffs = bios->legacy.ddr_seq_tbl_ptr;
+
+	for (reg = ROM32(bios->data[seqtbloffs]);
+	     reg != 0xffffffff;
+	     reg = ROM32(bios->data[seqtbloffs += 4])) {
+
+		switch (reg) {
+		case NV_PFB_PRE:
+			data = NV_PFB_PRE_CMD_PRECHARGE;
+			break;
+		case NV_PFB_PAD:
+			data = NV_PFB_PAD_CKE_NORMAL;
+			break;
+		case NV_PFB_REF:
+			data = NV_PFB_REF_CMD_REFRESH;
+			break;
+		default:
+			data = ROM32(bios->data[meminitdata]);
+			meminitdata += 4;
+			if (data == 0xffffffff)
+				continue;
+		}
+
+		bios_wr32(bios, reg, data);
+	}
+
+	return 1;
+}
+
+static int
+init_configure_clk(struct nvbios *bios, uint16_t offset,
+		   struct init_exec *iexec)
+{
+	/*
+	 * INIT_CONFIGURE_CLK   opcode: 0x67 ('g')
+	 *
+	 * offset      (8 bit): opcode
+	 *
+	 * Equivalent to INIT_DONE on bios version 3 or greater.
+	 * For early bios versions, sets up the NVClk and MClk PLLs, using
+	 * values taken from the memory init table
+	 */
+
+	/* no iexec->execute check by design */
+
+	uint16_t meminitoffs = bios->legacy.mem_init_tbl_ptr + MEM_INIT_SIZE * (bios_idxprt_rd(bios, NV_CIO_CRX__COLOR, NV_CIO_CRE_SCRATCH4__INDEX) >> 4);
+	int clock;
+
+	if (bios->major_version > 2)
+		return 0;
+
+	clock = ROM16(bios->data[meminitoffs + 4]) * 10;
+	setPLL(bios, NV_PRAMDAC_NVPLL_COEFF, clock);
+
+	clock = ROM16(bios->data[meminitoffs + 2]) * 10;
+	if (bios->data[meminitoffs] & 1) /* DDR */
+		clock *= 2;
+	setPLL(bios, NV_PRAMDAC_MPLL_COEFF, clock);
+
+	return 1;
+}
+
+static int
+init_configure_preinit(struct nvbios *bios, uint16_t offset,
+		       struct init_exec *iexec)
+{
+	/*
+	 * INIT_CONFIGURE_PREINIT   opcode: 0x68 ('h')
+	 *
+	 * offset      (8 bit): opcode
+	 *
+	 * Equivalent to INIT_DONE on bios version 3 or greater.
+	 * For early bios versions, does early init, loading ram and crystal
+	 * configuration from straps into CR3C
+	 */
+
+	/* no iexec->execute check by design */
+
+	uint32_t straps = bios_rd32(bios, NV_PEXTDEV_BOOT_0);
+	uint8_t cr3c = ((straps << 2) & 0xf0) | (straps & (1 << 6));
+
+	if (bios->major_version > 2)
+		return 0;
+
+	bios_idxprt_wr(bios, NV_CIO_CRX__COLOR,
+			     NV_CIO_CRE_SCRATCH4__INDEX, cr3c);
+
+	return 1;
+}
+
+static int
+init_io(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_IO   opcode: 0x69 ('i')
+	 *
+	 * offset      (8  bit): opcode
+	 * offset + 1  (16 bit): CRTC port
+	 * offset + 3  (8  bit): mask
+	 * offset + 4  (8  bit): data
+	 *
+	 * Assign ((IOVAL("crtc port") & "mask") | "data") to "crtc port"
+	 */
+
+	struct drm_nouveau_private *dev_priv = bios->dev->dev_private;
+	uint16_t crtcport = ROM16(bios->data[offset + 1]);
+	uint8_t mask = bios->data[offset + 3];
+	uint8_t data = bios->data[offset + 4];
+
+	if (!iexec->execute)
+		return 5;
+
+	BIOSLOG(bios, "0x%04X: Port: 0x%04X, Mask: 0x%02X, Data: 0x%02X\n",
+		offset, crtcport, mask, data);
+
+	/*
+	 * I have no idea what this does, but NVIDIA do this magic sequence
+	 * in the places where this INIT_IO happens..
+	 */
+	if (dev_priv->card_type >= NV_50 && crtcport == 0x3c3 && data == 1) {
+		int i;
+
+		bios_wr32(bios, 0x614100, (bios_rd32(
+			  bios, 0x614100) & 0x0fffffff) | 0x00800000);
+
+		bios_wr32(bios, 0x00e18c, bios_rd32(
+			  bios, 0x00e18c) | 0x00020000);
+
+		bios_wr32(bios, 0x614900, (bios_rd32(
+			  bios, 0x614900) & 0x0fffffff) | 0x00800000);
+
+		bios_wr32(bios, 0x000200, bios_rd32(
+			  bios, 0x000200) & ~0x40000000);
+
+		mdelay(10);
+
+		bios_wr32(bios, 0x00e18c, bios_rd32(
+			  bios, 0x00e18c) & ~0x00020000);
+
+		bios_wr32(bios, 0x000200, bios_rd32(
+			  bios, 0x000200) | 0x40000000);
+
+		bios_wr32(bios, 0x614100, 0x00800018);
+		bios_wr32(bios, 0x614900, 0x00800018);
+
+		mdelay(10);
+
+		bios_wr32(bios, 0x614100, 0x10000018);
+		bios_wr32(bios, 0x614900, 0x10000018);
+
+		for (i = 0; i < 3; i++)
+			bios_wr32(bios, 0x614280 + (i*0x800), bios_rd32(
+				  bios, 0x614280 + (i*0x800)) & 0xf0f0f0f0);
+
+		for (i = 0; i < 2; i++)
+			bios_wr32(bios, 0x614300 + (i*0x800), bios_rd32(
+				  bios, 0x614300 + (i*0x800)) & 0xfffff0f0);
+
+		for (i = 0; i < 3; i++)
+			bios_wr32(bios, 0x614380 + (i*0x800), bios_rd32(
+				  bios, 0x614380 + (i*0x800)) & 0xfffff0f0);
+
+		for (i = 0; i < 2; i++)
+			bios_wr32(bios, 0x614200 + (i*0x800), bios_rd32(
+				  bios, 0x614200 + (i*0x800)) & 0xfffffff0);
+
+		for (i = 0; i < 2; i++)
+			bios_wr32(bios, 0x614108 + (i*0x800), bios_rd32(
+				  bios, 0x614108 + (i*0x800)) & 0x0fffffff);
+		return 5;
+	}
+
+	bios_port_wr(bios, crtcport, (bios_port_rd(bios, crtcport) & mask) |
+									data);
+	return 5;
+}
+
+static int
+init_sub(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_SUB   opcode: 0x6B ('k')
+	 *
+	 * offset      (8 bit): opcode
+	 * offset + 1  (8 bit): script number
+	 *
+	 * Execute script number "script number", as a subroutine
+	 */
+
+	uint8_t sub = bios->data[offset + 1];
+
+	if (!iexec->execute)
+		return 2;
+
+	BIOSLOG(bios, "0x%04X: Calling script %d\n", offset, sub);
+
+	parse_init_table(bios,
+			 ROM16(bios->data[bios->init_script_tbls_ptr + sub * 2]),
+			 iexec);
+
+	BIOSLOG(bios, "0x%04X: End of script %d\n", offset, sub);
+
+	return 2;
+}
+
+static int
+init_ram_condition(struct nvbios *bios, uint16_t offset,
+		   struct init_exec *iexec)
+{
+	/*
+	 * INIT_RAM_CONDITION   opcode: 0x6D ('m')
+	 *
+	 * offset      (8 bit): opcode
+	 * offset + 1  (8 bit): mask
+	 * offset + 2  (8 bit): cmpval
+	 *
+	 * Test if (NV_PFB_BOOT_0 & "mask") equals "cmpval".
+	 * If condition not met skip subsequent opcodes until condition is
+	 * inverted (INIT_NOT), or we hit INIT_RESUME
+	 */
+
+	uint8_t mask = bios->data[offset + 1];
+	uint8_t cmpval = bios->data[offset + 2];
+	uint8_t data;
+
+	if (!iexec->execute)
+		return 3;
+
+	data = bios_rd32(bios, NV_PFB_BOOT_0) & mask;
+
+	BIOSLOG(bios, "0x%04X: Checking if 0x%08X equals 0x%08X\n",
+		offset, data, cmpval);
+
+	if (data == cmpval)
+		BIOSLOG(bios, "0x%04X: Condition fulfilled -- continuing to execute\n", offset);
+	else {
+		BIOSLOG(bios, "0x%04X: Condition not fulfilled -- skipping following commands\n", offset);
+		iexec->execute = false;
+	}
+
+	return 3;
+}
+
+static int
+init_nv_reg(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_NV_REG   opcode: 0x6E ('n')
+	 *
+	 * offset      (8  bit): opcode
+	 * offset + 1  (32 bit): register
+	 * offset + 5  (32 bit): mask
+	 * offset + 9  (32 bit): data
+	 *
+	 * Assign ((REGVAL("register") & "mask") | "data") to "register"
+	 */
+
+	uint32_t reg = ROM32(bios->data[offset + 1]);
+	uint32_t mask = ROM32(bios->data[offset + 5]);
+	uint32_t data = ROM32(bios->data[offset + 9]);
+
+	if (!iexec->execute)
+		return 13;
+
+	BIOSLOG(bios, "0x%04X: Reg: 0x%08X, Mask: 0x%08X, Data: 0x%08X\n",
+		offset, reg, mask, data);
+
+	bios_wr32(bios, reg, (bios_rd32(bios, reg) & mask) | data);
+
+	return 13;
+}
+
+static int
+init_macro(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_MACRO   opcode: 0x6F ('o')
+	 *
+	 * offset      (8 bit): opcode
+	 * offset + 1  (8 bit): macro number
+	 *
+	 * Look up macro index "macro number" in the macro index table.
+	 * The macro index table entry has 1 byte for the index in the macro
+	 * table, and 1 byte for the number of times to repeat the macro.
+	 * The macro table entry has 4 bytes for the register address and
+	 * 4 bytes for the value to write to that register
+	 */
+
+	uint8_t macro_index_tbl_idx = bios->data[offset + 1];
+	uint16_t tmp = bios->macro_index_tbl_ptr + (macro_index_tbl_idx * MACRO_INDEX_SIZE);
+	uint8_t macro_tbl_idx = bios->data[tmp];
+	uint8_t count = bios->data[tmp + 1];
+	uint32_t reg, data;
+	int i;
+
+	if (!iexec->execute)
+		return 2;
+
+	BIOSLOG(bios, "0x%04X: Macro: 0x%02X, MacroTableIndex: 0x%02X, "
+		      "Count: 0x%02X\n",
+		offset, macro_index_tbl_idx, macro_tbl_idx, count);
+
+	for (i = 0; i < count; i++) {
+		uint16_t macroentryptr = bios->macro_tbl_ptr + (macro_tbl_idx + i) * MACRO_SIZE;
+
+		reg = ROM32(bios->data[macroentryptr]);
+		data = ROM32(bios->data[macroentryptr + 4]);
+
+		bios_wr32(bios, reg, data);
+	}
+
+	return 2;
+}
+
+static int
+init_done(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_DONE   opcode: 0x71 ('q')
+	 *
+	 * offset      (8  bit): opcode
+	 *
+	 * End the current script
+	 */
+
+	/* mild retval abuse to stop parsing this table */
+	return 0;
+}
+
+static int
+init_resume(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_RESUME   opcode: 0x72 ('r')
+	 *
+	 * offset      (8  bit): opcode
+	 *
+	 * End the current execute / no-execute condition
+	 */
+
+	if (iexec->execute)
+		return 1;
+
+	iexec->execute = true;
+	BIOSLOG(bios, "0x%04X: ---- Executing following commands ----\n", offset);
+
+	return 1;
+}
+
+static int
+init_time(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_TIME   opcode: 0x74 ('t')
+	 *
+	 * offset      (8  bit): opcode
+	 * offset + 1  (16 bit): time
+	 *
+	 * Sleep for "time" microseconds.
+	 */
+
+	unsigned time = ROM16(bios->data[offset + 1]);
+
+	if (!iexec->execute)
+		return 3;
+
+	BIOSLOG(bios, "0x%04X: Sleeping for 0x%04X microseconds\n",
+		offset, time);
+
+	if (time < 1000)
+		udelay(time);
+	else
+		msleep((time + 900) / 1000);
+
+	return 3;
+}
+
+static int
+init_condition(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_CONDITION   opcode: 0x75 ('u')
+	 *
+	 * offset      (8 bit): opcode
+	 * offset + 1  (8 bit): condition number
+	 *
+	 * Check condition "condition number" in the condition table.
+	 * If condition not met skip subsequent opcodes until condition is
+	 * inverted (INIT_NOT), or we hit INIT_RESUME
+	 */
+
+	uint8_t cond = bios->data[offset + 1];
+
+	if (!iexec->execute)
+		return 2;
+
+	BIOSLOG(bios, "0x%04X: Condition: 0x%02X\n", offset, cond);
+
+	if (bios_condition_met(bios, offset, cond))
+		BIOSLOG(bios, "0x%04X: Condition fulfilled -- continuing to execute\n", offset);
+	else {
+		BIOSLOG(bios, "0x%04X: Condition not fulfilled -- skipping following commands\n", offset);
+		iexec->execute = false;
+	}
+
+	return 2;
+}
+
+static int
+init_io_condition(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_IO_CONDITION  opcode: 0x76
+	 *
+	 * offset      (8 bit): opcode
+	 * offset + 1  (8 bit): condition number
+	 *
+	 * Check condition "condition number" in the io condition table.
+	 * If condition not met skip subsequent opcodes until condition is
+	 * inverted (INIT_NOT), or we hit INIT_RESUME
+	 */
+
+	uint8_t cond = bios->data[offset + 1];
+
+	if (!iexec->execute)
+		return 2;
+
+	BIOSLOG(bios, "0x%04X: IO condition: 0x%02X\n", offset, cond);
+
+	if (io_condition_met(bios, offset, cond))
+		BIOSLOG(bios, "0x%04X: Condition fulfilled -- continuing to execute\n", offset);
+	else {
+		BIOSLOG(bios, "0x%04X: Condition not fulfilled -- skipping following commands\n", offset);
+		iexec->execute = false;
+	}
+
+	return 2;
+}
+
+static int
+init_index_io(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_INDEX_IO   opcode: 0x78 ('x')
+	 *
+	 * offset      (8  bit): opcode
+	 * offset + 1  (16 bit): CRTC port
+	 * offset + 3  (8  bit): CRTC index
+	 * offset + 4  (8  bit): mask
+	 * offset + 5  (8  bit): data
+	 *
+	 * Read value at index "CRTC index" on "CRTC port", AND with "mask",
+	 * OR with "data", write-back
+	 */
+
+	uint16_t crtcport = ROM16(bios->data[offset + 1]);
+	uint8_t crtcindex = bios->data[offset + 3];
+	uint8_t mask = bios->data[offset + 4];
+	uint8_t data = bios->data[offset + 5];
+	uint8_t value;
+
+	if (!iexec->execute)
+		return 6;
+
+	BIOSLOG(bios, "0x%04X: Port: 0x%04X, Index: 0x%02X, Mask: 0x%02X, "
+		      "Data: 0x%02X\n",
+		offset, crtcport, crtcindex, mask, data);
+
+	value = (bios_idxprt_rd(bios, crtcport, crtcindex) & mask) | data;
+	bios_idxprt_wr(bios, crtcport, crtcindex, value);
+
+	return 6;
+}
+
+static int
+init_pll(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_PLL   opcode: 0x79 ('y')
+	 *
+	 * offset      (8  bit): opcode
+	 * offset + 1  (32 bit): register
+	 * offset + 5  (16 bit): freq
+	 *
+	 * Set PLL register "register" to coefficients for frequency (10kHz)
+	 * "freq"
+	 */
+
+	uint32_t reg = ROM32(bios->data[offset + 1]);
+	uint16_t freq = ROM16(bios->data[offset + 5]);
+
+	if (!iexec->execute)
+		return 7;
+
+	BIOSLOG(bios, "0x%04X: Reg: 0x%08X, Freq: %d0kHz\n", offset, reg, freq);
+
+	setPLL(bios, reg, freq * 10);
+
+	return 7;
+}
+
+static int
+init_zm_reg(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_ZM_REG   opcode: 0x7A ('z')
+	 *
+	 * offset      (8  bit): opcode
+	 * offset + 1  (32 bit): register
+	 * offset + 5  (32 bit): value
+	 *
+	 * Assign "value" to "register"
+	 */
+
+	uint32_t reg = ROM32(bios->data[offset + 1]);
+	uint32_t value = ROM32(bios->data[offset + 5]);
+
+	if (!iexec->execute)
+		return 9;
+
+	if (reg == 0x000200)
+		value |= 1;
+
+	bios_wr32(bios, reg, value);
+
+	return 9;
+}
+
+static int
+init_ram_restrict_pll(struct nvbios *bios, uint16_t offset,
+		      struct init_exec *iexec)
+{
+	/*
+	 * INIT_RAM_RESTRICT_PLL   opcode: 0x87 ('')
+	 *
+	 * offset      (8 bit): opcode
+	 * offset + 1  (8 bit): PLL type
+	 * offset + 2 (32 bit): frequency 0
+	 *
+	 * Uses the RAMCFG strap of PEXTDEV_BOOT as an index into the table at
+	 * ram_restrict_table_ptr.  The value read from there is used to select
+	 * a frequency from the table starting at 'frequency 0' to be
+	 * programmed into the PLL corresponding to 'type'.
+	 *
+	 * The PLL limits table on cards using this opcode has a mapping of
+	 * 'type' to the relevant registers.
+	 */
+
+	struct drm_device *dev = bios->dev;
+	uint32_t strap = (bios_rd32(bios, NV_PEXTDEV_BOOT_0) & 0x0000003c) >> 2;
+	uint8_t index = bios->data[bios->ram_restrict_tbl_ptr + strap];
+	uint8_t type = bios->data[offset + 1];
+	uint32_t freq = ROM32(bios->data[offset + 2 + (index * 4)]);
+	uint8_t *pll_limits = &bios->data[bios->pll_limit_tbl_ptr], *entry;
+	int len = 2 + bios->ram_restrict_group_count * 4;
+	int i;
+
+	if (!iexec->execute)
+		return len;
+
+	if (!bios->pll_limit_tbl_ptr || (pll_limits[0] & 0xf0) != 0x30) {
+		NV_ERROR(dev, "PLL limits table not version 3.x\n");
+		return len; /* deliberate, allow default clocks to remain */
+	}
+
+	entry = pll_limits + pll_limits[1];
+	for (i = 0; i < pll_limits[3]; i++, entry += pll_limits[2]) {
+		if (entry[0] == type) {
+			uint32_t reg = ROM32(entry[3]);
+
+			BIOSLOG(bios, "0x%04X: "
+				      "Type %02x Reg 0x%08x Freq %dKHz\n",
+				offset, type, reg, freq);
+
+			setPLL(bios, reg, freq);
+			return len;
+		}
+	}
+
+	NV_ERROR(dev, "PLL type 0x%02x not found in PLL limits table", type);
+	return len;
+}
+
+static int
+init_8c(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_8C   opcode: 0x8C ('')
+	 *
+	 * NOP so far....
+	 *
+	 */
+
+	return 1;
+}
+
+static int
+init_8d(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_8D   opcode: 0x8D ('')
+	 *
+	 * NOP so far....
+	 *
+	 */
+
+	return 1;
+}
+
+static int
+init_gpio(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_GPIO   opcode: 0x8E ('')
+	 *
+	 * offset      (8 bit): opcode
+	 *
+	 * Loop over all entries in the DCB GPIO table, and initialise
+	 * each GPIO according to various values listed in each entry
+	 */
+
+	const uint32_t nv50_gpio_reg[4] = { 0xe104, 0xe108, 0xe280, 0xe284 };
+	const uint32_t nv50_gpio_ctl[2] = { 0xe100, 0xe28c };
+	const uint8_t *gpio_table = &bios->data[bios->bdcb.gpio_table_ptr];
+	const uint8_t *gpio_entry;
+	int i;
+
+	if (!iexec->execute)
+		return 1;
+
+	if (bios->bdcb.version != 0x40) {
+		NV_ERROR(bios->dev, "DCB table not version 4.0\n");
+		return 0;
+	}
+
+	if (!bios->bdcb.gpio_table_ptr) {
+		NV_WARN(bios->dev, "Invalid pointer to INIT_8E table\n");
+		return 0;
+	}
+
+	gpio_entry = gpio_table + gpio_table[1];
+	for (i = 0; i < gpio_table[2]; i++, gpio_entry += gpio_table[3]) {
+		uint32_t entry = ROM32(gpio_entry[0]), r, s, v;
+		int line = (entry & 0x0000001f);
+
+		BIOSLOG(bios, "0x%04X: Entry: 0x%08X\n", offset, entry);
+
+		if ((entry & 0x0000ff00) == 0x0000ff00)
+			continue;
+
+		r = nv50_gpio_reg[line >> 3];
+		s = (line & 0x07) << 2;
+		v = bios_rd32(bios, r) & ~(0x00000003 << s);
+		if (entry & 0x01000000)
+			v |= (((entry & 0x60000000) >> 29) ^ 2) << s;
+		else
+			v |= (((entry & 0x18000000) >> 27) ^ 2) << s;
+		bios_wr32(bios, r, v);
+
+		r = nv50_gpio_ctl[line >> 4];
+		s = (line & 0x0f);
+		v = bios_rd32(bios, r) & ~(0x00010001 << s);
+		switch ((entry & 0x06000000) >> 25) {
+		case 1:
+			v |= (0x00000001 << s);
+			break;
+		case 2:
+			v |= (0x00010000 << s);
+			break;
+		default:
+			break;
+		}
+		bios_wr32(bios, r, v);
+	}
+
+	return 1;
+}
+
+static int
+init_ram_restrict_zm_reg_group(struct nvbios *bios, uint16_t offset,
+			       struct init_exec *iexec)
+{
+	/*
+	 * INIT_RAM_RESTRICT_ZM_REG_GROUP   opcode: 0x8F ('')
+	 *
+	 * offset      (8  bit): opcode
+	 * offset + 1  (32 bit): reg
+	 * offset + 5  (8  bit): regincrement
+	 * offset + 6  (8  bit): count
+	 * offset + 7  (32 bit): value 1,1
+	 * ...
+	 *
+	 * Use the RAMCFG strap of PEXTDEV_BOOT as an index into the table at
+	 * ram_restrict_table_ptr. The value read from here is 'n', and
+	 * "value 1,n" gets written to "reg". This repeats "count" times and on
+	 * each iteration 'm', "reg" increases by "regincrement" and
+	 * "value m,n" is used. The extent of n is limited by a number read
+	 * from the 'M' BIT table, herein called "blocklen"
+	 */
+
+	uint32_t reg = ROM32(bios->data[offset + 1]);
+	uint8_t regincrement = bios->data[offset + 5];
+	uint8_t count = bios->data[offset + 6];
+	uint32_t strap_ramcfg, data;
+	/* previously set by 'M' BIT table */
+	uint16_t blocklen = bios->ram_restrict_group_count * 4;
+	int len = 7 + count * blocklen;
+	uint8_t index;
+	int i;
+
+
+	if (!iexec->execute)
+		return len;
+
+	if (!blocklen) {
+		NV_ERROR(bios->dev,
+			 "0x%04X: Zero block length - has the M table "
+			 "been parsed?\n", offset);
+		return 0;
+	}
+
+	strap_ramcfg = (bios_rd32(bios, NV_PEXTDEV_BOOT_0) >> 2) & 0xf;
+	index = bios->data[bios->ram_restrict_tbl_ptr + strap_ramcfg];
+
+	BIOSLOG(bios, "0x%04X: Reg: 0x%08X, RegIncrement: 0x%02X, "
+		      "Count: 0x%02X, StrapRamCfg: 0x%02X, Index: 0x%02X\n",
+		offset, reg, regincrement, count, strap_ramcfg, index);
+
+	for (i = 0; i < count; i++) {
+		data = ROM32(bios->data[offset + 7 + index * 4 + blocklen * i]);
+
+		bios_wr32(bios, reg, data);
+
+		reg += regincrement;
+	}
+
+	return len;
+}
+
+static int
+init_copy_zm_reg(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_COPY_ZM_REG   opcode: 0x90 ('')
+	 *
+	 * offset      (8  bit): opcode
+	 * offset + 1  (32 bit): src reg
+	 * offset + 5  (32 bit): dst reg
+	 *
+	 * Put contents of "src reg" into "dst reg"
+	 */
+
+	uint32_t srcreg = ROM32(bios->data[offset + 1]);
+	uint32_t dstreg = ROM32(bios->data[offset + 5]);
+
+	if (!iexec->execute)
+		return 9;
+
+	bios_wr32(bios, dstreg, bios_rd32(bios, srcreg));
+
+	return 9;
+}
+
+static int
+init_zm_reg_group_addr_latched(struct nvbios *bios, uint16_t offset,
+			       struct init_exec *iexec)
+{
+	/*
+	 * INIT_ZM_REG_GROUP_ADDRESS_LATCHED   opcode: 0x91 ('')
+	 *
+	 * offset      (8  bit): opcode
+	 * offset + 1  (32 bit): dst reg
+	 * offset + 5  (8  bit): count
+	 * offset + 6  (32 bit): data 1
+	 * ...
+	 *
+	 * For each of "count" values write "data n" to "dst reg"
+	 */
+
+	uint32_t reg = ROM32(bios->data[offset + 1]);
+	uint8_t count = bios->data[offset + 5];
+	int len = 6 + count * 4;
+	int i;
+
+	if (!iexec->execute)
+		return len;
+
+	for (i = 0; i < count; i++) {
+		uint32_t data = ROM32(bios->data[offset + 6 + 4 * i]);
+		bios_wr32(bios, reg, data);
+	}
+
+	return len;
+}
+
+static int
+init_reserved(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_RESERVED   opcode: 0x92 ('')
+	 *
+	 * offset      (8 bit): opcode
+	 *
+	 * Seemingly does nothing
+	 */
+
+	return 1;
+}
+
+static int
+init_96(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_96   opcode: 0x96 ('')
+	 *
+	 * offset      (8  bit): opcode
+	 * offset + 1  (32 bit): sreg
+	 * offset + 5  (8  bit): sshift
+	 * offset + 6  (8  bit): smask
+	 * offset + 7  (8  bit): index
+	 * offset + 8  (32 bit): reg
+	 * offset + 12 (32 bit): mask
+	 * offset + 16 (8  bit): shift
+	 *
+	 */
+
+	uint16_t xlatptr = bios->init96_tbl_ptr + (bios->data[offset + 7] * 2);
+	uint32_t reg = ROM32(bios->data[offset + 8]);
+	uint32_t mask = ROM32(bios->data[offset + 12]);
+	uint32_t val;
+
+	val = bios_rd32(bios, ROM32(bios->data[offset + 1]));
+	if (bios->data[offset + 5] < 0x80)
+		val >>= bios->data[offset + 5];
+	else
+		val <<= (0x100 - bios->data[offset + 5]);
+	val &= bios->data[offset + 6];
+
+	val   = bios->data[ROM16(bios->data[xlatptr]) + val];
+	val <<= bios->data[offset + 16];
+
+	if (!iexec->execute)
+		return 17;
+
+	bios_wr32(bios, reg, (bios_rd32(bios, reg) & mask) | val);
+	return 17;
+}
+
+static int
+init_97(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_97   opcode: 0x97 ('')
+	 *
+	 * offset      (8  bit): opcode
+	 * offset + 1  (32 bit): register
+	 * offset + 5  (32 bit): mask
+	 * offset + 9  (32 bit): value
+	 *
+	 * Adds "value" to "register" preserving the fields specified
+	 * by "mask"
+	 */
+
+	uint32_t reg = ROM32(bios->data[offset + 1]);
+	uint32_t mask = ROM32(bios->data[offset + 5]);
+	uint32_t add = ROM32(bios->data[offset + 9]);
+	uint32_t val;
+
+	val = bios_rd32(bios, reg);
+	val = (val & mask) | ((val + add) & ~mask);
+
+	if (!iexec->execute)
+		return 13;
+
+	bios_wr32(bios, reg, val);
+	return 13;
+}
+
+static int
+init_auxch(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_AUXCH   opcode: 0x98 ('')
+	 *
+	 * offset      (8  bit): opcode
+	 * offset + 1  (32 bit): address
+	 * offset + 5  (8  bit): count
+	 * offset + 6  (8  bit): mask 0
+	 * offset + 7  (8  bit): data 0
+	 *  ...
+	 *
+	 */
+
+	struct drm_device *dev = bios->dev;
+	struct nouveau_i2c_chan *auxch;
+	uint32_t addr = ROM32(bios->data[offset + 1]);
+	uint8_t count = bios->data[offset + 5];
+	int len = 6 + count * 2;
+	int ret, i;
+
+	if (!bios->display.output) {
+		NV_ERROR(dev, "INIT_AUXCH: no active output\n");
+		return 0;
+	}
+
+	auxch = init_i2c_device_find(dev, bios->display.output->i2c_index);
+	if (!auxch) {
+		NV_ERROR(dev, "INIT_AUXCH: couldn't get auxch %d\n",
+			 bios->display.output->i2c_index);
+		return 0;
+	}
+
+	if (!iexec->execute)
+		return len;
+
+	offset += 6;
+	for (i = 0; i < count; i++, offset += 2) {
+		uint8_t data;
+
+		ret = nouveau_dp_auxch(auxch, 9, addr, &data, 1);
+		if (ret) {
+			NV_ERROR(dev, "INIT_AUXCH: rd auxch fail %d\n", ret);
+			return 0;
+		}
+
+		data &= bios->data[offset + 0];
+		data |= bios->data[offset + 1];
+
+		ret = nouveau_dp_auxch(auxch, 8, addr, &data, 1);
+		if (ret) {
+			NV_ERROR(dev, "INIT_AUXCH: wr auxch fail %d\n", ret);
+			return 0;
+		}
+	}
+
+	return len;
+}
+
+static int
+init_zm_auxch(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
+{
+	/*
+	 * INIT_ZM_AUXCH   opcode: 0x99 ('')
+	 *
+	 * offset      (8  bit): opcode
+	 * offset + 1  (32 bit): address
+	 * offset + 5  (8  bit): count
+	 * offset + 6  (8  bit): data 0
+	 *  ...
+	 *
+	 */
+
+	struct drm_device *dev = bios->dev;
+	struct nouveau_i2c_chan *auxch;
+	uint32_t addr = ROM32(bios->data[offset + 1]);
+	uint8_t count = bios->data[offset + 5];
+	int len = 6 + count;
+	int ret, i;
+
+	if (!bios->display.output) {
+		NV_ERROR(dev, "INIT_ZM_AUXCH: no active output\n");
+		return 0;
+	}
+
+	auxch = init_i2c_device_find(dev, bios->display.output->i2c_index);
+	if (!auxch) {
+		NV_ERROR(dev, "INIT_ZM_AUXCH: couldn't get auxch %d\n",
+			 bios->display.output->i2c_index);
+		return 0;
+	}
+
+	if (!iexec->execute)
+		return len;
+
+	offset += 6;
+	for (i = 0; i < count; i++, offset++) {
+		ret = nouveau_dp_auxch(auxch, 8, addr, &bios->data[offset], 1);
+		if (ret) {
+			NV_ERROR(dev, "INIT_ZM_AUXCH: wr auxch fail %d\n", ret);
+			return 0;
+		}
+	}
+
+	return len;
+}
+
+static struct init_tbl_entry itbl_entry[] = {
+	/* command name                       , id  , length  , offset  , mult    , command handler                 */
+	/* INIT_PROG (0x31, 15, 10, 4) removed due to no example of use */
+	{ "INIT_IO_RESTRICT_PROG"             , 0x32, init_io_restrict_prog           },
+	{ "INIT_REPEAT"                       , 0x33, init_repeat                     },
+	{ "INIT_IO_RESTRICT_PLL"              , 0x34, init_io_restrict_pll            },
+	{ "INIT_END_REPEAT"                   , 0x36, init_end_repeat                 },
+	{ "INIT_COPY"                         , 0x37, init_copy                       },
+	{ "INIT_NOT"                          , 0x38, init_not                        },
+	{ "INIT_IO_FLAG_CONDITION"            , 0x39, init_io_flag_condition          },
+	{ "INIT_INDEX_ADDRESS_LATCHED"        , 0x49, init_idx_addr_latched           },
+	{ "INIT_IO_RESTRICT_PLL2"             , 0x4A, init_io_restrict_pll2           },
+	{ "INIT_PLL2"                         , 0x4B, init_pll2                       },
+	{ "INIT_I2C_BYTE"                     , 0x4C, init_i2c_byte                   },
+	{ "INIT_ZM_I2C_BYTE"                  , 0x4D, init_zm_i2c_byte                },
+	{ "INIT_ZM_I2C"                       , 0x4E, init_zm_i2c                     },
+	{ "INIT_TMDS"                         , 0x4F, init_tmds                       },
+	{ "INIT_ZM_TMDS_GROUP"                , 0x50, init_zm_tmds_group              },
+	{ "INIT_CR_INDEX_ADDRESS_LATCHED"     , 0x51, init_cr_idx_adr_latch           },
+	{ "INIT_CR"                           , 0x52, init_cr                         },
+	{ "INIT_ZM_CR"                        , 0x53, init_zm_cr                      },
+	{ "INIT_ZM_CR_GROUP"                  , 0x54, init_zm_cr_group                },
+	{ "INIT_CONDITION_TIME"               , 0x56, init_condition_time             },
+	{ "INIT_ZM_REG_SEQUENCE"              , 0x58, init_zm_reg_sequence            },
+	/* INIT_INDIRECT_REG (0x5A, 7, 0, 0) removed due to no example of use */
+	{ "INIT_SUB_DIRECT"                   , 0x5B, init_sub_direct                 },
+	{ "INIT_COPY_NV_REG"                  , 0x5F, init_copy_nv_reg                },
+	{ "INIT_ZM_INDEX_IO"                  , 0x62, init_zm_index_io                },
+	{ "INIT_COMPUTE_MEM"                  , 0x63, init_compute_mem                },
+	{ "INIT_RESET"                        , 0x65, init_reset                      },
+	{ "INIT_CONFIGURE_MEM"                , 0x66, init_configure_mem              },
+	{ "INIT_CONFIGURE_CLK"                , 0x67, init_configure_clk              },
+	{ "INIT_CONFIGURE_PREINIT"            , 0x68, init_configure_preinit          },
+	{ "INIT_IO"                           , 0x69, init_io                         },
+	{ "INIT_SUB"                          , 0x6B, init_sub                        },
+	{ "INIT_RAM_CONDITION"                , 0x6D, init_ram_condition              },
+	{ "INIT_NV_REG"                       , 0x6E, init_nv_reg                     },
+	{ "INIT_MACRO"                        , 0x6F, init_macro                      },
+	{ "INIT_DONE"                         , 0x71, init_done                       },
+	{ "INIT_RESUME"                       , 0x72, init_resume                     },
+	/* INIT_RAM_CONDITION2 (0x73, 9, 0, 0) removed due to no example of use */
+	{ "INIT_TIME"                         , 0x74, init_time                       },
+	{ "INIT_CONDITION"                    , 0x75, init_condition                  },
+	{ "INIT_IO_CONDITION"                 , 0x76, init_io_condition               },
+	{ "INIT_INDEX_IO"                     , 0x78, init_index_io                   },
+	{ "INIT_PLL"                          , 0x79, init_pll                        },
+	{ "INIT_ZM_REG"                       , 0x7A, init_zm_reg                     },
+	{ "INIT_RAM_RESTRICT_PLL"             , 0x87, init_ram_restrict_pll           },
+	{ "INIT_8C"                           , 0x8C, init_8c                         },
+	{ "INIT_8D"                           , 0x8D, init_8d                         },
+	{ "INIT_GPIO"                         , 0x8E, init_gpio                       },
+	{ "INIT_RAM_RESTRICT_ZM_REG_GROUP"    , 0x8F, init_ram_restrict_zm_reg_group  },
+	{ "INIT_COPY_ZM_REG"                  , 0x90, init_copy_zm_reg                },
+	{ "INIT_ZM_REG_GROUP_ADDRESS_LATCHED" , 0x91, init_zm_reg_group_addr_latched  },
+	{ "INIT_RESERVED"                     , 0x92, init_reserved                   },
+	{ "INIT_96"                           , 0x96, init_96                         },
+	{ "INIT_97"                           , 0x97, init_97                         },
+	{ "INIT_AUXCH"                        , 0x98, init_auxch                      },
+	{ "INIT_ZM_AUXCH"                     , 0x99, init_zm_auxch                   },
+	{ NULL                                , 0   , NULL                            }
+};
+
+#define MAX_TABLE_OPS 1000
+
+static int
+parse_init_table(struct nvbios *bios, unsigned int offset,
+		 struct init_exec *iexec)
+{
+	/*
+	 * Parses all commands in an init table.
+	 *
+	 * We start out executing all commands found in the init table. Some
+	 * opcodes may change the status of iexec->execute to SKIP, which will
+	 * cause the following opcodes to perform no operation until the value
+	 * is changed back to EXECUTE.
+	 */
+
+	int count = 0, i, res;
+	uint8_t id;
+
+	/*
+	 * Loop until INIT_DONE causes us to break out of the loop
+	 * (or until offset > bios length just in case... )
+	 * (and no more than MAX_TABLE_OPS iterations, just in case... )
+	 */
+	while ((offset < bios->length) && (count++ < MAX_TABLE_OPS)) {
+		id = bios->data[offset];
+
+		/* Find matching id in itbl_entry */
+		for (i = 0; itbl_entry[i].name && (itbl_entry[i].id != id); i++)
+			;
+
+		if (itbl_entry[i].name) {
+			BIOSLOG(bios, "0x%04X: [ (0x%02X) - %s ]\n",
+				offset, itbl_entry[i].id, itbl_entry[i].name);
+
+			/* execute eventual command handler */
+			res = (*itbl_entry[i].handler)(bios, offset, iexec);
+			if (!res)
+				break;
+			/*
+			 * Add the offset of the current command including all data
+			 * of that command. The offset will then be pointing on the
+			 * next op code.
+			 */
+			offset += res;
+		} else {
+			NV_ERROR(bios->dev,
+				 "0x%04X: Init table command not found: "
+				 "0x%02X\n", offset, id);
+			return -ENOENT;
+		}
+	}
+
+	if (offset >= bios->length)
+		NV_WARN(bios->dev,
+			"Offset 0x%04X greater than known bios image length.  "
+			"Corrupt image?\n", offset);
+	if (count >= MAX_TABLE_OPS)
+		NV_WARN(bios->dev,
+			"More than %d opcodes to a table is unlikely, "
+			"is the bios image corrupt?\n", MAX_TABLE_OPS);
+
+	return 0;
+}
+
+static void
+parse_init_tables(struct nvbios *bios)
+{
+	/* Loops and calls parse_init_table() for each present table. */
+
+	int i = 0;
+	uint16_t table;
+	struct init_exec iexec = {true, false};
+
+	if (bios->old_style_init) {
+		if (bios->init_script_tbls_ptr)
+			parse_init_table(bios, bios->init_script_tbls_ptr, &iexec);
+		if (bios->extra_init_script_tbl_ptr)
+			parse_init_table(bios, bios->extra_init_script_tbl_ptr, &iexec);
+
+		return;
+	}
+
+	while ((table = ROM16(bios->data[bios->init_script_tbls_ptr + i]))) {
+		NV_INFO(bios->dev,
+			"Parsing VBIOS init table %d at offset 0x%04X\n",
+			i / 2, table);
+		BIOSLOG(bios, "0x%04X: ------ Executing following commands ------\n", table);
+
+		parse_init_table(bios, table, &iexec);
+		i += 2;
+	}
+}
+
+static uint16_t clkcmptable(struct nvbios *bios, uint16_t clktable, int pxclk)
+{
+	int compare_record_len, i = 0;
+	uint16_t compareclk, scriptptr = 0;
+
+	if (bios->major_version < 5) /* pre BIT */
+		compare_record_len = 3;
+	else
+		compare_record_len = 4;
+
+	do {
+		compareclk = ROM16(bios->data[clktable + compare_record_len * i]);
+		if (pxclk >= compareclk * 10) {
+			if (bios->major_version < 5) {
+				uint8_t tmdssub = bios->data[clktable + 2 + compare_record_len * i];
+				scriptptr = ROM16(bios->data[bios->init_script_tbls_ptr + tmdssub * 2]);
+			} else
+				scriptptr = ROM16(bios->data[clktable + 2 + compare_record_len * i]);
+			break;
+		}
+		i++;
+	} while (compareclk);
+
+	return scriptptr;
+}
+
+static void
+run_digital_op_script(struct drm_device *dev, uint16_t scriptptr,
+		      struct dcb_entry *dcbent, int head, bool dl)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nvbios *bios = &dev_priv->VBIOS;
+	struct init_exec iexec = {true, false};
+
+	NV_TRACE(dev, "0x%04X: Parsing digital output script table\n",
+		 scriptptr);
+	bios_idxprt_wr(bios, NV_CIO_CRX__COLOR, NV_CIO_CRE_44,
+		       head ? NV_CIO_CRE_44_HEADB : NV_CIO_CRE_44_HEADA);
+	/* note: if dcb entries have been merged, index may be misleading */
+	NVWriteVgaCrtc5758(dev, head, 0, dcbent->index);
+	parse_init_table(bios, scriptptr, &iexec);
+
+	nv04_dfp_bind_head(dev, dcbent, head, dl);
+}
+
+static int call_lvds_manufacturer_script(struct drm_device *dev, struct dcb_entry *dcbent, int head, enum LVDS_script script)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nvbios *bios = &dev_priv->VBIOS;
+	uint8_t sub = bios->data[bios->fp.xlated_entry + script] + (bios->fp.link_c_increment && dcbent->or & OUTPUT_C ? 1 : 0);
+	uint16_t scriptofs = ROM16(bios->data[bios->init_script_tbls_ptr + sub * 2]);
+
+	if (!bios->fp.xlated_entry || !sub || !scriptofs)
+		return -EINVAL;
+
+	run_digital_op_script(dev, scriptofs, dcbent, head, bios->fp.dual_link);
+
+	if (script == LVDS_PANEL_OFF) {
+		/* off-on delay in ms */
+		msleep(ROM16(bios->data[bios->fp.xlated_entry + 7]));
+	}
+#ifdef __powerpc__
+	/* Powerbook specific quirks */
+	if ((dev->pci_device & 0xffff) == 0x0179 ||
+	    (dev->pci_device & 0xffff) == 0x0189 ||
+	    (dev->pci_device & 0xffff) == 0x0329) {
+		if (script == LVDS_RESET) {
+			nv_write_tmds(dev, dcbent->or, 0, 0x02, 0x72);
+
+		} else if (script == LVDS_PANEL_ON) {
+			bios_wr32(bios, NV_PBUS_DEBUG_DUALHEAD_CTL,
+				  bios_rd32(bios, NV_PBUS_DEBUG_DUALHEAD_CTL)
+				  | (1 << 31));
+			bios_wr32(bios, NV_PCRTC_GPIO_EXT,
+				  bios_rd32(bios, NV_PCRTC_GPIO_EXT) | 1);
+
+		} else if (script == LVDS_PANEL_OFF) {
+			bios_wr32(bios, NV_PBUS_DEBUG_DUALHEAD_CTL,
+				  bios_rd32(bios, NV_PBUS_DEBUG_DUALHEAD_CTL)
+				  & ~(1 << 31));
+			bios_wr32(bios, NV_PCRTC_GPIO_EXT,
+				  bios_rd32(bios, NV_PCRTC_GPIO_EXT) & ~3);
+		}
+	}
+#endif
+
+	return 0;
+}
+
+static int run_lvds_table(struct drm_device *dev, struct dcb_entry *dcbent, int head, enum LVDS_script script, int pxclk)
+{
+	/*
+	 * The BIT LVDS table's header has the information to setup the
+	 * necessary registers. Following the standard 4 byte header are:
+	 * A bitmask byte and a dual-link transition pxclk value for use in
+	 * selecting the init script when not using straps; 4 script pointers
+	 * for panel power, selected by output and on/off; and 8 table pointers
+	 * for panel init, the needed one determined by output, and bits in the
+	 * conf byte. These tables are similar to the TMDS tables, consisting
+	 * of a list of pxclks and script pointers.
+	 */
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nvbios *bios = &dev_priv->VBIOS;
+	unsigned int outputset = (dcbent->or == 4) ? 1 : 0;
+	uint16_t scriptptr = 0, clktable;
+	uint8_t clktableptr = 0;
+
+	/*
+	 * For now we assume version 3.0 table - g80 support will need some
+	 * changes
+	 */
+
+	switch (script) {
+	case LVDS_INIT:
+		return -ENOSYS;
+	case LVDS_BACKLIGHT_ON:
+	case LVDS_PANEL_ON:
+		scriptptr = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 7 + outputset * 2]);
+		break;
+	case LVDS_BACKLIGHT_OFF:
+	case LVDS_PANEL_OFF:
+		scriptptr = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 11 + outputset * 2]);
+		break;
+	case LVDS_RESET:
+		if (dcbent->lvdsconf.use_straps_for_mode) {
+			if (bios->fp.dual_link)
+				clktableptr += 2;
+			if (bios->fp.BITbit1)
+				clktableptr++;
+		} else {
+			/* using EDID */
+			uint8_t fallback = bios->data[bios->fp.lvdsmanufacturerpointer + 4];
+			int fallbackcmpval = (dcbent->or == 4) ? 4 : 1;
+
+			if (bios->fp.dual_link) {
+				clktableptr += 2;
+				fallbackcmpval *= 2;
+			}
+			if (fallbackcmpval & fallback)
+				clktableptr++;
+		}
+
+		/* adding outputset * 8 may not be correct */
+		clktable = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 15 + clktableptr * 2 + outputset * 8]);
+		if (!clktable) {
+			NV_ERROR(dev, "Pixel clock comparison table not found\n");
+			return -ENOENT;
+		}
+		scriptptr = clkcmptable(bios, clktable, pxclk);
+	}
+
+	if (!scriptptr) {
+		NV_ERROR(dev, "LVDS output init script not found\n");
+		return -ENOENT;
+	}
+	run_digital_op_script(dev, scriptptr, dcbent, head, bios->fp.dual_link);
+
+	return 0;
+}
+
+int call_lvds_script(struct drm_device *dev, struct dcb_entry *dcbent, int head, enum LVDS_script script, int pxclk)
+{
+	/*
+	 * LVDS operations are multiplexed in an effort to present a single API
+	 * which works with two vastly differing underlying structures.
+	 * This acts as the demux
+	 */
+
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nvbios *bios = &dev_priv->VBIOS;
+	uint8_t lvds_ver = bios->data[bios->fp.lvdsmanufacturerpointer];
+	uint32_t sel_clk_binding, sel_clk;
+	int ret;
+
+	if (bios->fp.last_script_invoc == (script << 1 | head) || !lvds_ver ||
+	    (lvds_ver >= 0x30 && script == LVDS_INIT))
+		return 0;
+
+	if (!bios->fp.lvds_init_run) {
+		bios->fp.lvds_init_run = true;
+		call_lvds_script(dev, dcbent, head, LVDS_INIT, pxclk);
+	}
+
+	if (script == LVDS_PANEL_ON && bios->fp.reset_after_pclk_change)
+		call_lvds_script(dev, dcbent, head, LVDS_RESET, pxclk);
+	if (script == LVDS_RESET && bios->fp.power_off_for_reset)
+		call_lvds_script(dev, dcbent, head, LVDS_PANEL_OFF, pxclk);
+
+	NV_TRACE(dev, "Calling LVDS script %d:\n", script);
+
+	/* don't let script change pll->head binding */
+	sel_clk_binding = bios_rd32(bios, NV_PRAMDAC_SEL_CLK) & 0x50000;
+
+	if (lvds_ver < 0x30)
+		ret = call_lvds_manufacturer_script(dev, dcbent, head, script);
+	else
+		ret = run_lvds_table(dev, dcbent, head, script, pxclk);
+
+	bios->fp.last_script_invoc = (script << 1 | head);
+
+	sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK) & ~0x50000;
+	NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, sel_clk | sel_clk_binding);
+	/* some scripts set a value in NV_PBUS_POWERCTRL_2 and break video overlay */
+	nvWriteMC(dev, NV_PBUS_POWERCTRL_2, 0);
+
+	return ret;
+}
+
+struct lvdstableheader {
+	uint8_t lvds_ver, headerlen, recordlen;
+};
+
+static int parse_lvds_manufacturer_table_header(struct drm_device *dev, struct nvbios *bios, struct lvdstableheader *lth)
+{
+	/*
+	 * BMP version (0xa) LVDS table has a simple header of version and
+	 * record length. The BIT LVDS table has the typical BIT table header:
+	 * version byte, header length byte, record length byte, and a byte for
+	 * the maximum number of records that can be held in the table.
+	 */
+
+	uint8_t lvds_ver, headerlen, recordlen;
+
+	memset(lth, 0, sizeof(struct lvdstableheader));
+
+	if (bios->fp.lvdsmanufacturerpointer == 0x0) {
+		NV_ERROR(dev, "Pointer to LVDS manufacturer table invalid\n");
+		return -EINVAL;
+	}
+
+	lvds_ver = bios->data[bios->fp.lvdsmanufacturerpointer];
+
+	switch (lvds_ver) {
+	case 0x0a:	/* pre NV40 */
+		headerlen = 2;
+		recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1];
+		break;
+	case 0x30:	/* NV4x */
+		headerlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1];
+		if (headerlen < 0x1f) {
+			NV_ERROR(dev, "LVDS table header not understood\n");
+			return -EINVAL;
+		}
+		recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 2];
+		break;
+	case 0x40:	/* G80/G90 */
+		headerlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1];
+		if (headerlen < 0x7) {
+			NV_ERROR(dev, "LVDS table header not understood\n");
+			return -EINVAL;
+		}
+		recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 2];
+		break;
+	default:
+		NV_ERROR(dev,
+			 "LVDS table revision %d.%d not currently supported\n",
+			 lvds_ver >> 4, lvds_ver & 0xf);
+		return -ENOSYS;
+	}
+
+	lth->lvds_ver = lvds_ver;
+	lth->headerlen = headerlen;
+	lth->recordlen = recordlen;
+
+	return 0;
+}
+
+static int
+get_fp_strap(struct drm_device *dev, struct nvbios *bios)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+	/*
+	 * The fp strap is normally dictated by the "User Strap" in
+	 * PEXTDEV_BOOT_0[20:16], but on BMP cards when bit 2 of the
+	 * Internal_Flags struct at 0x48 is set, the user strap gets overriden
+	 * by the PCI subsystem ID during POST, but not before the previous user
+	 * strap has been committed to CR58 for CR57=0xf on head A, which may be
+	 * read and used instead
+	 */
+
+	if (bios->major_version < 5 && bios->data[0x48] & 0x4)
+		return NVReadVgaCrtc5758(dev, 0, 0xf) & 0xf;
+
+	if (dev_priv->card_type >= NV_50)
+		return (bios_rd32(bios, NV_PEXTDEV_BOOT_0) >> 24) & 0xf;
+	else
+		return (bios_rd32(bios, NV_PEXTDEV_BOOT_0) >> 16) & 0xf;
+}
+
+static int parse_fp_mode_table(struct drm_device *dev, struct nvbios *bios)
+{
+	uint8_t *fptable;
+	uint8_t fptable_ver, headerlen = 0, recordlen, fpentries = 0xf, fpindex;
+	int ret, ofs, fpstrapping;
+	struct lvdstableheader lth;
+
+	if (bios->fp.fptablepointer == 0x0) {
+		/* Apple cards don't have the fp table; the laptops use DDC */
+		/* The table is also missing on some x86 IGPs */
+#ifndef __powerpc__
+		NV_ERROR(dev, "Pointer to flat panel table invalid\n");
+#endif
+		bios->pub.digital_min_front_porch = 0x4b;
+		return 0;
+	}
+
+	fptable = &bios->data[bios->fp.fptablepointer];
+	fptable_ver = fptable[0];
+
+	switch (fptable_ver) {
+	/*
+	 * BMP version 0x5.0x11 BIOSen have version 1 like tables, but no
+	 * version field, and miss one of the spread spectrum/PWM bytes.
+	 * This could affect early GF2Go parts (not seen any appropriate ROMs
+	 * though). Here we assume that a version of 0x05 matches this case
+	 * (combining with a BMP version check would be better), as the
+	 * common case for the panel type field is 0x0005, and that is in
+	 * fact what we are reading the first byte of.
+	 */
+	case 0x05:	/* some NV10, 11, 15, 16 */
+		recordlen = 42;
+		ofs = -1;
+		break;
+	case 0x10:	/* some NV15/16, and NV11+ */
+		recordlen = 44;
+		ofs = 0;
+		break;
+	case 0x20:	/* NV40+ */
+		headerlen = fptable[1];
+		recordlen = fptable[2];
+		fpentries = fptable[3];
+		/*
+		 * fptable[4] is the minimum
+		 * RAMDAC_FP_HCRTC -> RAMDAC_FP_HSYNC_START gap
+		 */
+		bios->pub.digital_min_front_porch = fptable[4];
+		ofs = -7;
+		break;
+	default:
+		NV_ERROR(dev,
+			 "FP table revision %d.%d not currently supported\n",
+			 fptable_ver >> 4, fptable_ver & 0xf);
+		return -ENOSYS;
+	}
+
+	if (!bios->is_mobile) /* !mobile only needs digital_min_front_porch */
+		return 0;
+
+	ret = parse_lvds_manufacturer_table_header(dev, bios, &lth);
+	if (ret)
+		return ret;
+
+	if (lth.lvds_ver == 0x30 || lth.lvds_ver == 0x40) {
+		bios->fp.fpxlatetableptr = bios->fp.lvdsmanufacturerpointer +
+							lth.headerlen + 1;
+		bios->fp.xlatwidth = lth.recordlen;
+	}
+	if (bios->fp.fpxlatetableptr == 0x0) {
+		NV_ERROR(dev, "Pointer to flat panel xlat table invalid\n");
+		return -EINVAL;
+	}
+
+	fpstrapping = get_fp_strap(dev, bios);
+
+	fpindex = bios->data[bios->fp.fpxlatetableptr +
+					fpstrapping * bios->fp.xlatwidth];
+
+	if (fpindex > fpentries) {
+		NV_ERROR(dev, "Bad flat panel table index\n");
+		return -ENOENT;
+	}
+
+	/* nv4x cards need both a strap value and fpindex of 0xf to use DDC */
+	if (lth.lvds_ver > 0x10)
+		bios->pub.fp_no_ddc = fpstrapping != 0xf || fpindex != 0xf;
+
+	/*
+	 * If either the strap or xlated fpindex value are 0xf there is no
+	 * panel using a strap-derived bios mode present.  this condition
+	 * includes, but is different from, the DDC panel indicator above
+	 */
+	if (fpstrapping == 0xf || fpindex == 0xf)
+		return 0;
+
+	bios->fp.mode_ptr = bios->fp.fptablepointer + headerlen +
+			    recordlen * fpindex + ofs;
+
+	NV_TRACE(dev, "BIOS FP mode: %dx%d (%dkHz pixel clock)\n",
+		 ROM16(bios->data[bios->fp.mode_ptr + 11]) + 1,
+		 ROM16(bios->data[bios->fp.mode_ptr + 25]) + 1,
+		 ROM16(bios->data[bios->fp.mode_ptr + 7]) * 10);
+
+	return 0;
+}
+
+bool nouveau_bios_fp_mode(struct drm_device *dev, struct drm_display_mode *mode)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nvbios *bios = &dev_priv->VBIOS;
+	uint8_t *mode_entry = &bios->data[bios->fp.mode_ptr];
+
+	if (!mode)	/* just checking whether we can produce a mode */
+		return bios->fp.mode_ptr;
+
+	memset(mode, 0, sizeof(struct drm_display_mode));
+	/*
+	 * For version 1.0 (version in byte 0):
+	 * bytes 1-2 are "panel type", including bits on whether Colour/mono,
+	 * single/dual link, and type (TFT etc.)
+	 * bytes 3-6 are bits per colour in RGBX
+	 */
+	mode->clock = ROM16(mode_entry[7]) * 10;
+	/* bytes 9-10 is HActive */
+	mode->hdisplay = ROM16(mode_entry[11]) + 1;
+	/*
+	 * bytes 13-14 is HValid Start
+	 * bytes 15-16 is HValid End
+	 */
+	mode->hsync_start = ROM16(mode_entry[17]) + 1;
+	mode->hsync_end = ROM16(mode_entry[19]) + 1;
+	mode->htotal = ROM16(mode_entry[21]) + 1;
+	/* bytes 23-24, 27-30 similarly, but vertical */
+	mode->vdisplay = ROM16(mode_entry[25]) + 1;
+	mode->vsync_start = ROM16(mode_entry[31]) + 1;
+	mode->vsync_end = ROM16(mode_entry[33]) + 1;
+	mode->vtotal = ROM16(mode_entry[35]) + 1;
+	mode->flags |= (mode_entry[37] & 0x10) ?
+			DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
+	mode->flags |= (mode_entry[37] & 0x1) ?
+			DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
+	/*
+	 * bytes 38-39 relate to spread spectrum settings
+	 * bytes 40-43 are something to do with PWM
+	 */
+
+	mode->status = MODE_OK;
+	mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
+	drm_mode_set_name(mode);
+	return bios->fp.mode_ptr;
+}
+
+int nouveau_bios_parse_lvds_table(struct drm_device *dev, int pxclk, bool *dl, bool *if_is_24bit)
+{
+	/*
+	 * The LVDS table header is (mostly) described in
+	 * parse_lvds_manufacturer_table_header(): the BIT header additionally
+	 * contains the dual-link transition pxclk (in 10s kHz), at byte 5 - if
+	 * straps are not being used for the panel, this specifies the frequency
+	 * at which modes should be set up in the dual link style.
+	 *
+	 * Following the header, the BMP (ver 0xa) table has several records,
+	 * indexed by a seperate xlat table, indexed in turn by the fp strap in
+	 * EXTDEV_BOOT. Each record had a config byte, followed by 6 script
+	 * numbers for use by INIT_SUB which controlled panel init and power,
+	 * and finally a dword of ms to sleep between power off and on
+	 * operations.
+	 *
+	 * In the BIT versions, the table following the header serves as an
+	 * integrated config and xlat table: the records in the table are
+	 * indexed by the FP strap nibble in EXTDEV_BOOT, and each record has
+	 * two bytes - the first as a config byte, the second for indexing the
+	 * fp mode table pointed to by the BIT 'D' table
+	 *
+	 * DDC is not used until after card init, so selecting the correct table
+	 * entry and setting the dual link flag for EDID equipped panels,
+	 * requiring tests against the native-mode pixel clock, cannot be done
+	 * until later, when this function should be called with non-zero pxclk
+	 */
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nvbios *bios = &dev_priv->VBIOS;
+	int fpstrapping = get_fp_strap(dev, bios), lvdsmanufacturerindex = 0;
+	struct lvdstableheader lth;
+	uint16_t lvdsofs;
+	int ret, chip_version = bios->pub.chip_version;
+
+	ret = parse_lvds_manufacturer_table_header(dev, bios, &lth);
+	if (ret)
+		return ret;
+
+	switch (lth.lvds_ver) {
+	case 0x0a:	/* pre NV40 */
+		lvdsmanufacturerindex = bios->data[
+					bios->fp.fpxlatemanufacturertableptr +
+					fpstrapping];
+
+		/* we're done if this isn't the EDID panel case */
+		if (!pxclk)
+			break;
+
+		if (chip_version < 0x25) {
+			/* nv17 behaviour
+			 *
+			 * It seems the old style lvds script pointer is reused
+			 * to select 18/24 bit colour depth for EDID panels.
+			 */
+			lvdsmanufacturerindex =
+				(bios->legacy.lvds_single_a_script_ptr & 1) ?
+									2 : 0;
+			if (pxclk >= bios->fp.duallink_transition_clk)
+				lvdsmanufacturerindex++;
+		} else if (chip_version < 0x30) {
+			/* nv28 behaviour (off-chip encoder)
+			 *
+			 * nv28 does a complex dance of first using byte 121 of
+			 * the EDID to choose the lvdsmanufacturerindex, then
+			 * later attempting to match the EDID manufacturer and
+			 * product IDs in a table (signature 'pidt' (panel id
+			 * table?)), setting an lvdsmanufacturerindex of 0 and
+			 * an fp strap of the match index (or 0xf if none)
+			 */
+			lvdsmanufacturerindex = 0;
+		} else {
+			/* nv31, nv34 behaviour */
+			lvdsmanufacturerindex = 0;
+			if (pxclk >= bios->fp.duallink_transition_clk)
+				lvdsmanufacturerindex = 2;
+			if (pxclk >= 140000)
+				lvdsmanufacturerindex = 3;
+		}
+
+		/*
+		 * nvidia set the high nibble of (cr57=f, cr58) to
+		 * lvdsmanufacturerindex in this case; we don't
+		 */
+		break;
+	case 0x30:	/* NV4x */
+	case 0x40:	/* G80/G90 */
+		lvdsmanufacturerindex = fpstrapping;
+		break;
+	default:
+		NV_ERROR(dev, "LVDS table revision not currently supported\n");
+		return -ENOSYS;
+	}
+
+	lvdsofs = bios->fp.xlated_entry = bios->fp.lvdsmanufacturerpointer + lth.headerlen + lth.recordlen * lvdsmanufacturerindex;
+	switch (lth.lvds_ver) {
+	case 0x0a:
+		bios->fp.power_off_for_reset = bios->data[lvdsofs] & 1;
+		bios->fp.reset_after_pclk_change = bios->data[lvdsofs] & 2;
+		bios->fp.dual_link = bios->data[lvdsofs] & 4;
+		bios->fp.link_c_increment = bios->data[lvdsofs] & 8;
+		*if_is_24bit = bios->data[lvdsofs] & 16;
+		break;
+	case 0x30:
+		/*
+		 * My money would be on there being a 24 bit interface bit in
+		 * this table, but I have no example of a laptop bios with a
+		 * 24 bit panel to confirm that. Hence we shout loudly if any
+		 * bit other than bit 0 is set (I've not even seen bit 1)
+		 */
+		if (bios->data[lvdsofs] > 1)
+			NV_ERROR(dev,
+				 "You have a very unusual laptop display; please report it\n");
+		/*
+		 * No sign of the "power off for reset" or "reset for panel
+		 * on" bits, but it's safer to assume we should
+		 */
+		bios->fp.power_off_for_reset = true;
+		bios->fp.reset_after_pclk_change = true;
+		/*
+		 * It's ok lvdsofs is wrong for nv4x edid case; dual_link is
+		 * over-written, and BITbit1 isn't used
+		 */
+		bios->fp.dual_link = bios->data[lvdsofs] & 1;
+		bios->fp.BITbit1 = bios->data[lvdsofs] & 2;
+		bios->fp.duallink_transition_clk = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 5]) * 10;
+		break;
+	case 0x40:
+		bios->fp.dual_link = bios->data[lvdsofs] & 1;
+		bios->fp.if_is_24bit = bios->data[lvdsofs] & 2;
+		bios->fp.strapless_is_24bit = bios->data[bios->fp.lvdsmanufacturerpointer + 4];
+		bios->fp.duallink_transition_clk = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 5]) * 10;
+		break;
+	}
+
+	/* Dell Latitude D620 reports a too-high value for the dual-link
+	 * transition freq, causing us to program the panel incorrectly.
+	 *
+	 * It doesn't appear the VBIOS actually uses its transition freq
+	 * (90000kHz), instead it uses the "Number of LVDS channels" field
+	 * out of the panel ID structure (http://www.spwg.org/).
+	 *
+	 * For the moment, a quirk will do :)
+	 */
+	if ((dev->pdev->device == 0x01d7) &&
+	    (dev->pdev->subsystem_vendor == 0x1028) &&
+	    (dev->pdev->subsystem_device == 0x01c2)) {
+		bios->fp.duallink_transition_clk = 80000;
+	}
+
+	/* set dual_link flag for EDID case */
+	if (pxclk && (chip_version < 0x25 || chip_version > 0x28))
+		bios->fp.dual_link = (pxclk >= bios->fp.duallink_transition_clk);
+
+	*dl = bios->fp.dual_link;
+
+	return 0;
+}
+
+static uint8_t *
+bios_output_config_match(struct drm_device *dev, struct dcb_entry *dcbent,
+			 uint16_t record, int record_len, int record_nr)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nvbios *bios = &dev_priv->VBIOS;
+	uint32_t entry;
+	uint16_t table;
+	int i, v;
+
+	for (i = 0; i < record_nr; i++, record += record_len) {
+		table = ROM16(bios->data[record]);
+		if (!table)
+			continue;
+		entry = ROM32(bios->data[table]);
+
+		v = (entry & 0x000f0000) >> 16;
+		if (!(v & dcbent->or))
+			continue;
+
+		v = (entry & 0x000000f0) >> 4;
+		if (v != dcbent->location)
+			continue;
+
+		v = (entry & 0x0000000f);
+		if (v != dcbent->type)
+			continue;
+
+		return &bios->data[table];
+	}
+
+	return NULL;
+}
+
+void *
+nouveau_bios_dp_table(struct drm_device *dev, struct dcb_entry *dcbent,
+		      int *length)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nvbios *bios = &dev_priv->VBIOS;
+	uint8_t *table;
+
+	if (!bios->display.dp_table_ptr) {
+		NV_ERROR(dev, "No pointer to DisplayPort table\n");
+		return NULL;
+	}
+	table = &bios->data[bios->display.dp_table_ptr];
+
+	if (table[0] != 0x21) {
+		NV_ERROR(dev, "DisplayPort table version 0x%02x unknown\n",
+			 table[0]);
+		return NULL;
+	}
+
+	*length = table[4];
+	return bios_output_config_match(dev, dcbent,
+					bios->display.dp_table_ptr + table[1],
+					table[2], table[3]);
+}
+
+int
+nouveau_bios_run_display_table(struct drm_device *dev, struct dcb_entry *dcbent,
+			       uint32_t sub, int pxclk)
+{
+	/*
+	 * The display script table is located by the BIT 'U' table.
+	 *
+	 * It contains an array of pointers to various tables describing
+	 * a particular output type.  The first 32-bits of the output
+	 * tables contains similar information to a DCB entry, and is
+	 * used to decide whether that particular table is suitable for
+	 * the output you want to access.
+	 *
+	 * The "record header length" field here seems to indicate the
+	 * offset of the first configuration entry in the output tables.
+	 * This is 10 on most cards I've seen, but 12 has been witnessed
+	 * on DP cards, and there's another script pointer within the
+	 * header.
+	 *
+	 * offset + 0   ( 8 bits): version
+	 * offset + 1   ( 8 bits): header length
+	 * offset + 2   ( 8 bits): record length
+	 * offset + 3   ( 8 bits): number of records
+	 * offset + 4   ( 8 bits): record header length
+	 * offset + 5   (16 bits): pointer to first output script table
+	 */
+
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nvbios *bios = &dev_priv->VBIOS;
+	uint8_t *table = &bios->data[bios->display.script_table_ptr];
+	uint8_t *otable = NULL;
+	uint16_t script;
+	int i = 0;
+
+	if (!bios->display.script_table_ptr) {
+		NV_ERROR(dev, "No pointer to output script table\n");
+		return 1;
+	}
+
+	/*
+	 * Nothing useful has been in any of the pre-2.0 tables I've seen,
+	 * so until they are, we really don't need to care.
+	 */
+	if (table[0] < 0x20)
+		return 1;
+
+	if (table[0] != 0x20 && table[0] != 0x21) {
+		NV_ERROR(dev, "Output script table version 0x%02x unknown\n",
+			 table[0]);
+		return 1;
+	}
+
+	/*
+	 * The output script tables describing a particular output type
+	 * look as follows:
+	 *
+	 * offset + 0   (32 bits): output this table matches (hash of DCB)
+	 * offset + 4   ( 8 bits): unknown
+	 * offset + 5   ( 8 bits): number of configurations
+	 * offset + 6   (16 bits): pointer to some script
+	 * offset + 8   (16 bits): pointer to some script
+	 *
+	 * headerlen == 10
+	 * offset + 10           : configuration 0
+	 *
+	 * headerlen == 12
+	 * offset + 10           : pointer to some script
+	 * offset + 12           : configuration 0
+	 *
+	 * Each config entry is as follows:
+	 *
+	 * offset + 0   (16 bits): unknown, assumed to be a match value
+	 * offset + 2   (16 bits): pointer to script table (clock set?)
+	 * offset + 4   (16 bits): pointer to script table (reset?)
+	 *
+	 * There doesn't appear to be a count value to say how many
+	 * entries exist in each script table, instead, a 0 value in
+	 * the first 16-bit word seems to indicate both the end of the
+	 * list and the default entry.  The second 16-bit word in the
+	 * script tables is a pointer to the script to execute.
+	 */
+
+	NV_DEBUG_KMS(dev, "Searching for output entry for %d %d %d\n",
+			dcbent->type, dcbent->location, dcbent->or);
+	otable = bios_output_config_match(dev, dcbent, table[1] +
+					  bios->display.script_table_ptr,
+					  table[2], table[3]);
+	if (!otable) {
+		NV_ERROR(dev, "Couldn't find matching output script table\n");
+		return 1;
+	}
+
+	if (pxclk < -2 || pxclk > 0) {
+		/* Try to find matching script table entry */
+		for (i = 0; i < otable[5]; i++) {
+			if (ROM16(otable[table[4] + i*6]) == sub)
+				break;
+		}
+
+		if (i == otable[5]) {
+			NV_ERROR(dev, "Table 0x%04x not found for %d/%d, "
+				      "using first\n",
+				 sub, dcbent->type, dcbent->or);
+			i = 0;
+		}
+	}
+
+	if (pxclk == 0) {
+		script = ROM16(otable[6]);
+		if (!script) {
+			NV_DEBUG_KMS(dev, "output script 0 not found\n");
+			return 1;
+		}
+
+		NV_TRACE(dev, "0x%04X: parsing output script 0\n", script);
+		nouveau_bios_run_init_table(dev, script, dcbent);
+	} else
+	if (pxclk == -1) {
+		script = ROM16(otable[8]);
+		if (!script) {
+			NV_DEBUG_KMS(dev, "output script 1 not found\n");
+			return 1;
+		}
+
+		NV_TRACE(dev, "0x%04X: parsing output script 1\n", script);
+		nouveau_bios_run_init_table(dev, script, dcbent);
+	} else
+	if (pxclk == -2) {
+		if (table[4] >= 12)
+			script = ROM16(otable[10]);
+		else
+			script = 0;
+		if (!script) {
+			NV_DEBUG_KMS(dev, "output script 2 not found\n");
+			return 1;
+		}
+
+		NV_TRACE(dev, "0x%04X: parsing output script 2\n", script);
+		nouveau_bios_run_init_table(dev, script, dcbent);
+	} else
+	if (pxclk > 0) {
+		script = ROM16(otable[table[4] + i*6 + 2]);
+		if (script)
+			script = clkcmptable(bios, script, pxclk);
+		if (!script) {
+			NV_ERROR(dev, "clock script 0 not found\n");
+			return 1;
+		}
+
+		NV_TRACE(dev, "0x%04X: parsing clock script 0\n", script);
+		nouveau_bios_run_init_table(dev, script, dcbent);
+	} else
+	if (pxclk < 0) {
+		script = ROM16(otable[table[4] + i*6 + 4]);
+		if (script)
+			script = clkcmptable(bios, script, -pxclk);
+		if (!script) {
+			NV_DEBUG_KMS(dev, "clock script 1 not found\n");
+			return 1;
+		}
+
+		NV_TRACE(dev, "0x%04X: parsing clock script 1\n", script);
+		nouveau_bios_run_init_table(dev, script, dcbent);
+	}
+
+	return 0;
+}
+
+
+int run_tmds_table(struct drm_device *dev, struct dcb_entry *dcbent, int head, int pxclk)
+{
+	/*
+	 * the pxclk parameter is in kHz
+	 *
+	 * This runs the TMDS regs setting code found on BIT bios cards
+	 *
+	 * For ffs(or) == 1 use the first table, for ffs(or) == 2 and
+	 * ffs(or) == 3, use the second.
+	 */
+
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nvbios *bios = &dev_priv->VBIOS;
+	int cv = bios->pub.chip_version;
+	uint16_t clktable = 0, scriptptr;
+	uint32_t sel_clk_binding, sel_clk;
+
+	/* pre-nv17 off-chip tmds uses scripts, post nv17 doesn't */
+	if (cv >= 0x17 && cv != 0x1a && cv != 0x20 &&
+	    dcbent->location != DCB_LOC_ON_CHIP)
+		return 0;
+
+	switch (ffs(dcbent->or)) {
+	case 1:
+		clktable = bios->tmds.output0_script_ptr;
+		break;
+	case 2:
+	case 3:
+		clktable = bios->tmds.output1_script_ptr;
+		break;
+	}
+
+	if (!clktable) {
+		NV_ERROR(dev, "Pixel clock comparison table not found\n");
+		return -EINVAL;
+	}
+
+	scriptptr = clkcmptable(bios, clktable, pxclk);
+
+	if (!scriptptr) {
+		NV_ERROR(dev, "TMDS output init script not found\n");
+		return -ENOENT;
+	}
+
+	/* don't let script change pll->head binding */
+	sel_clk_binding = bios_rd32(bios, NV_PRAMDAC_SEL_CLK) & 0x50000;
+	run_digital_op_script(dev, scriptptr, dcbent, head, pxclk >= 165000);
+	sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK) & ~0x50000;
+	NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, sel_clk | sel_clk_binding);
+
+	return 0;
+}
+
+int get_pll_limits(struct drm_device *dev, uint32_t limit_match, struct pll_lims *pll_lim)
+{
+	/*
+	 * PLL limits table
+	 *
+	 * Version 0x10: NV30, NV31
+	 * One byte header (version), one record of 24 bytes
+	 * Version 0x11: NV36 - Not implemented
+	 * Seems to have same record style as 0x10, but 3 records rather than 1
+	 * Version 0x20: Found on Geforce 6 cards
+	 * Trivial 4 byte BIT header. 31 (0x1f) byte record length
+	 * Version 0x21: Found on Geforce 7, 8 and some Geforce 6 cards
+	 * 5 byte header, fifth byte of unknown purpose. 35 (0x23) byte record
+	 * length in general, some (integrated) have an extra configuration byte
+	 * Version 0x30: Found on Geforce 8, separates the register mapping
+	 * from the limits tables.
+	 */
+
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nvbios *bios = &dev_priv->VBIOS;
+	int cv = bios->pub.chip_version, pllindex = 0;
+	uint8_t pll_lim_ver = 0, headerlen = 0, recordlen = 0, entries = 0;
+	uint32_t crystal_strap_mask, crystal_straps;
+
+	if (!bios->pll_limit_tbl_ptr) {
+		if (cv == 0x30 || cv == 0x31 || cv == 0x35 || cv == 0x36 ||
+		    cv >= 0x40) {
+			NV_ERROR(dev, "Pointer to PLL limits table invalid\n");
+			return -EINVAL;
+		}
+	} else
+		pll_lim_ver = bios->data[bios->pll_limit_tbl_ptr];
+
+	crystal_strap_mask = 1 << 6;
+	/* open coded dev->twoHeads test */
+	if (cv > 0x10 && cv != 0x15 && cv != 0x1a && cv != 0x20)
+		crystal_strap_mask |= 1 << 22;
+	crystal_straps = nvReadEXTDEV(dev, NV_PEXTDEV_BOOT_0) &
+							crystal_strap_mask;
+
+	switch (pll_lim_ver) {
+	/*
+	 * We use version 0 to indicate a pre limit table bios (single stage
+	 * pll) and load the hard coded limits instead.
+	 */
+	case 0:
+		break;
+	case 0x10:
+	case 0x11:
+		/*
+		 * Strictly v0x11 has 3 entries, but the last two don't seem
+		 * to get used.
+		 */
+		headerlen = 1;
+		recordlen = 0x18;
+		entries = 1;
+		pllindex = 0;
+		break;
+	case 0x20:
+	case 0x21:
+	case 0x30:
+	case 0x40:
+		headerlen = bios->data[bios->pll_limit_tbl_ptr + 1];
+		recordlen = bios->data[bios->pll_limit_tbl_ptr + 2];
+		entries = bios->data[bios->pll_limit_tbl_ptr + 3];
+		break;
+	default:
+		NV_ERROR(dev, "PLL limits table revision 0x%X not currently "
+				"supported\n", pll_lim_ver);
+		return -ENOSYS;
+	}
+
+	/* initialize all members to zero */
+	memset(pll_lim, 0, sizeof(struct pll_lims));
+
+	if (pll_lim_ver == 0x10 || pll_lim_ver == 0x11) {
+		uint8_t *pll_rec = &bios->data[bios->pll_limit_tbl_ptr + headerlen + recordlen * pllindex];
+
+		pll_lim->vco1.minfreq = ROM32(pll_rec[0]);
+		pll_lim->vco1.maxfreq = ROM32(pll_rec[4]);
+		pll_lim->vco2.minfreq = ROM32(pll_rec[8]);
+		pll_lim->vco2.maxfreq = ROM32(pll_rec[12]);
+		pll_lim->vco1.min_inputfreq = ROM32(pll_rec[16]);
+		pll_lim->vco2.min_inputfreq = ROM32(pll_rec[20]);
+		pll_lim->vco1.max_inputfreq = pll_lim->vco2.max_inputfreq = INT_MAX;
+
+		/* these values taken from nv30/31/36 */
+		pll_lim->vco1.min_n = 0x1;
+		if (cv == 0x36)
+			pll_lim->vco1.min_n = 0x5;
+		pll_lim->vco1.max_n = 0xff;
+		pll_lim->vco1.min_m = 0x1;
+		pll_lim->vco1.max_m = 0xd;
+		pll_lim->vco2.min_n = 0x4;
+		/*
+		 * On nv30, 31, 36 (i.e. all cards with two stage PLLs with this
+		 * table version (apart from nv35)), N2 is compared to
+		 * maxN2 (0x46) and 10 * maxM2 (0x4), so set maxN2 to 0x28 and
+		 * save a comparison
+		 */
+		pll_lim->vco2.max_n = 0x28;
+		if (cv == 0x30 || cv == 0x35)
+			/* only 5 bits available for N2 on nv30/35 */
+			pll_lim->vco2.max_n = 0x1f;
+		pll_lim->vco2.min_m = 0x1;
+		pll_lim->vco2.max_m = 0x4;
+		pll_lim->max_log2p = 0x7;
+		pll_lim->max_usable_log2p = 0x6;
+	} else if (pll_lim_ver == 0x20 || pll_lim_ver == 0x21) {
+		uint16_t plloffs = bios->pll_limit_tbl_ptr + headerlen;
+		uint32_t reg = 0; /* default match */
+		uint8_t *pll_rec;
+		int i;
+
+		/*
+		 * First entry is default match, if nothing better. warn if
+		 * reg field nonzero
+		 */
+		if (ROM32(bios->data[plloffs]))
+			NV_WARN(dev, "Default PLL limit entry has non-zero "
+				       "register field\n");
+
+		if (limit_match > MAX_PLL_TYPES)
+			/* we've been passed a reg as the match */
+			reg = limit_match;
+		else /* limit match is a pll type */
+			for (i = 1; i < entries && !reg; i++) {
+				uint32_t cmpreg = ROM32(bios->data[plloffs + recordlen * i]);
+
+				if (limit_match == NVPLL &&
+				    (cmpreg == NV_PRAMDAC_NVPLL_COEFF || cmpreg == 0x4000))
+					reg = cmpreg;
+				if (limit_match == MPLL &&
+				    (cmpreg == NV_PRAMDAC_MPLL_COEFF || cmpreg == 0x4020))
+					reg = cmpreg;
+				if (limit_match == VPLL1 &&
+				    (cmpreg == NV_PRAMDAC_VPLL_COEFF || cmpreg == 0x4010))
+					reg = cmpreg;
+				if (limit_match == VPLL2 &&
+				    (cmpreg == NV_RAMDAC_VPLL2 || cmpreg == 0x4018))
+					reg = cmpreg;
+			}
+
+		for (i = 1; i < entries; i++)
+			if (ROM32(bios->data[plloffs + recordlen * i]) == reg) {
+				pllindex = i;
+				break;
+			}
+
+		pll_rec = &bios->data[plloffs + recordlen * pllindex];
+
+		BIOSLOG(bios, "Loading PLL limits for reg 0x%08x\n",
+			pllindex ? reg : 0);
+
+		/*
+		 * Frequencies are stored in tables in MHz, kHz are more
+		 * useful, so we convert.
+		 */
+
+		/* What output frequencies can each VCO generate? */
+		pll_lim->vco1.minfreq = ROM16(pll_rec[4]) * 1000;
+		pll_lim->vco1.maxfreq = ROM16(pll_rec[6]) * 1000;
+		pll_lim->vco2.minfreq = ROM16(pll_rec[8]) * 1000;
+		pll_lim->vco2.maxfreq = ROM16(pll_rec[10]) * 1000;
+
+		/* What input frequencies they accept (past the m-divider)? */
+		pll_lim->vco1.min_inputfreq = ROM16(pll_rec[12]) * 1000;
+		pll_lim->vco2.min_inputfreq = ROM16(pll_rec[14]) * 1000;
+		pll_lim->vco1.max_inputfreq = ROM16(pll_rec[16]) * 1000;
+		pll_lim->vco2.max_inputfreq = ROM16(pll_rec[18]) * 1000;
+
+		/* What values are accepted as multiplier and divider? */
+		pll_lim->vco1.min_n = pll_rec[20];
+		pll_lim->vco1.max_n = pll_rec[21];
+		pll_lim->vco1.min_m = pll_rec[22];
+		pll_lim->vco1.max_m = pll_rec[23];
+		pll_lim->vco2.min_n = pll_rec[24];
+		pll_lim->vco2.max_n = pll_rec[25];
+		pll_lim->vco2.min_m = pll_rec[26];
+		pll_lim->vco2.max_m = pll_rec[27];
+
+		pll_lim->max_usable_log2p = pll_lim->max_log2p = pll_rec[29];
+		if (pll_lim->max_log2p > 0x7)
+			/* pll decoding in nv_hw.c assumes never > 7 */
+			NV_WARN(dev, "Max log2 P value greater than 7 (%d)\n",
+				pll_lim->max_log2p);
+		if (cv < 0x60)
+			pll_lim->max_usable_log2p = 0x6;
+		pll_lim->log2p_bias = pll_rec[30];
+
+		if (recordlen > 0x22)
+			pll_lim->refclk = ROM32(pll_rec[31]);
+
+		if (recordlen > 0x23 && pll_rec[35])
+			NV_WARN(dev,
+				"Bits set in PLL configuration byte (%x)\n",
+				pll_rec[35]);
+
+		/* C51 special not seen elsewhere */
+		if (cv == 0x51 && !pll_lim->refclk) {
+			uint32_t sel_clk = bios_rd32(bios, NV_PRAMDAC_SEL_CLK);
+
+			if (((limit_match == NV_PRAMDAC_VPLL_COEFF || limit_match == VPLL1) && sel_clk & 0x20) ||
+			    ((limit_match == NV_RAMDAC_VPLL2 || limit_match == VPLL2) && sel_clk & 0x80)) {
+				if (bios_idxprt_rd(bios, NV_CIO_CRX__COLOR, NV_CIO_CRE_CHIP_ID_INDEX) < 0xa3)
+					pll_lim->refclk = 200000;
+				else
+					pll_lim->refclk = 25000;
+			}
+		}
+	} else if (pll_lim_ver == 0x30) { /* ver 0x30 */
+		uint8_t *entry = &bios->data[bios->pll_limit_tbl_ptr + headerlen];
+		uint8_t *record = NULL;
+		int i;
+
+		BIOSLOG(bios, "Loading PLL limits for register 0x%08x\n",
+			limit_match);
+
+		for (i = 0; i < entries; i++, entry += recordlen) {
+			if (ROM32(entry[3]) == limit_match) {
+				record = &bios->data[ROM16(entry[1])];
+				break;
+			}
+		}
+
+		if (!record) {
+			NV_ERROR(dev, "Register 0x%08x not found in PLL "
+				 "limits table", limit_match);
+			return -ENOENT;
+		}
+
+		pll_lim->vco1.minfreq = ROM16(record[0]) * 1000;
+		pll_lim->vco1.maxfreq = ROM16(record[2]) * 1000;
+		pll_lim->vco2.minfreq = ROM16(record[4]) * 1000;
+		pll_lim->vco2.maxfreq = ROM16(record[6]) * 1000;
+		pll_lim->vco1.min_inputfreq = ROM16(record[8]) * 1000;
+		pll_lim->vco2.min_inputfreq = ROM16(record[10]) * 1000;
+		pll_lim->vco1.max_inputfreq = ROM16(record[12]) * 1000;
+		pll_lim->vco2.max_inputfreq = ROM16(record[14]) * 1000;
+		pll_lim->vco1.min_n = record[16];
+		pll_lim->vco1.max_n = record[17];
+		pll_lim->vco1.min_m = record[18];
+		pll_lim->vco1.max_m = record[19];
+		pll_lim->vco2.min_n = record[20];
+		pll_lim->vco2.max_n = record[21];
+		pll_lim->vco2.min_m = record[22];
+		pll_lim->vco2.max_m = record[23];
+		pll_lim->max_usable_log2p = pll_lim->max_log2p = record[25];
+		pll_lim->log2p_bias = record[27];
+		pll_lim->refclk = ROM32(record[28]);
+	} else if (pll_lim_ver) { /* ver 0x40 */
+		uint8_t *entry = &bios->data[bios->pll_limit_tbl_ptr + headerlen];
+		uint8_t *record = NULL;
+		int i;
+
+		BIOSLOG(bios, "Loading PLL limits for register 0x%08x\n",
+			limit_match);
+
+		for (i = 0; i < entries; i++, entry += recordlen) {
+			if (ROM32(entry[3]) == limit_match) {
+				record = &bios->data[ROM16(entry[1])];
+				break;
+			}
+		}
+
+		if (!record) {
+			NV_ERROR(dev, "Register 0x%08x not found in PLL "
+				 "limits table", limit_match);
+			return -ENOENT;
+		}
+
+		pll_lim->vco1.minfreq = ROM16(record[0]) * 1000;
+		pll_lim->vco1.maxfreq = ROM16(record[2]) * 1000;
+		pll_lim->vco1.min_inputfreq = ROM16(record[4]) * 1000;
+		pll_lim->vco1.max_inputfreq = ROM16(record[6]) * 1000;
+		pll_lim->vco1.min_m = record[8];
+		pll_lim->vco1.max_m = record[9];
+		pll_lim->vco1.min_n = record[10];
+		pll_lim->vco1.max_n = record[11];
+		pll_lim->min_p = record[12];
+		pll_lim->max_p = record[13];
+		/* where did this go to?? */
+		if (limit_match == 0x00614100 || limit_match == 0x00614900)
+			pll_lim->refclk = 27000;
+		else
+			pll_lim->refclk = 100000;
+	}
+
+	/*
+	 * By now any valid limit table ought to have set a max frequency for
+	 * vco1, so if it's zero it's either a pre limit table bios, or one
+	 * with an empty limit table (seen on nv18)
+	 */
+	if (!pll_lim->vco1.maxfreq) {
+		pll_lim->vco1.minfreq = bios->fminvco;
+		pll_lim->vco1.maxfreq = bios->fmaxvco;
+		pll_lim->vco1.min_inputfreq = 0;
+		pll_lim->vco1.max_inputfreq = INT_MAX;
+		pll_lim->vco1.min_n = 0x1;
+		pll_lim->vco1.max_n = 0xff;
+		pll_lim->vco1.min_m = 0x1;
+		if (crystal_straps == 0) {
+			/* nv05 does this, nv11 doesn't, nv10 unknown */
+			if (cv < 0x11)
+				pll_lim->vco1.min_m = 0x7;
+			pll_lim->vco1.max_m = 0xd;
+		} else {
+			if (cv < 0x11)
+				pll_lim->vco1.min_m = 0x8;
+			pll_lim->vco1.max_m = 0xe;
+		}
+		if (cv < 0x17 || cv == 0x1a || cv == 0x20)
+			pll_lim->max_log2p = 4;
+		else
+			pll_lim->max_log2p = 5;
+		pll_lim->max_usable_log2p = pll_lim->max_log2p;
+	}
+
+	if (!pll_lim->refclk)
+		switch (crystal_straps) {
+		case 0:
+			pll_lim->refclk = 13500;
+			break;
+		case (1 << 6):
+			pll_lim->refclk = 14318;
+			break;
+		case (1 << 22):
+			pll_lim->refclk = 27000;
+			break;
+		case (1 << 22 | 1 << 6):
+			pll_lim->refclk = 25000;
+			break;
+		}
+
+#if 0 /* for easy debugging */
+	ErrorF("pll.vco1.minfreq: %d\n", pll_lim->vco1.minfreq);
+	ErrorF("pll.vco1.maxfreq: %d\n", pll_lim->vco1.maxfreq);
+	ErrorF("pll.vco2.minfreq: %d\n", pll_lim->vco2.minfreq);
+	ErrorF("pll.vco2.maxfreq: %d\n", pll_lim->vco2.maxfreq);
+
+	ErrorF("pll.vco1.min_inputfreq: %d\n", pll_lim->vco1.min_inputfreq);
+	ErrorF("pll.vco1.max_inputfreq: %d\n", pll_lim->vco1.max_inputfreq);
+	ErrorF("pll.vco2.min_inputfreq: %d\n", pll_lim->vco2.min_inputfreq);
+	ErrorF("pll.vco2.max_inputfreq: %d\n", pll_lim->vco2.max_inputfreq);
+
+	ErrorF("pll.vco1.min_n: %d\n", pll_lim->vco1.min_n);
+	ErrorF("pll.vco1.max_n: %d\n", pll_lim->vco1.max_n);
+	ErrorF("pll.vco1.min_m: %d\n", pll_lim->vco1.min_m);
+	ErrorF("pll.vco1.max_m: %d\n", pll_lim->vco1.max_m);
+	ErrorF("pll.vco2.min_n: %d\n", pll_lim->vco2.min_n);
+	ErrorF("pll.vco2.max_n: %d\n", pll_lim->vco2.max_n);
+	ErrorF("pll.vco2.min_m: %d\n", pll_lim->vco2.min_m);
+	ErrorF("pll.vco2.max_m: %d\n", pll_lim->vco2.max_m);
+
+	ErrorF("pll.max_log2p: %d\n", pll_lim->max_log2p);
+	ErrorF("pll.log2p_bias: %d\n", pll_lim->log2p_bias);
+
+	ErrorF("pll.refclk: %d\n", pll_lim->refclk);
+#endif
+
+	return 0;
+}
+
+static void parse_bios_version(struct drm_device *dev, struct nvbios *bios, uint16_t offset)
+{
+	/*
+	 * offset + 0  (8 bits): Micro version
+	 * offset + 1  (8 bits): Minor version
+	 * offset + 2  (8 bits): Chip version
+	 * offset + 3  (8 bits): Major version
+	 */
+
+	bios->major_version = bios->data[offset + 3];
+	bios->pub.chip_version = bios->data[offset + 2];
+	NV_TRACE(dev, "Bios version %02x.%02x.%02x.%02x\n",
+		 bios->data[offset + 3], bios->data[offset + 2],
+		 bios->data[offset + 1], bios->data[offset]);
+}
+
+static void parse_script_table_pointers(struct nvbios *bios, uint16_t offset)
+{
+	/*
+	 * Parses the init table segment for pointers used in script execution.
+	 *
+	 * offset + 0  (16 bits): init script tables pointer
+	 * offset + 2  (16 bits): macro index table pointer
+	 * offset + 4  (16 bits): macro table pointer
+	 * offset + 6  (16 bits): condition table pointer
+	 * offset + 8  (16 bits): io condition table pointer
+	 * offset + 10 (16 bits): io flag condition table pointer
+	 * offset + 12 (16 bits): init function table pointer
+	 */
+
+	bios->init_script_tbls_ptr = ROM16(bios->data[offset]);
+	bios->macro_index_tbl_ptr = ROM16(bios->data[offset + 2]);
+	bios->macro_tbl_ptr = ROM16(bios->data[offset + 4]);
+	bios->condition_tbl_ptr = ROM16(bios->data[offset + 6]);
+	bios->io_condition_tbl_ptr = ROM16(bios->data[offset + 8]);
+	bios->io_flag_condition_tbl_ptr = ROM16(bios->data[offset + 10]);
+	bios->init_function_tbl_ptr = ROM16(bios->data[offset + 12]);
+}
+
+static int parse_bit_A_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
+{
+	/*
+	 * Parses the load detect values for g80 cards.
+	 *
+	 * offset + 0 (16 bits): loadval table pointer
+	 */
+
+	uint16_t load_table_ptr;
+	uint8_t version, headerlen, entrylen, num_entries;
+
+	if (bitentry->length != 3) {
+		NV_ERROR(dev, "Do not understand BIT A table\n");
+		return -EINVAL;
+	}
+
+	load_table_ptr = ROM16(bios->data[bitentry->offset]);
+
+	if (load_table_ptr == 0x0) {
+		NV_ERROR(dev, "Pointer to BIT loadval table invalid\n");
+		return -EINVAL;
+	}
+
+	version = bios->data[load_table_ptr];
+
+	if (version != 0x10) {
+		NV_ERROR(dev, "BIT loadval table version %d.%d not supported\n",
+			 version >> 4, version & 0xF);
+		return -ENOSYS;
+	}
+
+	headerlen = bios->data[load_table_ptr + 1];
+	entrylen = bios->data[load_table_ptr + 2];
+	num_entries = bios->data[load_table_ptr + 3];
+
+	if (headerlen != 4 || entrylen != 4 || num_entries != 2) {
+		NV_ERROR(dev, "Do not understand BIT loadval table\n");
+		return -EINVAL;
+	}
+
+	/* First entry is normal dac, 2nd tv-out perhaps? */
+	bios->pub.dactestval = ROM32(bios->data[load_table_ptr + headerlen]) & 0x3ff;
+
+	return 0;
+}
+
+static int parse_bit_C_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
+{
+	/*
+	 * offset + 8  (16 bits): PLL limits table pointer
+	 *
+	 * There's more in here, but that's unknown.
+	 */
+
+	if (bitentry->length < 10) {
+		NV_ERROR(dev, "Do not understand BIT C table\n");
+		return -EINVAL;
+	}
+
+	bios->pll_limit_tbl_ptr = ROM16(bios->data[bitentry->offset + 8]);
+
+	return 0;
+}
+
+static int parse_bit_display_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
+{
+	/*
+	 * Parses the flat panel table segment that the bit entry points to.
+	 * Starting at bitentry->offset:
+	 *
+	 * offset + 0  (16 bits): ??? table pointer - seems to have 18 byte
+	 * records beginning with a freq.
+	 * offset + 2  (16 bits): mode table pointer
+	 */
+
+	if (bitentry->length != 4) {
+		NV_ERROR(dev, "Do not understand BIT display table\n");
+		return -EINVAL;
+	}
+
+	bios->fp.fptablepointer = ROM16(bios->data[bitentry->offset + 2]);
+
+	return 0;
+}
+
+static int parse_bit_init_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
+{
+	/*
+	 * Parses the init table segment that the bit entry points to.
+	 *
+	 * See parse_script_table_pointers for layout
+	 */
+
+	if (bitentry->length < 14) {
+		NV_ERROR(dev, "Do not understand init table\n");
+		return -EINVAL;
+	}
+
+	parse_script_table_pointers(bios, bitentry->offset);
+
+	if (bitentry->length >= 16)
+		bios->some_script_ptr = ROM16(bios->data[bitentry->offset + 14]);
+	if (bitentry->length >= 18)
+		bios->init96_tbl_ptr = ROM16(bios->data[bitentry->offset + 16]);
+
+	return 0;
+}
+
+static int parse_bit_i_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
+{
+	/*
+	 * BIT 'i' (info?) table
+	 *
+	 * offset + 0  (32 bits): BIOS version dword (as in B table)
+	 * offset + 5  (8  bits): BIOS feature byte (same as for BMP?)
+	 * offset + 13 (16 bits): pointer to table containing DAC load
+	 * detection comparison values
+	 *
+	 * There's other things in the table, purpose unknown
+	 */
+
+	uint16_t daccmpoffset;
+	uint8_t dacver, dacheaderlen;
+
+	if (bitentry->length < 6) {
+		NV_ERROR(dev, "BIT i table too short for needed information\n");
+		return -EINVAL;
+	}
+
+	parse_bios_version(dev, bios, bitentry->offset);
+
+	/*
+	 * bit 4 seems to indicate a mobile bios (doesn't suffer from BMP's
+	 * Quadro identity crisis), other bits possibly as for BMP feature byte
+	 */
+	bios->feature_byte = bios->data[bitentry->offset + 5];
+	bios->is_mobile = bios->feature_byte & FEATURE_MOBILE;
+
+	if (bitentry->length < 15) {
+		NV_WARN(dev, "BIT i table not long enough for DAC load "
+			       "detection comparison table\n");
+		return -EINVAL;
+	}
+
+	daccmpoffset = ROM16(bios->data[bitentry->offset + 13]);
+
+	/* doesn't exist on g80 */
+	if (!daccmpoffset)
+		return 0;
+
+	/*
+	 * The first value in the table, following the header, is the
+	 * comparison value, the second entry is a comparison value for
+	 * TV load detection.
+	 */
+
+	dacver = bios->data[daccmpoffset];
+	dacheaderlen = bios->data[daccmpoffset + 1];
+
+	if (dacver != 0x00 && dacver != 0x10) {
+		NV_WARN(dev, "DAC load detection comparison table version "
+			       "%d.%d not known\n", dacver >> 4, dacver & 0xf);
+		return -ENOSYS;
+	}
+
+	bios->pub.dactestval = ROM32(bios->data[daccmpoffset + dacheaderlen]);
+	bios->pub.tvdactestval = ROM32(bios->data[daccmpoffset + dacheaderlen + 4]);
+
+	return 0;
+}
+
+static int parse_bit_lvds_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
+{
+	/*
+	 * Parses the LVDS table segment that the bit entry points to.
+	 * Starting at bitentry->offset:
+	 *
+	 * offset + 0  (16 bits): LVDS strap xlate table pointer
+	 */
+
+	if (bitentry->length != 2) {
+		NV_ERROR(dev, "Do not understand BIT LVDS table\n");
+		return -EINVAL;
+	}
+
+	/*
+	 * No idea if it's still called the LVDS manufacturer table, but
+	 * the concept's close enough.
+	 */
+	bios->fp.lvdsmanufacturerpointer = ROM16(bios->data[bitentry->offset]);
+
+	return 0;
+}
+
+static int
+parse_bit_M_tbl_entry(struct drm_device *dev, struct nvbios *bios,
+		      struct bit_entry *bitentry)
+{
+	/*
+	 * offset + 2  (8  bits): number of options in an
+	 * 	INIT_RAM_RESTRICT_ZM_REG_GROUP opcode option set
+	 * offset + 3  (16 bits): pointer to strap xlate table for RAM
+	 * 	restrict option selection
+	 *
+	 * There's a bunch of bits in this table other than the RAM restrict
+	 * stuff that we don't use - their use currently unknown
+	 */
+
+	/*
+	 * Older bios versions don't have a sufficiently long table for
+	 * what we want
+	 */
+	if (bitentry->length < 0x5)
+		return 0;
+
+	if (bitentry->id[1] < 2) {
+		bios->ram_restrict_group_count = bios->data[bitentry->offset + 2];
+		bios->ram_restrict_tbl_ptr = ROM16(bios->data[bitentry->offset + 3]);
+	} else {
+		bios->ram_restrict_group_count = bios->data[bitentry->offset + 0];
+		bios->ram_restrict_tbl_ptr = ROM16(bios->data[bitentry->offset + 1]);
+	}
+
+	return 0;
+}
+
+static int parse_bit_tmds_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
+{
+	/*
+	 * Parses the pointer to the TMDS table
+	 *
+	 * Starting at bitentry->offset:
+	 *
+	 * offset + 0  (16 bits): TMDS table pointer
+	 *
+	 * The TMDS table is typically found just before the DCB table, with a
+	 * characteristic signature of 0x11,0x13 (1.1 being version, 0x13 being
+	 * length?)
+	 *
+	 * At offset +7 is a pointer to a script, which I don't know how to
+	 * run yet.
+	 * At offset +9 is a pointer to another script, likewise
+	 * Offset +11 has a pointer to a table where the first word is a pxclk
+	 * frequency and the second word a pointer to a script, which should be
+	 * run if the comparison pxclk frequency is less than the pxclk desired.
+	 * This repeats for decreasing comparison frequencies
+	 * Offset +13 has a pointer to a similar table
+	 * The selection of table (and possibly +7/+9 script) is dictated by
+	 * "or" from the DCB.
+	 */
+
+	uint16_t tmdstableptr, script1, script2;
+
+	if (bitentry->length != 2) {
+		NV_ERROR(dev, "Do not understand BIT TMDS table\n");
+		return -EINVAL;
+	}
+
+	tmdstableptr = ROM16(bios->data[bitentry->offset]);
+
+	if (tmdstableptr == 0x0) {
+		NV_ERROR(dev, "Pointer to TMDS table invalid\n");
+		return -EINVAL;
+	}
+
+	/* nv50+ has v2.0, but we don't parse it atm */
+	if (bios->data[tmdstableptr] != 0x11) {
+		NV_WARN(dev,
+			"TMDS table revision %d.%d not currently supported\n",
+			bios->data[tmdstableptr] >> 4, bios->data[tmdstableptr] & 0xf);
+		return -ENOSYS;
+	}
+
+	/*
+	 * These two scripts are odd: they don't seem to get run even when
+	 * they are not stubbed.
+	 */
+	script1 = ROM16(bios->data[tmdstableptr + 7]);
+	script2 = ROM16(bios->data[tmdstableptr + 9]);
+	if (bios->data[script1] != 'q' || bios->data[script2] != 'q')
+		NV_WARN(dev, "TMDS table script pointers not stubbed\n");
+
+	bios->tmds.output0_script_ptr = ROM16(bios->data[tmdstableptr + 11]);
+	bios->tmds.output1_script_ptr = ROM16(bios->data[tmdstableptr + 13]);
+
+	return 0;
+}
+
+static int
+parse_bit_U_tbl_entry(struct drm_device *dev, struct nvbios *bios,
+		      struct bit_entry *bitentry)
+{
+	/*
+	 * Parses the pointer to the G80 output script tables
+	 *
+	 * Starting at bitentry->offset:
+	 *
+	 * offset + 0  (16 bits): output script table pointer
+	 */
+
+	uint16_t outputscripttableptr;
+
+	if (bitentry->length != 3) {
+		NV_ERROR(dev, "Do not understand BIT U table\n");
+		return -EINVAL;
+	}
+
+	outputscripttableptr = ROM16(bios->data[bitentry->offset]);
+	bios->display.script_table_ptr = outputscripttableptr;
+	return 0;
+}
+
+static int
+parse_bit_displayport_tbl_entry(struct drm_device *dev, struct nvbios *bios,
+				struct bit_entry *bitentry)
+{
+	bios->display.dp_table_ptr = ROM16(bios->data[bitentry->offset]);
+	return 0;
+}
+
+struct bit_table {
+	const char id;
+	int (* const parse_fn)(struct drm_device *, struct nvbios *, struct bit_entry *);
+};
+
+#define BIT_TABLE(id, funcid) ((struct bit_table){ id, parse_bit_##funcid##_tbl_entry })
+
+static int
+parse_bit_table(struct nvbios *bios, const uint16_t bitoffset,
+		struct bit_table *table)
+{
+	struct drm_device *dev = bios->dev;
+	uint8_t maxentries = bios->data[bitoffset + 4];
+	int i, offset;
+	struct bit_entry bitentry;
+
+	for (i = 0, offset = bitoffset + 6; i < maxentries; i++, offset += 6) {
+		bitentry.id[0] = bios->data[offset];
+
+		if (bitentry.id[0] != table->id)
+			continue;
+
+		bitentry.id[1] = bios->data[offset + 1];
+		bitentry.length = ROM16(bios->data[offset + 2]);
+		bitentry.offset = ROM16(bios->data[offset + 4]);
+
+		return table->parse_fn(dev, bios, &bitentry);
+	}
+
+	NV_INFO(dev, "BIT table '%c' not found\n", table->id);
+	return -ENOSYS;
+}
+
+static int
+parse_bit_structure(struct nvbios *bios, const uint16_t bitoffset)
+{
+	int ret;
+
+	/*
+	 * The only restriction on parsing order currently is having 'i' first
+	 * for use of bios->*_version or bios->feature_byte while parsing;
+	 * functions shouldn't be actually *doing* anything apart from pulling
+	 * data from the image into the bios struct, thus no interdependencies
+	 */
+	ret = parse_bit_table(bios, bitoffset, &BIT_TABLE('i', i));
+	if (ret) /* info? */
+		return ret;
+	if (bios->major_version >= 0x60) /* g80+ */
+		parse_bit_table(bios, bitoffset, &BIT_TABLE('A', A));
+	ret = parse_bit_table(bios, bitoffset, &BIT_TABLE('C', C));
+	if (ret)
+		return ret;
+	parse_bit_table(bios, bitoffset, &BIT_TABLE('D', display));
+	ret = parse_bit_table(bios, bitoffset, &BIT_TABLE('I', init));
+	if (ret)
+		return ret;
+	parse_bit_table(bios, bitoffset, &BIT_TABLE('M', M)); /* memory? */
+	parse_bit_table(bios, bitoffset, &BIT_TABLE('L', lvds));
+	parse_bit_table(bios, bitoffset, &BIT_TABLE('T', tmds));
+	parse_bit_table(bios, bitoffset, &BIT_TABLE('U', U));
+	parse_bit_table(bios, bitoffset, &BIT_TABLE('d', displayport));
+
+	return 0;
+}
+
+static int parse_bmp_structure(struct drm_device *dev, struct nvbios *bios, unsigned int offset)
+{
+	/*
+	 * Parses the BMP structure for useful things, but does not act on them
+	 *
+	 * offset +   5: BMP major version
+	 * offset +   6: BMP minor version
+	 * offset +   9: BMP feature byte
+	 * offset +  10: BCD encoded BIOS version
+	 *
+	 * offset +  18: init script table pointer (for bios versions < 5.10h)
+	 * offset +  20: extra init script table pointer (for bios
+	 * versions < 5.10h)
+	 *
+	 * offset +  24: memory init table pointer (used on early bios versions)
+	 * offset +  26: SDR memory sequencing setup data table
+	 * offset +  28: DDR memory sequencing setup data table
+	 *
+	 * offset +  54: index of I2C CRTC pair to use for CRT output
+	 * offset +  55: index of I2C CRTC pair to use for TV output
+	 * offset +  56: index of I2C CRTC pair to use for flat panel output
+	 * offset +  58: write CRTC index for I2C pair 0
+	 * offset +  59: read CRTC index for I2C pair 0
+	 * offset +  60: write CRTC index for I2C pair 1
+	 * offset +  61: read CRTC index for I2C pair 1
+	 *
+	 * offset +  67: maximum internal PLL frequency (single stage PLL)
+	 * offset +  71: minimum internal PLL frequency (single stage PLL)
+	 *
+	 * offset +  75: script table pointers, as described in
+	 * parse_script_table_pointers
+	 *
+	 * offset +  89: TMDS single link output A table pointer
+	 * offset +  91: TMDS single link output B table pointer
+	 * offset +  95: LVDS single link output A table pointer
+	 * offset + 105: flat panel timings table pointer
+	 * offset + 107: flat panel strapping translation table pointer
+	 * offset + 117: LVDS manufacturer panel config table pointer
+	 * offset + 119: LVDS manufacturer strapping translation table pointer
+	 *
+	 * offset + 142: PLL limits table pointer
+	 *
+	 * offset + 156: minimum pixel clock for LVDS dual link
+	 */
+
+	uint8_t *bmp = &bios->data[offset], bmp_version_major, bmp_version_minor;
+	uint16_t bmplength;
+	uint16_t legacy_scripts_offset, legacy_i2c_offset;
+
+	/* load needed defaults in case we can't parse this info */
+	bios->bdcb.dcb.i2c[0].write = NV_CIO_CRE_DDC_WR__INDEX;
+	bios->bdcb.dcb.i2c[0].read = NV_CIO_CRE_DDC_STATUS__INDEX;
+	bios->bdcb.dcb.i2c[1].write = NV_CIO_CRE_DDC0_WR__INDEX;
+	bios->bdcb.dcb.i2c[1].read = NV_CIO_CRE_DDC0_STATUS__INDEX;
+	bios->pub.digital_min_front_porch = 0x4b;
+	bios->fmaxvco = 256000;
+	bios->fminvco = 128000;
+	bios->fp.duallink_transition_clk = 90000;
+
+	bmp_version_major = bmp[5];
+	bmp_version_minor = bmp[6];
+
+	NV_TRACE(dev, "BMP version %d.%d\n",
+		 bmp_version_major, bmp_version_minor);
+
+	/*
+	 * Make sure that 0x36 is blank and can't be mistaken for a DCB
+	 * pointer on early versions
+	 */
+	if (bmp_version_major < 5)
+		*(uint16_t *)&bios->data[0x36] = 0;
+
+	/*
+	 * Seems that the minor version was 1 for all major versions prior
+	 * to 5. Version 6 could theoretically exist, but I suspect BIT
+	 * happened instead.
+	 */
+	if ((bmp_version_major < 5 && bmp_version_minor != 1) || bmp_version_major > 5) {
+		NV_ERROR(dev, "You have an unsupported BMP version. "
+				"Please send in your bios\n");
+		return -ENOSYS;
+	}
+
+	if (bmp_version_major == 0)
+		/* nothing that's currently useful in this version */
+		return 0;
+	else if (bmp_version_major == 1)
+		bmplength = 44; /* exact for 1.01 */
+	else if (bmp_version_major == 2)
+		bmplength = 48; /* exact for 2.01 */
+	else if (bmp_version_major == 3)
+		bmplength = 54;
+		/* guessed - mem init tables added in this version */
+	else if (bmp_version_major == 4 || bmp_version_minor < 0x1)
+		/* don't know if 5.0 exists... */
+		bmplength = 62;
+		/* guessed - BMP I2C indices added in version 4*/
+	else if (bmp_version_minor < 0x6)
+		bmplength = 67; /* exact for 5.01 */
+	else if (bmp_version_minor < 0x10)
+		bmplength = 75; /* exact for 5.06 */
+	else if (bmp_version_minor == 0x10)
+		bmplength = 89; /* exact for 5.10h */
+	else if (bmp_version_minor < 0x14)
+		bmplength = 118; /* exact for 5.11h */
+	else if (bmp_version_minor < 0x24)
+		/*
+		 * Not sure of version where pll limits came in;
+		 * certainly exist by 0x24 though.
+		 */
+		/* length not exact: this is long enough to get lvds members */
+		bmplength = 123;
+	else if (bmp_version_minor < 0x27)
+		/*
+		 * Length not exact: this is long enough to get pll limit
+		 * member
+		 */
+		bmplength = 144;
+	else
+		/*
+		 * Length not exact: this is long enough to get dual link
+		 * transition clock.
+		 */
+		bmplength = 158;
+
+	/* checksum */
+	if (nv_cksum(bmp, 8)) {
+		NV_ERROR(dev, "Bad BMP checksum\n");
+		return -EINVAL;
+	}
+
+	/*
+	 * Bit 4 seems to indicate either a mobile bios or a quadro card --
+	 * mobile behaviour consistent (nv11+), quadro only seen nv18gl-nv36gl
+	 * (not nv10gl), bit 5 that the flat panel tables are present, and
+	 * bit 6 a tv bios.
+	 */
+	bios->feature_byte = bmp[9];
+
+	parse_bios_version(dev, bios, offset + 10);
+
+	if (bmp_version_major < 5 || bmp_version_minor < 0x10)
+		bios->old_style_init = true;
+	legacy_scripts_offset = 18;
+	if (bmp_version_major < 2)
+		legacy_scripts_offset -= 4;
+	bios->init_script_tbls_ptr = ROM16(bmp[legacy_scripts_offset]);
+	bios->extra_init_script_tbl_ptr = ROM16(bmp[legacy_scripts_offset + 2]);
+
+	if (bmp_version_major > 2) {	/* appears in BMP 3 */
+		bios->legacy.mem_init_tbl_ptr = ROM16(bmp[24]);
+		bios->legacy.sdr_seq_tbl_ptr = ROM16(bmp[26]);
+		bios->legacy.ddr_seq_tbl_ptr = ROM16(bmp[28]);
+	}
+
+	legacy_i2c_offset = 0x48;	/* BMP version 2 & 3 */
+	if (bmplength > 61)
+		legacy_i2c_offset = offset + 54;
+	bios->legacy.i2c_indices.crt = bios->data[legacy_i2c_offset];
+	bios->legacy.i2c_indices.tv = bios->data[legacy_i2c_offset + 1];
+	bios->legacy.i2c_indices.panel = bios->data[legacy_i2c_offset + 2];
+	bios->bdcb.dcb.i2c[0].write = bios->data[legacy_i2c_offset + 4];
+	bios->bdcb.dcb.i2c[0].read = bios->data[legacy_i2c_offset + 5];
+	bios->bdcb.dcb.i2c[1].write = bios->data[legacy_i2c_offset + 6];
+	bios->bdcb.dcb.i2c[1].read = bios->data[legacy_i2c_offset + 7];
+
+	if (bmplength > 74) {
+		bios->fmaxvco = ROM32(bmp[67]);
+		bios->fminvco = ROM32(bmp[71]);
+	}
+	if (bmplength > 88)
+		parse_script_table_pointers(bios, offset + 75);
+	if (bmplength > 94) {
+		bios->tmds.output0_script_ptr = ROM16(bmp[89]);
+		bios->tmds.output1_script_ptr = ROM16(bmp[91]);
+		/*
+		 * Never observed in use with lvds scripts, but is reused for
+		 * 18/24 bit panel interface default for EDID equipped panels
+		 * (if_is_24bit not set directly to avoid any oscillation).
+		 */
+		bios->legacy.lvds_single_a_script_ptr = ROM16(bmp[95]);
+	}
+	if (bmplength > 108) {
+		bios->fp.fptablepointer = ROM16(bmp[105]);
+		bios->fp.fpxlatetableptr = ROM16(bmp[107]);
+		bios->fp.xlatwidth = 1;
+	}
+	if (bmplength > 120) {
+		bios->fp.lvdsmanufacturerpointer = ROM16(bmp[117]);
+		bios->fp.fpxlatemanufacturertableptr = ROM16(bmp[119]);
+	}
+	if (bmplength > 143)
+		bios->pll_limit_tbl_ptr = ROM16(bmp[142]);
+
+	if (bmplength > 157)
+		bios->fp.duallink_transition_clk = ROM16(bmp[156]) * 10;
+
+	return 0;
+}
+
+static uint16_t findstr(uint8_t *data, int n, const uint8_t *str, int len)
+{
+	int i, j;
+
+	for (i = 0; i <= (n - len); i++) {
+		for (j = 0; j < len; j++)
+			if (data[i + j] != str[j])
+				break;
+		if (j == len)
+			return i;
+	}
+
+	return 0;
+}
+
+static int
+read_dcb_i2c_entry(struct drm_device *dev, int dcb_version, uint8_t *i2ctable, int index, struct dcb_i2c_entry *i2c)
+{
+	uint8_t dcb_i2c_ver = dcb_version, headerlen = 0, entry_len = 4;
+	int i2c_entries = DCB_MAX_NUM_I2C_ENTRIES;
+	int recordoffset = 0, rdofs = 1, wrofs = 0;
+	uint8_t port_type = 0;
+
+	if (!i2ctable)
+		return -EINVAL;
+
+	if (dcb_version >= 0x30) {
+		if (i2ctable[0] != dcb_version) /* necessary? */
+			NV_WARN(dev,
+				"DCB I2C table version mismatch (%02X vs %02X)\n",
+				i2ctable[0], dcb_version);
+		dcb_i2c_ver = i2ctable[0];
+		headerlen = i2ctable[1];
+		if (i2ctable[2] <= DCB_MAX_NUM_I2C_ENTRIES)
+			i2c_entries = i2ctable[2];
+		else
+			NV_WARN(dev,
+				"DCB I2C table has more entries than indexable "
+				"(%d entries, max index 15)\n", i2ctable[2]);
+		entry_len = i2ctable[3];
+		/* [4] is i2c_default_indices, read in parse_dcb_table() */
+	}
+	/*
+	 * It's your own fault if you call this function on a DCB 1.1 BIOS --
+	 * the test below is for DCB 1.2
+	 */
+	if (dcb_version < 0x14) {
+		recordoffset = 2;
+		rdofs = 0;
+		wrofs = 1;
+	}
+
+	if (index == 0xf)
+		return 0;
+	if (index > i2c_entries) {
+		NV_ERROR(dev, "DCB I2C index too big (%d > %d)\n",
+			 index, i2ctable[2]);
+		return -ENOENT;
+	}
+	if (i2ctable[headerlen + entry_len * index + 3] == 0xff) {
+		NV_ERROR(dev, "DCB I2C entry invalid\n");
+		return -EINVAL;
+	}
+
+	if (dcb_i2c_ver >= 0x30) {
+		port_type = i2ctable[headerlen + recordoffset + 3 + entry_len * index];
+
+		/*
+		 * Fixup for chips using same address offset for read and
+		 * write.
+		 */
+		if (port_type == 4)	/* seen on C51 */
+			rdofs = wrofs = 1;
+		if (port_type >= 5)	/* G80+ */
+			rdofs = wrofs = 0;
+	}
+
+	if (dcb_i2c_ver >= 0x40 && port_type != 5 && port_type != 6)
+		NV_WARN(dev, "DCB I2C table has port type %d\n", port_type);
+
+	i2c->port_type = port_type;
+	i2c->read = i2ctable[headerlen + recordoffset + rdofs + entry_len * index];
+	i2c->write = i2ctable[headerlen + recordoffset + wrofs + entry_len * index];
+
+	return 0;
+}
+
+static struct dcb_gpio_entry *
+new_gpio_entry(struct nvbios *bios)
+{
+	struct parsed_dcb_gpio *gpio = &bios->bdcb.gpio;
+
+	return &gpio->entry[gpio->entries++];
+}
+
+struct dcb_gpio_entry *
+nouveau_bios_gpio_entry(struct drm_device *dev, enum dcb_gpio_tag tag)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nvbios *bios = &dev_priv->VBIOS;
+	int i;
+
+	for (i = 0; i < bios->bdcb.gpio.entries; i++) {
+		if (bios->bdcb.gpio.entry[i].tag != tag)
+			continue;
+
+		return &bios->bdcb.gpio.entry[i];
+	}
+
+	return NULL;
+}
+
+static void
+parse_dcb30_gpio_entry(struct nvbios *bios, uint16_t offset)
+{
+	struct dcb_gpio_entry *gpio;
+	uint16_t ent = ROM16(bios->data[offset]);
+	uint8_t line = ent & 0x1f,
+		tag = ent >> 5 & 0x3f,
+		flags = ent >> 11 & 0x1f;
+
+	if (tag == 0x3f)
+		return;
+
+	gpio = new_gpio_entry(bios);
+
+	gpio->tag = tag;
+	gpio->line = line;
+	gpio->invert = flags != 4;
+}
+
+static void
+parse_dcb40_gpio_entry(struct nvbios *bios, uint16_t offset)
+{
+	struct dcb_gpio_entry *gpio;
+	uint32_t ent = ROM32(bios->data[offset]);
+	uint8_t line = ent & 0x1f,
+		tag = ent >> 8 & 0xff;
+
+	if (tag == 0xff)
+		return;
+
+	gpio = new_gpio_entry(bios);
+
+	/* Currently unused, we may need more fields parsed at some
+	 * point. */
+	gpio->tag = tag;
+	gpio->line = line;
+}
+
+static void
+parse_dcb_gpio_table(struct nvbios *bios)
+{
+	struct drm_device *dev = bios->dev;
+	uint16_t gpio_table_ptr = bios->bdcb.gpio_table_ptr;
+	uint8_t *gpio_table = &bios->data[gpio_table_ptr];
+	int header_len = gpio_table[1],
+	    entries = gpio_table[2],
+	    entry_len = gpio_table[3];
+	void (*parse_entry)(struct nvbios *, uint16_t) = NULL;
+	int i;
+
+	if (bios->bdcb.version >= 0x40) {
+		if (gpio_table_ptr && entry_len != 4) {
+			NV_WARN(dev, "Invalid DCB GPIO table entry length.\n");
+			return;
+		}
+
+		parse_entry = parse_dcb40_gpio_entry;
+
+	} else if (bios->bdcb.version >= 0x30) {
+		if (gpio_table_ptr && entry_len != 2) {
+			NV_WARN(dev, "Invalid DCB GPIO table entry length.\n");
+			return;
+		}
+
+		parse_entry = parse_dcb30_gpio_entry;
+
+	} else if (bios->bdcb.version >= 0x22) {
+		/*
+		 * DCBs older than v3.0 don't really have a GPIO
+		 * table, instead they keep some GPIO info at fixed
+		 * locations.
+		 */
+		uint16_t dcbptr = ROM16(bios->data[0x36]);
+		uint8_t *tvdac_gpio = &bios->data[dcbptr - 5];
+
+		if (tvdac_gpio[0] & 1) {
+			struct dcb_gpio_entry *gpio = new_gpio_entry(bios);
+
+			gpio->tag = DCB_GPIO_TVDAC0;
+			gpio->line = tvdac_gpio[1] >> 4;
+			gpio->invert = tvdac_gpio[0] & 2;
+		}
+	}
+
+	if (!gpio_table_ptr)
+		return;
+
+	if (entries > DCB_MAX_NUM_GPIO_ENTRIES) {
+		NV_WARN(dev, "Too many entries in the DCB GPIO table.\n");
+		entries = DCB_MAX_NUM_GPIO_ENTRIES;
+	}
+
+	for (i = 0; i < entries; i++)
+		parse_entry(bios, gpio_table_ptr + header_len + entry_len * i);
+}
+
+struct dcb_connector_table_entry *
+nouveau_bios_connector_entry(struct drm_device *dev, int index)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nvbios *bios = &dev_priv->VBIOS;
+	struct dcb_connector_table_entry *cte;
+
+	if (index >= bios->bdcb.connector.entries)
+		return NULL;
+
+	cte = &bios->bdcb.connector.entry[index];
+	if (cte->type == 0xff)
+		return NULL;
+
+	return cte;
+}
+
+static void
+parse_dcb_connector_table(struct nvbios *bios)
+{
+	struct drm_device *dev = bios->dev;
+	struct dcb_connector_table *ct = &bios->bdcb.connector;
+	struct dcb_connector_table_entry *cte;
+	uint8_t *conntab = &bios->data[bios->bdcb.connector_table_ptr];
+	uint8_t *entry;
+	int i;
+
+	if (!bios->bdcb.connector_table_ptr) {
+		NV_DEBUG_KMS(dev, "No DCB connector table present\n");
+		return;
+	}
+
+	NV_INFO(dev, "DCB connector table: VHER 0x%02x %d %d %d\n",
+		conntab[0], conntab[1], conntab[2], conntab[3]);
+	if ((conntab[0] != 0x30 && conntab[0] != 0x40) ||
+	    (conntab[3] != 2 && conntab[3] != 4)) {
+		NV_ERROR(dev, "  Unknown!  Please report.\n");
+		return;
+	}
+
+	ct->entries = conntab[2];
+
+	entry = conntab + conntab[1];
+	cte = &ct->entry[0];
+	for (i = 0; i < conntab[2]; i++, entry += conntab[3], cte++) {
+		if (conntab[3] == 2)
+			cte->entry = ROM16(entry[0]);
+		else
+			cte->entry = ROM32(entry[0]);
+		cte->type  = (cte->entry & 0x000000ff) >> 0;
+		cte->index = (cte->entry & 0x00000f00) >> 8;
+		switch (cte->entry & 0x00033000) {
+		case 0x00001000:
+			cte->gpio_tag = 0x07;
+			break;
+		case 0x00002000:
+			cte->gpio_tag = 0x08;
+			break;
+		case 0x00010000:
+			cte->gpio_tag = 0x51;
+			break;
+		case 0x00020000:
+			cte->gpio_tag = 0x52;
+			break;
+		default:
+			cte->gpio_tag = 0xff;
+			break;
+		}
+
+		if (cte->type == 0xff)
+			continue;
+
+		NV_INFO(dev, "  %d: 0x%08x: type 0x%02x idx %d tag 0x%02x\n",
+			i, cte->entry, cte->type, cte->index, cte->gpio_tag);
+	}
+}
+
+static struct dcb_entry *new_dcb_entry(struct parsed_dcb *dcb)
+{
+	struct dcb_entry *entry = &dcb->entry[dcb->entries];
+
+	memset(entry, 0, sizeof(struct dcb_entry));
+	entry->index = dcb->entries++;
+
+	return entry;
+}
+
+static void fabricate_vga_output(struct parsed_dcb *dcb, int i2c, int heads)
+{
+	struct dcb_entry *entry = new_dcb_entry(dcb);
+
+	entry->type = 0;
+	entry->i2c_index = i2c;
+	entry->heads = heads;
+	entry->location = DCB_LOC_ON_CHIP;
+	/* "or" mostly unused in early gen crt modesetting, 0 is fine */
+}
+
+static void fabricate_dvi_i_output(struct parsed_dcb *dcb, bool twoHeads)
+{
+	struct dcb_entry *entry = new_dcb_entry(dcb);
+
+	entry->type = 2;
+	entry->i2c_index = LEGACY_I2C_PANEL;
+	entry->heads = twoHeads ? 3 : 1;
+	entry->location = !DCB_LOC_ON_CHIP;	/* ie OFF CHIP */
+	entry->or = 1;	/* means |0x10 gets set on CRE_LCD__INDEX */
+	entry->duallink_possible = false; /* SiI164 and co. are single link */
+
+#if 0
+	/*
+	 * For dvi-a either crtc probably works, but my card appears to only
+	 * support dvi-d.  "nvidia" still attempts to program it for dvi-a,
+	 * doing the full fp output setup (program 0x6808.. fp dimension regs,
+	 * setting 0x680848 to 0x10000111 to enable, maybe setting 0x680880);
+	 * the monitor picks up the mode res ok and lights up, but no pixel
+	 * data appears, so the board manufacturer probably connected up the
+	 * sync lines, but missed the video traces / components
+	 *
+	 * with this introduction, dvi-a left as an exercise for the reader.
+	 */
+	fabricate_vga_output(dcb, LEGACY_I2C_PANEL, entry->heads);
+#endif
+}
+
+static void fabricate_tv_output(struct parsed_dcb *dcb, bool twoHeads)
+{
+	struct dcb_entry *entry = new_dcb_entry(dcb);
+
+	entry->type = 1;
+	entry->i2c_index = LEGACY_I2C_TV;
+	entry->heads = twoHeads ? 3 : 1;
+	entry->location = !DCB_LOC_ON_CHIP;	/* ie OFF CHIP */
+}
+
+static bool
+parse_dcb20_entry(struct drm_device *dev, struct bios_parsed_dcb *bdcb,
+		  uint32_t conn, uint32_t conf, struct dcb_entry *entry)
+{
+	entry->type = conn & 0xf;
+	entry->i2c_index = (conn >> 4) & 0xf;
+	entry->heads = (conn >> 8) & 0xf;
+	if (bdcb->version >= 0x40)
+		entry->connector = (conn >> 12) & 0xf;
+	entry->bus = (conn >> 16) & 0xf;
+	entry->location = (conn >> 20) & 0x3;
+	entry->or = (conn >> 24) & 0xf;
+	/*
+	 * Normal entries consist of a single bit, but dual link has the
+	 * next most significant bit set too
+	 */
+	entry->duallink_possible =
+			((1 << (ffs(entry->or) - 1)) * 3 == entry->or);
+
+	switch (entry->type) {
+	case OUTPUT_ANALOG:
+		/*
+		 * Although the rest of a CRT conf dword is usually
+		 * zeros, mac biosen have stuff there so we must mask
+		 */
+		entry->crtconf.maxfreq = (bdcb->version < 0x30) ?
+					 (conf & 0xffff) * 10 :
+					 (conf & 0xff) * 10000;
+		break;
+	case OUTPUT_LVDS:
+		{
+		uint32_t mask;
+		if (conf & 0x1)
+			entry->lvdsconf.use_straps_for_mode = true;
+		if (bdcb->version < 0x22) {
+			mask = ~0xd;
+			/*
+			 * The laptop in bug 14567 lies and claims to not use
+			 * straps when it does, so assume all DCB 2.0 laptops
+			 * use straps, until a broken EDID using one is produced
+			 */
+			entry->lvdsconf.use_straps_for_mode = true;
+			/*
+			 * Both 0x4 and 0x8 show up in v2.0 tables; assume they
+			 * mean the same thing (probably wrong, but might work)
+			 */
+			if (conf & 0x4 || conf & 0x8)
+				entry->lvdsconf.use_power_scripts = true;
+		} else {
+			mask = ~0x5;
+			if (conf & 0x4)
+				entry->lvdsconf.use_power_scripts = true;
+		}
+		if (conf & mask) {
+			/*
+			 * Until we even try to use these on G8x, it's
+			 * useless reporting unknown bits.  They all are.
+			 */
+			if (bdcb->version >= 0x40)
+				break;
+
+			NV_ERROR(dev, "Unknown LVDS configuration bits, "
+				      "please report\n");
+		}
+		break;
+		}
+	case OUTPUT_TV:
+	{
+		if (bdcb->version >= 0x30)
+			entry->tvconf.has_component_output = conf & (0x8 << 4);
+		else
+			entry->tvconf.has_component_output = false;
+
+		break;
+	}
+	case OUTPUT_DP:
+		entry->dpconf.sor.link = (conf & 0x00000030) >> 4;
+		entry->dpconf.link_bw = (conf & 0x00e00000) >> 21;
+		switch ((conf & 0x0f000000) >> 24) {
+		case 0xf:
+			entry->dpconf.link_nr = 4;
+			break;
+		case 0x3:
+			entry->dpconf.link_nr = 2;
+			break;
+		default:
+			entry->dpconf.link_nr = 1;
+			break;
+		}
+		break;
+	case OUTPUT_TMDS:
+		entry->tmdsconf.sor.link = (conf & 0x00000030) >> 4;
+		break;
+	case 0xe:
+		/* weird g80 mobile type that "nv" treats as a terminator */
+		bdcb->dcb.entries--;
+		return false;
+	}
+
+	/* unsure what DCB version introduces this, 3.0? */
+	if (conf & 0x100000)
+		entry->i2c_upper_default = true;
+
+	return true;
+}
+
+static bool
+parse_dcb15_entry(struct drm_device *dev, struct parsed_dcb *dcb,
+		  uint32_t conn, uint32_t conf, struct dcb_entry *entry)
+{
+	switch (conn & 0x0000000f) {
+	case 0:
+		entry->type = OUTPUT_ANALOG;
+		break;
+	case 1:
+		entry->type = OUTPUT_TV;
+		break;
+	case 2:
+	case 3:
+		entry->type = OUTPUT_LVDS;
+		break;
+	case 4:
+		switch ((conn & 0x000000f0) >> 4) {
+		case 0:
+			entry->type = OUTPUT_TMDS;
+			break;
+		case 1:
+			entry->type = OUTPUT_LVDS;
+			break;
+		default:
+			NV_ERROR(dev, "Unknown DCB subtype 4/%d\n",
+				 (conn & 0x000000f0) >> 4);
+			return false;
+		}
+		break;
+	default:
+		NV_ERROR(dev, "Unknown DCB type %d\n", conn & 0x0000000f);
+		return false;
+	}
+
+	entry->i2c_index = (conn & 0x0003c000) >> 14;
+	entry->heads = ((conn & 0x001c0000) >> 18) + 1;
+	entry->or = entry->heads; /* same as heads, hopefully safe enough */
+	entry->location = (conn & 0x01e00000) >> 21;
+	entry->bus = (conn & 0x0e000000) >> 25;
+	entry->duallink_possible = false;
+
+	switch (entry->type) {
+	case OUTPUT_ANALOG:
+		entry->crtconf.maxfreq = (conf & 0xffff) * 10;
+		break;
+	case OUTPUT_TV:
+		entry->tvconf.has_component_output = false;
+		break;
+	case OUTPUT_TMDS:
+		/*
+		 * Invent a DVI-A output, by copying the fields of the DVI-D
+		 * output; reported to work by math_b on an NV20(!).
+		 */
+		fabricate_vga_output(dcb, entry->i2c_index, entry->heads);
+		break;
+	case OUTPUT_LVDS:
+		if ((conn & 0x00003f00) != 0x10)
+			entry->lvdsconf.use_straps_for_mode = true;
+		entry->lvdsconf.use_power_scripts = true;
+		break;
+	default:
+		break;
+	}
+
+	return true;
+}
+
+static bool parse_dcb_entry(struct drm_device *dev, struct bios_parsed_dcb *bdcb,
+			    uint32_t conn, uint32_t conf)
+{
+	struct dcb_entry *entry = new_dcb_entry(&bdcb->dcb);
+	bool ret;
+
+	if (bdcb->version >= 0x20)
+		ret = parse_dcb20_entry(dev, bdcb, conn, conf, entry);
+	else
+		ret = parse_dcb15_entry(dev, &bdcb->dcb, conn, conf, entry);
+	if (!ret)
+		return ret;
+
+	read_dcb_i2c_entry(dev, bdcb->version, bdcb->i2c_table,
+			   entry->i2c_index, &bdcb->dcb.i2c[entry->i2c_index]);
+
+	return true;
+}
+
+static
+void merge_like_dcb_entries(struct drm_device *dev, struct parsed_dcb *dcb)
+{
+	/*
+	 * DCB v2.0 lists each output combination separately.
+	 * Here we merge compatible entries to have fewer outputs, with
+	 * more options
+	 */
+
+	int i, newentries = 0;
+
+	for (i = 0; i < dcb->entries; i++) {
+		struct dcb_entry *ient = &dcb->entry[i];
+		int j;
+
+		for (j = i + 1; j < dcb->entries; j++) {
+			struct dcb_entry *jent = &dcb->entry[j];
+
+			if (jent->type == 100) /* already merged entry */
+				continue;
+
+			/* merge heads field when all other fields the same */
+			if (jent->i2c_index == ient->i2c_index &&
+			    jent->type == ient->type &&
+			    jent->location == ient->location &&
+			    jent->or == ient->or) {
+				NV_TRACE(dev, "Merging DCB entries %d and %d\n",
+					 i, j);
+				ient->heads |= jent->heads;
+				jent->type = 100; /* dummy value */
+			}
+		}
+	}
+
+	/* Compact entries merged into others out of dcb */
+	for (i = 0; i < dcb->entries; i++) {
+		if (dcb->entry[i].type == 100)
+			continue;
+
+		if (newentries != i) {
+			dcb->entry[newentries] = dcb->entry[i];
+			dcb->entry[newentries].index = newentries;
+		}
+		newentries++;
+	}
+
+	dcb->entries = newentries;
+}
+
+static int
+parse_dcb_table(struct drm_device *dev, struct nvbios *bios, bool twoHeads)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct bios_parsed_dcb *bdcb = &bios->bdcb;
+	struct parsed_dcb *dcb;
+	uint16_t dcbptr = 0, i2ctabptr = 0;
+	uint8_t *dcbtable;
+	uint8_t headerlen = 0x4, entries = DCB_MAX_NUM_ENTRIES;
+	bool configblock = true;
+	int recordlength = 8, confofs = 4;
+	int i;
+
+	dcb = bios->pub.dcb = &bdcb->dcb;
+	dcb->entries = 0;
+
+	/* get the offset from 0x36 */
+	if (dev_priv->card_type > NV_04) {
+		dcbptr = ROM16(bios->data[0x36]);
+		if (dcbptr == 0x0000)
+			NV_WARN(dev, "No output data (DCB) found in BIOS\n");
+	}
+
+	/* this situation likely means a really old card, pre DCB */
+	if (dcbptr == 0x0) {
+		NV_INFO(dev, "Assuming a CRT output exists\n");
+		fabricate_vga_output(dcb, LEGACY_I2C_CRT, 1);
+
+		if (nv04_tv_identify(dev, bios->legacy.i2c_indices.tv) >= 0)
+			fabricate_tv_output(dcb, twoHeads);
+
+		return 0;
+	}
+
+	dcbtable = &bios->data[dcbptr];
+
+	/* get DCB version */
+	bdcb->version = dcbtable[0];
+	NV_TRACE(dev, "Found Display Configuration Block version %d.%d\n",
+		 bdcb->version >> 4, bdcb->version & 0xf);
+
+	if (bdcb->version >= 0x20) { /* NV17+ */
+		uint32_t sig;
+
+		if (bdcb->version >= 0x30) { /* NV40+ */
+			headerlen = dcbtable[1];
+			entries = dcbtable[2];
+			recordlength = dcbtable[3];
+			i2ctabptr = ROM16(dcbtable[4]);
+			sig = ROM32(dcbtable[6]);
+			bdcb->gpio_table_ptr = ROM16(dcbtable[10]);
+			bdcb->connector_table_ptr = ROM16(dcbtable[20]);
+		} else {
+			i2ctabptr = ROM16(dcbtable[2]);
+			sig = ROM32(dcbtable[4]);
+			headerlen = 8;
+		}
+
+		if (sig != 0x4edcbdcb) {
+			NV_ERROR(dev, "Bad Display Configuration Block "
+					"signature (%08X)\n", sig);
+			return -EINVAL;
+		}
+	} else if (bdcb->version >= 0x15) { /* some NV11 and NV20 */
+		char sig[8] = { 0 };
+
+		strncpy(sig, (char *)&dcbtable[-7], 7);
+		i2ctabptr = ROM16(dcbtable[2]);
+		recordlength = 10;
+		confofs = 6;
+
+		if (strcmp(sig, "DEV_REC")) {
+			NV_ERROR(dev, "Bad Display Configuration Block "
+					"signature (%s)\n", sig);
+			return -EINVAL;
+		}
+	} else {
+		/*
+		 * v1.4 (some NV15/16, NV11+) seems the same as v1.5, but always
+		 * has the same single (crt) entry, even when tv-out present, so
+		 * the conclusion is this version cannot really be used.
+		 * v1.2 tables (some NV6/10, and NV15+) normally have the same
+		 * 5 entries, which are not specific to the card and so no use.
+		 * v1.2 does have an I2C table that read_dcb_i2c_table can
+		 * handle, but cards exist (nv11 in #14821) with a bad i2c table
+		 * pointer, so use the indices parsed in parse_bmp_structure.
+		 * v1.1 (NV5+, maybe some NV4) is entirely unhelpful
+		 */
+		NV_TRACEWARN(dev, "No useful information in BIOS output table; "
+				  "adding all possible outputs\n");
+		fabricate_vga_output(dcb, LEGACY_I2C_CRT, 1);
+
+		/*
+		 * Attempt to detect TV before DVI because the test
+		 * for the former is more accurate and it rules the
+		 * latter out.
+		 */
+		if (nv04_tv_identify(dev,
+				     bios->legacy.i2c_indices.tv) >= 0)
+			fabricate_tv_output(dcb, twoHeads);
+
+		else if (bios->tmds.output0_script_ptr ||
+			 bios->tmds.output1_script_ptr)
+			fabricate_dvi_i_output(dcb, twoHeads);
+
+		return 0;
+	}
+
+	if (!i2ctabptr)
+		NV_WARN(dev, "No pointer to DCB I2C port table\n");
+	else {
+		bdcb->i2c_table = &bios->data[i2ctabptr];
+		if (bdcb->version >= 0x30)
+			bdcb->i2c_default_indices = bdcb->i2c_table[4];
+	}
+
+	parse_dcb_gpio_table(bios);
+	parse_dcb_connector_table(bios);
+
+	if (entries > DCB_MAX_NUM_ENTRIES)
+		entries = DCB_MAX_NUM_ENTRIES;
+
+	for (i = 0; i < entries; i++) {
+		uint32_t connection, config = 0;
+
+		connection = ROM32(dcbtable[headerlen + recordlength * i]);
+		if (configblock)
+			config = ROM32(dcbtable[headerlen + confofs + recordlength * i]);
+
+		/* seen on an NV11 with DCB v1.5 */
+		if (connection == 0x00000000)
+			break;
+
+		/* seen on an NV17 with DCB v2.0 */
+		if (connection == 0xffffffff)
+			break;
+
+		if ((connection & 0x0000000f) == 0x0000000f)
+			continue;
+
+		NV_TRACEWARN(dev, "Raw DCB entry %d: %08x %08x\n",
+			     dcb->entries, connection, config);
+
+		if (!parse_dcb_entry(dev, bdcb, connection, config))
+			break;
+	}
+
+	/*
+	 * apart for v2.1+ not being known for requiring merging, this
+	 * guarantees dcbent->index is the index of the entry in the rom image
+	 */
+	if (bdcb->version < 0x21)
+		merge_like_dcb_entries(dev, dcb);
+
+	return dcb->entries ? 0 : -ENXIO;
+}
+
+static void
+fixup_legacy_connector(struct nvbios *bios)
+{
+	struct bios_parsed_dcb *bdcb = &bios->bdcb;
+	struct parsed_dcb *dcb = &bdcb->dcb;
+	int high = 0, i;
+
+	/*
+	 * DCB 3.0 also has the table in most cases, but there are some cards
+	 * where the table is filled with stub entries, and the DCB entriy
+	 * indices are all 0.  We don't need the connector indices on pre-G80
+	 * chips (yet?) so limit the use to DCB 4.0 and above.
+	 */
+	if (bdcb->version >= 0x40)
+		return;
+
+	/*
+	 * No known connector info before v3.0, so make it up.  the rule here
+	 * is: anything on the same i2c bus is considered to be on the same
+	 * connector.  any output without an associated i2c bus is assigned
+	 * its own unique connector index.
+	 */
+	for (i = 0; i < dcb->entries; i++) {
+		if (dcb->entry[i].i2c_index == 0xf)
+			continue;
+
+		/*
+		 * Ignore the I2C index for on-chip TV-out, as there
+		 * are cards with bogus values (nv31m in bug 23212),
+		 * and it's otherwise useless.
+		 */
+		if (dcb->entry[i].type == OUTPUT_TV &&
+		    dcb->entry[i].location == DCB_LOC_ON_CHIP) {
+			dcb->entry[i].i2c_index = 0xf;
+			continue;
+		}
+
+		dcb->entry[i].connector = dcb->entry[i].i2c_index;
+		if (dcb->entry[i].connector > high)
+			high = dcb->entry[i].connector;
+	}
+
+	for (i = 0; i < dcb->entries; i++) {
+		if (dcb->entry[i].i2c_index != 0xf)
+			continue;
+
+		dcb->entry[i].connector = ++high;
+	}
+}
+
+static void
+fixup_legacy_i2c(struct nvbios *bios)
+{
+	struct parsed_dcb *dcb = &bios->bdcb.dcb;
+	int i;
+
+	for (i = 0; i < dcb->entries; i++) {
+		if (dcb->entry[i].i2c_index == LEGACY_I2C_CRT)
+			dcb->entry[i].i2c_index = bios->legacy.i2c_indices.crt;
+		if (dcb->entry[i].i2c_index == LEGACY_I2C_PANEL)
+			dcb->entry[i].i2c_index = bios->legacy.i2c_indices.panel;
+		if (dcb->entry[i].i2c_index == LEGACY_I2C_TV)
+			dcb->entry[i].i2c_index = bios->legacy.i2c_indices.tv;
+	}
+}
+
+static int load_nv17_hwsq_ucode_entry(struct drm_device *dev, struct nvbios *bios, uint16_t hwsq_offset, int entry)
+{
+	/*
+	 * The header following the "HWSQ" signature has the number of entries,
+	 * and the entry size
+	 *
+	 * An entry consists of a dword to write to the sequencer control reg
+	 * (0x00001304), followed by the ucode bytes, written sequentially,
+	 * starting at reg 0x00001400
+	 */
+
+	uint8_t bytes_to_write;
+	uint16_t hwsq_entry_offset;
+	int i;
+
+	if (bios->data[hwsq_offset] <= entry) {
+		NV_ERROR(dev, "Too few entries in HW sequencer table for "
+				"requested entry\n");
+		return -ENOENT;
+	}
+
+	bytes_to_write = bios->data[hwsq_offset + 1];
+
+	if (bytes_to_write != 36) {
+		NV_ERROR(dev, "Unknown HW sequencer entry size\n");
+		return -EINVAL;
+	}
+
+	NV_TRACE(dev, "Loading NV17 power sequencing microcode\n");
+
+	hwsq_entry_offset = hwsq_offset + 2 + entry * bytes_to_write;
+
+	/* set sequencer control */
+	bios_wr32(bios, 0x00001304, ROM32(bios->data[hwsq_entry_offset]));
+	bytes_to_write -= 4;
+
+	/* write ucode */
+	for (i = 0; i < bytes_to_write; i += 4)
+		bios_wr32(bios, 0x00001400 + i, ROM32(bios->data[hwsq_entry_offset + i + 4]));
+
+	/* twiddle NV_PBUS_DEBUG_4 */
+	bios_wr32(bios, NV_PBUS_DEBUG_4, bios_rd32(bios, NV_PBUS_DEBUG_4) | 0x18);
+
+	return 0;
+}
+
+static int load_nv17_hw_sequencer_ucode(struct drm_device *dev,
+					struct nvbios *bios)
+{
+	/*
+	 * BMP based cards, from NV17, need a microcode loading to correctly
+	 * control the GPIO etc for LVDS panels
+	 *
+	 * BIT based cards seem to do this directly in the init scripts
+	 *
+	 * The microcode entries are found by the "HWSQ" signature.
+	 */
+
+	const uint8_t hwsq_signature[] = { 'H', 'W', 'S', 'Q' };
+	const int sz = sizeof(hwsq_signature);
+	int hwsq_offset;
+
+	hwsq_offset = findstr(bios->data, bios->length, hwsq_signature, sz);
+	if (!hwsq_offset)
+		return 0;
+
+	/* always use entry 0? */
+	return load_nv17_hwsq_ucode_entry(dev, bios, hwsq_offset + sz, 0);
+}
+
+uint8_t *nouveau_bios_embedded_edid(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nvbios *bios = &dev_priv->VBIOS;
+	const uint8_t edid_sig[] = {
+			0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 };
+	uint16_t offset = 0;
+	uint16_t newoffset;
+	int searchlen = NV_PROM_SIZE;
+
+	if (bios->fp.edid)
+		return bios->fp.edid;
+
+	while (searchlen) {
+		newoffset = findstr(&bios->data[offset], searchlen,
+								edid_sig, 8);
+		if (!newoffset)
+			return NULL;
+		offset += newoffset;
+		if (!nv_cksum(&bios->data[offset], EDID1_LEN))
+			break;
+
+		searchlen -= offset;
+		offset++;
+	}
+
+	NV_TRACE(dev, "Found EDID in BIOS\n");
+
+	return bios->fp.edid = &bios->data[offset];
+}
+
+void
+nouveau_bios_run_init_table(struct drm_device *dev, uint16_t table,
+			    struct dcb_entry *dcbent)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nvbios *bios = &dev_priv->VBIOS;
+	struct init_exec iexec = { true, false };
+
+	mutex_lock(&bios->lock);
+	bios->display.output = dcbent;
+	parse_init_table(bios, table, &iexec);
+	bios->display.output = NULL;
+	mutex_unlock(&bios->lock);
+}
+
+static bool NVInitVBIOS(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nvbios *bios = &dev_priv->VBIOS;
+
+	memset(bios, 0, sizeof(struct nvbios));
+	mutex_init(&bios->lock);
+	bios->dev = dev;
+
+	if (!NVShadowVBIOS(dev, bios->data))
+		return false;
+
+	bios->length = NV_PROM_SIZE;
+	return true;
+}
+
+static int nouveau_parse_vbios_struct(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nvbios *bios = &dev_priv->VBIOS;
+	const uint8_t bit_signature[] = { 0xff, 0xb8, 'B', 'I', 'T' };
+	const uint8_t bmp_signature[] = { 0xff, 0x7f, 'N', 'V', 0x0 };
+	int offset;
+
+	offset = findstr(bios->data, bios->length,
+					bit_signature, sizeof(bit_signature));
+	if (offset) {
+		NV_TRACE(dev, "BIT BIOS found\n");
+		return parse_bit_structure(bios, offset + 6);
+	}
+
+	offset = findstr(bios->data, bios->length,
+					bmp_signature, sizeof(bmp_signature));
+	if (offset) {
+		NV_TRACE(dev, "BMP BIOS found\n");
+		return parse_bmp_structure(dev, bios, offset);
+	}
+
+	NV_ERROR(dev, "No known BIOS signature found\n");
+	return -ENODEV;
+}
+
+int
+nouveau_run_vbios_init(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nvbios *bios = &dev_priv->VBIOS;
+	int i, ret = 0;
+
+	NVLockVgaCrtcs(dev, false);
+	if (nv_two_heads(dev))
+		NVSetOwner(dev, bios->state.crtchead);
+
+	if (bios->major_version < 5)	/* BMP only */
+		load_nv17_hw_sequencer_ucode(dev, bios);
+
+	if (bios->execute) {
+		bios->fp.last_script_invoc = 0;
+		bios->fp.lvds_init_run = false;
+	}
+
+	parse_init_tables(bios);
+
+	/*
+	 * Runs some additional script seen on G8x VBIOSen.  The VBIOS'
+	 * parser will run this right after the init tables, the binary
+	 * driver appears to run it at some point later.
+	 */
+	if (bios->some_script_ptr) {
+		struct init_exec iexec = {true, false};
+
+		NV_INFO(dev, "Parsing VBIOS init table at offset 0x%04X\n",
+			bios->some_script_ptr);
+		parse_init_table(bios, bios->some_script_ptr, &iexec);
+	}
+
+	if (dev_priv->card_type >= NV_50) {
+		for (i = 0; i < bios->bdcb.dcb.entries; i++) {
+			nouveau_bios_run_display_table(dev,
+						       &bios->bdcb.dcb.entry[i],
+						       0, 0);
+		}
+	}
+
+	NVLockVgaCrtcs(dev, true);
+
+	return ret;
+}
+
+static void
+nouveau_bios_i2c_devices_takedown(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nvbios *bios = &dev_priv->VBIOS;
+	struct dcb_i2c_entry *entry;
+	int i;
+
+	entry = &bios->bdcb.dcb.i2c[0];
+	for (i = 0; i < DCB_MAX_NUM_I2C_ENTRIES; i++, entry++)
+		nouveau_i2c_fini(dev, entry);
+}
+
+int
+nouveau_bios_init(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nvbios *bios = &dev_priv->VBIOS;
+	uint32_t saved_nv_pextdev_boot_0;
+	bool was_locked;
+	int ret;
+
+	dev_priv->vbios = &bios->pub;
+
+	if (!NVInitVBIOS(dev))
+		return -ENODEV;
+
+	ret = nouveau_parse_vbios_struct(dev);
+	if (ret)
+		return ret;
+
+	ret = parse_dcb_table(dev, bios, nv_two_heads(dev));
+	if (ret)
+		return ret;
+
+	fixup_legacy_i2c(bios);
+	fixup_legacy_connector(bios);
+
+	if (!bios->major_version)	/* we don't run version 0 bios */
+		return 0;
+
+	/* these will need remembering across a suspend */
+	saved_nv_pextdev_boot_0 = bios_rd32(bios, NV_PEXTDEV_BOOT_0);
+	bios->state.saved_nv_pfb_cfg0 = bios_rd32(bios, NV_PFB_CFG0);
+
+	/* init script execution disabled */
+	bios->execute = false;
+
+	/* ... unless card isn't POSTed already */
+	if (dev_priv->card_type >= NV_10 &&
+	    NVReadVgaCrtc(dev, 0, 0x00) == 0 &&
+	    NVReadVgaCrtc(dev, 0, 0x1a) == 0) {
+		NV_INFO(dev, "Adaptor not initialised\n");
+		if (dev_priv->card_type < NV_50) {
+			NV_ERROR(dev, "Unable to POST this chipset\n");
+			return -ENODEV;
+		}
+
+		NV_INFO(dev, "Running VBIOS init tables\n");
+		bios->execute = true;
+	}
+
+	bios_wr32(bios, NV_PEXTDEV_BOOT_0, saved_nv_pextdev_boot_0);
+
+	ret = nouveau_run_vbios_init(dev);
+	if (ret) {
+		dev_priv->vbios = NULL;
+		return ret;
+	}
+
+	/* feature_byte on BMP is poor, but init always sets CR4B */
+	was_locked = NVLockVgaCrtcs(dev, false);
+	if (bios->major_version < 5)
+		bios->is_mobile = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_4B) & 0x40;
+
+	/* all BIT systems need p_f_m_t for digital_min_front_porch */
+	if (bios->is_mobile || bios->major_version >= 5)
+		ret = parse_fp_mode_table(dev, bios);
+	NVLockVgaCrtcs(dev, was_locked);
+
+	/* allow subsequent scripts to execute */
+	bios->execute = true;
+
+	return 0;
+}
+
+void
+nouveau_bios_takedown(struct drm_device *dev)
+{
+	nouveau_bios_i2c_devices_takedown(dev);
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv50_cursor.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv50_cursor.c
@@ -0,0 +1,156 @@
+/*
+ * Copyright (C) 2008 Maarten Maathuis.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include "drmP.h"
+#include "drm_mode.h"
+
+#define NOUVEAU_DMA_DEBUG (nouveau_reg_debug & NOUVEAU_REG_DEBUG_EVO)
+#include "nouveau_reg.h"
+#include "nouveau_drv.h"
+#include "nouveau_crtc.h"
+#include "nv50_display.h"
+
+static void
+nv50_cursor_show(struct nouveau_crtc *nv_crtc, bool update)
+{
+	struct drm_nouveau_private *dev_priv = nv_crtc->base.dev->dev_private;
+	struct nouveau_channel *evo = dev_priv->evo;
+	struct drm_device *dev = nv_crtc->base.dev;
+	int ret;
+
+	NV_DEBUG_KMS(dev, "\n");
+
+	if (update && nv_crtc->cursor.visible)
+		return;
+
+	ret = RING_SPACE(evo, (dev_priv->chipset != 0x50 ? 5 : 3) + update * 2);
+	if (ret) {
+		NV_ERROR(dev, "no space while unhiding cursor\n");
+		return;
+	}
+
+	if (dev_priv->chipset != 0x50) {
+		BEGIN_RING(evo, 0, NV84_EVO_CRTC(nv_crtc->index, CURSOR_DMA), 1);
+		OUT_RING(evo, NvEvoVRAM);
+	}
+	BEGIN_RING(evo, 0, NV50_EVO_CRTC(nv_crtc->index, CURSOR_CTRL), 2);
+	OUT_RING(evo, NV50_EVO_CRTC_CURSOR_CTRL_SHOW);
+	OUT_RING(evo, nv_crtc->cursor.offset >> 8);
+
+	if (update) {
+		BEGIN_RING(evo, 0, NV50_EVO_UPDATE, 1);
+		OUT_RING(evo, 0);
+		FIRE_RING(evo);
+		nv_crtc->cursor.visible = true;
+	}
+}
+
+static void
+nv50_cursor_hide(struct nouveau_crtc *nv_crtc, bool update)
+{
+	struct drm_nouveau_private *dev_priv = nv_crtc->base.dev->dev_private;
+	struct nouveau_channel *evo = dev_priv->evo;
+	struct drm_device *dev = nv_crtc->base.dev;
+	int ret;
+
+	NV_DEBUG_KMS(dev, "\n");
+
+	if (update && !nv_crtc->cursor.visible)
+		return;
+
+	ret = RING_SPACE(evo, (dev_priv->chipset != 0x50 ? 5 : 3) + update * 2);
+	if (ret) {
+		NV_ERROR(dev, "no space while hiding cursor\n");
+		return;
+	}
+	BEGIN_RING(evo, 0, NV50_EVO_CRTC(nv_crtc->index, CURSOR_CTRL), 2);
+	OUT_RING(evo, NV50_EVO_CRTC_CURSOR_CTRL_HIDE);
+	OUT_RING(evo, 0);
+	if (dev_priv->chipset != 0x50) {
+		BEGIN_RING(evo, 0, NV84_EVO_CRTC(nv_crtc->index, CURSOR_DMA), 1);
+		OUT_RING(evo, NV84_EVO_CRTC_CURSOR_DMA_HANDLE_NONE);
+	}
+
+	if (update) {
+		BEGIN_RING(evo, 0, NV50_EVO_UPDATE, 1);
+		OUT_RING(evo, 0);
+		FIRE_RING(evo);
+		nv_crtc->cursor.visible = false;
+	}
+}
+
+static void
+nv50_cursor_set_pos(struct nouveau_crtc *nv_crtc, int x, int y)
+{
+	struct drm_device *dev = nv_crtc->base.dev;
+
+	nv_wr32(dev, NV50_PDISPLAY_CURSOR_USER_POS(nv_crtc->index),
+		((y & 0xFFFF) << 16) | (x & 0xFFFF));
+	/* Needed to make the cursor move. */
+	nv_wr32(dev, NV50_PDISPLAY_CURSOR_USER_POS_CTRL(nv_crtc->index), 0);
+}
+
+static void
+nv50_cursor_set_offset(struct nouveau_crtc *nv_crtc, uint32_t offset)
+{
+	NV_DEBUG_KMS(nv_crtc->base.dev, "\n");
+	if (offset == nv_crtc->cursor.offset)
+		return;
+
+	nv_crtc->cursor.offset = offset;
+	if (nv_crtc->cursor.visible) {
+		nv_crtc->cursor.visible = false;
+		nv_crtc->cursor.show(nv_crtc, true);
+	}
+}
+
+int
+nv50_cursor_init(struct nouveau_crtc *nv_crtc)
+{
+	nv_crtc->cursor.set_offset = nv50_cursor_set_offset;
+	nv_crtc->cursor.set_pos = nv50_cursor_set_pos;
+	nv_crtc->cursor.hide = nv50_cursor_hide;
+	nv_crtc->cursor.show = nv50_cursor_show;
+	return 0;
+}
+
+void
+nv50_cursor_fini(struct nouveau_crtc *nv_crtc)
+{
+	struct drm_device *dev = nv_crtc->base.dev;
+	int idx = nv_crtc->index;
+
+	NV_DEBUG_KMS(dev, "\n");
+
+	nv_wr32(dev, NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(idx), 0);
+	if (!nv_wait(NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(idx),
+		     NV50_PDISPLAY_CURSOR_CURSOR_CTRL2_STATUS, 0)) {
+		NV_ERROR(dev, "timeout: CURSOR_CTRL2_STATUS == 0\n");
+		NV_ERROR(dev, "CURSOR_CTRL2 = 0x%08x\n",
+			 nv_rd32(dev, NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(idx)));
+	}
+}
+
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv50_sor.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv50_sor.c
@@ -0,0 +1,323 @@
+/*
+ * Copyright (C) 2008 Maarten Maathuis.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include "drmP.h"
+#include "drm_crtc_helper.h"
+
+#define NOUVEAU_DMA_DEBUG (nouveau_reg_debug & NOUVEAU_REG_DEBUG_EVO)
+#include "nouveau_reg.h"
+#include "nouveau_drv.h"
+#include "nouveau_dma.h"
+#include "nouveau_encoder.h"
+#include "nouveau_connector.h"
+#include "nouveau_crtc.h"
+#include "nv50_display.h"
+
+static void
+nv50_sor_disconnect(struct nouveau_encoder *nv_encoder)
+{
+	struct drm_device *dev = to_drm_encoder(nv_encoder)->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_channel *evo = dev_priv->evo;
+	int ret;
+
+	NV_DEBUG_KMS(dev, "Disconnecting SOR %d\n", nv_encoder->or);
+
+	ret = RING_SPACE(evo, 2);
+	if (ret) {
+		NV_ERROR(dev, "no space while disconnecting SOR\n");
+		return;
+	}
+	BEGIN_RING(evo, 0, NV50_EVO_SOR(nv_encoder->or, MODE_CTRL), 1);
+	OUT_RING(evo, 0);
+}
+
+static void
+nv50_sor_dp_link_train(struct drm_encoder *encoder)
+{
+	struct drm_device *dev = encoder->dev;
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+	struct bit_displayport_encoder_table *dpe;
+	int dpe_headerlen;
+
+	dpe = nouveau_bios_dp_table(dev, nv_encoder->dcb, &dpe_headerlen);
+	if (!dpe) {
+		NV_ERROR(dev, "SOR-%d: no DP encoder table!\n", nv_encoder->or);
+		return;
+	}
+
+	if (dpe->script0) {
+		NV_DEBUG_KMS(dev, "SOR-%d: running DP script 0\n", nv_encoder->or);
+		nouveau_bios_run_init_table(dev, le16_to_cpu(dpe->script0),
+					    nv_encoder->dcb);
+	}
+
+	if (!nouveau_dp_link_train(encoder))
+		NV_ERROR(dev, "SOR-%d: link training failed\n", nv_encoder->or);
+
+	if (dpe->script1) {
+		NV_DEBUG_KMS(dev, "SOR-%d: running DP script 1\n", nv_encoder->or);
+		nouveau_bios_run_init_table(dev, le16_to_cpu(dpe->script1),
+					    nv_encoder->dcb);
+	}
+}
+
+static void
+nv50_sor_dpms(struct drm_encoder *encoder, int mode)
+{
+	struct drm_device *dev = encoder->dev;
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+	struct drm_encoder *enc;
+	uint32_t val;
+	int or = nv_encoder->or;
+
+	NV_DEBUG_KMS(dev, "or %d mode %d\n", or, mode);
+
+	nv_encoder->last_dpms = mode;
+	list_for_each_entry(enc, &dev->mode_config.encoder_list, head) {
+		struct nouveau_encoder *nvenc = nouveau_encoder(enc);
+
+		if (nvenc == nv_encoder ||
+		    nvenc->disconnect != nv50_sor_disconnect ||
+		    nvenc->dcb->or != nv_encoder->dcb->or)
+			continue;
+
+		if (nvenc->last_dpms == DRM_MODE_DPMS_ON)
+			return;
+	}
+
+	/* wait for it to be done */
+	if (!nv_wait(NV50_PDISPLAY_SOR_DPMS_CTRL(or),
+		     NV50_PDISPLAY_SOR_DPMS_CTRL_PENDING, 0)) {
+		NV_ERROR(dev, "timeout: SOR_DPMS_CTRL_PENDING(%d) == 0\n", or);
+		NV_ERROR(dev, "SOR_DPMS_CTRL(%d) = 0x%08x\n", or,
+			 nv_rd32(dev, NV50_PDISPLAY_SOR_DPMS_CTRL(or)));
+	}
+
+	val = nv_rd32(dev, NV50_PDISPLAY_SOR_DPMS_CTRL(or));
+
+	if (mode == DRM_MODE_DPMS_ON)
+		val |= NV50_PDISPLAY_SOR_DPMS_CTRL_ON;
+	else
+		val &= ~NV50_PDISPLAY_SOR_DPMS_CTRL_ON;
+
+	nv_wr32(dev, NV50_PDISPLAY_SOR_DPMS_CTRL(or), val |
+		NV50_PDISPLAY_SOR_DPMS_CTRL_PENDING);
+	if (!nv_wait(NV50_PDISPLAY_SOR_DPMS_STATE(or),
+		     NV50_PDISPLAY_SOR_DPMS_STATE_WAIT, 0)) {
+		NV_ERROR(dev, "timeout: SOR_DPMS_STATE_WAIT(%d) == 0\n", or);
+		NV_ERROR(dev, "SOR_DPMS_STATE(%d) = 0x%08x\n", or,
+			 nv_rd32(dev, NV50_PDISPLAY_SOR_DPMS_STATE(or)));
+	}
+
+	if (nv_encoder->dcb->type == OUTPUT_DP && mode == DRM_MODE_DPMS_ON)
+		nv50_sor_dp_link_train(encoder);
+}
+
+static void
+nv50_sor_save(struct drm_encoder *encoder)
+{
+	NV_ERROR(encoder->dev, "!!\n");
+}
+
+static void
+nv50_sor_restore(struct drm_encoder *encoder)
+{
+	NV_ERROR(encoder->dev, "!!\n");
+}
+
+static bool
+nv50_sor_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
+		    struct drm_display_mode *adjusted_mode)
+{
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+	struct nouveau_connector *connector;
+
+	NV_DEBUG_KMS(encoder->dev, "or %d\n", nv_encoder->or);
+
+	connector = nouveau_encoder_connector_get(nv_encoder);
+	if (!connector) {
+		NV_ERROR(encoder->dev, "Encoder has no connector\n");
+		return false;
+	}
+
+	if (connector->scaling_mode != DRM_MODE_SCALE_NONE &&
+	     connector->native_mode) {
+		int id = adjusted_mode->base.id;
+		*adjusted_mode = *connector->native_mode;
+		adjusted_mode->base.id = id;
+	}
+
+	return true;
+}
+
+static void
+nv50_sor_prepare(struct drm_encoder *encoder)
+{
+}
+
+static void
+nv50_sor_commit(struct drm_encoder *encoder)
+{
+}
+
+static void
+nv50_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
+		  struct drm_display_mode *adjusted_mode)
+{
+	struct drm_nouveau_private *dev_priv = encoder->dev->dev_private;
+	struct nouveau_channel *evo = dev_priv->evo;
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+	struct drm_device *dev = encoder->dev;
+	struct nouveau_crtc *crtc = nouveau_crtc(encoder->crtc);
+	uint32_t mode_ctl = 0;
+	int ret;
+
+	NV_DEBUG_KMS(dev, "or %d\n", nv_encoder->or);
+
+	nv50_sor_dpms(encoder, DRM_MODE_DPMS_ON);
+
+	switch (nv_encoder->dcb->type) {
+	case OUTPUT_TMDS:
+		if (nv_encoder->dcb->sorconf.link & 1) {
+			if (adjusted_mode->clock < 165000)
+				mode_ctl = 0x0100;
+			else
+				mode_ctl = 0x0500;
+		} else
+			mode_ctl = 0x0200;
+		break;
+	case OUTPUT_DP:
+		mode_ctl |= 0x00050000;
+		if (nv_encoder->dcb->sorconf.link & 1)
+			mode_ctl |= 0x00000800;
+		else
+			mode_ctl |= 0x00000900;
+		break;
+	default:
+		break;
+	}
+
+	if (crtc->index == 1)
+		mode_ctl |= NV50_EVO_SOR_MODE_CTRL_CRTC1;
+	else
+		mode_ctl |= NV50_EVO_SOR_MODE_CTRL_CRTC0;
+
+	if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
+		mode_ctl |= NV50_EVO_SOR_MODE_CTRL_NHSYNC;
+
+	if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
+		mode_ctl |= NV50_EVO_SOR_MODE_CTRL_NVSYNC;
+
+	ret = RING_SPACE(evo, 2);
+	if (ret) {
+		NV_ERROR(dev, "no space while connecting SOR\n");
+		return;
+	}
+	BEGIN_RING(evo, 0, NV50_EVO_SOR(nv_encoder->or, MODE_CTRL), 1);
+	OUT_RING(evo, mode_ctl);
+}
+
+static const struct drm_encoder_helper_funcs nv50_sor_helper_funcs = {
+	.dpms = nv50_sor_dpms,
+	.save = nv50_sor_save,
+	.restore = nv50_sor_restore,
+	.mode_fixup = nv50_sor_mode_fixup,
+	.prepare = nv50_sor_prepare,
+	.commit = nv50_sor_commit,
+	.mode_set = nv50_sor_mode_set,
+	.detect = NULL
+};
+
+static void
+nv50_sor_destroy(struct drm_encoder *encoder)
+{
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+
+	if (!encoder)
+		return;
+
+	NV_DEBUG_KMS(encoder->dev, "\n");
+
+	drm_encoder_cleanup(encoder);
+
+	kfree(nv_encoder);
+}
+
+static const struct drm_encoder_funcs nv50_sor_encoder_funcs = {
+	.destroy = nv50_sor_destroy,
+};
+
+int
+nv50_sor_create(struct drm_device *dev, struct dcb_entry *entry)
+{
+	struct nouveau_encoder *nv_encoder = NULL;
+	struct drm_encoder *encoder;
+	bool dum;
+	int type;
+
+	NV_DEBUG_KMS(dev, "\n");
+
+	switch (entry->type) {
+	case OUTPUT_TMDS:
+		NV_INFO(dev, "Detected a TMDS output\n");
+		type = DRM_MODE_ENCODER_TMDS;
+		break;
+	case OUTPUT_LVDS:
+		NV_INFO(dev, "Detected a LVDS output\n");
+		type = DRM_MODE_ENCODER_LVDS;
+
+		if (nouveau_bios_parse_lvds_table(dev, 0, &dum, &dum)) {
+			NV_ERROR(dev, "Failed parsing LVDS table\n");
+			return -EINVAL;
+		}
+		break;
+	case OUTPUT_DP:
+		NV_INFO(dev, "Detected a DP output\n");
+		type = DRM_MODE_ENCODER_TMDS;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
+	if (!nv_encoder)
+		return -ENOMEM;
+	encoder = to_drm_encoder(nv_encoder);
+
+	nv_encoder->dcb = entry;
+	nv_encoder->or = ffs(entry->or) - 1;
+
+	nv_encoder->disconnect = nv50_sor_disconnect;
+
+	drm_encoder_init(dev, encoder, &nv50_sor_encoder_funcs, type);
+	drm_encoder_helper_add(encoder, &nv50_sor_helper_funcs);
+
+	encoder->possible_crtcs = entry->heads;
+	encoder->possible_clones = 0;
+
+	return 0;
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv04_dfp.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv04_dfp.c
@@ -0,0 +1,623 @@
+/*
+ * Copyright 2003 NVIDIA, Corporation
+ * Copyright 2006 Dave Airlie
+ * Copyright 2007 Maarten Maathuis
+ * Copyright 2007-2009 Stuart Bennett
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#include "drmP.h"
+#include "drm_crtc_helper.h"
+
+#include "nouveau_drv.h"
+#include "nouveau_encoder.h"
+#include "nouveau_connector.h"
+#include "nouveau_crtc.h"
+#include "nouveau_hw.h"
+#include "nvreg.h"
+
+#define FP_TG_CONTROL_ON  (NV_PRAMDAC_FP_TG_CONTROL_DISPEN_POS |	\
+			   NV_PRAMDAC_FP_TG_CONTROL_HSYNC_POS |		\
+			   NV_PRAMDAC_FP_TG_CONTROL_VSYNC_POS)
+#define FP_TG_CONTROL_OFF (NV_PRAMDAC_FP_TG_CONTROL_DISPEN_DISABLE |	\
+			   NV_PRAMDAC_FP_TG_CONTROL_HSYNC_DISABLE |	\
+			   NV_PRAMDAC_FP_TG_CONTROL_VSYNC_DISABLE)
+
+static inline bool is_fpc_off(uint32_t fpc)
+{
+	return ((fpc & (FP_TG_CONTROL_ON | FP_TG_CONTROL_OFF)) ==
+			FP_TG_CONTROL_OFF);
+}
+
+int nv04_dfp_get_bound_head(struct drm_device *dev, struct dcb_entry *dcbent)
+{
+	/* special case of nv_read_tmds to find crtc associated with an output.
+	 * this does not give a correct answer for off-chip dvi, but there's no
+	 * use for such an answer anyway
+	 */
+	int ramdac = (dcbent->or & OUTPUT_C) >> 2;
+
+	NVWriteRAMDAC(dev, ramdac, NV_PRAMDAC_FP_TMDS_CONTROL,
+	NV_PRAMDAC_FP_TMDS_CONTROL_WRITE_DISABLE | 0x4);
+	return ((NVReadRAMDAC(dev, ramdac, NV_PRAMDAC_FP_TMDS_DATA) & 0x8) >> 3) ^ ramdac;
+}
+
+void nv04_dfp_bind_head(struct drm_device *dev, struct dcb_entry *dcbent,
+			int head, bool dl)
+{
+	/* The BIOS scripts don't do this for us, sadly
+	 * Luckily we do know the values ;-)
+	 *
+	 * head < 0 indicates we wish to force a setting with the overrideval
+	 * (for VT restore etc.)
+	 */
+
+	int ramdac = (dcbent->or & OUTPUT_C) >> 2;
+	uint8_t tmds04 = 0x80;
+
+	if (head != ramdac)
+		tmds04 = 0x88;
+
+	if (dcbent->type == OUTPUT_LVDS)
+		tmds04 |= 0x01;
+
+	nv_write_tmds(dev, dcbent->or, 0, 0x04, tmds04);
+
+	if (dl)	/* dual link */
+		nv_write_tmds(dev, dcbent->or, 1, 0x04, tmds04 ^ 0x08);
+}
+
+void nv04_dfp_disable(struct drm_device *dev, int head)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nv04_crtc_reg *crtcstate = dev_priv->mode_reg.crtc_reg;
+
+	if (NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL) &
+	    FP_TG_CONTROL_ON) {
+		/* digital remnants must be cleaned before new crtc
+		 * values programmed.  delay is time for the vga stuff
+		 * to realise it's in control again
+		 */
+		NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL,
+			      FP_TG_CONTROL_OFF);
+		msleep(50);
+	}
+	/* don't inadvertently turn it on when state written later */
+	crtcstate[head].fp_control = FP_TG_CONTROL_OFF;
+}
+
+void nv04_dfp_update_fp_control(struct drm_encoder *encoder, int mode)
+{
+	struct drm_device *dev = encoder->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct drm_crtc *crtc;
+	struct nouveau_crtc *nv_crtc;
+	uint32_t *fpc;
+
+	if (mode == DRM_MODE_DPMS_ON) {
+		nv_crtc = nouveau_crtc(encoder->crtc);
+		fpc = &dev_priv->mode_reg.crtc_reg[nv_crtc->index].fp_control;
+
+		if (is_fpc_off(*fpc)) {
+			/* using saved value is ok, as (is_digital && dpms_on &&
+			 * fp_control==OFF) is (at present) *only* true when
+			 * fpc's most recent change was by below "off" code
+			 */
+			*fpc = nv_crtc->dpms_saved_fp_control;
+		}
+
+		nv_crtc->fp_users |= 1 << nouveau_encoder(encoder)->dcb->index;
+		NVWriteRAMDAC(dev, nv_crtc->index, NV_PRAMDAC_FP_TG_CONTROL, *fpc);
+	} else {
+		list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
+			nv_crtc = nouveau_crtc(crtc);
+			fpc = &dev_priv->mode_reg.crtc_reg[nv_crtc->index].fp_control;
+
+			nv_crtc->fp_users &= ~(1 << nouveau_encoder(encoder)->dcb->index);
+			if (!is_fpc_off(*fpc) && !nv_crtc->fp_users) {
+				nv_crtc->dpms_saved_fp_control = *fpc;
+				/* cut the FP output */
+				*fpc &= ~FP_TG_CONTROL_ON;
+				*fpc |= FP_TG_CONTROL_OFF;
+				NVWriteRAMDAC(dev, nv_crtc->index,
+					      NV_PRAMDAC_FP_TG_CONTROL, *fpc);
+			}
+		}
+	}
+}
+
+static bool nv04_dfp_mode_fixup(struct drm_encoder *encoder,
+				struct drm_display_mode *mode,
+				struct drm_display_mode *adjusted_mode)
+{
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+	struct nouveau_connector *nv_connector = nouveau_encoder_connector_get(nv_encoder);
+
+	/* For internal panels and gpu scaling on DVI we need the native mode */
+	if (nv_connector->scaling_mode != DRM_MODE_SCALE_NONE) {
+		if (!nv_connector->native_mode)
+			return false;
+		nv_encoder->mode = *nv_connector->native_mode;
+		adjusted_mode->clock = nv_connector->native_mode->clock;
+	} else {
+		nv_encoder->mode = *adjusted_mode;
+	}
+
+	return true;
+}
+
+static void nv04_dfp_prepare_sel_clk(struct drm_device *dev,
+				     struct nouveau_encoder *nv_encoder, int head)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nv04_mode_state *state = &dev_priv->mode_reg;
+	uint32_t bits1618 = nv_encoder->dcb->or & OUTPUT_A ? 0x10000 : 0x40000;
+
+	if (nv_encoder->dcb->location != DCB_LOC_ON_CHIP)
+		return;
+
+	/* SEL_CLK is only used on the primary ramdac
+	 * It toggles spread spectrum PLL output and sets the bindings of PLLs
+	 * to heads on digital outputs
+	 */
+	if (head)
+		state->sel_clk |= bits1618;
+	else
+		state->sel_clk &= ~bits1618;
+
+	/* nv30:
+	 *	bit 0		NVClk spread spectrum on/off
+	 *	bit 2		MemClk spread spectrum on/off
+	 * 	bit 4		PixClk1 spread spectrum on/off toggle
+	 * 	bit 6		PixClk2 spread spectrum on/off toggle
+	 *
+	 * nv40 (observations from bios behaviour and mmio traces):
+	 * 	bits 4&6	as for nv30
+	 * 	bits 5&7	head dependent as for bits 4&6, but do not appear with 4&6;
+	 * 			maybe a different spread mode
+	 * 	bits 8&10	seen on dual-link dvi outputs, purpose unknown (set by POST scripts)
+	 * 	The logic behind turning spread spectrum on/off in the first place,
+	 * 	and which bit-pair to use, is unclear on nv40 (for earlier cards, the fp table
+	 * 	entry has the necessary info)
+	 */
+	if (nv_encoder->dcb->type == OUTPUT_LVDS && dev_priv->saved_reg.sel_clk & 0xf0) {
+		int shift = (dev_priv->saved_reg.sel_clk & 0x50) ? 0 : 1;
+
+		state->sel_clk &= ~0xf0;
+		state->sel_clk |= (head ? 0x40 : 0x10) << shift;
+	}
+}
+
+static void nv04_dfp_prepare(struct drm_encoder *encoder)
+{
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+	struct drm_encoder_helper_funcs *helper = encoder->helper_private;
+	struct drm_device *dev = encoder->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	int head = nouveau_crtc(encoder->crtc)->index;
+	struct nv04_crtc_reg *crtcstate = dev_priv->mode_reg.crtc_reg;
+	uint8_t *cr_lcd = &crtcstate[head].CRTC[NV_CIO_CRE_LCD__INDEX];
+	uint8_t *cr_lcd_oth = &crtcstate[head ^ 1].CRTC[NV_CIO_CRE_LCD__INDEX];
+
+	helper->dpms(encoder, DRM_MODE_DPMS_OFF);
+
+	nv04_dfp_prepare_sel_clk(dev, nv_encoder, head);
+
+	/* Some NV4x have unknown values (0x3f, 0x50, 0x54, 0x6b, 0x79, 0x7f)
+	 * at LCD__INDEX which we don't alter
+	 */
+	if (!(*cr_lcd & 0x44)) {
+		*cr_lcd = 0x3;
+
+		if (nv_two_heads(dev)) {
+			if (nv_encoder->dcb->location == DCB_LOC_ON_CHIP)
+				*cr_lcd |= head ? 0x0 : 0x8;
+			else {
+				*cr_lcd |= (nv_encoder->dcb->or << 4) & 0x30;
+				if (nv_encoder->dcb->type == OUTPUT_LVDS)
+					*cr_lcd |= 0x30;
+				if ((*cr_lcd & 0x30) == (*cr_lcd_oth & 0x30)) {
+					/* avoid being connected to both crtcs */
+					*cr_lcd_oth &= ~0x30;
+					NVWriteVgaCrtc(dev, head ^ 1,
+						       NV_CIO_CRE_LCD__INDEX,
+						       *cr_lcd_oth);
+				}
+			}
+		}
+	}
+}
+
+
+static void nv04_dfp_mode_set(struct drm_encoder *encoder,
+			      struct drm_display_mode *mode,
+			      struct drm_display_mode *adjusted_mode)
+{
+	struct drm_device *dev = encoder->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
+	struct nv04_crtc_reg *regp = &dev_priv->mode_reg.crtc_reg[nv_crtc->index];
+	struct nv04_crtc_reg *savep = &dev_priv->saved_reg.crtc_reg[nv_crtc->index];
+	struct nouveau_connector *nv_connector = nouveau_crtc_connector_get(nv_crtc);
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+	struct drm_display_mode *output_mode = &nv_encoder->mode;
+	uint32_t mode_ratio, panel_ratio;
+
+	NV_DEBUG_KMS(dev, "Output mode on CRTC %d:\n", nv_crtc->index);
+	drm_mode_debug_printmodeline(output_mode);
+
+	/* Initialize the FP registers in this CRTC. */
+	regp->fp_horiz_regs[FP_DISPLAY_END] = output_mode->hdisplay - 1;
+	regp->fp_horiz_regs[FP_TOTAL] = output_mode->htotal - 1;
+	if (!nv_gf4_disp_arch(dev) ||
+	    (output_mode->hsync_start - output_mode->hdisplay) >=
+					dev_priv->vbios->digital_min_front_porch)
+		regp->fp_horiz_regs[FP_CRTC] = output_mode->hdisplay;
+	else
+		regp->fp_horiz_regs[FP_CRTC] = output_mode->hsync_start - dev_priv->vbios->digital_min_front_porch - 1;
+	regp->fp_horiz_regs[FP_SYNC_START] = output_mode->hsync_start - 1;
+	regp->fp_horiz_regs[FP_SYNC_END] = output_mode->hsync_end - 1;
+	regp->fp_horiz_regs[FP_VALID_START] = output_mode->hskew;
+	regp->fp_horiz_regs[FP_VALID_END] = output_mode->hdisplay - 1;
+
+	regp->fp_vert_regs[FP_DISPLAY_END] = output_mode->vdisplay - 1;
+	regp->fp_vert_regs[FP_TOTAL] = output_mode->vtotal - 1;
+	regp->fp_vert_regs[FP_CRTC] = output_mode->vtotal - 5 - 1;
+	regp->fp_vert_regs[FP_SYNC_START] = output_mode->vsync_start - 1;
+	regp->fp_vert_regs[FP_SYNC_END] = output_mode->vsync_end - 1;
+	regp->fp_vert_regs[FP_VALID_START] = 0;
+	regp->fp_vert_regs[FP_VALID_END] = output_mode->vdisplay - 1;
+
+	/* bit26: a bit seen on some g7x, no as yet discernable purpose */
+	regp->fp_control = NV_PRAMDAC_FP_TG_CONTROL_DISPEN_POS |
+			   (savep->fp_control & (1 << 26 | NV_PRAMDAC_FP_TG_CONTROL_READ_PROG));
+	/* Deal with vsync/hsync polarity */
+	/* LVDS screens do set this, but modes with +ve syncs are very rare */
+	if (output_mode->flags & DRM_MODE_FLAG_PVSYNC)
+		regp->fp_control |= NV_PRAMDAC_FP_TG_CONTROL_VSYNC_POS;
+	if (output_mode->flags & DRM_MODE_FLAG_PHSYNC)
+		regp->fp_control |= NV_PRAMDAC_FP_TG_CONTROL_HSYNC_POS;
+	/* panel scaling first, as native would get set otherwise */
+	if (nv_connector->scaling_mode == DRM_MODE_SCALE_NONE ||
+	    nv_connector->scaling_mode == DRM_MODE_SCALE_CENTER)	/* panel handles it */
+		regp->fp_control |= NV_PRAMDAC_FP_TG_CONTROL_MODE_CENTER;
+	else if (adjusted_mode->hdisplay == output_mode->hdisplay &&
+		 adjusted_mode->vdisplay == output_mode->vdisplay) /* native mode */
+		regp->fp_control |= NV_PRAMDAC_FP_TG_CONTROL_MODE_NATIVE;
+	else /* gpu needs to scale */
+		regp->fp_control |= NV_PRAMDAC_FP_TG_CONTROL_MODE_SCALE;
+	if (nvReadEXTDEV(dev, NV_PEXTDEV_BOOT_0) & NV_PEXTDEV_BOOT_0_STRAP_FP_IFACE_12BIT)
+		regp->fp_control |= NV_PRAMDAC_FP_TG_CONTROL_WIDTH_12;
+	if (nv_encoder->dcb->location != DCB_LOC_ON_CHIP &&
+	    output_mode->clock > 165000)
+		regp->fp_control |= (2 << 24);
+	if (nv_encoder->dcb->type == OUTPUT_LVDS) {
+		bool duallink, dummy;
+
+		nouveau_bios_parse_lvds_table(dev, nv_connector->native_mode->
+					      clock, &duallink, &dummy);
+		if (duallink)
+			regp->fp_control |= (8 << 28);
+	} else
+	if (output_mode->clock > 165000)
+		regp->fp_control |= (8 << 28);
+
+	regp->fp_debug_0 = NV_PRAMDAC_FP_DEBUG_0_YWEIGHT_ROUND |
+			   NV_PRAMDAC_FP_DEBUG_0_XWEIGHT_ROUND |
+			   NV_PRAMDAC_FP_DEBUG_0_YINTERP_BILINEAR |
+			   NV_PRAMDAC_FP_DEBUG_0_XINTERP_BILINEAR |
+			   NV_RAMDAC_FP_DEBUG_0_TMDS_ENABLED |
+			   NV_PRAMDAC_FP_DEBUG_0_YSCALE_ENABLE |
+			   NV_PRAMDAC_FP_DEBUG_0_XSCALE_ENABLE;
+
+	/* We want automatic scaling */
+	regp->fp_debug_1 = 0;
+	/* This can override HTOTAL and VTOTAL */
+	regp->fp_debug_2 = 0;
+
+	/* Use 20.12 fixed point format to avoid floats */
+	mode_ratio = (1 << 12) * adjusted_mode->hdisplay / adjusted_mode->vdisplay;
+	panel_ratio = (1 << 12) * output_mode->hdisplay / output_mode->vdisplay;
+	/* if ratios are equal, SCALE_ASPECT will automatically (and correctly)
+	 * get treated the same as SCALE_FULLSCREEN */
+	if (nv_connector->scaling_mode == DRM_MODE_SCALE_ASPECT &&
+	    mode_ratio != panel_ratio) {
+		uint32_t diff, scale;
+		bool divide_by_2 = nv_gf4_disp_arch(dev);
+
+		if (mode_ratio < panel_ratio) {
+			/* vertical needs to expand to glass size (automatic)
+			 * horizontal needs to be scaled at vertical scale factor
+			 * to maintain aspect */
+
+			scale = (1 << 12) * adjusted_mode->vdisplay / output_mode->vdisplay;
+			regp->fp_debug_1 = NV_PRAMDAC_FP_DEBUG_1_XSCALE_TESTMODE_ENABLE |
+					   XLATE(scale, divide_by_2, NV_PRAMDAC_FP_DEBUG_1_XSCALE_VALUE);
+
+			/* restrict area of screen used, horizontally */
+			diff = output_mode->hdisplay -
+			       output_mode->vdisplay * mode_ratio / (1 << 12);
+			regp->fp_horiz_regs[FP_VALID_START] += diff / 2;
+			regp->fp_horiz_regs[FP_VALID_END] -= diff / 2;
+		}
+
+		if (mode_ratio > panel_ratio) {
+			/* horizontal needs to expand to glass size (automatic)
+			 * vertical needs to be scaled at horizontal scale factor
+			 * to maintain aspect */
+
+			scale = (1 << 12) * adjusted_mode->hdisplay / output_mode->hdisplay;
+			regp->fp_debug_1 = NV_PRAMDAC_FP_DEBUG_1_YSCALE_TESTMODE_ENABLE |
+					   XLATE(scale, divide_by_2, NV_PRAMDAC_FP_DEBUG_1_YSCALE_VALUE);
+
+			/* restrict area of screen used, vertically */
+			diff = output_mode->vdisplay -
+			       (1 << 12) * output_mode->hdisplay / mode_ratio;
+			regp->fp_vert_regs[FP_VALID_START] += diff / 2;
+			regp->fp_vert_regs[FP_VALID_END] -= diff / 2;
+		}
+	}
+
+	/* Output property. */
+	if (nv_connector->use_dithering) {
+		if (dev_priv->chipset == 0x11)
+			regp->dither = savep->dither | 0x00010000;
+		else {
+			int i;
+			regp->dither = savep->dither | 0x00000001;
+			for (i = 0; i < 3; i++) {
+				regp->dither_regs[i] = 0xe4e4e4e4;
+				regp->dither_regs[i + 3] = 0x44444444;
+			}
+		}
+	} else {
+		if (dev_priv->chipset != 0x11) {
+			/* reset them */
+			int i;
+			for (i = 0; i < 3; i++) {
+				regp->dither_regs[i] = savep->dither_regs[i];
+				regp->dither_regs[i + 3] = savep->dither_regs[i + 3];
+			}
+		}
+		regp->dither = savep->dither;
+	}
+
+	regp->fp_margin_color = 0;
+}
+
+static void nv04_dfp_commit(struct drm_encoder *encoder)
+{
+	struct drm_device *dev = encoder->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct drm_encoder_helper_funcs *helper = encoder->helper_private;
+	struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+	struct dcb_entry *dcbe = nv_encoder->dcb;
+	int head = nouveau_crtc(encoder->crtc)->index;
+
+	NV_INFO(dev, "Output %s is running on CRTC %d using output %c\n",
+		drm_get_connector_name(&nouveau_encoder_connector_get(nv_encoder)->base),
+		nv_crtc->index, '@' + ffs(nv_encoder->dcb->or));
+
+	if (dcbe->type == OUTPUT_TMDS)
+		run_tmds_table(dev, dcbe, head, nv_encoder->mode.clock);
+	else if (dcbe->type == OUTPUT_LVDS)
+		call_lvds_script(dev, dcbe, head, LVDS_RESET, nv_encoder->mode.clock);
+
+	/* update fp_control state for any changes made by scripts,
+	 * so correct value is written at DPMS on */
+	dev_priv->mode_reg.crtc_reg[head].fp_control =
+		NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL);
+
+	/* This could use refinement for flatpanels, but it should work this way */
+	if (dev_priv->chipset < 0x44)
+		NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + nv04_dac_output_offset(encoder), 0xf0000000);
+	else
+		NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + nv04_dac_output_offset(encoder), 0x00100000);
+
+	helper->dpms(encoder, DRM_MODE_DPMS_ON);
+
+	NV_INFO(dev, "Output %s is running on CRTC %d using output %c\n",
+		drm_get_connector_name(&nouveau_encoder_connector_get(nv_encoder)->base),
+		nv_crtc->index, '@' + ffs(nv_encoder->dcb->or));
+}
+
+static inline bool is_powersaving_dpms(int mode)
+{
+	return (mode != DRM_MODE_DPMS_ON);
+}
+
+static void nv04_lvds_dpms(struct drm_encoder *encoder, int mode)
+{
+	struct drm_device *dev = encoder->dev;
+	struct drm_crtc *crtc = encoder->crtc;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+	bool was_powersaving = is_powersaving_dpms(nv_encoder->last_dpms);
+
+	if (nv_encoder->last_dpms == mode)
+		return;
+	nv_encoder->last_dpms = mode;
+
+	NV_INFO(dev, "Setting dpms mode %d on lvds encoder (output %d)\n",
+		     mode, nv_encoder->dcb->index);
+
+	if (was_powersaving && is_powersaving_dpms(mode))
+		return;
+
+	if (nv_encoder->dcb->lvdsconf.use_power_scripts) {
+		struct nouveau_connector *nv_connector = nouveau_encoder_connector_get(nv_encoder);
+
+		/* when removing an output, crtc may not be set, but PANEL_OFF
+		 * must still be run
+		 */
+		int head = crtc ? nouveau_crtc(crtc)->index :
+			   nv04_dfp_get_bound_head(dev, nv_encoder->dcb);
+
+		if (mode == DRM_MODE_DPMS_ON) {
+			if (!nv_connector->native_mode) {
+				NV_ERROR(dev, "Not turning on LVDS without native mode\n");
+				return;
+			}
+			call_lvds_script(dev, nv_encoder->dcb, head,
+					 LVDS_PANEL_ON, nv_connector->native_mode->clock);
+		} else
+			/* pxclk of 0 is fine for PANEL_OFF, and for a
+			 * disconnected LVDS encoder there is no native_mode
+			 */
+			call_lvds_script(dev, nv_encoder->dcb, head,
+					 LVDS_PANEL_OFF, 0);
+	}
+
+	nv04_dfp_update_fp_control(encoder, mode);
+
+	if (mode == DRM_MODE_DPMS_ON)
+		nv04_dfp_prepare_sel_clk(dev, nv_encoder, nouveau_crtc(crtc)->index);
+	else {
+		dev_priv->mode_reg.sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK);
+		dev_priv->mode_reg.sel_clk &= ~0xf0;
+	}
+	NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, dev_priv->mode_reg.sel_clk);
+}
+
+static void nv04_tmds_dpms(struct drm_encoder *encoder, int mode)
+{
+	struct drm_device *dev = encoder->dev;
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+
+	if (nv_encoder->last_dpms == mode)
+		return;
+	nv_encoder->last_dpms = mode;
+
+	NV_INFO(dev, "Setting dpms mode %d on tmds encoder (output %d)\n",
+		     mode, nv_encoder->dcb->index);
+
+	nv04_dfp_update_fp_control(encoder, mode);
+}
+
+static void nv04_dfp_save(struct drm_encoder *encoder)
+{
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+	struct drm_device *dev = encoder->dev;
+
+	if (nv_two_heads(dev))
+		nv_encoder->restore.head =
+			nv04_dfp_get_bound_head(dev, nv_encoder->dcb);
+}
+
+static void nv04_dfp_restore(struct drm_encoder *encoder)
+{
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+	struct drm_device *dev = encoder->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	int head = nv_encoder->restore.head;
+
+	if (nv_encoder->dcb->type == OUTPUT_LVDS) {
+		struct drm_display_mode *native_mode = nouveau_encoder_connector_get(nv_encoder)->native_mode;
+		if (native_mode)
+			call_lvds_script(dev, nv_encoder->dcb, head, LVDS_PANEL_ON,
+					 native_mode->clock);
+		else
+			NV_ERROR(dev, "Not restoring LVDS without native mode\n");
+
+	} else if (nv_encoder->dcb->type == OUTPUT_TMDS) {
+		int clock = nouveau_hw_pllvals_to_clk
+					(&dev_priv->saved_reg.crtc_reg[head].pllvals);
+
+		run_tmds_table(dev, nv_encoder->dcb, head, clock);
+	}
+
+	nv_encoder->last_dpms = NV_DPMS_CLEARED;
+}
+
+static void nv04_dfp_destroy(struct drm_encoder *encoder)
+{
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+
+	NV_DEBUG_KMS(encoder->dev, "\n");
+
+	drm_encoder_cleanup(encoder);
+	kfree(nv_encoder);
+}
+
+static const struct drm_encoder_helper_funcs nv04_lvds_helper_funcs = {
+	.dpms = nv04_lvds_dpms,
+	.save = nv04_dfp_save,
+	.restore = nv04_dfp_restore,
+	.mode_fixup = nv04_dfp_mode_fixup,
+	.prepare = nv04_dfp_prepare,
+	.commit = nv04_dfp_commit,
+	.mode_set = nv04_dfp_mode_set,
+	.detect = NULL,
+};
+
+static const struct drm_encoder_helper_funcs nv04_tmds_helper_funcs = {
+	.dpms = nv04_tmds_dpms,
+	.save = nv04_dfp_save,
+	.restore = nv04_dfp_restore,
+	.mode_fixup = nv04_dfp_mode_fixup,
+	.prepare = nv04_dfp_prepare,
+	.commit = nv04_dfp_commit,
+	.mode_set = nv04_dfp_mode_set,
+	.detect = NULL,
+};
+
+static const struct drm_encoder_funcs nv04_dfp_funcs = {
+	.destroy = nv04_dfp_destroy,
+};
+
+int nv04_dfp_create(struct drm_device *dev, struct dcb_entry *entry)
+{
+	const struct drm_encoder_helper_funcs *helper;
+	struct drm_encoder *encoder;
+	struct nouveau_encoder *nv_encoder = NULL;
+	int type;
+
+	switch (entry->type) {
+	case OUTPUT_TMDS:
+		type = DRM_MODE_ENCODER_TMDS;
+		helper = &nv04_tmds_helper_funcs;
+		break;
+	case OUTPUT_LVDS:
+		type = DRM_MODE_ENCODER_LVDS;
+		helper = &nv04_lvds_helper_funcs;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
+	if (!nv_encoder)
+		return -ENOMEM;
+
+	encoder = to_drm_encoder(nv_encoder);
+
+	nv_encoder->dcb = entry;
+	nv_encoder->or = ffs(entry->or) - 1;
+
+	drm_encoder_init(dev, encoder, &nv04_dfp_funcs, type);
+	drm_encoder_helper_add(encoder, helper);
+
+	encoder->possible_crtcs = entry->heads;
+	encoder->possible_clones = 0;
+
+	return 0;
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_irq.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_irq.c
@@ -0,0 +1,737 @@
+/*
+ * Copyright (C) 2006 Ben Skeggs.
+ *
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+/*
+ * Authors:
+ *   Ben Skeggs <darktama@iinet.net.au>
+ */
+
+#include "drmP.h"
+#include "drm.h"
+#include "nouveau_drm.h"
+#include "nouveau_drv.h"
+#include "nouveau_reg.h"
+#include <linux/ratelimit.h>
+
+/* needed for hotplug irq */
+#include "nouveau_connector.h"
+#include "nv50_display.h"
+
+void
+nouveau_irq_preinstall(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+	/* Master disable */
+	nv_wr32(dev, NV03_PMC_INTR_EN_0, 0);
+
+	if (dev_priv->card_type == NV_50) {
+		INIT_WORK(&dev_priv->irq_work, nv50_display_irq_handler_bh);
+		INIT_LIST_HEAD(&dev_priv->vbl_waiting);
+	}
+}
+
+int
+nouveau_irq_postinstall(struct drm_device *dev)
+{
+	/* Master enable */
+	nv_wr32(dev, NV03_PMC_INTR_EN_0, NV_PMC_INTR_EN_0_MASTER_ENABLE);
+	return 0;
+}
+
+void
+nouveau_irq_uninstall(struct drm_device *dev)
+{
+	/* Master disable */
+	nv_wr32(dev, NV03_PMC_INTR_EN_0, 0);
+}
+
+static int
+nouveau_call_method(struct nouveau_channel *chan, int class, int mthd, int data)
+{
+	struct drm_nouveau_private *dev_priv = chan->dev->dev_private;
+	struct nouveau_pgraph_object_method *grm;
+	struct nouveau_pgraph_object_class *grc;
+
+	grc = dev_priv->engine.graph.grclass;
+	while (grc->id) {
+		if (grc->id == class)
+			break;
+		grc++;
+	}
+
+	if (grc->id != class || !grc->methods)
+		return -ENOENT;
+
+	grm = grc->methods;
+	while (grm->id) {
+		if (grm->id == mthd)
+			return grm->exec(chan, class, mthd, data);
+		grm++;
+	}
+
+	return -ENOENT;
+}
+
+static bool
+nouveau_fifo_swmthd(struct nouveau_channel *chan, uint32_t addr, uint32_t data)
+{
+	struct drm_device *dev = chan->dev;
+	const int subc = (addr >> 13) & 0x7;
+	const int mthd = addr & 0x1ffc;
+
+	if (mthd == 0x0000) {
+		struct nouveau_gpuobj_ref *ref = NULL;
+
+		if (nouveau_gpuobj_ref_find(chan, data, &ref))
+			return false;
+
+		if (ref->gpuobj->engine != NVOBJ_ENGINE_SW)
+			return false;
+
+		chan->sw_subchannel[subc] = ref->gpuobj->class;
+		nv_wr32(dev, NV04_PFIFO_CACHE1_ENGINE, nv_rd32(dev,
+			NV04_PFIFO_CACHE1_ENGINE) & ~(0xf << subc * 4));
+		return true;
+	}
+
+	/* hw object */
+	if (nv_rd32(dev, NV04_PFIFO_CACHE1_ENGINE) & (1 << (subc*4)))
+		return false;
+
+	if (nouveau_call_method(chan, chan->sw_subchannel[subc], mthd, data))
+		return false;
+
+	return true;
+}
+
+static void
+nouveau_fifo_irq_handler(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_engine *engine = &dev_priv->engine;
+	uint32_t status, reassign;
+	int cnt = 0;
+
+	reassign = nv_rd32(dev, NV03_PFIFO_CACHES) & 1;
+	while ((status = nv_rd32(dev, NV03_PFIFO_INTR_0)) && (cnt++ < 100)) {
+		struct nouveau_channel *chan = NULL;
+		uint32_t chid, get;
+
+		nv_wr32(dev, NV03_PFIFO_CACHES, 0);
+
+		chid = engine->fifo.channel_id(dev);
+		if (chid >= 0 && chid < engine->fifo.channels)
+			chan = dev_priv->fifos[chid];
+		get  = nv_rd32(dev, NV03_PFIFO_CACHE1_GET);
+
+		if (status & NV_PFIFO_INTR_CACHE_ERROR) {
+			uint32_t mthd, data;
+			int ptr;
+
+			/* NV_PFIFO_CACHE1_GET actually goes to 0xffc before
+			 * wrapping on my G80 chips, but CACHE1 isn't big
+			 * enough for this much data.. Tests show that it
+			 * wraps around to the start at GET=0x800.. No clue
+			 * as to why..
+			 */
+			ptr = (get & 0x7ff) >> 2;
+
+			if (dev_priv->card_type < NV_40) {
+				mthd = nv_rd32(dev,
+					NV04_PFIFO_CACHE1_METHOD(ptr));
+				data = nv_rd32(dev,
+					NV04_PFIFO_CACHE1_DATA(ptr));
+			} else {
+				mthd = nv_rd32(dev,
+					NV40_PFIFO_CACHE1_METHOD(ptr));
+				data = nv_rd32(dev,
+					NV40_PFIFO_CACHE1_DATA(ptr));
+			}
+
+			if (!chan || !nouveau_fifo_swmthd(chan, mthd, data)) {
+				NV_INFO(dev, "PFIFO_CACHE_ERROR - Ch %d/%d "
+					     "Mthd 0x%04x Data 0x%08x\n",
+					chid, (mthd >> 13) & 7, mthd & 0x1ffc,
+					data);
+			}
+
+			nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_PUSH, 0);
+			nv_wr32(dev, NV03_PFIFO_INTR_0,
+						NV_PFIFO_INTR_CACHE_ERROR);
+
+			nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH0,
+				nv_rd32(dev, NV03_PFIFO_CACHE1_PUSH0) & ~1);
+			nv_wr32(dev, NV03_PFIFO_CACHE1_GET, get + 4);
+			nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH0,
+				nv_rd32(dev, NV03_PFIFO_CACHE1_PUSH0) | 1);
+			nv_wr32(dev, NV04_PFIFO_CACHE1_HASH, 0);
+
+			nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_PUSH,
+				nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_PUSH) | 1);
+			nv_wr32(dev, NV04_PFIFO_CACHE1_PULL0, 1);
+
+			status &= ~NV_PFIFO_INTR_CACHE_ERROR;
+		}
+
+		if (status & NV_PFIFO_INTR_DMA_PUSHER) {
+			NV_INFO(dev, "PFIFO_DMA_PUSHER - Ch %d\n", chid);
+
+			status &= ~NV_PFIFO_INTR_DMA_PUSHER;
+			nv_wr32(dev, NV03_PFIFO_INTR_0,
+						NV_PFIFO_INTR_DMA_PUSHER);
+
+			nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_STATE, 0x00000000);
+			if (nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_PUT) != get)
+				nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_GET,
+								get + 4);
+		}
+
+		if (status & NV_PFIFO_INTR_SEMAPHORE) {
+			uint32_t sem;
+
+			status &= ~NV_PFIFO_INTR_SEMAPHORE;
+			nv_wr32(dev, NV03_PFIFO_INTR_0,
+				NV_PFIFO_INTR_SEMAPHORE);
+
+			sem = nv_rd32(dev, NV10_PFIFO_CACHE1_SEMAPHORE);
+			nv_wr32(dev, NV10_PFIFO_CACHE1_SEMAPHORE, sem | 0x1);
+
+			nv_wr32(dev, NV03_PFIFO_CACHE1_GET, get + 4);
+			nv_wr32(dev, NV04_PFIFO_CACHE1_PULL0, 1);
+		}
+
+		if (status) {
+			NV_INFO(dev, "PFIFO_INTR 0x%08x - Ch %d\n",
+				status, chid);
+			nv_wr32(dev, NV03_PFIFO_INTR_0, status);
+			status = 0;
+		}
+
+		nv_wr32(dev, NV03_PFIFO_CACHES, reassign);
+	}
+
+	if (status) {
+		NV_INFO(dev, "PFIFO still angry after %d spins, halt\n", cnt);
+		nv_wr32(dev, 0x2140, 0);
+		nv_wr32(dev, 0x140, 0);
+	}
+
+	nv_wr32(dev, NV03_PMC_INTR_0, NV_PMC_INTR_0_PFIFO_PENDING);
+}
+
+struct nouveau_bitfield_names {
+	uint32_t mask;
+	const char *name;
+};
+
+static struct nouveau_bitfield_names nstatus_names[] =
+{
+	{ NV04_PGRAPH_NSTATUS_STATE_IN_USE,       "STATE_IN_USE" },
+	{ NV04_PGRAPH_NSTATUS_INVALID_STATE,      "INVALID_STATE" },
+	{ NV04_PGRAPH_NSTATUS_BAD_ARGUMENT,       "BAD_ARGUMENT" },
+	{ NV04_PGRAPH_NSTATUS_PROTECTION_FAULT,   "PROTECTION_FAULT" }
+};
+
+static struct nouveau_bitfield_names nstatus_names_nv10[] =
+{
+	{ NV10_PGRAPH_NSTATUS_STATE_IN_USE,       "STATE_IN_USE" },
+	{ NV10_PGRAPH_NSTATUS_INVALID_STATE,      "INVALID_STATE" },
+	{ NV10_PGRAPH_NSTATUS_BAD_ARGUMENT,       "BAD_ARGUMENT" },
+	{ NV10_PGRAPH_NSTATUS_PROTECTION_FAULT,   "PROTECTION_FAULT" }
+};
+
+static struct nouveau_bitfield_names nsource_names[] =
+{
+	{ NV03_PGRAPH_NSOURCE_NOTIFICATION,       "NOTIFICATION" },
+	{ NV03_PGRAPH_NSOURCE_DATA_ERROR,         "DATA_ERROR" },
+	{ NV03_PGRAPH_NSOURCE_PROTECTION_ERROR,   "PROTECTION_ERROR" },
+	{ NV03_PGRAPH_NSOURCE_RANGE_EXCEPTION,    "RANGE_EXCEPTION" },
+	{ NV03_PGRAPH_NSOURCE_LIMIT_COLOR,        "LIMIT_COLOR" },
+	{ NV03_PGRAPH_NSOURCE_LIMIT_ZETA,         "LIMIT_ZETA" },
+	{ NV03_PGRAPH_NSOURCE_ILLEGAL_MTHD,       "ILLEGAL_MTHD" },
+	{ NV03_PGRAPH_NSOURCE_DMA_R_PROTECTION,   "DMA_R_PROTECTION" },
+	{ NV03_PGRAPH_NSOURCE_DMA_W_PROTECTION,   "DMA_W_PROTECTION" },
+	{ NV03_PGRAPH_NSOURCE_FORMAT_EXCEPTION,   "FORMAT_EXCEPTION" },
+	{ NV03_PGRAPH_NSOURCE_PATCH_EXCEPTION,    "PATCH_EXCEPTION" },
+	{ NV03_PGRAPH_NSOURCE_STATE_INVALID,      "STATE_INVALID" },
+	{ NV03_PGRAPH_NSOURCE_DOUBLE_NOTIFY,      "DOUBLE_NOTIFY" },
+	{ NV03_PGRAPH_NSOURCE_NOTIFY_IN_USE,      "NOTIFY_IN_USE" },
+	{ NV03_PGRAPH_NSOURCE_METHOD_CNT,         "METHOD_CNT" },
+	{ NV03_PGRAPH_NSOURCE_BFR_NOTIFICATION,   "BFR_NOTIFICATION" },
+	{ NV03_PGRAPH_NSOURCE_DMA_VTX_PROTECTION, "DMA_VTX_PROTECTION" },
+	{ NV03_PGRAPH_NSOURCE_DMA_WIDTH_A,        "DMA_WIDTH_A" },
+	{ NV03_PGRAPH_NSOURCE_DMA_WIDTH_B,        "DMA_WIDTH_B" },
+};
+
+static void
+nouveau_print_bitfield_names_(uint32_t value,
+				const struct nouveau_bitfield_names *namelist,
+				const int namelist_len)
+{
+	/*
+	 * Caller must have already printed the KERN_* log level for us.
+	 * Also the caller is responsible for adding the newline.
+	 */
+	int i;
+	for (i = 0; i < namelist_len; ++i) {
+		uint32_t mask = namelist[i].mask;
+		if (value & mask) {
+			printk(" %s", namelist[i].name);
+			value &= ~mask;
+		}
+	}
+	if (value)
+		printk(" (unknown bits 0x%08x)", value);
+}
+#define nouveau_print_bitfield_names(val, namelist) \
+	nouveau_print_bitfield_names_((val), (namelist), ARRAY_SIZE(namelist))
+
+
+static int
+nouveau_graph_chid_from_grctx(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	uint32_t inst;
+	int i;
+
+	if (dev_priv->card_type < NV_40)
+		return dev_priv->engine.fifo.channels;
+	else
+	if (dev_priv->card_type < NV_50) {
+		inst = (nv_rd32(dev, 0x40032c) & 0xfffff) << 4;
+
+		for (i = 0; i < dev_priv->engine.fifo.channels; i++) {
+			struct nouveau_channel *chan = dev_priv->fifos[i];
+
+			if (!chan || !chan->ramin_grctx)
+				continue;
+
+			if (inst == chan->ramin_grctx->instance)
+				break;
+		}
+	} else {
+		inst = (nv_rd32(dev, 0x40032c) & 0xfffff) << 12;
+
+		for (i = 0; i < dev_priv->engine.fifo.channels; i++) {
+			struct nouveau_channel *chan = dev_priv->fifos[i];
+
+			if (!chan || !chan->ramin)
+				continue;
+
+			if (inst == chan->ramin->instance)
+				break;
+		}
+	}
+
+
+	return i;
+}
+
+static int
+nouveau_graph_trapped_channel(struct drm_device *dev, int *channel_ret)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_engine *engine = &dev_priv->engine;
+	int channel;
+
+	if (dev_priv->card_type < NV_10)
+		channel = (nv_rd32(dev, NV04_PGRAPH_TRAPPED_ADDR) >> 24) & 0xf;
+	else
+	if (dev_priv->card_type < NV_40)
+		channel = (nv_rd32(dev, NV04_PGRAPH_TRAPPED_ADDR) >> 20) & 0x1f;
+	else
+		channel = nouveau_graph_chid_from_grctx(dev);
+
+	if (channel >= engine->fifo.channels || !dev_priv->fifos[channel]) {
+		NV_ERROR(dev, "AIII, invalid/inactive channel id %d\n", channel);
+		return -EINVAL;
+	}
+
+	*channel_ret = channel;
+	return 0;
+}
+
+struct nouveau_pgraph_trap {
+	int channel;
+	int class;
+	int subc, mthd, size;
+	uint32_t data, data2;
+	uint32_t nsource, nstatus;
+};
+
+static void
+nouveau_graph_trap_info(struct drm_device *dev,
+			struct nouveau_pgraph_trap *trap)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	uint32_t address;
+
+	trap->nsource = trap->nstatus = 0;
+	if (dev_priv->card_type < NV_50) {
+		trap->nsource = nv_rd32(dev, NV03_PGRAPH_NSOURCE);
+		trap->nstatus = nv_rd32(dev, NV03_PGRAPH_NSTATUS);
+	}
+
+	if (nouveau_graph_trapped_channel(dev, &trap->channel))
+		trap->channel = -1;
+	address = nv_rd32(dev, NV04_PGRAPH_TRAPPED_ADDR);
+
+	trap->mthd = address & 0x1FFC;
+	trap->data = nv_rd32(dev, NV04_PGRAPH_TRAPPED_DATA);
+	if (dev_priv->card_type < NV_10) {
+		trap->subc  = (address >> 13) & 0x7;
+	} else {
+		trap->subc  = (address >> 16) & 0x7;
+		trap->data2 = nv_rd32(dev, NV10_PGRAPH_TRAPPED_DATA_HIGH);
+	}
+
+	if (dev_priv->card_type < NV_10)
+		trap->class = nv_rd32(dev, 0x400180 + trap->subc*4) & 0xFF;
+	else if (dev_priv->card_type < NV_40)
+		trap->class = nv_rd32(dev, 0x400160 + trap->subc*4) & 0xFFF;
+	else if (dev_priv->card_type < NV_50)
+		trap->class = nv_rd32(dev, 0x400160 + trap->subc*4) & 0xFFFF;
+	else
+		trap->class = nv_rd32(dev, 0x400814);
+}
+
+static void
+nouveau_graph_dump_trap_info(struct drm_device *dev, const char *id,
+			     struct nouveau_pgraph_trap *trap)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	uint32_t nsource = trap->nsource, nstatus = trap->nstatus;
+
+	NV_INFO(dev, "%s - nSource:", id);
+	nouveau_print_bitfield_names(nsource, nsource_names);
+	printk(", nStatus:");
+	if (dev_priv->card_type < NV_10)
+		nouveau_print_bitfield_names(nstatus, nstatus_names);
+	else
+		nouveau_print_bitfield_names(nstatus, nstatus_names_nv10);
+	printk("\n");
+
+	NV_INFO(dev, "%s - Ch %d/%d Class 0x%04x Mthd 0x%04x "
+					"Data 0x%08x:0x%08x\n",
+					id, trap->channel, trap->subc,
+					trap->class, trap->mthd,
+					trap->data2, trap->data);
+}
+
+static int
+nouveau_pgraph_intr_swmthd(struct drm_device *dev,
+			   struct nouveau_pgraph_trap *trap)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+	if (trap->channel < 0 ||
+	    trap->channel >= dev_priv->engine.fifo.channels ||
+	    !dev_priv->fifos[trap->channel])
+		return -ENODEV;
+
+	return nouveau_call_method(dev_priv->fifos[trap->channel],
+				   trap->class, trap->mthd, trap->data);
+}
+
+static inline void
+nouveau_pgraph_intr_notify(struct drm_device *dev, uint32_t nsource)
+{
+	struct nouveau_pgraph_trap trap;
+	int unhandled = 0;
+
+	nouveau_graph_trap_info(dev, &trap);
+
+	if (nsource & NV03_PGRAPH_NSOURCE_ILLEGAL_MTHD) {
+		if (nouveau_pgraph_intr_swmthd(dev, &trap))
+			unhandled = 1;
+	} else {
+		unhandled = 1;
+	}
+
+	if (unhandled)
+		nouveau_graph_dump_trap_info(dev, "PGRAPH_NOTIFY", &trap);
+}
+
+static DEFINE_RATELIMIT_STATE(nouveau_ratelimit_state, 3 * HZ, 20);
+
+static int nouveau_ratelimit(void)
+{
+	return __ratelimit(&nouveau_ratelimit_state);
+}
+
+
+static inline void
+nouveau_pgraph_intr_error(struct drm_device *dev, uint32_t nsource)
+{
+	struct nouveau_pgraph_trap trap;
+	int unhandled = 0;
+
+	nouveau_graph_trap_info(dev, &trap);
+	trap.nsource = nsource;
+
+	if (nsource & NV03_PGRAPH_NSOURCE_ILLEGAL_MTHD) {
+		if (nouveau_pgraph_intr_swmthd(dev, &trap))
+			unhandled = 1;
+	} else if (nsource & NV03_PGRAPH_NSOURCE_DMA_VTX_PROTECTION) {
+		uint32_t v = nv_rd32(dev, 0x402000);
+		nv_wr32(dev, 0x402000, v);
+
+		/* dump the error anyway for now: it's useful for
+		   Gallium development */
+		unhandled = 1;
+	} else {
+		unhandled = 1;
+	}
+
+	if (unhandled && nouveau_ratelimit())
+		nouveau_graph_dump_trap_info(dev, "PGRAPH_ERROR", &trap);
+}
+
+static inline void
+nouveau_pgraph_intr_context_switch(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_engine *engine = &dev_priv->engine;
+	uint32_t chid;
+
+	chid = engine->fifo.channel_id(dev);
+	NV_DEBUG(dev, "PGRAPH context switch interrupt channel %x\n", chid);
+
+	switch (dev_priv->card_type) {
+	case NV_04:
+		nv04_graph_context_switch(dev);
+		break;
+	case NV_10:
+		nv10_graph_context_switch(dev);
+		break;
+	default:
+		NV_ERROR(dev, "Context switch not implemented\n");
+		break;
+	}
+}
+
+static void
+nouveau_pgraph_irq_handler(struct drm_device *dev)
+{
+	uint32_t status;
+
+	while ((status = nv_rd32(dev, NV03_PGRAPH_INTR))) {
+		uint32_t nsource = nv_rd32(dev, NV03_PGRAPH_NSOURCE);
+
+		if (status & NV_PGRAPH_INTR_NOTIFY) {
+			nouveau_pgraph_intr_notify(dev, nsource);
+
+			status &= ~NV_PGRAPH_INTR_NOTIFY;
+			nv_wr32(dev, NV03_PGRAPH_INTR, NV_PGRAPH_INTR_NOTIFY);
+		}
+
+		if (status & NV_PGRAPH_INTR_ERROR) {
+			nouveau_pgraph_intr_error(dev, nsource);
+
+			status &= ~NV_PGRAPH_INTR_ERROR;
+			nv_wr32(dev, NV03_PGRAPH_INTR, NV_PGRAPH_INTR_ERROR);
+		}
+
+		if (status & NV_PGRAPH_INTR_CONTEXT_SWITCH) {
+			nouveau_pgraph_intr_context_switch(dev);
+
+			status &= ~NV_PGRAPH_INTR_CONTEXT_SWITCH;
+			nv_wr32(dev, NV03_PGRAPH_INTR,
+				 NV_PGRAPH_INTR_CONTEXT_SWITCH);
+		}
+
+		if (status) {
+			NV_INFO(dev, "Unhandled PGRAPH_INTR - 0x%08x\n", status);
+			nv_wr32(dev, NV03_PGRAPH_INTR, status);
+		}
+
+		if ((nv_rd32(dev, NV04_PGRAPH_FIFO) & (1 << 0)) == 0)
+			nv_wr32(dev, NV04_PGRAPH_FIFO, 1);
+	}
+
+	nv_wr32(dev, NV03_PMC_INTR_0, NV_PMC_INTR_0_PGRAPH_PENDING);
+}
+
+static void
+nv50_pgraph_irq_handler(struct drm_device *dev)
+{
+	uint32_t status;
+
+	while ((status = nv_rd32(dev, NV03_PGRAPH_INTR))) {
+		uint32_t nsource = nv_rd32(dev, NV03_PGRAPH_NSOURCE);
+
+		if (status & 0x00000001) {
+			nouveau_pgraph_intr_notify(dev, nsource);
+			status &= ~0x00000001;
+			nv_wr32(dev, NV03_PGRAPH_INTR, 0x00000001);
+		}
+
+		if (status & 0x00000010) {
+			nouveau_pgraph_intr_error(dev, nsource |
+					NV03_PGRAPH_NSOURCE_ILLEGAL_MTHD);
+
+			status &= ~0x00000010;
+			nv_wr32(dev, NV03_PGRAPH_INTR, 0x00000010);
+		}
+
+		if (status & 0x00001000) {
+			nv_wr32(dev, 0x400500, 0x00000000);
+			nv_wr32(dev, NV03_PGRAPH_INTR,
+				NV_PGRAPH_INTR_CONTEXT_SWITCH);
+			nv_wr32(dev, NV40_PGRAPH_INTR_EN, nv_rd32(dev,
+				NV40_PGRAPH_INTR_EN) &
+				~NV_PGRAPH_INTR_CONTEXT_SWITCH);
+			nv_wr32(dev, 0x400500, 0x00010001);
+
+			nv50_graph_context_switch(dev);
+
+			status &= ~NV_PGRAPH_INTR_CONTEXT_SWITCH;
+		}
+
+		if (status & 0x00100000) {
+			nouveau_pgraph_intr_error(dev, nsource |
+					NV03_PGRAPH_NSOURCE_DATA_ERROR);
+
+			status &= ~0x00100000;
+			nv_wr32(dev, NV03_PGRAPH_INTR, 0x00100000);
+		}
+
+		if (status & 0x00200000) {
+			int r;
+
+			nouveau_pgraph_intr_error(dev, nsource |
+					NV03_PGRAPH_NSOURCE_PROTECTION_ERROR);
+
+			NV_ERROR(dev, "magic set 1:\n");
+			for (r = 0x408900; r <= 0x408910; r += 4)
+				NV_ERROR(dev, "\t0x%08x: 0x%08x\n", r,
+					nv_rd32(dev, r));
+			nv_wr32(dev, 0x408900,
+				nv_rd32(dev, 0x408904) | 0xc0000000);
+			for (r = 0x408e08; r <= 0x408e24; r += 4)
+				NV_ERROR(dev, "\t0x%08x: 0x%08x\n", r,
+							nv_rd32(dev, r));
+			nv_wr32(dev, 0x408e08,
+				nv_rd32(dev, 0x408e08) | 0xc0000000);
+
+			NV_ERROR(dev, "magic set 2:\n");
+			for (r = 0x409900; r <= 0x409910; r += 4)
+				NV_ERROR(dev, "\t0x%08x: 0x%08x\n", r,
+					nv_rd32(dev, r));
+			nv_wr32(dev, 0x409900,
+				nv_rd32(dev, 0x409904) | 0xc0000000);
+			for (r = 0x409e08; r <= 0x409e24; r += 4)
+				NV_ERROR(dev, "\t0x%08x: 0x%08x\n", r,
+					nv_rd32(dev, r));
+			nv_wr32(dev, 0x409e08,
+				nv_rd32(dev, 0x409e08) | 0xc0000000);
+
+			status &= ~0x00200000;
+			nv_wr32(dev, NV03_PGRAPH_NSOURCE, nsource);
+			nv_wr32(dev, NV03_PGRAPH_INTR, 0x00200000);
+		}
+
+		if (status) {
+			NV_INFO(dev, "Unhandled PGRAPH_INTR - 0x%08x\n",
+				status);
+			nv_wr32(dev, NV03_PGRAPH_INTR, status);
+		}
+
+		{
+			const int isb = (1 << 16) | (1 << 0);
+
+			if ((nv_rd32(dev, 0x400500) & isb) != isb)
+				nv_wr32(dev, 0x400500,
+					nv_rd32(dev, 0x400500) | isb);
+		}
+	}
+
+	nv_wr32(dev, NV03_PMC_INTR_0, NV_PMC_INTR_0_PGRAPH_PENDING);
+	nv_wr32(dev, 0x400824, nv_rd32(dev, 0x400824) & ~(1 << 31));
+}
+
+static void
+nouveau_crtc_irq_handler(struct drm_device *dev, int crtc)
+{
+	if (crtc & 1)
+		nv_wr32(dev, NV_CRTC0_INTSTAT, NV_CRTC_INTR_VBLANK);
+
+	if (crtc & 2)
+		nv_wr32(dev, NV_CRTC1_INTSTAT, NV_CRTC_INTR_VBLANK);
+}
+
+irqreturn_t
+nouveau_irq_handler(DRM_IRQ_ARGS)
+{
+	struct drm_device *dev = (struct drm_device *)arg;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	uint32_t status, fbdev_flags = 0;
+
+	status = nv_rd32(dev, NV03_PMC_INTR_0);
+	if (!status)
+		return IRQ_NONE;
+
+	if (dev_priv->fbdev_info) {
+		fbdev_flags = dev_priv->fbdev_info->flags;
+		dev_priv->fbdev_info->flags |= FBINFO_HWACCEL_DISABLED;
+	}
+
+	if (status & NV_PMC_INTR_0_PFIFO_PENDING) {
+		nouveau_fifo_irq_handler(dev);
+		status &= ~NV_PMC_INTR_0_PFIFO_PENDING;
+	}
+
+	if (status & NV_PMC_INTR_0_PGRAPH_PENDING) {
+		if (dev_priv->card_type >= NV_50)
+			nv50_pgraph_irq_handler(dev);
+		else
+			nouveau_pgraph_irq_handler(dev);
+
+		status &= ~NV_PMC_INTR_0_PGRAPH_PENDING;
+	}
+
+	if (status & NV_PMC_INTR_0_CRTCn_PENDING) {
+		nouveau_crtc_irq_handler(dev, (status>>24)&3);
+		status &= ~NV_PMC_INTR_0_CRTCn_PENDING;
+	}
+
+	if (status & (NV_PMC_INTR_0_NV50_DISPLAY_PENDING |
+		      NV_PMC_INTR_0_NV50_I2C_PENDING)) {
+		nv50_display_irq_handler(dev);
+		status &= ~(NV_PMC_INTR_0_NV50_DISPLAY_PENDING |
+			    NV_PMC_INTR_0_NV50_I2C_PENDING);
+	}
+
+	if (status)
+		NV_ERROR(dev, "Unhandled PMC INTR status bits 0x%08x\n", status);
+
+	if (dev_priv->fbdev_info)
+		dev_priv->fbdev_info->flags = fbdev_flags;
+
+	return IRQ_HANDLED;
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -0,0 +1,1352 @@
+/*
+ * Copyright 2005 Stephane Marchesin.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef __NOUVEAU_DRV_H__
+#define __NOUVEAU_DRV_H__
+
+#define DRIVER_AUTHOR		"Stephane Marchesin"
+#define DRIVER_EMAIL		"dri-devel@lists.sourceforge.net"
+
+#define DRIVER_NAME		"nouveau"
+#define DRIVER_DESC		"nVidia Riva/TNT/GeForce"
+#define DRIVER_DATE		"20090420"
+
+#define DRIVER_MAJOR		0
+#define DRIVER_MINOR		0
+#define DRIVER_PATCHLEVEL	15
+
+#define NOUVEAU_FAMILY   0x0000FFFF
+#define NOUVEAU_FLAGS    0xFFFF0000
+
+#include "ttm/ttm_bo_api.h"
+#include "ttm/ttm_bo_driver.h"
+#include "ttm/ttm_placement.h"
+#include "ttm/ttm_memory.h"
+#include "ttm/ttm_module.h"
+
+struct nouveau_fpriv {
+	struct ttm_object_file *tfile;
+};
+
+#define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT)
+
+#include "nouveau_drm.h"
+#include "nouveau_reg.h"
+#include "nouveau_bios.h"
+struct nouveau_grctx;
+
+#define MAX_NUM_DCB_ENTRIES 16
+
+#define NOUVEAU_MAX_CHANNEL_NR 128
+#define NOUVEAU_MAX_TILE_NR 15
+
+#define NV50_VM_MAX_VRAM (2*1024*1024*1024ULL)
+#define NV50_VM_BLOCK    (512*1024*1024ULL)
+#define NV50_VM_VRAM_NR  (NV50_VM_MAX_VRAM / NV50_VM_BLOCK)
+
+struct nouveau_tile_reg {
+	struct nouveau_fence *fence;
+	uint32_t addr;
+	uint32_t size;
+	bool used;
+};
+
+struct nouveau_bo {
+	struct ttm_buffer_object bo;
+	struct ttm_placement placement;
+	u32 placements[3];
+	struct ttm_bo_kmap_obj kmap;
+	struct list_head head;
+
+	/* protected by ttm_bo_reserve() */
+	struct drm_file *reserved_by;
+	struct list_head entry;
+	int pbbo_index;
+
+	struct nouveau_channel *channel;
+
+	bool mappable;
+	bool no_vm;
+
+	uint32_t tile_mode;
+	uint32_t tile_flags;
+	struct nouveau_tile_reg *tile;
+
+	struct drm_gem_object *gem;
+	struct drm_file *cpu_filp;
+	int pin_refcnt;
+};
+
+static inline struct nouveau_bo *
+nouveau_bo(struct ttm_buffer_object *bo)
+{
+	return container_of(bo, struct nouveau_bo, bo);
+}
+
+static inline struct nouveau_bo *
+nouveau_gem_object(struct drm_gem_object *gem)
+{
+	return gem ? gem->driver_private : NULL;
+}
+
+/* TODO: submit equivalent to TTM generic API upstream? */
+static inline void __iomem *
+nvbo_kmap_obj_iovirtual(struct nouveau_bo *nvbo)
+{
+	bool is_iomem;
+	void __iomem *ioptr = (void __force __iomem *)ttm_kmap_obj_virtual(
+						&nvbo->kmap, &is_iomem);
+	WARN_ON_ONCE(ioptr && !is_iomem);
+	return ioptr;
+}
+
+struct mem_block {
+	struct mem_block *next;
+	struct mem_block *prev;
+	uint64_t start;
+	uint64_t size;
+	struct drm_file *file_priv; /* NULL: free, -1: heap, other: real files */
+};
+
+enum nouveau_flags {
+	NV_NFORCE   = 0x10000000,
+	NV_NFORCE2  = 0x20000000
+};
+
+#define NVOBJ_ENGINE_SW		0
+#define NVOBJ_ENGINE_GR		1
+#define NVOBJ_ENGINE_DISPLAY	2
+#define NVOBJ_ENGINE_INT	0xdeadbeef
+
+#define NVOBJ_FLAG_ALLOW_NO_REFS	(1 << 0)
+#define NVOBJ_FLAG_ZERO_ALLOC		(1 << 1)
+#define NVOBJ_FLAG_ZERO_FREE		(1 << 2)
+#define NVOBJ_FLAG_FAKE			(1 << 3)
+struct nouveau_gpuobj {
+	struct list_head list;
+
+	struct nouveau_channel *im_channel;
+	struct mem_block *im_pramin;
+	struct nouveau_bo *im_backing;
+	uint32_t im_backing_start;
+	uint32_t *im_backing_suspend;
+	int im_bound;
+
+	uint32_t flags;
+	int refcount;
+
+	uint32_t engine;
+	uint32_t class;
+
+	void (*dtor)(struct drm_device *, struct nouveau_gpuobj *);
+	void *priv;
+};
+
+struct nouveau_gpuobj_ref {
+	struct list_head list;
+
+	struct nouveau_gpuobj *gpuobj;
+	uint32_t instance;
+
+	struct nouveau_channel *channel;
+	int handle;
+};
+
+struct nouveau_channel {
+	struct drm_device *dev;
+	int id;
+
+	/* owner of this fifo */
+	struct drm_file *file_priv;
+	/* mapping of the fifo itself */
+	struct drm_local_map *map;
+
+	/* mapping of the regs controling the fifo */
+	void __iomem *user;
+	uint32_t user_get;
+	uint32_t user_put;
+
+	/* Fencing */
+	struct {
+		/* lock protects the pending list only */
+		spinlock_t lock;
+		struct list_head pending;
+		uint32_t sequence;
+		uint32_t sequence_ack;
+		uint32_t last_sequence_irq;
+	} fence;
+
+	/* DMA push buffer */
+	struct nouveau_gpuobj_ref *pushbuf;
+	struct nouveau_bo         *pushbuf_bo;
+	uint32_t                   pushbuf_base;
+
+	/* Notifier memory */
+	struct nouveau_bo *notifier_bo;
+	struct mem_block *notifier_heap;
+
+	/* PFIFO context */
+	struct nouveau_gpuobj_ref *ramfc;
+	struct nouveau_gpuobj_ref *cache;
+
+	/* PGRAPH context */
+	/* XXX may be merge 2 pointers as private data ??? */
+	struct nouveau_gpuobj_ref *ramin_grctx;
+	void *pgraph_ctx;
+
+	/* NV50 VM */
+	struct nouveau_gpuobj     *vm_pd;
+	struct nouveau_gpuobj_ref *vm_gart_pt;
+	struct nouveau_gpuobj_ref *vm_vram_pt[NV50_VM_VRAM_NR];
+
+	/* Objects */
+	struct nouveau_gpuobj_ref *ramin; /* Private instmem */
+	struct mem_block          *ramin_heap; /* Private PRAMIN heap */
+	struct nouveau_gpuobj_ref *ramht; /* Hash table */
+	struct list_head           ramht_refs; /* Objects referenced by RAMHT */
+
+	/* GPU object info for stuff used in-kernel (mm_enabled) */
+	uint32_t m2mf_ntfy;
+	uint32_t vram_handle;
+	uint32_t gart_handle;
+	bool accel_done;
+
+	/* Push buffer state (only for drm's channel on !mm_enabled) */
+	struct {
+		int max;
+		int free;
+		int cur;
+		int put;
+		/* access via pushbuf_bo */
+	} dma;
+
+	uint32_t sw_subchannel[8];
+
+	struct {
+		struct nouveau_gpuobj *vblsem;
+		uint32_t vblsem_offset;
+		uint32_t vblsem_rval;
+		struct list_head vbl_wait;
+	} nvsw;
+
+	struct {
+		bool active;
+		char name[32];
+		struct drm_info_list info;
+	} debugfs;
+};
+
+struct nouveau_instmem_engine {
+	void	*priv;
+
+	int	(*init)(struct drm_device *dev);
+	void	(*takedown)(struct drm_device *dev);
+	int	(*suspend)(struct drm_device *dev);
+	void	(*resume)(struct drm_device *dev);
+
+	int	(*populate)(struct drm_device *, struct nouveau_gpuobj *,
+			    uint32_t *size);
+	void	(*clear)(struct drm_device *, struct nouveau_gpuobj *);
+	int	(*bind)(struct drm_device *, struct nouveau_gpuobj *);
+	int	(*unbind)(struct drm_device *, struct nouveau_gpuobj *);
+	void	(*prepare_access)(struct drm_device *, bool write);
+	void	(*finish_access)(struct drm_device *);
+};
+
+struct nouveau_mc_engine {
+	int  (*init)(struct drm_device *dev);
+	void (*takedown)(struct drm_device *dev);
+};
+
+struct nouveau_timer_engine {
+	int      (*init)(struct drm_device *dev);
+	void     (*takedown)(struct drm_device *dev);
+	uint64_t (*read)(struct drm_device *dev);
+};
+
+struct nouveau_fb_engine {
+	int num_tiles;
+
+	int  (*init)(struct drm_device *dev);
+	void (*takedown)(struct drm_device *dev);
+
+	void (*set_region_tiling)(struct drm_device *dev, int i, uint32_t addr,
+				 uint32_t size, uint32_t pitch);
+};
+
+struct nouveau_fifo_engine {
+	void *priv;
+
+	int  channels;
+
+	int  (*init)(struct drm_device *);
+	void (*takedown)(struct drm_device *);
+
+	void (*disable)(struct drm_device *);
+	void (*enable)(struct drm_device *);
+	bool (*reassign)(struct drm_device *, bool enable);
+	bool (*cache_flush)(struct drm_device *dev);
+	bool (*cache_pull)(struct drm_device *dev, bool enable);
+
+	int  (*channel_id)(struct drm_device *);
+
+	int  (*create_context)(struct nouveau_channel *);
+	void (*destroy_context)(struct nouveau_channel *);
+	int  (*load_context)(struct nouveau_channel *);
+	int  (*unload_context)(struct drm_device *);
+};
+
+struct nouveau_pgraph_object_method {
+	int id;
+	int (*exec)(struct nouveau_channel *chan, int grclass, int mthd,
+		      uint32_t data);
+};
+
+struct nouveau_pgraph_object_class {
+	int id;
+	bool software;
+	struct nouveau_pgraph_object_method *methods;
+};
+
+struct nouveau_pgraph_engine {
+	struct nouveau_pgraph_object_class *grclass;
+	bool accel_blocked;
+	void *ctxprog;
+	void *ctxvals;
+	int grctx_size;
+
+	int  (*init)(struct drm_device *);
+	void (*takedown)(struct drm_device *);
+
+	void (*fifo_access)(struct drm_device *, bool);
+
+	struct nouveau_channel *(*channel)(struct drm_device *);
+	int  (*create_context)(struct nouveau_channel *);
+	void (*destroy_context)(struct nouveau_channel *);
+	int  (*load_context)(struct nouveau_channel *);
+	int  (*unload_context)(struct drm_device *);
+
+	void (*set_region_tiling)(struct drm_device *dev, int i, uint32_t addr,
+				  uint32_t size, uint32_t pitch);
+};
+
+struct nouveau_engine {
+	struct nouveau_instmem_engine instmem;
+	struct nouveau_mc_engine      mc;
+	struct nouveau_timer_engine   timer;
+	struct nouveau_fb_engine      fb;
+	struct nouveau_pgraph_engine  graph;
+	struct nouveau_fifo_engine    fifo;
+};
+
+struct nouveau_pll_vals {
+	union {
+		struct {
+#ifdef __BIG_ENDIAN
+			uint8_t N1, M1, N2, M2;
+#else
+			uint8_t M1, N1, M2, N2;
+#endif
+		};
+		struct {
+			uint16_t NM1, NM2;
+		} __attribute__((packed));
+	};
+	int log2P;
+
+	int refclk;
+};
+
+enum nv04_fp_display_regs {
+	FP_DISPLAY_END,
+	FP_TOTAL,
+	FP_CRTC,
+	FP_SYNC_START,
+	FP_SYNC_END,
+	FP_VALID_START,
+	FP_VALID_END
+};
+
+struct nv04_crtc_reg {
+	unsigned char MiscOutReg;     /* */
+	uint8_t CRTC[0x9f];
+	uint8_t CR58[0x10];
+	uint8_t Sequencer[5];
+	uint8_t Graphics[9];
+	uint8_t Attribute[21];
+	unsigned char DAC[768];       /* Internal Colorlookuptable */
+
+	/* PCRTC regs */
+	uint32_t fb_start;
+	uint32_t crtc_cfg;
+	uint32_t cursor_cfg;
+	uint32_t gpio_ext;
+	uint32_t crtc_830;
+	uint32_t crtc_834;
+	uint32_t crtc_850;
+	uint32_t crtc_eng_ctrl;
+
+	/* PRAMDAC regs */
+	uint32_t nv10_cursync;
+	struct nouveau_pll_vals pllvals;
+	uint32_t ramdac_gen_ctrl;
+	uint32_t ramdac_630;
+	uint32_t ramdac_634;
+	uint32_t tv_setup;
+	uint32_t tv_vtotal;
+	uint32_t tv_vskew;
+	uint32_t tv_vsync_delay;
+	uint32_t tv_htotal;
+	uint32_t tv_hskew;
+	uint32_t tv_hsync_delay;
+	uint32_t tv_hsync_delay2;
+	uint32_t fp_horiz_regs[7];
+	uint32_t fp_vert_regs[7];
+	uint32_t dither;
+	uint32_t fp_control;
+	uint32_t dither_regs[6];
+	uint32_t fp_debug_0;
+	uint32_t fp_debug_1;
+	uint32_t fp_debug_2;
+	uint32_t fp_margin_color;
+	uint32_t ramdac_8c0;
+	uint32_t ramdac_a20;
+	uint32_t ramdac_a24;
+	uint32_t ramdac_a34;
+	uint32_t ctv_regs[38];
+};
+
+struct nv04_output_reg {
+	uint32_t output;
+	int head;
+};
+
+struct nv04_mode_state {
+	uint32_t bpp;
+	uint32_t width;
+	uint32_t height;
+	uint32_t interlace;
+	uint32_t repaint0;
+	uint32_t repaint1;
+	uint32_t screen;
+	uint32_t scale;
+	uint32_t dither;
+	uint32_t extra;
+	uint32_t fifo;
+	uint32_t pixel;
+	uint32_t horiz;
+	int arbitration0;
+	int arbitration1;
+	uint32_t pll;
+	uint32_t pllB;
+	uint32_t vpll;
+	uint32_t vpll2;
+	uint32_t vpllB;
+	uint32_t vpll2B;
+	uint32_t pllsel;
+	uint32_t sel_clk;
+	uint32_t general;
+	uint32_t crtcOwner;
+	uint32_t head;
+	uint32_t head2;
+	uint32_t cursorConfig;
+	uint32_t cursor0;
+	uint32_t cursor1;
+	uint32_t cursor2;
+	uint32_t timingH;
+	uint32_t timingV;
+	uint32_t displayV;
+	uint32_t crtcSync;
+
+	struct nv04_crtc_reg crtc_reg[2];
+};
+
+enum nouveau_card_type {
+	NV_04      = 0x00,
+	NV_10      = 0x10,
+	NV_20      = 0x20,
+	NV_30      = 0x30,
+	NV_40      = 0x40,
+	NV_50      = 0x50,
+};
+
+struct drm_nouveau_private {
+	struct drm_device *dev;
+	enum {
+		NOUVEAU_CARD_INIT_DOWN,
+		NOUVEAU_CARD_INIT_DONE,
+		NOUVEAU_CARD_INIT_FAILED
+	} init_state;
+
+	/* the card type, takes NV_* as values */
+	enum nouveau_card_type card_type;
+	/* exact chipset, derived from NV_PMC_BOOT_0 */
+	int chipset;
+	int flags;
+
+	void __iomem *mmio;
+	void __iomem *ramin;
+	uint32_t ramin_size;
+
+	struct nouveau_bo *vga_ram;
+
+	struct workqueue_struct *wq;
+	struct work_struct irq_work;
+
+	struct list_head vbl_waiting;
+
+	struct {
+		struct ttm_global_reference mem_global_ref;
+		struct ttm_bo_global_ref bo_global_ref;
+		struct ttm_bo_device bdev;
+		spinlock_t bo_list_lock;
+		struct list_head bo_list;
+		atomic_t validate_sequence;
+	} ttm;
+
+	struct fb_info *fbdev_info;
+
+	int fifo_alloc_count;
+	struct nouveau_channel *fifos[NOUVEAU_MAX_CHANNEL_NR];
+
+	struct nouveau_engine engine;
+	struct nouveau_channel *channel;
+
+	/* RAMIN configuration, RAMFC, RAMHT and RAMRO offsets */
+	struct nouveau_gpuobj *ramht;
+	uint32_t ramin_rsvd_vram;
+	uint32_t ramht_offset;
+	uint32_t ramht_size;
+	uint32_t ramht_bits;
+	uint32_t ramfc_offset;
+	uint32_t ramfc_size;
+	uint32_t ramro_offset;
+	uint32_t ramro_size;
+
+	/* base physical adresses */
+	uint64_t fb_phys;
+	uint64_t fb_available_size;
+	uint64_t fb_mappable_pages;
+	uint64_t fb_aper_free;
+
+	struct {
+		enum {
+			NOUVEAU_GART_NONE = 0,
+			NOUVEAU_GART_AGP,
+			NOUVEAU_GART_SGDMA
+		} type;
+		uint64_t aper_base;
+		uint64_t aper_size;
+		uint64_t aper_free;
+
+		struct nouveau_gpuobj *sg_ctxdma;
+		struct page *sg_dummy_page;
+		dma_addr_t sg_dummy_bus;
+
+		/* nottm hack */
+		struct drm_ttm_backend *sg_be;
+		unsigned long sg_handle;
+	} gart_info;
+
+	/* nv10-nv40 tiling regions */
+	struct {
+		struct nouveau_tile_reg reg[NOUVEAU_MAX_TILE_NR];
+		spinlock_t lock;
+	} tile;
+
+	/* G8x/G9x virtual address space */
+	uint64_t vm_gart_base;
+	uint64_t vm_gart_size;
+	uint64_t vm_vram_base;
+	uint64_t vm_vram_size;
+	uint64_t vm_end;
+	struct nouveau_gpuobj *vm_vram_pt[NV50_VM_VRAM_NR];
+	int vm_vram_pt_nr;
+	uint64_t vram_sys_base;
+
+	/* the mtrr covering the FB */
+	int fb_mtrr;
+
+	struct mem_block *ramin_heap;
+
+	/* context table pointed to be NV_PGRAPH_CHANNEL_CTX_TABLE (0x400780) */
+	uint32_t ctx_table_size;
+	struct nouveau_gpuobj_ref *ctx_table;
+
+	struct list_head gpuobj_list;
+
+	struct nvbios VBIOS;
+	struct nouveau_bios_info *vbios;
+
+	struct nv04_mode_state mode_reg;
+	struct nv04_mode_state saved_reg;
+	uint32_t saved_vga_font[4][16384];
+	uint32_t crtc_owner;
+	uint32_t dac_users[4];
+
+	struct nouveau_suspend_resume {
+		uint32_t fifo_mode;
+		uint32_t graph_ctx_control;
+		uint32_t graph_state;
+		uint32_t *ramin_copy;
+		uint64_t ramin_size;
+	} susres;
+
+	struct backlight_device *backlight;
+	bool acpi_dsm;
+
+	struct nouveau_channel *evo;
+
+	struct {
+		struct dentry *channel_root;
+	} debugfs;
+};
+
+static inline struct drm_nouveau_private *
+nouveau_bdev(struct ttm_bo_device *bd)
+{
+	return container_of(bd, struct drm_nouveau_private, ttm.bdev);
+}
+
+static inline int
+nouveau_bo_ref(struct nouveau_bo *ref, struct nouveau_bo **pnvbo)
+{
+	struct nouveau_bo *prev;
+
+	if (!pnvbo)
+		return -EINVAL;
+	prev = *pnvbo;
+
+	*pnvbo = ref ? nouveau_bo(ttm_bo_reference(&ref->bo)) : NULL;
+	if (prev) {
+		struct ttm_buffer_object *bo = &prev->bo;
+
+		ttm_bo_unref(&bo);
+	}
+
+	return 0;
+}
+
+#define NOUVEAU_CHECK_INITIALISED_WITH_RETURN do {            \
+	struct drm_nouveau_private *nv = dev->dev_private;    \
+	if (nv->init_state != NOUVEAU_CARD_INIT_DONE) {       \
+		NV_ERROR(dev, "called without init\n");       \
+		return -EINVAL;                               \
+	}                                                     \
+} while (0)
+
+#define NOUVEAU_GET_USER_CHANNEL_WITH_RETURN(id, cl, ch) do {    \
+	struct drm_nouveau_private *nv = dev->dev_private;       \
+	if (!nouveau_channel_owner(dev, (cl), (id))) {           \
+		NV_ERROR(dev, "pid %d doesn't own channel %d\n", \
+			 DRM_CURRENTPID, (id));                  \
+		return -EPERM;                                   \
+	}                                                        \
+	(ch) = nv->fifos[(id)];                                  \
+} while (0)
+
+/* nouveau_drv.c */
+extern int nouveau_noagp;
+extern int nouveau_duallink;
+extern int nouveau_uscript_lvds;
+extern int nouveau_uscript_tmds;
+extern int nouveau_vram_pushbuf;
+extern int nouveau_vram_notify;
+extern int nouveau_fbpercrtc;
+extern char *nouveau_tv_norm;
+extern int nouveau_reg_debug;
+extern char *nouveau_vbios;
+extern int nouveau_ctxfw;
+extern int nouveau_ignorelid;
+extern int nouveau_nofbaccel;
+extern int nouveau_noaccel;
+
+/* nouveau_state.c */
+extern void nouveau_preclose(struct drm_device *dev, struct drm_file *);
+extern int  nouveau_load(struct drm_device *, unsigned long flags);
+extern int  nouveau_firstopen(struct drm_device *);
+extern void nouveau_lastclose(struct drm_device *);
+extern int  nouveau_unload(struct drm_device *);
+extern int  nouveau_ioctl_getparam(struct drm_device *, void *data,
+				   struct drm_file *);
+extern int  nouveau_ioctl_setparam(struct drm_device *, void *data,
+				   struct drm_file *);
+extern bool nouveau_wait_until(struct drm_device *, uint64_t timeout,
+			       uint32_t reg, uint32_t mask, uint32_t val);
+extern bool nouveau_wait_for_idle(struct drm_device *);
+extern int  nouveau_card_init(struct drm_device *);
+extern int  nouveau_ioctl_card_init(struct drm_device *, void *data,
+				    struct drm_file *);
+extern int  nouveau_ioctl_suspend(struct drm_device *, void *data,
+				  struct drm_file *);
+extern int  nouveau_ioctl_resume(struct drm_device *, void *data,
+				 struct drm_file *);
+
+/* nouveau_mem.c */
+extern int  nouveau_mem_init_heap(struct mem_block **, uint64_t start,
+				 uint64_t size);
+extern struct mem_block *nouveau_mem_alloc_block(struct mem_block *,
+						 uint64_t size, int align2,
+						 struct drm_file *, int tail);
+extern void nouveau_mem_takedown(struct mem_block **heap);
+extern void nouveau_mem_free_block(struct mem_block *);
+extern uint64_t nouveau_mem_fb_amount(struct drm_device *);
+extern void nouveau_mem_release(struct drm_file *, struct mem_block *heap);
+extern int  nouveau_mem_init(struct drm_device *);
+extern int  nouveau_mem_init_agp(struct drm_device *);
+extern void nouveau_mem_close(struct drm_device *);
+extern struct nouveau_tile_reg *nv10_mem_set_tiling(struct drm_device *dev,
+						    uint32_t addr,
+						    uint32_t size,
+						    uint32_t pitch);
+extern void nv10_mem_expire_tiling(struct drm_device *dev,
+				   struct nouveau_tile_reg *tile,
+				   struct nouveau_fence *fence);
+extern int  nv50_mem_vm_bind_linear(struct drm_device *, uint64_t virt,
+				    uint32_t size, uint32_t flags,
+				    uint64_t phys);
+extern void nv50_mem_vm_unbind(struct drm_device *, uint64_t virt,
+			       uint32_t size);
+
+/* nouveau_notifier.c */
+extern int  nouveau_notifier_init_channel(struct nouveau_channel *);
+extern void nouveau_notifier_takedown_channel(struct nouveau_channel *);
+extern int  nouveau_notifier_alloc(struct nouveau_channel *, uint32_t handle,
+				   int cout, uint32_t *offset);
+extern int  nouveau_notifier_offset(struct nouveau_gpuobj *, uint32_t *);
+extern int  nouveau_ioctl_notifier_alloc(struct drm_device *, void *data,
+					 struct drm_file *);
+extern int  nouveau_ioctl_notifier_free(struct drm_device *, void *data,
+					struct drm_file *);
+
+/* nouveau_channel.c */
+extern struct drm_ioctl_desc nouveau_ioctls[];
+extern int nouveau_max_ioctl;
+extern void nouveau_channel_cleanup(struct drm_device *, struct drm_file *);
+extern int  nouveau_channel_owner(struct drm_device *, struct drm_file *,
+				  int channel);
+extern int  nouveau_channel_alloc(struct drm_device *dev,
+				  struct nouveau_channel **chan,
+				  struct drm_file *file_priv,
+				  uint32_t fb_ctxdma, uint32_t tt_ctxdma);
+extern void nouveau_channel_free(struct nouveau_channel *);
+
+/* nouveau_object.c */
+extern int  nouveau_gpuobj_early_init(struct drm_device *);
+extern int  nouveau_gpuobj_init(struct drm_device *);
+extern void nouveau_gpuobj_takedown(struct drm_device *);
+extern void nouveau_gpuobj_late_takedown(struct drm_device *);
+extern int  nouveau_gpuobj_suspend(struct drm_device *dev);
+extern void nouveau_gpuobj_suspend_cleanup(struct drm_device *dev);
+extern void nouveau_gpuobj_resume(struct drm_device *dev);
+extern int nouveau_gpuobj_channel_init(struct nouveau_channel *,
+				       uint32_t vram_h, uint32_t tt_h);
+extern void nouveau_gpuobj_channel_takedown(struct nouveau_channel *);
+extern int nouveau_gpuobj_new(struct drm_device *, struct nouveau_channel *,
+			      uint32_t size, int align, uint32_t flags,
+			      struct nouveau_gpuobj **);
+extern int nouveau_gpuobj_del(struct drm_device *, struct nouveau_gpuobj **);
+extern int nouveau_gpuobj_ref_add(struct drm_device *, struct nouveau_channel *,
+				  uint32_t handle, struct nouveau_gpuobj *,
+				  struct nouveau_gpuobj_ref **);
+extern int nouveau_gpuobj_ref_del(struct drm_device *,
+				  struct nouveau_gpuobj_ref **);
+extern int nouveau_gpuobj_ref_find(struct nouveau_channel *, uint32_t handle,
+				   struct nouveau_gpuobj_ref **ref_ret);
+extern int nouveau_gpuobj_new_ref(struct drm_device *,
+				  struct nouveau_channel *alloc_chan,
+				  struct nouveau_channel *ref_chan,
+				  uint32_t handle, uint32_t size, int align,
+				  uint32_t flags, struct nouveau_gpuobj_ref **);
+extern int nouveau_gpuobj_new_fake(struct drm_device *,
+				   uint32_t p_offset, uint32_t b_offset,
+				   uint32_t size, uint32_t flags,
+				   struct nouveau_gpuobj **,
+				   struct nouveau_gpuobj_ref**);
+extern int nouveau_gpuobj_dma_new(struct nouveau_channel *, int class,
+				  uint64_t offset, uint64_t size, int access,
+				  int target, struct nouveau_gpuobj **);
+extern int nouveau_gpuobj_gart_dma_new(struct nouveau_channel *,
+				       uint64_t offset, uint64_t size,
+				       int access, struct nouveau_gpuobj **,
+				       uint32_t *o_ret);
+extern int nouveau_gpuobj_gr_new(struct nouveau_channel *, int class,
+				 struct nouveau_gpuobj **);
+extern int nouveau_gpuobj_sw_new(struct nouveau_channel *, int class,
+				 struct nouveau_gpuobj **);
+extern int nouveau_ioctl_grobj_alloc(struct drm_device *, void *data,
+				     struct drm_file *);
+extern int nouveau_ioctl_gpuobj_free(struct drm_device *, void *data,
+				     struct drm_file *);
+
+/* nouveau_irq.c */
+extern irqreturn_t nouveau_irq_handler(DRM_IRQ_ARGS);
+extern void        nouveau_irq_preinstall(struct drm_device *);
+extern int         nouveau_irq_postinstall(struct drm_device *);
+extern void        nouveau_irq_uninstall(struct drm_device *);
+
+/* nouveau_sgdma.c */
+extern int nouveau_sgdma_init(struct drm_device *);
+extern void nouveau_sgdma_takedown(struct drm_device *);
+extern int nouveau_sgdma_get_page(struct drm_device *, uint32_t offset,
+				  uint32_t *page);
+extern struct ttm_backend *nouveau_sgdma_init_ttm(struct drm_device *);
+
+/* nouveau_debugfs.c */
+#if defined(CONFIG_DRM_NOUVEAU_DEBUG)
+extern int  nouveau_debugfs_init(struct drm_minor *);
+extern void nouveau_debugfs_takedown(struct drm_minor *);
+extern int  nouveau_debugfs_channel_init(struct nouveau_channel *);
+extern void nouveau_debugfs_channel_fini(struct nouveau_channel *);
+#else
+static inline int
+nouveau_debugfs_init(struct drm_minor *minor)
+{
+	return 0;
+}
+
+static inline void nouveau_debugfs_takedown(struct drm_minor *minor)
+{
+}
+
+static inline int
+nouveau_debugfs_channel_init(struct nouveau_channel *chan)
+{
+	return 0;
+}
+
+static inline void
+nouveau_debugfs_channel_fini(struct nouveau_channel *chan)
+{
+}
+#endif
+
+/* nouveau_dma.c */
+extern void nouveau_dma_pre_init(struct nouveau_channel *);
+extern int  nouveau_dma_init(struct nouveau_channel *);
+extern int  nouveau_dma_wait(struct nouveau_channel *, int size);
+
+/* nouveau_acpi.c */
+#ifdef CONFIG_ACPI
+extern int nouveau_hybrid_setup(struct drm_device *dev);
+extern bool nouveau_dsm_probe(struct drm_device *dev);
+#else
+static inline int nouveau_hybrid_setup(struct drm_device *dev)
+{
+	return 0;
+}
+static inline bool nouveau_dsm_probe(struct drm_device *dev)
+{
+	return false;
+}
+#endif
+
+/* nouveau_backlight.c */
+#ifdef CONFIG_DRM_NOUVEAU_BACKLIGHT
+extern int nouveau_backlight_init(struct drm_device *);
+extern void nouveau_backlight_exit(struct drm_device *);
+#else
+static inline int nouveau_backlight_init(struct drm_device *dev)
+{
+	return 0;
+}
+
+static inline void nouveau_backlight_exit(struct drm_device *dev) { }
+#endif
+
+/* nouveau_bios.c */
+extern int nouveau_bios_init(struct drm_device *);
+extern void nouveau_bios_takedown(struct drm_device *dev);
+extern int nouveau_run_vbios_init(struct drm_device *);
+extern void nouveau_bios_run_init_table(struct drm_device *, uint16_t table,
+					struct dcb_entry *);
+extern struct dcb_gpio_entry *nouveau_bios_gpio_entry(struct drm_device *,
+						      enum dcb_gpio_tag);
+extern struct dcb_connector_table_entry *
+nouveau_bios_connector_entry(struct drm_device *, int index);
+extern int get_pll_limits(struct drm_device *, uint32_t limit_match,
+			  struct pll_lims *);
+extern int nouveau_bios_run_display_table(struct drm_device *,
+					  struct dcb_entry *,
+					  uint32_t script, int pxclk);
+extern void *nouveau_bios_dp_table(struct drm_device *, struct dcb_entry *,
+				   int *length);
+extern bool nouveau_bios_fp_mode(struct drm_device *, struct drm_display_mode *);
+extern uint8_t *nouveau_bios_embedded_edid(struct drm_device *);
+extern int nouveau_bios_parse_lvds_table(struct drm_device *, int pxclk,
+					 bool *dl, bool *if_is_24bit);
+extern int run_tmds_table(struct drm_device *, struct dcb_entry *,
+			  int head, int pxclk);
+extern int call_lvds_script(struct drm_device *, struct dcb_entry *, int head,
+			    enum LVDS_script, int pxclk);
+
+/* nouveau_ttm.c */
+int nouveau_ttm_global_init(struct drm_nouveau_private *);
+void nouveau_ttm_global_release(struct drm_nouveau_private *);
+int nouveau_ttm_mmap(struct file *, struct vm_area_struct *);
+
+/* nouveau_dp.c */
+int nouveau_dp_auxch(struct nouveau_i2c_chan *auxch, int cmd, int addr,
+		     uint8_t *data, int data_nr);
+bool nouveau_dp_detect(struct drm_encoder *);
+bool nouveau_dp_link_train(struct drm_encoder *);
+
+/* nv04_fb.c */
+extern int  nv04_fb_init(struct drm_device *);
+extern void nv04_fb_takedown(struct drm_device *);
+
+/* nv10_fb.c */
+extern int  nv10_fb_init(struct drm_device *);
+extern void nv10_fb_takedown(struct drm_device *);
+extern void nv10_fb_set_region_tiling(struct drm_device *, int, uint32_t,
+				      uint32_t, uint32_t);
+
+/* nv40_fb.c */
+extern int  nv40_fb_init(struct drm_device *);
+extern void nv40_fb_takedown(struct drm_device *);
+extern void nv40_fb_set_region_tiling(struct drm_device *, int, uint32_t,
+				      uint32_t, uint32_t);
+
+/* nv04_fifo.c */
+extern int  nv04_fifo_init(struct drm_device *);
+extern void nv04_fifo_disable(struct drm_device *);
+extern void nv04_fifo_enable(struct drm_device *);
+extern bool nv04_fifo_reassign(struct drm_device *, bool);
+extern bool nv04_fifo_cache_flush(struct drm_device *);
+extern bool nv04_fifo_cache_pull(struct drm_device *, bool);
+extern int  nv04_fifo_channel_id(struct drm_device *);
+extern int  nv04_fifo_create_context(struct nouveau_channel *);
+extern void nv04_fifo_destroy_context(struct nouveau_channel *);
+extern int  nv04_fifo_load_context(struct nouveau_channel *);
+extern int  nv04_fifo_unload_context(struct drm_device *);
+
+/* nv10_fifo.c */
+extern int  nv10_fifo_init(struct drm_device *);
+extern int  nv10_fifo_channel_id(struct drm_device *);
+extern int  nv10_fifo_create_context(struct nouveau_channel *);
+extern void nv10_fifo_destroy_context(struct nouveau_channel *);
+extern int  nv10_fifo_load_context(struct nouveau_channel *);
+extern int  nv10_fifo_unload_context(struct drm_device *);
+
+/* nv40_fifo.c */
+extern int  nv40_fifo_init(struct drm_device *);
+extern int  nv40_fifo_create_context(struct nouveau_channel *);
+extern void nv40_fifo_destroy_context(struct nouveau_channel *);
+extern int  nv40_fifo_load_context(struct nouveau_channel *);
+extern int  nv40_fifo_unload_context(struct drm_device *);
+
+/* nv50_fifo.c */
+extern int  nv50_fifo_init(struct drm_device *);
+extern void nv50_fifo_takedown(struct drm_device *);
+extern int  nv50_fifo_channel_id(struct drm_device *);
+extern int  nv50_fifo_create_context(struct nouveau_channel *);
+extern void nv50_fifo_destroy_context(struct nouveau_channel *);
+extern int  nv50_fifo_load_context(struct nouveau_channel *);
+extern int  nv50_fifo_unload_context(struct drm_device *);
+
+/* nv04_graph.c */
+extern struct nouveau_pgraph_object_class nv04_graph_grclass[];
+extern int  nv04_graph_init(struct drm_device *);
+extern void nv04_graph_takedown(struct drm_device *);
+extern void nv04_graph_fifo_access(struct drm_device *, bool);
+extern struct nouveau_channel *nv04_graph_channel(struct drm_device *);
+extern int  nv04_graph_create_context(struct nouveau_channel *);
+extern void nv04_graph_destroy_context(struct nouveau_channel *);
+extern int  nv04_graph_load_context(struct nouveau_channel *);
+extern int  nv04_graph_unload_context(struct drm_device *);
+extern void nv04_graph_context_switch(struct drm_device *);
+
+/* nv10_graph.c */
+extern struct nouveau_pgraph_object_class nv10_graph_grclass[];
+extern int  nv10_graph_init(struct drm_device *);
+extern void nv10_graph_takedown(struct drm_device *);
+extern struct nouveau_channel *nv10_graph_channel(struct drm_device *);
+extern int  nv10_graph_create_context(struct nouveau_channel *);
+extern void nv10_graph_destroy_context(struct nouveau_channel *);
+extern int  nv10_graph_load_context(struct nouveau_channel *);
+extern int  nv10_graph_unload_context(struct drm_device *);
+extern void nv10_graph_context_switch(struct drm_device *);
+extern void nv10_graph_set_region_tiling(struct drm_device *, int, uint32_t,
+					 uint32_t, uint32_t);
+
+/* nv20_graph.c */
+extern struct nouveau_pgraph_object_class nv20_graph_grclass[];
+extern struct nouveau_pgraph_object_class nv30_graph_grclass[];
+extern int  nv20_graph_create_context(struct nouveau_channel *);
+extern void nv20_graph_destroy_context(struct nouveau_channel *);
+extern int  nv20_graph_load_context(struct nouveau_channel *);
+extern int  nv20_graph_unload_context(struct drm_device *);
+extern int  nv20_graph_init(struct drm_device *);
+extern void nv20_graph_takedown(struct drm_device *);
+extern int  nv30_graph_init(struct drm_device *);
+extern void nv20_graph_set_region_tiling(struct drm_device *, int, uint32_t,
+					 uint32_t, uint32_t);
+
+/* nv40_graph.c */
+extern struct nouveau_pgraph_object_class nv40_graph_grclass[];
+extern int  nv40_graph_init(struct drm_device *);
+extern void nv40_graph_takedown(struct drm_device *);
+extern struct nouveau_channel *nv40_graph_channel(struct drm_device *);
+extern int  nv40_graph_create_context(struct nouveau_channel *);
+extern void nv40_graph_destroy_context(struct nouveau_channel *);
+extern int  nv40_graph_load_context(struct nouveau_channel *);
+extern int  nv40_graph_unload_context(struct drm_device *);
+extern void nv40_grctx_init(struct nouveau_grctx *);
+extern void nv40_graph_set_region_tiling(struct drm_device *, int, uint32_t,
+					 uint32_t, uint32_t);
+
+/* nv50_graph.c */
+extern struct nouveau_pgraph_object_class nv50_graph_grclass[];
+extern int  nv50_graph_init(struct drm_device *);
+extern void nv50_graph_takedown(struct drm_device *);
+extern void nv50_graph_fifo_access(struct drm_device *, bool);
+extern struct nouveau_channel *nv50_graph_channel(struct drm_device *);
+extern int  nv50_graph_create_context(struct nouveau_channel *);
+extern void nv50_graph_destroy_context(struct nouveau_channel *);
+extern int  nv50_graph_load_context(struct nouveau_channel *);
+extern int  nv50_graph_unload_context(struct drm_device *);
+extern void nv50_graph_context_switch(struct drm_device *);
+extern int  nv50_grctx_init(struct nouveau_grctx *);
+
+/* nouveau_grctx.c */
+extern int  nouveau_grctx_prog_load(struct drm_device *);
+extern void nouveau_grctx_vals_load(struct drm_device *,
+				    struct nouveau_gpuobj *);
+extern void nouveau_grctx_fini(struct drm_device *);
+
+/* nv04_instmem.c */
+extern int  nv04_instmem_init(struct drm_device *);
+extern void nv04_instmem_takedown(struct drm_device *);
+extern int  nv04_instmem_suspend(struct drm_device *);
+extern void nv04_instmem_resume(struct drm_device *);
+extern int  nv04_instmem_populate(struct drm_device *, struct nouveau_gpuobj *,
+				  uint32_t *size);
+extern void nv04_instmem_clear(struct drm_device *, struct nouveau_gpuobj *);
+extern int  nv04_instmem_bind(struct drm_device *, struct nouveau_gpuobj *);
+extern int  nv04_instmem_unbind(struct drm_device *, struct nouveau_gpuobj *);
+extern void nv04_instmem_prepare_access(struct drm_device *, bool write);
+extern void nv04_instmem_finish_access(struct drm_device *);
+
+/* nv50_instmem.c */
+extern int  nv50_instmem_init(struct drm_device *);
+extern void nv50_instmem_takedown(struct drm_device *);
+extern int  nv50_instmem_suspend(struct drm_device *);
+extern void nv50_instmem_resume(struct drm_device *);
+extern int  nv50_instmem_populate(struct drm_device *, struct nouveau_gpuobj *,
+				  uint32_t *size);
+extern void nv50_instmem_clear(struct drm_device *, struct nouveau_gpuobj *);
+extern int  nv50_instmem_bind(struct drm_device *, struct nouveau_gpuobj *);
+extern int  nv50_instmem_unbind(struct drm_device *, struct nouveau_gpuobj *);
+extern void nv50_instmem_prepare_access(struct drm_device *, bool write);
+extern void nv50_instmem_finish_access(struct drm_device *);
+
+/* nv04_mc.c */
+extern int  nv04_mc_init(struct drm_device *);
+extern void nv04_mc_takedown(struct drm_device *);
+
+/* nv40_mc.c */
+extern int  nv40_mc_init(struct drm_device *);
+extern void nv40_mc_takedown(struct drm_device *);
+
+/* nv50_mc.c */
+extern int  nv50_mc_init(struct drm_device *);
+extern void nv50_mc_takedown(struct drm_device *);
+
+/* nv04_timer.c */
+extern int  nv04_timer_init(struct drm_device *);
+extern uint64_t nv04_timer_read(struct drm_device *);
+extern void nv04_timer_takedown(struct drm_device *);
+
+extern long nouveau_compat_ioctl(struct file *file, unsigned int cmd,
+				 unsigned long arg);
+
+/* nv04_dac.c */
+extern int nv04_dac_create(struct drm_device *dev, struct dcb_entry *entry);
+extern uint32_t nv17_dac_sample_load(struct drm_encoder *encoder);
+extern int nv04_dac_output_offset(struct drm_encoder *encoder);
+extern void nv04_dac_update_dacclk(struct drm_encoder *encoder, bool enable);
+
+/* nv04_dfp.c */
+extern int nv04_dfp_create(struct drm_device *dev, struct dcb_entry *entry);
+extern int nv04_dfp_get_bound_head(struct drm_device *dev, struct dcb_entry *dcbent);
+extern void nv04_dfp_bind_head(struct drm_device *dev, struct dcb_entry *dcbent,
+			       int head, bool dl);
+extern void nv04_dfp_disable(struct drm_device *dev, int head);
+extern void nv04_dfp_update_fp_control(struct drm_encoder *encoder, int mode);
+
+/* nv04_tv.c */
+extern int nv04_tv_identify(struct drm_device *dev, int i2c_index);
+extern int nv04_tv_create(struct drm_device *dev, struct dcb_entry *entry);
+
+/* nv17_tv.c */
+extern int nv17_tv_create(struct drm_device *dev, struct dcb_entry *entry);
+
+/* nv04_display.c */
+extern int nv04_display_create(struct drm_device *);
+extern void nv04_display_destroy(struct drm_device *);
+extern void nv04_display_restore(struct drm_device *);
+
+/* nv04_crtc.c */
+extern int nv04_crtc_create(struct drm_device *, int index);
+
+/* nouveau_bo.c */
+extern struct ttm_bo_driver nouveau_bo_driver;
+extern int nouveau_bo_new(struct drm_device *, struct nouveau_channel *,
+			  int size, int align, uint32_t flags,
+			  uint32_t tile_mode, uint32_t tile_flags,
+			  bool no_vm, bool mappable, struct nouveau_bo **);
+extern int nouveau_bo_pin(struct nouveau_bo *, uint32_t flags);
+extern int nouveau_bo_unpin(struct nouveau_bo *);
+extern int nouveau_bo_map(struct nouveau_bo *);
+extern void nouveau_bo_unmap(struct nouveau_bo *);
+extern void nouveau_bo_placement_set(struct nouveau_bo *, uint32_t memtype);
+extern u16 nouveau_bo_rd16(struct nouveau_bo *nvbo, unsigned index);
+extern void nouveau_bo_wr16(struct nouveau_bo *nvbo, unsigned index, u16 val);
+extern u32 nouveau_bo_rd32(struct nouveau_bo *nvbo, unsigned index);
+extern void nouveau_bo_wr32(struct nouveau_bo *nvbo, unsigned index, u32 val);
+
+/* nouveau_fence.c */
+struct nouveau_fence;
+extern int nouveau_fence_init(struct nouveau_channel *);
+extern void nouveau_fence_fini(struct nouveau_channel *);
+extern void nouveau_fence_update(struct nouveau_channel *);
+extern int nouveau_fence_new(struct nouveau_channel *, struct nouveau_fence **,
+			     bool emit);
+extern int nouveau_fence_emit(struct nouveau_fence *);
+struct nouveau_channel *nouveau_fence_channel(struct nouveau_fence *);
+extern bool nouveau_fence_signalled(void *obj, void *arg);
+extern int nouveau_fence_wait(void *obj, void *arg, bool lazy, bool intr);
+extern int nouveau_fence_flush(void *obj, void *arg);
+extern void nouveau_fence_unref(void **obj);
+extern void *nouveau_fence_ref(void *obj);
+extern void nouveau_fence_handler(struct drm_device *dev, int channel);
+
+/* nouveau_gem.c */
+extern int nouveau_gem_new(struct drm_device *, struct nouveau_channel *,
+			   int size, int align, uint32_t flags,
+			   uint32_t tile_mode, uint32_t tile_flags,
+			   bool no_vm, bool mappable, struct nouveau_bo **);
+extern int nouveau_gem_object_new(struct drm_gem_object *);
+extern void nouveau_gem_object_del(struct drm_gem_object *);
+extern int nouveau_gem_ioctl_new(struct drm_device *, void *,
+				 struct drm_file *);
+extern int nouveau_gem_ioctl_pushbuf(struct drm_device *, void *,
+				     struct drm_file *);
+extern int nouveau_gem_ioctl_pushbuf_call(struct drm_device *, void *,
+					  struct drm_file *);
+extern int nouveau_gem_ioctl_pushbuf_call2(struct drm_device *, void *,
+					   struct drm_file *);
+extern int nouveau_gem_ioctl_pin(struct drm_device *, void *,
+				 struct drm_file *);
+extern int nouveau_gem_ioctl_unpin(struct drm_device *, void *,
+				   struct drm_file *);
+extern int nouveau_gem_ioctl_tile(struct drm_device *, void *,
+				  struct drm_file *);
+extern int nouveau_gem_ioctl_cpu_prep(struct drm_device *, void *,
+				      struct drm_file *);
+extern int nouveau_gem_ioctl_cpu_fini(struct drm_device *, void *,
+				      struct drm_file *);
+extern int nouveau_gem_ioctl_info(struct drm_device *, void *,
+				  struct drm_file *);
+
+/* nv17_gpio.c */
+int nv17_gpio_get(struct drm_device *dev, enum dcb_gpio_tag tag);
+int nv17_gpio_set(struct drm_device *dev, enum dcb_gpio_tag tag, int state);
+
+#ifndef ioread32_native
+#ifdef __BIG_ENDIAN
+#define ioread16_native ioread16be
+#define iowrite16_native iowrite16be
+#define ioread32_native  ioread32be
+#define iowrite32_native iowrite32be
+#else /* def __BIG_ENDIAN */
+#define ioread16_native ioread16
+#define iowrite16_native iowrite16
+#define ioread32_native  ioread32
+#define iowrite32_native iowrite32
+#endif /* def __BIG_ENDIAN else */
+#endif /* !ioread32_native */
+
+/* channel control reg access */
+static inline u32 nvchan_rd32(struct nouveau_channel *chan, unsigned reg)
+{
+	return ioread32_native(chan->user + reg);
+}
+
+static inline void nvchan_wr32(struct nouveau_channel *chan,
+							unsigned reg, u32 val)
+{
+	iowrite32_native(val, chan->user + reg);
+}
+
+/* register access */
+static inline u32 nv_rd32(struct drm_device *dev, unsigned reg)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	return ioread32_native(dev_priv->mmio + reg);
+}
+
+static inline void nv_wr32(struct drm_device *dev, unsigned reg, u32 val)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	iowrite32_native(val, dev_priv->mmio + reg);
+}
+
+static inline u8 nv_rd08(struct drm_device *dev, unsigned reg)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	return ioread8(dev_priv->mmio + reg);
+}
+
+static inline void nv_wr08(struct drm_device *dev, unsigned reg, u8 val)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	iowrite8(val, dev_priv->mmio + reg);
+}
+
+#define nv_wait(reg, mask, val) \
+	nouveau_wait_until(dev, 2000000000ULL, (reg), (mask), (val))
+
+/* PRAMIN access */
+static inline u32 nv_ri32(struct drm_device *dev, unsigned offset)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	return ioread32_native(dev_priv->ramin + offset);
+}
+
+static inline void nv_wi32(struct drm_device *dev, unsigned offset, u32 val)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	iowrite32_native(val, dev_priv->ramin + offset);
+}
+
+/* object access */
+static inline u32 nv_ro32(struct drm_device *dev, struct nouveau_gpuobj *obj,
+				unsigned index)
+{
+	return nv_ri32(dev, obj->im_pramin->start + index * 4);
+}
+
+static inline void nv_wo32(struct drm_device *dev, struct nouveau_gpuobj *obj,
+				unsigned index, u32 val)
+{
+	nv_wi32(dev, obj->im_pramin->start + index * 4, val);
+}
+
+/*
+ * Logging
+ * Argument d is (struct drm_device *).
+ */
+#define NV_PRINTK(level, d, fmt, arg...) \
+	printk(level "[" DRM_NAME "] " DRIVER_NAME " %s: " fmt, \
+					pci_name(d->pdev), ##arg)
+#ifndef NV_DEBUG_NOTRACE
+#define NV_DEBUG(d, fmt, arg...) do {                                          \
+	if (drm_debug & DRM_UT_DRIVER) {                                       \
+		NV_PRINTK(KERN_DEBUG, d, "%s:%d - " fmt, __func__,             \
+			  __LINE__, ##arg);                                    \
+	}                                                                      \
+} while (0)
+#define NV_DEBUG_KMS(d, fmt, arg...) do {                                      \
+	if (drm_debug & DRM_UT_KMS) {                                          \
+		NV_PRINTK(KERN_DEBUG, d, "%s:%d - " fmt, __func__,             \
+			  __LINE__, ##arg);                                    \
+	}                                                                      \
+} while (0)
+#else
+#define NV_DEBUG(d, fmt, arg...) do {                                          \
+	if (drm_debug & DRM_UT_DRIVER)                                         \
+		NV_PRINTK(KERN_DEBUG, d, fmt, ##arg);                          \
+} while (0)
+#define NV_DEBUG_KMS(d, fmt, arg...) do {                                      \
+	if (drm_debug & DRM_UT_KMS)                                            \
+		NV_PRINTK(KERN_DEBUG, d, fmt, ##arg);                          \
+} while (0)
+#endif
+#define NV_ERROR(d, fmt, arg...) NV_PRINTK(KERN_ERR, d, fmt, ##arg)
+#define NV_INFO(d, fmt, arg...) NV_PRINTK(KERN_INFO, d, fmt, ##arg)
+#define NV_TRACEWARN(d, fmt, arg...) NV_PRINTK(KERN_NOTICE, d, fmt, ##arg)
+#define NV_TRACE(d, fmt, arg...) NV_PRINTK(KERN_INFO, d, fmt, ##arg)
+#define NV_WARN(d, fmt, arg...) NV_PRINTK(KERN_WARNING, d, fmt, ##arg)
+
+/* nouveau_reg_debug bitmask */
+enum {
+	NOUVEAU_REG_DEBUG_MC             = 0x1,
+	NOUVEAU_REG_DEBUG_VIDEO          = 0x2,
+	NOUVEAU_REG_DEBUG_FB             = 0x4,
+	NOUVEAU_REG_DEBUG_EXTDEV         = 0x8,
+	NOUVEAU_REG_DEBUG_CRTC           = 0x10,
+	NOUVEAU_REG_DEBUG_RAMDAC         = 0x20,
+	NOUVEAU_REG_DEBUG_VGACRTC        = 0x40,
+	NOUVEAU_REG_DEBUG_RMVIO          = 0x80,
+	NOUVEAU_REG_DEBUG_VGAATTR        = 0x100,
+	NOUVEAU_REG_DEBUG_EVO            = 0x200,
+};
+
+#define NV_REG_DEBUG(type, dev, fmt, arg...) do { \
+	if (nouveau_reg_debug & NOUVEAU_REG_DEBUG_##type) \
+		NV_PRINTK(KERN_DEBUG, dev, "%s: " fmt, __func__, ##arg); \
+} while (0)
+
+static inline bool
+nv_two_heads(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	const int impl = dev->pci_device & 0x0ff0;
+
+	if (dev_priv->card_type >= NV_10 && impl != 0x0100 &&
+	    impl != 0x0150 && impl != 0x01a0 && impl != 0x0200)
+		return true;
+
+	return false;
+}
+
+static inline bool
+nv_gf4_disp_arch(struct drm_device *dev)
+{
+	return nv_two_heads(dev) && (dev->pci_device & 0x0ff0) != 0x0110;
+}
+
+static inline bool
+nv_two_reg_pll(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	const int impl = dev->pci_device & 0x0ff0;
+
+	if (impl == 0x0310 || impl == 0x0340 || dev_priv->card_type >= NV_40)
+		return true;
+	return false;
+}
+
+#define NV_SW                                                        0x0000506e
+#define NV_SW_DMA_SEMAPHORE                                          0x00000060
+#define NV_SW_SEMAPHORE_OFFSET                                       0x00000064
+#define NV_SW_SEMAPHORE_ACQUIRE                                      0x00000068
+#define NV_SW_SEMAPHORE_RELEASE                                      0x0000006c
+#define NV_SW_DMA_VBLSEM                                             0x0000018c
+#define NV_SW_VBLSEM_OFFSET                                          0x00000400
+#define NV_SW_VBLSEM_RELEASE_VALUE                                   0x00000404
+#define NV_SW_VBLSEM_RELEASE                                         0x00000408
+
+#endif /* __NOUVEAU_DRV_H__ */
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv04_display.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv04_display.c
@@ -0,0 +1,287 @@
+/*
+ * Copyright 2009 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Author: Ben Skeggs
+ */
+
+#include "drmP.h"
+#include "drm.h"
+#include "drm_crtc_helper.h"
+
+#include "nouveau_drv.h"
+#include "nouveau_fb.h"
+#include "nouveau_hw.h"
+#include "nouveau_encoder.h"
+#include "nouveau_connector.h"
+
+#define MULTIPLE_ENCODERS(e) (e & (e - 1))
+
+static void
+nv04_display_store_initial_head_owner(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+	if (dev_priv->chipset != 0x11) {
+		dev_priv->crtc_owner = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_44);
+		goto ownerknown;
+	}
+
+	/* reading CR44 is broken on nv11, so we attempt to infer it */
+	if (nvReadMC(dev, NV_PBUS_DEBUG_1) & (1 << 28))	/* heads tied, restore both */
+		dev_priv->crtc_owner = 0x4;
+	else {
+		uint8_t slaved_on_A, slaved_on_B;
+		bool tvA = false;
+		bool tvB = false;
+
+		NVLockVgaCrtcs(dev, false);
+
+		slaved_on_B = NVReadVgaCrtc(dev, 1, NV_CIO_CRE_PIXEL_INDEX) &
+									0x80;
+		if (slaved_on_B)
+			tvB = !(NVReadVgaCrtc(dev, 1, NV_CIO_CRE_LCD__INDEX) &
+					MASK(NV_CIO_CRE_LCD_LCD_SELECT));
+
+		slaved_on_A = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_PIXEL_INDEX) &
+									0x80;
+		if (slaved_on_A)
+			tvA = !(NVReadVgaCrtc(dev, 0, NV_CIO_CRE_LCD__INDEX) &
+					MASK(NV_CIO_CRE_LCD_LCD_SELECT));
+
+		NVLockVgaCrtcs(dev, true);
+
+		if (slaved_on_A && !tvA)
+			dev_priv->crtc_owner = 0x0;
+		else if (slaved_on_B && !tvB)
+			dev_priv->crtc_owner = 0x3;
+		else if (slaved_on_A)
+			dev_priv->crtc_owner = 0x0;
+		else if (slaved_on_B)
+			dev_priv->crtc_owner = 0x3;
+		else
+			dev_priv->crtc_owner = 0x0;
+	}
+
+ownerknown:
+	NV_INFO(dev, "Initial CRTC_OWNER is %d\n", dev_priv->crtc_owner);
+
+	/* we need to ensure the heads are not tied henceforth, or reading any
+	 * 8 bit reg on head B will fail
+	 * setting a single arbitrary head solves that */
+	NVSetOwner(dev, 0);
+}
+
+int
+nv04_display_create(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct parsed_dcb *dcb = dev_priv->vbios->dcb;
+	struct drm_encoder *encoder;
+	struct drm_crtc *crtc;
+	uint16_t connector[16] = { 0 };
+	int i, ret;
+
+	NV_DEBUG_KMS(dev, "\n");
+
+	if (nv_two_heads(dev))
+		nv04_display_store_initial_head_owner(dev);
+	nouveau_hw_save_vga_fonts(dev, 1);
+
+	drm_mode_config_init(dev);
+	drm_mode_create_scaling_mode_property(dev);
+	drm_mode_create_dithering_property(dev);
+
+	dev->mode_config.funcs = (void *)&nouveau_mode_config_funcs;
+
+	dev->mode_config.min_width = 0;
+	dev->mode_config.min_height = 0;
+	switch (dev_priv->card_type) {
+	case NV_04:
+		dev->mode_config.max_width = 2048;
+		dev->mode_config.max_height = 2048;
+		break;
+	default:
+		dev->mode_config.max_width = 4096;
+		dev->mode_config.max_height = 4096;
+		break;
+	}
+
+	dev->mode_config.fb_base = dev_priv->fb_phys;
+
+	nv04_crtc_create(dev, 0);
+	if (nv_two_heads(dev))
+		nv04_crtc_create(dev, 1);
+
+	for (i = 0; i < dcb->entries; i++) {
+		struct dcb_entry *dcbent = &dcb->entry[i];
+
+		switch (dcbent->type) {
+		case OUTPUT_ANALOG:
+			ret = nv04_dac_create(dev, dcbent);
+			break;
+		case OUTPUT_LVDS:
+		case OUTPUT_TMDS:
+			ret = nv04_dfp_create(dev, dcbent);
+			break;
+		case OUTPUT_TV:
+			if (dcbent->location == DCB_LOC_ON_CHIP)
+				ret = nv17_tv_create(dev, dcbent);
+			else
+				ret = nv04_tv_create(dev, dcbent);
+			break;
+		default:
+			NV_WARN(dev, "DCB type %d not known\n", dcbent->type);
+			continue;
+		}
+
+		if (ret)
+			continue;
+
+		connector[dcbent->connector] |= (1 << dcbent->type);
+	}
+
+	for (i = 0; i < dcb->entries; i++) {
+		struct dcb_entry *dcbent = &dcb->entry[i];
+		uint16_t encoders;
+		int type;
+
+		encoders = connector[dcbent->connector];
+		if (!(encoders & (1 << dcbent->type)))
+			continue;
+		connector[dcbent->connector] = 0;
+
+		switch (dcbent->type) {
+		case OUTPUT_ANALOG:
+			if (!MULTIPLE_ENCODERS(encoders))
+				type = DRM_MODE_CONNECTOR_VGA;
+			else
+				type = DRM_MODE_CONNECTOR_DVII;
+			break;
+		case OUTPUT_TMDS:
+			if (!MULTIPLE_ENCODERS(encoders))
+				type = DRM_MODE_CONNECTOR_DVID;
+			else
+				type = DRM_MODE_CONNECTOR_DVII;
+			break;
+		case OUTPUT_LVDS:
+			type = DRM_MODE_CONNECTOR_LVDS;
+#if 0
+			/* don't create i2c adapter when lvds ddc not allowed */
+			if (dcbent->lvdsconf.use_straps_for_mode ||
+			    dev_priv->vbios->fp_no_ddc)
+				i2c_index = 0xf;
+#endif
+			break;
+		case OUTPUT_TV:
+			type = DRM_MODE_CONNECTOR_TV;
+			break;
+		default:
+			type = DRM_MODE_CONNECTOR_Unknown;
+			continue;
+		}
+
+		nouveau_connector_create(dev, dcbent->connector, type);
+	}
+
+	/* Save previous state */
+	NVLockVgaCrtcs(dev, false);
+
+	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
+		crtc->funcs->save(crtc);
+
+	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
+		struct drm_encoder_helper_funcs *func = encoder->helper_private;
+
+		func->save(encoder);
+	}
+
+	return 0;
+}
+
+void
+nv04_display_destroy(struct drm_device *dev)
+{
+	struct drm_encoder *encoder;
+	struct drm_crtc *crtc;
+
+	NV_DEBUG_KMS(dev, "\n");
+
+	/* Turn every CRTC off. */
+	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
+		struct drm_mode_set modeset = {
+			.crtc = crtc,
+		};
+
+		crtc->funcs->set_config(&modeset);
+	}
+
+	/* Restore state */
+	NVLockVgaCrtcs(dev, false);
+
+	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
+		struct drm_encoder_helper_funcs *func = encoder->helper_private;
+
+		func->restore(encoder);
+	}
+
+	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
+		crtc->funcs->restore(crtc);
+
+	drm_mode_config_cleanup(dev);
+
+	nouveau_hw_save_vga_fonts(dev, 0);
+}
+
+void
+nv04_display_restore(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct drm_encoder *encoder;
+	struct drm_crtc *crtc;
+
+	NVLockVgaCrtcs(dev, false);
+
+	/* meh.. modeset apparently doesn't setup all the regs and depends
+	 * on pre-existing state, for now load the state of the card *before*
+	 * nouveau was loaded, and then do a modeset.
+	 *
+	 * best thing to do probably is to make save/restore routines not
+	 * save/restore "pre-load" state, but more general so we can save
+	 * on suspend too.
+	 */
+	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
+		struct drm_encoder_helper_funcs *func = encoder->helper_private;
+
+		func->restore(encoder);
+	}
+
+	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
+		crtc->funcs->restore(crtc);
+
+	if (nv_two_heads(dev)) {
+		NV_INFO(dev, "Restoring CRTC_OWNER to %d.\n",
+			dev_priv->crtc_owner);
+		NVSetOwner(dev, dev_priv->crtc_owner);
+	}
+
+	NVLockVgaCrtcs(dev, true);
+}
+
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv04_instmem.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv04_instmem.c
@@ -0,0 +1,208 @@
+#include "drmP.h"
+#include "drm.h"
+#include "nouveau_drv.h"
+
+/* returns the size of fifo context */
+static int
+nouveau_fifo_ctx_size(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+	if (dev_priv->chipset >= 0x40)
+		return 128;
+	else
+	if (dev_priv->chipset >= 0x17)
+		return 64;
+
+	return 32;
+}
+
+static void
+nv04_instmem_determine_amount(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	int i;
+
+	/* Figure out how much instance memory we need */
+	if (dev_priv->card_type >= NV_40) {
+		/* We'll want more instance memory than this on some NV4x cards.
+		 * There's a 16MB aperture to play with that maps onto the end
+		 * of vram.  For now, only reserve a small piece until we know
+		 * more about what each chipset requires.
+		 */
+		switch (dev_priv->chipset) {
+		case 0x40:
+		case 0x47:
+		case 0x49:
+		case 0x4b:
+			dev_priv->ramin_rsvd_vram = (2 * 1024 * 1024);
+			break;
+		default:
+			dev_priv->ramin_rsvd_vram = (1 * 1024 * 1024);
+			break;
+		}
+	} else {
+		/*XXX: what *are* the limits on <NV40 cards?
+		 */
+		dev_priv->ramin_rsvd_vram = (512 * 1024);
+	}
+	NV_DEBUG(dev, "RAMIN size: %dKiB\n", dev_priv->ramin_rsvd_vram >> 10);
+
+	/* Clear all of it, except the BIOS image that's in the first 64KiB */
+	dev_priv->engine.instmem.prepare_access(dev, true);
+	for (i = 64 * 1024; i < dev_priv->ramin_rsvd_vram; i += 4)
+		nv_wi32(dev, i, 0x00000000);
+	dev_priv->engine.instmem.finish_access(dev);
+}
+
+static void
+nv04_instmem_configure_fixed_tables(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_engine *engine = &dev_priv->engine;
+
+	/* FIFO hash table (RAMHT)
+	 *   use 4k hash table at RAMIN+0x10000
+	 *   TODO: extend the hash table
+	 */
+	dev_priv->ramht_offset = 0x10000;
+	dev_priv->ramht_bits   = 9;
+	dev_priv->ramht_size   = (1 << dev_priv->ramht_bits); /* nr entries */
+	dev_priv->ramht_size  *= 8; /* 2 32-bit values per entry in RAMHT */
+	NV_DEBUG(dev, "RAMHT offset=0x%x, size=%d\n", dev_priv->ramht_offset,
+						      dev_priv->ramht_size);
+
+	/* FIFO runout table (RAMRO) - 512k at 0x11200 */
+	dev_priv->ramro_offset = 0x11200;
+	dev_priv->ramro_size   = 512;
+	NV_DEBUG(dev, "RAMRO offset=0x%x, size=%d\n", dev_priv->ramro_offset,
+						      dev_priv->ramro_size);
+
+	/* FIFO context table (RAMFC)
+	 *   NV40  : Not sure exactly how to position RAMFC on some cards,
+	 *           0x30002 seems to position it at RAMIN+0x20000 on these
+	 *           cards.  RAMFC is 4kb (32 fifos, 128byte entries).
+	 *   Others: Position RAMFC at RAMIN+0x11400
+	 */
+	dev_priv->ramfc_size = engine->fifo.channels *
+						nouveau_fifo_ctx_size(dev);
+	switch (dev_priv->card_type) {
+	case NV_40:
+		dev_priv->ramfc_offset = 0x20000;
+		break;
+	case NV_30:
+	case NV_20:
+	case NV_10:
+	case NV_04:
+	default:
+		dev_priv->ramfc_offset = 0x11400;
+		break;
+	}
+	NV_DEBUG(dev, "RAMFC offset=0x%x, size=%d\n", dev_priv->ramfc_offset,
+						      dev_priv->ramfc_size);
+}
+
+int nv04_instmem_init(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	uint32_t offset;
+	int ret = 0;
+
+	nv04_instmem_determine_amount(dev);
+	nv04_instmem_configure_fixed_tables(dev);
+
+	/* Create a heap to manage RAMIN allocations, we don't allocate
+	 * the space that was reserved for RAMHT/FC/RO.
+	 */
+	offset = dev_priv->ramfc_offset + dev_priv->ramfc_size;
+
+	/* It appears RAMRO (or something?) is controlled by 0x2220/0x2230
+	 * on certain NV4x chipsets as well as RAMFC.  When 0x2230 == 0
+	 * ("new style" control) the upper 16-bits of 0x2220 points at this
+	 * other mysterious table that's clobbering important things.
+	 *
+	 * We're now pointing this at RAMIN+0x30000 to avoid RAMFC getting
+	 * smashed to pieces on us, so reserve 0x30000-0x40000 too..
+	 */
+	if (dev_priv->card_type >= NV_40) {
+		if (offset < 0x40000)
+			offset = 0x40000;
+	}
+
+	ret = nouveau_mem_init_heap(&dev_priv->ramin_heap,
+				    offset, dev_priv->ramin_rsvd_vram - offset);
+	if (ret) {
+		dev_priv->ramin_heap = NULL;
+		NV_ERROR(dev, "Failed to init RAMIN heap\n");
+	}
+
+	return ret;
+}
+
+void
+nv04_instmem_takedown(struct drm_device *dev)
+{
+}
+
+int
+nv04_instmem_populate(struct drm_device *dev, struct nouveau_gpuobj *gpuobj, uint32_t *sz)
+{
+	if (gpuobj->im_backing)
+		return -EINVAL;
+
+	return 0;
+}
+
+void
+nv04_instmem_clear(struct drm_device *dev, struct nouveau_gpuobj *gpuobj)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+	if (gpuobj && gpuobj->im_backing) {
+		if (gpuobj->im_bound)
+			dev_priv->engine.instmem.unbind(dev, gpuobj);
+		gpuobj->im_backing = NULL;
+	}
+}
+
+int
+nv04_instmem_bind(struct drm_device *dev, struct nouveau_gpuobj *gpuobj)
+{
+	if (!gpuobj->im_pramin || gpuobj->im_bound)
+		return -EINVAL;
+
+	gpuobj->im_bound = 1;
+	return 0;
+}
+
+int
+nv04_instmem_unbind(struct drm_device *dev, struct nouveau_gpuobj *gpuobj)
+{
+	if (gpuobj->im_bound == 0)
+		return -EINVAL;
+
+	gpuobj->im_bound = 0;
+	return 0;
+}
+
+void
+nv04_instmem_prepare_access(struct drm_device *dev, bool write)
+{
+}
+
+void
+nv04_instmem_finish_access(struct drm_device *dev)
+{
+}
+
+int
+nv04_instmem_suspend(struct drm_device *dev)
+{
+	return 0;
+}
+
+void
+nv04_instmem_resume(struct drm_device *dev)
+{
+}
+
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv40_mc.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv40_mc.c
@@ -0,0 +1,38 @@
+#include "drmP.h"
+#include "drm.h"
+#include "nouveau_drv.h"
+#include "nouveau_drm.h"
+
+int
+nv40_mc_init(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	uint32_t tmp;
+
+	/* Power up everything, resetting each individual unit will
+	 * be done later if needed.
+	 */
+	nv_wr32(dev, NV03_PMC_ENABLE, 0xFFFFFFFF);
+
+	switch (dev_priv->chipset) {
+	case 0x44:
+	case 0x46: /* G72 */
+	case 0x4e:
+	case 0x4c: /* C51_G7X */
+		tmp = nv_rd32(dev, NV40_PFB_020C);
+		nv_wr32(dev, NV40_PMC_1700, tmp);
+		nv_wr32(dev, NV40_PMC_1704, 0);
+		nv_wr32(dev, NV40_PMC_1708, 0);
+		nv_wr32(dev, NV40_PMC_170C, tmp);
+		break;
+	default:
+		break;
+	}
+
+	return 0;
+}
+
+void
+nv40_mc_takedown(struct drm_device *dev)
+{
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_state.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_state.c
@@ -0,0 +1,932 @@
+/*
+ * Copyright 2005 Stephane Marchesin
+ * Copyright 2008 Stuart Bennett
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#include <linux/swab.h>
+#include "drmP.h"
+#include "drm.h"
+#include "drm_sarea.h"
+#include "drm_crtc_helper.h"
+#include <linux/vgaarb.h>
+
+#include "nouveau_drv.h"
+#include "nouveau_drm.h"
+#include "nv50_display.h"
+
+static int nouveau_stub_init(struct drm_device *dev) { return 0; }
+static void nouveau_stub_takedown(struct drm_device *dev) {}
+
+static int nouveau_init_engine_ptrs(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_engine *engine = &dev_priv->engine;
+
+	switch (dev_priv->chipset & 0xf0) {
+	case 0x00:
+		engine->instmem.init		= nv04_instmem_init;
+		engine->instmem.takedown	= nv04_instmem_takedown;
+		engine->instmem.suspend		= nv04_instmem_suspend;
+		engine->instmem.resume		= nv04_instmem_resume;
+		engine->instmem.populate	= nv04_instmem_populate;
+		engine->instmem.clear		= nv04_instmem_clear;
+		engine->instmem.bind		= nv04_instmem_bind;
+		engine->instmem.unbind		= nv04_instmem_unbind;
+		engine->instmem.prepare_access	= nv04_instmem_prepare_access;
+		engine->instmem.finish_access	= nv04_instmem_finish_access;
+		engine->mc.init			= nv04_mc_init;
+		engine->mc.takedown		= nv04_mc_takedown;
+		engine->timer.init		= nv04_timer_init;
+		engine->timer.read		= nv04_timer_read;
+		engine->timer.takedown		= nv04_timer_takedown;
+		engine->fb.init			= nv04_fb_init;
+		engine->fb.takedown		= nv04_fb_takedown;
+		engine->graph.grclass		= nv04_graph_grclass;
+		engine->graph.init		= nv04_graph_init;
+		engine->graph.takedown		= nv04_graph_takedown;
+		engine->graph.fifo_access	= nv04_graph_fifo_access;
+		engine->graph.channel		= nv04_graph_channel;
+		engine->graph.create_context	= nv04_graph_create_context;
+		engine->graph.destroy_context	= nv04_graph_destroy_context;
+		engine->graph.load_context	= nv04_graph_load_context;
+		engine->graph.unload_context	= nv04_graph_unload_context;
+		engine->fifo.channels		= 16;
+		engine->fifo.init		= nv04_fifo_init;
+		engine->fifo.takedown		= nouveau_stub_takedown;
+		engine->fifo.disable		= nv04_fifo_disable;
+		engine->fifo.enable		= nv04_fifo_enable;
+		engine->fifo.reassign		= nv04_fifo_reassign;
+		engine->fifo.cache_flush	= nv04_fifo_cache_flush;
+		engine->fifo.cache_pull		= nv04_fifo_cache_pull;
+		engine->fifo.channel_id		= nv04_fifo_channel_id;
+		engine->fifo.create_context	= nv04_fifo_create_context;
+		engine->fifo.destroy_context	= nv04_fifo_destroy_context;
+		engine->fifo.load_context	= nv04_fifo_load_context;
+		engine->fifo.unload_context	= nv04_fifo_unload_context;
+		break;
+	case 0x10:
+		engine->instmem.init		= nv04_instmem_init;
+		engine->instmem.takedown	= nv04_instmem_takedown;
+		engine->instmem.suspend		= nv04_instmem_suspend;
+		engine->instmem.resume		= nv04_instmem_resume;
+		engine->instmem.populate	= nv04_instmem_populate;
+		engine->instmem.clear		= nv04_instmem_clear;
+		engine->instmem.bind		= nv04_instmem_bind;
+		engine->instmem.unbind		= nv04_instmem_unbind;
+		engine->instmem.prepare_access	= nv04_instmem_prepare_access;
+		engine->instmem.finish_access	= nv04_instmem_finish_access;
+		engine->mc.init			= nv04_mc_init;
+		engine->mc.takedown		= nv04_mc_takedown;
+		engine->timer.init		= nv04_timer_init;
+		engine->timer.read		= nv04_timer_read;
+		engine->timer.takedown		= nv04_timer_takedown;
+		engine->fb.init			= nv10_fb_init;
+		engine->fb.takedown		= nv10_fb_takedown;
+		engine->fb.set_region_tiling	= nv10_fb_set_region_tiling;
+		engine->graph.grclass		= nv10_graph_grclass;
+		engine->graph.init		= nv10_graph_init;
+		engine->graph.takedown		= nv10_graph_takedown;
+		engine->graph.channel		= nv10_graph_channel;
+		engine->graph.create_context	= nv10_graph_create_context;
+		engine->graph.destroy_context	= nv10_graph_destroy_context;
+		engine->graph.fifo_access	= nv04_graph_fifo_access;
+		engine->graph.load_context	= nv10_graph_load_context;
+		engine->graph.unload_context	= nv10_graph_unload_context;
+		engine->graph.set_region_tiling	= nv10_graph_set_region_tiling;
+		engine->fifo.channels		= 32;
+		engine->fifo.init		= nv10_fifo_init;
+		engine->fifo.takedown		= nouveau_stub_takedown;
+		engine->fifo.disable		= nv04_fifo_disable;
+		engine->fifo.enable		= nv04_fifo_enable;
+		engine->fifo.reassign		= nv04_fifo_reassign;
+		engine->fifo.cache_flush	= nv04_fifo_cache_flush;
+		engine->fifo.cache_pull		= nv04_fifo_cache_pull;
+		engine->fifo.channel_id		= nv10_fifo_channel_id;
+		engine->fifo.create_context	= nv10_fifo_create_context;
+		engine->fifo.destroy_context	= nv10_fifo_destroy_context;
+		engine->fifo.load_context	= nv10_fifo_load_context;
+		engine->fifo.unload_context	= nv10_fifo_unload_context;
+		break;
+	case 0x20:
+		engine->instmem.init		= nv04_instmem_init;
+		engine->instmem.takedown	= nv04_instmem_takedown;
+		engine->instmem.suspend		= nv04_instmem_suspend;
+		engine->instmem.resume		= nv04_instmem_resume;
+		engine->instmem.populate	= nv04_instmem_populate;
+		engine->instmem.clear		= nv04_instmem_clear;
+		engine->instmem.bind		= nv04_instmem_bind;
+		engine->instmem.unbind		= nv04_instmem_unbind;
+		engine->instmem.prepare_access	= nv04_instmem_prepare_access;
+		engine->instmem.finish_access	= nv04_instmem_finish_access;
+		engine->mc.init			= nv04_mc_init;
+		engine->mc.takedown		= nv04_mc_takedown;
+		engine->timer.init		= nv04_timer_init;
+		engine->timer.read		= nv04_timer_read;
+		engine->timer.takedown		= nv04_timer_takedown;
+		engine->fb.init			= nv10_fb_init;
+		engine->fb.takedown		= nv10_fb_takedown;
+		engine->fb.set_region_tiling	= nv10_fb_set_region_tiling;
+		engine->graph.grclass		= nv20_graph_grclass;
+		engine->graph.init		= nv20_graph_init;
+		engine->graph.takedown		= nv20_graph_takedown;
+		engine->graph.channel		= nv10_graph_channel;
+		engine->graph.create_context	= nv20_graph_create_context;
+		engine->graph.destroy_context	= nv20_graph_destroy_context;
+		engine->graph.fifo_access	= nv04_graph_fifo_access;
+		engine->graph.load_context	= nv20_graph_load_context;
+		engine->graph.unload_context	= nv20_graph_unload_context;
+		engine->graph.set_region_tiling	= nv20_graph_set_region_tiling;
+		engine->fifo.channels		= 32;
+		engine->fifo.init		= nv10_fifo_init;
+		engine->fifo.takedown		= nouveau_stub_takedown;
+		engine->fifo.disable		= nv04_fifo_disable;
+		engine->fifo.enable		= nv04_fifo_enable;
+		engine->fifo.reassign		= nv04_fifo_reassign;
+		engine->fifo.cache_flush	= nv04_fifo_cache_flush;
+		engine->fifo.cache_pull		= nv04_fifo_cache_pull;
+		engine->fifo.channel_id		= nv10_fifo_channel_id;
+		engine->fifo.create_context	= nv10_fifo_create_context;
+		engine->fifo.destroy_context	= nv10_fifo_destroy_context;
+		engine->fifo.load_context	= nv10_fifo_load_context;
+		engine->fifo.unload_context	= nv10_fifo_unload_context;
+		break;
+	case 0x30:
+		engine->instmem.init		= nv04_instmem_init;
+		engine->instmem.takedown	= nv04_instmem_takedown;
+		engine->instmem.suspend		= nv04_instmem_suspend;
+		engine->instmem.resume		= nv04_instmem_resume;
+		engine->instmem.populate	= nv04_instmem_populate;
+		engine->instmem.clear		= nv04_instmem_clear;
+		engine->instmem.bind		= nv04_instmem_bind;
+		engine->instmem.unbind		= nv04_instmem_unbind;
+		engine->instmem.prepare_access	= nv04_instmem_prepare_access;
+		engine->instmem.finish_access	= nv04_instmem_finish_access;
+		engine->mc.init			= nv04_mc_init;
+		engine->mc.takedown		= nv04_mc_takedown;
+		engine->timer.init		= nv04_timer_init;
+		engine->timer.read		= nv04_timer_read;
+		engine->timer.takedown		= nv04_timer_takedown;
+		engine->fb.init			= nv10_fb_init;
+		engine->fb.takedown		= nv10_fb_takedown;
+		engine->fb.set_region_tiling	= nv10_fb_set_region_tiling;
+		engine->graph.grclass		= nv30_graph_grclass;
+		engine->graph.init		= nv30_graph_init;
+		engine->graph.takedown		= nv20_graph_takedown;
+		engine->graph.fifo_access	= nv04_graph_fifo_access;
+		engine->graph.channel		= nv10_graph_channel;
+		engine->graph.create_context	= nv20_graph_create_context;
+		engine->graph.destroy_context	= nv20_graph_destroy_context;
+		engine->graph.load_context	= nv20_graph_load_context;
+		engine->graph.unload_context	= nv20_graph_unload_context;
+		engine->graph.set_region_tiling	= nv20_graph_set_region_tiling;
+		engine->fifo.channels		= 32;
+		engine->fifo.init		= nv10_fifo_init;
+		engine->fifo.takedown		= nouveau_stub_takedown;
+		engine->fifo.disable		= nv04_fifo_disable;
+		engine->fifo.enable		= nv04_fifo_enable;
+		engine->fifo.reassign		= nv04_fifo_reassign;
+		engine->fifo.cache_flush	= nv04_fifo_cache_flush;
+		engine->fifo.cache_pull		= nv04_fifo_cache_pull;
+		engine->fifo.channel_id		= nv10_fifo_channel_id;
+		engine->fifo.create_context	= nv10_fifo_create_context;
+		engine->fifo.destroy_context	= nv10_fifo_destroy_context;
+		engine->fifo.load_context	= nv10_fifo_load_context;
+		engine->fifo.unload_context	= nv10_fifo_unload_context;
+		break;
+	case 0x40:
+	case 0x60:
+		engine->instmem.init		= nv04_instmem_init;
+		engine->instmem.takedown	= nv04_instmem_takedown;
+		engine->instmem.suspend		= nv04_instmem_suspend;
+		engine->instmem.resume		= nv04_instmem_resume;
+		engine->instmem.populate	= nv04_instmem_populate;
+		engine->instmem.clear		= nv04_instmem_clear;
+		engine->instmem.bind		= nv04_instmem_bind;
+		engine->instmem.unbind		= nv04_instmem_unbind;
+		engine->instmem.prepare_access	= nv04_instmem_prepare_access;
+		engine->instmem.finish_access	= nv04_instmem_finish_access;
+		engine->mc.init			= nv40_mc_init;
+		engine->mc.takedown		= nv40_mc_takedown;
+		engine->timer.init		= nv04_timer_init;
+		engine->timer.read		= nv04_timer_read;
+		engine->timer.takedown		= nv04_timer_takedown;
+		engine->fb.init			= nv40_fb_init;
+		engine->fb.takedown		= nv40_fb_takedown;
+		engine->fb.set_region_tiling	= nv40_fb_set_region_tiling;
+		engine->graph.grclass		= nv40_graph_grclass;
+		engine->graph.init		= nv40_graph_init;
+		engine->graph.takedown		= nv40_graph_takedown;
+		engine->graph.fifo_access	= nv04_graph_fifo_access;
+		engine->graph.channel		= nv40_graph_channel;
+		engine->graph.create_context	= nv40_graph_create_context;
+		engine->graph.destroy_context	= nv40_graph_destroy_context;
+		engine->graph.load_context	= nv40_graph_load_context;
+		engine->graph.unload_context	= nv40_graph_unload_context;
+		engine->graph.set_region_tiling	= nv40_graph_set_region_tiling;
+		engine->fifo.channels		= 32;
+		engine->fifo.init		= nv40_fifo_init;
+		engine->fifo.takedown		= nouveau_stub_takedown;
+		engine->fifo.disable		= nv04_fifo_disable;
+		engine->fifo.enable		= nv04_fifo_enable;
+		engine->fifo.reassign		= nv04_fifo_reassign;
+		engine->fifo.cache_flush	= nv04_fifo_cache_flush;
+		engine->fifo.cache_pull		= nv04_fifo_cache_pull;
+		engine->fifo.channel_id		= nv10_fifo_channel_id;
+		engine->fifo.create_context	= nv40_fifo_create_context;
+		engine->fifo.destroy_context	= nv40_fifo_destroy_context;
+		engine->fifo.load_context	= nv40_fifo_load_context;
+		engine->fifo.unload_context	= nv40_fifo_unload_context;
+		break;
+	case 0x50:
+	case 0x80: /* gotta love NVIDIA's consistency.. */
+	case 0x90:
+	case 0xA0:
+		engine->instmem.init		= nv50_instmem_init;
+		engine->instmem.takedown	= nv50_instmem_takedown;
+		engine->instmem.suspend		= nv50_instmem_suspend;
+		engine->instmem.resume		= nv50_instmem_resume;
+		engine->instmem.populate	= nv50_instmem_populate;
+		engine->instmem.clear		= nv50_instmem_clear;
+		engine->instmem.bind		= nv50_instmem_bind;
+		engine->instmem.unbind		= nv50_instmem_unbind;
+		engine->instmem.prepare_access	= nv50_instmem_prepare_access;
+		engine->instmem.finish_access	= nv50_instmem_finish_access;
+		engine->mc.init			= nv50_mc_init;
+		engine->mc.takedown		= nv50_mc_takedown;
+		engine->timer.init		= nv04_timer_init;
+		engine->timer.read		= nv04_timer_read;
+		engine->timer.takedown		= nv04_timer_takedown;
+		engine->fb.init			= nouveau_stub_init;
+		engine->fb.takedown		= nouveau_stub_takedown;
+		engine->graph.grclass		= nv50_graph_grclass;
+		engine->graph.init		= nv50_graph_init;
+		engine->graph.takedown		= nv50_graph_takedown;
+		engine->graph.fifo_access	= nv50_graph_fifo_access;
+		engine->graph.channel		= nv50_graph_channel;
+		engine->graph.create_context	= nv50_graph_create_context;
+		engine->graph.destroy_context	= nv50_graph_destroy_context;
+		engine->graph.load_context	= nv50_graph_load_context;
+		engine->graph.unload_context	= nv50_graph_unload_context;
+		engine->fifo.channels		= 128;
+		engine->fifo.init		= nv50_fifo_init;
+		engine->fifo.takedown		= nv50_fifo_takedown;
+		engine->fifo.disable		= nv04_fifo_disable;
+		engine->fifo.enable		= nv04_fifo_enable;
+		engine->fifo.reassign		= nv04_fifo_reassign;
+		engine->fifo.channel_id		= nv50_fifo_channel_id;
+		engine->fifo.create_context	= nv50_fifo_create_context;
+		engine->fifo.destroy_context	= nv50_fifo_destroy_context;
+		engine->fifo.load_context	= nv50_fifo_load_context;
+		engine->fifo.unload_context	= nv50_fifo_unload_context;
+		break;
+	default:
+		NV_ERROR(dev, "NV%02x unsupported\n", dev_priv->chipset);
+		return 1;
+	}
+
+	return 0;
+}
+
+static unsigned int
+nouveau_vga_set_decode(void *priv, bool state)
+{
+	struct drm_device *dev = priv;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+	if (dev_priv->chipset >= 0x40)
+		nv_wr32(dev, 0x88054, state);
+	else
+		nv_wr32(dev, 0x1854, state);
+
+	if (state)
+		return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
+		       VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
+	else
+		return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
+}
+
+static int
+nouveau_card_init_channel(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_gpuobj *gpuobj;
+	int ret;
+
+	ret = nouveau_channel_alloc(dev, &dev_priv->channel,
+				    (struct drm_file *)-2,
+				    NvDmaFB, NvDmaTT);
+	if (ret)
+		return ret;
+
+	gpuobj = NULL;
+	ret = nouveau_gpuobj_dma_new(dev_priv->channel, NV_CLASS_DMA_IN_MEMORY,
+				     0, nouveau_mem_fb_amount(dev),
+				     NV_DMA_ACCESS_RW, NV_DMA_TARGET_VIDMEM,
+				     &gpuobj);
+	if (ret)
+		goto out_err;
+
+	ret = nouveau_gpuobj_ref_add(dev, dev_priv->channel, NvDmaVRAM,
+				     gpuobj, NULL);
+	if (ret)
+		goto out_err;
+
+	gpuobj = NULL;
+	ret = nouveau_gpuobj_gart_dma_new(dev_priv->channel, 0,
+					  dev_priv->gart_info.aper_size,
+					  NV_DMA_ACCESS_RW, &gpuobj, NULL);
+	if (ret)
+		goto out_err;
+
+	ret = nouveau_gpuobj_ref_add(dev, dev_priv->channel, NvDmaGART,
+				     gpuobj, NULL);
+	if (ret)
+		goto out_err;
+
+	return 0;
+out_err:
+	nouveau_gpuobj_del(dev, &gpuobj);
+	nouveau_channel_free(dev_priv->channel);
+	dev_priv->channel = NULL;
+	return ret;
+}
+
+int
+nouveau_card_init(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_engine *engine;
+	int ret;
+
+	NV_DEBUG(dev, "prev state = %d\n", dev_priv->init_state);
+
+	if (dev_priv->init_state == NOUVEAU_CARD_INIT_DONE)
+		return 0;
+
+	vga_client_register(dev->pdev, dev, NULL, nouveau_vga_set_decode);
+
+	/* Initialise internal driver API hooks */
+	ret = nouveau_init_engine_ptrs(dev);
+	if (ret)
+		goto out;
+	engine = &dev_priv->engine;
+	dev_priv->init_state = NOUVEAU_CARD_INIT_FAILED;
+
+	/* Parse BIOS tables / Run init tables if card not POSTed */
+	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
+		ret = nouveau_bios_init(dev);
+		if (ret)
+			goto out;
+	}
+
+	ret = nouveau_gpuobj_early_init(dev);
+	if (ret)
+		goto out_bios;
+
+	/* Initialise instance memory, must happen before mem_init so we
+	 * know exactly how much VRAM we're able to use for "normal"
+	 * purposes.
+	 */
+	ret = engine->instmem.init(dev);
+	if (ret)
+		goto out_gpuobj_early;
+
+	/* Setup the memory manager */
+	ret = nouveau_mem_init(dev);
+	if (ret)
+		goto out_instmem;
+
+	ret = nouveau_gpuobj_init(dev);
+	if (ret)
+		goto out_mem;
+
+	/* PMC */
+	ret = engine->mc.init(dev);
+	if (ret)
+		goto out_gpuobj;
+
+	/* PTIMER */
+	ret = engine->timer.init(dev);
+	if (ret)
+		goto out_mc;
+
+	/* PFB */
+	ret = engine->fb.init(dev);
+	if (ret)
+		goto out_timer;
+
+	if (nouveau_noaccel)
+		engine->graph.accel_blocked = true;
+	else {
+		/* PGRAPH */
+		ret = engine->graph.init(dev);
+		if (ret)
+			goto out_fb;
+
+		/* PFIFO */
+		ret = engine->fifo.init(dev);
+		if (ret)
+			goto out_graph;
+	}
+
+	/* this call irq_preinstall, register irq handler and
+	 * call irq_postinstall
+	 */
+	ret = drm_irq_install(dev);
+	if (ret)
+		goto out_fifo;
+
+	ret = drm_vblank_init(dev, 0);
+	if (ret)
+		goto out_irq;
+
+	/* what about PVIDEO/PCRTC/PRAMDAC etc? */
+
+	if (!engine->graph.accel_blocked) {
+		ret = nouveau_card_init_channel(dev);
+		if (ret)
+			goto out_irq;
+	}
+
+	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
+		if (dev_priv->card_type >= NV_50)
+			ret = nv50_display_create(dev);
+		else
+			ret = nv04_display_create(dev);
+		if (ret)
+			goto out_irq;
+	}
+
+	ret = nouveau_backlight_init(dev);
+	if (ret)
+		NV_ERROR(dev, "Error %d registering backlight\n", ret);
+
+	dev_priv->init_state = NOUVEAU_CARD_INIT_DONE;
+
+	if (drm_core_check_feature(dev, DRIVER_MODESET))
+		drm_helper_initial_config(dev);
+
+	return 0;
+
+out_irq:
+	drm_irq_uninstall(dev);
+out_fifo:
+	if (!nouveau_noaccel)
+		engine->fifo.takedown(dev);
+out_graph:
+	if (!nouveau_noaccel)
+		engine->graph.takedown(dev);
+out_fb:
+	engine->fb.takedown(dev);
+out_timer:
+	engine->timer.takedown(dev);
+out_mc:
+	engine->mc.takedown(dev);
+out_gpuobj:
+	nouveau_gpuobj_takedown(dev);
+out_mem:
+	nouveau_mem_close(dev);
+out_instmem:
+	engine->instmem.takedown(dev);
+out_gpuobj_early:
+	nouveau_gpuobj_late_takedown(dev);
+out_bios:
+	nouveau_bios_takedown(dev);
+out:
+	vga_client_register(dev->pdev, NULL, NULL, NULL);
+	return ret;
+}
+
+static void nouveau_card_takedown(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_engine *engine = &dev_priv->engine;
+
+	NV_DEBUG(dev, "prev state = %d\n", dev_priv->init_state);
+
+	if (dev_priv->init_state != NOUVEAU_CARD_INIT_DOWN) {
+		nouveau_backlight_exit(dev);
+
+		if (dev_priv->channel) {
+			nouveau_channel_free(dev_priv->channel);
+			dev_priv->channel = NULL;
+		}
+
+		if (!nouveau_noaccel) {
+			engine->fifo.takedown(dev);
+			engine->graph.takedown(dev);
+		}
+		engine->fb.takedown(dev);
+		engine->timer.takedown(dev);
+		engine->mc.takedown(dev);
+
+		mutex_lock(&dev->struct_mutex);
+		ttm_bo_clean_mm(&dev_priv->ttm.bdev, TTM_PL_VRAM);
+		ttm_bo_clean_mm(&dev_priv->ttm.bdev, TTM_PL_TT);
+		mutex_unlock(&dev->struct_mutex);
+		nouveau_sgdma_takedown(dev);
+
+		nouveau_gpuobj_takedown(dev);
+		nouveau_mem_close(dev);
+		engine->instmem.takedown(dev);
+
+		if (drm_core_check_feature(dev, DRIVER_MODESET))
+			drm_irq_uninstall(dev);
+
+		nouveau_gpuobj_late_takedown(dev);
+		nouveau_bios_takedown(dev);
+
+		vga_client_register(dev->pdev, NULL, NULL, NULL);
+
+		dev_priv->init_state = NOUVEAU_CARD_INIT_DOWN;
+	}
+}
+
+/* here a client dies, release the stuff that was allocated for its
+ * file_priv */
+void nouveau_preclose(struct drm_device *dev, struct drm_file *file_priv)
+{
+	nouveau_channel_cleanup(dev, file_priv);
+}
+
+/* first module load, setup the mmio/fb mapping */
+/* KMS: we need mmio at load time, not when the first drm client opens. */
+int nouveau_firstopen(struct drm_device *dev)
+{
+	return 0;
+}
+
+/* if we have an OF card, copy vbios to RAMIN */
+static void nouveau_OF_copy_vbios_to_ramin(struct drm_device *dev)
+{
+#if defined(__powerpc__)
+	int size, i;
+	const uint32_t *bios;
+	struct device_node *dn = pci_device_to_OF_node(dev->pdev);
+	if (!dn) {
+		NV_INFO(dev, "Unable to get the OF node\n");
+		return;
+	}
+
+	bios = of_get_property(dn, "NVDA,BMP", &size);
+	if (bios) {
+		for (i = 0; i < size; i += 4)
+			nv_wi32(dev, i, bios[i/4]);
+		NV_INFO(dev, "OF bios successfully copied (%d bytes)\n", size);
+	} else {
+		NV_INFO(dev, "Unable to get the OF bios\n");
+	}
+#endif
+}
+
+static void nouveau_apply_noaccel_quirks (struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	if (nouveau_noaccel == -1) {
+		/* If not specified, noaccel should default off */
+		nouveau_noaccel = 0;
+
+		/* MacBook Pro laptops with 9600GT cards hang with acceleration */
+		/* See https://bugs.launchpad.net/bugs/546393 */
+		if ((dev->pdev->device == 0x0647) &&
+		    (dev->pdev->subsystem_vendor == 0x106b)) {
+			nouveau_noaccel = 1;
+			NV_INFO(dev, "Detected MacBook Pro 9600GT chip. "
+				 "Disabling acceleration\n");
+		}
+		/* At least two of the three nv20 cards hang with acceleration */
+		/* See https://bugs.launchpad.net/bugs/544088 */
+		if (dev_priv->chipset == 0x20) {
+			nouveau_noaccel = 1;
+			NV_INFO(dev, "Detected NV20 (GeForce 3) chip. "
+				 "Disabling acceleration\n");
+		}
+		/* GeForce 6100 cards also hang with acceleration */
+		/* See https://bugs.launchpad.net/bugs/542950 */
+		if (dev->pdev->device == 0x0242) {
+			nouveau_noaccel = 1;
+			NV_INFO(dev, "Detected GeForce 6100 chip. "
+				 "Disabling acceleration\n");
+		}
+	}
+}
+
+int nouveau_load(struct drm_device *dev, unsigned long flags)
+{
+	struct drm_nouveau_private *dev_priv;
+	uint32_t reg0;
+	resource_size_t mmio_start_offs;
+
+	dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
+	if (!dev_priv)
+		return -ENOMEM;
+	dev->dev_private = dev_priv;
+	dev_priv->dev = dev;
+
+	dev_priv->flags = flags & NOUVEAU_FLAGS;
+	dev_priv->init_state = NOUVEAU_CARD_INIT_DOWN;
+
+	NV_DEBUG(dev, "vendor: 0x%X device: 0x%X class: 0x%X\n",
+		 dev->pci_vendor, dev->pci_device, dev->pdev->class);
+
+	dev_priv->acpi_dsm = nouveau_dsm_probe(dev);
+
+	if (dev_priv->acpi_dsm)
+		nouveau_hybrid_setup(dev);
+
+	dev_priv->wq = create_workqueue("nouveau");
+	if (!dev_priv->wq)
+		return -EINVAL;
+
+	/* resource 0 is mmio regs */
+	/* resource 1 is linear FB */
+	/* resource 2 is RAMIN (mmio regs + 0x1000000) */
+	/* resource 6 is bios */
+
+	/* map the mmio regs */
+	mmio_start_offs = pci_resource_start(dev->pdev, 0);
+	dev_priv->mmio = ioremap(mmio_start_offs, 0x00800000);
+	if (!dev_priv->mmio) {
+		NV_ERROR(dev, "Unable to initialize the mmio mapping. "
+			 "Please report your setup to " DRIVER_EMAIL "\n");
+		return -EINVAL;
+	}
+	NV_DEBUG(dev, "regs mapped ok at 0x%llx\n",
+					(unsigned long long)mmio_start_offs);
+
+#ifdef __BIG_ENDIAN
+	/* Put the card in BE mode if it's not */
+	if (nv_rd32(dev, NV03_PMC_BOOT_1))
+		nv_wr32(dev, NV03_PMC_BOOT_1, 0x00000001);
+
+	DRM_MEMORYBARRIER();
+#endif
+
+	/* Time to determine the card architecture */
+	reg0 = nv_rd32(dev, NV03_PMC_BOOT_0);
+
+	/* We're dealing with >=NV10 */
+	if ((reg0 & 0x0f000000) > 0) {
+		/* Bit 27-20 contain the architecture in hex */
+		dev_priv->chipset = (reg0 & 0xff00000) >> 20;
+	/* NV04 or NV05 */
+	} else if ((reg0 & 0xff00fff0) == 0x20004000) {
+		if (reg0 & 0x00f00000)
+			dev_priv->chipset = 0x05;
+		else
+			dev_priv->chipset = 0x04;
+	} else
+		dev_priv->chipset = 0xff;
+
+	switch (dev_priv->chipset & 0xf0) {
+	case 0x00:
+	case 0x10:
+	case 0x20:
+	case 0x30:
+		dev_priv->card_type = dev_priv->chipset & 0xf0;
+		break;
+	case 0x40:
+	case 0x60:
+		dev_priv->card_type = NV_40;
+		break;
+	case 0x50:
+	case 0x80:
+	case 0x90:
+	case 0xa0:
+		dev_priv->card_type = NV_50;
+		break;
+	default:
+		NV_INFO(dev, "Unsupported chipset 0x%08x\n", reg0);
+		return -EINVAL;
+	}
+
+	NV_INFO(dev, "Detected an NV%2x generation card (0x%08x)\n",
+		dev_priv->card_type, reg0);
+
+	/* map larger RAMIN aperture on NV40 cards */
+	dev_priv->ramin  = NULL;
+	if (dev_priv->card_type >= NV_40) {
+		int ramin_bar = 2;
+		if (pci_resource_len(dev->pdev, ramin_bar) == 0)
+			ramin_bar = 3;
+
+		dev_priv->ramin_size = pci_resource_len(dev->pdev, ramin_bar);
+		dev_priv->ramin = ioremap(
+				pci_resource_start(dev->pdev, ramin_bar),
+				dev_priv->ramin_size);
+		if (!dev_priv->ramin) {
+			NV_ERROR(dev, "Failed to init RAMIN mapping, "
+				      "limited instance memory available\n");
+		}
+	}
+
+	/* On older cards (or if the above failed), create a map covering
+	 * the BAR0 PRAMIN aperture */
+	if (!dev_priv->ramin) {
+		dev_priv->ramin_size = 1 * 1024 * 1024;
+		dev_priv->ramin = ioremap(mmio_start_offs + NV_RAMIN,
+							dev_priv->ramin_size);
+		if (!dev_priv->ramin) {
+			NV_ERROR(dev, "Failed to map BAR0 PRAMIN.\n");
+			return -ENOMEM;
+		}
+	}
+
+	nouveau_OF_copy_vbios_to_ramin(dev);
+
+	/* Special flags */
+	if (dev->pci_device == 0x01a0)
+		dev_priv->flags |= NV_NFORCE;
+	else if (dev->pci_device == 0x01f0)
+		dev_priv->flags |= NV_NFORCE2;
+
+	/* Apply noaccel quirks */
+	nouveau_apply_noaccel_quirks(dev);
+
+	/* For kernel modesetting, init card now and bring up fbcon */
+	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
+		int ret = nouveau_card_init(dev);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+static void nouveau_close(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+	/* In the case of an error dev_priv may not be allocated yet */
+	if (dev_priv)
+		nouveau_card_takedown(dev);
+}
+
+/* KMS: we need mmio at load time, not when the first drm client opens. */
+void nouveau_lastclose(struct drm_device *dev)
+{
+	if (drm_core_check_feature(dev, DRIVER_MODESET))
+		return;
+
+	nouveau_close(dev);
+}
+
+int nouveau_unload(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
+		if (dev_priv->card_type >= NV_50)
+			nv50_display_destroy(dev);
+		else
+			nv04_display_destroy(dev);
+		nouveau_close(dev);
+	}
+
+	iounmap(dev_priv->mmio);
+	iounmap(dev_priv->ramin);
+
+	kfree(dev_priv);
+	dev->dev_private = NULL;
+	return 0;
+}
+
+int
+nouveau_ioctl_card_init(struct drm_device *dev, void *data,
+			struct drm_file *file_priv)
+{
+	return nouveau_card_init(dev);
+}
+
+int nouveau_ioctl_getparam(struct drm_device *dev, void *data,
+						struct drm_file *file_priv)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct drm_nouveau_getparam *getparam = data;
+
+	NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
+
+	switch (getparam->param) {
+	case NOUVEAU_GETPARAM_CHIPSET_ID:
+		getparam->value = dev_priv->chipset;
+		break;
+	case NOUVEAU_GETPARAM_PCI_VENDOR:
+		getparam->value = dev->pci_vendor;
+		break;
+	case NOUVEAU_GETPARAM_PCI_DEVICE:
+		getparam->value = dev->pci_device;
+		break;
+	case NOUVEAU_GETPARAM_BUS_TYPE:
+		if (drm_device_is_agp(dev))
+			getparam->value = NV_AGP;
+		else if (drm_device_is_pcie(dev))
+			getparam->value = NV_PCIE;
+		else
+			getparam->value = NV_PCI;
+		break;
+	case NOUVEAU_GETPARAM_FB_PHYSICAL:
+		getparam->value = dev_priv->fb_phys;
+		break;
+	case NOUVEAU_GETPARAM_AGP_PHYSICAL:
+		getparam->value = dev_priv->gart_info.aper_base;
+		break;
+	case NOUVEAU_GETPARAM_PCI_PHYSICAL:
+		if (dev->sg) {
+			getparam->value = (unsigned long)dev->sg->virtual;
+		} else {
+			NV_ERROR(dev, "Requested PCIGART address, "
+					"while no PCIGART was created\n");
+			return -EINVAL;
+		}
+		break;
+	case NOUVEAU_GETPARAM_FB_SIZE:
+		getparam->value = dev_priv->fb_available_size;
+		break;
+	case NOUVEAU_GETPARAM_AGP_SIZE:
+		getparam->value = dev_priv->gart_info.aper_size;
+		break;
+	case NOUVEAU_GETPARAM_VM_VRAM_BASE:
+		getparam->value = dev_priv->vm_vram_base;
+		break;
+	case NOUVEAU_GETPARAM_GRAPH_UNITS:
+		/* NV40 and NV50 versions are quite different, but register
+		 * address is the same. User is supposed to know the card
+		 * family anyway... */
+		if (dev_priv->chipset >= 0x40) {
+			getparam->value = nv_rd32(dev, NV40_PMC_GRAPH_UNITS);
+			break;
+		}
+		/* FALLTHRU */
+	default:
+		NV_ERROR(dev, "unknown parameter %lld\n", getparam->param);
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+int
+nouveau_ioctl_setparam(struct drm_device *dev, void *data,
+		       struct drm_file *file_priv)
+{
+	struct drm_nouveau_setparam *setparam = data;
+
+	NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
+
+	switch (setparam->param) {
+	default:
+		NV_ERROR(dev, "unknown parameter %lld\n", setparam->param);
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+/* Wait until (value(reg) & mask) == val, up until timeout has hit */
+bool nouveau_wait_until(struct drm_device *dev, uint64_t timeout,
+			uint32_t reg, uint32_t mask, uint32_t val)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_timer_engine *ptimer = &dev_priv->engine.timer;
+	uint64_t start = ptimer->read(dev);
+
+	do {
+		if ((nv_rd32(dev, reg) & mask) == val)
+			return true;
+	} while (ptimer->read(dev) - start < timeout);
+
+	return false;
+}
+
+/* Waits for PGRAPH to go completely idle */
+bool nouveau_wait_for_idle(struct drm_device *dev)
+{
+	if (!nv_wait(NV04_PGRAPH_STATUS, 0xffffffff, 0x00000000)) {
+		NV_ERROR(dev, "PGRAPH idle timed out with status 0x%08x\n",
+			 nv_rd32(dev, NV04_PGRAPH_STATUS));
+		return false;
+	}
+
+	return true;
+}
+
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_hw.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_hw.h
@@ -0,0 +1,455 @@
+/*
+ * Copyright 2008 Stuart Bennett
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifndef __NOUVEAU_HW_H__
+#define __NOUVEAU_HW_H__
+
+#include "drmP.h"
+#include "nouveau_drv.h"
+
+#define MASK(field) ( \
+	(0xffffffff >> (31 - ((1 ? field) - (0 ? field)))) << (0 ? field))
+
+#define XLATE(src, srclowbit, outfield) ( \
+	(((src) >> (srclowbit)) << (0 ? outfield)) & MASK(outfield))
+
+void NVWriteVgaSeq(struct drm_device *, int head, uint8_t index, uint8_t value);
+uint8_t NVReadVgaSeq(struct drm_device *, int head, uint8_t index);
+void NVWriteVgaGr(struct drm_device *, int head, uint8_t index, uint8_t value);
+uint8_t NVReadVgaGr(struct drm_device *, int head, uint8_t index);
+void NVSetOwner(struct drm_device *, int owner);
+void NVBlankScreen(struct drm_device *, int head, bool blank);
+void nouveau_hw_setpll(struct drm_device *, uint32_t reg1,
+		       struct nouveau_pll_vals *pv);
+int nouveau_hw_get_pllvals(struct drm_device *, enum pll_types plltype,
+			   struct nouveau_pll_vals *pllvals);
+int nouveau_hw_pllvals_to_clk(struct nouveau_pll_vals *pllvals);
+int nouveau_hw_get_clock(struct drm_device *, enum pll_types plltype);
+void nouveau_hw_save_vga_fonts(struct drm_device *, bool save);
+void nouveau_hw_save_state(struct drm_device *, int head,
+			   struct nv04_mode_state *state);
+void nouveau_hw_load_state(struct drm_device *, int head,
+			   struct nv04_mode_state *state);
+void nouveau_hw_load_state_palette(struct drm_device *, int head,
+				   struct nv04_mode_state *state);
+
+/* nouveau_calc.c */
+extern void nouveau_calc_arb(struct drm_device *, int vclk, int bpp,
+			     int *burst, int *lwm);
+extern int nouveau_calc_pll_mnp(struct drm_device *, struct pll_lims *pll_lim,
+				int clk, struct nouveau_pll_vals *pv);
+
+static inline uint32_t
+nvReadMC(struct drm_device *dev, uint32_t reg)
+{
+	uint32_t val = nv_rd32(dev, reg);
+	NV_REG_DEBUG(MC, dev, "reg %08x val %08x\n", reg, val);
+	return val;
+}
+
+static inline void
+nvWriteMC(struct drm_device *dev, uint32_t reg, uint32_t val)
+{
+	NV_REG_DEBUG(MC, dev, "reg %08x val %08x\n", reg, val);
+	nv_wr32(dev, reg, val);
+}
+
+static inline uint32_t
+nvReadVIDEO(struct drm_device *dev, uint32_t reg)
+{
+	uint32_t val = nv_rd32(dev, reg);
+	NV_REG_DEBUG(VIDEO, dev, "reg %08x val %08x\n", reg, val);
+	return val;
+}
+
+static inline void
+nvWriteVIDEO(struct drm_device *dev, uint32_t reg, uint32_t val)
+{
+	NV_REG_DEBUG(VIDEO, dev, "reg %08x val %08x\n", reg, val);
+	nv_wr32(dev, reg, val);
+}
+
+static inline uint32_t
+nvReadFB(struct drm_device *dev, uint32_t reg)
+{
+	uint32_t val = nv_rd32(dev, reg);
+	NV_REG_DEBUG(FB, dev, "reg %08x val %08x\n", reg, val);
+	return val;
+}
+
+static inline void
+nvWriteFB(struct drm_device *dev, uint32_t reg, uint32_t val)
+{
+	NV_REG_DEBUG(FB, dev, "reg %08x val %08x\n", reg, val);
+	nv_wr32(dev, reg, val);
+}
+
+static inline uint32_t
+nvReadEXTDEV(struct drm_device *dev, uint32_t reg)
+{
+	uint32_t val = nv_rd32(dev, reg);
+	NV_REG_DEBUG(EXTDEV, dev, "reg %08x val %08x\n", reg, val);
+	return val;
+}
+
+static inline void
+nvWriteEXTDEV(struct drm_device *dev, uint32_t reg, uint32_t val)
+{
+	NV_REG_DEBUG(EXTDEV, dev, "reg %08x val %08x\n", reg, val);
+	nv_wr32(dev, reg, val);
+}
+
+static inline uint32_t NVReadCRTC(struct drm_device *dev,
+					int head, uint32_t reg)
+{
+	uint32_t val;
+	if (head)
+		reg += NV_PCRTC0_SIZE;
+	val = nv_rd32(dev, reg);
+	NV_REG_DEBUG(CRTC, dev, "head %d reg %08x val %08x\n", head, reg, val);
+	return val;
+}
+
+static inline void NVWriteCRTC(struct drm_device *dev,
+					int head, uint32_t reg, uint32_t val)
+{
+	if (head)
+		reg += NV_PCRTC0_SIZE;
+	NV_REG_DEBUG(CRTC, dev, "head %d reg %08x val %08x\n", head, reg, val);
+	nv_wr32(dev, reg, val);
+}
+
+static inline uint32_t NVReadRAMDAC(struct drm_device *dev,
+					int head, uint32_t reg)
+{
+	uint32_t val;
+	if (head)
+		reg += NV_PRAMDAC0_SIZE;
+	val = nv_rd32(dev, reg);
+	NV_REG_DEBUG(RAMDAC, dev, "head %d reg %08x val %08x\n",
+							head, reg, val);
+	return val;
+}
+
+static inline void NVWriteRAMDAC(struct drm_device *dev,
+					int head, uint32_t reg, uint32_t val)
+{
+	if (head)
+		reg += NV_PRAMDAC0_SIZE;
+	NV_REG_DEBUG(RAMDAC, dev, "head %d reg %08x val %08x\n",
+							head, reg, val);
+	nv_wr32(dev, reg, val);
+}
+
+static inline uint8_t nv_read_tmds(struct drm_device *dev,
+					int or, int dl, uint8_t address)
+{
+	int ramdac = (or & OUTPUT_C) >> 2;
+
+	NVWriteRAMDAC(dev, ramdac, NV_PRAMDAC_FP_TMDS_CONTROL + dl * 8,
+	NV_PRAMDAC_FP_TMDS_CONTROL_WRITE_DISABLE | address);
+	return NVReadRAMDAC(dev, ramdac, NV_PRAMDAC_FP_TMDS_DATA + dl * 8);
+}
+
+static inline void nv_write_tmds(struct drm_device *dev,
+					int or, int dl, uint8_t address,
+					uint8_t data)
+{
+	int ramdac = (or & OUTPUT_C) >> 2;
+
+	NVWriteRAMDAC(dev, ramdac, NV_PRAMDAC_FP_TMDS_DATA + dl * 8, data);
+	NVWriteRAMDAC(dev, ramdac, NV_PRAMDAC_FP_TMDS_CONTROL + dl * 8, address);
+}
+
+static inline void NVWriteVgaCrtc(struct drm_device *dev,
+					int head, uint8_t index, uint8_t value)
+{
+	NV_REG_DEBUG(VGACRTC, dev, "head %d index 0x%02x data 0x%02x\n",
+							head, index, value);
+	nv_wr08(dev, NV_PRMCIO_CRX__COLOR + head * NV_PRMCIO_SIZE, index);
+	nv_wr08(dev, NV_PRMCIO_CR__COLOR + head * NV_PRMCIO_SIZE, value);
+}
+
+static inline uint8_t NVReadVgaCrtc(struct drm_device *dev,
+					int head, uint8_t index)
+{
+	uint8_t val;
+	nv_wr08(dev, NV_PRMCIO_CRX__COLOR + head * NV_PRMCIO_SIZE, index);
+	val = nv_rd08(dev, NV_PRMCIO_CR__COLOR + head * NV_PRMCIO_SIZE);
+	NV_REG_DEBUG(VGACRTC, dev, "head %d index 0x%02x data 0x%02x\n",
+							head, index, val);
+	return val;
+}
+
+/* CR57 and CR58 are a fun pair of regs. CR57 provides an index (0-0xf) for CR58
+ * I suspect they in fact do nothing, but are merely a way to carry useful
+ * per-head variables around
+ *
+ * Known uses:
+ * CR57		CR58
+ * 0x00		index to the appropriate dcb entry (or 7f for inactive)
+ * 0x02		dcb entry's "or" value (or 00 for inactive)
+ * 0x03		bit0 set for dual link (LVDS, possibly elsewhere too)
+ * 0x08 or 0x09	pxclk in MHz
+ * 0x0f		laptop panel info -	low nibble for PEXTDEV_BOOT_0 strap
+ * 					high nibble for xlat strap value
+ */
+
+static inline void
+NVWriteVgaCrtc5758(struct drm_device *dev, int head, uint8_t index, uint8_t value)
+{
+	NVWriteVgaCrtc(dev, head, NV_CIO_CRE_57, index);
+	NVWriteVgaCrtc(dev, head, NV_CIO_CRE_58, value);
+}
+
+static inline uint8_t NVReadVgaCrtc5758(struct drm_device *dev, int head, uint8_t index)
+{
+	NVWriteVgaCrtc(dev, head, NV_CIO_CRE_57, index);
+	return NVReadVgaCrtc(dev, head, NV_CIO_CRE_58);
+}
+
+static inline uint8_t NVReadPRMVIO(struct drm_device *dev,
+					int head, uint32_t reg)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	uint8_t val;
+
+	/* Only NV4x have two pvio ranges; other twoHeads cards MUST call
+	 * NVSetOwner for the relevant head to be programmed */
+	if (head && dev_priv->card_type == NV_40)
+		reg += NV_PRMVIO_SIZE;
+
+	val = nv_rd08(dev, reg);
+	NV_REG_DEBUG(RMVIO, dev, "head %d reg %08x val %02x\n", head, reg, val);
+	return val;
+}
+
+static inline void NVWritePRMVIO(struct drm_device *dev,
+					int head, uint32_t reg, uint8_t value)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+	/* Only NV4x have two pvio ranges; other twoHeads cards MUST call
+	 * NVSetOwner for the relevant head to be programmed */
+	if (head && dev_priv->card_type == NV_40)
+		reg += NV_PRMVIO_SIZE;
+
+	NV_REG_DEBUG(RMVIO, dev, "head %d reg %08x val %02x\n",
+						head, reg, value);
+	nv_wr08(dev, reg, value);
+}
+
+static inline void NVSetEnablePalette(struct drm_device *dev, int head, bool enable)
+{
+	nv_rd08(dev, NV_PRMCIO_INP0__COLOR + head * NV_PRMCIO_SIZE);
+	nv_wr08(dev, NV_PRMCIO_ARX + head * NV_PRMCIO_SIZE, enable ? 0 : 0x20);
+}
+
+static inline bool NVGetEnablePalette(struct drm_device *dev, int head)
+{
+	nv_rd08(dev, NV_PRMCIO_INP0__COLOR + head * NV_PRMCIO_SIZE);
+	return !(nv_rd08(dev, NV_PRMCIO_ARX + head * NV_PRMCIO_SIZE) & 0x20);
+}
+
+static inline void NVWriteVgaAttr(struct drm_device *dev,
+					int head, uint8_t index, uint8_t value)
+{
+	if (NVGetEnablePalette(dev, head))
+		index &= ~0x20;
+	else
+		index |= 0x20;
+
+	nv_rd08(dev, NV_PRMCIO_INP0__COLOR + head * NV_PRMCIO_SIZE);
+	NV_REG_DEBUG(VGAATTR, dev, "head %d index 0x%02x data 0x%02x\n",
+							head, index, value);
+	nv_wr08(dev, NV_PRMCIO_ARX + head * NV_PRMCIO_SIZE, index);
+	nv_wr08(dev, NV_PRMCIO_AR__WRITE + head * NV_PRMCIO_SIZE, value);
+}
+
+static inline uint8_t NVReadVgaAttr(struct drm_device *dev,
+					int head, uint8_t index)
+{
+	uint8_t val;
+	if (NVGetEnablePalette(dev, head))
+		index &= ~0x20;
+	else
+		index |= 0x20;
+
+	nv_rd08(dev, NV_PRMCIO_INP0__COLOR + head * NV_PRMCIO_SIZE);
+	nv_wr08(dev, NV_PRMCIO_ARX + head * NV_PRMCIO_SIZE, index);
+	val = nv_rd08(dev, NV_PRMCIO_AR__READ + head * NV_PRMCIO_SIZE);
+	NV_REG_DEBUG(VGAATTR, dev, "head %d index 0x%02x data 0x%02x\n",
+							head, index, val);
+	return val;
+}
+
+static inline void NVVgaSeqReset(struct drm_device *dev, int head, bool start)
+{
+	NVWriteVgaSeq(dev, head, NV_VIO_SR_RESET_INDEX, start ? 0x1 : 0x3);
+}
+
+static inline void NVVgaProtect(struct drm_device *dev, int head, bool protect)
+{
+	uint8_t seq1 = NVReadVgaSeq(dev, head, NV_VIO_SR_CLOCK_INDEX);
+
+	if (protect) {
+		NVVgaSeqReset(dev, head, true);
+		NVWriteVgaSeq(dev, head, NV_VIO_SR_CLOCK_INDEX, seq1 | 0x20);
+	} else {
+		/* Reenable sequencer, then turn on screen */
+		NVWriteVgaSeq(dev, head, NV_VIO_SR_CLOCK_INDEX, seq1 & ~0x20);   /* reenable display */
+		NVVgaSeqReset(dev, head, false);
+	}
+	NVSetEnablePalette(dev, head, protect);
+}
+
+static inline bool
+nv_heads_tied(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+	if (dev_priv->chipset == 0x11)
+		return !!(nvReadMC(dev, NV_PBUS_DEBUG_1) & (1 << 28));
+
+	return NVReadVgaCrtc(dev, 0, NV_CIO_CRE_44) & 0x4;
+}
+
+/* makes cr0-7 on the specified head read-only */
+static inline bool
+nv_lock_vga_crtc_base(struct drm_device *dev, int head, bool lock)
+{
+	uint8_t cr11 = NVReadVgaCrtc(dev, head, NV_CIO_CR_VRE_INDEX);
+	bool waslocked = cr11 & 0x80;
+
+	if (lock)
+		cr11 |= 0x80;
+	else
+		cr11 &= ~0x80;
+	NVWriteVgaCrtc(dev, head, NV_CIO_CR_VRE_INDEX, cr11);
+
+	return waslocked;
+}
+
+static inline void
+nv_lock_vga_crtc_shadow(struct drm_device *dev, int head, int lock)
+{
+	/* shadow lock: connects 0x60?3d? regs to "real" 0x3d? regs
+	 * bit7: unlocks HDT, HBS, HBE, HRS, HRE, HEB
+	 * bit6: seems to have some effect on CR09 (double scan, VBS_9)
+	 * bit5: unlocks HDE
+	 * bit4: unlocks VDE
+	 * bit3: unlocks VDT, OVL, VRS, ?VRE?, VBS, VBE, LSR, EBR
+	 * bit2: same as bit 1 of 0x60?804
+	 * bit0: same as bit 0 of 0x60?804
+	 */
+
+	uint8_t cr21 = lock;
+
+	if (lock < 0)
+		/* 0xfa is generic "unlock all" mask */
+		cr21 = NVReadVgaCrtc(dev, head, NV_CIO_CRE_21) | 0xfa;
+
+	NVWriteVgaCrtc(dev, head, NV_CIO_CRE_21, cr21);
+}
+
+/* renders the extended crtc regs (cr19+) on all crtcs impervious:
+ * immutable and unreadable
+ */
+static inline bool
+NVLockVgaCrtcs(struct drm_device *dev, bool lock)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	bool waslocked = !NVReadVgaCrtc(dev, 0, NV_CIO_SR_LOCK_INDEX);
+
+	NVWriteVgaCrtc(dev, 0, NV_CIO_SR_LOCK_INDEX,
+		       lock ? NV_CIO_SR_LOCK_VALUE : NV_CIO_SR_UNLOCK_RW_VALUE);
+	/* NV11 has independently lockable extended crtcs, except when tied */
+	if (dev_priv->chipset == 0x11 && !nv_heads_tied(dev))
+		NVWriteVgaCrtc(dev, 1, NV_CIO_SR_LOCK_INDEX,
+			       lock ? NV_CIO_SR_LOCK_VALUE :
+				      NV_CIO_SR_UNLOCK_RW_VALUE);
+
+	return waslocked;
+}
+
+/* nv04 cursor max dimensions of 32x32 (A1R5G5B5) */
+#define NV04_CURSOR_SIZE 32
+/* limit nv10 cursors to 64x64 (ARGB8) (we could go to 64x255) */
+#define NV10_CURSOR_SIZE 64
+
+static inline int nv_cursor_width(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+	return dev_priv->card_type >= NV_10 ? NV10_CURSOR_SIZE : NV04_CURSOR_SIZE;
+}
+
+static inline void
+nv_fix_nv40_hw_cursor(struct drm_device *dev, int head)
+{
+	/* on some nv40 (such as the "true" (in the NV_PFB_BOOT_0 sense) nv40,
+	 * the gf6800gt) a hardware bug requires a write to PRAMDAC_CURSOR_POS
+	 * for changes to the CRTC CURCTL regs to take effect, whether changing
+	 * the pixmap location, or just showing/hiding the cursor
+	 */
+	uint32_t curpos = NVReadRAMDAC(dev, head, NV_PRAMDAC_CU_START_POS);
+	NVWriteRAMDAC(dev, head, NV_PRAMDAC_CU_START_POS, curpos);
+}
+
+static inline void
+nv_show_cursor(struct drm_device *dev, int head, bool show)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	uint8_t *curctl1 =
+		&dev_priv->mode_reg.crtc_reg[head].CRTC[NV_CIO_CRE_HCUR_ADDR1_INDEX];
+
+	if (show)
+		*curctl1 |= MASK(NV_CIO_CRE_HCUR_ADDR1_ENABLE);
+	else
+		*curctl1 &= ~MASK(NV_CIO_CRE_HCUR_ADDR1_ENABLE);
+	NVWriteVgaCrtc(dev, head, NV_CIO_CRE_HCUR_ADDR1_INDEX, *curctl1);
+
+	if (dev_priv->card_type == NV_40)
+		nv_fix_nv40_hw_cursor(dev, head);
+}
+
+static inline uint32_t
+nv_pitch_align(struct drm_device *dev, uint32_t width, int bpp)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	int mask;
+
+	if (bpp == 15)
+		bpp = 16;
+	if (bpp == 24)
+		bpp = 8;
+
+	/* Alignment requirements taken from the Haiku driver */
+	if (dev_priv->card_type == NV_04)
+		mask = 128 / bpp - 1;
+	else
+		mask = 512 / bpp - 1;
+
+	return (width + mask) & ~mask;
+}
+
+#endif	/* __NOUVEAU_HW_H__ */
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv04_cursor.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv04_cursor.c
@@ -0,0 +1,70 @@
+#include "drmP.h"
+#include "drm_mode.h"
+#include "nouveau_reg.h"
+#include "nouveau_drv.h"
+#include "nouveau_crtc.h"
+#include "nouveau_hw.h"
+
+static void
+nv04_cursor_show(struct nouveau_crtc *nv_crtc, bool update)
+{
+	nv_show_cursor(nv_crtc->base.dev, nv_crtc->index, true);
+}
+
+static void
+nv04_cursor_hide(struct nouveau_crtc *nv_crtc, bool update)
+{
+	nv_show_cursor(nv_crtc->base.dev, nv_crtc->index, false);
+}
+
+static void
+nv04_cursor_set_pos(struct nouveau_crtc *nv_crtc, int x, int y)
+{
+	NVWriteRAMDAC(nv_crtc->base.dev, nv_crtc->index,
+		      NV_PRAMDAC_CU_START_POS,
+		      XLATE(y, 0, NV_PRAMDAC_CU_START_POS_Y) |
+		      XLATE(x, 0, NV_PRAMDAC_CU_START_POS_X));
+}
+
+static void
+crtc_wr_cio_state(struct drm_crtc *crtc, struct nv04_crtc_reg *crtcstate, int index)
+{
+	NVWriteVgaCrtc(crtc->dev, nouveau_crtc(crtc)->index, index,
+		       crtcstate->CRTC[index]);
+}
+
+static void
+nv04_cursor_set_offset(struct nouveau_crtc *nv_crtc, uint32_t offset)
+{
+	struct drm_device *dev = nv_crtc->base.dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nv04_crtc_reg *regp = &dev_priv->mode_reg.crtc_reg[nv_crtc->index];
+	struct drm_crtc *crtc = &nv_crtc->base;
+
+	regp->CRTC[NV_CIO_CRE_HCUR_ADDR0_INDEX] =
+		MASK(NV_CIO_CRE_HCUR_ASI) |
+		XLATE(offset, 17, NV_CIO_CRE_HCUR_ADDR0_ADR);
+	regp->CRTC[NV_CIO_CRE_HCUR_ADDR1_INDEX] =
+		XLATE(offset, 11, NV_CIO_CRE_HCUR_ADDR1_ADR);
+	if (crtc->mode.flags & DRM_MODE_FLAG_DBLSCAN)
+		regp->CRTC[NV_CIO_CRE_HCUR_ADDR1_INDEX] |=
+			MASK(NV_CIO_CRE_HCUR_ADDR1_CUR_DBL);
+	regp->CRTC[NV_CIO_CRE_HCUR_ADDR2_INDEX] = offset >> 24;
+
+	crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_HCUR_ADDR0_INDEX);
+	crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_HCUR_ADDR1_INDEX);
+	crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_HCUR_ADDR2_INDEX);
+	if (dev_priv->card_type == NV_40)
+		nv_fix_nv40_hw_cursor(dev, nv_crtc->index);
+}
+
+int
+nv04_cursor_init(struct nouveau_crtc *crtc)
+{
+	crtc->cursor.set_offset = nv04_cursor_set_offset;
+	crtc->cursor.set_pos = nv04_cursor_set_pos;
+	crtc->cursor.hide = nv04_cursor_hide;
+	crtc->cursor.show = nv04_cursor_show;
+	return 0;
+}
+
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv04_fbcon.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv04_fbcon.c
@@ -0,0 +1,312 @@
+/*
+ * Copyright 2009 Ben Skeggs
+ * Copyright 2008 Stuart Bennett
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#include "drmP.h"
+#include "nouveau_drv.h"
+#include "nouveau_dma.h"
+#include "nouveau_fbcon.h"
+
+void
+nv04_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region)
+{
+	struct nouveau_fbcon_par *par = info->par;
+	struct drm_device *dev = par->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_channel *chan = dev_priv->channel;
+
+	if (info->state != FBINFO_STATE_RUNNING)
+		return;
+
+	if (!(info->flags & FBINFO_HWACCEL_DISABLED) && RING_SPACE(chan, 4)) {
+		nouveau_fbcon_gpu_lockup(info);
+	}
+
+	if (info->flags & FBINFO_HWACCEL_DISABLED) {
+		cfb_copyarea(info, region);
+		return;
+	}
+
+	BEGIN_RING(chan, NvSubImageBlit, 0x0300, 3);
+	OUT_RING(chan, (region->sy << 16) | region->sx);
+	OUT_RING(chan, (region->dy << 16) | region->dx);
+	OUT_RING(chan, (region->height << 16) | region->width);
+	FIRE_RING(chan);
+}
+
+void
+nv04_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
+{
+	struct nouveau_fbcon_par *par = info->par;
+	struct drm_device *dev = par->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_channel *chan = dev_priv->channel;
+
+	if (info->state != FBINFO_STATE_RUNNING)
+		return;
+
+	if (!(info->flags & FBINFO_HWACCEL_DISABLED) && RING_SPACE(chan, 7)) {
+		nouveau_fbcon_gpu_lockup(info);
+	}
+
+	if (info->flags & FBINFO_HWACCEL_DISABLED) {
+		cfb_fillrect(info, rect);
+		return;
+	}
+
+	BEGIN_RING(chan, NvSubGdiRect, 0x02fc, 1);
+	OUT_RING(chan, (rect->rop != ROP_COPY) ? 1 : 3);
+	BEGIN_RING(chan, NvSubGdiRect, 0x03fc, 1);
+	if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
+	    info->fix.visual == FB_VISUAL_DIRECTCOLOR)
+		OUT_RING(chan, ((uint32_t *)info->pseudo_palette)[rect->color]);
+	else
+		OUT_RING(chan, rect->color);
+	BEGIN_RING(chan, NvSubGdiRect, 0x0400, 2);
+	OUT_RING(chan, (rect->dx << 16) | rect->dy);
+	OUT_RING(chan, (rect->width << 16) | rect->height);
+	FIRE_RING(chan);
+}
+
+void
+nv04_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
+{
+	struct nouveau_fbcon_par *par = info->par;
+	struct drm_device *dev = par->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_channel *chan = dev_priv->channel;
+	uint32_t fg;
+	uint32_t bg;
+	uint32_t dsize;
+	uint32_t width;
+	uint32_t *data = (uint32_t *)image->data;
+
+	if (info->state != FBINFO_STATE_RUNNING)
+		return;
+
+	if (image->depth != 1) {
+		cfb_imageblit(info, image);
+		return;
+	}
+
+	if (!(info->flags & FBINFO_HWACCEL_DISABLED) && RING_SPACE(chan, 8)) {
+		nouveau_fbcon_gpu_lockup(info);
+	}
+
+	if (info->flags & FBINFO_HWACCEL_DISABLED) {
+		cfb_imageblit(info, image);
+		return;
+	}
+
+	width = ALIGN(image->width, 8);
+	dsize = ALIGN(width * image->height, 32) >> 5;
+
+	if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
+	    info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
+		fg = ((uint32_t *) info->pseudo_palette)[image->fg_color];
+		bg = ((uint32_t *) info->pseudo_palette)[image->bg_color];
+	} else {
+		fg = image->fg_color;
+		bg = image->bg_color;
+	}
+
+	BEGIN_RING(chan, NvSubGdiRect, 0x0be4, 7);
+	OUT_RING(chan, (image->dy << 16) | (image->dx & 0xffff));
+	OUT_RING(chan, ((image->dy + image->height) << 16) |
+			 ((image->dx + image->width) & 0xffff));
+	OUT_RING(chan, bg);
+	OUT_RING(chan, fg);
+	OUT_RING(chan, (image->height << 16) | width);
+	OUT_RING(chan, (image->height << 16) | image->width);
+	OUT_RING(chan, (image->dy << 16) | (image->dx & 0xffff));
+
+	while (dsize) {
+		int iter_len = dsize > 128 ? 128 : dsize;
+
+		if (RING_SPACE(chan, iter_len + 1)) {
+			nouveau_fbcon_gpu_lockup(info);
+			cfb_imageblit(info, image);
+			return;
+		}
+
+		BEGIN_RING(chan, NvSubGdiRect, 0x0c00, iter_len);
+		OUT_RINGp(chan, data, iter_len);
+		data += iter_len;
+		dsize -= iter_len;
+	}
+
+	FIRE_RING(chan);
+}
+
+static int
+nv04_fbcon_grobj_new(struct drm_device *dev, int class, uint32_t handle)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_gpuobj *obj = NULL;
+	int ret;
+
+	ret = nouveau_gpuobj_gr_new(dev_priv->channel, class, &obj);
+	if (ret)
+		return ret;
+
+	ret = nouveau_gpuobj_ref_add(dev, dev_priv->channel, handle, obj, NULL);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+int
+nv04_fbcon_accel_init(struct fb_info *info)
+{
+	struct nouveau_fbcon_par *par = info->par;
+	struct drm_device *dev = par->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_channel *chan = dev_priv->channel;
+	const int sub = NvSubCtxSurf2D;
+	int surface_fmt, pattern_fmt, rect_fmt;
+	int ret;
+
+	switch (info->var.bits_per_pixel) {
+	case 8:
+		surface_fmt = 1;
+		pattern_fmt = 3;
+		rect_fmt = 3;
+		break;
+	case 16:
+		surface_fmt = 4;
+		pattern_fmt = 1;
+		rect_fmt = 1;
+		break;
+	case 32:
+		switch (info->var.transp.length) {
+		case 0: /* depth 24 */
+		case 8: /* depth 32 */
+			break;
+		default:
+			return -EINVAL;
+		}
+
+		surface_fmt = 6;
+		pattern_fmt = 3;
+		rect_fmt = 3;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	ret = nv04_fbcon_grobj_new(dev, dev_priv->card_type >= NV_10 ?
+				   0x0062 : 0x0042, NvCtxSurf2D);
+	if (ret)
+		return ret;
+
+	ret = nv04_fbcon_grobj_new(dev, 0x0019, NvClipRect);
+	if (ret)
+		return ret;
+
+	ret = nv04_fbcon_grobj_new(dev, 0x0043, NvRop);
+	if (ret)
+		return ret;
+
+	ret = nv04_fbcon_grobj_new(dev, 0x0044, NvImagePatt);
+	if (ret)
+		return ret;
+
+	ret = nv04_fbcon_grobj_new(dev, 0x004a, NvGdiRect);
+	if (ret)
+		return ret;
+
+	ret = nv04_fbcon_grobj_new(dev, dev_priv->card_type >= NV_10 ?
+				   0x009f : 0x005f, NvImageBlit);
+	if (ret)
+		return ret;
+
+	if (RING_SPACE(chan, 49)) {
+		nouveau_fbcon_gpu_lockup(info);
+		return 0;
+	}
+
+	BEGIN_RING(chan, sub, 0x0000, 1);
+	OUT_RING(chan, NvCtxSurf2D);
+	BEGIN_RING(chan, sub, 0x0184, 2);
+	OUT_RING(chan, NvDmaFB);
+	OUT_RING(chan, NvDmaFB);
+	BEGIN_RING(chan, sub, 0x0300, 4);
+	OUT_RING(chan, surface_fmt);
+	OUT_RING(chan, info->fix.line_length | (info->fix.line_length << 16));
+	OUT_RING(chan, info->fix.smem_start - dev->mode_config.fb_base);
+	OUT_RING(chan, info->fix.smem_start - dev->mode_config.fb_base);
+
+	BEGIN_RING(chan, sub, 0x0000, 1);
+	OUT_RING(chan, NvRop);
+	BEGIN_RING(chan, sub, 0x0300, 1);
+	OUT_RING(chan, 0x55);
+
+	BEGIN_RING(chan, sub, 0x0000, 1);
+	OUT_RING(chan, NvImagePatt);
+	BEGIN_RING(chan, sub, 0x0300, 8);
+	OUT_RING(chan, pattern_fmt);
+#ifdef __BIG_ENDIAN
+	OUT_RING(chan, 2);
+#else
+	OUT_RING(chan, 1);
+#endif
+	OUT_RING(chan, 0);
+	OUT_RING(chan, 1);
+	OUT_RING(chan, ~0);
+	OUT_RING(chan, ~0);
+	OUT_RING(chan, ~0);
+	OUT_RING(chan, ~0);
+
+	BEGIN_RING(chan, sub, 0x0000, 1);
+	OUT_RING(chan, NvClipRect);
+	BEGIN_RING(chan, sub, 0x0300, 2);
+	OUT_RING(chan, 0);
+	OUT_RING(chan, (info->var.yres_virtual << 16) | info->var.xres_virtual);
+
+	BEGIN_RING(chan, NvSubImageBlit, 0x0000, 1);
+	OUT_RING(chan, NvImageBlit);
+	BEGIN_RING(chan, NvSubImageBlit, 0x019c, 1);
+	OUT_RING(chan, NvCtxSurf2D);
+	BEGIN_RING(chan, NvSubImageBlit, 0x02fc, 1);
+	OUT_RING(chan, 3);
+
+	BEGIN_RING(chan, NvSubGdiRect, 0x0000, 1);
+	OUT_RING(chan, NvGdiRect);
+	BEGIN_RING(chan, NvSubGdiRect, 0x0198, 1);
+	OUT_RING(chan, NvCtxSurf2D);
+	BEGIN_RING(chan, NvSubGdiRect, 0x0188, 2);
+	OUT_RING(chan, NvImagePatt);
+	OUT_RING(chan, NvRop);
+	BEGIN_RING(chan, NvSubGdiRect, 0x0304, 1);
+	OUT_RING(chan, 1);
+	BEGIN_RING(chan, NvSubGdiRect, 0x0300, 1);
+	OUT_RING(chan, rect_fmt);
+	BEGIN_RING(chan, NvSubGdiRect, 0x02fc, 1);
+	OUT_RING(chan, 3);
+
+	FIRE_RING(chan);
+
+	return 0;
+}
+
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_connector.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_connector.h
@@ -0,0 +1,54 @@
+/*
+ * Copyright (C) 2008 Maarten Maathuis.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#ifndef __NOUVEAU_CONNECTOR_H__
+#define __NOUVEAU_CONNECTOR_H__
+
+#include "drm_edid.h"
+#include "nouveau_i2c.h"
+
+struct nouveau_connector {
+	struct drm_connector base;
+
+	struct dcb_connector_table_entry *dcb;
+
+	int scaling_mode;
+	bool use_dithering;
+
+	struct nouveau_encoder *detected_encoder;
+	struct edid *edid;
+	struct drm_display_mode *native_mode;
+};
+
+static inline struct nouveau_connector *nouveau_connector(
+						struct drm_connector *con)
+{
+	return container_of(con, struct nouveau_connector, base);
+}
+
+int nouveau_connector_create(struct drm_device *dev, int i2c_index, int type);
+
+#endif /* __NOUVEAU_CONNECTOR_H__ */
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_debugfs.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_debugfs.c
@@ -0,0 +1,155 @@
+/*
+ * Copyright (C) 2009 Red Hat <bskeggs@redhat.com>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+/*
+ * Authors:
+ *  Ben Skeggs <bskeggs@redhat.com>
+ */
+
+#include <linux/debugfs.h>
+
+#include "drmP.h"
+#include "nouveau_drv.h"
+
+static int
+nouveau_debugfs_channel_info(struct seq_file *m, void *data)
+{
+	struct drm_info_node *node = (struct drm_info_node *) m->private;
+	struct nouveau_channel *chan = node->info_ent->data;
+
+	seq_printf(m, "channel id    : %d\n", chan->id);
+
+	seq_printf(m, "cpu fifo state:\n");
+	seq_printf(m, "          base: 0x%08x\n", chan->pushbuf_base);
+	seq_printf(m, "           max: 0x%08x\n", chan->dma.max << 2);
+	seq_printf(m, "           cur: 0x%08x\n", chan->dma.cur << 2);
+	seq_printf(m, "           put: 0x%08x\n", chan->dma.put << 2);
+	seq_printf(m, "          free: 0x%08x\n", chan->dma.free << 2);
+
+	seq_printf(m, "gpu fifo state:\n");
+	seq_printf(m, "           get: 0x%08x\n",
+					nvchan_rd32(chan, chan->user_get));
+	seq_printf(m, "           put: 0x%08x\n",
+					nvchan_rd32(chan, chan->user_put));
+
+	seq_printf(m, "last fence    : %d\n", chan->fence.sequence);
+	seq_printf(m, "last signalled: %d\n", chan->fence.sequence_ack);
+	return 0;
+}
+
+int
+nouveau_debugfs_channel_init(struct nouveau_channel *chan)
+{
+	struct drm_nouveau_private *dev_priv = chan->dev->dev_private;
+	struct drm_minor *minor = chan->dev->primary;
+	int ret;
+
+	if (!dev_priv->debugfs.channel_root) {
+		dev_priv->debugfs.channel_root =
+			debugfs_create_dir("channel", minor->debugfs_root);
+		if (!dev_priv->debugfs.channel_root)
+			return -ENOENT;
+	}
+
+	snprintf(chan->debugfs.name, 32, "%d", chan->id);
+	chan->debugfs.info.name = chan->debugfs.name;
+	chan->debugfs.info.show = nouveau_debugfs_channel_info;
+	chan->debugfs.info.driver_features = 0;
+	chan->debugfs.info.data = chan;
+
+	ret = drm_debugfs_create_files(&chan->debugfs.info, 1,
+				       dev_priv->debugfs.channel_root,
+				       chan->dev->primary);
+	if (ret == 0)
+		chan->debugfs.active = true;
+	return ret;
+}
+
+void
+nouveau_debugfs_channel_fini(struct nouveau_channel *chan)
+{
+	struct drm_nouveau_private *dev_priv = chan->dev->dev_private;
+
+	if (!chan->debugfs.active)
+		return;
+
+	drm_debugfs_remove_files(&chan->debugfs.info, 1, chan->dev->primary);
+	chan->debugfs.active = false;
+
+	if (chan == dev_priv->channel) {
+		debugfs_remove(dev_priv->debugfs.channel_root);
+		dev_priv->debugfs.channel_root = NULL;
+	}
+}
+
+static int
+nouveau_debugfs_chipset_info(struct seq_file *m, void *data)
+{
+	struct drm_info_node *node = (struct drm_info_node *) m->private;
+	struct drm_minor *minor = node->minor;
+	struct drm_device *dev = minor->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	uint32_t ppci_0;
+
+	ppci_0 = nv_rd32(dev, dev_priv->chipset >= 0x40 ? 0x88000 : 0x1800);
+
+	seq_printf(m, "PMC_BOOT_0: 0x%08x\n", nv_rd32(dev, NV03_PMC_BOOT_0));
+	seq_printf(m, "PCI ID    : 0x%04x:0x%04x\n",
+		   ppci_0 & 0xffff, ppci_0 >> 16);
+	return 0;
+}
+
+static int
+nouveau_debugfs_memory_info(struct seq_file *m, void *data)
+{
+	struct drm_info_node *node = (struct drm_info_node *) m->private;
+	struct drm_minor *minor = node->minor;
+	struct drm_device *dev = minor->dev;
+
+	seq_printf(m, "VRAM total: %dKiB\n",
+		   (int)(nouveau_mem_fb_amount(dev) >> 10));
+	return 0;
+}
+
+static struct drm_info_list nouveau_debugfs_list[] = {
+	{ "chipset", nouveau_debugfs_chipset_info, 0, NULL },
+	{ "memory", nouveau_debugfs_memory_info, 0, NULL },
+};
+#define NOUVEAU_DEBUGFS_ENTRIES ARRAY_SIZE(nouveau_debugfs_list)
+
+int
+nouveau_debugfs_init(struct drm_minor *minor)
+{
+	drm_debugfs_create_files(nouveau_debugfs_list, NOUVEAU_DEBUGFS_ENTRIES,
+				 minor->debugfs_root, minor);
+	return 0;
+}
+
+void
+nouveau_debugfs_takedown(struct drm_minor *minor)
+{
+	drm_debugfs_remove_files(nouveau_debugfs_list, NOUVEAU_DEBUGFS_ENTRIES,
+				 minor);
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv50_evo.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv50_evo.h
@@ -0,0 +1,113 @@
+/*
+ * Copyright (C) 2008 Maarten Maathuis.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#define NV50_EVO_UPDATE                                              0x00000080
+#define NV50_EVO_UNK84                                               0x00000084
+#define NV50_EVO_UNK84_NOTIFY                                        0x40000000
+#define NV50_EVO_UNK84_NOTIFY_DISABLED                               0x00000000
+#define NV50_EVO_UNK84_NOTIFY_ENABLED                                0x40000000
+#define NV50_EVO_DMA_NOTIFY                                          0x00000088
+#define NV50_EVO_DMA_NOTIFY_HANDLE                                   0xffffffff
+#define NV50_EVO_DMA_NOTIFY_HANDLE_NONE                              0x00000000
+#define NV50_EVO_UNK8C                                               0x0000008C
+
+#define NV50_EVO_DAC(n, r)                       ((n) * 0x80 + NV50_EVO_DAC_##r)
+#define NV50_EVO_DAC_MODE_CTRL                                       0x00000400
+#define NV50_EVO_DAC_MODE_CTRL_CRTC0                                 0x00000001
+#define NV50_EVO_DAC_MODE_CTRL_CRTC1                                 0x00000002
+#define NV50_EVO_DAC_MODE_CTRL2                                      0x00000404
+#define NV50_EVO_DAC_MODE_CTRL2_NHSYNC                               0x00000001
+#define NV50_EVO_DAC_MODE_CTRL2_NVSYNC                               0x00000002
+
+#define NV50_EVO_SOR(n, r)                       ((n) * 0x40 + NV50_EVO_SOR_##r)
+#define NV50_EVO_SOR_MODE_CTRL                                       0x00000600
+#define NV50_EVO_SOR_MODE_CTRL_CRTC0                                 0x00000001
+#define NV50_EVO_SOR_MODE_CTRL_CRTC1                                 0x00000002
+#define NV50_EVO_SOR_MODE_CTRL_TMDS                                  0x00000100
+#define NV50_EVO_SOR_MODE_CTRL_TMDS_DUAL_LINK                        0x00000400
+#define NV50_EVO_SOR_MODE_CTRL_NHSYNC                                0x00001000
+#define NV50_EVO_SOR_MODE_CTRL_NVSYNC                                0x00002000
+
+#define NV50_EVO_CRTC(n, r)                    ((n) * 0x400 + NV50_EVO_CRTC_##r)
+#define NV84_EVO_CRTC(n, r)                    ((n) * 0x400 + NV84_EVO_CRTC_##r)
+#define NV50_EVO_CRTC_UNK0800                                        0x00000800
+#define NV50_EVO_CRTC_CLOCK                                          0x00000804
+#define NV50_EVO_CRTC_INTERLACE                                      0x00000808
+#define NV50_EVO_CRTC_DISPLAY_START                                  0x00000810
+#define NV50_EVO_CRTC_DISPLAY_TOTAL                                  0x00000814
+#define NV50_EVO_CRTC_SYNC_DURATION                                  0x00000818
+#define NV50_EVO_CRTC_SYNC_START_TO_BLANK_END                        0x0000081c
+#define NV50_EVO_CRTC_UNK0820                                        0x00000820
+#define NV50_EVO_CRTC_UNK0824                                        0x00000824
+#define NV50_EVO_CRTC_UNK082C                                        0x0000082c
+#define NV50_EVO_CRTC_CLUT_MODE                                      0x00000840
+/* You can't have a palette in 8 bit mode (=OFF) */
+#define NV50_EVO_CRTC_CLUT_MODE_BLANK                                0x00000000
+#define NV50_EVO_CRTC_CLUT_MODE_OFF                                  0x80000000
+#define NV50_EVO_CRTC_CLUT_MODE_ON                                   0xC0000000
+#define NV50_EVO_CRTC_CLUT_OFFSET                                    0x00000844
+#define NV84_EVO_CRTC_CLUT_DMA                                       0x0000085C
+#define NV84_EVO_CRTC_CLUT_DMA_HANDLE                                0xffffffff
+#define NV84_EVO_CRTC_CLUT_DMA_HANDLE_NONE                           0x00000000
+#define NV50_EVO_CRTC_FB_OFFSET                                      0x00000860
+#define NV50_EVO_CRTC_FB_SIZE                                        0x00000868
+#define NV50_EVO_CRTC_FB_CONFIG                                      0x0000086c
+#define NV50_EVO_CRTC_FB_CONFIG_MODE                                 0x00100000
+#define NV50_EVO_CRTC_FB_CONFIG_MODE_TILE                            0x00000000
+#define NV50_EVO_CRTC_FB_CONFIG_MODE_PITCH                           0x00100000
+#define NV50_EVO_CRTC_FB_DEPTH                                       0x00000870
+#define NV50_EVO_CRTC_FB_DEPTH_8                                     0x00001e00
+#define NV50_EVO_CRTC_FB_DEPTH_15                                    0x0000e900
+#define NV50_EVO_CRTC_FB_DEPTH_16                                    0x0000e800
+#define NV50_EVO_CRTC_FB_DEPTH_24                                    0x0000cf00
+#define NV50_EVO_CRTC_FB_DEPTH_30                                    0x0000d100
+#define NV50_EVO_CRTC_FB_DMA                                         0x00000874
+#define NV50_EVO_CRTC_FB_DMA_HANDLE                                  0xffffffff
+#define NV50_EVO_CRTC_FB_DMA_HANDLE_NONE                             0x00000000
+#define NV50_EVO_CRTC_CURSOR_CTRL                                    0x00000880
+#define NV50_EVO_CRTC_CURSOR_CTRL_HIDE                               0x05000000
+#define NV50_EVO_CRTC_CURSOR_CTRL_SHOW                               0x85000000
+#define NV50_EVO_CRTC_CURSOR_OFFSET                                  0x00000884
+#define NV84_EVO_CRTC_CURSOR_DMA                                     0x0000089c
+#define NV84_EVO_CRTC_CURSOR_DMA_HANDLE                              0xffffffff
+#define NV84_EVO_CRTC_CURSOR_DMA_HANDLE_NONE                         0x00000000
+#define NV50_EVO_CRTC_DITHER_CTRL                                    0x000008a0
+#define NV50_EVO_CRTC_DITHER_CTRL_OFF                                0x00000000
+#define NV50_EVO_CRTC_DITHER_CTRL_ON                                 0x00000011
+#define NV50_EVO_CRTC_SCALE_CTRL                                     0x000008a4
+#define NV50_EVO_CRTC_SCALE_CTRL_INACTIVE                            0x00000000
+#define NV50_EVO_CRTC_SCALE_CTRL_ACTIVE                              0x00000009
+#define NV50_EVO_CRTC_COLOR_CTRL                                     0x000008a8
+#define NV50_EVO_CRTC_COLOR_CTRL_COLOR                               0x00040000
+#define NV50_EVO_CRTC_FB_POS                                         0x000008c0
+#define NV50_EVO_CRTC_REAL_RES                                       0x000008c8
+#define NV50_EVO_CRTC_SCALE_CENTER_OFFSET                            0x000008d4
+#define NV50_EVO_CRTC_SCALE_CENTER_OFFSET_VAL(x, y) \
+	((((unsigned)y << 16) & 0xFFFF0000) | (((unsigned)x) & 0x0000FFFF))
+/* Both of these are needed, otherwise nothing happens. */
+#define NV50_EVO_CRTC_SCALE_RES1                                     0x000008d8
+#define NV50_EVO_CRTC_SCALE_RES2                                     0x000008dc
+
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_ioc32.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_ioc32.c
@@ -0,0 +1,70 @@
+/**
+ * \file mga_ioc32.c
+ *
+ * 32-bit ioctl compatibility routines for the MGA DRM.
+ *
+ * \author Dave Airlie <airlied@linux.ie> with code from patches by Egbert Eich
+ *
+ *
+ * Copyright (C) Paul Mackerras 2005
+ * Copyright (C) Egbert Eich 2003,2004
+ * Copyright (C) Dave Airlie 2005
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include <linux/compat.h>
+
+#include "drmP.h"
+#include "drm.h"
+
+#include "nouveau_drv.h"
+
+/**
+ * Called whenever a 32-bit process running under a 64-bit kernel
+ * performs an ioctl on /dev/dri/card<n>.
+ *
+ * \param filp file pointer.
+ * \param cmd command.
+ * \param arg user argument.
+ * \return zero on success or negative number on failure.
+ */
+long nouveau_compat_ioctl(struct file *filp, unsigned int cmd,
+			 unsigned long arg)
+{
+	unsigned int nr = DRM_IOCTL_NR(cmd);
+	drm_ioctl_compat_t *fn = NULL;
+	int ret;
+
+	if (nr < DRM_COMMAND_BASE)
+		return drm_compat_ioctl(filp, cmd, arg);
+
+#if 0
+	if (nr < DRM_COMMAND_BASE + DRM_ARRAY_SIZE(mga_compat_ioctls))
+		fn = nouveau_compat_ioctls[nr - DRM_COMMAND_BASE];
+#endif
+	if (fn != NULL)
+		ret = (*fn)(filp, cmd, arg);
+	else
+		ret = drm_ioctl(filp, cmd, arg);
+
+	return ret;
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/Kconfig
@@ -0,0 +1,44 @@
+config DRM_NOUVEAU
+	tristate "Nouveau (nVidia) cards"
+	depends on DRM
+        select FW_LOADER
+	select DRM_KMS_HELPER
+	select DRM_TTM
+	select FB_CFB_FILLRECT
+	select FB_CFB_COPYAREA
+	select FB_CFB_IMAGEBLIT
+	select FB
+	select FRAMEBUFFER_CONSOLE if !EMBEDDED
+	select FB_BACKLIGHT if DRM_NOUVEAU_BACKLIGHT
+	help
+	  Choose this option for open-source nVidia support.
+
+config DRM_NOUVEAU_BACKLIGHT
+	bool "Support for backlight control"
+	depends on DRM_NOUVEAU
+	default y
+	help
+	  Say Y here if you want to control the backlight of your display
+	  (e.g. a laptop panel).
+
+config DRM_NOUVEAU_DEBUG
+	bool "Build in Nouveau's debugfs support"
+	depends on DRM_NOUVEAU && DEBUG_FS
+	default y
+	help
+	  Say Y here if you want Nouveau to output debugging information
+	  via debugfs.
+
+menu "I2C encoder or helper chips"
+     depends on DRM && DRM_KMS_HELPER && I2C
+
+config DRM_I2C_CH7006
+	tristate "Chrontel ch7006 TV encoder"
+	default m if DRM_NOUVEAU
+	help
+	  Support for Chrontel ch7006 and similar TV encoders, found
+	  on some nVidia video cards.
+
+	  This driver is currently only useful if you're also using
+	  the nouveau driver.
+endmenu
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_notifier.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_notifier.c
@@ -0,0 +1,203 @@
+/*
+ * Copyright (C) 2007 Ben Skeggs.
+ *
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include "drmP.h"
+#include "drm.h"
+#include "nouveau_drv.h"
+
+int
+nouveau_notifier_init_channel(struct nouveau_channel *chan)
+{
+	struct drm_device *dev = chan->dev;
+	struct nouveau_bo *ntfy = NULL;
+	uint32_t flags;
+	int ret;
+
+	if (nouveau_vram_notify)
+		flags = TTM_PL_FLAG_VRAM;
+	else
+		flags = TTM_PL_FLAG_TT;
+
+	ret = nouveau_gem_new(dev, NULL, PAGE_SIZE, 0, flags,
+			      0, 0x0000, false, true, &ntfy);
+	if (ret)
+		return ret;
+
+	ret = nouveau_bo_pin(ntfy, flags);
+	if (ret)
+		goto out_err;
+
+	ret = nouveau_bo_map(ntfy);
+	if (ret)
+		goto out_err;
+
+	ret = nouveau_mem_init_heap(&chan->notifier_heap, 0, ntfy->bo.mem.size);
+	if (ret)
+		goto out_err;
+
+	chan->notifier_bo = ntfy;
+out_err:
+	if (ret) {
+		mutex_lock(&dev->struct_mutex);
+		drm_gem_object_unreference(ntfy->gem);
+		mutex_unlock(&dev->struct_mutex);
+	}
+
+	return ret;
+}
+
+void
+nouveau_notifier_takedown_channel(struct nouveau_channel *chan)
+{
+	struct drm_device *dev = chan->dev;
+
+	if (!chan->notifier_bo)
+		return;
+
+	nouveau_bo_unmap(chan->notifier_bo);
+	mutex_lock(&dev->struct_mutex);
+	nouveau_bo_unpin(chan->notifier_bo);
+	drm_gem_object_unreference(chan->notifier_bo->gem);
+	mutex_unlock(&dev->struct_mutex);
+	nouveau_mem_takedown(&chan->notifier_heap);
+}
+
+static void
+nouveau_notifier_gpuobj_dtor(struct drm_device *dev,
+			     struct nouveau_gpuobj *gpuobj)
+{
+	NV_DEBUG(dev, "\n");
+
+	if (gpuobj->priv)
+		nouveau_mem_free_block(gpuobj->priv);
+}
+
+int
+nouveau_notifier_alloc(struct nouveau_channel *chan, uint32_t handle,
+		       int size, uint32_t *b_offset)
+{
+	struct drm_device *dev = chan->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_gpuobj *nobj = NULL;
+	struct mem_block *mem;
+	uint32_t offset;
+	int target, ret;
+
+	if (!chan->notifier_heap) {
+		NV_ERROR(dev, "Channel %d doesn't have a notifier heap!\n",
+			 chan->id);
+		return -EINVAL;
+	}
+
+	mem = nouveau_mem_alloc_block(chan->notifier_heap, size, 0,
+				      (struct drm_file *)-2, 0);
+	if (!mem) {
+		NV_ERROR(dev, "Channel %d notifier block full\n", chan->id);
+		return -ENOMEM;
+	}
+
+	offset = chan->notifier_bo->bo.mem.mm_node->start << PAGE_SHIFT;
+	if (chan->notifier_bo->bo.mem.mem_type == TTM_PL_VRAM) {
+		target = NV_DMA_TARGET_VIDMEM;
+	} else
+	if (chan->notifier_bo->bo.mem.mem_type == TTM_PL_TT) {
+		if (dev_priv->gart_info.type == NOUVEAU_GART_SGDMA &&
+		    dev_priv->card_type < NV_50) {
+			ret = nouveau_sgdma_get_page(dev, offset, &offset);
+			if (ret)
+				return ret;
+			target = NV_DMA_TARGET_PCI;
+		} else {
+			target = NV_DMA_TARGET_AGP;
+			if (dev_priv->card_type >= NV_50)
+				offset += dev_priv->vm_gart_base;
+		}
+	} else {
+		NV_ERROR(dev, "Bad DMA target, mem_type %d!\n",
+			 chan->notifier_bo->bo.mem.mem_type);
+		return -EINVAL;
+	}
+	offset += mem->start;
+
+	ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY, offset,
+				     mem->size, NV_DMA_ACCESS_RW, target,
+				     &nobj);
+	if (ret) {
+		nouveau_mem_free_block(mem);
+		NV_ERROR(dev, "Error creating notifier ctxdma: %d\n", ret);
+		return ret;
+	}
+	nobj->dtor   = nouveau_notifier_gpuobj_dtor;
+	nobj->priv   = mem;
+
+	ret = nouveau_gpuobj_ref_add(dev, chan, handle, nobj, NULL);
+	if (ret) {
+		nouveau_gpuobj_del(dev, &nobj);
+		nouveau_mem_free_block(mem);
+		NV_ERROR(dev, "Error referencing notifier ctxdma: %d\n", ret);
+		return ret;
+	}
+
+	*b_offset = mem->start;
+	return 0;
+}
+
+int
+nouveau_notifier_offset(struct nouveau_gpuobj *nobj, uint32_t *poffset)
+{
+	if (!nobj || nobj->dtor != nouveau_notifier_gpuobj_dtor)
+		return -EINVAL;
+
+	if (poffset) {
+		struct mem_block *mem = nobj->priv;
+
+		if (*poffset >= mem->size)
+			return false;
+
+		*poffset += mem->start;
+	}
+
+	return 0;
+}
+
+int
+nouveau_ioctl_notifier_alloc(struct drm_device *dev, void *data,
+			     struct drm_file *file_priv)
+{
+	struct drm_nouveau_notifierobj_alloc *na = data;
+	struct nouveau_channel *chan;
+	int ret;
+
+	NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
+	NOUVEAU_GET_USER_CHANNEL_WITH_RETURN(na->channel, file_priv, chan);
+
+	ret = nouveau_notifier_alloc(chan, na->handle, na->size, &na->offset);
+	if (ret)
+		return ret;
+
+	return 0;
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv04_dac.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv04_dac.c
@@ -0,0 +1,531 @@
+/*
+ * Copyright 2003 NVIDIA, Corporation
+ * Copyright 2006 Dave Airlie
+ * Copyright 2007 Maarten Maathuis
+ * Copyright 2007-2009 Stuart Bennett
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#include "drmP.h"
+#include "drm_crtc_helper.h"
+
+#include "nouveau_drv.h"
+#include "nouveau_encoder.h"
+#include "nouveau_connector.h"
+#include "nouveau_crtc.h"
+#include "nouveau_hw.h"
+#include "nvreg.h"
+
+int nv04_dac_output_offset(struct drm_encoder *encoder)
+{
+	struct dcb_entry *dcb = nouveau_encoder(encoder)->dcb;
+	int offset = 0;
+
+	if (dcb->or & (8 | OUTPUT_C))
+		offset += 0x68;
+	if (dcb->or & (8 | OUTPUT_B))
+		offset += 0x2000;
+
+	return offset;
+}
+
+/*
+ * arbitrary limit to number of sense oscillations tolerated in one sample
+ * period (observed to be at least 13 in "nvidia")
+ */
+#define MAX_HBLANK_OSC 20
+
+/*
+ * arbitrary limit to number of conflicting sample pairs to tolerate at a
+ * voltage step (observed to be at least 5 in "nvidia")
+ */
+#define MAX_SAMPLE_PAIRS 10
+
+static int sample_load_twice(struct drm_device *dev, bool sense[2])
+{
+	int i;
+
+	for (i = 0; i < 2; i++) {
+		bool sense_a, sense_b, sense_b_prime;
+		int j = 0;
+
+		/*
+		 * wait for bit 0 clear -- out of hblank -- (say reg value 0x4),
+		 * then wait for transition 0x4->0x5->0x4: enter hblank, leave
+		 * hblank again
+		 * use a 10ms timeout (guards against crtc being inactive, in
+		 * which case blank state would never change)
+		 */
+		if (!nouveau_wait_until(dev, 10000000, NV_PRMCIO_INP0__COLOR,
+					0x00000001, 0x00000000))
+			return -EBUSY;
+		if (!nouveau_wait_until(dev, 10000000, NV_PRMCIO_INP0__COLOR,
+					0x00000001, 0x00000001))
+			return -EBUSY;
+		if (!nouveau_wait_until(dev, 10000000, NV_PRMCIO_INP0__COLOR,
+					0x00000001, 0x00000000))
+			return -EBUSY;
+
+		udelay(100);
+		/* when level triggers, sense is _LO_ */
+		sense_a = nv_rd08(dev, NV_PRMCIO_INP0) & 0x10;
+
+		/* take another reading until it agrees with sense_a... */
+		do {
+			udelay(100);
+			sense_b = nv_rd08(dev, NV_PRMCIO_INP0) & 0x10;
+			if (sense_a != sense_b) {
+				sense_b_prime =
+					nv_rd08(dev, NV_PRMCIO_INP0) & 0x10;
+				if (sense_b == sense_b_prime) {
+					/* ... unless two consecutive subsequent
+					 * samples agree; sense_a is replaced */
+					sense_a = sense_b;
+					/* force mis-match so we loop */
+					sense_b = !sense_a;
+				}
+			}
+		} while ((sense_a != sense_b) && ++j < MAX_HBLANK_OSC);
+
+		if (j == MAX_HBLANK_OSC)
+			/* with so much oscillation, default to sense:LO */
+			sense[i] = false;
+		else
+			sense[i] = sense_a;
+	}
+
+	return 0;
+}
+
+static enum drm_connector_status nv04_dac_detect(struct drm_encoder *encoder,
+						 struct drm_connector *connector)
+{
+	struct drm_device *dev = encoder->dev;
+	uint8_t saved_seq1, saved_pi, saved_rpc1, saved_cr_mode;
+	uint8_t saved_palette0[3], saved_palette_mask;
+	uint32_t saved_rtest_ctrl, saved_rgen_ctrl;
+	int i;
+	uint8_t blue;
+	bool sense = true;
+
+	/*
+	 * for this detection to work, there needs to be a mode set up on the
+	 * CRTC.  this is presumed to be the case
+	 */
+
+	if (nv_two_heads(dev))
+		/* only implemented for head A for now */
+		NVSetOwner(dev, 0);
+
+	saved_cr_mode = NVReadVgaCrtc(dev, 0, NV_CIO_CR_MODE_INDEX);
+	NVWriteVgaCrtc(dev, 0, NV_CIO_CR_MODE_INDEX, saved_cr_mode | 0x80);
+
+	saved_seq1 = NVReadVgaSeq(dev, 0, NV_VIO_SR_CLOCK_INDEX);
+	NVWriteVgaSeq(dev, 0, NV_VIO_SR_CLOCK_INDEX, saved_seq1 & ~0x20);
+
+	saved_rtest_ctrl = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL);
+	NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL,
+		      saved_rtest_ctrl & ~NV_PRAMDAC_TEST_CONTROL_PWRDWN_DAC_OFF);
+
+	msleep(10);
+
+	saved_pi = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_PIXEL_INDEX);
+	NVWriteVgaCrtc(dev, 0, NV_CIO_CRE_PIXEL_INDEX,
+		       saved_pi & ~(0x80 | MASK(NV_CIO_CRE_PIXEL_FORMAT)));
+	saved_rpc1 = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_RPC1_INDEX);
+	NVWriteVgaCrtc(dev, 0, NV_CIO_CRE_RPC1_INDEX, saved_rpc1 & ~0xc0);
+
+	nv_wr08(dev, NV_PRMDIO_READ_MODE_ADDRESS, 0x0);
+	for (i = 0; i < 3; i++)
+		saved_palette0[i] = nv_rd08(dev, NV_PRMDIO_PALETTE_DATA);
+	saved_palette_mask = nv_rd08(dev, NV_PRMDIO_PIXEL_MASK);
+	nv_wr08(dev, NV_PRMDIO_PIXEL_MASK, 0);
+
+	saved_rgen_ctrl = NVReadRAMDAC(dev, 0, NV_PRAMDAC_GENERAL_CONTROL);
+	NVWriteRAMDAC(dev, 0, NV_PRAMDAC_GENERAL_CONTROL,
+		      (saved_rgen_ctrl & ~(NV_PRAMDAC_GENERAL_CONTROL_BPC_8BITS |
+					   NV_PRAMDAC_GENERAL_CONTROL_TERMINATION_75OHM)) |
+		      NV_PRAMDAC_GENERAL_CONTROL_PIXMIX_ON);
+
+	blue = 8;	/* start of test range */
+
+	do {
+		bool sense_pair[2];
+
+		nv_wr08(dev, NV_PRMDIO_WRITE_MODE_ADDRESS, 0);
+		nv_wr08(dev, NV_PRMDIO_PALETTE_DATA, 0);
+		nv_wr08(dev, NV_PRMDIO_PALETTE_DATA, 0);
+		/* testing blue won't find monochrome monitors.  I don't care */
+		nv_wr08(dev, NV_PRMDIO_PALETTE_DATA, blue);
+
+		i = 0;
+		/* take sample pairs until both samples in the pair agree */
+		do {
+			if (sample_load_twice(dev, sense_pair))
+				goto out;
+		} while ((sense_pair[0] != sense_pair[1]) &&
+							++i < MAX_SAMPLE_PAIRS);
+
+		if (i == MAX_SAMPLE_PAIRS)
+			/* too much oscillation defaults to LO */
+			sense = false;
+		else
+			sense = sense_pair[0];
+
+	/*
+	 * if sense goes LO before blue ramps to 0x18, monitor is not connected.
+	 * ergo, if blue gets to 0x18, monitor must be connected
+	 */
+	} while (++blue < 0x18 && sense);
+
+out:
+	nv_wr08(dev, NV_PRMDIO_PIXEL_MASK, saved_palette_mask);
+	NVWriteRAMDAC(dev, 0, NV_PRAMDAC_GENERAL_CONTROL, saved_rgen_ctrl);
+	nv_wr08(dev, NV_PRMDIO_WRITE_MODE_ADDRESS, 0);
+	for (i = 0; i < 3; i++)
+		nv_wr08(dev, NV_PRMDIO_PALETTE_DATA, saved_palette0[i]);
+	NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL, saved_rtest_ctrl);
+	NVWriteVgaCrtc(dev, 0, NV_CIO_CRE_PIXEL_INDEX, saved_pi);
+	NVWriteVgaCrtc(dev, 0, NV_CIO_CRE_RPC1_INDEX, saved_rpc1);
+	NVWriteVgaSeq(dev, 0, NV_VIO_SR_CLOCK_INDEX, saved_seq1);
+	NVWriteVgaCrtc(dev, 0, NV_CIO_CR_MODE_INDEX, saved_cr_mode);
+
+	if (blue == 0x18) {
+		NV_INFO(dev, "Load detected on head A\n");
+		return connector_status_connected;
+	}
+
+	return connector_status_disconnected;
+}
+
+uint32_t nv17_dac_sample_load(struct drm_encoder *encoder)
+{
+	struct drm_device *dev = encoder->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct dcb_entry *dcb = nouveau_encoder(encoder)->dcb;
+	uint32_t sample, testval, regoffset = nv04_dac_output_offset(encoder);
+	uint32_t saved_powerctrl_2 = 0, saved_powerctrl_4 = 0, saved_routput,
+		saved_rtest_ctrl, saved_gpio0, saved_gpio1, temp, routput;
+	int head;
+
+#define RGB_TEST_DATA(r, g, b) (r << 0 | g << 10 | b << 20)
+	if (dcb->type == OUTPUT_TV) {
+		testval = RGB_TEST_DATA(0xa0, 0xa0, 0xa0);
+
+		if (dev_priv->vbios->tvdactestval)
+			testval = dev_priv->vbios->tvdactestval;
+	} else {
+		testval = RGB_TEST_DATA(0x140, 0x140, 0x140); /* 0x94050140 */
+
+		if (dev_priv->vbios->dactestval)
+			testval = dev_priv->vbios->dactestval;
+	}
+
+	saved_rtest_ctrl = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset);
+	NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset,
+		      saved_rtest_ctrl & ~NV_PRAMDAC_TEST_CONTROL_PWRDWN_DAC_OFF);
+
+	saved_powerctrl_2 = nvReadMC(dev, NV_PBUS_POWERCTRL_2);
+
+	nvWriteMC(dev, NV_PBUS_POWERCTRL_2, saved_powerctrl_2 & 0xd7ffffff);
+	if (regoffset == 0x68) {
+		saved_powerctrl_4 = nvReadMC(dev, NV_PBUS_POWERCTRL_4);
+		nvWriteMC(dev, NV_PBUS_POWERCTRL_4, saved_powerctrl_4 & 0xffffffcf);
+	}
+
+	saved_gpio1 = nv17_gpio_get(dev, DCB_GPIO_TVDAC1);
+	saved_gpio0 = nv17_gpio_get(dev, DCB_GPIO_TVDAC0);
+
+	nv17_gpio_set(dev, DCB_GPIO_TVDAC1, dcb->type == OUTPUT_TV);
+	nv17_gpio_set(dev, DCB_GPIO_TVDAC0, dcb->type == OUTPUT_TV);
+
+	msleep(4);
+
+	saved_routput = NVReadRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset);
+	head = (saved_routput & 0x100) >> 8;
+#if 0
+	/* if there's a spare crtc, using it will minimise flicker for the case
+	 * where the in-use crtc is in use by an off-chip tmds encoder */
+	if (xf86_config->crtc[head]->enabled && !xf86_config->crtc[head ^ 1]->enabled)
+		head ^= 1;
+#endif
+	/* nv driver and nv31 use 0xfffffeee, nv34 and 6600 use 0xfffffece */
+	routput = (saved_routput & 0xfffffece) | head << 8;
+
+	if (dev_priv->card_type >= NV_40) {
+		if (dcb->type == OUTPUT_TV)
+			routput |= 0x1a << 16;
+		else
+			routput &= ~(0x1a << 16);
+	}
+
+	NVWriteRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset, routput);
+	msleep(1);
+
+	temp = NVReadRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset);
+	NVWriteRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset, temp | 1);
+
+	NVWriteRAMDAC(dev, head, NV_PRAMDAC_TESTPOINT_DATA,
+		      NV_PRAMDAC_TESTPOINT_DATA_NOTBLANK | testval);
+	temp = NVReadRAMDAC(dev, head, NV_PRAMDAC_TEST_CONTROL);
+	NVWriteRAMDAC(dev, head, NV_PRAMDAC_TEST_CONTROL,
+		      temp | NV_PRAMDAC_TEST_CONTROL_TP_INS_EN_ASSERTED);
+	msleep(5);
+
+	sample = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset);
+
+	temp = NVReadRAMDAC(dev, head, NV_PRAMDAC_TEST_CONTROL);
+	NVWriteRAMDAC(dev, head, NV_PRAMDAC_TEST_CONTROL,
+		      temp & ~NV_PRAMDAC_TEST_CONTROL_TP_INS_EN_ASSERTED);
+	NVWriteRAMDAC(dev, head, NV_PRAMDAC_TESTPOINT_DATA, 0);
+
+	/* bios does something more complex for restoring, but I think this is good enough */
+	NVWriteRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset, saved_routput);
+	NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset, saved_rtest_ctrl);
+	if (regoffset == 0x68)
+		nvWriteMC(dev, NV_PBUS_POWERCTRL_4, saved_powerctrl_4);
+	nvWriteMC(dev, NV_PBUS_POWERCTRL_2, saved_powerctrl_2);
+
+	nv17_gpio_set(dev, DCB_GPIO_TVDAC1, saved_gpio1);
+	nv17_gpio_set(dev, DCB_GPIO_TVDAC0, saved_gpio0);
+
+	return sample;
+}
+
+static enum drm_connector_status
+nv17_dac_detect(struct drm_encoder *encoder, struct drm_connector *connector)
+{
+	struct drm_device *dev = encoder->dev;
+	struct dcb_entry *dcb = nouveau_encoder(encoder)->dcb;
+	uint32_t sample = nv17_dac_sample_load(encoder);
+
+	if (sample & NV_PRAMDAC_TEST_CONTROL_SENSEB_ALLHI) {
+		NV_INFO(dev, "Load detected on output %c\n",
+			'@' + ffs(dcb->or));
+		return connector_status_connected;
+	} else {
+		return connector_status_disconnected;
+	}
+}
+
+static bool nv04_dac_mode_fixup(struct drm_encoder *encoder,
+				struct drm_display_mode *mode,
+				struct drm_display_mode *adjusted_mode)
+{
+	return true;
+}
+
+static void nv04_dac_prepare(struct drm_encoder *encoder)
+{
+	struct drm_encoder_helper_funcs *helper = encoder->helper_private;
+	struct drm_device *dev = encoder->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	int head = nouveau_crtc(encoder->crtc)->index;
+	struct nv04_crtc_reg *crtcstate = dev_priv->mode_reg.crtc_reg;
+
+	helper->dpms(encoder, DRM_MODE_DPMS_OFF);
+
+	nv04_dfp_disable(dev, head);
+
+	/* Some NV4x have unknown values (0x3f, 0x50, 0x54, 0x6b, 0x79, 0x7f)
+	 * at LCD__INDEX which we don't alter
+	 */
+	if (!(crtcstate[head].CRTC[NV_CIO_CRE_LCD__INDEX] & 0x44))
+		crtcstate[head].CRTC[NV_CIO_CRE_LCD__INDEX] = 0;
+}
+
+
+static void nv04_dac_mode_set(struct drm_encoder *encoder,
+			      struct drm_display_mode *mode,
+			      struct drm_display_mode *adjusted_mode)
+{
+	struct drm_device *dev = encoder->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	int head = nouveau_crtc(encoder->crtc)->index;
+
+	if (nv_gf4_disp_arch(dev)) {
+		struct drm_encoder *rebind;
+		uint32_t dac_offset = nv04_dac_output_offset(encoder);
+		uint32_t otherdac;
+
+		/* bit 16-19 are bits that are set on some G70 cards,
+		 * but don't seem to have much effect */
+		NVWriteRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + dac_offset,
+			      head << 8 | NV_PRAMDAC_DACCLK_SEL_DACCLK);
+		/* force any other vga encoders to bind to the other crtc */
+		list_for_each_entry(rebind, &dev->mode_config.encoder_list, head) {
+			if (rebind == encoder
+			    || nouveau_encoder(rebind)->dcb->type != OUTPUT_ANALOG)
+				continue;
+
+			dac_offset = nv04_dac_output_offset(rebind);
+			otherdac = NVReadRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + dac_offset);
+			NVWriteRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + dac_offset,
+				      (otherdac & ~0x0100) | (head ^ 1) << 8);
+		}
+	}
+
+	/* This could use refinement for flatpanels, but it should work this way */
+	if (dev_priv->chipset < 0x44)
+		NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + nv04_dac_output_offset(encoder), 0xf0000000);
+	else
+		NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + nv04_dac_output_offset(encoder), 0x00100000);
+}
+
+static void nv04_dac_commit(struct drm_encoder *encoder)
+{
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+	struct drm_device *dev = encoder->dev;
+	struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
+	struct drm_encoder_helper_funcs *helper = encoder->helper_private;
+
+	helper->dpms(encoder, DRM_MODE_DPMS_ON);
+
+	NV_INFO(dev, "Output %s is running on CRTC %d using output %c\n",
+		drm_get_connector_name(&nouveau_encoder_connector_get(nv_encoder)->base),
+		nv_crtc->index, '@' + ffs(nv_encoder->dcb->or));
+}
+
+void nv04_dac_update_dacclk(struct drm_encoder *encoder, bool enable)
+{
+	struct drm_device *dev = encoder->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct dcb_entry *dcb = nouveau_encoder(encoder)->dcb;
+
+	if (nv_gf4_disp_arch(dev)) {
+		uint32_t *dac_users = &dev_priv->dac_users[ffs(dcb->or) - 1];
+		int dacclk_off = NV_PRAMDAC_DACCLK + nv04_dac_output_offset(encoder);
+		uint32_t dacclk = NVReadRAMDAC(dev, 0, dacclk_off);
+
+		if (enable) {
+			*dac_users |= 1 << dcb->index;
+			NVWriteRAMDAC(dev, 0, dacclk_off, dacclk | NV_PRAMDAC_DACCLK_SEL_DACCLK);
+
+		} else {
+			*dac_users &= ~(1 << dcb->index);
+			if (!*dac_users)
+				NVWriteRAMDAC(dev, 0, dacclk_off,
+					dacclk & ~NV_PRAMDAC_DACCLK_SEL_DACCLK);
+		}
+	}
+}
+
+static void nv04_dac_dpms(struct drm_encoder *encoder, int mode)
+{
+	struct drm_device *dev = encoder->dev;
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+
+	if (nv_encoder->last_dpms == mode)
+		return;
+	nv_encoder->last_dpms = mode;
+
+	NV_INFO(dev, "Setting dpms mode %d on vga encoder (output %d)\n",
+		     mode, nv_encoder->dcb->index);
+
+	nv04_dac_update_dacclk(encoder, mode == DRM_MODE_DPMS_ON);
+}
+
+static void nv04_dac_save(struct drm_encoder *encoder)
+{
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+	struct drm_device *dev = encoder->dev;
+
+	if (nv_gf4_disp_arch(dev))
+		nv_encoder->restore.output = NVReadRAMDAC(dev, 0, NV_PRAMDAC_DACCLK +
+							  nv04_dac_output_offset(encoder));
+}
+
+static void nv04_dac_restore(struct drm_encoder *encoder)
+{
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+	struct drm_device *dev = encoder->dev;
+
+	if (nv_gf4_disp_arch(dev))
+		NVWriteRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + nv04_dac_output_offset(encoder),
+			      nv_encoder->restore.output);
+
+	nv_encoder->last_dpms = NV_DPMS_CLEARED;
+}
+
+static void nv04_dac_destroy(struct drm_encoder *encoder)
+{
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+
+	NV_DEBUG_KMS(encoder->dev, "\n");
+
+	drm_encoder_cleanup(encoder);
+	kfree(nv_encoder);
+}
+
+static const struct drm_encoder_helper_funcs nv04_dac_helper_funcs = {
+	.dpms = nv04_dac_dpms,
+	.save = nv04_dac_save,
+	.restore = nv04_dac_restore,
+	.mode_fixup = nv04_dac_mode_fixup,
+	.prepare = nv04_dac_prepare,
+	.commit = nv04_dac_commit,
+	.mode_set = nv04_dac_mode_set,
+	.detect = nv04_dac_detect
+};
+
+static const struct drm_encoder_helper_funcs nv17_dac_helper_funcs = {
+	.dpms = nv04_dac_dpms,
+	.save = nv04_dac_save,
+	.restore = nv04_dac_restore,
+	.mode_fixup = nv04_dac_mode_fixup,
+	.prepare = nv04_dac_prepare,
+	.commit = nv04_dac_commit,
+	.mode_set = nv04_dac_mode_set,
+	.detect = nv17_dac_detect
+};
+
+static const struct drm_encoder_funcs nv04_dac_funcs = {
+	.destroy = nv04_dac_destroy,
+};
+
+int nv04_dac_create(struct drm_device *dev, struct dcb_entry *entry)
+{
+	const struct drm_encoder_helper_funcs *helper;
+	struct drm_encoder *encoder;
+	struct nouveau_encoder *nv_encoder = NULL;
+
+	nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
+	if (!nv_encoder)
+		return -ENOMEM;
+
+	encoder = to_drm_encoder(nv_encoder);
+
+	nv_encoder->dcb = entry;
+	nv_encoder->or = ffs(entry->or) - 1;
+
+	if (nv_gf4_disp_arch(dev))
+		helper = &nv17_dac_helper_funcs;
+	else
+		helper = &nv04_dac_helper_funcs;
+
+	drm_encoder_init(dev, encoder, &nv04_dac_funcs, DRM_MODE_ENCODER_DAC);
+	drm_encoder_helper_add(encoder, helper);
+
+	encoder->possible_crtcs = entry->heads;
+	encoder->possible_clones = 0;
+
+	return 0;
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_gem.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_gem.c
@@ -0,0 +1,994 @@
+/*
+ * Copyright (C) 2008 Ben Skeggs.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+#include "drmP.h"
+#include "drm.h"
+
+#include "nouveau_drv.h"
+#include "nouveau_drm.h"
+#include "nouveau_dma.h"
+
+#define nouveau_gem_pushbuf_sync(chan) 0
+
+int
+nouveau_gem_object_new(struct drm_gem_object *gem)
+{
+	return 0;
+}
+
+void
+nouveau_gem_object_del(struct drm_gem_object *gem)
+{
+	struct nouveau_bo *nvbo = gem->driver_private;
+	struct ttm_buffer_object *bo = &nvbo->bo;
+
+	if (!nvbo)
+		return;
+	nvbo->gem = NULL;
+
+	if (unlikely(nvbo->cpu_filp))
+		ttm_bo_synccpu_write_release(bo);
+
+	if (unlikely(nvbo->pin_refcnt)) {
+		nvbo->pin_refcnt = 1;
+		nouveau_bo_unpin(nvbo);
+	}
+
+	ttm_bo_unref(&bo);
+}
+
+int
+nouveau_gem_new(struct drm_device *dev, struct nouveau_channel *chan,
+		int size, int align, uint32_t flags, uint32_t tile_mode,
+		uint32_t tile_flags, bool no_vm, bool mappable,
+		struct nouveau_bo **pnvbo)
+{
+	struct nouveau_bo *nvbo;
+	int ret;
+
+	ret = nouveau_bo_new(dev, chan, size, align, flags, tile_mode,
+			     tile_flags, no_vm, mappable, pnvbo);
+	if (ret)
+		return ret;
+	nvbo = *pnvbo;
+
+	nvbo->gem = drm_gem_object_alloc(dev, nvbo->bo.mem.size);
+	if (!nvbo->gem) {
+		nouveau_bo_ref(NULL, pnvbo);
+		return -ENOMEM;
+	}
+
+	nvbo->bo.persistant_swap_storage = nvbo->gem->filp;
+	nvbo->gem->driver_private = nvbo;
+	return 0;
+}
+
+static int
+nouveau_gem_info(struct drm_gem_object *gem, struct drm_nouveau_gem_info *rep)
+{
+	struct nouveau_bo *nvbo = nouveau_gem_object(gem);
+
+	if (nvbo->bo.mem.mem_type == TTM_PL_TT)
+		rep->domain = NOUVEAU_GEM_DOMAIN_GART;
+	else
+		rep->domain = NOUVEAU_GEM_DOMAIN_VRAM;
+
+	rep->size = nvbo->bo.mem.num_pages << PAGE_SHIFT;
+	rep->offset = nvbo->bo.offset;
+	rep->map_handle = nvbo->mappable ? nvbo->bo.addr_space_offset : 0;
+	rep->tile_mode = nvbo->tile_mode;
+	rep->tile_flags = nvbo->tile_flags;
+	return 0;
+}
+
+static bool
+nouveau_gem_tile_flags_valid(struct drm_device *dev, uint32_t tile_flags) {
+	switch (tile_flags) {
+	case 0x0000:
+	case 0x1800:
+	case 0x2800:
+	case 0x4800:
+	case 0x7000:
+	case 0x7400:
+	case 0x7a00:
+	case 0xe000:
+		break;
+	default:
+		NV_ERROR(dev, "bad page flags: 0x%08x\n", tile_flags);
+		return false;
+	}
+
+	return true;
+}
+
+int
+nouveau_gem_ioctl_new(struct drm_device *dev, void *data,
+		      struct drm_file *file_priv)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct drm_nouveau_gem_new *req = data;
+	struct nouveau_bo *nvbo = NULL;
+	struct nouveau_channel *chan = NULL;
+	uint32_t flags = 0;
+	int ret = 0;
+
+	NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
+
+	if (unlikely(dev_priv->ttm.bdev.dev_mapping == NULL))
+		dev_priv->ttm.bdev.dev_mapping = dev_priv->dev->dev_mapping;
+
+	if (req->channel_hint) {
+		NOUVEAU_GET_USER_CHANNEL_WITH_RETURN(req->channel_hint,
+						     file_priv, chan);
+	}
+
+	if (req->info.domain & NOUVEAU_GEM_DOMAIN_VRAM)
+		flags |= TTM_PL_FLAG_VRAM;
+	if (req->info.domain & NOUVEAU_GEM_DOMAIN_GART)
+		flags |= TTM_PL_FLAG_TT;
+	if (!flags || req->info.domain & NOUVEAU_GEM_DOMAIN_CPU)
+		flags |= TTM_PL_FLAG_SYSTEM;
+
+	if (!nouveau_gem_tile_flags_valid(dev, req->info.tile_flags))
+		return -EINVAL;
+
+	ret = nouveau_gem_new(dev, chan, req->info.size, req->align, flags,
+			      req->info.tile_mode, req->info.tile_flags, false,
+			      (req->info.domain & NOUVEAU_GEM_DOMAIN_MAPPABLE),
+			      &nvbo);
+	if (ret)
+		return ret;
+
+	ret = nouveau_gem_info(nvbo->gem, &req->info);
+	if (ret)
+		goto out;
+
+	ret = drm_gem_handle_create(file_priv, nvbo->gem, &req->info.handle);
+out:
+	mutex_lock(&dev->struct_mutex);
+	drm_gem_object_handle_unreference(nvbo->gem);
+	mutex_unlock(&dev->struct_mutex);
+
+	if (ret)
+		drm_gem_object_unreference(nvbo->gem);
+	return ret;
+}
+
+static int
+nouveau_gem_set_domain(struct drm_gem_object *gem, uint32_t read_domains,
+		       uint32_t write_domains, uint32_t valid_domains)
+{
+	struct nouveau_bo *nvbo = gem->driver_private;
+	struct ttm_buffer_object *bo = &nvbo->bo;
+	uint64_t flags;
+
+	if (!valid_domains || (!read_domains && !write_domains))
+		return -EINVAL;
+
+	if (write_domains) {
+		if ((valid_domains & NOUVEAU_GEM_DOMAIN_VRAM) &&
+		    (write_domains & NOUVEAU_GEM_DOMAIN_VRAM))
+			flags = TTM_PL_FLAG_VRAM;
+		else
+		if ((valid_domains & NOUVEAU_GEM_DOMAIN_GART) &&
+		    (write_domains & NOUVEAU_GEM_DOMAIN_GART))
+			flags = TTM_PL_FLAG_TT;
+		else
+			return -EINVAL;
+	} else {
+		if ((valid_domains & NOUVEAU_GEM_DOMAIN_VRAM) &&
+		    (read_domains & NOUVEAU_GEM_DOMAIN_VRAM) &&
+		    bo->mem.mem_type == TTM_PL_VRAM)
+			flags = TTM_PL_FLAG_VRAM;
+		else
+		if ((valid_domains & NOUVEAU_GEM_DOMAIN_GART) &&
+		    (read_domains & NOUVEAU_GEM_DOMAIN_GART) &&
+		    bo->mem.mem_type == TTM_PL_TT)
+			flags = TTM_PL_FLAG_TT;
+		else
+		if ((valid_domains & NOUVEAU_GEM_DOMAIN_VRAM) &&
+		    (read_domains & NOUVEAU_GEM_DOMAIN_VRAM))
+			flags = TTM_PL_FLAG_VRAM;
+		else
+			flags = TTM_PL_FLAG_TT;
+	}
+
+	nouveau_bo_placement_set(nvbo, flags);
+	return 0;
+}
+
+struct validate_op {
+	struct list_head vram_list;
+	struct list_head gart_list;
+	struct list_head both_list;
+};
+
+static void
+validate_fini_list(struct list_head *list, struct nouveau_fence *fence)
+{
+	struct list_head *entry, *tmp;
+	struct nouveau_bo *nvbo;
+
+	list_for_each_safe(entry, tmp, list) {
+		nvbo = list_entry(entry, struct nouveau_bo, entry);
+		if (likely(fence)) {
+			struct nouveau_fence *prev_fence;
+
+			spin_lock(&nvbo->bo.lock);
+			prev_fence = nvbo->bo.sync_obj;
+			nvbo->bo.sync_obj = nouveau_fence_ref(fence);
+			spin_unlock(&nvbo->bo.lock);
+			nouveau_fence_unref((void *)&prev_fence);
+		}
+
+		list_del(&nvbo->entry);
+		nvbo->reserved_by = NULL;
+		ttm_bo_unreserve(&nvbo->bo);
+		drm_gem_object_unreference(nvbo->gem);
+	}
+}
+
+static void
+validate_fini(struct validate_op *op, struct nouveau_fence* fence)
+{
+	validate_fini_list(&op->vram_list, fence);
+	validate_fini_list(&op->gart_list, fence);
+	validate_fini_list(&op->both_list, fence);
+}
+
+static int
+validate_init(struct nouveau_channel *chan, struct drm_file *file_priv,
+	      struct drm_nouveau_gem_pushbuf_bo *pbbo,
+	      int nr_buffers, struct validate_op *op)
+{
+	struct drm_device *dev = chan->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	uint32_t sequence;
+	int trycnt = 0;
+	int ret, i;
+
+	sequence = atomic_add_return(1, &dev_priv->ttm.validate_sequence);
+retry:
+	if (++trycnt > 100000) {
+		NV_ERROR(dev, "%s failed and gave up.\n", __func__);
+		return -EINVAL;
+	}
+
+	for (i = 0; i < nr_buffers; i++) {
+		struct drm_nouveau_gem_pushbuf_bo *b = &pbbo[i];
+		struct drm_gem_object *gem;
+		struct nouveau_bo *nvbo;
+
+		gem = drm_gem_object_lookup(dev, file_priv, b->handle);
+		if (!gem) {
+			NV_ERROR(dev, "Unknown handle 0x%08x\n", b->handle);
+			validate_fini(op, NULL);
+			return -EINVAL;
+		}
+		nvbo = gem->driver_private;
+
+		if (nvbo->reserved_by && nvbo->reserved_by == file_priv) {
+			NV_ERROR(dev, "multiple instances of buffer %d on "
+				      "validation list\n", b->handle);
+			validate_fini(op, NULL);
+			return -EINVAL;
+		}
+
+		ret = ttm_bo_reserve(&nvbo->bo, false, false, true, sequence);
+		if (ret) {
+			validate_fini(op, NULL);
+			if (ret == -EAGAIN)
+				ret = ttm_bo_wait_unreserved(&nvbo->bo, false);
+			drm_gem_object_unreference(gem);
+			if (ret)
+				return ret;
+			goto retry;
+		}
+
+		nvbo->reserved_by = file_priv;
+		nvbo->pbbo_index = i;
+		if ((b->valid_domains & NOUVEAU_GEM_DOMAIN_VRAM) &&
+		    (b->valid_domains & NOUVEAU_GEM_DOMAIN_GART))
+			list_add_tail(&nvbo->entry, &op->both_list);
+		else
+		if (b->valid_domains & NOUVEAU_GEM_DOMAIN_VRAM)
+			list_add_tail(&nvbo->entry, &op->vram_list);
+		else
+		if (b->valid_domains & NOUVEAU_GEM_DOMAIN_GART)
+			list_add_tail(&nvbo->entry, &op->gart_list);
+		else {
+			NV_ERROR(dev, "invalid valid domains: 0x%08x\n",
+				 b->valid_domains);
+			list_add_tail(&nvbo->entry, &op->both_list);
+			validate_fini(op, NULL);
+			return -EINVAL;
+		}
+
+		if (unlikely(atomic_read(&nvbo->bo.cpu_writers) > 0)) {
+			validate_fini(op, NULL);
+
+			if (nvbo->cpu_filp == file_priv) {
+				NV_ERROR(dev, "bo %p mapped by process trying "
+					      "to validate it!\n", nvbo);
+				return -EINVAL;
+			}
+
+			ret = ttm_bo_wait_cpu(&nvbo->bo, false);
+			if (ret)
+				return ret;
+			goto retry;
+		}
+	}
+
+	return 0;
+}
+
+static int
+validate_list(struct nouveau_channel *chan, struct list_head *list,
+	      struct drm_nouveau_gem_pushbuf_bo *pbbo, uint64_t user_pbbo_ptr)
+{
+	struct drm_nouveau_gem_pushbuf_bo __user *upbbo =
+				(void __force __user *)(uintptr_t)user_pbbo_ptr;
+	struct nouveau_bo *nvbo;
+	int ret, relocs = 0;
+
+	list_for_each_entry(nvbo, list, entry) {
+		struct drm_nouveau_gem_pushbuf_bo *b = &pbbo[nvbo->pbbo_index];
+		struct nouveau_fence *prev_fence = nvbo->bo.sync_obj;
+
+		if (prev_fence && nouveau_fence_channel(prev_fence) != chan) {
+			spin_lock(&nvbo->bo.lock);
+			ret = ttm_bo_wait(&nvbo->bo, false, false, false);
+			spin_unlock(&nvbo->bo.lock);
+			if (unlikely(ret))
+				return ret;
+		}
+
+		ret = nouveau_gem_set_domain(nvbo->gem, b->read_domains,
+					     b->write_domains,
+					     b->valid_domains);
+		if (unlikely(ret))
+			return ret;
+
+		nvbo->channel = chan;
+		ret = ttm_bo_validate(&nvbo->bo, &nvbo->placement,
+				      false, false);
+		nvbo->channel = NULL;
+		if (unlikely(ret))
+			return ret;
+
+		if (nvbo->bo.offset == b->presumed_offset &&
+		    ((nvbo->bo.mem.mem_type == TTM_PL_VRAM &&
+		      b->presumed_domain & NOUVEAU_GEM_DOMAIN_VRAM) ||
+		     (nvbo->bo.mem.mem_type == TTM_PL_TT &&
+		      b->presumed_domain & NOUVEAU_GEM_DOMAIN_GART)))
+			continue;
+
+		if (nvbo->bo.mem.mem_type == TTM_PL_TT)
+			b->presumed_domain = NOUVEAU_GEM_DOMAIN_GART;
+		else
+			b->presumed_domain = NOUVEAU_GEM_DOMAIN_VRAM;
+		b->presumed_offset = nvbo->bo.offset;
+		b->presumed_ok = 0;
+		relocs++;
+
+		if (DRM_COPY_TO_USER(&upbbo[nvbo->pbbo_index], b, sizeof(*b)))
+			return -EFAULT;
+	}
+
+	return relocs;
+}
+
+static int
+nouveau_gem_pushbuf_validate(struct nouveau_channel *chan,
+			     struct drm_file *file_priv,
+			     struct drm_nouveau_gem_pushbuf_bo *pbbo,
+			     uint64_t user_buffers, int nr_buffers,
+			     struct validate_op *op, int *apply_relocs)
+{
+	int ret, relocs = 0;
+
+	INIT_LIST_HEAD(&op->vram_list);
+	INIT_LIST_HEAD(&op->gart_list);
+	INIT_LIST_HEAD(&op->both_list);
+
+	if (nr_buffers == 0)
+		return 0;
+
+	ret = validate_init(chan, file_priv, pbbo, nr_buffers, op);
+	if (unlikely(ret))
+		return ret;
+
+	ret = validate_list(chan, &op->vram_list, pbbo, user_buffers);
+	if (unlikely(ret < 0)) {
+		validate_fini(op, NULL);
+		return ret;
+	}
+	relocs += ret;
+
+	ret = validate_list(chan, &op->gart_list, pbbo, user_buffers);
+	if (unlikely(ret < 0)) {
+		validate_fini(op, NULL);
+		return ret;
+	}
+	relocs += ret;
+
+	ret = validate_list(chan, &op->both_list, pbbo, user_buffers);
+	if (unlikely(ret < 0)) {
+		validate_fini(op, NULL);
+		return ret;
+	}
+	relocs += ret;
+
+	*apply_relocs = relocs;
+	return 0;
+}
+
+static inline void *
+u_memcpya(uint64_t user, unsigned nmemb, unsigned size)
+{
+	void *mem;
+	void __user *userptr = (void __force __user *)(uintptr_t)user;
+
+	mem = kmalloc(nmemb * size, GFP_KERNEL);
+	if (!mem)
+		return ERR_PTR(-ENOMEM);
+
+	if (DRM_COPY_FROM_USER(mem, userptr, nmemb * size)) {
+		kfree(mem);
+		return ERR_PTR(-EFAULT);
+	}
+
+	return mem;
+}
+
+static int
+nouveau_gem_pushbuf_reloc_apply(struct nouveau_channel *chan, int nr_bo,
+				struct drm_nouveau_gem_pushbuf_bo *bo,
+				unsigned nr_relocs, uint64_t ptr_relocs,
+				unsigned nr_dwords, unsigned first_dword,
+				uint32_t *pushbuf, bool is_iomem)
+{
+	struct drm_nouveau_gem_pushbuf_reloc *reloc = NULL;
+	struct drm_device *dev = chan->dev;
+	int ret = 0;
+	unsigned i;
+
+	reloc = u_memcpya(ptr_relocs, nr_relocs, sizeof(*reloc));
+	if (IS_ERR(reloc))
+		return PTR_ERR(reloc);
+
+	for (i = 0; i < nr_relocs; i++) {
+		struct drm_nouveau_gem_pushbuf_reloc *r = &reloc[i];
+		struct drm_nouveau_gem_pushbuf_bo *b;
+		uint32_t data;
+
+		if (r->bo_index >= nr_bo || r->reloc_index < first_dword ||
+		    r->reloc_index >= first_dword + nr_dwords) {
+			NV_ERROR(dev, "Bad relocation %d\n", i);
+			NV_ERROR(dev, "  bo: %d max %d\n", r->bo_index, nr_bo);
+			NV_ERROR(dev, "  id: %d max %d\n", r->reloc_index, nr_dwords);
+			ret = -EINVAL;
+			break;
+		}
+
+		b = &bo[r->bo_index];
+		if (b->presumed_ok)
+			continue;
+
+		if (r->flags & NOUVEAU_GEM_RELOC_LOW)
+			data = b->presumed_offset + r->data;
+		else
+		if (r->flags & NOUVEAU_GEM_RELOC_HIGH)
+			data = (b->presumed_offset + r->data) >> 32;
+		else
+			data = r->data;
+
+		if (r->flags & NOUVEAU_GEM_RELOC_OR) {
+			if (b->presumed_domain == NOUVEAU_GEM_DOMAIN_GART)
+				data |= r->tor;
+			else
+				data |= r->vor;
+		}
+
+		if (is_iomem)
+			iowrite32_native(data, (void __force __iomem *)
+						&pushbuf[r->reloc_index]);
+		else
+			pushbuf[r->reloc_index] = data;
+	}
+
+	kfree(reloc);
+	return ret;
+}
+
+int
+nouveau_gem_ioctl_pushbuf(struct drm_device *dev, void *data,
+			  struct drm_file *file_priv)
+{
+	struct drm_nouveau_gem_pushbuf *req = data;
+	struct drm_nouveau_gem_pushbuf_bo *bo = NULL;
+	struct nouveau_channel *chan;
+	struct validate_op op;
+	struct nouveau_fence* fence = 0;
+	uint32_t *pushbuf = NULL;
+	int ret = 0, do_reloc = 0, i;
+
+	NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
+	NOUVEAU_GET_USER_CHANNEL_WITH_RETURN(req->channel, file_priv, chan);
+
+	if (req->nr_dwords >= chan->dma.max ||
+	    req->nr_buffers > NOUVEAU_GEM_MAX_BUFFERS ||
+	    req->nr_relocs > NOUVEAU_GEM_MAX_RELOCS) {
+		NV_ERROR(dev, "Pushbuf config exceeds limits:\n");
+		NV_ERROR(dev, "  dwords : %d max %d\n", req->nr_dwords,
+			 chan->dma.max - 1);
+		NV_ERROR(dev, "  buffers: %d max %d\n", req->nr_buffers,
+			 NOUVEAU_GEM_MAX_BUFFERS);
+		NV_ERROR(dev, "  relocs : %d max %d\n", req->nr_relocs,
+			 NOUVEAU_GEM_MAX_RELOCS);
+		return -EINVAL;
+	}
+
+	pushbuf = u_memcpya(req->dwords, req->nr_dwords, sizeof(uint32_t));
+	if (IS_ERR(pushbuf))
+		return PTR_ERR(pushbuf);
+
+	bo = u_memcpya(req->buffers, req->nr_buffers, sizeof(*bo));
+	if (IS_ERR(bo)) {
+		kfree(pushbuf);
+		return PTR_ERR(bo);
+	}
+
+	mutex_lock(&dev->struct_mutex);
+
+	/* Validate buffer list */
+	ret = nouveau_gem_pushbuf_validate(chan, file_priv, bo, req->buffers,
+					   req->nr_buffers, &op, &do_reloc);
+	if (ret)
+		goto out;
+
+	/* Apply any relocations that are required */
+	if (do_reloc) {
+		ret = nouveau_gem_pushbuf_reloc_apply(chan, req->nr_buffers,
+						      bo, req->nr_relocs,
+						      req->relocs,
+						      req->nr_dwords, 0,
+						      pushbuf, false);
+		if (ret)
+			goto out;
+	}
+
+	/* Emit push buffer to the hw
+	 */
+	ret = RING_SPACE(chan, req->nr_dwords);
+	if (ret)
+		goto out;
+
+	OUT_RINGp(chan, pushbuf, req->nr_dwords);
+
+	ret = nouveau_fence_new(chan, &fence, true);
+	if (ret) {
+		NV_ERROR(dev, "error fencing pushbuf: %d\n", ret);
+		WIND_RING(chan);
+		goto out;
+	}
+
+	if (nouveau_gem_pushbuf_sync(chan)) {
+		ret = nouveau_fence_wait(fence, NULL, false, false);
+		if (ret) {
+			for (i = 0; i < req->nr_dwords; i++)
+				NV_ERROR(dev, "0x%08x\n", pushbuf[i]);
+			NV_ERROR(dev, "^^ above push buffer is fail :(\n");
+		}
+	}
+
+out:
+	validate_fini(&op, fence);
+	nouveau_fence_unref((void**)&fence);
+	mutex_unlock(&dev->struct_mutex);
+	kfree(pushbuf);
+	kfree(bo);
+	return ret;
+}
+
+#define PUSHBUF_CAL (dev_priv->card_type >= NV_20)
+
+int
+nouveau_gem_ioctl_pushbuf_call(struct drm_device *dev, void *data,
+			       struct drm_file *file_priv)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct drm_nouveau_gem_pushbuf_call *req = data;
+	struct drm_nouveau_gem_pushbuf_bo *bo = NULL;
+	struct nouveau_channel *chan;
+	struct drm_gem_object *gem;
+	struct nouveau_bo *pbbo;
+	struct validate_op op;
+	struct nouveau_fence* fence = 0;
+	int i, ret = 0, do_reloc = 0;
+
+	NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
+	NOUVEAU_GET_USER_CHANNEL_WITH_RETURN(req->channel, file_priv, chan);
+
+	if (unlikely(req->handle == 0))
+		goto out_next;
+
+	if (req->nr_buffers > NOUVEAU_GEM_MAX_BUFFERS ||
+	    req->nr_relocs > NOUVEAU_GEM_MAX_RELOCS) {
+		NV_ERROR(dev, "Pushbuf config exceeds limits:\n");
+		NV_ERROR(dev, "  buffers: %d max %d\n", req->nr_buffers,
+			 NOUVEAU_GEM_MAX_BUFFERS);
+		NV_ERROR(dev, "  relocs : %d max %d\n", req->nr_relocs,
+			 NOUVEAU_GEM_MAX_RELOCS);
+		return -EINVAL;
+	}
+
+	bo = u_memcpya(req->buffers, req->nr_buffers, sizeof(*bo));
+	if (IS_ERR(bo))
+		return PTR_ERR(bo);
+
+	mutex_lock(&dev->struct_mutex);
+
+	/* Validate buffer list */
+	ret = nouveau_gem_pushbuf_validate(chan, file_priv, bo, req->buffers,
+					   req->nr_buffers, &op, &do_reloc);
+	if (ret) {
+		NV_ERROR(dev, "validate: %d\n", ret);
+		goto out;
+	}
+
+	/* Validate DMA push buffer */
+	gem = drm_gem_object_lookup(dev, file_priv, req->handle);
+	if (!gem) {
+		NV_ERROR(dev, "Unknown pb handle 0x%08x\n", req->handle);
+		ret = -EINVAL;
+		goto out;
+	}
+	pbbo = nouveau_gem_object(gem);
+
+	if ((req->offset & 3) || req->nr_dwords < 2 ||
+	    (unsigned long)req->offset > (unsigned long)pbbo->bo.mem.size ||
+	    (unsigned long)req->nr_dwords >
+	     ((unsigned long)(pbbo->bo.mem.size - req->offset ) >> 2)) {
+		NV_ERROR(dev, "pb call misaligned or out of bounds: "
+			      "%d + %d * 4 > %ld\n",
+			 req->offset, req->nr_dwords, pbbo->bo.mem.size);
+		ret = -EINVAL;
+		drm_gem_object_unreference(gem);
+		goto out;
+	}
+
+	ret = ttm_bo_reserve(&pbbo->bo, false, false, true,
+			     chan->fence.sequence);
+	if (ret) {
+		NV_ERROR(dev, "resv pb: %d\n", ret);
+		drm_gem_object_unreference(gem);
+		goto out;
+	}
+
+	nouveau_bo_placement_set(pbbo, 1 << chan->pushbuf_bo->bo.mem.mem_type);
+	ret = ttm_bo_validate(&pbbo->bo, &pbbo->placement, false, false);
+	if (ret) {
+		NV_ERROR(dev, "validate pb: %d\n", ret);
+		ttm_bo_unreserve(&pbbo->bo);
+		drm_gem_object_unreference(gem);
+		goto out;
+	}
+
+	list_add_tail(&pbbo->entry, &op.both_list);
+
+	/* If presumed return address doesn't match, we need to map the
+	 * push buffer and fix it..
+	 */
+	if (!PUSHBUF_CAL) {
+		uint32_t retaddy;
+
+		if (chan->dma.free < 4 + NOUVEAU_DMA_SKIPS) {
+			ret = nouveau_dma_wait(chan, 4 + NOUVEAU_DMA_SKIPS);
+			if (ret) {
+				NV_ERROR(dev, "jmp_space: %d\n", ret);
+				goto out;
+			}
+		}
+
+		retaddy  = chan->pushbuf_base + ((chan->dma.cur + 2) << 2);
+		retaddy |= 0x20000000;
+		if (retaddy != req->suffix0) {
+			req->suffix0 = retaddy;
+			do_reloc = 1;
+		}
+	}
+
+	/* Apply any relocations that are required */
+	if (do_reloc) {
+		void *pbvirt;
+		bool is_iomem;
+		ret = ttm_bo_kmap(&pbbo->bo, 0, pbbo->bo.mem.num_pages,
+				  &pbbo->kmap);
+		if (ret) {
+			NV_ERROR(dev, "kmap pb: %d\n", ret);
+			goto out;
+		}
+
+		pbvirt = ttm_kmap_obj_virtual(&pbbo->kmap, &is_iomem);
+		ret = nouveau_gem_pushbuf_reloc_apply(chan, req->nr_buffers, bo,
+						      req->nr_relocs,
+						      req->relocs,
+						      req->nr_dwords,
+						      req->offset / 4,
+						      pbvirt, is_iomem);
+
+		if (!PUSHBUF_CAL) {
+			nouveau_bo_wr32(pbbo,
+					req->offset / 4 + req->nr_dwords - 2,
+					req->suffix0);
+		}
+
+		ttm_bo_kunmap(&pbbo->kmap);
+		if (ret) {
+			NV_ERROR(dev, "reloc apply: %d\n", ret);
+			goto out;
+		}
+	}
+
+	if (PUSHBUF_CAL) {
+		ret = RING_SPACE(chan, 2);
+		if (ret) {
+			NV_ERROR(dev, "cal_space: %d\n", ret);
+			goto out;
+		}
+		OUT_RING(chan, ((pbbo->bo.mem.mm_node->start << PAGE_SHIFT) +
+				  req->offset) | 2);
+		OUT_RING(chan, 0);
+	} else {
+		ret = RING_SPACE(chan, 2 + NOUVEAU_DMA_SKIPS);
+		if (ret) {
+			NV_ERROR(dev, "jmp_space: %d\n", ret);
+			goto out;
+		}
+		OUT_RING(chan, ((pbbo->bo.mem.mm_node->start << PAGE_SHIFT) +
+				  req->offset) | 0x20000000);
+		OUT_RING(chan, 0);
+
+		/* Space the jumps apart with NOPs. */
+		for (i = 0; i < NOUVEAU_DMA_SKIPS; i++)
+			OUT_RING(chan, 0);
+	}
+
+	ret = nouveau_fence_new(chan, &fence, true);
+	if (ret) {
+		NV_ERROR(dev, "error fencing pushbuf: %d\n", ret);
+		WIND_RING(chan);
+		goto out;
+	}
+
+out:
+	validate_fini(&op, fence);
+	nouveau_fence_unref((void**)&fence);
+	mutex_unlock(&dev->struct_mutex);
+	kfree(bo);
+
+out_next:
+	if (PUSHBUF_CAL) {
+		req->suffix0 = 0x00020000;
+		req->suffix1 = 0x00000000;
+	} else {
+		req->suffix0 = 0x20000000 |
+			      (chan->pushbuf_base + ((chan->dma.cur + 2) << 2));
+		req->suffix1 = 0x00000000;
+	}
+
+	return ret;
+}
+
+int
+nouveau_gem_ioctl_pushbuf_call2(struct drm_device *dev, void *data,
+				struct drm_file *file_priv)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct drm_nouveau_gem_pushbuf_call *req = data;
+
+	req->vram_available = dev_priv->fb_aper_free;
+	req->gart_available = dev_priv->gart_info.aper_free;
+
+	return nouveau_gem_ioctl_pushbuf_call(dev, data, file_priv);
+}
+
+static inline uint32_t
+domain_to_ttm(struct nouveau_bo *nvbo, uint32_t domain)
+{
+	uint32_t flags = 0;
+
+	if (domain & NOUVEAU_GEM_DOMAIN_VRAM)
+		flags |= TTM_PL_FLAG_VRAM;
+	if (domain & NOUVEAU_GEM_DOMAIN_GART)
+		flags |= TTM_PL_FLAG_TT;
+
+	return flags;
+}
+
+int
+nouveau_gem_ioctl_pin(struct drm_device *dev, void *data,
+		      struct drm_file *file_priv)
+{
+	struct drm_nouveau_gem_pin *req = data;
+	struct drm_gem_object *gem;
+	struct nouveau_bo *nvbo;
+	int ret = 0;
+
+	NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
+
+	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
+		NV_ERROR(dev, "pin only allowed without kernel modesetting\n");
+		return -EINVAL;
+	}
+
+	if (!DRM_SUSER(DRM_CURPROC))
+		return -EPERM;
+
+	gem = drm_gem_object_lookup(dev, file_priv, req->handle);
+	if (!gem)
+		return -EINVAL;
+	nvbo = nouveau_gem_object(gem);
+
+	ret = nouveau_bo_pin(nvbo, domain_to_ttm(nvbo, req->domain));
+	if (ret)
+		goto out;
+
+	req->offset = nvbo->bo.offset;
+	if (nvbo->bo.mem.mem_type == TTM_PL_TT)
+		req->domain = NOUVEAU_GEM_DOMAIN_GART;
+	else
+		req->domain = NOUVEAU_GEM_DOMAIN_VRAM;
+
+out:
+	mutex_lock(&dev->struct_mutex);
+	drm_gem_object_unreference(gem);
+	mutex_unlock(&dev->struct_mutex);
+
+	return ret;
+}
+
+int
+nouveau_gem_ioctl_unpin(struct drm_device *dev, void *data,
+			struct drm_file *file_priv)
+{
+	struct drm_nouveau_gem_pin *req = data;
+	struct drm_gem_object *gem;
+	int ret;
+
+	NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
+
+	if (drm_core_check_feature(dev, DRIVER_MODESET))
+		return -EINVAL;
+
+	gem = drm_gem_object_lookup(dev, file_priv, req->handle);
+	if (!gem)
+		return -EINVAL;
+
+	ret = nouveau_bo_unpin(nouveau_gem_object(gem));
+
+	mutex_lock(&dev->struct_mutex);
+	drm_gem_object_unreference(gem);
+	mutex_unlock(&dev->struct_mutex);
+
+	return ret;
+}
+
+int
+nouveau_gem_ioctl_cpu_prep(struct drm_device *dev, void *data,
+			   struct drm_file *file_priv)
+{
+	struct drm_nouveau_gem_cpu_prep *req = data;
+	struct drm_gem_object *gem;
+	struct nouveau_bo *nvbo;
+	bool no_wait = !!(req->flags & NOUVEAU_GEM_CPU_PREP_NOWAIT);
+	int ret = -EINVAL;
+
+	NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
+
+	gem = drm_gem_object_lookup(dev, file_priv, req->handle);
+	if (!gem)
+		return ret;
+	nvbo = nouveau_gem_object(gem);
+
+	if (nvbo->cpu_filp) {
+		if (nvbo->cpu_filp == file_priv)
+			goto out;
+
+		ret = ttm_bo_wait_cpu(&nvbo->bo, no_wait);
+		if (ret)
+			goto out;
+	}
+
+	if (req->flags & NOUVEAU_GEM_CPU_PREP_NOBLOCK) {
+		spin_lock(&nvbo->bo.lock);
+		ret = ttm_bo_wait(&nvbo->bo, false, false, no_wait);
+		spin_unlock(&nvbo->bo.lock);
+	} else {
+		ret = ttm_bo_synccpu_write_grab(&nvbo->bo, no_wait);
+		if (ret == 0)
+			nvbo->cpu_filp = file_priv;
+	}
+
+out:
+	mutex_lock(&dev->struct_mutex);
+	drm_gem_object_unreference(gem);
+	mutex_unlock(&dev->struct_mutex);
+	return ret;
+}
+
+int
+nouveau_gem_ioctl_cpu_fini(struct drm_device *dev, void *data,
+			   struct drm_file *file_priv)
+{
+	struct drm_nouveau_gem_cpu_prep *req = data;
+	struct drm_gem_object *gem;
+	struct nouveau_bo *nvbo;
+	int ret = -EINVAL;
+
+	NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
+
+	gem = drm_gem_object_lookup(dev, file_priv, req->handle);
+	if (!gem)
+		return ret;
+	nvbo = nouveau_gem_object(gem);
+
+	if (nvbo->cpu_filp != file_priv)
+		goto out;
+	nvbo->cpu_filp = NULL;
+
+	ttm_bo_synccpu_write_release(&nvbo->bo);
+	ret = 0;
+
+out:
+	mutex_lock(&dev->struct_mutex);
+	drm_gem_object_unreference(gem);
+	mutex_unlock(&dev->struct_mutex);
+	return ret;
+}
+
+int
+nouveau_gem_ioctl_info(struct drm_device *dev, void *data,
+		       struct drm_file *file_priv)
+{
+	struct drm_nouveau_gem_info *req = data;
+	struct drm_gem_object *gem;
+	int ret;
+
+	NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
+
+	gem = drm_gem_object_lookup(dev, file_priv, req->handle);
+	if (!gem)
+		return -EINVAL;
+
+	ret = nouveau_gem_info(gem, req);
+	mutex_lock(&dev->struct_mutex);
+	drm_gem_object_unreference(gem);
+	mutex_unlock(&dev->struct_mutex);
+	return ret;
+}
+
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv17_gpio.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv17_gpio.c
@@ -0,0 +1,92 @@
+/*
+ * Copyright (C) 2009 Francisco Jerez.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include "drmP.h"
+#include "nouveau_drv.h"
+#include "nouveau_hw.h"
+
+static bool
+get_gpio_location(struct dcb_gpio_entry *ent, uint32_t *reg, uint32_t *shift,
+		  uint32_t *mask)
+{
+	if (ent->line < 2) {
+		*reg = NV_PCRTC_GPIO;
+		*shift = ent->line * 16;
+		*mask = 0x11;
+
+	} else if (ent->line < 10) {
+		*reg = NV_PCRTC_GPIO_EXT;
+		*shift = (ent->line - 2) * 4;
+		*mask = 0x3;
+
+	} else if (ent->line < 14) {
+		*reg = NV_PCRTC_850;
+		*shift = (ent->line - 10) * 4;
+		*mask = 0x3;
+
+	} else {
+		return false;
+	}
+
+	return true;
+}
+
+int
+nv17_gpio_get(struct drm_device *dev, enum dcb_gpio_tag tag)
+{
+	struct dcb_gpio_entry *ent = nouveau_bios_gpio_entry(dev, tag);
+	uint32_t reg, shift, mask, value;
+
+	if (!ent)
+		return -ENODEV;
+
+	if (!get_gpio_location(ent, &reg, &shift, &mask))
+		return -ENODEV;
+
+	value = NVReadCRTC(dev, 0, reg) >> shift;
+
+	return (ent->invert ? 1 : 0) ^ (value & 1);
+}
+
+int
+nv17_gpio_set(struct drm_device *dev, enum dcb_gpio_tag tag, int state)
+{
+	struct dcb_gpio_entry *ent = nouveau_bios_gpio_entry(dev, tag);
+	uint32_t reg, shift, mask, value;
+
+	if (!ent)
+		return -ENODEV;
+
+	if (!get_gpio_location(ent, &reg, &shift, &mask))
+		return -ENODEV;
+
+	value = ((ent->invert ? 1 : 0) ^ (state ? 1 : 0)) << shift;
+	mask = ~(mask << shift);
+
+	NVWriteCRTC(dev, 0, reg, value | (NVReadCRTC(dev, 0, reg) & mask));
+
+	return 0;
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv50_instmem.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv50_instmem.c
@@ -0,0 +1,531 @@
+/*
+ * Copyright (C) 2007 Ben Skeggs.
+ *
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include "drmP.h"
+#include "drm.h"
+#include "nouveau_drv.h"
+
+struct nv50_instmem_priv {
+	uint32_t save1700[5]; /* 0x1700->0x1710 */
+
+	struct nouveau_gpuobj_ref *pramin_pt;
+	struct nouveau_gpuobj_ref *pramin_bar;
+	struct nouveau_gpuobj_ref *fb_bar;
+
+	bool last_access_wr;
+};
+
+#define NV50_INSTMEM_PAGE_SHIFT 12
+#define NV50_INSTMEM_PAGE_SIZE  (1 << NV50_INSTMEM_PAGE_SHIFT)
+#define NV50_INSTMEM_PT_SIZE(a)	(((a) >> 12) << 3)
+
+/*NOTE: - Assumes 0x1700 already covers the correct MiB of PRAMIN
+ */
+#define BAR0_WI32(g, o, v) do {                                   \
+	uint32_t offset;                                          \
+	if ((g)->im_backing) {                                    \
+		offset = (g)->im_backing_start;                   \
+	} else {                                                  \
+		offset  = chan->ramin->gpuobj->im_backing_start;  \
+		offset += (g)->im_pramin->start;                  \
+	}                                                         \
+	offset += (o);                                            \
+	nv_wr32(dev, NV_RAMIN + (offset & 0xfffff), (v));              \
+} while (0)
+
+int
+nv50_instmem_init(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_channel *chan;
+	uint32_t c_offset, c_size, c_ramfc, c_vmpd, c_base, pt_size;
+	struct nv50_instmem_priv *priv;
+	int ret, i;
+	uint32_t v, save_nv001700;
+
+	priv = kzalloc(sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+	dev_priv->engine.instmem.priv = priv;
+
+	/* Save state, will restore at takedown. */
+	for (i = 0x1700; i <= 0x1710; i += 4)
+		priv->save1700[(i-0x1700)/4] = nv_rd32(dev, i);
+
+	if (dev_priv->chipset == 0xaa || dev_priv->chipset == 0xac)
+		dev_priv->vram_sys_base = nv_rd32(dev, 0x100e10) << 12;
+	else
+		dev_priv->vram_sys_base = 0;
+
+	/* Reserve the last MiB of VRAM, we should probably try to avoid
+	 * setting up the below tables over the top of the VBIOS image at
+	 * some point.
+	 */
+	dev_priv->ramin_rsvd_vram = 1 << 20;
+	c_offset = nouveau_mem_fb_amount(dev) - dev_priv->ramin_rsvd_vram;
+	c_size   = 128 << 10;
+	c_vmpd   = ((dev_priv->chipset & 0xf0) == 0x50) ? 0x1400 : 0x200;
+	c_ramfc  = ((dev_priv->chipset & 0xf0) == 0x50) ? 0x0 : 0x20;
+	c_base   = c_vmpd + 0x4000;
+	pt_size  = NV50_INSTMEM_PT_SIZE(dev_priv->ramin_size);
+
+	NV_DEBUG(dev, " Rsvd VRAM base: 0x%08x\n", c_offset);
+	NV_DEBUG(dev, "    VBIOS image: 0x%08x\n",
+				(nv_rd32(dev, 0x619f04) & ~0xff) << 8);
+	NV_DEBUG(dev, "  Aperture size: %d MiB\n", dev_priv->ramin_size >> 20);
+	NV_DEBUG(dev, "        PT size: %d KiB\n", pt_size >> 10);
+
+	/* Determine VM layout, we need to do this first to make sure
+	 * we allocate enough memory for all the page tables.
+	 */
+	dev_priv->vm_gart_base = roundup(NV50_VM_BLOCK, NV50_VM_BLOCK);
+	dev_priv->vm_gart_size = NV50_VM_BLOCK;
+
+	dev_priv->vm_vram_base = dev_priv->vm_gart_base + dev_priv->vm_gart_size;
+	dev_priv->vm_vram_size = nouveau_mem_fb_amount(dev);
+	if (dev_priv->vm_vram_size > NV50_VM_MAX_VRAM)
+		dev_priv->vm_vram_size = NV50_VM_MAX_VRAM;
+	dev_priv->vm_vram_size = roundup(dev_priv->vm_vram_size, NV50_VM_BLOCK);
+	dev_priv->vm_vram_pt_nr = dev_priv->vm_vram_size / NV50_VM_BLOCK;
+
+	dev_priv->vm_end = dev_priv->vm_vram_base + dev_priv->vm_vram_size;
+
+	NV_DEBUG(dev, "NV50VM: GART 0x%016llx-0x%016llx\n",
+		 dev_priv->vm_gart_base,
+		 dev_priv->vm_gart_base + dev_priv->vm_gart_size - 1);
+	NV_DEBUG(dev, "NV50VM: VRAM 0x%016llx-0x%016llx\n",
+		 dev_priv->vm_vram_base,
+		 dev_priv->vm_vram_base + dev_priv->vm_vram_size - 1);
+
+	c_size += dev_priv->vm_vram_pt_nr * (NV50_VM_BLOCK / 65536 * 8);
+
+	/* Map BAR0 PRAMIN aperture over the memory we want to use */
+	save_nv001700 = nv_rd32(dev, NV50_PUNK_BAR0_PRAMIN);
+	nv_wr32(dev, NV50_PUNK_BAR0_PRAMIN, (c_offset >> 16));
+
+	/* Create a fake channel, and use it as our "dummy" channels 0/127.
+	 * The main reason for creating a channel is so we can use the gpuobj
+	 * code.  However, it's probably worth noting that NVIDIA also setup
+	 * their channels 0/127 with the same values they configure here.
+	 * So, there may be some other reason for doing this.
+	 *
+	 * Have to create the entire channel manually, as the real channel
+	 * creation code assumes we have PRAMIN access, and we don't until
+	 * we're done here.
+	 */
+	chan = kzalloc(sizeof(*chan), GFP_KERNEL);
+	if (!chan)
+		return -ENOMEM;
+	chan->id = 0;
+	chan->dev = dev;
+	chan->file_priv = (struct drm_file *)-2;
+	dev_priv->fifos[0] = dev_priv->fifos[127] = chan;
+
+	/* Channel's PRAMIN object + heap */
+	ret = nouveau_gpuobj_new_fake(dev, 0, c_offset, c_size, 0,
+							NULL, &chan->ramin);
+	if (ret)
+		return ret;
+
+	if (nouveau_mem_init_heap(&chan->ramin_heap, c_base, c_size - c_base))
+		return -ENOMEM;
+
+	/* RAMFC + zero channel's PRAMIN up to start of VM pagedir */
+	ret = nouveau_gpuobj_new_fake(dev, c_ramfc, c_offset + c_ramfc,
+						0x4000, 0, NULL, &chan->ramfc);
+	if (ret)
+		return ret;
+
+	for (i = 0; i < c_vmpd; i += 4)
+		BAR0_WI32(chan->ramin->gpuobj, i, 0);
+
+	/* VM page directory */
+	ret = nouveau_gpuobj_new_fake(dev, c_vmpd, c_offset + c_vmpd,
+					   0x4000, 0, &chan->vm_pd, NULL);
+	if (ret)
+		return ret;
+	for (i = 0; i < 0x4000; i += 8) {
+		BAR0_WI32(chan->vm_pd, i + 0x00, 0x00000000);
+		BAR0_WI32(chan->vm_pd, i + 0x04, 0x00000000);
+	}
+
+	/* PRAMIN page table, cheat and map into VM at 0x0000000000.
+	 * We map the entire fake channel into the start of the PRAMIN BAR
+	 */
+	ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, pt_size, 0x1000,
+				     0, &priv->pramin_pt);
+	if (ret)
+		return ret;
+
+	v = c_offset | 1;
+	if (dev_priv->vram_sys_base) {
+		v += dev_priv->vram_sys_base;
+		v |= 0x30;
+	}
+
+	i = 0;
+	while (v < dev_priv->vram_sys_base + c_offset + c_size) {
+		BAR0_WI32(priv->pramin_pt->gpuobj, i + 0, v);
+		BAR0_WI32(priv->pramin_pt->gpuobj, i + 4, 0x00000000);
+		v += 0x1000;
+		i += 8;
+	}
+
+	while (i < pt_size) {
+		BAR0_WI32(priv->pramin_pt->gpuobj, i + 0, 0x00000000);
+		BAR0_WI32(priv->pramin_pt->gpuobj, i + 4, 0x00000000);
+		i += 8;
+	}
+
+	BAR0_WI32(chan->vm_pd, 0x00, priv->pramin_pt->instance | 0x63);
+	BAR0_WI32(chan->vm_pd, 0x04, 0x00000000);
+
+	/* VRAM page table(s), mapped into VM at +1GiB  */
+	for (i = 0; i < dev_priv->vm_vram_pt_nr; i++) {
+		ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0,
+					     NV50_VM_BLOCK/65536*8, 0, 0,
+					     &chan->vm_vram_pt[i]);
+		if (ret) {
+			NV_ERROR(dev, "Error creating VRAM page tables: %d\n",
+									ret);
+			dev_priv->vm_vram_pt_nr = i;
+			return ret;
+		}
+		dev_priv->vm_vram_pt[i] = chan->vm_vram_pt[i]->gpuobj;
+
+		for (v = 0; v < dev_priv->vm_vram_pt[i]->im_pramin->size;
+								v += 4)
+			BAR0_WI32(dev_priv->vm_vram_pt[i], v, 0);
+
+		BAR0_WI32(chan->vm_pd, 0x10 + (i*8),
+			  chan->vm_vram_pt[i]->instance | 0x61);
+		BAR0_WI32(chan->vm_pd, 0x14 + (i*8), 0);
+	}
+
+	/* DMA object for PRAMIN BAR */
+	ret = nouveau_gpuobj_new_ref(dev, chan, chan, 0, 6*4, 16, 0,
+							&priv->pramin_bar);
+	if (ret)
+		return ret;
+	BAR0_WI32(priv->pramin_bar->gpuobj, 0x00, 0x7fc00000);
+	BAR0_WI32(priv->pramin_bar->gpuobj, 0x04, dev_priv->ramin_size - 1);
+	BAR0_WI32(priv->pramin_bar->gpuobj, 0x08, 0x00000000);
+	BAR0_WI32(priv->pramin_bar->gpuobj, 0x0c, 0x00000000);
+	BAR0_WI32(priv->pramin_bar->gpuobj, 0x10, 0x00000000);
+	BAR0_WI32(priv->pramin_bar->gpuobj, 0x14, 0x00000000);
+
+	/* DMA object for FB BAR */
+	ret = nouveau_gpuobj_new_ref(dev, chan, chan, 0, 6*4, 16, 0,
+							&priv->fb_bar);
+	if (ret)
+		return ret;
+	BAR0_WI32(priv->fb_bar->gpuobj, 0x00, 0x7fc00000);
+	BAR0_WI32(priv->fb_bar->gpuobj, 0x04, 0x40000000 +
+					      drm_get_resource_len(dev, 1) - 1);
+	BAR0_WI32(priv->fb_bar->gpuobj, 0x08, 0x40000000);
+	BAR0_WI32(priv->fb_bar->gpuobj, 0x0c, 0x00000000);
+	BAR0_WI32(priv->fb_bar->gpuobj, 0x10, 0x00000000);
+	BAR0_WI32(priv->fb_bar->gpuobj, 0x14, 0x00000000);
+
+	/* Poke the relevant regs, and pray it works :) */
+	nv_wr32(dev, NV50_PUNK_BAR_CFG_BASE, (chan->ramin->instance >> 12));
+	nv_wr32(dev, NV50_PUNK_UNK1710, 0);
+	nv_wr32(dev, NV50_PUNK_BAR_CFG_BASE, (chan->ramin->instance >> 12) |
+					 NV50_PUNK_BAR_CFG_BASE_VALID);
+	nv_wr32(dev, NV50_PUNK_BAR1_CTXDMA, (priv->fb_bar->instance >> 4) |
+					NV50_PUNK_BAR1_CTXDMA_VALID);
+	nv_wr32(dev, NV50_PUNK_BAR3_CTXDMA, (priv->pramin_bar->instance >> 4) |
+					NV50_PUNK_BAR3_CTXDMA_VALID);
+
+	for (i = 0; i < 8; i++)
+		nv_wr32(dev, 0x1900 + (i*4), 0);
+
+	/* Assume that praying isn't enough, check that we can re-read the
+	 * entire fake channel back from the PRAMIN BAR */
+	dev_priv->engine.instmem.prepare_access(dev, false);
+	for (i = 0; i < c_size; i += 4) {
+		if (nv_rd32(dev, NV_RAMIN + i) != nv_ri32(dev, i)) {
+			NV_ERROR(dev, "Error reading back PRAMIN at 0x%08x\n",
+									i);
+			dev_priv->engine.instmem.finish_access(dev);
+			return -EINVAL;
+		}
+	}
+	dev_priv->engine.instmem.finish_access(dev);
+
+	nv_wr32(dev, NV50_PUNK_BAR0_PRAMIN, save_nv001700);
+
+	/* Global PRAMIN heap */
+	if (nouveau_mem_init_heap(&dev_priv->ramin_heap,
+				  c_size, dev_priv->ramin_size - c_size)) {
+		dev_priv->ramin_heap = NULL;
+		NV_ERROR(dev, "Failed to init RAMIN heap\n");
+	}
+
+	/*XXX: incorrect, but needed to make hash func "work" */
+	dev_priv->ramht_offset = 0x10000;
+	dev_priv->ramht_bits   = 9;
+	dev_priv->ramht_size   = (1 << dev_priv->ramht_bits);
+	return 0;
+}
+
+void
+nv50_instmem_takedown(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nv50_instmem_priv *priv = dev_priv->engine.instmem.priv;
+	struct nouveau_channel *chan = dev_priv->fifos[0];
+	int i;
+
+	NV_DEBUG(dev, "\n");
+
+	if (!priv)
+		return;
+
+	/* Restore state from before init */
+	for (i = 0x1700; i <= 0x1710; i += 4)
+		nv_wr32(dev, i, priv->save1700[(i - 0x1700) / 4]);
+
+	nouveau_gpuobj_ref_del(dev, &priv->fb_bar);
+	nouveau_gpuobj_ref_del(dev, &priv->pramin_bar);
+	nouveau_gpuobj_ref_del(dev, &priv->pramin_pt);
+
+	/* Destroy dummy channel */
+	if (chan) {
+		for (i = 0; i < dev_priv->vm_vram_pt_nr; i++) {
+			nouveau_gpuobj_ref_del(dev, &chan->vm_vram_pt[i]);
+			dev_priv->vm_vram_pt[i] = NULL;
+		}
+		dev_priv->vm_vram_pt_nr = 0;
+
+		nouveau_gpuobj_del(dev, &chan->vm_pd);
+		nouveau_gpuobj_ref_del(dev, &chan->ramfc);
+		nouveau_gpuobj_ref_del(dev, &chan->ramin);
+		nouveau_mem_takedown(&chan->ramin_heap);
+
+		dev_priv->fifos[0] = dev_priv->fifos[127] = NULL;
+		kfree(chan);
+	}
+
+	dev_priv->engine.instmem.priv = NULL;
+	kfree(priv);
+}
+
+int
+nv50_instmem_suspend(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_channel *chan = dev_priv->fifos[0];
+	struct nouveau_gpuobj *ramin = chan->ramin->gpuobj;
+	int i;
+
+	ramin->im_backing_suspend = vmalloc(ramin->im_pramin->size);
+	if (!ramin->im_backing_suspend)
+		return -ENOMEM;
+
+	for (i = 0; i < ramin->im_pramin->size; i += 4)
+		ramin->im_backing_suspend[i/4] = nv_ri32(dev, i);
+	return 0;
+}
+
+void
+nv50_instmem_resume(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nv50_instmem_priv *priv = dev_priv->engine.instmem.priv;
+	struct nouveau_channel *chan = dev_priv->fifos[0];
+	struct nouveau_gpuobj *ramin = chan->ramin->gpuobj;
+	int i;
+
+	nv_wr32(dev, NV50_PUNK_BAR0_PRAMIN, (ramin->im_backing_start >> 16));
+	for (i = 0; i < ramin->im_pramin->size; i += 4)
+		BAR0_WI32(ramin, i, ramin->im_backing_suspend[i/4]);
+	vfree(ramin->im_backing_suspend);
+	ramin->im_backing_suspend = NULL;
+
+	/* Poke the relevant regs, and pray it works :) */
+	nv_wr32(dev, NV50_PUNK_BAR_CFG_BASE, (chan->ramin->instance >> 12));
+	nv_wr32(dev, NV50_PUNK_UNK1710, 0);
+	nv_wr32(dev, NV50_PUNK_BAR_CFG_BASE, (chan->ramin->instance >> 12) |
+					 NV50_PUNK_BAR_CFG_BASE_VALID);
+	nv_wr32(dev, NV50_PUNK_BAR1_CTXDMA, (priv->fb_bar->instance >> 4) |
+					NV50_PUNK_BAR1_CTXDMA_VALID);
+	nv_wr32(dev, NV50_PUNK_BAR3_CTXDMA, (priv->pramin_bar->instance >> 4) |
+					NV50_PUNK_BAR3_CTXDMA_VALID);
+
+	for (i = 0; i < 8; i++)
+		nv_wr32(dev, 0x1900 + (i*4), 0);
+}
+
+int
+nv50_instmem_populate(struct drm_device *dev, struct nouveau_gpuobj *gpuobj,
+		      uint32_t *sz)
+{
+	int ret;
+
+	if (gpuobj->im_backing)
+		return -EINVAL;
+
+	*sz = ALIGN(*sz, NV50_INSTMEM_PAGE_SIZE);
+	if (*sz == 0)
+		return -EINVAL;
+
+	ret = nouveau_bo_new(dev, NULL, *sz, 0, TTM_PL_FLAG_VRAM, 0, 0x0000,
+			     true, false, &gpuobj->im_backing);
+	if (ret) {
+		NV_ERROR(dev, "error getting PRAMIN backing pages: %d\n", ret);
+		return ret;
+	}
+
+	ret = nouveau_bo_pin(gpuobj->im_backing, TTM_PL_FLAG_VRAM);
+	if (ret) {
+		NV_ERROR(dev, "error pinning PRAMIN backing VRAM: %d\n", ret);
+		nouveau_bo_ref(NULL, &gpuobj->im_backing);
+		return ret;
+	}
+
+	gpuobj->im_backing_start = gpuobj->im_backing->bo.mem.mm_node->start;
+	gpuobj->im_backing_start <<= PAGE_SHIFT;
+
+	return 0;
+}
+
+void
+nv50_instmem_clear(struct drm_device *dev, struct nouveau_gpuobj *gpuobj)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+	if (gpuobj && gpuobj->im_backing) {
+		if (gpuobj->im_bound)
+			dev_priv->engine.instmem.unbind(dev, gpuobj);
+		nouveau_bo_unpin(gpuobj->im_backing);
+		nouveau_bo_ref(NULL, &gpuobj->im_backing);
+		gpuobj->im_backing = NULL;
+	}
+}
+
+int
+nv50_instmem_bind(struct drm_device *dev, struct nouveau_gpuobj *gpuobj)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nv50_instmem_priv *priv = dev_priv->engine.instmem.priv;
+	struct nouveau_gpuobj *pramin_pt = priv->pramin_pt->gpuobj;
+	uint32_t pte, pte_end;
+	uint64_t vram;
+
+	if (!gpuobj->im_backing || !gpuobj->im_pramin || gpuobj->im_bound)
+		return -EINVAL;
+
+	NV_DEBUG(dev, "st=0x%0llx sz=0x%0llx\n",
+		 gpuobj->im_pramin->start, gpuobj->im_pramin->size);
+
+	pte     = (gpuobj->im_pramin->start >> 12) << 1;
+	pte_end = ((gpuobj->im_pramin->size >> 12) << 1) + pte;
+	vram    = gpuobj->im_backing_start;
+
+	NV_DEBUG(dev, "pramin=0x%llx, pte=%d, pte_end=%d\n",
+		 gpuobj->im_pramin->start, pte, pte_end);
+	NV_DEBUG(dev, "first vram page: 0x%08x\n", gpuobj->im_backing_start);
+
+	vram |= 1;
+	if (dev_priv->vram_sys_base) {
+		vram += dev_priv->vram_sys_base;
+		vram |= 0x30;
+	}
+
+	dev_priv->engine.instmem.prepare_access(dev, true);
+	while (pte < pte_end) {
+		nv_wo32(dev, pramin_pt, pte++, lower_32_bits(vram));
+		nv_wo32(dev, pramin_pt, pte++, upper_32_bits(vram));
+		vram += NV50_INSTMEM_PAGE_SIZE;
+	}
+	dev_priv->engine.instmem.finish_access(dev);
+
+	nv_wr32(dev, 0x100c80, 0x00040001);
+	if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) {
+		NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (1)\n");
+		NV_ERROR(dev, "0x100c80 = 0x%08x\n", nv_rd32(dev, 0x100c80));
+		return -EBUSY;
+	}
+
+	nv_wr32(dev, 0x100c80, 0x00060001);
+	if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) {
+		NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n");
+		NV_ERROR(dev, "0x100c80 = 0x%08x\n", nv_rd32(dev, 0x100c80));
+		return -EBUSY;
+	}
+
+	gpuobj->im_bound = 1;
+	return 0;
+}
+
+int
+nv50_instmem_unbind(struct drm_device *dev, struct nouveau_gpuobj *gpuobj)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nv50_instmem_priv *priv = dev_priv->engine.instmem.priv;
+	uint32_t pte, pte_end;
+
+	if (gpuobj->im_bound == 0)
+		return -EINVAL;
+
+	pte     = (gpuobj->im_pramin->start >> 12) << 1;
+	pte_end = ((gpuobj->im_pramin->size >> 12) << 1) + pte;
+
+	dev_priv->engine.instmem.prepare_access(dev, true);
+	while (pte < pte_end) {
+		nv_wo32(dev, priv->pramin_pt->gpuobj, pte++, 0x00000000);
+		nv_wo32(dev, priv->pramin_pt->gpuobj, pte++, 0x00000000);
+	}
+	dev_priv->engine.instmem.finish_access(dev);
+
+	gpuobj->im_bound = 0;
+	return 0;
+}
+
+void
+nv50_instmem_prepare_access(struct drm_device *dev, bool write)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nv50_instmem_priv *priv = dev_priv->engine.instmem.priv;
+
+	priv->last_access_wr = write;
+}
+
+void
+nv50_instmem_finish_access(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nv50_instmem_priv *priv = dev_priv->engine.instmem.priv;
+
+	if (priv->last_access_wr) {
+		nv_wr32(dev, 0x070000, 0x00000001);
+		if (!nv_wait(0x070000, 0x00000001, 0x00000000))
+			NV_ERROR(dev, "PRAMIN flush timeout\n");
+	}
+}
+
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_bios.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_bios.h
@@ -0,0 +1,292 @@
+/*
+ * Copyright 2007-2008 Nouveau Project
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef __NOUVEAU_BIOS_H__
+#define __NOUVEAU_BIOS_H__
+
+#include "nvreg.h"
+#include "nouveau_i2c.h"
+
+#define DCB_MAX_NUM_ENTRIES 16
+#define DCB_MAX_NUM_I2C_ENTRIES 16
+#define DCB_MAX_NUM_GPIO_ENTRIES 32
+#define DCB_MAX_NUM_CONNECTOR_ENTRIES 16
+
+#define DCB_LOC_ON_CHIP 0
+
+struct dcb_entry {
+	int index;	/* may not be raw dcb index if merging has happened */
+	uint8_t type;
+	uint8_t i2c_index;
+	uint8_t heads;
+	uint8_t connector;
+	uint8_t bus;
+	uint8_t location;
+	uint8_t or;
+	bool duallink_possible;
+	union {
+		struct sor_conf {
+			int link;
+		} sorconf;
+		struct {
+			int maxfreq;
+		} crtconf;
+		struct {
+			struct sor_conf sor;
+			bool use_straps_for_mode;
+			bool use_power_scripts;
+		} lvdsconf;
+		struct {
+			bool has_component_output;
+		} tvconf;
+		struct {
+			struct sor_conf sor;
+			int link_nr;
+			int link_bw;
+		} dpconf;
+		struct {
+			struct sor_conf sor;
+		} tmdsconf;
+	};
+	bool i2c_upper_default;
+};
+
+struct dcb_i2c_entry {
+	uint8_t port_type;
+	uint8_t read, write;
+	struct nouveau_i2c_chan *chan;
+};
+
+struct parsed_dcb {
+	int entries;
+	struct dcb_entry entry[DCB_MAX_NUM_ENTRIES];
+	struct dcb_i2c_entry i2c[DCB_MAX_NUM_I2C_ENTRIES];
+};
+
+enum dcb_gpio_tag {
+	DCB_GPIO_TVDAC0 = 0xc,
+	DCB_GPIO_TVDAC1 = 0x2d,
+};
+
+struct dcb_gpio_entry {
+	enum dcb_gpio_tag tag;
+	int line;
+	bool invert;
+};
+
+struct parsed_dcb_gpio {
+	int entries;
+	struct dcb_gpio_entry entry[DCB_MAX_NUM_GPIO_ENTRIES];
+};
+
+struct dcb_connector_table_entry {
+	uint32_t entry;
+	uint8_t type;
+	uint8_t index;
+	uint8_t gpio_tag;
+};
+
+struct dcb_connector_table {
+	int entries;
+	struct dcb_connector_table_entry entry[DCB_MAX_NUM_CONNECTOR_ENTRIES];
+};
+
+struct bios_parsed_dcb {
+	uint8_t version;
+
+	struct parsed_dcb dcb;
+
+	uint8_t *i2c_table;
+	uint8_t i2c_default_indices;
+
+	uint16_t gpio_table_ptr;
+	struct parsed_dcb_gpio gpio;
+	uint16_t connector_table_ptr;
+	struct dcb_connector_table connector;
+};
+
+enum nouveau_encoder_type {
+	OUTPUT_ANALOG = 0,
+	OUTPUT_TV = 1,
+	OUTPUT_TMDS = 2,
+	OUTPUT_LVDS = 3,
+	OUTPUT_DP = 6,
+	OUTPUT_ANY = -1
+};
+
+enum nouveau_or {
+	OUTPUT_A = (1 << 0),
+	OUTPUT_B = (1 << 1),
+	OUTPUT_C = (1 << 2)
+};
+
+enum LVDS_script {
+	/* Order *does* matter here */
+	LVDS_INIT = 1,
+	LVDS_RESET,
+	LVDS_BACKLIGHT_ON,
+	LVDS_BACKLIGHT_OFF,
+	LVDS_PANEL_ON,
+	LVDS_PANEL_OFF
+};
+
+/* changing these requires matching changes to reg tables in nv_get_clock */
+#define MAX_PLL_TYPES	4
+enum pll_types {
+	NVPLL,
+	MPLL,
+	VPLL1,
+	VPLL2
+};
+
+struct pll_lims {
+	struct {
+		int minfreq;
+		int maxfreq;
+		int min_inputfreq;
+		int max_inputfreq;
+
+		uint8_t min_m;
+		uint8_t max_m;
+		uint8_t min_n;
+		uint8_t max_n;
+	} vco1, vco2;
+
+	uint8_t max_log2p;
+	/*
+	 * for most pre nv50 cards setting a log2P of 7 (the common max_log2p
+	 * value) is no different to 6 (at least for vplls) so allowing the MNP
+	 * calc to use 7 causes the generated clock to be out by a factor of 2.
+	 * however, max_log2p cannot be fixed-up during parsing as the
+	 * unmodified max_log2p value is still needed for setting mplls, hence
+	 * an additional max_usable_log2p member
+	 */
+	uint8_t max_usable_log2p;
+	uint8_t log2p_bias;
+
+	uint8_t min_p;
+	uint8_t max_p;
+
+	int refclk;
+};
+
+struct nouveau_bios_info {
+	struct parsed_dcb *dcb;
+
+	uint8_t chip_version;
+
+	uint32_t dactestval;
+	uint32_t tvdactestval;
+	uint8_t digital_min_front_porch;
+	bool fp_no_ddc;
+};
+
+struct nvbios {
+	struct drm_device *dev;
+	struct nouveau_bios_info pub;
+
+	struct mutex lock;
+
+	uint8_t data[NV_PROM_SIZE];
+	unsigned int length;
+	bool execute;
+
+	uint8_t major_version;
+	uint8_t feature_byte;
+	bool is_mobile;
+
+	uint32_t fmaxvco, fminvco;
+
+	bool old_style_init;
+	uint16_t init_script_tbls_ptr;
+	uint16_t extra_init_script_tbl_ptr;
+	uint16_t macro_index_tbl_ptr;
+	uint16_t macro_tbl_ptr;
+	uint16_t condition_tbl_ptr;
+	uint16_t io_condition_tbl_ptr;
+	uint16_t io_flag_condition_tbl_ptr;
+	uint16_t init_function_tbl_ptr;
+
+	uint16_t pll_limit_tbl_ptr;
+	uint16_t ram_restrict_tbl_ptr;
+	uint8_t ram_restrict_group_count;
+
+	uint16_t some_script_ptr; /* BIT I + 14 */
+	uint16_t init96_tbl_ptr; /* BIT I + 16 */
+
+	struct bios_parsed_dcb bdcb;
+
+	struct {
+		int crtchead;
+		/* these need remembering across suspend */
+		uint32_t saved_nv_pfb_cfg0;
+	} state;
+
+	struct {
+		struct dcb_entry *output;
+		uint16_t script_table_ptr;
+		uint16_t dp_table_ptr;
+	} display;
+
+	struct {
+		uint16_t fptablepointer;	/* also used by tmds */
+		uint16_t fpxlatetableptr;
+		int xlatwidth;
+		uint16_t lvdsmanufacturerpointer;
+		uint16_t fpxlatemanufacturertableptr;
+		uint16_t mode_ptr;
+		uint16_t xlated_entry;
+		bool power_off_for_reset;
+		bool reset_after_pclk_change;
+		bool dual_link;
+		bool link_c_increment;
+		bool BITbit1;
+		bool if_is_24bit;
+		int duallink_transition_clk;
+		uint8_t strapless_is_24bit;
+		uint8_t *edid;
+
+		/* will need resetting after suspend */
+		int last_script_invoc;
+		bool lvds_init_run;
+	} fp;
+
+	struct {
+		uint16_t output0_script_ptr;
+		uint16_t output1_script_ptr;
+	} tmds;
+
+	struct {
+		uint16_t mem_init_tbl_ptr;
+		uint16_t sdr_seq_tbl_ptr;
+		uint16_t ddr_seq_tbl_ptr;
+
+		struct {
+			uint8_t crt, tv, panel;
+		} i2c_indices;
+
+		uint16_t lvds_single_a_script_ptr;
+	} legacy;
+};
+
+#endif
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_hw.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_hw.c
@@ -0,0 +1,1080 @@
+/*
+ * Copyright 2006 Dave Airlie
+ * Copyright 2007 Maarten Maathuis
+ * Copyright 2007-2009 Stuart Bennett
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include "drmP.h"
+#include "nouveau_drv.h"
+#include "nouveau_hw.h"
+
+#define CHIPSET_NFORCE 0x01a0
+#define CHIPSET_NFORCE2 0x01f0
+
+/*
+ * misc hw access wrappers/control functions
+ */
+
+void
+NVWriteVgaSeq(struct drm_device *dev, int head, uint8_t index, uint8_t value)
+{
+	NVWritePRMVIO(dev, head, NV_PRMVIO_SRX, index);
+	NVWritePRMVIO(dev, head, NV_PRMVIO_SR, value);
+}
+
+uint8_t
+NVReadVgaSeq(struct drm_device *dev, int head, uint8_t index)
+{
+	NVWritePRMVIO(dev, head, NV_PRMVIO_SRX, index);
+	return NVReadPRMVIO(dev, head, NV_PRMVIO_SR);
+}
+
+void
+NVWriteVgaGr(struct drm_device *dev, int head, uint8_t index, uint8_t value)
+{
+	NVWritePRMVIO(dev, head, NV_PRMVIO_GRX, index);
+	NVWritePRMVIO(dev, head, NV_PRMVIO_GX, value);
+}
+
+uint8_t
+NVReadVgaGr(struct drm_device *dev, int head, uint8_t index)
+{
+	NVWritePRMVIO(dev, head, NV_PRMVIO_GRX, index);
+	return NVReadPRMVIO(dev, head, NV_PRMVIO_GX);
+}
+
+/* CR44 takes values 0 (head A), 3 (head B) and 4 (heads tied)
+ * it affects only the 8 bit vga io regs, which we access using mmio at
+ * 0xc{0,2}3c*, 0x60{1,3}3*, and 0x68{1,3}3d*
+ * in general, the set value of cr44 does not matter: reg access works as
+ * expected and values can be set for the appropriate head by using a 0x2000
+ * offset as required
+ * however:
+ * a) pre nv40, the head B range of PRMVIO regs at 0xc23c* was not exposed and
+ *    cr44 must be set to 0 or 3 for accessing values on the correct head
+ *    through the common 0xc03c* addresses
+ * b) in tied mode (4) head B is programmed to the values set on head A, and
+ *    access using the head B addresses can have strange results, ergo we leave
+ *    tied mode in init once we know to what cr44 should be restored on exit
+ *
+ * the owner parameter is slightly abused:
+ * 0 and 1 are treated as head values and so the set value is (owner * 3)
+ * other values are treated as literal values to set
+ */
+void
+NVSetOwner(struct drm_device *dev, int owner)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+	if (owner == 1)
+		owner *= 3;
+
+	if (dev_priv->chipset == 0x11) {
+		/* This might seem stupid, but the blob does it and
+		 * omitting it often locks the system up.
+		 */
+		NVReadVgaCrtc(dev, 0, NV_CIO_SR_LOCK_INDEX);
+		NVReadVgaCrtc(dev, 1, NV_CIO_SR_LOCK_INDEX);
+	}
+
+	/* CR44 is always changed on CRTC0 */
+	NVWriteVgaCrtc(dev, 0, NV_CIO_CRE_44, owner);
+
+	if (dev_priv->chipset == 0x11) {	/* set me harder */
+		NVWriteVgaCrtc(dev, 0, NV_CIO_CRE_2E, owner);
+		NVWriteVgaCrtc(dev, 0, NV_CIO_CRE_2E, owner);
+	}
+}
+
+void
+NVBlankScreen(struct drm_device *dev, int head, bool blank)
+{
+	unsigned char seq1;
+
+	if (nv_two_heads(dev))
+		NVSetOwner(dev, head);
+
+	seq1 = NVReadVgaSeq(dev, head, NV_VIO_SR_CLOCK_INDEX);
+
+	NVVgaSeqReset(dev, head, true);
+	if (blank)
+		NVWriteVgaSeq(dev, head, NV_VIO_SR_CLOCK_INDEX, seq1 | 0x20);
+	else
+		NVWriteVgaSeq(dev, head, NV_VIO_SR_CLOCK_INDEX, seq1 & ~0x20);
+	NVVgaSeqReset(dev, head, false);
+}
+
+/*
+ * PLL setting
+ */
+
+static int
+powerctrl_1_shift(int chip_version, int reg)
+{
+	int shift = -4;
+
+	if (chip_version < 0x17 || chip_version == 0x1a || chip_version == 0x20)
+		return shift;
+
+	switch (reg) {
+	case NV_RAMDAC_VPLL2:
+		shift += 4;
+	case NV_PRAMDAC_VPLL_COEFF:
+		shift += 4;
+	case NV_PRAMDAC_MPLL_COEFF:
+		shift += 4;
+	case NV_PRAMDAC_NVPLL_COEFF:
+		shift += 4;
+	}
+
+	/*
+	 * the shift for vpll regs is only used for nv3x chips with a single
+	 * stage pll
+	 */
+	if (shift > 4 && (chip_version < 0x32 || chip_version == 0x35 ||
+			  chip_version == 0x36 || chip_version >= 0x40))
+		shift = -4;
+
+	return shift;
+}
+
+static void
+setPLL_single(struct drm_device *dev, uint32_t reg, struct nouveau_pll_vals *pv)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	int chip_version = dev_priv->vbios->chip_version;
+	uint32_t oldpll = NVReadRAMDAC(dev, 0, reg);
+	int oldN = (oldpll >> 8) & 0xff, oldM = oldpll & 0xff;
+	uint32_t pll = (oldpll & 0xfff80000) | pv->log2P << 16 | pv->NM1;
+	uint32_t saved_powerctrl_1 = 0;
+	int shift_powerctrl_1 = powerctrl_1_shift(chip_version, reg);
+
+	if (oldpll == pll)
+		return;	/* already set */
+
+	if (shift_powerctrl_1 >= 0) {
+		saved_powerctrl_1 = nvReadMC(dev, NV_PBUS_POWERCTRL_1);
+		nvWriteMC(dev, NV_PBUS_POWERCTRL_1,
+			(saved_powerctrl_1 & ~(0xf << shift_powerctrl_1)) |
+			1 << shift_powerctrl_1);
+	}
+
+	if (oldM && pv->M1 && (oldN / oldM < pv->N1 / pv->M1))
+		/* upclock -- write new post divider first */
+		NVWriteRAMDAC(dev, 0, reg, pv->log2P << 16 | (oldpll & 0xffff));
+	else
+		/* downclock -- write new NM first */
+		NVWriteRAMDAC(dev, 0, reg, (oldpll & 0xffff0000) | pv->NM1);
+
+	if (chip_version < 0x17 && chip_version != 0x11)
+		/* wait a bit on older chips */
+		msleep(64);
+	NVReadRAMDAC(dev, 0, reg);
+
+	/* then write the other half as well */
+	NVWriteRAMDAC(dev, 0, reg, pll);
+
+	if (shift_powerctrl_1 >= 0)
+		nvWriteMC(dev, NV_PBUS_POWERCTRL_1, saved_powerctrl_1);
+}
+
+static uint32_t
+new_ramdac580(uint32_t reg1, bool ss, uint32_t ramdac580)
+{
+	bool head_a = (reg1 == NV_PRAMDAC_VPLL_COEFF);
+
+	if (ss)	/* single stage pll mode */
+		ramdac580 |= head_a ? NV_RAMDAC_580_VPLL1_ACTIVE :
+				      NV_RAMDAC_580_VPLL2_ACTIVE;
+	else
+		ramdac580 &= head_a ? ~NV_RAMDAC_580_VPLL1_ACTIVE :
+				      ~NV_RAMDAC_580_VPLL2_ACTIVE;
+
+	return ramdac580;
+}
+
+static void
+setPLL_double_highregs(struct drm_device *dev, uint32_t reg1,
+		       struct nouveau_pll_vals *pv)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	int chip_version = dev_priv->vbios->chip_version;
+	bool nv3035 = chip_version == 0x30 || chip_version == 0x35;
+	uint32_t reg2 = reg1 + ((reg1 == NV_RAMDAC_VPLL2) ? 0x5c : 0x70);
+	uint32_t oldpll1 = NVReadRAMDAC(dev, 0, reg1);
+	uint32_t oldpll2 = !nv3035 ? NVReadRAMDAC(dev, 0, reg2) : 0;
+	uint32_t pll1 = (oldpll1 & 0xfff80000) | pv->log2P << 16 | pv->NM1;
+	uint32_t pll2 = (oldpll2 & 0x7fff0000) | 1 << 31 | pv->NM2;
+	uint32_t oldramdac580 = 0, ramdac580 = 0;
+	bool single_stage = !pv->NM2 || pv->N2 == pv->M2;	/* nv41+ only */
+	uint32_t saved_powerctrl_1 = 0, savedc040 = 0;
+	int shift_powerctrl_1 = powerctrl_1_shift(chip_version, reg1);
+
+	/* model specific additions to generic pll1 and pll2 set up above */
+	if (nv3035) {
+		pll1 = (pll1 & 0xfcc7ffff) | (pv->N2 & 0x18) << 21 |
+		       (pv->N2 & 0x7) << 19 | 8 << 4 | (pv->M2 & 7) << 4;
+		pll2 = 0;
+	}
+	if (chip_version > 0x40 && reg1 >= NV_PRAMDAC_VPLL_COEFF) { /* !nv40 */
+		oldramdac580 = NVReadRAMDAC(dev, 0, NV_PRAMDAC_580);
+		ramdac580 = new_ramdac580(reg1, single_stage, oldramdac580);
+		if (oldramdac580 != ramdac580)
+			oldpll1 = ~0;	/* force mismatch */
+		if (single_stage)
+			/* magic value used by nvidia in single stage mode */
+			pll2 |= 0x011f;
+	}
+	if (chip_version > 0x70)
+		/* magic bits set by the blob (but not the bios) on g71-73 */
+		pll1 = (pll1 & 0x7fffffff) | (single_stage ? 0x4 : 0xc) << 28;
+
+	if (oldpll1 == pll1 && oldpll2 == pll2)
+		return;	/* already set */
+
+	if (shift_powerctrl_1 >= 0) {
+		saved_powerctrl_1 = nvReadMC(dev, NV_PBUS_POWERCTRL_1);
+		nvWriteMC(dev, NV_PBUS_POWERCTRL_1,
+			(saved_powerctrl_1 & ~(0xf << shift_powerctrl_1)) |
+			1 << shift_powerctrl_1);
+	}
+
+	if (chip_version >= 0x40) {
+		int shift_c040 = 14;
+
+		switch (reg1) {
+		case NV_PRAMDAC_MPLL_COEFF:
+			shift_c040 += 2;
+		case NV_PRAMDAC_NVPLL_COEFF:
+			shift_c040 += 2;
+		case NV_RAMDAC_VPLL2:
+			shift_c040 += 2;
+		case NV_PRAMDAC_VPLL_COEFF:
+			shift_c040 += 2;
+		}
+
+		savedc040 = nvReadMC(dev, 0xc040);
+		if (shift_c040 != 14)
+			nvWriteMC(dev, 0xc040, savedc040 & ~(3 << shift_c040));
+	}
+
+	if (oldramdac580 != ramdac580)
+		NVWriteRAMDAC(dev, 0, NV_PRAMDAC_580, ramdac580);
+
+	if (!nv3035)
+		NVWriteRAMDAC(dev, 0, reg2, pll2);
+	NVWriteRAMDAC(dev, 0, reg1, pll1);
+
+	if (shift_powerctrl_1 >= 0)
+		nvWriteMC(dev, NV_PBUS_POWERCTRL_1, saved_powerctrl_1);
+	if (chip_version >= 0x40)
+		nvWriteMC(dev, 0xc040, savedc040);
+}
+
+static void
+setPLL_double_lowregs(struct drm_device *dev, uint32_t NMNMreg,
+		      struct nouveau_pll_vals *pv)
+{
+	/* When setting PLLs, there is a merry game of disabling and enabling
+	 * various bits of hardware during the process. This function is a
+	 * synthesis of six nv4x traces, nearly each card doing a subtly
+	 * different thing. With luck all the necessary bits for each card are
+	 * combined herein. Without luck it deviates from each card's formula
+	 * so as to not work on any :)
+	 */
+
+	uint32_t Preg = NMNMreg - 4;
+	bool mpll = Preg == 0x4020;
+	uint32_t oldPval = nvReadMC(dev, Preg);
+	uint32_t NMNM = pv->NM2 << 16 | pv->NM1;
+	uint32_t Pval = (oldPval & (mpll ? ~(0x11 << 16) : ~(1 << 16))) |
+			0xc << 28 | pv->log2P << 16;
+	uint32_t saved4600 = 0;
+	/* some cards have different maskc040s */
+	uint32_t maskc040 = ~(3 << 14), savedc040;
+	bool single_stage = !pv->NM2 || pv->N2 == pv->M2;
+
+	if (nvReadMC(dev, NMNMreg) == NMNM && (oldPval & 0xc0070000) == Pval)
+		return;
+
+	if (Preg == 0x4000)
+		maskc040 = ~0x333;
+	if (Preg == 0x4058)
+		maskc040 = ~(0xc << 24);
+
+	if (mpll) {
+		struct pll_lims pll_lim;
+		uint8_t Pval2;
+
+		if (get_pll_limits(dev, Preg, &pll_lim))
+			return;
+
+		Pval2 = pv->log2P + pll_lim.log2p_bias;
+		if (Pval2 > pll_lim.max_log2p)
+			Pval2 = pll_lim.max_log2p;
+		Pval |= 1 << 28 | Pval2 << 20;
+
+		saved4600 = nvReadMC(dev, 0x4600);
+		nvWriteMC(dev, 0x4600, saved4600 | 8 << 28);
+	}
+	if (single_stage)
+		Pval |= mpll ? 1 << 12 : 1 << 8;
+
+	nvWriteMC(dev, Preg, oldPval | 1 << 28);
+	nvWriteMC(dev, Preg, Pval & ~(4 << 28));
+	if (mpll) {
+		Pval |= 8 << 20;
+		nvWriteMC(dev, 0x4020, Pval & ~(0xc << 28));
+		nvWriteMC(dev, 0x4038, Pval & ~(0xc << 28));
+	}
+
+	savedc040 = nvReadMC(dev, 0xc040);
+	nvWriteMC(dev, 0xc040, savedc040 & maskc040);
+
+	nvWriteMC(dev, NMNMreg, NMNM);
+	if (NMNMreg == 0x4024)
+		nvWriteMC(dev, 0x403c, NMNM);
+
+	nvWriteMC(dev, Preg, Pval);
+	if (mpll) {
+		Pval &= ~(8 << 20);
+		nvWriteMC(dev, 0x4020, Pval);
+		nvWriteMC(dev, 0x4038, Pval);
+		nvWriteMC(dev, 0x4600, saved4600);
+	}
+
+	nvWriteMC(dev, 0xc040, savedc040);
+
+	if (mpll) {
+		nvWriteMC(dev, 0x4020, Pval & ~(1 << 28));
+		nvWriteMC(dev, 0x4038, Pval & ~(1 << 28));
+	}
+}
+
+void
+nouveau_hw_setpll(struct drm_device *dev, uint32_t reg1,
+		  struct nouveau_pll_vals *pv)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	int cv = dev_priv->vbios->chip_version;
+
+	if (cv == 0x30 || cv == 0x31 || cv == 0x35 || cv == 0x36 ||
+	    cv >= 0x40) {
+		if (reg1 > 0x405c)
+			setPLL_double_highregs(dev, reg1, pv);
+		else
+			setPLL_double_lowregs(dev, reg1, pv);
+	} else
+		setPLL_single(dev, reg1, pv);
+}
+
+/*
+ * PLL getting
+ */
+
+static void
+nouveau_hw_decode_pll(struct drm_device *dev, uint32_t reg1, uint32_t pll1,
+		      uint32_t pll2, struct nouveau_pll_vals *pllvals)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+	/* to force parsing as single stage (i.e. nv40 vplls) pass pll2 as 0 */
+
+	/* log2P is & 0x7 as never more than 7, and nv30/35 only uses 3 bits */
+	pllvals->log2P = (pll1 >> 16) & 0x7;
+	pllvals->N2 = pllvals->M2 = 1;
+
+	if (reg1 <= 0x405c) {
+		pllvals->NM1 = pll2 & 0xffff;
+		/* single stage NVPLL and VPLLs use 1 << 8, MPLL uses 1 << 12 */
+		if (!(pll1 & 0x1100))
+			pllvals->NM2 = pll2 >> 16;
+	} else {
+		pllvals->NM1 = pll1 & 0xffff;
+		if (nv_two_reg_pll(dev) && pll2 & NV31_RAMDAC_ENABLE_VCO2)
+			pllvals->NM2 = pll2 & 0xffff;
+		else if (dev_priv->chipset == 0x30 || dev_priv->chipset == 0x35) {
+			pllvals->M1 &= 0xf; /* only 4 bits */
+			if (pll1 & NV30_RAMDAC_ENABLE_VCO2) {
+				pllvals->M2 = (pll1 >> 4) & 0x7;
+				pllvals->N2 = ((pll1 >> 21) & 0x18) |
+					      ((pll1 >> 19) & 0x7);
+			}
+		}
+	}
+}
+
+int
+nouveau_hw_get_pllvals(struct drm_device *dev, enum pll_types plltype,
+		       struct nouveau_pll_vals *pllvals)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	const uint32_t nv04_regs[MAX_PLL_TYPES] = { NV_PRAMDAC_NVPLL_COEFF,
+						    NV_PRAMDAC_MPLL_COEFF,
+						    NV_PRAMDAC_VPLL_COEFF,
+						    NV_RAMDAC_VPLL2 };
+	const uint32_t nv40_regs[MAX_PLL_TYPES] = { 0x4000,
+						    0x4020,
+						    NV_PRAMDAC_VPLL_COEFF,
+						    NV_RAMDAC_VPLL2 };
+	uint32_t reg1, pll1, pll2 = 0;
+	struct pll_lims pll_lim;
+	int ret;
+
+	if (dev_priv->card_type < NV_40)
+		reg1 = nv04_regs[plltype];
+	else
+		reg1 = nv40_regs[plltype];
+
+	pll1 = nvReadMC(dev, reg1);
+
+	if (reg1 <= 0x405c)
+		pll2 = nvReadMC(dev, reg1 + 4);
+	else if (nv_two_reg_pll(dev)) {
+		uint32_t reg2 = reg1 + (reg1 == NV_RAMDAC_VPLL2 ? 0x5c : 0x70);
+
+		pll2 = nvReadMC(dev, reg2);
+	}
+
+	if (dev_priv->card_type == 0x40 && reg1 >= NV_PRAMDAC_VPLL_COEFF) {
+		uint32_t ramdac580 = NVReadRAMDAC(dev, 0, NV_PRAMDAC_580);
+
+		/* check whether vpll has been forced into single stage mode */
+		if (reg1 == NV_PRAMDAC_VPLL_COEFF) {
+			if (ramdac580 & NV_RAMDAC_580_VPLL1_ACTIVE)
+				pll2 = 0;
+		} else
+			if (ramdac580 & NV_RAMDAC_580_VPLL2_ACTIVE)
+				pll2 = 0;
+	}
+
+	nouveau_hw_decode_pll(dev, reg1, pll1, pll2, pllvals);
+
+	ret = get_pll_limits(dev, plltype, &pll_lim);
+	if (ret)
+		return ret;
+
+	pllvals->refclk = pll_lim.refclk;
+
+	return 0;
+}
+
+int
+nouveau_hw_pllvals_to_clk(struct nouveau_pll_vals *pv)
+{
+	/* Avoid divide by zero if called at an inappropriate time */
+	if (!pv->M1 || !pv->M2)
+		return 0;
+
+	return pv->N1 * pv->N2 * pv->refclk / (pv->M1 * pv->M2) >> pv->log2P;
+}
+
+int
+nouveau_hw_get_clock(struct drm_device *dev, enum pll_types plltype)
+{
+	struct nouveau_pll_vals pllvals;
+
+	if (plltype == MPLL && (dev->pci_device & 0x0ff0) == CHIPSET_NFORCE) {
+		uint32_t mpllP;
+
+		pci_read_config_dword(pci_get_bus_and_slot(0, 3), 0x6c, &mpllP);
+		if (!mpllP)
+			mpllP = 4;
+
+		return 400000 / mpllP;
+	} else
+	if (plltype == MPLL && (dev->pci_device & 0xff0) == CHIPSET_NFORCE2) {
+		uint32_t clock;
+
+		pci_read_config_dword(pci_get_bus_and_slot(0, 5), 0x4c, &clock);
+		return clock;
+	}
+
+	nouveau_hw_get_pllvals(dev, plltype, &pllvals);
+
+	return nouveau_hw_pllvals_to_clk(&pllvals);
+}
+
+static void
+nouveau_hw_fix_bad_vpll(struct drm_device *dev, int head)
+{
+	/* the vpll on an unused head can come up with a random value, way
+	 * beyond the pll limits.  for some reason this causes the chip to
+	 * lock up when reading the dac palette regs, so set a valid pll here
+	 * when such a condition detected.  only seen on nv11 to date
+	 */
+
+	struct pll_lims pll_lim;
+	struct nouveau_pll_vals pv;
+	uint32_t pllreg = head ? NV_RAMDAC_VPLL2 : NV_PRAMDAC_VPLL_COEFF;
+
+	if (get_pll_limits(dev, head ? VPLL2 : VPLL1, &pll_lim))
+		return;
+	nouveau_hw_get_pllvals(dev, head ? VPLL2 : VPLL1, &pv);
+
+	if (pv.M1 >= pll_lim.vco1.min_m && pv.M1 <= pll_lim.vco1.max_m &&
+	    pv.N1 >= pll_lim.vco1.min_n && pv.N1 <= pll_lim.vco1.max_n &&
+	    pv.log2P <= pll_lim.max_log2p)
+		return;
+
+	NV_WARN(dev, "VPLL %d outwith limits, attempting to fix\n", head + 1);
+
+	/* set lowest clock within static limits */
+	pv.M1 = pll_lim.vco1.max_m;
+	pv.N1 = pll_lim.vco1.min_n;
+	pv.log2P = pll_lim.max_usable_log2p;
+	nouveau_hw_setpll(dev, pllreg, &pv);
+}
+
+/*
+ * vga font save/restore
+ */
+
+static void nouveau_vga_font_io(struct drm_device *dev,
+				void __iomem *iovram,
+				bool save, unsigned plane)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	unsigned i;
+
+	NVWriteVgaSeq(dev, 0, NV_VIO_SR_PLANE_MASK_INDEX, 1 << plane);
+	NVWriteVgaGr(dev, 0, NV_VIO_GX_READ_MAP_INDEX, plane);
+	for (i = 0; i < 16384; i++) {
+		if (save) {
+			dev_priv->saved_vga_font[plane][i] =
+					ioread32_native(iovram + i * 4);
+		} else {
+			iowrite32_native(dev_priv->saved_vga_font[plane][i],
+							iovram + i * 4);
+		}
+	}
+}
+
+void
+nouveau_hw_save_vga_fonts(struct drm_device *dev, bool save)
+{
+	uint8_t misc, gr4, gr5, gr6, seq2, seq4;
+	bool graphicsmode;
+	unsigned plane;
+	void __iomem *iovram;
+
+	if (nv_two_heads(dev))
+		NVSetOwner(dev, 0);
+
+	NVSetEnablePalette(dev, 0, true);
+	graphicsmode = NVReadVgaAttr(dev, 0, NV_CIO_AR_MODE_INDEX) & 1;
+	NVSetEnablePalette(dev, 0, false);
+
+	if (graphicsmode) /* graphics mode => framebuffer => no need to save */
+		return;
+
+	NV_INFO(dev, "%sing VGA fonts\n", save ? "Sav" : "Restor");
+
+	/* map first 64KiB of VRAM, holds VGA fonts etc */
+	iovram = ioremap(pci_resource_start(dev->pdev, 1), 65536);
+	if (!iovram) {
+		NV_ERROR(dev, "Failed to map VRAM, "
+					"cannot save/restore VGA fonts.\n");
+		return;
+	}
+
+	if (nv_two_heads(dev))
+		NVBlankScreen(dev, 1, true);
+	NVBlankScreen(dev, 0, true);
+
+	/* save control regs */
+	misc = NVReadPRMVIO(dev, 0, NV_PRMVIO_MISC__READ);
+	seq2 = NVReadVgaSeq(dev, 0, NV_VIO_SR_PLANE_MASK_INDEX);
+	seq4 = NVReadVgaSeq(dev, 0, NV_VIO_SR_MEM_MODE_INDEX);
+	gr4 = NVReadVgaGr(dev, 0, NV_VIO_GX_READ_MAP_INDEX);
+	gr5 = NVReadVgaGr(dev, 0, NV_VIO_GX_MODE_INDEX);
+	gr6 = NVReadVgaGr(dev, 0, NV_VIO_GX_MISC_INDEX);
+
+	NVWritePRMVIO(dev, 0, NV_PRMVIO_MISC__WRITE, 0x67);
+	NVWriteVgaSeq(dev, 0, NV_VIO_SR_MEM_MODE_INDEX, 0x6);
+	NVWriteVgaGr(dev, 0, NV_VIO_GX_MODE_INDEX, 0x0);
+	NVWriteVgaGr(dev, 0, NV_VIO_GX_MISC_INDEX, 0x5);
+
+	/* store font in planes 0..3 */
+	for (plane = 0; plane < 4; plane++)
+		nouveau_vga_font_io(dev, iovram, save, plane);
+
+	/* restore control regs */
+	NVWritePRMVIO(dev, 0, NV_PRMVIO_MISC__WRITE, misc);
+	NVWriteVgaGr(dev, 0, NV_VIO_GX_READ_MAP_INDEX, gr4);
+	NVWriteVgaGr(dev, 0, NV_VIO_GX_MODE_INDEX, gr5);
+	NVWriteVgaGr(dev, 0, NV_VIO_GX_MISC_INDEX, gr6);
+	NVWriteVgaSeq(dev, 0, NV_VIO_SR_PLANE_MASK_INDEX, seq2);
+	NVWriteVgaSeq(dev, 0, NV_VIO_SR_MEM_MODE_INDEX, seq4);
+
+	if (nv_two_heads(dev))
+		NVBlankScreen(dev, 1, false);
+	NVBlankScreen(dev, 0, false);
+
+	iounmap(iovram);
+}
+
+/*
+ * mode state save/load
+ */
+
+static void
+rd_cio_state(struct drm_device *dev, int head,
+	     struct nv04_crtc_reg *crtcstate, int index)
+{
+	crtcstate->CRTC[index] = NVReadVgaCrtc(dev, head, index);
+}
+
+static void
+wr_cio_state(struct drm_device *dev, int head,
+	     struct nv04_crtc_reg *crtcstate, int index)
+{
+	NVWriteVgaCrtc(dev, head, index, crtcstate->CRTC[index]);
+}
+
+static void
+nv_save_state_ramdac(struct drm_device *dev, int head,
+		     struct nv04_mode_state *state)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nv04_crtc_reg *regp = &state->crtc_reg[head];
+	int i;
+
+	if (dev_priv->card_type >= NV_10)
+		regp->nv10_cursync = NVReadRAMDAC(dev, head, NV_RAMDAC_NV10_CURSYNC);
+
+	nouveau_hw_get_pllvals(dev, head ? VPLL2 : VPLL1, &regp->pllvals);
+	state->pllsel = NVReadRAMDAC(dev, 0, NV_PRAMDAC_PLL_COEFF_SELECT);
+	if (nv_two_heads(dev))
+		state->sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK);
+	if (dev_priv->chipset == 0x11)
+		regp->dither = NVReadRAMDAC(dev, head, NV_RAMDAC_DITHER_NV11);
+
+	regp->ramdac_gen_ctrl = NVReadRAMDAC(dev, head, NV_PRAMDAC_GENERAL_CONTROL);
+
+	if (nv_gf4_disp_arch(dev))
+		regp->ramdac_630 = NVReadRAMDAC(dev, head, NV_PRAMDAC_630);
+	if (dev_priv->chipset >= 0x30)
+		regp->ramdac_634 = NVReadRAMDAC(dev, head, NV_PRAMDAC_634);
+
+	regp->tv_setup = NVReadRAMDAC(dev, head, NV_PRAMDAC_TV_SETUP);
+	regp->tv_vtotal = NVReadRAMDAC(dev, head, NV_PRAMDAC_TV_VTOTAL);
+	regp->tv_vskew = NVReadRAMDAC(dev, head, NV_PRAMDAC_TV_VSKEW);
+	regp->tv_vsync_delay = NVReadRAMDAC(dev, head, NV_PRAMDAC_TV_VSYNC_DELAY);
+	regp->tv_htotal = NVReadRAMDAC(dev, head, NV_PRAMDAC_TV_HTOTAL);
+	regp->tv_hskew = NVReadRAMDAC(dev, head, NV_PRAMDAC_TV_HSKEW);
+	regp->tv_hsync_delay = NVReadRAMDAC(dev, head, NV_PRAMDAC_TV_HSYNC_DELAY);
+	regp->tv_hsync_delay2 = NVReadRAMDAC(dev, head, NV_PRAMDAC_TV_HSYNC_DELAY2);
+
+	for (i = 0; i < 7; i++) {
+		uint32_t ramdac_reg = NV_PRAMDAC_FP_VDISPLAY_END + (i * 4);
+		regp->fp_vert_regs[i] = NVReadRAMDAC(dev, head, ramdac_reg);
+		regp->fp_horiz_regs[i] = NVReadRAMDAC(dev, head, ramdac_reg + 0x20);
+	}
+
+	if (nv_gf4_disp_arch(dev)) {
+		regp->dither = NVReadRAMDAC(dev, head, NV_RAMDAC_FP_DITHER);
+		for (i = 0; i < 3; i++) {
+			regp->dither_regs[i] = NVReadRAMDAC(dev, head, NV_PRAMDAC_850 + i * 4);
+			regp->dither_regs[i + 3] = NVReadRAMDAC(dev, head, NV_PRAMDAC_85C + i * 4);
+		}
+	}
+
+	regp->fp_control = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL);
+	regp->fp_debug_0 = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_DEBUG_0);
+	if (!nv_gf4_disp_arch(dev) && head == 0) {
+		/* early chips don't allow access to PRAMDAC_TMDS_* without
+		 * the head A FPCLK on (nv11 even locks up) */
+		NVWriteRAMDAC(dev, 0, NV_PRAMDAC_FP_DEBUG_0, regp->fp_debug_0 &
+			      ~NV_PRAMDAC_FP_DEBUG_0_PWRDOWN_FPCLK);
+	}
+	regp->fp_debug_1 = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_DEBUG_1);
+	regp->fp_debug_2 = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_DEBUG_2);
+
+	regp->fp_margin_color = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_MARGIN_COLOR);
+
+	if (nv_gf4_disp_arch(dev))
+		regp->ramdac_8c0 = NVReadRAMDAC(dev, head, NV_PRAMDAC_8C0);
+
+	if (dev_priv->card_type == NV_40) {
+		regp->ramdac_a20 = NVReadRAMDAC(dev, head, NV_PRAMDAC_A20);
+		regp->ramdac_a24 = NVReadRAMDAC(dev, head, NV_PRAMDAC_A24);
+		regp->ramdac_a34 = NVReadRAMDAC(dev, head, NV_PRAMDAC_A34);
+
+		for (i = 0; i < 38; i++)
+			regp->ctv_regs[i] = NVReadRAMDAC(dev, head,
+							 NV_PRAMDAC_CTV + 4*i);
+	}
+}
+
+static void
+nv_load_state_ramdac(struct drm_device *dev, int head,
+		     struct nv04_mode_state *state)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nv04_crtc_reg *regp = &state->crtc_reg[head];
+	uint32_t pllreg = head ? NV_RAMDAC_VPLL2 : NV_PRAMDAC_VPLL_COEFF;
+	int i;
+
+	if (dev_priv->card_type >= NV_10)
+		NVWriteRAMDAC(dev, head, NV_RAMDAC_NV10_CURSYNC, regp->nv10_cursync);
+
+	nouveau_hw_setpll(dev, pllreg, &regp->pllvals);
+	NVWriteRAMDAC(dev, 0, NV_PRAMDAC_PLL_COEFF_SELECT, state->pllsel);
+	if (nv_two_heads(dev))
+		NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, state->sel_clk);
+	if (dev_priv->chipset == 0x11)
+		NVWriteRAMDAC(dev, head, NV_RAMDAC_DITHER_NV11, regp->dither);
+
+	NVWriteRAMDAC(dev, head, NV_PRAMDAC_GENERAL_CONTROL, regp->ramdac_gen_ctrl);
+
+	if (nv_gf4_disp_arch(dev))
+		NVWriteRAMDAC(dev, head, NV_PRAMDAC_630, regp->ramdac_630);
+	if (dev_priv->chipset >= 0x30)
+		NVWriteRAMDAC(dev, head, NV_PRAMDAC_634, regp->ramdac_634);
+
+	NVWriteRAMDAC(dev, head, NV_PRAMDAC_TV_SETUP, regp->tv_setup);
+	NVWriteRAMDAC(dev, head, NV_PRAMDAC_TV_VTOTAL, regp->tv_vtotal);
+	NVWriteRAMDAC(dev, head, NV_PRAMDAC_TV_VSKEW, regp->tv_vskew);
+	NVWriteRAMDAC(dev, head, NV_PRAMDAC_TV_VSYNC_DELAY, regp->tv_vsync_delay);
+	NVWriteRAMDAC(dev, head, NV_PRAMDAC_TV_HTOTAL, regp->tv_htotal);
+	NVWriteRAMDAC(dev, head, NV_PRAMDAC_TV_HSKEW, regp->tv_hskew);
+	NVWriteRAMDAC(dev, head, NV_PRAMDAC_TV_HSYNC_DELAY, regp->tv_hsync_delay);
+	NVWriteRAMDAC(dev, head, NV_PRAMDAC_TV_HSYNC_DELAY2, regp->tv_hsync_delay2);
+
+	for (i = 0; i < 7; i++) {
+		uint32_t ramdac_reg = NV_PRAMDAC_FP_VDISPLAY_END + (i * 4);
+
+		NVWriteRAMDAC(dev, head, ramdac_reg, regp->fp_vert_regs[i]);
+		NVWriteRAMDAC(dev, head, ramdac_reg + 0x20, regp->fp_horiz_regs[i]);
+	}
+
+	if (nv_gf4_disp_arch(dev)) {
+		NVWriteRAMDAC(dev, head, NV_RAMDAC_FP_DITHER, regp->dither);
+		for (i = 0; i < 3; i++) {
+			NVWriteRAMDAC(dev, head, NV_PRAMDAC_850 + i * 4, regp->dither_regs[i]);
+			NVWriteRAMDAC(dev, head, NV_PRAMDAC_85C + i * 4, regp->dither_regs[i + 3]);
+		}
+	}
+
+	NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL, regp->fp_control);
+	NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_DEBUG_0, regp->fp_debug_0);
+	NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_DEBUG_1, regp->fp_debug_1);
+	NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_DEBUG_2, regp->fp_debug_2);
+
+	NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_MARGIN_COLOR, regp->fp_margin_color);
+
+	if (nv_gf4_disp_arch(dev))
+		NVWriteRAMDAC(dev, head, NV_PRAMDAC_8C0, regp->ramdac_8c0);
+
+	if (dev_priv->card_type == NV_40) {
+		NVWriteRAMDAC(dev, head, NV_PRAMDAC_A20, regp->ramdac_a20);
+		NVWriteRAMDAC(dev, head, NV_PRAMDAC_A24, regp->ramdac_a24);
+		NVWriteRAMDAC(dev, head, NV_PRAMDAC_A34, regp->ramdac_a34);
+
+		for (i = 0; i < 38; i++)
+			NVWriteRAMDAC(dev, head,
+				      NV_PRAMDAC_CTV + 4*i, regp->ctv_regs[i]);
+	}
+}
+
+static void
+nv_save_state_vga(struct drm_device *dev, int head,
+		  struct nv04_mode_state *state)
+{
+	struct nv04_crtc_reg *regp = &state->crtc_reg[head];
+	int i;
+
+	regp->MiscOutReg = NVReadPRMVIO(dev, head, NV_PRMVIO_MISC__READ);
+
+	for (i = 0; i < 25; i++)
+		rd_cio_state(dev, head, regp, i);
+
+	NVSetEnablePalette(dev, head, true);
+	for (i = 0; i < 21; i++)
+		regp->Attribute[i] = NVReadVgaAttr(dev, head, i);
+	NVSetEnablePalette(dev, head, false);
+
+	for (i = 0; i < 9; i++)
+		regp->Graphics[i] = NVReadVgaGr(dev, head, i);
+
+	for (i = 0; i < 5; i++)
+		regp->Sequencer[i] = NVReadVgaSeq(dev, head, i);
+}
+
+static void
+nv_load_state_vga(struct drm_device *dev, int head,
+		  struct nv04_mode_state *state)
+{
+	struct nv04_crtc_reg *regp = &state->crtc_reg[head];
+	int i;
+
+	NVWritePRMVIO(dev, head, NV_PRMVIO_MISC__WRITE, regp->MiscOutReg);
+
+	for (i = 0; i < 5; i++)
+		NVWriteVgaSeq(dev, head, i, regp->Sequencer[i]);
+
+	nv_lock_vga_crtc_base(dev, head, false);
+	for (i = 0; i < 25; i++)
+		wr_cio_state(dev, head, regp, i);
+	nv_lock_vga_crtc_base(dev, head, true);
+
+	for (i = 0; i < 9; i++)
+		NVWriteVgaGr(dev, head, i, regp->Graphics[i]);
+
+	NVSetEnablePalette(dev, head, true);
+	for (i = 0; i < 21; i++)
+		NVWriteVgaAttr(dev, head, i, regp->Attribute[i]);
+	NVSetEnablePalette(dev, head, false);
+}
+
+static void
+nv_save_state_ext(struct drm_device *dev, int head,
+		  struct nv04_mode_state *state)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nv04_crtc_reg *regp = &state->crtc_reg[head];
+	int i;
+
+	rd_cio_state(dev, head, regp, NV_CIO_CRE_LCD__INDEX);
+	rd_cio_state(dev, head, regp, NV_CIO_CRE_RPC0_INDEX);
+	rd_cio_state(dev, head, regp, NV_CIO_CRE_RPC1_INDEX);
+	rd_cio_state(dev, head, regp, NV_CIO_CRE_LSR_INDEX);
+	rd_cio_state(dev, head, regp, NV_CIO_CRE_PIXEL_INDEX);
+	rd_cio_state(dev, head, regp, NV_CIO_CRE_HEB__INDEX);
+	rd_cio_state(dev, head, regp, NV_CIO_CRE_ENH_INDEX);
+
+	rd_cio_state(dev, head, regp, NV_CIO_CRE_FF_INDEX);
+	rd_cio_state(dev, head, regp, NV_CIO_CRE_FFLWM__INDEX);
+	rd_cio_state(dev, head, regp, NV_CIO_CRE_21);
+	if (dev_priv->card_type >= NV_30)
+		rd_cio_state(dev, head, regp, NV_CIO_CRE_47);
+	rd_cio_state(dev, head, regp, NV_CIO_CRE_49);
+	rd_cio_state(dev, head, regp, NV_CIO_CRE_HCUR_ADDR0_INDEX);
+	rd_cio_state(dev, head, regp, NV_CIO_CRE_HCUR_ADDR1_INDEX);
+	rd_cio_state(dev, head, regp, NV_CIO_CRE_HCUR_ADDR2_INDEX);
+	rd_cio_state(dev, head, regp, NV_CIO_CRE_ILACE__INDEX);
+
+	if (dev_priv->card_type >= NV_10) {
+		regp->crtc_830 = NVReadCRTC(dev, head, NV_PCRTC_830);
+		regp->crtc_834 = NVReadCRTC(dev, head, NV_PCRTC_834);
+
+		if (dev_priv->card_type >= NV_30)
+			regp->gpio_ext = NVReadCRTC(dev, head, NV_PCRTC_GPIO_EXT);
+
+		if (dev_priv->card_type == NV_40)
+			regp->crtc_850 = NVReadCRTC(dev, head, NV_PCRTC_850);
+
+		if (nv_two_heads(dev))
+			regp->crtc_eng_ctrl = NVReadCRTC(dev, head, NV_PCRTC_ENGINE_CTRL);
+		regp->cursor_cfg = NVReadCRTC(dev, head, NV_PCRTC_CURSOR_CONFIG);
+	}
+
+	regp->crtc_cfg = NVReadCRTC(dev, head, NV_PCRTC_CONFIG);
+
+	rd_cio_state(dev, head, regp, NV_CIO_CRE_SCRATCH3__INDEX);
+	rd_cio_state(dev, head, regp, NV_CIO_CRE_SCRATCH4__INDEX);
+	if (dev_priv->card_type >= NV_10) {
+		rd_cio_state(dev, head, regp, NV_CIO_CRE_EBR_INDEX);
+		rd_cio_state(dev, head, regp, NV_CIO_CRE_CSB);
+		rd_cio_state(dev, head, regp, NV_CIO_CRE_4B);
+		rd_cio_state(dev, head, regp, NV_CIO_CRE_TVOUT_LATENCY);
+	}
+	/* NV11 and NV20 don't have this, they stop at 0x52. */
+	if (nv_gf4_disp_arch(dev)) {
+		rd_cio_state(dev, head, regp, NV_CIO_CRE_53);
+		rd_cio_state(dev, head, regp, NV_CIO_CRE_54);
+
+		for (i = 0; i < 0x10; i++)
+			regp->CR58[i] = NVReadVgaCrtc5758(dev, head, i);
+		rd_cio_state(dev, head, regp, NV_CIO_CRE_59);
+		rd_cio_state(dev, head, regp, NV_CIO_CRE_5B);
+
+		rd_cio_state(dev, head, regp, NV_CIO_CRE_85);
+		rd_cio_state(dev, head, regp, NV_CIO_CRE_86);
+	}
+
+	regp->fb_start = NVReadCRTC(dev, head, NV_PCRTC_START);
+}
+
+static void
+nv_load_state_ext(struct drm_device *dev, int head,
+		  struct nv04_mode_state *state)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nv04_crtc_reg *regp = &state->crtc_reg[head];
+	uint32_t reg900;
+	int i;
+
+	if (dev_priv->card_type >= NV_10) {
+		if (nv_two_heads(dev))
+			/* setting ENGINE_CTRL (EC) *must* come before
+			 * CIO_CRE_LCD, as writing CRE_LCD sets bits 16 & 17 in
+			 * EC that should not be overwritten by writing stale EC
+			 */
+			NVWriteCRTC(dev, head, NV_PCRTC_ENGINE_CTRL, regp->crtc_eng_ctrl);
+
+		nvWriteVIDEO(dev, NV_PVIDEO_STOP, 1);
+		nvWriteVIDEO(dev, NV_PVIDEO_INTR_EN, 0);
+		nvWriteVIDEO(dev, NV_PVIDEO_OFFSET_BUFF(0), 0);
+		nvWriteVIDEO(dev, NV_PVIDEO_OFFSET_BUFF(1), 0);
+		nvWriteVIDEO(dev, NV_PVIDEO_LIMIT(0), dev_priv->fb_available_size - 1);
+		nvWriteVIDEO(dev, NV_PVIDEO_LIMIT(1), dev_priv->fb_available_size - 1);
+		nvWriteVIDEO(dev, NV_PVIDEO_UVPLANE_LIMIT(0), dev_priv->fb_available_size - 1);
+		nvWriteVIDEO(dev, NV_PVIDEO_UVPLANE_LIMIT(1), dev_priv->fb_available_size - 1);
+		nvWriteMC(dev, NV_PBUS_POWERCTRL_2, 0);
+
+		NVWriteCRTC(dev, head, NV_PCRTC_CURSOR_CONFIG, regp->cursor_cfg);
+		NVWriteCRTC(dev, head, NV_PCRTC_830, regp->crtc_830);
+		NVWriteCRTC(dev, head, NV_PCRTC_834, regp->crtc_834);
+
+		if (dev_priv->card_type >= NV_30)
+			NVWriteCRTC(dev, head, NV_PCRTC_GPIO_EXT, regp->gpio_ext);
+
+		if (dev_priv->card_type == NV_40) {
+			NVWriteCRTC(dev, head, NV_PCRTC_850, regp->crtc_850);
+
+			reg900 = NVReadRAMDAC(dev, head, NV_PRAMDAC_900);
+			if (regp->crtc_cfg == NV_PCRTC_CONFIG_START_ADDRESS_HSYNC)
+				NVWriteRAMDAC(dev, head, NV_PRAMDAC_900, reg900 | 0x10000);
+			else
+				NVWriteRAMDAC(dev, head, NV_PRAMDAC_900, reg900 & ~0x10000);
+		}
+	}
+
+	NVWriteCRTC(dev, head, NV_PCRTC_CONFIG, regp->crtc_cfg);
+
+	wr_cio_state(dev, head, regp, NV_CIO_CRE_RPC0_INDEX);
+	wr_cio_state(dev, head, regp, NV_CIO_CRE_RPC1_INDEX);
+	wr_cio_state(dev, head, regp, NV_CIO_CRE_LSR_INDEX);
+	wr_cio_state(dev, head, regp, NV_CIO_CRE_PIXEL_INDEX);
+	wr_cio_state(dev, head, regp, NV_CIO_CRE_LCD__INDEX);
+	wr_cio_state(dev, head, regp, NV_CIO_CRE_HEB__INDEX);
+	wr_cio_state(dev, head, regp, NV_CIO_CRE_ENH_INDEX);
+	wr_cio_state(dev, head, regp, NV_CIO_CRE_FF_INDEX);
+	wr_cio_state(dev, head, regp, NV_CIO_CRE_FFLWM__INDEX);
+	if (dev_priv->card_type >= NV_30)
+		wr_cio_state(dev, head, regp, NV_CIO_CRE_47);
+
+	wr_cio_state(dev, head, regp, NV_CIO_CRE_49);
+	wr_cio_state(dev, head, regp, NV_CIO_CRE_HCUR_ADDR0_INDEX);
+	wr_cio_state(dev, head, regp, NV_CIO_CRE_HCUR_ADDR1_INDEX);
+	wr_cio_state(dev, head, regp, NV_CIO_CRE_HCUR_ADDR2_INDEX);
+	if (dev_priv->card_type == NV_40)
+		nv_fix_nv40_hw_cursor(dev, head);
+	wr_cio_state(dev, head, regp, NV_CIO_CRE_ILACE__INDEX);
+
+	wr_cio_state(dev, head, regp, NV_CIO_CRE_SCRATCH3__INDEX);
+	wr_cio_state(dev, head, regp, NV_CIO_CRE_SCRATCH4__INDEX);
+	if (dev_priv->card_type >= NV_10) {
+		wr_cio_state(dev, head, regp, NV_CIO_CRE_EBR_INDEX);
+		wr_cio_state(dev, head, regp, NV_CIO_CRE_CSB);
+		wr_cio_state(dev, head, regp, NV_CIO_CRE_4B);
+		wr_cio_state(dev, head, regp, NV_CIO_CRE_TVOUT_LATENCY);
+	}
+	/* NV11 and NV20 stop at 0x52. */
+	if (nv_gf4_disp_arch(dev)) {
+		if (dev_priv->card_type == NV_10) {
+			/* Not waiting for vertical retrace before modifying
+			   CRE_53/CRE_54 causes lockups. */
+			nouveau_wait_until(dev, 650000000, NV_PRMCIO_INP0__COLOR, 0x8, 0x8);
+			nouveau_wait_until(dev, 650000000, NV_PRMCIO_INP0__COLOR, 0x8, 0x0);
+		}
+
+		wr_cio_state(dev, head, regp, NV_CIO_CRE_53);
+		wr_cio_state(dev, head, regp, NV_CIO_CRE_54);
+
+		for (i = 0; i < 0x10; i++)
+			NVWriteVgaCrtc5758(dev, head, i, regp->CR58[i]);
+		wr_cio_state(dev, head, regp, NV_CIO_CRE_59);
+		wr_cio_state(dev, head, regp, NV_CIO_CRE_5B);
+
+		wr_cio_state(dev, head, regp, NV_CIO_CRE_85);
+		wr_cio_state(dev, head, regp, NV_CIO_CRE_86);
+	}
+
+	NVWriteCRTC(dev, head, NV_PCRTC_START, regp->fb_start);
+
+	/* Setting 1 on this value gives you interrupts for every vblank period. */
+	NVWriteCRTC(dev, head, NV_PCRTC_INTR_EN_0, 0);
+	NVWriteCRTC(dev, head, NV_PCRTC_INTR_0, NV_PCRTC_INTR_0_VBLANK);
+}
+
+static void
+nv_save_state_palette(struct drm_device *dev, int head,
+		      struct nv04_mode_state *state)
+{
+	int head_offset = head * NV_PRMDIO_SIZE, i;
+
+	nv_wr08(dev, NV_PRMDIO_PIXEL_MASK + head_offset,
+				NV_PRMDIO_PIXEL_MASK_MASK);
+	nv_wr08(dev, NV_PRMDIO_READ_MODE_ADDRESS + head_offset, 0x0);
+
+	for (i = 0; i < 768; i++) {
+		state->crtc_reg[head].DAC[i] = nv_rd08(dev,
+				NV_PRMDIO_PALETTE_DATA + head_offset);
+	}
+
+	NVSetEnablePalette(dev, head, false);
+}
+
+void
+nouveau_hw_load_state_palette(struct drm_device *dev, int head,
+			      struct nv04_mode_state *state)
+{
+	int head_offset = head * NV_PRMDIO_SIZE, i;
+
+	nv_wr08(dev, NV_PRMDIO_PIXEL_MASK + head_offset,
+				NV_PRMDIO_PIXEL_MASK_MASK);
+	nv_wr08(dev, NV_PRMDIO_WRITE_MODE_ADDRESS + head_offset, 0x0);
+
+	for (i = 0; i < 768; i++) {
+		nv_wr08(dev, NV_PRMDIO_PALETTE_DATA + head_offset,
+				state->crtc_reg[head].DAC[i]);
+	}
+
+	NVSetEnablePalette(dev, head, false);
+}
+
+void nouveau_hw_save_state(struct drm_device *dev, int head,
+			   struct nv04_mode_state *state)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+	if (dev_priv->chipset == 0x11)
+		/* NB: no attempt is made to restore the bad pll later on */
+		nouveau_hw_fix_bad_vpll(dev, head);
+	nv_save_state_ramdac(dev, head, state);
+	nv_save_state_vga(dev, head, state);
+	nv_save_state_palette(dev, head, state);
+	nv_save_state_ext(dev, head, state);
+}
+
+void nouveau_hw_load_state(struct drm_device *dev, int head,
+			   struct nv04_mode_state *state)
+{
+	NVVgaProtect(dev, head, true);
+	nv_load_state_ramdac(dev, head, state);
+	nv_load_state_ext(dev, head, state);
+	nouveau_hw_load_state_palette(dev, head, state);
+	nv_load_state_vga(dev, head, state);
+	NVVgaProtect(dev, head, false);
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_i2c.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_i2c.h
@@ -0,0 +1,52 @@
+/*
+ * Copyright 2009 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef __NOUVEAU_I2C_H__
+#define __NOUVEAU_I2C_H__
+
+#include <linux/i2c.h>
+#include <linux/i2c-id.h>
+#include <linux/i2c-algo-bit.h>
+#include "drm_dp_helper.h"
+
+struct dcb_i2c_entry;
+
+struct nouveau_i2c_chan {
+	struct i2c_adapter adapter;
+	struct drm_device *dev;
+	union {
+		struct i2c_algo_bit_data bit;
+		struct i2c_algo_dp_aux_data dp;
+	} algo;
+	unsigned rd;
+	unsigned wr;
+	unsigned data;
+};
+
+int nouveau_i2c_init(struct drm_device *, struct dcb_i2c_entry *, int index);
+void nouveau_i2c_fini(struct drm_device *, struct dcb_i2c_entry *);
+struct nouveau_i2c_chan *nouveau_i2c_find(struct drm_device *, int index);
+
+int nouveau_dp_i2c_aux_ch(struct i2c_adapter *, int mode, uint8_t write_byte,
+			  uint8_t *read_byte);
+
+#endif /* __NOUVEAU_I2C_H__ */
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv10_fifo.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv10_fifo.c
@@ -0,0 +1,260 @@
+/*
+ * Copyright (C) 2007 Ben Skeggs.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include "drmP.h"
+#include "drm.h"
+#include "nouveau_drv.h"
+
+#define NV10_RAMFC(c) (dev_priv->ramfc_offset + ((c) * NV10_RAMFC__SIZE))
+#define NV10_RAMFC__SIZE ((dev_priv->chipset) >= 0x17 ? 64 : 32)
+
+int
+nv10_fifo_channel_id(struct drm_device *dev)
+{
+	return nv_rd32(dev, NV03_PFIFO_CACHE1_PUSH1) &
+			NV10_PFIFO_CACHE1_PUSH1_CHID_MASK;
+}
+
+int
+nv10_fifo_create_context(struct nouveau_channel *chan)
+{
+	struct drm_nouveau_private *dev_priv = chan->dev->dev_private;
+	struct drm_device *dev = chan->dev;
+	uint32_t fc = NV10_RAMFC(chan->id);
+	int ret;
+
+	ret = nouveau_gpuobj_new_fake(dev, NV10_RAMFC(chan->id), ~0,
+				      NV10_RAMFC__SIZE, NVOBJ_FLAG_ZERO_ALLOC |
+				      NVOBJ_FLAG_ZERO_FREE, NULL, &chan->ramfc);
+	if (ret)
+		return ret;
+
+	/* Fill entries that are seen filled in dumps of nvidia driver just
+	 * after channel's is put into DMA mode
+	 */
+	dev_priv->engine.instmem.prepare_access(dev, true);
+	nv_wi32(dev, fc +  0, chan->pushbuf_base);
+	nv_wi32(dev, fc +  4, chan->pushbuf_base);
+	nv_wi32(dev, fc + 12, chan->pushbuf->instance >> 4);
+	nv_wi32(dev, fc + 20, NV_PFIFO_CACHE1_DMA_FETCH_TRIG_128_BYTES |
+			      NV_PFIFO_CACHE1_DMA_FETCH_SIZE_128_BYTES |
+			      NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_8 |
+#ifdef __BIG_ENDIAN
+			      NV_PFIFO_CACHE1_BIG_ENDIAN |
+#endif
+			      0);
+	dev_priv->engine.instmem.finish_access(dev);
+
+	/* enable the fifo dma operation */
+	nv_wr32(dev, NV04_PFIFO_MODE,
+		nv_rd32(dev, NV04_PFIFO_MODE) | (1 << chan->id));
+	return 0;
+}
+
+void
+nv10_fifo_destroy_context(struct nouveau_channel *chan)
+{
+	struct drm_device *dev = chan->dev;
+
+	nv_wr32(dev, NV04_PFIFO_MODE,
+			nv_rd32(dev, NV04_PFIFO_MODE) & ~(1 << chan->id));
+
+	nouveau_gpuobj_ref_del(dev, &chan->ramfc);
+}
+
+static void
+nv10_fifo_do_load_context(struct drm_device *dev, int chid)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	uint32_t fc = NV10_RAMFC(chid), tmp;
+
+	dev_priv->engine.instmem.prepare_access(dev, false);
+
+	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_PUT, nv_ri32(dev, fc + 0));
+	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_GET, nv_ri32(dev, fc + 4));
+	nv_wr32(dev, NV10_PFIFO_CACHE1_REF_CNT, nv_ri32(dev, fc + 8));
+
+	tmp = nv_ri32(dev, fc + 12);
+	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_INSTANCE, tmp & 0xFFFF);
+	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_DCOUNT, tmp >> 16);
+
+	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_STATE, nv_ri32(dev, fc + 16));
+	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_FETCH, nv_ri32(dev, fc + 20));
+	nv_wr32(dev, NV04_PFIFO_CACHE1_ENGINE, nv_ri32(dev, fc + 24));
+	nv_wr32(dev, NV04_PFIFO_CACHE1_PULL1, nv_ri32(dev, fc + 28));
+
+	if (dev_priv->chipset < 0x17)
+		goto out;
+
+	nv_wr32(dev, NV10_PFIFO_CACHE1_ACQUIRE_VALUE, nv_ri32(dev, fc + 32));
+	tmp = nv_ri32(dev, fc + 36);
+	nv_wr32(dev, NV10_PFIFO_CACHE1_ACQUIRE_TIMESTAMP, tmp);
+	nv_wr32(dev, NV10_PFIFO_CACHE1_ACQUIRE_TIMEOUT, nv_ri32(dev, fc + 40));
+	nv_wr32(dev, NV10_PFIFO_CACHE1_SEMAPHORE, nv_ri32(dev, fc + 44));
+	nv_wr32(dev, NV10_PFIFO_CACHE1_DMA_SUBROUTINE, nv_ri32(dev, fc + 48));
+
+out:
+	dev_priv->engine.instmem.finish_access(dev);
+
+	nv_wr32(dev, NV03_PFIFO_CACHE1_GET, 0);
+	nv_wr32(dev, NV03_PFIFO_CACHE1_PUT, 0);
+}
+
+int
+nv10_fifo_load_context(struct nouveau_channel *chan)
+{
+	struct drm_device *dev = chan->dev;
+	uint32_t tmp;
+
+	nv10_fifo_do_load_context(dev, chan->id);
+
+	nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1,
+		     NV03_PFIFO_CACHE1_PUSH1_DMA | chan->id);
+	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_PUSH, 1);
+
+	/* Reset NV04_PFIFO_CACHE1_DMA_CTL_AT_INFO to INVALID */
+	tmp = nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_CTL) & ~(1 << 31);
+	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_CTL, tmp);
+
+	return 0;
+}
+
+int
+nv10_fifo_unload_context(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
+	uint32_t fc, tmp;
+	int chid;
+
+	chid = pfifo->channel_id(dev);
+	if (chid < 0 || chid >= dev_priv->engine.fifo.channels)
+		return 0;
+	fc = NV10_RAMFC(chid);
+
+	dev_priv->engine.instmem.prepare_access(dev, true);
+
+	nv_wi32(dev, fc +  0, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_PUT));
+	nv_wi32(dev, fc +  4, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_GET));
+	nv_wi32(dev, fc +  8, nv_rd32(dev, NV10_PFIFO_CACHE1_REF_CNT));
+	tmp  = nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_INSTANCE) & 0xFFFF;
+	tmp |= (nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_DCOUNT) << 16);
+	nv_wi32(dev, fc + 12, tmp);
+	nv_wi32(dev, fc + 16, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_STATE));
+	nv_wi32(dev, fc + 20, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_FETCH));
+	nv_wi32(dev, fc + 24, nv_rd32(dev, NV04_PFIFO_CACHE1_ENGINE));
+	nv_wi32(dev, fc + 28, nv_rd32(dev, NV04_PFIFO_CACHE1_PULL1));
+
+	if (dev_priv->chipset < 0x17)
+		goto out;
+
+	nv_wi32(dev, fc + 32, nv_rd32(dev, NV10_PFIFO_CACHE1_ACQUIRE_VALUE));
+	tmp = nv_rd32(dev, NV10_PFIFO_CACHE1_ACQUIRE_TIMESTAMP);
+	nv_wi32(dev, fc + 36, tmp);
+	nv_wi32(dev, fc + 40, nv_rd32(dev, NV10_PFIFO_CACHE1_ACQUIRE_TIMEOUT));
+	nv_wi32(dev, fc + 44, nv_rd32(dev, NV10_PFIFO_CACHE1_SEMAPHORE));
+	nv_wi32(dev, fc + 48, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_GET));
+
+out:
+	dev_priv->engine.instmem.finish_access(dev);
+
+	nv10_fifo_do_load_context(dev, pfifo->channels - 1);
+	nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, pfifo->channels - 1);
+	return 0;
+}
+
+static void
+nv10_fifo_init_reset(struct drm_device *dev)
+{
+	nv_wr32(dev, NV03_PMC_ENABLE,
+		nv_rd32(dev, NV03_PMC_ENABLE) & ~NV_PMC_ENABLE_PFIFO);
+	nv_wr32(dev, NV03_PMC_ENABLE,
+		nv_rd32(dev, NV03_PMC_ENABLE) |  NV_PMC_ENABLE_PFIFO);
+
+	nv_wr32(dev, 0x003224, 0x000f0078);
+	nv_wr32(dev, 0x002044, 0x0101ffff);
+	nv_wr32(dev, 0x002040, 0x000000ff);
+	nv_wr32(dev, 0x002500, 0x00000000);
+	nv_wr32(dev, 0x003000, 0x00000000);
+	nv_wr32(dev, 0x003050, 0x00000000);
+
+	nv_wr32(dev, 0x003258, 0x00000000);
+	nv_wr32(dev, 0x003210, 0x00000000);
+	nv_wr32(dev, 0x003270, 0x00000000);
+}
+
+static void
+nv10_fifo_init_ramxx(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+	nv_wr32(dev, NV03_PFIFO_RAMHT, (0x03 << 24) /* search 128 */ |
+				       ((dev_priv->ramht_bits - 9) << 16) |
+				       (dev_priv->ramht_offset >> 8));
+	nv_wr32(dev, NV03_PFIFO_RAMRO, dev_priv->ramro_offset>>8);
+
+	if (dev_priv->chipset < 0x17) {
+		nv_wr32(dev, NV03_PFIFO_RAMFC, dev_priv->ramfc_offset >> 8);
+	} else {
+		nv_wr32(dev, NV03_PFIFO_RAMFC, (dev_priv->ramfc_offset >> 8) |
+					       (1 << 16) /* 64 Bytes entry*/);
+		/* XXX nvidia blob set bit 18, 21,23 for nv20 & nv30 */
+	}
+}
+
+static void
+nv10_fifo_init_intr(struct drm_device *dev)
+{
+	nv_wr32(dev, 0x002100, 0xffffffff);
+	nv_wr32(dev, 0x002140, 0xffffffff);
+}
+
+int
+nv10_fifo_init(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
+	int i;
+
+	nv10_fifo_init_reset(dev);
+	nv10_fifo_init_ramxx(dev);
+
+	nv10_fifo_do_load_context(dev, pfifo->channels - 1);
+	nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, pfifo->channels - 1);
+
+	nv10_fifo_init_intr(dev);
+	pfifo->enable(dev);
+	pfifo->reassign(dev, true);
+
+	for (i = 0; i < dev_priv->engine.fifo.channels; i++) {
+		if (dev_priv->fifos[i]) {
+			uint32_t mode = nv_rd32(dev, NV04_PFIFO_MODE);
+			nv_wr32(dev, NV04_PFIFO_MODE, mode | (1 << i));
+		}
+	}
+
+	return 0;
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv50_grctx.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv50_grctx.c
@@ -0,0 +1,2367 @@
+/*
+ * Copyright 2009 Marcin Kościelnicki
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#define CP_FLAG_CLEAR                 0
+#define CP_FLAG_SET                   1
+#define CP_FLAG_SWAP_DIRECTION        ((0 * 32) + 0)
+#define CP_FLAG_SWAP_DIRECTION_LOAD   0
+#define CP_FLAG_SWAP_DIRECTION_SAVE   1
+#define CP_FLAG_UNK01                 ((0 * 32) + 1)
+#define CP_FLAG_UNK01_CLEAR           0
+#define CP_FLAG_UNK01_SET             1
+#define CP_FLAG_UNK03                 ((0 * 32) + 3)
+#define CP_FLAG_UNK03_CLEAR           0
+#define CP_FLAG_UNK03_SET             1
+#define CP_FLAG_USER_SAVE             ((0 * 32) + 5)
+#define CP_FLAG_USER_SAVE_NOT_PENDING 0
+#define CP_FLAG_USER_SAVE_PENDING     1
+#define CP_FLAG_USER_LOAD             ((0 * 32) + 6)
+#define CP_FLAG_USER_LOAD_NOT_PENDING 0
+#define CP_FLAG_USER_LOAD_PENDING     1
+#define CP_FLAG_UNK0B                 ((0 * 32) + 0xb)
+#define CP_FLAG_UNK0B_CLEAR           0
+#define CP_FLAG_UNK0B_SET             1
+#define CP_FLAG_UNK1D                 ((0 * 32) + 0x1d)
+#define CP_FLAG_UNK1D_CLEAR           0
+#define CP_FLAG_UNK1D_SET             1
+#define CP_FLAG_UNK20                 ((1 * 32) + 0)
+#define CP_FLAG_UNK20_CLEAR           0
+#define CP_FLAG_UNK20_SET             1
+#define CP_FLAG_STATUS                ((2 * 32) + 0)
+#define CP_FLAG_STATUS_BUSY           0
+#define CP_FLAG_STATUS_IDLE           1
+#define CP_FLAG_AUTO_SAVE             ((2 * 32) + 4)
+#define CP_FLAG_AUTO_SAVE_NOT_PENDING 0
+#define CP_FLAG_AUTO_SAVE_PENDING     1
+#define CP_FLAG_AUTO_LOAD             ((2 * 32) + 5)
+#define CP_FLAG_AUTO_LOAD_NOT_PENDING 0
+#define CP_FLAG_AUTO_LOAD_PENDING     1
+#define CP_FLAG_XFER                  ((2 * 32) + 11)
+#define CP_FLAG_XFER_IDLE             0
+#define CP_FLAG_XFER_BUSY             1
+#define CP_FLAG_NEWCTX                ((2 * 32) + 12)
+#define CP_FLAG_NEWCTX_BUSY           0
+#define CP_FLAG_NEWCTX_DONE           1
+#define CP_FLAG_ALWAYS                ((2 * 32) + 13)
+#define CP_FLAG_ALWAYS_FALSE          0
+#define CP_FLAG_ALWAYS_TRUE           1
+
+#define CP_CTX                   0x00100000
+#define CP_CTX_COUNT             0x000f0000
+#define CP_CTX_COUNT_SHIFT               16
+#define CP_CTX_REG               0x00003fff
+#define CP_LOAD_SR               0x00200000
+#define CP_LOAD_SR_VALUE         0x000fffff
+#define CP_BRA                   0x00400000
+#define CP_BRA_IP                0x0001ff00
+#define CP_BRA_IP_SHIFT                   8
+#define CP_BRA_IF_CLEAR          0x00000080
+#define CP_BRA_FLAG              0x0000007f
+#define CP_WAIT                  0x00500000
+#define CP_WAIT_SET              0x00000080
+#define CP_WAIT_FLAG             0x0000007f
+#define CP_SET                   0x00700000
+#define CP_SET_1                 0x00000080
+#define CP_SET_FLAG              0x0000007f
+#define CP_NEWCTX                0x00600004
+#define CP_NEXT_TO_SWAP          0x00600005
+#define CP_SET_CONTEXT_POINTER   0x00600006
+#define CP_SET_XFER_POINTER      0x00600007
+#define CP_ENABLE                0x00600009
+#define CP_END                   0x0060000c
+#define CP_NEXT_TO_CURRENT       0x0060000d
+#define CP_DISABLE1              0x0090ffff
+#define CP_DISABLE2              0x0091ffff
+#define CP_XFER_1      0x008000ff
+#define CP_XFER_2      0x008800ff
+#define CP_SEEK_1      0x00c000ff
+#define CP_SEEK_2      0x00c800ff
+
+#include "drmP.h"
+#include "nouveau_drv.h"
+#include "nouveau_grctx.h"
+
+/*
+ * This code deals with PGRAPH contexts on NV50 family cards. Like NV40, it's
+ * the GPU itself that does context-switching, but it needs a special
+ * microcode to do it. And it's the driver's task to supply this microcode,
+ * further known as ctxprog, as well as the initial context values, known
+ * as ctxvals.
+ *
+ * Without ctxprog, you cannot switch contexts. Not even in software, since
+ * the majority of context [xfer strands] isn't accessible directly. You're
+ * stuck with a single channel, and you also suffer all the problems resulting
+ * from missing ctxvals, since you cannot load them.
+ *
+ * Without ctxvals, you're stuck with PGRAPH's default context. It's enough to
+ * run 2d operations, but trying to utilise 3d or CUDA will just lock you up,
+ * since you don't have... some sort of needed setup.
+ *
+ * Nouveau will just disable acceleration if not given ctxprog + ctxvals, since
+ * it's too much hassle to handle no-ctxprog as a special case.
+ */
+
+/*
+ * How ctxprogs work.
+ *
+ * The ctxprog is written in its own kind of microcode, with very small and
+ * crappy set of available commands. You upload it to a small [512 insns]
+ * area of memory on PGRAPH, and it'll be run when PFIFO wants PGRAPH to
+ * switch channel. or when the driver explicitely requests it. Stuff visible
+ * to ctxprog consists of: PGRAPH MMIO registers, PGRAPH context strands,
+ * the per-channel context save area in VRAM [known as ctxvals or grctx],
+ * 4 flags registers, a scratch register, two grctx pointers, plus many
+ * random poorly-understood details.
+ *
+ * When ctxprog runs, it's supposed to check what operations are asked of it,
+ * save old context if requested, optionally reset PGRAPH and switch to the
+ * new channel, and load the new context. Context consists of three major
+ * parts: subset of MMIO registers and two "xfer areas".
+ */
+
+/* TODO:
+ *  - document unimplemented bits compared to nvidia
+ *  - NVAx: make a TP subroutine, use it.
+ *  - use 0x4008fc instead of 0x1540?
+ */
+
+enum cp_label {
+	cp_check_load = 1,
+	cp_setup_auto_load,
+	cp_setup_load,
+	cp_setup_save,
+	cp_swap_state,
+	cp_prepare_exit,
+	cp_exit,
+};
+
+static void nv50_graph_construct_mmio(struct nouveau_grctx *ctx);
+static void nv50_graph_construct_xfer1(struct nouveau_grctx *ctx);
+static void nv50_graph_construct_xfer2(struct nouveau_grctx *ctx);
+
+/* Main function: construct the ctxprog skeleton, call the other functions. */
+
+int
+nv50_grctx_init(struct nouveau_grctx *ctx)
+{
+	struct drm_nouveau_private *dev_priv = ctx->dev->dev_private;
+
+	switch (dev_priv->chipset) {
+	case 0x50:
+	case 0x84:
+	case 0x86:
+	case 0x92:
+	case 0x94:
+	case 0x96:
+	case 0x98:
+	case 0xa0:
+	case 0xa5:
+	case 0xa8:
+	case 0xaa:
+	case 0xac:
+		break;
+	default:
+		NV_ERROR(ctx->dev, "I don't know how to make a ctxprog for "
+				   "your NV%x card.\n", dev_priv->chipset);
+		NV_ERROR(ctx->dev, "Disabling acceleration. Please contact "
+				   "the devs.\n");
+		return -ENOSYS;
+	}
+	/* decide whether we're loading/unloading the context */
+	cp_bra (ctx, AUTO_SAVE, PENDING, cp_setup_save);
+	cp_bra (ctx, USER_SAVE, PENDING, cp_setup_save);
+
+	cp_name(ctx, cp_check_load);
+	cp_bra (ctx, AUTO_LOAD, PENDING, cp_setup_auto_load);
+	cp_bra (ctx, USER_LOAD, PENDING, cp_setup_load);
+	cp_bra (ctx, ALWAYS, TRUE, cp_exit);
+
+	/* setup for context load */
+	cp_name(ctx, cp_setup_auto_load);
+	cp_out (ctx, CP_DISABLE1);
+	cp_out (ctx, CP_DISABLE2);
+	cp_out (ctx, CP_ENABLE);
+	cp_out (ctx, CP_NEXT_TO_SWAP);
+	cp_set (ctx, UNK01, SET);
+	cp_name(ctx, cp_setup_load);
+	cp_out (ctx, CP_NEWCTX);
+	cp_wait(ctx, NEWCTX, BUSY);
+	cp_set (ctx, UNK1D, CLEAR);
+	cp_set (ctx, SWAP_DIRECTION, LOAD);
+	cp_bra (ctx, UNK0B, SET, cp_prepare_exit);
+	cp_bra (ctx, ALWAYS, TRUE, cp_swap_state);
+
+	/* setup for context save */
+	cp_name(ctx, cp_setup_save);
+	cp_set (ctx, UNK1D, SET);
+	cp_wait(ctx, STATUS, BUSY);
+	cp_set (ctx, UNK01, SET);
+	cp_set (ctx, SWAP_DIRECTION, SAVE);
+
+	/* general PGRAPH state */
+	cp_name(ctx, cp_swap_state);
+	cp_set (ctx, UNK03, SET);
+	cp_pos (ctx, 0x00004/4);
+	cp_ctx (ctx, 0x400828, 1); /* needed. otherwise, flickering happens. */
+	cp_pos (ctx, 0x00100/4);
+	nv50_graph_construct_mmio(ctx);
+	nv50_graph_construct_xfer1(ctx);
+	nv50_graph_construct_xfer2(ctx);
+
+	cp_bra (ctx, SWAP_DIRECTION, SAVE, cp_check_load);
+
+	cp_set (ctx, UNK20, SET);
+	cp_set (ctx, SWAP_DIRECTION, SAVE); /* no idea why this is needed, but fixes at least one lockup. */
+	cp_lsr (ctx, ctx->ctxvals_base);
+	cp_out (ctx, CP_SET_XFER_POINTER);
+	cp_lsr (ctx, 4);
+	cp_out (ctx, CP_SEEK_1);
+	cp_out (ctx, CP_XFER_1);
+	cp_wait(ctx, XFER, BUSY);
+
+	/* pre-exit state updates */
+	cp_name(ctx, cp_prepare_exit);
+	cp_set (ctx, UNK01, CLEAR);
+	cp_set (ctx, UNK03, CLEAR);
+	cp_set (ctx, UNK1D, CLEAR);
+
+	cp_bra (ctx, USER_SAVE, PENDING, cp_exit);
+	cp_out (ctx, CP_NEXT_TO_CURRENT);
+
+	cp_name(ctx, cp_exit);
+	cp_set (ctx, USER_SAVE, NOT_PENDING);
+	cp_set (ctx, USER_LOAD, NOT_PENDING);
+	cp_out (ctx, CP_END);
+	ctx->ctxvals_pos += 0x400; /* padding... no idea why you need it */
+
+	return 0;
+}
+
+/*
+ * Constructs MMIO part of ctxprog and ctxvals. Just a matter of knowing which
+ * registers to save/restore and the default values for them.
+ */
+
+static void
+nv50_graph_construct_mmio(struct nouveau_grctx *ctx)
+{
+	struct drm_nouveau_private *dev_priv = ctx->dev->dev_private;
+	int i, j;
+	int offset, base;
+	uint32_t units = nv_rd32 (ctx->dev, 0x1540);
+
+	/* 0800 */
+	cp_ctx(ctx, 0x400808, 7);
+	gr_def(ctx, 0x400814, 0x00000030);
+	cp_ctx(ctx, 0x400834, 0x32);
+	if (dev_priv->chipset == 0x50) {
+		gr_def(ctx, 0x400834, 0xff400040);
+		gr_def(ctx, 0x400838, 0xfff00080);
+		gr_def(ctx, 0x40083c, 0xfff70090);
+		gr_def(ctx, 0x400840, 0xffe806a8);
+	}
+	gr_def(ctx, 0x400844, 0x00000002);
+	if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa)
+		gr_def(ctx, 0x400894, 0x00001000);
+	gr_def(ctx, 0x4008e8, 0x00000003);
+	gr_def(ctx, 0x4008ec, 0x00001000);
+	if (dev_priv->chipset == 0x50)
+		cp_ctx(ctx, 0x400908, 0xb);
+	else if (dev_priv->chipset < 0xa0)
+		cp_ctx(ctx, 0x400908, 0xc);
+	else
+		cp_ctx(ctx, 0x400908, 0xe);
+
+	if (dev_priv->chipset >= 0xa0)
+		cp_ctx(ctx, 0x400b00, 0x1);
+	if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa) {
+		cp_ctx(ctx, 0x400b10, 0x1);
+		gr_def(ctx, 0x400b10, 0x0001629d);
+		cp_ctx(ctx, 0x400b20, 0x1);
+		gr_def(ctx, 0x400b20, 0x0001629d);
+	}
+
+	/* 0C00 */
+	cp_ctx(ctx, 0x400c08, 0x2);
+	gr_def(ctx, 0x400c08, 0x0000fe0c);
+
+	/* 1000 */
+	if (dev_priv->chipset < 0xa0) {
+		cp_ctx(ctx, 0x401008, 0x4);
+		gr_def(ctx, 0x401014, 0x00001000);
+	} else if (dev_priv->chipset == 0xa0 || dev_priv->chipset >= 0xaa) {
+		cp_ctx(ctx, 0x401008, 0x5);
+		gr_def(ctx, 0x401018, 0x00001000);
+	} else {
+		cp_ctx(ctx, 0x401008, 0x5);
+		gr_def(ctx, 0x401018, 0x00004000);
+	}
+
+	/* 1400 */
+	cp_ctx(ctx, 0x401400, 0x8);
+	cp_ctx(ctx, 0x401424, 0x3);
+	if (dev_priv->chipset == 0x50)
+		gr_def(ctx, 0x40142c, 0x0001fd87);
+	else
+		gr_def(ctx, 0x40142c, 0x00000187);
+	cp_ctx(ctx, 0x401540, 0x5);
+	gr_def(ctx, 0x401550, 0x00001018);
+
+	/* 1800 */
+	cp_ctx(ctx, 0x401814, 0x1);
+	gr_def(ctx, 0x401814, 0x000000ff);
+	if (dev_priv->chipset == 0x50) {
+		cp_ctx(ctx, 0x40181c, 0xe);
+		gr_def(ctx, 0x401850, 0x00000004);
+	} else if (dev_priv->chipset < 0xa0) {
+		cp_ctx(ctx, 0x40181c, 0xf);
+		gr_def(ctx, 0x401854, 0x00000004);
+	} else {
+		cp_ctx(ctx, 0x40181c, 0x13);
+		gr_def(ctx, 0x401864, 0x00000004);
+	}
+
+	/* 1C00 */
+	cp_ctx(ctx, 0x401c00, 0x1);
+	switch (dev_priv->chipset) {
+	case 0x50:
+		gr_def(ctx, 0x401c00, 0x0001005f);
+		break;
+	case 0x84:
+	case 0x86:
+	case 0x94:
+		gr_def(ctx, 0x401c00, 0x044d00df);
+		break;
+	case 0x92:
+	case 0x96:
+	case 0x98:
+	case 0xa0:
+	case 0xaa:
+	case 0xac:
+		gr_def(ctx, 0x401c00, 0x042500df);
+		break;
+	case 0xa5:
+	case 0xa8:
+		gr_def(ctx, 0x401c00, 0x142500df);
+		break;
+	}
+
+	/* 2400 */
+	cp_ctx(ctx, 0x402400, 0x1);
+	if (dev_priv->chipset == 0x50)
+		cp_ctx(ctx, 0x402408, 0x1);
+	else
+		cp_ctx(ctx, 0x402408, 0x2);
+	gr_def(ctx, 0x402408, 0x00000600);
+
+	/* 2800 */
+	cp_ctx(ctx, 0x402800, 0x1);
+	if (dev_priv->chipset == 0x50)
+		gr_def(ctx, 0x402800, 0x00000006);
+
+	/* 2C00 */
+	cp_ctx(ctx, 0x402c08, 0x6);
+	if (dev_priv->chipset != 0x50)
+		gr_def(ctx, 0x402c14, 0x01000000);
+	gr_def(ctx, 0x402c18, 0x000000ff);
+	if (dev_priv->chipset == 0x50)
+		cp_ctx(ctx, 0x402ca0, 0x1);
+	else
+		cp_ctx(ctx, 0x402ca0, 0x2);
+	if (dev_priv->chipset < 0xa0)
+		gr_def(ctx, 0x402ca0, 0x00000400);
+	else if (dev_priv->chipset == 0xa0 || dev_priv->chipset >= 0xaa)
+		gr_def(ctx, 0x402ca0, 0x00000800);
+	else
+		gr_def(ctx, 0x402ca0, 0x00000400);
+	cp_ctx(ctx, 0x402cac, 0x4);
+
+	/* 3000 */
+	cp_ctx(ctx, 0x403004, 0x1);
+	gr_def(ctx, 0x403004, 0x00000001);
+
+	/* 3404 */
+	if (dev_priv->chipset >= 0xa0) {
+		cp_ctx(ctx, 0x403404, 0x1);
+		gr_def(ctx, 0x403404, 0x00000001);
+	}
+
+	/* 5000 */
+	cp_ctx(ctx, 0x405000, 0x1);
+	switch (dev_priv->chipset) {
+	case 0x50:
+		gr_def(ctx, 0x405000, 0x00300080);
+		break;
+	case 0x84:
+	case 0xa0:
+	case 0xa5:
+	case 0xa8:
+	case 0xaa:
+	case 0xac:
+		gr_def(ctx, 0x405000, 0x000e0080);
+		break;
+	case 0x86:
+	case 0x92:
+	case 0x94:
+	case 0x96:
+	case 0x98:
+		gr_def(ctx, 0x405000, 0x00000080);
+		break;
+	}
+	cp_ctx(ctx, 0x405014, 0x1);
+	gr_def(ctx, 0x405014, 0x00000004);
+	cp_ctx(ctx, 0x40501c, 0x1);
+	cp_ctx(ctx, 0x405024, 0x1);
+	cp_ctx(ctx, 0x40502c, 0x1);
+
+	/* 5400 or maybe 4800 */
+	if (dev_priv->chipset == 0x50) {
+		offset = 0x405400;
+		cp_ctx(ctx, 0x405400, 0xea);
+	} else if (dev_priv->chipset < 0x94) {
+		offset = 0x405400;
+		cp_ctx(ctx, 0x405400, 0xcb);
+	} else if (dev_priv->chipset < 0xa0) {
+		offset = 0x405400;
+		cp_ctx(ctx, 0x405400, 0xcc);
+	} else if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa) {
+		offset = 0x404800;
+		cp_ctx(ctx, 0x404800, 0xda);
+	} else {
+		offset = 0x405400;
+		cp_ctx(ctx, 0x405400, 0xd4);
+	}
+	gr_def(ctx, offset + 0x0c, 0x00000002);
+	gr_def(ctx, offset + 0x10, 0x00000001);
+	if (dev_priv->chipset >= 0x94)
+		offset += 4;
+	gr_def(ctx, offset + 0x1c, 0x00000001);
+	gr_def(ctx, offset + 0x20, 0x00000100);
+	gr_def(ctx, offset + 0x38, 0x00000002);
+	gr_def(ctx, offset + 0x3c, 0x00000001);
+	gr_def(ctx, offset + 0x40, 0x00000001);
+	gr_def(ctx, offset + 0x50, 0x00000001);
+	gr_def(ctx, offset + 0x54, 0x003fffff);
+	gr_def(ctx, offset + 0x58, 0x00001fff);
+	gr_def(ctx, offset + 0x60, 0x00000001);
+	gr_def(ctx, offset + 0x64, 0x00000001);
+	gr_def(ctx, offset + 0x6c, 0x00000001);
+	gr_def(ctx, offset + 0x70, 0x00000001);
+	gr_def(ctx, offset + 0x74, 0x00000001);
+	gr_def(ctx, offset + 0x78, 0x00000004);
+	gr_def(ctx, offset + 0x7c, 0x00000001);
+	if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa)
+		offset += 4;
+	gr_def(ctx, offset + 0x80, 0x00000001);
+	gr_def(ctx, offset + 0x84, 0x00000001);
+	gr_def(ctx, offset + 0x88, 0x00000007);
+	gr_def(ctx, offset + 0x8c, 0x00000001);
+	gr_def(ctx, offset + 0x90, 0x00000007);
+	gr_def(ctx, offset + 0x94, 0x00000001);
+	gr_def(ctx, offset + 0x98, 0x00000001);
+	gr_def(ctx, offset + 0x9c, 0x00000001);
+	if (dev_priv->chipset == 0x50) {
+		 gr_def(ctx, offset + 0xb0, 0x00000001);
+		 gr_def(ctx, offset + 0xb4, 0x00000001);
+		 gr_def(ctx, offset + 0xbc, 0x00000001);
+		 gr_def(ctx, offset + 0xc0, 0x0000000a);
+		 gr_def(ctx, offset + 0xd0, 0x00000040);
+		 gr_def(ctx, offset + 0xd8, 0x00000002);
+		 gr_def(ctx, offset + 0xdc, 0x00000100);
+		 gr_def(ctx, offset + 0xe0, 0x00000001);
+		 gr_def(ctx, offset + 0xe4, 0x00000100);
+		 gr_def(ctx, offset + 0x100, 0x00000001);
+		 gr_def(ctx, offset + 0x124, 0x00000004);
+		 gr_def(ctx, offset + 0x13c, 0x00000001);
+		 gr_def(ctx, offset + 0x140, 0x00000100);
+		 gr_def(ctx, offset + 0x148, 0x00000001);
+		 gr_def(ctx, offset + 0x154, 0x00000100);
+		 gr_def(ctx, offset + 0x158, 0x00000001);
+		 gr_def(ctx, offset + 0x15c, 0x00000100);
+		 gr_def(ctx, offset + 0x164, 0x00000001);
+		 gr_def(ctx, offset + 0x170, 0x00000100);
+		 gr_def(ctx, offset + 0x174, 0x00000001);
+		 gr_def(ctx, offset + 0x17c, 0x00000001);
+		 gr_def(ctx, offset + 0x188, 0x00000002);
+		 gr_def(ctx, offset + 0x190, 0x00000001);
+		 gr_def(ctx, offset + 0x198, 0x00000001);
+		 gr_def(ctx, offset + 0x1ac, 0x00000003);
+		 offset += 0xd0;
+	} else {
+		gr_def(ctx, offset + 0xb0, 0x00000001);
+		gr_def(ctx, offset + 0xb4, 0x00000100);
+		gr_def(ctx, offset + 0xbc, 0x00000001);
+		gr_def(ctx, offset + 0xc8, 0x00000100);
+		gr_def(ctx, offset + 0xcc, 0x00000001);
+		gr_def(ctx, offset + 0xd0, 0x00000100);
+		gr_def(ctx, offset + 0xd8, 0x00000001);
+		gr_def(ctx, offset + 0xe4, 0x00000100);
+	}
+	gr_def(ctx, offset + 0xf8, 0x00000004);
+	gr_def(ctx, offset + 0xfc, 0x00000070);
+	gr_def(ctx, offset + 0x100, 0x00000080);
+	if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa)
+		offset += 4;
+	gr_def(ctx, offset + 0x114, 0x0000000c);
+	if (dev_priv->chipset == 0x50)
+		offset -= 4;
+	gr_def(ctx, offset + 0x11c, 0x00000008);
+	gr_def(ctx, offset + 0x120, 0x00000014);
+	if (dev_priv->chipset == 0x50) {
+		gr_def(ctx, offset + 0x124, 0x00000026);
+		offset -= 0x18;
+	} else {
+		gr_def(ctx, offset + 0x128, 0x00000029);
+		gr_def(ctx, offset + 0x12c, 0x00000027);
+		gr_def(ctx, offset + 0x130, 0x00000026);
+		gr_def(ctx, offset + 0x134, 0x00000008);
+		gr_def(ctx, offset + 0x138, 0x00000004);
+		gr_def(ctx, offset + 0x13c, 0x00000027);
+	}
+	gr_def(ctx, offset + 0x148, 0x00000001);
+	gr_def(ctx, offset + 0x14c, 0x00000002);
+	gr_def(ctx, offset + 0x150, 0x00000003);
+	gr_def(ctx, offset + 0x154, 0x00000004);
+	gr_def(ctx, offset + 0x158, 0x00000005);
+	gr_def(ctx, offset + 0x15c, 0x00000006);
+	gr_def(ctx, offset + 0x160, 0x00000007);
+	gr_def(ctx, offset + 0x164, 0x00000001);
+	gr_def(ctx, offset + 0x1a8, 0x000000cf);
+	if (dev_priv->chipset == 0x50)
+		offset -= 4;
+	gr_def(ctx, offset + 0x1d8, 0x00000080);
+	gr_def(ctx, offset + 0x1dc, 0x00000004);
+	gr_def(ctx, offset + 0x1e0, 0x00000004);
+	if (dev_priv->chipset == 0x50)
+		offset -= 4;
+	else
+		gr_def(ctx, offset + 0x1e4, 0x00000003);
+	if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa) {
+		gr_def(ctx, offset + 0x1ec, 0x00000003);
+		offset += 8;
+	}
+	gr_def(ctx, offset + 0x1e8, 0x00000001);
+	if (dev_priv->chipset == 0x50)
+		offset -= 4;
+	gr_def(ctx, offset + 0x1f4, 0x00000012);
+	gr_def(ctx, offset + 0x1f8, 0x00000010);
+	gr_def(ctx, offset + 0x1fc, 0x0000000c);
+	gr_def(ctx, offset + 0x200, 0x00000001);
+	gr_def(ctx, offset + 0x210, 0x00000004);
+	gr_def(ctx, offset + 0x214, 0x00000002);
+	gr_def(ctx, offset + 0x218, 0x00000004);
+	if (dev_priv->chipset >= 0xa0)
+		offset += 4;
+	gr_def(ctx, offset + 0x224, 0x003fffff);
+	gr_def(ctx, offset + 0x228, 0x00001fff);
+	if (dev_priv->chipset == 0x50)
+		offset -= 0x20;
+	else if (dev_priv->chipset >= 0xa0) {
+		gr_def(ctx, offset + 0x250, 0x00000001);
+		gr_def(ctx, offset + 0x254, 0x00000001);
+		gr_def(ctx, offset + 0x258, 0x00000002);
+		offset += 0x10;
+	}
+	gr_def(ctx, offset + 0x250, 0x00000004);
+	gr_def(ctx, offset + 0x254, 0x00000014);
+	gr_def(ctx, offset + 0x258, 0x00000001);
+	if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa)
+		offset += 4;
+	gr_def(ctx, offset + 0x264, 0x00000002);
+	if (dev_priv->chipset >= 0xa0)
+		offset += 8;
+	gr_def(ctx, offset + 0x270, 0x00000001);
+	gr_def(ctx, offset + 0x278, 0x00000002);
+	gr_def(ctx, offset + 0x27c, 0x00001000);
+	if (dev_priv->chipset == 0x50)
+		offset -= 0xc;
+	else {
+		gr_def(ctx, offset + 0x280, 0x00000e00);
+		gr_def(ctx, offset + 0x284, 0x00001000);
+		gr_def(ctx, offset + 0x288, 0x00001e00);
+	}
+	gr_def(ctx, offset + 0x290, 0x00000001);
+	gr_def(ctx, offset + 0x294, 0x00000001);
+	gr_def(ctx, offset + 0x298, 0x00000001);
+	gr_def(ctx, offset + 0x29c, 0x00000001);
+	gr_def(ctx, offset + 0x2a0, 0x00000001);
+	gr_def(ctx, offset + 0x2b0, 0x00000200);
+	if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa) {
+		gr_def(ctx, offset + 0x2b4, 0x00000200);
+		offset += 4;
+	}
+	if (dev_priv->chipset < 0xa0) {
+		gr_def(ctx, offset + 0x2b8, 0x00000001);
+		gr_def(ctx, offset + 0x2bc, 0x00000070);
+		gr_def(ctx, offset + 0x2c0, 0x00000080);
+		gr_def(ctx, offset + 0x2cc, 0x00000001);
+		gr_def(ctx, offset + 0x2d0, 0x00000070);
+		gr_def(ctx, offset + 0x2d4, 0x00000080);
+	} else {
+		gr_def(ctx, offset + 0x2b8, 0x00000001);
+		gr_def(ctx, offset + 0x2bc, 0x000000f0);
+		gr_def(ctx, offset + 0x2c0, 0x000000ff);
+		gr_def(ctx, offset + 0x2cc, 0x00000001);
+		gr_def(ctx, offset + 0x2d0, 0x000000f0);
+		gr_def(ctx, offset + 0x2d4, 0x000000ff);
+		gr_def(ctx, offset + 0x2dc, 0x00000009);
+		offset += 4;
+	}
+	gr_def(ctx, offset + 0x2e4, 0x00000001);
+	gr_def(ctx, offset + 0x2e8, 0x000000cf);
+	gr_def(ctx, offset + 0x2f0, 0x00000001);
+	gr_def(ctx, offset + 0x300, 0x000000cf);
+	gr_def(ctx, offset + 0x308, 0x00000002);
+	gr_def(ctx, offset + 0x310, 0x00000001);
+	gr_def(ctx, offset + 0x318, 0x00000001);
+	gr_def(ctx, offset + 0x320, 0x000000cf);
+	gr_def(ctx, offset + 0x324, 0x000000cf);
+	gr_def(ctx, offset + 0x328, 0x00000001);
+
+	/* 6000? */
+	if (dev_priv->chipset == 0x50)
+		cp_ctx(ctx, 0x4063e0, 0x1);
+
+	/* 6800 */
+	if (dev_priv->chipset < 0x90) {
+		cp_ctx(ctx, 0x406814, 0x2b);
+		gr_def(ctx, 0x406818, 0x00000f80);
+		gr_def(ctx, 0x406860, 0x007f0080);
+		gr_def(ctx, 0x40689c, 0x007f0080);
+	} else {
+		cp_ctx(ctx, 0x406814, 0x4);
+		if (dev_priv->chipset == 0x98)
+			gr_def(ctx, 0x406818, 0x00000f80);
+		else
+			gr_def(ctx, 0x406818, 0x00001f80);
+		if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa)
+			gr_def(ctx, 0x40681c, 0x00000030);
+		cp_ctx(ctx, 0x406830, 0x3);
+	}
+
+	/* 7000: per-ROP group state */
+	for (i = 0; i < 8; i++) {
+		if (units & (1<<(i+16))) {
+			cp_ctx(ctx, 0x407000 + (i<<8), 3);
+			if (dev_priv->chipset == 0x50)
+				gr_def(ctx, 0x407000 + (i<<8), 0x1b74f820);
+			else if (dev_priv->chipset != 0xa5)
+				gr_def(ctx, 0x407000 + (i<<8), 0x3b74f821);
+			else
+				gr_def(ctx, 0x407000 + (i<<8), 0x7b74f821);
+			gr_def(ctx, 0x407004 + (i<<8), 0x89058001);
+
+			if (dev_priv->chipset == 0x50) {
+				cp_ctx(ctx, 0x407010 + (i<<8), 1);
+			} else if (dev_priv->chipset < 0xa0) {
+				cp_ctx(ctx, 0x407010 + (i<<8), 2);
+				gr_def(ctx, 0x407010 + (i<<8), 0x00001000);
+				gr_def(ctx, 0x407014 + (i<<8), 0x0000001f);
+			} else {
+				cp_ctx(ctx, 0x407010 + (i<<8), 3);
+				gr_def(ctx, 0x407010 + (i<<8), 0x00001000);
+				if (dev_priv->chipset != 0xa5)
+					gr_def(ctx, 0x407014 + (i<<8), 0x000000ff);
+				else
+					gr_def(ctx, 0x407014 + (i<<8), 0x000001ff);
+			}
+
+			cp_ctx(ctx, 0x407080 + (i<<8), 4);
+			if (dev_priv->chipset != 0xa5)
+				gr_def(ctx, 0x407080 + (i<<8), 0x027c10fa);
+			else
+				gr_def(ctx, 0x407080 + (i<<8), 0x827c10fa);
+			if (dev_priv->chipset == 0x50)
+				gr_def(ctx, 0x407084 + (i<<8), 0x000000c0);
+			else
+				gr_def(ctx, 0x407084 + (i<<8), 0x400000c0);
+			gr_def(ctx, 0x407088 + (i<<8), 0xb7892080);
+
+			if (dev_priv->chipset < 0xa0)
+				cp_ctx(ctx, 0x407094 + (i<<8), 1);
+			else if (dev_priv->chipset <= 0xa0 || dev_priv->chipset >= 0xaa)
+				cp_ctx(ctx, 0x407094 + (i<<8), 3);
+			else {
+				cp_ctx(ctx, 0x407094 + (i<<8), 4);
+				gr_def(ctx, 0x4070a0 + (i<<8), 1);
+			}
+		}
+	}
+
+	cp_ctx(ctx, 0x407c00, 0x3);
+	if (dev_priv->chipset < 0x90)
+		gr_def(ctx, 0x407c00, 0x00010040);
+	else if (dev_priv->chipset < 0xa0)
+		gr_def(ctx, 0x407c00, 0x00390040);
+	else
+		gr_def(ctx, 0x407c00, 0x003d0040);
+	gr_def(ctx, 0x407c08, 0x00000022);
+	if (dev_priv->chipset >= 0xa0) {
+		cp_ctx(ctx, 0x407c10, 0x3);
+		cp_ctx(ctx, 0x407c20, 0x1);
+		cp_ctx(ctx, 0x407c2c, 0x1);
+	}
+
+	if (dev_priv->chipset < 0xa0) {
+		cp_ctx(ctx, 0x407d00, 0x9);
+	} else {
+		cp_ctx(ctx, 0x407d00, 0x15);
+	}
+	if (dev_priv->chipset == 0x98)
+		gr_def(ctx, 0x407d08, 0x00380040);
+	else {
+		if (dev_priv->chipset < 0x90)
+			gr_def(ctx, 0x407d08, 0x00010040);
+		else if (dev_priv->chipset < 0xa0)
+			gr_def(ctx, 0x407d08, 0x00390040);
+		else
+			gr_def(ctx, 0x407d08, 0x003d0040);
+		gr_def(ctx, 0x407d0c, 0x00000022);
+	}
+
+	/* 8000+: per-TP state */
+	for (i = 0; i < 10; i++) {
+		if (units & (1<<i)) {
+			if (dev_priv->chipset < 0xa0)
+				base = 0x408000 + (i<<12);
+			else
+				base = 0x408000 + (i<<11);
+			if (dev_priv->chipset < 0xa0)
+				offset = base + 0xc00;
+			else
+				offset = base + 0x80;
+			cp_ctx(ctx, offset + 0x00, 1);
+			gr_def(ctx, offset + 0x00, 0x0000ff0a);
+			cp_ctx(ctx, offset + 0x08, 1);
+
+			/* per-MP state */
+			for (j = 0; j < (dev_priv->chipset < 0xa0 ? 2 : 4); j++) {
+				if (!(units & (1 << (j+24)))) continue;
+				if (dev_priv->chipset < 0xa0)
+					offset = base + 0x200 + (j<<7);
+				else
+					offset = base + 0x100 + (j<<7);
+				cp_ctx(ctx, offset, 0x20);
+				gr_def(ctx, offset + 0x00, 0x01800000);
+				gr_def(ctx, offset + 0x04, 0x00160000);
+				gr_def(ctx, offset + 0x08, 0x01800000);
+				gr_def(ctx, offset + 0x18, 0x0003ffff);
+				switch (dev_priv->chipset) {
+				case 0x50:
+					gr_def(ctx, offset + 0x1c, 0x00080000);
+					break;
+				case 0x84:
+					gr_def(ctx, offset + 0x1c, 0x00880000);
+					break;
+				case 0x86:
+					gr_def(ctx, offset + 0x1c, 0x008c0000);
+					break;
+				case 0x92:
+				case 0x96:
+				case 0x98:
+					gr_def(ctx, offset + 0x1c, 0x118c0000);
+					break;
+				case 0x94:
+					gr_def(ctx, offset + 0x1c, 0x10880000);
+					break;
+				case 0xa0:
+				case 0xa5:
+					gr_def(ctx, offset + 0x1c, 0x310c0000);
+					break;
+				case 0xa8:
+				case 0xaa:
+				case 0xac:
+					gr_def(ctx, offset + 0x1c, 0x300c0000);
+					break;
+				}
+				gr_def(ctx, offset + 0x40, 0x00010401);
+				if (dev_priv->chipset == 0x50)
+					gr_def(ctx, offset + 0x48, 0x00000040);
+				else
+					gr_def(ctx, offset + 0x48, 0x00000078);
+				gr_def(ctx, offset + 0x50, 0x000000bf);
+				gr_def(ctx, offset + 0x58, 0x00001210);
+				if (dev_priv->chipset == 0x50)
+					gr_def(ctx, offset + 0x5c, 0x00000080);
+				else
+					gr_def(ctx, offset + 0x5c, 0x08000080);
+				if (dev_priv->chipset >= 0xa0)
+					gr_def(ctx, offset + 0x68, 0x0000003e);
+			}
+
+			if (dev_priv->chipset < 0xa0)
+				cp_ctx(ctx, base + 0x300, 0x4);
+			else
+				cp_ctx(ctx, base + 0x300, 0x5);
+			if (dev_priv->chipset == 0x50)
+				gr_def(ctx, base + 0x304, 0x00007070);
+			else if (dev_priv->chipset < 0xa0)
+				gr_def(ctx, base + 0x304, 0x00027070);
+			else if (dev_priv->chipset <= 0xa0 || dev_priv->chipset >= 0xaa)
+				gr_def(ctx, base + 0x304, 0x01127070);
+			else
+				gr_def(ctx, base + 0x304, 0x05127070);
+
+			if (dev_priv->chipset < 0xa0)
+				cp_ctx(ctx, base + 0x318, 1);
+			else
+				cp_ctx(ctx, base + 0x320, 1);
+			if (dev_priv->chipset == 0x50)
+				gr_def(ctx, base + 0x318, 0x0003ffff);
+			else if (dev_priv->chipset < 0xa0)
+				gr_def(ctx, base + 0x318, 0x03ffffff);
+			else
+				gr_def(ctx, base + 0x320, 0x07ffffff);
+
+			if (dev_priv->chipset < 0xa0)
+				cp_ctx(ctx, base + 0x324, 5);
+			else
+				cp_ctx(ctx, base + 0x328, 4);
+
+			if (dev_priv->chipset < 0xa0) {
+				cp_ctx(ctx, base + 0x340, 9);
+				offset = base + 0x340;
+			} else if (dev_priv->chipset <= 0xa0 || dev_priv->chipset >= 0xaa) {
+				cp_ctx(ctx, base + 0x33c, 0xb);
+				offset = base + 0x344;
+			} else {
+				cp_ctx(ctx, base + 0x33c, 0xd);
+				offset = base + 0x344;
+			}
+			gr_def(ctx, offset + 0x0, 0x00120407);
+			gr_def(ctx, offset + 0x4, 0x05091507);
+			if (dev_priv->chipset == 0x84)
+				gr_def(ctx, offset + 0x8, 0x05100202);
+			else
+				gr_def(ctx, offset + 0x8, 0x05010202);
+			gr_def(ctx, offset + 0xc, 0x00030201);
+
+			cp_ctx(ctx, base + 0x400, 2);
+			gr_def(ctx, base + 0x404, 0x00000040);
+			cp_ctx(ctx, base + 0x40c, 2);
+			gr_def(ctx, base + 0x40c, 0x0d0c0b0a);
+			gr_def(ctx, base + 0x410, 0x00141210);
+
+			if (dev_priv->chipset < 0xa0)
+				offset = base + 0x800;
+			else
+				offset = base + 0x500;
+			cp_ctx(ctx, offset, 6);
+			gr_def(ctx, offset + 0x0, 0x000001f0);
+			gr_def(ctx, offset + 0x4, 0x00000001);
+			gr_def(ctx, offset + 0x8, 0x00000003);
+			if (dev_priv->chipset == 0x50 || dev_priv->chipset >= 0xaa)
+				gr_def(ctx, offset + 0xc, 0x00008000);
+			gr_def(ctx, offset + 0x14, 0x00039e00);
+			cp_ctx(ctx, offset + 0x1c, 2);
+			if (dev_priv->chipset == 0x50)
+				gr_def(ctx, offset + 0x1c, 0x00000040);
+			else
+				gr_def(ctx, offset + 0x1c, 0x00000100);
+			gr_def(ctx, offset + 0x20, 0x00003800);
+
+			if (dev_priv->chipset >= 0xa0) {
+				cp_ctx(ctx, base + 0x54c, 2);
+				if (dev_priv->chipset <= 0xa0 || dev_priv->chipset >= 0xaa)
+					gr_def(ctx, base + 0x54c, 0x003fe006);
+				else
+					gr_def(ctx, base + 0x54c, 0x003fe007);
+				gr_def(ctx, base + 0x550, 0x003fe000);
+			}
+
+			if (dev_priv->chipset < 0xa0)
+				offset = base + 0xa00;
+			else
+				offset = base + 0x680;
+			cp_ctx(ctx, offset, 1);
+			gr_def(ctx, offset, 0x00404040);
+
+			if (dev_priv->chipset < 0xa0)
+				offset = base + 0xe00;
+			else
+				offset = base + 0x700;
+			cp_ctx(ctx, offset, 2);
+			if (dev_priv->chipset < 0xa0)
+				gr_def(ctx, offset, 0x0077f005);
+			else if (dev_priv->chipset == 0xa5)
+				gr_def(ctx, offset, 0x6cf7f007);
+			else if (dev_priv->chipset == 0xa8)
+				gr_def(ctx, offset, 0x6cfff007);
+			else if (dev_priv->chipset == 0xac)
+				gr_def(ctx, offset, 0x0cfff007);
+			else
+				gr_def(ctx, offset, 0x0cf7f007);
+			if (dev_priv->chipset == 0x50)
+				gr_def(ctx, offset + 0x4, 0x00007fff);
+			else if (dev_priv->chipset < 0xa0)
+				gr_def(ctx, offset + 0x4, 0x003f7fff);
+			else
+				gr_def(ctx, offset + 0x4, 0x02bf7fff);
+			cp_ctx(ctx, offset + 0x2c, 1);
+			if (dev_priv->chipset == 0x50) {
+				cp_ctx(ctx, offset + 0x50, 9);
+				gr_def(ctx, offset + 0x54, 0x000003ff);
+				gr_def(ctx, offset + 0x58, 0x00000003);
+				gr_def(ctx, offset + 0x5c, 0x00000003);
+				gr_def(ctx, offset + 0x60, 0x000001ff);
+				gr_def(ctx, offset + 0x64, 0x0000001f);
+				gr_def(ctx, offset + 0x68, 0x0000000f);
+				gr_def(ctx, offset + 0x6c, 0x0000000f);
+			} else if(dev_priv->chipset < 0xa0) {
+				cp_ctx(ctx, offset + 0x50, 1);
+				cp_ctx(ctx, offset + 0x70, 1);
+			} else {
+				cp_ctx(ctx, offset + 0x50, 1);
+				cp_ctx(ctx, offset + 0x60, 5);
+			}
+		}
+	}
+}
+
+/*
+ * xfer areas. These are a pain.
+ *
+ * There are 2 xfer areas: the first one is big and contains all sorts of
+ * stuff, the second is small and contains some per-TP context.
+ *
+ * Each area is split into 8 "strands". The areas, when saved to grctx,
+ * are made of 8-word blocks. Each block contains a single word from
+ * each strand. The strands are independent of each other, their
+ * addresses are unrelated to each other, and data in them is closely
+ * packed together. The strand layout varies a bit between cards: here
+ * and there, a single word is thrown out in the middle and the whole
+ * strand is offset by a bit from corresponding one on another chipset.
+ * For this reason, addresses of stuff in strands are almost useless.
+ * Knowing sequence of stuff and size of gaps between them is much more
+ * useful, and that's how we build the strands in our generator.
+ *
+ * NVA0 takes this mess to a whole new level by cutting the old strands
+ * into a few dozen pieces [known as genes], rearranging them randomly,
+ * and putting them back together to make new strands. Hopefully these
+ * genes correspond more or less directly to the same PGRAPH subunits
+ * as in 400040 register.
+ *
+ * The most common value in default context is 0, and when the genes
+ * are separated by 0's, gene bounduaries are quite speculative...
+ * some of them can be clearly deduced, others can be guessed, and yet
+ * others won't be resolved without figuring out the real meaning of
+ * given ctxval. For the same reason, ending point of each strand
+ * is unknown. Except for strand 0, which is the longest strand and
+ * its end corresponds to end of the whole xfer.
+ *
+ * An unsolved mystery is the seek instruction: it takes an argument
+ * in bits 8-18, and that argument is clearly the place in strands to
+ * seek to... but the offsets don't seem to correspond to offsets as
+ * seen in grctx. Perhaps there's another, real, not randomly-changing
+ * addressing in strands, and the xfer insn just happens to skip over
+ * the unused bits? NV10-NV30 PIPE comes to mind...
+ *
+ * As far as I know, there's no way to access the xfer areas directly
+ * without the help of ctxprog.
+ */
+
+static inline void
+xf_emit(struct nouveau_grctx *ctx, int num, uint32_t val) {
+	int i;
+	if (val && ctx->mode == NOUVEAU_GRCTX_VALS)
+		for (i = 0; i < num; i++)
+			nv_wo32(ctx->dev, ctx->data, ctx->ctxvals_pos + (i << 3), val);
+	ctx->ctxvals_pos += num << 3;
+}
+
+/* Gene declarations... */
+
+static void nv50_graph_construct_gene_m2mf(struct nouveau_grctx *ctx);
+static void nv50_graph_construct_gene_unk1(struct nouveau_grctx *ctx);
+static void nv50_graph_construct_gene_unk2(struct nouveau_grctx *ctx);
+static void nv50_graph_construct_gene_unk3(struct nouveau_grctx *ctx);
+static void nv50_graph_construct_gene_unk4(struct nouveau_grctx *ctx);
+static void nv50_graph_construct_gene_unk5(struct nouveau_grctx *ctx);
+static void nv50_graph_construct_gene_unk6(struct nouveau_grctx *ctx);
+static void nv50_graph_construct_gene_unk7(struct nouveau_grctx *ctx);
+static void nv50_graph_construct_gene_unk8(struct nouveau_grctx *ctx);
+static void nv50_graph_construct_gene_unk9(struct nouveau_grctx *ctx);
+static void nv50_graph_construct_gene_unk10(struct nouveau_grctx *ctx);
+static void nv50_graph_construct_gene_ropc(struct nouveau_grctx *ctx);
+static void nv50_graph_construct_xfer_tp(struct nouveau_grctx *ctx);
+
+static void
+nv50_graph_construct_xfer1(struct nouveau_grctx *ctx)
+{
+	struct drm_nouveau_private *dev_priv = ctx->dev->dev_private;
+	int i;
+	int offset;
+	int size = 0;
+	uint32_t units = nv_rd32 (ctx->dev, 0x1540);
+
+	offset = (ctx->ctxvals_pos+0x3f)&~0x3f;
+	ctx->ctxvals_base = offset;
+
+	if (dev_priv->chipset < 0xa0) {
+		/* Strand 0 */
+		ctx->ctxvals_pos = offset;
+		switch (dev_priv->chipset) {
+		case 0x50:
+			xf_emit(ctx, 0x99, 0);
+			break;
+		case 0x84:
+		case 0x86:
+			xf_emit(ctx, 0x384, 0);
+			break;
+		case 0x92:
+		case 0x94:
+		case 0x96:
+		case 0x98:
+			xf_emit(ctx, 0x380, 0);
+			break;
+		}
+		nv50_graph_construct_gene_m2mf (ctx);
+		switch (dev_priv->chipset) {
+		case 0x50:
+		case 0x84:
+		case 0x86:
+		case 0x98:
+			xf_emit(ctx, 0x4c4, 0);
+			break;
+		case 0x92:
+		case 0x94:
+		case 0x96:
+			xf_emit(ctx, 0x984, 0);
+			break;
+		}
+		nv50_graph_construct_gene_unk5(ctx);
+		if (dev_priv->chipset == 0x50)
+			xf_emit(ctx, 0xa, 0);
+		else
+			xf_emit(ctx, 0xb, 0);
+		nv50_graph_construct_gene_unk4(ctx);
+		nv50_graph_construct_gene_unk3(ctx);
+		if ((ctx->ctxvals_pos-offset)/8 > size)
+			size = (ctx->ctxvals_pos-offset)/8;
+
+		/* Strand 1 */
+		ctx->ctxvals_pos = offset + 0x1;
+		nv50_graph_construct_gene_unk6(ctx);
+		nv50_graph_construct_gene_unk7(ctx);
+		nv50_graph_construct_gene_unk8(ctx);
+		switch (dev_priv->chipset) {
+		case 0x50:
+		case 0x92:
+			xf_emit(ctx, 0xfb, 0);
+			break;
+		case 0x84:
+			xf_emit(ctx, 0xd3, 0);
+			break;
+		case 0x94:
+		case 0x96:
+			xf_emit(ctx, 0xab, 0);
+			break;
+		case 0x86:
+		case 0x98:
+			xf_emit(ctx, 0x6b, 0);
+			break;
+		}
+		xf_emit(ctx, 2, 0x4e3bfdf);
+		xf_emit(ctx, 4, 0);
+		xf_emit(ctx, 1, 0x0fac6881);
+		xf_emit(ctx, 0xb, 0);
+		xf_emit(ctx, 2, 0x4e3bfdf);
+		if ((ctx->ctxvals_pos-offset)/8 > size)
+			size = (ctx->ctxvals_pos-offset)/8;
+
+		/* Strand 2 */
+		ctx->ctxvals_pos = offset + 0x2;
+		switch (dev_priv->chipset) {
+		case 0x50:
+		case 0x92:
+			xf_emit(ctx, 0xa80, 0);
+			break;
+		case 0x84:
+			xf_emit(ctx, 0xa7e, 0);
+			break;
+		case 0x94:
+		case 0x96:
+			xf_emit(ctx, 0xa7c, 0);
+			break;
+		case 0x86:
+		case 0x98:
+			xf_emit(ctx, 0xa7a, 0);
+			break;
+		}
+		xf_emit(ctx, 1, 0x3fffff);
+		xf_emit(ctx, 2, 0);
+		xf_emit(ctx, 1, 0x1fff);
+		xf_emit(ctx, 0xe, 0);
+		nv50_graph_construct_gene_unk9(ctx);
+		nv50_graph_construct_gene_unk2(ctx);
+		nv50_graph_construct_gene_unk1(ctx);
+		nv50_graph_construct_gene_unk10(ctx);
+		if ((ctx->ctxvals_pos-offset)/8 > size)
+			size = (ctx->ctxvals_pos-offset)/8;
+
+		/* Strand 3: per-ROP group state */
+		ctx->ctxvals_pos = offset + 3;
+		for (i = 0; i < 6; i++)
+			if (units & (1 << (i + 16)))
+				nv50_graph_construct_gene_ropc(ctx);
+		if ((ctx->ctxvals_pos-offset)/8 > size)
+			size = (ctx->ctxvals_pos-offset)/8;
+
+		/* Strands 4-7: per-TP state */
+		for (i = 0; i < 4; i++) {
+			ctx->ctxvals_pos = offset + 4 + i;
+			if (units & (1 << (2 * i)))
+				nv50_graph_construct_xfer_tp(ctx);
+			if (units & (1 << (2 * i + 1)))
+				nv50_graph_construct_xfer_tp(ctx);
+			if ((ctx->ctxvals_pos-offset)/8 > size)
+				size = (ctx->ctxvals_pos-offset)/8;
+		}
+	} else {
+		/* Strand 0 */
+		ctx->ctxvals_pos = offset;
+		if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa)
+			xf_emit(ctx, 0x385, 0);
+		else
+			xf_emit(ctx, 0x384, 0);
+		nv50_graph_construct_gene_m2mf(ctx);
+		xf_emit(ctx, 0x950, 0);
+		nv50_graph_construct_gene_unk10(ctx);
+		xf_emit(ctx, 1, 0x0fac6881);
+		if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa) {
+			xf_emit(ctx, 1, 1);
+			xf_emit(ctx, 3, 0);
+		}
+		nv50_graph_construct_gene_unk8(ctx);
+		if (dev_priv->chipset == 0xa0)
+			xf_emit(ctx, 0x189, 0);
+		else if (dev_priv->chipset < 0xa8)
+			xf_emit(ctx, 0x99, 0);
+		else if (dev_priv->chipset == 0xaa)
+			xf_emit(ctx, 0x65, 0);
+		else
+			xf_emit(ctx, 0x6d, 0);
+		nv50_graph_construct_gene_unk9(ctx);
+		if ((ctx->ctxvals_pos-offset)/8 > size)
+			size = (ctx->ctxvals_pos-offset)/8;
+
+		/* Strand 1 */
+		ctx->ctxvals_pos = offset + 1;
+		nv50_graph_construct_gene_unk1(ctx);
+		if ((ctx->ctxvals_pos-offset)/8 > size)
+			size = (ctx->ctxvals_pos-offset)/8;
+
+		/* Strand 2 */
+		ctx->ctxvals_pos = offset + 2;
+		if (dev_priv->chipset == 0xa0) {
+			nv50_graph_construct_gene_unk2(ctx);
+		}
+		xf_emit(ctx, 0x36, 0);
+		nv50_graph_construct_gene_unk5(ctx);
+		if ((ctx->ctxvals_pos-offset)/8 > size)
+			size = (ctx->ctxvals_pos-offset)/8;
+
+		/* Strand 3 */
+		ctx->ctxvals_pos = offset + 3;
+		xf_emit(ctx, 1, 0);
+		xf_emit(ctx, 1, 1);
+		nv50_graph_construct_gene_unk6(ctx);
+		if ((ctx->ctxvals_pos-offset)/8 > size)
+			size = (ctx->ctxvals_pos-offset)/8;
+
+		/* Strand 4 */
+		ctx->ctxvals_pos = offset + 4;
+		if (dev_priv->chipset == 0xa0)
+			xf_emit(ctx, 0xa80, 0);
+		else
+			xf_emit(ctx, 0xa7a, 0);
+		xf_emit(ctx, 1, 0x3fffff);
+		xf_emit(ctx, 2, 0);
+		xf_emit(ctx, 1, 0x1fff);
+		if ((ctx->ctxvals_pos-offset)/8 > size)
+			size = (ctx->ctxvals_pos-offset)/8;
+
+		/* Strand 5 */
+		ctx->ctxvals_pos = offset + 5;
+		xf_emit(ctx, 1, 0);
+		xf_emit(ctx, 1, 0x0fac6881);
+		xf_emit(ctx, 0xb, 0);
+		xf_emit(ctx, 2, 0x4e3bfdf);
+		xf_emit(ctx, 3, 0);
+		if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa)
+			xf_emit(ctx, 1, 0x11);
+		xf_emit(ctx, 1, 0);
+		xf_emit(ctx, 2, 0x4e3bfdf);
+		xf_emit(ctx, 2, 0);
+		if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa)
+			xf_emit(ctx, 1, 0x11);
+		xf_emit(ctx, 1, 0);
+		for (i = 0; i < 8; i++)
+			if (units & (1<<(i+16)))
+				nv50_graph_construct_gene_ropc(ctx);
+		if ((ctx->ctxvals_pos-offset)/8 > size)
+			size = (ctx->ctxvals_pos-offset)/8;
+
+		/* Strand 6 */
+		ctx->ctxvals_pos = offset + 6;
+		nv50_graph_construct_gene_unk3(ctx);
+		xf_emit(ctx, 0xb, 0);
+		nv50_graph_construct_gene_unk4(ctx);
+		nv50_graph_construct_gene_unk7(ctx);
+		if (units & (1 << 0))
+			nv50_graph_construct_xfer_tp(ctx);
+		if (units & (1 << 1))
+			nv50_graph_construct_xfer_tp(ctx);
+		if (units & (1 << 2))
+			nv50_graph_construct_xfer_tp(ctx);
+		if (units & (1 << 3))
+			nv50_graph_construct_xfer_tp(ctx);
+		if ((ctx->ctxvals_pos-offset)/8 > size)
+			size = (ctx->ctxvals_pos-offset)/8;
+
+		/* Strand 7 */
+		ctx->ctxvals_pos = offset + 7;
+		if (dev_priv->chipset == 0xa0) {
+			if (units & (1 << 4))
+				nv50_graph_construct_xfer_tp(ctx);
+			if (units & (1 << 5))
+				nv50_graph_construct_xfer_tp(ctx);
+			if (units & (1 << 6))
+				nv50_graph_construct_xfer_tp(ctx);
+			if (units & (1 << 7))
+				nv50_graph_construct_xfer_tp(ctx);
+			if (units & (1 << 8))
+				nv50_graph_construct_xfer_tp(ctx);
+			if (units & (1 << 9))
+				nv50_graph_construct_xfer_tp(ctx);
+		} else {
+			nv50_graph_construct_gene_unk2(ctx);
+		}
+		if ((ctx->ctxvals_pos-offset)/8 > size)
+			size = (ctx->ctxvals_pos-offset)/8;
+	}
+
+	ctx->ctxvals_pos = offset + size * 8;
+	ctx->ctxvals_pos = (ctx->ctxvals_pos+0x3f)&~0x3f;
+	cp_lsr (ctx, offset);
+	cp_out (ctx, CP_SET_XFER_POINTER);
+	cp_lsr (ctx, size);
+	cp_out (ctx, CP_SEEK_1);
+	cp_out (ctx, CP_XFER_1);
+	cp_wait(ctx, XFER, BUSY);
+}
+
+/*
+ * non-trivial demagiced parts of ctx init go here
+ */
+
+static void
+nv50_graph_construct_gene_m2mf(struct nouveau_grctx *ctx)
+{
+	/* m2mf state */
+	xf_emit (ctx, 1, 0);		/* DMA_NOTIFY instance >> 4 */
+	xf_emit (ctx, 1, 0);		/* DMA_BUFFER_IN instance >> 4 */
+	xf_emit (ctx, 1, 0);		/* DMA_BUFFER_OUT instance >> 4 */
+	xf_emit (ctx, 1, 0);		/* OFFSET_IN */
+	xf_emit (ctx, 1, 0);		/* OFFSET_OUT */
+	xf_emit (ctx, 1, 0);		/* PITCH_IN */
+	xf_emit (ctx, 1, 0);		/* PITCH_OUT */
+	xf_emit (ctx, 1, 0);		/* LINE_LENGTH */
+	xf_emit (ctx, 1, 0);		/* LINE_COUNT */
+	xf_emit (ctx, 1, 0x21);		/* FORMAT: bits 0-4 INPUT_INC, bits 5-9 OUTPUT_INC */
+	xf_emit (ctx, 1, 1);		/* LINEAR_IN */
+	xf_emit (ctx, 1, 0x2);		/* TILING_MODE_IN: bits 0-2 y tiling, bits 3-5 z tiling */
+	xf_emit (ctx, 1, 0x100);	/* TILING_PITCH_IN */
+	xf_emit (ctx, 1, 0x100);	/* TILING_HEIGHT_IN */
+	xf_emit (ctx, 1, 1);		/* TILING_DEPTH_IN */
+	xf_emit (ctx, 1, 0);		/* TILING_POSITION_IN_Z */
+	xf_emit (ctx, 1, 0);		/* TILING_POSITION_IN */
+	xf_emit (ctx, 1, 1);		/* LINEAR_OUT */
+	xf_emit (ctx, 1, 0x2);		/* TILING_MODE_OUT: bits 0-2 y tiling, bits 3-5 z tiling */
+	xf_emit (ctx, 1, 0x100);	/* TILING_PITCH_OUT */
+	xf_emit (ctx, 1, 0x100);	/* TILING_HEIGHT_OUT */
+	xf_emit (ctx, 1, 1);		/* TILING_DEPTH_OUT */
+	xf_emit (ctx, 1, 0);		/* TILING_POSITION_OUT_Z */
+	xf_emit (ctx, 1, 0);		/* TILING_POSITION_OUT */
+	xf_emit (ctx, 1, 0);		/* OFFSET_IN_HIGH */
+	xf_emit (ctx, 1, 0);		/* OFFSET_OUT_HIGH */
+}
+
+static void
+nv50_graph_construct_gene_unk1(struct nouveau_grctx *ctx)
+{
+	struct drm_nouveau_private *dev_priv = ctx->dev->dev_private;
+	/* end of area 2 on pre-NVA0, area 1 on NVAx */
+	xf_emit(ctx, 2, 4);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 0x80);
+	xf_emit(ctx, 1, 4);
+	xf_emit(ctx, 1, 0x80c14);
+	xf_emit(ctx, 1, 0);
+	if (dev_priv->chipset == 0x50)
+		xf_emit(ctx, 1, 0x3ff);
+	else
+		xf_emit(ctx, 1, 0x7ff);
+	switch (dev_priv->chipset) {
+	case 0x50:
+	case 0x86:
+	case 0x98:
+	case 0xaa:
+	case 0xac:
+		xf_emit(ctx, 0x542, 0);
+		break;
+	case 0x84:
+	case 0x92:
+	case 0x94:
+	case 0x96:
+		xf_emit(ctx, 0x942, 0);
+		break;
+	case 0xa0:
+		xf_emit(ctx, 0x2042, 0);
+		break;
+	case 0xa5:
+	case 0xa8:
+		xf_emit(ctx, 0x842, 0);
+		break;
+	}
+	xf_emit(ctx, 2, 4);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 0x80);
+	xf_emit(ctx, 1, 4);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 0x27);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 0x26);
+	xf_emit(ctx, 3, 0);
+}
+
+static void
+nv50_graph_construct_gene_unk10(struct nouveau_grctx *ctx)
+{
+	/* end of area 2 on pre-NVA0, area 1 on NVAx */
+	xf_emit(ctx, 0x10, 0x04000000);
+	xf_emit(ctx, 0x24, 0);
+	xf_emit(ctx, 2, 0x04e3bfdf);
+	xf_emit(ctx, 2, 0);
+	xf_emit(ctx, 1, 0x1fe21);
+}
+
+static void
+nv50_graph_construct_gene_unk2(struct nouveau_grctx *ctx)
+{
+	struct drm_nouveau_private *dev_priv = ctx->dev->dev_private;
+	/* middle of area 2 on pre-NVA0, beginning of area 2 on NVA0, area 7 on >NVA0 */
+	if (dev_priv->chipset != 0x50) {
+		xf_emit(ctx, 5, 0);
+		xf_emit(ctx, 1, 0x80c14);
+		xf_emit(ctx, 2, 0);
+		xf_emit(ctx, 1, 0x804);
+		xf_emit(ctx, 1, 0);
+		xf_emit(ctx, 2, 4);
+		xf_emit(ctx, 1, 0x8100c12);
+	}
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 2, 4);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 0x10);
+	if (dev_priv->chipset == 0x50)
+		xf_emit(ctx, 3, 0);
+	else
+		xf_emit(ctx, 4, 0);
+	xf_emit(ctx, 1, 0x804);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 1, 0x1a);
+	if (dev_priv->chipset != 0x50)
+		xf_emit(ctx, 1, 0x7f);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 1, 0x80c14);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 0x8100c12);
+	xf_emit(ctx, 2, 4);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 0x10);
+	xf_emit(ctx, 3, 0);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 1, 0x8100c12);
+	xf_emit(ctx, 6, 0);
+	if (dev_priv->chipset == 0x50)
+		xf_emit(ctx, 1, 0x3ff);
+	else
+		xf_emit(ctx, 1, 0x7ff);
+	xf_emit(ctx, 1, 0x80c14);
+	xf_emit(ctx, 0x38, 0);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 2, 0);
+	xf_emit(ctx, 1, 0x10);
+	xf_emit(ctx, 0x38, 0);
+	xf_emit(ctx, 2, 0x88);
+	xf_emit(ctx, 2, 0);
+	xf_emit(ctx, 1, 4);
+	xf_emit(ctx, 0x16, 0);
+	xf_emit(ctx, 1, 0x26);
+	xf_emit(ctx, 2, 0);
+	xf_emit(ctx, 1, 0x3f800000);
+	if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa)
+		xf_emit(ctx, 4, 0);
+	else
+		xf_emit(ctx, 3, 0);
+	xf_emit(ctx, 1, 0x1a);
+	xf_emit(ctx, 1, 0x10);
+	if (dev_priv->chipset != 0x50)
+		xf_emit(ctx, 0x28, 0);
+	else
+		xf_emit(ctx, 0x25, 0);
+	xf_emit(ctx, 1, 0x52);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 0x26);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 2, 4);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 0x1a);
+	xf_emit(ctx, 2, 0);
+	xf_emit(ctx, 1, 0x00ffff00);
+	xf_emit(ctx, 1, 0);
+}
+
+static void
+nv50_graph_construct_gene_unk3(struct nouveau_grctx *ctx)
+{
+	struct drm_nouveau_private *dev_priv = ctx->dev->dev_private;
+	/* end of area 0 on pre-NVA0, beginning of area 6 on NVAx */
+	xf_emit(ctx, 1, 0x3f);
+	xf_emit(ctx, 0xa, 0);
+	xf_emit(ctx, 1, 2);
+	xf_emit(ctx, 2, 0x04000000);
+	xf_emit(ctx, 8, 0);
+	xf_emit(ctx, 1, 4);
+	xf_emit(ctx, 3, 0);
+	xf_emit(ctx, 1, 4);
+	if (dev_priv->chipset == 0x50)
+		xf_emit(ctx, 0x10, 0);
+	else
+		xf_emit(ctx, 0x11, 0);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 1, 0x1001);
+	xf_emit(ctx, 4, 0xffff);
+	xf_emit(ctx, 0x20, 0);
+	xf_emit(ctx, 0x10, 0x3f800000);
+	xf_emit(ctx, 1, 0x10);
+	if (dev_priv->chipset == 0x50)
+		xf_emit(ctx, 1, 0);
+	else
+		xf_emit(ctx, 2, 0);
+	xf_emit(ctx, 1, 3);
+	xf_emit(ctx, 2, 0);
+}
+
+static void
+nv50_graph_construct_gene_unk4(struct nouveau_grctx *ctx)
+{
+	/* middle of area 0 on pre-NVA0, middle of area 6 on NVAx */
+	xf_emit(ctx, 2, 0x04000000);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 0x80);
+	xf_emit(ctx, 3, 0);
+	xf_emit(ctx, 1, 0x80);
+	xf_emit(ctx, 1, 0);
+}
+
+static void
+nv50_graph_construct_gene_unk5(struct nouveau_grctx *ctx)
+{
+	struct drm_nouveau_private *dev_priv = ctx->dev->dev_private;
+	/* middle of area 0 on pre-NVA0 [after m2mf], end of area 2 on NVAx */
+	xf_emit(ctx, 2, 4);
+	if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa)
+		xf_emit(ctx, 0x1c4d, 0);
+	else
+		xf_emit(ctx, 0x1c4b, 0);
+	xf_emit(ctx, 2, 4);
+	xf_emit(ctx, 1, 0x8100c12);
+	if (dev_priv->chipset != 0x50)
+		xf_emit(ctx, 1, 3);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 0x8100c12);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 0x80c14);
+	xf_emit(ctx, 1, 1);
+	if (dev_priv->chipset >= 0xa0)
+		xf_emit(ctx, 2, 4);
+	xf_emit(ctx, 1, 0x80c14);
+	xf_emit(ctx, 2, 0);
+	xf_emit(ctx, 1, 0x8100c12);
+	xf_emit(ctx, 1, 0x27);
+	xf_emit(ctx, 2, 0);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 0x3c1, 0);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 0x16, 0);
+	xf_emit(ctx, 1, 0x8100c12);
+	xf_emit(ctx, 1, 0);
+}
+
+static void
+nv50_graph_construct_gene_unk6(struct nouveau_grctx *ctx)
+{
+	struct drm_nouveau_private *dev_priv = ctx->dev->dev_private;
+	/* beginning of area 1 on pre-NVA0 [after m2mf], area 3 on NVAx */
+	xf_emit(ctx, 4, 0);
+	xf_emit(ctx, 1, 0xf);
+	if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa)
+		xf_emit(ctx, 8, 0);
+	else
+		xf_emit(ctx, 4, 0);
+	xf_emit(ctx, 1, 0x20);
+	if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa)
+		xf_emit(ctx, 0x11, 0);
+	else if (dev_priv->chipset >= 0xa0)
+		xf_emit(ctx, 0xf, 0);
+	else
+		xf_emit(ctx, 0xe, 0);
+	xf_emit(ctx, 1, 0x1a);
+	xf_emit(ctx, 0xd, 0);
+	xf_emit(ctx, 2, 4);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 4);
+	xf_emit(ctx, 1, 8);
+	xf_emit(ctx, 1, 0);
+	if (dev_priv->chipset == 0x50)
+		xf_emit(ctx, 1, 0x3ff);
+	else
+		xf_emit(ctx, 1, 0x7ff);
+	if (dev_priv->chipset == 0xa8)
+		xf_emit(ctx, 1, 0x1e00);
+	xf_emit(ctx, 0xc, 0);
+	xf_emit(ctx, 1, 0xf);
+	if (dev_priv->chipset == 0x50)
+		xf_emit(ctx, 0x125, 0);
+	else if (dev_priv->chipset < 0xa0)
+		xf_emit(ctx, 0x126, 0);
+	else if (dev_priv->chipset == 0xa0 || dev_priv->chipset >= 0xaa)
+		xf_emit(ctx, 0x124, 0);
+	else
+		xf_emit(ctx, 0x1f7, 0);
+	xf_emit(ctx, 1, 0xf);
+	if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa)
+		xf_emit(ctx, 3, 0);
+	else
+		xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 1);
+	if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa)
+		xf_emit(ctx, 0xa1, 0);
+	else
+		xf_emit(ctx, 0x5a, 0);
+	xf_emit(ctx, 1, 0xf);
+	if (dev_priv->chipset < 0xa0)
+		xf_emit(ctx, 0x834, 0);
+	else if (dev_priv->chipset == 0xa0)
+		xf_emit(ctx, 0x1873, 0);
+	else if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa)
+		xf_emit(ctx, 0x8ba, 0);
+	else
+		xf_emit(ctx, 0x833, 0);
+	xf_emit(ctx, 1, 0xf);
+	xf_emit(ctx, 0xf, 0);
+}
+
+static void
+nv50_graph_construct_gene_unk7(struct nouveau_grctx *ctx)
+{
+	struct drm_nouveau_private *dev_priv = ctx->dev->dev_private;
+	/* middle of area 1 on pre-NVA0 [after m2mf], middle of area 6 on NVAx */
+	xf_emit(ctx, 2, 0);
+	if (dev_priv->chipset == 0x50)
+		xf_emit(ctx, 2, 1);
+	else
+		xf_emit(ctx, 2, 0);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 2, 0x100);
+	xf_emit(ctx, 1, 0x11);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 8);
+	xf_emit(ctx, 5, 0);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 3, 1);
+	xf_emit(ctx, 1, 0xcf);
+	xf_emit(ctx, 1, 2);
+	xf_emit(ctx, 6, 0);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 3, 1);
+	xf_emit(ctx, 4, 0);
+	xf_emit(ctx, 1, 4);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 1, 0x15);
+	xf_emit(ctx, 3, 0);
+	xf_emit(ctx, 1, 0x4444480);
+	xf_emit(ctx, 0x37, 0);
+}
+
+static void
+nv50_graph_construct_gene_unk8(struct nouveau_grctx *ctx)
+{
+	/* middle of area 1 on pre-NVA0 [after m2mf], middle of area 0 on NVAx */
+	xf_emit(ctx, 4, 0);
+	xf_emit(ctx, 1, 0x8100c12);
+	xf_emit(ctx, 4, 0);
+	xf_emit(ctx, 1, 0x100);
+	xf_emit(ctx, 2, 0);
+	xf_emit(ctx, 1, 0x10001);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 0x10001);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 1, 0x10001);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 1, 4);
+	xf_emit(ctx, 1, 2);
+}
+
+static void
+nv50_graph_construct_gene_unk9(struct nouveau_grctx *ctx)
+{
+	struct drm_nouveau_private *dev_priv = ctx->dev->dev_private;
+	/* middle of area 2 on pre-NVA0 [after m2mf], end of area 0 on NVAx */
+	xf_emit(ctx, 1, 0x3f800000);
+	xf_emit(ctx, 6, 0);
+	xf_emit(ctx, 1, 4);
+	xf_emit(ctx, 1, 0x1a);
+	xf_emit(ctx, 2, 0);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 0x12, 0);
+	xf_emit(ctx, 1, 0x00ffff00);
+	xf_emit(ctx, 6, 0);
+	xf_emit(ctx, 1, 0xf);
+	xf_emit(ctx, 7, 0);
+	xf_emit(ctx, 1, 0x0fac6881);
+	xf_emit(ctx, 1, 0x11);
+	xf_emit(ctx, 0xf, 0);
+	xf_emit(ctx, 1, 4);
+	xf_emit(ctx, 2, 0);
+	if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa)
+		xf_emit(ctx, 1, 3);
+	else if (dev_priv->chipset >= 0xa0)
+		xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 2, 0);
+	xf_emit(ctx, 1, 2);
+	xf_emit(ctx, 2, 0x04000000);
+	xf_emit(ctx, 3, 0);
+	xf_emit(ctx, 1, 5);
+	xf_emit(ctx, 1, 0x52);
+	if (dev_priv->chipset == 0x50) {
+		xf_emit(ctx, 0x13, 0);
+	} else {
+		xf_emit(ctx, 4, 0);
+		xf_emit(ctx, 1, 1);
+		if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa)
+			xf_emit(ctx, 0x11, 0);
+		else
+			xf_emit(ctx, 0x10, 0);
+	}
+	xf_emit(ctx, 0x10, 0x3f800000);
+	xf_emit(ctx, 1, 0x10);
+	xf_emit(ctx, 0x26, 0);
+	xf_emit(ctx, 1, 0x8100c12);
+	xf_emit(ctx, 1, 5);
+	xf_emit(ctx, 2, 0);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 4, 0xffff);
+	if (dev_priv->chipset != 0x50)
+		xf_emit(ctx, 1, 3);
+	if (dev_priv->chipset < 0xa0)
+		xf_emit(ctx, 0x1f, 0);
+	else if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa)
+		xf_emit(ctx, 0xc, 0);
+	else
+		xf_emit(ctx, 3, 0);
+	xf_emit(ctx, 1, 0x00ffff00);
+	xf_emit(ctx, 1, 0x1a);
+	if (dev_priv->chipset != 0x50) {
+		xf_emit(ctx, 1, 0);
+		xf_emit(ctx, 1, 3);
+	}
+	if (dev_priv->chipset < 0xa0)
+		xf_emit(ctx, 0x26, 0);
+	else
+		xf_emit(ctx, 0x3c, 0);
+	xf_emit(ctx, 1, 0x102);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 4, 4);
+	if (dev_priv->chipset >= 0xa0)
+		xf_emit(ctx, 8, 0);
+	xf_emit(ctx, 2, 4);
+	xf_emit(ctx, 1, 0);
+	if (dev_priv->chipset == 0x50)
+		xf_emit(ctx, 1, 0x3ff);
+	else
+		xf_emit(ctx, 1, 0x7ff);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 0x102);
+	xf_emit(ctx, 9, 0);
+	xf_emit(ctx, 4, 4);
+	xf_emit(ctx, 0x2c, 0);
+}
+
+static void
+nv50_graph_construct_gene_ropc(struct nouveau_grctx *ctx)
+{
+	struct drm_nouveau_private *dev_priv = ctx->dev->dev_private;
+	int magic2;
+	if (dev_priv->chipset == 0x50) {
+		magic2 = 0x00003e60;
+	} else if (dev_priv->chipset <= 0xa0 || dev_priv->chipset >= 0xaa) {
+		magic2 = 0x001ffe67;
+	} else {
+		magic2 = 0x00087e67;
+	}
+	xf_emit(ctx, 8, 0);
+	xf_emit(ctx, 1, 2);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, magic2);
+	xf_emit(ctx, 4, 0);
+	if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa)
+		xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 7, 0);
+	if (dev_priv->chipset >= 0xa0 && dev_priv->chipset < 0xaa)
+		xf_emit(ctx, 1, 0x15);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 1, 0x10);
+	xf_emit(ctx, 2, 0);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 4, 0);
+	if (dev_priv->chipset == 0x86 || dev_priv->chipset == 0x92 || dev_priv->chipset == 0x98 || dev_priv->chipset >= 0xa0) {
+		xf_emit(ctx, 1, 4);
+		xf_emit(ctx, 1, 0x400);
+		xf_emit(ctx, 1, 0x300);
+		xf_emit(ctx, 1, 0x1001);
+		if (dev_priv->chipset != 0xa0) {
+			if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa)
+				xf_emit(ctx, 1, 0);
+			else
+				xf_emit(ctx, 1, 0x15);
+		}
+		xf_emit(ctx, 3, 0);
+	}
+	xf_emit(ctx, 2, 0);
+	xf_emit(ctx, 1, 2);
+	xf_emit(ctx, 8, 0);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 1, 0x10);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 0x13, 0);
+	xf_emit(ctx, 1, 0x10);
+	xf_emit(ctx, 0x10, 0);
+	xf_emit(ctx, 0x10, 0x3f800000);
+	xf_emit(ctx, 0x19, 0);
+	xf_emit(ctx, 1, 0x10);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 0x3f);
+	xf_emit(ctx, 6, 0);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 1);
+	if (dev_priv->chipset >= 0xa0) {
+		xf_emit(ctx, 2, 0);
+		xf_emit(ctx, 1, 0x1001);
+		xf_emit(ctx, 0xb, 0);
+	} else {
+		xf_emit(ctx, 0xc, 0);
+	}
+	xf_emit(ctx, 1, 0x11);
+	xf_emit(ctx, 7, 0);
+	xf_emit(ctx, 1, 0xf);
+	xf_emit(ctx, 7, 0);
+	xf_emit(ctx, 1, 0x11);
+	if (dev_priv->chipset == 0x50)
+		xf_emit(ctx, 4, 0);
+	else
+		xf_emit(ctx, 6, 0);
+	xf_emit(ctx, 3, 1);
+	xf_emit(ctx, 1, 2);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 1, 2);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, magic2);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 0x0fac6881);
+	if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa) {
+		xf_emit(ctx, 1, 0);
+		xf_emit(ctx, 0x18, 1);
+		xf_emit(ctx, 8, 2);
+		xf_emit(ctx, 8, 1);
+		xf_emit(ctx, 8, 2);
+		xf_emit(ctx, 8, 1);
+		xf_emit(ctx, 3, 0);
+		xf_emit(ctx, 1, 1);
+		xf_emit(ctx, 5, 0);
+		xf_emit(ctx, 1, 1);
+		xf_emit(ctx, 0x16, 0);
+	} else {
+		if (dev_priv->chipset >= 0xa0)
+			xf_emit(ctx, 0x1b, 0);
+		else
+			xf_emit(ctx, 0x15, 0);
+	}
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 1, 2);
+	xf_emit(ctx, 2, 1);
+	xf_emit(ctx, 1, 2);
+	xf_emit(ctx, 2, 1);
+	if (dev_priv->chipset >= 0xa0)
+		xf_emit(ctx, 4, 0);
+	else
+		xf_emit(ctx, 3, 0);
+	if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa) {
+		xf_emit(ctx, 0x10, 1);
+		xf_emit(ctx, 8, 2);
+		xf_emit(ctx, 0x10, 1);
+		xf_emit(ctx, 8, 2);
+		xf_emit(ctx, 8, 1);
+		xf_emit(ctx, 3, 0);
+	}
+	xf_emit(ctx, 1, 0x11);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 0x5b, 0);
+}
+
+static void
+nv50_graph_construct_xfer_tp_x1(struct nouveau_grctx *ctx)
+{
+	struct drm_nouveau_private *dev_priv = ctx->dev->dev_private;
+	int magic3;
+	if (dev_priv->chipset == 0x50)
+		magic3 = 0x1000;
+	else if (dev_priv->chipset == 0x86 || dev_priv->chipset == 0x98 || dev_priv->chipset >= 0xa8)
+		magic3 = 0x1e00;
+	else
+		magic3 = 0;
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 4);
+	if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa)
+		xf_emit(ctx, 0x24, 0);
+	else if (dev_priv->chipset >= 0xa0)
+		xf_emit(ctx, 0x14, 0);
+	else
+		xf_emit(ctx, 0x15, 0);
+	xf_emit(ctx, 2, 4);
+	if (dev_priv->chipset >= 0xa0)
+		xf_emit(ctx, 1, 0x03020100);
+	else
+		xf_emit(ctx, 1, 0x00608080);
+	xf_emit(ctx, 4, 0);
+	xf_emit(ctx, 1, 4);
+	xf_emit(ctx, 2, 0);
+	xf_emit(ctx, 2, 4);
+	xf_emit(ctx, 1, 0x80);
+	if (magic3)
+		xf_emit(ctx, 1, magic3);
+	xf_emit(ctx, 1, 4);
+	xf_emit(ctx, 0x24, 0);
+	xf_emit(ctx, 1, 4);
+	xf_emit(ctx, 1, 0x80);
+	xf_emit(ctx, 1, 4);
+	xf_emit(ctx, 1, 0x03020100);
+	xf_emit(ctx, 1, 3);
+	if (magic3)
+		xf_emit(ctx, 1, magic3);
+	xf_emit(ctx, 1, 4);
+	xf_emit(ctx, 4, 0);
+	xf_emit(ctx, 1, 4);
+	xf_emit(ctx, 1, 3);
+	xf_emit(ctx, 3, 0);
+	xf_emit(ctx, 1, 4);
+	if (dev_priv->chipset == 0x94 || dev_priv->chipset == 0x96)
+		xf_emit(ctx, 0x1024, 0);
+	else if (dev_priv->chipset < 0xa0)
+		xf_emit(ctx, 0xa24, 0);
+	else if (dev_priv->chipset == 0xa0 || dev_priv->chipset >= 0xaa)
+		xf_emit(ctx, 0x214, 0);
+	else
+		xf_emit(ctx, 0x414, 0);
+	xf_emit(ctx, 1, 4);
+	xf_emit(ctx, 1, 3);
+	xf_emit(ctx, 2, 0);
+}
+
+static void
+nv50_graph_construct_xfer_tp_x2(struct nouveau_grctx *ctx)
+{
+	struct drm_nouveau_private *dev_priv = ctx->dev->dev_private;
+	int magic1, magic2;
+	if (dev_priv->chipset == 0x50) {
+		magic1 = 0x3ff;
+		magic2 = 0x00003e60;
+	} else if (dev_priv->chipset <= 0xa0 || dev_priv->chipset >= 0xaa) {
+		magic1 = 0x7ff;
+		magic2 = 0x001ffe67;
+	} else {
+		magic1 = 0x7ff;
+		magic2 = 0x00087e67;
+	}
+	xf_emit(ctx, 3, 0);
+	if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa)
+		xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 0xc, 0);
+	xf_emit(ctx, 1, 0xf);
+	xf_emit(ctx, 0xb, 0);
+	xf_emit(ctx, 1, 4);
+	xf_emit(ctx, 4, 0xffff);
+	xf_emit(ctx, 8, 0);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 3, 0);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 5, 0);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 2, 0);
+	if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa) {
+		xf_emit(ctx, 1, 3);
+		xf_emit(ctx, 1, 0);
+	} else if (dev_priv->chipset >= 0xa0)
+		xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 0xa, 0);
+	xf_emit(ctx, 2, 1);
+	xf_emit(ctx, 1, 2);
+	xf_emit(ctx, 2, 1);
+	xf_emit(ctx, 1, 2);
+	if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa) {
+		xf_emit(ctx, 1, 0);
+		xf_emit(ctx, 0x18, 1);
+		xf_emit(ctx, 8, 2);
+		xf_emit(ctx, 8, 1);
+		xf_emit(ctx, 8, 2);
+		xf_emit(ctx, 8, 1);
+		xf_emit(ctx, 1, 0);
+	}
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 0x11);
+	xf_emit(ctx, 7, 0);
+	xf_emit(ctx, 1, 0x0fac6881);
+	xf_emit(ctx, 2, 0);
+	xf_emit(ctx, 1, 4);
+	xf_emit(ctx, 3, 0);
+	xf_emit(ctx, 1, 0x11);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 3, 0xcf);
+	if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa)
+		xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 0xa, 0);
+	xf_emit(ctx, 2, 1);
+	xf_emit(ctx, 1, 2);
+	xf_emit(ctx, 2, 1);
+	xf_emit(ctx, 1, 2);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 8, 1);
+	xf_emit(ctx, 1, 0x11);
+	xf_emit(ctx, 7, 0);
+	xf_emit(ctx, 1, 0x0fac6881);
+	xf_emit(ctx, 1, 0xf);
+	xf_emit(ctx, 7, 0);
+	xf_emit(ctx, 1, magic2);
+	xf_emit(ctx, 2, 0);
+	xf_emit(ctx, 1, 0x11);
+	if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa)
+		xf_emit(ctx, 2, 1);
+	else
+		xf_emit(ctx, 1, 1);
+	if(dev_priv->chipset == 0x50)
+		xf_emit(ctx, 1, 0);
+	else
+		xf_emit(ctx, 3, 0);
+	xf_emit(ctx, 1, 4);
+	xf_emit(ctx, 5, 0);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 4, 0);
+	xf_emit(ctx, 1, 0x11);
+	xf_emit(ctx, 7, 0);
+	xf_emit(ctx, 1, 0x0fac6881);
+	xf_emit(ctx, 3, 0);
+	xf_emit(ctx, 1, 0x11);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, magic1);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 2, 0);
+	if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa)
+		xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 0x28, 0);
+	xf_emit(ctx, 8, 8);
+	xf_emit(ctx, 1, 0x11);
+	xf_emit(ctx, 7, 0);
+	xf_emit(ctx, 1, 0x0fac6881);
+	xf_emit(ctx, 8, 0x400);
+	xf_emit(ctx, 8, 0x300);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 1, 0xf);
+	xf_emit(ctx, 7, 0);
+	xf_emit(ctx, 1, 0x20);
+	xf_emit(ctx, 1, 0x11);
+	xf_emit(ctx, 1, 0x100);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 2, 0);
+	xf_emit(ctx, 1, 0x40);
+	xf_emit(ctx, 1, 0x100);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 3);
+	xf_emit(ctx, 4, 0);
+	if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa)
+		xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 1, magic2);
+	xf_emit(ctx, 3, 0);
+	xf_emit(ctx, 1, 2);
+	xf_emit(ctx, 1, 0x0fac6881);
+	xf_emit(ctx, 9, 0);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 4, 0);
+	xf_emit(ctx, 1, 4);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 1, 0x400);
+	xf_emit(ctx, 1, 0x300);
+	xf_emit(ctx, 1, 0x1001);
+	if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa)
+		xf_emit(ctx, 4, 0);
+	else
+		xf_emit(ctx, 3, 0);
+	xf_emit(ctx, 1, 0x11);
+	xf_emit(ctx, 7, 0);
+	xf_emit(ctx, 1, 0x0fac6881);
+	xf_emit(ctx, 1, 0xf);
+	if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa) {
+		xf_emit(ctx, 0x15, 0);
+		xf_emit(ctx, 1, 1);
+		xf_emit(ctx, 3, 0);
+	} else
+		xf_emit(ctx, 0x17, 0);
+	if (dev_priv->chipset >= 0xa0)
+		xf_emit(ctx, 1, 0x0fac6881);
+	xf_emit(ctx, 1, magic2);
+	xf_emit(ctx, 3, 0);
+	xf_emit(ctx, 1, 0x11);
+	xf_emit(ctx, 2, 0);
+	xf_emit(ctx, 1, 4);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 2, 1);
+	xf_emit(ctx, 3, 0);
+	if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa)
+		xf_emit(ctx, 2, 1);
+	else
+		xf_emit(ctx, 1, 1);
+	if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa)
+		xf_emit(ctx, 2, 0);
+	else if (dev_priv->chipset != 0x50)
+		xf_emit(ctx, 1, 0);
+}
+
+static void
+nv50_graph_construct_xfer_tp_x3(struct nouveau_grctx *ctx)
+{
+	struct drm_nouveau_private *dev_priv = ctx->dev->dev_private;
+	xf_emit(ctx, 3, 0);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 1);
+	if (dev_priv->chipset == 0x50)
+		xf_emit(ctx, 2, 0);
+	else
+		xf_emit(ctx, 3, 0);
+	xf_emit(ctx, 1, 0x2a712488);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 0x4085c000);
+	xf_emit(ctx, 1, 0x40);
+	xf_emit(ctx, 1, 0x100);
+	xf_emit(ctx, 1, 0x10100);
+	xf_emit(ctx, 1, 0x02800000);
+}
+
+static void
+nv50_graph_construct_xfer_tp_x4(struct nouveau_grctx *ctx)
+{
+	struct drm_nouveau_private *dev_priv = ctx->dev->dev_private;
+	xf_emit(ctx, 2, 0x04e3bfdf);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 0x00ffff00);
+	if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa)
+		xf_emit(ctx, 2, 1);
+	else
+		xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 2, 0);
+	xf_emit(ctx, 1, 0x00ffff00);
+	xf_emit(ctx, 8, 0);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 1, 0x30201000);
+	xf_emit(ctx, 1, 0x70605040);
+	xf_emit(ctx, 1, 0xb8a89888);
+	xf_emit(ctx, 1, 0xf8e8d8c8);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 0x1a);
+}
+
+static void
+nv50_graph_construct_xfer_tp_x5(struct nouveau_grctx *ctx)
+{
+	struct drm_nouveau_private *dev_priv = ctx->dev->dev_private;
+	xf_emit(ctx, 3, 0);
+	xf_emit(ctx, 1, 0xfac6881);
+	xf_emit(ctx, 4, 0);
+	xf_emit(ctx, 1, 4);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 2, 1);
+	xf_emit(ctx, 2, 0);
+	xf_emit(ctx, 1, 1);
+	if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa)
+		xf_emit(ctx, 0xb, 0);
+	else
+		xf_emit(ctx, 0xa, 0);
+	xf_emit(ctx, 8, 1);
+	xf_emit(ctx, 1, 0x11);
+	xf_emit(ctx, 7, 0);
+	xf_emit(ctx, 1, 0xfac6881);
+	xf_emit(ctx, 1, 0xf);
+	xf_emit(ctx, 7, 0);
+	xf_emit(ctx, 1, 0x11);
+	xf_emit(ctx, 1, 1);
+	if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa) {
+		xf_emit(ctx, 6, 0);
+		xf_emit(ctx, 1, 1);
+		xf_emit(ctx, 6, 0);
+	} else {
+		xf_emit(ctx, 0xb, 0);
+	}
+}
+
+static void
+nv50_graph_construct_xfer_tp(struct nouveau_grctx *ctx)
+{
+	struct drm_nouveau_private *dev_priv = ctx->dev->dev_private;
+	if (dev_priv->chipset < 0xa0) {
+		nv50_graph_construct_xfer_tp_x1(ctx);
+		nv50_graph_construct_xfer_tp_x2(ctx);
+		nv50_graph_construct_xfer_tp_x3(ctx);
+		if (dev_priv->chipset == 0x50)
+			xf_emit(ctx, 0xf, 0);
+		else
+			xf_emit(ctx, 0x12, 0);
+		nv50_graph_construct_xfer_tp_x4(ctx);
+	} else {
+		nv50_graph_construct_xfer_tp_x3(ctx);
+		if (dev_priv->chipset < 0xaa)
+			xf_emit(ctx, 0xc, 0);
+		else
+			xf_emit(ctx, 0xa, 0);
+		nv50_graph_construct_xfer_tp_x2(ctx);
+		nv50_graph_construct_xfer_tp_x5(ctx);
+		nv50_graph_construct_xfer_tp_x4(ctx);
+		nv50_graph_construct_xfer_tp_x1(ctx);
+	}
+}
+
+static void
+nv50_graph_construct_xfer_tp2(struct nouveau_grctx *ctx)
+{
+	struct drm_nouveau_private *dev_priv = ctx->dev->dev_private;
+	int i, mpcnt;
+	if (dev_priv->chipset == 0x98 || dev_priv->chipset == 0xaa)
+		mpcnt = 1;
+	else if (dev_priv->chipset < 0xa0 || dev_priv->chipset >= 0xa8)
+		mpcnt = 2;
+	else
+		mpcnt = 3;
+	for (i = 0; i < mpcnt; i++) {
+		xf_emit(ctx, 1, 0);
+		xf_emit(ctx, 1, 0x80);
+		xf_emit(ctx, 1, 0x80007004);
+		xf_emit(ctx, 1, 0x04000400);
+		if (dev_priv->chipset >= 0xa0)
+			xf_emit(ctx, 1, 0xc0);
+		xf_emit(ctx, 1, 0x1000);
+		xf_emit(ctx, 2, 0);
+		if (dev_priv->chipset == 0x86 || dev_priv->chipset == 0x98 || dev_priv->chipset >= 0xa8) {
+			xf_emit(ctx, 1, 0xe00);
+			xf_emit(ctx, 1, 0x1e00);
+		}
+		xf_emit(ctx, 1, 1);
+		xf_emit(ctx, 2, 0);
+		if (dev_priv->chipset == 0x50)
+			xf_emit(ctx, 2, 0x1000);
+		xf_emit(ctx, 1, 1);
+		xf_emit(ctx, 1, 0);
+		xf_emit(ctx, 1, 4);
+		xf_emit(ctx, 1, 2);
+		if (dev_priv->chipset >= 0xaa)
+			xf_emit(ctx, 0xb, 0);
+		else if (dev_priv->chipset >= 0xa0)
+			xf_emit(ctx, 0xc, 0);
+		else
+			xf_emit(ctx, 0xa, 0);
+	}
+	xf_emit(ctx, 1, 0x08100c12);
+	xf_emit(ctx, 1, 0);
+	if (dev_priv->chipset >= 0xa0) {
+		xf_emit(ctx, 1, 0x1fe21);
+	}
+	xf_emit(ctx, 5, 0);
+	xf_emit(ctx, 4, 0xffff);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 2, 0x10001);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 0x1fe21);
+	xf_emit(ctx, 1, 0);
+	if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa)
+		xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 4, 0);
+	xf_emit(ctx, 1, 0x08100c12);
+	xf_emit(ctx, 1, 4);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 2);
+	xf_emit(ctx, 1, 0x11);
+	xf_emit(ctx, 8, 0);
+	xf_emit(ctx, 1, 0xfac6881);
+	xf_emit(ctx, 1, 0);
+	if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa)
+		xf_emit(ctx, 1, 3);
+	xf_emit(ctx, 3, 0);
+	xf_emit(ctx, 1, 4);
+	xf_emit(ctx, 9, 0);
+	xf_emit(ctx, 1, 2);
+	xf_emit(ctx, 2, 1);
+	xf_emit(ctx, 1, 2);
+	xf_emit(ctx, 3, 1);
+	xf_emit(ctx, 1, 0);
+	if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa) {
+		xf_emit(ctx, 8, 2);
+		xf_emit(ctx, 0x10, 1);
+		xf_emit(ctx, 8, 2);
+		xf_emit(ctx, 0x18, 1);
+		xf_emit(ctx, 3, 0);
+	}
+	xf_emit(ctx, 1, 4);
+	if (dev_priv->chipset == 0x50)
+		xf_emit(ctx, 0x3a0, 0);
+	else if (dev_priv->chipset < 0x94)
+		xf_emit(ctx, 0x3a2, 0);
+	else if (dev_priv->chipset == 0x98 || dev_priv->chipset == 0xaa)
+		xf_emit(ctx, 0x39f, 0);
+	else
+		xf_emit(ctx, 0x3a3, 0);
+	xf_emit(ctx, 1, 0x11);
+	xf_emit(ctx, 1, 0);
+	xf_emit(ctx, 1, 1);
+	xf_emit(ctx, 0x2d, 0);
+}
+
+static void
+nv50_graph_construct_xfer2(struct nouveau_grctx *ctx)
+{
+	struct drm_nouveau_private *dev_priv = ctx->dev->dev_private;
+	int i;
+	uint32_t offset;
+	uint32_t units = nv_rd32 (ctx->dev, 0x1540);
+	int size = 0;
+
+	offset = (ctx->ctxvals_pos+0x3f)&~0x3f;
+
+	if (dev_priv->chipset < 0xa0) {
+		for (i = 0; i < 8; i++) {
+			ctx->ctxvals_pos = offset + i;
+			if (i == 0)
+				xf_emit(ctx, 1, 0x08100c12);
+			if (units & (1 << i))
+				nv50_graph_construct_xfer_tp2(ctx);
+			if ((ctx->ctxvals_pos-offset)/8 > size)
+				size = (ctx->ctxvals_pos-offset)/8;
+		}
+	} else {
+		/* Strand 0: TPs 0, 1 */
+		ctx->ctxvals_pos = offset;
+		xf_emit(ctx, 1, 0x08100c12);
+		if (units & (1 << 0))
+			nv50_graph_construct_xfer_tp2(ctx);
+		if (units & (1 << 1))
+			nv50_graph_construct_xfer_tp2(ctx);
+		if ((ctx->ctxvals_pos-offset)/8 > size)
+			size = (ctx->ctxvals_pos-offset)/8;
+
+		/* Strand 0: TPs 2, 3 */
+		ctx->ctxvals_pos = offset + 1;
+		if (units & (1 << 2))
+			nv50_graph_construct_xfer_tp2(ctx);
+		if (units & (1 << 3))
+			nv50_graph_construct_xfer_tp2(ctx);
+		if ((ctx->ctxvals_pos-offset)/8 > size)
+			size = (ctx->ctxvals_pos-offset)/8;
+
+		/* Strand 0: TPs 4, 5, 6 */
+		ctx->ctxvals_pos = offset + 2;
+		if (units & (1 << 4))
+			nv50_graph_construct_xfer_tp2(ctx);
+		if (units & (1 << 5))
+			nv50_graph_construct_xfer_tp2(ctx);
+		if (units & (1 << 6))
+			nv50_graph_construct_xfer_tp2(ctx);
+		if ((ctx->ctxvals_pos-offset)/8 > size)
+			size = (ctx->ctxvals_pos-offset)/8;
+
+		/* Strand 0: TPs 7, 8, 9 */
+		ctx->ctxvals_pos = offset + 3;
+		if (units & (1 << 7))
+			nv50_graph_construct_xfer_tp2(ctx);
+		if (units & (1 << 8))
+			nv50_graph_construct_xfer_tp2(ctx);
+		if (units & (1 << 9))
+			nv50_graph_construct_xfer_tp2(ctx);
+		if ((ctx->ctxvals_pos-offset)/8 > size)
+			size = (ctx->ctxvals_pos-offset)/8;
+	}
+	ctx->ctxvals_pos = offset + size * 8;
+	ctx->ctxvals_pos = (ctx->ctxvals_pos+0x3f)&~0x3f;
+	cp_lsr (ctx, offset);
+	cp_out (ctx, CP_SET_XFER_POINTER);
+	cp_lsr (ctx, size);
+	cp_out (ctx, CP_SEEK_2);
+	cp_out (ctx, CP_XFER_2);
+	cp_wait(ctx, XFER, BUSY);
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv04_graph.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv04_graph.c
@@ -0,0 +1,584 @@
+/*
+ * Copyright 2007 Stephane Marchesin
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#include "drmP.h"
+#include "drm.h"
+#include "nouveau_drm.h"
+#include "nouveau_drv.h"
+
+static uint32_t nv04_graph_ctx_regs[] = {
+	0x0040053c,
+	0x00400544,
+	0x00400540,
+	0x00400548,
+	NV04_PGRAPH_CTX_SWITCH1,
+	NV04_PGRAPH_CTX_SWITCH2,
+	NV04_PGRAPH_CTX_SWITCH3,
+	NV04_PGRAPH_CTX_SWITCH4,
+	NV04_PGRAPH_CTX_CACHE1,
+	NV04_PGRAPH_CTX_CACHE2,
+	NV04_PGRAPH_CTX_CACHE3,
+	NV04_PGRAPH_CTX_CACHE4,
+	0x00400184,
+	0x004001a4,
+	0x004001c4,
+	0x004001e4,
+	0x00400188,
+	0x004001a8,
+	0x004001c8,
+	0x004001e8,
+	0x0040018c,
+	0x004001ac,
+	0x004001cc,
+	0x004001ec,
+	0x00400190,
+	0x004001b0,
+	0x004001d0,
+	0x004001f0,
+	0x00400194,
+	0x004001b4,
+	0x004001d4,
+	0x004001f4,
+	0x00400198,
+	0x004001b8,
+	0x004001d8,
+	0x004001f8,
+	0x0040019c,
+	0x004001bc,
+	0x004001dc,
+	0x004001fc,
+	0x00400174,
+	NV04_PGRAPH_DMA_START_0,
+	NV04_PGRAPH_DMA_START_1,
+	NV04_PGRAPH_DMA_LENGTH,
+	NV04_PGRAPH_DMA_MISC,
+	NV04_PGRAPH_DMA_PITCH,
+	NV04_PGRAPH_BOFFSET0,
+	NV04_PGRAPH_BBASE0,
+	NV04_PGRAPH_BLIMIT0,
+	NV04_PGRAPH_BOFFSET1,
+	NV04_PGRAPH_BBASE1,
+	NV04_PGRAPH_BLIMIT1,
+	NV04_PGRAPH_BOFFSET2,
+	NV04_PGRAPH_BBASE2,
+	NV04_PGRAPH_BLIMIT2,
+	NV04_PGRAPH_BOFFSET3,
+	NV04_PGRAPH_BBASE3,
+	NV04_PGRAPH_BLIMIT3,
+	NV04_PGRAPH_BOFFSET4,
+	NV04_PGRAPH_BBASE4,
+	NV04_PGRAPH_BLIMIT4,
+	NV04_PGRAPH_BOFFSET5,
+	NV04_PGRAPH_BBASE5,
+	NV04_PGRAPH_BLIMIT5,
+	NV04_PGRAPH_BPITCH0,
+	NV04_PGRAPH_BPITCH1,
+	NV04_PGRAPH_BPITCH2,
+	NV04_PGRAPH_BPITCH3,
+	NV04_PGRAPH_BPITCH4,
+	NV04_PGRAPH_SURFACE,
+	NV04_PGRAPH_STATE,
+	NV04_PGRAPH_BSWIZZLE2,
+	NV04_PGRAPH_BSWIZZLE5,
+	NV04_PGRAPH_BPIXEL,
+	NV04_PGRAPH_NOTIFY,
+	NV04_PGRAPH_PATT_COLOR0,
+	NV04_PGRAPH_PATT_COLOR1,
+	NV04_PGRAPH_PATT_COLORRAM+0x00,
+	NV04_PGRAPH_PATT_COLORRAM+0x04,
+	NV04_PGRAPH_PATT_COLORRAM+0x08,
+	NV04_PGRAPH_PATT_COLORRAM+0x0c,
+	NV04_PGRAPH_PATT_COLORRAM+0x10,
+	NV04_PGRAPH_PATT_COLORRAM+0x14,
+	NV04_PGRAPH_PATT_COLORRAM+0x18,
+	NV04_PGRAPH_PATT_COLORRAM+0x1c,
+	NV04_PGRAPH_PATT_COLORRAM+0x20,
+	NV04_PGRAPH_PATT_COLORRAM+0x24,
+	NV04_PGRAPH_PATT_COLORRAM+0x28,
+	NV04_PGRAPH_PATT_COLORRAM+0x2c,
+	NV04_PGRAPH_PATT_COLORRAM+0x30,
+	NV04_PGRAPH_PATT_COLORRAM+0x34,
+	NV04_PGRAPH_PATT_COLORRAM+0x38,
+	NV04_PGRAPH_PATT_COLORRAM+0x3c,
+	NV04_PGRAPH_PATT_COLORRAM+0x40,
+	NV04_PGRAPH_PATT_COLORRAM+0x44,
+	NV04_PGRAPH_PATT_COLORRAM+0x48,
+	NV04_PGRAPH_PATT_COLORRAM+0x4c,
+	NV04_PGRAPH_PATT_COLORRAM+0x50,
+	NV04_PGRAPH_PATT_COLORRAM+0x54,
+	NV04_PGRAPH_PATT_COLORRAM+0x58,
+	NV04_PGRAPH_PATT_COLORRAM+0x5c,
+	NV04_PGRAPH_PATT_COLORRAM+0x60,
+	NV04_PGRAPH_PATT_COLORRAM+0x64,
+	NV04_PGRAPH_PATT_COLORRAM+0x68,
+	NV04_PGRAPH_PATT_COLORRAM+0x6c,
+	NV04_PGRAPH_PATT_COLORRAM+0x70,
+	NV04_PGRAPH_PATT_COLORRAM+0x74,
+	NV04_PGRAPH_PATT_COLORRAM+0x78,
+	NV04_PGRAPH_PATT_COLORRAM+0x7c,
+	NV04_PGRAPH_PATT_COLORRAM+0x80,
+	NV04_PGRAPH_PATT_COLORRAM+0x84,
+	NV04_PGRAPH_PATT_COLORRAM+0x88,
+	NV04_PGRAPH_PATT_COLORRAM+0x8c,
+	NV04_PGRAPH_PATT_COLORRAM+0x90,
+	NV04_PGRAPH_PATT_COLORRAM+0x94,
+	NV04_PGRAPH_PATT_COLORRAM+0x98,
+	NV04_PGRAPH_PATT_COLORRAM+0x9c,
+	NV04_PGRAPH_PATT_COLORRAM+0xa0,
+	NV04_PGRAPH_PATT_COLORRAM+0xa4,
+	NV04_PGRAPH_PATT_COLORRAM+0xa8,
+	NV04_PGRAPH_PATT_COLORRAM+0xac,
+	NV04_PGRAPH_PATT_COLORRAM+0xb0,
+	NV04_PGRAPH_PATT_COLORRAM+0xb4,
+	NV04_PGRAPH_PATT_COLORRAM+0xb8,
+	NV04_PGRAPH_PATT_COLORRAM+0xbc,
+	NV04_PGRAPH_PATT_COLORRAM+0xc0,
+	NV04_PGRAPH_PATT_COLORRAM+0xc4,
+	NV04_PGRAPH_PATT_COLORRAM+0xc8,
+	NV04_PGRAPH_PATT_COLORRAM+0xcc,
+	NV04_PGRAPH_PATT_COLORRAM+0xd0,
+	NV04_PGRAPH_PATT_COLORRAM+0xd4,
+	NV04_PGRAPH_PATT_COLORRAM+0xd8,
+	NV04_PGRAPH_PATT_COLORRAM+0xdc,
+	NV04_PGRAPH_PATT_COLORRAM+0xe0,
+	NV04_PGRAPH_PATT_COLORRAM+0xe4,
+	NV04_PGRAPH_PATT_COLORRAM+0xe8,
+	NV04_PGRAPH_PATT_COLORRAM+0xec,
+	NV04_PGRAPH_PATT_COLORRAM+0xf0,
+	NV04_PGRAPH_PATT_COLORRAM+0xf4,
+	NV04_PGRAPH_PATT_COLORRAM+0xf8,
+	NV04_PGRAPH_PATT_COLORRAM+0xfc,
+	NV04_PGRAPH_PATTERN,
+	0x0040080c,
+	NV04_PGRAPH_PATTERN_SHAPE,
+	0x00400600,
+	NV04_PGRAPH_ROP3,
+	NV04_PGRAPH_CHROMA,
+	NV04_PGRAPH_BETA_AND,
+	NV04_PGRAPH_BETA_PREMULT,
+	NV04_PGRAPH_CONTROL0,
+	NV04_PGRAPH_CONTROL1,
+	NV04_PGRAPH_CONTROL2,
+	NV04_PGRAPH_BLEND,
+	NV04_PGRAPH_STORED_FMT,
+	NV04_PGRAPH_SOURCE_COLOR,
+	0x00400560,
+	0x00400568,
+	0x00400564,
+	0x0040056c,
+	0x00400400,
+	0x00400480,
+	0x00400404,
+	0x00400484,
+	0x00400408,
+	0x00400488,
+	0x0040040c,
+	0x0040048c,
+	0x00400410,
+	0x00400490,
+	0x00400414,
+	0x00400494,
+	0x00400418,
+	0x00400498,
+	0x0040041c,
+	0x0040049c,
+	0x00400420,
+	0x004004a0,
+	0x00400424,
+	0x004004a4,
+	0x00400428,
+	0x004004a8,
+	0x0040042c,
+	0x004004ac,
+	0x00400430,
+	0x004004b0,
+	0x00400434,
+	0x004004b4,
+	0x00400438,
+	0x004004b8,
+	0x0040043c,
+	0x004004bc,
+	0x00400440,
+	0x004004c0,
+	0x00400444,
+	0x004004c4,
+	0x00400448,
+	0x004004c8,
+	0x0040044c,
+	0x004004cc,
+	0x00400450,
+	0x004004d0,
+	0x00400454,
+	0x004004d4,
+	0x00400458,
+	0x004004d8,
+	0x0040045c,
+	0x004004dc,
+	0x00400460,
+	0x004004e0,
+	0x00400464,
+	0x004004e4,
+	0x00400468,
+	0x004004e8,
+	0x0040046c,
+	0x004004ec,
+	0x00400470,
+	0x004004f0,
+	0x00400474,
+	0x004004f4,
+	0x00400478,
+	0x004004f8,
+	0x0040047c,
+	0x004004fc,
+	0x00400534,
+	0x00400538,
+	0x00400514,
+	0x00400518,
+	0x0040051c,
+	0x00400520,
+	0x00400524,
+	0x00400528,
+	0x0040052c,
+	0x00400530,
+	0x00400d00,
+	0x00400d40,
+	0x00400d80,
+	0x00400d04,
+	0x00400d44,
+	0x00400d84,
+	0x00400d08,
+	0x00400d48,
+	0x00400d88,
+	0x00400d0c,
+	0x00400d4c,
+	0x00400d8c,
+	0x00400d10,
+	0x00400d50,
+	0x00400d90,
+	0x00400d14,
+	0x00400d54,
+	0x00400d94,
+	0x00400d18,
+	0x00400d58,
+	0x00400d98,
+	0x00400d1c,
+	0x00400d5c,
+	0x00400d9c,
+	0x00400d20,
+	0x00400d60,
+	0x00400da0,
+	0x00400d24,
+	0x00400d64,
+	0x00400da4,
+	0x00400d28,
+	0x00400d68,
+	0x00400da8,
+	0x00400d2c,
+	0x00400d6c,
+	0x00400dac,
+	0x00400d30,
+	0x00400d70,
+	0x00400db0,
+	0x00400d34,
+	0x00400d74,
+	0x00400db4,
+	0x00400d38,
+	0x00400d78,
+	0x00400db8,
+	0x00400d3c,
+	0x00400d7c,
+	0x00400dbc,
+	0x00400590,
+	0x00400594,
+	0x00400598,
+	0x0040059c,
+	0x004005a8,
+	0x004005ac,
+	0x004005b0,
+	0x004005b4,
+	0x004005c0,
+	0x004005c4,
+	0x004005c8,
+	0x004005cc,
+	0x004005d0,
+	0x004005d4,
+	0x004005d8,
+	0x004005dc,
+	0x004005e0,
+	NV04_PGRAPH_PASSTHRU_0,
+	NV04_PGRAPH_PASSTHRU_1,
+	NV04_PGRAPH_PASSTHRU_2,
+	NV04_PGRAPH_DVD_COLORFMT,
+	NV04_PGRAPH_SCALED_FORMAT,
+	NV04_PGRAPH_MISC24_0,
+	NV04_PGRAPH_MISC24_1,
+	NV04_PGRAPH_MISC24_2,
+	0x00400500,
+	0x00400504,
+	NV04_PGRAPH_VALID1,
+	NV04_PGRAPH_VALID2,
+	NV04_PGRAPH_DEBUG_3
+};
+
+struct graph_state {
+	int nv04[ARRAY_SIZE(nv04_graph_ctx_regs)];
+};
+
+struct nouveau_channel *
+nv04_graph_channel(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	int chid = dev_priv->engine.fifo.channels;
+
+	if (nv_rd32(dev, NV04_PGRAPH_CTX_CONTROL) & 0x00010000)
+		chid = nv_rd32(dev, NV04_PGRAPH_CTX_USER) >> 24;
+
+	if (chid >= dev_priv->engine.fifo.channels)
+		return NULL;
+
+	return dev_priv->fifos[chid];
+}
+
+void
+nv04_graph_context_switch(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
+	struct nouveau_channel *chan = NULL;
+	int chid;
+
+	pgraph->fifo_access(dev, false);
+	nouveau_wait_for_idle(dev);
+
+	/* If previous context is valid, we need to save it */
+	pgraph->unload_context(dev);
+
+	/* Load context for next channel */
+	chid = dev_priv->engine.fifo.channel_id(dev);
+	chan = dev_priv->fifos[chid];
+	if (chan)
+		nv04_graph_load_context(chan);
+
+	pgraph->fifo_access(dev, true);
+}
+
+static uint32_t *ctx_reg(struct graph_state *ctx, uint32_t reg)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(nv04_graph_ctx_regs); i++) {
+		if (nv04_graph_ctx_regs[i] == reg)
+			return &ctx->nv04[i];
+	}
+
+	return NULL;
+}
+
+int nv04_graph_create_context(struct nouveau_channel *chan)
+{
+	struct graph_state *pgraph_ctx;
+	NV_DEBUG(chan->dev, "nv04_graph_context_create %d\n", chan->id);
+
+	chan->pgraph_ctx = pgraph_ctx = kzalloc(sizeof(*pgraph_ctx),
+						GFP_KERNEL);
+	if (pgraph_ctx == NULL)
+		return -ENOMEM;
+
+	*ctx_reg(pgraph_ctx, NV04_PGRAPH_DEBUG_3) = 0xfad4ff31;
+
+	return 0;
+}
+
+void nv04_graph_destroy_context(struct nouveau_channel *chan)
+{
+	struct graph_state *pgraph_ctx = chan->pgraph_ctx;
+
+	kfree(pgraph_ctx);
+	chan->pgraph_ctx = NULL;
+}
+
+int nv04_graph_load_context(struct nouveau_channel *chan)
+{
+	struct drm_device *dev = chan->dev;
+	struct graph_state *pgraph_ctx = chan->pgraph_ctx;
+	uint32_t tmp;
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(nv04_graph_ctx_regs); i++)
+		nv_wr32(dev, nv04_graph_ctx_regs[i], pgraph_ctx->nv04[i]);
+
+	nv_wr32(dev, NV04_PGRAPH_CTX_CONTROL, 0x10010100);
+
+	tmp  = nv_rd32(dev, NV04_PGRAPH_CTX_USER) & 0x00ffffff;
+	nv_wr32(dev, NV04_PGRAPH_CTX_USER, tmp | chan->id << 24);
+
+	tmp = nv_rd32(dev, NV04_PGRAPH_FFINTFC_ST2);
+	nv_wr32(dev, NV04_PGRAPH_FFINTFC_ST2, tmp & 0x000fffff);
+
+	return 0;
+}
+
+int
+nv04_graph_unload_context(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
+	struct nouveau_channel *chan = NULL;
+	struct graph_state *ctx;
+	uint32_t tmp;
+	int i;
+
+	chan = pgraph->channel(dev);
+	if (!chan)
+		return 0;
+	ctx = chan->pgraph_ctx;
+
+	for (i = 0; i < ARRAY_SIZE(nv04_graph_ctx_regs); i++)
+		ctx->nv04[i] = nv_rd32(dev, nv04_graph_ctx_regs[i]);
+
+	nv_wr32(dev, NV04_PGRAPH_CTX_CONTROL, 0x10000000);
+	tmp  = nv_rd32(dev, NV04_PGRAPH_CTX_USER) & 0x00ffffff;
+	tmp |= (dev_priv->engine.fifo.channels - 1) << 24;
+	nv_wr32(dev, NV04_PGRAPH_CTX_USER, tmp);
+	return 0;
+}
+
+int nv04_graph_init(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	uint32_t tmp;
+
+	nv_wr32(dev, NV03_PMC_ENABLE, nv_rd32(dev, NV03_PMC_ENABLE) &
+			~NV_PMC_ENABLE_PGRAPH);
+	nv_wr32(dev, NV03_PMC_ENABLE, nv_rd32(dev, NV03_PMC_ENABLE) |
+			 NV_PMC_ENABLE_PGRAPH);
+
+	/* Enable PGRAPH interrupts */
+	nv_wr32(dev, NV03_PGRAPH_INTR, 0xFFFFFFFF);
+	nv_wr32(dev, NV03_PGRAPH_INTR_EN, 0xFFFFFFFF);
+
+	nv_wr32(dev, NV04_PGRAPH_VALID1, 0);
+	nv_wr32(dev, NV04_PGRAPH_VALID2, 0);
+	/*nv_wr32(dev, NV04_PGRAPH_DEBUG_0, 0x000001FF);
+	nv_wr32(dev, NV04_PGRAPH_DEBUG_0, 0x001FFFFF);*/
+	nv_wr32(dev, NV04_PGRAPH_DEBUG_0, 0x1231c000);
+	/*1231C000 blob, 001 haiku*/
+	//*V_WRITE(NV04_PGRAPH_DEBUG_1, 0xf2d91100);*/
+	nv_wr32(dev, NV04_PGRAPH_DEBUG_1, 0x72111100);
+	/*0x72111100 blob , 01 haiku*/
+	/*nv_wr32(dev, NV04_PGRAPH_DEBUG_2, 0x11d5f870);*/
+	nv_wr32(dev, NV04_PGRAPH_DEBUG_2, 0x11d5f071);
+	/*haiku same*/
+
+	/*nv_wr32(dev, NV04_PGRAPH_DEBUG_3, 0xfad4ff31);*/
+	nv_wr32(dev, NV04_PGRAPH_DEBUG_3, 0xf0d4ff31);
+	/*haiku and blob 10d4*/
+
+	nv_wr32(dev, NV04_PGRAPH_STATE        , 0xFFFFFFFF);
+	nv_wr32(dev, NV04_PGRAPH_CTX_CONTROL  , 0x10000100);
+	tmp  = nv_rd32(dev, NV04_PGRAPH_CTX_USER) & 0x00ffffff;
+	tmp |= (dev_priv->engine.fifo.channels - 1) << 24;
+	nv_wr32(dev, NV04_PGRAPH_CTX_USER, tmp);
+
+	/* These don't belong here, they're part of a per-channel context */
+	nv_wr32(dev, NV04_PGRAPH_PATTERN_SHAPE, 0x00000000);
+	nv_wr32(dev, NV04_PGRAPH_BETA_AND     , 0xFFFFFFFF);
+
+	return 0;
+}
+
+void nv04_graph_takedown(struct drm_device *dev)
+{
+}
+
+void
+nv04_graph_fifo_access(struct drm_device *dev, bool enabled)
+{
+	if (enabled)
+		nv_wr32(dev, NV04_PGRAPH_FIFO,
+					nv_rd32(dev, NV04_PGRAPH_FIFO) | 1);
+	else
+		nv_wr32(dev, NV04_PGRAPH_FIFO,
+					nv_rd32(dev, NV04_PGRAPH_FIFO) & ~1);
+}
+
+static int
+nv04_graph_mthd_set_ref(struct nouveau_channel *chan, int grclass,
+			int mthd, uint32_t data)
+{
+	chan->fence.last_sequence_irq = data;
+	nouveau_fence_handler(chan->dev, chan->id);
+	return 0;
+}
+
+static int
+nv04_graph_mthd_set_operation(struct nouveau_channel *chan, int grclass,
+			      int mthd, uint32_t data)
+{
+	struct drm_device *dev = chan->dev;
+	uint32_t instance = (nv_rd32(dev, NV04_PGRAPH_CTX_SWITCH4) & 0xffff) << 4;
+	int subc = (nv_rd32(dev, NV04_PGRAPH_TRAPPED_ADDR) >> 13) & 0x7;
+	uint32_t tmp;
+
+	tmp  = nv_ri32(dev, instance);
+	tmp &= ~0x00038000;
+	tmp |= ((data & 7) << 15);
+
+	nv_wi32(dev, instance, tmp);
+	nv_wr32(dev, NV04_PGRAPH_CTX_SWITCH1, tmp);
+	nv_wr32(dev, NV04_PGRAPH_CTX_CACHE1 + (subc<<2), tmp);
+	return 0;
+}
+
+static struct nouveau_pgraph_object_method nv04_graph_mthds_sw[] = {
+	{ 0x0150, nv04_graph_mthd_set_ref },
+	{}
+};
+
+static struct nouveau_pgraph_object_method nv04_graph_mthds_set_operation[] = {
+	{ 0x02fc, nv04_graph_mthd_set_operation },
+	{},
+};
+
+struct nouveau_pgraph_object_class nv04_graph_grclass[] = {
+	{ 0x0039, false, NULL },
+	{ 0x004a, false, nv04_graph_mthds_set_operation }, /* gdirect */
+	{ 0x005f, false, nv04_graph_mthds_set_operation }, /* imageblit */
+	{ 0x0061, false, nv04_graph_mthds_set_operation }, /* ifc */
+	{ 0x0077, false, nv04_graph_mthds_set_operation }, /* sifm */
+	{ 0x0030, false, NULL }, /* null */
+	{ 0x0042, false, NULL }, /* surf2d */
+	{ 0x0043, false, NULL }, /* rop */
+	{ 0x0012, false, NULL }, /* beta1 */
+	{ 0x0072, false, NULL }, /* beta4 */
+	{ 0x0019, false, NULL }, /* cliprect */
+	{ 0x0044, false, NULL }, /* pattern */
+	{ 0x0052, false, NULL }, /* swzsurf */
+	{ 0x0053, false, NULL }, /* surf3d */
+	{ 0x0054, false, NULL }, /* tex_tri */
+	{ 0x0055, false, NULL }, /* multitex_tri */
+	{ 0x506e, true, nv04_graph_mthds_sw },
+	{}
+};
+
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_reg.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_reg.h
@@ -0,0 +1,837 @@
+
+
+#define NV03_BOOT_0                                        0x00100000
+#    define NV03_BOOT_0_RAM_AMOUNT                         0x00000003
+#    define NV03_BOOT_0_RAM_AMOUNT_8MB                     0x00000000
+#    define NV03_BOOT_0_RAM_AMOUNT_2MB                     0x00000001
+#    define NV03_BOOT_0_RAM_AMOUNT_4MB                     0x00000002
+#    define NV03_BOOT_0_RAM_AMOUNT_8MB_SDRAM               0x00000003
+#    define NV04_BOOT_0_RAM_AMOUNT_32MB                    0x00000000
+#    define NV04_BOOT_0_RAM_AMOUNT_4MB                     0x00000001
+#    define NV04_BOOT_0_RAM_AMOUNT_8MB                     0x00000002
+#    define NV04_BOOT_0_RAM_AMOUNT_16MB                    0x00000003
+
+#define NV04_FIFO_DATA                                     0x0010020c
+#    define NV10_FIFO_DATA_RAM_AMOUNT_MB_MASK              0xfff00000
+#    define NV10_FIFO_DATA_RAM_AMOUNT_MB_SHIFT             20
+
+#define NV_RAMIN                                           0x00700000
+
+#define NV_RAMHT_HANDLE_OFFSET                             0
+#define NV_RAMHT_CONTEXT_OFFSET                            4
+#    define NV_RAMHT_CONTEXT_VALID                         (1<<31)
+#    define NV_RAMHT_CONTEXT_CHANNEL_SHIFT                 24
+#    define NV_RAMHT_CONTEXT_ENGINE_SHIFT                  16
+#        define NV_RAMHT_CONTEXT_ENGINE_SOFTWARE           0
+#        define NV_RAMHT_CONTEXT_ENGINE_GRAPHICS           1
+#    define NV_RAMHT_CONTEXT_INSTANCE_SHIFT                0
+#    define NV40_RAMHT_CONTEXT_CHANNEL_SHIFT               23
+#    define NV40_RAMHT_CONTEXT_ENGINE_SHIFT                20
+#    define NV40_RAMHT_CONTEXT_INSTANCE_SHIFT              0
+
+/* DMA object defines */
+#define NV_DMA_ACCESS_RW 0
+#define NV_DMA_ACCESS_RO 1
+#define NV_DMA_ACCESS_WO 2
+#define NV_DMA_TARGET_VIDMEM 0
+#define NV_DMA_TARGET_PCI    2
+#define NV_DMA_TARGET_AGP    3
+/* The following is not a real value used by the card, it's changed by
+ * nouveau_object_dma_create */
+#define NV_DMA_TARGET_PCI_NONLINEAR 8
+
+/* Some object classes we care about in the drm */
+#define NV_CLASS_DMA_FROM_MEMORY                           0x00000002
+#define NV_CLASS_DMA_TO_MEMORY                             0x00000003
+#define NV_CLASS_NULL                                      0x00000030
+#define NV_CLASS_DMA_IN_MEMORY                             0x0000003D
+
+#define NV03_USER(i)                             (0x00800000+(i*NV03_USER_SIZE))
+#define NV03_USER__SIZE                                                       16
+#define NV10_USER__SIZE                                                       32
+#define NV03_USER_SIZE                                                0x00010000
+#define NV03_USER_DMA_PUT(i)                     (0x00800040+(i*NV03_USER_SIZE))
+#define NV03_USER_DMA_PUT__SIZE                                               16
+#define NV10_USER_DMA_PUT__SIZE                                               32
+#define NV03_USER_DMA_GET(i)                     (0x00800044+(i*NV03_USER_SIZE))
+#define NV03_USER_DMA_GET__SIZE                                               16
+#define NV10_USER_DMA_GET__SIZE                                               32
+#define NV03_USER_REF_CNT(i)                     (0x00800048+(i*NV03_USER_SIZE))
+#define NV03_USER_REF_CNT__SIZE                                               16
+#define NV10_USER_REF_CNT__SIZE                                               32
+
+#define NV40_USER(i)                             (0x00c00000+(i*NV40_USER_SIZE))
+#define NV40_USER_SIZE                                                0x00001000
+#define NV40_USER_DMA_PUT(i)                     (0x00c00040+(i*NV40_USER_SIZE))
+#define NV40_USER_DMA_PUT__SIZE                                               32
+#define NV40_USER_DMA_GET(i)                     (0x00c00044+(i*NV40_USER_SIZE))
+#define NV40_USER_DMA_GET__SIZE                                               32
+#define NV40_USER_REF_CNT(i)                     (0x00c00048+(i*NV40_USER_SIZE))
+#define NV40_USER_REF_CNT__SIZE                                               32
+
+#define NV50_USER(i)                             (0x00c00000+(i*NV50_USER_SIZE))
+#define NV50_USER_SIZE                                                0x00002000
+#define NV50_USER_DMA_PUT(i)                     (0x00c00040+(i*NV50_USER_SIZE))
+#define NV50_USER_DMA_PUT__SIZE                                              128
+#define NV50_USER_DMA_GET(i)                     (0x00c00044+(i*NV50_USER_SIZE))
+#define NV50_USER_DMA_GET__SIZE                                              128
+#define NV50_USER_REF_CNT(i)                     (0x00c00048+(i*NV50_USER_SIZE))
+#define NV50_USER_REF_CNT__SIZE                                              128
+
+#define NV03_FIFO_SIZE                                     0x8000UL
+
+#define NV03_PMC_BOOT_0                                    0x00000000
+#define NV03_PMC_BOOT_1                                    0x00000004
+#define NV03_PMC_INTR_0                                    0x00000100
+#    define NV_PMC_INTR_0_PFIFO_PENDING                        (1<<8)
+#    define NV_PMC_INTR_0_PGRAPH_PENDING                      (1<<12)
+#    define NV_PMC_INTR_0_NV50_I2C_PENDING                    (1<<21)
+#    define NV_PMC_INTR_0_CRTC0_PENDING                       (1<<24)
+#    define NV_PMC_INTR_0_CRTC1_PENDING                       (1<<25)
+#    define NV_PMC_INTR_0_NV50_DISPLAY_PENDING                (1<<26)
+#    define NV_PMC_INTR_0_CRTCn_PENDING                       (3<<24)
+#define NV03_PMC_INTR_EN_0                                 0x00000140
+#    define NV_PMC_INTR_EN_0_MASTER_ENABLE                     (1<<0)
+#define NV03_PMC_ENABLE                                    0x00000200
+#    define NV_PMC_ENABLE_PFIFO                                (1<<8)
+#    define NV_PMC_ENABLE_PGRAPH                              (1<<12)
+/* Disabling the below bit breaks newer (G7X only?) mobile chipsets,
+ * the card will hang early on in the X init process.
+ */
+#    define NV_PMC_ENABLE_UNK13                               (1<<13)
+#define NV40_PMC_GRAPH_UNITS				   0x00001540
+#define NV40_PMC_BACKLIGHT				   0x000015f0
+#	define NV40_PMC_BACKLIGHT_MASK			   0x001f0000
+#define NV40_PMC_1700                                      0x00001700
+#define NV40_PMC_1704                                      0x00001704
+#define NV40_PMC_1708                                      0x00001708
+#define NV40_PMC_170C                                      0x0000170C
+
+/* probably PMC ? */
+#define NV50_PUNK_BAR0_PRAMIN                              0x00001700
+#define NV50_PUNK_BAR_CFG_BASE                             0x00001704
+#define NV50_PUNK_BAR_CFG_BASE_VALID                          (1<<30)
+#define NV50_PUNK_BAR1_CTXDMA                              0x00001708
+#define NV50_PUNK_BAR1_CTXDMA_VALID                           (1<<31)
+#define NV50_PUNK_BAR3_CTXDMA                              0x0000170C
+#define NV50_PUNK_BAR3_CTXDMA_VALID                           (1<<31)
+#define NV50_PUNK_UNK1710                                  0x00001710
+
+#define NV04_PBUS_PCI_NV_1                                 0x00001804
+#define NV04_PBUS_PCI_NV_19                                0x0000184C
+#define NV04_PBUS_PCI_NV_20				0x00001850
+#	define NV04_PBUS_PCI_NV_20_ROM_SHADOW_DISABLED		(0 << 0)
+#	define NV04_PBUS_PCI_NV_20_ROM_SHADOW_ENABLED		(1 << 0)
+
+#define NV04_PTIMER_INTR_0                                 0x00009100
+#define NV04_PTIMER_INTR_EN_0                              0x00009140
+#define NV04_PTIMER_NUMERATOR                              0x00009200
+#define NV04_PTIMER_DENOMINATOR                            0x00009210
+#define NV04_PTIMER_TIME_0                                 0x00009400
+#define NV04_PTIMER_TIME_1                                 0x00009410
+#define NV04_PTIMER_ALARM_0                                0x00009420
+
+#define NV04_PFB_CFG0                                      0x00100200
+#define NV04_PFB_CFG1                                      0x00100204
+#define NV40_PFB_020C                                      0x0010020C
+#define NV10_PFB_TILE(i)                                   (0x00100240 + (i*16))
+#define NV10_PFB_TILE__SIZE                                8
+#define NV10_PFB_TLIMIT(i)                                 (0x00100244 + (i*16))
+#define NV10_PFB_TSIZE(i)                                  (0x00100248 + (i*16))
+#define NV10_PFB_TSTATUS(i)                                (0x0010024C + (i*16))
+#define NV10_PFB_CLOSE_PAGE2                               0x0010033C
+#define NV40_PFB_TILE(i)                                   (0x00100600 + (i*16))
+#define NV40_PFB_TILE__SIZE_0                              12
+#define NV40_PFB_TILE__SIZE_1                              15
+#define NV40_PFB_TLIMIT(i)                                 (0x00100604 + (i*16))
+#define NV40_PFB_TSIZE(i)                                  (0x00100608 + (i*16))
+#define NV40_PFB_TSTATUS(i)                                (0x0010060C + (i*16))
+#define NV40_PFB_UNK_800					0x00100800
+
+#define NV04_PGRAPH_DEBUG_0                                0x00400080
+#define NV04_PGRAPH_DEBUG_1                                0x00400084
+#define NV04_PGRAPH_DEBUG_2                                0x00400088
+#define NV04_PGRAPH_DEBUG_3                                0x0040008c
+#define NV10_PGRAPH_DEBUG_4                                0x00400090
+#define NV03_PGRAPH_INTR                                   0x00400100
+#define NV03_PGRAPH_NSTATUS                                0x00400104
+#    define NV04_PGRAPH_NSTATUS_STATE_IN_USE                  (1<<11)
+#    define NV04_PGRAPH_NSTATUS_INVALID_STATE                 (1<<12)
+#    define NV04_PGRAPH_NSTATUS_BAD_ARGUMENT                  (1<<13)
+#    define NV04_PGRAPH_NSTATUS_PROTECTION_FAULT              (1<<14)
+#    define NV10_PGRAPH_NSTATUS_STATE_IN_USE                  (1<<23)
+#    define NV10_PGRAPH_NSTATUS_INVALID_STATE                 (1<<24)
+#    define NV10_PGRAPH_NSTATUS_BAD_ARGUMENT                  (1<<25)
+#    define NV10_PGRAPH_NSTATUS_PROTECTION_FAULT              (1<<26)
+#define NV03_PGRAPH_NSOURCE                                0x00400108
+#    define NV03_PGRAPH_NSOURCE_NOTIFICATION                   (1<<0)
+#    define NV03_PGRAPH_NSOURCE_DATA_ERROR                     (1<<1)
+#    define NV03_PGRAPH_NSOURCE_PROTECTION_ERROR               (1<<2)
+#    define NV03_PGRAPH_NSOURCE_RANGE_EXCEPTION                (1<<3)
+#    define NV03_PGRAPH_NSOURCE_LIMIT_COLOR                    (1<<4)
+#    define NV03_PGRAPH_NSOURCE_LIMIT_ZETA                     (1<<5)
+#    define NV03_PGRAPH_NSOURCE_ILLEGAL_MTHD                   (1<<6)
+#    define NV03_PGRAPH_NSOURCE_DMA_R_PROTECTION               (1<<7)
+#    define NV03_PGRAPH_NSOURCE_DMA_W_PROTECTION               (1<<8)
+#    define NV03_PGRAPH_NSOURCE_FORMAT_EXCEPTION               (1<<9)
+#    define NV03_PGRAPH_NSOURCE_PATCH_EXCEPTION               (1<<10)
+#    define NV03_PGRAPH_NSOURCE_STATE_INVALID                 (1<<11)
+#    define NV03_PGRAPH_NSOURCE_DOUBLE_NOTIFY                 (1<<12)
+#    define NV03_PGRAPH_NSOURCE_NOTIFY_IN_USE                 (1<<13)
+#    define NV03_PGRAPH_NSOURCE_METHOD_CNT                    (1<<14)
+#    define NV03_PGRAPH_NSOURCE_BFR_NOTIFICATION              (1<<15)
+#    define NV03_PGRAPH_NSOURCE_DMA_VTX_PROTECTION            (1<<16)
+#    define NV03_PGRAPH_NSOURCE_DMA_WIDTH_A                   (1<<17)
+#    define NV03_PGRAPH_NSOURCE_DMA_WIDTH_B                   (1<<18)
+#define NV03_PGRAPH_INTR_EN                                0x00400140
+#define NV40_PGRAPH_INTR_EN                                0x0040013C
+#    define NV_PGRAPH_INTR_NOTIFY                              (1<<0)
+#    define NV_PGRAPH_INTR_MISSING_HW                          (1<<4)
+#    define NV_PGRAPH_INTR_CONTEXT_SWITCH                     (1<<12)
+#    define NV_PGRAPH_INTR_BUFFER_NOTIFY                      (1<<16)
+#    define NV_PGRAPH_INTR_ERROR                              (1<<20)
+#define NV10_PGRAPH_CTX_CONTROL                            0x00400144
+#define NV10_PGRAPH_CTX_USER                               0x00400148
+#define NV10_PGRAPH_CTX_SWITCH1                            0x0040014C
+#define NV10_PGRAPH_CTX_SWITCH2                            0x00400150
+#define NV10_PGRAPH_CTX_SWITCH3                            0x00400154
+#define NV10_PGRAPH_CTX_SWITCH4                            0x00400158
+#define NV10_PGRAPH_CTX_SWITCH5                            0x0040015C
+#define NV04_PGRAPH_CTX_SWITCH1                            0x00400160
+#define NV10_PGRAPH_CTX_CACHE1                             0x00400160
+#define NV04_PGRAPH_CTX_SWITCH2                            0x00400164
+#define NV04_PGRAPH_CTX_SWITCH3                            0x00400168
+#define NV04_PGRAPH_CTX_SWITCH4                            0x0040016C
+#define NV04_PGRAPH_CTX_CONTROL                            0x00400170
+#define NV04_PGRAPH_CTX_USER                               0x00400174
+#define NV04_PGRAPH_CTX_CACHE1                             0x00400180
+#define NV10_PGRAPH_CTX_CACHE2                             0x00400180
+#define NV03_PGRAPH_CTX_CONTROL                            0x00400190
+#define NV03_PGRAPH_CTX_USER                               0x00400194
+#define NV04_PGRAPH_CTX_CACHE2                             0x004001A0
+#define NV10_PGRAPH_CTX_CACHE3                             0x004001A0
+#define NV04_PGRAPH_CTX_CACHE3                             0x004001C0
+#define NV10_PGRAPH_CTX_CACHE4                             0x004001C0
+#define NV04_PGRAPH_CTX_CACHE4                             0x004001E0
+#define NV10_PGRAPH_CTX_CACHE5                             0x004001E0
+#define NV40_PGRAPH_CTXCTL_0304                            0x00400304
+#define NV40_PGRAPH_CTXCTL_0304_XFER_CTX                   0x00000001
+#define NV40_PGRAPH_CTXCTL_UCODE_STAT                      0x00400308
+#define NV40_PGRAPH_CTXCTL_UCODE_STAT_IP_MASK              0xff000000
+#define NV40_PGRAPH_CTXCTL_UCODE_STAT_IP_SHIFT                     24
+#define NV40_PGRAPH_CTXCTL_UCODE_STAT_OP_MASK              0x00ffffff
+#define NV40_PGRAPH_CTXCTL_0310                            0x00400310
+#define NV40_PGRAPH_CTXCTL_0310_XFER_SAVE                  0x00000020
+#define NV40_PGRAPH_CTXCTL_0310_XFER_LOAD                  0x00000040
+#define NV40_PGRAPH_CTXCTL_030C                            0x0040030c
+#define NV40_PGRAPH_CTXCTL_UCODE_INDEX                     0x00400324
+#define NV40_PGRAPH_CTXCTL_UCODE_DATA                      0x00400328
+#define NV40_PGRAPH_CTXCTL_CUR                             0x0040032c
+#define NV40_PGRAPH_CTXCTL_CUR_LOADED                      0x01000000
+#define NV40_PGRAPH_CTXCTL_CUR_INSTANCE                    0x000FFFFF
+#define NV40_PGRAPH_CTXCTL_NEXT                            0x00400330
+#define NV40_PGRAPH_CTXCTL_NEXT_INSTANCE                   0x000fffff
+#define NV50_PGRAPH_CTXCTL_CUR                             0x0040032c
+#define NV50_PGRAPH_CTXCTL_CUR_LOADED                      0x80000000
+#define NV50_PGRAPH_CTXCTL_CUR_INSTANCE                    0x00ffffff
+#define NV50_PGRAPH_CTXCTL_NEXT                            0x00400330
+#define NV50_PGRAPH_CTXCTL_NEXT_INSTANCE                   0x00ffffff
+#define NV03_PGRAPH_ABS_X_RAM                              0x00400400
+#define NV03_PGRAPH_ABS_Y_RAM                              0x00400480
+#define NV03_PGRAPH_X_MISC                                 0x00400500
+#define NV03_PGRAPH_Y_MISC                                 0x00400504
+#define NV04_PGRAPH_VALID1                                 0x00400508
+#define NV04_PGRAPH_SOURCE_COLOR                           0x0040050C
+#define NV04_PGRAPH_MISC24_0                               0x00400510
+#define NV03_PGRAPH_XY_LOGIC_MISC0                         0x00400514
+#define NV03_PGRAPH_XY_LOGIC_MISC1                         0x00400518
+#define NV03_PGRAPH_XY_LOGIC_MISC2                         0x0040051C
+#define NV03_PGRAPH_XY_LOGIC_MISC3                         0x00400520
+#define NV03_PGRAPH_CLIPX_0                                0x00400524
+#define NV03_PGRAPH_CLIPX_1                                0x00400528
+#define NV03_PGRAPH_CLIPY_0                                0x0040052C
+#define NV03_PGRAPH_CLIPY_1                                0x00400530
+#define NV03_PGRAPH_ABS_ICLIP_XMAX                         0x00400534
+#define NV03_PGRAPH_ABS_ICLIP_YMAX                         0x00400538
+#define NV03_PGRAPH_ABS_UCLIP_XMIN                         0x0040053C
+#define NV03_PGRAPH_ABS_UCLIP_YMIN                         0x00400540
+#define NV03_PGRAPH_ABS_UCLIP_XMAX                         0x00400544
+#define NV03_PGRAPH_ABS_UCLIP_YMAX                         0x00400548
+#define NV03_PGRAPH_ABS_UCLIPA_XMIN                        0x00400560
+#define NV03_PGRAPH_ABS_UCLIPA_YMIN                        0x00400564
+#define NV03_PGRAPH_ABS_UCLIPA_XMAX                        0x00400568
+#define NV03_PGRAPH_ABS_UCLIPA_YMAX                        0x0040056C
+#define NV04_PGRAPH_MISC24_1                               0x00400570
+#define NV04_PGRAPH_MISC24_2                               0x00400574
+#define NV04_PGRAPH_VALID2                                 0x00400578
+#define NV04_PGRAPH_PASSTHRU_0                             0x0040057C
+#define NV04_PGRAPH_PASSTHRU_1                             0x00400580
+#define NV04_PGRAPH_PASSTHRU_2                             0x00400584
+#define NV10_PGRAPH_DIMX_TEXTURE                           0x00400588
+#define NV10_PGRAPH_WDIMX_TEXTURE                          0x0040058C
+#define NV04_PGRAPH_COMBINE_0_ALPHA                        0x00400590
+#define NV04_PGRAPH_COMBINE_0_COLOR                        0x00400594
+#define NV04_PGRAPH_COMBINE_1_ALPHA                        0x00400598
+#define NV04_PGRAPH_COMBINE_1_COLOR                        0x0040059C
+#define NV04_PGRAPH_FORMAT_0                               0x004005A8
+#define NV04_PGRAPH_FORMAT_1                               0x004005AC
+#define NV04_PGRAPH_FILTER_0                               0x004005B0
+#define NV04_PGRAPH_FILTER_1                               0x004005B4
+#define NV03_PGRAPH_MONO_COLOR0                            0x00400600
+#define NV04_PGRAPH_ROP3                                   0x00400604
+#define NV04_PGRAPH_BETA_AND                               0x00400608
+#define NV04_PGRAPH_BETA_PREMULT                           0x0040060C
+#define NV04_PGRAPH_LIMIT_VIOL_PIX                         0x00400610
+#define NV04_PGRAPH_FORMATS                                0x00400618
+#define NV10_PGRAPH_DEBUG_2                                0x00400620
+#define NV04_PGRAPH_BOFFSET0                               0x00400640
+#define NV04_PGRAPH_BOFFSET1                               0x00400644
+#define NV04_PGRAPH_BOFFSET2                               0x00400648
+#define NV04_PGRAPH_BOFFSET3                               0x0040064C
+#define NV04_PGRAPH_BOFFSET4                               0x00400650
+#define NV04_PGRAPH_BOFFSET5                               0x00400654
+#define NV04_PGRAPH_BBASE0                                 0x00400658
+#define NV04_PGRAPH_BBASE1                                 0x0040065C
+#define NV04_PGRAPH_BBASE2                                 0x00400660
+#define NV04_PGRAPH_BBASE3                                 0x00400664
+#define NV04_PGRAPH_BBASE4                                 0x00400668
+#define NV04_PGRAPH_BBASE5                                 0x0040066C
+#define NV04_PGRAPH_BPITCH0                                0x00400670
+#define NV04_PGRAPH_BPITCH1                                0x00400674
+#define NV04_PGRAPH_BPITCH2                                0x00400678
+#define NV04_PGRAPH_BPITCH3                                0x0040067C
+#define NV04_PGRAPH_BPITCH4                                0x00400680
+#define NV04_PGRAPH_BLIMIT0                                0x00400684
+#define NV04_PGRAPH_BLIMIT1                                0x00400688
+#define NV04_PGRAPH_BLIMIT2                                0x0040068C
+#define NV04_PGRAPH_BLIMIT3                                0x00400690
+#define NV04_PGRAPH_BLIMIT4                                0x00400694
+#define NV04_PGRAPH_BLIMIT5                                0x00400698
+#define NV04_PGRAPH_BSWIZZLE2                              0x0040069C
+#define NV04_PGRAPH_BSWIZZLE5                              0x004006A0
+#define NV03_PGRAPH_STATUS                                 0x004006B0
+#define NV04_PGRAPH_STATUS                                 0x00400700
+#define NV04_PGRAPH_TRAPPED_ADDR                           0x00400704
+#define NV04_PGRAPH_TRAPPED_DATA                           0x00400708
+#define NV04_PGRAPH_SURFACE                                0x0040070C
+#define NV10_PGRAPH_TRAPPED_DATA_HIGH                      0x0040070C
+#define NV04_PGRAPH_STATE                                  0x00400710
+#define NV10_PGRAPH_SURFACE                                0x00400710
+#define NV04_PGRAPH_NOTIFY                                 0x00400714
+#define NV10_PGRAPH_STATE                                  0x00400714
+#define NV10_PGRAPH_NOTIFY                                 0x00400718
+
+#define NV04_PGRAPH_FIFO                                   0x00400720
+
+#define NV04_PGRAPH_BPIXEL                                 0x00400724
+#define NV10_PGRAPH_RDI_INDEX                              0x00400750
+#define NV04_PGRAPH_FFINTFC_ST2                            0x00400754
+#define NV10_PGRAPH_RDI_DATA                               0x00400754
+#define NV04_PGRAPH_DMA_PITCH                              0x00400760
+#define NV10_PGRAPH_FFINTFC_ST2                            0x00400764
+#define NV04_PGRAPH_DVD_COLORFMT                           0x00400764
+#define NV04_PGRAPH_SCALED_FORMAT                          0x00400768
+#define NV10_PGRAPH_DMA_PITCH                              0x00400770
+#define NV10_PGRAPH_DVD_COLORFMT                           0x00400774
+#define NV10_PGRAPH_SCALED_FORMAT                          0x00400778
+#define NV20_PGRAPH_CHANNEL_CTX_TABLE                      0x00400780
+#define NV20_PGRAPH_CHANNEL_CTX_POINTER                    0x00400784
+#define NV20_PGRAPH_CHANNEL_CTX_XFER                       0x00400788
+#define NV20_PGRAPH_CHANNEL_CTX_XFER_LOAD                  0x00000001
+#define NV20_PGRAPH_CHANNEL_CTX_XFER_SAVE                  0x00000002
+#define NV04_PGRAPH_PATT_COLOR0                            0x00400800
+#define NV04_PGRAPH_PATT_COLOR1                            0x00400804
+#define NV04_PGRAPH_PATTERN                                0x00400808
+#define NV04_PGRAPH_PATTERN_SHAPE                          0x00400810
+#define NV04_PGRAPH_CHROMA                                 0x00400814
+#define NV04_PGRAPH_CONTROL0                               0x00400818
+#define NV04_PGRAPH_CONTROL1                               0x0040081C
+#define NV04_PGRAPH_CONTROL2                               0x00400820
+#define NV04_PGRAPH_BLEND                                  0x00400824
+#define NV04_PGRAPH_STORED_FMT                             0x00400830
+#define NV04_PGRAPH_PATT_COLORRAM                          0x00400900
+#define NV20_PGRAPH_TILE(i)                                (0x00400900 + (i*16))
+#define NV20_PGRAPH_TLIMIT(i)                              (0x00400904 + (i*16))
+#define NV20_PGRAPH_TSIZE(i)                               (0x00400908 + (i*16))
+#define NV20_PGRAPH_TSTATUS(i)                             (0x0040090C + (i*16))
+#define NV10_PGRAPH_TILE(i)                                (0x00400B00 + (i*16))
+#define NV10_PGRAPH_TLIMIT(i)                              (0x00400B04 + (i*16))
+#define NV10_PGRAPH_TSIZE(i)                               (0x00400B08 + (i*16))
+#define NV10_PGRAPH_TSTATUS(i)                             (0x00400B0C + (i*16))
+#define NV04_PGRAPH_U_RAM                                  0x00400D00
+#define NV47_PGRAPH_TILE(i)                                (0x00400D00 + (i*16))
+#define NV47_PGRAPH_TLIMIT(i)                              (0x00400D04 + (i*16))
+#define NV47_PGRAPH_TSIZE(i)                               (0x00400D08 + (i*16))
+#define NV47_PGRAPH_TSTATUS(i)                             (0x00400D0C + (i*16))
+#define NV04_PGRAPH_V_RAM                                  0x00400D40
+#define NV04_PGRAPH_W_RAM                                  0x00400D80
+#define NV10_PGRAPH_COMBINER0_IN_ALPHA                     0x00400E40
+#define NV10_PGRAPH_COMBINER1_IN_ALPHA                     0x00400E44
+#define NV10_PGRAPH_COMBINER0_IN_RGB                       0x00400E48
+#define NV10_PGRAPH_COMBINER1_IN_RGB                       0x00400E4C
+#define NV10_PGRAPH_COMBINER_COLOR0                        0x00400E50
+#define NV10_PGRAPH_COMBINER_COLOR1                        0x00400E54
+#define NV10_PGRAPH_COMBINER0_OUT_ALPHA                    0x00400E58
+#define NV10_PGRAPH_COMBINER1_OUT_ALPHA                    0x00400E5C
+#define NV10_PGRAPH_COMBINER0_OUT_RGB                      0x00400E60
+#define NV10_PGRAPH_COMBINER1_OUT_RGB                      0x00400E64
+#define NV10_PGRAPH_COMBINER_FINAL0                        0x00400E68
+#define NV10_PGRAPH_COMBINER_FINAL1                        0x00400E6C
+#define NV10_PGRAPH_WINDOWCLIP_HORIZONTAL                  0x00400F00
+#define NV10_PGRAPH_WINDOWCLIP_VERTICAL                    0x00400F20
+#define NV10_PGRAPH_XFMODE0                                0x00400F40
+#define NV10_PGRAPH_XFMODE1                                0x00400F44
+#define NV10_PGRAPH_GLOBALSTATE0                           0x00400F48
+#define NV10_PGRAPH_GLOBALSTATE1                           0x00400F4C
+#define NV10_PGRAPH_PIPE_ADDRESS                           0x00400F50
+#define NV10_PGRAPH_PIPE_DATA                              0x00400F54
+#define NV04_PGRAPH_DMA_START_0                            0x00401000
+#define NV04_PGRAPH_DMA_START_1                            0x00401004
+#define NV04_PGRAPH_DMA_LENGTH                             0x00401008
+#define NV04_PGRAPH_DMA_MISC                               0x0040100C
+#define NV04_PGRAPH_DMA_DATA_0                             0x00401020
+#define NV04_PGRAPH_DMA_DATA_1                             0x00401024
+#define NV04_PGRAPH_DMA_RM                                 0x00401030
+#define NV04_PGRAPH_DMA_A_XLATE_INST                       0x00401040
+#define NV04_PGRAPH_DMA_A_CONTROL                          0x00401044
+#define NV04_PGRAPH_DMA_A_LIMIT                            0x00401048
+#define NV04_PGRAPH_DMA_A_TLB_PTE                          0x0040104C
+#define NV04_PGRAPH_DMA_A_TLB_TAG                          0x00401050
+#define NV04_PGRAPH_DMA_A_ADJ_OFFSET                       0x00401054
+#define NV04_PGRAPH_DMA_A_OFFSET                           0x00401058
+#define NV04_PGRAPH_DMA_A_SIZE                             0x0040105C
+#define NV04_PGRAPH_DMA_A_Y_SIZE                           0x00401060
+#define NV04_PGRAPH_DMA_B_XLATE_INST                       0x00401080
+#define NV04_PGRAPH_DMA_B_CONTROL                          0x00401084
+#define NV04_PGRAPH_DMA_B_LIMIT                            0x00401088
+#define NV04_PGRAPH_DMA_B_TLB_PTE                          0x0040108C
+#define NV04_PGRAPH_DMA_B_TLB_TAG                          0x00401090
+#define NV04_PGRAPH_DMA_B_ADJ_OFFSET                       0x00401094
+#define NV04_PGRAPH_DMA_B_OFFSET                           0x00401098
+#define NV04_PGRAPH_DMA_B_SIZE                             0x0040109C
+#define NV04_PGRAPH_DMA_B_Y_SIZE                           0x004010A0
+#define NV40_PGRAPH_TILE1(i)                               (0x00406900 + (i*16))
+#define NV40_PGRAPH_TLIMIT1(i)                             (0x00406904 + (i*16))
+#define NV40_PGRAPH_TSIZE1(i)                              (0x00406908 + (i*16))
+#define NV40_PGRAPH_TSTATUS1(i)                            (0x0040690C + (i*16))
+
+
+/* It's a guess that this works on NV03. Confirmed on NV04, though */
+#define NV04_PFIFO_DELAY_0                                 0x00002040
+#define NV04_PFIFO_DMA_TIMESLICE                           0x00002044
+#define NV04_PFIFO_NEXT_CHANNEL                            0x00002050
+#define NV03_PFIFO_INTR_0                                  0x00002100
+#define NV03_PFIFO_INTR_EN_0                               0x00002140
+#    define NV_PFIFO_INTR_CACHE_ERROR                          (1<<0)
+#    define NV_PFIFO_INTR_RUNOUT                               (1<<4)
+#    define NV_PFIFO_INTR_RUNOUT_OVERFLOW                      (1<<8)
+#    define NV_PFIFO_INTR_DMA_PUSHER                          (1<<12)
+#    define NV_PFIFO_INTR_DMA_PT                              (1<<16)
+#    define NV_PFIFO_INTR_SEMAPHORE                           (1<<20)
+#    define NV_PFIFO_INTR_ACQUIRE_TIMEOUT                     (1<<24)
+#define NV03_PFIFO_RAMHT                                   0x00002210
+#define NV03_PFIFO_RAMFC                                   0x00002214
+#define NV03_PFIFO_RAMRO                                   0x00002218
+#define NV40_PFIFO_RAMFC                                   0x00002220
+#define NV03_PFIFO_CACHES                                  0x00002500
+#define NV04_PFIFO_MODE                                    0x00002504
+#define NV04_PFIFO_DMA                                     0x00002508
+#define NV04_PFIFO_SIZE                                    0x0000250c
+#define NV50_PFIFO_CTX_TABLE(c)                        (0x2600+(c)*4)
+#define NV50_PFIFO_CTX_TABLE__SIZE                                128
+#define NV50_PFIFO_CTX_TABLE_CHANNEL_ENABLED                  (1<<31)
+#define NV50_PFIFO_CTX_TABLE_UNK30_BAD                        (1<<30)
+#define NV50_PFIFO_CTX_TABLE_INSTANCE_MASK_G80             0x0FFFFFFF
+#define NV50_PFIFO_CTX_TABLE_INSTANCE_MASK_G84             0x00FFFFFF
+#define NV03_PFIFO_CACHE0_PUSH0                            0x00003000
+#define NV03_PFIFO_CACHE0_PULL0                            0x00003040
+#define NV04_PFIFO_CACHE0_PULL0                            0x00003050
+#define NV04_PFIFO_CACHE0_PULL1                            0x00003054
+#define NV03_PFIFO_CACHE1_PUSH0                            0x00003200
+#define NV03_PFIFO_CACHE1_PUSH1                            0x00003204
+#define NV03_PFIFO_CACHE1_PUSH1_DMA                            (1<<8)
+#define NV40_PFIFO_CACHE1_PUSH1_DMA                           (1<<16)
+#define NV03_PFIFO_CACHE1_PUSH1_CHID_MASK                  0x0000000f
+#define NV10_PFIFO_CACHE1_PUSH1_CHID_MASK                  0x0000001f
+#define NV50_PFIFO_CACHE1_PUSH1_CHID_MASK                  0x0000007f
+#define NV03_PFIFO_CACHE1_PUT                              0x00003210
+#define NV04_PFIFO_CACHE1_DMA_PUSH                         0x00003220
+#define NV04_PFIFO_CACHE1_DMA_FETCH                        0x00003224
+#    define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_8_BYTES         0x00000000
+#    define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_16_BYTES        0x00000008
+#    define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_24_BYTES        0x00000010
+#    define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_32_BYTES        0x00000018
+#    define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_40_BYTES        0x00000020
+#    define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_48_BYTES        0x00000028
+#    define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_56_BYTES        0x00000030
+#    define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_64_BYTES        0x00000038
+#    define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_72_BYTES        0x00000040
+#    define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_80_BYTES        0x00000048
+#    define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_88_BYTES        0x00000050
+#    define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_96_BYTES        0x00000058
+#    define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_104_BYTES       0x00000060
+#    define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_112_BYTES       0x00000068
+#    define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_120_BYTES       0x00000070
+#    define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_128_BYTES       0x00000078
+#    define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_136_BYTES       0x00000080
+#    define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_144_BYTES       0x00000088
+#    define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_152_BYTES       0x00000090
+#    define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_160_BYTES       0x00000098
+#    define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_168_BYTES       0x000000A0
+#    define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_176_BYTES       0x000000A8
+#    define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_184_BYTES       0x000000B0
+#    define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_192_BYTES       0x000000B8
+#    define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_200_BYTES       0x000000C0
+#    define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_208_BYTES       0x000000C8
+#    define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_216_BYTES       0x000000D0
+#    define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_224_BYTES       0x000000D8
+#    define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_232_BYTES       0x000000E0
+#    define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_240_BYTES       0x000000E8
+#    define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_248_BYTES       0x000000F0
+#    define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_256_BYTES       0x000000F8
+#    define NV_PFIFO_CACHE1_DMA_FETCH_SIZE                 0x0000E000
+#    define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_32_BYTES        0x00000000
+#    define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_64_BYTES        0x00002000
+#    define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_96_BYTES        0x00004000
+#    define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_128_BYTES       0x00006000
+#    define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_160_BYTES       0x00008000
+#    define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_192_BYTES       0x0000A000
+#    define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_224_BYTES       0x0000C000
+#    define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_256_BYTES       0x0000E000
+#    define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS             0x001F0000
+#    define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_0           0x00000000
+#    define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_1           0x00010000
+#    define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_2           0x00020000
+#    define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_3           0x00030000
+#    define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_4           0x00040000
+#    define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_5           0x00050000
+#    define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_6           0x00060000
+#    define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_7           0x00070000
+#    define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_8           0x00080000
+#    define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_9           0x00090000
+#    define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_10          0x000A0000
+#    define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_11          0x000B0000
+#    define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_12          0x000C0000
+#    define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_13          0x000D0000
+#    define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_14          0x000E0000
+#    define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_15          0x000F0000
+#    define NV_PFIFO_CACHE1_ENDIAN                         0x80000000
+#    define NV_PFIFO_CACHE1_LITTLE_ENDIAN                  0x7FFFFFFF
+#    define NV_PFIFO_CACHE1_BIG_ENDIAN                     0x80000000
+#define NV04_PFIFO_CACHE1_DMA_STATE                        0x00003228
+#define NV04_PFIFO_CACHE1_DMA_INSTANCE                     0x0000322c
+#define NV04_PFIFO_CACHE1_DMA_CTL                          0x00003230
+#define NV04_PFIFO_CACHE1_DMA_PUT                          0x00003240
+#define NV04_PFIFO_CACHE1_DMA_GET                          0x00003244
+#define NV10_PFIFO_CACHE1_REF_CNT                          0x00003248
+#define NV10_PFIFO_CACHE1_DMA_SUBROUTINE                   0x0000324C
+#define NV03_PFIFO_CACHE1_PULL0                            0x00003240
+#define NV04_PFIFO_CACHE1_PULL0                            0x00003250
+#define NV03_PFIFO_CACHE1_PULL1                            0x00003250
+#define NV04_PFIFO_CACHE1_PULL1                            0x00003254
+#define NV04_PFIFO_CACHE1_HASH                             0x00003258
+#define NV10_PFIFO_CACHE1_ACQUIRE_TIMEOUT                  0x00003260
+#define NV10_PFIFO_CACHE1_ACQUIRE_TIMESTAMP                0x00003264
+#define NV10_PFIFO_CACHE1_ACQUIRE_VALUE                    0x00003268
+#define NV10_PFIFO_CACHE1_SEMAPHORE                        0x0000326C
+#define NV03_PFIFO_CACHE1_GET                              0x00003270
+#define NV04_PFIFO_CACHE1_ENGINE                           0x00003280
+#define NV04_PFIFO_CACHE1_DMA_DCOUNT                       0x000032A0
+#define NV40_PFIFO_GRCTX_INSTANCE                          0x000032E0
+#define NV40_PFIFO_UNK32E4                                 0x000032E4
+#define NV04_PFIFO_CACHE1_METHOD(i)                (0x00003800+(i*8))
+#define NV04_PFIFO_CACHE1_DATA(i)                  (0x00003804+(i*8))
+#define NV40_PFIFO_CACHE1_METHOD(i)                (0x00090000+(i*8))
+#define NV40_PFIFO_CACHE1_DATA(i)                  (0x00090004+(i*8))
+
+#define NV_CRTC0_INTSTAT                                   0x00600100
+#define NV_CRTC0_INTEN                                     0x00600140
+#define NV_CRTC1_INTSTAT                                   0x00602100
+#define NV_CRTC1_INTEN                                     0x00602140
+#    define NV_CRTC_INTR_VBLANK                                (1<<0)
+
+#define NV04_PRAMIN						0x00700000
+
+/* Fifo commands. These are not regs, neither masks */
+#define NV03_FIFO_CMD_JUMP                                 0x20000000
+#define NV03_FIFO_CMD_JUMP_OFFSET_MASK                     0x1ffffffc
+#define NV03_FIFO_CMD_REWIND                               (NV03_FIFO_CMD_JUMP | (0 & NV03_FIFO_CMD_JUMP_OFFSET_MASK))
+
+/* This is a partial import from rules-ng, a few things may be duplicated.
+ * Eventually we should completely import everything from rules-ng.
+ * For the moment check rules-ng for docs.
+  */
+
+#define NV50_PMC                                            0x00000000
+#define NV50_PMC__LEN                                              0x1
+#define NV50_PMC__ESIZE                                         0x2000
+#    define NV50_PMC_BOOT_0                                 0x00000000
+#        define NV50_PMC_BOOT_0_REVISION                    0x000000ff
+#        define NV50_PMC_BOOT_0_REVISION__SHIFT                      0
+#        define NV50_PMC_BOOT_0_ARCH                        0x0ff00000
+#        define NV50_PMC_BOOT_0_ARCH__SHIFT                         20
+#    define NV50_PMC_INTR_0                                 0x00000100
+#        define NV50_PMC_INTR_0_PFIFO                           (1<<8)
+#        define NV50_PMC_INTR_0_PGRAPH                         (1<<12)
+#        define NV50_PMC_INTR_0_PTIMER                         (1<<20)
+#        define NV50_PMC_INTR_0_HOTPLUG                        (1<<21)
+#        define NV50_PMC_INTR_0_DISPLAY                        (1<<26)
+#    define NV50_PMC_INTR_EN_0                              0x00000140
+#        define NV50_PMC_INTR_EN_0_MASTER                       (1<<0)
+#            define NV50_PMC_INTR_EN_0_MASTER_DISABLED          (0<<0)
+#            define NV50_PMC_INTR_EN_0_MASTER_ENABLED           (1<<0)
+#    define NV50_PMC_ENABLE                                 0x00000200
+#        define NV50_PMC_ENABLE_PFIFO                           (1<<8)
+#        define NV50_PMC_ENABLE_PGRAPH                         (1<<12)
+
+#define NV50_PCONNECTOR                                     0x0000e000
+#define NV50_PCONNECTOR__LEN                                       0x1
+#define NV50_PCONNECTOR__ESIZE                                  0x1000
+#    define NV50_PCONNECTOR_HOTPLUG_INTR                    0x0000e050
+#        define NV50_PCONNECTOR_HOTPLUG_INTR_PLUG_I2C0          (1<<0)
+#        define NV50_PCONNECTOR_HOTPLUG_INTR_PLUG_I2C1          (1<<1)
+#        define NV50_PCONNECTOR_HOTPLUG_INTR_PLUG_I2C2          (1<<2)
+#        define NV50_PCONNECTOR_HOTPLUG_INTR_PLUG_I2C3          (1<<3)
+#        define NV50_PCONNECTOR_HOTPLUG_INTR_UNPLUG_I2C0       (1<<16)
+#        define NV50_PCONNECTOR_HOTPLUG_INTR_UNPLUG_I2C1       (1<<17)
+#        define NV50_PCONNECTOR_HOTPLUG_INTR_UNPLUG_I2C2       (1<<18)
+#        define NV50_PCONNECTOR_HOTPLUG_INTR_UNPLUG_I2C3       (1<<19)
+#    define NV50_PCONNECTOR_HOTPLUG_CTRL                    0x0000e054
+#        define NV50_PCONNECTOR_HOTPLUG_CTRL_PLUG_I2C0          (1<<0)
+#        define NV50_PCONNECTOR_HOTPLUG_CTRL_PLUG_I2C1          (1<<1)
+#        define NV50_PCONNECTOR_HOTPLUG_CTRL_PLUG_I2C2          (1<<2)
+#        define NV50_PCONNECTOR_HOTPLUG_CTRL_PLUG_I2C3          (1<<3)
+#        define NV50_PCONNECTOR_HOTPLUG_CTRL_UNPLUG_I2C0       (1<<16)
+#        define NV50_PCONNECTOR_HOTPLUG_CTRL_UNPLUG_I2C1       (1<<17)
+#        define NV50_PCONNECTOR_HOTPLUG_CTRL_UNPLUG_I2C2       (1<<18)
+#        define NV50_PCONNECTOR_HOTPLUG_CTRL_UNPLUG_I2C3       (1<<19)
+#    define NV50_PCONNECTOR_HOTPLUG_STATE                   0x0000e104
+#        define NV50_PCONNECTOR_HOTPLUG_STATE_PIN_CONNECTED_I2C0 (1<<2)
+#        define NV50_PCONNECTOR_HOTPLUG_STATE_PIN_CONNECTED_I2C1 (1<<6)
+#        define NV50_PCONNECTOR_HOTPLUG_STATE_PIN_CONNECTED_I2C2 (1<<10)
+#        define NV50_PCONNECTOR_HOTPLUG_STATE_PIN_CONNECTED_I2C3 (1<<14)
+#    define NV50_PCONNECTOR_I2C_PORT_0                      0x0000e138
+#    define NV50_PCONNECTOR_I2C_PORT_1                      0x0000e150
+#    define NV50_PCONNECTOR_I2C_PORT_2                      0x0000e168
+#    define NV50_PCONNECTOR_I2C_PORT_3                      0x0000e180
+#    define NV50_PCONNECTOR_I2C_PORT_4                      0x0000e240
+#    define NV50_PCONNECTOR_I2C_PORT_5                      0x0000e258
+
+#define NV50_AUXCH_DATA_OUT(i,n)             ((n) * 4 + (i) * 0x50 + 0x0000e4c0)
+#define NV50_AUXCH_DATA_OUT__SIZE                                             4
+#define NV50_AUXCH_DATA_IN(i,n)              ((n) * 4 + (i) * 0x50 + 0x0000e4d0)
+#define NV50_AUXCH_DATA_IN__SIZE                                              4
+#define NV50_AUXCH_ADDR(i)                             ((i) * 0x50 + 0x0000e4e0)
+#define NV50_AUXCH_CTRL(i)                             ((i) * 0x50 + 0x0000e4e4)
+#define NV50_AUXCH_CTRL_LINKSTAT                                     0x01000000
+#define NV50_AUXCH_CTRL_LINKSTAT_NOT_READY                           0x00000000
+#define NV50_AUXCH_CTRL_LINKSTAT_READY                               0x01000000
+#define NV50_AUXCH_CTRL_LINKEN                                       0x00100000
+#define NV50_AUXCH_CTRL_LINKEN_DISABLED                              0x00000000
+#define NV50_AUXCH_CTRL_LINKEN_ENABLED                               0x00100000
+#define NV50_AUXCH_CTRL_EXEC                                         0x00010000
+#define NV50_AUXCH_CTRL_EXEC_COMPLETE                                0x00000000
+#define NV50_AUXCH_CTRL_EXEC_IN_PROCESS                              0x00010000
+#define NV50_AUXCH_CTRL_CMD                                          0x0000f000
+#define NV50_AUXCH_CTRL_CMD_SHIFT                                            12
+#define NV50_AUXCH_CTRL_LEN                                          0x0000000f
+#define NV50_AUXCH_CTRL_LEN_SHIFT                                             0
+#define NV50_AUXCH_STAT(i)                             ((i) * 0x50 + 0x0000e4e8)
+#define NV50_AUXCH_STAT_STATE                                        0x10000000
+#define NV50_AUXCH_STAT_STATE_NOT_READY                              0x00000000
+#define NV50_AUXCH_STAT_STATE_READY                                  0x10000000
+#define NV50_AUXCH_STAT_REPLY                                        0x000f0000
+#define NV50_AUXCH_STAT_REPLY_AUX                                    0x00030000
+#define NV50_AUXCH_STAT_REPLY_AUX_ACK                                0x00000000
+#define NV50_AUXCH_STAT_REPLY_AUX_NACK                               0x00010000
+#define NV50_AUXCH_STAT_REPLY_AUX_DEFER                              0x00020000
+#define NV50_AUXCH_STAT_REPLY_I2C                                    0x000c0000
+#define NV50_AUXCH_STAT_REPLY_I2C_ACK                                0x00000000
+#define NV50_AUXCH_STAT_REPLY_I2C_NACK                               0x00040000
+#define NV50_AUXCH_STAT_REPLY_I2C_DEFER                              0x00080000
+#define NV50_AUXCH_STAT_COUNT                                        0x0000001f
+
+#define NV50_PBUS                                           0x00088000
+#define NV50_PBUS__LEN                                             0x1
+#define NV50_PBUS__ESIZE                                        0x1000
+#    define NV50_PBUS_PCI_ID                                0x00088000
+#        define NV50_PBUS_PCI_ID_VENDOR_ID                  0x0000ffff
+#        define NV50_PBUS_PCI_ID_VENDOR_ID__SHIFT                    0
+#        define NV50_PBUS_PCI_ID_DEVICE_ID                  0xffff0000
+#        define NV50_PBUS_PCI_ID_DEVICE_ID__SHIFT                   16
+
+#define NV50_PFB                                            0x00100000
+#define NV50_PFB__LEN                                              0x1
+#define NV50_PFB__ESIZE                                         0x1000
+
+#define NV50_PEXTDEV                                        0x00101000
+#define NV50_PEXTDEV__LEN                                          0x1
+#define NV50_PEXTDEV__ESIZE                                     0x1000
+
+#define NV50_PROM                                           0x00300000
+#define NV50_PROM__LEN                                             0x1
+#define NV50_PROM__ESIZE                                       0x10000
+
+#define NV50_PGRAPH                                         0x00400000
+#define NV50_PGRAPH__LEN                                           0x1
+#define NV50_PGRAPH__ESIZE                                     0x10000
+
+#define NV50_PDISPLAY                                                0x00610000
+#define NV50_PDISPLAY_OBJECTS                                        0x00610010
+#define NV50_PDISPLAY_INTR_0                                         0x00610020
+#define NV50_PDISPLAY_INTR_1                                         0x00610024
+#define NV50_PDISPLAY_INTR_1_VBLANK_CRTC                             0x0000000c
+#define NV50_PDISPLAY_INTR_1_VBLANK_CRTC_SHIFT                                2
+#define NV50_PDISPLAY_INTR_1_VBLANK_CRTC_(n)                   (1 << ((n) + 2))
+#define NV50_PDISPLAY_INTR_1_VBLANK_CRTC_0                           0x00000004
+#define NV50_PDISPLAY_INTR_1_VBLANK_CRTC_1                           0x00000008
+#define NV50_PDISPLAY_INTR_1_CLK_UNK10                               0x00000010
+#define NV50_PDISPLAY_INTR_1_CLK_UNK20                               0x00000020
+#define NV50_PDISPLAY_INTR_1_CLK_UNK40                               0x00000040
+#define NV50_PDISPLAY_INTR_EN                                        0x0061002c
+#define NV50_PDISPLAY_INTR_EN_VBLANK_CRTC                            0x0000000c
+#define NV50_PDISPLAY_INTR_EN_VBLANK_CRTC_(n)                   (1 << ((n) + 2))
+#define NV50_PDISPLAY_INTR_EN_VBLANK_CRTC_0                          0x00000004
+#define NV50_PDISPLAY_INTR_EN_VBLANK_CRTC_1                          0x00000008
+#define NV50_PDISPLAY_INTR_EN_CLK_UNK10                              0x00000010
+#define NV50_PDISPLAY_INTR_EN_CLK_UNK20                              0x00000020
+#define NV50_PDISPLAY_INTR_EN_CLK_UNK40                              0x00000040
+#define NV50_PDISPLAY_UNK30_CTRL                                     0x00610030
+#define NV50_PDISPLAY_UNK30_CTRL_UPDATE_VCLK0                        0x00000200
+#define NV50_PDISPLAY_UNK30_CTRL_UPDATE_VCLK1                        0x00000400
+#define NV50_PDISPLAY_UNK30_CTRL_PENDING                             0x80000000
+#define NV50_PDISPLAY_TRAPPED_ADDR                                   0x00610080
+#define NV50_PDISPLAY_TRAPPED_DATA                                   0x00610084
+#define NV50_PDISPLAY_CHANNEL_STAT(i)                  ((i) * 0x10 + 0x00610200)
+#define NV50_PDISPLAY_CHANNEL_STAT_DMA                               0x00000010
+#define NV50_PDISPLAY_CHANNEL_STAT_DMA_DISABLED                      0x00000000
+#define NV50_PDISPLAY_CHANNEL_STAT_DMA_ENABLED                       0x00000010
+#define NV50_PDISPLAY_CHANNEL_DMA_CB(i)                ((i) * 0x10 + 0x00610204)
+#define NV50_PDISPLAY_CHANNEL_DMA_CB_LOCATION                        0x00000002
+#define NV50_PDISPLAY_CHANNEL_DMA_CB_LOCATION_VRAM                   0x00000000
+#define NV50_PDISPLAY_CHANNEL_DMA_CB_LOCATION_SYSTEM                 0x00000002
+#define NV50_PDISPLAY_CHANNEL_DMA_CB_VALID                           0x00000001
+#define NV50_PDISPLAY_CHANNEL_UNK2(i)                  ((i) * 0x10 + 0x00610208)
+#define NV50_PDISPLAY_CHANNEL_UNK3(i)                  ((i) * 0x10 + 0x0061020c)
+
+#define NV50_PDISPLAY_CURSOR                                         0x00610270
+#define NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(i)           ((i) * 0x10 + 0x00610270)
+#define NV50_PDISPLAY_CURSOR_CURSOR_CTRL2_ON                         0x00000001
+#define NV50_PDISPLAY_CURSOR_CURSOR_CTRL2_STATUS                     0x00030000
+#define NV50_PDISPLAY_CURSOR_CURSOR_CTRL2_STATUS_ACTIVE              0x00010000
+
+#define NV50_PDISPLAY_CTRL_STATE                                     0x00610300
+#define NV50_PDISPLAY_CTRL_STATE_PENDING                             0x80000000
+#define NV50_PDISPLAY_CTRL_STATE_METHOD                              0x00001ffc
+#define NV50_PDISPLAY_CTRL_STATE_ENABLE                              0x00000001
+#define NV50_PDISPLAY_CTRL_VAL                                       0x00610304
+#define NV50_PDISPLAY_UNK_380                                        0x00610380
+#define NV50_PDISPLAY_RAM_AMOUNT                                     0x00610384
+#define NV50_PDISPLAY_UNK_388                                        0x00610388
+#define NV50_PDISPLAY_UNK_38C                                        0x0061038c
+
+#define NV50_PDISPLAY_CRTC_P(i, r)        ((i) * 0x540 + NV50_PDISPLAY_CRTC_##r)
+#define NV50_PDISPLAY_CRTC_C(i, r)    (4 + (i) * 0x540 + NV50_PDISPLAY_CRTC_##r)
+#define NV50_PDISPLAY_CRTC_UNK_0A18 /* mthd 0x0900 */                0x00610a18
+#define NV50_PDISPLAY_CRTC_CLUT_MODE                                 0x00610a24
+#define NV50_PDISPLAY_CRTC_INTERLACE                                 0x00610a48
+#define NV50_PDISPLAY_CRTC_SCALE_CTRL                                0x00610a50
+#define NV50_PDISPLAY_CRTC_CURSOR_CTRL                               0x00610a58
+#define NV50_PDISPLAY_CRTC_UNK0A78 /* mthd 0x0904 */                 0x00610a78
+#define NV50_PDISPLAY_CRTC_UNK0AB8                                   0x00610ab8
+#define NV50_PDISPLAY_CRTC_DEPTH                                     0x00610ac8
+#define NV50_PDISPLAY_CRTC_CLOCK                                     0x00610ad0
+#define NV50_PDISPLAY_CRTC_COLOR_CTRL                                0x00610ae0
+#define NV50_PDISPLAY_CRTC_SYNC_START_TO_BLANK_END                   0x00610ae8
+#define NV50_PDISPLAY_CRTC_MODE_UNK1                                 0x00610af0
+#define NV50_PDISPLAY_CRTC_DISPLAY_TOTAL                             0x00610af8
+#define NV50_PDISPLAY_CRTC_SYNC_DURATION                             0x00610b00
+#define NV50_PDISPLAY_CRTC_MODE_UNK2                                 0x00610b08
+#define NV50_PDISPLAY_CRTC_UNK_0B10 /* mthd 0x0828 */                0x00610b10
+#define NV50_PDISPLAY_CRTC_FB_SIZE                                   0x00610b18
+#define NV50_PDISPLAY_CRTC_FB_PITCH                                  0x00610b20
+#define NV50_PDISPLAY_CRTC_FB_PITCH_LINEAR                           0x00100000
+#define NV50_PDISPLAY_CRTC_FB_POS                                    0x00610b28
+#define NV50_PDISPLAY_CRTC_SCALE_CENTER_OFFSET                       0x00610b38
+#define NV50_PDISPLAY_CRTC_REAL_RES                                  0x00610b40
+#define NV50_PDISPLAY_CRTC_SCALE_RES1                                0x00610b48
+#define NV50_PDISPLAY_CRTC_SCALE_RES2                                0x00610b50
+
+#define NV50_PDISPLAY_DAC_MODE_CTRL_P(i)                (0x00610b58 + (i) * 0x8)
+#define NV50_PDISPLAY_DAC_MODE_CTRL_C(i)                (0x00610b5c + (i) * 0x8)
+#define NV50_PDISPLAY_SOR_MODE_CTRL_P(i)                (0x00610b70 + (i) * 0x8)
+#define NV50_PDISPLAY_SOR_MODE_CTRL_C(i)                (0x00610b74 + (i) * 0x8)
+#define NV50_PDISPLAY_DAC_MODE_CTRL2_P(i)               (0x00610bdc + (i) * 0x8)
+#define NV50_PDISPLAY_DAC_MODE_CTRL2_C(i)               (0x00610be0 + (i) * 0x8)
+
+#define NV90_PDISPLAY_SOR_MODE_CTRL_P(i)                (0x00610794 + (i) * 0x8)
+#define NV90_PDISPLAY_SOR_MODE_CTRL_C(i)                (0x00610798 + (i) * 0x8)
+#define NV90_PDISPLAY_DAC_MODE_CTRL_P(i)                (0x00610b58 + (i) * 0x8)
+#define NV90_PDISPLAY_DAC_MODE_CTRL_C(i)                (0x00610b5c + (i) * 0x8)
+#define NV90_PDISPLAY_DAC_MODE_CTRL2_P(i)               (0x00610b80 + (i) * 0x8)
+#define NV90_PDISPLAY_DAC_MODE_CTRL2_C(i)               (0x00610b84 + (i) * 0x8)
+
+#define NV50_PDISPLAY_CRTC_CLK                                       0x00614000
+#define NV50_PDISPLAY_CRTC_CLK_CTRL1(i)                 ((i) * 0x800 + 0x614100)
+#define NV50_PDISPLAY_CRTC_CLK_CTRL1_CONNECTED                       0x00000600
+#define NV50_PDISPLAY_CRTC_CLK_VPLL_A(i)                ((i) * 0x800 + 0x614104)
+#define NV50_PDISPLAY_CRTC_CLK_VPLL_B(i)                ((i) * 0x800 + 0x614108)
+#define NV50_PDISPLAY_CRTC_CLK_CTRL2(i)                 ((i) * 0x800 + 0x614200)
+
+#define NV50_PDISPLAY_DAC_CLK                                        0x00614000
+#define NV50_PDISPLAY_DAC_CLK_CTRL2(i)                  ((i) * 0x800 + 0x614280)
+
+#define NV50_PDISPLAY_SOR_CLK                                        0x00614000
+#define NV50_PDISPLAY_SOR_CLK_CTRL2(i)                  ((i) * 0x800 + 0x614300)
+
+#define NV50_PDISPLAY_VGACRTC(r)                                ((r) + 0x619400)
+
+#define NV50_PDISPLAY_DAC                                            0x0061a000
+#define NV50_PDISPLAY_DAC_DPMS_CTRL(i)                (0x0061a004 + (i) * 0x800)
+#define NV50_PDISPLAY_DAC_DPMS_CTRL_HSYNC_OFF                        0x00000001
+#define NV50_PDISPLAY_DAC_DPMS_CTRL_VSYNC_OFF                        0x00000004
+#define NV50_PDISPLAY_DAC_DPMS_CTRL_BLANKED                          0x00000010
+#define NV50_PDISPLAY_DAC_DPMS_CTRL_OFF                              0x00000040
+#define NV50_PDISPLAY_DAC_DPMS_CTRL_PENDING                          0x80000000
+#define NV50_PDISPLAY_DAC_LOAD_CTRL(i)                (0x0061a00c + (i) * 0x800)
+#define NV50_PDISPLAY_DAC_LOAD_CTRL_ACTIVE                           0x00100000
+#define NV50_PDISPLAY_DAC_LOAD_CTRL_PRESENT                          0x38000000
+#define NV50_PDISPLAY_DAC_LOAD_CTRL_DONE                             0x80000000
+#define NV50_PDISPLAY_DAC_CLK_CTRL1(i)                (0x0061a010 + (i) * 0x800)
+#define NV50_PDISPLAY_DAC_CLK_CTRL1_CONNECTED                        0x00000600
+
+#define NV50_PDISPLAY_SOR                                            0x0061c000
+#define NV50_PDISPLAY_SOR_DPMS_CTRL(i)                (0x0061c004 + (i) * 0x800)
+#define NV50_PDISPLAY_SOR_DPMS_CTRL_PENDING                          0x80000000
+#define NV50_PDISPLAY_SOR_DPMS_CTRL_ON                               0x00000001
+#define NV50_PDISPLAY_SOR_CLK_CTRL1(i)                (0x0061c008 + (i) * 0x800)
+#define NV50_PDISPLAY_SOR_CLK_CTRL1_CONNECTED                        0x00000600
+#define NV50_PDISPLAY_SOR_DPMS_STATE(i)               (0x0061c030 + (i) * 0x800)
+#define NV50_PDISPLAY_SOR_DPMS_STATE_ACTIVE                          0x00030000
+#define NV50_PDISPLAY_SOR_DPMS_STATE_BLANKED                         0x00080000
+#define NV50_PDISPLAY_SOR_DPMS_STATE_WAIT                            0x10000000
+#define NV50_PDISPLAY_SOR_BACKLIGHT                                  0x0061c084
+#define NV50_PDISPLAY_SOR_BACKLIGHT_ENABLE                           0x80000000
+#define NV50_PDISPLAY_SOR_BACKLIGHT_LEVEL                            0x00000fff
+#define NV50_SOR_DP_CTRL(i,l)            (0x0061c10c + (i) * 0x800 + (l) * 0x80)
+#define NV50_SOR_DP_CTRL_ENHANCED_FRAME_ENABLED                      0x00004000
+#define NV50_SOR_DP_CTRL_LANE_MASK                                   0x001f0000
+#define NV50_SOR_DP_CTRL_LANE_0_ENABLED                              0x00010000
+#define NV50_SOR_DP_CTRL_LANE_1_ENABLED                              0x00020000
+#define NV50_SOR_DP_CTRL_LANE_2_ENABLED                              0x00040000
+#define NV50_SOR_DP_CTRL_LANE_3_ENABLED                              0x00080000
+#define NV50_SOR_DP_CTRL_TRAINING_PATTERN                            0x0f000000
+#define NV50_SOR_DP_CTRL_TRAINING_PATTERN_DISABLED                   0x00000000
+#define NV50_SOR_DP_CTRL_TRAINING_PATTERN_1                          0x01000000
+#define NV50_SOR_DP_CTRL_TRAINING_PATTERN_2                          0x02000000
+#define NV50_SOR_DP_UNK118(i,l)          (0x0061c118 + (i) * 0x800 + (l) * 0x80)
+#define NV50_SOR_DP_UNK120(i,l)          (0x0061c120 + (i) * 0x800 + (l) * 0x80)
+#define NV50_SOR_DP_UNK130(i,l)          (0x0061c130 + (i) * 0x800 + (l) * 0x80)
+
+#define NV50_PDISPLAY_USER(i)                        ((i) * 0x1000 + 0x00640000)
+#define NV50_PDISPLAY_USER_PUT(i)                    ((i) * 0x1000 + 0x00640000)
+#define NV50_PDISPLAY_USER_GET(i)                    ((i) * 0x1000 + 0x00640004)
+
+#define NV50_PDISPLAY_CURSOR_USER                                    0x00647000
+#define NV50_PDISPLAY_CURSOR_USER_POS_CTRL(i)        ((i) * 0x1000 + 0x00647080)
+#define NV50_PDISPLAY_CURSOR_USER_POS(i)             ((i) * 0x1000 + 0x00647084)
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_fb.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_fb.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright (C) 2008 Maarten Maathuis.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#ifndef __NOUVEAU_FB_H__
+#define __NOUVEAU_FB_H__
+
+struct nouveau_framebuffer {
+	struct drm_framebuffer base;
+	struct nouveau_bo *nvbo;
+};
+
+static inline struct nouveau_framebuffer *
+nouveau_framebuffer(struct drm_framebuffer *fb)
+{
+	return container_of(fb, struct nouveau_framebuffer, base);
+}
+
+extern const struct drm_mode_config_funcs nouveau_mode_config_funcs;
+
+struct drm_framebuffer *
+nouveau_framebuffer_create(struct drm_device *, struct nouveau_bo *,
+			   struct drm_mode_fb_cmd *);
+
+#endif /* __NOUVEAU_FB_H__ */
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv20_graph.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv20_graph.c
@@ -0,0 +1,775 @@
+#include "drmP.h"
+#include "drm.h"
+#include "nouveau_drv.h"
+#include "nouveau_drm.h"
+
+/*
+ * NV20
+ * -----
+ * There are 3 families :
+ * NV20 is 0x10de:0x020*
+ * NV25/28 is 0x10de:0x025* / 0x10de:0x028*
+ * NV2A is 0x10de:0x02A0
+ *
+ * NV30
+ * -----
+ * There are 3 families :
+ * NV30/31 is 0x10de:0x030* / 0x10de:0x031*
+ * NV34 is 0x10de:0x032*
+ * NV35/36 is 0x10de:0x033* / 0x10de:0x034*
+ *
+ * Not seen in the wild, no dumps (probably NV35) :
+ * NV37 is 0x10de:0x00fc, 0x10de:0x00fd
+ * NV38 is 0x10de:0x0333, 0x10de:0x00fe
+ *
+ */
+
+#define NV20_GRCTX_SIZE (3580*4)
+#define NV25_GRCTX_SIZE (3529*4)
+#define NV2A_GRCTX_SIZE (3500*4)
+
+#define NV30_31_GRCTX_SIZE (24392)
+#define NV34_GRCTX_SIZE    (18140)
+#define NV35_36_GRCTX_SIZE (22396)
+
+static void
+nv20_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx)
+{
+	int i;
+
+	nv_wo32(dev, ctx, 0x033c/4, 0xffff0000);
+	nv_wo32(dev, ctx, 0x03a0/4, 0x0fff0000);
+	nv_wo32(dev, ctx, 0x03a4/4, 0x0fff0000);
+	nv_wo32(dev, ctx, 0x047c/4, 0x00000101);
+	nv_wo32(dev, ctx, 0x0490/4, 0x00000111);
+	nv_wo32(dev, ctx, 0x04a8/4, 0x44400000);
+	for (i = 0x04d4; i <= 0x04e0; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x00030303);
+	for (i = 0x04f4; i <= 0x0500; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x00080000);
+	for (i = 0x050c; i <= 0x0518; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x01012000);
+	for (i = 0x051c; i <= 0x0528; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x000105b8);
+	for (i = 0x052c; i <= 0x0538; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x00080008);
+	for (i = 0x055c; i <= 0x0598; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x07ff0000);
+	nv_wo32(dev, ctx, 0x05a4/4, 0x4b7fffff);
+	nv_wo32(dev, ctx, 0x05fc/4, 0x00000001);
+	nv_wo32(dev, ctx, 0x0604/4, 0x00004000);
+	nv_wo32(dev, ctx, 0x0610/4, 0x00000001);
+	nv_wo32(dev, ctx, 0x0618/4, 0x00040000);
+	nv_wo32(dev, ctx, 0x061c/4, 0x00010000);
+	for (i = 0x1c1c; i <= 0x248c; i += 16) {
+		nv_wo32(dev, ctx, (i + 0)/4, 0x10700ff9);
+		nv_wo32(dev, ctx, (i + 4)/4, 0x0436086c);
+		nv_wo32(dev, ctx, (i + 8)/4, 0x000c001b);
+	}
+	nv_wo32(dev, ctx, 0x281c/4, 0x3f800000);
+	nv_wo32(dev, ctx, 0x2830/4, 0x3f800000);
+	nv_wo32(dev, ctx, 0x285c/4, 0x40000000);
+	nv_wo32(dev, ctx, 0x2860/4, 0x3f800000);
+	nv_wo32(dev, ctx, 0x2864/4, 0x3f000000);
+	nv_wo32(dev, ctx, 0x286c/4, 0x40000000);
+	nv_wo32(dev, ctx, 0x2870/4, 0x3f800000);
+	nv_wo32(dev, ctx, 0x2878/4, 0xbf800000);
+	nv_wo32(dev, ctx, 0x2880/4, 0xbf800000);
+	nv_wo32(dev, ctx, 0x34a4/4, 0x000fe000);
+	nv_wo32(dev, ctx, 0x3530/4, 0x000003f8);
+	nv_wo32(dev, ctx, 0x3540/4, 0x002fe000);
+	for (i = 0x355c; i <= 0x3578; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x001c527c);
+}
+
+static void
+nv25_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx)
+{
+	int i;
+
+	nv_wo32(dev, ctx, 0x035c/4, 0xffff0000);
+	nv_wo32(dev, ctx, 0x03c0/4, 0x0fff0000);
+	nv_wo32(dev, ctx, 0x03c4/4, 0x0fff0000);
+	nv_wo32(dev, ctx, 0x049c/4, 0x00000101);
+	nv_wo32(dev, ctx, 0x04b0/4, 0x00000111);
+	nv_wo32(dev, ctx, 0x04c8/4, 0x00000080);
+	nv_wo32(dev, ctx, 0x04cc/4, 0xffff0000);
+	nv_wo32(dev, ctx, 0x04d0/4, 0x00000001);
+	nv_wo32(dev, ctx, 0x04e4/4, 0x44400000);
+	nv_wo32(dev, ctx, 0x04fc/4, 0x4b800000);
+	for (i = 0x0510; i <= 0x051c; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x00030303);
+	for (i = 0x0530; i <= 0x053c; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x00080000);
+	for (i = 0x0548; i <= 0x0554; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x01012000);
+	for (i = 0x0558; i <= 0x0564; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x000105b8);
+	for (i = 0x0568; i <= 0x0574; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x00080008);
+	for (i = 0x0598; i <= 0x05d4; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x07ff0000);
+	nv_wo32(dev, ctx, 0x05e0/4, 0x4b7fffff);
+	nv_wo32(dev, ctx, 0x0620/4, 0x00000080);
+	nv_wo32(dev, ctx, 0x0624/4, 0x30201000);
+	nv_wo32(dev, ctx, 0x0628/4, 0x70605040);
+	nv_wo32(dev, ctx, 0x062c/4, 0xb0a09080);
+	nv_wo32(dev, ctx, 0x0630/4, 0xf0e0d0c0);
+	nv_wo32(dev, ctx, 0x0664/4, 0x00000001);
+	nv_wo32(dev, ctx, 0x066c/4, 0x00004000);
+	nv_wo32(dev, ctx, 0x0678/4, 0x00000001);
+	nv_wo32(dev, ctx, 0x0680/4, 0x00040000);
+	nv_wo32(dev, ctx, 0x0684/4, 0x00010000);
+	for (i = 0x1b04; i <= 0x2374; i += 16) {
+		nv_wo32(dev, ctx, (i + 0)/4, 0x10700ff9);
+		nv_wo32(dev, ctx, (i + 4)/4, 0x0436086c);
+		nv_wo32(dev, ctx, (i + 8)/4, 0x000c001b);
+	}
+	nv_wo32(dev, ctx, 0x2704/4, 0x3f800000);
+	nv_wo32(dev, ctx, 0x2718/4, 0x3f800000);
+	nv_wo32(dev, ctx, 0x2744/4, 0x40000000);
+	nv_wo32(dev, ctx, 0x2748/4, 0x3f800000);
+	nv_wo32(dev, ctx, 0x274c/4, 0x3f000000);
+	nv_wo32(dev, ctx, 0x2754/4, 0x40000000);
+	nv_wo32(dev, ctx, 0x2758/4, 0x3f800000);
+	nv_wo32(dev, ctx, 0x2760/4, 0xbf800000);
+	nv_wo32(dev, ctx, 0x2768/4, 0xbf800000);
+	nv_wo32(dev, ctx, 0x308c/4, 0x000fe000);
+	nv_wo32(dev, ctx, 0x3108/4, 0x000003f8);
+	nv_wo32(dev, ctx, 0x3468/4, 0x002fe000);
+	for (i = 0x3484; i <= 0x34a0; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x001c527c);
+}
+
+static void
+nv2a_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx)
+{
+	int i;
+
+	nv_wo32(dev, ctx, 0x033c/4, 0xffff0000);
+	nv_wo32(dev, ctx, 0x03a0/4, 0x0fff0000);
+	nv_wo32(dev, ctx, 0x03a4/4, 0x0fff0000);
+	nv_wo32(dev, ctx, 0x047c/4, 0x00000101);
+	nv_wo32(dev, ctx, 0x0490/4, 0x00000111);
+	nv_wo32(dev, ctx, 0x04a8/4, 0x44400000);
+	for (i = 0x04d4; i <= 0x04e0; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x00030303);
+	for (i = 0x04f4; i <= 0x0500; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x00080000);
+	for (i = 0x050c; i <= 0x0518; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x01012000);
+	for (i = 0x051c; i <= 0x0528; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x000105b8);
+	for (i = 0x052c; i <= 0x0538; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x00080008);
+	for (i = 0x055c; i <= 0x0598; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x07ff0000);
+	nv_wo32(dev, ctx, 0x05a4/4, 0x4b7fffff);
+	nv_wo32(dev, ctx, 0x05fc/4, 0x00000001);
+	nv_wo32(dev, ctx, 0x0604/4, 0x00004000);
+	nv_wo32(dev, ctx, 0x0610/4, 0x00000001);
+	nv_wo32(dev, ctx, 0x0618/4, 0x00040000);
+	nv_wo32(dev, ctx, 0x061c/4, 0x00010000);
+	for (i = 0x1a9c; i <= 0x22fc; i += 16) { /*XXX: check!! */
+		nv_wo32(dev, ctx, (i + 0)/4, 0x10700ff9);
+		nv_wo32(dev, ctx, (i + 4)/4, 0x0436086c);
+		nv_wo32(dev, ctx, (i + 8)/4, 0x000c001b);
+	}
+	nv_wo32(dev, ctx, 0x269c/4, 0x3f800000);
+	nv_wo32(dev, ctx, 0x26b0/4, 0x3f800000);
+	nv_wo32(dev, ctx, 0x26dc/4, 0x40000000);
+	nv_wo32(dev, ctx, 0x26e0/4, 0x3f800000);
+	nv_wo32(dev, ctx, 0x26e4/4, 0x3f000000);
+	nv_wo32(dev, ctx, 0x26ec/4, 0x40000000);
+	nv_wo32(dev, ctx, 0x26f0/4, 0x3f800000);
+	nv_wo32(dev, ctx, 0x26f8/4, 0xbf800000);
+	nv_wo32(dev, ctx, 0x2700/4, 0xbf800000);
+	nv_wo32(dev, ctx, 0x3024/4, 0x000fe000);
+	nv_wo32(dev, ctx, 0x30a0/4, 0x000003f8);
+	nv_wo32(dev, ctx, 0x33fc/4, 0x002fe000);
+	for (i = 0x341c; i <= 0x3438; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x001c527c);
+}
+
+static void
+nv30_31_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx)
+{
+	int i;
+
+	nv_wo32(dev, ctx, 0x0410/4, 0x00000101);
+	nv_wo32(dev, ctx, 0x0424/4, 0x00000111);
+	nv_wo32(dev, ctx, 0x0428/4, 0x00000060);
+	nv_wo32(dev, ctx, 0x0444/4, 0x00000080);
+	nv_wo32(dev, ctx, 0x0448/4, 0xffff0000);
+	nv_wo32(dev, ctx, 0x044c/4, 0x00000001);
+	nv_wo32(dev, ctx, 0x0460/4, 0x44400000);
+	nv_wo32(dev, ctx, 0x048c/4, 0xffff0000);
+	for (i = 0x04e0; i < 0x04e8; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x0fff0000);
+	nv_wo32(dev, ctx, 0x04ec/4, 0x00011100);
+	for (i = 0x0508; i < 0x0548; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x07ff0000);
+	nv_wo32(dev, ctx, 0x0550/4, 0x4b7fffff);
+	nv_wo32(dev, ctx, 0x058c/4, 0x00000080);
+	nv_wo32(dev, ctx, 0x0590/4, 0x30201000);
+	nv_wo32(dev, ctx, 0x0594/4, 0x70605040);
+	nv_wo32(dev, ctx, 0x0598/4, 0xb8a89888);
+	nv_wo32(dev, ctx, 0x059c/4, 0xf8e8d8c8);
+	nv_wo32(dev, ctx, 0x05b0/4, 0xb0000000);
+	for (i = 0x0600; i < 0x0640; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x00010588);
+	for (i = 0x0640; i < 0x0680; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x00030303);
+	for (i = 0x06c0; i < 0x0700; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x0008aae4);
+	for (i = 0x0700; i < 0x0740; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x01012000);
+	for (i = 0x0740; i < 0x0780; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x00080008);
+	nv_wo32(dev, ctx, 0x085c/4, 0x00040000);
+	nv_wo32(dev, ctx, 0x0860/4, 0x00010000);
+	for (i = 0x0864; i < 0x0874; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x00040004);
+	for (i = 0x1f18; i <= 0x3088 ; i += 16) {
+		nv_wo32(dev, ctx, i/4 + 0, 0x10700ff9);
+		nv_wo32(dev, ctx, i/4 + 1, 0x0436086c);
+		nv_wo32(dev, ctx, i/4 + 2, 0x000c001b);
+	}
+	for (i = 0x30b8; i < 0x30c8; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x0000ffff);
+	nv_wo32(dev, ctx, 0x344c/4, 0x3f800000);
+	nv_wo32(dev, ctx, 0x3808/4, 0x3f800000);
+	nv_wo32(dev, ctx, 0x381c/4, 0x3f800000);
+	nv_wo32(dev, ctx, 0x3848/4, 0x40000000);
+	nv_wo32(dev, ctx, 0x384c/4, 0x3f800000);
+	nv_wo32(dev, ctx, 0x3850/4, 0x3f000000);
+	nv_wo32(dev, ctx, 0x3858/4, 0x40000000);
+	nv_wo32(dev, ctx, 0x385c/4, 0x3f800000);
+	nv_wo32(dev, ctx, 0x3864/4, 0xbf800000);
+	nv_wo32(dev, ctx, 0x386c/4, 0xbf800000);
+}
+
+static void
+nv34_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx)
+{
+	int i;
+
+	nv_wo32(dev, ctx, 0x040c/4, 0x01000101);
+	nv_wo32(dev, ctx, 0x0420/4, 0x00000111);
+	nv_wo32(dev, ctx, 0x0424/4, 0x00000060);
+	nv_wo32(dev, ctx, 0x0440/4, 0x00000080);
+	nv_wo32(dev, ctx, 0x0444/4, 0xffff0000);
+	nv_wo32(dev, ctx, 0x0448/4, 0x00000001);
+	nv_wo32(dev, ctx, 0x045c/4, 0x44400000);
+	nv_wo32(dev, ctx, 0x0480/4, 0xffff0000);
+	for (i = 0x04d4; i < 0x04dc; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x0fff0000);
+	nv_wo32(dev, ctx, 0x04e0/4, 0x00011100);
+	for (i = 0x04fc; i < 0x053c; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x07ff0000);
+	nv_wo32(dev, ctx, 0x0544/4, 0x4b7fffff);
+	nv_wo32(dev, ctx, 0x057c/4, 0x00000080);
+	nv_wo32(dev, ctx, 0x0580/4, 0x30201000);
+	nv_wo32(dev, ctx, 0x0584/4, 0x70605040);
+	nv_wo32(dev, ctx, 0x0588/4, 0xb8a89888);
+	nv_wo32(dev, ctx, 0x058c/4, 0xf8e8d8c8);
+	nv_wo32(dev, ctx, 0x05a0/4, 0xb0000000);
+	for (i = 0x05f0; i < 0x0630; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x00010588);
+	for (i = 0x0630; i < 0x0670; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x00030303);
+	for (i = 0x06b0; i < 0x06f0; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x0008aae4);
+	for (i = 0x06f0; i < 0x0730; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x01012000);
+	for (i = 0x0730; i < 0x0770; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x00080008);
+	nv_wo32(dev, ctx, 0x0850/4, 0x00040000);
+	nv_wo32(dev, ctx, 0x0854/4, 0x00010000);
+	for (i = 0x0858; i < 0x0868; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x00040004);
+	for (i = 0x15ac; i <= 0x271c ; i += 16) {
+		nv_wo32(dev, ctx, i/4 + 0, 0x10700ff9);
+		nv_wo32(dev, ctx, i/4 + 1, 0x0436086c);
+		nv_wo32(dev, ctx, i/4 + 2, 0x000c001b);
+	}
+	for (i = 0x274c; i < 0x275c; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x0000ffff);
+	nv_wo32(dev, ctx, 0x2ae0/4, 0x3f800000);
+	nv_wo32(dev, ctx, 0x2e9c/4, 0x3f800000);
+	nv_wo32(dev, ctx, 0x2eb0/4, 0x3f800000);
+	nv_wo32(dev, ctx, 0x2edc/4, 0x40000000);
+	nv_wo32(dev, ctx, 0x2ee0/4, 0x3f800000);
+	nv_wo32(dev, ctx, 0x2ee4/4, 0x3f000000);
+	nv_wo32(dev, ctx, 0x2eec/4, 0x40000000);
+	nv_wo32(dev, ctx, 0x2ef0/4, 0x3f800000);
+	nv_wo32(dev, ctx, 0x2ef8/4, 0xbf800000);
+	nv_wo32(dev, ctx, 0x2f00/4, 0xbf800000);
+}
+
+static void
+nv35_36_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx)
+{
+	int i;
+
+	nv_wo32(dev, ctx, 0x040c/4, 0x00000101);
+	nv_wo32(dev, ctx, 0x0420/4, 0x00000111);
+	nv_wo32(dev, ctx, 0x0424/4, 0x00000060);
+	nv_wo32(dev, ctx, 0x0440/4, 0x00000080);
+	nv_wo32(dev, ctx, 0x0444/4, 0xffff0000);
+	nv_wo32(dev, ctx, 0x0448/4, 0x00000001);
+	nv_wo32(dev, ctx, 0x045c/4, 0x44400000);
+	nv_wo32(dev, ctx, 0x0488/4, 0xffff0000);
+	for (i = 0x04dc; i < 0x04e4; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x0fff0000);
+	nv_wo32(dev, ctx, 0x04e8/4, 0x00011100);
+	for (i = 0x0504; i < 0x0544; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x07ff0000);
+	nv_wo32(dev, ctx, 0x054c/4, 0x4b7fffff);
+	nv_wo32(dev, ctx, 0x0588/4, 0x00000080);
+	nv_wo32(dev, ctx, 0x058c/4, 0x30201000);
+	nv_wo32(dev, ctx, 0x0590/4, 0x70605040);
+	nv_wo32(dev, ctx, 0x0594/4, 0xb8a89888);
+	nv_wo32(dev, ctx, 0x0598/4, 0xf8e8d8c8);
+	nv_wo32(dev, ctx, 0x05ac/4, 0xb0000000);
+	for (i = 0x0604; i < 0x0644; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x00010588);
+	for (i = 0x0644; i < 0x0684; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x00030303);
+	for (i = 0x06c4; i < 0x0704; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x0008aae4);
+	for (i = 0x0704; i < 0x0744; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x01012000);
+	for (i = 0x0744; i < 0x0784; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x00080008);
+	nv_wo32(dev, ctx, 0x0860/4, 0x00040000);
+	nv_wo32(dev, ctx, 0x0864/4, 0x00010000);
+	for (i = 0x0868; i < 0x0878; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x00040004);
+	for (i = 0x1f1c; i <= 0x308c ; i += 16) {
+		nv_wo32(dev, ctx, i/4 + 0, 0x10700ff9);
+		nv_wo32(dev, ctx, i/4 + 1, 0x0436086c);
+		nv_wo32(dev, ctx, i/4 + 2, 0x000c001b);
+	}
+	for (i = 0x30bc; i < 0x30cc; i += 4)
+		nv_wo32(dev, ctx, i/4, 0x0000ffff);
+	nv_wo32(dev, ctx, 0x3450/4, 0x3f800000);
+	nv_wo32(dev, ctx, 0x380c/4, 0x3f800000);
+	nv_wo32(dev, ctx, 0x3820/4, 0x3f800000);
+	nv_wo32(dev, ctx, 0x384c/4, 0x40000000);
+	nv_wo32(dev, ctx, 0x3850/4, 0x3f800000);
+	nv_wo32(dev, ctx, 0x3854/4, 0x3f000000);
+	nv_wo32(dev, ctx, 0x385c/4, 0x40000000);
+	nv_wo32(dev, ctx, 0x3860/4, 0x3f800000);
+	nv_wo32(dev, ctx, 0x3868/4, 0xbf800000);
+	nv_wo32(dev, ctx, 0x3870/4, 0xbf800000);
+}
+
+int
+nv20_graph_create_context(struct nouveau_channel *chan)
+{
+	struct drm_device *dev = chan->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	void (*ctx_init)(struct drm_device *, struct nouveau_gpuobj *);
+	unsigned int ctx_size;
+	unsigned int idoffs = 0x28/4;
+	int ret;
+
+	switch (dev_priv->chipset) {
+	case 0x20:
+		ctx_size = NV20_GRCTX_SIZE;
+		ctx_init = nv20_graph_context_init;
+		idoffs = 0;
+		break;
+	case 0x25:
+	case 0x28:
+		ctx_size = NV25_GRCTX_SIZE;
+		ctx_init = nv25_graph_context_init;
+		break;
+	case 0x2a:
+		ctx_size = NV2A_GRCTX_SIZE;
+		ctx_init = nv2a_graph_context_init;
+		idoffs = 0;
+		break;
+	case 0x30:
+	case 0x31:
+		ctx_size = NV30_31_GRCTX_SIZE;
+		ctx_init = nv30_31_graph_context_init;
+		break;
+	case 0x34:
+		ctx_size = NV34_GRCTX_SIZE;
+		ctx_init = nv34_graph_context_init;
+		break;
+	case 0x35:
+	case 0x36:
+		ctx_size = NV35_36_GRCTX_SIZE;
+		ctx_init = nv35_36_graph_context_init;
+		break;
+	default:
+		ctx_size = 0;
+		ctx_init = nv35_36_graph_context_init;
+		NV_ERROR(dev, "Please contact the devs if you want your NV%x"
+			      " card to work\n", dev_priv->chipset);
+		return -ENOSYS;
+		break;
+	}
+
+	ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, ctx_size, 16,
+					  NVOBJ_FLAG_ZERO_ALLOC,
+					  &chan->ramin_grctx);
+	if (ret)
+		return ret;
+
+	/* Initialise default context values */
+	dev_priv->engine.instmem.prepare_access(dev, true);
+	ctx_init(dev, chan->ramin_grctx->gpuobj);
+
+	/* nv20: nv_wo32(dev, chan->ramin_grctx->gpuobj, 10, chan->id<<24); */
+	nv_wo32(dev, chan->ramin_grctx->gpuobj, idoffs,
+					(chan->id << 24) | 0x1); /* CTX_USER */
+
+	nv_wo32(dev, dev_priv->ctx_table->gpuobj, chan->id,
+			chan->ramin_grctx->instance >> 4);
+
+	dev_priv->engine.instmem.finish_access(dev);
+	return 0;
+}
+
+void
+nv20_graph_destroy_context(struct nouveau_channel *chan)
+{
+	struct drm_device *dev = chan->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+	if (chan->ramin_grctx)
+		nouveau_gpuobj_ref_del(dev, &chan->ramin_grctx);
+
+	dev_priv->engine.instmem.prepare_access(dev, true);
+	nv_wo32(dev, dev_priv->ctx_table->gpuobj, chan->id, 0);
+	dev_priv->engine.instmem.finish_access(dev);
+}
+
+int
+nv20_graph_load_context(struct nouveau_channel *chan)
+{
+	struct drm_device *dev = chan->dev;
+	uint32_t inst;
+
+	if (!chan->ramin_grctx)
+		return -EINVAL;
+	inst = chan->ramin_grctx->instance >> 4;
+
+	nv_wr32(dev, NV20_PGRAPH_CHANNEL_CTX_POINTER, inst);
+	nv_wr32(dev, NV20_PGRAPH_CHANNEL_CTX_XFER,
+		     NV20_PGRAPH_CHANNEL_CTX_XFER_LOAD);
+	nv_wr32(dev, NV10_PGRAPH_CTX_CONTROL, 0x10010100);
+
+	nouveau_wait_for_idle(dev);
+	return 0;
+}
+
+int
+nv20_graph_unload_context(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
+	struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
+	struct nouveau_channel *chan;
+	uint32_t inst, tmp;
+
+	chan = pgraph->channel(dev);
+	if (!chan)
+		return 0;
+	inst = chan->ramin_grctx->instance >> 4;
+
+	nv_wr32(dev, NV20_PGRAPH_CHANNEL_CTX_POINTER, inst);
+	nv_wr32(dev, NV20_PGRAPH_CHANNEL_CTX_XFER,
+		     NV20_PGRAPH_CHANNEL_CTX_XFER_SAVE);
+
+	nouveau_wait_for_idle(dev);
+
+	nv_wr32(dev, NV10_PGRAPH_CTX_CONTROL, 0x10000000);
+	tmp  = nv_rd32(dev, NV10_PGRAPH_CTX_USER) & 0x00ffffff;
+	tmp |= (pfifo->channels - 1) << 24;
+	nv_wr32(dev, NV10_PGRAPH_CTX_USER, tmp);
+	return 0;
+}
+
+static void
+nv20_graph_rdi(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	int i, writecount = 32;
+	uint32_t rdi_index = 0x2c80000;
+
+	if (dev_priv->chipset == 0x20) {
+		rdi_index = 0x3d0000;
+		writecount = 15;
+	}
+
+	nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, rdi_index);
+	for (i = 0; i < writecount; i++)
+		nv_wr32(dev, NV10_PGRAPH_RDI_DATA, 0);
+
+	nouveau_wait_for_idle(dev);
+}
+
+void
+nv20_graph_set_region_tiling(struct drm_device *dev, int i, uint32_t addr,
+			     uint32_t size, uint32_t pitch)
+{
+	uint32_t limit = max(1u, addr + size) - 1;
+
+	if (pitch)
+		addr |= 1;
+
+	nv_wr32(dev, NV20_PGRAPH_TLIMIT(i), limit);
+	nv_wr32(dev, NV20_PGRAPH_TSIZE(i), pitch);
+	nv_wr32(dev, NV20_PGRAPH_TILE(i), addr);
+
+	nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0030 + 4 * i);
+	nv_wr32(dev, NV10_PGRAPH_RDI_DATA, limit);
+	nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0050 + 4 * i);
+	nv_wr32(dev, NV10_PGRAPH_RDI_DATA, pitch);
+	nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0010 + 4 * i);
+	nv_wr32(dev, NV10_PGRAPH_RDI_DATA, addr);
+}
+
+int
+nv20_graph_init(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv =
+		(struct drm_nouveau_private *)dev->dev_private;
+	uint32_t tmp, vramsz;
+	int ret, i;
+
+	nv_wr32(dev, NV03_PMC_ENABLE,
+		nv_rd32(dev, NV03_PMC_ENABLE) & ~NV_PMC_ENABLE_PGRAPH);
+	nv_wr32(dev, NV03_PMC_ENABLE,
+		nv_rd32(dev, NV03_PMC_ENABLE) |  NV_PMC_ENABLE_PGRAPH);
+
+	if (!dev_priv->ctx_table) {
+		/* Create Context Pointer Table */
+		dev_priv->ctx_table_size = 32 * 4;
+		ret = nouveau_gpuobj_new_ref(dev, NULL, NULL, 0,
+						  dev_priv->ctx_table_size, 16,
+						  NVOBJ_FLAG_ZERO_ALLOC,
+						  &dev_priv->ctx_table);
+		if (ret)
+			return ret;
+	}
+
+	nv_wr32(dev, NV20_PGRAPH_CHANNEL_CTX_TABLE,
+		 dev_priv->ctx_table->instance >> 4);
+
+	nv20_graph_rdi(dev);
+
+	nv_wr32(dev, NV03_PGRAPH_INTR   , 0xFFFFFFFF);
+	nv_wr32(dev, NV03_PGRAPH_INTR_EN, 0xFFFFFFFF);
+
+	nv_wr32(dev, NV04_PGRAPH_DEBUG_0, 0xFFFFFFFF);
+	nv_wr32(dev, NV04_PGRAPH_DEBUG_0, 0x00000000);
+	nv_wr32(dev, NV04_PGRAPH_DEBUG_1, 0x00118700);
+	nv_wr32(dev, NV04_PGRAPH_DEBUG_3, 0xF3CE0475); /* 0x4 = auto ctx switch */
+	nv_wr32(dev, NV10_PGRAPH_DEBUG_4, 0x00000000);
+	nv_wr32(dev, 0x40009C           , 0x00000040);
+
+	if (dev_priv->chipset >= 0x25) {
+		nv_wr32(dev, 0x400890, 0x00080000);
+		nv_wr32(dev, 0x400610, 0x304B1FB6);
+		nv_wr32(dev, 0x400B80, 0x18B82880);
+		nv_wr32(dev, 0x400B84, 0x44000000);
+		nv_wr32(dev, 0x400098, 0x40000080);
+		nv_wr32(dev, 0x400B88, 0x000000ff);
+	} else {
+		nv_wr32(dev, 0x400880, 0x00080000); /* 0x0008c7df */
+		nv_wr32(dev, 0x400094, 0x00000005);
+		nv_wr32(dev, 0x400B80, 0x45CAA208); /* 0x45eae20e */
+		nv_wr32(dev, 0x400B84, 0x24000000);
+		nv_wr32(dev, 0x400098, 0x00000040);
+		nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00E00038);
+		nv_wr32(dev, NV10_PGRAPH_RDI_DATA , 0x00000030);
+		nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00E10038);
+		nv_wr32(dev, NV10_PGRAPH_RDI_DATA , 0x00000030);
+	}
+
+	/* Turn all the tiling regions off. */
+	for (i = 0; i < NV10_PFB_TILE__SIZE; i++)
+		nv20_graph_set_region_tiling(dev, i, 0, 0, 0);
+
+	for (i = 0; i < 8; i++) {
+		nv_wr32(dev, 0x400980 + i * 4, nv_rd32(dev, 0x100300 + i * 4));
+		nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0090 + i * 4);
+		nv_wr32(dev, NV10_PGRAPH_RDI_DATA,
+					nv_rd32(dev, 0x100300 + i * 4));
+	}
+	nv_wr32(dev, 0x4009a0, nv_rd32(dev, 0x100324));
+	nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA000C);
+	nv_wr32(dev, NV10_PGRAPH_RDI_DATA, nv_rd32(dev, 0x100324));
+
+	nv_wr32(dev, NV10_PGRAPH_CTX_CONTROL, 0x10000100);
+	nv_wr32(dev, NV10_PGRAPH_STATE      , 0xFFFFFFFF);
+
+	tmp = nv_rd32(dev, NV10_PGRAPH_SURFACE) & 0x0007ff00;
+	nv_wr32(dev, NV10_PGRAPH_SURFACE, tmp);
+	tmp = nv_rd32(dev, NV10_PGRAPH_SURFACE) | 0x00020100;
+	nv_wr32(dev, NV10_PGRAPH_SURFACE, tmp);
+
+	/* begin RAM config */
+	vramsz = drm_get_resource_len(dev, 0) - 1;
+	nv_wr32(dev, 0x4009A4, nv_rd32(dev, NV04_PFB_CFG0));
+	nv_wr32(dev, 0x4009A8, nv_rd32(dev, NV04_PFB_CFG1));
+	nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0000);
+	nv_wr32(dev, NV10_PGRAPH_RDI_DATA , nv_rd32(dev, NV04_PFB_CFG0));
+	nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0004);
+	nv_wr32(dev, NV10_PGRAPH_RDI_DATA , nv_rd32(dev, NV04_PFB_CFG1));
+	nv_wr32(dev, 0x400820, 0);
+	nv_wr32(dev, 0x400824, 0);
+	nv_wr32(dev, 0x400864, vramsz - 1);
+	nv_wr32(dev, 0x400868, vramsz - 1);
+
+	/* interesting.. the below overwrites some of the tile setup above.. */
+	nv_wr32(dev, 0x400B20, 0x00000000);
+	nv_wr32(dev, 0x400B04, 0xFFFFFFFF);
+
+	nv_wr32(dev, NV03_PGRAPH_ABS_UCLIP_XMIN, 0);
+	nv_wr32(dev, NV03_PGRAPH_ABS_UCLIP_YMIN, 0);
+	nv_wr32(dev, NV03_PGRAPH_ABS_UCLIP_XMAX, 0x7fff);
+	nv_wr32(dev, NV03_PGRAPH_ABS_UCLIP_YMAX, 0x7fff);
+
+	return 0;
+}
+
+void
+nv20_graph_takedown(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+	nouveau_gpuobj_ref_del(dev, &dev_priv->ctx_table);
+}
+
+int
+nv30_graph_init(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	int ret, i;
+
+	nv_wr32(dev, NV03_PMC_ENABLE,
+		nv_rd32(dev, NV03_PMC_ENABLE) & ~NV_PMC_ENABLE_PGRAPH);
+	nv_wr32(dev, NV03_PMC_ENABLE,
+		nv_rd32(dev, NV03_PMC_ENABLE) |  NV_PMC_ENABLE_PGRAPH);
+
+	if (!dev_priv->ctx_table) {
+		/* Create Context Pointer Table */
+		dev_priv->ctx_table_size = 32 * 4;
+		ret = nouveau_gpuobj_new_ref(dev, NULL, NULL, 0,
+						  dev_priv->ctx_table_size, 16,
+						  NVOBJ_FLAG_ZERO_ALLOC,
+						  &dev_priv->ctx_table);
+		if (ret)
+			return ret;
+	}
+
+	nv_wr32(dev, NV20_PGRAPH_CHANNEL_CTX_TABLE,
+			dev_priv->ctx_table->instance >> 4);
+
+	nv_wr32(dev, NV03_PGRAPH_INTR   , 0xFFFFFFFF);
+	nv_wr32(dev, NV03_PGRAPH_INTR_EN, 0xFFFFFFFF);
+
+	nv_wr32(dev, NV04_PGRAPH_DEBUG_0, 0xFFFFFFFF);
+	nv_wr32(dev, NV04_PGRAPH_DEBUG_0, 0x00000000);
+	nv_wr32(dev, NV04_PGRAPH_DEBUG_1, 0x401287c0);
+	nv_wr32(dev, 0x400890, 0x01b463ff);
+	nv_wr32(dev, NV04_PGRAPH_DEBUG_3, 0xf2de0475);
+	nv_wr32(dev, NV10_PGRAPH_DEBUG_4, 0x00008000);
+	nv_wr32(dev, NV04_PGRAPH_LIMIT_VIOL_PIX, 0xf04bdff6);
+	nv_wr32(dev, 0x400B80, 0x1003d888);
+	nv_wr32(dev, 0x400B84, 0x0c000000);
+	nv_wr32(dev, 0x400098, 0x00000000);
+	nv_wr32(dev, 0x40009C, 0x0005ad00);
+	nv_wr32(dev, 0x400B88, 0x62ff00ff); /* suspiciously like PGRAPH_DEBUG_2 */
+	nv_wr32(dev, 0x4000a0, 0x00000000);
+	nv_wr32(dev, 0x4000a4, 0x00000008);
+	nv_wr32(dev, 0x4008a8, 0xb784a400);
+	nv_wr32(dev, 0x400ba0, 0x002f8685);
+	nv_wr32(dev, 0x400ba4, 0x00231f3f);
+	nv_wr32(dev, 0x4008a4, 0x40000020);
+
+	if (dev_priv->chipset == 0x34) {
+		nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0004);
+		nv_wr32(dev, NV10_PGRAPH_RDI_DATA , 0x00200201);
+		nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0008);
+		nv_wr32(dev, NV10_PGRAPH_RDI_DATA , 0x00000008);
+		nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0000);
+		nv_wr32(dev, NV10_PGRAPH_RDI_DATA , 0x00000032);
+		nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00E00004);
+		nv_wr32(dev, NV10_PGRAPH_RDI_DATA , 0x00000002);
+	}
+
+	nv_wr32(dev, 0x4000c0, 0x00000016);
+
+	/* Turn all the tiling regions off. */
+	for (i = 0; i < NV10_PFB_TILE__SIZE; i++)
+		nv20_graph_set_region_tiling(dev, i, 0, 0, 0);
+
+	nv_wr32(dev, NV10_PGRAPH_CTX_CONTROL, 0x10000100);
+	nv_wr32(dev, NV10_PGRAPH_STATE      , 0xFFFFFFFF);
+	nv_wr32(dev, 0x0040075c             , 0x00000001);
+
+	/* begin RAM config */
+	/* vramsz = drm_get_resource_len(dev, 0) - 1; */
+	nv_wr32(dev, 0x4009A4, nv_rd32(dev, NV04_PFB_CFG0));
+	nv_wr32(dev, 0x4009A8, nv_rd32(dev, NV04_PFB_CFG1));
+	if (dev_priv->chipset != 0x34) {
+		nv_wr32(dev, 0x400750, 0x00EA0000);
+		nv_wr32(dev, 0x400754, nv_rd32(dev, NV04_PFB_CFG0));
+		nv_wr32(dev, 0x400750, 0x00EA0004);
+		nv_wr32(dev, 0x400754, nv_rd32(dev, NV04_PFB_CFG1));
+	}
+
+	return 0;
+}
+
+struct nouveau_pgraph_object_class nv20_graph_grclass[] = {
+	{ 0x0030, false, NULL }, /* null */
+	{ 0x0039, false, NULL }, /* m2mf */
+	{ 0x004a, false, NULL }, /* gdirect */
+	{ 0x009f, false, NULL }, /* imageblit (nv12) */
+	{ 0x008a, false, NULL }, /* ifc */
+	{ 0x0089, false, NULL }, /* sifm */
+	{ 0x0062, false, NULL }, /* surf2d */
+	{ 0x0043, false, NULL }, /* rop */
+	{ 0x0012, false, NULL }, /* beta1 */
+	{ 0x0072, false, NULL }, /* beta4 */
+	{ 0x0019, false, NULL }, /* cliprect */
+	{ 0x0044, false, NULL }, /* pattern */
+	{ 0x009e, false, NULL }, /* swzsurf */
+	{ 0x0096, false, NULL }, /* celcius */
+	{ 0x0097, false, NULL }, /* kelvin (nv20) */
+	{ 0x0597, false, NULL }, /* kelvin (nv25) */
+	{}
+};
+
+struct nouveau_pgraph_object_class nv30_graph_grclass[] = {
+	{ 0x0030, false, NULL }, /* null */
+	{ 0x0039, false, NULL }, /* m2mf */
+	{ 0x004a, false, NULL }, /* gdirect */
+	{ 0x009f, false, NULL }, /* imageblit (nv12) */
+	{ 0x008a, false, NULL }, /* ifc */
+	{ 0x038a, false, NULL }, /* ifc (nv30) */
+	{ 0x0089, false, NULL }, /* sifm */
+	{ 0x0389, false, NULL }, /* sifm (nv30) */
+	{ 0x0062, false, NULL }, /* surf2d */
+	{ 0x0362, false, NULL }, /* surf2d (nv30) */
+	{ 0x0043, false, NULL }, /* rop */
+	{ 0x0012, false, NULL }, /* beta1 */
+	{ 0x0072, false, NULL }, /* beta4 */
+	{ 0x0019, false, NULL }, /* cliprect */
+	{ 0x0044, false, NULL }, /* pattern */
+	{ 0x039e, false, NULL }, /* swzsurf */
+	{ 0x0397, false, NULL }, /* rankine (nv30) */
+	{ 0x0497, false, NULL }, /* rankine (nv35) */
+	{ 0x0697, false, NULL }, /* rankine (nv34) */
+	{}
+};
+
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv04_fb.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv04_fb.c
@@ -0,0 +1,21 @@
+#include "drmP.h"
+#include "drm.h"
+#include "nouveau_drv.h"
+#include "nouveau_drm.h"
+
+int
+nv04_fb_init(struct drm_device *dev)
+{
+	/* This is what the DDX did for NV_ARCH_04, but a mmio-trace shows
+	 * nvidia reading PFB_CFG_0, then writing back its original value.
+	 * (which was 0x701114 in this case)
+	 */
+
+	nv_wr32(dev, NV04_PFB_CFG0, 0x1114);
+	return 0;
+}
+
+void
+nv04_fb_takedown(struct drm_device *dev)
+{
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv50_mc.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv50_mc.c
@@ -0,0 +1,40 @@
+/*
+ * Copyright (C) 2007 Ben Skeggs.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include "drmP.h"
+#include "drm.h"
+#include "nouveau_drv.h"
+
+int
+nv50_mc_init(struct drm_device *dev)
+{
+	nv_wr32(dev, NV03_PMC_ENABLE, 0xFFFFFFFF);
+	return 0;
+}
+
+void nv50_mc_takedown(struct drm_device *dev)
+{
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_mem.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_mem.c
@@ -0,0 +1,699 @@
+/*
+ * Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
+ * Copyright 2005 Stephane Marchesin
+ *
+ * The Weather Channel (TM) funded Tungsten Graphics to develop the
+ * initial release of the Radeon 8500 driver under the XFree86 license.
+ * This notice must be preserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Keith Whitwell <keith@tungstengraphics.com>
+ */
+
+
+#include "drmP.h"
+#include "drm.h"
+#include "drm_sarea.h"
+#include "nouveau_drv.h"
+
+static struct mem_block *
+split_block(struct mem_block *p, uint64_t start, uint64_t size,
+	    struct drm_file *file_priv)
+{
+	/* Maybe cut off the start of an existing block */
+	if (start > p->start) {
+		struct mem_block *newblock =
+			kmalloc(sizeof(*newblock), GFP_KERNEL);
+		if (!newblock)
+			goto out;
+		newblock->start = start;
+		newblock->size = p->size - (start - p->start);
+		newblock->file_priv = NULL;
+		newblock->next = p->next;
+		newblock->prev = p;
+		p->next->prev = newblock;
+		p->next = newblock;
+		p->size -= newblock->size;
+		p = newblock;
+	}
+
+	/* Maybe cut off the end of an existing block */
+	if (size < p->size) {
+		struct mem_block *newblock =
+			kmalloc(sizeof(*newblock), GFP_KERNEL);
+		if (!newblock)
+			goto out;
+		newblock->start = start + size;
+		newblock->size = p->size - size;
+		newblock->file_priv = NULL;
+		newblock->next = p->next;
+		newblock->prev = p;
+		p->next->prev = newblock;
+		p->next = newblock;
+		p->size = size;
+	}
+
+out:
+	/* Our block is in the middle */
+	p->file_priv = file_priv;
+	return p;
+}
+
+struct mem_block *
+nouveau_mem_alloc_block(struct mem_block *heap, uint64_t size,
+			int align2, struct drm_file *file_priv, int tail)
+{
+	struct mem_block *p;
+	uint64_t mask = (1 << align2) - 1;
+
+	if (!heap)
+		return NULL;
+
+	if (tail) {
+		list_for_each_prev(p, heap) {
+			uint64_t start = ((p->start + p->size) - size) & ~mask;
+
+			if (p->file_priv == NULL && start >= p->start &&
+			    start + size <= p->start + p->size)
+				return split_block(p, start, size, file_priv);
+		}
+	} else {
+		list_for_each(p, heap) {
+			uint64_t start = (p->start + mask) & ~mask;
+
+			if (p->file_priv == NULL &&
+			    start + size <= p->start + p->size)
+				return split_block(p, start, size, file_priv);
+		}
+	}
+
+	return NULL;
+}
+
+void nouveau_mem_free_block(struct mem_block *p)
+{
+	p->file_priv = NULL;
+
+	/* Assumes a single contiguous range.  Needs a special file_priv in
+	 * 'heap' to stop it being subsumed.
+	 */
+	if (p->next->file_priv == NULL) {
+		struct mem_block *q = p->next;
+		p->size += q->size;
+		p->next = q->next;
+		p->next->prev = p;
+		kfree(q);
+	}
+
+	if (p->prev->file_priv == NULL) {
+		struct mem_block *q = p->prev;
+		q->size += p->size;
+		q->next = p->next;
+		q->next->prev = q;
+		kfree(p);
+	}
+}
+
+/* Initialize.  How to check for an uninitialized heap?
+ */
+int nouveau_mem_init_heap(struct mem_block **heap, uint64_t start,
+			  uint64_t size)
+{
+	struct mem_block *blocks = kmalloc(sizeof(*blocks), GFP_KERNEL);
+
+	if (!blocks)
+		return -ENOMEM;
+
+	*heap = kmalloc(sizeof(**heap), GFP_KERNEL);
+	if (!*heap) {
+		kfree(blocks);
+		return -ENOMEM;
+	}
+
+	blocks->start = start;
+	blocks->size = size;
+	blocks->file_priv = NULL;
+	blocks->next = blocks->prev = *heap;
+
+	memset(*heap, 0, sizeof(**heap));
+	(*heap)->file_priv = (struct drm_file *) -1;
+	(*heap)->next = (*heap)->prev = blocks;
+	return 0;
+}
+
+/*
+ * Free all blocks associated with the releasing file_priv
+ */
+void nouveau_mem_release(struct drm_file *file_priv, struct mem_block *heap)
+{
+	struct mem_block *p;
+
+	if (!heap || !heap->next)
+		return;
+
+	list_for_each(p, heap) {
+		if (p->file_priv == file_priv)
+			p->file_priv = NULL;
+	}
+
+	/* Assumes a single contiguous range.  Needs a special file_priv in
+	 * 'heap' to stop it being subsumed.
+	 */
+	list_for_each(p, heap) {
+		while ((p->file_priv == NULL) &&
+					(p->next->file_priv == NULL) &&
+					(p->next != heap)) {
+			struct mem_block *q = p->next;
+			p->size += q->size;
+			p->next = q->next;
+			p->next->prev = p;
+			kfree(q);
+		}
+	}
+}
+
+/*
+ * NV10-NV40 tiling helpers
+ */
+
+static void
+nv10_mem_set_region_tiling(struct drm_device *dev, int i, uint32_t addr,
+			   uint32_t size, uint32_t pitch)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
+	struct nouveau_fb_engine *pfb = &dev_priv->engine.fb;
+	struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
+	struct nouveau_tile_reg *tile = &dev_priv->tile.reg[i];
+
+	tile->addr = addr;
+	tile->size = size;
+	tile->used = !!pitch;
+	nouveau_fence_unref((void **)&tile->fence);
+
+	if (!pfifo->cache_flush(dev))
+		return;
+
+	pfifo->reassign(dev, false);
+	pfifo->cache_flush(dev);
+	pfifo->cache_pull(dev, false);
+
+	nouveau_wait_for_idle(dev);
+
+	pgraph->set_region_tiling(dev, i, addr, size, pitch);
+	pfb->set_region_tiling(dev, i, addr, size, pitch);
+
+	pfifo->cache_pull(dev, true);
+	pfifo->reassign(dev, true);
+}
+
+struct nouveau_tile_reg *
+nv10_mem_set_tiling(struct drm_device *dev, uint32_t addr, uint32_t size,
+		    uint32_t pitch)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_fb_engine *pfb = &dev_priv->engine.fb;
+	struct nouveau_tile_reg *tile = dev_priv->tile.reg, *found = NULL;
+	int i;
+
+	spin_lock(&dev_priv->tile.lock);
+
+	for (i = 0; i < pfb->num_tiles; i++) {
+		if (tile[i].used)
+			/* Tile region in use. */
+			continue;
+
+		if (tile[i].fence &&
+		    !nouveau_fence_signalled(tile[i].fence, NULL))
+			/* Pending tile region. */
+			continue;
+
+		if (max(tile[i].addr, addr) <
+		    min(tile[i].addr + tile[i].size, addr + size))
+			/* Kill an intersecting tile region. */
+			nv10_mem_set_region_tiling(dev, i, 0, 0, 0);
+
+		if (pitch && !found) {
+			/* Free tile region. */
+			nv10_mem_set_region_tiling(dev, i, addr, size, pitch);
+			found = &tile[i];
+		}
+	}
+
+	spin_unlock(&dev_priv->tile.lock);
+
+	return found;
+}
+
+void
+nv10_mem_expire_tiling(struct drm_device *dev, struct nouveau_tile_reg *tile,
+		       struct nouveau_fence *fence)
+{
+	if (fence) {
+		/* Mark it as pending. */
+		tile->fence = fence;
+		nouveau_fence_ref(fence);
+	}
+
+	tile->used = false;
+}
+
+/*
+ * NV50 VM helpers
+ */
+int
+nv50_mem_vm_bind_linear(struct drm_device *dev, uint64_t virt, uint32_t size,
+			uint32_t flags, uint64_t phys)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_gpuobj *pgt;
+	unsigned block;
+	int i;
+
+	virt = ((virt - dev_priv->vm_vram_base) >> 16) << 1;
+	size = (size >> 16) << 1;
+
+	phys |= ((uint64_t)flags << 32);
+	phys |= 1;
+	if (dev_priv->vram_sys_base) {
+		phys += dev_priv->vram_sys_base;
+		phys |= 0x30;
+	}
+
+	dev_priv->engine.instmem.prepare_access(dev, true);
+	while (size) {
+		unsigned offset_h = upper_32_bits(phys);
+		unsigned offset_l = lower_32_bits(phys);
+		unsigned pte, end;
+
+		for (i = 7; i >= 0; i--) {
+			block = 1 << (i + 1);
+			if (size >= block && !(virt & (block - 1)))
+				break;
+		}
+		offset_l |= (i << 7);
+
+		phys += block << 15;
+		size -= block;
+
+		while (block) {
+			pgt = dev_priv->vm_vram_pt[virt >> 14];
+			pte = virt & 0x3ffe;
+
+			end = pte + block;
+			if (end > 16384)
+				end = 16384;
+			block -= (end - pte);
+			virt  += (end - pte);
+
+			while (pte < end) {
+				nv_wo32(dev, pgt, pte++, offset_l);
+				nv_wo32(dev, pgt, pte++, offset_h);
+			}
+		}
+	}
+	dev_priv->engine.instmem.finish_access(dev);
+
+	nv_wr32(dev, 0x100c80, 0x00050001);
+	if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) {
+		NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n");
+		NV_ERROR(dev, "0x100c80 = 0x%08x\n", nv_rd32(dev, 0x100c80));
+		return -EBUSY;
+	}
+
+	nv_wr32(dev, 0x100c80, 0x00000001);
+	if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) {
+		NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n");
+		NV_ERROR(dev, "0x100c80 = 0x%08x\n", nv_rd32(dev, 0x100c80));
+		return -EBUSY;
+	}
+
+	return 0;
+}
+
+void
+nv50_mem_vm_unbind(struct drm_device *dev, uint64_t virt, uint32_t size)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_gpuobj *pgt;
+	unsigned pages, pte, end;
+
+	virt -= dev_priv->vm_vram_base;
+	pages = (size >> 16) << 1;
+
+	dev_priv->engine.instmem.prepare_access(dev, true);
+	while (pages) {
+		pgt = dev_priv->vm_vram_pt[virt >> 29];
+		pte = (virt & 0x1ffe0000ULL) >> 15;
+
+		end = pte + pages;
+		if (end > 16384)
+			end = 16384;
+		pages -= (end - pte);
+		virt  += (end - pte) << 15;
+
+		while (pte < end)
+			nv_wo32(dev, pgt, pte++, 0);
+	}
+	dev_priv->engine.instmem.finish_access(dev);
+
+	nv_wr32(dev, 0x100c80, 0x00050001);
+	if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) {
+		NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n");
+		NV_ERROR(dev, "0x100c80 = 0x%08x\n", nv_rd32(dev, 0x100c80));
+		return;
+	}
+
+	nv_wr32(dev, 0x100c80, 0x00000001);
+	if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) {
+		NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n");
+		NV_ERROR(dev, "0x100c80 = 0x%08x\n", nv_rd32(dev, 0x100c80));
+	}
+}
+
+/*
+ * Cleanup everything
+ */
+void nouveau_mem_takedown(struct mem_block **heap)
+{
+	struct mem_block *p;
+
+	if (!*heap)
+		return;
+
+	for (p = (*heap)->next; p != *heap;) {
+		struct mem_block *q = p;
+		p = p->next;
+		kfree(q);
+	}
+
+	kfree(*heap);
+	*heap = NULL;
+}
+
+void nouveau_mem_close(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+	nouveau_bo_unpin(dev_priv->vga_ram);
+	nouveau_bo_ref(NULL, &dev_priv->vga_ram);
+
+	ttm_bo_device_release(&dev_priv->ttm.bdev);
+
+	nouveau_ttm_global_release(dev_priv);
+
+	if (drm_core_has_AGP(dev) && dev->agp &&
+	    drm_core_check_feature(dev, DRIVER_MODESET)) {
+		struct drm_agp_mem *entry, *tempe;
+
+		/* Remove AGP resources, but leave dev->agp
+		   intact until drv_cleanup is called. */
+		list_for_each_entry_safe(entry, tempe, &dev->agp->memory, head) {
+			if (entry->bound)
+				drm_unbind_agp(entry->memory);
+			drm_free_agp(entry->memory, entry->pages);
+			kfree(entry);
+		}
+		INIT_LIST_HEAD(&dev->agp->memory);
+
+		if (dev->agp->acquired)
+			drm_agp_release(dev);
+
+		dev->agp->acquired = 0;
+		dev->agp->enabled = 0;
+	}
+
+	if (dev_priv->fb_mtrr) {
+		drm_mtrr_del(dev_priv->fb_mtrr, drm_get_resource_start(dev, 1),
+			     drm_get_resource_len(dev, 1), DRM_MTRR_WC);
+		dev_priv->fb_mtrr = 0;
+	}
+}
+
+/*XXX won't work on BSD because of pci_read_config_dword */
+static uint32_t
+nouveau_mem_fb_amount_igp(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct pci_dev *bridge;
+	uint32_t mem;
+
+	bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 1));
+	if (!bridge) {
+		NV_ERROR(dev, "no bridge device\n");
+		return 0;
+	}
+
+	if (dev_priv->flags&NV_NFORCE) {
+		pci_read_config_dword(bridge, 0x7C, &mem);
+		return (uint64_t)(((mem >> 6) & 31) + 1)*1024*1024;
+	} else
+	if (dev_priv->flags&NV_NFORCE2) {
+		pci_read_config_dword(bridge, 0x84, &mem);
+		return (uint64_t)(((mem >> 4) & 127) + 1)*1024*1024;
+	}
+
+	NV_ERROR(dev, "impossible!\n");
+	return 0;
+}
+
+/* returns the amount of FB ram in bytes */
+uint64_t nouveau_mem_fb_amount(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	uint32_t boot0;
+
+	switch (dev_priv->card_type) {
+	case NV_04:
+		boot0 = nv_rd32(dev, NV03_BOOT_0);
+		if (boot0 & 0x00000100)
+			return (((boot0 >> 12) & 0xf) * 2 + 2) * 1024 * 1024;
+
+		switch (boot0 & NV03_BOOT_0_RAM_AMOUNT) {
+		case NV04_BOOT_0_RAM_AMOUNT_32MB:
+			return 32 * 1024 * 1024;
+		case NV04_BOOT_0_RAM_AMOUNT_16MB:
+			return 16 * 1024 * 1024;
+		case NV04_BOOT_0_RAM_AMOUNT_8MB:
+			return 8 * 1024 * 1024;
+		case NV04_BOOT_0_RAM_AMOUNT_4MB:
+			return 4 * 1024 * 1024;
+		}
+		break;
+	case NV_10:
+	case NV_20:
+	case NV_30:
+	case NV_40:
+	case NV_50:
+	default:
+		if (dev_priv->flags & (NV_NFORCE | NV_NFORCE2)) {
+			return nouveau_mem_fb_amount_igp(dev);
+		} else {
+			uint64_t mem;
+			mem = (nv_rd32(dev, NV04_FIFO_DATA) &
+					NV10_FIFO_DATA_RAM_AMOUNT_MB_MASK) >>
+					NV10_FIFO_DATA_RAM_AMOUNT_MB_SHIFT;
+			return mem * 1024 * 1024;
+		}
+		break;
+	}
+
+	NV_ERROR(dev,
+		"Unable to detect video ram size. Please report your setup to "
+							DRIVER_EMAIL "\n");
+	return 0;
+}
+
+#if __OS_HAS_AGP
+static void nouveau_mem_reset_agp(struct drm_device *dev)
+{
+	uint32_t saved_pci_nv_1, saved_pci_nv_19, pmc_enable;
+
+	saved_pci_nv_1 = nv_rd32(dev, NV04_PBUS_PCI_NV_1);
+	saved_pci_nv_19 = nv_rd32(dev, NV04_PBUS_PCI_NV_19);
+
+	/* clear busmaster bit */
+	nv_wr32(dev, NV04_PBUS_PCI_NV_1, saved_pci_nv_1 & ~0x4);
+	/* clear SBA and AGP bits */
+	nv_wr32(dev, NV04_PBUS_PCI_NV_19, saved_pci_nv_19 & 0xfffff0ff);
+
+	/* power cycle pgraph, if enabled */
+	pmc_enable = nv_rd32(dev, NV03_PMC_ENABLE);
+	if (pmc_enable & NV_PMC_ENABLE_PGRAPH) {
+		nv_wr32(dev, NV03_PMC_ENABLE,
+				pmc_enable & ~NV_PMC_ENABLE_PGRAPH);
+		nv_wr32(dev, NV03_PMC_ENABLE, nv_rd32(dev, NV03_PMC_ENABLE) |
+				NV_PMC_ENABLE_PGRAPH);
+	}
+
+	/* and restore (gives effect of resetting AGP) */
+	nv_wr32(dev, NV04_PBUS_PCI_NV_19, saved_pci_nv_19);
+	nv_wr32(dev, NV04_PBUS_PCI_NV_1, saved_pci_nv_1);
+}
+#endif
+
+int
+nouveau_mem_init_agp(struct drm_device *dev)
+{
+#if __OS_HAS_AGP
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct drm_agp_info info;
+	struct drm_agp_mode mode;
+	int ret;
+
+	if (nouveau_noagp)
+		return 0;
+
+	nouveau_mem_reset_agp(dev);
+
+	if (!dev->agp->acquired) {
+		ret = drm_agp_acquire(dev);
+		if (ret) {
+			NV_ERROR(dev, "Unable to acquire AGP: %d\n", ret);
+			return ret;
+		}
+	}
+
+	ret = drm_agp_info(dev, &info);
+	if (ret) {
+		NV_ERROR(dev, "Unable to get AGP info: %d\n", ret);
+		return ret;
+	}
+
+	/* see agp.h for the AGPSTAT_* modes available */
+	mode.mode = info.mode;
+	ret = drm_agp_enable(dev, mode);
+	if (ret) {
+		NV_ERROR(dev, "Unable to enable AGP: %d\n", ret);
+		return ret;
+	}
+
+	dev_priv->gart_info.type	= NOUVEAU_GART_AGP;
+	dev_priv->gart_info.aper_base	= info.aperture_base;
+	dev_priv->gart_info.aper_size	= info.aperture_size;
+#endif
+	return 0;
+}
+
+int
+nouveau_mem_init(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct ttm_bo_device *bdev = &dev_priv->ttm.bdev;
+	int ret, dma_bits = 32;
+
+	dev_priv->fb_phys = drm_get_resource_start(dev, 1);
+	dev_priv->gart_info.type = NOUVEAU_GART_NONE;
+
+	if (dev_priv->card_type >= NV_50 &&
+	    pci_dma_supported(dev->pdev, DMA_BIT_MASK(40)))
+		dma_bits = 40;
+
+	ret = pci_set_dma_mask(dev->pdev, DMA_BIT_MASK(dma_bits));
+	if (ret) {
+		NV_ERROR(dev, "Error setting DMA mask: %d\n", ret);
+		return ret;
+	}
+
+	ret = nouveau_ttm_global_init(dev_priv);
+	if (ret)
+		return ret;
+
+	ret = ttm_bo_device_init(&dev_priv->ttm.bdev,
+				 dev_priv->ttm.bo_global_ref.ref.object,
+				 &nouveau_bo_driver, DRM_FILE_PAGE_OFFSET,
+				 dma_bits <= 32 ? true : false);
+	if (ret) {
+		NV_ERROR(dev, "Error initialising bo driver: %d\n", ret);
+		return ret;
+	}
+
+	INIT_LIST_HEAD(&dev_priv->ttm.bo_list);
+	spin_lock_init(&dev_priv->ttm.bo_list_lock);
+	spin_lock_init(&dev_priv->tile.lock);
+
+	dev_priv->fb_available_size = nouveau_mem_fb_amount(dev);
+
+	dev_priv->fb_mappable_pages = dev_priv->fb_available_size;
+	if (dev_priv->fb_mappable_pages > drm_get_resource_len(dev, 1))
+		dev_priv->fb_mappable_pages = drm_get_resource_len(dev, 1);
+	dev_priv->fb_mappable_pages >>= PAGE_SHIFT;
+
+	NV_INFO(dev, "%d MiB VRAM\n", (int)(dev_priv->fb_available_size >> 20));
+
+	/* remove reserved space at end of vram from available amount */
+	dev_priv->fb_available_size -= dev_priv->ramin_rsvd_vram;
+	dev_priv->fb_aper_free = dev_priv->fb_available_size;
+
+	/* mappable vram */
+	ret = ttm_bo_init_mm(bdev, TTM_PL_VRAM,
+			     dev_priv->fb_available_size >> PAGE_SHIFT);
+	if (ret) {
+		NV_ERROR(dev, "Failed VRAM mm init: %d\n", ret);
+		return ret;
+	}
+
+	ret = nouveau_bo_new(dev, NULL, 256*1024, 0, TTM_PL_FLAG_VRAM,
+			     0, 0, true, true, &dev_priv->vga_ram);
+	if (ret == 0)
+		ret = nouveau_bo_pin(dev_priv->vga_ram, TTM_PL_FLAG_VRAM);
+	if (ret) {
+		NV_WARN(dev, "failed to reserve VGA memory\n");
+		nouveau_bo_ref(NULL, &dev_priv->vga_ram);
+	}
+
+	/* GART */
+#if !defined(__powerpc__) && !defined(__ia64__)
+	if (drm_device_is_agp(dev) && dev->agp) {
+		ret = nouveau_mem_init_agp(dev);
+		if (ret)
+			NV_ERROR(dev, "Error initialising AGP: %d\n", ret);
+	}
+#endif
+
+	if (dev_priv->gart_info.type == NOUVEAU_GART_NONE) {
+		ret = nouveau_sgdma_init(dev);
+		if (ret) {
+			NV_ERROR(dev, "Error initialising PCI(E): %d\n", ret);
+			return ret;
+		}
+	}
+
+	NV_INFO(dev, "%d MiB GART (aperture)\n",
+		(int)(dev_priv->gart_info.aper_size >> 20));
+	dev_priv->gart_info.aper_free = dev_priv->gart_info.aper_size;
+
+	ret = ttm_bo_init_mm(bdev, TTM_PL_TT,
+			     dev_priv->gart_info.aper_size >> PAGE_SHIFT);
+	if (ret) {
+		NV_ERROR(dev, "Failed TT mm init: %d\n", ret);
+		return ret;
+	}
+
+	dev_priv->fb_mtrr = drm_mtrr_add(drm_get_resource_start(dev, 1),
+					 drm_get_resource_len(dev, 1),
+					 DRM_MTRR_WC);
+
+	return 0;
+}
+
+
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv04_timer.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv04_timer.c
@@ -0,0 +1,51 @@
+#include "drmP.h"
+#include "drm.h"
+#include "nouveau_drv.h"
+#include "nouveau_drm.h"
+
+int
+nv04_timer_init(struct drm_device *dev)
+{
+	nv_wr32(dev, NV04_PTIMER_INTR_EN_0, 0x00000000);
+	nv_wr32(dev, NV04_PTIMER_INTR_0, 0xFFFFFFFF);
+
+	/* Just use the pre-existing values when possible for now; these regs
+	 * are not written in nv (driver writer missed a /4 on the address), and
+	 * writing 8 and 3 to the correct regs breaks the timings on the LVDS
+	 * hardware sequencing microcode.
+	 * A correct solution (involving calculations with the GPU PLL) can
+	 * be done when kernel modesetting lands
+	 */
+	if (!nv_rd32(dev, NV04_PTIMER_NUMERATOR) ||
+				!nv_rd32(dev, NV04_PTIMER_DENOMINATOR)) {
+		nv_wr32(dev, NV04_PTIMER_NUMERATOR, 0x00000008);
+		nv_wr32(dev, NV04_PTIMER_DENOMINATOR, 0x00000003);
+	}
+
+	return 0;
+}
+
+uint64_t
+nv04_timer_read(struct drm_device *dev)
+{
+	uint32_t low;
+	/* From kmmio dumps on nv28 this looks like how the blob does this.
+	 * It reads the high dword twice, before and after.
+	 * The only explanation seems to be that the 64-bit timer counter
+	 * advances between high and low dword reads and may corrupt the
+	 * result. Not confirmed.
+	 */
+	uint32_t high2 = nv_rd32(dev, NV04_PTIMER_TIME_1);
+	uint32_t high1;
+	do {
+		high1 = high2;
+		low = nv_rd32(dev, NV04_PTIMER_TIME_0);
+		high2 = nv_rd32(dev, NV04_PTIMER_TIME_1);
+	} while (high1 != high2);
+	return (((uint64_t)high2) << 32) | (uint64_t)low;
+}
+
+void
+nv04_timer_takedown(struct drm_device *dev)
+{
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv17_tv_modes.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv17_tv_modes.c
@@ -0,0 +1,583 @@
+/*
+ * Copyright (C) 2009 Francisco Jerez.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include "drmP.h"
+#include "drm_crtc_helper.h"
+#include "nouveau_drv.h"
+#include "nouveau_encoder.h"
+#include "nouveau_crtc.h"
+#include "nouveau_hw.h"
+#include "nv17_tv.h"
+
+char *nv17_tv_norm_names[NUM_TV_NORMS] = {
+	[TV_NORM_PAL] = "PAL",
+	[TV_NORM_PAL_M] = "PAL-M",
+	[TV_NORM_PAL_N] = "PAL-N",
+	[TV_NORM_PAL_NC] = "PAL-Nc",
+	[TV_NORM_NTSC_M] = "NTSC-M",
+	[TV_NORM_NTSC_J] = "NTSC-J",
+	[TV_NORM_HD480I] = "hd480i",
+	[TV_NORM_HD480P] = "hd480p",
+	[TV_NORM_HD576I] = "hd576i",
+	[TV_NORM_HD576P] = "hd576p",
+	[TV_NORM_HD720P] = "hd720p",
+	[TV_NORM_HD1080I] = "hd1080i"
+};
+
+/* TV standard specific parameters */
+
+struct nv17_tv_norm_params nv17_tv_norms[NUM_TV_NORMS] = {
+	[TV_NORM_PAL] = { TV_ENC_MODE, {
+			.tv_enc_mode = { 720, 576, 50000, {
+					0x2a, 0x9, 0x8a, 0xcb, 0x0, 0x0, 0xb, 0x18,
+					0x7e, 0x40, 0x8a, 0x35, 0x27, 0x0, 0x34, 0x3,
+					0x3e, 0x3, 0x17, 0x21, 0x1b, 0x1b, 0x24, 0x9c,
+					0x1, 0x0, 0xf, 0xf, 0x60, 0x5, 0xd3, 0x3,
+					0xd3, 0x4, 0xd4, 0x1, 0x2, 0x0, 0xa, 0x5,
+					0x0, 0x1a, 0xff, 0x3, 0x18, 0xf, 0x78, 0x0,
+					0x0, 0xb4, 0x0, 0x15, 0x49, 0x10, 0x0, 0x9b,
+					0xbd, 0x15, 0x5, 0x15, 0x3e, 0x3, 0x0, 0x0
+				} } } },
+
+	[TV_NORM_PAL_M] = { TV_ENC_MODE, {
+			.tv_enc_mode = { 720, 480, 59940, {
+					0x21, 0xe6, 0xef, 0xe3, 0x0, 0x0, 0xb, 0x18,
+					0x7e, 0x44, 0x76, 0x32, 0x25, 0x0, 0x3c, 0x0,
+					0x3c, 0x0, 0x17, 0x21, 0x1b, 0x1b, 0x24, 0x83,
+					0x1, 0x0, 0xf, 0xf, 0x60, 0x5, 0xd3, 0x1,
+					0xc5, 0x4, 0xc5, 0x1, 0x2, 0x0, 0xa, 0x5,
+					0x0, 0x18, 0xff, 0x3, 0x20, 0xf, 0x78, 0x0,
+					0x0, 0xb4, 0x0, 0x15, 0x40, 0x10, 0x0, 0x9c,
+					0xc8, 0x15, 0x5, 0x15, 0x3c, 0x0, 0x0, 0x0
+				} } } },
+
+	[TV_NORM_PAL_N] = { TV_ENC_MODE, {
+			.tv_enc_mode = { 720, 576, 50000, {
+					0x2a, 0x9, 0x8a, 0xcb, 0x0, 0x0, 0xb, 0x18,
+					0x7e, 0x40, 0x8a, 0x32, 0x25, 0x0, 0x3c, 0x0,
+					0x3c, 0x0, 0x17, 0x21, 0x1b, 0x1b, 0x24, 0x9c,
+					0x1, 0x0, 0xf, 0xf, 0x60, 0x5, 0xd3, 0x1,
+					0xc5, 0x4, 0xc5, 0x1, 0x2, 0x0, 0xa, 0x5,
+					0x0, 0x1a, 0xff, 0x3, 0x18, 0xf, 0x78, 0x0,
+					0x0, 0xb4, 0x0, 0x15, 0x49, 0x10, 0x0, 0x9b,
+					0xbd, 0x15, 0x5, 0x15, 0x3c, 0x0, 0x0, 0x0
+				} } } },
+
+	[TV_NORM_PAL_NC] = { TV_ENC_MODE, {
+			.tv_enc_mode = { 720, 576, 50000, {
+					0x21, 0xf6, 0x94, 0x46, 0x0, 0x0, 0xb, 0x18,
+					0x7e, 0x44, 0x8a, 0x35, 0x27, 0x0, 0x34, 0x3,
+					0x3e, 0x3, 0x17, 0x21, 0x1b, 0x1b, 0x24, 0x9c,
+					0x1, 0x0, 0xf, 0xf, 0x60, 0x5, 0xd3, 0x3,
+					0xd3, 0x4, 0xd4, 0x1, 0x2, 0x0, 0xa, 0x5,
+					0x0, 0x1a, 0xff, 0x3, 0x18, 0xf, 0x78, 0x0,
+					0x0, 0xb4, 0x0, 0x15, 0x49, 0x10, 0x0, 0x9b,
+					0xbd, 0x15, 0x5, 0x15, 0x3e, 0x3, 0x0, 0x0
+				} } } },
+
+	[TV_NORM_NTSC_M] = { TV_ENC_MODE, {
+			.tv_enc_mode = { 720, 480, 59940, {
+					0x21, 0xf0, 0x7c, 0x1f, 0x0, 0x0, 0xb, 0x18,
+					0x7e, 0x44, 0x76, 0x48, 0x0, 0x0, 0x3c, 0x0,
+					0x3c, 0x0, 0x17, 0x21, 0x1b, 0x1b, 0x24, 0x83,
+					0x1, 0x0, 0xf, 0xf, 0x60, 0x5, 0xd3, 0x1,
+					0xc5, 0x4, 0xc5, 0x1, 0x2, 0x0, 0xa, 0x5,
+					0x0, 0x16, 0xff, 0x3, 0x20, 0xf, 0x78, 0x0,
+					0x0, 0xb4, 0x0, 0x15, 0x4, 0x10, 0x0, 0x9c,
+					0xc8, 0x15, 0x5, 0x15, 0x3c, 0x0, 0x0, 0x0
+				} } } },
+
+	[TV_NORM_NTSC_J] = { TV_ENC_MODE, {
+			.tv_enc_mode = { 720, 480, 59940, {
+					0x21, 0xf0, 0x7c, 0x1f, 0x0, 0x0, 0xb, 0x18,
+					0x7e, 0x44, 0x76, 0x48, 0x0, 0x0, 0x32, 0x0,
+					0x3c, 0x0, 0x17, 0x21, 0x1b, 0x1b, 0x24, 0x83,
+					0x1, 0x0, 0xf, 0xf, 0x60, 0x5, 0xd3, 0x1,
+					0xcf, 0x4, 0xcf, 0x1, 0x2, 0x0, 0xa, 0x5,
+					0x0, 0x16, 0xff, 0x3, 0x20, 0xf, 0x78, 0x0,
+					0x0, 0xb4, 0x0, 0x15, 0x4, 0x10, 0x0, 0xa4,
+					0xc8, 0x15, 0x5, 0x15, 0x3c, 0x0, 0x0, 0x0
+				} } } },
+
+	[TV_NORM_HD480I] = { TV_ENC_MODE, {
+			.tv_enc_mode = { 720, 480, 59940, {
+					0x21, 0xf0, 0x7c, 0x1f, 0x0, 0x0, 0xb, 0x18,
+					0x7e, 0x44, 0x76, 0x48, 0x0, 0x0, 0x32, 0x0,
+					0x3c, 0x0, 0x17, 0x21, 0x1b, 0x1b, 0x24, 0x83,
+					0x1, 0x0, 0xf, 0xf, 0x60, 0x5, 0xd3, 0x1,
+					0xcf, 0x4, 0xcf, 0x1, 0x2, 0x0, 0xa, 0x5,
+					0x0, 0x16, 0xff, 0x3, 0x20, 0xf, 0x78, 0x0,
+					0x0, 0xb4, 0x0, 0x15, 0x4, 0x10, 0x0, 0xa4,
+					0xc8, 0x15, 0x5, 0x15, 0x3c, 0x0, 0x0, 0x0
+				} } } },
+
+	[TV_NORM_HD576I] = { TV_ENC_MODE, {
+			.tv_enc_mode = { 720, 576, 50000, {
+					0x2a, 0x9, 0x8a, 0xcb, 0x0, 0x0, 0xb, 0x18,
+					0x7e, 0x40, 0x8a, 0x35, 0x27, 0x0, 0x34, 0x3,
+					0x3e, 0x3, 0x17, 0x21, 0x1b, 0x1b, 0x24, 0x9c,
+					0x1, 0x0, 0xf, 0xf, 0x60, 0x5, 0xd3, 0x3,
+					0xd3, 0x4, 0xd4, 0x1, 0x2, 0x0, 0xa, 0x5,
+					0x0, 0x1a, 0xff, 0x3, 0x18, 0xf, 0x78, 0x0,
+					0x0, 0xb4, 0x0, 0x15, 0x49, 0x10, 0x0, 0x9b,
+					0xbd, 0x15, 0x5, 0x15, 0x3e, 0x3, 0x0, 0x0
+				} } } },
+
+
+	[TV_NORM_HD480P] = { CTV_ENC_MODE, {
+			.ctv_enc_mode = {
+				.mode = { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000,
+						   720, 735, 743, 858, 0, 480, 490, 494, 525, 0,
+						   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+				.ctv_regs = { 0x3540000, 0x0, 0x0, 0x314,
+					      0x354003a, 0x40000, 0x6f0344, 0x18100000,
+					      0x10160004, 0x10060005, 0x1006000c, 0x10060020,
+					      0x10060021, 0x140e0022, 0x10060202, 0x1802020a,
+					      0x1810020b, 0x10000fff, 0x10000fff, 0x10000fff,
+					      0x10000fff, 0x10000fff, 0x10000fff, 0x70,
+					      0x3ff0000, 0x57, 0x2e001e, 0x258012c,
+					      0xa0aa04ec, 0x30, 0x80960019, 0x12c0300,
+					      0x2019, 0x600, 0x32060019, 0x0, 0x0, 0x400
+				} } } },
+
+	[TV_NORM_HD576P] = { CTV_ENC_MODE, {
+			.ctv_enc_mode = {
+				.mode = { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000,
+						   720, 730, 738, 864, 0, 576, 581, 585, 625, 0,
+						   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+				.ctv_regs = { 0x3540000, 0x0, 0x0, 0x314,
+					      0x354003a, 0x40000, 0x6f0344, 0x18100000,
+					      0x10060001, 0x10060009, 0x10060026, 0x10060027,
+					      0x140e0028, 0x10060268, 0x1810026d, 0x10000fff,
+					      0x10000fff, 0x10000fff, 0x10000fff, 0x10000fff,
+					      0x10000fff, 0x10000fff, 0x10000fff, 0x69,
+					      0x3ff0000, 0x57, 0x2e001e, 0x258012c,
+					      0xa0aa04ec, 0x30, 0x80960019, 0x12c0300,
+					      0x2019, 0x600, 0x32060019, 0x0, 0x0, 0x400
+				} } } },
+
+	[TV_NORM_HD720P] = { CTV_ENC_MODE, {
+			.ctv_enc_mode = {
+				.mode = { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250,
+						   1280, 1349, 1357, 1650, 0, 720, 725, 730, 750, 0,
+						   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+				.ctv_regs = { 0x1260394, 0x0, 0x0, 0x622,
+					      0x66b0021, 0x6004a, 0x1210626, 0x8170000,
+					      0x70004, 0x70016, 0x70017, 0x40f0018,
+					      0x702e8, 0x81702ed, 0xfff, 0xfff,
+					      0xfff, 0xfff, 0xfff, 0xfff,
+					      0xfff, 0xfff, 0xfff, 0x0,
+					      0x2e40001, 0x58, 0x2e001e, 0x258012c,
+					      0xa0aa04ec, 0x30, 0x810c0039, 0x12c0300,
+					      0xc0002039, 0x600, 0x32060039, 0x0, 0x0, 0x0
+				} } } },
+
+	[TV_NORM_HD1080I] = { CTV_ENC_MODE, {
+			.ctv_enc_mode = {
+				.mode = { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250,
+						   1920, 1961, 2049, 2200, 0, 1080, 1084, 1088, 1125, 0,
+						   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC
+						   | DRM_MODE_FLAG_INTERLACE) },
+				.ctv_regs = { 0xac0420, 0x44c0478, 0x4a4, 0x4fc0868,
+					      0x8940028, 0x60054, 0xe80870, 0xbf70000,
+					      0xbc70004, 0x70005, 0x70012, 0x70013,
+					      0x40f0014, 0x70230, 0xbf70232, 0xbf70233,
+					      0x1c70237, 0x70238, 0x70244, 0x70245,
+					      0x40f0246, 0x70462, 0x1f70464, 0x0,
+					      0x2e40001, 0x58, 0x2e001e, 0x258012c,
+					      0xa0aa04ec, 0x30, 0x815f004c, 0x12c0300,
+					      0xc000204c, 0x600, 0x3206004c, 0x0, 0x0, 0x0
+				} } } }
+};
+
+/*
+ * The following is some guesswork on how the TV encoder flicker
+ * filter/rescaler works:
+ *
+ * It seems to use some sort of resampling filter, it is controlled
+ * through the registers at NV_PTV_HFILTER and NV_PTV_VFILTER, they
+ * control the horizontal and vertical stage respectively, there is
+ * also NV_PTV_HFILTER2 the blob fills identically to NV_PTV_HFILTER,
+ * but they seem to do nothing. A rough guess might be that they could
+ * be used to independently control the filtering of each interlaced
+ * field, but I don't know how they are enabled. The whole filtering
+ * process seems to be disabled with bits 26:27 of PTV_200, but we
+ * aren't doing that.
+ *
+ * The layout of both register sets is the same:
+ *
+ * A: [BASE+0x18]...[BASE+0x0] [BASE+0x58]..[BASE+0x40]
+ * B: [BASE+0x34]...[BASE+0x1c] [BASE+0x74]..[BASE+0x5c]
+ *
+ * Each coefficient is stored in bits [31],[15:9] in two's complement
+ * format. They seem to be some kind of weights used in a low-pass
+ * filter. Both A and B coefficients are applied to the 14 nearest
+ * samples on each side (Listed from nearest to furthermost.  They
+ * roughly cover 2 framebuffer pixels on each side).  They are
+ * probably multiplied with some more hardwired weights before being
+ * used: B-coefficients are applied the same on both sides,
+ * A-coefficients are inverted before being applied to the opposite
+ * side.
+ *
+ * After all the hassle, I got the following formula by empirical
+ * means...
+ */
+
+#define calc_overscan(o) interpolate(0x100, 0xe1, 0xc1, o)
+
+#define id1 (1LL << 8)
+#define id2 (1LL << 16)
+#define id3 (1LL << 24)
+#define id4 (1LL << 32)
+#define id5 (1LL << 48)
+
+static struct filter_params{
+	int64_t k1;
+	int64_t ki;
+	int64_t ki2;
+	int64_t ki3;
+	int64_t kr;
+	int64_t kir;
+	int64_t ki2r;
+	int64_t ki3r;
+	int64_t kf;
+	int64_t kif;
+	int64_t ki2f;
+	int64_t ki3f;
+	int64_t krf;
+	int64_t kirf;
+	int64_t ki2rf;
+	int64_t ki3rf;
+} fparams[2][4] = {
+	/* Horizontal filter parameters */
+	{
+		{64.311690 * id5, -39.516924 * id5, 6.586143 * id5, 0.000002 * id5,
+		 0.051285 * id4, 26.168746 * id4, -4.361449 * id4, -0.000001 * id4,
+		 9.308169 * id3, 78.180965 * id3, -13.030158 * id3, -0.000001 * id3,
+		 -8.801540 * id1, -46.572890 * id1, 7.762145 * id1, -0.000000 * id1},
+		{-44.565569 * id5, -68.081246 * id5, 39.812074 * id5, -4.009316 * id5,
+		 29.832207 * id4, 50.047322 * id4, -25.380017 * id4, 2.546422 * id4,
+		 104.605622 * id3, 141.908641 * id3, -74.322319 * id3, 7.484316 * id3,
+		 -37.081621 * id1, -90.397510 * id1, 42.784229 * id1, -4.289952 * id1},
+		{-56.793244 * id5, 31.153584 * id5, -5.192247 * id5, -0.000003 * id5,
+		 33.541131 * id4, -34.149302 * id4, 5.691537 * id4, 0.000002 * id4,
+		 87.196610 * id3, -88.995169 * id3, 14.832456 * id3, 0.000012 * id3,
+		 17.288138 * id1, 71.864786 * id1, -11.977408 * id1, -0.000009 * id1},
+		{51.787796 * id5, 21.211771 * id5, -18.993730 * id5, 1.853310 * id5,
+		 -41.470726 * id4, -17.775823 * id4, 13.057821 * id4, -1.15823 * id4,
+		 -154.235673 * id3, -44.878641 * id3, 40.656077 * id3, -3.695595 * id3,
+		 112.201065 * id1, 39.992155 * id1, -25.155714 * id1, 2.113984 * id1},
+	},
+
+	/* Vertical filter parameters */
+	{
+		{67.601979 * id5, 0.428319 * id5, -0.071318 * id5, -0.000012 * id5,
+		 -3.402339 * id4, 0.000209 * id4, -0.000092 * id4, 0.000010 * id4,
+		 -9.180996 * id3, 6.111270 * id3, -1.024457 * id3, 0.001043 * id3,
+		 6.060315 * id1, -0.017425 * id1, 0.007830 * id1, -0.000869 * id1},
+		{6.755647 * id5, 5.841348 * id5, 1.469734 * id5, -0.149656 * id5,
+		 8.293120 * id4, -1.192888 * id4, -0.947652 * id4, 0.094507 * id4,
+		 37.526655 * id3, 10.257875 * id3, -10.823275 * id3, 1.081497 * id3,
+		 -2.361928 * id1, -2.059432 * id1, 1.840671 * id1, -0.168100 * id1},
+		{-14.780391 * id5, -16.042148 * id5, 2.673692 * id5, -0.000000 * id5,
+		 39.541978 * id4, 5.680053 * id4, -0.946676 * id4, 0.000000 * id4,
+		 152.994486 * id3, 12.625439 * id3, -2.119579 * id3, 0.002708 * id3,
+		 -38.125089 * id1, -0.855880 * id1, 0.155359 * id1, -0.002245 * id1},
+		{-27.476193 * id5, -1.454976 * id5, 1.286557 * id5, 0.025346 * id5,
+		 20.687300 * id4, 3.014003 * id4, -0.557786 * id4, -0.01311 * id4,
+		 60.008737 * id3, -0.738273 * id3, 5.408217 * id3, -0.796798 * id3,
+		 -17.296835 * id1, 4.438577 * id1, -2.809420 * id1, 0.385491 * id1},
+	}
+};
+
+static void tv_setup_filter(struct drm_encoder *encoder)
+{
+	struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder);
+	struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder);
+	struct drm_display_mode *mode = &encoder->crtc->mode;
+	uint32_t (*filters[])[4][7] = {&tv_enc->state.hfilter,
+				       &tv_enc->state.vfilter};
+	int i, j, k;
+	int32_t overscan = calc_overscan(tv_enc->overscan);
+	int64_t flicker = (tv_enc->flicker - 50) * (id3 / 100);
+	uint64_t rs[] = {mode->hdisplay * id3,
+			 mode->vdisplay * id3};
+
+	do_div(rs[0], overscan * tv_norm->tv_enc_mode.hdisplay);
+	do_div(rs[1], overscan * tv_norm->tv_enc_mode.vdisplay);
+
+	for (k = 0; k < 2; k++) {
+		rs[k] = max((int64_t)rs[k], id2);
+
+		for (j = 0; j < 4; j++) {
+			struct filter_params *p = &fparams[k][j];
+
+			for (i = 0; i < 7; i++) {
+				int64_t c = (p->k1 + p->ki*i + p->ki2*i*i + p->ki3*i*i*i)
+					+ (p->kr + p->kir*i + p->ki2r*i*i + p->ki3r*i*i*i)*rs[k]
+					+ (p->kf + p->kif*i + p->ki2f*i*i + p->ki3f*i*i*i)*flicker
+					+ (p->krf + p->kirf*i + p->ki2rf*i*i + p->ki3rf*i*i*i)*flicker*rs[k];
+
+				(*filters[k])[j][i] = (c + id5/2) >> 39 & (0x1 << 31 | 0x7f << 9);
+			}
+		}
+	}
+}
+
+/* Hardware state saving/restoring */
+
+static void tv_save_filter(struct drm_device *dev, uint32_t base, uint32_t regs[4][7])
+{
+	int i, j;
+	uint32_t offsets[] = { base, base + 0x1c, base + 0x40, base + 0x5c };
+
+	for (i = 0; i < 4; i++) {
+		for (j = 0; j < 7; j++)
+			regs[i][j] = nv_read_ptv(dev, offsets[i]+4*j);
+	}
+}
+
+static void tv_load_filter(struct drm_device *dev, uint32_t base, uint32_t regs[4][7])
+{
+	int i, j;
+	uint32_t offsets[] = { base, base + 0x1c, base + 0x40, base + 0x5c };
+
+	for (i = 0; i < 4; i++) {
+		for (j = 0; j < 7; j++)
+			nv_write_ptv(dev, offsets[i]+4*j, regs[i][j]);
+	}
+}
+
+void nv17_tv_state_save(struct drm_device *dev, struct nv17_tv_state *state)
+{
+	int i;
+
+	for (i = 0; i < 0x40; i++)
+		state->tv_enc[i] = nv_read_tv_enc(dev, i);
+
+	tv_save_filter(dev, NV_PTV_HFILTER, state->hfilter);
+	tv_save_filter(dev, NV_PTV_HFILTER2, state->hfilter2);
+	tv_save_filter(dev, NV_PTV_VFILTER, state->vfilter);
+
+	nv_save_ptv(dev, state, 200);
+	nv_save_ptv(dev, state, 204);
+	nv_save_ptv(dev, state, 208);
+	nv_save_ptv(dev, state, 20c);
+	nv_save_ptv(dev, state, 304);
+	nv_save_ptv(dev, state, 500);
+	nv_save_ptv(dev, state, 504);
+	nv_save_ptv(dev, state, 508);
+	nv_save_ptv(dev, state, 600);
+	nv_save_ptv(dev, state, 604);
+	nv_save_ptv(dev, state, 608);
+	nv_save_ptv(dev, state, 60c);
+	nv_save_ptv(dev, state, 610);
+	nv_save_ptv(dev, state, 614);
+}
+
+void nv17_tv_state_load(struct drm_device *dev, struct nv17_tv_state *state)
+{
+	int i;
+
+	for (i = 0; i < 0x40; i++)
+		nv_write_tv_enc(dev, i, state->tv_enc[i]);
+
+	tv_load_filter(dev, NV_PTV_HFILTER, state->hfilter);
+	tv_load_filter(dev, NV_PTV_HFILTER2, state->hfilter2);
+	tv_load_filter(dev, NV_PTV_VFILTER, state->vfilter);
+
+	nv_load_ptv(dev, state, 200);
+	nv_load_ptv(dev, state, 204);
+	nv_load_ptv(dev, state, 208);
+	nv_load_ptv(dev, state, 20c);
+	nv_load_ptv(dev, state, 304);
+	nv_load_ptv(dev, state, 500);
+	nv_load_ptv(dev, state, 504);
+	nv_load_ptv(dev, state, 508);
+	nv_load_ptv(dev, state, 600);
+	nv_load_ptv(dev, state, 604);
+	nv_load_ptv(dev, state, 608);
+	nv_load_ptv(dev, state, 60c);
+	nv_load_ptv(dev, state, 610);
+	nv_load_ptv(dev, state, 614);
+
+	/* This is required for some settings to kick in. */
+	nv_write_tv_enc(dev, 0x3e, 1);
+	nv_write_tv_enc(dev, 0x3e, 0);
+}
+
+/* Timings similar to the ones the blob sets */
+
+struct drm_display_mode nv17_tv_modes[] = {
+	{ DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 0,
+		   320, 344, 392, 560, 0, 200, 200, 202, 220, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC
+		   | DRM_MODE_FLAG_DBLSCAN | DRM_MODE_FLAG_CLKDIV2) },
+	{ DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 0,
+		   320, 344, 392, 560, 0, 240, 240, 246, 263, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC
+		   | DRM_MODE_FLAG_DBLSCAN | DRM_MODE_FLAG_CLKDIV2) },
+	{ DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 0,
+		   400, 432, 496, 640, 0, 300, 300, 303, 314, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC
+		   | DRM_MODE_FLAG_DBLSCAN | DRM_MODE_FLAG_CLKDIV2) },
+	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 0,
+		   640, 672, 768, 880, 0, 480, 480, 492, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 0,
+		   720, 752, 872, 960, 0, 480, 480, 493, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 0,
+		   720, 776, 856, 960, 0, 576, 576, 588, 597, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 0,
+		   800, 840, 920, 1040, 0, 600, 600, 604, 618, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 0,
+		   1024, 1064, 1200, 1344, 0, 768, 768, 777, 806, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	{}
+};
+
+void nv17_tv_update_properties(struct drm_encoder *encoder)
+{
+	struct drm_device *dev = encoder->dev;
+	struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder);
+	struct nv17_tv_state *regs = &tv_enc->state;
+	struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder);
+	int subconnector = tv_enc->select_subconnector ?
+						tv_enc->select_subconnector :
+						tv_enc->subconnector;
+
+	switch (subconnector) {
+	case DRM_MODE_SUBCONNECTOR_Composite:
+	{
+		regs->ptv_204 = 0x2;
+
+		/* The composite connector may be found on either pin. */
+		if (tv_enc->pin_mask & 0x4)
+			regs->ptv_204 |= 0x010000;
+		else if (tv_enc->pin_mask & 0x2)
+			regs->ptv_204 |= 0x100000;
+		else
+			regs->ptv_204 |= 0x110000;
+
+		regs->tv_enc[0x7] = 0x10;
+		break;
+	}
+	case DRM_MODE_SUBCONNECTOR_SVIDEO:
+		regs->ptv_204 = 0x11012;
+		regs->tv_enc[0x7] = 0x18;
+		break;
+
+	case DRM_MODE_SUBCONNECTOR_Component:
+		regs->ptv_204 = 0x111333;
+		regs->tv_enc[0x7] = 0x14;
+		break;
+
+	case DRM_MODE_SUBCONNECTOR_SCART:
+		regs->ptv_204 = 0x111012;
+		regs->tv_enc[0x7] = 0x18;
+		break;
+	}
+
+	regs->tv_enc[0x20] = interpolate(0, tv_norm->tv_enc_mode.tv_enc[0x20], 255,
+					 tv_enc->saturation);
+	regs->tv_enc[0x22] = interpolate(0, tv_norm->tv_enc_mode.tv_enc[0x22], 255,
+					 tv_enc->saturation);
+	regs->tv_enc[0x25] = tv_enc->hue * 255 / 100;
+
+	nv_load_ptv(dev, regs, 204);
+	nv_load_tv_enc(dev, regs, 7);
+	nv_load_tv_enc(dev, regs, 20);
+	nv_load_tv_enc(dev, regs, 22);
+	nv_load_tv_enc(dev, regs, 25);
+}
+
+void nv17_tv_update_rescaler(struct drm_encoder *encoder)
+{
+	struct drm_device *dev = encoder->dev;
+	struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder);
+	struct nv17_tv_state *regs = &tv_enc->state;
+
+	regs->ptv_208 = 0x40 | (calc_overscan(tv_enc->overscan) << 8);
+
+	tv_setup_filter(encoder);
+
+	nv_load_ptv(dev, regs, 208);
+	tv_load_filter(dev, NV_PTV_HFILTER, regs->hfilter);
+	tv_load_filter(dev, NV_PTV_HFILTER2, regs->hfilter2);
+	tv_load_filter(dev, NV_PTV_VFILTER, regs->vfilter);
+}
+
+void nv17_ctv_update_rescaler(struct drm_encoder *encoder)
+{
+	struct drm_device *dev = encoder->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder);
+	int head = nouveau_crtc(encoder->crtc)->index;
+	struct nv04_crtc_reg *regs = &dev_priv->mode_reg.crtc_reg[head];
+	struct drm_display_mode *crtc_mode = &encoder->crtc->mode;
+	struct drm_display_mode *output_mode = &get_tv_norm(encoder)->ctv_enc_mode.mode;
+	int overscan, hmargin, vmargin, hratio, vratio;
+
+	/* The rescaler doesn't do the right thing for interlaced modes. */
+	if (output_mode->flags & DRM_MODE_FLAG_INTERLACE)
+		overscan = 100;
+	else
+		overscan = tv_enc->overscan;
+
+	hmargin = (output_mode->hdisplay - crtc_mode->hdisplay) / 2;
+	vmargin = (output_mode->vdisplay - crtc_mode->vdisplay) / 2;
+
+	hmargin = interpolate(0, min(hmargin, output_mode->hdisplay/20), hmargin,
+			      overscan);
+	vmargin = interpolate(0, min(vmargin, output_mode->vdisplay/20), vmargin,
+			      overscan);
+
+	hratio = crtc_mode->hdisplay * 0x800 / (output_mode->hdisplay - 2*hmargin);
+	vratio = crtc_mode->vdisplay * 0x800 / (output_mode->vdisplay - 2*vmargin) & ~3;
+
+	regs->fp_horiz_regs[FP_VALID_START] = hmargin;
+	regs->fp_horiz_regs[FP_VALID_END] = output_mode->hdisplay - hmargin - 1;
+	regs->fp_vert_regs[FP_VALID_START] = vmargin;
+	regs->fp_vert_regs[FP_VALID_END] = output_mode->vdisplay - vmargin - 1;
+
+	regs->fp_debug_1 = NV_PRAMDAC_FP_DEBUG_1_YSCALE_TESTMODE_ENABLE |
+		XLATE(vratio, 0, NV_PRAMDAC_FP_DEBUG_1_YSCALE_VALUE) |
+		NV_PRAMDAC_FP_DEBUG_1_XSCALE_TESTMODE_ENABLE |
+		XLATE(hratio, 0, NV_PRAMDAC_FP_DEBUG_1_XSCALE_VALUE);
+
+	NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HVALID_START,
+		      regs->fp_horiz_regs[FP_VALID_START]);
+	NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HVALID_END,
+		      regs->fp_horiz_regs[FP_VALID_END]);
+	NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_VVALID_START,
+		      regs->fp_vert_regs[FP_VALID_START]);
+	NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_VVALID_END,
+		      regs->fp_vert_regs[FP_VALID_END]);
+	NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_DEBUG_1, regs->fp_debug_1);
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv40_fifo.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv40_fifo.c
@@ -0,0 +1,314 @@
+/*
+ * Copyright (C) 2007 Ben Skeggs.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include "drmP.h"
+#include "nouveau_drv.h"
+#include "nouveau_drm.h"
+
+#define NV40_RAMFC(c) (dev_priv->ramfc_offset + ((c) * NV40_RAMFC__SIZE))
+#define NV40_RAMFC__SIZE 128
+
+int
+nv40_fifo_create_context(struct nouveau_channel *chan)
+{
+	struct drm_device *dev = chan->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	uint32_t fc = NV40_RAMFC(chan->id);
+	int ret;
+
+	ret = nouveau_gpuobj_new_fake(dev, NV40_RAMFC(chan->id), ~0,
+				      NV40_RAMFC__SIZE, NVOBJ_FLAG_ZERO_ALLOC |
+				      NVOBJ_FLAG_ZERO_FREE, NULL, &chan->ramfc);
+	if (ret)
+		return ret;
+
+	dev_priv->engine.instmem.prepare_access(dev, true);
+	nv_wi32(dev, fc +  0, chan->pushbuf_base);
+	nv_wi32(dev, fc +  4, chan->pushbuf_base);
+	nv_wi32(dev, fc + 12, chan->pushbuf->instance >> 4);
+	nv_wi32(dev, fc + 24, NV_PFIFO_CACHE1_DMA_FETCH_TRIG_128_BYTES |
+			      NV_PFIFO_CACHE1_DMA_FETCH_SIZE_128_BYTES |
+			      NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_8 |
+#ifdef __BIG_ENDIAN
+			      NV_PFIFO_CACHE1_BIG_ENDIAN |
+#endif
+			      0x30000000 /* no idea.. */);
+	nv_wi32(dev, fc + 56, chan->ramin_grctx->instance >> 4);
+	nv_wi32(dev, fc + 60, 0x0001FFFF);
+	dev_priv->engine.instmem.finish_access(dev);
+
+	/* enable the fifo dma operation */
+	nv_wr32(dev, NV04_PFIFO_MODE,
+		nv_rd32(dev, NV04_PFIFO_MODE) | (1 << chan->id));
+	return 0;
+}
+
+void
+nv40_fifo_destroy_context(struct nouveau_channel *chan)
+{
+	struct drm_device *dev = chan->dev;
+
+	nv_wr32(dev, NV04_PFIFO_MODE,
+		nv_rd32(dev, NV04_PFIFO_MODE) & ~(1 << chan->id));
+
+	if (chan->ramfc)
+		nouveau_gpuobj_ref_del(dev, &chan->ramfc);
+}
+
+static void
+nv40_fifo_do_load_context(struct drm_device *dev, int chid)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	uint32_t fc = NV40_RAMFC(chid), tmp, tmp2;
+
+	dev_priv->engine.instmem.prepare_access(dev, false);
+
+	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_PUT, nv_ri32(dev, fc + 0));
+	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_GET, nv_ri32(dev, fc + 4));
+	nv_wr32(dev, NV10_PFIFO_CACHE1_REF_CNT, nv_ri32(dev, fc + 8));
+	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_INSTANCE, nv_ri32(dev, fc + 12));
+	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_DCOUNT, nv_ri32(dev, fc + 16));
+	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_STATE, nv_ri32(dev, fc + 20));
+
+	/* No idea what 0x2058 is.. */
+	tmp   = nv_ri32(dev, fc + 24);
+	tmp2  = nv_rd32(dev, 0x2058) & 0xFFF;
+	tmp2 |= (tmp & 0x30000000);
+	nv_wr32(dev, 0x2058, tmp2);
+	tmp  &= ~0x30000000;
+	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_FETCH, tmp);
+
+	nv_wr32(dev, NV04_PFIFO_CACHE1_ENGINE, nv_ri32(dev, fc + 28));
+	nv_wr32(dev, NV04_PFIFO_CACHE1_PULL1, nv_ri32(dev, fc + 32));
+	nv_wr32(dev, NV10_PFIFO_CACHE1_ACQUIRE_VALUE, nv_ri32(dev, fc + 36));
+	tmp = nv_ri32(dev, fc + 40);
+	nv_wr32(dev, NV10_PFIFO_CACHE1_ACQUIRE_TIMESTAMP, tmp);
+	nv_wr32(dev, NV10_PFIFO_CACHE1_ACQUIRE_TIMEOUT, nv_ri32(dev, fc + 44));
+	nv_wr32(dev, NV10_PFIFO_CACHE1_SEMAPHORE, nv_ri32(dev, fc + 48));
+	nv_wr32(dev, NV10_PFIFO_CACHE1_DMA_SUBROUTINE, nv_ri32(dev, fc + 52));
+	nv_wr32(dev, NV40_PFIFO_GRCTX_INSTANCE, nv_ri32(dev, fc + 56));
+
+	/* Don't clobber the TIMEOUT_ENABLED flag when restoring from RAMFC */
+	tmp  = nv_rd32(dev, NV04_PFIFO_DMA_TIMESLICE) & ~0x1FFFF;
+	tmp |= nv_ri32(dev, fc + 60) & 0x1FFFF;
+	nv_wr32(dev, NV04_PFIFO_DMA_TIMESLICE, tmp);
+
+	nv_wr32(dev, 0x32e4, nv_ri32(dev, fc + 64));
+	/* NVIDIA does this next line twice... */
+	nv_wr32(dev, 0x32e8, nv_ri32(dev, fc + 68));
+	nv_wr32(dev, 0x2088, nv_ri32(dev, fc + 76));
+	nv_wr32(dev, 0x3300, nv_ri32(dev, fc + 80));
+
+	dev_priv->engine.instmem.finish_access(dev);
+
+	nv_wr32(dev, NV03_PFIFO_CACHE1_GET, 0);
+	nv_wr32(dev, NV03_PFIFO_CACHE1_PUT, 0);
+}
+
+int
+nv40_fifo_load_context(struct nouveau_channel *chan)
+{
+	struct drm_device *dev = chan->dev;
+	uint32_t tmp;
+
+	nv40_fifo_do_load_context(dev, chan->id);
+
+	/* Set channel active, and in DMA mode */
+	nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1,
+		     NV40_PFIFO_CACHE1_PUSH1_DMA | chan->id);
+	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_PUSH, 1);
+
+	/* Reset DMA_CTL_AT_INFO to INVALID */
+	tmp = nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_CTL) & ~(1 << 31);
+	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_CTL, tmp);
+
+	return 0;
+}
+
+int
+nv40_fifo_unload_context(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
+	uint32_t fc, tmp;
+	int chid;
+
+	chid = pfifo->channel_id(dev);
+	if (chid < 0 || chid >= dev_priv->engine.fifo.channels)
+		return 0;
+	fc = NV40_RAMFC(chid);
+
+	dev_priv->engine.instmem.prepare_access(dev, true);
+	nv_wi32(dev, fc + 0, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_PUT));
+	nv_wi32(dev, fc + 4, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_GET));
+	nv_wi32(dev, fc + 8, nv_rd32(dev, NV10_PFIFO_CACHE1_REF_CNT));
+	nv_wi32(dev, fc + 12, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_INSTANCE));
+	nv_wi32(dev, fc + 16, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_DCOUNT));
+	nv_wi32(dev, fc + 20, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_STATE));
+	tmp  = nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_FETCH);
+	tmp |= nv_rd32(dev, 0x2058) & 0x30000000;
+	nv_wi32(dev, fc + 24, tmp);
+	nv_wi32(dev, fc + 28, nv_rd32(dev, NV04_PFIFO_CACHE1_ENGINE));
+	nv_wi32(dev, fc + 32, nv_rd32(dev, NV04_PFIFO_CACHE1_PULL1));
+	nv_wi32(dev, fc + 36, nv_rd32(dev, NV10_PFIFO_CACHE1_ACQUIRE_VALUE));
+	tmp = nv_rd32(dev, NV10_PFIFO_CACHE1_ACQUIRE_TIMESTAMP);
+	nv_wi32(dev, fc + 40, tmp);
+	nv_wi32(dev, fc + 44, nv_rd32(dev, NV10_PFIFO_CACHE1_ACQUIRE_TIMEOUT));
+	nv_wi32(dev, fc + 48, nv_rd32(dev, NV10_PFIFO_CACHE1_SEMAPHORE));
+	/* NVIDIA read 0x3228 first, then write DMA_GET here.. maybe something
+	 * more involved depending on the value of 0x3228?
+	 */
+	nv_wi32(dev, fc + 52, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_GET));
+	nv_wi32(dev, fc + 56, nv_rd32(dev, NV40_PFIFO_GRCTX_INSTANCE));
+	nv_wi32(dev, fc + 60, nv_rd32(dev, NV04_PFIFO_DMA_TIMESLICE) & 0x1ffff);
+	/* No idea what the below is for exactly, ripped from a mmio-trace */
+	nv_wi32(dev, fc + 64, nv_rd32(dev, NV40_PFIFO_UNK32E4));
+	/* NVIDIA do this next line twice.. bug? */
+	nv_wi32(dev, fc + 68, nv_rd32(dev, 0x32e8));
+	nv_wi32(dev, fc + 76, nv_rd32(dev, 0x2088));
+	nv_wi32(dev, fc + 80, nv_rd32(dev, 0x3300));
+#if 0 /* no real idea which is PUT/GET in UNK_48.. */
+	tmp  = nv_rd32(dev, NV04_PFIFO_CACHE1_GET);
+	tmp |= (nv_rd32(dev, NV04_PFIFO_CACHE1_PUT) << 16);
+	nv_wi32(dev, fc + 72, tmp);
+#endif
+	dev_priv->engine.instmem.finish_access(dev);
+
+	nv40_fifo_do_load_context(dev, pfifo->channels - 1);
+	nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1,
+		     NV40_PFIFO_CACHE1_PUSH1_DMA | (pfifo->channels - 1));
+	return 0;
+}
+
+static void
+nv40_fifo_init_reset(struct drm_device *dev)
+{
+	int i;
+
+	nv_wr32(dev, NV03_PMC_ENABLE,
+		nv_rd32(dev, NV03_PMC_ENABLE) & ~NV_PMC_ENABLE_PFIFO);
+	nv_wr32(dev, NV03_PMC_ENABLE,
+		nv_rd32(dev, NV03_PMC_ENABLE) |  NV_PMC_ENABLE_PFIFO);
+
+	nv_wr32(dev, 0x003224, 0x000f0078);
+	nv_wr32(dev, 0x003210, 0x00000000);
+	nv_wr32(dev, 0x003270, 0x00000000);
+	nv_wr32(dev, 0x003240, 0x00000000);
+	nv_wr32(dev, 0x003244, 0x00000000);
+	nv_wr32(dev, 0x003258, 0x00000000);
+	nv_wr32(dev, 0x002504, 0x00000000);
+	for (i = 0; i < 16; i++)
+		nv_wr32(dev, 0x002510 + (i * 4), 0x00000000);
+	nv_wr32(dev, 0x00250c, 0x0000ffff);
+	nv_wr32(dev, 0x002048, 0x00000000);
+	nv_wr32(dev, 0x003228, 0x00000000);
+	nv_wr32(dev, 0x0032e8, 0x00000000);
+	nv_wr32(dev, 0x002410, 0x00000000);
+	nv_wr32(dev, 0x002420, 0x00000000);
+	nv_wr32(dev, 0x002058, 0x00000001);
+	nv_wr32(dev, 0x00221c, 0x00000000);
+	/* something with 0x2084, read/modify/write, no change */
+	nv_wr32(dev, 0x002040, 0x000000ff);
+	nv_wr32(dev, 0x002500, 0x00000000);
+	nv_wr32(dev, 0x003200, 0x00000000);
+
+	nv_wr32(dev, NV04_PFIFO_DMA_TIMESLICE, 0x2101ffff);
+}
+
+static void
+nv40_fifo_init_ramxx(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+	nv_wr32(dev, NV03_PFIFO_RAMHT, (0x03 << 24) /* search 128 */ |
+				       ((dev_priv->ramht_bits - 9) << 16) |
+				       (dev_priv->ramht_offset >> 8));
+	nv_wr32(dev, NV03_PFIFO_RAMRO, dev_priv->ramro_offset>>8);
+
+	switch (dev_priv->chipset) {
+	case 0x47:
+	case 0x49:
+	case 0x4b:
+		nv_wr32(dev, 0x2230, 1);
+		break;
+	default:
+		break;
+	}
+
+	switch (dev_priv->chipset) {
+	case 0x40:
+	case 0x41:
+	case 0x42:
+	case 0x43:
+	case 0x45:
+	case 0x47:
+	case 0x48:
+	case 0x49:
+	case 0x4b:
+		nv_wr32(dev, NV40_PFIFO_RAMFC, 0x30002);
+		break;
+	default:
+		nv_wr32(dev, 0x2230, 0);
+		nv_wr32(dev, NV40_PFIFO_RAMFC,
+			((nouveau_mem_fb_amount(dev) - 512 * 1024 +
+			  dev_priv->ramfc_offset) >> 16) | (3 << 16));
+		break;
+	}
+}
+
+static void
+nv40_fifo_init_intr(struct drm_device *dev)
+{
+	nv_wr32(dev, 0x002100, 0xffffffff);
+	nv_wr32(dev, 0x002140, 0xffffffff);
+}
+
+int
+nv40_fifo_init(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
+	int i;
+
+	nv40_fifo_init_reset(dev);
+	nv40_fifo_init_ramxx(dev);
+
+	nv40_fifo_do_load_context(dev, pfifo->channels - 1);
+	nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, pfifo->channels - 1);
+
+	nv40_fifo_init_intr(dev);
+	pfifo->enable(dev);
+	pfifo->reassign(dev, true);
+
+	for (i = 0; i < dev_priv->engine.fifo.channels; i++) {
+		if (dev_priv->fifos[i]) {
+			uint32_t mode = nv_rd32(dev, NV04_PFIFO_MODE);
+			nv_wr32(dev, NV04_PFIFO_MODE, mode | (1 << i));
+		}
+	}
+
+	return 0;
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_display.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_display.c
@@ -0,0 +1,115 @@
+/*
+ * Copyright (C) 2008 Maarten Maathuis.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include "drmP.h"
+#include "drm_crtc_helper.h"
+#include "nouveau_drv.h"
+#include "nouveau_fb.h"
+#include "nouveau_fbcon.h"
+
+static void
+nouveau_user_framebuffer_destroy(struct drm_framebuffer *drm_fb)
+{
+	struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
+	struct drm_device *dev = drm_fb->dev;
+
+	if (drm_fb->fbdev)
+		nouveau_fbcon_remove(dev, drm_fb);
+
+	if (fb->nvbo) {
+		mutex_lock(&dev->struct_mutex);
+		drm_gem_object_unreference(fb->nvbo->gem);
+		mutex_unlock(&dev->struct_mutex);
+	}
+
+	drm_framebuffer_cleanup(drm_fb);
+	kfree(fb);
+}
+
+static int
+nouveau_user_framebuffer_create_handle(struct drm_framebuffer *drm_fb,
+				       struct drm_file *file_priv,
+				       unsigned int *handle)
+{
+	struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
+
+	return drm_gem_handle_create(file_priv, fb->nvbo->gem, handle);
+}
+
+static const struct drm_framebuffer_funcs nouveau_framebuffer_funcs = {
+	.destroy = nouveau_user_framebuffer_destroy,
+	.create_handle = nouveau_user_framebuffer_create_handle,
+};
+
+struct drm_framebuffer *
+nouveau_framebuffer_create(struct drm_device *dev, struct nouveau_bo *nvbo,
+			   struct drm_mode_fb_cmd *mode_cmd)
+{
+	struct nouveau_framebuffer *fb;
+	int ret;
+
+	fb = kzalloc(sizeof(struct nouveau_framebuffer), GFP_KERNEL);
+	if (!fb)
+		return NULL;
+
+	ret = drm_framebuffer_init(dev, &fb->base, &nouveau_framebuffer_funcs);
+	if (ret) {
+		kfree(fb);
+		return NULL;
+	}
+
+	drm_helper_mode_fill_fb_struct(&fb->base, mode_cmd);
+
+	fb->nvbo = nvbo;
+	return &fb->base;
+}
+
+static struct drm_framebuffer *
+nouveau_user_framebuffer_create(struct drm_device *dev,
+				struct drm_file *file_priv,
+				struct drm_mode_fb_cmd *mode_cmd)
+{
+	struct drm_framebuffer *fb;
+	struct drm_gem_object *gem;
+
+	gem = drm_gem_object_lookup(dev, file_priv, mode_cmd->handle);
+	if (!gem)
+		return NULL;
+
+	fb = nouveau_framebuffer_create(dev, nouveau_gem_object(gem), mode_cmd);
+	if (!fb) {
+		drm_gem_object_unreference(gem);
+		return NULL;
+	}
+
+	return fb;
+}
+
+const struct drm_mode_config_funcs nouveau_mode_config_funcs = {
+	.fb_create = nouveau_user_framebuffer_create,
+	.fb_changed = nouveau_fbcon_probe,
+};
+
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_crtc.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_crtc.h
@@ -0,0 +1,95 @@
+/*
+ * Copyright (C) 2008 Maarten Maathuis.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#ifndef __NOUVEAU_CRTC_H__
+#define __NOUVEAU_CRTC_H__
+
+struct nouveau_crtc {
+	struct drm_crtc base;
+
+	int index;
+
+	struct drm_display_mode *mode;
+
+	uint32_t dpms_saved_fp_control;
+	uint32_t fp_users;
+	int saturation;
+	int sharpness;
+	int last_dpms;
+
+	struct {
+		int cpp;
+		bool blanked;
+		uint32_t offset;
+		uint32_t tile_flags;
+	} fb;
+
+	struct {
+		struct nouveau_bo *nvbo;
+		bool visible;
+		uint32_t offset;
+		void (*set_offset)(struct nouveau_crtc *, uint32_t offset);
+		void (*set_pos)(struct nouveau_crtc *, int x, int y);
+		void (*hide)(struct nouveau_crtc *, bool update);
+		void (*show)(struct nouveau_crtc *, bool update);
+	} cursor;
+
+	struct {
+		struct nouveau_bo *nvbo;
+		uint16_t r[256];
+		uint16_t g[256];
+		uint16_t b[256];
+		int depth;
+	} lut;
+
+	int (*set_dither)(struct nouveau_crtc *crtc, bool on, bool update);
+	int (*set_scale)(struct nouveau_crtc *crtc, int mode, bool update);
+};
+
+static inline struct nouveau_crtc *nouveau_crtc(struct drm_crtc *crtc)
+{
+	return container_of(crtc, struct nouveau_crtc, base);
+}
+
+static inline struct drm_crtc *to_drm_crtc(struct nouveau_crtc *crtc)
+{
+	return &crtc->base;
+}
+
+int nv50_crtc_create(struct drm_device *dev, int index);
+int nv50_cursor_init(struct nouveau_crtc *);
+void nv50_cursor_fini(struct nouveau_crtc *);
+int nv50_crtc_cursor_set(struct drm_crtc *drm_crtc, struct drm_file *file_priv,
+			 uint32_t buffer_handle, uint32_t width,
+			 uint32_t height);
+int nv50_crtc_cursor_move(struct drm_crtc *drm_crtc, int x, int y);
+
+int nv04_cursor_init(struct nouveau_crtc *);
+
+struct nouveau_connector *
+nouveau_crtc_connector_get(struct nouveau_crtc *crtc);
+
+#endif /* __NOUVEAU_CRTC_H__ */
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv50_fbcon.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv50_fbcon.c
@@ -0,0 +1,267 @@
+#include "drmP.h"
+#include "nouveau_drv.h"
+#include "nouveau_dma.h"
+#include "nouveau_fbcon.h"
+
+void
+nv50_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
+{
+	struct nouveau_fbcon_par *par = info->par;
+	struct drm_device *dev = par->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_channel *chan = dev_priv->channel;
+
+	if (info->state != FBINFO_STATE_RUNNING)
+		return;
+
+	if (!(info->flags & FBINFO_HWACCEL_DISABLED) &&
+	     RING_SPACE(chan, rect->rop == ROP_COPY ? 7 : 11)) {
+		nouveau_fbcon_gpu_lockup(info);
+	}
+
+	if (info->flags & FBINFO_HWACCEL_DISABLED) {
+		cfb_fillrect(info, rect);
+		return;
+	}
+
+	if (rect->rop != ROP_COPY) {
+		BEGIN_RING(chan, NvSub2D, 0x02ac, 1);
+		OUT_RING(chan, 1);
+	}
+	BEGIN_RING(chan, NvSub2D, 0x0588, 1);
+	if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
+	    info->fix.visual == FB_VISUAL_DIRECTCOLOR)
+		OUT_RING(chan, ((uint32_t *)info->pseudo_palette)[rect->color]);
+	else
+		OUT_RING(chan, rect->color);
+	BEGIN_RING(chan, NvSub2D, 0x0600, 4);
+	OUT_RING(chan, rect->dx);
+	OUT_RING(chan, rect->dy);
+	OUT_RING(chan, rect->dx + rect->width);
+	OUT_RING(chan, rect->dy + rect->height);
+	if (rect->rop != ROP_COPY) {
+		BEGIN_RING(chan, NvSub2D, 0x02ac, 1);
+		OUT_RING(chan, 3);
+	}
+	FIRE_RING(chan);
+}
+
+void
+nv50_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region)
+{
+	struct nouveau_fbcon_par *par = info->par;
+	struct drm_device *dev = par->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_channel *chan = dev_priv->channel;
+
+	if (info->state != FBINFO_STATE_RUNNING)
+		return;
+
+	if (!(info->flags & FBINFO_HWACCEL_DISABLED) && RING_SPACE(chan, 12)) {
+		nouveau_fbcon_gpu_lockup(info);
+	}
+
+	if (info->flags & FBINFO_HWACCEL_DISABLED) {
+		cfb_copyarea(info, region);
+		return;
+	}
+
+	BEGIN_RING(chan, NvSub2D, 0x0110, 1);
+	OUT_RING(chan, 0);
+	BEGIN_RING(chan, NvSub2D, 0x08b0, 4);
+	OUT_RING(chan, region->dx);
+	OUT_RING(chan, region->dy);
+	OUT_RING(chan, region->width);
+	OUT_RING(chan, region->height);
+	BEGIN_RING(chan, NvSub2D, 0x08d0, 4);
+	OUT_RING(chan, 0);
+	OUT_RING(chan, region->sx);
+	OUT_RING(chan, 0);
+	OUT_RING(chan, region->sy);
+	FIRE_RING(chan);
+}
+
+void
+nv50_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
+{
+	struct nouveau_fbcon_par *par = info->par;
+	struct drm_device *dev = par->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_channel *chan = dev_priv->channel;
+	uint32_t width, dwords, *data = (uint32_t *)image->data;
+	uint32_t mask = ~(~0 >> (32 - info->var.bits_per_pixel));
+	uint32_t *palette = info->pseudo_palette;
+
+	if (info->state != FBINFO_STATE_RUNNING)
+		return;
+
+	if (image->depth != 1) {
+		cfb_imageblit(info, image);
+		return;
+	}
+
+	if (!(info->flags & FBINFO_HWACCEL_DISABLED) && RING_SPACE(chan, 11)) {
+		nouveau_fbcon_gpu_lockup(info);
+	}
+
+	if (info->flags & FBINFO_HWACCEL_DISABLED) {
+		cfb_imageblit(info, image);
+		return;
+	}
+
+	width = ALIGN(image->width, 32);
+	dwords = (width * image->height) >> 5;
+
+	BEGIN_RING(chan, NvSub2D, 0x0814, 2);
+	if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
+	    info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
+		OUT_RING(chan, palette[image->bg_color] | mask);
+		OUT_RING(chan, palette[image->fg_color] | mask);
+	} else {
+		OUT_RING(chan, image->bg_color);
+		OUT_RING(chan, image->fg_color);
+	}
+	BEGIN_RING(chan, NvSub2D, 0x0838, 2);
+	OUT_RING(chan, image->width);
+	OUT_RING(chan, image->height);
+	BEGIN_RING(chan, NvSub2D, 0x0850, 4);
+	OUT_RING(chan, 0);
+	OUT_RING(chan, image->dx);
+	OUT_RING(chan, 0);
+	OUT_RING(chan, image->dy);
+
+	while (dwords) {
+		int push = dwords > 2047 ? 2047 : dwords;
+
+		if (RING_SPACE(chan, push + 1)) {
+			nouveau_fbcon_gpu_lockup(info);
+			cfb_imageblit(info, image);
+			return;
+		}
+
+		dwords -= push;
+
+		BEGIN_RING(chan, NvSub2D, 0x40000860, push);
+		OUT_RINGp(chan, data, push);
+		data += push;
+	}
+
+	FIRE_RING(chan);
+}
+
+int
+nv50_fbcon_accel_init(struct fb_info *info)
+{
+	struct nouveau_fbcon_par *par = info->par;
+	struct drm_device *dev = par->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_channel *chan = dev_priv->channel;
+	struct nouveau_gpuobj *eng2d = NULL;
+	int ret, format;
+
+	switch (info->var.bits_per_pixel) {
+	case 8:
+		format = 0xf3;
+		break;
+	case 15:
+		format = 0xf8;
+		break;
+	case 16:
+		format = 0xe8;
+		break;
+	case 32:
+		switch (info->var.transp.length) {
+		case 0: /* depth 24 */
+		case 8: /* depth 32, just use 24.. */
+			format = 0xe6;
+			break;
+		case 2: /* depth 30 */
+			format = 0xd1;
+			break;
+		default:
+			return -EINVAL;
+		}
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	ret = nouveau_gpuobj_gr_new(dev_priv->channel, 0x502d, &eng2d);
+	if (ret)
+		return ret;
+
+	ret = nouveau_gpuobj_ref_add(dev, dev_priv->channel, Nv2D, eng2d, NULL);
+	if (ret)
+		return ret;
+
+	ret = RING_SPACE(chan, 59);
+	if (ret) {
+		nouveau_fbcon_gpu_lockup(info);
+		return ret;
+	}
+
+	BEGIN_RING(chan, NvSub2D, 0x0000, 1);
+	OUT_RING(chan, Nv2D);
+	BEGIN_RING(chan, NvSub2D, 0x0180, 4);
+	OUT_RING(chan, NvNotify0);
+	OUT_RING(chan, chan->vram_handle);
+	OUT_RING(chan, chan->vram_handle);
+	OUT_RING(chan, chan->vram_handle);
+	BEGIN_RING(chan, NvSub2D, 0x0290, 1);
+	OUT_RING(chan, 0);
+	BEGIN_RING(chan, NvSub2D, 0x0888, 1);
+	OUT_RING(chan, 1);
+	BEGIN_RING(chan, NvSub2D, 0x02ac, 1);
+	OUT_RING(chan, 3);
+	BEGIN_RING(chan, NvSub2D, 0x02a0, 1);
+	OUT_RING(chan, 0x55);
+	BEGIN_RING(chan, NvSub2D, 0x08c0, 4);
+	OUT_RING(chan, 0);
+	OUT_RING(chan, 1);
+	OUT_RING(chan, 0);
+	OUT_RING(chan, 1);
+	BEGIN_RING(chan, NvSub2D, 0x0580, 2);
+	OUT_RING(chan, 4);
+	OUT_RING(chan, format);
+	BEGIN_RING(chan, NvSub2D, 0x02e8, 2);
+	OUT_RING(chan, 2);
+	OUT_RING(chan, 1);
+	BEGIN_RING(chan, NvSub2D, 0x0804, 1);
+	OUT_RING(chan, format);
+	BEGIN_RING(chan, NvSub2D, 0x0800, 1);
+	OUT_RING(chan, 1);
+	BEGIN_RING(chan, NvSub2D, 0x0808, 3);
+	OUT_RING(chan, 0);
+	OUT_RING(chan, 0);
+	OUT_RING(chan, 1);
+	BEGIN_RING(chan, NvSub2D, 0x081c, 1);
+	OUT_RING(chan, 1);
+	BEGIN_RING(chan, NvSub2D, 0x0840, 4);
+	OUT_RING(chan, 0);
+	OUT_RING(chan, 1);
+	OUT_RING(chan, 0);
+	OUT_RING(chan, 1);
+	BEGIN_RING(chan, NvSub2D, 0x0200, 2);
+	OUT_RING(chan, format);
+	OUT_RING(chan, 1);
+	BEGIN_RING(chan, NvSub2D, 0x0214, 5);
+	OUT_RING(chan, info->fix.line_length);
+	OUT_RING(chan, info->var.xres_virtual);
+	OUT_RING(chan, info->var.yres_virtual);
+	OUT_RING(chan, 0);
+	OUT_RING(chan, info->fix.smem_start - dev_priv->fb_phys +
+			 dev_priv->vm_vram_base);
+	BEGIN_RING(chan, NvSub2D, 0x0230, 2);
+	OUT_RING(chan, format);
+	OUT_RING(chan, 1);
+	BEGIN_RING(chan, NvSub2D, 0x0244, 5);
+	OUT_RING(chan, info->fix.line_length);
+	OUT_RING(chan, info->var.xres_virtual);
+	OUT_RING(chan, info->var.yres_virtual);
+	OUT_RING(chan, 0);
+	OUT_RING(chan, info->fix.smem_start - dev_priv->fb_phys +
+			 dev_priv->vm_vram_base);
+
+	return 0;
+}
+
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_dp.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_dp.c
@@ -0,0 +1,575 @@
+/*
+ * Copyright 2009 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+
+#include "drmP.h"
+#include "nouveau_drv.h"
+#include "nouveau_i2c.h"
+#include "nouveau_encoder.h"
+
+static int
+auxch_rd(struct drm_encoder *encoder, int address, uint8_t *buf, int size)
+{
+	struct drm_device *dev = encoder->dev;
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+	struct nouveau_i2c_chan *auxch;
+	int ret;
+
+	auxch = nouveau_i2c_find(dev, nv_encoder->dcb->i2c_index);
+	if (!auxch)
+		return -ENODEV;
+
+	ret = nouveau_dp_auxch(auxch, 9, address, buf, size);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+static int
+auxch_wr(struct drm_encoder *encoder, int address, uint8_t *buf, int size)
+{
+	struct drm_device *dev = encoder->dev;
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+	struct nouveau_i2c_chan *auxch;
+	int ret;
+
+	auxch = nouveau_i2c_find(dev, nv_encoder->dcb->i2c_index);
+	if (!auxch)
+		return -ENODEV;
+
+	ret = nouveau_dp_auxch(auxch, 8, address, buf, size);
+	return ret;
+}
+
+static int
+nouveau_dp_lane_count_set(struct drm_encoder *encoder, uint8_t cmd)
+{
+	struct drm_device *dev = encoder->dev;
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+	uint32_t tmp;
+	int or = nv_encoder->or, link = !(nv_encoder->dcb->sorconf.link & 1);
+
+	tmp  = nv_rd32(dev, NV50_SOR_DP_CTRL(or, link));
+	tmp &= ~(NV50_SOR_DP_CTRL_ENHANCED_FRAME_ENABLED |
+		 NV50_SOR_DP_CTRL_LANE_MASK);
+	tmp |= ((1 << (cmd & DP_LANE_COUNT_MASK)) - 1) << 16;
+	if (cmd & DP_LANE_COUNT_ENHANCED_FRAME_EN)
+		tmp |= NV50_SOR_DP_CTRL_ENHANCED_FRAME_ENABLED;
+	nv_wr32(dev, NV50_SOR_DP_CTRL(or, link), tmp);
+
+	return auxch_wr(encoder, DP_LANE_COUNT_SET, &cmd, 1);
+}
+
+static int
+nouveau_dp_link_bw_set(struct drm_encoder *encoder, uint8_t cmd)
+{
+	struct drm_device *dev = encoder->dev;
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+	uint32_t tmp;
+	int reg = 0x614300 + (nv_encoder->or * 0x800);
+
+	tmp  = nv_rd32(dev, reg);
+	tmp &= 0xfff3ffff;
+	if (cmd == DP_LINK_BW_2_7)
+		tmp |= 0x00040000;
+	nv_wr32(dev, reg, tmp);
+
+	return auxch_wr(encoder, DP_LINK_BW_SET, &cmd, 1);
+}
+
+static int
+nouveau_dp_link_train_set(struct drm_encoder *encoder, int pattern)
+{
+	struct drm_device *dev = encoder->dev;
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+	uint32_t tmp;
+	uint8_t cmd;
+	int or = nv_encoder->or, link = !(nv_encoder->dcb->sorconf.link & 1);
+	int ret;
+
+	tmp  = nv_rd32(dev, NV50_SOR_DP_CTRL(or, link));
+	tmp &= ~NV50_SOR_DP_CTRL_TRAINING_PATTERN;
+	tmp |= (pattern << 24);
+	nv_wr32(dev, NV50_SOR_DP_CTRL(or, link), tmp);
+
+	ret = auxch_rd(encoder, DP_TRAINING_PATTERN_SET, &cmd, 1);
+	if (ret)
+		return ret;
+	cmd &= ~DP_TRAINING_PATTERN_MASK;
+	cmd |= (pattern & DP_TRAINING_PATTERN_MASK);
+	return auxch_wr(encoder, DP_TRAINING_PATTERN_SET, &cmd, 1);
+}
+
+static int
+nouveau_dp_max_voltage_swing(struct drm_encoder *encoder)
+{
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+	struct drm_device *dev = encoder->dev;
+	struct bit_displayport_encoder_table_entry *dpse;
+	struct bit_displayport_encoder_table *dpe;
+	int i, dpe_headerlen, max_vs = 0;
+
+	dpe = nouveau_bios_dp_table(dev, nv_encoder->dcb, &dpe_headerlen);
+	if (!dpe)
+		return false;
+	dpse = (void *)((char *)dpe + dpe_headerlen);
+
+	for (i = 0; i < dpe_headerlen; i++, dpse++) {
+		if (dpse->vs_level > max_vs)
+			max_vs = dpse->vs_level;
+	}
+
+	return max_vs;
+}
+
+static int
+nouveau_dp_max_pre_emphasis(struct drm_encoder *encoder, int vs)
+{
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+	struct drm_device *dev = encoder->dev;
+	struct bit_displayport_encoder_table_entry *dpse;
+	struct bit_displayport_encoder_table *dpe;
+	int i, dpe_headerlen, max_pre = 0;
+
+	dpe = nouveau_bios_dp_table(dev, nv_encoder->dcb, &dpe_headerlen);
+	if (!dpe)
+		return false;
+	dpse = (void *)((char *)dpe + dpe_headerlen);
+
+	for (i = 0; i < dpe_headerlen; i++, dpse++) {
+		if (dpse->vs_level != vs)
+			continue;
+
+		if (dpse->pre_level > max_pre)
+			max_pre = dpse->pre_level;
+	}
+
+	return max_pre;
+}
+
+static bool
+nouveau_dp_link_train_adjust(struct drm_encoder *encoder, uint8_t *config)
+{
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+	struct drm_device *dev = encoder->dev;
+	struct bit_displayport_encoder_table_entry *dpse;
+	struct bit_displayport_encoder_table *dpe;
+	int ret, i, dpe_headerlen, vs = 0, pre = 0;
+	uint8_t request[2];
+
+	dpe = nouveau_bios_dp_table(dev, nv_encoder->dcb, &dpe_headerlen);
+	if (!dpe)
+		return false;
+	dpse = (void *)((char *)dpe + dpe_headerlen);
+
+	ret = auxch_rd(encoder, DP_ADJUST_REQUEST_LANE0_1, request, 2);
+	if (ret)
+		return false;
+
+	NV_DEBUG_KMS(dev, "\t\tadjust 0x%02x 0x%02x\n", request[0], request[1]);
+
+	/* Keep all lanes at the same level.. */
+	for (i = 0; i < nv_encoder->dp.link_nr; i++) {
+		int lane_req = (request[i >> 1] >> ((i & 1) << 2)) & 0xf;
+		int lane_vs = lane_req & 3;
+		int lane_pre = (lane_req >> 2) & 3;
+
+		if (lane_vs > vs)
+			vs = lane_vs;
+		if (lane_pre > pre)
+			pre = lane_pre;
+	}
+
+	if (vs >= nouveau_dp_max_voltage_swing(encoder)) {
+		vs  = nouveau_dp_max_voltage_swing(encoder);
+		vs |= 4;
+	}
+
+	if (pre >= nouveau_dp_max_pre_emphasis(encoder, vs & 3)) {
+		pre  = nouveau_dp_max_pre_emphasis(encoder, vs & 3);
+		pre |= 4;
+	}
+
+	/* Update the configuration for all lanes.. */
+	for (i = 0; i < nv_encoder->dp.link_nr; i++)
+		config[i] = (pre << 3) | vs;
+
+	return true;
+}
+
+static bool
+nouveau_dp_link_train_commit(struct drm_encoder *encoder, uint8_t *config)
+{
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+	struct drm_device *dev = encoder->dev;
+	struct bit_displayport_encoder_table_entry *dpse;
+	struct bit_displayport_encoder_table *dpe;
+	int or = nv_encoder->or, link = !(nv_encoder->dcb->sorconf.link & 1);
+	int dpe_headerlen, ret, i;
+
+	NV_DEBUG_KMS(dev, "\t\tconfig 0x%02x 0x%02x 0x%02x 0x%02x\n",
+		 config[0], config[1], config[2], config[3]);
+
+	dpe = nouveau_bios_dp_table(dev, nv_encoder->dcb, &dpe_headerlen);
+	if (!dpe)
+		return false;
+	dpse = (void *)((char *)dpe + dpe_headerlen);
+
+	for (i = 0; i < dpe->record_nr; i++, dpse++) {
+		if (dpse->vs_level == (config[0] & 3) &&
+		    dpse->pre_level == ((config[0] >> 3) & 3))
+			break;
+	}
+	BUG_ON(i == dpe->record_nr);
+
+	for (i = 0; i < nv_encoder->dp.link_nr; i++) {
+		const int shift[4] = { 16, 8, 0, 24 };
+		uint32_t mask = 0xff << shift[i];
+		uint32_t reg0, reg1, reg2;
+
+		reg0  = nv_rd32(dev, NV50_SOR_DP_UNK118(or, link)) & ~mask;
+		reg0 |= (dpse->reg0 << shift[i]);
+		reg1  = nv_rd32(dev, NV50_SOR_DP_UNK120(or, link)) & ~mask;
+		reg1 |= (dpse->reg1 << shift[i]);
+		reg2  = nv_rd32(dev, NV50_SOR_DP_UNK130(or, link)) & 0xffff00ff;
+		reg2 |= (dpse->reg2 << 8);
+		nv_wr32(dev, NV50_SOR_DP_UNK118(or, link), reg0);
+		nv_wr32(dev, NV50_SOR_DP_UNK120(or, link), reg1);
+		nv_wr32(dev, NV50_SOR_DP_UNK130(or, link), reg2);
+	}
+
+	ret = auxch_wr(encoder, DP_TRAINING_LANE0_SET, config, 4);
+	if (ret)
+		return false;
+
+	return true;
+}
+
+bool
+nouveau_dp_link_train(struct drm_encoder *encoder)
+{
+	struct drm_device *dev = encoder->dev;
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+	uint8_t config[4];
+	uint8_t status[3];
+	bool cr_done, cr_max_vs, eq_done;
+	int ret = 0, i, tries, voltage;
+
+	NV_DEBUG_KMS(dev, "link training!!\n");
+train:
+	cr_done = eq_done = false;
+
+	/* set link configuration */
+	NV_DEBUG_KMS(dev, "\tbegin train: bw %d, lanes %d\n",
+		 nv_encoder->dp.link_bw, nv_encoder->dp.link_nr);
+
+	ret = nouveau_dp_link_bw_set(encoder, nv_encoder->dp.link_bw);
+	if (ret)
+		return false;
+
+	config[0] = nv_encoder->dp.link_nr;
+	if (nv_encoder->dp.dpcd_version >= 0x11)
+		config[0] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
+
+	ret = nouveau_dp_lane_count_set(encoder, config[0]);
+	if (ret)
+		return false;
+
+	/* clock recovery */
+	NV_DEBUG_KMS(dev, "\tbegin cr\n");
+	ret = nouveau_dp_link_train_set(encoder, DP_TRAINING_PATTERN_1);
+	if (ret)
+		goto stop;
+
+	tries = 0;
+	voltage = -1;
+	memset(config, 0x00, sizeof(config));
+	for (;;) {
+		if (!nouveau_dp_link_train_commit(encoder, config))
+			break;
+
+		udelay(100);
+
+		ret = auxch_rd(encoder, DP_LANE0_1_STATUS, status, 2);
+		if (ret)
+			break;
+		NV_DEBUG_KMS(dev, "\t\tstatus: 0x%02x 0x%02x\n",
+			 status[0], status[1]);
+
+		cr_done = true;
+		cr_max_vs = false;
+		for (i = 0; i < nv_encoder->dp.link_nr; i++) {
+			int lane = (status[i >> 1] >> ((i & 1) * 4)) & 0xf;
+
+			if (!(lane & DP_LANE_CR_DONE)) {
+				cr_done = false;
+				if (config[i] & DP_TRAIN_MAX_PRE_EMPHASIS_REACHED)
+					cr_max_vs = true;
+				break;
+			}
+		}
+
+		if ((config[0] & DP_TRAIN_VOLTAGE_SWING_MASK) != voltage) {
+			voltage = config[0] & DP_TRAIN_VOLTAGE_SWING_MASK;
+			tries = 0;
+		}
+
+		if (cr_done || cr_max_vs || (++tries == 5))
+			break;
+
+		if (!nouveau_dp_link_train_adjust(encoder, config))
+			break;
+	}
+
+	if (!cr_done)
+		goto stop;
+
+	/* channel equalisation */
+	NV_DEBUG_KMS(dev, "\tbegin eq\n");
+	ret = nouveau_dp_link_train_set(encoder, DP_TRAINING_PATTERN_2);
+	if (ret)
+		goto stop;
+
+	for (tries = 0; tries <= 5; tries++) {
+		udelay(400);
+
+		ret = auxch_rd(encoder, DP_LANE0_1_STATUS, status, 3);
+		if (ret)
+			break;
+		NV_DEBUG_KMS(dev, "\t\tstatus: 0x%02x 0x%02x\n",
+			 status[0], status[1]);
+
+		eq_done = true;
+		if (!(status[2] & DP_INTERLANE_ALIGN_DONE))
+			eq_done = false;
+
+		for (i = 0; eq_done && i < nv_encoder->dp.link_nr; i++) {
+			int lane = (status[i >> 1] >> ((i & 1) * 4)) & 0xf;
+
+			if (!(lane & DP_LANE_CR_DONE)) {
+				cr_done = false;
+				break;
+			}
+
+			if (!(lane & DP_LANE_CHANNEL_EQ_DONE) ||
+			    !(lane & DP_LANE_SYMBOL_LOCKED)) {
+				eq_done = false;
+				break;
+			}
+		}
+
+		if (eq_done || !cr_done)
+			break;
+
+		if (!nouveau_dp_link_train_adjust(encoder, config) ||
+		    !nouveau_dp_link_train_commit(encoder, config))
+			break;
+	}
+
+stop:
+	/* end link training */
+	ret = nouveau_dp_link_train_set(encoder, DP_TRAINING_PATTERN_DISABLE);
+	if (ret)
+		return false;
+
+	/* retry at a lower setting, if possible */
+	if (!ret && !(eq_done && cr_done)) {
+		NV_DEBUG_KMS(dev, "\twe failed\n");
+		if (nv_encoder->dp.link_bw != DP_LINK_BW_1_62) {
+			NV_DEBUG_KMS(dev, "retry link training at low rate\n");
+			nv_encoder->dp.link_bw = DP_LINK_BW_1_62;
+			goto train;
+		}
+	}
+
+	return eq_done;
+}
+
+bool
+nouveau_dp_detect(struct drm_encoder *encoder)
+{
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+	struct drm_device *dev = encoder->dev;
+	uint8_t dpcd[4];
+	int ret;
+
+	ret = auxch_rd(encoder, 0x0000, dpcd, 4);
+	if (ret)
+		return false;
+
+	NV_DEBUG_KMS(dev, "encoder: link_bw %d, link_nr %d\n"
+		      "display: link_bw %d, link_nr %d version 0x%02x\n",
+		 nv_encoder->dcb->dpconf.link_bw,
+		 nv_encoder->dcb->dpconf.link_nr,
+		 dpcd[1], dpcd[2] & 0x0f, dpcd[0]);
+
+	nv_encoder->dp.dpcd_version = dpcd[0];
+
+	nv_encoder->dp.link_bw = dpcd[1];
+	if (nv_encoder->dp.link_bw != DP_LINK_BW_1_62 &&
+	    !nv_encoder->dcb->dpconf.link_bw)
+		nv_encoder->dp.link_bw = DP_LINK_BW_1_62;
+
+	nv_encoder->dp.link_nr = dpcd[2] & 0xf;
+	if (nv_encoder->dp.link_nr > nv_encoder->dcb->dpconf.link_nr)
+		nv_encoder->dp.link_nr = nv_encoder->dcb->dpconf.link_nr;
+
+	return true;
+}
+
+int
+nouveau_dp_auxch(struct nouveau_i2c_chan *auxch, int cmd, int addr,
+		 uint8_t *data, int data_nr)
+{
+	struct drm_device *dev = auxch->dev;
+	uint32_t tmp, ctrl, stat = 0, data32[4] = {};
+	int ret = 0, i, index = auxch->rd;
+
+	NV_DEBUG_KMS(dev, "ch %d cmd %d addr 0x%x len %d\n", index, cmd, addr, data_nr);
+
+	tmp = nv_rd32(dev, NV50_AUXCH_CTRL(auxch->rd));
+	nv_wr32(dev, NV50_AUXCH_CTRL(auxch->rd), tmp | 0x00100000);
+	tmp = nv_rd32(dev, NV50_AUXCH_CTRL(auxch->rd));
+	if (!(tmp & 0x01000000)) {
+		NV_ERROR(dev, "expected bit 24 == 1, got 0x%08x\n", tmp);
+		ret = -EIO;
+		goto out;
+	}
+
+	for (i = 0; i < 3; i++) {
+		tmp = nv_rd32(dev, NV50_AUXCH_STAT(auxch->rd));
+		if (tmp & NV50_AUXCH_STAT_STATE_READY)
+			break;
+		udelay(100);
+	}
+
+	if (i == 3) {
+		ret = -EBUSY;
+		goto out;
+	}
+
+	if (!(cmd & 1)) {
+		memcpy(data32, data, data_nr);
+		for (i = 0; i < 4; i++) {
+			NV_DEBUG_KMS(dev, "wr %d: 0x%08x\n", i, data32[i]);
+			nv_wr32(dev, NV50_AUXCH_DATA_OUT(index, i), data32[i]);
+		}
+	}
+
+	nv_wr32(dev, NV50_AUXCH_ADDR(index), addr);
+	ctrl  = nv_rd32(dev, NV50_AUXCH_CTRL(index));
+	ctrl &= ~(NV50_AUXCH_CTRL_CMD | NV50_AUXCH_CTRL_LEN);
+	ctrl |= (cmd << NV50_AUXCH_CTRL_CMD_SHIFT);
+	ctrl |= ((data_nr - 1) << NV50_AUXCH_CTRL_LEN_SHIFT);
+
+	for (;;) {
+		nv_wr32(dev, NV50_AUXCH_CTRL(index), ctrl | 0x80000000);
+		nv_wr32(dev, NV50_AUXCH_CTRL(index), ctrl);
+		nv_wr32(dev, NV50_AUXCH_CTRL(index), ctrl | 0x00010000);
+		if (!nv_wait(NV50_AUXCH_CTRL(index), 0x00010000, 0x00000000)) {
+			NV_ERROR(dev, "expected bit 16 == 0, got 0x%08x\n",
+				 nv_rd32(dev, NV50_AUXCH_CTRL(index)));
+			ret = -EBUSY;
+			goto out;
+		}
+
+		udelay(400);
+
+		stat = nv_rd32(dev, NV50_AUXCH_STAT(index));
+		if ((stat & NV50_AUXCH_STAT_REPLY_AUX) !=
+			    NV50_AUXCH_STAT_REPLY_AUX_DEFER)
+			break;
+	}
+
+	if (cmd & 1) {
+		if ((stat & NV50_AUXCH_STAT_COUNT) != data_nr) {
+			ret = -EREMOTEIO;
+			goto out;
+		}
+
+		for (i = 0; i < 4; i++) {
+			data32[i] = nv_rd32(dev, NV50_AUXCH_DATA_IN(index, i));
+			NV_DEBUG_KMS(dev, "rd %d: 0x%08x\n", i, data32[i]);
+		}
+		memcpy(data, data32, data_nr);
+	}
+
+out:
+	tmp = nv_rd32(dev, NV50_AUXCH_CTRL(auxch->rd));
+	nv_wr32(dev, NV50_AUXCH_CTRL(auxch->rd), tmp & ~0x00100000);
+	tmp = nv_rd32(dev, NV50_AUXCH_CTRL(auxch->rd));
+	if (tmp & 0x01000000) {
+		NV_ERROR(dev, "expected bit 24 == 0, got 0x%08x\n", tmp);
+		ret = -EIO;
+	}
+
+	udelay(400);
+
+	return ret ? ret : (stat & NV50_AUXCH_STAT_REPLY);
+}
+
+int
+nouveau_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
+		      uint8_t write_byte, uint8_t *read_byte)
+{
+	struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
+	struct nouveau_i2c_chan *auxch = (struct nouveau_i2c_chan *)adapter;
+	struct drm_device *dev = auxch->dev;
+	int ret = 0, cmd, addr = algo_data->address;
+	uint8_t *buf;
+
+	if (mode == MODE_I2C_READ) {
+		cmd = AUX_I2C_READ;
+		buf = read_byte;
+	} else {
+		cmd = (mode & MODE_I2C_READ) ? AUX_I2C_READ : AUX_I2C_WRITE;
+		buf = &write_byte;
+	}
+
+	if (!(mode & MODE_I2C_STOP))
+		cmd |= AUX_I2C_MOT;
+
+	if (mode & MODE_I2C_START)
+		return 1;
+
+	for (;;) {
+		ret = nouveau_dp_auxch(auxch, cmd, addr, buf, 1);
+		if (ret < 0)
+			return ret;
+
+		switch (ret & NV50_AUXCH_STAT_REPLY_I2C) {
+		case NV50_AUXCH_STAT_REPLY_I2C_ACK:
+			return 1;
+		case NV50_AUXCH_STAT_REPLY_I2C_NACK:
+			return -EREMOTEIO;
+		case NV50_AUXCH_STAT_REPLY_I2C_DEFER:
+			udelay(100);
+			break;
+		default:
+			NV_ERROR(dev, "invalid auxch status: 0x%08x\n", ret);
+			return -EREMOTEIO;
+		}
+	}
+}
+
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_fence.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_fence.c
@@ -0,0 +1,262 @@
+/*
+ * Copyright (C) 2007 Ben Skeggs.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include "drmP.h"
+#include "drm.h"
+
+#include "nouveau_drv.h"
+#include "nouveau_dma.h"
+
+#define USE_REFCNT (dev_priv->card_type >= NV_10)
+
+struct nouveau_fence {
+	struct nouveau_channel *channel;
+	struct kref refcount;
+	struct list_head entry;
+
+	uint32_t sequence;
+	bool signalled;
+};
+
+static inline struct nouveau_fence *
+nouveau_fence(void *sync_obj)
+{
+	return (struct nouveau_fence *)sync_obj;
+}
+
+static void
+nouveau_fence_del(struct kref *ref)
+{
+	struct nouveau_fence *fence =
+		container_of(ref, struct nouveau_fence, refcount);
+
+	kfree(fence);
+}
+
+void
+nouveau_fence_update(struct nouveau_channel *chan)
+{
+	struct drm_nouveau_private *dev_priv = chan->dev->dev_private;
+	struct list_head *entry, *tmp;
+	struct nouveau_fence *fence;
+	uint32_t sequence;
+
+	if (USE_REFCNT)
+		sequence = nvchan_rd32(chan, 0x48);
+	else
+		sequence = chan->fence.last_sequence_irq;
+
+	if (chan->fence.sequence_ack == sequence)
+		return;
+	chan->fence.sequence_ack = sequence;
+
+	list_for_each_safe(entry, tmp, &chan->fence.pending) {
+		fence = list_entry(entry, struct nouveau_fence, entry);
+
+		sequence = fence->sequence;
+		fence->signalled = true;
+		list_del(&fence->entry);
+		kref_put(&fence->refcount, nouveau_fence_del);
+
+		if (sequence == chan->fence.sequence_ack)
+			break;
+	}
+}
+
+int
+nouveau_fence_new(struct nouveau_channel *chan, struct nouveau_fence **pfence,
+		  bool emit)
+{
+	struct nouveau_fence *fence;
+	int ret = 0;
+
+	fence = kzalloc(sizeof(*fence), GFP_KERNEL);
+	if (!fence)
+		return -ENOMEM;
+	kref_init(&fence->refcount);
+	fence->channel = chan;
+
+	if (emit)
+		ret = nouveau_fence_emit(fence);
+
+	if (ret)
+		nouveau_fence_unref((void *)&fence);
+	*pfence = fence;
+	return ret;
+}
+
+struct nouveau_channel *
+nouveau_fence_channel(struct nouveau_fence *fence)
+{
+	return fence ? fence->channel : NULL;
+}
+
+int
+nouveau_fence_emit(struct nouveau_fence *fence)
+{
+	struct drm_nouveau_private *dev_priv = fence->channel->dev->dev_private;
+	struct nouveau_channel *chan = fence->channel;
+	unsigned long flags;
+	int ret;
+
+	ret = RING_SPACE(chan, 2);
+	if (ret)
+		return ret;
+
+	if (unlikely(chan->fence.sequence == chan->fence.sequence_ack - 1)) {
+		spin_lock_irqsave(&chan->fence.lock, flags);
+		nouveau_fence_update(chan);
+		spin_unlock_irqrestore(&chan->fence.lock, flags);
+
+		BUG_ON(chan->fence.sequence ==
+		       chan->fence.sequence_ack - 1);
+	}
+
+	fence->sequence = ++chan->fence.sequence;
+
+	kref_get(&fence->refcount);
+	spin_lock_irqsave(&chan->fence.lock, flags);
+	list_add_tail(&fence->entry, &chan->fence.pending);
+	spin_unlock_irqrestore(&chan->fence.lock, flags);
+
+	BEGIN_RING(chan, NvSubSw, USE_REFCNT ? 0x0050 : 0x0150, 1);
+	OUT_RING(chan, fence->sequence);
+	FIRE_RING(chan);
+
+	return 0;
+}
+
+void
+nouveau_fence_unref(void **sync_obj)
+{
+	struct nouveau_fence *fence = nouveau_fence(*sync_obj);
+
+	if (fence)
+		kref_put(&fence->refcount, nouveau_fence_del);
+	*sync_obj = NULL;
+}
+
+void *
+nouveau_fence_ref(void *sync_obj)
+{
+	struct nouveau_fence *fence = nouveau_fence(sync_obj);
+
+	kref_get(&fence->refcount);
+	return sync_obj;
+}
+
+bool
+nouveau_fence_signalled(void *sync_obj, void *sync_arg)
+{
+	struct nouveau_fence *fence = nouveau_fence(sync_obj);
+	struct nouveau_channel *chan = fence->channel;
+	unsigned long flags;
+
+	if (fence->signalled)
+		return true;
+
+	spin_lock_irqsave(&chan->fence.lock, flags);
+	nouveau_fence_update(chan);
+	spin_unlock_irqrestore(&chan->fence.lock, flags);
+	return fence->signalled;
+}
+
+int
+nouveau_fence_wait(void *sync_obj, void *sync_arg, bool lazy, bool intr)
+{
+	unsigned long timeout = jiffies + (3 * DRM_HZ);
+	int ret = 0;
+
+	__set_current_state(intr ? TASK_INTERRUPTIBLE : TASK_UNINTERRUPTIBLE);
+
+	while (1) {
+		if (nouveau_fence_signalled(sync_obj, sync_arg))
+			break;
+
+		if (time_after_eq(jiffies, timeout)) {
+			ret = -EBUSY;
+			break;
+		}
+
+		if (lazy)
+			schedule_timeout(1);
+
+		if (intr && signal_pending(current)) {
+			ret = -ERESTARTSYS;
+			break;
+		}
+	}
+
+	__set_current_state(TASK_RUNNING);
+
+	return ret;
+}
+
+int
+nouveau_fence_flush(void *sync_obj, void *sync_arg)
+{
+	return 0;
+}
+
+void
+nouveau_fence_handler(struct drm_device *dev, int channel)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_channel *chan = NULL;
+
+	if (channel >= 0 && channel < dev_priv->engine.fifo.channels)
+		chan = dev_priv->fifos[channel];
+
+	if (chan) {
+		spin_lock_irq(&chan->fence.lock);
+		nouveau_fence_update(chan);
+		spin_unlock_irq(&chan->fence.lock);
+	}
+}
+
+int
+nouveau_fence_init(struct nouveau_channel *chan)
+{
+	INIT_LIST_HEAD(&chan->fence.pending);
+	spin_lock_init(&chan->fence.lock);
+	return 0;
+}
+
+void
+nouveau_fence_fini(struct nouveau_channel *chan)
+{
+	struct list_head *entry, *tmp;
+	struct nouveau_fence *fence;
+
+	list_for_each_safe(entry, tmp, &chan->fence.pending) {
+		fence = list_entry(entry, struct nouveau_fence, entry);
+
+		fence->signalled = true;
+		list_del(&fence->entry);
+		kref_put(&fence->refcount, nouveau_fence_del);
+	}
+}
+
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv50_fifo.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv50_fifo.c
@@ -0,0 +1,495 @@
+/*
+ * Copyright (C) 2007 Ben Skeggs.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include "drmP.h"
+#include "drm.h"
+#include "nouveau_drv.h"
+
+struct nv50_fifo_priv {
+	struct nouveau_gpuobj_ref *thingo[2];
+	int cur_thingo;
+};
+
+#define IS_G80 ((dev_priv->chipset & 0xf0) == 0x50)
+
+static void
+nv50_fifo_init_thingo(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nv50_fifo_priv *priv = dev_priv->engine.fifo.priv;
+	struct nouveau_gpuobj_ref *cur;
+	int i, nr;
+
+	NV_DEBUG(dev, "\n");
+
+	cur = priv->thingo[priv->cur_thingo];
+	priv->cur_thingo = !priv->cur_thingo;
+
+	/* We never schedule channel 0 or 127 */
+	dev_priv->engine.instmem.prepare_access(dev, true);
+	for (i = 1, nr = 0; i < 127; i++) {
+		if (dev_priv->fifos[i] && dev_priv->fifos[i]->ramfc)
+			nv_wo32(dev, cur->gpuobj, nr++, i);
+	}
+	dev_priv->engine.instmem.finish_access(dev);
+
+	nv_wr32(dev, 0x32f4, cur->instance >> 12);
+	nv_wr32(dev, 0x32ec, nr);
+	nv_wr32(dev, 0x2500, 0x101);
+}
+
+static int
+nv50_fifo_channel_enable(struct drm_device *dev, int channel, bool nt)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_channel *chan = dev_priv->fifos[channel];
+	uint32_t inst;
+
+	NV_DEBUG(dev, "ch%d\n", channel);
+
+	if (!chan->ramfc)
+		return -EINVAL;
+
+	if (IS_G80)
+		inst = chan->ramfc->instance >> 12;
+	else
+		inst = chan->ramfc->instance >> 8;
+	nv_wr32(dev, NV50_PFIFO_CTX_TABLE(channel),
+		 inst | NV50_PFIFO_CTX_TABLE_CHANNEL_ENABLED);
+
+	if (!nt)
+		nv50_fifo_init_thingo(dev);
+	return 0;
+}
+
+static void
+nv50_fifo_channel_disable(struct drm_device *dev, int channel, bool nt)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	uint32_t inst;
+
+	NV_DEBUG(dev, "ch%d, nt=%d\n", channel, nt);
+
+	if (IS_G80)
+		inst = NV50_PFIFO_CTX_TABLE_INSTANCE_MASK_G80;
+	else
+		inst = NV50_PFIFO_CTX_TABLE_INSTANCE_MASK_G84;
+	nv_wr32(dev, NV50_PFIFO_CTX_TABLE(channel), inst);
+
+	if (!nt)
+		nv50_fifo_init_thingo(dev);
+}
+
+static void
+nv50_fifo_init_reset(struct drm_device *dev)
+{
+	uint32_t pmc_e = NV_PMC_ENABLE_PFIFO;
+
+	NV_DEBUG(dev, "\n");
+
+	nv_wr32(dev, NV03_PMC_ENABLE, nv_rd32(dev, NV03_PMC_ENABLE) & ~pmc_e);
+	nv_wr32(dev, NV03_PMC_ENABLE, nv_rd32(dev, NV03_PMC_ENABLE) |  pmc_e);
+}
+
+static void
+nv50_fifo_init_intr(struct drm_device *dev)
+{
+	NV_DEBUG(dev, "\n");
+
+	nv_wr32(dev, NV03_PFIFO_INTR_0, 0xFFFFFFFF);
+	nv_wr32(dev, NV03_PFIFO_INTR_EN_0, 0xFFFFFFFF);
+}
+
+static void
+nv50_fifo_init_context_table(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	int i;
+
+	NV_DEBUG(dev, "\n");
+
+	for (i = 0; i < NV50_PFIFO_CTX_TABLE__SIZE; i++) {
+		if (dev_priv->fifos[i])
+			nv50_fifo_channel_enable(dev, i, true);
+		else
+			nv50_fifo_channel_disable(dev, i, true);
+	}
+
+	nv50_fifo_init_thingo(dev);
+}
+
+static void
+nv50_fifo_init_regs__nv(struct drm_device *dev)
+{
+	NV_DEBUG(dev, "\n");
+
+	nv_wr32(dev, 0x250c, 0x6f3cfc34);
+}
+
+static void
+nv50_fifo_init_regs(struct drm_device *dev)
+{
+	NV_DEBUG(dev, "\n");
+
+	nv_wr32(dev, 0x2500, 0);
+	nv_wr32(dev, 0x3250, 0);
+	nv_wr32(dev, 0x3220, 0);
+	nv_wr32(dev, 0x3204, 0);
+	nv_wr32(dev, 0x3210, 0);
+	nv_wr32(dev, 0x3270, 0);
+
+	/* Enable dummy channels setup by nv50_instmem.c */
+	nv50_fifo_channel_enable(dev, 0, true);
+	nv50_fifo_channel_enable(dev, 127, true);
+}
+
+int
+nv50_fifo_init(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nv50_fifo_priv *priv;
+	int ret;
+
+	NV_DEBUG(dev, "\n");
+
+	priv = dev_priv->engine.fifo.priv;
+	if (priv) {
+		priv->cur_thingo = !priv->cur_thingo;
+		goto just_reset;
+	}
+
+	priv = kzalloc(sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+	dev_priv->engine.fifo.priv = priv;
+
+	ret = nouveau_gpuobj_new_ref(dev, NULL, NULL, 0, 128*4, 0x1000,
+				     NVOBJ_FLAG_ZERO_ALLOC, &priv->thingo[0]);
+	if (ret) {
+		NV_ERROR(dev, "error creating thingo0: %d\n", ret);
+		return ret;
+	}
+
+	ret = nouveau_gpuobj_new_ref(dev, NULL, NULL, 0, 128*4, 0x1000,
+				     NVOBJ_FLAG_ZERO_ALLOC, &priv->thingo[1]);
+	if (ret) {
+		NV_ERROR(dev, "error creating thingo1: %d\n", ret);
+		return ret;
+	}
+
+just_reset:
+	nv50_fifo_init_reset(dev);
+	nv50_fifo_init_intr(dev);
+	nv50_fifo_init_context_table(dev);
+	nv50_fifo_init_regs__nv(dev);
+	nv50_fifo_init_regs(dev);
+	dev_priv->engine.fifo.enable(dev);
+	dev_priv->engine.fifo.reassign(dev, true);
+
+	return 0;
+}
+
+void
+nv50_fifo_takedown(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nv50_fifo_priv *priv = dev_priv->engine.fifo.priv;
+
+	NV_DEBUG(dev, "\n");
+
+	if (!priv)
+		return;
+
+	nouveau_gpuobj_ref_del(dev, &priv->thingo[0]);
+	nouveau_gpuobj_ref_del(dev, &priv->thingo[1]);
+
+	dev_priv->engine.fifo.priv = NULL;
+	kfree(priv);
+}
+
+int
+nv50_fifo_channel_id(struct drm_device *dev)
+{
+	return nv_rd32(dev, NV03_PFIFO_CACHE1_PUSH1) &
+			NV50_PFIFO_CACHE1_PUSH1_CHID_MASK;
+}
+
+int
+nv50_fifo_create_context(struct nouveau_channel *chan)
+{
+	struct drm_device *dev = chan->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_gpuobj *ramfc = NULL;
+	int ret;
+
+	NV_DEBUG(dev, "ch%d\n", chan->id);
+
+	if (IS_G80) {
+		uint32_t ramin_poffset = chan->ramin->gpuobj->im_pramin->start;
+		uint32_t ramin_voffset = chan->ramin->gpuobj->im_backing_start;
+
+		ret = nouveau_gpuobj_new_fake(dev, ramin_poffset, ramin_voffset,
+					      0x100, NVOBJ_FLAG_ZERO_ALLOC |
+					      NVOBJ_FLAG_ZERO_FREE, &ramfc,
+					      &chan->ramfc);
+		if (ret)
+			return ret;
+
+		ret = nouveau_gpuobj_new_fake(dev, ramin_poffset + 0x0400,
+					      ramin_voffset + 0x0400, 4096,
+					      0, NULL, &chan->cache);
+		if (ret)
+			return ret;
+	} else {
+		ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, 0x100, 256,
+					     NVOBJ_FLAG_ZERO_ALLOC |
+					     NVOBJ_FLAG_ZERO_FREE,
+					     &chan->ramfc);
+		if (ret)
+			return ret;
+		ramfc = chan->ramfc->gpuobj;
+
+		ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, 4096, 1024,
+					     0, &chan->cache);
+		if (ret)
+			return ret;
+	}
+
+	dev_priv->engine.instmem.prepare_access(dev, true);
+
+	nv_wo32(dev, ramfc, 0x08/4, chan->pushbuf_base);
+	nv_wo32(dev, ramfc, 0x10/4, chan->pushbuf_base);
+	nv_wo32(dev, ramfc, 0x48/4, chan->pushbuf->instance >> 4);
+	nv_wo32(dev, ramfc, 0x80/4, (0xc << 24) | (chan->ramht->instance >> 4));
+	nv_wo32(dev, ramfc, 0x3c/4, 0x00086078);
+	nv_wo32(dev, ramfc, 0x44/4, 0x2101ffff);
+	nv_wo32(dev, ramfc, 0x60/4, 0x7fffffff);
+	nv_wo32(dev, ramfc, 0x40/4, 0x00000000);
+	nv_wo32(dev, ramfc, 0x7c/4, 0x30000001);
+	nv_wo32(dev, ramfc, 0x78/4, 0x00000000);
+	nv_wo32(dev, ramfc, 0x4c/4, 0xffffffff);
+
+	if (!IS_G80) {
+		nv_wo32(dev, chan->ramin->gpuobj, 0, chan->id);
+		nv_wo32(dev, chan->ramin->gpuobj, 1,
+						chan->ramfc->instance >> 8);
+
+		nv_wo32(dev, ramfc, 0x88/4, chan->cache->instance >> 10);
+		nv_wo32(dev, ramfc, 0x98/4, chan->ramin->instance >> 12);
+	}
+
+	dev_priv->engine.instmem.finish_access(dev);
+
+	ret = nv50_fifo_channel_enable(dev, chan->id, false);
+	if (ret) {
+		NV_ERROR(dev, "error enabling ch%d: %d\n", chan->id, ret);
+		nouveau_gpuobj_ref_del(dev, &chan->ramfc);
+		return ret;
+	}
+
+	return 0;
+}
+
+void
+nv50_fifo_destroy_context(struct nouveau_channel *chan)
+{
+	struct drm_device *dev = chan->dev;
+	struct nouveau_gpuobj_ref *ramfc = chan->ramfc;
+
+	NV_DEBUG(dev, "ch%d\n", chan->id);
+
+	/* This will ensure the channel is seen as disabled. */
+	chan->ramfc = NULL;
+	nv50_fifo_channel_disable(dev, chan->id, false);
+
+	/* Dummy channel, also used on ch 127 */
+	if (chan->id == 0)
+		nv50_fifo_channel_disable(dev, 127, false);
+
+	nouveau_gpuobj_ref_del(dev, &ramfc);
+	nouveau_gpuobj_ref_del(dev, &chan->cache);
+}
+
+int
+nv50_fifo_load_context(struct nouveau_channel *chan)
+{
+	struct drm_device *dev = chan->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_gpuobj *ramfc = chan->ramfc->gpuobj;
+	struct nouveau_gpuobj *cache = chan->cache->gpuobj;
+	int ptr, cnt;
+
+	NV_DEBUG(dev, "ch%d\n", chan->id);
+
+	dev_priv->engine.instmem.prepare_access(dev, false);
+
+	nv_wr32(dev, 0x3330, nv_ro32(dev, ramfc, 0x00/4));
+	nv_wr32(dev, 0x3334, nv_ro32(dev, ramfc, 0x04/4));
+	nv_wr32(dev, 0x3240, nv_ro32(dev, ramfc, 0x08/4));
+	nv_wr32(dev, 0x3320, nv_ro32(dev, ramfc, 0x0c/4));
+	nv_wr32(dev, 0x3244, nv_ro32(dev, ramfc, 0x10/4));
+	nv_wr32(dev, 0x3328, nv_ro32(dev, ramfc, 0x14/4));
+	nv_wr32(dev, 0x3368, nv_ro32(dev, ramfc, 0x18/4));
+	nv_wr32(dev, 0x336c, nv_ro32(dev, ramfc, 0x1c/4));
+	nv_wr32(dev, 0x3370, nv_ro32(dev, ramfc, 0x20/4));
+	nv_wr32(dev, 0x3374, nv_ro32(dev, ramfc, 0x24/4));
+	nv_wr32(dev, 0x3378, nv_ro32(dev, ramfc, 0x28/4));
+	nv_wr32(dev, 0x337c, nv_ro32(dev, ramfc, 0x2c/4));
+	nv_wr32(dev, 0x3228, nv_ro32(dev, ramfc, 0x30/4));
+	nv_wr32(dev, 0x3364, nv_ro32(dev, ramfc, 0x34/4));
+	nv_wr32(dev, 0x32a0, nv_ro32(dev, ramfc, 0x38/4));
+	nv_wr32(dev, 0x3224, nv_ro32(dev, ramfc, 0x3c/4));
+	nv_wr32(dev, 0x324c, nv_ro32(dev, ramfc, 0x40/4));
+	nv_wr32(dev, 0x2044, nv_ro32(dev, ramfc, 0x44/4));
+	nv_wr32(dev, 0x322c, nv_ro32(dev, ramfc, 0x48/4));
+	nv_wr32(dev, 0x3234, nv_ro32(dev, ramfc, 0x4c/4));
+	nv_wr32(dev, 0x3340, nv_ro32(dev, ramfc, 0x50/4));
+	nv_wr32(dev, 0x3344, nv_ro32(dev, ramfc, 0x54/4));
+	nv_wr32(dev, 0x3280, nv_ro32(dev, ramfc, 0x58/4));
+	nv_wr32(dev, 0x3254, nv_ro32(dev, ramfc, 0x5c/4));
+	nv_wr32(dev, 0x3260, nv_ro32(dev, ramfc, 0x60/4));
+	nv_wr32(dev, 0x3264, nv_ro32(dev, ramfc, 0x64/4));
+	nv_wr32(dev, 0x3268, nv_ro32(dev, ramfc, 0x68/4));
+	nv_wr32(dev, 0x326c, nv_ro32(dev, ramfc, 0x6c/4));
+	nv_wr32(dev, 0x32e4, nv_ro32(dev, ramfc, 0x70/4));
+	nv_wr32(dev, 0x3248, nv_ro32(dev, ramfc, 0x74/4));
+	nv_wr32(dev, 0x2088, nv_ro32(dev, ramfc, 0x78/4));
+	nv_wr32(dev, 0x2058, nv_ro32(dev, ramfc, 0x7c/4));
+	nv_wr32(dev, 0x2210, nv_ro32(dev, ramfc, 0x80/4));
+
+	cnt = nv_ro32(dev, ramfc, 0x84/4);
+	for (ptr = 0; ptr < cnt; ptr++) {
+		nv_wr32(dev, NV40_PFIFO_CACHE1_METHOD(ptr),
+			nv_ro32(dev, cache, (ptr * 2) + 0));
+		nv_wr32(dev, NV40_PFIFO_CACHE1_DATA(ptr),
+			nv_ro32(dev, cache, (ptr * 2) + 1));
+	}
+	nv_wr32(dev, NV03_PFIFO_CACHE1_PUT, cnt << 2);
+	nv_wr32(dev, NV03_PFIFO_CACHE1_GET, 0);
+
+	/* guessing that all the 0x34xx regs aren't on NV50 */
+	if (!IS_G80) {
+		nv_wr32(dev, 0x340c, nv_ro32(dev, ramfc, 0x88/4));
+		nv_wr32(dev, 0x3400, nv_ro32(dev, ramfc, 0x8c/4));
+		nv_wr32(dev, 0x3404, nv_ro32(dev, ramfc, 0x90/4));
+		nv_wr32(dev, 0x3408, nv_ro32(dev, ramfc, 0x94/4));
+		nv_wr32(dev, 0x3410, nv_ro32(dev, ramfc, 0x98/4));
+	}
+
+	dev_priv->engine.instmem.finish_access(dev);
+
+	nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, chan->id | (1<<16));
+	return 0;
+}
+
+int
+nv50_fifo_unload_context(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
+	struct nouveau_gpuobj *ramfc, *cache;
+	struct nouveau_channel *chan = NULL;
+	int chid, get, put, ptr;
+
+	NV_DEBUG(dev, "\n");
+
+	chid = pfifo->channel_id(dev);
+	if (chid < 1 || chid >= dev_priv->engine.fifo.channels - 1)
+		return 0;
+
+	chan = dev_priv->fifos[chid];
+	if (!chan) {
+		NV_ERROR(dev, "Inactive channel on PFIFO: %d\n", chid);
+		return -EINVAL;
+	}
+	NV_DEBUG(dev, "ch%d\n", chan->id);
+	ramfc = chan->ramfc->gpuobj;
+	cache = chan->cache->gpuobj;
+
+	dev_priv->engine.instmem.prepare_access(dev, true);
+
+	nv_wo32(dev, ramfc, 0x00/4, nv_rd32(dev, 0x3330));
+	nv_wo32(dev, ramfc, 0x04/4, nv_rd32(dev, 0x3334));
+	nv_wo32(dev, ramfc, 0x08/4, nv_rd32(dev, 0x3240));
+	nv_wo32(dev, ramfc, 0x0c/4, nv_rd32(dev, 0x3320));
+	nv_wo32(dev, ramfc, 0x10/4, nv_rd32(dev, 0x3244));
+	nv_wo32(dev, ramfc, 0x14/4, nv_rd32(dev, 0x3328));
+	nv_wo32(dev, ramfc, 0x18/4, nv_rd32(dev, 0x3368));
+	nv_wo32(dev, ramfc, 0x1c/4, nv_rd32(dev, 0x336c));
+	nv_wo32(dev, ramfc, 0x20/4, nv_rd32(dev, 0x3370));
+	nv_wo32(dev, ramfc, 0x24/4, nv_rd32(dev, 0x3374));
+	nv_wo32(dev, ramfc, 0x28/4, nv_rd32(dev, 0x3378));
+	nv_wo32(dev, ramfc, 0x2c/4, nv_rd32(dev, 0x337c));
+	nv_wo32(dev, ramfc, 0x30/4, nv_rd32(dev, 0x3228));
+	nv_wo32(dev, ramfc, 0x34/4, nv_rd32(dev, 0x3364));
+	nv_wo32(dev, ramfc, 0x38/4, nv_rd32(dev, 0x32a0));
+	nv_wo32(dev, ramfc, 0x3c/4, nv_rd32(dev, 0x3224));
+	nv_wo32(dev, ramfc, 0x40/4, nv_rd32(dev, 0x324c));
+	nv_wo32(dev, ramfc, 0x44/4, nv_rd32(dev, 0x2044));
+	nv_wo32(dev, ramfc, 0x48/4, nv_rd32(dev, 0x322c));
+	nv_wo32(dev, ramfc, 0x4c/4, nv_rd32(dev, 0x3234));
+	nv_wo32(dev, ramfc, 0x50/4, nv_rd32(dev, 0x3340));
+	nv_wo32(dev, ramfc, 0x54/4, nv_rd32(dev, 0x3344));
+	nv_wo32(dev, ramfc, 0x58/4, nv_rd32(dev, 0x3280));
+	nv_wo32(dev, ramfc, 0x5c/4, nv_rd32(dev, 0x3254));
+	nv_wo32(dev, ramfc, 0x60/4, nv_rd32(dev, 0x3260));
+	nv_wo32(dev, ramfc, 0x64/4, nv_rd32(dev, 0x3264));
+	nv_wo32(dev, ramfc, 0x68/4, nv_rd32(dev, 0x3268));
+	nv_wo32(dev, ramfc, 0x6c/4, nv_rd32(dev, 0x326c));
+	nv_wo32(dev, ramfc, 0x70/4, nv_rd32(dev, 0x32e4));
+	nv_wo32(dev, ramfc, 0x74/4, nv_rd32(dev, 0x3248));
+	nv_wo32(dev, ramfc, 0x78/4, nv_rd32(dev, 0x2088));
+	nv_wo32(dev, ramfc, 0x7c/4, nv_rd32(dev, 0x2058));
+	nv_wo32(dev, ramfc, 0x80/4, nv_rd32(dev, 0x2210));
+
+	put = (nv_rd32(dev, NV03_PFIFO_CACHE1_PUT) & 0x7ff) >> 2;
+	get = (nv_rd32(dev, NV03_PFIFO_CACHE1_GET) & 0x7ff) >> 2;
+	ptr = 0;
+	while (put != get) {
+		nv_wo32(dev, cache, ptr++,
+			    nv_rd32(dev, NV40_PFIFO_CACHE1_METHOD(get)));
+		nv_wo32(dev, cache, ptr++,
+			    nv_rd32(dev, NV40_PFIFO_CACHE1_DATA(get)));
+		get = (get + 1) & 0x1ff;
+	}
+
+	/* guessing that all the 0x34xx regs aren't on NV50 */
+	if (!IS_G80) {
+		nv_wo32(dev, ramfc, 0x84/4, ptr >> 1);
+		nv_wo32(dev, ramfc, 0x88/4, nv_rd32(dev, 0x340c));
+		nv_wo32(dev, ramfc, 0x8c/4, nv_rd32(dev, 0x3400));
+		nv_wo32(dev, ramfc, 0x90/4, nv_rd32(dev, 0x3404));
+		nv_wo32(dev, ramfc, 0x94/4, nv_rd32(dev, 0x3408));
+		nv_wo32(dev, ramfc, 0x98/4, nv_rd32(dev, 0x3410));
+	}
+
+	dev_priv->engine.instmem.finish_access(dev);
+
+	/*XXX: probably reload ch127 (NULL) state back too */
+	nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, 127);
+	return 0;
+}
+
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv04_fifo.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv04_fifo.c
@@ -0,0 +1,305 @@
+/*
+ * Copyright (C) 2007 Ben Skeggs.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include "drmP.h"
+#include "drm.h"
+#include "nouveau_drv.h"
+
+#define NV04_RAMFC(c) (dev_priv->ramfc_offset + ((c) * NV04_RAMFC__SIZE))
+#define NV04_RAMFC__SIZE 32
+#define NV04_RAMFC_DMA_PUT                                       0x00
+#define NV04_RAMFC_DMA_GET                                       0x04
+#define NV04_RAMFC_DMA_INSTANCE                                  0x08
+#define NV04_RAMFC_DMA_STATE                                     0x0C
+#define NV04_RAMFC_DMA_FETCH                                     0x10
+#define NV04_RAMFC_ENGINE                                        0x14
+#define NV04_RAMFC_PULL1_ENGINE                                  0x18
+
+#define RAMFC_WR(offset, val) nv_wo32(dev, chan->ramfc->gpuobj, \
+					 NV04_RAMFC_##offset/4, (val))
+#define RAMFC_RD(offset)      nv_ro32(dev, chan->ramfc->gpuobj, \
+					 NV04_RAMFC_##offset/4)
+
+void
+nv04_fifo_disable(struct drm_device *dev)
+{
+	uint32_t tmp;
+
+	tmp = nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_PUSH);
+	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_PUSH, tmp & ~1);
+	nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH0, 0);
+	tmp = nv_rd32(dev, NV03_PFIFO_CACHE1_PULL1);
+	nv_wr32(dev, NV04_PFIFO_CACHE1_PULL0, tmp & ~1);
+}
+
+void
+nv04_fifo_enable(struct drm_device *dev)
+{
+	nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH0, 1);
+	nv_wr32(dev, NV04_PFIFO_CACHE1_PULL0, 1);
+}
+
+bool
+nv04_fifo_reassign(struct drm_device *dev, bool enable)
+{
+	uint32_t reassign = nv_rd32(dev, NV03_PFIFO_CACHES);
+
+	nv_wr32(dev, NV03_PFIFO_CACHES, enable ? 1 : 0);
+	return (reassign == 1);
+}
+
+bool
+nv04_fifo_cache_flush(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_timer_engine *ptimer = &dev_priv->engine.timer;
+	uint64_t start = ptimer->read(dev);
+
+	do {
+		if (nv_rd32(dev, NV03_PFIFO_CACHE1_GET) ==
+		    nv_rd32(dev, NV03_PFIFO_CACHE1_PUT))
+			return true;
+
+	} while (ptimer->read(dev) - start < 100000000);
+
+	NV_ERROR(dev, "Timeout flushing the PFIFO cache.\n");
+
+	return false;
+}
+
+bool
+nv04_fifo_cache_pull(struct drm_device *dev, bool enable)
+{
+	uint32_t pull = nv_rd32(dev, NV04_PFIFO_CACHE1_PULL0);
+
+	if (enable) {
+		nv_wr32(dev, NV04_PFIFO_CACHE1_PULL0, pull | 1);
+	} else {
+		nv_wr32(dev, NV04_PFIFO_CACHE1_PULL0, pull & ~1);
+		nv_wr32(dev, NV04_PFIFO_CACHE1_HASH, 0);
+	}
+
+	return !!(pull & 1);
+}
+
+int
+nv04_fifo_channel_id(struct drm_device *dev)
+{
+	return nv_rd32(dev, NV03_PFIFO_CACHE1_PUSH1) &
+			NV03_PFIFO_CACHE1_PUSH1_CHID_MASK;
+}
+
+int
+nv04_fifo_create_context(struct nouveau_channel *chan)
+{
+	struct drm_device *dev = chan->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	int ret;
+
+	ret = nouveau_gpuobj_new_fake(dev, NV04_RAMFC(chan->id), ~0,
+						NV04_RAMFC__SIZE,
+						NVOBJ_FLAG_ZERO_ALLOC |
+						NVOBJ_FLAG_ZERO_FREE,
+						NULL, &chan->ramfc);
+	if (ret)
+		return ret;
+
+	/* Setup initial state */
+	dev_priv->engine.instmem.prepare_access(dev, true);
+	RAMFC_WR(DMA_PUT, chan->pushbuf_base);
+	RAMFC_WR(DMA_GET, chan->pushbuf_base);
+	RAMFC_WR(DMA_INSTANCE, chan->pushbuf->instance >> 4);
+	RAMFC_WR(DMA_FETCH, (NV_PFIFO_CACHE1_DMA_FETCH_TRIG_128_BYTES |
+			     NV_PFIFO_CACHE1_DMA_FETCH_SIZE_128_BYTES |
+			     NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_8 |
+#ifdef __BIG_ENDIAN
+			     NV_PFIFO_CACHE1_BIG_ENDIAN |
+#endif
+			     0));
+	dev_priv->engine.instmem.finish_access(dev);
+
+	/* enable the fifo dma operation */
+	nv_wr32(dev, NV04_PFIFO_MODE,
+		nv_rd32(dev, NV04_PFIFO_MODE) | (1 << chan->id));
+	return 0;
+}
+
+void
+nv04_fifo_destroy_context(struct nouveau_channel *chan)
+{
+	struct drm_device *dev = chan->dev;
+
+	nv_wr32(dev, NV04_PFIFO_MODE,
+		nv_rd32(dev, NV04_PFIFO_MODE) & ~(1 << chan->id));
+
+	nouveau_gpuobj_ref_del(dev, &chan->ramfc);
+}
+
+static void
+nv04_fifo_do_load_context(struct drm_device *dev, int chid)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	uint32_t fc = NV04_RAMFC(chid), tmp;
+
+	dev_priv->engine.instmem.prepare_access(dev, false);
+
+	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_PUT, nv_ri32(dev, fc + 0));
+	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_GET, nv_ri32(dev, fc + 4));
+	tmp = nv_ri32(dev, fc + 8);
+	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_INSTANCE, tmp & 0xFFFF);
+	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_DCOUNT, tmp >> 16);
+	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_STATE, nv_ri32(dev, fc + 12));
+	nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_FETCH, nv_ri32(dev, fc + 16));
+	nv_wr32(dev, NV04_PFIFO_CACHE1_ENGINE, nv_ri32(dev, fc + 20));
+	nv_wr32(dev, NV04_PFIFO_CACHE1_PULL1, nv_ri32(dev, fc + 24));
+
+	dev_priv->engine.instmem.finish_access(dev);
+
+	nv_wr32(dev, NV03_PFIFO_CACHE1_GET, 0);
+	nv_wr32(dev, NV03_PFIFO_CACHE1_PUT, 0);
+}
+
+int
+nv04_fifo_load_context(struct nouveau_channel *chan)
+{
+	uint32_t tmp;
+
+	nv_wr32(chan->dev, NV03_PFIFO_CACHE1_PUSH1,
+			   NV03_PFIFO_CACHE1_PUSH1_DMA | chan->id);
+	nv04_fifo_do_load_context(chan->dev, chan->id);
+	nv_wr32(chan->dev, NV04_PFIFO_CACHE1_DMA_PUSH, 1);
+
+	/* Reset NV04_PFIFO_CACHE1_DMA_CTL_AT_INFO to INVALID */
+	tmp = nv_rd32(chan->dev, NV04_PFIFO_CACHE1_DMA_CTL) & ~(1 << 31);
+	nv_wr32(chan->dev, NV04_PFIFO_CACHE1_DMA_CTL, tmp);
+
+	return 0;
+}
+
+int
+nv04_fifo_unload_context(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
+	struct nouveau_channel *chan = NULL;
+	uint32_t tmp;
+	int chid;
+
+	chid = pfifo->channel_id(dev);
+	if (chid < 0 || chid >= dev_priv->engine.fifo.channels)
+		return 0;
+
+	chan = dev_priv->fifos[chid];
+	if (!chan) {
+		NV_ERROR(dev, "Inactive channel on PFIFO: %d\n", chid);
+		return -EINVAL;
+	}
+
+	dev_priv->engine.instmem.prepare_access(dev, true);
+	RAMFC_WR(DMA_PUT, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_PUT));
+	RAMFC_WR(DMA_GET, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_GET));
+	tmp  = nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_DCOUNT) << 16;
+	tmp |= nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_INSTANCE);
+	RAMFC_WR(DMA_INSTANCE, tmp);
+	RAMFC_WR(DMA_STATE, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_STATE));
+	RAMFC_WR(DMA_FETCH, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_FETCH));
+	RAMFC_WR(ENGINE, nv_rd32(dev, NV04_PFIFO_CACHE1_ENGINE));
+	RAMFC_WR(PULL1_ENGINE, nv_rd32(dev, NV04_PFIFO_CACHE1_PULL1));
+	dev_priv->engine.instmem.finish_access(dev);
+
+	nv04_fifo_do_load_context(dev, pfifo->channels - 1);
+	nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, pfifo->channels - 1);
+	return 0;
+}
+
+static void
+nv04_fifo_init_reset(struct drm_device *dev)
+{
+	nv_wr32(dev, NV03_PMC_ENABLE,
+		nv_rd32(dev, NV03_PMC_ENABLE) & ~NV_PMC_ENABLE_PFIFO);
+	nv_wr32(dev, NV03_PMC_ENABLE,
+		nv_rd32(dev, NV03_PMC_ENABLE) |  NV_PMC_ENABLE_PFIFO);
+
+	nv_wr32(dev, 0x003224, 0x000f0078);
+	nv_wr32(dev, 0x002044, 0x0101ffff);
+	nv_wr32(dev, 0x002040, 0x000000ff);
+	nv_wr32(dev, 0x002500, 0x00000000);
+	nv_wr32(dev, 0x003000, 0x00000000);
+	nv_wr32(dev, 0x003050, 0x00000000);
+	nv_wr32(dev, 0x003200, 0x00000000);
+	nv_wr32(dev, 0x003250, 0x00000000);
+	nv_wr32(dev, 0x003220, 0x00000000);
+
+	nv_wr32(dev, 0x003250, 0x00000000);
+	nv_wr32(dev, 0x003270, 0x00000000);
+	nv_wr32(dev, 0x003210, 0x00000000);
+}
+
+static void
+nv04_fifo_init_ramxx(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+	nv_wr32(dev, NV03_PFIFO_RAMHT, (0x03 << 24) /* search 128 */ |
+				       ((dev_priv->ramht_bits - 9) << 16) |
+				       (dev_priv->ramht_offset >> 8));
+	nv_wr32(dev, NV03_PFIFO_RAMRO, dev_priv->ramro_offset>>8);
+	nv_wr32(dev, NV03_PFIFO_RAMFC, dev_priv->ramfc_offset >> 8);
+}
+
+static void
+nv04_fifo_init_intr(struct drm_device *dev)
+{
+	nv_wr32(dev, 0x002100, 0xffffffff);
+	nv_wr32(dev, 0x002140, 0xffffffff);
+}
+
+int
+nv04_fifo_init(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
+	int i;
+
+	nv04_fifo_init_reset(dev);
+	nv04_fifo_init_ramxx(dev);
+
+	nv04_fifo_do_load_context(dev, pfifo->channels - 1);
+	nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, pfifo->channels - 1);
+
+	nv04_fifo_init_intr(dev);
+	pfifo->enable(dev);
+
+	for (i = 0; i < dev_priv->engine.fifo.channels; i++) {
+		if (dev_priv->fifos[i]) {
+			uint32_t mode = nv_rd32(dev, NV04_PFIFO_MODE);
+			nv_wr32(dev, NV04_PFIFO_MODE, mode | (1 << i));
+		}
+	}
+
+	return 0;
+}
+
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/Makefile
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/Makefile
@@ -0,0 +1,32 @@
+#
+# Makefile for the drm device driver.  This driver provides support for the
+# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
+
+ccflags-y := -Iinclude/drm
+nouveau-y := nouveau_drv.o nouveau_state.o nouveau_channel.o nouveau_mem.o \
+             nouveau_object.o nouveau_irq.o nouveau_notifier.o \
+             nouveau_sgdma.o nouveau_dma.o \
+             nouveau_bo.o nouveau_fence.o nouveau_gem.o nouveau_ttm.o \
+             nouveau_hw.o nouveau_calc.o nouveau_bios.o nouveau_i2c.o \
+             nouveau_display.o nouveau_connector.o nouveau_fbcon.o \
+             nouveau_dp.o nouveau_grctx.o \
+             nv04_timer.o \
+             nv04_mc.o nv40_mc.o nv50_mc.o \
+             nv04_fb.o nv10_fb.o nv40_fb.o \
+             nv04_fifo.o nv10_fifo.o nv40_fifo.o nv50_fifo.o \
+             nv04_graph.o nv10_graph.o nv20_graph.o \
+             nv40_graph.o nv50_graph.o \
+             nv40_grctx.o nv50_grctx.o \
+             nv04_instmem.o nv50_instmem.o \
+             nv50_crtc.o nv50_dac.o nv50_sor.o \
+             nv50_cursor.o nv50_display.o nv50_fbcon.o \
+             nv04_dac.o nv04_dfp.o nv04_tv.o nv17_tv.o nv17_tv_modes.o \
+             nv04_crtc.o nv04_display.o nv04_cursor.o nv04_fbcon.o \
+             nv17_gpio.o
+
+nouveau-$(CONFIG_DRM_NOUVEAU_DEBUG) += nouveau_debugfs.o
+nouveau-$(CONFIG_COMPAT) += nouveau_ioc32.o
+nouveau-$(CONFIG_DRM_NOUVEAU_BACKLIGHT) += nouveau_backlight.o
+nouveau-$(CONFIG_ACPI) += nouveau_acpi.o
+
+obj-$(CONFIG_DRM_NOUVEAU)+= nouveau.o
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_i2c.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_i2c.c
@@ -0,0 +1,269 @@
+/*
+ * Copyright 2009 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+
+#include "drmP.h"
+#include "nouveau_drv.h"
+#include "nouveau_i2c.h"
+#include "nouveau_hw.h"
+
+static void
+nv04_i2c_setscl(void *data, int state)
+{
+	struct nouveau_i2c_chan *i2c = data;
+	struct drm_device *dev = i2c->dev;
+	uint8_t val;
+
+	val = (NVReadVgaCrtc(dev, 0, i2c->wr) & 0xd0) | (state ? 0x20 : 0);
+	NVWriteVgaCrtc(dev, 0, i2c->wr, val | 0x01);
+}
+
+static void
+nv04_i2c_setsda(void *data, int state)
+{
+	struct nouveau_i2c_chan *i2c = data;
+	struct drm_device *dev = i2c->dev;
+	uint8_t val;
+
+	val = (NVReadVgaCrtc(dev, 0, i2c->wr) & 0xe0) | (state ? 0x10 : 0);
+	NVWriteVgaCrtc(dev, 0, i2c->wr, val | 0x01);
+}
+
+static int
+nv04_i2c_getscl(void *data)
+{
+	struct nouveau_i2c_chan *i2c = data;
+	struct drm_device *dev = i2c->dev;
+
+	return !!(NVReadVgaCrtc(dev, 0, i2c->rd) & 4);
+}
+
+static int
+nv04_i2c_getsda(void *data)
+{
+	struct nouveau_i2c_chan *i2c = data;
+	struct drm_device *dev = i2c->dev;
+
+	return !!(NVReadVgaCrtc(dev, 0, i2c->rd) & 8);
+}
+
+static void
+nv4e_i2c_setscl(void *data, int state)
+{
+	struct nouveau_i2c_chan *i2c = data;
+	struct drm_device *dev = i2c->dev;
+	uint8_t val;
+
+	val = (nv_rd32(dev, i2c->wr) & 0xd0) | (state ? 0x20 : 0);
+	nv_wr32(dev, i2c->wr, val | 0x01);
+}
+
+static void
+nv4e_i2c_setsda(void *data, int state)
+{
+	struct nouveau_i2c_chan *i2c = data;
+	struct drm_device *dev = i2c->dev;
+	uint8_t val;
+
+	val = (nv_rd32(dev, i2c->wr) & 0xe0) | (state ? 0x10 : 0);
+	nv_wr32(dev, i2c->wr, val | 0x01);
+}
+
+static int
+nv4e_i2c_getscl(void *data)
+{
+	struct nouveau_i2c_chan *i2c = data;
+	struct drm_device *dev = i2c->dev;
+
+	return !!((nv_rd32(dev, i2c->rd) >> 16) & 4);
+}
+
+static int
+nv4e_i2c_getsda(void *data)
+{
+	struct nouveau_i2c_chan *i2c = data;
+	struct drm_device *dev = i2c->dev;
+
+	return !!((nv_rd32(dev, i2c->rd) >> 16) & 8);
+}
+
+static int
+nv50_i2c_getscl(void *data)
+{
+	struct nouveau_i2c_chan *i2c = data;
+	struct drm_device *dev = i2c->dev;
+
+	return !!(nv_rd32(dev, i2c->rd) & 1);
+}
+
+
+static int
+nv50_i2c_getsda(void *data)
+{
+	struct nouveau_i2c_chan *i2c = data;
+	struct drm_device *dev = i2c->dev;
+
+	return !!(nv_rd32(dev, i2c->rd) & 2);
+}
+
+static void
+nv50_i2c_setscl(void *data, int state)
+{
+	struct nouveau_i2c_chan *i2c = data;
+	struct drm_device *dev = i2c->dev;
+
+	nv_wr32(dev, i2c->wr, 4 | (i2c->data ? 2 : 0) | (state ? 1 : 0));
+}
+
+static void
+nv50_i2c_setsda(void *data, int state)
+{
+	struct nouveau_i2c_chan *i2c = data;
+	struct drm_device *dev = i2c->dev;
+
+	nv_wr32(dev, i2c->wr,
+			(nv_rd32(dev, i2c->rd) & 1) | 4 | (state ? 2 : 0));
+	i2c->data = state;
+}
+
+static const uint32_t nv50_i2c_port[] = {
+	0x00e138, 0x00e150, 0x00e168, 0x00e180,
+	0x00e254, 0x00e274, 0x00e764, 0x00e780,
+	0x00e79c, 0x00e7b8
+};
+#define NV50_I2C_PORTS ARRAY_SIZE(nv50_i2c_port)
+
+int
+nouveau_i2c_init(struct drm_device *dev, struct dcb_i2c_entry *entry, int index)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_i2c_chan *i2c;
+	int ret;
+
+	if (entry->chan)
+		return -EEXIST;
+
+	if (dev_priv->card_type == NV_50 && entry->read >= NV50_I2C_PORTS) {
+		NV_ERROR(dev, "unknown i2c port %d\n", entry->read);
+		return -EINVAL;
+	}
+
+	i2c = kzalloc(sizeof(*i2c), GFP_KERNEL);
+	if (i2c == NULL)
+		return -ENOMEM;
+
+	switch (entry->port_type) {
+	case 0:
+		i2c->algo.bit.setsda = nv04_i2c_setsda;
+		i2c->algo.bit.setscl = nv04_i2c_setscl;
+		i2c->algo.bit.getsda = nv04_i2c_getsda;
+		i2c->algo.bit.getscl = nv04_i2c_getscl;
+		i2c->rd = entry->read;
+		i2c->wr = entry->write;
+		break;
+	case 4:
+		i2c->algo.bit.setsda = nv4e_i2c_setsda;
+		i2c->algo.bit.setscl = nv4e_i2c_setscl;
+		i2c->algo.bit.getsda = nv4e_i2c_getsda;
+		i2c->algo.bit.getscl = nv4e_i2c_getscl;
+		i2c->rd = 0x600800 + entry->read;
+		i2c->wr = 0x600800 + entry->write;
+		break;
+	case 5:
+		i2c->algo.bit.setsda = nv50_i2c_setsda;
+		i2c->algo.bit.setscl = nv50_i2c_setscl;
+		i2c->algo.bit.getsda = nv50_i2c_getsda;
+		i2c->algo.bit.getscl = nv50_i2c_getscl;
+		i2c->rd = nv50_i2c_port[entry->read];
+		i2c->wr = i2c->rd;
+		break;
+	case 6:
+		i2c->rd = entry->read;
+		i2c->wr = entry->write;
+		break;
+	default:
+		NV_ERROR(dev, "DCB I2C port type %d unknown\n",
+			 entry->port_type);
+		kfree(i2c);
+		return -EINVAL;
+	}
+
+	snprintf(i2c->adapter.name, sizeof(i2c->adapter.name),
+		 "nouveau-%s-%d", pci_name(dev->pdev), index);
+	i2c->adapter.owner = THIS_MODULE;
+	i2c->adapter.dev.parent = &dev->pdev->dev;
+	i2c->dev = dev;
+	i2c_set_adapdata(&i2c->adapter, i2c);
+
+	if (entry->port_type < 6) {
+		i2c->adapter.algo_data = &i2c->algo.bit;
+		i2c->algo.bit.udelay = 40;
+		i2c->algo.bit.timeout = usecs_to_jiffies(5000);
+		i2c->algo.bit.data = i2c;
+		ret = i2c_bit_add_bus(&i2c->adapter);
+	} else {
+		i2c->adapter.algo_data = &i2c->algo.dp;
+		i2c->algo.dp.running = false;
+		i2c->algo.dp.address = 0;
+		i2c->algo.dp.aux_ch = nouveau_dp_i2c_aux_ch;
+		ret = i2c_dp_aux_add_bus(&i2c->adapter);
+	}
+
+	if (ret) {
+		NV_ERROR(dev, "Failed to register i2c %d\n", index);
+		kfree(i2c);
+		return ret;
+	}
+
+	entry->chan = i2c;
+	return 0;
+}
+
+void
+nouveau_i2c_fini(struct drm_device *dev, struct dcb_i2c_entry *entry)
+{
+	if (!entry->chan)
+		return;
+
+	i2c_del_adapter(&entry->chan->adapter);
+	kfree(entry->chan);
+	entry->chan = NULL;
+}
+
+struct nouveau_i2c_chan *
+nouveau_i2c_find(struct drm_device *dev, int index)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nvbios *bios = &dev_priv->VBIOS;
+
+	if (index > DCB_MAX_NUM_I2C_ENTRIES)
+		return NULL;
+
+	if (!bios->bdcb.dcb.i2c[index].chan) {
+		if (nouveau_i2c_init(dev, &bios->bdcb.dcb.i2c[index], index))
+			return NULL;
+	}
+
+	return bios->bdcb.dcb.i2c[index].chan;
+}
+
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv50_dac.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv50_dac.c
@@ -0,0 +1,304 @@
+/*
+ * Copyright (C) 2008 Maarten Maathuis.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include "drmP.h"
+#include "drm_crtc_helper.h"
+
+#define NOUVEAU_DMA_DEBUG (nouveau_reg_debug & NOUVEAU_REG_DEBUG_EVO)
+#include "nouveau_reg.h"
+#include "nouveau_drv.h"
+#include "nouveau_dma.h"
+#include "nouveau_encoder.h"
+#include "nouveau_connector.h"
+#include "nouveau_crtc.h"
+#include "nv50_display.h"
+
+static void
+nv50_dac_disconnect(struct nouveau_encoder *nv_encoder)
+{
+	struct drm_device *dev = to_drm_encoder(nv_encoder)->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_channel *evo = dev_priv->evo;
+	int ret;
+
+	NV_DEBUG_KMS(dev, "Disconnecting DAC %d\n", nv_encoder->or);
+
+	ret = RING_SPACE(evo, 2);
+	if (ret) {
+		NV_ERROR(dev, "no space while disconnecting DAC\n");
+		return;
+	}
+	BEGIN_RING(evo, 0, NV50_EVO_DAC(nv_encoder->or, MODE_CTRL), 1);
+	OUT_RING(evo, 0);
+}
+
+static enum drm_connector_status
+nv50_dac_detect(struct drm_encoder *encoder, struct drm_connector *connector)
+{
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+	struct drm_device *dev = encoder->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	enum drm_connector_status status = connector_status_disconnected;
+	uint32_t dpms_state, load_pattern, load_state;
+	int or = nv_encoder->or;
+
+	nv_wr32(dev, NV50_PDISPLAY_DAC_CLK_CTRL1(or), 0x00000001);
+	dpms_state = nv_rd32(dev, NV50_PDISPLAY_DAC_DPMS_CTRL(or));
+
+	nv_wr32(dev, NV50_PDISPLAY_DAC_DPMS_CTRL(or),
+		0x00150000 | NV50_PDISPLAY_DAC_DPMS_CTRL_PENDING);
+	if (!nv_wait(NV50_PDISPLAY_DAC_DPMS_CTRL(or),
+		     NV50_PDISPLAY_DAC_DPMS_CTRL_PENDING, 0)) {
+		NV_ERROR(dev, "timeout: DAC_DPMS_CTRL_PENDING(%d) == 0\n", or);
+		NV_ERROR(dev, "DAC_DPMS_CTRL(%d) = 0x%08x\n", or,
+			  nv_rd32(dev, NV50_PDISPLAY_DAC_DPMS_CTRL(or)));
+		return status;
+	}
+
+	/* Use bios provided value if possible. */
+	if (dev_priv->vbios->dactestval) {
+		load_pattern = dev_priv->vbios->dactestval;
+		NV_DEBUG_KMS(dev, "Using bios provided load_pattern of %d\n",
+			  load_pattern);
+	} else {
+		load_pattern = 340;
+		NV_DEBUG_KMS(dev, "Using default load_pattern of %d\n",
+			 load_pattern);
+	}
+
+	nv_wr32(dev, NV50_PDISPLAY_DAC_LOAD_CTRL(or),
+		NV50_PDISPLAY_DAC_LOAD_CTRL_ACTIVE | load_pattern);
+	mdelay(45); /* give it some time to process */
+	load_state = nv_rd32(dev, NV50_PDISPLAY_DAC_LOAD_CTRL(or));
+
+	nv_wr32(dev, NV50_PDISPLAY_DAC_LOAD_CTRL(or), 0);
+	nv_wr32(dev, NV50_PDISPLAY_DAC_DPMS_CTRL(or), dpms_state |
+		NV50_PDISPLAY_DAC_DPMS_CTRL_PENDING);
+
+	if ((load_state & NV50_PDISPLAY_DAC_LOAD_CTRL_PRESENT) ==
+			  NV50_PDISPLAY_DAC_LOAD_CTRL_PRESENT)
+		status = connector_status_connected;
+
+	if (status == connector_status_connected)
+		NV_DEBUG_KMS(dev, "Load was detected on output with or %d\n", or);
+	else
+		NV_DEBUG_KMS(dev, "Load was not detected on output with or %d\n", or);
+
+	return status;
+}
+
+static void
+nv50_dac_dpms(struct drm_encoder *encoder, int mode)
+{
+	struct drm_device *dev = encoder->dev;
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+	uint32_t val;
+	int or = nv_encoder->or;
+
+	NV_DEBUG_KMS(dev, "or %d mode %d\n", or, mode);
+
+	/* wait for it to be done */
+	if (!nv_wait(NV50_PDISPLAY_DAC_DPMS_CTRL(or),
+		     NV50_PDISPLAY_DAC_DPMS_CTRL_PENDING, 0)) {
+		NV_ERROR(dev, "timeout: DAC_DPMS_CTRL_PENDING(%d) == 0\n", or);
+		NV_ERROR(dev, "DAC_DPMS_CTRL(%d) = 0x%08x\n", or,
+			 nv_rd32(dev, NV50_PDISPLAY_DAC_DPMS_CTRL(or)));
+		return;
+	}
+
+	val = nv_rd32(dev, NV50_PDISPLAY_DAC_DPMS_CTRL(or)) & ~0x7F;
+
+	if (mode != DRM_MODE_DPMS_ON)
+		val |= NV50_PDISPLAY_DAC_DPMS_CTRL_BLANKED;
+
+	switch (mode) {
+	case DRM_MODE_DPMS_STANDBY:
+		val |= NV50_PDISPLAY_DAC_DPMS_CTRL_HSYNC_OFF;
+		break;
+	case DRM_MODE_DPMS_SUSPEND:
+		val |= NV50_PDISPLAY_DAC_DPMS_CTRL_VSYNC_OFF;
+		break;
+	case DRM_MODE_DPMS_OFF:
+		val |= NV50_PDISPLAY_DAC_DPMS_CTRL_OFF;
+		val |= NV50_PDISPLAY_DAC_DPMS_CTRL_HSYNC_OFF;
+		val |= NV50_PDISPLAY_DAC_DPMS_CTRL_VSYNC_OFF;
+		break;
+	default:
+		break;
+	}
+
+	nv_wr32(dev, NV50_PDISPLAY_DAC_DPMS_CTRL(or), val |
+		NV50_PDISPLAY_DAC_DPMS_CTRL_PENDING);
+}
+
+static void
+nv50_dac_save(struct drm_encoder *encoder)
+{
+	NV_ERROR(encoder->dev, "!!\n");
+}
+
+static void
+nv50_dac_restore(struct drm_encoder *encoder)
+{
+	NV_ERROR(encoder->dev, "!!\n");
+}
+
+static bool
+nv50_dac_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
+		    struct drm_display_mode *adjusted_mode)
+{
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+	struct nouveau_connector *connector;
+
+	NV_DEBUG_KMS(encoder->dev, "or %d\n", nv_encoder->or);
+
+	connector = nouveau_encoder_connector_get(nv_encoder);
+	if (!connector) {
+		NV_ERROR(encoder->dev, "Encoder has no connector\n");
+		return false;
+	}
+
+	if (connector->scaling_mode != DRM_MODE_SCALE_NONE &&
+	     connector->native_mode) {
+		int id = adjusted_mode->base.id;
+		*adjusted_mode = *connector->native_mode;
+		adjusted_mode->base.id = id;
+	}
+
+	return true;
+}
+
+static void
+nv50_dac_prepare(struct drm_encoder *encoder)
+{
+}
+
+static void
+nv50_dac_commit(struct drm_encoder *encoder)
+{
+}
+
+static void
+nv50_dac_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
+		  struct drm_display_mode *adjusted_mode)
+{
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+	struct drm_device *dev = encoder->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_channel *evo = dev_priv->evo;
+	struct nouveau_crtc *crtc = nouveau_crtc(encoder->crtc);
+	uint32_t mode_ctl = 0, mode_ctl2 = 0;
+	int ret;
+
+	NV_DEBUG_KMS(dev, "or %d\n", nv_encoder->or);
+
+	nv50_dac_dpms(encoder, DRM_MODE_DPMS_ON);
+
+	if (crtc->index == 1)
+		mode_ctl |= NV50_EVO_DAC_MODE_CTRL_CRTC1;
+	else
+		mode_ctl |= NV50_EVO_DAC_MODE_CTRL_CRTC0;
+
+	/* Lacking a working tv-out, this is not a 100% sure. */
+	if (nv_encoder->dcb->type == OUTPUT_ANALOG)
+		mode_ctl |= 0x40;
+	else
+	if (nv_encoder->dcb->type == OUTPUT_TV)
+		mode_ctl |= 0x100;
+
+	if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
+		mode_ctl2 |= NV50_EVO_DAC_MODE_CTRL2_NHSYNC;
+
+	if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
+		mode_ctl2 |= NV50_EVO_DAC_MODE_CTRL2_NVSYNC;
+
+	ret = RING_SPACE(evo, 3);
+	if (ret) {
+		NV_ERROR(dev, "no space while connecting DAC\n");
+		return;
+	}
+	BEGIN_RING(evo, 0, NV50_EVO_DAC(nv_encoder->or, MODE_CTRL), 2);
+	OUT_RING(evo, mode_ctl);
+	OUT_RING(evo, mode_ctl2);
+}
+
+static const struct drm_encoder_helper_funcs nv50_dac_helper_funcs = {
+	.dpms = nv50_dac_dpms,
+	.save = nv50_dac_save,
+	.restore = nv50_dac_restore,
+	.mode_fixup = nv50_dac_mode_fixup,
+	.prepare = nv50_dac_prepare,
+	.commit = nv50_dac_commit,
+	.mode_set = nv50_dac_mode_set,
+	.detect = nv50_dac_detect
+};
+
+static void
+nv50_dac_destroy(struct drm_encoder *encoder)
+{
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+
+	if (!encoder)
+		return;
+
+	NV_DEBUG_KMS(encoder->dev, "\n");
+
+	drm_encoder_cleanup(encoder);
+	kfree(nv_encoder);
+}
+
+static const struct drm_encoder_funcs nv50_dac_encoder_funcs = {
+	.destroy = nv50_dac_destroy,
+};
+
+int
+nv50_dac_create(struct drm_device *dev, struct dcb_entry *entry)
+{
+	struct nouveau_encoder *nv_encoder;
+	struct drm_encoder *encoder;
+
+	NV_DEBUG_KMS(dev, "\n");
+	NV_INFO(dev, "Detected a DAC output\n");
+
+	nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
+	if (!nv_encoder)
+		return -ENOMEM;
+	encoder = to_drm_encoder(nv_encoder);
+
+	nv_encoder->dcb = entry;
+	nv_encoder->or = ffs(entry->or) - 1;
+
+	nv_encoder->disconnect = nv50_dac_disconnect;
+
+	drm_encoder_init(dev, encoder, &nv50_dac_encoder_funcs,
+			 DRM_MODE_ENCODER_DAC);
+	drm_encoder_helper_add(encoder, &nv50_dac_helper_funcs);
+
+	encoder->possible_crtcs = entry->heads;
+	encoder->possible_clones = 0;
+	return 0;
+}
+
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv40_grctx.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv40_grctx.c
@@ -0,0 +1,678 @@
+/*
+ * Copyright 2009 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+
+/* NVIDIA context programs handle a number of other conditions which are
+ * not implemented in our versions.  It's not clear why NVIDIA context
+ * programs have this code, nor whether it's strictly necessary for
+ * correct operation.  We'll implement additional handling if/when we
+ * discover it's necessary.
+ *
+ * - On context save, NVIDIA set 0x400314 bit 0 to 1 if the "3D state"
+ *   flag is set, this gets saved into the context.
+ * - On context save, the context program for all cards load nsource
+ *   into a flag register and check for ILLEGAL_MTHD.  If it's set,
+ *   opcode 0x60000d is called before resuming normal operation.
+ * - Some context programs check more conditions than the above.  NV44
+ *   checks: ((nsource & 0x0857) || (0x400718 & 0x0100) || (intr & 0x0001))
+ *   and calls 0x60000d before resuming normal operation.
+ * - At the very beginning of NVIDIA's context programs, flag 9 is checked
+ *   and if true 0x800001 is called with count=0, pos=0, the flag is cleared
+ *   and then the ctxprog is aborted.  It looks like a complicated NOP,
+ *   its purpose is unknown.
+ * - In the section of code that loads the per-vs state, NVIDIA check
+ *   flag 10.  If it's set, they only transfer the small 0x300 byte block
+ *   of state + the state for a single vs as opposed to the state for
+ *   all vs units.  It doesn't seem likely that it'll occur in normal
+ *   operation, especially seeing as it appears NVIDIA may have screwed
+ *   up the ctxprogs for some cards and have an invalid instruction
+ *   rather than a cp_lsr(ctx, dwords_for_1_vs_unit) instruction.
+ * - There's a number of places where context offset 0 (where we place
+ *   the PRAMIN offset of the context) is loaded into either 0x408000,
+ *   0x408004 or 0x408008.  Not sure what's up there either.
+ * - The ctxprogs for some cards save 0x400a00 again during the cleanup
+ *   path for auto-loadctx.
+ */
+
+#define CP_FLAG_CLEAR                 0
+#define CP_FLAG_SET                   1
+#define CP_FLAG_SWAP_DIRECTION        ((0 * 32) + 0)
+#define CP_FLAG_SWAP_DIRECTION_LOAD   0
+#define CP_FLAG_SWAP_DIRECTION_SAVE   1
+#define CP_FLAG_USER_SAVE             ((0 * 32) + 5)
+#define CP_FLAG_USER_SAVE_NOT_PENDING 0
+#define CP_FLAG_USER_SAVE_PENDING     1
+#define CP_FLAG_USER_LOAD             ((0 * 32) + 6)
+#define CP_FLAG_USER_LOAD_NOT_PENDING 0
+#define CP_FLAG_USER_LOAD_PENDING     1
+#define CP_FLAG_STATUS                ((3 * 32) + 0)
+#define CP_FLAG_STATUS_IDLE           0
+#define CP_FLAG_STATUS_BUSY           1
+#define CP_FLAG_AUTO_SAVE             ((3 * 32) + 4)
+#define CP_FLAG_AUTO_SAVE_NOT_PENDING 0
+#define CP_FLAG_AUTO_SAVE_PENDING     1
+#define CP_FLAG_AUTO_LOAD             ((3 * 32) + 5)
+#define CP_FLAG_AUTO_LOAD_NOT_PENDING 0
+#define CP_FLAG_AUTO_LOAD_PENDING     1
+#define CP_FLAG_UNK54                 ((3 * 32) + 6)
+#define CP_FLAG_UNK54_CLEAR           0
+#define CP_FLAG_UNK54_SET             1
+#define CP_FLAG_ALWAYS                ((3 * 32) + 8)
+#define CP_FLAG_ALWAYS_FALSE          0
+#define CP_FLAG_ALWAYS_TRUE           1
+#define CP_FLAG_UNK57                 ((3 * 32) + 9)
+#define CP_FLAG_UNK57_CLEAR           0
+#define CP_FLAG_UNK57_SET             1
+
+#define CP_CTX                   0x00100000
+#define CP_CTX_COUNT             0x000fc000
+#define CP_CTX_COUNT_SHIFT               14
+#define CP_CTX_REG               0x00003fff
+#define CP_LOAD_SR               0x00200000
+#define CP_LOAD_SR_VALUE         0x000fffff
+#define CP_BRA                   0x00400000
+#define CP_BRA_IP                0x0000ff00
+#define CP_BRA_IP_SHIFT                   8
+#define CP_BRA_IF_CLEAR          0x00000080
+#define CP_BRA_FLAG              0x0000007f
+#define CP_WAIT                  0x00500000
+#define CP_WAIT_SET              0x00000080
+#define CP_WAIT_FLAG             0x0000007f
+#define CP_SET                   0x00700000
+#define CP_SET_1                 0x00000080
+#define CP_SET_FLAG              0x0000007f
+#define CP_NEXT_TO_SWAP          0x00600007
+#define CP_NEXT_TO_CURRENT       0x00600009
+#define CP_SET_CONTEXT_POINTER   0x0060000a
+#define CP_END                   0x0060000e
+#define CP_LOAD_MAGIC_UNK01      0x00800001 /* unknown */
+#define CP_LOAD_MAGIC_NV44TCL    0x00800029 /* per-vs state (0x4497) */
+#define CP_LOAD_MAGIC_NV40TCL    0x00800041 /* per-vs state (0x4097) */
+
+#include "drmP.h"
+#include "nouveau_drv.h"
+#include "nouveau_grctx.h"
+
+/* TODO:
+ *  - get vs count from 0x1540
+ *  - document unimplemented bits compared to nvidia
+ *    - nsource handling
+ *    - R0 & 0x0200 handling
+ *    - single-vs handling
+ *    - 400314 bit 0
+ */
+
+static int
+nv40_graph_4097(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+	if ((dev_priv->chipset & 0xf0) == 0x60)
+		return 0;
+
+	return !!(0x0baf & (1 << dev_priv->chipset));
+}
+
+static int
+nv40_graph_vs_count(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+	switch (dev_priv->chipset) {
+	case 0x47:
+	case 0x49:
+	case 0x4b:
+		return 8;
+	case 0x40:
+		return 6;
+	case 0x41:
+	case 0x42:
+		return 5;
+	case 0x43:
+	case 0x44:
+	case 0x46:
+	case 0x4a:
+		return 3;
+	case 0x4c:
+	case 0x4e:
+	case 0x67:
+	default:
+		return 1;
+	}
+}
+
+
+enum cp_label {
+	cp_check_load = 1,
+	cp_setup_auto_load,
+	cp_setup_load,
+	cp_setup_save,
+	cp_swap_state,
+	cp_swap_state3d_3_is_save,
+	cp_prepare_exit,
+	cp_exit,
+};
+
+static void
+nv40_graph_construct_general(struct nouveau_grctx *ctx)
+{
+	struct drm_nouveau_private *dev_priv = ctx->dev->dev_private;
+	int i;
+
+	cp_ctx(ctx, 0x4000a4, 1);
+	gr_def(ctx, 0x4000a4, 0x00000008);
+	cp_ctx(ctx, 0x400144, 58);
+	gr_def(ctx, 0x400144, 0x00000001);
+	cp_ctx(ctx, 0x400314, 1);
+	gr_def(ctx, 0x400314, 0x00000000);
+	cp_ctx(ctx, 0x400400, 10);
+	cp_ctx(ctx, 0x400480, 10);
+	cp_ctx(ctx, 0x400500, 19);
+	gr_def(ctx, 0x400514, 0x00040000);
+	gr_def(ctx, 0x400524, 0x55555555);
+	gr_def(ctx, 0x400528, 0x55555555);
+	gr_def(ctx, 0x40052c, 0x55555555);
+	gr_def(ctx, 0x400530, 0x55555555);
+	cp_ctx(ctx, 0x400560, 6);
+	gr_def(ctx, 0x400568, 0x0000ffff);
+	gr_def(ctx, 0x40056c, 0x0000ffff);
+	cp_ctx(ctx, 0x40057c, 5);
+	cp_ctx(ctx, 0x400710, 3);
+	gr_def(ctx, 0x400710, 0x20010001);
+	gr_def(ctx, 0x400714, 0x0f73ef00);
+	cp_ctx(ctx, 0x400724, 1);
+	gr_def(ctx, 0x400724, 0x02008821);
+	cp_ctx(ctx, 0x400770, 3);
+	if (dev_priv->chipset == 0x40) {
+		cp_ctx(ctx, 0x400814, 4);
+		cp_ctx(ctx, 0x400828, 5);
+		cp_ctx(ctx, 0x400840, 5);
+		gr_def(ctx, 0x400850, 0x00000040);
+		cp_ctx(ctx, 0x400858, 4);
+		gr_def(ctx, 0x400858, 0x00000040);
+		gr_def(ctx, 0x40085c, 0x00000040);
+		gr_def(ctx, 0x400864, 0x80000000);
+		cp_ctx(ctx, 0x40086c, 9);
+		gr_def(ctx, 0x40086c, 0x80000000);
+		gr_def(ctx, 0x400870, 0x80000000);
+		gr_def(ctx, 0x400874, 0x80000000);
+		gr_def(ctx, 0x400878, 0x80000000);
+		gr_def(ctx, 0x400888, 0x00000040);
+		gr_def(ctx, 0x40088c, 0x80000000);
+		cp_ctx(ctx, 0x4009c0, 8);
+		gr_def(ctx, 0x4009cc, 0x80000000);
+		gr_def(ctx, 0x4009dc, 0x80000000);
+	} else {
+		cp_ctx(ctx, 0x400840, 20);
+		if (!nv40_graph_4097(ctx->dev)) {
+			for (i = 0; i < 8; i++)
+				gr_def(ctx, 0x400860 + (i * 4), 0x00000001);
+		}
+		gr_def(ctx, 0x400880, 0x00000040);
+		gr_def(ctx, 0x400884, 0x00000040);
+		gr_def(ctx, 0x400888, 0x00000040);
+		cp_ctx(ctx, 0x400894, 11);
+		gr_def(ctx, 0x400894, 0x00000040);
+		if (nv40_graph_4097(ctx->dev)) {
+			for (i = 0; i < 8; i++)
+				gr_def(ctx, 0x4008a0 + (i * 4), 0x80000000);
+		}
+		cp_ctx(ctx, 0x4008e0, 2);
+		cp_ctx(ctx, 0x4008f8, 2);
+		if (dev_priv->chipset == 0x4c ||
+		    (dev_priv->chipset & 0xf0) == 0x60)
+			cp_ctx(ctx, 0x4009f8, 1);
+	}
+	cp_ctx(ctx, 0x400a00, 73);
+	gr_def(ctx, 0x400b0c, 0x0b0b0b0c);
+	cp_ctx(ctx, 0x401000, 4);
+	cp_ctx(ctx, 0x405004, 1);
+	switch (dev_priv->chipset) {
+	case 0x47:
+	case 0x49:
+	case 0x4b:
+		cp_ctx(ctx, 0x403448, 1);
+		gr_def(ctx, 0x403448, 0x00001010);
+		break;
+	default:
+		cp_ctx(ctx, 0x403440, 1);
+		switch (dev_priv->chipset) {
+		case 0x40:
+			gr_def(ctx, 0x403440, 0x00000010);
+			break;
+		case 0x44:
+		case 0x46:
+		case 0x4a:
+			gr_def(ctx, 0x403440, 0x00003010);
+			break;
+		case 0x41:
+		case 0x42:
+		case 0x43:
+		case 0x4c:
+		case 0x4e:
+		case 0x67:
+		default:
+			gr_def(ctx, 0x403440, 0x00001010);
+			break;
+		}
+		break;
+	}
+}
+
+static void
+nv40_graph_construct_state3d(struct nouveau_grctx *ctx)
+{
+	struct drm_nouveau_private *dev_priv = ctx->dev->dev_private;
+	int i;
+
+	if (dev_priv->chipset == 0x40) {
+		cp_ctx(ctx, 0x401880, 51);
+		gr_def(ctx, 0x401940, 0x00000100);
+	} else
+	if (dev_priv->chipset == 0x46 || dev_priv->chipset == 0x47 ||
+	    dev_priv->chipset == 0x49 || dev_priv->chipset == 0x4b) {
+		cp_ctx(ctx, 0x401880, 32);
+		for (i = 0; i < 16; i++)
+			gr_def(ctx, 0x401880 + (i * 4), 0x00000111);
+		if (dev_priv->chipset == 0x46)
+			cp_ctx(ctx, 0x401900, 16);
+		cp_ctx(ctx, 0x401940, 3);
+	}
+	cp_ctx(ctx, 0x40194c, 18);
+	gr_def(ctx, 0x401954, 0x00000111);
+	gr_def(ctx, 0x401958, 0x00080060);
+	gr_def(ctx, 0x401974, 0x00000080);
+	gr_def(ctx, 0x401978, 0xffff0000);
+	gr_def(ctx, 0x40197c, 0x00000001);
+	gr_def(ctx, 0x401990, 0x46400000);
+	if (dev_priv->chipset == 0x40) {
+		cp_ctx(ctx, 0x4019a0, 2);
+		cp_ctx(ctx, 0x4019ac, 5);
+	} else {
+		cp_ctx(ctx, 0x4019a0, 1);
+		cp_ctx(ctx, 0x4019b4, 3);
+	}
+	gr_def(ctx, 0x4019bc, 0xffff0000);
+	switch (dev_priv->chipset) {
+	case 0x46:
+	case 0x47:
+	case 0x49:
+	case 0x4b:
+		cp_ctx(ctx, 0x4019c0, 18);
+		for (i = 0; i < 16; i++)
+			gr_def(ctx, 0x4019c0 + (i * 4), 0x88888888);
+		break;
+	}
+	cp_ctx(ctx, 0x401a08, 8);
+	gr_def(ctx, 0x401a10, 0x0fff0000);
+	gr_def(ctx, 0x401a14, 0x0fff0000);
+	gr_def(ctx, 0x401a1c, 0x00011100);
+	cp_ctx(ctx, 0x401a2c, 4);
+	cp_ctx(ctx, 0x401a44, 26);
+	for (i = 0; i < 16; i++)
+		gr_def(ctx, 0x401a44 + (i * 4), 0x07ff0000);
+	gr_def(ctx, 0x401a8c, 0x4b7fffff);
+	if (dev_priv->chipset == 0x40) {
+		cp_ctx(ctx, 0x401ab8, 3);
+	} else {
+		cp_ctx(ctx, 0x401ab8, 1);
+		cp_ctx(ctx, 0x401ac0, 1);
+	}
+	cp_ctx(ctx, 0x401ad0, 8);
+	gr_def(ctx, 0x401ad0, 0x30201000);
+	gr_def(ctx, 0x401ad4, 0x70605040);
+	gr_def(ctx, 0x401ad8, 0xb8a89888);
+	gr_def(ctx, 0x401adc, 0xf8e8d8c8);
+	cp_ctx(ctx, 0x401b10, dev_priv->chipset == 0x40 ? 2 : 1);
+	gr_def(ctx, 0x401b10, 0x40100000);
+	cp_ctx(ctx, 0x401b18, dev_priv->chipset == 0x40 ? 6 : 5);
+	gr_def(ctx, 0x401b28, dev_priv->chipset == 0x40 ?
+			      0x00000004 : 0x00000000);
+	cp_ctx(ctx, 0x401b30, 25);
+	gr_def(ctx, 0x401b34, 0x0000ffff);
+	gr_def(ctx, 0x401b68, 0x435185d6);
+	gr_def(ctx, 0x401b6c, 0x2155b699);
+	gr_def(ctx, 0x401b70, 0xfedcba98);
+	gr_def(ctx, 0x401b74, 0x00000098);
+	gr_def(ctx, 0x401b84, 0xffffffff);
+	gr_def(ctx, 0x401b88, 0x00ff7000);
+	gr_def(ctx, 0x401b8c, 0x0000ffff);
+	if (dev_priv->chipset != 0x44 && dev_priv->chipset != 0x4a &&
+	    dev_priv->chipset != 0x4e)
+		cp_ctx(ctx, 0x401b94, 1);
+	cp_ctx(ctx, 0x401b98, 8);
+	gr_def(ctx, 0x401b9c, 0x00ff0000);
+	cp_ctx(ctx, 0x401bc0, 9);
+	gr_def(ctx, 0x401be0, 0x00ffff00);
+	cp_ctx(ctx, 0x401c00, 192);
+	for (i = 0; i < 16; i++) { /* fragment texture units */
+		gr_def(ctx, 0x401c40 + (i * 4), 0x00018488);
+		gr_def(ctx, 0x401c80 + (i * 4), 0x00028202);
+		gr_def(ctx, 0x401d00 + (i * 4), 0x0000aae4);
+		gr_def(ctx, 0x401d40 + (i * 4), 0x01012000);
+		gr_def(ctx, 0x401d80 + (i * 4), 0x00080008);
+		gr_def(ctx, 0x401e00 + (i * 4), 0x00100008);
+	}
+	for (i = 0; i < 4; i++) { /* vertex texture units */
+		gr_def(ctx, 0x401e90 + (i * 4), 0x0001bc80);
+		gr_def(ctx, 0x401ea0 + (i * 4), 0x00000202);
+		gr_def(ctx, 0x401ec0 + (i * 4), 0x00000008);
+		gr_def(ctx, 0x401ee0 + (i * 4), 0x00080008);
+	}
+	cp_ctx(ctx, 0x400f5c, 3);
+	gr_def(ctx, 0x400f5c, 0x00000002);
+	cp_ctx(ctx, 0x400f84, 1);
+}
+
+static void
+nv40_graph_construct_state3d_2(struct nouveau_grctx *ctx)
+{
+	struct drm_nouveau_private *dev_priv = ctx->dev->dev_private;
+	int i;
+
+	cp_ctx(ctx, 0x402000, 1);
+	cp_ctx(ctx, 0x402404, dev_priv->chipset == 0x40 ? 1 : 2);
+	switch (dev_priv->chipset) {
+	case 0x40:
+		gr_def(ctx, 0x402404, 0x00000001);
+		break;
+	case 0x4c:
+	case 0x4e:
+	case 0x67:
+		gr_def(ctx, 0x402404, 0x00000020);
+		break;
+	case 0x46:
+	case 0x49:
+	case 0x4b:
+		gr_def(ctx, 0x402404, 0x00000421);
+		break;
+	default:
+		gr_def(ctx, 0x402404, 0x00000021);
+	}
+	if (dev_priv->chipset != 0x40)
+		gr_def(ctx, 0x402408, 0x030c30c3);
+	switch (dev_priv->chipset) {
+	case 0x44:
+	case 0x46:
+	case 0x4a:
+	case 0x4c:
+	case 0x4e:
+	case 0x67:
+		cp_ctx(ctx, 0x402440, 1);
+		gr_def(ctx, 0x402440, 0x00011001);
+		break;
+	default:
+		break;
+	}
+	cp_ctx(ctx, 0x402480, dev_priv->chipset == 0x40 ? 8 : 9);
+	gr_def(ctx, 0x402488, 0x3e020200);
+	gr_def(ctx, 0x40248c, 0x00ffffff);
+	switch (dev_priv->chipset) {
+	case 0x40:
+		gr_def(ctx, 0x402490, 0x60103f00);
+		break;
+	case 0x47:
+		gr_def(ctx, 0x402490, 0x40103f00);
+		break;
+	case 0x41:
+	case 0x42:
+	case 0x49:
+	case 0x4b:
+		gr_def(ctx, 0x402490, 0x20103f00);
+		break;
+	default:
+		gr_def(ctx, 0x402490, 0x0c103f00);
+		break;
+	}
+	gr_def(ctx, 0x40249c, dev_priv->chipset <= 0x43 ?
+			      0x00020000 : 0x00040000);
+	cp_ctx(ctx, 0x402500, 31);
+	gr_def(ctx, 0x402530, 0x00008100);
+	if (dev_priv->chipset == 0x40)
+		cp_ctx(ctx, 0x40257c, 6);
+	cp_ctx(ctx, 0x402594, 16);
+	cp_ctx(ctx, 0x402800, 17);
+	gr_def(ctx, 0x402800, 0x00000001);
+	switch (dev_priv->chipset) {
+	case 0x47:
+	case 0x49:
+	case 0x4b:
+		cp_ctx(ctx, 0x402864, 1);
+		gr_def(ctx, 0x402864, 0x00001001);
+		cp_ctx(ctx, 0x402870, 3);
+		gr_def(ctx, 0x402878, 0x00000003);
+		if (dev_priv->chipset != 0x47) { /* belong at end!! */
+			cp_ctx(ctx, 0x402900, 1);
+			cp_ctx(ctx, 0x402940, 1);
+			cp_ctx(ctx, 0x402980, 1);
+			cp_ctx(ctx, 0x4029c0, 1);
+			cp_ctx(ctx, 0x402a00, 1);
+			cp_ctx(ctx, 0x402a40, 1);
+			cp_ctx(ctx, 0x402a80, 1);
+			cp_ctx(ctx, 0x402ac0, 1);
+		}
+		break;
+	case 0x40:
+		cp_ctx(ctx, 0x402844, 1);
+		gr_def(ctx, 0x402844, 0x00000001);
+		cp_ctx(ctx, 0x402850, 1);
+		break;
+	default:
+		cp_ctx(ctx, 0x402844, 1);
+		gr_def(ctx, 0x402844, 0x00001001);
+		cp_ctx(ctx, 0x402850, 2);
+		gr_def(ctx, 0x402854, 0x00000003);
+		break;
+	}
+
+	cp_ctx(ctx, 0x402c00, 4);
+	gr_def(ctx, 0x402c00, dev_priv->chipset == 0x40 ?
+			      0x80800001 : 0x00888001);
+	switch (dev_priv->chipset) {
+	case 0x47:
+	case 0x49:
+	case 0x4b:
+		cp_ctx(ctx, 0x402c20, 40);
+		for (i = 0; i < 32; i++)
+			gr_def(ctx, 0x402c40 + (i * 4), 0xffffffff);
+		cp_ctx(ctx, 0x4030b8, 13);
+		gr_def(ctx, 0x4030dc, 0x00000005);
+		gr_def(ctx, 0x4030e8, 0x0000ffff);
+		break;
+	default:
+		cp_ctx(ctx, 0x402c10, 4);
+		if (dev_priv->chipset == 0x40)
+			cp_ctx(ctx, 0x402c20, 36);
+		else
+		if (dev_priv->chipset <= 0x42)
+			cp_ctx(ctx, 0x402c20, 24);
+		else
+		if (dev_priv->chipset <= 0x4a)
+			cp_ctx(ctx, 0x402c20, 16);
+		else
+			cp_ctx(ctx, 0x402c20, 8);
+		cp_ctx(ctx, 0x402cb0, dev_priv->chipset == 0x40 ? 12 : 13);
+		gr_def(ctx, 0x402cd4, 0x00000005);
+		if (dev_priv->chipset != 0x40)
+			gr_def(ctx, 0x402ce0, 0x0000ffff);
+		break;
+	}
+
+	cp_ctx(ctx, 0x403400, dev_priv->chipset == 0x40 ? 4 : 3);
+	cp_ctx(ctx, 0x403410, dev_priv->chipset == 0x40 ? 4 : 3);
+	cp_ctx(ctx, 0x403420, nv40_graph_vs_count(ctx->dev));
+	for (i = 0; i < nv40_graph_vs_count(ctx->dev); i++)
+		gr_def(ctx, 0x403420 + (i * 4), 0x00005555);
+
+	if (dev_priv->chipset != 0x40) {
+		cp_ctx(ctx, 0x403600, 1);
+		gr_def(ctx, 0x403600, 0x00000001);
+	}
+	cp_ctx(ctx, 0x403800, 1);
+
+	cp_ctx(ctx, 0x403c18, 1);
+	gr_def(ctx, 0x403c18, 0x00000001);
+	switch (dev_priv->chipset) {
+	case 0x46:
+	case 0x47:
+	case 0x49:
+	case 0x4b:
+		cp_ctx(ctx, 0x405018, 1);
+		gr_def(ctx, 0x405018, 0x08e00001);
+		cp_ctx(ctx, 0x405c24, 1);
+		gr_def(ctx, 0x405c24, 0x000e3000);
+		break;
+	}
+	if (dev_priv->chipset != 0x4e)
+		cp_ctx(ctx, 0x405800, 11);
+	cp_ctx(ctx, 0x407000, 1);
+}
+
+static void
+nv40_graph_construct_state3d_3(struct nouveau_grctx *ctx)
+{
+	int len = nv40_graph_4097(ctx->dev) ? 0x0684 : 0x0084;
+
+	cp_out (ctx, 0x300000);
+	cp_lsr (ctx, len - 4);
+	cp_bra (ctx, SWAP_DIRECTION, SAVE, cp_swap_state3d_3_is_save);
+	cp_lsr (ctx, len);
+	cp_name(ctx, cp_swap_state3d_3_is_save);
+	cp_out (ctx, 0x800001);
+
+	ctx->ctxvals_pos += len;
+}
+
+static void
+nv40_graph_construct_shader(struct nouveau_grctx *ctx)
+{
+	struct drm_device *dev = ctx->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_gpuobj *obj = ctx->data;
+	int vs, vs_nr, vs_len, vs_nr_b0, vs_nr_b1, b0_offset, b1_offset;
+	int offset, i;
+
+	vs_nr    = nv40_graph_vs_count(ctx->dev);
+	vs_nr_b0 = 363;
+	vs_nr_b1 = dev_priv->chipset == 0x40 ? 128 : 64;
+	if (dev_priv->chipset == 0x40) {
+		b0_offset = 0x2200/4; /* 33a0 */
+		b1_offset = 0x55a0/4; /* 1500 */
+		vs_len = 0x6aa0/4;
+	} else
+	if (dev_priv->chipset == 0x41 || dev_priv->chipset == 0x42) {
+		b0_offset = 0x2200/4; /* 2200 */
+		b1_offset = 0x4400/4; /* 0b00 */
+		vs_len = 0x4f00/4;
+	} else {
+		b0_offset = 0x1d40/4; /* 2200 */
+		b1_offset = 0x3f40/4; /* 0b00 : 0a40 */
+		vs_len = nv40_graph_4097(dev) ? 0x4a40/4 : 0x4980/4;
+	}
+
+	cp_lsr(ctx, vs_len * vs_nr + 0x300/4);
+	cp_out(ctx, nv40_graph_4097(dev) ? 0x800041 : 0x800029);
+
+	offset = ctx->ctxvals_pos;
+	ctx->ctxvals_pos += (0x0300/4 + (vs_nr * vs_len));
+
+	if (ctx->mode != NOUVEAU_GRCTX_VALS)
+		return;
+
+	offset += 0x0280/4;
+	for (i = 0; i < 16; i++, offset += 2)
+		nv_wo32(dev, obj, offset, 0x3f800000);
+
+	for (vs = 0; vs < vs_nr; vs++, offset += vs_len) {
+		for (i = 0; i < vs_nr_b0 * 6; i += 6)
+			nv_wo32(dev, obj, offset + b0_offset + i, 0x00000001);
+		for (i = 0; i < vs_nr_b1 * 4; i += 4)
+			nv_wo32(dev, obj, offset + b1_offset + i, 0x3f800000);
+	}
+}
+
+void
+nv40_grctx_init(struct nouveau_grctx *ctx)
+{
+	/* decide whether we're loading/unloading the context */
+	cp_bra (ctx, AUTO_SAVE, PENDING, cp_setup_save);
+	cp_bra (ctx, USER_SAVE, PENDING, cp_setup_save);
+
+	cp_name(ctx, cp_check_load);
+	cp_bra (ctx, AUTO_LOAD, PENDING, cp_setup_auto_load);
+	cp_bra (ctx, USER_LOAD, PENDING, cp_setup_load);
+	cp_bra (ctx, ALWAYS, TRUE, cp_exit);
+
+	/* setup for context load */
+	cp_name(ctx, cp_setup_auto_load);
+	cp_wait(ctx, STATUS, IDLE);
+	cp_out (ctx, CP_NEXT_TO_SWAP);
+	cp_name(ctx, cp_setup_load);
+	cp_wait(ctx, STATUS, IDLE);
+	cp_set (ctx, SWAP_DIRECTION, LOAD);
+	cp_out (ctx, 0x00910880); /* ?? */
+	cp_out (ctx, 0x00901ffe); /* ?? */
+	cp_out (ctx, 0x01940000); /* ?? */
+	cp_lsr (ctx, 0x20);
+	cp_out (ctx, 0x0060000b); /* ?? */
+	cp_wait(ctx, UNK57, CLEAR);
+	cp_out (ctx, 0x0060000c); /* ?? */
+	cp_bra (ctx, ALWAYS, TRUE, cp_swap_state);
+
+	/* setup for context save */
+	cp_name(ctx, cp_setup_save);
+	cp_set (ctx, SWAP_DIRECTION, SAVE);
+
+	/* general PGRAPH state */
+	cp_name(ctx, cp_swap_state);
+	cp_pos (ctx, 0x00020/4);
+	nv40_graph_construct_general(ctx);
+	cp_wait(ctx, STATUS, IDLE);
+
+	/* 3D state, block 1 */
+	cp_bra (ctx, UNK54, CLEAR, cp_prepare_exit);
+	nv40_graph_construct_state3d(ctx);
+	cp_wait(ctx, STATUS, IDLE);
+
+	/* 3D state, block 2 */
+	nv40_graph_construct_state3d_2(ctx);
+
+	/* Some other block of "random" state */
+	nv40_graph_construct_state3d_3(ctx);
+
+	/* Per-vertex shader state */
+	cp_pos (ctx, ctx->ctxvals_pos);
+	nv40_graph_construct_shader(ctx);
+
+	/* pre-exit state updates */
+	cp_name(ctx, cp_prepare_exit);
+	cp_bra (ctx, SWAP_DIRECTION, SAVE, cp_check_load);
+	cp_bra (ctx, USER_SAVE, PENDING, cp_exit);
+	cp_out (ctx, CP_NEXT_TO_CURRENT);
+
+	cp_name(ctx, cp_exit);
+	cp_set (ctx, USER_SAVE, NOT_PENDING);
+	cp_set (ctx, USER_LOAD, NOT_PENDING);
+	cp_out (ctx, CP_END);
+}
+
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_channel.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_channel.c
@@ -0,0 +1,430 @@
+/*
+ * Copyright 2005-2006 Stephane Marchesin
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#include "drmP.h"
+#include "drm.h"
+#include "nouveau_drv.h"
+#include "nouveau_drm.h"
+#include "nouveau_dma.h"
+
+static int
+nouveau_channel_pushbuf_ctxdma_init(struct nouveau_channel *chan)
+{
+	struct drm_device *dev = chan->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_bo *pb = chan->pushbuf_bo;
+	struct nouveau_gpuobj *pushbuf = NULL;
+	uint32_t start = pb->bo.mem.mm_node->start << PAGE_SHIFT;
+	int ret;
+
+	if (pb->bo.mem.mem_type == TTM_PL_TT) {
+		ret = nouveau_gpuobj_gart_dma_new(chan, 0,
+						  dev_priv->gart_info.aper_size,
+						  NV_DMA_ACCESS_RO, &pushbuf,
+						  NULL);
+		chan->pushbuf_base = start;
+	} else
+	if (dev_priv->card_type != NV_04) {
+		ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY, 0,
+					     dev_priv->fb_available_size,
+					     NV_DMA_ACCESS_RO,
+					     NV_DMA_TARGET_VIDMEM, &pushbuf);
+		chan->pushbuf_base = start;
+	} else {
+		/* NV04 cmdbuf hack, from original ddx.. not sure of it's
+		 * exact reason for existing :)  PCI access to cmdbuf in
+		 * VRAM.
+		 */
+		ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY,
+					     drm_get_resource_start(dev, 1),
+					     dev_priv->fb_available_size,
+					     NV_DMA_ACCESS_RO,
+					     NV_DMA_TARGET_PCI, &pushbuf);
+		chan->pushbuf_base = start;
+	}
+
+	ret = nouveau_gpuobj_ref_add(dev, chan, 0, pushbuf, &chan->pushbuf);
+	if (ret) {
+		NV_ERROR(dev, "Error referencing pushbuf ctxdma: %d\n", ret);
+		if (pushbuf != dev_priv->gart_info.sg_ctxdma)
+			nouveau_gpuobj_del(dev, &pushbuf);
+		return ret;
+	}
+
+	return 0;
+}
+
+static struct nouveau_bo *
+nouveau_channel_user_pushbuf_alloc(struct drm_device *dev)
+{
+	struct nouveau_bo *pushbuf = NULL;
+	int location, ret;
+
+	if (nouveau_vram_pushbuf)
+		location = TTM_PL_FLAG_VRAM;
+	else
+		location = TTM_PL_FLAG_TT;
+
+	ret = nouveau_bo_new(dev, NULL, 65536, 0, location, 0, 0x0000, false,
+			     true, &pushbuf);
+	if (ret) {
+		NV_ERROR(dev, "error allocating DMA push buffer: %d\n", ret);
+		return NULL;
+	}
+
+	ret = nouveau_bo_pin(pushbuf, location);
+	if (ret) {
+		NV_ERROR(dev, "error pinning DMA push buffer: %d\n", ret);
+		nouveau_bo_ref(NULL, &pushbuf);
+		return NULL;
+	}
+
+	return pushbuf;
+}
+
+/* allocates and initializes a fifo for user space consumption */
+int
+nouveau_channel_alloc(struct drm_device *dev, struct nouveau_channel **chan_ret,
+		      struct drm_file *file_priv,
+		      uint32_t vram_handle, uint32_t tt_handle)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
+	struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
+	struct nouveau_channel *chan;
+	int channel, user;
+	int ret;
+
+	/*
+	 * Alright, here is the full story
+	 * Nvidia cards have multiple hw fifo contexts (praise them for that,
+	 * no complicated crash-prone context switches)
+	 * We allocate a new context for each app and let it write to it
+	 * directly (woo, full userspace command submission !)
+	 * When there are no more contexts, you lost
+	 */
+	for (channel = 0; channel < pfifo->channels; channel++) {
+		if (dev_priv->fifos[channel] == NULL)
+			break;
+	}
+
+	/* no more fifos. you lost. */
+	if (channel == pfifo->channels)
+		return -EINVAL;
+
+	dev_priv->fifos[channel] = kzalloc(sizeof(struct nouveau_channel),
+					   GFP_KERNEL);
+	if (!dev_priv->fifos[channel])
+		return -ENOMEM;
+	dev_priv->fifo_alloc_count++;
+	chan = dev_priv->fifos[channel];
+	INIT_LIST_HEAD(&chan->nvsw.vbl_wait);
+	INIT_LIST_HEAD(&chan->fence.pending);
+	chan->dev = dev;
+	chan->id = channel;
+	chan->file_priv = file_priv;
+	chan->vram_handle = vram_handle;
+	chan->gart_handle = tt_handle;
+
+	NV_INFO(dev, "Allocating FIFO number %d\n", channel);
+
+	/* Allocate DMA push buffer */
+	chan->pushbuf_bo = nouveau_channel_user_pushbuf_alloc(dev);
+	if (!chan->pushbuf_bo) {
+		ret = -ENOMEM;
+		NV_ERROR(dev, "pushbuf %d\n", ret);
+		nouveau_channel_free(chan);
+		return ret;
+	}
+
+	nouveau_dma_pre_init(chan);
+
+	/* Locate channel's user control regs */
+	if (dev_priv->card_type < NV_40)
+		user = NV03_USER(channel);
+	else
+	if (dev_priv->card_type < NV_50)
+		user = NV40_USER(channel);
+	else
+		user = NV50_USER(channel);
+
+	chan->user = ioremap(pci_resource_start(dev->pdev, 0) + user,
+								PAGE_SIZE);
+	if (!chan->user) {
+		NV_ERROR(dev, "ioremap of regs failed.\n");
+		nouveau_channel_free(chan);
+		return -ENOMEM;
+	}
+	chan->user_put = 0x40;
+	chan->user_get = 0x44;
+
+	/* Allocate space for per-channel fixed notifier memory */
+	ret = nouveau_notifier_init_channel(chan);
+	if (ret) {
+		NV_ERROR(dev, "ntfy %d\n", ret);
+		nouveau_channel_free(chan);
+		return ret;
+	}
+
+	/* Setup channel's default objects */
+	ret = nouveau_gpuobj_channel_init(chan, vram_handle, tt_handle);
+	if (ret) {
+		NV_ERROR(dev, "gpuobj %d\n", ret);
+		nouveau_channel_free(chan);
+		return ret;
+	}
+
+	/* Create a dma object for the push buffer */
+	ret = nouveau_channel_pushbuf_ctxdma_init(chan);
+	if (ret) {
+		NV_ERROR(dev, "pbctxdma %d\n", ret);
+		nouveau_channel_free(chan);
+		return ret;
+	}
+
+	/* disable the fifo caches */
+	pfifo->reassign(dev, false);
+
+	/* Create a graphics context for new channel */
+	ret = pgraph->create_context(chan);
+	if (ret) {
+		nouveau_channel_free(chan);
+		return ret;
+	}
+
+	/* Construct inital RAMFC for new channel */
+	ret = pfifo->create_context(chan);
+	if (ret) {
+		nouveau_channel_free(chan);
+		return ret;
+	}
+
+	pfifo->reassign(dev, true);
+
+	ret = nouveau_dma_init(chan);
+	if (!ret)
+		ret = nouveau_fence_init(chan);
+	if (ret) {
+		nouveau_channel_free(chan);
+		return ret;
+	}
+
+	nouveau_debugfs_channel_init(chan);
+
+	NV_INFO(dev, "%s: initialised FIFO %d\n", __func__, channel);
+	*chan_ret = chan;
+	return 0;
+}
+
+/* stops a fifo */
+void
+nouveau_channel_free(struct nouveau_channel *chan)
+{
+	struct drm_device *dev = chan->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
+	struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
+	unsigned long flags;
+	int ret;
+
+	NV_INFO(dev, "%s: freeing fifo %d\n", __func__, chan->id);
+
+	nouveau_debugfs_channel_fini(chan);
+
+	/* Give outstanding push buffers a chance to complete */
+	spin_lock_irqsave(&chan->fence.lock, flags);
+	nouveau_fence_update(chan);
+	spin_unlock_irqrestore(&chan->fence.lock, flags);
+	if (chan->fence.sequence != chan->fence.sequence_ack) {
+		struct nouveau_fence *fence = NULL;
+
+		ret = nouveau_fence_new(chan, &fence, true);
+		if (ret == 0) {
+			ret = nouveau_fence_wait(fence, NULL, false, false);
+			nouveau_fence_unref((void *)&fence);
+		}
+
+		if (ret)
+			NV_ERROR(dev, "Failed to idle channel %d.\n", chan->id);
+	}
+
+	/* Ensure all outstanding fences are signaled.  They should be if the
+	 * above attempts at idling were OK, but if we failed this'll tell TTM
+	 * we're done with the buffers.
+	 */
+	nouveau_fence_fini(chan);
+
+	/* Ensure the channel is no longer active on the GPU */
+	pfifo->reassign(dev, false);
+
+	pgraph->fifo_access(dev, false);
+	if (pgraph->channel(dev) == chan)
+		pgraph->unload_context(dev);
+	pgraph->destroy_context(chan);
+	pgraph->fifo_access(dev, true);
+
+	if (pfifo->channel_id(dev) == chan->id) {
+		pfifo->disable(dev);
+		pfifo->unload_context(dev);
+		pfifo->enable(dev);
+	}
+	pfifo->destroy_context(chan);
+
+	pfifo->reassign(dev, true);
+
+	/* Release the channel's resources */
+	nouveau_gpuobj_ref_del(dev, &chan->pushbuf);
+	if (chan->pushbuf_bo) {
+		nouveau_bo_unpin(chan->pushbuf_bo);
+		nouveau_bo_ref(NULL, &chan->pushbuf_bo);
+	}
+	nouveau_gpuobj_channel_takedown(chan);
+	nouveau_notifier_takedown_channel(chan);
+	if (chan->user)
+		iounmap(chan->user);
+
+	dev_priv->fifos[chan->id] = NULL;
+	dev_priv->fifo_alloc_count--;
+	kfree(chan);
+}
+
+/* cleans up all the fifos from file_priv */
+void
+nouveau_channel_cleanup(struct drm_device *dev, struct drm_file *file_priv)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_engine *engine = &dev_priv->engine;
+	int i;
+
+	NV_DEBUG(dev, "clearing FIFO enables from file_priv\n");
+	for (i = 0; i < engine->fifo.channels; i++) {
+		struct nouveau_channel *chan = dev_priv->fifos[i];
+
+		if (chan && chan->file_priv == file_priv)
+			nouveau_channel_free(chan);
+	}
+}
+
+int
+nouveau_channel_owner(struct drm_device *dev, struct drm_file *file_priv,
+		      int channel)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_engine *engine = &dev_priv->engine;
+
+	if (channel >= engine->fifo.channels)
+		return 0;
+	if (dev_priv->fifos[channel] == NULL)
+		return 0;
+
+	return (dev_priv->fifos[channel]->file_priv == file_priv);
+}
+
+/***********************************
+ * ioctls wrapping the functions
+ ***********************************/
+
+static int
+nouveau_ioctl_fifo_alloc(struct drm_device *dev, void *data,
+			 struct drm_file *file_priv)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct drm_nouveau_channel_alloc *init = data;
+	struct nouveau_channel *chan;
+	int ret;
+
+	NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
+
+	if (dev_priv->engine.graph.accel_blocked)
+		return -ENODEV;
+
+	if (init->fb_ctxdma_handle == ~0 || init->tt_ctxdma_handle == ~0)
+		return -EINVAL;
+
+	ret = nouveau_channel_alloc(dev, &chan, file_priv,
+				    init->fb_ctxdma_handle,
+				    init->tt_ctxdma_handle);
+	if (ret)
+		return ret;
+	init->channel  = chan->id;
+
+	init->subchan[0].handle = NvM2MF;
+	if (dev_priv->card_type < NV_50)
+		init->subchan[0].grclass = 0x0039;
+	else
+		init->subchan[0].grclass = 0x5039;
+	init->subchan[1].handle = NvSw;
+	init->subchan[1].grclass = NV_SW;
+	init->nr_subchan = 2;
+
+	/* Named memory object area */
+	ret = drm_gem_handle_create(file_priv, chan->notifier_bo->gem,
+				    &init->notifier_handle);
+	if (ret) {
+		nouveau_channel_free(chan);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int
+nouveau_ioctl_fifo_free(struct drm_device *dev, void *data,
+			struct drm_file *file_priv)
+{
+	struct drm_nouveau_channel_free *cfree = data;
+	struct nouveau_channel *chan;
+
+	NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
+	NOUVEAU_GET_USER_CHANNEL_WITH_RETURN(cfree->channel, file_priv, chan);
+
+	nouveau_channel_free(chan);
+	return 0;
+}
+
+/***********************************
+ * finally, the ioctl table
+ ***********************************/
+
+struct drm_ioctl_desc nouveau_ioctls[] = {
+	DRM_IOCTL_DEF(DRM_NOUVEAU_CARD_INIT, nouveau_ioctl_card_init, DRM_AUTH),
+	DRM_IOCTL_DEF(DRM_NOUVEAU_GETPARAM, nouveau_ioctl_getparam, DRM_AUTH),
+	DRM_IOCTL_DEF(DRM_NOUVEAU_SETPARAM, nouveau_ioctl_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
+	DRM_IOCTL_DEF(DRM_NOUVEAU_CHANNEL_ALLOC, nouveau_ioctl_fifo_alloc, DRM_AUTH),
+	DRM_IOCTL_DEF(DRM_NOUVEAU_CHANNEL_FREE, nouveau_ioctl_fifo_free, DRM_AUTH),
+	DRM_IOCTL_DEF(DRM_NOUVEAU_GROBJ_ALLOC, nouveau_ioctl_grobj_alloc, DRM_AUTH),
+	DRM_IOCTL_DEF(DRM_NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_ioctl_notifier_alloc, DRM_AUTH),
+	DRM_IOCTL_DEF(DRM_NOUVEAU_GPUOBJ_FREE, nouveau_ioctl_gpuobj_free, DRM_AUTH),
+	DRM_IOCTL_DEF(DRM_NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_AUTH),
+	DRM_IOCTL_DEF(DRM_NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_AUTH),
+	DRM_IOCTL_DEF(DRM_NOUVEAU_GEM_PUSHBUF_CALL, nouveau_gem_ioctl_pushbuf_call, DRM_AUTH),
+	DRM_IOCTL_DEF(DRM_NOUVEAU_GEM_PIN, nouveau_gem_ioctl_pin, DRM_AUTH),
+	DRM_IOCTL_DEF(DRM_NOUVEAU_GEM_UNPIN, nouveau_gem_ioctl_unpin, DRM_AUTH),
+	DRM_IOCTL_DEF(DRM_NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_AUTH),
+	DRM_IOCTL_DEF(DRM_NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_AUTH),
+	DRM_IOCTL_DEF(DRM_NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_AUTH),
+	DRM_IOCTL_DEF(DRM_NOUVEAU_GEM_PUSHBUF_CALL2, nouveau_gem_ioctl_pushbuf_call2, DRM_AUTH),
+};
+
+int nouveau_max_ioctl = DRM_ARRAY_SIZE(nouveau_ioctls);
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv04_crtc.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv04_crtc.c
@@ -0,0 +1,1002 @@
+/*
+ * Copyright 1993-2003 NVIDIA, Corporation
+ * Copyright 2006 Dave Airlie
+ * Copyright 2007 Maarten Maathuis
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#include "drmP.h"
+#include "drm_crtc_helper.h"
+
+#include "nouveau_drv.h"
+#include "nouveau_encoder.h"
+#include "nouveau_connector.h"
+#include "nouveau_crtc.h"
+#include "nouveau_fb.h"
+#include "nouveau_hw.h"
+#include "nvreg.h"
+
+static int
+nv04_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
+			struct drm_framebuffer *old_fb);
+
+static void
+crtc_wr_cio_state(struct drm_crtc *crtc, struct nv04_crtc_reg *crtcstate, int index)
+{
+	NVWriteVgaCrtc(crtc->dev, nouveau_crtc(crtc)->index, index,
+		       crtcstate->CRTC[index]);
+}
+
+static void nv_crtc_set_digital_vibrance(struct drm_crtc *crtc, int level)
+{
+	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
+	struct drm_nouveau_private *dev_priv = crtc->dev->dev_private;
+	struct nv04_crtc_reg *regp = &dev_priv->mode_reg.crtc_reg[nv_crtc->index];
+
+	regp->CRTC[NV_CIO_CRE_CSB] = nv_crtc->saturation = level;
+	if (nv_crtc->saturation && nv_gf4_disp_arch(crtc->dev)) {
+		regp->CRTC[NV_CIO_CRE_CSB] = 0x80;
+		regp->CRTC[NV_CIO_CRE_5B] = nv_crtc->saturation << 2;
+		crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_5B);
+	}
+	crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_CSB);
+}
+
+static void nv_crtc_set_image_sharpening(struct drm_crtc *crtc, int level)
+{
+	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
+	struct drm_nouveau_private *dev_priv = crtc->dev->dev_private;
+	struct nv04_crtc_reg *regp = &dev_priv->mode_reg.crtc_reg[nv_crtc->index];
+
+	nv_crtc->sharpness = level;
+	if (level < 0)	/* blur is in hw range 0x3f -> 0x20 */
+		level += 0x40;
+	regp->ramdac_634 = level;
+	NVWriteRAMDAC(crtc->dev, nv_crtc->index, NV_PRAMDAC_634, regp->ramdac_634);
+}
+
+#define PLLSEL_VPLL1_MASK				\
+	(NV_PRAMDAC_PLL_COEFF_SELECT_SOURCE_PROG_VPLL	\
+	 | NV_PRAMDAC_PLL_COEFF_SELECT_VCLK_RATIO_DB2)
+#define PLLSEL_VPLL2_MASK				\
+	(NV_PRAMDAC_PLL_COEFF_SELECT_PLL_SOURCE_VPLL2		\
+	 | NV_PRAMDAC_PLL_COEFF_SELECT_VCLK2_RATIO_DB2)
+#define PLLSEL_TV_MASK					\
+	(NV_PRAMDAC_PLL_COEFF_SELECT_TV_VSCLK1		\
+	 | NV_PRAMDAC_PLL_COEFF_SELECT_TV_PCLK1		\
+	 | NV_PRAMDAC_PLL_COEFF_SELECT_TV_VSCLK2	\
+	 | NV_PRAMDAC_PLL_COEFF_SELECT_TV_PCLK2)
+
+/* NV4x 0x40.. pll notes:
+ * gpu pll: 0x4000 + 0x4004
+ * ?gpu? pll: 0x4008 + 0x400c
+ * vpll1: 0x4010 + 0x4014
+ * vpll2: 0x4018 + 0x401c
+ * mpll: 0x4020 + 0x4024
+ * mpll: 0x4038 + 0x403c
+ *
+ * the first register of each pair has some unknown details:
+ * bits 0-7: redirected values from elsewhere? (similar to PLL_SETUP_CONTROL?)
+ * bits 20-23: (mpll) something to do with post divider?
+ * bits 28-31: related to single stage mode? (bit 8/12)
+ */
+
+static void nv_crtc_calc_state_ext(struct drm_crtc *crtc, struct drm_display_mode * mode, int dot_clock)
+{
+	struct drm_device *dev = crtc->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
+	struct nv04_mode_state *state = &dev_priv->mode_reg;
+	struct nv04_crtc_reg *regp = &state->crtc_reg[nv_crtc->index];
+	struct nouveau_pll_vals *pv = &regp->pllvals;
+	struct pll_lims pll_lim;
+
+	if (get_pll_limits(dev, nv_crtc->index ? VPLL2 : VPLL1, &pll_lim))
+		return;
+
+	/* NM2 == 0 is used to determine single stage mode on two stage plls */
+	pv->NM2 = 0;
+
+	/* for newer nv4x the blob uses only the first stage of the vpll below a
+	 * certain clock.  for a certain nv4b this is 150MHz.  since the max
+	 * output frequency of the first stage for this card is 300MHz, it is
+	 * assumed the threshold is given by vco1 maxfreq/2
+	 */
+	/* for early nv4x, specifically nv40 and *some* nv43 (devids 0 and 6,
+	 * not 8, others unknown), the blob always uses both plls.  no problem
+	 * has yet been observed in allowing the use a single stage pll on all
+	 * nv43 however.  the behaviour of single stage use is untested on nv40
+	 */
+	if (dev_priv->chipset > 0x40 && dot_clock <= (pll_lim.vco1.maxfreq / 2))
+		memset(&pll_lim.vco2, 0, sizeof(pll_lim.vco2));
+
+	if (!nouveau_calc_pll_mnp(dev, &pll_lim, dot_clock, pv))
+		return;
+
+	state->pllsel &= PLLSEL_VPLL1_MASK | PLLSEL_VPLL2_MASK | PLLSEL_TV_MASK;
+
+	/* The blob uses this always, so let's do the same */
+	if (dev_priv->card_type == NV_40)
+		state->pllsel |= NV_PRAMDAC_PLL_COEFF_SELECT_USE_VPLL2_TRUE;
+	/* again nv40 and some nv43 act more like nv3x as described above */
+	if (dev_priv->chipset < 0x41)
+		state->pllsel |= NV_PRAMDAC_PLL_COEFF_SELECT_SOURCE_PROG_MPLL |
+				 NV_PRAMDAC_PLL_COEFF_SELECT_SOURCE_PROG_NVPLL;
+	state->pllsel |= nv_crtc->index ? PLLSEL_VPLL2_MASK : PLLSEL_VPLL1_MASK;
+
+	if (pv->NM2)
+		NV_DEBUG_KMS(dev, "vpll: n1 %d n2 %d m1 %d m2 %d log2p %d\n",
+			 pv->N1, pv->N2, pv->M1, pv->M2, pv->log2P);
+	else
+		NV_DEBUG_KMS(dev, "vpll: n %d m %d log2p %d\n",
+			 pv->N1, pv->M1, pv->log2P);
+
+	nv_crtc->cursor.set_offset(nv_crtc, nv_crtc->cursor.offset);
+}
+
+static void
+nv_crtc_dpms(struct drm_crtc *crtc, int mode)
+{
+	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
+	struct drm_device *dev = crtc->dev;
+	unsigned char seq1 = 0, crtc17 = 0;
+	unsigned char crtc1A;
+
+	NV_DEBUG_KMS(dev, "Setting dpms mode %d on CRTC %d\n", mode,
+							nv_crtc->index);
+
+	if (nv_crtc->last_dpms == mode) /* Don't do unnecesary mode changes. */
+		return;
+
+	nv_crtc->last_dpms = mode;
+
+	if (nv_two_heads(dev))
+		NVSetOwner(dev, nv_crtc->index);
+
+	/* nv4ref indicates these two RPC1 bits inhibit h/v sync */
+	crtc1A = NVReadVgaCrtc(dev, nv_crtc->index,
+					NV_CIO_CRE_RPC1_INDEX) & ~0xC0;
+	switch (mode) {
+	case DRM_MODE_DPMS_STANDBY:
+		/* Screen: Off; HSync: Off, VSync: On -- Not Supported */
+		seq1 = 0x20;
+		crtc17 = 0x80;
+		crtc1A |= 0x80;
+		break;
+	case DRM_MODE_DPMS_SUSPEND:
+		/* Screen: Off; HSync: On, VSync: Off -- Not Supported */
+		seq1 = 0x20;
+		crtc17 = 0x80;
+		crtc1A |= 0x40;
+		break;
+	case DRM_MODE_DPMS_OFF:
+		/* Screen: Off; HSync: Off, VSync: Off */
+		seq1 = 0x20;
+		crtc17 = 0x00;
+		crtc1A |= 0xC0;
+		break;
+	case DRM_MODE_DPMS_ON:
+	default:
+		/* Screen: On; HSync: On, VSync: On */
+		seq1 = 0x00;
+		crtc17 = 0x80;
+		break;
+	}
+
+	NVVgaSeqReset(dev, nv_crtc->index, true);
+	/* Each head has it's own sequencer, so we can turn it off when we want */
+	seq1 |= (NVReadVgaSeq(dev, nv_crtc->index, NV_VIO_SR_CLOCK_INDEX) & ~0x20);
+	NVWriteVgaSeq(dev, nv_crtc->index, NV_VIO_SR_CLOCK_INDEX, seq1);
+	crtc17 |= (NVReadVgaCrtc(dev, nv_crtc->index, NV_CIO_CR_MODE_INDEX) & ~0x80);
+	mdelay(10);
+	NVWriteVgaCrtc(dev, nv_crtc->index, NV_CIO_CR_MODE_INDEX, crtc17);
+	NVVgaSeqReset(dev, nv_crtc->index, false);
+
+	NVWriteVgaCrtc(dev, nv_crtc->index, NV_CIO_CRE_RPC1_INDEX, crtc1A);
+}
+
+static bool
+nv_crtc_mode_fixup(struct drm_crtc *crtc, struct drm_display_mode *mode,
+		   struct drm_display_mode *adjusted_mode)
+{
+	return true;
+}
+
+static void
+nv_crtc_mode_set_vga(struct drm_crtc *crtc, struct drm_display_mode *mode)
+{
+	struct drm_device *dev = crtc->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
+	struct nv04_crtc_reg *regp = &dev_priv->mode_reg.crtc_reg[nv_crtc->index];
+	struct drm_framebuffer *fb = crtc->fb;
+
+	/* Calculate our timings */
+	int horizDisplay	= (mode->crtc_hdisplay >> 3)		- 1;
+	int horizStart		= (mode->crtc_hsync_start >> 3) 	+ 1;
+	int horizEnd		= (mode->crtc_hsync_end >> 3)		+ 1;
+	int horizTotal		= (mode->crtc_htotal >> 3)		- 5;
+	int horizBlankStart	= (mode->crtc_hdisplay >> 3)		- 1;
+	int horizBlankEnd	= (mode->crtc_htotal >> 3)		- 1;
+	int vertDisplay		= mode->crtc_vdisplay			- 1;
+	int vertStart		= mode->crtc_vsync_start 		- 1;
+	int vertEnd		= mode->crtc_vsync_end			- 1;
+	int vertTotal		= mode->crtc_vtotal 			- 2;
+	int vertBlankStart	= mode->crtc_vdisplay 			- 1;
+	int vertBlankEnd	= mode->crtc_vtotal			- 1;
+
+	struct drm_encoder *encoder;
+	bool fp_output = false;
+
+	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
+		struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+
+		if (encoder->crtc == crtc &&
+		    (nv_encoder->dcb->type == OUTPUT_LVDS ||
+		     nv_encoder->dcb->type == OUTPUT_TMDS))
+			fp_output = true;
+	}
+
+	if (fp_output) {
+		vertStart = vertTotal - 3;
+		vertEnd = vertTotal - 2;
+		vertBlankStart = vertStart;
+		horizStart = horizTotal - 5;
+		horizEnd = horizTotal - 2;
+		horizBlankEnd = horizTotal + 4;
+#if 0
+		if (dev->overlayAdaptor && dev_priv->card_type >= NV_10)
+			/* This reportedly works around some video overlay bandwidth problems */
+			horizTotal += 2;
+#endif
+	}
+
+	if (mode->flags & DRM_MODE_FLAG_INTERLACE)
+		vertTotal |= 1;
+
+#if 0
+	ErrorF("horizDisplay: 0x%X \n", horizDisplay);
+	ErrorF("horizStart: 0x%X \n", horizStart);
+	ErrorF("horizEnd: 0x%X \n", horizEnd);
+	ErrorF("horizTotal: 0x%X \n", horizTotal);
+	ErrorF("horizBlankStart: 0x%X \n", horizBlankStart);
+	ErrorF("horizBlankEnd: 0x%X \n", horizBlankEnd);
+	ErrorF("vertDisplay: 0x%X \n", vertDisplay);
+	ErrorF("vertStart: 0x%X \n", vertStart);
+	ErrorF("vertEnd: 0x%X \n", vertEnd);
+	ErrorF("vertTotal: 0x%X \n", vertTotal);
+	ErrorF("vertBlankStart: 0x%X \n", vertBlankStart);
+	ErrorF("vertBlankEnd: 0x%X \n", vertBlankEnd);
+#endif
+
+	/*
+	* compute correct Hsync & Vsync polarity
+	*/
+	if ((mode->flags & (DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NHSYNC))
+		&& (mode->flags & (DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_NVSYNC))) {
+
+		regp->MiscOutReg = 0x23;
+		if (mode->flags & DRM_MODE_FLAG_NHSYNC)
+			regp->MiscOutReg |= 0x40;
+		if (mode->flags & DRM_MODE_FLAG_NVSYNC)
+			regp->MiscOutReg |= 0x80;
+	} else {
+		int vdisplay = mode->vdisplay;
+		if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
+			vdisplay *= 2;
+		if (mode->vscan > 1)
+			vdisplay *= mode->vscan;
+		if (vdisplay < 400)
+			regp->MiscOutReg = 0xA3;	/* +hsync -vsync */
+		else if (vdisplay < 480)
+			regp->MiscOutReg = 0x63;	/* -hsync +vsync */
+		else if (vdisplay < 768)
+			regp->MiscOutReg = 0xE3;	/* -hsync -vsync */
+		else
+			regp->MiscOutReg = 0x23;	/* +hsync +vsync */
+	}
+
+	regp->MiscOutReg |= (mode->clock_index & 0x03) << 2;
+
+	/*
+	 * Time Sequencer
+	 */
+	regp->Sequencer[NV_VIO_SR_RESET_INDEX] = 0x00;
+	/* 0x20 disables the sequencer */
+	if (mode->flags & DRM_MODE_FLAG_CLKDIV2)
+		regp->Sequencer[NV_VIO_SR_CLOCK_INDEX] = 0x29;
+	else
+		regp->Sequencer[NV_VIO_SR_CLOCK_INDEX] = 0x21;
+	regp->Sequencer[NV_VIO_SR_PLANE_MASK_INDEX] = 0x0F;
+	regp->Sequencer[NV_VIO_SR_CHAR_MAP_INDEX] = 0x00;
+	regp->Sequencer[NV_VIO_SR_MEM_MODE_INDEX] = 0x0E;
+
+	/*
+	 * CRTC
+	 */
+	regp->CRTC[NV_CIO_CR_HDT_INDEX] = horizTotal;
+	regp->CRTC[NV_CIO_CR_HDE_INDEX] = horizDisplay;
+	regp->CRTC[NV_CIO_CR_HBS_INDEX] = horizBlankStart;
+	regp->CRTC[NV_CIO_CR_HBE_INDEX] = (1 << 7) |
+					  XLATE(horizBlankEnd, 0, NV_CIO_CR_HBE_4_0);
+	regp->CRTC[NV_CIO_CR_HRS_INDEX] = horizStart;
+	regp->CRTC[NV_CIO_CR_HRE_INDEX] = XLATE(horizBlankEnd, 5, NV_CIO_CR_HRE_HBE_5) |
+					  XLATE(horizEnd, 0, NV_CIO_CR_HRE_4_0);
+	regp->CRTC[NV_CIO_CR_VDT_INDEX] = vertTotal;
+	regp->CRTC[NV_CIO_CR_OVL_INDEX] = XLATE(vertStart, 9, NV_CIO_CR_OVL_VRS_9) |
+					  XLATE(vertDisplay, 9, NV_CIO_CR_OVL_VDE_9) |
+					  XLATE(vertTotal, 9, NV_CIO_CR_OVL_VDT_9) |
+					  (1 << 4) |
+					  XLATE(vertBlankStart, 8, NV_CIO_CR_OVL_VBS_8) |
+					  XLATE(vertStart, 8, NV_CIO_CR_OVL_VRS_8) |
+					  XLATE(vertDisplay, 8, NV_CIO_CR_OVL_VDE_8) |
+					  XLATE(vertTotal, 8, NV_CIO_CR_OVL_VDT_8);
+	regp->CRTC[NV_CIO_CR_RSAL_INDEX] = 0x00;
+	regp->CRTC[NV_CIO_CR_CELL_HT_INDEX] = ((mode->flags & DRM_MODE_FLAG_DBLSCAN) ? MASK(NV_CIO_CR_CELL_HT_SCANDBL) : 0) |
+					      1 << 6 |
+					      XLATE(vertBlankStart, 9, NV_CIO_CR_CELL_HT_VBS_9);
+	regp->CRTC[NV_CIO_CR_CURS_ST_INDEX] = 0x00;
+	regp->CRTC[NV_CIO_CR_CURS_END_INDEX] = 0x00;
+	regp->CRTC[NV_CIO_CR_SA_HI_INDEX] = 0x00;
+	regp->CRTC[NV_CIO_CR_SA_LO_INDEX] = 0x00;
+	regp->CRTC[NV_CIO_CR_TCOFF_HI_INDEX] = 0x00;
+	regp->CRTC[NV_CIO_CR_TCOFF_LO_INDEX] = 0x00;
+	regp->CRTC[NV_CIO_CR_VRS_INDEX] = vertStart;
+	regp->CRTC[NV_CIO_CR_VRE_INDEX] = 1 << 5 | XLATE(vertEnd, 0, NV_CIO_CR_VRE_3_0);
+	regp->CRTC[NV_CIO_CR_VDE_INDEX] = vertDisplay;
+	/* framebuffer can be larger than crtc scanout area. */
+	regp->CRTC[NV_CIO_CR_OFFSET_INDEX] = fb->pitch / 8;
+	regp->CRTC[NV_CIO_CR_ULINE_INDEX] = 0x00;
+	regp->CRTC[NV_CIO_CR_VBS_INDEX] = vertBlankStart;
+	regp->CRTC[NV_CIO_CR_VBE_INDEX] = vertBlankEnd;
+	regp->CRTC[NV_CIO_CR_MODE_INDEX] = 0x43;
+	regp->CRTC[NV_CIO_CR_LCOMP_INDEX] = 0xff;
+
+	/*
+	 * Some extended CRTC registers (they are not saved with the rest of the vga regs).
+	 */
+
+	/* framebuffer can be larger than crtc scanout area. */
+	regp->CRTC[NV_CIO_CRE_RPC0_INDEX] = XLATE(fb->pitch / 8, 8, NV_CIO_CRE_RPC0_OFFSET_10_8);
+	regp->CRTC[NV_CIO_CRE_RPC1_INDEX] = mode->crtc_hdisplay < 1280 ?
+					    MASK(NV_CIO_CRE_RPC1_LARGE) : 0x00;
+	regp->CRTC[NV_CIO_CRE_LSR_INDEX] = XLATE(horizBlankEnd, 6, NV_CIO_CRE_LSR_HBE_6) |
+					   XLATE(vertBlankStart, 10, NV_CIO_CRE_LSR_VBS_10) |
+					   XLATE(vertStart, 10, NV_CIO_CRE_LSR_VRS_10) |
+					   XLATE(vertDisplay, 10, NV_CIO_CRE_LSR_VDE_10) |
+					   XLATE(vertTotal, 10, NV_CIO_CRE_LSR_VDT_10);
+	regp->CRTC[NV_CIO_CRE_HEB__INDEX] = XLATE(horizStart, 8, NV_CIO_CRE_HEB_HRS_8) |
+					    XLATE(horizBlankStart, 8, NV_CIO_CRE_HEB_HBS_8) |
+					    XLATE(horizDisplay, 8, NV_CIO_CRE_HEB_HDE_8) |
+					    XLATE(horizTotal, 8, NV_CIO_CRE_HEB_HDT_8);
+	regp->CRTC[NV_CIO_CRE_EBR_INDEX] = XLATE(vertBlankStart, 11, NV_CIO_CRE_EBR_VBS_11) |
+					   XLATE(vertStart, 11, NV_CIO_CRE_EBR_VRS_11) |
+					   XLATE(vertDisplay, 11, NV_CIO_CRE_EBR_VDE_11) |
+					   XLATE(vertTotal, 11, NV_CIO_CRE_EBR_VDT_11);
+
+	if (mode->flags & DRM_MODE_FLAG_INTERLACE) {
+		horizTotal = (horizTotal >> 1) & ~1;
+		regp->CRTC[NV_CIO_CRE_ILACE__INDEX] = horizTotal;
+		regp->CRTC[NV_CIO_CRE_HEB__INDEX] |= XLATE(horizTotal, 8, NV_CIO_CRE_HEB_ILC_8);
+	} else
+		regp->CRTC[NV_CIO_CRE_ILACE__INDEX] = 0xff;  /* interlace off */
+
+	/*
+	* Graphics Display Controller
+	*/
+	regp->Graphics[NV_VIO_GX_SR_INDEX] = 0x00;
+	regp->Graphics[NV_VIO_GX_SREN_INDEX] = 0x00;
+	regp->Graphics[NV_VIO_GX_CCOMP_INDEX] = 0x00;
+	regp->Graphics[NV_VIO_GX_ROP_INDEX] = 0x00;
+	regp->Graphics[NV_VIO_GX_READ_MAP_INDEX] = 0x00;
+	regp->Graphics[NV_VIO_GX_MODE_INDEX] = 0x40; /* 256 color mode */
+	regp->Graphics[NV_VIO_GX_MISC_INDEX] = 0x05; /* map 64k mem + graphic mode */
+	regp->Graphics[NV_VIO_GX_DONT_CARE_INDEX] = 0x0F;
+	regp->Graphics[NV_VIO_GX_BIT_MASK_INDEX] = 0xFF;
+
+	regp->Attribute[0]  = 0x00; /* standard colormap translation */
+	regp->Attribute[1]  = 0x01;
+	regp->Attribute[2]  = 0x02;
+	regp->Attribute[3]  = 0x03;
+	regp->Attribute[4]  = 0x04;
+	regp->Attribute[5]  = 0x05;
+	regp->Attribute[6]  = 0x06;
+	regp->Attribute[7]  = 0x07;
+	regp->Attribute[8]  = 0x08;
+	regp->Attribute[9]  = 0x09;
+	regp->Attribute[10] = 0x0A;
+	regp->Attribute[11] = 0x0B;
+	regp->Attribute[12] = 0x0C;
+	regp->Attribute[13] = 0x0D;
+	regp->Attribute[14] = 0x0E;
+	regp->Attribute[15] = 0x0F;
+	regp->Attribute[NV_CIO_AR_MODE_INDEX] = 0x01; /* Enable graphic mode */
+	/* Non-vga */
+	regp->Attribute[NV_CIO_AR_OSCAN_INDEX] = 0x00;
+	regp->Attribute[NV_CIO_AR_PLANE_INDEX] = 0x0F; /* enable all color planes */
+	regp->Attribute[NV_CIO_AR_HPP_INDEX] = 0x00;
+	regp->Attribute[NV_CIO_AR_CSEL_INDEX] = 0x00;
+}
+
+/**
+ * Sets up registers for the given mode/adjusted_mode pair.
+ *
+ * The clocks, CRTCs and outputs attached to this CRTC must be off.
+ *
+ * This shouldn't enable any clocks, CRTCs, or outputs, but they should
+ * be easily turned on/off after this.
+ */
+static void
+nv_crtc_mode_set_regs(struct drm_crtc *crtc, struct drm_display_mode * mode)
+{
+	struct drm_device *dev = crtc->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
+	struct nv04_crtc_reg *regp = &dev_priv->mode_reg.crtc_reg[nv_crtc->index];
+	struct nv04_crtc_reg *savep = &dev_priv->saved_reg.crtc_reg[nv_crtc->index];
+	struct drm_encoder *encoder;
+	bool lvds_output = false, tmds_output = false, tv_output = false,
+		off_chip_digital = false;
+
+	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
+		struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+		bool digital = false;
+
+		if (encoder->crtc != crtc)
+			continue;
+
+		if (nv_encoder->dcb->type == OUTPUT_LVDS)
+			digital = lvds_output = true;
+		if (nv_encoder->dcb->type == OUTPUT_TV)
+			tv_output = true;
+		if (nv_encoder->dcb->type == OUTPUT_TMDS)
+			digital = tmds_output = true;
+		if (nv_encoder->dcb->location != DCB_LOC_ON_CHIP && digital)
+			off_chip_digital = true;
+	}
+
+	/* Registers not directly related to the (s)vga mode */
+
+	/* What is the meaning of this register? */
+	/* A few popular values are 0x18, 0x1c, 0x38, 0x3c */
+	regp->CRTC[NV_CIO_CRE_ENH_INDEX] = savep->CRTC[NV_CIO_CRE_ENH_INDEX] & ~(1<<5);
+
+	regp->crtc_eng_ctrl = 0;
+	/* Except for rare conditions I2C is enabled on the primary crtc */
+	if (nv_crtc->index == 0)
+		regp->crtc_eng_ctrl |= NV_CRTC_FSEL_I2C;
+#if 0
+	/* Set overlay to desired crtc. */
+	if (dev->overlayAdaptor) {
+		NVPortPrivPtr pPriv = GET_OVERLAY_PRIVATE(dev);
+		if (pPriv->overlayCRTC == nv_crtc->index)
+			regp->crtc_eng_ctrl |= NV_CRTC_FSEL_OVERLAY;
+	}
+#endif
+
+	/* ADDRESS_SPACE_PNVM is the same as setting HCUR_ASI */
+	regp->cursor_cfg = NV_PCRTC_CURSOR_CONFIG_CUR_LINES_64 |
+			     NV_PCRTC_CURSOR_CONFIG_CUR_PIXELS_64 |
+			     NV_PCRTC_CURSOR_CONFIG_ADDRESS_SPACE_PNVM;
+	if (dev_priv->chipset >= 0x11)
+		regp->cursor_cfg |= NV_PCRTC_CURSOR_CONFIG_CUR_BPP_32;
+	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
+		regp->cursor_cfg |= NV_PCRTC_CURSOR_CONFIG_DOUBLE_SCAN_ENABLE;
+
+	/* Unblock some timings */
+	regp->CRTC[NV_CIO_CRE_53] = 0;
+	regp->CRTC[NV_CIO_CRE_54] = 0;
+
+	/* 0x00 is disabled, 0x11 is lvds, 0x22 crt and 0x88 tmds */
+	if (lvds_output)
+		regp->CRTC[NV_CIO_CRE_SCRATCH3__INDEX] = 0x11;
+	else if (tmds_output)
+		regp->CRTC[NV_CIO_CRE_SCRATCH3__INDEX] = 0x88;
+	else
+		regp->CRTC[NV_CIO_CRE_SCRATCH3__INDEX] = 0x22;
+
+	/* These values seem to vary */
+	/* This register seems to be used by the bios to make certain decisions on some G70 cards? */
+	regp->CRTC[NV_CIO_CRE_SCRATCH4__INDEX] = savep->CRTC[NV_CIO_CRE_SCRATCH4__INDEX];
+
+	nv_crtc_set_digital_vibrance(crtc, nv_crtc->saturation);
+
+	/* probably a scratch reg, but kept for cargo-cult purposes:
+	 * bit0: crtc0?, head A
+	 * bit6: lvds, head A
+	 * bit7: (only in X), head A
+	 */
+	if (nv_crtc->index == 0)
+		regp->CRTC[NV_CIO_CRE_4B] = savep->CRTC[NV_CIO_CRE_4B] | 0x80;
+
+	/* The blob seems to take the current value from crtc 0, add 4 to that
+	 * and reuse the old value for crtc 1 */
+	regp->CRTC[NV_CIO_CRE_TVOUT_LATENCY] = dev_priv->saved_reg.crtc_reg[0].CRTC[NV_CIO_CRE_TVOUT_LATENCY];
+	if (!nv_crtc->index)
+		regp->CRTC[NV_CIO_CRE_TVOUT_LATENCY] += 4;
+
+	/* the blob sometimes sets |= 0x10 (which is the same as setting |=
+	 * 1 << 30 on 0x60.830), for no apparent reason */
+	regp->CRTC[NV_CIO_CRE_59] = off_chip_digital;
+
+	regp->crtc_830 = mode->crtc_vdisplay - 3;
+	regp->crtc_834 = mode->crtc_vdisplay - 1;
+
+	if (dev_priv->card_type == NV_40)
+		/* This is what the blob does */
+		regp->crtc_850 = NVReadCRTC(dev, 0, NV_PCRTC_850);
+
+	if (dev_priv->card_type >= NV_30)
+		regp->gpio_ext = NVReadCRTC(dev, 0, NV_PCRTC_GPIO_EXT);
+
+	regp->crtc_cfg = NV_PCRTC_CONFIG_START_ADDRESS_HSYNC;
+
+	/* Some misc regs */
+	if (dev_priv->card_type == NV_40) {
+		regp->CRTC[NV_CIO_CRE_85] = 0xFF;
+		regp->CRTC[NV_CIO_CRE_86] = 0x1;
+	}
+
+	regp->CRTC[NV_CIO_CRE_PIXEL_INDEX] = (crtc->fb->depth + 1) / 8;
+	/* Enable slaved mode (called MODE_TV in nv4ref.h) */
+	if (lvds_output || tmds_output || tv_output)
+		regp->CRTC[NV_CIO_CRE_PIXEL_INDEX] |= (1 << 7);
+
+	/* Generic PRAMDAC regs */
+
+	if (dev_priv->card_type >= NV_10)
+		/* Only bit that bios and blob set. */
+		regp->nv10_cursync = (1 << 25);
+
+	regp->ramdac_gen_ctrl = NV_PRAMDAC_GENERAL_CONTROL_BPC_8BITS |
+				NV_PRAMDAC_GENERAL_CONTROL_VGA_STATE_SEL |
+				NV_PRAMDAC_GENERAL_CONTROL_PIXMIX_ON;
+	if (crtc->fb->depth == 16)
+		regp->ramdac_gen_ctrl |= NV_PRAMDAC_GENERAL_CONTROL_ALT_MODE_SEL;
+	if (dev_priv->chipset >= 0x11)
+		regp->ramdac_gen_ctrl |= NV_PRAMDAC_GENERAL_CONTROL_PIPE_LONG;
+
+	regp->ramdac_630 = 0; /* turn off green mode (tv test pattern?) */
+	regp->tv_setup = 0;
+
+	nv_crtc_set_image_sharpening(crtc, nv_crtc->sharpness);
+
+	/* Some values the blob sets */
+	regp->ramdac_8c0 = 0x100;
+	regp->ramdac_a20 = 0x0;
+	regp->ramdac_a24 = 0xfffff;
+	regp->ramdac_a34 = 0x1;
+}
+
+/**
+ * Sets up registers for the given mode/adjusted_mode pair.
+ *
+ * The clocks, CRTCs and outputs attached to this CRTC must be off.
+ *
+ * This shouldn't enable any clocks, CRTCs, or outputs, but they should
+ * be easily turned on/off after this.
+ */
+static int
+nv_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode,
+		 struct drm_display_mode *adjusted_mode,
+		 int x, int y, struct drm_framebuffer *old_fb)
+{
+	struct drm_device *dev = crtc->dev;
+	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+	NV_DEBUG_KMS(dev, "CTRC mode on CRTC %d:\n", nv_crtc->index);
+	drm_mode_debug_printmodeline(adjusted_mode);
+
+	/* unlock must come after turning off FP_TG_CONTROL in output_prepare */
+	nv_lock_vga_crtc_shadow(dev, nv_crtc->index, -1);
+
+	nv_crtc_mode_set_vga(crtc, adjusted_mode);
+	/* calculated in nv04_dfp_prepare, nv40 needs it written before calculating PLLs */
+	if (dev_priv->card_type == NV_40)
+		NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, dev_priv->mode_reg.sel_clk);
+	nv_crtc_mode_set_regs(crtc, adjusted_mode);
+	nv_crtc_calc_state_ext(crtc, mode, adjusted_mode->clock);
+	return 0;
+}
+
+static void nv_crtc_save(struct drm_crtc *crtc)
+{
+	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
+	struct drm_nouveau_private *dev_priv = crtc->dev->dev_private;
+	struct nv04_mode_state *state = &dev_priv->mode_reg;
+	struct nv04_crtc_reg *crtc_state = &state->crtc_reg[nv_crtc->index];
+	struct nv04_mode_state *saved = &dev_priv->saved_reg;
+	struct nv04_crtc_reg *crtc_saved = &saved->crtc_reg[nv_crtc->index];
+
+	if (nv_two_heads(crtc->dev))
+		NVSetOwner(crtc->dev, nv_crtc->index);
+
+	nouveau_hw_save_state(crtc->dev, nv_crtc->index, saved);
+
+	/* init some state to saved value */
+	state->sel_clk = saved->sel_clk & ~(0x5 << 16);
+	crtc_state->CRTC[NV_CIO_CRE_LCD__INDEX] = crtc_saved->CRTC[NV_CIO_CRE_LCD__INDEX];
+	state->pllsel = saved->pllsel & ~(PLLSEL_VPLL1_MASK | PLLSEL_VPLL2_MASK | PLLSEL_TV_MASK);
+	crtc_state->gpio_ext = crtc_saved->gpio_ext;
+}
+
+static void nv_crtc_restore(struct drm_crtc *crtc)
+{
+	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
+	struct drm_nouveau_private *dev_priv = crtc->dev->dev_private;
+	int head = nv_crtc->index;
+	uint8_t saved_cr21 = dev_priv->saved_reg.crtc_reg[head].CRTC[NV_CIO_CRE_21];
+
+	if (nv_two_heads(crtc->dev))
+		NVSetOwner(crtc->dev, head);
+
+	nouveau_hw_load_state(crtc->dev, head, &dev_priv->saved_reg);
+	nv_lock_vga_crtc_shadow(crtc->dev, head, saved_cr21);
+
+	nv_crtc->last_dpms = NV_DPMS_CLEARED;
+}
+
+static void nv_crtc_prepare(struct drm_crtc *crtc)
+{
+	struct drm_device *dev = crtc->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
+	struct drm_crtc_helper_funcs *funcs = crtc->helper_private;
+
+	if (nv_two_heads(dev))
+		NVSetOwner(dev, nv_crtc->index);
+
+	funcs->dpms(crtc, DRM_MODE_DPMS_OFF);
+
+	NVBlankScreen(dev, nv_crtc->index, true);
+
+	/* Some more preperation. */
+	NVWriteCRTC(dev, nv_crtc->index, NV_PCRTC_CONFIG, NV_PCRTC_CONFIG_START_ADDRESS_NON_VGA);
+	if (dev_priv->card_type == NV_40) {
+		uint32_t reg900 = NVReadRAMDAC(dev, nv_crtc->index, NV_PRAMDAC_900);
+		NVWriteRAMDAC(dev, nv_crtc->index, NV_PRAMDAC_900, reg900 & ~0x10000);
+	}
+}
+
+static void nv_crtc_commit(struct drm_crtc *crtc)
+{
+	struct drm_device *dev = crtc->dev;
+	struct drm_crtc_helper_funcs *funcs = crtc->helper_private;
+	struct drm_nouveau_private *dev_priv = crtc->dev->dev_private;
+	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
+
+	nouveau_hw_load_state(dev, nv_crtc->index, &dev_priv->mode_reg);
+	nv04_crtc_mode_set_base(crtc, crtc->x, crtc->y, NULL);
+
+#ifdef __BIG_ENDIAN
+	/* turn on LFB swapping */
+	{
+		uint8_t tmp = NVReadVgaCrtc(dev, nv_crtc->index, NV_CIO_CRE_RCR);
+		tmp |= MASK(NV_CIO_CRE_RCR_ENDIAN_BIG);
+		NVWriteVgaCrtc(dev, nv_crtc->index, NV_CIO_CRE_RCR, tmp);
+	}
+#endif
+
+	funcs->dpms(crtc, DRM_MODE_DPMS_ON);
+}
+
+static void nv_crtc_destroy(struct drm_crtc *crtc)
+{
+	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
+
+	NV_DEBUG_KMS(crtc->dev, "\n");
+
+	if (!nv_crtc)
+		return;
+
+	drm_crtc_cleanup(crtc);
+
+	nouveau_bo_ref(NULL, &nv_crtc->cursor.nvbo);
+	kfree(nv_crtc);
+}
+
+static void
+nv_crtc_gamma_load(struct drm_crtc *crtc)
+{
+	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
+	struct drm_device *dev = nv_crtc->base.dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct rgb { uint8_t r, g, b; } __attribute__((packed)) *rgbs;
+	int i;
+
+	rgbs = (struct rgb *)dev_priv->mode_reg.crtc_reg[nv_crtc->index].DAC;
+	for (i = 0; i < 256; i++) {
+		rgbs[i].r = nv_crtc->lut.r[i] >> 8;
+		rgbs[i].g = nv_crtc->lut.g[i] >> 8;
+		rgbs[i].b = nv_crtc->lut.b[i] >> 8;
+	}
+
+	nouveau_hw_load_state_palette(dev, nv_crtc->index, &dev_priv->mode_reg);
+}
+
+static void
+nv_crtc_gamma_set(struct drm_crtc *crtc, u16 *r, u16 *g, u16 *b, uint32_t size)
+{
+	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
+	int i;
+
+	if (size != 256)
+		return;
+
+	for (i = 0; i < 256; i++) {
+		nv_crtc->lut.r[i] = r[i];
+		nv_crtc->lut.g[i] = g[i];
+		nv_crtc->lut.b[i] = b[i];
+	}
+
+	/* We need to know the depth before we upload, but it's possible to
+	 * get called before a framebuffer is bound.  If this is the case,
+	 * mark the lut values as dirty by setting depth==0, and it'll be
+	 * uploaded on the first mode_set_base()
+	 */
+	if (!nv_crtc->base.fb) {
+		nv_crtc->lut.depth = 0;
+		return;
+	}
+
+	nv_crtc_gamma_load(crtc);
+}
+
+static int
+nv04_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
+			struct drm_framebuffer *old_fb)
+{
+	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
+	struct drm_device *dev = crtc->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nv04_crtc_reg *regp = &dev_priv->mode_reg.crtc_reg[nv_crtc->index];
+	struct drm_framebuffer *drm_fb = nv_crtc->base.fb;
+	struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
+	int arb_burst, arb_lwm;
+	int ret;
+
+	ret = nouveau_bo_pin(fb->nvbo, TTM_PL_FLAG_VRAM);
+	if (ret)
+		return ret;
+
+	if (old_fb) {
+		struct nouveau_framebuffer *ofb = nouveau_framebuffer(old_fb);
+		nouveau_bo_unpin(ofb->nvbo);
+	}
+
+	nv_crtc->fb.offset = fb->nvbo->bo.offset;
+
+	if (nv_crtc->lut.depth != drm_fb->depth) {
+		nv_crtc->lut.depth = drm_fb->depth;
+		nv_crtc_gamma_load(crtc);
+	}
+
+	/* Update the framebuffer format. */
+	regp->CRTC[NV_CIO_CRE_PIXEL_INDEX] &= ~3;
+	regp->CRTC[NV_CIO_CRE_PIXEL_INDEX] |= (crtc->fb->depth + 1) / 8;
+	regp->ramdac_gen_ctrl &= ~NV_PRAMDAC_GENERAL_CONTROL_ALT_MODE_SEL;
+	if (crtc->fb->depth == 16)
+		regp->ramdac_gen_ctrl |= NV_PRAMDAC_GENERAL_CONTROL_ALT_MODE_SEL;
+	crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_PIXEL_INDEX);
+	NVWriteRAMDAC(dev, nv_crtc->index, NV_PRAMDAC_GENERAL_CONTROL,
+		      regp->ramdac_gen_ctrl);
+
+	regp->CRTC[NV_CIO_CR_OFFSET_INDEX] = drm_fb->pitch >> 3;
+	regp->CRTC[NV_CIO_CRE_RPC0_INDEX] =
+		XLATE(drm_fb->pitch >> 3, 8, NV_CIO_CRE_RPC0_OFFSET_10_8);
+	crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_RPC0_INDEX);
+	crtc_wr_cio_state(crtc, regp, NV_CIO_CR_OFFSET_INDEX);
+
+	/* Update the framebuffer location. */
+	regp->fb_start = nv_crtc->fb.offset & ~3;
+	regp->fb_start += (y * drm_fb->pitch) + (x * drm_fb->bits_per_pixel / 8);
+	NVWriteCRTC(dev, nv_crtc->index, NV_PCRTC_START, regp->fb_start);
+
+	/* Update the arbitration parameters. */
+	nouveau_calc_arb(dev, crtc->mode.clock, drm_fb->bits_per_pixel,
+			 &arb_burst, &arb_lwm);
+
+	regp->CRTC[NV_CIO_CRE_FF_INDEX] = arb_burst;
+	regp->CRTC[NV_CIO_CRE_FFLWM__INDEX] = arb_lwm & 0xff;
+	crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_FF_INDEX);
+	crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_FFLWM__INDEX);
+
+	if (dev_priv->card_type >= NV_30) {
+		regp->CRTC[NV_CIO_CRE_47] = arb_lwm >> 8;
+		crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_47);
+	}
+
+	return 0;
+}
+
+static void nv04_cursor_upload(struct drm_device *dev, struct nouveau_bo *src,
+			       struct nouveau_bo *dst)
+{
+	int width = nv_cursor_width(dev);
+	uint32_t pixel;
+	int i, j;
+
+	for (i = 0; i < width; i++) {
+		for (j = 0; j < width; j++) {
+			pixel = nouveau_bo_rd32(src, i*64 + j);
+
+			nouveau_bo_wr16(dst, i*width + j, (pixel & 0x80000000) >> 16
+				     | (pixel & 0xf80000) >> 9
+				     | (pixel & 0xf800) >> 6
+				     | (pixel & 0xf8) >> 3);
+		}
+	}
+}
+
+static void nv11_cursor_upload(struct drm_device *dev, struct nouveau_bo *src,
+			       struct nouveau_bo *dst)
+{
+	uint32_t pixel;
+	int alpha, i;
+
+	/* nv11+ supports premultiplied (PM), or non-premultiplied (NPM) alpha
+	 * cursors (though NPM in combination with fp dithering may not work on
+	 * nv11, from "nv" driver history)
+	 * NPM mode needs NV_PCRTC_CURSOR_CONFIG_ALPHA_BLEND set and is what the
+	 * blob uses, however we get given PM cursors so we use PM mode
+	 */
+	for (i = 0; i < 64 * 64; i++) {
+		pixel = nouveau_bo_rd32(src, i);
+
+		/* hw gets unhappy if alpha <= rgb values.  for a PM image "less
+		 * than" shouldn't happen; fix "equal to" case by adding one to
+		 * alpha channel (slightly inaccurate, but so is attempting to
+		 * get back to NPM images, due to limits of integer precision)
+		 */
+		alpha = pixel >> 24;
+		if (alpha > 0 && alpha < 255)
+			pixel = (pixel & 0x00ffffff) | ((alpha + 1) << 24);
+
+#ifdef __BIG_ENDIAN
+		{
+			struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+			if (dev_priv->chipset == 0x11) {
+				pixel = ((pixel & 0x000000ff) << 24) |
+					((pixel & 0x0000ff00) << 8) |
+					((pixel & 0x00ff0000) >> 8) |
+					((pixel & 0xff000000) >> 24);
+			}
+		}
+#endif
+
+		nouveau_bo_wr32(dst, i, pixel);
+	}
+}
+
+static int
+nv04_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
+		     uint32_t buffer_handle, uint32_t width, uint32_t height)
+{
+	struct drm_nouveau_private *dev_priv = crtc->dev->dev_private;
+	struct drm_device *dev = dev_priv->dev;
+	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
+	struct nouveau_bo *cursor = NULL;
+	struct drm_gem_object *gem;
+	int ret = 0;
+
+	if (width != 64 || height != 64)
+		return -EINVAL;
+
+	if (!buffer_handle) {
+		nv_crtc->cursor.hide(nv_crtc, true);
+		return 0;
+	}
+
+	gem = drm_gem_object_lookup(dev, file_priv, buffer_handle);
+	if (!gem)
+		return -EINVAL;
+	cursor = nouveau_gem_object(gem);
+
+	ret = nouveau_bo_map(cursor);
+	if (ret)
+		goto out;
+
+	if (dev_priv->chipset >= 0x11)
+		nv11_cursor_upload(dev, cursor, nv_crtc->cursor.nvbo);
+	else
+		nv04_cursor_upload(dev, cursor, nv_crtc->cursor.nvbo);
+
+	nouveau_bo_unmap(cursor);
+	nv_crtc->cursor.offset = nv_crtc->cursor.nvbo->bo.offset;
+	nv_crtc->cursor.set_offset(nv_crtc, nv_crtc->cursor.offset);
+	nv_crtc->cursor.show(nv_crtc, true);
+out:
+	mutex_lock(&dev->struct_mutex);
+	drm_gem_object_unreference(gem);
+	mutex_unlock(&dev->struct_mutex);
+	return ret;
+}
+
+static int
+nv04_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
+{
+	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
+
+	nv_crtc->cursor.set_pos(nv_crtc, x, y);
+	return 0;
+}
+
+static const struct drm_crtc_funcs nv04_crtc_funcs = {
+	.save = nv_crtc_save,
+	.restore = nv_crtc_restore,
+	.cursor_set = nv04_crtc_cursor_set,
+	.cursor_move = nv04_crtc_cursor_move,
+	.gamma_set = nv_crtc_gamma_set,
+	.set_config = drm_crtc_helper_set_config,
+	.destroy = nv_crtc_destroy,
+};
+
+static const struct drm_crtc_helper_funcs nv04_crtc_helper_funcs = {
+	.dpms = nv_crtc_dpms,
+	.prepare = nv_crtc_prepare,
+	.commit = nv_crtc_commit,
+	.mode_fixup = nv_crtc_mode_fixup,
+	.mode_set = nv_crtc_mode_set,
+	.mode_set_base = nv04_crtc_mode_set_base,
+	.load_lut = nv_crtc_gamma_load,
+};
+
+int
+nv04_crtc_create(struct drm_device *dev, int crtc_num)
+{
+	struct nouveau_crtc *nv_crtc;
+	int ret, i;
+
+	nv_crtc = kzalloc(sizeof(*nv_crtc), GFP_KERNEL);
+	if (!nv_crtc)
+		return -ENOMEM;
+
+	for (i = 0; i < 256; i++) {
+		nv_crtc->lut.r[i] = i << 8;
+		nv_crtc->lut.g[i] = i << 8;
+		nv_crtc->lut.b[i] = i << 8;
+	}
+	nv_crtc->lut.depth = 0;
+
+	nv_crtc->index = crtc_num;
+	nv_crtc->last_dpms = NV_DPMS_CLEARED;
+
+	drm_crtc_init(dev, &nv_crtc->base, &nv04_crtc_funcs);
+	drm_crtc_helper_add(&nv_crtc->base, &nv04_crtc_helper_funcs);
+	drm_mode_crtc_set_gamma_size(&nv_crtc->base, 256);
+
+	ret = nouveau_bo_new(dev, NULL, 64*64*4, 0x100, TTM_PL_FLAG_VRAM,
+			     0, 0x0000, false, true, &nv_crtc->cursor.nvbo);
+	if (!ret) {
+		ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
+		if (!ret)
+			ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
+		if (ret)
+			nouveau_bo_ref(NULL, &nv_crtc->cursor.nvbo);
+	}
+
+	nv04_cursor_init(nv_crtc);
+
+	return 0;
+}
+
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_fbcon.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_fbcon.c
@@ -0,0 +1,423 @@
+/*
+ * Copyright © 2007 David Airlie
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *     David Airlie
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+#include <linux/tty.h>
+#include <linux/slab.h>
+#include <linux/sysrq.h>
+#include <linux/delay.h>
+#include <linux/fb.h>
+#include <linux/init.h>
+#include <linux/screen_info.h>
+
+#include "drmP.h"
+#include "drm.h"
+#include "drm_crtc.h"
+#include "drm_crtc_helper.h"
+#include "drm_fb_helper.h"
+#include "nouveau_drv.h"
+#include "nouveau_drm.h"
+#include "nouveau_crtc.h"
+#include "nouveau_fb.h"
+#include "nouveau_fbcon.h"
+#include "nouveau_dma.h"
+
+static int
+nouveau_fbcon_sync(struct fb_info *info)
+{
+	struct nouveau_fbcon_par *par = info->par;
+	struct drm_device *dev = par->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_channel *chan = dev_priv->channel;
+	int ret, i;
+
+	if (!chan || !chan->accel_done ||
+	    info->state != FBINFO_STATE_RUNNING ||
+	    info->flags & FBINFO_HWACCEL_DISABLED)
+		return 0;
+
+	if (RING_SPACE(chan, 4)) {
+		nouveau_fbcon_gpu_lockup(info);
+		return 0;
+	}
+
+	BEGIN_RING(chan, 0, 0x0104, 1);
+	OUT_RING(chan, 0);
+	BEGIN_RING(chan, 0, 0x0100, 1);
+	OUT_RING(chan, 0);
+	nouveau_bo_wr32(chan->notifier_bo, chan->m2mf_ntfy + 3, 0xffffffff);
+	FIRE_RING(chan);
+
+	ret = -EBUSY;
+	for (i = 0; i < 100000; i++) {
+		if (!nouveau_bo_rd32(chan->notifier_bo, chan->m2mf_ntfy + 3)) {
+			ret = 0;
+			break;
+		}
+		DRM_UDELAY(1);
+	}
+
+	if (ret) {
+		nouveau_fbcon_gpu_lockup(info);
+		return 0;
+	}
+
+	chan->accel_done = false;
+	return 0;
+}
+
+static struct fb_ops nouveau_fbcon_ops = {
+	.owner = THIS_MODULE,
+	.fb_check_var = drm_fb_helper_check_var,
+	.fb_set_par = drm_fb_helper_set_par,
+	.fb_setcolreg = drm_fb_helper_setcolreg,
+	.fb_fillrect = cfb_fillrect,
+	.fb_copyarea = cfb_copyarea,
+	.fb_imageblit = cfb_imageblit,
+	.fb_sync = nouveau_fbcon_sync,
+	.fb_pan_display = drm_fb_helper_pan_display,
+	.fb_blank = drm_fb_helper_blank,
+	.fb_setcmap = drm_fb_helper_setcmap,
+};
+
+static struct fb_ops nv04_fbcon_ops = {
+	.owner = THIS_MODULE,
+	.fb_check_var = drm_fb_helper_check_var,
+	.fb_set_par = drm_fb_helper_set_par,
+	.fb_setcolreg = drm_fb_helper_setcolreg,
+	.fb_fillrect = nv04_fbcon_fillrect,
+	.fb_copyarea = nv04_fbcon_copyarea,
+	.fb_imageblit = nv04_fbcon_imageblit,
+	.fb_sync = nouveau_fbcon_sync,
+	.fb_pan_display = drm_fb_helper_pan_display,
+	.fb_blank = drm_fb_helper_blank,
+	.fb_setcmap = drm_fb_helper_setcmap,
+};
+
+static struct fb_ops nv50_fbcon_ops = {
+	.owner = THIS_MODULE,
+	.fb_check_var = drm_fb_helper_check_var,
+	.fb_set_par = drm_fb_helper_set_par,
+	.fb_setcolreg = drm_fb_helper_setcolreg,
+	.fb_fillrect = nv50_fbcon_fillrect,
+	.fb_copyarea = nv50_fbcon_copyarea,
+	.fb_imageblit = nv50_fbcon_imageblit,
+	.fb_sync = nouveau_fbcon_sync,
+	.fb_pan_display = drm_fb_helper_pan_display,
+	.fb_blank = drm_fb_helper_blank,
+	.fb_setcmap = drm_fb_helper_setcmap,
+};
+
+static void nouveau_fbcon_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
+				    u16 blue, int regno)
+{
+	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
+
+	nv_crtc->lut.r[regno] = red;
+	nv_crtc->lut.g[regno] = green;
+	nv_crtc->lut.b[regno] = blue;
+}
+
+static void nouveau_fbcon_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
+				    u16 *blue, int regno)
+{
+	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
+
+	*red = nv_crtc->lut.r[regno];
+	*green = nv_crtc->lut.g[regno];
+	*blue = nv_crtc->lut.b[regno];
+}
+
+static struct drm_fb_helper_funcs nouveau_fbcon_helper_funcs = {
+	.gamma_set = nouveau_fbcon_gamma_set,
+	.gamma_get = nouveau_fbcon_gamma_get
+};
+
+#if defined(__i386__) || defined(__x86_64__)
+static bool
+nouveau_fbcon_has_vesafb_or_efifb(struct drm_device *dev)
+{
+	struct pci_dev *pdev = dev->pdev;
+	int ramin;
+
+	if (screen_info.orig_video_isVGA != VIDEO_TYPE_VLFB &&
+	    screen_info.orig_video_isVGA != VIDEO_TYPE_EFI)
+		return false;
+
+	if (screen_info.lfb_base < pci_resource_start(pdev, 1))
+		goto not_fb;
+
+	if (screen_info.lfb_base + screen_info.lfb_size >=
+	    pci_resource_start(pdev, 1) + pci_resource_len(pdev, 1))
+		goto not_fb;
+
+	return true;
+not_fb:
+	ramin = 2;
+	if (pci_resource_len(pdev, ramin) == 0) {
+		ramin = 3;
+		if (pci_resource_len(pdev, ramin) == 0)
+			return false;
+	}
+
+	if (screen_info.lfb_base < pci_resource_start(pdev, ramin))
+		return false;
+
+	if (screen_info.lfb_base + screen_info.lfb_size >=
+	    pci_resource_start(pdev, ramin) + pci_resource_len(pdev, ramin))
+		return false;
+
+	return true;
+}
+#endif
+
+void
+nouveau_fbcon_zfill(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct fb_info *info = dev_priv->fbdev_info;
+	struct fb_fillrect rect;
+
+	/* Clear the entire fbcon.  The drm will program every connector
+	 * with it's preferred mode.  If the sizes differ, one display will
+	 * quite likely have garbage around the console.
+	 */
+	rect.dx = rect.dy = 0;
+	rect.width = info->var.xres_virtual;
+	rect.height = info->var.yres_virtual;
+	rect.color = 0;
+	rect.rop = ROP_COPY;
+	info->fbops->fb_fillrect(info, &rect);
+}
+
+static int
+nouveau_fbcon_create(struct drm_device *dev, uint32_t fb_width,
+		     uint32_t fb_height, uint32_t surface_width,
+		     uint32_t surface_height, uint32_t surface_depth,
+		     uint32_t surface_bpp, struct drm_framebuffer **pfb)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct fb_info *info;
+	struct nouveau_fbcon_par *par;
+	struct drm_framebuffer *fb;
+	struct nouveau_framebuffer *nouveau_fb;
+	struct nouveau_bo *nvbo;
+	struct drm_mode_fb_cmd mode_cmd;
+	struct device *device = &dev->pdev->dev;
+	int size, ret;
+
+	mode_cmd.width = surface_width;
+	mode_cmd.height = surface_height;
+
+	mode_cmd.bpp = surface_bpp;
+	mode_cmd.pitch = mode_cmd.width * (mode_cmd.bpp >> 3);
+	mode_cmd.pitch = roundup(mode_cmd.pitch, 256);
+	mode_cmd.depth = surface_depth;
+
+	size = mode_cmd.pitch * mode_cmd.height;
+	size = roundup(size, PAGE_SIZE);
+
+	ret = nouveau_gem_new(dev, dev_priv->channel, size, 0, TTM_PL_FLAG_VRAM,
+			      0, 0x0000, false, true, &nvbo);
+	if (ret) {
+		NV_ERROR(dev, "failed to allocate framebuffer\n");
+		goto out;
+	}
+
+	ret = nouveau_bo_pin(nvbo, TTM_PL_FLAG_VRAM);
+	if (ret) {
+		NV_ERROR(dev, "failed to pin fb: %d\n", ret);
+		nouveau_bo_ref(NULL, &nvbo);
+		goto out;
+	}
+
+	ret = nouveau_bo_map(nvbo);
+	if (ret) {
+		NV_ERROR(dev, "failed to map fb: %d\n", ret);
+		nouveau_bo_unpin(nvbo);
+		nouveau_bo_ref(NULL, &nvbo);
+		goto out;
+	}
+
+	mutex_lock(&dev->struct_mutex);
+
+	fb = nouveau_framebuffer_create(dev, nvbo, &mode_cmd);
+	if (!fb) {
+		ret = -ENOMEM;
+		NV_ERROR(dev, "failed to allocate fb.\n");
+		goto out_unref;
+	}
+
+	list_add(&fb->filp_head, &dev->mode_config.fb_kernel_list);
+
+	nouveau_fb = nouveau_framebuffer(fb);
+	*pfb = fb;
+
+	info = framebuffer_alloc(sizeof(struct nouveau_fbcon_par), device);
+	if (!info) {
+		ret = -ENOMEM;
+		goto out_unref;
+	}
+
+	par = info->par;
+	par->helper.funcs = &nouveau_fbcon_helper_funcs;
+	par->helper.dev = dev;
+	ret = drm_fb_helper_init_crtc_count(&par->helper, 2, 4);
+	if (ret)
+		goto out_unref;
+	dev_priv->fbdev_info = info;
+
+	strcpy(info->fix.id, "nouveaufb");
+	if (nouveau_nofbaccel)
+		info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_DISABLED;
+	else
+		info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_COPYAREA |
+			      FBINFO_HWACCEL_FILLRECT |
+			      FBINFO_HWACCEL_IMAGEBLIT;
+	info->fbops = &nouveau_fbcon_ops;
+	info->fix.smem_start = dev->mode_config.fb_base + nvbo->bo.offset -
+			       dev_priv->vm_vram_base;
+	info->fix.smem_len = size;
+
+	info->screen_base = nvbo_kmap_obj_iovirtual(nouveau_fb->nvbo);
+	info->screen_size = size;
+
+	drm_fb_helper_fill_fix(info, fb->pitch, fb->depth);
+	drm_fb_helper_fill_var(info, fb, fb_width, fb_height);
+
+	/* FIXME: we really shouldn't expose mmio space at all */
+	info->fix.mmio_start = pci_resource_start(dev->pdev, 1);
+	info->fix.mmio_len = pci_resource_len(dev->pdev, 1);
+
+	/* Set aperture base/size for vesafb takeover */
+#if defined(__i386__) || defined(__x86_64__)
+	if (nouveau_fbcon_has_vesafb_or_efifb(dev)) {
+		/* Some NVIDIA VBIOS' are stupid and decide to put the
+		 * framebuffer in the middle of the PRAMIN BAR for
+		 * whatever reason.  We need to know the exact lfb_base
+		 * to get vesafb kicked off, and the only reliable way
+		 * we have left is to find out lfb_base the same way
+		 * vesafb did.
+		 */
+		info->aperture_base = screen_info.lfb_base;
+		info->aperture_size = screen_info.lfb_size;
+		if (screen_info.orig_video_isVGA == VIDEO_TYPE_VLFB)
+			info->aperture_size *= 65536;
+	} else
+#endif
+	{
+		info->aperture_base = info->fix.mmio_start;
+		info->aperture_size = info->fix.mmio_len;
+	}
+
+	info->pixmap.size = 64*1024;
+	info->pixmap.buf_align = 8;
+	info->pixmap.access_align = 32;
+	info->pixmap.flags = FB_PIXMAP_SYSTEM;
+	info->pixmap.scan_align = 1;
+
+	fb->fbdev = info;
+
+	par->nouveau_fb = nouveau_fb;
+	par->dev = dev;
+
+	if (dev_priv->channel && !nouveau_nofbaccel) {
+		switch (dev_priv->card_type) {
+		case NV_50:
+			nv50_fbcon_accel_init(info);
+			info->fbops = &nv50_fbcon_ops;
+			break;
+		default:
+			nv04_fbcon_accel_init(info);
+			info->fbops = &nv04_fbcon_ops;
+			break;
+		};
+	}
+
+	nouveau_fbcon_zfill(dev);
+
+	/* To allow resizeing without swapping buffers */
+	NV_INFO(dev, "allocated %dx%d fb: 0x%lx, bo %p\n",
+						nouveau_fb->base.width,
+						nouveau_fb->base.height,
+						nvbo->bo.offset, nvbo);
+
+	mutex_unlock(&dev->struct_mutex);
+	return 0;
+
+out_unref:
+	mutex_unlock(&dev->struct_mutex);
+out:
+	return ret;
+}
+
+int
+nouveau_fbcon_probe(struct drm_device *dev)
+{
+	NV_DEBUG_KMS(dev, "\n");
+
+	return drm_fb_helper_single_fb_probe(dev, 32, nouveau_fbcon_create);
+}
+
+int
+nouveau_fbcon_remove(struct drm_device *dev, struct drm_framebuffer *fb)
+{
+	struct nouveau_framebuffer *nouveau_fb = nouveau_framebuffer(fb);
+	struct fb_info *info;
+
+	if (!fb)
+		return -EINVAL;
+
+	info = fb->fbdev;
+	if (info) {
+		struct nouveau_fbcon_par *par = info->par;
+
+		unregister_framebuffer(info);
+		nouveau_bo_unmap(nouveau_fb->nvbo);
+		mutex_lock(&dev->struct_mutex);
+		drm_gem_object_unreference(nouveau_fb->nvbo->gem);
+		nouveau_fb->nvbo = NULL;
+		mutex_unlock(&dev->struct_mutex);
+		if (par)
+			drm_fb_helper_free(&par->helper);
+		framebuffer_release(info);
+	}
+
+	return 0;
+}
+
+void nouveau_fbcon_gpu_lockup(struct fb_info *info)
+{
+	struct nouveau_fbcon_par *par = info->par;
+	struct drm_device *dev = par->dev;
+
+	NV_ERROR(dev, "GPU lockup - switching to software fbcon\n");
+	info->flags |= FBINFO_HWACCEL_DISABLED;
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv40_graph.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv40_graph.c
@@ -0,0 +1,406 @@
+/*
+ * Copyright (C) 2007 Ben Skeggs.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include "drmP.h"
+#include "drm.h"
+#include "nouveau_drv.h"
+#include "nouveau_grctx.h"
+
+struct nouveau_channel *
+nv40_graph_channel(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	uint32_t inst;
+	int i;
+
+	inst = nv_rd32(dev, NV40_PGRAPH_CTXCTL_CUR);
+	if (!(inst & NV40_PGRAPH_CTXCTL_CUR_LOADED))
+		return NULL;
+	inst = (inst & NV40_PGRAPH_CTXCTL_CUR_INSTANCE) << 4;
+
+	for (i = 0; i < dev_priv->engine.fifo.channels; i++) {
+		struct nouveau_channel *chan = dev_priv->fifos[i];
+
+		if (chan && chan->ramin_grctx &&
+		    chan->ramin_grctx->instance == inst)
+			return chan;
+	}
+
+	return NULL;
+}
+
+int
+nv40_graph_create_context(struct nouveau_channel *chan)
+{
+	struct drm_device *dev = chan->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
+	int ret;
+
+	ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, pgraph->grctx_size,
+				     16, NVOBJ_FLAG_ZERO_ALLOC,
+				     &chan->ramin_grctx);
+	if (ret)
+		return ret;
+
+	/* Initialise default context values */
+	dev_priv->engine.instmem.prepare_access(dev, true);
+	if (!pgraph->ctxprog) {
+		struct nouveau_grctx ctx = {};
+
+		ctx.dev = chan->dev;
+		ctx.mode = NOUVEAU_GRCTX_VALS;
+		ctx.data = chan->ramin_grctx->gpuobj;
+		nv40_grctx_init(&ctx);
+	} else {
+		nouveau_grctx_vals_load(dev, chan->ramin_grctx->gpuobj);
+	}
+	nv_wo32(dev, chan->ramin_grctx->gpuobj, 0,
+		     chan->ramin_grctx->gpuobj->im_pramin->start);
+	dev_priv->engine.instmem.finish_access(dev);
+	return 0;
+}
+
+void
+nv40_graph_destroy_context(struct nouveau_channel *chan)
+{
+	nouveau_gpuobj_ref_del(chan->dev, &chan->ramin_grctx);
+}
+
+static int
+nv40_graph_transfer_context(struct drm_device *dev, uint32_t inst, int save)
+{
+	uint32_t old_cp, tv = 1000, tmp;
+	int i;
+
+	old_cp = nv_rd32(dev, NV20_PGRAPH_CHANNEL_CTX_POINTER);
+	nv_wr32(dev, NV20_PGRAPH_CHANNEL_CTX_POINTER, inst);
+
+	tmp  = nv_rd32(dev, NV40_PGRAPH_CTXCTL_0310);
+	tmp |= save ? NV40_PGRAPH_CTXCTL_0310_XFER_SAVE :
+		      NV40_PGRAPH_CTXCTL_0310_XFER_LOAD;
+	nv_wr32(dev, NV40_PGRAPH_CTXCTL_0310, tmp);
+
+	tmp  = nv_rd32(dev, NV40_PGRAPH_CTXCTL_0304);
+	tmp |= NV40_PGRAPH_CTXCTL_0304_XFER_CTX;
+	nv_wr32(dev, NV40_PGRAPH_CTXCTL_0304, tmp);
+
+	nouveau_wait_for_idle(dev);
+
+	for (i = 0; i < tv; i++) {
+		if (nv_rd32(dev, NV40_PGRAPH_CTXCTL_030C) == 0)
+			break;
+	}
+
+	nv_wr32(dev, NV20_PGRAPH_CHANNEL_CTX_POINTER, old_cp);
+
+	if (i == tv) {
+		uint32_t ucstat = nv_rd32(dev, NV40_PGRAPH_CTXCTL_UCODE_STAT);
+		NV_ERROR(dev, "Failed: Instance=0x%08x Save=%d\n", inst, save);
+		NV_ERROR(dev, "IP: 0x%02x, Opcode: 0x%08x\n",
+			 ucstat >> NV40_PGRAPH_CTXCTL_UCODE_STAT_IP_SHIFT,
+			 ucstat  & NV40_PGRAPH_CTXCTL_UCODE_STAT_OP_MASK);
+		NV_ERROR(dev, "0x40030C = 0x%08x\n",
+			 nv_rd32(dev, NV40_PGRAPH_CTXCTL_030C));
+		return -EBUSY;
+	}
+
+	return 0;
+}
+
+/* Restore the context for a specific channel into PGRAPH */
+int
+nv40_graph_load_context(struct nouveau_channel *chan)
+{
+	struct drm_device *dev = chan->dev;
+	uint32_t inst;
+	int ret;
+
+	if (!chan->ramin_grctx)
+		return -EINVAL;
+	inst = chan->ramin_grctx->instance >> 4;
+
+	ret = nv40_graph_transfer_context(dev, inst, 0);
+	if (ret)
+		return ret;
+
+	/* 0x40032C, no idea of it's exact function.  Could simply be a
+	 * record of the currently active PGRAPH context.  It's currently
+	 * unknown as to what bit 24 does.  The nv ddx has it set, so we will
+	 * set it here too.
+	 */
+	nv_wr32(dev, NV20_PGRAPH_CHANNEL_CTX_POINTER, inst);
+	nv_wr32(dev, NV40_PGRAPH_CTXCTL_CUR,
+		 (inst & NV40_PGRAPH_CTXCTL_CUR_INSTANCE) |
+		  NV40_PGRAPH_CTXCTL_CUR_LOADED);
+	/* 0x32E0 records the instance address of the active FIFO's PGRAPH
+	 * context.  If at any time this doesn't match 0x40032C, you will
+	 * recieve PGRAPH_INTR_CONTEXT_SWITCH
+	 */
+	nv_wr32(dev, NV40_PFIFO_GRCTX_INSTANCE, inst);
+	return 0;
+}
+
+int
+nv40_graph_unload_context(struct drm_device *dev)
+{
+	uint32_t inst;
+	int ret;
+
+	inst = nv_rd32(dev, NV40_PGRAPH_CTXCTL_CUR);
+	if (!(inst & NV40_PGRAPH_CTXCTL_CUR_LOADED))
+		return 0;
+	inst &= NV40_PGRAPH_CTXCTL_CUR_INSTANCE;
+
+	ret = nv40_graph_transfer_context(dev, inst, 1);
+
+	nv_wr32(dev, NV40_PGRAPH_CTXCTL_CUR, inst);
+	return ret;
+}
+
+void
+nv40_graph_set_region_tiling(struct drm_device *dev, int i, uint32_t addr,
+			     uint32_t size, uint32_t pitch)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	uint32_t limit = max(1u, addr + size) - 1;
+
+	if (pitch)
+		addr |= 1;
+
+	switch (dev_priv->chipset) {
+	case 0x44:
+	case 0x4a:
+	case 0x4e:
+		nv_wr32(dev, NV20_PGRAPH_TSIZE(i), pitch);
+		nv_wr32(dev, NV20_PGRAPH_TLIMIT(i), limit);
+		nv_wr32(dev, NV20_PGRAPH_TILE(i), addr);
+		break;
+
+	case 0x46:
+	case 0x47:
+	case 0x49:
+	case 0x4b:
+		nv_wr32(dev, NV47_PGRAPH_TSIZE(i), pitch);
+		nv_wr32(dev, NV47_PGRAPH_TLIMIT(i), limit);
+		nv_wr32(dev, NV47_PGRAPH_TILE(i), addr);
+		nv_wr32(dev, NV40_PGRAPH_TSIZE1(i), pitch);
+		nv_wr32(dev, NV40_PGRAPH_TLIMIT1(i), limit);
+		nv_wr32(dev, NV40_PGRAPH_TILE1(i), addr);
+		break;
+
+	default:
+		nv_wr32(dev, NV20_PGRAPH_TSIZE(i), pitch);
+		nv_wr32(dev, NV20_PGRAPH_TLIMIT(i), limit);
+		nv_wr32(dev, NV20_PGRAPH_TILE(i), addr);
+		nv_wr32(dev, NV40_PGRAPH_TSIZE1(i), pitch);
+		nv_wr32(dev, NV40_PGRAPH_TLIMIT1(i), limit);
+		nv_wr32(dev, NV40_PGRAPH_TILE1(i), addr);
+		break;
+	}
+}
+
+/*
+ * G70		0x47
+ * G71		0x49
+ * NV45		0x48
+ * G72[M]	0x46
+ * G73		0x4b
+ * C51_G7X	0x4c
+ * C51		0x4e
+ */
+int
+nv40_graph_init(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv =
+		(struct drm_nouveau_private *)dev->dev_private;
+	struct nouveau_fb_engine *pfb = &dev_priv->engine.fb;
+	uint32_t vramsz;
+	int i, j;
+
+	nv_wr32(dev, NV03_PMC_ENABLE, nv_rd32(dev, NV03_PMC_ENABLE) &
+			~NV_PMC_ENABLE_PGRAPH);
+	nv_wr32(dev, NV03_PMC_ENABLE, nv_rd32(dev, NV03_PMC_ENABLE) |
+			 NV_PMC_ENABLE_PGRAPH);
+
+	if (nouveau_ctxfw) {
+		nouveau_grctx_prog_load(dev);
+		dev_priv->engine.graph.grctx_size = 175 * 1024;
+	}
+
+	if (!dev_priv->engine.graph.ctxprog) {
+		struct nouveau_grctx ctx = {};
+		uint32_t cp[256];
+
+		ctx.dev = dev;
+		ctx.mode = NOUVEAU_GRCTX_PROG;
+		ctx.data = cp;
+		ctx.ctxprog_max = 256;
+		nv40_grctx_init(&ctx);
+		dev_priv->engine.graph.grctx_size = ctx.ctxvals_pos * 4;
+
+		nv_wr32(dev, NV40_PGRAPH_CTXCTL_UCODE_INDEX, 0);
+		for (i = 0; i < ctx.ctxprog_len; i++)
+			nv_wr32(dev, NV40_PGRAPH_CTXCTL_UCODE_DATA, cp[i]);
+	}
+
+	/* No context present currently */
+	nv_wr32(dev, NV40_PGRAPH_CTXCTL_CUR, 0x00000000);
+
+	nv_wr32(dev, NV03_PGRAPH_INTR   , 0xFFFFFFFF);
+	nv_wr32(dev, NV40_PGRAPH_INTR_EN, 0xFFFFFFFF);
+
+	nv_wr32(dev, NV04_PGRAPH_DEBUG_0, 0xFFFFFFFF);
+	nv_wr32(dev, NV04_PGRAPH_DEBUG_0, 0x00000000);
+	nv_wr32(dev, NV04_PGRAPH_DEBUG_1, 0x401287c0);
+	nv_wr32(dev, NV04_PGRAPH_DEBUG_3, 0xe0de8055);
+	nv_wr32(dev, NV10_PGRAPH_DEBUG_4, 0x00008000);
+	nv_wr32(dev, NV04_PGRAPH_LIMIT_VIOL_PIX, 0x00be3c5f);
+
+	nv_wr32(dev, NV10_PGRAPH_CTX_CONTROL, 0x10010100);
+	nv_wr32(dev, NV10_PGRAPH_STATE      , 0xFFFFFFFF);
+
+	j = nv_rd32(dev, 0x1540) & 0xff;
+	if (j) {
+		for (i = 0; !(j & 1); j >>= 1, i++)
+			;
+		nv_wr32(dev, 0x405000, i);
+	}
+
+	if (dev_priv->chipset == 0x40) {
+		nv_wr32(dev, 0x4009b0, 0x83280fff);
+		nv_wr32(dev, 0x4009b4, 0x000000a0);
+	} else {
+		nv_wr32(dev, 0x400820, 0x83280eff);
+		nv_wr32(dev, 0x400824, 0x000000a0);
+	}
+
+	switch (dev_priv->chipset) {
+	case 0x40:
+	case 0x45:
+		nv_wr32(dev, 0x4009b8, 0x0078e366);
+		nv_wr32(dev, 0x4009bc, 0x0000014c);
+		break;
+	case 0x41:
+	case 0x42: /* pciid also 0x00Cx */
+	/* case 0x0120: XXX (pciid) */
+		nv_wr32(dev, 0x400828, 0x007596ff);
+		nv_wr32(dev, 0x40082c, 0x00000108);
+		break;
+	case 0x43:
+		nv_wr32(dev, 0x400828, 0x0072cb77);
+		nv_wr32(dev, 0x40082c, 0x00000108);
+		break;
+	case 0x44:
+	case 0x46: /* G72 */
+	case 0x4a:
+	case 0x4c: /* G7x-based C51 */
+	case 0x4e:
+		nv_wr32(dev, 0x400860, 0);
+		nv_wr32(dev, 0x400864, 0);
+		break;
+	case 0x47: /* G70 */
+	case 0x49: /* G71 */
+	case 0x4b: /* G73 */
+		nv_wr32(dev, 0x400828, 0x07830610);
+		nv_wr32(dev, 0x40082c, 0x0000016A);
+		break;
+	default:
+		break;
+	}
+
+	nv_wr32(dev, 0x400b38, 0x2ffff800);
+	nv_wr32(dev, 0x400b3c, 0x00006000);
+
+	/* Turn all the tiling regions off. */
+	for (i = 0; i < pfb->num_tiles; i++)
+		nv40_graph_set_region_tiling(dev, i, 0, 0, 0);
+
+	/* begin RAM config */
+	vramsz = drm_get_resource_len(dev, 0) - 1;
+	switch (dev_priv->chipset) {
+	case 0x40:
+		nv_wr32(dev, 0x4009A4, nv_rd32(dev, NV04_PFB_CFG0));
+		nv_wr32(dev, 0x4009A8, nv_rd32(dev, NV04_PFB_CFG1));
+		nv_wr32(dev, 0x4069A4, nv_rd32(dev, NV04_PFB_CFG0));
+		nv_wr32(dev, 0x4069A8, nv_rd32(dev, NV04_PFB_CFG1));
+		nv_wr32(dev, 0x400820, 0);
+		nv_wr32(dev, 0x400824, 0);
+		nv_wr32(dev, 0x400864, vramsz);
+		nv_wr32(dev, 0x400868, vramsz);
+		break;
+	default:
+		switch (dev_priv->chipset) {
+		case 0x46:
+		case 0x47:
+		case 0x49:
+		case 0x4b:
+			nv_wr32(dev, 0x400DF0, nv_rd32(dev, NV04_PFB_CFG0));
+			nv_wr32(dev, 0x400DF4, nv_rd32(dev, NV04_PFB_CFG1));
+			break;
+		default:
+			nv_wr32(dev, 0x4009F0, nv_rd32(dev, NV04_PFB_CFG0));
+			nv_wr32(dev, 0x4009F4, nv_rd32(dev, NV04_PFB_CFG1));
+			break;
+		}
+		nv_wr32(dev, 0x4069F0, nv_rd32(dev, NV04_PFB_CFG0));
+		nv_wr32(dev, 0x4069F4, nv_rd32(dev, NV04_PFB_CFG1));
+		nv_wr32(dev, 0x400840, 0);
+		nv_wr32(dev, 0x400844, 0);
+		nv_wr32(dev, 0x4008A0, vramsz);
+		nv_wr32(dev, 0x4008A4, vramsz);
+		break;
+	}
+
+	return 0;
+}
+
+void nv40_graph_takedown(struct drm_device *dev)
+{
+	nouveau_grctx_fini(dev);
+}
+
+struct nouveau_pgraph_object_class nv40_graph_grclass[] = {
+	{ 0x0030, false, NULL }, /* null */
+	{ 0x0039, false, NULL }, /* m2mf */
+	{ 0x004a, false, NULL }, /* gdirect */
+	{ 0x009f, false, NULL }, /* imageblit (nv12) */
+	{ 0x008a, false, NULL }, /* ifc */
+	{ 0x0089, false, NULL }, /* sifm */
+	{ 0x3089, false, NULL }, /* sifm (nv40) */
+	{ 0x0062, false, NULL }, /* surf2d */
+	{ 0x3062, false, NULL }, /* surf2d (nv40) */
+	{ 0x0043, false, NULL }, /* rop */
+	{ 0x0012, false, NULL }, /* beta1 */
+	{ 0x0072, false, NULL }, /* beta4 */
+	{ 0x0019, false, NULL }, /* cliprect */
+	{ 0x0044, false, NULL }, /* pattern */
+	{ 0x309e, false, NULL }, /* swzsurf */
+	{ 0x4097, false, NULL }, /* curie (nv40) */
+	{ 0x4497, false, NULL }, /* curie (nv44) */
+	{}
+};
+
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv50_crtc.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv50_crtc.c
@@ -0,0 +1,792 @@
+/*
+ * Copyright (C) 2008 Maarten Maathuis.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include "drmP.h"
+#include "drm_mode.h"
+#include "drm_crtc_helper.h"
+
+#define NOUVEAU_DMA_DEBUG (nouveau_reg_debug & NOUVEAU_REG_DEBUG_EVO)
+#include "nouveau_reg.h"
+#include "nouveau_drv.h"
+#include "nouveau_hw.h"
+#include "nouveau_encoder.h"
+#include "nouveau_crtc.h"
+#include "nouveau_fb.h"
+#include "nouveau_connector.h"
+#include "nv50_display.h"
+
+static void
+nv50_crtc_lut_load(struct drm_crtc *crtc)
+{
+	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
+	void __iomem *lut = nvbo_kmap_obj_iovirtual(nv_crtc->lut.nvbo);
+	int i;
+
+	NV_DEBUG_KMS(crtc->dev, "\n");
+
+	for (i = 0; i < 256; i++) {
+		writew(nv_crtc->lut.r[i] >> 2, lut + 8*i + 0);
+		writew(nv_crtc->lut.g[i] >> 2, lut + 8*i + 2);
+		writew(nv_crtc->lut.b[i] >> 2, lut + 8*i + 4);
+	}
+
+	if (nv_crtc->lut.depth == 30) {
+		writew(nv_crtc->lut.r[i - 1] >> 2, lut + 8*i + 0);
+		writew(nv_crtc->lut.g[i - 1] >> 2, lut + 8*i + 2);
+		writew(nv_crtc->lut.b[i - 1] >> 2, lut + 8*i + 4);
+	}
+}
+
+int
+nv50_crtc_blank(struct nouveau_crtc *nv_crtc, bool blanked)
+{
+	struct drm_device *dev = nv_crtc->base.dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_channel *evo = dev_priv->evo;
+	int index = nv_crtc->index, ret;
+
+	NV_DEBUG_KMS(dev, "index %d\n", nv_crtc->index);
+	NV_DEBUG_KMS(dev, "%s\n", blanked ? "blanked" : "unblanked");
+
+	if (blanked) {
+		nv_crtc->cursor.hide(nv_crtc, false);
+
+		ret = RING_SPACE(evo, dev_priv->chipset != 0x50 ? 7 : 5);
+		if (ret) {
+			NV_ERROR(dev, "no space while blanking crtc\n");
+			return ret;
+		}
+		BEGIN_RING(evo, 0, NV50_EVO_CRTC(index, CLUT_MODE), 2);
+		OUT_RING(evo, NV50_EVO_CRTC_CLUT_MODE_BLANK);
+		OUT_RING(evo, 0);
+		if (dev_priv->chipset != 0x50) {
+			BEGIN_RING(evo, 0, NV84_EVO_CRTC(index, CLUT_DMA), 1);
+			OUT_RING(evo, NV84_EVO_CRTC_CLUT_DMA_HANDLE_NONE);
+		}
+
+		BEGIN_RING(evo, 0, NV50_EVO_CRTC(index, FB_DMA), 1);
+		OUT_RING(evo, NV50_EVO_CRTC_FB_DMA_HANDLE_NONE);
+	} else {
+		if (nv_crtc->cursor.visible)
+			nv_crtc->cursor.show(nv_crtc, false);
+		else
+			nv_crtc->cursor.hide(nv_crtc, false);
+
+		ret = RING_SPACE(evo, dev_priv->chipset != 0x50 ? 10 : 8);
+		if (ret) {
+			NV_ERROR(dev, "no space while unblanking crtc\n");
+			return ret;
+		}
+		BEGIN_RING(evo, 0, NV50_EVO_CRTC(index, CLUT_MODE), 2);
+		OUT_RING(evo, nv_crtc->lut.depth == 8 ?
+				NV50_EVO_CRTC_CLUT_MODE_OFF :
+				NV50_EVO_CRTC_CLUT_MODE_ON);
+		OUT_RING(evo, (nv_crtc->lut.nvbo->bo.mem.mm_node->start <<
+				 PAGE_SHIFT) >> 8);
+		if (dev_priv->chipset != 0x50) {
+			BEGIN_RING(evo, 0, NV84_EVO_CRTC(index, CLUT_DMA), 1);
+			OUT_RING(evo, NvEvoVRAM);
+		}
+
+		BEGIN_RING(evo, 0, NV50_EVO_CRTC(index, FB_OFFSET), 2);
+		OUT_RING(evo, nv_crtc->fb.offset >> 8);
+		OUT_RING(evo, 0);
+		BEGIN_RING(evo, 0, NV50_EVO_CRTC(index, FB_DMA), 1);
+		if (dev_priv->chipset != 0x50)
+			if (nv_crtc->fb.tile_flags == 0x7a00)
+				OUT_RING(evo, NvEvoFB32);
+			else
+			if (nv_crtc->fb.tile_flags == 0x7000)
+				OUT_RING(evo, NvEvoFB16);
+			else
+				OUT_RING(evo, NvEvoVRAM);
+		else
+			OUT_RING(evo, NvEvoVRAM);
+	}
+
+	nv_crtc->fb.blanked = blanked;
+	return 0;
+}
+
+static int
+nv50_crtc_set_dither(struct nouveau_crtc *nv_crtc, bool on, bool update)
+{
+	struct drm_device *dev = nv_crtc->base.dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_channel *evo = dev_priv->evo;
+	int ret;
+
+	NV_DEBUG_KMS(dev, "\n");
+
+	ret = RING_SPACE(evo, 2 + (update ? 2 : 0));
+	if (ret) {
+		NV_ERROR(dev, "no space while setting dither\n");
+		return ret;
+	}
+
+	BEGIN_RING(evo, 0, NV50_EVO_CRTC(nv_crtc->index, DITHER_CTRL), 1);
+	if (on)
+		OUT_RING(evo, NV50_EVO_CRTC_DITHER_CTRL_ON);
+	else
+		OUT_RING(evo, NV50_EVO_CRTC_DITHER_CTRL_OFF);
+
+	if (update) {
+		BEGIN_RING(evo, 0, NV50_EVO_UPDATE, 1);
+		OUT_RING(evo, 0);
+		FIRE_RING(evo);
+	}
+
+	return 0;
+}
+
+struct nouveau_connector *
+nouveau_crtc_connector_get(struct nouveau_crtc *nv_crtc)
+{
+	struct drm_device *dev = nv_crtc->base.dev;
+	struct drm_connector *connector;
+	struct drm_crtc *crtc = to_drm_crtc(nv_crtc);
+
+	/* The safest approach is to find an encoder with the right crtc, that
+	 * is also linked to a connector. */
+	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
+		if (connector->encoder)
+			if (connector->encoder->crtc == crtc)
+				return nouveau_connector(connector);
+	}
+
+	return NULL;
+}
+
+static int
+nv50_crtc_set_scale(struct nouveau_crtc *nv_crtc, int scaling_mode, bool update)
+{
+	struct nouveau_connector *nv_connector =
+		nouveau_crtc_connector_get(nv_crtc);
+	struct drm_device *dev = nv_crtc->base.dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_channel *evo = dev_priv->evo;
+	struct drm_display_mode *native_mode = NULL;
+	struct drm_display_mode *mode = &nv_crtc->base.mode;
+	uint32_t outX, outY, horiz, vert;
+	int ret;
+
+	NV_DEBUG_KMS(dev, "\n");
+
+	switch (scaling_mode) {
+	case DRM_MODE_SCALE_NONE:
+		break;
+	default:
+		if (!nv_connector || !nv_connector->native_mode) {
+			NV_ERROR(dev, "No native mode, forcing panel scaling\n");
+			scaling_mode = DRM_MODE_SCALE_NONE;
+		} else {
+			native_mode = nv_connector->native_mode;
+		}
+		break;
+	}
+
+	switch (scaling_mode) {
+	case DRM_MODE_SCALE_ASPECT:
+		horiz = (native_mode->hdisplay << 19) / mode->hdisplay;
+		vert = (native_mode->vdisplay << 19) / mode->vdisplay;
+
+		if (vert > horiz) {
+			outX = (mode->hdisplay * horiz) >> 19;
+			outY = (mode->vdisplay * horiz) >> 19;
+		} else {
+			outX = (mode->hdisplay * vert) >> 19;
+			outY = (mode->vdisplay * vert) >> 19;
+		}
+		break;
+	case DRM_MODE_SCALE_FULLSCREEN:
+		outX = native_mode->hdisplay;
+		outY = native_mode->vdisplay;
+		break;
+	case DRM_MODE_SCALE_CENTER:
+	case DRM_MODE_SCALE_NONE:
+	default:
+		outX = mode->hdisplay;
+		outY = mode->vdisplay;
+		break;
+	}
+
+	ret = RING_SPACE(evo, update ? 7 : 5);
+	if (ret)
+		return ret;
+
+	/* Got a better name for SCALER_ACTIVE? */
+	/* One day i've got to really figure out why this is needed. */
+	BEGIN_RING(evo, 0, NV50_EVO_CRTC(nv_crtc->index, SCALE_CTRL), 1);
+	if ((mode->flags & DRM_MODE_FLAG_DBLSCAN) ||
+	    (mode->flags & DRM_MODE_FLAG_INTERLACE) ||
+	    mode->hdisplay != outX || mode->vdisplay != outY) {
+		OUT_RING(evo, NV50_EVO_CRTC_SCALE_CTRL_ACTIVE);
+	} else {
+		OUT_RING(evo, NV50_EVO_CRTC_SCALE_CTRL_INACTIVE);
+	}
+
+	BEGIN_RING(evo, 0, NV50_EVO_CRTC(nv_crtc->index, SCALE_RES1), 2);
+	OUT_RING(evo, outY << 16 | outX);
+	OUT_RING(evo, outY << 16 | outX);
+
+	if (update) {
+		BEGIN_RING(evo, 0, NV50_EVO_UPDATE, 1);
+		OUT_RING(evo, 0);
+		FIRE_RING(evo);
+	}
+
+	return 0;
+}
+
+int
+nv50_crtc_set_clock(struct drm_device *dev, int head, int pclk)
+{
+	uint32_t pll_reg = NV50_PDISPLAY_CRTC_CLK_CTRL1(head);
+	struct nouveau_pll_vals pll;
+	struct pll_lims limits;
+	uint32_t reg1, reg2;
+	int ret;
+
+	ret = get_pll_limits(dev, pll_reg, &limits);
+	if (ret)
+		return ret;
+
+	ret = nouveau_calc_pll_mnp(dev, &limits, pclk, &pll);
+	if (ret <= 0)
+		return ret;
+
+	if (limits.vco2.maxfreq) {
+		reg1 = nv_rd32(dev, pll_reg + 4) & 0xff00ff00;
+		reg2 = nv_rd32(dev, pll_reg + 8) & 0x8000ff00;
+		nv_wr32(dev, pll_reg, 0x10000611);
+		nv_wr32(dev, pll_reg + 4, reg1 | (pll.M1 << 16) | pll.N1);
+		nv_wr32(dev, pll_reg + 8,
+			reg2 | (pll.log2P << 28) | (pll.M2 << 16) | pll.N2);
+	} else {
+		reg1 = nv_rd32(dev, pll_reg + 4) & 0xffc00000;
+		nv_wr32(dev, pll_reg, 0x50000610);
+		nv_wr32(dev, pll_reg + 4, reg1 |
+			(pll.log2P << 16) | (pll.M1 << 8) | pll.N1);
+	}
+
+	return 0;
+}
+
+static void
+nv50_crtc_destroy(struct drm_crtc *crtc)
+{
+	struct drm_device *dev;
+	struct nouveau_crtc *nv_crtc;
+
+	if (!crtc)
+		return;
+
+	dev = crtc->dev;
+	nv_crtc = nouveau_crtc(crtc);
+
+	NV_DEBUG_KMS(dev, "\n");
+
+	drm_crtc_cleanup(&nv_crtc->base);
+
+	nv50_cursor_fini(nv_crtc);
+
+	nouveau_bo_ref(NULL, &nv_crtc->lut.nvbo);
+	nouveau_bo_ref(NULL, &nv_crtc->cursor.nvbo);
+	kfree(nv_crtc->mode);
+	kfree(nv_crtc);
+}
+
+int
+nv50_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
+		     uint32_t buffer_handle, uint32_t width, uint32_t height)
+{
+	struct drm_device *dev = crtc->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
+	struct nouveau_bo *cursor = NULL;
+	struct drm_gem_object *gem;
+	int ret = 0, i;
+
+	if (width != 64 || height != 64)
+		return -EINVAL;
+
+	if (!buffer_handle) {
+		nv_crtc->cursor.hide(nv_crtc, true);
+		return 0;
+	}
+
+	gem = drm_gem_object_lookup(dev, file_priv, buffer_handle);
+	if (!gem)
+		return -EINVAL;
+	cursor = nouveau_gem_object(gem);
+
+	ret = nouveau_bo_map(cursor);
+	if (ret)
+		goto out;
+
+	/* The simple will do for now. */
+	for (i = 0; i < 64 * 64; i++)
+		nouveau_bo_wr32(nv_crtc->cursor.nvbo, i, nouveau_bo_rd32(cursor, i));
+
+	nouveau_bo_unmap(cursor);
+
+	nv_crtc->cursor.set_offset(nv_crtc, nv_crtc->cursor.nvbo->bo.offset -
+					    dev_priv->vm_vram_base);
+	nv_crtc->cursor.show(nv_crtc, true);
+
+out:
+	mutex_lock(&dev->struct_mutex);
+	drm_gem_object_unreference(gem);
+	mutex_unlock(&dev->struct_mutex);
+	return ret;
+}
+
+int
+nv50_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
+{
+	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
+
+	nv_crtc->cursor.set_pos(nv_crtc, x, y);
+	return 0;
+}
+
+static void
+nv50_crtc_gamma_set(struct drm_crtc *crtc, u16 *r, u16 *g, u16 *b,
+		    uint32_t size)
+{
+	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
+	int i;
+
+	if (size != 256)
+		return;
+
+	for (i = 0; i < 256; i++) {
+		nv_crtc->lut.r[i] = r[i];
+		nv_crtc->lut.g[i] = g[i];
+		nv_crtc->lut.b[i] = b[i];
+	}
+
+	/* We need to know the depth before we upload, but it's possible to
+	 * get called before a framebuffer is bound.  If this is the case,
+	 * mark the lut values as dirty by setting depth==0, and it'll be
+	 * uploaded on the first mode_set_base()
+	 */
+	if (!nv_crtc->base.fb) {
+		nv_crtc->lut.depth = 0;
+		return;
+	}
+
+	nv50_crtc_lut_load(crtc);
+}
+
+static void
+nv50_crtc_save(struct drm_crtc *crtc)
+{
+	NV_ERROR(crtc->dev, "!!\n");
+}
+
+static void
+nv50_crtc_restore(struct drm_crtc *crtc)
+{
+	NV_ERROR(crtc->dev, "!!\n");
+}
+
+static const struct drm_crtc_funcs nv50_crtc_funcs = {
+	.save = nv50_crtc_save,
+	.restore = nv50_crtc_restore,
+	.cursor_set = nv50_crtc_cursor_set,
+	.cursor_move = nv50_crtc_cursor_move,
+	.gamma_set = nv50_crtc_gamma_set,
+	.set_config = drm_crtc_helper_set_config,
+	.destroy = nv50_crtc_destroy,
+};
+
+static void
+nv50_crtc_dpms(struct drm_crtc *crtc, int mode)
+{
+}
+
+static void
+nv50_crtc_prepare(struct drm_crtc *crtc)
+{
+	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
+	struct drm_device *dev = crtc->dev;
+	struct drm_encoder *encoder;
+	uint32_t dac = 0, sor = 0;
+
+	NV_DEBUG_KMS(dev, "index %d\n", nv_crtc->index);
+
+	/* Disconnect all unused encoders. */
+	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
+		struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+
+		if (!drm_helper_encoder_in_use(encoder))
+			continue;
+
+		if (nv_encoder->dcb->type == OUTPUT_ANALOG ||
+		    nv_encoder->dcb->type == OUTPUT_TV)
+			dac |= (1 << nv_encoder->or);
+		else
+			sor |= (1 << nv_encoder->or);
+	}
+
+	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
+		struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+
+		if (nv_encoder->dcb->type == OUTPUT_ANALOG ||
+		    nv_encoder->dcb->type == OUTPUT_TV) {
+			if (dac & (1 << nv_encoder->or))
+				continue;
+		} else {
+			if (sor & (1 << nv_encoder->or))
+				continue;
+		}
+
+		nv_encoder->disconnect(nv_encoder);
+	}
+
+	nv50_crtc_blank(nv_crtc, true);
+}
+
+static void
+nv50_crtc_commit(struct drm_crtc *crtc)
+{
+	struct drm_crtc *crtc2;
+	struct drm_device *dev = crtc->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_channel *evo = dev_priv->evo;
+	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
+	int ret;
+
+	NV_DEBUG_KMS(dev, "index %d\n", nv_crtc->index);
+
+	nv50_crtc_blank(nv_crtc, false);
+
+	/* Explicitly blank all unused crtc's. */
+	list_for_each_entry(crtc2, &dev->mode_config.crtc_list, head) {
+		if (!drm_helper_crtc_in_use(crtc2))
+			nv50_crtc_blank(nouveau_crtc(crtc2), true);
+	}
+
+	ret = RING_SPACE(evo, 2);
+	if (ret) {
+		NV_ERROR(dev, "no space while committing crtc\n");
+		return;
+	}
+	BEGIN_RING(evo, 0, NV50_EVO_UPDATE, 1);
+	OUT_RING(evo, 0);
+	FIRE_RING(evo);
+}
+
+static bool
+nv50_crtc_mode_fixup(struct drm_crtc *crtc, struct drm_display_mode *mode,
+		     struct drm_display_mode *adjusted_mode)
+{
+	return true;
+}
+
+static int
+nv50_crtc_do_mode_set_base(struct drm_crtc *crtc, int x, int y,
+			   struct drm_framebuffer *old_fb, bool update)
+{
+	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
+	struct drm_device *dev = nv_crtc->base.dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_channel *evo = dev_priv->evo;
+	struct drm_framebuffer *drm_fb = nv_crtc->base.fb;
+	struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
+	int ret, format;
+
+	NV_DEBUG_KMS(dev, "index %d\n", nv_crtc->index);
+
+	switch (drm_fb->depth) {
+	case  8:
+		format = NV50_EVO_CRTC_FB_DEPTH_8;
+		break;
+	case 15:
+		format = NV50_EVO_CRTC_FB_DEPTH_15;
+		break;
+	case 16:
+		format = NV50_EVO_CRTC_FB_DEPTH_16;
+		break;
+	case 24:
+	case 32:
+		format = NV50_EVO_CRTC_FB_DEPTH_24;
+		break;
+	case 30:
+		format = NV50_EVO_CRTC_FB_DEPTH_30;
+		break;
+	default:
+		 NV_ERROR(dev, "unknown depth %d\n", drm_fb->depth);
+		 return -EINVAL;
+	}
+
+	ret = nouveau_bo_pin(fb->nvbo, TTM_PL_FLAG_VRAM);
+	if (ret)
+		return ret;
+
+	if (old_fb) {
+		struct nouveau_framebuffer *ofb = nouveau_framebuffer(old_fb);
+		nouveau_bo_unpin(ofb->nvbo);
+	}
+
+	nv_crtc->fb.offset = fb->nvbo->bo.offset - dev_priv->vm_vram_base;
+	nv_crtc->fb.tile_flags = fb->nvbo->tile_flags;
+	nv_crtc->fb.cpp = drm_fb->bits_per_pixel / 8;
+	if (!nv_crtc->fb.blanked && dev_priv->chipset != 0x50) {
+		ret = RING_SPACE(evo, 2);
+		if (ret)
+			return ret;
+
+		BEGIN_RING(evo, 0, NV50_EVO_CRTC(nv_crtc->index, FB_DMA), 1);
+		if (nv_crtc->fb.tile_flags == 0x7a00)
+			OUT_RING(evo, NvEvoFB32);
+		else
+		if (nv_crtc->fb.tile_flags == 0x7000)
+			OUT_RING(evo, NvEvoFB16);
+		else
+			OUT_RING(evo, NvEvoVRAM);
+	}
+
+	ret = RING_SPACE(evo, 12);
+	if (ret)
+		return ret;
+
+	BEGIN_RING(evo, 0, NV50_EVO_CRTC(nv_crtc->index, FB_OFFSET), 5);
+	OUT_RING(evo, nv_crtc->fb.offset >> 8);
+	OUT_RING(evo, 0);
+	OUT_RING(evo, (drm_fb->height << 16) | drm_fb->width);
+	if (!nv_crtc->fb.tile_flags) {
+		OUT_RING(evo, drm_fb->pitch | (1 << 20));
+	} else {
+		OUT_RING(evo, ((drm_fb->pitch / 4) << 4) |
+				  fb->nvbo->tile_mode);
+	}
+	if (dev_priv->chipset == 0x50)
+		OUT_RING(evo, (fb->nvbo->tile_flags << 8) | format);
+	else
+		OUT_RING(evo, format);
+
+	BEGIN_RING(evo, 0, NV50_EVO_CRTC(nv_crtc->index, CLUT_MODE), 1);
+	OUT_RING(evo, fb->base.depth == 8 ?
+		 NV50_EVO_CRTC_CLUT_MODE_OFF : NV50_EVO_CRTC_CLUT_MODE_ON);
+
+	BEGIN_RING(evo, 0, NV50_EVO_CRTC(nv_crtc->index, COLOR_CTRL), 1);
+	OUT_RING(evo, NV50_EVO_CRTC_COLOR_CTRL_COLOR);
+	BEGIN_RING(evo, 0, NV50_EVO_CRTC(nv_crtc->index, FB_POS), 1);
+	OUT_RING(evo, (y << 16) | x);
+
+	if (nv_crtc->lut.depth != fb->base.depth) {
+		nv_crtc->lut.depth = fb->base.depth;
+		nv50_crtc_lut_load(crtc);
+	}
+
+	if (update) {
+		ret = RING_SPACE(evo, 2);
+		if (ret)
+			return ret;
+		BEGIN_RING(evo, 0, NV50_EVO_UPDATE, 1);
+		OUT_RING(evo, 0);
+		FIRE_RING(evo);
+	}
+
+	return 0;
+}
+
+static int
+nv50_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode,
+		   struct drm_display_mode *adjusted_mode, int x, int y,
+		   struct drm_framebuffer *old_fb)
+{
+	struct drm_device *dev = crtc->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_channel *evo = dev_priv->evo;
+	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
+	struct nouveau_connector *nv_connector = NULL;
+	uint32_t hsync_dur,  vsync_dur, hsync_start_to_end, vsync_start_to_end;
+	uint32_t hunk1, vunk1, vunk2a, vunk2b;
+	int ret;
+
+	/* Find the connector attached to this CRTC */
+	nv_connector = nouveau_crtc_connector_get(nv_crtc);
+
+	*nv_crtc->mode = *adjusted_mode;
+
+	NV_DEBUG_KMS(dev, "index %d\n", nv_crtc->index);
+
+	hsync_dur = adjusted_mode->hsync_end - adjusted_mode->hsync_start;
+	vsync_dur = adjusted_mode->vsync_end - adjusted_mode->vsync_start;
+	hsync_start_to_end = adjusted_mode->htotal - adjusted_mode->hsync_start;
+	vsync_start_to_end = adjusted_mode->vtotal - adjusted_mode->vsync_start;
+	/* I can't give this a proper name, anyone else can? */
+	hunk1 = adjusted_mode->htotal -
+		adjusted_mode->hsync_start + adjusted_mode->hdisplay;
+	vunk1 = adjusted_mode->vtotal -
+		adjusted_mode->vsync_start + adjusted_mode->vdisplay;
+	/* Another strange value, this time only for interlaced adjusted_modes. */
+	vunk2a = 2 * adjusted_mode->vtotal -
+		 adjusted_mode->vsync_start + adjusted_mode->vdisplay;
+	vunk2b = adjusted_mode->vtotal -
+		 adjusted_mode->vsync_start + adjusted_mode->vtotal;
+
+	if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
+		vsync_dur /= 2;
+		vsync_start_to_end  /= 2;
+		vunk1 /= 2;
+		vunk2a /= 2;
+		vunk2b /= 2;
+		/* magic */
+		if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) {
+			vsync_start_to_end -= 1;
+			vunk1 -= 1;
+			vunk2a -= 1;
+			vunk2b -= 1;
+		}
+	}
+
+	ret = RING_SPACE(evo, 17);
+	if (ret)
+		return ret;
+
+	BEGIN_RING(evo, 0, NV50_EVO_CRTC(nv_crtc->index, CLOCK), 2);
+	OUT_RING(evo, adjusted_mode->clock | 0x800000);
+	OUT_RING(evo, (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) ? 2 : 0);
+
+	BEGIN_RING(evo, 0, NV50_EVO_CRTC(nv_crtc->index, DISPLAY_START), 5);
+	OUT_RING(evo, 0);
+	OUT_RING(evo, (adjusted_mode->vtotal << 16) | adjusted_mode->htotal);
+	OUT_RING(evo, (vsync_dur - 1) << 16 | (hsync_dur - 1));
+	OUT_RING(evo, (vsync_start_to_end - 1) << 16 |
+			(hsync_start_to_end - 1));
+	OUT_RING(evo, (vunk1 - 1) << 16 | (hunk1 - 1));
+
+	if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
+		BEGIN_RING(evo, 0, NV50_EVO_CRTC(nv_crtc->index, UNK0824), 1);
+		OUT_RING(evo, (vunk2b - 1) << 16 | (vunk2a - 1));
+	} else {
+		OUT_RING(evo, 0);
+		OUT_RING(evo, 0);
+	}
+
+	BEGIN_RING(evo, 0, NV50_EVO_CRTC(nv_crtc->index, UNK082C), 1);
+	OUT_RING(evo, 0);
+
+	/* This is the actual resolution of the mode. */
+	BEGIN_RING(evo, 0, NV50_EVO_CRTC(nv_crtc->index, REAL_RES), 1);
+	OUT_RING(evo, (mode->vdisplay << 16) | mode->hdisplay);
+	BEGIN_RING(evo, 0, NV50_EVO_CRTC(nv_crtc->index, SCALE_CENTER_OFFSET), 1);
+	OUT_RING(evo, NV50_EVO_CRTC_SCALE_CENTER_OFFSET_VAL(0, 0));
+
+	nv_crtc->set_dither(nv_crtc, nv_connector->use_dithering, false);
+	nv_crtc->set_scale(nv_crtc, nv_connector->scaling_mode, false);
+
+	return nv50_crtc_do_mode_set_base(crtc, x, y, old_fb, false);
+}
+
+static int
+nv50_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
+			struct drm_framebuffer *old_fb)
+{
+	return nv50_crtc_do_mode_set_base(crtc, x, y, old_fb, true);
+}
+
+static const struct drm_crtc_helper_funcs nv50_crtc_helper_funcs = {
+	.dpms = nv50_crtc_dpms,
+	.prepare = nv50_crtc_prepare,
+	.commit = nv50_crtc_commit,
+	.mode_fixup = nv50_crtc_mode_fixup,
+	.mode_set = nv50_crtc_mode_set,
+	.mode_set_base = nv50_crtc_mode_set_base,
+	.load_lut = nv50_crtc_lut_load,
+};
+
+int
+nv50_crtc_create(struct drm_device *dev, int index)
+{
+	struct nouveau_crtc *nv_crtc = NULL;
+	int ret, i;
+
+	NV_DEBUG_KMS(dev, "\n");
+
+	nv_crtc = kzalloc(sizeof(*nv_crtc), GFP_KERNEL);
+	if (!nv_crtc)
+		return -ENOMEM;
+
+	nv_crtc->mode = kzalloc(sizeof(*nv_crtc->mode), GFP_KERNEL);
+	if (!nv_crtc->mode) {
+		kfree(nv_crtc);
+		return -ENOMEM;
+	}
+
+	/* Default CLUT parameters, will be activated on the hw upon
+	 * first mode set.
+	 */
+	for (i = 0; i < 256; i++) {
+		nv_crtc->lut.r[i] = i << 8;
+		nv_crtc->lut.g[i] = i << 8;
+		nv_crtc->lut.b[i] = i << 8;
+	}
+	nv_crtc->lut.depth = 0;
+
+	ret = nouveau_bo_new(dev, NULL, 4096, 0x100, TTM_PL_FLAG_VRAM,
+			     0, 0x0000, false, true, &nv_crtc->lut.nvbo);
+	if (!ret) {
+		ret = nouveau_bo_pin(nv_crtc->lut.nvbo, TTM_PL_FLAG_VRAM);
+		if (!ret)
+			ret = nouveau_bo_map(nv_crtc->lut.nvbo);
+		if (ret)
+			nouveau_bo_ref(NULL, &nv_crtc->lut.nvbo);
+	}
+
+	if (ret) {
+		kfree(nv_crtc->mode);
+		kfree(nv_crtc);
+		return ret;
+	}
+
+	nv_crtc->index = index;
+
+	/* set function pointers */
+	nv_crtc->set_dither = nv50_crtc_set_dither;
+	nv_crtc->set_scale = nv50_crtc_set_scale;
+
+	drm_crtc_init(dev, &nv_crtc->base, &nv50_crtc_funcs);
+	drm_crtc_helper_add(&nv_crtc->base, &nv50_crtc_helper_funcs);
+	drm_mode_crtc_set_gamma_size(&nv_crtc->base, 256);
+
+	ret = nouveau_bo_new(dev, NULL, 64*64*4, 0x100, TTM_PL_FLAG_VRAM,
+			     0, 0x0000, false, true, &nv_crtc->cursor.nvbo);
+	if (!ret) {
+		ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
+		if (!ret)
+			ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
+		if (ret)
+			nouveau_bo_ref(NULL, &nv_crtc->cursor.nvbo);
+	}
+
+	nv50_cursor_init(nv_crtc);
+	return 0;
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv40_fb.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv40_fb.c
@@ -0,0 +1,75 @@
+#include "drmP.h"
+#include "drm.h"
+#include "nouveau_drv.h"
+#include "nouveau_drm.h"
+
+void
+nv40_fb_set_region_tiling(struct drm_device *dev, int i, uint32_t addr,
+			  uint32_t size, uint32_t pitch)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	uint32_t limit = max(1u, addr + size) - 1;
+
+	if (pitch)
+		addr |= 1;
+
+	switch (dev_priv->chipset) {
+	case 0x40:
+		nv_wr32(dev, NV10_PFB_TLIMIT(i), limit);
+		nv_wr32(dev, NV10_PFB_TSIZE(i), pitch);
+		nv_wr32(dev, NV10_PFB_TILE(i), addr);
+		break;
+
+	default:
+		nv_wr32(dev, NV40_PFB_TLIMIT(i), limit);
+		nv_wr32(dev, NV40_PFB_TSIZE(i), pitch);
+		nv_wr32(dev, NV40_PFB_TILE(i), addr);
+		break;
+	}
+}
+
+int
+nv40_fb_init(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_fb_engine *pfb = &dev_priv->engine.fb;
+	uint32_t tmp;
+	int i;
+
+	/* This is strictly a NV4x register (don't know about NV5x). */
+	/* The blob sets these to all kinds of values, and they mess up our setup. */
+	/* I got value 0x52802 instead. For some cards the blob even sets it back to 0x1. */
+	/* Note: the blob doesn't read this value, so i'm pretty sure this is safe for all cards. */
+	/* Any idea what this is? */
+	nv_wr32(dev, NV40_PFB_UNK_800, 0x1);
+
+	switch (dev_priv->chipset) {
+	case 0x40:
+	case 0x45:
+		tmp = nv_rd32(dev, NV10_PFB_CLOSE_PAGE2);
+		nv_wr32(dev, NV10_PFB_CLOSE_PAGE2, tmp & ~(1 << 15));
+		pfb->num_tiles = NV10_PFB_TILE__SIZE;
+		break;
+	case 0x46: /* G72 */
+	case 0x47: /* G70 */
+	case 0x49: /* G71 */
+	case 0x4b: /* G73 */
+	case 0x4c: /* C51 (G7X version) */
+		pfb->num_tiles = NV40_PFB_TILE__SIZE_1;
+		break;
+	default:
+		pfb->num_tiles = NV40_PFB_TILE__SIZE_0;
+		break;
+	}
+
+	/* Turn all the tiling regions off. */
+	for (i = 0; i < pfb->num_tiles; i++)
+		pfb->set_region_tiling(dev, i, 0, 0, 0);
+
+	return 0;
+}
+
+void
+nv40_fb_takedown(struct drm_device *dev)
+{
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_backlight.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_backlight.c
@@ -0,0 +1,155 @@
+/*
+ * Copyright (C) 2009 Red Hat <mjg@redhat.com>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+/*
+ * Authors:
+ *  Matthew Garrett <mjg@redhat.com>
+ *
+ * Register locations derived from NVClock by Roderick Colenbrander
+ */
+
+#include <linux/backlight.h>
+
+#include "drmP.h"
+#include "nouveau_drv.h"
+#include "nouveau_drm.h"
+#include "nouveau_reg.h"
+
+static int nv40_get_intensity(struct backlight_device *bd)
+{
+	struct drm_device *dev = bl_get_data(bd);
+	int val = (nv_rd32(dev, NV40_PMC_BACKLIGHT) & NV40_PMC_BACKLIGHT_MASK)
+									>> 16;
+
+	return val;
+}
+
+static int nv40_set_intensity(struct backlight_device *bd)
+{
+	struct drm_device *dev = bl_get_data(bd);
+	int val = bd->props.brightness;
+	int reg = nv_rd32(dev, NV40_PMC_BACKLIGHT);
+
+	nv_wr32(dev, NV40_PMC_BACKLIGHT,
+		 (val << 16) | (reg & ~NV40_PMC_BACKLIGHT_MASK));
+
+	return 0;
+}
+
+static struct backlight_ops nv40_bl_ops = {
+	.options = BL_CORE_SUSPENDRESUME,
+	.get_brightness = nv40_get_intensity,
+	.update_status = nv40_set_intensity,
+};
+
+static int nv50_get_intensity(struct backlight_device *bd)
+{
+	struct drm_device *dev = bl_get_data(bd);
+
+	return nv_rd32(dev, NV50_PDISPLAY_SOR_BACKLIGHT);
+}
+
+static int nv50_set_intensity(struct backlight_device *bd)
+{
+	struct drm_device *dev = bl_get_data(bd);
+	int val = bd->props.brightness;
+
+	nv_wr32(dev, NV50_PDISPLAY_SOR_BACKLIGHT,
+		val | NV50_PDISPLAY_SOR_BACKLIGHT_ENABLE);
+	return 0;
+}
+
+static struct backlight_ops nv50_bl_ops = {
+	.options = BL_CORE_SUSPENDRESUME,
+	.get_brightness = nv50_get_intensity,
+	.update_status = nv50_set_intensity,
+};
+
+static int nouveau_nv40_backlight_init(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct backlight_device *bd;
+
+	if (!(nv_rd32(dev, NV40_PMC_BACKLIGHT) & NV40_PMC_BACKLIGHT_MASK))
+		return 0;
+
+	bd = backlight_device_register("nv_backlight", &dev->pdev->dev, dev,
+				       &nv40_bl_ops);
+	if (IS_ERR(bd))
+		return PTR_ERR(bd);
+
+	dev_priv->backlight = bd;
+	bd->props.max_brightness = 31;
+	bd->props.brightness = nv40_get_intensity(bd);
+	backlight_update_status(bd);
+
+	return 0;
+}
+
+static int nouveau_nv50_backlight_init(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct backlight_device *bd;
+
+	if (!nv_rd32(dev, NV50_PDISPLAY_SOR_BACKLIGHT))
+		return 0;
+
+	bd = backlight_device_register("nv_backlight", &dev->pdev->dev, dev,
+				       &nv50_bl_ops);
+	if (IS_ERR(bd))
+		return PTR_ERR(bd);
+
+	dev_priv->backlight = bd;
+	bd->props.max_brightness = 1025;
+	bd->props.brightness = nv50_get_intensity(bd);
+	backlight_update_status(bd);
+	return 0;
+}
+
+int nouveau_backlight_init(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+	switch (dev_priv->card_type) {
+	case NV_40:
+		return nouveau_nv40_backlight_init(dev);
+	case NV_50:
+		return nouveau_nv50_backlight_init(dev);
+	default:
+		break;
+	}
+
+	return 0;
+}
+
+void nouveau_backlight_exit(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+	if (dev_priv->backlight) {
+		backlight_device_unregister(dev_priv->backlight);
+		dev_priv->backlight = NULL;
+	}
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_ttm.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_ttm.c
@@ -0,0 +1,103 @@
+/*
+ * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA,
+ * All Rights Reserved.
+ * Copyright (c) 2009 VMware, Inc., Palo Alto, CA., USA,
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sub license,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "drmP.h"
+
+#include "nouveau_drv.h"
+
+int
+nouveau_ttm_mmap(struct file *filp, struct vm_area_struct *vma)
+{
+	struct drm_file *file_priv = filp->private_data;
+	struct drm_nouveau_private *dev_priv =
+		file_priv->minor->dev->dev_private;
+
+	if (unlikely(vma->vm_pgoff < DRM_FILE_PAGE_OFFSET))
+		return drm_mmap(filp, vma);
+
+	return ttm_bo_mmap(filp, vma, &dev_priv->ttm.bdev);
+}
+
+static int
+nouveau_ttm_mem_global_init(struct ttm_global_reference *ref)
+{
+	return ttm_mem_global_init(ref->object);
+}
+
+static void
+nouveau_ttm_mem_global_release(struct ttm_global_reference *ref)
+{
+	ttm_mem_global_release(ref->object);
+}
+
+int
+nouveau_ttm_global_init(struct drm_nouveau_private *dev_priv)
+{
+	struct ttm_global_reference *global_ref;
+	int ret;
+
+	global_ref = &dev_priv->ttm.mem_global_ref;
+	global_ref->global_type = TTM_GLOBAL_TTM_MEM;
+	global_ref->size = sizeof(struct ttm_mem_global);
+	global_ref->init = &nouveau_ttm_mem_global_init;
+	global_ref->release = &nouveau_ttm_mem_global_release;
+
+	ret = ttm_global_item_ref(global_ref);
+	if (unlikely(ret != 0)) {
+		DRM_ERROR("Failed setting up TTM memory accounting\n");
+		dev_priv->ttm.mem_global_ref.release = NULL;
+		return ret;
+	}
+
+	dev_priv->ttm.bo_global_ref.mem_glob = global_ref->object;
+	global_ref = &dev_priv->ttm.bo_global_ref.ref;
+	global_ref->global_type = TTM_GLOBAL_TTM_BO;
+	global_ref->size = sizeof(struct ttm_bo_global);
+	global_ref->init = &ttm_bo_global_init;
+	global_ref->release = &ttm_bo_global_release;
+
+	ret = ttm_global_item_ref(global_ref);
+	if (unlikely(ret != 0)) {
+		DRM_ERROR("Failed setting up TTM BO subsystem\n");
+		ttm_global_item_unref(&dev_priv->ttm.mem_global_ref);
+		dev_priv->ttm.mem_global_ref.release = NULL;
+		return ret;
+	}
+
+	return 0;
+}
+
+void
+nouveau_ttm_global_release(struct drm_nouveau_private *dev_priv)
+{
+	if (dev_priv->ttm.mem_global_ref.release == NULL)
+		return;
+
+	ttm_global_item_unref(&dev_priv->ttm.bo_global_ref.ref);
+	ttm_global_item_unref(&dev_priv->ttm.mem_global_ref);
+	dev_priv->ttm.mem_global_ref.release = NULL;
+}
+
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_fbcon.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_fbcon.h
@@ -0,0 +1,54 @@
+/*
+ * Copyright (C) 2008 Maarten Maathuis.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#ifndef __NOUVEAU_FBCON_H__
+#define __NOUVEAU_FBCON_H__
+
+#include "drm_fb_helper.h"
+
+struct nouveau_fbcon_par {
+	struct drm_fb_helper helper;
+	struct drm_device *dev;
+	struct nouveau_framebuffer *nouveau_fb;
+};
+
+int nouveau_fbcon_probe(struct drm_device *dev);
+int nouveau_fbcon_remove(struct drm_device *dev, struct drm_framebuffer *fb);
+void nouveau_fbcon_restore(void);
+void nouveau_fbcon_zfill(struct drm_device *dev);
+
+void nv04_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region);
+void nv04_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect);
+void nv04_fbcon_imageblit(struct fb_info *info, const struct fb_image *image);
+int nv04_fbcon_accel_init(struct fb_info *info);
+void nv50_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect);
+void nv50_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region);
+void nv50_fbcon_imageblit(struct fb_info *info, const struct fb_image *image);
+int nv50_fbcon_accel_init(struct fb_info *info);
+
+void nouveau_fbcon_gpu_lockup(struct fb_info *info);
+#endif /* __NV50_FBCON_H__ */
+
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_drv.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_drv.c
@@ -0,0 +1,421 @@
+/*
+ * Copyright 2005 Stephane Marchesin.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <linux/console.h>
+
+#include "drmP.h"
+#include "drm.h"
+#include "drm_crtc_helper.h"
+#include "nouveau_drv.h"
+#include "nouveau_hw.h"
+#include "nouveau_fb.h"
+#include "nouveau_fbcon.h"
+#include "nv50_display.h"
+
+#include "drm_pciids.h"
+
+MODULE_PARM_DESC(ctxfw, "Use external firmware blob for grctx init (NV40)");
+int nouveau_ctxfw = 0;
+module_param_named(ctxfw, nouveau_ctxfw, int, 0400);
+
+MODULE_PARM_DESC(noagp, "Disable AGP");
+int nouveau_noagp;
+module_param_named(noagp, nouveau_noagp, int, 0400);
+
+MODULE_PARM_DESC(modeset, "Enable kernel modesetting");
+static int nouveau_modeset = -1; /* kms */
+module_param_named(modeset, nouveau_modeset, int, 0400);
+
+MODULE_PARM_DESC(vbios, "Override default VBIOS location");
+char *nouveau_vbios;
+module_param_named(vbios, nouveau_vbios, charp, 0400);
+
+MODULE_PARM_DESC(vram_pushbuf, "Force DMA push buffers to be in VRAM");
+int nouveau_vram_pushbuf;
+module_param_named(vram_pushbuf, nouveau_vram_pushbuf, int, 0400);
+
+MODULE_PARM_DESC(vram_notify, "Force DMA notifiers to be in VRAM");
+int nouveau_vram_notify = 1;
+module_param_named(vram_notify, nouveau_vram_notify, int, 0400);
+
+MODULE_PARM_DESC(duallink, "Allow dual-link TMDS (>=GeForce 8)");
+int nouveau_duallink = 1;
+module_param_named(duallink, nouveau_duallink, int, 0400);
+
+MODULE_PARM_DESC(uscript_lvds, "LVDS output script table ID (>=GeForce 8)");
+int nouveau_uscript_lvds = -1;
+module_param_named(uscript_lvds, nouveau_uscript_lvds, int, 0400);
+
+MODULE_PARM_DESC(uscript_tmds, "TMDS output script table ID (>=GeForce 8)");
+int nouveau_uscript_tmds = -1;
+module_param_named(uscript_tmds, nouveau_uscript_tmds, int, 0400);
+
+MODULE_PARM_DESC(ignorelid, "Ignore ACPI lid status");
+int nouveau_ignorelid = 0;
+module_param_named(ignorelid, nouveau_ignorelid, int, 0400);
+
+MODULE_PARM_DESC(noagp, "Disable all acceleration");
+int nouveau_noaccel = -1;
+module_param_named(noaccel, nouveau_noaccel, int, 0400);
+
+MODULE_PARM_DESC(noagp, "Disable fbcon acceleration");
+int nouveau_nofbaccel = 0;
+module_param_named(nofbaccel, nouveau_nofbaccel, int, 0400);
+
+MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
+		 "\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n"
+		 "\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n"
+		 "\t\tDefault: PAL\n"
+		 "\t\t*NOTE* Ignored for cards with external TV encoders.");
+char *nouveau_tv_norm;
+module_param_named(tv_norm, nouveau_tv_norm, charp, 0400);
+
+MODULE_PARM_DESC(reg_debug, "Register access debug bitmask:\n"
+		"\t\t0x1 mc, 0x2 video, 0x4 fb, 0x8 extdev,\n"
+		"\t\t0x10 crtc, 0x20 ramdac, 0x40 vgacrtc, 0x80 rmvio,\n"
+		"\t\t0x100 vgaattr, 0x200 EVO (G80+). ");
+int nouveau_reg_debug;
+module_param_named(reg_debug, nouveau_reg_debug, int, 0600);
+
+int nouveau_fbpercrtc;
+#if 0
+module_param_named(fbpercrtc, nouveau_fbpercrtc, int, 0400);
+#endif
+
+static struct pci_device_id pciidlist[] = {
+	{
+		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
+		.class = PCI_BASE_CLASS_DISPLAY << 16,
+		.class_mask  = 0xff << 16,
+	},
+	{
+		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
+		.class = PCI_BASE_CLASS_DISPLAY << 16,
+		.class_mask  = 0xff << 16,
+	},
+	{}
+};
+
+MODULE_DEVICE_TABLE(pci, pciidlist);
+
+static struct drm_driver driver;
+
+static int __devinit
+nouveau_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
+{
+	return drm_get_dev(pdev, ent, &driver);
+}
+
+static void
+nouveau_pci_remove(struct pci_dev *pdev)
+{
+	struct drm_device *dev = pci_get_drvdata(pdev);
+
+	drm_put_dev(dev);
+}
+
+static int
+nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
+{
+	struct drm_device *dev = pci_get_drvdata(pdev);
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_instmem_engine *pinstmem = &dev_priv->engine.instmem;
+	struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
+	struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
+	struct nouveau_channel *chan;
+	struct drm_crtc *crtc;
+	uint32_t fbdev_flags;
+	int ret, i;
+
+	if (!drm_core_check_feature(dev, DRIVER_MODESET))
+		return -ENODEV;
+
+	if (pm_state.event == PM_EVENT_PRETHAW)
+		return 0;
+
+	fbdev_flags = dev_priv->fbdev_info->flags;
+	dev_priv->fbdev_info->flags |= FBINFO_HWACCEL_DISABLED;
+
+	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
+		struct nouveau_framebuffer *nouveau_fb;
+
+		nouveau_fb = nouveau_framebuffer(crtc->fb);
+		if (!nouveau_fb || !nouveau_fb->nvbo)
+			continue;
+
+		nouveau_bo_unpin(nouveau_fb->nvbo);
+	}
+
+	NV_INFO(dev, "Evicting buffers...\n");
+	ttm_bo_evict_mm(&dev_priv->ttm.bdev, TTM_PL_VRAM);
+
+	NV_INFO(dev, "Idling channels...\n");
+	for (i = 0; i < pfifo->channels; i++) {
+		struct nouveau_fence *fence = NULL;
+
+		chan = dev_priv->fifos[i];
+		if (!chan || (dev_priv->card_type >= NV_50 &&
+			      chan == dev_priv->fifos[0]))
+			continue;
+
+		ret = nouveau_fence_new(chan, &fence, true);
+		if (ret == 0) {
+			ret = nouveau_fence_wait(fence, NULL, false, false);
+			nouveau_fence_unref((void *)&fence);
+		}
+
+		if (ret) {
+			NV_ERROR(dev, "Failed to idle channel %d for suspend\n",
+				 chan->id);
+		}
+	}
+
+	pgraph->fifo_access(dev, false);
+	nouveau_wait_for_idle(dev);
+	pfifo->reassign(dev, false);
+	pfifo->disable(dev);
+	pfifo->unload_context(dev);
+	pgraph->unload_context(dev);
+
+	NV_INFO(dev, "Suspending GPU objects...\n");
+	ret = nouveau_gpuobj_suspend(dev);
+	if (ret) {
+		NV_ERROR(dev, "... failed: %d\n", ret);
+		goto out_abort;
+	}
+
+	ret = pinstmem->suspend(dev);
+	if (ret) {
+		NV_ERROR(dev, "... failed: %d\n", ret);
+		nouveau_gpuobj_suspend_cleanup(dev);
+		goto out_abort;
+	}
+
+	NV_INFO(dev, "And we're gone!\n");
+	pci_save_state(pdev);
+	if (pm_state.event == PM_EVENT_SUSPEND) {
+		pci_disable_device(pdev);
+		pci_set_power_state(pdev, PCI_D3hot);
+	}
+
+	acquire_console_sem();
+	fb_set_suspend(dev_priv->fbdev_info, 1);
+	release_console_sem();
+	dev_priv->fbdev_info->flags = fbdev_flags;
+	return 0;
+
+out_abort:
+	NV_INFO(dev, "Re-enabling acceleration..\n");
+	pfifo->enable(dev);
+	pfifo->reassign(dev, true);
+	pgraph->fifo_access(dev, true);
+	return ret;
+}
+
+static int
+nouveau_pci_resume(struct pci_dev *pdev)
+{
+	struct drm_device *dev = pci_get_drvdata(pdev);
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_engine *engine = &dev_priv->engine;
+	struct drm_crtc *crtc;
+	uint32_t fbdev_flags;
+	int ret, i;
+
+	if (!drm_core_check_feature(dev, DRIVER_MODESET))
+		return -ENODEV;
+
+	fbdev_flags = dev_priv->fbdev_info->flags;
+	dev_priv->fbdev_info->flags |= FBINFO_HWACCEL_DISABLED;
+
+	NV_INFO(dev, "We're back, enabling device...\n");
+	pci_set_power_state(pdev, PCI_D0);
+	pci_restore_state(pdev);
+	if (pci_enable_device(pdev))
+		return -1;
+	pci_set_master(dev->pdev);
+
+	NV_INFO(dev, "POSTing device...\n");
+	ret = nouveau_run_vbios_init(dev);
+	if (ret)
+		return ret;
+
+	if (dev_priv->gart_info.type == NOUVEAU_GART_AGP) {
+		ret = nouveau_mem_init_agp(dev);
+		if (ret) {
+			NV_ERROR(dev, "error reinitialising AGP: %d\n", ret);
+			return ret;
+		}
+	}
+
+	NV_INFO(dev, "Reinitialising engines...\n");
+	engine->instmem.resume(dev);
+	engine->mc.init(dev);
+	engine->timer.init(dev);
+	engine->fb.init(dev);
+	engine->graph.init(dev);
+	engine->fifo.init(dev);
+
+	NV_INFO(dev, "Restoring GPU objects...\n");
+	nouveau_gpuobj_resume(dev);
+
+	nouveau_irq_postinstall(dev);
+
+	/* Re-write SKIPS, they'll have been lost over the suspend */
+	if (nouveau_vram_pushbuf) {
+		struct nouveau_channel *chan;
+		int j;
+
+		for (i = 0; i < dev_priv->engine.fifo.channels; i++) {
+			chan = dev_priv->fifos[i];
+			if (!chan || !chan->pushbuf_bo)
+				continue;
+
+			for (j = 0; j < NOUVEAU_DMA_SKIPS; j++)
+				nouveau_bo_wr32(chan->pushbuf_bo, i, 0);
+		}
+	}
+
+	NV_INFO(dev, "Restoring mode...\n");
+	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
+		struct nouveau_framebuffer *nouveau_fb;
+
+		nouveau_fb = nouveau_framebuffer(crtc->fb);
+		if (!nouveau_fb || !nouveau_fb->nvbo)
+			continue;
+
+		nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
+	}
+
+	if (dev_priv->card_type < NV_50) {
+		nv04_display_restore(dev);
+		NVLockVgaCrtcs(dev, false);
+	} else
+		nv50_display_init(dev);
+
+	/* Force CLUT to get re-loaded during modeset */
+	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
+		struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
+
+		nv_crtc->lut.depth = 0;
+	}
+
+	acquire_console_sem();
+	fb_set_suspend(dev_priv->fbdev_info, 0);
+	release_console_sem();
+
+	nouveau_fbcon_zfill(dev);
+
+	drm_helper_resume_force_mode(dev);
+	dev_priv->fbdev_info->flags = fbdev_flags;
+	return 0;
+}
+
+static struct drm_driver driver = {
+	.driver_features =
+		DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
+		DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM,
+	.load = nouveau_load,
+	.firstopen = nouveau_firstopen,
+	.lastclose = nouveau_lastclose,
+	.unload = nouveau_unload,
+	.preclose = nouveau_preclose,
+#if defined(CONFIG_DRM_NOUVEAU_DEBUG)
+	.debugfs_init = nouveau_debugfs_init,
+	.debugfs_cleanup = nouveau_debugfs_takedown,
+#endif
+	.irq_preinstall = nouveau_irq_preinstall,
+	.irq_postinstall = nouveau_irq_postinstall,
+	.irq_uninstall = nouveau_irq_uninstall,
+	.irq_handler = nouveau_irq_handler,
+	.reclaim_buffers = drm_core_reclaim_buffers,
+	.get_map_ofs = drm_core_get_map_ofs,
+	.get_reg_ofs = drm_core_get_reg_ofs,
+	.ioctls = nouveau_ioctls,
+	.fops = {
+		.owner = THIS_MODULE,
+		.open = drm_open,
+		.release = drm_release,
+		.unlocked_ioctl = drm_ioctl,
+		.mmap = nouveau_ttm_mmap,
+		.poll = drm_poll,
+		.fasync = drm_fasync,
+#if defined(CONFIG_COMPAT)
+		.compat_ioctl = nouveau_compat_ioctl,
+#endif
+	},
+	.pci_driver = {
+		.name = DRIVER_NAME,
+		.id_table = pciidlist,
+		.probe = nouveau_pci_probe,
+		.remove = nouveau_pci_remove,
+		.suspend = nouveau_pci_suspend,
+		.resume = nouveau_pci_resume
+	},
+
+	.gem_init_object = nouveau_gem_object_new,
+	.gem_free_object = nouveau_gem_object_del,
+
+	.name = DRIVER_NAME,
+	.desc = DRIVER_DESC,
+#ifdef GIT_REVISION
+	.date = GIT_REVISION,
+#else
+	.date = DRIVER_DATE,
+#endif
+	.major = DRIVER_MAJOR,
+	.minor = DRIVER_MINOR,
+	.patchlevel = DRIVER_PATCHLEVEL,
+};
+
+static int __init nouveau_init(void)
+{
+	driver.num_ioctls = nouveau_max_ioctl;
+
+	if (nouveau_modeset == -1) {
+#ifdef CONFIG_VGA_CONSOLE
+		if (vgacon_text_force())
+			nouveau_modeset = 0;
+		else
+#endif
+			nouveau_modeset = 1;
+	}
+
+	if (nouveau_modeset == 1)
+		driver.driver_features |= DRIVER_MODESET;
+
+	return drm_init(&driver);
+}
+
+static void __exit nouveau_exit(void)
+{
+	drm_exit(&driver);
+}
+
+module_init(nouveau_init);
+module_exit(nouveau_exit);
+
+MODULE_AUTHOR(DRIVER_AUTHOR);
+MODULE_DESCRIPTION(DRIVER_DESC);
+MODULE_LICENSE("GPL and additional rights");
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv50_graph.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv50_graph.c
@@ -0,0 +1,400 @@
+/*
+ * Copyright (C) 2007 Ben Skeggs.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include "drmP.h"
+#include "drm.h"
+#include "nouveau_drv.h"
+
+#include "nouveau_grctx.h"
+
+#define IS_G80 ((dev_priv->chipset & 0xf0) == 0x50)
+
+static void
+nv50_graph_init_reset(struct drm_device *dev)
+{
+	uint32_t pmc_e = NV_PMC_ENABLE_PGRAPH | (1 << 21);
+
+	NV_DEBUG(dev, "\n");
+
+	nv_wr32(dev, NV03_PMC_ENABLE, nv_rd32(dev, NV03_PMC_ENABLE) & ~pmc_e);
+	nv_wr32(dev, NV03_PMC_ENABLE, nv_rd32(dev, NV03_PMC_ENABLE) |  pmc_e);
+}
+
+static void
+nv50_graph_init_intr(struct drm_device *dev)
+{
+	NV_DEBUG(dev, "\n");
+
+	nv_wr32(dev, NV03_PGRAPH_INTR, 0xffffffff);
+	nv_wr32(dev, 0x400138, 0xffffffff);
+	nv_wr32(dev, NV40_PGRAPH_INTR_EN, 0xffffffff);
+}
+
+static void
+nv50_graph_init_regs__nv(struct drm_device *dev)
+{
+	NV_DEBUG(dev, "\n");
+
+	nv_wr32(dev, 0x400804, 0xc0000000);
+	nv_wr32(dev, 0x406800, 0xc0000000);
+	nv_wr32(dev, 0x400c04, 0xc0000000);
+	nv_wr32(dev, 0x401800, 0xc0000000);
+	nv_wr32(dev, 0x405018, 0xc0000000);
+	nv_wr32(dev, 0x402000, 0xc0000000);
+
+	nv_wr32(dev, 0x400108, 0xffffffff);
+
+	nv_wr32(dev, 0x400824, 0x00004000);
+	nv_wr32(dev, 0x400500, 0x00010001);
+}
+
+static void
+nv50_graph_init_regs(struct drm_device *dev)
+{
+	NV_DEBUG(dev, "\n");
+
+	nv_wr32(dev, NV04_PGRAPH_DEBUG_3,
+				(1 << 2) /* HW_CONTEXT_SWITCH_ENABLED */);
+	nv_wr32(dev, 0x402ca8, 0x800);
+}
+
+static int
+nv50_graph_init_ctxctl(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+	NV_DEBUG(dev, "\n");
+
+	if (nouveau_ctxfw) {
+		nouveau_grctx_prog_load(dev);
+		dev_priv->engine.graph.grctx_size = 0x70000;
+	}
+	if (!dev_priv->engine.graph.ctxprog) {
+		struct nouveau_grctx ctx = {};
+		uint32_t *cp = kmalloc(512 * 4, GFP_KERNEL);
+		int i;
+		if (!cp) {
+			NV_ERROR(dev, "Couldn't alloc ctxprog! Disabling acceleration.\n");
+			dev_priv->engine.graph.accel_blocked = true;
+			return 0;
+		}
+		ctx.dev = dev;
+		ctx.mode = NOUVEAU_GRCTX_PROG;
+		ctx.data = cp;
+		ctx.ctxprog_max = 512;
+		if (!nv50_grctx_init(&ctx)) {
+			dev_priv->engine.graph.grctx_size = ctx.ctxvals_pos * 4;
+
+			nv_wr32(dev, NV40_PGRAPH_CTXCTL_UCODE_INDEX, 0);
+			for (i = 0; i < ctx.ctxprog_len; i++)
+				nv_wr32(dev, NV40_PGRAPH_CTXCTL_UCODE_DATA, cp[i]);
+		} else {
+			dev_priv->engine.graph.accel_blocked = true;
+		}
+		kfree(cp);
+	}
+
+	nv_wr32(dev, 0x400320, 4);
+	nv_wr32(dev, NV40_PGRAPH_CTXCTL_CUR, 0);
+	nv_wr32(dev, NV20_PGRAPH_CHANNEL_CTX_POINTER, 0);
+	return 0;
+}
+
+int
+nv50_graph_init(struct drm_device *dev)
+{
+	int ret;
+
+	NV_DEBUG(dev, "\n");
+
+	nv50_graph_init_reset(dev);
+	nv50_graph_init_regs__nv(dev);
+	nv50_graph_init_regs(dev);
+	nv50_graph_init_intr(dev);
+
+	ret = nv50_graph_init_ctxctl(dev);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+void
+nv50_graph_takedown(struct drm_device *dev)
+{
+	NV_DEBUG(dev, "\n");
+	nouveau_grctx_fini(dev);
+}
+
+void
+nv50_graph_fifo_access(struct drm_device *dev, bool enabled)
+{
+	const uint32_t mask = 0x00010001;
+
+	if (enabled)
+		nv_wr32(dev, 0x400500, nv_rd32(dev, 0x400500) | mask);
+	else
+		nv_wr32(dev, 0x400500, nv_rd32(dev, 0x400500) & ~mask);
+}
+
+struct nouveau_channel *
+nv50_graph_channel(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	uint32_t inst;
+	int i;
+
+	/* Be sure we're not in the middle of a context switch or bad things
+	 * will happen, such as unloading the wrong pgraph context.
+	 */
+	if (!nv_wait(0x400300, 0x00000001, 0x00000000))
+		NV_ERROR(dev, "Ctxprog is still running\n");
+
+	inst = nv_rd32(dev, NV50_PGRAPH_CTXCTL_CUR);
+	if (!(inst & NV50_PGRAPH_CTXCTL_CUR_LOADED))
+		return NULL;
+	inst = (inst & NV50_PGRAPH_CTXCTL_CUR_INSTANCE) << 12;
+
+	for (i = 0; i < dev_priv->engine.fifo.channels; i++) {
+		struct nouveau_channel *chan = dev_priv->fifos[i];
+
+		if (chan && chan->ramin && chan->ramin->instance == inst)
+			return chan;
+	}
+
+	return NULL;
+}
+
+int
+nv50_graph_create_context(struct nouveau_channel *chan)
+{
+	struct drm_device *dev = chan->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_gpuobj *ramin = chan->ramin->gpuobj;
+	struct nouveau_gpuobj *ctx;
+	struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
+	int hdr, ret;
+
+	NV_DEBUG(dev, "ch%d\n", chan->id);
+
+	ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, pgraph->grctx_size,
+				     0x1000, NVOBJ_FLAG_ZERO_ALLOC |
+				     NVOBJ_FLAG_ZERO_FREE, &chan->ramin_grctx);
+	if (ret)
+		return ret;
+	ctx = chan->ramin_grctx->gpuobj;
+
+	hdr = IS_G80 ? 0x200 : 0x20;
+	dev_priv->engine.instmem.prepare_access(dev, true);
+	nv_wo32(dev, ramin, (hdr + 0x00)/4, 0x00190002);
+	nv_wo32(dev, ramin, (hdr + 0x04)/4, chan->ramin_grctx->instance +
+					   pgraph->grctx_size - 1);
+	nv_wo32(dev, ramin, (hdr + 0x08)/4, chan->ramin_grctx->instance);
+	nv_wo32(dev, ramin, (hdr + 0x0c)/4, 0);
+	nv_wo32(dev, ramin, (hdr + 0x10)/4, 0);
+	nv_wo32(dev, ramin, (hdr + 0x14)/4, 0x00010000);
+	dev_priv->engine.instmem.finish_access(dev);
+
+	dev_priv->engine.instmem.prepare_access(dev, true);
+	if (!pgraph->ctxprog) {
+		struct nouveau_grctx ctx = {};
+		ctx.dev = chan->dev;
+		ctx.mode = NOUVEAU_GRCTX_VALS;
+		ctx.data = chan->ramin_grctx->gpuobj;
+		nv50_grctx_init(&ctx);
+	} else {
+		nouveau_grctx_vals_load(dev, ctx);
+	}
+	nv_wo32(dev, ctx, 0x00000/4, chan->ramin->instance >> 12);
+	dev_priv->engine.instmem.finish_access(dev);
+
+	return 0;
+}
+
+void
+nv50_graph_destroy_context(struct nouveau_channel *chan)
+{
+	struct drm_device *dev = chan->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	int i, hdr = IS_G80 ? 0x200 : 0x20;
+
+	NV_DEBUG(dev, "ch%d\n", chan->id);
+
+	if (!chan->ramin || !chan->ramin->gpuobj)
+		return;
+
+	dev_priv->engine.instmem.prepare_access(dev, true);
+	for (i = hdr; i < hdr + 24; i += 4)
+		nv_wo32(dev, chan->ramin->gpuobj, i/4, 0);
+	dev_priv->engine.instmem.finish_access(dev);
+
+	nouveau_gpuobj_ref_del(dev, &chan->ramin_grctx);
+}
+
+static int
+nv50_graph_do_load_context(struct drm_device *dev, uint32_t inst)
+{
+	uint32_t fifo = nv_rd32(dev, 0x400500);
+
+	nv_wr32(dev, 0x400500, fifo & ~1);
+	nv_wr32(dev, 0x400784, inst);
+	nv_wr32(dev, 0x400824, nv_rd32(dev, 0x400824) | 0x40);
+	nv_wr32(dev, 0x400320, nv_rd32(dev, 0x400320) | 0x11);
+	nv_wr32(dev, 0x400040, 0xffffffff);
+	(void)nv_rd32(dev, 0x400040);
+	nv_wr32(dev, 0x400040, 0x00000000);
+	nv_wr32(dev, 0x400304, nv_rd32(dev, 0x400304) | 1);
+
+	if (nouveau_wait_for_idle(dev))
+		nv_wr32(dev, 0x40032c, inst | (1<<31));
+	nv_wr32(dev, 0x400500, fifo);
+
+	return 0;
+}
+
+int
+nv50_graph_load_context(struct nouveau_channel *chan)
+{
+	uint32_t inst = chan->ramin->instance >> 12;
+
+	NV_DEBUG(chan->dev, "ch%d\n", chan->id);
+	return nv50_graph_do_load_context(chan->dev, inst);
+}
+
+int
+nv50_graph_unload_context(struct drm_device *dev)
+{
+	uint32_t inst;
+
+	inst  = nv_rd32(dev, NV50_PGRAPH_CTXCTL_CUR);
+	if (!(inst & NV50_PGRAPH_CTXCTL_CUR_LOADED))
+		return 0;
+	inst &= NV50_PGRAPH_CTXCTL_CUR_INSTANCE;
+
+	nouveau_wait_for_idle(dev);
+	nv_wr32(dev, 0x400784, inst);
+	nv_wr32(dev, 0x400824, nv_rd32(dev, 0x400824) | 0x20);
+	nv_wr32(dev, 0x400304, nv_rd32(dev, 0x400304) | 0x01);
+	nouveau_wait_for_idle(dev);
+
+	nv_wr32(dev, NV50_PGRAPH_CTXCTL_CUR, inst);
+	return 0;
+}
+
+void
+nv50_graph_context_switch(struct drm_device *dev)
+{
+	uint32_t inst;
+
+	nv50_graph_unload_context(dev);
+
+	inst  = nv_rd32(dev, NV50_PGRAPH_CTXCTL_NEXT);
+	inst &= NV50_PGRAPH_CTXCTL_NEXT_INSTANCE;
+	nv50_graph_do_load_context(dev, inst);
+
+	nv_wr32(dev, NV40_PGRAPH_INTR_EN, nv_rd32(dev,
+		NV40_PGRAPH_INTR_EN) | NV_PGRAPH_INTR_CONTEXT_SWITCH);
+}
+
+static int
+nv50_graph_nvsw_dma_vblsem(struct nouveau_channel *chan, int grclass,
+			   int mthd, uint32_t data)
+{
+	struct nouveau_gpuobj_ref *ref = NULL;
+
+	if (nouveau_gpuobj_ref_find(chan, data, &ref))
+		return -ENOENT;
+
+	if (nouveau_notifier_offset(ref->gpuobj, NULL))
+		return -EINVAL;
+
+	chan->nvsw.vblsem = ref->gpuobj;
+	chan->nvsw.vblsem_offset = ~0;
+	return 0;
+}
+
+static int
+nv50_graph_nvsw_vblsem_offset(struct nouveau_channel *chan, int grclass,
+			      int mthd, uint32_t data)
+{
+	if (nouveau_notifier_offset(chan->nvsw.vblsem, &data))
+		return -ERANGE;
+
+	chan->nvsw.vblsem_offset = data >> 2;
+	return 0;
+}
+
+static int
+nv50_graph_nvsw_vblsem_release_val(struct nouveau_channel *chan, int grclass,
+				   int mthd, uint32_t data)
+{
+	chan->nvsw.vblsem_rval = data;
+	return 0;
+}
+
+static int
+nv50_graph_nvsw_vblsem_release(struct nouveau_channel *chan, int grclass,
+			       int mthd, uint32_t data)
+{
+	struct drm_device *dev = chan->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+	if (!chan->nvsw.vblsem || chan->nvsw.vblsem_offset == ~0 || data > 1)
+		return -EINVAL;
+
+	if (!(nv_rd32(dev, NV50_PDISPLAY_INTR_EN) &
+		      NV50_PDISPLAY_INTR_EN_VBLANK_CRTC_(data))) {
+		nv_wr32(dev, NV50_PDISPLAY_INTR_1,
+			NV50_PDISPLAY_INTR_1_VBLANK_CRTC_(data));
+		nv_wr32(dev, NV50_PDISPLAY_INTR_EN, nv_rd32(dev,
+			NV50_PDISPLAY_INTR_EN) |
+			NV50_PDISPLAY_INTR_EN_VBLANK_CRTC_(data));
+	}
+
+	list_add(&chan->nvsw.vbl_wait, &dev_priv->vbl_waiting);
+	return 0;
+}
+
+static struct nouveau_pgraph_object_method nv50_graph_nvsw_methods[] = {
+	{ 0x018c, nv50_graph_nvsw_dma_vblsem },
+	{ 0x0400, nv50_graph_nvsw_vblsem_offset },
+	{ 0x0404, nv50_graph_nvsw_vblsem_release_val },
+	{ 0x0408, nv50_graph_nvsw_vblsem_release },
+	{}
+};
+
+struct nouveau_pgraph_object_class nv50_graph_grclass[] = {
+	{ 0x506e, true, nv50_graph_nvsw_methods }, /* nvsw */
+	{ 0x0030, false, NULL }, /* null */
+	{ 0x5039, false, NULL }, /* m2mf */
+	{ 0x502d, false, NULL }, /* 2d */
+	{ 0x50c0, false, NULL }, /* compute */
+	{ 0x5097, false, NULL }, /* tesla (nv50) */
+	{ 0x8297, false, NULL }, /* tesla (nv80/nv90) */
+	{ 0x8397, false, NULL }, /* tesla (nva0) */
+	{ 0x8597, false, NULL }, /* tesla (nva8) */
+	{}
+};
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -0,0 +1,773 @@
+/*
+ * Copyright 2007 Dave Airlied
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+/*
+ * Authors: Dave Airlied <airlied@linux.ie>
+ *	    Ben Skeggs   <darktama@iinet.net.au>
+ *	    Jeremy Kolb  <jkolb@brandeis.edu>
+ */
+
+#include "drmP.h"
+
+#include "nouveau_drm.h"
+#include "nouveau_drv.h"
+#include "nouveau_dma.h"
+
+#include <linux/log2.h>
+
+static void
+nouveau_bo_del_ttm(struct ttm_buffer_object *bo)
+{
+	struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
+	struct drm_device *dev = dev_priv->dev;
+	struct nouveau_bo *nvbo = nouveau_bo(bo);
+
+	ttm_bo_kunmap(&nvbo->kmap);
+
+	if (unlikely(nvbo->gem))
+		DRM_ERROR("bo %p still attached to GEM object\n", bo);
+
+	if (nvbo->tile)
+		nv10_mem_expire_tiling(dev, nvbo->tile, NULL);
+
+	spin_lock(&dev_priv->ttm.bo_list_lock);
+	list_del(&nvbo->head);
+	spin_unlock(&dev_priv->ttm.bo_list_lock);
+	kfree(nvbo);
+}
+
+static void
+nouveau_bo_fixup_align(struct drm_device *dev,
+		       uint32_t tile_mode, uint32_t tile_flags,
+		       int *align, int *size)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+	/*
+	 * Some of the tile_flags have a periodic structure of N*4096 bytes,
+	 * align to to that as well as the page size. Align the size to the
+	 * appropriate boundaries. This does imply that sizes are rounded up
+	 * 3-7 pages, so be aware of this and do not waste memory by allocating
+	 * many small buffers.
+	 */
+	if (dev_priv->card_type == NV_50) {
+		uint32_t block_size = nouveau_mem_fb_amount(dev) >> 15;
+		int i;
+
+		switch (tile_flags) {
+		case 0x1800:
+		case 0x2800:
+		case 0x4800:
+		case 0x7a00:
+			if (is_power_of_2(block_size)) {
+				for (i = 1; i < 10; i++) {
+					*align = 12 * i * block_size;
+					if (!(*align % 65536))
+						break;
+				}
+			} else {
+				for (i = 1; i < 10; i++) {
+					*align = 8 * i * block_size;
+					if (!(*align % 65536))
+						break;
+				}
+			}
+			*size = roundup(*size, *align);
+			break;
+		default:
+			break;
+		}
+
+	} else {
+		if (tile_mode) {
+			if (dev_priv->chipset >= 0x40) {
+				*align = 65536;
+				*size = roundup(*size, 64 * tile_mode);
+
+			} else if (dev_priv->chipset >= 0x30) {
+				*align = 32768;
+				*size = roundup(*size, 64 * tile_mode);
+
+			} else if (dev_priv->chipset >= 0x20) {
+				*align = 16384;
+				*size = roundup(*size, 64 * tile_mode);
+
+			} else if (dev_priv->chipset >= 0x10) {
+				*align = 16384;
+				*size = roundup(*size, 32 * tile_mode);
+			}
+		}
+	}
+
+	/* ALIGN works only on powers of two. */
+	*size = roundup(*size, PAGE_SIZE);
+
+	if (dev_priv->card_type == NV_50) {
+		*size = roundup(*size, 65536);
+		*align = max(65536, *align);
+	}
+}
+
+int
+nouveau_bo_new(struct drm_device *dev, struct nouveau_channel *chan,
+	       int size, int align, uint32_t flags, uint32_t tile_mode,
+	       uint32_t tile_flags, bool no_vm, bool mappable,
+	       struct nouveau_bo **pnvbo)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_bo *nvbo;
+	int ret = 0;
+
+	nvbo = kzalloc(sizeof(struct nouveau_bo), GFP_KERNEL);
+	if (!nvbo)
+		return -ENOMEM;
+	INIT_LIST_HEAD(&nvbo->head);
+	INIT_LIST_HEAD(&nvbo->entry);
+	nvbo->mappable = mappable;
+	nvbo->no_vm = no_vm;
+	nvbo->tile_mode = tile_mode;
+	nvbo->tile_flags = tile_flags;
+
+	nouveau_bo_fixup_align(dev, tile_mode, tile_flags, &align, &size);
+	align >>= PAGE_SHIFT;
+
+	nvbo->placement.fpfn = 0;
+	nvbo->placement.lpfn = mappable ? dev_priv->fb_mappable_pages : 0;
+	nouveau_bo_placement_set(nvbo, flags);
+
+	nvbo->channel = chan;
+	ret = ttm_bo_init(&dev_priv->ttm.bdev, &nvbo->bo, size,
+			  ttm_bo_type_device, &nvbo->placement, align, 0,
+			  false, NULL, size, nouveau_bo_del_ttm);
+	nvbo->channel = NULL;
+	if (ret) {
+		/* ttm will call nouveau_bo_del_ttm if it fails.. */
+		return ret;
+	}
+
+	spin_lock(&dev_priv->ttm.bo_list_lock);
+	list_add_tail(&nvbo->head, &dev_priv->ttm.bo_list);
+	spin_unlock(&dev_priv->ttm.bo_list_lock);
+	*pnvbo = nvbo;
+	return 0;
+}
+
+void
+nouveau_bo_placement_set(struct nouveau_bo *nvbo, uint32_t memtype)
+{
+	int n = 0;
+
+	if (memtype & TTM_PL_FLAG_VRAM)
+		nvbo->placements[n++] = TTM_PL_FLAG_VRAM | TTM_PL_MASK_CACHING;
+	if (memtype & TTM_PL_FLAG_TT)
+		nvbo->placements[n++] = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING;
+	if (memtype & TTM_PL_FLAG_SYSTEM)
+		nvbo->placements[n++] = TTM_PL_FLAG_SYSTEM | TTM_PL_MASK_CACHING;
+	nvbo->placement.placement = nvbo->placements;
+	nvbo->placement.busy_placement = nvbo->placements;
+	nvbo->placement.num_placement = n;
+	nvbo->placement.num_busy_placement = n;
+
+	if (nvbo->pin_refcnt) {
+		while (n--)
+			nvbo->placements[n] |= TTM_PL_FLAG_NO_EVICT;
+	}
+}
+
+int
+nouveau_bo_pin(struct nouveau_bo *nvbo, uint32_t memtype)
+{
+	struct drm_nouveau_private *dev_priv = nouveau_bdev(nvbo->bo.bdev);
+	struct ttm_buffer_object *bo = &nvbo->bo;
+	int ret, i;
+
+	if (nvbo->pin_refcnt && !(memtype & (1 << bo->mem.mem_type))) {
+		NV_ERROR(nouveau_bdev(bo->bdev)->dev,
+			 "bo %p pinned elsewhere: 0x%08x vs 0x%08x\n", bo,
+			 1 << bo->mem.mem_type, memtype);
+		return -EINVAL;
+	}
+
+	if (nvbo->pin_refcnt++)
+		return 0;
+
+	ret = ttm_bo_reserve(bo, false, false, false, 0);
+	if (ret)
+		goto out;
+
+	nouveau_bo_placement_set(nvbo, memtype);
+	for (i = 0; i < nvbo->placement.num_placement; i++)
+		nvbo->placements[i] |= TTM_PL_FLAG_NO_EVICT;
+
+	ret = ttm_bo_validate(bo, &nvbo->placement, false, false);
+	if (ret == 0) {
+		switch (bo->mem.mem_type) {
+		case TTM_PL_VRAM:
+			dev_priv->fb_aper_free -= bo->mem.size;
+			break;
+		case TTM_PL_TT:
+			dev_priv->gart_info.aper_free -= bo->mem.size;
+			break;
+		default:
+			break;
+		}
+	}
+	ttm_bo_unreserve(bo);
+out:
+	if (unlikely(ret))
+		nvbo->pin_refcnt--;
+	return ret;
+}
+
+int
+nouveau_bo_unpin(struct nouveau_bo *nvbo)
+{
+	struct drm_nouveau_private *dev_priv = nouveau_bdev(nvbo->bo.bdev);
+	struct ttm_buffer_object *bo = &nvbo->bo;
+	int ret, i;
+
+	if (--nvbo->pin_refcnt)
+		return 0;
+
+	ret = ttm_bo_reserve(bo, false, false, false, 0);
+	if (ret)
+		return ret;
+
+	for (i = 0; i < nvbo->placement.num_placement; i++)
+		nvbo->placements[i] &= ~TTM_PL_FLAG_NO_EVICT;
+
+	ret = ttm_bo_validate(bo, &nvbo->placement, false, false);
+	if (ret == 0) {
+		switch (bo->mem.mem_type) {
+		case TTM_PL_VRAM:
+			dev_priv->fb_aper_free += bo->mem.size;
+			break;
+		case TTM_PL_TT:
+			dev_priv->gart_info.aper_free += bo->mem.size;
+			break;
+		default:
+			break;
+		}
+	}
+
+	ttm_bo_unreserve(bo);
+	return ret;
+}
+
+int
+nouveau_bo_map(struct nouveau_bo *nvbo)
+{
+	int ret;
+
+	ret = ttm_bo_reserve(&nvbo->bo, false, false, false, 0);
+	if (ret)
+		return ret;
+
+	ret = ttm_bo_kmap(&nvbo->bo, 0, nvbo->bo.mem.num_pages, &nvbo->kmap);
+	ttm_bo_unreserve(&nvbo->bo);
+	return ret;
+}
+
+void
+nouveau_bo_unmap(struct nouveau_bo *nvbo)
+{
+	ttm_bo_kunmap(&nvbo->kmap);
+}
+
+u16
+nouveau_bo_rd16(struct nouveau_bo *nvbo, unsigned index)
+{
+	bool is_iomem;
+	u16 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
+	mem = &mem[index];
+	if (is_iomem)
+		return ioread16_native((void __force __iomem *)mem);
+	else
+		return *mem;
+}
+
+void
+nouveau_bo_wr16(struct nouveau_bo *nvbo, unsigned index, u16 val)
+{
+	bool is_iomem;
+	u16 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
+	mem = &mem[index];
+	if (is_iomem)
+		iowrite16_native(val, (void __force __iomem *)mem);
+	else
+		*mem = val;
+}
+
+u32
+nouveau_bo_rd32(struct nouveau_bo *nvbo, unsigned index)
+{
+	bool is_iomem;
+	u32 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
+	mem = &mem[index];
+	if (is_iomem)
+		return ioread32_native((void __force __iomem *)mem);
+	else
+		return *mem;
+}
+
+void
+nouveau_bo_wr32(struct nouveau_bo *nvbo, unsigned index, u32 val)
+{
+	bool is_iomem;
+	u32 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
+	mem = &mem[index];
+	if (is_iomem)
+		iowrite32_native(val, (void __force __iomem *)mem);
+	else
+		*mem = val;
+}
+
+static struct ttm_backend *
+nouveau_bo_create_ttm_backend_entry(struct ttm_bo_device *bdev)
+{
+	struct drm_nouveau_private *dev_priv = nouveau_bdev(bdev);
+	struct drm_device *dev = dev_priv->dev;
+
+	switch (dev_priv->gart_info.type) {
+#if __OS_HAS_AGP
+	case NOUVEAU_GART_AGP:
+		return ttm_agp_backend_init(bdev, dev->agp->bridge);
+#endif
+	case NOUVEAU_GART_SGDMA:
+		return nouveau_sgdma_init_ttm(dev);
+	default:
+		NV_ERROR(dev, "Unknown GART type %d\n",
+			 dev_priv->gart_info.type);
+		break;
+	}
+
+	return NULL;
+}
+
+static int
+nouveau_bo_invalidate_caches(struct ttm_bo_device *bdev, uint32_t flags)
+{
+	/* We'll do this from user space. */
+	return 0;
+}
+
+static int
+nouveau_bo_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
+			 struct ttm_mem_type_manager *man)
+{
+	struct drm_nouveau_private *dev_priv = nouveau_bdev(bdev);
+	struct drm_device *dev = dev_priv->dev;
+
+	switch (type) {
+	case TTM_PL_SYSTEM:
+		man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
+		man->available_caching = TTM_PL_MASK_CACHING;
+		man->default_caching = TTM_PL_FLAG_CACHED;
+		break;
+	case TTM_PL_VRAM:
+		man->flags = TTM_MEMTYPE_FLAG_FIXED |
+			     TTM_MEMTYPE_FLAG_MAPPABLE |
+			     TTM_MEMTYPE_FLAG_NEEDS_IOREMAP;
+		man->available_caching = TTM_PL_FLAG_UNCACHED |
+					 TTM_PL_FLAG_WC;
+		man->default_caching = TTM_PL_FLAG_WC;
+
+		man->io_addr = NULL;
+		man->io_offset = drm_get_resource_start(dev, 1);
+		man->io_size = drm_get_resource_len(dev, 1);
+		if (man->io_size > nouveau_mem_fb_amount(dev))
+			man->io_size = nouveau_mem_fb_amount(dev);
+
+		man->gpu_offset = dev_priv->vm_vram_base;
+		break;
+	case TTM_PL_TT:
+		switch (dev_priv->gart_info.type) {
+		case NOUVEAU_GART_AGP:
+			man->flags = TTM_MEMTYPE_FLAG_MAPPABLE |
+				     TTM_MEMTYPE_FLAG_NEEDS_IOREMAP;
+			man->available_caching = TTM_PL_FLAG_UNCACHED;
+			man->default_caching = TTM_PL_FLAG_UNCACHED;
+			break;
+		case NOUVEAU_GART_SGDMA:
+			man->flags = TTM_MEMTYPE_FLAG_MAPPABLE |
+				     TTM_MEMTYPE_FLAG_CMA;
+			man->available_caching = TTM_PL_MASK_CACHING;
+			man->default_caching = TTM_PL_FLAG_CACHED;
+			break;
+		default:
+			NV_ERROR(dev, "Unknown GART type: %d\n",
+				 dev_priv->gart_info.type);
+			return -EINVAL;
+		}
+
+		man->io_offset  = dev_priv->gart_info.aper_base;
+		man->io_size    = dev_priv->gart_info.aper_size;
+		man->io_addr   = NULL;
+		man->gpu_offset = dev_priv->vm_gart_base;
+		break;
+	default:
+		NV_ERROR(dev, "Unsupported memory type %u\n", (unsigned)type);
+		return -EINVAL;
+	}
+	return 0;
+}
+
+static void
+nouveau_bo_evict_flags(struct ttm_buffer_object *bo, struct ttm_placement *pl)
+{
+	struct nouveau_bo *nvbo = nouveau_bo(bo);
+
+	switch (bo->mem.mem_type) {
+	case TTM_PL_VRAM:
+		nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_TT |
+					 TTM_PL_FLAG_SYSTEM);
+		break;
+	default:
+		nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_SYSTEM);
+		break;
+	}
+
+	*pl = nvbo->placement;
+}
+
+
+/* GPU-assisted copy using NV_MEMORY_TO_MEMORY_FORMAT, can access
+ * TTM_PL_{VRAM,TT} directly.
+ */
+
+static int
+nouveau_bo_move_accel_cleanup(struct nouveau_channel *chan,
+			      struct nouveau_bo *nvbo, bool evict, bool no_wait,
+			      struct ttm_mem_reg *new_mem)
+{
+	struct nouveau_fence *fence = NULL;
+	int ret;
+
+	ret = nouveau_fence_new(chan, &fence, true);
+	if (ret)
+		return ret;
+
+	ret = ttm_bo_move_accel_cleanup(&nvbo->bo, fence, NULL,
+					evict, no_wait, new_mem);
+	if (nvbo->channel && nvbo->channel != chan)
+		ret = nouveau_fence_wait(fence, NULL, false, false);
+	nouveau_fence_unref((void *)&fence);
+	return ret;
+}
+
+static inline uint32_t
+nouveau_bo_mem_ctxdma(struct nouveau_bo *nvbo, struct nouveau_channel *chan,
+		      struct ttm_mem_reg *mem)
+{
+	if (chan == nouveau_bdev(nvbo->bo.bdev)->channel) {
+		if (mem->mem_type == TTM_PL_TT)
+			return NvDmaGART;
+		return NvDmaVRAM;
+	}
+
+	if (mem->mem_type == TTM_PL_TT)
+		return chan->gart_handle;
+	return chan->vram_handle;
+}
+
+static int
+nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int evict, bool intr,
+		     int no_wait, struct ttm_mem_reg *new_mem)
+{
+	struct nouveau_bo *nvbo = nouveau_bo(bo);
+	struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
+	struct ttm_mem_reg *old_mem = &bo->mem;
+	struct nouveau_channel *chan;
+	uint64_t src_offset, dst_offset;
+	uint32_t page_count;
+	int ret;
+
+	chan = nvbo->channel;
+	if (!chan || nvbo->tile_flags || nvbo->no_vm)
+		chan = dev_priv->channel;
+
+	src_offset = old_mem->mm_node->start << PAGE_SHIFT;
+	dst_offset = new_mem->mm_node->start << PAGE_SHIFT;
+	if (chan != dev_priv->channel) {
+		if (old_mem->mem_type == TTM_PL_TT)
+			src_offset += dev_priv->vm_gart_base;
+		else
+			src_offset += dev_priv->vm_vram_base;
+
+		if (new_mem->mem_type == TTM_PL_TT)
+			dst_offset += dev_priv->vm_gart_base;
+		else
+			dst_offset += dev_priv->vm_vram_base;
+	}
+
+	ret = RING_SPACE(chan, 3);
+	if (ret)
+		return ret;
+	BEGIN_RING(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_DMA_SOURCE, 2);
+	OUT_RING(chan, nouveau_bo_mem_ctxdma(nvbo, chan, old_mem));
+	OUT_RING(chan, nouveau_bo_mem_ctxdma(nvbo, chan, new_mem));
+
+	if (dev_priv->card_type >= NV_50) {
+		ret = RING_SPACE(chan, 4);
+		if (ret)
+			return ret;
+		BEGIN_RING(chan, NvSubM2MF, 0x0200, 1);
+		OUT_RING(chan, 1);
+		BEGIN_RING(chan, NvSubM2MF, 0x021c, 1);
+		OUT_RING(chan, 1);
+	}
+
+	page_count = new_mem->num_pages;
+	while (page_count) {
+		int line_count = (page_count > 2047) ? 2047 : page_count;
+
+		if (dev_priv->card_type >= NV_50) {
+			ret = RING_SPACE(chan, 3);
+			if (ret)
+				return ret;
+			BEGIN_RING(chan, NvSubM2MF, 0x0238, 2);
+			OUT_RING(chan, upper_32_bits(src_offset));
+			OUT_RING(chan, upper_32_bits(dst_offset));
+		}
+		ret = RING_SPACE(chan, 11);
+		if (ret)
+			return ret;
+		BEGIN_RING(chan, NvSubM2MF,
+				 NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
+		OUT_RING(chan, lower_32_bits(src_offset));
+		OUT_RING(chan, lower_32_bits(dst_offset));
+		OUT_RING(chan, PAGE_SIZE); /* src_pitch */
+		OUT_RING(chan, PAGE_SIZE); /* dst_pitch */
+		OUT_RING(chan, PAGE_SIZE); /* line_length */
+		OUT_RING(chan, line_count);
+		OUT_RING(chan, (1<<8)|(1<<0));
+		OUT_RING(chan, 0);
+		BEGIN_RING(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_NOP, 1);
+		OUT_RING(chan, 0);
+
+		page_count -= line_count;
+		src_offset += (PAGE_SIZE * line_count);
+		dst_offset += (PAGE_SIZE * line_count);
+	}
+
+	return nouveau_bo_move_accel_cleanup(chan, nvbo, evict, no_wait, new_mem);
+}
+
+static int
+nouveau_bo_move_flipd(struct ttm_buffer_object *bo, bool evict, bool intr,
+		      bool no_wait, struct ttm_mem_reg *new_mem)
+{
+	u32 placement_memtype = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING;
+	struct ttm_placement placement;
+	struct ttm_mem_reg tmp_mem;
+	int ret;
+
+	placement.fpfn = placement.lpfn = 0;
+	placement.num_placement = placement.num_busy_placement = 1;
+	placement.placement = placement.busy_placement = &placement_memtype;
+
+	tmp_mem = *new_mem;
+	tmp_mem.mm_node = NULL;
+	ret = ttm_bo_mem_space(bo, &placement, &tmp_mem, intr, no_wait);
+	if (ret)
+		return ret;
+
+	ret = ttm_tt_bind(bo->ttm, &tmp_mem);
+	if (ret)
+		goto out;
+
+	ret = nouveau_bo_move_m2mf(bo, true, intr, no_wait, &tmp_mem);
+	if (ret)
+		goto out;
+
+	ret = ttm_bo_move_ttm(bo, evict, no_wait, new_mem);
+out:
+	if (tmp_mem.mm_node) {
+		spin_lock(&bo->bdev->glob->lru_lock);
+		drm_mm_put_block(tmp_mem.mm_node);
+		spin_unlock(&bo->bdev->glob->lru_lock);
+	}
+
+	return ret;
+}
+
+static int
+nouveau_bo_move_flips(struct ttm_buffer_object *bo, bool evict, bool intr,
+		      bool no_wait, struct ttm_mem_reg *new_mem)
+{
+	u32 placement_memtype = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING;
+	struct ttm_placement placement;
+	struct ttm_mem_reg tmp_mem;
+	int ret;
+
+	placement.fpfn = placement.lpfn = 0;
+	placement.num_placement = placement.num_busy_placement = 1;
+	placement.placement = placement.busy_placement = &placement_memtype;
+
+	tmp_mem = *new_mem;
+	tmp_mem.mm_node = NULL;
+	ret = ttm_bo_mem_space(bo, &placement, &tmp_mem, intr, no_wait);
+	if (ret)
+		return ret;
+
+	ret = ttm_bo_move_ttm(bo, evict, no_wait, &tmp_mem);
+	if (ret)
+		goto out;
+
+	ret = nouveau_bo_move_m2mf(bo, evict, intr, no_wait, new_mem);
+	if (ret)
+		goto out;
+
+out:
+	if (tmp_mem.mm_node) {
+		spin_lock(&bo->bdev->glob->lru_lock);
+		drm_mm_put_block(tmp_mem.mm_node);
+		spin_unlock(&bo->bdev->glob->lru_lock);
+	}
+
+	return ret;
+}
+
+static int
+nouveau_bo_vm_bind(struct ttm_buffer_object *bo, struct ttm_mem_reg *new_mem,
+		   struct nouveau_tile_reg **new_tile)
+{
+	struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
+	struct drm_device *dev = dev_priv->dev;
+	struct nouveau_bo *nvbo = nouveau_bo(bo);
+	uint64_t offset;
+	int ret;
+
+	if (nvbo->no_vm || new_mem->mem_type != TTM_PL_VRAM) {
+		/* Nothing to do. */
+		*new_tile = NULL;
+		return 0;
+	}
+
+	offset = new_mem->mm_node->start << PAGE_SHIFT;
+
+	if (dev_priv->card_type == NV_50) {
+		ret = nv50_mem_vm_bind_linear(dev,
+					      offset + dev_priv->vm_vram_base,
+					      new_mem->size, nvbo->tile_flags,
+					      offset);
+		if (ret)
+			return ret;
+
+	} else if (dev_priv->card_type >= NV_10) {
+		*new_tile = nv10_mem_set_tiling(dev, offset, new_mem->size,
+						nvbo->tile_mode);
+	}
+
+	return 0;
+}
+
+static void
+nouveau_bo_vm_cleanup(struct ttm_buffer_object *bo,
+		      struct nouveau_tile_reg *new_tile,
+		      struct nouveau_tile_reg **old_tile)
+{
+	struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
+	struct drm_device *dev = dev_priv->dev;
+
+	if (dev_priv->card_type >= NV_10 &&
+	    dev_priv->card_type < NV_50) {
+		if (*old_tile)
+			nv10_mem_expire_tiling(dev, *old_tile, bo->sync_obj);
+
+		*old_tile = new_tile;
+	}
+}
+
+static int
+nouveau_bo_move(struct ttm_buffer_object *bo, bool evict, bool intr,
+		bool no_wait, struct ttm_mem_reg *new_mem)
+{
+	struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
+	struct nouveau_bo *nvbo = nouveau_bo(bo);
+	struct ttm_mem_reg *old_mem = &bo->mem;
+	struct nouveau_tile_reg *new_tile = NULL;
+	int ret = 0;
+
+	ret = nouveau_bo_vm_bind(bo, new_mem, &new_tile);
+	if (ret)
+		return ret;
+
+	/* Software copy if the card isn't up and running yet. */
+	if (dev_priv->init_state != NOUVEAU_CARD_INIT_DONE ||
+	    !dev_priv->channel) {
+		ret = ttm_bo_move_memcpy(bo, evict, no_wait, new_mem);
+		goto out;
+	}
+
+	/* Fake bo copy. */
+	if (old_mem->mem_type == TTM_PL_SYSTEM && !bo->ttm) {
+		BUG_ON(bo->mem.mm_node != NULL);
+		bo->mem = *new_mem;
+		new_mem->mm_node = NULL;
+		goto out;
+	}
+
+	/* Hardware assisted copy. */
+	if (new_mem->mem_type == TTM_PL_SYSTEM)
+		ret = nouveau_bo_move_flipd(bo, evict, intr, no_wait, new_mem);
+	else if (old_mem->mem_type == TTM_PL_SYSTEM)
+		ret = nouveau_bo_move_flips(bo, evict, intr, no_wait, new_mem);
+	else
+		ret = nouveau_bo_move_m2mf(bo, evict, intr, no_wait, new_mem);
+
+	if (!ret)
+		goto out;
+
+	/* Fallback to software copy. */
+	ret = ttm_bo_move_memcpy(bo, evict, no_wait, new_mem);
+
+out:
+	if (ret)
+		nouveau_bo_vm_cleanup(bo, NULL, &new_tile);
+	else
+		nouveau_bo_vm_cleanup(bo, new_tile, &nvbo->tile);
+
+	return ret;
+}
+
+static int
+nouveau_bo_verify_access(struct ttm_buffer_object *bo, struct file *filp)
+{
+	return 0;
+}
+
+struct ttm_bo_driver nouveau_bo_driver = {
+	.create_ttm_backend_entry = nouveau_bo_create_ttm_backend_entry,
+	.invalidate_caches = nouveau_bo_invalidate_caches,
+	.init_mem_type = nouveau_bo_init_mem_type,
+	.evict_flags = nouveau_bo_evict_flags,
+	.move = nouveau_bo_move,
+	.verify_access = nouveau_bo_verify_access,
+	.sync_obj_signaled = nouveau_fence_signalled,
+	.sync_obj_wait = nouveau_fence_wait,
+	.sync_obj_flush = nouveau_fence_flush,
+	.sync_obj_unref = nouveau_fence_unref,
+	.sync_obj_ref = nouveau_fence_ref,
+};
+
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_dma.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_dma.c
@@ -0,0 +1,244 @@
+/*
+ * Copyright (C) 2007 Ben Skeggs.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include "drmP.h"
+#include "drm.h"
+#include "nouveau_drv.h"
+#include "nouveau_dma.h"
+
+void
+nouveau_dma_pre_init(struct nouveau_channel *chan)
+{
+	chan->dma.max  = (chan->pushbuf_bo->bo.mem.size >> 2) - 2;
+	chan->dma.put  = 0;
+	chan->dma.cur  = chan->dma.put;
+	chan->dma.free = chan->dma.max - chan->dma.cur;
+}
+
+int
+nouveau_dma_init(struct nouveau_channel *chan)
+{
+	struct drm_device *dev = chan->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_gpuobj *m2mf = NULL;
+	struct nouveau_gpuobj *nvsw = NULL;
+	int ret, i;
+
+	/* Create NV_MEMORY_TO_MEMORY_FORMAT for buffer moves */
+	ret = nouveau_gpuobj_gr_new(chan, dev_priv->card_type < NV_50 ?
+				    0x0039 : 0x5039, &m2mf);
+	if (ret)
+		return ret;
+
+	ret = nouveau_gpuobj_ref_add(dev, chan, NvM2MF, m2mf, NULL);
+	if (ret)
+		return ret;
+
+	/* Create an NV_SW object for various sync purposes */
+	ret = nouveau_gpuobj_sw_new(chan, NV_SW, &nvsw);
+	if (ret)
+		return ret;
+
+	ret = nouveau_gpuobj_ref_add(dev, chan, NvSw, nvsw, NULL);
+	if (ret)
+		return ret;
+
+	/* NV_MEMORY_TO_MEMORY_FORMAT requires a notifier object */
+	ret = nouveau_notifier_alloc(chan, NvNotify0, 32, &chan->m2mf_ntfy);
+	if (ret)
+		return ret;
+
+	/* Map push buffer */
+	ret = nouveau_bo_map(chan->pushbuf_bo);
+	if (ret)
+		return ret;
+
+	/* Map M2MF notifier object - fbcon. */
+	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
+		ret = nouveau_bo_map(chan->notifier_bo);
+		if (ret)
+			return ret;
+	}
+
+	/* Insert NOPS for NOUVEAU_DMA_SKIPS */
+	ret = RING_SPACE(chan, NOUVEAU_DMA_SKIPS);
+	if (ret)
+		return ret;
+
+	for (i = 0; i < NOUVEAU_DMA_SKIPS; i++)
+		OUT_RING(chan, 0);
+
+	/* Initialise NV_MEMORY_TO_MEMORY_FORMAT */
+	ret = RING_SPACE(chan, 4);
+	if (ret)
+		return ret;
+	BEGIN_RING(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_NAME, 1);
+	OUT_RING(chan, NvM2MF);
+	BEGIN_RING(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY, 1);
+	OUT_RING(chan, NvNotify0);
+
+	/* Initialise NV_SW */
+	ret = RING_SPACE(chan, 2);
+	if (ret)
+		return ret;
+	BEGIN_RING(chan, NvSubSw, 0, 1);
+	OUT_RING(chan, NvSw);
+
+	/* Sit back and pray the channel works.. */
+	FIRE_RING(chan);
+
+	return 0;
+}
+
+void
+OUT_RINGp(struct nouveau_channel *chan, const void *data, unsigned nr_dwords)
+{
+	bool is_iomem;
+	u32 *mem = ttm_kmap_obj_virtual(&chan->pushbuf_bo->kmap, &is_iomem);
+	mem = &mem[chan->dma.cur];
+	if (is_iomem)
+		memcpy_toio((void __force __iomem *)mem, data, nr_dwords * 4);
+	else
+		memcpy(mem, data, nr_dwords * 4);
+	chan->dma.cur += nr_dwords;
+}
+
+/* Fetch and adjust GPU GET pointer
+ *
+ * Returns:
+ *  value >= 0, the adjusted GET pointer
+ *  -EINVAL if GET pointer currently outside main push buffer
+ *  -EBUSY if timeout exceeded
+ */
+static inline int
+READ_GET(struct nouveau_channel *chan, uint32_t *prev_get, uint32_t *timeout)
+{
+	uint32_t val;
+
+	val = nvchan_rd32(chan, chan->user_get);
+
+	/* reset counter as long as GET is still advancing, this is
+	 * to avoid misdetecting a GPU lockup if the GPU happens to
+	 * just be processing an operation that takes a long time
+	 */
+	if (val != *prev_get) {
+		*prev_get = val;
+		*timeout = 0;
+	}
+
+	if ((++*timeout & 0xff) == 0) {
+		DRM_UDELAY(1);
+		if (*timeout > 100000)
+			return -EBUSY;
+	}
+
+	if (val < chan->pushbuf_base ||
+	    val > chan->pushbuf_base + (chan->dma.max << 2))
+		return -EINVAL;
+
+	return (val - chan->pushbuf_base) >> 2;
+}
+
+int
+nouveau_dma_wait(struct nouveau_channel *chan, int size)
+{
+	uint32_t prev_get = 0, cnt = 0;
+	int get;
+
+	while (chan->dma.free < size) {
+		get = READ_GET(chan, &prev_get, &cnt);
+		if (unlikely(get == -EBUSY))
+			return -EBUSY;
+
+		/* loop until we have a usable GET pointer.  the value
+		 * we read from the GPU may be outside the main ring if
+		 * PFIFO is processing a buffer called from the main ring,
+		 * discard these values until something sensible is seen.
+		 *
+		 * the other case we discard GET is while the GPU is fetching
+		 * from the SKIPS area, so the code below doesn't have to deal
+		 * with some fun corner cases.
+		 */
+		if (unlikely(get == -EINVAL) || get < NOUVEAU_DMA_SKIPS)
+			continue;
+
+		if (get <= chan->dma.cur) {
+			/* engine is fetching behind us, or is completely
+			 * idle (GET == PUT) so we have free space up until
+			 * the end of the push buffer
+			 *
+			 * we can only hit that path once per call due to
+			 * looping back to the beginning of the push buffer,
+			 * we'll hit the fetching-ahead-of-us path from that
+			 * point on.
+			 *
+			 * the *one* exception to that rule is if we read
+			 * GET==PUT, in which case the below conditional will
+			 * always succeed and break us out of the wait loop.
+			 */
+			chan->dma.free = chan->dma.max - chan->dma.cur;
+			if (chan->dma.free >= size)
+				break;
+
+			/* not enough space left at the end of the push buffer,
+			 * instruct the GPU to jump back to the start right
+			 * after processing the currently pending commands.
+			 */
+			OUT_RING(chan, chan->pushbuf_base | 0x20000000);
+
+			/* wait for GET to depart from the skips area.
+			 * prevents writing GET==PUT and causing a race
+			 * condition that causes us to think the GPU is
+			 * idle when it's not.
+			 */
+			do {
+				get = READ_GET(chan, &prev_get, &cnt);
+				if (unlikely(get == -EBUSY))
+					return -EBUSY;
+				if (unlikely(get == -EINVAL))
+					continue;
+			} while (get <= NOUVEAU_DMA_SKIPS);
+			WRITE_PUT(NOUVEAU_DMA_SKIPS);
+
+			/* we're now submitting commands at the start of
+			 * the push buffer.
+			 */
+			chan->dma.cur  =
+			chan->dma.put  = NOUVEAU_DMA_SKIPS;
+		}
+
+		/* engine fetching ahead of us, we have space up until the
+		 * current GET pointer.  the "- 1" is to ensure there's
+		 * space left to emit a jump back to the beginning of the
+		 * push buffer if we require it.  we can never get GET == PUT
+		 * here, so this is safe.
+		 */
+		chan->dma.free = get - chan->dma.cur - 1;
+	}
+
+	return 0;
+}
+
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_calc.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_calc.c
@@ -0,0 +1,478 @@
+/*
+ * Copyright 1993-2003 NVIDIA, Corporation
+ * Copyright 2007-2009 Stuart Bennett
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include "drmP.h"
+#include "nouveau_drv.h"
+#include "nouveau_hw.h"
+
+/****************************************************************************\
+*                                                                            *
+* The video arbitration routines calculate some "magic" numbers.  Fixes      *
+* the snow seen when accessing the framebuffer without it.                   *
+* It just works (I hope).                                                    *
+*                                                                            *
+\****************************************************************************/
+
+struct nv_fifo_info {
+	int lwm;
+	int burst;
+};
+
+struct nv_sim_state {
+	int pclk_khz;
+	int mclk_khz;
+	int nvclk_khz;
+	int bpp;
+	int mem_page_miss;
+	int mem_latency;
+	int memory_type;
+	int memory_width;
+	int two_heads;
+};
+
+static void
+nv04_calc_arb(struct nv_fifo_info *fifo, struct nv_sim_state *arb)
+{
+	int pagemiss, cas, width, bpp;
+	int nvclks, mclks, pclks, crtpagemiss;
+	int found, mclk_extra, mclk_loop, cbs, m1, p1;
+	int mclk_freq, pclk_freq, nvclk_freq;
+	int us_m, us_n, us_p, crtc_drain_rate;
+	int cpm_us, us_crt, clwm;
+
+	pclk_freq = arb->pclk_khz;
+	mclk_freq = arb->mclk_khz;
+	nvclk_freq = arb->nvclk_khz;
+	pagemiss = arb->mem_page_miss;
+	cas = arb->mem_latency;
+	width = arb->memory_width >> 6;
+	bpp = arb->bpp;
+	cbs = 128;
+
+	pclks = 2;
+	nvclks = 10;
+	mclks = 13 + cas;
+	mclk_extra = 3;
+	found = 0;
+
+	while (!found) {
+		found = 1;
+
+		mclk_loop = mclks + mclk_extra;
+		us_m = mclk_loop * 1000 * 1000 / mclk_freq;
+		us_n = nvclks * 1000 * 1000 / nvclk_freq;
+		us_p = nvclks * 1000 * 1000 / pclk_freq;
+
+		crtc_drain_rate = pclk_freq * bpp / 8;
+		crtpagemiss = 2;
+		crtpagemiss += 1;
+		cpm_us = crtpagemiss * pagemiss * 1000 * 1000 / mclk_freq;
+		us_crt = cpm_us + us_m + us_n + us_p;
+		clwm = us_crt * crtc_drain_rate / (1000 * 1000);
+		clwm++;
+
+		m1 = clwm + cbs - 512;
+		p1 = m1 * pclk_freq / mclk_freq;
+		p1 = p1 * bpp / 8;
+		if ((p1 < m1 && m1 > 0) || clwm > 519) {
+			found = !mclk_extra;
+			mclk_extra--;
+		}
+		if (clwm < 384)
+			clwm = 384;
+
+		fifo->lwm = clwm;
+		fifo->burst = cbs;
+	}
+}
+
+static void
+nv10_calc_arb(struct nv_fifo_info *fifo, struct nv_sim_state *arb)
+{
+	int fill_rate, drain_rate;
+	int pclks, nvclks, mclks, xclks;
+	int pclk_freq, nvclk_freq, mclk_freq;
+	int fill_lat, extra_lat;
+	int max_burst_o, max_burst_l;
+	int fifo_len, min_lwm, max_lwm;
+	const int burst_lat = 80; /* Maximum allowable latency due
+				   * to the CRTC FIFO burst. (ns) */
+
+	pclk_freq = arb->pclk_khz;
+	nvclk_freq = arb->nvclk_khz;
+	mclk_freq = arb->mclk_khz;
+
+	fill_rate = mclk_freq * arb->memory_width / 8; /* kB/s */
+	drain_rate = pclk_freq * arb->bpp / 8; /* kB/s */
+
+	fifo_len = arb->two_heads ? 1536 : 1024; /* B */
+
+	/* Fixed FIFO refill latency. */
+
+	pclks = 4;	/* lwm detect. */
+
+	nvclks = 3	/* lwm -> sync. */
+		+ 2	/* fbi bus cycles (1 req + 1 busy) */
+		+ 1	/* 2 edge sync.  may be very close to edge so
+			 * just put one. */
+		+ 1	/* fbi_d_rdv_n */
+		+ 1	/* Fbi_d_rdata */
+		+ 1;	/* crtfifo load */
+
+	mclks = 1	/* 2 edge sync.  may be very close to edge so
+			 * just put one. */
+		+ 1	/* arb_hp_req */
+		+ 5	/* tiling pipeline */
+		+ 2	/* latency fifo */
+		+ 2	/* memory request to fbio block */
+		+ 7;	/* data returned from fbio block */
+
+	/* Need to accumulate 256 bits for read */
+	mclks += (arb->memory_type == 0 ? 2 : 1)
+		* arb->memory_width / 32;
+
+	fill_lat = mclks * 1000 * 1000 / mclk_freq   /* minimum mclk latency */
+		+ nvclks * 1000 * 1000 / nvclk_freq  /* nvclk latency */
+		+ pclks * 1000 * 1000 / pclk_freq;   /* pclk latency */
+
+	/* Conditional FIFO refill latency. */
+
+	xclks = 2 * arb->mem_page_miss + mclks /* Extra latency due to
+						* the overlay. */
+		+ 2 * arb->mem_page_miss       /* Extra pagemiss latency. */
+		+ (arb->bpp == 32 ? 8 : 4);    /* Margin of error. */
+
+	extra_lat = xclks * 1000 * 1000 / mclk_freq;
+
+	if (arb->two_heads)
+		/* Account for another CRTC. */
+		extra_lat += fill_lat + extra_lat + burst_lat;
+
+	/* FIFO burst */
+
+	/* Max burst not leading to overflows. */
+	max_burst_o = (1 + fifo_len - extra_lat * drain_rate / (1000 * 1000))
+		* (fill_rate / 1000) / ((fill_rate - drain_rate) / 1000);
+	fifo->burst = min(max_burst_o, 1024);
+
+	/* Max burst value with an acceptable latency. */
+	max_burst_l = burst_lat * fill_rate / (1000 * 1000);
+	fifo->burst = min(max_burst_l, fifo->burst);
+
+	fifo->burst = rounddown_pow_of_two(fifo->burst);
+
+	/* FIFO low watermark */
+
+	min_lwm = (fill_lat + extra_lat) * drain_rate / (1000 * 1000) + 1;
+	max_lwm = fifo_len - fifo->burst
+		+ fill_lat * drain_rate / (1000 * 1000)
+		+ fifo->burst * drain_rate / fill_rate;
+
+	fifo->lwm = min_lwm + 10 * (max_lwm - min_lwm) / 100; /* Empirical. */
+}
+
+static void
+nv04_update_arb(struct drm_device *dev, int VClk, int bpp,
+		int *burst, int *lwm)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nv_fifo_info fifo_data;
+	struct nv_sim_state sim_data;
+	int MClk = nouveau_hw_get_clock(dev, MPLL);
+	int NVClk = nouveau_hw_get_clock(dev, NVPLL);
+	uint32_t cfg1 = nvReadFB(dev, NV_PFB_CFG1);
+
+	sim_data.pclk_khz = VClk;
+	sim_data.mclk_khz = MClk;
+	sim_data.nvclk_khz = NVClk;
+	sim_data.bpp = bpp;
+	sim_data.two_heads = nv_two_heads(dev);
+	if ((dev->pci_device & 0xffff) == 0x01a0 /*CHIPSET_NFORCE*/ ||
+	    (dev->pci_device & 0xffff) == 0x01f0 /*CHIPSET_NFORCE2*/) {
+		uint32_t type;
+
+		pci_read_config_dword(pci_get_bus_and_slot(0, 1), 0x7c, &type);
+
+		sim_data.memory_type = (type >> 12) & 1;
+		sim_data.memory_width = 64;
+		sim_data.mem_latency = 3;
+		sim_data.mem_page_miss = 10;
+	} else {
+		sim_data.memory_type = nvReadFB(dev, NV_PFB_CFG0) & 0x1;
+		sim_data.memory_width = (nvReadEXTDEV(dev, NV_PEXTDEV_BOOT_0) & 0x10) ? 128 : 64;
+		sim_data.mem_latency = cfg1 & 0xf;
+		sim_data.mem_page_miss = ((cfg1 >> 4) & 0xf) + ((cfg1 >> 31) & 0x1);
+	}
+
+	if (dev_priv->card_type == NV_04)
+		nv04_calc_arb(&fifo_data, &sim_data);
+	else
+		nv10_calc_arb(&fifo_data, &sim_data);
+
+	*burst = ilog2(fifo_data.burst >> 4);
+	*lwm = fifo_data.lwm >> 3;
+}
+
+static void
+nv30_update_arb(int *burst, int *lwm)
+{
+	unsigned int fifo_size, burst_size, graphics_lwm;
+
+	fifo_size = 2048;
+	burst_size = 512;
+	graphics_lwm = fifo_size - burst_size;
+
+	*burst = ilog2(burst_size >> 5);
+	*lwm = graphics_lwm >> 3;
+}
+
+void
+nouveau_calc_arb(struct drm_device *dev, int vclk, int bpp, int *burst, int *lwm)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+	if (dev_priv->card_type < NV_30)
+		nv04_update_arb(dev, vclk, bpp, burst, lwm);
+	else if ((dev->pci_device & 0xfff0) == 0x0240 /*CHIPSET_C51*/ ||
+		 (dev->pci_device & 0xfff0) == 0x03d0 /*CHIPSET_C512*/) {
+		*burst = 128;
+		*lwm = 0x0480;
+	} else
+		nv30_update_arb(burst, lwm);
+}
+
+static int
+getMNP_single(struct drm_device *dev, struct pll_lims *pll_lim, int clk,
+	      struct nouveau_pll_vals *bestpv)
+{
+	/* Find M, N and P for a single stage PLL
+	 *
+	 * Note that some bioses (NV3x) have lookup tables of precomputed MNP
+	 * values, but we're too lazy to use those atm
+	 *
+	 * "clk" parameter in kHz
+	 * returns calculated clock
+	 */
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	int cv = dev_priv->vbios->chip_version;
+	int minvco = pll_lim->vco1.minfreq, maxvco = pll_lim->vco1.maxfreq;
+	int minM = pll_lim->vco1.min_m, maxM = pll_lim->vco1.max_m;
+	int minN = pll_lim->vco1.min_n, maxN = pll_lim->vco1.max_n;
+	int minU = pll_lim->vco1.min_inputfreq;
+	int maxU = pll_lim->vco1.max_inputfreq;
+	int minP = pll_lim->max_p ? pll_lim->min_p : 0;
+	int maxP = pll_lim->max_p ? pll_lim->max_p : pll_lim->max_usable_log2p;
+	int crystal = pll_lim->refclk;
+	int M, N, thisP, P;
+	int clkP, calcclk;
+	int delta, bestdelta = INT_MAX;
+	int bestclk = 0;
+
+	/* this division verified for nv20, nv18, nv28 (Haiku), and nv34 */
+	/* possibly correlated with introduction of 27MHz crystal */
+	if (dev_priv->card_type < NV_50) {
+		if (cv < 0x17 || cv == 0x1a || cv == 0x20) {
+			if (clk > 250000)
+				maxM = 6;
+			if (clk > 340000)
+				maxM = 2;
+		} else if (cv < 0x40) {
+			if (clk > 150000)
+				maxM = 6;
+			if (clk > 200000)
+				maxM = 4;
+			if (clk > 340000)
+				maxM = 2;
+		}
+	}
+
+	P = pll_lim->max_p ? maxP : (1 << maxP);
+	if ((clk * P) < minvco) {
+		minvco = clk * maxP;
+		maxvco = minvco * 2;
+	}
+
+	if (clk + clk/200 > maxvco)	/* +0.5% */
+		maxvco = clk + clk/200;
+
+	/* NV34 goes maxlog2P->0, NV20 goes 0->maxlog2P */
+	for (thisP = minP; thisP <= maxP; thisP++) {
+		P = pll_lim->max_p ? thisP : (1 << thisP);
+		clkP = clk * P;
+
+		if (clkP < minvco)
+			continue;
+		if (clkP > maxvco)
+			return bestclk;
+
+		for (M = minM; M <= maxM; M++) {
+			if (crystal/M < minU)
+				return bestclk;
+			if (crystal/M > maxU)
+				continue;
+
+			/* add crystal/2 to round better */
+			N = (clkP * M + crystal/2) / crystal;
+
+			if (N < minN)
+				continue;
+			if (N > maxN)
+				break;
+
+			/* more rounding additions */
+			calcclk = ((N * crystal + P/2) / P + M/2) / M;
+			delta = abs(calcclk - clk);
+			/* we do an exhaustive search rather than terminating
+			 * on an optimality condition...
+			 */
+			if (delta < bestdelta) {
+				bestdelta = delta;
+				bestclk = calcclk;
+				bestpv->N1 = N;
+				bestpv->M1 = M;
+				bestpv->log2P = thisP;
+				if (delta == 0)	/* except this one */
+					return bestclk;
+			}
+		}
+	}
+
+	return bestclk;
+}
+
+static int
+getMNP_double(struct drm_device *dev, struct pll_lims *pll_lim, int clk,
+	      struct nouveau_pll_vals *bestpv)
+{
+	/* Find M, N and P for a two stage PLL
+	 *
+	 * Note that some bioses (NV30+) have lookup tables of precomputed MNP
+	 * values, but we're too lazy to use those atm
+	 *
+	 * "clk" parameter in kHz
+	 * returns calculated clock
+	 */
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	int chip_version = dev_priv->vbios->chip_version;
+	int minvco1 = pll_lim->vco1.minfreq, maxvco1 = pll_lim->vco1.maxfreq;
+	int minvco2 = pll_lim->vco2.minfreq, maxvco2 = pll_lim->vco2.maxfreq;
+	int minU1 = pll_lim->vco1.min_inputfreq, minU2 = pll_lim->vco2.min_inputfreq;
+	int maxU1 = pll_lim->vco1.max_inputfreq, maxU2 = pll_lim->vco2.max_inputfreq;
+	int minM1 = pll_lim->vco1.min_m, maxM1 = pll_lim->vco1.max_m;
+	int minN1 = pll_lim->vco1.min_n, maxN1 = pll_lim->vco1.max_n;
+	int minM2 = pll_lim->vco2.min_m, maxM2 = pll_lim->vco2.max_m;
+	int minN2 = pll_lim->vco2.min_n, maxN2 = pll_lim->vco2.max_n;
+	int maxlog2P = pll_lim->max_usable_log2p;
+	int crystal = pll_lim->refclk;
+	bool fixedgain2 = (minM2 == maxM2 && minN2 == maxN2);
+	int M1, N1, M2, N2, log2P;
+	int clkP, calcclk1, calcclk2, calcclkout;
+	int delta, bestdelta = INT_MAX;
+	int bestclk = 0;
+
+	int vco2 = (maxvco2 - maxvco2/200) / 2;
+	for (log2P = 0; clk && log2P < maxlog2P && clk <= (vco2 >> log2P); log2P++)
+		;
+	clkP = clk << log2P;
+
+	if (maxvco2 < clk + clk/200)	/* +0.5% */
+		maxvco2 = clk + clk/200;
+
+	for (M1 = minM1; M1 <= maxM1; M1++) {
+		if (crystal/M1 < minU1)
+			return bestclk;
+		if (crystal/M1 > maxU1)
+			continue;
+
+		for (N1 = minN1; N1 <= maxN1; N1++) {
+			calcclk1 = crystal * N1 / M1;
+			if (calcclk1 < minvco1)
+				continue;
+			if (calcclk1 > maxvco1)
+				break;
+
+			for (M2 = minM2; M2 <= maxM2; M2++) {
+				if (calcclk1/M2 < minU2)
+					break;
+				if (calcclk1/M2 > maxU2)
+					continue;
+
+				/* add calcclk1/2 to round better */
+				N2 = (clkP * M2 + calcclk1/2) / calcclk1;
+				if (N2 < minN2)
+					continue;
+				if (N2 > maxN2)
+					break;
+
+				if (!fixedgain2) {
+					if (chip_version < 0x60)
+						if (N2/M2 < 4 || N2/M2 > 10)
+							continue;
+
+					calcclk2 = calcclk1 * N2 / M2;
+					if (calcclk2 < minvco2)
+						break;
+					if (calcclk2 > maxvco2)
+						continue;
+				} else
+					calcclk2 = calcclk1;
+
+				calcclkout = calcclk2 >> log2P;
+				delta = abs(calcclkout - clk);
+				/* we do an exhaustive search rather than terminating
+				 * on an optimality condition...
+				 */
+				if (delta < bestdelta) {
+					bestdelta = delta;
+					bestclk = calcclkout;
+					bestpv->N1 = N1;
+					bestpv->M1 = M1;
+					bestpv->N2 = N2;
+					bestpv->M2 = M2;
+					bestpv->log2P = log2P;
+					if (delta == 0)	/* except this one */
+						return bestclk;
+				}
+			}
+		}
+	}
+
+	return bestclk;
+}
+
+int
+nouveau_calc_pll_mnp(struct drm_device *dev, struct pll_lims *pll_lim, int clk,
+		     struct nouveau_pll_vals *pv)
+{
+	int outclk;
+
+	if (!pll_lim->vco2.maxfreq)
+		outclk = getMNP_single(dev, pll_lim, clk, pv);
+	else
+		outclk = getMNP_double(dev, pll_lim, clk, pv);
+
+	if (!outclk)
+		NV_ERROR(dev, "Could not find a compatible set of PLL values\n");
+
+	return outclk;
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nvreg.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nvreg.h
@@ -0,0 +1,535 @@
+/* $XConsortium: nvreg.h /main/2 1996/10/28 05:13:41 kaleb $ */
+/*
+ * Copyright 1996-1997  David J. McKay
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * DAVID J. MCKAY BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nvreg.h,v 1.6 2002/01/25 21:56:06 tsi Exp $ */
+
+#ifndef __NVREG_H_
+#define __NVREG_H_
+
+#define NV_PMC_OFFSET               0x00000000
+#define NV_PMC_SIZE                 0x00001000
+
+#define NV_PBUS_OFFSET              0x00001000
+#define NV_PBUS_SIZE                0x00001000
+
+#define NV_PFIFO_OFFSET             0x00002000
+#define NV_PFIFO_SIZE               0x00002000
+
+#define NV_HDIAG_OFFSET             0x00005000
+#define NV_HDIAG_SIZE               0x00001000
+
+#define NV_PRAM_OFFSET              0x00006000
+#define NV_PRAM_SIZE                0x00001000
+
+#define NV_PVIDEO_OFFSET            0x00008000
+#define NV_PVIDEO_SIZE              0x00001000
+
+#define NV_PTIMER_OFFSET            0x00009000
+#define NV_PTIMER_SIZE              0x00001000
+
+#define NV_PPM_OFFSET               0x0000A000
+#define NV_PPM_SIZE                 0x00001000
+
+#define NV_PTV_OFFSET               0x0000D000
+#define NV_PTV_SIZE                 0x00001000
+
+#define NV_PRMVGA_OFFSET            0x000A0000
+#define NV_PRMVGA_SIZE              0x00020000
+
+#define NV_PRMVIO0_OFFSET           0x000C0000
+#define NV_PRMVIO_SIZE              0x00002000
+#define NV_PRMVIO1_OFFSET           0x000C2000
+
+#define NV_PFB_OFFSET               0x00100000
+#define NV_PFB_SIZE                 0x00001000
+
+#define NV_PEXTDEV_OFFSET           0x00101000
+#define NV_PEXTDEV_SIZE             0x00001000
+
+#define NV_PME_OFFSET               0x00200000
+#define NV_PME_SIZE                 0x00001000
+
+#define NV_PROM_OFFSET              0x00300000
+#define NV_PROM_SIZE                0x00010000
+
+#define NV_PGRAPH_OFFSET            0x00400000
+#define NV_PGRAPH_SIZE              0x00010000
+
+#define NV_PCRTC0_OFFSET            0x00600000
+#define NV_PCRTC0_SIZE              0x00002000 /* empirical */
+
+#define NV_PRMCIO0_OFFSET           0x00601000
+#define NV_PRMCIO_SIZE              0x00002000
+#define NV_PRMCIO1_OFFSET           0x00603000
+
+#define NV50_DISPLAY_OFFSET           0x00610000
+#define NV50_DISPLAY_SIZE             0x0000FFFF
+
+#define NV_PRAMDAC0_OFFSET          0x00680000
+#define NV_PRAMDAC0_SIZE            0x00002000
+
+#define NV_PRMDIO0_OFFSET           0x00681000
+#define NV_PRMDIO_SIZE              0x00002000
+#define NV_PRMDIO1_OFFSET           0x00683000
+
+#define NV_PRAMIN_OFFSET            0x00700000
+#define NV_PRAMIN_SIZE              0x00100000
+
+#define NV_FIFO_OFFSET              0x00800000
+#define NV_FIFO_SIZE                0x00800000
+
+#define NV_PMC_BOOT_0			0x00000000
+#define NV_PMC_ENABLE			0x00000200
+
+#define NV_VIO_VSE2			0x000003c3
+#define NV_VIO_SRX			0x000003c4
+
+#define NV_CIO_CRX__COLOR		0x000003d4
+#define NV_CIO_CR__COLOR		0x000003d5
+
+#define NV_PBUS_DEBUG_1			0x00001084
+#define NV_PBUS_DEBUG_4			0x00001098
+#define NV_PBUS_DEBUG_DUALHEAD_CTL	0x000010f0
+#define NV_PBUS_POWERCTRL_1		0x00001584
+#define NV_PBUS_POWERCTRL_2		0x00001588
+#define NV_PBUS_POWERCTRL_4		0x00001590
+#define NV_PBUS_PCI_NV_19		0x0000184C
+#define NV_PBUS_PCI_NV_20		0x00001850
+#	define NV_PBUS_PCI_NV_20_ROM_SHADOW_DISABLED	(0 << 0)
+#	define NV_PBUS_PCI_NV_20_ROM_SHADOW_ENABLED	(1 << 0)
+
+#define NV_PFIFO_RAMHT			0x00002210
+
+#define NV_PTV_TV_INDEX			0x0000d220
+#define NV_PTV_TV_DATA			0x0000d224
+#define NV_PTV_HFILTER			0x0000d310
+#define NV_PTV_HFILTER2			0x0000d390
+#define NV_PTV_VFILTER			0x0000d510
+
+#define NV_PRMVIO_MISC__WRITE		0x000c03c2
+#define NV_PRMVIO_SRX			0x000c03c4
+#define NV_PRMVIO_SR			0x000c03c5
+#	define NV_VIO_SR_RESET_INDEX		0x00
+#	define NV_VIO_SR_CLOCK_INDEX		0x01
+#	define NV_VIO_SR_PLANE_MASK_INDEX	0x02
+#	define NV_VIO_SR_CHAR_MAP_INDEX		0x03
+#	define NV_VIO_SR_MEM_MODE_INDEX		0x04
+#define NV_PRMVIO_MISC__READ		0x000c03cc
+#define NV_PRMVIO_GRX			0x000c03ce
+#define NV_PRMVIO_GX			0x000c03cf
+#	define NV_VIO_GX_SR_INDEX		0x00
+#	define NV_VIO_GX_SREN_INDEX		0x01
+#	define NV_VIO_GX_CCOMP_INDEX		0x02
+#	define NV_VIO_GX_ROP_INDEX		0x03
+#	define NV_VIO_GX_READ_MAP_INDEX		0x04
+#	define NV_VIO_GX_MODE_INDEX		0x05
+#	define NV_VIO_GX_MISC_INDEX		0x06
+#	define NV_VIO_GX_DONT_CARE_INDEX	0x07
+#	define NV_VIO_GX_BIT_MASK_INDEX		0x08
+
+#define NV_PFB_BOOT_0			0x00100000
+#define NV_PFB_CFG0			0x00100200
+#define NV_PFB_CFG1			0x00100204
+#define NV_PFB_CSTATUS			0x0010020C
+#define NV_PFB_REFCTRL			0x00100210
+#	define NV_PFB_REFCTRL_VALID_1			(1 << 31)
+#define NV_PFB_PAD			0x0010021C
+#	define NV_PFB_PAD_CKE_NORMAL			(1 << 0)
+#define NV_PFB_TILE_NV10		0x00100240
+#define NV_PFB_TILE_SIZE_NV10		0x00100244
+#define NV_PFB_REF			0x001002D0
+#	define NV_PFB_REF_CMD_REFRESH			(1 << 0)
+#define NV_PFB_PRE			0x001002D4
+#	define NV_PFB_PRE_CMD_PRECHARGE			(1 << 0)
+#define NV_PFB_CLOSE_PAGE2		0x0010033C
+#define NV_PFB_TILE_NV40		0x00100600
+#define NV_PFB_TILE_SIZE_NV40		0x00100604
+
+#define NV_PEXTDEV_BOOT_0		0x00101000
+#	define NV_PEXTDEV_BOOT_0_STRAP_FP_IFACE_12BIT	(8 << 12)
+#define NV_PEXTDEV_BOOT_3		0x0010100c
+
+#define NV_PCRTC_INTR_0					0x00600100
+#	define NV_PCRTC_INTR_0_VBLANK				(1 << 0)
+#define NV_PCRTC_INTR_EN_0				0x00600140
+#define NV_PCRTC_START					0x00600800
+#define NV_PCRTC_CONFIG					0x00600804
+#	define NV_PCRTC_CONFIG_START_ADDRESS_NON_VGA		(1 << 0)
+#	define NV_PCRTC_CONFIG_START_ADDRESS_HSYNC		(2 << 0)
+#define NV_PCRTC_CURSOR_CONFIG				0x00600810
+#	define NV_PCRTC_CURSOR_CONFIG_ENABLE_ENABLE		(1 << 0)
+#	define NV_PCRTC_CURSOR_CONFIG_DOUBLE_SCAN_ENABLE	(1 << 4)
+#	define NV_PCRTC_CURSOR_CONFIG_ADDRESS_SPACE_PNVM	(1 << 8)
+#	define NV_PCRTC_CURSOR_CONFIG_CUR_BPP_32		(1 << 12)
+#	define NV_PCRTC_CURSOR_CONFIG_CUR_PIXELS_64		(1 << 16)
+#	define NV_PCRTC_CURSOR_CONFIG_CUR_LINES_32		(2 << 24)
+#	define NV_PCRTC_CURSOR_CONFIG_CUR_LINES_64		(4 << 24)
+#	define NV_PCRTC_CURSOR_CONFIG_CUR_BLEND_ALPHA		(1 << 28)
+
+/* note: PCRTC_GPIO is not available on nv10, and in fact aliases 0x600810 */
+#define NV_PCRTC_GPIO					0x00600818
+#define NV_PCRTC_GPIO_EXT				0x0060081c
+#define NV_PCRTC_830					0x00600830
+#define NV_PCRTC_834					0x00600834
+#define NV_PCRTC_850					0x00600850
+#define NV_PCRTC_ENGINE_CTRL				0x00600860
+#	define NV_CRTC_FSEL_I2C					(1 << 4)
+#	define NV_CRTC_FSEL_OVERLAY				(1 << 12)
+
+#define NV_PRMCIO_ARX			0x006013c0
+#define NV_PRMCIO_AR__WRITE		0x006013c0
+#define NV_PRMCIO_AR__READ		0x006013c1
+#	define NV_CIO_AR_MODE_INDEX		0x10
+#	define NV_CIO_AR_OSCAN_INDEX		0x11
+#	define NV_CIO_AR_PLANE_INDEX		0x12
+#	define NV_CIO_AR_HPP_INDEX		0x13
+#	define NV_CIO_AR_CSEL_INDEX		0x14
+#define NV_PRMCIO_INP0			0x006013c2
+#define NV_PRMCIO_CRX__COLOR		0x006013d4
+#define NV_PRMCIO_CR__COLOR		0x006013d5
+	/* Standard VGA CRTC registers */
+#	define NV_CIO_CR_HDT_INDEX		0x00	/* horizontal display total */
+#	define NV_CIO_CR_HDE_INDEX		0x01	/* horizontal display end */
+#	define NV_CIO_CR_HBS_INDEX		0x02	/* horizontal blanking start */
+#	define NV_CIO_CR_HBE_INDEX		0x03	/* horizontal blanking end */
+#		define NV_CIO_CR_HBE_4_0		4:0
+#	define NV_CIO_CR_HRS_INDEX		0x04	/* horizontal retrace start */
+#	define NV_CIO_CR_HRE_INDEX		0x05	/* horizontal retrace end */
+#		define NV_CIO_CR_HRE_4_0		4:0
+#		define NV_CIO_CR_HRE_HBE_5		7:7
+#	define NV_CIO_CR_VDT_INDEX		0x06	/* vertical display total */
+#	define NV_CIO_CR_OVL_INDEX		0x07	/* overflow bits */
+#		define NV_CIO_CR_OVL_VDT_8		0:0
+#		define NV_CIO_CR_OVL_VDE_8		1:1
+#		define NV_CIO_CR_OVL_VRS_8		2:2
+#		define NV_CIO_CR_OVL_VBS_8		3:3
+#		define NV_CIO_CR_OVL_VDT_9		5:5
+#		define NV_CIO_CR_OVL_VDE_9		6:6
+#		define NV_CIO_CR_OVL_VRS_9		7:7
+#	define NV_CIO_CR_RSAL_INDEX		0x08	/* normally "preset row scan" */
+#	define NV_CIO_CR_CELL_HT_INDEX		0x09	/* cell height?! normally "max scan line" */
+#		define NV_CIO_CR_CELL_HT_VBS_9		5:5
+#		define NV_CIO_CR_CELL_HT_SCANDBL	7:7
+#	define NV_CIO_CR_CURS_ST_INDEX		0x0a	/* cursor start */
+#	define NV_CIO_CR_CURS_END_INDEX		0x0b	/* cursor end */
+#	define NV_CIO_CR_SA_HI_INDEX		0x0c	/* screen start address high */
+#	define NV_CIO_CR_SA_LO_INDEX		0x0d	/* screen start address low */
+#	define NV_CIO_CR_TCOFF_HI_INDEX		0x0e	/* cursor offset high */
+#	define NV_CIO_CR_TCOFF_LO_INDEX		0x0f	/* cursor offset low */
+#	define NV_CIO_CR_VRS_INDEX		0x10	/* vertical retrace start */
+#	define NV_CIO_CR_VRE_INDEX		0x11	/* vertical retrace end */
+#		define NV_CIO_CR_VRE_3_0		3:0
+#	define NV_CIO_CR_VDE_INDEX		0x12	/* vertical display end */
+#	define NV_CIO_CR_OFFSET_INDEX		0x13	/* sets screen pitch */
+#	define NV_CIO_CR_ULINE_INDEX		0x14	/* underline location */
+#	define NV_CIO_CR_VBS_INDEX		0x15	/* vertical blank start */
+#	define NV_CIO_CR_VBE_INDEX		0x16	/* vertical blank end */
+#	define NV_CIO_CR_MODE_INDEX		0x17	/* crtc mode control */
+#	define NV_CIO_CR_LCOMP_INDEX		0x18	/* line compare */
+	/* Extended VGA CRTC registers */
+#	define NV_CIO_CRE_RPC0_INDEX		0x19	/* repaint control 0 */
+#		define NV_CIO_CRE_RPC0_OFFSET_10_8	7:5
+#	define NV_CIO_CRE_RPC1_INDEX		0x1a	/* repaint control 1 */
+#		define NV_CIO_CRE_RPC1_LARGE		2:2
+#	define NV_CIO_CRE_FF_INDEX		0x1b	/* fifo control */
+#	define NV_CIO_CRE_ENH_INDEX		0x1c	/* enhanced? */
+#	define NV_CIO_SR_LOCK_INDEX		0x1f	/* crtc lock */
+#		define NV_CIO_SR_UNLOCK_RW_VALUE	0x57
+#		define NV_CIO_SR_LOCK_VALUE		0x99
+#	define NV_CIO_CRE_FFLWM__INDEX		0x20	/* fifo low water mark */
+#	define NV_CIO_CRE_21			0x21	/* vga shadow crtc lock */
+#	define NV_CIO_CRE_LSR_INDEX		0x25	/* ? */
+#		define NV_CIO_CRE_LSR_VDT_10		0:0
+#		define NV_CIO_CRE_LSR_VDE_10		1:1
+#		define NV_CIO_CRE_LSR_VRS_10		2:2
+#		define NV_CIO_CRE_LSR_VBS_10		3:3
+#		define NV_CIO_CRE_LSR_HBE_6		4:4
+#	define NV_CIO_CR_ARX_INDEX		0x26	/* attribute index -- ro copy of 0x60.3c0 */
+#	define NV_CIO_CRE_CHIP_ID_INDEX		0x27	/* chip revision */
+#	define NV_CIO_CRE_PIXEL_INDEX		0x28
+#		define NV_CIO_CRE_PIXEL_FORMAT		1:0
+#	define NV_CIO_CRE_HEB__INDEX		0x2d	/* horizontal extra bits? */
+#		define NV_CIO_CRE_HEB_HDT_8		0:0
+#		define NV_CIO_CRE_HEB_HDE_8		1:1
+#		define NV_CIO_CRE_HEB_HBS_8		2:2
+#		define NV_CIO_CRE_HEB_HRS_8		3:3
+#		define NV_CIO_CRE_HEB_ILC_8		4:4
+#	define NV_CIO_CRE_2E			0x2e	/* some scratch or dummy reg to force writes to sink in */
+#	define NV_CIO_CRE_HCUR_ADDR2_INDEX	0x2f	/* cursor */
+#	define NV_CIO_CRE_HCUR_ADDR0_INDEX	0x30		/* pixmap */
+#		define NV_CIO_CRE_HCUR_ADDR0_ADR	6:0
+#		define NV_CIO_CRE_HCUR_ASI		7:7
+#	define NV_CIO_CRE_HCUR_ADDR1_INDEX	0x31			/* address */
+#		define NV_CIO_CRE_HCUR_ADDR1_ENABLE	0:0
+#		define NV_CIO_CRE_HCUR_ADDR1_CUR_DBL	1:1
+#		define NV_CIO_CRE_HCUR_ADDR1_ADR	7:2
+#	define NV_CIO_CRE_LCD__INDEX		0x33
+#		define NV_CIO_CRE_LCD_LCD_SELECT	0:0
+#	define NV_CIO_CRE_DDC0_STATUS__INDEX	0x36
+#	define NV_CIO_CRE_DDC0_WR__INDEX	0x37
+#	define NV_CIO_CRE_ILACE__INDEX		0x39	/* interlace */
+#	define NV_CIO_CRE_SCRATCH3__INDEX	0x3b
+#	define NV_CIO_CRE_SCRATCH4__INDEX	0x3c
+#	define NV_CIO_CRE_DDC_STATUS__INDEX	0x3e
+#	define NV_CIO_CRE_DDC_WR__INDEX		0x3f
+#	define NV_CIO_CRE_EBR_INDEX		0x41	/* extra bits ? (vertical) */
+#		define NV_CIO_CRE_EBR_VDT_11		0:0
+#		define NV_CIO_CRE_EBR_VDE_11		2:2
+#		define NV_CIO_CRE_EBR_VRS_11		4:4
+#		define NV_CIO_CRE_EBR_VBS_11		6:6
+#	define NV_CIO_CRE_43			0x43
+#	define NV_CIO_CRE_44			0x44	/* head control */
+#	define NV_CIO_CRE_CSB			0x45	/* colour saturation boost */
+#	define NV_CIO_CRE_RCR			0x46
+#		define NV_CIO_CRE_RCR_ENDIAN_BIG	7:7
+#	define NV_CIO_CRE_47			0x47	/* extended fifo lwm, used on nv30+ */
+#	define NV_CIO_CRE_49			0x49
+#	define NV_CIO_CRE_4B			0x4b	/* given patterns in 0x[2-3][a-c] regs, probably scratch 6 */
+#	define NV_CIO_CRE_TVOUT_LATENCY		0x52
+#	define NV_CIO_CRE_53			0x53	/* `fp_htiming' according to Haiku */
+#	define NV_CIO_CRE_54			0x54	/* `fp_vtiming' according to Haiku */
+#	define NV_CIO_CRE_57			0x57	/* index reg for cr58 */
+#	define NV_CIO_CRE_58			0x58	/* data reg for cr57 */
+#	define NV_CIO_CRE_59			0x59	/* related to on/off-chip-ness of digital outputs */
+#	define NV_CIO_CRE_5B			0x5B	/* newer colour saturation reg */
+#	define NV_CIO_CRE_85			0x85
+#	define NV_CIO_CRE_86			0x86
+#define NV_PRMCIO_INP0__COLOR		0x006013da
+
+#define NV_PRAMDAC_CU_START_POS				0x00680300
+#	define NV_PRAMDAC_CU_START_POS_X			15:0
+#	define NV_PRAMDAC_CU_START_POS_Y			31:16
+#define NV_RAMDAC_NV10_CURSYNC				0x00680404
+
+#define NV_PRAMDAC_NVPLL_COEFF				0x00680500
+#define NV_PRAMDAC_MPLL_COEFF				0x00680504
+#define NV_PRAMDAC_VPLL_COEFF				0x00680508
+#	define NV30_RAMDAC_ENABLE_VCO2				(8 << 4)
+
+#define NV_PRAMDAC_PLL_COEFF_SELECT			0x0068050c
+#	define NV_PRAMDAC_PLL_COEFF_SELECT_USE_VPLL2_TRUE	(4 << 0)
+#	define NV_PRAMDAC_PLL_COEFF_SELECT_SOURCE_PROG_MPLL	(1 << 8)
+#	define NV_PRAMDAC_PLL_COEFF_SELECT_SOURCE_PROG_VPLL	(2 << 8)
+#	define NV_PRAMDAC_PLL_COEFF_SELECT_SOURCE_PROG_NVPLL	(4 << 8)
+#	define NV_PRAMDAC_PLL_COEFF_SELECT_PLL_SOURCE_VPLL2	(8 << 8)
+#	define NV_PRAMDAC_PLL_COEFF_SELECT_TV_VSCLK1		(1 << 16)
+#	define NV_PRAMDAC_PLL_COEFF_SELECT_TV_PCLK1		(2 << 16)
+#	define NV_PRAMDAC_PLL_COEFF_SELECT_TV_VSCLK2		(4 << 16)
+#	define NV_PRAMDAC_PLL_COEFF_SELECT_TV_PCLK2		(8 << 16)
+#	define NV_PRAMDAC_PLL_COEFF_SELECT_TV_CLK_SOURCE_VIP	(1 << 20)
+#	define NV_PRAMDAC_PLL_COEFF_SELECT_VCLK_RATIO_DB2	(1 << 28)
+#	define NV_PRAMDAC_PLL_COEFF_SELECT_VCLK2_RATIO_DB2	(2 << 28)
+
+#define NV_PRAMDAC_PLL_SETUP_CONTROL			0x00680510
+#define NV_RAMDAC_VPLL2					0x00680520
+#define NV_PRAMDAC_SEL_CLK				0x00680524
+#define NV_RAMDAC_DITHER_NV11				0x00680528
+#define NV_PRAMDAC_DACCLK				0x0068052c
+#	define NV_PRAMDAC_DACCLK_SEL_DACCLK			(1 << 0)
+
+#define NV_RAMDAC_NVPLL_B				0x00680570
+#define NV_RAMDAC_MPLL_B				0x00680574
+#define NV_RAMDAC_VPLL_B				0x00680578
+#define NV_RAMDAC_VPLL2_B				0x0068057c
+#	define NV31_RAMDAC_ENABLE_VCO2				(8 << 28)
+#define NV_PRAMDAC_580					0x00680580
+#	define NV_RAMDAC_580_VPLL1_ACTIVE			(1 << 8)
+#	define NV_RAMDAC_580_VPLL2_ACTIVE			(1 << 28)
+
+#define NV_PRAMDAC_GENERAL_CONTROL			0x00680600
+#	define NV_PRAMDAC_GENERAL_CONTROL_PIXMIX_ON		(3 << 4)
+#	define NV_PRAMDAC_GENERAL_CONTROL_VGA_STATE_SEL		(1 << 8)
+#	define NV_PRAMDAC_GENERAL_CONTROL_ALT_MODE_SEL		(1 << 12)
+#	define NV_PRAMDAC_GENERAL_CONTROL_TERMINATION_75OHM	(2 << 16)
+#	define NV_PRAMDAC_GENERAL_CONTROL_BPC_8BITS		(1 << 20)
+#	define NV_PRAMDAC_GENERAL_CONTROL_PIPE_LONG		(2 << 28)
+#define NV_PRAMDAC_TEST_CONTROL				0x00680608
+#	define NV_PRAMDAC_TEST_CONTROL_TP_INS_EN_ASSERTED	(1 << 12)
+#	define NV_PRAMDAC_TEST_CONTROL_PWRDWN_DAC_OFF		(1 << 16)
+#	define NV_PRAMDAC_TEST_CONTROL_SENSEB_ALLHI		(1 << 28)
+#define NV_PRAMDAC_TESTPOINT_DATA			0x00680610
+#	define NV_PRAMDAC_TESTPOINT_DATA_NOTBLANK		(8 << 28)
+#define NV_PRAMDAC_630					0x00680630
+#define NV_PRAMDAC_634					0x00680634
+
+#define NV_PRAMDAC_TV_SETUP				0x00680700
+#define NV_PRAMDAC_TV_VTOTAL				0x00680720
+#define NV_PRAMDAC_TV_VSKEW				0x00680724
+#define NV_PRAMDAC_TV_VSYNC_DELAY			0x00680728
+#define NV_PRAMDAC_TV_HTOTAL				0x0068072c
+#define NV_PRAMDAC_TV_HSKEW				0x00680730
+#define NV_PRAMDAC_TV_HSYNC_DELAY			0x00680734
+#define NV_PRAMDAC_TV_HSYNC_DELAY2			0x00680738
+
+#define NV_PRAMDAC_TV_SETUP                             0x00680700
+
+#define NV_PRAMDAC_FP_VDISPLAY_END			0x00680800
+#define NV_PRAMDAC_FP_VTOTAL				0x00680804
+#define NV_PRAMDAC_FP_VCRTC				0x00680808
+#define NV_PRAMDAC_FP_VSYNC_START			0x0068080c
+#define NV_PRAMDAC_FP_VSYNC_END				0x00680810
+#define NV_PRAMDAC_FP_VVALID_START			0x00680814
+#define NV_PRAMDAC_FP_VVALID_END			0x00680818
+#define NV_PRAMDAC_FP_HDISPLAY_END			0x00680820
+#define NV_PRAMDAC_FP_HTOTAL				0x00680824
+#define NV_PRAMDAC_FP_HCRTC				0x00680828
+#define NV_PRAMDAC_FP_HSYNC_START			0x0068082c
+#define NV_PRAMDAC_FP_HSYNC_END				0x00680830
+#define NV_PRAMDAC_FP_HVALID_START			0x00680834
+#define NV_PRAMDAC_FP_HVALID_END			0x00680838
+
+#define NV_RAMDAC_FP_DITHER				0x0068083c
+#define NV_PRAMDAC_FP_TG_CONTROL			0x00680848
+#	define NV_PRAMDAC_FP_TG_CONTROL_VSYNC_POS		(1 << 0)
+#	define NV_PRAMDAC_FP_TG_CONTROL_VSYNC_DISABLE		(2 << 0)
+#	define NV_PRAMDAC_FP_TG_CONTROL_HSYNC_POS		(1 << 4)
+#	define NV_PRAMDAC_FP_TG_CONTROL_HSYNC_DISABLE		(2 << 4)
+#	define NV_PRAMDAC_FP_TG_CONTROL_MODE_SCALE		(0 << 8)
+#	define NV_PRAMDAC_FP_TG_CONTROL_MODE_CENTER		(1 << 8)
+#	define NV_PRAMDAC_FP_TG_CONTROL_MODE_NATIVE		(2 << 8)
+#	define NV_PRAMDAC_FP_TG_CONTROL_READ_PROG		(1 << 20)
+#	define NV_PRAMDAC_FP_TG_CONTROL_WIDTH_12		(1 << 24)
+#	define NV_PRAMDAC_FP_TG_CONTROL_DISPEN_POS		(1 << 28)
+#	define NV_PRAMDAC_FP_TG_CONTROL_DISPEN_DISABLE		(2 << 28)
+#define NV_PRAMDAC_FP_MARGIN_COLOR			0x0068084c
+#define NV_PRAMDAC_850					0x00680850
+#define NV_PRAMDAC_85C					0x0068085c
+#define NV_PRAMDAC_FP_DEBUG_0				0x00680880
+#	define NV_PRAMDAC_FP_DEBUG_0_XSCALE_ENABLE		(1 << 0)
+#	define NV_PRAMDAC_FP_DEBUG_0_YSCALE_ENABLE		(1 << 4)
+/* This doesn't seem to be essential for tmds, but still often set */
+#	define NV_RAMDAC_FP_DEBUG_0_TMDS_ENABLED		(8 << 4)
+#	define NV_PRAMDAC_FP_DEBUG_0_XINTERP_BILINEAR		(1 << 8)
+#	define NV_PRAMDAC_FP_DEBUG_0_YINTERP_BILINEAR		(1 << 12)
+#	define NV_PRAMDAC_FP_DEBUG_0_XWEIGHT_ROUND		(1 << 20)
+#	define NV_PRAMDAC_FP_DEBUG_0_YWEIGHT_ROUND		(1 << 24)
+#       define NV_PRAMDAC_FP_DEBUG_0_PWRDOWN_FPCLK              (1 << 28)
+#define NV_PRAMDAC_FP_DEBUG_1				0x00680884
+#	define NV_PRAMDAC_FP_DEBUG_1_XSCALE_VALUE		11:0
+#	define NV_PRAMDAC_FP_DEBUG_1_XSCALE_TESTMODE_ENABLE	(1 << 12)
+#	define NV_PRAMDAC_FP_DEBUG_1_YSCALE_VALUE		27:16
+#	define NV_PRAMDAC_FP_DEBUG_1_YSCALE_TESTMODE_ENABLE	(1 << 28)
+#define NV_PRAMDAC_FP_DEBUG_2				0x00680888
+#define NV_PRAMDAC_FP_DEBUG_3				0x0068088C
+
+/* see NV_PRAMDAC_INDIR_TMDS in rules.xml */
+#define NV_PRAMDAC_FP_TMDS_CONTROL			0x006808b0
+#	define NV_PRAMDAC_FP_TMDS_CONTROL_WRITE_DISABLE		(1 << 16)
+#define NV_PRAMDAC_FP_TMDS_DATA				0x006808b4
+
+#define NV_PRAMDAC_8C0                                  0x006808c0
+
+/* Some kind of switch */
+#define NV_PRAMDAC_900					0x00680900
+#define NV_PRAMDAC_A20					0x00680A20
+#define NV_PRAMDAC_A24					0x00680A24
+#define NV_PRAMDAC_A34					0x00680A34
+
+#define NV_PRAMDAC_CTV					0x00680c00
+
+/* names fabricated from NV_USER_DAC info */
+#define NV_PRMDIO_PIXEL_MASK		0x006813c6
+#	define NV_PRMDIO_PIXEL_MASK_MASK	0xff
+#define NV_PRMDIO_READ_MODE_ADDRESS	0x006813c7
+#define NV_PRMDIO_WRITE_MODE_ADDRESS	0x006813c8
+#define NV_PRMDIO_PALETTE_DATA		0x006813c9
+
+#define NV_PGRAPH_DEBUG_0		0x00400080
+#define NV_PGRAPH_DEBUG_1		0x00400084
+#define NV_PGRAPH_DEBUG_2_NV04		0x00400088
+#define NV_PGRAPH_DEBUG_2		0x00400620
+#define NV_PGRAPH_DEBUG_3		0x0040008c
+#define NV_PGRAPH_DEBUG_4		0x00400090
+#define NV_PGRAPH_INTR			0x00400100
+#define NV_PGRAPH_INTR_EN		0x00400140
+#define NV_PGRAPH_CTX_CONTROL		0x00400144
+#define NV_PGRAPH_CTX_CONTROL_NV04	0x00400170
+#define NV_PGRAPH_ABS_UCLIP_XMIN	0x0040053C
+#define NV_PGRAPH_ABS_UCLIP_YMIN	0x00400540
+#define NV_PGRAPH_ABS_UCLIP_XMAX	0x00400544
+#define NV_PGRAPH_ABS_UCLIP_YMAX	0x00400548
+#define NV_PGRAPH_BETA_AND		0x00400608
+#define NV_PGRAPH_LIMIT_VIOL_PIX	0x00400610
+#define NV_PGRAPH_BOFFSET0		0x00400640
+#define NV_PGRAPH_BOFFSET1		0x00400644
+#define NV_PGRAPH_BOFFSET2		0x00400648
+#define NV_PGRAPH_BLIMIT0		0x00400684
+#define NV_PGRAPH_BLIMIT1		0x00400688
+#define NV_PGRAPH_BLIMIT2		0x0040068c
+#define NV_PGRAPH_STATUS		0x00400700
+#define NV_PGRAPH_SURFACE		0x00400710
+#define NV_PGRAPH_STATE			0x00400714
+#define NV_PGRAPH_FIFO			0x00400720
+#define NV_PGRAPH_PATTERN_SHAPE		0x00400810
+#define NV_PGRAPH_TILE			0x00400b00
+
+#define NV_PVIDEO_INTR_EN		0x00008140
+#define NV_PVIDEO_BUFFER		0x00008700
+#define NV_PVIDEO_STOP			0x00008704
+#define NV_PVIDEO_UVPLANE_BASE(buff)	(0x00008800+(buff)*4)
+#define NV_PVIDEO_UVPLANE_LIMIT(buff)	(0x00008808+(buff)*4)
+#define NV_PVIDEO_UVPLANE_OFFSET_BUFF(buff)	(0x00008820+(buff)*4)
+#define NV_PVIDEO_BASE(buff)		(0x00008900+(buff)*4)
+#define NV_PVIDEO_LIMIT(buff)		(0x00008908+(buff)*4)
+#define NV_PVIDEO_LUMINANCE(buff)	(0x00008910+(buff)*4)
+#define NV_PVIDEO_CHROMINANCE(buff)	(0x00008918+(buff)*4)
+#define NV_PVIDEO_OFFSET_BUFF(buff)	(0x00008920+(buff)*4)
+#define NV_PVIDEO_SIZE_IN(buff)		(0x00008928+(buff)*4)
+#define NV_PVIDEO_POINT_IN(buff)	(0x00008930+(buff)*4)
+#define NV_PVIDEO_DS_DX(buff)		(0x00008938+(buff)*4)
+#define NV_PVIDEO_DT_DY(buff)		(0x00008940+(buff)*4)
+#define NV_PVIDEO_POINT_OUT(buff)	(0x00008948+(buff)*4)
+#define NV_PVIDEO_SIZE_OUT(buff)	(0x00008950+(buff)*4)
+#define NV_PVIDEO_FORMAT(buff)		(0x00008958+(buff)*4)
+#	define NV_PVIDEO_FORMAT_PLANAR			(1 << 0)
+#	define NV_PVIDEO_FORMAT_COLOR_LE_CR8YB8CB8YA8	(1 << 16)
+#	define NV_PVIDEO_FORMAT_DISPLAY_COLOR_KEY	(1 << 20)
+#	define NV_PVIDEO_FORMAT_MATRIX_ITURBT709	(1 << 24)
+#define NV_PVIDEO_COLOR_KEY		0x00008B00
+
+/* NV04 overlay defines from VIDIX & Haiku */
+#define NV_PVIDEO_INTR_EN_0		0x00680140
+#define NV_PVIDEO_STEP_SIZE		0x00680200
+#define NV_PVIDEO_CONTROL_Y		0x00680204
+#define NV_PVIDEO_CONTROL_X		0x00680208
+#define NV_PVIDEO_BUFF0_START_ADDRESS	0x0068020c
+#define NV_PVIDEO_BUFF0_PITCH_LENGTH	0x00680214
+#define NV_PVIDEO_BUFF0_OFFSET		0x0068021c
+#define NV_PVIDEO_BUFF1_START_ADDRESS	0x00680210
+#define NV_PVIDEO_BUFF1_PITCH_LENGTH	0x00680218
+#define NV_PVIDEO_BUFF1_OFFSET		0x00680220
+#define NV_PVIDEO_OE_STATE		0x00680224
+#define NV_PVIDEO_SU_STATE		0x00680228
+#define NV_PVIDEO_RM_STATE		0x0068022c
+#define NV_PVIDEO_WINDOW_START		0x00680230
+#define NV_PVIDEO_WINDOW_SIZE		0x00680234
+#define NV_PVIDEO_FIFO_THRES_SIZE	0x00680238
+#define NV_PVIDEO_FIFO_BURST_LENGTH	0x0068023c
+#define NV_PVIDEO_KEY			0x00680240
+#define NV_PVIDEO_OVERLAY		0x00680244
+#define NV_PVIDEO_RED_CSC_OFFSET	0x00680280
+#define NV_PVIDEO_GREEN_CSC_OFFSET	0x00680284
+#define NV_PVIDEO_BLUE_CSC_OFFSET	0x00680288
+#define NV_PVIDEO_CSC_ADJUST		0x0068028c
+
+#endif
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv04_mc.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv04_mc.c
@@ -0,0 +1,20 @@
+#include "drmP.h"
+#include "drm.h"
+#include "nouveau_drv.h"
+#include "nouveau_drm.h"
+
+int
+nv04_mc_init(struct drm_device *dev)
+{
+	/* Power up everything, resetting each individual unit will
+	 * be done later if needed.
+	 */
+
+	nv_wr32(dev, NV03_PMC_ENABLE, 0xFFFFFFFF);
+	return 0;
+}
+
+void
+nv04_mc_takedown(struct drm_device *dev)
+{
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_connector.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_connector.c
@@ -0,0 +1,848 @@
+/*
+ * Copyright (C) 2008 Maarten Maathuis.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include <acpi/button.h>
+
+#include "drmP.h"
+#include "drm_edid.h"
+#include "drm_crtc_helper.h"
+
+#include "nouveau_reg.h"
+#include "nouveau_drv.h"
+#include "nouveau_encoder.h"
+#include "nouveau_crtc.h"
+#include "nouveau_connector.h"
+#include "nouveau_hw.h"
+
+static inline struct drm_encoder_slave_funcs *
+get_slave_funcs(struct nouveau_encoder *enc)
+{
+	return to_encoder_slave(to_drm_encoder(enc))->slave_funcs;
+}
+
+static struct nouveau_encoder *
+find_encoder_by_type(struct drm_connector *connector, int type)
+{
+	struct drm_device *dev = connector->dev;
+	struct nouveau_encoder *nv_encoder;
+	struct drm_mode_object *obj;
+	int i, id;
+
+	for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
+		id = connector->encoder_ids[i];
+		if (!id)
+			break;
+
+		obj = drm_mode_object_find(dev, id, DRM_MODE_OBJECT_ENCODER);
+		if (!obj)
+			continue;
+		nv_encoder = nouveau_encoder(obj_to_encoder(obj));
+
+		if (type == OUTPUT_ANY || nv_encoder->dcb->type == type)
+			return nv_encoder;
+	}
+
+	return NULL;
+}
+
+struct nouveau_connector *
+nouveau_encoder_connector_get(struct nouveau_encoder *encoder)
+{
+	struct drm_device *dev = to_drm_encoder(encoder)->dev;
+	struct drm_connector *drm_connector;
+
+	list_for_each_entry(drm_connector, &dev->mode_config.connector_list, head) {
+		if (drm_connector->encoder == to_drm_encoder(encoder))
+			return nouveau_connector(drm_connector);
+	}
+
+	return NULL;
+}
+
+
+static void
+nouveau_connector_destroy(struct drm_connector *drm_connector)
+{
+	struct nouveau_connector *nv_connector =
+		nouveau_connector(drm_connector);
+	struct drm_device *dev;
+
+	if (!nv_connector)
+		return;
+
+	dev = nv_connector->base.dev;
+	NV_DEBUG_KMS(dev, "\n");
+
+	kfree(nv_connector->edid);
+	drm_sysfs_connector_remove(drm_connector);
+	drm_connector_cleanup(drm_connector);
+	kfree(drm_connector);
+}
+
+static void
+nouveau_connector_ddc_prepare(struct drm_connector *connector, int *flags)
+{
+	struct drm_nouveau_private *dev_priv = connector->dev->dev_private;
+
+	if (dev_priv->card_type >= NV_50)
+		return;
+
+	*flags = 0;
+	if (NVLockVgaCrtcs(dev_priv->dev, false))
+		*flags |= 1;
+	if (nv_heads_tied(dev_priv->dev))
+		*flags |= 2;
+
+	if (*flags & 2)
+		NVSetOwner(dev_priv->dev, 0); /* necessary? */
+}
+
+static void
+nouveau_connector_ddc_finish(struct drm_connector *connector, int flags)
+{
+	struct drm_nouveau_private *dev_priv = connector->dev->dev_private;
+
+	if (dev_priv->card_type >= NV_50)
+		return;
+
+	if (flags & 2)
+		NVSetOwner(dev_priv->dev, 4);
+	if (flags & 1)
+		NVLockVgaCrtcs(dev_priv->dev, true);
+}
+
+static struct nouveau_i2c_chan *
+nouveau_connector_ddc_detect(struct drm_connector *connector,
+			     struct nouveau_encoder **pnv_encoder)
+{
+	struct drm_device *dev = connector->dev;
+	uint8_t out_buf[] = { 0x0, 0x0}, buf[2];
+	int ret, flags, i;
+
+	struct i2c_msg msgs[] = {
+		{
+			.addr = 0x50,
+			.flags = 0,
+			.len = 1,
+			.buf = out_buf,
+		},
+		{
+			.addr = 0x50,
+			.flags = I2C_M_RD,
+			.len = 1,
+			.buf = buf,
+		}
+	};
+
+	for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
+		struct nouveau_i2c_chan *i2c = NULL;
+		struct nouveau_encoder *nv_encoder;
+		struct drm_mode_object *obj;
+		int id;
+
+		id = connector->encoder_ids[i];
+		if (!id)
+			break;
+
+		obj = drm_mode_object_find(dev, id, DRM_MODE_OBJECT_ENCODER);
+		if (!obj)
+			continue;
+		nv_encoder = nouveau_encoder(obj_to_encoder(obj));
+
+		if (nv_encoder->dcb->i2c_index < 0xf)
+			i2c = nouveau_i2c_find(dev, nv_encoder->dcb->i2c_index);
+		if (!i2c)
+			continue;
+
+		nouveau_connector_ddc_prepare(connector, &flags);
+		ret = i2c_transfer(&i2c->adapter, msgs, 2);
+		nouveau_connector_ddc_finish(connector, flags);
+
+		if (ret == 2) {
+			*pnv_encoder = nv_encoder;
+			return i2c;
+		}
+	}
+
+	return NULL;
+}
+
+static void
+nouveau_connector_set_encoder(struct drm_connector *connector,
+			      struct nouveau_encoder *nv_encoder)
+{
+	struct nouveau_connector *nv_connector = nouveau_connector(connector);
+	struct drm_nouveau_private *dev_priv = connector->dev->dev_private;
+	struct drm_device *dev = connector->dev;
+
+	if (nv_connector->detected_encoder == nv_encoder)
+		return;
+	nv_connector->detected_encoder = nv_encoder;
+
+	if (nv_encoder->dcb->type == OUTPUT_LVDS ||
+	    nv_encoder->dcb->type == OUTPUT_TMDS) {
+		connector->doublescan_allowed = false;
+		connector->interlace_allowed = false;
+	} else {
+		connector->doublescan_allowed = true;
+		if (dev_priv->card_type == NV_20 ||
+		   (dev_priv->card_type == NV_10 &&
+		    (dev->pci_device & 0x0ff0) != 0x0100 &&
+		    (dev->pci_device & 0x0ff0) != 0x0150))
+			/* HW is broken */
+			connector->interlace_allowed = false;
+		else
+			connector->interlace_allowed = true;
+	}
+
+	if (connector->connector_type == DRM_MODE_CONNECTOR_DVII) {
+		drm_connector_property_set_value(connector,
+			dev->mode_config.dvi_i_subconnector_property,
+			nv_encoder->dcb->type == OUTPUT_TMDS ?
+			DRM_MODE_SUBCONNECTOR_DVID :
+			DRM_MODE_SUBCONNECTOR_DVIA);
+	}
+}
+
+static enum drm_connector_status
+nouveau_connector_detect(struct drm_connector *connector)
+{
+	struct drm_device *dev = connector->dev;
+	struct nouveau_connector *nv_connector = nouveau_connector(connector);
+	struct nouveau_encoder *nv_encoder = NULL;
+	struct nouveau_i2c_chan *i2c;
+	int type, flags;
+
+	if (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)
+		nv_encoder = find_encoder_by_type(connector, OUTPUT_LVDS);
+	if (nv_encoder && nv_connector->native_mode) {
+		unsigned status = connector_status_connected;
+
+#ifdef CONFIG_ACPI
+		if (!nouveau_ignorelid && !acpi_lid_open())
+			status = connector_status_unknown;
+#endif
+		nouveau_connector_set_encoder(connector, nv_encoder);
+		return status;
+	}
+
+	/* Cleanup the previous EDID block. */
+	if (nv_connector->edid) {
+		drm_mode_connector_update_edid_property(connector, NULL);
+		kfree(nv_connector->edid);
+		nv_connector->edid = NULL;
+	}
+
+	i2c = nouveau_connector_ddc_detect(connector, &nv_encoder);
+	if (i2c) {
+		nouveau_connector_ddc_prepare(connector, &flags);
+		nv_connector->edid = drm_get_edid(connector, &i2c->adapter);
+		nouveau_connector_ddc_finish(connector, flags);
+		drm_mode_connector_update_edid_property(connector,
+							nv_connector->edid);
+		if (!nv_connector->edid) {
+			NV_ERROR(dev, "DDC responded, but no EDID for %s\n",
+				 drm_get_connector_name(connector));
+			goto detect_analog;
+		}
+
+		if (nv_encoder->dcb->type == OUTPUT_DP &&
+		    !nouveau_dp_detect(to_drm_encoder(nv_encoder))) {
+			NV_ERROR(dev, "Detected %s, but failed init\n",
+				 drm_get_connector_name(connector));
+			return connector_status_disconnected;
+		}
+
+		/* Override encoder type for DVI-I based on whether EDID
+		 * says the display is digital or analog, both use the
+		 * same i2c channel so the value returned from ddc_detect
+		 * isn't necessarily correct.
+		 */
+		if (connector->connector_type == DRM_MODE_CONNECTOR_DVII) {
+			if (nv_connector->edid->input & DRM_EDID_INPUT_DIGITAL)
+				type = OUTPUT_TMDS;
+			else
+				type = OUTPUT_ANALOG;
+
+			nv_encoder = find_encoder_by_type(connector, type);
+			if (!nv_encoder) {
+				NV_ERROR(dev, "Detected %d encoder on %s, "
+					      "but no object!\n", type,
+					 drm_get_connector_name(connector));
+				return connector_status_disconnected;
+			}
+		}
+
+		nouveau_connector_set_encoder(connector, nv_encoder);
+		return connector_status_connected;
+	}
+
+detect_analog:
+	nv_encoder = find_encoder_by_type(connector, OUTPUT_ANALOG);
+	if (!nv_encoder)
+		nv_encoder = find_encoder_by_type(connector, OUTPUT_TV);
+	if (nv_encoder) {
+		struct drm_encoder *encoder = to_drm_encoder(nv_encoder);
+		struct drm_encoder_helper_funcs *helper =
+						encoder->helper_private;
+
+		if (helper->detect(encoder, connector) ==
+						connector_status_connected) {
+			nouveau_connector_set_encoder(connector, nv_encoder);
+			return connector_status_connected;
+		}
+
+	}
+
+	return connector_status_disconnected;
+}
+
+static void
+nouveau_connector_force(struct drm_connector *connector)
+{
+	struct drm_device *dev = connector->dev;
+	struct nouveau_encoder *nv_encoder;
+	int type;
+
+	if (connector->connector_type == DRM_MODE_CONNECTOR_DVII) {
+		if (connector->force == DRM_FORCE_ON_DIGITAL)
+			type = OUTPUT_TMDS;
+		else
+			type = OUTPUT_ANALOG;
+	} else
+		type = OUTPUT_ANY;
+
+	nv_encoder = find_encoder_by_type(connector, type);
+	if (!nv_encoder) {
+		NV_ERROR(dev, "can't find encoder to force %s on!\n",
+			 drm_get_connector_name(connector));
+		connector->status = connector_status_disconnected;
+		return;
+	}
+
+	nouveau_connector_set_encoder(connector, nv_encoder);
+}
+
+static int
+nouveau_connector_set_property(struct drm_connector *connector,
+			       struct drm_property *property, uint64_t value)
+{
+	struct nouveau_connector *nv_connector = nouveau_connector(connector);
+	struct nouveau_encoder *nv_encoder = nv_connector->detected_encoder;
+	struct drm_device *dev = connector->dev;
+	int ret;
+
+	/* Scaling mode */
+	if (property == dev->mode_config.scaling_mode_property) {
+		struct nouveau_crtc *nv_crtc = NULL;
+		bool modeset = false;
+
+		switch (value) {
+		case DRM_MODE_SCALE_NONE:
+		case DRM_MODE_SCALE_FULLSCREEN:
+		case DRM_MODE_SCALE_CENTER:
+		case DRM_MODE_SCALE_ASPECT:
+			break;
+		default:
+			return -EINVAL;
+		}
+
+		/* LVDS always needs gpu scaling */
+		if (connector->connector_type == DRM_MODE_CONNECTOR_LVDS &&
+		    value == DRM_MODE_SCALE_NONE)
+			return -EINVAL;
+
+		/* Changing between GPU and panel scaling requires a full
+		 * modeset
+		 */
+		if ((nv_connector->scaling_mode == DRM_MODE_SCALE_NONE) ||
+		    (value == DRM_MODE_SCALE_NONE))
+			modeset = true;
+		nv_connector->scaling_mode = value;
+
+		if (connector->encoder && connector->encoder->crtc)
+			nv_crtc = nouveau_crtc(connector->encoder->crtc);
+		if (!nv_crtc)
+			return 0;
+
+		if (modeset || !nv_crtc->set_scale) {
+			ret = drm_crtc_helper_set_mode(&nv_crtc->base,
+							&nv_crtc->base.mode,
+							nv_crtc->base.x,
+							nv_crtc->base.y, NULL);
+			if (!ret)
+				return -EINVAL;
+		} else {
+			ret = nv_crtc->set_scale(nv_crtc, value, true);
+			if (ret)
+				return ret;
+		}
+
+		return 0;
+	}
+
+	/* Dithering */
+	if (property == dev->mode_config.dithering_mode_property) {
+		struct nouveau_crtc *nv_crtc = NULL;
+
+		if (value == DRM_MODE_DITHERING_ON)
+			nv_connector->use_dithering = true;
+		else
+			nv_connector->use_dithering = false;
+
+		if (connector->encoder && connector->encoder->crtc)
+			nv_crtc = nouveau_crtc(connector->encoder->crtc);
+
+		if (!nv_crtc || !nv_crtc->set_dither)
+			return 0;
+
+		return nv_crtc->set_dither(nv_crtc, nv_connector->use_dithering,
+					   true);
+	}
+
+	if (nv_encoder && nv_encoder->dcb->type == OUTPUT_TV)
+		return get_slave_funcs(nv_encoder)->
+			set_property(to_drm_encoder(nv_encoder), connector, property, value);
+
+	return -EINVAL;
+}
+
+static struct drm_display_mode *
+nouveau_connector_native_mode(struct nouveau_connector *connector)
+{
+	struct drm_device *dev = connector->base.dev;
+	struct drm_display_mode *mode, *largest = NULL;
+	int high_w = 0, high_h = 0, high_v = 0;
+
+	/* Use preferred mode if there is one.. */
+	list_for_each_entry(mode, &connector->base.probed_modes, head) {
+		if (mode->type & DRM_MODE_TYPE_PREFERRED) {
+			NV_DEBUG_KMS(dev, "native mode from preferred\n");
+			return drm_mode_duplicate(dev, mode);
+		}
+	}
+
+	/* Otherwise, take the resolution with the largest width, then height,
+	 * then vertical refresh
+	 */
+	list_for_each_entry(mode, &connector->base.probed_modes, head) {
+		if (mode->hdisplay < high_w)
+			continue;
+
+		if (mode->hdisplay == high_w && mode->vdisplay < high_h)
+			continue;
+
+		if (mode->hdisplay == high_w && mode->vdisplay == high_h &&
+		    mode->vrefresh < high_v)
+			continue;
+
+		high_w = mode->hdisplay;
+		high_h = mode->vdisplay;
+		high_v = mode->vrefresh;
+		largest = mode;
+	}
+
+	NV_DEBUG_KMS(dev, "native mode from largest: %dx%d@%d\n",
+		      high_w, high_h, high_v);
+	return largest ? drm_mode_duplicate(dev, largest) : NULL;
+}
+
+struct moderec {
+	int hdisplay;
+	int vdisplay;
+};
+
+static struct moderec scaler_modes[] = {
+	{ 1920, 1200 },
+	{ 1920, 1080 },
+	{ 1680, 1050 },
+	{ 1600, 1200 },
+	{ 1400, 1050 },
+	{ 1280, 1024 },
+	{ 1280, 960 },
+	{ 1152, 864 },
+	{ 1024, 768 },
+	{ 800, 600 },
+	{ 720, 400 },
+	{ 640, 480 },
+	{ 640, 400 },
+	{ 640, 350 },
+	{}
+};
+
+static int
+nouveau_connector_scaler_modes_add(struct drm_connector *connector)
+{
+	struct nouveau_connector *nv_connector = nouveau_connector(connector);
+	struct drm_display_mode *native = nv_connector->native_mode, *m;
+	struct drm_device *dev = connector->dev;
+	struct moderec *mode = &scaler_modes[0];
+	int modes = 0;
+
+	if (!native)
+		return 0;
+
+	while (mode->hdisplay) {
+		if (mode->hdisplay <= native->hdisplay &&
+		    mode->vdisplay <= native->vdisplay) {
+			m = drm_cvt_mode(dev, mode->hdisplay, mode->vdisplay,
+					 drm_mode_vrefresh(native), false,
+					 false, false);
+			if (!m)
+				continue;
+
+			m->type |= DRM_MODE_TYPE_DRIVER;
+
+			drm_mode_probed_add(connector, m);
+			modes++;
+		}
+
+		mode++;
+	}
+
+	return modes;
+}
+
+static int
+nouveau_connector_get_modes(struct drm_connector *connector)
+{
+	struct drm_device *dev = connector->dev;
+	struct nouveau_connector *nv_connector = nouveau_connector(connector);
+	struct nouveau_encoder *nv_encoder = nv_connector->detected_encoder;
+	int ret = 0;
+
+	/* If we're not LVDS, destroy the previous native mode, the attached
+	 * monitor could have changed.
+	 */
+	if (connector->connector_type != DRM_MODE_CONNECTOR_LVDS &&
+	    nv_connector->native_mode) {
+		drm_mode_destroy(dev, nv_connector->native_mode);
+		nv_connector->native_mode = NULL;
+	}
+
+	if (nv_connector->edid)
+		ret = drm_add_edid_modes(connector, nv_connector->edid);
+
+	/* Find the native mode if this is a digital panel, if we didn't
+	 * find any modes through DDC previously add the native mode to
+	 * the list of modes.
+	 */
+	if (!nv_connector->native_mode)
+		nv_connector->native_mode =
+			nouveau_connector_native_mode(nv_connector);
+	if (ret == 0 && nv_connector->native_mode) {
+		struct drm_display_mode *mode;
+
+		mode = drm_mode_duplicate(dev, nv_connector->native_mode);
+		drm_mode_probed_add(connector, mode);
+		ret = 1;
+	}
+
+	if (nv_encoder->dcb->type == OUTPUT_TV)
+		ret = get_slave_funcs(nv_encoder)->
+			get_modes(to_drm_encoder(nv_encoder), connector);
+
+	if (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)
+		ret += nouveau_connector_scaler_modes_add(connector);
+
+	return ret;
+}
+
+static int
+nouveau_connector_mode_valid(struct drm_connector *connector,
+			     struct drm_display_mode *mode)
+{
+	struct drm_nouveau_private *dev_priv = connector->dev->dev_private;
+	struct nouveau_connector *nv_connector = nouveau_connector(connector);
+	struct nouveau_encoder *nv_encoder = nv_connector->detected_encoder;
+	unsigned min_clock = 25000, max_clock = min_clock;
+	unsigned clock = mode->clock;
+
+	switch (nv_encoder->dcb->type) {
+	case OUTPUT_LVDS:
+		BUG_ON(!nv_connector->native_mode);
+		if (mode->hdisplay > nv_connector->native_mode->hdisplay ||
+		    mode->vdisplay > nv_connector->native_mode->vdisplay)
+			return MODE_PANEL;
+
+		min_clock = 0;
+		max_clock = 400000;
+		break;
+	case OUTPUT_TMDS:
+		if ((dev_priv->card_type >= NV_50 && !nouveau_duallink) ||
+		    (dev_priv->card_type < NV_50 &&
+		     !nv_encoder->dcb->duallink_possible))
+			max_clock = 165000;
+		else
+			max_clock = 330000;
+		break;
+	case OUTPUT_ANALOG:
+		max_clock = nv_encoder->dcb->crtconf.maxfreq;
+		if (!max_clock)
+			max_clock = 350000;
+		break;
+	case OUTPUT_TV:
+		return get_slave_funcs(nv_encoder)->
+			mode_valid(to_drm_encoder(nv_encoder), mode);
+	case OUTPUT_DP:
+		if (nv_encoder->dp.link_bw == DP_LINK_BW_2_7)
+			max_clock = nv_encoder->dp.link_nr * 270000;
+		else
+			max_clock = nv_encoder->dp.link_nr * 162000;
+
+		clock *= 3;
+		break;
+	}
+
+	if (clock < min_clock)
+		return MODE_CLOCK_LOW;
+
+	if (clock > max_clock)
+		return MODE_CLOCK_HIGH;
+
+	return MODE_OK;
+}
+
+static struct drm_encoder *
+nouveau_connector_best_encoder(struct drm_connector *connector)
+{
+	struct nouveau_connector *nv_connector = nouveau_connector(connector);
+
+	if (nv_connector->detected_encoder)
+		return to_drm_encoder(nv_connector->detected_encoder);
+
+	return NULL;
+}
+
+static const struct drm_connector_helper_funcs
+nouveau_connector_helper_funcs = {
+	.get_modes = nouveau_connector_get_modes,
+	.mode_valid = nouveau_connector_mode_valid,
+	.best_encoder = nouveau_connector_best_encoder,
+};
+
+static const struct drm_connector_funcs
+nouveau_connector_funcs = {
+	.dpms = drm_helper_connector_dpms,
+	.save = NULL,
+	.restore = NULL,
+	.detect = nouveau_connector_detect,
+	.destroy = nouveau_connector_destroy,
+	.fill_modes = drm_helper_probe_single_connector_modes,
+	.set_property = nouveau_connector_set_property,
+	.force = nouveau_connector_force
+};
+
+static int
+nouveau_connector_create_lvds(struct drm_device *dev,
+			      struct drm_connector *connector)
+{
+	struct nouveau_connector *nv_connector = nouveau_connector(connector);
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_i2c_chan *i2c = NULL;
+	struct nouveau_encoder *nv_encoder;
+	struct drm_display_mode native, *mode, *temp;
+	bool dummy, if_is_24bit = false;
+	int ret, flags;
+
+	nv_encoder = find_encoder_by_type(connector, OUTPUT_LVDS);
+	if (!nv_encoder)
+		return -ENODEV;
+
+	ret = nouveau_bios_parse_lvds_table(dev, 0, &dummy, &if_is_24bit);
+	if (ret) {
+		NV_ERROR(dev, "Error parsing LVDS table, disabling LVDS\n");
+		return ret;
+	}
+	nv_connector->use_dithering = !if_is_24bit;
+
+	/* Firstly try getting EDID over DDC, if allowed and I2C channel
+	 * is available.
+	 */
+	if (!dev_priv->VBIOS.pub.fp_no_ddc && nv_encoder->dcb->i2c_index < 0xf)
+		i2c = nouveau_i2c_find(dev, nv_encoder->dcb->i2c_index);
+
+	if (i2c) {
+		nouveau_connector_ddc_prepare(connector, &flags);
+		nv_connector->edid = drm_get_edid(connector, &i2c->adapter);
+		nouveau_connector_ddc_finish(connector, flags);
+	}
+
+	/* If no EDID found above, and the VBIOS indicates a hardcoded
+	 * modeline is avalilable for the panel, set it as the panel's
+	 * native mode and exit.
+	 */
+	if (!nv_connector->edid && nouveau_bios_fp_mode(dev, &native) &&
+	     (nv_encoder->dcb->lvdsconf.use_straps_for_mode ||
+	      dev_priv->VBIOS.pub.fp_no_ddc)) {
+		nv_connector->native_mode = drm_mode_duplicate(dev, &native);
+		goto out;
+	}
+
+	/* Still nothing, some VBIOS images have a hardcoded EDID block
+	 * stored for the panel stored in them.
+	 */
+	if (!nv_connector->edid && !nv_connector->native_mode &&
+	    !dev_priv->VBIOS.pub.fp_no_ddc) {
+		struct edid *edid =
+			(struct edid *)nouveau_bios_embedded_edid(dev);
+		if (edid) {
+			nv_connector->edid = kmalloc(EDID_LENGTH, GFP_KERNEL);
+			*(nv_connector->edid) = *edid;
+		}
+	}
+
+	if (!nv_connector->edid)
+		goto out;
+
+	/* We didn't find/use a panel mode from the VBIOS, so parse the EDID
+	 * block and look for the preferred mode there.
+	 */
+	ret = drm_add_edid_modes(connector, nv_connector->edid);
+	if (ret == 0)
+		goto out;
+	nv_connector->detected_encoder = nv_encoder;
+	nv_connector->native_mode = nouveau_connector_native_mode(nv_connector);
+	list_for_each_entry_safe(mode, temp, &connector->probed_modes, head)
+		drm_mode_remove(connector, mode);
+
+out:
+	if (!nv_connector->native_mode) {
+		NV_ERROR(dev, "LVDS present in DCB table, but couldn't "
+			      "determine its native mode.  Disabling.\n");
+		return -ENODEV;
+	}
+
+	drm_mode_connector_update_edid_property(connector, nv_connector->edid);
+	return 0;
+}
+
+int
+nouveau_connector_create(struct drm_device *dev, int index, int type)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_connector *nv_connector = NULL;
+	struct drm_connector *connector;
+	struct drm_encoder *encoder;
+	int ret;
+
+	NV_DEBUG_KMS(dev, "\n");
+
+	nv_connector = kzalloc(sizeof(*nv_connector), GFP_KERNEL);
+	if (!nv_connector)
+		return -ENOMEM;
+	nv_connector->dcb = nouveau_bios_connector_entry(dev, index);
+	connector = &nv_connector->base;
+
+	switch (type) {
+	case DRM_MODE_CONNECTOR_VGA:
+		NV_INFO(dev, "Detected a VGA connector\n");
+		break;
+	case DRM_MODE_CONNECTOR_DVID:
+		NV_INFO(dev, "Detected a DVI-D connector\n");
+		break;
+	case DRM_MODE_CONNECTOR_DVII:
+		NV_INFO(dev, "Detected a DVI-I connector\n");
+		break;
+	case DRM_MODE_CONNECTOR_LVDS:
+		NV_INFO(dev, "Detected a LVDS connector\n");
+		break;
+	case DRM_MODE_CONNECTOR_TV:
+		NV_INFO(dev, "Detected a TV connector\n");
+		break;
+	case DRM_MODE_CONNECTOR_DisplayPort:
+		NV_INFO(dev, "Detected a DisplayPort connector\n");
+		break;
+	default:
+		NV_ERROR(dev, "Unknown connector, this is not good.\n");
+		break;
+	}
+
+	/* defaults, will get overridden in detect() */
+	connector->interlace_allowed = false;
+	connector->doublescan_allowed = false;
+
+	drm_connector_init(dev, connector, &nouveau_connector_funcs, type);
+	drm_connector_helper_add(connector, &nouveau_connector_helper_funcs);
+
+	/* Init DVI-I specific properties */
+	if (type == DRM_MODE_CONNECTOR_DVII) {
+		drm_mode_create_dvi_i_properties(dev);
+		drm_connector_attach_property(connector, dev->mode_config.dvi_i_subconnector_property, 0);
+		drm_connector_attach_property(connector, dev->mode_config.dvi_i_select_subconnector_property, 0);
+	}
+
+	if (type != DRM_MODE_CONNECTOR_LVDS)
+		nv_connector->use_dithering = false;
+
+	if (type == DRM_MODE_CONNECTOR_DVID ||
+	    type == DRM_MODE_CONNECTOR_DVII ||
+	    type == DRM_MODE_CONNECTOR_LVDS ||
+	    type == DRM_MODE_CONNECTOR_DisplayPort) {
+		nv_connector->scaling_mode = DRM_MODE_SCALE_FULLSCREEN;
+
+		drm_connector_attach_property(connector, dev->mode_config.scaling_mode_property,
+					      nv_connector->scaling_mode);
+		drm_connector_attach_property(connector, dev->mode_config.dithering_mode_property,
+					      nv_connector->use_dithering ? DRM_MODE_DITHERING_ON
+					      : DRM_MODE_DITHERING_OFF);
+
+	} else {
+		nv_connector->scaling_mode = DRM_MODE_SCALE_NONE;
+
+		if (type == DRM_MODE_CONNECTOR_VGA  &&
+				dev_priv->card_type >= NV_50) {
+			drm_connector_attach_property(connector,
+					dev->mode_config.scaling_mode_property,
+					nv_connector->scaling_mode);
+		}
+	}
+
+	/* attach encoders */
+	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
+		struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+
+		if (nv_encoder->dcb->connector != index)
+			continue;
+
+		if (get_slave_funcs(nv_encoder))
+			get_slave_funcs(nv_encoder)->create_resources(encoder, connector);
+
+		drm_mode_connector_attach_encoder(connector, encoder);
+	}
+
+	drm_sysfs_connector_add(connector);
+
+	if (connector->connector_type == DRM_MODE_CONNECTOR_LVDS) {
+		ret = nouveau_connector_create_lvds(dev, connector);
+		if (ret) {
+			connector->funcs->destroy(connector);
+			return ret;
+		}
+	}
+
+	return 0;
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nouveau_grctx.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nouveau_grctx.h
@@ -0,0 +1,133 @@
+#ifndef __NOUVEAU_GRCTX_H__
+#define __NOUVEAU_GRCTX_H__
+
+struct nouveau_grctx {
+	struct drm_device *dev;
+
+	enum {
+		NOUVEAU_GRCTX_PROG,
+		NOUVEAU_GRCTX_VALS
+	} mode;
+	void *data;
+
+	uint32_t ctxprog_max;
+	uint32_t ctxprog_len;
+	uint32_t ctxprog_reg;
+	int      ctxprog_label[32];
+	uint32_t ctxvals_pos;
+	uint32_t ctxvals_base;
+};
+
+#ifdef CP_CTX
+static inline void
+cp_out(struct nouveau_grctx *ctx, uint32_t inst)
+{
+	uint32_t *ctxprog = ctx->data;
+
+	if (ctx->mode != NOUVEAU_GRCTX_PROG)
+		return;
+
+	BUG_ON(ctx->ctxprog_len == ctx->ctxprog_max);
+	ctxprog[ctx->ctxprog_len++] = inst;
+}
+
+static inline void
+cp_lsr(struct nouveau_grctx *ctx, uint32_t val)
+{
+	cp_out(ctx, CP_LOAD_SR | val);
+}
+
+static inline void
+cp_ctx(struct nouveau_grctx *ctx, uint32_t reg, uint32_t length)
+{
+	ctx->ctxprog_reg = (reg - 0x00400000) >> 2;
+
+	ctx->ctxvals_base = ctx->ctxvals_pos;
+	ctx->ctxvals_pos = ctx->ctxvals_base + length;
+
+	if (length > (CP_CTX_COUNT >> CP_CTX_COUNT_SHIFT)) {
+		cp_lsr(ctx, length);
+		length = 0;
+	}
+
+	cp_out(ctx, CP_CTX | (length << CP_CTX_COUNT_SHIFT) | ctx->ctxprog_reg);
+}
+
+static inline void
+cp_name(struct nouveau_grctx *ctx, int name)
+{
+	uint32_t *ctxprog = ctx->data;
+	int i;
+
+	if (ctx->mode != NOUVEAU_GRCTX_PROG)
+		return;
+
+	ctx->ctxprog_label[name] = ctx->ctxprog_len;
+	for (i = 0; i < ctx->ctxprog_len; i++) {
+		if ((ctxprog[i] & 0xfff00000) != 0xff400000)
+			continue;
+		if ((ctxprog[i] & CP_BRA_IP) != ((name) << CP_BRA_IP_SHIFT))
+			continue;
+		ctxprog[i] = (ctxprog[i] & 0x00ff00ff) |
+			     (ctx->ctxprog_len << CP_BRA_IP_SHIFT);
+	}
+}
+
+static inline void
+_cp_bra(struct nouveau_grctx *ctx, u32 mod, int flag, int state, int name)
+{
+	int ip = 0;
+
+	if (mod != 2) {
+		ip = ctx->ctxprog_label[name] << CP_BRA_IP_SHIFT;
+		if (ip == 0)
+			ip = 0xff000000 | (name << CP_BRA_IP_SHIFT);
+	}
+
+	cp_out(ctx, CP_BRA | (mod << 18) | ip | flag |
+		    (state ? 0 : CP_BRA_IF_CLEAR));
+}
+#define cp_bra(c,f,s,n) _cp_bra((c), 0, CP_FLAG_##f, CP_FLAG_##f##_##s, n)
+#ifdef CP_BRA_MOD
+#define cp_cal(c,f,s,n) _cp_bra((c), 1, CP_FLAG_##f, CP_FLAG_##f##_##s, n)
+#define cp_ret(c,f,s) _cp_bra((c), 2, CP_FLAG_##f, CP_FLAG_##f##_##s, 0)
+#endif
+
+static inline void
+_cp_wait(struct nouveau_grctx *ctx, int flag, int state)
+{
+	cp_out(ctx, CP_WAIT | flag | (state ? CP_WAIT_SET : 0));
+}
+#define cp_wait(c,f,s) _cp_wait((c), CP_FLAG_##f, CP_FLAG_##f##_##s)
+
+static inline void
+_cp_set(struct nouveau_grctx *ctx, int flag, int state)
+{
+	cp_out(ctx, CP_SET | flag | (state ? CP_SET_1 : 0));
+}
+#define cp_set(c,f,s) _cp_set((c), CP_FLAG_##f, CP_FLAG_##f##_##s)
+
+static inline void
+cp_pos(struct nouveau_grctx *ctx, int offset)
+{
+	ctx->ctxvals_pos = offset;
+	ctx->ctxvals_base = ctx->ctxvals_pos;
+
+	cp_lsr(ctx, ctx->ctxvals_pos);
+	cp_out(ctx, CP_SET_CONTEXT_POINTER);
+}
+
+static inline void
+gr_def(struct nouveau_grctx *ctx, uint32_t reg, uint32_t val)
+{
+	if (ctx->mode != NOUVEAU_GRCTX_VALS)
+		return;
+
+	reg = (reg - 0x00400000) / 4;
+	reg = (reg - ctx->ctxprog_reg) + ctx->ctxvals_base;
+
+	nv_wo32(ctx->dev, ctx->data, reg, val);
+}
+#endif
+
+#endif
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv50_display.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv50_display.c
@@ -0,0 +1,1033 @@
+/*
+ * Copyright (C) 2008 Maarten Maathuis.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include "nv50_display.h"
+#include "nouveau_crtc.h"
+#include "nouveau_encoder.h"
+#include "nouveau_connector.h"
+#include "nouveau_fb.h"
+#include "drm_crtc_helper.h"
+
+static void
+nv50_evo_channel_del(struct nouveau_channel **pchan)
+{
+	struct nouveau_channel *chan = *pchan;
+
+	if (!chan)
+		return;
+	*pchan = NULL;
+
+	nouveau_gpuobj_channel_takedown(chan);
+	nouveau_bo_ref(NULL, &chan->pushbuf_bo);
+
+	if (chan->user)
+		iounmap(chan->user);
+
+	kfree(chan);
+}
+
+static int
+nv50_evo_dmaobj_new(struct nouveau_channel *evo, uint32_t class, uint32_t name,
+		    uint32_t tile_flags, uint32_t magic_flags,
+		    uint32_t offset, uint32_t limit)
+{
+	struct drm_nouveau_private *dev_priv = evo->dev->dev_private;
+	struct drm_device *dev = evo->dev;
+	struct nouveau_gpuobj *obj = NULL;
+	int ret;
+
+	ret = nouveau_gpuobj_new(dev, evo, 6*4, 32, 0, &obj);
+	if (ret)
+		return ret;
+	obj->engine = NVOBJ_ENGINE_DISPLAY;
+
+	ret = nouveau_gpuobj_ref_add(dev, evo, name, obj, NULL);
+	if (ret) {
+		nouveau_gpuobj_del(dev, &obj);
+		return ret;
+	}
+
+	dev_priv->engine.instmem.prepare_access(dev, true);
+	nv_wo32(dev, obj, 0, (tile_flags << 22) | (magic_flags << 16) | class);
+	nv_wo32(dev, obj, 1, limit);
+	nv_wo32(dev, obj, 2, offset);
+	nv_wo32(dev, obj, 3, 0x00000000);
+	nv_wo32(dev, obj, 4, 0x00000000);
+	nv_wo32(dev, obj, 5, 0x00010000);
+	dev_priv->engine.instmem.finish_access(dev);
+
+	return 0;
+}
+
+static int
+nv50_evo_channel_new(struct drm_device *dev, struct nouveau_channel **pchan)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_channel *chan;
+	int ret;
+
+	chan = kzalloc(sizeof(struct nouveau_channel), GFP_KERNEL);
+	if (!chan)
+		return -ENOMEM;
+	*pchan = chan;
+
+	chan->id = -1;
+	chan->dev = dev;
+	chan->user_get = 4;
+	chan->user_put = 0;
+
+	INIT_LIST_HEAD(&chan->ramht_refs);
+
+	ret = nouveau_gpuobj_new_ref(dev, NULL, NULL, 0, 32768, 0x1000,
+				     NVOBJ_FLAG_ZERO_ALLOC, &chan->ramin);
+	if (ret) {
+		NV_ERROR(dev, "Error allocating EVO channel memory: %d\n", ret);
+		nv50_evo_channel_del(pchan);
+		return ret;
+	}
+
+	ret = nouveau_mem_init_heap(&chan->ramin_heap, chan->ramin->gpuobj->
+				    im_pramin->start, 32768);
+	if (ret) {
+		NV_ERROR(dev, "Error initialising EVO PRAMIN heap: %d\n", ret);
+		nv50_evo_channel_del(pchan);
+		return ret;
+	}
+
+	ret = nouveau_gpuobj_new_ref(dev, chan, chan, 0, 4096, 16,
+				     0, &chan->ramht);
+	if (ret) {
+		NV_ERROR(dev, "Unable to allocate EVO RAMHT: %d\n", ret);
+		nv50_evo_channel_del(pchan);
+		return ret;
+	}
+
+	if (dev_priv->chipset != 0x50) {
+		ret = nv50_evo_dmaobj_new(chan, 0x3d, NvEvoFB16, 0x70, 0x19,
+					  0, 0xffffffff);
+		if (ret) {
+			nv50_evo_channel_del(pchan);
+			return ret;
+		}
+
+
+		ret = nv50_evo_dmaobj_new(chan, 0x3d, NvEvoFB32, 0x7a, 0x19,
+					  0, 0xffffffff);
+		if (ret) {
+			nv50_evo_channel_del(pchan);
+			return ret;
+		}
+	}
+
+	ret = nv50_evo_dmaobj_new(chan, 0x3d, NvEvoVRAM, 0, 0x19,
+				  0, nouveau_mem_fb_amount(dev));
+	if (ret) {
+		nv50_evo_channel_del(pchan);
+		return ret;
+	}
+
+	ret = nouveau_bo_new(dev, NULL, 4096, 0, TTM_PL_FLAG_VRAM, 0, 0,
+			     false, true, &chan->pushbuf_bo);
+	if (ret == 0)
+		ret = nouveau_bo_pin(chan->pushbuf_bo, TTM_PL_FLAG_VRAM);
+	if (ret) {
+		NV_ERROR(dev, "Error creating EVO DMA push buffer: %d\n", ret);
+		nv50_evo_channel_del(pchan);
+		return ret;
+	}
+
+	ret = nouveau_bo_map(chan->pushbuf_bo);
+	if (ret) {
+		NV_ERROR(dev, "Error mapping EVO DMA push buffer: %d\n", ret);
+		nv50_evo_channel_del(pchan);
+		return ret;
+	}
+
+	chan->user = ioremap(pci_resource_start(dev->pdev, 0) +
+					NV50_PDISPLAY_USER(0), PAGE_SIZE);
+	if (!chan->user) {
+		NV_ERROR(dev, "Error mapping EVO control regs.\n");
+		nv50_evo_channel_del(pchan);
+		return -ENOMEM;
+	}
+
+	return 0;
+}
+
+int
+nv50_display_init(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_timer_engine *ptimer = &dev_priv->engine.timer;
+	struct nouveau_channel *evo = dev_priv->evo;
+	struct drm_connector *connector;
+	uint32_t val, ram_amount, hpd_en[2];
+	uint64_t start;
+	int ret, i;
+
+	NV_DEBUG_KMS(dev, "\n");
+
+	nv_wr32(dev, 0x00610184, nv_rd32(dev, 0x00614004));
+	/*
+	 * I think the 0x006101XX range is some kind of main control area
+	 * that enables things.
+	 */
+	/* CRTC? */
+	for (i = 0; i < 2; i++) {
+		val = nv_rd32(dev, 0x00616100 + (i * 0x800));
+		nv_wr32(dev, 0x00610190 + (i * 0x10), val);
+		val = nv_rd32(dev, 0x00616104 + (i * 0x800));
+		nv_wr32(dev, 0x00610194 + (i * 0x10), val);
+		val = nv_rd32(dev, 0x00616108 + (i * 0x800));
+		nv_wr32(dev, 0x00610198 + (i * 0x10), val);
+		val = nv_rd32(dev, 0x0061610c + (i * 0x800));
+		nv_wr32(dev, 0x0061019c + (i * 0x10), val);
+	}
+	/* DAC */
+	for (i = 0; i < 3; i++) {
+		val = nv_rd32(dev, 0x0061a000 + (i * 0x800));
+		nv_wr32(dev, 0x006101d0 + (i * 0x04), val);
+	}
+	/* SOR */
+	for (i = 0; i < 4; i++) {
+		val = nv_rd32(dev, 0x0061c000 + (i * 0x800));
+		nv_wr32(dev, 0x006101e0 + (i * 0x04), val);
+	}
+	/* Something not yet in use, tv-out maybe. */
+	for (i = 0; i < 3; i++) {
+		val = nv_rd32(dev, 0x0061e000 + (i * 0x800));
+		nv_wr32(dev, 0x006101f0 + (i * 0x04), val);
+	}
+
+	for (i = 0; i < 3; i++) {
+		nv_wr32(dev, NV50_PDISPLAY_DAC_DPMS_CTRL(i), 0x00550000 |
+			NV50_PDISPLAY_DAC_DPMS_CTRL_PENDING);
+		nv_wr32(dev, NV50_PDISPLAY_DAC_CLK_CTRL1(i), 0x00000001);
+	}
+
+	/* This used to be in crtc unblank, but seems out of place there. */
+	nv_wr32(dev, NV50_PDISPLAY_UNK_380, 0);
+	/* RAM is clamped to 256 MiB. */
+	ram_amount = nouveau_mem_fb_amount(dev);
+	NV_DEBUG_KMS(dev, "ram_amount %d\n", ram_amount);
+	if (ram_amount > 256*1024*1024)
+		ram_amount = 256*1024*1024;
+	nv_wr32(dev, NV50_PDISPLAY_RAM_AMOUNT, ram_amount - 1);
+	nv_wr32(dev, NV50_PDISPLAY_UNK_388, 0x150000);
+	nv_wr32(dev, NV50_PDISPLAY_UNK_38C, 0);
+
+	/* The precise purpose is unknown, i suspect it has something to do
+	 * with text mode.
+	 */
+	if (nv_rd32(dev, NV50_PDISPLAY_INTR_1) & 0x100) {
+		nv_wr32(dev, NV50_PDISPLAY_INTR_1, 0x100);
+		nv_wr32(dev, 0x006194e8, nv_rd32(dev, 0x006194e8) & ~1);
+		if (!nv_wait(0x006194e8, 2, 0)) {
+			NV_ERROR(dev, "timeout: (0x6194e8 & 2) != 0\n");
+			NV_ERROR(dev, "0x6194e8 = 0x%08x\n",
+						nv_rd32(dev, 0x6194e8));
+			return -EBUSY;
+		}
+	}
+
+	/* taken from nv bug #12637, attempts to un-wedge the hw if it's
+	 * stuck in some unspecified state
+	 */
+	start = ptimer->read(dev);
+	nv_wr32(dev, NV50_PDISPLAY_CHANNEL_STAT(0), 0x2b00);
+	while ((val = nv_rd32(dev, NV50_PDISPLAY_CHANNEL_STAT(0))) & 0x1e0000) {
+		if ((val & 0x9f0000) == 0x20000)
+			nv_wr32(dev, NV50_PDISPLAY_CHANNEL_STAT(0),
+							val | 0x800000);
+
+		if ((val & 0x3f0000) == 0x30000)
+			nv_wr32(dev, NV50_PDISPLAY_CHANNEL_STAT(0),
+							val | 0x200000);
+
+		if (ptimer->read(dev) - start > 1000000000ULL) {
+			NV_ERROR(dev, "timeout: (0x610200 & 0x1e0000) != 0\n");
+			NV_ERROR(dev, "0x610200 = 0x%08x\n", val);
+			return -EBUSY;
+		}
+	}
+
+	nv_wr32(dev, NV50_PDISPLAY_CTRL_STATE, NV50_PDISPLAY_CTRL_STATE_ENABLE);
+	nv_wr32(dev, NV50_PDISPLAY_CHANNEL_STAT(0), 0x1000b03);
+	if (!nv_wait(NV50_PDISPLAY_CHANNEL_STAT(0), 0x40000000, 0x40000000)) {
+		NV_ERROR(dev, "timeout: (0x610200 & 0x40000000) == 0x40000000\n");
+		NV_ERROR(dev, "0x610200 = 0x%08x\n",
+			  nv_rd32(dev, NV50_PDISPLAY_CHANNEL_STAT(0)));
+		return -EBUSY;
+	}
+
+	for (i = 0; i < 2; i++) {
+		nv_wr32(dev, NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(i), 0x2000);
+		if (!nv_wait(NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(i),
+			     NV50_PDISPLAY_CURSOR_CURSOR_CTRL2_STATUS, 0)) {
+			NV_ERROR(dev, "timeout: CURSOR_CTRL2_STATUS == 0\n");
+			NV_ERROR(dev, "CURSOR_CTRL2 = 0x%08x\n",
+				 nv_rd32(dev, NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(i)));
+			return -EBUSY;
+		}
+
+		nv_wr32(dev, NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(i),
+			NV50_PDISPLAY_CURSOR_CURSOR_CTRL2_ON);
+		if (!nv_wait(NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(i),
+			     NV50_PDISPLAY_CURSOR_CURSOR_CTRL2_STATUS,
+			     NV50_PDISPLAY_CURSOR_CURSOR_CTRL2_STATUS_ACTIVE)) {
+			NV_ERROR(dev, "timeout: "
+				      "CURSOR_CTRL2_STATUS_ACTIVE(%d)\n", i);
+			NV_ERROR(dev, "CURSOR_CTRL2(%d) = 0x%08x\n", i,
+				 nv_rd32(dev, NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(i)));
+			return -EBUSY;
+		}
+	}
+
+	nv_wr32(dev, NV50_PDISPLAY_OBJECTS, (evo->ramin->instance >> 8) | 9);
+
+	/* initialise fifo */
+	nv_wr32(dev, NV50_PDISPLAY_CHANNEL_DMA_CB(0),
+		((evo->pushbuf_bo->bo.mem.mm_node->start << PAGE_SHIFT) >> 8) |
+		NV50_PDISPLAY_CHANNEL_DMA_CB_LOCATION_VRAM |
+		NV50_PDISPLAY_CHANNEL_DMA_CB_VALID);
+	nv_wr32(dev, NV50_PDISPLAY_CHANNEL_UNK2(0), 0x00010000);
+	nv_wr32(dev, NV50_PDISPLAY_CHANNEL_UNK3(0), 0x00000002);
+	if (!nv_wait(0x610200, 0x80000000, 0x00000000)) {
+		NV_ERROR(dev, "timeout: (0x610200 & 0x80000000) == 0\n");
+		NV_ERROR(dev, "0x610200 = 0x%08x\n", nv_rd32(dev, 0x610200));
+		return -EBUSY;
+	}
+	nv_wr32(dev, NV50_PDISPLAY_CHANNEL_STAT(0),
+		(nv_rd32(dev, NV50_PDISPLAY_CHANNEL_STAT(0)) & ~0x00000003) |
+		 NV50_PDISPLAY_CHANNEL_STAT_DMA_ENABLED);
+	nv_wr32(dev, NV50_PDISPLAY_USER_PUT(0), 0);
+	nv_wr32(dev, NV50_PDISPLAY_CHANNEL_STAT(0), 0x01000003 |
+		NV50_PDISPLAY_CHANNEL_STAT_DMA_ENABLED);
+	nv_wr32(dev, 0x610300, nv_rd32(dev, 0x610300) & ~1);
+
+	evo->dma.max = (4096/4) - 2;
+	evo->dma.max &= ~7;
+	evo->dma.put = 0;
+	evo->dma.cur = evo->dma.put;
+	evo->dma.free = evo->dma.max - evo->dma.cur;
+
+	ret = RING_SPACE(evo, NOUVEAU_DMA_SKIPS);
+	if (ret)
+		return ret;
+
+	for (i = 0; i < NOUVEAU_DMA_SKIPS; i++)
+		OUT_RING(evo, 0);
+
+	ret = RING_SPACE(evo, 11);
+	if (ret)
+		return ret;
+	BEGIN_RING(evo, 0, NV50_EVO_UNK84, 2);
+	OUT_RING(evo, NV50_EVO_UNK84_NOTIFY_DISABLED);
+	OUT_RING(evo, NV50_EVO_DMA_NOTIFY_HANDLE_NONE);
+	BEGIN_RING(evo, 0, NV50_EVO_CRTC(0, FB_DMA), 1);
+	OUT_RING(evo, NV50_EVO_CRTC_FB_DMA_HANDLE_NONE);
+	BEGIN_RING(evo, 0, NV50_EVO_CRTC(0, UNK0800), 1);
+	OUT_RING(evo, 0);
+	BEGIN_RING(evo, 0, NV50_EVO_CRTC(0, DISPLAY_START), 1);
+	OUT_RING(evo, 0);
+	BEGIN_RING(evo, 0, NV50_EVO_CRTC(0, UNK082C), 1);
+	OUT_RING(evo, 0);
+	FIRE_RING(evo);
+	if (!nv_wait(0x640004, 0xffffffff, evo->dma.put << 2))
+		NV_ERROR(dev, "evo pushbuf stalled\n");
+
+	/* enable clock change interrupts. */
+	nv_wr32(dev, 0x610028, 0x00010001);
+	nv_wr32(dev, NV50_PDISPLAY_INTR_EN, (NV50_PDISPLAY_INTR_EN_CLK_UNK10 |
+					     NV50_PDISPLAY_INTR_EN_CLK_UNK20 |
+					     NV50_PDISPLAY_INTR_EN_CLK_UNK40));
+
+	/* enable hotplug interrupts */
+	hpd_en[0] = hpd_en[1] = 0;
+	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
+		struct nouveau_connector *conn = nouveau_connector(connector);
+		struct dcb_gpio_entry *gpio;
+
+		if (connector->connector_type != DRM_MODE_CONNECTOR_DVII &&
+		    connector->connector_type != DRM_MODE_CONNECTOR_DVID &&
+		    connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort)
+			continue;
+
+		gpio = nouveau_bios_gpio_entry(dev, conn->dcb->gpio_tag);
+		if (!gpio)
+			continue;
+
+		hpd_en[gpio->line >> 4] |= (0x00010001 << (gpio->line & 0xf));
+	}
+
+	nv_wr32(dev, 0xe054, 0xffffffff);
+	nv_wr32(dev, 0xe050, hpd_en[0]);
+	if (dev_priv->chipset >= 0x90) {
+		nv_wr32(dev, 0xe074, 0xffffffff);
+		nv_wr32(dev, 0xe070, hpd_en[1]);
+	}
+
+	return 0;
+}
+
+static int nv50_display_disable(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct drm_crtc *drm_crtc;
+	int ret, i;
+
+	NV_DEBUG_KMS(dev, "\n");
+
+	list_for_each_entry(drm_crtc, &dev->mode_config.crtc_list, head) {
+		struct nouveau_crtc *crtc = nouveau_crtc(drm_crtc);
+
+		nv50_crtc_blank(crtc, true);
+	}
+
+	ret = RING_SPACE(dev_priv->evo, 2);
+	if (ret == 0) {
+		BEGIN_RING(dev_priv->evo, 0, NV50_EVO_UPDATE, 1);
+		OUT_RING(dev_priv->evo, 0);
+	}
+	FIRE_RING(dev_priv->evo);
+
+	/* Almost like ack'ing a vblank interrupt, maybe in the spirit of
+	 * cleaning up?
+	 */
+	list_for_each_entry(drm_crtc, &dev->mode_config.crtc_list, head) {
+		struct nouveau_crtc *crtc = nouveau_crtc(drm_crtc);
+		uint32_t mask = NV50_PDISPLAY_INTR_1_VBLANK_CRTC_(crtc->index);
+
+		if (!crtc->base.enabled)
+			continue;
+
+		nv_wr32(dev, NV50_PDISPLAY_INTR_1, mask);
+		if (!nv_wait(NV50_PDISPLAY_INTR_1, mask, mask)) {
+			NV_ERROR(dev, "timeout: (0x610024 & 0x%08x) == "
+				      "0x%08x\n", mask, mask);
+			NV_ERROR(dev, "0x610024 = 0x%08x\n",
+				 nv_rd32(dev, NV50_PDISPLAY_INTR_1));
+		}
+	}
+
+	nv_wr32(dev, NV50_PDISPLAY_CHANNEL_STAT(0), 0);
+	nv_wr32(dev, NV50_PDISPLAY_CTRL_STATE, 0);
+	if (!nv_wait(NV50_PDISPLAY_CHANNEL_STAT(0), 0x1e0000, 0)) {
+		NV_ERROR(dev, "timeout: (0x610200 & 0x1e0000) == 0\n");
+		NV_ERROR(dev, "0x610200 = 0x%08x\n",
+			  nv_rd32(dev, NV50_PDISPLAY_CHANNEL_STAT(0)));
+	}
+
+	for (i = 0; i < 3; i++) {
+		if (!nv_wait(NV50_PDISPLAY_SOR_DPMS_STATE(i),
+			     NV50_PDISPLAY_SOR_DPMS_STATE_WAIT, 0)) {
+			NV_ERROR(dev, "timeout: SOR_DPMS_STATE_WAIT(%d) == 0\n", i);
+			NV_ERROR(dev, "SOR_DPMS_STATE(%d) = 0x%08x\n", i,
+				  nv_rd32(dev, NV50_PDISPLAY_SOR_DPMS_STATE(i)));
+		}
+	}
+
+	/* disable interrupts. */
+	nv_wr32(dev, NV50_PDISPLAY_INTR_EN, 0x00000000);
+
+	/* disable hotplug interrupts */
+	nv_wr32(dev, 0xe054, 0xffffffff);
+	nv_wr32(dev, 0xe050, 0x00000000);
+	if (dev_priv->chipset >= 0x90) {
+		nv_wr32(dev, 0xe074, 0xffffffff);
+		nv_wr32(dev, 0xe070, 0x00000000);
+	}
+	return 0;
+}
+
+int nv50_display_create(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct parsed_dcb *dcb = dev_priv->vbios->dcb;
+	uint32_t connector[16] = {};
+	int ret, i;
+
+	NV_DEBUG_KMS(dev, "\n");
+
+	/* init basic kernel modesetting */
+	drm_mode_config_init(dev);
+
+	/* Initialise some optional connector properties. */
+	drm_mode_create_scaling_mode_property(dev);
+	drm_mode_create_dithering_property(dev);
+
+	dev->mode_config.min_width = 0;
+	dev->mode_config.min_height = 0;
+
+	dev->mode_config.funcs = (void *)&nouveau_mode_config_funcs;
+
+	dev->mode_config.max_width = 8192;
+	dev->mode_config.max_height = 8192;
+
+	dev->mode_config.fb_base = dev_priv->fb_phys;
+
+	/* Create EVO channel */
+	ret = nv50_evo_channel_new(dev, &dev_priv->evo);
+	if (ret) {
+		NV_ERROR(dev, "Error creating EVO channel: %d\n", ret);
+		return ret;
+	}
+
+	/* Create CRTC objects */
+	for (i = 0; i < 2; i++)
+		nv50_crtc_create(dev, i);
+
+	/* We setup the encoders from the BIOS table */
+	for (i = 0 ; i < dcb->entries; i++) {
+		struct dcb_entry *entry = &dcb->entry[i];
+
+		if (entry->location != DCB_LOC_ON_CHIP) {
+			NV_WARN(dev, "Off-chip encoder %d/%d unsupported\n",
+				entry->type, ffs(entry->or) - 1);
+			continue;
+		}
+
+		switch (entry->type) {
+		case OUTPUT_TMDS:
+		case OUTPUT_LVDS:
+		case OUTPUT_DP:
+			nv50_sor_create(dev, entry);
+			break;
+		case OUTPUT_ANALOG:
+			nv50_dac_create(dev, entry);
+			break;
+		default:
+			NV_WARN(dev, "DCB encoder %d unknown\n", entry->type);
+			continue;
+		}
+
+		connector[entry->connector] |= (1 << entry->type);
+	}
+
+	/* It appears that DCB 3.0+ VBIOS has a connector table, however,
+	 * I'm not 100% certain how to decode it correctly yet so just
+	 * look at what encoders are present on each connector index and
+	 * attempt to derive the connector type from that.
+	 */
+	for (i = 0 ; i < dcb->entries; i++) {
+		struct dcb_entry *entry = &dcb->entry[i];
+		uint16_t encoders;
+		int type;
+
+		encoders = connector[entry->connector];
+		if (!(encoders & (1 << entry->type)))
+			continue;
+		connector[entry->connector] = 0;
+
+		if (encoders & (1 << OUTPUT_DP)) {
+			type = DRM_MODE_CONNECTOR_DisplayPort;
+		} else if (encoders & (1 << OUTPUT_TMDS)) {
+			if (encoders & (1 << OUTPUT_ANALOG))
+				type = DRM_MODE_CONNECTOR_DVII;
+			else
+				type = DRM_MODE_CONNECTOR_DVID;
+		} else if (encoders & (1 << OUTPUT_ANALOG)) {
+			type = DRM_MODE_CONNECTOR_VGA;
+		} else if (encoders & (1 << OUTPUT_LVDS)) {
+			type = DRM_MODE_CONNECTOR_LVDS;
+		} else {
+			type = DRM_MODE_CONNECTOR_Unknown;
+		}
+
+		if (type == DRM_MODE_CONNECTOR_Unknown)
+			continue;
+
+		nouveau_connector_create(dev, entry->connector, type);
+	}
+
+	ret = nv50_display_init(dev);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+int nv50_display_destroy(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+	NV_DEBUG_KMS(dev, "\n");
+
+	drm_mode_config_cleanup(dev);
+
+	nv50_display_disable(dev);
+	nv50_evo_channel_del(&dev_priv->evo);
+
+	return 0;
+}
+
+static inline uint32_t
+nv50_display_mode_ctrl(struct drm_device *dev, bool sor, int or)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	uint32_t mc;
+
+	if (sor) {
+		if (dev_priv->chipset < 0x90 ||
+		    dev_priv->chipset == 0x92 || dev_priv->chipset == 0xa0)
+			mc = nv_rd32(dev, NV50_PDISPLAY_SOR_MODE_CTRL_P(or));
+		else
+			mc = nv_rd32(dev, NV90_PDISPLAY_SOR_MODE_CTRL_P(or));
+	} else {
+		mc = nv_rd32(dev, NV50_PDISPLAY_DAC_MODE_CTRL_P(or));
+	}
+
+	return mc;
+}
+
+static int
+nv50_display_irq_head(struct drm_device *dev, int *phead,
+		      struct dcb_entry **pdcbent)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	uint32_t unk30 = nv_rd32(dev, NV50_PDISPLAY_UNK30_CTRL);
+	uint32_t dac = 0, sor = 0;
+	int head, i, or = 0, type = OUTPUT_ANY;
+
+	/* We're assuming that head 0 *or* head 1 will be active here,
+	 * and not both.  I'm not sure if the hw will even signal both
+	 * ever, but it definitely shouldn't for us as we commit each
+	 * CRTC separately, and submission will be blocked by the GPU
+	 * until we handle each in turn.
+	 */
+	NV_DEBUG_KMS(dev, "0x610030: 0x%08x\n", unk30);
+	head = ffs((unk30 >> 9) & 3) - 1;
+	if (head < 0)
+		return -EINVAL;
+
+	/* This assumes CRTCs are never bound to multiple encoders, which
+	 * should be the case.
+	 */
+	for (i = 0; i < 3 && type == OUTPUT_ANY; i++) {
+		uint32_t mc = nv50_display_mode_ctrl(dev, false, i);
+		if (!(mc & (1 << head)))
+			continue;
+
+		switch ((mc >> 8) & 0xf) {
+		case 0: type = OUTPUT_ANALOG; break;
+		case 1: type = OUTPUT_TV; break;
+		default:
+			NV_ERROR(dev, "unknown dac mode_ctrl: 0x%08x\n", dac);
+			return -1;
+		}
+
+		or = i;
+	}
+
+	for (i = 0; i < 4 && type == OUTPUT_ANY; i++) {
+		uint32_t mc = nv50_display_mode_ctrl(dev, true, i);
+		if (!(mc & (1 << head)))
+			continue;
+
+		switch ((mc >> 8) & 0xf) {
+		case 0: type = OUTPUT_LVDS; break;
+		case 1: type = OUTPUT_TMDS; break;
+		case 2: type = OUTPUT_TMDS; break;
+		case 5: type = OUTPUT_TMDS; break;
+		case 8: type = OUTPUT_DP; break;
+		case 9: type = OUTPUT_DP; break;
+		default:
+			NV_ERROR(dev, "unknown sor mode_ctrl: 0x%08x\n", sor);
+			return -1;
+		}
+
+		or = i;
+	}
+
+	NV_DEBUG_KMS(dev, "type %d, or %d\n", type, or);
+	if (type == OUTPUT_ANY) {
+		NV_ERROR(dev, "unknown encoder!!\n");
+		return -1;
+	}
+
+	for (i = 0; i < dev_priv->vbios->dcb->entries; i++) {
+		struct dcb_entry *dcbent = &dev_priv->vbios->dcb->entry[i];
+
+		if (dcbent->type != type)
+			continue;
+
+		if (!(dcbent->or & (1 << or)))
+			continue;
+
+		*phead = head;
+		*pdcbent = dcbent;
+		return 0;
+	}
+
+	NV_ERROR(dev, "no DCB entry for %d %d\n", dac != 0, or);
+	return 0;
+}
+
+static uint32_t
+nv50_display_script_select(struct drm_device *dev, struct dcb_entry *dcbent,
+			   int pxclk)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_connector *nv_connector = NULL;
+	struct drm_encoder *encoder;
+	struct nvbios *bios = &dev_priv->VBIOS;
+	uint32_t mc, script = 0, or;
+
+	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
+		struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+
+		if (nv_encoder->dcb != dcbent)
+			continue;
+
+		nv_connector = nouveau_encoder_connector_get(nv_encoder);
+		break;
+	}
+
+	or = ffs(dcbent->or) - 1;
+	mc = nv50_display_mode_ctrl(dev, dcbent->type != OUTPUT_ANALOG, or);
+	switch (dcbent->type) {
+	case OUTPUT_LVDS:
+		script = (mc >> 8) & 0xf;
+		if (bios->pub.fp_no_ddc) {
+			if (bios->fp.dual_link)
+				script |= 0x0100;
+			if (bios->fp.if_is_24bit)
+				script |= 0x0200;
+		} else {
+			if (pxclk >= bios->fp.duallink_transition_clk) {
+				script |= 0x0100;
+				if (bios->fp.strapless_is_24bit & 2)
+					script |= 0x0200;
+			} else
+			if (bios->fp.strapless_is_24bit & 1)
+				script |= 0x0200;
+
+			if (nv_connector && nv_connector->edid &&
+			    (nv_connector->edid->revision >= 4) &&
+			    (nv_connector->edid->input & 0x70) >= 0x20)
+				script |= 0x0200;
+		}
+
+		if (nouveau_uscript_lvds >= 0) {
+			NV_INFO(dev, "override script 0x%04x with 0x%04x "
+				     "for output LVDS-%d\n", script,
+				     nouveau_uscript_lvds, or);
+			script = nouveau_uscript_lvds;
+		}
+		break;
+	case OUTPUT_TMDS:
+		script = (mc >> 8) & 0xf;
+		if (pxclk >= 165000)
+			script |= 0x0100;
+
+		if (nouveau_uscript_tmds >= 0) {
+			NV_INFO(dev, "override script 0x%04x with 0x%04x "
+				     "for output TMDS-%d\n", script,
+				     nouveau_uscript_tmds, or);
+			script = nouveau_uscript_tmds;
+		}
+		break;
+	case OUTPUT_DP:
+		script = (mc >> 8) & 0xf;
+		break;
+	case OUTPUT_ANALOG:
+		script = 0xff;
+		break;
+	default:
+		NV_ERROR(dev, "modeset on unsupported output type!\n");
+		break;
+	}
+
+	return script;
+}
+
+static void
+nv50_display_vblank_crtc_handler(struct drm_device *dev, int crtc)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_channel *chan;
+	struct list_head *entry, *tmp;
+
+	list_for_each_safe(entry, tmp, &dev_priv->vbl_waiting) {
+		chan = list_entry(entry, struct nouveau_channel, nvsw.vbl_wait);
+
+		nouveau_bo_wr32(chan->notifier_bo, chan->nvsw.vblsem_offset,
+						chan->nvsw.vblsem_rval);
+		list_del(&chan->nvsw.vbl_wait);
+	}
+}
+
+static void
+nv50_display_vblank_handler(struct drm_device *dev, uint32_t intr)
+{
+	intr &= NV50_PDISPLAY_INTR_1_VBLANK_CRTC;
+
+	if (intr & NV50_PDISPLAY_INTR_1_VBLANK_CRTC_0)
+		nv50_display_vblank_crtc_handler(dev, 0);
+
+	if (intr & NV50_PDISPLAY_INTR_1_VBLANK_CRTC_1)
+		nv50_display_vblank_crtc_handler(dev, 1);
+
+	nv_wr32(dev, NV50_PDISPLAY_INTR_EN, nv_rd32(dev,
+		     NV50_PDISPLAY_INTR_EN) & ~intr);
+	nv_wr32(dev, NV50_PDISPLAY_INTR_1, intr);
+}
+
+static void
+nv50_display_unk10_handler(struct drm_device *dev)
+{
+	struct dcb_entry *dcbent;
+	int head, ret;
+
+	ret = nv50_display_irq_head(dev, &head, &dcbent);
+	if (ret)
+		goto ack;
+
+	nv_wr32(dev, 0x619494, nv_rd32(dev, 0x619494) & ~8);
+
+	nouveau_bios_run_display_table(dev, dcbent, 0, -1);
+
+ack:
+	nv_wr32(dev, NV50_PDISPLAY_INTR_1, NV50_PDISPLAY_INTR_1_CLK_UNK10);
+	nv_wr32(dev, 0x610030, 0x80000000);
+}
+
+static void
+nv50_display_unk20_handler(struct drm_device *dev)
+{
+	struct dcb_entry *dcbent;
+	uint32_t tmp, pclk, script;
+	int head, or, ret;
+
+	ret = nv50_display_irq_head(dev, &head, &dcbent);
+	if (ret)
+		goto ack;
+	or = ffs(dcbent->or) - 1;
+	pclk = nv_rd32(dev, NV50_PDISPLAY_CRTC_P(head, CLOCK)) & 0x3fffff;
+	script = nv50_display_script_select(dev, dcbent, pclk);
+
+	NV_DEBUG_KMS(dev, "head %d pxclk: %dKHz\n", head, pclk);
+
+	if (dcbent->type != OUTPUT_DP)
+		nouveau_bios_run_display_table(dev, dcbent, 0, -2);
+
+	nv50_crtc_set_clock(dev, head, pclk);
+
+	nouveau_bios_run_display_table(dev, dcbent, script, pclk);
+
+	tmp = nv_rd32(dev, NV50_PDISPLAY_CRTC_CLK_CTRL2(head));
+	tmp &= ~0x000000f;
+	nv_wr32(dev, NV50_PDISPLAY_CRTC_CLK_CTRL2(head), tmp);
+
+	if (dcbent->type != OUTPUT_ANALOG) {
+		tmp = nv_rd32(dev, NV50_PDISPLAY_SOR_CLK_CTRL2(or));
+		tmp &= ~0x00000f0f;
+		if (script & 0x0100)
+			tmp |= 0x00000101;
+		nv_wr32(dev, NV50_PDISPLAY_SOR_CLK_CTRL2(or), tmp);
+	} else {
+		nv_wr32(dev, NV50_PDISPLAY_DAC_CLK_CTRL2(or), 0);
+	}
+
+ack:
+	nv_wr32(dev, NV50_PDISPLAY_INTR_1, NV50_PDISPLAY_INTR_1_CLK_UNK20);
+	nv_wr32(dev, 0x610030, 0x80000000);
+}
+
+static void
+nv50_display_unk40_handler(struct drm_device *dev)
+{
+	struct dcb_entry *dcbent;
+	int head, pclk, script, ret;
+
+	ret = nv50_display_irq_head(dev, &head, &dcbent);
+	if (ret)
+		goto ack;
+	pclk = nv_rd32(dev, NV50_PDISPLAY_CRTC_P(head, CLOCK)) & 0x3fffff;
+	script = nv50_display_script_select(dev, dcbent, pclk);
+
+	nouveau_bios_run_display_table(dev, dcbent, script, -pclk);
+
+ack:
+	nv_wr32(dev, NV50_PDISPLAY_INTR_1, NV50_PDISPLAY_INTR_1_CLK_UNK40);
+	nv_wr32(dev, 0x610030, 0x80000000);
+	nv_wr32(dev, 0x619494, nv_rd32(dev, 0x619494) | 8);
+}
+
+void
+nv50_display_irq_handler_bh(struct work_struct *work)
+{
+	struct drm_nouveau_private *dev_priv =
+		container_of(work, struct drm_nouveau_private, irq_work);
+	struct drm_device *dev = dev_priv->dev;
+
+	for (;;) {
+		uint32_t intr0 = nv_rd32(dev, NV50_PDISPLAY_INTR_0);
+		uint32_t intr1 = nv_rd32(dev, NV50_PDISPLAY_INTR_1);
+
+		NV_DEBUG_KMS(dev, "PDISPLAY_INTR_BH 0x%08x 0x%08x\n", intr0, intr1);
+
+		if (intr1 & NV50_PDISPLAY_INTR_1_CLK_UNK10)
+			nv50_display_unk10_handler(dev);
+		else
+		if (intr1 & NV50_PDISPLAY_INTR_1_CLK_UNK20)
+			nv50_display_unk20_handler(dev);
+		else
+		if (intr1 & NV50_PDISPLAY_INTR_1_CLK_UNK40)
+			nv50_display_unk40_handler(dev);
+		else
+			break;
+	}
+
+	nv_wr32(dev, NV03_PMC_INTR_EN_0, 1);
+}
+
+static void
+nv50_display_error_handler(struct drm_device *dev)
+{
+	uint32_t addr, data;
+
+	nv_wr32(dev, NV50_PDISPLAY_INTR_0, 0x00010000);
+	addr = nv_rd32(dev, NV50_PDISPLAY_TRAPPED_ADDR);
+	data = nv_rd32(dev, NV50_PDISPLAY_TRAPPED_DATA);
+
+	NV_ERROR(dev, "EvoCh %d Mthd 0x%04x Data 0x%08x (0x%04x 0x%02x)\n",
+		 0, addr & 0xffc, data, addr >> 16, (addr >> 12) & 0xf);
+
+	nv_wr32(dev, NV50_PDISPLAY_TRAPPED_ADDR, 0x90000000);
+}
+
+static void
+nv50_display_irq_hotplug(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct drm_connector *connector;
+	const uint32_t gpio_reg[4] = { 0xe104, 0xe108, 0xe280, 0xe284 };
+	uint32_t unplug_mask, plug_mask, change_mask;
+	uint32_t hpd0, hpd1 = 0;
+
+	hpd0 = nv_rd32(dev, 0xe054) & nv_rd32(dev, 0xe050);
+	if (dev_priv->chipset >= 0x90)
+		hpd1 = nv_rd32(dev, 0xe074) & nv_rd32(dev, 0xe070);
+
+	plug_mask   = (hpd0 & 0x0000ffff) | (hpd1 << 16);
+	unplug_mask = (hpd0 >> 16) | (hpd1 & 0xffff0000);
+	change_mask = plug_mask | unplug_mask;
+
+	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
+		struct drm_encoder_helper_funcs *helper;
+		struct nouveau_connector *nv_connector =
+			nouveau_connector(connector);
+		struct nouveau_encoder *nv_encoder;
+		struct dcb_gpio_entry *gpio;
+		uint32_t reg;
+		bool plugged;
+
+		if (!nv_connector->dcb)
+			continue;
+
+		gpio = nouveau_bios_gpio_entry(dev, nv_connector->dcb->gpio_tag);
+		if (!gpio || !(change_mask & (1 << gpio->line)))
+			continue;
+
+		reg = nv_rd32(dev, gpio_reg[gpio->line >> 3]);
+		plugged = !!(reg & (4 << ((gpio->line & 7) << 2)));
+		NV_INFO(dev, "%splugged %s\n", plugged ? "" : "un",
+			drm_get_connector_name(connector)) ;
+
+		if (!connector->encoder || !connector->encoder->crtc ||
+		    !connector->encoder->crtc->enabled)
+			continue;
+		nv_encoder = nouveau_encoder(connector->encoder);
+		helper = connector->encoder->helper_private;
+
+		if (nv_encoder->dcb->type != OUTPUT_DP)
+			continue;
+
+		if (plugged)
+			helper->dpms(connector->encoder, DRM_MODE_DPMS_ON);
+		else
+			helper->dpms(connector->encoder, DRM_MODE_DPMS_OFF);
+	}
+
+	nv_wr32(dev, 0xe054, nv_rd32(dev, 0xe054));
+	if (dev_priv->chipset >= 0x90)
+		nv_wr32(dev, 0xe074, nv_rd32(dev, 0xe074));
+}
+
+void
+nv50_display_irq_handler(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	uint32_t delayed = 0;
+
+	while (nv_rd32(dev, NV50_PMC_INTR_0) & NV50_PMC_INTR_0_HOTPLUG)
+		nv50_display_irq_hotplug(dev);
+
+	while (nv_rd32(dev, NV50_PMC_INTR_0) & NV50_PMC_INTR_0_DISPLAY) {
+		uint32_t intr0 = nv_rd32(dev, NV50_PDISPLAY_INTR_0);
+		uint32_t intr1 = nv_rd32(dev, NV50_PDISPLAY_INTR_1);
+		uint32_t clock;
+
+		NV_DEBUG_KMS(dev, "PDISPLAY_INTR 0x%08x 0x%08x\n", intr0, intr1);
+
+		if (!intr0 && !(intr1 & ~delayed))
+			break;
+
+		if (intr0 & 0x00010000) {
+			nv50_display_error_handler(dev);
+			intr0 &= ~0x00010000;
+		}
+
+		if (intr1 & NV50_PDISPLAY_INTR_1_VBLANK_CRTC) {
+			nv50_display_vblank_handler(dev, intr1);
+			intr1 &= ~NV50_PDISPLAY_INTR_1_VBLANK_CRTC;
+		}
+
+		clock = (intr1 & (NV50_PDISPLAY_INTR_1_CLK_UNK10 |
+				  NV50_PDISPLAY_INTR_1_CLK_UNK20 |
+				  NV50_PDISPLAY_INTR_1_CLK_UNK40));
+		if (clock) {
+			nv_wr32(dev, NV03_PMC_INTR_EN_0, 0);
+			if (!work_pending(&dev_priv->irq_work))
+				queue_work(dev_priv->wq, &dev_priv->irq_work);
+			delayed |= clock;
+			intr1 &= ~clock;
+		}
+
+		if (intr0) {
+			NV_ERROR(dev, "unknown PDISPLAY_INTR_0: 0x%08x\n", intr0);
+			nv_wr32(dev, NV50_PDISPLAY_INTR_0, intr0);
+		}
+
+		if (intr1) {
+			NV_ERROR(dev,
+				 "unknown PDISPLAY_INTR_1: 0x%08x\n", intr1);
+			nv_wr32(dev, NV50_PDISPLAY_INTR_1, intr1);
+		}
+	}
+}
+
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv10_fb.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv10_fb.c
@@ -0,0 +1,44 @@
+#include "drmP.h"
+#include "drm.h"
+#include "nouveau_drv.h"
+#include "nouveau_drm.h"
+
+void
+nv10_fb_set_region_tiling(struct drm_device *dev, int i, uint32_t addr,
+			  uint32_t size, uint32_t pitch)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	uint32_t limit = max(1u, addr + size) - 1;
+
+	if (pitch) {
+		if (dev_priv->card_type >= NV_20)
+			addr |= 1;
+		else
+			addr |= 1 << 31;
+	}
+
+	nv_wr32(dev, NV10_PFB_TLIMIT(i), limit);
+	nv_wr32(dev, NV10_PFB_TSIZE(i), pitch);
+	nv_wr32(dev, NV10_PFB_TILE(i), addr);
+}
+
+int
+nv10_fb_init(struct drm_device *dev)
+{
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_fb_engine *pfb = &dev_priv->engine.fb;
+	int i;
+
+	pfb->num_tiles = NV10_PFB_TILE__SIZE;
+
+	/* Turn all the tiling regions off. */
+	for (i = 0; i < pfb->num_tiles; i++)
+		pfb->set_region_tiling(dev, i, 0, 0, 0);
+
+	return 0;
+}
+
+void
+nv10_fb_takedown(struct drm_device *dev)
+{
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv17_tv.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv17_tv.h
@@ -0,0 +1,156 @@
+/*
+ * Copyright (C) 2009 Francisco Jerez.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#ifndef __NV17_TV_H__
+#define __NV17_TV_H__
+
+struct nv17_tv_state {
+	uint8_t tv_enc[0x40];
+
+	uint32_t hfilter[4][7];
+	uint32_t hfilter2[4][7];
+	uint32_t vfilter[4][7];
+
+	uint32_t ptv_200;
+	uint32_t ptv_204;
+	uint32_t ptv_208;
+	uint32_t ptv_20c;
+	uint32_t ptv_304;
+	uint32_t ptv_500;
+	uint32_t ptv_504;
+	uint32_t ptv_508;
+	uint32_t ptv_600;
+	uint32_t ptv_604;
+	uint32_t ptv_608;
+	uint32_t ptv_60c;
+	uint32_t ptv_610;
+	uint32_t ptv_614;
+};
+
+enum nv17_tv_norm{
+	TV_NORM_PAL,
+	TV_NORM_PAL_M,
+	TV_NORM_PAL_N,
+	TV_NORM_PAL_NC,
+	TV_NORM_NTSC_M,
+	TV_NORM_NTSC_J,
+	NUM_LD_TV_NORMS,
+	TV_NORM_HD480I = NUM_LD_TV_NORMS,
+	TV_NORM_HD480P,
+	TV_NORM_HD576I,
+	TV_NORM_HD576P,
+	TV_NORM_HD720P,
+	TV_NORM_HD1080I,
+	NUM_TV_NORMS
+};
+
+struct nv17_tv_encoder {
+	struct nouveau_encoder base;
+
+	struct nv17_tv_state state;
+	struct nv17_tv_state saved_state;
+
+	int overscan;
+	int flicker;
+	int saturation;
+	int hue;
+	enum nv17_tv_norm tv_norm;
+	int subconnector;
+	int select_subconnector;
+	uint32_t pin_mask;
+};
+#define to_tv_enc(x) container_of(nouveau_encoder(x),		\
+				  struct nv17_tv_encoder, base)
+
+extern char *nv17_tv_norm_names[NUM_TV_NORMS];
+
+extern struct nv17_tv_norm_params {
+	enum {
+		TV_ENC_MODE,
+		CTV_ENC_MODE,
+	} kind;
+
+	union {
+		struct {
+			int hdisplay;
+			int vdisplay;
+			int vrefresh; /* mHz */
+
+			uint8_t tv_enc[0x40];
+		} tv_enc_mode;
+
+		struct {
+			struct drm_display_mode mode;
+
+			uint32_t ctv_regs[38];
+		} ctv_enc_mode;
+	};
+
+} nv17_tv_norms[NUM_TV_NORMS];
+#define get_tv_norm(enc) (&nv17_tv_norms[to_tv_enc(enc)->tv_norm])
+
+extern struct drm_display_mode nv17_tv_modes[];
+
+static inline int interpolate(int y0, int y1, int y2, int x)
+{
+	return y1 + (x < 50 ? y1 - y0 : y2 - y1) * (x - 50) / 50;
+}
+
+void nv17_tv_state_save(struct drm_device *dev, struct nv17_tv_state *state);
+void nv17_tv_state_load(struct drm_device *dev, struct nv17_tv_state *state);
+void nv17_tv_update_properties(struct drm_encoder *encoder);
+void nv17_tv_update_rescaler(struct drm_encoder *encoder);
+void nv17_ctv_update_rescaler(struct drm_encoder *encoder);
+
+/* TV hardware access functions */
+
+static inline void nv_write_ptv(struct drm_device *dev, uint32_t reg, uint32_t val)
+{
+	nv_wr32(dev, reg, val);
+}
+
+static inline uint32_t nv_read_ptv(struct drm_device *dev, uint32_t reg)
+{
+	return nv_rd32(dev, reg);
+}
+
+static inline void nv_write_tv_enc(struct drm_device *dev, uint8_t reg, uint8_t val)
+{
+	nv_write_ptv(dev, NV_PTV_TV_INDEX, reg);
+	nv_write_ptv(dev, NV_PTV_TV_DATA, val);
+}
+
+static inline uint8_t nv_read_tv_enc(struct drm_device *dev, uint8_t reg)
+{
+	nv_write_ptv(dev, NV_PTV_TV_INDEX, reg);
+	return nv_read_ptv(dev, NV_PTV_TV_DATA);
+}
+
+#define nv_load_ptv(dev, state, reg) nv_write_ptv(dev, NV_PTV_OFFSET + 0x##reg, state->ptv_##reg)
+#define nv_save_ptv(dev, state, reg) state->ptv_##reg = nv_read_ptv(dev, NV_PTV_OFFSET + 0x##reg)
+#define nv_load_tv_enc(dev, state, reg) nv_write_tv_enc(dev, 0x##reg, state->tv_enc[0x##reg])
+
+#endif
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/nouveau/nv17_tv.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/nouveau/nv17_tv.c
@@ -0,0 +1,778 @@
+/*
+ * Copyright (C) 2009 Francisco Jerez.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include "drmP.h"
+#include "drm_crtc_helper.h"
+#include "nouveau_drv.h"
+#include "nouveau_encoder.h"
+#include "nouveau_connector.h"
+#include "nouveau_crtc.h"
+#include "nouveau_hw.h"
+#include "nv17_tv.h"
+
+static uint32_t nv42_tv_sample_load(struct drm_encoder *encoder)
+{
+	struct drm_device *dev = encoder->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	uint32_t testval, regoffset = nv04_dac_output_offset(encoder);
+	uint32_t gpio0, gpio1, fp_htotal, fp_hsync_start, fp_hsync_end,
+		fp_control, test_ctrl, dacclk, ctv_14, ctv_1c, ctv_6c;
+	uint32_t sample = 0;
+	int head;
+
+#define RGB_TEST_DATA(r, g, b) (r << 0 | g << 10 | b << 20)
+	testval = RGB_TEST_DATA(0x82, 0xeb, 0x82);
+	if (dev_priv->vbios->tvdactestval)
+		testval = dev_priv->vbios->tvdactestval;
+
+	dacclk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset);
+	head = (dacclk & 0x100) >> 8;
+
+	/* Save the previous state. */
+	gpio1 = nv17_gpio_get(dev, DCB_GPIO_TVDAC1);
+	gpio0 = nv17_gpio_get(dev, DCB_GPIO_TVDAC0);
+	fp_htotal = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL);
+	fp_hsync_start = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START);
+	fp_hsync_end = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_END);
+	fp_control = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL);
+	test_ctrl = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset);
+	ctv_1c = NVReadRAMDAC(dev, head, 0x680c1c);
+	ctv_14 = NVReadRAMDAC(dev, head, 0x680c14);
+	ctv_6c = NVReadRAMDAC(dev, head, 0x680c6c);
+
+	/* Prepare the DAC for load detection.  */
+	nv17_gpio_set(dev, DCB_GPIO_TVDAC1, true);
+	nv17_gpio_set(dev, DCB_GPIO_TVDAC0, true);
+
+	NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL, 1343);
+	NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START, 1047);
+	NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_END, 1183);
+	NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL,
+		      NV_PRAMDAC_FP_TG_CONTROL_DISPEN_POS |
+		      NV_PRAMDAC_FP_TG_CONTROL_WIDTH_12 |
+		      NV_PRAMDAC_FP_TG_CONTROL_READ_PROG |
+		      NV_PRAMDAC_FP_TG_CONTROL_HSYNC_POS |
+		      NV_PRAMDAC_FP_TG_CONTROL_VSYNC_POS);
+
+	NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset, 0);
+
+	NVWriteRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset,
+		      (dacclk & ~0xff) | 0x22);
+	msleep(1);
+	NVWriteRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset,
+		      (dacclk & ~0xff) | 0x21);
+
+	NVWriteRAMDAC(dev, head, 0x680c1c, 1 << 20);
+	NVWriteRAMDAC(dev, head, 0x680c14, 4 << 16);
+
+	/* Sample pin 0x4 (usually S-video luma). */
+	NVWriteRAMDAC(dev, head, 0x680c6c, testval >> 10 & 0x3ff);
+	msleep(20);
+	sample |= NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset)
+		& 0x4 << 28;
+
+	/* Sample the remaining pins. */
+	NVWriteRAMDAC(dev, head, 0x680c6c, testval & 0x3ff);
+	msleep(20);
+	sample |= NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset)
+		& 0xa << 28;
+
+	/* Restore the previous state. */
+	NVWriteRAMDAC(dev, head, 0x680c1c, ctv_1c);
+	NVWriteRAMDAC(dev, head, 0x680c14, ctv_14);
+	NVWriteRAMDAC(dev, head, 0x680c6c, ctv_6c);
+	NVWriteRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset, dacclk);
+	NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset, test_ctrl);
+	NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL, fp_control);
+	NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_END, fp_hsync_end);
+	NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START, fp_hsync_start);
+	NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL, fp_htotal);
+	nv17_gpio_set(dev, DCB_GPIO_TVDAC1, gpio1);
+	nv17_gpio_set(dev, DCB_GPIO_TVDAC0, gpio0);
+
+	return sample;
+}
+
+static enum drm_connector_status
+nv17_tv_detect(struct drm_encoder *encoder, struct drm_connector *connector)
+{
+	struct drm_device *dev = encoder->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct drm_mode_config *conf = &dev->mode_config;
+	struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder);
+	struct dcb_entry *dcb = tv_enc->base.dcb;
+
+	if (dev_priv->chipset == 0x42 ||
+	    dev_priv->chipset == 0x43)
+		tv_enc->pin_mask = nv42_tv_sample_load(encoder) >> 28 & 0xe;
+	else
+		tv_enc->pin_mask = nv17_dac_sample_load(encoder) >> 28 & 0xe;
+
+	switch (tv_enc->pin_mask) {
+	case 0x2:
+	case 0x4:
+		tv_enc->subconnector = DRM_MODE_SUBCONNECTOR_Composite;
+		break;
+	case 0xc:
+		tv_enc->subconnector = DRM_MODE_SUBCONNECTOR_SVIDEO;
+		break;
+	case 0xe:
+		if (dcb->tvconf.has_component_output)
+			tv_enc->subconnector = DRM_MODE_SUBCONNECTOR_Component;
+		else
+			tv_enc->subconnector = DRM_MODE_SUBCONNECTOR_SCART;
+		break;
+	default:
+		tv_enc->subconnector = DRM_MODE_SUBCONNECTOR_Unknown;
+		break;
+	}
+
+	drm_connector_property_set_value(connector,
+					 conf->tv_subconnector_property,
+					 tv_enc->subconnector);
+
+	if (tv_enc->subconnector) {
+		NV_INFO(dev, "Load detected on output %c\n",
+			'@' + ffs(dcb->or));
+		return connector_status_connected;
+	} else {
+		return connector_status_disconnected;
+	}
+}
+
+static const struct {
+	int hdisplay;
+	int vdisplay;
+} modes[] = {
+	{ 640, 400 },
+	{ 640, 480 },
+	{ 720, 480 },
+	{ 720, 576 },
+	{ 800, 600 },
+	{ 1024, 768 },
+	{ 1280, 720 },
+	{ 1280, 1024 },
+	{ 1920, 1080 }
+};
+
+static int nv17_tv_get_modes(struct drm_encoder *encoder,
+			     struct drm_connector *connector)
+{
+	struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder);
+	struct drm_display_mode *mode;
+	struct drm_display_mode *output_mode;
+	int n = 0;
+	int i;
+
+	if (tv_norm->kind != CTV_ENC_MODE) {
+		struct drm_display_mode *tv_mode;
+
+		for (tv_mode = nv17_tv_modes; tv_mode->hdisplay; tv_mode++) {
+			mode = drm_mode_duplicate(encoder->dev, tv_mode);
+
+			mode->clock = tv_norm->tv_enc_mode.vrefresh *
+						mode->htotal / 1000 *
+						mode->vtotal / 1000;
+
+			if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
+				mode->clock *= 2;
+
+			if (mode->hdisplay == tv_norm->tv_enc_mode.hdisplay &&
+			    mode->vdisplay == tv_norm->tv_enc_mode.vdisplay)
+				mode->type |= DRM_MODE_TYPE_PREFERRED;
+
+			drm_mode_probed_add(connector, mode);
+			n++;
+		}
+		return n;
+	}
+
+	/* tv_norm->kind == CTV_ENC_MODE */
+	output_mode = &tv_norm->ctv_enc_mode.mode;
+	for (i = 0; i < ARRAY_SIZE(modes); i++) {
+		if (modes[i].hdisplay > output_mode->hdisplay ||
+		    modes[i].vdisplay > output_mode->vdisplay)
+			continue;
+
+		if (modes[i].hdisplay == output_mode->hdisplay &&
+		    modes[i].vdisplay == output_mode->vdisplay) {
+			mode = drm_mode_duplicate(encoder->dev, output_mode);
+			mode->type |= DRM_MODE_TYPE_PREFERRED;
+		} else {
+			mode = drm_cvt_mode(encoder->dev, modes[i].hdisplay,
+				modes[i].vdisplay, 60, false,
+				output_mode->flags & DRM_MODE_FLAG_INTERLACE,
+				false);
+		}
+
+		/* CVT modes are sometimes unsuitable... */
+		if (output_mode->hdisplay <= 720
+		    || output_mode->hdisplay >= 1920) {
+			mode->htotal = output_mode->htotal;
+			mode->hsync_start = (mode->hdisplay + (mode->htotal
+					     - mode->hdisplay) * 9 / 10) & ~7;
+			mode->hsync_end = mode->hsync_start + 8;
+		}
+		if (output_mode->vdisplay >= 1024) {
+			mode->vtotal = output_mode->vtotal;
+			mode->vsync_start = output_mode->vsync_start;
+			mode->vsync_end = output_mode->vsync_end;
+		}
+
+		mode->type |= DRM_MODE_TYPE_DRIVER;
+		drm_mode_probed_add(connector, mode);
+		n++;
+	}
+	return n;
+}
+
+static int nv17_tv_mode_valid(struct drm_encoder *encoder,
+			      struct drm_display_mode *mode)
+{
+	struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder);
+
+	if (tv_norm->kind == CTV_ENC_MODE) {
+		struct drm_display_mode *output_mode =
+						&tv_norm->ctv_enc_mode.mode;
+
+		if (mode->clock > 400000)
+			return MODE_CLOCK_HIGH;
+
+		if (mode->hdisplay > output_mode->hdisplay ||
+		    mode->vdisplay > output_mode->vdisplay)
+			return MODE_BAD;
+
+		if ((mode->flags & DRM_MODE_FLAG_INTERLACE) !=
+		    (output_mode->flags & DRM_MODE_FLAG_INTERLACE))
+			return MODE_NO_INTERLACE;
+
+		if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
+			return MODE_NO_DBLESCAN;
+
+	} else {
+		const int vsync_tolerance = 600;
+
+		if (mode->clock > 70000)
+			return MODE_CLOCK_HIGH;
+
+		if (abs(drm_mode_vrefresh(mode) * 1000 -
+			tv_norm->tv_enc_mode.vrefresh) > vsync_tolerance)
+			return MODE_VSYNC;
+
+		/* The encoder takes care of the actual interlacing */
+		if (mode->flags & DRM_MODE_FLAG_INTERLACE)
+			return MODE_NO_INTERLACE;
+	}
+
+	return MODE_OK;
+}
+
+static bool nv17_tv_mode_fixup(struct drm_encoder *encoder,
+			       struct drm_display_mode *mode,
+			       struct drm_display_mode *adjusted_mode)
+{
+	struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder);
+
+	if (tv_norm->kind == CTV_ENC_MODE)
+		adjusted_mode->clock = tv_norm->ctv_enc_mode.mode.clock;
+	else
+		adjusted_mode->clock = 90000;
+
+	return true;
+}
+
+static void  nv17_tv_dpms(struct drm_encoder *encoder, int mode)
+{
+	struct drm_device *dev = encoder->dev;
+	struct nv17_tv_state *regs = &to_tv_enc(encoder)->state;
+	struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder);
+
+	if (nouveau_encoder(encoder)->last_dpms == mode)
+		return;
+	nouveau_encoder(encoder)->last_dpms = mode;
+
+	NV_INFO(dev, "Setting dpms mode %d on TV encoder (output %d)\n",
+		 mode, nouveau_encoder(encoder)->dcb->index);
+
+	regs->ptv_200 &= ~1;
+
+	if (tv_norm->kind == CTV_ENC_MODE) {
+		nv04_dfp_update_fp_control(encoder, mode);
+
+	} else {
+		nv04_dfp_update_fp_control(encoder, DRM_MODE_DPMS_OFF);
+
+		if (mode == DRM_MODE_DPMS_ON)
+			regs->ptv_200 |= 1;
+	}
+
+	nv_load_ptv(dev, regs, 200);
+
+	nv17_gpio_set(dev, DCB_GPIO_TVDAC1, mode == DRM_MODE_DPMS_ON);
+	nv17_gpio_set(dev, DCB_GPIO_TVDAC0, mode == DRM_MODE_DPMS_ON);
+
+	nv04_dac_update_dacclk(encoder, mode == DRM_MODE_DPMS_ON);
+}
+
+static void nv17_tv_prepare(struct drm_encoder *encoder)
+{
+	struct drm_device *dev = encoder->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct drm_encoder_helper_funcs *helper = encoder->helper_private;
+	struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder);
+	int head = nouveau_crtc(encoder->crtc)->index;
+	uint8_t *cr_lcd = &dev_priv->mode_reg.crtc_reg[head].CRTC[
+							NV_CIO_CRE_LCD__INDEX];
+	uint32_t dacclk_off = NV_PRAMDAC_DACCLK +
+					nv04_dac_output_offset(encoder);
+	uint32_t dacclk;
+
+	helper->dpms(encoder, DRM_MODE_DPMS_OFF);
+
+	nv04_dfp_disable(dev, head);
+
+	/* Unbind any FP encoders from this head if we need the FP
+	 * stuff enabled. */
+	if (tv_norm->kind == CTV_ENC_MODE) {
+		struct drm_encoder *enc;
+
+		list_for_each_entry(enc, &dev->mode_config.encoder_list, head) {
+			struct dcb_entry *dcb = nouveau_encoder(enc)->dcb;
+
+			if ((dcb->type == OUTPUT_TMDS ||
+			     dcb->type == OUTPUT_LVDS) &&
+			     !enc->crtc &&
+			     nv04_dfp_get_bound_head(dev, dcb) == head) {
+				nv04_dfp_bind_head(dev, dcb, head ^ 1,
+						dev_priv->VBIOS.fp.dual_link);
+			}
+		}
+
+	}
+
+	/* Some NV4x have unknown values (0x3f, 0x50, 0x54, 0x6b, 0x79, 0x7f)
+	 * at LCD__INDEX which we don't alter
+	 */
+	if (!(*cr_lcd & 0x44)) {
+		if (tv_norm->kind == CTV_ENC_MODE)
+			*cr_lcd = 0x1 | (head ? 0x0 : 0x8);
+		else
+			*cr_lcd = 0;
+	}
+
+	/* Set the DACCLK register */
+	dacclk = (NVReadRAMDAC(dev, 0, dacclk_off) & ~0x30) | 0x1;
+
+	if (dev_priv->card_type == NV_40)
+		dacclk |= 0x1a << 16;
+
+	if (tv_norm->kind == CTV_ENC_MODE) {
+		dacclk |=  0x20;
+
+		if (head)
+			dacclk |= 0x100;
+		else
+			dacclk &= ~0x100;
+
+	} else {
+		dacclk |= 0x10;
+
+	}
+
+	NVWriteRAMDAC(dev, 0, dacclk_off, dacclk);
+}
+
+static void nv17_tv_mode_set(struct drm_encoder *encoder,
+			     struct drm_display_mode *drm_mode,
+			     struct drm_display_mode *adjusted_mode)
+{
+	struct drm_device *dev = encoder->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	int head = nouveau_crtc(encoder->crtc)->index;
+	struct nv04_crtc_reg *regs = &dev_priv->mode_reg.crtc_reg[head];
+	struct nv17_tv_state *tv_regs = &to_tv_enc(encoder)->state;
+	struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder);
+	int i;
+
+	regs->CRTC[NV_CIO_CRE_53] = 0x40; /* FP_HTIMING */
+	regs->CRTC[NV_CIO_CRE_54] = 0; /* FP_VTIMING */
+	regs->ramdac_630 = 0x2; /* turn off green mode (tv test pattern?) */
+	regs->tv_setup = 1;
+	regs->ramdac_8c0 = 0x0;
+
+	if (tv_norm->kind == TV_ENC_MODE) {
+		tv_regs->ptv_200 = 0x13111100;
+		if (head)
+			tv_regs->ptv_200 |= 0x10;
+
+		tv_regs->ptv_20c = 0x808010;
+		tv_regs->ptv_304 = 0x2d00000;
+		tv_regs->ptv_600 = 0x0;
+		tv_regs->ptv_60c = 0x0;
+		tv_regs->ptv_610 = 0x1e00000;
+
+		if (tv_norm->tv_enc_mode.vdisplay == 576) {
+			tv_regs->ptv_508 = 0x1200000;
+			tv_regs->ptv_614 = 0x33;
+
+		} else if (tv_norm->tv_enc_mode.vdisplay == 480) {
+			tv_regs->ptv_508 = 0xf00000;
+			tv_regs->ptv_614 = 0x13;
+		}
+
+		if (dev_priv->card_type >= NV_30) {
+			tv_regs->ptv_500 = 0xe8e0;
+			tv_regs->ptv_504 = 0x1710;
+			tv_regs->ptv_604 = 0x0;
+			tv_regs->ptv_608 = 0x0;
+		} else {
+			if (tv_norm->tv_enc_mode.vdisplay == 576) {
+				tv_regs->ptv_604 = 0x20;
+				tv_regs->ptv_608 = 0x10;
+				tv_regs->ptv_500 = 0x19710;
+				tv_regs->ptv_504 = 0x68f0;
+
+			} else if (tv_norm->tv_enc_mode.vdisplay == 480) {
+				tv_regs->ptv_604 = 0x10;
+				tv_regs->ptv_608 = 0x20;
+				tv_regs->ptv_500 = 0x4b90;
+				tv_regs->ptv_504 = 0x1b480;
+			}
+		}
+
+		for (i = 0; i < 0x40; i++)
+			tv_regs->tv_enc[i] = tv_norm->tv_enc_mode.tv_enc[i];
+
+	} else {
+		struct drm_display_mode *output_mode =
+						&tv_norm->ctv_enc_mode.mode;
+
+		/* The registers in PRAMDAC+0xc00 control some timings and CSC
+		 * parameters for the CTV encoder (It's only used for "HD" TV
+		 * modes, I don't think I have enough working to guess what
+		 * they exactly mean...), it's probably connected at the
+		 * output of the FP encoder, but it also needs the analog
+		 * encoder in its OR enabled and routed to the head it's
+		 * using. It's enabled with the DACCLK register, bits [5:4].
+		 */
+		for (i = 0; i < 38; i++)
+			regs->ctv_regs[i] = tv_norm->ctv_enc_mode.ctv_regs[i];
+
+		regs->fp_horiz_regs[FP_DISPLAY_END] = output_mode->hdisplay - 1;
+		regs->fp_horiz_regs[FP_TOTAL] = output_mode->htotal - 1;
+		regs->fp_horiz_regs[FP_SYNC_START] =
+						output_mode->hsync_start - 1;
+		regs->fp_horiz_regs[FP_SYNC_END] = output_mode->hsync_end - 1;
+		regs->fp_horiz_regs[FP_CRTC] = output_mode->hdisplay +
+			max((output_mode->hdisplay-600)/40 - 1, 1);
+
+		regs->fp_vert_regs[FP_DISPLAY_END] = output_mode->vdisplay - 1;
+		regs->fp_vert_regs[FP_TOTAL] = output_mode->vtotal - 1;
+		regs->fp_vert_regs[FP_SYNC_START] =
+						output_mode->vsync_start - 1;
+		regs->fp_vert_regs[FP_SYNC_END] = output_mode->vsync_end - 1;
+		regs->fp_vert_regs[FP_CRTC] = output_mode->vdisplay - 1;
+
+		regs->fp_control = NV_PRAMDAC_FP_TG_CONTROL_DISPEN_POS |
+			NV_PRAMDAC_FP_TG_CONTROL_READ_PROG |
+			NV_PRAMDAC_FP_TG_CONTROL_WIDTH_12;
+
+		if (output_mode->flags & DRM_MODE_FLAG_PVSYNC)
+			regs->fp_control |= NV_PRAMDAC_FP_TG_CONTROL_VSYNC_POS;
+		if (output_mode->flags & DRM_MODE_FLAG_PHSYNC)
+			regs->fp_control |= NV_PRAMDAC_FP_TG_CONTROL_HSYNC_POS;
+
+		regs->fp_debug_0 = NV_PRAMDAC_FP_DEBUG_0_YWEIGHT_ROUND |
+			NV_PRAMDAC_FP_DEBUG_0_XWEIGHT_ROUND |
+			NV_PRAMDAC_FP_DEBUG_0_YINTERP_BILINEAR |
+			NV_PRAMDAC_FP_DEBUG_0_XINTERP_BILINEAR |
+			NV_RAMDAC_FP_DEBUG_0_TMDS_ENABLED |
+			NV_PRAMDAC_FP_DEBUG_0_YSCALE_ENABLE |
+			NV_PRAMDAC_FP_DEBUG_0_XSCALE_ENABLE;
+
+		regs->fp_debug_2 = 0;
+
+		regs->fp_margin_color = 0x801080;
+
+	}
+}
+
+static void nv17_tv_commit(struct drm_encoder *encoder)
+{
+	struct drm_device *dev = encoder->dev;
+	struct drm_nouveau_private *dev_priv = dev->dev_private;
+	struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
+	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+	struct drm_encoder_helper_funcs *helper = encoder->helper_private;
+
+	if (get_tv_norm(encoder)->kind == TV_ENC_MODE) {
+		nv17_tv_update_rescaler(encoder);
+		nv17_tv_update_properties(encoder);
+	} else {
+		nv17_ctv_update_rescaler(encoder);
+	}
+
+	nv17_tv_state_load(dev, &to_tv_enc(encoder)->state);
+
+	/* This could use refinement for flatpanels, but it should work */
+	if (dev_priv->chipset < 0x44)
+		NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL +
+					nv04_dac_output_offset(encoder),
+					0xf0000000);
+	else
+		NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL +
+					nv04_dac_output_offset(encoder),
+					0x00100000);
+
+	helper->dpms(encoder, DRM_MODE_DPMS_ON);
+
+	NV_INFO(dev, "Output %s is running on CRTC %d using output %c\n",
+		drm_get_connector_name(
+			&nouveau_encoder_connector_get(nv_encoder)->base),
+		nv_crtc->index, '@' + ffs(nv_encoder->dcb->or));
+}
+
+static void nv17_tv_save(struct drm_encoder *encoder)
+{
+	struct drm_device *dev = encoder->dev;
+	struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder);
+
+	nouveau_encoder(encoder)->restore.output =
+					NVReadRAMDAC(dev, 0,
+					NV_PRAMDAC_DACCLK +
+					nv04_dac_output_offset(encoder));
+
+	nv17_tv_state_save(dev, &tv_enc->saved_state);
+
+	tv_enc->state.ptv_200 = tv_enc->saved_state.ptv_200;
+}
+
+static void nv17_tv_restore(struct drm_encoder *encoder)
+{
+	struct drm_device *dev = encoder->dev;
+
+	NVWriteRAMDAC(dev, 0, NV_PRAMDAC_DACCLK +
+				nv04_dac_output_offset(encoder),
+				nouveau_encoder(encoder)->restore.output);
+
+	nv17_tv_state_load(dev, &to_tv_enc(encoder)->saved_state);
+
+	nouveau_encoder(encoder)->last_dpms = NV_DPMS_CLEARED;
+}
+
+static int nv17_tv_create_resources(struct drm_encoder *encoder,
+				    struct drm_connector *connector)
+{
+	struct drm_device *dev = encoder->dev;
+	struct drm_mode_config *conf = &dev->mode_config;
+	struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder);
+	struct dcb_entry *dcb = nouveau_encoder(encoder)->dcb;
+	int num_tv_norms = dcb->tvconf.has_component_output ? NUM_TV_NORMS :
+							NUM_LD_TV_NORMS;
+	int i;
+
+	if (nouveau_tv_norm) {
+		for (i = 0; i < num_tv_norms; i++) {
+			if (!strcmp(nv17_tv_norm_names[i], nouveau_tv_norm)) {
+				tv_enc->tv_norm = i;
+				break;
+			}
+		}
+
+		if (i == num_tv_norms)
+			NV_WARN(dev, "Invalid TV norm setting \"%s\"\n",
+				nouveau_tv_norm);
+	}
+
+	drm_mode_create_tv_properties(dev, num_tv_norms, nv17_tv_norm_names);
+
+	drm_connector_attach_property(connector,
+					conf->tv_select_subconnector_property,
+					tv_enc->select_subconnector);
+	drm_connector_attach_property(connector,
+					conf->tv_subconnector_property,
+					tv_enc->subconnector);
+	drm_connector_attach_property(connector,
+					conf->tv_mode_property,
+					tv_enc->tv_norm);
+	drm_connector_attach_property(connector,
+					conf->tv_flicker_reduction_property,
+					tv_enc->flicker);
+	drm_connector_attach_property(connector,
+					conf->tv_saturation_property,
+					tv_enc->saturation);
+	drm_connector_attach_property(connector,
+					conf->tv_hue_property,
+					tv_enc->hue);
+	drm_connector_attach_property(connector,
+					conf->tv_overscan_property,
+					tv_enc->overscan);
+
+	return 0;
+}
+
+static int nv17_tv_set_property(struct drm_encoder *encoder,
+				struct drm_connector *connector,
+				struct drm_property *property,
+				uint64_t val)
+{
+	struct drm_mode_config *conf = &encoder->dev->mode_config;
+	struct drm_crtc *crtc = encoder->crtc;
+	struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder);
+	struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder);
+	bool modes_changed = false;
+
+	if (property == conf->tv_overscan_property) {
+		tv_enc->overscan = val;
+		if (encoder->crtc) {
+			if (tv_norm->kind == CTV_ENC_MODE)
+				nv17_ctv_update_rescaler(encoder);
+			else
+				nv17_tv_update_rescaler(encoder);
+		}
+
+	} else if (property == conf->tv_saturation_property) {
+		if (tv_norm->kind != TV_ENC_MODE)
+			return -EINVAL;
+
+		tv_enc->saturation = val;
+		nv17_tv_update_properties(encoder);
+
+	} else if (property == conf->tv_hue_property) {
+		if (tv_norm->kind != TV_ENC_MODE)
+			return -EINVAL;
+
+		tv_enc->hue = val;
+		nv17_tv_update_properties(encoder);
+
+	} else if (property == conf->tv_flicker_reduction_property) {
+		if (tv_norm->kind != TV_ENC_MODE)
+			return -EINVAL;
+
+		tv_enc->flicker = val;
+		if (encoder->crtc)
+			nv17_tv_update_rescaler(encoder);
+
+	} else if (property == conf->tv_mode_property) {
+		if (connector->dpms != DRM_MODE_DPMS_OFF)
+			return -EINVAL;
+
+		tv_enc->tv_norm = val;
+
+		modes_changed = true;
+
+	} else if (property == conf->tv_select_subconnector_property) {
+		if (tv_norm->kind != TV_ENC_MODE)
+			return -EINVAL;
+
+		tv_enc->select_subconnector = val;
+		nv17_tv_update_properties(encoder);
+
+	} else {
+		return -EINVAL;
+	}
+
+	if (modes_changed) {
+		drm_helper_probe_single_connector_modes(connector, 0, 0);
+
+		/* Disable the crtc to ensure a full modeset is
+		 * performed whenever it's turned on again. */
+		if (crtc) {
+			struct drm_mode_set modeset = {
+				.crtc = crtc,
+			};
+
+			crtc->funcs->set_config(&modeset);
+		}
+	}
+
+	return 0;
+}
+
+static void nv17_tv_destroy(struct drm_encoder *encoder)
+{
+	struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder);
+
+	NV_DEBUG_KMS(encoder->dev, "\n");
+
+	drm_encoder_cleanup(encoder);
+	kfree(tv_enc);
+}
+
+static struct drm_encoder_helper_funcs nv17_tv_helper_funcs = {
+	.dpms = nv17_tv_dpms,
+	.save = nv17_tv_save,
+	.restore = nv17_tv_restore,
+	.mode_fixup = nv17_tv_mode_fixup,
+	.prepare = nv17_tv_prepare,
+	.commit = nv17_tv_commit,
+	.mode_set = nv17_tv_mode_set,
+	.detect = nv17_tv_detect,
+};
+
+static struct drm_encoder_slave_funcs nv17_tv_slave_funcs = {
+	.get_modes = nv17_tv_get_modes,
+	.mode_valid = nv17_tv_mode_valid,
+	.create_resources = nv17_tv_create_resources,
+	.set_property = nv17_tv_set_property,
+};
+
+static struct drm_encoder_funcs nv17_tv_funcs = {
+	.destroy = nv17_tv_destroy,
+};
+
+int nv17_tv_create(struct drm_device *dev, struct dcb_entry *entry)
+{
+	struct drm_encoder *encoder;
+	struct nv17_tv_encoder *tv_enc = NULL;
+
+	tv_enc = kzalloc(sizeof(*tv_enc), GFP_KERNEL);
+	if (!tv_enc)
+		return -ENOMEM;
+
+	tv_enc->overscan = 50;
+	tv_enc->flicker = 50;
+	tv_enc->saturation = 50;
+	tv_enc->hue = 0;
+	tv_enc->tv_norm = TV_NORM_PAL;
+	tv_enc->subconnector = DRM_MODE_SUBCONNECTOR_Unknown;
+	tv_enc->select_subconnector = DRM_MODE_SUBCONNECTOR_Automatic;
+	tv_enc->pin_mask = 0;
+
+	encoder = to_drm_encoder(&tv_enc->base);
+
+	tv_enc->base.dcb = entry;
+	tv_enc->base.or = ffs(entry->or) - 1;
+
+	drm_encoder_init(dev, encoder, &nv17_tv_funcs, DRM_MODE_ENCODER_TVDAC);
+	drm_encoder_helper_add(encoder, &nv17_tv_helper_funcs);
+	to_encoder_slave(encoder)->slave_funcs = &nv17_tv_slave_funcs;
+
+	encoder->possible_crtcs = entry->heads;
+	encoder->possible_clones = 0;
+
+	return 0;
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/tdfx/tdfx_drv.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/tdfx/tdfx_drv.c
@@ -48,7 +48,7 @@
 		 .owner = THIS_MODULE,
 		 .open = drm_open,
 		 .release = drm_release,
-		 .ioctl = drm_ioctl,
+		 .unlocked_ioctl = drm_ioctl,
 		 .mmap = drm_mmap,
 		 .poll = drm_poll,
 		 .fasync = drm_fasync,
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/via/via_drv.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/via/via_drv.c
@@ -58,7 +58,7 @@
 		.owner = THIS_MODULE,
 		.open = drm_open,
 		.release = drm_release,
-		.ioctl = drm_ioctl,
+		.unlocked_ioctl = drm_ioctl,
 		.mmap = drm_mmap,
 		.poll = drm_poll,
 		.fasync = drm_fasync,
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/ttm/ttm_lock.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/ttm/ttm_lock.c
@@ -0,0 +1,313 @@
+/**************************************************************************
+ *
+ * Copyright (c) 2007-2009 VMware, Inc., Palo Alto, CA., USA
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **************************************************************************/
+/*
+ * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com>
+ */
+
+#include "ttm/ttm_lock.h"
+#include "ttm/ttm_module.h"
+#include <asm/atomic.h>
+#include <linux/errno.h>
+#include <linux/wait.h>
+#include <linux/sched.h>
+#include <linux/module.h>
+
+#define TTM_WRITE_LOCK_PENDING    (1 << 0)
+#define TTM_VT_LOCK_PENDING       (1 << 1)
+#define TTM_SUSPEND_LOCK_PENDING  (1 << 2)
+#define TTM_VT_LOCK               (1 << 3)
+#define TTM_SUSPEND_LOCK          (1 << 4)
+
+void ttm_lock_init(struct ttm_lock *lock)
+{
+	spin_lock_init(&lock->lock);
+	init_waitqueue_head(&lock->queue);
+	lock->rw = 0;
+	lock->flags = 0;
+	lock->kill_takers = false;
+	lock->signal = SIGKILL;
+}
+EXPORT_SYMBOL(ttm_lock_init);
+
+void ttm_read_unlock(struct ttm_lock *lock)
+{
+	spin_lock(&lock->lock);
+	if (--lock->rw == 0)
+		wake_up_all(&lock->queue);
+	spin_unlock(&lock->lock);
+}
+EXPORT_SYMBOL(ttm_read_unlock);
+
+static bool __ttm_read_lock(struct ttm_lock *lock)
+{
+	bool locked = false;
+
+	spin_lock(&lock->lock);
+	if (unlikely(lock->kill_takers)) {
+		send_sig(lock->signal, current, 0);
+		spin_unlock(&lock->lock);
+		return false;
+	}
+	if (lock->rw >= 0 && lock->flags == 0) {
+		++lock->rw;
+		locked = true;
+	}
+	spin_unlock(&lock->lock);
+	return locked;
+}
+
+int ttm_read_lock(struct ttm_lock *lock, bool interruptible)
+{
+	int ret = 0;
+
+	if (interruptible)
+		ret = wait_event_interruptible(lock->queue,
+					       __ttm_read_lock(lock));
+	else
+		wait_event(lock->queue, __ttm_read_lock(lock));
+	return ret;
+}
+EXPORT_SYMBOL(ttm_read_lock);
+
+static bool __ttm_read_trylock(struct ttm_lock *lock, bool *locked)
+{
+	bool block = true;
+
+	*locked = false;
+
+	spin_lock(&lock->lock);
+	if (unlikely(lock->kill_takers)) {
+		send_sig(lock->signal, current, 0);
+		spin_unlock(&lock->lock);
+		return false;
+	}
+	if (lock->rw >= 0 && lock->flags == 0) {
+		++lock->rw;
+		block = false;
+		*locked = true;
+	} else if (lock->flags == 0) {
+		block = false;
+	}
+	spin_unlock(&lock->lock);
+
+	return !block;
+}
+
+int ttm_read_trylock(struct ttm_lock *lock, bool interruptible)
+{
+	int ret = 0;
+	bool locked;
+
+	if (interruptible)
+		ret = wait_event_interruptible
+			(lock->queue, __ttm_read_trylock(lock, &locked));
+	else
+		wait_event(lock->queue, __ttm_read_trylock(lock, &locked));
+
+	if (unlikely(ret != 0)) {
+		BUG_ON(locked);
+		return ret;
+	}
+
+	return (locked) ? 0 : -EBUSY;
+}
+
+void ttm_write_unlock(struct ttm_lock *lock)
+{
+	spin_lock(&lock->lock);
+	lock->rw = 0;
+	wake_up_all(&lock->queue);
+	spin_unlock(&lock->lock);
+}
+EXPORT_SYMBOL(ttm_write_unlock);
+
+static bool __ttm_write_lock(struct ttm_lock *lock)
+{
+	bool locked = false;
+
+	spin_lock(&lock->lock);
+	if (unlikely(lock->kill_takers)) {
+		send_sig(lock->signal, current, 0);
+		spin_unlock(&lock->lock);
+		return false;
+	}
+	if (lock->rw == 0 && ((lock->flags & ~TTM_WRITE_LOCK_PENDING) == 0)) {
+		lock->rw = -1;
+		lock->flags &= ~TTM_WRITE_LOCK_PENDING;
+		locked = true;
+	} else {
+		lock->flags |= TTM_WRITE_LOCK_PENDING;
+	}
+	spin_unlock(&lock->lock);
+	return locked;
+}
+
+int ttm_write_lock(struct ttm_lock *lock, bool interruptible)
+{
+	int ret = 0;
+
+	if (interruptible) {
+		ret = wait_event_interruptible(lock->queue,
+					       __ttm_write_lock(lock));
+		if (unlikely(ret != 0)) {
+			spin_lock(&lock->lock);
+			lock->flags &= ~TTM_WRITE_LOCK_PENDING;
+			wake_up_all(&lock->queue);
+			spin_unlock(&lock->lock);
+		}
+	} else
+		wait_event(lock->queue, __ttm_read_lock(lock));
+
+	return ret;
+}
+EXPORT_SYMBOL(ttm_write_lock);
+
+void ttm_write_lock_downgrade(struct ttm_lock *lock)
+{
+	spin_lock(&lock->lock);
+	lock->rw = 1;
+	wake_up_all(&lock->queue);
+	spin_unlock(&lock->lock);
+}
+
+static int __ttm_vt_unlock(struct ttm_lock *lock)
+{
+	int ret = 0;
+
+	spin_lock(&lock->lock);
+	if (unlikely(!(lock->flags & TTM_VT_LOCK)))
+		ret = -EINVAL;
+	lock->flags &= ~TTM_VT_LOCK;
+	wake_up_all(&lock->queue);
+	spin_unlock(&lock->lock);
+	printk(KERN_INFO TTM_PFX "vt unlock.\n");
+
+	return ret;
+}
+
+static void ttm_vt_lock_remove(struct ttm_base_object **p_base)
+{
+	struct ttm_base_object *base = *p_base;
+	struct ttm_lock *lock = container_of(base, struct ttm_lock, base);
+	int ret;
+
+	*p_base = NULL;
+	ret = __ttm_vt_unlock(lock);
+	BUG_ON(ret != 0);
+}
+
+static bool __ttm_vt_lock(struct ttm_lock *lock)
+{
+	bool locked = false;
+
+	spin_lock(&lock->lock);
+	if (lock->rw == 0) {
+		lock->flags &= ~TTM_VT_LOCK_PENDING;
+		lock->flags |= TTM_VT_LOCK;
+		locked = true;
+	} else {
+		lock->flags |= TTM_VT_LOCK_PENDING;
+	}
+	spin_unlock(&lock->lock);
+	return locked;
+}
+
+int ttm_vt_lock(struct ttm_lock *lock,
+		bool interruptible,
+		struct ttm_object_file *tfile)
+{
+	int ret = 0;
+
+	if (interruptible) {
+		ret = wait_event_interruptible(lock->queue,
+					       __ttm_vt_lock(lock));
+		if (unlikely(ret != 0)) {
+			spin_lock(&lock->lock);
+			lock->flags &= ~TTM_VT_LOCK_PENDING;
+			wake_up_all(&lock->queue);
+			spin_unlock(&lock->lock);
+			return ret;
+		}
+	} else
+		wait_event(lock->queue, __ttm_vt_lock(lock));
+
+	/*
+	 * Add a base-object, the destructor of which will
+	 * make sure the lock is released if the client dies
+	 * while holding it.
+	 */
+
+	ret = ttm_base_object_init(tfile, &lock->base, false,
+				   ttm_lock_type, &ttm_vt_lock_remove, NULL);
+	if (ret)
+		(void)__ttm_vt_unlock(lock);
+	else {
+		lock->vt_holder = tfile;
+		printk(KERN_INFO TTM_PFX "vt lock.\n");
+	}
+
+	return ret;
+}
+EXPORT_SYMBOL(ttm_vt_lock);
+
+int ttm_vt_unlock(struct ttm_lock *lock)
+{
+	return ttm_ref_object_base_unref(lock->vt_holder,
+					 lock->base.hash.key, TTM_REF_USAGE);
+}
+EXPORT_SYMBOL(ttm_vt_unlock);
+
+void ttm_suspend_unlock(struct ttm_lock *lock)
+{
+	spin_lock(&lock->lock);
+	lock->flags &= ~TTM_SUSPEND_LOCK;
+	wake_up_all(&lock->queue);
+	spin_unlock(&lock->lock);
+}
+EXPORT_SYMBOL(ttm_suspend_unlock);
+
+static bool __ttm_suspend_lock(struct ttm_lock *lock)
+{
+	bool locked = false;
+
+	spin_lock(&lock->lock);
+	if (lock->rw == 0) {
+		lock->flags &= ~TTM_SUSPEND_LOCK_PENDING;
+		lock->flags |= TTM_SUSPEND_LOCK;
+		locked = true;
+	} else {
+		lock->flags |= TTM_SUSPEND_LOCK_PENDING;
+	}
+	spin_unlock(&lock->lock);
+	return locked;
+}
+
+void ttm_suspend_lock(struct ttm_lock *lock)
+{
+	wait_event(lock->queue, __ttm_suspend_lock(lock));
+}
+EXPORT_SYMBOL(ttm_suspend_lock);
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/ttm/ttm_tt.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/ttm/ttm_tt.c
@@ -192,26 +192,38 @@
 	ttm->state = tt_unbound;
 	return 0;
 }
+EXPORT_SYMBOL(ttm_tt_populate);
 
 #ifdef CONFIG_X86
 static inline int ttm_tt_set_page_caching(struct page *p,
-					  enum ttm_caching_state c_state)
+					  enum ttm_caching_state c_old,
+					  enum ttm_caching_state c_new)
 {
+	int ret = 0;
+
 	if (PageHighMem(p))
 		return 0;
 
-	switch (c_state) {
-	case tt_cached:
-		return set_pages_wb(p, 1);
-	case tt_wc:
-	    return set_memory_wc((unsigned long) page_address(p), 1);
-	default:
-		return set_pages_uc(p, 1);
+	if (c_old != tt_cached) {
+		/* p isn't in the default caching state, set it to
+		 * writeback first to free its current memtype. */
+
+		ret = set_pages_wb(p, 1);
+		if (ret)
+			return ret;
 	}
+
+	if (c_new == tt_wc)
+		ret = set_memory_wc((unsigned long) page_address(p), 1);
+	else if (c_new == tt_uncached)
+		ret = set_pages_uc(p, 1);
+
+	return ret;
 }
 #else /* CONFIG_X86 */
 static inline int ttm_tt_set_page_caching(struct page *p,
-					  enum ttm_caching_state c_state)
+					  enum ttm_caching_state c_old,
+					  enum ttm_caching_state c_new)
 {
 	return 0;
 }
@@ -244,7 +256,9 @@
 	for (i = 0; i < ttm->num_pages; ++i) {
 		cur_page = ttm->pages[i];
 		if (likely(cur_page != NULL)) {
-			ret = ttm_tt_set_page_caching(cur_page, c_state);
+			ret = ttm_tt_set_page_caching(cur_page,
+						      ttm->caching_state,
+						      c_state);
 			if (unlikely(ret != 0))
 				goto out_err;
 		}
@@ -258,7 +272,7 @@
 	for (j = 0; j < i; ++j) {
 		cur_page = ttm->pages[j];
 		if (likely(cur_page != NULL)) {
-			(void)ttm_tt_set_page_caching(cur_page,
+			(void)ttm_tt_set_page_caching(cur_page, c_state,
 						      ttm->caching_state);
 		}
 	}
@@ -466,7 +480,7 @@
 	void *from_virtual;
 	void *to_virtual;
 	int i;
-	int ret;
+	int ret = -ENOMEM;
 
 	if (ttm->page_flags & TTM_PAGE_FLAG_USER) {
 		ret = ttm_tt_set_user(ttm, ttm->tsk, ttm->start,
@@ -485,8 +499,10 @@
 
 	for (i = 0; i < ttm->num_pages; ++i) {
 		from_page = read_mapping_page(swap_space, i, NULL);
-		if (IS_ERR(from_page))
+		if (IS_ERR(from_page)) {
+			ret = PTR_ERR(from_page);
 			goto out_err;
+		}
 		to_page = __ttm_tt_get_page(ttm, i);
 		if (unlikely(to_page == NULL))
 			goto out_err;
@@ -509,7 +525,7 @@
 	return 0;
 out_err:
 	ttm_tt_free_alloced_pages(ttm);
-	return -ENOMEM;
+	return ret;
 }
 
 int ttm_tt_swapout(struct ttm_tt *ttm, struct file *persistant_swap_storage)
@@ -521,6 +537,7 @@
 	void *from_virtual;
 	void *to_virtual;
 	int i;
+	int ret = -ENOMEM;
 
 	BUG_ON(ttm->state != tt_unbound && ttm->state != tt_unpopulated);
 	BUG_ON(ttm->caching_state != tt_cached);
@@ -543,7 +560,7 @@
 						0);
 		if (unlikely(IS_ERR(swap_storage))) {
 			printk(KERN_ERR "Failed allocating swap storage.\n");
-			return -ENOMEM;
+			return PTR_ERR(swap_storage);
 		}
 	} else
 		swap_storage = persistant_swap_storage;
@@ -555,9 +572,10 @@
 		if (unlikely(from_page == NULL))
 			continue;
 		to_page = read_mapping_page(swap_space, i, NULL);
-		if (unlikely(to_page == NULL))
+		if (unlikely(IS_ERR(to_page))) {
+			ret = PTR_ERR(to_page);
 			goto out_err;
-
+		}
 		preempt_disable();
 		from_virtual = kmap_atomic(from_page, KM_USER0);
 		to_virtual = kmap_atomic(to_page, KM_USER1);
@@ -581,5 +599,5 @@
 	if (!persistant_swap_storage)
 		fput(swap_storage);
 
-	return -ENOMEM;
+	return ret;
 }
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/ttm/ttm_bo_util.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/ttm/ttm_bo_util.c
@@ -53,7 +53,6 @@
 {
 	struct ttm_tt *ttm = bo->ttm;
 	struct ttm_mem_reg *old_mem = &bo->mem;
-	uint32_t save_flags = old_mem->placement;
 	int ret;
 
 	if (old_mem->mem_type != TTM_PL_SYSTEM) {
@@ -62,7 +61,6 @@
 		ttm_flag_masked(&old_mem->placement, TTM_PL_FLAG_SYSTEM,
 				TTM_PL_MASK_MEM);
 		old_mem->mem_type = TTM_PL_SYSTEM;
-		save_flags = old_mem->placement;
 	}
 
 	ret = ttm_tt_set_placement_caching(ttm, new_mem->placement);
@@ -77,7 +75,7 @@
 
 	*old_mem = *new_mem;
 	new_mem->mm_node = NULL;
-	ttm_flag_masked(&save_flags, new_mem->placement, TTM_PL_MASK_MEMTYPE);
+
 	return 0;
 }
 EXPORT_SYMBOL(ttm_bo_move_ttm);
@@ -219,7 +217,6 @@
 	void *old_iomap;
 	void *new_iomap;
 	int ret;
-	uint32_t save_flags = old_mem->placement;
 	unsigned long i;
 	unsigned long page;
 	unsigned long add = 0;
@@ -270,7 +267,6 @@
 
 	*old_mem = *new_mem;
 	new_mem->mm_node = NULL;
-	ttm_flag_masked(&save_flags, new_mem->placement, TTM_PL_MASK_MEMTYPE);
 
 	if ((man->flags & TTM_MEMTYPE_FLAG_FIXED) && (ttm != NULL)) {
 		ttm_tt_unbind(ttm);
@@ -330,6 +326,7 @@
 	INIT_LIST_HEAD(&fbo->lru);
 	INIT_LIST_HEAD(&fbo->swap);
 	fbo->vm_node = NULL;
+	atomic_set(&fbo->cpu_writers, 0);
 
 	fbo->sync_obj = driver->sync_obj_ref(bo->sync_obj);
 	if (fbo->mem.mm_node)
@@ -369,6 +366,7 @@
 #endif
 	return tmp;
 }
+EXPORT_SYMBOL(ttm_io_prot);
 
 static int ttm_bo_ioremap(struct ttm_buffer_object *bo,
 			  unsigned long bus_base,
@@ -427,7 +425,7 @@
 
 		/*
 		 * We need to use vmap to get the desired page protection
-		 * or to make the buffer object look contigous.
+		 * or to make the buffer object look contiguous.
 		 */
 		prot = (mem->placement & TTM_PL_FLAG_CACHED) ?
 			PAGE_KERNEL :
@@ -536,7 +534,6 @@
 	struct ttm_mem_type_manager *man = &bdev->man[new_mem->mem_type];
 	struct ttm_mem_reg *old_mem = &bo->mem;
 	int ret;
-	uint32_t save_flags = old_mem->placement;
 	struct ttm_buffer_object *ghost_obj;
 	void *tmp_obj = NULL;
 
@@ -597,7 +594,7 @@
 
 	*old_mem = *new_mem;
 	new_mem->mm_node = NULL;
-	ttm_flag_masked(&save_flags, new_mem->placement, TTM_PL_MASK_MEMTYPE);
+
 	return 0;
 }
 EXPORT_SYMBOL(ttm_bo_move_accel_cleanup);
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/ttm/ttm_bo_vm.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/ttm/ttm_bo_vm.c
@@ -114,7 +114,7 @@
 		ret = ttm_bo_wait(bo, false, true, false);
 		spin_unlock(&bo->lock);
 		if (unlikely(ret != 0)) {
-			retval = (ret != -ERESTART) ?
+			retval = (ret != -ERESTARTSYS) ?
 			    VM_FAULT_SIGBUS : VM_FAULT_NOPAGE;
 			goto out_unlock;
 		}
@@ -320,7 +320,7 @@
 		return -EFAULT;
 
 	driver = bo->bdev->driver;
-	if (unlikely(driver->verify_access)) {
+	if (unlikely(!driver->verify_access)) {
 		ret = -EPERM;
 		goto out_unref;
 	}
@@ -349,9 +349,6 @@
 	switch (ret) {
 	case 0:
 		break;
-	case -ERESTART:
-		ret = -EINTR;
-		goto out_unref;
 	case -EBUSY:
 		ret = -EAGAIN;
 		goto out_unref;
@@ -421,8 +418,6 @@
 	switch (ret) {
 	case 0:
 		break;
-	case -ERESTART:
-		return -EINTR;
 	case -EBUSY:
 		return -EAGAIN;
 	default:
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/ttm/ttm_object.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/ttm/ttm_object.c
@@ -0,0 +1,452 @@
+/**************************************************************************
+ *
+ * Copyright (c) 2009 VMware, Inc., Palo Alto, CA., USA
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **************************************************************************/
+/*
+ * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com>
+ */
+/** @file ttm_ref_object.c
+ *
+ * Base- and reference object implementation for the various
+ * ttm objects. Implements reference counting, minimal security checks
+ * and release on file close.
+ */
+
+/**
+ * struct ttm_object_file
+ *
+ * @tdev: Pointer to the ttm_object_device.
+ *
+ * @lock: Lock that protects the ref_list list and the
+ * ref_hash hash tables.
+ *
+ * @ref_list: List of ttm_ref_objects to be destroyed at
+ * file release.
+ *
+ * @ref_hash: Hash tables of ref objects, one per ttm_ref_type,
+ * for fast lookup of ref objects given a base object.
+ */
+
+#include "ttm/ttm_object.h"
+#include "ttm/ttm_module.h"
+#include <linux/list.h>
+#include <linux/spinlock.h>
+#include <linux/slab.h>
+#include <linux/module.h>
+#include <asm/atomic.h>
+
+struct ttm_object_file {
+	struct ttm_object_device *tdev;
+	rwlock_t lock;
+	struct list_head ref_list;
+	struct drm_open_hash ref_hash[TTM_REF_NUM];
+	struct kref refcount;
+};
+
+/**
+ * struct ttm_object_device
+ *
+ * @object_lock: lock that protects the object_hash hash table.
+ *
+ * @object_hash: hash table for fast lookup of object global names.
+ *
+ * @object_count: Per device object count.
+ *
+ * This is the per-device data structure needed for ttm object management.
+ */
+
+struct ttm_object_device {
+	rwlock_t object_lock;
+	struct drm_open_hash object_hash;
+	atomic_t object_count;
+	struct ttm_mem_global *mem_glob;
+};
+
+/**
+ * struct ttm_ref_object
+ *
+ * @hash: Hash entry for the per-file object reference hash.
+ *
+ * @head: List entry for the per-file list of ref-objects.
+ *
+ * @kref: Ref count.
+ *
+ * @obj: Base object this ref object is referencing.
+ *
+ * @ref_type: Type of ref object.
+ *
+ * This is similar to an idr object, but it also has a hash table entry
+ * that allows lookup with a pointer to the referenced object as a key. In
+ * that way, one can easily detect whether a base object is referenced by
+ * a particular ttm_object_file. It also carries a ref count to avoid creating
+ * multiple ref objects if a ttm_object_file references the same base
+ * object more than once.
+ */
+
+struct ttm_ref_object {
+	struct drm_hash_item hash;
+	struct list_head head;
+	struct kref kref;
+	enum ttm_ref_type ref_type;
+	struct ttm_base_object *obj;
+	struct ttm_object_file *tfile;
+};
+
+static inline struct ttm_object_file *
+ttm_object_file_ref(struct ttm_object_file *tfile)
+{
+	kref_get(&tfile->refcount);
+	return tfile;
+}
+
+static void ttm_object_file_destroy(struct kref *kref)
+{
+	struct ttm_object_file *tfile =
+		container_of(kref, struct ttm_object_file, refcount);
+
+	kfree(tfile);
+}
+
+
+static inline void ttm_object_file_unref(struct ttm_object_file **p_tfile)
+{
+	struct ttm_object_file *tfile = *p_tfile;
+
+	*p_tfile = NULL;
+	kref_put(&tfile->refcount, ttm_object_file_destroy);
+}
+
+
+int ttm_base_object_init(struct ttm_object_file *tfile,
+			 struct ttm_base_object *base,
+			 bool shareable,
+			 enum ttm_object_type object_type,
+			 void (*refcount_release) (struct ttm_base_object **),
+			 void (*ref_obj_release) (struct ttm_base_object *,
+						  enum ttm_ref_type ref_type))
+{
+	struct ttm_object_device *tdev = tfile->tdev;
+	int ret;
+
+	base->shareable = shareable;
+	base->tfile = ttm_object_file_ref(tfile);
+	base->refcount_release = refcount_release;
+	base->ref_obj_release = ref_obj_release;
+	base->object_type = object_type;
+	write_lock(&tdev->object_lock);
+	kref_init(&base->refcount);
+	ret = drm_ht_just_insert_please(&tdev->object_hash,
+					&base->hash,
+					(unsigned long)base, 31, 0, 0);
+	write_unlock(&tdev->object_lock);
+	if (unlikely(ret != 0))
+		goto out_err0;
+
+	ret = ttm_ref_object_add(tfile, base, TTM_REF_USAGE, NULL);
+	if (unlikely(ret != 0))
+		goto out_err1;
+
+	ttm_base_object_unref(&base);
+
+	return 0;
+out_err1:
+	(void)drm_ht_remove_item(&tdev->object_hash, &base->hash);
+out_err0:
+	return ret;
+}
+EXPORT_SYMBOL(ttm_base_object_init);
+
+static void ttm_release_base(struct kref *kref)
+{
+	struct ttm_base_object *base =
+	    container_of(kref, struct ttm_base_object, refcount);
+	struct ttm_object_device *tdev = base->tfile->tdev;
+
+	(void)drm_ht_remove_item(&tdev->object_hash, &base->hash);
+	write_unlock(&tdev->object_lock);
+	if (base->refcount_release) {
+		ttm_object_file_unref(&base->tfile);
+		base->refcount_release(&base);
+	}
+	write_lock(&tdev->object_lock);
+}
+
+void ttm_base_object_unref(struct ttm_base_object **p_base)
+{
+	struct ttm_base_object *base = *p_base;
+	struct ttm_object_device *tdev = base->tfile->tdev;
+
+	*p_base = NULL;
+
+	/*
+	 * Need to take the lock here to avoid racing with
+	 * users trying to look up the object.
+	 */
+
+	write_lock(&tdev->object_lock);
+	(void)kref_put(&base->refcount, &ttm_release_base);
+	write_unlock(&tdev->object_lock);
+}
+EXPORT_SYMBOL(ttm_base_object_unref);
+
+struct ttm_base_object *ttm_base_object_lookup(struct ttm_object_file *tfile,
+					       uint32_t key)
+{
+	struct ttm_object_device *tdev = tfile->tdev;
+	struct ttm_base_object *base;
+	struct drm_hash_item *hash;
+	int ret;
+
+	read_lock(&tdev->object_lock);
+	ret = drm_ht_find_item(&tdev->object_hash, key, &hash);
+
+	if (likely(ret == 0)) {
+		base = drm_hash_entry(hash, struct ttm_base_object, hash);
+		kref_get(&base->refcount);
+	}
+	read_unlock(&tdev->object_lock);
+
+	if (unlikely(ret != 0))
+		return NULL;
+
+	if (tfile != base->tfile && !base->shareable) {
+		printk(KERN_ERR TTM_PFX
+		       "Attempted access of non-shareable object.\n");
+		ttm_base_object_unref(&base);
+		return NULL;
+	}
+
+	return base;
+}
+EXPORT_SYMBOL(ttm_base_object_lookup);
+
+int ttm_ref_object_add(struct ttm_object_file *tfile,
+		       struct ttm_base_object *base,
+		       enum ttm_ref_type ref_type, bool *existed)
+{
+	struct drm_open_hash *ht = &tfile->ref_hash[ref_type];
+	struct ttm_ref_object *ref;
+	struct drm_hash_item *hash;
+	struct ttm_mem_global *mem_glob = tfile->tdev->mem_glob;
+	int ret = -EINVAL;
+
+	if (existed != NULL)
+		*existed = true;
+
+	while (ret == -EINVAL) {
+		read_lock(&tfile->lock);
+		ret = drm_ht_find_item(ht, base->hash.key, &hash);
+
+		if (ret == 0) {
+			ref = drm_hash_entry(hash, struct ttm_ref_object, hash);
+			kref_get(&ref->kref);
+			read_unlock(&tfile->lock);
+			break;
+		}
+
+		read_unlock(&tfile->lock);
+		ret = ttm_mem_global_alloc(mem_glob, sizeof(*ref),
+					   false, false);
+		if (unlikely(ret != 0))
+			return ret;
+		ref = kmalloc(sizeof(*ref), GFP_KERNEL);
+		if (unlikely(ref == NULL)) {
+			ttm_mem_global_free(mem_glob, sizeof(*ref));
+			return -ENOMEM;
+		}
+
+		ref->hash.key = base->hash.key;
+		ref->obj = base;
+		ref->tfile = tfile;
+		ref->ref_type = ref_type;
+		kref_init(&ref->kref);
+
+		write_lock(&tfile->lock);
+		ret = drm_ht_insert_item(ht, &ref->hash);
+
+		if (likely(ret == 0)) {
+			list_add_tail(&ref->head, &tfile->ref_list);
+			kref_get(&base->refcount);
+			write_unlock(&tfile->lock);
+			if (existed != NULL)
+				*existed = false;
+			break;
+		}
+
+		write_unlock(&tfile->lock);
+		BUG_ON(ret != -EINVAL);
+
+		ttm_mem_global_free(mem_glob, sizeof(*ref));
+		kfree(ref);
+	}
+
+	return ret;
+}
+EXPORT_SYMBOL(ttm_ref_object_add);
+
+static void ttm_ref_object_release(struct kref *kref)
+{
+	struct ttm_ref_object *ref =
+	    container_of(kref, struct ttm_ref_object, kref);
+	struct ttm_base_object *base = ref->obj;
+	struct ttm_object_file *tfile = ref->tfile;
+	struct drm_open_hash *ht;
+	struct ttm_mem_global *mem_glob = tfile->tdev->mem_glob;
+
+	ht = &tfile->ref_hash[ref->ref_type];
+	(void)drm_ht_remove_item(ht, &ref->hash);
+	list_del(&ref->head);
+	write_unlock(&tfile->lock);
+
+	if (ref->ref_type != TTM_REF_USAGE && base->ref_obj_release)
+		base->ref_obj_release(base, ref->ref_type);
+
+	ttm_base_object_unref(&ref->obj);
+	ttm_mem_global_free(mem_glob, sizeof(*ref));
+	kfree(ref);
+	write_lock(&tfile->lock);
+}
+
+int ttm_ref_object_base_unref(struct ttm_object_file *tfile,
+			      unsigned long key, enum ttm_ref_type ref_type)
+{
+	struct drm_open_hash *ht = &tfile->ref_hash[ref_type];
+	struct ttm_ref_object *ref;
+	struct drm_hash_item *hash;
+	int ret;
+
+	write_lock(&tfile->lock);
+	ret = drm_ht_find_item(ht, key, &hash);
+	if (unlikely(ret != 0)) {
+		write_unlock(&tfile->lock);
+		return -EINVAL;
+	}
+	ref = drm_hash_entry(hash, struct ttm_ref_object, hash);
+	kref_put(&ref->kref, ttm_ref_object_release);
+	write_unlock(&tfile->lock);
+	return 0;
+}
+EXPORT_SYMBOL(ttm_ref_object_base_unref);
+
+void ttm_object_file_release(struct ttm_object_file **p_tfile)
+{
+	struct ttm_ref_object *ref;
+	struct list_head *list;
+	unsigned int i;
+	struct ttm_object_file *tfile = *p_tfile;
+
+	*p_tfile = NULL;
+	write_lock(&tfile->lock);
+
+	/*
+	 * Since we release the lock within the loop, we have to
+	 * restart it from the beginning each time.
+	 */
+
+	while (!list_empty(&tfile->ref_list)) {
+		list = tfile->ref_list.next;
+		ref = list_entry(list, struct ttm_ref_object, head);
+		ttm_ref_object_release(&ref->kref);
+	}
+
+	for (i = 0; i < TTM_REF_NUM; ++i)
+		drm_ht_remove(&tfile->ref_hash[i]);
+
+	write_unlock(&tfile->lock);
+	ttm_object_file_unref(&tfile);
+}
+EXPORT_SYMBOL(ttm_object_file_release);
+
+struct ttm_object_file *ttm_object_file_init(struct ttm_object_device *tdev,
+					     unsigned int hash_order)
+{
+	struct ttm_object_file *tfile = kmalloc(sizeof(*tfile), GFP_KERNEL);
+	unsigned int i;
+	unsigned int j = 0;
+	int ret;
+
+	if (unlikely(tfile == NULL))
+		return NULL;
+
+	rwlock_init(&tfile->lock);
+	tfile->tdev = tdev;
+	kref_init(&tfile->refcount);
+	INIT_LIST_HEAD(&tfile->ref_list);
+
+	for (i = 0; i < TTM_REF_NUM; ++i) {
+		ret = drm_ht_create(&tfile->ref_hash[i], hash_order);
+		if (ret) {
+			j = i;
+			goto out_err;
+		}
+	}
+
+	return tfile;
+out_err:
+	for (i = 0; i < j; ++i)
+		drm_ht_remove(&tfile->ref_hash[i]);
+
+	kfree(tfile);
+
+	return NULL;
+}
+EXPORT_SYMBOL(ttm_object_file_init);
+
+struct ttm_object_device *ttm_object_device_init(struct ttm_mem_global
+						 *mem_glob,
+						 unsigned int hash_order)
+{
+	struct ttm_object_device *tdev = kmalloc(sizeof(*tdev), GFP_KERNEL);
+	int ret;
+
+	if (unlikely(tdev == NULL))
+		return NULL;
+
+	tdev->mem_glob = mem_glob;
+	rwlock_init(&tdev->object_lock);
+	atomic_set(&tdev->object_count, 0);
+	ret = drm_ht_create(&tdev->object_hash, hash_order);
+
+	if (likely(ret == 0))
+		return tdev;
+
+	kfree(tdev);
+	return NULL;
+}
+EXPORT_SYMBOL(ttm_object_device_init);
+
+void ttm_object_device_release(struct ttm_object_device **p_tdev)
+{
+	struct ttm_object_device *tdev = *p_tdev;
+
+	*p_tdev = NULL;
+
+	write_lock(&tdev->object_lock);
+	drm_ht_remove(&tdev->object_hash);
+	write_unlock(&tdev->object_lock);
+
+	kfree(tdev);
+}
+EXPORT_SYMBOL(ttm_object_device_release);
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/ttm/ttm_execbuf_util.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/ttm/ttm_execbuf_util.c
@@ -0,0 +1,117 @@
+/**************************************************************************
+ *
+ * Copyright (c) 2006-2009 VMware, Inc., Palo Alto, CA., USA
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **************************************************************************/
+
+#include "ttm/ttm_execbuf_util.h"
+#include "ttm/ttm_bo_driver.h"
+#include "ttm/ttm_placement.h"
+#include <linux/wait.h>
+#include <linux/sched.h>
+#include <linux/module.h>
+
+void ttm_eu_backoff_reservation(struct list_head *list)
+{
+	struct ttm_validate_buffer *entry;
+
+	list_for_each_entry(entry, list, head) {
+		struct ttm_buffer_object *bo = entry->bo;
+		if (!entry->reserved)
+			continue;
+
+		entry->reserved = false;
+		ttm_bo_unreserve(bo);
+	}
+}
+EXPORT_SYMBOL(ttm_eu_backoff_reservation);
+
+/*
+ * Reserve buffers for validation.
+ *
+ * If a buffer in the list is marked for CPU access, we back off and
+ * wait for that buffer to become free for GPU access.
+ *
+ * If a buffer is reserved for another validation, the validator with
+ * the highest validation sequence backs off and waits for that buffer
+ * to become unreserved. This prevents deadlocks when validating multiple
+ * buffers in different orders.
+ */
+
+int ttm_eu_reserve_buffers(struct list_head *list, uint32_t val_seq)
+{
+	struct ttm_validate_buffer *entry;
+	int ret;
+
+retry:
+	list_for_each_entry(entry, list, head) {
+		struct ttm_buffer_object *bo = entry->bo;
+
+		entry->reserved = false;
+		ret = ttm_bo_reserve(bo, true, false, true, val_seq);
+		if (ret != 0) {
+			ttm_eu_backoff_reservation(list);
+			if (ret == -EAGAIN) {
+				ret = ttm_bo_wait_unreserved(bo, true);
+				if (unlikely(ret != 0))
+					return ret;
+				goto retry;
+			} else
+				return ret;
+		}
+
+		entry->reserved = true;
+		if (unlikely(atomic_read(&bo->cpu_writers) > 0)) {
+			ttm_eu_backoff_reservation(list);
+			ret = ttm_bo_wait_cpu(bo, false);
+			if (ret)
+				return ret;
+			goto retry;
+		}
+	}
+	return 0;
+}
+EXPORT_SYMBOL(ttm_eu_reserve_buffers);
+
+void ttm_eu_fence_buffer_objects(struct list_head *list, void *sync_obj)
+{
+	struct ttm_validate_buffer *entry;
+
+	list_for_each_entry(entry, list, head) {
+		struct ttm_buffer_object *bo = entry->bo;
+		struct ttm_bo_driver *driver = bo->bdev->driver;
+		void *old_sync_obj;
+
+		spin_lock(&bo->lock);
+		old_sync_obj = bo->sync_obj;
+		bo->sync_obj = driver->sync_obj_ref(sync_obj);
+		bo->sync_obj_arg = entry->new_sync_obj_arg;
+		spin_unlock(&bo->lock);
+		ttm_bo_unreserve(bo);
+		entry->reserved = false;
+		if (old_sync_obj)
+			driver->sync_obj_unref(&old_sync_obj);
+	}
+}
+EXPORT_SYMBOL(ttm_eu_fence_buffer_objects);
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/ttm/Makefile
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/ttm/Makefile
@@ -3,6 +3,7 @@
 
 ccflags-y := -Iinclude/drm
 ttm-y := ttm_agp_backend.o ttm_memory.o ttm_tt.o ttm_bo.o \
-	ttm_bo_util.o ttm_bo_vm.o ttm_module.o ttm_global.o
+	ttm_bo_util.o ttm_bo_vm.o ttm_module.o ttm_global.o \
+	ttm_object.o ttm_lock.o ttm_execbuf_util.o
 
 obj-$(CONFIG_DRM_TTM) += ttm.o
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/ttm/ttm_memory.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/ttm/ttm_memory.c
@@ -274,16 +274,17 @@
 static int ttm_mem_init_highmem_zone(struct ttm_mem_global *glob,
 				     const struct sysinfo *si)
 {
-	struct ttm_mem_zone *zone = kzalloc(sizeof(*zone), GFP_KERNEL);
+	struct ttm_mem_zone *zone;
 	uint64_t mem;
 	int ret;
 
-	if (unlikely(!zone))
-		return -ENOMEM;
-
 	if (si->totalhigh == 0)
 		return 0;
 
+	zone = kzalloc(sizeof(*zone), GFP_KERNEL);
+	if (unlikely(!zone))
+		return -ENOMEM;
+
 	mem = si->totalram;
 	mem *= si->mem_unit;
 
@@ -322,8 +323,10 @@
 	 * No special dma32 zone needed.
 	 */
 
-	if (mem <= ((uint64_t) 1ULL << 32))
+	if (mem <= ((uint64_t) 1ULL << 32)) {
+		kfree(zone);
 		return 0;
+	}
 
 	/*
 	 * Limit max dma32 memory to 4GB for now
@@ -460,6 +463,7 @@
 {
 	return ttm_mem_global_free_zone(glob, NULL, amount);
 }
+EXPORT_SYMBOL(ttm_mem_global_free);
 
 static int ttm_mem_global_reserve(struct ttm_mem_global *glob,
 				  struct ttm_mem_zone *single_zone,
@@ -533,6 +537,7 @@
 	return ttm_mem_global_alloc_zone(glob, NULL, memory, no_wait,
 					 interruptible);
 }
+EXPORT_SYMBOL(ttm_mem_global_alloc);
 
 int ttm_mem_global_alloc_page(struct ttm_mem_global *glob,
 			      struct page *page,
@@ -588,3 +593,4 @@
 	}
 	return 0;
 }
+EXPORT_SYMBOL(ttm_round_pot);
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/ttm/ttm_bo.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/ttm/ttm_bo.c
@@ -27,6 +27,14 @@
 /*
  * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com>
  */
+/* Notes:
+ *
+ * We store bo pointer in drm_mm_node struct so we know which bo own a
+ * specific node. There is no protection on the pointer, thus to make
+ * sure things don't go berserk you have to access this pointer while
+ * holding the global lru lock and make sure anytime you free a node you
+ * reset the pointer to NULL.
+ */
 
 #include "ttm/ttm_module.h"
 #include "ttm/ttm_bo_driver.h"
@@ -51,6 +59,59 @@
 	.mode = S_IRUGO
 };
 
+static inline int ttm_mem_type_from_flags(uint32_t flags, uint32_t *mem_type)
+{
+	int i;
+
+	for (i = 0; i <= TTM_PL_PRIV5; i++)
+		if (flags & (1 << i)) {
+			*mem_type = i;
+			return 0;
+		}
+	return -EINVAL;
+}
+
+static void ttm_mem_type_debug(struct ttm_bo_device *bdev, int mem_type)
+{
+	struct ttm_mem_type_manager *man = &bdev->man[mem_type];
+
+	printk(KERN_ERR TTM_PFX "    has_type: %d\n", man->has_type);
+	printk(KERN_ERR TTM_PFX "    use_type: %d\n", man->use_type);
+	printk(KERN_ERR TTM_PFX "    flags: 0x%08X\n", man->flags);
+	printk(KERN_ERR TTM_PFX "    gpu_offset: 0x%08lX\n", man->gpu_offset);
+	printk(KERN_ERR TTM_PFX "    io_offset: 0x%08lX\n", man->io_offset);
+	printk(KERN_ERR TTM_PFX "    io_size: %ld\n", man->io_size);
+	printk(KERN_ERR TTM_PFX "    size: %llu\n", man->size);
+	printk(KERN_ERR TTM_PFX "    available_caching: 0x%08X\n",
+		man->available_caching);
+	printk(KERN_ERR TTM_PFX "    default_caching: 0x%08X\n",
+		man->default_caching);
+	if (mem_type != TTM_PL_SYSTEM) {
+		spin_lock(&bdev->glob->lru_lock);
+		drm_mm_debug_table(&man->manager, TTM_PFX);
+		spin_unlock(&bdev->glob->lru_lock);
+	}
+}
+
+static void ttm_bo_mem_space_debug(struct ttm_buffer_object *bo,
+					struct ttm_placement *placement)
+{
+	int i, ret, mem_type;
+
+	printk(KERN_ERR TTM_PFX "No space for %p (%lu pages, %luK, %luM)\n",
+		bo, bo->mem.num_pages, bo->mem.size >> 10,
+		bo->mem.size >> 20);
+	for (i = 0; i < placement->num_placement; i++) {
+		ret = ttm_mem_type_from_flags(placement->placement[i],
+						&mem_type);
+		if (ret)
+			return;
+		printk(KERN_ERR TTM_PFX "  placement[%d]=0x%08X (%d)\n",
+			i, placement->placement[i], mem_type);
+		ttm_mem_type_debug(bo->bdev, mem_type);
+	}
+}
+
 static ssize_t ttm_bo_global_show(struct kobject *kobj,
 				  struct attribute *attr,
 				  char *buffer)
@@ -117,12 +178,13 @@
 		ret = wait_event_interruptible(bo->event_queue,
 					       atomic_read(&bo->reserved) == 0);
 		if (unlikely(ret != 0))
-			return -ERESTART;
+			return ret;
 	} else {
 		wait_event(bo->event_queue, atomic_read(&bo->reserved) == 0);
 	}
 	return 0;
 }
+EXPORT_SYMBOL(ttm_bo_wait_unreserved);
 
 static void ttm_bo_add_to_lru(struct ttm_buffer_object *bo)
 {
@@ -247,7 +309,6 @@
 /*
  * Call bo->mutex locked.
  */
-
 static int ttm_bo_add_ttm(struct ttm_buffer_object *bo, bool zero_alloc)
 {
 	struct ttm_bo_device *bdev = bo->bdev;
@@ -275,9 +336,10 @@
 		bo->ttm = ttm_tt_create(bdev, bo->num_pages << PAGE_SHIFT,
 					page_flags | TTM_PAGE_FLAG_USER,
 					glob->dummy_read_page);
-		if (unlikely(bo->ttm == NULL))
+		if (unlikely(bo->ttm == NULL)) {
 			ret = -ENOMEM;
-		break;
+			break;
+		}
 
 		ret = ttm_tt_set_user(bo->ttm, current,
 				      bo->buffer_start, bo->num_pages);
@@ -328,14 +390,8 @@
 		}
 
 		if (bo->mem.mem_type == TTM_PL_SYSTEM) {
-
-			struct ttm_mem_reg *old_mem = &bo->mem;
-			uint32_t save_flags = old_mem->placement;
-
-			*old_mem = *mem;
+			bo->mem = *mem;
 			mem->mm_node = NULL;
-			ttm_flag_masked(&save_flags, mem->placement,
-					TTM_PL_MASK_MEMTYPE);
 			goto moved;
 		}
 
@@ -370,7 +426,8 @@
 		    bdev->man[bo->mem.mem_type].gpu_offset;
 		bo->cur_placement = bo->mem.placement;
 		spin_unlock(&bo->lock);
-	}
+	} else
+		bo->offset = 0;
 
 	return 0;
 
@@ -386,6 +443,43 @@
 }
 
 /**
+ * Call bo::reserved and with the lru lock held.
+ * Will release GPU memory type usage on destruction.
+ * This is the place to put in driver specific hooks.
+ * Will release the bo::reserved lock and the
+ * lru lock on exit.
+ */
+
+static void ttm_bo_cleanup_memtype_use(struct ttm_buffer_object *bo)
+{
+	struct ttm_bo_global *glob = bo->glob;
+
+	if (bo->ttm) {
+
+		/**
+		 * Release the lru_lock, since we don't want to have
+		 * an atomic requirement on ttm_tt[unbind|destroy].
+		 */
+
+		spin_unlock(&glob->lru_lock);
+		ttm_tt_unbind(bo->ttm);
+		ttm_tt_destroy(bo->ttm);
+		bo->ttm = NULL;
+		spin_lock(&glob->lru_lock);
+	}
+
+	if (bo->mem.mm_node) {
+		drm_mm_put_block(bo->mem.mm_node);
+		bo->mem.mm_node = NULL;
+	}
+
+	atomic_set(&bo->reserved, 0);
+	wake_up_all(&bo->event_queue);
+	spin_unlock(&glob->lru_lock);
+}
+
+
+/**
  * If bo idle, remove from delayed- and lru lists, and unref.
  * If not idle, and already on delayed list, do nothing.
  * If not idle, and not on delayed list, put on delayed list,
@@ -400,6 +494,7 @@
 	int ret;
 
 	spin_lock(&bo->lock);
+retry:
 	(void) ttm_bo_wait(bo, false, false, !remove_all);
 
 	if (!bo->sync_obj) {
@@ -408,30 +503,52 @@
 		spin_unlock(&bo->lock);
 
 		spin_lock(&glob->lru_lock);
-		ret = ttm_bo_reserve_locked(bo, false, false, false, 0);
-		BUG_ON(ret);
-		if (bo->ttm)
-			ttm_tt_unbind(bo->ttm);
+		ret = ttm_bo_reserve_locked(bo, false, !remove_all, false, 0);
 
-		if (!list_empty(&bo->ddestroy)) {
-			list_del_init(&bo->ddestroy);
-			kref_put(&bo->list_kref, ttm_bo_ref_bug);
+		/**
+		 * Someone else has the object reserved. Bail and retry.
+		 */
+
+		if (unlikely(ret == -EBUSY)) {
+			spin_unlock(&glob->lru_lock);
+			spin_lock(&bo->lock);
+			goto requeue;
 		}
-		if (bo->mem.mm_node) {
-			drm_mm_put_block(bo->mem.mm_node);
-			bo->mem.mm_node = NULL;
+
+		/**
+		 * We can re-check for sync object without taking
+		 * the bo::lock since setting the sync object requires
+		 * also bo::reserved. A busy object at this point may
+		 * be caused by another thread starting an accelerated
+		 * eviction.
+		 */
+
+		if (unlikely(bo->sync_obj)) {
+			atomic_set(&bo->reserved, 0);
+			wake_up_all(&bo->event_queue);
+			spin_unlock(&glob->lru_lock);
+			spin_lock(&bo->lock);
+			if (remove_all)
+				goto retry;
+			else
+				goto requeue;
 		}
+
 		put_count = ttm_bo_del_from_lru(bo);
-		spin_unlock(&glob->lru_lock);
 
-		atomic_set(&bo->reserved, 0);
+		if (!list_empty(&bo->ddestroy)) {
+			list_del_init(&bo->ddestroy);
+			++put_count;
+		}
+
+		ttm_bo_cleanup_memtype_use(bo);
 
 		while (put_count--)
-			kref_put(&bo->list_kref, ttm_bo_release_list);
+			kref_put(&bo->list_kref, ttm_bo_ref_bug);
 
 		return 0;
 	}
-
+requeue:
 	spin_lock(&glob->lru_lock);
 	if (list_empty(&bo->ddestroy)) {
 		void *sync_obj = bo->sync_obj;
@@ -465,52 +582,44 @@
 static int ttm_bo_delayed_delete(struct ttm_bo_device *bdev, bool remove_all)
 {
 	struct ttm_bo_global *glob = bdev->glob;
-	struct ttm_buffer_object *entry, *nentry;
-	struct list_head *list, *next;
-	int ret;
+	struct ttm_buffer_object *entry = NULL;
+	int ret = 0;
 
 	spin_lock(&glob->lru_lock);
-	list_for_each_safe(list, next, &bdev->ddestroy) {
-		entry = list_entry(list, struct ttm_buffer_object, ddestroy);
-		nentry = NULL;
-
-		/*
-		 * Protect the next list entry from destruction while we
-		 * unlock the lru_lock.
-		 */
+	if (list_empty(&bdev->ddestroy))
+		goto out_unlock;
 
-		if (next != &bdev->ddestroy) {
-			nentry = list_entry(next, struct ttm_buffer_object,
-					    ddestroy);
+	entry = list_first_entry(&bdev->ddestroy,
+		struct ttm_buffer_object, ddestroy);
+	kref_get(&entry->list_kref);
+
+	for (;;) {
+		struct ttm_buffer_object *nentry = NULL;
+
+		if (entry->ddestroy.next != &bdev->ddestroy) {
+			nentry = list_first_entry(&entry->ddestroy,
+				struct ttm_buffer_object, ddestroy);
 			kref_get(&nentry->list_kref);
 		}
-		kref_get(&entry->list_kref);
 
 		spin_unlock(&glob->lru_lock);
 		ret = ttm_bo_cleanup_refs(entry, remove_all);
 		kref_put(&entry->list_kref, ttm_bo_release_list);
+		entry = nentry;
 
-		spin_lock(&glob->lru_lock);
-		if (nentry) {
-			bool next_onlist = !list_empty(next);
-			spin_unlock(&glob->lru_lock);
-			kref_put(&nentry->list_kref, ttm_bo_release_list);
-			spin_lock(&glob->lru_lock);
-			/*
-			 * Someone might have raced us and removed the
-			 * next entry from the list. We don't bother restarting
-			 * list traversal.
-			 */
+		if (ret || !entry)
+			goto out;
 
-			if (!next_onlist)
-				break;
-		}
-		if (ret)
+		spin_lock(&glob->lru_lock);
+		if (list_empty(&entry->ddestroy))
 			break;
 	}
-	ret = !list_empty(&bdev->ddestroy);
-	spin_unlock(&glob->lru_lock);
 
+out_unlock:
+	spin_unlock(&glob->lru_lock);
+out:
+	if (entry)
+		kref_put(&entry->list_kref, ttm_bo_release_list);
 	return ret;
 }
 
@@ -554,24 +663,21 @@
 }
 EXPORT_SYMBOL(ttm_bo_unref);
 
-static int ttm_bo_evict(struct ttm_buffer_object *bo, unsigned mem_type,
-			bool interruptible, bool no_wait)
+static int ttm_bo_evict(struct ttm_buffer_object *bo, bool interruptible,
+			bool no_wait)
 {
-	int ret = 0;
 	struct ttm_bo_device *bdev = bo->bdev;
 	struct ttm_bo_global *glob = bo->glob;
 	struct ttm_mem_reg evict_mem;
-	uint32_t proposed_placement;
-
-	if (bo->mem.mem_type != mem_type)
-		goto out;
+	struct ttm_placement placement;
+	int ret = 0;
 
 	spin_lock(&bo->lock);
 	ret = ttm_bo_wait(bo, false, interruptible, no_wait);
 	spin_unlock(&bo->lock);
 
 	if (unlikely(ret != 0)) {
-		if (ret != -ERESTART) {
+		if (ret != -ERESTARTSYS) {
 			printk(KERN_ERR TTM_PFX
 			       "Failed to expire sync object before "
 			       "buffer eviction.\n");
@@ -584,116 +690,165 @@
 	evict_mem = bo->mem;
 	evict_mem.mm_node = NULL;
 
-	proposed_placement = bdev->driver->evict_flags(bo);
-
-	ret = ttm_bo_mem_space(bo, proposed_placement,
-			       &evict_mem, interruptible, no_wait);
-	if (unlikely(ret != 0 && ret != -ERESTART))
-		ret = ttm_bo_mem_space(bo, TTM_PL_FLAG_SYSTEM,
-				       &evict_mem, interruptible, no_wait);
-
+	placement.fpfn = 0;
+	placement.lpfn = 0;
+	placement.num_placement = 0;
+	placement.num_busy_placement = 0;
+	bdev->driver->evict_flags(bo, &placement);
+	ret = ttm_bo_mem_space(bo, &placement, &evict_mem, interruptible,
+				no_wait);
 	if (ret) {
-		if (ret != -ERESTART)
+		if (ret != -ERESTARTSYS) {
 			printk(KERN_ERR TTM_PFX
 			       "Failed to find memory space for "
 			       "buffer 0x%p eviction.\n", bo);
+			ttm_bo_mem_space_debug(bo, &placement);
+		}
 		goto out;
 	}
 
 	ret = ttm_bo_handle_move_mem(bo, &evict_mem, true, interruptible,
 				     no_wait);
 	if (ret) {
-		if (ret != -ERESTART)
+		if (ret != -ERESTARTSYS)
 			printk(KERN_ERR TTM_PFX "Buffer eviction failed\n");
+		spin_lock(&glob->lru_lock);
+		if (evict_mem.mm_node) {
+			evict_mem.mm_node->private = NULL;
+			drm_mm_put_block(evict_mem.mm_node);
+			evict_mem.mm_node = NULL;
+		}
+		spin_unlock(&glob->lru_lock);
 		goto out;
 	}
-
-	spin_lock(&glob->lru_lock);
-	if (evict_mem.mm_node) {
-		drm_mm_put_block(evict_mem.mm_node);
-		evict_mem.mm_node = NULL;
-	}
-	spin_unlock(&glob->lru_lock);
 	bo->evicted = true;
 out:
 	return ret;
 }
 
-/**
- * Repeatedly evict memory from the LRU for @mem_type until we create enough
- * space, or we've evicted everything and there isn't enough space.
- */
-static int ttm_bo_mem_force_space(struct ttm_bo_device *bdev,
-				  struct ttm_mem_reg *mem,
-				  uint32_t mem_type,
-				  bool interruptible, bool no_wait)
+static int ttm_mem_evict_first(struct ttm_bo_device *bdev,
+				uint32_t mem_type,
+				bool interruptible, bool no_wait)
 {
 	struct ttm_bo_global *glob = bdev->glob;
-	struct drm_mm_node *node;
-	struct ttm_buffer_object *entry;
 	struct ttm_mem_type_manager *man = &bdev->man[mem_type];
-	struct list_head *lru;
-	unsigned long num_pages = mem->num_pages;
-	int put_count = 0;
-	int ret;
-
-retry_pre_get:
-	ret = drm_mm_pre_get(&man->manager);
-	if (unlikely(ret != 0))
-		return ret;
+	struct ttm_buffer_object *bo;
+	int ret, put_count = 0;
 
+retry:
 	spin_lock(&glob->lru_lock);
-	do {
-		node = drm_mm_search_free(&man->manager, num_pages,
-					  mem->page_alignment, 1);
-		if (node)
-			break;
+	if (list_empty(&man->lru)) {
+		spin_unlock(&glob->lru_lock);
+		return -EBUSY;
+	}
 
-		lru = &man->lru;
-		if (list_empty(lru))
-			break;
+	bo = list_first_entry(&man->lru, struct ttm_buffer_object, lru);
+	kref_get(&bo->list_kref);
 
-		entry = list_first_entry(lru, struct ttm_buffer_object, lru);
-		kref_get(&entry->list_kref);
+	ret = ttm_bo_reserve_locked(bo, false, true, false, 0);
 
-		ret =
-		    ttm_bo_reserve_locked(entry, interruptible, no_wait,
-					  false, 0);
+	if (unlikely(ret == -EBUSY)) {
+		spin_unlock(&glob->lru_lock);
+		if (likely(!no_wait))
+			ret = ttm_bo_wait_unreserved(bo, interruptible);
 
-		if (likely(ret == 0))
-			put_count = ttm_bo_del_from_lru(entry);
+		kref_put(&bo->list_kref, ttm_bo_release_list);
 
-		spin_unlock(&glob->lru_lock);
+		/**
+		 * We *need* to retry after releasing the lru lock.
+		 */
 
 		if (unlikely(ret != 0))
 			return ret;
+		goto retry;
+	}
 
-		while (put_count--)
-			kref_put(&entry->list_kref, ttm_bo_ref_bug);
+	put_count = ttm_bo_del_from_lru(bo);
+	spin_unlock(&glob->lru_lock);
 
-		ret = ttm_bo_evict(entry, mem_type, interruptible, no_wait);
+	BUG_ON(ret != 0);
 
-		ttm_bo_unreserve(entry);
+	while (put_count--)
+		kref_put(&bo->list_kref, ttm_bo_ref_bug);
 
-		kref_put(&entry->list_kref, ttm_bo_release_list);
-		if (ret)
+	ret = ttm_bo_evict(bo, interruptible, no_wait);
+	ttm_bo_unreserve(bo);
+
+	kref_put(&bo->list_kref, ttm_bo_release_list);
+	return ret;
+}
+
+static int ttm_bo_man_get_node(struct ttm_buffer_object *bo,
+				struct ttm_mem_type_manager *man,
+				struct ttm_placement *placement,
+				struct ttm_mem_reg *mem,
+				struct drm_mm_node **node)
+{
+	struct ttm_bo_global *glob = bo->glob;
+	unsigned long lpfn;
+	int ret;
+
+	lpfn = placement->lpfn;
+	if (!lpfn)
+		lpfn = man->size;
+	*node = NULL;
+	do {
+		ret = drm_mm_pre_get(&man->manager);
+		if (unlikely(ret))
 			return ret;
 
 		spin_lock(&glob->lru_lock);
-	} while (1);
-
-	if (!node) {
+		*node = drm_mm_search_free_in_range(&man->manager,
+					mem->num_pages, mem->page_alignment,
+					placement->fpfn, lpfn, 1);
+		if (unlikely(*node == NULL)) {
+			spin_unlock(&glob->lru_lock);
+			return 0;
+		}
+		*node = drm_mm_get_block_atomic_range(*node, mem->num_pages,
+							mem->page_alignment,
+							placement->fpfn,
+							lpfn);
 		spin_unlock(&glob->lru_lock);
-		return -ENOMEM;
-	}
+	} while (*node == NULL);
+	return 0;
+}
 
-	node = drm_mm_get_block_atomic(node, num_pages, mem->page_alignment);
-	if (unlikely(!node)) {
-		spin_unlock(&glob->lru_lock);
-		goto retry_pre_get;
-	}
+/**
+ * Repeatedly evict memory from the LRU for @mem_type until we create enough
+ * space, or we've evicted everything and there isn't enough space.
+ */
+static int ttm_bo_mem_force_space(struct ttm_buffer_object *bo,
+					uint32_t mem_type,
+					struct ttm_placement *placement,
+					struct ttm_mem_reg *mem,
+					bool interruptible, bool no_wait)
+{
+	struct ttm_bo_device *bdev = bo->bdev;
+	struct ttm_bo_global *glob = bdev->glob;
+	struct ttm_mem_type_manager *man = &bdev->man[mem_type];
+	struct drm_mm_node *node;
+	int ret;
 
-	spin_unlock(&glob->lru_lock);
+	do {
+		ret = ttm_bo_man_get_node(bo, man, placement, mem, &node);
+		if (unlikely(ret != 0))
+			return ret;
+		if (node)
+			break;
+		spin_lock(&glob->lru_lock);
+		if (list_empty(&man->lru)) {
+			spin_unlock(&glob->lru_lock);
+			break;
+		}
+		spin_unlock(&glob->lru_lock);
+		ret = ttm_mem_evict_first(bdev, mem_type, interruptible,
+						no_wait);
+		if (unlikely(ret != 0))
+			return ret;
+	} while (1);
+	if (node == NULL)
+		return -ENOMEM;
 	mem->mm_node = node;
 	mem->mem_type = mem_type;
 	return 0;
@@ -724,7 +879,6 @@
 	return result;
 }
 
-
 static bool ttm_bo_mt_compatible(struct ttm_mem_type_manager *man,
 				 bool disallow_fixed,
 				 uint32_t mem_type,
@@ -757,66 +911,55 @@
  * space.
  */
 int ttm_bo_mem_space(struct ttm_buffer_object *bo,
-		     uint32_t proposed_placement,
-		     struct ttm_mem_reg *mem,
-		     bool interruptible, bool no_wait)
+			struct ttm_placement *placement,
+			struct ttm_mem_reg *mem,
+			bool interruptible, bool no_wait)
 {
 	struct ttm_bo_device *bdev = bo->bdev;
-	struct ttm_bo_global *glob = bo->glob;
 	struct ttm_mem_type_manager *man;
-
-	uint32_t num_prios = bdev->driver->num_mem_type_prio;
-	const uint32_t *prios = bdev->driver->mem_type_prio;
-	uint32_t i;
 	uint32_t mem_type = TTM_PL_SYSTEM;
 	uint32_t cur_flags = 0;
 	bool type_found = false;
 	bool type_ok = false;
-	bool has_eagain = false;
+	bool has_erestartsys = false;
 	struct drm_mm_node *node = NULL;
-	int ret;
+	int i, ret;
 
 	mem->mm_node = NULL;
-	for (i = 0; i < num_prios; ++i) {
-		mem_type = prios[i];
+	for (i = 0; i < placement->num_placement; ++i) {
+		ret = ttm_mem_type_from_flags(placement->placement[i],
+						&mem_type);
+		if (ret)
+			return ret;
 		man = &bdev->man[mem_type];
 
 		type_ok = ttm_bo_mt_compatible(man,
-					       bo->type == ttm_bo_type_user,
-					       mem_type, proposed_placement,
-					       &cur_flags);
+						bo->type == ttm_bo_type_user,
+						mem_type,
+						placement->placement[i],
+						&cur_flags);
 
 		if (!type_ok)
 			continue;
 
 		cur_flags = ttm_bo_select_caching(man, bo->mem.placement,
 						  cur_flags);
+		/*
+		 * Use the access and other non-mapping-related flag bits from
+		 * the memory placement flags to the current flags
+		 */
+		ttm_flag_masked(&cur_flags, placement->placement[i],
+				~TTM_PL_MASK_MEMTYPE);
 
 		if (mem_type == TTM_PL_SYSTEM)
 			break;
 
 		if (man->has_type && man->use_type) {
 			type_found = true;
-			do {
-				ret = drm_mm_pre_get(&man->manager);
-				if (unlikely(ret))
-					return ret;
-
-				spin_lock(&glob->lru_lock);
-				node = drm_mm_search_free(&man->manager,
-							  mem->num_pages,
-							  mem->page_alignment,
-							  1);
-				if (unlikely(!node)) {
-					spin_unlock(&glob->lru_lock);
-					break;
-				}
-				node = drm_mm_get_block_atomic(node,
-							       mem->num_pages,
-							       mem->
-							       page_alignment);
-				spin_unlock(&glob->lru_lock);
-			} while (!node);
+			ret = ttm_bo_man_get_node(bo, man, placement, mem,
+							&node);
+			if (unlikely(ret))
+				return ret;
 		}
 		if (node)
 			break;
@@ -826,67 +969,74 @@
 		mem->mm_node = node;
 		mem->mem_type = mem_type;
 		mem->placement = cur_flags;
+		if (node)
+			node->private = bo;
 		return 0;
 	}
 
 	if (!type_found)
 		return -EINVAL;
 
-	num_prios = bdev->driver->num_mem_busy_prio;
-	prios = bdev->driver->mem_busy_prio;
-
-	for (i = 0; i < num_prios; ++i) {
-		mem_type = prios[i];
+	for (i = 0; i < placement->num_busy_placement; ++i) {
+		ret = ttm_mem_type_from_flags(placement->busy_placement[i],
+						&mem_type);
+		if (ret)
+			return ret;
 		man = &bdev->man[mem_type];
-
 		if (!man->has_type)
 			continue;
-
 		if (!ttm_bo_mt_compatible(man,
-					  bo->type == ttm_bo_type_user,
-					  mem_type,
-					  proposed_placement, &cur_flags))
+						bo->type == ttm_bo_type_user,
+						mem_type,
+						placement->busy_placement[i],
+						&cur_flags))
 			continue;
 
 		cur_flags = ttm_bo_select_caching(man, bo->mem.placement,
 						  cur_flags);
+		/*
+		 * Use the access and other non-mapping-related flag bits from
+		 * the memory placement flags to the current flags
+		 */
+		ttm_flag_masked(&cur_flags, placement->busy_placement[i],
+				~TTM_PL_MASK_MEMTYPE);
 
-		ret = ttm_bo_mem_force_space(bdev, mem, mem_type,
-					     interruptible, no_wait);
 
-		if (ret == 0 && mem->mm_node) {
+		if (mem_type == TTM_PL_SYSTEM) {
+			mem->mem_type = mem_type;
 			mem->placement = cur_flags;
+			mem->mm_node = NULL;
 			return 0;
 		}
 
-		if (ret == -ERESTART)
-			has_eagain = true;
+		ret = ttm_bo_mem_force_space(bo, mem_type, placement, mem,
+						interruptible, no_wait);
+		if (ret == 0 && mem->mm_node) {
+			mem->placement = cur_flags;
+			mem->mm_node->private = bo;
+			return 0;
+		}
+		if (ret == -ERESTARTSYS)
+			has_erestartsys = true;
 	}
-
-	ret = (has_eagain) ? -ERESTART : -ENOMEM;
+	ret = (has_erestartsys) ? -ERESTARTSYS : -ENOMEM;
 	return ret;
 }
 EXPORT_SYMBOL(ttm_bo_mem_space);
 
 int ttm_bo_wait_cpu(struct ttm_buffer_object *bo, bool no_wait)
 {
-	int ret = 0;
-
 	if ((atomic_read(&bo->cpu_writers) > 0) && no_wait)
 		return -EBUSY;
 
-	ret = wait_event_interruptible(bo->event_queue,
-				       atomic_read(&bo->cpu_writers) == 0);
-
-	if (ret == -ERESTARTSYS)
-		ret = -ERESTART;
-
-	return ret;
+	return wait_event_interruptible(bo->event_queue,
+					atomic_read(&bo->cpu_writers) == 0);
 }
+EXPORT_SYMBOL(ttm_bo_wait_cpu);
 
 int ttm_bo_move_buffer(struct ttm_buffer_object *bo,
-		       uint32_t proposed_placement,
-		       bool interruptible, bool no_wait)
+			struct ttm_placement *placement,
+			bool interruptible, bool no_wait)
 {
 	struct ttm_bo_global *glob = bo->glob;
 	int ret = 0;
@@ -899,147 +1049,138 @@
 	 * Have the driver move function wait for idle when necessary,
 	 * instead of doing it here.
 	 */
-
 	spin_lock(&bo->lock);
 	ret = ttm_bo_wait(bo, false, interruptible, no_wait);
 	spin_unlock(&bo->lock);
-
 	if (ret)
 		return ret;
-
 	mem.num_pages = bo->num_pages;
 	mem.size = mem.num_pages << PAGE_SHIFT;
 	mem.page_alignment = bo->mem.page_alignment;
-
 	/*
 	 * Determine where to move the buffer.
 	 */
-
-	ret = ttm_bo_mem_space(bo, proposed_placement, &mem,
-			       interruptible, no_wait);
+	ret = ttm_bo_mem_space(bo, placement, &mem, interruptible, no_wait);
 	if (ret)
 		goto out_unlock;
-
 	ret = ttm_bo_handle_move_mem(bo, &mem, false, interruptible, no_wait);
-
 out_unlock:
 	if (ret && mem.mm_node) {
 		spin_lock(&glob->lru_lock);
+		mem.mm_node->private = NULL;
 		drm_mm_put_block(mem.mm_node);
 		spin_unlock(&glob->lru_lock);
 	}
 	return ret;
 }
 
-static int ttm_bo_mem_compat(uint32_t proposed_placement,
+static int ttm_bo_mem_compat(struct ttm_placement *placement,
 			     struct ttm_mem_reg *mem)
 {
-	if ((proposed_placement & mem->placement & TTM_PL_MASK_MEM) == 0)
-		return 0;
-	if ((proposed_placement & mem->placement & TTM_PL_MASK_CACHING) == 0)
-		return 0;
+	int i;
+	struct drm_mm_node *node = mem->mm_node;
 
-	return 1;
+	if (node && placement->lpfn != 0 &&
+	    (node->start < placement->fpfn ||
+	     node->start + node->size > placement->lpfn))
+		return -1;
+
+	for (i = 0; i < placement->num_placement; i++) {
+		if ((placement->placement[i] & mem->placement &
+			TTM_PL_MASK_CACHING) &&
+			(placement->placement[i] & mem->placement &
+			TTM_PL_MASK_MEM))
+			return i;
+	}
+	return -1;
 }
 
-int ttm_buffer_object_validate(struct ttm_buffer_object *bo,
-			       uint32_t proposed_placement,
-			       bool interruptible, bool no_wait)
+int ttm_bo_validate(struct ttm_buffer_object *bo,
+			struct ttm_placement *placement,
+			bool interruptible, bool no_wait)
 {
 	int ret;
 
 	BUG_ON(!atomic_read(&bo->reserved));
-	bo->proposed_placement = proposed_placement;
-
-	TTM_DEBUG("Proposed placement 0x%08lx, Old flags 0x%08lx\n",
-		  (unsigned long)proposed_placement,
-		  (unsigned long)bo->mem.placement);
-
+	/* Check that range is valid */
+	if (placement->lpfn || placement->fpfn)
+		if (placement->fpfn > placement->lpfn ||
+			(placement->lpfn - placement->fpfn) < bo->num_pages)
+			return -EINVAL;
 	/*
 	 * Check whether we need to move buffer.
 	 */
-
-	if (!ttm_bo_mem_compat(bo->proposed_placement, &bo->mem)) {
-		ret = ttm_bo_move_buffer(bo, bo->proposed_placement,
-					 interruptible, no_wait);
-		if (ret) {
-			if (ret != -ERESTART)
-				printk(KERN_ERR TTM_PFX
-				       "Failed moving buffer. "
-				       "Proposed placement 0x%08x\n",
-				       bo->proposed_placement);
-			if (ret == -ENOMEM)
-				printk(KERN_ERR TTM_PFX
-				       "Out of aperture space or "
-				       "DRM memory quota.\n");
+	ret = ttm_bo_mem_compat(placement, &bo->mem);
+	if (ret < 0) {
+		ret = ttm_bo_move_buffer(bo, placement, interruptible, no_wait);
+		if (ret)
 			return ret;
-		}
+	} else {
+		/*
+		 * Use the access and other non-mapping-related flag bits from
+		 * the compatible memory placement flags to the active flags
+		 */
+		ttm_flag_masked(&bo->mem.placement, placement->placement[ret],
+				~TTM_PL_MASK_MEMTYPE);
 	}
-
 	/*
 	 * We might need to add a TTM.
 	 */
-
 	if (bo->mem.mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) {
 		ret = ttm_bo_add_ttm(bo, true);
 		if (ret)
 			return ret;
 	}
-	/*
-	 * Validation has succeeded, move the access and other
-	 * non-mapping-related flag bits from the proposed flags to
-	 * the active flags
-	 */
-
-	ttm_flag_masked(&bo->mem.placement, bo->proposed_placement,
-			~TTM_PL_MASK_MEMTYPE);
-
 	return 0;
 }
-EXPORT_SYMBOL(ttm_buffer_object_validate);
+EXPORT_SYMBOL(ttm_bo_validate);
 
-int
-ttm_bo_check_placement(struct ttm_buffer_object *bo,
-		       uint32_t set_flags, uint32_t clr_flags)
+int ttm_bo_check_placement(struct ttm_buffer_object *bo,
+				struct ttm_placement *placement)
 {
-	uint32_t new_mask = set_flags | clr_flags;
-
-	if ((bo->type == ttm_bo_type_user) &&
-	    (clr_flags & TTM_PL_FLAG_CACHED)) {
-		printk(KERN_ERR TTM_PFX
-		       "User buffers require cache-coherent memory.\n");
-		return -EINVAL;
-	}
+	int i;
 
-	if (!capable(CAP_SYS_ADMIN)) {
-		if (new_mask & TTM_PL_FLAG_NO_EVICT) {
-			printk(KERN_ERR TTM_PFX "Need to be root to modify"
-			       " NO_EVICT status.\n");
+	if (placement->fpfn || placement->lpfn) {
+		if (bo->mem.num_pages > (placement->lpfn - placement->fpfn)) {
+			printk(KERN_ERR TTM_PFX "Page number range to small "
+				"Need %lu pages, range is [%u, %u]\n",
+				bo->mem.num_pages, placement->fpfn,
+				placement->lpfn);
 			return -EINVAL;
 		}
-
-		if ((clr_flags & bo->mem.placement & TTM_PL_MASK_MEMTYPE) &&
-		    (bo->mem.placement & TTM_PL_FLAG_NO_EVICT)) {
-			printk(KERN_ERR TTM_PFX
-			       "Incompatible memory specification"
-			       " for NO_EVICT buffer.\n");
-			return -EINVAL;
+	}
+	for (i = 0; i < placement->num_placement; i++) {
+		if (!capable(CAP_SYS_ADMIN)) {
+			if (placement->placement[i] & TTM_PL_FLAG_NO_EVICT) {
+				printk(KERN_ERR TTM_PFX "Need to be root to "
+					"modify NO_EVICT status.\n");
+				return -EINVAL;
+			}
+		}
+	}
+	for (i = 0; i < placement->num_busy_placement; i++) {
+		if (!capable(CAP_SYS_ADMIN)) {
+			if (placement->busy_placement[i] & TTM_PL_FLAG_NO_EVICT) {
+				printk(KERN_ERR TTM_PFX "Need to be root to "
+					"modify NO_EVICT status.\n");
+				return -EINVAL;
+			}
 		}
 	}
 	return 0;
 }
 
-int ttm_buffer_object_init(struct ttm_bo_device *bdev,
-			   struct ttm_buffer_object *bo,
-			   unsigned long size,
-			   enum ttm_bo_type type,
-			   uint32_t flags,
-			   uint32_t page_alignment,
-			   unsigned long buffer_start,
-			   bool interruptible,
-			   struct file *persistant_swap_storage,
-			   size_t acc_size,
-			   void (*destroy) (struct ttm_buffer_object *))
+int ttm_bo_init(struct ttm_bo_device *bdev,
+		struct ttm_buffer_object *bo,
+		unsigned long size,
+		enum ttm_bo_type type,
+		struct ttm_placement *placement,
+		uint32_t page_alignment,
+		unsigned long buffer_start,
+		bool interruptible,
+		struct file *persistant_swap_storage,
+		size_t acc_size,
+		void (*destroy) (struct ttm_buffer_object *))
 {
 	int ret = 0;
 	unsigned long num_pages;
@@ -1065,6 +1206,7 @@
 	bo->glob = bdev->glob;
 	bo->type = type;
 	bo->num_pages = num_pages;
+	bo->mem.size = num_pages << PAGE_SHIFT;
 	bo->mem.mem_type = TTM_PL_SYSTEM;
 	bo->mem.num_pages = bo->num_pages;
 	bo->mem.mm_node = NULL;
@@ -1077,29 +1219,21 @@
 	bo->acc_size = acc_size;
 	atomic_inc(&bo->glob->bo_count);
 
-	ret = ttm_bo_check_placement(bo, flags, 0ULL);
+	ret = ttm_bo_check_placement(bo, placement);
 	if (unlikely(ret != 0))
 		goto out_err;
 
 	/*
-	 * If no caching attributes are set, accept any form of caching.
-	 */
-
-	if ((flags & TTM_PL_MASK_CACHING) == 0)
-		flags |= TTM_PL_MASK_CACHING;
-
-	/*
 	 * For ttm_bo_type_device buffers, allocate
 	 * address space from the device.
 	 */
-
 	if (bo->type == ttm_bo_type_device) {
 		ret = ttm_bo_setup_vm(bo);
 		if (ret)
 			goto out_err;
 	}
 
-	ret = ttm_buffer_object_validate(bo, flags, interruptible, false);
+	ret = ttm_bo_validate(bo, placement, interruptible, false);
 	if (ret)
 		goto out_err;
 
@@ -1112,7 +1246,7 @@
 
 	return ret;
 }
-EXPORT_SYMBOL(ttm_buffer_object_init);
+EXPORT_SYMBOL(ttm_bo_init);
 
 static inline size_t ttm_bo_size(struct ttm_bo_global *glob,
 				 unsigned long num_pages)
@@ -1123,19 +1257,19 @@
 	return glob->ttm_bo_size + 2 * page_array_size;
 }
 
-int ttm_buffer_object_create(struct ttm_bo_device *bdev,
-			     unsigned long size,
-			     enum ttm_bo_type type,
-			     uint32_t flags,
-			     uint32_t page_alignment,
-			     unsigned long buffer_start,
-			     bool interruptible,
-			     struct file *persistant_swap_storage,
-			     struct ttm_buffer_object **p_bo)
+int ttm_bo_create(struct ttm_bo_device *bdev,
+			unsigned long size,
+			enum ttm_bo_type type,
+			struct ttm_placement *placement,
+			uint32_t page_alignment,
+			unsigned long buffer_start,
+			bool interruptible,
+			struct file *persistant_swap_storage,
+			struct ttm_buffer_object **p_bo)
 {
 	struct ttm_buffer_object *bo;
-	int ret;
 	struct ttm_mem_global *mem_glob = bdev->glob->mem_glob;
+	int ret;
 
 	size_t acc_size =
 	    ttm_bo_size(bdev->glob, (size + PAGE_SIZE - 1) >> PAGE_SHIFT);
@@ -1150,76 +1284,41 @@
 		return -ENOMEM;
 	}
 
-	ret = ttm_buffer_object_init(bdev, bo, size, type, flags,
-				     page_alignment, buffer_start,
-				     interruptible,
-				     persistant_swap_storage, acc_size, NULL);
+	ret = ttm_bo_init(bdev, bo, size, type, placement, page_alignment,
+				buffer_start, interruptible,
+				persistant_swap_storage, acc_size, NULL);
 	if (likely(ret == 0))
 		*p_bo = bo;
 
 	return ret;
 }
 
-static int ttm_bo_leave_list(struct ttm_buffer_object *bo,
-			     uint32_t mem_type, bool allow_errors)
-{
-	int ret;
-
-	spin_lock(&bo->lock);
-	ret = ttm_bo_wait(bo, false, false, false);
-	spin_unlock(&bo->lock);
-
-	if (ret && allow_errors)
-		goto out;
-
-	if (bo->mem.mem_type == mem_type)
-		ret = ttm_bo_evict(bo, mem_type, false, false);
-
-	if (ret) {
-		if (allow_errors) {
-			goto out;
-		} else {
-			ret = 0;
-			printk(KERN_ERR TTM_PFX "Cleanup eviction failed\n");
-		}
-	}
-
-out:
-	return ret;
-}
-
 static int ttm_bo_force_list_clean(struct ttm_bo_device *bdev,
-				   struct list_head *head,
-				   unsigned mem_type, bool allow_errors)
+					unsigned mem_type, bool allow_errors)
 {
+	struct ttm_mem_type_manager *man = &bdev->man[mem_type];
 	struct ttm_bo_global *glob = bdev->glob;
-	struct ttm_buffer_object *entry;
 	int ret;
-	int put_count;
 
 	/*
 	 * Can't use standard list traversal since we're unlocking.
 	 */
 
 	spin_lock(&glob->lru_lock);
-
-	while (!list_empty(head)) {
-		entry = list_first_entry(head, struct ttm_buffer_object, lru);
-		kref_get(&entry->list_kref);
-		ret = ttm_bo_reserve_locked(entry, false, false, false, 0);
-		put_count = ttm_bo_del_from_lru(entry);
+	while (!list_empty(&man->lru)) {
 		spin_unlock(&glob->lru_lock);
-		while (put_count--)
-			kref_put(&entry->list_kref, ttm_bo_ref_bug);
-		BUG_ON(ret);
-		ret = ttm_bo_leave_list(entry, mem_type, allow_errors);
-		ttm_bo_unreserve(entry);
-		kref_put(&entry->list_kref, ttm_bo_release_list);
+		ret = ttm_mem_evict_first(bdev, mem_type, false, false);
+		if (ret) {
+			if (allow_errors) {
+				return ret;
+			} else {
+				printk(KERN_ERR TTM_PFX
+					"Cleanup eviction failed\n");
+			}
+		}
 		spin_lock(&glob->lru_lock);
 	}
-
 	spin_unlock(&glob->lru_lock);
-
 	return 0;
 }
 
@@ -1246,7 +1345,7 @@
 
 	ret = 0;
 	if (mem_type > 0) {
-		ttm_bo_force_list_clean(bdev, &man->lru, mem_type, false);
+		ttm_bo_force_list_clean(bdev, mem_type, false);
 
 		spin_lock(&glob->lru_lock);
 		if (drm_mm_clean(&man->manager))
@@ -1279,12 +1378,12 @@
 		return 0;
 	}
 
-	return ttm_bo_force_list_clean(bdev, &man->lru, mem_type, true);
+	return ttm_bo_force_list_clean(bdev, mem_type, true);
 }
 EXPORT_SYMBOL(ttm_bo_evict_mm);
 
 int ttm_bo_init_mm(struct ttm_bo_device *bdev, unsigned type,
-		   unsigned long p_offset, unsigned long p_size)
+			unsigned long p_size)
 {
 	int ret = -EINVAL;
 	struct ttm_mem_type_manager *man;
@@ -1314,7 +1413,7 @@
 			       type);
 			return ret;
 		}
-		ret = drm_mm_init(&man->manager, p_offset, p_size);
+		ret = drm_mm_init(&man->manager, 0, p_size);
 		if (ret)
 			return ret;
 	}
@@ -1463,7 +1562,7 @@
 	 * Initialize the system memory buffer type.
 	 * Other types need to be driver / IOCTL initialized.
 	 */
-	ret = ttm_bo_init_mm(bdev, TTM_PL_SYSTEM, 0, 0);
+	ret = ttm_bo_init_mm(bdev, TTM_PL_SYSTEM, 0);
 	if (unlikely(ret != 0))
 		goto out_no_sys;
 
@@ -1693,7 +1792,7 @@
 			ret = wait_event_interruptible
 			    (bo->event_queue, atomic_read(&bo->reserved) == 0);
 			if (unlikely(ret != 0))
-				return -ERESTART;
+				return ret;
 		} else {
 			wait_event(bo->event_queue,
 				   atomic_read(&bo->reserved) == 0);
@@ -1722,12 +1821,14 @@
 	ttm_bo_unreserve(bo);
 	return ret;
 }
+EXPORT_SYMBOL(ttm_bo_synccpu_write_grab);
 
 void ttm_bo_synccpu_write_release(struct ttm_buffer_object *bo)
 {
 	if (atomic_dec_and_test(&bo->cpu_writers))
 		wake_up_all(&bo->event_queue);
 }
+EXPORT_SYMBOL(ttm_bo_synccpu_write_release);
 
 /**
  * A buffer object shrink method that tries to swap out the first
@@ -1808,6 +1909,9 @@
 	 * anyone tries to access a ttm page.
 	 */
 
+	if (bo->bdev->driver->swap_notify)
+		bo->bdev->driver->swap_notify(bo);
+
 	ret = ttm_tt_swapout(bo->ttm, bo->persistant_swap_storage);
 out:
 
@@ -1828,3 +1932,4 @@
 	while (ttm_bo_swapout(&bdev->glob->shrink) == 0)
 		;
 }
+EXPORT_SYMBOL(ttm_bo_swapout_all);
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/mga/mga_drv.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/mga/mga_drv.c
@@ -68,7 +68,7 @@
 		.owner = THIS_MODULE,
 		.open = drm_open,
 		.release = drm_release,
-		.ioctl = drm_ioctl,
+		.unlocked_ioctl = drm_ioctl,
 		.mmap = drm_mmap,
 		.poll = drm_poll,
 		.fasync = drm_fasync,
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/mga/mga_ioc32.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/mga/mga_ioc32.c
@@ -100,8 +100,7 @@
 	if (err)
 		return -EFAULT;
 
-	return drm_ioctl(file->f_path.dentry->d_inode, file,
-			 DRM_IOCTL_MGA_INIT, (unsigned long)init);
+	return drm_ioctl(file, DRM_IOCTL_MGA_INIT, (unsigned long)init);
 }
 
 typedef struct drm_mga_getparam32 {
@@ -125,8 +124,7 @@
 			  &getparam->value))
 		return -EFAULT;
 
-	return drm_ioctl(file->f_path.dentry->d_inode, file,
-			 DRM_IOCTL_MGA_GETPARAM, (unsigned long)getparam);
+	return drm_ioctl(file, DRM_IOCTL_MGA_GETPARAM, (unsigned long)getparam);
 }
 
 typedef struct drm_mga_drm_bootstrap32 {
@@ -166,8 +164,7 @@
 	    || __put_user(dma_bootstrap32.agp_size, &dma_bootstrap->agp_size))
 		return -EFAULT;
 
-	err = drm_ioctl(file->f_path.dentry->d_inode, file,
-			DRM_IOCTL_MGA_DMA_BOOTSTRAP,
+	err = drm_ioctl(file, DRM_IOCTL_MGA_DMA_BOOTSTRAP,
 			(unsigned long)dma_bootstrap);
 	if (err)
 		return err;
@@ -220,12 +217,10 @@
 	if (nr < DRM_COMMAND_BASE + DRM_ARRAY_SIZE(mga_compat_ioctls))
 		fn = mga_compat_ioctls[nr - DRM_COMMAND_BASE];
 
-	lock_kernel();		/* XXX for now */
 	if (fn != NULL)
 		ret = (*fn) (filp, cmd, arg);
 	else
-		ret = drm_ioctl(filp->f_path.dentry->d_inode, filp, cmd, arg);
-	unlock_kernel();
+		ret = drm_ioctl(filp, cmd, arg);
 
 	return ret;
 }
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i830/i830_drv.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i830/i830_drv.c
@@ -70,7 +70,7 @@
 		 .owner = THIS_MODULE,
 		 .open = drm_open,
 		 .release = drm_release,
-		 .ioctl = drm_ioctl,
+		 .unlocked_ioctl = drm_ioctl,
 		 .mmap = drm_mmap,
 		 .poll = drm_poll,
 		 .fasync = drm_fasync,
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i830/i830_dma.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i830/i830_dma.c
@@ -117,7 +117,7 @@
 static const struct file_operations i830_buffer_fops = {
 	.open = drm_open,
 	.release = drm_release,
-	.ioctl = drm_ioctl,
+	.unlocked_ioctl = drm_ioctl,
 	.mmap = i830_mmap_buffers,
 	.fasync = drm_fasync,
 };
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i2c/ch7006_mode.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i2c/ch7006_mode.c
@@ -0,0 +1,468 @@
+/*
+ * Copyright (C) 2009 Francisco Jerez.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include "ch7006_priv.h"
+
+char *ch7006_tv_norm_names[] = {
+	[TV_NORM_PAL] = "PAL",
+	[TV_NORM_PAL_M] = "PAL-M",
+	[TV_NORM_PAL_N] = "PAL-N",
+	[TV_NORM_PAL_NC] = "PAL-Nc",
+	[TV_NORM_PAL_60] = "PAL-60",
+	[TV_NORM_NTSC_M] = "NTSC-M",
+	[TV_NORM_NTSC_J] = "NTSC-J",
+};
+
+#define NTSC_LIKE_TIMINGS .vrefresh = 60 * fixed1/1.001,		\
+		.vdisplay = 480,					\
+		.vtotal = 525,						\
+		.hvirtual = 660
+
+#define PAL_LIKE_TIMINGS .vrefresh = 50 * fixed1,		\
+		.vdisplay = 576,				\
+		.vtotal = 625,					\
+		.hvirtual = 810
+
+struct ch7006_tv_norm_info ch7006_tv_norms[] = {
+	[TV_NORM_NTSC_M] = {
+		NTSC_LIKE_TIMINGS,
+		.black_level = 0.339 * fixed1,
+		.subc_freq = 3579545 * fixed1,
+		.dispmode = bitfs(CH7006_DISPMODE_OUTPUT_STD, NTSC),
+		.voffset = 0,
+	},
+	[TV_NORM_NTSC_J] = {
+		NTSC_LIKE_TIMINGS,
+		.black_level = 0.286 * fixed1,
+		.subc_freq = 3579545 * fixed1,
+		.dispmode = bitfs(CH7006_DISPMODE_OUTPUT_STD, NTSC_J),
+		.voffset = 0,
+	},
+	[TV_NORM_PAL] = {
+		PAL_LIKE_TIMINGS,
+		.black_level = 0.3 * fixed1,
+		.subc_freq = 4433618.75 * fixed1,
+		.dispmode = bitfs(CH7006_DISPMODE_OUTPUT_STD, PAL),
+		.voffset = 0,
+	},
+	[TV_NORM_PAL_M] = {
+		NTSC_LIKE_TIMINGS,
+		.black_level = 0.339 * fixed1,
+		.subc_freq = 3575611.433 * fixed1,
+		.dispmode = bitfs(CH7006_DISPMODE_OUTPUT_STD, PAL_M),
+		.voffset = 16,
+	},
+
+	/* The following modes seem to work right but they're
+	 * undocumented */
+
+	[TV_NORM_PAL_N] = {
+		PAL_LIKE_TIMINGS,
+		.black_level = 0.339 * fixed1,
+		.subc_freq = 4433618.75 * fixed1,
+		.dispmode = bitfs(CH7006_DISPMODE_OUTPUT_STD, PAL),
+		.voffset = 0,
+	},
+	[TV_NORM_PAL_NC] = {
+		PAL_LIKE_TIMINGS,
+		.black_level = 0.3 * fixed1,
+		.subc_freq = 3582056.25 * fixed1,
+		.dispmode = bitfs(CH7006_DISPMODE_OUTPUT_STD, PAL),
+		.voffset = 0,
+	},
+	[TV_NORM_PAL_60] = {
+		NTSC_LIKE_TIMINGS,
+		.black_level = 0.3 * fixed1,
+		.subc_freq = 4433618.75 * fixed1,
+		.dispmode = bitfs(CH7006_DISPMODE_OUTPUT_STD, PAL_M),
+		.voffset = 16,
+	},
+};
+
+#define __MODE(f, hd, vd, ht, vt, hsynp, vsynp,				\
+	       subc, scale, scale_mask, norm_mask, e_hd, e_vd) {	\
+		.mode = {						\
+			.name = #hd "x" #vd,				\
+			.status = 0,					\
+			.type = DRM_MODE_TYPE_DRIVER,			\
+			.clock = f,					\
+			.hdisplay = hd,					\
+			.hsync_start = e_hd + 16,			\
+			.hsync_end = e_hd + 80,				\
+			.htotal = ht,					\
+			.hskew = 0,					\
+			.vdisplay = vd,					\
+			.vsync_start = vd + 10,				\
+			.vsync_end = vd + 26,				\
+			.vtotal = vt,					\
+			.vscan = 0,					\
+			.flags = DRM_MODE_FLAG_##hsynp##HSYNC |		\
+				DRM_MODE_FLAG_##vsynp##VSYNC,		\
+			.vrefresh = 0,					\
+		},							\
+		.enc_hdisp = e_hd,					\
+		.enc_vdisp = e_vd,					\
+		.subc_coeff = subc * fixed1,				\
+		.dispmode = bitfs(CH7006_DISPMODE_SCALING_RATIO, scale) | \
+			    bitfs(CH7006_DISPMODE_INPUT_RES, e_hd##x##e_vd), \
+		.valid_scales = scale_mask,				\
+		.valid_norms = norm_mask				\
+	 }
+
+#define MODE(f, hd, vd, ht, vt, hsynp, vsynp,				\
+	     subc, scale, scale_mask, norm_mask)			\
+	__MODE(f, hd, vd, ht, vt, hsynp, vsynp, subc, scale,		\
+	       scale_mask, norm_mask, hd, vd)
+
+#define NTSC_LIKE (1 << TV_NORM_NTSC_M | 1 << TV_NORM_NTSC_J |		\
+		   1 << TV_NORM_PAL_M | 1 << TV_NORM_PAL_60)
+
+#define PAL_LIKE (1 << TV_NORM_PAL | 1 << TV_NORM_PAL_N | 1 << TV_NORM_PAL_NC)
+
+struct ch7006_mode ch7006_modes[] = {
+	MODE(21000, 512, 384, 840, 500, N, N, 181.797557582, 5_4, 0x6, PAL_LIKE),
+	MODE(26250, 512, 384, 840, 625, N, N, 145.438046066, 1_1, 0x1, PAL_LIKE),
+	MODE(20140, 512, 384, 800, 420, N, N, 213.257083791, 5_4, 0x4, NTSC_LIKE),
+	MODE(24671, 512, 384, 784, 525, N, N, 174.0874153, 1_1, 0x3, NTSC_LIKE),
+	MODE(28125, 720, 400, 1125, 500, N, N, 135.742176298, 5_4, 0x6, PAL_LIKE),
+	MODE(34875, 720, 400, 1116, 625, N, N, 109.469496898, 1_1, 0x1, PAL_LIKE),
+	MODE(23790, 720, 400, 945, 420, N, N, 160.475642016, 5_4, 0x4, NTSC_LIKE),
+	MODE(29455, 720, 400, 936, 525, N, N, 129.614941843, 1_1, 0x3, NTSC_LIKE),
+	MODE(25000, 640, 400, 1000, 500, N, N, 152.709948279, 5_4, 0x6, PAL_LIKE),
+	MODE(31500, 640, 400, 1008, 625, N, N, 121.198371646, 1_1, 0x1, PAL_LIKE),
+	MODE(21147, 640, 400, 840, 420, N, N, 180.535097338, 5_4, 0x4, NTSC_LIKE),
+	MODE(26434, 640, 400, 840, 525, N, N, 144.42807787, 1_1, 0x2, NTSC_LIKE),
+	MODE(30210, 640, 400, 840, 600, N, N, 126.374568276, 7_8, 0x1, NTSC_LIKE),
+	MODE(21000, 640, 480, 840, 500, N, N, 181.797557582, 5_4, 0x4, PAL_LIKE),
+	MODE(26250, 640, 480, 840, 625, N, N, 145.438046066, 1_1, 0x2, PAL_LIKE),
+	MODE(31500, 640, 480, 840, 750, N, N, 121.198371646, 5_6, 0x1, PAL_LIKE),
+	MODE(24671, 640, 480, 784, 525, N, N, 174.0874153, 1_1, 0x4, NTSC_LIKE),
+	MODE(28196, 640, 480, 784, 600, N, N, 152.326488422, 7_8, 0x2, NTSC_LIKE),
+	MODE(30210, 640, 480, 800, 630, N, N, 142.171389101, 5_6, 0x1, NTSC_LIKE),
+	__MODE(29500, 720, 576, 944, 625, P, P, 145.592111636, 1_1, 0x7, PAL_LIKE, 800, 600),
+	MODE(36000, 800, 600, 960, 750, P, P, 119.304647022, 5_6, 0x6, PAL_LIKE),
+	MODE(39000, 800, 600, 936, 836, P, P, 110.127366499, 3_4, 0x1, PAL_LIKE),
+	MODE(39273, 800, 600, 1040, 630, P, P, 145.816809399, 5_6, 0x4, NTSC_LIKE),
+	MODE(43636, 800, 600, 1040, 700, P, P, 131.235128487, 3_4, 0x2, NTSC_LIKE),
+	MODE(47832, 800, 600, 1064, 750, P, P, 119.723275165, 7_10, 0x1, NTSC_LIKE),
+	{}
+};
+
+struct ch7006_mode *ch7006_lookup_mode(struct drm_encoder *encoder,
+				       struct drm_display_mode *drm_mode)
+{
+	struct ch7006_priv *priv = to_ch7006_priv(encoder);
+	struct ch7006_mode *mode;
+
+	for (mode = ch7006_modes; mode->mode.clock; mode++) {
+
+		if (~mode->valid_norms & 1<<priv->norm)
+			continue;
+
+		if (mode->mode.hdisplay != drm_mode->hdisplay ||
+		    mode->mode.vdisplay != drm_mode->vdisplay ||
+		    mode->mode.vtotal != drm_mode->vtotal ||
+		    mode->mode.htotal != drm_mode->htotal ||
+		    mode->mode.clock != drm_mode->clock)
+			continue;
+
+		return mode;
+	}
+
+	return NULL;
+}
+
+/* Some common HW state calculation code */
+
+void ch7006_setup_levels(struct drm_encoder *encoder)
+{
+	struct i2c_client *client = drm_i2c_encoder_get_client(encoder);
+	struct ch7006_priv *priv = to_ch7006_priv(encoder);
+	uint8_t *regs = priv->state.regs;
+	struct ch7006_tv_norm_info *norm = &ch7006_tv_norms[priv->norm];
+	int gain;
+	int black_level;
+
+	/* Set DAC_GAIN if the voltage drop between white and black is
+	 * high enough. */
+	if (norm->black_level < 339*fixed1/1000) {
+		gain = 76;
+
+		regs[CH7006_INPUT_FORMAT] |= CH7006_INPUT_FORMAT_DAC_GAIN;
+	} else {
+		gain = 71;
+
+		regs[CH7006_INPUT_FORMAT] &= ~CH7006_INPUT_FORMAT_DAC_GAIN;
+	}
+
+	black_level = round_fixed(norm->black_level*26625)/gain;
+
+	/* Correct it with the specified brightness. */
+	black_level = interpolate(90, black_level, 208, priv->brightness);
+
+	regs[CH7006_BLACK_LEVEL] = bitf(CH7006_BLACK_LEVEL_0, black_level);
+
+	ch7006_dbg(client, "black level: %d\n", black_level);
+}
+
+void ch7006_setup_subcarrier(struct drm_encoder *encoder)
+{
+	struct i2c_client *client = drm_i2c_encoder_get_client(encoder);
+	struct ch7006_priv *priv = to_ch7006_priv(encoder);
+	struct ch7006_state *state = &priv->state;
+	struct ch7006_tv_norm_info *norm = &ch7006_tv_norms[priv->norm];
+	struct ch7006_mode *mode = priv->mode;
+	uint32_t subc_inc;
+
+	subc_inc = round_fixed((mode->subc_coeff >> 8)
+			       * (norm->subc_freq >> 24));
+
+	setbitf(state, CH7006_SUBC_INC0, 28, subc_inc);
+	setbitf(state, CH7006_SUBC_INC1, 24, subc_inc);
+	setbitf(state, CH7006_SUBC_INC2, 20, subc_inc);
+	setbitf(state, CH7006_SUBC_INC3, 16, subc_inc);
+	setbitf(state, CH7006_SUBC_INC4, 12, subc_inc);
+	setbitf(state, CH7006_SUBC_INC5, 8, subc_inc);
+	setbitf(state, CH7006_SUBC_INC6, 4, subc_inc);
+	setbitf(state, CH7006_SUBC_INC7, 0, subc_inc);
+
+	ch7006_dbg(client, "subcarrier inc: %u\n", subc_inc);
+}
+
+void ch7006_setup_pll(struct drm_encoder *encoder)
+{
+	struct i2c_client *client = drm_i2c_encoder_get_client(encoder);
+	struct ch7006_priv *priv = to_ch7006_priv(encoder);
+	uint8_t *regs = priv->state.regs;
+	struct ch7006_mode *mode = priv->mode;
+	int n, best_n = 0;
+	int m, best_m = 0;
+	int freq, best_freq = 0;
+
+	for (n = 0; n < CH7006_MAXN; n++) {
+		for (m = 0; m < CH7006_MAXM; m++) {
+			freq = CH7006_FREQ0*(n+2)/(m+2);
+
+			if (abs(freq - mode->mode.clock) <
+			    abs(best_freq - mode->mode.clock)) {
+				best_freq = freq;
+				best_n = n;
+				best_m = m;
+			}
+		}
+	}
+
+	regs[CH7006_PLLOV] = bitf(CH7006_PLLOV_N_8, best_n) |
+		bitf(CH7006_PLLOV_M_8, best_m);
+
+	regs[CH7006_PLLM] = bitf(CH7006_PLLM_0, best_m);
+	regs[CH7006_PLLN] = bitf(CH7006_PLLN_0, best_n);
+
+	if (best_n < 108)
+		regs[CH7006_PLL_CONTROL] |= CH7006_PLL_CONTROL_CAPACITOR;
+	else
+		regs[CH7006_PLL_CONTROL] &= ~CH7006_PLL_CONTROL_CAPACITOR;
+
+	ch7006_dbg(client, "n=%d m=%d f=%d c=%d\n",
+		   best_n, best_m, best_freq, best_n < 108);
+}
+
+void ch7006_setup_power_state(struct drm_encoder *encoder)
+{
+	struct ch7006_priv *priv = to_ch7006_priv(encoder);
+	uint8_t *power = &priv->state.regs[CH7006_POWER];
+	int subconnector;
+
+	subconnector = priv->select_subconnector ? priv->select_subconnector :
+							priv->subconnector;
+
+	*power = CH7006_POWER_RESET;
+
+	if (priv->last_dpms == DRM_MODE_DPMS_ON) {
+		switch (subconnector) {
+		case DRM_MODE_SUBCONNECTOR_SVIDEO:
+			*power |= bitfs(CH7006_POWER_LEVEL, CVBS_OFF);
+			break;
+		case DRM_MODE_SUBCONNECTOR_Composite:
+			*power |= bitfs(CH7006_POWER_LEVEL, SVIDEO_OFF);
+			break;
+		case DRM_MODE_SUBCONNECTOR_SCART:
+			*power |= bitfs(CH7006_POWER_LEVEL, NORMAL) |
+				CH7006_POWER_SCART;
+			break;
+		}
+
+	} else {
+		*power |= bitfs(CH7006_POWER_LEVEL, FULL_POWER_OFF);
+	}
+}
+
+void ch7006_setup_properties(struct drm_encoder *encoder)
+{
+	struct i2c_client *client = drm_i2c_encoder_get_client(encoder);
+	struct ch7006_priv *priv = to_ch7006_priv(encoder);
+	struct ch7006_state *state = &priv->state;
+	struct ch7006_tv_norm_info *norm = &ch7006_tv_norms[priv->norm];
+	struct ch7006_mode *ch_mode = priv->mode;
+	struct drm_display_mode *mode = &ch_mode->mode;
+	uint8_t *regs = state->regs;
+	int flicker, contrast, hpos, vpos;
+	uint64_t scale, aspect;
+
+	flicker = interpolate(0, 2, 3, priv->flicker);
+	regs[CH7006_FFILTER] = bitf(CH7006_FFILTER_TEXT, flicker) |
+		bitf(CH7006_FFILTER_LUMA, flicker) |
+		bitf(CH7006_FFILTER_CHROMA, 1);
+
+	contrast = interpolate(0, 5, 7, priv->contrast);
+	regs[CH7006_CONTRAST] = bitf(CH7006_CONTRAST_0, contrast);
+
+	scale = norm->vtotal*fixed1;
+	do_div(scale, mode->vtotal);
+
+	aspect = ch_mode->enc_hdisp*fixed1;
+	do_div(aspect, ch_mode->enc_vdisp);
+
+	hpos = round_fixed((norm->hvirtual * aspect - mode->hdisplay * scale)
+			   * priv->hmargin * mode->vtotal) / norm->vtotal / 100 / 4;
+
+	setbitf(state, CH7006_POV, HPOS_8, hpos);
+	setbitf(state, CH7006_HPOS, 0, hpos);
+
+	vpos = max(0, norm->vdisplay - round_fixed(mode->vdisplay*scale)
+		   + norm->voffset) * priv->vmargin / 100 / 2;
+
+	setbitf(state, CH7006_POV, VPOS_8, vpos);
+	setbitf(state, CH7006_VPOS, 0, vpos);
+
+	ch7006_dbg(client, "hpos: %d, vpos: %d\n", hpos, vpos);
+}
+
+/* HW access functions */
+
+void ch7006_write(struct i2c_client *client, uint8_t addr, uint8_t val)
+{
+	uint8_t buf[] = {addr, val};
+	int ret;
+
+	ret = i2c_master_send(client, buf, ARRAY_SIZE(buf));
+	if (ret < 0)
+		ch7006_err(client, "Error %d writing to subaddress 0x%x\n",
+			   ret, addr);
+}
+
+uint8_t ch7006_read(struct i2c_client *client, uint8_t addr)
+{
+	uint8_t val;
+	int ret;
+
+	ret = i2c_master_send(client, &addr, sizeof(addr));
+	if (ret < 0)
+		goto fail;
+
+	ret = i2c_master_recv(client, &val, sizeof(val));
+	if (ret < 0)
+		goto fail;
+
+	return val;
+
+fail:
+	ch7006_err(client, "Error %d reading from subaddress 0x%x\n",
+		   ret, addr);
+	return 0;
+}
+
+void ch7006_state_load(struct i2c_client *client,
+		       struct ch7006_state *state)
+{
+	ch7006_load_reg(client, state, CH7006_POWER);
+
+	ch7006_load_reg(client, state, CH7006_DISPMODE);
+	ch7006_load_reg(client, state, CH7006_FFILTER);
+	ch7006_load_reg(client, state, CH7006_BWIDTH);
+	ch7006_load_reg(client, state, CH7006_INPUT_FORMAT);
+	ch7006_load_reg(client, state, CH7006_CLKMODE);
+	ch7006_load_reg(client, state, CH7006_START_ACTIVE);
+	ch7006_load_reg(client, state, CH7006_POV);
+	ch7006_load_reg(client, state, CH7006_BLACK_LEVEL);
+	ch7006_load_reg(client, state, CH7006_HPOS);
+	ch7006_load_reg(client, state, CH7006_VPOS);
+	ch7006_load_reg(client, state, CH7006_INPUT_SYNC);
+	ch7006_load_reg(client, state, CH7006_DETECT);
+	ch7006_load_reg(client, state, CH7006_CONTRAST);
+	ch7006_load_reg(client, state, CH7006_PLLOV);
+	ch7006_load_reg(client, state, CH7006_PLLM);
+	ch7006_load_reg(client, state, CH7006_PLLN);
+	ch7006_load_reg(client, state, CH7006_BCLKOUT);
+	ch7006_load_reg(client, state, CH7006_SUBC_INC0);
+	ch7006_load_reg(client, state, CH7006_SUBC_INC1);
+	ch7006_load_reg(client, state, CH7006_SUBC_INC2);
+	ch7006_load_reg(client, state, CH7006_SUBC_INC3);
+	ch7006_load_reg(client, state, CH7006_SUBC_INC4);
+	ch7006_load_reg(client, state, CH7006_SUBC_INC5);
+	ch7006_load_reg(client, state, CH7006_SUBC_INC6);
+	ch7006_load_reg(client, state, CH7006_SUBC_INC7);
+	ch7006_load_reg(client, state, CH7006_PLL_CONTROL);
+	ch7006_load_reg(client, state, CH7006_CALC_SUBC_INC0);
+}
+
+void ch7006_state_save(struct i2c_client *client,
+		       struct ch7006_state *state)
+{
+	ch7006_save_reg(client, state, CH7006_POWER);
+
+	ch7006_save_reg(client, state, CH7006_DISPMODE);
+	ch7006_save_reg(client, state, CH7006_FFILTER);
+	ch7006_save_reg(client, state, CH7006_BWIDTH);
+	ch7006_save_reg(client, state, CH7006_INPUT_FORMAT);
+	ch7006_save_reg(client, state, CH7006_CLKMODE);
+	ch7006_save_reg(client, state, CH7006_START_ACTIVE);
+	ch7006_save_reg(client, state, CH7006_POV);
+	ch7006_save_reg(client, state, CH7006_BLACK_LEVEL);
+	ch7006_save_reg(client, state, CH7006_HPOS);
+	ch7006_save_reg(client, state, CH7006_VPOS);
+	ch7006_save_reg(client, state, CH7006_INPUT_SYNC);
+	ch7006_save_reg(client, state, CH7006_DETECT);
+	ch7006_save_reg(client, state, CH7006_CONTRAST);
+	ch7006_save_reg(client, state, CH7006_PLLOV);
+	ch7006_save_reg(client, state, CH7006_PLLM);
+	ch7006_save_reg(client, state, CH7006_PLLN);
+	ch7006_save_reg(client, state, CH7006_BCLKOUT);
+	ch7006_save_reg(client, state, CH7006_SUBC_INC0);
+	ch7006_save_reg(client, state, CH7006_SUBC_INC1);
+	ch7006_save_reg(client, state, CH7006_SUBC_INC2);
+	ch7006_save_reg(client, state, CH7006_SUBC_INC3);
+	ch7006_save_reg(client, state, CH7006_SUBC_INC4);
+	ch7006_save_reg(client, state, CH7006_SUBC_INC5);
+	ch7006_save_reg(client, state, CH7006_SUBC_INC6);
+	ch7006_save_reg(client, state, CH7006_SUBC_INC7);
+	ch7006_save_reg(client, state, CH7006_PLL_CONTROL);
+	ch7006_save_reg(client, state, CH7006_CALC_SUBC_INC0);
+
+	state->regs[CH7006_FFILTER] = (state->regs[CH7006_FFILTER] & 0xf0) |
+		(state->regs[CH7006_FFILTER] & 0x0c) >> 2 |
+		(state->regs[CH7006_FFILTER] & 0x03) << 2;
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i2c/Makefile
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i2c/Makefile
@@ -0,0 +1,4 @@
+ccflags-y := -Iinclude/drm
+
+ch7006-y := ch7006_drv.o ch7006_mode.o
+obj-$(CONFIG_DRM_I2C_CH7006) += ch7006.o
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i2c/ch7006_priv.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i2c/ch7006_priv.h
@@ -0,0 +1,344 @@
+/*
+ * Copyright (C) 2009 Francisco Jerez.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#ifndef __DRM_I2C_CH7006_PRIV_H__
+#define __DRM_I2C_CH7006_PRIV_H__
+
+#include "drmP.h"
+#include "drm_crtc_helper.h"
+#include "drm_encoder_slave.h"
+#include "i2c/ch7006.h"
+
+typedef int64_t fixed;
+#define fixed1 (1LL << 32)
+
+enum ch7006_tv_norm {
+	TV_NORM_PAL,
+	TV_NORM_PAL_M,
+	TV_NORM_PAL_N,
+	TV_NORM_PAL_NC,
+	TV_NORM_PAL_60,
+	TV_NORM_NTSC_M,
+	TV_NORM_NTSC_J,
+	NUM_TV_NORMS
+};
+
+struct ch7006_tv_norm_info {
+	fixed vrefresh;
+	int vdisplay;
+	int vtotal;
+	int hvirtual;
+
+	fixed subc_freq;
+	fixed black_level;
+
+	uint32_t dispmode;
+	int voffset;
+};
+
+struct ch7006_mode {
+	struct drm_display_mode mode;
+
+	int enc_hdisp;
+	int enc_vdisp;
+
+	fixed subc_coeff;
+	uint32_t dispmode;
+
+	uint32_t valid_scales;
+	uint32_t valid_norms;
+};
+
+struct ch7006_state {
+	uint8_t regs[0x26];
+};
+
+struct ch7006_priv {
+	struct ch7006_encoder_params *params;
+	struct ch7006_mode *mode;
+
+	struct ch7006_state state;
+	struct ch7006_state saved_state;
+
+	struct drm_property *scale_property;
+
+	int select_subconnector;
+	int subconnector;
+	int hmargin;
+	int vmargin;
+	enum ch7006_tv_norm norm;
+	int brightness;
+	int contrast;
+	int flicker;
+	int scale;
+
+	int last_dpms;
+};
+
+#define to_ch7006_priv(x) \
+	((struct ch7006_priv *)to_encoder_slave(x)->slave_priv)
+
+extern int ch7006_debug;
+extern char *ch7006_tv_norm;
+extern int ch7006_scale;
+
+extern char *ch7006_tv_norm_names[];
+extern struct ch7006_tv_norm_info ch7006_tv_norms[];
+extern struct ch7006_mode ch7006_modes[];
+
+struct ch7006_mode *ch7006_lookup_mode(struct drm_encoder *encoder,
+				       struct drm_display_mode *drm_mode);
+
+void ch7006_setup_levels(struct drm_encoder *encoder);
+void ch7006_setup_subcarrier(struct drm_encoder *encoder);
+void ch7006_setup_pll(struct drm_encoder *encoder);
+void ch7006_setup_power_state(struct drm_encoder *encoder);
+void ch7006_setup_properties(struct drm_encoder *encoder);
+
+void ch7006_write(struct i2c_client *client, uint8_t addr, uint8_t val);
+uint8_t ch7006_read(struct i2c_client *client, uint8_t addr);
+
+void ch7006_state_load(struct i2c_client *client,
+		       struct ch7006_state *state);
+void ch7006_state_save(struct i2c_client *client,
+		       struct ch7006_state *state);
+
+/* Some helper macros */
+
+#define ch7006_dbg(client, format, ...) do {				\
+		if (ch7006_debug)					\
+			dev_printk(KERN_DEBUG, &client->dev,		\
+				   "%s: " format, __func__, ## __VA_ARGS__); \
+	} while (0)
+#define ch7006_info(client, format, ...) \
+				dev_info(&client->dev, format, __VA_ARGS__)
+#define ch7006_err(client, format, ...) \
+				dev_err(&client->dev, format, __VA_ARGS__)
+
+#define __mask(src, bitfield) \
+		(((2 << (1 ? bitfield)) - 1) & ~((1 << (0 ? bitfield)) - 1))
+#define mask(bitfield) __mask(bitfield)
+
+#define __bitf(src, bitfield, x) \
+		(((x) >> (src) << (0 ? bitfield)) &  __mask(src, bitfield))
+#define bitf(bitfield, x) __bitf(bitfield, x)
+#define bitfs(bitfield, s) __bitf(bitfield, bitfield##_##s)
+#define setbitf(state, reg, bitfield, x)				\
+	state->regs[reg] = (state->regs[reg] & ~mask(reg##_##bitfield))	\
+		| bitf(reg##_##bitfield, x)
+
+#define __unbitf(src, bitfield, x) \
+		((x & __mask(src, bitfield)) >> (0 ? bitfield) << (src))
+#define unbitf(bitfield, x) __unbitf(bitfield, x)
+
+static inline int interpolate(int y0, int y1, int y2, int x)
+{
+	return y1 + (x < 50 ? y1 - y0 : y2 - y1) * (x - 50) / 50;
+}
+
+static inline int32_t round_fixed(fixed x)
+{
+	return (x + fixed1/2) >> 32;
+}
+
+#define ch7006_load_reg(client, state, reg) ch7006_write(client, reg, state->regs[reg])
+#define ch7006_save_reg(client, state, reg) state->regs[reg] = ch7006_read(client, reg)
+
+/* Fixed hardware specs */
+
+#define CH7006_FREQ0				14318
+#define CH7006_MAXN				650
+#define CH7006_MAXM				315
+
+/* Register definitions */
+
+#define CH7006_DISPMODE				0x00
+#define CH7006_DISPMODE_INPUT_RES		0, 7:5
+#define CH7006_DISPMODE_INPUT_RES_512x384	0x0
+#define CH7006_DISPMODE_INPUT_RES_720x400	0x1
+#define CH7006_DISPMODE_INPUT_RES_640x400	0x2
+#define CH7006_DISPMODE_INPUT_RES_640x480	0x3
+#define CH7006_DISPMODE_INPUT_RES_800x600	0x4
+#define CH7006_DISPMODE_INPUT_RES_NATIVE	0x5
+#define CH7006_DISPMODE_OUTPUT_STD		0, 4:3
+#define CH7006_DISPMODE_OUTPUT_STD_PAL		0x0
+#define CH7006_DISPMODE_OUTPUT_STD_NTSC		0x1
+#define CH7006_DISPMODE_OUTPUT_STD_PAL_M	0x2
+#define CH7006_DISPMODE_OUTPUT_STD_NTSC_J	0x3
+#define CH7006_DISPMODE_SCALING_RATIO		0, 2:0
+#define CH7006_DISPMODE_SCALING_RATIO_5_4	0x0
+#define CH7006_DISPMODE_SCALING_RATIO_1_1	0x1
+#define CH7006_DISPMODE_SCALING_RATIO_7_8	0x2
+#define CH7006_DISPMODE_SCALING_RATIO_5_6	0x3
+#define CH7006_DISPMODE_SCALING_RATIO_3_4	0x4
+#define CH7006_DISPMODE_SCALING_RATIO_7_10	0x5
+
+#define CH7006_FFILTER				0x01
+#define CH7006_FFILTER_TEXT			0, 5:4
+#define CH7006_FFILTER_LUMA			0, 3:2
+#define CH7006_FFILTER_CHROMA			0, 1:0
+#define CH7006_FFILTER_CHROMA_NO_DCRAWL		0x3
+
+#define CH7006_BWIDTH				0x03
+#define CH7006_BWIDTH_5L_FFILER			(1 << 7)
+#define CH7006_BWIDTH_CVBS_NO_CHROMA		(1 << 6)
+#define CH7006_BWIDTH_CHROMA			0, 5:4
+#define CH7006_BWIDTH_SVIDEO_YPEAK		(1 << 3)
+#define CH7006_BWIDTH_SVIDEO_LUMA		0, 2:1
+#define CH7006_BWIDTH_CVBS_LUMA			0, 0:0
+
+#define CH7006_INPUT_FORMAT			0x04
+#define CH7006_INPUT_FORMAT_DAC_GAIN		(1 << 6)
+#define CH7006_INPUT_FORMAT_RGB_PASS_THROUGH	(1 << 5)
+#define CH7006_INPUT_FORMAT_FORMAT		0, 3:0
+#define CH7006_INPUT_FORMAT_FORMAT_RGB16	0x0
+#define CH7006_INPUT_FORMAT_FORMAT_YCrCb24m16	0x1
+#define CH7006_INPUT_FORMAT_FORMAT_RGB24m16	0x2
+#define CH7006_INPUT_FORMAT_FORMAT_RGB15	0x3
+#define CH7006_INPUT_FORMAT_FORMAT_RGB24m12C	0x4
+#define CH7006_INPUT_FORMAT_FORMAT_RGB24m12I	0x5
+#define CH7006_INPUT_FORMAT_FORMAT_RGB24m8	0x6
+#define CH7006_INPUT_FORMAT_FORMAT_RGB16m8	0x7
+#define CH7006_INPUT_FORMAT_FORMAT_RGB15m8	0x8
+#define CH7006_INPUT_FORMAT_FORMAT_YCrCb24m8	0x9
+
+#define CH7006_CLKMODE				0x06
+#define CH7006_CLKMODE_SUBC_LOCK		(1 << 7)
+#define CH7006_CLKMODE_MASTER			(1 << 6)
+#define CH7006_CLKMODE_POS_EDGE			(1 << 4)
+#define CH7006_CLKMODE_XCM			0, 3:2
+#define CH7006_CLKMODE_PCM			0, 1:0
+
+#define CH7006_START_ACTIVE			0x07
+#define CH7006_START_ACTIVE_0			0, 7:0
+
+#define CH7006_POV				0x08
+#define CH7006_POV_START_ACTIVE_8		8, 2:2
+#define CH7006_POV_HPOS_8			8, 1:1
+#define CH7006_POV_VPOS_8			8, 0:0
+
+#define CH7006_BLACK_LEVEL			0x09
+#define CH7006_BLACK_LEVEL_0			0, 7:0
+
+#define CH7006_HPOS				0x0a
+#define CH7006_HPOS_0				0, 7:0
+
+#define CH7006_VPOS				0x0b
+#define CH7006_VPOS_0				0, 7:0
+
+#define CH7006_INPUT_SYNC			0x0d
+#define CH7006_INPUT_SYNC_EMBEDDED		(1 << 3)
+#define CH7006_INPUT_SYNC_OUTPUT		(1 << 2)
+#define CH7006_INPUT_SYNC_PVSYNC		(1 << 1)
+#define CH7006_INPUT_SYNC_PHSYNC		(1 << 0)
+
+#define CH7006_POWER				0x0e
+#define CH7006_POWER_SCART			(1 << 4)
+#define CH7006_POWER_RESET			(1 << 3)
+#define CH7006_POWER_LEVEL			0, 2:0
+#define CH7006_POWER_LEVEL_CVBS_OFF		0x0
+#define CH7006_POWER_LEVEL_POWER_OFF		0x1
+#define CH7006_POWER_LEVEL_SVIDEO_OFF		0x2
+#define CH7006_POWER_LEVEL_NORMAL		0x3
+#define CH7006_POWER_LEVEL_FULL_POWER_OFF	0x4
+
+#define CH7006_DETECT				0x10
+#define CH7006_DETECT_SVIDEO_Y_TEST		(1 << 3)
+#define CH7006_DETECT_SVIDEO_C_TEST		(1 << 2)
+#define CH7006_DETECT_CVBS_TEST			(1 << 1)
+#define CH7006_DETECT_SENSE			(1 << 0)
+
+#define CH7006_CONTRAST				0x11
+#define CH7006_CONTRAST_0			0, 2:0
+
+#define CH7006_PLLOV	 			0x13
+#define CH7006_PLLOV_N_8	 		8, 2:1
+#define CH7006_PLLOV_M_8	 		8, 0:0
+
+#define CH7006_PLLM	 			0x14
+#define CH7006_PLLM_0	 			0, 7:0
+
+#define CH7006_PLLN	 			0x15
+#define CH7006_PLLN_0	 			0, 7:0
+
+#define CH7006_BCLKOUT	 			0x17
+
+#define CH7006_SUBC_INC0			0x18
+#define CH7006_SUBC_INC0_28			28, 3:0
+
+#define CH7006_SUBC_INC1			0x19
+#define CH7006_SUBC_INC1_24			24, 3:0
+
+#define CH7006_SUBC_INC2			0x1a
+#define CH7006_SUBC_INC2_20			20, 3:0
+
+#define CH7006_SUBC_INC3			0x1b
+#define CH7006_SUBC_INC3_GPIO1_VAL		(1 << 7)
+#define CH7006_SUBC_INC3_GPIO0_VAL		(1 << 6)
+#define CH7006_SUBC_INC3_POUT_3_3V		(1 << 5)
+#define CH7006_SUBC_INC3_POUT_INV		(1 << 4)
+#define CH7006_SUBC_INC3_16			16, 3:0
+
+#define CH7006_SUBC_INC4			0x1c
+#define CH7006_SUBC_INC4_GPIO1_IN		(1 << 7)
+#define CH7006_SUBC_INC4_GPIO0_IN		(1 << 6)
+#define CH7006_SUBC_INC4_DS_INPUT		(1 << 4)
+#define CH7006_SUBC_INC4_12			12, 3:0
+
+#define CH7006_SUBC_INC5			0x1d
+#define CH7006_SUBC_INC5_8			8, 3:0
+
+#define CH7006_SUBC_INC6			0x1e
+#define CH7006_SUBC_INC6_4			4, 3:0
+
+#define CH7006_SUBC_INC7			0x1f
+#define CH7006_SUBC_INC7_0			0, 3:0
+
+#define CH7006_PLL_CONTROL			0x20
+#define CH7006_PLL_CONTROL_CPI			(1 << 5)
+#define CH7006_PLL_CONTROL_CAPACITOR		(1 << 4)
+#define CH7006_PLL_CONTROL_7STAGES		(1 << 3)
+#define CH7006_PLL_CONTROL_DIGITAL_5V		(1 << 2)
+#define CH7006_PLL_CONTROL_ANALOG_5V		(1 << 1)
+#define CH7006_PLL_CONTROL_MEMORY_5V		(1 << 0)
+
+#define CH7006_CALC_SUBC_INC0			0x21
+#define CH7006_CALC_SUBC_INC0_24		24, 4:3
+#define CH7006_CALC_SUBC_INC0_HYST		0, 2:1
+#define CH7006_CALC_SUBC_INC0_AUTO		(1 << 0)
+
+#define CH7006_CALC_SUBC_INC1			0x22
+#define CH7006_CALC_SUBC_INC1_16		16, 7:0
+
+#define CH7006_CALC_SUBC_INC2			0x23
+#define CH7006_CALC_SUBC_INC2_8			8, 7:0
+
+#define CH7006_CALC_SUBC_INC3			0x24
+#define CH7006_CALC_SUBC_INC3_0			0, 7:0
+
+#define CH7006_VERSION_ID			0x25
+
+#endif
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i2c/ch7006_drv.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i2c/ch7006_drv.c
@@ -0,0 +1,536 @@
+/*
+ * Copyright (C) 2009 Francisco Jerez.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include "ch7006_priv.h"
+
+/* DRM encoder functions */
+
+static void ch7006_encoder_set_config(struct drm_encoder *encoder,
+				      void *params)
+{
+	struct ch7006_priv *priv = to_ch7006_priv(encoder);
+
+	priv->params = params;
+}
+
+static void ch7006_encoder_destroy(struct drm_encoder *encoder)
+{
+	struct ch7006_priv *priv = to_ch7006_priv(encoder);
+
+	drm_property_destroy(encoder->dev, priv->scale_property);
+
+	kfree(priv);
+	to_encoder_slave(encoder)->slave_priv = NULL;
+
+	drm_i2c_encoder_destroy(encoder);
+}
+
+static void  ch7006_encoder_dpms(struct drm_encoder *encoder, int mode)
+{
+	struct i2c_client *client = drm_i2c_encoder_get_client(encoder);
+	struct ch7006_priv *priv = to_ch7006_priv(encoder);
+	struct ch7006_state *state = &priv->state;
+
+	ch7006_dbg(client, "\n");
+
+	if (mode == priv->last_dpms)
+		return;
+	priv->last_dpms = mode;
+
+	ch7006_setup_power_state(encoder);
+
+	ch7006_load_reg(client, state, CH7006_POWER);
+}
+
+static void ch7006_encoder_save(struct drm_encoder *encoder)
+{
+	struct i2c_client *client = drm_i2c_encoder_get_client(encoder);
+	struct ch7006_priv *priv = to_ch7006_priv(encoder);
+
+	ch7006_dbg(client, "\n");
+
+	ch7006_state_save(client, &priv->saved_state);
+}
+
+static void ch7006_encoder_restore(struct drm_encoder *encoder)
+{
+	struct i2c_client *client = drm_i2c_encoder_get_client(encoder);
+	struct ch7006_priv *priv = to_ch7006_priv(encoder);
+
+	ch7006_dbg(client, "\n");
+
+	ch7006_state_load(client, &priv->saved_state);
+}
+
+static bool ch7006_encoder_mode_fixup(struct drm_encoder *encoder,
+				      struct drm_display_mode *mode,
+				      struct drm_display_mode *adjusted_mode)
+{
+	struct ch7006_priv *priv = to_ch7006_priv(encoder);
+
+	/* The ch7006 is painfully picky with the input timings so no
+	 * custom modes for now... */
+
+	priv->mode = ch7006_lookup_mode(encoder, mode);
+
+	return !!priv->mode;
+}
+
+static int ch7006_encoder_mode_valid(struct drm_encoder *encoder,
+				     struct drm_display_mode *mode)
+{
+	if (ch7006_lookup_mode(encoder, mode))
+		return MODE_OK;
+	else
+		return MODE_BAD;
+}
+
+static void ch7006_encoder_mode_set(struct drm_encoder *encoder,
+				     struct drm_display_mode *drm_mode,
+				     struct drm_display_mode *adjusted_mode)
+{
+	struct i2c_client *client = drm_i2c_encoder_get_client(encoder);
+	struct ch7006_priv *priv = to_ch7006_priv(encoder);
+	struct ch7006_encoder_params *params = priv->params;
+	struct ch7006_state *state = &priv->state;
+	uint8_t *regs = state->regs;
+	struct ch7006_mode *mode = priv->mode;
+	struct ch7006_tv_norm_info *norm = &ch7006_tv_norms[priv->norm];
+	int start_active;
+
+	ch7006_dbg(client, "\n");
+
+	regs[CH7006_DISPMODE] = norm->dispmode | mode->dispmode;
+	regs[CH7006_BWIDTH] = 0;
+	regs[CH7006_INPUT_FORMAT] = bitf(CH7006_INPUT_FORMAT_FORMAT,
+					 params->input_format);
+
+	regs[CH7006_CLKMODE] = CH7006_CLKMODE_SUBC_LOCK
+		| bitf(CH7006_CLKMODE_XCM, params->xcm)
+		| bitf(CH7006_CLKMODE_PCM, params->pcm);
+	if (params->clock_mode)
+		regs[CH7006_CLKMODE] |= CH7006_CLKMODE_MASTER;
+	if (params->clock_edge)
+		regs[CH7006_CLKMODE] |= CH7006_CLKMODE_POS_EDGE;
+
+	start_active = (drm_mode->htotal & ~0x7) - (drm_mode->hsync_start & ~0x7);
+	regs[CH7006_POV] = bitf(CH7006_POV_START_ACTIVE_8, start_active);
+	regs[CH7006_START_ACTIVE] = bitf(CH7006_START_ACTIVE_0, start_active);
+
+	regs[CH7006_INPUT_SYNC] = 0;
+	if (params->sync_direction)
+		regs[CH7006_INPUT_SYNC] |= CH7006_INPUT_SYNC_OUTPUT;
+	if (params->sync_encoding)
+		regs[CH7006_INPUT_SYNC] |= CH7006_INPUT_SYNC_EMBEDDED;
+	if (drm_mode->flags & DRM_MODE_FLAG_PVSYNC)
+		regs[CH7006_INPUT_SYNC] |= CH7006_INPUT_SYNC_PVSYNC;
+	if (drm_mode->flags & DRM_MODE_FLAG_PHSYNC)
+		regs[CH7006_INPUT_SYNC] |= CH7006_INPUT_SYNC_PHSYNC;
+
+	regs[CH7006_DETECT] = 0;
+	regs[CH7006_BCLKOUT] = 0;
+
+	regs[CH7006_SUBC_INC3] = 0;
+	if (params->pout_level)
+		regs[CH7006_SUBC_INC3] |= CH7006_SUBC_INC3_POUT_3_3V;
+
+	regs[CH7006_SUBC_INC4] = 0;
+	if (params->active_detect)
+		regs[CH7006_SUBC_INC4] |= CH7006_SUBC_INC4_DS_INPUT;
+
+	regs[CH7006_PLL_CONTROL] = priv->saved_state.regs[CH7006_PLL_CONTROL];
+
+	ch7006_setup_levels(encoder);
+	ch7006_setup_subcarrier(encoder);
+	ch7006_setup_pll(encoder);
+	ch7006_setup_power_state(encoder);
+	ch7006_setup_properties(encoder);
+
+	ch7006_state_load(client, state);
+}
+
+static enum drm_connector_status ch7006_encoder_detect(struct drm_encoder *encoder,
+						       struct drm_connector *connector)
+{
+	struct i2c_client *client = drm_i2c_encoder_get_client(encoder);
+	struct ch7006_priv *priv = to_ch7006_priv(encoder);
+	struct ch7006_state *state = &priv->state;
+	int det;
+
+	ch7006_dbg(client, "\n");
+
+	ch7006_save_reg(client, state, CH7006_DETECT);
+	ch7006_save_reg(client, state, CH7006_POWER);
+	ch7006_save_reg(client, state, CH7006_CLKMODE);
+
+	ch7006_write(client, CH7006_POWER, CH7006_POWER_RESET |
+					   bitfs(CH7006_POWER_LEVEL, NORMAL));
+	ch7006_write(client, CH7006_CLKMODE, CH7006_CLKMODE_MASTER);
+
+	ch7006_write(client, CH7006_DETECT, CH7006_DETECT_SENSE);
+
+	ch7006_write(client, CH7006_DETECT, 0);
+
+	det = ch7006_read(client, CH7006_DETECT);
+
+	ch7006_load_reg(client, state, CH7006_CLKMODE);
+	ch7006_load_reg(client, state, CH7006_POWER);
+	ch7006_load_reg(client, state, CH7006_DETECT);
+
+	if ((det & (CH7006_DETECT_SVIDEO_Y_TEST|
+		    CH7006_DETECT_SVIDEO_C_TEST|
+		    CH7006_DETECT_CVBS_TEST)) == 0)
+		priv->subconnector = DRM_MODE_SUBCONNECTOR_SCART;
+	else if ((det & (CH7006_DETECT_SVIDEO_Y_TEST|
+			 CH7006_DETECT_SVIDEO_C_TEST)) == 0)
+		priv->subconnector = DRM_MODE_SUBCONNECTOR_SVIDEO;
+	else if ((det & CH7006_DETECT_CVBS_TEST) == 0)
+		priv->subconnector = DRM_MODE_SUBCONNECTOR_Composite;
+	else
+		priv->subconnector = DRM_MODE_SUBCONNECTOR_Unknown;
+
+	drm_connector_property_set_value(connector,
+			encoder->dev->mode_config.tv_subconnector_property,
+							priv->subconnector);
+
+	return priv->subconnector ? connector_status_connected :
+					connector_status_disconnected;
+}
+
+static int ch7006_encoder_get_modes(struct drm_encoder *encoder,
+				    struct drm_connector *connector)
+{
+	struct ch7006_priv *priv = to_ch7006_priv(encoder);
+	struct ch7006_mode *mode;
+	int n = 0;
+
+	for (mode = ch7006_modes; mode->mode.clock; mode++) {
+		if (~mode->valid_scales & 1<<priv->scale ||
+		    ~mode->valid_norms & 1<<priv->norm)
+			continue;
+
+		drm_mode_probed_add(connector,
+				drm_mode_duplicate(encoder->dev, &mode->mode));
+
+		n++;
+	}
+
+	return n;
+}
+
+static int ch7006_encoder_create_resources(struct drm_encoder *encoder,
+					   struct drm_connector *connector)
+{
+	struct ch7006_priv *priv = to_ch7006_priv(encoder);
+	struct drm_device *dev = encoder->dev;
+	struct drm_mode_config *conf = &dev->mode_config;
+
+	drm_mode_create_tv_properties(dev, NUM_TV_NORMS, ch7006_tv_norm_names);
+
+	priv->scale_property = drm_property_create(dev, DRM_MODE_PROP_RANGE,
+						   "scale", 2);
+	priv->scale_property->values[0] = 0;
+	priv->scale_property->values[1] = 2;
+
+	drm_connector_attach_property(connector, conf->tv_select_subconnector_property,
+				      priv->select_subconnector);
+	drm_connector_attach_property(connector, conf->tv_subconnector_property,
+				      priv->subconnector);
+	drm_connector_attach_property(connector, conf->tv_left_margin_property,
+				      priv->hmargin);
+	drm_connector_attach_property(connector, conf->tv_bottom_margin_property,
+				      priv->vmargin);
+	drm_connector_attach_property(connector, conf->tv_mode_property,
+				      priv->norm);
+	drm_connector_attach_property(connector, conf->tv_brightness_property,
+				      priv->brightness);
+	drm_connector_attach_property(connector, conf->tv_contrast_property,
+				      priv->contrast);
+	drm_connector_attach_property(connector, conf->tv_flicker_reduction_property,
+				      priv->flicker);
+	drm_connector_attach_property(connector, priv->scale_property,
+				      priv->scale);
+
+	return 0;
+}
+
+static int ch7006_encoder_set_property(struct drm_encoder *encoder,
+				       struct drm_connector *connector,
+				       struct drm_property *property,
+				       uint64_t val)
+{
+	struct i2c_client *client = drm_i2c_encoder_get_client(encoder);
+	struct ch7006_priv *priv = to_ch7006_priv(encoder);
+	struct ch7006_state *state = &priv->state;
+	struct drm_mode_config *conf = &encoder->dev->mode_config;
+	struct drm_crtc *crtc = encoder->crtc;
+	bool modes_changed = false;
+
+	ch7006_dbg(client, "\n");
+
+	if (property == conf->tv_select_subconnector_property) {
+		priv->select_subconnector = val;
+
+		ch7006_setup_power_state(encoder);
+
+		ch7006_load_reg(client, state, CH7006_POWER);
+
+	} else if (property == conf->tv_left_margin_property) {
+		priv->hmargin = val;
+
+		ch7006_setup_properties(encoder);
+
+		ch7006_load_reg(client, state, CH7006_POV);
+		ch7006_load_reg(client, state, CH7006_HPOS);
+
+	} else if (property == conf->tv_bottom_margin_property) {
+		priv->vmargin = val;
+
+		ch7006_setup_properties(encoder);
+
+		ch7006_load_reg(client, state, CH7006_POV);
+		ch7006_load_reg(client, state, CH7006_VPOS);
+
+	} else if (property == conf->tv_mode_property) {
+		if (connector->dpms != DRM_MODE_DPMS_OFF)
+			return -EINVAL;
+
+		priv->norm = val;
+
+		modes_changed = true;
+
+	} else if (property == conf->tv_brightness_property) {
+		priv->brightness = val;
+
+		ch7006_setup_levels(encoder);
+
+		ch7006_load_reg(client, state, CH7006_BLACK_LEVEL);
+
+	} else if (property == conf->tv_contrast_property) {
+		priv->contrast = val;
+
+		ch7006_setup_properties(encoder);
+
+		ch7006_load_reg(client, state, CH7006_CONTRAST);
+
+	} else if (property == conf->tv_flicker_reduction_property) {
+		priv->flicker = val;
+
+		ch7006_setup_properties(encoder);
+
+		ch7006_load_reg(client, state, CH7006_FFILTER);
+
+	} else if (property == priv->scale_property) {
+		if (connector->dpms != DRM_MODE_DPMS_OFF)
+			return -EINVAL;
+
+		priv->scale = val;
+
+		modes_changed = true;
+
+	} else {
+		return -EINVAL;
+	}
+
+	if (modes_changed) {
+		drm_helper_probe_single_connector_modes(connector, 0, 0);
+
+		/* Disable the crtc to ensure a full modeset is
+		 * performed whenever it's turned on again. */
+		if (crtc) {
+			struct drm_mode_set modeset = {
+				.crtc = crtc,
+			};
+
+			crtc->funcs->set_config(&modeset);
+		}
+	}
+
+	return 0;
+}
+
+static struct drm_encoder_slave_funcs ch7006_encoder_funcs = {
+	.set_config = ch7006_encoder_set_config,
+	.destroy = ch7006_encoder_destroy,
+	.dpms = ch7006_encoder_dpms,
+	.save = ch7006_encoder_save,
+	.restore = ch7006_encoder_restore,
+	.mode_fixup = ch7006_encoder_mode_fixup,
+	.mode_valid = ch7006_encoder_mode_valid,
+	.mode_set = ch7006_encoder_mode_set,
+	.detect = ch7006_encoder_detect,
+	.get_modes = ch7006_encoder_get_modes,
+	.create_resources = ch7006_encoder_create_resources,
+	.set_property = ch7006_encoder_set_property,
+};
+
+
+/* I2C driver functions */
+
+static int ch7006_probe(struct i2c_client *client, const struct i2c_device_id *id)
+{
+	uint8_t addr = CH7006_VERSION_ID;
+	uint8_t val;
+	int ret;
+
+	ch7006_dbg(client, "\n");
+
+	ret = i2c_master_send(client, &addr, sizeof(addr));
+	if (ret < 0)
+		goto fail;
+
+	ret = i2c_master_recv(client, &val, sizeof(val));
+	if (ret < 0)
+		goto fail;
+
+	ch7006_info(client, "Detected version ID: %x\n", val);
+
+	/* I don't know what this is for, but otherwise I get no
+	 * signal.
+	 */
+	ch7006_write(client, 0x3d, 0x0);
+
+	return 0;
+
+fail:
+	ch7006_err(client, "Error %d reading version ID\n", ret);
+
+	return -ENODEV;
+}
+
+static int ch7006_remove(struct i2c_client *client)
+{
+	ch7006_dbg(client, "\n");
+
+	return 0;
+}
+
+static int ch7006_encoder_init(struct i2c_client *client,
+			       struct drm_device *dev,
+			       struct drm_encoder_slave *encoder)
+{
+	struct ch7006_priv *priv;
+	int i;
+
+	ch7006_dbg(client, "\n");
+
+	priv = kzalloc(sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+
+	encoder->slave_priv = priv;
+	encoder->slave_funcs = &ch7006_encoder_funcs;
+
+	priv->norm = TV_NORM_PAL;
+	priv->select_subconnector = DRM_MODE_SUBCONNECTOR_Automatic;
+	priv->subconnector = DRM_MODE_SUBCONNECTOR_Unknown;
+	priv->scale = 1;
+	priv->contrast = 50;
+	priv->brightness = 50;
+	priv->flicker = 50;
+	priv->hmargin = 50;
+	priv->vmargin = 50;
+	priv->last_dpms = -1;
+
+	if (ch7006_tv_norm) {
+		for (i = 0; i < NUM_TV_NORMS; i++) {
+			if (!strcmp(ch7006_tv_norm_names[i], ch7006_tv_norm)) {
+				priv->norm = i;
+				break;
+			}
+		}
+
+		if (i == NUM_TV_NORMS)
+			ch7006_err(client, "Invalid TV norm setting \"%s\".\n",
+				   ch7006_tv_norm);
+	}
+
+	if (ch7006_scale >= 0 && ch7006_scale <= 2)
+		priv->scale = ch7006_scale;
+	else
+		ch7006_err(client, "Invalid scale setting \"%d\".\n",
+			   ch7006_scale);
+
+	return 0;
+}
+
+static struct i2c_device_id ch7006_ids[] = {
+	{ "ch7006", 0 },
+	{ }
+};
+MODULE_DEVICE_TABLE(i2c, ch7006_ids);
+
+static struct drm_i2c_encoder_driver ch7006_driver = {
+	.i2c_driver = {
+		.probe = ch7006_probe,
+		.remove = ch7006_remove,
+
+		.driver = {
+			.name = "ch7006",
+		},
+
+		.id_table = ch7006_ids,
+	},
+
+	.encoder_init = ch7006_encoder_init,
+};
+
+
+/* Module initialization */
+
+static int __init ch7006_init(void)
+{
+	return drm_i2c_encoder_register(THIS_MODULE, &ch7006_driver);
+}
+
+static void __exit ch7006_exit(void)
+{
+	drm_i2c_encoder_unregister(&ch7006_driver);
+}
+
+int ch7006_debug;
+module_param_named(debug, ch7006_debug, int, 0600);
+MODULE_PARM_DESC(debug, "Enable debug output.");
+
+char *ch7006_tv_norm;
+module_param_named(tv_norm, ch7006_tv_norm, charp, 0600);
+MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
+		 "\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, PAL-60, NTSC-M, NTSC-J.\n"
+		 "\t\tDefault: PAL");
+
+int ch7006_scale = 1;
+module_param_named(scale, ch7006_scale, int, 0600);
+MODULE_PARM_DESC(scale, "Default scale.\n"
+		 "\t\tSupported: 0 -> Select video modes with a higher blanking ratio.\n"
+		 "\t\t\t1 -> Select default video modes.\n"
+		 "\t\t\t2 -> Select video modes with a lower blanking ratio.");
+
+MODULE_AUTHOR("Francisco Jerez <currojerez@riseup.net>");
+MODULE_DESCRIPTION("Chrontel ch7006 TV encoder driver");
+MODULE_LICENSE("GPL and additional rights");
+
+module_init(ch7006_init);
+module_exit(ch7006_exit);
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/vmwgfx/vmwgfx_irq.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/vmwgfx/vmwgfx_irq.c
@@ -0,0 +1,286 @@
+/**************************************************************************
+ *
+ * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **************************************************************************/
+
+#include "drmP.h"
+#include "vmwgfx_drv.h"
+
+#define VMW_FENCE_WRAP (1 << 24)
+
+irqreturn_t vmw_irq_handler(DRM_IRQ_ARGS)
+{
+	struct drm_device *dev = (struct drm_device *)arg;
+	struct vmw_private *dev_priv = vmw_priv(dev);
+	uint32_t status;
+
+	spin_lock(&dev_priv->irq_lock);
+	status = inl(dev_priv->io_start + VMWGFX_IRQSTATUS_PORT);
+	spin_unlock(&dev_priv->irq_lock);
+
+	if (status & SVGA_IRQFLAG_ANY_FENCE)
+		wake_up_all(&dev_priv->fence_queue);
+	if (status & SVGA_IRQFLAG_FIFO_PROGRESS)
+		wake_up_all(&dev_priv->fifo_queue);
+
+	if (likely(status)) {
+		outl(status, dev_priv->io_start + VMWGFX_IRQSTATUS_PORT);
+		return IRQ_HANDLED;
+	}
+
+	return IRQ_NONE;
+}
+
+static bool vmw_fifo_idle(struct vmw_private *dev_priv, uint32_t sequence)
+{
+	uint32_t busy;
+
+	mutex_lock(&dev_priv->hw_mutex);
+	busy = vmw_read(dev_priv, SVGA_REG_BUSY);
+	mutex_unlock(&dev_priv->hw_mutex);
+
+	return (busy == 0);
+}
+
+
+bool vmw_fence_signaled(struct vmw_private *dev_priv,
+			uint32_t sequence)
+{
+	__le32 __iomem *fifo_mem = dev_priv->mmio_virt;
+	struct vmw_fifo_state *fifo_state;
+	bool ret;
+
+	if (likely(dev_priv->last_read_sequence - sequence < VMW_FENCE_WRAP))
+		return true;
+
+	dev_priv->last_read_sequence = ioread32(fifo_mem + SVGA_FIFO_FENCE);
+	if (likely(dev_priv->last_read_sequence - sequence < VMW_FENCE_WRAP))
+		return true;
+
+	fifo_state = &dev_priv->fifo;
+	if (!(fifo_state->capabilities & SVGA_FIFO_CAP_FENCE) &&
+	    vmw_fifo_idle(dev_priv, sequence))
+		return true;
+
+	/**
+	 * Then check if the sequence is higher than what we've actually
+	 * emitted. Then the fence is stale and signaled.
+	 */
+
+	ret = ((atomic_read(&dev_priv->fence_seq) - sequence)
+	       > VMW_FENCE_WRAP);
+
+	return ret;
+}
+
+int vmw_fallback_wait(struct vmw_private *dev_priv,
+		      bool lazy,
+		      bool fifo_idle,
+		      uint32_t sequence,
+		      bool interruptible,
+		      unsigned long timeout)
+{
+	struct vmw_fifo_state *fifo_state = &dev_priv->fifo;
+
+	uint32_t count = 0;
+	uint32_t signal_seq;
+	int ret;
+	unsigned long end_jiffies = jiffies + timeout;
+	bool (*wait_condition)(struct vmw_private *, uint32_t);
+	DEFINE_WAIT(__wait);
+
+	wait_condition = (fifo_idle) ? &vmw_fifo_idle :
+		&vmw_fence_signaled;
+
+	/**
+	 * Block command submission while waiting for idle.
+	 */
+
+	if (fifo_idle)
+		down_read(&fifo_state->rwsem);
+	signal_seq = atomic_read(&dev_priv->fence_seq);
+	ret = 0;
+
+	for (;;) {
+		prepare_to_wait(&dev_priv->fence_queue, &__wait,
+				(interruptible) ?
+				TASK_INTERRUPTIBLE : TASK_UNINTERRUPTIBLE);
+		if (wait_condition(dev_priv, sequence))
+			break;
+		if (time_after_eq(jiffies, end_jiffies)) {
+			DRM_ERROR("SVGA device lockup.\n");
+			break;
+		}
+		if (lazy)
+			schedule_timeout(1);
+		else if ((++count & 0x0F) == 0) {
+			/**
+			 * FIXME: Use schedule_hr_timeout here for
+			 * newer kernels and lower CPU utilization.
+			 */
+
+			__set_current_state(TASK_RUNNING);
+			schedule();
+			__set_current_state((interruptible) ?
+					    TASK_INTERRUPTIBLE :
+					    TASK_UNINTERRUPTIBLE);
+		}
+		if (interruptible && signal_pending(current)) {
+			ret = -ERESTARTSYS;
+			break;
+		}
+	}
+	finish_wait(&dev_priv->fence_queue, &__wait);
+	if (ret == 0 && fifo_idle) {
+		__le32 __iomem *fifo_mem = dev_priv->mmio_virt;
+		iowrite32(signal_seq, fifo_mem + SVGA_FIFO_FENCE);
+	}
+	wake_up_all(&dev_priv->fence_queue);
+	if (fifo_idle)
+		up_read(&fifo_state->rwsem);
+
+	return ret;
+}
+
+int vmw_wait_fence(struct vmw_private *dev_priv,
+		   bool lazy, uint32_t sequence,
+		   bool interruptible, unsigned long timeout)
+{
+	long ret;
+	unsigned long irq_flags;
+	struct vmw_fifo_state *fifo = &dev_priv->fifo;
+
+	if (likely(dev_priv->last_read_sequence - sequence < VMW_FENCE_WRAP))
+		return 0;
+
+	if (likely(vmw_fence_signaled(dev_priv, sequence)))
+		return 0;
+
+	vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC);
+
+	if (!(fifo->capabilities & SVGA_FIFO_CAP_FENCE))
+		return vmw_fallback_wait(dev_priv, lazy, true, sequence,
+					 interruptible, timeout);
+
+	if (!(dev_priv->capabilities & SVGA_CAP_IRQMASK))
+		return vmw_fallback_wait(dev_priv, lazy, false, sequence,
+					 interruptible, timeout);
+
+	mutex_lock(&dev_priv->hw_mutex);
+	if (atomic_add_return(1, &dev_priv->fence_queue_waiters) > 0) {
+		spin_lock_irqsave(&dev_priv->irq_lock, irq_flags);
+		outl(SVGA_IRQFLAG_ANY_FENCE,
+		     dev_priv->io_start + VMWGFX_IRQSTATUS_PORT);
+		vmw_write(dev_priv, SVGA_REG_IRQMASK,
+			  vmw_read(dev_priv, SVGA_REG_IRQMASK) |
+			  SVGA_IRQFLAG_ANY_FENCE);
+		spin_unlock_irqrestore(&dev_priv->irq_lock, irq_flags);
+	}
+	mutex_unlock(&dev_priv->hw_mutex);
+
+	if (interruptible)
+		ret = wait_event_interruptible_timeout
+		    (dev_priv->fence_queue,
+		     vmw_fence_signaled(dev_priv, sequence),
+		     timeout);
+	else
+		ret = wait_event_timeout
+		    (dev_priv->fence_queue,
+		     vmw_fence_signaled(dev_priv, sequence),
+		     timeout);
+
+	if (unlikely(ret == 0))
+		ret = -EBUSY;
+	else if (likely(ret > 0))
+		ret = 0;
+
+	mutex_lock(&dev_priv->hw_mutex);
+	if (atomic_dec_and_test(&dev_priv->fence_queue_waiters)) {
+		spin_lock_irqsave(&dev_priv->irq_lock, irq_flags);
+		vmw_write(dev_priv, SVGA_REG_IRQMASK,
+			  vmw_read(dev_priv, SVGA_REG_IRQMASK) &
+			  ~SVGA_IRQFLAG_ANY_FENCE);
+		spin_unlock_irqrestore(&dev_priv->irq_lock, irq_flags);
+	}
+	mutex_unlock(&dev_priv->hw_mutex);
+
+	return ret;
+}
+
+void vmw_irq_preinstall(struct drm_device *dev)
+{
+	struct vmw_private *dev_priv = vmw_priv(dev);
+	uint32_t status;
+
+	if (!(dev_priv->capabilities & SVGA_CAP_IRQMASK))
+		return;
+
+	spin_lock_init(&dev_priv->irq_lock);
+	status = inl(dev_priv->io_start + VMWGFX_IRQSTATUS_PORT);
+	outl(status, dev_priv->io_start + VMWGFX_IRQSTATUS_PORT);
+}
+
+int vmw_irq_postinstall(struct drm_device *dev)
+{
+	return 0;
+}
+
+void vmw_irq_uninstall(struct drm_device *dev)
+{
+	struct vmw_private *dev_priv = vmw_priv(dev);
+	uint32_t status;
+
+	if (!(dev_priv->capabilities & SVGA_CAP_IRQMASK))
+		return;
+
+	mutex_lock(&dev_priv->hw_mutex);
+	vmw_write(dev_priv, SVGA_REG_IRQMASK, 0);
+	mutex_unlock(&dev_priv->hw_mutex);
+
+	status = inl(dev_priv->io_start + VMWGFX_IRQSTATUS_PORT);
+	outl(status, dev_priv->io_start + VMWGFX_IRQSTATUS_PORT);
+}
+
+#define VMW_FENCE_WAIT_TIMEOUT 3*HZ;
+
+int vmw_fence_wait_ioctl(struct drm_device *dev, void *data,
+			 struct drm_file *file_priv)
+{
+	struct drm_vmw_fence_wait_arg *arg =
+	    (struct drm_vmw_fence_wait_arg *)data;
+	unsigned long timeout;
+
+	if (!arg->cookie_valid) {
+		arg->cookie_valid = 1;
+		arg->kernel_cookie = jiffies + VMW_FENCE_WAIT_TIMEOUT;
+	}
+
+	timeout = jiffies;
+	if (time_after_eq(timeout, (unsigned long)arg->kernel_cookie))
+		return -EBUSY;
+
+	timeout = (unsigned long)arg->kernel_cookie - timeout;
+	return vmw_wait_fence(vmw_priv(dev), true, arg->sequence, true, timeout);
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/vmwgfx/svga_reg.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/vmwgfx/svga_reg.h
@@ -0,0 +1,1346 @@
+/**********************************************************
+ * Copyright 1998-2009 VMware, Inc.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ **********************************************************/
+
+/*
+ * svga_reg.h --
+ *
+ *    Virtual hardware definitions for the VMware SVGA II device.
+ */
+
+#ifndef _SVGA_REG_H_
+#define _SVGA_REG_H_
+
+/*
+ * PCI device IDs.
+ */
+#define PCI_VENDOR_ID_VMWARE            0x15AD
+#define PCI_DEVICE_ID_VMWARE_SVGA2      0x0405
+
+/*
+ * Legal values for the SVGA_REG_CURSOR_ON register in old-fashioned
+ * cursor bypass mode. This is still supported, but no new guest
+ * drivers should use it.
+ */
+#define SVGA_CURSOR_ON_HIDE            0x0   /* Must be 0 to maintain backward compatibility */
+#define SVGA_CURSOR_ON_SHOW            0x1   /* Must be 1 to maintain backward compatibility */
+#define SVGA_CURSOR_ON_REMOVE_FROM_FB  0x2   /* Remove the cursor from the framebuffer because we need to see what's under it */
+#define SVGA_CURSOR_ON_RESTORE_TO_FB   0x3   /* Put the cursor back in the framebuffer so the user can see it */
+
+/*
+ * The maximum framebuffer size that can traced for e.g. guests in VESA mode.
+ * The changeMap in the monitor is proportional to this number. Therefore, we'd
+ * like to keep it as small as possible to reduce monitor overhead (using
+ * SVGA_VRAM_MAX_SIZE for this increases the size of the shared area by over
+ * 4k!).
+ *
+ * NB: For compatibility reasons, this value must be greater than 0xff0000.
+ *     See bug 335072.
+ */
+#define SVGA_FB_MAX_TRACEABLE_SIZE      0x1000000
+
+#define SVGA_MAX_PSEUDOCOLOR_DEPTH      8
+#define SVGA_MAX_PSEUDOCOLORS           (1 << SVGA_MAX_PSEUDOCOLOR_DEPTH)
+#define SVGA_NUM_PALETTE_REGS           (3 * SVGA_MAX_PSEUDOCOLORS)
+
+#define SVGA_MAGIC         0x900000UL
+#define SVGA_MAKE_ID(ver)  (SVGA_MAGIC << 8 | (ver))
+
+/* Version 2 let the address of the frame buffer be unsigned on Win32 */
+#define SVGA_VERSION_2     2
+#define SVGA_ID_2          SVGA_MAKE_ID(SVGA_VERSION_2)
+
+/* Version 1 has new registers starting with SVGA_REG_CAPABILITIES so
+   PALETTE_BASE has moved */
+#define SVGA_VERSION_1     1
+#define SVGA_ID_1          SVGA_MAKE_ID(SVGA_VERSION_1)
+
+/* Version 0 is the initial version */
+#define SVGA_VERSION_0     0
+#define SVGA_ID_0          SVGA_MAKE_ID(SVGA_VERSION_0)
+
+/* "Invalid" value for all SVGA IDs. (Version ID, screen object ID, surface ID...) */
+#define SVGA_ID_INVALID    0xFFFFFFFF
+
+/* Port offsets, relative to BAR0 */
+#define SVGA_INDEX_PORT         0x0
+#define SVGA_VALUE_PORT         0x1
+#define SVGA_BIOS_PORT          0x2
+#define SVGA_IRQSTATUS_PORT     0x8
+
+/*
+ * Interrupt source flags for IRQSTATUS_PORT and IRQMASK.
+ *
+ * Interrupts are only supported when the
+ * SVGA_CAP_IRQMASK capability is present.
+ */
+#define SVGA_IRQFLAG_ANY_FENCE            0x1    /* Any fence was passed */
+#define SVGA_IRQFLAG_FIFO_PROGRESS        0x2    /* Made forward progress in the FIFO */
+#define SVGA_IRQFLAG_FENCE_GOAL           0x4    /* SVGA_FIFO_FENCE_GOAL reached */
+
+/*
+ * Registers
+ */
+
+enum {
+   SVGA_REG_ID = 0,
+   SVGA_REG_ENABLE = 1,
+   SVGA_REG_WIDTH = 2,
+   SVGA_REG_HEIGHT = 3,
+   SVGA_REG_MAX_WIDTH = 4,
+   SVGA_REG_MAX_HEIGHT = 5,
+   SVGA_REG_DEPTH = 6,
+   SVGA_REG_BITS_PER_PIXEL = 7,       /* Current bpp in the guest */
+   SVGA_REG_PSEUDOCOLOR = 8,
+   SVGA_REG_RED_MASK = 9,
+   SVGA_REG_GREEN_MASK = 10,
+   SVGA_REG_BLUE_MASK = 11,
+   SVGA_REG_BYTES_PER_LINE = 12,
+   SVGA_REG_FB_START = 13,            /* (Deprecated) */
+   SVGA_REG_FB_OFFSET = 14,
+   SVGA_REG_VRAM_SIZE = 15,
+   SVGA_REG_FB_SIZE = 16,
+
+   /* ID 0 implementation only had the above registers, then the palette */
+
+   SVGA_REG_CAPABILITIES = 17,
+   SVGA_REG_MEM_START = 18,           /* (Deprecated) */
+   SVGA_REG_MEM_SIZE = 19,
+   SVGA_REG_CONFIG_DONE = 20,         /* Set when memory area configured */
+   SVGA_REG_SYNC = 21,                /* See "FIFO Synchronization Registers" */
+   SVGA_REG_BUSY = 22,                /* See "FIFO Synchronization Registers" */
+   SVGA_REG_GUEST_ID = 23,            /* Set guest OS identifier */
+   SVGA_REG_CURSOR_ID = 24,           /* (Deprecated) */
+   SVGA_REG_CURSOR_X = 25,            /* (Deprecated) */
+   SVGA_REG_CURSOR_Y = 26,            /* (Deprecated) */
+   SVGA_REG_CURSOR_ON = 27,           /* (Deprecated) */
+   SVGA_REG_HOST_BITS_PER_PIXEL = 28, /* (Deprecated) */
+   SVGA_REG_SCRATCH_SIZE = 29,        /* Number of scratch registers */
+   SVGA_REG_MEM_REGS = 30,            /* Number of FIFO registers */
+   SVGA_REG_NUM_DISPLAYS = 31,        /* (Deprecated) */
+   SVGA_REG_PITCHLOCK = 32,           /* Fixed pitch for all modes */
+   SVGA_REG_IRQMASK = 33,             /* Interrupt mask */
+
+   /* Legacy multi-monitor support */
+   SVGA_REG_NUM_GUEST_DISPLAYS = 34,/* Number of guest displays in X/Y direction */
+   SVGA_REG_DISPLAY_ID = 35,        /* Display ID for the following display attributes */
+   SVGA_REG_DISPLAY_IS_PRIMARY = 36,/* Whether this is a primary display */
+   SVGA_REG_DISPLAY_POSITION_X = 37,/* The display position x */
+   SVGA_REG_DISPLAY_POSITION_Y = 38,/* The display position y */
+   SVGA_REG_DISPLAY_WIDTH = 39,     /* The display's width */
+   SVGA_REG_DISPLAY_HEIGHT = 40,    /* The display's height */
+
+   /* See "Guest memory regions" below. */
+   SVGA_REG_GMR_ID = 41,
+   SVGA_REG_GMR_DESCRIPTOR = 42,
+   SVGA_REG_GMR_MAX_IDS = 43,
+   SVGA_REG_GMR_MAX_DESCRIPTOR_LENGTH = 44,
+
+   SVGA_REG_TRACES = 45,            /* Enable trace-based updates even when FIFO is on */
+   SVGA_REG_TOP = 46,               /* Must be 1 more than the last register */
+
+   SVGA_PALETTE_BASE = 1024,        /* Base of SVGA color map */
+   /* Next 768 (== 256*3) registers exist for colormap */
+
+   SVGA_SCRATCH_BASE = SVGA_PALETTE_BASE + SVGA_NUM_PALETTE_REGS
+                                    /* Base of scratch registers */
+   /* Next reg[SVGA_REG_SCRATCH_SIZE] registers exist for scratch usage:
+      First 4 are reserved for VESA BIOS Extension; any remaining are for
+      the use of the current SVGA driver. */
+};
+
+
+/*
+ * Guest memory regions (GMRs):
+ *
+ * This is a new memory mapping feature available in SVGA devices
+ * which have the SVGA_CAP_GMR bit set. Previously, there were two
+ * fixed memory regions available with which to share data between the
+ * device and the driver: the FIFO ('MEM') and the framebuffer. GMRs
+ * are our name for an extensible way of providing arbitrary DMA
+ * buffers for use between the driver and the SVGA device. They are a
+ * new alternative to framebuffer memory, usable for both 2D and 3D
+ * graphics operations.
+ *
+ * Since GMR mapping must be done synchronously with guest CPU
+ * execution, we use a new pair of SVGA registers:
+ *
+ *   SVGA_REG_GMR_ID --
+ *
+ *     Read/write.
+ *     This register holds the 32-bit ID (a small positive integer)
+ *     of a GMR to create, delete, or redefine. Writing this register
+ *     has no side-effects.
+ *
+ *   SVGA_REG_GMR_DESCRIPTOR --
+ *
+ *     Write-only.
+ *     Writing this register will create, delete, or redefine the GMR
+ *     specified by the above ID register. If this register is zero,
+ *     the GMR is deleted. Any pointers into this GMR (including those
+ *     currently being processed by FIFO commands) will be
+ *     synchronously invalidated.
+ *
+ *     If this register is nonzero, it must be the physical page
+ *     number (PPN) of a data structure which describes the physical
+ *     layout of the memory region this GMR should describe. The
+ *     descriptor structure will be read synchronously by the SVGA
+ *     device when this register is written. The descriptor need not
+ *     remain allocated for the lifetime of the GMR.
+ *
+ *     The guest driver should write SVGA_REG_GMR_ID first, then
+ *     SVGA_REG_GMR_DESCRIPTOR.
+ *
+ *   SVGA_REG_GMR_MAX_IDS --
+ *
+ *     Read-only.
+ *     The SVGA device may choose to support a maximum number of
+ *     user-defined GMR IDs. This register holds the number of supported
+ *     IDs. (The maximum supported ID plus 1)
+ *
+ *   SVGA_REG_GMR_MAX_DESCRIPTOR_LENGTH --
+ *
+ *     Read-only.
+ *     The SVGA device may choose to put a limit on the total number
+ *     of SVGAGuestMemDescriptor structures it will read when defining
+ *     a single GMR.
+ *
+ * The descriptor structure is an array of SVGAGuestMemDescriptor
+ * structures. Each structure may do one of three things:
+ *
+ *   - Terminate the GMR descriptor list.
+ *     (ppn==0, numPages==0)
+ *
+ *   - Add a PPN or range of PPNs to the GMR's virtual address space.
+ *     (ppn != 0, numPages != 0)
+ *
+ *   - Provide the PPN of the next SVGAGuestMemDescriptor, in order to
+ *     support multi-page GMR descriptor tables without forcing the
+ *     driver to allocate physically contiguous memory.
+ *     (ppn != 0, numPages == 0)
+ *
+ * Note that each physical page of SVGAGuestMemDescriptor structures
+ * can describe at least 2MB of guest memory. If the driver needs to
+ * use more than one page of descriptor structures, it must use one of
+ * its SVGAGuestMemDescriptors to point to an additional page.  The
+ * device will never automatically cross a page boundary.
+ *
+ * Once the driver has described a GMR, it is immediately available
+ * for use via any FIFO command that uses an SVGAGuestPtr structure.
+ * These pointers include a GMR identifier plus an offset into that
+ * GMR.
+ *
+ * The driver must check the SVGA_CAP_GMR bit before using the GMR
+ * registers.
+ */
+
+/*
+ * Special GMR IDs, allowing SVGAGuestPtrs to point to framebuffer
+ * memory as well.  In the future, these IDs could even be used to
+ * allow legacy memory regions to be redefined by the guest as GMRs.
+ *
+ * Using the guest framebuffer (GFB) at BAR1 for general purpose DMA
+ * is being phased out. Please try to use user-defined GMRs whenever
+ * possible.
+ */
+#define SVGA_GMR_NULL         ((uint32) -1)
+#define SVGA_GMR_FRAMEBUFFER  ((uint32) -2)  // Guest Framebuffer (GFB)
+
+typedef
+struct SVGAGuestMemDescriptor {
+   uint32 ppn;
+   uint32 numPages;
+} SVGAGuestMemDescriptor;
+
+typedef
+struct SVGAGuestPtr {
+   uint32 gmrId;
+   uint32 offset;
+} SVGAGuestPtr;
+
+
+/*
+ * SVGAGMRImageFormat --
+ *
+ *    This is a packed representation of the source 2D image format
+ *    for a GMR-to-screen blit. Currently it is defined as an encoding
+ *    of the screen's color depth and bits-per-pixel, however, 16 bits
+ *    are reserved for future use to identify other encodings (such as
+ *    RGBA or higher-precision images).
+ *
+ *    Currently supported formats:
+ *
+ *       bpp depth  Format Name
+ *       --- -----  -----------
+ *        32    24  32-bit BGRX
+ *        24    24  24-bit BGR
+ *        16    16  RGB 5-6-5
+ *        16    15  RGB 5-5-5
+ *
+ */
+
+typedef
+struct SVGAGMRImageFormat {
+   union {
+      struct {
+         uint32 bitsPerPixel : 8;
+         uint32 colorDepth   : 8;
+         uint32 reserved     : 16;  // Must be zero
+      };
+
+      uint32 value;
+   };
+} SVGAGMRImageFormat;
+
+/*
+ * SVGAColorBGRX --
+ *
+ *    A 24-bit color format (BGRX), which does not depend on the
+ *    format of the legacy guest framebuffer (GFB) or the current
+ *    GMRFB state.
+ */
+
+typedef
+struct SVGAColorBGRX {
+   union {
+      struct {
+         uint32 b : 8;
+         uint32 g : 8;
+         uint32 r : 8;
+         uint32 x : 8;  // Unused
+      };
+
+      uint32 value;
+   };
+} SVGAColorBGRX;
+
+
+/*
+ * SVGASignedRect --
+ * SVGASignedPoint --
+ *
+ *    Signed rectangle and point primitives. These are used by the new
+ *    2D primitives for drawing to Screen Objects, which can occupy a
+ *    signed virtual coordinate space.
+ *
+ *    SVGASignedRect specifies a half-open interval: the (left, top)
+ *    pixel is part of the rectangle, but the (right, bottom) pixel is
+ *    not.
+ */
+
+typedef
+struct SVGASignedRect {
+   int32  left;
+   int32  top;
+   int32  right;
+   int32  bottom;
+} SVGASignedRect;
+
+typedef
+struct SVGASignedPoint {
+   int32  x;
+   int32  y;
+} SVGASignedPoint;
+
+
+/*
+ *  Capabilities
+ *
+ *  Note the holes in the bitfield. Missing bits have been deprecated,
+ *  and must not be reused. Those capabilities will never be reported
+ *  by new versions of the SVGA device.
+ */
+
+#define SVGA_CAP_NONE               0x00000000
+#define SVGA_CAP_RECT_COPY          0x00000002
+#define SVGA_CAP_CURSOR             0x00000020
+#define SVGA_CAP_CURSOR_BYPASS      0x00000040   // Legacy (Use Cursor Bypass 3 instead)
+#define SVGA_CAP_CURSOR_BYPASS_2    0x00000080   // Legacy (Use Cursor Bypass 3 instead)
+#define SVGA_CAP_8BIT_EMULATION     0x00000100
+#define SVGA_CAP_ALPHA_CURSOR       0x00000200
+#define SVGA_CAP_3D                 0x00004000
+#define SVGA_CAP_EXTENDED_FIFO      0x00008000
+#define SVGA_CAP_MULTIMON           0x00010000   // Legacy multi-monitor support
+#define SVGA_CAP_PITCHLOCK          0x00020000
+#define SVGA_CAP_IRQMASK            0x00040000
+#define SVGA_CAP_DISPLAY_TOPOLOGY   0x00080000   // Legacy multi-monitor support
+#define SVGA_CAP_GMR                0x00100000
+#define SVGA_CAP_TRACES             0x00200000
+
+
+/*
+ * FIFO register indices.
+ *
+ * The FIFO is a chunk of device memory mapped into guest physmem.  It
+ * is always treated as 32-bit words.
+ *
+ * The guest driver gets to decide how to partition it between
+ * - FIFO registers (there are always at least 4, specifying where the
+ *   following data area is and how much data it contains; there may be
+ *   more registers following these, depending on the FIFO protocol
+ *   version in use)
+ * - FIFO data, written by the guest and slurped out by the VMX.
+ * These indices are 32-bit word offsets into the FIFO.
+ */
+
+enum {
+   /*
+    * Block 1 (basic registers): The originally defined FIFO registers.
+    * These exist and are valid for all versions of the FIFO protocol.
+    */
+
+   SVGA_FIFO_MIN = 0,
+   SVGA_FIFO_MAX,       /* The distance from MIN to MAX must be at least 10K */
+   SVGA_FIFO_NEXT_CMD,
+   SVGA_FIFO_STOP,
+
+   /*
+    * Block 2 (extended registers): Mandatory registers for the extended
+    * FIFO.  These exist if the SVGA caps register includes
+    * SVGA_CAP_EXTENDED_FIFO; some of them are valid only if their
+    * associated capability bit is enabled.
+    *
+    * Note that when originally defined, SVGA_CAP_EXTENDED_FIFO implied
+    * support only for (FIFO registers) CAPABILITIES, FLAGS, and FENCE.
+    * This means that the guest has to test individually (in most cases
+    * using FIFO caps) for the presence of registers after this; the VMX
+    * can define "extended FIFO" to mean whatever it wants, and currently
+    * won't enable it unless there's room for that set and much more.
+    */
+
+   SVGA_FIFO_CAPABILITIES = 4,
+   SVGA_FIFO_FLAGS,
+   // Valid with SVGA_FIFO_CAP_FENCE:
+   SVGA_FIFO_FENCE,
+
+   /*
+    * Block 3a (optional extended registers): Additional registers for the
+    * extended FIFO, whose presence isn't actually implied by
+    * SVGA_CAP_EXTENDED_FIFO; these exist if SVGA_FIFO_MIN is high enough to
+    * leave room for them.
+    *
+    * These in block 3a, the VMX currently considers mandatory for the
+    * extended FIFO.
+    */
+
+   // Valid if exists (i.e. if extended FIFO enabled):
+   SVGA_FIFO_3D_HWVERSION,       /* See SVGA3dHardwareVersion in svga3d_reg.h */
+   // Valid with SVGA_FIFO_CAP_PITCHLOCK:
+   SVGA_FIFO_PITCHLOCK,
+
+   // Valid with SVGA_FIFO_CAP_CURSOR_BYPASS_3:
+   SVGA_FIFO_CURSOR_ON,          /* Cursor bypass 3 show/hide register */
+   SVGA_FIFO_CURSOR_X,           /* Cursor bypass 3 x register */
+   SVGA_FIFO_CURSOR_Y,           /* Cursor bypass 3 y register */
+   SVGA_FIFO_CURSOR_COUNT,       /* Incremented when any of the other 3 change */
+   SVGA_FIFO_CURSOR_LAST_UPDATED,/* Last time the host updated the cursor */
+
+   // Valid with SVGA_FIFO_CAP_RESERVE:
+   SVGA_FIFO_RESERVED,           /* Bytes past NEXT_CMD with real contents */
+
+   /*
+    * Valid with SVGA_FIFO_CAP_SCREEN_OBJECT:
+    *
+    * By default this is SVGA_ID_INVALID, to indicate that the cursor
+    * coordinates are specified relative to the virtual root. If this
+    * is set to a specific screen ID, cursor position is reinterpreted
+    * as a signed offset relative to that screen's origin. This is the
+    * only way to place the cursor on a non-rooted screen.
+    */
+   SVGA_FIFO_CURSOR_SCREEN_ID,
+
+   /*
+    * XXX: The gap here, up until SVGA_FIFO_3D_CAPS, can be used for new
+    * registers, but this must be done carefully and with judicious use of
+    * capability bits, since comparisons based on SVGA_FIFO_MIN aren't
+    * enough to tell you whether the register exists: we've shipped drivers
+    * and products that used SVGA_FIFO_3D_CAPS but didn't know about some of
+    * the earlier ones.  The actual order of introduction was:
+    * - PITCHLOCK
+    * - 3D_CAPS
+    * - CURSOR_* (cursor bypass 3)
+    * - RESERVED
+    * So, code that wants to know whether it can use any of the
+    * aforementioned registers, or anything else added after PITCHLOCK and
+    * before 3D_CAPS, needs to reason about something other than
+    * SVGA_FIFO_MIN.
+    */
+
+   /*
+    * 3D caps block space; valid with 3D hardware version >=
+    * SVGA3D_HWVERSION_WS6_B1.
+    */
+   SVGA_FIFO_3D_CAPS      = 32,
+   SVGA_FIFO_3D_CAPS_LAST = 32 + 255,
+
+   /*
+    * End of VMX's current definition of "extended-FIFO registers".
+    * Registers before here are always enabled/disabled as a block; either
+    * the extended FIFO is enabled and includes all preceding registers, or
+    * it's disabled entirely.
+    *
+    * Block 3b (truly optional extended registers): Additional registers for
+    * the extended FIFO, which the VMX already knows how to enable and
+    * disable with correct granularity.
+    *
+    * Registers after here exist if and only if the guest SVGA driver
+    * sets SVGA_FIFO_MIN high enough to leave room for them.
+    */
+
+   // Valid if register exists:
+   SVGA_FIFO_GUEST_3D_HWVERSION, /* Guest driver's 3D version */
+   SVGA_FIFO_FENCE_GOAL,         /* Matching target for SVGA_IRQFLAG_FENCE_GOAL */
+   SVGA_FIFO_BUSY,               /* See "FIFO Synchronization Registers" */
+
+   /*
+    * Always keep this last.  This defines the maximum number of
+    * registers we know about.  At power-on, this value is placed in
+    * the SVGA_REG_MEM_REGS register, and we expect the guest driver
+    * to allocate this much space in FIFO memory for registers.
+    */
+    SVGA_FIFO_NUM_REGS
+};
+
+
+/*
+ * Definition of registers included in extended FIFO support.
+ *
+ * The guest SVGA driver gets to allocate the FIFO between registers
+ * and data.  It must always allocate at least 4 registers, but old
+ * drivers stopped there.
+ *
+ * The VMX will enable extended FIFO support if and only if the guest
+ * left enough room for all registers defined as part of the mandatory
+ * set for the extended FIFO.
+ *
+ * Note that the guest drivers typically allocate the FIFO only at
+ * initialization time, not at mode switches, so it's likely that the
+ * number of FIFO registers won't change without a reboot.
+ *
+ * All registers less than this value are guaranteed to be present if
+ * svgaUser->fifo.extended is set. Any later registers must be tested
+ * individually for compatibility at each use (in the VMX).
+ *
+ * This value is used only by the VMX, so it can change without
+ * affecting driver compatibility; keep it that way?
+ */
+#define SVGA_FIFO_EXTENDED_MANDATORY_REGS  (SVGA_FIFO_3D_CAPS_LAST + 1)
+
+
+/*
+ * FIFO Synchronization Registers
+ *
+ *  This explains the relationship between the various FIFO
+ *  sync-related registers in IOSpace and in FIFO space.
+ *
+ *  SVGA_REG_SYNC --
+ *
+ *       The SYNC register can be used in two different ways by the guest:
+ *
+ *         1. If the guest wishes to fully sync (drain) the FIFO,
+ *            it will write once to SYNC then poll on the BUSY
+ *            register. The FIFO is sync'ed once BUSY is zero.
+ *
+ *         2. If the guest wants to asynchronously wake up the host,
+ *            it will write once to SYNC without polling on BUSY.
+ *            Ideally it will do this after some new commands have
+ *            been placed in the FIFO, and after reading a zero
+ *            from SVGA_FIFO_BUSY.
+ *
+ *       (1) is the original behaviour that SYNC was designed to
+ *       support.  Originally, a write to SYNC would implicitly
+ *       trigger a read from BUSY. This causes us to synchronously
+ *       process the FIFO.
+ *
+ *       This behaviour has since been changed so that writing SYNC
+ *       will *not* implicitly cause a read from BUSY. Instead, it
+ *       makes a channel call which asynchronously wakes up the MKS
+ *       thread.
+ *
+ *       New guests can use this new behaviour to implement (2)
+ *       efficiently. This lets guests get the host's attention
+ *       without waiting for the MKS to poll, which gives us much
+ *       better CPU utilization on SMP hosts and on UP hosts while
+ *       we're blocked on the host GPU.
+ *
+ *       Old guests shouldn't notice the behaviour change. SYNC was
+ *       never guaranteed to process the entire FIFO, since it was
+ *       bounded to a particular number of CPU cycles. Old guests will
+ *       still loop on the BUSY register until the FIFO is empty.
+ *
+ *       Writing to SYNC currently has the following side-effects:
+ *
+ *         - Sets SVGA_REG_BUSY to TRUE (in the monitor)
+ *         - Asynchronously wakes up the MKS thread for FIFO processing
+ *         - The value written to SYNC is recorded as a "reason", for
+ *           stats purposes.
+ *
+ *       If SVGA_FIFO_BUSY is available, drivers are advised to only
+ *       write to SYNC if SVGA_FIFO_BUSY is FALSE. Drivers should set
+ *       SVGA_FIFO_BUSY to TRUE after writing to SYNC. The MKS will
+ *       eventually set SVGA_FIFO_BUSY on its own, but this approach
+ *       lets the driver avoid sending multiple asynchronous wakeup
+ *       messages to the MKS thread.
+ *
+ *  SVGA_REG_BUSY --
+ *
+ *       This register is set to TRUE when SVGA_REG_SYNC is written,
+ *       and it reads as FALSE when the FIFO has been completely
+ *       drained.
+ *
+ *       Every read from this register causes us to synchronously
+ *       process FIFO commands. There is no guarantee as to how many
+ *       commands each read will process.
+ *
+ *       CPU time spent processing FIFO commands will be billed to
+ *       the guest.
+ *
+ *       New drivers should avoid using this register unless they
+ *       need to guarantee that the FIFO is completely drained. It
+ *       is overkill for performing a sync-to-fence. Older drivers
+ *       will use this register for any type of synchronization.
+ *
+ *  SVGA_FIFO_BUSY --
+ *
+ *       This register is a fast way for the guest driver to check
+ *       whether the FIFO is already being processed. It reads and
+ *       writes at normal RAM speeds, with no monitor intervention.
+ *
+ *       If this register reads as TRUE, the host is guaranteeing that
+ *       any new commands written into the FIFO will be noticed before
+ *       the MKS goes back to sleep.
+ *
+ *       If this register reads as FALSE, no such guarantee can be
+ *       made.
+ *
+ *       The guest should use this register to quickly determine
+ *       whether or not it needs to wake up the host. If the guest
+ *       just wrote a command or group of commands that it would like
+ *       the host to begin processing, it should:
+ *
+ *         1. Read SVGA_FIFO_BUSY. If it reads as TRUE, no further
+ *            action is necessary.
+ *
+ *         2. Write TRUE to SVGA_FIFO_BUSY. This informs future guest
+ *            code that we've already sent a SYNC to the host and we
+ *            don't need to send a duplicate.
+ *
+ *         3. Write a reason to SVGA_REG_SYNC. This will send an
+ *            asynchronous wakeup to the MKS thread.
+ */
+
+
+/*
+ * FIFO Capabilities
+ *
+ *      Fence -- Fence register and command are supported
+ *      Accel Front -- Front buffer only commands are supported
+ *      Pitch Lock -- Pitch lock register is supported
+ *      Video -- SVGA Video overlay units are supported
+ *      Escape -- Escape command is supported
+ *
+ * XXX: Add longer descriptions for each capability, including a list
+ *      of the new features that each capability provides.
+ *
+ * SVGA_FIFO_CAP_SCREEN_OBJECT --
+ *
+ *    Provides dynamic multi-screen rendering, for improved Unity and
+ *    multi-monitor modes. With Screen Object, the guest can
+ *    dynamically create and destroy 'screens', which can represent
+ *    Unity windows or virtual monitors. Screen Object also provides
+ *    strong guarantees that DMA operations happen only when
+ *    guest-initiated. Screen Object deprecates the BAR1 guest
+ *    framebuffer (GFB) and all commands that work only with the GFB.
+ *
+ *    New registers:
+ *       FIFO_CURSOR_SCREEN_ID, VIDEO_DATA_GMRID, VIDEO_DST_SCREEN_ID
+ *
+ *    New 2D commands:
+ *       DEFINE_SCREEN, DESTROY_SCREEN, DEFINE_GMRFB, BLIT_GMRFB_TO_SCREEN,
+ *       BLIT_SCREEN_TO_GMRFB, ANNOTATION_FILL, ANNOTATION_COPY
+ *
+ *    New 3D commands:
+ *       BLIT_SURFACE_TO_SCREEN
+ *
+ *    New guarantees:
+ *
+ *       - The host will not read or write guest memory, including the GFB,
+ *         except when explicitly initiated by a DMA command.
+ *
+ *       - All DMA, including legacy DMA like UPDATE and PRESENT_READBACK,
+ *         is guaranteed to complete before any subsequent FENCEs.
+ *
+ *       - All legacy commands which affect a Screen (UPDATE, PRESENT,
+ *         PRESENT_READBACK) as well as new Screen blit commands will
+ *         all behave consistently as blits, and memory will be read
+ *         or written in FIFO order.
+ *
+ *         For example, if you PRESENT from one SVGA3D surface to multiple
+ *         places on the screen, the data copied will always be from the
+ *         SVGA3D surface at the time the PRESENT was issued in the FIFO.
+ *         This was not necessarily true on devices without Screen Object.
+ *
+ *         This means that on devices that support Screen Object, the
+ *         PRESENT_READBACK command should not be necessary unless you
+ *         actually want to read back the results of 3D rendering into
+ *         system memory. (And for that, the BLIT_SCREEN_TO_GMRFB
+ *         command provides a strict superset of functionality.)
+ *
+ *       - When a screen is resized, either using Screen Object commands or
+ *         legacy multimon registers, its contents are preserved.
+ */
+
+#define SVGA_FIFO_CAP_NONE                  0
+#define SVGA_FIFO_CAP_FENCE             (1<<0)
+#define SVGA_FIFO_CAP_ACCELFRONT        (1<<1)
+#define SVGA_FIFO_CAP_PITCHLOCK         (1<<2)
+#define SVGA_FIFO_CAP_VIDEO             (1<<3)
+#define SVGA_FIFO_CAP_CURSOR_BYPASS_3   (1<<4)
+#define SVGA_FIFO_CAP_ESCAPE            (1<<5)
+#define SVGA_FIFO_CAP_RESERVE           (1<<6)
+#define SVGA_FIFO_CAP_SCREEN_OBJECT     (1<<7)
+
+
+/*
+ * FIFO Flags
+ *
+ *      Accel Front -- Driver should use front buffer only commands
+ */
+
+#define SVGA_FIFO_FLAG_NONE                 0
+#define SVGA_FIFO_FLAG_ACCELFRONT       (1<<0)
+#define SVGA_FIFO_FLAG_RESERVED        (1<<31) // Internal use only
+
+/*
+ * FIFO reservation sentinel value
+ */
+
+#define SVGA_FIFO_RESERVED_UNKNOWN      0xffffffff
+
+
+/*
+ * Video overlay support
+ */
+
+#define SVGA_NUM_OVERLAY_UNITS 32
+
+
+/*
+ * Video capabilities that the guest is currently using
+ */
+
+#define SVGA_VIDEO_FLAG_COLORKEY        0x0001
+
+
+/*
+ * Offsets for the video overlay registers
+ */
+
+enum {
+   SVGA_VIDEO_ENABLED = 0,
+   SVGA_VIDEO_FLAGS,
+   SVGA_VIDEO_DATA_OFFSET,
+   SVGA_VIDEO_FORMAT,
+   SVGA_VIDEO_COLORKEY,
+   SVGA_VIDEO_SIZE,          // Deprecated
+   SVGA_VIDEO_WIDTH,
+   SVGA_VIDEO_HEIGHT,
+   SVGA_VIDEO_SRC_X,
+   SVGA_VIDEO_SRC_Y,
+   SVGA_VIDEO_SRC_WIDTH,
+   SVGA_VIDEO_SRC_HEIGHT,
+   SVGA_VIDEO_DST_X,         // Signed int32
+   SVGA_VIDEO_DST_Y,         // Signed int32
+   SVGA_VIDEO_DST_WIDTH,
+   SVGA_VIDEO_DST_HEIGHT,
+   SVGA_VIDEO_PITCH_1,
+   SVGA_VIDEO_PITCH_2,
+   SVGA_VIDEO_PITCH_3,
+   SVGA_VIDEO_DATA_GMRID,    // Optional, defaults to SVGA_GMR_FRAMEBUFFER
+   SVGA_VIDEO_DST_SCREEN_ID, // Optional, defaults to virtual coords (SVGA_ID_INVALID)
+   SVGA_VIDEO_NUM_REGS
+};
+
+
+/*
+ * SVGA Overlay Units
+ *
+ *      width and height relate to the entire source video frame.
+ *      srcX, srcY, srcWidth and srcHeight represent subset of the source
+ *      video frame to be displayed.
+ */
+
+typedef struct SVGAOverlayUnit {
+   uint32 enabled;
+   uint32 flags;
+   uint32 dataOffset;
+   uint32 format;
+   uint32 colorKey;
+   uint32 size;
+   uint32 width;
+   uint32 height;
+   uint32 srcX;
+   uint32 srcY;
+   uint32 srcWidth;
+   uint32 srcHeight;
+   int32  dstX;
+   int32  dstY;
+   uint32 dstWidth;
+   uint32 dstHeight;
+   uint32 pitches[3];
+   uint32 dataGMRId;
+   uint32 dstScreenId;
+} SVGAOverlayUnit;
+
+
+/*
+ * SVGAScreenObject --
+ *
+ *    This is a new way to represent a guest's multi-monitor screen or
+ *    Unity window. Screen objects are only supported if the
+ *    SVGA_FIFO_CAP_SCREEN_OBJECT capability bit is set.
+ *
+ *    If Screen Objects are supported, they can be used to fully
+ *    replace the functionality provided by the framebuffer registers
+ *    (SVGA_REG_WIDTH, HEIGHT, etc.) and by SVGA_CAP_DISPLAY_TOPOLOGY.
+ *
+ *    The screen object is a struct with guaranteed binary
+ *    compatibility. New flags can be added, and the struct may grow,
+ *    but existing fields must retain their meaning.
+ *
+ */
+
+#define SVGA_SCREEN_HAS_ROOT    (1 << 0)  // Screen is present in the virtual coord space
+#define SVGA_SCREEN_IS_PRIMARY  (1 << 1)  // Guest considers this screen to be 'primary'
+#define SVGA_SCREEN_FULLSCREEN_HINT (1 << 2)   // Guest is running a fullscreen app here
+
+typedef
+struct SVGAScreenObject {
+   uint32 structSize;   // sizeof(SVGAScreenObject)
+   uint32 id;
+   uint32 flags;
+   struct {
+      uint32 width;
+      uint32 height;
+   } size;
+   struct {
+      int32 x;
+      int32 y;
+   } root;              // Only used if SVGA_SCREEN_HAS_ROOT is set.
+} SVGAScreenObject;
+
+
+/*
+ *  Commands in the command FIFO:
+ *
+ *  Command IDs defined below are used for the traditional 2D FIFO
+ *  communication (not all commands are available for all versions of the
+ *  SVGA FIFO protocol).
+ *
+ *  Note the holes in the command ID numbers: These commands have been
+ *  deprecated, and the old IDs must not be reused.
+ *
+ *  Command IDs from 1000 to 1999 are reserved for use by the SVGA3D
+ *  protocol.
+ *
+ *  Each command's parameters are described by the comments and
+ *  structs below.
+ */
+
+typedef enum {
+   SVGA_CMD_INVALID_CMD           = 0,
+   SVGA_CMD_UPDATE                = 1,
+   SVGA_CMD_RECT_COPY             = 3,
+   SVGA_CMD_DEFINE_CURSOR         = 19,
+   SVGA_CMD_DEFINE_ALPHA_CURSOR   = 22,
+   SVGA_CMD_UPDATE_VERBOSE        = 25,
+   SVGA_CMD_FRONT_ROP_FILL        = 29,
+   SVGA_CMD_FENCE                 = 30,
+   SVGA_CMD_ESCAPE                = 33,
+   SVGA_CMD_DEFINE_SCREEN         = 34,
+   SVGA_CMD_DESTROY_SCREEN        = 35,
+   SVGA_CMD_DEFINE_GMRFB          = 36,
+   SVGA_CMD_BLIT_GMRFB_TO_SCREEN  = 37,
+   SVGA_CMD_BLIT_SCREEN_TO_GMRFB  = 38,
+   SVGA_CMD_ANNOTATION_FILL       = 39,
+   SVGA_CMD_ANNOTATION_COPY       = 40,
+   SVGA_CMD_MAX
+} SVGAFifoCmdId;
+
+#define SVGA_CMD_MAX_ARGS           64
+
+
+/*
+ * SVGA_CMD_UPDATE --
+ *
+ *    This is a DMA transfer which copies from the Guest Framebuffer
+ *    (GFB) at BAR1 + SVGA_REG_FB_OFFSET to any screens which
+ *    intersect with the provided virtual rectangle.
+ *
+ *    This command does not support using arbitrary guest memory as a
+ *    data source- it only works with the pre-defined GFB memory.
+ *    This command also does not support signed virtual coordinates.
+ *    If you have defined screens (using SVGA_CMD_DEFINE_SCREEN) with
+ *    negative root x/y coordinates, the negative portion of those
+ *    screens will not be reachable by this command.
+ *
+ *    This command is not necessary when using framebuffer
+ *    traces. Traces are automatically enabled if the SVGA FIFO is
+ *    disabled, and you may explicitly enable/disable traces using
+ *    SVGA_REG_TRACES. With traces enabled, any write to the GFB will
+ *    automatically act as if a subsequent SVGA_CMD_UPDATE was issued.
+ *
+ *    Traces and SVGA_CMD_UPDATE are the only supported ways to render
+ *    pseudocolor screen updates. The newer Screen Object commands
+ *    only support true color formats.
+ *
+ * Availability:
+ *    Always available.
+ */
+
+typedef
+struct {
+   uint32 x;
+   uint32 y;
+   uint32 width;
+   uint32 height;
+} SVGAFifoCmdUpdate;
+
+
+/*
+ * SVGA_CMD_RECT_COPY --
+ *
+ *    Perform a rectangular DMA transfer from one area of the GFB to
+ *    another, and copy the result to any screens which intersect it.
+ *
+ * Availability:
+ *    SVGA_CAP_RECT_COPY
+ */
+
+typedef
+struct {
+   uint32 srcX;
+   uint32 srcY;
+   uint32 destX;
+   uint32 destY;
+   uint32 width;
+   uint32 height;
+} SVGAFifoCmdRectCopy;
+
+
+/*
+ * SVGA_CMD_DEFINE_CURSOR --
+ *
+ *    Provide a new cursor image, as an AND/XOR mask.
+ *
+ *    The recommended way to position the cursor overlay is by using
+ *    the SVGA_FIFO_CURSOR_* registers, supported by the
+ *    SVGA_FIFO_CAP_CURSOR_BYPASS_3 capability.
+ *
+ * Availability:
+ *    SVGA_CAP_CURSOR
+ */
+
+typedef
+struct {
+   uint32 id;             // Reserved, must be zero.
+   uint32 hotspotX;
+   uint32 hotspotY;
+   uint32 width;
+   uint32 height;
+   uint32 andMaskDepth;   // Value must be 1 or equal to BITS_PER_PIXEL
+   uint32 xorMaskDepth;   // Value must be 1 or equal to BITS_PER_PIXEL
+   /*
+    * Followed by scanline data for AND mask, then XOR mask.
+    * Each scanline is padded to a 32-bit boundary.
+   */
+} SVGAFifoCmdDefineCursor;
+
+
+/*
+ * SVGA_CMD_DEFINE_ALPHA_CURSOR --
+ *
+ *    Provide a new cursor image, in 32-bit BGRA format.
+ *
+ *    The recommended way to position the cursor overlay is by using
+ *    the SVGA_FIFO_CURSOR_* registers, supported by the
+ *    SVGA_FIFO_CAP_CURSOR_BYPASS_3 capability.
+ *
+ * Availability:
+ *    SVGA_CAP_ALPHA_CURSOR
+ */
+
+typedef
+struct {
+   uint32 id;             // Reserved, must be zero.
+   uint32 hotspotX;
+   uint32 hotspotY;
+   uint32 width;
+   uint32 height;
+   /* Followed by scanline data */
+} SVGAFifoCmdDefineAlphaCursor;
+
+
+/*
+ * SVGA_CMD_UPDATE_VERBOSE --
+ *
+ *    Just like SVGA_CMD_UPDATE, but also provide a per-rectangle
+ *    'reason' value, an opaque cookie which is used by internal
+ *    debugging tools. Third party drivers should not use this
+ *    command.
+ *
+ * Availability:
+ *    SVGA_CAP_EXTENDED_FIFO
+ */
+
+typedef
+struct {
+   uint32 x;
+   uint32 y;
+   uint32 width;
+   uint32 height;
+   uint32 reason;
+} SVGAFifoCmdUpdateVerbose;
+
+
+/*
+ * SVGA_CMD_FRONT_ROP_FILL --
+ *
+ *    This is a hint which tells the SVGA device that the driver has
+ *    just filled a rectangular region of the GFB with a solid
+ *    color. Instead of reading these pixels from the GFB, the device
+ *    can assume that they all equal 'color'. This is primarily used
+ *    for remote desktop protocols.
+ *
+ * Availability:
+ *    SVGA_FIFO_CAP_ACCELFRONT
+ */
+
+#define  SVGA_ROP_COPY                    0x03
+
+typedef
+struct {
+   uint32 color;     // In the same format as the GFB
+   uint32 x;
+   uint32 y;
+   uint32 width;
+   uint32 height;
+   uint32 rop;       // Must be SVGA_ROP_COPY
+} SVGAFifoCmdFrontRopFill;
+
+
+/*
+ * SVGA_CMD_FENCE --
+ *
+ *    Insert a synchronization fence.  When the SVGA device reaches
+ *    this command, it will copy the 'fence' value into the
+ *    SVGA_FIFO_FENCE register. It will also compare the fence against
+ *    SVGA_FIFO_FENCE_GOAL. If the fence matches the goal and the
+ *    SVGA_IRQFLAG_FENCE_GOAL interrupt is enabled, the device will
+ *    raise this interrupt.
+ *
+ * Availability:
+ *    SVGA_FIFO_FENCE for this command,
+ *    SVGA_CAP_IRQMASK for SVGA_FIFO_FENCE_GOAL.
+ */
+
+typedef
+struct {
+   uint32 fence;
+} SVGAFifoCmdFence;
+
+
+/*
+ * SVGA_CMD_ESCAPE --
+ *
+ *    Send an extended or vendor-specific variable length command.
+ *    This is used for video overlay, third party plugins, and
+ *    internal debugging tools. See svga_escape.h
+ *
+ * Availability:
+ *    SVGA_FIFO_CAP_ESCAPE
+ */
+
+typedef
+struct {
+   uint32 nsid;
+   uint32 size;
+   /* followed by 'size' bytes of data */
+} SVGAFifoCmdEscape;
+
+
+/*
+ * SVGA_CMD_DEFINE_SCREEN --
+ *
+ *    Define or redefine an SVGAScreenObject. See the description of
+ *    SVGAScreenObject above.  The video driver is responsible for
+ *    generating new screen IDs. They should be small positive
+ *    integers. The virtual device will have an implementation
+ *    specific upper limit on the number of screen IDs
+ *    supported. Drivers are responsible for recycling IDs. The first
+ *    valid ID is zero.
+ *
+ *    - Interaction with other registers:
+ *
+ *    For backwards compatibility, when the GFB mode registers (WIDTH,
+ *    HEIGHT, PITCHLOCK, BITS_PER_PIXEL) are modified, the SVGA device
+ *    deletes all screens other than screen #0, and redefines screen
+ *    #0 according to the specified mode. Drivers that use
+ *    SVGA_CMD_DEFINE_SCREEN should destroy or redefine screen #0.
+ *
+ *    If you use screen objects, do not use the legacy multi-mon
+ *    registers (SVGA_REG_NUM_GUEST_DISPLAYS, SVGA_REG_DISPLAY_*).
+ *
+ * Availability:
+ *    SVGA_FIFO_CAP_SCREEN_OBJECT
+ */
+
+typedef
+struct {
+   SVGAScreenObject screen;   // Variable-length according to version
+} SVGAFifoCmdDefineScreen;
+
+
+/*
+ * SVGA_CMD_DESTROY_SCREEN --
+ *
+ *    Destroy an SVGAScreenObject. Its ID is immediately available for
+ *    re-use.
+ *
+ * Availability:
+ *    SVGA_FIFO_CAP_SCREEN_OBJECT
+ */
+
+typedef
+struct {
+   uint32 screenId;
+} SVGAFifoCmdDestroyScreen;
+
+
+/*
+ * SVGA_CMD_DEFINE_GMRFB --
+ *
+ *    This command sets a piece of SVGA device state called the
+ *    Guest Memory Region Framebuffer, or GMRFB. The GMRFB is a
+ *    piece of light-weight state which identifies the location and
+ *    format of an image in guest memory or in BAR1. The GMRFB has
+ *    an arbitrary size, and it doesn't need to match the geometry
+ *    of the GFB or any screen object.
+ *
+ *    The GMRFB can be redefined as often as you like. You could
+ *    always use the same GMRFB, you could redefine it before
+ *    rendering from a different guest screen, or you could even
+ *    redefine it before every blit.
+ *
+ *    There are multiple ways to use this command. The simplest way is
+ *    to use it to move the framebuffer either to elsewhere in the GFB
+ *    (BAR1) memory region, or to a user-defined GMR. This lets a
+ *    driver use a framebuffer allocated entirely out of normal system
+ *    memory, which we encourage.
+ *
+ *    Another way to use this command is to set up a ring buffer of
+ *    updates in GFB memory. If a driver wants to ensure that no
+ *    frames are skipped by the SVGA device, it is important that the
+ *    driver not modify the source data for a blit until the device is
+ *    done processing the command. One efficient way to accomplish
+ *    this is to use a ring of small DMA buffers. Each buffer is used
+ *    for one blit, then we move on to the next buffer in the
+ *    ring. The FENCE mechanism is used to protect each buffer from
+ *    re-use until the device is finished with that buffer's
+ *    corresponding blit.
+ *
+ *    This command does not affect the meaning of SVGA_CMD_UPDATE.
+ *    UPDATEs always occur from the legacy GFB memory area. This
+ *    command has no support for pseudocolor GMRFBs. Currently only
+ *    true-color 15, 16, and 24-bit depths are supported. Future
+ *    devices may expose capabilities for additional framebuffer
+ *    formats.
+ *
+ *    The default GMRFB value is undefined. Drivers must always send
+ *    this command at least once before performing any blit from the
+ *    GMRFB.
+ *
+ * Availability:
+ *    SVGA_FIFO_CAP_SCREEN_OBJECT
+ */
+
+typedef
+struct {
+   SVGAGuestPtr        ptr;
+   uint32              bytesPerLine;
+   SVGAGMRImageFormat  format;
+} SVGAFifoCmdDefineGMRFB;
+
+
+/*
+ * SVGA_CMD_BLIT_GMRFB_TO_SCREEN --
+ *
+ *    This is a guest-to-host blit. It performs a DMA operation to
+ *    copy a rectangular region of pixels from the current GMRFB to
+ *    one or more Screen Objects.
+ *
+ *    The destination coordinate may be specified relative to a
+ *    screen's origin (if a screen ID is specified) or relative to the
+ *    virtual coordinate system's origin (if the screen ID is
+ *    SVGA_ID_INVALID). The actual destination may span zero or more
+ *    screens, in the case of a virtual destination rect or a rect
+ *    which extends off the edge of the specified screen.
+ *
+ *    This command writes to the screen's "base layer": the underlying
+ *    framebuffer which exists below any cursor or video overlays. No
+ *    action is necessary to explicitly hide or update any overlays
+ *    which exist on top of the updated region.
+ *
+ *    The SVGA device is guaranteed to finish reading from the GMRFB
+ *    by the time any subsequent FENCE commands are reached.
+ *
+ *    This command consumes an annotation. See the
+ *    SVGA_CMD_ANNOTATION_* commands for details.
+ *
+ * Availability:
+ *    SVGA_FIFO_CAP_SCREEN_OBJECT
+ */
+
+typedef
+struct {
+   SVGASignedPoint  srcOrigin;
+   SVGASignedRect   destRect;
+   uint32           destScreenId;
+} SVGAFifoCmdBlitGMRFBToScreen;
+
+
+/*
+ * SVGA_CMD_BLIT_SCREEN_TO_GMRFB --
+ *
+ *    This is a host-to-guest blit. It performs a DMA operation to
+ *    copy a rectangular region of pixels from a single Screen Object
+ *    back to the current GMRFB.
+ *
+ *    Usage note: This command should be used rarely. It will
+ *    typically be inefficient, but it is necessary for some types of
+ *    synchronization between 3D (GPU) and 2D (CPU) rendering into
+ *    overlapping areas of a screen.
+ *
+ *    The source coordinate is specified relative to a screen's
+ *    origin. The provided screen ID must be valid. If any parameters
+ *    are invalid, the resulting pixel values are undefined.
+ *
+ *    This command reads the screen's "base layer". Overlays like
+ *    video and cursor are not included, but any data which was sent
+ *    using a blit-to-screen primitive will be available, no matter
+ *    whether the data's original source was the GMRFB or the 3D
+ *    acceleration hardware.
+ *
+ *    Note that our guest-to-host blits and host-to-guest blits aren't
+ *    symmetric in their current implementation. While the parameters
+ *    are identical, host-to-guest blits are a lot less featureful.
+ *    They do not support clipping: If the source parameters don't
+ *    fully fit within a screen, the blit fails. They must originate
+ *    from exactly one screen. Virtual coordinates are not directly
+ *    supported.
+ *
+ *    Host-to-guest blits do support the same set of GMRFB formats
+ *    offered by guest-to-host blits.
+ *
+ *    The SVGA device is guaranteed to finish writing to the GMRFB by
+ *    the time any subsequent FENCE commands are reached.
+ *
+ * Availability:
+ *    SVGA_FIFO_CAP_SCREEN_OBJECT
+ */
+
+typedef
+struct {
+   SVGASignedPoint  destOrigin;
+   SVGASignedRect   srcRect;
+   uint32           srcScreenId;
+} SVGAFifoCmdBlitScreenToGMRFB;
+
+
+/*
+ * SVGA_CMD_ANNOTATION_FILL --
+ *
+ *    This is a blit annotation. This command stores a small piece of
+ *    device state which is consumed by the next blit-to-screen
+ *    command. The state is only cleared by commands which are
+ *    specifically documented as consuming an annotation. Other
+ *    commands (such as ESCAPEs for debugging) may intervene between
+ *    the annotation and its associated blit.
+ *
+ *    This annotation is a promise about the contents of the next
+ *    blit: The video driver is guaranteeing that all pixels in that
+ *    blit will have the same value, specified here as a color in
+ *    SVGAColorBGRX format.
+ *
+ *    The SVGA device can still render the blit correctly even if it
+ *    ignores this annotation, but the annotation may allow it to
+ *    perform the blit more efficiently, for example by ignoring the
+ *    source data and performing a fill in hardware.
+ *
+ *    This annotation is most important for performance when the
+ *    user's display is being remoted over a network connection.
+ *
+ * Availability:
+ *    SVGA_FIFO_CAP_SCREEN_OBJECT
+ */
+
+typedef
+struct {
+   SVGAColorBGRX  color;
+} SVGAFifoCmdAnnotationFill;
+
+
+/*
+ * SVGA_CMD_ANNOTATION_COPY --
+ *
+ *    This is a blit annotation. See SVGA_CMD_ANNOTATION_FILL for more
+ *    information about annotations.
+ *
+ *    This annotation is a promise about the contents of the next
+ *    blit: The video driver is guaranteeing that all pixels in that
+ *    blit will have the same value as those which already exist at an
+ *    identically-sized region on the same or a different screen.
+ *
+ *    Note that the source pixels for the COPY in this annotation are
+ *    sampled before applying the anqnotation's associated blit. They
+ *    are allowed to overlap with the blit's destination pixels.
+ *
+ *    The copy source rectangle is specified the same way as the blit
+ *    destination: it can be a rectangle which spans zero or more
+ *    screens, specified relative to either a screen or to the virtual
+ *    coordinate system's origin. If the source rectangle includes
+ *    pixels which are not from exactly one screen, the results are
+ *    undefined.
+ *
+ * Availability:
+ *    SVGA_FIFO_CAP_SCREEN_OBJECT
+ */
+
+typedef
+struct {
+   SVGASignedPoint  srcOrigin;
+   uint32           srcScreenId;
+} SVGAFifoCmdAnnotationCopy;
+
+#endif
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c
@@ -0,0 +1,625 @@
+/**************************************************************************
+ *
+ * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **************************************************************************/
+
+
+#include "drmP.h"
+#include "vmwgfx_drv.h"
+
+#include "ttm/ttm_placement.h"
+
+#include "svga_overlay.h"
+#include "svga_escape.h"
+
+#define VMW_MAX_NUM_STREAMS 1
+
+struct vmw_stream {
+	struct vmw_dma_buffer *buf;
+	bool claimed;
+	bool paused;
+	struct drm_vmw_control_stream_arg saved;
+};
+
+/**
+ * Overlay control
+ */
+struct vmw_overlay {
+	/*
+	 * Each stream is a single overlay. In Xv these are called ports.
+	 */
+	struct mutex mutex;
+	struct vmw_stream stream[VMW_MAX_NUM_STREAMS];
+};
+
+static inline struct vmw_overlay *vmw_overlay(struct drm_device *dev)
+{
+	struct vmw_private *dev_priv = vmw_priv(dev);
+	return dev_priv ? dev_priv->overlay_priv : NULL;
+}
+
+struct vmw_escape_header {
+	uint32_t cmd;
+	SVGAFifoCmdEscape body;
+};
+
+struct vmw_escape_video_flush {
+	struct vmw_escape_header escape;
+	SVGAEscapeVideoFlush flush;
+};
+
+static inline void fill_escape(struct vmw_escape_header *header,
+			       uint32_t size)
+{
+	header->cmd = SVGA_CMD_ESCAPE;
+	header->body.nsid = SVGA_ESCAPE_NSID_VMWARE;
+	header->body.size = size;
+}
+
+static inline void fill_flush(struct vmw_escape_video_flush *cmd,
+			      uint32_t stream_id)
+{
+	fill_escape(&cmd->escape, sizeof(cmd->flush));
+	cmd->flush.cmdType = SVGA_ESCAPE_VMWARE_VIDEO_FLUSH;
+	cmd->flush.streamId = stream_id;
+}
+
+/**
+ * Pin or unpin a buffer in vram.
+ *
+ * @dev_priv:  Driver private.
+ * @buf:  DMA buffer to pin or unpin.
+ * @pin:  Pin buffer in vram if true.
+ * @interruptible:  Use interruptible wait.
+ *
+ * Takes the current masters ttm lock in read.
+ *
+ * Returns
+ * -ERESTARTSYS if interrupted by a signal.
+ */
+static int vmw_dmabuf_pin_in_vram(struct vmw_private *dev_priv,
+				  struct vmw_dma_buffer *buf,
+				  bool pin, bool interruptible)
+{
+	struct ttm_buffer_object *bo = &buf->base;
+	struct ttm_placement *overlay_placement = &vmw_vram_placement;
+	int ret;
+
+	ret = ttm_read_lock(&dev_priv->active_master->lock, interruptible);
+	if (unlikely(ret != 0))
+		return ret;
+
+	ret = ttm_bo_reserve(bo, interruptible, false, false, 0);
+	if (unlikely(ret != 0))
+		goto err;
+
+	if (pin)
+		overlay_placement = &vmw_vram_ne_placement;
+
+	ret = ttm_bo_validate(bo, overlay_placement, interruptible, false);
+
+	ttm_bo_unreserve(bo);
+
+err:
+	ttm_read_unlock(&dev_priv->active_master->lock);
+
+	return ret;
+}
+
+/**
+ * Send put command to hw.
+ *
+ * Returns
+ * -ERESTARTSYS if interrupted by a signal.
+ */
+static int vmw_overlay_send_put(struct vmw_private *dev_priv,
+				struct vmw_dma_buffer *buf,
+				struct drm_vmw_control_stream_arg *arg,
+				bool interruptible)
+{
+	struct {
+		struct vmw_escape_header escape;
+		struct {
+			struct {
+				uint32_t cmdType;
+				uint32_t streamId;
+			} header;
+			struct {
+				uint32_t registerId;
+				uint32_t value;
+			} items[SVGA_VIDEO_PITCH_3 + 1];
+		} body;
+		struct vmw_escape_video_flush flush;
+	} *cmds;
+	uint32_t offset;
+	int i, ret;
+
+	for (;;) {
+		cmds = vmw_fifo_reserve(dev_priv, sizeof(*cmds));
+		if (cmds)
+			break;
+
+		ret = vmw_fallback_wait(dev_priv, false, true, 0,
+					interruptible, 3*HZ);
+		if (interruptible && ret == -ERESTARTSYS)
+			return ret;
+		else
+			BUG_ON(ret != 0);
+	}
+
+	fill_escape(&cmds->escape, sizeof(cmds->body));
+	cmds->body.header.cmdType = SVGA_ESCAPE_VMWARE_VIDEO_SET_REGS;
+	cmds->body.header.streamId = arg->stream_id;
+
+	for (i = 0; i <= SVGA_VIDEO_PITCH_3; i++)
+		cmds->body.items[i].registerId = i;
+
+	offset = buf->base.offset + arg->offset;
+
+	cmds->body.items[SVGA_VIDEO_ENABLED].value     = true;
+	cmds->body.items[SVGA_VIDEO_FLAGS].value       = arg->flags;
+	cmds->body.items[SVGA_VIDEO_DATA_OFFSET].value = offset;
+	cmds->body.items[SVGA_VIDEO_FORMAT].value      = arg->format;
+	cmds->body.items[SVGA_VIDEO_COLORKEY].value    = arg->color_key;
+	cmds->body.items[SVGA_VIDEO_SIZE].value        = arg->size;
+	cmds->body.items[SVGA_VIDEO_WIDTH].value       = arg->width;
+	cmds->body.items[SVGA_VIDEO_HEIGHT].value      = arg->height;
+	cmds->body.items[SVGA_VIDEO_SRC_X].value       = arg->src.x;
+	cmds->body.items[SVGA_VIDEO_SRC_Y].value       = arg->src.y;
+	cmds->body.items[SVGA_VIDEO_SRC_WIDTH].value   = arg->src.w;
+	cmds->body.items[SVGA_VIDEO_SRC_HEIGHT].value  = arg->src.h;
+	cmds->body.items[SVGA_VIDEO_DST_X].value       = arg->dst.x;
+	cmds->body.items[SVGA_VIDEO_DST_Y].value       = arg->dst.y;
+	cmds->body.items[SVGA_VIDEO_DST_WIDTH].value   = arg->dst.w;
+	cmds->body.items[SVGA_VIDEO_DST_HEIGHT].value  = arg->dst.h;
+	cmds->body.items[SVGA_VIDEO_PITCH_1].value     = arg->pitch[0];
+	cmds->body.items[SVGA_VIDEO_PITCH_2].value     = arg->pitch[1];
+	cmds->body.items[SVGA_VIDEO_PITCH_3].value     = arg->pitch[2];
+
+	fill_flush(&cmds->flush, arg->stream_id);
+
+	vmw_fifo_commit(dev_priv, sizeof(*cmds));
+
+	return 0;
+}
+
+/**
+ * Send stop command to hw.
+ *
+ * Returns
+ * -ERESTARTSYS if interrupted by a signal.
+ */
+static int vmw_overlay_send_stop(struct vmw_private *dev_priv,
+				 uint32_t stream_id,
+				 bool interruptible)
+{
+	struct {
+		struct vmw_escape_header escape;
+		SVGAEscapeVideoSetRegs body;
+		struct vmw_escape_video_flush flush;
+	} *cmds;
+	int ret;
+
+	for (;;) {
+		cmds = vmw_fifo_reserve(dev_priv, sizeof(*cmds));
+		if (cmds)
+			break;
+
+		ret = vmw_fallback_wait(dev_priv, false, true, 0,
+					interruptible, 3*HZ);
+		if (interruptible && ret == -ERESTARTSYS)
+			return ret;
+		else
+			BUG_ON(ret != 0);
+	}
+
+	fill_escape(&cmds->escape, sizeof(cmds->body));
+	cmds->body.header.cmdType = SVGA_ESCAPE_VMWARE_VIDEO_SET_REGS;
+	cmds->body.header.streamId = stream_id;
+	cmds->body.items[0].registerId = SVGA_VIDEO_ENABLED;
+	cmds->body.items[0].value = false;
+	fill_flush(&cmds->flush, stream_id);
+
+	vmw_fifo_commit(dev_priv, sizeof(*cmds));
+
+	return 0;
+}
+
+/**
+ * Stop or pause a stream.
+ *
+ * If the stream is paused the no evict flag is removed from the buffer
+ * but left in vram. This allows for instance mode_set to evict it
+ * should it need to.
+ *
+ * The caller must hold the overlay lock.
+ *
+ * @stream_id which stream to stop/pause.
+ * @pause true to pause, false to stop completely.
+ */
+static int vmw_overlay_stop(struct vmw_private *dev_priv,
+			    uint32_t stream_id, bool pause,
+			    bool interruptible)
+{
+	struct vmw_overlay *overlay = dev_priv->overlay_priv;
+	struct vmw_stream *stream = &overlay->stream[stream_id];
+	int ret;
+
+	/* no buffer attached the stream is completely stopped */
+	if (!stream->buf)
+		return 0;
+
+	/* If the stream is paused this is already done */
+	if (!stream->paused) {
+		ret = vmw_overlay_send_stop(dev_priv, stream_id,
+					    interruptible);
+		if (ret)
+			return ret;
+
+		/* We just remove the NO_EVICT flag so no -ENOMEM */
+		ret = vmw_dmabuf_pin_in_vram(dev_priv, stream->buf, false,
+					     interruptible);
+		if (interruptible && ret == -ERESTARTSYS)
+			return ret;
+		else
+			BUG_ON(ret != 0);
+	}
+
+	if (!pause) {
+		vmw_dmabuf_unreference(&stream->buf);
+		stream->paused = false;
+	} else {
+		stream->paused = true;
+	}
+
+	return 0;
+}
+
+/**
+ * Update a stream and send any put or stop fifo commands needed.
+ *
+ * The caller must hold the overlay lock.
+ *
+ * Returns
+ * -ENOMEM if buffer doesn't fit in vram.
+ * -ERESTARTSYS if interrupted.
+ */
+static int vmw_overlay_update_stream(struct vmw_private *dev_priv,
+				     struct vmw_dma_buffer *buf,
+				     struct drm_vmw_control_stream_arg *arg,
+				     bool interruptible)
+{
+	struct vmw_overlay *overlay = dev_priv->overlay_priv;
+	struct vmw_stream *stream = &overlay->stream[arg->stream_id];
+	int ret = 0;
+
+	if (!buf)
+		return -EINVAL;
+
+	DRM_DEBUG("   %s: old %p, new %p, %spaused\n", __func__,
+		  stream->buf, buf, stream->paused ? "" : "not ");
+
+	if (stream->buf != buf) {
+		ret = vmw_overlay_stop(dev_priv, arg->stream_id,
+				       false, interruptible);
+		if (ret)
+			return ret;
+	} else if (!stream->paused) {
+		/* If the buffers match and not paused then just send
+		 * the put command, no need to do anything else.
+		 */
+		ret = vmw_overlay_send_put(dev_priv, buf, arg, interruptible);
+		if (ret == 0)
+			stream->saved = *arg;
+		else
+			BUG_ON(!interruptible);
+
+		return ret;
+	}
+
+	/* We don't start the old stream if we are interrupted.
+	 * Might return -ENOMEM if it can't fit the buffer in vram.
+	 */
+	ret = vmw_dmabuf_pin_in_vram(dev_priv, buf, true, interruptible);
+	if (ret)
+		return ret;
+
+	ret = vmw_overlay_send_put(dev_priv, buf, arg, interruptible);
+	if (ret) {
+		/* This one needs to happen no matter what. We only remove
+		 * the NO_EVICT flag so this is safe from -ENOMEM.
+		 */
+		BUG_ON(vmw_dmabuf_pin_in_vram(dev_priv, buf, false, false) != 0);
+		return ret;
+	}
+
+	if (stream->buf != buf)
+		stream->buf = vmw_dmabuf_reference(buf);
+	stream->saved = *arg;
+
+	return 0;
+}
+
+/**
+ * Stop all streams.
+ *
+ * Used by the fb code when starting.
+ *
+ * Takes the overlay lock.
+ */
+int vmw_overlay_stop_all(struct vmw_private *dev_priv)
+{
+	struct vmw_overlay *overlay = dev_priv->overlay_priv;
+	int i, ret;
+
+	if (!overlay)
+		return 0;
+
+	mutex_lock(&overlay->mutex);
+
+	for (i = 0; i < VMW_MAX_NUM_STREAMS; i++) {
+		struct vmw_stream *stream = &overlay->stream[i];
+		if (!stream->buf)
+			continue;
+
+		ret = vmw_overlay_stop(dev_priv, i, false, false);
+		WARN_ON(ret != 0);
+	}
+
+	mutex_unlock(&overlay->mutex);
+
+	return 0;
+}
+
+/**
+ * Try to resume all paused streams.
+ *
+ * Used by the kms code after moving a new scanout buffer to vram.
+ *
+ * Takes the overlay lock.
+ */
+int vmw_overlay_resume_all(struct vmw_private *dev_priv)
+{
+	struct vmw_overlay *overlay = dev_priv->overlay_priv;
+	int i, ret;
+
+	if (!overlay)
+		return 0;
+
+	mutex_lock(&overlay->mutex);
+
+	for (i = 0; i < VMW_MAX_NUM_STREAMS; i++) {
+		struct vmw_stream *stream = &overlay->stream[i];
+		if (!stream->paused)
+			continue;
+
+		ret = vmw_overlay_update_stream(dev_priv, stream->buf,
+						&stream->saved, false);
+		if (ret != 0)
+			DRM_INFO("%s: *warning* failed to resume stream %i\n",
+				 __func__, i);
+	}
+
+	mutex_unlock(&overlay->mutex);
+
+	return 0;
+}
+
+/**
+ * Pauses all active streams.
+ *
+ * Used by the kms code when moving a new scanout buffer to vram.
+ *
+ * Takes the overlay lock.
+ */
+int vmw_overlay_pause_all(struct vmw_private *dev_priv)
+{
+	struct vmw_overlay *overlay = dev_priv->overlay_priv;
+	int i, ret;
+
+	if (!overlay)
+		return 0;
+
+	mutex_lock(&overlay->mutex);
+
+	for (i = 0; i < VMW_MAX_NUM_STREAMS; i++) {
+		if (overlay->stream[i].paused)
+			DRM_INFO("%s: *warning* stream %i already paused\n",
+				 __func__, i);
+		ret = vmw_overlay_stop(dev_priv, i, true, false);
+		WARN_ON(ret != 0);
+	}
+
+	mutex_unlock(&overlay->mutex);
+
+	return 0;
+}
+
+int vmw_overlay_ioctl(struct drm_device *dev, void *data,
+		      struct drm_file *file_priv)
+{
+	struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
+	struct vmw_private *dev_priv = vmw_priv(dev);
+	struct vmw_overlay *overlay = dev_priv->overlay_priv;
+	struct drm_vmw_control_stream_arg *arg =
+	    (struct drm_vmw_control_stream_arg *)data;
+	struct vmw_dma_buffer *buf;
+	struct vmw_resource *res;
+	int ret;
+
+	if (!overlay)
+		return -ENOSYS;
+
+	ret = vmw_user_stream_lookup(dev_priv, tfile, &arg->stream_id, &res);
+	if (ret)
+		return ret;
+
+	mutex_lock(&overlay->mutex);
+
+	if (!arg->enabled) {
+		ret = vmw_overlay_stop(dev_priv, arg->stream_id, false, true);
+		goto out_unlock;
+	}
+
+	ret = vmw_user_dmabuf_lookup(tfile, arg->handle, &buf);
+	if (ret)
+		goto out_unlock;
+
+	ret = vmw_overlay_update_stream(dev_priv, buf, arg, true);
+
+	vmw_dmabuf_unreference(&buf);
+
+out_unlock:
+	mutex_unlock(&overlay->mutex);
+	vmw_resource_unreference(&res);
+
+	return ret;
+}
+
+int vmw_overlay_num_overlays(struct vmw_private *dev_priv)
+{
+	if (!dev_priv->overlay_priv)
+		return 0;
+
+	return VMW_MAX_NUM_STREAMS;
+}
+
+int vmw_overlay_num_free_overlays(struct vmw_private *dev_priv)
+{
+	struct vmw_overlay *overlay = dev_priv->overlay_priv;
+	int i, k;
+
+	if (!overlay)
+		return 0;
+
+	mutex_lock(&overlay->mutex);
+
+	for (i = 0, k = 0; i < VMW_MAX_NUM_STREAMS; i++)
+		if (!overlay->stream[i].claimed)
+			k++;
+
+	mutex_unlock(&overlay->mutex);
+
+	return k;
+}
+
+int vmw_overlay_claim(struct vmw_private *dev_priv, uint32_t *out)
+{
+	struct vmw_overlay *overlay = dev_priv->overlay_priv;
+	int i;
+
+	if (!overlay)
+		return -ENOSYS;
+
+	mutex_lock(&overlay->mutex);
+
+	for (i = 0; i < VMW_MAX_NUM_STREAMS; i++) {
+
+		if (overlay->stream[i].claimed)
+			continue;
+
+		overlay->stream[i].claimed = true;
+		*out = i;
+		mutex_unlock(&overlay->mutex);
+		return 0;
+	}
+
+	mutex_unlock(&overlay->mutex);
+	return -ESRCH;
+}
+
+int vmw_overlay_unref(struct vmw_private *dev_priv, uint32_t stream_id)
+{
+	struct vmw_overlay *overlay = dev_priv->overlay_priv;
+
+	BUG_ON(stream_id >= VMW_MAX_NUM_STREAMS);
+
+	if (!overlay)
+		return -ENOSYS;
+
+	mutex_lock(&overlay->mutex);
+
+	WARN_ON(!overlay->stream[stream_id].claimed);
+	vmw_overlay_stop(dev_priv, stream_id, false, false);
+	overlay->stream[stream_id].claimed = false;
+
+	mutex_unlock(&overlay->mutex);
+	return 0;
+}
+
+int vmw_overlay_init(struct vmw_private *dev_priv)
+{
+	struct vmw_overlay *overlay;
+	int i;
+
+	if (dev_priv->overlay_priv)
+		return -EINVAL;
+
+	if (!(dev_priv->fifo.capabilities & SVGA_FIFO_CAP_VIDEO) &&
+	     (dev_priv->fifo.capabilities & SVGA_FIFO_CAP_ESCAPE)) {
+		DRM_INFO("hardware doesn't support overlays\n");
+		return -ENOSYS;
+	}
+
+	overlay = kmalloc(GFP_KERNEL, sizeof(*overlay));
+	if (!overlay)
+		return -ENOMEM;
+
+	memset(overlay, 0, sizeof(*overlay));
+	mutex_init(&overlay->mutex);
+	for (i = 0; i < VMW_MAX_NUM_STREAMS; i++) {
+		overlay->stream[i].buf = NULL;
+		overlay->stream[i].paused = false;
+		overlay->stream[i].claimed = false;
+	}
+
+	dev_priv->overlay_priv = overlay;
+
+	return 0;
+}
+
+int vmw_overlay_close(struct vmw_private *dev_priv)
+{
+	struct vmw_overlay *overlay = dev_priv->overlay_priv;
+	bool forgotten_buffer = false;
+	int i;
+
+	if (!overlay)
+		return -ENOSYS;
+
+	for (i = 0; i < VMW_MAX_NUM_STREAMS; i++) {
+		if (overlay->stream[i].buf) {
+			forgotten_buffer = true;
+			vmw_overlay_stop(dev_priv, i, false, false);
+		}
+	}
+
+	WARN_ON(forgotten_buffer);
+
+	dev_priv->overlay_priv = NULL;
+	kfree(overlay);
+
+	return 0;
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c
@@ -0,0 +1,87 @@
+/**************************************************************************
+ *
+ * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **************************************************************************/
+
+#include "vmwgfx_drv.h"
+#include "vmwgfx_drm.h"
+
+int vmw_getparam_ioctl(struct drm_device *dev, void *data,
+		       struct drm_file *file_priv)
+{
+	struct vmw_private *dev_priv = vmw_priv(dev);
+	struct drm_vmw_getparam_arg *param =
+	    (struct drm_vmw_getparam_arg *)data;
+
+	switch (param->param) {
+	case DRM_VMW_PARAM_NUM_STREAMS:
+		param->value = vmw_overlay_num_overlays(dev_priv);
+		break;
+	case DRM_VMW_PARAM_NUM_FREE_STREAMS:
+		param->value = vmw_overlay_num_free_overlays(dev_priv);
+		break;
+	case DRM_VMW_PARAM_3D:
+		param->value = vmw_fifo_have_3d(dev_priv) ? 1 : 0;
+		break;
+	case DRM_VMW_PARAM_FIFO_OFFSET:
+		param->value = dev_priv->mmio_start;
+		break;
+	case DRM_VMW_PARAM_HW_CAPS:
+		param->value = dev_priv->capabilities;
+		break;
+	case DRM_VMW_PARAM_FIFO_CAPS:
+		param->value = dev_priv->fifo.capabilities;
+		break;
+	default:
+		DRM_ERROR("Illegal vmwgfx get param request: %d\n",
+			  param->param);
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+int vmw_fifo_debug_ioctl(struct drm_device *dev, void *data,
+			 struct drm_file *file_priv)
+{
+	struct vmw_private *dev_priv = vmw_priv(dev);
+	struct vmw_fifo_state *fifo_state = &dev_priv->fifo;
+	struct drm_vmw_fifo_debug_arg *arg =
+	    (struct drm_vmw_fifo_debug_arg *)data;
+	__le32 __user *buffer = (__le32 __user *)
+	    (unsigned long)arg->debug_buffer;
+
+	if (unlikely(fifo_state->last_buffer == NULL))
+		return -EINVAL;
+
+	if (arg->debug_buffer_size < fifo_state->last_data_size) {
+		arg->used_size = arg->debug_buffer_size;
+		arg->did_not_fit = 1;
+	} else {
+		arg->used_size = fifo_state->last_data_size;
+		arg->did_not_fit = 0;
+	}
+	return copy_to_user(buffer, fifo_state->last_buffer, arg->used_size);
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/vmwgfx/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/vmwgfx/Kconfig
@@ -0,0 +1,13 @@
+config DRM_VMWGFX
+	tristate "DRM driver for VMware Virtual GPU"
+	depends on DRM && PCI
+	select FB_DEFERRED_IO
+	select FB_CFB_FILLRECT
+	select FB_CFB_COPYAREA
+	select FB_CFB_IMAGEBLIT
+	select DRM_TTM
+	help
+	  KMS enabled DRM driver for SVGA2 virtual hardware.
+
+	  If unsure say n. The compiled module will be
+	  called vmwgfx.ko
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
@@ -0,0 +1,716 @@
+/**************************************************************************
+ *
+ * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **************************************************************************/
+
+#include "vmwgfx_drv.h"
+#include "vmwgfx_reg.h"
+#include "ttm/ttm_bo_api.h"
+#include "ttm/ttm_placement.h"
+
+static int vmw_cmd_invalid(struct vmw_private *dev_priv,
+			   struct vmw_sw_context *sw_context,
+			   SVGA3dCmdHeader *header)
+{
+	return capable(CAP_SYS_ADMIN) ? : -EINVAL;
+}
+
+static int vmw_cmd_ok(struct vmw_private *dev_priv,
+		      struct vmw_sw_context *sw_context,
+		      SVGA3dCmdHeader *header)
+{
+	return 0;
+}
+
+static int vmw_cmd_cid_check(struct vmw_private *dev_priv,
+			     struct vmw_sw_context *sw_context,
+			     SVGA3dCmdHeader *header)
+{
+	struct vmw_cid_cmd {
+		SVGA3dCmdHeader header;
+		__le32 cid;
+	} *cmd;
+	int ret;
+
+	cmd = container_of(header, struct vmw_cid_cmd, header);
+	if (likely(sw_context->cid_valid && cmd->cid == sw_context->last_cid))
+		return 0;
+
+	ret = vmw_context_check(dev_priv, sw_context->tfile, cmd->cid);
+	if (unlikely(ret != 0)) {
+		DRM_ERROR("Could not find or use context %u\n",
+			  (unsigned) cmd->cid);
+		return ret;
+	}
+
+	sw_context->last_cid = cmd->cid;
+	sw_context->cid_valid = true;
+
+	return 0;
+}
+
+static int vmw_cmd_sid_check(struct vmw_private *dev_priv,
+			     struct vmw_sw_context *sw_context,
+			     uint32_t *sid)
+{
+	if (*sid == SVGA3D_INVALID_ID)
+		return 0;
+
+	if (unlikely((!sw_context->sid_valid  ||
+		      *sid != sw_context->last_sid))) {
+		int real_id;
+		int ret = vmw_surface_check(dev_priv, sw_context->tfile,
+					    *sid, &real_id);
+
+		if (unlikely(ret != 0)) {
+			DRM_ERROR("Could ot find or use surface 0x%08x "
+				  "address 0x%08lx\n",
+				  (unsigned int) *sid,
+				  (unsigned long) sid);
+			return ret;
+		}
+
+		sw_context->last_sid = *sid;
+		sw_context->sid_valid = true;
+		*sid = real_id;
+		sw_context->sid_translation = real_id;
+	} else
+		*sid = sw_context->sid_translation;
+
+	return 0;
+}
+
+
+static int vmw_cmd_set_render_target_check(struct vmw_private *dev_priv,
+					   struct vmw_sw_context *sw_context,
+					   SVGA3dCmdHeader *header)
+{
+	struct vmw_sid_cmd {
+		SVGA3dCmdHeader header;
+		SVGA3dCmdSetRenderTarget body;
+	} *cmd;
+	int ret;
+
+	ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
+	if (unlikely(ret != 0))
+		return ret;
+
+	cmd = container_of(header, struct vmw_sid_cmd, header);
+	ret = vmw_cmd_sid_check(dev_priv, sw_context, &cmd->body.target.sid);
+	return ret;
+}
+
+static int vmw_cmd_surface_copy_check(struct vmw_private *dev_priv,
+				      struct vmw_sw_context *sw_context,
+				      SVGA3dCmdHeader *header)
+{
+	struct vmw_sid_cmd {
+		SVGA3dCmdHeader header;
+		SVGA3dCmdSurfaceCopy body;
+	} *cmd;
+	int ret;
+
+	cmd = container_of(header, struct vmw_sid_cmd, header);
+	ret = vmw_cmd_sid_check(dev_priv, sw_context, &cmd->body.src.sid);
+	if (unlikely(ret != 0))
+		return ret;
+	return vmw_cmd_sid_check(dev_priv, sw_context, &cmd->body.dest.sid);
+}
+
+static int vmw_cmd_stretch_blt_check(struct vmw_private *dev_priv,
+				     struct vmw_sw_context *sw_context,
+				     SVGA3dCmdHeader *header)
+{
+	struct vmw_sid_cmd {
+		SVGA3dCmdHeader header;
+		SVGA3dCmdSurfaceStretchBlt body;
+	} *cmd;
+	int ret;
+
+	cmd = container_of(header, struct vmw_sid_cmd, header);
+	ret = vmw_cmd_sid_check(dev_priv, sw_context, &cmd->body.src.sid);
+	if (unlikely(ret != 0))
+		return ret;
+	return vmw_cmd_sid_check(dev_priv, sw_context, &cmd->body.dest.sid);
+}
+
+static int vmw_cmd_blt_surf_screen_check(struct vmw_private *dev_priv,
+					 struct vmw_sw_context *sw_context,
+					 SVGA3dCmdHeader *header)
+{
+	struct vmw_sid_cmd {
+		SVGA3dCmdHeader header;
+		SVGA3dCmdBlitSurfaceToScreen body;
+	} *cmd;
+
+	cmd = container_of(header, struct vmw_sid_cmd, header);
+	return vmw_cmd_sid_check(dev_priv, sw_context, &cmd->body.srcImage.sid);
+}
+
+static int vmw_cmd_present_check(struct vmw_private *dev_priv,
+				 struct vmw_sw_context *sw_context,
+				 SVGA3dCmdHeader *header)
+{
+	struct vmw_sid_cmd {
+		SVGA3dCmdHeader header;
+		SVGA3dCmdPresent body;
+	} *cmd;
+
+	cmd = container_of(header, struct vmw_sid_cmd, header);
+	return vmw_cmd_sid_check(dev_priv, sw_context, &cmd->body.sid);
+}
+
+static int vmw_translate_guest_ptr(struct vmw_private *dev_priv,
+				   struct vmw_sw_context *sw_context,
+				   SVGAGuestPtr *ptr,
+				   struct vmw_dma_buffer **vmw_bo_p)
+{
+	struct vmw_dma_buffer *vmw_bo = NULL;
+	struct ttm_buffer_object *bo;
+	uint32_t handle = ptr->gmrId;
+	struct vmw_relocation *reloc;
+	uint32_t cur_validate_node;
+	struct ttm_validate_buffer *val_buf;
+	int ret;
+
+	ret = vmw_user_dmabuf_lookup(sw_context->tfile, handle, &vmw_bo);
+	if (unlikely(ret != 0)) {
+		DRM_ERROR("Could not find or use GMR region.\n");
+		return -EINVAL;
+	}
+	bo = &vmw_bo->base;
+
+	if (unlikely(sw_context->cur_reloc >= VMWGFX_MAX_RELOCATIONS)) {
+		DRM_ERROR("Max number relocations per submission"
+			  " exceeded\n");
+		ret = -EINVAL;
+		goto out_no_reloc;
+	}
+
+	reloc = &sw_context->relocs[sw_context->cur_reloc++];
+	reloc->location = ptr;
+
+	cur_validate_node = vmw_dmabuf_validate_node(bo, sw_context->cur_val_buf);
+	if (unlikely(cur_validate_node >= VMWGFX_MAX_GMRS)) {
+		DRM_ERROR("Max number of DMA buffers per submission"
+			  " exceeded.\n");
+		ret = -EINVAL;
+		goto out_no_reloc;
+	}
+
+	reloc->index = cur_validate_node;
+	if (unlikely(cur_validate_node == sw_context->cur_val_buf)) {
+		val_buf = &sw_context->val_bufs[cur_validate_node];
+		val_buf->bo = ttm_bo_reference(bo);
+		val_buf->new_sync_obj_arg = (void *) dev_priv;
+		list_add_tail(&val_buf->head, &sw_context->validate_nodes);
+		++sw_context->cur_val_buf;
+	}
+	*vmw_bo_p = vmw_bo;
+	return 0;
+
+out_no_reloc:
+	vmw_dmabuf_unreference(&vmw_bo);
+	vmw_bo_p = NULL;
+	return ret;
+}
+
+static int vmw_cmd_end_query(struct vmw_private *dev_priv,
+			     struct vmw_sw_context *sw_context,
+			     SVGA3dCmdHeader *header)
+{
+	struct vmw_dma_buffer *vmw_bo;
+	struct vmw_query_cmd {
+		SVGA3dCmdHeader header;
+		SVGA3dCmdEndQuery q;
+	} *cmd;
+	int ret;
+
+	cmd = container_of(header, struct vmw_query_cmd, header);
+	ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
+	if (unlikely(ret != 0))
+		return ret;
+
+	ret = vmw_translate_guest_ptr(dev_priv, sw_context,
+				      &cmd->q.guestResult,
+				      &vmw_bo);
+	if (unlikely(ret != 0))
+		return ret;
+
+	vmw_dmabuf_unreference(&vmw_bo);
+	return 0;
+}
+
+static int vmw_cmd_wait_query(struct vmw_private *dev_priv,
+			      struct vmw_sw_context *sw_context,
+			      SVGA3dCmdHeader *header)
+{
+	struct vmw_dma_buffer *vmw_bo;
+	struct vmw_query_cmd {
+		SVGA3dCmdHeader header;
+		SVGA3dCmdWaitForQuery q;
+	} *cmd;
+	int ret;
+
+	cmd = container_of(header, struct vmw_query_cmd, header);
+	ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
+	if (unlikely(ret != 0))
+		return ret;
+
+	ret = vmw_translate_guest_ptr(dev_priv, sw_context,
+				      &cmd->q.guestResult,
+				      &vmw_bo);
+	if (unlikely(ret != 0))
+		return ret;
+
+	vmw_dmabuf_unreference(&vmw_bo);
+	return 0;
+}
+
+
+static int vmw_cmd_dma(struct vmw_private *dev_priv,
+		       struct vmw_sw_context *sw_context,
+		       SVGA3dCmdHeader *header)
+{
+	struct vmw_dma_buffer *vmw_bo = NULL;
+	struct ttm_buffer_object *bo;
+	struct vmw_surface *srf = NULL;
+	struct vmw_dma_cmd {
+		SVGA3dCmdHeader header;
+		SVGA3dCmdSurfaceDMA dma;
+	} *cmd;
+	int ret;
+
+	cmd = container_of(header, struct vmw_dma_cmd, header);
+	ret = vmw_translate_guest_ptr(dev_priv, sw_context,
+				      &cmd->dma.guest.ptr,
+				      &vmw_bo);
+	if (unlikely(ret != 0))
+		return ret;
+
+	bo = &vmw_bo->base;
+	ret = vmw_user_surface_lookup_handle(dev_priv, sw_context->tfile,
+					     cmd->dma.host.sid, &srf);
+	if (ret) {
+		DRM_ERROR("could not find surface\n");
+		goto out_no_reloc;
+	}
+
+	/**
+	 * Patch command stream with device SID.
+	 */
+
+	cmd->dma.host.sid = srf->res.id;
+	vmw_kms_cursor_snoop(srf, sw_context->tfile, bo, header);
+	/**
+	 * FIXME: May deadlock here when called from the
+	 * command parsing code.
+	 */
+	vmw_surface_unreference(&srf);
+
+out_no_reloc:
+	vmw_dmabuf_unreference(&vmw_bo);
+	return ret;
+}
+
+static int vmw_cmd_draw(struct vmw_private *dev_priv,
+			struct vmw_sw_context *sw_context,
+			SVGA3dCmdHeader *header)
+{
+	struct vmw_draw_cmd {
+		SVGA3dCmdHeader header;
+		SVGA3dCmdDrawPrimitives body;
+	} *cmd;
+	SVGA3dVertexDecl *decl = (SVGA3dVertexDecl *)(
+		(unsigned long)header + sizeof(*cmd));
+	SVGA3dPrimitiveRange *range;
+	uint32_t i;
+	uint32_t maxnum;
+	int ret;
+
+	ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
+	if (unlikely(ret != 0))
+		return ret;
+
+	cmd = container_of(header, struct vmw_draw_cmd, header);
+	maxnum = (header->size - sizeof(cmd->body)) / sizeof(*decl);
+
+	if (unlikely(cmd->body.numVertexDecls > maxnum)) {
+		DRM_ERROR("Illegal number of vertex declarations.\n");
+		return -EINVAL;
+	}
+
+	for (i = 0; i < cmd->body.numVertexDecls; ++i, ++decl) {
+		ret = vmw_cmd_sid_check(dev_priv, sw_context,
+					&decl->array.surfaceId);
+		if (unlikely(ret != 0))
+			return ret;
+	}
+
+	maxnum = (header->size - sizeof(cmd->body) -
+		  cmd->body.numVertexDecls * sizeof(*decl)) / sizeof(*range);
+	if (unlikely(cmd->body.numRanges > maxnum)) {
+		DRM_ERROR("Illegal number of index ranges.\n");
+		return -EINVAL;
+	}
+
+	range = (SVGA3dPrimitiveRange *) decl;
+	for (i = 0; i < cmd->body.numRanges; ++i, ++range) {
+		ret = vmw_cmd_sid_check(dev_priv, sw_context,
+					&range->indexArray.surfaceId);
+		if (unlikely(ret != 0))
+			return ret;
+	}
+	return 0;
+}
+
+
+static int vmw_cmd_tex_state(struct vmw_private *dev_priv,
+			     struct vmw_sw_context *sw_context,
+			     SVGA3dCmdHeader *header)
+{
+	struct vmw_tex_state_cmd {
+		SVGA3dCmdHeader header;
+		SVGA3dCmdSetTextureState state;
+	};
+
+	SVGA3dTextureState *last_state = (SVGA3dTextureState *)
+	  ((unsigned long) header + header->size + sizeof(header));
+	SVGA3dTextureState *cur_state = (SVGA3dTextureState *)
+		((unsigned long) header + sizeof(struct vmw_tex_state_cmd));
+	int ret;
+
+	ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
+	if (unlikely(ret != 0))
+		return ret;
+
+	for (; cur_state < last_state; ++cur_state) {
+		if (likely(cur_state->name != SVGA3D_TS_BIND_TEXTURE))
+			continue;
+
+		ret = vmw_cmd_sid_check(dev_priv, sw_context,
+					&cur_state->value);
+		if (unlikely(ret != 0))
+			return ret;
+	}
+
+	return 0;
+}
+
+
+typedef int (*vmw_cmd_func) (struct vmw_private *,
+			     struct vmw_sw_context *,
+			     SVGA3dCmdHeader *);
+
+#define VMW_CMD_DEF(cmd, func) \
+	[cmd - SVGA_3D_CMD_BASE] = func
+
+static vmw_cmd_func vmw_cmd_funcs[SVGA_3D_CMD_MAX] = {
+	VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DEFINE, &vmw_cmd_invalid),
+	VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DESTROY, &vmw_cmd_invalid),
+	VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_COPY, &vmw_cmd_surface_copy_check),
+	VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_STRETCHBLT, &vmw_cmd_stretch_blt_check),
+	VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DMA, &vmw_cmd_dma),
+	VMW_CMD_DEF(SVGA_3D_CMD_CONTEXT_DEFINE, &vmw_cmd_invalid),
+	VMW_CMD_DEF(SVGA_3D_CMD_CONTEXT_DESTROY, &vmw_cmd_invalid),
+	VMW_CMD_DEF(SVGA_3D_CMD_SETTRANSFORM, &vmw_cmd_cid_check),
+	VMW_CMD_DEF(SVGA_3D_CMD_SETZRANGE, &vmw_cmd_cid_check),
+	VMW_CMD_DEF(SVGA_3D_CMD_SETRENDERSTATE, &vmw_cmd_cid_check),
+	VMW_CMD_DEF(SVGA_3D_CMD_SETRENDERTARGET,
+		    &vmw_cmd_set_render_target_check),
+	VMW_CMD_DEF(SVGA_3D_CMD_SETTEXTURESTATE, &vmw_cmd_tex_state),
+	VMW_CMD_DEF(SVGA_3D_CMD_SETMATERIAL, &vmw_cmd_cid_check),
+	VMW_CMD_DEF(SVGA_3D_CMD_SETLIGHTDATA, &vmw_cmd_cid_check),
+	VMW_CMD_DEF(SVGA_3D_CMD_SETLIGHTENABLED, &vmw_cmd_cid_check),
+	VMW_CMD_DEF(SVGA_3D_CMD_SETVIEWPORT, &vmw_cmd_cid_check),
+	VMW_CMD_DEF(SVGA_3D_CMD_SETCLIPPLANE, &vmw_cmd_cid_check),
+	VMW_CMD_DEF(SVGA_3D_CMD_CLEAR, &vmw_cmd_cid_check),
+	VMW_CMD_DEF(SVGA_3D_CMD_PRESENT, &vmw_cmd_present_check),
+	VMW_CMD_DEF(SVGA_3D_CMD_SHADER_DEFINE, &vmw_cmd_cid_check),
+	VMW_CMD_DEF(SVGA_3D_CMD_SHADER_DESTROY, &vmw_cmd_cid_check),
+	VMW_CMD_DEF(SVGA_3D_CMD_SET_SHADER, &vmw_cmd_cid_check),
+	VMW_CMD_DEF(SVGA_3D_CMD_SET_SHADER_CONST, &vmw_cmd_cid_check),
+	VMW_CMD_DEF(SVGA_3D_CMD_DRAW_PRIMITIVES, &vmw_cmd_draw),
+	VMW_CMD_DEF(SVGA_3D_CMD_SETSCISSORRECT, &vmw_cmd_cid_check),
+	VMW_CMD_DEF(SVGA_3D_CMD_BEGIN_QUERY, &vmw_cmd_cid_check),
+	VMW_CMD_DEF(SVGA_3D_CMD_END_QUERY, &vmw_cmd_end_query),
+	VMW_CMD_DEF(SVGA_3D_CMD_WAIT_FOR_QUERY, &vmw_cmd_wait_query),
+	VMW_CMD_DEF(SVGA_3D_CMD_PRESENT_READBACK, &vmw_cmd_ok),
+	VMW_CMD_DEF(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN,
+		    &vmw_cmd_blt_surf_screen_check)
+};
+
+static int vmw_cmd_check(struct vmw_private *dev_priv,
+			 struct vmw_sw_context *sw_context,
+			 void *buf, uint32_t *size)
+{
+	uint32_t cmd_id;
+	uint32_t size_remaining = *size;
+	SVGA3dCmdHeader *header = (SVGA3dCmdHeader *) buf;
+	int ret;
+
+	cmd_id = ((uint32_t *)buf)[0];
+	if (cmd_id == SVGA_CMD_UPDATE) {
+		*size = 5 << 2;
+		return 0;
+	}
+
+	cmd_id = le32_to_cpu(header->id);
+	*size = le32_to_cpu(header->size) + sizeof(SVGA3dCmdHeader);
+
+	cmd_id -= SVGA_3D_CMD_BASE;
+	if (unlikely(*size > size_remaining))
+		goto out_err;
+
+	if (unlikely(cmd_id >= SVGA_3D_CMD_MAX - SVGA_3D_CMD_BASE))
+		goto out_err;
+
+	ret = vmw_cmd_funcs[cmd_id](dev_priv, sw_context, header);
+	if (unlikely(ret != 0))
+		goto out_err;
+
+	return 0;
+out_err:
+	DRM_ERROR("Illegal / Invalid SVGA3D command: %d\n",
+		  cmd_id + SVGA_3D_CMD_BASE);
+	return -EINVAL;
+}
+
+static int vmw_cmd_check_all(struct vmw_private *dev_priv,
+			     struct vmw_sw_context *sw_context,
+			     void *buf, uint32_t size)
+{
+	int32_t cur_size = size;
+	int ret;
+
+	while (cur_size > 0) {
+		size = cur_size;
+		ret = vmw_cmd_check(dev_priv, sw_context, buf, &size);
+		if (unlikely(ret != 0))
+			return ret;
+		buf = (void *)((unsigned long) buf + size);
+		cur_size -= size;
+	}
+
+	if (unlikely(cur_size != 0)) {
+		DRM_ERROR("Command verifier out of sync.\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static void vmw_free_relocations(struct vmw_sw_context *sw_context)
+{
+	sw_context->cur_reloc = 0;
+}
+
+static void vmw_apply_relocations(struct vmw_sw_context *sw_context)
+{
+	uint32_t i;
+	struct vmw_relocation *reloc;
+	struct ttm_validate_buffer *validate;
+	struct ttm_buffer_object *bo;
+
+	for (i = 0; i < sw_context->cur_reloc; ++i) {
+		reloc = &sw_context->relocs[i];
+		validate = &sw_context->val_bufs[reloc->index];
+		bo = validate->bo;
+		reloc->location->offset += bo->offset;
+		reloc->location->gmrId = vmw_dmabuf_gmr(bo);
+	}
+	vmw_free_relocations(sw_context);
+}
+
+static void vmw_clear_validations(struct vmw_sw_context *sw_context)
+{
+	struct ttm_validate_buffer *entry, *next;
+
+	list_for_each_entry_safe(entry, next, &sw_context->validate_nodes,
+				 head) {
+		list_del(&entry->head);
+		vmw_dmabuf_validate_clear(entry->bo);
+		ttm_bo_unref(&entry->bo);
+		sw_context->cur_val_buf--;
+	}
+	BUG_ON(sw_context->cur_val_buf != 0);
+}
+
+static int vmw_validate_single_buffer(struct vmw_private *dev_priv,
+				      struct ttm_buffer_object *bo)
+{
+	int ret;
+
+	if (vmw_dmabuf_gmr(bo) != SVGA_GMR_NULL)
+		return 0;
+
+	/**
+	 * Put BO in VRAM, only if there is space.
+	 */
+
+	ret = ttm_bo_validate(bo, &vmw_vram_sys_placement, true, false);
+	if (unlikely(ret == -ERESTARTSYS))
+		return ret;
+
+	/**
+	 * Otherwise, set it up as GMR.
+	 */
+
+	if (vmw_dmabuf_gmr(bo) != SVGA_GMR_NULL)
+		return 0;
+
+	ret = vmw_gmr_bind(dev_priv, bo);
+	if (likely(ret == 0 || ret == -ERESTARTSYS))
+		return ret;
+
+	/**
+	 * If that failed, try VRAM again, this time evicting
+	 * previous contents.
+	 */
+
+	ret = ttm_bo_validate(bo, &vmw_vram_placement, true, false);
+	return ret;
+}
+
+
+static int vmw_validate_buffers(struct vmw_private *dev_priv,
+				struct vmw_sw_context *sw_context)
+{
+	struct ttm_validate_buffer *entry;
+	int ret;
+
+	list_for_each_entry(entry, &sw_context->validate_nodes, head) {
+		ret = vmw_validate_single_buffer(dev_priv, entry->bo);
+		if (unlikely(ret != 0))
+			return ret;
+	}
+	return 0;
+}
+
+int vmw_execbuf_ioctl(struct drm_device *dev, void *data,
+		      struct drm_file *file_priv)
+{
+	struct vmw_private *dev_priv = vmw_priv(dev);
+	struct drm_vmw_execbuf_arg *arg = (struct drm_vmw_execbuf_arg *)data;
+	struct drm_vmw_fence_rep fence_rep;
+	struct drm_vmw_fence_rep __user *user_fence_rep;
+	int ret;
+	void *user_cmd;
+	void *cmd;
+	uint32_t sequence;
+	struct vmw_sw_context *sw_context = &dev_priv->ctx;
+	struct vmw_master *vmaster = vmw_master(file_priv->master);
+
+	ret = ttm_read_lock(&vmaster->lock, true);
+	if (unlikely(ret != 0))
+		return ret;
+
+	ret = mutex_lock_interruptible(&dev_priv->cmdbuf_mutex);
+	if (unlikely(ret != 0)) {
+		ret = -ERESTARTSYS;
+		goto out_no_cmd_mutex;
+	}
+
+	cmd = vmw_fifo_reserve(dev_priv, arg->command_size);
+	if (unlikely(cmd == NULL)) {
+		DRM_ERROR("Failed reserving fifo space for commands.\n");
+		ret = -ENOMEM;
+		goto out_unlock;
+	}
+
+	user_cmd = (void __user *)(unsigned long)arg->commands;
+	ret = copy_from_user(cmd, user_cmd, arg->command_size);
+
+	if (unlikely(ret != 0)) {
+		DRM_ERROR("Failed copying commands.\n");
+		goto out_commit;
+	}
+
+	sw_context->tfile = vmw_fpriv(file_priv)->tfile;
+	sw_context->cid_valid = false;
+	sw_context->sid_valid = false;
+	sw_context->cur_reloc = 0;
+	sw_context->cur_val_buf = 0;
+
+	INIT_LIST_HEAD(&sw_context->validate_nodes);
+
+	ret = vmw_cmd_check_all(dev_priv, sw_context, cmd, arg->command_size);
+	if (unlikely(ret != 0))
+		goto out_err;
+	ret = ttm_eu_reserve_buffers(&sw_context->validate_nodes,
+				     dev_priv->val_seq++);
+	if (unlikely(ret != 0))
+		goto out_err;
+
+	ret = vmw_validate_buffers(dev_priv, sw_context);
+	if (unlikely(ret != 0))
+		goto out_err;
+
+	vmw_apply_relocations(sw_context);
+	vmw_fifo_commit(dev_priv, arg->command_size);
+
+	ret = vmw_fifo_send_fence(dev_priv, &sequence);
+
+	ttm_eu_fence_buffer_objects(&sw_context->validate_nodes,
+				    (void *)(unsigned long) sequence);
+	vmw_clear_validations(sw_context);
+	mutex_unlock(&dev_priv->cmdbuf_mutex);
+
+	/*
+	 * This error is harmless, because if fence submission fails,
+	 * vmw_fifo_send_fence will sync.
+	 */
+
+	if (ret != 0)
+		DRM_ERROR("Fence submission error. Syncing.\n");
+
+	fence_rep.error = ret;
+	fence_rep.fence_seq = (uint64_t) sequence;
+
+	user_fence_rep = (struct drm_vmw_fence_rep __user *)
+	    (unsigned long)arg->fence_rep;
+
+	/*
+	 * copy_to_user errors will be detected by user space not
+	 * seeing fence_rep::error filled in.
+	 */
+
+	ret = copy_to_user(user_fence_rep, &fence_rep, sizeof(fence_rep));
+
+	vmw_kms_cursor_post_execbuf(dev_priv);
+	ttm_read_unlock(&vmaster->lock);
+	return 0;
+out_err:
+	vmw_free_relocations(sw_context);
+	ttm_eu_backoff_reservation(&sw_context->validate_nodes);
+	vmw_clear_validations(sw_context);
+out_commit:
+	vmw_fifo_commit(dev_priv, 0);
+out_unlock:
+	mutex_unlock(&dev_priv->cmdbuf_mutex);
+out_no_cmd_mutex:
+	ttm_read_unlock(&vmaster->lock);
+	return ret;
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h
@@ -0,0 +1,102 @@
+/**************************************************************************
+ *
+ * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **************************************************************************/
+
+#ifndef VMWGFX_KMS_H_
+#define VMWGFX_KMS_H_
+
+#include "drmP.h"
+#include "vmwgfx_drv.h"
+
+
+#define vmw_framebuffer_to_vfb(x) \
+	container_of(x, struct vmw_framebuffer, base)
+
+/**
+ * Base class for framebuffers
+ *
+ * @pin is called the when ever a crtc uses this framebuffer
+ * @unpin is called
+ */
+struct vmw_framebuffer {
+	struct drm_framebuffer base;
+	int (*pin)(struct vmw_framebuffer *fb);
+	int (*unpin)(struct vmw_framebuffer *fb);
+};
+
+
+#define vmw_crtc_to_du(x) \
+	container_of(x, struct vmw_display_unit, crtc)
+
+/*
+ * Basic cursor manipulation
+ */
+int vmw_cursor_update_image(struct vmw_private *dev_priv,
+			    u32 *image, u32 width, u32 height,
+			    u32 hotspotX, u32 hotspotY);
+void vmw_cursor_update_position(struct vmw_private *dev_priv,
+				bool show, int x, int y);
+
+/**
+ * Base class display unit.
+ *
+ * Since the SVGA hw doesn't have a concept of a crtc, encoder or connector
+ * so the display unit is all of them at the same time. This is true for both
+ * legacy multimon and screen objects.
+ */
+struct vmw_display_unit {
+	struct drm_crtc crtc;
+	struct drm_encoder encoder;
+	struct drm_connector connector;
+
+	struct vmw_surface *cursor_surface;
+	struct vmw_dma_buffer *cursor_dmabuf;
+	size_t cursor_age;
+
+	int cursor_x;
+	int cursor_y;
+
+	int hotspot_x;
+	int hotspot_y;
+
+	unsigned unit;
+};
+
+/*
+ * Shared display unit functions - vmwgfx_kms.c
+ */
+void vmw_display_unit_cleanup(struct vmw_display_unit *du);
+int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
+			   uint32_t handle, uint32_t width, uint32_t height);
+int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y);
+
+/*
+ * Legacy display unit functions - vmwgfx_ldu.h
+ */
+int vmw_kms_init_legacy_display_system(struct vmw_private *dev_priv);
+int vmw_kms_close_legacy_display_system(struct vmw_private *dev_priv);
+
+#endif
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
@@ -0,0 +1,880 @@
+/**************************************************************************
+ *
+ * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **************************************************************************/
+
+#include "vmwgfx_kms.h"
+
+/* Might need a hrtimer here? */
+#define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
+
+
+void vmw_display_unit_cleanup(struct vmw_display_unit *du)
+{
+	if (du->cursor_surface)
+		vmw_surface_unreference(&du->cursor_surface);
+	if (du->cursor_dmabuf)
+		vmw_dmabuf_unreference(&du->cursor_dmabuf);
+	drm_crtc_cleanup(&du->crtc);
+	drm_encoder_cleanup(&du->encoder);
+	drm_connector_cleanup(&du->connector);
+}
+
+/*
+ * Display Unit Cursor functions
+ */
+
+int vmw_cursor_update_image(struct vmw_private *dev_priv,
+			    u32 *image, u32 width, u32 height,
+			    u32 hotspotX, u32 hotspotY)
+{
+	struct {
+		u32 cmd;
+		SVGAFifoCmdDefineAlphaCursor cursor;
+	} *cmd;
+	u32 image_size = width * height * 4;
+	u32 cmd_size = sizeof(*cmd) + image_size;
+
+	if (!image)
+		return -EINVAL;
+
+	cmd = vmw_fifo_reserve(dev_priv, cmd_size);
+	if (unlikely(cmd == NULL)) {
+		DRM_ERROR("Fifo reserve failed.\n");
+		return -ENOMEM;
+	}
+
+	memset(cmd, 0, sizeof(*cmd));
+
+	memcpy(&cmd[1], image, image_size);
+
+	cmd->cmd = cpu_to_le32(SVGA_CMD_DEFINE_ALPHA_CURSOR);
+	cmd->cursor.id = cpu_to_le32(0);
+	cmd->cursor.width = cpu_to_le32(width);
+	cmd->cursor.height = cpu_to_le32(height);
+	cmd->cursor.hotspotX = cpu_to_le32(hotspotX);
+	cmd->cursor.hotspotY = cpu_to_le32(hotspotY);
+
+	vmw_fifo_commit(dev_priv, cmd_size);
+
+	return 0;
+}
+
+void vmw_cursor_update_position(struct vmw_private *dev_priv,
+				bool show, int x, int y)
+{
+	__le32 __iomem *fifo_mem = dev_priv->mmio_virt;
+	uint32_t count;
+
+	iowrite32(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON);
+	iowrite32(x, fifo_mem + SVGA_FIFO_CURSOR_X);
+	iowrite32(y, fifo_mem + SVGA_FIFO_CURSOR_Y);
+	count = ioread32(fifo_mem + SVGA_FIFO_CURSOR_COUNT);
+	iowrite32(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT);
+}
+
+int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
+			   uint32_t handle, uint32_t width, uint32_t height)
+{
+	struct vmw_private *dev_priv = vmw_priv(crtc->dev);
+	struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
+	struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
+	struct vmw_surface *surface = NULL;
+	struct vmw_dma_buffer *dmabuf = NULL;
+	int ret;
+
+	if (handle) {
+		ret = vmw_user_surface_lookup_handle(dev_priv, tfile,
+						     handle, &surface);
+		if (!ret) {
+			if (!surface->snooper.image) {
+				DRM_ERROR("surface not suitable for cursor\n");
+				return -EINVAL;
+			}
+		} else {
+			ret = vmw_user_dmabuf_lookup(tfile,
+						     handle, &dmabuf);
+			if (ret) {
+				DRM_ERROR("failed to find surface or dmabuf: %i\n", ret);
+				return -EINVAL;
+			}
+		}
+	}
+
+	/* takedown old cursor */
+	if (du->cursor_surface) {
+		du->cursor_surface->snooper.crtc = NULL;
+		vmw_surface_unreference(&du->cursor_surface);
+	}
+	if (du->cursor_dmabuf)
+		vmw_dmabuf_unreference(&du->cursor_dmabuf);
+
+	/* setup new image */
+	if (surface) {
+		/* vmw_user_surface_lookup takes one reference */
+		du->cursor_surface = surface;
+
+		du->cursor_surface->snooper.crtc = crtc;
+		du->cursor_age = du->cursor_surface->snooper.age;
+		vmw_cursor_update_image(dev_priv, surface->snooper.image,
+					64, 64, du->hotspot_x, du->hotspot_y);
+	} else if (dmabuf) {
+		struct ttm_bo_kmap_obj map;
+		unsigned long kmap_offset;
+		unsigned long kmap_num;
+		void *virtual;
+		bool dummy;
+
+		/* vmw_user_surface_lookup takes one reference */
+		du->cursor_dmabuf = dmabuf;
+
+		kmap_offset = 0;
+		kmap_num = (64*64*4) >> PAGE_SHIFT;
+
+		ret = ttm_bo_reserve(&dmabuf->base, true, false, false, 0);
+		if (unlikely(ret != 0)) {
+			DRM_ERROR("reserve failed\n");
+			return -EINVAL;
+		}
+
+		ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map);
+		if (unlikely(ret != 0))
+			goto err_unreserve;
+
+		virtual = ttm_kmap_obj_virtual(&map, &dummy);
+		vmw_cursor_update_image(dev_priv, virtual, 64, 64,
+					du->hotspot_x, du->hotspot_y);
+
+		ttm_bo_kunmap(&map);
+err_unreserve:
+		ttm_bo_unreserve(&dmabuf->base);
+
+	} else {
+		vmw_cursor_update_position(dev_priv, false, 0, 0);
+		return 0;
+	}
+
+	vmw_cursor_update_position(dev_priv, true, du->cursor_x, du->cursor_y);
+
+	return 0;
+}
+
+int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
+{
+	struct vmw_private *dev_priv = vmw_priv(crtc->dev);
+	struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
+	bool shown = du->cursor_surface || du->cursor_dmabuf ? true : false;
+
+	du->cursor_x = x + crtc->x;
+	du->cursor_y = y + crtc->y;
+
+	vmw_cursor_update_position(dev_priv, shown,
+				   du->cursor_x, du->cursor_y);
+
+	return 0;
+}
+
+void vmw_kms_cursor_snoop(struct vmw_surface *srf,
+			  struct ttm_object_file *tfile,
+			  struct ttm_buffer_object *bo,
+			  SVGA3dCmdHeader *header)
+{
+	struct ttm_bo_kmap_obj map;
+	unsigned long kmap_offset;
+	unsigned long kmap_num;
+	SVGA3dCopyBox *box;
+	unsigned box_count;
+	void *virtual;
+	bool dummy;
+	struct vmw_dma_cmd {
+		SVGA3dCmdHeader header;
+		SVGA3dCmdSurfaceDMA dma;
+	} *cmd;
+	int ret;
+
+	cmd = container_of(header, struct vmw_dma_cmd, header);
+
+	/* No snooper installed */
+	if (!srf->snooper.image)
+		return;
+
+	if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) {
+		DRM_ERROR("face and mipmap for cursors should never != 0\n");
+		return;
+	}
+
+	if (cmd->header.size < 64) {
+		DRM_ERROR("at least one full copy box must be given\n");
+		return;
+	}
+
+	box = (SVGA3dCopyBox *)&cmd[1];
+	box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) /
+			sizeof(SVGA3dCopyBox);
+
+	if (cmd->dma.guest.pitch != (64 * 4) ||
+	    cmd->dma.guest.ptr.offset % PAGE_SIZE ||
+	    box->x != 0    || box->y != 0    || box->z != 0    ||
+	    box->srcx != 0 || box->srcy != 0 || box->srcz != 0 ||
+	    box->w != 64   || box->h != 64   || box->d != 1    ||
+	    box_count != 1) {
+		/* TODO handle none page aligned offsets */
+		/* TODO handle partial uploads and pitch != 256 */
+		/* TODO handle more then one copy (size != 64) */
+		DRM_ERROR("lazy programer, cant handle wierd stuff\n");
+		return;
+	}
+
+	kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT;
+	kmap_num = (64*64*4) >> PAGE_SHIFT;
+
+	ret = ttm_bo_reserve(bo, true, false, false, 0);
+	if (unlikely(ret != 0)) {
+		DRM_ERROR("reserve failed\n");
+		return;
+	}
+
+	ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map);
+	if (unlikely(ret != 0))
+		goto err_unreserve;
+
+	virtual = ttm_kmap_obj_virtual(&map, &dummy);
+
+	memcpy(srf->snooper.image, virtual, 64*64*4);
+	srf->snooper.age++;
+
+	/* we can't call this function from this function since execbuf has
+	 * reserved fifo space.
+	 *
+	 * if (srf->snooper.crtc)
+	 *	vmw_ldu_crtc_cursor_update_image(dev_priv,
+	 *					 srf->snooper.image, 64, 64,
+	 *					 du->hotspot_x, du->hotspot_y);
+	 */
+
+	ttm_bo_kunmap(&map);
+err_unreserve:
+	ttm_bo_unreserve(bo);
+}
+
+void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
+{
+	struct drm_device *dev = dev_priv->dev;
+	struct vmw_display_unit *du;
+	struct drm_crtc *crtc;
+
+	mutex_lock(&dev->mode_config.mutex);
+
+	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
+		du = vmw_crtc_to_du(crtc);
+		if (!du->cursor_surface ||
+		    du->cursor_age == du->cursor_surface->snooper.age)
+			continue;
+
+		du->cursor_age = du->cursor_surface->snooper.age;
+		vmw_cursor_update_image(dev_priv,
+					du->cursor_surface->snooper.image,
+					64, 64, du->hotspot_x, du->hotspot_y);
+	}
+
+	mutex_unlock(&dev->mode_config.mutex);
+}
+
+/*
+ * Generic framebuffer code
+ */
+
+int vmw_framebuffer_create_handle(struct drm_framebuffer *fb,
+				  struct drm_file *file_priv,
+				  unsigned int *handle)
+{
+	if (handle)
+		handle = 0;
+
+	return 0;
+}
+
+/*
+ * Surface framebuffer code
+ */
+
+#define vmw_framebuffer_to_vfbs(x) \
+	container_of(x, struct vmw_framebuffer_surface, base.base)
+
+struct vmw_framebuffer_surface {
+	struct vmw_framebuffer base;
+	struct vmw_surface *surface;
+	struct delayed_work d_work;
+	struct mutex work_lock;
+	bool present_fs;
+};
+
+void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer)
+{
+	struct vmw_framebuffer_surface *vfb =
+		vmw_framebuffer_to_vfbs(framebuffer);
+
+	cancel_delayed_work_sync(&vfb->d_work);
+	drm_framebuffer_cleanup(framebuffer);
+	vmw_surface_unreference(&vfb->surface);
+
+	kfree(framebuffer);
+}
+
+static void vmw_framebuffer_present_fs_callback(struct work_struct *work)
+{
+	struct delayed_work *d_work =
+		container_of(work, struct delayed_work, work);
+	struct vmw_framebuffer_surface *vfbs =
+		container_of(d_work, struct vmw_framebuffer_surface, d_work);
+	struct vmw_surface *surf = vfbs->surface;
+	struct drm_framebuffer *framebuffer = &vfbs->base.base;
+	struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
+
+	struct {
+		SVGA3dCmdHeader header;
+		SVGA3dCmdPresent body;
+		SVGA3dCopyRect cr;
+	} *cmd;
+
+	mutex_lock(&vfbs->work_lock);
+	if (!vfbs->present_fs)
+		goto out_unlock;
+
+	cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
+	if (unlikely(cmd == NULL))
+		goto out_resched;
+
+	cmd->header.id = cpu_to_le32(SVGA_3D_CMD_PRESENT);
+	cmd->header.size = cpu_to_le32(sizeof(cmd->body) + sizeof(cmd->cr));
+	cmd->body.sid = cpu_to_le32(surf->res.id);
+	cmd->cr.x = cpu_to_le32(0);
+	cmd->cr.y = cpu_to_le32(0);
+	cmd->cr.srcx = cmd->cr.x;
+	cmd->cr.srcy = cmd->cr.y;
+	cmd->cr.w = cpu_to_le32(framebuffer->width);
+	cmd->cr.h = cpu_to_le32(framebuffer->height);
+	vfbs->present_fs = false;
+	vmw_fifo_commit(dev_priv, sizeof(*cmd));
+out_resched:
+	/**
+	 * Will not re-add if already pending.
+	 */
+	schedule_delayed_work(&vfbs->d_work, VMWGFX_PRESENT_RATE);
+out_unlock:
+	mutex_unlock(&vfbs->work_lock);
+}
+
+
+int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer,
+				  unsigned flags, unsigned color,
+				  struct drm_clip_rect *clips,
+				  unsigned num_clips)
+{
+	struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
+	struct vmw_framebuffer_surface *vfbs =
+		vmw_framebuffer_to_vfbs(framebuffer);
+	struct vmw_surface *surf = vfbs->surface;
+	struct drm_clip_rect norect;
+	SVGA3dCopyRect *cr;
+	int i, inc = 1;
+
+	struct {
+		SVGA3dCmdHeader header;
+		SVGA3dCmdPresent body;
+		SVGA3dCopyRect cr;
+	} *cmd;
+
+	if (!num_clips ||
+	    !(dev_priv->fifo.capabilities &
+	      SVGA_FIFO_CAP_SCREEN_OBJECT)) {
+		int ret;
+
+		mutex_lock(&vfbs->work_lock);
+		vfbs->present_fs = true;
+		ret = schedule_delayed_work(&vfbs->d_work, VMWGFX_PRESENT_RATE);
+		mutex_unlock(&vfbs->work_lock);
+		if (ret) {
+			/**
+			 * No work pending, Force immediate present.
+			 */
+			vmw_framebuffer_present_fs_callback(&vfbs->d_work.work);
+		}
+		return 0;
+	}
+
+	if (!num_clips) {
+		num_clips = 1;
+		clips = &norect;
+		norect.x1 = norect.y1 = 0;
+		norect.x2 = framebuffer->width;
+		norect.y2 = framebuffer->height;
+	} else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
+		num_clips /= 2;
+		inc = 2; /* skip source rects */
+	}
+
+	cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd) + (num_clips - 1) * sizeof(cmd->cr));
+	if (unlikely(cmd == NULL)) {
+		DRM_ERROR("Fifo reserve failed.\n");
+		return -ENOMEM;
+	}
+
+	memset(cmd, 0, sizeof(*cmd));
+
+	cmd->header.id = cpu_to_le32(SVGA_3D_CMD_PRESENT);
+	cmd->header.size = cpu_to_le32(sizeof(cmd->body) + num_clips * sizeof(cmd->cr));
+	cmd->body.sid = cpu_to_le32(surf->res.id);
+
+	for (i = 0, cr = &cmd->cr; i < num_clips; i++, cr++, clips += inc) {
+		cr->x = cpu_to_le16(clips->x1);
+		cr->y = cpu_to_le16(clips->y1);
+		cr->srcx = cr->x;
+		cr->srcy = cr->y;
+		cr->w = cpu_to_le16(clips->x2 - clips->x1);
+		cr->h = cpu_to_le16(clips->y2 - clips->y1);
+	}
+
+	vmw_fifo_commit(dev_priv, sizeof(*cmd) + (num_clips - 1) * sizeof(cmd->cr));
+
+	return 0;
+}
+
+static struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = {
+	.destroy = vmw_framebuffer_surface_destroy,
+	.dirty = vmw_framebuffer_surface_dirty,
+	.create_handle = vmw_framebuffer_create_handle,
+};
+
+int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
+				    struct vmw_surface *surface,
+				    struct vmw_framebuffer **out,
+				    unsigned width, unsigned height)
+
+{
+	struct drm_device *dev = dev_priv->dev;
+	struct vmw_framebuffer_surface *vfbs;
+	int ret;
+
+	vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL);
+	if (!vfbs) {
+		ret = -ENOMEM;
+		goto out_err1;
+	}
+
+	ret = drm_framebuffer_init(dev, &vfbs->base.base,
+				   &vmw_framebuffer_surface_funcs);
+	if (ret)
+		goto out_err2;
+
+	if (!vmw_surface_reference(surface)) {
+		DRM_ERROR("failed to reference surface %p\n", surface);
+		goto out_err3;
+	}
+
+	/* XXX get the first 3 from the surface info */
+	vfbs->base.base.bits_per_pixel = 32;
+	vfbs->base.base.pitch = width * 32 / 4;
+	vfbs->base.base.depth = 24;
+	vfbs->base.base.width = width;
+	vfbs->base.base.height = height;
+	vfbs->base.pin = NULL;
+	vfbs->base.unpin = NULL;
+	vfbs->surface = surface;
+	mutex_init(&vfbs->work_lock);
+	INIT_DELAYED_WORK(&vfbs->d_work, &vmw_framebuffer_present_fs_callback);
+	*out = &vfbs->base;
+
+	return 0;
+
+out_err3:
+	drm_framebuffer_cleanup(&vfbs->base.base);
+out_err2:
+	kfree(vfbs);
+out_err1:
+	return ret;
+}
+
+/*
+ * Dmabuf framebuffer code
+ */
+
+#define vmw_framebuffer_to_vfbd(x) \
+	container_of(x, struct vmw_framebuffer_dmabuf, base.base)
+
+struct vmw_framebuffer_dmabuf {
+	struct vmw_framebuffer base;
+	struct vmw_dma_buffer *buffer;
+};
+
+void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer)
+{
+	struct vmw_framebuffer_dmabuf *vfbd =
+		vmw_framebuffer_to_vfbd(framebuffer);
+
+	drm_framebuffer_cleanup(framebuffer);
+	vmw_dmabuf_unreference(&vfbd->buffer);
+
+	kfree(vfbd);
+}
+
+int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer,
+				 unsigned flags, unsigned color,
+				 struct drm_clip_rect *clips,
+				 unsigned num_clips)
+{
+	struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
+	struct drm_clip_rect norect;
+	struct {
+		uint32_t header;
+		SVGAFifoCmdUpdate body;
+	} *cmd;
+	int i, increment = 1;
+
+	if (!num_clips) {
+		num_clips = 1;
+		clips = &norect;
+		norect.x1 = norect.y1 = 0;
+		norect.x2 = framebuffer->width;
+		norect.y2 = framebuffer->height;
+	} else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
+		num_clips /= 2;
+		increment = 2;
+	}
+
+	cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd) * num_clips);
+	if (unlikely(cmd == NULL)) {
+		DRM_ERROR("Fifo reserve failed.\n");
+		return -ENOMEM;
+	}
+
+	for (i = 0; i < num_clips; i++, clips += increment) {
+		cmd[i].header = cpu_to_le32(SVGA_CMD_UPDATE);
+		cmd[i].body.x = cpu_to_le32(clips->x1);
+		cmd[i].body.y = cpu_to_le32(clips->y1);
+		cmd[i].body.width = cpu_to_le32(clips->x2 - clips->x1);
+		cmd[i].body.height = cpu_to_le32(clips->y2 - clips->y1);
+	}
+
+	vmw_fifo_commit(dev_priv, sizeof(*cmd) * num_clips);
+
+	return 0;
+}
+
+static struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs = {
+	.destroy = vmw_framebuffer_dmabuf_destroy,
+	.dirty = vmw_framebuffer_dmabuf_dirty,
+	.create_handle = vmw_framebuffer_create_handle,
+};
+
+static int vmw_framebuffer_dmabuf_pin(struct vmw_framebuffer *vfb)
+{
+	struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
+	struct vmw_framebuffer_dmabuf *vfbd =
+		vmw_framebuffer_to_vfbd(&vfb->base);
+	int ret;
+
+	vmw_overlay_pause_all(dev_priv);
+
+	ret = vmw_dmabuf_to_start_of_vram(dev_priv, vfbd->buffer);
+
+	if (dev_priv->capabilities & SVGA_CAP_MULTIMON) {
+		vmw_write(dev_priv, SVGA_REG_NUM_GUEST_DISPLAYS, 1);
+		vmw_write(dev_priv, SVGA_REG_DISPLAY_ID, 0);
+		vmw_write(dev_priv, SVGA_REG_DISPLAY_IS_PRIMARY, true);
+		vmw_write(dev_priv, SVGA_REG_DISPLAY_POSITION_X, 0);
+		vmw_write(dev_priv, SVGA_REG_DISPLAY_POSITION_Y, 0);
+		vmw_write(dev_priv, SVGA_REG_DISPLAY_WIDTH, 0);
+		vmw_write(dev_priv, SVGA_REG_DISPLAY_HEIGHT, 0);
+		vmw_write(dev_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
+
+		vmw_write(dev_priv, SVGA_REG_ENABLE, 1);
+		vmw_write(dev_priv, SVGA_REG_WIDTH, vfb->base.width);
+		vmw_write(dev_priv, SVGA_REG_HEIGHT, vfb->base.height);
+		vmw_write(dev_priv, SVGA_REG_BITS_PER_PIXEL, vfb->base.bits_per_pixel);
+		vmw_write(dev_priv, SVGA_REG_DEPTH, vfb->base.depth);
+		vmw_write(dev_priv, SVGA_REG_RED_MASK, 0x00ff0000);
+		vmw_write(dev_priv, SVGA_REG_GREEN_MASK, 0x0000ff00);
+		vmw_write(dev_priv, SVGA_REG_BLUE_MASK, 0x000000ff);
+	} else
+		WARN_ON(true);
+
+	vmw_overlay_resume_all(dev_priv);
+
+	return 0;
+}
+
+static int vmw_framebuffer_dmabuf_unpin(struct vmw_framebuffer *vfb)
+{
+	struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
+	struct vmw_framebuffer_dmabuf *vfbd =
+		vmw_framebuffer_to_vfbd(&vfb->base);
+
+	if (!vfbd->buffer) {
+		WARN_ON(!vfbd->buffer);
+		return 0;
+	}
+
+	return vmw_dmabuf_from_vram(dev_priv, vfbd->buffer);
+}
+
+int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv,
+				   struct vmw_dma_buffer *dmabuf,
+				   struct vmw_framebuffer **out,
+				   unsigned width, unsigned height)
+
+{
+	struct drm_device *dev = dev_priv->dev;
+	struct vmw_framebuffer_dmabuf *vfbd;
+	int ret;
+
+	vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL);
+	if (!vfbd) {
+		ret = -ENOMEM;
+		goto out_err1;
+	}
+
+	ret = drm_framebuffer_init(dev, &vfbd->base.base,
+				   &vmw_framebuffer_dmabuf_funcs);
+	if (ret)
+		goto out_err2;
+
+	if (!vmw_dmabuf_reference(dmabuf)) {
+		DRM_ERROR("failed to reference dmabuf %p\n", dmabuf);
+		goto out_err3;
+	}
+
+	/* XXX get the first 3 from the surface info */
+	vfbd->base.base.bits_per_pixel = 32;
+	vfbd->base.base.pitch = width * 32 / 4;
+	vfbd->base.base.depth = 24;
+	vfbd->base.base.width = width;
+	vfbd->base.base.height = height;
+	vfbd->base.pin = vmw_framebuffer_dmabuf_pin;
+	vfbd->base.unpin = vmw_framebuffer_dmabuf_unpin;
+	vfbd->buffer = dmabuf;
+	*out = &vfbd->base;
+
+	return 0;
+
+out_err3:
+	drm_framebuffer_cleanup(&vfbd->base.base);
+out_err2:
+	kfree(vfbd);
+out_err1:
+	return ret;
+}
+
+/*
+ * Generic Kernel modesetting functions
+ */
+
+static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
+						 struct drm_file *file_priv,
+						 struct drm_mode_fb_cmd *mode_cmd)
+{
+	struct vmw_private *dev_priv = vmw_priv(dev);
+	struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
+	struct vmw_framebuffer *vfb = NULL;
+	struct vmw_surface *surface = NULL;
+	struct vmw_dma_buffer *bo = NULL;
+	int ret;
+
+	ret = vmw_user_surface_lookup_handle(dev_priv, tfile,
+					     mode_cmd->handle, &surface);
+	if (ret)
+		goto try_dmabuf;
+
+	if (!surface->scanout)
+		goto err_not_scanout;
+
+	ret = vmw_kms_new_framebuffer_surface(dev_priv, surface, &vfb,
+					      mode_cmd->width, mode_cmd->height);
+
+	/* vmw_user_surface_lookup takes one ref so does new_fb */
+	vmw_surface_unreference(&surface);
+
+	if (ret) {
+		DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
+		return NULL;
+	}
+	return &vfb->base;
+
+try_dmabuf:
+	DRM_INFO("%s: trying buffer\n", __func__);
+
+	ret = vmw_user_dmabuf_lookup(tfile, mode_cmd->handle, &bo);
+	if (ret) {
+		DRM_ERROR("failed to find buffer: %i\n", ret);
+		return NULL;
+	}
+
+	ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, bo, &vfb,
+					     mode_cmd->width, mode_cmd->height);
+
+	/* vmw_user_dmabuf_lookup takes one ref so does new_fb */
+	vmw_dmabuf_unreference(&bo);
+
+	if (ret) {
+		DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
+		return NULL;
+	}
+
+	return &vfb->base;
+
+err_not_scanout:
+	DRM_ERROR("surface not marked as scanout\n");
+	/* vmw_user_surface_lookup takes one ref */
+	vmw_surface_unreference(&surface);
+
+	return NULL;
+}
+
+static int vmw_kms_fb_changed(struct drm_device *dev)
+{
+	return 0;
+}
+
+static struct drm_mode_config_funcs vmw_kms_funcs = {
+	.fb_create = vmw_kms_fb_create,
+	.fb_changed = vmw_kms_fb_changed,
+};
+
+int vmw_kms_init(struct vmw_private *dev_priv)
+{
+	struct drm_device *dev = dev_priv->dev;
+	int ret;
+
+	drm_mode_config_init(dev);
+	dev->mode_config.funcs = &vmw_kms_funcs;
+	dev->mode_config.min_width = 1;
+	dev->mode_config.min_height = 1;
+	dev->mode_config.max_width = dev_priv->fb_max_width;
+	dev->mode_config.max_height = dev_priv->fb_max_height;
+
+	ret = vmw_kms_init_legacy_display_system(dev_priv);
+
+	return 0;
+}
+
+int vmw_kms_close(struct vmw_private *dev_priv)
+{
+	/*
+	 * Docs says we should take the lock before calling this function
+	 * but since it destroys encoders and our destructor calls
+	 * drm_encoder_cleanup which takes the lock we deadlock.
+	 */
+	drm_mode_config_cleanup(dev_priv->dev);
+	vmw_kms_close_legacy_display_system(dev_priv);
+	return 0;
+}
+
+int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
+				struct drm_file *file_priv)
+{
+	struct drm_vmw_cursor_bypass_arg *arg = data;
+	struct vmw_display_unit *du;
+	struct drm_mode_object *obj;
+	struct drm_crtc *crtc;
+	int ret = 0;
+
+
+	mutex_lock(&dev->mode_config.mutex);
+	if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) {
+
+		list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
+			du = vmw_crtc_to_du(crtc);
+			du->hotspot_x = arg->xhot;
+			du->hotspot_y = arg->yhot;
+		}
+
+		mutex_unlock(&dev->mode_config.mutex);
+		return 0;
+	}
+
+	obj = drm_mode_object_find(dev, arg->crtc_id, DRM_MODE_OBJECT_CRTC);
+	if (!obj) {
+		ret = -EINVAL;
+		goto out;
+	}
+
+	crtc = obj_to_crtc(obj);
+	du = vmw_crtc_to_du(crtc);
+
+	du->hotspot_x = arg->xhot;
+	du->hotspot_y = arg->yhot;
+
+out:
+	mutex_unlock(&dev->mode_config.mutex);
+
+	return ret;
+}
+
+int vmw_kms_save_vga(struct vmw_private *vmw_priv)
+{
+	/*
+	 * setup a single multimon monitor with the size
+	 * of 0x0, this stops the UI from resizing when we
+	 * change the framebuffer size
+	 */
+	if (vmw_priv->capabilities & SVGA_CAP_MULTIMON) {
+		vmw_write(vmw_priv, SVGA_REG_NUM_GUEST_DISPLAYS, 1);
+		vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, 0);
+		vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, true);
+		vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, 0);
+		vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, 0);
+		vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, 0);
+		vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, 0);
+		vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
+	}
+
+	vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH);
+	vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT);
+	vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL);
+	vmw_priv->vga_depth = vmw_read(vmw_priv, SVGA_REG_DEPTH);
+	vmw_priv->vga_pseudo = vmw_read(vmw_priv, SVGA_REG_PSEUDOCOLOR);
+	vmw_priv->vga_red_mask = vmw_read(vmw_priv, SVGA_REG_RED_MASK);
+	vmw_priv->vga_green_mask = vmw_read(vmw_priv, SVGA_REG_GREEN_MASK);
+	vmw_priv->vga_blue_mask = vmw_read(vmw_priv, SVGA_REG_BLUE_MASK);
+
+	return 0;
+}
+
+int vmw_kms_restore_vga(struct vmw_private *vmw_priv)
+{
+	vmw_write(vmw_priv, SVGA_REG_WIDTH, vmw_priv->vga_width);
+	vmw_write(vmw_priv, SVGA_REG_HEIGHT, vmw_priv->vga_height);
+	vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, vmw_priv->vga_bpp);
+	vmw_write(vmw_priv, SVGA_REG_DEPTH, vmw_priv->vga_depth);
+	vmw_write(vmw_priv, SVGA_REG_PSEUDOCOLOR, vmw_priv->vga_pseudo);
+	vmw_write(vmw_priv, SVGA_REG_RED_MASK, vmw_priv->vga_red_mask);
+	vmw_write(vmw_priv, SVGA_REG_GREEN_MASK, vmw_priv->vga_green_mask);
+	vmw_write(vmw_priv, SVGA_REG_BLUE_MASK, vmw_priv->vga_blue_mask);
+
+	/* TODO check for multimon */
+	vmw_write(vmw_priv, SVGA_REG_NUM_GUEST_DISPLAYS, 0);
+
+	return 0;
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/vmwgfx/Makefile
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/vmwgfx/Makefile
@@ -0,0 +1,9 @@
+
+ccflags-y := -Iinclude/drm
+
+vmwgfx-y := vmwgfx_execbuf.o vmwgfx_gmr.o vmwgfx_kms.o vmwgfx_drv.o \
+	    vmwgfx_fb.o vmwgfx_ioctl.o vmwgfx_resource.o vmwgfx_buffer.o \
+	    vmwgfx_fifo.o vmwgfx_irq.o vmwgfx_ldu.o vmwgfx_ttm_glue.o \
+	    vmwgfx_overlay.o
+
+obj-$(CONFIG_DRM_VMWGFX) := vmwgfx.o
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
@@ -0,0 +1,521 @@
+/**************************************************************************
+ *
+ * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **************************************************************************/
+
+#ifndef _VMWGFX_DRV_H_
+#define _VMWGFX_DRV_H_
+
+#include "vmwgfx_reg.h"
+#include "drmP.h"
+#include "vmwgfx_drm.h"
+#include "drm_hashtab.h"
+#include "linux/suspend.h"
+#include "ttm/ttm_bo_driver.h"
+#include "ttm/ttm_object.h"
+#include "ttm/ttm_lock.h"
+#include "ttm/ttm_execbuf_util.h"
+#include "ttm/ttm_module.h"
+
+#define VMWGFX_DRIVER_DATE "20100209"
+#define VMWGFX_DRIVER_MAJOR 1
+#define VMWGFX_DRIVER_MINOR 0
+#define VMWGFX_DRIVER_PATCHLEVEL 0
+#define VMWGFX_FILE_PAGE_OFFSET 0x00100000
+#define VMWGFX_FIFO_STATIC_SIZE (1024*1024)
+#define VMWGFX_MAX_RELOCATIONS 2048
+#define VMWGFX_MAX_GMRS 2048
+
+struct vmw_fpriv {
+	struct drm_master *locked_master;
+	struct ttm_object_file *tfile;
+};
+
+struct vmw_dma_buffer {
+	struct ttm_buffer_object base;
+	struct list_head validate_list;
+	struct list_head gmr_lru;
+	uint32_t gmr_id;
+	bool gmr_bound;
+	uint32_t cur_validate_node;
+	bool on_validate_list;
+};
+
+struct vmw_resource {
+	struct kref kref;
+	struct vmw_private *dev_priv;
+	struct idr *idr;
+	int id;
+	enum ttm_object_type res_type;
+	bool avail;
+	void (*hw_destroy) (struct vmw_resource *res);
+	void (*res_free) (struct vmw_resource *res);
+
+	/* TODO is a generic snooper needed? */
+#if 0
+	void (*snoop)(struct vmw_resource *res,
+		      struct ttm_object_file *tfile,
+		      SVGA3dCmdHeader *header);
+	void *snoop_priv;
+#endif
+};
+
+struct vmw_cursor_snooper {
+	struct drm_crtc *crtc;
+	size_t age;
+	uint32_t *image;
+};
+
+struct vmw_surface {
+	struct vmw_resource res;
+	uint32_t flags;
+	uint32_t format;
+	uint32_t mip_levels[DRM_VMW_MAX_SURFACE_FACES];
+	struct drm_vmw_size *sizes;
+	uint32_t num_sizes;
+
+	bool scanout;
+
+	/* TODO so far just a extra pointer */
+	struct vmw_cursor_snooper snooper;
+};
+
+struct vmw_fifo_state {
+	unsigned long reserved_size;
+	__le32 *dynamic_buffer;
+	__le32 *static_buffer;
+	__le32 *last_buffer;
+	uint32_t last_data_size;
+	uint32_t last_buffer_size;
+	bool last_buffer_add;
+	unsigned long static_buffer_size;
+	bool using_bounce_buffer;
+	uint32_t capabilities;
+	struct mutex fifo_mutex;
+	struct rw_semaphore rwsem;
+};
+
+struct vmw_relocation {
+	SVGAGuestPtr *location;
+	uint32_t index;
+};
+
+struct vmw_sw_context{
+	struct ida bo_list;
+	uint32_t last_cid;
+	bool cid_valid;
+	uint32_t last_sid;
+	uint32_t sid_translation;
+	bool sid_valid;
+	struct ttm_object_file *tfile;
+	struct list_head validate_nodes;
+	struct vmw_relocation relocs[VMWGFX_MAX_RELOCATIONS];
+	uint32_t cur_reloc;
+	struct ttm_validate_buffer val_bufs[VMWGFX_MAX_GMRS];
+	uint32_t cur_val_buf;
+};
+
+struct vmw_legacy_display;
+struct vmw_overlay;
+
+struct vmw_master {
+	struct ttm_lock lock;
+};
+
+struct vmw_private {
+	struct ttm_bo_device bdev;
+	struct ttm_bo_global_ref bo_global_ref;
+	struct ttm_global_reference mem_global_ref;
+
+	struct vmw_fifo_state fifo;
+
+	struct drm_device *dev;
+	unsigned long vmw_chipset;
+	unsigned int io_start;
+	uint32_t vram_start;
+	uint32_t vram_size;
+	uint32_t mmio_start;
+	uint32_t mmio_size;
+	uint32_t fb_max_width;
+	uint32_t fb_max_height;
+	__le32 __iomem *mmio_virt;
+	int mmio_mtrr;
+	uint32_t capabilities;
+	uint32_t max_gmr_descriptors;
+	uint32_t max_gmr_ids;
+	struct mutex hw_mutex;
+
+	/*
+	 * VGA registers.
+	 */
+
+	uint32_t vga_width;
+	uint32_t vga_height;
+	uint32_t vga_depth;
+	uint32_t vga_bpp;
+	uint32_t vga_pseudo;
+	uint32_t vga_red_mask;
+	uint32_t vga_blue_mask;
+	uint32_t vga_green_mask;
+
+	/*
+	 * Framebuffer info.
+	 */
+
+	void *fb_info;
+	struct vmw_legacy_display *ldu_priv;
+	struct vmw_overlay *overlay_priv;
+
+	/*
+	 * Context and surface management.
+	 */
+
+	rwlock_t resource_lock;
+	struct idr context_idr;
+	struct idr surface_idr;
+	struct idr stream_idr;
+
+	/*
+	 * Block lastclose from racing with firstopen.
+	 */
+
+	struct mutex init_mutex;
+
+	/*
+	 * A resource manager for kernel-only surfaces and
+	 * contexts.
+	 */
+
+	struct ttm_object_device *tdev;
+
+	/*
+	 * Fencing and IRQs.
+	 */
+
+	atomic_t fence_seq;
+	wait_queue_head_t fence_queue;
+	wait_queue_head_t fifo_queue;
+	atomic_t fence_queue_waiters;
+	atomic_t fifo_queue_waiters;
+	uint32_t last_read_sequence;
+	spinlock_t irq_lock;
+
+	/*
+	 * Device state
+	 */
+
+	uint32_t traces_state;
+	uint32_t enable_state;
+	uint32_t config_done_state;
+
+	/**
+	 * Execbuf
+	 */
+	/**
+	 * Protected by the cmdbuf mutex.
+	 */
+
+	struct vmw_sw_context ctx;
+	uint32_t val_seq;
+	struct mutex cmdbuf_mutex;
+
+	/**
+	 * GMR management. Protected by the lru spinlock.
+	 */
+
+	struct ida gmr_ida;
+	struct list_head gmr_lru;
+
+
+	/**
+	 * Operating mode.
+	 */
+
+	bool stealth;
+	bool is_opened;
+
+	/**
+	 * Master management.
+	 */
+
+	struct vmw_master *active_master;
+	struct vmw_master fbdev_master;
+	struct notifier_block pm_nb;
+};
+
+static inline struct vmw_private *vmw_priv(struct drm_device *dev)
+{
+	return (struct vmw_private *)dev->dev_private;
+}
+
+static inline struct vmw_fpriv *vmw_fpriv(struct drm_file *file_priv)
+{
+	return (struct vmw_fpriv *)file_priv->driver_priv;
+}
+
+static inline struct vmw_master *vmw_master(struct drm_master *master)
+{
+	return (struct vmw_master *) master->driver_priv;
+}
+
+static inline void vmw_write(struct vmw_private *dev_priv,
+			     unsigned int offset, uint32_t value)
+{
+	outl(offset, dev_priv->io_start + VMWGFX_INDEX_PORT);
+	outl(value, dev_priv->io_start + VMWGFX_VALUE_PORT);
+}
+
+static inline uint32_t vmw_read(struct vmw_private *dev_priv,
+				unsigned int offset)
+{
+	uint32_t val;
+
+	outl(offset, dev_priv->io_start + VMWGFX_INDEX_PORT);
+	val = inl(dev_priv->io_start + VMWGFX_VALUE_PORT);
+	return val;
+}
+
+/**
+ * GMR utilities - vmwgfx_gmr.c
+ */
+
+extern int vmw_gmr_bind(struct vmw_private *dev_priv,
+			struct ttm_buffer_object *bo);
+extern void vmw_gmr_unbind(struct vmw_private *dev_priv, int gmr_id);
+
+/**
+ * Resource utilities - vmwgfx_resource.c
+ */
+
+extern struct vmw_resource *vmw_context_alloc(struct vmw_private *dev_priv);
+extern void vmw_resource_unreference(struct vmw_resource **p_res);
+extern struct vmw_resource *vmw_resource_reference(struct vmw_resource *res);
+extern int vmw_context_destroy_ioctl(struct drm_device *dev, void *data,
+				     struct drm_file *file_priv);
+extern int vmw_context_define_ioctl(struct drm_device *dev, void *data,
+				    struct drm_file *file_priv);
+extern int vmw_context_check(struct vmw_private *dev_priv,
+			     struct ttm_object_file *tfile,
+			     int id);
+extern void vmw_surface_res_free(struct vmw_resource *res);
+extern int vmw_surface_init(struct vmw_private *dev_priv,
+			    struct vmw_surface *srf,
+			    void (*res_free) (struct vmw_resource *res));
+extern int vmw_user_surface_lookup_handle(struct vmw_private *dev_priv,
+					  struct ttm_object_file *tfile,
+					  uint32_t handle,
+					  struct vmw_surface **out);
+extern int vmw_surface_destroy_ioctl(struct drm_device *dev, void *data,
+				     struct drm_file *file_priv);
+extern int vmw_surface_define_ioctl(struct drm_device *dev, void *data,
+				    struct drm_file *file_priv);
+extern int vmw_surface_reference_ioctl(struct drm_device *dev, void *data,
+				       struct drm_file *file_priv);
+extern int vmw_surface_check(struct vmw_private *dev_priv,
+			     struct ttm_object_file *tfile,
+			     uint32_t handle, int *id);
+extern void vmw_dmabuf_bo_free(struct ttm_buffer_object *bo);
+extern int vmw_dmabuf_init(struct vmw_private *dev_priv,
+			   struct vmw_dma_buffer *vmw_bo,
+			   size_t size, struct ttm_placement *placement,
+			   bool interuptable,
+			   void (*bo_free) (struct ttm_buffer_object *bo));
+extern int vmw_dmabuf_alloc_ioctl(struct drm_device *dev, void *data,
+				  struct drm_file *file_priv);
+extern int vmw_dmabuf_unref_ioctl(struct drm_device *dev, void *data,
+				  struct drm_file *file_priv);
+extern uint32_t vmw_dmabuf_validate_node(struct ttm_buffer_object *bo,
+					 uint32_t cur_validate_node);
+extern void vmw_dmabuf_validate_clear(struct ttm_buffer_object *bo);
+extern int vmw_user_dmabuf_lookup(struct ttm_object_file *tfile,
+				  uint32_t id, struct vmw_dma_buffer **out);
+extern uint32_t vmw_dmabuf_gmr(struct ttm_buffer_object *bo);
+extern void vmw_dmabuf_set_gmr(struct ttm_buffer_object *bo, uint32_t id);
+extern int vmw_gmr_id_alloc(struct vmw_private *dev_priv, uint32_t *p_id);
+extern int vmw_dmabuf_to_start_of_vram(struct vmw_private *vmw_priv,
+				       struct vmw_dma_buffer *bo);
+extern int vmw_dmabuf_from_vram(struct vmw_private *vmw_priv,
+				struct vmw_dma_buffer *bo);
+extern void vmw_dmabuf_gmr_unbind(struct ttm_buffer_object *bo);
+extern int vmw_stream_claim_ioctl(struct drm_device *dev, void *data,
+				  struct drm_file *file_priv);
+extern int vmw_stream_unref_ioctl(struct drm_device *dev, void *data,
+				  struct drm_file *file_priv);
+extern int vmw_user_stream_lookup(struct vmw_private *dev_priv,
+				  struct ttm_object_file *tfile,
+				  uint32_t *inout_id,
+				  struct vmw_resource **out);
+
+
+/**
+ * Misc Ioctl functionality - vmwgfx_ioctl.c
+ */
+
+extern int vmw_getparam_ioctl(struct drm_device *dev, void *data,
+			      struct drm_file *file_priv);
+extern int vmw_fifo_debug_ioctl(struct drm_device *dev, void *data,
+				struct drm_file *file_priv);
+
+/**
+ * Fifo utilities - vmwgfx_fifo.c
+ */
+
+extern int vmw_fifo_init(struct vmw_private *dev_priv,
+			 struct vmw_fifo_state *fifo);
+extern void vmw_fifo_release(struct vmw_private *dev_priv,
+			     struct vmw_fifo_state *fifo);
+extern void *vmw_fifo_reserve(struct vmw_private *dev_priv, uint32_t bytes);
+extern void vmw_fifo_commit(struct vmw_private *dev_priv, uint32_t bytes);
+extern int vmw_fifo_send_fence(struct vmw_private *dev_priv,
+			       uint32_t *sequence);
+extern void vmw_fifo_ping_host(struct vmw_private *dev_priv, uint32_t reason);
+extern int vmw_fifo_mmap(struct file *filp, struct vm_area_struct *vma);
+extern bool vmw_fifo_have_3d(struct vmw_private *dev_priv);
+
+/**
+ * TTM glue - vmwgfx_ttm_glue.c
+ */
+
+extern int vmw_ttm_global_init(struct vmw_private *dev_priv);
+extern void vmw_ttm_global_release(struct vmw_private *dev_priv);
+extern int vmw_mmap(struct file *filp, struct vm_area_struct *vma);
+
+/**
+ * TTM buffer object driver - vmwgfx_buffer.c
+ */
+
+extern struct ttm_placement vmw_vram_placement;
+extern struct ttm_placement vmw_vram_ne_placement;
+extern struct ttm_placement vmw_vram_sys_placement;
+extern struct ttm_placement vmw_sys_placement;
+extern struct ttm_bo_driver vmw_bo_driver;
+extern int vmw_dma_quiescent(struct drm_device *dev);
+
+/**
+ * Command submission - vmwgfx_execbuf.c
+ */
+
+extern int vmw_execbuf_ioctl(struct drm_device *dev, void *data,
+			     struct drm_file *file_priv);
+
+/**
+ * IRQs and wating - vmwgfx_irq.c
+ */
+
+extern irqreturn_t vmw_irq_handler(DRM_IRQ_ARGS);
+extern int vmw_wait_fence(struct vmw_private *dev_priv, bool lazy,
+			  uint32_t sequence, bool interruptible,
+			  unsigned long timeout);
+extern void vmw_irq_preinstall(struct drm_device *dev);
+extern int vmw_irq_postinstall(struct drm_device *dev);
+extern void vmw_irq_uninstall(struct drm_device *dev);
+extern bool vmw_fence_signaled(struct vmw_private *dev_priv,
+			       uint32_t sequence);
+extern int vmw_fence_wait_ioctl(struct drm_device *dev, void *data,
+				struct drm_file *file_priv);
+extern int vmw_fallback_wait(struct vmw_private *dev_priv,
+			     bool lazy,
+			     bool fifo_idle,
+			     uint32_t sequence,
+			     bool interruptible,
+			     unsigned long timeout);
+
+/**
+ * Kernel framebuffer - vmwgfx_fb.c
+ */
+
+int vmw_fb_init(struct vmw_private *vmw_priv);
+int vmw_fb_close(struct vmw_private *dev_priv);
+int vmw_fb_off(struct vmw_private *vmw_priv);
+int vmw_fb_on(struct vmw_private *vmw_priv);
+
+/**
+ * Kernel modesetting - vmwgfx_kms.c
+ */
+
+int vmw_kms_init(struct vmw_private *dev_priv);
+int vmw_kms_close(struct vmw_private *dev_priv);
+int vmw_kms_save_vga(struct vmw_private *vmw_priv);
+int vmw_kms_restore_vga(struct vmw_private *vmw_priv);
+int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
+				struct drm_file *file_priv);
+void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv);
+void vmw_kms_cursor_snoop(struct vmw_surface *srf,
+			  struct ttm_object_file *tfile,
+			  struct ttm_buffer_object *bo,
+			  SVGA3dCmdHeader *header);
+
+/**
+ * Overlay control - vmwgfx_overlay.c
+ */
+
+int vmw_overlay_init(struct vmw_private *dev_priv);
+int vmw_overlay_close(struct vmw_private *dev_priv);
+int vmw_overlay_ioctl(struct drm_device *dev, void *data,
+		      struct drm_file *file_priv);
+int vmw_overlay_stop_all(struct vmw_private *dev_priv);
+int vmw_overlay_resume_all(struct vmw_private *dev_priv);
+int vmw_overlay_pause_all(struct vmw_private *dev_priv);
+int vmw_overlay_claim(struct vmw_private *dev_priv, uint32_t *out);
+int vmw_overlay_unref(struct vmw_private *dev_priv, uint32_t stream_id);
+int vmw_overlay_num_overlays(struct vmw_private *dev_priv);
+int vmw_overlay_num_free_overlays(struct vmw_private *dev_priv);
+
+/**
+ * Inline helper functions
+ */
+
+static inline void vmw_surface_unreference(struct vmw_surface **srf)
+{
+	struct vmw_surface *tmp_srf = *srf;
+	struct vmw_resource *res = &tmp_srf->res;
+	*srf = NULL;
+
+	vmw_resource_unreference(&res);
+}
+
+static inline struct vmw_surface *vmw_surface_reference(struct vmw_surface *srf)
+{
+	(void) vmw_resource_reference(&srf->res);
+	return srf;
+}
+
+static inline void vmw_dmabuf_unreference(struct vmw_dma_buffer **buf)
+{
+	struct vmw_dma_buffer *tmp_buf = *buf;
+	struct ttm_buffer_object *bo = &tmp_buf->base;
+	*buf = NULL;
+
+	ttm_bo_unref(&bo);
+}
+
+static inline struct vmw_dma_buffer *vmw_dmabuf_reference(struct vmw_dma_buffer *buf)
+{
+	if (ttm_bo_reference(&buf->base))
+		return buf;
+	return NULL;
+}
+
+#endif
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_glue.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_glue.c
@@ -0,0 +1,99 @@
+/**************************************************************************
+ *
+ * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **************************************************************************/
+
+#include "drmP.h"
+#include "vmwgfx_drv.h"
+
+int vmw_mmap(struct file *filp, struct vm_area_struct *vma)
+{
+	struct drm_file *file_priv;
+	struct vmw_private *dev_priv;
+
+	if (unlikely(vma->vm_pgoff < VMWGFX_FILE_PAGE_OFFSET)) {
+		if (vmw_fifo_mmap(filp, vma) == 0)
+			return 0;
+		return drm_mmap(filp, vma);
+	}
+
+	file_priv = (struct drm_file *)filp->private_data;
+	dev_priv = vmw_priv(file_priv->minor->dev);
+	return ttm_bo_mmap(filp, vma, &dev_priv->bdev);
+}
+
+static int vmw_ttm_mem_global_init(struct ttm_global_reference *ref)
+{
+	DRM_INFO("global init.\n");
+	return ttm_mem_global_init(ref->object);
+}
+
+static void vmw_ttm_mem_global_release(struct ttm_global_reference *ref)
+{
+	ttm_mem_global_release(ref->object);
+}
+
+int vmw_ttm_global_init(struct vmw_private *dev_priv)
+{
+	struct ttm_global_reference *global_ref;
+	int ret;
+
+	global_ref = &dev_priv->mem_global_ref;
+	global_ref->global_type = TTM_GLOBAL_TTM_MEM;
+	global_ref->size = sizeof(struct ttm_mem_global);
+	global_ref->init = &vmw_ttm_mem_global_init;
+	global_ref->release = &vmw_ttm_mem_global_release;
+
+	ret = ttm_global_item_ref(global_ref);
+	if (unlikely(ret != 0)) {
+		DRM_ERROR("Failed setting up TTM memory accounting.\n");
+		return ret;
+	}
+
+	dev_priv->bo_global_ref.mem_glob =
+		dev_priv->mem_global_ref.object;
+	global_ref = &dev_priv->bo_global_ref.ref;
+	global_ref->global_type = TTM_GLOBAL_TTM_BO;
+	global_ref->size = sizeof(struct ttm_bo_global);
+	global_ref->init = &ttm_bo_global_init;
+	global_ref->release = &ttm_bo_global_release;
+		ret = ttm_global_item_ref(global_ref);
+
+	if (unlikely(ret != 0)) {
+		DRM_ERROR("Failed setting up TTM buffer objects.\n");
+		goto out_no_bo;
+	}
+
+	return 0;
+out_no_bo:
+	ttm_global_item_unref(&dev_priv->mem_global_ref);
+	return ret;
+}
+
+void vmw_ttm_global_release(struct vmw_private *dev_priv)
+{
+	ttm_global_item_unref(&dev_priv->bo_global_ref.ref);
+	ttm_global_item_unref(&dev_priv->mem_global_ref);
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c
@@ -0,0 +1,252 @@
+/**************************************************************************
+ *
+ * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **************************************************************************/
+
+#include "vmwgfx_drv.h"
+#include "ttm/ttm_bo_driver.h"
+#include "ttm/ttm_placement.h"
+
+static uint32_t vram_placement_flags = TTM_PL_FLAG_VRAM |
+	TTM_PL_FLAG_CACHED;
+
+static uint32_t vram_ne_placement_flags = TTM_PL_FLAG_VRAM |
+	TTM_PL_FLAG_CACHED |
+	TTM_PL_FLAG_NO_EVICT;
+
+static uint32_t sys_placement_flags = TTM_PL_FLAG_SYSTEM |
+	TTM_PL_FLAG_CACHED;
+
+struct ttm_placement vmw_vram_placement = {
+	.fpfn = 0,
+	.lpfn = 0,
+	.num_placement = 1,
+	.placement = &vram_placement_flags,
+	.num_busy_placement = 1,
+	.busy_placement = &vram_placement_flags
+};
+
+struct ttm_placement vmw_vram_sys_placement = {
+	.fpfn = 0,
+	.lpfn = 0,
+	.num_placement = 1,
+	.placement = &vram_placement_flags,
+	.num_busy_placement = 1,
+	.busy_placement = &sys_placement_flags
+};
+
+struct ttm_placement vmw_vram_ne_placement = {
+	.fpfn = 0,
+	.lpfn = 0,
+	.num_placement = 1,
+	.placement = &vram_ne_placement_flags,
+	.num_busy_placement = 1,
+	.busy_placement = &vram_ne_placement_flags
+};
+
+struct ttm_placement vmw_sys_placement = {
+	.fpfn = 0,
+	.lpfn = 0,
+	.num_placement = 1,
+	.placement = &sys_placement_flags,
+	.num_busy_placement = 1,
+	.busy_placement = &sys_placement_flags
+};
+
+struct vmw_ttm_backend {
+	struct ttm_backend backend;
+};
+
+static int vmw_ttm_populate(struct ttm_backend *backend,
+			    unsigned long num_pages, struct page **pages,
+			    struct page *dummy_read_page)
+{
+	return 0;
+}
+
+static int vmw_ttm_bind(struct ttm_backend *backend, struct ttm_mem_reg *bo_mem)
+{
+	return 0;
+}
+
+static int vmw_ttm_unbind(struct ttm_backend *backend)
+{
+	return 0;
+}
+
+static void vmw_ttm_clear(struct ttm_backend *backend)
+{
+}
+
+static void vmw_ttm_destroy(struct ttm_backend *backend)
+{
+	struct vmw_ttm_backend *vmw_be =
+	    container_of(backend, struct vmw_ttm_backend, backend);
+
+	kfree(vmw_be);
+}
+
+static struct ttm_backend_func vmw_ttm_func = {
+	.populate = vmw_ttm_populate,
+	.clear = vmw_ttm_clear,
+	.bind = vmw_ttm_bind,
+	.unbind = vmw_ttm_unbind,
+	.destroy = vmw_ttm_destroy,
+};
+
+struct ttm_backend *vmw_ttm_backend_init(struct ttm_bo_device *bdev)
+{
+	struct vmw_ttm_backend *vmw_be;
+
+	vmw_be = kmalloc(sizeof(*vmw_be), GFP_KERNEL);
+	if (!vmw_be)
+		return NULL;
+
+	vmw_be->backend.func = &vmw_ttm_func;
+
+	return &vmw_be->backend;
+}
+
+int vmw_invalidate_caches(struct ttm_bo_device *bdev, uint32_t flags)
+{
+	return 0;
+}
+
+int vmw_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
+		      struct ttm_mem_type_manager *man)
+{
+	struct vmw_private *dev_priv =
+	    container_of(bdev, struct vmw_private, bdev);
+
+	switch (type) {
+	case TTM_PL_SYSTEM:
+		/* System memory */
+
+		man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
+		man->available_caching = TTM_PL_MASK_CACHING;
+		man->default_caching = TTM_PL_FLAG_CACHED;
+		break;
+	case TTM_PL_VRAM:
+		/* "On-card" video ram */
+		man->gpu_offset = 0;
+		man->io_offset = dev_priv->vram_start;
+		man->io_size = dev_priv->vram_size;
+		man->flags = TTM_MEMTYPE_FLAG_FIXED |
+		    TTM_MEMTYPE_FLAG_NEEDS_IOREMAP | TTM_MEMTYPE_FLAG_MAPPABLE;
+		man->io_addr = NULL;
+		man->available_caching = TTM_PL_MASK_CACHING;
+		man->default_caching = TTM_PL_FLAG_WC;
+		break;
+	default:
+		DRM_ERROR("Unsupported memory type %u\n", (unsigned)type);
+		return -EINVAL;
+	}
+	return 0;
+}
+
+void vmw_evict_flags(struct ttm_buffer_object *bo,
+		     struct ttm_placement *placement)
+{
+	*placement = vmw_sys_placement;
+}
+
+/**
+ * FIXME: Proper access checks on buffers.
+ */
+
+static int vmw_verify_access(struct ttm_buffer_object *bo, struct file *filp)
+{
+	return 0;
+}
+
+static void vmw_move_notify(struct ttm_buffer_object *bo,
+		     struct ttm_mem_reg *new_mem)
+{
+	if (new_mem->mem_type != TTM_PL_SYSTEM)
+		vmw_dmabuf_gmr_unbind(bo);
+}
+
+static void vmw_swap_notify(struct ttm_buffer_object *bo)
+{
+	vmw_dmabuf_gmr_unbind(bo);
+}
+
+/**
+ * FIXME: We're using the old vmware polling method to sync.
+ * Do this with fences instead.
+ */
+
+static void *vmw_sync_obj_ref(void *sync_obj)
+{
+	return sync_obj;
+}
+
+static void vmw_sync_obj_unref(void **sync_obj)
+{
+	*sync_obj = NULL;
+}
+
+static int vmw_sync_obj_flush(void *sync_obj, void *sync_arg)
+{
+	struct vmw_private *dev_priv = (struct vmw_private *)sync_arg;
+
+	mutex_lock(&dev_priv->hw_mutex);
+	vmw_write(dev_priv, SVGA_REG_SYNC, SVGA_SYNC_GENERIC);
+	mutex_unlock(&dev_priv->hw_mutex);
+	return 0;
+}
+
+static bool vmw_sync_obj_signaled(void *sync_obj, void *sync_arg)
+{
+	struct vmw_private *dev_priv = (struct vmw_private *)sync_arg;
+	uint32_t sequence = (unsigned long) sync_obj;
+
+	return vmw_fence_signaled(dev_priv, sequence);
+}
+
+static int vmw_sync_obj_wait(void *sync_obj, void *sync_arg,
+			     bool lazy, bool interruptible)
+{
+	struct vmw_private *dev_priv = (struct vmw_private *)sync_arg;
+	uint32_t sequence = (unsigned long) sync_obj;
+
+	return vmw_wait_fence(dev_priv, false, sequence, false, 3*HZ);
+}
+
+struct ttm_bo_driver vmw_bo_driver = {
+	.create_ttm_backend_entry = vmw_ttm_backend_init,
+	.invalidate_caches = vmw_invalidate_caches,
+	.init_mem_type = vmw_init_mem_type,
+	.evict_flags = vmw_evict_flags,
+	.move = NULL,
+	.verify_access = vmw_verify_access,
+	.sync_obj_signaled = vmw_sync_obj_signaled,
+	.sync_obj_wait = vmw_sync_obj_wait,
+	.sync_obj_flush = vmw_sync_obj_flush,
+	.sync_obj_unref = vmw_sync_obj_unref,
+	.sync_obj_ref = vmw_sync_obj_ref,
+	.move_notify = vmw_move_notify,
+	.swap_notify = vmw_swap_notify
+};
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/vmwgfx/svga_overlay.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/vmwgfx/svga_overlay.h
@@ -0,0 +1,201 @@
+/**********************************************************
+ * Copyright 2007-2009 VMware, Inc.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ **********************************************************/
+
+/*
+ * svga_overlay.h --
+ *
+ *    Definitions for video-overlay support.
+ */
+
+#ifndef _SVGA_OVERLAY_H_
+#define _SVGA_OVERLAY_H_
+
+#include "svga_reg.h"
+
+/*
+ * Video formats we support
+ */
+
+#define VMWARE_FOURCC_YV12 0x32315659 // 'Y' 'V' '1' '2'
+#define VMWARE_FOURCC_YUY2 0x32595559 // 'Y' 'U' 'Y' '2'
+#define VMWARE_FOURCC_UYVY 0x59565955 // 'U' 'Y' 'V' 'Y'
+
+typedef enum {
+   SVGA_OVERLAY_FORMAT_INVALID = 0,
+   SVGA_OVERLAY_FORMAT_YV12 = VMWARE_FOURCC_YV12,
+   SVGA_OVERLAY_FORMAT_YUY2 = VMWARE_FOURCC_YUY2,
+   SVGA_OVERLAY_FORMAT_UYVY = VMWARE_FOURCC_UYVY,
+} SVGAOverlayFormat;
+
+#define SVGA_VIDEO_COLORKEY_MASK             0x00ffffff
+
+#define SVGA_ESCAPE_VMWARE_VIDEO             0x00020000
+
+#define SVGA_ESCAPE_VMWARE_VIDEO_SET_REGS    0x00020001
+        /* FIFO escape layout:
+         * Type, Stream Id, (Register Id, Value) pairs */
+
+#define SVGA_ESCAPE_VMWARE_VIDEO_FLUSH       0x00020002
+        /* FIFO escape layout:
+         * Type, Stream Id */
+
+typedef
+struct SVGAEscapeVideoSetRegs {
+   struct {
+      uint32 cmdType;
+      uint32 streamId;
+   } header;
+
+   // May include zero or more items.
+   struct {
+      uint32 registerId;
+      uint32 value;
+   } items[1];
+} SVGAEscapeVideoSetRegs;
+
+typedef
+struct SVGAEscapeVideoFlush {
+   uint32 cmdType;
+   uint32 streamId;
+} SVGAEscapeVideoFlush;
+
+
+/*
+ * Struct definitions for the video overlay commands built on
+ * SVGAFifoCmdEscape.
+ */
+typedef
+struct {
+   uint32 command;
+   uint32 overlay;
+} SVGAFifoEscapeCmdVideoBase;
+
+typedef
+struct {
+   SVGAFifoEscapeCmdVideoBase videoCmd;
+} SVGAFifoEscapeCmdVideoFlush;
+
+typedef
+struct {
+   SVGAFifoEscapeCmdVideoBase videoCmd;
+   struct {
+      uint32 regId;
+      uint32 value;
+   } items[1];
+} SVGAFifoEscapeCmdVideoSetRegs;
+
+typedef
+struct {
+   SVGAFifoEscapeCmdVideoBase videoCmd;
+   struct {
+      uint32 regId;
+      uint32 value;
+   } items[SVGA_VIDEO_NUM_REGS];
+} SVGAFifoEscapeCmdVideoSetAllRegs;
+
+
+/*
+ *----------------------------------------------------------------------
+ *
+ * VMwareVideoGetAttributes --
+ *
+ *      Computes the size, pitches and offsets for YUV frames.
+ *
+ * Results:
+ *      TRUE on success; otherwise FALSE on failure.
+ *
+ * Side effects:
+ *      Pitches and offsets for the given YUV frame are put in 'pitches'
+ *      and 'offsets' respectively. They are both optional though.
+ *
+ *----------------------------------------------------------------------
+ */
+
+static inline bool
+VMwareVideoGetAttributes(const SVGAOverlayFormat format,    // IN
+                         uint32 *width,                     // IN / OUT
+                         uint32 *height,                    // IN / OUT
+                         uint32 *size,                      // OUT
+                         uint32 *pitches,                   // OUT (optional)
+                         uint32 *offsets)                   // OUT (optional)
+{
+    int tmp;
+
+    *width = (*width + 1) & ~1;
+
+    if (offsets) {
+        offsets[0] = 0;
+    }
+
+    switch (format) {
+    case VMWARE_FOURCC_YV12:
+       *height = (*height + 1) & ~1;
+       *size = (*width + 3) & ~3;
+
+       if (pitches) {
+          pitches[0] = *size;
+       }
+
+       *size *= *height;
+
+       if (offsets) {
+          offsets[1] = *size;
+       }
+
+       tmp = ((*width >> 1) + 3) & ~3;
+
+       if (pitches) {
+          pitches[1] = pitches[2] = tmp;
+       }
+
+       tmp *= (*height >> 1);
+       *size += tmp;
+
+       if (offsets) {
+          offsets[2] = *size;
+       }
+
+       *size += tmp;
+       break;
+
+    case VMWARE_FOURCC_YUY2:
+    case VMWARE_FOURCC_UYVY:
+       *size = *width * 2;
+
+       if (pitches) {
+          pitches[0] = *size;
+       }
+
+       *size *= *height;
+       break;
+
+    default:
+       return false;
+    }
+
+    return true;
+}
+
+#endif // _SVGA_OVERLAY_H_
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c
@@ -0,0 +1,538 @@
+/**************************************************************************
+ *
+ * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **************************************************************************/
+
+#include "vmwgfx_drv.h"
+#include "drmP.h"
+#include "ttm/ttm_placement.h"
+
+bool vmw_fifo_have_3d(struct vmw_private *dev_priv)
+{
+	__le32 __iomem *fifo_mem = dev_priv->mmio_virt;
+	uint32_t fifo_min, hwversion;
+
+	fifo_min = ioread32(fifo_mem  + SVGA_FIFO_MIN);
+	if (fifo_min <= SVGA_FIFO_3D_HWVERSION * sizeof(unsigned int))
+		return false;
+
+	hwversion = ioread32(fifo_mem + SVGA_FIFO_3D_HWVERSION);
+	if (hwversion == 0)
+		return false;
+
+	if (hwversion < SVGA3D_HWVERSION_WS65_B1)
+		return false;
+
+	return true;
+}
+
+int vmw_fifo_init(struct vmw_private *dev_priv, struct vmw_fifo_state *fifo)
+{
+	__le32 __iomem *fifo_mem = dev_priv->mmio_virt;
+	uint32_t max;
+	uint32_t min;
+	uint32_t dummy;
+	int ret;
+
+	fifo->static_buffer_size = VMWGFX_FIFO_STATIC_SIZE;
+	fifo->static_buffer = vmalloc(fifo->static_buffer_size);
+	if (unlikely(fifo->static_buffer == NULL))
+		return -ENOMEM;
+
+	fifo->last_buffer_size = VMWGFX_FIFO_STATIC_SIZE;
+	fifo->last_data_size = 0;
+	fifo->last_buffer_add = false;
+	fifo->last_buffer = vmalloc(fifo->last_buffer_size);
+	if (unlikely(fifo->last_buffer == NULL)) {
+		ret = -ENOMEM;
+		goto out_err;
+	}
+
+	fifo->dynamic_buffer = NULL;
+	fifo->reserved_size = 0;
+	fifo->using_bounce_buffer = false;
+
+	mutex_init(&fifo->fifo_mutex);
+	init_rwsem(&fifo->rwsem);
+
+	/*
+	 * Allow mapping the first page read-only to user-space.
+	 */
+
+	DRM_INFO("width %d\n", vmw_read(dev_priv, SVGA_REG_WIDTH));
+	DRM_INFO("height %d\n", vmw_read(dev_priv, SVGA_REG_HEIGHT));
+	DRM_INFO("bpp %d\n", vmw_read(dev_priv, SVGA_REG_BITS_PER_PIXEL));
+
+	mutex_lock(&dev_priv->hw_mutex);
+	dev_priv->enable_state = vmw_read(dev_priv, SVGA_REG_ENABLE);
+	dev_priv->config_done_state = vmw_read(dev_priv, SVGA_REG_CONFIG_DONE);
+	vmw_write(dev_priv, SVGA_REG_ENABLE, 1);
+
+	min = 4;
+	if (dev_priv->capabilities & SVGA_CAP_EXTENDED_FIFO)
+		min = vmw_read(dev_priv, SVGA_REG_MEM_REGS);
+	min <<= 2;
+
+	if (min < PAGE_SIZE)
+		min = PAGE_SIZE;
+
+	iowrite32(min, fifo_mem + SVGA_FIFO_MIN);
+	iowrite32(dev_priv->mmio_size, fifo_mem + SVGA_FIFO_MAX);
+	wmb();
+	iowrite32(min,  fifo_mem + SVGA_FIFO_NEXT_CMD);
+	iowrite32(min,  fifo_mem + SVGA_FIFO_STOP);
+	iowrite32(0, fifo_mem + SVGA_FIFO_BUSY);
+	mb();
+
+	vmw_write(dev_priv, SVGA_REG_CONFIG_DONE, 1);
+	mutex_unlock(&dev_priv->hw_mutex);
+
+	max = ioread32(fifo_mem + SVGA_FIFO_MAX);
+	min = ioread32(fifo_mem  + SVGA_FIFO_MIN);
+	fifo->capabilities = ioread32(fifo_mem + SVGA_FIFO_CAPABILITIES);
+
+	DRM_INFO("Fifo max 0x%08x min 0x%08x cap 0x%08x\n",
+		 (unsigned int) max,
+		 (unsigned int) min,
+		 (unsigned int) fifo->capabilities);
+
+	atomic_set(&dev_priv->fence_seq, dev_priv->last_read_sequence);
+	iowrite32(dev_priv->last_read_sequence, fifo_mem + SVGA_FIFO_FENCE);
+
+	return vmw_fifo_send_fence(dev_priv, &dummy);
+out_err:
+	vfree(fifo->static_buffer);
+	fifo->static_buffer = NULL;
+	return ret;
+}
+
+void vmw_fifo_ping_host(struct vmw_private *dev_priv, uint32_t reason)
+{
+	__le32 __iomem *fifo_mem = dev_priv->mmio_virt;
+
+	mutex_lock(&dev_priv->hw_mutex);
+
+	if (unlikely(ioread32(fifo_mem + SVGA_FIFO_BUSY) == 0)) {
+		iowrite32(1, fifo_mem + SVGA_FIFO_BUSY);
+		vmw_write(dev_priv, SVGA_REG_SYNC, reason);
+	}
+
+	mutex_unlock(&dev_priv->hw_mutex);
+}
+
+void vmw_fifo_release(struct vmw_private *dev_priv, struct vmw_fifo_state *fifo)
+{
+	__le32 __iomem *fifo_mem = dev_priv->mmio_virt;
+
+	mutex_lock(&dev_priv->hw_mutex);
+
+	while (vmw_read(dev_priv, SVGA_REG_BUSY) != 0)
+		vmw_write(dev_priv, SVGA_REG_SYNC, SVGA_SYNC_GENERIC);
+
+	dev_priv->last_read_sequence = ioread32(fifo_mem + SVGA_FIFO_FENCE);
+
+	vmw_write(dev_priv, SVGA_REG_CONFIG_DONE,
+		  dev_priv->config_done_state);
+	vmw_write(dev_priv, SVGA_REG_ENABLE,
+		  dev_priv->enable_state);
+
+	mutex_unlock(&dev_priv->hw_mutex);
+
+	if (likely(fifo->last_buffer != NULL)) {
+		vfree(fifo->last_buffer);
+		fifo->last_buffer = NULL;
+	}
+
+	if (likely(fifo->static_buffer != NULL)) {
+		vfree(fifo->static_buffer);
+		fifo->static_buffer = NULL;
+	}
+
+	if (likely(fifo->dynamic_buffer != NULL)) {
+		vfree(fifo->dynamic_buffer);
+		fifo->dynamic_buffer = NULL;
+	}
+}
+
+static bool vmw_fifo_is_full(struct vmw_private *dev_priv, uint32_t bytes)
+{
+	__le32 __iomem *fifo_mem = dev_priv->mmio_virt;
+	uint32_t max = ioread32(fifo_mem + SVGA_FIFO_MAX);
+	uint32_t next_cmd = ioread32(fifo_mem + SVGA_FIFO_NEXT_CMD);
+	uint32_t min = ioread32(fifo_mem + SVGA_FIFO_MIN);
+	uint32_t stop = ioread32(fifo_mem + SVGA_FIFO_STOP);
+
+	return ((max - next_cmd) + (stop - min) <= bytes);
+}
+
+static int vmw_fifo_wait_noirq(struct vmw_private *dev_priv,
+			       uint32_t bytes, bool interruptible,
+			       unsigned long timeout)
+{
+	int ret = 0;
+	unsigned long end_jiffies = jiffies + timeout;
+	DEFINE_WAIT(__wait);
+
+	DRM_INFO("Fifo wait noirq.\n");
+
+	for (;;) {
+		prepare_to_wait(&dev_priv->fifo_queue, &__wait,
+				(interruptible) ?
+				TASK_INTERRUPTIBLE : TASK_UNINTERRUPTIBLE);
+		if (!vmw_fifo_is_full(dev_priv, bytes))
+			break;
+		if (time_after_eq(jiffies, end_jiffies)) {
+			ret = -EBUSY;
+			DRM_ERROR("SVGA device lockup.\n");
+			break;
+		}
+		schedule_timeout(1);
+		if (interruptible && signal_pending(current)) {
+			ret = -ERESTARTSYS;
+			break;
+		}
+	}
+	finish_wait(&dev_priv->fifo_queue, &__wait);
+	wake_up_all(&dev_priv->fifo_queue);
+	DRM_INFO("Fifo noirq exit.\n");
+	return ret;
+}
+
+static int vmw_fifo_wait(struct vmw_private *dev_priv,
+			 uint32_t bytes, bool interruptible,
+			 unsigned long timeout)
+{
+	long ret = 1L;
+	unsigned long irq_flags;
+
+	if (likely(!vmw_fifo_is_full(dev_priv, bytes)))
+		return 0;
+
+	vmw_fifo_ping_host(dev_priv, SVGA_SYNC_FIFOFULL);
+	if (!(dev_priv->capabilities & SVGA_CAP_IRQMASK))
+		return vmw_fifo_wait_noirq(dev_priv, bytes,
+					   interruptible, timeout);
+
+	mutex_lock(&dev_priv->hw_mutex);
+	if (atomic_add_return(1, &dev_priv->fifo_queue_waiters) > 0) {
+		spin_lock_irqsave(&dev_priv->irq_lock, irq_flags);
+		outl(SVGA_IRQFLAG_FIFO_PROGRESS,
+		     dev_priv->io_start + VMWGFX_IRQSTATUS_PORT);
+		vmw_write(dev_priv, SVGA_REG_IRQMASK,
+			  vmw_read(dev_priv, SVGA_REG_IRQMASK) |
+			  SVGA_IRQFLAG_FIFO_PROGRESS);
+		spin_unlock_irqrestore(&dev_priv->irq_lock, irq_flags);
+	}
+	mutex_unlock(&dev_priv->hw_mutex);
+
+	if (interruptible)
+		ret = wait_event_interruptible_timeout
+		    (dev_priv->fifo_queue,
+		     !vmw_fifo_is_full(dev_priv, bytes), timeout);
+	else
+		ret = wait_event_timeout
+		    (dev_priv->fifo_queue,
+		     !vmw_fifo_is_full(dev_priv, bytes), timeout);
+
+	if (unlikely(ret == 0))
+		ret = -EBUSY;
+	else if (likely(ret > 0))
+		ret = 0;
+
+	mutex_lock(&dev_priv->hw_mutex);
+	if (atomic_dec_and_test(&dev_priv->fifo_queue_waiters)) {
+		spin_lock_irqsave(&dev_priv->irq_lock, irq_flags);
+		vmw_write(dev_priv, SVGA_REG_IRQMASK,
+			  vmw_read(dev_priv, SVGA_REG_IRQMASK) &
+			  ~SVGA_IRQFLAG_FIFO_PROGRESS);
+		spin_unlock_irqrestore(&dev_priv->irq_lock, irq_flags);
+	}
+	mutex_unlock(&dev_priv->hw_mutex);
+
+	return ret;
+}
+
+void *vmw_fifo_reserve(struct vmw_private *dev_priv, uint32_t bytes)
+{
+	struct vmw_fifo_state *fifo_state = &dev_priv->fifo;
+	__le32 __iomem *fifo_mem = dev_priv->mmio_virt;
+	uint32_t max;
+	uint32_t min;
+	uint32_t next_cmd;
+	uint32_t reserveable = fifo_state->capabilities & SVGA_FIFO_CAP_RESERVE;
+	int ret;
+
+	mutex_lock(&fifo_state->fifo_mutex);
+	max = ioread32(fifo_mem + SVGA_FIFO_MAX);
+	min = ioread32(fifo_mem + SVGA_FIFO_MIN);
+	next_cmd = ioread32(fifo_mem + SVGA_FIFO_NEXT_CMD);
+
+	if (unlikely(bytes >= (max - min)))
+		goto out_err;
+
+	BUG_ON(fifo_state->reserved_size != 0);
+	BUG_ON(fifo_state->dynamic_buffer != NULL);
+
+	fifo_state->reserved_size = bytes;
+
+	while (1) {
+		uint32_t stop = ioread32(fifo_mem + SVGA_FIFO_STOP);
+		bool need_bounce = false;
+		bool reserve_in_place = false;
+
+		if (next_cmd >= stop) {
+			if (likely((next_cmd + bytes < max ||
+				    (next_cmd + bytes == max && stop > min))))
+				reserve_in_place = true;
+
+			else if (vmw_fifo_is_full(dev_priv, bytes)) {
+				ret = vmw_fifo_wait(dev_priv, bytes,
+						    false, 3 * HZ);
+				if (unlikely(ret != 0))
+					goto out_err;
+			} else
+				need_bounce = true;
+
+		} else {
+
+			if (likely((next_cmd + bytes < stop)))
+				reserve_in_place = true;
+			else {
+				ret = vmw_fifo_wait(dev_priv, bytes,
+						    false, 3 * HZ);
+				if (unlikely(ret != 0))
+					goto out_err;
+			}
+		}
+
+		if (reserve_in_place) {
+			if (reserveable || bytes <= sizeof(uint32_t)) {
+				fifo_state->using_bounce_buffer = false;
+
+				if (reserveable)
+					iowrite32(bytes, fifo_mem +
+						  SVGA_FIFO_RESERVED);
+				return fifo_mem + (next_cmd >> 2);
+			} else {
+				need_bounce = true;
+			}
+		}
+
+		if (need_bounce) {
+			fifo_state->using_bounce_buffer = true;
+			if (bytes < fifo_state->static_buffer_size)
+				return fifo_state->static_buffer;
+			else {
+				fifo_state->dynamic_buffer = vmalloc(bytes);
+				return fifo_state->dynamic_buffer;
+			}
+		}
+	}
+out_err:
+	fifo_state->reserved_size = 0;
+	mutex_unlock(&fifo_state->fifo_mutex);
+	return NULL;
+}
+
+static void vmw_fifo_res_copy(struct vmw_fifo_state *fifo_state,
+			      __le32 __iomem *fifo_mem,
+			      uint32_t next_cmd,
+			      uint32_t max, uint32_t min, uint32_t bytes)
+{
+	uint32_t chunk_size = max - next_cmd;
+	uint32_t rest;
+	uint32_t *buffer = (fifo_state->dynamic_buffer != NULL) ?
+	    fifo_state->dynamic_buffer : fifo_state->static_buffer;
+
+	if (bytes < chunk_size)
+		chunk_size = bytes;
+
+	iowrite32(bytes, fifo_mem + SVGA_FIFO_RESERVED);
+	mb();
+	memcpy_toio(fifo_mem + (next_cmd >> 2), buffer, chunk_size);
+	rest = bytes - chunk_size;
+	if (rest)
+		memcpy_toio(fifo_mem + (min >> 2), buffer + (chunk_size >> 2),
+			    rest);
+}
+
+static void vmw_fifo_slow_copy(struct vmw_fifo_state *fifo_state,
+			       __le32 __iomem *fifo_mem,
+			       uint32_t next_cmd,
+			       uint32_t max, uint32_t min, uint32_t bytes)
+{
+	uint32_t *buffer = (fifo_state->dynamic_buffer != NULL) ?
+	    fifo_state->dynamic_buffer : fifo_state->static_buffer;
+
+	while (bytes > 0) {
+		iowrite32(*buffer++, fifo_mem + (next_cmd >> 2));
+		next_cmd += sizeof(uint32_t);
+		if (unlikely(next_cmd == max))
+			next_cmd = min;
+		mb();
+		iowrite32(next_cmd, fifo_mem + SVGA_FIFO_NEXT_CMD);
+		mb();
+		bytes -= sizeof(uint32_t);
+	}
+}
+
+void vmw_fifo_commit(struct vmw_private *dev_priv, uint32_t bytes)
+{
+	struct vmw_fifo_state *fifo_state = &dev_priv->fifo;
+	__le32 __iomem *fifo_mem = dev_priv->mmio_virt;
+	uint32_t next_cmd = ioread32(fifo_mem + SVGA_FIFO_NEXT_CMD);
+	uint32_t max = ioread32(fifo_mem + SVGA_FIFO_MAX);
+	uint32_t min = ioread32(fifo_mem + SVGA_FIFO_MIN);
+	bool reserveable = fifo_state->capabilities & SVGA_FIFO_CAP_RESERVE;
+
+	BUG_ON((bytes & 3) != 0);
+	BUG_ON(bytes > fifo_state->reserved_size);
+
+	fifo_state->reserved_size = 0;
+
+	if (fifo_state->using_bounce_buffer) {
+		if (reserveable)
+			vmw_fifo_res_copy(fifo_state, fifo_mem,
+					  next_cmd, max, min, bytes);
+		else
+			vmw_fifo_slow_copy(fifo_state, fifo_mem,
+					   next_cmd, max, min, bytes);
+
+		if (fifo_state->dynamic_buffer) {
+			vfree(fifo_state->dynamic_buffer);
+			fifo_state->dynamic_buffer = NULL;
+		}
+
+	}
+
+	down_write(&fifo_state->rwsem);
+	if (fifo_state->using_bounce_buffer || reserveable) {
+		next_cmd += bytes;
+		if (next_cmd >= max)
+			next_cmd -= max - min;
+		mb();
+		iowrite32(next_cmd, fifo_mem + SVGA_FIFO_NEXT_CMD);
+	}
+
+	if (reserveable)
+		iowrite32(0, fifo_mem + SVGA_FIFO_RESERVED);
+	mb();
+	up_write(&fifo_state->rwsem);
+	vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC);
+	mutex_unlock(&fifo_state->fifo_mutex);
+}
+
+int vmw_fifo_send_fence(struct vmw_private *dev_priv, uint32_t *sequence)
+{
+	struct vmw_fifo_state *fifo_state = &dev_priv->fifo;
+	struct svga_fifo_cmd_fence *cmd_fence;
+	void *fm;
+	int ret = 0;
+	uint32_t bytes = sizeof(__le32) + sizeof(*cmd_fence);
+
+	fm = vmw_fifo_reserve(dev_priv, bytes);
+	if (unlikely(fm == NULL)) {
+		*sequence = atomic_read(&dev_priv->fence_seq);
+		ret = -ENOMEM;
+		(void)vmw_fallback_wait(dev_priv, false, true, *sequence,
+					false, 3*HZ);
+		goto out_err;
+	}
+
+	do {
+		*sequence = atomic_add_return(1, &dev_priv->fence_seq);
+	} while (*sequence == 0);
+
+	if (!(fifo_state->capabilities & SVGA_FIFO_CAP_FENCE)) {
+
+		/*
+		 * Don't request hardware to send a fence. The
+		 * waiting code in vmwgfx_irq.c will emulate this.
+		 */
+
+		vmw_fifo_commit(dev_priv, 0);
+		return 0;
+	}
+
+	*(__le32 *) fm = cpu_to_le32(SVGA_CMD_FENCE);
+	cmd_fence = (struct svga_fifo_cmd_fence *)
+	    ((unsigned long)fm + sizeof(__le32));
+
+	iowrite32(*sequence, &cmd_fence->fence);
+	fifo_state->last_buffer_add = true;
+	vmw_fifo_commit(dev_priv, bytes);
+	fifo_state->last_buffer_add = false;
+
+out_err:
+	return ret;
+}
+
+/**
+ * Map the first page of the FIFO read-only to user-space.
+ */
+
+static int vmw_fifo_vm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
+{
+	int ret;
+	unsigned long address = (unsigned long)vmf->virtual_address;
+
+	if (address != vma->vm_start)
+		return VM_FAULT_SIGBUS;
+
+	ret = vm_insert_pfn(vma, address, vma->vm_pgoff);
+	if (likely(ret == -EBUSY || ret == 0))
+		return VM_FAULT_NOPAGE;
+	else if (ret == -ENOMEM)
+		return VM_FAULT_OOM;
+
+	return VM_FAULT_SIGBUS;
+}
+
+static struct vm_operations_struct vmw_fifo_vm_ops = {
+	.fault = vmw_fifo_vm_fault,
+	.open = NULL,
+	.close = NULL
+};
+
+int vmw_fifo_mmap(struct file *filp, struct vm_area_struct *vma)
+{
+	struct drm_file *file_priv;
+	struct vmw_private *dev_priv;
+
+	file_priv = (struct drm_file *)filp->private_data;
+	dev_priv = vmw_priv(file_priv->minor->dev);
+
+	if (vma->vm_pgoff != (dev_priv->mmio_start >> PAGE_SHIFT) ||
+	    (vma->vm_end - vma->vm_start) != PAGE_SIZE)
+		return -EINVAL;
+
+	vma->vm_flags &= ~(VM_WRITE | VM_MAYWRITE);
+	vma->vm_flags |= VM_IO | VM_PFNMAP | VM_DONTEXPAND | VM_SHARED;
+	vma->vm_page_prot = vm_get_page_prot(vma->vm_flags);
+	vma->vm_page_prot = ttm_io_prot(TTM_PL_FLAG_UNCACHED,
+					vma->vm_page_prot);
+	vma->vm_ops = &vmw_fifo_vm_ops;
+	return 0;
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/vmwgfx/svga3d_reg.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/vmwgfx/svga3d_reg.h
@@ -0,0 +1,1793 @@
+/**********************************************************
+ * Copyright 1998-2009 VMware, Inc.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ **********************************************************/
+
+/*
+ * svga3d_reg.h --
+ *
+ *       SVGA 3D hardware definitions
+ */
+
+#ifndef _SVGA3D_REG_H_
+#define _SVGA3D_REG_H_
+
+#include "svga_reg.h"
+
+
+/*
+ * 3D Hardware Version
+ *
+ *   The hardware version is stored in the SVGA_FIFO_3D_HWVERSION fifo
+ *   register.   Is set by the host and read by the guest.  This lets
+ *   us make new guest drivers which are backwards-compatible with old
+ *   SVGA hardware revisions.  It does not let us support old guest
+ *   drivers.  Good enough for now.
+ *
+ */
+
+#define SVGA3D_MAKE_HWVERSION(major, minor)      (((major) << 16) | ((minor) & 0xFF))
+#define SVGA3D_MAJOR_HWVERSION(version)          ((version) >> 16)
+#define SVGA3D_MINOR_HWVERSION(version)          ((version) & 0xFF)
+
+typedef enum {
+   SVGA3D_HWVERSION_WS5_RC1   = SVGA3D_MAKE_HWVERSION(0, 1),
+   SVGA3D_HWVERSION_WS5_RC2   = SVGA3D_MAKE_HWVERSION(0, 2),
+   SVGA3D_HWVERSION_WS51_RC1  = SVGA3D_MAKE_HWVERSION(0, 3),
+   SVGA3D_HWVERSION_WS6_B1    = SVGA3D_MAKE_HWVERSION(1, 1),
+   SVGA3D_HWVERSION_FUSION_11 = SVGA3D_MAKE_HWVERSION(1, 4),
+   SVGA3D_HWVERSION_WS65_B1   = SVGA3D_MAKE_HWVERSION(2, 0),
+   SVGA3D_HWVERSION_CURRENT   = SVGA3D_HWVERSION_WS65_B1,
+} SVGA3dHardwareVersion;
+
+/*
+ * Generic Types
+ */
+
+typedef uint32 SVGA3dBool; /* 32-bit Bool definition */
+#define SVGA3D_NUM_CLIPPLANES                   6
+#define SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS  8
+
+
+/*
+ * Surface formats.
+ *
+ * If you modify this list, be sure to keep GLUtil.c in sync. It
+ * includes the internal format definition of each surface in
+ * GLUtil_ConvertSurfaceFormat, and it contains a table of
+ * human-readable names in GLUtil_GetFormatName.
+ */
+
+typedef enum SVGA3dSurfaceFormat {
+   SVGA3D_FORMAT_INVALID = 0,
+
+   SVGA3D_X8R8G8B8       = 1,
+   SVGA3D_A8R8G8B8       = 2,
+
+   SVGA3D_R5G6B5         = 3,
+   SVGA3D_X1R5G5B5       = 4,
+   SVGA3D_A1R5G5B5       = 5,
+   SVGA3D_A4R4G4B4       = 6,
+
+   SVGA3D_Z_D32          = 7,
+   SVGA3D_Z_D16          = 8,
+   SVGA3D_Z_D24S8        = 9,
+   SVGA3D_Z_D15S1        = 10,
+
+   SVGA3D_LUMINANCE8            = 11,
+   SVGA3D_LUMINANCE4_ALPHA4     = 12,
+   SVGA3D_LUMINANCE16           = 13,
+   SVGA3D_LUMINANCE8_ALPHA8     = 14,
+
+   SVGA3D_DXT1           = 15,
+   SVGA3D_DXT2           = 16,
+   SVGA3D_DXT3           = 17,
+   SVGA3D_DXT4           = 18,
+   SVGA3D_DXT5           = 19,
+
+   SVGA3D_BUMPU8V8       = 20,
+   SVGA3D_BUMPL6V5U5     = 21,
+   SVGA3D_BUMPX8L8V8U8   = 22,
+   SVGA3D_BUMPL8V8U8     = 23,
+
+   SVGA3D_ARGB_S10E5     = 24,   /* 16-bit floating-point ARGB */
+   SVGA3D_ARGB_S23E8     = 25,   /* 32-bit floating-point ARGB */
+
+   SVGA3D_A2R10G10B10    = 26,
+
+   /* signed formats */
+   SVGA3D_V8U8           = 27,
+   SVGA3D_Q8W8V8U8       = 28,
+   SVGA3D_CxV8U8         = 29,
+
+   /* mixed formats */
+   SVGA3D_X8L8V8U8       = 30,
+   SVGA3D_A2W10V10U10    = 31,
+
+   SVGA3D_ALPHA8         = 32,
+
+   /* Single- and dual-component floating point formats */
+   SVGA3D_R_S10E5        = 33,
+   SVGA3D_R_S23E8        = 34,
+   SVGA3D_RG_S10E5       = 35,
+   SVGA3D_RG_S23E8       = 36,
+
+   /*
+    * Any surface can be used as a buffer object, but SVGA3D_BUFFER is
+    * the most efficient format to use when creating new surfaces
+    * expressly for index or vertex data.
+    */
+   SVGA3D_BUFFER         = 37,
+
+   SVGA3D_Z_D24X8        = 38,
+
+   SVGA3D_V16U16         = 39,
+
+   SVGA3D_G16R16         = 40,
+   SVGA3D_A16B16G16R16   = 41,
+
+   /* Packed Video formats */
+   SVGA3D_UYVY           = 42,
+   SVGA3D_YUY2           = 43,
+
+   SVGA3D_FORMAT_MAX
+} SVGA3dSurfaceFormat;
+
+typedef uint32 SVGA3dColor; /* a, r, g, b */
+
+/*
+ * These match the D3DFORMAT_OP definitions used by Direct3D. We need
+ * them so that we can query the host for what the supported surface
+ * operations are (when we're using the D3D backend, in particular),
+ * and so we can send those operations to the guest.
+ */
+typedef enum {
+   SVGA3DFORMAT_OP_TEXTURE                               = 0x00000001,
+   SVGA3DFORMAT_OP_VOLUMETEXTURE                         = 0x00000002,
+   SVGA3DFORMAT_OP_CUBETEXTURE                           = 0x00000004,
+   SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET                = 0x00000008,
+   SVGA3DFORMAT_OP_SAME_FORMAT_RENDERTARGET              = 0x00000010,
+   SVGA3DFORMAT_OP_ZSTENCIL                              = 0x00000040,
+   SVGA3DFORMAT_OP_ZSTENCIL_WITH_ARBITRARY_COLOR_DEPTH   = 0x00000080,
+
+/*
+ * This format can be used as a render target if the current display mode
+ * is the same depth if the alpha channel is ignored. e.g. if the device
+ * can render to A8R8G8B8 when the display mode is X8R8G8B8, then the
+ * format op list entry for A8R8G8B8 should have this cap.
+ */
+   SVGA3DFORMAT_OP_SAME_FORMAT_UP_TO_ALPHA_RENDERTARGET  = 0x00000100,
+
+/*
+ * This format contains DirectDraw support (including Flip).  This flag
+ * should not to be set on alpha formats.
+ */
+   SVGA3DFORMAT_OP_DISPLAYMODE                           = 0x00000400,
+
+/*
+ * The rasterizer can support some level of Direct3D support in this format
+ * and implies that the driver can create a Context in this mode (for some
+ * render target format).  When this flag is set, the SVGA3DFORMAT_OP_DISPLAYMODE
+ * flag must also be set.
+ */
+   SVGA3DFORMAT_OP_3DACCELERATION                        = 0x00000800,
+
+/*
+ * This is set for a private format when the driver has put the bpp in
+ * the structure.
+ */
+   SVGA3DFORMAT_OP_PIXELSIZE                             = 0x00001000,
+
+/*
+ * Indicates that this format can be converted to any RGB format for which
+ * SVGA3DFORMAT_OP_MEMBEROFGROUP_ARGB is specified
+ */
+   SVGA3DFORMAT_OP_CONVERT_TO_ARGB                       = 0x00002000,
+
+/*
+ * Indicates that this format can be used to create offscreen plain surfaces.
+ */
+   SVGA3DFORMAT_OP_OFFSCREENPLAIN                        = 0x00004000,
+
+/*
+ * Indicated that this format can be read as an SRGB texture (meaning that the
+ * sampler will linearize the looked up data)
+ */
+   SVGA3DFORMAT_OP_SRGBREAD                              = 0x00008000,
+
+/*
+ * Indicates that this format can be used in the bumpmap instructions
+ */
+   SVGA3DFORMAT_OP_BUMPMAP                               = 0x00010000,
+
+/*
+ * Indicates that this format can be sampled by the displacement map sampler
+ */
+   SVGA3DFORMAT_OP_DMAP                                  = 0x00020000,
+
+/*
+ * Indicates that this format cannot be used with texture filtering
+ */
+   SVGA3DFORMAT_OP_NOFILTER                              = 0x00040000,
+
+/*
+ * Indicates that format conversions are supported to this RGB format if
+ * SVGA3DFORMAT_OP_CONVERT_TO_ARGB is specified in the source format.
+ */
+   SVGA3DFORMAT_OP_MEMBEROFGROUP_ARGB                    = 0x00080000,
+
+/*
+ * Indicated that this format can be written as an SRGB target (meaning that the
+ * pixel pipe will DE-linearize data on output to format)
+ */
+   SVGA3DFORMAT_OP_SRGBWRITE                             = 0x00100000,
+
+/*
+ * Indicates that this format cannot be used with alpha blending
+ */
+   SVGA3DFORMAT_OP_NOALPHABLEND                          = 0x00200000,
+
+/*
+ * Indicates that the device can auto-generated sublevels for resources
+ * of this format
+ */
+   SVGA3DFORMAT_OP_AUTOGENMIPMAP                         = 0x00400000,
+
+/*
+ * Indicates that this format can be used by vertex texture sampler
+ */
+   SVGA3DFORMAT_OP_VERTEXTEXTURE                         = 0x00800000,
+
+/*
+ * Indicates that this format supports neither texture coordinate wrap
+ * modes, nor mipmapping
+ */
+   SVGA3DFORMAT_OP_NOTEXCOORDWRAPNORMIP                  = 0x01000000
+} SVGA3dFormatOp;
+
+/*
+ * This structure is a conversion of SVGA3DFORMAT_OP_*.
+ * Entries must be located at the same position.
+ */
+typedef union {
+   uint32 value;
+   struct {
+      uint32 texture : 1;
+      uint32 volumeTexture : 1;
+      uint32 cubeTexture : 1;
+      uint32 offscreenRenderTarget : 1;
+      uint32 sameFormatRenderTarget : 1;
+      uint32 unknown1 : 1;
+      uint32 zStencil : 1;
+      uint32 zStencilArbitraryDepth : 1;
+      uint32 sameFormatUpToAlpha : 1;
+      uint32 unknown2 : 1;
+      uint32 displayMode : 1;
+      uint32 acceleration3d : 1;
+      uint32 pixelSize : 1;
+      uint32 convertToARGB : 1;
+      uint32 offscreenPlain : 1;
+      uint32 sRGBRead : 1;
+      uint32 bumpMap : 1;
+      uint32 dmap : 1;
+      uint32 noFilter : 1;
+      uint32 memberOfGroupARGB : 1;
+      uint32 sRGBWrite : 1;
+      uint32 noAlphaBlend : 1;
+      uint32 autoGenMipMap : 1;
+      uint32 vertexTexture : 1;
+      uint32 noTexCoordWrapNorMip : 1;
+   };
+} SVGA3dSurfaceFormatCaps;
+
+/*
+ * SVGA_3D_CMD_SETRENDERSTATE Types.  All value types
+ * must fit in a uint32.
+ */
+
+typedef enum {
+   SVGA3D_RS_INVALID                   = 0,
+   SVGA3D_RS_ZENABLE                   = 1,     /* SVGA3dBool */
+   SVGA3D_RS_ZWRITEENABLE              = 2,     /* SVGA3dBool */
+   SVGA3D_RS_ALPHATESTENABLE           = 3,     /* SVGA3dBool */
+   SVGA3D_RS_DITHERENABLE              = 4,     /* SVGA3dBool */
+   SVGA3D_RS_BLENDENABLE               = 5,     /* SVGA3dBool */
+   SVGA3D_RS_FOGENABLE                 = 6,     /* SVGA3dBool */
+   SVGA3D_RS_SPECULARENABLE            = 7,     /* SVGA3dBool */
+   SVGA3D_RS_STENCILENABLE             = 8,     /* SVGA3dBool */
+   SVGA3D_RS_LIGHTINGENABLE            = 9,     /* SVGA3dBool */
+   SVGA3D_RS_NORMALIZENORMALS          = 10,    /* SVGA3dBool */
+   SVGA3D_RS_POINTSPRITEENABLE         = 11,    /* SVGA3dBool */
+   SVGA3D_RS_POINTSCALEENABLE          = 12,    /* SVGA3dBool */
+   SVGA3D_RS_STENCILREF                = 13,    /* uint32 */
+   SVGA3D_RS_STENCILMASK               = 14,    /* uint32 */
+   SVGA3D_RS_STENCILWRITEMASK          = 15,    /* uint32 */
+   SVGA3D_RS_FOGSTART                  = 16,    /* float */
+   SVGA3D_RS_FOGEND                    = 17,    /* float */
+   SVGA3D_RS_FOGDENSITY                = 18,    /* float */
+   SVGA3D_RS_POINTSIZE                 = 19,    /* float */
+   SVGA3D_RS_POINTSIZEMIN              = 20,    /* float */
+   SVGA3D_RS_POINTSIZEMAX              = 21,    /* float */
+   SVGA3D_RS_POINTSCALE_A              = 22,    /* float */
+   SVGA3D_RS_POINTSCALE_B              = 23,    /* float */
+   SVGA3D_RS_POINTSCALE_C              = 24,    /* float */
+   SVGA3D_RS_FOGCOLOR                  = 25,    /* SVGA3dColor */
+   SVGA3D_RS_AMBIENT                   = 26,    /* SVGA3dColor */
+   SVGA3D_RS_CLIPPLANEENABLE           = 27,    /* SVGA3dClipPlanes */
+   SVGA3D_RS_FOGMODE                   = 28,    /* SVGA3dFogMode */
+   SVGA3D_RS_FILLMODE                  = 29,    /* SVGA3dFillMode */
+   SVGA3D_RS_SHADEMODE                 = 30,    /* SVGA3dShadeMode */
+   SVGA3D_RS_LINEPATTERN               = 31,    /* SVGA3dLinePattern */
+   SVGA3D_RS_SRCBLEND                  = 32,    /* SVGA3dBlendOp */
+   SVGA3D_RS_DSTBLEND                  = 33,    /* SVGA3dBlendOp */
+   SVGA3D_RS_BLENDEQUATION             = 34,    /* SVGA3dBlendEquation */
+   SVGA3D_RS_CULLMODE                  = 35,    /* SVGA3dFace */
+   SVGA3D_RS_ZFUNC                     = 36,    /* SVGA3dCmpFunc */
+   SVGA3D_RS_ALPHAFUNC                 = 37,    /* SVGA3dCmpFunc */
+   SVGA3D_RS_STENCILFUNC               = 38,    /* SVGA3dCmpFunc */
+   SVGA3D_RS_STENCILFAIL               = 39,    /* SVGA3dStencilOp */
+   SVGA3D_RS_STENCILZFAIL              = 40,    /* SVGA3dStencilOp */
+   SVGA3D_RS_STENCILPASS               = 41,    /* SVGA3dStencilOp */
+   SVGA3D_RS_ALPHAREF                  = 42,    /* float (0.0 .. 1.0) */
+   SVGA3D_RS_FRONTWINDING              = 43,    /* SVGA3dFrontWinding */
+   SVGA3D_RS_COORDINATETYPE            = 44,    /* SVGA3dCoordinateType */
+   SVGA3D_RS_ZBIAS                     = 45,    /* float */
+   SVGA3D_RS_RANGEFOGENABLE            = 46,    /* SVGA3dBool */
+   SVGA3D_RS_COLORWRITEENABLE          = 47,    /* SVGA3dColorMask */
+   SVGA3D_RS_VERTEXMATERIALENABLE      = 48,    /* SVGA3dBool */
+   SVGA3D_RS_DIFFUSEMATERIALSOURCE     = 49,    /* SVGA3dVertexMaterial */
+   SVGA3D_RS_SPECULARMATERIALSOURCE    = 50,    /* SVGA3dVertexMaterial */
+   SVGA3D_RS_AMBIENTMATERIALSOURCE     = 51,    /* SVGA3dVertexMaterial */
+   SVGA3D_RS_EMISSIVEMATERIALSOURCE    = 52,    /* SVGA3dVertexMaterial */
+   SVGA3D_RS_TEXTUREFACTOR             = 53,    /* SVGA3dColor */
+   SVGA3D_RS_LOCALVIEWER               = 54,    /* SVGA3dBool */
+   SVGA3D_RS_SCISSORTESTENABLE         = 55,    /* SVGA3dBool */
+   SVGA3D_RS_BLENDCOLOR                = 56,    /* SVGA3dColor */
+   SVGA3D_RS_STENCILENABLE2SIDED       = 57,    /* SVGA3dBool */
+   SVGA3D_RS_CCWSTENCILFUNC            = 58,    /* SVGA3dCmpFunc */
+   SVGA3D_RS_CCWSTENCILFAIL            = 59,    /* SVGA3dStencilOp */
+   SVGA3D_RS_CCWSTENCILZFAIL           = 60,    /* SVGA3dStencilOp */
+   SVGA3D_RS_CCWSTENCILPASS            = 61,    /* SVGA3dStencilOp */
+   SVGA3D_RS_VERTEXBLEND               = 62,    /* SVGA3dVertexBlendFlags */
+   SVGA3D_RS_SLOPESCALEDEPTHBIAS       = 63,    /* float */
+   SVGA3D_RS_DEPTHBIAS                 = 64,    /* float */
+
+
+   /*
+    * Output Gamma Level
+    *
+    * Output gamma effects the gamma curve of colors that are output from the
+    * rendering pipeline.  A value of 1.0 specifies a linear color space. If the
+    * value is <= 0.0, gamma correction is ignored and linear color space is
+    * used.
+    */
+
+   SVGA3D_RS_OUTPUTGAMMA               = 65,    /* float */
+   SVGA3D_RS_ZVISIBLE                  = 66,    /* SVGA3dBool */
+   SVGA3D_RS_LASTPIXEL                 = 67,    /* SVGA3dBool */
+   SVGA3D_RS_CLIPPING                  = 68,    /* SVGA3dBool */
+   SVGA3D_RS_WRAP0                     = 69,    /* SVGA3dWrapFlags */
+   SVGA3D_RS_WRAP1                     = 70,    /* SVGA3dWrapFlags */
+   SVGA3D_RS_WRAP2                     = 71,    /* SVGA3dWrapFlags */
+   SVGA3D_RS_WRAP3                     = 72,    /* SVGA3dWrapFlags */
+   SVGA3D_RS_WRAP4                     = 73,    /* SVGA3dWrapFlags */
+   SVGA3D_RS_WRAP5                     = 74,    /* SVGA3dWrapFlags */
+   SVGA3D_RS_WRAP6                     = 75,    /* SVGA3dWrapFlags */
+   SVGA3D_RS_WRAP7                     = 76,    /* SVGA3dWrapFlags */
+   SVGA3D_RS_WRAP8                     = 77,    /* SVGA3dWrapFlags */
+   SVGA3D_RS_WRAP9                     = 78,    /* SVGA3dWrapFlags */
+   SVGA3D_RS_WRAP10                    = 79,    /* SVGA3dWrapFlags */
+   SVGA3D_RS_WRAP11                    = 80,    /* SVGA3dWrapFlags */
+   SVGA3D_RS_WRAP12                    = 81,    /* SVGA3dWrapFlags */
+   SVGA3D_RS_WRAP13                    = 82,    /* SVGA3dWrapFlags */
+   SVGA3D_RS_WRAP14                    = 83,    /* SVGA3dWrapFlags */
+   SVGA3D_RS_WRAP15                    = 84,    /* SVGA3dWrapFlags */
+   SVGA3D_RS_MULTISAMPLEANTIALIAS      = 85,    /* SVGA3dBool */
+   SVGA3D_RS_MULTISAMPLEMASK           = 86,    /* uint32 */
+   SVGA3D_RS_INDEXEDVERTEXBLENDENABLE  = 87,    /* SVGA3dBool */
+   SVGA3D_RS_TWEENFACTOR               = 88,    /* float */
+   SVGA3D_RS_ANTIALIASEDLINEENABLE     = 89,    /* SVGA3dBool */
+   SVGA3D_RS_COLORWRITEENABLE1         = 90,    /* SVGA3dColorMask */
+   SVGA3D_RS_COLORWRITEENABLE2         = 91,    /* SVGA3dColorMask */
+   SVGA3D_RS_COLORWRITEENABLE3         = 92,    /* SVGA3dColorMask */
+   SVGA3D_RS_SEPARATEALPHABLENDENABLE  = 93,    /* SVGA3dBool */
+   SVGA3D_RS_SRCBLENDALPHA             = 94,    /* SVGA3dBlendOp */
+   SVGA3D_RS_DSTBLENDALPHA             = 95,    /* SVGA3dBlendOp */
+   SVGA3D_RS_BLENDEQUATIONALPHA        = 96,    /* SVGA3dBlendEquation */
+   SVGA3D_RS_MAX
+} SVGA3dRenderStateName;
+
+typedef enum {
+   SVGA3D_VERTEXMATERIAL_NONE     = 0,    /* Use the value in the current material */
+   SVGA3D_VERTEXMATERIAL_DIFFUSE  = 1,    /* Use the value in the diffuse component */
+   SVGA3D_VERTEXMATERIAL_SPECULAR = 2,    /* Use the value in the specular component */
+} SVGA3dVertexMaterial;
+
+typedef enum {
+   SVGA3D_FILLMODE_INVALID = 0,
+   SVGA3D_FILLMODE_POINT   = 1,
+   SVGA3D_FILLMODE_LINE    = 2,
+   SVGA3D_FILLMODE_FILL    = 3,
+   SVGA3D_FILLMODE_MAX
+} SVGA3dFillModeType;
+
+
+typedef
+union {
+   struct {
+      uint16   mode;       /* SVGA3dFillModeType */
+      uint16   face;       /* SVGA3dFace */
+   };
+   uint32 uintValue;
+} SVGA3dFillMode;
+
+typedef enum {
+   SVGA3D_SHADEMODE_INVALID = 0,
+   SVGA3D_SHADEMODE_FLAT    = 1,
+   SVGA3D_SHADEMODE_SMOOTH  = 2,
+   SVGA3D_SHADEMODE_PHONG   = 3,     /* Not supported */
+   SVGA3D_SHADEMODE_MAX
+} SVGA3dShadeMode;
+
+typedef
+union {
+   struct {
+      uint16 repeat;
+      uint16 pattern;
+   };
+   uint32 uintValue;
+} SVGA3dLinePattern;
+
+typedef enum {
+   SVGA3D_BLENDOP_INVALID            = 0,
+   SVGA3D_BLENDOP_ZERO               = 1,
+   SVGA3D_BLENDOP_ONE                = 2,
+   SVGA3D_BLENDOP_SRCCOLOR           = 3,
+   SVGA3D_BLENDOP_INVSRCCOLOR        = 4,
+   SVGA3D_BLENDOP_SRCALPHA           = 5,
+   SVGA3D_BLENDOP_INVSRCALPHA        = 6,
+   SVGA3D_BLENDOP_DESTALPHA          = 7,
+   SVGA3D_BLENDOP_INVDESTALPHA       = 8,
+   SVGA3D_BLENDOP_DESTCOLOR          = 9,
+   SVGA3D_BLENDOP_INVDESTCOLOR       = 10,
+   SVGA3D_BLENDOP_SRCALPHASAT        = 11,
+   SVGA3D_BLENDOP_BLENDFACTOR        = 12,
+   SVGA3D_BLENDOP_INVBLENDFACTOR     = 13,
+   SVGA3D_BLENDOP_MAX
+} SVGA3dBlendOp;
+
+typedef enum {
+   SVGA3D_BLENDEQ_INVALID            = 0,
+   SVGA3D_BLENDEQ_ADD                = 1,
+   SVGA3D_BLENDEQ_SUBTRACT           = 2,
+   SVGA3D_BLENDEQ_REVSUBTRACT        = 3,
+   SVGA3D_BLENDEQ_MINIMUM            = 4,
+   SVGA3D_BLENDEQ_MAXIMUM            = 5,
+   SVGA3D_BLENDEQ_MAX
+} SVGA3dBlendEquation;
+
+typedef enum {
+   SVGA3D_FRONTWINDING_INVALID = 0,
+   SVGA3D_FRONTWINDING_CW      = 1,
+   SVGA3D_FRONTWINDING_CCW     = 2,
+   SVGA3D_FRONTWINDING_MAX
+} SVGA3dFrontWinding;
+
+typedef enum {
+   SVGA3D_FACE_INVALID  = 0,
+   SVGA3D_FACE_NONE     = 1,
+   SVGA3D_FACE_FRONT    = 2,
+   SVGA3D_FACE_BACK     = 3,
+   SVGA3D_FACE_FRONT_BACK = 4,
+   SVGA3D_FACE_MAX
+} SVGA3dFace;
+
+/*
+ * The order and the values should not be changed
+ */
+
+typedef enum {
+   SVGA3D_CMP_INVALID              = 0,
+   SVGA3D_CMP_NEVER                = 1,
+   SVGA3D_CMP_LESS                 = 2,
+   SVGA3D_CMP_EQUAL                = 3,
+   SVGA3D_CMP_LESSEQUAL            = 4,
+   SVGA3D_CMP_GREATER              = 5,
+   SVGA3D_CMP_NOTEQUAL             = 6,
+   SVGA3D_CMP_GREATEREQUAL         = 7,
+   SVGA3D_CMP_ALWAYS               = 8,
+   SVGA3D_CMP_MAX
+} SVGA3dCmpFunc;
+
+/*
+ * SVGA3D_FOGFUNC_* specifies the fog equation, or PER_VERTEX which allows
+ * the fog factor to be specified in the alpha component of the specular
+ * (a.k.a. secondary) vertex color.
+ */
+typedef enum {
+   SVGA3D_FOGFUNC_INVALID          = 0,
+   SVGA3D_FOGFUNC_EXP              = 1,
+   SVGA3D_FOGFUNC_EXP2             = 2,
+   SVGA3D_FOGFUNC_LINEAR           = 3,
+   SVGA3D_FOGFUNC_PER_VERTEX       = 4
+} SVGA3dFogFunction;
+
+/*
+ * SVGA3D_FOGTYPE_* specifies if fog factors are computed on a per-vertex
+ * or per-pixel basis.
+ */
+typedef enum {
+   SVGA3D_FOGTYPE_INVALID          = 0,
+   SVGA3D_FOGTYPE_VERTEX           = 1,
+   SVGA3D_FOGTYPE_PIXEL            = 2,
+   SVGA3D_FOGTYPE_MAX              = 3
+} SVGA3dFogType;
+
+/*
+ * SVGA3D_FOGBASE_* selects depth or range-based fog. Depth-based fog is
+ * computed using the eye Z value of each pixel (or vertex), whereas range-
+ * based fog is computed using the actual distance (range) to the eye.
+ */
+typedef enum {
+   SVGA3D_FOGBASE_INVALID          = 0,
+   SVGA3D_FOGBASE_DEPTHBASED       = 1,
+   SVGA3D_FOGBASE_RANGEBASED       = 2,
+   SVGA3D_FOGBASE_MAX              = 3
+} SVGA3dFogBase;
+
+typedef enum {
+   SVGA3D_STENCILOP_INVALID        = 0,
+   SVGA3D_STENCILOP_KEEP           = 1,
+   SVGA3D_STENCILOP_ZERO           = 2,
+   SVGA3D_STENCILOP_REPLACE        = 3,
+   SVGA3D_STENCILOP_INCRSAT        = 4,
+   SVGA3D_STENCILOP_DECRSAT        = 5,
+   SVGA3D_STENCILOP_INVERT         = 6,
+   SVGA3D_STENCILOP_INCR           = 7,
+   SVGA3D_STENCILOP_DECR           = 8,
+   SVGA3D_STENCILOP_MAX
+} SVGA3dStencilOp;
+
+typedef enum {
+   SVGA3D_CLIPPLANE_0              = (1 << 0),
+   SVGA3D_CLIPPLANE_1              = (1 << 1),
+   SVGA3D_CLIPPLANE_2              = (1 << 2),
+   SVGA3D_CLIPPLANE_3              = (1 << 3),
+   SVGA3D_CLIPPLANE_4              = (1 << 4),
+   SVGA3D_CLIPPLANE_5              = (1 << 5),
+} SVGA3dClipPlanes;
+
+typedef enum {
+   SVGA3D_CLEAR_COLOR              = 0x1,
+   SVGA3D_CLEAR_DEPTH              = 0x2,
+   SVGA3D_CLEAR_STENCIL            = 0x4
+} SVGA3dClearFlag;
+
+typedef enum {
+   SVGA3D_RT_DEPTH                 = 0,
+   SVGA3D_RT_STENCIL               = 1,
+   SVGA3D_RT_COLOR0                = 2,
+   SVGA3D_RT_COLOR1                = 3,
+   SVGA3D_RT_COLOR2                = 4,
+   SVGA3D_RT_COLOR3                = 5,
+   SVGA3D_RT_COLOR4                = 6,
+   SVGA3D_RT_COLOR5                = 7,
+   SVGA3D_RT_COLOR6                = 8,
+   SVGA3D_RT_COLOR7                = 9,
+   SVGA3D_RT_MAX,
+   SVGA3D_RT_INVALID               = ((uint32)-1),
+} SVGA3dRenderTargetType;
+
+#define SVGA3D_MAX_RT_COLOR (SVGA3D_RT_COLOR7 - SVGA3D_RT_COLOR0 + 1)
+
+typedef
+union {
+   struct {
+      uint32  red   : 1;
+      uint32  green : 1;
+      uint32  blue  : 1;
+      uint32  alpha : 1;
+   };
+   uint32 uintValue;
+} SVGA3dColorMask;
+
+typedef enum {
+   SVGA3D_VBLEND_DISABLE            = 0,
+   SVGA3D_VBLEND_1WEIGHT            = 1,
+   SVGA3D_VBLEND_2WEIGHT            = 2,
+   SVGA3D_VBLEND_3WEIGHT            = 3,
+} SVGA3dVertexBlendFlags;
+
+typedef enum {
+   SVGA3D_WRAPCOORD_0   = 1 << 0,
+   SVGA3D_WRAPCOORD_1   = 1 << 1,
+   SVGA3D_WRAPCOORD_2   = 1 << 2,
+   SVGA3D_WRAPCOORD_3   = 1 << 3,
+   SVGA3D_WRAPCOORD_ALL = 0xF,
+} SVGA3dWrapFlags;
+
+/*
+ * SVGA_3D_CMD_TEXTURESTATE Types.  All value types
+ * must fit in a uint32.
+ */
+
+typedef enum {
+   SVGA3D_TS_INVALID                    = 0,
+   SVGA3D_TS_BIND_TEXTURE               = 1,    /* SVGA3dSurfaceId */
+   SVGA3D_TS_COLOROP                    = 2,    /* SVGA3dTextureCombiner */
+   SVGA3D_TS_COLORARG1                  = 3,    /* SVGA3dTextureArgData */
+   SVGA3D_TS_COLORARG2                  = 4,    /* SVGA3dTextureArgData */
+   SVGA3D_TS_ALPHAOP                    = 5,    /* SVGA3dTextureCombiner */
+   SVGA3D_TS_ALPHAARG1                  = 6,    /* SVGA3dTextureArgData */
+   SVGA3D_TS_ALPHAARG2                  = 7,    /* SVGA3dTextureArgData */
+   SVGA3D_TS_ADDRESSU                   = 8,    /* SVGA3dTextureAddress */
+   SVGA3D_TS_ADDRESSV                   = 9,    /* SVGA3dTextureAddress */
+   SVGA3D_TS_MIPFILTER                  = 10,   /* SVGA3dTextureFilter */
+   SVGA3D_TS_MAGFILTER                  = 11,   /* SVGA3dTextureFilter */
+   SVGA3D_TS_MINFILTER                  = 12,   /* SVGA3dTextureFilter */
+   SVGA3D_TS_BORDERCOLOR                = 13,   /* SVGA3dColor */
+   SVGA3D_TS_TEXCOORDINDEX              = 14,   /* uint32 */
+   SVGA3D_TS_TEXTURETRANSFORMFLAGS      = 15,   /* SVGA3dTexTransformFlags */
+   SVGA3D_TS_TEXCOORDGEN                = 16,   /* SVGA3dTextureCoordGen */
+   SVGA3D_TS_BUMPENVMAT00               = 17,   /* float */
+   SVGA3D_TS_BUMPENVMAT01               = 18,   /* float */
+   SVGA3D_TS_BUMPENVMAT10               = 19,   /* float */
+   SVGA3D_TS_BUMPENVMAT11               = 20,   /* float */
+   SVGA3D_TS_TEXTURE_MIPMAP_LEVEL       = 21,   /* uint32 */
+   SVGA3D_TS_TEXTURE_LOD_BIAS           = 22,   /* float */
+   SVGA3D_TS_TEXTURE_ANISOTROPIC_LEVEL  = 23,   /* uint32 */
+   SVGA3D_TS_ADDRESSW                   = 24,   /* SVGA3dTextureAddress */
+
+
+   /*
+    * Sampler Gamma Level
+    *
+    * Sampler gamma effects the color of samples taken from the sampler.  A
+    * value of 1.0 will produce linear samples.  If the value is <= 0.0 the
+    * gamma value is ignored and a linear space is used.
+    */
+
+   SVGA3D_TS_GAMMA                      = 25,   /* float */
+   SVGA3D_TS_BUMPENVLSCALE              = 26,   /* float */
+   SVGA3D_TS_BUMPENVLOFFSET             = 27,   /* float */
+   SVGA3D_TS_COLORARG0                  = 28,   /* SVGA3dTextureArgData */
+   SVGA3D_TS_ALPHAARG0                  = 29,   /* SVGA3dTextureArgData */
+   SVGA3D_TS_MAX
+} SVGA3dTextureStateName;
+
+typedef enum {
+   SVGA3D_TC_INVALID                   = 0,
+   SVGA3D_TC_DISABLE                   = 1,
+   SVGA3D_TC_SELECTARG1                = 2,
+   SVGA3D_TC_SELECTARG2                = 3,
+   SVGA3D_TC_MODULATE                  = 4,
+   SVGA3D_TC_ADD                       = 5,
+   SVGA3D_TC_ADDSIGNED                 = 6,
+   SVGA3D_TC_SUBTRACT                  = 7,
+   SVGA3D_TC_BLENDTEXTUREALPHA         = 8,
+   SVGA3D_TC_BLENDDIFFUSEALPHA         = 9,
+   SVGA3D_TC_BLENDCURRENTALPHA         = 10,
+   SVGA3D_TC_BLENDFACTORALPHA          = 11,
+   SVGA3D_TC_MODULATE2X                = 12,
+   SVGA3D_TC_MODULATE4X                = 13,
+   SVGA3D_TC_DSDT                      = 14,
+   SVGA3D_TC_DOTPRODUCT3               = 15,
+   SVGA3D_TC_BLENDTEXTUREALPHAPM       = 16,
+   SVGA3D_TC_ADDSIGNED2X               = 17,
+   SVGA3D_TC_ADDSMOOTH                 = 18,
+   SVGA3D_TC_PREMODULATE               = 19,
+   SVGA3D_TC_MODULATEALPHA_ADDCOLOR    = 20,
+   SVGA3D_TC_MODULATECOLOR_ADDALPHA    = 21,
+   SVGA3D_TC_MODULATEINVALPHA_ADDCOLOR = 22,
+   SVGA3D_TC_MODULATEINVCOLOR_ADDALPHA = 23,
+   SVGA3D_TC_BUMPENVMAPLUMINANCE       = 24,
+   SVGA3D_TC_MULTIPLYADD               = 25,
+   SVGA3D_TC_LERP                      = 26,
+   SVGA3D_TC_MAX
+} SVGA3dTextureCombiner;
+
+#define SVGA3D_TC_CAP_BIT(svga3d_tc_op) (svga3d_tc_op ? (1 << (svga3d_tc_op - 1)) : 0)
+
+typedef enum {
+   SVGA3D_TEX_ADDRESS_INVALID    = 0,
+   SVGA3D_TEX_ADDRESS_WRAP       = 1,
+   SVGA3D_TEX_ADDRESS_MIRROR     = 2,
+   SVGA3D_TEX_ADDRESS_CLAMP      = 3,
+   SVGA3D_TEX_ADDRESS_BORDER     = 4,
+   SVGA3D_TEX_ADDRESS_MIRRORONCE = 5,
+   SVGA3D_TEX_ADDRESS_EDGE       = 6,
+   SVGA3D_TEX_ADDRESS_MAX
+} SVGA3dTextureAddress;
+
+/*
+ * SVGA3D_TEX_FILTER_NONE as the minification filter means mipmapping is
+ * disabled, and the rasterizer should use the magnification filter instead.
+ */
+typedef enum {
+   SVGA3D_TEX_FILTER_NONE           = 0,
+   SVGA3D_TEX_FILTER_NEAREST        = 1,
+   SVGA3D_TEX_FILTER_LINEAR         = 2,
+   SVGA3D_TEX_FILTER_ANISOTROPIC    = 3,
+   SVGA3D_TEX_FILTER_FLATCUBIC      = 4, // Deprecated, not implemented
+   SVGA3D_TEX_FILTER_GAUSSIANCUBIC  = 5, // Deprecated, not implemented
+   SVGA3D_TEX_FILTER_PYRAMIDALQUAD  = 6, // Not currently implemented
+   SVGA3D_TEX_FILTER_GAUSSIANQUAD   = 7, // Not currently implemented
+   SVGA3D_TEX_FILTER_MAX
+} SVGA3dTextureFilter;
+
+typedef enum {
+   SVGA3D_TEX_TRANSFORM_OFF    = 0,
+   SVGA3D_TEX_TRANSFORM_S      = (1 << 0),
+   SVGA3D_TEX_TRANSFORM_T      = (1 << 1),
+   SVGA3D_TEX_TRANSFORM_R      = (1 << 2),
+   SVGA3D_TEX_TRANSFORM_Q      = (1 << 3),
+   SVGA3D_TEX_PROJECTED        = (1 << 15),
+} SVGA3dTexTransformFlags;
+
+typedef enum {
+   SVGA3D_TEXCOORD_GEN_OFF              = 0,
+   SVGA3D_TEXCOORD_GEN_EYE_POSITION     = 1,
+   SVGA3D_TEXCOORD_GEN_EYE_NORMAL       = 2,
+   SVGA3D_TEXCOORD_GEN_REFLECTIONVECTOR = 3,
+   SVGA3D_TEXCOORD_GEN_SPHERE           = 4,
+   SVGA3D_TEXCOORD_GEN_MAX
+} SVGA3dTextureCoordGen;
+
+/*
+ * Texture argument constants for texture combiner
+ */
+typedef enum {
+   SVGA3D_TA_INVALID    = 0,
+   SVGA3D_TA_CONSTANT   = 1,
+   SVGA3D_TA_PREVIOUS   = 2,
+   SVGA3D_TA_DIFFUSE    = 3,
+   SVGA3D_TA_TEXTURE    = 4,
+   SVGA3D_TA_SPECULAR   = 5,
+   SVGA3D_TA_MAX
+} SVGA3dTextureArgData;
+
+#define SVGA3D_TM_MASK_LEN 4
+
+/* Modifiers for texture argument constants defined above. */
+typedef enum {
+   SVGA3D_TM_NONE       = 0,
+   SVGA3D_TM_ALPHA      = (1 << SVGA3D_TM_MASK_LEN),
+   SVGA3D_TM_ONE_MINUS  = (2 << SVGA3D_TM_MASK_LEN),
+} SVGA3dTextureArgModifier;
+
+#define SVGA3D_INVALID_ID         ((uint32)-1)
+#define SVGA3D_MAX_CLIP_PLANES    6
+
+/*
+ * This is the limit to the number of fixed-function texture
+ * transforms and texture coordinates we can support. It does *not*
+ * correspond to the number of texture image units (samplers) we
+ * support!
+ */
+#define SVGA3D_MAX_TEXTURE_COORDS 8
+
+/*
+ * Vertex declarations
+ *
+ * Notes:
+ *
+ * SVGA3D_DECLUSAGE_POSITIONT is for pre-transformed vertices. If you
+ * draw with any POSITIONT vertex arrays, the programmable vertex
+ * pipeline will be implicitly disabled. Drawing will take place as if
+ * no vertex shader was bound.
+ */
+
+typedef enum {
+   SVGA3D_DECLUSAGE_POSITION     = 0,
+   SVGA3D_DECLUSAGE_BLENDWEIGHT,       //  1
+   SVGA3D_DECLUSAGE_BLENDINDICES,      //  2
+   SVGA3D_DECLUSAGE_NORMAL,            //  3
+   SVGA3D_DECLUSAGE_PSIZE,             //  4
+   SVGA3D_DECLUSAGE_TEXCOORD,          //  5
+   SVGA3D_DECLUSAGE_TANGENT,           //  6
+   SVGA3D_DECLUSAGE_BINORMAL,          //  7
+   SVGA3D_DECLUSAGE_TESSFACTOR,        //  8
+   SVGA3D_DECLUSAGE_POSITIONT,         //  9
+   SVGA3D_DECLUSAGE_COLOR,             // 10
+   SVGA3D_DECLUSAGE_FOG,               // 11
+   SVGA3D_DECLUSAGE_DEPTH,             // 12
+   SVGA3D_DECLUSAGE_SAMPLE,            // 13
+   SVGA3D_DECLUSAGE_MAX
+} SVGA3dDeclUsage;
+
+typedef enum {
+   SVGA3D_DECLMETHOD_DEFAULT     = 0,
+   SVGA3D_DECLMETHOD_PARTIALU,
+   SVGA3D_DECLMETHOD_PARTIALV,
+   SVGA3D_DECLMETHOD_CROSSUV,          // Normal
+   SVGA3D_DECLMETHOD_UV,
+   SVGA3D_DECLMETHOD_LOOKUP,           // Lookup a displacement map
+   SVGA3D_DECLMETHOD_LOOKUPPRESAMPLED, // Lookup a pre-sampled displacement map
+} SVGA3dDeclMethod;
+
+typedef enum {
+   SVGA3D_DECLTYPE_FLOAT1        =  0,
+   SVGA3D_DECLTYPE_FLOAT2        =  1,
+   SVGA3D_DECLTYPE_FLOAT3        =  2,
+   SVGA3D_DECLTYPE_FLOAT4        =  3,
+   SVGA3D_DECLTYPE_D3DCOLOR      =  4,
+   SVGA3D_DECLTYPE_UBYTE4        =  5,
+   SVGA3D_DECLTYPE_SHORT2        =  6,
+   SVGA3D_DECLTYPE_SHORT4        =  7,
+   SVGA3D_DECLTYPE_UBYTE4N       =  8,
+   SVGA3D_DECLTYPE_SHORT2N       =  9,
+   SVGA3D_DECLTYPE_SHORT4N       = 10,
+   SVGA3D_DECLTYPE_USHORT2N      = 11,
+   SVGA3D_DECLTYPE_USHORT4N      = 12,
+   SVGA3D_DECLTYPE_UDEC3         = 13,
+   SVGA3D_DECLTYPE_DEC3N         = 14,
+   SVGA3D_DECLTYPE_FLOAT16_2     = 15,
+   SVGA3D_DECLTYPE_FLOAT16_4     = 16,
+   SVGA3D_DECLTYPE_MAX,
+} SVGA3dDeclType;
+
+/*
+ * This structure is used for the divisor for geometry instancing;
+ * it's a direct translation of the Direct3D equivalent.
+ */
+typedef union {
+   struct {
+      /*
+       * For index data, this number represents the number of instances to draw.
+       * For instance data, this number represents the number of
+       * instances/vertex in this stream
+       */
+      uint32 count : 30;
+
+      /*
+       * This is 1 if this is supposed to be the data that is repeated for
+       * every instance.
+       */
+      uint32 indexedData : 1;
+
+      /*
+       * This is 1 if this is supposed to be the per-instance data.
+       */
+      uint32 instanceData : 1;
+   };
+
+   uint32 value;
+} SVGA3dVertexDivisor;
+
+typedef enum {
+   SVGA3D_PRIMITIVE_INVALID                     = 0,
+   SVGA3D_PRIMITIVE_TRIANGLELIST                = 1,
+   SVGA3D_PRIMITIVE_POINTLIST                   = 2,
+   SVGA3D_PRIMITIVE_LINELIST                    = 3,
+   SVGA3D_PRIMITIVE_LINESTRIP                   = 4,
+   SVGA3D_PRIMITIVE_TRIANGLESTRIP               = 5,
+   SVGA3D_PRIMITIVE_TRIANGLEFAN                 = 6,
+   SVGA3D_PRIMITIVE_MAX
+} SVGA3dPrimitiveType;
+
+typedef enum {
+   SVGA3D_COORDINATE_INVALID                   = 0,
+   SVGA3D_COORDINATE_LEFTHANDED                = 1,
+   SVGA3D_COORDINATE_RIGHTHANDED               = 2,
+   SVGA3D_COORDINATE_MAX
+} SVGA3dCoordinateType;
+
+typedef enum {
+   SVGA3D_TRANSFORM_INVALID                     = 0,
+   SVGA3D_TRANSFORM_WORLD                       = 1,
+   SVGA3D_TRANSFORM_VIEW                        = 2,
+   SVGA3D_TRANSFORM_PROJECTION                  = 3,
+   SVGA3D_TRANSFORM_TEXTURE0                    = 4,
+   SVGA3D_TRANSFORM_TEXTURE1                    = 5,
+   SVGA3D_TRANSFORM_TEXTURE2                    = 6,
+   SVGA3D_TRANSFORM_TEXTURE3                    = 7,
+   SVGA3D_TRANSFORM_TEXTURE4                    = 8,
+   SVGA3D_TRANSFORM_TEXTURE5                    = 9,
+   SVGA3D_TRANSFORM_TEXTURE6                    = 10,
+   SVGA3D_TRANSFORM_TEXTURE7                    = 11,
+   SVGA3D_TRANSFORM_WORLD1                      = 12,
+   SVGA3D_TRANSFORM_WORLD2                      = 13,
+   SVGA3D_TRANSFORM_WORLD3                      = 14,
+   SVGA3D_TRANSFORM_MAX
+} SVGA3dTransformType;
+
+typedef enum {
+   SVGA3D_LIGHTTYPE_INVALID                     = 0,
+   SVGA3D_LIGHTTYPE_POINT                       = 1,
+   SVGA3D_LIGHTTYPE_SPOT1                       = 2, /* 1-cone, in degrees */
+   SVGA3D_LIGHTTYPE_SPOT2                       = 3, /* 2-cone, in radians */
+   SVGA3D_LIGHTTYPE_DIRECTIONAL                 = 4,
+   SVGA3D_LIGHTTYPE_MAX
+} SVGA3dLightType;
+
+typedef enum {
+   SVGA3D_CUBEFACE_POSX                         = 0,
+   SVGA3D_CUBEFACE_NEGX                         = 1,
+   SVGA3D_CUBEFACE_POSY                         = 2,
+   SVGA3D_CUBEFACE_NEGY                         = 3,
+   SVGA3D_CUBEFACE_POSZ                         = 4,
+   SVGA3D_CUBEFACE_NEGZ                         = 5,
+} SVGA3dCubeFace;
+
+typedef enum {
+   SVGA3D_SHADERTYPE_COMPILED_DX8               = 0,
+   SVGA3D_SHADERTYPE_VS                         = 1,
+   SVGA3D_SHADERTYPE_PS                         = 2,
+   SVGA3D_SHADERTYPE_MAX
+} SVGA3dShaderType;
+
+typedef enum {
+   SVGA3D_CONST_TYPE_FLOAT                      = 0,
+   SVGA3D_CONST_TYPE_INT                        = 1,
+   SVGA3D_CONST_TYPE_BOOL                       = 2,
+} SVGA3dShaderConstType;
+
+#define SVGA3D_MAX_SURFACE_FACES                6
+
+typedef enum {
+   SVGA3D_STRETCH_BLT_POINT                     = 0,
+   SVGA3D_STRETCH_BLT_LINEAR                    = 1,
+   SVGA3D_STRETCH_BLT_MAX
+} SVGA3dStretchBltMode;
+
+typedef enum {
+   SVGA3D_QUERYTYPE_OCCLUSION                   = 0,
+   SVGA3D_QUERYTYPE_MAX
+} SVGA3dQueryType;
+
+typedef enum {
+   SVGA3D_QUERYSTATE_PENDING     = 0,      /* Waiting on the host (set by guest) */
+   SVGA3D_QUERYSTATE_SUCCEEDED   = 1,      /* Completed successfully (set by host) */
+   SVGA3D_QUERYSTATE_FAILED      = 2,      /* Completed unsuccessfully (set by host) */
+   SVGA3D_QUERYSTATE_NEW         = 3,      /* Never submitted (For guest use only) */
+} SVGA3dQueryState;
+
+typedef enum {
+   SVGA3D_WRITE_HOST_VRAM        = 1,
+   SVGA3D_READ_HOST_VRAM         = 2,
+} SVGA3dTransferType;
+
+/*
+ * The maximum number vertex arrays we're guaranteed to support in
+ * SVGA_3D_CMD_DRAWPRIMITIVES.
+ */
+#define SVGA3D_MAX_VERTEX_ARRAYS   32
+
+/*
+ * Identifiers for commands in the command FIFO.
+ *
+ * IDs between 1000 and 1039 (inclusive) were used by obsolete versions of
+ * the SVGA3D protocol and remain reserved; they should not be used in the
+ * future.
+ *
+ * IDs between 1040 and 1999 (inclusive) are available for use by the
+ * current SVGA3D protocol.
+ *
+ * FIFO clients other than SVGA3D should stay below 1000, or at 2000
+ * and up.
+ */
+
+#define SVGA_3D_CMD_LEGACY_BASE            1000
+#define SVGA_3D_CMD_BASE                   1040
+
+#define SVGA_3D_CMD_SURFACE_DEFINE         SVGA_3D_CMD_BASE + 0
+#define SVGA_3D_CMD_SURFACE_DESTROY        SVGA_3D_CMD_BASE + 1
+#define SVGA_3D_CMD_SURFACE_COPY           SVGA_3D_CMD_BASE + 2
+#define SVGA_3D_CMD_SURFACE_STRETCHBLT     SVGA_3D_CMD_BASE + 3
+#define SVGA_3D_CMD_SURFACE_DMA            SVGA_3D_CMD_BASE + 4
+#define SVGA_3D_CMD_CONTEXT_DEFINE         SVGA_3D_CMD_BASE + 5
+#define SVGA_3D_CMD_CONTEXT_DESTROY        SVGA_3D_CMD_BASE + 6
+#define SVGA_3D_CMD_SETTRANSFORM           SVGA_3D_CMD_BASE + 7
+#define SVGA_3D_CMD_SETZRANGE              SVGA_3D_CMD_BASE + 8
+#define SVGA_3D_CMD_SETRENDERSTATE         SVGA_3D_CMD_BASE + 9
+#define SVGA_3D_CMD_SETRENDERTARGET        SVGA_3D_CMD_BASE + 10
+#define SVGA_3D_CMD_SETTEXTURESTATE        SVGA_3D_CMD_BASE + 11
+#define SVGA_3D_CMD_SETMATERIAL            SVGA_3D_CMD_BASE + 12
+#define SVGA_3D_CMD_SETLIGHTDATA           SVGA_3D_CMD_BASE + 13
+#define SVGA_3D_CMD_SETLIGHTENABLED        SVGA_3D_CMD_BASE + 14
+#define SVGA_3D_CMD_SETVIEWPORT            SVGA_3D_CMD_BASE + 15
+#define SVGA_3D_CMD_SETCLIPPLANE           SVGA_3D_CMD_BASE + 16
+#define SVGA_3D_CMD_CLEAR                  SVGA_3D_CMD_BASE + 17
+#define SVGA_3D_CMD_PRESENT                SVGA_3D_CMD_BASE + 18    // Deprecated
+#define SVGA_3D_CMD_SHADER_DEFINE          SVGA_3D_CMD_BASE + 19
+#define SVGA_3D_CMD_SHADER_DESTROY         SVGA_3D_CMD_BASE + 20
+#define SVGA_3D_CMD_SET_SHADER             SVGA_3D_CMD_BASE + 21
+#define SVGA_3D_CMD_SET_SHADER_CONST       SVGA_3D_CMD_BASE + 22
+#define SVGA_3D_CMD_DRAW_PRIMITIVES        SVGA_3D_CMD_BASE + 23
+#define SVGA_3D_CMD_SETSCISSORRECT         SVGA_3D_CMD_BASE + 24
+#define SVGA_3D_CMD_BEGIN_QUERY            SVGA_3D_CMD_BASE + 25
+#define SVGA_3D_CMD_END_QUERY              SVGA_3D_CMD_BASE + 26
+#define SVGA_3D_CMD_WAIT_FOR_QUERY         SVGA_3D_CMD_BASE + 27
+#define SVGA_3D_CMD_PRESENT_READBACK       SVGA_3D_CMD_BASE + 28    // Deprecated
+#define SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN SVGA_3D_CMD_BASE + 29
+#define SVGA_3D_CMD_MAX                    SVGA_3D_CMD_BASE + 30
+
+#define SVGA_3D_CMD_FUTURE_MAX             2000
+
+/*
+ * Common substructures used in multiple FIFO commands:
+ */
+
+typedef struct {
+   union {
+      struct {
+         uint16  function;       // SVGA3dFogFunction
+         uint8   type;           // SVGA3dFogType
+         uint8   base;           // SVGA3dFogBase
+      };
+      uint32     uintValue;
+   };
+} SVGA3dFogMode;
+
+/*
+ * Uniquely identify one image (a 1D/2D/3D array) from a surface. This
+ * is a surface ID as well as face/mipmap indices.
+ */
+
+typedef
+struct SVGA3dSurfaceImageId {
+   uint32               sid;
+   uint32               face;
+   uint32               mipmap;
+} SVGA3dSurfaceImageId;
+
+typedef
+struct SVGA3dGuestImage {
+   SVGAGuestPtr         ptr;
+
+   /*
+    * A note on interpretation of pitch: This value of pitch is the
+    * number of bytes between vertically adjacent image
+    * blocks. Normally this is the number of bytes between the first
+    * pixel of two adjacent scanlines. With compressed textures,
+    * however, this may represent the number of bytes between
+    * compression blocks rather than between rows of pixels.
+    *
+    * XXX: Compressed textures currently must be tightly packed in guest memory.
+    *
+    * If the image is 1-dimensional, pitch is ignored.
+    *
+    * If 'pitch' is zero, the SVGA3D device calculates a pitch value
+    * assuming each row of blocks is tightly packed.
+    */
+   uint32 pitch;
+} SVGA3dGuestImage;
+
+
+/*
+ * FIFO command format definitions:
+ */
+
+/*
+ * The data size header following cmdNum for every 3d command
+ */
+typedef
+struct {
+   uint32               id;
+   uint32               size;
+} SVGA3dCmdHeader;
+
+/*
+ * A surface is a hierarchy of host VRAM surfaces: 1D, 2D, or 3D, with
+ * optional mipmaps and cube faces.
+ */
+
+typedef
+struct {
+   uint32               width;
+   uint32               height;
+   uint32               depth;
+} SVGA3dSize;
+
+typedef enum {
+   SVGA3D_SURFACE_CUBEMAP              = (1 << 0),
+   SVGA3D_SURFACE_HINT_STATIC          = (1 << 1),
+   SVGA3D_SURFACE_HINT_DYNAMIC         = (1 << 2),
+   SVGA3D_SURFACE_HINT_INDEXBUFFER     = (1 << 3),
+   SVGA3D_SURFACE_HINT_VERTEXBUFFER    = (1 << 4),
+   SVGA3D_SURFACE_HINT_TEXTURE         = (1 << 5),
+   SVGA3D_SURFACE_HINT_RENDERTARGET    = (1 << 6),
+   SVGA3D_SURFACE_HINT_DEPTHSTENCIL    = (1 << 7),
+   SVGA3D_SURFACE_HINT_WRITEONLY       = (1 << 8),
+} SVGA3dSurfaceFlags;
+
+typedef
+struct {
+   uint32               numMipLevels;
+} SVGA3dSurfaceFace;
+
+typedef
+struct {
+   uint32                      sid;
+   SVGA3dSurfaceFlags          surfaceFlags;
+   SVGA3dSurfaceFormat         format;
+   SVGA3dSurfaceFace           face[SVGA3D_MAX_SURFACE_FACES];
+   /*
+    * Followed by an SVGA3dSize structure for each mip level in each face.
+    *
+    * A note on surface sizes: Sizes are always specified in pixels,
+    * even if the true surface size is not a multiple of the minimum
+    * block size of the surface's format. For example, a 3x3x1 DXT1
+    * compressed texture would actually be stored as a 4x4x1 image in
+    * memory.
+    */
+} SVGA3dCmdDefineSurface;       /* SVGA_3D_CMD_SURFACE_DEFINE */
+
+typedef
+struct {
+   uint32               sid;
+} SVGA3dCmdDestroySurface;      /* SVGA_3D_CMD_SURFACE_DESTROY */
+
+typedef
+struct {
+   uint32               cid;
+} SVGA3dCmdDefineContext;       /* SVGA_3D_CMD_CONTEXT_DEFINE */
+
+typedef
+struct {
+   uint32               cid;
+} SVGA3dCmdDestroyContext;      /* SVGA_3D_CMD_CONTEXT_DESTROY */
+
+typedef
+struct {
+   uint32               cid;
+   SVGA3dClearFlag      clearFlag;
+   uint32               color;
+   float                depth;
+   uint32               stencil;
+   /* Followed by variable number of SVGA3dRect structures */
+} SVGA3dCmdClear;               /* SVGA_3D_CMD_CLEAR */
+
+typedef
+struct SVGA3dCopyRect {
+   uint32               x;
+   uint32               y;
+   uint32               w;
+   uint32               h;
+   uint32               srcx;
+   uint32               srcy;
+} SVGA3dCopyRect;
+
+typedef
+struct SVGA3dCopyBox {
+   uint32               x;
+   uint32               y;
+   uint32               z;
+   uint32               w;
+   uint32               h;
+   uint32               d;
+   uint32               srcx;
+   uint32               srcy;
+   uint32               srcz;
+} SVGA3dCopyBox;
+
+typedef
+struct {
+   uint32               x;
+   uint32               y;
+   uint32               w;
+   uint32               h;
+} SVGA3dRect;
+
+typedef
+struct {
+   uint32               x;
+   uint32               y;
+   uint32               z;
+   uint32               w;
+   uint32               h;
+   uint32               d;
+} SVGA3dBox;
+
+typedef
+struct {
+   uint32               x;
+   uint32               y;
+   uint32               z;
+} SVGA3dPoint;
+
+typedef
+struct {
+   SVGA3dLightType      type;
+   SVGA3dBool           inWorldSpace;
+   float                diffuse[4];
+   float                specular[4];
+   float                ambient[4];
+   float                position[4];
+   float                direction[4];
+   float                range;
+   float                falloff;
+   float                attenuation0;
+   float                attenuation1;
+   float                attenuation2;
+   float                theta;
+   float                phi;
+} SVGA3dLightData;
+
+typedef
+struct {
+   uint32               sid;
+   /* Followed by variable number of SVGA3dCopyRect structures */
+} SVGA3dCmdPresent;             /* SVGA_3D_CMD_PRESENT */
+
+typedef
+struct {
+   SVGA3dRenderStateName   state;
+   union {
+      uint32               uintValue;
+      float                floatValue;
+   };
+} SVGA3dRenderState;
+
+typedef
+struct {
+   uint32               cid;
+   /* Followed by variable number of SVGA3dRenderState structures */
+} SVGA3dCmdSetRenderState;      /* SVGA_3D_CMD_SETRENDERSTATE */
+
+typedef
+struct {
+   uint32                 cid;
+   SVGA3dRenderTargetType type;
+   SVGA3dSurfaceImageId   target;
+} SVGA3dCmdSetRenderTarget;     /* SVGA_3D_CMD_SETRENDERTARGET */
+
+typedef
+struct {
+   SVGA3dSurfaceImageId  src;
+   SVGA3dSurfaceImageId  dest;
+   /* Followed by variable number of SVGA3dCopyBox structures */
+} SVGA3dCmdSurfaceCopy;               /* SVGA_3D_CMD_SURFACE_COPY */
+
+typedef
+struct {
+   SVGA3dSurfaceImageId  src;
+   SVGA3dSurfaceImageId  dest;
+   SVGA3dBox             boxSrc;
+   SVGA3dBox             boxDest;
+   SVGA3dStretchBltMode  mode;
+} SVGA3dCmdSurfaceStretchBlt;         /* SVGA_3D_CMD_SURFACE_STRETCHBLT */
+
+typedef
+struct {
+   /*
+    * If the discard flag is present in a surface DMA operation, the host may
+    * discard the contents of the current mipmap level and face of the target
+    * surface before applying the surface DMA contents.
+    */
+   uint32 discard : 1;
+
+   /*
+    * If the unsynchronized flag is present, the host may perform this upload
+    * without syncing to pending reads on this surface.
+    */
+   uint32 unsynchronized : 1;
+
+   /*
+    * Guests *MUST* set the reserved bits to 0 before submitting the command
+    * suffix as future flags may occupy these bits.
+    */
+   uint32 reserved : 30;
+} SVGA3dSurfaceDMAFlags;
+
+typedef
+struct {
+   SVGA3dGuestImage      guest;
+   SVGA3dSurfaceImageId  host;
+   SVGA3dTransferType    transfer;
+   /*
+    * Followed by variable number of SVGA3dCopyBox structures. For consistency
+    * in all clipping logic and coordinate translation, we define the
+    * "source" in each copyBox as the guest image and the
+    * "destination" as the host image, regardless of transfer
+    * direction.
+    *
+    * For efficiency, the SVGA3D device is free to copy more data than
+    * specified. For example, it may round copy boxes outwards such
+    * that they lie on particular alignment boundaries.
+    */
+} SVGA3dCmdSurfaceDMA;                /* SVGA_3D_CMD_SURFACE_DMA */
+
+/*
+ * SVGA3dCmdSurfaceDMASuffix --
+ *
+ *    This is a command suffix that will appear after a SurfaceDMA command in
+ *    the FIFO.  It contains some extra information that hosts may use to
+ *    optimize performance or protect the guest.  This suffix exists to preserve
+ *    backwards compatibility while also allowing for new functionality to be
+ *    implemented.
+ */
+
+typedef
+struct {
+   uint32 suffixSize;
+
+   /*
+    * The maximum offset is used to determine the maximum offset from the
+    * guestPtr base address that will be accessed or written to during this
+    * surfaceDMA.  If the suffix is supported, the host will respect this
+    * boundary while performing surface DMAs.
+    *
+    * Defaults to MAX_UINT32
+    */
+   uint32 maximumOffset;
+
+   /*
+    * A set of flags that describes optimizations that the host may perform
+    * while performing this surface DMA operation.  The guest should never rely
+    * on behaviour that is different when these flags are set for correctness.
+    *
+    * Defaults to 0
+    */
+   SVGA3dSurfaceDMAFlags flags;
+} SVGA3dCmdSurfaceDMASuffix;
+
+/*
+ * SVGA_3D_CMD_DRAW_PRIMITIVES --
+ *
+ *   This command is the SVGA3D device's generic drawing entry point.
+ *   It can draw multiple ranges of primitives, optionally using an
+ *   index buffer, using an arbitrary collection of vertex buffers.
+ *
+ *   Each SVGA3dVertexDecl defines a distinct vertex array to bind
+ *   during this draw call. The declarations specify which surface
+ *   the vertex data lives in, what that vertex data is used for,
+ *   and how to interpret it.
+ *
+ *   Each SVGA3dPrimitiveRange defines a collection of primitives
+ *   to render using the same vertex arrays. An index buffer is
+ *   optional.
+ */
+
+typedef
+struct {
+   /*
+    * A range hint is an optional specification for the range of indices
+    * in an SVGA3dArray that will be used. If 'last' is zero, it is assumed
+    * that the entire array will be used.
+    *
+    * These are only hints. The SVGA3D device may use them for
+    * performance optimization if possible, but it's also allowed to
+    * ignore these values.
+    */
+   uint32               first;
+   uint32               last;
+} SVGA3dArrayRangeHint;
+
+typedef
+struct {
+   /*
+    * Define the origin and shape of a vertex or index array. Both
+    * 'offset' and 'stride' are in bytes. The provided surface will be
+    * reinterpreted as a flat array of bytes in the same format used
+    * by surface DMA operations. To avoid unnecessary conversions, the
+    * surface should be created with the SVGA3D_BUFFER format.
+    *
+    * Index 0 in the array starts 'offset' bytes into the surface.
+    * Index 1 begins at byte 'offset + stride', etc. Array indices may
+    * not be negative.
+    */
+   uint32               surfaceId;
+   uint32               offset;
+   uint32               stride;
+} SVGA3dArray;
+
+typedef
+struct {
+   /*
+    * Describe a vertex array's data type, and define how it is to be
+    * used by the fixed function pipeline or the vertex shader. It
+    * isn't useful to have two VertexDecls with the same
+    * VertexArrayIdentity in one draw call.
+    */
+   SVGA3dDeclType       type;
+   SVGA3dDeclMethod     method;
+   SVGA3dDeclUsage      usage;
+   uint32               usageIndex;
+} SVGA3dVertexArrayIdentity;
+
+typedef
+struct {
+   SVGA3dVertexArrayIdentity  identity;
+   SVGA3dArray                array;
+   SVGA3dArrayRangeHint       rangeHint;
+} SVGA3dVertexDecl;
+
+typedef
+struct {
+   /*
+    * Define a group of primitives to render, from sequential indices.
+    *
+    * The value of 'primitiveType' and 'primitiveCount' imply the
+    * total number of vertices that will be rendered.
+    */
+   SVGA3dPrimitiveType  primType;
+   uint32               primitiveCount;
+
+   /*
+    * Optional index buffer. If indexArray.surfaceId is
+    * SVGA3D_INVALID_ID, we render without an index buffer. Rendering
+    * without an index buffer is identical to rendering with an index
+    * buffer containing the sequence [0, 1, 2, 3, ...].
+    *
+    * If an index buffer is in use, indexWidth specifies the width in
+    * bytes of each index value. It must be less than or equal to
+    * indexArray.stride.
+    *
+    * (Currently, the SVGA3D device requires index buffers to be tightly
+    * packed. In other words, indexWidth == indexArray.stride)
+    */
+   SVGA3dArray          indexArray;
+   uint32               indexWidth;
+
+   /*
+    * Optional index bias. This number is added to all indices from
+    * indexArray before they are used as vertex array indices. This
+    * can be used in multiple ways:
+    *
+    *  - When not using an indexArray, this bias can be used to
+    *    specify where in the vertex arrays to begin rendering.
+    *
+    *  - A positive number here is equivalent to increasing the
+    *    offset in each vertex array.
+    *
+    *  - A negative number can be used to render using a small
+    *    vertex array and an index buffer that contains large
+    *    values. This may be used by some applications that
+    *    crop a vertex buffer without modifying their index
+    *    buffer.
+    *
+    * Note that rendering with a negative bias value may be slower and
+    * use more memory than rendering with a positive or zero bias.
+    */
+   int32                indexBias;
+} SVGA3dPrimitiveRange;
+
+typedef
+struct {
+   uint32               cid;
+   uint32               numVertexDecls;
+   uint32               numRanges;
+
+   /*
+    * There are two variable size arrays after the
+    * SVGA3dCmdDrawPrimitives structure. In order,
+    * they are:
+    *
+    * 1. SVGA3dVertexDecl, quantity 'numVertexDecls'
+    * 2. SVGA3dPrimitiveRange, quantity 'numRanges'
+    * 3. Optionally, SVGA3dVertexDivisor, quantity 'numVertexDecls' (contains
+    *    the frequency divisor for this the corresponding vertex decl)
+    */
+} SVGA3dCmdDrawPrimitives;      /* SVGA_3D_CMD_DRAWPRIMITIVES */
+
+typedef
+struct {
+   uint32                   stage;
+   SVGA3dTextureStateName   name;
+   union {
+      uint32                value;
+      float                 floatValue;
+   };
+} SVGA3dTextureState;
+
+typedef
+struct {
+   uint32               cid;
+   /* Followed by variable number of SVGA3dTextureState structures */
+} SVGA3dCmdSetTextureState;      /* SVGA_3D_CMD_SETTEXTURESTATE */
+
+typedef
+struct {
+   uint32                   cid;
+   SVGA3dTransformType      type;
+   float                    matrix[16];
+} SVGA3dCmdSetTransform;          /* SVGA_3D_CMD_SETTRANSFORM */
+
+typedef
+struct {
+   float                min;
+   float                max;
+} SVGA3dZRange;
+
+typedef
+struct {
+   uint32               cid;
+   SVGA3dZRange         zRange;
+} SVGA3dCmdSetZRange;             /* SVGA_3D_CMD_SETZRANGE */
+
+typedef
+struct {
+   float                diffuse[4];
+   float                ambient[4];
+   float                specular[4];
+   float                emissive[4];
+   float                shininess;
+} SVGA3dMaterial;
+
+typedef
+struct {
+   uint32               cid;
+   SVGA3dFace           face;
+   SVGA3dMaterial       material;
+} SVGA3dCmdSetMaterial;           /* SVGA_3D_CMD_SETMATERIAL */
+
+typedef
+struct {
+   uint32               cid;
+   uint32               index;
+   SVGA3dLightData      data;
+} SVGA3dCmdSetLightData;           /* SVGA_3D_CMD_SETLIGHTDATA */
+
+typedef
+struct {
+   uint32               cid;
+   uint32               index;
+   uint32               enabled;
+} SVGA3dCmdSetLightEnabled;      /* SVGA_3D_CMD_SETLIGHTENABLED */
+
+typedef
+struct {
+   uint32               cid;
+   SVGA3dRect           rect;
+} SVGA3dCmdSetViewport;           /* SVGA_3D_CMD_SETVIEWPORT */
+
+typedef
+struct {
+   uint32               cid;
+   SVGA3dRect           rect;
+} SVGA3dCmdSetScissorRect;         /* SVGA_3D_CMD_SETSCISSORRECT */
+
+typedef
+struct {
+   uint32               cid;
+   uint32               index;
+   float                plane[4];
+} SVGA3dCmdSetClipPlane;           /* SVGA_3D_CMD_SETCLIPPLANE */
+
+typedef
+struct {
+   uint32               cid;
+   uint32               shid;
+   SVGA3dShaderType     type;
+   /* Followed by variable number of DWORDs for shader bycode */
+} SVGA3dCmdDefineShader;           /* SVGA_3D_CMD_SHADER_DEFINE */
+
+typedef
+struct {
+   uint32               cid;
+   uint32               shid;
+   SVGA3dShaderType     type;
+} SVGA3dCmdDestroyShader;         /* SVGA_3D_CMD_SHADER_DESTROY */
+
+typedef
+struct {
+   uint32                  cid;
+   uint32                  reg;     /* register number */
+   SVGA3dShaderType        type;
+   SVGA3dShaderConstType   ctype;
+   uint32                  values[4];
+} SVGA3dCmdSetShaderConst;        /* SVGA_3D_CMD_SET_SHADER_CONST */
+
+typedef
+struct {
+   uint32               cid;
+   SVGA3dShaderType     type;
+   uint32               shid;
+} SVGA3dCmdSetShader;             /* SVGA_3D_CMD_SET_SHADER */
+
+typedef
+struct {
+   uint32               cid;
+   SVGA3dQueryType      type;
+} SVGA3dCmdBeginQuery;           /* SVGA_3D_CMD_BEGIN_QUERY */
+
+typedef
+struct {
+   uint32               cid;
+   SVGA3dQueryType      type;
+   SVGAGuestPtr         guestResult;  /* Points to an SVGA3dQueryResult structure */
+} SVGA3dCmdEndQuery;                  /* SVGA_3D_CMD_END_QUERY */
+
+typedef
+struct {
+   uint32               cid;          /* Same parameters passed to END_QUERY */
+   SVGA3dQueryType      type;
+   SVGAGuestPtr         guestResult;
+} SVGA3dCmdWaitForQuery;              /* SVGA_3D_CMD_WAIT_FOR_QUERY */
+
+typedef
+struct {
+   uint32               totalSize;    /* Set by guest before query is ended. */
+   SVGA3dQueryState     state;        /* Set by host or guest. See SVGA3dQueryState. */
+   union {                            /* Set by host on exit from PENDING state */
+      uint32            result32;
+   };
+} SVGA3dQueryResult;
+
+/*
+ * SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN --
+ *
+ *    This is a blit from an SVGA3D surface to a Screen Object. Just
+ *    like GMR-to-screen blits, this blit may be directed at a
+ *    specific screen or to the virtual coordinate space.
+ *
+ *    The blit copies from a rectangular region of an SVGA3D surface
+ *    image to a rectangular region of a screen or screens.
+ *
+ *    This command takes an optional variable-length list of clipping
+ *    rectangles after the body of the command. If no rectangles are
+ *    specified, there is no clipping region. The entire destRect is
+ *    drawn to. If one or more rectangles are included, they describe
+ *    a clipping region. The clip rectangle coordinates are measured
+ *    relative to the top-left corner of destRect.
+ *
+ *    This clipping region serves multiple purposes:
+ *
+ *      - It can be used to perform an irregularly shaped blit more
+ *        efficiently than by issuing many separate blit commands.
+ *
+ *      - It is equivalent to allowing blits with non-integer
+ *        source coordinates. You could blit just one half-pixel
+ *        of a source, for example, by specifying a larger
+ *        destination rectangle than you need, then removing
+ *        part of it using a clip rectangle.
+ *
+ * Availability:
+ *    SVGA_FIFO_CAP_SCREEN_OBJECT
+ *
+ * Limitations:
+ *
+ *    - Currently, no backend supports blits from a mipmap or face
+ *      other than the first one.
+ */
+
+typedef
+struct {
+   SVGA3dSurfaceImageId srcImage;
+   SVGASignedRect       srcRect;
+   uint32               destScreenId; /* Screen ID or SVGA_ID_INVALID for virt. coords */
+   SVGASignedRect       destRect;     /* Supports scaling if src/rest different size */
+   /* Clipping: zero or more SVGASignedRects follow */
+} SVGA3dCmdBlitSurfaceToScreen;         /* SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN */
+
+
+/*
+ * Capability query index.
+ *
+ * Notes:
+ *
+ *   1. SVGA3D_DEVCAP_MAX_TEXTURES reflects the maximum number of
+ *      fixed-function texture units available. Each of these units
+ *      work in both FFP and Shader modes, and they support texture
+ *      transforms and texture coordinates. The host may have additional
+ *      texture image units that are only usable with shaders.
+ *
+ *   2. The BUFFER_FORMAT capabilities are deprecated, and they always
+ *      return TRUE. Even on physical hardware that does not support
+ *      these formats natively, the SVGA3D device will provide an emulation
+ *      which should be invisible to the guest OS.
+ *
+ *      In general, the SVGA3D device should support any operation on
+ *      any surface format, it just may perform some of these
+ *      operations in software depending on the capabilities of the
+ *      available physical hardware.
+ *
+ *      XXX: In the future, we will add capabilities that describe in
+ *      detail what formats are supported in hardware for what kinds
+ *      of operations.
+ */
+
+typedef enum {
+   SVGA3D_DEVCAP_3D                                = 0,
+   SVGA3D_DEVCAP_MAX_LIGHTS                        = 1,
+   SVGA3D_DEVCAP_MAX_TEXTURES                      = 2,  /* See note (1) */
+   SVGA3D_DEVCAP_MAX_CLIP_PLANES                   = 3,
+   SVGA3D_DEVCAP_VERTEX_SHADER_VERSION             = 4,
+   SVGA3D_DEVCAP_VERTEX_SHADER                     = 5,
+   SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION           = 6,
+   SVGA3D_DEVCAP_FRAGMENT_SHADER                   = 7,
+   SVGA3D_DEVCAP_MAX_RENDER_TARGETS                = 8,
+   SVGA3D_DEVCAP_S23E8_TEXTURES                    = 9,
+   SVGA3D_DEVCAP_S10E5_TEXTURES                    = 10,
+   SVGA3D_DEVCAP_MAX_FIXED_VERTEXBLEND             = 11,
+   SVGA3D_DEVCAP_D16_BUFFER_FORMAT                 = 12, /* See note (2) */
+   SVGA3D_DEVCAP_D24S8_BUFFER_FORMAT               = 13, /* See note (2) */
+   SVGA3D_DEVCAP_D24X8_BUFFER_FORMAT               = 14, /* See note (2) */
+   SVGA3D_DEVCAP_QUERY_TYPES                       = 15,
+   SVGA3D_DEVCAP_TEXTURE_GRADIENT_SAMPLING         = 16,
+   SVGA3D_DEVCAP_MAX_POINT_SIZE                    = 17,
+   SVGA3D_DEVCAP_MAX_SHADER_TEXTURES               = 18,
+   SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH                 = 19,
+   SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT                = 20,
+   SVGA3D_DEVCAP_MAX_VOLUME_EXTENT                 = 21,
+   SVGA3D_DEVCAP_MAX_TEXTURE_REPEAT                = 22,
+   SVGA3D_DEVCAP_MAX_TEXTURE_ASPECT_RATIO          = 23,
+   SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY            = 24,
+   SVGA3D_DEVCAP_MAX_PRIMITIVE_COUNT               = 25,
+   SVGA3D_DEVCAP_MAX_VERTEX_INDEX                  = 26,
+   SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS    = 27,
+   SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_INSTRUCTIONS  = 28,
+   SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS           = 29,
+   SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS         = 30,
+   SVGA3D_DEVCAP_TEXTURE_OPS                       = 31,
+   SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8               = 32,
+   SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8               = 33,
+   SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10            = 34,
+   SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5               = 35,
+   SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5               = 36,
+   SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4               = 37,
+   SVGA3D_DEVCAP_SURFACEFMT_R5G6B5                 = 38,
+   SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16            = 39,
+   SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8      = 40,
+   SVGA3D_DEVCAP_SURFACEFMT_ALPHA8                 = 41,
+   SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8             = 42,
+   SVGA3D_DEVCAP_SURFACEFMT_Z_D16                  = 43,
+   SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8                = 44,
+   SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8                = 45,
+   SVGA3D_DEVCAP_SURFACEFMT_DXT1                   = 46,
+   SVGA3D_DEVCAP_SURFACEFMT_DXT2                   = 47,
+   SVGA3D_DEVCAP_SURFACEFMT_DXT3                   = 48,
+   SVGA3D_DEVCAP_SURFACEFMT_DXT4                   = 49,
+   SVGA3D_DEVCAP_SURFACEFMT_DXT5                   = 50,
+   SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8           = 51,
+   SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10            = 52,
+   SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8               = 53,
+   SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8               = 54,
+   SVGA3D_DEVCAP_SURFACEFMT_CxV8U8                 = 55,
+   SVGA3D_DEVCAP_SURFACEFMT_R_S10E5                = 56,
+   SVGA3D_DEVCAP_SURFACEFMT_R_S23E8                = 57,
+   SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5               = 58,
+   SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8               = 59,
+   SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5             = 60,
+   SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8             = 61,
+   SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEXTURES        = 63,
+
+   /*
+    * Note that MAX_SIMULTANEOUS_RENDER_TARGETS is a maximum count of color
+    * render targets.  This does no include the depth or stencil targets.
+    */
+   SVGA3D_DEVCAP_MAX_SIMULTANEOUS_RENDER_TARGETS   = 64,
+
+   SVGA3D_DEVCAP_SURFACEFMT_V16U16                 = 65,
+   SVGA3D_DEVCAP_SURFACEFMT_G16R16                 = 66,
+   SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16           = 67,
+   SVGA3D_DEVCAP_SURFACEFMT_UYVY                   = 68,
+   SVGA3D_DEVCAP_SURFACEFMT_YUY2                   = 69,
+
+   /*
+    * Don't add new caps into the previous section; the values in this
+    * enumeration must not change. You can put new values right before
+    * SVGA3D_DEVCAP_MAX.
+    */
+   SVGA3D_DEVCAP_MAX                                  /* This must be the last index. */
+} SVGA3dDevCapIndex;
+
+typedef union {
+   Bool   b;
+   uint32 u;
+   int32  i;
+   float  f;
+} SVGA3dDevCapResult;
+
+#endif /* _SVGA3D_REG_H_ */
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
@@ -0,0 +1,516 @@
+/**************************************************************************
+ *
+ * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **************************************************************************/
+
+#include "vmwgfx_kms.h"
+
+#define vmw_crtc_to_ldu(x) \
+	container_of(x, struct vmw_legacy_display_unit, base.crtc)
+#define vmw_encoder_to_ldu(x) \
+	container_of(x, struct vmw_legacy_display_unit, base.encoder)
+#define vmw_connector_to_ldu(x) \
+	container_of(x, struct vmw_legacy_display_unit, base.connector)
+
+struct vmw_legacy_display {
+	struct list_head active;
+
+	unsigned num_active;
+
+	struct vmw_framebuffer *fb;
+};
+
+/**
+ * Display unit using the legacy register interface.
+ */
+struct vmw_legacy_display_unit {
+	struct vmw_display_unit base;
+
+	struct list_head active;
+
+	unsigned unit;
+};
+
+static void vmw_ldu_destroy(struct vmw_legacy_display_unit *ldu)
+{
+	list_del_init(&ldu->active);
+	vmw_display_unit_cleanup(&ldu->base);
+	kfree(ldu);
+}
+
+
+/*
+ * Legacy Display Unit CRTC functions
+ */
+
+static void vmw_ldu_crtc_save(struct drm_crtc *crtc)
+{
+}
+
+static void vmw_ldu_crtc_restore(struct drm_crtc *crtc)
+{
+}
+
+static void vmw_ldu_crtc_gamma_set(struct drm_crtc *crtc,
+				   u16 *r, u16 *g, u16 *b,
+				   uint32_t size)
+{
+}
+
+static void vmw_ldu_crtc_destroy(struct drm_crtc *crtc)
+{
+	vmw_ldu_destroy(vmw_crtc_to_ldu(crtc));
+}
+
+static int vmw_ldu_commit_list(struct vmw_private *dev_priv)
+{
+	struct vmw_legacy_display *lds = dev_priv->ldu_priv;
+	struct vmw_legacy_display_unit *entry;
+	struct drm_crtc *crtc;
+	int i = 0;
+
+	/* to stop the screen from changing size on resize */
+	vmw_write(dev_priv, SVGA_REG_NUM_GUEST_DISPLAYS, 0);
+	for (i = 0; i < lds->num_active; i++) {
+		vmw_write(dev_priv, SVGA_REG_DISPLAY_ID, i);
+		vmw_write(dev_priv, SVGA_REG_DISPLAY_IS_PRIMARY, !i);
+		vmw_write(dev_priv, SVGA_REG_DISPLAY_POSITION_X, 0);
+		vmw_write(dev_priv, SVGA_REG_DISPLAY_POSITION_Y, 0);
+		vmw_write(dev_priv, SVGA_REG_DISPLAY_WIDTH, 0);
+		vmw_write(dev_priv, SVGA_REG_DISPLAY_HEIGHT, 0);
+		vmw_write(dev_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
+	}
+
+	/* Now set the mode */
+	vmw_write(dev_priv, SVGA_REG_NUM_GUEST_DISPLAYS, lds->num_active);
+	i = 0;
+	list_for_each_entry(entry, &lds->active, active) {
+		crtc = &entry->base.crtc;
+
+		vmw_write(dev_priv, SVGA_REG_DISPLAY_ID, i);
+		vmw_write(dev_priv, SVGA_REG_DISPLAY_IS_PRIMARY, !i);
+		vmw_write(dev_priv, SVGA_REG_DISPLAY_POSITION_X, crtc->x);
+		vmw_write(dev_priv, SVGA_REG_DISPLAY_POSITION_Y, crtc->y);
+		vmw_write(dev_priv, SVGA_REG_DISPLAY_WIDTH, crtc->mode.hdisplay);
+		vmw_write(dev_priv, SVGA_REG_DISPLAY_HEIGHT, crtc->mode.vdisplay);
+		vmw_write(dev_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
+
+		i++;
+	}
+
+	return 0;
+}
+
+static int vmw_ldu_del_active(struct vmw_private *vmw_priv,
+			      struct vmw_legacy_display_unit *ldu)
+{
+	struct vmw_legacy_display *ld = vmw_priv->ldu_priv;
+	if (list_empty(&ldu->active))
+		return 0;
+
+	list_del_init(&ldu->active);
+	if (--(ld->num_active) == 0) {
+		BUG_ON(!ld->fb);
+		if (ld->fb->unpin)
+			ld->fb->unpin(ld->fb);
+		ld->fb = NULL;
+	}
+
+	return 0;
+}
+
+static int vmw_ldu_add_active(struct vmw_private *vmw_priv,
+			      struct vmw_legacy_display_unit *ldu,
+			      struct vmw_framebuffer *vfb)
+{
+	struct vmw_legacy_display *ld = vmw_priv->ldu_priv;
+	struct vmw_legacy_display_unit *entry;
+	struct list_head *at;
+
+	if (!list_empty(&ldu->active))
+		return 0;
+
+	at = &ld->active;
+	list_for_each_entry(entry, &ld->active, active) {
+		if (entry->unit > ldu->unit)
+			break;
+
+		at = &entry->active;
+	}
+
+	list_add(&ldu->active, at);
+	if (ld->num_active++ == 0) {
+		BUG_ON(ld->fb);
+		if (vfb->pin)
+			vfb->pin(vfb);
+		ld->fb = vfb;
+	}
+
+	return 0;
+}
+
+static int vmw_ldu_crtc_set_config(struct drm_mode_set *set)
+{
+	struct vmw_private *dev_priv;
+	struct vmw_legacy_display_unit *ldu;
+	struct drm_connector *connector;
+	struct drm_display_mode *mode;
+	struct drm_encoder *encoder;
+	struct vmw_framebuffer *vfb;
+	struct drm_framebuffer *fb;
+	struct drm_crtc *crtc;
+
+	if (!set)
+		return -EINVAL;
+
+	if (!set->crtc)
+		return -EINVAL;
+
+	/* get the ldu */
+	crtc = set->crtc;
+	ldu = vmw_crtc_to_ldu(crtc);
+	vfb = set->fb ? vmw_framebuffer_to_vfb(set->fb) : NULL;
+	dev_priv = vmw_priv(crtc->dev);
+
+	if (set->num_connectors > 1) {
+		DRM_ERROR("to many connectors\n");
+		return -EINVAL;
+	}
+
+	if (set->num_connectors == 1 &&
+	    set->connectors[0] != &ldu->base.connector) {
+		DRM_ERROR("connector doesn't match %p %p\n",
+			set->connectors[0], &ldu->base.connector);
+		return -EINVAL;
+	}
+
+	/* ldu only supports one fb active at the time */
+	if (dev_priv->ldu_priv->fb && vfb &&
+	    dev_priv->ldu_priv->fb != vfb) {
+		DRM_ERROR("Multiple framebuffers not supported\n");
+		return -EINVAL;
+	}
+
+	/* since they always map one to one these are safe */
+	connector = &ldu->base.connector;
+	encoder = &ldu->base.encoder;
+
+	/* should we turn the crtc off? */
+	if (set->num_connectors == 0 || !set->mode || !set->fb) {
+
+		connector->encoder = NULL;
+		encoder->crtc = NULL;
+		crtc->fb = NULL;
+
+		vmw_ldu_del_active(dev_priv, ldu);
+
+		vmw_ldu_commit_list(dev_priv);
+
+		return 0;
+	}
+
+
+	/* we now know we want to set a mode */
+	mode = set->mode;
+	fb = set->fb;
+
+	if (set->x + mode->hdisplay > fb->width ||
+	    set->y + mode->vdisplay > fb->height) {
+		DRM_ERROR("set outside of framebuffer\n");
+		return -EINVAL;
+	}
+
+	vmw_fb_off(dev_priv);
+
+	crtc->fb = fb;
+	encoder->crtc = crtc;
+	connector->encoder = encoder;
+	crtc->x = set->x;
+	crtc->y = set->y;
+	crtc->mode = *mode;
+
+	vmw_ldu_add_active(dev_priv, ldu, vfb);
+
+	vmw_ldu_commit_list(dev_priv);
+
+	return 0;
+}
+
+static struct drm_crtc_funcs vmw_legacy_crtc_funcs = {
+	.save = vmw_ldu_crtc_save,
+	.restore = vmw_ldu_crtc_restore,
+	.cursor_set = vmw_du_crtc_cursor_set,
+	.cursor_move = vmw_du_crtc_cursor_move,
+	.gamma_set = vmw_ldu_crtc_gamma_set,
+	.destroy = vmw_ldu_crtc_destroy,
+	.set_config = vmw_ldu_crtc_set_config,
+};
+
+/*
+ * Legacy Display Unit encoder functions
+ */
+
+static void vmw_ldu_encoder_destroy(struct drm_encoder *encoder)
+{
+	vmw_ldu_destroy(vmw_encoder_to_ldu(encoder));
+}
+
+static struct drm_encoder_funcs vmw_legacy_encoder_funcs = {
+	.destroy = vmw_ldu_encoder_destroy,
+};
+
+/*
+ * Legacy Display Unit connector functions
+ */
+
+static void vmw_ldu_connector_dpms(struct drm_connector *connector, int mode)
+{
+}
+
+static void vmw_ldu_connector_save(struct drm_connector *connector)
+{
+}
+
+static void vmw_ldu_connector_restore(struct drm_connector *connector)
+{
+}
+
+static enum drm_connector_status
+	vmw_ldu_connector_detect(struct drm_connector *connector)
+{
+	/* XXX vmwctrl should control connection status */
+	if (vmw_connector_to_ldu(connector)->base.unit == 0)
+		return connector_status_connected;
+	return connector_status_disconnected;
+}
+
+static struct drm_display_mode vmw_ldu_connector_builtin[] = {
+	/* 640x480@60Hz */
+	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
+		   752, 800, 0, 480, 489, 492, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 800x600@60Hz */
+	{ DRM_MODE("800x600",
+		   DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
+		   40000, 800, 840, 968, 1056, 0, 600, 601, 605, 628,
+		   0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 1024x768@60Hz */
+	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
+		   1184, 1344, 0, 768, 771, 777, 806, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 1152x864@75Hz */
+	{ DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
+		   1344, 1600, 0, 864, 865, 868, 900, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 1280x768@60Hz */
+	{ DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
+		   1472, 1664, 0, 768, 771, 778, 798, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 1280x800@60Hz */
+	{ DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
+		   1480, 1680, 0, 800, 803, 809, 831, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 1280x960@60Hz */
+	{ DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
+		   1488, 1800, 0, 960, 961, 964, 1000, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 1280x1024@60Hz */
+	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
+		   1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 1360x768@60Hz */
+	{ DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
+		   1536, 1792, 0, 768, 771, 777, 795, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 1440x1050@60Hz */
+	{ DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
+		   1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 1440x900@60Hz */
+	{ DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
+		   1672, 1904, 0, 900, 903, 909, 934, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 1600x1200@60Hz */
+	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
+		   1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 1680x1050@60Hz */
+	{ DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
+		   1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 1792x1344@60Hz */
+	{ DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
+		   2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 1853x1392@60Hz */
+	{ DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
+		   2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 1920x1200@60Hz */
+	{ DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
+		   2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 1920x1440@60Hz */
+	{ DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
+		   2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 2560x1600@60Hz */
+	{ DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
+		   3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* Terminate */
+	{ DRM_MODE("", 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) },
+};
+
+static int vmw_ldu_connector_fill_modes(struct drm_connector *connector,
+					uint32_t max_width, uint32_t max_height)
+{
+	struct drm_device *dev = connector->dev;
+	struct drm_display_mode *mode = NULL;
+	int i;
+
+	for (i = 0; vmw_ldu_connector_builtin[i].type != 0; i++) {
+		if (vmw_ldu_connector_builtin[i].hdisplay > max_width ||
+		    vmw_ldu_connector_builtin[i].vdisplay > max_height)
+			continue;
+
+		mode = drm_mode_duplicate(dev, &vmw_ldu_connector_builtin[i]);
+		if (!mode)
+			return 0;
+		mode->vrefresh = drm_mode_vrefresh(mode);
+
+		drm_mode_probed_add(connector, mode);
+	}
+
+	drm_mode_connector_list_update(connector);
+
+	return 1;
+}
+
+static int vmw_ldu_connector_set_property(struct drm_connector *connector,
+					  struct drm_property *property,
+					  uint64_t val)
+{
+	return 0;
+}
+
+static void vmw_ldu_connector_destroy(struct drm_connector *connector)
+{
+	vmw_ldu_destroy(vmw_connector_to_ldu(connector));
+}
+
+static struct drm_connector_funcs vmw_legacy_connector_funcs = {
+	.dpms = vmw_ldu_connector_dpms,
+	.save = vmw_ldu_connector_save,
+	.restore = vmw_ldu_connector_restore,
+	.detect = vmw_ldu_connector_detect,
+	.fill_modes = vmw_ldu_connector_fill_modes,
+	.set_property = vmw_ldu_connector_set_property,
+	.destroy = vmw_ldu_connector_destroy,
+};
+
+static int vmw_ldu_init(struct vmw_private *dev_priv, unsigned unit)
+{
+	struct vmw_legacy_display_unit *ldu;
+	struct drm_device *dev = dev_priv->dev;
+	struct drm_connector *connector;
+	struct drm_encoder *encoder;
+	struct drm_crtc *crtc;
+
+	ldu = kzalloc(sizeof(*ldu), GFP_KERNEL);
+	if (!ldu)
+		return -ENOMEM;
+
+	ldu->unit = unit;
+	crtc = &ldu->base.crtc;
+	encoder = &ldu->base.encoder;
+	connector = &ldu->base.connector;
+
+	drm_connector_init(dev, connector, &vmw_legacy_connector_funcs,
+			   DRM_MODE_CONNECTOR_LVDS);
+	/* Initial status */
+	if (unit == 0)
+		connector->status = connector_status_connected;
+	else
+		connector->status = connector_status_disconnected;
+
+	drm_encoder_init(dev, encoder, &vmw_legacy_encoder_funcs,
+			 DRM_MODE_ENCODER_LVDS);
+	drm_mode_connector_attach_encoder(connector, encoder);
+	encoder->possible_crtcs = (1 << unit);
+	encoder->possible_clones = 0;
+
+	INIT_LIST_HEAD(&ldu->active);
+
+	drm_crtc_init(dev, crtc, &vmw_legacy_crtc_funcs);
+
+	drm_connector_attach_property(connector,
+				      dev->mode_config.dirty_info_property,
+				      1);
+
+	return 0;
+}
+
+int vmw_kms_init_legacy_display_system(struct vmw_private *dev_priv)
+{
+	if (dev_priv->ldu_priv) {
+		DRM_INFO("ldu system already on\n");
+		return -EINVAL;
+	}
+
+	dev_priv->ldu_priv = kmalloc(GFP_KERNEL, sizeof(*dev_priv->ldu_priv));
+
+	if (!dev_priv->ldu_priv)
+		return -ENOMEM;
+
+	INIT_LIST_HEAD(&dev_priv->ldu_priv->active);
+	dev_priv->ldu_priv->num_active = 0;
+	dev_priv->ldu_priv->fb = NULL;
+
+	drm_mode_create_dirty_info_property(dev_priv->dev);
+
+	vmw_ldu_init(dev_priv, 0);
+	vmw_ldu_init(dev_priv, 1);
+	vmw_ldu_init(dev_priv, 2);
+	vmw_ldu_init(dev_priv, 3);
+	vmw_ldu_init(dev_priv, 4);
+	vmw_ldu_init(dev_priv, 5);
+	vmw_ldu_init(dev_priv, 6);
+	vmw_ldu_init(dev_priv, 7);
+
+	return 0;
+}
+
+int vmw_kms_close_legacy_display_system(struct vmw_private *dev_priv)
+{
+	if (!dev_priv->ldu_priv)
+		return -ENOSYS;
+
+	BUG_ON(!list_empty(&dev_priv->ldu_priv->active));
+
+	kfree(dev_priv->ldu_priv);
+
+	return 0;
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/vmwgfx/vmwgfx_gmr.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/vmwgfx/vmwgfx_gmr.c
@@ -0,0 +1,213 @@
+/**************************************************************************
+ *
+ * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **************************************************************************/
+
+#include "vmwgfx_drv.h"
+#include "drmP.h"
+#include "ttm/ttm_bo_driver.h"
+
+/**
+ * FIXME: Adjust to the ttm lowmem / highmem storage to minimize
+ * the number of used descriptors.
+ */
+
+static int vmw_gmr_build_descriptors(struct list_head *desc_pages,
+				     struct page *pages[],
+				     unsigned long num_pages)
+{
+	struct page *page, *next;
+	struct svga_guest_mem_descriptor *page_virtual = NULL;
+	struct svga_guest_mem_descriptor *desc_virtual = NULL;
+	unsigned int desc_per_page;
+	unsigned long prev_pfn;
+	unsigned long pfn;
+	int ret;
+
+	desc_per_page = PAGE_SIZE /
+	    sizeof(struct svga_guest_mem_descriptor) - 1;
+
+	while (likely(num_pages != 0)) {
+		page = alloc_page(__GFP_HIGHMEM);
+		if (unlikely(page == NULL)) {
+			ret = -ENOMEM;
+			goto out_err;
+		}
+
+		list_add_tail(&page->lru, desc_pages);
+
+		/*
+		 * Point previous page terminating descriptor to this
+		 * page before unmapping it.
+		 */
+
+		if (likely(page_virtual != NULL)) {
+			desc_virtual->ppn = page_to_pfn(page);
+			kunmap_atomic(page_virtual, KM_USER0);
+		}
+
+		page_virtual = kmap_atomic(page, KM_USER0);
+		desc_virtual = page_virtual - 1;
+		prev_pfn = ~(0UL);
+
+		while (likely(num_pages != 0)) {
+			pfn = page_to_pfn(*pages);
+
+			if (pfn != prev_pfn + 1) {
+
+				if (desc_virtual - page_virtual ==
+				    desc_per_page - 1)
+					break;
+
+				(++desc_virtual)->ppn = cpu_to_le32(pfn);
+				desc_virtual->num_pages = cpu_to_le32(1);
+			} else {
+				uint32_t tmp =
+				    le32_to_cpu(desc_virtual->num_pages);
+				desc_virtual->num_pages = cpu_to_le32(tmp + 1);
+			}
+			prev_pfn = pfn;
+			--num_pages;
+			++pages;
+		}
+
+		(++desc_virtual)->ppn = cpu_to_le32(0);
+		desc_virtual->num_pages = cpu_to_le32(0);
+	}
+
+	if (likely(page_virtual != NULL))
+		kunmap_atomic(page_virtual, KM_USER0);
+
+	return 0;
+out_err:
+	list_for_each_entry_safe(page, next, desc_pages, lru) {
+		list_del_init(&page->lru);
+		__free_page(page);
+	}
+	return ret;
+}
+
+static inline void vmw_gmr_free_descriptors(struct list_head *desc_pages)
+{
+	struct page *page, *next;
+
+	list_for_each_entry_safe(page, next, desc_pages, lru) {
+		list_del_init(&page->lru);
+		__free_page(page);
+	}
+}
+
+static void vmw_gmr_fire_descriptors(struct vmw_private *dev_priv,
+				     int gmr_id, struct list_head *desc_pages)
+{
+	struct page *page;
+
+	if (unlikely(list_empty(desc_pages)))
+		return;
+
+	page = list_entry(desc_pages->next, struct page, lru);
+
+	mutex_lock(&dev_priv->hw_mutex);
+
+	vmw_write(dev_priv, SVGA_REG_GMR_ID, gmr_id);
+	wmb();
+	vmw_write(dev_priv, SVGA_REG_GMR_DESCRIPTOR, page_to_pfn(page));
+	mb();
+
+	mutex_unlock(&dev_priv->hw_mutex);
+
+}
+
+/**
+ * FIXME: Adjust to the ttm lowmem / highmem storage to minimize
+ * the number of used descriptors.
+ */
+
+static unsigned long vmw_gmr_count_descriptors(struct page *pages[],
+					       unsigned long num_pages)
+{
+	unsigned long prev_pfn = ~(0UL);
+	unsigned long pfn;
+	unsigned long descriptors = 0;
+
+	while (num_pages--) {
+		pfn = page_to_pfn(*pages++);
+		if (prev_pfn + 1 != pfn)
+			++descriptors;
+		prev_pfn = pfn;
+	}
+
+	return descriptors;
+}
+
+int vmw_gmr_bind(struct vmw_private *dev_priv,
+		 struct ttm_buffer_object *bo)
+{
+	struct ttm_tt *ttm = bo->ttm;
+	unsigned long descriptors;
+	int ret;
+	uint32_t id;
+	struct list_head desc_pages;
+
+	if (!(dev_priv->capabilities & SVGA_CAP_GMR))
+		return -EINVAL;
+
+	ret = ttm_tt_populate(ttm);
+	if (unlikely(ret != 0))
+		return ret;
+
+	descriptors = vmw_gmr_count_descriptors(ttm->pages, ttm->num_pages);
+	if (unlikely(descriptors > dev_priv->max_gmr_descriptors))
+		return -EINVAL;
+
+	INIT_LIST_HEAD(&desc_pages);
+	ret = vmw_gmr_build_descriptors(&desc_pages, ttm->pages,
+					ttm->num_pages);
+	if (unlikely(ret != 0))
+		return ret;
+
+	ret = vmw_gmr_id_alloc(dev_priv, &id);
+	if (unlikely(ret != 0))
+		goto out_no_id;
+
+	vmw_gmr_fire_descriptors(dev_priv, id, &desc_pages);
+	vmw_gmr_free_descriptors(&desc_pages);
+	vmw_dmabuf_set_gmr(bo, id);
+	return 0;
+
+out_no_id:
+	vmw_gmr_free_descriptors(&desc_pages);
+	return ret;
+}
+
+void vmw_gmr_unbind(struct vmw_private *dev_priv, int gmr_id)
+{
+	mutex_lock(&dev_priv->hw_mutex);
+	vmw_write(dev_priv, SVGA_REG_GMR_ID, gmr_id);
+	wmb();
+	vmw_write(dev_priv, SVGA_REG_GMR_DESCRIPTOR, 0);
+	mb();
+	mutex_unlock(&dev_priv->hw_mutex);
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
@@ -0,0 +1,783 @@
+/**************************************************************************
+ *
+ * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **************************************************************************/
+
+#include "drmP.h"
+#include "vmwgfx_drv.h"
+#include "ttm/ttm_placement.h"
+#include "ttm/ttm_bo_driver.h"
+#include "ttm/ttm_object.h"
+#include "ttm/ttm_module.h"
+
+#define VMWGFX_DRIVER_NAME "vmwgfx"
+#define VMWGFX_DRIVER_DESC "Linux drm driver for VMware graphics devices"
+#define VMWGFX_CHIP_SVGAII 0
+#define VMW_FB_RESERVATION 0
+
+/**
+ * Fully encoded drm commands. Might move to vmw_drm.h
+ */
+
+#define DRM_IOCTL_VMW_GET_PARAM					\
+	DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_GET_PARAM,		\
+		 struct drm_vmw_getparam_arg)
+#define DRM_IOCTL_VMW_ALLOC_DMABUF				\
+	DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_ALLOC_DMABUF,	\
+		union drm_vmw_alloc_dmabuf_arg)
+#define DRM_IOCTL_VMW_UNREF_DMABUF				\
+	DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_DMABUF,	\
+		struct drm_vmw_unref_dmabuf_arg)
+#define DRM_IOCTL_VMW_CURSOR_BYPASS				\
+	DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_CURSOR_BYPASS,	\
+		 struct drm_vmw_cursor_bypass_arg)
+
+#define DRM_IOCTL_VMW_CONTROL_STREAM				\
+	DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_CONTROL_STREAM,	\
+		 struct drm_vmw_control_stream_arg)
+#define DRM_IOCTL_VMW_CLAIM_STREAM				\
+	DRM_IOR(DRM_COMMAND_BASE + DRM_VMW_CLAIM_STREAM,	\
+		 struct drm_vmw_stream_arg)
+#define DRM_IOCTL_VMW_UNREF_STREAM				\
+	DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_STREAM,	\
+		 struct drm_vmw_stream_arg)
+
+#define DRM_IOCTL_VMW_CREATE_CONTEXT				\
+	DRM_IOR(DRM_COMMAND_BASE + DRM_VMW_CREATE_CONTEXT,	\
+		struct drm_vmw_context_arg)
+#define DRM_IOCTL_VMW_UNREF_CONTEXT				\
+	DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_CONTEXT,	\
+		struct drm_vmw_context_arg)
+#define DRM_IOCTL_VMW_CREATE_SURFACE				\
+	DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_CREATE_SURFACE,	\
+		 union drm_vmw_surface_create_arg)
+#define DRM_IOCTL_VMW_UNREF_SURFACE				\
+	DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_SURFACE,	\
+		 struct drm_vmw_surface_arg)
+#define DRM_IOCTL_VMW_REF_SURFACE				\
+	DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_REF_SURFACE,	\
+		 union drm_vmw_surface_reference_arg)
+#define DRM_IOCTL_VMW_EXECBUF					\
+	DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_EXECBUF,		\
+		struct drm_vmw_execbuf_arg)
+#define DRM_IOCTL_VMW_FIFO_DEBUG				\
+	DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_FIFO_DEBUG,		\
+		 struct drm_vmw_fifo_debug_arg)
+#define DRM_IOCTL_VMW_FENCE_WAIT				\
+	DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_FENCE_WAIT,		\
+		 struct drm_vmw_fence_wait_arg)
+
+
+/**
+ * The core DRM version of this macro doesn't account for
+ * DRM_COMMAND_BASE.
+ */
+
+#define VMW_IOCTL_DEF(ioctl, func, flags) \
+	[DRM_IOCTL_NR(ioctl) - DRM_COMMAND_BASE] = {ioctl, flags, func}
+
+/**
+ * Ioctl definitions.
+ */
+
+static struct drm_ioctl_desc vmw_ioctls[] = {
+	VMW_IOCTL_DEF(DRM_IOCTL_VMW_GET_PARAM, vmw_getparam_ioctl,
+		      DRM_AUTH | DRM_UNLOCKED),
+	VMW_IOCTL_DEF(DRM_IOCTL_VMW_ALLOC_DMABUF, vmw_dmabuf_alloc_ioctl,
+		      DRM_AUTH | DRM_UNLOCKED),
+	VMW_IOCTL_DEF(DRM_IOCTL_VMW_UNREF_DMABUF, vmw_dmabuf_unref_ioctl,
+		      DRM_AUTH | DRM_UNLOCKED),
+	VMW_IOCTL_DEF(DRM_IOCTL_VMW_CURSOR_BYPASS,
+		      vmw_kms_cursor_bypass_ioctl,
+		      DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
+
+	VMW_IOCTL_DEF(DRM_IOCTL_VMW_CONTROL_STREAM, vmw_overlay_ioctl,
+		      DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
+	VMW_IOCTL_DEF(DRM_IOCTL_VMW_CLAIM_STREAM, vmw_stream_claim_ioctl,
+		      DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
+	VMW_IOCTL_DEF(DRM_IOCTL_VMW_UNREF_STREAM, vmw_stream_unref_ioctl,
+		      DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
+
+	VMW_IOCTL_DEF(DRM_IOCTL_VMW_CREATE_CONTEXT, vmw_context_define_ioctl,
+		      DRM_AUTH | DRM_UNLOCKED),
+	VMW_IOCTL_DEF(DRM_IOCTL_VMW_UNREF_CONTEXT, vmw_context_destroy_ioctl,
+		      DRM_AUTH | DRM_UNLOCKED),
+	VMW_IOCTL_DEF(DRM_IOCTL_VMW_CREATE_SURFACE, vmw_surface_define_ioctl,
+		      DRM_AUTH | DRM_UNLOCKED),
+	VMW_IOCTL_DEF(DRM_IOCTL_VMW_UNREF_SURFACE, vmw_surface_destroy_ioctl,
+		      DRM_AUTH | DRM_UNLOCKED),
+	VMW_IOCTL_DEF(DRM_IOCTL_VMW_REF_SURFACE, vmw_surface_reference_ioctl,
+		      DRM_AUTH | DRM_UNLOCKED),
+	VMW_IOCTL_DEF(DRM_IOCTL_VMW_EXECBUF, vmw_execbuf_ioctl,
+		      DRM_AUTH | DRM_UNLOCKED),
+	VMW_IOCTL_DEF(DRM_IOCTL_VMW_FIFO_DEBUG, vmw_fifo_debug_ioctl,
+		      DRM_AUTH | DRM_ROOT_ONLY | DRM_MASTER | DRM_UNLOCKED),
+	VMW_IOCTL_DEF(DRM_IOCTL_VMW_FENCE_WAIT, vmw_fence_wait_ioctl,
+		      DRM_AUTH | DRM_UNLOCKED)
+};
+
+static struct pci_device_id vmw_pci_id_list[] = {
+	{0x15ad, 0x0405, PCI_ANY_ID, PCI_ANY_ID, 0, 0, VMWGFX_CHIP_SVGAII},
+	{0, 0, 0}
+};
+
+static char *vmw_devname = "vmwgfx";
+
+static int vmw_probe(struct pci_dev *, const struct pci_device_id *);
+static void vmw_master_init(struct vmw_master *);
+static int vmwgfx_pm_notifier(struct notifier_block *nb, unsigned long val,
+			      void *ptr);
+
+static void vmw_print_capabilities(uint32_t capabilities)
+{
+	DRM_INFO("Capabilities:\n");
+	if (capabilities & SVGA_CAP_RECT_COPY)
+		DRM_INFO("  Rect copy.\n");
+	if (capabilities & SVGA_CAP_CURSOR)
+		DRM_INFO("  Cursor.\n");
+	if (capabilities & SVGA_CAP_CURSOR_BYPASS)
+		DRM_INFO("  Cursor bypass.\n");
+	if (capabilities & SVGA_CAP_CURSOR_BYPASS_2)
+		DRM_INFO("  Cursor bypass 2.\n");
+	if (capabilities & SVGA_CAP_8BIT_EMULATION)
+		DRM_INFO("  8bit emulation.\n");
+	if (capabilities & SVGA_CAP_ALPHA_CURSOR)
+		DRM_INFO("  Alpha cursor.\n");
+	if (capabilities & SVGA_CAP_3D)
+		DRM_INFO("  3D.\n");
+	if (capabilities & SVGA_CAP_EXTENDED_FIFO)
+		DRM_INFO("  Extended Fifo.\n");
+	if (capabilities & SVGA_CAP_MULTIMON)
+		DRM_INFO("  Multimon.\n");
+	if (capabilities & SVGA_CAP_PITCHLOCK)
+		DRM_INFO("  Pitchlock.\n");
+	if (capabilities & SVGA_CAP_IRQMASK)
+		DRM_INFO("  Irq mask.\n");
+	if (capabilities & SVGA_CAP_DISPLAY_TOPOLOGY)
+		DRM_INFO("  Display Topology.\n");
+	if (capabilities & SVGA_CAP_GMR)
+		DRM_INFO("  GMR.\n");
+	if (capabilities & SVGA_CAP_TRACES)
+		DRM_INFO("  Traces.\n");
+}
+
+static int vmw_request_device(struct vmw_private *dev_priv)
+{
+	int ret;
+
+	vmw_kms_save_vga(dev_priv);
+
+	ret = vmw_fifo_init(dev_priv, &dev_priv->fifo);
+	if (unlikely(ret != 0)) {
+		DRM_ERROR("Unable to initialize FIFO.\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static void vmw_release_device(struct vmw_private *dev_priv)
+{
+	vmw_fifo_release(dev_priv, &dev_priv->fifo);
+	vmw_kms_restore_vga(dev_priv);
+}
+
+
+static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
+{
+	struct vmw_private *dev_priv;
+	int ret;
+	uint32_t svga_id;
+
+	dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
+	if (unlikely(dev_priv == NULL)) {
+		DRM_ERROR("Failed allocating a device private struct.\n");
+		return -ENOMEM;
+	}
+	memset(dev_priv, 0, sizeof(*dev_priv));
+
+	dev_priv->dev = dev;
+	dev_priv->vmw_chipset = chipset;
+	dev_priv->last_read_sequence = (uint32_t) -100;
+	mutex_init(&dev_priv->hw_mutex);
+	mutex_init(&dev_priv->cmdbuf_mutex);
+	rwlock_init(&dev_priv->resource_lock);
+	idr_init(&dev_priv->context_idr);
+	idr_init(&dev_priv->surface_idr);
+	idr_init(&dev_priv->stream_idr);
+	ida_init(&dev_priv->gmr_ida);
+	mutex_init(&dev_priv->init_mutex);
+	init_waitqueue_head(&dev_priv->fence_queue);
+	init_waitqueue_head(&dev_priv->fifo_queue);
+	atomic_set(&dev_priv->fence_queue_waiters, 0);
+	atomic_set(&dev_priv->fifo_queue_waiters, 0);
+	INIT_LIST_HEAD(&dev_priv->gmr_lru);
+
+	dev_priv->io_start = pci_resource_start(dev->pdev, 0);
+	dev_priv->vram_start = pci_resource_start(dev->pdev, 1);
+	dev_priv->mmio_start = pci_resource_start(dev->pdev, 2);
+
+	mutex_lock(&dev_priv->hw_mutex);
+
+	vmw_write(dev_priv, SVGA_REG_ID, SVGA_ID_2);
+	svga_id = vmw_read(dev_priv, SVGA_REG_ID);
+	if (svga_id != SVGA_ID_2) {
+		ret = -ENOSYS;
+		DRM_ERROR("Unsuported SVGA ID 0x%x\n", svga_id);
+		mutex_unlock(&dev_priv->hw_mutex);
+		goto out_err0;
+	}
+
+	dev_priv->capabilities = vmw_read(dev_priv, SVGA_REG_CAPABILITIES);
+
+	if (dev_priv->capabilities & SVGA_CAP_GMR) {
+		dev_priv->max_gmr_descriptors =
+			vmw_read(dev_priv,
+				 SVGA_REG_GMR_MAX_DESCRIPTOR_LENGTH);
+		dev_priv->max_gmr_ids =
+			vmw_read(dev_priv, SVGA_REG_GMR_MAX_IDS);
+	}
+
+	dev_priv->vram_size = vmw_read(dev_priv, SVGA_REG_VRAM_SIZE);
+	dev_priv->mmio_size = vmw_read(dev_priv, SVGA_REG_MEM_SIZE);
+	dev_priv->fb_max_width = vmw_read(dev_priv, SVGA_REG_MAX_WIDTH);
+	dev_priv->fb_max_height = vmw_read(dev_priv, SVGA_REG_MAX_HEIGHT);
+
+	mutex_unlock(&dev_priv->hw_mutex);
+
+	vmw_print_capabilities(dev_priv->capabilities);
+
+	if (dev_priv->capabilities & SVGA_CAP_GMR) {
+		DRM_INFO("Max GMR ids is %u\n",
+			 (unsigned)dev_priv->max_gmr_ids);
+		DRM_INFO("Max GMR descriptors is %u\n",
+			 (unsigned)dev_priv->max_gmr_descriptors);
+	}
+	DRM_INFO("VRAM at 0x%08x size is %u kiB\n",
+		 dev_priv->vram_start, dev_priv->vram_size / 1024);
+	DRM_INFO("MMIO at 0x%08x size is %u kiB\n",
+		 dev_priv->mmio_start, dev_priv->mmio_size / 1024);
+
+	ret = vmw_ttm_global_init(dev_priv);
+	if (unlikely(ret != 0))
+		goto out_err0;
+
+
+	vmw_master_init(&dev_priv->fbdev_master);
+	ttm_lock_set_kill(&dev_priv->fbdev_master.lock, false, SIGTERM);
+	dev_priv->active_master = &dev_priv->fbdev_master;
+
+
+	ret = ttm_bo_device_init(&dev_priv->bdev,
+				 dev_priv->bo_global_ref.ref.object,
+				 &vmw_bo_driver, VMWGFX_FILE_PAGE_OFFSET,
+				 false);
+	if (unlikely(ret != 0)) {
+		DRM_ERROR("Failed initializing TTM buffer object driver.\n");
+		goto out_err1;
+	}
+
+	ret = ttm_bo_init_mm(&dev_priv->bdev, TTM_PL_VRAM,
+			     (dev_priv->vram_size >> PAGE_SHIFT));
+	if (unlikely(ret != 0)) {
+		DRM_ERROR("Failed initializing memory manager for VRAM.\n");
+		goto out_err2;
+	}
+
+	dev_priv->mmio_mtrr = drm_mtrr_add(dev_priv->mmio_start,
+					   dev_priv->mmio_size, DRM_MTRR_WC);
+
+	dev_priv->mmio_virt = ioremap_wc(dev_priv->mmio_start,
+					 dev_priv->mmio_size);
+
+	if (unlikely(dev_priv->mmio_virt == NULL)) {
+		ret = -ENOMEM;
+		DRM_ERROR("Failed mapping MMIO.\n");
+		goto out_err3;
+	}
+
+	dev_priv->tdev = ttm_object_device_init
+	    (dev_priv->mem_global_ref.object, 12);
+
+	if (unlikely(dev_priv->tdev == NULL)) {
+		DRM_ERROR("Unable to initialize TTM object management.\n");
+		ret = -ENOMEM;
+		goto out_err4;
+	}
+
+	dev->dev_private = dev_priv;
+
+	if (!dev->devname)
+		dev->devname = vmw_devname;
+
+	if (dev_priv->capabilities & SVGA_CAP_IRQMASK) {
+		ret = drm_irq_install(dev);
+		if (unlikely(ret != 0)) {
+			DRM_ERROR("Failed installing irq: %d\n", ret);
+			goto out_no_irq;
+		}
+	}
+
+	ret = pci_request_regions(dev->pdev, "vmwgfx probe");
+	dev_priv->stealth = (ret != 0);
+	if (dev_priv->stealth) {
+		/**
+		 * Request at least the mmio PCI resource.
+		 */
+
+		DRM_INFO("It appears like vesafb is loaded. "
+			 "Ignore above error if any.\n");
+		ret = pci_request_region(dev->pdev, 2, "vmwgfx stealth probe");
+		if (unlikely(ret != 0)) {
+			DRM_ERROR("Failed reserving the SVGA MMIO resource.\n");
+			goto out_no_device;
+		}
+	}
+	ret = vmw_request_device(dev_priv);
+	if (unlikely(ret != 0))
+		goto out_no_device;
+	vmw_kms_init(dev_priv);
+	vmw_overlay_init(dev_priv);
+	vmw_fb_init(dev_priv);
+
+	dev_priv->pm_nb.notifier_call = vmwgfx_pm_notifier;
+	register_pm_notifier(&dev_priv->pm_nb);
+
+	DRM_INFO("%s", vmw_fifo_have_3d(dev_priv) ? "Have 3D\n" : "No 3D\n");
+
+	return 0;
+
+out_no_device:
+	if (dev_priv->capabilities & SVGA_CAP_IRQMASK)
+		drm_irq_uninstall(dev_priv->dev);
+	if (dev->devname == vmw_devname)
+		dev->devname = NULL;
+out_no_irq:
+	ttm_object_device_release(&dev_priv->tdev);
+out_err4:
+	iounmap(dev_priv->mmio_virt);
+out_err3:
+	drm_mtrr_del(dev_priv->mmio_mtrr, dev_priv->mmio_start,
+		     dev_priv->mmio_size, DRM_MTRR_WC);
+	(void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
+out_err2:
+	(void)ttm_bo_device_release(&dev_priv->bdev);
+out_err1:
+	vmw_ttm_global_release(dev_priv);
+out_err0:
+	ida_destroy(&dev_priv->gmr_ida);
+	idr_destroy(&dev_priv->surface_idr);
+	idr_destroy(&dev_priv->context_idr);
+	idr_destroy(&dev_priv->stream_idr);
+	kfree(dev_priv);
+	return ret;
+}
+
+static int vmw_driver_unload(struct drm_device *dev)
+{
+	struct vmw_private *dev_priv = vmw_priv(dev);
+
+	DRM_INFO(VMWGFX_DRIVER_NAME " unload.\n");
+
+	unregister_pm_notifier(&dev_priv->pm_nb);
+
+	vmw_fb_close(dev_priv);
+	vmw_kms_close(dev_priv);
+	vmw_overlay_close(dev_priv);
+	vmw_release_device(dev_priv);
+	if (dev_priv->stealth)
+		pci_release_region(dev->pdev, 2);
+	else
+		pci_release_regions(dev->pdev);
+
+	if (dev_priv->capabilities & SVGA_CAP_IRQMASK)
+		drm_irq_uninstall(dev_priv->dev);
+	if (dev->devname == vmw_devname)
+		dev->devname = NULL;
+	ttm_object_device_release(&dev_priv->tdev);
+	iounmap(dev_priv->mmio_virt);
+	drm_mtrr_del(dev_priv->mmio_mtrr, dev_priv->mmio_start,
+		     dev_priv->mmio_size, DRM_MTRR_WC);
+	(void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
+	(void)ttm_bo_device_release(&dev_priv->bdev);
+	vmw_ttm_global_release(dev_priv);
+	ida_destroy(&dev_priv->gmr_ida);
+	idr_destroy(&dev_priv->surface_idr);
+	idr_destroy(&dev_priv->context_idr);
+	idr_destroy(&dev_priv->stream_idr);
+
+	kfree(dev_priv);
+
+	return 0;
+}
+
+static void vmw_postclose(struct drm_device *dev,
+			 struct drm_file *file_priv)
+{
+	struct vmw_fpriv *vmw_fp;
+
+	vmw_fp = vmw_fpriv(file_priv);
+	ttm_object_file_release(&vmw_fp->tfile);
+	if (vmw_fp->locked_master)
+		drm_master_put(&vmw_fp->locked_master);
+	kfree(vmw_fp);
+}
+
+static int vmw_driver_open(struct drm_device *dev, struct drm_file *file_priv)
+{
+	struct vmw_private *dev_priv = vmw_priv(dev);
+	struct vmw_fpriv *vmw_fp;
+	int ret = -ENOMEM;
+
+	vmw_fp = kzalloc(sizeof(*vmw_fp), GFP_KERNEL);
+	if (unlikely(vmw_fp == NULL))
+		return ret;
+
+	vmw_fp->tfile = ttm_object_file_init(dev_priv->tdev, 10);
+	if (unlikely(vmw_fp->tfile == NULL))
+		goto out_no_tfile;
+
+	file_priv->driver_priv = vmw_fp;
+
+	if (unlikely(dev_priv->bdev.dev_mapping == NULL))
+		dev_priv->bdev.dev_mapping =
+			file_priv->filp->f_path.dentry->d_inode->i_mapping;
+
+	return 0;
+
+out_no_tfile:
+	kfree(vmw_fp);
+	return ret;
+}
+
+static long vmw_unlocked_ioctl(struct file *filp, unsigned int cmd,
+			       unsigned long arg)
+{
+	struct drm_file *file_priv = filp->private_data;
+	struct drm_device *dev = file_priv->minor->dev;
+	unsigned int nr = DRM_IOCTL_NR(cmd);
+
+	/*
+	 * Do extra checking on driver private ioctls.
+	 */
+
+	if ((nr >= DRM_COMMAND_BASE) && (nr < DRM_COMMAND_END)
+	    && (nr < DRM_COMMAND_BASE + dev->driver->num_ioctls)) {
+		struct drm_ioctl_desc *ioctl =
+		    &vmw_ioctls[nr - DRM_COMMAND_BASE];
+
+		if (unlikely(ioctl->cmd != cmd)) {
+			DRM_ERROR("Invalid command format, ioctl %d\n",
+				  nr - DRM_COMMAND_BASE);
+			return -EINVAL;
+		}
+	}
+
+	return drm_ioctl(filp, cmd, arg);
+}
+
+static int vmw_firstopen(struct drm_device *dev)
+{
+	struct vmw_private *dev_priv = vmw_priv(dev);
+	dev_priv->is_opened = true;
+
+	return 0;
+}
+
+static void vmw_lastclose(struct drm_device *dev)
+{
+	struct vmw_private *dev_priv = vmw_priv(dev);
+	struct drm_crtc *crtc;
+	struct drm_mode_set set;
+	int ret;
+
+	/**
+	 * Do nothing on the lastclose call from drm_unload.
+	 */
+
+	if (!dev_priv->is_opened)
+		return;
+
+	dev_priv->is_opened = false;
+	set.x = 0;
+	set.y = 0;
+	set.fb = NULL;
+	set.mode = NULL;
+	set.connectors = NULL;
+	set.num_connectors = 0;
+
+	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
+		set.crtc = crtc;
+		ret = crtc->funcs->set_config(&set);
+		WARN_ON(ret != 0);
+	}
+
+}
+
+static void vmw_master_init(struct vmw_master *vmaster)
+{
+	ttm_lock_init(&vmaster->lock);
+}
+
+static int vmw_master_create(struct drm_device *dev,
+			     struct drm_master *master)
+{
+	struct vmw_master *vmaster;
+
+	DRM_INFO("Master create.\n");
+	vmaster = kzalloc(sizeof(*vmaster), GFP_KERNEL);
+	if (unlikely(vmaster == NULL))
+		return -ENOMEM;
+
+	ttm_lock_init(&vmaster->lock);
+	ttm_lock_set_kill(&vmaster->lock, true, SIGTERM);
+	master->driver_priv = vmaster;
+
+	return 0;
+}
+
+static void vmw_master_destroy(struct drm_device *dev,
+			       struct drm_master *master)
+{
+	struct vmw_master *vmaster = vmw_master(master);
+
+	DRM_INFO("Master destroy.\n");
+	master->driver_priv = NULL;
+	kfree(vmaster);
+}
+
+
+static int vmw_master_set(struct drm_device *dev,
+			  struct drm_file *file_priv,
+			  bool from_open)
+{
+	struct vmw_private *dev_priv = vmw_priv(dev);
+	struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
+	struct vmw_master *active = dev_priv->active_master;
+	struct vmw_master *vmaster = vmw_master(file_priv->master);
+	int ret = 0;
+
+	DRM_INFO("Master set.\n");
+
+	if (active) {
+		BUG_ON(active != &dev_priv->fbdev_master);
+		ret = ttm_vt_lock(&active->lock, false, vmw_fp->tfile);
+		if (unlikely(ret != 0))
+			goto out_no_active_lock;
+
+		ttm_lock_set_kill(&active->lock, true, SIGTERM);
+		ret = ttm_bo_evict_mm(&dev_priv->bdev, TTM_PL_VRAM);
+		if (unlikely(ret != 0)) {
+			DRM_ERROR("Unable to clean VRAM on "
+				  "master drop.\n");
+		}
+
+		dev_priv->active_master = NULL;
+	}
+
+	ttm_lock_set_kill(&vmaster->lock, false, SIGTERM);
+	if (!from_open) {
+		ttm_vt_unlock(&vmaster->lock);
+		BUG_ON(vmw_fp->locked_master != file_priv->master);
+		drm_master_put(&vmw_fp->locked_master);
+	}
+
+	dev_priv->active_master = vmaster;
+
+	return 0;
+
+out_no_active_lock:
+	vmw_release_device(dev_priv);
+	return ret;
+}
+
+static void vmw_master_drop(struct drm_device *dev,
+			    struct drm_file *file_priv,
+			    bool from_release)
+{
+	struct vmw_private *dev_priv = vmw_priv(dev);
+	struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
+	struct vmw_master *vmaster = vmw_master(file_priv->master);
+	int ret;
+
+	DRM_INFO("Master drop.\n");
+
+	/**
+	 * Make sure the master doesn't disappear while we have
+	 * it locked.
+	 */
+
+	vmw_fp->locked_master = drm_master_get(file_priv->master);
+	ret = ttm_vt_lock(&vmaster->lock, false, vmw_fp->tfile);
+
+	if (unlikely((ret != 0))) {
+		DRM_ERROR("Unable to lock TTM at VT switch.\n");
+		drm_master_put(&vmw_fp->locked_master);
+	}
+
+	ttm_lock_set_kill(&vmaster->lock, true, SIGTERM);
+
+	dev_priv->active_master = &dev_priv->fbdev_master;
+	ttm_lock_set_kill(&dev_priv->fbdev_master.lock, false, SIGTERM);
+	ttm_vt_unlock(&dev_priv->fbdev_master.lock);
+
+	vmw_fb_on(dev_priv);
+}
+
+
+static void vmw_remove(struct pci_dev *pdev)
+{
+	struct drm_device *dev = pci_get_drvdata(pdev);
+
+	drm_put_dev(dev);
+}
+
+static int vmwgfx_pm_notifier(struct notifier_block *nb, unsigned long val,
+			      void *ptr)
+{
+	struct vmw_private *dev_priv =
+		container_of(nb, struct vmw_private, pm_nb);
+	struct vmw_master *vmaster = dev_priv->active_master;
+
+	switch (val) {
+	case PM_HIBERNATION_PREPARE:
+	case PM_SUSPEND_PREPARE:
+		ttm_suspend_lock(&vmaster->lock);
+
+		/**
+		 * This empties VRAM and unbinds all GMR bindings.
+		 * Buffer contents is moved to swappable memory.
+		 */
+		ttm_bo_swapout_all(&dev_priv->bdev);
+		break;
+	case PM_POST_HIBERNATION:
+	case PM_POST_SUSPEND:
+		ttm_suspend_unlock(&vmaster->lock);
+		break;
+	case PM_RESTORE_PREPARE:
+		break;
+	case PM_POST_RESTORE:
+		break;
+	default:
+		break;
+	}
+	return 0;
+}
+
+/**
+ * These might not be needed with the virtual SVGA device.
+ */
+
+int vmw_pci_suspend(struct pci_dev *pdev, pm_message_t state)
+{
+	pci_save_state(pdev);
+	pci_disable_device(pdev);
+	pci_set_power_state(pdev, PCI_D3hot);
+	return 0;
+}
+
+int vmw_pci_resume(struct pci_dev *pdev)
+{
+	pci_set_power_state(pdev, PCI_D0);
+	pci_restore_state(pdev);
+	return pci_enable_device(pdev);
+}
+
+static struct drm_driver driver = {
+	.driver_features = DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED |
+	DRIVER_MODESET,
+	.load = vmw_driver_load,
+	.unload = vmw_driver_unload,
+	.firstopen = vmw_firstopen,
+	.lastclose = vmw_lastclose,
+	.irq_preinstall = vmw_irq_preinstall,
+	.irq_postinstall = vmw_irq_postinstall,
+	.irq_uninstall = vmw_irq_uninstall,
+	.irq_handler = vmw_irq_handler,
+	.reclaim_buffers_locked = NULL,
+	.get_map_ofs = drm_core_get_map_ofs,
+	.get_reg_ofs = drm_core_get_reg_ofs,
+	.ioctls = vmw_ioctls,
+	.num_ioctls = DRM_ARRAY_SIZE(vmw_ioctls),
+	.dma_quiescent = NULL,	/*vmw_dma_quiescent, */
+	.master_create = vmw_master_create,
+	.master_destroy = vmw_master_destroy,
+	.master_set = vmw_master_set,
+	.master_drop = vmw_master_drop,
+	.open = vmw_driver_open,
+	.postclose = vmw_postclose,
+	.fops = {
+		 .owner = THIS_MODULE,
+		 .open = drm_open,
+		 .release = drm_release,
+		 .unlocked_ioctl = vmw_unlocked_ioctl,
+		 .mmap = vmw_mmap,
+		 .poll = drm_poll,
+		 .fasync = drm_fasync,
+#if defined(CONFIG_COMPAT)
+		 .compat_ioctl = drm_compat_ioctl,
+#endif
+		 },
+	.pci_driver = {
+		       .name = VMWGFX_DRIVER_NAME,
+		       .id_table = vmw_pci_id_list,
+		       .probe = vmw_probe,
+		       .remove = vmw_remove,
+		       .suspend = vmw_pci_suspend,
+		       .resume = vmw_pci_resume
+		       },
+	.name = VMWGFX_DRIVER_NAME,
+	.desc = VMWGFX_DRIVER_DESC,
+	.date = VMWGFX_DRIVER_DATE,
+	.major = VMWGFX_DRIVER_MAJOR,
+	.minor = VMWGFX_DRIVER_MINOR,
+	.patchlevel = VMWGFX_DRIVER_PATCHLEVEL
+};
+
+static int vmw_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
+{
+	return drm_get_dev(pdev, ent, &driver);
+}
+
+static int __init vmwgfx_init(void)
+{
+	int ret;
+	ret = drm_init(&driver);
+	if (ret)
+		DRM_ERROR("Failed initializing DRM.\n");
+	return ret;
+}
+
+static void __exit vmwgfx_exit(void)
+{
+	drm_exit(&driver);
+}
+
+module_init(vmwgfx_init);
+module_exit(vmwgfx_exit);
+
+MODULE_AUTHOR("VMware Inc. and others");
+MODULE_DESCRIPTION("Standalone drm driver for the VMware SVGA device");
+MODULE_LICENSE("GPL and additional rights");
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/vmwgfx/vmwgfx_reg.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/vmwgfx/vmwgfx_reg.h
@@ -0,0 +1,57 @@
+/**************************************************************************
+ *
+ * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **************************************************************************/
+
+/**
+ * This file contains virtual hardware defines for kernel space.
+ */
+
+#ifndef _VMWGFX_REG_H_
+#define _VMWGFX_REG_H_
+
+#include <linux/types.h>
+
+#define VMWGFX_INDEX_PORT     0x0
+#define VMWGFX_VALUE_PORT     0x1
+#define VMWGFX_IRQSTATUS_PORT 0x8
+
+struct svga_guest_mem_descriptor {
+	__le32 ppn;
+	__le32 num_pages;
+};
+
+struct svga_fifo_cmd_fence {
+	__le32 fence;
+};
+
+#define SVGA_SYNC_GENERIC         1
+#define SVGA_SYNC_FIFOFULL        2
+
+#include "svga_types.h"
+
+#include "svga3d_reg.h"
+
+#endif
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c
@@ -0,0 +1,737 @@
+/**************************************************************************
+ *
+ * Copyright © 2007 David Airlie
+ * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **************************************************************************/
+
+#include "drmP.h"
+#include "vmwgfx_drv.h"
+
+#include "ttm/ttm_placement.h"
+
+#define VMW_DIRTY_DELAY (HZ / 30)
+
+struct vmw_fb_par {
+	struct vmw_private *vmw_priv;
+
+	void *vmalloc;
+
+	struct vmw_dma_buffer *vmw_bo;
+	struct ttm_bo_kmap_obj map;
+
+	u32 pseudo_palette[17];
+
+	unsigned depth;
+	unsigned bpp;
+
+	unsigned max_width;
+	unsigned max_height;
+
+	void *bo_ptr;
+	unsigned bo_size;
+	bool bo_iowrite;
+
+	struct {
+		spinlock_t lock;
+		bool active;
+		unsigned x1;
+		unsigned y1;
+		unsigned x2;
+		unsigned y2;
+	} dirty;
+};
+
+static int vmw_fb_setcolreg(unsigned regno, unsigned red, unsigned green,
+			    unsigned blue, unsigned transp,
+			    struct fb_info *info)
+{
+	struct vmw_fb_par *par = info->par;
+	u32 *pal = par->pseudo_palette;
+
+	if (regno > 15) {
+		DRM_ERROR("Bad regno %u.\n", regno);
+		return 1;
+	}
+
+	switch (par->depth) {
+	case 24:
+	case 32:
+		pal[regno] = ((red & 0xff00) << 8) |
+			      (green & 0xff00) |
+			     ((blue  & 0xff00) >> 8);
+		break;
+	default:
+		DRM_ERROR("Bad depth %u, bpp %u.\n", par->depth, par->bpp);
+		return 1;
+	}
+
+	return 0;
+}
+
+static int vmw_fb_check_var(struct fb_var_screeninfo *var,
+			    struct fb_info *info)
+{
+	int depth = var->bits_per_pixel;
+	struct vmw_fb_par *par = info->par;
+	struct vmw_private *vmw_priv = par->vmw_priv;
+
+	switch (var->bits_per_pixel) {
+	case 32:
+		depth = (var->transp.length > 0) ? 32 : 24;
+		break;
+	default:
+		DRM_ERROR("Bad bpp %u.\n", var->bits_per_pixel);
+		return -EINVAL;
+	}
+
+	switch (depth) {
+	case 24:
+		var->red.offset = 16;
+		var->green.offset = 8;
+		var->blue.offset = 0;
+		var->red.length = 8;
+		var->green.length = 8;
+		var->blue.length = 8;
+		var->transp.length = 0;
+		var->transp.offset = 0;
+		break;
+	case 32:
+		var->red.offset = 16;
+		var->green.offset = 8;
+		var->blue.offset = 0;
+		var->red.length = 8;
+		var->green.length = 8;
+		var->blue.length = 8;
+		var->transp.length = 8;
+		var->transp.offset = 24;
+		break;
+	default:
+		DRM_ERROR("Bad depth %u.\n", depth);
+		return -EINVAL;
+	}
+
+	/* without multimon its hard to resize */
+	if (!(vmw_priv->capabilities & SVGA_CAP_MULTIMON) &&
+	    (var->xres != par->max_width ||
+	     var->yres != par->max_height)) {
+		DRM_ERROR("Tried to resize, but we don't have multimon\n");
+		return -EINVAL;
+	}
+
+	if (var->xres > par->max_width ||
+	    var->yres > par->max_height) {
+		DRM_ERROR("Requested geom can not fit in framebuffer\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int vmw_fb_set_par(struct fb_info *info)
+{
+	struct vmw_fb_par *par = info->par;
+	struct vmw_private *vmw_priv = par->vmw_priv;
+
+	if (vmw_priv->capabilities & SVGA_CAP_MULTIMON) {
+		vmw_write(vmw_priv, SVGA_REG_NUM_GUEST_DISPLAYS, 1);
+		vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, 0);
+		vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, true);
+		vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, 0);
+		vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, 0);
+		vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, 0);
+		vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, 0);
+		vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
+
+		vmw_write(vmw_priv, SVGA_REG_ENABLE, 1);
+		vmw_write(vmw_priv, SVGA_REG_WIDTH, par->max_width);
+		vmw_write(vmw_priv, SVGA_REG_HEIGHT, par->max_height);
+		vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, par->bpp);
+		vmw_write(vmw_priv, SVGA_REG_DEPTH, par->depth);
+		vmw_write(vmw_priv, SVGA_REG_RED_MASK, 0x00ff0000);
+		vmw_write(vmw_priv, SVGA_REG_GREEN_MASK, 0x0000ff00);
+		vmw_write(vmw_priv, SVGA_REG_BLUE_MASK, 0x000000ff);
+
+		/* TODO check if pitch and offset changes */
+
+		vmw_write(vmw_priv, SVGA_REG_NUM_GUEST_DISPLAYS, 1);
+		vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, 0);
+		vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, true);
+		vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, info->var.xoffset);
+		vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, info->var.yoffset);
+		vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, info->var.xres);
+		vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, info->var.yres);
+		vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
+	} else {
+		vmw_write(vmw_priv, SVGA_REG_WIDTH, info->var.xres);
+		vmw_write(vmw_priv, SVGA_REG_HEIGHT, info->var.yres);
+
+		/* TODO check if pitch and offset changes */
+	}
+
+	return 0;
+}
+
+static int vmw_fb_pan_display(struct fb_var_screeninfo *var,
+			      struct fb_info *info)
+{
+	return 0;
+}
+
+static int vmw_fb_blank(int blank, struct fb_info *info)
+{
+	return 0;
+}
+
+/*
+ * Dirty code
+ */
+
+static void vmw_fb_dirty_flush(struct vmw_fb_par *par)
+{
+	struct vmw_private *vmw_priv = par->vmw_priv;
+	struct fb_info *info = vmw_priv->fb_info;
+	int stride = (info->fix.line_length / 4);
+	int *src = (int *)info->screen_base;
+	__le32 __iomem *vram_mem = par->bo_ptr;
+	unsigned long flags;
+	unsigned x, y, w, h;
+	int i, k;
+	struct {
+		uint32_t header;
+		SVGAFifoCmdUpdate body;
+	} *cmd;
+
+	spin_lock_irqsave(&par->dirty.lock, flags);
+	if (!par->dirty.active) {
+		spin_unlock_irqrestore(&par->dirty.lock, flags);
+		return;
+	}
+	x = par->dirty.x1;
+	y = par->dirty.y1;
+	w = min(par->dirty.x2, info->var.xres) - x;
+	h = min(par->dirty.y2, info->var.yres) - y;
+	par->dirty.x1 = par->dirty.x2 = 0;
+	par->dirty.y1 = par->dirty.y2 = 0;
+	spin_unlock_irqrestore(&par->dirty.lock, flags);
+
+	for (i = y * stride; i < info->fix.smem_len / 4; i += stride) {
+		for (k = i+x; k < i+x+w && k < info->fix.smem_len / 4; k++)
+			iowrite32(src[k], vram_mem + k);
+	}
+
+#if 0
+	DRM_INFO("%s, (%u, %u) (%ux%u)\n", __func__, x, y, w, h);
+#endif
+
+	cmd = vmw_fifo_reserve(vmw_priv, sizeof(*cmd));
+	if (unlikely(cmd == NULL)) {
+		DRM_ERROR("Fifo reserve failed.\n");
+		return;
+	}
+
+	cmd->header = cpu_to_le32(SVGA_CMD_UPDATE);
+	cmd->body.x = cpu_to_le32(x);
+	cmd->body.y = cpu_to_le32(y);
+	cmd->body.width = cpu_to_le32(w);
+	cmd->body.height = cpu_to_le32(h);
+	vmw_fifo_commit(vmw_priv, sizeof(*cmd));
+}
+
+static void vmw_fb_dirty_mark(struct vmw_fb_par *par,
+			      unsigned x1, unsigned y1,
+			      unsigned width, unsigned height)
+{
+	struct fb_info *info = par->vmw_priv->fb_info;
+	unsigned long flags;
+	unsigned x2 = x1 + width;
+	unsigned y2 = y1 + height;
+
+	spin_lock_irqsave(&par->dirty.lock, flags);
+	if (par->dirty.x1 == par->dirty.x2) {
+		par->dirty.x1 = x1;
+		par->dirty.y1 = y1;
+		par->dirty.x2 = x2;
+		par->dirty.y2 = y2;
+		/* if we are active start the dirty work
+		 * we share the work with the defio system */
+		if (par->dirty.active)
+			schedule_delayed_work(&info->deferred_work, VMW_DIRTY_DELAY);
+	} else {
+		if (x1 < par->dirty.x1)
+			par->dirty.x1 = x1;
+		if (y1 < par->dirty.y1)
+			par->dirty.y1 = y1;
+		if (x2 > par->dirty.x2)
+			par->dirty.x2 = x2;
+		if (y2 > par->dirty.y2)
+			par->dirty.y2 = y2;
+	}
+	spin_unlock_irqrestore(&par->dirty.lock, flags);
+}
+
+static void vmw_deferred_io(struct fb_info *info,
+			    struct list_head *pagelist)
+{
+	struct vmw_fb_par *par = info->par;
+	unsigned long start, end, min, max;
+	unsigned long flags;
+	struct page *page;
+	int y1, y2;
+
+	min = ULONG_MAX;
+	max = 0;
+	list_for_each_entry(page, pagelist, lru) {
+		start = page->index << PAGE_SHIFT;
+		end = start + PAGE_SIZE - 1;
+		min = min(min, start);
+		max = max(max, end);
+	}
+
+	if (min < max) {
+		y1 = min / info->fix.line_length;
+		y2 = (max / info->fix.line_length) + 1;
+
+		spin_lock_irqsave(&par->dirty.lock, flags);
+		par->dirty.x1 = 0;
+		par->dirty.y1 = y1;
+		par->dirty.x2 = info->var.xres;
+		par->dirty.y2 = y2;
+		spin_unlock_irqrestore(&par->dirty.lock, flags);
+	}
+
+	vmw_fb_dirty_flush(par);
+};
+
+struct fb_deferred_io vmw_defio = {
+	.delay		= VMW_DIRTY_DELAY,
+	.deferred_io	= vmw_deferred_io,
+};
+
+/*
+ * Draw code
+ */
+
+static void vmw_fb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
+{
+	cfb_fillrect(info, rect);
+	vmw_fb_dirty_mark(info->par, rect->dx, rect->dy,
+			  rect->width, rect->height);
+}
+
+static void vmw_fb_copyarea(struct fb_info *info, const struct fb_copyarea *region)
+{
+	cfb_copyarea(info, region);
+	vmw_fb_dirty_mark(info->par, region->dx, region->dy,
+			  region->width, region->height);
+}
+
+static void vmw_fb_imageblit(struct fb_info *info, const struct fb_image *image)
+{
+	cfb_imageblit(info, image);
+	vmw_fb_dirty_mark(info->par, image->dx, image->dy,
+			  image->width, image->height);
+}
+
+/*
+ * Bring up code
+ */
+
+static struct fb_ops vmw_fb_ops = {
+	.owner = THIS_MODULE,
+	.fb_check_var = vmw_fb_check_var,
+	.fb_set_par = vmw_fb_set_par,
+	.fb_setcolreg = vmw_fb_setcolreg,
+	.fb_fillrect = vmw_fb_fillrect,
+	.fb_copyarea = vmw_fb_copyarea,
+	.fb_imageblit = vmw_fb_imageblit,
+	.fb_pan_display = vmw_fb_pan_display,
+	.fb_blank = vmw_fb_blank,
+};
+
+static int vmw_fb_create_bo(struct vmw_private *vmw_priv,
+			    size_t size, struct vmw_dma_buffer **out)
+{
+	struct vmw_dma_buffer *vmw_bo;
+	struct ttm_placement ne_placement = vmw_vram_ne_placement;
+	int ret;
+
+	ne_placement.lpfn = (size + PAGE_SIZE - 1) >> PAGE_SHIFT;
+
+	/* interuptable? */
+	ret = ttm_write_lock(&vmw_priv->fbdev_master.lock, false);
+	if (unlikely(ret != 0))
+		return ret;
+
+	vmw_bo = kmalloc(sizeof(*vmw_bo), GFP_KERNEL);
+	if (!vmw_bo)
+		goto err_unlock;
+
+	ret = vmw_dmabuf_init(vmw_priv, vmw_bo, size,
+			      &ne_placement,
+			      false,
+			      &vmw_dmabuf_bo_free);
+	if (unlikely(ret != 0))
+		goto err_unlock; /* init frees the buffer on failure */
+
+	*out = vmw_bo;
+
+	ttm_write_unlock(&vmw_priv->fbdev_master.lock);
+
+	return 0;
+
+err_unlock:
+	ttm_write_unlock(&vmw_priv->fbdev_master.lock);
+	return ret;
+}
+
+int vmw_fb_init(struct vmw_private *vmw_priv)
+{
+	struct device *device = &vmw_priv->dev->pdev->dev;
+	struct vmw_fb_par *par;
+	struct fb_info *info;
+	unsigned initial_width, initial_height;
+	unsigned fb_width, fb_height;
+	unsigned fb_bbp, fb_depth, fb_offset, fb_pitch, fb_size;
+	int ret;
+
+	initial_width = 800;
+	initial_height = 600;
+
+	fb_bbp = 32;
+	fb_depth = 24;
+
+	if (vmw_priv->capabilities & SVGA_CAP_MULTIMON) {
+		fb_width = min(vmw_priv->fb_max_width, (unsigned)2048);
+		fb_height = min(vmw_priv->fb_max_height, (unsigned)2048);
+	} else {
+		fb_width = min(vmw_priv->fb_max_width, initial_width);
+		fb_height = min(vmw_priv->fb_max_height, initial_height);
+	}
+
+	initial_width = min(fb_width, initial_width);
+	initial_height = min(fb_height, initial_height);
+
+	vmw_write(vmw_priv, SVGA_REG_WIDTH, fb_width);
+	vmw_write(vmw_priv, SVGA_REG_HEIGHT, fb_height);
+	vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, fb_bbp);
+	vmw_write(vmw_priv, SVGA_REG_DEPTH, fb_depth);
+	vmw_write(vmw_priv, SVGA_REG_RED_MASK, 0x00ff0000);
+	vmw_write(vmw_priv, SVGA_REG_GREEN_MASK, 0x0000ff00);
+	vmw_write(vmw_priv, SVGA_REG_BLUE_MASK, 0x000000ff);
+
+	fb_size = vmw_read(vmw_priv, SVGA_REG_FB_SIZE);
+	fb_offset = vmw_read(vmw_priv, SVGA_REG_FB_OFFSET);
+	fb_pitch = vmw_read(vmw_priv, SVGA_REG_BYTES_PER_LINE);
+
+	DRM_DEBUG("width  %u\n", vmw_read(vmw_priv, SVGA_REG_MAX_WIDTH));
+	DRM_DEBUG("height %u\n", vmw_read(vmw_priv, SVGA_REG_MAX_HEIGHT));
+	DRM_DEBUG("width  %u\n", vmw_read(vmw_priv, SVGA_REG_WIDTH));
+	DRM_DEBUG("height %u\n", vmw_read(vmw_priv, SVGA_REG_HEIGHT));
+	DRM_DEBUG("bpp    %u\n", vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL));
+	DRM_DEBUG("depth  %u\n", vmw_read(vmw_priv, SVGA_REG_DEPTH));
+	DRM_DEBUG("bpl    %u\n", vmw_read(vmw_priv, SVGA_REG_BYTES_PER_LINE));
+	DRM_DEBUG("r mask %08x\n", vmw_read(vmw_priv, SVGA_REG_RED_MASK));
+	DRM_DEBUG("g mask %08x\n", vmw_read(vmw_priv, SVGA_REG_GREEN_MASK));
+	DRM_DEBUG("b mask %08x\n", vmw_read(vmw_priv, SVGA_REG_BLUE_MASK));
+	DRM_DEBUG("fb_offset 0x%08x\n", fb_offset);
+	DRM_DEBUG("fb_pitch  %u\n", fb_pitch);
+	DRM_DEBUG("fb_size   %u kiB\n", fb_size / 1024);
+
+	info = framebuffer_alloc(sizeof(*par), device);
+	if (!info)
+		return -ENOMEM;
+
+	/*
+	 * Par
+	 */
+	vmw_priv->fb_info = info;
+	par = info->par;
+	par->vmw_priv = vmw_priv;
+	par->depth = fb_depth;
+	par->bpp = fb_bbp;
+	par->vmalloc = NULL;
+	par->max_width = fb_width;
+	par->max_height = fb_height;
+
+	/*
+	 * Create buffers and alloc memory
+	 */
+	par->vmalloc = vmalloc(fb_size);
+	if (unlikely(par->vmalloc == NULL)) {
+		ret = -ENOMEM;
+		goto err_free;
+	}
+
+	ret = vmw_fb_create_bo(vmw_priv, fb_size, &par->vmw_bo);
+	if (unlikely(ret != 0))
+		goto err_free;
+
+	ret = ttm_bo_kmap(&par->vmw_bo->base,
+			  0,
+			  par->vmw_bo->base.num_pages,
+			  &par->map);
+	if (unlikely(ret != 0))
+		goto err_unref;
+	par->bo_ptr = ttm_kmap_obj_virtual(&par->map, &par->bo_iowrite);
+	par->bo_size = fb_size;
+
+	/*
+	 * Fixed and var
+	 */
+	strcpy(info->fix.id, "svgadrmfb");
+	info->fix.type = FB_TYPE_PACKED_PIXELS;
+	info->fix.visual = FB_VISUAL_TRUECOLOR;
+	info->fix.type_aux = 0;
+	info->fix.xpanstep = 1; /* doing it in hw */
+	info->fix.ypanstep = 1; /* doing it in hw */
+	info->fix.ywrapstep = 0;
+	info->fix.accel = FB_ACCEL_NONE;
+	info->fix.line_length = fb_pitch;
+
+	info->fix.smem_start = 0;
+	info->fix.smem_len = fb_size;
+
+	info->fix.mmio_start = 0;
+	info->fix.mmio_len = 0;
+
+	info->pseudo_palette = par->pseudo_palette;
+	info->screen_base = par->vmalloc;
+	info->screen_size = fb_size;
+
+	info->flags = FBINFO_DEFAULT;
+	info->fbops = &vmw_fb_ops;
+
+	/* 24 depth per default */
+	info->var.red.offset = 16;
+	info->var.green.offset = 8;
+	info->var.blue.offset = 0;
+	info->var.red.length = 8;
+	info->var.green.length = 8;
+	info->var.blue.length = 8;
+	info->var.transp.offset = 0;
+	info->var.transp.length = 0;
+
+	info->var.xres_virtual = fb_width;
+	info->var.yres_virtual = fb_height;
+	info->var.bits_per_pixel = par->bpp;
+	info->var.xoffset = 0;
+	info->var.yoffset = 0;
+	info->var.activate = FB_ACTIVATE_NOW;
+	info->var.height = -1;
+	info->var.width = -1;
+
+	info->var.xres = initial_width;
+	info->var.yres = initial_height;
+
+#if 0
+	info->pixmap.size = 64*1024;
+	info->pixmap.buf_align = 8;
+	info->pixmap.access_align = 32;
+	info->pixmap.flags = FB_PIXMAP_SYSTEM;
+	info->pixmap.scan_align = 1;
+#else
+	info->pixmap.size = 0;
+	info->pixmap.buf_align = 8;
+	info->pixmap.access_align = 32;
+	info->pixmap.flags = FB_PIXMAP_SYSTEM;
+	info->pixmap.scan_align = 1;
+#endif
+
+	info->aperture_base = vmw_priv->vram_start;
+	info->aperture_size = vmw_priv->vram_size;
+
+	/*
+	 * Dirty & Deferred IO
+	 */
+	par->dirty.x1 = par->dirty.x2 = 0;
+	par->dirty.y1 = par->dirty.y1 = 0;
+	par->dirty.active = true;
+	spin_lock_init(&par->dirty.lock);
+	info->fbdefio = &vmw_defio;
+	fb_deferred_io_init(info);
+
+	ret = register_framebuffer(info);
+	if (unlikely(ret != 0))
+		goto err_defio;
+
+	return 0;
+
+err_defio:
+	fb_deferred_io_cleanup(info);
+	ttm_bo_kunmap(&par->map);
+err_unref:
+	ttm_bo_unref((struct ttm_buffer_object **)&par->vmw_bo);
+err_free:
+	vfree(par->vmalloc);
+	framebuffer_release(info);
+	vmw_priv->fb_info = NULL;
+
+	return ret;
+}
+
+int vmw_fb_close(struct vmw_private *vmw_priv)
+{
+	struct fb_info *info;
+	struct vmw_fb_par *par;
+	struct ttm_buffer_object *bo;
+
+	if (!vmw_priv->fb_info)
+		return 0;
+
+	info = vmw_priv->fb_info;
+	par = info->par;
+	bo = &par->vmw_bo->base;
+	par->vmw_bo = NULL;
+
+	/* ??? order */
+	fb_deferred_io_cleanup(info);
+	unregister_framebuffer(info);
+
+	ttm_bo_kunmap(&par->map);
+	ttm_bo_unref(&bo);
+
+	vfree(par->vmalloc);
+	framebuffer_release(info);
+
+	return 0;
+}
+
+int vmw_dmabuf_from_vram(struct vmw_private *vmw_priv,
+			 struct vmw_dma_buffer *vmw_bo)
+{
+	struct ttm_buffer_object *bo = &vmw_bo->base;
+	int ret = 0;
+
+	ret = ttm_bo_reserve(bo, false, false, false, 0);
+	if (unlikely(ret != 0))
+		return ret;
+
+	ret = ttm_bo_validate(bo, &vmw_sys_placement, false, false);
+	ttm_bo_unreserve(bo);
+
+	return ret;
+}
+
+int vmw_dmabuf_to_start_of_vram(struct vmw_private *vmw_priv,
+				struct vmw_dma_buffer *vmw_bo)
+{
+	struct ttm_buffer_object *bo = &vmw_bo->base;
+	struct ttm_placement ne_placement = vmw_vram_ne_placement;
+	int ret = 0;
+
+	ne_placement.lpfn = bo->num_pages;
+
+	/* interuptable? */
+	ret = ttm_write_lock(&vmw_priv->active_master->lock, false);
+	if (unlikely(ret != 0))
+		return ret;
+
+	ret = ttm_bo_reserve(bo, false, false, false, 0);
+	if (unlikely(ret != 0))
+		goto err_unlock;
+
+	ret = ttm_bo_validate(bo, &ne_placement, false, false);
+	ttm_bo_unreserve(bo);
+err_unlock:
+	ttm_write_unlock(&vmw_priv->active_master->lock);
+
+	return ret;
+}
+
+int vmw_fb_off(struct vmw_private *vmw_priv)
+{
+	struct fb_info *info;
+	struct vmw_fb_par *par;
+	unsigned long flags;
+
+	if (!vmw_priv->fb_info)
+		return -EINVAL;
+
+	info = vmw_priv->fb_info;
+	par = info->par;
+
+	spin_lock_irqsave(&par->dirty.lock, flags);
+	par->dirty.active = false;
+	spin_unlock_irqrestore(&par->dirty.lock, flags);
+
+	flush_scheduled_work();
+
+	par->bo_ptr = NULL;
+	ttm_bo_kunmap(&par->map);
+
+	vmw_dmabuf_from_vram(vmw_priv, par->vmw_bo);
+
+	return 0;
+}
+
+int vmw_fb_on(struct vmw_private *vmw_priv)
+{
+	struct fb_info *info;
+	struct vmw_fb_par *par;
+	unsigned long flags;
+	bool dummy;
+	int ret;
+
+	if (!vmw_priv->fb_info)
+		return -EINVAL;
+
+	info = vmw_priv->fb_info;
+	par = info->par;
+
+	/* we are already active */
+	if (par->bo_ptr != NULL)
+		return 0;
+
+	/* Make sure that all overlays are stoped when we take over */
+	vmw_overlay_stop_all(vmw_priv);
+
+	ret = vmw_dmabuf_to_start_of_vram(vmw_priv, par->vmw_bo);
+	if (unlikely(ret != 0)) {
+		DRM_ERROR("could not move buffer to start of VRAM\n");
+		goto err_no_buffer;
+	}
+
+	ret = ttm_bo_kmap(&par->vmw_bo->base,
+			  0,
+			  par->vmw_bo->base.num_pages,
+			  &par->map);
+	BUG_ON(ret != 0);
+	par->bo_ptr = ttm_kmap_obj_virtual(&par->map, &dummy);
+
+	spin_lock_irqsave(&par->dirty.lock, flags);
+	par->dirty.active = true;
+	spin_unlock_irqrestore(&par->dirty.lock, flags);
+
+err_no_buffer:
+	vmw_fb_set_par(info);
+
+	vmw_fb_dirty_mark(par, 0, 0, info->var.xres, info->var.yres);
+
+	/* If there already was stuff dirty we wont
+	 * schedule a new work, so lets do it now */
+	schedule_delayed_work(&info->deferred_work, 0);
+
+	return 0;
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
@@ -0,0 +1,1187 @@
+/**************************************************************************
+ *
+ * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **************************************************************************/
+
+#include "vmwgfx_drv.h"
+#include "vmwgfx_drm.h"
+#include "ttm/ttm_object.h"
+#include "ttm/ttm_placement.h"
+#include "drmP.h"
+
+#define VMW_RES_CONTEXT ttm_driver_type0
+#define VMW_RES_SURFACE ttm_driver_type1
+#define VMW_RES_STREAM ttm_driver_type2
+
+struct vmw_user_context {
+	struct ttm_base_object base;
+	struct vmw_resource res;
+};
+
+struct vmw_user_surface {
+	struct ttm_base_object base;
+	struct vmw_surface srf;
+};
+
+struct vmw_user_dma_buffer {
+	struct ttm_base_object base;
+	struct vmw_dma_buffer dma;
+};
+
+struct vmw_bo_user_rep {
+	uint32_t handle;
+	uint64_t map_handle;
+};
+
+struct vmw_stream {
+	struct vmw_resource res;
+	uint32_t stream_id;
+};
+
+struct vmw_user_stream {
+	struct ttm_base_object base;
+	struct vmw_stream stream;
+};
+
+static inline struct vmw_dma_buffer *
+vmw_dma_buffer(struct ttm_buffer_object *bo)
+{
+	return container_of(bo, struct vmw_dma_buffer, base);
+}
+
+static inline struct vmw_user_dma_buffer *
+vmw_user_dma_buffer(struct ttm_buffer_object *bo)
+{
+	struct vmw_dma_buffer *vmw_bo = vmw_dma_buffer(bo);
+	return container_of(vmw_bo, struct vmw_user_dma_buffer, dma);
+}
+
+struct vmw_resource *vmw_resource_reference(struct vmw_resource *res)
+{
+	kref_get(&res->kref);
+	return res;
+}
+
+static void vmw_resource_release(struct kref *kref)
+{
+	struct vmw_resource *res =
+	    container_of(kref, struct vmw_resource, kref);
+	struct vmw_private *dev_priv = res->dev_priv;
+
+	idr_remove(res->idr, res->id);
+	write_unlock(&dev_priv->resource_lock);
+
+	if (likely(res->hw_destroy != NULL))
+		res->hw_destroy(res);
+
+	if (res->res_free != NULL)
+		res->res_free(res);
+	else
+		kfree(res);
+
+	write_lock(&dev_priv->resource_lock);
+}
+
+void vmw_resource_unreference(struct vmw_resource **p_res)
+{
+	struct vmw_resource *res = *p_res;
+	struct vmw_private *dev_priv = res->dev_priv;
+
+	*p_res = NULL;
+	write_lock(&dev_priv->resource_lock);
+	kref_put(&res->kref, vmw_resource_release);
+	write_unlock(&dev_priv->resource_lock);
+}
+
+static int vmw_resource_init(struct vmw_private *dev_priv,
+			     struct vmw_resource *res,
+			     struct idr *idr,
+			     enum ttm_object_type obj_type,
+			     void (*res_free) (struct vmw_resource *res))
+{
+	int ret;
+
+	kref_init(&res->kref);
+	res->hw_destroy = NULL;
+	res->res_free = res_free;
+	res->res_type = obj_type;
+	res->idr = idr;
+	res->avail = false;
+	res->dev_priv = dev_priv;
+
+	do {
+		if (unlikely(idr_pre_get(idr, GFP_KERNEL) == 0))
+			return -ENOMEM;
+
+		write_lock(&dev_priv->resource_lock);
+		ret = idr_get_new_above(idr, res, 1, &res->id);
+		write_unlock(&dev_priv->resource_lock);
+
+	} while (ret == -EAGAIN);
+
+	return ret;
+}
+
+/**
+ * vmw_resource_activate
+ *
+ * @res:        Pointer to the newly created resource
+ * @hw_destroy: Destroy function. NULL if none.
+ *
+ * Activate a resource after the hardware has been made aware of it.
+ * Set tye destroy function to @destroy. Typically this frees the
+ * resource and destroys the hardware resources associated with it.
+ * Activate basically means that the function vmw_resource_lookup will
+ * find it.
+ */
+
+static void vmw_resource_activate(struct vmw_resource *res,
+				  void (*hw_destroy) (struct vmw_resource *))
+{
+	struct vmw_private *dev_priv = res->dev_priv;
+
+	write_lock(&dev_priv->resource_lock);
+	res->avail = true;
+	res->hw_destroy = hw_destroy;
+	write_unlock(&dev_priv->resource_lock);
+}
+
+struct vmw_resource *vmw_resource_lookup(struct vmw_private *dev_priv,
+					 struct idr *idr, int id)
+{
+	struct vmw_resource *res;
+
+	read_lock(&dev_priv->resource_lock);
+	res = idr_find(idr, id);
+	if (res && res->avail)
+		kref_get(&res->kref);
+	else
+		res = NULL;
+	read_unlock(&dev_priv->resource_lock);
+
+	if (unlikely(res == NULL))
+		return NULL;
+
+	return res;
+}
+
+/**
+ * Context management:
+ */
+
+static void vmw_hw_context_destroy(struct vmw_resource *res)
+{
+
+	struct vmw_private *dev_priv = res->dev_priv;
+	struct {
+		SVGA3dCmdHeader header;
+		SVGA3dCmdDestroyContext body;
+	} *cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
+
+	if (unlikely(cmd == NULL)) {
+		DRM_ERROR("Failed reserving FIFO space for surface "
+			  "destruction.\n");
+		return;
+	}
+
+	cmd->header.id = cpu_to_le32(SVGA_3D_CMD_CONTEXT_DESTROY);
+	cmd->header.size = cpu_to_le32(sizeof(cmd->body));
+	cmd->body.cid = cpu_to_le32(res->id);
+
+	vmw_fifo_commit(dev_priv, sizeof(*cmd));
+}
+
+static int vmw_context_init(struct vmw_private *dev_priv,
+			    struct vmw_resource *res,
+			    void (*res_free) (struct vmw_resource *res))
+{
+	int ret;
+
+	struct {
+		SVGA3dCmdHeader header;
+		SVGA3dCmdDefineContext body;
+	} *cmd;
+
+	ret = vmw_resource_init(dev_priv, res, &dev_priv->context_idr,
+				VMW_RES_CONTEXT, res_free);
+
+	if (unlikely(ret != 0)) {
+		if (res_free == NULL)
+			kfree(res);
+		else
+			res_free(res);
+		return ret;
+	}
+
+	cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
+	if (unlikely(cmd == NULL)) {
+		DRM_ERROR("Fifo reserve failed.\n");
+		vmw_resource_unreference(&res);
+		return -ENOMEM;
+	}
+
+	cmd->header.id = cpu_to_le32(SVGA_3D_CMD_CONTEXT_DEFINE);
+	cmd->header.size = cpu_to_le32(sizeof(cmd->body));
+	cmd->body.cid = cpu_to_le32(res->id);
+
+	vmw_fifo_commit(dev_priv, sizeof(*cmd));
+	vmw_resource_activate(res, vmw_hw_context_destroy);
+	return 0;
+}
+
+struct vmw_resource *vmw_context_alloc(struct vmw_private *dev_priv)
+{
+	struct vmw_resource *res = kmalloc(sizeof(*res), GFP_KERNEL);
+	int ret;
+
+	if (unlikely(res == NULL))
+		return NULL;
+
+	ret = vmw_context_init(dev_priv, res, NULL);
+	return (ret == 0) ? res : NULL;
+}
+
+/**
+ * User-space context management:
+ */
+
+static void vmw_user_context_free(struct vmw_resource *res)
+{
+	struct vmw_user_context *ctx =
+	    container_of(res, struct vmw_user_context, res);
+
+	kfree(ctx);
+}
+
+/**
+ * This function is called when user space has no more references on the
+ * base object. It releases the base-object's reference on the resource object.
+ */
+
+static void vmw_user_context_base_release(struct ttm_base_object **p_base)
+{
+	struct ttm_base_object *base = *p_base;
+	struct vmw_user_context *ctx =
+	    container_of(base, struct vmw_user_context, base);
+	struct vmw_resource *res = &ctx->res;
+
+	*p_base = NULL;
+	vmw_resource_unreference(&res);
+}
+
+int vmw_context_destroy_ioctl(struct drm_device *dev, void *data,
+			      struct drm_file *file_priv)
+{
+	struct vmw_private *dev_priv = vmw_priv(dev);
+	struct vmw_resource *res;
+	struct vmw_user_context *ctx;
+	struct drm_vmw_context_arg *arg = (struct drm_vmw_context_arg *)data;
+	struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
+	int ret = 0;
+
+	res = vmw_resource_lookup(dev_priv, &dev_priv->context_idr, arg->cid);
+	if (unlikely(res == NULL))
+		return -EINVAL;
+
+	if (res->res_free != &vmw_user_context_free) {
+		ret = -EINVAL;
+		goto out;
+	}
+
+	ctx = container_of(res, struct vmw_user_context, res);
+	if (ctx->base.tfile != tfile && !ctx->base.shareable) {
+		ret = -EPERM;
+		goto out;
+	}
+
+	ttm_ref_object_base_unref(tfile, ctx->base.hash.key, TTM_REF_USAGE);
+out:
+	vmw_resource_unreference(&res);
+	return ret;
+}
+
+int vmw_context_define_ioctl(struct drm_device *dev, void *data,
+			     struct drm_file *file_priv)
+{
+	struct vmw_private *dev_priv = vmw_priv(dev);
+	struct vmw_user_context *ctx = kmalloc(sizeof(*ctx), GFP_KERNEL);
+	struct vmw_resource *res;
+	struct vmw_resource *tmp;
+	struct drm_vmw_context_arg *arg = (struct drm_vmw_context_arg *)data;
+	struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
+	int ret;
+
+	if (unlikely(ctx == NULL))
+		return -ENOMEM;
+
+	res = &ctx->res;
+	ctx->base.shareable = false;
+	ctx->base.tfile = NULL;
+
+	ret = vmw_context_init(dev_priv, res, vmw_user_context_free);
+	if (unlikely(ret != 0))
+		return ret;
+
+	tmp = vmw_resource_reference(&ctx->res);
+	ret = ttm_base_object_init(tfile, &ctx->base, false, VMW_RES_CONTEXT,
+				   &vmw_user_context_base_release, NULL);
+
+	if (unlikely(ret != 0)) {
+		vmw_resource_unreference(&tmp);
+		goto out_err;
+	}
+
+	arg->cid = res->id;
+out_err:
+	vmw_resource_unreference(&res);
+	return ret;
+
+}
+
+int vmw_context_check(struct vmw_private *dev_priv,
+		      struct ttm_object_file *tfile,
+		      int id)
+{
+	struct vmw_resource *res;
+	int ret = 0;
+
+	read_lock(&dev_priv->resource_lock);
+	res = idr_find(&dev_priv->context_idr, id);
+	if (res && res->avail) {
+		struct vmw_user_context *ctx =
+			container_of(res, struct vmw_user_context, res);
+		if (ctx->base.tfile != tfile && !ctx->base.shareable)
+			ret = -EPERM;
+	} else
+		ret = -EINVAL;
+	read_unlock(&dev_priv->resource_lock);
+
+	return ret;
+}
+
+
+/**
+ * Surface management.
+ */
+
+static void vmw_hw_surface_destroy(struct vmw_resource *res)
+{
+
+	struct vmw_private *dev_priv = res->dev_priv;
+	struct {
+		SVGA3dCmdHeader header;
+		SVGA3dCmdDestroySurface body;
+	} *cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
+
+	if (unlikely(cmd == NULL)) {
+		DRM_ERROR("Failed reserving FIFO space for surface "
+			  "destruction.\n");
+		return;
+	}
+
+	cmd->header.id = cpu_to_le32(SVGA_3D_CMD_SURFACE_DESTROY);
+	cmd->header.size = cpu_to_le32(sizeof(cmd->body));
+	cmd->body.sid = cpu_to_le32(res->id);
+
+	vmw_fifo_commit(dev_priv, sizeof(*cmd));
+}
+
+void vmw_surface_res_free(struct vmw_resource *res)
+{
+	struct vmw_surface *srf = container_of(res, struct vmw_surface, res);
+
+	kfree(srf->sizes);
+	kfree(srf->snooper.image);
+	kfree(srf);
+}
+
+int vmw_surface_init(struct vmw_private *dev_priv,
+		     struct vmw_surface *srf,
+		     void (*res_free) (struct vmw_resource *res))
+{
+	int ret;
+	struct {
+		SVGA3dCmdHeader header;
+		SVGA3dCmdDefineSurface body;
+	} *cmd;
+	SVGA3dSize *cmd_size;
+	struct vmw_resource *res = &srf->res;
+	struct drm_vmw_size *src_size;
+	size_t submit_size;
+	uint32_t cmd_len;
+	int i;
+
+	BUG_ON(res_free == NULL);
+	ret = vmw_resource_init(dev_priv, res, &dev_priv->surface_idr,
+				VMW_RES_SURFACE, res_free);
+
+	if (unlikely(ret != 0)) {
+		res_free(res);
+		return ret;
+	}
+
+	submit_size = sizeof(*cmd) + srf->num_sizes * sizeof(SVGA3dSize);
+	cmd_len = sizeof(cmd->body) + srf->num_sizes * sizeof(SVGA3dSize);
+
+	cmd = vmw_fifo_reserve(dev_priv, submit_size);
+	if (unlikely(cmd == NULL)) {
+		DRM_ERROR("Fifo reserve failed for create surface.\n");
+		vmw_resource_unreference(&res);
+		return -ENOMEM;
+	}
+
+	cmd->header.id = cpu_to_le32(SVGA_3D_CMD_SURFACE_DEFINE);
+	cmd->header.size = cpu_to_le32(cmd_len);
+	cmd->body.sid = cpu_to_le32(res->id);
+	cmd->body.surfaceFlags = cpu_to_le32(srf->flags);
+	cmd->body.format = cpu_to_le32(srf->format);
+	for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i) {
+		cmd->body.face[i].numMipLevels =
+		    cpu_to_le32(srf->mip_levels[i]);
+	}
+
+	cmd += 1;
+	cmd_size = (SVGA3dSize *) cmd;
+	src_size = srf->sizes;
+
+	for (i = 0; i < srf->num_sizes; ++i, cmd_size++, src_size++) {
+		cmd_size->width = cpu_to_le32(src_size->width);
+		cmd_size->height = cpu_to_le32(src_size->height);
+		cmd_size->depth = cpu_to_le32(src_size->depth);
+	}
+
+	vmw_fifo_commit(dev_priv, submit_size);
+	vmw_resource_activate(res, vmw_hw_surface_destroy);
+	return 0;
+}
+
+static void vmw_user_surface_free(struct vmw_resource *res)
+{
+	struct vmw_surface *srf = container_of(res, struct vmw_surface, res);
+	struct vmw_user_surface *user_srf =
+	    container_of(srf, struct vmw_user_surface, srf);
+
+	kfree(srf->sizes);
+	kfree(srf->snooper.image);
+	kfree(user_srf);
+}
+
+int vmw_user_surface_lookup_handle(struct vmw_private *dev_priv,
+				   struct ttm_object_file *tfile,
+				   uint32_t handle, struct vmw_surface **out)
+{
+	struct vmw_resource *res;
+	struct vmw_surface *srf;
+	struct vmw_user_surface *user_srf;
+	struct ttm_base_object *base;
+	int ret = -EINVAL;
+
+	base = ttm_base_object_lookup(tfile, handle);
+	if (unlikely(base == NULL))
+		return -EINVAL;
+
+	if (unlikely(base->object_type != VMW_RES_SURFACE))
+		goto out_bad_resource;
+
+	user_srf = container_of(base, struct vmw_user_surface, base);
+	srf = &user_srf->srf;
+	res = &srf->res;
+
+	read_lock(&dev_priv->resource_lock);
+
+	if (!res->avail || res->res_free != &vmw_user_surface_free) {
+		read_unlock(&dev_priv->resource_lock);
+		goto out_bad_resource;
+	}
+
+	kref_get(&res->kref);
+	read_unlock(&dev_priv->resource_lock);
+
+	*out = srf;
+	ret = 0;
+
+out_bad_resource:
+	ttm_base_object_unref(&base);
+
+	return ret;
+}
+
+static void vmw_user_surface_base_release(struct ttm_base_object **p_base)
+{
+	struct ttm_base_object *base = *p_base;
+	struct vmw_user_surface *user_srf =
+	    container_of(base, struct vmw_user_surface, base);
+	struct vmw_resource *res = &user_srf->srf.res;
+
+	*p_base = NULL;
+	vmw_resource_unreference(&res);
+}
+
+int vmw_surface_destroy_ioctl(struct drm_device *dev, void *data,
+			      struct drm_file *file_priv)
+{
+	struct drm_vmw_surface_arg *arg = (struct drm_vmw_surface_arg *)data;
+	struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
+
+	return ttm_ref_object_base_unref(tfile, arg->sid, TTM_REF_USAGE);
+}
+
+int vmw_surface_define_ioctl(struct drm_device *dev, void *data,
+			     struct drm_file *file_priv)
+{
+	struct vmw_private *dev_priv = vmw_priv(dev);
+	struct vmw_user_surface *user_srf =
+	    kmalloc(sizeof(*user_srf), GFP_KERNEL);
+	struct vmw_surface *srf;
+	struct vmw_resource *res;
+	struct vmw_resource *tmp;
+	union drm_vmw_surface_create_arg *arg =
+	    (union drm_vmw_surface_create_arg *)data;
+	struct drm_vmw_surface_create_req *req = &arg->req;
+	struct drm_vmw_surface_arg *rep = &arg->rep;
+	struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
+	struct drm_vmw_size __user *user_sizes;
+	int ret;
+	int i;
+
+	if (unlikely(user_srf == NULL))
+		return -ENOMEM;
+
+	srf = &user_srf->srf;
+	res = &srf->res;
+
+	srf->flags = req->flags;
+	srf->format = req->format;
+	srf->scanout = req->scanout;
+	memcpy(srf->mip_levels, req->mip_levels, sizeof(srf->mip_levels));
+	srf->num_sizes = 0;
+	for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i)
+		srf->num_sizes += srf->mip_levels[i];
+
+	if (srf->num_sizes > DRM_VMW_MAX_SURFACE_FACES *
+	    DRM_VMW_MAX_MIP_LEVELS) {
+		ret = -EINVAL;
+		goto out_err0;
+	}
+
+	srf->sizes = kmalloc(srf->num_sizes * sizeof(*srf->sizes), GFP_KERNEL);
+	if (unlikely(srf->sizes == NULL)) {
+		ret = -ENOMEM;
+		goto out_err0;
+	}
+
+	user_sizes = (struct drm_vmw_size __user *)(unsigned long)
+	    req->size_addr;
+
+	ret = copy_from_user(srf->sizes, user_sizes,
+			     srf->num_sizes * sizeof(*srf->sizes));
+	if (unlikely(ret != 0))
+		goto out_err1;
+
+	if (srf->scanout &&
+	    srf->num_sizes == 1 &&
+	    srf->sizes[0].width == 64 &&
+	    srf->sizes[0].height == 64 &&
+	    srf->format == SVGA3D_A8R8G8B8) {
+
+		srf->snooper.image = kmalloc(64 * 64 * 4, GFP_KERNEL);
+		/* clear the image */
+		if (srf->snooper.image) {
+			memset(srf->snooper.image, 0x00, 64 * 64 * 4);
+		} else {
+			DRM_ERROR("Failed to allocate cursor_image\n");
+			ret = -ENOMEM;
+			goto out_err1;
+		}
+	} else {
+		srf->snooper.image = NULL;
+	}
+	srf->snooper.crtc = NULL;
+
+	user_srf->base.shareable = false;
+	user_srf->base.tfile = NULL;
+
+	/**
+	 * From this point, the generic resource management functions
+	 * destroy the object on failure.
+	 */
+
+	ret = vmw_surface_init(dev_priv, srf, vmw_user_surface_free);
+	if (unlikely(ret != 0))
+		return ret;
+
+	tmp = vmw_resource_reference(&srf->res);
+	ret = ttm_base_object_init(tfile, &user_srf->base,
+				   req->shareable, VMW_RES_SURFACE,
+				   &vmw_user_surface_base_release, NULL);
+
+	if (unlikely(ret != 0)) {
+		vmw_resource_unreference(&tmp);
+		vmw_resource_unreference(&res);
+		return ret;
+	}
+
+	rep->sid = user_srf->base.hash.key;
+	if (rep->sid == SVGA3D_INVALID_ID)
+		DRM_ERROR("Created bad Surface ID.\n");
+
+	vmw_resource_unreference(&res);
+	return 0;
+out_err1:
+	kfree(srf->sizes);
+out_err0:
+	kfree(user_srf);
+	return ret;
+}
+
+int vmw_surface_reference_ioctl(struct drm_device *dev, void *data,
+				struct drm_file *file_priv)
+{
+	union drm_vmw_surface_reference_arg *arg =
+	    (union drm_vmw_surface_reference_arg *)data;
+	struct drm_vmw_surface_arg *req = &arg->req;
+	struct drm_vmw_surface_create_req *rep = &arg->rep;
+	struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
+	struct vmw_surface *srf;
+	struct vmw_user_surface *user_srf;
+	struct drm_vmw_size __user *user_sizes;
+	struct ttm_base_object *base;
+	int ret = -EINVAL;
+
+	base = ttm_base_object_lookup(tfile, req->sid);
+	if (unlikely(base == NULL)) {
+		DRM_ERROR("Could not find surface to reference.\n");
+		return -EINVAL;
+	}
+
+	if (unlikely(base->object_type != VMW_RES_SURFACE))
+		goto out_bad_resource;
+
+	user_srf = container_of(base, struct vmw_user_surface, base);
+	srf = &user_srf->srf;
+
+	ret = ttm_ref_object_add(tfile, &user_srf->base, TTM_REF_USAGE, NULL);
+	if (unlikely(ret != 0)) {
+		DRM_ERROR("Could not add a reference to a surface.\n");
+		goto out_no_reference;
+	}
+
+	rep->flags = srf->flags;
+	rep->format = srf->format;
+	memcpy(rep->mip_levels, srf->mip_levels, sizeof(srf->mip_levels));
+	user_sizes = (struct drm_vmw_size __user *)(unsigned long)
+	    rep->size_addr;
+
+	if (user_sizes)
+		ret = copy_to_user(user_sizes, srf->sizes,
+				   srf->num_sizes * sizeof(*srf->sizes));
+	if (unlikely(ret != 0))
+		DRM_ERROR("copy_to_user failed %p %u\n",
+			  user_sizes, srf->num_sizes);
+out_bad_resource:
+out_no_reference:
+	ttm_base_object_unref(&base);
+
+	return ret;
+}
+
+int vmw_surface_check(struct vmw_private *dev_priv,
+		      struct ttm_object_file *tfile,
+		      uint32_t handle, int *id)
+{
+	struct ttm_base_object *base;
+	struct vmw_user_surface *user_srf;
+
+	int ret = -EPERM;
+
+	base = ttm_base_object_lookup(tfile, handle);
+	if (unlikely(base == NULL))
+		return -EINVAL;
+
+	if (unlikely(base->object_type != VMW_RES_SURFACE))
+		goto out_bad_surface;
+
+	user_srf = container_of(base, struct vmw_user_surface, base);
+	*id = user_srf->srf.res.id;
+	ret = 0;
+
+out_bad_surface:
+	/**
+	 * FIXME: May deadlock here when called from the
+	 * command parsing code.
+	 */
+
+	ttm_base_object_unref(&base);
+	return ret;
+}
+
+/**
+ * Buffer management.
+ */
+
+static size_t vmw_dmabuf_acc_size(struct ttm_bo_global *glob,
+				  unsigned long num_pages)
+{
+	static size_t bo_user_size = ~0;
+
+	size_t page_array_size =
+	    (num_pages * sizeof(void *) + PAGE_SIZE - 1) & PAGE_MASK;
+
+	if (unlikely(bo_user_size == ~0)) {
+		bo_user_size = glob->ttm_bo_extra_size +
+		    ttm_round_pot(sizeof(struct vmw_dma_buffer));
+	}
+
+	return bo_user_size + page_array_size;
+}
+
+void vmw_dmabuf_gmr_unbind(struct ttm_buffer_object *bo)
+{
+	struct vmw_dma_buffer *vmw_bo = vmw_dma_buffer(bo);
+	struct ttm_bo_global *glob = bo->glob;
+	struct vmw_private *dev_priv =
+		container_of(bo->bdev, struct vmw_private, bdev);
+
+	if (vmw_bo->gmr_bound) {
+		vmw_gmr_unbind(dev_priv, vmw_bo->gmr_id);
+		spin_lock(&glob->lru_lock);
+		ida_remove(&dev_priv->gmr_ida, vmw_bo->gmr_id);
+		spin_unlock(&glob->lru_lock);
+		vmw_bo->gmr_bound = false;
+	}
+}
+
+void vmw_dmabuf_bo_free(struct ttm_buffer_object *bo)
+{
+	struct vmw_dma_buffer *vmw_bo = vmw_dma_buffer(bo);
+	struct ttm_bo_global *glob = bo->glob;
+
+	vmw_dmabuf_gmr_unbind(bo);
+	ttm_mem_global_free(glob->mem_glob, bo->acc_size);
+	kfree(vmw_bo);
+}
+
+int vmw_dmabuf_init(struct vmw_private *dev_priv,
+		    struct vmw_dma_buffer *vmw_bo,
+		    size_t size, struct ttm_placement *placement,
+		    bool interruptible,
+		    void (*bo_free) (struct ttm_buffer_object *bo))
+{
+	struct ttm_bo_device *bdev = &dev_priv->bdev;
+	struct ttm_mem_global *mem_glob = bdev->glob->mem_glob;
+	size_t acc_size;
+	int ret;
+
+	BUG_ON(!bo_free);
+
+	acc_size =
+	    vmw_dmabuf_acc_size(bdev->glob,
+				(size + PAGE_SIZE - 1) >> PAGE_SHIFT);
+
+	ret = ttm_mem_global_alloc(mem_glob, acc_size, false, false);
+	if (unlikely(ret != 0)) {
+		/* we must free the bo here as
+		 * ttm_buffer_object_init does so as well */
+		bo_free(&vmw_bo->base);
+		return ret;
+	}
+
+	memset(vmw_bo, 0, sizeof(*vmw_bo));
+
+	INIT_LIST_HEAD(&vmw_bo->gmr_lru);
+	INIT_LIST_HEAD(&vmw_bo->validate_list);
+	vmw_bo->gmr_id = 0;
+	vmw_bo->gmr_bound = false;
+
+	ret = ttm_bo_init(bdev, &vmw_bo->base, size,
+			  ttm_bo_type_device, placement,
+			  0, 0, interruptible,
+			  NULL, acc_size, bo_free);
+	return ret;
+}
+
+static void vmw_user_dmabuf_destroy(struct ttm_buffer_object *bo)
+{
+	struct vmw_user_dma_buffer *vmw_user_bo = vmw_user_dma_buffer(bo);
+	struct ttm_bo_global *glob = bo->glob;
+
+	vmw_dmabuf_gmr_unbind(bo);
+	ttm_mem_global_free(glob->mem_glob, bo->acc_size);
+	kfree(vmw_user_bo);
+}
+
+static void vmw_user_dmabuf_release(struct ttm_base_object **p_base)
+{
+	struct vmw_user_dma_buffer *vmw_user_bo;
+	struct ttm_base_object *base = *p_base;
+	struct ttm_buffer_object *bo;
+
+	*p_base = NULL;
+
+	if (unlikely(base == NULL))
+		return;
+
+	vmw_user_bo = container_of(base, struct vmw_user_dma_buffer, base);
+	bo = &vmw_user_bo->dma.base;
+	ttm_bo_unref(&bo);
+}
+
+int vmw_dmabuf_alloc_ioctl(struct drm_device *dev, void *data,
+			   struct drm_file *file_priv)
+{
+	struct vmw_private *dev_priv = vmw_priv(dev);
+	union drm_vmw_alloc_dmabuf_arg *arg =
+	    (union drm_vmw_alloc_dmabuf_arg *)data;
+	struct drm_vmw_alloc_dmabuf_req *req = &arg->req;
+	struct drm_vmw_dmabuf_rep *rep = &arg->rep;
+	struct vmw_user_dma_buffer *vmw_user_bo;
+	struct ttm_buffer_object *tmp;
+	struct vmw_master *vmaster = vmw_master(file_priv->master);
+	int ret;
+
+	vmw_user_bo = kzalloc(sizeof(*vmw_user_bo), GFP_KERNEL);
+	if (unlikely(vmw_user_bo == NULL))
+		return -ENOMEM;
+
+	ret = ttm_read_lock(&vmaster->lock, true);
+	if (unlikely(ret != 0)) {
+		kfree(vmw_user_bo);
+		return ret;
+	}
+
+	ret = vmw_dmabuf_init(dev_priv, &vmw_user_bo->dma, req->size,
+			      &vmw_vram_sys_placement, true,
+			      &vmw_user_dmabuf_destroy);
+	if (unlikely(ret != 0))
+		return ret;
+
+	tmp = ttm_bo_reference(&vmw_user_bo->dma.base);
+	ret = ttm_base_object_init(vmw_fpriv(file_priv)->tfile,
+				   &vmw_user_bo->base,
+				   false,
+				   ttm_buffer_type,
+				   &vmw_user_dmabuf_release, NULL);
+	if (unlikely(ret != 0)) {
+		ttm_bo_unref(&tmp);
+	} else {
+		rep->handle = vmw_user_bo->base.hash.key;
+		rep->map_handle = vmw_user_bo->dma.base.addr_space_offset;
+		rep->cur_gmr_id = vmw_user_bo->base.hash.key;
+		rep->cur_gmr_offset = 0;
+	}
+	ttm_bo_unref(&tmp);
+
+	ttm_read_unlock(&vmaster->lock);
+
+	return 0;
+}
+
+int vmw_dmabuf_unref_ioctl(struct drm_device *dev, void *data,
+			   struct drm_file *file_priv)
+{
+	struct drm_vmw_unref_dmabuf_arg *arg =
+	    (struct drm_vmw_unref_dmabuf_arg *)data;
+
+	return ttm_ref_object_base_unref(vmw_fpriv(file_priv)->tfile,
+					 arg->handle,
+					 TTM_REF_USAGE);
+}
+
+uint32_t vmw_dmabuf_validate_node(struct ttm_buffer_object *bo,
+				  uint32_t cur_validate_node)
+{
+	struct vmw_dma_buffer *vmw_bo = vmw_dma_buffer(bo);
+
+	if (likely(vmw_bo->on_validate_list))
+		return vmw_bo->cur_validate_node;
+
+	vmw_bo->cur_validate_node = cur_validate_node;
+	vmw_bo->on_validate_list = true;
+
+	return cur_validate_node;
+}
+
+void vmw_dmabuf_validate_clear(struct ttm_buffer_object *bo)
+{
+	struct vmw_dma_buffer *vmw_bo = vmw_dma_buffer(bo);
+
+	vmw_bo->on_validate_list = false;
+}
+
+uint32_t vmw_dmabuf_gmr(struct ttm_buffer_object *bo)
+{
+	struct vmw_dma_buffer *vmw_bo;
+
+	if (bo->mem.mem_type == TTM_PL_VRAM)
+		return SVGA_GMR_FRAMEBUFFER;
+
+	vmw_bo = vmw_dma_buffer(bo);
+
+	return (vmw_bo->gmr_bound) ? vmw_bo->gmr_id : SVGA_GMR_NULL;
+}
+
+void vmw_dmabuf_set_gmr(struct ttm_buffer_object *bo, uint32_t id)
+{
+	struct vmw_dma_buffer *vmw_bo = vmw_dma_buffer(bo);
+	vmw_bo->gmr_bound = true;
+	vmw_bo->gmr_id = id;
+}
+
+int vmw_user_dmabuf_lookup(struct ttm_object_file *tfile,
+			   uint32_t handle, struct vmw_dma_buffer **out)
+{
+	struct vmw_user_dma_buffer *vmw_user_bo;
+	struct ttm_base_object *base;
+
+	base = ttm_base_object_lookup(tfile, handle);
+	if (unlikely(base == NULL)) {
+		printk(KERN_ERR "Invalid buffer object handle 0x%08lx.\n",
+		       (unsigned long)handle);
+		return -ESRCH;
+	}
+
+	if (unlikely(base->object_type != ttm_buffer_type)) {
+		ttm_base_object_unref(&base);
+		printk(KERN_ERR "Invalid buffer object handle 0x%08lx.\n",
+		       (unsigned long)handle);
+		return -EINVAL;
+	}
+
+	vmw_user_bo = container_of(base, struct vmw_user_dma_buffer, base);
+	(void)ttm_bo_reference(&vmw_user_bo->dma.base);
+	ttm_base_object_unref(&base);
+	*out = &vmw_user_bo->dma;
+
+	return 0;
+}
+
+/**
+ * TODO: Implement a gmr id eviction mechanism. Currently we just fail
+ * when we're out of ids, causing GMR space to be allocated
+ * out of VRAM.
+ */
+
+int vmw_gmr_id_alloc(struct vmw_private *dev_priv, uint32_t *p_id)
+{
+	struct ttm_bo_global *glob = dev_priv->bdev.glob;
+	int id;
+	int ret;
+
+	do {
+		if (unlikely(ida_pre_get(&dev_priv->gmr_ida, GFP_KERNEL) == 0))
+			return -ENOMEM;
+
+		spin_lock(&glob->lru_lock);
+		ret = ida_get_new(&dev_priv->gmr_ida, &id);
+		spin_unlock(&glob->lru_lock);
+	} while (ret == -EAGAIN);
+
+	if (unlikely(ret != 0))
+		return ret;
+
+	if (unlikely(id >= dev_priv->max_gmr_ids)) {
+		spin_lock(&glob->lru_lock);
+		ida_remove(&dev_priv->gmr_ida, id);
+		spin_unlock(&glob->lru_lock);
+		return -EBUSY;
+	}
+
+	*p_id = (uint32_t) id;
+	return 0;
+}
+
+/*
+ * Stream managment
+ */
+
+static void vmw_stream_destroy(struct vmw_resource *res)
+{
+	struct vmw_private *dev_priv = res->dev_priv;
+	struct vmw_stream *stream;
+	int ret;
+
+	DRM_INFO("%s: unref\n", __func__);
+	stream = container_of(res, struct vmw_stream, res);
+
+	ret = vmw_overlay_unref(dev_priv, stream->stream_id);
+	WARN_ON(ret != 0);
+}
+
+static int vmw_stream_init(struct vmw_private *dev_priv,
+			   struct vmw_stream *stream,
+			   void (*res_free) (struct vmw_resource *res))
+{
+	struct vmw_resource *res = &stream->res;
+	int ret;
+
+	ret = vmw_resource_init(dev_priv, res, &dev_priv->stream_idr,
+				VMW_RES_STREAM, res_free);
+
+	if (unlikely(ret != 0)) {
+		if (res_free == NULL)
+			kfree(stream);
+		else
+			res_free(&stream->res);
+		return ret;
+	}
+
+	ret = vmw_overlay_claim(dev_priv, &stream->stream_id);
+	if (ret) {
+		vmw_resource_unreference(&res);
+		return ret;
+	}
+
+	DRM_INFO("%s: claimed\n", __func__);
+
+	vmw_resource_activate(&stream->res, vmw_stream_destroy);
+	return 0;
+}
+
+/**
+ * User-space context management:
+ */
+
+static void vmw_user_stream_free(struct vmw_resource *res)
+{
+	struct vmw_user_stream *stream =
+	    container_of(res, struct vmw_user_stream, stream.res);
+
+	kfree(stream);
+}
+
+/**
+ * This function is called when user space has no more references on the
+ * base object. It releases the base-object's reference on the resource object.
+ */
+
+static void vmw_user_stream_base_release(struct ttm_base_object **p_base)
+{
+	struct ttm_base_object *base = *p_base;
+	struct vmw_user_stream *stream =
+	    container_of(base, struct vmw_user_stream, base);
+	struct vmw_resource *res = &stream->stream.res;
+
+	*p_base = NULL;
+	vmw_resource_unreference(&res);
+}
+
+int vmw_stream_unref_ioctl(struct drm_device *dev, void *data,
+			   struct drm_file *file_priv)
+{
+	struct vmw_private *dev_priv = vmw_priv(dev);
+	struct vmw_resource *res;
+	struct vmw_user_stream *stream;
+	struct drm_vmw_stream_arg *arg = (struct drm_vmw_stream_arg *)data;
+	struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
+	int ret = 0;
+
+	res = vmw_resource_lookup(dev_priv, &dev_priv->stream_idr, arg->stream_id);
+	if (unlikely(res == NULL))
+		return -EINVAL;
+
+	if (res->res_free != &vmw_user_stream_free) {
+		ret = -EINVAL;
+		goto out;
+	}
+
+	stream = container_of(res, struct vmw_user_stream, stream.res);
+	if (stream->base.tfile != tfile) {
+		ret = -EINVAL;
+		goto out;
+	}
+
+	ttm_ref_object_base_unref(tfile, stream->base.hash.key, TTM_REF_USAGE);
+out:
+	vmw_resource_unreference(&res);
+	return ret;
+}
+
+int vmw_stream_claim_ioctl(struct drm_device *dev, void *data,
+			   struct drm_file *file_priv)
+{
+	struct vmw_private *dev_priv = vmw_priv(dev);
+	struct vmw_user_stream *stream = kmalloc(sizeof(*stream), GFP_KERNEL);
+	struct vmw_resource *res;
+	struct vmw_resource *tmp;
+	struct drm_vmw_stream_arg *arg = (struct drm_vmw_stream_arg *)data;
+	struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
+	int ret;
+
+	if (unlikely(stream == NULL))
+		return -ENOMEM;
+
+	res = &stream->stream.res;
+	stream->base.shareable = false;
+	stream->base.tfile = NULL;
+
+	ret = vmw_stream_init(dev_priv, &stream->stream, vmw_user_stream_free);
+	if (unlikely(ret != 0))
+		return ret;
+
+	tmp = vmw_resource_reference(res);
+	ret = ttm_base_object_init(tfile, &stream->base, false, VMW_RES_STREAM,
+				   &vmw_user_stream_base_release, NULL);
+
+	if (unlikely(ret != 0)) {
+		vmw_resource_unreference(&tmp);
+		goto out_err;
+	}
+
+	arg->stream_id = res->id;
+out_err:
+	vmw_resource_unreference(&res);
+	return ret;
+}
+
+int vmw_user_stream_lookup(struct vmw_private *dev_priv,
+			   struct ttm_object_file *tfile,
+			   uint32_t *inout_id, struct vmw_resource **out)
+{
+	struct vmw_user_stream *stream;
+	struct vmw_resource *res;
+	int ret;
+
+	res = vmw_resource_lookup(dev_priv, &dev_priv->stream_idr, *inout_id);
+	if (unlikely(res == NULL))
+		return -EINVAL;
+
+	if (res->res_free != &vmw_user_stream_free) {
+		ret = -EINVAL;
+		goto err_ref;
+	}
+
+	stream = container_of(res, struct vmw_user_stream, stream.res);
+	if (stream->base.tfile != tfile) {
+		ret = -EPERM;
+		goto err_ref;
+	}
+
+	*inout_id = stream->stream.stream_id;
+	*out = res;
+	return 0;
+err_ref:
+	vmw_resource_unreference(&res);
+	return ret;
+}
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/vmwgfx/svga_escape.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/vmwgfx/svga_escape.h
@@ -0,0 +1,89 @@
+/**********************************************************
+ * Copyright 2007-2009 VMware, Inc.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ **********************************************************/
+
+/*
+ * svga_escape.h --
+ *
+ *    Definitions for our own (vendor-specific) SVGA Escape commands.
+ */
+
+#ifndef _SVGA_ESCAPE_H_
+#define _SVGA_ESCAPE_H_
+
+
+/*
+ * Namespace IDs for the escape command
+ */
+
+#define SVGA_ESCAPE_NSID_VMWARE 0x00000000
+#define SVGA_ESCAPE_NSID_DEVEL  0xFFFFFFFF
+
+
+/*
+ * Within SVGA_ESCAPE_NSID_VMWARE, we multiplex commands according to
+ * the first DWORD of escape data (after the nsID and size). As a
+ * guideline we're using the high word and low word as a major and
+ * minor command number, respectively.
+ *
+ * Major command number allocation:
+ *
+ *   0000: Reserved
+ *   0001: SVGA_ESCAPE_VMWARE_LOG (svga_binary_logger.h)
+ *   0002: SVGA_ESCAPE_VMWARE_VIDEO (svga_overlay.h)
+ *   0003: SVGA_ESCAPE_VMWARE_HINT (svga_escape.h)
+ */
+
+#define SVGA_ESCAPE_VMWARE_MAJOR_MASK  0xFFFF0000
+
+
+/*
+ * SVGA Hint commands.
+ *
+ * These escapes let the SVGA driver provide optional information to
+ * he host about the state of the guest or guest applications. The
+ * host can use these hints to make user interface or performance
+ * decisions.
+ *
+ * Notes:
+ *
+ *   - SVGA_ESCAPE_VMWARE_HINT_FULLSCREEN is deprecated for guests
+ *     that use the SVGA Screen Object extension. Instead of sending
+ *     this escape, use the SVGA_SCREEN_FULLSCREEN_HINT flag on your
+ *     Screen Object.
+ */
+
+#define SVGA_ESCAPE_VMWARE_HINT               0x00030000
+#define SVGA_ESCAPE_VMWARE_HINT_FULLSCREEN    0x00030001  // Deprecated
+
+typedef
+struct {
+   uint32 command;
+   uint32 fullscreen;
+   struct {
+      int32 x, y;
+   } monitorPosition;
+} SVGAEscapeHintFullscreen;
+
+#endif /* _SVGA_ESCAPE_H_ */
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/vmwgfx/svga_types.h
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/vmwgfx/svga_types.h
@@ -0,0 +1,45 @@
+/**************************************************************************
+ *
+ * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **************************************************************************/
+
+/**
+ * Silly typedefs for the svga headers. Currently the headers are shared
+ * between all components that talk to svga. And as such the headers are
+ * are in a completely different style and use weird defines.
+ *
+ * This file lets all the ugly be prefixed with svga*.
+ */
+
+#ifndef _SVGA_TYPES_H_
+#define _SVGA_TYPES_H_
+
+typedef uint16_t uint16;
+typedef uint32_t uint32;
+typedef uint8_t uint8;
+typedef int32_t int32;
+typedef bool Bool;
+
+#endif
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/sis/sis_drv.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/sis/sis_drv.c
@@ -80,7 +80,7 @@
 		 .owner = THIS_MODULE,
 		 .open = drm_open,
 		 .release = drm_release,
-		 .ioctl = drm_ioctl,
+		 .unlocked_ioctl = drm_ioctl,
 		 .mmap = drm_mmap,
 		 .poll = drm_poll,
 		 .fasync = drm_fasync,
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i810/i810_dma.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i810/i810_dma.c
@@ -115,7 +115,7 @@
 static const struct file_operations i810_buffer_fops = {
 	.open = drm_open,
 	.release = drm_release,
-	.ioctl = drm_ioctl,
+	.unlocked_ioctl = drm_ioctl,
 	.mmap = i810_mmap_buffers,
 	.fasync = drm_fasync,
 };
--- linux-mvl-dove-2.6.32.orig/drivers/gpu/drm/i810/i810_drv.c
+++ linux-mvl-dove-2.6.32/drivers/gpu/drm/i810/i810_drv.c
@@ -59,7 +59,7 @@
 		 .owner = THIS_MODULE,
 		 .open = drm_open,
 		 .release = drm_release,
-		 .ioctl = drm_ioctl,
+		 .unlocked_ioctl = drm_ioctl,
 		 .mmap = drm_mmap,
 		 .poll = drm_poll,
 		 .fasync = drm_fasync,
--- linux-mvl-dove-2.6.32.orig/drivers/media/common/tuners/mxl5007t.c
+++ linux-mvl-dove-2.6.32/drivers/media/common/tuners/mxl5007t.c
@@ -196,7 +196,7 @@
 	i = j = 0;
 
 	while (reg_pair1[i].reg || reg_pair1[i].val) {
-		while (reg_pair2[j].reg || reg_pair2[j].reg) {
+		while (reg_pair2[j].reg || reg_pair2[j].val) {
 			if (reg_pair1[i].reg != reg_pair2[j].reg) {
 				j++;
 				continue;
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/cafe_ccic-regs.h
+++ linux-mvl-dove-2.6.32/drivers/media/video/cafe_ccic-regs.h
@@ -120,7 +120,7 @@
 #define   TWSIC0_EN       0x00000001	/* TWSI enable */
 #define   TWSIC0_MODE	  0x00000002	/* 1 = 16-bit, 0 = 8-bit */
 #define   TWSIC0_SID	  0x000003fc	/* Slave ID */
-#define   TWSIC0_SID_SHIFT 2
+#define   TWSIC0_SID_SHIFT 3
 #define   TWSIC0_CLKDIV   0x0007fc00	/* Clock divider */
 #define   TWSIC0_MASKACK  0x00400000	/* Mask ack from sensor */
 #define   TWSIC0_OVMAGIC  0x00800000	/* Make it work on OV sensors */
@@ -134,9 +134,10 @@
 #define   TWSIC1_RVALID	  0x04000000	/* Read data valid */
 #define   TWSIC1_ERROR	  0x08000000	/* Something screwed up */
 
-
+/* The following register exist in pci devices only */
 #define REG_UBAR	0xc4	/* Upper base address register */
 
+
 /*
  * Here's the weird global control registers which are said to live
  * way up here.
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/cafe_ccic.c
+++ linux-mvl-dove-2.6.32/drivers/media/video/cafe_ccic.c
@@ -20,7 +20,7 @@
  * This file may be distributed under the terms of the GNU General
  * Public License, version 2.
  */
-
+#define DEBUG
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/init.h>
@@ -30,11 +30,14 @@
 #include <linux/i2c.h>
 #include <linux/interrupt.h>
 #include <linux/spinlock.h>
+#include <linux/clk.h>
 #include <linux/videodev2.h>
 #include <media/v4l2-device.h>
 #include <media/v4l2-ioctl.h>
 #include <media/v4l2-chip-ident.h>
 #include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
 #include <linux/wait.h>
 #include <linux/list.h>
 #include <linux/dma-mapping.h>
@@ -42,19 +45,25 @@
 #include <linux/jiffies.h>
 #include <linux/vmalloc.h>
 
+#include <plat/cafe-orion.h>
 #include <asm/uaccess.h>
 #include <asm/io.h>
 
 #include "cafe_ccic-regs.h"
 
-#define CAFE_VERSION 0x000002
+#ifdef CONFIG_VIDEO_ADV_DEBUG
+#include <linux/debugfs.h>
+#endif
+
+#define DRV_NAME "cafe1000-ccic"
+#define CAFE_VERSION 0x000004
 
 
 /*
  * Parameters.
  */
 MODULE_AUTHOR("Jonathan Corbet <corbet@lwn.net>");
-MODULE_DESCRIPTION("Marvell 88ALP01 CMOS Camera Controller driver");
+MODULE_DESCRIPTION("Marvell Cafe CMOS Camera Controller driver");
 MODULE_LICENSE("GPL");
 MODULE_SUPPORTED_DEVICE("Video");
 
@@ -151,6 +160,7 @@
 	 * Subsystem structures.
 	 */
 	struct pci_dev *pdev;
+	struct device *dev;
 	struct video_device vdev;
 	struct i2c_adapter i2c_adapter;
 	struct v4l2_subdev *sensor;
@@ -187,6 +197,21 @@
 	/* Misc */
 	wait_queue_head_t smbus_wait;	/* Waiting on i2c events */
 	wait_queue_head_t iowait;	/* Waiting on frame data */
+
+#ifdef CONFIG_VIDEO_ADV_DEBUG
+	struct dentry *dfs_regs;
+	struct dentry *dfs_cam_regs;
+#endif
+
+#if defined(CONFIG_HAVE_CLK)
+	struct clk		*clk;
+#endif
+	unsigned int	powered_on;
+	/* Board info */
+	u32 power_down; /* value to set into GPR to power down the sensor*/
+	u32 reset;	/* value to set into GPR to reset the senser */
+	int numbered_i2c_bus;
+	unsigned int i2c_bus_id;
 };
 
 /*
@@ -240,11 +265,13 @@
  * Debugging and related.
  */
 #define cam_err(cam, fmt, arg...) \
-	dev_err(&(cam)->pdev->dev, fmt, ##arg);
+	dev_err((cam)->dev, fmt, ##arg);
 #define cam_warn(cam, fmt, arg...) \
-	dev_warn(&(cam)->pdev->dev, fmt, ##arg);
+	dev_warn((cam)->dev, fmt, ##arg);
+#define cam_notice(cam, fmt, arg...) \
+	dev_notice((cam)->dev, fmt, ##arg);
 #define cam_dbg(cam, fmt, arg...) \
-	dev_dbg(&(cam)->pdev->dev, fmt, ##arg);
+	dev_dbg((cam)->dev, fmt, ##arg);
 
 
 /* ---------------------------------------------------------------------*/
@@ -287,7 +314,8 @@
 }
 
 
-
+static void cafe_ctlr_power_up(struct cafe_camera *cam);
+static void cafe_ctlr_power_down(struct cafe_camera *cam);
 /* -------------------------------------------------------------------- */
 /*
  * The I2C/SMBUS interface to the camera itself starts here.  The
@@ -318,6 +346,7 @@
 {
 	unsigned int rval;
 	unsigned long flags;
+	int max_count = HZ;
 	DEFINE_WAIT(the_wait);
 
 	spin_lock_irqsave(&cam->dev_lock, flags);
@@ -326,7 +355,9 @@
 	/*
 	 * Marvell sez set clkdiv to all 1's for now.
 	 */
+	
 	rval |= TWSIC0_CLKDIV;
+
 	cafe_reg_write(cam, REG_TWSIC0, rval);
 	(void) cafe_reg_read(cam, REG_TWSIC1); /* force write */
 	rval = value | ((command << TWSIC1_ADDR_SHIFT) & TWSIC1_ADDR);
@@ -349,6 +380,13 @@
 				TASK_UNINTERRUPTIBLE);
 		schedule_timeout(1); /* even 1 jiffy is too long */
 		finish_wait(&cam->smbus_wait, &the_wait);
+#if 1
+		if(max_count-- <= 0) {
+			cam_err(cam, "SMBUS write (%02x/%02x/%02x) timed out\n", addr,
+				command, value);
+			return -EIO;
+		}
+#endif
 	} while (!cafe_smbus_write_done(cam));
 
 #ifdef IF_THE_CAFE_HARDWARE_WORKED_RIGHT
@@ -398,6 +436,8 @@
 {
 	unsigned int rval;
 	unsigned long flags;
+	int max_count = HZ;
+	DEFINE_WAIT(the_wait);
 
 	spin_lock_irqsave(&cam->dev_lock, flags);
 	rval = TWSIC0_EN | ((addr << TWSIC0_SID_SHIFT) & TWSIC0_SID);
@@ -406,14 +446,31 @@
 	 * Marvel sez set clkdiv to all 1's for now.
 	 */
 	rval |= TWSIC0_CLKDIV;
+
 	cafe_reg_write(cam, REG_TWSIC0, rval);
 	(void) cafe_reg_read(cam, REG_TWSIC1); /* force write */
 	rval = TWSIC1_READ | ((command << TWSIC1_ADDR_SHIFT) & TWSIC1_ADDR);
 	cafe_reg_write(cam, REG_TWSIC1, rval);
 	spin_unlock_irqrestore(&cam->dev_lock, flags);
 
+	do {
+		prepare_to_wait(&cam->smbus_wait, &the_wait,
+				TASK_UNINTERRUPTIBLE);
+		schedule_timeout(1); /* even 1 jiffy is too long */
+		finish_wait(&cam->smbus_wait, &the_wait);
+#if 1
+		if(max_count-- <= 0) {
+			cam_err(cam, "SMBUS read (%02x/%02x) timed out\n", addr,
+				command);
+			return -EIO;
+		}
+#endif
+	} while (!cafe_smbus_read_done(cam));
+
+#ifdef IF_THE_CAFE_HARDWARE_WORKED_RIGHT
 	wait_event_timeout(cam->smbus_wait,
 			cafe_smbus_read_done(cam), CAFE_SMBUS_TIMEOUT);
+#endif
 	spin_lock_irqsave(&cam->dev_lock, flags);
 	rval = cafe_reg_read(cam, REG_TWSIC1);
 	spin_unlock_irqrestore(&cam->dev_lock, flags);
@@ -442,6 +499,7 @@
 	struct v4l2_device *v4l2_dev = i2c_get_adapdata(adapter);
 	struct cafe_camera *cam = to_cam(v4l2_dev);
 	int ret = -EINVAL;
+	int power_off = 0;
 
 	/*
 	 * This interface would appear to only do byte data ops.  OK
@@ -451,11 +509,19 @@
 		cam_err(cam, "funky xfer size %d\n", size);
 		return -EINVAL;
 	}
+	if (cam->powered_on == 0) {
+		cafe_ctlr_power_up(cam);
+		power_off = 1;
+	}
 
 	if (rw == I2C_SMBUS_WRITE)
 		ret = cafe_smbus_write_data(cam, addr, command, data->byte);
 	else if (rw == I2C_SMBUS_READ)
 		ret = cafe_smbus_read_data(cam, addr, command, &data->byte);
+
+	if (power_off)
+		cafe_ctlr_power_down(cam);
+
 	return ret;
 }
 
@@ -493,9 +559,15 @@
 	adap->owner = THIS_MODULE;
 	adap->algo = &cafe_smbus_algo;
 	strcpy(adap->name, "cafe_ccic");
-	adap->dev.parent = &cam->pdev->dev;
+	adap->dev.parent = cam->dev;
 	i2c_set_adapdata(adap, &cam->v4l2_dev);
-	ret = i2c_add_adapter(adap);
+	
+	if(cam->numbered_i2c_bus == 0)
+		ret = i2c_add_adapter(adap);
+	else {
+		adap->nr = cam->i2c_bus_id;
+		ret = i2c_add_numbered_adapter(adap);
+	}
 	if (ret)
 		printk(KERN_ERR "Unable to register cafe i2c adapter\n");
 	return ret;
@@ -532,7 +604,9 @@
 	}
 	else
 		cafe_reg_set_bit(cam, REG_CTRL1, C1_TWOBUFS);
-	cafe_reg_write(cam, REG_UBAR, 0); /* 32 bits only for now */
+
+	if(cam->pdev)
+		cafe_reg_write(cam, REG_UBAR, 0); /* 32 bits only for now */
 }
 
 static void cafe_ctlr_image(struct cafe_camera *cam)
@@ -637,26 +711,31 @@
 	/*
 	 * Added magic to bring up the hardware on the B-Test board
 	 */
-	cafe_reg_write(cam, 0x3038, 0x8);
-	cafe_reg_write(cam, 0x315c, 0x80008);
-	/*
-	 * Go through the dance needed to wake the device up.
-	 * Note that these registers are global and shared
-	 * with the NAND and SD devices.  Interaction between the
-	 * three still needs to be examined.
-	 */
-	cafe_reg_write(cam, REG_GL_CSR, GCSR_SRS|GCSR_MRS); /* Needed? */
-	cafe_reg_write(cam, REG_GL_CSR, GCSR_SRC|GCSR_MRC);
-	cafe_reg_write(cam, REG_GL_CSR, GCSR_SRC|GCSR_MRS);
-	/*
-	 * Here we must wait a bit for the controller to come around.
-	 */
-	spin_unlock_irqrestore(&cam->dev_lock, flags);
-	msleep(5);
-	spin_lock_irqsave(&cam->dev_lock, flags);
 
-	cafe_reg_write(cam, REG_GL_CSR, GCSR_CCIC_EN|GCSR_SRC|GCSR_MRC);
-	cafe_reg_set_bit(cam, REG_GL_IMASK, GIMSK_CCIC_EN);
+	if(cam->pdev){
+		cafe_reg_write(cam, 0x3038, 0x8);
+		cafe_reg_write(cam, 0x315c, 0x80008);
+
+		/*
+		 * Go through the dance needed to wake the device up.
+		 * Note that these registers are global and shared
+		 * with the NAND and SD devices.  Interaction between the
+		 * three still needs to be examined.
+		 */
+		cafe_reg_write(cam, REG_GL_CSR, GCSR_SRS|GCSR_MRS); /* Needed?*/
+		cafe_reg_write(cam, REG_GL_CSR, GCSR_SRC|GCSR_MRC);
+		cafe_reg_write(cam, REG_GL_CSR, GCSR_SRC|GCSR_MRS);
+		/*
+		 * Here we must wait a bit for the controller to come around.
+		 */
+		spin_unlock_irqrestore(&cam->dev_lock, flags);
+		msleep(5);
+		spin_lock_irqsave(&cam->dev_lock, flags);
+		
+		cafe_reg_write(cam, REG_GL_CSR, GCSR_CCIC_EN|GCSR_SRC|GCSR_MRC);
+		cafe_reg_set_bit(cam, REG_GL_IMASK, GIMSK_CCIC_EN);
+	}
+
 	/*
 	 * Make sure it's not powered down.
 	 */
@@ -674,7 +753,14 @@
 	 * Clock the sensor appropriately.  Controller clock should
 	 * be 48MHz, sensor "typical" value is half that.
 	 */
-	cafe_reg_write_mask(cam, REG_CLKCTRL, 2, CLK_DIV_MASK);
+	if(cam->pdev)
+		cafe_reg_write_mask(cam, REG_CLKCTRL, 2, CLK_DIV_MASK);
+	else
+		/* core clock is 50, set div to 2 to have 25 MHz and 
+		 * the sensor will use its own PLL to get 12.5MHz 
+		 */
+		cafe_reg_write_mask(cam, REG_CLKCTRL, 2, CLK_DIV_MASK);
+	
 	spin_unlock_irqrestore(&cam->dev_lock, flags);
 }
 
@@ -720,8 +806,10 @@
 	 * Part one of the sensor dance: turn the global
 	 * GPIO signal on.
 	 */
-	cafe_reg_write(cam, REG_GL_FCR, GFCR_GPIO_ON);
-	cafe_reg_write(cam, REG_GL_GPIOR, GGPIO_OUT|GGPIO_VAL);
+	if(cam->pdev){
+		cafe_reg_write(cam, REG_GL_FCR, GFCR_GPIO_ON);
+		cafe_reg_write(cam, REG_GL_GPIOR, GGPIO_OUT|GGPIO_VAL);
+	}
 	/*
 	 * Put the sensor into operational mode (assumes OLPC-style
 	 * wiring).  Control 0 is reset - set to 1 to operate.
@@ -729,8 +817,9 @@
 	 */
 	cafe_reg_write(cam, REG_GPR, GPR_C1EN|GPR_C0EN); /* pwr up, reset */
 /*	mdelay(1); */ /* Marvell says 1ms will do it */
-	cafe_reg_write(cam, REG_GPR, GPR_C1EN|GPR_C0EN|GPR_C0);
+	cafe_reg_write(cam, REG_GPR, GPR_C1EN | GPR_C0EN | cam->reset);
 /*	mdelay(1); */ /* Enough? */
+	cam->powered_on = 1;
 	spin_unlock_irqrestore(&cam->dev_lock, flags);
 	msleep(5); /* Just to be sure */
 }
@@ -740,10 +829,14 @@
 	unsigned long flags;
 
 	spin_lock_irqsave(&cam->dev_lock, flags);
-	cafe_reg_write(cam, REG_GPR, GPR_C1EN|GPR_C0EN|GPR_C1);
-	cafe_reg_write(cam, REG_GL_FCR, GFCR_GPIO_ON);
-	cafe_reg_write(cam, REG_GL_GPIOR, GGPIO_OUT);
+
+	cafe_reg_write(cam, REG_GPR, GPR_C1EN | GPR_C0EN | cam->power_down);
+	if(cam->pdev){
+		cafe_reg_write(cam, REG_GL_FCR, GFCR_GPIO_ON);
+		cafe_reg_write(cam, REG_GL_GPIOR, GGPIO_OUT);
+	}
 	cafe_reg_set_bit(cam, REG_CTRL1, C1_PWRDWN);
+	cam->powered_on = 0;
 	spin_unlock_irqrestore(&cam->dev_lock, flags);
 }
 
@@ -780,7 +873,8 @@
 	if (ret)
 		goto out;
 	cam->sensor_type = chip.ident;
-	if (cam->sensor_type != V4L2_IDENT_OV7670) {
+	if ((cam->sensor_type != V4L2_IDENT_OV7670) && 
+	    (cam->sensor_type != V4L2_IDENT_OV7680)) {
 		cam_err(cam, "Unsupported sensor type 0x%x", cam->sensor_type);
 		ret = -EINVAL;
 		goto out;
@@ -814,7 +908,8 @@
 	struct v4l2_format fmt;
 	int ret;
 
-	if (cam->state != S_IDLE)
+	/* we need to configure the cam on resume when the state is S_STREAMING */
+	if (cam->state != S_IDLE && cam->state != S_STREAMING)
 		return -EINVAL;
 	fmt.fmt.pix = cam->pix_format;
 	ret = sensor_call(cam, core, init, 0);
@@ -850,7 +945,7 @@
 
 	cam->nbufs = 0;
 	for (i = 0; i < n_dma_bufs; i++) {
-		cam->dma_bufs[i] = dma_alloc_coherent(&cam->pdev->dev,
+		cam->dma_bufs[i] = dma_alloc_coherent(cam->dev,
 				cam->dma_buf_size, cam->dma_handles + i,
 				GFP_KERNEL);
 		if (cam->dma_bufs[i] == NULL) {
@@ -864,7 +959,7 @@
 
 	switch (cam->nbufs) {
 	case 1:
-	    dma_free_coherent(&cam->pdev->dev, cam->dma_buf_size,
+	    dma_free_coherent(cam->dev, cam->dma_buf_size,
 			    cam->dma_bufs[0], cam->dma_handles[0]);
 	    cam->nbufs = 0;
 	case 0:
@@ -884,7 +979,7 @@
 	int i;
 
 	for (i = 0; i < cam->nbufs; i++) {
-		dma_free_coherent(&cam->pdev->dev, cam->dma_buf_size,
+		dma_free_coherent(cam->dev, cam->dma_buf_size,
 				cam->dma_bufs[i], cam->dma_handles[i]);
 		cam->dma_bufs[i] = NULL;
 	}
@@ -1375,7 +1470,7 @@
 
 	filp->private_data = cam;
 
-	mutex_lock(&cam->s_mutex);
+//	mutex_lock(&cam->s_mutex);
 	if (cam->users == 0) {
 		cafe_ctlr_power_up(cam);
 		__cafe_cam_reset(cam);
@@ -1383,7 +1478,7 @@
 	/* FIXME make sure this is complete */
 	}
 	(cam->users)++;
-	mutex_unlock(&cam->s_mutex);
+//	mutex_unlock(&cam->s_mutex);
 	return 0;
 }
 
@@ -1886,12 +1981,170 @@
 
 
 /* -------------------------------------------------------------------------- */
+#ifdef CONFIG_VIDEO_ADV_DEBUG
 /*
- * PCI interface stuff.
+ * Debugfs stuff.
  */
 
-static int cafe_pci_probe(struct pci_dev *pdev,
-		const struct pci_device_id *id)
+static char cafe_debug_buf[1024];
+static struct dentry *cafe_dfs_root;
+
+static void cafe_dfs_setup(void)
+{
+	cafe_dfs_root = debugfs_create_dir("cafe_ccic", NULL);
+	if (IS_ERR(cafe_dfs_root)) {
+		cafe_dfs_root = NULL;  /* Never mind */
+		printk(KERN_NOTICE "cafe_ccic unable to set up debugfs\n");
+	}
+}
+
+static void cafe_dfs_shutdown(void)
+{
+	if (cafe_dfs_root)
+		debugfs_remove(cafe_dfs_root);
+}
+
+static int cafe_dfs_open(struct inode *inode, struct file *file)
+{
+	file->private_data = inode->i_private;
+	return 0;
+}
+
+static ssize_t cafe_dfs_read_regs(struct file *file,
+		char __user *buf, size_t count, loff_t *ppos)
+{
+	struct cafe_camera *cam = file->private_data;
+	char *s = cafe_debug_buf;
+	int offset;
+
+	for (offset = 0; offset < 0x44; offset += 4)
+		s += sprintf(s, "%02x: %08x\n", offset,
+				cafe_reg_read(cam, offset));
+	for (offset = 0x88; offset <= 0x90; offset += 4)
+		s += sprintf(s, "%02x: %08x\n", offset,
+				cafe_reg_read(cam, offset));
+	for (offset = 0xb4; offset <= 0xbc; offset += 4)
+		s += sprintf(s, "%02x: %08x\n", offset,
+				cafe_reg_read(cam, offset));
+#ifndef CONFIG_ARCH_DOVE
+	for (offset = 0x3000; offset <= 0x300c; offset += 4)
+		s += sprintf(s, "%04x: %08x\n", offset,
+				cafe_reg_read(cam, offset));
+#endif
+	return simple_read_from_buffer(buf, count, ppos, cafe_debug_buf,
+			s - cafe_debug_buf);
+}
+
+static const struct file_operations cafe_dfs_reg_ops = {
+	.owner = THIS_MODULE,
+	.read = cafe_dfs_read_regs,
+	.open = cafe_dfs_open
+};
+
+static ssize_t cafe_dfs_read_cam(struct file *file,
+		char __user *buf, size_t count, loff_t *ppos)
+{
+	struct cafe_camera *cam = file->private_data;
+	char *s = cafe_debug_buf;
+	int offset;
+
+	if (! cam->sensor)
+		return -EINVAL;
+
+	if (! cam->powered_on) {
+		s += sprintf(s, "Camera sensor is poewred down\n");
+	} else {
+		for (offset = 0x0; offset < 0xff; offset++)
+		{
+			u8 v;
+
+			cafe_smbus_read_data(cam, cam->sensor_addr, offset, &v);
+			s += sprintf(s, "%02x: %02x\n", offset, v);
+		}
+	}
+
+	return simple_read_from_buffer(buf, count, ppos, cafe_debug_buf,
+			s - cafe_debug_buf);
+}
+
+/**
+ *  @brief proc write function
+ *
+ *  @param file    file pointer
+ *  @param buf     pointer to data buffer
+ *  @param count   data number to write
+ *  @param data    data to write
+ *  @return 	   number of data
+ */
+static ssize_t cafe_dfs_write_cam(struct file *file, const char __user *buf,
+			    size_t count, loff_t *ppos)
+{
+	unsigned int offset, value;
+	char *pdata;
+	struct cafe_camera *cam = file->private_data;
+
+	pdata = (char *)kmalloc(count, GFP_KERNEL);
+	if (pdata == NULL)
+		return 0;
+
+	if (copy_from_user(pdata, buf, count)) {
+		cam_warn(cam, "Copy from user failed\n");
+		kfree(pdata);
+		return 0;
+	}
+
+	if (sscanf(pdata, "%x=%x", &offset, &value) != 2)
+		return 0;
+
+	cafe_smbus_write_data(cam, cam->sensor_addr, (offset & 0xFF), (value & 0xFF));
+
+	kfree(pdata);
+
+	return (ssize_t)count;
+}
+
+static const struct file_operations cafe_dfs_cam_ops = {
+	.owner = THIS_MODULE,
+	.read = cafe_dfs_read_cam,
+	.write = cafe_dfs_write_cam,
+	.open = cafe_dfs_open
+};
+
+
+
+static void cafe_dfs_cam_setup(struct cafe_camera *cam)
+{
+	char fname[40];
+
+	if (!cafe_dfs_root)
+		return;
+	sprintf(fname, "regs-%d", cam->vdev.minor);
+	cam->dfs_regs = debugfs_create_file(fname, 0444, cafe_dfs_root,
+			cam, &cafe_dfs_reg_ops);
+	sprintf(fname, "cam-%d", cam->vdev.minor);
+	cam->dfs_cam_regs = debugfs_create_file(fname, 0444, cafe_dfs_root,
+			cam, &cafe_dfs_cam_ops);
+}
+
+
+static void cafe_dfs_cam_shutdown(struct cafe_camera *cam)
+{
+	if (! IS_ERR(cam->dfs_regs))
+		debugfs_remove(cam->dfs_regs);
+	if (! IS_ERR(cam->dfs_cam_regs))
+		debugfs_remove(cam->dfs_cam_regs);
+}
+
+#else
+
+#define cafe_dfs_setup()
+#define cafe_dfs_shutdown()
+#define cafe_dfs_cam_setup(cam)
+#define cafe_dfs_cam_shutdown(cam)
+#endif    /* CONFIG_VIDEO_ADV_DEBUG */
+
+
+static struct cafe_camera *alloc_init_cam_struct(struct device *dev)
 {
 	int ret;
 	struct cafe_camera *cam;
@@ -1903,7 +2156,7 @@
 	cam = kzalloc(sizeof(struct cafe_camera), GFP_KERNEL);
 	if (cam == NULL)
 		goto out;
-	ret = v4l2_device_register(&pdev->dev, &cam->v4l2_dev);
+	ret = v4l2_device_register(dev, &cam->v4l2_dev);
 	if (ret)
 		goto out_free;
 
@@ -1914,29 +2167,24 @@
 	cafe_set_config_needed(cam, 1);
 	init_waitqueue_head(&cam->smbus_wait);
 	init_waitqueue_head(&cam->iowait);
-	cam->pdev = pdev;
+	cam->dev = dev;
 	cam->pix_format = cafe_def_pix_format;
 	INIT_LIST_HEAD(&cam->dev_list);
 	INIT_LIST_HEAD(&cam->sb_avail);
 	INIT_LIST_HEAD(&cam->sb_full);
 	tasklet_init(&cam->s_tasklet, cafe_frame_tasklet, (unsigned long) cam);
-	/*
-	 * Get set up on the PCI bus.
-	 */
-	ret = pci_enable_device(pdev);
-	if (ret)
-		goto out_unreg;
-	pci_set_master(pdev);
 
-	ret = -EIO;
-	cam->regs = pci_iomap(pdev, 0, 0);
-	if (! cam->regs) {
-		printk(KERN_ERR "Unable to ioremap cafe-ccic regs\n");
-		goto out_unreg;
-	}
-	ret = request_irq(pdev->irq, cafe_irq, IRQF_SHARED, "cafe-ccic", cam);
-	if (ret)
-		goto out_iounmap;
+	return cam;
+out_free:
+        kfree(cam);
+out:
+        return NULL;
+}
+
+static int cafe_init_cam(struct cafe_camera *cam)
+{
+	int ret;
+
 	/*
 	 * Initialize the controller and leave it powered up.  It will
 	 * stay that way until the sensor driver shows up.
@@ -1951,14 +2199,19 @@
 	mutex_unlock(&cam->s_mutex);  /* attach can deadlock */
 	ret = cafe_smbus_setup(cam);
 	if (ret)
-		goto out_freeirq;
+		goto out;
 
-	cam->sensor_addr = 0x42;
+	cam->sensor_addr = 0x21;
 	cam->sensor = v4l2_i2c_new_subdev(&cam->v4l2_dev, &cam->i2c_adapter,
 			"ov7670", "ov7670", cam->sensor_addr, NULL);
 	if (cam->sensor == NULL) {
-		ret = -ENODEV;
-		goto out_smbus;
+		cam->sensor = v4l2_i2c_new_subdev(&cam->v4l2_dev,
+				&cam->i2c_adapter, "ov7680", "ov7680",
+						  cam->sensor_addr, NULL);
+		if (cam->sensor == NULL) {
+			ret = -ENODEV;
+			goto out_smbus;
+		}
 	}
 	ret = cafe_cam_init(cam);
 	if (ret)
@@ -1986,31 +2239,29 @@
 					" will try again later.");
 	}
 
+#ifdef CONFIG_VIDEO_ADV_DEBUG
+	cafe_dfs_cam_setup(cam);
+#endif
 	mutex_unlock(&cam->s_mutex);
 	return 0;
 
 out_smbus:
-	cafe_smbus_shutdown(cam);
-out_freeirq:
-	cafe_ctlr_power_down(cam);
-	free_irq(pdev->irq, cam);
-out_iounmap:
-	pci_iounmap(pdev, cam->regs);
-out_free:
-	v4l2_device_unregister(&cam->v4l2_dev);
-out_unreg:
-	kfree(cam);
+	if (!cam->numbered_i2c_bus)
+		cafe_smbus_shutdown(cam);
 out:
+	cafe_ctlr_power_down(cam);
 	return ret;
 }
 
-
 /*
  * Shut down an initialized device
  */
 static void cafe_shutdown(struct cafe_camera *cam)
 {
 /* FIXME: Make sure we take care of everything here */
+#ifdef CONFIG_VIDEO_ADV_DEBUG
+	cafe_dfs_cam_shutdown(cam);
+#endif
 	if (cam->n_sbufs > 0)
 		/* What if they are still mapped?  Shouldn't be, but... */
 		cafe_free_sio_buffers(cam);
@@ -2018,21 +2269,12 @@
 	cafe_ctlr_power_down(cam);
 	cafe_smbus_shutdown(cam);
 	cafe_free_dma_bufs(cam);
-	free_irq(cam->pdev->irq, cam);
-	pci_iounmap(cam->pdev, cam->regs);
 	video_unregister_device(&cam->vdev);
 }
 
 
-static void cafe_pci_remove(struct pci_dev *pdev)
+static void cam_remove(struct cafe_camera *cam)
 {
-	struct v4l2_device *v4l2_dev = dev_get_drvdata(&pdev->dev);
-	struct cafe_camera *cam = to_cam(v4l2_dev);
-
-	if (cam == NULL) {
-		printk(KERN_WARNING "pci_remove on unknown pdev %p\n", pdev);
-		return;
-	}
 	mutex_lock(&cam->s_mutex);
 	if (cam->users > 0)
 		cam_warn(cam, "Removing a device with users!\n");
@@ -2042,11 +2284,199 @@
 /* No unlock - it no longer exists */
 }
 
+static int cafe_platform_probe(struct platform_device *pdev)
+{
+	struct resource *res;
+	int irq;
+	int ret;
+	struct cafe_camera *cam;
+	
+	/*
+	 * Start putting together one of our big camera structures.
+	 */
+	ret = -ENOMEM;
+	cam = alloc_init_cam_struct(&pdev->dev);
+	if (cam == NULL)
+		return ret;
+
+	platform_set_drvdata(pdev, cam);	
+	/* we are not pci device */
+	cam->pdev = NULL;
+	/*
+	 * Get set up on the PCI bus.
+	 */
+	ret = -EIO;
+	/*
+	 * Get the register base first
+	 */
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (res == NULL)
+		return -EINVAL;
+
+	cam->regs = devm_ioremap(&pdev->dev, res->start,
+				 res->end - res->start + 1);
+	if (! cam->regs) {
+		dev_err(&pdev->dev, "Unable to ioremap cafe-ccic regs\n");
+		return ret;
+	}
+
+	irq = platform_get_irq(pdev, 0);
+	if (res < 0) {
+                dev_err(&pdev->dev, "no IRQ resource defined\n");
+                return -ENODEV;
+        }
+
+	ret = devm_request_irq(&pdev->dev, irq, cafe_irq, 0,
+			       "cafe-ccic", cam);
+	if (ret)
+		return ret;
+
+	if (pdev->dev.platform_data) {
+		const struct cafe_cam_platform_data *platform_data =
+		(struct cafe_cam_platform_data *)pdev->dev.platform_data;
+		cam->power_down = platform_data->power_down;
+		cam->reset = platform_data->reset;
+		cam->numbered_i2c_bus = platform_data->numbered_i2c_bus;
+		cam->i2c_bus_id = platform_data->i2c_bus_id;
+	} else {
+		cam->power_down = GPR_C1;
+		cam->reset = GPR_C0;
+		cam->numbered_i2c_bus = 0;
+	}
+#if defined(CONFIG_HAVE_CLK)
+	cam->clk = clk_get(&pdev->dev, NULL);
+	if (IS_ERR(cam->clk))
+		dev_notice(&pdev->dev, "cannot get clkdev\n");
+	else
+		clk_enable(cam->clk);
+#endif
+
+	return cafe_init_cam(cam);
+}
+
+static int cafe_platform_remove(struct platform_device *pdev)
+{
+	struct cafe_camera *cam = platform_get_drvdata(pdev);
+#if defined(CONFIG_HAVE_CLK)
+	struct clk	*clk = cam->clk;
+#endif
+
+	cam_remove(cam);
+
+#if defined(CONFIG_HAVE_CLK)
+	if (!IS_ERR(clk)) {
+		clk_disable(clk);
+		clk_put(clk);
+	}
+#endif
+
+	return 0;
+}
+
+/* ------------------------------------------------------------------------*/
+/*
+ * PCI interface stuff.
+ */
+
+static int cafe_pci_probe(struct pci_dev *pdev,
+		const struct pci_device_id *id)
+{
+	int ret;
+	struct cafe_camera *cam;
+
+	/*
+	 * Start putting together one of our big camera structures.
+	 */
+	ret = -ENOMEM;
+	cam = alloc_init_cam_struct(&pdev->dev);
+	if (cam == NULL)
+		return ret;
+
+	pci_set_drvdata(pdev, cam);
+	cam->pdev = pdev;
+	/*
+	 * Get set up on the PCI bus.
+	 */
+	ret = pci_enable_device(pdev);
+	if (ret)
+		return ret;
+
+	pci_set_master(pdev);
+
+	ret = -EIO;
+	cam->regs = pcim_iomap(pdev, 0, 0);
+	if (! cam->regs) {
+		printk(KERN_ERR "Unable to ioremap cafe-ccic regs\n");
+		return ret;
+	}
+	ret = devm_request_irq(&pdev->dev, pdev->irq, cafe_irq, IRQF_SHARED,
+			       "cafe-ccic", cam);
+	if (ret)
+		return ret;
+	
+/*
+ * OLPC-style wiring.  Control 0 is reset.
+ * Control 1 is power down.
+ */
+	cam->power_down = GPR_C1;
+	cam->reset = GPR_C0;
+	cam->numbered_i2c_bus = 0;
+	return cafe_init_cam(cam);
+}
+
+static void cafe_pci_remove(struct pci_dev *pdev)
+{
+	struct cafe_camera *cam = pci_get_drvdata(pdev);
+
+	cam_remove(cam);
+}
+
 
 #ifdef CONFIG_PM
 /*
  * Basic power management.
  */
+static int cafe_resume(struct cafe_camera *cam)
+{
+	int ret = 0;
+
+	cafe_ctlr_init(cam);
+	cafe_ctlr_power_down(cam);
+
+	mutex_lock(&cam->s_mutex);
+	if (cam->users > 0) {
+		cafe_ctlr_power_up(cam);
+		__cafe_cam_reset(cam);
+	}
+	mutex_unlock(&cam->s_mutex);
+
+	set_bit(CF_CONFIG_NEEDED, &cam->flags);
+	if (cam->state == S_SPECREAD)
+		cam->state = S_IDLE;  /* Don't bother restarting */
+	else if (cam->state == S_SINGLEREAD || cam->state == S_STREAMING)
+		ret = cafe_read_setup(cam, cam->state);
+	return ret;
+}
+
+static int cafe_platform_suspend(struct platform_device *pdev, pm_message_t state)
+{
+	struct cafe_camera *cam = platform_get_drvdata(pdev);
+	enum cafe_state cstate;
+
+	cstate = cam->state; /* HACK - stop_dma sets to idle */
+	cafe_ctlr_stop_dma(cam);
+	cafe_ctlr_power_down(cam);
+	cam->state = cstate;
+	return 0;
+}
+
+static int cafe_platform_resume(struct platform_device *pdev)
+{
+	struct cafe_camera *cam = platform_get_drvdata(pdev);
+
+	return cafe_resume(cam);
+}
+
 static int cafe_pci_suspend(struct pci_dev *pdev, pm_message_t state)
 {
 	struct v4l2_device *v4l2_dev = dev_get_drvdata(&pdev->dev);
@@ -2081,21 +2511,8 @@
 		cam_warn(cam, "Unable to re-enable device on resume!\n");
 		return ret;
 	}
-	cafe_ctlr_init(cam);
-	cafe_ctlr_power_down(cam);
-
-	mutex_lock(&cam->s_mutex);
-	if (cam->users > 0) {
-		cafe_ctlr_power_up(cam);
-		__cafe_cam_reset(cam);
-	}
-	mutex_unlock(&cam->s_mutex);
 
-	set_bit(CF_CONFIG_NEEDED, &cam->flags);
-	if (cam->state == S_SPECREAD)
-		cam->state = S_IDLE;  /* Don't bother restarting */
-	else if (cam->state == S_SINGLEREAD || cam->state == S_STREAMING)
-		ret = cafe_read_setup(cam, cam->state);
+	ret = cafe_resume(cam);
 	return ret;
 }
 
@@ -2111,7 +2528,7 @@
 MODULE_DEVICE_TABLE(pci, cafe_ids);
 
 static struct pci_driver cafe_pci_driver = {
-	.name = "cafe1000-ccic",
+	.name = DRV_NAME,
 	.id_table = cafe_ids,
 	.probe = cafe_pci_probe,
 	.remove = cafe_pci_remove,
@@ -2121,6 +2538,18 @@
 #endif
 };
 
+static struct platform_driver cafe_platform_driver = {
+	.probe = cafe_platform_probe,
+	.remove = cafe_platform_remove,
+	.driver			= {
+				   .name = DRV_NAME,
+				   .owner = THIS_MODULE,
+				   },
+#ifdef CONFIG_PM
+	.suspend = cafe_platform_suspend,
+	.resume = cafe_platform_resume,
+#endif
+};
 
 
 
@@ -2131,13 +2560,20 @@
 	printk(KERN_NOTICE "Marvell M88ALP01 'CAFE' Camera Controller version %d\n",
 			CAFE_VERSION);
 	ret = pci_register_driver(&cafe_pci_driver);
-	if (ret) {
-		printk(KERN_ERR "Unable to register cafe_ccic driver\n");
-		goto out;
+	if (ret < 0) {
+		printk(KERN_ERR "Unable to register pci cafe_ccic driver\n");
+		return ret;
+	}
+	ret = platform_driver_register(&cafe_platform_driver);
+	if (ret < 0) {
+		printk(KERN_ERR "Unable to register platform cafe_ccic driver\n");
+		pci_unregister_driver(&cafe_pci_driver);
+		return ret;
 	}
-	ret = 0;
 
-  out:
+#ifdef CONFIG_VIDEO_ADV_DEBUG
+	cafe_dfs_setup();
+#endif
 	return ret;
 }
 
@@ -2145,6 +2581,10 @@
 static void __exit cafe_exit(void)
 {
 	pci_unregister_driver(&cafe_pci_driver);
+	platform_driver_unregister(&cafe_platform_driver);
+#ifdef CONFIG_VIDEO_ADV_DEBUG
+	cafe_dfs_shutdown();
+#endif
 }
 
 module_init(cafe_init);
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/v4l2-ioctl.c
+++ linux-mvl-dove-2.6.32/drivers/media/video/v4l2-ioctl.c
@@ -1600,6 +1600,8 @@
 		if (!ops->vidioc_g_tuner)
 			break;
 
+		p->type = (vfd->vfl_type == VFL_TYPE_RADIO) ?
+			V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
 		ret = ops->vidioc_g_tuner(file, fh, p);
 		if (!ret)
 			dbgarg(cmd, "index=%d, name=%s, type=%d, "
@@ -1618,6 +1620,8 @@
 
 		if (!ops->vidioc_s_tuner)
 			break;
+		p->type = (vfd->vfl_type == VFL_TYPE_RADIO) ?
+			V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
 		dbgarg(cmd, "index=%d, name=%s, type=%d, "
 				"capability=0x%x, rangelow=%d, "
 				"rangehigh=%d, signal=%d, afc=%d, "
@@ -1636,6 +1640,8 @@
 		if (!ops->vidioc_g_frequency)
 			break;
 
+		p->type = (vfd->vfl_type == VFL_TYPE_RADIO) ?
+			V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
 		ret = ops->vidioc_g_frequency(file, fh, p);
 		if (!ret)
 			dbgarg(cmd, "tuner=%d, type=%d, frequency=%d\n",
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/media/video/Kconfig
@@ -321,6 +321,13 @@
 	  OV7670 VGA camera.  It currently only works with the M88ALP01
 	  controller.
 
+config VIDEO_OV7680
+	tristate "OmniVision OV7680 sensor support"
+	depends on I2C && VIDEO_V4L2
+	---help---
+	  This is a Video4Linux2 sensor-level driver for the OmniVision
+	  OV7680 VGA camera.
+
 config VIDEO_MT9V011
 	tristate "Micron mt9v011 sensor support"
 	depends on I2C && VIDEO_V4L2
@@ -804,8 +811,9 @@
 
 config VIDEO_CAFE_CCIC
 	tristate "Marvell 88ALP01 (Cafe) CMOS Camera Controller support"
-	depends on PCI && I2C && VIDEO_V4L2
+	depends on I2C && VIDEO_V4L2
 	select VIDEO_OV7670
+	select VIDEO_OV7680
 	---help---
 	  This is a video4linux2 driver for the Marvell 88ALP01 integrated
 	  CMOS camera controller.  This is the controller found on first-
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/Makefile
+++ linux-mvl-dove-2.6.32/drivers/media/video/Makefile
@@ -117,6 +117,10 @@
 obj-$(CONFIG_VIDEO_CX2341X) += cx2341x.o
 
 obj-$(CONFIG_VIDEO_CAFE_CCIC) += cafe_ccic.o
+obj-$(CONFIG_VIDEO_OV7670) 	+= ov7670.o
+obj-$(CONFIG_VIDEO_OV7680) 	+= ov7680.o
+
+obj-$(CONFIG_VIDEO_TCM825X) += tcm825x.o
 
 obj-$(CONFIG_USB_DABUSB)        += dabusb.o
 obj-$(CONFIG_USB_OV511)         += ov511.o
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/ov511.c
+++ linux-mvl-dove-2.6.32/drivers/media/video/ov511.c
@@ -5878,7 +5878,7 @@
 		goto error;
 	}
 
-	mutex_lock(&ov->lock);
+	mutex_unlock(&ov->lock);
 
 	return 0;
 
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/ov7670.c
+++ linux-mvl-dove-2.6.32/drivers/media/video/ov7670.c
@@ -47,9 +47,9 @@
 #define OV7670_FRAME_RATE 30
 
 /*
- * The 7670 sits on i2c with ID 0x42
+ * The 7670 sits on i2c with ID 0x21
  */
-#define OV7670_I2C_ADDR 0x42
+#define OV7670_I2C_ADDR 0x21
 
 /* Registers */
 #define REG_GAIN	0x00	/* Gain lower 8 bits (rest in vref) */
@@ -195,7 +195,7 @@
 struct ov7670_info {
 	struct v4l2_subdev sd;
 	struct ov7670_format_struct *fmt;  /* Current format */
-	unsigned char sat;		/* Saturation value */
+	int sat;		/* Saturation value */
 	int hue;			/* Hue value */
 };
 
@@ -259,15 +259,34 @@
 	{ REG_GAIN, 0 },	{ REG_AECH, 0 },
 	{ REG_COM4, 0x40 }, /* magic reserved bit */
 	{ REG_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
+#if 0
 	{ REG_BD50MAX, 0x05 },	{ REG_BD60MAX, 0x07 },
+#else
+	{ REG_BD50MAX, 0x02 },	{ REG_BD60MAX, 0x03 },
+#endif
+#if 0
 	{ REG_AEW, 0x95 },	{ REG_AEB, 0x33 },
 	{ REG_VPT, 0xe3 },	{ REG_HAECC1, 0x78 },
+#else
+	{ REG_AEW, 0x48 },	{ REG_AEB, 0x38 },
+	{ REG_VPT, 0x82 },	{ REG_HAECC1, 0x78 },
+#endif
 	{ REG_HAECC2, 0x68 },	{ 0xa1, 0x03 }, /* magic */
 	{ REG_HAECC3, 0xd8 },	{ REG_HAECC4, 0xd8 },
 	{ REG_HAECC5, 0xf0 },	{ REG_HAECC6, 0x90 },
+#if 0
 	{ REG_HAECC7, 0x94 },
+#else
+	{ REG_HAECC7, 0x14 },
+#endif
 	{ REG_COM8, COM8_FASTAEC|COM8_AECSTEP|COM8_BFILT|COM8_AGC|COM8_AEC },
 
+	/* Enable lens correction */
+	{ 0x62, 0x20 },		{ 0x63, 0x10 },
+	{ 0x64, 0x0d },		{ 0x65, 0x00 },
+	{ 0x66, 0x05 },		{ 0x94, 0x0a },
+	{ 0x95, 0x12 },
+
 	/* Almost all of these are magic "reserved" values.  */
 	{ REG_COM5, 0x61 },	{ REG_COM6, 0x4b },
 	{ 0x16, 0x02 },		{ REG_MVFP, 0x07 },
@@ -311,12 +330,22 @@
 	{ 0xc9, 0x60 },		{ REG_COM16, 0x38 },
 	{ 0x56, 0x40 },
 
+#if 0
 	{ 0x34, 0x11 },		{ REG_COM11, COM11_EXP|COM11_HZAUTO },
+#else
+	/* Enable night mode 60Hz, anti-flicker */
+	{ 0x34, 0x11 },		{ REG_COM11, 0xe2 },
+#endif
 	{ 0xa4, 0x88 },		{ 0x96, 0 },
 	{ 0x97, 0x30 },		{ 0x98, 0x20 },
 	{ 0x99, 0x30 },		{ 0x9a, 0x84 },
 	{ 0x9b, 0x29 },		{ 0x9c, 0x03 },
+#if 0
 	{ 0x9d, 0x4c },		{ 0x9e, 0x3f },
+#else
+	/* Anti-flicker */
+	{ 0x9d, 0x99 },		{ 0x9e, 0x7f },
+#endif
 	{ 0x78, 0x04 },
 
 	/* Extra-weird stuff.  Some sort of multiplexor register */
@@ -474,10 +503,8 @@
 	unsigned char v;
 	int ret;
 
-	ret = ov7670_init(sd, 0);
-	if (ret < 0)
-		return ret;
 	ret = ov7670_read(sd, REG_MIDH, &v);
+
 	if (ret < 0)
 		return ret;
 	if (v != 0x7f) /* OV manuf. id. */
@@ -500,7 +527,9 @@
 		return ret;
 	if (v != 0x73)  /* PID + VER = 0x76 / 0x73 */
 		return -ENODEV;
-	return 0;
+
+	ret = ov7670_init(sd, 0);
+	return ret;
 }
 
 
@@ -615,9 +644,9 @@
 		.width		= QVGA_WIDTH,
 		.height		= QVGA_HEIGHT,
 		.com7_bit	= COM7_FMT_QVGA,
-		.hstart		= 164,		/* Empirically determined */
-		.hstop		=  20,
-		.vstart		=  14,
+		.hstart		= 172,		/* Empirically determined */
+		.hstop		=  32,
+		.vstart		=  13,
 		.vstop		= 494,
 		.regs 		= NULL,
 	},
@@ -1013,6 +1042,8 @@
 {
 	if ((v & 0x80) == 0)
 		return v + 128;
+	if (v == 0x80)
+		return 0;
 	return 128 - (v & 0x7f);
 }
 
@@ -1029,9 +1060,11 @@
 	unsigned char com8 = 0, v;
 	int ret;
 
+#if 0
 	ov7670_read(sd, REG_COM8, &com8);
 	com8 &= ~COM8_AEC;
 	ov7670_write(sd, REG_COM8, com8);
+#endif
 	v = ov7670_abs_to_sm(value);
 	ret = ov7670_write(sd, REG_BRIGHT, v);
 	return ret;
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/v4l2-compat-ioctl32.c
+++ linux-mvl-dove-2.6.32/drivers/media/video/v4l2-compat-ioctl32.c
@@ -193,17 +193,24 @@
 struct video_code32 {
 	char		loadwhat[16];	/* name or tag of file being passed */
 	compat_int_t	datasize;
-	unsigned char	*data;
+	compat_uptr_t	data;
 };
 
-static int get_microcode32(struct video_code *kp, struct video_code32 __user *up)
+static struct video_code __user *get_microcode32(struct video_code32 *kp)
 {
-	if (!access_ok(VERIFY_READ, up, sizeof(struct video_code32)) ||
-		copy_from_user(kp->loadwhat, up->loadwhat, sizeof(up->loadwhat)) ||
-		get_user(kp->datasize, &up->datasize) ||
-		copy_from_user(kp->data, up->data, up->datasize))
-			return -EFAULT;
-	return 0;
+	struct video_code __user *up;
+
+	up = compat_alloc_user_space(sizeof(*up));
+
+	/*
+	 * NOTE! We don't actually care if these fail. If the
+	 * user address is invalid, the native ioctl will do
+	 * the error handling for us
+	 */
+	(void) copy_to_user(up->loadwhat, kp->loadwhat, sizeof(up->loadwhat));
+	(void) put_user(kp->datasize, &up->datasize);
+	(void) put_user(compat_ptr(kp->data), &up->data);
+	return up;
 }
 
 #define VIDIOCGTUNER32		_IOWR('v', 4, struct video_tuner32)
@@ -741,7 +748,7 @@
 		struct video_tuner vt;
 		struct video_buffer vb;
 		struct video_window vw;
-		struct video_code vc;
+		struct video_code32 vc;
 		struct video_audio va;
 #endif
 		struct v4l2_format v2f;
@@ -820,8 +827,11 @@
 		break;
 
 	case VIDIOCSMICROCODE:
-		err = get_microcode32(&karg.vc, up);
-		compatible_arg = 0;
+		/* Copy the 32-bit "video_code32" to kernel space */
+		if (copy_from_user(&karg.vc, up, sizeof(karg.vc)))
+			return -EFAULT;
+		/* Convert the 32-bit version to a 64-bit version in user space */
+		up = get_microcode32(&karg.vc);
 		break;
 
 	case VIDIOCSFREQ:
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/ov7680.c
+++ linux-mvl-dove-2.6.32/drivers/media/video/ov7680.c
@@ -0,0 +1,1051 @@
+/*
+ * A V4L2 driver for OmniVision OV7680 cameras.
+ *
+ * This file may be distributed under the terms of the GNU General
+ * Public License, version 2.
+ */
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/i2c.h>
+#include <linux/delay.h>
+#include <linux/videodev2.h>
+#include <media/v4l2-device.h>
+#include <media/v4l2-chip-ident.h>
+#include <media/v4l2-i2c-drv.h>
+
+
+MODULE_DESCRIPTION("A low-level driver for OmniVision ov7680 sensors");
+MODULE_LICENSE("GPL");
+
+static int debug;
+module_param(debug, bool, 0644);
+MODULE_PARM_DESC(debug, "Debug level (0-1)");
+
+/*
+ * Use a more agressive configuration instead of the default one.
+ */
+#define ALT_CONFIG_SET
+
+/*
+ * Basic window sizes.  These probably belong somewhere more globally
+ * useful.
+ */
+#define VGA_WIDTH	640
+#define VGA_HEIGHT	480
+#define QVGA_WIDTH	320
+#define QVGA_HEIGHT	240
+#define CIF_WIDTH	352
+#define CIF_HEIGHT	288
+#define QCIF_WIDTH	176
+#define	QCIF_HEIGHT	144
+
+/*
+ * Our nominal (default) frame rate.
+ */
+#define OV7680_FRAME_RATE 30
+
+/*
+ * The 7680 sits on i2c with ID 0x42
+ */
+#define OV7680_I2C_ADDR 0x42
+
+/* Registers */
+#define REG_CLKRC	0x11	/* Clocl control */
+#define   CLK_EXT	  0x40	  /* Use external clock directly */
+#define   CLK_SCALE	  0x3f	  /* Mask for internal clock scale */
+
+#define REG_COM12	0x12	/* Control 12 */
+#define   COM12_RESET	  0x80	  /* Register reset */
+
+#define REG_PIDH	0xA
+#define REG_PIDL	0xB
+
+#define REG_0C		0xC
+#define   REG_0C_HFLIP	(1 << 6)
+#define   REG_0C_VFLIP	(1 << 7)
+#define REG_MIDH	0x1C
+#define REG_MIDL	0x1D
+
+/*
+ * Information we maintain about a known sensor.
+ */
+struct ov7680_format_struct;  /* coming later */
+struct ov7680_info {
+	struct v4l2_subdev sd;
+	struct ov7680_format_struct *fmt;  /* Current format */
+	unsigned char sat;		/* Saturation value */
+	int hue;			/* Hue value */
+};
+
+static inline struct ov7680_info *to_state(struct v4l2_subdev *sd)
+{
+	return container_of(sd, struct ov7680_info, sd);
+}
+
+
+
+/*
+ * The default register settings, as obtained from OmniVision.  There
+ * is really no making sense of most of these - lots of "reserved" values
+ * and such.
+ *
+ * These settings give VGA YUYV.
+ */
+
+struct regval_list {
+	unsigned char reg_num;
+	unsigned char value;
+};
+
+static struct regval_list ov7680_default_regs[] = {
+	{REG_COM12, COM12_RESET },
+
+	/* Clock */
+	{0x11, 0x00},   /* out=int/2 */
+	{0x29, 0x0a},
+
+	{REG_COM12, 0x0},
+	{0x1e, 0x91},
+	{0x14, 0xb2},
+	{0x63, 0x0b},
+	{0x64, 0x0f},
+	{0x65, 0x07},
+	{0x0c, 0x06},
+	{0x82, 0x9a},
+	{0x22, 0x40},
+	{0x23, 0x20},
+	{0x40, 0x10},
+	{0x4a, 0x42},
+#ifdef ALT_CONFIG_SET
+	{0x4b, 0x64},
+#else
+	{0x4b, 0x42},
+#endif
+	{0x67, 0x50},
+	{0x6b, 0x00},
+	{0x6c, 0x00},
+	{0x6d, 0x00},
+	{0x6e, 0x00},
+	{0x83, 0x00},
+	{0x0c, 0x16},
+	{0x82, 0x98},
+	{0x3e, 0x30},
+	{0x81, 0x06},
+
+	{0x42, 0x4a},
+	{0x45, 0x40},
+	{0x3f, 0x46},
+	{0x48, 0x20},
+	{0x21, 0x23},
+	{0x5a, 0x10},
+#ifdef ALT_CONFIG_SET
+	{0x5c, 0xe0},
+#endif
+	{0x27, 0x33},
+	{0x4d, 0x1d},
+	{0x42, 0x4a},
+	{0x4e, 0x54},	/* IO2.8v */
+
+	/* awb */
+#ifdef ALT_CONFIG_SET
+	{0x8F, 0x54},
+	{0x90, 0x69},
+	{0x91, 0x0f},
+	{0x92, 0x99},
+	{0x93, 0x98},
+	{0x94, 0x0f},
+	{0x95, 0x0f},
+	{0x96, 0xff},
+	{0x97, 0x00},
+	{0x98, 0x10},
+	{0x99, 0x20},
+	{0x65, 0x87},
+	{0x66, 0x02},
+	{0x67, 0x5c},
+	{0x32, 0xa0},
+	{0x33, 0x00},
+	{0x2f, 0x16},
+	{0x30, 0x2a},
+	{0x38, 0x84},
+	{0x55, 0x86},
+	{0x58, 0x83},
+	{0x13, 0xb7},
+	{0x38, 0x84},
+	{0x59, 0x0e},
+	{0x5f, 0x20},
+	{0x56, 0x40},
+	{0x51, 0x00},
+	{0x57, 0x22},
+	{0x59, 0x07},
+	{0x5f, 0xa3},
+	{0x59, 0x08},
+	{0x5f, 0x54},
+	{0x52, 0x30},
+	{0x56, 0x29},
+	{0x53, 0x20},
+	{0x54, 0x30},
+	{0x59, 0x00},
+	{0x5f, 0xf0},
+	{0x59, 0x01},
+	{0x5f, 0xf0},
+	{0x59, 0x0f},
+	{0x5f, 0x20},
+	{0x5f, 0x00},
+	{0x59, 0x10},
+	{0x5f, 0x7e},
+	{0x59, 0x0a},
+	{0x5f, 0x80},
+	{0x59, 0x0b},
+	{0x5f, 0x01},
+	{0x59, 0x0C},
+	{0x5f, 0x07},
+	{0x5f, 0x0f},
+	{0x59, 0x0d},
+	{0x5f, 0x20},
+	{0x59, 0x09},
+	{0x5f, 0x30},
+	{0x59, 0x02},
+	{0x5f, 0x80},
+	{0x59, 0x03},
+	{0x5f, 0x60},
+	{0x59, 0x04},
+	{0x5f, 0xf0},
+	{0x59, 0x05},
+	{0x5f, 0x80},
+	{0x59, 0x06},
+	{0x5f, 0x04},
+	{0x59, 0x26},
+	{0x59, 0x0b},
+	{0x5f, 0x31},
+	{0x55, 0xa8},
+	{0x27, 0xb3},
+	{0x40, 0x23},
+	{0x4d, 0x1d},
+#else
+	{0x97, 0x02},
+	{0x96, 0xf8},
+	{0x98, 0x37},
+	{0x9a, 0x52},
+	{0x99, 0x33},
+	{0x9b, 0x42},
+	{0x94, 0x0e},
+	{0x92, 0x8c},
+	{0x93, 0x96},
+	{0x95, 0x0e},
+	{0x8f, 0x55},
+	{0x90, 0x58},
+	{0x91, 0x0c},
+	{0x89, 0x5c},
+	{0x8b, 0x12},
+
+	{0x65, 0x87},
+	/* {0x66, 0x02}, */
+	{0x67, 0x5c},
+	{0x32, 0xa0},
+	{0x33, 0x00},
+	{0x2f, 0x16},
+	{0x30, 0x2a},
+	{0x38, 0x84},
+	{0x55, 0x86},
+	{0x58, 0x83},
+	{0x13, 0xff},	/* ;f7 */
+	{0x38, 0x84},
+
+	{0x56, 0x40},
+	{0x22, 0x70},
+	{0x51, 0x00},
+	{0x57, 0x2c},
+	{0x59, 0x07},
+	{0x5f, 0xa2},
+	{0x59, 0x08},
+	{0x5f, 0x54},
+	{0x52, 0x30},
+	{0x53, 0x20},
+	{0x54, 0x30},
+	{0x59, 0x00},
+	{0x5f, 0xf0},
+	{0x59, 0x01},
+	{0x5f, 0xf0},
+	{0x59, 0x0f},
+	{0x5f, 0x20},
+	{0x5f, 0x00},
+	{0x59, 0x10},
+	{0x5f, 0x7e},
+	{0x59, 0x0a},
+	{0x5f, 0x80},
+	{0x59, 0x0b},
+	{0x5f, 0x01},
+	{0x59, 0x0c},
+	{0x5f, 0x07},
+	{0x5f, 0x0f},
+	{0x59, 0x0d},
+	{0x5f, 0x20},
+	{0x59, 0x0e},
+	{0x5f, 0x20},
+	{0x59, 0x09},
+	{0x5f, 0x30},
+	{0x59, 0x02},
+	{0x5f, 0x80},
+	{0x59, 0x03},
+	{0x5f, 0x60},
+	{0x59, 0x04},
+	{0x5f, 0xf0},
+	{0x59, 0x05},
+	{0x5f, 0x80},
+	{0x59, 0x06},
+	{0x5f, 0x04},
+	{0x59, 0x26},
+	{0x59, 0x0b},
+	{0x5f, 0x31},
+	{0x55, 0xa8},
+	{0x56, 0x29},
+
+	{0x27, 0xb3},
+	{0x40, 0x23},
+	{0x4d, 0x2d},
+#endif
+
+	/* Color Matrix */
+#ifdef ALT_CONFIG_SET
+	{0xb7, 0x98},
+	{0xb8, 0x98},
+	{0xb9, 0x00},
+	{0xba, 0x28},
+	{0xbb, 0x70},
+	{0xbc, 0x98},
+	{0xbd, 0x5a},
+#else
+	{0xba, 0x18},
+	{0xbb, 0x80},
+	{0xbc, 0x98},
+	{0xb7, 0x90},
+	{0xb8, 0x8f},
+	{0xb9, 0x01},
+	{0xbd, 0x5a},
+#endif
+
+	{0xbe, 0xb0},
+	{0xbf, 0x9d},
+	{0xc0, 0x13},
+	{0xc1, 0x16},
+	{0xc2, 0x7b},
+	{0xc3, 0x91},
+	{0xc4, 0x1e},
+	{0xc5, 0x9d},
+	{0xc6, 0x9a},
+	{0xc7, 0x03},
+	{0xc8, 0x2e},
+	{0xc9, 0x91},
+	{0xca, 0xbf},
+	{0xcb, 0x1e},
+
+	/* Gamma */
+#ifdef ALT_CONFIG_SET
+	{0xaf, 0x1e},
+	{0xa0, 0x06},
+	{0xa1, 0x18},
+	{0xa2, 0x2a},
+	{0xa3, 0x50},
+	{0xa4, 0x5f},
+	{0xa5, 0x6c},
+	{0xa6, 0x79},
+	{0xa7, 0x84},
+	{0xa8, 0x8d},
+	{0xa9, 0x96},
+	{0xaa, 0xa5},
+	{0xab, 0xb0},
+	{0xac, 0xc6},
+	{0xad, 0xd4},
+	{0xae, 0xea},
+#else
+	{0xaf, 0x30},
+	{0xa0, 0x01},
+	{0xa1, 0x0f},
+	{0xa2, 0x1d},
+	{0xa3, 0x3c},
+	{0xa4, 0x4a},
+	{0xa5, 0x5a},
+	{0xa6, 0x69},
+	{0xa7, 0x77},
+	{0xa8, 0x83},
+	{0xa9, 0x8e},
+	{0xaa, 0x9f},
+	{0xab, 0xac},
+	{0xac, 0xc1},
+	{0xad, 0xcc},
+	{0xae, 0xd0},
+#endif
+
+	{0x89, 0x5c},
+	{0x8a, 0x11},
+#ifdef ALT_CONFIG_SET
+	{0x8b, 0x92},
+#else
+	{0x8b, 0x12},
+#endif
+	{0x8c, 0x11},
+	{0x8d, 0x52},
+#ifdef ALT_CONFIG_SET
+	{0x96, 0xff},
+	{0x97, 0x00},
+	{0x9c, 0xf0},
+#else
+	{0x96, 0xf8},
+	{0x97, 0x02},
+	{0x9c, 0x64},
+#endif
+	{0x9d, 0xf0},
+	{0x9e, 0xf0},
+
+#ifdef ALT_CONFIG_SET
+	{0xb2, 0x06},
+	{0xb3, 0x03},
+	{0xb4, 0x05},
+	{0xb5, 0x04},
+	{0xb6, 0x02},	/* ; 03 */
+
+	{0xd5, 0x06},
+	{0xd6, 0x10},
+#else
+	{0xb2, 0x03},
+	{0xb3, 0x02},
+	{0xb4, 0x65},
+	{0xb5, 0x02},
+	{0xb6, 0x02},
+#endif
+	{0xdb, 0x40},
+	{0xdc, 0x40},
+	{0xdf, 0x09},
+
+#ifdef ALT_CONFIG_SET
+	{0x11, 0x00},
+#endif
+	{0x24, 0x40},
+#ifdef ALT_CONFIG_SET
+	{0x25, 0x30},
+	{0x26, 0x81},
+#else
+	{0x25, 0x38},
+	{0x26, 0x82},
+	{0x4f, 0x4d},
+	{0x50, 0x40},
+#endif
+
+	{0x5a, 0x14},
+#ifdef ALT_CONFIG_SET
+	{0x5b, 0xe7},
+	{0x5c, 0x1f},
+#else
+	{0x5b, 0x00},
+	{0x5c, 0x1c},
+#endif
+	{0x5d, 0x30},
+	{0x81, 0x07},
+
+	/* Lens Correction */
+#ifdef ALT_CONFIG_SET
+	{0x31, 0x0f},
+	{0x32, 0x00},
+	{0x35, 0x15},
+	{0x37, 0x5d},	/* for color R */
+	{0x34, 0x48},	/* for color G */
+	{0x36, 0x50},	/* for color B */
+#else
+	{0x31, 0x0f},
+	{0x32, 0x8c},
+	{0x33, 0x37},
+	{0x35, 0x10},
+	{0x37, 0x48},
+	{0x34, 0x3b},
+	{0x36, 0x3a},
+#endif
+
+	{0x84, 0x02},
+
+	/* 30fps */
+	{0x2a, 0xb0},
+	{0x2b, 0x0b},
+	{0x4f, 0x9a},	/* banding value */
+	{0x50, 0x80},
+	{0x21, 0x23},   /* banding step */
+
+	/* General control */
+	{0x14, 0xa0},	/* 8x max gain */
+	{0x15, 0x64},	/* disable night mode */
+
+#ifndef ALT_CONFIG_SET
+	/* Contrast adjustment */
+	{0xd5, 0x06},
+	{0xd6, 0x00},
+	{0xd7, 0x25},
+	{0xdf, 0x01},
+	{0xdb, 0x4c},
+	{0xdc, 0x40},
+
+	/* AE Range */
+	{0x24, 0x50},
+	{0x25, 0x40},
+	{0x26, 0x83},
+
+	/* Black level */
+	{0x66, 0x02},	/* BLC */
+	{0x80, 0x7f},
+	{0x85, 0x01},
+#endif
+
+	{ 0xff, 0xff },	/* END MARKER */
+};
+
+
+/*
+ * Here we'll try to encapsulate the changes for just the output
+ * video format.
+ *
+ * RGB656 and YUV422 come from OV; RGB444 is homebrewed.
+ *
+ * IMPORTANT RULE: the first entry must be for COM7, see ov7680_s_fmt for why.
+ */
+
+
+static struct regval_list ov7680_fmt_yuv422[] = {
+	{ REG_COM12, 0x0 },  /* Selects YUV mode */
+	{ 0x0c, 0x16 },
+	{ 0xff, 0xff },
+};
+
+
+/*
+ * Low-level register I/O.
+ */
+
+static int ov7680_read(struct v4l2_subdev *sd, unsigned char reg,
+		unsigned char *value)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	int ret;
+
+	ret = i2c_smbus_read_byte_data(client, reg);
+	if (ret >= 0) {
+		*value = (unsigned char)ret;
+		ret = 0;
+	}
+	return ret;
+}
+
+
+static int ov7680_write(struct v4l2_subdev *sd, unsigned char reg,
+		unsigned char value)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	int ret = i2c_smbus_write_byte_data(client, reg, value);
+
+	if (reg == REG_COM12 && (value & COM12_RESET))
+		msleep(2);  /* Wait for reset to run */
+	return ret;
+}
+
+
+/*
+ * Write a list of register settings; ff/ff stops the process.
+ */
+static int ov7680_write_array(struct v4l2_subdev *sd, struct regval_list *vals)
+{
+	while (vals->reg_num != 0xff || vals->value != 0xff) {
+		int ret = ov7680_write(sd, vals->reg_num, vals->value);
+		if (ret < 0)
+			return ret;
+		vals++;
+	}
+	return 0;
+}
+
+
+/*
+ * Stuff that knows about the sensor.
+ */
+static int ov7680_reset(struct v4l2_subdev *sd, u32 val)
+{
+	ov7680_write(sd, REG_COM12, COM12_RESET);
+	msleep(1);
+	return 0;
+}
+
+
+static int ov7680_init(struct v4l2_subdev *sd, u32 val)
+{
+	return ov7680_write_array(sd, ov7680_default_regs);
+}
+
+
+
+static int ov7680_detect(struct v4l2_subdev *sd)
+{
+	unsigned char v;
+	int ret;
+
+	ret = ov7680_read(sd, REG_MIDH, &v);
+	if (ret < 0)
+		return ret;
+	if (v != 0x7f) /* OV manuf. id. */
+		return -ENODEV;
+	ret = ov7680_read(sd, REG_MIDL, &v);
+	if (ret < 0)
+		return ret;
+	if (v != 0xa2)
+		return -ENODEV;
+	/*
+	 * OK, we know we have an OmniVision chip...but which one?
+	 */
+	ret = ov7680_read(sd, REG_PIDH, &v);
+	if (ret < 0)
+		return ret;
+	if (v != 0x76)  /* PIDH = 0x76 */
+		return -ENODEV;
+	ret = ov7680_read(sd, REG_PIDL, &v);
+	if (ret < 0)
+		return ret;
+	if (v != 0x80)  /* PIDL = 0x80 */
+		return -ENODEV;
+
+	ret = ov7680_init(sd, 0);
+
+	return ret;
+}
+
+
+/*
+ * Store information about the video data format.  The color matrix
+ * is deeply tied into the format, so keep the relevant values here.
+ * The magic matrix nubmers come from OmniVision.
+ */
+static struct ov7680_format_struct {
+	__u8 *desc;
+	__u32 pixelformat;
+	struct regval_list *regs;
+	int bpp;   /* Bytes per pixel */
+} ov7680_formats[] = {
+	{
+		.desc		= "YUYV 4:2:2",
+		.pixelformat	= V4L2_PIX_FMT_YUYV,
+		.regs 		= ov7680_fmt_yuv422,
+		.bpp		= 2,
+	},
+};
+#define N_OV7680_FMTS ARRAY_SIZE(ov7680_formats)
+
+static struct regval_list ov7680_vga_regs[] = {
+	{ 0x81, 0x07 },
+	{ 0x84, 0x62 },
+	{ 0xd0, 0xa4 },
+	{ 0xd1, 0x78 },
+	{ 0xd2, 0xa0 },
+	{ 0xd3, 0x78 },
+	{ 0xd4, 0x20 },
+	{ 0xff, 0xff },
+};
+
+static struct regval_list ov7680_cif_regs[] = {
+	{ 0x81, 0xff },
+	{ 0x84, 0x02 },
+	{ 0xd0, 0xa4 },
+	{ 0xd1, 0x78 },
+	{ 0xd2, 0x58 },
+	{ 0xd3, 0x48 },
+	{ 0xd4, 0x20 },
+	{ 0xff, 0xff },
+};
+
+/*
+ * Then there is the issue of window sizes.  Try to capture the info here.
+ */
+static struct ov7680_win_size {
+	int	width;
+	int	height;
+	int	hstart;		/* Start/size values for the camera.  Note */
+	int	hsize;		/* that they do not always make complete */
+	int	vstart;		/* sense to humans, but evidently the sensor */
+	int	vsize;		/* will do the right thing... */
+	struct regval_list *regs; /* Regs to tweak */
+/* h/vref stuff */
+} ov7680_win_sizes[] = {
+	/* VGA */
+	{
+		.width		= VGA_WIDTH,
+		.height		= VGA_HEIGHT,
+		.hstart		= 104,		/* Value from Omnivision */
+		.hsize		= ((VGA_WIDTH+16)/4),
+		.vstart		=  14,
+		.vsize		= ((VGA_HEIGHT+8)/2),
+		.regs 		= ov7680_vga_regs,
+	},
+	/* CIF */
+	{
+		.width		= CIF_WIDTH,
+		.height		= CIF_HEIGHT,
+		.hstart		= 104,		/* Value from Omnivision */
+		.hsize		= ((VGA_WIDTH+16)/4),
+		.vstart		=  14,
+		.vsize		= ((VGA_HEIGHT+8)/2),
+		.regs 		= ov7680_cif_regs,
+	},
+};
+
+#define N_WIN_SIZES (ARRAY_SIZE(ov7680_win_sizes))
+
+static int ov7680_enum_fmt(struct v4l2_subdev *sd, struct v4l2_fmtdesc *fmt)
+{
+	struct ov7680_format_struct *ofmt;
+
+	if (fmt->index >= N_OV7680_FMTS)
+		return -EINVAL;
+
+	ofmt = ov7680_formats + fmt->index;
+	fmt->flags = 0;
+	strcpy(fmt->description, ofmt->desc);
+	fmt->pixelformat = ofmt->pixelformat;
+	return 0;
+}
+
+
+static int ov7680_try_fmt_internal(struct v4l2_subdev *sd,
+		struct v4l2_format *fmt,
+		struct ov7680_format_struct **ret_fmt,
+		struct ov7680_win_size **ret_wsize)
+{
+	int index;
+	struct ov7680_win_size *wsize;
+	struct v4l2_pix_format *pix = &fmt->fmt.pix;
+
+	for (index = 0; index < N_OV7680_FMTS; index++)
+		if (ov7680_formats[index].pixelformat == pix->pixelformat)
+			break;
+	if (index >= N_OV7680_FMTS) {
+		/* default to first format */
+		index = 0;
+		pix->pixelformat = ov7680_formats[0].pixelformat;
+	}
+	if (ret_fmt != NULL)
+		*ret_fmt = ov7680_formats + index;
+	/*
+	 * Fields: the OV devices claim to be progressive.
+	 */
+	pix->field = V4L2_FIELD_NONE;
+	/*
+	 * Round requested image size down to the nearest
+	 * we support, but not below the smallest.
+	 */
+	for (wsize = ov7680_win_sizes; wsize < ov7680_win_sizes + N_WIN_SIZES;
+	     wsize++)
+		if (pix->width >= wsize->width && pix->height >= wsize->height)
+			break;
+	if (wsize >= ov7680_win_sizes + N_WIN_SIZES)
+		wsize--;   /* Take the smallest one */
+	if (ret_wsize != NULL)
+		*ret_wsize = wsize;
+	/*
+	 * Note the size we'll actually handle.
+	 */
+	pix->width = wsize->width;
+	pix->height = wsize->height;
+	pix->bytesperline = pix->width*ov7680_formats[index].bpp;
+	pix->sizeimage = pix->height*pix->bytesperline;
+	return 0;
+}
+
+static int ov7680_try_fmt(struct v4l2_subdev *sd, struct v4l2_format *fmt)
+{
+	return ov7680_try_fmt_internal(sd, fmt, NULL, NULL);
+}
+
+/*
+ * Set a format.
+ */
+static int ov7680_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *fmt)
+{
+	int ret;
+	struct ov7680_format_struct *ovfmt;
+	struct ov7680_win_size *wsize;
+	struct ov7680_info *info = to_state(sd);
+
+	ret = ov7680_try_fmt_internal(sd, fmt, &ovfmt, &wsize);
+	if (ret)
+		return ret;
+	/*
+	 * write the array.
+	 */
+	if (wsize->regs)
+		ret += ov7680_write_array(sd, wsize->regs);
+	ret += ov7680_write_array(sd, ovfmt->regs);
+	info->fmt = ovfmt;
+	return ret;
+}
+
+/*
+ * Implement G/S_PARM.  There is a "high quality" mode we could try
+ * to do someday; for now, we just do the frame rate tweak.
+ */
+static int ov7680_g_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *parms)
+{
+	struct v4l2_captureparm *cp = &parms->parm.capture;
+	unsigned char clkrc;
+	int ret;
+
+	if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
+		return -EINVAL;
+	ret = ov7680_read(sd, REG_CLKRC, &clkrc);
+	if (ret < 0)
+		return ret;
+	memset(cp, 0, sizeof(struct v4l2_captureparm));
+	cp->capability = V4L2_CAP_TIMEPERFRAME;
+	cp->timeperframe.numerator = 1;
+	cp->timeperframe.denominator = OV7680_FRAME_RATE;
+	if ((clkrc & CLK_EXT) == 0 && (clkrc & CLK_SCALE) > 1)
+		cp->timeperframe.denominator /= (clkrc & CLK_SCALE);
+	return 0;
+}
+
+static int ov7680_s_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *parms)
+{
+	struct v4l2_captureparm *cp = &parms->parm.capture;
+	struct v4l2_fract *tpf = &cp->timeperframe;
+	unsigned char clkrc;
+	int ret, div;
+
+	if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
+		return -EINVAL;
+	if (cp->extendedmode != 0)
+		return -EINVAL;
+	/*
+	 * CLKRC has a reserved bit, so let's preserve it.
+	 */
+	ret = ov7680_read(sd, REG_CLKRC, &clkrc);
+	if (ret < 0)
+		return ret;
+	if (tpf->numerator == 0 || tpf->denominator == 0)
+		div = 1;  /* Reset to full rate */
+	else
+		div = (tpf->numerator*OV7680_FRAME_RATE)/tpf->denominator;
+	if (div == 0)
+		div = 1;
+	else if (div > CLK_SCALE)
+		div = CLK_SCALE;
+	clkrc = (clkrc & 0xc0) | div;
+	tpf->numerator = 1;
+	tpf->denominator = OV7680_FRAME_RATE/div;
+	return ov7680_write(sd, REG_CLKRC, clkrc);
+}
+
+
+
+/*
+ * Code for dealing with controls.
+ */
+static int ov7680_g_hflip(struct v4l2_subdev *sd, __s32 *value)
+{
+	int ret;
+	unsigned char v = 0;
+
+	ret = ov7680_read(sd, REG_0C, &v);
+	*value = (v & REG_0C_HFLIP) == REG_0C_HFLIP;
+	return ret;
+}
+
+
+static int ov7680_s_hflip(struct v4l2_subdev *sd, int value)
+{
+	unsigned char v = 0;
+	int ret;
+
+	ret = ov7680_read(sd, REG_0C, &v);
+	if (value)
+		v |= REG_0C_HFLIP;
+	else
+		v &= ~REG_0C_HFLIP;
+	msleep(10);  /* FIXME */
+	ret += ov7680_write(sd, REG_0C, v);
+	return ret;
+}
+
+
+
+static int ov7680_g_vflip(struct v4l2_subdev *sd, __s32 *value)
+{
+	int ret;
+	unsigned char v = 0;
+
+	ret = ov7680_read(sd, REG_0C, &v);
+	*value = (v & REG_0C_VFLIP) == REG_0C_VFLIP;
+	return ret;
+}
+
+
+static int ov7680_s_vflip(struct v4l2_subdev *sd, int value)
+{
+	unsigned char v = 0;
+	int ret;
+
+	ret = ov7680_read(sd, REG_0C, &v);
+	if (value)
+		v |= REG_0C_VFLIP;
+	else
+		v &= ~REG_0C_VFLIP;
+	msleep(10);  /* FIXME */
+	ret += ov7680_write(sd, REG_0C, v);
+	return ret;
+}
+
+static int ov7680_queryctrl(struct v4l2_subdev *sd,
+		struct v4l2_queryctrl *qc)
+{
+	/* Fill in min, max, step and default value for these controls. */
+	switch (qc->id) {
+	case V4L2_CID_VFLIP:
+	case V4L2_CID_HFLIP:
+		return v4l2_ctrl_query_fill(qc, 0, 1, 1, 0);
+	}
+	return -EINVAL;
+}
+
+static int ov7680_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
+{
+	switch (ctrl->id) {
+	case V4L2_CID_VFLIP:
+		return ov7680_g_vflip(sd, &ctrl->value);
+	case V4L2_CID_HFLIP:
+		return ov7680_g_hflip(sd, &ctrl->value);
+	}
+	return -EINVAL;
+}
+
+static int ov7680_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
+{
+	switch (ctrl->id) {
+	case V4L2_CID_VFLIP:
+		return ov7680_s_vflip(sd, ctrl->value);
+	case V4L2_CID_HFLIP:
+		return ov7680_s_hflip(sd, ctrl->value);
+	}
+	return -EINVAL;
+}
+
+static int ov7680_g_chip_ident(struct v4l2_subdev *sd,
+		struct v4l2_dbg_chip_ident *chip)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+
+	return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_OV7680, 0);
+}
+
+#ifdef CONFIG_VIDEO_ADV_DEBUG
+static int ov7680_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+	unsigned char val = 0;
+	int ret;
+
+	if (!v4l2_chip_match_i2c_client(client, &reg->match))
+		return -EINVAL;
+	if (!capable(CAP_SYS_ADMIN))
+		return -EPERM;
+	ret = ov7680_read(sd, reg->reg & 0xff, &val);
+	reg->val = val;
+	reg->size = 1;
+	return ret;
+}
+
+static int ov7680_s_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
+{
+	struct i2c_client *client = v4l2_get_subdevdata(sd);
+
+	if (!v4l2_chip_match_i2c_client(client, &reg->match))
+		return -EINVAL;
+	if (!capable(CAP_SYS_ADMIN))
+		return -EPERM;
+	ov7680_write(sd, reg->reg & 0xff, reg->val & 0xff);
+	return 0;
+}
+#endif
+
+/* ----------------------------------------------------------------------- */
+
+static const struct v4l2_subdev_core_ops ov7680_core_ops = {
+	.g_chip_ident = ov7680_g_chip_ident,
+	.g_ctrl = ov7680_g_ctrl,
+	.s_ctrl = ov7680_s_ctrl,
+	.queryctrl = ov7680_queryctrl,
+	.reset = ov7680_reset,
+	.init = ov7680_init,
+#ifdef CONFIG_VIDEO_ADV_DEBUG
+	.g_register = ov7680_g_register,
+	.s_register = ov7680_s_register,
+#endif
+};
+
+static const struct v4l2_subdev_video_ops ov7680_video_ops = {
+	.enum_fmt = ov7680_enum_fmt,
+	.try_fmt = ov7680_try_fmt,
+	.s_fmt = ov7680_s_fmt,
+	.s_parm = ov7680_s_parm,
+	.g_parm = ov7680_g_parm,
+};
+
+static const struct v4l2_subdev_ops ov7680_ops = {
+	.core = &ov7680_core_ops,
+	.video = &ov7680_video_ops,
+};
+
+/* ----------------------------------------------------------------------- */
+
+static int ov7680_probe(struct i2c_client *client,
+			const struct i2c_device_id *id)
+{
+	struct v4l2_subdev *sd;
+	struct ov7680_info *info;
+	int ret;
+
+	info = kzalloc(sizeof (struct ov7680_info), GFP_KERNEL);
+	if (info == NULL)
+		return -ENOMEM;
+	sd = &info->sd;
+	v4l2_i2c_subdev_init(sd, client, &ov7680_ops);
+
+	/* Make sure it's an ov7680 */
+	ret = ov7680_detect(sd);
+	if (ret) {
+		v4l_dbg(1, debug, client,
+			"chip found @ 0x%x (%s) is not an ov7680 chip.\n",
+			client->addr << 1, client->adapter->name);
+		kfree(info);
+		return ret;
+	}
+	v4l_info(client, "chip found @ 0x%02x (%s)\n",
+			client->addr << 1, client->adapter->name);
+
+	info->fmt = &ov7680_formats[0];
+	info->sat = 128;	/* Review this */
+
+	return 0;
+}
+
+
+static int ov7680_remove(struct i2c_client *client)
+{
+	struct v4l2_subdev *sd = i2c_get_clientdata(client);
+
+	v4l2_device_unregister_subdev(sd);
+	kfree(to_state(sd));
+	return 0;
+}
+
+static const struct i2c_device_id ov7680_id[] = {
+	{ "ov7680", 0 },
+	{ }
+};
+MODULE_DEVICE_TABLE(i2c, ov7680_id);
+
+static struct v4l2_i2c_driver_data v4l2_i2c_data = {
+	.name = "ov7680",
+	.probe = ov7680_probe,
+	.remove = ov7680_remove,
+	.id_table = ov7680_id,
+};
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/pwc/pwc-ctrl.c
+++ linux-mvl-dove-2.6.32/drivers/media/video/pwc/pwc-ctrl.c
@@ -753,7 +753,7 @@
 		buf[0] = 0xff; /* fixed */
 
 	ret = send_control_msg(pdev,
-		SET_LUM_CTL, SHUTTER_MODE_FORMATTER, &buf, sizeof(buf));
+		SET_LUM_CTL, SHUTTER_MODE_FORMATTER, &buf, 1);
 
 	if (!mode && ret >= 0) {
 		if (value < 0)
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/ivtv/ivtvfb.c
+++ linux-mvl-dove-2.6.32/drivers/media/video/ivtv/ivtvfb.c
@@ -457,6 +457,8 @@
 			struct fb_vblank vblank;
 			u32 trace;
 
+			memset(&vblank, 0, sizeof(struct fb_vblank));
+
 			vblank.flags = FB_VBLANK_HAVE_COUNT |FB_VBLANK_HAVE_VCOUNT |
 					FB_VBLANK_HAVE_VSYNC;
 			trace = read_reg(0x028c0) >> 16;
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/em28xx/em28xx-dvb.c
+++ linux-mvl-dove-2.6.32/drivers/media/video/em28xx/em28xx-dvb.c
@@ -610,6 +610,7 @@
 
 	if (dev->dvb) {
 		unregister_dvb(dev->dvb);
+		kfree(dev->dvb);
 		dev->dvb = NULL;
 	}
 
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/em28xx/em28xx-cards.c
+++ linux-mvl-dove-2.6.32/drivers/media/video/em28xx/em28xx-cards.c
@@ -1525,11 +1525,11 @@
 		.input           = { {
 			.type     = EM28XX_VMUX_COMPOSITE1,
 			.vmux     = SAA7115_COMPOSITE0,
-			.amux     = EM28XX_AMUX_VIDEO2,
+			.amux     = EM28XX_AMUX_LINE_IN,
 		}, {
 			.type     = EM28XX_VMUX_SVIDEO,
 			.vmux     = SAA7115_SVIDEO3,
-			.amux     = EM28XX_AMUX_VIDEO2,
+			.amux     = EM28XX_AMUX_LINE_IN,
 		} },
 	},
 	[EM2860_BOARD_TERRATEC_AV350] = {
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/uvc/uvc_driver.c
+++ linux-mvl-dove-2.6.32/drivers/media/video/uvc/uvc_driver.c
@@ -58,6 +58,11 @@
 		.fcc		= V4L2_PIX_FMT_YUYV,
 	},
 	{
+		.name		= "YUV 4:2:2 (YUYV)",
+		.guid		= UVC_GUID_FORMAT_YUY2_ISIGHT,
+		.fcc		= V4L2_PIX_FMT_YUYV,
+	},
+	{
 		.name		= "YUV 4:2:0 (NV12)",
 		.guid		= UVC_GUID_FORMAT_NV12,
 		.fcc		= V4L2_PIX_FMT_NV12,
@@ -83,11 +88,16 @@
 		.fcc		= V4L2_PIX_FMT_UYVY,
 	},
 	{
-		.name		= "Greyscale",
+		.name		= "Greyscale (8-bit)",
 		.guid		= UVC_GUID_FORMAT_Y800,
 		.fcc		= V4L2_PIX_FMT_GREY,
 	},
 	{
+		.name		= "Greyscale (16-bit)",
+		.guid		= UVC_GUID_FORMAT_Y16,
+		.fcc		= V4L2_PIX_FMT_Y16,
+	},
+	{
 		.name		= "RGB Bayer",
 		.guid		= UVC_GUID_FORMAT_BY8,
 		.fcc		= V4L2_PIX_FMT_SBGGR8,
@@ -426,7 +436,8 @@
 	/* Parse the frame descriptors. Only uncompressed, MJPEG and frame
 	 * based formats have frame descriptors.
 	 */
-	while (buflen > 2 && buffer[2] == ftype) {
+	while (buflen > 2 && buffer[1] == USB_DT_CS_INTERFACE &&
+	       buffer[2] == ftype) {
 		frame = &format->frame[format->nframes];
 		if (ftype != UVC_VS_FRAME_FRAME_BASED)
 			n = buflen > 25 ? buffer[25] : 0;
@@ -503,12 +514,14 @@
 		buffer += buffer[0];
 	}
 
-	if (buflen > 2 && buffer[2] == UVC_VS_STILL_IMAGE_FRAME) {
+	if (buflen > 2 && buffer[1] == USB_DT_CS_INTERFACE &&
+	    buffer[2] == UVC_VS_STILL_IMAGE_FRAME) {
 		buflen -= buffer[0];
 		buffer += buffer[0];
 	}
 
-	if (buflen > 2 && buffer[2] == UVC_VS_COLORFORMAT) {
+	if (buflen > 2 && buffer[1] == USB_DT_CS_INTERFACE &&
+	    buffer[2] == UVC_VS_COLORFORMAT) {
 		if (buflen < 6) {
 			uvc_trace(UVC_TRACE_DESCR, "device %d videostreaming "
 			       "interface %d COLORFORMAT error\n",
@@ -749,6 +762,11 @@
 		buffer += buffer[0];
 	}
 
+	if (buflen)
+		uvc_trace(UVC_TRACE_DESCR, "device %d videostreaming interface "
+			"%d has %u bytes of trailing descriptor garbage.\n",
+			dev->udev->devnum, alts->desc.bInterfaceNumber, buflen);
+
 	/* Parse the alternate settings to find the maximum bandwidth. */
 	for (i = 0; i < intf->num_altsetting; ++i) {
 		struct usb_host_endpoint *ep;
@@ -2048,6 +2066,15 @@
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
 	  .driver_info		= UVC_QUIRK_STREAM_NO_FID },
+	/* Syntek (Packard Bell EasyNote MX52 */
+	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
+				| USB_DEVICE_ID_MATCH_INT_INFO,
+	  .idVendor		= 0x174f,
+	  .idProduct		= 0x8a12,
+	  .bInterfaceClass	= USB_CLASS_VIDEO,
+	  .bInterfaceSubClass	= 1,
+	  .bInterfaceProtocol	= 0,
+	  .driver_info		= UVC_QUIRK_STREAM_NO_FID },
 	/* Syntek (Asus F9SG) */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_INT_INFO,
@@ -2112,6 +2139,15 @@
 	  .bInterfaceSubClass	= 1,
 	  .bInterfaceProtocol	= 0,
 	  .driver_info		= UVC_QUIRK_PROBE_MINMAX },
+	/* Arkmicro unbranded */
+	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
+				| USB_DEVICE_ID_MATCH_INT_INFO,
+	  .idVendor		= 0x18ec,
+	  .idProduct		= 0x3290,
+	  .bInterfaceClass	= USB_CLASS_VIDEO,
+	  .bInterfaceSubClass	= 1,
+	  .bInterfaceProtocol	= 0,
+	  .driver_info		= UVC_QUIRK_PROBE_DEF },
 	/* Bodelin ProScopeHR */
 	{ .match_flags		= USB_DEVICE_ID_MATCH_DEVICE
 				| USB_DEVICE_ID_MATCH_DEV_HI
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/uvc/uvc_video.c
+++ linux-mvl-dove-2.6.32/drivers/media/video/uvc/uvc_video.c
@@ -64,15 +64,19 @@
 static void uvc_fixup_video_ctrl(struct uvc_streaming *stream,
 	struct uvc_streaming_control *ctrl)
 {
-	struct uvc_format *format;
+	struct uvc_format *format = NULL;
 	struct uvc_frame *frame = NULL;
 	unsigned int i;
 
-	if (ctrl->bFormatIndex <= 0 ||
-	    ctrl->bFormatIndex > stream->nformats)
-		return;
+	for (i = 0; i < stream->nformats; ++i) {
+		if (stream->format[i].index == ctrl->bFormatIndex) {
+			format = &stream->format[i];
+			break;
+		}
+	}
 
-	format = &stream->format[ctrl->bFormatIndex - 1];
+	if (format == NULL)
+		return;
 
 	for (i = 0; i < format->nframes; ++i) {
 		if (format->frame[i].bFrameIndex == ctrl->bFrameIndex) {
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/uvc/uvcvideo.h
+++ linux-mvl-dove-2.6.32/drivers/media/video/uvc/uvcvideo.h
@@ -112,6 +112,9 @@
 #define UVC_GUID_FORMAT_YUY2 \
 	{ 'Y',  'U',  'Y',  '2', 0x00, 0x00, 0x10, 0x00, \
 	 0x80, 0x00, 0x00, 0xaa, 0x00, 0x38, 0x9b, 0x71}
+#define UVC_GUID_FORMAT_YUY2_ISIGHT \
+	{ 'Y',  'U',  'Y',  '2', 0x00, 0x00, 0x10, 0x00, \
+	 0x80, 0x00, 0x00, 0x00, 0x00, 0x38, 0x9b, 0x71}
 #define UVC_GUID_FORMAT_NV12 \
 	{ 'N',  'V',  '1',  '2', 0x00, 0x00, 0x10, 0x00, \
 	 0x80, 0x00, 0x00, 0xaa, 0x00, 0x38, 0x9b, 0x71}
@@ -127,11 +130,13 @@
 #define UVC_GUID_FORMAT_Y800 \
 	{ 'Y',  '8',  '0',  '0', 0x00, 0x00, 0x10, 0x00, \
 	 0x80, 0x00, 0x00, 0xaa, 0x00, 0x38, 0x9b, 0x71}
+#define UVC_GUID_FORMAT_Y16 \
+	{ 'Y',  '1',  '6',  ' ', 0x00, 0x00, 0x10, 0x00, \
+	 0x80, 0x00, 0x00, 0xaa, 0x00, 0x38, 0x9b, 0x71}
 #define UVC_GUID_FORMAT_BY8 \
 	{ 'B',  'Y',  '8',  ' ', 0x00, 0x00, 0x10, 0x00, \
 	 0x80, 0x00, 0x00, 0xaa, 0x00, 0x38, 0x9b, 0x71}
 
-
 /* ------------------------------------------------------------------------
  * Driver specific constants.
  */
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/uvc/uvc_ctrl.c
+++ linux-mvl-dove-2.6.32/drivers/media/video/uvc/uvc_ctrl.c
@@ -826,6 +826,13 @@
 		ret = 0;
 		goto out;
 
+	case V4L2_CTRL_TYPE_BUTTON:
+		v4l2_ctrl->minimum = 0;
+		v4l2_ctrl->maximum = 0;
+		v4l2_ctrl->step = 0;
+		ret = 0;
+		goto out;
+
 	default:
 		break;
 	}
@@ -1405,7 +1412,7 @@
 	size = entity->processing.bControlSize;
 
 	for (i = 0; i < ARRAY_SIZE(blacklist); ++i) {
-		if (!usb_match_id(dev->intf, &blacklist[i].id))
+		if (!usb_match_one_id(dev->intf, &blacklist[i].id))
 			continue;
 
 		if (blacklist[i].index >= 8 * size ||
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/uvc/uvc_queue.c
+++ linux-mvl-dove-2.6.32/drivers/media/video/uvc/uvc_queue.c
@@ -165,6 +165,8 @@
 	}
 
 	if (queue->count) {
+		uvc_queue_cancel(queue, 0);
+		INIT_LIST_HEAD(&queue->mainqueue);
 		vfree(queue->mem);
 		queue->count = 0;
 	}
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/cx231xx/cx231xx-cards.c
+++ linux-mvl-dove-2.6.32/drivers/media/video/cx231xx/cx231xx-cards.c
@@ -225,14 +225,16 @@
 		     dev->board.name, dev->model);
 
 	/* set the direction for GPIO pins */
-	cx231xx_set_gpio_direction(dev, dev->board.tuner_gpio->bit, 1);
-	cx231xx_set_gpio_value(dev, dev->board.tuner_gpio->bit, 1);
-	cx231xx_set_gpio_direction(dev, dev->board.tuner_sif_gpio, 1);
+	if (dev->board.tuner_gpio) {
+		cx231xx_set_gpio_direction(dev, dev->board.tuner_gpio->bit, 1);
+		cx231xx_set_gpio_value(dev, dev->board.tuner_gpio->bit, 1);
+		cx231xx_set_gpio_direction(dev, dev->board.tuner_sif_gpio, 1);
 
-	/* request some modules if any required */
+		/* request some modules if any required */
 
-	/* reset the Tuner */
-	cx231xx_gpio_set(dev, dev->board.tuner_gpio);
+		/* reset the Tuner */
+		cx231xx_gpio_set(dev, dev->board.tuner_gpio);
+	}
 
 	/* set the mode to Analog mode initially */
 	cx231xx_set_mode(dev, CX231XX_ANALOG_MODE);
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/saa7134/saa7134-core.c
+++ linux-mvl-dove-2.6.32/drivers/media/video/saa7134/saa7134-core.c
@@ -420,19 +420,6 @@
 		ctrl |= SAA7134_MAIN_CTRL_TE5;
 		irq  |= SAA7134_IRQ1_INTE_RA2_1 |
 			SAA7134_IRQ1_INTE_RA2_0;
-
-		/* dma: setup channel 5 (= TS) */
-
-		saa_writeb(SAA7134_TS_DMA0, (dev->ts.nr_packets - 1) & 0xff);
-		saa_writeb(SAA7134_TS_DMA1,
-			((dev->ts.nr_packets - 1) >> 8) & 0xff);
-		/* TSNOPIT=0, TSCOLAP=0 */
-		saa_writeb(SAA7134_TS_DMA2,
-			(((dev->ts.nr_packets - 1) >> 16) & 0x3f) | 0x00);
-		saa_writel(SAA7134_RS_PITCH(5), TS_PACKET_SIZE);
-		saa_writel(SAA7134_RS_CONTROL(5), SAA7134_RS_CONTROL_BURST_16 |
-						  SAA7134_RS_CONTROL_ME |
-						  (dev->ts.pt_ts.dma >> 12));
 	}
 
 	/* set task conditions + field handling */
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/saa7134/saa7134-cards.c
+++ linux-mvl-dove-2.6.32/drivers/media/video/saa7134/saa7134-cards.c
@@ -5279,6 +5279,30 @@
 			.amux = TV,
 		},
 	},
+	[SAA7134_BOARD_ASUS_EUROPA_HYBRID] = {
+		.name           = "Asus Europa Hybrid OEM",
+		.audio_clock    = 0x00187de7,
+		.tuner_type     = TUNER_PHILIPS_TD1316,
+		.radio_type     = UNSET,
+		.tuner_addr	= 0x61,
+		.radio_addr	= ADDR_UNSET,
+		.tda9887_conf   = TDA9887_PRESENT | TDA9887_PORT1_ACTIVE,
+		.mpeg           = SAA7134_MPEG_DVB,
+		.inputs = { {
+			.name   = name_tv,
+			.vmux   = 3,
+			.amux   = TV,
+			.tv     = 1,
+		}, {
+			.name   = name_comp1,
+			.vmux   = 4,
+			.amux   = LINE2,
+		}, {
+			.name   = name_svideo,
+			.vmux   = 8,
+			.amux   = LINE2,
+		} },
+	},
 
 };
 
@@ -6418,6 +6442,12 @@
 		.subdevice    = 0x2004,
 		.driver_data  = SAA7134_BOARD_ZOLID_HYBRID_PCI,
 	}, {
+		.vendor       = PCI_VENDOR_ID_PHILIPS,
+		.device       = PCI_DEVICE_ID_PHILIPS_SAA7134,
+		.subvendor    = 0x1043,
+		.subdevice    = 0x4847,
+		.driver_data  = SAA7134_BOARD_ASUS_EUROPA_HYBRID,
+	}, {
 		/* --- boards without eeprom + subsystem ID --- */
 		.vendor       = PCI_VENDOR_ID_PHILIPS,
 		.device       = PCI_DEVICE_ID_PHILIPS_SAA7134,
@@ -7079,6 +7109,7 @@
 		/* break intentionally omitted */
 	case SAA7134_BOARD_VIDEOMATE_DVBT_300:
 	case SAA7134_BOARD_ASUS_EUROPA2_HYBRID:
+	case SAA7134_BOARD_ASUS_EUROPA_HYBRID:
 	{
 
 		/* The Philips EUROPA based hybrid boards have the tuner
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/saa7134/saa7134-ts.c
+++ linux-mvl-dove-2.6.32/drivers/media/video/saa7134/saa7134-ts.c
@@ -250,6 +250,19 @@
 
 	BUG_ON(dev->ts_started);
 
+	/* dma: setup channel 5 (= TS) */
+	saa_writeb(SAA7134_TS_DMA0, (dev->ts.nr_packets - 1) & 0xff);
+	saa_writeb(SAA7134_TS_DMA1,
+		((dev->ts.nr_packets - 1) >> 8) & 0xff);
+	/* TSNOPIT=0, TSCOLAP=0 */
+	saa_writeb(SAA7134_TS_DMA2,
+		(((dev->ts.nr_packets - 1) >> 16) & 0x3f) | 0x00);
+	saa_writel(SAA7134_RS_PITCH(5), TS_PACKET_SIZE);
+	saa_writel(SAA7134_RS_CONTROL(5), SAA7134_RS_CONTROL_BURST_16 |
+					  SAA7134_RS_CONTROL_ME |
+					  (dev->ts.pt_ts.dma >> 12));
+
+	/* reset hardware TS buffers */
 	saa_writeb(SAA7134_TS_SERIAL1, 0x00);
 	saa_writeb(SAA7134_TS_SERIAL1, 0x03);
 	saa_writeb(SAA7134_TS_SERIAL1, 0x00);
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/saa7134/saa7134.h
+++ linux-mvl-dove-2.6.32/drivers/media/video/saa7134/saa7134.h
@@ -297,6 +297,7 @@
 #define SAA7134_BOARD_BEHOLD_X7             171
 #define SAA7134_BOARD_ROVERMEDIA_LINK_PRO_FM 172
 #define SAA7134_BOARD_ZOLID_HYBRID_PCI		173
+#define SAA7134_BOARD_ASUS_EUROPA_HYBRID	174
 
 #define SAA7134_MAXBOARDS 32
 #define SAA7134_INPUT_MAX 8
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/saa7134/saa7134-dvb.c
+++ linux-mvl-dove-2.6.32/drivers/media/video/saa7134/saa7134-dvb.c
@@ -1116,6 +1116,7 @@
 		break;
 	case SAA7134_BOARD_PHILIPS_EUROPA:
 	case SAA7134_BOARD_VIDEOMATE_DVBT_300:
+	case SAA7134_BOARD_ASUS_EUROPA_HYBRID:
 		fe0->dvb.frontend = dvb_attach(tda10046_attach,
 					       &philips_europa_config,
 					       &dev->i2c_adap);
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/cx23885/cx23885-i2c.c
+++ linux-mvl-dove-2.6.32/drivers/media/video/cx23885/cx23885-i2c.c
@@ -365,7 +365,17 @@
 
 		memset(&info, 0, sizeof(struct i2c_board_info));
 		strlcpy(info.type, "ir_video", I2C_NAME_SIZE);
-		i2c_new_probed_device(&bus->i2c_adap, &info, addr_list);
+		/*
+		 * We can't call i2c_new_probed_device() because it uses
+		 * quick writes for probing and the IR receiver device only
+		 * replies to reads.
+		 */
+		if (i2c_smbus_xfer(&bus->i2c_adap, addr_list[0], 0,
+				   I2C_SMBUS_READ, 0, I2C_SMBUS_QUICK,
+				   NULL) >= 0) {
+			info.addr = addr_list[0];
+			i2c_new_device(&bus->i2c_adap, &info);
+		}
 	}
 
 	return bus->i2c_rc;
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/cx88/cx88-i2c.c
+++ linux-mvl-dove-2.6.32/drivers/media/video/cx88/cx88-i2c.c
@@ -188,10 +188,24 @@
 			0x18, 0x6b, 0x71,
 			I2C_CLIENT_END
 		};
+		const unsigned short *addrp;
 
 		memset(&info, 0, sizeof(struct i2c_board_info));
 		strlcpy(info.type, "ir_video", I2C_NAME_SIZE);
-		i2c_new_probed_device(&core->i2c_adap, &info, addr_list);
+		/*
+		 * We can't call i2c_new_probed_device() because it uses
+		 * quick writes for probing and at least some R receiver
+		 * devices only reply to reads.
+		 */
+		for (addrp = addr_list; *addrp != I2C_CLIENT_END; addrp++) {
+			if (i2c_smbus_xfer(&core->i2c_adap, *addrp, 0,
+					   I2C_SMBUS_READ, 0,
+					   I2C_SMBUS_QUICK, NULL) >= 0) {
+				info.addr = *addrp;
+				i2c_new_device(&core->i2c_adap, &info);
+				break;
+			}
+		}
 	}
 	return core->i2c_rc;
 }
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/bt8xx/bttvp.h
+++ linux-mvl-dove-2.6.32/drivers/media/video/bt8xx/bttvp.h
@@ -279,6 +279,7 @@
 extern unsigned int bttv_gpio;
 extern void bttv_gpio_tracking(struct bttv *btv, char *comment);
 extern int init_bttv_i2c(struct bttv *btv);
+extern void init_bttv_i2c_ir(struct bttv *btv);
 extern int fini_bttv_i2c(struct bttv *btv);
 
 #define bttv_printk if (bttv_verbose) printk
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/bt8xx/bttv-driver.c
+++ linux-mvl-dove-2.6.32/drivers/media/video/bt8xx/bttv-driver.c
@@ -3532,7 +3532,7 @@
 	if (0 != t->index)
 		return -EINVAL;
 
-	bttv_call_all(btv, tuner, g_tuner, t);
+	bttv_call_all(btv, tuner, s_tuner, t);
 	return 0;
 }
 
@@ -4468,6 +4468,7 @@
 		request_modules(btv);
 	}
 
+	init_bttv_i2c_ir(btv);
 	bttv_input_init(btv);
 
 	/* everything is fine */
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/bt8xx/bttv-i2c.c
+++ linux-mvl-dove-2.6.32/drivers/media/video/bt8xx/bttv-i2c.c
@@ -388,7 +388,12 @@
 	if (0 == btv->i2c_rc && i2c_scan)
 		do_i2c_scan(btv->c.v4l2_dev.name, &btv->i2c_client);
 
-	/* Instantiate the IR receiver device, if present */
+	return btv->i2c_rc;
+}
+
+/* Instantiate the I2C IR receiver device, if present */
+void __devinit init_bttv_i2c_ir(struct bttv *btv)
+{
 	if (0 == btv->i2c_rc) {
 		struct i2c_board_info info;
 		/* The external IR receiver is at i2c address 0x34 (0x35 for
@@ -408,7 +413,6 @@
 		strlcpy(info.type, "ir_video", I2C_NAME_SIZE);
 		i2c_new_probed_device(&btv->c.i2c_adap, &info, addr_list);
 	}
-	return btv->i2c_rc;
 }
 
 int __devexit fini_bttv_i2c(struct bttv *btv)
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/gspca/sn9c20x.c
+++ linux-mvl-dove-2.6.32/drivers/media/video/gspca/sn9c20x.c
@@ -2319,7 +2319,7 @@
 		}
 	}
 	if (avg_lum > MAX_AVG_LUM) {
-		if (sd->gain - 1 >= 0) {
+		if (sd->gain >= 1) {
 			sd->gain--;
 			set_gain(gspca_dev);
 		}
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/gspca/mr97310a.c
+++ linux-mvl-dove-2.6.32/drivers/media/video/gspca/mr97310a.c
@@ -530,6 +530,12 @@
 			{0x13, 0x00, {0x01}, 1},
 			{0, 0, {0}, 0}
 		};
+		/* Without this command the cam won't work with USB-UHCI */
+		gspca_dev->usb_buf[0] = 0x0a;
+		gspca_dev->usb_buf[1] = 0x00;
+		err_code = mr_write(gspca_dev, 2);
+		if (err_code < 0)
+			return err_code;
 		err_code = sensor_write_regs(gspca_dev, cif_sensor1_init_data,
 					 ARRAY_SIZE(cif_sensor1_init_data));
 	}
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/gspca/sunplus.c
+++ linux-mvl-dove-2.6.32/drivers/media/video/gspca/sunplus.c
@@ -705,7 +705,7 @@
 		rc = spca504B_PollingDataReady(gspca_dev);
 
 		/* Init the cam width height with some values get on init ? */
-		reg_w_riv(dev, 0x31, 0, 0x04);
+		reg_w_riv(dev, 0x31, 0x04, 0);
 		spca504B_WaitCmdStatus(gspca_dev);
 		rc = spca504B_PollingDataReady(gspca_dev);
 		break;
@@ -807,14 +807,14 @@
 	default:
 /*	case BRIDGE_SPCA533: */
 /*	case BRIDGE_SPCA504B: */
-		reg_w_riv(dev, 0, 0x00, 0x21ad);	/* hue */
-		reg_w_riv(dev, 0, 0x01, 0x21ac);	/* sat/hue */
-		reg_w_riv(dev, 0, 0x00, 0x21a3);	/* gamma */
+		reg_w_riv(dev, 0, 0x21ad, 0x00);	/* hue */
+		reg_w_riv(dev, 0, 0x21ac, 0x01);	/* sat/hue */
+		reg_w_riv(dev, 0, 0x21a3, 0x00);	/* gamma */
 		break;
 	case BRIDGE_SPCA536:
-		reg_w_riv(dev, 0, 0x40, 0x20f5);
-		reg_w_riv(dev, 0, 0x01, 0x20f4);
-		reg_w_riv(dev, 0, 0x00, 0x2089);
+		reg_w_riv(dev, 0, 0x20f5, 0x40);
+		reg_w_riv(dev, 0, 0x20f4, 0x01);
+		reg_w_riv(dev, 0, 0x2089, 0x00);
 		break;
 	}
 	if (pollreg)
@@ -888,11 +888,11 @@
 	switch (sd->bridge) {
 	case BRIDGE_SPCA504B:
 		reg_w_riv(dev, 0x1d, 0x00, 0);
-		reg_w_riv(dev, 0, 0x01, 0x2306);
-		reg_w_riv(dev, 0, 0x00, 0x0d04);
-		reg_w_riv(dev, 0, 0x00, 0x2000);
-		reg_w_riv(dev, 0, 0x13, 0x2301);
-		reg_w_riv(dev, 0, 0x00, 0x2306);
+		reg_w_riv(dev, 0, 0x2306, 0x01);
+		reg_w_riv(dev, 0, 0x0d04, 0x00);
+		reg_w_riv(dev, 0, 0x2000, 0x00);
+		reg_w_riv(dev, 0, 0x2301, 0x13);
+		reg_w_riv(dev, 0, 0x2306, 0x00);
 		/* fall thru */
 	case BRIDGE_SPCA533:
 		spca504B_PollingDataReady(gspca_dev);
@@ -1011,7 +1011,7 @@
 			spca504B_WaitCmdStatus(gspca_dev);
 			break;
 		default:
-			reg_w_riv(dev, 0x31, 0, 0x04);
+			reg_w_riv(dev, 0x31, 0x04, 0);
 			spca504B_WaitCmdStatus(gspca_dev);
 			spca504B_PollingDataReady(gspca_dev);
 			break;
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/gspca/ov519.c
+++ linux-mvl-dove-2.6.32/drivers/media/video/gspca/ov519.c
@@ -1056,6 +1056,8 @@
 			sd->gspca_dev.usb_buf, 1, 500);
 	if (ret < 0)
 		PDEBUG(D_ERR, "Write reg [%02x] %02x failed", index, value);
+
+	msleep(1);
 	return ret;
 }
 
@@ -1076,6 +1078,8 @@
 		ret = sd->gspca_dev.usb_buf[0];
 	else
 		PDEBUG(D_ERR, "Read reg [0x%02x] failed", index);
+
+	msleep(1);
 	return ret;
 }
 
@@ -1095,6 +1099,8 @@
 		ret = sd->gspca_dev.usb_buf[0];
 	else
 		PDEBUG(D_ERR, "Read reg 8 [0x%02x] failed", index);
+
+	msleep(1);
 	return ret;
 }
 
@@ -1453,6 +1459,7 @@
 		if (i2c_r(sd, 0x00) < 0)
 			return -EIO;
 	}
+    PDEBUG(D_PROBE, "init_ov_sensor failed after %d attempt(s)", i);
 	return -EIO;
 }
 
@@ -3364,6 +3371,7 @@
 	{USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 },
 	{USB_DEVICE(0x041e, 0x4064),
 	 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
+	{USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 },
 	{USB_DEVICE(0x041e, 0x4068),
 	 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
 	{USB_DEVICE(0x045e, 0x028c), .driver_info = BRIDGE_OV519 },
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/gspca/stv06xx/stv06xx.c
+++ linux-mvl-dove-2.6.32/drivers/media/video/gspca/stv06xx/stv06xx.c
@@ -497,8 +497,6 @@
 	{USB_DEVICE(0x046D, 0x08F5), .driver_info = BRIDGE_ST6422 },
 	/* QuickCam Messenger (new) */
 	{USB_DEVICE(0x046D, 0x08F6), .driver_info = BRIDGE_ST6422 },
-	/* QuickCam Messenger (new) */
-	{USB_DEVICE(0x046D, 0x08DA), .driver_info = BRIDGE_ST6422 },
 	{}
 };
 MODULE_DEVICE_TABLE(usb, device_table);
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/zc0301/zc0301_sensor.h
+++ linux-mvl-dove-2.6.32/drivers/media/video/zc0301/zc0301_sensor.h
@@ -62,7 +62,6 @@
 #define ZC0301_ID_TABLE                                                       \
 static const struct usb_device_id zc0301_id_table[] =  {                      \
 	{ ZC0301_USB_DEVICE(0x046d, 0x08ae, 0xff), }, /* PAS202 */            \
-	{ ZC0301_USB_DEVICE(0x0ac8, 0x303b, 0xff), }, /* PB-0330 */           \
 	{ }                                                                   \
 };
 #else
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/sn9c102/sn9c102_core.c
+++ linux-mvl-dove-2.6.32/drivers/media/video/sn9c102/sn9c102_core.c
@@ -1430,9 +1430,9 @@
 		   sn9c102_show_i2c_reg, sn9c102_store_i2c_reg);
 static DEVICE_ATTR(i2c_val, S_IRUGO | S_IWUSR,
 		   sn9c102_show_i2c_val, sn9c102_store_i2c_val);
-static DEVICE_ATTR(green, S_IWUGO, NULL, sn9c102_store_green);
-static DEVICE_ATTR(blue, S_IWUGO, NULL, sn9c102_store_blue);
-static DEVICE_ATTR(red, S_IWUGO, NULL, sn9c102_store_red);
+static DEVICE_ATTR(green, S_IWUSR, NULL, sn9c102_store_green);
+static DEVICE_ATTR(blue, S_IWUSR, NULL, sn9c102_store_blue);
+static DEVICE_ATTR(red, S_IWUSR, NULL, sn9c102_store_red);
 static DEVICE_ATTR(frame_header, S_IRUGO, sn9c102_show_frame_header, NULL);
 
 
--- linux-mvl-dove-2.6.32.orig/drivers/media/video/pvrusb2/pvrusb2-hdw.c
+++ linux-mvl-dove-2.6.32/drivers/media/video/pvrusb2/pvrusb2-hdw.c
@@ -2979,6 +2979,8 @@
 	if (hdw->input_dirty || hdw->audiomode_dirty || hdw->force_dirty) {
 		struct v4l2_tuner vt;
 		memset(&vt, 0, sizeof(vt));
+		vt.type = (hdw->input_val == PVR2_CVAL_INPUT_RADIO) ?
+			V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
 		vt.audmode = hdw->audiomode_val;
 		v4l2_device_call_all(&hdw->v4l2_dev, 0, tuner, s_tuner, &vt);
 	}
@@ -5064,6 +5066,8 @@
 {
 	struct v4l2_tuner *vtp = &hdw->tuner_signal_info;
 	memset(vtp, 0, sizeof(*vtp));
+	vtp->type = (hdw->input_val == PVR2_CVAL_INPUT_RADIO) ?
+		V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
 	hdw->tuner_signal_stale = 0;
 	/* Note: There apparently is no replacement for VIDIOC_CROPCAP
 	   using v4l2-subdev - therefore we can't support that AT ALL right
--- linux-mvl-dove-2.6.32.orig/drivers/media/dvb/b2c2/flexcop-pci.c
+++ linux-mvl-dove-2.6.32/drivers/media/dvb/b2c2/flexcop-pci.c
@@ -38,7 +38,7 @@
 	DEBSTATUS);
 
 #define DRIVER_VERSION "0.1"
-#define DRIVER_NAME "Technisat/B2C2 FlexCop II/IIb/III Digital TV PCI Driver"
+#define DRIVER_NAME "flexcop-pci"
 #define DRIVER_AUTHOR "Patrick Boettcher <patrick.boettcher@desy.de>"
 
 struct flexcop_pci {
--- linux-mvl-dove-2.6.32.orig/drivers/media/dvb/ttpci/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/media/dvb/ttpci/Kconfig
@@ -68,13 +68,14 @@
 	select DVB_VES1820 if !DVB_FE_CUSTOMISE
 	select DVB_L64781 if !DVB_FE_CUSTOMISE
 	select DVB_TDA8083 if !DVB_FE_CUSTOMISE
-	select DVB_TDA10021 if !DVB_FE_CUSTOMISE
-	select DVB_TDA10023 if !DVB_FE_CUSTOMISE
 	select DVB_S5H1420 if !DVB_FE_CUSTOMISE
 	select DVB_TDA10086 if !DVB_FE_CUSTOMISE
 	select DVB_TDA826X if !DVB_FE_CUSTOMISE
 	select DVB_LNBP21 if !DVB_FE_CUSTOMISE
 	select DVB_TDA1004X if !DVB_FE_CUSTOMISE
+	select DVB_ISL6423 if !DVB_FE_CUSTOMISE
+	select DVB_STV090x if !DVB_FE_CUSTOMISE
+	select DVB_STV6110x if !DVB_FE_CUSTOMISE
 	help
 	  Support for simple SAA7146 based DVB cards (so called Budget-
 	  or Nova-PCI cards) without onboard MPEG2 decoder, and without
--- linux-mvl-dove-2.6.32.orig/drivers/media/dvb/ttpci/av7110_ca.c
+++ linux-mvl-dove-2.6.32/drivers/media/dvb/ttpci/av7110_ca.c
@@ -277,7 +277,7 @@
 	{
 		ca_slot_info_t *info=(ca_slot_info_t *)parg;
 
-		if (info->num > 1)
+		if (info->num < 0 || info->num > 1)
 			return -EINVAL;
 		av7110->ci_slot[info->num].num = info->num;
 		av7110->ci_slot[info->num].type = FW_CI_LL_SUPPORT(av7110->arm_app) ?
--- linux-mvl-dove-2.6.32.orig/drivers/media/dvb/ttpci/budget.c
+++ linux-mvl-dove-2.6.32/drivers/media/dvb/ttpci/budget.c
@@ -643,9 +643,6 @@
 					&budget->i2c_adap,
 					&tt1600_isl6423_config);
 
-			} else {
-				dvb_frontend_detach(budget->dvb_frontend);
-				budget->dvb_frontend = NULL;
 			}
 		}
 		break;
--- linux-mvl-dove-2.6.32.orig/drivers/media/dvb/siano/smsusb.c
+++ linux-mvl-dove-2.6.32/drivers/media/dvb/siano/smsusb.c
@@ -533,8 +533,18 @@
 		.driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
 	{ USB_DEVICE(0x2040, 0xb910),
 		.driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
+	{ USB_DEVICE(0x2040, 0xb980),
+		.driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
+	{ USB_DEVICE(0x2040, 0xb990),
+		.driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
 	{ USB_DEVICE(0x2040, 0xc000),
 		.driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
+	{ USB_DEVICE(0x2040, 0xc010),
+		.driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
+	{ USB_DEVICE(0x2040, 0xc080),
+		.driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
+	{ USB_DEVICE(0x2040, 0xc090),
+		.driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
 	{ } /* Terminating entry */
 	};
 
--- linux-mvl-dove-2.6.32.orig/drivers/media/dvb/dvb-core/dvb_net.c
+++ linux-mvl-dove-2.6.32/drivers/media/dvb/dvb-core/dvb_net.c
@@ -350,6 +350,7 @@
 	const u8 *ts, *ts_end, *from_where = NULL;
 	u8 ts_remain = 0, how_much = 0, new_ts = 1;
 	struct ethhdr *ethh = NULL;
+	bool error = false;
 
 #ifdef ULE_DEBUG
 	/* The code inside ULE_DEBUG keeps a history of the last 100 TS cells processed. */
@@ -459,10 +460,16 @@
 
 						/* Drop partly decoded SNDU, reset state, resync on PUSI. */
 						if (priv->ule_skb) {
-							dev_kfree_skb( priv->ule_skb );
+							error = true;
+							dev_kfree_skb(priv->ule_skb);
+						}
+
+						if (error || priv->ule_sndu_remain) {
 							dev->stats.rx_errors++;
 							dev->stats.rx_frame_errors++;
+							error = false;
 						}
+
 						reset_ule(priv);
 						priv->need_pusi = 1;
 						continue;
@@ -504,6 +511,7 @@
 				       "bytes left in TS.  Resyncing.\n", ts_remain);
 				priv->ule_sndu_len = 0;
 				priv->need_pusi = 1;
+				ts += TS_SZ;
 				continue;
 			}
 
@@ -533,6 +541,7 @@
 				from_where += 2;
 			}
 
+			priv->ule_sndu_remain = priv->ule_sndu_len + 2;
 			/*
 			 * State of current TS:
 			 *   ts_remain (remaining bytes in the current TS cell)
@@ -542,6 +551,7 @@
 			 */
 			switch (ts_remain) {
 				case 1:
+					priv->ule_sndu_remain--;
 					priv->ule_sndu_type = from_where[0] << 8;
 					priv->ule_sndu_type_1 = 1; /* first byte of ule_type is set. */
 					ts_remain -= 1; from_where += 1;
@@ -555,6 +565,7 @@
 				default: /* complete ULE header is present in current TS. */
 					/* Extract ULE type field. */
 					if (priv->ule_sndu_type_1) {
+						priv->ule_sndu_type_1 = 0;
 						priv->ule_sndu_type |= from_where[0];
 						from_where += 1; /* points to payload start. */
 						ts_remain -= 1;
--- linux-mvl-dove-2.6.32.orig/drivers/media/dvb/dvb-core/dmxdev.c
+++ linux-mvl-dove-2.6.32/drivers/media/dvb/dvb-core/dmxdev.c
@@ -761,7 +761,6 @@
 	dvb_ringbuffer_init(&dmxdevfilter->buffer, NULL, 8192);
 	dmxdevfilter->type = DMXDEV_TYPE_NONE;
 	dvb_dmxdev_filter_state_set(dmxdevfilter, DMXDEV_STATE_ALLOCATED);
-	INIT_LIST_HEAD(&dmxdevfilter->feed.ts);
 	init_timer(&dmxdevfilter->timer);
 
 	dvbdev->users++;
@@ -887,6 +886,7 @@
 	dmxdevfilter->type = DMXDEV_TYPE_PES;
 	memcpy(&dmxdevfilter->params, params,
 	       sizeof(struct dmx_pes_filter_params));
+	INIT_LIST_HEAD(&dmxdevfilter->feed.ts);
 
 	dvb_dmxdev_filter_state_set(dmxdevfilter, DMXDEV_STATE_SET);
 
--- linux-mvl-dove-2.6.32.orig/drivers/media/dvb/dvb-usb/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/media/dvb/dvb-usb/Kconfig
@@ -112,8 +112,8 @@
 	select DVB_MT352 if !DVB_FE_CUSTOMISE
 	select DVB_ZL10353 if !DVB_FE_CUSTOMISE
 	select DVB_DIB7000P if !DVB_FE_CUSTOMISE
-	select DVB_LGS8GL5 if !DVB_FE_CUSTOMISE
 	select DVB_TUNER_DIB0070 if !DVB_FE_CUSTOMISE
+	select DVB_LGS8GXX if !DVB_FE_CUSTOMISE
 	select MEDIA_TUNER_SIMPLE if !MEDIA_TUNER_CUSTOMISE
 	select MEDIA_TUNER_XC2028 if !MEDIA_TUNER_CUSTOMISE
 	select MEDIA_TUNER_MXL5005S if !MEDIA_TUNER_CUSTOMISE
--- linux-mvl-dove-2.6.32.orig/drivers/media/dvb/dvb-usb/dib0700_devices.c
+++ linux-mvl-dove-2.6.32/drivers/media/dvb/dvb-usb/dib0700_devices.c
@@ -874,6 +874,43 @@
 	{ 0x1d37, KEY_RECORD },
 	{ 0x1d3b, KEY_GOTO },
 	{ 0x1d3d, KEY_POWER },
+
+	/* Key codes for the Elgato EyeTV Diversity silver remote,
+	   set dvb_usb_dib0700_ir_proto=0 */
+	{ 0x4501, KEY_POWER },
+	{ 0x4502, KEY_MUTE },
+	{ 0x4503, KEY_1 },
+	{ 0x4504, KEY_2 },
+	{ 0x4505, KEY_3 },
+	{ 0x4506, KEY_4 },
+	{ 0x4507, KEY_5 },
+	{ 0x4508, KEY_6 },
+	{ 0x4509, KEY_7 },
+	{ 0x450a, KEY_8 },
+	{ 0x450b, KEY_9 },
+	{ 0x450c, KEY_LAST },
+	{ 0x450d, KEY_0 },
+	{ 0x450e, KEY_ENTER },
+	{ 0x450f, KEY_RED },
+	{ 0x4510, KEY_CHANNELUP },
+	{ 0x4511, KEY_GREEN },
+	{ 0x4512, KEY_VOLUMEDOWN },
+	{ 0x4513, KEY_OK },
+	{ 0x4514, KEY_VOLUMEUP },
+	{ 0x4515, KEY_YELLOW },
+	{ 0x4516, KEY_CHANNELDOWN },
+	{ 0x4517, KEY_BLUE },
+	{ 0x4518, KEY_LEFT }, /* Skip backwards */
+	{ 0x4519, KEY_PLAYPAUSE },
+	{ 0x451a, KEY_RIGHT }, /* Skip forward */
+	{ 0x451b, KEY_REWIND },
+	{ 0x451c, KEY_L }, /* Live */
+	{ 0x451d, KEY_FASTFORWARD },
+	{ 0x451e, KEY_STOP }, /* 'Reveal' for Teletext */
+	{ 0x451f, KEY_MENU }, /* KEY_TEXT for Teletext */
+	{ 0x4540, KEY_RECORD }, /* Font 'Size' for Teletext */
+	{ 0x4541, KEY_SCREEN }, /*  Full screen toggle, 'Hold' for Teletext */
+	{ 0x4542, KEY_SELECT }, /* Select video input, 'Select' for Teletext */
 };
 
 /* STK7700P: Hauppauge Nova-T Stick, AVerMedia Volar */
@@ -1861,6 +1898,7 @@
 	{ USB_DEVICE(USB_VID_DIBCOM,    USB_PID_DIBCOM_STK807XPVR) },
 	{ USB_DEVICE(USB_VID_DIBCOM,    USB_PID_DIBCOM_STK807XP) },
 	{ USB_DEVICE(USB_VID_PIXELVIEW, USB_PID_PIXELVIEW_SBTVD) },
+	{ USB_DEVICE(USB_VID_ELGATO,    USB_PID_ELGATO_EYETV_DIVERSITY) },
 	{ 0 }		/* Terminating entry */
 };
 MODULE_DEVICE_TABLE(usb, dib0700_usb_id_table);
@@ -2173,7 +2211,7 @@
 			}
 		},
 
-		.num_device_descs = 6,
+		.num_device_descs = 7,
 		.devices = {
 			{   "DiBcom STK7070PD reference design",
 				{ &dib0700_usb_id_table[17], NULL },
@@ -2199,7 +2237,11 @@
 			{  "Sony PlayTV",
 				{ &dib0700_usb_id_table[44], NULL },
 				{ NULL },
-			}
+			},
+			{   "Elgato EyeTV Diversity",
+				{ &dib0700_usb_id_table[64], NULL },
+				{ NULL },
+			},
 		},
 		.rc_interval      = DEFAULT_RC_INTERVAL,
 		.rc_key_map       = dib0700_rc_keys,
--- linux-mvl-dove-2.6.32.orig/drivers/media/dvb/dvb-usb/dvb-usb-ids.h
+++ linux-mvl-dove-2.6.32/drivers/media/dvb/dvb-usb/dvb-usb-ids.h
@@ -271,6 +271,7 @@
 #define USB_PID_TELESTAR_STARSTICK_2			0x8000
 #define USB_PID_MSI_DIGI_VOX_MINI_III                   0x8807
 #define USB_PID_SONY_PLAYTV				0x0003
+#define USB_PID_ELGATO_EYETV_DIVERSITY			0x0011
 #define USB_PID_ELGATO_EYETV_DTT			0x0021
 #define USB_PID_ELGATO_EYETV_DTT_Dlx			0x0020
 #define USB_PID_DVB_T_USB_STICK_HIGH_SPEED_COLD		0x5000
--- linux-mvl-dove-2.6.32.orig/drivers/media/dvb/frontends/l64781.c
+++ linux-mvl-dove-2.6.32/drivers/media/dvb/frontends/l64781.c
@@ -192,8 +192,8 @@
 	spi_bias *= qam_tab[p->constellation];
 	spi_bias /= p->code_rate_HP + 1;
 	spi_bias /= (guard_tab[p->guard_interval] + 32);
-	spi_bias *= 1000ULL;
-	spi_bias /= 1000ULL + ppm/1000;
+	spi_bias *= 1000;
+	spi_bias /= 1000 + ppm/1000;
 	spi_bias *= p->code_rate_HP;
 
 	val0x04 = (p->transmission_mode << 2) | p->guard_interval;
--- linux-mvl-dove-2.6.32.orig/drivers/media/radio/radio-aimslab.c
+++ linux-mvl-dove-2.6.32/drivers/media/radio/radio-aimslab.c
@@ -31,7 +31,7 @@
 #include <linux/module.h>	/* Modules 			*/
 #include <linux/init.h>		/* Initdata			*/
 #include <linux/ioport.h>	/* request_region		*/
-#include <linux/delay.h>	/* udelay			*/
+#include <linux/delay.h>	/* msleep			*/
 #include <linux/videodev2.h>	/* kernel radio structs		*/
 #include <linux/version.h>	/* for KERNEL_VERSION MACRO	*/
 #include <linux/io.h>		/* outb, outb_p			*/
@@ -71,27 +71,17 @@
 
 /* local things */
 
-static void sleep_delay(long n)
-{
-	/* Sleep nicely for 'n' uS */
-	int d = n / msecs_to_jiffies(1000);
-	if (!d)
-		udelay(n);
-	else
-		msleep(jiffies_to_msecs(d));
-}
-
 static void rt_decvol(struct rtrack *rt)
 {
 	outb(0x58, rt->io);		/* volume down + sigstr + on	*/
-	sleep_delay(100000);
+	msleep(100);
 	outb(0xd8, rt->io);		/* volume steady + sigstr + on	*/
 }
 
 static void rt_incvol(struct rtrack *rt)
 {
 	outb(0x98, rt->io);		/* volume up + sigstr + on	*/
-	sleep_delay(100000);
+	msleep(100);
 	outb(0xd8, rt->io);		/* volume steady + sigstr + on	*/
 }
 
@@ -120,7 +110,7 @@
 
 	if (vol == 0) {			/* volume = 0 means mute the card */
 		outb(0x48, rt->io);	/* volume down but still "on"	*/
-		sleep_delay(2000000);	/* make sure it's totally down	*/
+		msleep(2000);	/* make sure it's totally down	*/
 		outb(0xd0, rt->io);	/* volume steady, off		*/
 		rt->curvol = 0;		/* track the volume state!	*/
 		mutex_unlock(&rt->lock);
@@ -155,7 +145,7 @@
 		outb_p(128+64+16+8+  1, rt->io);  /* on + wr-enable + data low */
 		outb_p(128+64+16+8+2+1, rt->io);  /* clock */
 	}
-	sleep_delay(1000);
+	msleep(1);
 }
 
 static void send_1_byte(struct rtrack *rt)
@@ -169,7 +159,7 @@
 		outb_p(128+64+16+8+4+2+1, rt->io); /* clock */
 	}
 
-	sleep_delay(1000);
+	msleep(1);
 }
 
 static int rt_setfreq(struct rtrack *rt, unsigned long freq)
@@ -423,7 +413,7 @@
 
 	/* this ensures that the volume is all the way down  */
 	outb(0x48, rt->io);		/* volume down but still "on"	*/
-	sleep_delay(2000000);	/* make sure it's totally down	*/
+	msleep(2000);	/* make sure it's totally down	*/
 	outb(0xc0, rt->io);		/* steady volume, mute card	*/
 
 	return 0;
--- linux-mvl-dove-2.6.32.orig/drivers/media/radio/si4713-i2c.c
+++ linux-mvl-dove-2.6.32/drivers/media/radio/si4713-i2c.c
@@ -1003,7 +1003,7 @@
 		char ps_name[MAX_RDS_PS_NAME + 1];
 
 		len = control->size - 1;
-		if (len > MAX_RDS_PS_NAME) {
+		if (len < 0 || len > MAX_RDS_PS_NAME) {
 			rval = -ERANGE;
 			goto exit;
 		}
@@ -1025,7 +1025,7 @@
 		char radio_text[MAX_RDS_RADIO_TEXT + 1];
 
 		len = control->size - 1;
-		if (len > MAX_RDS_RADIO_TEXT) {
+		if (len < 0 || len > MAX_RDS_RADIO_TEXT) {
 			rval = -ERANGE;
 			goto exit;
 		}
--- linux-mvl-dove-2.6.32.orig/drivers/spi/mv_spi.c
+++ linux-mvl-dove-2.6.32/drivers/spi/mv_spi.c
@@ -0,0 +1,626 @@
+/*
+ * mv_spi.c -- Marvell SPI controller driver
+ *
+ * Author: Saeed Bishara <saeed@marvell.com>
+ * Copyright (C) 2007-2008 Marvell Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/mv_spi.h>
+#include <asm/unaligned.h>
+
+#define DRIVER_NAME			"mv_spi"
+
+#define MV_NUM_CHIPSELECTS		2 /* only one slave is supported*/
+#define MV_SPI_WAIT_RDY_MAX_LOOP	10000 /* in usec */
+#define MV_SPI_MAX_TRANS_SIZE		32
+#define MV_SPI_CTRL_REG		0x180
+#define  MV_SPI_CTRL_START	(1 << 0) /* start transfer */
+#define  MV_SPI_CTRL_3W4W	(1 << 1) /* 0 - 4 wire, 1 - 3 wire */
+#define  MV_SPI_CTRL_SEL	(1 << 2) /* SPI slave select */
+#define  MV_SPI_CTRL_ENABLE	(1 << 3) /* SPI enable */
+#define  MV_SPI_CTRL_TX_LSB	(1 << 4) /* 1 - tx from bit 0 to higher */
+#define  MV_SPI_CTRL_RX_LSB	(1 << 5) /* 1 - rx from bit 0 to higher */
+#define  MV_SPI_CTRL_PHA	(1 << 7) /* 1 - sample at falling edge */
+#define  MV_SPI_CTRL_TX_BITS	(0xFF << 8) /* tx bits */
+#define  MV_SPI_CTRL_RX_BITS	(0xFF << 16) /* rx bits */
+#define  MV_SPI_CTRL_CLKDIV	(0xFF << 24) /* Clock Divider */
+
+#define MV_SPI_TX_DATA_REG		0x184
+#define MV_SPI_RX_DATA_REG		0x140
+#define MV_LCD_CLK_DIV_REG		0x1A8
+#define MV_LCD_CLK_DIV_MASK		0xFFFF
+#define MV_LCD_INT_STATUS_REG		0x1c4
+#define  MV_LCD_INT_STATUS_SPI_DONE	(1 << 18)
+
+
+struct mv_spi {
+	struct work_struct	work;
+
+	/* Lock access to transfer list.	*/
+	spinlock_t		lock;
+
+	struct list_head	msg_queue;
+	struct spi_master	*master;
+	void __iomem		*base;
+	unsigned int		max_speed;
+	unsigned int		min_speed;
+	struct mv_spi_info	*spi_info;
+};
+
+static struct workqueue_struct *mv_spi_wq;
+
+static inline void __iomem *spi_reg(struct mv_spi *mv_spi, u32 reg)
+{
+	return mv_spi->base + reg;
+}
+
+static inline void
+mv_spi_setbits(struct mv_spi *mv_spi, u32 reg, u32 mask)
+{
+	void __iomem *reg_addr = spi_reg(mv_spi, reg);
+	u32 val;
+
+	val = readl(reg_addr);
+	val |= mask;
+	writel(val, reg_addr);
+}
+
+static inline void
+mv_spi_clrbits(struct mv_spi *mv_spi, u32 reg, u32 mask)
+{
+	void __iomem *reg_addr = spi_reg(mv_spi, reg);
+	u32 val;
+
+	val = readl(reg_addr);
+	val &= ~mask;
+	writel(val, reg_addr);
+}
+
+static int mv_spi_baudrate_set(struct spi_device *spi, unsigned int speed)
+{
+	u32 clk_hz;
+	u32 rate;
+	u32 reg;
+	unsigned int lcd_clk_div;
+	struct mv_spi *mv_spi;
+
+	mv_spi = spi_master_get_devdata(spi->master);
+
+	clk_hz = mv_spi->spi_info->clk;
+	/* the spi clock drived from LCD fast clock/CLK_INT_DIV */
+	lcd_clk_div = readl(spi_reg(mv_spi, MV_LCD_CLK_DIV_REG));
+	lcd_clk_div &= MV_LCD_CLK_DIV_MASK;
+	clk_hz /= lcd_clk_div;
+
+
+	/*
+	 * the supported clock div value from 2 up to 0xFF
+	 * round up as we look for equal or less speed
+	 */
+	rate = DIV_ROUND_UP(clk_hz, speed);
+
+	/* check if requested speed is too small */
+	if (rate > 0xFF)
+		return -EINVAL;
+
+	if (rate < 2)
+		rate = 2;
+
+	reg = readl(spi_reg(mv_spi, MV_SPI_CTRL_REG));
+	reg = ((reg & ~MV_SPI_CTRL_CLKDIV) | (rate << 24));
+	writel(reg, spi_reg(mv_spi, MV_SPI_CTRL_REG));
+
+	return 0;
+}
+
+/*
+ * called only when no transfer is active on the bus
+ */
+static int
+mv_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
+{
+	struct mv_spi *mv_spi;
+	unsigned int speed = spi->max_speed_hz;
+	unsigned int bits_per_word = spi->bits_per_word;
+	int	rc;
+
+	mv_spi = spi_master_get_devdata(spi->master);
+
+	if ((t != NULL) && t->speed_hz)
+		speed = t->speed_hz;
+
+	if ((t != NULL) && t->bits_per_word)
+		bits_per_word = t->bits_per_word;
+
+	rc = mv_spi_baudrate_set(spi, speed);
+
+	return rc;
+}
+
+static void mv_spi_set_cs(struct mv_spi *mv_spi, int enable)
+{
+	if (enable)
+		mv_spi_setbits(mv_spi, MV_SPI_CTRL_REG, MV_SPI_CTRL_SEL);
+	else
+		mv_spi_clrbits(mv_spi, MV_SPI_CTRL_REG, MV_SPI_CTRL_SEL);
+
+}
+
+static inline int mv_spi_wait_till_ready(struct mv_spi *mv_spi)
+{
+	int i;
+
+	for (i = 0; i < MV_SPI_WAIT_RDY_MAX_LOOP; i++) {
+		u32 int_status = readl(spi_reg(mv_spi, MV_LCD_INT_STATUS_REG));
+		
+		if (int_status & MV_LCD_INT_STATUS_SPI_DONE)
+			return 1;
+		else
+			udelay(1);
+	}
+
+	return -1;
+}
+
+static inline int
+mv_spi_write_read_8bit(struct spi_device *spi,
+			  const u8 **tx_buf, u8 **rx_buf)
+{
+	void __iomem *tx_reg, *rx_reg, *int_reg;
+	struct mv_spi *mv_spi;
+
+	mv_spi = spi_master_get_devdata(spi->master);
+	tx_reg = spi_reg(mv_spi, MV_SPI_TX_DATA_REG);
+	rx_reg = spi_reg(mv_spi, MV_SPI_RX_DATA_REG);
+	int_reg = spi_reg(mv_spi, MV_LCD_INT_STATUS_REG);
+
+	/* clear the interrupt cause register */
+	writel(~MV_LCD_INT_STATUS_SPI_DONE, int_reg);
+
+	if (tx_buf && *tx_buf) {
+		writel(*(*tx_buf)++ , tx_reg);
+		mv_spi_setbits(mv_spi, MV_SPI_CTRL_REG, 0x7 << 8);
+	}
+	else
+		mv_spi_clrbits(mv_spi, MV_SPI_CTRL_REG, 0xFF << 8);
+
+	if (rx_buf && *rx_buf)
+		mv_spi_setbits(mv_spi, MV_SPI_CTRL_REG, 0x7 << 16);
+	else
+		mv_spi_clrbits(mv_spi, MV_SPI_CTRL_REG, 0xFF << 16);
+
+	mv_spi_setbits(mv_spi, MV_SPI_CTRL_REG, MV_SPI_CTRL_START);
+
+	if (mv_spi_wait_till_ready(mv_spi) < 0) {
+		dev_err(&spi->dev, "TXS timed out\n");
+		dev_err(&spi->dev, "SPI CTRL %x\n", 
+			readl(spi_reg(mv_spi, MV_SPI_CTRL_REG)));
+		return -1;
+	}
+	mv_spi_clrbits(mv_spi, MV_SPI_CTRL_REG, MV_SPI_CTRL_START);
+	/* clear the interrupt cause register */
+	writel(~MV_LCD_INT_STATUS_SPI_DONE, int_reg);
+	if (rx_buf && *rx_buf)
+		*(*rx_buf)++ = readl(rx_reg);
+
+	return 1;
+}
+#if 0
+static inline int
+mv_spi_write_read_16bit(struct spi_device *spi,
+			  const u16 **tx_buf, u16 **rx_buf)
+{
+	void __iomem *tx_reg, *rx_reg, *int_reg;
+	struct mv_spi *mv_spi;
+
+	mv_spi = spi_master_get_devdata(spi->master);
+	tx_reg = spi_reg(mv_spi, MV_SPI_TX_DATA_REG);
+	rx_reg = spi_reg(mv_spi, MV_SPI_RX_DATA_REG);
+	int_reg = spi_reg(mv_spi, MV_LCD_INT_STATUS_REG);
+
+
+	/* clear the interrupt cause register */
+	writel(MV_LCD_INT_STATUS_SPI_DONE, int_reg);
+
+	if (tx_buf && *tx_buf) {
+		writel(*(*tx_buf)++ , tx_reg);
+		mv_spi_setbits(mv_spi, MV_SPI_CTRL_REG, 0xf << 8);
+	}
+	else {
+		mv_spi_clrbits(mv_spi, MV_SPI_CTRL_REG, 0xFF << 8);
+	}
+
+	if (rx_buf && *rx_buf) {
+		mv_spi_setbits(mv_spi, MV_SPI_CTRL_REG, 0xf << 16);
+	}
+	else {
+		mv_spi_clrbits(mv_spi, MV_SPI_CTRL_REG, 0xFF << 16);
+	}
+
+	mv_spi_setbits(mv_spi, MV_SPI_CTRL_REG, MV_SPI_CTRL_START);
+
+	if (mv_spi_wait_till_ready(mv_spi) < 0) {
+		dev_err(&spi->dev, "TXS timed out\n");
+		dev_err(&spi->dev, "SPI CTRL %x\n", readl(spi_reg(mv_spi, MV_SPI_CTRL_REG))  );
+		return -1;
+	}
+	mv_spi_clrbits(mv_spi, MV_SPI_CTRL_REG, MV_SPI_CTRL_START);
+	if (rx_buf && *rx_buf) {
+		u16 data = readl(rx_reg);
+
+		mdelay(10);
+		*(*rx_buf)++ = be16_to_cpu(data);
+	}
+
+	return 1;
+}
+#endif
+static unsigned int
+mv_spi_write_read(struct spi_device *spi, struct spi_transfer *xfer)
+{
+	struct mv_spi *mv_spi;
+	unsigned int count;
+	int word_len;
+
+	mv_spi = spi_master_get_devdata(spi->master);
+	word_len = spi->bits_per_word;
+	count = xfer->len;
+
+	if(xfer->bits_per_word)
+		word_len = xfer->bits_per_word;
+
+	if (word_len == 8) {
+		const u8 *tx = xfer->tx_buf;
+		u8 *rx = xfer->rx_buf;
+
+		do {
+			if (mv_spi_write_read_8bit(spi, &tx, &rx) < 0)
+				goto out;
+			count--;
+		} while (count);
+	}
+#if 0
+ else if (word_len == 16) {
+		const u16 *tx = xfer->tx_buf;
+		u16 *rx = xfer->rx_buf;
+
+		do {
+			if (mv_spi_write_read_16bit(spi, &tx, &rx) < 0)
+				goto out;
+			count -= 2;
+		} while (count);
+	}
+#endif
+out:
+	return xfer->len - count;
+}
+
+
+static void mv_spi_work(struct work_struct *work)
+{
+	struct mv_spi *mv_spi =
+		container_of(work, struct mv_spi, work);
+
+	spin_lock_irq(&mv_spi->lock);
+	while (!list_empty(&mv_spi->msg_queue)) {
+		struct spi_message *m;
+		struct spi_device *spi;
+		struct spi_transfer *t = NULL;
+		int par_override = 0;
+		int status = 0;
+		int cs_active = 0;
+
+		m = container_of(mv_spi->msg_queue.next, struct spi_message,
+				 queue);
+
+		list_del_init(&m->queue);
+		spin_unlock_irq(&mv_spi->lock);
+
+		spi = m->spi;
+
+		/* Load defaults */
+		status = mv_spi_setup_transfer(spi, NULL);
+
+		if (status < 0)
+			goto msg_done;
+
+		list_for_each_entry(t, &m->transfers, transfer_list) {
+			if (par_override || t->speed_hz || t->bits_per_word) {
+				par_override = 1;
+				status = mv_spi_setup_transfer(spi, t);
+				if (status < 0)
+					break;
+				if (!t->speed_hz && !t->bits_per_word)
+					par_override = 0;
+			}
+
+			if (!cs_active) {
+				mv_spi_set_cs(mv_spi, 0);
+				cs_active = 1;
+			}
+
+			if (t->len)
+				m->actual_length +=
+					mv_spi_write_read(spi, t);
+
+			if (t->delay_usecs)
+				udelay(t->delay_usecs);
+
+			if (t->cs_change) {
+				mv_spi_set_cs(mv_spi, 0);
+				cs_active = 0;
+			}
+		}
+
+msg_done:
+		if (cs_active)
+			mv_spi_set_cs(mv_spi, 0);
+
+		m->status = status;
+		m->complete(m->context);
+
+		spin_lock_irq(&mv_spi->lock);
+	}
+
+	spin_unlock_irq(&mv_spi->lock);
+}
+
+static int __devinit mv_spi_reset(struct mv_spi *mv_spi)
+{
+	/* Verify that the CS is deasserted */
+	mv_spi_set_cs(mv_spi, 0);
+
+	return 0;
+}
+
+static int mv_spi_setup(struct spi_device *spi)
+{
+	struct mv_spi *mv_spi;
+
+	mv_spi = spi_master_get_devdata(spi->master);
+
+	if (spi->mode) {
+		dev_err(&spi->dev, "setup: unsupported mode bits %x\n",
+			spi->mode);
+		return -EINVAL;
+	}
+
+	if (spi->bits_per_word == 0)
+		spi->bits_per_word = 8;
+
+	if ((spi->max_speed_hz == 0)
+			|| (spi->max_speed_hz > mv_spi->max_speed))
+		spi->max_speed_hz = mv_spi->max_speed;
+
+	if (spi->max_speed_hz < mv_spi->min_speed) {
+		dev_err(&spi->dev, "setup: requested speed too low %d Hz "
+			"(min speed %d Hz)\n", spi->max_speed_hz,
+			mv_spi->min_speed);
+		return -EINVAL;
+	}
+
+	/*
+	 * baudrate & width will be set mv_spi_setup_transfer
+	 */
+	return 0;
+}
+
+static int mv_spi_transfer(struct spi_device *spi, struct spi_message *m)
+{
+	struct mv_spi *mv_spi;
+	struct spi_transfer *t = NULL;
+	unsigned long flags;
+
+	m->actual_length = 0;
+	m->status = 0;
+
+	/* reject invalid messages and transfers */
+	if (list_empty(&m->transfers) || !m->complete)
+		return -EINVAL;
+
+	mv_spi = spi_master_get_devdata(spi->master);
+
+	list_for_each_entry(t, &m->transfers, transfer_list) {
+		unsigned int bits_per_word = spi->bits_per_word;
+
+		if (t->tx_buf == NULL && t->rx_buf == NULL && t->len) {
+			dev_err(&spi->dev,
+				"message rejected : "
+				"invalid transfer data buffers\n");
+			goto msg_rejected;
+		}
+
+		if ((t != NULL) && t->bits_per_word)
+			bits_per_word = t->bits_per_word;
+
+		if ((bits_per_word != 8) /*&& (bits_per_word != 16)*/) {
+			dev_err(&spi->dev,
+				"message rejected : "
+				"invalid transfer bits_per_word (%d bits)\n",
+				bits_per_word);
+			goto msg_rejected;
+		}
+
+		if (t->speed_hz && t->speed_hz < mv_spi->min_speed) {
+			dev_err(&spi->dev,
+				"message rejected : "
+				"device min speed (%d Hz) exceeds "
+				"required transfer speed (%d Hz)\n",
+				mv_spi->min_speed, t->speed_hz);
+			goto msg_rejected;
+		}
+	}
+
+
+	spin_lock_irqsave(&mv_spi->lock, flags);
+	list_add_tail(&m->queue, &mv_spi->msg_queue);
+	queue_work(mv_spi_wq, &mv_spi->work);
+	spin_unlock_irqrestore(&mv_spi->lock, flags);
+
+	return 0;
+msg_rejected:
+	/* Message rejected and not queued */
+	m->status = -EINVAL;
+	if (m->complete)
+		m->complete(m->context);
+	return -EINVAL;
+}
+
+int __devinit mv_spi_probe(struct platform_device *pdev)
+{
+	struct spi_master *master;
+	struct mv_spi *spi;
+	struct resource *r;
+	struct mv_spi_info *spi_info;
+	int status = 0;
+	unsigned int lcd_clk_div;
+
+	spi_info = pdev->dev.platform_data;
+
+	master = spi_alloc_master(&pdev->dev, sizeof *spi);
+	if (master == NULL) {
+		dev_dbg(&pdev->dev, "master allocation failed\n");
+		return -ENOMEM;
+	}
+
+	if (pdev->id != -1)
+		master->bus_num = pdev->id;
+
+	master->setup = mv_spi_setup;
+	master->transfer = mv_spi_transfer;
+	master->num_chipselect = MV_NUM_CHIPSELECTS;
+
+	dev_set_drvdata(&pdev->dev, master);
+
+	spi = spi_master_get_devdata(master);
+	spi->master = master;
+	spi->spi_info = spi_info;
+
+	if (spi_info->clk == 0) {
+		pr_debug("mv_spi: Bad Clk value.\n");
+		status = -EINVAL;
+		goto out;
+	}
+#if 0
+	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (r == NULL) {
+		status = -ENODEV;
+		goto out;
+	}
+#endif
+#if 0
+	if (!request_mem_region(r->start, (r->end - r->start) + 1,
+				pdev->dev.bus_id)) {
+		status = -EBUSY;
+		printk("request_mem_region failed\n");
+		goto out;
+	}
+#endif
+	spi->base = ioremap(0xf1820000, SZ_1K);
+	printk("ioremap: %p\n", spi->base);
+	if(spi->base == 0){
+		status = -EBUSY;
+		printk("ioremap failed\n");
+		goto out;
+	}
+	lcd_clk_div = readl(spi_reg(spi, MV_LCD_CLK_DIV_REG));
+	lcd_clk_div &= MV_LCD_CLK_DIV_MASK;
+
+	if (lcd_clk_div == 0){
+		status = -EBUSY;
+		printk("lcd clk div not set. check if lcd driver loaded \n");
+		goto out;
+
+	}
+	spi->max_speed = DIV_ROUND_UP(spi_info->clk/lcd_clk_div, 2);
+	spi->min_speed = DIV_ROUND_UP(spi_info->clk/lcd_clk_div, 0xFF);
+
+	INIT_WORK(&spi->work, mv_spi_work);
+
+	spin_lock_init(&spi->lock);
+	INIT_LIST_HEAD(&spi->msg_queue);
+
+	if (mv_spi_reset(spi) < 0)
+		goto out_rel_mem;
+
+	writel(MV_SPI_CTRL_ENABLE | /*MV_SPI_CTRL_PHA |*/ 0xFF << 24,
+	       spi_reg(spi, MV_SPI_CTRL_REG));
+
+	status = spi_register_master(master);
+	if (status < 0)
+		goto out_rel_mem;
+
+	return status;
+
+out_rel_mem:
+	printk("error while loading mv_spi driver \n");
+//	release_mem_region(r->start, (r->end - r->start) + 1);
+
+out:
+	spi_master_put(master);
+	return status;
+}
+
+
+static int __exit mv_spi_remove(struct platform_device *pdev)
+{
+	struct spi_master *master;
+	struct mv_spi *spi;
+	struct resource *r;
+
+	master = dev_get_drvdata(&pdev->dev);
+	spi = spi_master_get_devdata(master);
+
+	cancel_work_sync(&spi->work);
+
+//	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+//	release_mem_region(r->start, (r->end - r->start) + 1);
+
+	spi_unregister_master(master);
+
+	return 0;
+}
+
+MODULE_ALIAS("platform:" DRIVER_NAME);
+
+struct platform_driver mv_spi_driver = {
+	.driver = {
+		.name	= DRIVER_NAME,
+		.owner	= THIS_MODULE,
+	},
+	.remove		= __exit_p(mv_spi_remove),
+};
+
+int __devinit mv_spi_init(void)
+{
+	mv_spi_wq = create_singlethread_workqueue(
+				mv_spi_driver.driver.name);
+	if (mv_spi_wq == NULL)
+		return -ENOMEM;
+
+	return platform_driver_probe(&mv_spi_driver, mv_spi_probe);
+}
+//module_init(mv_spi_init);
+
+void __exit mv_spi_exit(void)
+{
+	flush_workqueue(mv_spi_wq);
+	platform_driver_unregister(&mv_spi_driver);
+
+	destroy_workqueue(mv_spi_wq);
+}
+//module_exit(mv_spi_exit);
+
+MODULE_DESCRIPTION("Marvell SPI driver");
+MODULE_AUTHOR("Saeed Bishara <saeed@marvell.com>");
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/drivers/spi/orion_spi.c
+++ linux-mvl-dove-2.6.32/drivers/spi/orion_spi.c
@@ -29,12 +29,17 @@
 #define ORION_SPI_DATA_OUT_REG		0x08
 #define ORION_SPI_DATA_IN_REG		0x0c
 #define ORION_SPI_INT_CAUSE_REG		0x10
+#define ORION_SPI_INT_CAUSE_MASK_REG	0x14
 
+#define ORION_SPI_CLK_OPTIONAL_DIV_MASK	(0x3 << 11)
 #define ORION_SPI_IF_8_16_BIT_MODE	(1 << 5)
 #define ORION_SPI_CLK_PRESCALE_MASK	0x1F
 
+#define ORION_SPI_CLK_MAX_PRESCALE	30
+
 struct orion_spi {
 	struct work_struct	work;
+	struct completion	 done;
 
 	/* Lock access to transfer list.	*/
 	spinlock_t		lock;
@@ -45,6 +50,7 @@
 	unsigned int		max_speed;
 	unsigned int		min_speed;
 	struct orion_spi_info	*spi_info;
+	int irq;
 };
 
 static struct workqueue_struct *orion_spi_wq;
@@ -105,6 +111,7 @@
 
 	tclk_hz = orion_spi->spi_info->tclk;
 
+	reg = readl(spi_reg(orion_spi, ORION_SPI_IF_CONFIG_REG));
 	/*
 	 * the supported rates are: 4,6,8...30
 	 * round up as we look for equal or less speed
@@ -112,8 +119,30 @@
 	rate = DIV_ROUND_UP(tclk_hz, speed);
 	rate = roundup(rate, 2);
 
+
+	if (orion_spi->spi_info->optional_div)
+	{
+		u32 optional_div = (rate + (ORION_SPI_CLK_MAX_PRESCALE - 1))\
+			/ORION_SPI_CLK_MAX_PRESCALE;
+
+		/* check if requested speed is too small */
+		if (optional_div > 16)
+			return -EINVAL;
+		
+		if (optional_div > 0)
+			optional_div--;
+		
+		optional_div = fls(optional_div);
+		reg = reg & ~ORION_SPI_CLK_OPTIONAL_DIV_MASK;
+		reg |= optional_div << 11;
+
+		/* recalculate rate with optional div*/ 
+		tclk_hz =  DIV_ROUND_UP(tclk_hz, (1 << optional_div));
+		rate = DIV_ROUND_UP(tclk_hz, speed);
+		rate = roundup(rate, 2);
+	}
 	/* check if requested speed is too small */
-	if (rate > 30)
+	if (rate > ORION_SPI_CLK_MAX_PRESCALE)
 		return -EINVAL;
 
 	if (rate < 4)
@@ -122,7 +151,6 @@
 	/* Convert the rate to SPI clock divisor value.	*/
 	prescale = 0x10 + rate/2;
 
-	reg = readl(spi_reg(orion_spi, ORION_SPI_IF_CONFIG_REG));
 	reg = ((reg & ~ORION_SPI_CLK_PRESCALE_MASK) | prescale);
 	writel(reg, spi_reg(orion_spi, ORION_SPI_IF_CONFIG_REG));
 
@@ -165,16 +193,19 @@
 
 static inline int orion_spi_wait_till_ready(struct orion_spi *orion_spi)
 {
-	int i;
+	if (orion_spi->irq < 0) { /* polling mode*/
+		int i;
 
-	for (i = 0; i < ORION_SPI_WAIT_RDY_MAX_LOOP; i++) {
-		if (readl(spi_reg(orion_spi, ORION_SPI_INT_CAUSE_REG)))
-			return 1;
-		else
-			udelay(1);
-	}
-
-	return -1;
+		for (i = 0; i < ORION_SPI_WAIT_RDY_MAX_LOOP; i++) {
+			if (readl(spi_reg(orion_spi, ORION_SPI_INT_CAUSE_REG)))
+				return 1;
+			else
+				udelay(1);
+		}
+		return -1;
+	} else
+		wait_for_completion(&orion_spi->done);
+	return 1;
 }
 
 static inline int
@@ -189,8 +220,10 @@
 	rx_reg = spi_reg(orion_spi, ORION_SPI_DATA_IN_REG);
 	int_reg = spi_reg(orion_spi, ORION_SPI_INT_CAUSE_REG);
 
-	/* clear the interrupt cause register */
-	writel(0x0, int_reg);
+	if (orion_spi->irq < 0) { /* polling mode*/
+		/* clear the interrupt cause register */
+		writel(0x0, int_reg);
+	}
 
 	if (tx_buf && *tx_buf)
 		writel(*(*tx_buf)++, tx_reg);
@@ -220,8 +253,10 @@
 	rx_reg = spi_reg(orion_spi, ORION_SPI_DATA_IN_REG);
 	int_reg = spi_reg(orion_spi, ORION_SPI_INT_CAUSE_REG);
 
-	/* clear the interrupt cause register */
-	writel(0x0, int_reg);
+	if (orion_spi->irq < 0) { /* polling mode*/
+		/* clear the interrupt cause register */
+		writel(0x0, int_reg);
+	}
 
 	if (tx_buf && *tx_buf)
 		writel(__cpu_to_le16(get_unaligned((*tx_buf)++)), tx_reg);
@@ -248,6 +283,10 @@
 
 	orion_spi = spi_master_get_devdata(spi->master);
 	word_len = spi->bits_per_word;
+
+	if(xfer->bits_per_word)
+		word_len = xfer->bits_per_word;
+
 	count = xfer->len;
 
 	if (word_len == 8) {
@@ -274,6 +313,22 @@
 	return xfer->len - count;
 }
 
+static irqreturn_t orion_spi_irq(int irq, void *dev)
+{
+	struct orion_spi *orion_spi = dev;
+
+	if (!(readl(spi_reg(orion_spi, ORION_SPI_INT_CAUSE_REG)) & 0x01))
+	{
+		printk("spi not ready for tx?\n");
+		complete(&orion_spi->done);
+		goto irq_done;
+	}
+
+	writel(0x00, spi_reg(orion_spi, ORION_SPI_INT_CAUSE_REG));
+	complete(&orion_spi->done);
+ irq_done:
+	return IRQ_HANDLED;
+}
 
 static void orion_spi_work(struct work_struct *work)
 {
@@ -344,7 +399,7 @@
 	spin_unlock_irq(&orion_spi->lock);
 }
 
-static int __init orion_spi_reset(struct orion_spi *orion_spi)
+static int orion_spi_reset(struct orion_spi *orion_spi)
 {
 	/* Verify that the CS is deasserted */
 	orion_spi_set_cs(orion_spi, 0);
@@ -377,6 +432,7 @@
 	 * baudrate & width will be set orion_spi_setup_transfer
 	 */
 	return 0;
+
 }
 
 static int orion_spi_transfer(struct spi_device *spi, struct spi_message *m)
@@ -480,8 +536,15 @@
 	spi->master = master;
 	spi->spi_info = spi_info;
 
+
 	spi->max_speed = DIV_ROUND_UP(spi_info->tclk, 4);
-	spi->min_speed = DIV_ROUND_UP(spi_info->tclk, 30);
+	if (spi_info->optional_div)
+		/* if the controller have optional division up to 16 after 
+		 * the pre-scaler 
+		 */
+		spi->min_speed = DIV_ROUND_UP(spi_info->tclk, ORION_SPI_CLK_MAX_PRESCALE * 16);
+	else
+		spi->min_speed = DIV_ROUND_UP(spi_info->tclk, ORION_SPI_CLK_MAX_PRESCALE);
 
 	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	if (r == NULL) {
@@ -504,21 +567,39 @@
 	if (orion_spi_reset(spi) < 0)
 		goto out_rel_mem;
 
+	init_completion(&spi->done);
+
+	if (spi_info->use_interrupt) {
+		dev_info(&pdev->dev, "use interrupt mode\n");
+		spi->irq = platform_get_irq(pdev, 0);
+		/* clean and unmask the interrupt */
+		writel(0, spi_reg(spi, ORION_SPI_INT_CAUSE_REG));
+		writel(1, spi_reg(spi, ORION_SPI_INT_CAUSE_MASK_REG));
+
+		status = devm_request_irq(&pdev->dev, spi->irq, orion_spi_irq,
+					  0, pdev->name, spi);
+		if (status < 0) {
+			dev_err(&pdev->dev, "Cannot claim IRQ\n");
+			writel(0, spi_reg(spi, ORION_SPI_INT_CAUSE_MASK_REG));
+			goto out_rel_mem;
+		}
+	} else {
+		spi->irq = -1;
+		dev_info(&pdev->dev, "use polling mode\n");
+	}
 	status = spi_register_master(master);
 	if (status < 0)
-		goto out_rel_mem;
+		goto  out_rel_mem;
 
 	return status;
 
 out_rel_mem:
 	release_mem_region(r->start, (r->end - r->start) + 1);
-
 out:
 	spi_master_put(master);
 	return status;
 }
 
-
 static int __exit orion_spi_remove(struct platform_device *pdev)
 {
 	struct spi_master *master;
@@ -533,11 +614,24 @@
 	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	release_mem_region(r->start, (r->end - r->start) + 1);
 
+	writel(0, spi_reg(spi, ORION_SPI_INT_CAUSE_MASK_REG));
+
 	spi_unregister_master(master);
 
 	return 0;
 }
 
+static int orion_spi_resume(struct platform_device *pdev)
+{
+	struct spi_master *master;
+	struct orion_spi *spi;
+
+	master = dev_get_drvdata(&pdev->dev);
+	spi = spi_master_get_devdata(master);
+
+	return orion_spi_reset(spi);
+}
+
 MODULE_ALIAS("platform:" DRIVER_NAME);
 
 static struct platform_driver orion_spi_driver = {
@@ -546,6 +640,7 @@
 		.owner	= THIS_MODULE,
 	},
 	.remove		= __exit_p(orion_spi_remove),
+	.resume		= orion_spi_resume,
 };
 
 static int __init orion_spi_init(void)
--- linux-mvl-dove-2.6.32.orig/drivers/spi/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/spi/Kconfig
@@ -189,6 +189,12 @@
 	help
 	  This selects a driver for the PPC4xx SPI Controller.
 
+config SPI_MV
+	tristate "Marvell SPI master (EXPERIMENTAL)"
+	depends on PLAT_ORION && EXPERIMENTAL
+	help
+	  This enables using the SPI master controller on the Marvell chips.
+
 config SPI_PXA2XX
 	tristate "PXA2xx SSP SPI master"
 	depends on ARCH_PXA && EXPERIMENTAL
--- linux-mvl-dove-2.6.32.orig/drivers/spi/Makefile
+++ linux-mvl-dove-2.6.32/drivers/spi/Makefile
@@ -19,6 +19,8 @@
 obj-$(CONFIG_SPI_GPIO)			+= spi_gpio.o
 obj-$(CONFIG_SPI_IMX)			+= spi_imx.o
 obj-$(CONFIG_SPI_LM70_LLP)		+= spi_lm70llp.o
+obj-$(CONFIG_SPI_ORION)			+= orion_spi.o
+obj-$(CONFIG_SPI_MV)			+= mv_spi.o
 obj-$(CONFIG_SPI_PXA2XX)		+= pxa2xx_spi.o
 obj-$(CONFIG_SPI_OMAP_UWIRE)		+= omap_uwire.o
 obj-$(CONFIG_SPI_OMAP24XX)		+= omap2_mcspi.o
--- linux-mvl-dove-2.6.32.orig/drivers/base/core.c
+++ linux-mvl-dove-2.6.32/drivers/base/core.c
@@ -56,7 +56,14 @@
  */
 const char *dev_driver_string(const struct device *dev)
 {
-	return dev->driver ? dev->driver->name :
+	struct device_driver *drv;
+
+	/* dev->driver can change to NULL underneath us because of unbinding,
+	 * so be careful about accessing it.  dev->bus and dev->class should
+	 * never change once they are set, so they don't need special care.
+	 */
+	drv = ACCESS_ONCE(dev->driver);
+	return drv ? drv->name :
 			(dev->bus ? dev->bus->name :
 			(dev->class ? dev->class->name : ""));
 }
@@ -596,6 +603,7 @@
 	int retval;
 
 	if (dev->class) {
+		static DEFINE_MUTEX(gdp_mutex);
 		struct kobject *kobj = NULL;
 		struct kobject *parent_kobj;
 		struct kobject *k;
@@ -612,6 +620,8 @@
 		else
 			parent_kobj = &parent->kobj;
 
+		mutex_lock(&gdp_mutex);
+
 		/* find our class-directory at the parent and reference it */
 		spin_lock(&dev->class->p->class_dirs.list_lock);
 		list_for_each_entry(k, &dev->class->p->class_dirs.list, entry)
@@ -620,20 +630,26 @@
 				break;
 			}
 		spin_unlock(&dev->class->p->class_dirs.list_lock);
-		if (kobj)
+		if (kobj) {
+			mutex_unlock(&gdp_mutex);
 			return kobj;
+		}
 
 		/* or create a new class-directory at the parent device */
 		k = kobject_create();
-		if (!k)
+		if (!k) {
+			mutex_unlock(&gdp_mutex);
 			return NULL;
+		}
 		k->kset = &dev->class->p->class_dirs;
 		retval = kobject_add(k, parent_kobj, "%s", dev->class->name);
 		if (retval < 0) {
+			mutex_unlock(&gdp_mutex);
 			kobject_put(k);
 			return NULL;
 		}
 		/* do not emit an uevent for this simple "glue" directory */
+		mutex_unlock(&gdp_mutex);
 		return k;
 	}
 
--- linux-mvl-dove-2.6.32.orig/drivers/base/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/base/Kconfig
@@ -151,4 +151,12 @@
 	bool
 	default n
 
+config SR_REPORT_TIME_LIMIT
+       int "Default low threshold"
+       depends on PM
+       default 100
+       help
+         Print suspend/resume information for driver/device for time greater
+         then default msec, ie 100 msec.
+
 endmenu
--- linux-mvl-dove-2.6.32.orig/drivers/base/class.c
+++ linux-mvl-dove-2.6.32/drivers/base/class.c
@@ -59,6 +59,8 @@
 	else
 		pr_debug("class '%s' does not have a release() function, "
 			 "be careful\n", class->name);
+
+	kfree(cp);
 }
 
 static struct sysfs_ops class_sysfs_ops = {
--- linux-mvl-dove-2.6.32.orig/drivers/base/cpu.c
+++ linux-mvl-dove-2.6.32/drivers/base/cpu.c
@@ -149,7 +149,7 @@
 	/* display offline cpus < nr_cpu_ids */
 	if (!alloc_cpumask_var(&offline, GFP_KERNEL))
 		return -ENOMEM;
-	cpumask_complement(offline, cpu_online_mask);
+	cpumask_andnot(offline, cpu_possible_mask, cpu_online_mask);
 	n = cpulist_scnprintf(buf, len, offline);
 	free_cpumask_var(offline);
 
--- linux-mvl-dove-2.6.32.orig/drivers/base/firmware_class.c
+++ linux-mvl-dove-2.6.32/drivers/base/firmware_class.c
@@ -125,6 +125,17 @@
 	return sprintf(buf, "%d\n", loading);
 }
 
+static void firmware_free_data(const struct firmware *fw)
+{
+	int i;
+	vunmap(fw->data);
+	if (fw->pages) {
+		for (i = 0; i < PFN_UP(fw->size); i++)
+			__free_page(fw->pages[i]);
+		kfree(fw->pages);
+	}
+}
+
 /* Some architectures don't have PAGE_KERNEL_RO */
 #ifndef PAGE_KERNEL_RO
 #define PAGE_KERNEL_RO PAGE_KERNEL
@@ -157,21 +168,21 @@
 			mutex_unlock(&fw_lock);
 			break;
 		}
-		vfree(fw_priv->fw->data);
-		fw_priv->fw->data = NULL;
+		firmware_free_data(fw_priv->fw);
+		memset(fw_priv->fw, 0, sizeof(struct firmware));
+		/* If the pages are not owned by 'struct firmware' */
 		for (i = 0; i < fw_priv->nr_pages; i++)
 			__free_page(fw_priv->pages[i]);
 		kfree(fw_priv->pages);
 		fw_priv->pages = NULL;
 		fw_priv->page_array_size = 0;
 		fw_priv->nr_pages = 0;
-		fw_priv->fw->size = 0;
 		set_bit(FW_STATUS_LOADING, &fw_priv->status);
 		mutex_unlock(&fw_lock);
 		break;
 	case 0:
 		if (test_bit(FW_STATUS_LOADING, &fw_priv->status)) {
-			vfree(fw_priv->fw->data);
+			vunmap(fw_priv->fw->data);
 			fw_priv->fw->data = vmap(fw_priv->pages,
 						 fw_priv->nr_pages,
 						 0, PAGE_KERNEL_RO);
@@ -179,7 +190,10 @@
 				dev_err(dev, "%s: vmap() failed\n", __func__);
 				goto err;
 			}
-			/* Pages will be freed by vfree() */
+			/* Pages are now owned by 'struct firmware' */
+			fw_priv->fw->pages = fw_priv->pages;
+			fw_priv->pages = NULL;
+
 			fw_priv->page_array_size = 0;
 			fw_priv->nr_pages = 0;
 			complete(&fw_priv->completion);
@@ -572,7 +586,7 @@
 			if (fw->data == builtin->data)
 				goto free_fw;
 		}
-		vfree(fw->data);
+		firmware_free_data(fw);
 	free_fw:
 		kfree(fw);
 	}
--- linux-mvl-dove-2.6.32.orig/drivers/base/devtmpfs.c
+++ linux-mvl-dove-2.6.32/drivers/base/devtmpfs.c
@@ -295,6 +295,19 @@
 		if (dentry->d_inode) {
 			err = vfs_getattr(nd.path.mnt, dentry, &stat);
 			if (!err && dev_mynode(dev, dentry->d_inode, &stat)) {
+				struct iattr newattrs;
+				/*
+				 * before unlinking this node, reset permissions
+				 * of possible references like hardlinks
+				 */
+				newattrs.ia_uid = 0;
+				newattrs.ia_gid = 0;
+				newattrs.ia_mode = stat.mode & ~0777;
+				newattrs.ia_valid =
+					ATTR_UID|ATTR_GID|ATTR_MODE;
+				mutex_lock(&dentry->d_inode->i_mutex);
+				notify_change(dentry, &newattrs);
+				mutex_unlock(&dentry->d_inode->i_mutex);
 				err = vfs_unlink(nd.path.dentry->d_inode,
 						 dentry);
 				if (!err || err == -ENOENT)
@@ -353,6 +366,7 @@
 {
 	int err;
 	struct vfsmount *mnt;
+	char options[] = "mode=0755";
 
 	err = register_filesystem(&dev_fs_type);
 	if (err) {
@@ -361,7 +375,7 @@
 		return err;
 	}
 
-	mnt = kern_mount(&dev_fs_type);
+	mnt = kern_mount_data(&dev_fs_type, options);
 	if (IS_ERR(mnt)) {
 		err = PTR_ERR(mnt);
 		printk(KERN_ERR "devtmpfs: unable to create devtmpfs %i\n", err);
--- linux-mvl-dove-2.6.32.orig/drivers/base/power/main.c
+++ linux-mvl-dove-2.6.32/drivers/base/power/main.c
@@ -324,6 +324,41 @@
 		kobject_name(&dev->kobj), pm_verb(state.event), info, error);
 }
 
+static void device_show_time(struct device *dev, ktime_t starttime, pm_message_t state, char *info)
+{
+	ktime_t calltime;
+	s64 usecs64;
+	int usecs;
+
+	calltime = ktime_get();
+	usecs64 = ktime_to_ns(ktime_sub(calltime, starttime));
+	do_div(usecs64, NSEC_PER_USEC);
+	usecs = usecs64;
+	if (usecs == 0)
+		usecs = 1;
+	if ((usecs / USEC_PER_MSEC) > CONFIG_SR_REPORT_TIME_LIMIT)
+		pr_info("PM: %s%s%s of drv:%s dev:%s complete after %ld.%03ld msecs\n", info ?: "", info ? " " : "", pm_verb(state.event),
+		dev_driver_string(dev), dev_name(dev), usecs / USEC_PER_MSEC,
+		usecs % USEC_PER_MSEC);
+}
+
+static void dpm_show_time(ktime_t starttime, pm_message_t state, char *info)
+{
+	ktime_t calltime;
+	s64 usecs64;
+	int usecs;
+
+	calltime = ktime_get();
+	usecs64 = ktime_to_ns(ktime_sub(calltime, starttime));
+	do_div(usecs64, NSEC_PER_USEC);
+	usecs = usecs64;
+	if (usecs == 0)
+		usecs = 1;
+	pr_info("PM: %s%s%s of devices complete after %ld.%03ld msecs\n",
+		info ?: "", info ? " " : "", pm_verb(state.event),
+		usecs / USEC_PER_MSEC, usecs % USEC_PER_MSEC);
+}
+
 /*------------------------- Resume routines -------------------------*/
 
 /**
@@ -337,6 +372,7 @@
 static int device_resume_noirq(struct device *dev, pm_message_t state)
 {
 	int error = 0;
+	ktime_t starttime = ktime_get();
 
 	TRACE_DEVICE(dev);
 	TRACE_RESUME(0);
@@ -347,6 +383,7 @@
 	if (dev->bus->pm) {
 		pm_dev_dbg(dev, state, "EARLY ");
 		error = pm_noirq_op(dev, dev->bus->pm, state);
+		device_show_time(dev, starttime, state, "early");
 	}
  End:
 	TRACE_RESUME(error);
@@ -363,6 +400,7 @@
 void dpm_resume_noirq(pm_message_t state)
 {
 	struct device *dev;
+	ktime_t starttime = ktime_get();
 
 	mutex_lock(&dpm_list_mtx);
 	transition_started = false;
@@ -376,6 +414,7 @@
 				pm_dev_err(dev, state, " early", error);
 		}
 	mutex_unlock(&dpm_list_mtx);
+	dpm_show_time(starttime, state, "early");
 	resume_device_irqs();
 }
 EXPORT_SYMBOL_GPL(dpm_resume_noirq);
@@ -388,6 +427,7 @@
 static int device_resume(struct device *dev, pm_message_t state)
 {
 	int error = 0;
+	ktime_t starttime = ktime_get();
 
 	TRACE_DEVICE(dev);
 	TRACE_RESUME(0);
@@ -424,6 +464,7 @@
 			error = dev->class->resume(dev);
 		}
 	}
+	device_show_time(dev, starttime, state, NULL);
  End:
 	up(&dev->sem);
 
@@ -441,6 +482,7 @@
 static void dpm_resume(pm_message_t state)
 {
 	struct list_head list;
+	ktime_t starttime = ktime_get();
 
 	INIT_LIST_HEAD(&list);
 	mutex_lock(&dpm_list_mtx);
@@ -469,6 +511,7 @@
 	}
 	list_splice(&list, &dpm_list);
 	mutex_unlock(&dpm_list_mtx);
+	dpm_show_time(starttime, state, NULL);
 }
 
 /**
@@ -583,6 +626,7 @@
 static int device_suspend_noirq(struct device *dev, pm_message_t state)
 {
 	int error = 0;
+	ktime_t starttime = ktime_get();
 
 	if (!dev->bus)
 		return 0;
@@ -590,6 +634,7 @@
 	if (dev->bus->pm) {
 		pm_dev_dbg(dev, state, "LATE ");
 		error = pm_noirq_op(dev, dev->bus->pm, state);
+		device_show_time(dev, starttime, state, "late");
 	}
 	return error;
 }
@@ -604,6 +649,7 @@
 int dpm_suspend_noirq(pm_message_t state)
 {
 	struct device *dev;
+	ktime_t starttime = ktime_get();
 	int error = 0;
 
 	suspend_device_irqs();
@@ -619,6 +665,8 @@
 	mutex_unlock(&dpm_list_mtx);
 	if (error)
 		dpm_resume_noirq(resume_event(state));
+	else
+		dpm_show_time(starttime, state, "late");
 	return error;
 }
 EXPORT_SYMBOL_GPL(dpm_suspend_noirq);
@@ -631,6 +679,7 @@
 static int device_suspend(struct device *dev, pm_message_t state)
 {
 	int error = 0;
+	ktime_t starttime = ktime_get();
 
 	down(&dev->sem);
 
@@ -666,6 +715,7 @@
 			suspend_report_result(dev->bus->suspend, error);
 		}
 	}
+	device_show_time(dev, starttime, state, NULL);
  End:
 	up(&dev->sem);
 
@@ -679,6 +729,7 @@
 static int dpm_suspend(pm_message_t state)
 {
 	struct list_head list;
+	ktime_t starttime = ktime_get();
 	int error = 0;
 
 	INIT_LIST_HEAD(&list);
@@ -704,6 +755,8 @@
 	}
 	list_splice(&list, dpm_list.prev);
 	mutex_unlock(&dpm_list_mtx);
+	if (!error)
+		dpm_show_time(starttime, state, NULL);
 	return error;
 }
 
--- linux-mvl-dove-2.6.32.orig/drivers/base/power/runtime.c
+++ linux-mvl-dove-2.6.32/drivers/base/power/runtime.c
@@ -777,7 +777,7 @@
 	}
 
 	if (parent) {
-		spin_lock(&parent->power.lock);
+		spin_lock_nested(&parent->power.lock, SINGLE_DEPTH_NESTING);
 
 		/*
 		 * It is invalid to put an active child under a parent that is
--- linux-mvl-dove-2.6.32.orig/drivers/oprofile/buffer_sync.c
+++ linux-mvl-dove-2.6.32/drivers/oprofile/buffer_sync.c
@@ -140,16 +140,6 @@
 	.notifier_call = module_load_notify,
 };
 
-
-static void end_sync(void)
-{
-	end_cpu_work();
-	/* make sure we don't leak task structs */
-	process_task_mortuary();
-	process_task_mortuary();
-}
-
-
 int sync_start(void)
 {
 	int err;
@@ -157,7 +147,7 @@
 	if (!zalloc_cpumask_var(&marked_cpus, GFP_KERNEL))
 		return -ENOMEM;
 
-	start_cpu_work();
+	mutex_lock(&buffer_mutex);
 
 	err = task_handoff_register(&task_free_nb);
 	if (err)
@@ -172,7 +162,10 @@
 	if (err)
 		goto out4;
 
+	start_cpu_work();
+
 out:
+	mutex_unlock(&buffer_mutex);
 	return err;
 out4:
 	profile_event_unregister(PROFILE_MUNMAP, &munmap_nb);
@@ -181,7 +174,6 @@
 out2:
 	task_handoff_unregister(&task_free_nb);
 out1:
-	end_sync();
 	free_cpumask_var(marked_cpus);
 	goto out;
 }
@@ -189,11 +181,20 @@
 
 void sync_stop(void)
 {
+	/* flush buffers */
+	mutex_lock(&buffer_mutex);
+	end_cpu_work();
 	unregister_module_notifier(&module_load_nb);
 	profile_event_unregister(PROFILE_MUNMAP, &munmap_nb);
 	profile_event_unregister(PROFILE_TASK_EXIT, &task_exit_nb);
 	task_handoff_unregister(&task_free_nb);
-	end_sync();
+	mutex_unlock(&buffer_mutex);
+	flush_scheduled_work();
+
+	/* make sure we don't leak task structs */
+	process_task_mortuary();
+	process_task_mortuary();
+
 	free_cpumask_var(marked_cpus);
 }
 
--- linux-mvl-dove-2.6.32.orig/drivers/oprofile/cpu_buffer.c
+++ linux-mvl-dove-2.6.32/drivers/oprofile/cpu_buffer.c
@@ -30,23 +30,7 @@
 
 #define OP_BUFFER_FLAGS	0
 
-/*
- * Read and write access is using spin locking. Thus, writing to the
- * buffer by NMI handler (x86) could occur also during critical
- * sections when reading the buffer. To avoid this, there are 2
- * buffers for independent read and write access. Read access is in
- * process context only, write access only in the NMI handler. If the
- * read buffer runs empty, both buffers are swapped atomically. There
- * is potentially a small window during swapping where the buffers are
- * disabled and samples could be lost.
- *
- * Using 2 buffers is a little bit overhead, but the solution is clear
- * and does not require changes in the ring buffer implementation. It
- * can be changed to a single buffer solution when the ring buffer
- * access is implemented as non-locking atomic code.
- */
-static struct ring_buffer *op_ring_buffer_read;
-static struct ring_buffer *op_ring_buffer_write;
+static struct ring_buffer *op_ring_buffer;
 DEFINE_PER_CPU(struct oprofile_cpu_buffer, cpu_buffer);
 
 static void wq_sync_buffer(struct work_struct *work);
@@ -69,12 +53,9 @@
 
 void free_cpu_buffers(void)
 {
-	if (op_ring_buffer_read)
-		ring_buffer_free(op_ring_buffer_read);
-	op_ring_buffer_read = NULL;
-	if (op_ring_buffer_write)
-		ring_buffer_free(op_ring_buffer_write);
-	op_ring_buffer_write = NULL;
+	if (op_ring_buffer)
+		ring_buffer_free(op_ring_buffer);
+	op_ring_buffer = NULL;
 }
 
 #define RB_EVENT_HDR_SIZE 4
@@ -87,11 +68,8 @@
 	unsigned long byte_size = buffer_size * (sizeof(struct op_sample) +
 						 RB_EVENT_HDR_SIZE);
 
-	op_ring_buffer_read = ring_buffer_alloc(byte_size, OP_BUFFER_FLAGS);
-	if (!op_ring_buffer_read)
-		goto fail;
-	op_ring_buffer_write = ring_buffer_alloc(byte_size, OP_BUFFER_FLAGS);
-	if (!op_ring_buffer_write)
+	op_ring_buffer = ring_buffer_alloc(byte_size, OP_BUFFER_FLAGS);
+	if (!op_ring_buffer)
 		goto fail;
 
 	for_each_possible_cpu(i) {
@@ -143,8 +121,6 @@
 
 		cancel_delayed_work(&b->work);
 	}
-
-	flush_scheduled_work();
 }
 
 /*
@@ -163,16 +139,11 @@
 *op_cpu_buffer_write_reserve(struct op_entry *entry, unsigned long size)
 {
 	entry->event = ring_buffer_lock_reserve
-		(op_ring_buffer_write, sizeof(struct op_sample) +
+		(op_ring_buffer, sizeof(struct op_sample) +
 		 size * sizeof(entry->sample->data[0]));
-	if (entry->event)
-		entry->sample = ring_buffer_event_data(entry->event);
-	else
-		entry->sample = NULL;
-
-	if (!entry->sample)
+	if (!entry->event)
 		return NULL;
-
+	entry->sample = ring_buffer_event_data(entry->event);
 	entry->size = size;
 	entry->data = entry->sample->data;
 
@@ -181,25 +152,16 @@
 
 int op_cpu_buffer_write_commit(struct op_entry *entry)
 {
-	return ring_buffer_unlock_commit(op_ring_buffer_write, entry->event);
+	return ring_buffer_unlock_commit(op_ring_buffer, entry->event);
 }
 
 struct op_sample *op_cpu_buffer_read_entry(struct op_entry *entry, int cpu)
 {
 	struct ring_buffer_event *e;
-	e = ring_buffer_consume(op_ring_buffer_read, cpu, NULL);
-	if (e)
-		goto event;
-	if (ring_buffer_swap_cpu(op_ring_buffer_read,
-				 op_ring_buffer_write,
-				 cpu))
+	e = ring_buffer_consume(op_ring_buffer, cpu, NULL);
+	if (!e)
 		return NULL;
-	e = ring_buffer_consume(op_ring_buffer_read, cpu, NULL);
-	if (e)
-		goto event;
-	return NULL;
 
-event:
 	entry->event = e;
 	entry->sample = ring_buffer_event_data(e);
 	entry->size = (ring_buffer_event_length(e) - sizeof(struct op_sample))
@@ -210,8 +172,7 @@
 
 unsigned long op_cpu_buffer_entries(int cpu)
 {
-	return ring_buffer_entries_cpu(op_ring_buffer_read, cpu)
-		+ ring_buffer_entries_cpu(op_ring_buffer_write, cpu);
+	return ring_buffer_entries_cpu(op_ring_buffer, cpu);
 }
 
 static int
--- linux-mvl-dove-2.6.32.orig/drivers/isdn/hisax/config.c
+++ linux-mvl-dove-2.6.32/drivers/isdn/hisax/config.c
@@ -800,6 +800,16 @@
 	ll_unload(csta);
 }
 
+static irqreturn_t card_irq(int intno, void *dev_id)
+{
+	struct IsdnCardState *cs = dev_id;
+	irqreturn_t ret = cs->irq_func(intno, cs);
+
+	if (ret == IRQ_HANDLED)
+		cs->irq_cnt++;
+	return ret;
+}
+
 static int init_card(struct IsdnCardState *cs)
 {
 	int 	irq_cnt, cnt = 3, ret;
@@ -808,10 +818,10 @@
 		ret = cs->cardmsg(cs, CARD_INIT, NULL);
 		return(ret);
 	}
-	irq_cnt = kstat_irqs(cs->irq);
+	irq_cnt = cs->irq_cnt = 0;
 	printk(KERN_INFO "%s: IRQ %d count %d\n", CardType[cs->typ],
 	       cs->irq, irq_cnt);
-	if (request_irq(cs->irq, cs->irq_func, cs->irq_flags, "HiSax", cs)) {
+	if (request_irq(cs->irq, card_irq, cs->irq_flags, "HiSax", cs)) {
 		printk(KERN_WARNING "HiSax: couldn't get interrupt %d\n",
 		       cs->irq);
 		return 1;
@@ -821,8 +831,8 @@
 		/* Timeout 10ms */
 		msleep(10);
 		printk(KERN_INFO "%s: IRQ %d count %d\n",
-		       CardType[cs->typ], cs->irq, kstat_irqs(cs->irq));
-		if (kstat_irqs(cs->irq) == irq_cnt) {
+		       CardType[cs->typ], cs->irq, cs->irq_cnt);
+		if (cs->irq_cnt == irq_cnt) {
 			printk(KERN_WARNING
 			       "%s: IRQ(%d) getting no interrupts during init %d\n",
 			       CardType[cs->typ], cs->irq, 4 - cnt);
--- linux-mvl-dove-2.6.32.orig/drivers/isdn/hisax/hisax.h
+++ linux-mvl-dove-2.6.32/drivers/isdn/hisax/hisax.h
@@ -959,6 +959,7 @@
 	u_long		event;
 	struct work_struct tqueue;
 	struct timer_list dbusytimer;
+	unsigned int	irq_cnt;
 #ifdef ERROR_STATISTIC
 	int		err_crc;
 	int		err_tx;
--- linux-mvl-dove-2.6.32.orig/drivers/isdn/i4l/isdn_tty.c
+++ linux-mvl-dove-2.6.32/drivers/isdn/i4l/isdn_tty.c
@@ -2635,12 +2635,6 @@
 		if ((info->flags & ISDN_ASYNC_CLOSING) || (!info->tty)) {
 			return;
 		}
-#ifdef CONFIG_ISDN_AUDIO
-		if ( !info->vonline )
-			tty_ldisc_flush(info->tty);
-#else
-		tty_ldisc_flush(info->tty);
-#endif
 		if ((info->flags & ISDN_ASYNC_CHECK_CD) &&
 		    (!((info->flags & ISDN_ASYNC_CALLOUT_ACTIVE) &&
 		       (info->flags & ISDN_ASYNC_CALLOUT_NOHUP)))) {
--- linux-mvl-dove-2.6.32.orig/drivers/isdn/sc/ioctl.c
+++ linux-mvl-dove-2.6.32/drivers/isdn/sc/ioctl.c
@@ -174,7 +174,7 @@
 		pr_debug("%s: SCIOGETSPID: ioctl received\n",
 				sc_adapter[card]->devicename);
 
-		spid = kmalloc(SCIOC_SPIDSIZE, GFP_KERNEL);
+		spid = kzalloc(SCIOC_SPIDSIZE, GFP_KERNEL);
 		if (!spid) {
 			kfree(rcvmsg);
 			return -ENOMEM;
@@ -194,7 +194,7 @@
 			kfree(rcvmsg);
 			return status;
 		}
-		strcpy(spid, rcvmsg->msg_data.byte_array);
+		strlcpy(spid, rcvmsg->msg_data.byte_array, SCIOC_SPIDSIZE);
 
 		/*
 		 * Package the switch type and send to user space
@@ -272,12 +272,12 @@
 			return status;
 		}
 
-		dn = kmalloc(SCIOC_DNSIZE, GFP_KERNEL);
+		dn = kzalloc(SCIOC_DNSIZE, GFP_KERNEL);
 		if (!dn) {
 			kfree(rcvmsg);
 			return -ENOMEM;
 		}
-		strcpy(dn, rcvmsg->msg_data.byte_array);
+		strlcpy(dn, rcvmsg->msg_data.byte_array, SCIOC_DNSIZE);
 		kfree(rcvmsg);
 
 		/*
@@ -348,7 +348,7 @@
 		pr_debug("%s: SCIOSTAT: ioctl received\n",
 				sc_adapter[card]->devicename);
 
-		bi = kmalloc (sizeof(boardInfo), GFP_KERNEL);
+		bi = kzalloc(sizeof(boardInfo), GFP_KERNEL);
 		if (!bi) {
 			kfree(rcvmsg);
 			return -ENOMEM;
--- linux-mvl-dove-2.6.32.orig/drivers/isdn/gigaset/ev-layer.c
+++ linux-mvl-dove-2.6.32/drivers/isdn/gigaset/ev-layer.c
@@ -1243,14 +1243,10 @@
 		 * note that bcs may be NULL if no B channel is free
 		 */
 		at_state2->ConState = 700;
-		kfree(at_state2->str_var[STR_NMBR]);
-		at_state2->str_var[STR_NMBR] = NULL;
-		kfree(at_state2->str_var[STR_ZCPN]);
-		at_state2->str_var[STR_ZCPN] = NULL;
-		kfree(at_state2->str_var[STR_ZBC]);
-		at_state2->str_var[STR_ZBC] = NULL;
-		kfree(at_state2->str_var[STR_ZHLC]);
-		at_state2->str_var[STR_ZHLC] = NULL;
+		for (i = 0; i < STR_NUM; ++i) {
+			kfree(at_state2->str_var[i]);
+			at_state2->str_var[i] = NULL;
+		}
 		at_state2->int_var[VAR_ZCTP] = -1;
 
 		spin_lock_irqsave(&cs->lock, flags);
--- linux-mvl-dove-2.6.32.orig/drivers/isdn/gigaset/interface.c
+++ linux-mvl-dove-2.6.32/drivers/isdn/gigaset/interface.c
@@ -635,7 +635,6 @@
 	if ((tty = cs->tty) == NULL)
 		gig_dbg(DEBUG_ANY, "receive on closed device");
 	else {
-		tty_buffer_request_room(tty, len);
 		tty_insert_flip_string(tty, buffer, len);
 		tty_flip_buffer_push(tty);
 	}
--- linux-mvl-dove-2.6.32.orig/drivers/md/dm-exception-store.h
+++ linux-mvl-dove-2.6.32/drivers/md/dm-exception-store.h
@@ -162,7 +162,7 @@
 static inline chunk_t sector_to_chunk(struct dm_exception_store *store,
 				      sector_t sector)
 {
-	return (sector & ~store->chunk_mask) >> store->chunk_shift;
+	return sector >> store->chunk_shift;
 }
 
 int dm_exception_store_type_register(struct dm_exception_store_type *type);
--- linux-mvl-dove-2.6.32.orig/drivers/md/bitmap.c
+++ linux-mvl-dove-2.6.32/drivers/md/bitmap.c
@@ -1078,23 +1078,31 @@
  *			out to disk
  */
 
-void bitmap_daemon_work(struct bitmap *bitmap)
+void bitmap_daemon_work(mddev_t *mddev)
 {
+	struct bitmap *bitmap;
 	unsigned long j;
 	unsigned long flags;
 	struct page *page = NULL, *lastpage = NULL;
 	int blocks;
 	void *paddr;
 
-	if (bitmap == NULL)
+	/* Use a mutex to guard daemon_work against
+	 * bitmap_destroy.
+	 */
+	mutex_lock(&mddev->bitmap_mutex);
+	bitmap = mddev->bitmap;
+	if (bitmap == NULL) {
+		mutex_unlock(&mddev->bitmap_mutex);
 		return;
+	}
 	if (time_before(jiffies, bitmap->daemon_lastrun + bitmap->daemon_sleep*HZ))
 		goto done;
 
 	bitmap->daemon_lastrun = jiffies;
 	if (bitmap->allclean) {
 		bitmap->mddev->thread->timeout = MAX_SCHEDULE_TIMEOUT;
-		return;
+		goto done;
 	}
 	bitmap->allclean = 1;
 
@@ -1203,6 +1211,7 @@
  done:
 	if (bitmap->allclean == 0)
 		bitmap->mddev->thread->timeout = bitmap->daemon_sleep * HZ;
+	mutex_unlock(&mddev->bitmap_mutex);
 }
 
 static bitmap_counter_t *bitmap_get_counter(struct bitmap *bitmap,
@@ -1308,7 +1317,8 @@
 {
 	if (!bitmap) return;
 	if (behind) {
-		atomic_dec(&bitmap->behind_writes);
+		if (atomic_dec_and_test(&bitmap->behind_writes))
+			wake_up(&bitmap->behind_wait);
 		PRINTK(KERN_DEBUG "dec write-behind count %d/%d\n",
 		  atomic_read(&bitmap->behind_writes), bitmap->max_write_behind);
 	}
@@ -1541,9 +1551,9 @@
 	 */
 	sleep = bitmap->daemon_sleep;
 	bitmap->daemon_sleep = 0;
-	bitmap_daemon_work(bitmap);
-	bitmap_daemon_work(bitmap);
-	bitmap_daemon_work(bitmap);
+	bitmap_daemon_work(mddev);
+	bitmap_daemon_work(mddev);
+	bitmap_daemon_work(mddev);
 	bitmap->daemon_sleep = sleep;
 	bitmap_update_sb(bitmap);
 }
@@ -1574,6 +1584,7 @@
 	kfree(bp);
 	kfree(bitmap);
 }
+
 void bitmap_destroy(mddev_t *mddev)
 {
 	struct bitmap *bitmap = mddev->bitmap;
@@ -1581,7 +1592,9 @@
 	if (!bitmap) /* there was no bitmap */
 		return;
 
+	mutex_lock(&mddev->bitmap_mutex);
 	mddev->bitmap = NULL; /* disconnect from the md device */
+	mutex_unlock(&mddev->bitmap_mutex);
 	if (mddev->thread)
 		mddev->thread->timeout = MAX_SCHEDULE_TIMEOUT;
 
@@ -1617,6 +1630,7 @@
 	atomic_set(&bitmap->pending_writes, 0);
 	init_waitqueue_head(&bitmap->write_wait);
 	init_waitqueue_head(&bitmap->overflow_wait);
+	init_waitqueue_head(&bitmap->behind_wait);
 
 	bitmap->mddev = mddev;
 
--- linux-mvl-dove-2.6.32.orig/drivers/md/dm-crypt.c
+++ linux-mvl-dove-2.6.32/drivers/md/dm-crypt.c
@@ -1,7 +1,7 @@
 /*
  * Copyright (C) 2003 Christophe Saout <christophe@saout.de>
  * Copyright (C) 2004 Clemens Fruhwirth <clemens@endorphin.org>
- * Copyright (C) 2006-2008 Red Hat, Inc. All rights reserved.
+ * Copyright (C) 2006-2009 Red Hat, Inc. All rights reserved.
  *
  * This file is released under the GPL.
  */
@@ -71,10 +71,21 @@
 	int (*ctr)(struct crypt_config *cc, struct dm_target *ti,
 		   const char *opts);
 	void (*dtr)(struct crypt_config *cc);
-	const char *(*status)(struct crypt_config *cc);
+	int (*init)(struct crypt_config *cc);
+	int (*wipe)(struct crypt_config *cc);
 	int (*generator)(struct crypt_config *cc, u8 *iv, sector_t sector);
 };
 
+struct iv_essiv_private {
+	struct crypto_cipher *tfm;
+	struct crypto_hash *hash_tfm;
+	u8 *salt;
+};
+
+struct iv_benbi_private {
+	int shift;
+};
+
 /*
  * Crypt: maps a linear range of a block device
  * and encrypts / decrypts at the same time.
@@ -102,8 +113,8 @@
 	struct crypt_iv_operations *iv_gen_ops;
 	char *iv_mode;
 	union {
-		struct crypto_cipher *essiv_tfm;
-		int benbi_shift;
+		struct iv_essiv_private essiv;
+		struct iv_benbi_private benbi;
 	} iv_gen_private;
 	sector_t iv_offset;
 	unsigned int iv_size;
@@ -169,88 +180,114 @@
 	return 0;
 }
 
-static int crypt_iv_essiv_ctr(struct crypt_config *cc, struct dm_target *ti,
-			      const char *opts)
+/* Initialise ESSIV - compute salt but no local memory allocations */
+static int crypt_iv_essiv_init(struct crypt_config *cc)
 {
-	struct crypto_cipher *essiv_tfm;
-	struct crypto_hash *hash_tfm;
+	struct iv_essiv_private *essiv = &cc->iv_gen_private.essiv;
 	struct hash_desc desc;
 	struct scatterlist sg;
-	unsigned int saltsize;
-	u8 *salt;
 	int err;
 
-	if (opts == NULL) {
+	sg_init_one(&sg, cc->key, cc->key_size);
+	desc.tfm = essiv->hash_tfm;
+	desc.flags = CRYPTO_TFM_REQ_MAY_SLEEP;
+
+	err = crypto_hash_digest(&desc, &sg, cc->key_size, essiv->salt);
+	if (err)
+		return err;
+
+	return crypto_cipher_setkey(essiv->tfm, essiv->salt,
+				    crypto_hash_digestsize(essiv->hash_tfm));
+}
+
+/* Wipe salt and reset key derived from volume key */
+static int crypt_iv_essiv_wipe(struct crypt_config *cc)
+{
+	struct iv_essiv_private *essiv = &cc->iv_gen_private.essiv;
+	unsigned salt_size = crypto_hash_digestsize(essiv->hash_tfm);
+
+	memset(essiv->salt, 0, salt_size);
+
+	return crypto_cipher_setkey(essiv->tfm, essiv->salt, salt_size);
+}
+
+static void crypt_iv_essiv_dtr(struct crypt_config *cc)
+{
+	struct iv_essiv_private *essiv = &cc->iv_gen_private.essiv;
+
+	crypto_free_cipher(essiv->tfm);
+	essiv->tfm = NULL;
+
+	crypto_free_hash(essiv->hash_tfm);
+	essiv->hash_tfm = NULL;
+
+	kzfree(essiv->salt);
+	essiv->salt = NULL;
+}
+
+static int crypt_iv_essiv_ctr(struct crypt_config *cc, struct dm_target *ti,
+			      const char *opts)
+{
+	struct crypto_cipher *essiv_tfm = NULL;
+	struct crypto_hash *hash_tfm = NULL;
+	u8 *salt = NULL;
+	int err;
+
+	if (!opts) {
 		ti->error = "Digest algorithm missing for ESSIV mode";
 		return -EINVAL;
 	}
 
-	/* Hash the cipher key with the given hash algorithm */
+	/* Allocate hash algorithm */
 	hash_tfm = crypto_alloc_hash(opts, 0, CRYPTO_ALG_ASYNC);
 	if (IS_ERR(hash_tfm)) {
 		ti->error = "Error initializing ESSIV hash";
-		return PTR_ERR(hash_tfm);
+		err = PTR_ERR(hash_tfm);
+		goto bad;
 	}
 
-	saltsize = crypto_hash_digestsize(hash_tfm);
-	salt = kmalloc(saltsize, GFP_KERNEL);
-	if (salt == NULL) {
+	salt = kzalloc(crypto_hash_digestsize(hash_tfm), GFP_KERNEL);
+	if (!salt) {
 		ti->error = "Error kmallocing salt storage in ESSIV";
-		crypto_free_hash(hash_tfm);
-		return -ENOMEM;
+		err = -ENOMEM;
+		goto bad;
 	}
 
-	sg_init_one(&sg, cc->key, cc->key_size);
-	desc.tfm = hash_tfm;
-	desc.flags = CRYPTO_TFM_REQ_MAY_SLEEP;
-	err = crypto_hash_digest(&desc, &sg, cc->key_size, salt);
-	crypto_free_hash(hash_tfm);
-
-	if (err) {
-		ti->error = "Error calculating hash in ESSIV";
-		kfree(salt);
-		return err;
-	}
-
-	/* Setup the essiv_tfm with the given salt */
+	/* Allocate essiv_tfm */
 	essiv_tfm = crypto_alloc_cipher(cc->cipher, 0, CRYPTO_ALG_ASYNC);
 	if (IS_ERR(essiv_tfm)) {
 		ti->error = "Error allocating crypto tfm for ESSIV";
-		kfree(salt);
-		return PTR_ERR(essiv_tfm);
+		err = PTR_ERR(essiv_tfm);
+		goto bad;
 	}
 	if (crypto_cipher_blocksize(essiv_tfm) !=
 	    crypto_ablkcipher_ivsize(cc->tfm)) {
 		ti->error = "Block size of ESSIV cipher does "
 			    "not match IV size of block cipher";
-		crypto_free_cipher(essiv_tfm);
-		kfree(salt);
-		return -EINVAL;
-	}
-	err = crypto_cipher_setkey(essiv_tfm, salt, saltsize);
-	if (err) {
-		ti->error = "Failed to set key for ESSIV cipher";
-		crypto_free_cipher(essiv_tfm);
-		kfree(salt);
-		return err;
+		err = -EINVAL;
+		goto bad;
 	}
-	kfree(salt);
 
-	cc->iv_gen_private.essiv_tfm = essiv_tfm;
+	cc->iv_gen_private.essiv.salt = salt;
+	cc->iv_gen_private.essiv.tfm = essiv_tfm;
+	cc->iv_gen_private.essiv.hash_tfm = hash_tfm;
+
 	return 0;
-}
 
-static void crypt_iv_essiv_dtr(struct crypt_config *cc)
-{
-	crypto_free_cipher(cc->iv_gen_private.essiv_tfm);
-	cc->iv_gen_private.essiv_tfm = NULL;
+bad:
+	if (essiv_tfm && !IS_ERR(essiv_tfm))
+		crypto_free_cipher(essiv_tfm);
+	if (hash_tfm && !IS_ERR(hash_tfm))
+		crypto_free_hash(hash_tfm);
+	kfree(salt);
+	return err;
 }
 
 static int crypt_iv_essiv_gen(struct crypt_config *cc, u8 *iv, sector_t sector)
 {
 	memset(iv, 0, cc->iv_size);
 	*(u64 *)iv = cpu_to_le64(sector);
-	crypto_cipher_encrypt_one(cc->iv_gen_private.essiv_tfm, iv, iv);
+	crypto_cipher_encrypt_one(cc->iv_gen_private.essiv.tfm, iv, iv);
 	return 0;
 }
 
@@ -273,7 +310,7 @@
 		return -EINVAL;
 	}
 
-	cc->iv_gen_private.benbi_shift = 9 - log;
+	cc->iv_gen_private.benbi.shift = 9 - log;
 
 	return 0;
 }
@@ -288,7 +325,7 @@
 
 	memset(iv, 0, cc->iv_size - sizeof(u64)); /* rest is cleared below */
 
-	val = cpu_to_be64(((u64)sector << cc->iv_gen_private.benbi_shift) + 1);
+	val = cpu_to_be64(((u64)sector << cc->iv_gen_private.benbi.shift) + 1);
 	put_unaligned(val, (__be64 *)(iv + cc->iv_size - sizeof(u64)));
 
 	return 0;
@@ -308,6 +345,8 @@
 static struct crypt_iv_operations crypt_iv_essiv_ops = {
 	.ctr       = crypt_iv_essiv_ctr,
 	.dtr       = crypt_iv_essiv_dtr,
+	.init      = crypt_iv_essiv_init,
+	.wipe      = crypt_iv_essiv_wipe,
 	.generator = crypt_iv_essiv_gen
 };
 
@@ -1039,6 +1078,12 @@
 	    cc->iv_gen_ops->ctr(cc, ti, ivopts) < 0)
 		goto bad_ivmode;
 
+	if (cc->iv_gen_ops && cc->iv_gen_ops->init &&
+	    cc->iv_gen_ops->init(cc) < 0) {
+		ti->error = "Error initialising IV";
+		goto bad_slab_pool;
+	}
+
 	cc->iv_size = crypto_ablkcipher_ivsize(tfm);
 	if (cc->iv_size)
 		/* at least a 64 bit sector number should fit in our buffer */
@@ -1278,6 +1323,7 @@
 static int crypt_message(struct dm_target *ti, unsigned argc, char **argv)
 {
 	struct crypt_config *cc = ti->private;
+	int ret = -EINVAL;
 
 	if (argc < 2)
 		goto error;
@@ -1287,10 +1333,22 @@
 			DMWARN("not suspended during key manipulation.");
 			return -EINVAL;
 		}
-		if (argc == 3 && !strnicmp(argv[1], MESG_STR("set")))
-			return crypt_set_key(cc, argv[2]);
-		if (argc == 2 && !strnicmp(argv[1], MESG_STR("wipe")))
+		if (argc == 3 && !strnicmp(argv[1], MESG_STR("set"))) {
+			ret = crypt_set_key(cc, argv[2]);
+			if (ret)
+				return ret;
+			if (cc->iv_gen_ops && cc->iv_gen_ops->init)
+				ret = cc->iv_gen_ops->init(cc);
+			return ret;
+		}
+		if (argc == 2 && !strnicmp(argv[1], MESG_STR("wipe"))) {
+			if (cc->iv_gen_ops && cc->iv_gen_ops->wipe) {
+				ret = cc->iv_gen_ops->wipe(cc);
+				if (ret)
+					return ret;
+			}
 			return crypt_wipe_key(cc);
+		}
 	}
 
 error:
--- linux-mvl-dove-2.6.32.orig/drivers/md/dm-raid1.c
+++ linux-mvl-dove-2.6.32/drivers/md/dm-raid1.c
@@ -659,7 +659,7 @@
 	/*
 	 * Dispatch io.
 	 */
-	if (unlikely(ms->log_failure)) {
+	if (unlikely(ms->log_failure) && errors_handled(ms)) {
 		spin_lock_irq(&ms->lock);
 		bio_list_merge(&ms->failures, &sync);
 		spin_unlock_irq(&ms->lock);
--- linux-mvl-dove-2.6.32.orig/drivers/md/linear.c
+++ linux-mvl-dove-2.6.32/drivers/md/linear.c
@@ -172,12 +172,14 @@
 		disk_stack_limits(mddev->gendisk, rdev->bdev,
 				  rdev->data_offset << 9);
 		/* as we don't honour merge_bvec_fn, we must never risk
-		 * violating it, so limit ->max_sector to one PAGE, as
-		 * a one page request is never in violation.
+		 * violating it, so limit max_phys_segments to 1 lying within
+		 * a single page.
 		 */
-		if (rdev->bdev->bd_disk->queue->merge_bvec_fn &&
-		    queue_max_sectors(mddev->queue) > (PAGE_SIZE>>9))
-			blk_queue_max_sectors(mddev->queue, PAGE_SIZE>>9);
+		if (rdev->bdev->bd_disk->queue->merge_bvec_fn) {
+			blk_queue_max_phys_segments(mddev->queue, 1);
+			blk_queue_segment_boundary(mddev->queue,
+						   PAGE_CACHE_SIZE - 1);
+		}
 
 		conf->array_sectors += rdev->sectors;
 		cnt++;
--- linux-mvl-dove-2.6.32.orig/drivers/md/md.h
+++ linux-mvl-dove-2.6.32/drivers/md/md.h
@@ -289,6 +289,7 @@
 								* hot-adding a bitmap.  It should
 								* eventually be settable by sysfs.
 								*/
+	struct mutex			bitmap_mutex;
 
 	struct list_head		all_mddevs;
 };
--- linux-mvl-dove-2.6.32.orig/drivers/md/raid1.c
+++ linux-mvl-dove-2.6.32/drivers/md/raid1.c
@@ -417,7 +417,7 @@
  */
 static int read_balance(conf_t *conf, r1bio_t *r1_bio)
 {
-	const unsigned long this_sector = r1_bio->sector;
+	const sector_t this_sector = r1_bio->sector;
 	int new_disk = conf->last_used, disk = new_disk;
 	int wonly_disk = -1;
 	const int sectors = r1_bio->sectors;
@@ -433,7 +433,7 @@
  retry:
 	if (conf->mddev->recovery_cp < MaxSector &&
 	    (this_sector + sectors >= conf->next_resync)) {
-		/* Choose the first operation device, for consistancy */
+		/* Choose the first operational device, for consistancy */
 		new_disk = 0;
 
 		for (rdev = rcu_dereference(conf->mirrors[new_disk].rdev);
@@ -845,6 +845,15 @@
 		}
 		mirror = conf->mirrors + rdisk;
 
+		if (test_bit(WriteMostly, &mirror->rdev->flags) &&
+		    bitmap) {
+			/* Reading from a write-mostly device must
+			 * take care not to over-take any writes
+			 * that are 'behind'
+			 */
+			wait_event(bitmap->behind_wait,
+				   atomic_read(&bitmap->behind_writes) == 0);
+		}
 		r1_bio->read_disk = rdisk;
 
 		read_bio = bio_clone(bio, GFP_NOIO);
@@ -891,9 +900,10 @@
 			if (test_bit(Faulty, &rdev->flags)) {
 				rdev_dec_pending(rdev, mddev);
 				r1_bio->bios[i] = NULL;
-			} else
+			} else {
 				r1_bio->bios[i] = bio;
-			targets++;
+				targets++;
+			}
 		} else
 			r1_bio->bios[i] = NULL;
 	}
@@ -921,9 +931,13 @@
 		set_bit(R1BIO_Degraded, &r1_bio->state);
 	}
 
-	/* do behind I/O ? */
+	/* do behind I/O ?
+	 * Not if there are too many, or cannot allocate memory,
+	 * or a reader on WriteMostly is waiting for behind writes
+	 * to flush */
 	if (bitmap &&
 	    atomic_read(&bitmap->behind_writes) < bitmap->max_write_behind &&
+	    !waitqueue_active(&bitmap->behind_wait) &&
 	    (behind_pages = alloc_behind_pages(bio)) != NULL)
 		set_bit(R1BIO_BehindIO, &r1_bio->state);
 
@@ -1174,6 +1188,7 @@
 		 * is not possible.
 		 */
 		if (!test_bit(Faulty, &rdev->flags) &&
+		    !mddev->recovery_disabled &&
 		    mddev->degraded < conf->raid_disks) {
 			err = -EBUSY;
 			goto abort;
@@ -2104,15 +2119,13 @@
 {
 	conf_t *conf = mddev->private;
 	struct bitmap *bitmap = mddev->bitmap;
-	int behind_wait = 0;
 
 	/* wait for behind writes to complete */
-	while (bitmap && atomic_read(&bitmap->behind_writes) > 0) {
-		behind_wait++;
-		printk(KERN_INFO "raid1: behind writes in progress on device %s, waiting to stop (%d)\n", mdname(mddev), behind_wait);
-		set_current_state(TASK_UNINTERRUPTIBLE);
-		schedule_timeout(HZ); /* wait a second */
+	if (bitmap && atomic_read(&bitmap->behind_writes) > 0) {
+		printk(KERN_INFO "raid1: behind writes in progress on device %s, waiting to stop.\n", mdname(mddev));
 		/* need to kick something here to make sure I/O goes? */
+		wait_event(bitmap->behind_wait,
+			   atomic_read(&bitmap->behind_writes) == 0);
 	}
 
 	raise_barrier(conf);
--- linux-mvl-dove-2.6.32.orig/drivers/md/dm-uevent.c
+++ linux-mvl-dove-2.6.32/drivers/md/dm-uevent.c
@@ -139,14 +139,13 @@
 		list_del_init(&event->elist);
 
 		/*
-		 * Need to call dm_copy_name_and_uuid from here for now.
-		 * Context of previous var adds and locking used for
-		 * hash_cell not compatable.
+		 * When a device is being removed this copy fails and we
+		 * discard these unsent events.
 		 */
 		if (dm_copy_name_and_uuid(event->md, event->name,
 					  event->uuid)) {
-			DMERR("%s: dm_copy_name_and_uuid() failed",
-			      __func__);
+			DMINFO("%s: skipping sending uevent for lost device",
+			       __func__);
 			goto uevent_free;
 		}
 
--- linux-mvl-dove-2.6.32.orig/drivers/md/raid5.c
+++ linux-mvl-dove-2.6.32/drivers/md/raid5.c
@@ -127,7 +127,7 @@
 
 static inline void raid5_set_bi_hw_segments(struct bio *bio, unsigned int cnt)
 {
-	bio->bi_phys_segments = raid5_bi_phys_segments(bio) || (cnt << 16);
+	bio->bi_phys_segments = raid5_bi_phys_segments(bio) | (cnt << 16);
 }
 
 /* Find first data disk in a raid6 stripe */
@@ -446,7 +446,7 @@
 		bi = &sh->dev[i].req;
 
 		bi->bi_rw = rw;
-		if (rw == WRITE)
+		if (rw & WRITE)
 			bi->bi_end_io = raid5_end_write_request;
 		else
 			bi->bi_end_io = raid5_end_read_request;
@@ -480,13 +480,13 @@
 			bi->bi_io_vec[0].bv_offset = 0;
 			bi->bi_size = STRIPE_SIZE;
 			bi->bi_next = NULL;
-			if (rw == WRITE &&
+			if ((rw & WRITE) &&
 			    test_bit(R5_ReWrite, &sh->dev[i].flags))
 				atomic_add(STRIPE_SECTORS,
 					&rdev->corrected_errors);
 			generic_make_request(bi);
 		} else {
-			if (rw == WRITE)
+			if (rw & WRITE)
 				set_bit(STRIPE_DEGRADED, &sh->state);
 			pr_debug("skip op %ld on disc %d for sector %llu\n",
 				bi->bi_rw, i, (unsigned long long)sh->sector);
@@ -1526,7 +1526,7 @@
 
 		clear_bit(R5_UPTODATE, &sh->dev[i].flags);
 		atomic_inc(&rdev->read_errors);
-		if (conf->mddev->degraded)
+		if (conf->mddev->degraded >= conf->max_degraded)
 			printk_rl(KERN_WARNING
 				  "raid5:%s: read error not correctable "
 				  "(sector %llu on %s).\n",
@@ -1649,8 +1649,8 @@
 				     int previous, int *dd_idx,
 				     struct stripe_head *sh)
 {
-	long stripe;
-	unsigned long chunk_number;
+	sector_t stripe, stripe2;
+	sector_t chunk_number;
 	unsigned int chunk_offset;
 	int pd_idx, qd_idx;
 	int ddf_layout = 0;
@@ -1670,18 +1670,13 @@
 	 */
 	chunk_offset = sector_div(r_sector, sectors_per_chunk);
 	chunk_number = r_sector;
-	BUG_ON(r_sector != chunk_number);
 
 	/*
 	 * Compute the stripe number
 	 */
-	stripe = chunk_number / data_disks;
-
-	/*
-	 * Compute the data disk and parity disk indexes inside the stripe
-	 */
-	*dd_idx = chunk_number % data_disks;
-
+	stripe = chunk_number;
+	*dd_idx = sector_div(stripe, data_disks);
+	stripe2 = stripe;
 	/*
 	 * Select the parity disk based on the user selected algorithm.
 	 */
@@ -1693,21 +1688,21 @@
 	case 5:
 		switch (algorithm) {
 		case ALGORITHM_LEFT_ASYMMETRIC:
-			pd_idx = data_disks - stripe % raid_disks;
+			pd_idx = data_disks - sector_div(stripe2, raid_disks);
 			if (*dd_idx >= pd_idx)
 				(*dd_idx)++;
 			break;
 		case ALGORITHM_RIGHT_ASYMMETRIC:
-			pd_idx = stripe % raid_disks;
+			pd_idx = sector_div(stripe2, raid_disks);
 			if (*dd_idx >= pd_idx)
 				(*dd_idx)++;
 			break;
 		case ALGORITHM_LEFT_SYMMETRIC:
-			pd_idx = data_disks - stripe % raid_disks;
+			pd_idx = data_disks - sector_div(stripe2, raid_disks);
 			*dd_idx = (pd_idx + 1 + *dd_idx) % raid_disks;
 			break;
 		case ALGORITHM_RIGHT_SYMMETRIC:
-			pd_idx = stripe % raid_disks;
+			pd_idx = sector_div(stripe2, raid_disks);
 			*dd_idx = (pd_idx + 1 + *dd_idx) % raid_disks;
 			break;
 		case ALGORITHM_PARITY_0:
@@ -1727,7 +1722,7 @@
 
 		switch (algorithm) {
 		case ALGORITHM_LEFT_ASYMMETRIC:
-			pd_idx = raid_disks - 1 - (stripe % raid_disks);
+			pd_idx = raid_disks - 1 - sector_div(stripe2, raid_disks);
 			qd_idx = pd_idx + 1;
 			if (pd_idx == raid_disks-1) {
 				(*dd_idx)++;	/* Q D D D P */
@@ -1736,7 +1731,7 @@
 				(*dd_idx) += 2; /* D D P Q D */
 			break;
 		case ALGORITHM_RIGHT_ASYMMETRIC:
-			pd_idx = stripe % raid_disks;
+			pd_idx = sector_div(stripe2, raid_disks);
 			qd_idx = pd_idx + 1;
 			if (pd_idx == raid_disks-1) {
 				(*dd_idx)++;	/* Q D D D P */
@@ -1745,12 +1740,12 @@
 				(*dd_idx) += 2; /* D D P Q D */
 			break;
 		case ALGORITHM_LEFT_SYMMETRIC:
-			pd_idx = raid_disks - 1 - (stripe % raid_disks);
+			pd_idx = raid_disks - 1 - sector_div(stripe2, raid_disks);
 			qd_idx = (pd_idx + 1) % raid_disks;
 			*dd_idx = (pd_idx + 2 + *dd_idx) % raid_disks;
 			break;
 		case ALGORITHM_RIGHT_SYMMETRIC:
-			pd_idx = stripe % raid_disks;
+			pd_idx = sector_div(stripe2, raid_disks);
 			qd_idx = (pd_idx + 1) % raid_disks;
 			*dd_idx = (pd_idx + 2 + *dd_idx) % raid_disks;
 			break;
@@ -1769,7 +1764,7 @@
 			/* Exactly the same as RIGHT_ASYMMETRIC, but or
 			 * of blocks for computing Q is different.
 			 */
-			pd_idx = stripe % raid_disks;
+			pd_idx = sector_div(stripe2, raid_disks);
 			qd_idx = pd_idx + 1;
 			if (pd_idx == raid_disks-1) {
 				(*dd_idx)++;	/* Q D D D P */
@@ -1784,7 +1779,8 @@
 			 * D D D P Q  rather than
 			 * Q D D D P
 			 */
-			pd_idx = raid_disks - 1 - ((stripe + 1) % raid_disks);
+			stripe2 += 1;
+			pd_idx = raid_disks - 1 - sector_div(stripe2, raid_disks);
 			qd_idx = pd_idx + 1;
 			if (pd_idx == raid_disks-1) {
 				(*dd_idx)++;	/* Q D D D P */
@@ -1796,7 +1792,7 @@
 
 		case ALGORITHM_ROTATING_N_CONTINUE:
 			/* Same as left_symmetric but Q is before P */
-			pd_idx = raid_disks - 1 - (stripe % raid_disks);
+			pd_idx = raid_disks - 1 - sector_div(stripe2, raid_disks);
 			qd_idx = (pd_idx + raid_disks - 1) % raid_disks;
 			*dd_idx = (pd_idx + 1 + *dd_idx) % raid_disks;
 			ddf_layout = 1;
@@ -1804,27 +1800,27 @@
 
 		case ALGORITHM_LEFT_ASYMMETRIC_6:
 			/* RAID5 left_asymmetric, with Q on last device */
-			pd_idx = data_disks - stripe % (raid_disks-1);
+			pd_idx = data_disks - sector_div(stripe2, raid_disks-1);
 			if (*dd_idx >= pd_idx)
 				(*dd_idx)++;
 			qd_idx = raid_disks - 1;
 			break;
 
 		case ALGORITHM_RIGHT_ASYMMETRIC_6:
-			pd_idx = stripe % (raid_disks-1);
+			pd_idx = sector_div(stripe2, raid_disks-1);
 			if (*dd_idx >= pd_idx)
 				(*dd_idx)++;
 			qd_idx = raid_disks - 1;
 			break;
 
 		case ALGORITHM_LEFT_SYMMETRIC_6:
-			pd_idx = data_disks - stripe % (raid_disks-1);
+			pd_idx = data_disks - sector_div(stripe2, raid_disks-1);
 			*dd_idx = (pd_idx + 1 + *dd_idx) % (raid_disks-1);
 			qd_idx = raid_disks - 1;
 			break;
 
 		case ALGORITHM_RIGHT_SYMMETRIC_6:
-			pd_idx = stripe % (raid_disks-1);
+			pd_idx = sector_div(stripe2, raid_disks-1);
 			*dd_idx = (pd_idx + 1 + *dd_idx) % (raid_disks-1);
 			qd_idx = raid_disks - 1;
 			break;
@@ -1869,14 +1865,14 @@
 				 : conf->algorithm;
 	sector_t stripe;
 	int chunk_offset;
-	int chunk_number, dummy1, dd_idx = i;
+	sector_t chunk_number;
+	int dummy1, dd_idx = i;
 	sector_t r_sector;
 	struct stripe_head sh2;
 
 
 	chunk_offset = sector_div(new_sector, sectors_per_chunk);
 	stripe = new_sector;
-	BUG_ON(new_sector != stripe);
 
 	if (i == sh->pd_idx)
 		return 0;
@@ -1969,7 +1965,7 @@
 	}
 
 	chunk_number = stripe * data_disks + i;
-	r_sector = (sector_t)chunk_number * sectors_per_chunk + chunk_offset;
+	r_sector = chunk_number * sectors_per_chunk + chunk_offset;
 
 	check = raid5_compute_sector(conf, r_sector,
 				     previous, &dummy1, &sh2);
@@ -5432,11 +5428,11 @@
 		    !test_bit(Faulty, &rdev->flags)) {
 			if (raid5_add_disk(mddev, rdev) == 0) {
 				char nm[20];
-				if (rdev->raid_disk >= conf->previous_raid_disks)
+				if (rdev->raid_disk >= conf->previous_raid_disks) {
 					set_bit(In_sync, &rdev->flags);
-				else
+					added_devices++;
+				} else
 					rdev->recovery_offset = 0;
-				added_devices++;
 				sprintf(nm, "rd%d", rdev->raid_disk);
 				if (sysfs_create_link(&mddev->kobj,
 						      &rdev->kobj, nm))
@@ -5448,9 +5444,12 @@
 				break;
 		}
 
+	/* When a reshape changes the number of devices, ->degraded
+	 * is measured against the large of the pre and post number of
+	 * devices.*/
 	if (mddev->delta_disks > 0) {
 		spin_lock_irqsave(&conf->device_lock, flags);
-		mddev->degraded = (conf->raid_disks - conf->previous_raid_disks)
+		mddev->degraded += (conf->raid_disks - conf->previous_raid_disks)
 			- added_devices;
 		spin_unlock_irqrestore(&conf->device_lock, flags);
 	}
--- linux-mvl-dove-2.6.32.orig/drivers/md/dm-stripe.c
+++ linux-mvl-dove-2.6.32/drivers/md/dm-stripe.c
@@ -110,7 +110,7 @@
 	}
 
 	stripes = simple_strtoul(argv[0], &end, 10);
-	if (*end) {
+	if (!stripes || *end) {
 		ti->error = "Invalid stripe count";
 		return -EINVAL;
 	}
--- linux-mvl-dove-2.6.32.orig/drivers/md/raid0.c
+++ linux-mvl-dove-2.6.32/drivers/md/raid0.c
@@ -176,14 +176,15 @@
 		disk_stack_limits(mddev->gendisk, rdev1->bdev,
 				  rdev1->data_offset << 9);
 		/* as we don't honour merge_bvec_fn, we must never risk
-		 * violating it, so limit ->max_sector to one PAGE, as
-		 * a one page request is never in violation.
+		 * violating it, so limit ->max_phys_segments to 1, lying within
+		 * a single page.
 		 */
 
-		if (rdev1->bdev->bd_disk->queue->merge_bvec_fn &&
-		    queue_max_sectors(mddev->queue) > (PAGE_SIZE>>9))
-			blk_queue_max_sectors(mddev->queue, PAGE_SIZE>>9);
-
+		if (rdev1->bdev->bd_disk->queue->merge_bvec_fn) {
+			blk_queue_max_phys_segments(mddev->queue, 1);
+			blk_queue_segment_boundary(mddev->queue,
+						   PAGE_CACHE_SIZE - 1);
+		}
 		if (!smallest || (rdev1->sectors < smallest->sectors))
 			smallest = rdev1;
 		cnt++;
--- linux-mvl-dove-2.6.32.orig/drivers/md/bitmap.h
+++ linux-mvl-dove-2.6.32/drivers/md/bitmap.h
@@ -254,6 +254,9 @@
 	wait_queue_head_t write_wait;
 	wait_queue_head_t overflow_wait;
 
+#ifndef __GENKSYMS__
+	wait_queue_head_t behind_wait;
+#endif
 };
 
 /* the bitmap API */
@@ -282,7 +285,7 @@
 void bitmap_cond_end_sync(struct bitmap *bitmap, sector_t sector);
 
 void bitmap_unplug(struct bitmap *bitmap);
-void bitmap_daemon_work(struct bitmap *bitmap);
+void bitmap_daemon_work(mddev_t *mddev);
 #endif
 
 #endif
--- linux-mvl-dove-2.6.32.orig/drivers/md/dm-mpath.c
+++ linux-mvl-dove-2.6.32/drivers/md/dm-mpath.c
@@ -33,7 +33,6 @@
 	unsigned fail_count;		/* Cumulative failure count */
 
 	struct dm_path path;
-	struct work_struct deactivate_path;
 	struct work_struct activate_path;
 };
 
@@ -113,7 +112,6 @@
 static void process_queued_ios(struct work_struct *work);
 static void trigger_event(struct work_struct *work);
 static void activate_path(struct work_struct *work);
-static void deactivate_path(struct work_struct *work);
 
 
 /*-----------------------------------------------
@@ -126,7 +124,6 @@
 
 	if (pgpath) {
 		pgpath->is_active = 1;
-		INIT_WORK(&pgpath->deactivate_path, deactivate_path);
 		INIT_WORK(&pgpath->activate_path, activate_path);
 	}
 
@@ -138,14 +135,6 @@
 	kfree(pgpath);
 }
 
-static void deactivate_path(struct work_struct *work)
-{
-	struct pgpath *pgpath =
-		container_of(work, struct pgpath, deactivate_path);
-
-	blk_abort_queue(pgpath->path.dev->bdev->bd_disk->queue);
-}
-
 static struct priority_group *alloc_priority_group(void)
 {
 	struct priority_group *pg;
@@ -691,6 +680,7 @@
 
 		if (as->argc < nr_params) {
 			ti->error = "not enough path parameters";
+			r = -EINVAL;
 			goto bad;
 		}
 
@@ -788,6 +778,11 @@
 	if (!argc)
 		return 0;
 
+	if (argc > as->argc) {
+		ti->error = "not enough arguments for features";
+		return -EINVAL;
+	}
+
 	do {
 		param_name = shift(as);
 		argc--;
@@ -948,7 +943,6 @@
 		      pgpath->path.dev->name, m->nr_valid_paths);
 
 	schedule_work(&m->trigger_event);
-	queue_work(kmultipathd, &pgpath->deactivate_path);
 
 out:
 	spin_unlock_irqrestore(&m->lock, flags);
--- linux-mvl-dove-2.6.32.orig/drivers/md/dm-log-userspace-transfer.c
+++ linux-mvl-dove-2.6.32/drivers/md/dm-log-userspace-transfer.c
@@ -172,11 +172,15 @@
 {
 	int r = 0;
 	size_t dummy = 0;
-	int overhead_size =
-		sizeof(struct dm_ulog_request *) + sizeof(struct cn_msg);
+	int overhead_size = sizeof(struct dm_ulog_request) + sizeof(struct cn_msg);
 	struct dm_ulog_request *tfr = prealloced_ulog_tfr;
 	struct receiving_pkg pkg;
 
+	/*
+	 * Given the space needed to hold the 'struct cn_msg' and
+	 * 'struct dm_ulog_request' - do we have enough payload
+	 * space remaining?
+	 */
 	if (data_size > (DM_ULOG_PREALLOCED_SIZE - overhead_size)) {
 		DMINFO("Size of tfr exceeds preallocated size");
 		return -EINVAL;
@@ -191,7 +195,7 @@
 	 */
 	mutex_lock(&dm_ulog_lock);
 
-	memset(tfr, 0, DM_ULOG_PREALLOCED_SIZE - overhead_size);
+	memset(tfr, 0, DM_ULOG_PREALLOCED_SIZE - sizeof(struct cn_msg));
 	memcpy(tfr->uuid, uuid, DM_UUID_LEN);
 	tfr->luid = luid;
 	tfr->seq = dm_ulog_seq++;
--- linux-mvl-dove-2.6.32.orig/drivers/md/dm.c
+++ linux-mvl-dove-2.6.32/drivers/md/dm.c
@@ -36,6 +36,8 @@
 static unsigned int major = 0;
 static unsigned int _major = 0;
 
+static DEFINE_IDR(_minor_idr);
+
 static DEFINE_SPINLOCK(_minor_lock);
 /*
  * For bio-based dm.
@@ -315,6 +317,12 @@
 
 	while (i--)
 		_exits[i]();
+
+	/*
+	 * Should be empty by this point.
+	 */
+	idr_remove_all(&_minor_idr);
+	idr_destroy(&_minor_idr);
 }
 
 /*
@@ -614,8 +622,10 @@
 			if (!md->barrier_error && io_error != -EOPNOTSUPP)
 				md->barrier_error = io_error;
 			end_io_acct(io);
+			free_io(md, io);
 		} else {
 			end_io_acct(io);
+			free_io(md, io);
 
 			if (io_error != DM_ENDIO_REQUEUE) {
 				trace_block_bio_complete(md->queue, bio);
@@ -623,8 +633,6 @@
 				bio_endio(bio, io_error);
 			}
 		}
-
-		free_io(md, io);
 	}
 }
 
@@ -1487,10 +1495,15 @@
 	return BLKPREP_OK;
 }
 
-static void map_request(struct dm_target *ti, struct request *rq,
-			struct mapped_device *md)
+/*
+ * Returns:
+ * 0  : the request has been processed (not requeued)
+ * !0 : the request has been requeued
+ */
+static int map_request(struct dm_target *ti, struct request *rq,
+		       struct mapped_device *md)
 {
-	int r;
+	int r, requeued = 0;
 	struct request *clone = rq->special;
 	struct dm_rq_target_io *tio = clone->end_io_data;
 
@@ -1516,6 +1529,7 @@
 	case DM_MAPIO_REQUEUE:
 		/* The target wants to requeue the I/O */
 		dm_requeue_unmapped_request(clone);
+		requeued = 1;
 		break;
 	default:
 		if (r > 0) {
@@ -1527,6 +1541,8 @@
 		dm_kill_unmapped_request(clone, r);
 		break;
 	}
+
+	return requeued;
 }
 
 /*
@@ -1568,12 +1584,17 @@
 
 		blk_start_request(rq);
 		spin_unlock(q->queue_lock);
-		map_request(ti, rq, md);
+		if (map_request(ti, rq, md))
+			goto requeued;
+
 		spin_lock_irq(q->queue_lock);
 	}
 
 	goto out;
 
+requeued:
+	spin_lock_irq(q->queue_lock);
+
 plug_and_out:
 	if (!elv_queue_empty(q))
 		/* Some requests still remain, retry later */
@@ -1650,8 +1671,6 @@
 /*-----------------------------------------------------------------
  * An IDR is used to keep track of allocated minor numbers.
  *---------------------------------------------------------------*/
-static DEFINE_IDR(_minor_idr);
-
 static void free_minor(int minor)
 {
 	spin_lock(&_minor_lock);
@@ -1912,13 +1931,14 @@
 	wake_up(&md->eventq);
 }
 
+/*
+ * Protected by md->suspend_lock obtained by dm_swap_table().
+ */
 static void __set_size(struct mapped_device *md, sector_t size)
 {
 	set_capacity(md->disk, size);
 
-	mutex_lock(&md->bdev->bd_inode->i_mutex);
 	i_size_write(md->bdev->bd_inode, (loff_t)size << SECTOR_SHIFT);
-	mutex_unlock(&md->bdev->bd_inode->i_mutex);
 }
 
 static int __bind(struct mapped_device *md, struct dm_table *t,
@@ -2573,6 +2593,7 @@
 {
 	return md->disk;
 }
+EXPORT_SYMBOL_GPL(dm_disk);
 
 struct kobject *dm_kobject(struct mapped_device *md)
 {
--- linux-mvl-dove-2.6.32.orig/drivers/md/dm-region-hash.c
+++ linux-mvl-dove-2.6.32/drivers/md/dm-region-hash.c
@@ -643,10 +643,9 @@
 	spin_lock_irq(&rh->region_lock);
 	if (success)
 		list_add(&reg->list, &reg->rh->recovered_regions);
-	else {
-		reg->state = DM_RH_NOSYNC;
+	else
 		list_add(&reg->list, &reg->rh->failed_recovered_regions);
-	}
+
 	spin_unlock_irq(&rh->region_lock);
 
 	rh->wakeup_workers(rh->context);
--- linux-mvl-dove-2.6.32.orig/drivers/md/multipath.c
+++ linux-mvl-dove-2.6.32/drivers/md/multipath.c
@@ -301,14 +301,16 @@
 					  rdev->data_offset << 9);
 
 		/* as we don't honour merge_bvec_fn, we must never risk
-		 * violating it, so limit ->max_sector to one PAGE, as
-		 * a one page request is never in violation.
+		 * violating it, so limit ->max_phys_segments to one, lying
+		 * within a single page.
 		 * (Note: it is very unlikely that a device with
 		 * merge_bvec_fn will be involved in multipath.)
 		 */
-			if (q->merge_bvec_fn &&
-			    queue_max_sectors(q) > (PAGE_SIZE>>9))
-				blk_queue_max_sectors(mddev->queue, PAGE_SIZE>>9);
+			if (q->merge_bvec_fn) {
+				blk_queue_max_phys_segments(mddev->queue, 1);
+				blk_queue_segment_boundary(mddev->queue,
+							   PAGE_CACHE_SIZE - 1);
+			}
 
 			conf->working_disks++;
 			mddev->degraded--;
@@ -476,9 +478,11 @@
 		/* as we don't honour merge_bvec_fn, we must never risk
 		 * violating it, not that we ever expect a device with
 		 * a merge_bvec_fn to be involved in multipath */
-		if (rdev->bdev->bd_disk->queue->merge_bvec_fn &&
-		    queue_max_sectors(mddev->queue) > (PAGE_SIZE>>9))
-			blk_queue_max_sectors(mddev->queue, PAGE_SIZE>>9);
+		if (rdev->bdev->bd_disk->queue->merge_bvec_fn) {
+			blk_queue_max_phys_segments(mddev->queue, 1);
+			blk_queue_segment_boundary(mddev->queue,
+						   PAGE_CACHE_SIZE - 1);
+		}
 
 		if (!test_bit(Faulty, &rdev->flags))
 			conf->working_disks++;
--- linux-mvl-dove-2.6.32.orig/drivers/md/dm-table.c
+++ linux-mvl-dove-2.6.32/drivers/md/dm-table.c
@@ -348,6 +348,7 @@
 static int device_area_is_invalid(struct dm_target *ti, struct dm_dev *dev,
 				  sector_t start, sector_t len, void *data)
 {
+	struct request_queue *q;
 	struct queue_limits *limits = data;
 	struct block_device *bdev = dev->bdev;
 	sector_t dev_size =
@@ -356,6 +357,22 @@
 		limits->logical_block_size >> SECTOR_SHIFT;
 	char b[BDEVNAME_SIZE];
 
+	/*
+	 * Some devices exist without request functions,
+	 * such as loop devices not yet bound to backing files.
+	 * Forbid the use of such devices.
+	 */
+	q = bdev_get_queue(bdev);
+	if (!q || !q->make_request_fn) {
+		DMWARN("%s: %s is not yet initialised: "
+		       "start=%llu, len=%llu, dev_size=%llu",
+		       dm_device_name(ti->table->md), bdevname(bdev, b),
+		       (unsigned long long)start,
+		       (unsigned long long)len,
+		       (unsigned long long)dev_size);
+		return 1;
+	}
+
 	if (!dev_size)
 		return 0;
 
@@ -499,16 +516,15 @@
 		return 0;
 	}
 
-	if (blk_stack_limits(limits, &q->limits, start << 9) < 0)
-		DMWARN("%s: target device %s is misaligned: "
+	if (bdev_stack_limits(limits, bdev, start) < 0)
+		DMWARN("%s: adding target device %s caused an alignment inconsistency: "
 		       "physical_block_size=%u, logical_block_size=%u, "
 		       "alignment_offset=%u, start=%llu",
 		       dm_device_name(ti->table->md), bdevname(bdev, b),
 		       q->limits.physical_block_size,
 		       q->limits.logical_block_size,
 		       q->limits.alignment_offset,
-		       (unsigned long long) start << 9);
-
+		       (unsigned long long) start << SECTOR_SHIFT);
 
 	/*
 	 * Check if merge fn is supported.
@@ -1025,9 +1041,9 @@
 		 * for the table.
 		 */
 		if (blk_stack_limits(limits, &ti_limits, 0) < 0)
-			DMWARN("%s: target device "
+			DMWARN("%s: adding target device "
 			       "(start sect %llu len %llu) "
-			       "is misaligned",
+			       "caused an alignment inconsistency",
 			       dm_device_name(table->md),
 			       (unsigned long long) ti->begin,
 			       (unsigned long long) ti->len);
@@ -1079,24 +1095,10 @@
 			       struct queue_limits *limits)
 {
 	/*
-	 * Each target device in the table has a data area that should normally
-	 * be aligned such that the DM device's alignment_offset is 0.
-	 * FIXME: Propagate alignment_offsets up the stack and warn of
-	 *	  sub-optimal or inconsistent settings.
-	 */
-	limits->alignment_offset = 0;
-	limits->misaligned = 0;
-
-	/*
 	 * Copy table's limits to the DM device's request_queue
 	 */
 	q->limits = *limits;
 
-	if (limits->no_cluster)
-		queue_flag_clear_unlocked(QUEUE_FLAG_CLUSTER, q);
-	else
-		queue_flag_set_unlocked(QUEUE_FLAG_CLUSTER, q);
-
 	dm_table_set_integrity(t);
 
 	/*
--- linux-mvl-dove-2.6.32.orig/drivers/md/raid10.c
+++ linux-mvl-dove-2.6.32/drivers/md/raid10.c
@@ -493,7 +493,7 @@
  */
 static int read_balance(conf_t *conf, r10bio_t *r10_bio)
 {
-	const unsigned long this_sector = r10_bio->sector;
+	const sector_t this_sector = r10_bio->sector;
 	int disk, slot, nslot;
 	const int sectors = r10_bio->sectors;
 	sector_t new_distance, current_distance;
@@ -824,11 +824,29 @@
 		 */
 		bp = bio_split(bio,
 			       chunk_sects - (bio->bi_sector & (chunk_sects - 1)) );
+
+		/* Each of these 'make_request' calls will call 'wait_barrier'.
+		 * If the first succeeds but the second blocks due to the resync
+		 * thread raising the barrier, we will deadlock because the
+		 * IO to the underlying device will be queued in generic_make_request
+		 * and will never complete, so will never reduce nr_pending.
+		 * So increment nr_waiting here so no new raise_barriers will
+		 * succeed, and so the second wait_barrier cannot block.
+		 */
+		spin_lock_irq(&conf->resync_lock);
+		conf->nr_waiting++;
+		spin_unlock_irq(&conf->resync_lock);
+
 		if (make_request(q, &bp->bio1))
 			generic_make_request(&bp->bio1);
 		if (make_request(q, &bp->bio2))
 			generic_make_request(&bp->bio2);
 
+		spin_lock_irq(&conf->resync_lock);
+		conf->nr_waiting--;
+		wake_up(&conf->wait_barrier);
+		spin_unlock_irq(&conf->resync_lock);
+
 		bio_pair_release(bp);
 		return 0;
 	bad_map:
@@ -1155,13 +1173,17 @@
 
 			disk_stack_limits(mddev->gendisk, rdev->bdev,
 					  rdev->data_offset << 9);
-			/* as we don't honour merge_bvec_fn, we must never risk
-			 * violating it, so limit ->max_sector to one PAGE, as
-			 * a one page request is never in violation.
+			/* as we don't honour merge_bvec_fn, we must
+			 * never risk violating it, so limit
+			 * ->max_phys_segments to one lying with a single
+			 * page, as a one page request is never in
+			 * violation.
 			 */
-			if (rdev->bdev->bd_disk->queue->merge_bvec_fn &&
-			    queue_max_sectors(mddev->queue) > (PAGE_SIZE>>9))
-				blk_queue_max_sectors(mddev->queue, PAGE_SIZE>>9);
+			if (rdev->bdev->bd_disk->queue->merge_bvec_fn) {
+				blk_queue_max_phys_segments(mddev->queue, 1);
+				blk_queue_segment_boundary(mddev->queue,
+							   PAGE_CACHE_SIZE - 1);
+			}
 
 			p->head_position = 0;
 			rdev->raid_disk = mirror;
@@ -2155,12 +2177,14 @@
 		disk_stack_limits(mddev->gendisk, rdev->bdev,
 				  rdev->data_offset << 9);
 		/* as we don't honour merge_bvec_fn, we must never risk
-		 * violating it, so limit ->max_sector to one PAGE, as
-		 * a one page request is never in violation.
+		 * violating it, so limit max_phys_segments to 1 lying
+		 * within a single page.
 		 */
-		if (rdev->bdev->bd_disk->queue->merge_bvec_fn &&
-		    queue_max_sectors(mddev->queue) > (PAGE_SIZE>>9))
-			blk_queue_max_sectors(mddev->queue, PAGE_SIZE>>9);
+		if (rdev->bdev->bd_disk->queue->merge_bvec_fn) {
+			blk_queue_max_phys_segments(mddev->queue, 1);
+			blk_queue_segment_boundary(mddev->queue,
+						   PAGE_CACHE_SIZE - 1);
+		}
 
 		disk->head_position = 0;
 	}
--- linux-mvl-dove-2.6.32.orig/drivers/md/dm-snap.c
+++ linux-mvl-dove-2.6.32/drivers/md/dm-snap.c
@@ -553,6 +553,8 @@
 	hash_size = min(origin_dev_size, cow_dev_size) >> s->store->chunk_shift;
 	hash_size = min(hash_size, max_buckets);
 
+	if (hash_size < 64)
+		hash_size = 64;
 	hash_size = rounddown_pow_of_two(hash_size);
 	if (init_exception_table(&s->complete, hash_size,
 				 DM_CHUNK_CONSECUTIVE_BITS))
@@ -1152,10 +1154,11 @@
 	unsigned sz = 0;
 	struct dm_snapshot *snap = ti->private;
 
-	down_write(&snap->lock);
-
 	switch (type) {
 	case STATUSTYPE_INFO:
+
+		down_write(&snap->lock);
+
 		if (!snap->valid)
 			DMEMIT("Invalid");
 		else {
@@ -1171,6 +1174,9 @@
 			else
 				DMEMIT("Unknown");
 		}
+
+		up_write(&snap->lock);
+
 		break;
 
 	case STATUSTYPE_TABLE:
@@ -1185,8 +1191,6 @@
 		break;
 	}
 
-	up_write(&snap->lock);
-
 	return 0;
 }
 
--- linux-mvl-dove-2.6.32.orig/drivers/md/dm-exception-store.c
+++ linux-mvl-dove-2.6.32/drivers/md/dm-exception-store.c
@@ -216,7 +216,8 @@
 		type = get_type("N");
 	else {
 		ti->error = "Persistent flag is not P or N";
-		return -EINVAL;
+		r = -EINVAL;
+		goto bad_type;
 	}
 
 	if (!type) {
--- linux-mvl-dove-2.6.32.orig/drivers/md/dm-ioctl.c
+++ linux-mvl-dove-2.6.32/drivers/md/dm-ioctl.c
@@ -56,6 +56,11 @@
  */
 static DECLARE_RWSEM(_hash_lock);
 
+/*
+ * Protects use of mdptr to obtain hash cell name and uuid from mapped device.
+ */
+static DEFINE_MUTEX(dm_hash_cells_mutex);
+
 static void init_buckets(struct list_head *buckets)
 {
 	unsigned int i;
@@ -206,7 +211,9 @@
 		list_add(&cell->uuid_list, _uuid_buckets + hash_str(uuid));
 	}
 	dm_get(md);
+	mutex_lock(&dm_hash_cells_mutex);
 	dm_set_mdptr(md, cell);
+	mutex_unlock(&dm_hash_cells_mutex);
 	up_write(&_hash_lock);
 
 	return 0;
@@ -224,7 +231,9 @@
 	/* remove from the dev hash */
 	list_del(&hc->uuid_list);
 	list_del(&hc->name_list);
+	mutex_lock(&dm_hash_cells_mutex);
 	dm_set_mdptr(hc->md, NULL);
+	mutex_unlock(&dm_hash_cells_mutex);
 
 	table = dm_get_table(hc->md);
 	if (table) {
@@ -240,40 +249,46 @@
 
 static void dm_hash_remove_all(int keep_open_devices)
 {
-	int i, dev_skipped, dev_removed;
+	int i, dev_skipped;
 	struct hash_cell *hc;
-	struct list_head *tmp, *n;
+	struct mapped_device *md;
+
+retry:
+	dev_skipped = 0;
 
 	down_write(&_hash_lock);
 
-retry:
-	dev_skipped = dev_removed = 0;
 	for (i = 0; i < NUM_BUCKETS; i++) {
-		list_for_each_safe (tmp, n, _name_buckets + i) {
-			hc = list_entry(tmp, struct hash_cell, name_list);
+		list_for_each_entry(hc, _name_buckets + i, name_list) {
+			md = hc->md;
+			dm_get(md);
 
-			if (keep_open_devices &&
-			    dm_lock_for_deletion(hc->md)) {
+			if (keep_open_devices && dm_lock_for_deletion(md)) {
+				dm_put(md);
 				dev_skipped++;
 				continue;
 			}
+
 			__hash_remove(hc);
-			dev_removed = 1;
-		}
-	}
 
-	/*
-	 * Some mapped devices may be using other mapped devices, so if any
-	 * still exist, repeat until we make no further progress.
-	 */
-	if (dev_skipped) {
-		if (dev_removed)
-			goto retry;
+			up_write(&_hash_lock);
 
-		DMWARN("remove_all left %d open device(s)", dev_skipped);
+			dm_put(md);
+
+			/*
+			 * Some mapped devices may be using other mapped
+			 * devices, so repeat until we make no further
+			 * progress.  If a new mapped device is created
+			 * here it will also get removed.
+			 */
+			goto retry;
+		}
 	}
 
 	up_write(&_hash_lock);
+
+	if (dev_skipped)
+		DMWARN("remove_all left %d open device(s)", dev_skipped);
 }
 
 static int dm_hash_rename(uint32_t cookie, const char *old, const char *new)
@@ -321,7 +336,9 @@
 	 */
 	list_del(&hc->name_list);
 	old_name = hc->name;
+	mutex_lock(&dm_hash_cells_mutex);
 	hc->name = new_name;
+	mutex_unlock(&dm_hash_cells_mutex);
 	list_add(&hc->name_list, _name_buckets + hash_str(new_name));
 
 	/*
@@ -1582,8 +1599,7 @@
 	if (!md)
 		return -ENXIO;
 
-	dm_get(md);
-	down_read(&_hash_lock);
+	mutex_lock(&dm_hash_cells_mutex);
 	hc = dm_get_mdptr(md);
 	if (!hc || hc->md != md) {
 		r = -ENXIO;
@@ -1596,8 +1612,7 @@
 		strcpy(uuid, hc->uuid ? : "");
 
 out:
-	up_read(&_hash_lock);
-	dm_put(md);
+	mutex_unlock(&dm_hash_cells_mutex);
 
 	return r;
 }
--- linux-mvl-dove-2.6.32.orig/drivers/md/md.c
+++ linux-mvl-dove-2.6.32/drivers/md/md.c
@@ -282,7 +282,9 @@
 	if (!atomic_dec_and_lock(&mddev->active, &all_mddevs_lock))
 		return;
 	if (!mddev->raid_disks && list_empty(&mddev->disks) &&
-	    !mddev->hold_active) {
+	    mddev->ctime == 0 && !mddev->hold_active) {
+		/* Array is not configured at all, and not held active,
+		 * so destroy it */
 		list_del(&mddev->all_mddevs);
 		if (mddev->gendisk) {
 			/* we did a probe so need to clean up.
@@ -303,6 +305,9 @@
 {
 	mddev_t *mddev, *new = NULL;
 
+	if (unit && MAJOR(unit) != MD_MAJOR)
+		unit &= ~((1<<MdpMinorShift)-1);
+
  retry:
 	spin_lock(&all_mddevs_lock);
 
@@ -367,6 +372,7 @@
 
 	mutex_init(&new->open_mutex);
 	mutex_init(&new->reconfig_mutex);
+	mutex_init(&new->bitmap_mutex);
 	INIT_LIST_HEAD(&new->disks);
 	INIT_LIST_HEAD(&new->all_mddevs);
 	init_timer(&new->safemode_timer);
@@ -1119,7 +1125,7 @@
 	md_super_write(rdev->mddev, rdev, rdev->sb_start, rdev->sb_size,
 		       rdev->sb_page);
 	md_super_wait(rdev->mddev);
-	return num_sectors / 2; /* kB for sysfs */
+	return num_sectors;
 }
 
 
@@ -1482,7 +1488,7 @@
 	md_super_write(rdev->mddev, rdev, rdev->sb_start, rdev->sb_size,
 		       rdev->sb_page);
 	md_super_wait(rdev->mddev);
-	return num_sectors / 2; /* kB for sysfs */
+	return num_sectors;
 }
 
 static struct super_type super_types[] = {
@@ -2008,12 +2014,18 @@
 		if (!mddev->in_sync || mddev->recovery_cp != MaxSector) { /* not clean */
 			/* .. if the array isn't clean, an 'even' event must also go
 			 * to spares. */
-			if ((mddev->events&1)==0)
+			if ((mddev->events&1)==0) {
 				nospares = 0;
+				sync_req = 2; /* force a second update to get the
+					       * even/odd in sync */
+			}
 		} else {
 			/* otherwise an 'odd' event must go to spares */
-			if ((mddev->events&1))
+			if ((mddev->events&1)) {
 				nospares = 0;
+				sync_req = 2; /* force a second update to get the
+					       * even/odd in sync */
+			}
 		}
 	}
 
@@ -2250,7 +2262,7 @@
 		if (rdev->raid_disk == -1)
 			return -EEXIST;
 		/* personality does all needed checks */
-		if (rdev->mddev->pers->hot_add_disk == NULL)
+		if (rdev->mddev->pers->hot_remove_disk == NULL)
 			return -EINVAL;
 		err = rdev->mddev->pers->
 			hot_remove_disk(rdev->mddev, rdev->raid_disk);
@@ -3950,9 +3962,6 @@
 		goto abort;
 	mddev->queue->queuedata = mddev;
 
-	/* Can be unlocked because the queue is new: no concurrency */
-	queue_flag_set_unlocked(QUEUE_FLAG_CLUSTER, mddev->queue);
-
 	blk_queue_make_request(mddev->queue, md_make_request);
 
 	disk = alloc_disk(1 << shift);
@@ -4170,7 +4179,7 @@
 	mddev->barriers_work = 1;
 	mddev->ok_start_degraded = start_dirty_degraded;
 
-	if (start_readonly)
+	if (start_readonly && mddev->ro == 0)
 		mddev->ro = 2; /* read-only, but switch on first write */
 
 	err = mddev->pers->run(mddev);
@@ -4793,17 +4802,21 @@
 				PTR_ERR(rdev));
 			return PTR_ERR(rdev);
 		}
-		/* set save_raid_disk if appropriate */
+		/* set saved_raid_disk if appropriate */
 		if (!mddev->persistent) {
 			if (info->state & (1<<MD_DISK_SYNC)  &&
-			    info->raid_disk < mddev->raid_disks)
+			    info->raid_disk < mddev->raid_disks) {
 				rdev->raid_disk = info->raid_disk;
-			else
+				set_bit(In_sync, &rdev->flags);
+			} else
 				rdev->raid_disk = -1;
 		} else
 			super_types[mddev->major_version].
 				validate_super(mddev, rdev);
-		rdev->saved_raid_disk = rdev->raid_disk;
+		if (test_bit(In_sync, &rdev->flags))
+			rdev->saved_raid_disk = rdev->raid_disk;
+		else
+			rdev->saved_raid_disk = -1;
 
 		clear_bit(In_sync, &rdev->flags); /* just to be sure */
 		if (info->state & (1<<MD_DISK_WRITEMOSTLY))
@@ -5070,6 +5083,10 @@
 		mddev->minor_version = info->minor_version;
 		mddev->patch_version = info->patch_version;
 		mddev->persistent = !info->not_persistent;
+		/* ensure mddev_put doesn't delete this now that there
+		 * is some minimal configuration.
+		 */
+		mddev->ctime         = get_seconds();
 		return 0;
 	}
 	mddev->major_version = MD_MAJOR_VERSION;
@@ -5321,6 +5338,7 @@
 	int err = 0;
 	void __user *argp = (void __user *)arg;
 	mddev_t *mddev = NULL;
+	int ro;
 
 	if (!capable(CAP_SYS_ADMIN))
 		return -EACCES;
@@ -5456,6 +5474,34 @@
 			err = do_md_stop(mddev, 1, 1);
 			goto done_unlock;
 
+		case BLKROSET:
+			if (get_user(ro, (int __user *)(arg))) {
+				err = -EFAULT;
+				goto done_unlock;
+			}
+			err = -EINVAL;
+
+			/* if the bdev is going readonly the value of mddev->ro
+			 * does not matter, no writes are coming
+			 */
+			if (ro)
+				goto done_unlock;
+
+			/* are we are already prepared for writes? */
+			if (mddev->ro != 1)
+				goto done_unlock;
+
+			/* transitioning to readauto need only happen for
+			 * arrays that call md_write_start
+			 */
+			if (mddev->pers) {
+				err = restart_array(mddev);
+				if (err == 0) {
+					mddev->ro = 2;
+					set_disk_ro(mddev->gendisk, 0);
+				}
+			}
+			goto done_unlock;
 	}
 
 	/*
@@ -6577,6 +6623,7 @@
 		list_for_each_entry(rdev, &mddev->disks, same_set) {
 			if (rdev->raid_disk >= 0 &&
 			    !test_bit(In_sync, &rdev->flags) &&
+			    !test_bit(Faulty, &rdev->flags) &&
 			    !test_bit(Blocked, &rdev->flags))
 				spares++;
 			if (rdev->raid_disk < 0
@@ -6629,7 +6676,7 @@
 
 
 	if (mddev->bitmap)
-		bitmap_daemon_work(mddev->bitmap);
+		bitmap_daemon_work(mddev);
 
 	if (mddev->ro)
 		return;
--- linux-mvl-dove-2.6.32.orig/drivers/ssb/driver_chipcommon.c
+++ linux-mvl-dove-2.6.32/drivers/ssb/driver_chipcommon.c
@@ -233,6 +233,9 @@
 {
 	if (!cc->dev)
 		return; /* We don't have a ChipCommon */
+	if (cc->dev->id.revision >= 11)
+		cc->status = chipco_read32(cc, SSB_CHIPCO_CHIPSTAT);
+	ssb_dprintk(KERN_INFO PFX "chipcommon status is 0x%x\n", cc->status);
 	ssb_pmu_init(cc);
 	chipco_powercontrol_init(cc);
 	ssb_chipco_set_clockmode(cc, SSB_CLKMODE_FAST);
--- linux-mvl-dove-2.6.32.orig/drivers/ssb/sprom.c
+++ linux-mvl-dove-2.6.32/drivers/ssb/sprom.c
@@ -13,6 +13,8 @@
 
 #include "ssb_private.h"
 
+#include <linux/ctype.h>
+
 
 static const struct ssb_sprom *fallback_sprom;
 
@@ -33,17 +35,27 @@
 static int hex2sprom(u16 *sprom, const char *dump, size_t len,
 		     size_t sprom_size_words)
 {
-	char tmp[5] = { 0 };
-	int cnt = 0;
+	char c, tmp[5] = { 0 };
+	int err, cnt = 0;
 	unsigned long parsed;
 
-	if (len < sprom_size_words * 2)
+	/* Strip whitespace at the end. */
+	while (len) {
+		c = dump[len - 1];
+		if (!isspace(c) && c != '\0')
+			break;
+		len--;
+	}
+	/* Length must match exactly. */
+	if (len != sprom_size_words * 4)
 		return -EINVAL;
 
 	while (cnt < sprom_size_words) {
 		memcpy(tmp, dump, 4);
 		dump += 4;
-		parsed = simple_strtoul(tmp, NULL, 16);
+		err = strict_strtoul(tmp, 16, &parsed);
+		if (err)
+			return err;
 		sprom[cnt++] = swab16((u16)parsed);
 	}
 
@@ -167,3 +179,18 @@
 {
 	return fallback_sprom;
 }
+
+/* http://bcm-v4.sipsolutions.net/802.11/IsSpromAvailable */
+bool ssb_is_sprom_available(struct ssb_bus *bus)
+{
+	/* status register only exists on chipcomon rev >= 11 and we need check
+	   for >= 31 only */
+	/* this routine differs from specs as we do not access SPROM directly
+	   on PCMCIA */
+	if (bus->bustype == SSB_BUSTYPE_PCI &&
+	    bus->chipco.dev &&	/* can be unavailible! */
+	    bus->chipco.dev->id.revision >= 31)
+		return bus->chipco.capabilities & SSB_CHIPCO_CAP_SPROM;
+
+	return true;
+}
--- linux-mvl-dove-2.6.32.orig/drivers/ssb/pci.c
+++ linux-mvl-dove-2.6.32/drivers/ssb/pci.c
@@ -167,7 +167,7 @@
 }
 
 /* Get the word-offset for a SSB_SPROM_XXX define. */
-#define SPOFF(offset)	(((offset) - SSB_SPROM_BASE) / sizeof(u16))
+#define SPOFF(offset)	(((offset) - SSB_SPROM_BASE1) / sizeof(u16))
 /* Helper to extract some _offset, which is one of the SSB_SPROM_XXX defines. */
 #define SPEX16(_outvar, _offset, _mask, _shift)	\
 	out->_outvar = ((in[SPOFF(_offset)] & (_mask)) >> (_shift))
@@ -253,7 +253,7 @@
 	int i;
 
 	for (i = 0; i < bus->sprom_size; i++)
-		sprom[i] = ioread16(bus->mmio + SSB_SPROM_BASE + (i * 2));
+		sprom[i] = ioread16(bus->mmio + bus->sprom_offset + (i * 2));
 
 	return 0;
 }
@@ -284,7 +284,7 @@
 			ssb_printk("75%%");
 		else if (i % 2)
 			ssb_printk(".");
-		writew(sprom[i], bus->mmio + SSB_SPROM_BASE + (i * 2));
+		writew(sprom[i], bus->mmio + bus->sprom_offset + (i * 2));
 		mmiowb();
 		msleep(20);
 	}
@@ -620,6 +620,28 @@
 	int err = -ENOMEM;
 	u16 *buf;
 
+	if (!ssb_is_sprom_available(bus)) {
+		ssb_printk(KERN_ERR PFX "No SPROM available!\n");
+		return -ENODEV;
+	}
+	if (bus->chipco.dev) {	/* can be unavailible! */
+		/*
+		 * get SPROM offset: SSB_SPROM_BASE1 except for
+		 * chipcommon rev >= 31 or chip ID is 0x4312 and
+		 * chipcommon status & 3 == 2
+		 */
+		if (bus->chipco.dev->id.revision >= 31)
+			bus->sprom_offset = SSB_SPROM_BASE31;
+		else if (bus->chip_id == 0x4312 &&
+			 (bus->chipco.status & 0x03) == 2)
+			bus->sprom_offset = SSB_SPROM_BASE31;
+		else
+			bus->sprom_offset = SSB_SPROM_BASE1;
+	} else {
+		bus->sprom_offset = SSB_SPROM_BASE1;
+	}
+	ssb_dprintk(KERN_INFO PFX "SPROM offset is 0x%x\n", bus->sprom_offset);
+
 	buf = kcalloc(SSB_SPROMSIZE_WORDS_R123, sizeof(u16), GFP_KERNEL);
 	if (!buf)
 		goto out;
--- linux-mvl-dove-2.6.32.orig/drivers/ssb/b43_pci_bridge.c
+++ linux-mvl-dove-2.6.32/drivers/ssb/b43_pci_bridge.c
@@ -24,6 +24,7 @@
 	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4312) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4315) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4318) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_BCM_GVC,  0x4318) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4319) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4320) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4321) },
--- linux-mvl-dove-2.6.32.orig/drivers/platform/x86/toshiba_acpi.c
+++ linux-mvl-dove-2.6.32/drivers/platform/x86/toshiba_acpi.c
@@ -28,13 +28,28 @@
  *		engineering the Windows drivers
  *	Yasushi Nagato - changes for linux kernel 2.4 -> 2.5
  *	Rob Miller - TV out and hotkeys help
+ *      Daniel Silverstone - Punting of hotkeys via acpi using a thread    	
  *
+ *  PLEASE NOTE
+ *
+ *  This is an experimental version of toshiba_acpi which includes emulation
+ *  of the original toshiba driver's /proc/toshiba and /dev/toshiba,
+ *  allowing Toshiba userspace utilities to work.  The relevant code was
+ *  based on toshiba.c (copyright 1996-2001 Jonathan A. Buzzard) and
+ *  incorporated into this driver with help from Gintautas Miliauskas,
+ *  Charles Schwieters, and Christoph Burger-Scheidlin.
+ *
+ *  Caveats:
+ *      * hotkey status in /proc/toshiba is not implemented
+ *      * to make accesses to /dev/toshiba load this driver instead of
+ *          the original driver, you will have to modify your module
+ *          auto-loading configuration
  *
  *  TODO
  *
  */
 
-#define TOSHIBA_ACPI_VERSION	"0.19"
+#define TOSHIBA_ACPI_VERSION	"0.19-dev-acpikeys"
 #define PROC_INTERFACE_VERSION	1
 
 #include <linux/kernel.h>
@@ -42,9 +57,15 @@
 #include <linux/init.h>
 #include <linux/types.h>
 #include <linux/proc_fs.h>
+#include <linux/seq_file.h>
+#include <linux/miscdevice.h>
+#include <linux/toshiba.h>
+#include <asm/io.h>
 #include <linux/backlight.h>
 #include <linux/platform_device.h>
 #include <linux/rfkill.h>
+#include <linux/input-polldev.h>
+#include <linux/freezer.h>
 
 #include <asm/uaccess.h>
 
@@ -356,6 +377,11 @@
 static int force_fan;
 static int last_key_event;
 static int key_event_valid;
+static int hotkeys_over_acpi = 1;
+static int hotkeys_check_per_sec = 2;
+
+module_param(hotkeys_over_acpi, uint, 0400);
+module_param(hotkeys_check_per_sec, uint, 0400);
 
 typedef struct _ProcItem {
 	const char *name;
@@ -583,27 +609,34 @@
 	u32 hci_result;
 	u32 value;
 
-	if (!key_event_valid) {
-		hci_read1(HCI_SYSTEM_EVENT, &value, &hci_result);
-		if (hci_result == HCI_SUCCESS) {
-			key_event_valid = 1;
-			last_key_event = value;
-		} else if (hci_result == HCI_EMPTY) {
-			/* better luck next time */
-		} else if (hci_result == HCI_NOT_SUPPORTED) {
-			/* This is a workaround for an unresolved issue on
-			 * some machines where system events sporadically
-			 * become disabled. */
-			hci_write1(HCI_SYSTEM_EVENT, 1, &hci_result);
-			printk(MY_NOTICE "Re-enabled hotkeys\n");
-		} else {
-			printk(MY_ERR "Error reading hotkey status\n");
-			goto end;
+	if (!hotkeys_over_acpi) {
+		if (!key_event_valid) {
+			hci_read1(HCI_SYSTEM_EVENT, &value, &hci_result);
+			if (hci_result == HCI_SUCCESS) {
+				key_event_valid = 1;
+				last_key_event = value;
+			} else if (hci_result == HCI_EMPTY) {
+				/* better luck next time */
+			} else if (hci_result == HCI_NOT_SUPPORTED) {
+				/* This is a workaround for an
+				 * unresolved issue on some machines
+				 * where system events sporadically
+				 * become disabled. */
+				hci_write1(HCI_SYSTEM_EVENT, 1, &hci_result);
+				printk(MY_NOTICE "Re-enabled hotkeys\n");
+			} else {
+				printk(MY_ERR "Error reading hotkey status\n");
+				goto end;
+			}
 		}
+	} else {
+		key_event_valid = 0;
+		last_key_event = 0;
 	}
 
 	p += sprintf(p, "hotkey_ready:            %d\n", key_event_valid);
 	p += sprintf(p, "hotkey:                  0x%04x\n", last_key_event);
+	p += sprintf(p, "hotkeys_via_acpi:        %d\n", hotkeys_over_acpi);
 
       end:
 	return p;
@@ -630,6 +663,191 @@
 	return p;
 }
 
+/* /dev/toshiba and /proc/toshiba handlers {{{
+ *
+ * ISSUE: lots of magic numbers and mysterious code
+ */
+
+#define TOSH_MINOR_DEV		181
+#define OLD_PROC_TOSHIBA	"toshiba"
+
+static int
+tosh_acpi_bridge(SMMRegisters* regs)
+{
+	acpi_status status;
+
+	/* assert(sizeof(SMMRegisters) == sizeof(u32)*HCI_WORDS); */
+	status = hci_raw((u32*)regs, (u32*)regs);
+	if (status == AE_OK && (regs->eax & 0xff00) == HCI_SUCCESS)
+		return 0;
+
+	return -EINVAL;
+}
+
+static int
+tosh_ioctl(struct inode* ip, struct file* fp, unsigned int cmd,
+	unsigned long arg)
+{
+	SMMRegisters regs;
+	unsigned short ax,bx;
+	int err;
+
+	if ((!arg) || (cmd != TOSH_SMM))
+		return -EINVAL;
+
+	if (copy_from_user(&regs, (SMMRegisters*)arg, sizeof(SMMRegisters)))
+		return -EFAULT;
+
+	ax = regs.eax & 0xff00;
+	bx = regs.ebx & 0xffff;
+
+	/* block HCI calls to read/write memory & PCI devices */
+	if (((ax==HCI_SET) || (ax==HCI_GET)) && (bx>0x0069))
+		return -EINVAL;
+
+	err = tosh_acpi_bridge(&regs);
+
+	if (copy_to_user((SMMRegisters*)arg, &regs, sizeof(SMMRegisters)))
+		return -EFAULT;
+
+	return err;
+}
+
+static int
+tosh_get_machine_id(void __iomem *bios)
+{
+	int id;
+	unsigned short bx,cx;
+	unsigned long address;
+
+	id = (0x100*(int) readb(bios+0xfffe))+((int) readb(bios+0xfffa));
+
+	/* do we have a SCTTable machine identication number on our hands */
+	if (id==0xfc2f) {
+		bx = 0xe6f5; /* cheat */
+		/* now twiddle with our pointer a bit */
+		address = 0x00000000 + bx;
+		cx = readw(bios + address);
+		address = 0x00000009 + bx + cx;
+		cx = readw(bios + address);
+		address = 0x0000000a + cx;
+		cx = readw(bios + address);
+		/* now construct our machine identification number */
+		id = ((cx & 0xff)<<8)+((cx & 0xff00)>>8);
+	}
+
+	return id;
+}
+
+static int tosh_id;
+static int tosh_bios;
+static int tosh_date;
+static int tosh_sci;
+
+static struct file_operations tosh_fops = {
+	.owner = THIS_MODULE,
+	.ioctl = tosh_ioctl
+};
+
+static struct miscdevice tosh_device = {
+	TOSH_MINOR_DEV,
+	"toshiba",
+	&tosh_fops
+};
+
+static void
+setup_tosh_info(void __iomem *bios)
+{
+	int major, minor;
+	int day, month, year;
+
+	tosh_id = tosh_get_machine_id(bios);
+
+	/* get the BIOS version */
+	major = readb(bios + 0xe009)-'0';
+	minor = ((readb(bios + 0xe00b)-'0')*10)+(readb(bios + 0xe00c)-'0');
+	tosh_bios = (major*0x100)+minor;
+
+	/* get the BIOS date */
+	day = ((readb(bios + 0xfff5)-'0')*10)+(readb(bios + 0xfff6)-'0');
+	month = ((readb(bios + 0xfff8)-'0')*10)+(readb(bios + 0xfff9)-'0');
+	year = ((readb(bios + 0xfffb)-'0')*10)+(readb(bios + 0xfffc)-'0');
+	tosh_date = (((year-90) & 0x1f)<<10) | ((month & 0xf)<<6)
+		| ((day & 0x1f)<<1);
+}
+
+/* /proc/toshiba read handler */
+static int
+tosh_proc_show(struct seq_file *m, void *v)
+{
+	/* TODO: tosh_fn_status() */
+	int key = 0;
+
+	/* Format:
+	 *    0) Linux driver version (this will change if format changes)
+	 *    1) Machine ID
+	 *    2) SCI version
+	 *    3) BIOS version (major, minor)
+	 *    4) BIOS date (in SCI date format)
+	 *    5) Fn Key status
+	 */
+
+	seq_printf(m, "1.1 0x%04x %d.%d %d.%d 0x%04x 0x%02x\n",
+		tosh_id,
+		(tosh_sci & 0xff00)>>8,
+		tosh_sci & 0xff,
+		(tosh_bios & 0xff00)>>8,
+		tosh_bios & 0xff,
+		tosh_date,
+		key);
+
+	return 0;
+}
+
+static int tosh_proc_open(struct inode *inode, struct file *file)
+{
+	return single_open(file, tosh_proc_show, NULL);
+}
+
+static const struct file_operations tosh_proc_fops = {
+	.owner		= THIS_MODULE,
+	.open		= tosh_proc_open,
+	.read		= seq_read,
+	.llseek		= seq_lseek,
+	.release	= single_release,
+};
+
+static int __init
+old_driver_emulation_init(void)
+{
+	int status;
+	void __iomem *bios = ioremap(0xf0000, 0x10000);
+	if (!bios)
+		return -ENOMEM;
+
+	if ((status = misc_register(&tosh_device))) {
+		printk(MY_ERR "failed to register misc device %d (\"%s\")\n",
+			tosh_device.minor, tosh_device.name);
+		return status;
+	}
+
+	setup_tosh_info(bios);
+	proc_create(OLD_PROC_TOSHIBA, 0, NULL, &tosh_proc_fops);
+
+	iounmap(bios);
+
+	return 0;
+}
+
+static void __exit
+old_driver_emulation_exit(void)
+{
+	remove_proc_entry(OLD_PROC_TOSHIBA, NULL);
+	misc_deregister(&tosh_device);
+}
+
+/* }}} end of /dev/toshiba and /proc/toshiba handlers */
+
 /* proc and module init
  */
 
@@ -676,6 +894,133 @@
         .update_status  = set_lcd_status,
 };
 
+static struct semaphore thread_sem;
+static int thread_should_die;
+
+static struct acpi_device *threaded_device = 0;
+
+static void thread_deliver_button_event(u32 value)
+{
+	if (!threaded_device) return;
+	if( value == 0x0100 ) {
+		/* Ignore FN on its own */
+	} else if( value & 0x80 ) {
+		acpi_bus_generate_proc_event( threaded_device, 1, value & ~0x80 );
+	} else {
+		acpi_bus_generate_proc_event( threaded_device, 0, value );
+	}
+}
+
+static int toshiba_acpi_thread(void *data)
+{
+	int dropped = 0;
+	u32 hci_result, value;
+
+	daemonize("ktoshkeyd");
+	set_user_nice(current, 4);
+	thread_should_die = 0;
+
+	up(&thread_sem);
+
+	do {
+		/* In case we get stuck; we can rmmod the module here */
+		if (thread_should_die)
+			break;
+
+		hci_read1(HCI_SYSTEM_EVENT, &value, &hci_result);
+		if (hci_result == HCI_SUCCESS) {
+			dropped++;
+		} else if (hci_result == HCI_EMPTY) {
+                         /* better luck next time */
+		} else if (hci_result == HCI_NOT_SUPPORTED) {
+			/* This is a workaround for an unresolved issue on
+			 * some machines where system events sporadically
+			 * become disabled. */
+			hci_write1(HCI_SYSTEM_EVENT, 1, &hci_result);
+			printk(MY_NOTICE "Re-enabled hotkeys\n");
+		}
+	} while (hci_result != HCI_EMPTY);
+
+	printk(MY_INFO "Dropped %d keys from the queue on startup\n", dropped);
+
+	for (;;) {
+		set_current_state(TASK_INTERRUPTIBLE);
+		schedule_timeout(HZ / hotkeys_check_per_sec);
+
+		if (thread_should_die)
+			break;
+
+		if (try_to_freeze())
+			continue;
+
+		do {
+			hci_read1(HCI_SYSTEM_EVENT, &value, &hci_result);
+			if (hci_result == HCI_SUCCESS) {
+				thread_deliver_button_event(value);
+			} else if (hci_result == HCI_EMPTY) {
+				/* better luck next time */
+			} else if (hci_result == HCI_NOT_SUPPORTED) {
+				/* This is a workaround for an
+				 * unresolved issue on some machines
+				 * where system events sporadically
+				 * become disabled. */
+				hci_write1(HCI_SYSTEM_EVENT, 1, &hci_result);
+				printk(MY_NOTICE "Re-enabled hotkeys\n");
+			}
+		} while (hci_result == HCI_SUCCESS);
+	}
+	set_user_nice(current, -20);	/* Become nasty so we are cleaned up
+					 * before the module exits making us oops */
+	up(&thread_sem);
+	return 0;
+}
+
+static int acpi_toshkeys_add (struct acpi_device *device)
+{
+	threaded_device = device;
+	strcpy(acpi_device_name(device), "Toshiba laptop hotkeys");
+	strcpy(acpi_device_class(device), "hkey");
+	return 0;
+}
+
+static int acpi_toshkeys_remove (struct acpi_device *device, int type)
+{
+	if (threaded_device == device)
+		threaded_device = 0;
+	return 0;
+}
+
+static const struct acpi_device_id acpi_toshkeys_ids[] = {
+	{ "TOS6200", 0 },
+	{ "TOS6207", 0 },
+	{ "TOS6208", 0 },
+ 	{"", 0}
+};
+
+static struct acpi_driver acpi_threaded_toshkeys = {
+	.name = "Toshiba laptop hotkeys driver",
+	.class = "hkey",
+	.ids = acpi_toshkeys_ids,
+	.ops = {
+		.add = acpi_toshkeys_add,
+		.remove = acpi_toshkeys_remove,
+	},
+};
+
+static int __init init_threaded_acpi(void)
+{
+        acpi_status result = AE_OK;
+        result = acpi_bus_register_driver(&acpi_threaded_toshkeys);
+        if( result < 0 )
+                printk(MY_ERR "Registration of toshkeys acpi device failed\n");
+        return result;
+}
+
+static void kill_threaded_acpi(void)
+{
+        acpi_bus_unregister_driver(&acpi_threaded_toshkeys);
+}
+
 static void toshiba_acpi_exit(void)
 {
 	if (toshiba_acpi.bt_rfk) {
@@ -686,11 +1031,19 @@
 	if (toshiba_backlight_device)
 		backlight_device_unregister(toshiba_backlight_device);
 
+	if (hotkeys_over_acpi) {
+		thread_should_die = 1;
+		down(&thread_sem);
+		kill_threaded_acpi();
+	}
+
 	remove_device();
 
 	if (toshiba_proc_dir)
 		remove_proc_entry(PROC_TOSHIBA, acpi_root_dir);
 
+	old_driver_emulation_exit();
+
 	platform_device_unregister(toshiba_acpi.p_dev);
 
 	return;
@@ -730,6 +1083,9 @@
 		return ret;
 	}
 
+	if ((ret = old_driver_emulation_init()))
+		return ret;
+
 	force_fan = 0;
 	key_event_valid = 0;
 
@@ -762,6 +1118,26 @@
 	}
         toshiba_backlight_device->props.max_brightness = HCI_LCD_BRIGHTNESS_LEVELS - 1;
 
+	if (hotkeys_over_acpi && ACPI_SUCCESS(status)) {
+		printk(MY_INFO "Toshiba hotkeys are sent as ACPI events\n");
+		if (hotkeys_check_per_sec < 1)
+			hotkeys_check_per_sec = 1;
+		if (hotkeys_check_per_sec > 10)
+			hotkeys_check_per_sec = 10;
+		printk(MY_INFO "ktoshkeyd will check %d time%s per second\n",
+			hotkeys_check_per_sec, hotkeys_check_per_sec==1?"":"s");
+		if (init_threaded_acpi() >= 0) {
+			init_MUTEX_LOCKED(&thread_sem);
+			kernel_thread(toshiba_acpi_thread, NULL, CLONE_KERNEL);
+			down(&thread_sem);
+		} else {
+			remove_device();
+			remove_proc_entry(PROC_TOSHIBA, acpi_root_dir);
+			status = AE_ERROR;
+			printk(MY_INFO "ktoshkeyd initialisation failed. Refusing to load module\n");
+		}
+	}
+
 	/* Register rfkill switch for Bluetooth */
 	if (hci_get_bt_present(&bt_present) == HCI_SUCCESS && bt_present) {
 		toshiba_acpi.bt_rfk = rfkill_alloc(toshiba_acpi.bt_name,
--- linux-mvl-dove-2.6.32.orig/drivers/platform/x86/asus-laptop.c
+++ linux-mvl-dove-2.6.32/drivers/platform/x86/asus-laptop.c
@@ -221,6 +221,7 @@
  */
 static const struct acpi_device_id asus_device_ids[] = {
 	{"ATK0100", 0},
+	{"ATK0101", 0},
 	{"", 0},
 };
 MODULE_DEVICE_TABLE(acpi, asus_device_ids);
@@ -293,6 +294,11 @@
 enum { KE_KEY, KE_END };
 
 static struct key_entry asus_keymap[] = {
+	{KE_KEY, 0x02, KEY_SCREENLOCK},
+	{KE_KEY, 0x05, KEY_WLAN},
+	{KE_KEY, 0x08, BTN_TOUCH},
+	{KE_KEY, 0x17, KEY_ZOOM},
+	{KE_KEY, 0x1f, KEY_BATTERY},
 	{KE_KEY, 0x30, KEY_VOLUMEUP},
 	{KE_KEY, 0x31, KEY_VOLUMEDOWN},
 	{KE_KEY, 0x32, KEY_MUTE},
@@ -312,6 +318,8 @@
 	{KE_KEY, 0x5F, KEY_WLAN},
 	{KE_KEY, 0x60, KEY_SWITCHVIDEOMODE},
 	{KE_KEY, 0x61, KEY_SWITCHVIDEOMODE},
+	{KE_KEY, 0x62, KEY_SWITCHVIDEOMODE},
+	{KE_KEY, 0x63, KEY_SWITCHVIDEOMODE},
 	{KE_KEY, 0x6B, BTN_TOUCH}, /* Lock Mouse */
 	{KE_KEY, 0x82, KEY_CAMERA},
 	{KE_KEY, 0x8A, KEY_PROG1},
@@ -1283,8 +1291,8 @@
 	hotk->ledd_status = 0xFFF;
 
 	/* Set initial values of light sensor and level */
-	hotk->light_switch = 1;	/* Default to light sensor disabled */
-	hotk->light_level = 0;	/* level 5 for sensor sensitivity */
+	hotk->light_switch = 0;	/* Default to light sensor disabled */
+	hotk->light_level = 5;	/* level 5 for sensor sensitivity */
 
 	if (ls_switch_handle)
 		set_light_sens_switch(hotk->light_switch);
--- linux-mvl-dove-2.6.32.orig/drivers/platform/x86/thinkpad_acpi.c
+++ linux-mvl-dove-2.6.32/drivers/platform/x86/thinkpad_acpi.c
@@ -21,8 +21,8 @@
  *  02110-1301, USA.
  */
 
-#define TPACPI_VERSION "0.23"
-#define TPACPI_SYSFS_VERSION 0x020500
+#define TPACPI_VERSION "0.24"
+#define TPACPI_SYSFS_VERSION 0x020700
 
 /*
  *  Changelog:
@@ -61,6 +61,7 @@
 
 #include <linux/nvram.h>
 #include <linux/proc_fs.h>
+#include <linux/seq_file.h>
 #include <linux/sysfs.h>
 #include <linux/backlight.h>
 #include <linux/fb.h>
@@ -76,6 +77,10 @@
 #include <linux/jiffies.h>
 #include <linux/workqueue.h>
 
+#include <sound/core.h>
+#include <sound/control.h>
+#include <sound/initval.h>
+
 #include <acpi/acpi_drivers.h>
 
 #include <linux/pci_ids.h>
@@ -231,6 +236,7 @@
 #define TPACPI_DBG_HKEY		0x0008
 #define TPACPI_DBG_FAN		0x0010
 #define TPACPI_DBG_BRGHT	0x0020
+#define TPACPI_DBG_MIXER	0x0040
 
 #define onoff(status, bit) ((status) & (1 << (bit)) ? "on" : "off")
 #define enabled(status, bit) ((status) & (1 << (bit)) ? "enabled" : "disabled")
@@ -256,7 +262,7 @@
 struct ibm_struct {
 	char *name;
 
-	int (*read) (char *);
+	int (*read) (struct seq_file *);
 	int (*write) (char *);
 	void (*exit) (void);
 	void (*resume) (void);
@@ -280,6 +286,7 @@
 	char param[32];
 
 	int (*init) (struct ibm_init_struct *);
+	mode_t base_procfs_mode;
 	struct ibm_struct *data;
 };
 
@@ -298,6 +305,7 @@
 	u32 fan_ctrl_status_undef:1;
 	u32 second_fan:1;
 	u32 beep_needs_two_args:1;
+	u32 mixer_no_level_control:1;
 	u32 input_device_registered:1;
 	u32 platform_drv_registered:1;
 	u32 platform_drv_attrs_registered:1;
@@ -309,6 +317,7 @@
 
 static struct {
 	u16 hotkey_mask_ff:1;
+	u16 volume_ctrl_forbidden:1;
 } tp_warned;
 
 struct thinkpad_id_data {
@@ -425,6 +434,12 @@
 	  .ec = TPACPI_MATCH_ANY,		\
 	  .quirks = (__quirk) }
 
+#define TPACPI_QEC_LNV(__id1, __id2, __quirk)	\
+	{ .vendor = PCI_VENDOR_ID_LENOVO,	\
+	  .bios = TPACPI_MATCH_ANY,		\
+	  .ec = TPID(__id1, __id2),		\
+	  .quirks = (__quirk) }
+
 struct tpacpi_quirk {
 	unsigned int vendor;
 	u16 bios;
@@ -776,36 +791,25 @@
  ****************************************************************************
  ****************************************************************************/
 
-static int dispatch_procfs_read(char *page, char **start, off_t off,
-			int count, int *eof, void *data)
+static int dispatch_proc_show(struct seq_file *m, void *v)
 {
-	struct ibm_struct *ibm = data;
-	int len;
+	struct ibm_struct *ibm = m->private;
 
 	if (!ibm || !ibm->read)
 		return -EINVAL;
+	return ibm->read(m);
+}
 
-	len = ibm->read(page);
-	if (len < 0)
-		return len;
-
-	if (len <= off + count)
-		*eof = 1;
-	*start = page + off;
-	len -= off;
-	if (len > count)
-		len = count;
-	if (len < 0)
-		len = 0;
-
-	return len;
+static int dispatch_proc_open(struct inode *inode, struct file *file)
+{
+	return single_open(file, dispatch_proc_show, PDE(inode)->data);
 }
 
-static int dispatch_procfs_write(struct file *file,
+static ssize_t dispatch_proc_write(struct file *file,
 			const char __user *userbuf,
-			unsigned long count, void *data)
+			size_t count, loff_t *pos)
 {
-	struct ibm_struct *ibm = data;
+	struct ibm_struct *ibm = PDE(file->f_path.dentry->d_inode)->data;
 	char *kernbuf;
 	int ret;
 
@@ -834,6 +838,15 @@
 	return ret;
 }
 
+static const struct file_operations dispatch_proc_fops = {
+	.owner		= THIS_MODULE,
+	.open		= dispatch_proc_open,
+	.read		= seq_read,
+	.llseek		= seq_lseek,
+	.release	= single_release,
+	.write		= dispatch_proc_write,
+};
+
 static char *next_cmd(char **cmds)
 {
 	char *start = *cmds;
@@ -1264,6 +1277,7 @@
 	struct tpacpi_rfk *atp_rfk;
 	int res;
 	bool sw_state = false;
+	bool hw_state;
 	int sw_status;
 
 	BUG_ON(id >= TPACPI_RFK_SW_MAX || tpacpi_rfkill_switches[id]);
@@ -1298,7 +1312,8 @@
 			rfkill_init_sw_state(atp_rfk->rfkill, sw_state);
 		}
 	}
-	rfkill_set_hw_state(atp_rfk->rfkill, tpacpi_rfk_check_hwblock_state());
+	hw_state = tpacpi_rfk_check_hwblock_state();
+	rfkill_set_hw_state(atp_rfk->rfkill, hw_state);
 
 	res = rfkill_register(atp_rfk->rfkill);
 	if (res < 0) {
@@ -1311,6 +1326,9 @@
 	}
 
 	tpacpi_rfkill_switches[id] = atp_rfk;
+
+	printk(TPACPI_INFO "rfkill switch %s: radio is %sblocked\n",
+		name, (sw_state || hw_state) ? "" : "un");
 	return 0;
 }
 
@@ -1383,12 +1401,10 @@
 }
 
 /* procfs -------------------------------------------------------------- */
-static int tpacpi_rfk_procfs_read(const enum tpacpi_rfk_id id, char *p)
+static int tpacpi_rfk_procfs_read(const enum tpacpi_rfk_id id, struct seq_file *m)
 {
-	int len = 0;
-
 	if (id >= TPACPI_RFK_SW_MAX)
-		len += sprintf(p + len, "status:\t\tnot supported\n");
+		seq_printf(m, "status:\t\tnot supported\n");
 	else {
 		int status;
 
@@ -1402,13 +1418,13 @@
 				return status;
 		}
 
-		len += sprintf(p + len, "status:\t\t%s\n",
+		seq_printf(m, "status:\t\t%s\n",
 				(status == TPACPI_RFK_RADIO_ON) ?
 					"enabled" : "disabled");
-		len += sprintf(p + len, "commands:\tenable, disable\n");
+		seq_printf(m, "commands:\tenable, disable\n");
 	}
 
-	return len;
+	return 0;
 }
 
 static int tpacpi_rfk_procfs_write(const enum tpacpi_rfk_id id, char *buf)
@@ -1655,7 +1671,7 @@
  * Table of recommended minimum BIOS versions
  *
  * Reasons for listing:
- *    1. Stable BIOS, listed because the unknown ammount of
+ *    1. Stable BIOS, listed because the unknown amount of
  *       bugs and bad ACPI behaviour on older versions
  *
  *    2. BIOS or EC fw with known bugs that trigger on Linux
@@ -1779,7 +1795,7 @@
 
 	TPV_QL1('7', '9',  'E', '3',  '5', '0'), /* T60/p */
 	TPV_QL1('7', 'C',  'D', '2',  '2', '2'), /* R60, R60i */
-	TPV_QL0('7', 'E',  'D', '0'),		 /* R60e, R60i */
+	TPV_QL1('7', 'E',  'D', '0',  '1', '5'), /* R60e, R60i */
 
 	/*      BIOS FW    BIOS VERS  EC FW     EC VERS */
 	TPV_QI2('1', 'W',  '9', '0',  '1', 'V', '2', '8'), /* R50e (1) */
@@ -1795,8 +1811,8 @@
 	TPV_QI1('7', '4',  '6', '4',  '2', '7'), /* X41 (0) */
 	TPV_QI1('7', '5',  '6', '0',  '2', '0'), /* X41t (0) */
 
-	TPV_QL0('7', 'B',  'D', '7'),		 /* X60/s */
-	TPV_QL0('7', 'J',  '3', '0'),		 /* X60t */
+	TPV_QL1('7', 'B',  'D', '7',  '4', '0'), /* X60/s */
+	TPV_QL1('7', 'J',  '3', '0',  '1', '3'), /* X60t */
 
 	/* (0) - older versions lack DMI EC fw string and functionality */
 	/* (1) - older versions known to lack functionality */
@@ -1886,14 +1902,11 @@
 	return 0;
 }
 
-static int thinkpad_acpi_driver_read(char *p)
+static int thinkpad_acpi_driver_read(struct seq_file *m)
 {
-	int len = 0;
-
-	len += sprintf(p + len, "driver:\t\t%s\n", TPACPI_DESC);
-	len += sprintf(p + len, "version:\t%s\n", TPACPI_VERSION);
-
-	return len;
+	seq_printf(m, "driver:\t\t%s\n", TPACPI_DESC);
+	seq_printf(m, "version:\t%s\n", TPACPI_VERSION);
+	return 0;
 }
 
 static struct ibm_struct thinkpad_acpi_driver_data = {
@@ -2073,6 +2086,7 @@
 
 static void tpacpi_driver_event(const unsigned int hkey_event);
 static void hotkey_driver_event(const unsigned int scancode);
+static void hotkey_poll_setup(const bool may_warn);
 
 /* HKEY.MHKG() return bits */
 #define TP_HOTKEY_TABLET_MASK (1 << 3)
@@ -2189,7 +2203,8 @@
 		       fwmask, hotkey_acpi_mask);
 	}
 
-	hotkey_mask_warn_incomplete_mask();
+	if (tpacpi_lifecycle != TPACPI_LIFE_EXITING)
+		hotkey_mask_warn_incomplete_mask();
 
 	return rc;
 }
@@ -2254,6 +2269,8 @@
 
 	rc = hotkey_mask_set((hotkey_acpi_mask | hotkey_driver_mask) &
 							~hotkey_source_mask);
+	hotkey_poll_setup(true);
+
 	mutex_unlock(&hotkey_mutex);
 
 	return rc;
@@ -2538,7 +2555,7 @@
 }
 
 /* call with hotkey_mutex held */
-static void hotkey_poll_setup(bool may_warn)
+static void hotkey_poll_setup(const bool may_warn)
 {
 	const u32 poll_driver_mask = hotkey_driver_mask & hotkey_source_mask;
 	const u32 poll_user_mask = hotkey_user_mask & hotkey_source_mask;
@@ -2569,7 +2586,7 @@
 	}
 }
 
-static void hotkey_poll_setup_safe(bool may_warn)
+static void hotkey_poll_setup_safe(const bool may_warn)
 {
 	mutex_lock(&hotkey_mutex);
 	hotkey_poll_setup(may_warn);
@@ -2587,7 +2604,11 @@
 
 #else /* CONFIG_THINKPAD_ACPI_HOTKEY_POLL */
 
-static void hotkey_poll_setup_safe(bool __unused)
+static void hotkey_poll_setup(const bool __unused)
+{
+}
+
+static void hotkey_poll_setup_safe(const bool __unused)
 {
 }
 
@@ -2597,16 +2618,11 @@
 {
 	switch (tpacpi_lifecycle) {
 	case TPACPI_LIFE_INIT:
-		/*
-		 * hotkey_init will call hotkey_poll_setup_safe
-		 * at the appropriate moment
-		 */
-		return 0;
-	case TPACPI_LIFE_EXITING:
-		return -EBUSY;
 	case TPACPI_LIFE_RUNNING:
 		hotkey_poll_setup_safe(false);
 		return 0;
+	case TPACPI_LIFE_EXITING:
+		return -EBUSY;
 	}
 
 	/* Should only happen if tpacpi_lifecycle is corrupt */
@@ -2617,7 +2633,7 @@
 static void hotkey_inputdev_close(struct input_dev *dev)
 {
 	/* disable hotkey polling when possible */
-	if (tpacpi_lifecycle == TPACPI_LIFE_RUNNING &&
+	if (tpacpi_lifecycle != TPACPI_LIFE_EXITING &&
 	    !(hotkey_source_mask & hotkey_driver_mask))
 		hotkey_poll_setup_safe(false);
 }
@@ -3185,6 +3201,8 @@
 	int res, i;
 	int status;
 	int hkeyv;
+	bool radiosw_state  = false;
+	bool tabletsw_state = false;
 
 	unsigned long quirks;
 
@@ -3290,6 +3308,7 @@
 #ifdef CONFIG_THINKPAD_ACPI_DEBUGFACILITIES
 	if (dbg_wlswemul) {
 		tp_features.hotkey_wlsw = 1;
+		radiosw_state = !!tpacpi_wlsw_emulstate;
 		printk(TPACPI_INFO
 			"radio switch emulation enabled\n");
 	} else
@@ -3297,6 +3316,7 @@
 	/* Not all thinkpads have a hardware radio switch */
 	if (acpi_evalf(hkey_handle, &status, "WLSW", "qd")) {
 		tp_features.hotkey_wlsw = 1;
+		radiosw_state = !!status;
 		printk(TPACPI_INFO
 			"radio switch found; radios are %s\n",
 			enabled(status, 0));
@@ -3308,11 +3328,11 @@
 	/* For X41t, X60t, X61t Tablets... */
 	if (!res && acpi_evalf(hkey_handle, &status, "MHKG", "qd")) {
 		tp_features.hotkey_tablet = 1;
+		tabletsw_state = !!(status & TP_HOTKEY_TABLET_MASK);
 		printk(TPACPI_INFO
 			"possible tablet mode switch found; "
 			"ThinkPad in %s mode\n",
-			(status & TP_HOTKEY_TABLET_MASK)?
-				"tablet" : "laptop");
+			(tabletsw_state) ? "tablet" : "laptop");
 		res = add_to_attr_set(hotkey_dev_attributes,
 				&dev_attr_hotkey_tablet_mode.attr);
 	}
@@ -3347,16 +3367,14 @@
 			TPACPI_HOTKEY_MAP_SIZE);
 	}
 
-	set_bit(EV_KEY, tpacpi_inputdev->evbit);
-	set_bit(EV_MSC, tpacpi_inputdev->evbit);
-	set_bit(MSC_SCAN, tpacpi_inputdev->mscbit);
+	input_set_capability(tpacpi_inputdev, EV_MSC, MSC_SCAN);
 	tpacpi_inputdev->keycodesize = TPACPI_HOTKEY_MAP_TYPESIZE;
 	tpacpi_inputdev->keycodemax = TPACPI_HOTKEY_MAP_LEN;
 	tpacpi_inputdev->keycode = hotkey_keycode_map;
 	for (i = 0; i < TPACPI_HOTKEY_MAP_LEN; i++) {
 		if (hotkey_keycode_map[i] != KEY_RESERVED) {
-			set_bit(hotkey_keycode_map[i],
-				tpacpi_inputdev->keybit);
+			input_set_capability(tpacpi_inputdev, EV_KEY,
+						hotkey_keycode_map[i]);
 		} else {
 			if (i < sizeof(hotkey_reserved_mask)*8)
 				hotkey_reserved_mask |= 1 << i;
@@ -3364,12 +3382,14 @@
 	}
 
 	if (tp_features.hotkey_wlsw) {
-		set_bit(EV_SW, tpacpi_inputdev->evbit);
-		set_bit(SW_RFKILL_ALL, tpacpi_inputdev->swbit);
+		input_set_capability(tpacpi_inputdev, EV_SW, SW_RFKILL_ALL);
+		input_report_switch(tpacpi_inputdev,
+				    SW_RFKILL_ALL, radiosw_state);
 	}
 	if (tp_features.hotkey_tablet) {
-		set_bit(EV_SW, tpacpi_inputdev->evbit);
-		set_bit(SW_TABLET_MODE, tpacpi_inputdev->swbit);
+		input_set_capability(tpacpi_inputdev, EV_SW, SW_TABLET_MODE);
+		input_report_switch(tpacpi_inputdev,
+				    SW_TABLET_MODE, tabletsw_state);
 	}
 
 	/* Do not issue duplicate brightness change events to
@@ -3436,8 +3456,6 @@
 	tpacpi_inputdev->close = &hotkey_inputdev_close;
 
 	hotkey_poll_setup_safe(true);
-	tpacpi_send_radiosw_update();
-	tpacpi_input_send_tabletsw();
 
 	return 0;
 
@@ -3545,49 +3563,57 @@
 	}
 }
 
+static void thermal_dump_all_sensors(void);
+
 static bool hotkey_notify_thermal(const u32 hkey,
 				 bool *send_acpi_ev,
 				 bool *ignore_acpi_ev)
 {
+	bool known = true;
+
 	/* 0x6000-0x6FFF: thermal alarms */
 	*send_acpi_ev = true;
 	*ignore_acpi_ev = false;
 
 	switch (hkey) {
+	case TP_HKEY_EV_THM_TABLE_CHANGED:
+		printk(TPACPI_INFO
+			"EC reports that Thermal Table has changed\n");
+		/* recommended action: do nothing, we don't have
+		 * Lenovo ATM information */
+		return true;
 	case TP_HKEY_EV_ALARM_BAT_HOT:
 		printk(TPACPI_CRIT
 			"THERMAL ALARM: battery is too hot!\n");
 		/* recommended action: warn user through gui */
-		return true;
+		break;
 	case TP_HKEY_EV_ALARM_BAT_XHOT:
 		printk(TPACPI_ALERT
 			"THERMAL EMERGENCY: battery is extremely hot!\n");
 		/* recommended action: immediate sleep/hibernate */
-		return true;
+		break;
 	case TP_HKEY_EV_ALARM_SENSOR_HOT:
 		printk(TPACPI_CRIT
 			"THERMAL ALARM: "
 			"a sensor reports something is too hot!\n");
 		/* recommended action: warn user through gui, that */
 		/* some internal component is too hot */
-		return true;
+		break;
 	case TP_HKEY_EV_ALARM_SENSOR_XHOT:
 		printk(TPACPI_ALERT
 			"THERMAL EMERGENCY: "
 			"a sensor reports something is extremely hot!\n");
 		/* recommended action: immediate sleep/hibernate */
-		return true;
-	case TP_HKEY_EV_THM_TABLE_CHANGED:
-		printk(TPACPI_INFO
-			"EC reports that Thermal Table has changed\n");
-		/* recommended action: do nothing, we don't have
-		 * Lenovo ATM information */
-		return true;
+		break;
 	default:
 		printk(TPACPI_ALERT
 			 "THERMAL ALERT: unknown thermal alarm received\n");
-		return false;
+		known = false;
 	}
+
+	thermal_dump_all_sensors();
+
+	return known;
 }
 
 static void hotkey_notify(struct ibm_struct *ibm, u32 event)
@@ -3635,13 +3661,19 @@
 			break;
 		case 3:
 			/* 0x3000-0x3FFF: bay-related wakeups */
-			if (hkey == TP_HKEY_EV_BAYEJ_ACK) {
+			switch (hkey) {
+			case TP_HKEY_EV_BAYEJ_ACK:
 				hotkey_autosleep_ack = 1;
 				printk(TPACPI_INFO
 				       "bay ejected\n");
 				hotkey_wakeup_hotunplug_complete_notify_change();
 				known_ev = true;
-			} else {
+				break;
+			case TP_HKEY_EV_OPTDRV_EJ:
+				/* FIXME: kick libata if SATA link offline */
+				known_ev = true;
+				break;
+			default:
 				known_ev = false;
 			}
 			break;
@@ -3730,14 +3762,13 @@
 }
 
 /* procfs -------------------------------------------------------------- */
-static int hotkey_read(char *p)
+static int hotkey_read(struct seq_file *m)
 {
 	int res, status;
-	int len = 0;
 
 	if (!tp_features.hotkey) {
-		len += sprintf(p + len, "status:\t\tnot supported\n");
-		return len;
+		seq_printf(m, "status:\t\tnot supported\n");
+		return 0;
 	}
 
 	if (mutex_lock_killable(&hotkey_mutex))
@@ -3749,17 +3780,16 @@
 	if (res)
 		return res;
 
-	len += sprintf(p + len, "status:\t\t%s\n", enabled(status, 0));
+	seq_printf(m, "status:\t\t%s\n", enabled(status, 0));
 	if (hotkey_all_mask) {
-		len += sprintf(p + len, "mask:\t\t0x%08x\n", hotkey_user_mask);
-		len += sprintf(p + len,
-			       "commands:\tenable, disable, reset, <mask>\n");
+		seq_printf(m, "mask:\t\t0x%08x\n", hotkey_user_mask);
+		seq_printf(m, "commands:\tenable, disable, reset, <mask>\n");
 	} else {
-		len += sprintf(p + len, "mask:\t\tnot supported\n");
-		len += sprintf(p + len, "commands:\tenable, disable, reset\n");
+		seq_printf(m, "mask:\t\tnot supported\n");
+		seq_printf(m, "commands:\tenable, disable, reset\n");
 	}
 
-	return len;
+	return 0;
 }
 
 static void hotkey_enabledisable_warn(bool enable)
@@ -3852,7 +3882,7 @@
 	TP_ACPI_BLUETOOTH_HWPRESENT	= 0x01,	/* Bluetooth hw available */
 	TP_ACPI_BLUETOOTH_RADIOSSW	= 0x02,	/* Bluetooth radio enabled */
 	TP_ACPI_BLUETOOTH_RESUMECTRL	= 0x04,	/* Bluetooth state at resume:
-						   off / last state */
+						   0 = disable, 1 = enable */
 };
 
 enum {
@@ -3866,15 +3896,6 @@
 
 #define TPACPI_RFK_BLUETOOTH_SW_NAME	"tpacpi_bluetooth_sw"
 
-static void bluetooth_suspend(pm_message_t state)
-{
-	/* Try to make sure radio will resume powered off */
-	if (!acpi_evalf(NULL, NULL, "\\BLTH", "vd",
-		   TP_ACPI_BLTH_PWR_OFF_ON_RESUME))
-		vdbg_printk(TPACPI_DBG_RFKILL,
-			"bluetooth power down on resume request failed\n");
-}
-
 static int bluetooth_get_status(void)
 {
 	int status;
@@ -3907,9 +3928,9 @@
 	}
 #endif
 
-	/* We make sure to keep TP_ACPI_BLUETOOTH_RESUMECTRL off */
 	if (state == TPACPI_RFK_RADIO_ON)
-		status = TP_ACPI_BLUETOOTH_RADIOSSW;
+		status = TP_ACPI_BLUETOOTH_RADIOSSW
+			  | TP_ACPI_BLUETOOTH_RESUMECTRL;
 	else
 		status = 0;
 
@@ -4035,9 +4056,9 @@
 }
 
 /* procfs -------------------------------------------------------------- */
-static int bluetooth_read(char *p)
+static int bluetooth_read(struct seq_file *m)
 {
-	return tpacpi_rfk_procfs_read(TPACPI_RFK_BLUETOOTH_SW_ID, p);
+	return tpacpi_rfk_procfs_read(TPACPI_RFK_BLUETOOTH_SW_ID, m);
 }
 
 static int bluetooth_write(char *buf)
@@ -4050,7 +4071,6 @@
 	.read = bluetooth_read,
 	.write = bluetooth_write,
 	.exit = bluetooth_exit,
-	.suspend = bluetooth_suspend,
 	.shutdown = bluetooth_shutdown,
 };
 
@@ -4063,20 +4083,11 @@
 	TP_ACPI_WANCARD_HWPRESENT	= 0x01,	/* Wan hw available */
 	TP_ACPI_WANCARD_RADIOSSW	= 0x02,	/* Wan radio enabled */
 	TP_ACPI_WANCARD_RESUMECTRL	= 0x04,	/* Wan state at resume:
-						   off / last state */
+						   0 = disable, 1 = enable */
 };
 
 #define TPACPI_RFK_WWAN_SW_NAME		"tpacpi_wwan_sw"
 
-static void wan_suspend(pm_message_t state)
-{
-	/* Try to make sure radio will resume powered off */
-	if (!acpi_evalf(NULL, NULL, "\\WGSV", "qvd",
-		   TP_ACPI_WGSV_PWR_OFF_ON_RESUME))
-		vdbg_printk(TPACPI_DBG_RFKILL,
-			"WWAN power down on resume request failed\n");
-}
-
 static int wan_get_status(void)
 {
 	int status;
@@ -4109,9 +4120,9 @@
 	}
 #endif
 
-	/* We make sure to keep TP_ACPI_WANCARD_RESUMECTRL off */
 	if (state == TPACPI_RFK_RADIO_ON)
-		status = TP_ACPI_WANCARD_RADIOSSW;
+		status = TP_ACPI_WANCARD_RADIOSSW
+			 | TP_ACPI_WANCARD_RESUMECTRL;
 	else
 		status = 0;
 
@@ -4236,9 +4247,9 @@
 }
 
 /* procfs -------------------------------------------------------------- */
-static int wan_read(char *p)
+static int wan_read(struct seq_file *m)
 {
-	return tpacpi_rfk_procfs_read(TPACPI_RFK_WWAN_SW_ID, p);
+	return tpacpi_rfk_procfs_read(TPACPI_RFK_WWAN_SW_ID, m);
 }
 
 static int wan_write(char *buf)
@@ -4251,7 +4262,6 @@
 	.read = wan_read,
 	.write = wan_write,
 	.exit = wan_exit,
-	.suspend = wan_suspend,
 	.shutdown = wan_shutdown,
 };
 
@@ -4614,16 +4624,19 @@
 	/* not reached */
 }
 
-static int video_read(char *p)
+static int video_read(struct seq_file *m)
 {
 	int status, autosw;
-	int len = 0;
 
 	if (video_supported == TPACPI_VIDEO_NONE) {
-		len += sprintf(p + len, "status:\t\tnot supported\n");
-		return len;
+		seq_printf(m, "status:\t\tnot supported\n");
+		return 0;
 	}
 
+	/* Even reads can crash X.org, so... */
+	if (!capable(CAP_SYS_ADMIN))
+		return -EPERM;
+
 	status = video_outputsw_get();
 	if (status < 0)
 		return status;
@@ -4632,20 +4645,20 @@
 	if (autosw < 0)
 		return autosw;
 
-	len += sprintf(p + len, "status:\t\tsupported\n");
-	len += sprintf(p + len, "lcd:\t\t%s\n", enabled(status, 0));
-	len += sprintf(p + len, "crt:\t\t%s\n", enabled(status, 1));
+	seq_printf(m, "status:\t\tsupported\n");
+	seq_printf(m, "lcd:\t\t%s\n", enabled(status, 0));
+	seq_printf(m, "crt:\t\t%s\n", enabled(status, 1));
 	if (video_supported == TPACPI_VIDEO_NEW)
-		len += sprintf(p + len, "dvi:\t\t%s\n", enabled(status, 3));
-	len += sprintf(p + len, "auto:\t\t%s\n", enabled(autosw, 0));
-	len += sprintf(p + len, "commands:\tlcd_enable, lcd_disable\n");
-	len += sprintf(p + len, "commands:\tcrt_enable, crt_disable\n");
+		seq_printf(m, "dvi:\t\t%s\n", enabled(status, 3));
+	seq_printf(m, "auto:\t\t%s\n", enabled(autosw, 0));
+	seq_printf(m, "commands:\tlcd_enable, lcd_disable\n");
+	seq_printf(m, "commands:\tcrt_enable, crt_disable\n");
 	if (video_supported == TPACPI_VIDEO_NEW)
-		len += sprintf(p + len, "commands:\tdvi_enable, dvi_disable\n");
-	len += sprintf(p + len, "commands:\tauto_enable, auto_disable\n");
-	len += sprintf(p + len, "commands:\tvideo_switch, expand_toggle\n");
+		seq_printf(m, "commands:\tdvi_enable, dvi_disable\n");
+	seq_printf(m, "commands:\tauto_enable, auto_disable\n");
+	seq_printf(m, "commands:\tvideo_switch, expand_toggle\n");
 
-	return len;
+	return 0;
 }
 
 static int video_write(char *buf)
@@ -4657,6 +4670,10 @@
 	if (video_supported == TPACPI_VIDEO_NONE)
 		return -ENODEV;
 
+	/* Even reads can crash X.org, let alone writes... */
+	if (!capable(CAP_SYS_ADMIN))
+		return -EPERM;
+
 	enable = 0;
 	disable = 0;
 
@@ -4837,25 +4854,24 @@
 		flush_workqueue(tpacpi_wq);
 }
 
-static int light_read(char *p)
+static int light_read(struct seq_file *m)
 {
-	int len = 0;
 	int status;
 
 	if (!tp_features.light) {
-		len += sprintf(p + len, "status:\t\tnot supported\n");
+		seq_printf(m, "status:\t\tnot supported\n");
 	} else if (!tp_features.light_status) {
-		len += sprintf(p + len, "status:\t\tunknown\n");
-		len += sprintf(p + len, "commands:\ton, off\n");
+		seq_printf(m, "status:\t\tunknown\n");
+		seq_printf(m, "commands:\ton, off\n");
 	} else {
 		status = light_get_status();
 		if (status < 0)
 			return status;
-		len += sprintf(p + len, "status:\t\t%s\n", onoff(status, 0));
-		len += sprintf(p + len, "commands:\ton, off\n");
+		seq_printf(m, "status:\t\t%s\n", onoff(status, 0));
+		seq_printf(m, "commands:\ton, off\n");
 	}
 
-	return len;
+	return 0;
 }
 
 static int light_write(char *buf)
@@ -4933,20 +4949,18 @@
 	device_remove_file(&tpacpi_pdev->dev, &dev_attr_cmos_command);
 }
 
-static int cmos_read(char *p)
+static int cmos_read(struct seq_file *m)
 {
-	int len = 0;
-
 	/* cmos not supported on 570, 600e/x, 770e, 770x, A21e, A2xm/p,
 	   R30, R31, T20-22, X20-21 */
 	if (!cmos_handle)
-		len += sprintf(p + len, "status:\t\tnot supported\n");
+		seq_printf(m, "status:\t\tnot supported\n");
 	else {
-		len += sprintf(p + len, "status:\t\tsupported\n");
-		len += sprintf(p + len, "commands:\t<cmd> (<cmd> is 0-21)\n");
+		seq_printf(m, "status:\t\tsupported\n");
+		seq_printf(m, "commands:\t<cmd> (<cmd> is 0-21)\n");
 	}
 
-	return len;
+	return 0;
 }
 
 static int cmos_write(char *buf)
@@ -5321,15 +5335,13 @@
 	((s) == TPACPI_LED_OFF ? "off" : \
 		((s) == TPACPI_LED_ON ? "on" : "blinking"))
 
-static int led_read(char *p)
+static int led_read(struct seq_file *m)
 {
-	int len = 0;
-
 	if (!led_supported) {
-		len += sprintf(p + len, "status:\t\tnot supported\n");
-		return len;
+		seq_printf(m, "status:\t\tnot supported\n");
+		return 0;
 	}
-	len += sprintf(p + len, "status:\t\tsupported\n");
+	seq_printf(m, "status:\t\tsupported\n");
 
 	if (led_supported == TPACPI_LED_570) {
 		/* 570 */
@@ -5338,15 +5350,15 @@
 			status = led_get_status(i);
 			if (status < 0)
 				return -EIO;
-			len += sprintf(p + len, "%d:\t\t%s\n",
+			seq_printf(m, "%d:\t\t%s\n",
 				       i, str_led_status(status));
 		}
 	}
 
-	len += sprintf(p + len, "commands:\t"
+	seq_printf(m, "commands:\t"
 		       "<led> on, <led> off, <led> blink (<led> is 0-15)\n");
 
-	return len;
+	return 0;
 }
 
 static int led_write(char *buf)
@@ -5419,18 +5431,16 @@
 	return (beep_handle)? 0 : 1;
 }
 
-static int beep_read(char *p)
+static int beep_read(struct seq_file *m)
 {
-	int len = 0;
-
 	if (!beep_handle)
-		len += sprintf(p + len, "status:\t\tnot supported\n");
+		seq_printf(m, "status:\t\tnot supported\n");
 	else {
-		len += sprintf(p + len, "status:\t\tsupported\n");
-		len += sprintf(p + len, "commands:\t<cmd> (<cmd> is 0-17)\n");
+		seq_printf(m, "status:\t\tsupported\n");
+		seq_printf(m, "commands:\t<cmd> (<cmd> is 0-17)\n");
 	}
 
-	return len;
+	return 0;
 }
 
 static int beep_write(char *buf)
@@ -5483,8 +5493,11 @@
 	TP_EC_THERMAL_TMP0 = 0x78,	/* ACPI EC regs TMP 0..7 */
 	TP_EC_THERMAL_TMP8 = 0xC0,	/* ACPI EC regs TMP 8..15 */
 	TP_EC_THERMAL_TMP_NA = -128,	/* ACPI EC sensor not available */
+
+	TPACPI_THERMAL_SENSOR_NA = -128000, /* Sensor not available */
 };
 
+
 #define TPACPI_MAX_THERMAL_SENSORS 16	/* Max thermal sensors supported */
 struct ibm_thermal_sensors_struct {
 	s32 temp[TPACPI_MAX_THERMAL_SENSORS];
@@ -5574,6 +5587,28 @@
 	return n;
 }
 
+static void thermal_dump_all_sensors(void)
+{
+	int n, i;
+	struct ibm_thermal_sensors_struct t;
+
+	n = thermal_get_sensors(&t);
+	if (n <= 0)
+		return;
+
+	printk(TPACPI_NOTICE
+		"temperatures (Celsius):");
+
+	for (i = 0; i < n; i++) {
+		if (t.temp[i] != TPACPI_THERMAL_SENSOR_NA)
+			printk(KERN_CONT " %d", (int)(t.temp[i] / 1000));
+		else
+			printk(KERN_CONT " N/A");
+	}
+
+	printk(KERN_CONT "\n");
+}
+
 /* sysfs temp##_input -------------------------------------------------- */
 
 static ssize_t thermal_temp_input_show(struct device *dev,
@@ -5589,7 +5624,7 @@
 	res = thermal_get_sensor(idx, &value);
 	if (res)
 		return res;
-	if (value == TP_EC_THERMAL_TMP_NA * 1000)
+	if (value == TPACPI_THERMAL_SENSOR_NA)
 		return -ENXIO;
 
 	return snprintf(buf, PAGE_SIZE, "%d\n", value);
@@ -5758,7 +5793,7 @@
 	case TPACPI_THERMAL_ACPI_TMP07:
 	case TPACPI_THERMAL_ACPI_UPDT:
 		sysfs_remove_group(&tpacpi_sensors_pdev->dev.kobj,
-				   &thermal_temp_input16_group);
+				   &thermal_temp_input8_group);
 		break;
 	case TPACPI_THERMAL_NONE:
 	default:
@@ -5766,9 +5801,8 @@
 	}
 }
 
-static int thermal_read(char *p)
+static int thermal_read(struct seq_file *m)
 {
-	int len = 0;
 	int n, i;
 	struct ibm_thermal_sensors_struct t;
 
@@ -5776,16 +5810,16 @@
 	if (unlikely(n < 0))
 		return n;
 
-	len += sprintf(p + len, "temperatures:\t");
+	seq_printf(m, "temperatures:\t");
 
 	if (n > 0) {
 		for (i = 0; i < (n - 1); i++)
-			len += sprintf(p + len, "%d ", t.temp[i] / 1000);
-		len += sprintf(p + len, "%d\n", t.temp[i] / 1000);
+			seq_printf(m, "%d ", t.temp[i] / 1000);
+		seq_printf(m, "%d\n", t.temp[i] / 1000);
 	} else
-		len += sprintf(p + len, "not supported\n");
+		seq_printf(m, "not supported\n");
 
-	return len;
+	return 0;
 }
 
 static struct ibm_struct thermal_driver_data = {
@@ -5800,39 +5834,38 @@
 
 static u8 ecdump_regs[256];
 
-static int ecdump_read(char *p)
+static int ecdump_read(struct seq_file *m)
 {
-	int len = 0;
 	int i, j;
 	u8 v;
 
-	len += sprintf(p + len, "EC      "
+	seq_printf(m, "EC      "
 		       " +00 +01 +02 +03 +04 +05 +06 +07"
 		       " +08 +09 +0a +0b +0c +0d +0e +0f\n");
 	for (i = 0; i < 256; i += 16) {
-		len += sprintf(p + len, "EC 0x%02x:", i);
+		seq_printf(m, "EC 0x%02x:", i);
 		for (j = 0; j < 16; j++) {
 			if (!acpi_ec_read(i + j, &v))
 				break;
 			if (v != ecdump_regs[i + j])
-				len += sprintf(p + len, " *%02x", v);
+				seq_printf(m, " *%02x", v);
 			else
-				len += sprintf(p + len, "  %02x", v);
+				seq_printf(m, "  %02x", v);
 			ecdump_regs[i + j] = v;
 		}
-		len += sprintf(p + len, "\n");
+		seq_putc(m, '\n');
 		if (j != 16)
 			break;
 	}
 
 	/* These are way too dangerous to advertise openly... */
 #if 0
-	len += sprintf(p + len, "commands:\t0x<offset> 0x<value>"
+	seq_printf(m, "commands:\t0x<offset> 0x<value>"
 		       " (<offset> is 00-ff, <value> is 00-ff)\n");
-	len += sprintf(p + len, "commands:\t0x<offset> <value>  "
+	seq_printf(m, "commands:\t0x<offset> <value>  "
 		       " (<offset> is 00-ff, <value> is 0-255)\n");
 #endif
-	return len;
+	return 0;
 }
 
 static int ecdump_write(char *buf)
@@ -6095,6 +6128,12 @@
 	return status & TP_EC_BACKLIGHT_LVLMSK;
 }
 
+static void tpacpi_brightness_notify_change(void)
+{
+	backlight_force_update(ibm_backlight_device,
+			       BACKLIGHT_UPDATE_HOTKEY);
+}
+
 static struct backlight_ops ibm_backlight_data = {
 	.get_brightness = brightness_get,
 	.update_status  = brightness_update_status,
@@ -6116,15 +6155,15 @@
 	TPACPI_Q_IBM('1', 'Y', TPACPI_BRGHT_Q_EC),	/* T43/p ATI */
 
 	/* Models with ATI GPUs that can use ECNVRAM */
-	TPACPI_Q_IBM('1', 'R', TPACPI_BRGHT_Q_EC),
+	TPACPI_Q_IBM('1', 'R', TPACPI_BRGHT_Q_EC),	/* R50,51 T40-42 */
 	TPACPI_Q_IBM('1', 'Q', TPACPI_BRGHT_Q_ASK|TPACPI_BRGHT_Q_EC),
-	TPACPI_Q_IBM('7', '6', TPACPI_BRGHT_Q_ASK|TPACPI_BRGHT_Q_EC),
+	TPACPI_Q_IBM('7', '6', TPACPI_BRGHT_Q_EC),	/* R52 */
 	TPACPI_Q_IBM('7', '8', TPACPI_BRGHT_Q_ASK|TPACPI_BRGHT_Q_EC),
 
 	/* Models with Intel Extreme Graphics 2 */
-	TPACPI_Q_IBM('1', 'U', TPACPI_BRGHT_Q_NOEC),
-	TPACPI_Q_IBM('1', 'V', TPACPI_BRGHT_Q_ASK|TPACPI_BRGHT_Q_NOEC),
-	TPACPI_Q_IBM('1', 'W', TPACPI_BRGHT_Q_ASK|TPACPI_BRGHT_Q_NOEC),
+	TPACPI_Q_IBM('1', 'U', TPACPI_BRGHT_Q_NOEC),	/* X40 */
+	TPACPI_Q_IBM('1', 'V', TPACPI_BRGHT_Q_ASK|TPACPI_BRGHT_Q_EC),
+	TPACPI_Q_IBM('1', 'W', TPACPI_BRGHT_Q_ASK|TPACPI_BRGHT_Q_EC),
 
 	/* Models with Intel GMA900 */
 	TPACPI_Q_IBM('7', '0', TPACPI_BRGHT_Q_NOEC),	/* T43, R52 */
@@ -6223,9 +6262,9 @@
 		printk(TPACPI_INFO
 		       "detected a 16-level brightness capable ThinkPad\n");
 
-	ibm_backlight_device = backlight_device_register(
-					TPACPI_BACKLIGHT_DEV_NAME, NULL, NULL,
-					&ibm_backlight_data);
+	ibm_backlight_device = backlight_device_register(TPACPI_BACKLIGHT_DEV_NAME,
+							 NULL, NULL,
+							 &ibm_backlight_data);
 	if (IS_ERR(ibm_backlight_device)) {
 		int rc = PTR_ERR(ibm_backlight_device);
 		ibm_backlight_device = NULL;
@@ -6244,11 +6283,15 @@
 			"or not on your ThinkPad\n", TPACPI_MAIL);
 	}
 
-	ibm_backlight_device->props.max_brightness =
-				(tp_features.bright_16levels)? 15 : 7;
 	ibm_backlight_device->props.brightness = b & TP_EC_BACKLIGHT_LVLMSK;
 	backlight_update_status(ibm_backlight_device);
 
+	vdbg_printk(TPACPI_DBG_INIT | TPACPI_DBG_BRGHT,
+			"brightness: registering brightness hotkeys "
+			"as change notification\n");
+	tpacpi_hotkey_driver_mask_set(hotkey_driver_mask
+				| TP_ACPI_HKEY_BRGHTUP_MASK
+				| TP_ACPI_HKEY_BRGHTDWN_MASK);;
 	return 0;
 }
 
@@ -6273,23 +6316,22 @@
 	tpacpi_brightness_checkpoint_nvram();
 }
 
-static int brightness_read(char *p)
+static int brightness_read(struct seq_file *m)
 {
-	int len = 0;
 	int level;
 
 	level = brightness_get(NULL);
 	if (level < 0) {
-		len += sprintf(p + len, "level:\t\tunreadable\n");
+		seq_printf(m, "level:\t\tunreadable\n");
 	} else {
-		len += sprintf(p + len, "level:\t\t%d\n", level);
-		len += sprintf(p + len, "commands:\tup, down\n");
-		len += sprintf(p + len, "commands:\tlevel <level>"
+		seq_printf(m, "level:\t\t%d\n", level);
+		seq_printf(m, "commands:\tup, down\n");
+		seq_printf(m, "commands:\tlevel <level>"
 			       " (<level> is 0-%d)\n",
 			       (tp_features.bright_16levels) ? 15 : 7);
 	}
 
-	return len;
+	return 0;
 }
 
 static int brightness_write(char *buf)
@@ -6325,6 +6367,9 @@
 	 * Doing it this way makes the syscall restartable in case of EINTR
 	 */
 	rc = brightness_set(level);
+	if (!rc && ibm_backlight_device)
+		backlight_force_update(ibm_backlight_device,
+					BACKLIGHT_UPDATE_SYSFS);
 	return (rc == -EINTR)? -ERESTARTSYS : rc;
 }
 
@@ -6341,101 +6386,704 @@
  * Volume subdriver
  */
 
-static int volume_offset = 0x30;
+/*
+ * IBM ThinkPads have a simple volume controller with MUTE gating.
+ * Very early Lenovo ThinkPads follow the IBM ThinkPad spec.
+ *
+ * Since the *61 series (and probably also the later *60 series), Lenovo
+ * ThinkPads only implement the MUTE gate.
+ *
+ * EC register 0x30
+ *   Bit 6: MUTE (1 mutes sound)
+ *   Bit 3-0: Volume
+ *   Other bits should be zero as far as we know.
+ *
+ * This is also stored in CMOS NVRAM, byte 0x60, bit 6 (MUTE), and
+ * bits 3-0 (volume).  Other bits in NVRAM may have other functions,
+ * such as bit 7 which is used to detect repeated presses of MUTE,
+ * and we leave them unchanged.
+ */
+
+#ifdef CONFIG_THINKPAD_ACPI_ALSA_SUPPORT
+
+#define TPACPI_ALSA_DRVNAME  "ThinkPad EC"
+#define TPACPI_ALSA_SHRTNAME "ThinkPad Console Audio Control"
+#define TPACPI_ALSA_MIXERNAME TPACPI_ALSA_SHRTNAME
+
+static int alsa_index = ~((1 << (SNDRV_CARDS - 3)) - 1); /* last three slots */
+static char *alsa_id = "ThinkPadEC";
+static int alsa_enable = SNDRV_DEFAULT_ENABLE1;
+
+struct tpacpi_alsa_data {
+	struct snd_card *card;
+	struct snd_ctl_elem_id *ctl_mute_id;
+	struct snd_ctl_elem_id *ctl_vol_id;
+};
+
+static struct snd_card *alsa_card;
+
+enum {
+	TP_EC_AUDIO = 0x30,
+
+	/* TP_EC_AUDIO bits */
+	TP_EC_AUDIO_MUTESW = 6,
+
+	/* TP_EC_AUDIO bitmasks */
+	TP_EC_AUDIO_LVL_MSK = 0x0F,
+	TP_EC_AUDIO_MUTESW_MSK = (1 << TP_EC_AUDIO_MUTESW),
+
+	/* Maximum volume */
+	TP_EC_VOLUME_MAX = 14,
+};
+
+enum tpacpi_volume_access_mode {
+	TPACPI_VOL_MODE_AUTO = 0,	/* Not implemented yet */
+	TPACPI_VOL_MODE_EC,		/* Pure EC control */
+	TPACPI_VOL_MODE_UCMS_STEP,	/* UCMS step-based control: N/A */
+	TPACPI_VOL_MODE_ECNVRAM,	/* EC control w/ NVRAM store */
+	TPACPI_VOL_MODE_MAX
+};
+
+enum tpacpi_volume_capabilities {
+	TPACPI_VOL_CAP_AUTO = 0,	/* Use white/blacklist */
+	TPACPI_VOL_CAP_VOLMUTE,		/* Output vol and mute */
+	TPACPI_VOL_CAP_MUTEONLY,	/* Output mute only */
+	TPACPI_VOL_CAP_MAX
+};
 
-static int volume_read(char *p)
+static enum tpacpi_volume_access_mode volume_mode =
+	TPACPI_VOL_MODE_MAX;
+
+static enum tpacpi_volume_capabilities volume_capabilities;
+static int volume_control_allowed;
+
+/*
+ * Used to syncronize writers to TP_EC_AUDIO and
+ * TP_NVRAM_ADDR_MIXER, as we need to do read-modify-write
+ */
+static struct mutex volume_mutex;
+
+static void tpacpi_volume_checkpoint_nvram(void)
 {
-	int len = 0;
-	u8 level;
+	u8 lec = 0;
+	u8 b_nvram;
+	u8 ec_mask;
+
+	if (volume_mode != TPACPI_VOL_MODE_ECNVRAM)
+		return;
+	if (!volume_control_allowed)
+		return;
+
+	vdbg_printk(TPACPI_DBG_MIXER,
+		"trying to checkpoint mixer state to NVRAM...\n");
+
+	if (tp_features.mixer_no_level_control)
+		ec_mask = TP_EC_AUDIO_MUTESW_MSK;
+	else
+		ec_mask = TP_EC_AUDIO_MUTESW_MSK | TP_EC_AUDIO_LVL_MSK;
 
-	if (!acpi_ec_read(volume_offset, &level)) {
-		len += sprintf(p + len, "level:\t\tunreadable\n");
+	if (mutex_lock_killable(&volume_mutex) < 0)
+		return;
+
+	if (unlikely(!acpi_ec_read(TP_EC_AUDIO, &lec)))
+		goto unlock;
+	lec &= ec_mask;
+	b_nvram = nvram_read_byte(TP_NVRAM_ADDR_MIXER);
+
+	if (lec != (b_nvram & ec_mask)) {
+		/* NVRAM needs update */
+		b_nvram &= ~ec_mask;
+		b_nvram |= lec;
+		nvram_write_byte(b_nvram, TP_NVRAM_ADDR_MIXER);
+		dbg_printk(TPACPI_DBG_MIXER,
+			   "updated NVRAM mixer status to 0x%02x (0x%02x)\n",
+			   (unsigned int) lec, (unsigned int) b_nvram);
 	} else {
-		len += sprintf(p + len, "level:\t\t%d\n", level & 0xf);
-		len += sprintf(p + len, "mute:\t\t%s\n", onoff(level, 6));
-		len += sprintf(p + len, "commands:\tup, down, mute\n");
-		len += sprintf(p + len, "commands:\tlevel <level>"
-			       " (<level> is 0-15)\n");
+		vdbg_printk(TPACPI_DBG_MIXER,
+			   "NVRAM mixer status already is 0x%02x (0x%02x)\n",
+			   (unsigned int) lec, (unsigned int) b_nvram);
 	}
 
-	return len;
+unlock:
+	mutex_unlock(&volume_mutex);
 }
 
-static int volume_write(char *buf)
+static int volume_get_status_ec(u8 *status)
 {
-	int cmos_cmd, inc, i;
-	u8 level, mute;
-	int new_level, new_mute;
-	char *cmd;
+	u8 s;
 
-	while ((cmd = next_cmd(&buf))) {
-		if (!acpi_ec_read(volume_offset, &level))
-			return -EIO;
-		new_mute = mute = level & 0x40;
-		new_level = level = level & 0xf;
+	if (!acpi_ec_read(TP_EC_AUDIO, &s))
+		return -EIO;
 
-		if (strlencmp(cmd, "up") == 0) {
-			if (mute)
-				new_mute = 0;
-			else
-				new_level = level == 15 ? 15 : level + 1;
-		} else if (strlencmp(cmd, "down") == 0) {
-			if (mute)
-				new_mute = 0;
-			else
-				new_level = level == 0 ? 0 : level - 1;
-		} else if (sscanf(cmd, "level %d", &new_level) == 1 &&
-			   new_level >= 0 && new_level <= 15) {
-			/* new_level set */
-		} else if (strlencmp(cmd, "mute") == 0) {
-			new_mute = 0x40;
-		} else
-			return -EINVAL;
+	*status = s;
 
-		if (new_level != level) {
-			/* mute doesn't change */
+	dbg_printk(TPACPI_DBG_MIXER, "status 0x%02x\n", s);
 
-			cmos_cmd = (new_level > level) ?
-					TP_CMOS_VOLUME_UP : TP_CMOS_VOLUME_DOWN;
-			inc = new_level > level ? 1 : -1;
+	return 0;
+}
 
-			if (mute && (issue_thinkpad_cmos_command(cmos_cmd) ||
-				     !acpi_ec_write(volume_offset, level)))
-				return -EIO;
+static int volume_get_status(u8 *status)
+{
+	return volume_get_status_ec(status);
+}
 
-			for (i = level; i != new_level; i += inc)
-				if (issue_thinkpad_cmos_command(cmos_cmd) ||
-				    !acpi_ec_write(volume_offset, i + inc))
-					return -EIO;
-
-			if (mute &&
-			    (issue_thinkpad_cmos_command(TP_CMOS_VOLUME_MUTE) ||
-			     !acpi_ec_write(volume_offset, new_level + mute))) {
-				return -EIO;
-			}
+static int volume_set_status_ec(const u8 status)
+{
+	if (!acpi_ec_write(TP_EC_AUDIO, status))
+		return -EIO;
+
+	dbg_printk(TPACPI_DBG_MIXER, "set EC mixer to 0x%02x\n", status);
+
+	return 0;
+}
+
+static int volume_set_status(const u8 status)
+{
+	return volume_set_status_ec(status);
+}
+
+/* returns < 0 on error, 0 on no change, 1 on change */
+static int __volume_set_mute_ec(const bool mute)
+{
+	int rc;
+	u8 s, n;
+
+	if (mutex_lock_killable(&volume_mutex) < 0)
+		return -EINTR;
+
+	rc = volume_get_status_ec(&s);
+	if (rc)
+		goto unlock;
+
+	n = (mute) ? s | TP_EC_AUDIO_MUTESW_MSK :
+		     s & ~TP_EC_AUDIO_MUTESW_MSK;
+
+	if (n != s) {
+		rc = volume_set_status_ec(n);
+		if (!rc)
+			rc = 1;
+	}
+
+unlock:
+	mutex_unlock(&volume_mutex);
+	return rc;
+}
+
+static int volume_alsa_set_mute(const bool mute)
+{
+	dbg_printk(TPACPI_DBG_MIXER, "ALSA: trying to %smute\n",
+		   (mute) ? "" : "un");
+	return __volume_set_mute_ec(mute);
+}
+
+static int volume_set_mute(const bool mute)
+{
+	int rc;
+
+	dbg_printk(TPACPI_DBG_MIXER, "trying to %smute\n",
+		   (mute) ? "" : "un");
+
+	rc = __volume_set_mute_ec(mute);
+	return (rc < 0) ? rc : 0;
+}
+
+/* returns < 0 on error, 0 on no change, 1 on change */
+static int __volume_set_volume_ec(const u8 vol)
+{
+	int rc;
+	u8 s, n;
+
+	if (vol > TP_EC_VOLUME_MAX)
+		return -EINVAL;
+
+	if (mutex_lock_killable(&volume_mutex) < 0)
+		return -EINTR;
+
+	rc = volume_get_status_ec(&s);
+	if (rc)
+		goto unlock;
+
+	n = (s & ~TP_EC_AUDIO_LVL_MSK) | vol;
+
+	if (n != s) {
+		rc = volume_set_status_ec(n);
+		if (!rc)
+			rc = 1;
+	}
+
+unlock:
+	mutex_unlock(&volume_mutex);
+	return rc;
+}
+
+static int volume_alsa_set_volume(const u8 vol)
+{
+	dbg_printk(TPACPI_DBG_MIXER,
+		   "ALSA: trying to set volume level to %hu\n", vol);
+	return __volume_set_volume_ec(vol);
+}
+
+static void volume_alsa_notify_change(void)
+{
+	struct tpacpi_alsa_data *d;
+
+	if (alsa_card && alsa_card->private_data) {
+		d = alsa_card->private_data;
+		if (d->ctl_mute_id)
+			snd_ctl_notify(alsa_card,
+					SNDRV_CTL_EVENT_MASK_VALUE,
+					d->ctl_mute_id);
+		if (d->ctl_vol_id)
+			snd_ctl_notify(alsa_card,
+					SNDRV_CTL_EVENT_MASK_VALUE,
+					d->ctl_vol_id);
+	}
+}
+
+static int volume_alsa_vol_info(struct snd_kcontrol *kcontrol,
+				struct snd_ctl_elem_info *uinfo)
+{
+	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
+	uinfo->count = 1;
+	uinfo->value.integer.min = 0;
+	uinfo->value.integer.max = TP_EC_VOLUME_MAX;
+	return 0;
+}
+
+static int volume_alsa_vol_get(struct snd_kcontrol *kcontrol,
+				struct snd_ctl_elem_value *ucontrol)
+{
+	u8 s;
+	int rc;
+
+	rc = volume_get_status(&s);
+	if (rc < 0)
+		return rc;
+
+	ucontrol->value.integer.value[0] = s & TP_EC_AUDIO_LVL_MSK;
+	return 0;
+}
+
+static int volume_alsa_vol_put(struct snd_kcontrol *kcontrol,
+				struct snd_ctl_elem_value *ucontrol)
+{
+	return volume_alsa_set_volume(ucontrol->value.integer.value[0]);
+}
+
+#define volume_alsa_mute_info snd_ctl_boolean_mono_info
+
+static int volume_alsa_mute_get(struct snd_kcontrol *kcontrol,
+				struct snd_ctl_elem_value *ucontrol)
+{
+	u8 s;
+	int rc;
+
+	rc = volume_get_status(&s);
+	if (rc < 0)
+		return rc;
+
+	ucontrol->value.integer.value[0] =
+				(s & TP_EC_AUDIO_MUTESW_MSK) ? 0 : 1;
+	return 0;
+}
+
+static int volume_alsa_mute_put(struct snd_kcontrol *kcontrol,
+				struct snd_ctl_elem_value *ucontrol)
+{
+	return volume_alsa_set_mute(!ucontrol->value.integer.value[0]);
+}
+
+static struct snd_kcontrol_new volume_alsa_control_vol __devinitdata = {
+	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+	.name = "Console Playback Volume",
+	.index = 0,
+	.access = SNDRV_CTL_ELEM_ACCESS_READ,
+	.info = volume_alsa_vol_info,
+	.get = volume_alsa_vol_get,
+};
+
+static struct snd_kcontrol_new volume_alsa_control_mute __devinitdata = {
+	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+	.name = "Console Playback Switch",
+	.index = 0,
+	.access = SNDRV_CTL_ELEM_ACCESS_READ,
+	.info = volume_alsa_mute_info,
+	.get = volume_alsa_mute_get,
+};
+
+static void volume_suspend(pm_message_t state)
+{
+	tpacpi_volume_checkpoint_nvram();
+}
+
+static void volume_resume(void)
+{
+	volume_alsa_notify_change();
+}
+
+static void volume_shutdown(void)
+{
+	tpacpi_volume_checkpoint_nvram();
+}
+
+static void volume_exit(void)
+{
+	if (alsa_card) {
+		snd_card_free(alsa_card);
+		alsa_card = NULL;
+	}
+
+	tpacpi_volume_checkpoint_nvram();
+}
+
+static int __init volume_create_alsa_mixer(void)
+{
+	struct snd_card *card;
+	struct tpacpi_alsa_data *data;
+	struct snd_kcontrol *ctl_vol;
+	struct snd_kcontrol *ctl_mute;
+	int rc;
+
+	rc = snd_card_create(alsa_index, alsa_id, THIS_MODULE,
+			    sizeof(struct tpacpi_alsa_data), &card);
+	if (rc < 0 || !card) {
+		printk(TPACPI_ERR
+			"Failed to create ALSA card structures: %d\n", rc);
+		return 1;
+	}
+
+	BUG_ON(!card->private_data);
+	data = card->private_data;
+	data->card = card;
+
+	strlcpy(card->driver, TPACPI_ALSA_DRVNAME,
+		sizeof(card->driver));
+	strlcpy(card->shortname, TPACPI_ALSA_SHRTNAME,
+		sizeof(card->shortname));
+	snprintf(card->mixername, sizeof(card->mixername), "ThinkPad EC %s",
+		 (thinkpad_id.ec_version_str) ?
+			thinkpad_id.ec_version_str : "(unknown)");
+	snprintf(card->longname, sizeof(card->longname),
+		 "%s at EC reg 0x%02x, fw %s", card->shortname, TP_EC_AUDIO,
+		 (thinkpad_id.ec_version_str) ?
+			thinkpad_id.ec_version_str : "unknown");
+
+	if (volume_control_allowed) {
+		volume_alsa_control_vol.put = volume_alsa_vol_put;
+		volume_alsa_control_vol.access =
+				SNDRV_CTL_ELEM_ACCESS_READWRITE;
+
+		volume_alsa_control_mute.put = volume_alsa_mute_put;
+		volume_alsa_control_mute.access =
+				SNDRV_CTL_ELEM_ACCESS_READWRITE;
+	}
+
+	if (!tp_features.mixer_no_level_control) {
+		ctl_vol = snd_ctl_new1(&volume_alsa_control_vol, NULL);
+		rc = snd_ctl_add(card, ctl_vol);
+		if (rc < 0) {
+			printk(TPACPI_ERR
+				"Failed to create ALSA volume control: %d\n",
+				rc);
+			goto err_exit;
 		}
+		data->ctl_vol_id = &ctl_vol->id;
+	}
 
-		if (new_mute != mute) {
-			/* level doesn't change */
+	ctl_mute = snd_ctl_new1(&volume_alsa_control_mute, NULL);
+	rc = snd_ctl_add(card, ctl_mute);
+	if (rc < 0) {
+		printk(TPACPI_ERR "Failed to create ALSA mute control: %d\n",
+			rc);
+		goto err_exit;
+	}
+	data->ctl_mute_id = &ctl_mute->id;
 
-			cmos_cmd = (new_mute) ?
-				   TP_CMOS_VOLUME_MUTE : TP_CMOS_VOLUME_UP;
+	snd_card_set_dev(card, &tpacpi_pdev->dev);
+	rc = snd_card_register(card);
+	if (rc < 0) {
+		printk(TPACPI_ERR "Failed to register ALSA card: %d\n", rc);
+		goto err_exit;
+	}
 
-			if (issue_thinkpad_cmos_command(cmos_cmd) ||
-			    !acpi_ec_write(volume_offset, level + new_mute))
-				return -EIO;
+	alsa_card = card;
+	return 0;
+
+err_exit:
+	snd_card_free(card);
+	return 1;
+}
+
+#define TPACPI_VOL_Q_MUTEONLY	0x0001	/* Mute-only control available */
+#define TPACPI_VOL_Q_LEVEL	0x0002  /* Volume control available */
+
+static const struct tpacpi_quirk volume_quirk_table[] __initconst = {
+	/* Whitelist volume level on all IBM by default */
+	{ .vendor = PCI_VENDOR_ID_IBM,
+	  .bios   = TPACPI_MATCH_ANY,
+	  .ec     = TPACPI_MATCH_ANY,
+	  .quirks = TPACPI_VOL_Q_LEVEL },
+
+	/* Lenovo models with volume control (needs confirmation) */
+	TPACPI_QEC_LNV('7', 'C', TPACPI_VOL_Q_LEVEL), /* R60/i */
+	TPACPI_QEC_LNV('7', 'E', TPACPI_VOL_Q_LEVEL), /* R60e/i */
+	TPACPI_QEC_LNV('7', '9', TPACPI_VOL_Q_LEVEL), /* T60/p */
+	TPACPI_QEC_LNV('7', 'B', TPACPI_VOL_Q_LEVEL), /* X60/s */
+	TPACPI_QEC_LNV('7', 'J', TPACPI_VOL_Q_LEVEL), /* X60t */
+	TPACPI_QEC_LNV('7', '7', TPACPI_VOL_Q_LEVEL), /* Z60 */
+	TPACPI_QEC_LNV('7', 'F', TPACPI_VOL_Q_LEVEL), /* Z61 */
+
+	/* Whitelist mute-only on all Lenovo by default */
+	{ .vendor = PCI_VENDOR_ID_LENOVO,
+	  .bios   = TPACPI_MATCH_ANY,
+	  .ec	  = TPACPI_MATCH_ANY,
+	  .quirks = TPACPI_VOL_Q_MUTEONLY }
+};
+
+static int __init volume_init(struct ibm_init_struct *iibm)
+{
+	unsigned long quirks;
+	int rc;
+
+	vdbg_printk(TPACPI_DBG_INIT, "initializing volume subdriver\n");
+
+	mutex_init(&volume_mutex);
+
+	/*
+	 * Check for module parameter bogosity, note that we
+	 * init volume_mode to TPACPI_VOL_MODE_MAX in order to be
+	 * able to detect "unspecified"
+	 */
+	if (volume_mode > TPACPI_VOL_MODE_MAX)
+		return -EINVAL;
+
+	if (volume_mode == TPACPI_VOL_MODE_UCMS_STEP) {
+		printk(TPACPI_ERR
+			"UCMS step volume mode not implemented, "
+			"please contact %s\n", TPACPI_MAIL);
+		return 1;
+	}
+
+	if (volume_capabilities >= TPACPI_VOL_CAP_MAX)
+		return -EINVAL;
+
+	/*
+	 * The ALSA mixer is our primary interface.
+	 * When disabled, don't install the subdriver at all
+	 */
+	if (!alsa_enable) {
+		vdbg_printk(TPACPI_DBG_INIT | TPACPI_DBG_MIXER,
+			    "ALSA mixer disabled by parameter, "
+			    "not loading volume subdriver...\n");
+		return 1;
+	}
+
+	quirks = tpacpi_check_quirks(volume_quirk_table,
+				     ARRAY_SIZE(volume_quirk_table));
+
+	switch (volume_capabilities) {
+	case TPACPI_VOL_CAP_AUTO:
+		if (quirks & TPACPI_VOL_Q_MUTEONLY)
+			tp_features.mixer_no_level_control = 1;
+		else if (quirks & TPACPI_VOL_Q_LEVEL)
+			tp_features.mixer_no_level_control = 0;
+		else
+			return 1; /* no mixer */
+		break;
+	case TPACPI_VOL_CAP_VOLMUTE:
+		tp_features.mixer_no_level_control = 0;
+		break;
+	case TPACPI_VOL_CAP_MUTEONLY:
+		tp_features.mixer_no_level_control = 1;
+		break;
+	default:
+		return 1;
+	}
+
+	if (volume_capabilities != TPACPI_VOL_CAP_AUTO)
+		dbg_printk(TPACPI_DBG_INIT | TPACPI_DBG_MIXER,
+				"using user-supplied volume_capabilities=%d\n",
+				volume_capabilities);
+
+	if (volume_mode == TPACPI_VOL_MODE_AUTO ||
+	    volume_mode == TPACPI_VOL_MODE_MAX) {
+		volume_mode = TPACPI_VOL_MODE_ECNVRAM;
+
+		dbg_printk(TPACPI_DBG_INIT | TPACPI_DBG_MIXER,
+				"driver auto-selected volume_mode=%d\n",
+				volume_mode);
+	} else {
+		dbg_printk(TPACPI_DBG_INIT | TPACPI_DBG_MIXER,
+				"using user-supplied volume_mode=%d\n",
+				volume_mode);
+	}
+
+	vdbg_printk(TPACPI_DBG_INIT | TPACPI_DBG_MIXER,
+			"mute is supported, volume control is %s\n",
+			str_supported(!tp_features.mixer_no_level_control));
+
+	rc = volume_create_alsa_mixer();
+	if (rc) {
+		printk(TPACPI_ERR
+			"Could not create the ALSA mixer interface\n");
+		return rc;
+	}
+
+	printk(TPACPI_INFO
+		"Console audio control enabled, mode: %s\n",
+		(volume_control_allowed) ?
+			"override (read/write)" :
+			"monitor (read only)");
+
+	vdbg_printk(TPACPI_DBG_INIT | TPACPI_DBG_MIXER,
+		"registering volume hotkeys as change notification\n");
+	tpacpi_hotkey_driver_mask_set(hotkey_driver_mask
+			| TP_ACPI_HKEY_VOLUP_MASK
+			| TP_ACPI_HKEY_VOLDWN_MASK
+			| TP_ACPI_HKEY_MUTE_MASK);
+
+	return 0;
+}
+
+static int volume_read(struct seq_file *m)
+{
+	u8 status;
+
+	if (volume_get_status(&status) < 0) {
+		seq_printf(m, "level:\t\tunreadable\n");
+	} else {
+		if (tp_features.mixer_no_level_control)
+			seq_printf(m, "level:\t\tunsupported\n");
+		else
+			seq_printf(m, "level:\t\t%d\n",
+					status & TP_EC_AUDIO_LVL_MSK);
+
+		seq_printf(m, "mute:\t\t%s\n",
+				onoff(status, TP_EC_AUDIO_MUTESW));
+
+		if (volume_control_allowed) {
+			seq_printf(m, "commands:\tunmute, mute\n");
+			if (!tp_features.mixer_no_level_control) {
+				seq_printf(m,
+					       "commands:\tup, down\n");
+				seq_printf(m,
+					       "commands:\tlevel <level>"
+					       " (<level> is 0-%d)\n",
+					       TP_EC_VOLUME_MAX);
+			}
 		}
 	}
 
 	return 0;
 }
 
+static int volume_write(char *buf)
+{
+	u8 s;
+	u8 new_level, new_mute;
+	int l;
+	char *cmd;
+	int rc;
+
+	/*
+	 * We do allow volume control at driver startup, so that the
+	 * user can set initial state through the volume=... parameter hack.
+	 */
+	if (!volume_control_allowed && tpacpi_lifecycle != TPACPI_LIFE_INIT) {
+		if (unlikely(!tp_warned.volume_ctrl_forbidden)) {
+			tp_warned.volume_ctrl_forbidden = 1;
+			printk(TPACPI_NOTICE
+				"Console audio control in monitor mode, "
+				"changes are not allowed.\n");
+			printk(TPACPI_NOTICE
+				"Use the volume_control=1 module parameter "
+				"to enable volume control\n");
+		}
+		return -EPERM;
+	}
+
+	rc = volume_get_status(&s);
+	if (rc < 0)
+		return rc;
+
+	new_level = s & TP_EC_AUDIO_LVL_MSK;
+	new_mute  = s & TP_EC_AUDIO_MUTESW_MSK;
+
+	while ((cmd = next_cmd(&buf))) {
+		if (!tp_features.mixer_no_level_control) {
+			if (strlencmp(cmd, "up") == 0) {
+				if (new_mute)
+					new_mute = 0;
+				else if (new_level < TP_EC_VOLUME_MAX)
+					new_level++;
+				continue;
+			} else if (strlencmp(cmd, "down") == 0) {
+				if (new_mute)
+					new_mute = 0;
+				else if (new_level > 0)
+					new_level--;
+				continue;
+			} else if (sscanf(cmd, "level %u", &l) == 1 &&
+				   l >= 0 && l <= TP_EC_VOLUME_MAX) {
+					new_level = l;
+				continue;
+			}
+		}
+		if (strlencmp(cmd, "mute") == 0)
+			new_mute = TP_EC_AUDIO_MUTESW_MSK;
+		else if (strlencmp(cmd, "unmute") == 0)
+			new_mute = 0;
+		else
+			return -EINVAL;
+	}
+
+	if (tp_features.mixer_no_level_control) {
+		tpacpi_disclose_usertask("procfs volume", "%smute\n",
+					new_mute ? "" : "un");
+		rc = volume_set_mute(!!new_mute);
+	} else {
+		tpacpi_disclose_usertask("procfs volume",
+					"%smute and set level to %d\n",
+					new_mute ? "" : "un", new_level);
+		rc = volume_set_status(new_mute | new_level);
+	}
+	volume_alsa_notify_change();
+
+	return (rc == -EINTR) ? -ERESTARTSYS : rc;
+}
+
 static struct ibm_struct volume_driver_data = {
 	.name = "volume",
 	.read = volume_read,
 	.write = volume_write,
+	.exit = volume_exit,
+	.suspend = volume_suspend,
+	.resume = volume_resume,
+	.shutdown = volume_shutdown,
+};
+
+#else /* !CONFIG_THINKPAD_ACPI_ALSA_SUPPORT */
+
+#define alsa_card NULL
+
+static void inline volume_alsa_notify_change(void)
+{
+}
+
+static int __init volume_init(struct ibm_init_struct *iibm)
+{
+	printk(TPACPI_INFO
+		"volume: disabled as there is no ALSA support in this kernel\n");
+
+	return 1;
+}
+
+static struct ibm_struct volume_driver_data = {
+	.name = "volume",
 };
 
+#endif /* CONFIG_THINKPAD_ACPI_ALSA_SUPPORT */
+
 /*************************************************************************
  * Fan subdriver
  */
@@ -6461,7 +7109,7 @@
  *
  * 	Fan speed changes of any sort (including those caused by the
  * 	disengaged mode) are usually done slowly by the firmware as the
- * 	maximum ammount of fan duty cycle change per second seems to be
+ * 	maximum amount of fan duty cycle change per second seems to be
  * 	limited.
  *
  * 	Reading is not available if GFAN exists.
@@ -6545,7 +7193,7 @@
  * 	The speeds are stored on handles
  * 	(FANA:FAN9), (FANC:FANB), (FANE:FAND).
  *
- * 	There are three default speed sets, acessible as handles:
+ * 	There are three default speed sets, accessible as handles:
  * 	FS1L,FS1M,FS1H; FS2L,FS2M,FS2H; FS3L,FS3M,FS3H
  *
  * 	ACPI DSDT switches which set is in use depending on various
@@ -7510,9 +8158,8 @@
 	}
 }
 
-static int fan_read(char *p)
+static int fan_read(struct seq_file *m)
 {
-	int len = 0;
 	int rc;
 	u8 status;
 	unsigned int speed = 0;
@@ -7524,7 +8171,7 @@
 		if (rc < 0)
 			return rc;
 
-		len += sprintf(p + len, "status:\t\t%s\n"
+		seq_printf(m, "status:\t\t%s\n"
 			       "level:\t\t%d\n",
 			       (status != 0) ? "enabled" : "disabled", status);
 		break;
@@ -7535,54 +8182,54 @@
 		if (rc < 0)
 			return rc;
 
-		len += sprintf(p + len, "status:\t\t%s\n",
+		seq_printf(m, "status:\t\t%s\n",
 			       (status != 0) ? "enabled" : "disabled");
 
 		rc = fan_get_speed(&speed);
 		if (rc < 0)
 			return rc;
 
-		len += sprintf(p + len, "speed:\t\t%d\n", speed);
+		seq_printf(m, "speed:\t\t%d\n", speed);
 
 		if (status & TP_EC_FAN_FULLSPEED)
 			/* Disengaged mode takes precedence */
-			len += sprintf(p + len, "level:\t\tdisengaged\n");
+			seq_printf(m, "level:\t\tdisengaged\n");
 		else if (status & TP_EC_FAN_AUTO)
-			len += sprintf(p + len, "level:\t\tauto\n");
+			seq_printf(m, "level:\t\tauto\n");
 		else
-			len += sprintf(p + len, "level:\t\t%d\n", status);
+			seq_printf(m, "level:\t\t%d\n", status);
 		break;
 
 	case TPACPI_FAN_NONE:
 	default:
-		len += sprintf(p + len, "status:\t\tnot supported\n");
+		seq_printf(m, "status:\t\tnot supported\n");
 	}
 
 	if (fan_control_commands & TPACPI_FAN_CMD_LEVEL) {
-		len += sprintf(p + len, "commands:\tlevel <level>");
+		seq_printf(m, "commands:\tlevel <level>");
 
 		switch (fan_control_access_mode) {
 		case TPACPI_FAN_WR_ACPI_SFAN:
-			len += sprintf(p + len, " (<level> is 0-7)\n");
+			seq_printf(m, " (<level> is 0-7)\n");
 			break;
 
 		default:
-			len += sprintf(p + len, " (<level> is 0-7, "
+			seq_printf(m, " (<level> is 0-7, "
 				       "auto, disengaged, full-speed)\n");
 			break;
 		}
 	}
 
 	if (fan_control_commands & TPACPI_FAN_CMD_ENABLE)
-		len += sprintf(p + len, "commands:\tenable, disable\n"
+		seq_printf(m, "commands:\tenable, disable\n"
 			       "commands:\twatchdog <timeout> (<timeout> "
 			       "is 0 (off), 1-120 (seconds))\n");
 
 	if (fan_control_commands & TPACPI_FAN_CMD_SPEED)
-		len += sprintf(p + len, "commands:\tspeed <speed>"
+		seq_printf(m, "commands:\tspeed <speed>"
 			       " (<speed> is 0-65535)\n");
 
-	return len;
+	return 0;
 }
 
 static int fan_write_cmd_level(const char *cmd, int *rc)
@@ -7724,10 +8371,23 @@
  */
 static void tpacpi_driver_event(const unsigned int hkey_event)
 {
+	if (ibm_backlight_device) {
+		switch (hkey_event) {
+		case TP_HKEY_EV_BRGHT_UP:
+		case TP_HKEY_EV_BRGHT_DOWN:
+			tpacpi_brightness_notify_change();
+		}
+	}
+	if (alsa_card) {
+		switch (hkey_event) {
+		case TP_HKEY_EV_VOL_UP:
+		case TP_HKEY_EV_VOL_DOWN:
+		case TP_HKEY_EV_VOL_MUTE:
+			volume_alsa_notify_change();
+		}
+	}
 }
 
-
-
 static void hotkey_driver_event(const unsigned int scancode)
 {
 	tpacpi_driver_event(TP_HKEY_EV_HOTKEY_BASE + scancode);
@@ -7856,19 +8516,20 @@
 		"%s installed\n", ibm->name);
 
 	if (ibm->read) {
-		entry = create_proc_entry(ibm->name,
-					  S_IFREG | S_IRUGO | S_IWUSR,
-					  proc_dir);
+		mode_t mode = iibm->base_procfs_mode;
+
+		if (!mode)
+			mode = S_IRUGO;
+		if (ibm->write)
+			mode |= S_IWUSR;
+		entry = proc_create_data(ibm->name, mode, proc_dir,
+					 &dispatch_proc_fops, ibm);
 		if (!entry) {
 			printk(TPACPI_ERR "unable to create proc entry %s\n",
 			       ibm->name);
 			ret = -ENODEV;
 			goto err_out;
 		}
-		entry->data = ibm;
-		entry->read_proc = &dispatch_procfs_read;
-		if (ibm->write)
-			entry->write_proc = &dispatch_procfs_write;
 		ibm->flags.proc_created = 1;
 	}
 
@@ -8049,6 +8710,7 @@
 #ifdef CONFIG_THINKPAD_ACPI_VIDEO
 	{
 		.init = video_init,
+		.base_procfs_mode = S_IRUSR,
 		.data = &video_driver_data,
 	},
 #endif
@@ -8080,6 +8742,7 @@
 		.data = &brightness_driver_data,
 	},
 	{
+		.init = volume_init,
 		.data = &volume_driver_data,
 	},
 	{
@@ -8115,36 +8778,61 @@
 	return -EINVAL;
 }
 
-module_param(experimental, int, 0);
+module_param(experimental, int, 0444);
 MODULE_PARM_DESC(experimental,
 		 "Enables experimental features when non-zero");
 
 module_param_named(debug, dbg_level, uint, 0);
 MODULE_PARM_DESC(debug, "Sets debug level bit-mask");
 
-module_param(force_load, bool, 0);
+module_param(force_load, bool, 0444);
 MODULE_PARM_DESC(force_load,
 		 "Attempts to load the driver even on a "
 		 "mis-identified ThinkPad when true");
 
-module_param_named(fan_control, fan_control_allowed, bool, 0);
+module_param_named(fan_control, fan_control_allowed, bool, 0444);
 MODULE_PARM_DESC(fan_control,
 		 "Enables setting fan parameters features when true");
 
-module_param_named(brightness_mode, brightness_mode, uint, 0);
+module_param_named(brightness_mode, brightness_mode, uint, 0444);
 MODULE_PARM_DESC(brightness_mode,
 		 "Selects brightness control strategy: "
 		 "0=auto, 1=EC, 2=UCMS, 3=EC+NVRAM");
 
-module_param(brightness_enable, uint, 0);
+module_param(brightness_enable, uint, 0444);
 MODULE_PARM_DESC(brightness_enable,
 		 "Enables backlight control when 1, disables when 0");
 
-module_param(hotkey_report_mode, uint, 0);
+module_param(hotkey_report_mode, uint, 0444);
 MODULE_PARM_DESC(hotkey_report_mode,
 		 "used for backwards compatibility with userspace, "
 		 "see documentation");
 
+#ifdef CONFIG_THINKPAD_ACPI_ALSA_SUPPORT
+module_param_named(volume_mode, volume_mode, uint, 0444);
+MODULE_PARM_DESC(volume_mode,
+		 "Selects volume control strategy: "
+		 "0=auto, 1=EC, 2=N/A, 3=EC+NVRAM");
+
+module_param_named(volume_capabilities, volume_capabilities, uint, 0444);
+MODULE_PARM_DESC(volume_capabilities,
+		 "Selects the mixer capabilites: "
+		 "0=auto, 1=volume and mute, 2=mute only");
+
+module_param_named(volume_control, volume_control_allowed, bool, 0444);
+MODULE_PARM_DESC(volume_control,
+		 "Enables software override for the console audio "
+		 "control when true");
+
+/* ALSA module API parameters */
+module_param_named(index, alsa_index, int, 0444);
+MODULE_PARM_DESC(index, "ALSA index for the ACPI EC Mixer");
+module_param_named(id, alsa_id, charp, 0444);
+MODULE_PARM_DESC(id, "ALSA id for the ACPI EC Mixer");
+module_param_named(enable, alsa_enable, bool, 0444);
+MODULE_PARM_DESC(enable, "Enable the ALSA interface for the ACPI EC Mixer");
+#endif /* CONFIG_THINKPAD_ACPI_ALSA_SUPPORT */
+
 #define TPACPI_PARAM(feature) \
 	module_param_call(feature, set_ibm_param, NULL, NULL, 0); \
 	MODULE_PARM_DESC(feature, "Simulates thinkpad-acpi procfs command " \
@@ -8163,25 +8851,25 @@
 TPACPI_PARAM(fan);
 
 #ifdef CONFIG_THINKPAD_ACPI_DEBUGFACILITIES
-module_param(dbg_wlswemul, uint, 0);
+module_param(dbg_wlswemul, uint, 0444);
 MODULE_PARM_DESC(dbg_wlswemul, "Enables WLSW emulation");
 module_param_named(wlsw_state, tpacpi_wlsw_emulstate, bool, 0);
 MODULE_PARM_DESC(wlsw_state,
 		 "Initial state of the emulated WLSW switch");
 
-module_param(dbg_bluetoothemul, uint, 0);
+module_param(dbg_bluetoothemul, uint, 0444);
 MODULE_PARM_DESC(dbg_bluetoothemul, "Enables bluetooth switch emulation");
 module_param_named(bluetooth_state, tpacpi_bluetooth_emulstate, bool, 0);
 MODULE_PARM_DESC(bluetooth_state,
 		 "Initial state of the emulated bluetooth switch");
 
-module_param(dbg_wwanemul, uint, 0);
+module_param(dbg_wwanemul, uint, 0444);
 MODULE_PARM_DESC(dbg_wwanemul, "Enables WWAN switch emulation");
 module_param_named(wwan_state, tpacpi_wwan_emulstate, bool, 0);
 MODULE_PARM_DESC(wwan_state,
 		 "Initial state of the emulated WWAN switch");
 
-module_param(dbg_uwbemul, uint, 0);
+module_param(dbg_uwbemul, uint, 0444);
 MODULE_PARM_DESC(dbg_uwbemul, "Enables UWB switch emulation");
 module_param_named(uwb_state, tpacpi_uwb_emulstate, bool, 0);
 MODULE_PARM_DESC(uwb_state,
@@ -8374,6 +9062,7 @@
 						PCI_VENDOR_ID_IBM;
 		tpacpi_inputdev->id.product = TPACPI_HKEY_INPUT_PRODUCT;
 		tpacpi_inputdev->id.version = TPACPI_HKEY_INPUT_VERSION;
+		tpacpi_inputdev->dev.parent = &tpacpi_pdev->dev;
 	}
 	for (i = 0; i < ARRAY_SIZE(ibms_init); i++) {
 		ret = ibm_init(&ibms_init[i]);
@@ -8384,6 +9073,9 @@
 			return ret;
 		}
 	}
+
+	tpacpi_lifecycle = TPACPI_LIFE_RUNNING;
+
 	ret = input_register_device(tpacpi_inputdev);
 	if (ret < 0) {
 		printk(TPACPI_ERR "unable to register input device\n");
@@ -8393,7 +9085,6 @@
 		tp_features.input_device_registered = 1;
 	}
 
-	tpacpi_lifecycle = TPACPI_LIFE_RUNNING;
 	return 0;
 }
 
--- linux-mvl-dove-2.6.32.orig/drivers/platform/x86/sony-laptop.c
+++ linux-mvl-dove-2.6.32/drivers/platform/x86/sony-laptop.c
@@ -1390,6 +1390,10 @@
 	struct sonypi_event	*events;
 };
 
+struct sony_pic_quirk_entry {
+	u8				set_wwan_power;
+};
+
 struct sony_pic_dev {
 	struct acpi_device		*acpi_dev;
 	struct sony_pic_irq		*cur_irq;
@@ -1400,6 +1404,7 @@
 	struct sonypi_eventtypes	*event_types;
 	int                             (*handle_irq)(const u8, const u8);
 	int				model;
+	struct sony_pic_quirk_entry	*quirks;
 	u16				evport_offset;
 	u8				camera_power;
 	u8				bluetooth_power;
@@ -2828,6 +2833,12 @@
 	if (result)
 		goto err_remove_pf;
 
+	if (spic_dev.quirks && spic_dev.quirks->set_wwan_power) {
+		/*
+		 * Power isn't enabled by default.
+		 */
+		__sony_pic_set_wwanpower(1);
+	}
 	return 0;
 
 err_remove_pf:
@@ -2898,6 +2909,16 @@
 		},
 };
 
+static struct sony_pic_quirk_entry sony_pic_vaio_vgn = {
+	.set_wwan_power = 1,
+};
+
+static int dmi_matched(const struct dmi_system_id *dmi)
+{
+	spic_dev.quirks = dmi->driver_data;
+	return 0;
+}
+
 static struct dmi_system_id __initdata sonypi_dmi_table[] = {
 	{
 		.ident = "Sony Vaio",
@@ -2912,6 +2933,8 @@
 			DMI_MATCH(DMI_SYS_VENDOR, "Sony Corporation"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "VGN-"),
 		},
+		.callback = dmi_matched,
+		.driver_data = &sony_pic_vaio_vgn,
 	},
 	{ }
 };
--- linux-mvl-dove-2.6.32.orig/drivers/platform/x86/acerhdf.c
+++ linux-mvl-dove-2.6.32/drivers/platform/x86/acerhdf.c
@@ -52,7 +52,7 @@
  */
 #undef START_IN_KERNEL_MODE
 
-#define DRV_VER "0.5.18"
+#define DRV_VER "0.5.20"
 
 /*
  * According to the Atom N270 datasheet,
@@ -112,12 +112,14 @@
 MODULE_PARM_DESC(force_product, "Force BIOS product and omit BIOS check");
 
 /*
- * cmd_off: to switch the fan completely off / to check if the fan is off
+ * cmd_off: to switch the fan completely off
+ * chk_off: to check if the fan is off
  *	cmd_auto: to set the BIOS in control of the fan. The BIOS regulates then
  *		the fan speed depending on the temperature
  */
 struct fancmd {
 	u8 cmd_off;
+	u8 chk_off;
 	u8 cmd_auto;
 };
 
@@ -134,32 +136,41 @@
 /* Register addresses and values for different BIOS versions */
 static const struct bios_settings_t bios_tbl[] = {
 	/* AOA110 */
-	{"Acer", "AOA110", "v0.3109", 0x55, 0x58, {0x1f, 0x00} },
-	{"Acer", "AOA110", "v0.3114", 0x55, 0x58, {0x1f, 0x00} },
-	{"Acer", "AOA110", "v0.3301", 0x55, 0x58, {0xaf, 0x00} },
-	{"Acer", "AOA110", "v0.3304", 0x55, 0x58, {0xaf, 0x00} },
-	{"Acer", "AOA110", "v0.3305", 0x55, 0x58, {0xaf, 0x00} },
-	{"Acer", "AOA110", "v0.3307", 0x55, 0x58, {0xaf, 0x00} },
-	{"Acer", "AOA110", "v0.3308", 0x55, 0x58, {0x21, 0x00} },
-	{"Acer", "AOA110", "v0.3309", 0x55, 0x58, {0x21, 0x00} },
-	{"Acer", "AOA110", "v0.3310", 0x55, 0x58, {0x21, 0x00} },
+	{"Acer", "AOA110", "v0.3109", 0x55, 0x58, {0x1f, 0x1f, 0x00} },
+	{"Acer", "AOA110", "v0.3114", 0x55, 0x58, {0x1f, 0x1f, 0x00} },
+	{"Acer", "AOA110", "v0.3301", 0x55, 0x58, {0xaf, 0xaf, 0x00} },
+	{"Acer", "AOA110", "v0.3304", 0x55, 0x58, {0xaf, 0xaf, 0x00} },
+	{"Acer", "AOA110", "v0.3305", 0x55, 0x58, {0xaf, 0xaf, 0x00} },
+	{"Acer", "AOA110", "v0.3307", 0x55, 0x58, {0xaf, 0xaf, 0x00} },
+	{"Acer", "AOA110", "v0.3308", 0x55, 0x58, {0x21, 0x21, 0x00} },
+	{"Acer", "AOA110", "v0.3309", 0x55, 0x58, {0x21, 0x21, 0x00} },
+	{"Acer", "AOA110", "v0.3310", 0x55, 0x58, {0x21, 0x21, 0x00} },
 	/* AOA150 */
-	{"Acer", "AOA150", "v0.3114", 0x55, 0x58, {0x20, 0x00} },
-	{"Acer", "AOA150", "v0.3301", 0x55, 0x58, {0x20, 0x00} },
-	{"Acer", "AOA150", "v0.3304", 0x55, 0x58, {0x20, 0x00} },
-	{"Acer", "AOA150", "v0.3305", 0x55, 0x58, {0x20, 0x00} },
-	{"Acer", "AOA150", "v0.3307", 0x55, 0x58, {0x20, 0x00} },
-	{"Acer", "AOA150", "v0.3308", 0x55, 0x58, {0x20, 0x00} },
-	{"Acer", "AOA150", "v0.3309", 0x55, 0x58, {0x20, 0x00} },
-	{"Acer", "AOA150", "v0.3310", 0x55, 0x58, {0x20, 0x00} },
+	{"Acer", "AOA150", "v0.3114", 0x55, 0x58, {0x20, 0x20, 0x00} },
+	{"Acer", "AOA150", "v0.3301", 0x55, 0x58, {0x20, 0x20, 0x00} },
+	{"Acer", "AOA150", "v0.3304", 0x55, 0x58, {0x20, 0x20, 0x00} },
+	{"Acer", "AOA150", "v0.3305", 0x55, 0x58, {0x20, 0x20, 0x00} },
+	{"Acer", "AOA150", "v0.3307", 0x55, 0x58, {0x20, 0x20, 0x00} },
+	{"Acer", "AOA150", "v0.3308", 0x55, 0x58, {0x20, 0x20, 0x00} },
+	{"Acer", "AOA150", "v0.3309", 0x55, 0x58, {0x20, 0x20, 0x00} },
+	{"Acer", "AOA150", "v0.3310", 0x55, 0x58, {0x20, 0x20, 0x00} },
+	/* Acer 1410 */
+	{"Acer", "Aspire 1410", "v0.3120", 0x55, 0x58, {0x9e, 0x9e, 0x00} },
 	/* special BIOS / other */
-	{"Gateway", "AOA110", "v0.3103", 0x55, 0x58, {0x21, 0x00} },
-	{"Gateway", "AOA150", "v0.3103", 0x55, 0x58, {0x20, 0x00} },
-	{"Packard Bell", "DOA150", "v0.3104", 0x55, 0x58, {0x21, 0x00} },
-	{"Packard Bell", "AOA110", "v0.3105", 0x55, 0x58, {0x21, 0x00} },
-	{"Packard Bell", "AOA150", "v0.3105", 0x55, 0x58, {0x20, 0x00} },
+	{"Gateway", "AOA110", "v0.3103", 0x55, 0x58, {0x21, 0x21, 0x00} },
+	{"Gateway", "AOA150", "v0.3103", 0x55, 0x58, {0x20, 0x20, 0x00} },
+	{"Gateway         ", "LT31            ", "v1.3103 ", 0x55, 0x58,
+		{0x10, 0x0f, 0x00} },
+	{"Gateway         ", "LT31            ", "v1.3201 ", 0x55, 0x58,
+		{0x10, 0x0f, 0x00} },
+	{"Gateway         ", "LT31            ", "v1.3302 ", 0x55, 0x58,
+		{0x10, 0x0f, 0x00} },
+	{"Packard Bell", "DOA150", "v0.3104", 0x55, 0x58, {0x21, 0x21, 0x00} },
+	{"Packard Bell", "DOA150", "v0.3105", 0x55, 0x58, {0x20, 0x20, 0x00} },
+	{"Packard Bell", "AOA110", "v0.3105", 0x55, 0x58, {0x21, 0x21, 0x00} },
+	{"Packard Bell", "AOA150", "v0.3105", 0x55, 0x58, {0x20, 0x20, 0x00} },
 	/* pewpew-terminator */
-	{"", "", "", 0, 0, {0, 0} }
+	{"", "", "", 0, 0, {0, 0, 0} }
 };
 
 static const struct bios_settings_t *bios_cfg __read_mostly;
@@ -183,7 +194,7 @@
 	if (ec_read(bios_cfg->fanreg, &fan))
 		return -EINVAL;
 
-	if (fan != bios_cfg->cmd.cmd_off)
+	if (fan != bios_cfg->cmd.chk_off)
 		*state = ACERHDF_FAN_AUTO;
 	else
 		*state = ACERHDF_FAN_OFF;
@@ -629,9 +640,10 @@
 MODULE_LICENSE("GPL");
 MODULE_AUTHOR("Peter Feuerer");
 MODULE_DESCRIPTION("Aspire One temperature and fan driver");
-MODULE_ALIAS("dmi:*:*Acer*:*:");
-MODULE_ALIAS("dmi:*:*Gateway*:*:");
-MODULE_ALIAS("dmi:*:*Packard Bell*:*:");
+MODULE_ALIAS("dmi:*:*Acer*:pnAOA*:");
+MODULE_ALIAS("dmi:*:*Gateway*:pnAOA*:");
+MODULE_ALIAS("dmi:*:*Packard Bell*:pnAOA*:");
+MODULE_ALIAS("dmi:*:*Packard Bell*:pnDOA*:");
 
 module_init(acerhdf_init);
 module_exit(acerhdf_exit);
--- linux-mvl-dove-2.6.32.orig/drivers/platform/x86/dell-laptop.c
+++ linux-mvl-dove-2.6.32/drivers/platform/x86/dell-laptop.c
@@ -22,9 +22,15 @@
 #include <linux/rfkill.h>
 #include <linux/power_supply.h>
 #include <linux/acpi.h>
+#include <linux/input.h>
 #include "../../firmware/dcdbas.h"
 
 #define BRIGHTNESS_TOKEN 0x7d
+#define WLAN_SWITCH_MASK 0
+#define BT_SWITCH_MASK 1
+#define WWAN_SWITCH_MASK 2
+#define HW_SWITCH_SUPPORT 3
+#define HW_SWITCH_MASK 16
 
 /* This structure will be modified by the firmware when we enter
  * system management mode, hence the volatiles */
@@ -63,6 +69,13 @@
 static struct rfkill *bluetooth_rfkill;
 static struct rfkill *wwan_rfkill;
 
+/*
+ * RFkill status is maintained in software because the BIOS has an annoying
+ * habit of emitting a KEY_WLAN key press event before the BIOS state is updated, making
+ * dell_send_request() racy.
+ */
+static int   hw_switch_status;
+
 static const struct dmi_system_id __initdata dell_device_table[] = {
 	{
 		.ident = "Dell laptop",
@@ -71,9 +84,70 @@
 			DMI_MATCH(DMI_CHASSIS_TYPE, "8"),
 		},
 	},
+	{
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
+			DMI_MATCH(DMI_CHASSIS_TYPE, "9"), /*Laptop*/
+		},
+	},
+	{
+		.ident = "Dell Computer Corporation",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
+			DMI_MATCH(DMI_CHASSIS_TYPE, "8"),
+		},
+	},
 	{ }
 };
 
+static struct dmi_system_id __devinitdata dell_blacklist[] = {
+	/* BIOS always returns HW switch disabled */
+	{
+		.ident = "Dell Vostro 1720",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Vostro 1720"),
+		},
+	},
+	/* Supported by compal-laptop */
+	{
+		.ident = "Dell Mini 9",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 910"),
+		},
+	},
+	{
+		.ident = "Dell Mini 10",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 1010"),
+		},
+	},
+	{
+		.ident = "Dell Mini 10v",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 1011"),
+		},
+	},
+	{
+		.ident = "Dell Inspiron 11z",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 1110"),
+		},
+	},
+	{
+		.ident = "Dell Mini 12",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 1210"),
+		},
+	},
+	{}
+};
+
 static void parse_da_table(const struct dmi_header *dm)
 {
 	/* Final token is a terminator, so we don't want to copy it */
@@ -180,10 +254,12 @@
 	int disable = blocked ? 1 : 0;
 	unsigned long radio = (unsigned long)data;
 
-	memset(&buffer, 0, sizeof(struct calling_interface_buffer));
-	buffer.input[0] = (1 | (radio<<8) | (disable << 16));
-	dell_send_request(&buffer, 17, 11);
-
+	if (!(hw_switch_status & BIT(radio-1)) || !(hw_switch_status & BIT(HW_SWITCH_MASK)) || \
+			!(hw_switch_status & BIT(HW_SWITCH_SUPPORT))) {
+		memset(&buffer, 0, sizeof(struct calling_interface_buffer));
+		buffer.input[0] = (1 | (radio<<8) | (disable << 16));
+		dell_send_request(&buffer, 17, 11);
+	}
 	return 0;
 }
 
@@ -191,14 +267,33 @@
 {
 	struct calling_interface_buffer buffer;
 	int status;
-	int bit = (unsigned long)data + 16;
+	int bit = (unsigned long)data - 1;
 
 	memset(&buffer, 0, sizeof(struct calling_interface_buffer));
 	dell_send_request(&buffer, 17, 11);
 	status = buffer.output[1];
 
-	if (status & BIT(bit))
-		rfkill_set_hw_state(rfkill, !!(status & BIT(16)));
+	hw_switch_status |= (status & BIT(0)) << BIT(HW_SWITCH_SUPPORT);
+	hw_switch_status |= (status & BIT(HW_SWITCH_MASK)) ^ BIT(HW_SWITCH_MASK);
+
+	/* HW switch control not supported
+	   explicitly set it to all 3 as they'll change in unison then */
+	if (!(status & BIT(0)))
+		hw_switch_status |= BIT(WLAN_SWITCH_MASK) | BIT(BT_SWITCH_MASK) | (WWAN_SWITCH_MASK);
+	else {
+		/* rerun the query to see what is really supported */
+		memset(&buffer, 0, sizeof(struct calling_interface_buffer));
+		buffer.input[0] = 2;
+		dell_send_request(&buffer, 17, 11);
+		status = buffer.output[1];
+
+		hw_switch_status |= status & BIT(bit);
+	}
+
+	if (hw_switch_status & BIT(bit))
+		rfkill_set_hw_state(rfkill, hw_switch_status & BIT(HW_SWITCH_MASK));
+	else
+		rfkill_set_hw_state(rfkill, 0);
 }
 
 static const struct rfkill_ops dell_rfkill_ops = {
@@ -206,11 +301,38 @@
 	.query = dell_rfkill_query,
 };
 
+/*
+ * Called for each KEY_WLAN key press event. Note that a physical
+ * rf-kill switch change also causes the BIOS to emit a KEY_WLAN.
+ *
+ * dell_rfkill_set may block, so schedule it on a worker thread.
+ */
+static void dell_rfkill_update(struct work_struct *work)
+{
+	hw_switch_status ^= BIT(HW_SWITCH_MASK);
+	if (wifi_rfkill && (hw_switch_status & BIT(WLAN_SWITCH_MASK))) {
+		rfkill_set_hw_state(wifi_rfkill, hw_switch_status & BIT(HW_SWITCH_MASK));
+		dell_rfkill_set((void*)1, rfkill_blocked(wifi_rfkill));
+	}
+
+	if (bluetooth_rfkill && (hw_switch_status & BIT(BT_SWITCH_MASK))) {
+		rfkill_set_hw_state(bluetooth_rfkill, hw_switch_status & BIT(HW_SWITCH_MASK));
+		dell_rfkill_set((void*)2, rfkill_blocked(bluetooth_rfkill));
+	}
+
+	if (wwan_rfkill && (hw_switch_status & BIT(WWAN_SWITCH_MASK))) {
+		rfkill_set_hw_state(wwan_rfkill, hw_switch_status & BIT(HW_SWITCH_MASK));
+		dell_rfkill_set((void*)3, rfkill_blocked(wwan_rfkill));
+	}
+}
+DECLARE_WORK(dell_rfkill_update_work, &dell_rfkill_update);
+
 static int dell_setup_rfkill(void)
 {
 	struct calling_interface_buffer buffer;
 	int status;
 	int ret;
+	hw_switch_status = 0;
 
 	memset(&buffer, 0, sizeof(struct calling_interface_buffer));
 	dell_send_request(&buffer, 17, 11);
@@ -310,6 +432,92 @@
 	.update_status  = dell_send_intensity,
 };
 
+static const struct input_device_id dell_input_ids[] = {
+	{
+		.bustype = 0x11,
+		.vendor = 0x01,
+		.product = 0x01,
+		.version = 0xab41,
+		.flags = INPUT_DEVICE_ID_MATCH_BUS |
+			 INPUT_DEVICE_ID_MATCH_VENDOR |
+			 INPUT_DEVICE_ID_MATCH_PRODUCT |
+			 INPUT_DEVICE_ID_MATCH_VERSION
+	},
+	{ },
+};
+
+static bool dell_input_filter(struct input_handle *handle, unsigned int type,
+			     unsigned int code, int value)
+{
+	if (type == EV_KEY && code == KEY_WLAN && value == 1) {
+		if (!schedule_work(&dell_rfkill_update_work))
+			printk(KERN_NOTICE "rfkill switch handling already "
+					   "scheduled, dropping this event\n");
+		return 1;
+	}
+
+	return 0;
+}
+
+static void dell_input_event(struct input_handle *handle, unsigned int type,
+			     unsigned int code, int value)
+{
+}
+
+static int dell_input_connect(struct input_handler *handler,
+			      struct input_dev *dev,
+			      const struct input_device_id *id)
+{
+	struct input_handle *handle;
+	int error;
+
+	handle = kzalloc(sizeof(struct input_handle), GFP_KERNEL);
+	if (!handle)
+		return -ENOMEM;
+
+	handle->dev = dev;
+	handle->handler = handler;
+	handle->name = "dell-laptop";
+
+	error = input_register_handle(handle);
+	if (error)
+		goto err_free_handle;
+
+	error = input_open_device(handle);
+	if (error)
+		goto err_unregister_handle;
+
+	error = input_filter_device(handle);
+	if (error)
+		goto err_close_handle;
+
+	return 0;
+
+err_close_handle:
+	input_close_device(handle);
+err_unregister_handle:
+	input_unregister_handle(handle);
+err_free_handle:
+	kfree(handle);
+	return error;
+}
+
+static void dell_input_disconnect(struct input_handle *handle)
+{
+	input_close_device(handle);
+	input_unregister_handle(handle);
+	kfree(handle);
+}
+
+static struct input_handler dell_input_handler = {
+	.name = "dell-laptop",
+	.filter = dell_input_filter,
+	.event = dell_input_event,
+	.connect = dell_input_connect,
+	.disconnect = dell_input_disconnect,
+	.id_table = dell_input_ids,
+};
+
 static int __init dell_init(void)
 {
 	struct calling_interface_buffer buffer;
@@ -319,6 +527,12 @@
 	if (!dmi_check_system(dell_device_table))
 		return -ENODEV;
 
+	if (dmi_check_system(dell_blacklist)) {
+		printk(KERN_INFO "dell-laptop: Blacklisted hardware detected - "
+				"not loading\n");
+		return -ENODEV;
+	}
+
 	dmi_walk(find_tokens, NULL);
 
 	if (!da_tokens)  {
@@ -333,6 +547,10 @@
 		goto out;
 	}
 
+	if (input_register_handler(&dell_input_handler))
+		printk(KERN_INFO
+		       "dell-laptop: Could not register input filter\n");
+
 #ifdef CONFIG_ACPI
 	/* In the event of an ACPI backlight being available, don't
 	 * register the platform controller.
@@ -388,6 +606,7 @@
 		rfkill_unregister(bluetooth_rfkill);
 	if (wwan_rfkill)
 		rfkill_unregister(wwan_rfkill);
+	input_unregister_handler(&dell_input_handler);
 }
 
 module_init(dell_init);
@@ -397,3 +616,5 @@
 MODULE_DESCRIPTION("Dell laptop driver");
 MODULE_LICENSE("GPL");
 MODULE_ALIAS("dmi:*svnDellInc.:*:ct8:*");
+MODULE_ALIAS("dmi:*svnDellInc.:*:ct9:*");
+MODULE_ALIAS("dmi:*svnDellComputerCorporation.:*:ct8:*");
--- linux-mvl-dove-2.6.32.orig/drivers/platform/x86/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/platform/x86/Kconfig
@@ -233,6 +233,29 @@
 
 	  If you have an IBM or Lenovo ThinkPad laptop, say Y or M here.
 
+config THINKPAD_ACPI_ALSA_SUPPORT
+	bool "Console audio control ALSA interface"
+	depends on THINKPAD_ACPI
+	depends on SND
+	depends on SND = y || THINKPAD_ACPI = SND
+	default y
+	---help---
+	  Enables monitoring of the built-in console audio output control
+	  (headphone and speakers), which is operated by the mute and (in
+	  some ThinkPad models) volume hotkeys.
+
+	  If this option is enabled, ThinkPad-ACPI will export an ALSA card
+	  with a single read-only mixer control, which should be used for
+	  on-screen-display feedback purposes by the Desktop Environment.
+
+	  Optionally, the driver will also allow software control (the
+	  ALSA mixer will be made read-write).  Please refer to the driver
+	  documentation for details.
+
+	  All IBM models have both volume and mute control.  Newer Lenovo
+	  models only have mute control (the volume hotkeys are just normal
+	  keys and volume control is done through the main HDA mixer).
+
 config THINKPAD_ACPI_DEBUGFACILITIES
 	bool "Maintainer debug facilities"
 	depends on THINKPAD_ACPI
--- linux-mvl-dove-2.6.32.orig/drivers/platform/x86/hp-wmi.c
+++ linux-mvl-dove-2.6.32/drivers/platform/x86/hp-wmi.c
@@ -334,8 +334,13 @@
 	struct acpi_buffer response = { ACPI_ALLOCATE_BUFFER, NULL };
 	static struct key_entry *key;
 	union acpi_object *obj;
+	acpi_status status;
 
-	wmi_get_event_data(value, &response);
+	status = wmi_get_event_data(value, &response);
+	if (status != AE_OK) {
+		printk(KERN_INFO "hp-wmi: bad event status 0x%x\n", status);
+		return;
+	}
 
 	obj = (union acpi_object *)response.pointer;
 
@@ -377,6 +382,8 @@
 			       eventcode);
 	} else
 		printk(KERN_INFO "HP WMI: Unknown response received\n");
+
+	kfree(obj);
 }
 
 static int __init hp_wmi_input_setup(void)
--- linux-mvl-dove-2.6.32.orig/drivers/platform/x86/dell-wmi.c
+++ linux-mvl-dove-2.6.32/drivers/platform/x86/dell-wmi.c
@@ -40,6 +40,10 @@
 
 MODULE_ALIAS("wmi:"DELL_EVENT_GUID);
 
+/* Temporary workaround until the WMI sysfs interface goes in.
+   Borrowed from acer-wmi */
+MODULE_ALIAS("dmi:*:*Dell*:*:");
+
 struct key_entry {
 	char type;		/* See KE_* below */
 	u16 code;
@@ -158,8 +162,13 @@
 	struct acpi_buffer response = { ACPI_ALLOCATE_BUFFER, NULL };
 	static struct key_entry *key;
 	union acpi_object *obj;
+	acpi_status status;
 
-	wmi_get_event_data(value, &response);
+	status = wmi_get_event_data(value, &response);
+	if (status != AE_OK) {
+		printk(KERN_INFO "dell-wmi: bad event status 0x%x\n", status);
+		return;
+	}
 
 	obj = (union acpi_object *)response.pointer;
 
@@ -180,6 +189,7 @@
 			printk(KERN_INFO "dell-wmi: Unknown key %x pressed\n",
 			       buffer[1] & 0xFFFF);
 	}
+	kfree(obj);
 }
 
 static int __init dell_wmi_input_setup(void)
--- linux-mvl-dove-2.6.32.orig/drivers/platform/x86/tc1100-wmi.c
+++ linux-mvl-dove-2.6.32/drivers/platform/x86/tc1100-wmi.c
@@ -177,7 +177,7 @@
 			return -EINVAL; \
 	return count; \
 } \
-static DEVICE_ATTR(value, S_IWUGO | S_IRUGO | S_IWUSR, \
+static DEVICE_ATTR(value, S_IRUGO | S_IWUSR, \
 	show_bool_##value, set_bool_##value);
 
 show_set_bool(wireless, TC1100_INSTANCE_WIRELESS);
--- linux-mvl-dove-2.6.32.orig/drivers/platform/x86/wmi.c
+++ linux-mvl-dove-2.6.32/drivers/platform/x86/wmi.c
@@ -510,8 +510,8 @@
 /**
  * wmi_get_event_data - Get WMI data associated with an event
  *
- * @event - Event to find
- * &out - Buffer to hold event data
+ * @event: Event to find
+ * @out: Buffer to hold event data. out->pointer should be freed with kfree()
  *
  * Returns extra data associated with an event in WMI.
  */
--- linux-mvl-dove-2.6.32.orig/drivers/platform/x86/acer-wmi.c
+++ linux-mvl-dove-2.6.32/drivers/platform/x86/acer-wmi.c
@@ -90,7 +90,7 @@
  */
 #define AMW0_GUID1		"67C3371D-95A3-4C37-BB61-DD47B491DAAB"
 #define AMW0_GUID2		"431F16ED-0C2B-444C-B267-27DEB140CF9C"
-#define WMID_GUID1		"6AF4F258-B401-42fd-BE91-3D4AC2D7C0D3"
+#define WMID_GUID1		"6AF4F258-B401-42FD-BE91-3D4AC2D7C0D3"
 #define WMID_GUID2		"95764E09-FB56-4e83-B31A-37761F60994A"
 
 MODULE_ALIAS("wmi:67C3371D-95A3-4C37-BB61-DD47B491DAAB");
@@ -1065,7 +1065,7 @@
 			return -EINVAL;
 	return count;
 }
-static DEVICE_ATTR(threeg, S_IWUGO | S_IRUGO | S_IWUSR, show_bool_threeg,
+static DEVICE_ATTR(threeg, S_IRUGO | S_IWUSR, show_bool_threeg,
 	set_bool_threeg);
 
 static ssize_t show_interface(struct device *dev, struct device_attribute *attr,
--- linux-mvl-dove-2.6.32.orig/drivers/platform/x86/asus_acpi.c
+++ linux-mvl-dove-2.6.32/drivers/platform/x86/asus_acpi.c
@@ -1001,14 +1001,8 @@
 	struct proc_dir_entry *proc;
 	mode_t mode;
 
-	/*
-	 * If parameter uid or gid is not changed, keep the default setting for
-	 * our proc entries (-rw-rw-rw-) else, it means we care about security,
-	 * and then set to -rw-rw----
-	 */
-
 	if ((asus_uid == 0) && (asus_gid == 0)) {
-		mode = S_IFREG | S_IRUGO | S_IWUGO;
+		mode = S_IFREG | S_IRUGO | S_IWUSR | S_IWGRP;
 	} else {
 		mode = S_IFREG | S_IRUSR | S_IRGRP | S_IWUSR | S_IWGRP;
 		printk(KERN_WARNING "  asus_uid and asus_gid parameters are "
--- linux-mvl-dove-2.6.32.orig/drivers/platform/x86/eeepc-laptop.c
+++ linux-mvl-dove-2.6.32/drivers/platform/x86/eeepc-laptop.c
@@ -34,6 +34,7 @@
 #include <linux/rfkill.h>
 #include <linux/pci.h>
 #include <linux/pci_hotplug.h>
+#include <linux/dmi.h>
 
 #define EEEPC_LAPTOP_VERSION	"0.1"
 
@@ -135,6 +136,8 @@
 	acpi_handle handle;		/* the handle of the hotk device */
 	u32 cm_supported;		/* the control methods supported
 					   by this BIOS */
+	bool cpufv_disabled;
+	bool hotplug_disabled;
 	uint init_flag;			/* Init flags */
 	u16 event_count[128];		/* count for each event */
 	struct input_dev *inputdev;
@@ -251,6 +254,14 @@
 MODULE_DESCRIPTION(EEEPC_HOTK_NAME);
 MODULE_LICENSE("GPL");
 
+static bool hotplug_disabled;
+
+module_param(hotplug_disabled, bool, 0644);
+MODULE_PARM_DESC(hotplug_disabled,
+		 "Disable hotplug for wireless device. "
+		 "If your laptop need that, please report to "
+		 "acpi4asus-user@lists.sourceforge.net.");
+
 /*
  * ACPI Helpers
  */
@@ -467,6 +478,8 @@
 	struct eeepc_cpufv c;
 	int rv, value;
 
+	if (ehotk->cpufv_disabled)
+		return -EPERM;
 	if (get_cpufv(&c))
 		return -ENODEV;
 	rv = parse_arg(buf, count, &value);
@@ -478,6 +491,38 @@
 	return rv;
 }
 
+static ssize_t show_cpufv_disabled(struct device *dev,
+			  struct device_attribute *attr,
+			  char *buf)
+{
+	return sprintf(buf, "%d\n", ehotk->cpufv_disabled);
+}
+
+static ssize_t store_cpufv_disabled(struct device *dev,
+			   struct device_attribute *attr,
+			   const char *buf, size_t count)
+{
+	int rv, value;
+
+	rv = parse_arg(buf, count, &value);
+	if (rv < 0)
+		return rv;
+
+	switch (value) {
+	case 0:
+		if (ehotk->cpufv_disabled)
+			pr_warning("cpufv enabled (not officially supported "
+				"on this model)\n");
+		ehotk->cpufv_disabled = false;
+		return rv;
+	case 1:
+		return -EPERM;
+	default:
+		return -EINVAL;
+	}
+}
+
+
 static struct device_attribute dev_attr_cpufv = {
 	.attr = {
 		.name = "cpufv",
@@ -493,12 +538,22 @@
 	.show   = show_available_cpufv
 };
 
+static struct device_attribute dev_attr_cpufv_disabled = {
+	.attr = {
+		.name = "cpufv_disabled",
+		.mode = 0644 },
+	.show   = show_cpufv_disabled,
+	.store  = store_cpufv_disabled
+};
+
+
 static struct attribute *platform_attributes[] = {
 	&dev_attr_camera.attr,
 	&dev_attr_cardr.attr,
 	&dev_attr_disp.attr,
 	&dev_attr_cpufv.attr,
 	&dev_attr_available_cpufv.attr,
+	&dev_attr_cpufv_disabled.attr,
 	NULL
 };
 
@@ -564,6 +619,54 @@
 	return -EINVAL;
 }
 
+static void eeepc_dmi_check(void)
+{
+	const char *model;
+
+	model = dmi_get_system_info(DMI_PRODUCT_NAME);
+	if (!model)
+		return;
+
+	/*
+	 * Blacklist for setting cpufv (cpu speed).
+	 *
+	 * EeePC 4G ("701") implements CFVS, but it is not supported
+	 * by the pre-installed OS, and the original option to change it
+	 * in the BIOS setup screen was removed in later versions.
+	 *
+	 * Judging by the lack of "Super Hybrid Engine" on Asus product pages,
+	 * this applies to all "701" models (4G/4G Surf/2G Surf).
+	 *
+	 * So Asus made a deliberate decision not to support it on this model.
+	 * We have several reports that using it can cause the system to hang
+	 *
+	 * The hang has also been reported on a "702" (Model name "8G"?).
+	 *
+	 * We avoid dmi_check_system() / dmi_match(), because they use
+	 * substring matching.  We don't want to affect the "701SD"
+	 * and "701SDX" models, because they do support S.H.E.
+	 */
+	if (strcmp(model, "701") == 0 || strcmp(model, "702") == 0) {
+		ehotk->cpufv_disabled = true;
+		pr_info("model %s does not officially support setting cpu "
+			"speed\n", model);
+		pr_info("cpufv disabled to avoid instability\n");
+	}
+
+	/*
+	 * Blacklist for wlan hotplug
+	 *
+	 * Eeepc 1005HA doesn't work like others models and don't need the
+	 * hotplug code. In fact, current hotplug code seems to unplug another
+	 * device...
+	 */
+	if (strcmp(model, "1005HA") == 0 || strcmp(model, "1201N") == 0 ||
+	    strcmp(model, "1005PE") == 0) {
+		ehotk->hotplug_disabled = true;
+		pr_info("wlan hotplug disabled\n");
+	}
+}
+
 static void cmsg_quirk(int cm, const char *name)
 {
 	int dummy;
@@ -649,6 +752,8 @@
 	struct pci_dev *dev;
 	struct pci_bus *bus;
 	bool blocked = eeepc_wlan_rfkill_blocked();
+	bool absent;
+	u32 l;
 
 	if (ehotk->wlan_rfkill)
 		rfkill_set_sw_state(ehotk->wlan_rfkill, blocked);
@@ -662,6 +767,22 @@
 			goto out_unlock;
 		}
 
+		if (pci_bus_read_config_dword(bus, 0, PCI_VENDOR_ID, &l)) {
+			pr_err("Unable to read PCI config space?\n");
+			goto out_unlock;
+		}
+		absent = (l == 0xffffffff);
+
+		if (blocked != absent) {
+			pr_warning("BIOS says wireless lan is %s, "
+					"but the pci device is %s\n",
+				blocked ? "blocked" : "unblocked",
+				absent ? "absent" : "present");
+			pr_warning("skipped wireless hotplug as probably "
+					"inappropriate for this model\n");
+			goto out_unlock;
+		}
+
 		if (!blocked) {
 			dev = pci_get_slot(bus, 0);
 			if (dev) {
@@ -1095,6 +1216,9 @@
 	if (result && result != -ENODEV)
 		goto exit;
 
+	if (ehotk->hotplug_disabled)
+		return 0;
+
 	result = eeepc_setup_pci_hotplug();
 	/*
 	 * If we get -EBUSY then something else is handling the PCI hotplug -
@@ -1208,6 +1332,10 @@
 	device->driver_data = ehotk;
 	ehotk->device = device;
 
+	ehotk->hotplug_disabled = hotplug_disabled;
+
+	eeepc_dmi_check();
+
 	result = eeepc_hotk_check();
 	if (result)
 		goto fail_platform_driver;
--- linux-mvl-dove-2.6.32.orig/drivers/platform/x86/compal-laptop.c
+++ linux-mvl-dove-2.6.32/drivers/platform/x86/compal-laptop.c
@@ -26,17 +26,8 @@
 /*
  * comapl-laptop.c - Compal laptop support.
  *
- * This driver exports a few files in /sys/devices/platform/compal-laptop/:
- *
- *   wlan - wlan subsystem state: contains 0 or 1 (rw)
- *
- *   bluetooth - Bluetooth subsystem state: contains 0 or 1 (rw)
- *
- *   raw - raw value taken from embedded controller register (ro)
- *
- * In addition to these platform device attributes the driver
- * registers itself in the Linux backlight control subsystem and is
- * available to userspace under /sys/class/backlight/compal-laptop/.
+ * The driver registers itself with the rfkill subsystem and
+ * the Linux backlight control subsystem.
  *
  * This driver might work on other laptops produced by Compal. If you
  * want to try it you can pass force=1 as argument to the module which
@@ -52,6 +43,7 @@
 #include <linux/backlight.h>
 #include <linux/platform_device.h>
 #include <linux/autoconf.h>
+#include <linux/rfkill.h>
 
 #define COMPAL_DRIVER_VERSION "0.2.6"
 
@@ -64,6 +56,10 @@
 #define WLAN_MASK	0x01
 #define BT_MASK 	0x02
 
+static struct rfkill *wifi_rfkill;
+static struct rfkill *bt_rfkill;
+static struct platform_device *compal_device;
+
 static int force;
 module_param(force, bool, 0);
 MODULE_PARM_DESC(force, "Force driver load, ignore DMI data");
@@ -89,65 +85,75 @@
 	return (int) result;
 }
 
-static int set_wlan_state(int state)
+static int compal_rfkill_set(void *data, bool blocked)
 {
+	unsigned long radio = (unsigned long) data;
 	u8 result, value;
 
 	ec_read(COMPAL_EC_COMMAND_WIRELESS, &result);
 
-	if ((result & KILLSWITCH_MASK) == 0)
-		return -EINVAL;
-	else {
-		if (state)
-			value = (u8) (result | WLAN_MASK);
-		else
-			value = (u8) (result & ~WLAN_MASK);
-		ec_write(COMPAL_EC_COMMAND_WIRELESS, value);
-	}
+	if (!blocked)
+		value = (u8) (result | radio);
+	else
+		value = (u8) (result & ~radio);
+	ec_write(COMPAL_EC_COMMAND_WIRELESS, value);
 
 	return 0;
 }
 
-static int set_bluetooth_state(int state)
+static void compal_rfkill_poll(struct rfkill *rfkill, void *data)
 {
-	u8 result, value;
+	u8 result;
+	bool hw_blocked;
 
 	ec_read(COMPAL_EC_COMMAND_WIRELESS, &result);
 
-	if ((result & KILLSWITCH_MASK) == 0)
-		return -EINVAL;
-	else {
-		if (state)
-			value = (u8) (result | BT_MASK);
-		else
-			value = (u8) (result & ~BT_MASK);
-		ec_write(COMPAL_EC_COMMAND_WIRELESS, value);
-	}
-
-	return 0;
+	hw_blocked = !(result & KILLSWITCH_MASK);
+	rfkill_set_hw_state(rfkill, hw_blocked);
 }
 
-static int get_wireless_state(int *wlan, int *bluetooth)
+static const struct rfkill_ops compal_rfkill_ops = {
+	.poll = compal_rfkill_poll,
+	.set_block = compal_rfkill_set,
+};
+
+static int setup_rfkill(void)
 {
-	u8 result;
+	int ret;
 
-	ec_read(COMPAL_EC_COMMAND_WIRELESS, &result);
+	wifi_rfkill = rfkill_alloc("compal-wifi", &compal_device->dev,
+				RFKILL_TYPE_WLAN, &compal_rfkill_ops,
+				(void *) WLAN_MASK);
+	if (!wifi_rfkill)
+		return -ENOMEM;
 
-	if (wlan) {
-		if ((result & KILLSWITCH_MASK) == 0)
-			*wlan = 0;
-		else
-			*wlan = result & WLAN_MASK;
-	}
+	ret = rfkill_register(wifi_rfkill);
+	if (ret)
+		goto err_wifi;
 
-	if (bluetooth) {
-		if ((result & KILLSWITCH_MASK) == 0)
-			*bluetooth = 0;
-		else
-			*bluetooth = (result & BT_MASK) >> 1;
+	bt_rfkill = rfkill_alloc("compal-bluetooth", &compal_device->dev,
+				RFKILL_TYPE_BLUETOOTH, &compal_rfkill_ops,
+				(void *) BT_MASK);
+	if (!bt_rfkill) {
+		ret = -ENOMEM;
+		goto err_allocate_bt;
 	}
+	ret = rfkill_register(bt_rfkill);
+	if (ret)
+		goto err_register_bt;
 
 	return 0;
+
+err_register_bt:
+	rfkill_destroy(bt_rfkill);
+
+err_allocate_bt:
+	rfkill_unregister(wifi_rfkill);
+
+err_wifi:
+	rfkill_destroy(wifi_rfkill);
+
+	return ret;
 }
 
 /* Backlight device stuff */
@@ -170,86 +176,6 @@
 
 static struct backlight_device *compalbl_device;
 
-/* Platform device */
-
-static ssize_t show_wlan(struct device *dev,
-	struct device_attribute *attr, char *buf)
-{
-	int ret, enabled;
-
-	ret = get_wireless_state(&enabled, NULL);
-	if (ret < 0)
-		return ret;
-
-	return sprintf(buf, "%i\n", enabled);
-}
-
-static ssize_t show_raw(struct device *dev,
-	struct device_attribute *attr, char *buf)
-{
-	u8 result;
-
-	ec_read(COMPAL_EC_COMMAND_WIRELESS, &result);
-
-	return sprintf(buf, "%i\n", result);
-}
-
-static ssize_t show_bluetooth(struct device *dev,
-	struct device_attribute *attr, char *buf)
-{
-	int ret, enabled;
-
-	ret = get_wireless_state(NULL, &enabled);
-	if (ret < 0)
-		return ret;
-
-	return sprintf(buf, "%i\n", enabled);
-}
-
-static ssize_t store_wlan_state(struct device *dev,
-	struct device_attribute *attr, const char *buf, size_t count)
-{
-	int state, ret;
-
-	if (sscanf(buf, "%i", &state) != 1 || (state < 0 || state > 1))
-		return -EINVAL;
-
-	ret = set_wlan_state(state);
-	if (ret < 0)
-		return ret;
-
-	return count;
-}
-
-static ssize_t store_bluetooth_state(struct device *dev,
-	struct device_attribute *attr, const char *buf, size_t count)
-{
-	int state, ret;
-
-	if (sscanf(buf, "%i", &state) != 1 || (state < 0 || state > 1))
-		return -EINVAL;
-
-	ret = set_bluetooth_state(state);
-	if (ret < 0)
-		return ret;
-
-	return count;
-}
-
-static DEVICE_ATTR(bluetooth, 0644, show_bluetooth, store_bluetooth_state);
-static DEVICE_ATTR(wlan, 0644, show_wlan, store_wlan_state);
-static DEVICE_ATTR(raw, 0444, show_raw, NULL);
-
-static struct attribute *compal_attributes[] = {
-	&dev_attr_bluetooth.attr,
-	&dev_attr_wlan.attr,
-	&dev_attr_raw.attr,
-	NULL
-};
-
-static struct attribute_group compal_attribute_group = {
-	.attrs = compal_attributes
-};
 
 static struct platform_driver compal_driver = {
 	.driver = {
@@ -258,8 +184,6 @@
 	}
 };
 
-static struct platform_device *compal_device;
-
 /* Initialization */
 
 static int dmi_check_cb(const struct dmi_system_id *id)
@@ -311,6 +235,47 @@
 		},
 		.callback = dmi_check_cb
 	},
+	{
+		.ident = "Dell Mini 9",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 910"),
+		},
+		.callback = dmi_check_cb
+	},
+	{
+		.ident = "Dell Mini 10",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 1010"),
+		},
+		.callback = dmi_check_cb
+	},
+	{
+		.ident = "Dell Mini 10v",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 1011"),
+		},
+		.callback = dmi_check_cb
+	},
+	{
+		.ident = "Dell Inspiron 11z",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 1110"),
+		},
+		.callback = dmi_check_cb
+	},
+	{
+		.ident = "Dell Mini 12",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 1210"),
+		},
+		.callback = dmi_check_cb
+	},
+
 	{ }
 };
 
@@ -349,23 +314,21 @@
 
 	ret = platform_device_add(compal_device);
 	if (ret)
-		goto fail_platform_device1;
+		goto fail_platform_device;
 
-	ret = sysfs_create_group(&compal_device->dev.kobj,
-		&compal_attribute_group);
+	ret = setup_rfkill();
 	if (ret)
-		goto fail_platform_device2;
+		goto fail_rfkill;
 
 	printk(KERN_INFO "compal-laptop: driver "COMPAL_DRIVER_VERSION
 		" successfully loaded.\n");
 
 	return 0;
 
-fail_platform_device2:
-
+fail_rfkill:
 	platform_device_del(compal_device);
 
-fail_platform_device1:
+fail_platform_device:
 
 	platform_device_put(compal_device);
 
@@ -383,10 +346,13 @@
 static void __exit compal_cleanup(void)
 {
 
-	sysfs_remove_group(&compal_device->dev.kobj, &compal_attribute_group);
 	platform_device_unregister(compal_device);
 	platform_driver_unregister(&compal_driver);
 	backlight_device_unregister(compalbl_device);
+	rfkill_unregister(wifi_rfkill);
+	rfkill_destroy(wifi_rfkill);
+	rfkill_unregister(bt_rfkill);
+	rfkill_destroy(bt_rfkill);
 
 	printk(KERN_INFO "compal-laptop: driver unloaded.\n");
 }
@@ -404,3 +370,8 @@
 MODULE_ALIAS("dmi:*:rnIFL91:rvrIFT00:*");
 MODULE_ALIAS("dmi:*:rnJFL92:rvrIFT00:*");
 MODULE_ALIAS("dmi:*:rnIFT00:rvrIFT00:*");
+MODULE_ALIAS("dmi:*:svnDellInc.:pnInspiron910:*");
+MODULE_ALIAS("dmi:*:svnDellInc.:pnInspiron1010:*");
+MODULE_ALIAS("dmi:*:svnDellInc.:pnInspiron1011:*");
+MODULE_ALIAS("dmi:*:svnDellInc.:pnInspiron1110:*");
+MODULE_ALIAS("dmi:*:svnDellInc.:pnInspiron1210:*");
--- linux-mvl-dove-2.6.32.orig/drivers/input/evdev.c
+++ linux-mvl-dove-2.6.32/drivers/input/evdev.c
@@ -20,6 +20,7 @@
 #include <linux/input.h>
 #include <linux/major.h>
 #include <linux/device.h>
+#include <linux/wakelock.h>
 #include "input-compat.h"
 
 struct evdev {
@@ -29,6 +30,7 @@
 	struct input_handle handle;
 	wait_queue_head_t wait;
 	struct evdev_client *grab;
+	int grab_exclusive;
 	struct list_head client_list;
 	spinlock_t client_lock; /* protects client_list */
 	struct mutex mutex;
@@ -43,6 +45,7 @@
 	struct fasync_struct *fasync;
 	struct evdev *evdev;
 	struct list_head node;
+	struct wake_lock wake_lock;
 };
 
 static struct evdev *evdev_table[EVDEV_MINORS];
@@ -55,6 +58,7 @@
 	 * Interrupts are disabled, just acquire the lock
 	 */
 	spin_lock(&client->buffer_lock);
+	wake_lock_timeout(&client->wake_lock, 5 * HZ);
 	client->buffer[client->head++] = *event;
 	client->head &= EVDEV_BUFFER_SIZE - 1;
 	spin_unlock(&client->buffer_lock);
@@ -71,8 +75,11 @@
 	struct evdev *evdev = handle->private;
 	struct evdev_client *client;
 	struct input_event event;
+	struct timespec ts;
 
-	do_gettimeofday(&event.time);
+	ktime_get_ts(&ts);
+	event.time.tv_sec = ts.tv_sec;
+	event.time.tv_usec = ts.tv_nsec / NSEC_PER_USEC;
 	event.type = type;
 	event.code = code;
 	event.value = value;
@@ -80,7 +87,7 @@
 	rcu_read_lock();
 
 	client = rcu_dereference(evdev->grab);
-	if (client)
+	if (client && evdev->grab_exclusive)
 		evdev_pass_event(client, &event);
 	else
 		list_for_each_entry_rcu(client, &evdev->client_list, node)
@@ -154,6 +161,7 @@
 	rcu_assign_pointer(evdev->grab, NULL);
 	synchronize_rcu();
 	input_release_device(&evdev->handle);
+	evdev->grab_exclusive = 0;
 
 	return 0;
 }
@@ -233,6 +241,7 @@
 	mutex_unlock(&evdev->mutex);
 
 	evdev_detach_client(evdev, client);
+	wake_lock_destroy(&client->wake_lock);
 	kfree(client);
 
 	evdev_close_device(evdev);
@@ -269,6 +278,7 @@
 	}
 
 	spin_lock_init(&client->buffer_lock);
+	wake_lock_init(&client->wake_lock, WAKE_LOCK_SUSPEND, "evdev");
 	client->evdev = evdev;
 	evdev_attach_client(evdev, client);
 
@@ -332,6 +342,8 @@
 	if (have_event) {
 		*event = client->buffer[client->tail++];
 		client->tail &= EVDEV_BUFFER_SIZE - 1;
+		if (client->head == client->tail)
+			wake_unlock(&client->wake_lock);
 	}
 
 	spin_unlock_irq(&client->buffer_lock);
@@ -577,8 +589,14 @@
 		return 0;
 
 	case EVIOCGRAB:
+
 		if (p)
-			return evdev_grab(evdev, client);
+		{
+			error = evdev_grab(evdev, client);
+			if(error == 0)
+				evdev->grab_exclusive = ((long)p == 1);
+			return error;
+		}
 		else
 			return evdev_ungrab(evdev, client);
 
--- linux-mvl-dove-2.6.32.orig/drivers/input/joydev.c
+++ linux-mvl-dove-2.6.32/drivers/input/joydev.c
@@ -481,6 +481,9 @@
 
 	memcpy(joydev->abspam, abspam, len);
 
+	for (i = 0; i < joydev->nabs; i++)
+		joydev->absmap[joydev->abspam[i]] = i;
+
  out:
 	kfree(abspam);
 	return retval;
--- linux-mvl-dove-2.6.32.orig/drivers/input/keyreset.c
+++ linux-mvl-dove-2.6.32/drivers/input/keyreset.c
@@ -0,0 +1,229 @@
+/* drivers/input/keyreset.c
+ *
+ * Copyright (C) 2008 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/input.h>
+#include <linux/keyreset.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/reboot.h>
+#include <linux/sched.h>
+#include <linux/syscalls.h>
+
+
+struct keyreset_state {
+	struct input_handler input_handler;
+	unsigned long keybit[BITS_TO_LONGS(KEY_CNT)];
+	unsigned long upbit[BITS_TO_LONGS(KEY_CNT)];
+	unsigned long key[BITS_TO_LONGS(KEY_CNT)];
+	spinlock_t lock;
+	int key_down_target;
+	int key_down;
+	int key_up;
+	int restart_disabled;
+};
+
+int restart_requested;
+static void deferred_restart(struct work_struct *dummy)
+{
+	restart_requested = 2;
+	sys_sync();
+	restart_requested = 3;
+	kernel_restart(NULL);
+}
+static DECLARE_WORK(restart_work, deferred_restart);
+
+static void keyreset_event(struct input_handle *handle, unsigned int type,
+			   unsigned int code, int value)
+{
+	unsigned long flags;
+	struct keyreset_state *state = handle->private;
+
+	if (type != EV_KEY)
+		return;
+
+	if (code >= KEY_MAX)
+		return;
+
+	if (!test_bit(code, state->keybit))
+		return;
+
+	spin_lock_irqsave(&state->lock, flags);
+	if (!test_bit(code, state->key) == !value)
+		goto done;
+	__change_bit(code, state->key);
+	if (test_bit(code, state->upbit)) {
+		if (value) {
+			state->restart_disabled = 1;
+			state->key_up++;
+		} else
+			state->key_up--;
+	} else {
+		if (value)
+			state->key_down++;
+		else
+			state->key_down--;
+	}
+	if (state->key_down == 0 && state->key_up == 0)
+		state->restart_disabled = 0;
+
+	pr_debug("reset key changed %d %d new state %d-%d-%d\n", code, value,
+		 state->key_down, state->key_up, state->restart_disabled);
+
+	if (value && !state->restart_disabled &&
+	    state->key_down == state->key_down_target) {
+		state->restart_disabled = 1;
+		if (restart_requested)
+			panic("keyboard reset failed, %d", restart_requested);
+		pr_info("keyboard reset\n");
+		schedule_work(&restart_work);
+		restart_requested = 1;
+	}
+done:
+	spin_unlock_irqrestore(&state->lock, flags);
+}
+
+static int keyreset_connect(struct input_handler *handler,
+					  struct input_dev *dev,
+					  const struct input_device_id *id)
+{
+	int i;
+	int ret;
+	struct input_handle *handle;
+	struct keyreset_state *state =
+		container_of(handler, struct keyreset_state, input_handler);
+
+	for (i = 0; i < KEY_MAX; i++) {
+		if (test_bit(i, state->keybit) && test_bit(i, dev->keybit))
+			break;
+	}
+	if (i == KEY_MAX)
+		return -ENODEV;
+
+	handle = kzalloc(sizeof(*handle), GFP_KERNEL);
+	if (!handle)
+		return -ENOMEM;
+
+	handle->dev = dev;
+	handle->handler = handler;
+	handle->name = "keyreset";
+	handle->private = state;
+
+	ret = input_register_handle(handle);
+	if (ret)
+		goto err_input_register_handle;
+
+	ret = input_open_device(handle);
+	if (ret)
+		goto err_input_open_device;
+
+	pr_info("using input dev %s for key reset\n", dev->name);
+
+	return 0;
+
+err_input_open_device:
+	input_unregister_handle(handle);
+err_input_register_handle:
+	kfree(handle);
+	return ret;
+}
+
+static void keyreset_disconnect(struct input_handle *handle)
+{
+	input_close_device(handle);
+	input_unregister_handle(handle);
+	kfree(handle);
+}
+
+static const struct input_device_id keyreset_ids[] = {
+	{
+		.flags = INPUT_DEVICE_ID_MATCH_EVBIT,
+		.evbit = { BIT_MASK(EV_KEY) },
+	},
+	{ },
+};
+MODULE_DEVICE_TABLE(input, keyreset_ids);
+
+static int keyreset_probe(struct platform_device *pdev)
+{
+	int ret;
+	int key, *keyp;
+	struct keyreset_state *state;
+	struct keyreset_platform_data *pdata = pdev->dev.platform_data;
+
+	if (!pdata)
+		return -EINVAL;
+
+	state = kzalloc(sizeof(*state), GFP_KERNEL);
+	if (!state)
+		return -ENOMEM;
+
+	spin_lock_init(&state->lock);
+	keyp = pdata->keys_down;
+	while ((key = *keyp++)) {
+		if (key >= KEY_MAX)
+			continue;
+		state->key_down_target++;
+		__set_bit(key, state->keybit);
+	}
+	if (pdata->keys_up) {
+		keyp = pdata->keys_up;
+		while ((key = *keyp++)) {
+			if (key >= KEY_MAX)
+				continue;
+			__set_bit(key, state->keybit);
+			__set_bit(key, state->upbit);
+		}
+	}
+	state->input_handler.event = keyreset_event;
+	state->input_handler.connect = keyreset_connect;
+	state->input_handler.disconnect = keyreset_disconnect;
+	state->input_handler.name = KEYRESET_NAME;
+	state->input_handler.id_table = keyreset_ids;
+	ret = input_register_handler(&state->input_handler);
+	if (ret) {
+		kfree(state);
+		return ret;
+	}
+	platform_set_drvdata(pdev, state);
+	return 0;
+}
+
+int keyreset_remove(struct platform_device *pdev)
+{
+	struct keyreset_state *state = platform_get_drvdata(pdev);
+	input_unregister_handler(&state->input_handler);
+	kfree(state);
+	return 0;
+}
+
+
+struct platform_driver keyreset_driver = {
+	.driver.name = KEYRESET_NAME,
+	.probe = keyreset_probe,
+	.remove = keyreset_remove,
+};
+
+static int __init keyreset_init(void)
+{
+	return platform_driver_register(&keyreset_driver);
+}
+
+static void __exit keyreset_exit(void)
+{
+	return platform_driver_unregister(&keyreset_driver);
+}
+
+module_init(keyreset_init);
+module_exit(keyreset_exit);
--- linux-mvl-dove-2.6.32.orig/drivers/input/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/input/Kconfig
@@ -149,6 +149,15 @@
 	  To compile this driver as a module, choose M here: the
 	  module will be called apm-power.
 
+config INPUT_KEYRESET
+	tristate "Reset key"
+	depends on INPUT
+	---help---
+	  Say Y here if you want to reboot when some keys are pressed;
+
+	  To compile this driver as a module, choose M here: the
+	  module will be called keyreset.
+
 config XEN_KBDDEV_FRONTEND
 	tristate "Xen virtual keyboard and mouse support"
 	depends on XEN_FBDEV_FRONTEND
--- linux-mvl-dove-2.6.32.orig/drivers/input/Makefile
+++ linux-mvl-dove-2.6.32/drivers/input/Makefile
@@ -23,5 +23,6 @@
 obj-$(CONFIG_INPUT_MISC)	+= misc/
 
 obj-$(CONFIG_INPUT_APMPOWER)	+= apm-power.o
+obj-$(CONFIG_INPUT_KEYRESET)	+= keyreset.o
 
 obj-$(CONFIG_XEN_KBDDEV_FRONTEND)	+= xen-kbdfront.o
--- linux-mvl-dove-2.6.32.orig/drivers/input/input-polldev.c
+++ linux-mvl-dove-2.6.32/drivers/input/input-polldev.c
@@ -68,7 +68,8 @@
 	if (delay >= HZ)
 		delay = round_jiffies_relative(delay);
 
-	queue_delayed_work(polldev_wq, &dev->work, delay);
+	if (!dev->stop)
+		queue_delayed_work(polldev_wq, &dev->work, delay);
 }
 
 static int input_open_polled_device(struct input_dev *input)
@@ -97,6 +98,28 @@
 	input_polldev_stop_workqueue();
 }
 
+void input_stop_polled_device(struct input_dev *input)
+{
+	struct input_polled_dev *dev = input_get_drvdata(input);
+
+	dev->stop = 1;
+}
+
+int input_resume_polled_device(struct input_dev *input)
+{
+	struct input_polled_dev *dev = input_get_drvdata(input);
+
+	dev->stop = 0;
+
+	if (dev->flush)
+		dev->flush(dev);
+
+	queue_delayed_work(polldev_wq, &dev->work,
+			   msecs_to_jiffies(dev->poll_interval));
+
+	return 0;
+}
+
 /**
  * input_allocate_polled_device - allocated memory polled device
  *
@@ -157,7 +180,7 @@
 		dev->poll_interval = 500;
 	input->open = input_open_polled_device;
 	input->close = input_close_polled_device;
-
+	dev->stop = 0;
 	return input_register_device(input);
 }
 EXPORT_SYMBOL(input_register_polled_device);
--- linux-mvl-dove-2.6.32.orig/drivers/input/xen-kbdfront.c
+++ linux-mvl-dove-2.6.32/drivers/input/xen-kbdfront.c
@@ -105,7 +105,7 @@
 static int __devinit xenkbd_probe(struct xenbus_device *dev,
 				  const struct xenbus_device_id *id)
 {
-	int ret, i;
+	int ret, i, abs;
 	struct xenkbd_info *info;
 	struct input_dev *kbd, *ptr;
 
@@ -123,6 +123,11 @@
 	if (!info->page)
 		goto error_nomem;
 
+	if (xenbus_scanf(XBT_NIL, dev->otherend, "feature-abs-pointer", "%d", &abs) < 0)
+		abs = 0;
+	if (abs)
+		xenbus_printf(XBT_NIL, dev->nodename, "request-abs-pointer", "1");
+
 	/* keyboard */
 	kbd = input_allocate_device();
 	if (!kbd)
@@ -132,11 +137,12 @@
 	kbd->id.bustype = BUS_PCI;
 	kbd->id.vendor = 0x5853;
 	kbd->id.product = 0xffff;
-	kbd->evbit[0] = BIT(EV_KEY);
+
+	__set_bit(EV_KEY, kbd->evbit);
 	for (i = KEY_ESC; i < KEY_UNKNOWN; i++)
-		set_bit(i, kbd->keybit);
+		__set_bit(i, kbd->keybit);
 	for (i = KEY_OK; i < KEY_MAX; i++)
-		set_bit(i, kbd->keybit);
+		__set_bit(i, kbd->keybit);
 
 	ret = input_register_device(kbd);
 	if (ret) {
@@ -155,12 +161,20 @@
 	ptr->id.bustype = BUS_PCI;
 	ptr->id.vendor = 0x5853;
 	ptr->id.product = 0xfffe;
-	ptr->evbit[0] = BIT(EV_KEY) | BIT(EV_REL) | BIT(EV_ABS);
+
+	if (abs) {
+		__set_bit(EV_ABS, ptr->evbit);
+		input_set_abs_params(ptr, ABS_X, 0, XENFB_WIDTH, 0, 0);
+		input_set_abs_params(ptr, ABS_Y, 0, XENFB_HEIGHT, 0, 0);
+	} else {
+		input_set_capability(ptr, EV_REL, REL_X);
+		input_set_capability(ptr, EV_REL, REL_Y);
+	}
+	input_set_capability(ptr, EV_REL, REL_WHEEL);
+
+	__set_bit(EV_KEY, ptr->evbit);
 	for (i = BTN_LEFT; i <= BTN_TASK; i++)
-		set_bit(i, ptr->keybit);
-	ptr->relbit[0] = BIT(REL_X) | BIT(REL_Y) | BIT(REL_WHEEL);
-	input_set_abs_params(ptr, ABS_X, 0, XENFB_WIDTH, 0, 0);
-	input_set_abs_params(ptr, ABS_Y, 0, XENFB_HEIGHT, 0, 0);
+		__set_bit(i, ptr->keybit);
 
 	ret = input_register_device(ptr);
 	if (ret) {
@@ -286,8 +300,7 @@
 			ret = xenbus_printf(XBT_NIL, info->xbdev->nodename,
 					    "request-abs-pointer", "1");
 			if (ret)
-				printk(KERN_WARNING
-				       "xenkbd: can't request abs-pointer");
+				pr_warning("can't request abs-pointer\n");
 		}
 		xenbus_switch_state(dev, XenbusStateConnected);
 		break;
--- linux-mvl-dove-2.6.32.orig/drivers/input/input.c
+++ linux-mvl-dove-2.6.32/drivers/input/input.c
@@ -24,6 +24,7 @@
 #include <linux/mutex.h>
 #include <linux/rcupdate.h>
 #include <linux/smp_lock.h>
+#include "input-compat.h"
 
 MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
 MODULE_DESCRIPTION("Input core");
@@ -45,6 +46,7 @@
 	ABS_MT_TOOL_TYPE,
 	ABS_MT_BLOB_ID,
 	ABS_MT_TRACKING_ID,
+	ABS_MT_PRESSURE,
 	0
 };
 static unsigned long input_abs_bypass[BITS_TO_LONGS(ABS_CNT)];
@@ -90,19 +92,26 @@
  */
 static void input_pass_event(struct input_dev *dev,
 			     unsigned int type, unsigned int code, int value)
-{
-	struct input_handle *handle;
+
+{	struct input_handle *handle;
 
 	rcu_read_lock();
 
 	handle = rcu_dereference(dev->grab);
-	if (handle)
+	if (handle) {
 		handle->handler->event(handle, type, code, value);
-	else
-		list_for_each_entry_rcu(handle, &dev->h_list, d_node)
-			if (handle->open)
-				handle->handler->event(handle,
-							type, code, value);
+		goto out;
+	}
+
+	handle = rcu_dereference(dev->filter);
+	if (handle && handle->handler->filter(handle, type, code, value))
+		goto out;
+
+	list_for_each_entry_rcu(handle, &dev->h_list, d_node)
+		if (handle->open)
+			handle->handler->event(handle,
+					       type, code, value);
+out:
 	rcu_read_unlock();
 }
 
@@ -377,12 +386,15 @@
 }
 EXPORT_SYMBOL(input_grab_device);
 
-static void __input_release_device(struct input_handle *handle)
+static void __input_release_device(struct input_handle *handle, bool filter)
 {
 	struct input_dev *dev = handle->dev;
 
-	if (dev->grab == handle) {
-		rcu_assign_pointer(dev->grab, NULL);
+	if (handle == (filter ? dev->filter : dev->grab)) {
+		if (filter)
+			rcu_assign_pointer(dev->filter, NULL);
+		else
+			rcu_assign_pointer(dev->grab, NULL);
 		/* Make sure input_pass_event() notices that grab is gone */
 		synchronize_rcu();
 
@@ -406,12 +418,65 @@
 	struct input_dev *dev = handle->dev;
 
 	mutex_lock(&dev->mutex);
-	__input_release_device(handle);
+	__input_release_device(handle, false);
 	mutex_unlock(&dev->mutex);
 }
 EXPORT_SYMBOL(input_release_device);
 
 /**
+ * input_filter_device - allow input events to be filtered from higher layers
+ * @handle: input handle that wants to filter the device
+ *
+ * When a device is filtered by an input handle all events generated by
+ * the device are to this handle. If the filter function returns true then
+ * the event is discarded rather than being passed to any other input handles,
+ * otherwise it is passed to them as normal. Grabs will be handled before
+ * filters, so a grabbed device will not deliver events to a filter function.
+ */
+int input_filter_device(struct input_handle *handle)
+{
+	struct input_dev *dev = handle->dev;
+	int retval;
+
+	retval = mutex_lock_interruptible(&dev->mutex);
+	if (retval)
+		return retval;
+
+	if (dev->filter) {
+		retval = -EBUSY;
+		goto out;
+	}
+
+	rcu_assign_pointer(dev->filter, handle);
+	synchronize_rcu();
+
+ out:
+	mutex_unlock(&dev->mutex);
+	return retval;
+}
+EXPORT_SYMBOL(input_filter_device);
+
+/**
+ * input_unfilter_device - removes a filter from a device
+ * @handle: input handle that owns the device
+ *
+ * Removes the filter from a device so that other input handles can
+ * start receiving unfiltered input events. Upon release all handlers
+ * attached to the device have their start() method called so they
+ * have a change to synchronize device state with the rest of the
+ * system.
+ */
+void input_unfilter_device(struct input_handle *handle)
+{
+	struct input_dev *dev = handle->dev;
+
+	mutex_lock(&dev->mutex);
+	__input_release_device(handle, true);
+	mutex_unlock(&dev->mutex);
+}
+EXPORT_SYMBOL(input_unfilter_device);
+
+/**
  * input_open_device - open input device
  * @handle: handle through which device is being accessed
  *
@@ -484,7 +549,9 @@
 
 	mutex_lock(&dev->mutex);
 
-	__input_release_device(handle);
+	/* Release both grabs and filters */
+	__input_release_device(handle, false);
+	__input_release_device(handle, true);
 
 	if (!--dev->users && dev->close)
 		dev->close(dev);
@@ -758,6 +825,40 @@
 	return error;
 }
 
+#ifdef CONFIG_COMPAT
+
+static int input_bits_to_string(char *buf, int buf_size,
+				unsigned long bits, bool skip_empty)
+{
+	int len = 0;
+
+	if (INPUT_COMPAT_TEST) {
+		u32 dword = bits >> 32;
+		if (dword || !skip_empty)
+			len += snprintf(buf, buf_size, "%x ", dword);
+
+		dword = bits & 0xffffffffUL;
+		if (dword || !skip_empty || len)
+			len += snprintf(buf + len, max(buf_size - len, 0),
+					"%x", dword);
+	} else {
+		if (bits || !skip_empty)
+			len += snprintf(buf, buf_size, "%lx", bits);
+	}
+
+	return len;
+}
+
+#else /* !CONFIG_COMPAT */
+
+static int input_bits_to_string(char *buf, int buf_size,
+				unsigned long bits, bool skip_empty)
+{
+	return bits || !skip_empty ?
+		snprintf(buf, buf_size, "%lx", bits) : 0;
+}
+
+#endif
 
 #ifdef CONFIG_PROC_FS
 
@@ -826,14 +927,25 @@
 				   unsigned long *bitmap, int max)
 {
 	int i;
-
-	for (i = BITS_TO_LONGS(max) - 1; i > 0; i--)
-		if (bitmap[i])
-			break;
+	bool skip_empty = true;
+	char buf[18];
 
 	seq_printf(seq, "B: %s=", name);
-	for (; i >= 0; i--)
-		seq_printf(seq, "%lx%s", bitmap[i], i > 0 ? " " : "");
+
+	for (i = BITS_TO_LONGS(max) - 1; i >= 0; i--) {
+		if (input_bits_to_string(buf, sizeof(buf),
+					 bitmap[i], skip_empty)) {
+			skip_empty = false;
+			seq_printf(seq, "%s%s", buf, i > 0 ? " " : "");
+		}
+	}
+
+	/*
+	 * If no output was produced print a single 0.
+	 */
+	if (skip_empty)
+		seq_puts(seq, "0");
+
 	seq_putc(seq, '\n');
 }
 
@@ -1122,14 +1234,23 @@
 {
 	int i;
 	int len = 0;
+	bool skip_empty = true;
 
-	for (i = BITS_TO_LONGS(max) - 1; i > 0; i--)
-		if (bitmap[i])
-			break;
+	for (i = BITS_TO_LONGS(max) - 1; i >= 0; i--) {
+		len += input_bits_to_string(buf + len, max(buf_size - len, 0),
+					    bitmap[i], skip_empty);
+		if (len) {
+			skip_empty = false;
+			if (i > 0)
+				len += snprintf(buf + len, max(buf_size - len, 0), " ");
+		}
+	}
 
-	for (; i >= 0; i--)
-		len += snprintf(buf + len, max(buf_size - len, 0),
-				"%lx%s", bitmap[i], i > 0 ? " " : "");
+	/*
+	 * If no output was produced print a single 0.
+	 */
+	if (len == 0)
+		len = snprintf(buf, buf_size, "%d", 0);
 
 	if (add_cr)
 		len += snprintf(buf + len, max(buf_size - len, 0), "\n");
@@ -1144,7 +1265,8 @@
 {									\
 	struct input_dev *input_dev = to_input_dev(dev);		\
 	int len = input_print_bitmap(buf, PAGE_SIZE,			\
-				     input_dev->bm##bit, ev##_MAX, 1);	\
+				     input_dev->bm##bit, ev##_MAX,	\
+				     true);				\
 	return min_t(int, len, PAGE_SIZE);				\
 }									\
 static DEVICE_ATTR(bm, S_IRUGO, input_dev_show_cap_##bm, NULL)
@@ -1208,7 +1330,7 @@
 
 	len = input_print_bitmap(&env->buf[env->buflen - 1],
 				 sizeof(env->buf) - env->buflen,
-				 bitmap, max, 0);
+				 bitmap, max, false);
 	if (len >= (sizeof(env->buf) - env->buflen))
 		return -ENOMEM;
 
--- linux-mvl-dove-2.6.32.orig/drivers/input/misc/gpio_input.c
+++ linux-mvl-dove-2.6.32/drivers/input/misc/gpio_input.c
@@ -0,0 +1,343 @@
+/* drivers/input/misc/gpio_input.c
+ *
+ * Copyright (C) 2007 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/gpio.h>
+#include <linux/gpio_event.h>
+#include <linux/hrtimer.h>
+#include <linux/input.h>
+#include <linux/interrupt.h>
+#include <linux/wakelock.h>
+
+enum {
+	DEBOUNCE_UNSTABLE     = BIT(0),	/* Got irq, while debouncing */
+	DEBOUNCE_PRESSED      = BIT(1),
+	DEBOUNCE_NOTPRESSED   = BIT(2),
+	DEBOUNCE_WAIT_IRQ     = BIT(3),	/* Stable irq state */
+	DEBOUNCE_POLL         = BIT(4),	/* Stable polling state */
+
+	DEBOUNCE_UNKNOWN =
+		DEBOUNCE_PRESSED | DEBOUNCE_NOTPRESSED,
+};
+
+struct gpio_key_state {
+	struct gpio_input_state *ds;
+	uint8_t debounce;
+};
+
+struct gpio_input_state {
+	struct input_dev *input_dev;
+	const struct gpio_event_input_info *info;
+	struct hrtimer timer;
+	int use_irq;
+	int debounce_count;
+	spinlock_t irq_lock;
+	struct wake_lock wake_lock;
+	struct gpio_key_state key_state[0];
+};
+
+static enum hrtimer_restart gpio_event_input_timer_func(struct hrtimer *timer)
+{
+	int i;
+	int pressed;
+	struct gpio_input_state *ds =
+		container_of(timer, struct gpio_input_state, timer);
+	unsigned gpio_flags = ds->info->flags;
+	unsigned npolarity;
+	int nkeys = ds->info->keymap_size;
+	const struct gpio_event_direct_entry *key_entry;
+	struct gpio_key_state *key_state;
+	unsigned long irqflags;
+	uint8_t debounce;
+
+#if 0
+	key_entry = kp->keys_info->keymap;
+	key_state = kp->key_state;
+	for (i = 0; i < nkeys; i++, key_entry++, key_state++)
+		pr_info("gpio_read_detect_status %d %d\n", key_entry->gpio,
+			gpio_read_detect_status(key_entry->gpio));
+#endif
+	key_entry = ds->info->keymap;
+	key_state = ds->key_state;
+	spin_lock_irqsave(&ds->irq_lock, irqflags);
+	for (i = 0; i < nkeys; i++, key_entry++, key_state++) {
+		debounce = key_state->debounce;
+		if (debounce & DEBOUNCE_WAIT_IRQ)
+			continue;
+		if (key_state->debounce & DEBOUNCE_UNSTABLE) {
+			debounce = key_state->debounce = DEBOUNCE_UNKNOWN;
+			enable_irq(gpio_to_irq(key_entry->gpio));
+			pr_info("gpio_keys_scan_keys: key %x-%x, %d "
+				"(%d) continue debounce\n",
+				ds->info->type, key_entry->code,
+				i, key_entry->gpio);
+		}
+		npolarity = !(gpio_flags & GPIOEDF_ACTIVE_HIGH);
+		pressed = gpio_get_value(key_entry->gpio) ^ npolarity;
+		if (debounce & DEBOUNCE_POLL) {
+			if (pressed == !(debounce & DEBOUNCE_PRESSED)) {
+				ds->debounce_count++;
+				key_state->debounce = DEBOUNCE_UNKNOWN;
+				if (gpio_flags & GPIOEDF_PRINT_KEY_DEBOUNCE)
+					pr_info("gpio_keys_scan_keys: key %x-"
+						"%x, %d (%d) start debounce\n",
+						ds->info->type, key_entry->code,
+						i, key_entry->gpio);
+			}
+			continue;
+		}
+		if (pressed && (debounce & DEBOUNCE_NOTPRESSED)) {
+			if (gpio_flags & GPIOEDF_PRINT_KEY_DEBOUNCE)
+				pr_info("gpio_keys_scan_keys: key %x-%x, %d "
+					"(%d) debounce pressed 1\n",
+					ds->info->type, key_entry->code,
+					i, key_entry->gpio);
+			key_state->debounce = DEBOUNCE_PRESSED;
+			continue;
+		}
+		if (!pressed && (debounce & DEBOUNCE_PRESSED)) {
+			if (gpio_flags & GPIOEDF_PRINT_KEY_DEBOUNCE)
+				pr_info("gpio_keys_scan_keys: key %x-%x, %d "
+					"(%d) debounce pressed 0\n",
+					ds->info->type, key_entry->code,
+					i, key_entry->gpio);
+			key_state->debounce = DEBOUNCE_NOTPRESSED;
+			continue;
+		}
+		/* key is stable */
+		ds->debounce_count--;
+		if (ds->use_irq)
+			key_state->debounce |= DEBOUNCE_WAIT_IRQ;
+		else
+			key_state->debounce |= DEBOUNCE_POLL;
+		if (gpio_flags & GPIOEDF_PRINT_KEYS)
+			pr_info("gpio_keys_scan_keys: key %x-%x, %d (%d) "
+				"changed to %d\n", ds->info->type,
+				key_entry->code, i, key_entry->gpio, pressed);
+		input_event(ds->input_dev, ds->info->type,
+			    key_entry->code, pressed);
+	}
+
+#if 0
+	key_entry = kp->keys_info->keymap;
+	key_state = kp->key_state;
+	for (i = 0; i < nkeys; i++, key_entry++, key_state++) {
+		pr_info("gpio_read_detect_status %d %d\n", key_entry->gpio,
+			gpio_read_detect_status(key_entry->gpio));
+	}
+#endif
+
+	if (ds->debounce_count)
+		hrtimer_start(timer, ds->info->debounce_time, HRTIMER_MODE_REL);
+	else if (!ds->use_irq)
+		hrtimer_start(timer, ds->info->poll_time, HRTIMER_MODE_REL);
+	else
+		wake_unlock(&ds->wake_lock);
+
+	spin_unlock_irqrestore(&ds->irq_lock, irqflags);
+
+	return HRTIMER_NORESTART;
+}
+
+static irqreturn_t gpio_event_input_irq_handler(int irq, void *dev_id)
+{
+	struct gpio_key_state *ks = dev_id;
+	struct gpio_input_state *ds = ks->ds;
+	int keymap_index = ks - ds->key_state;
+	const struct gpio_event_direct_entry *key_entry;
+	unsigned long irqflags;
+	int pressed;
+
+	if (!ds->use_irq)
+		return IRQ_HANDLED;
+
+	key_entry = &ds->info->keymap[keymap_index];
+
+	if (ds->info->debounce_time.tv64) {
+		spin_lock_irqsave(&ds->irq_lock, irqflags);
+		if (ks->debounce & DEBOUNCE_WAIT_IRQ) {
+			ks->debounce = DEBOUNCE_UNKNOWN;
+			if (ds->debounce_count++ == 0) {
+				wake_lock(&ds->wake_lock);
+				hrtimer_start(
+					&ds->timer, ds->info->debounce_time,
+					HRTIMER_MODE_REL);
+			}
+			if (ds->info->flags & GPIOEDF_PRINT_KEY_DEBOUNCE)
+				pr_info("gpio_event_input_irq_handler: "
+					"key %x-%x, %d (%d) start debounce\n",
+					ds->info->type, key_entry->code,
+					keymap_index, key_entry->gpio);
+		} else {
+			disable_irq(irq);
+			ks->debounce = DEBOUNCE_UNSTABLE;
+		}
+		spin_unlock_irqrestore(&ds->irq_lock, irqflags);
+	} else {
+		pressed = gpio_get_value(key_entry->gpio) ^
+			!(ds->info->flags & GPIOEDF_ACTIVE_HIGH);
+		if (ds->info->flags & GPIOEDF_PRINT_KEYS)
+			pr_info("gpio_event_input_irq_handler: key %x-%x, %d "
+				"(%d) changed to %d\n",
+				ds->info->type, key_entry->code, keymap_index,
+				key_entry->gpio, pressed);
+		input_event(ds->input_dev, ds->info->type,
+			    key_entry->code, pressed);
+	}
+	return IRQ_HANDLED;
+}
+
+static int gpio_event_input_request_irqs(struct gpio_input_state *ds)
+{
+	int i;
+	int err;
+	unsigned int irq;
+	unsigned long req_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING;
+
+	for (i = 0; i < ds->info->keymap_size; i++) {
+		err = irq = gpio_to_irq(ds->info->keymap[i].gpio);
+		if (err < 0)
+			goto err_gpio_get_irq_num_failed;
+		err = request_irq(irq, gpio_event_input_irq_handler,
+				  req_flags, "gpio_keys", &ds->key_state[i]);
+		if (err) {
+			pr_err("gpio_event_input_request_irqs: request_irq "
+				"failed for input %d, irq %d\n",
+				ds->info->keymap[i].gpio, irq);
+			goto err_request_irq_failed;
+		}
+		enable_irq_wake(irq);
+	}
+	return 0;
+
+	for (i = ds->info->keymap_size - 1; i >= 0; i--) {
+		free_irq(gpio_to_irq(ds->info->keymap[i].gpio),
+			 &ds->key_state[i]);
+err_request_irq_failed:
+err_gpio_get_irq_num_failed:
+		;
+	}
+	return err;
+}
+
+int gpio_event_input_func(struct input_dev *input_dev,
+			struct gpio_event_info *info, void **data, int func)
+{
+	int ret;
+	int i;
+	unsigned long irqflags;
+	struct gpio_event_input_info *di;
+	struct gpio_input_state *ds = *data;
+
+	di = container_of(info, struct gpio_event_input_info, info);
+
+	if (func == GPIO_EVENT_FUNC_SUSPEND) {
+		spin_lock_irqsave(&ds->irq_lock, irqflags);
+		if (ds->use_irq)
+			for (i = 0; i < di->keymap_size; i++)
+				disable_irq(gpio_to_irq(di->keymap[i].gpio));
+		spin_unlock_irqrestore(&ds->irq_lock, irqflags);
+		hrtimer_cancel(&ds->timer);
+		return 0;
+	}
+	if (func == GPIO_EVENT_FUNC_RESUME) {
+		spin_lock_irqsave(&ds->irq_lock, irqflags);
+		if (ds->use_irq)
+			for (i = 0; i < di->keymap_size; i++)
+				enable_irq(gpio_to_irq(di->keymap[i].gpio));
+		hrtimer_start(&ds->timer, ktime_set(0, 0), HRTIMER_MODE_REL);
+		spin_unlock_irqrestore(&ds->irq_lock, irqflags);
+		return 0;
+	}
+
+	if (func == GPIO_EVENT_FUNC_INIT) {
+		if (ktime_to_ns(di->poll_time) <= 0)
+			di->poll_time = ktime_set(0, 20 * NSEC_PER_MSEC);
+
+		*data = ds = kzalloc(sizeof(*ds) + sizeof(ds->key_state[0]) *
+					di->keymap_size, GFP_KERNEL);
+		if (ds == NULL) {
+			ret = -ENOMEM;
+			pr_err("gpio_event_input_func: "
+				"Failed to allocate private data\n");
+			goto err_ds_alloc_failed;
+		}
+		ds->debounce_count = di->keymap_size;
+		ds->input_dev = input_dev;
+		ds->info = di;
+		wake_lock_init(&ds->wake_lock, WAKE_LOCK_SUSPEND, "gpio_input");
+		spin_lock_init(&ds->irq_lock);
+
+		for (i = 0; i < di->keymap_size; i++) {
+			input_set_capability(input_dev, di->type,
+					     di->keymap[i].code);
+			ds->key_state[i].ds = ds;
+			ds->key_state[i].debounce = DEBOUNCE_UNKNOWN;
+		}
+
+		for (i = 0; i < di->keymap_size; i++) {
+			ret = gpio_request(di->keymap[i].gpio, "gpio_kp_in");
+			if (ret) {
+				pr_err("gpio_event_input_func: gpio_request "
+					"failed for %d\n", di->keymap[i].gpio);
+				goto err_gpio_request_failed;
+			}
+			ret = gpio_direction_input(di->keymap[i].gpio);
+			if (ret) {
+				pr_err("gpio_event_input_func: "
+					"gpio_direction_input failed for %d\n",
+					di->keymap[i].gpio);
+				goto err_gpio_configure_failed;
+			}
+		}
+
+		ret = gpio_event_input_request_irqs(ds);
+
+		spin_lock_irqsave(&ds->irq_lock, irqflags);
+		ds->use_irq = ret == 0;
+
+		pr_info("GPIO Input Driver: Start gpio inputs for %s in %s "
+			"mode\n",
+			input_dev->name, ret == 0 ? "interrupt" : "polling");
+
+		hrtimer_init(&ds->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
+		ds->timer.function = gpio_event_input_timer_func;
+		hrtimer_start(&ds->timer, ktime_set(0, 0), HRTIMER_MODE_REL);
+		spin_unlock_irqrestore(&ds->irq_lock, irqflags);
+		return 0;
+	}
+
+	ret = 0;
+	spin_lock_irqsave(&ds->irq_lock, irqflags);
+	hrtimer_cancel(&ds->timer);
+	if (ds->use_irq) {
+		for (i = di->keymap_size - 1; i >= 0; i--) {
+			free_irq(gpio_to_irq(di->keymap[i].gpio),
+				 &ds->key_state[i]);
+		}
+	}
+	spin_unlock_irqrestore(&ds->irq_lock, irqflags);
+
+	for (i = di->keymap_size - 1; i >= 0; i--) {
+err_gpio_configure_failed:
+		gpio_free(di->keymap[i].gpio);
+err_gpio_request_failed:
+		;
+	}
+	wake_lock_destroy(&ds->wake_lock);
+	kfree(ds);
+err_ds_alloc_failed:
+	return ret;
+}
--- linux-mvl-dove-2.6.32.orig/drivers/input/misc/gpio_output.c
+++ linux-mvl-dove-2.6.32/drivers/input/misc/gpio_output.c
@@ -0,0 +1,84 @@
+/* drivers/input/misc/gpio_output.c
+ *
+ * Copyright (C) 2007 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/gpio.h>
+#include <linux/gpio_event.h>
+
+int gpio_event_output_event(
+	struct input_dev *input_dev, struct gpio_event_info *info, void **data,
+	unsigned int type, unsigned int code, int value)
+{
+	int i;
+	struct gpio_event_output_info *oi;
+	oi = container_of(info, struct gpio_event_output_info, info);
+	if (type != oi->type)
+		return 0;
+	if (!(oi->flags & GPIOEDF_ACTIVE_HIGH))
+		value = !value;
+	for (i = 0; i < oi->keymap_size; i++)
+		if (code == oi->keymap[i].code)
+			gpio_set_value(oi->keymap[i].gpio, value);
+	return 0;
+}
+
+int gpio_event_output_func(
+	struct input_dev *input_dev, struct gpio_event_info *info, void **data,
+	int func)
+{
+	int ret;
+	int i;
+	struct gpio_event_output_info *oi;
+	oi = container_of(info, struct gpio_event_output_info, info);
+
+	if (func == GPIO_EVENT_FUNC_SUSPEND || func == GPIO_EVENT_FUNC_RESUME)
+		return 0;
+
+	if (func == GPIO_EVENT_FUNC_INIT) {
+		int output_level = !(oi->flags & GPIOEDF_ACTIVE_HIGH);
+		for (i = 0; i < oi->keymap_size; i++)
+			input_set_capability(input_dev, oi->type,
+					     oi->keymap[i].code);
+
+		for (i = 0; i < oi->keymap_size; i++) {
+			ret = gpio_request(oi->keymap[i].gpio,
+					   "gpio_event_output");
+			if (ret) {
+				pr_err("gpio_event_output_func: gpio_request "
+					"failed for %d\n", oi->keymap[i].gpio);
+				goto err_gpio_request_failed;
+			}
+			ret = gpio_direction_output(oi->keymap[i].gpio,
+						    output_level);
+			if (ret) {
+				pr_err("gpio_event_output_func: "
+					"gpio_direction_output failed for %d\n",
+					oi->keymap[i].gpio);
+				goto err_gpio_direction_output_failed;
+			}
+		}
+		return 0;
+	}
+
+	ret = 0;
+	for (i = oi->keymap_size - 1; i >= 0; i--) {
+err_gpio_direction_output_failed:
+		gpio_free(oi->keymap[i].gpio);
+err_gpio_request_failed:
+		;
+	}
+	return ret;
+}
+
--- linux-mvl-dove-2.6.32.orig/drivers/input/misc/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/input/misc/Kconfig
@@ -240,6 +240,11 @@
 	  To compile this driver as a module, choose M here: the module will be
 	  called winbond_cir.
 
+config INPUT_GPIO
+	tristate "GPIO driver support"
+	help
+	  Say Y here if you want to support gpio based keys, wheels etc...
+
 config HP_SDC_RTC
 	tristate "HP SDC Real Time Clock"
 	depends on (GSC || HP300) && SERIO
--- linux-mvl-dove-2.6.32.orig/drivers/input/misc/gpio_axis.c
+++ linux-mvl-dove-2.6.32/drivers/input/misc/gpio_axis.c
@@ -0,0 +1,180 @@
+/* drivers/input/misc/gpio_axis.c
+ *
+ * Copyright (C) 2007 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/gpio.h>
+#include <linux/gpio_event.h>
+#include <linux/interrupt.h>
+
+struct gpio_axis_state {
+	struct input_dev *input_dev;
+	struct gpio_event_axis_info *info;
+	uint32_t pos;
+};
+
+uint16_t gpio_axis_4bit_gray_map_table[] = {
+	[0x0] = 0x0, [0x1] = 0x1, /* 0000 0001 */
+	[0x3] = 0x2, [0x2] = 0x3, /* 0011 0010 */
+	[0x6] = 0x4, [0x7] = 0x5, /* 0110 0111 */
+	[0x5] = 0x6, [0x4] = 0x7, /* 0101 0100 */
+	[0xc] = 0x8, [0xd] = 0x9, /* 1100 1101 */
+	[0xf] = 0xa, [0xe] = 0xb, /* 1111 1110 */
+	[0xa] = 0xc, [0xb] = 0xd, /* 1010 1011 */
+	[0x9] = 0xe, [0x8] = 0xf, /* 1001 1000 */
+};
+uint16_t gpio_axis_4bit_gray_map(struct gpio_event_axis_info *info, uint16_t in)
+{
+	return gpio_axis_4bit_gray_map_table[in];
+}
+
+uint16_t gpio_axis_5bit_singletrack_map_table[] = {
+	[0x10] = 0x00, [0x14] = 0x01, [0x1c] = 0x02, /*     10000 10100 11100 */
+	[0x1e] = 0x03, [0x1a] = 0x04, [0x18] = 0x05, /*     11110 11010 11000 */
+	[0x08] = 0x06, [0x0a] = 0x07, [0x0e] = 0x08, /*    01000 01010 01110  */
+	[0x0f] = 0x09, [0x0d] = 0x0a, [0x0c] = 0x0b, /*    01111 01101 01100  */
+	[0x04] = 0x0c, [0x05] = 0x0d, [0x07] = 0x0e, /*   00100 00101 00111   */
+	[0x17] = 0x0f, [0x16] = 0x10, [0x06] = 0x11, /*   10111 10110 00110   */
+	[0x02] = 0x12, [0x12] = 0x13, [0x13] = 0x14, /*  00010 10010 10011    */
+	[0x1b] = 0x15, [0x0b] = 0x16, [0x03] = 0x17, /*  11011 01011 00011    */
+	[0x01] = 0x18, [0x09] = 0x19, [0x19] = 0x1a, /* 00001 01001 11001     */
+	[0x1d] = 0x1b, [0x15] = 0x1c, [0x11] = 0x1d, /* 11101 10101 10001     */
+};
+uint16_t gpio_axis_5bit_singletrack_map(
+	struct gpio_event_axis_info *info, uint16_t in)
+{
+	return gpio_axis_5bit_singletrack_map_table[in];
+}
+
+static void gpio_event_update_axis(struct gpio_axis_state *as, int report)
+{
+	struct gpio_event_axis_info *ai = as->info;
+	int i;
+	int change;
+	uint16_t state = 0;
+	uint16_t pos;
+	uint16_t old_pos = as->pos;
+	for (i = ai->count - 1; i >= 0; i--)
+		state = (state << 1) | gpio_get_value(ai->gpio[i]);
+	pos = ai->map(ai, state);
+	if (ai->flags & GPIOEAF_PRINT_RAW)
+		pr_info("axis %d-%d raw %x, pos %d -> %d\n",
+			ai->type, ai->code, state, old_pos, pos);
+	if (report && pos != old_pos) {
+		if (ai->type == EV_REL) {
+			change = (ai->decoded_size + pos - old_pos) %
+				  ai->decoded_size;
+			if (change > ai->decoded_size / 2)
+				change -= ai->decoded_size;
+			if (change == ai->decoded_size / 2) {
+				if (ai->flags & GPIOEAF_PRINT_EVENT)
+					pr_info("axis %d-%d unknown direction, "
+						"pos %d -> %d\n", ai->type,
+						ai->code, old_pos, pos);
+				change = 0; /* no closest direction */
+			}
+			if (ai->flags & GPIOEAF_PRINT_EVENT)
+				pr_info("axis %d-%d change %d\n",
+					ai->type, ai->code, change);
+			input_report_rel(as->input_dev, ai->code, change);
+		} else {
+			if (ai->flags & GPIOEAF_PRINT_EVENT)
+				pr_info("axis %d-%d now %d\n",
+					ai->type, ai->code, pos);
+			input_event(as->input_dev, ai->type, ai->code, pos);
+		}
+		input_sync(as->input_dev);
+	}
+	as->pos = pos;
+}
+
+static irqreturn_t gpio_axis_irq_handler(int irq, void *dev_id)
+{
+	struct gpio_axis_state *as = dev_id;
+	gpio_event_update_axis(as, 1);
+	return IRQ_HANDLED;
+}
+
+int gpio_event_axis_func(struct input_dev *input_dev,
+			 struct gpio_event_info *info, void **data, int func)
+{
+	int ret;
+	int i;
+	int irq;
+	struct gpio_event_axis_info *ai;
+	struct gpio_axis_state *as;
+
+	ai = container_of(info, struct gpio_event_axis_info, info);
+	if (func == GPIO_EVENT_FUNC_SUSPEND) {
+		for (i = 0; i < ai->count; i++)
+			disable_irq(gpio_to_irq(ai->gpio[i]));
+		return 0;
+	}
+	if (func == GPIO_EVENT_FUNC_RESUME) {
+		for (i = 0; i < ai->count; i++)
+			enable_irq(gpio_to_irq(ai->gpio[i]));
+		return 0;
+	}
+
+	if (func == GPIO_EVENT_FUNC_INIT) {
+		*data = as = kmalloc(sizeof(*as), GFP_KERNEL);
+		if (as == NULL) {
+			ret = -ENOMEM;
+			goto err_alloc_axis_state_failed;
+		}
+		as->input_dev = input_dev;
+		as->info = ai;
+
+		input_set_capability(input_dev, ai->type, ai->code);
+		if (ai->type == EV_ABS) {
+			input_set_abs_params(input_dev, ai->code, 0,
+					     ai->decoded_size - 1, 0, 0);
+		}
+		for (i = 0; i < ai->count; i++) {
+			ret = gpio_request(ai->gpio[i], "gpio_event_axis");
+			if (ret < 0)
+				goto err_request_gpio_failed;
+			ret = gpio_direction_input(ai->gpio[i]);
+			if (ret < 0)
+				goto err_gpio_direction_input_failed;
+			ret = irq = gpio_to_irq(ai->gpio[i]);
+			if (ret < 0)
+				goto err_get_irq_num_failed;
+			ret = request_irq(irq, gpio_axis_irq_handler,
+					  IRQF_TRIGGER_RISING |
+					  IRQF_TRIGGER_FALLING,
+					  "gpio_event_axis", as);
+			if (ret < 0)
+				goto err_request_irq_failed;
+		}
+		gpio_event_update_axis(as, 0);
+		return 0;
+	}
+
+	ret = 0;
+	as = *data;
+	for (i = ai->count - 1; i >= 0; i--) {
+		free_irq(gpio_to_irq(ai->gpio[i]), as);
+err_request_irq_failed:
+err_get_irq_num_failed:
+err_gpio_direction_input_failed:
+		gpio_free(ai->gpio[i]);
+err_request_gpio_failed:
+		;
+	}
+	kfree(as);
+	*data = NULL;
+err_alloc_axis_state_failed:
+	return ret;
+}
--- linux-mvl-dove-2.6.32.orig/drivers/input/misc/Makefile
+++ linux-mvl-dove-2.6.32/drivers/input/misc/Makefile
@@ -18,6 +18,7 @@
 obj-$(CONFIG_INPUT_M68K_BEEP)		+= m68kspkr.o
 obj-$(CONFIG_INPUT_PCAP)		+= pcap_keys.o
 obj-$(CONFIG_INPUT_PCF50633_PMU)	+= pcf50633-input.o
+obj-$(CONFIG_INPUT_GPIO)		+= gpio_event.o gpio_matrix.o gpio_input.o gpio_output.o gpio_axis.o
 obj-$(CONFIG_INPUT_PCSPKR)		+= pcspkr.o
 obj-$(CONFIG_INPUT_POWERMATE)		+= powermate.o
 obj-$(CONFIG_INPUT_RB532_BUTTON)	+= rb532_button.o
--- linux-mvl-dove-2.6.32.orig/drivers/input/misc/winbond-cir.c
+++ linux-mvl-dove-2.6.32/drivers/input/misc/winbond-cir.c
@@ -768,7 +768,7 @@
 		return;
 	}
 
-	dev_info(dev, "IR-RC6 ad 0x%02X cm 0x%02X cu 0x%04X "
+	dev_dbg(dev, "IR-RC6 ad 0x%02X cm 0x%02X cu 0x%04X "
 		"toggle %u mode %u scan 0x%08X\n",
 		address,
 		command,
--- linux-mvl-dove-2.6.32.orig/drivers/input/misc/gpio_event.c
+++ linux-mvl-dove-2.6.32/drivers/input/misc/gpio_event.c
@@ -0,0 +1,224 @@
+/* drivers/input/misc/gpio_event.c
+ *
+ * Copyright (C) 2007 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/earlysuspend.h>
+#include <linux/module.h>
+#include <linux/input.h>
+#include <linux/gpio_event.h>
+#include <linux/hrtimer.h>
+#include <linux/platform_device.h>
+
+struct gpio_event {
+	struct input_dev *input_dev;
+	const struct gpio_event_platform_data *info;
+	struct early_suspend early_suspend;
+	void *state[0];
+};
+
+static int gpio_input_event(
+	struct input_dev *dev, unsigned int type, unsigned int code, int value)
+{
+	int i;
+	int ret = 0;
+	int tmp_ret;
+	struct gpio_event_info **ii;
+	struct gpio_event *ip = input_get_drvdata(dev);
+
+	for (i = 0, ii = ip->info->info; i < ip->info->info_count; i++, ii++) {
+		if ((*ii)->event) {
+			tmp_ret = (*ii)->event(ip->input_dev, *ii,
+					&ip->state[i], type, code, value);
+			if (tmp_ret)
+				ret = tmp_ret;
+		}
+	}
+	return ret;
+}
+
+static int gpio_event_call_all_func(struct gpio_event *ip, int func)
+{
+	int i;
+	int ret;
+	struct gpio_event_info **ii;
+
+	if (func == GPIO_EVENT_FUNC_INIT || func == GPIO_EVENT_FUNC_RESUME) {
+		ii = ip->info->info;
+		for (i = 0; i < ip->info->info_count; i++, ii++) {
+			if ((*ii)->func == NULL) {
+				ret = -ENODEV;
+				pr_err("gpio_event_probe: Incomplete pdata, "
+					"no function\n");
+				goto err_no_func;
+			}
+			ret = (*ii)->func(ip->input_dev, *ii, &ip->state[i],
+					  func);
+			if (ret) {
+				pr_err("gpio_event_probe: function failed\n");
+				goto err_func_failed;
+			}
+		}
+		return 0;
+	}
+
+	ret = 0;
+	i = ip->info->info_count;
+	ii = ip->info->info + i;
+	while (i > 0) {
+		i--;
+		ii--;
+		(*ii)->func(ip->input_dev, *ii, &ip->state[i], func & ~1);
+err_func_failed:
+err_no_func:
+		;
+	}
+	return ret;
+}
+
+#ifdef CONFIG_HAS_EARLYSUSPEND
+void gpio_event_suspend(struct early_suspend *h)
+{
+	struct gpio_event *ip;
+	ip = container_of(h, struct gpio_event, early_suspend);
+	gpio_event_call_all_func(ip, GPIO_EVENT_FUNC_SUSPEND);
+	ip->info->power(ip->info, 0);
+}
+
+void gpio_event_resume(struct early_suspend *h)
+{
+	struct gpio_event *ip;
+	ip = container_of(h, struct gpio_event, early_suspend);
+	ip->info->power(ip->info, 1);
+	gpio_event_call_all_func(ip, GPIO_EVENT_FUNC_RESUME);
+}
+#endif
+
+static int __init gpio_event_probe(struct platform_device *pdev)
+{
+	int err;
+	struct gpio_event *ip;
+	struct input_dev *input_dev;
+	struct gpio_event_platform_data *event_info;
+
+	event_info = pdev->dev.platform_data;
+	if (event_info == NULL) {
+		pr_err("gpio_event_probe: No pdata\n");
+		return -ENODEV;
+	}
+	if (event_info->name == NULL ||
+	   event_info->info == NULL ||
+	   event_info->info_count == 0) {
+		pr_err("gpio_event_probe: Incomplete pdata\n");
+		return -ENODEV;
+	}
+	ip = kzalloc(sizeof(*ip) +
+		     sizeof(ip->state[0]) * event_info->info_count, GFP_KERNEL);
+	if (ip == NULL) {
+		err = -ENOMEM;
+		pr_err("gpio_event_probe: Failed to allocate private data\n");
+		goto err_kp_alloc_failed;
+	}
+	platform_set_drvdata(pdev, ip);
+
+	input_dev = input_allocate_device();
+	if (input_dev == NULL) {
+		err = -ENOMEM;
+		pr_err("gpio_event_probe: Failed to allocate input device\n");
+		goto err_input_dev_alloc_failed;
+	}
+	input_set_drvdata(input_dev, ip);
+	ip->input_dev = input_dev;
+	ip->info = event_info;
+	if (event_info->power) {
+#ifdef CONFIG_HAS_EARLYSUSPEND
+		ip->early_suspend.level = EARLY_SUSPEND_LEVEL_BLANK_SCREEN + 1;
+		ip->early_suspend.suspend = gpio_event_suspend;
+		ip->early_suspend.resume = gpio_event_resume;
+		register_early_suspend(&ip->early_suspend);
+#endif
+		ip->info->power(ip->info, 1);
+	}
+
+	input_dev->name = ip->info->name;
+	input_dev->event = gpio_input_event;
+
+	err = gpio_event_call_all_func(ip, GPIO_EVENT_FUNC_INIT);
+	if (err)
+		goto err_call_all_func_failed;
+
+	err = input_register_device(input_dev);
+	if (err) {
+		pr_err("gpio_event_probe: Unable to register %s input device\n",
+			input_dev->name);
+		goto err_input_register_device_failed;
+	}
+
+	return 0;
+
+err_input_register_device_failed:
+	gpio_event_call_all_func(ip, GPIO_EVENT_FUNC_UNINIT);
+err_call_all_func_failed:
+	if (event_info->power) {
+#ifdef CONFIG_HAS_EARLYSUSPEND
+		unregister_early_suspend(&ip->early_suspend);
+#endif
+		ip->info->power(ip->info, 0);
+	}
+	input_free_device(input_dev);
+err_input_dev_alloc_failed:
+	kfree(ip);
+err_kp_alloc_failed:
+	return err;
+}
+
+static int gpio_event_remove(struct platform_device *pdev)
+{
+	struct gpio_event *ip = platform_get_drvdata(pdev);
+
+	gpio_event_call_all_func(ip, GPIO_EVENT_FUNC_UNINIT);
+	if (ip->info->power) {
+#ifdef CONFIG_HAS_EARLYSUSPEND
+		unregister_early_suspend(&ip->early_suspend);
+#endif
+		ip->info->power(ip->info, 0);
+	}
+	input_unregister_device(ip->input_dev);
+	kfree(ip);
+	return 0;
+}
+
+static struct platform_driver gpio_event_driver = {
+	.probe		= gpio_event_probe,
+	.remove		= gpio_event_remove,
+	.driver		= {
+		.name	= GPIO_EVENT_DEV_NAME,
+	},
+};
+
+static int __devinit gpio_event_init(void)
+{
+	return platform_driver_register(&gpio_event_driver);
+}
+
+static void __exit gpio_event_exit(void)
+{
+	platform_driver_unregister(&gpio_event_driver);
+}
+
+module_init(gpio_event_init);
+module_exit(gpio_event_exit);
+
+MODULE_DESCRIPTION("GPIO Event Driver");
+MODULE_LICENSE("GPL");
+
--- linux-mvl-dove-2.6.32.orig/drivers/input/misc/gpio_matrix.c
+++ linux-mvl-dove-2.6.32/drivers/input/misc/gpio_matrix.c
@@ -0,0 +1,406 @@
+/* drivers/input/misc/gpio_matrix.c
+ *
+ * Copyright (C) 2007 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/gpio.h>
+#include <linux/gpio_event.h>
+#include <linux/hrtimer.h>
+#include <linux/interrupt.h>
+#include <linux/wakelock.h>
+
+struct gpio_kp {
+	struct input_dev *input_dev;
+	struct gpio_event_matrix_info *keypad_info;
+	struct hrtimer timer;
+	struct wake_lock wake_lock;
+	int current_output;
+	unsigned int use_irq:1;
+	unsigned int key_state_changed:1;
+	unsigned int last_key_state_changed:1;
+	unsigned int some_keys_pressed:2;
+	unsigned long keys_pressed[0];
+};
+
+static void clear_phantom_key(struct gpio_kp *kp, int out, int in)
+{
+	struct gpio_event_matrix_info *mi = kp->keypad_info;
+	int key_index = out * mi->ninputs + in;
+	unsigned short keycode = mi->keymap[key_index];;
+
+	if (!test_bit(keycode, kp->input_dev->key)) {
+		if (mi->flags & GPIOKPF_PRINT_PHANTOM_KEYS)
+			pr_info("gpiomatrix: phantom key %x, %d-%d (%d-%d) "
+				"cleared\n", keycode, out, in,
+				mi->output_gpios[out], mi->input_gpios[in]);
+		__clear_bit(key_index, kp->keys_pressed);
+	} else {
+		if (mi->flags & GPIOKPF_PRINT_PHANTOM_KEYS)
+			pr_info("gpiomatrix: phantom key %x, %d-%d (%d-%d) "
+				"not cleared\n", keycode, out, in,
+				mi->output_gpios[out], mi->input_gpios[in]);
+	}
+}
+
+static int restore_keys_for_input(struct gpio_kp *kp, int out, int in)
+{
+	int rv = 0;
+	int key_index;
+
+	key_index = out * kp->keypad_info->ninputs + in;
+	while (out < kp->keypad_info->noutputs) {
+		if (test_bit(key_index, kp->keys_pressed)) {
+			rv = 1;
+			clear_phantom_key(kp, out, in);
+		}
+		key_index += kp->keypad_info->ninputs;
+		out++;
+	}
+	return rv;
+}
+
+static void remove_phantom_keys(struct gpio_kp *kp)
+{
+	int out, in, inp;
+	int key_index;
+
+	if (kp->some_keys_pressed < 3)
+		return;
+
+	for (out = 0; out < kp->keypad_info->noutputs; out++) {
+		inp = -1;
+		key_index = out * kp->keypad_info->ninputs;
+		for (in = 0; in < kp->keypad_info->ninputs; in++, key_index++) {
+			if (test_bit(key_index, kp->keys_pressed)) {
+				if (inp == -1) {
+					inp = in;
+					continue;
+				}
+				if (inp >= 0) {
+					if (!restore_keys_for_input(kp, out + 1,
+									inp))
+						break;
+					clear_phantom_key(kp, out, inp);
+					inp = -2;
+				}
+				restore_keys_for_input(kp, out, in);
+			}
+		}
+	}
+}
+
+static void report_key(struct gpio_kp *kp, int key_index, int out, int in)
+{
+	struct gpio_event_matrix_info *mi = kp->keypad_info;
+	int pressed = test_bit(key_index, kp->keys_pressed);
+	unsigned short keycode = mi->keymap[key_index];
+	if (pressed != test_bit(keycode, kp->input_dev->key)) {
+		if (keycode == KEY_RESERVED) {
+			if (mi->flags & GPIOKPF_PRINT_UNMAPPED_KEYS)
+				pr_info("gpiomatrix: unmapped key, %d-%d "
+					"(%d-%d) changed to %d\n",
+					out, in, mi->output_gpios[out],
+					mi->input_gpios[in], pressed);
+		} else {
+			if (mi->flags & GPIOKPF_PRINT_MAPPED_KEYS)
+				pr_info("gpiomatrix: key %x, %d-%d (%d-%d) "
+					"changed to %d\n", keycode,
+					out, in, mi->output_gpios[out],
+					mi->input_gpios[in], pressed);
+			input_report_key(kp->input_dev, keycode, pressed);
+		}
+	}
+}
+
+static enum hrtimer_restart gpio_keypad_timer_func(struct hrtimer *timer)
+{
+	int out, in;
+	int key_index;
+	int gpio;
+	struct gpio_kp *kp = container_of(timer, struct gpio_kp, timer);
+	struct gpio_event_matrix_info *mi = kp->keypad_info;
+	unsigned gpio_keypad_flags = mi->flags;
+	unsigned polarity = !!(gpio_keypad_flags & GPIOKPF_ACTIVE_HIGH);
+
+	out = kp->current_output;
+	if (out == mi->noutputs) {
+		out = 0;
+		kp->last_key_state_changed = kp->key_state_changed;
+		kp->key_state_changed = 0;
+		kp->some_keys_pressed = 0;
+	} else {
+		key_index = out * mi->ninputs;
+		for (in = 0; in < mi->ninputs; in++, key_index++) {
+			gpio = mi->input_gpios[in];
+			if (gpio_get_value(gpio) ^ !polarity) {
+				if (kp->some_keys_pressed < 3)
+					kp->some_keys_pressed++;
+				kp->key_state_changed |= !__test_and_set_bit(
+						key_index, kp->keys_pressed);
+			} else
+				kp->key_state_changed |= __test_and_clear_bit(
+						key_index, kp->keys_pressed);
+		}
+		gpio = mi->output_gpios[out];
+		if (gpio_keypad_flags & GPIOKPF_DRIVE_INACTIVE)
+			gpio_set_value(gpio, !polarity);
+		else
+			gpio_direction_input(gpio);
+		out++;
+	}
+	kp->current_output = out;
+	if (out < mi->noutputs) {
+		gpio = mi->output_gpios[out];
+		if (gpio_keypad_flags & GPIOKPF_DRIVE_INACTIVE)
+			gpio_set_value(gpio, polarity);
+		else
+			gpio_direction_output(gpio, polarity);
+		hrtimer_start(timer, mi->settle_time, HRTIMER_MODE_REL);
+		return HRTIMER_NORESTART;
+	}
+	if (gpio_keypad_flags & GPIOKPF_DEBOUNCE) {
+		if (kp->key_state_changed) {
+			hrtimer_start(&kp->timer, mi->debounce_delay,
+				      HRTIMER_MODE_REL);
+			return HRTIMER_NORESTART;
+		}
+		kp->key_state_changed = kp->last_key_state_changed;
+	}
+	if (kp->key_state_changed) {
+		if (gpio_keypad_flags & GPIOKPF_REMOVE_SOME_PHANTOM_KEYS)
+			remove_phantom_keys(kp);
+		key_index = 0;
+		for (out = 0; out < mi->noutputs; out++)
+			for (in = 0; in < mi->ninputs; in++, key_index++)
+				report_key(kp, key_index, out, in);
+	}
+	if (!kp->use_irq || kp->some_keys_pressed) {
+		hrtimer_start(timer, mi->poll_time, HRTIMER_MODE_REL);
+		return HRTIMER_NORESTART;
+	}
+
+	/* No keys are pressed, reenable interrupt */
+	for (out = 0; out < mi->noutputs; out++) {
+		if (gpio_keypad_flags & GPIOKPF_DRIVE_INACTIVE)
+			gpio_set_value(mi->output_gpios[out], polarity);
+		else
+			gpio_direction_output(mi->output_gpios[out], polarity);
+	}
+	for (in = 0; in < mi->ninputs; in++)
+		enable_irq(gpio_to_irq(mi->input_gpios[in]));
+	wake_unlock(&kp->wake_lock);
+	return HRTIMER_NORESTART;
+}
+
+static irqreturn_t gpio_keypad_irq_handler(int irq_in, void *dev_id)
+{
+	int i;
+	struct gpio_kp *kp = dev_id;
+	struct gpio_event_matrix_info *mi = kp->keypad_info;
+	unsigned gpio_keypad_flags = mi->flags;
+
+	if (!kp->use_irq) /* ignore interrupt while registering the handler */
+		return IRQ_HANDLED;
+
+	for (i = 0; i < mi->ninputs; i++)
+		disable_irq(gpio_to_irq(mi->input_gpios[i]));
+	for (i = 0; i < mi->noutputs; i++) {
+		if (gpio_keypad_flags & GPIOKPF_DRIVE_INACTIVE)
+			gpio_set_value(mi->output_gpios[i],
+				!(gpio_keypad_flags & GPIOKPF_ACTIVE_HIGH));
+		else
+			gpio_direction_input(mi->output_gpios[i]);
+	}
+	wake_lock(&kp->wake_lock);
+	hrtimer_start(&kp->timer, ktime_set(0, 0), HRTIMER_MODE_REL);
+	return IRQ_HANDLED;
+}
+
+static int gpio_keypad_request_irqs(struct gpio_kp *kp)
+{
+	int i;
+	int err;
+	unsigned int irq;
+	unsigned long request_flags;
+	struct gpio_event_matrix_info *mi = kp->keypad_info;
+
+	switch (mi->flags & (GPIOKPF_ACTIVE_HIGH|GPIOKPF_LEVEL_TRIGGERED_IRQ)) {
+	default:
+		request_flags = IRQF_TRIGGER_FALLING;
+		break;
+	case GPIOKPF_ACTIVE_HIGH:
+		request_flags = IRQF_TRIGGER_RISING;
+		break;
+	case GPIOKPF_LEVEL_TRIGGERED_IRQ:
+		request_flags = IRQF_TRIGGER_LOW;
+		break;
+	case GPIOKPF_LEVEL_TRIGGERED_IRQ | GPIOKPF_ACTIVE_HIGH:
+		request_flags = IRQF_TRIGGER_HIGH;
+		break;
+	}
+
+	for (i = 0; i < mi->ninputs; i++) {
+		err = irq = gpio_to_irq(mi->input_gpios[i]);
+		if (err < 0)
+			goto err_gpio_get_irq_num_failed;
+		err = request_irq(irq, gpio_keypad_irq_handler, request_flags,
+				  "gpio_kp", kp);
+		if (err) {
+			pr_err("gpiomatrix: request_irq failed for input %d, "
+				"irq %d\n", mi->input_gpios[i], irq);
+			goto err_request_irq_failed;
+		}
+		err = set_irq_wake(irq, 1);
+		if (err) {
+			pr_err("gpiomatrix: set_irq_wake failed for input %d, "
+				"irq %d\n", mi->input_gpios[i], irq);
+		}
+		disable_irq(irq);
+	}
+	return 0;
+
+	for (i = mi->noutputs - 1; i >= 0; i--) {
+		free_irq(gpio_to_irq(mi->input_gpios[i]), kp);
+err_request_irq_failed:
+err_gpio_get_irq_num_failed:
+		;
+	}
+	return err;
+}
+
+int gpio_event_matrix_func(struct input_dev *input_dev,
+	struct gpio_event_info *info, void **data, int func)
+{
+	int i;
+	int err;
+	int key_count;
+	struct gpio_kp *kp;
+	struct gpio_event_matrix_info *mi;
+
+	mi = container_of(info, struct gpio_event_matrix_info, info);
+	if (func == GPIO_EVENT_FUNC_SUSPEND || func == GPIO_EVENT_FUNC_RESUME) {
+		/* TODO: disable scanning */
+		return 0;
+	}
+
+	if (func == GPIO_EVENT_FUNC_INIT) {
+		if (mi->keymap == NULL ||
+		   mi->input_gpios == NULL ||
+		   mi->output_gpios == NULL) {
+			err = -ENODEV;
+			pr_err("gpiomatrix: Incomplete pdata\n");
+			goto err_invalid_platform_data;
+		}
+		key_count = mi->ninputs * mi->noutputs;
+
+		*data = kp = kzalloc(sizeof(*kp) + sizeof(kp->keys_pressed[0]) *
+				     BITS_TO_LONGS(key_count), GFP_KERNEL);
+		if (kp == NULL) {
+			err = -ENOMEM;
+			pr_err("gpiomatrix: Failed to allocate private data\n");
+			goto err_kp_alloc_failed;
+		}
+		kp->input_dev = input_dev;
+		kp->keypad_info = mi;
+		set_bit(EV_KEY, input_dev->evbit);
+		for (i = 0; i < key_count; i++) {
+			if (mi->keymap[i])
+				set_bit(mi->keymap[i] & KEY_MAX,
+					input_dev->keybit);
+		}
+
+		for (i = 0; i < mi->noutputs; i++) {
+			if (gpio_cansleep(mi->output_gpios[i])) {
+				pr_err("gpiomatrix: unsupported output gpio %d,"
+					" can sleep\n", mi->output_gpios[i]);
+				err = -EINVAL;
+				goto err_request_output_gpio_failed;
+			}
+			err = gpio_request(mi->output_gpios[i], "gpio_kp_out");
+			if (err) {
+				pr_err("gpiomatrix: gpio_request failed for "
+					"output %d\n", mi->output_gpios[i]);
+				goto err_request_output_gpio_failed;
+			}
+			if (mi->flags & GPIOKPF_DRIVE_INACTIVE)
+				err = gpio_direction_output(mi->output_gpios[i],
+					!(mi->flags & GPIOKPF_ACTIVE_HIGH));
+			else
+				err = gpio_direction_input(mi->output_gpios[i]);
+			if (err) {
+				pr_err("gpiomatrix: gpio_configure failed for "
+					"output %d\n", mi->output_gpios[i]);
+				goto err_output_gpio_configure_failed;
+			}
+		}
+		for (i = 0; i < mi->ninputs; i++) {
+			err = gpio_request(mi->input_gpios[i], "gpio_kp_in");
+			if (err) {
+				pr_err("gpiomatrix: gpio_request failed for "
+					"input %d\n", mi->input_gpios[i]);
+				goto err_request_input_gpio_failed;
+			}
+			err = gpio_direction_input(mi->input_gpios[i]);
+			if (err) {
+				pr_err("gpiomatrix: gpio_direction_input failed"
+					" for input %d\n", mi->input_gpios[i]);
+				goto err_gpio_direction_input_failed;
+			}
+		}
+		kp->current_output = mi->noutputs;
+		kp->key_state_changed = 1;
+
+		hrtimer_init(&kp->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
+		kp->timer.function = gpio_keypad_timer_func;
+		wake_lock_init(&kp->wake_lock, WAKE_LOCK_SUSPEND, "gpio_kp");
+		err = gpio_keypad_request_irqs(kp);
+		kp->use_irq = err == 0;
+
+		pr_info("GPIO Matrix Keypad Driver: Start keypad matrix for %s "
+			"in %s mode\n", input_dev->name,
+			kp->use_irq ? "interrupt" : "polling");
+
+		if (kp->use_irq)
+			wake_lock(&kp->wake_lock);
+		hrtimer_start(&kp->timer, ktime_set(0, 0), HRTIMER_MODE_REL);
+
+		return 0;
+	}
+
+	err = 0;
+	kp = *data;
+
+	if (kp->use_irq)
+		for (i = mi->noutputs - 1; i >= 0; i--)
+			free_irq(gpio_to_irq(mi->input_gpios[i]), kp);
+
+	hrtimer_cancel(&kp->timer);
+	wake_lock_destroy(&kp->wake_lock);
+	for (i = mi->noutputs - 1; i >= 0; i--) {
+err_gpio_direction_input_failed:
+		gpio_free(mi->input_gpios[i]);
+err_request_input_gpio_failed:
+		;
+	}
+	for (i = mi->noutputs - 1; i >= 0; i--) {
+err_output_gpio_configure_failed:
+		gpio_free(mi->output_gpios[i]);
+err_request_output_gpio_failed:
+		;
+	}
+	kfree(kp);
+err_kp_alloc_failed:
+err_invalid_platform_data:
+	return err;
+}
--- linux-mvl-dove-2.6.32.orig/drivers/input/keyboard/twl4030_keypad.c
+++ linux-mvl-dove-2.6.32/drivers/input/keyboard/twl4030_keypad.c
@@ -50,8 +50,12 @@
  */
 #define TWL4030_MAX_ROWS	8	/* TWL4030 hard limit */
 #define TWL4030_MAX_COLS	8
-#define TWL4030_ROW_SHIFT	3
-#define TWL4030_KEYMAP_SIZE	(TWL4030_MAX_ROWS * TWL4030_MAX_COLS)
+/*
+ * Note that we add space for an extra column so that we can handle
+ * row lines connected to the gnd (see twl4030_col_xlate()).
+ */
+#define TWL4030_ROW_SHIFT	4
+#define TWL4030_KEYMAP_SIZE	(TWL4030_MAX_ROWS << TWL4030_ROW_SHIFT)
 
 struct twl4030_keypad {
 	unsigned short	keymap[TWL4030_KEYMAP_SIZE];
@@ -181,7 +185,7 @@
 	return ret;
 }
 
-static int twl4030_is_in_ghost_state(struct twl4030_keypad *kp, u16 *key_state)
+static bool twl4030_is_in_ghost_state(struct twl4030_keypad *kp, u16 *key_state)
 {
 	int i;
 	u16 check = 0;
@@ -190,12 +194,12 @@
 		u16 col = key_state[i];
 
 		if ((col & check) && hweight16(col) > 1)
-			return 1;
+			return true;
 
 		check |= col;
 	}
 
-	return 0;
+	return false;
 }
 
 static void twl4030_kp_scan(struct twl4030_keypad *kp, bool release_all)
@@ -224,7 +228,8 @@
 		if (!changed)
 			continue;
 
-		for (col = 0; col < kp->n_cols; col++) {
+		/* Extra column handles "all gnd" rows */
+		for (col = 0; col < kp->n_cols + 1; col++) {
 			int code;
 
 			if (!(changed & (1 << col)))
--- linux-mvl-dove-2.6.32.orig/drivers/input/keyboard/gpio_keys.c
+++ linux-mvl-dove-2.6.32/drivers/input/keyboard/gpio_keys.c
@@ -34,6 +34,7 @@
 };
 
 struct gpio_keys_drvdata {
+	int nbuttons;
 	struct input_dev *input;
 	struct gpio_button_data data[0];
 };
@@ -74,6 +75,19 @@
 	return IRQ_HANDLED;
 }
 
+static irqreturn_t gpio_keys_shared_isr(int irq, void *dev_id)
+{
+	struct gpio_keys_drvdata *ddata = dev_id;
+	int i;
+
+	for (i = 0; i < ddata->nbuttons; i++) {
+		struct gpio_button_data *bdata = &ddata->data[i];
+
+		schedule_work (&bdata->work);
+	}
+	return IRQ_HANDLED;
+}
+
 static int __devinit gpio_keys_probe(struct platform_device *pdev)
 {
 	struct gpio_keys_platform_data *pdata = pdev->dev.platform_data;
@@ -106,7 +120,9 @@
 	if (pdata->rep)
 		__set_bit(EV_REP, input->evbit);
 
+	__set_bit(EV_KEY, input->evbit);
 	ddata->input = input;
+	ddata->nbuttons = pdata->nbuttons;
 
 	for (i = 0; i < pdata->nbuttons; i++) {
 		struct gpio_keys_button *button = &pdata->buttons[i];
@@ -136,32 +152,45 @@
 			goto fail2;
 		}
 
-		irq = gpio_to_irq(button->gpio);
-		if (irq < 0) {
-			error = irq;
-			pr_err("gpio-keys: Unable to get irq number"
-				" for GPIO %d, error %d\n",
-				button->gpio, error);
-			gpio_free(button->gpio);
-			goto fail2;
+		if (!pdata->use_shared_irq) {
+			irq = gpio_to_irq(button->gpio);
+			if (irq < 0) {
+				error = irq;
+				pr_err("gpio-keys: Unable to get irq number"
+				       " for GPIO %d, error %d\n",
+				       button->gpio, error);
+				gpio_free(button->gpio);
+				goto fail2;
+			}
+			
+			error = request_irq(irq, gpio_keys_isr,
+					    IRQF_SHARED | IRQF_TRIGGER_RISING |
+					    IRQF_TRIGGER_FALLING,
+					    button->desc ? button->desc : "gpio_keys",
+					    bdata);
+			if (error) {
+				pr_err("gpio-keys: Unable to claim irq %d; error %d\n",
+				       irq, error);
+				gpio_free(button->gpio);
+				goto fail2;
+			}
 		}
+		if (button->wakeup)
+			wakeup = 1;
 
-		error = request_irq(irq, gpio_keys_isr,
+		input_set_capability(input, type, button->code);
+	}
+
+	if (pdata->use_shared_irq) {
+		error = request_irq(pdata->shared_irq, gpio_keys_shared_isr,
 				    IRQF_SHARED |
 				    IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
-				    button->desc ? button->desc : "gpio_keys",
-				    bdata);
+				    "gpio_keys", ddata);
 		if (error) {
 			pr_err("gpio-keys: Unable to claim irq %d; error %d\n",
-				irq, error);
-			gpio_free(button->gpio);
+			       pdata->use_shared_irq, error);
 			goto fail2;
 		}
-
-		if (button->wakeup)
-			wakeup = 1;
-
-		input_set_capability(input, type, button->code);
 	}
 
 	error = input_register_device(input);
@@ -177,12 +206,15 @@
 
  fail2:
 	while (--i >= 0) {
-		free_irq(gpio_to_irq(pdata->buttons[i].gpio), &ddata->data[i]);
+		if (!pdata->use_shared_irq)
+			free_irq(gpio_to_irq(pdata->buttons[i].gpio), &ddata->data[i]);
 		if (pdata->buttons[i].debounce_interval)
 			del_timer_sync(&ddata->data[i].timer);
 		cancel_work_sync(&ddata->data[i].work);
 		gpio_free(pdata->buttons[i].gpio);
 	}
+	if (pdata->use_shared_irq)
+		free_irq(pdata->shared_irq, ddata);
 
 	platform_set_drvdata(pdev, NULL);
  fail1:
@@ -201,9 +233,14 @@
 
 	device_init_wakeup(&pdev->dev, 0);
 
+	if (pdata->use_shared_irq)
+		free_irq(pdata->shared_irq, &ddata);
+
 	for (i = 0; i < pdata->nbuttons; i++) {
-		int irq = gpio_to_irq(pdata->buttons[i].gpio);
-		free_irq(irq, &ddata->data[i]);
+		if (!pdata->use_shared_irq) {
+			int irq = gpio_to_irq(pdata->buttons[i].gpio);
+			free_irq(irq, &ddata->data[i]);
+		}
 		if (pdata->buttons[i].debounce_interval)
 			del_timer_sync(&ddata->data[i].timer);
 		cancel_work_sync(&ddata->data[i].work);
--- linux-mvl-dove-2.6.32.orig/drivers/input/keyboard/atkbd.c
+++ linux-mvl-dove-2.6.32/drivers/input/keyboard/atkbd.c
@@ -912,6 +912,14 @@
 };
 
 /*
+ * Fujitsu Siemens system with broken key release on volume keys and mute key
+ */
+
+static unsigned int atkbd_amilo_xi_2428_forced_release_keys[] = {
+	0xa0, 0xae, 0xb0, -1U
+};
+
+/*
  * Soltech TA12 system with broken key release on volume keys and mute key
  */
 static unsigned int atkdb_soltech_ta12_forced_release_keys[] = {
@@ -1695,6 +1703,34 @@
 		.driver_data = atkbd_amilo_xi3650_forced_release_keys,
 	},
 	{
+		.ident = "Znote 6615WD",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "Zepto"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Znote 6615WD"),
+		},
+		.callback = atkbd_setup_forced_release,
+		.driver_data = atkbd_volume_forced_release_keys,
+	},
+	{
+		.ident = "Znote 6625WD",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "Zepto"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Znote"),
+			DMI_MATCH(DMI_PRODUCT_VERSION, "6625WD"),
+		},
+		.callback = atkbd_setup_forced_release,
+		.driver_data = atkbd_volume_forced_release_keys,
+	},
+	{
+		.ident = "AMILO Xi 2428",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "AMILO Xi 2428"),
+		},
+		.callback = atkbd_setup_forced_release,
+		.driver_data = atkbd_amilo_xi_2428_forced_release_keys,
+	},
+	{
 		.ident = "Soltech Corporation TA12",
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "Soltech Corporation"),
--- linux-mvl-dove-2.6.32.orig/drivers/input/touchscreen/rt5611_ts.c
+++ linux-mvl-dove-2.6.32/drivers/input/touchscreen/rt5611_ts.c
@@ -0,0 +1,647 @@
+/*
+ * Driver for Realtek Touch Screen Controller ALC5611
+ * Author	: Brian Hsu bhsu@marvell.com)
+ * Date		: 20-10-2009
+ */
+
+/* #define DEBUG */
+
+#include <linux/rt5611_ts.h>
+/*
+#define RT5611_TS_DEBUG(format, args...) \
+	printk(KERN_DEBUG "%s(%d): "format"\n", __FUNCTION__, __LINE__, ##args)
+*/
+
+#define RT5611_TS_DEBUG(format, args...)
+
+/* #define SWAP_X */
+#ifdef CONFIG_ANDROID
+#define SWAP_Y
+#else
+/* #define SWAP_Y */
+#endif
+
+#define ABS(X) ((X) < 0 ? (-1 * (X)) : (X))
+static const u16 rt5611_reg_defalt_00h = 0x59b4;
+
+static int abs_x[3] = {0, 4095, 0};
+static int abs_y[3] = {0, 4095, 0};
+static int abs_p[3] = {0,  150, 0};
+
+/*
+ * ADC sample delay times in uS
+ */
+static const int delay_table[] = {
+	84,    /*	0x00b=>4 AC97 frames(20.8us) */
+	167,  /*	0x01b=>8 */
+	333,  /*	0x10b=>16 */
+	667,  /*	0x11b=>32 */
+};
+
+static u16 delay_sel = (CB1_DEL_16F >> 7); /* default delay selection */
+
+static inline void poll_delay(int d)
+{
+
+	d = (((d <= 3) && (d >= 0)) ? d : ((d > 3) ? 3 : 0));
+	udelay(delay_table[d] + 3 * AC97_LINK_FRAME);
+}
+
+static bool rt5611_ts_resumed=0;
+extern bool rt5610_codec_resumed;
+
+int rt5611_ts_reg_read(struct rt5611_ts *rt, u16 reg)
+{
+	int val = 0;
+	val = soc_ac97_ops.read(rt->codec->ac97, reg);
+
+	RT5611_TS_DEBUG("rt5611_ts_reg_read: (reg,val)=(%x,%x)\n", reg, val);
+
+	return val;
+}
+void rt5611_ts_reg_write(struct rt5611_ts *rt, u16 reg, u16 val)
+{
+	RT5611_TS_DEBUG("rt5611_ts_reg_write: (reg,val)=(%x,%x)\n", reg, val);
+
+	soc_ac97_ops.write(rt->codec->ac97, reg, val);
+	return;
+}
+
+bool rt5611_ts_reg_write_mask(struct rt5611_ts *rt, u16 reg, u16 val, u16 mask)
+{
+	bool RetVal = 0;
+	u16 data = 0;
+	if (!mask)
+		return RetVal;
+
+	/*RT5611_TS_DEBUG("rt5611_ts_reg_write_mask: (reg,val,mask)=(%x,%x,%x)\n",reg,val,mask);*/
+
+	if (mask != 0xFFFF) {/* portion mask */
+		data = soc_ac97_ops.read(rt->codec->ac97, reg);
+		data &= ~mask;
+		data |= val & mask;
+		soc_ac97_ops.write(rt->codec->ac97, reg, data);
+	} else  /* All mask */
+		soc_ac97_ops.write(rt->codec->ac97, reg, data);
+
+	return RetVal;
+}
+
+static void rt5611_ts_phy_init(struct rt5611_ts *rt)
+{
+	RT5611_TS_DEBUG("rt5611_ts_phy_init\n");
+
+	rt5611_ts_reg_write(rt, RT_TP_CTRL_BYTE1, CB1_DEFALT);
+	rt5611_ts_reg_write(rt, RT_TP_CTRL_BYTE2, CB2_DEFALT);
+	rt5611_ts_reg_write_mask(rt, RT_GPIO_PIN_STICKY, 0, RT_GPIO_BIT13);
+	rt5611_ts_reg_write_mask(rt, RT_PD_CTRL_STAT, 0,PD_CTRL_VREF|PD_CTRL_ADC); //enable ADC/Vref power down 
+
+}
+
+static int rt5611_ts_poll_coord(struct rt5611_ts *rt, struct rt5611_ts_data *data)
+{
+	bool FoundXSample = 0, FoundYSample = 0, FoundPSample = 0;
+	u16 val = 0;
+	u8 i = 0;
+
+	RT5611_TS_DEBUG("rt5611_ts_poll_coord\n");
+
+	data->x = MAX_ADC_VAL;
+	data->y = MAX_ADC_VAL;
+	data->p = MAX_ADC_VAL;
+
+	poll_delay(delay_sel);
+	for (i = 0; i < MAX_CONVERSIONS; i++) {
+		val = rt5611_ts_reg_read(rt, RT_TP_INDICATION);
+		if (!(val & CB3_PD_STATUS))
+			return RC_PENUP;
+
+		if (!FoundXSample && ((val&CB3_ADCSRC_MASK) == CB3_ADCSRC_X)) {
+			data->x = val & CB3_ADC_DATA; /* get X sample */
+			FoundXSample = 1;
+		} else if (!FoundYSample && ((val&CB3_ADCSRC_MASK) == CB3_ADCSRC_Y)) {
+			data->y = val & CB3_ADC_DATA; /* get Y sample */
+			FoundYSample = 1;
+		} else if (!FoundPSample && ((val&CB3_ADCSRC_MASK) == CB3_ADCSRC_PRE)) {
+			data->p = val & CB3_ADC_DATA;  /* get Presure sample */
+			FoundPSample = 1;
+		} else if ((val&CB3_ADCSRC_MASK) == CB3_ADCSRC_NON) {
+			//when busy, using a smaller delay
+			udelay(100);
+			continue;
+		}
+			
+
+		if (FoundXSample && FoundYSample && FoundPSample)
+			break;
+		/*wait some delay- delay for conversion */
+		poll_delay(delay_sel);
+	}
+	if (i == MAX_CONVERSIONS)
+		return RC_AGAIN;
+	else
+		return RC_VALID;
+}
+
+#ifdef POLLING_MODE
+static int rt5611_ts_poll_sample(struct rt5611_ts *rt, int adcsel, int *sample)
+{
+	u16 val = 0;
+	unsigned short adccr = 0;
+
+	*sample = MAX_ADC_VAL;
+	RT5611_TS_DEBUG("rt5611_ts_poll_sample(POLLING_MODE)\n");
+
+	/* enable ADC target */
+	switch (adcsel) {
+	case RT_ADC_X:
+		adccr = CB2_X_EN;
+		break;
+	case RT_ADC_Y:
+		adccr = CB2_Y_EN;
+		break;
+	case RT_ADC_P:
+		adccr = CB2_PRESSURE_EN;
+		break;
+	default:
+		return -EINVAL;		
+	}
+
+	/* set internal Pull-up resistor and Polling mode */
+   	adccr |= CB2_PPR_64 | CB2_POLL_TRIG;
+
+  	rt5611_ts_reg_write(rt, RT_TP_CTRL_BYTE2, adccr);
+	do{
+		val = rt5611_ts_reg_read(rt, RT_TP_CTRL_BYTE2);		
+	}while (val & CB2_POLL_TRIG);
+
+	val = rt5611_ts_reg_read(rt, RT_TP_INDICATION);
+	if (val & CB3_PD_STATUS)
+	{
+		*sample = val & CB3_ADC_DATA;
+		return RC_VALID;
+	} else
+		return RC_PENUP;
+}
+#endif
+
+static int rt5611_ts_poll_touch(struct rt5611_ts *rt, struct rt5611_ts_data *data)
+{
+	int rc = 0;
+	RT5611_TS_DEBUG("rt5611_ts_poll_touch\n");
+
+#ifdef POLLING_MODE /* poll mode */
+
+		rc = rt5611_ts_poll_sample(rt, RT_ADC_X, &data->x);
+		if (rc != RC_VALID)
+			return rc;
+		rc = rt5611_ts_poll_sample(rt, RT_ADC_Y, &data->y);
+		if (rc != RC_VALID)
+			return rc;
+		rc = rt5611_ts_poll_sample(rt, RT_ADC_P,&data->p);
+		if (rc != RC_VALID)
+			return rc;
+
+#else	/* continuous mode */
+		rc = rt5611_ts_poll_coord(rt, data);
+		return rc;
+#endif
+}
+
+static void rt5611_ts_enable(struct rt5611_ts *rt, int enable)
+{
+	RT5611_TS_DEBUG("rt5611_ts_enable(%d)\n", enable);
+	u16 pdstatus=0;
+	if (enable) {
+		pdstatus=rt5611_ts_reg_read(rt, RT_PD_CTRL_STAT);
+		if (!(pdstatus & (PD_CTRL_STATUS_VREF|PD_CTRL_STATUS_ADC))) // 1:ready, 0:not ready
+			rt5611_ts_reg_write_mask(rt, RT_PD_CTRL_STAT, 0,
+			PD_CTRL_VREF|PD_CTRL_ADC); //enable ADC/Vref power down 
+	
+		/* power on main BIAS */
+		rt5611_ts_reg_write_mask(rt, RT_PWR_MANAG_ADD1, 
+					 PWR_MAIN_BIAS | PWR_IP_ENA,
+					 PWR_MAIN_BIAS | PWR_IP_ENA);
+		/* enable touch panel and ADC and VREF of all analog */
+		rt5611_ts_reg_write_mask(rt, RT_PWR_MANAG_ADD2, 
+					 PWR_MIXER_VREF | PWR_TP_ADC,
+					 PWR_MIXER_VREF |PWR_TP_ADC);
+#ifdef POLLING_MODE	/* poll mode */
+		/* set touch control register1 */
+		rt5611_ts_reg_write(rt, RT_TP_CTRL_BYTE1, 
+				    POW_TP_CTRL_1 | CB1_CR2 | CB1_CLK_DIV64 | CB1_DEL_8F);
+	
+#else	/* continuous mode */
+		/* set touch control register1 */
+		rt5611_ts_reg_write(rt, RT_TP_CTRL_BYTE1, POW_TP_CTRL_1 | CB1_CR1 |
+				    CB1_CLK_DIV64 | CB1_DEL_16F |
+				    CB1_SLOT_READBACK|CB1_PRES_CURR_375UA);
+		/* set touch control register2 */
+		rt5611_ts_reg_write(rt, RT_TP_CTRL_BYTE2, CB2_MODE_SEL | CB2_X_EN |
+				    CB2_Y_EN | CB2_PRESSURE_EN|CB2_PPR_64);		
+#endif
+		/* set GPIO 2 to output pin */
+		rt5611_ts_reg_write_mask(rt, RT_GPIO_PIN_CONFIG, RT_GPIO_BIT13, RT_GPIO_BIT2 | RT_GPIO_BIT13);
+
+		/* set GPIO 2 to IRQ function */
+		rt5611_ts_reg_write_mask(rt, RT_GPIO_PIN_SHARING, GPIO2_PIN_SHARING_IRQ, GPIO2_PIN_SHARING_MASK);	
+
+		/* set pen down to sticky mode */
+		rt5611_ts_reg_write_mask(rt ,RT_GPIO_PIN_STICKY, RT_GPIO_BIT13, RT_GPIO_BIT13);	
+		
+		/* set Pen down detect have Wake-up function */
+		rt5611_ts_reg_write_mask(rt, RT_GPIO_PIN_WAKEUP, RT_GPIO_BIT13, RT_GPIO_BIT13);	
+
+		/* Enable GPIO wakeup control */
+		rt5611_ts_reg_write_mask(rt, RT_MISC_CTRL, GPIO_WAKEUP_CTRL, GPIO_WAKEUP_CTRL);	
+
+		udelay(300);
+	}else{
+		rt5611_ts_reg_write_mask(rt, RT_PWR_MANAG_ADD1, 0, PWR_IP_ENA);
+		rt5611_ts_reg_write_mask(rt, RT_PWR_MANAG_ADD2, 0, PWR_TP_ADC);
+	}
+}
+
+/*
+ * The touchscreen sample reader.
+ */
+static int rt5611_ts_read_samples(struct rt5611_ts *rt)
+{
+	struct rt5611_ts_data data;
+	int rc = 0;
+
+	RT5611_TS_DEBUG("rt5611_ts_read_samples\n");
+
+	mutex_lock(&rt->codec->mutex);
+
+       rt5611_ts_enable(rt, RT_TP_ENABLE);
+
+	rc = rt5611_ts_poll_touch(rt, &data);
+	if (rc & RC_PENUP) {
+		if (rt->pen_is_down) {
+			rt->pen_is_down = 0;
+			RT5611_TS_DEBUG("rt5611_ts: pen up\n");
+			input_report_abs(rt->input_dev, ABS_PRESSURE, 0);
+			input_report_key(rt->input_dev, BTN_TOUCH, 0);
+			input_sync(rt->input_dev);
+		} else { /*rt->pen_is_down=0 */
+			/* We need high frequency updates only while
+			 * pen is down, the user never will be able to
+			 * touch screen faster than a few times per
+			 * second... On the other hand, when the user
+			 * is actively working with the touchscreen we
+			 * don't want to lose the quick response. So we
+			 * will slowly increase sleep time after the
+			 * pen is up and quicky restore it to ~one task
+			 * switch when pen is down again.
+			 */
+			RT5611_TS_DEBUG("rt5611_ts: rt->pen_is_down=0\n");
+			if (rt->ts_reader_interval < HZ / 10)
+				rt->ts_reader_interval++;		
+		}
+
+	} else if (rc & RC_VALID) {
+		
+#ifdef SWAP_X
+		data.x = 4095 - data.x;
+#endif
+#ifdef SWAP_Y
+		data.y = 4095 - data.y;
+#endif
+		
+		input_report_abs(rt->input_dev, ABS_X, data.x);
+		input_report_abs(rt->input_dev, ABS_Y, data.y);
+		input_report_abs(rt->input_dev, ABS_PRESSURE, data.p);
+		input_report_key(rt->input_dev, BTN_TOUCH, 1);
+		input_sync(rt->input_dev);
+		RT5611_TS_DEBUG("pen down: x=%d, y=%d, p=%d\n",
+				data.x, data.y, data.p);
+
+		rt->pen_is_down = 1;
+		rt->ts_reader_interval = rt->ts_reader_min_interval;
+	}
+
+	rt5611_ts_enable(rt, RT_TP_DISABLE);
+
+	mutex_unlock(&rt->codec->mutex);
+	return rc;
+}
+
+static void rt5611_ts_reader(struct work_struct *work)
+{
+	int rc = 0;
+	struct rt5611_ts *rt = container_of(work, struct rt5611_ts, ts_reader.work);
+
+#ifdef CONFIG_PM
+	/* Wait for codec resume done. To avoid system hang due to AC97 not wakeup (clock enable) and reset*/
+	if(rt5611_ts_resumed && !rt5610_codec_resumed)
+	{
+	       queue_delayed_work(rt->ts_workq, &rt->ts_reader,  100);
+		   return ;
+	}
+#endif
+	RT5611_TS_DEBUG("rt5611_ts_reader\n");
+
+	do {
+		rc = rt5611_ts_read_samples(rt);
+	} while (rc & RC_AGAIN);
+
+	/* Enable timer polling:*/
+	if (rt->pen_is_down || !rt->pen_irq)
+		queue_delayed_work(rt->ts_workq, &rt->ts_reader,
+				   rt->ts_reader_interval);
+
+	/* Pen Up, enable IRQ if IRQ has been assigned */
+	if (!rt->pen_is_down && rt->pen_irq) {
+		rt5611_ts_reg_write_mask(rt, RT_GPIO_PIN_STATUS, 0,
+					 RT_GPIO_BIT2 | RT_GPIO_BIT13);
+		enable_irq(rt->pen_irq);
+	}
+}
+
+static irqreturn_t  rt5611_ts_pen_interrupt(int irq, void *dev_id)
+{
+	struct  rt5611_ts *rt = dev_id;
+	RT5611_TS_DEBUG("rt5611_ts_pen_interrupt\n");
+
+	if (!work_pending(&rt->pen_event_work)) {
+		disable_irq_nosync(irq);
+		queue_work(rt->ts_workq, &rt->pen_event_work);
+	}
+	return IRQ_HANDLED;
+}
+/*
+ * Handle a pen down interrupt.
+ */
+static void rt5611_ts_pen_irq_worker(struct work_struct *work)
+{
+	struct rt5611_ts *rt = container_of(work, struct rt5611_ts, pen_event_work);
+	int pen_was_down = rt->pen_is_down;
+	u16 status, pol;
+
+	RT5611_TS_DEBUG("rt5611_ts_pen_irq_worker\n");
+
+	mutex_lock(&rt->codec->mutex);
+	status = rt5611_ts_reg_read(rt, RT_GPIO_PIN_STATUS);
+	pol = rt5611_ts_reg_read(rt, RT_GPIO_PIN_POLARITY);
+
+	if (RT_GPIO_BIT13 & pol & status)
+		rt->pen_is_down = 1;
+	else
+		rt->pen_is_down = 0;
+
+	mutex_unlock(&rt->codec->mutex);
+
+	/* Data is not availiable immediately on pen down */
+	queue_delayed_work(rt->ts_workq, &rt->ts_reader, 1);
+
+	/* Let ts_reader report the pen up for debounce. */
+	if (!rt->pen_is_down && pen_was_down)
+		rt->pen_is_down = 1;
+}
+
+
+
+/*
+ * initialise pen IRQ handler and workqueue
+ */
+static int  rt5611_ts_init_pen_irq(struct  rt5611_ts *rt)
+{
+
+	RT5611_TS_DEBUG("rt5611_ts_init_pen_irq\n");
+	/* If an interrupt is supplied an IRQ enable operation must also be
+	 * provided. */
+
+	if (request_irq(rt->pen_irq, rt5611_ts_pen_interrupt, IRQF_SHARED,
+			"rt5611_ts-pen", rt)) {
+		dev_err(rt->dev,
+			"Failed to register pen down interrupt, polling");
+		rt->pen_irq = 0;
+		return -EINVAL;
+	}
+
+
+	return 0;
+}
+
+static int rt5611_ts_input_open(struct input_dev *idev)
+{
+	struct rt5611_ts *rt = input_get_drvdata(idev);
+
+	RT5611_TS_DEBUG("rt5611_ts_input_open\n");
+	rt->ts_workq = create_singlethread_workqueue("rt5611_ts");
+	if (rt->ts_workq == NULL) {
+		dev_err(rt->dev,
+			"Failed to create workqueue\n");
+		return -EINVAL;
+	}
+
+	rt5611_ts_enable(rt, RT_TP_ENABLE);
+
+	INIT_DELAYED_WORK(&rt->ts_reader, rt5611_ts_reader);
+	INIT_WORK(&rt->pen_event_work, rt5611_ts_pen_irq_worker);
+
+	rt->ts_reader_min_interval = (HZ >= 100 ? HZ / 100 : 1);
+	rt->ts_reader_interval = rt->ts_reader_min_interval;
+
+	rt->pen_is_down = 0;
+	if (rt->pen_irq)
+		rt5611_ts_init_pen_irq(rt);
+	else
+		dev_err(rt->dev, "No IRQ specified\n");
+
+	/* If we either don't have an interrupt for pen down events or
+	 * failed to acquire it then we need to poll.
+	 */
+	if (rt->pen_irq == 0)
+		queue_delayed_work(rt->ts_workq, &rt->ts_reader,
+				   rt->ts_reader_interval);
+
+	return 0;
+}
+
+static void rt5611_ts_input_close(struct input_dev *idev)
+{
+	struct rt5611_ts *rt = input_get_drvdata(idev);
+	RT5611_TS_DEBUG("rt5611_ts_input_close\n");
+
+	if (rt->pen_irq) {
+		free_irq(rt->pen_irq, rt);
+	}
+
+	rt->pen_is_down = 0;
+
+
+	/* ts_reader rearms itself so we need to explicitly stop it
+	 * before we destroy the workqueue.
+	 */
+	cancel_delayed_work_sync(&rt->ts_reader);
+
+	destroy_workqueue(rt->ts_workq);
+
+
+}
+
+
+static int rt5611_ts_reset(struct snd_soc_codec *codec, int try_warm)
+{
+	RT5611_TS_DEBUG("rt5611_ts_reset(try warm=%d)\n", try_warm);
+
+	if (try_warm && soc_ac97_ops.warm_reset) {
+		soc_ac97_ops.warm_reset(codec->ac97);
+		if (soc_ac97_ops.read(codec->ac97, 0) == rt5611_reg_defalt_00h)
+			return 1;
+	}
+
+	soc_ac97_ops.reset(codec->ac97);
+	if (soc_ac97_ops.read(codec->ac97, 0) != rt5611_reg_defalt_00h)
+		return -EIO;
+        mdelay(10);
+	return 0;
+}
+
+static int rt5611_ts_probe(struct platform_device *pdev)
+{
+	struct rt5611_ts *rt;
+	int ret = 0;
+	RT5611_TS_DEBUG("rt5611_ts_probe\n");
+
+
+	rt = kzalloc(sizeof(struct rt5611_ts), GFP_KERNEL);
+	if (!rt)
+		return -ENOMEM;
+	rt->codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
+	if (rt->codec == NULL)
+		return -ENOMEM;
+
+	mutex_init(&rt->codec->mutex);
+	ret = snd_soc_new_ac97_codec(rt->codec, &soc_ac97_ops, 0);
+	if (ret < 0)
+		goto alloc_err;
+
+	rt->dev = &pdev->dev;
+	platform_set_drvdata(pdev, rt);
+
+	rt->pen_irq = platform_get_irq(pdev, 0);
+	RT5611_TS_DEBUG("rt5611_ts: Pendown IRQ=%x\n", rt->pen_irq);
+
+	rt5611_ts_reset(rt->codec, 0); /* Cold RESET */
+	ret = rt5611_ts_reset(rt->codec, 1); /* Warm RESET */
+	if (ret < 0) {
+		printk(KERN_ERR "FAIL to reset rt5611\n");
+		goto reset_err;
+	}
+
+	rt->id = rt5611_ts_reg_read(rt, RT_VENDOR_ID2);
+	RT5611_TS_DEBUG("rt5611_ts: Vendor id=%08X\n", rt->id);
+
+	/* set up physical characteristics */
+	rt5611_ts_phy_init(rt);
+	/* load gpio cache */
+
+	rt->input_dev = input_allocate_device();
+	if (rt->input_dev == NULL) {
+		ret = -ENOMEM;
+		goto alloc_err;
+	}
+
+	/* set up touch configuration */
+	rt->input_dev->name = "rt5611 touchscreen";
+	rt->input_dev->phys = "rt5611";
+	rt->input_dev->open = rt5611_ts_input_open;
+	rt->input_dev->close = rt5611_ts_input_close;
+
+	rt->input_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS);
+	rt->input_dev->absbit[0] = BIT_MASK(ABS_X) | BIT_MASK(ABS_Y) | BIT_MASK(ABS_PRESSURE);
+	rt->input_dev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
+
+	input_set_abs_params(rt->input_dev, ABS_X, abs_x[0], abs_x[1], abs_x[2], 0);
+	input_set_abs_params(rt->input_dev, ABS_Y, abs_y[0], abs_y[1], abs_y[2], 0);
+	input_set_abs_params(rt->input_dev, ABS_PRESSURE, abs_p[0], abs_p[1],
+			     abs_p[2], 0);
+
+	input_set_drvdata(rt->input_dev, rt);
+	rt->input_dev->dev.parent = pdev->dev.parent;
+
+	ret = input_register_device(rt->input_dev);
+	if (ret < 0)
+		goto dev_alloc_err;
+
+	return ret;
+
+reset_err:
+	snd_soc_free_ac97_codec(rt->codec);
+ dev_alloc_err:
+	input_free_device(rt->input_dev);
+ alloc_err:
+	kfree(rt);
+
+	return ret;
+}
+
+
+static int rt5611_ts_remove(struct platform_device *pdev)
+{
+	struct rt5611_ts *rt = dev_get_drvdata(&pdev->dev);
+	RT5611_TS_DEBUG("rt5611_ts_remove\n");
+
+	input_unregister_device(rt->input_dev);
+	kfree(rt);
+
+	return 0;
+}
+
+#ifdef CONFIG_PM
+static int rt5611_ts_resume(struct platform_device *pdev)
+{
+	struct rt5611_ts *rt = platform_get_drvdata(pdev);
+	RT5611_TS_DEBUG("rt5611_ts_resume\n");
+        queue_delayed_work(rt->ts_workq, &rt->ts_reader,  100);
+	rt5611_ts_resumed=1;
+	return 0;
+}
+
+static int rt5611_ts_suspend(struct platform_device *pdev, pm_message_t state)
+{
+	struct rt5611_ts *rt = platform_get_drvdata(pdev);
+
+	RT5611_TS_DEBUG("rt5611_ts_suspend\n");
+		cancel_delayed_work_sync(&rt->ts_reader);
+
+	if (rt->pen_irq)
+		disable_irq(rt->pen_irq);
+	rt5611_ts_resumed=0;
+	return 0;
+}
+#else
+#define rt5611_ts_suspend		NULL
+#define rt5611_ts_resume		NULL
+#endif
+
+static struct platform_driver rt5611_ts_driver = {
+	.driver = {
+		.name =		"rt5611_ts",
+		.owner =		THIS_MODULE,
+	},
+	.probe =		rt5611_ts_probe,
+	.remove =	rt5611_ts_remove,
+	.suspend =	rt5611_ts_suspend,
+	.resume =	rt5611_ts_resume,
+};
+static int __init rt5611_ts_init(void)
+{
+	return platform_driver_register(&rt5611_ts_driver);
+}
+
+static void __exit rt5611_ts_exit(void)
+{
+	platform_driver_unregister(&rt5611_ts_driver);
+}
+
+module_init(rt5611_ts_init);
+module_exit(rt5611_ts_exit);
+
+/* Module information */
+MODULE_AUTHOR("bhsu");
+MODULE_DESCRIPTION("Realtek ACL66511-Touch Screen Driver");
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/drivers/input/touchscreen/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/input/touchscreen/Kconfig
@@ -271,6 +271,12 @@
 	  To compile this driver as a module, choose M here: the
 	  module will be called migor_ts.
 
+config TOUCHSCREEN_SYNAPTICS_I2C_RMI
+	tristate "Synaptics i2c touchscreen"
+	depends on I2C
+	help
+	  This enables support for Synaptics RMI over I2C based touchscreens.
+
 config TOUCHSCREEN_TOUCHRIGHT
 	tristate "Touchright serial touchscreen"
 	select SERIO
@@ -491,15 +497,25 @@
 	depends on TOUCHSCREEN_USB_COMPOSITE
 
 config TOUCHSCREEN_TOUCHIT213
-	tristate "Sahara TouchIT-213 touchscreen"
-	select SERIO
-	help
-	  Say Y here if you have a Sahara TouchIT-213 Tablet PC.
-
-	  If unsure, say N.
+        tristate "Sahara TouchIT-213 touchscreen"
+        select SERIO
+        help
+          Say Y here if you have a Sahara TouchIT-213 Tablet PC.
+          If unsure, say N.
+          To compile this driver as a module, choose M here: the
+          module will be called touchit213.
+
+config TOUCHSCREEN_TSC2005
+	tristate "TSC2005 touchscreens"
+	depends on SPI_MASTER
+	help
+	  Say Y here if you have a touchscreen interface using the
+	  TSC2005 controller, and your board-specific
+	  setup code includes that in its table of SPI devices.
+	  If unsure, say N (but it's safe to say "Y").
 
 	  To compile this driver as a module, choose M here: the
-	  module will be called touchit213.
+	  module will be called tsc2005.
 
 config TOUCHSCREEN_TSC2007
 	tristate "TSC2007 based touchscreens"
@@ -530,4 +546,19 @@
 
 	  To compile this driver as a module, choose M here: the
 	  module will be called pcap_ts.
+
+config TOUCHSCREEN_RT5611
+        tristate "RT5611 touchscreens"
+        depends on AC97_BUS
+        help
+          Say Y here if you have a touchscreen interface using the
+          Realtek ALC5611 controller, and your board-specific
+          setup code includes that in its table of AC97 devices.
+
+          If unsure, say N (but it's safe to say "Y").
+
+          To compile this driver as a module, choose M here: the
+          module will be called rt5611_ts.
+
 endif
+
--- linux-mvl-dove-2.6.32.orig/drivers/input/touchscreen/synaptics_i2c_rmi.c
+++ linux-mvl-dove-2.6.32/drivers/input/touchscreen/synaptics_i2c_rmi.c
@@ -0,0 +1,632 @@
+/* drivers/input/keyboard/synaptics_i2c_rmi.c
+ *
+ * Copyright (C) 2007 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/earlysuspend.h>
+#include <linux/hrtimer.h>
+#include <linux/i2c.h>
+#include <linux/input.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/platform_device.h>
+#include <linux/synaptics_i2c_rmi.h>
+
+#define swap(x, y) do { typeof(x) z = x; x = y; y = z; } while (0)
+
+static struct workqueue_struct *synaptics_wq;
+
+struct synaptics_ts_data {
+	uint16_t addr;
+	struct i2c_client *client;
+	struct input_dev *input_dev;
+	int use_irq;
+	struct hrtimer timer;
+	struct work_struct  work;
+	uint16_t max[2];
+	int snap_state[2][2];
+	int snap_down_on[2];
+	int snap_down_off[2];
+	int snap_up_on[2];
+	int snap_up_off[2];
+	int snap_down[2];
+	int snap_up[2];
+	uint32_t flags;
+	int (*power)(int on);
+	struct early_suspend early_suspend;
+};
+
+#ifdef CONFIG_HAS_EARLYSUSPEND
+static void synaptics_ts_early_suspend(struct early_suspend *h);
+static void synaptics_ts_late_resume(struct early_suspend *h);
+#endif
+
+static int synaptics_init_panel(struct synaptics_ts_data *ts)
+{
+	int ret;
+
+	ret = i2c_smbus_write_byte_data(ts->client, 0xff, 0x10); /* page select = 0x10 */
+	if (ret < 0) {
+		printk(KERN_ERR "i2c_smbus_write_byte_data failed for page select\n");
+		goto err_page_select_failed;
+	}
+	ret = i2c_smbus_write_byte_data(ts->client, 0x41, 0x04); /* Set "No Clip Z" */
+	if (ret < 0)
+		printk(KERN_ERR "i2c_smbus_write_byte_data failed for No Clip Z\n");
+
+err_page_select_failed:
+	ret = i2c_smbus_write_byte_data(ts->client, 0xff, 0x04); /* page select = 0x04 */
+	if (ret < 0)
+		printk(KERN_ERR "i2c_smbus_write_byte_data failed for page select\n");
+	ret = i2c_smbus_write_byte_data(ts->client, 0xf0, 0x81); /* normal operation, 80 reports per second */
+	if (ret < 0)
+		printk(KERN_ERR "synaptics_ts_resume: i2c_smbus_write_byte_data failed\n");
+	return ret;
+}
+
+static void synaptics_ts_work_func(struct work_struct *work)
+{
+	int i;
+	int ret;
+	int bad_data = 0;
+	struct i2c_msg msg[2];
+	uint8_t start_reg;
+	uint8_t buf[15];
+	struct synaptics_ts_data *ts = container_of(work, struct synaptics_ts_data, work);
+
+	msg[0].addr = ts->client->addr;
+	msg[0].flags = 0;
+	msg[0].len = 1;
+	msg[0].buf = &start_reg;
+	start_reg = 0x00;
+	msg[1].addr = ts->client->addr;
+	msg[1].flags = I2C_M_RD;
+	msg[1].len = sizeof(buf);
+	msg[1].buf = buf;
+
+	/* printk("synaptics_ts_work_func\n"); */
+	for (i = 0; i < ((ts->use_irq && !bad_data) ? 1 : 10); i++) {
+		ret = i2c_transfer(ts->client->adapter, msg, 2);
+		if (ret < 0) {
+			printk(KERN_ERR "synaptics_ts_work_func: i2c_transfer failed\n");
+			bad_data = 1;
+		} else {
+			/* printk("synaptics_ts_work_func: %x %x %x %x %x %x" */
+			/*        " %x %x %x %x %x %x %x %x %x, ret %d\n", */
+			/*        buf[0], buf[1], buf[2], buf[3], */
+			/*        buf[4], buf[5], buf[6], buf[7], */
+			/*        buf[8], buf[9], buf[10], buf[11], */
+			/*        buf[12], buf[13], buf[14], ret); */
+			if ((buf[14] & 0xc0) != 0x40) {
+				printk(KERN_WARNING "synaptics_ts_work_func:"
+				       " bad read %x %x %x %x %x %x %x %x %x"
+				       " %x %x %x %x %x %x, ret %d\n",
+				       buf[0], buf[1], buf[2], buf[3],
+				       buf[4], buf[5], buf[6], buf[7],
+				       buf[8], buf[9], buf[10], buf[11],
+				       buf[12], buf[13], buf[14], ret);
+				if (bad_data)
+					synaptics_init_panel(ts);
+				bad_data = 1;
+				continue;
+			}
+			bad_data = 0;
+			if ((buf[14] & 1) == 0) {
+				/* printk("read %d coordinates\n", i); */
+				break;
+			} else {
+				int pos[2][2];
+				int f, a;
+				int base;
+				/* int x = buf[3] | (uint16_t)(buf[2] & 0x1f) << 8; */
+				/* int y = buf[5] | (uint16_t)(buf[4] & 0x1f) << 8; */
+				int z = buf[1];
+				int w = buf[0] >> 4;
+				int finger = buf[0] & 7;
+
+				/* int x2 = buf[3+6] | (uint16_t)(buf[2+6] & 0x1f) << 8; */
+				/* int y2 = buf[5+6] | (uint16_t)(buf[4+6] & 0x1f) << 8; */
+				/* int z2 = buf[1+6]; */
+				/* int w2 = buf[0+6] >> 4; */
+				/* int finger2 = buf[0+6] & 7; */
+
+				/* int dx = (int8_t)buf[12]; */
+				/* int dy = (int8_t)buf[13]; */
+				int finger2_pressed;
+
+				/* printk("x %4d, y %4d, z %3d, w %2d, F %d, 2nd: x %4d, y %4d, z %3d, w %2d, F %d, dx %4d, dy %4d\n", */
+				/*	x, y, z, w, finger, */
+				/*	x2, y2, z2, w2, finger2, */
+				/*	dx, dy); */
+
+				base = 2;
+				for (f = 0; f < 2; f++) {
+					uint32_t flip_flag = SYNAPTICS_FLIP_X;
+					for (a = 0; a < 2; a++) {
+						int p = buf[base + 1];
+						p |= (uint16_t)(buf[base] & 0x1f) << 8;
+						if (ts->flags & flip_flag)
+							p = ts->max[a] - p;
+						if (ts->flags & SYNAPTICS_SNAP_TO_INACTIVE_EDGE) {
+							if (ts->snap_state[f][a]) {
+								if (p <= ts->snap_down_off[a])
+									p = ts->snap_down[a];
+								else if (p >= ts->snap_up_off[a])
+									p = ts->snap_up[a];
+								else
+									ts->snap_state[f][a] = 0;
+							} else {
+								if (p <= ts->snap_down_on[a]) {
+									p = ts->snap_down[a];
+									ts->snap_state[f][a] = 1;
+								} else if (p >= ts->snap_up_on[a]) {
+									p = ts->snap_up[a];
+									ts->snap_state[f][a] = 1;
+								}
+							}
+						}
+						pos[f][a] = p;
+						base += 2;
+						flip_flag <<= 1;
+					}
+					base += 2;
+					if (ts->flags & SYNAPTICS_SWAP_XY)
+						swap(pos[f][0], pos[f][1]);
+				}
+				if (z) {
+					input_report_abs(ts->input_dev, ABS_X, pos[0][0]);
+					input_report_abs(ts->input_dev, ABS_Y, pos[0][1]);
+				}
+				input_report_abs(ts->input_dev, ABS_PRESSURE, z);
+				input_report_abs(ts->input_dev, ABS_TOOL_WIDTH, w);
+				input_report_key(ts->input_dev, BTN_TOUCH, finger);
+				finger2_pressed = finger > 1 && finger != 7;
+				input_report_key(ts->input_dev, BTN_2, finger2_pressed);
+				if (finger2_pressed) {
+					input_report_abs(ts->input_dev, ABS_HAT0X, pos[1][0]);
+					input_report_abs(ts->input_dev, ABS_HAT0Y, pos[1][1]);
+				}
+				input_sync(ts->input_dev);
+			}
+		}
+	}
+	if (ts->use_irq)
+		enable_irq(ts->client->irq);
+}
+
+static enum hrtimer_restart synaptics_ts_timer_func(struct hrtimer *timer)
+{
+	struct synaptics_ts_data *ts = container_of(timer, struct synaptics_ts_data, timer);
+	/* printk("synaptics_ts_timer_func\n"); */
+
+	queue_work(synaptics_wq, &ts->work);
+
+	hrtimer_start(&ts->timer, ktime_set(0, 12500000), HRTIMER_MODE_REL);
+	return HRTIMER_NORESTART;
+}
+
+static irqreturn_t synaptics_ts_irq_handler(int irq, void *dev_id)
+{
+	struct synaptics_ts_data *ts = dev_id;
+
+	/* printk("synaptics_ts_irq_handler\n"); */
+	disable_irq(ts->client->irq);
+	queue_work(synaptics_wq, &ts->work);
+	return IRQ_HANDLED;
+}
+
+static int synaptics_ts_probe(
+	struct i2c_client *client, const struct i2c_device_id *id)
+{
+	struct synaptics_ts_data *ts;
+	uint8_t buf0[4];
+	uint8_t buf1[8];
+	struct i2c_msg msg[2];
+	int ret = 0;
+	uint16_t max_x, max_y;
+	int fuzz_x, fuzz_y, fuzz_p, fuzz_w;
+	struct synaptics_i2c_rmi_platform_data *pdata;
+	int inactive_area_left;
+	int inactive_area_right;
+	int inactive_area_top;
+	int inactive_area_bottom;
+	int snap_left_on;
+	int snap_left_off;
+	int snap_right_on;
+	int snap_right_off;
+	int snap_top_on;
+	int snap_top_off;
+	int snap_bottom_on;
+	int snap_bottom_off;
+	uint32_t panel_version;
+
+	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
+		printk(KERN_ERR "synaptics_ts_probe: need I2C_FUNC_I2C\n");
+		ret = -ENODEV;
+		goto err_check_functionality_failed;
+	}
+
+	ts = kzalloc(sizeof(*ts), GFP_KERNEL);
+	if (ts == NULL) {
+		ret = -ENOMEM;
+		goto err_alloc_data_failed;
+	}
+	INIT_WORK(&ts->work, synaptics_ts_work_func);
+	ts->client = client;
+	i2c_set_clientdata(client, ts);
+	pdata = client->dev.platform_data;
+	if (pdata)
+		ts->power = pdata->power;
+	if (ts->power) {
+		ret = ts->power(1);
+		if (ret < 0) {
+			printk(KERN_ERR "synaptics_ts_probe power on failed\n");
+			goto err_power_failed;
+		}
+	}
+
+	ret = i2c_smbus_write_byte_data(ts->client, 0xf4, 0x01); /* device command = reset */
+	if (ret < 0) {
+		printk(KERN_ERR "i2c_smbus_write_byte_data failed\n");
+		/* fail? */
+	}
+	{
+		int retry = 10;
+		while (retry-- > 0) {
+			ret = i2c_smbus_read_byte_data(ts->client, 0xe4);
+			if (ret >= 0)
+				break;
+			msleep(100);
+		}
+	}
+	if (ret < 0) {
+		printk(KERN_ERR "i2c_smbus_read_byte_data failed\n");
+		goto err_detect_failed;
+	}
+	printk(KERN_INFO "synaptics_ts_probe: Product Major Version %x\n", ret);
+	panel_version = ret << 8;
+	ret = i2c_smbus_read_byte_data(ts->client, 0xe5);
+	if (ret < 0) {
+		printk(KERN_ERR "i2c_smbus_read_byte_data failed\n");
+		goto err_detect_failed;
+	}
+	printk(KERN_INFO "synaptics_ts_probe: Product Minor Version %x\n", ret);
+	panel_version |= ret;
+
+	ret = i2c_smbus_read_byte_data(ts->client, 0xe3);
+	if (ret < 0) {
+		printk(KERN_ERR "i2c_smbus_read_byte_data failed\n");
+		goto err_detect_failed;
+	}
+	printk(KERN_INFO "synaptics_ts_probe: product property %x\n", ret);
+
+	if (pdata) {
+		while (pdata->version > panel_version)
+			pdata++;
+		ts->flags = pdata->flags;
+		inactive_area_left = pdata->inactive_left;
+		inactive_area_right = pdata->inactive_right;
+		inactive_area_top = pdata->inactive_top;
+		inactive_area_bottom = pdata->inactive_bottom;
+		snap_left_on = pdata->snap_left_on;
+		snap_left_off = pdata->snap_left_off;
+		snap_right_on = pdata->snap_right_on;
+		snap_right_off = pdata->snap_right_off;
+		snap_top_on = pdata->snap_top_on;
+		snap_top_off = pdata->snap_top_off;
+		snap_bottom_on = pdata->snap_bottom_on;
+		snap_bottom_off = pdata->snap_bottom_off;
+		fuzz_x = pdata->fuzz_x;
+		fuzz_y = pdata->fuzz_y;
+		fuzz_p = pdata->fuzz_p;
+		fuzz_w = pdata->fuzz_w;
+	} else {
+		inactive_area_left = 0;
+		inactive_area_right = 0;
+		inactive_area_top = 0;
+		inactive_area_bottom = 0;
+		snap_left_on = 0;
+		snap_left_off = 0;
+		snap_right_on = 0;
+		snap_right_off = 0;
+		snap_top_on = 0;
+		snap_top_off = 0;
+		snap_bottom_on = 0;
+		snap_bottom_off = 0;
+		fuzz_x = 0;
+		fuzz_y = 0;
+		fuzz_p = 0;
+		fuzz_w = 0;
+	}
+
+	ret = i2c_smbus_read_byte_data(ts->client, 0xf0);
+	if (ret < 0) {
+		printk(KERN_ERR "i2c_smbus_read_byte_data failed\n");
+		goto err_detect_failed;
+	}
+	printk(KERN_INFO "synaptics_ts_probe: device control %x\n", ret);
+
+	ret = i2c_smbus_read_byte_data(ts->client, 0xf1);
+	if (ret < 0) {
+		printk(KERN_ERR "i2c_smbus_read_byte_data failed\n");
+		goto err_detect_failed;
+	}
+	printk(KERN_INFO "synaptics_ts_probe: interrupt enable %x\n", ret);
+
+	ret = i2c_smbus_write_byte_data(ts->client, 0xf1, 0); /* disable interrupt */
+	if (ret < 0) {
+		printk(KERN_ERR "i2c_smbus_write_byte_data failed\n");
+		goto err_detect_failed;
+	}
+
+	msg[0].addr = ts->client->addr;
+	msg[0].flags = 0;
+	msg[0].len = 1;
+	msg[0].buf = buf0;
+	buf0[0] = 0xe0;
+	msg[1].addr = ts->client->addr;
+	msg[1].flags = I2C_M_RD;
+	msg[1].len = 8;
+	msg[1].buf = buf1;
+	ret = i2c_transfer(ts->client->adapter, msg, 2);
+	if (ret < 0) {
+		printk(KERN_ERR "i2c_transfer failed\n");
+		goto err_detect_failed;
+	}
+	printk(KERN_INFO "synaptics_ts_probe: 0xe0: %x %x %x %x %x %x %x %x\n",
+	       buf1[0], buf1[1], buf1[2], buf1[3],
+	       buf1[4], buf1[5], buf1[6], buf1[7]);
+
+	ret = i2c_smbus_write_byte_data(ts->client, 0xff, 0x10); /* page select = 0x10 */
+	if (ret < 0) {
+		printk(KERN_ERR "i2c_smbus_write_byte_data failed for page select\n");
+		goto err_detect_failed;
+	}
+	ret = i2c_smbus_read_word_data(ts->client, 0x04);
+	if (ret < 0) {
+		printk(KERN_ERR "i2c_smbus_read_word_data failed\n");
+		goto err_detect_failed;
+	}
+	ts->max[0] = max_x = (ret >> 8 & 0xff) | ((ret & 0x1f) << 8);
+	ret = i2c_smbus_read_word_data(ts->client, 0x06);
+	if (ret < 0) {
+		printk(KERN_ERR "i2c_smbus_read_word_data failed\n");
+		goto err_detect_failed;
+	}
+	ts->max[1] = max_y = (ret >> 8 & 0xff) | ((ret & 0x1f) << 8);
+	if (ts->flags & SYNAPTICS_SWAP_XY)
+		swap(max_x, max_y);
+
+	ret = synaptics_init_panel(ts); /* will also switch back to page 0x04 */
+	if (ret < 0) {
+		printk(KERN_ERR "synaptics_init_panel failed\n");
+		goto err_detect_failed;
+	}
+
+	ts->input_dev = input_allocate_device();
+	if (ts->input_dev == NULL) {
+		ret = -ENOMEM;
+		printk(KERN_ERR "synaptics_ts_probe: Failed to allocate input device\n");
+		goto err_input_dev_alloc_failed;
+	}
+	ts->input_dev->name = "synaptics-rmi-touchscreen";
+	set_bit(EV_SYN, ts->input_dev->evbit);
+	set_bit(EV_KEY, ts->input_dev->evbit);
+	set_bit(BTN_TOUCH, ts->input_dev->keybit);
+	set_bit(BTN_2, ts->input_dev->keybit);
+	set_bit(EV_ABS, ts->input_dev->evbit);
+	inactive_area_left = inactive_area_left * max_x / 0x10000;
+	inactive_area_right = inactive_area_right * max_x / 0x10000;
+	inactive_area_top = inactive_area_top * max_y / 0x10000;
+	inactive_area_bottom = inactive_area_bottom * max_y / 0x10000;
+	snap_left_on = snap_left_on * max_x / 0x10000;
+	snap_left_off = snap_left_off * max_x / 0x10000;
+	snap_right_on = snap_right_on * max_x / 0x10000;
+	snap_right_off = snap_right_off * max_x / 0x10000;
+	snap_top_on = snap_top_on * max_y / 0x10000;
+	snap_top_off = snap_top_off * max_y / 0x10000;
+	snap_bottom_on = snap_bottom_on * max_y / 0x10000;
+	snap_bottom_off = snap_bottom_off * max_y / 0x10000;
+	fuzz_x = fuzz_x * max_x / 0x10000;
+	fuzz_y = fuzz_y * max_y / 0x10000;
+	ts->snap_down[!!(ts->flags & SYNAPTICS_SWAP_XY)] = -inactive_area_left;
+	ts->snap_up[!!(ts->flags & SYNAPTICS_SWAP_XY)] = max_x + inactive_area_right;
+	ts->snap_down[!(ts->flags & SYNAPTICS_SWAP_XY)] = -inactive_area_top;
+	ts->snap_up[!(ts->flags & SYNAPTICS_SWAP_XY)] = max_y + inactive_area_bottom;
+	ts->snap_down_on[!!(ts->flags & SYNAPTICS_SWAP_XY)] = snap_left_on;
+	ts->snap_down_off[!!(ts->flags & SYNAPTICS_SWAP_XY)] = snap_left_off;
+	ts->snap_up_on[!!(ts->flags & SYNAPTICS_SWAP_XY)] = max_x - snap_right_on;
+	ts->snap_up_off[!!(ts->flags & SYNAPTICS_SWAP_XY)] = max_x - snap_right_off;
+	ts->snap_down_on[!(ts->flags & SYNAPTICS_SWAP_XY)] = snap_top_on;
+	ts->snap_down_off[!(ts->flags & SYNAPTICS_SWAP_XY)] = snap_top_off;
+	ts->snap_up_on[!(ts->flags & SYNAPTICS_SWAP_XY)] = max_y - snap_bottom_on;
+	ts->snap_up_off[!(ts->flags & SYNAPTICS_SWAP_XY)] = max_y - snap_bottom_off;
+	printk(KERN_INFO "synaptics_ts_probe: max_x %d, max_y %d\n", max_x, max_y);
+	printk(KERN_INFO "synaptics_ts_probe: inactive_x %d %d, inactive_y %d %d\n",
+	       inactive_area_left, inactive_area_right,
+	       inactive_area_top, inactive_area_bottom);
+	printk(KERN_INFO "synaptics_ts_probe: snap_x %d-%d %d-%d, snap_y %d-%d %d-%d\n",
+	       snap_left_on, snap_left_off, snap_right_on, snap_right_off,
+	       snap_top_on, snap_top_off, snap_bottom_on, snap_bottom_off);
+	input_set_abs_params(ts->input_dev, ABS_X, -inactive_area_left, max_x + inactive_area_right, fuzz_x, 0);
+	input_set_abs_params(ts->input_dev, ABS_Y, -inactive_area_top, max_y + inactive_area_bottom, fuzz_y, 0);
+	input_set_abs_params(ts->input_dev, ABS_PRESSURE, 0, 255, fuzz_p, 0);
+	input_set_abs_params(ts->input_dev, ABS_TOOL_WIDTH, 0, 15, fuzz_w, 0);
+	input_set_abs_params(ts->input_dev, ABS_HAT0X, -inactive_area_left, max_x + inactive_area_right, fuzz_x, 0);
+	input_set_abs_params(ts->input_dev, ABS_HAT0Y, -inactive_area_top, max_y + inactive_area_bottom, fuzz_y, 0);
+	/* ts->input_dev->name = ts->keypad_info->name; */
+	ret = input_register_device(ts->input_dev);
+	if (ret) {
+		printk(KERN_ERR "synaptics_ts_probe: Unable to register %s input device\n", ts->input_dev->name);
+		goto err_input_register_device_failed;
+	}
+	if (client->irq) {
+		ret = request_irq(client->irq, synaptics_ts_irq_handler, 0, client->name, ts);
+		if (ret == 0) {
+			ret = i2c_smbus_write_byte_data(ts->client, 0xf1, 0x01); /* enable abs int */
+			if (ret)
+				free_irq(client->irq, ts);
+		}
+		if (ret == 0)
+			ts->use_irq = 1;
+		else
+			dev_err(&client->dev, "request_irq failed\n");
+	}
+	if (!ts->use_irq) {
+		hrtimer_init(&ts->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
+		ts->timer.function = synaptics_ts_timer_func;
+		hrtimer_start(&ts->timer, ktime_set(1, 0), HRTIMER_MODE_REL);
+	}
+#ifdef CONFIG_HAS_EARLYSUSPEND
+	ts->early_suspend.level = EARLY_SUSPEND_LEVEL_BLANK_SCREEN + 1;
+	ts->early_suspend.suspend = synaptics_ts_early_suspend;
+	ts->early_suspend.resume = synaptics_ts_late_resume;
+	register_early_suspend(&ts->early_suspend);
+#endif
+
+	printk(KERN_INFO "synaptics_ts_probe: Start touchscreen %s in %s mode\n", ts->input_dev->name, ts->use_irq ? "interrupt" : "polling");
+
+	return 0;
+
+err_input_register_device_failed:
+	input_free_device(ts->input_dev);
+
+err_input_dev_alloc_failed:
+err_detect_failed:
+err_power_failed:
+	kfree(ts);
+err_alloc_data_failed:
+err_check_functionality_failed:
+	return ret;
+}
+
+static int synaptics_ts_remove(struct i2c_client *client)
+{
+	struct synaptics_ts_data *ts = i2c_get_clientdata(client);
+	unregister_early_suspend(&ts->early_suspend);
+	if (ts->use_irq)
+		free_irq(client->irq, ts);
+	else
+		hrtimer_cancel(&ts->timer);
+	input_unregister_device(ts->input_dev);
+	kfree(ts);
+	return 0;
+}
+
+static int synaptics_ts_suspend(struct i2c_client *client, pm_message_t mesg)
+{
+	int ret;
+	struct synaptics_ts_data *ts = i2c_get_clientdata(client);
+
+	if (ts->use_irq)
+		disable_irq(client->irq);
+	else
+		hrtimer_cancel(&ts->timer);
+	ret = cancel_work_sync(&ts->work);
+	if (ret && ts->use_irq) /* if work was pending disable-count is now 2 */
+		enable_irq(client->irq);
+	ret = i2c_smbus_write_byte_data(ts->client, 0xf1, 0); /* disable interrupt */
+	if (ret < 0)
+		printk(KERN_ERR "synaptics_ts_suspend: i2c_smbus_write_byte_data failed\n");
+
+	ret = i2c_smbus_write_byte_data(client, 0xf0, 0x86); /* deep sleep */
+	if (ret < 0)
+		printk(KERN_ERR "synaptics_ts_suspend: i2c_smbus_write_byte_data failed\n");
+	if (ts->power) {
+		ret = ts->power(0);
+		if (ret < 0)
+			printk(KERN_ERR "synaptics_ts_resume power off failed\n");
+	}
+	return 0;
+}
+
+static int synaptics_ts_resume(struct i2c_client *client)
+{
+	int ret;
+	struct synaptics_ts_data *ts = i2c_get_clientdata(client);
+
+	if (ts->power) {
+		ret = ts->power(1);
+		if (ret < 0)
+			printk(KERN_ERR "synaptics_ts_resume power on failed\n");
+	}
+
+	synaptics_init_panel(ts);
+
+	if (ts->use_irq)
+		enable_irq(client->irq);
+
+	if (!ts->use_irq)
+		hrtimer_start(&ts->timer, ktime_set(1, 0), HRTIMER_MODE_REL);
+	else
+		i2c_smbus_write_byte_data(ts->client, 0xf1, 0x01); /* enable abs int */
+
+	return 0;
+}
+
+#ifdef CONFIG_HAS_EARLYSUSPEND
+static void synaptics_ts_early_suspend(struct early_suspend *h)
+{
+	struct synaptics_ts_data *ts;
+	ts = container_of(h, struct synaptics_ts_data, early_suspend);
+	synaptics_ts_suspend(ts->client, PMSG_SUSPEND);
+}
+
+static void synaptics_ts_late_resume(struct early_suspend *h)
+{
+	struct synaptics_ts_data *ts;
+	ts = container_of(h, struct synaptics_ts_data, early_suspend);
+	synaptics_ts_resume(ts->client);
+}
+#endif
+
+static const struct i2c_device_id synaptics_ts_id[] = {
+	{ SYNAPTICS_I2C_RMI_NAME, 0 },
+	{ }
+};
+
+static struct i2c_driver synaptics_ts_driver = {
+	.probe		= synaptics_ts_probe,
+	.remove		= synaptics_ts_remove,
+#ifndef CONFIG_HAS_EARLYSUSPEND
+	.suspend	= synaptics_ts_suspend,
+	.resume		= synaptics_ts_resume,
+#endif
+	.id_table	= synaptics_ts_id,
+	.driver = {
+		.name	= SYNAPTICS_I2C_RMI_NAME,
+	},
+};
+
+static int __devinit synaptics_ts_init(void)
+{
+	synaptics_wq = create_singlethread_workqueue("synaptics_wq");
+	if (!synaptics_wq)
+		return -ENOMEM;
+	return i2c_add_driver(&synaptics_ts_driver);
+}
+
+static void __exit synaptics_ts_exit(void)
+{
+	i2c_del_driver(&synaptics_ts_driver);
+	if (synaptics_wq)
+		destroy_workqueue(synaptics_wq);
+}
+
+module_init(synaptics_ts_init);
+module_exit(synaptics_ts_exit);
+
+MODULE_DESCRIPTION("Synaptics Touchscreen Driver");
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/drivers/input/touchscreen/Makefile
+++ linux-mvl-dove-2.6.32/drivers/input/touchscreen/Makefile
@@ -26,6 +26,7 @@
 obj-$(CONFIG_TOUCHSCREEN_HTCPEN)	+= htcpen.o
 obj-$(CONFIG_TOUCHSCREEN_USB_COMPOSITE)	+= usbtouchscreen.o
 obj-$(CONFIG_TOUCHSCREEN_PENMOUNT)	+= penmount.o
+obj-$(CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI)	+= synaptics_i2c_rmi.o
 obj-$(CONFIG_TOUCHSCREEN_TOUCHIT213)	+= touchit213.o
 obj-$(CONFIG_TOUCHSCREEN_TOUCHRIGHT)	+= touchright.o
 obj-$(CONFIG_TOUCHSCREEN_TOUCHWIN)	+= touchwin.o
@@ -42,3 +43,5 @@
 obj-$(CONFIG_TOUCHSCREEN_WM97XX_ZYLONITE)	+= zylonite-wm97xx.o
 obj-$(CONFIG_TOUCHSCREEN_W90X900)	+= w90p910_ts.o
 obj-$(CONFIG_TOUCHSCREEN_PCAP)		+= pcap_ts.o
+obj-$(CONFIG_TOUCHSCREEN_TSC2005)	+= tsc2005.o
+obj-$(CONFIG_TOUCHSCREEN_RT5611)        += rt5611_ts.o
\ No newline at end of file
--- linux-mvl-dove-2.6.32.orig/drivers/input/touchscreen/tsc2005.c
+++ linux-mvl-dove-2.6.32/drivers/input/touchscreen/tsc2005.c
@@ -0,0 +1,897 @@
+/*
+ *	Driver for TI Touch Screen Controller TSC2005 
+ *	 
+ * 
+ * TSC Interfaced with Atmel AT91sam9261ek board,
+ * with PENIRQ connected to AT91_PIN_PB0 and on
+ * SPI0.2 (spi0 chip_select2)
+ * modalias: "tsc2005"
+ * 
+ * 
+ * Author	: Pavan Savoy (pavan_savoy@mindtree.com)
+ * Date		: 15-05-2008
+ * Author	: Ethan Ku (eku@marvell.com)
+ */
+
+/*
+ *	Header file also has the configuration/build options
+ */
+#include <linux/spi/tsc200x.h>
+#include <linux/irq.h>
+
+#define TSC2005_VDD_LOWER_27
+
+#ifdef TSC2005_VDD_LOWER_27
+#define TSC2005_HZ     (10000000)
+#else
+#define TSC2005_HZ     (25000000)
+#endif
+
+#define TSC2005_CMD	(0x80)
+#define TSC2005_REG	(0x00)
+
+#define TSC2005_CMD_STOP	(1 << 0)
+#define TSC20025_CMD_SWRST      (1 << 1)
+#define TSC2005_CMD_10BIT	(0 << 2)
+#define TSC2005_CMD_12BIT	(1 << 2)
+
+#define TSC2005_CMD_SCAN_XYZZ	(0 << 3)
+#define TSC2005_CMD_SCAN_XY	(1 << 3)
+#define TSC2005_CMD_SCAN_X	(2 << 3)
+#define TSC2005_CMD_SCAN_Y	(3 << 3)
+#define TSC2005_CMD_SCAN_ZZ	(4 << 3)
+#define TSC2005_CMD_AUX_SINGLE	(5 << 3)
+#define TSC2005_CMD_TEMP1	(6 << 3)
+#define TSC2005_CMD_TEMP2	(7 << 3)
+#define TSC2005_CMD_AUX_CONT	(8 << 3)
+#define TSC2005_CMD_TEST_X_CONN	(9 << 3)
+#define TSC2005_CMD_TEST_Y_CONN	(10 << 3)
+/* command 11 reserved */
+#define TSC2005_CMD_TEST_SHORT	(12 << 3)
+#define TSC2005_CMD_DRIVE_XX	(13 << 3)
+#define TSC2005_CMD_DRIVE_YY	(14 << 3)
+#define TSC2005_CMD_DRIVE_YX	(15 << 3)
+
+#define TSC2005_REG_X		(0 << 3)
+#define TSC2005_REG_Y		(1 << 3)
+#define TSC2005_REG_Z1		(2 << 3)
+#define TSC2005_REG_Z2		(3 << 3)
+#define TSC2005_REG_AUX		(4 << 3)
+#define TSC2005_REG_TEMP1	(5 << 3)
+#define TSC2005_REG_TEMP2	(6 << 3)
+#define TSC2005_REG_STATUS	(7 << 3)
+#define TSC2005_REG_AUX_HIGH	(8 << 3)
+#define TSC2005_REG_AUX_LOW	(9 << 3)
+#define TSC2005_REG_TEMP_HIGH	(10 << 3)
+#define TSC2005_REG_TEMP_LOW	(11 << 3)
+#define TSC2005_REG_CFR0	(12 << 3)
+#define TSC2005_REG_CFR1	(13 << 3)
+#define TSC2005_REG_CFR2	(14 << 3)
+#define TSC2005_REG_FUNCTION	(15 << 3)
+
+#define TSC2005_REG_PND0	(1 << 1)
+#define TSC2005_REG_READ	(0x01)
+#define TSC2005_REG_WRITE	(0x00)
+
+
+#define TSC2005_CFR0_LONGSAMPLING	(1)
+#define TSC2005_CFR0_DETECTINWAIT	(1 << 1)
+#define TSC2005_CFR0_SENSETIME_32US	(0)
+#define TSC2005_CFR0_SENSETIME_96US	(1 << 2)
+#define TSC2005_CFR0_SENSETIME_544US	(1 << 3)
+#define TSC2005_CFR0_SENSETIME_2080US	(1 << 4)
+#define TSC2005_CFR0_SENSETIME_2656US	(0x001C)
+#define TSC2005_CFR0_PRECHARGE_20US	(0x0000)
+#define TSC2005_CFR0_PRECHARGE_84US	(0x0020)
+#define TSC2005_CFR0_PRECHARGE_276US	(0x0040)
+#define TSC2005_CFR0_PRECHARGE_1044US	(0x0080)
+#define TSC2005_CFR0_PRECHARGE_1364US	(0x00E0)
+#define TSC2005_CFR0_STABTIME_0US	(0x0000)
+#define TSC2005_CFR0_STABTIME_100US	(0x0100)
+#define TSC2005_CFR0_STABTIME_500US	(0x0200)
+#define TSC2005_CFR0_STABTIME_1MS	(0x0300)
+#define TSC2005_CFR0_STABTIME_5MS	(0x0400)
+#define TSC2005_CFR0_STABTIME_100MS	(0x0700)
+#define TSC2005_CFR0_CLOCK_4MHZ		(0x0000)
+#define TSC2005_CFR0_CLOCK_2MHZ		(0x0800)
+#define TSC2005_CFR0_CLOCK_1MHZ		(0x1000)
+#define TSC2005_CFR0_RESOLUTION12	(0x2000)
+#define TSC2005_CFR0_STATUS		(0x4000)
+#define TSC2005_CFR0_PENMODE_INITIATE_BY_TSC2005	(0x8000)
+#define TSC2005_CFR0_PENMODE_INITIATE_BY_HOST		(0x0000)
+
+#define TSC2005_CFR0_INITVALUE	(\
+				TSC2005_CFR0_LONGSAMPLING |		\
+				TSC2005_CFR0_SENSETIME_544US |		\
+				TSC2005_CFR0_PRECHARGE_276US |		\
+				TSC2005_CFR0_STABTIME_1MS  |		\
+				TSC2005_CFR0_CLOCK_4MHZ    |		\
+				TSC2005_CFR0_RESOLUTION12  |		\
+				TSC2005_CFR0_PENMODE_INITIATE_BY_TSC2005)//0x3340
+
+
+#define TSC2005_CFR1_BATCHDELAY_0MS	(0x0000)
+#define TSC2005_CFR1_BATCHDELAY_1MS	(0x0001)
+#define TSC2005_CFR1_BATCHDELAY_2MS	(0x0002)
+#define TSC2005_CFR1_BATCHDELAY_4MS	(0x0003)
+
+#define TSC2005_CFR1_BATCHDELAY_10MS	(0x0004)
+#define TSC2005_CFR1_BATCHDELAY_20MS	(0x0005)
+#define TSC2005_CFR1_BATCHDELAY_40MS	(0x0006)
+#define TSC2005_CFR1_BATCHDELAY_100MS	(0x0007)
+
+#define TSC2005_CFR1_INITVALUE	TSC2005_CFR1_BATCHDELAY_1MS
+
+#define TSC2005_CFR2_MAVE_TEMP	(0x0001)
+#define TSC2005_CFR2_MAVE_AUX	(0x0002)
+#define TSC2005_CFR2_MAVE_Z	(0x0004)
+#define TSC2005_CFR2_MAVE_Y	(0x0008)
+#define TSC2005_CFR2_MAVE_X	(0x0010)
+#define TSC2005_CFR2_AVG_1	(0x0000)
+#define TSC2005_CFR2_AVG_3	(0x0400)
+#define TSC2005_CFR2_AVG_7	(0x0800)
+#define TSC2005_CFR2_MEDIUM_1	(0x0000)
+#define TSC2005_CFR2_MEDIUM_3	(0x1000)
+#define TSC2005_CFR2_MEDIUM_7	(0x2000)
+#define TSC2005_CFR2_MEDIUM_15	(0x3000)
+
+#define TSC2005_CFR2_IRQ_DAV	(0x4000)
+#define TSC2005_CFR2_IRQ_PEN	(0x8000)
+#define TSC2005_CFR2_IRQ_PENDAV	(0x0000)
+
+
+#define TSC2005_CFR2_INITVALUE	(TSC2005_CFR2_MAVE_X | \
+				 TSC2005_CFR2_MAVE_Y | \
+				 TSC2005_CFR2_MEDIUM_7 |\
+				 TSC2005_CFR2_AVG_3 |\
+				 TSC2005_CFR2_IRQ_DAV)
+
+
+#define LOBYTE(x) ((unsigned char) (x))
+#define HIBYTE(x) ((unsigned char) ((x) >> 8))
+
+static const u8 tsc2005_cfr_tbl[3][3] = {
+	{ 
+		TSC2005_REG | TSC2005_REG_CFR0 | TSC2005_REG_PND0 | TSC2005_REG_WRITE,
+		HIBYTE(TSC2005_CFR0_INITVALUE), 
+		LOBYTE(TSC2005_CFR0_INITVALUE) 
+	},
+	{ 
+		TSC2005_REG | TSC2005_REG_CFR1 | TSC2005_REG_PND0 | TSC2005_REG_WRITE,
+		HIBYTE(TSC2005_CFR1_INITVALUE), 
+		LOBYTE(TSC2005_CFR1_INITVALUE) 
+	},
+	{ 
+		TSC2005_REG | TSC2005_REG_CFR2 | TSC2005_REG_PND0 | TSC2005_REG_WRITE,
+		HIBYTE(TSC2005_CFR2_INITVALUE), 
+		LOBYTE(TSC2005_CFR2_INITVALUE) 
+	},
+};
+
+
+static const u8 tsc2005_read_reg[] = {
+	(TSC2005_REG | TSC2005_REG_X | TSC2005_REG_READ),
+	(TSC2005_REG | TSC2005_REG_Y | TSC2005_REG_READ),
+	(TSC2005_REG | TSC2005_REG_Z1 | TSC2005_REG_READ),
+	(TSC2005_REG | TSC2005_REG_Z2 | TSC2005_REG_READ),
+};
+#define NUM_READ_REGS	(sizeof(tsc2005_read_reg)/sizeof(tsc2005_read_reg[0]))
+
+/* 
+ * Driver Data Structure 
+ */
+struct tsc2005 {
+	char			phys[32];
+/* 
+ * An SPI & an Input driver 
+ */
+	struct spi_device *spi_dev;
+	struct input_dev *input_dev;
+/* 
+ * SPI message & transfer related data 
+ */
+
+	struct spi_message	read_msg;
+	struct spi_transfer	read_xfer[NUM_READ_REGS][2];
+	u8                      data[NUM_READ_REGS][2];
+
+	u16 x,y;
+/* 
+ * Timer data 
+ */
+	struct timer_list defer_irq_timer;
+	struct timer_list penup_timer;
+
+	int x_plate_ohms;
+/* 
+ * PENIRQ & function returning Line Status 
+ */
+	//	int (*get_pendown_state)(void);
+	int penirq;
+
+/* 
+ * Power state- Device suspended 
+ */
+	unsigned disabled:1;
+/* 
+ * Spin_lock 
+ */
+	spinlock_t lock;
+};
+
+
+
+//#define SWAP_X
+//#define SWAP_Y
+
+
+#define TS_RECT_SIZE	8
+
+#define INTERRUPT_DELAY   10  //msec
+#define PENUP_TIMEOUT   100 //msec
+
+//#define DEBUG
+
+
+/* 
+ * SPI completion handler - called on read_z2 
+ */
+
+static void tsc2005_complete(void *tsc)
+{
+	struct tsc2005 *ts = tsc;
+	struct input_dev *ip = ts->input_dev;
+	u16 x, y, z1,z2;
+	unsigned int touch_pressure = 0;
+	u32 inside_rect =0;
+
+	#ifdef DEBUG
+	printk("[%s]\n",__func__);
+	#endif
+
+	spin_lock_irq(&ts->lock);
+
+	x = (ts->data[0][0] << 8) + ts->data[0][1];
+	y = (ts->data[1][0] << 8) + ts->data[1][1];
+	z1 = (ts->data[2][0] << 8) + ts->data[2][1];
+	z2 = (ts->data[3][0] << 8) + ts->data[3][1];
+
+#ifdef SWAP_X
+	x = 4096 - x;
+#endif
+#ifdef SWAP_Y
+	y = 4096 - y;
+#endif
+
+#ifdef DEBUG
+//	printk("x:y:z1:z2=%d:%d:%d:%d\n",x,y,z1,z2);
+	printk("x:y:z1:z2=%x:%x:%x:%x\n",x,y,z1,z2);
+#endif
+
+	if(z1){
+/*
+ * Formula - 1 used for Calculation of Touch_Pressure (R-Touch)
+ * 450 being XPlate_Resistane - since ADS7846 environment had the same
+ */
+		
+		touch_pressure = x*(z2-z1) / z1;
+		touch_pressure = touch_pressure * ts->x_plate_ohms / 4096;
+#ifdef DEBUG
+		printk("touch_pressure = %d\n",touch_pressure);
+#endif
+	}
+
+
+
+/*
+ * Uncomment following line to report Actual Pressure
+ * Although not an absolute must, make sure z1, z2 are consitant
+ * before uncommenting
+ */
+/*
+ * #define report_actual_pressure
+ */
+
+	if (touch_pressure)
+	{
+
+
+		inside_rect = ( x > (int)(ts->x - TS_RECT_SIZE) &&
+				x < (int)(ts->x + TS_RECT_SIZE) &&				
+				y > (int)(ts->y - TS_RECT_SIZE) &&
+				y < (int)(ts->y + TS_RECT_SIZE));
+		if(inside_rect)
+		{
+			x = ts->x;
+			y = ts->y;
+#ifdef DEBUG
+			printk("inside rect\n");
+#endif
+		}else{
+			ts->x = x;
+			ts->y = y;
+#ifdef DEBUG
+			printk("move\n");
+#endif
+		
+		}
+		input_report_abs(ip, ABS_X, x);
+		input_report_abs(ip, ABS_Y, y);	  
+		input_report_abs(ip, ABS_PRESSURE, touch_pressure /*7500 */ );
+		input_report_key(ip, BTN_TOUCH, 1);
+		input_sync(ip);
+		mod_timer(&ts->penup_timer, jiffies + msecs_to_jiffies(PENUP_TIMEOUT));
+	}
+
+
+	spin_unlock_irq(&ts->lock);
+	mod_timer(&ts->defer_irq_timer, jiffies + msecs_to_jiffies(INTERRUPT_DELAY));
+
+}				/* end of tsc2005_complete */
+
+/* 
+ * The Timer function -
+ * 	Submit previously setup SPI transaction here 
+ * @params:
+ *	input:
+ *		data: tsc2005_data structure
+ *	output:
+ */
+static void tsc2005_defer_irq_timer_handler(unsigned long handle)
+{
+	struct tsc2005 *ts = (void *)handle;
+
+#ifdef DEBUG
+	printk("delay irq\n");
+#endif
+	spin_lock_irq(&ts->lock);
+	enable_irq(ts->penirq);
+	spin_unlock_irq(&ts->lock);
+	return;
+}
+
+
+static void tsc2005_penup_timer_handler(unsigned long handle)
+{
+	struct tsc2005 *ts = (void *)handle;
+	struct input_dev *ip = ts->input_dev;
+
+#ifdef DEBUG
+        printk("penup\n");
+#endif
+	spin_lock_irq(&ts->lock);
+	input_report_abs(ip, ABS_X, 0);
+	input_report_abs(ip, ABS_Y, 0);	  
+	input_report_abs(ip, ABS_PRESSURE, 0);
+	input_report_key(ip, BTN_TOUCH, 0);
+	input_sync(ip);
+	spin_unlock_irq(&ts->lock);
+
+
+
+	return;
+}
+
+
+
+/* 
+ * IRQ Handler -
+ * 	Disable IRQ & detect cause of IRQ (pendown or penup),
+ * 	either start the timer or report penup & enable_irq
+ * @params:
+ *	input:
+ *		IRQ - which caused the interrupt, 
+ *		data: tsc2005_data structure
+ *	output:
+ *		IRQ_HANDLED
+ */
+static irqreturn_t tsc2005_irq(int irq, void *handle)
+{
+	struct tsc2005 *tsc = handle;
+	unsigned long flags = 0;
+
+#ifdef DEBUG
+	printk("tsc2005_irq\n");
+#endif
+	spin_lock_irqsave(&tsc->lock, flags);	
+
+	disable_irq_nosync(irq);
+
+	spi_async(tsc->spi_dev, &tsc->read_msg);
+
+	mod_timer(&tsc->penup_timer, jiffies + msecs_to_jiffies(PENUP_TIMEOUT));
+	spin_unlock_irqrestore(&tsc->lock, flags);
+	return IRQ_HANDLED;
+}
+
+
+
+
+static int tsc2005_check_reg(struct tsc2005 *ts)
+{
+	unsigned char wr_cmd[3];
+	unsigned short cfr0_val;
+	unsigned short cfr1_val;
+	unsigned short cfr2_val;
+	struct spi_message *m;
+	struct spi_transfer *x;
+	struct spi_message m_temp;
+	struct spi_transfer x_temp[2];
+	int status;
+
+	m = &m_temp;
+	x = &x_temp[0];
+       
+	wr_cmd[0] = (TSC2005_REG | TSC2005_REG_CFR0 | TSC2005_REG_READ),
+	spi_message_init(m);
+
+	memset(x, 0, sizeof(*x));
+	x->tx_buf = &wr_cmd[0];
+	x->len = 1;
+	x->bits_per_word = 8;
+	spi_message_add_tail(x, m);
+
+	x++;
+	memset(x, 0, sizeof(*x));
+	x->rx_buf = &cfr0_val;
+	x->len = 2;
+//	x->bits_per_word = 16;
+	x->bits_per_word = 8;
+	spi_message_add_tail(x, m);
+
+	status = spi_sync(ts->spi_dev,m);
+	if (status != 0) {
+		return -1;
+	}
+
+	if((be16_to_cpu(cfr0_val) &0x3fff) != (TSC2005_CFR0_INITVALUE & 0x3fff))
+	{
+		printk("cfr0: write = %x, read = %x\n",TSC2005_CFR0_INITVALUE,be16_to_cpu(cfr0_val));
+		return -1;
+	}
+
+	//read cfr1
+	x = &x_temp[0];
+	wr_cmd[0] = (TSC2005_REG | TSC2005_REG_CFR1 | TSC2005_REG_READ),
+	spi_message_init(m);
+	memset(x, 0, sizeof(*x));
+	x->tx_buf = &wr_cmd[0];
+	x->len = 1;
+	x->bits_per_word = 8;
+	spi_message_add_tail(x, m);
+
+	x++;
+	memset(x, 0, sizeof(*x));
+	x->rx_buf = &cfr1_val;
+	x->len = 2;
+//	x->bits_per_word = 16;
+	x->bits_per_word = 8;
+	spi_message_add_tail(x, m);
+
+	status = spi_sync(ts->spi_dev,m);
+	if (status != 0) {
+		return -1;
+	}
+
+	if(be16_to_cpu(cfr1_val) != TSC2005_CFR1_INITVALUE)
+	{
+		printk("cfr1 : write = %x, read = %x\n",TSC2005_CFR1_INITVALUE,be16_to_cpu(cfr1_val));
+		return -1;
+	}
+	//read cfr2
+	x = &x_temp[0];
+	wr_cmd[0] = (TSC2005_REG | TSC2005_REG_CFR2 | TSC2005_REG_READ),
+	spi_message_init(m);
+	memset(x, 0, sizeof(*x));
+	x->tx_buf = &wr_cmd[0];
+	x->len = 1;
+	x->bits_per_word = 8;
+	spi_message_add_tail(x, m);
+
+	x++;
+	memset(x, 0, sizeof(*x));
+	x->rx_buf = &cfr2_val;
+	x->len = 2;
+//	x->bits_per_word = 16;
+	x->bits_per_word = 8;
+	spi_message_add_tail(x, m);
+
+	status = spi_sync(ts->spi_dev,m);
+
+	if (status != 0) {
+		return -1;
+	}
+
+	if(be16_to_cpu(cfr2_val) != TSC2005_CFR2_INITVALUE)
+	{
+		printk("cfr2 : write = %x, read = %x\n",TSC2005_CFR2_INITVALUE,be16_to_cpu(cfr2_val));
+		return -1;
+	}
+
+
+	return 0;
+
+}
+
+static void tsc2005_ts_setup_spi_xfer(struct tsc2005 *ts)
+{
+	struct spi_message *m;
+	struct spi_transfer *x;
+	int i;
+
+	m = &ts->read_msg;
+	spi_message_init(m);
+
+	for (i = 0; i < NUM_READ_REGS; i++) {
+
+		x = &ts->read_xfer[i][0];
+		memset(x,0,sizeof(*x));
+		x->tx_buf = &tsc2005_read_reg[i];
+		x->len = 1;
+		x->bits_per_word = 8;
+		spi_message_add_tail(x,m);
+
+		x = &ts->read_xfer[i][1];
+		memset(x,0,sizeof(*x));
+		
+		x->rx_buf = &ts->data[i][0];
+		x->len = 2;
+		x->bits_per_word = 16;
+		x->cs_change = i < (NUM_READ_REGS -1 );
+
+		spi_message_add_tail(x, m);
+
+	}
+
+	m->complete = tsc2005_complete;
+	m->context = ts;
+}
+
+/*
+ *	SPI sync() based calls cannot be executed in Interrupt contexts
+ * 	hence the reading of X, Y, Z1 & Z2 co-ordinates require a list
+ * 	of SPI transfers setup
+ * 	If TSC_MODE_1 is selected, the select_scan message should also
+ * 	be a part of that list.
+ * 	Delays in function wont affect the performance since the function
+ * 	is called only at the initialisation of driver.
+ * @params:
+ *	input:
+ *		data: tsc2005_data structure
+ *	output:
+ *		function return status
+ */
+static int tsc2005_spi_setup(struct tsc2005 *ts)
+{
+	int status;
+	unsigned char wr_cmd[3];
+	unsigned short cfr0_val;
+
+	struct spi_message *m;
+	struct spi_transfer *x;
+
+	struct spi_message m_temp;
+	struct spi_transfer x_temp[2];
+	int i;
+
+        #ifdef DEBUG
+	printk("[%s]\n",__func__);
+	#endif
+
+	cfr0_val = 0;
+	status = 0;
+	wr_cmd[0] = wr_cmd[1] = wr_cmd[2] = 0;
+
+
+	for(i=0;i<3;i++)
+	{
+		m = &m_temp;
+		x = &x_temp[0];
+		wr_cmd[0] = tsc2005_cfr_tbl[i][0];
+		wr_cmd[1] = tsc2005_cfr_tbl[i][1];
+		wr_cmd[2] = tsc2005_cfr_tbl[i][2];
+
+		spi_message_init(m);
+		memset(x, 0, sizeof(*x));
+		x->tx_buf = &wr_cmd[0];
+		x->len = 1;
+		x->bits_per_word = 8;
+		spi_message_add_tail(x, m);
+
+		x++;
+		memset(x, 0, sizeof(*x));
+		x->tx_buf = &wr_cmd[1];
+		x->len = 2;
+//		x->bits_per_word = 16;
+		x->bits_per_word = 8;
+		spi_message_add_tail(x, m);
+
+#ifdef DEBUG
+		printk("wr = %x\n", (wr_cmd[1] << 8) + wr_cmd[2]);
+#endif
+		status = spi_sync(ts->spi_dev,m);
+		if (status != 0) {
+			goto err_status;
+		}
+	}
+	m = &m_temp;
+	x = &x_temp[0];
+	wr_cmd[0] = TSC2005_CMD | TSC2005_CMD_12BIT | TSC2005_CMD_SCAN_XYZZ;
+	x->tx_buf = &wr_cmd[0];
+	x->rx_buf = NULL;
+	x->len = 1;
+	x->bits_per_word = 8;
+	spi_message_init(m);
+	spi_message_add_tail(x,m);
+	spi_sync(ts->spi_dev,m);
+
+	if(tsc2005_check_reg(ts) != 0)
+		goto err_status;
+
+	tsc2005_ts_setup_spi_xfer(ts);
+
+
+	return 0;
+      err_status:
+	return -1;
+}
+
+
+
+
+/*	
+ * 	Start of functions which were registered as a
+ *	part of tsc2005 spi_driver.
+ * 
+ *  Should be Called, if the device has been added to list of
+ *  SPI devices in board_init. [Even without an actual Slave device]
+ * @params:
+ *	input:
+ *		SPI device structure allocated for the device
+ *	output:
+ *		function return status
+ */
+static int __devinit tsc2005_probe(struct spi_device *spi)
+{
+	struct tsc2005 *ts;
+	struct input_dev *input_dev;
+	int err;
+	struct tsc2005_platform_data *pdata = spi->dev.platform_data;
+
+	/*
+	 * Check for Max_speed of SPI bus 
+	 */
+        #ifdef DEBUG
+	printk("[%s]\n",__func__);
+	#endif
+
+	if (!pdata) {
+		dev_dbg(&spi->dev, "no platform data?\n");
+		return -ENODEV;
+	}
+
+	if (spi->max_speed_hz > TSC2005_HZ) {
+		dev_dbg(&spi->dev, "f(sample) %d KHz?\n",
+			(spi->max_speed_hz) / 1000);
+		return -EINVAL;
+	}
+
+
+	/* 
+	 * Set up the SPI Interface 
+	 */
+	spi->bits_per_word = 8;
+	/*
+	 * Refer to TSC Slave device CPOL and CPHA
+	 */
+	spi->mode = SPI_MODE_0;
+	err = spi_setup(spi);
+	if (err < 0) {
+		return err;
+	}
+
+	ts = kzalloc(sizeof(struct tsc2005), GFP_KERNEL);
+	input_dev = input_allocate_device();
+	if (!ts || !input_dev) {
+		err = -ENOMEM;
+		goto err_free_mem;
+	}
+
+	spin_lock_init(&ts->lock);
+	ts->x_plate_ohms = pdata->x_plate_ohms ? : 280;
+
+	dev_set_drvdata(&spi->dev, ts);
+	spi->dev.power.power_state = PMSG_ON;
+
+	ts->spi_dev = spi;
+	ts->input_dev = input_dev;
+
+	input_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS);
+	input_dev->absbit[0] = BIT_MASK(ABS_X) | BIT_MASK(ABS_Y) | BIT_MASK(ABS_PRESSURE);
+	input_dev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
+
+
+	input_set_abs_params(input_dev, ABS_X, 0, 4096, 0, 0);
+	input_set_abs_params(input_dev, ABS_Y, 0, 4096, 0, 0);
+
+	/*
+	 * Should Ideally be recieved from platform_data
+	 * initialised in board_init.
+	 * Have same values of ads7846 since the platform is same
+	 */
+	input_set_abs_params(input_dev, ABS_PRESSURE, 100, 15000, 0, 0);
+
+	snprintf(ts->phys, sizeof(ts->phys),
+		 "%s/input0", dev_name(&spi->dev));
+
+	input_dev->name = "TI TSC2005 TouchScreen Controller";
+	input_dev->phys = ts->phys;
+	input_dev->dev.parent = &spi->dev;
+	err = input_register_device(input_dev);
+	if (err) {
+		goto err_free_mem;
+	}
+	/*
+	 * Initialise TIMER
+	 */
+	init_timer(&ts->defer_irq_timer);
+	ts->defer_irq_timer.data = (unsigned long)ts;
+	ts->defer_irq_timer.function = tsc2005_defer_irq_timer_handler;
+
+
+	init_timer(&ts->penup_timer);
+	ts->penup_timer.data = (unsigned long)ts;
+	ts->penup_timer.function = tsc2005_penup_timer_handler;
+
+	ts->penirq = ts->spi_dev->irq;
+
+
+/*
+ * Setup SPI transfers here
+ */
+	if (tsc2005_spi_setup(ts) != 0) {
+		/* 
+		 * Perform h/w reset of TSC
+		 */
+		printk("tsc2005_spi_setup failed\n");
+		goto err_dev_unregister;
+		
+	}
+/*
+ * Request IRQ here, 
+ * ts->penirq should hold the IRQ upon which the TSC shall
+ * Interrupt
+ */
+
+
+
+	if (request_irq(ts->penirq, tsc2005_irq, 0,
+			spi->dev.driver->name, ts)) {
+		dev_dbg(&spi->dev, "irq %d busy?\n", spi->irq);
+		err = -EBUSY;
+		goto err_free_irq;
+	}
+
+	printk("tsc2005 touch screen driver load \n");
+	return 0;
+
+err_free_irq:
+	free_irq(ts->penirq, ts);
+	
+err_dev_unregister:
+	input_unregister_device(ts->input_dev);
+
+err_free_mem:
+	input_free_device(input_dev);
+	kfree(ts);
+	return err;
+
+}
+
+/*	
+ *	Remove spi device from the system 
+ *	Make sure all interfaces/data structures initialised in _probe
+ *	are closed / terminated / freed here
+ * @params:
+ *	input:
+ *		SPI device structure allocated for the device
+ *	output:
+ *		function return status
+ */
+
+static int __devexit tsc2005_remove(struct spi_device *spi)
+{
+	struct tsc2005 *ts = dev_get_drvdata(&spi->dev);
+/*
+ * Undo things done in _probe
+ */
+        #ifdef DEBUG
+	printk("tsc2005 remove\n");
+	#endif
+
+	input_unregister_device(ts->input_dev);
+	free_irq(ts->penirq, ts);
+	input_free_device(ts->input_dev);
+	del_timer_sync(&ts->defer_irq_timer);
+	del_timer_sync(&ts->penup_timer);
+	kfree(ts);
+
+	return 0;
+}
+
+
+#ifdef CONFIG_PM
+static int tsc2005_suspend(struct spi_device *spi, pm_message_t mesg)
+{
+	struct tsc2005 *ts = dev_get_drvdata(&spi->dev);
+	spin_lock_irq(&ts->lock);
+	ts->disabled = 1;
+	disable_irq(ts->penirq);
+	spin_unlock_irq(&ts->lock);
+	return 0;
+}
+
+static int tsc2005_resume(struct spi_device *spi)
+{
+	struct tsc2005 *ts = dev_get_drvdata(&spi->dev);
+	spin_lock_irq(&ts->lock);
+	ts->disabled = 0;
+	enable_irq(ts->penirq);
+	spin_unlock_irq(&ts->lock);
+
+	if (tsc2005_spi_setup(ts) != 0) {
+		/* 
+		 * Perform h/w reset of TSC
+		 */
+		printk("tsc2005 resume failed\n");
+		return -1;
+		
+	}
+	return 0;
+}
+
+#endif
+static struct spi_driver tsc2005_driver = {
+
+	.driver = {
+/*
+ * Name: As in board_init function for probe
+ */
+		   .name = "tsc2005",
+		   .bus = &spi_bus_type,
+		   .owner = THIS_MODULE,
+		   },
+#ifdef CONFIG_PM
+	.suspend = tsc2005_suspend,
+	.resume = tsc2005_resume,
+#endif
+	.probe = tsc2005_probe,
+	.remove = __devexit_p(tsc2005_remove),
+};
+
+/*
+ *	Init and the _exit of this driver module
+ * 	Register / Un-Register Driver as SPI Protocol Driver 
+ */
+
+static int __init tsc2005_init(void)
+{
+        #ifdef DEBUG
+	printk("tsc2005_init\n");
+	#endif
+	return spi_register_driver(&tsc2005_driver);
+}
+
+module_init(tsc2005_init);
+
+static void __exit tsc2005_exit(void)
+{
+	spi_unregister_driver(&tsc2005_driver);
+}
+
+module_exit(tsc2005_exit);
+
+MODULE_DESCRIPTION("TSC2005 TouchScreen Driver");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Pavan_Savoy@mindtree.com");
+MODULE_AUTHOR("eku@marvell.com");
--- linux-mvl-dove-2.6.32.orig/drivers/input/serio/i8042-x86ia64io.h
+++ linux-mvl-dove-2.6.32/drivers/input/serio/i8042-x86ia64io.h
@@ -67,10 +67,12 @@
 
 #include <linux/dmi.h>
 
-static struct dmi_system_id __initdata i8042_dmi_noloop_table[] = {
+static const struct dmi_system_id __initconst i8042_dmi_noloop_table[] = {
 	{
-		/* AUX LOOP command does not raise AUX IRQ */
-		.ident = "Arima-Rioworks HDAMB",
+		/*
+		 * Arima-Rioworks HDAMB -
+		 * AUX LOOP command does not raise AUX IRQ
+		 */
 		.matches = {
 			DMI_MATCH(DMI_BOARD_VENDOR, "RIOWORKS"),
 			DMI_MATCH(DMI_BOARD_NAME, "HDAMB"),
@@ -78,7 +80,7 @@
 		},
 	},
 	{
-		.ident = "ASUS G1S",
+		/* ASUS G1S */
 		.matches = {
 			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer Inc."),
 			DMI_MATCH(DMI_BOARD_NAME, "G1S"),
@@ -86,8 +88,7 @@
 		},
 	},
 	{
-		/* AUX LOOP command does not raise AUX IRQ */
-		.ident = "ASUS P65UP5",
+		/* ASUS P65UP5 - AUX LOOP command does not raise AUX IRQ */
 		.matches = {
 			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
 			DMI_MATCH(DMI_BOARD_NAME, "P/I-P65UP5"),
@@ -95,7 +96,6 @@
 		},
 	},
 	{
-		.ident = "Compaq Proliant 8500",
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "Compaq"),
 			DMI_MATCH(DMI_PRODUCT_NAME , "ProLiant"),
@@ -103,7 +103,6 @@
 		},
 	},
 	{
-		.ident = "Compaq Proliant DL760",
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "Compaq"),
 			DMI_MATCH(DMI_PRODUCT_NAME , "ProLiant"),
@@ -111,7 +110,7 @@
 		},
 	},
 	{
-		.ident = "OQO Model 01",
+		/* OQO Model 01 */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "OQO"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "ZEPTO"),
@@ -119,8 +118,7 @@
 		},
 	},
 	{
-		/* AUX LOOP does not work properly */
-		.ident = "ULI EV4873",
+		/* ULI EV4873 - AUX LOOP does not work properly */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "ULI"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "EV4873"),
@@ -128,7 +126,7 @@
 		},
 	},
 	{
-		.ident = "Microsoft Virtual Machine",
+		/* Microsoft Virtual Machine */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "Virtual Machine"),
@@ -136,7 +134,7 @@
 		},
 	},
 	{
-		.ident = "Medion MAM 2070",
+		/* Medion MAM 2070 */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "Notebook"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "MAM 2070"),
@@ -144,7 +142,7 @@
 		},
 	},
 	{
-		.ident = "Blue FB5601",
+		/* Blue FB5601 */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "blue"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "FB5601"),
@@ -152,7 +150,7 @@
 		},
 	},
 	{
-		.ident = "Gigabyte M912",
+		/* Gigabyte M912 */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "GIGABYTE"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "M912"),
@@ -160,7 +158,21 @@
 		},
 	},
 	{
-		.ident = "HP DV9700",
+		/* Gigabyte M1022M netbook */
+		.matches = {
+			DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co.,Ltd."),
+			DMI_MATCH(DMI_BOARD_NAME, "M1022E"),
+			DMI_MATCH(DMI_BOARD_VERSION, "1.02"),
+		},
+	},
+	{
+		/* Gigabyte Spring Peak - defines wrong chassis type */
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "GIGABYTE"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Spring Peak"),
+		},
+	},
+	{
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion dv9700"),
@@ -177,72 +189,72 @@
  * ... apparently some Toshibas don't like MUX mode either and
  * die horrible death on reboot.
  */
-static struct dmi_system_id __initdata i8042_dmi_nomux_table[] = {
+static const struct dmi_system_id __initconst i8042_dmi_nomux_table[] = {
 	{
-		.ident = "Fujitsu Lifebook P7010/P7010D",
+		/* Fujitsu Lifebook P7010/P7010D */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "P7010"),
 		},
 	},
 	{
-		.ident = "Fujitsu Lifebook P7010",
+		/* Fujitsu Lifebook P7010 */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "0000000000"),
 		},
 	},
 	{
-		.ident = "Fujitsu Lifebook P5020D",
+		/* Fujitsu Lifebook P5020D */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "LifeBook P Series"),
 		},
 	},
 	{
-		.ident = "Fujitsu Lifebook S2000",
+		/* Fujitsu Lifebook S2000 */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "LifeBook S Series"),
 		},
 	},
 	{
-		.ident = "Fujitsu Lifebook S6230",
+		/* Fujitsu Lifebook S6230 */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "LifeBook S6230"),
 		},
 	},
 	{
-		.ident = "Fujitsu T70H",
+		/* Fujitsu T70H */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "FMVLT70H"),
 		},
 	},
 	{
-		.ident = "Fujitsu-Siemens Lifebook T3010",
+		/* Fujitsu-Siemens Lifebook T3010 */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "LIFEBOOK T3010"),
 		},
 	},
 	{
-		.ident = "Fujitsu-Siemens Lifebook E4010",
+		/* Fujitsu-Siemens Lifebook E4010 */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "LIFEBOOK E4010"),
 		},
 	},
 	{
-		.ident = "Fujitsu-Siemens Amilo Pro 2010",
+		/* Fujitsu-Siemens Amilo Pro 2010 */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "AMILO Pro V2010"),
 		},
 	},
 	{
-		.ident = "Fujitsu-Siemens Amilo Pro 2030",
+		/* Fujitsu-Siemens Amilo Pro 2030 */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "AMILO PRO V2030"),
@@ -253,7 +265,7 @@
 		 * No data is coming from the touchscreen unless KBC
 		 * is in legacy mode.
 		 */
-		.ident = "Panasonic CF-29",
+		/* Panasonic CF-29 */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "Matsushita"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "CF-29"),
@@ -261,10 +273,10 @@
 	},
 	{
 		/*
-		 * Errors on MUX ports are reported without raising AUXDATA
+		 * HP Pavilion DV4017EA -
+		 * errors on MUX ports are reported without raising AUXDATA
 		 * causing "spurious NAK" messages.
 		 */
-		.ident = "HP Pavilion DV4017EA",
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "Pavilion dv4000 (EA032EA#ABF)"),
@@ -272,9 +284,9 @@
 	},
 	{
 		/*
-		 * Like DV4017EA does not raise AUXERR for errors on MUX ports.
+		 * HP Pavilion ZT1000 -
+		 * like DV4017EA does not raise AUXERR for errors on MUX ports.
 		 */
-		.ident = "HP Pavilion ZT1000",
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion Notebook PC"),
@@ -283,44 +295,48 @@
 	},
 	{
 		/*
-		 * Like DV4017EA does not raise AUXERR for errors on MUX ports.
+		 * HP Pavilion DV4270ca -
+		 * like DV4017EA does not raise AUXERR for errors on MUX ports.
 		 */
-		.ident = "HP Pavilion DV4270ca",
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "Pavilion dv4000 (EH476UA#ABL)"),
 		},
 	},
 	{
-		.ident = "Toshiba P10",
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "Satellite P10"),
 		},
 	},
 	{
-		.ident = "Toshiba Equium A110",
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "EQUIUM A110"),
 		},
 	},
 	{
-		.ident = "Alienware Sentia",
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "ALIENWARE"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "Sentia"),
 		},
 	},
 	{
-		.ident = "Sharp Actius MM20",
+		/* Sharp Actius MM20 */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "SHARP"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "PC-MM20 Series"),
 		},
 	},
 	{
-		.ident = "Sony Vaio FS-115b",
+		/* Sony Vaio VPCZ122GX */
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "Sony Corporation"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "VPCZ122GX"),
+		},
+	},
+	{
+		/* Sony Vaio FS-115b */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "Sony Corporation"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "VGN-FS115B"),
@@ -328,141 +344,154 @@
 	},
 	{
 		/*
-		 * Reset and GET ID commands issued via KBD port are
+		 * Sony Vaio FZ-240E -
+		 * reset and GET ID commands issued via KBD port are
 		 * sometimes being delivered to AUX3.
 		 */
-		.ident = "Sony Vaio FZ-240E",
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "Sony Corporation"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "VGN-FZ240E"),
 		},
 	},
 	{
-		.ident = "Amoi M636/A737",
+		/* Amoi M636/A737 */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "Amoi Electronics CO.,LTD."),
 			DMI_MATCH(DMI_PRODUCT_NAME, "M636/A737 platform"),
 		},
 	},
 	{
-		.ident = "Lenovo 3000 n100",
+		/* Lenovo 3000 n100 */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "076804U"),
 		},
 	},
 	{
-		.ident = "Acer Aspire 1360",
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "Aspire 1360"),
 		},
 	},
 	{
-		.ident = "Gericom Bellagio",
+		/* Gericom Bellagio */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "Gericom"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "N34AS6"),
 		},
 	},
 	{
-		.ident = "IBM 2656",
+		/* IBM 2656 */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "2656"),
 		},
 	},
 	{
-		.ident = "Dell XPS M1530",
+		/* Dell XPS M1530 */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 			DMI_MATCH(DMI_PRODUCT_NAME, "XPS M1530"),
 		},
 	},
 	{
-		.ident = "Compal HEL80I",
+		/* Compal HEL80I */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "COMPAL"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "HEL80I"),
 		},
 	},
 	{
-		.ident = "Dell Vostro 1510",
+		/* Dell Vostro 1510 */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 			DMI_MATCH(DMI_PRODUCT_NAME, "Vostro1510"),
 		},
 	},
 	{
-		.ident = "Acer Aspire 5536",
+		/* Acer Aspire 5536 */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "Aspire 5536"),
 			DMI_MATCH(DMI_PRODUCT_VERSION, "0100"),
 		},
 	},
+	{
+		/* Dell Vostro V13 */
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Vostro V13"),
+		},
+	},
 	{ }
 };
 
-static struct dmi_system_id __initdata i8042_dmi_reset_table[] = {
+static const struct dmi_system_id __initconst i8042_dmi_reset_table[] = {
 	{
-		.ident = "MSI Wind U-100",
+		/* MSI Wind U-100 */
 		.matches = {
 			DMI_MATCH(DMI_BOARD_NAME, "U-100"),
 			DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
 		},
 	},
 	{
-		.ident = "LG Electronics X110",
+		/* LG Electronics X110 */
 		.matches = {
 			DMI_MATCH(DMI_BOARD_NAME, "X110"),
 			DMI_MATCH(DMI_BOARD_VENDOR, "LG Electronics Inc."),
 		},
 	},
 	{
-		.ident = "Acer Aspire One 150",
+		/* Acer Aspire One 150 */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "AOA150"),
 		},
 	},
 	{
-		.ident = "Advent 4211",
+		/* Advent 4211 */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "DIXONSXP"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "Advent 4211"),
 		},
 	},
 	{
-		.ident = "Medion Akoya Mini E1210",
+		/* Medion Akoya Mini E1210 */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "MEDION"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "E1210"),
 		},
 	},
 	{
-		.ident = "Mivvy M310",
+		/* Medion Akoya E1222 */
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "MEDION"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "E122X"),
+		},
+	},
+	{
+		/* Mivvy M310 */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "VIOOO"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "N10"),
 		},
 	},
 	{
-		.ident = "Dell Vostro 1320",
+		/* Dell Vostro 1320 */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 			DMI_MATCH(DMI_PRODUCT_NAME, "Vostro 1320"),
 		},
 	},
 	{
-		.ident = "Dell Vostro 1520",
+		/* Dell Vostro 1520 */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 			DMI_MATCH(DMI_PRODUCT_NAME, "Vostro 1520"),
 		},
 	},
 	{
-		.ident = "Dell Vostro 1720",
+		/* Dell Vostro 1720 */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 			DMI_MATCH(DMI_PRODUCT_NAME, "Vostro 1720"),
@@ -472,16 +501,16 @@
 };
 
 #ifdef CONFIG_PNP
-static struct dmi_system_id __initdata i8042_dmi_nopnp_table[] = {
+static const struct dmi_system_id __initconst i8042_dmi_nopnp_table[] = {
 	{
-		.ident = "Intel MBO Desktop D845PESV",
+		/* Intel MBO Desktop D845PESV */
 		.matches = {
 			DMI_MATCH(DMI_BOARD_NAME, "D845PESV"),
 			DMI_MATCH(DMI_BOARD_VENDOR, "Intel Corporation"),
 		},
 	},
 	{
-		.ident = "MSI Wind U-100",
+		/* MSI Wind U-100 */
 		.matches = {
 			DMI_MATCH(DMI_BOARD_NAME, "U-100"),
 			DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
@@ -490,27 +519,23 @@
 	{ }
 };
 
-static struct dmi_system_id __initdata i8042_dmi_laptop_table[] = {
+static const struct dmi_system_id __initconst i8042_dmi_laptop_table[] = {
 	{
-		.ident = "Portable",
 		.matches = {
 			DMI_MATCH(DMI_CHASSIS_TYPE, "8"), /* Portable */
 		},
 	},
 	{
-		.ident = "Laptop",
 		.matches = {
 			DMI_MATCH(DMI_CHASSIS_TYPE, "9"), /* Laptop */
 		},
 	},
 	{
-		.ident = "Notebook",
 		.matches = {
 			DMI_MATCH(DMI_CHASSIS_TYPE, "10"), /* Notebook */
 		},
 	},
 	{
-		.ident = "Sub-Notebook",
 		.matches = {
 			DMI_MATCH(DMI_CHASSIS_TYPE, "14"), /* Sub-Notebook */
 		},
@@ -519,64 +544,82 @@
 };
 #endif
 
+static const struct dmi_system_id __initconst i8042_dmi_notimeout_table[] = {
+	{
+		/* Dell Vostro V13 */
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Vostro V13"),
+		},
+	},
+	{ }
+};
+
 /*
  * Some Wistron based laptops need us to explicitly enable the 'Dritek
  * keyboard extension' to make their extra keys start generating scancodes.
  * Originally, this was just confined to older laptops, but a few Acer laptops
  * have turned up in 2007 that also need this again.
  */
-static struct dmi_system_id __initdata i8042_dmi_dritek_table[] = {
+static const struct dmi_system_id __initconst i8042_dmi_dritek_table[] = {
+	{
+		/* Acer Aspire 5610 */
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Aspire 5610"),
+		},
+	},
 	{
-		.ident = "Acer Aspire 5630",
+		/* Acer Aspire 5630 */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "Aspire 5630"),
 		},
 	},
 	{
-		.ident = "Acer Aspire 5650",
+		/* Acer Aspire 5650 */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "Aspire 5650"),
 		},
 	},
 	{
-		.ident = "Acer Aspire 5680",
+		/* Acer Aspire 5680 */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "Aspire 5680"),
 		},
 	},
 	{
-		.ident = "Acer Aspire 5720",
+		/* Acer Aspire 5720 */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "Aspire 5720"),
 		},
 	},
 	{
-		.ident = "Acer Aspire 9110",
+		/* Acer Aspire 9110 */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "Aspire 9110"),
 		},
 	},
 	{
-		.ident = "Acer TravelMate 660",
+		/* Acer TravelMate 660 */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 660"),
 		},
 	},
 	{
-		.ident = "Acer TravelMate 2490",
+		/* Acer TravelMate 2490 */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 2490"),
 		},
 	},
 	{
-		.ident = "Acer TravelMate 4280",
+		/* Acer TravelMate 4280 */
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 4280"),
@@ -841,6 +884,9 @@
 	if (dmi_check_system(i8042_dmi_nomux_table))
 		i8042_nomux = true;
 
+	if (dmi_check_system(i8042_dmi_notimeout_table))
+		i8042_notimeout = true;
+
 	if (dmi_check_system(i8042_dmi_dritek_table))
 		i8042_dritek = true;
 #endif /* CONFIG_X86 */
--- linux-mvl-dove-2.6.32.orig/drivers/input/serio/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/input/serio/Kconfig
@@ -146,6 +146,7 @@
 	tristate "HIL MLC Support (needed for HIL input devices)"
 	depends on HP_SDC
 
+
 config SERIO_PCIPS2
 	tristate "PCI PS/2 keyboard and PS/2 mouse controller"
 	depends on PCI
--- linux-mvl-dove-2.6.32.orig/drivers/input/serio/i8042.c
+++ linux-mvl-dove-2.6.32/drivers/input/serio/i8042.c
@@ -64,6 +64,10 @@
 module_param_named(panicblink, i8042_blink_frequency, uint, 0600);
 MODULE_PARM_DESC(panicblink, "Frequency with which keyboard LEDs should blink when kernel panics");
 
+static bool i8042_notimeout;
+module_param_named(notimeout, i8042_notimeout, bool, 0);
+MODULE_PARM_DESC(notimeout, "Ignore timeouts signalled by i8042");
+
 #ifdef CONFIG_X86
 static bool i8042_dritek;
 module_param_named(dritek, i8042_dritek, bool, 0);
@@ -434,7 +438,7 @@
 	} else {
 
 		dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) |
-		      ((str & I8042_STR_TIMEOUT) ? SERIO_TIMEOUT : 0);
+		      ((str & I8042_STR_TIMEOUT && !i8042_notimeout) ? SERIO_TIMEOUT : 0);
 
 		port_no = (str & I8042_STR_AUXDATA) ?
 				I8042_AUX_PORT_NO : I8042_KBD_PORT_NO;
@@ -1412,8 +1416,8 @@
 
 static void __exit i8042_exit(void)
 {
-	platform_driver_unregister(&i8042_driver);
 	platform_device_unregister(i8042_platform_device);
+	platform_driver_unregister(&i8042_driver);
 	i8042_platform_exit();
 
 	panic_blink = NULL;
--- linux-mvl-dove-2.6.32.orig/drivers/input/tablet/wacom_wac.h
+++ linux-mvl-dove-2.6.32/drivers/input/tablet/wacom_wac.h
@@ -9,6 +9,19 @@
 #ifndef WACOM_WAC_H
 #define WACOM_WAC_H
 
+/* maximum packet length for USB devices */
+#define WACOM_PKGLEN_MAX	32
+
+/* packet length for individual models */
+#define WACOM_PKGLEN_PENPRTN	 7
+#define WACOM_PKGLEN_GRAPHIRE	 8
+#define WACOM_PKGLEN_BBFUN 	 9
+#define WACOM_PKGLEN_INTUOS 	10
+#define WACOM_PKGLEN_PENABLED	 8
+#define WACOM_PKGLEN_TPC1FG	 5
+#define WACOM_PKGLEN_TPC2FG 	14
+
+/* device IDs */
 #define STYLUS_DEVICE_ID	0x02
 #define TOUCH_DEVICE_ID		0x03
 #define CURSOR_DEVICE_ID	0x06
@@ -32,6 +45,7 @@
 	WACOM_BEE,
 	WACOM_MO,
 	TABLETPC,
+	TABLETPC2FG,
 	MAX_TYPE
 };
 
@@ -43,8 +57,11 @@
 	int pressure_max;
 	int distance_max;
 	int type;
-	int touch_x_max;
-	int touch_y_max;
+	int device_type;
+	int x_phy;
+	int y_phy;
+	unsigned char unit;
+	unsigned char unitExpo;
 };
 
 struct wacom_wac {
--- linux-mvl-dove-2.6.32.orig/drivers/input/tablet/wacom_wac.c
+++ linux-mvl-dove-2.6.32/drivers/input/tablet/wacom_wac.c
@@ -1,7 +1,7 @@
 /*
  * drivers/input/tablet/wacom_wac.c
  *
- *  USB Wacom Graphire and Wacom Intuos tablet support - Wacom specific code
+ *  USB Wacom tablet support - Wacom specific code
  *
  */
 
@@ -65,9 +65,8 @@
 
 	prox = data[1] & 0x40;
 
-	wacom->id[0] = ERASER_DEVICE_ID;
 	if (prox) {
-
+		wacom->id[0] = ERASER_DEVICE_ID;
 		pressure = (signed char)((data[7] << 1) | ((data[4] >> 2) & 1));
 		if (wacom->features->pressure_max > 255)
 			pressure = (pressure << 1) | ((data[4] >> 6) & 1);
@@ -608,54 +607,146 @@
 	return 1;
 }
 
+
+static void wacom_tpc_finger_in(struct wacom_wac *wacom, void *wcombo, char *data, int idx)
+{
+	wacom_report_abs(wcombo, ABS_X,
+		(data[2 + idx * 2] & 0xff) | ((data[3 + idx * 2] & 0x7f) << 8));
+	wacom_report_abs(wcombo, ABS_Y,
+		(data[6 + idx * 2] & 0xff) | ((data[7 + idx * 2] & 0x7f) << 8));
+	wacom_report_abs(wcombo, ABS_MISC, wacom->id[0]);
+	wacom_report_key(wcombo, wacom->tool[idx], 1);
+	if (idx)
+		wacom_input_event(wcombo, EV_MSC, MSC_SERIAL, 0xf0);
+	else
+		wacom_report_key(wcombo, BTN_TOUCH, 1);
+}
+
+static void wacom_tpc_touch_out(struct wacom_wac *wacom, void *wcombo, int idx)
+{
+	wacom_report_abs(wcombo, ABS_X, 0);
+	wacom_report_abs(wcombo, ABS_Y, 0);
+	wacom_report_abs(wcombo, ABS_MISC, 0);
+	wacom_report_key(wcombo, wacom->tool[idx], 0);
+	if (idx)
+		wacom_input_event(wcombo, EV_MSC, MSC_SERIAL, 0xf0);
+	else
+		wacom_report_key(wcombo, BTN_TOUCH, 0);
+	return;
+}
+
+static void wacom_tpc_touch_in(struct wacom_wac *wacom, void *wcombo)
+{
+	char *data = wacom->data;
+	struct urb *urb = ((struct wacom_combo *)wcombo)->urb;
+	static int firstFinger = 0;
+	static int secondFinger = 0;
+
+	wacom->tool[0] = BTN_TOOL_DOUBLETAP;
+	wacom->id[0] = TOUCH_DEVICE_ID;
+	wacom->tool[1] = BTN_TOOL_TRIPLETAP;
+
+	if (urb->actual_length != WACOM_PKGLEN_TPC1FG) {
+		switch (data[0]) {
+			case 6:
+				wacom_report_abs(wcombo, ABS_X, wacom_le16_to_cpu(&data[2]));
+				wacom_report_abs(wcombo, ABS_Y, wacom_le16_to_cpu(&data[4]));
+				wacom_report_abs(wcombo, ABS_PRESSURE, wacom_le16_to_cpu(&data[6]));
+				wacom_report_key(wcombo, BTN_TOUCH, wacom_le16_to_cpu(&data[6]));
+				wacom_report_abs(wcombo, ABS_MISC, wacom->id[0]);
+				wacom_report_key(wcombo, wacom->tool[0], 1);
+				break;
+			case 13:
+				/* keep this byte to send proper out-prox event */
+				wacom->id[1] = data[1] & 0x03;
+
+				if (data[1] & 0x01) {
+					wacom_tpc_finger_in(wacom, wcombo, data, 0);
+					firstFinger = 1;
+				} else if (firstFinger) {
+					wacom_tpc_touch_out(wacom, wcombo, 0);
+				}
+
+				if (data[1] & 0x02) {
+					/* sync first finger data */
+					if (firstFinger)
+						wacom_input_sync(wcombo);
+
+					wacom_tpc_finger_in(wacom, wcombo, data, 1);
+					secondFinger = 1;
+				} else if (secondFinger) {
+					/* sync first finger data */
+					if (firstFinger)
+						wacom_input_sync(wcombo);
+
+					wacom_tpc_touch_out(wacom, wcombo, 1);
+					secondFinger = 0;
+				}
+				if (!(data[1] & 0x01))
+					firstFinger = 0;
+				break;
+		}
+	} else {
+		wacom_report_abs(wcombo, ABS_X, wacom_le16_to_cpu(&data[1]));
+		wacom_report_abs(wcombo, ABS_Y, wacom_le16_to_cpu(&data[3]));
+		wacom_report_key(wcombo, BTN_TOUCH, 1);
+		wacom_report_abs(wcombo, ABS_MISC, wacom->id[0]);
+		wacom_report_key(wcombo, wacom->tool[0], 1);
+	}
+	return;
+}
+
 static int wacom_tpc_irq(struct wacom_wac *wacom, void *wcombo)
 {
 	char *data = wacom->data;
-	int prox = 0, pressure;
+	int prox = 0, pressure, idx = -1;
 	static int stylusInProx, touchInProx = 1, touchOut;
 	struct urb *urb = ((struct wacom_combo *)wcombo)->urb;
 
 	dbg("wacom_tpc_irq: received report #%d", data[0]);
 
-	if (urb->actual_length == 5 || data[0] == 6) { /* Touch data */
-		if (urb->actual_length == 5) {  /* with touch */
-			prox = data[0] & 0x03;
+	if (urb->actual_length == WACOM_PKGLEN_TPC1FG ||
+	    data[0] == 6 || /* single touch */
+	    data[0] == 13) { /* 2FG touch */
+		if (urb->actual_length == WACOM_PKGLEN_TPC1FG) {  /* with touch */
+			prox = data[0] & 0x01;
 		} else {  /* with capacity */
-			prox = data[1] & 0x03;
+			if (data[0] == 6)
+				/* single touch */
+				prox = data[1] & 0x01;
+			else
+				/* 2FG touch data */
+				prox = data[1] & 0x03;
 		}
 
 		if (!stylusInProx) { /* stylus not in prox */
 			if (prox) {
 				if (touchInProx) {
-					wacom->tool[1] = BTN_TOOL_DOUBLETAP;
-					wacom->id[0] = TOUCH_DEVICE_ID;
-					if (urb->actual_length != 5) {
-						wacom_report_abs(wcombo, ABS_X, wacom_le16_to_cpu(&data[2]));
-						wacom_report_abs(wcombo, ABS_Y, wacom_le16_to_cpu(&data[4]));
-						wacom_report_abs(wcombo, ABS_PRESSURE, wacom_le16_to_cpu(&data[6]));
-						wacom_report_key(wcombo, BTN_TOUCH, wacom_le16_to_cpu(&data[6]));
-					} else {
-						wacom_report_abs(wcombo, ABS_X, wacom_le16_to_cpu(&data[1]));
-						wacom_report_abs(wcombo, ABS_Y, wacom_le16_to_cpu(&data[3]));
-						wacom_report_key(wcombo, BTN_TOUCH, 1);
-					}
-					wacom_report_abs(wcombo, ABS_MISC, wacom->id[0]);
-					wacom_report_key(wcombo, wacom->tool[1], prox & 0x01);
+					wacom_tpc_touch_in(wacom, wcombo);
 					touchOut = 1;
 					return 1;
 				}
 			} else {
-				wacom_report_abs(wcombo, ABS_MISC, wacom->id[0]);
-				wacom_report_key(wcombo, wacom->tool[1], prox & 0x01);
-				wacom_report_key(wcombo, BTN_TOUCH, 0);
+				/* 2FGT out-prox */
+				if ((data[0] & 0xff) == 13) {
+					idx = (wacom->id[1] & 0x01) - 1;
+					if (idx == 0) {
+						wacom_tpc_touch_out(wacom, wcombo, idx);
+						/* sync first finger event */
+						if (wacom->id[1] & 0x02)
+							wacom_input_sync(wcombo);
+					}
+					idx = (wacom->id[1] & 0x02) - 1;
+					if (idx == 1)
+						wacom_tpc_touch_out(wacom, wcombo, idx);
+				} else /* one finger touch */
+					wacom_tpc_touch_out(wacom, wcombo, 0);
 				touchOut = 0;
 				touchInProx = 1;
 				return 1;
 			}
 		} else if (touchOut || !prox) { /* force touch out-prox */
-			wacom_report_abs(wcombo, ABS_MISC, TOUCH_DEVICE_ID);
-			wacom_report_key(wcombo, wacom->tool[1], 0);
-			wacom_report_key(wcombo, BTN_TOUCH, 0);
+			wacom_tpc_touch_out(wacom, wcombo, 0);
 			touchOut = 0;
 			touchInProx = 1;
 			return 1;
@@ -665,38 +756,14 @@
 
 		touchInProx = 0;
 
-		wacom->id[0] = ERASER_DEVICE_ID;
-
-		/*
-		 * if going from out of proximity into proximity select between the eraser
-		 * and the pen based on the state of the stylus2 button, choose eraser if
-		 * pressed else choose pen. if not a proximity change from out to in, send
-		 * an out of proximity for previous tool then a in for new tool.
-		 */
 		if (prox) { /* in prox */
-			if (!wacom->tool[0]) {
+			if (!wacom->id[0]) {
 				/* Going into proximity select tool */
-				wacom->tool[1] = (data[1] & 0x08) ? BTN_TOOL_RUBBER : BTN_TOOL_PEN;
-				if (wacom->tool[1] == BTN_TOOL_PEN)
+				wacom->tool[0] = (data[1] & 0x0c) ? BTN_TOOL_RUBBER : BTN_TOOL_PEN;
+				if (wacom->tool[0] == BTN_TOOL_PEN)
 					wacom->id[0] = STYLUS_DEVICE_ID;
-			} else if (wacom->tool[1] == BTN_TOOL_RUBBER && !(data[1] & 0x08)) {
-				/*
-				 * was entered with stylus2 pressed
-				 * report out proximity for previous tool
-				*/
-				wacom_report_abs(wcombo, ABS_MISC, wacom->id[0]);
-				wacom_report_key(wcombo, wacom->tool[1], 0);
-				wacom_input_sync(wcombo);
-
-				/* set new tool */
-				wacom->tool[1] = BTN_TOOL_PEN;
-				wacom->id[0] = STYLUS_DEVICE_ID;
-				return 0;
-			}
-			if (wacom->tool[1] != BTN_TOOL_RUBBER) {
-				/* Unknown tool selected default to pen tool */
-				wacom->tool[1] = BTN_TOOL_PEN;
-				wacom->id[0] = STYLUS_DEVICE_ID;
+				else
+					wacom->id[0] = ERASER_DEVICE_ID;
 			}
 			wacom_report_key(wcombo, BTN_STYLUS, data[1] & 0x02);
 			wacom_report_key(wcombo, BTN_STYLUS2, data[1] & 0x10);
@@ -706,17 +773,21 @@
 			if (pressure < 0)
 				pressure = wacom->features->pressure_max + pressure + 1;
 			wacom_report_abs(wcombo, ABS_PRESSURE, pressure);
-			wacom_report_key(wcombo, BTN_TOUCH, pressure);
+			wacom_report_key(wcombo, BTN_TOUCH, data[1] & 0x05);
 		} else {
+			wacom_report_abs(wcombo, ABS_X, 0);
+			wacom_report_abs(wcombo, ABS_Y, 0);
 			wacom_report_abs(wcombo, ABS_PRESSURE, 0);
 			wacom_report_key(wcombo, BTN_STYLUS, 0);
 			wacom_report_key(wcombo, BTN_STYLUS2, 0);
 			wacom_report_key(wcombo, BTN_TOUCH, 0);
+			wacom->id[0] = 0;
+			/* pen is out so touch can be enabled now */
+			touchInProx = 1;
 		}
-		wacom_report_key(wcombo, wacom->tool[1], prox);
+		wacom_report_key(wcombo, wacom->tool[0], prox);
 		wacom_report_abs(wcombo, ABS_MISC, wacom->id[0]);
 		stylusInProx = prox;
-		wacom->tool[0] = prox;
 		return 1;
 	}
 	return 0;
@@ -751,6 +822,7 @@
 			return wacom_intuos_irq(wacom_wac, wcombo);
 
 		case TABLETPC:
+		case TABLETPC2FG:
 			return wacom_tpc_irq(wacom_wac, wcombo);
 
 		default:
@@ -791,9 +863,17 @@
 			input_dev_i4s(input_dev, wacom_wac);
 			input_dev_i(input_dev, wacom_wac);
 			break;
+		case TABLETPC2FG:
+			input_dev_tpc2fg(input_dev, wacom_wac);
+			/* fall through */
+		case TABLETPC:
+			input_dev_tpc(input_dev, wacom_wac);
+			if (wacom_wac->features->device_type != BTN_TOOL_PEN)
+				break;  /* no need to process stylus stuff */
+
+			/* fall through */
 		case PL:
 		case PTU:
-		case TABLETPC:
 			input_dev_pl(input_dev, wacom_wac);
 			/* fall through */
 		case PENPARTNER:
@@ -804,66 +884,69 @@
 }
 
 static struct wacom_features wacom_features[] = {
-	{ "Wacom Penpartner",    7,   5040,  3780,  255,  0, PENPARTNER },
-        { "Wacom Graphire",      8,  10206,  7422,  511, 63, GRAPHIRE },
-	{ "Wacom Graphire2 4x5", 8,  10206,  7422,  511, 63, GRAPHIRE },
-	{ "Wacom Graphire2 5x7", 8,  13918, 10206,  511, 63, GRAPHIRE },
-	{ "Wacom Graphire3",     8,  10208,  7424,  511, 63, GRAPHIRE },
-	{ "Wacom Graphire3 6x8", 8,  16704, 12064,  511, 63, GRAPHIRE },
-	{ "Wacom Graphire4 4x5", 8,  10208,  7424,  511, 63, WACOM_G4 },
-	{ "Wacom Graphire4 6x8", 8,  16704, 12064,  511, 63, WACOM_G4 },
-	{ "Wacom BambooFun 4x5", 9,  14760,  9225,  511, 63, WACOM_MO },
-	{ "Wacom BambooFun 6x8", 9,  21648, 13530,  511, 63, WACOM_MO },
-	{ "Wacom Bamboo1 Medium",8,  16704, 12064,  511, 63, GRAPHIRE },
-	{ "Wacom Volito",        8,   5104,  3712,  511, 63, GRAPHIRE },
-	{ "Wacom PenStation2",   8,   3250,  2320,  255, 63, GRAPHIRE },
-	{ "Wacom Volito2 4x5",   8,   5104,  3712,  511, 63, GRAPHIRE },
-	{ "Wacom Volito2 2x3",   8,   3248,  2320,  511, 63, GRAPHIRE },
-	{ "Wacom PenPartner2",   8,   3250,  2320,  511, 63, GRAPHIRE },
-	{ "Wacom Bamboo",        9,  14760,  9225,  511, 63, WACOM_MO },
-	{ "Wacom Bamboo1",       8,   5104,  3712,  511, 63, GRAPHIRE },
-	{ "Wacom Intuos 4x5",   10,  12700, 10600, 1023, 31, INTUOS },
-	{ "Wacom Intuos 6x8",   10,  20320, 16240, 1023, 31, INTUOS },
-	{ "Wacom Intuos 9x12",  10,  30480, 24060, 1023, 31, INTUOS },
-	{ "Wacom Intuos 12x12", 10,  30480, 31680, 1023, 31, INTUOS },
-	{ "Wacom Intuos 12x18", 10,  45720, 31680, 1023, 31, INTUOS },
-	{ "Wacom PL400",         8,   5408,  4056,  255,  0, PL },
-	{ "Wacom PL500",         8,   6144,  4608,  255,  0, PL },
-	{ "Wacom PL600",         8,   6126,  4604,  255,  0, PL },
-	{ "Wacom PL600SX",       8,   6260,  5016,  255,  0, PL },
-	{ "Wacom PL550",         8,   6144,  4608,  511,  0, PL },
-	{ "Wacom PL800",         8,   7220,  5780,  511,  0, PL },
-	{ "Wacom PL700",         8,   6758,  5406,  511,  0, PL },
-	{ "Wacom PL510",         8,   6282,  4762,  511,  0, PL },
-	{ "Wacom DTU710",        8,  34080, 27660,  511,  0, PL },
-	{ "Wacom DTF521",        8,   6282,  4762,  511,  0, PL },
-	{ "Wacom DTF720",        8,   6858,  5506,  511,  0, PL },
-	{ "Wacom DTF720a",       8,   6858,  5506,  511,  0, PL },
-	{ "Wacom Cintiq Partner",8,  20480, 15360,  511,  0, PTU },
-	{ "Wacom Intuos2 4x5",   10, 12700, 10600, 1023, 31, INTUOS },
-	{ "Wacom Intuos2 6x8",   10, 20320, 16240, 1023, 31, INTUOS },
-	{ "Wacom Intuos2 9x12",  10, 30480, 24060, 1023, 31, INTUOS },
-	{ "Wacom Intuos2 12x12", 10, 30480, 31680, 1023, 31, INTUOS },
-	{ "Wacom Intuos2 12x18", 10, 45720, 31680, 1023, 31, INTUOS },
-	{ "Wacom Intuos3 4x5",   10, 25400, 20320, 1023, 63, INTUOS3S },
-	{ "Wacom Intuos3 6x8",   10, 40640, 30480, 1023, 63, INTUOS3 },
-	{ "Wacom Intuos3 9x12",  10, 60960, 45720, 1023, 63, INTUOS3 },
-	{ "Wacom Intuos3 12x12", 10, 60960, 60960, 1023, 63, INTUOS3L },
-	{ "Wacom Intuos3 12x19", 10, 97536, 60960, 1023, 63, INTUOS3L },
-	{ "Wacom Intuos3 6x11",  10, 54204, 31750, 1023, 63, INTUOS3 },
-	{ "Wacom Intuos3 4x6",   10, 31496, 19685, 1023, 63, INTUOS3S },
-	{ "Wacom Intuos4 4x6",   10, 31496, 19685, 2047, 63, INTUOS4S },
-	{ "Wacom Intuos4 6x9",   10, 44704, 27940, 2047, 63, INTUOS4 },
-	{ "Wacom Intuos4 8x13",  10, 65024, 40640, 2047, 63, INTUOS4L },
-	{ "Wacom Intuos4 12x19", 10, 97536, 60960, 2047, 63, INTUOS4L },
-	{ "Wacom Cintiq 21UX",   10, 87200, 65600, 1023, 63, CINTIQ },
-	{ "Wacom Cintiq 20WSX",  10, 86680, 54180, 1023, 63, WACOM_BEE },
-	{ "Wacom Cintiq 12WX",   10, 53020, 33440, 1023, 63, WACOM_BEE },
-	{ "Wacom DTU1931",        8, 37832, 30305,  511,  0, PL },
-	{ "Wacom ISDv4 90",       8, 26202, 16325,  255,  0, TABLETPC },
-	{ "Wacom ISDv4 93",       8, 26202, 16325,  255,  0, TABLETPC },
-	{ "Wacom ISDv4 9A",       8, 26202, 16325,  255,  0, TABLETPC },
-	{ "Wacom Intuos2 6x8",   10, 20320, 16240, 1023, 31, INTUOS },
+	{ "Wacom Penpartner",     WACOM_PKGLEN_PENPRTN,    5040,  3780,  255,  0, PENPARTNER },
+	{ "Wacom Graphire",       WACOM_PKGLEN_GRAPHIRE,  10206,  7422,  511, 63, GRAPHIRE },
+	{ "Wacom Graphire2 4x5",  WACOM_PKGLEN_GRAPHIRE,  10206,  7422,  511, 63, GRAPHIRE },
+	{ "Wacom Graphire2 5x7",  WACOM_PKGLEN_GRAPHIRE,  13918, 10206,  511, 63, GRAPHIRE },
+	{ "Wacom Graphire3",      WACOM_PKGLEN_GRAPHIRE,  10208,  7424,  511, 63, GRAPHIRE },
+	{ "Wacom Graphire3 6x8",  WACOM_PKGLEN_GRAPHIRE,  16704, 12064,  511, 63, GRAPHIRE },
+	{ "Wacom Graphire4 4x5",  WACOM_PKGLEN_GRAPHIRE,  10208,  7424,  511, 63, WACOM_G4 },
+	{ "Wacom Graphire4 6x8",  WACOM_PKGLEN_GRAPHIRE,  16704, 12064,  511, 63, WACOM_G4 },
+	{ "Wacom BambooFun 4x5",  WACOM_PKGLEN_BBFUN,     14760,  9225,  511, 63, WACOM_MO },
+	{ "Wacom BambooFun 6x8",  WACOM_PKGLEN_BBFUN,     21648, 13530,  511, 63, WACOM_MO },
+	{ "Wacom Bamboo1 Medium", WACOM_PKGLEN_GRAPHIRE,  16704, 12064,  511, 63, GRAPHIRE },
+	{ "Wacom Volito",         WACOM_PKGLEN_GRAPHIRE,   5104,  3712,  511, 63, GRAPHIRE },
+	{ "Wacom PenStation2",    WACOM_PKGLEN_GRAPHIRE,   3250,  2320,  255, 63, GRAPHIRE },
+	{ "Wacom Volito2 4x5",    WACOM_PKGLEN_GRAPHIRE,   5104,  3712,  511, 63, GRAPHIRE },
+	{ "Wacom Volito2 2x3",    WACOM_PKGLEN_GRAPHIRE,   3248,  2320,  511, 63, GRAPHIRE },
+	{ "Wacom PenPartner2",    WACOM_PKGLEN_GRAPHIRE,   3250,  2320,  511, 63, GRAPHIRE },
+	{ "Wacom Bamboo",         WACOM_PKGLEN_BBFUN,     14760,  9225,  511, 63, WACOM_MO },
+	{ "Wacom Bamboo1",        WACOM_PKGLEN_GRAPHIRE,   5104,  3712,  511, 63, GRAPHIRE },
+	{ "Wacom Intuos 4x5",     WACOM_PKGLEN_INTUOS,    12700, 10600, 1023, 31, INTUOS },
+	{ "Wacom Intuos 6x8",     WACOM_PKGLEN_INTUOS,    20320, 16240, 1023, 31, INTUOS },
+	{ "Wacom Intuos 9x12",    WACOM_PKGLEN_INTUOS,    30480, 24060, 1023, 31, INTUOS },
+	{ "Wacom Intuos 12x12",   WACOM_PKGLEN_INTUOS,    30480, 31680, 1023, 31, INTUOS },
+	{ "Wacom Intuos 12x18",   WACOM_PKGLEN_INTUOS,    45720, 31680, 1023, 31, INTUOS },
+	{ "Wacom PL400",          WACOM_PKGLEN_GRAPHIRE,   5408,  4056,  255,  0, PL },
+	{ "Wacom PL500",          WACOM_PKGLEN_GRAPHIRE,   6144,  4608,  255,  0, PL },
+	{ "Wacom PL600",          WACOM_PKGLEN_GRAPHIRE,   6126,  4604,  255,  0, PL },
+	{ "Wacom PL600SX",        WACOM_PKGLEN_GRAPHIRE,   6260,  5016,  255,  0, PL },
+	{ "Wacom PL550",          WACOM_PKGLEN_GRAPHIRE,   6144,  4608,  511,  0, PL },
+	{ "Wacom PL800",          WACOM_PKGLEN_GRAPHIRE,   7220,  5780,  511,  0, PL },
+	{ "Wacom PL700",          WACOM_PKGLEN_GRAPHIRE,   6758,  5406,  511,  0, PL },
+	{ "Wacom PL510",          WACOM_PKGLEN_GRAPHIRE,   6282,  4762,  511,  0, PL },
+	{ "Wacom DTU710",         WACOM_PKGLEN_GRAPHIRE,  34080, 27660,  511,  0, PL },
+	{ "Wacom DTF521",         WACOM_PKGLEN_GRAPHIRE,   6282,  4762,  511,  0, PL },
+	{ "Wacom DTF720",         WACOM_PKGLEN_GRAPHIRE,   6858,  5506,  511,  0, PL },
+	{ "Wacom DTF720a",        WACOM_PKGLEN_GRAPHIRE,   6858,  5506,  511,  0, PL },
+	{ "Wacom Cintiq Partner", WACOM_PKGLEN_GRAPHIRE,  20480, 15360,  511,  0, PTU },
+	{ "Wacom Intuos2 4x5",    WACOM_PKGLEN_INTUOS,    12700, 10600, 1023, 31, INTUOS },
+	{ "Wacom Intuos2 6x8",    WACOM_PKGLEN_INTUOS,    20320, 16240, 1023, 31, INTUOS },
+	{ "Wacom Intuos2 9x12",   WACOM_PKGLEN_INTUOS,    30480, 24060, 1023, 31, INTUOS },
+	{ "Wacom Intuos2 12x12",  WACOM_PKGLEN_INTUOS,    30480, 31680, 1023, 31, INTUOS },
+	{ "Wacom Intuos2 12x18",  WACOM_PKGLEN_INTUOS,    45720, 31680, 1023, 31, INTUOS },
+	{ "Wacom Intuos3 4x5",    WACOM_PKGLEN_INTUOS,    25400, 20320, 1023, 63, INTUOS3S },
+	{ "Wacom Intuos3 6x8",    WACOM_PKGLEN_INTUOS,    40640, 30480, 1023, 63, INTUOS3 },
+	{ "Wacom Intuos3 9x12",   WACOM_PKGLEN_INTUOS,    60960, 45720, 1023, 63, INTUOS3 },
+	{ "Wacom Intuos3 12x12",  WACOM_PKGLEN_INTUOS,    60960, 60960, 1023, 63, INTUOS3L },
+	{ "Wacom Intuos3 12x19",  WACOM_PKGLEN_INTUOS,    97536, 60960, 1023, 63, INTUOS3L },
+	{ "Wacom Intuos3 6x11",   WACOM_PKGLEN_INTUOS,    54204, 31750, 1023, 63, INTUOS3 },
+	{ "Wacom Intuos3 4x6",    WACOM_PKGLEN_INTUOS,    31496, 19685, 1023, 63, INTUOS3S },
+	{ "Wacom Intuos4 4x6",    WACOM_PKGLEN_INTUOS,    31496, 19685, 2047, 63, INTUOS4S },
+	{ "Wacom Intuos4 6x9",    WACOM_PKGLEN_INTUOS,    44704, 27940, 2047, 63, INTUOS4 },
+	{ "Wacom Intuos4 8x13",   WACOM_PKGLEN_INTUOS,    65024, 40640, 2047, 63, INTUOS4L },
+	{ "Wacom Intuos4 12x19",  WACOM_PKGLEN_INTUOS,    97536, 60960, 2047, 63, INTUOS4L },
+	{ "Wacom Cintiq 21UX",    WACOM_PKGLEN_INTUOS,    87200, 65600, 1023, 63, CINTIQ },
+	{ "Wacom Cintiq 20WSX",   WACOM_PKGLEN_INTUOS,    86680, 54180, 1023, 63, WACOM_BEE },
+	{ "Wacom Cintiq 12WX",    WACOM_PKGLEN_INTUOS,    53020, 33440, 1023, 63, WACOM_BEE },
+	{ "Wacom DTU1931",        WACOM_PKGLEN_GRAPHIRE,  37832, 30305,  511,  0, PL },
+	{ "Wacom ISDv4 90",       WACOM_PKGLEN_GRAPHIRE,  26202, 16325,  255,  0, TABLETPC },
+	{ "Wacom ISDv4 93",       WACOM_PKGLEN_GRAPHIRE,  26202, 16325,  255,  0, TABLETPC },
+	{ "Wacom ISDv4 9A",       WACOM_PKGLEN_GRAPHIRE,  26202, 16325,  255,  0, TABLETPC },
+	{ "Wacom ISDv4 9F",       WACOM_PKGLEN_PENABLED,  26202, 16325,  255,  0, TABLETPC },
+	{ "Wacom ISDv4 E2",       WACOM_PKGLEN_TPC2FG,    26202, 16325,  255,  0, TABLETPC2FG },
+	{ "Wacom ISDv4 E3",       WACOM_PKGLEN_TPC2FG,    26202, 16325,  255,  0, TABLETPC2FG },
+	{ "Wacom Intuos2 6x8",    WACOM_PKGLEN_INTUOS,    20320, 16240, 1023, 31, INTUOS },
 	{ }
 };
 
@@ -927,6 +1010,9 @@
 	{ USB_DEVICE(USB_VENDOR_ID_WACOM, 0x90) },
 	{ USB_DEVICE(USB_VENDOR_ID_WACOM, 0x93) },
 	{ USB_DEVICE(USB_VENDOR_ID_WACOM, 0x9A) },
+	{ USB_DEVICE(USB_VENDOR_ID_WACOM, 0x9F) },
+	{ USB_DEVICE(USB_VENDOR_ID_WACOM, 0xE2) },
+	{ USB_DEVICE(USB_VENDOR_ID_WACOM, 0xE3) },
 	{ USB_DEVICE(USB_VENDOR_ID_WACOM, 0x47) },
 	{ }
 };
--- linux-mvl-dove-2.6.32.orig/drivers/input/tablet/wacom_sys.c
+++ linux-mvl-dove-2.6.32/drivers/input/tablet/wacom_sys.c
@@ -1,7 +1,7 @@
 /*
  * drivers/input/tablet/wacom_sys.c
  *
- *  USB Wacom Graphire and Wacom Intuos tablet support - system specific code
+ *  USB Wacom tablet support - system specific code
  */
 
 /*
@@ -209,6 +209,7 @@
 	input_dev->keybit[BIT_WORD(BTN_MOUSE)] |= BIT_MASK(BTN_LEFT) |
 		BIT_MASK(BTN_RIGHT) | BIT_MASK(BTN_MIDDLE);
 	input_dev->keybit[BIT_WORD(BTN_DIGI)] |= BIT_MASK(BTN_TOOL_RUBBER) |
+		BIT_MASK(BTN_TOOL_PEN) | BIT_MASK(BTN_STYLUS) |
 		BIT_MASK(BTN_TOOL_MOUSE) | BIT_MASK(BTN_STYLUS2);
 	input_set_abs_params(input_dev, ABS_DISTANCE, 0, wacom_wac->features->distance_max, 0, 0);
 }
@@ -256,6 +257,7 @@
 		BIT_MASK(BTN_RIGHT) | BIT_MASK(BTN_MIDDLE) |
 		BIT_MASK(BTN_SIDE) | BIT_MASK(BTN_EXTRA);
 	input_dev->keybit[BIT_WORD(BTN_DIGI)] |= BIT_MASK(BTN_TOOL_RUBBER) |
+		BIT_MASK(BTN_TOOL_PEN) | BIT_MASK(BTN_STYLUS) |
 		BIT_MASK(BTN_TOOL_MOUSE) | BIT_MASK(BTN_TOOL_BRUSH) |
 		BIT_MASK(BTN_TOOL_PENCIL) | BIT_MASK(BTN_TOOL_AIRBRUSH) |
 		BIT_MASK(BTN_TOOL_LENS) | BIT_MASK(BTN_STYLUS2);
@@ -269,7 +271,8 @@
 
 void input_dev_pl(struct input_dev *input_dev, struct wacom_wac *wacom_wac)
 {
-	input_dev->keybit[BIT_WORD(BTN_DIGI)] |= BIT_MASK(BTN_STYLUS2);
+	input_dev->keybit[BIT_WORD(BTN_DIGI)] |= BIT_MASK(BTN_TOOL_PEN) |
+		BIT_MASK(BTN_STYLUS) | BIT_MASK(BTN_STYLUS2);
 }
 
 void input_dev_pt(struct input_dev *input_dev, struct wacom_wac *wacom_wac)
@@ -277,12 +280,32 @@
 	input_dev->keybit[BIT_WORD(BTN_DIGI)] |= BIT_MASK(BTN_TOOL_RUBBER);
 }
 
+void input_dev_tpc(struct input_dev *input_dev, struct wacom_wac *wacom_wac)
+{
+	if (wacom_wac->features->device_type == BTN_TOOL_DOUBLETAP ||
+	    wacom_wac->features->device_type == BTN_TOOL_TRIPLETAP) {
+		input_set_abs_params(input_dev, ABS_RX, 0, wacom_wac->features->x_phy, 0, 0);
+		input_set_abs_params(input_dev, ABS_RY, 0, wacom_wac->features->y_phy, 0, 0);
+		input_dev->keybit[BIT_WORD(BTN_DIGI)] |= BIT_MASK(BTN_TOOL_DOUBLETAP);
+	}
+}
+
+void input_dev_tpc2fg(struct input_dev *input_dev, struct wacom_wac *wacom_wac)
+{
+	if (wacom_wac->features->device_type == BTN_TOOL_TRIPLETAP) {
+		input_dev->keybit[BIT_WORD(BTN_DIGI)] |= BIT_MASK(BTN_TOOL_TRIPLETAP);
+		input_dev->evbit[0] |= BIT_MASK(EV_MSC);
+		input_dev->mscbit[0] |= BIT_MASK(MSC_SERIAL);
+	}
+}
+
 static int wacom_parse_hid(struct usb_interface *intf, struct hid_descriptor *hid_desc,
-			   struct wacom_wac *wacom_wac)
+			   struct wacom_features *features)
 {
 	struct usb_device *dev = interface_to_usbdev(intf);
-	struct wacom_features *features = wacom_wac->features;
-	char limit = 0, result = 0;
+	char limit = 0;
+	/* result has to be defined as int for some devices */
+	int result = 0;
 	int i = 0, usage = WCM_UNDEFINED, finger = 0, pen = 0;
 	unsigned char *report;
 
@@ -328,13 +351,24 @@
 			case HID_USAGE_X:
 				if (usage == WCM_DESKTOP) {
 					if (finger) {
-						features->touch_x_max =
-							features->touch_y_max =
-							wacom_le16_to_cpu(&report[i + 3]);
+						features->device_type = BTN_TOOL_DOUBLETAP;
+						if (features->type == TABLETPC2FG) {
+							/* need to reset back */
+							features->pktlen = WACOM_PKGLEN_TPC2FG;
+							features->device_type = BTN_TOOL_TRIPLETAP;
+						}
 						features->x_max =
+							wacom_le16_to_cpu(&report[i + 3]);
+						features->x_phy =
 							wacom_le16_to_cpu(&report[i + 6]);
-						i += 7;
+						features->unit = report[i + 9];
+						features->unitExpo = report[i + 11];
+						i += 12;
 					} else if (pen) {
+						/* penabled only accepts exact bytes of data */
+						if (features->type == TABLETPC2FG)
+							features->pktlen = WACOM_PKGLEN_PENABLED;
+						features->device_type = BTN_TOOL_PEN;
 						features->x_max =
 							wacom_le16_to_cpu(&report[i + 3]);
 						i += 4;
@@ -350,10 +384,35 @@
 				break;
 
 			case HID_USAGE_Y:
-				if (usage == WCM_DESKTOP)
-					features->y_max =
-						wacom_le16_to_cpu(&report[i + 3]);
-				i += 4;
+				if (usage == WCM_DESKTOP) {
+					if (finger) {
+						features->device_type = BTN_TOOL_DOUBLETAP;
+						if (features->type == TABLETPC2FG) {
+							/* need to reset back */
+							features->pktlen = WACOM_PKGLEN_TPC2FG;
+							features->device_type = BTN_TOOL_TRIPLETAP;
+							features->y_max =
+								wacom_le16_to_cpu(&report[i + 3]);
+							features->y_phy =
+								wacom_le16_to_cpu(&report[i + 6]);
+							i += 7;
+						} else {
+							features->y_max =
+								features->x_max;
+							features->y_phy =
+								wacom_le16_to_cpu(&report[i + 3]);
+							i += 4;
+						}
+					} else if (pen) {
+						/* penabled only accepts exact bytes of data */
+						if (features->type == TABLETPC2FG)
+							features->pktlen = WACOM_PKGLEN_PENABLED;
+						features->device_type = BTN_TOOL_PEN;
+						features->y_max =
+							wacom_le16_to_cpu(&report[i + 3]);
+						i += 4;
+					}
+				}
 				break;
 
 			case HID_USAGE_FINGER:
@@ -376,7 +435,7 @@
 			break;
 
 		case HID_COLLECTION:
-			/* reset UsagePage ans Finger */
+			/* reset UsagePage and Finger */
 			finger = usage = 0;
 			break;
 		}
@@ -388,43 +447,92 @@
 	return result;
 }
 
-static int wacom_query_tablet_data(struct usb_interface *intf)
+static int wacom_query_tablet_data(struct usb_interface *intf, struct wacom_features *features)
 {
 	unsigned char *rep_data;
-	int limit = 0;
-	int error;
+	int limit = 0, report_id = 2;
+	int error = -ENOMEM;
 
 	rep_data = kmalloc(2, GFP_KERNEL);
 	if (!rep_data)
-		return -ENOMEM;
+		return error;
 
-	do {
-		rep_data[0] = 2;
-		rep_data[1] = 2;
-		error = usb_set_report(intf, WAC_HID_FEATURE_REPORT,
-					2, rep_data, 2);
-		if (error >= 0)
-			error = usb_get_report(intf,
-						WAC_HID_FEATURE_REPORT, 2,
-						rep_data, 2);
-	} while ((error < 0 || rep_data[1] != 2) && limit++ < 5);
+	/* ask to report tablet data if it is 2FGT or not a Tablet PC */
+	if (features->device_type == BTN_TOOL_TRIPLETAP) {
+		do {
+			rep_data[0] = 3;
+			rep_data[1] = 4;
+			report_id = 3;
+			error = usb_set_report(intf, WAC_HID_FEATURE_REPORT,
+				report_id, rep_data, 2);
+			if (error >= 0)
+				error = usb_get_report(intf,
+					WAC_HID_FEATURE_REPORT, report_id,
+					rep_data, 3);
+		} while ((error < 0 || rep_data[1] != 4) && limit++ < 5);
+	} else if (features->type != TABLETPC && features->type != TABLETPC2FG) {
+		do {
+			rep_data[0] = 2;
+			rep_data[1] = 2;
+			error = usb_set_report(intf, WAC_HID_FEATURE_REPORT,
+				report_id, rep_data, 2);
+			if (error >= 0)
+				error = usb_get_report(intf,
+					WAC_HID_FEATURE_REPORT, report_id,
+					rep_data, 2);
+		} while ((error < 0 || rep_data[1] != 2) && limit++ < 5);
+	}
 
 	kfree(rep_data);
 
 	return error < 0 ? error : 0;
 }
 
+static int wacom_retrieve_hid_descriptor(struct usb_interface *intf,
+		struct wacom_features *features)
+{
+	int error = 0;
+	struct usb_host_interface *interface = intf->cur_altsetting;
+	struct hid_descriptor *hid_desc;
+
+	/* default device to penabled */
+	features->device_type = BTN_TOOL_PEN;
+
+	/* only Tablet PCs need to retrieve the info */
+	if ((features->type != TABLETPC) && (features->type != TABLETPC2FG))
+		goto out;
+
+	if (usb_get_extra_descriptor(interface, HID_DEVICET_HID, &hid_desc)) {
+		if (usb_get_extra_descriptor(&interface->endpoint[0],
+				HID_DEVICET_REPORT, &hid_desc)) {
+			printk("wacom: can not retrieve extra class descriptor\n");
+			error = 1;
+			goto out;
+		}
+	}
+	error = wacom_parse_hid(intf, hid_desc, features);
+	if (error)
+		goto out;
+
+	/* touch device found but size is not defined. use default */
+	if (features->device_type == BTN_TOOL_DOUBLETAP && !features->x_max) {
+		features->x_max = 1023;
+		features->y_max = 1023;
+	}
+
+ out:
+	return error;
+}
+
 static int wacom_probe(struct usb_interface *intf, const struct usb_device_id *id)
 {
 	struct usb_device *dev = interface_to_usbdev(intf);
-	struct usb_host_interface *interface = intf->cur_altsetting;
 	struct usb_endpoint_descriptor *endpoint;
 	struct wacom *wacom;
 	struct wacom_wac *wacom_wac;
 	struct wacom_features *features;
 	struct input_dev *input_dev;
 	int error = -ENOMEM;
-	struct hid_descriptor *hid_desc;
 
 	wacom = kzalloc(sizeof(struct wacom), GFP_KERNEL);
 	wacom_wac = kzalloc(sizeof(struct wacom_wac), GFP_KERNEL);
@@ -432,7 +540,7 @@
 	if (!wacom || !input_dev || !wacom_wac)
 		goto fail1;
 
-	wacom_wac->data = usb_buffer_alloc(dev, 10, GFP_KERNEL, &wacom->data_dma);
+	wacom_wac->data = usb_buffer_alloc(dev, WACOM_PKGLEN_MAX, GFP_KERNEL, &wacom->data_dma);
 	if (!wacom_wac->data)
 		goto fail1;
 
@@ -448,7 +556,7 @@
 	strlcat(wacom->phys, "/input0", sizeof(wacom->phys));
 
 	wacom_wac->features = features = get_wacom_feature(id);
-	BUG_ON(features->pktlen > 10);
+	BUG_ON(features->pktlen > WACOM_PKGLEN_MAX);
 
 	input_dev->name = wacom_wac->features->name;
 	wacom->wacom_wac = wacom_wac;
@@ -463,47 +571,24 @@
 
 	endpoint = &intf->cur_altsetting->endpoint[0].desc;
 
-	/* Initialize touch_x_max and touch_y_max in case it is not defined */
-	if (wacom_wac->features->type == TABLETPC) {
-		features->touch_x_max = 1023;
-		features->touch_y_max = 1023;
-	} else {
-		features->touch_x_max = 0;
-		features->touch_y_max = 0;
-	}
-
-	/* TabletPC need to retrieve the physical and logical maximum from report descriptor */
-	if (wacom_wac->features->type == TABLETPC) {
-		if (usb_get_extra_descriptor(interface, HID_DEVICET_HID, &hid_desc)) {
-			if (usb_get_extra_descriptor(&interface->endpoint[0],
-						     HID_DEVICET_REPORT, &hid_desc)) {
-				printk("wacom: can not retrive extra class descriptor\n");
-				goto fail2;
-			}
-		}
-		error = wacom_parse_hid(intf, hid_desc, wacom_wac);
-		if (error)
-			goto fail2;
-	}
+	/* Retrieve the physical and logical size for OEM devices */
+	error = wacom_retrieve_hid_descriptor(intf, features);
+	if (error)
+		goto fail2;
 
 	input_dev->evbit[0] |= BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS);
-	input_dev->keybit[BIT_WORD(BTN_DIGI)] |= BIT_MASK(BTN_TOOL_PEN) |
-		BIT_MASK(BTN_TOUCH) | BIT_MASK(BTN_STYLUS);
+	input_dev->keybit[BIT_WORD(BTN_DIGI)] |= BIT_MASK(BTN_TOUCH);
+
 	input_set_abs_params(input_dev, ABS_X, 0, features->x_max, 4, 0);
 	input_set_abs_params(input_dev, ABS_Y, 0, features->y_max, 4, 0);
 	input_set_abs_params(input_dev, ABS_PRESSURE, 0, features->pressure_max, 0, 0);
-	if (features->type == TABLETPC) {
-		input_dev->keybit[BIT_WORD(BTN_DIGI)] |= BIT_MASK(BTN_TOOL_DOUBLETAP);
-		input_set_abs_params(input_dev, ABS_RX, 0, features->touch_x_max, 4, 0);
-		input_set_abs_params(input_dev, ABS_RY, 0, features->touch_y_max, 4, 0);
-	}
 	input_dev->absbit[BIT_WORD(ABS_MISC)] |= BIT_MASK(ABS_MISC);
 
 	wacom_init_input_dev(input_dev, wacom_wac);
 
 	usb_fill_int_urb(wacom->irq, dev,
 			 usb_rcvintpipe(dev, endpoint->bEndpointAddress),
-			 wacom_wac->data, wacom_wac->features->pktlen,
+			 wacom_wac->data, features->pktlen,
 			 wacom_sys_irq, wacom, endpoint->bInterval);
 	wacom->irq->transfer_dma = wacom->data_dma;
 	wacom->irq->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;
@@ -512,18 +597,14 @@
 	if (error)
 		goto fail3;
 
-	/*
-	 * Ask the tablet to report tablet data if it is not a Tablet PC.
-	 * Note that if query fails it is not a hard failure.
-	 */
-	if (wacom_wac->features->type != TABLETPC)
-		wacom_query_tablet_data(intf);
+	/* Note that if query fails it is not a hard failure */
+	wacom_query_tablet_data(intf, features);
 
 	usb_set_intfdata(intf, wacom);
 	return 0;
 
  fail3:	usb_free_urb(wacom->irq);
- fail2:	usb_buffer_free(dev, 10, wacom_wac->data, wacom->data_dma);
+ fail2:	usb_buffer_free(dev, WACOM_PKGLEN_MAX, wacom_wac->data, wacom->data_dma);
  fail1:	input_free_device(input_dev);
 	kfree(wacom);
 	kfree(wacom_wac);
@@ -539,7 +620,7 @@
 	usb_kill_urb(wacom->irq);
 	input_unregister_device(wacom->dev);
 	usb_free_urb(wacom->irq);
-	usb_buffer_free(interface_to_usbdev(intf), 10,
+	usb_buffer_free(interface_to_usbdev(intf), WACOM_PKGLEN_MAX,
 			wacom->wacom_wac->data, wacom->data_dma);
 	kfree(wacom->wacom_wac);
 	kfree(wacom);
@@ -559,13 +640,19 @@
 static int wacom_resume(struct usb_interface *intf)
 {
 	struct wacom *wacom = usb_get_intfdata(intf);
+	struct wacom_features *features = wacom->wacom_wac->features;
 	int rv;
 
 	mutex_lock(&wacom->lock);
+
+	/* switch to wacom mode first */
+	wacom_query_tablet_data(intf, features);
+
 	if (wacom->open)
 		rv = usb_submit_urb(wacom->irq, GFP_NOIO);
 	else
 		rv = 0;
+
 	mutex_unlock(&wacom->lock);
 
 	return rv;
--- linux-mvl-dove-2.6.32.orig/drivers/input/tablet/wacom.h
+++ linux-mvl-dove-2.6.32/drivers/input/tablet/wacom.h
@@ -1,7 +1,7 @@
 /*
  * drivers/input/tablet/wacom.h
  *
- *  USB Wacom Graphire and Wacom Intuos tablet support
+ *  USB Wacom tablet support
  *
  *  Copyright (c) 2000-2004 Vojtech Pavlik	<vojtech@ucw.cz>
  *  Copyright (c) 2000 Andreas Bach Aaen	<abach@stofanet.dk>
@@ -69,6 +69,9 @@
  *      v1.49 (pc) - Added support for USB Tablet PC (0x90, 0x93, and 0x9A)
  *      v1.50 (pc) - Fixed a TabletPC touch bug in 2.6.28
  *      v1.51 (pc) - Added support for Intuos4
+ *      v1.52 (pc) - Query Wacom data upon system resume
+ *                 - add defines for features->type
+ *                 - add new devices (0x9F, 0xE2, and 0XE3)
  */
 
 /*
@@ -89,9 +92,9 @@
 /*
  * Version Information
  */
-#define DRIVER_VERSION "v1.51"
+#define DRIVER_VERSION "v1.52"
 #define DRIVER_AUTHOR "Vojtech Pavlik <vojtech@ucw.cz>"
-#define DRIVER_DESC "USB Wacom Graphire and Wacom Intuos tablet driver"
+#define DRIVER_DESC "USB Wacom tablet driver"
 #define DRIVER_LICENSE "GPL"
 
 MODULE_AUTHOR(DRIVER_AUTHOR);
@@ -133,6 +136,8 @@
 extern void input_dev_i4(struct input_dev *input_dev, struct wacom_wac *wacom_wac);
 extern void input_dev_pl(struct input_dev *input_dev, struct wacom_wac *wacom_wac);
 extern void input_dev_pt(struct input_dev *input_dev, struct wacom_wac *wacom_wac);
+extern void input_dev_tpc(struct input_dev *input_dev, struct wacom_wac *wacom_wac);
+extern void input_dev_tpc2fg(struct input_dev *input_dev, struct wacom_wac *wacom_wac);
 extern void input_dev_mo(struct input_dev *input_dev, struct wacom_wac *wacom_wac);
 extern void input_dev_bee(struct input_dev *input_dev, struct wacom_wac *wacom_wac);
 extern __u16 wacom_le16_to_cpu(unsigned char *data);
--- linux-mvl-dove-2.6.32.orig/drivers/input/mouse/synaptics.c
+++ linux-mvl-dove-2.6.32/drivers/input/mouse/synaptics.c
@@ -135,7 +135,8 @@
 	if (synaptics_send_cmd(psmouse, SYN_QUE_CAPABILITIES, cap))
 		return -1;
 	priv->capabilities = (cap[0] << 16) | (cap[1] << 8) | cap[2];
-	priv->ext_cap = 0;
+	priv->ext_cap = priv->ext_cap_0c = 0;
+
 	if (!SYN_CAP_VALID(priv->capabilities))
 		return -1;
 
@@ -148,7 +149,7 @@
 	if (SYN_EXT_CAP_REQUESTS(priv->capabilities) >= 1) {
 		if (synaptics_send_cmd(psmouse, SYN_QUE_EXT_CAPAB, cap)) {
 			printk(KERN_ERR "Synaptics claims to have extended capabilities,"
-			       " but I'm not able to read them.");
+			       " but I'm not able to read them.\n");
 		} else {
 			priv->ext_cap = (cap[0] << 16) | (cap[1] << 8) | cap[2];
 
@@ -160,6 +161,16 @@
 				priv->ext_cap &= 0xff0fff;
 		}
 	}
+
+	if (SYN_EXT_CAP_REQUESTS(priv->capabilities) >= 4) {
+		if (synaptics_send_cmd(psmouse, SYN_QUE_EXT_CAPAB_0C, cap)) {
+			printk(KERN_ERR "Synaptics claims to have extended capability 0x0c,"
+			       " but I'm not able to read it.\n");
+		} else {
+			priv->ext_cap_0c = (cap[0] << 16) | (cap[1] << 8) | cap[2];
+		}
+	}
+
 	return 0;
 }
 
@@ -346,7 +357,15 @@
 		hw->left  = (buf[0] & 0x01) ? 1 : 0;
 		hw->right = (buf[0] & 0x02) ? 1 : 0;
 
-		if (SYN_CAP_MIDDLE_BUTTON(priv->capabilities)) {
+		if (SYN_CAP_CLICKPAD(priv->ext_cap_0c)) {
+			/*
+			 * Clickpad's button is transmitted as middle button,
+			 * however, since it is primary button, we will report
+			 * it as BTN_LEFT.
+			 */
+			hw->left = ((buf[0] ^ buf[3]) & 0x01) ? 1 : 0;
+
+		} else if (SYN_CAP_MIDDLE_BUTTON(priv->capabilities)) {
 			hw->middle = ((buf[0] ^ buf[3]) & 0x01) ? 1 : 0;
 			if (hw->w == 2)
 				hw->scroll = (signed char)(buf[1]);
@@ -591,6 +610,12 @@
 
 	dev->absres[ABS_X] = priv->x_res;
 	dev->absres[ABS_Y] = priv->y_res;
+
+	if (SYN_CAP_CLICKPAD(priv->ext_cap_0c)) {
+		/* Clickpads report only left button */
+		__clear_bit(BTN_RIGHT, dev->keybit);
+		__clear_bit(BTN_MIDDLE, dev->keybit);
+	}
 }
 
 static void synaptics_disconnect(struct psmouse *psmouse)
@@ -689,10 +714,10 @@
 
 	priv->pkt_type = SYN_MODEL_NEWABS(priv->model_id) ? SYN_NEWABS : SYN_OLDABS;
 
-	printk(KERN_INFO "Synaptics Touchpad, model: %ld, fw: %ld.%ld, id: %#lx, caps: %#lx/%#lx\n",
+	printk(KERN_INFO "Synaptics Touchpad, model: %ld, fw: %ld.%ld, id: %#lx, caps: %#lx/%#lx/%#lx\n",
 		SYN_ID_MODEL(priv->identity),
 		SYN_ID_MAJOR(priv->identity), SYN_ID_MINOR(priv->identity),
-		priv->model_id, priv->capabilities, priv->ext_cap);
+		priv->model_id, priv->capabilities, priv->ext_cap, priv->ext_cap_0c);
 
 	set_input_params(psmouse->dev, priv);
 
--- linux-mvl-dove-2.6.32.orig/drivers/input/mouse/elantech.h
+++ linux-mvl-dove-2.6.32/drivers/input/mouse/elantech.h
@@ -100,11 +100,11 @@
 	unsigned char reg_26;
 	unsigned char debug;
 	unsigned char capabilities;
-	unsigned char fw_version_maj;
-	unsigned char fw_version_min;
+	bool paritycheck;
+	bool jumpy_cursor;
 	unsigned char hw_version;
-	unsigned char paritycheck;
-	unsigned char jumpy_cursor;
+	unsigned int fw_version;
+	unsigned int single_finger_reports;
 	unsigned char parity[256];
 };
 
--- linux-mvl-dove-2.6.32.orig/drivers/input/mouse/alps.h
+++ linux-mvl-dove-2.6.32/drivers/input/mouse/alps.h
@@ -23,6 +23,7 @@
 	char phys[32];			/* Phys */
 	const struct alps_model_info *i;/* Info */
 	int prev_fin;			/* Finger bit from previous packet */
+	struct timer_list timer;
 };
 
 #ifdef CONFIG_MOUSE_PS2_ALPS
--- linux-mvl-dove-2.6.32.orig/drivers/input/mouse/gpio_mouse.c
+++ linux-mvl-dove-2.6.32/drivers/input/mouse/gpio_mouse.c
@@ -11,6 +11,8 @@
 #include <linux/init.h>
 #include <linux/module.h>
 #include <linux/platform_device.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
 #include <linux/input-polldev.h>
 #include <linux/gpio_mouse.h>
 
@@ -24,17 +26,24 @@
 {
 	struct gpio_mouse_platform_data *gpio = dev->private;
 	struct input_dev *input = dev->input;
-	int x, y;
+	int x, y, key = 0;
+	int activity = 0;
 
-	if (gpio->bleft >= 0)
-		input_report_key(input, BTN_LEFT,
-				gpio_get_value(gpio->bleft) ^ gpio->polarity);
-	if (gpio->bmiddle >= 0)
-		input_report_key(input, BTN_MIDDLE,
-				gpio_get_value(gpio->bmiddle) ^ gpio->polarity);
-	if (gpio->bright >= 0)
-		input_report_key(input, BTN_RIGHT,
-				gpio_get_value(gpio->bright) ^ gpio->polarity);
+	if (gpio->bleft >= 0) {
+		key = gpio_get_value(gpio->bleft) ^ gpio->polarity;
+		activity |= key;
+		input_report_key(input, BTN_LEFT, key);
+	}
+	if (gpio->bmiddle >= 0) {
+		key = gpio_get_value(gpio->bmiddle) ^ gpio->polarity;
+		activity |= key;
+		input_report_key(input, BTN_MIDDLE, key);
+	}
+	if (gpio->bright >= 0) {
+		key = gpio_get_value(gpio->bright) ^ gpio->polarity;
+		activity |= key;
+		input_report_key(input, BTN_RIGHT, key);
+	}
 
 	x = (gpio_get_value(gpio->right) ^ gpio->polarity)
 		- (gpio_get_value(gpio->left) ^ gpio->polarity);
@@ -44,6 +53,21 @@
 	input_report_rel(input, REL_X, x);
 	input_report_rel(input, REL_Y, y);
 	input_sync(input);
+
+	activity |= x | y;
+	if (!activity)
+		input_stop_polled_device(input);
+}
+
+static irqreturn_t gpio_mouse_isr(int irq, void *dev_id)
+{
+	struct input_polled_dev *input_poll = dev_id;
+	struct input_dev *input = input_poll->input;
+
+	if (input_poll->stop)
+		input_resume_polled_device(input);
+
+	return IRQ_HANDLED;
 }
 
 static int __devinit gpio_mouse_probe(struct platform_device *pdev)
@@ -127,6 +151,23 @@
 		dev_err(&pdev->dev, "could not register input device\n");
 		goto out_free_polldev;
 	}
+	
+	if (pdata->use_activity_irq) {
+		int irq = irq = gpio_to_irq(pdata->activity_gpio);
+		dev_info(&pdev->dev, "gpio-mouse: use activity gpio %d irq (%d)\n",
+			 pdata->activity_gpio, irq);
+
+		error = devm_request_irq(&pdev->dev, irq, gpio_mouse_isr,
+					 IRQF_SAMPLE_RANDOM | IRQF_SHARED |
+					 IRQF_TRIGGER_RISING |
+					 IRQF_TRIGGER_FALLING,
+					 "gpio_mouse", input_poll);
+		if (error) {
+			dev_err(&pdev->dev, "gpio-mouse: Unable to claim irq %d"
+				"; error %d\n", irq, error);
+			goto out_unregister_polldev;
+		}
+	}
 
 	dev_dbg(&pdev->dev, "%d ms scan time, buttons: %s%s%s\n",
 			pdata->scan_ms,
@@ -136,6 +177,8 @@
 
 	return 0;
 
+ out_unregister_polldev:
+	input_unregister_polled_device(input_poll);
  out_free_polldev:
 	input_free_polled_device(input_poll);
 	platform_set_drvdata(pdev, NULL);
@@ -173,6 +216,7 @@
 static struct platform_driver gpio_mouse_device_driver = {
 	.probe		= gpio_mouse_probe,
 	.remove		= __devexit_p(gpio_mouse_remove),
+	.probe		= gpio_mouse_probe,
 	.driver		= {
 		.name	= "gpio_mouse",
 		.owner	= THIS_MODULE,
--- linux-mvl-dove-2.6.32.orig/drivers/input/mouse/psmouse-base.c
+++ linux-mvl-dove-2.6.32/drivers/input/mouse/psmouse-base.c
@@ -667,19 +667,6 @@
 		max_proto = PSMOUSE_IMEX;
 	}
 
-/*
- * Try Finger Sensing Pad
- */
-	if (max_proto > PSMOUSE_IMEX) {
-		if (fsp_detect(psmouse, set_properties) == 0) {
-			if (!set_properties || fsp_init(psmouse) == 0)
-				return PSMOUSE_FSP;
-/*
- * Init failed, try basic relative protocols
- */
-			max_proto = PSMOUSE_IMEX;
-		}
-	}
 
 	if (max_proto > PSMOUSE_IMEX) {
 		if (genius_detect(psmouse, set_properties) == 0)
@@ -696,6 +683,21 @@
 	}
 
 /*
+ * Try Finger Sensing Pad. We do it here because its probe upsets
+ * Trackpoint devices (causing TP_READ_ID command to time out).
+ */
+	if (max_proto > PSMOUSE_IMEX) {
+		if (fsp_detect(psmouse, set_properties) == 0) {
+			if (!set_properties || fsp_init(psmouse) == 0)
+				return PSMOUSE_FSP;
+/*
+ * Init failed, try basic relative protocols
+ */
+			max_proto = PSMOUSE_IMEX;
+		}
+	}
+
+/*
  * Reset to defaults in case the device got confused by extended
  * protocol probes. Note that we follow up with full reset because
  * some mice put themselves to sleep when they see PSMOUSE_RESET_DIS.
@@ -1347,6 +1349,7 @@
 	struct psmouse *psmouse = serio_get_drvdata(serio);
 	struct psmouse *parent = NULL;
 	struct serio_driver *drv = serio->drv;
+	unsigned char type;
 	int rc = -1;
 
 	if (!drv || !psmouse) {
@@ -1366,10 +1369,15 @@
 	if (psmouse->reconnect) {
 		if (psmouse->reconnect(psmouse))
 			goto out;
-	} else if (psmouse_probe(psmouse) < 0 ||
-		   psmouse->type != psmouse_extensions(psmouse,
-						psmouse_max_proto, false)) {
-		goto out;
+	} else {
+		psmouse_reset(psmouse);
+
+		if (psmouse_probe(psmouse) < 0)
+			goto out;
+
+		type = psmouse_extensions(psmouse, psmouse_max_proto, false);
+		if (psmouse->type != type)
+			goto out;
 	}
 
 	/* ok, the device type (and capabilities) match the old one,
--- linux-mvl-dove-2.6.32.orig/drivers/input/mouse/bcm5974.c
+++ linux-mvl-dove-2.6.32/drivers/input/mouse/bcm5974.c
@@ -55,6 +55,14 @@
 #define USB_DEVICE_ID_APPLE_WELLSPRING3_ANSI	0x0236
 #define USB_DEVICE_ID_APPLE_WELLSPRING3_ISO	0x0237
 #define USB_DEVICE_ID_APPLE_WELLSPRING3_JIS	0x0238
+/* MacbookAir3,2 (unibody), aka wellspring5 */
+#define USB_DEVICE_ID_APPLE_WELLSPRING4_ANSI	0x023f
+#define USB_DEVICE_ID_APPLE_WELLSPRING4_ISO	0x0240
+#define USB_DEVICE_ID_APPLE_WELLSPRING4_JIS	0x0241
+/* MacbookAir3,1 (unibody), aka wellspring4 */
+#define USB_DEVICE_ID_APPLE_WELLSPRING4A_ANSI	0x0242
+#define USB_DEVICE_ID_APPLE_WELLSPRING4A_ISO	0x0243
+#define USB_DEVICE_ID_APPLE_WELLSPRING4A_JIS	0x0244
 
 #define BCM5974_DEVICE(prod) {					\
 	.match_flags = (USB_DEVICE_ID_MATCH_DEVICE |		\
@@ -80,6 +88,14 @@
 	BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING3_ANSI),
 	BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING3_ISO),
 	BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING3_JIS),
+	/* MacbookAir3,2 */
+	BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING4_ANSI),
+	BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING4_ISO),
+	BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING4_JIS),
+	/* MacbookAir3,1 */
+	BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING4A_ANSI),
+	BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING4A_ISO),
+	BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING4A_JIS),
 	/* Terminating entry */
 	{}
 };
@@ -233,6 +249,30 @@
 		{ DIM_X, DIM_X / SN_COORD, -4460, 5166 },
 		{ DIM_Y, DIM_Y / SN_COORD, -75, 6700 }
 	},
+	{
+		USB_DEVICE_ID_APPLE_WELLSPRING4_ANSI,
+		USB_DEVICE_ID_APPLE_WELLSPRING4_ISO,
+		USB_DEVICE_ID_APPLE_WELLSPRING4_JIS,
+		HAS_INTEGRATED_BUTTON,
+		0x84, sizeof(struct bt_data),
+		0x81, TYPE2, FINGER_TYPE2, FINGER_TYPE2 + SIZEOF_ALL_FINGERS,
+		{ DIM_PRESSURE, DIM_PRESSURE / SN_PRESSURE, 0, 300 },
+		{ DIM_WIDTH, DIM_WIDTH / SN_WIDTH, 0, 2048 },
+		{ DIM_X, DIM_X / SN_COORD, -4620, 5140 },
+		{ DIM_Y, DIM_Y / SN_COORD, -150, 6600 }
+	},
+	{
+		USB_DEVICE_ID_APPLE_WELLSPRING4A_ANSI,
+		USB_DEVICE_ID_APPLE_WELLSPRING4A_ISO,
+		USB_DEVICE_ID_APPLE_WELLSPRING4A_JIS,
+		HAS_INTEGRATED_BUTTON,
+		0x84, sizeof(struct bt_data),
+		0x81, TYPE2, FINGER_TYPE2, FINGER_TYPE2 + SIZEOF_ALL_FINGERS,
+		{ DIM_PRESSURE, DIM_PRESSURE / SN_PRESSURE, 0, 300 },
+		{ DIM_WIDTH, DIM_WIDTH / SN_WIDTH, 0, 2048 },
+		{ DIM_X, DIM_X / SN_COORD, -4616, 5112 },
+		{ DIM_Y, DIM_Y / SN_COORD, -142, 5234 }
+	},
 	{}
 };
 
--- linux-mvl-dove-2.6.32.orig/drivers/input/mouse/synaptics.h
+++ linux-mvl-dove-2.6.32/drivers/input/mouse/synaptics.h
@@ -18,6 +18,7 @@
 #define SYN_QUE_SERIAL_NUMBER_SUFFIX	0x07
 #define SYN_QUE_RESOLUTION		0x08
 #define SYN_QUE_EXT_CAPAB		0x09
+#define SYN_QUE_EXT_CAPAB_0C		0x0c
 
 /* synatics modes */
 #define SYN_BIT_ABSOLUTE_MODE		(1 << 7)
@@ -48,6 +49,8 @@
 #define SYN_CAP_VALID(c)		((((c) & 0x00ff00) >> 8) == 0x47)
 #define SYN_EXT_CAP_REQUESTS(c)		(((c) & 0x700000) >> 20)
 #define SYN_CAP_MULTI_BUTTON_NO(ec)	(((ec) & 0x00f000) >> 12)
+#define SYN_CAP_PRODUCT_ID(ec)		(((ec) & 0xff0000) >> 16)
+#define SYN_CAP_CLICKPAD(ex0c)		((ex0c) & 0x100100)
 
 /* synaptics modes query bits */
 #define SYN_MODE_ABSOLUTE(m)		((m) & (1 << 7))
@@ -96,6 +99,7 @@
 	unsigned long int model_id;		/* Model-ID */
 	unsigned long int capabilities;		/* Capabilities */
 	unsigned long int ext_cap;		/* Extended Capabilities */
+	unsigned long int ext_cap_0c;		/* Ext Caps from 0x0c query */
 	unsigned long int identity;		/* Identification */
 	int x_res;				/* X resolution in units/mm */
 	int y_res;				/* Y resolution in units/mm */
--- linux-mvl-dove-2.6.32.orig/drivers/input/mouse/elantech.c
+++ linux-mvl-dove-2.6.32/drivers/input/mouse/elantech.c
@@ -24,6 +24,10 @@
 			printk(KERN_DEBUG format, ##arg);	\
 	} while (0)
 
+static bool force_elantech;
+module_param_named(force_elantech, force_elantech, bool, 0644);
+MODULE_PARM_DESC(force_elantech, "Force the Elantech PS/2 protocol extension to be used, 1 = enabled, 0 = disabled (default).");
+
 /*
  * Send a Synaptics style sliced query command
  */
@@ -178,36 +182,44 @@
 	struct elantech_data *etd = psmouse->private;
 	unsigned char *packet = psmouse->packet;
 	int fingers;
-	static int old_fingers;
 
-	if (etd->fw_version_maj == 0x01) {
-		/* byte 0:  D   U  p1  p2   1  p3   R   L
-		   byte 1:  f   0  th  tw  x9  x8  y9  y8 */
+	if (etd->fw_version < 0x020000) {
+		/*
+		 * byte 0:  D   U  p1  p2   1  p3   R   L
+		 * byte 1:  f   0  th  tw  x9  x8  y9  y8
+		 */
 		fingers = ((packet[1] & 0x80) >> 7) +
 				((packet[1] & 0x30) >> 4);
 	} else {
-		/* byte 0: n1  n0  p2  p1   1  p3   R   L
-		   byte 1:  0   0   0   0  x9  x8  y9  y8 */
+		/*
+		 * byte 0: n1  n0  p2  p1   1  p3   R   L
+		 * byte 1:  0   0   0   0  x9  x8  y9  y8
+		 */
 		fingers = (packet[0] & 0xc0) >> 6;
 	}
 
 	if (etd->jumpy_cursor) {
-		/* Discard packets that are likely to have bogus coordinates */
-		if (fingers > old_fingers) {
+		if (fingers != 1) {
+			etd->single_finger_reports = 0;
+		} else if (etd->single_finger_reports < 2) {
+			/* Discard first 2 reports of one finger, bogus */
+			etd->single_finger_reports++;
 			elantech_debug("elantech.c: discarding packet\n");
-			goto discard_packet_v1;
+			return;
 		}
 	}
 
 	input_report_key(dev, BTN_TOUCH, fingers != 0);
 
-	/* byte 2: x7  x6  x5  x4  x3  x2  x1  x0
-	   byte 3: y7  y6  y5  y4  y3  y2  y1  y0 */
+	/*
+	 * byte 2: x7  x6  x5  x4  x3  x2  x1  x0
+	 * byte 3: y7  y6  y5  y4  y3  y2  y1  y0
+	 */
 	if (fingers) {
 		input_report_abs(dev, ABS_X,
 			((packet[1] & 0x0c) << 6) | packet[2]);
-		input_report_abs(dev, ABS_Y, ETP_YMAX_V1 -
-			(((packet[1] & 0x03) << 8) | packet[3]));
+		input_report_abs(dev, ABS_Y,
+			ETP_YMAX_V1 - (((packet[1] & 0x03) << 8) | packet[3]));
 	}
 
 	input_report_key(dev, BTN_TOOL_FINGER, fingers == 1);
@@ -216,7 +228,7 @@
 	input_report_key(dev, BTN_LEFT, packet[0] & 0x01);
 	input_report_key(dev, BTN_RIGHT, packet[0] & 0x02);
 
-	if ((etd->fw_version_maj == 0x01) &&
+	if (etd->fw_version < 0x020000 &&
 	    (etd->capabilities & ETP_CAP_HAS_ROCKER)) {
 		/* rocker up */
 		input_report_key(dev, BTN_FORWARD, packet[0] & 0x40);
@@ -225,9 +237,6 @@
 	}
 
 	input_sync(dev);
-
- discard_packet_v1:
-	old_fingers = fingers;
 }
 
 /*
@@ -246,34 +255,47 @@
 
 	switch (fingers) {
 	case 1:
-		/* byte 1: x15 x14 x13 x12 x11 x10 x9  x8
-		   byte 2: x7  x6  x5  x4  x4  x2  x1  x0 */
-		input_report_abs(dev, ABS_X, (packet[1] << 8) | packet[2]);
-		/* byte 4: y15 y14 y13 y12 y11 y10 y8  y8
-		   byte 5: y7  y6  y5  y4  y3  y2  y1  y0 */
-		input_report_abs(dev, ABS_Y, ETP_YMAX_V2 -
-			((packet[4] << 8) | packet[5]));
+		/*
+		 * byte 1:  .   .   .   .   .  x10 x9  x8
+		 * byte 2: x7  x6  x5  x4  x4  x2  x1  x0
+		 */
+		input_report_abs(dev, ABS_X,
+			((packet[1] & 0x07) << 8) | packet[2]);
+		/*
+		 * byte 4:  .   .   .   .   .   .  y9  y8
+		 * byte 5: y7  y6  y5  y4  y3  y2  y1  y0
+		 */
+		input_report_abs(dev, ABS_Y,
+			ETP_YMAX_V2 - (((packet[4] & 0x03) << 8) | packet[5]));
 		break;
 
 	case 2:
-		/* The coordinate of each finger is reported separately with
-		   a lower resolution for two finger touches */
-		/* byte 0:  .   .  ay8 ax8  .   .   .   .
-		   byte 1: ax7 ax6 ax5 ax4 ax3 ax2 ax1 ax0 */
+		/*
+		 * The coordinate of each finger is reported separately
+		 * with a lower resolution for two finger touches:
+		 * byte 0:  .   .  ay8 ax8  .   .   .   .
+		 * byte 1: ax7 ax6 ax5 ax4 ax3 ax2 ax1 ax0
+		 */
 		x1 = ((packet[0] & 0x10) << 4) | packet[1];
 		/* byte 2: ay7 ay6 ay5 ay4 ay3 ay2 ay1 ay0 */
 		y1 = ETP_2FT_YMAX - (((packet[0] & 0x20) << 3) | packet[2]);
-		/* byte 3:  .   .  by8 bx8  .   .   .   .
-		   byte 4: bx7 bx6 bx5 bx4 bx3 bx2 bx1 bx0 */
+		/*
+		 * byte 3:  .   .  by8 bx8  .   .   .   .
+		 * byte 4: bx7 bx6 bx5 bx4 bx3 bx2 bx1 bx0
+		 */
 		x2 = ((packet[3] & 0x10) << 4) | packet[4];
 		/* byte 5: by7 by8 by5 by4 by3 by2 by1 by0 */
 		y2 = ETP_2FT_YMAX - (((packet[3] & 0x20) << 3) | packet[5]);
-		/* For compatibility with the X Synaptics driver scale up one
-		   coordinate and report as ordinary mouse movent */
+		/*
+		 * For compatibility with the X Synaptics driver scale up
+		 * one coordinate and report as ordinary mouse movent
+		 */
 		input_report_abs(dev, ABS_X, x1 << 2);
 		input_report_abs(dev, ABS_Y, y1 << 2);
-		/* For compatibility with the proprietary X Elantech driver
-		   report both coordinates as hat coordinates */
+		/*
+		 * For compatibility with the proprietary X Elantech driver
+		 * report both coordinates as hat coordinates
+		 */
 		input_report_abs(dev, ABS_HAT0X, x1);
 		input_report_abs(dev, ABS_HAT0Y, y1);
 		input_report_abs(dev, ABS_HAT1X, x2);
@@ -297,7 +319,7 @@
 	unsigned char p1, p2, p3;
 
 	/* Parity bits are placed differently */
-	if (etd->fw_version_maj == 0x01) {
+	if (etd->fw_version < 0x020000) {
 		/* byte 0:  D   U  p1  p2   1  p3   R   L */
 		p1 = (packet[0] & 0x20) >> 5;
 		p2 = (packet[0] & 0x10) >> 4;
@@ -420,6 +442,7 @@
 
 	__set_bit(EV_KEY, dev->evbit);
 	__set_bit(EV_ABS, dev->evbit);
+	__clear_bit(EV_REL, dev->evbit);
 
 	__set_bit(BTN_LEFT, dev->keybit);
 	__set_bit(BTN_RIGHT, dev->keybit);
@@ -432,7 +455,7 @@
 	switch (etd->hw_version) {
 	case 1:
 		/* Rocker button */
-		if ((etd->fw_version_maj == 0x01) &&
+		if (etd->fw_version < 0x020000 &&
 		    (etd->capabilities & ETP_CAP_HAS_ROCKER)) {
 			__set_bit(BTN_FORWARD, dev->keybit);
 			__set_bit(BTN_BACK, dev->keybit);
@@ -550,6 +573,24 @@
 	.attrs = elantech_attrs,
 };
 
+static bool elantech_is_signature_valid(const unsigned char *param)
+{
+	static const unsigned char rates[] = { 200, 100, 80, 60, 40, 20, 10 };
+	int i;
+
+	if (param[0] == 0)
+		return false;
+
+	if (param[1] == 0)
+		return true;
+
+	for (i = 0; i < ARRAY_SIZE(rates); i++)
+		if (param[2] == rates[i])
+			return false;
+
+	return true;
+}
+
 /*
  * Use magic knock to detect Elantech touchpad
  */
@@ -593,9 +634,13 @@
 	pr_debug("elantech.c: Elantech version query result 0x%02x, 0x%02x, 0x%02x.\n",
 		 param[0], param[1], param[2]);
 
-	if (param[0] == 0 || param[1] != 0) {
-		pr_debug("elantech.c: Probably not a real Elantech touchpad. Aborting.\n");
-		return -1;
+	if (!elantech_is_signature_valid(param)) {
+		if (!force_elantech) {
+			pr_debug("elantech.c: Probably not a real Elantech touchpad. Aborting.\n");
+			return -1;
+		}
+
+		pr_debug("elantech.c: Probably not a real Elantech touchpad. Enabling anyway due to force_elantech.\n");
 	}
 
 	if (set_properties) {
@@ -657,14 +702,14 @@
 		pr_err("elantech.c: failed to query firmware version.\n");
 		goto init_fail;
 	}
-	etd->fw_version_maj = param[0];
-	etd->fw_version_min = param[2];
+
+	etd->fw_version = (param[0] << 16) | (param[1] << 8) | param[2];
 
 	/*
 	 * Assume every version greater than this is new EeePC style
 	 * hardware with 6 byte packets
 	 */
-	if (etd->fw_version_maj >= 0x02 && etd->fw_version_min >= 0x30) {
+	if (etd->fw_version >= 0x020030) {
 		etd->hw_version = 2;
 		/* For now show extra debug information */
 		etd->debug = 1;
@@ -674,8 +719,9 @@
 		etd->hw_version = 1;
 		etd->paritycheck = 1;
 	}
-	pr_info("elantech.c: assuming hardware version %d, firmware version %d.%d\n",
-		etd->hw_version, etd->fw_version_maj, etd->fw_version_min);
+
+	pr_info("elantech.c: assuming hardware version %d, firmware version %d.%d.%d\n",
+		etd->hw_version, param[0], param[1], param[2]);
 
 	if (synaptics_send_cmd(psmouse, ETP_CAPABILITIES_QUERY, param)) {
 		pr_err("elantech.c: failed to query capabilities.\n");
@@ -686,14 +732,14 @@
 	etd->capabilities = param[0];
 
 	/*
-	 * This firmware seems to suffer from misreporting coordinates when
+	 * This firmware suffers from misreporting coordinates when
 	 * a touch action starts causing the mouse cursor or scrolled page
 	 * to jump. Enable a workaround.
 	 */
-	if (etd->fw_version_maj == 0x02 && etd->fw_version_min == 0x22) {
-		pr_info("elantech.c: firmware version 2.34 detected, "
+	if (etd->fw_version == 0x020022 || etd->fw_version == 0x020600) {
+		pr_info("elantech.c: firmware version 2.0.34/2.6.0 detected, "
 			"enabling jumpy cursor workaround\n");
-		etd->jumpy_cursor = 1;
+		etd->jumpy_cursor = true;
 	}
 
 	if (elantech_set_absolute_mode(psmouse)) {
--- linux-mvl-dove-2.6.32.orig/drivers/input/mouse/alps.c
+++ linux-mvl-dove-2.6.32/drivers/input/mouse/alps.c
@@ -5,6 +5,7 @@
  * Copyright (c) 2003-2005 Peter Osterlund <petero2@telia.com>
  * Copyright (c) 2004 Dmitry Torokhov <dtor@mail.ru>
  * Copyright (c) 2005 Vojtech Pavlik <vojtech@suse.cz>
+ * Copyright (c) 2009 Sebastian Kapfer <sebastian_kapfer@gmx.net>
  *
  * ALPS detection, tap switching and status querying info is taken from
  * tpconfig utility (by C. Scott Ananian and Bruce Kall).
@@ -35,6 +36,8 @@
 #define ALPS_OLDPROTO	0x10
 #define ALPS_PASS	0x20
 #define ALPS_FW_BK_2	0x40
+#define ALPS_PS2_INTERLEAVED	0x80	/* 3-byte PS/2 packet interleaved with
+					   6-byte ALPS packet */
 
 static const struct alps_model_info alps_model_data[] = {
 	{ { 0x32, 0x02, 0x14 },	0xf8, 0xf8, ALPS_PASS | ALPS_DUALPOINT }, /* Toshiba Salellite Pro M10 */
@@ -55,8 +58,12 @@
 	{ { 0x20, 0x02, 0x0e },	0xf8, 0xf8, ALPS_PASS | ALPS_DUALPOINT }, /* XXX */
 	{ { 0x22, 0x02, 0x0a },	0xf8, 0xf8, ALPS_PASS | ALPS_DUALPOINT },
 	{ { 0x22, 0x02, 0x14 }, 0xff, 0xff, ALPS_PASS | ALPS_DUALPOINT }, /* Dell Latitude D600 */
-	{ { 0x62, 0x02, 0x14 }, 0xcf, 0xcf, ALPS_PASS | ALPS_DUALPOINT }, /* Dell Latitude E6500 */
+	/* Dell Latitude E5500, E6400, E6500, Precision M4400 */
+	{ { 0x62, 0x02, 0x14 }, 0xcf, 0xcf,
+		ALPS_PASS | ALPS_DUALPOINT | ALPS_PS2_INTERLEAVED },
 	{ { 0x73, 0x02, 0x50 }, 0xcf, 0xcf, ALPS_FW_BK_1 },		  /* Dell Vostro 1400 */
+	{ { 0x52, 0x01, 0x14 }, 0xff, 0xff,
+		ALPS_PASS | ALPS_DUALPOINT | ALPS_PS2_INTERLEAVED },	  /* Toshiba Tecra A11-11L */
 };
 
 /*
@@ -66,20 +73,88 @@
  */
 
 /*
- * ALPS abolute Mode - new format
+ * PS/2 packet format
+ *
+ * byte 0:  0    0 YSGN XSGN    1    M    R    L
+ * byte 1: X7   X6   X5   X4   X3   X2   X1   X0
+ * byte 2: Y7   Y6   Y5   Y4   Y3   Y2   Y1   Y0
+ *
+ * Note that the device never signals overflow condition.
+ *
+ * ALPS absolute Mode - new format
  *
  * byte 0:  1    ?    ?    ?    1    ?    ?    ?
  * byte 1:  0   x6   x5   x4   x3   x2   x1   x0
- * byte 2:  0   x10  x9   x8   x7    ?  fin  ges
+ * byte 2:  0  x10   x9   x8   x7    ?  fin  ges
  * byte 3:  0   y9   y8   y7    1    M    R    L
  * byte 4:  0   y6   y5   y4   y3   y2   y1   y0
  * byte 5:  0   z6   z5   z4   z3   z2   z1   z0
  *
+ * Dualpoint device -- interleaved packet format
+ *
+ * byte 0:    1    1    0    0    1    1    1    1
+ * byte 1:    0   x6   x5   x4   x3   x2   x1   x0
+ * byte 2:    0  x10   x9   x8   x7    0  fin  ges
+ * byte 3:    0    0 YSGN XSGN    1    1    1    1
+ * byte 4:   X7   X6   X5   X4   X3   X2   X1   X0
+ * byte 5:   Y7   Y6   Y5   Y4   Y3   Y2   Y1   Y0
+ * byte 6:    0   y9   y8   y7    1    m    r    l
+ * byte 7:    0   y6   y5   y4   y3   y2   y1   y0
+ * byte 8:    0   z6   z5   z4   z3   z2   z1   z0
+ *
+ * CAPITALS = stick, miniscules = touchpad
+ *
  * ?'s can have different meanings on different models,
  * such as wheel rotation, extra buttons, stick buttons
  * on a dualpoint, etc.
  */
 
+static bool alps_is_valid_first_byte(const struct alps_model_info *model,
+				     unsigned char data)
+{
+	return (data & model->mask0) == model->byte0;
+}
+
+static void alps_report_buttons(struct psmouse *psmouse,
+				struct input_dev *dev1, struct input_dev *dev2,
+				int left, int right, int middle)
+{
+	struct alps_data *priv = psmouse->private;
+	const struct alps_model_info *model = priv->i;
+
+	if (model->flags & ALPS_PS2_INTERLEAVED) {
+		struct input_dev *dev;
+
+		/*
+		 * If shared button has already been reported on the
+		 * other device (dev2) then this event should be also
+		 * sent through that device.
+		 */
+		dev = test_bit(BTN_LEFT, dev2->key) ? dev2 : dev1;
+		input_report_key(dev, BTN_LEFT, left);
+
+		dev = test_bit(BTN_RIGHT, dev2->key) ? dev2 : dev1;
+		input_report_key(dev, BTN_RIGHT, right);
+
+		dev = test_bit(BTN_MIDDLE, dev2->key) ? dev2 : dev1;
+		input_report_key(dev, BTN_MIDDLE, middle);
+
+		/*
+		 * Sync the _other_ device now, we'll do the first
+		 * device later once we report the rest of the events.
+		 */
+		input_sync(dev2);
+	} else {
+		/*
+		 * For devices with non-interleaved packets we know what
+		 * device buttons belong to so we can simply report them.
+		 */
+		input_report_key(dev1, BTN_LEFT, left);
+		input_report_key(dev1, BTN_RIGHT, right);
+		input_report_key(dev1, BTN_MIDDLE, middle);
+	}
+}
+
 static void alps_process_packet(struct psmouse *psmouse)
 {
 	struct alps_data *priv = psmouse->private;
@@ -89,18 +164,6 @@
 	int x, y, z, ges, fin, left, right, middle;
 	int back = 0, forward = 0;
 
-	if ((packet[0] & 0xc8) == 0x08) {   /* 3-byte PS/2 packet */
-		input_report_key(dev2, BTN_LEFT,   packet[0] & 1);
-		input_report_key(dev2, BTN_RIGHT,  packet[0] & 2);
-		input_report_key(dev2, BTN_MIDDLE, packet[0] & 4);
-		input_report_rel(dev2, REL_X,
-			packet[1] ? packet[1] - ((packet[0] << 4) & 0x100) : 0);
-		input_report_rel(dev2, REL_Y,
-			packet[2] ? ((packet[0] << 3) & 0x100) - packet[2] : 0);
-		input_sync(dev2);
-		return;
-	}
-
 	if (priv->i->flags & ALPS_OLDPROTO) {
 		left = packet[2] & 0x10;
 		right = packet[2] & 0x08;
@@ -136,18 +199,13 @@
 		input_report_rel(dev2, REL_X,  (x > 383 ? (x - 768) : x));
 		input_report_rel(dev2, REL_Y, -(y > 255 ? (y - 512) : y));
 
-		input_report_key(dev2, BTN_LEFT, left);
-		input_report_key(dev2, BTN_RIGHT, right);
-		input_report_key(dev2, BTN_MIDDLE, middle);
+		alps_report_buttons(psmouse, dev2, dev, left, right, middle);
 
-		input_sync(dev);
 		input_sync(dev2);
 		return;
 	}
 
-	input_report_key(dev, BTN_LEFT, left);
-	input_report_key(dev, BTN_RIGHT, right);
-	input_report_key(dev, BTN_MIDDLE, middle);
+	alps_report_buttons(psmouse, dev, dev2, left, right, middle);
 
 	/* Convert hardware tap to a reasonable Z value */
 	if (ges && !fin) z = 40;
@@ -188,25 +246,168 @@
 	input_sync(dev);
 }
 
+static void alps_report_bare_ps2_packet(struct psmouse *psmouse,
+					unsigned char packet[],
+					bool report_buttons)
+{
+	struct alps_data *priv = psmouse->private;
+	struct input_dev *dev2 = priv->dev2;
+
+	if (report_buttons)
+		alps_report_buttons(psmouse, dev2, psmouse->dev,
+				packet[0] & 1, packet[0] & 2, packet[0] & 4);
+
+	input_report_rel(dev2, REL_X,
+		packet[1] ? packet[1] - ((packet[0] << 4) & 0x100) : 0);
+	input_report_rel(dev2, REL_Y,
+		packet[2] ? ((packet[0] << 3) & 0x100) - packet[2] : 0);
+
+	input_sync(dev2);
+}
+
+static psmouse_ret_t alps_handle_interleaved_ps2(struct psmouse *psmouse)
+{
+	struct alps_data *priv = psmouse->private;
+
+	if (psmouse->pktcnt < 6)
+		return PSMOUSE_GOOD_DATA;
+
+	if (psmouse->pktcnt == 6) {
+		/*
+		 * Start a timer to flush the packet if it ends up last
+		 * 6-byte packet in the stream. Timer needs to fire
+		 * psmouse core times out itself. 20 ms should be enough
+		 * to decide if we are getting more data or not.
+		 */
+		mod_timer(&priv->timer, jiffies + msecs_to_jiffies(20));
+		return PSMOUSE_GOOD_DATA;
+	}
+
+	del_timer(&priv->timer);
+
+	if (psmouse->packet[6] & 0x80) {
+
+		/*
+		 * Highest bit is set - that means we either had
+		 * complete ALPS packet and this is start of the
+		 * next packet or we got garbage.
+		 */
+
+		if (((psmouse->packet[3] |
+		      psmouse->packet[4] |
+		      psmouse->packet[5]) & 0x80) ||
+		    (!alps_is_valid_first_byte(priv->i, psmouse->packet[6]))) {
+			dbg("refusing packet %x %x %x %x "
+			    "(suspected interleaved ps/2)\n",
+			    psmouse->packet[3], psmouse->packet[4],
+			    psmouse->packet[5], psmouse->packet[6]);
+			return PSMOUSE_BAD_DATA;
+		}
+
+		alps_process_packet(psmouse);
+
+		/* Continue with the next packet */
+		psmouse->packet[0] = psmouse->packet[6];
+		psmouse->pktcnt = 1;
+
+	} else {
+
+		/*
+		 * High bit is 0 - that means that we indeed got a PS/2
+		 * packet in the middle of ALPS packet.
+		 *
+		 * There is also possibility that we got 6-byte ALPS
+		 * packet followed  by 3-byte packet from trackpoint. We
+		 * can not distinguish between these 2 scenarios but
+		 * becase the latter is unlikely to happen in course of
+		 * normal operation (user would need to press all
+		 * buttons on the pad and start moving trackpoint
+		 * without touching the pad surface) we assume former.
+		 * Even if we are wrong the wost thing that would happen
+		 * the cursor would jump but we should not get protocol
+		 * desynchronization.
+		 */
+
+		alps_report_bare_ps2_packet(psmouse, &psmouse->packet[3],
+					    false);
+
+		/*
+		 * Continue with the standard ALPS protocol handling,
+		 * but make sure we won't process it as an interleaved
+		 * packet again, which may happen if all buttons are
+		 * pressed. To avoid this let's reset the 4th bit which
+		 * is normally 1.
+		 */
+		psmouse->packet[3] = psmouse->packet[6] & 0xf7;
+		psmouse->pktcnt = 4;
+	}
+
+	return PSMOUSE_GOOD_DATA;
+}
+
+static void alps_flush_packet(unsigned long data)
+{
+	struct psmouse *psmouse = (struct psmouse *)data;
+
+	serio_pause_rx(psmouse->ps2dev.serio);
+
+	if (psmouse->pktcnt == 6) {
+
+		/*
+		 * We did not any more data in reasonable amount of time.
+		 * Validate the last 3 bytes and process as a standard
+		 * ALPS packet.
+		 */
+		if ((psmouse->packet[3] |
+		     psmouse->packet[4] |
+		     psmouse->packet[5]) & 0x80) {
+			dbg("refusing packet %x %x %x "
+			    "(suspected interleaved ps/2)\n",
+			    psmouse->packet[3], psmouse->packet[4],
+			    psmouse->packet[5]);
+		} else {
+			alps_process_packet(psmouse);
+		}
+		psmouse->pktcnt = 0;
+	}
+
+	serio_continue_rx(psmouse->ps2dev.serio);
+}
+
 static psmouse_ret_t alps_process_byte(struct psmouse *psmouse)
 {
 	struct alps_data *priv = psmouse->private;
+	const struct alps_model_info *model = priv->i;
 
 	if ((psmouse->packet[0] & 0xc8) == 0x08) { /* PS/2 packet */
 		if (psmouse->pktcnt == 3) {
-			alps_process_packet(psmouse);
+			alps_report_bare_ps2_packet(psmouse, psmouse->packet,
+						    true);
 			return PSMOUSE_FULL_PACKET;
 		}
 		return PSMOUSE_GOOD_DATA;
 	}
 
-	if ((psmouse->packet[0] & priv->i->mask0) != priv->i->byte0)
+	/* Check for PS/2 packet stuffed in the middle of ALPS packet. */
+
+	if ((model->flags & ALPS_PS2_INTERLEAVED) &&
+	    psmouse->pktcnt >= 4 && (psmouse->packet[3] & 0x0f) == 0x0f) {
+		return alps_handle_interleaved_ps2(psmouse);
+	}
+
+	if (!alps_is_valid_first_byte(model, psmouse->packet[0])) {
+		dbg("refusing packet[0] = %x (mask0 = %x, byte0 = %x)\n",
+		    psmouse->packet[0], model->mask0, model->byte0);
 		return PSMOUSE_BAD_DATA;
+	}
 
 	/* Bytes 2 - 6 should have 0 in the highest bit */
 	if (psmouse->pktcnt >= 2 && psmouse->pktcnt <= 6 &&
-	    (psmouse->packet[psmouse->pktcnt - 1] & 0x80))
+	    (psmouse->packet[psmouse->pktcnt - 1] & 0x80)) {
+		dbg("refusing packet[%i] = %x\n",
+		    psmouse->pktcnt - 1, psmouse->packet[psmouse->pktcnt - 1]);
 		return PSMOUSE_BAD_DATA;
+	}
 
 	if (psmouse->pktcnt == 6) {
 		alps_process_packet(psmouse);
@@ -432,7 +633,8 @@
 
 static int alps_reconnect(struct psmouse *psmouse)
 {
-	psmouse_reset(psmouse);
+	/* UBUNTU: Causes lockups on resume */
+	/* psmouse_reset(psmouse); */
 
 	if (alps_hw_init(psmouse, NULL))
 		return -1;
@@ -445,6 +647,7 @@
 	struct alps_data *priv = psmouse->private;
 
 	psmouse_reset(psmouse);
+	del_timer_sync(&priv->timer);
 	input_unregister_device(priv->dev2);
 	kfree(priv);
 }
@@ -461,6 +664,8 @@
 		goto init_fail;
 
 	priv->dev2 = dev2;
+	setup_timer(&priv->timer, alps_flush_packet, (unsigned long)psmouse);
+
 	psmouse->private = priv;
 
 	if (alps_hw_init(psmouse, &version))
--- linux-mvl-dove-2.6.32.orig/drivers/w1/slaves/w1_therm.c
+++ linux-mvl-dove-2.6.32/drivers/w1/slaves/w1_therm.c
@@ -115,9 +115,8 @@
 
 static inline int w1_DS18B20_convert_temp(u8 rom[9])
 {
-	int t = ((s16)rom[1] << 8) | rom[0];
-	t = t*1000/16;
-	return t;
+	s16 t = le16_to_cpup((__le16 *)rom);
+	return t*1000/16;
 }
 
 static inline int w1_DS18S20_convert_temp(u8 rom[9])
--- linux-mvl-dove-2.6.32.orig/drivers/power/olpc_battery.c
+++ linux-mvl-dove-2.6.32/drivers/power/olpc_battery.c
@@ -271,14 +271,14 @@
 		if (ret)
 			return ret;
 
-		val->intval = (int)be16_to_cpu(ec_word) * 9760L / 32;
+		val->intval = (s16)be16_to_cpu(ec_word) * 9760L / 32;
 		break;
 	case POWER_SUPPLY_PROP_CURRENT_AVG:
 		ret = olpc_ec_cmd(EC_BAT_CURRENT, NULL, 0, (void *)&ec_word, 2);
 		if (ret)
 			return ret;
 
-		val->intval = (int)be16_to_cpu(ec_word) * 15625L / 120;
+		val->intval = (s16)be16_to_cpu(ec_word) * 15625L / 120;
 		break;
 	case POWER_SUPPLY_PROP_CAPACITY:
 		ret = olpc_ec_cmd(EC_BAT_SOC, NULL, 0, &ec_byte, 1);
@@ -299,7 +299,7 @@
 		if (ret)
 			return ret;
 
-		val->intval = (int)be16_to_cpu(ec_word) * 100 / 256;
+		val->intval = (s16)be16_to_cpu(ec_word) * 100 / 256;
 		break;
 	case POWER_SUPPLY_PROP_TEMP_AMBIENT:
 		ret = olpc_ec_cmd(EC_AMB_TEMP, NULL, 0, (void *)&ec_word, 2);
@@ -313,7 +313,7 @@
 		if (ret)
 			return ret;
 
-		val->intval = (int)be16_to_cpu(ec_word) * 6250 / 15;
+		val->intval = (s16)be16_to_cpu(ec_word) * 6250 / 15;
 		break;
 	case POWER_SUPPLY_PROP_SERIAL_NUMBER:
 		ret = olpc_ec_cmd(EC_BAT_SERIAL, NULL, 0, (void *)&ser_buf, 8);
--- linux-mvl-dove-2.6.32.orig/drivers/power/ds2760_battery.c
+++ linux-mvl-dove-2.6.32/drivers/power/ds2760_battery.c
@@ -211,7 +211,7 @@
 	if (di->rem_capacity > 100)
 		di->rem_capacity = 100;
 
-	if (di->current_uA >= 100L)
+	if (di->current_uA < -100L)
 		di->life_sec = -((di->accum_current_uAh - di->empty_uAh) * 36L)
 					/ (di->current_uA / 100L);
 	else
--- linux-mvl-dove-2.6.32.orig/drivers/power/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/power/Kconfig
@@ -70,10 +70,17 @@
 	help
 	  Say Y to enable support for the battery on the OLPC laptop.
 
-config BATTERY_TOSA
-	tristate "Sharp SL-6000 (tosa) battery"
-	depends on MACH_TOSA && MFD_TC6393XB && TOUCHSCREEN_WM97XX
+config BATTERY_BQ2084
+	tristate "BQ2084 Gauge battery driver (used in Marvell Dove RD)"
+	default y if MACH_DOVE_RD
 	help
+ 	  Say Y to enable support for the batteries with the TI BQ2084
+          SBS v1.1 compliant gas gauge
+
+config BATTERY_TOSA
+        tristate "Sharp SL-6000 (tosa) battery"
+        depends on MACH_TOSA && MFD_TC6393XB && TOUCHSCREEN_WM97XX
+        help
 	  Say Y to enable support for the battery on the Sharp Zaurus
 	  SL-6000 (tosa) models.
 
@@ -110,4 +117,16 @@
 	help
 	 Say Y to include support for NXP PCF50633 Main Battery Charger.
 
+config BATTERY_DS2782
+	tristate "DS2782 battery driver"
+	depends on I2C
+	help
+	  Say Y here to enable support for batteries with ds2782 chip.
+
+config BATTERY_MCU
+	tristate "MCU DS2782 battery driver"
+	depends on I2C
+	help
+	  Say Y here to enable support for batteries with MCU ds2782 chip.
+
 endif # POWER_SUPPLY
--- linux-mvl-dove-2.6.32.orig/drivers/power/Makefile
+++ linux-mvl-dove-2.6.32/drivers/power/Makefile
@@ -29,3 +29,6 @@
 obj-$(CONFIG_BATTERY_DA9030)	+= da9030_battery.o
 obj-$(CONFIG_BATTERY_MAX17040)	+= max17040_battery.o
 obj-$(CONFIG_CHARGER_PCF50633)	+= pcf50633-charger.o
+obj-$(CONFIG_BATTERY_BQ2084)	+= bq2084_battery.o
+obj-$(CONFIG_BATTERY_DS2782)	+= ds2782_battery.o
+obj-$(CONFIG_BATTERY_MCU)	+= avengers_lite_power.o
--- linux-mvl-dove-2.6.32.orig/drivers/power/avengers_lite_power.c
+++ linux-mvl-dove-2.6.32/drivers/power/avengers_lite_power.c
@@ -0,0 +1,483 @@
+#include <linux/module.h>
+#include <linux/param.h>
+#include <linux/jiffies.h>
+#include <linux/workqueue.h>
+#include <linux/pm.h>
+#include <linux/platform_device.h>
+#include <linux/power_supply.h>
+#include <linux/rtc.h>
+#include "../char/power_mcu.h"
+
+
+static unsigned int cache_time = 1000;
+module_param(cache_time, uint, 0644);
+
+
+int avengers_rtc_read_time(struct rtc_time *tm );
+int avengers_rtc_set_time(struct rtc_time *tm ) ;
+
+MODULE_PARM_DESC(cache_time, "cache time in milliseconds");
+
+
+
+static int avengers_lite_init_status( struct avengers_lite_device_info *di )
+{
+	di->ec_status = POWER_SUPPLY_STATUS_UNKNOWN;
+	di->STATUS = EC_NO_CONNECTION ;
+	di->VERSION = -1;
+	di->RARC = 0;
+	di->BATT_FAULT = 1;
+	di->AC_IN = 0;
+	di->BATT_PROTECT = -1;
+	di->CURRENT = -1;
+	di->VOLT1 = 0;
+	di->VOLT2 = 0;
+	di->TEMP = 0;
+
+	return 0;
+
+}
+
+
+
+static int avengers_lite_read_status(struct avengers_lite_device_info *di)
+{
+	int ret;
+	unsigned char temp_byte;
+	short temp_word;
+
+
+	if (di->update_time && time_before(jiffies, di->update_time +  msecs_to_jiffies(cache_time)))
+		return 0;
+
+	di->update_time = jiffies;
+
+	ret = 0;
+
+	if ( power_mcu_read( MCU_VERSION , &di->VERSION ) == -EFAULT )
+	{
+		di->STATUS = EC_NO_CONNECTION;
+	}
+	else
+	{
+		di->STATUS = 0;
+	}
+
+       if ( di->STATUS != EC_NO_CONNECTION )
+       {
+
+	       //power_mcu_read( MCU_VERSION , &di->VERSION );
+	       //printk("********************************%d\n",di->VERSION);
+
+	       power_mcu_read( MCU_DS_RARC , &temp_byte );
+	       if (( temp_byte < di->RARC )||(temp_byte > di->RARC ))
+	       {
+		       ret = 1;
+		       di->RARC = temp_byte;
+	       }
+	       //power_mcu_read( MCU_DS_RSRC , &di->RSRC );
+	       //power_mcu_read( MCU_DS_AS , &di->AS );
+	       //power_mcu_read( MCU_DS_SFR , &di->SFR );
+	       //power_mcu_read( MCU_DS_CONTROL , &di->CONTROL );
+	       //power_mcu_read( MCU_DS_AB , &di->AB );
+	       //power_mcu_read( MCU_DS_VCHG , &di->VCHG );
+	       //power_mcu_read( MCU_DS_IMIN , &di->IMIN );
+	       //power_mcu_read( MCU_DS_VAE , &di->VAE );
+	       //power_mcu_read( MCU_DS_IAE , &di->IAE );
+	       //power_mcu_read( MCU_DS_RSNSP , &di->RSNSP );
+	       power_mcu_read( MCU_BATT_ABSENT , &temp_byte );
+	       if ( temp_byte != di->BATT_ABSENT )
+	       {
+		       ret = 1;
+		       di->BATT_ABSENT = temp_byte;
+	       }
+
+	       power_mcu_read( MCU_AC_IN , &temp_byte );
+	       if ( temp_byte != di->AC_IN )
+	       {
+		       ret = 1;
+		       di->AC_IN = temp_byte;
+	       }
+
+	       power_mcu_read( MCU_BATT_PROTECT , &temp_byte );
+	       if( temp_byte != di->BATT_PROTECT )
+	       {
+		       ret = 1;
+		       di->BATT_PROTECT = temp_byte;
+	       }
+	      
+	       //power_mcu_read( MCU_BATT_CYCLE , &di->BATT_CYCLE );
+	       //power_mcu_read( MCU_DS_RAAC , &di->RAAC );
+	       //power_mcu_read( MCU_DS_RSAC , &di->RSAC );
+	       //power_mcu_read( MCU_DS_IAVG , &di->IAVG );
+	       power_mcu_read( MCU_DS_VOLT1 , &temp_word );
+	       temp_word = temp_word >> 5;
+//	       if (( temp_word > di->VOLT1 + 1 )||( temp_word < di->VOLT1 - 1 ))
+	       {
+		       ret = 1;
+	       	       di->VOLT1 = temp_word;
+
+		}
+
+	       power_mcu_read( MCU_DS_CURRENT , &temp_word );
+
+	       if ((( temp_word < 0 ) && ( di->CURRENT > 0)) || ((temp_word >0 )&&(di->CURRENT <0)))
+	       {
+		       ret = 1;
+		       di->CURRENT = temp_word;
+	       }
+	       if (( temp_word > di->CURRENT + 5 )||( temp_word < di->CURRENT - 5 ))
+	       {
+		       ret = 1;
+		       di->CURRENT = temp_word;
+		}
+
+ 		printk("MCU_BATT_ABSENT=0x%x,MCU_AC_IN=0x%x,MCU_BATT_PROTECT=0x%x,MCU_DS_VOLT1=0x%x,MCU_DS_CURRENT=0x%x,RARC=0x%x\n",di->BATT_ABSENT,di->AC_IN,di->BATT_PROTECT,di->VOLT1,di->CURRENT,di->RARC);
+
+	       //power_mcu_read( MCU_DS_ACR , &di->ACR );
+	       //power_mcu_read( MCU_DS_ACRL , &di->ACRL ):
+	       //power_mcu_read( MCU_DS_FULL , &di->FULL );
+	       //power_mcu_read( MCU_DS_AE , &di->AE );
+	       //power_mcu_read( MCU_DS_SE , &di->SE );
+	       //power_mcu_read( MCU_DS_AC , &di->AC );
+	       power_mcu_read( MCU_DS_TEMP , &temp_word );
+	       temp_word = temp_word >> 5;
+	       if (( temp_word > di->TEMP + 5 )||( temp_word < di->TEMP - 5 ))
+	       {
+		       ret = 1;
+		       di->TEMP = temp_word;
+		}
+
+	       //power_mcu_read( MCU_DS_FULL40 , &di->FULL40 );
+#if 0
+	       power_mcu_read( MCU_DS_VOLT2 , &temp_word );
+	       temp_word = temp_word >> 5;
+	       if (( temp_word > di->VOLT2 + 1 )||( temp_word < di->VOLT2 - 1 ))
+	       {
+		       ret = 1;
+		       di->VOLT2 = temp_word;
+		}
+#endif	       
+
+//	       power_mcu_read( MCU_BATT_FULL , &di->BATT_FULL );
+
+/*	       power_mcu_write_word( MCU_RTC_LLSB , 0xff );
+	       power_mcu_write_word( MCU_RTC_LMSB , 0x44 );
+	       power_mcu_write_word( MCU_RTC_HLSB , 0x11 );
+	       power_mcu_write_word( MCU_RTC_HMSB , 0x0);
+	       //power_mcu_write_byte( MCU_RTC_STOP , 0 );
+
+	       power_mcu_read( MCU_RTC_LLSB , &di->RTC_LLSB );
+	       power_mcu_read( MCU_RTC_LMSB , &di->RTC_LMSB );
+	       power_mcu_read( MCU_RTC_HLSB , &di->RTC_HLSB );
+	       power_mcu_read( MCU_RTC_HMSB , &di->RTC_HMSB );
+	       printk("llsb0x%x,lmsb0x%x,hlsb0x%x,hmsb0x%x\n",di->RTC_LLSB,di->RTC_LMSB,di->RTC_HLSB,di->RTC_HMSB);
+*/
+
+       }
+
+	return ret;
+}
+
+
+static void avengers_lite_update_status(struct avengers_lite_device_info *di)
+{
+	int old_charge_status = di->ec_status ;
+	short current_temp;
+
+	if ( avengers_lite_read_status(di) != 0 )
+	{
+		kobject_uevent( &di->bat.dev->kobj , KOBJ_CHANGE );
+	}
+
+	if (di->ec_status == POWER_SUPPLY_STATUS_UNKNOWN)
+		di->full_counter = 0;
+
+       current_temp = di->CURRENT ;
+
+	if (power_supply_am_i_supplied(&di->bat))
+       {
+	       if (current_temp > 0 )
+	       {
+		       di->ec_status = POWER_SUPPLY_STATUS_CHARGING;
+		       di->full_counter = 0;
+	       }
+	       else if (current_temp < 0 )
+	       {
+		       if (di->ec_status != POWER_SUPPLY_STATUS_NOT_CHARGING)
+			       dev_notice(di->dev, "not enough power to charge\n");
+		       di->ec_status = POWER_SUPPLY_STATUS_NOT_CHARGING;
+		       di->full_counter = 0;
+	       }
+	       else if (current_temp < 10000 && di->ec_status != POWER_SUPPLY_STATUS_FULL)
+               {
+
+			/* Don't consider the battery to be full unless
+			 * we've seen the current < 10 mA at least two
+			 * consecutive times. */
+
+			di->full_counter++;
+
+			if (di->full_counter < 2)
+                     	{
+				di->ec_status = POWER_SUPPLY_STATUS_CHARGING;
+			}
+			else
+			{
+				di->ec_status = POWER_SUPPLY_STATUS_FULL;
+			}
+		}
+	}
+       else
+       {
+		di->ec_status = POWER_SUPPLY_STATUS_DISCHARGING;
+		di->full_counter = 0;
+	}
+
+	if (di->ec_status != old_charge_status)
+		power_supply_changed(&di->bat);
+
+
+}
+
+
+static void avengers_lite_work(struct work_struct *work)
+{
+	struct avengers_lite_device_info *di = container_of(work,
+		struct avengers_lite_device_info, monitor_work.work);
+	const int interval = 1;
+
+	dev_dbg(di->dev, "%s\n", __func__);
+
+	avengers_lite_update_status(di);
+	queue_delayed_work(di->monitor_wqueue, &di->monitor_work, interval);
+}
+
+#define to_avengers_lite_device_info(x) container_of((x), struct avengers_lite_device_info, bat);
+
+static void avengers_lite_external_power_changed(struct power_supply *psy)
+{
+	struct avengers_lite_device_info *di = to_avengers_lite_device_info(psy);
+
+	dev_dbg(di->dev, "%s\n", __func__);
+
+	cancel_delayed_work(&di->monitor_work);
+	queue_delayed_work(di->monitor_wqueue, &di->monitor_work, 1);
+}
+
+static int avengers_lite_get_property(struct power_supply *psy,
+				       enum power_supply_property psp,
+				       union power_supply_propval *val)
+{
+	struct avengers_lite_device_info *di = to_avengers_lite_device_info(psy);
+
+	avengers_lite_read_status(di);
+
+	switch (psp)
+       	{
+	case POWER_SUPPLY_PROP_VOLTAGE_NOW:
+		//val->intval = di->VOLT1 + di->VOLT2 ;
+		val->intval = di->VOLT1 *2;	
+		break;
+
+	case POWER_SUPPLY_PROP_CURRENT_NOW:
+		val->intval = di->CURRENT ;
+		break;
+
+	case POWER_SUPPLY_PROP_CHARGE_FULL:
+		if (( di->CURRENT < 50 ) && ( di->CURRENT>0))
+			val->intval = 1 ;
+		else
+			val->intval = 0;
+		break;
+
+	case POWER_SUPPLY_PROP_CHARGE_EMPTY:
+		if ( di->RARC < 5 )
+			val->intval = 1;
+		else
+			val->intval = 0;
+		break;
+
+	case POWER_SUPPLY_PROP_CHARGE_NOW:
+		if ( di->CURRENT > 50 )
+			val->intval = 1;
+		else
+			val->intval = 0;
+		break;
+
+	case POWER_SUPPLY_PROP_TEMP:
+		val->intval = di->TEMP;
+		break;
+       case POWER_SUPPLY_PROP_ONLINE:
+		val->intval = di->AC_IN ; // 1---ac online 0---ac offline
+		break;
+       case POWER_SUPPLY_PROP_PRESENT:
+              val->intval = !di->BATT_ABSENT ; //battery is online/offline
+              break;
+       case POWER_SUPPLY_PROP_CAPACITY:
+              val->intval = di->RARC;
+              break;
+       case POWER_SUPPLY_PROP_STATUS: /*1--charging 2--discharging 4--Full 0--Unkhown 3--Not charging*/
+              if ( di->STATUS == EC_NO_CONNECTION )
+                val->intval = 3;
+              else
+              {
+                    if ( di->CURRENT < 0 )
+                        val->intval = 2;
+                    else
+                        val->intval = 1;
+                    if ( di->RARC > 95 )
+                        val->intval = 4;
+              }
+
+              break;
+       case POWER_SUPPLY_PROP_HEALTH://3
+       /*3--Dead 1--Good 2--Overheat 5--Unspeified failure 0--Unknown 4--Over voltage*/
+              if ( di->BATT_PROTECT & MASK_BATT_OV )
+              {
+                    val->intval = 4 ;
+              }
+              else
+                    val->intval = 1;
+
+              break;
+       case POWER_SUPPLY_PROP_TECHNOLOGY:
+              val->intval = 2;
+              break;
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static enum power_supply_property avengers_lite_battery_props[] = {
+	POWER_SUPPLY_PROP_VOLTAGE_NOW,
+	POWER_SUPPLY_PROP_CURRENT_NOW,
+	POWER_SUPPLY_PROP_CHARGE_FULL,
+	POWER_SUPPLY_PROP_CHARGE_EMPTY,
+	POWER_SUPPLY_PROP_CHARGE_NOW,
+	POWER_SUPPLY_PROP_TEMP,
+	POWER_SUPPLY_PROP_ONLINE,
+	POWER_SUPPLY_PROP_PRESENT,
+	POWER_SUPPLY_PROP_CAPACITY,
+	POWER_SUPPLY_PROP_STATUS,
+	POWER_SUPPLY_PROP_HEALTH,
+	POWER_SUPPLY_PROP_TECHNOLOGY,
+
+};
+
+
+
+
+static int avengers_lite_power_probe(struct platform_device *pdev)
+{
+	int retval = 0;
+	struct avengers_lite_device_info *di;
+	
+	di = kzalloc(sizeof(*di), GFP_KERNEL);
+	if (!di) {
+		retval = -ENOMEM;
+		goto di_alloc_failed;
+	}
+
+	platform_set_drvdata(pdev, di);
+
+	di->dev		= &pdev->dev;
+	di->bat.name	   = pdev->name;
+	di->bat.type	   = POWER_SUPPLY_TYPE_BATTERY;
+	di->bat.properties     = avengers_lite_battery_props;
+	di->bat.num_properties = ARRAY_SIZE(avengers_lite_battery_props);
+	di->bat.get_property   = avengers_lite_get_property;
+	di->bat.external_power_changed =  avengers_lite_external_power_changed;
+
+	di->ec_status = POWER_SUPPLY_STATUS_UNKNOWN;
+
+	avengers_lite_init_status( di );
+
+	retval = power_supply_register(&pdev->dev, &di->bat);
+	if (retval) {
+		dev_err(di->dev, "failed to register battery\n");
+		goto batt_failed;
+	}
+
+	INIT_DELAYED_WORK(&di->monitor_work, avengers_lite_work);
+	//di->monitor_wqueue = create_singlethread_workqueue(pdev->dev.bus_id);
+	di->monitor_wqueue = create_singlethread_workqueue(dev_name(&pdev->dev));
+	if (!di->monitor_wqueue) {
+		retval = -ESRCH;
+		goto workqueue_failed;
+	}
+	queue_delayed_work(di->monitor_wqueue, &di->monitor_work, 1);
+
+	goto success;
+
+workqueue_failed:
+	power_supply_unregister(&di->bat);
+batt_failed:
+	kfree(di);
+di_alloc_failed:
+success:
+	return retval;
+}
+
+static int avengers_lite_power_remove(struct platform_device *pdev)
+{
+	struct avengers_lite_device_info *di = platform_get_drvdata(pdev);
+
+	cancel_rearming_delayed_workqueue(di->monitor_wqueue , &di->monitor_work);
+	destroy_workqueue(di->monitor_wqueue);
+	power_supply_unregister(&di->bat);
+
+	return 0;
+}
+
+static int avengers_lite_power_suspend(struct platform_device *pdev,
+				  pm_message_t state)
+{
+	struct avengers_lite_device_info *di = platform_get_drvdata(pdev);
+
+	di->ec_status = POWER_SUPPLY_STATUS_UNKNOWN;
+
+	return 0;
+}
+
+static int avengers_lite_power_resume(struct platform_device *pdev)
+{
+	struct avengers_lite_device_info *di = platform_get_drvdata(pdev);
+
+	di->ec_status = POWER_SUPPLY_STATUS_UNKNOWN;
+	power_supply_changed(&di->bat);
+
+	cancel_delayed_work(&di->monitor_work);
+	queue_delayed_work(di->monitor_wqueue, &di->monitor_work, HZ);
+
+	return 0;
+}
+
+static struct platform_driver avengers_lite_power_driver = {
+	.driver = {
+		.name = "battery",
+	},
+	.probe	  = avengers_lite_power_probe,
+	.remove   = avengers_lite_power_remove,
+	.suspend  = avengers_lite_power_suspend,
+	.resume	  = avengers_lite_power_resume,
+};
+
+static int __init avengers_lite_power_init(void)
+{
+	return platform_driver_register(&avengers_lite_power_driver);
+}
+
+static void __exit avengers_lite_power_exit(void)
+{
+	platform_driver_unregister(&avengers_lite_power_driver);
+}
+
+module_init(avengers_lite_power_init);
+module_exit(avengers_lite_power_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Danny <dsong4@marvell.com");
+MODULE_DESCRIPTION("avengers lite power driver");
--- linux-mvl-dove-2.6.32.orig/drivers/power/bq2084_battery.c
+++ linux-mvl-dove-2.6.32/drivers/power/bq2084_battery.c
@@ -0,0 +1,469 @@
+/*
+ * Driver for batteries with BQ2084 chips inside.
+ *
+ * Copyright © 2009 Marvell semiconductors
+ *
+ * Author:  Tawfik Bayouk <tawfik@marvell.com>
+ *	    March 2009
+ * Based on the driver DS2760 battery driver.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/param.h>
+#include <linux/jiffies.h>
+#include <linux/workqueue.h>
+#include <linux/pm.h>
+#include <linux/platform_device.h>
+#include <linux/power_supply.h>
+#include <linux/slab.h>
+#include <linux/i2c.h>
+#include <linux/proc_fs.h>
+
+struct bq2084_device_info {
+	struct device *dev;
+
+	/* Data is valid after calling bq2084_battery_read_status() */
+	unsigned long update_time;	/* jiffies when data read */
+	int charge_status;
+	int temp_tK;
+	int current_mV;
+	int current_mA;
+	int average_mA;
+	int capacity_P;
+	int current_mAh;
+	int absolute_mAh;	
+	int current_empty_time_Min;
+	int average_empty_time_Min;
+	int average_full_time_Min;
+	int design_mAh;
+
+	struct power_supply bat;
+	struct device *w1_dev;
+	struct workqueue_struct *monitor_wqueue;
+	struct delayed_work monitor_work;
+};
+
+static unsigned int cache_time = 1000;
+module_param(cache_time, uint, 0644);
+MODULE_PARM_DESC(cache_time, "cache time in milliseconds");
+
+static struct bq2084_device_info *di_proc;
+int bat_proc_write(struct file *file, const char *buffer,unsigned long count, void *data)
+{	
+	return count;
+}
+
+int bat_proc_read(char* page, char** start, off_t off, int count,int* eof,
+		    void* data)
+{
+	int len = 0;
+
+	len += sprintf(page+len, "Charge_status = %d\n", di_proc->charge_status);
+	len += sprintf(page+len, "temp_tK = %d\n", di_proc->temp_tK);
+	len += sprintf(page+len, "current_mV = %d\n", di_proc->current_mV);
+	len += sprintf(page+len, "current_mA = %d\n", di_proc->current_mA);
+	len += sprintf(page+len, "average_mA = %d\n", di_proc->average_mA);
+	len += sprintf(page+len, "capacity_P = %d\n", di_proc->capacity_P);
+	len += sprintf(page+len, "current_mAh = %d\n", di_proc->current_mAh);
+	len += sprintf(page+len, "absolute_mAh = %d\n", di_proc->absolute_mAh);
+	len += sprintf(page+len, "current_empty_time_Min = %d\n", di_proc->current_empty_time_Min);
+	len += sprintf(page+len, "average_empty_time_Min = %d\n", di_proc->average_empty_time_Min);
+	len += sprintf(page+len, "average_full_time_Min = %d\n", di_proc->average_full_time_Min);
+	len += sprintf(page+len, "design_mAh = %d\n", di_proc->design_mAh);
+	return len;
+}
+
+static struct proc_dir_entry *bat_proc_entry;
+extern struct proc_dir_entry proc_root;
+static int battery_proc_init(void)
+{
+	bat_proc_entry = create_proc_entry("battery", 0666, &proc_root);
+	bat_proc_entry->read_proc = bat_proc_read;
+	bat_proc_entry->write_proc = bat_proc_write;
+	return 0;
+}
+
+/*
+ * Gauge Driver
+ */
+
+struct i2c_client *bq2084_client = NULL;
+
+#define	PS_TEMP			0x08
+#define	PS_VOLTAGE_NOW		0x09
+#define PS_CURRENT_NOW		0x0A
+#define PS_CURRENT_AVG 		0x0B
+#define PS_CAPACITY 		0x0D
+#define PS_CHARGE_NOW 		0x0F
+#define PS_CHARGE_FULL		0x10
+#define PS_TIME_TO_EMPTY_NOW 	0x11
+#define PS_TIME_TO_EMPTY_AVG 	0x12
+#define PS_TIME_TO_FULL_AVG 	0x13
+#define PS_CHARGE_FULL_DESIGN	0x18
+
+static const struct i2c_device_id bq2084_gauge_id[] = {
+     { "bq2084_i2c", 0 },
+     { }
+};
+
+static int __devinit bq2084_gauge_probe(struct i2c_client *client,
+			       const struct i2c_device_id *id)
+{
+     bq2084_client = client;
+
+     if (!i2c_check_functionality(to_i2c_adapter(client->dev.parent),
+				  I2C_FUNC_SMBUS_EMUL))
+	  return -EIO;
+
+     printk("TI BQ2084 Battery Gauge driver loaded successfully\n");
+     return 0;
+}
+static int __devexit bq2084_gauge_remove(struct i2c_client *client)
+{
+     return 0;
+}
+
+
+static struct i2c_driver bq2084_driver = {
+     .driver = {
+	  .name   = "bq2084_i2c",
+	  .owner  = THIS_MODULE,
+     },
+     .probe          = bq2084_gauge_probe,
+     .remove         = __devexit_p(bq2084_gauge_remove),
+     .id_table       = bq2084_gauge_id,
+};
+
+/*
+ * Battery Driver
+ */
+
+static int bq2084_battery_read_status(struct bq2084_device_info *di)
+{
+	int old_charge_status = di->charge_status;
+
+	/* Poll the device at most once in a cache_time */
+	if (time_before(jiffies, di->update_time + msecs_to_jiffies(cache_time)))
+		return 0;
+
+	/* Read the Gauge status through the I2C */
+	di->update_time = jiffies;		/* last update time */
+
+	if ((di->temp_tK = (int)i2c_smbus_read_word_data(bq2084_client, PS_TEMP)) < 0) {
+		dev_err(&bq2084_client->dev, "i2c_smbus_read_word_data: PS_TEMP");
+          	return -EIO;
+     	}
+
+	if ((di->current_mV = (int)i2c_smbus_read_word_data(bq2084_client, PS_VOLTAGE_NOW)) < 0) {
+		dev_err(&bq2084_client->dev, "i2c_smbus_read_word_data: PS_VOLTAGE_NOW");
+          	return -EIO;
+     	}
+
+	if ((di->current_mA = (int)i2c_smbus_read_word_data(bq2084_client, PS_CURRENT_NOW)) < 0) {
+		dev_err(&bq2084_client->dev, "i2c_smbus_read_word_data: PS_CURRENT_NOW");
+          	return -EIO;
+     	}
+
+	if ((di->average_mA = (int)i2c_smbus_read_word_data(bq2084_client, PS_CURRENT_AVG)) < 0) {
+		dev_err(&bq2084_client->dev, "i2c_smbus_read_word_data: PS_CURRENT_AVG");
+          	return -EIO;
+     	}
+
+	if ((di->current_mAh = (int)i2c_smbus_read_word_data(bq2084_client, PS_CHARGE_NOW)) < 0) {
+		dev_err(&bq2084_client->dev, "i2c_smbus_read_word_data: PS_CAPACITY");
+          	return -EIO;
+     	}
+
+	if ((di->absolute_mAh = (int)i2c_smbus_read_word_data(bq2084_client, PS_CHARGE_FULL)) < 0) {
+		dev_err(&bq2084_client->dev, "i2c_smbus_read_word_data: PS_CHARGE_NOW");
+          	return -EIO;
+     	}
+
+	if ((di->capacity_P = (int)i2c_smbus_read_word_data(bq2084_client, PS_CAPACITY)) < 0) {
+		dev_err(&bq2084_client->dev, "i2c_smbus_read_word_data: PS_CHARGE_FULL");
+          	return -EIO;
+     	}
+
+	if ((di->current_empty_time_Min = (int)i2c_smbus_read_word_data(bq2084_client, PS_TIME_TO_EMPTY_NOW)) < 0) {
+		dev_err(&bq2084_client->dev, "i2c_smbus_read_word_data: PS_TIME_TO_EMPTY_NOW");
+          	return -EIO;
+     	}
+
+	if ((di->average_empty_time_Min = (int)i2c_smbus_read_word_data(bq2084_client, PS_TIME_TO_EMPTY_AVG)) < 0) {
+		dev_err(&bq2084_client->dev, "i2c_smbus_read_word_data: PS_TIME_TO_EMPTY_AVG");
+          	return -EIO;
+     	}
+
+	if ((di->average_full_time_Min = (int)i2c_smbus_read_word_data(bq2084_client, PS_TIME_TO_FULL_AVG)) < 0) {
+		dev_err(&bq2084_client->dev, "i2c_smbus_read_word_data: PS_TIME_TO_FULL_AVG");
+          	return -EIO;
+     	}
+
+	if ((di->design_mAh = (int)i2c_smbus_read_word_data(bq2084_client, PS_CHARGE_FULL_DESIGN)) < 0) {
+		dev_err(&bq2084_client->dev, "i2c_smbus_read_word_data: PS_CHARGE_FULL_DESIGN");
+          	return -EIO;
+     	}
+
+	if (di->current_mA & 0x8000)
+		di->charge_status = POWER_SUPPLY_STATUS_DISCHARGING;
+	else
+		di->charge_status = POWER_SUPPLY_STATUS_CHARGING;
+
+	if ((di->current_mA & ~0x8000) < 10)
+		di->charge_status = POWER_SUPPLY_STATUS_FULL;
+
+	if (di->charge_status != old_charge_status)
+	{
+		power_supply_changed(&di->bat);
+		cancel_delayed_work(&di->monitor_work);
+		queue_delayed_work(di->monitor_wqueue, &di->monitor_work, HZ/10);		
+	}
+
+	dev_dbg(di->dev, "Charge_status = %d\n", di->charge_status);
+	dev_dbg(di->dev, "temp_tK = %d\n", di->temp_tK);
+	dev_dbg(di->dev, "current_mV = %d\n", di->current_mV);
+	dev_dbg(di->dev, "current_mA = %d\n", di->current_mA);
+	dev_dbg(di->dev, "average_mA = %d\n", di->average_mA);
+	dev_dbg(di->dev, "capacity_P = %d\n", di->capacity_P);
+	dev_dbg(di->dev, "current_mAh = %d\n", di->current_mAh);
+	dev_dbg(di->dev, "absolute_mAh = %d\n", di->absolute_mAh);
+	dev_dbg(di->dev, "current_empty_time_Min = %d\n", di->current_empty_time_Min);
+	dev_dbg(di->dev, "average_empty_time_Min = %d\n", di->average_empty_time_Min);
+	dev_dbg(di->dev, "average_full_time_Min = %d\n", di->average_full_time_Min);
+	dev_dbg(di->dev, "design_mAh = %d\n", di->design_mAh);
+
+	return 0;
+}
+
+static void bq2084_battery_work(struct work_struct *work)
+{
+	struct bq2084_device_info *di = container_of(work,
+		struct bq2084_device_info, monitor_work.work);
+	const int interval = HZ * 60;
+	
+	dev_dbg(di->dev, "%s\n", __func__);
+
+	bq2084_battery_read_status(di);
+	queue_delayed_work(di->monitor_wqueue, &di->monitor_work, interval);
+}
+
+#define to_bq2084_device_info(x) container_of((x), struct bq2084_device_info, \
+					      bat);
+
+static void bq2084_battery_external_power_changed(struct power_supply *psy)
+{
+	struct bq2084_device_info *di = to_bq2084_device_info(psy);
+
+	dev_dbg(di->dev, "%s\n", __func__);
+
+	cancel_delayed_work(&di->monitor_work);
+	queue_delayed_work(di->monitor_wqueue, &di->monitor_work, HZ/10);
+}
+
+static int bq2084_battery_get_property(struct power_supply *psy,
+				       enum power_supply_property psp,
+				       union power_supply_propval *val)
+{
+	struct bq2084_device_info *di = to_bq2084_device_info(psy);
+
+	bq2084_battery_read_status(di);
+
+	/*
+	 * All voltages, currents, charges, energies, time and temperatures in uV,
+	 * µA, µAh, µWh, seconds and tenths of degree Celsius
+	 */
+
+	switch (psp) {
+	case POWER_SUPPLY_PROP_STATUS:
+		val->intval = di->charge_status;
+		break;
+	case POWER_SUPPLY_PROP_TEMP:
+		/* convert Kelvin to tenths of degree Celsius */
+		val->intval = (di->temp_tK - 2730); 
+		break;
+	case POWER_SUPPLY_PROP_VOLTAGE_NOW:
+		val->intval = (di->current_mV * 1000);
+		break;
+	case POWER_SUPPLY_PROP_CURRENT_NOW:
+		val->intval = (di->current_mA * 1000);
+		break;
+	case POWER_SUPPLY_PROP_CURRENT_AVG:
+		val->intval = (di->average_mA * 1000);
+		break;
+	case POWER_SUPPLY_PROP_CAPACITY:
+		val->intval = di->capacity_P;
+		break;
+	case POWER_SUPPLY_PROP_CHARGE_NOW:
+		val->intval = (di->current_mAh * 1000);
+		break;
+	case POWER_SUPPLY_PROP_CHARGE_FULL:
+		val->intval = (di->absolute_mAh * 1000);
+		break;	
+	case POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW:
+		val->intval = (di->current_empty_time_Min * 60); 
+		break;
+	case POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG:
+		val->intval = (di->average_empty_time_Min * 60);
+		break;
+	case POWER_SUPPLY_PROP_TIME_TO_FULL_AVG:
+		val->intval = (di->average_full_time_Min * 60);
+		break;
+	case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
+		val->intval = (di->design_mAh * 1000);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static enum power_supply_property bq2084_battery_props[] = {
+	POWER_SUPPLY_PROP_STATUS,		/* based on current */
+	POWER_SUPPLY_PROP_TEMP,			/* SMB 0x08 */
+	POWER_SUPPLY_PROP_VOLTAGE_NOW,		/* SMB 0x09 */
+	POWER_SUPPLY_PROP_CURRENT_NOW,		/* SMB 0x0A */
+	POWER_SUPPLY_PROP_CURRENT_AVG, 		/* SMB 0x0B */
+	POWER_SUPPLY_PROP_CAPACITY, 		/* SMB 0x0D */
+	POWER_SUPPLY_PROP_CHARGE_NOW, 		/* SMB 0x0F */
+	POWER_SUPPLY_PROP_CHARGE_FULL,		/* SMB 0x10 */		
+	POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, 	/* SMB 0x11 */
+	POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG, 	/* SMB 0x12 */
+	POWER_SUPPLY_PROP_TIME_TO_FULL_AVG, 	/* SMB 0x13 */
+	POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,	/* SMB 0x18 */
+};
+
+static int bq2084_battery_probe(struct platform_device *pdev)
+{
+	int retval = 0;
+	struct bq2084_device_info *di;
+	struct bq2084_platform_data *pdata;
+
+	di = kzalloc(sizeof(*di), GFP_KERNEL);
+	if (!di) {
+		retval = -ENOMEM;
+		goto di_alloc_failed;
+	}
+
+	platform_set_drvdata(pdev, di);
+
+	pdata 			= pdev->dev.platform_data;
+	di->dev			= &pdev->dev;
+	di->w1_dev	     	= pdev->dev.parent;
+	di->update_time 	= jiffies;
+	di->bat.name	   	= dev_name(&pdev->dev);
+	di->bat.type	   	= POWER_SUPPLY_TYPE_BATTERY;
+	di->bat.properties     	= bq2084_battery_props;
+	di->bat.num_properties 	= ARRAY_SIZE(bq2084_battery_props);
+	di->bat.get_property   	= bq2084_battery_get_property;
+	di->bat.external_power_changed =
+				  bq2084_battery_external_power_changed;
+
+	di->charge_status = POWER_SUPPLY_STATUS_UNKNOWN;
+
+	retval = power_supply_register(&pdev->dev, &di->bat);
+	if (retval) {
+		dev_err(di->dev, "failed to register battery\n");
+		goto batt_failed;
+	}
+
+	INIT_DELAYED_WORK(&di->monitor_work, bq2084_battery_work);
+	di->monitor_wqueue = create_singlethread_workqueue(dev_name(&pdev->dev));
+	if (!di->monitor_wqueue) {
+		retval = -ESRCH;
+		goto workqueue_failed;
+	}
+	queue_delayed_work(di->monitor_wqueue, &di->monitor_work, HZ * 1);
+
+	di_proc = di;
+
+	printk("TI BQ2084 Power Supply driver loaded successfully. \n");
+	goto success;
+
+workqueue_failed:
+	power_supply_unregister(&di->bat);
+batt_failed:
+	kfree(di);
+di_alloc_failed:
+success:
+	return retval;
+}
+
+static int bq2084_battery_remove(struct platform_device *pdev)
+{
+	struct bq2084_device_info *di = platform_get_drvdata(pdev);
+
+	cancel_rearming_delayed_workqueue(di->monitor_wqueue,
+					  &di->monitor_work);
+	destroy_workqueue(di->monitor_wqueue);
+	power_supply_unregister(&di->bat);
+
+	return 0;
+}
+
+#ifdef CONFIG_PM
+
+static int bq2084_battery_suspend(struct platform_device *pdev,
+				  pm_message_t state)
+{
+	struct bq2084_device_info *di = platform_get_drvdata(pdev);
+
+	di->charge_status = POWER_SUPPLY_STATUS_UNKNOWN;
+
+	return 0;
+}
+
+static int bq2084_battery_resume(struct platform_device *pdev)
+{
+	struct bq2084_device_info *di = platform_get_drvdata(pdev);
+
+	di->charge_status = POWER_SUPPLY_STATUS_UNKNOWN;
+	power_supply_changed(&di->bat);
+
+	cancel_delayed_work(&di->monitor_work);
+	queue_delayed_work(di->monitor_wqueue, &di->monitor_work, HZ);
+
+	return 0;
+}
+
+#else
+
+#define bq2084_battery_suspend NULL
+#define bq2084_battery_resume NULL
+
+#endif /* CONFIG_PM */
+
+static struct platform_driver bq2084_battery_driver = {
+	.driver = {
+		.name = "bq2084-battery",
+	},
+	.probe	  = bq2084_battery_probe,
+	.remove   = bq2084_battery_remove,
+	.suspend  = bq2084_battery_suspend,
+	.resume	  = bq2084_battery_resume,
+};
+
+static int __init bq2084_battery_init(void)
+{
+	int ret;
+	if ((ret = i2c_add_driver(&bq2084_driver)) < 0)
+		return ret;
+
+	battery_proc_init();
+
+	return platform_driver_register(&bq2084_battery_driver);
+}
+
+static void __exit bq2084_battery_exit(void)
+{
+	platform_driver_unregister(&bq2084_battery_driver);
+	i2c_del_driver(&bq2084_driver);
+}
+
+module_init(bq2084_battery_init);
+module_exit(bq2084_battery_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Tawfik Bayouk <tawfik@marvell.com>");
+MODULE_DESCRIPTION("bq2084 battery driver");
--- linux-mvl-dove-2.6.32.orig/drivers/power/apm_power.c
+++ linux-mvl-dove-2.6.32/drivers/power/apm_power.c
@@ -233,6 +233,7 @@
 		empty_design_prop = POWER_SUPPLY_PROP_ENERGY_EMPTY_DESIGN;
 		now_prop = POWER_SUPPLY_PROP_ENERGY_NOW;
 		avg_prop = POWER_SUPPLY_PROP_ENERGY_AVG;
+		break;
 	case SOURCE_VOLTAGE:
 		full_prop = POWER_SUPPLY_PROP_VOLTAGE_MAX;
 		empty_prop = POWER_SUPPLY_PROP_VOLTAGE_MIN;
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/card/block.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/card/block.c
@@ -85,7 +85,14 @@
 	mutex_lock(&open_lock);
 	md->usage--;
 	if (md->usage == 0) {
+		int devmaj = MAJOR(disk_devt(md->disk));
 		int devidx = MINOR(disk_devt(md->disk)) >> MMC_SHIFT;
+
+		if (!devmaj)
+			devidx = md->disk->first_minor >> MMC_SHIFT;
+
+		blk_cleanup_queue(md->queue.queue);
+
 		__clear_bit(devidx, dev_use);
 
 		put_disk(md->disk);
@@ -613,6 +620,7 @@
 	return 0;
 
  out:
+	mmc_cleanup_queue(&md->queue);
 	mmc_blk_put(md);
 
 	return err;
@@ -651,6 +659,9 @@
 
 	if (md) {
 		mmc_blk_set_blksize(md, card);
+#ifdef CONFIG_MMC_BLOCK_PARANOID_RESUME
+		md->queue.check_status = 1;
+#endif
 		mmc_queue_resume(&md->queue);
 	}
 	return 0;
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/card/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/mmc/card/Kconfig
@@ -32,6 +32,13 @@
 
 	  If unsure, say Y here.
 
+config MMC_BLOCK_PARANOID_RESUME
+	bool "Check card status on resume"
+        depends on MMC_BLOCK
+        default y
+        help
+          Nohelp
+
 config SDIO_UART
 	tristate "SDIO UART/GPS class support"
 	help
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/card/queue.h
+++ linux-mvl-dove-2.6.32/drivers/mmc/card/queue.h
@@ -17,6 +17,9 @@
 	char			*bounce_buf;
 	struct scatterlist	*bounce_sg;
 	unsigned int		bounce_sg_len;
+#ifdef CONFIG_MMC_BLOCK_PARANOID_RESUME
+	int			check_status;
+#endif
 };
 
 extern int mmc_init_queue(struct mmc_queue *, struct mmc_card *, spinlock_t *);
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/card/queue.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/card/queue.c
@@ -14,7 +14,9 @@
 #include <linux/freezer.h>
 #include <linux/kthread.h>
 #include <linux/scatterlist.h>
+#include <linux/delay.h>
 
+#include <linux/mmc/mmc.h>
 #include <linux/mmc/card.h>
 #include <linux/mmc/host.h>
 #include "queue.h"
@@ -70,7 +72,33 @@
 			continue;
 		}
 		set_current_state(TASK_RUNNING);
-
+#ifdef CONFIG_MMC_BLOCK_PARANOID_RESUME
+		if (mq->check_status) {
+			struct mmc_command cmd;
+
+			do {
+				int err;
+
+				cmd.opcode = MMC_SEND_STATUS;
+				cmd.arg = mq->card->rca << 16;
+				cmd.flags = MMC_RSP_R1 | MMC_CMD_AC;
+
+				mmc_claim_host(mq->card->host);
+				err = mmc_wait_for_cmd(mq->card->host, &cmd, 5);
+				mmc_release_host(mq->card->host);
+
+				if (err) {
+					printk(KERN_ERR "%s: failed to get status (%d)\n",
+					       __func__, err);
+					msleep(5);
+					continue;
+				}
+				printk(KERN_DEBUG "%s: status 0x%.8x\n", __func__, cmd.resp[0]);
+			} while (!(cmd.resp[0] & R1_READY_FOR_DATA) ||
+				(R1_CURRENT_STATE(cmd.resp[0]) == 7));
+			mq->check_status = 0;
+                }
+#endif
 		mq->issue_fn(mq, req);
 	} while (1);
 	up(&mq->thread_sem);
@@ -90,9 +118,10 @@
 	struct request *req;
 
 	if (!mq) {
-		printk(KERN_ERR "MMC: killing requests for dead queue\n");
-		while ((req = blk_fetch_request(q)) != NULL)
+		while ((req = blk_fetch_request(q)) != NULL) {
+			req->cmd_flags |= REQ_QUIET;
 			__blk_end_request_all(req, -EIO);
+		}
 		return;
 	}
 
@@ -223,17 +252,18 @@
 	struct request_queue *q = mq->queue;
 	unsigned long flags;
 
-	/* Mark that we should start throwing out stragglers */
-	spin_lock_irqsave(q->queue_lock, flags);
-	q->queuedata = NULL;
-	spin_unlock_irqrestore(q->queue_lock, flags);
-
 	/* Make sure the queue isn't suspended, as that will deadlock */
 	mmc_queue_resume(mq);
 
 	/* Then terminate our worker thread */
 	kthread_stop(mq->thread);
 
+	/* Empty the queue */
+	spin_lock_irqsave(q->queue_lock, flags);
+	q->queuedata = NULL;
+	blk_start_queue(q);
+	spin_unlock_irqrestore(q->queue_lock, flags);
+
  	if (mq->bounce_sg)
  		kfree(mq->bounce_sg);
  	mq->bounce_sg = NULL;
@@ -245,8 +275,6 @@
 		kfree(mq->bounce_buf);
 	mq->bounce_buf = NULL;
 
-	blk_cleanup_queue(mq->queue);
-
 	mq->card = NULL;
 }
 EXPORT_SYMBOL(mmc_cleanup_queue);
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/host/sdhci.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/host/sdhci.c
@@ -12,12 +12,14 @@
  *
  *     - JMicron (hardware and technical support)
  */
-
+//#define DEBUG
+//#define VERBOSE
 #include <linux/delay.h>
 #include <linux/highmem.h>
 #include <linux/io.h>
 #include <linux/dma-mapping.h>
 #include <linux/scatterlist.h>
+#include <linux/platform_device.h>
 
 #include <linux/leds.h>
 
@@ -31,7 +33,7 @@
 	pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x)
 
 #if defined(CONFIG_LEDS_CLASS) || (defined(CONFIG_LEDS_CLASS_MODULE) && \
-	defined(CONFIG_MMC_SDHCI_MODULE))
+				   defined(CONFIG_MMC_SDHCI_MODULE))
 #define SDHCI_USE_LEDS_CLASS
 #endif
 
@@ -42,14 +44,18 @@
 
 static void sdhci_send_command(struct sdhci_host *, struct mmc_command *);
 static void sdhci_finish_command(struct sdhci_host *);
-
+//static void sdhci_sdio_gpio_irq_dump(struct sdhci_host *host);
 static void sdhci_dumpregs(struct sdhci_host *host)
 {
 	printk(KERN_DEBUG DRIVER_NAME ": ============== REGISTER DUMP ==============\n");
 
 	printk(KERN_DEBUG DRIVER_NAME ": Sys addr: 0x%08x | Version:  0x%08x\n",
 		sdhci_readl(host, SDHCI_DMA_ADDRESS),
+#if !defined(CONFIG_ARCH_DOVE)
 		sdhci_readw(host, SDHCI_HOST_VERSION));
+#else
+		0/*sdhci_readw(host + SDHCI_HOST_VERSION)*/);
+#endif
 	printk(KERN_DEBUG DRIVER_NAME ": Blk size: 0x%08x | Blk cnt:  0x%08x\n",
 		sdhci_readw(host, SDHCI_BLOCK_SIZE),
 		sdhci_readw(host, SDHCI_BLOCK_COUNT));
@@ -73,7 +79,11 @@
 		sdhci_readl(host, SDHCI_SIGNAL_ENABLE));
 	printk(KERN_DEBUG DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n",
 		sdhci_readw(host, SDHCI_ACMD12_ERR),
+#if !defined(CONFIG_ARCH_DOVE)
 		sdhci_readw(host, SDHCI_SLOT_INT_STATUS));
+#else
+		0/*sdhci_readw(host, SDHCI_SLOT_INT_STATUS)*/);
+#endif
 	printk(KERN_DEBUG DRIVER_NAME ": Caps:     0x%08x | Max curr: 0x%08x\n",
 		sdhci_readl(host, SDHCI_CAPABILITIES),
 		sdhci_readl(host, SDHCI_MAX_CURRENT));
@@ -83,6 +93,7 @@
 		       readl(host->ioaddr + SDHCI_ADMA_ERROR),
 		       readl(host->ioaddr + SDHCI_ADMA_ADDRESS));
 
+//	sdhci_sdio_gpio_irq_dump(host);
 	printk(KERN_DEBUG DRIVER_NAME ": ===========================================\n");
 }
 
@@ -260,10 +271,21 @@
 
 		while (len) {
 			if (chunk == 0) {
-				scratch = sdhci_readl(host, SDHCI_BUFFER);
+				if (!(host->quirks & SDHCI_QUIRK_PIO_USE_WORD_ACCESS))
+					scratch = sdhci_readl(host, SDHCI_BUFFER);
+				else {
+					/* 
+					 *  Marvell soc sdhci needs the cpu to
+					 *  read each data register seperatelty
+					 */
+					scratch = sdhci_readw(host, SDHCI_BUFFER);
+					
+					if (blksize > 2)
+						scratch |= sdhci_readw(host,
+							SDHCI_BUFFER + 2) << 16;
+				}
 				chunk = 4;
 			}
-
 			*buf = scratch & 0xFF;
 
 			buf++;
@@ -312,7 +334,17 @@
 			len--;
 
 			if ((chunk == 4) || ((len == 0) && (blksize == 0))) {
-				sdhci_writel(host, scratch, SDHCI_BUFFER);
+				if (!(host->quirks & SDHCI_QUIRK_PIO_USE_WORD_ACCESS))
+					sdhci_writel(host, scratch, SDHCI_BUFFER);
+				else {
+	                                /*
+					 * Marvell soc sdhci needs the cpu to
+					 * write each data register seperatelty
+					 */
+                	                sdhci_writew(host, scratch, SDHCI_BUFFER);
+                                	scratch = (0xFFFF0000 & scratch) >> 16;
+	                                sdhci_writew(host, scratch, SDHCI_BUFFER + 2);
+				}
 				chunk = 0;
 				scratch = 0;
 			}
@@ -855,7 +887,8 @@
 			sdhci_reset(host, SDHCI_RESET_CMD);
 			sdhci_reset(host, SDHCI_RESET_DATA);
 		}
-
+		DBG(KERN_ERR "%s: %s data->stop->opcode 0x%x\n",
+		    mmc_hostname(host->mmc), __func__, data->stop->opcode);
 		sdhci_send_command(host, data->stop);
 	} else
 		tasklet_schedule(&host->finish_tasklet);
@@ -869,6 +902,17 @@
 
 	WARN_ON(host->cmd);
 
+	if (host->ops->gpio_irq_disable)
+		host->ops->gpio_irq_disable(host);
+
+	if (cmd->data && (cmd->data->blksz & 0x3)) {
+		printk(KERN_ERR "%s: Unsupported block size (%d)!\n",
+		       mmc_hostname(host->mmc), cmd->data->blksz);
+		cmd->error = -EINVAL;
+		tasklet_schedule(&host->finish_tasklet);
+		return;
+	}
+
 	/* Wait max 10 ms */
 	timeout = 10;
 
@@ -928,6 +972,11 @@
 	if (cmd->data)
 		flags |= SDHCI_CMD_DATA;
 
+#if defined(CONFIG_ARCH_DOVE)
+	//maen - ugly workarround for first scan of cards.
+	if (cmd->opcode == 5)
+		mdelay(10);
+#endif
 	sdhci_writew(host, SDHCI_MAKE_CMD(cmd->opcode, flags), SDHCI_COMMAND);
 }
 
@@ -1152,7 +1201,8 @@
 	else
 		ctrl &= ~SDHCI_CTRL_4BITBUS;
 
-	if (ios->timing == MMC_TIMING_SD_HS)
+	if ((ios->timing == MMC_TIMING_SD_HS) && 
+	    (!host->quirks & SDHCI_QUIRK_HIGH_SPEED_WA))
 		ctrl |= SDHCI_CTRL_HISPD;
 	else
 		ctrl &= ~SDHCI_CTRL_HISPD;
@@ -1216,7 +1266,7 @@
 	spin_unlock_irqrestore(&host->lock, flags);
 }
 
-static const struct mmc_host_ops sdhci_ops = {
+static struct mmc_host_ops sdhci_ops = {
 	.request	= sdhci_request,
 	.set_ios	= sdhci_set_ios,
 	.get_ro		= sdhci_get_ro,
@@ -1235,7 +1285,6 @@
 	unsigned long flags;
 
 	host = (struct sdhci_host*)param;
-
 	spin_lock_irqsave(&host->lock, flags);
 
 	if (!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
@@ -1254,7 +1303,6 @@
 	}
 
 	spin_unlock_irqrestore(&host->lock, flags);
-
 	mmc_detect_change(host->mmc, msecs_to_jiffies(200));
 }
 
@@ -1266,6 +1314,13 @@
 
 	host = (struct sdhci_host*)param;
 
+        /*
+         * If this tasklet gets rescheduled while running, it will
+         * be run again afterwards but without any active request.
+         */
+	if (!host->mrq)
+		return;
+
 	spin_lock_irqsave(&host->lock, flags);
 
 	del_timer(&host->timer);
@@ -1277,7 +1332,7 @@
 	 * upon error conditions.
 	 */
 	if (!(host->flags & SDHCI_DEVICE_DEAD) &&
-		(mrq->cmd->error ||
+	    ((mrq->cmd && mrq->cmd->error) ||
 		 (mrq->data && (mrq->data->error ||
 		  (mrq->data->stop && mrq->data->stop->error))) ||
 		   (host->quirks & SDHCI_QUIRK_RESET_AFTER_REQUEST))) {
@@ -1307,6 +1362,10 @@
 #endif
 
 	mmiowb();
+
+	if (host->ops->gpio_irq_enable)
+		host->ops->gpio_irq_enable(host);
+
 	spin_unlock_irqrestore(&host->lock, flags);
 
 	mmc_request_done(host->mmc, mrq);
@@ -1499,6 +1558,7 @@
 	u32 intmask;
 	int cardint = 0;
 
+
 	spin_lock(&host->lock);
 
 	intmask = sdhci_readl(host, SDHCI_INT_STATUS);
@@ -1510,7 +1570,9 @@
 
 	DBG("*** %s got interrupt: 0x%08x\n",
 		mmc_hostname(host->mmc), intmask);
-
+#ifdef VERBOSE
+	sdhci_dumpregs(host);
+#endif
 	if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) {
 		sdhci_writel(host, intmask & (SDHCI_INT_CARD_INSERT |
 			SDHCI_INT_CARD_REMOVE), SDHCI_INT_STATUS);
@@ -1578,6 +1640,16 @@
 \*****************************************************************************/
 
 #ifdef CONFIG_PM
+static int sdhci_platform_suspend(struct platform_device *dev,
+					pm_message_t state) {
+	/* TODO: Add support for the SDHCI suspend resume */
+	return 0;
+}
+
+static int sdhci_platform_resume(struct platform_device *dev) {
+	/* TODO: Add support for the SDHCI suspend resume */
+	return 0;
+}
 
 int sdhci_suspend_host(struct sdhci_host *host, pm_message_t state)
 {
@@ -1585,7 +1657,7 @@
 
 	sdhci_disable_card_detection(host);
 
-	ret = mmc_suspend_host(host->mmc, state);
+	ret = mmc_suspend_host(host->mmc);
 	if (ret)
 		return ret;
 
@@ -1668,8 +1740,11 @@
 		host->quirks = debug_quirks;
 
 	sdhci_reset(host, SDHCI_RESET_ALL);
-
+#if !defined(CONFIG_ARCH_DOVE)
 	host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
+#else
+	host->version = 0;// readw(host->ioaddr + SDHCI_HOST_VERSION);
+#endif
 	host->version = (host->version & SDHCI_SPEC_VER_MASK)
 				>> SDHCI_SPEC_VER_SHIFT;
 	if (host->version > SDHCI_SPEC_200) {
@@ -1679,7 +1754,17 @@
 	}
 
 	caps = sdhci_readl(host, SDHCI_CAPABILITIES);
+#if !defined(CONFIG_ARCH_DOVE)
+        /*
+         * fix the clock rate value, should be 0x32 instead of 0x30
+         * as the clock is 50MHz
+         */
+        caps &= ~SDHCI_CLOCK_BASE_MASK;
+        caps |= 0x32 << SDHCI_CLOCK_BASE_SHIFT;
 
+        caps &= ~SDHCI_TIMEOUT_CLK_MASK;
+        caps |= 0x32;
+#endif
 	if (host->quirks & SDHCI_QUIRK_FORCE_DMA)
 		host->flags |= SDHCI_USE_SDMA;
 	else if (!(caps & SDHCI_CAN_DO_SDMA))
@@ -1780,12 +1865,16 @@
 		mmc->f_min = host->ops->get_min_clock(host);
 	else
 		mmc->f_min = host->max_clk / 256;
+	
 	mmc->f_max = host->max_clk;
 	mmc->caps = MMC_CAP_SDIO_IRQ;
 
 	if (!(host->quirks & SDHCI_QUIRK_FORCE_1_BIT_DATA))
 		mmc->caps |= MMC_CAP_4_BIT_DATA;
 
+	if (host->quirks & SDHCI_QUIRK_DISABLE_IRQ)
+		mmc->caps &= ~MMC_CAP_SDIO_IRQ;
+
 	if (caps & SDHCI_CAN_DO_HISPD)
 		mmc->caps |= MMC_CAP_SD_HIGHSPEED;
 
@@ -1869,6 +1958,9 @@
 
 	setup_timer(&host->timer, sdhci_timeout_timer, (unsigned long)host);
 
+	printk(KERN_INFO DRIVER_NAME ": Requesting irq host->irq=%d, host->irqn",
+	       host->irq);
+
 	ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED,
 		mmc_hostname(mmc), host);
 	if (ret)
@@ -1943,6 +2035,7 @@
 	sdhci_disable_card_detection(host);
 
 	mmc_remove_host(host->mmc);
+	DBG("slot 0 at 0x%p, irq %d\n", host->ioaddr, host->irq);
 
 #ifdef SDHCI_USE_LEDS_CLASS
 	led_classdev_unregister(&host->led);
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/host/mvsdio.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/host/mvsdio.c
@@ -865,7 +865,7 @@
 	int ret = 0;
 
 	if (mmc)
-		ret = mmc_suspend_host(mmc, state);
+		ret = mmc_suspend_host(mmc);
 
 	return ret;
 }
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/host/au1xmmc.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/host/au1xmmc.c
@@ -1137,7 +1137,7 @@
 	struct au1xmmc_host *host = platform_get_drvdata(pdev);
 	int ret;
 
-	ret = mmc_suspend_host(host->mmc, state);
+	ret = mmc_suspend_host(host->mmc);
 	if (ret)
 		return ret;
 
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/host/pxamci.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/host/pxamci.c
@@ -810,7 +810,7 @@
 	int ret = 0;
 
 	if (mmc)
-		ret = mmc_suspend_host(mmc, PMSG_SUSPEND);
+		ret = mmc_suspend_host(mmc);
 
 	return ret;
 }
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/host/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/mmc/host/Kconfig
@@ -55,6 +55,17 @@
 
 	  If unsure, say N.
 
+config MMC_SDHCI_MV
+	tristate "SDHCI support on Marvell's soc"
+	depends on MMC_SDHCI
+	help
+	  This selects the Secure Digital Host Controller Interface in
+	  Marvell's SoC controllers.
+
+	  If you have a controller with this interface, say Y or M here.
+
+	  If unsure, say N.
+
 config MMC_RICOH_MMC
 	tristate "Ricoh MMC Controller Disabler  (EXPERIMENTAL)"
 	depends on MMC_SDHCI_PCI
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/host/omap.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/host/omap.c
@@ -1556,7 +1556,7 @@
 		struct mmc_omap_slot *slot;
 
 		slot = host->slots[i];
-		ret = mmc_suspend_host(slot->mmc, mesg);
+		ret = mmc_suspend_host(slot->mmc);
 		if (ret < 0) {
 			while (--i >= 0) {
 				slot = host->slots[i];
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/host/tmio_mmc.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/host/tmio_mmc.c
@@ -161,6 +161,7 @@
 static inline void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
 {
 	struct mmc_data *data = host->data;
+	void *sg_virt;
 	unsigned short *buf;
 	unsigned int count;
 	unsigned long flags;
@@ -170,8 +171,8 @@
 		return;
 	}
 
-	buf = (unsigned short *)(tmio_mmc_kmap_atomic(host, &flags) +
-	      host->sg_off);
+	sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
+	buf = (unsigned short *)(sg_virt + host->sg_off);
 
 	count = host->sg_ptr->length - host->sg_off;
 	if (count > data->blksz)
@@ -188,7 +189,7 @@
 
 	host->sg_off += count;
 
-	tmio_mmc_kunmap_atomic(host, &flags);
+	tmio_mmc_kunmap_atomic(sg_virt, &flags);
 
 	if (host->sg_off == host->sg_ptr->length)
 		tmio_mmc_next_sg(host);
@@ -472,7 +473,7 @@
 	struct mmc_host *mmc = platform_get_drvdata(dev);
 	int ret;
 
-	ret = mmc_suspend_host(mmc, state);
+	ret = mmc_suspend_host(mmc);
 
 	/* Tell MFD core it can disable us now.*/
 	if (!ret && cell->disable)
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/host/sdhci-mv.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/host/sdhci-mv.c
@@ -0,0 +1,313 @@
+/*
+ * Marvell bindings for Secure Digital Host Controller Interface.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ */
+//#define DEBUG
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/mmc/host.h>
+#include <linux/platform_device.h>
+#include <linux/dove_sdhci.h>
+#include <mach/gpio.h>
+#include "sdhci.h"
+
+#define DRIVER_NAME "sdhci-mv"
+
+struct sdhci_mv_host {
+        /* for dove card interrupt workaround */
+        int                     dove_card_int_wa;
+        struct sdhci_dove_int_wa dove_int_wa_info;
+#if defined(CONFIG_HAVE_CLK)
+	struct clk		*clk;
+#endif
+
+};
+#ifdef CONFIG_PM
+
+static int sdhci_mv_suspend(struct platform_device *pdev, pm_message_t state)
+{
+	struct sdhci_host *host = dev_get_drvdata(&pdev->dev);
+
+	return sdhci_suspend_host(host, state);
+}
+
+static int sdhci_mv_resume(struct platform_device *pdev)
+{
+	struct sdhci_host *host = dev_get_drvdata(&pdev->dev);
+
+	{
+		u32 ier = sdhci_readl(host, SDHCI_INT_ENABLE);
+		ier |= SDHCI_INT_CARD_INSERT;
+		ier |= SDHCI_INT_CARD_REMOVE;
+		sdhci_writel(host, ier, SDHCI_INT_ENABLE);
+	}
+	mmiowb();
+	mdelay(400);
+	return sdhci_resume_host(host);
+}
+
+#else
+
+#define sdhci_mv_suspend NULL
+#define sdhci_mv_resume NULL
+
+#endif
+static void sdhci_sdio_gpio_irq_enable(struct sdhci_host *host);
+static void sdhci_sdio_gpio_irq_disable(struct sdhci_host *host);
+
+static struct sdhci_ops sdhci_mv_ops = {
+	.gpio_irq_enable = sdhci_sdio_gpio_irq_enable,
+	.gpio_irq_disable = sdhci_sdio_gpio_irq_disable,
+};
+
+static irqreturn_t sdhci_dove_gpio_irq(int irq, void *dev_id)
+{
+	struct sdhci_host* host = dev_id;
+#ifdef VERBOSE
+	DBG("*** %s got gpio interrupt\n",
+		mmc_hostname(host->mmc));
+#endif
+
+#ifdef VERBOSE
+	sdhci_dumpregs(host);
+#endif
+	mmc_signal_sdio_irq(host->mmc);
+
+	return IRQ_HANDLED;
+}
+
+
+static void sdhci_enable_sdio_gpio_irq(struct mmc_host *mmc, int enable)
+{
+	struct sdhci_host *host = mmc_priv(mmc);
+	struct sdhci_mv_host *mv_host = sdhci_priv(host);
+	unsigned long flags;
+	struct sdhci_dove_int_wa *wa_info;
+
+	if (!mv_host->dove_card_int_wa)
+		return;
+
+	wa_info = &mv_host->dove_int_wa_info;
+	spin_lock_irqsave(&host->lock, flags);
+
+	if (enable) {
+		if (wa_info->status == 0) {
+			enable_irq(wa_info->irq);
+			wa_info->status = 1;
+		}
+	} else {
+		if (wa_info->status == 1) {
+			disable_irq_nosync(wa_info->irq);
+			wa_info->status = 0;
+		}
+	}
+	
+	mmiowb();
+
+	spin_unlock_irqrestore(&host->lock, flags);
+}
+
+static void sdhci_sdio_gpio_irq_enable(struct sdhci_host *host)
+{
+	struct sdhci_mv_host *mv_host = sdhci_priv(host);
+	u32 mpp_ctrl4;
+	if (!mv_host->dove_card_int_wa)
+		return;
+
+	mpp_ctrl4 = readl(DOVE_MPP_CTRL4_VIRT_BASE);
+	mpp_ctrl4 |= 1 << mv_host->dove_int_wa_info.func_select_bit;
+	writel(mpp_ctrl4, DOVE_MPP_CTRL4_VIRT_BASE);
+
+	mmiowb();
+}
+
+static void sdhci_sdio_gpio_irq_disable(struct sdhci_host *host)
+{
+	struct sdhci_mv_host *mv_host = sdhci_priv(host);
+	u32 mpp_ctrl4;
+
+	if (!mv_host->dove_card_int_wa)
+		return;
+
+	mpp_ctrl4 = readl(DOVE_MPP_CTRL4_VIRT_BASE);
+	mpp_ctrl4 &= ~(1 << mv_host->dove_int_wa_info.func_select_bit);
+	writel(mpp_ctrl4, DOVE_MPP_CTRL4_VIRT_BASE);
+
+	mmiowb();
+}
+#ifdef DEBUG
+static void sdhci_sdio_gpio_irq_dump(struct sdhci_host *host)
+{
+	struct sdhci_mv_host *mv_host = sdhci_priv(host);
+	int gpio;
+
+	if (!mv_host->dove_card_int_wa)
+		return;
+	
+	gpio = mv_host->dove_int_wa_info.gpio;
+
+	printk(" dump gpio irq regs:\n");
+	printk(" mpp ctrl 4 [0x%x] 0x%08x\n", DOVE_MPP_CTRL4_VIRT_BASE,
+	       readl(DOVE_MPP_CTRL4_VIRT_BASE));
+	printk(" gpio level [0x%x] 0x%08x\n", GPIO_LEVEL_MASK(gpio),
+	       readl(GPIO_LEVEL_MASK(gpio)));
+	printk(" gpio pol [0x%x] 0x%08x\n", GPIO_IN_POL(gpio),
+	       readl(GPIO_IN_POL(gpio)));
+	printk(" gpio data in [0x%x] 0x%08x\n", GPIO_DATA_IN(gpio),
+	       readl(GPIO_DATA_IN(gpio)));
+}
+#endif
+static int __devinit sdhci_mv_probe(struct platform_device *pdev)
+{
+	struct sdhci_host *host;
+	struct sdhci_mv_host *mv_host;
+	struct resource *r;
+	struct sdhci_dove_int_wa *data = (struct sdhci_dove_int_wa *)
+		pdev->dev.platform_data;
+	int ret = 0;
+
+	host = sdhci_alloc_host(&pdev->dev, sizeof(*mv_host));
+	if (IS_ERR(host)) {
+		dev_err(&pdev->dev, "failed to alloc sdhci host\n");
+                return -ENOMEM;
+        }
+	mv_host = sdhci_priv(host);
+	dev_set_drvdata(&pdev->dev, host);
+	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (!r) {
+		goto err_get_resource;
+                ret = -ENXIO;
+	}
+
+        host->irq = platform_get_irq(pdev, 0);
+        if (host->irq < 0) {
+		goto err_get_resource;
+                ret = -ENXIO;
+	}
+        r = devm_request_mem_region(&pdev->dev, r->start, SZ_4K, DRIVER_NAME);
+	if (!r) {
+		dev_err(&pdev->dev, "cannot request region\n");
+		ret = -EINVAL;
+                goto err_request_region;
+	}
+
+	dev_dbg(&pdev->dev, "r->start=0x%x\n", r->start);
+
+        host->ioaddr = devm_ioremap(&pdev->dev, r->start, SZ_4K);
+
+	dev_dbg(&pdev->dev, "slot 0 at 0x%p, irq %d\n", host->ioaddr, host->irq);
+
+        if (!host->ioaddr) {
+                ret = -EINVAL;
+                goto err_ioremap;
+        }
+
+	host->hw_name = dev_name(&pdev->dev);
+	host->ops = &sdhci_mv_ops;
+	host->quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
+		SDHCI_QUIRK_NO_BUSY_IRQ |
+		SDHCI_QUIRK_BROKEN_TIMEOUT_VAL |
+		SDHCI_QUIRK_PIO_USE_WORD_ACCESS |
+		SDHCI_QUIRK_HIGH_SPEED_WA;
+	
+        if (data) {
+		dev_dbg(&pdev->dev, " request wa irq\n");
+                mv_host->dove_card_int_wa = 1;
+                mv_host->dove_int_wa_info.irq = data->irq;
+                mv_host->dove_int_wa_info.gpio = data->gpio;
+                mv_host->dove_int_wa_info.func_select_bit = data->func_select_bit;
+                mv_host->dove_int_wa_info.status = 0; //disabled
+		ret = devm_request_irq(&pdev->dev, mv_host->dove_int_wa_info.irq,
+				       sdhci_dove_gpio_irq, IRQF_DISABLED,
+				       mmc_hostname(host->mmc), host);
+		if(ret) {
+			dev_err(&pdev->dev, "cannot request wa irq\n");
+                        goto err_request_irq;
+		}
+
+                /* to balance disable/enable_irq */
+                disable_irq_nosync(mv_host->dove_int_wa_info.irq);
+
+        } else {
+		dev_dbg(&pdev->dev, " no request wa irq\n");
+		mv_host->dove_card_int_wa = 0;
+	}
+
+#if defined(CONFIG_HAVE_CLK)
+	mv_host->clk = clk_get(&pdev->dev, NULL);
+	if (IS_ERR(mv_host->clk))
+		dev_notice(&pdev->dev, "cannot get clkdev\n");
+	else
+		clk_enable(mv_host->clk);
+#endif
+
+	ret = sdhci_add_host(host);
+	if (ret)
+		goto err_add_host;
+	if (mv_host->dove_card_int_wa)
+		host->mmc->ops->enable_sdio_irq = sdhci_enable_sdio_gpio_irq;
+	return 0;
+
+err_add_host:
+err_request_irq:
+err_ioremap:
+err_request_region:
+err_get_resource:
+	sdhci_free_host(host);
+	return ret;
+}
+
+static int __devexit sdhci_mv_remove(struct platform_device *pdev)
+{
+	struct sdhci_host *host = dev_get_drvdata(&pdev->dev);
+#if defined(CONFIG_HAVE_CLK)
+	struct sdhci_mv_host *mv_host = sdhci_priv(host);
+#endif
+
+	sdhci_remove_host(host, 0);
+	sdhci_free_host(host);
+#if defined(CONFIG_HAVE_CLK)
+	if (!IS_ERR(mv_host->clk)) {
+		clk_disable(mv_host->clk);
+		clk_put(mv_host->clk);
+	}
+#endif
+
+	return 0;
+}
+
+static struct platform_driver sdhci_mv_driver = {
+	.probe		= sdhci_mv_probe,
+	.remove		= __devexit_p(sdhci_mv_remove),
+	.suspend	= sdhci_mv_suspend,
+	.resume		= sdhci_mv_resume,
+	.driver		= {
+		.name	= "sdhci-mv",
+		.owner	= THIS_MODULE,
+	},
+};
+
+static int __init sdhci_mv_init(void)
+{
+	return platform_driver_register(&sdhci_mv_driver);
+}
+module_init(sdhci_mv_init);
+
+static void __exit sdhci_mv_exit(void)
+{
+	platform_driver_unregister(&sdhci_mv_driver);
+}
+module_exit(sdhci_mv_exit);
+
+MODULE_DESCRIPTION("Secure Digital Host Controller Interface MV driver");
+MODULE_AUTHOR("Saeed Bishara <saeed@marvell.com>");
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/host/bfin_sdh.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/host/bfin_sdh.c
@@ -0,0 +1,644 @@
+/*
+ * bfin_sdh.c - Analog Devices Blackfin SDH Controller
+ *
+ * Copyright (C) 2007-2009 Analog Device Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#define DRIVER_NAME	"bfin-sdh"
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/ioport.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/dma-mapping.h>
+#include <linux/mmc/host.h>
+#include <linux/proc_fs.h>
+#include <linux/gfp.h>
+
+#include <asm/cacheflush.h>
+#include <asm/dma.h>
+#include <asm/portmux.h>
+#include <asm/bfin_sdh.h>
+
+#if defined(CONFIG_BF51x)
+#define bfin_read_SDH_PWR_CTL		bfin_read_RSI_PWR_CTL
+#define bfin_write_SDH_PWR_CTL		bfin_write_RSI_PWR_CTL
+#define bfin_read_SDH_CLK_CTL		bfin_read_RSI_CLK_CTL
+#define bfin_write_SDH_CLK_CTL		bfin_write_RSI_CLK_CTL
+#define bfin_write_SDH_ARGUMENT		bfin_write_RSI_ARGUMENT
+#define bfin_write_SDH_COMMAND		bfin_write_RSI_COMMAND
+#define bfin_write_SDH_DATA_TIMER	bfin_write_RSI_DATA_TIMER
+#define bfin_read_SDH_RESPONSE0		bfin_read_RSI_RESPONSE0
+#define bfin_read_SDH_RESPONSE1		bfin_read_RSI_RESPONSE1
+#define bfin_read_SDH_RESPONSE2		bfin_read_RSI_RESPONSE2
+#define bfin_read_SDH_RESPONSE3		bfin_read_RSI_RESPONSE3
+#define bfin_write_SDH_DATA_LGTH	bfin_write_RSI_DATA_LGTH
+#define bfin_read_SDH_DATA_CTL		bfin_read_RSI_DATA_CTL
+#define bfin_write_SDH_DATA_CTL		bfin_write_RSI_DATA_CTL
+#define bfin_read_SDH_DATA_CNT		bfin_read_RSI_DATA_CNT
+#define bfin_write_SDH_STATUS_CLR	bfin_write_RSI_STATUS_CLR
+#define bfin_read_SDH_E_STATUS		bfin_read_RSI_E_STATUS
+#define bfin_write_SDH_E_STATUS		bfin_write_RSI_E_STATUS
+#define bfin_read_SDH_STATUS		bfin_read_RSI_STATUS
+#define bfin_write_SDH_MASK0		bfin_write_RSI_MASK0
+#define bfin_read_SDH_CFG		bfin_read_RSI_CFG
+#define bfin_write_SDH_CFG		bfin_write_RSI_CFG
+#endif
+
+struct dma_desc_array {
+	unsigned long	start_addr;
+	unsigned short	cfg;
+	unsigned short	x_count;
+	short		x_modify;
+} __packed;
+
+struct sdh_host {
+	struct mmc_host		*mmc;
+	spinlock_t		lock;
+	struct resource		*res;
+	void __iomem		*base;
+	int			irq;
+	int			stat_irq;
+	int			dma_ch;
+	int			dma_dir;
+	struct dma_desc_array	*sg_cpu;
+	dma_addr_t		sg_dma;
+	int			dma_len;
+
+	unsigned int		imask;
+	unsigned int		power_mode;
+	unsigned int		clk_div;
+
+	struct mmc_request	*mrq;
+	struct mmc_command	*cmd;
+	struct mmc_data		*data;
+};
+
+static struct bfin_sd_host *get_sdh_data(struct platform_device *pdev)
+{
+	return pdev->dev.platform_data;
+}
+
+static void sdh_stop_clock(struct sdh_host *host)
+{
+	bfin_write_SDH_CLK_CTL(bfin_read_SDH_CLK_CTL() & ~CLK_E);
+	SSYNC();
+}
+
+static void sdh_enable_stat_irq(struct sdh_host *host, unsigned int mask)
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&host->lock, flags);
+	host->imask |= mask;
+	bfin_write_SDH_MASK0(mask);
+	SSYNC();
+	spin_unlock_irqrestore(&host->lock, flags);
+}
+
+static void sdh_disable_stat_irq(struct sdh_host *host, unsigned int mask)
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&host->lock, flags);
+	host->imask &= ~mask;
+	bfin_write_SDH_MASK0(host->imask);
+	SSYNC();
+	spin_unlock_irqrestore(&host->lock, flags);
+}
+
+static int sdh_setup_data(struct sdh_host *host, struct mmc_data *data)
+{
+	unsigned int length;
+	unsigned int data_ctl;
+	unsigned int dma_cfg;
+	unsigned int cycle_ns, timeout;
+
+	dev_dbg(mmc_dev(host->mmc), "%s enter flags: 0x%x\n", __func__, data->flags);
+	host->data = data;
+	data_ctl = 0;
+	dma_cfg = 0;
+
+	length = data->blksz * data->blocks;
+	bfin_write_SDH_DATA_LGTH(length);
+
+	if (data->flags & MMC_DATA_STREAM)
+		data_ctl |= DTX_MODE;
+
+	if (data->flags & MMC_DATA_READ)
+		data_ctl |= DTX_DIR;
+	/* Only supports power-of-2 block size */
+	if (data->blksz & (data->blksz - 1))
+		return -EINVAL;
+	data_ctl |= ((ffs(data->blksz) - 1) << 4);
+
+	bfin_write_SDH_DATA_CTL(data_ctl);
+	/* the time of a host clock period in ns */
+	cycle_ns = 1000000000 / (get_sclk() / (2 * (host->clk_div + 1)));
+	timeout = data->timeout_ns / cycle_ns;
+	timeout += data->timeout_clks;
+	bfin_write_SDH_DATA_TIMER(timeout);
+	SSYNC();
+
+	if (data->flags & MMC_DATA_READ) {
+		host->dma_dir = DMA_FROM_DEVICE;
+		dma_cfg |= WNR;
+	} else
+		host->dma_dir = DMA_TO_DEVICE;
+
+	sdh_enable_stat_irq(host, (DAT_CRC_FAIL | DAT_TIME_OUT | DAT_END));
+	host->dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len, host->dma_dir);
+#if defined(CONFIG_BF54x)
+	dma_cfg |= DMAFLOW_ARRAY | NDSIZE_5 | RESTART | WDSIZE_32 | DMAEN;
+	{
+		struct scatterlist *sg;
+		int i;
+		for_each_sg(data->sg, sg, host->dma_len, i) {
+			host->sg_cpu[i].start_addr = sg_dma_address(sg);
+			host->sg_cpu[i].cfg = dma_cfg;
+			host->sg_cpu[i].x_count = sg_dma_len(sg) / 4;
+			host->sg_cpu[i].x_modify = 4;
+			dev_dbg(mmc_dev(host->mmc), "%d: start_addr:0x%lx, "
+				"cfg:0x%x, x_count:0x%x, x_modify:0x%x\n",
+				i, host->sg_cpu[i].start_addr,
+				host->sg_cpu[i].cfg, host->sg_cpu[i].x_count,
+				host->sg_cpu[i].x_modify);
+		}
+	}
+	flush_dcache_range((unsigned int)host->sg_cpu,
+		(unsigned int)host->sg_cpu +
+			host->dma_len * sizeof(struct dma_desc_array));
+	/* Set the last descriptor to stop mode */
+	host->sg_cpu[host->dma_len - 1].cfg &= ~(DMAFLOW | NDSIZE);
+	host->sg_cpu[host->dma_len - 1].cfg |= DI_EN;
+
+	set_dma_curr_desc_addr(host->dma_ch, (unsigned long *)host->sg_dma);
+	set_dma_x_count(host->dma_ch, 0);
+	set_dma_x_modify(host->dma_ch, 0);
+	set_dma_config(host->dma_ch, dma_cfg);
+#elif defined(CONFIG_BF51x)
+	/* RSI DMA doesn't work in array mode */
+	dma_cfg |= WDSIZE_32 | DMAEN;
+	set_dma_start_addr(host->dma_ch, sg_dma_address(&data->sg[0]));
+	set_dma_x_count(host->dma_ch, length / 4);
+	set_dma_x_modify(host->dma_ch, 4);
+	set_dma_config(host->dma_ch, dma_cfg);
+#endif
+	bfin_write_SDH_DATA_CTL(bfin_read_SDH_DATA_CTL() | DTX_DMA_E | DTX_E);
+
+	SSYNC();
+
+	dev_dbg(mmc_dev(host->mmc), "%s exit\n", __func__);
+	return 0;
+}
+
+static void sdh_start_cmd(struct sdh_host *host, struct mmc_command *cmd)
+{
+	unsigned int sdh_cmd;
+	unsigned int stat_mask;
+
+	dev_dbg(mmc_dev(host->mmc), "%s enter cmd: 0x%p\n", __func__, cmd);
+	WARN_ON(host->cmd != NULL);
+	host->cmd = cmd;
+
+	sdh_cmd = 0;
+	stat_mask = 0;
+
+	sdh_cmd |= cmd->opcode;
+
+	if (cmd->flags & MMC_RSP_PRESENT) {
+		sdh_cmd |= CMD_RSP;
+		stat_mask |= CMD_RESP_END;
+	} else {
+		stat_mask |= CMD_SENT;
+	}
+
+	if (cmd->flags & MMC_RSP_136)
+		sdh_cmd |= CMD_L_RSP;
+
+	stat_mask |= CMD_CRC_FAIL | CMD_TIME_OUT;
+
+	sdh_enable_stat_irq(host, stat_mask);
+
+	bfin_write_SDH_ARGUMENT(cmd->arg);
+	bfin_write_SDH_COMMAND(sdh_cmd | CMD_E);
+	bfin_write_SDH_CLK_CTL(bfin_read_SDH_CLK_CTL() | CLK_E);
+	SSYNC();
+}
+
+static void sdh_finish_request(struct sdh_host *host, struct mmc_request *mrq)
+{
+	dev_dbg(mmc_dev(host->mmc), "%s enter\n", __func__);
+	host->mrq = NULL;
+	host->cmd = NULL;
+	host->data = NULL;
+	mmc_request_done(host->mmc, mrq);
+}
+
+static int sdh_cmd_done(struct sdh_host *host, unsigned int stat)
+{
+	struct mmc_command *cmd = host->cmd;
+	int ret = 0;
+
+	dev_dbg(mmc_dev(host->mmc), "%s enter cmd: %p\n", __func__, cmd);
+	if (!cmd)
+		return 0;
+
+	host->cmd = NULL;
+
+	if (cmd->flags & MMC_RSP_PRESENT) {
+		cmd->resp[0] = bfin_read_SDH_RESPONSE0();
+		if (cmd->flags & MMC_RSP_136) {
+			cmd->resp[1] = bfin_read_SDH_RESPONSE1();
+			cmd->resp[2] = bfin_read_SDH_RESPONSE2();
+			cmd->resp[3] = bfin_read_SDH_RESPONSE3();
+		}
+	}
+	if (stat & CMD_TIME_OUT)
+		cmd->error = -ETIMEDOUT;
+	else if (stat & CMD_CRC_FAIL && cmd->flags & MMC_RSP_CRC)
+		cmd->error = -EILSEQ;
+
+	sdh_disable_stat_irq(host, (CMD_SENT | CMD_RESP_END | CMD_TIME_OUT | CMD_CRC_FAIL));
+
+	if (host->data && !cmd->error) {
+		if (host->data->flags & MMC_DATA_WRITE) {
+			ret = sdh_setup_data(host, host->data);
+			if (ret)
+				return 0;
+		}
+
+		sdh_enable_stat_irq(host, DAT_END | RX_OVERRUN | TX_UNDERRUN | DAT_TIME_OUT);
+	} else
+		sdh_finish_request(host, host->mrq);
+
+	return 1;
+}
+
+static int sdh_data_done(struct sdh_host *host, unsigned int stat)
+{
+	struct mmc_data *data = host->data;
+
+	dev_dbg(mmc_dev(host->mmc), "%s enter stat: 0x%x\n", __func__, stat);
+	if (!data)
+		return 0;
+
+	disable_dma(host->dma_ch);
+	dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len,
+		     host->dma_dir);
+
+	if (stat & DAT_TIME_OUT)
+		data->error = -ETIMEDOUT;
+	else if (stat & DAT_CRC_FAIL)
+		data->error = -EILSEQ;
+	else if (stat & (RX_OVERRUN | TX_UNDERRUN))
+		data->error = -EIO;
+
+	if (!data->error)
+		data->bytes_xfered = data->blocks * data->blksz;
+	else
+		data->bytes_xfered = 0;
+
+	sdh_disable_stat_irq(host, DAT_END | DAT_TIME_OUT | DAT_CRC_FAIL | RX_OVERRUN | TX_UNDERRUN);
+	bfin_write_SDH_STATUS_CLR(DAT_END_STAT | DAT_TIMEOUT_STAT | \
+			DAT_CRC_FAIL_STAT | DAT_BLK_END_STAT | RX_OVERRUN | TX_UNDERRUN);
+	bfin_write_SDH_DATA_CTL(0);
+	SSYNC();
+
+	host->data = NULL;
+	if (host->mrq->stop) {
+		sdh_stop_clock(host);
+		sdh_start_cmd(host, host->mrq->stop);
+	} else {
+		sdh_finish_request(host, host->mrq);
+	}
+
+	return 1;
+}
+
+static void sdh_request(struct mmc_host *mmc, struct mmc_request *mrq)
+{
+	struct sdh_host *host = mmc_priv(mmc);
+	int ret = 0;
+
+	dev_dbg(mmc_dev(host->mmc), "%s enter, mrp:%p, cmd:%p\n", __func__, mrq, mrq->cmd);
+	WARN_ON(host->mrq != NULL);
+
+	host->mrq = mrq;
+	host->data = mrq->data;
+
+	if (mrq->data && mrq->data->flags & MMC_DATA_READ) {
+		ret = sdh_setup_data(host, mrq->data);
+		if (ret)
+			return;
+	}
+
+	sdh_start_cmd(host, mrq->cmd);
+}
+
+static void sdh_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
+{
+	struct sdh_host *host;
+	unsigned long flags;
+	u16 clk_ctl = 0;
+	u16 pwr_ctl = 0;
+	u16 cfg;
+	host = mmc_priv(mmc);
+
+	spin_lock_irqsave(&host->lock, flags);
+	if (ios->clock) {
+		unsigned long  sys_clk, ios_clk;
+		unsigned char clk_div;
+		ios_clk = 2 * ios->clock;
+		sys_clk = get_sclk();
+		clk_div = sys_clk / ios_clk;
+		if (sys_clk % ios_clk == 0)
+			clk_div -= 1;
+		clk_div = min_t(unsigned char, clk_div, 0xFF);
+		clk_ctl |= clk_div;
+		clk_ctl |= CLK_E;
+		host->clk_div = clk_div;
+	} else
+		sdh_stop_clock(host);
+
+	if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN)
+#ifdef CONFIG_SDH_BFIN_MISSING_CMD_PULLUP_WORKAROUND
+		pwr_ctl |= ROD_CTL;
+#else
+		pwr_ctl |= SD_CMD_OD | ROD_CTL;
+#endif
+
+	if (ios->bus_width == MMC_BUS_WIDTH_4) {
+		cfg = bfin_read_SDH_CFG();
+		cfg &= ~PD_SDDAT3;
+		cfg |= PUP_SDDAT3;
+		/* Enable 4 bit SDIO */
+		cfg |= (SD4E | MWE);
+		bfin_write_SDH_CFG(cfg);
+		clk_ctl |= WIDE_BUS;
+	} else {
+		cfg = bfin_read_SDH_CFG();
+		cfg |= MWE;
+		bfin_write_SDH_CFG(cfg);
+	}
+
+	bfin_write_SDH_CLK_CTL(clk_ctl);
+
+	host->power_mode = ios->power_mode;
+	if (ios->power_mode == MMC_POWER_ON)
+		pwr_ctl |= PWR_ON;
+
+	bfin_write_SDH_PWR_CTL(pwr_ctl);
+	SSYNC();
+
+	spin_unlock_irqrestore(&host->lock, flags);
+
+	dev_dbg(mmc_dev(host->mmc), "SDH: clk_div = 0x%x actual clock:%ld expected clock:%d\n",
+		host->clk_div,
+		host->clk_div ? get_sclk() / (2 * (host->clk_div + 1)) : 0,
+		ios->clock);
+}
+
+static const struct mmc_host_ops sdh_ops = {
+	.request	= sdh_request,
+	.set_ios	= sdh_set_ios,
+};
+
+static irqreturn_t sdh_dma_irq(int irq, void *devid)
+{
+	struct sdh_host *host = devid;
+
+	dev_dbg(mmc_dev(host->mmc), "%s enter, irq_stat: 0x%04x\n", __func__,
+		get_dma_curr_irqstat(host->dma_ch));
+	clear_dma_irqstat(host->dma_ch);
+	SSYNC();
+
+	return IRQ_HANDLED;
+}
+
+static irqreturn_t sdh_stat_irq(int irq, void *devid)
+{
+	struct sdh_host *host = devid;
+	unsigned int status;
+	int handled = 0;
+
+	dev_dbg(mmc_dev(host->mmc), "%s enter\n", __func__);
+	status = bfin_read_SDH_E_STATUS();
+	if (status & SD_CARD_DET) {
+		mmc_detect_change(host->mmc, 0);
+		bfin_write_SDH_E_STATUS(SD_CARD_DET);
+	}
+	status = bfin_read_SDH_STATUS();
+	if (status & (CMD_SENT | CMD_RESP_END | CMD_TIME_OUT | CMD_CRC_FAIL)) {
+		handled |= sdh_cmd_done(host, status);
+		bfin_write_SDH_STATUS_CLR(CMD_SENT_STAT | CMD_RESP_END_STAT | \
+				CMD_TIMEOUT_STAT | CMD_CRC_FAIL_STAT);
+		SSYNC();
+	}
+
+	status = bfin_read_SDH_STATUS();
+	if (status & (DAT_END | DAT_TIME_OUT | DAT_CRC_FAIL | RX_OVERRUN | TX_UNDERRUN))
+		handled |= sdh_data_done(host, status);
+
+	dev_dbg(mmc_dev(host->mmc), "%s exit\n\n", __func__);
+
+	return IRQ_RETVAL(handled);
+}
+
+static int __devinit sdh_probe(struct platform_device *pdev)
+{
+	struct mmc_host *mmc;
+	struct sdh_host *host;
+	struct bfin_sd_host *drv_data = get_sdh_data(pdev);
+	int ret;
+
+	if (!drv_data) {
+		dev_err(&pdev->dev, "missing platform driver data\n");
+		ret = -EINVAL;
+		goto out;
+	}
+
+	mmc = mmc_alloc_host(sizeof(*mmc), &pdev->dev);
+	if (!mmc) {
+		ret = -ENOMEM;
+		goto out;
+	}
+
+	mmc->ops = &sdh_ops;
+	mmc->max_phys_segs = 32;
+	mmc->max_seg_size = 1 << 16;
+	mmc->max_blk_size = 1 << 11;
+	mmc->max_blk_count = 1 << 11;
+	mmc->max_req_size = PAGE_SIZE;
+	mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
+	mmc->f_max = get_sclk();
+	mmc->f_min = mmc->f_max >> 9;
+	mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_NEEDS_POLL;
+	host = mmc_priv(mmc);
+	host->mmc = mmc;
+
+	spin_lock_init(&host->lock);
+	host->irq = drv_data->irq_int0;
+	host->dma_ch = drv_data->dma_chan;
+
+	ret = request_dma(host->dma_ch, DRIVER_NAME "DMA");
+	if (ret) {
+		dev_err(&pdev->dev, "unable to request DMA channel\n");
+		goto out1;
+	}
+
+	ret = set_dma_callback(host->dma_ch, sdh_dma_irq, host);
+	if (ret) {
+		dev_err(&pdev->dev, "unable to request DMA irq\n");
+		goto out2;
+	}
+
+	host->sg_cpu = dma_alloc_coherent(&pdev->dev, PAGE_SIZE, &host->sg_dma, GFP_KERNEL);
+	if (host->sg_cpu == NULL) {
+		ret = -ENOMEM;
+		goto out2;
+	}
+
+	platform_set_drvdata(pdev, mmc);
+	mmc_add_host(mmc);
+
+	ret = request_irq(host->irq, sdh_stat_irq, 0, "SDH Status IRQ", host);
+	if (ret) {
+		dev_err(&pdev->dev, "unable to request status irq\n");
+		goto out3;
+	}
+
+	ret = peripheral_request_list(drv_data->pin_req, DRIVER_NAME);
+	if (ret) {
+		dev_err(&pdev->dev, "unable to request peripheral pins\n");
+		goto out4;
+	}
+#if defined(CONFIG_BF54x)
+	/* Secure Digital Host shares DMA with Nand controller */
+	bfin_write_DMAC1_PERIMUX(bfin_read_DMAC1_PERIMUX() | 0x1);
+#endif
+
+	bfin_write_SDH_CFG(bfin_read_SDH_CFG() | CLKS_EN);
+	SSYNC();
+
+	/* Disable card inserting detection pin. set MMC_CAP_NEES_POLL, and
+	 * mmc stack will do the detection.
+	 */
+	bfin_write_SDH_CFG((bfin_read_SDH_CFG() & 0x1F) | (PUP_SDDAT | PUP_SDDAT3));
+	SSYNC();
+
+	return 0;
+
+out4:
+	free_irq(host->irq, host);
+out3:
+	mmc_remove_host(mmc);
+	dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma);
+out2:
+	free_dma(host->dma_ch);
+out1:
+	mmc_free_host(mmc);
+ out:
+	return ret;
+}
+
+static int __devexit sdh_remove(struct platform_device *pdev)
+{
+	struct mmc_host *mmc = platform_get_drvdata(pdev);
+
+	platform_set_drvdata(pdev, NULL);
+
+	if (mmc) {
+		struct sdh_host *host = mmc_priv(mmc);
+
+		mmc_remove_host(mmc);
+
+		sdh_stop_clock(host);
+		free_irq(host->irq, host);
+		free_dma(host->dma_ch);
+		dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma);
+
+		mmc_free_host(mmc);
+	}
+
+	return 0;
+}
+
+#ifdef CONFIG_PM
+static int sdh_suspend(struct platform_device *dev, pm_message_t state)
+{
+	struct mmc_host *mmc = platform_get_drvdata(dev);
+	struct bfin_sd_host *drv_data = get_sdh_data(dev);
+	int ret = 0;
+
+	if (mmc)
+		ret = mmc_suspend_host(mmc);
+
+	bfin_write_SDH_PWR_CTL(bfin_read_SDH_PWR_CTL() & ~PWR_ON);
+	peripheral_free_list(drv_data->pin_req);
+
+	return ret;
+}
+
+static int sdh_resume(struct platform_device *dev)
+{
+	struct mmc_host *mmc = platform_get_drvdata(dev);
+	struct bfin_sd_host *drv_data = get_sdh_data(dev);
+	int ret = 0;
+
+	ret = peripheral_request_list(drv_data->pin_req, DRIVER_NAME);
+	if (ret) {
+		dev_err(&dev->dev, "unable to request peripheral pins\n");
+		return ret;
+	}
+
+	bfin_write_SDH_PWR_CTL(bfin_read_SDH_PWR_CTL() | PWR_ON);
+#if defined(CONFIG_BF54x)
+	/* Secure Digital Host shares DMA with Nand controller */
+	bfin_write_DMAC1_PERIMUX(bfin_read_DMAC1_PERIMUX() | 0x1);
+#endif
+	bfin_write_SDH_CFG(bfin_read_SDH_CFG() | CLKS_EN);
+	SSYNC();
+
+	bfin_write_SDH_CFG((bfin_read_SDH_CFG() & 0x1F) | (PUP_SDDAT | PUP_SDDAT3));
+	SSYNC();
+
+	if (mmc)
+		ret = mmc_resume_host(mmc);
+
+	return ret;
+}
+#else
+# define sdh_suspend NULL
+# define sdh_resume  NULL
+#endif
+
+static struct platform_driver sdh_driver = {
+	.probe   = sdh_probe,
+	.remove  = __devexit_p(sdh_remove),
+	.suspend = sdh_suspend,
+	.resume  = sdh_resume,
+	.driver  = {
+		.name = DRIVER_NAME,
+	},
+};
+
+static int __init sdh_init(void)
+{
+	return platform_driver_register(&sdh_driver);
+}
+module_init(sdh_init);
+
+static void __exit sdh_exit(void)
+{
+	platform_driver_unregister(&sdh_driver);
+}
+module_exit(sdh_exit);
+
+MODULE_DESCRIPTION("Blackfin Secure Digital Host Driver");
+MODULE_AUTHOR("Cliff Cai, Roy Huang");
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/host/sdhci-pci.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/host/sdhci-pci.c
@@ -569,6 +569,7 @@
 	host->ioaddr = pci_ioremap_bar(pdev, bar);
 	if (!host->ioaddr) {
 		dev_err(&pdev->dev, "failed to remap registers\n");
+		ret = -ENOMEM;
 		goto release;
 	}
 
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/host/davinci_mmc.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/host/davinci_mmc.c
@@ -0,0 +1,1413 @@
+/*
+ * davinci_mmc.c - TI DaVinci MMC/SD/SDIO driver
+ *
+ * Copyright (C) 2006 Texas Instruments.
+ *       Original author: Purushotam Kumar
+ * Copyright (C) 2009 David Brownell
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/ioport.h>
+#include <linux/platform_device.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/cpufreq.h>
+#include <linux/mmc/host.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/delay.h>
+#include <linux/dma-mapping.h>
+#include <linux/mmc/mmc.h>
+
+#include <mach/mmc.h>
+#include <mach/edma.h>
+
+/*
+ * Register Definitions
+ */
+#define DAVINCI_MMCCTL       0x00 /* Control Register                  */
+#define DAVINCI_MMCCLK       0x04 /* Memory Clock Control Register     */
+#define DAVINCI_MMCST0       0x08 /* Status Register 0                 */
+#define DAVINCI_MMCST1       0x0C /* Status Register 1                 */
+#define DAVINCI_MMCIM        0x10 /* Interrupt Mask Register           */
+#define DAVINCI_MMCTOR       0x14 /* Response Time-Out Register        */
+#define DAVINCI_MMCTOD       0x18 /* Data Read Time-Out Register       */
+#define DAVINCI_MMCBLEN      0x1C /* Block Length Register             */
+#define DAVINCI_MMCNBLK      0x20 /* Number of Blocks Register         */
+#define DAVINCI_MMCNBLC      0x24 /* Number of Blocks Counter Register */
+#define DAVINCI_MMCDRR       0x28 /* Data Receive Register             */
+#define DAVINCI_MMCDXR       0x2C /* Data Transmit Register            */
+#define DAVINCI_MMCCMD       0x30 /* Command Register                  */
+#define DAVINCI_MMCARGHL     0x34 /* Argument Register                 */
+#define DAVINCI_MMCRSP01     0x38 /* Response Register 0 and 1         */
+#define DAVINCI_MMCRSP23     0x3C /* Response Register 0 and 1         */
+#define DAVINCI_MMCRSP45     0x40 /* Response Register 0 and 1         */
+#define DAVINCI_MMCRSP67     0x44 /* Response Register 0 and 1         */
+#define DAVINCI_MMCDRSP      0x48 /* Data Response Register            */
+#define DAVINCI_MMCETOK      0x4C
+#define DAVINCI_MMCCIDX      0x50 /* Command Index Register            */
+#define DAVINCI_MMCCKC       0x54
+#define DAVINCI_MMCTORC      0x58
+#define DAVINCI_MMCTODC      0x5C
+#define DAVINCI_MMCBLNC      0x60
+#define DAVINCI_SDIOCTL      0x64
+#define DAVINCI_SDIOST0      0x68
+#define DAVINCI_SDIOEN       0x6C
+#define DAVINCI_SDIOST       0x70
+#define DAVINCI_MMCFIFOCTL   0x74 /* FIFO Control Register             */
+
+/* DAVINCI_MMCCTL definitions */
+#define MMCCTL_DATRST         (1 << 0)
+#define MMCCTL_CMDRST         (1 << 1)
+#define MMCCTL_WIDTH_8_BIT    (1 << 8)
+#define MMCCTL_WIDTH_4_BIT    (1 << 2)
+#define MMCCTL_DATEG_DISABLED (0 << 6)
+#define MMCCTL_DATEG_RISING   (1 << 6)
+#define MMCCTL_DATEG_FALLING  (2 << 6)
+#define MMCCTL_DATEG_BOTH     (3 << 6)
+#define MMCCTL_PERMDR_LE      (0 << 9)
+#define MMCCTL_PERMDR_BE      (1 << 9)
+#define MMCCTL_PERMDX_LE      (0 << 10)
+#define MMCCTL_PERMDX_BE      (1 << 10)
+
+/* DAVINCI_MMCCLK definitions */
+#define MMCCLK_CLKEN          (1 << 8)
+#define MMCCLK_CLKRT_MASK     (0xFF << 0)
+
+/* IRQ bit definitions, for DAVINCI_MMCST0 and DAVINCI_MMCIM */
+#define MMCST0_DATDNE         BIT(0)	/* data done */
+#define MMCST0_BSYDNE         BIT(1)	/* busy done */
+#define MMCST0_RSPDNE         BIT(2)	/* command done */
+#define MMCST0_TOUTRD         BIT(3)	/* data read timeout */
+#define MMCST0_TOUTRS         BIT(4)	/* command response timeout */
+#define MMCST0_CRCWR          BIT(5)	/* data write CRC error */
+#define MMCST0_CRCRD          BIT(6)	/* data read CRC error */
+#define MMCST0_CRCRS          BIT(7)	/* command response CRC error */
+#define MMCST0_DXRDY          BIT(9)	/* data transmit ready (fifo empty) */
+#define MMCST0_DRRDY          BIT(10)	/* data receive ready (data in fifo)*/
+#define MMCST0_DATED          BIT(11)	/* DAT3 edge detect */
+#define MMCST0_TRNDNE         BIT(12)	/* transfer done */
+
+/* DAVINCI_MMCST1 definitions */
+#define MMCST1_BUSY           (1 << 0)
+
+/* DAVINCI_MMCCMD definitions */
+#define MMCCMD_CMD_MASK       (0x3F << 0)
+#define MMCCMD_PPLEN          (1 << 7)
+#define MMCCMD_BSYEXP         (1 << 8)
+#define MMCCMD_RSPFMT_MASK    (3 << 9)
+#define MMCCMD_RSPFMT_NONE    (0 << 9)
+#define MMCCMD_RSPFMT_R1456   (1 << 9)
+#define MMCCMD_RSPFMT_R2      (2 << 9)
+#define MMCCMD_RSPFMT_R3      (3 << 9)
+#define MMCCMD_DTRW           (1 << 11)
+#define MMCCMD_STRMTP         (1 << 12)
+#define MMCCMD_WDATX          (1 << 13)
+#define MMCCMD_INITCK         (1 << 14)
+#define MMCCMD_DCLR           (1 << 15)
+#define MMCCMD_DMATRIG        (1 << 16)
+
+/* DAVINCI_MMCFIFOCTL definitions */
+#define MMCFIFOCTL_FIFORST    (1 << 0)
+#define MMCFIFOCTL_FIFODIR_WR (1 << 1)
+#define MMCFIFOCTL_FIFODIR_RD (0 << 1)
+#define MMCFIFOCTL_FIFOLEV    (1 << 2) /* 0 = 128 bits, 1 = 256 bits */
+#define MMCFIFOCTL_ACCWD_4    (0 << 3) /* access width of 4 bytes    */
+#define MMCFIFOCTL_ACCWD_3    (1 << 3) /* access width of 3 bytes    */
+#define MMCFIFOCTL_ACCWD_2    (2 << 3) /* access width of 2 bytes    */
+#define MMCFIFOCTL_ACCWD_1    (3 << 3) /* access width of 1 byte     */
+
+
+/* MMCSD Init clock in Hz in opendrain mode */
+#define MMCSD_INIT_CLOCK		200000
+
+/*
+ * One scatterlist dma "segment" is at most MAX_CCNT rw_threshold units,
+ * and we handle up to MAX_NR_SG segments.  MMC_BLOCK_BOUNCE kicks in only
+ * for drivers with max_hw_segs == 1, making the segments bigger (64KB)
+ * than the page or two that's otherwise typical. nr_sg (passed from
+ * platform data) == 16 gives at least the same throughput boost, using
+ * EDMA transfer linkage instead of spending CPU time copying pages.
+ */
+#define MAX_CCNT	((1 << 16) - 1)
+
+#define MAX_NR_SG	16
+
+static unsigned rw_threshold = 32;
+module_param(rw_threshold, uint, S_IRUGO);
+MODULE_PARM_DESC(rw_threshold,
+		"Read/Write threshold. Default = 32");
+
+static unsigned __initdata use_dma = 1;
+module_param(use_dma, uint, 0);
+MODULE_PARM_DESC(use_dma, "Whether to use DMA or not. Default = 1");
+
+struct mmc_davinci_host {
+	struct mmc_command *cmd;
+	struct mmc_data *data;
+	struct mmc_host *mmc;
+	struct clk *clk;
+	unsigned int mmc_input_clk;
+	void __iomem *base;
+	struct resource *mem_res;
+	int irq;
+	unsigned char bus_mode;
+
+#define DAVINCI_MMC_DATADIR_NONE	0
+#define DAVINCI_MMC_DATADIR_READ	1
+#define DAVINCI_MMC_DATADIR_WRITE	2
+	unsigned char data_dir;
+	unsigned char suspended;
+
+	/* buffer is used during PIO of one scatterlist segment, and
+	 * is updated along with buffer_bytes_left.  bytes_left applies
+	 * to all N blocks of the PIO transfer.
+	 */
+	u8 *buffer;
+	u32 buffer_bytes_left;
+	u32 bytes_left;
+
+	u32 rxdma, txdma;
+	bool use_dma;
+	bool do_dma;
+
+	/* Scatterlist DMA uses one or more parameter RAM entries:
+	 * the main one (associated with rxdma or txdma) plus zero or
+	 * more links.  The entries for a given transfer differ only
+	 * by memory buffer (address, length) and link field.
+	 */
+	struct edmacc_param	tx_template;
+	struct edmacc_param	rx_template;
+	unsigned		n_link;
+	u32			links[MAX_NR_SG - 1];
+
+	/* For PIO we walk scatterlists one segment at a time. */
+	unsigned int		sg_len;
+	struct scatterlist *sg;
+
+	/* Version of the MMC/SD controller */
+	u8 version;
+	/* for ns in one cycle calculation */
+	unsigned ns_in_one_cycle;
+	/* Number of sg segments */
+	u8 nr_sg;
+#ifdef CONFIG_CPU_FREQ
+	struct notifier_block	freq_transition;
+#endif
+};
+
+
+/* PIO only */
+static void mmc_davinci_sg_to_buf(struct mmc_davinci_host *host)
+{
+	host->buffer_bytes_left = sg_dma_len(host->sg);
+	host->buffer = sg_virt(host->sg);
+	if (host->buffer_bytes_left > host->bytes_left)
+		host->buffer_bytes_left = host->bytes_left;
+}
+
+static void davinci_fifo_data_trans(struct mmc_davinci_host *host,
+					unsigned int n)
+{
+	u8 *p;
+	unsigned int i;
+
+	if (host->buffer_bytes_left == 0) {
+		host->sg = sg_next(host->data->sg);
+		mmc_davinci_sg_to_buf(host);
+	}
+
+	p = host->buffer;
+	if (n > host->buffer_bytes_left)
+		n = host->buffer_bytes_left;
+	host->buffer_bytes_left -= n;
+	host->bytes_left -= n;
+
+	/* NOTE:  we never transfer more than rw_threshold bytes
+	 * to/from the fifo here; there's no I/O overlap.
+	 * This also assumes that access width( i.e. ACCWD) is 4 bytes
+	 */
+	if (host->data_dir == DAVINCI_MMC_DATADIR_WRITE) {
+		for (i = 0; i < (n >> 2); i++) {
+			writel(*((u32 *)p), host->base + DAVINCI_MMCDXR);
+			p = p + 4;
+		}
+		if (n & 3) {
+			iowrite8_rep(host->base + DAVINCI_MMCDXR, p, (n & 3));
+			p = p + (n & 3);
+		}
+	} else {
+		for (i = 0; i < (n >> 2); i++) {
+			*((u32 *)p) = readl(host->base + DAVINCI_MMCDRR);
+			p  = p + 4;
+		}
+		if (n & 3) {
+			ioread8_rep(host->base + DAVINCI_MMCDRR, p, (n & 3));
+			p = p + (n & 3);
+		}
+	}
+	host->buffer = p;
+}
+
+static void mmc_davinci_start_command(struct mmc_davinci_host *host,
+		struct mmc_command *cmd)
+{
+	u32 cmd_reg = 0;
+	u32 im_val;
+
+	dev_dbg(mmc_dev(host->mmc), "CMD%d, arg 0x%08x%s\n",
+		cmd->opcode, cmd->arg,
+		({ char *s;
+		switch (mmc_resp_type(cmd)) {
+		case MMC_RSP_R1:
+			s = ", R1/R5/R6/R7 response";
+			break;
+		case MMC_RSP_R1B:
+			s = ", R1b response";
+			break;
+		case MMC_RSP_R2:
+			s = ", R2 response";
+			break;
+		case MMC_RSP_R3:
+			s = ", R3/R4 response";
+			break;
+		default:
+			s = ", (R? response)";
+			break;
+		}; s; }));
+	host->cmd = cmd;
+
+	switch (mmc_resp_type(cmd)) {
+	case MMC_RSP_R1B:
+		/* There's some spec confusion about when R1B is
+		 * allowed, but if the card doesn't issue a BUSY
+		 * then it's harmless for us to allow it.
+		 */
+		cmd_reg |= MMCCMD_BSYEXP;
+		/* FALLTHROUGH */
+	case MMC_RSP_R1:		/* 48 bits, CRC */
+		cmd_reg |= MMCCMD_RSPFMT_R1456;
+		break;
+	case MMC_RSP_R2:		/* 136 bits, CRC */
+		cmd_reg |= MMCCMD_RSPFMT_R2;
+		break;
+	case MMC_RSP_R3:		/* 48 bits, no CRC */
+		cmd_reg |= MMCCMD_RSPFMT_R3;
+		break;
+	default:
+		cmd_reg |= MMCCMD_RSPFMT_NONE;
+		dev_dbg(mmc_dev(host->mmc), "unknown resp_type %04x\n",
+			mmc_resp_type(cmd));
+		break;
+	}
+
+	/* Set command index */
+	cmd_reg |= cmd->opcode;
+
+	/* Enable EDMA transfer triggers */
+	if (host->do_dma)
+		cmd_reg |= MMCCMD_DMATRIG;
+
+	if (host->version == MMC_CTLR_VERSION_2 && host->data != NULL &&
+			host->data_dir == DAVINCI_MMC_DATADIR_READ)
+		cmd_reg |= MMCCMD_DMATRIG;
+
+	/* Setting whether command involves data transfer or not */
+	if (cmd->data)
+		cmd_reg |= MMCCMD_WDATX;
+
+	/* Setting whether stream or block transfer */
+	if (cmd->flags & MMC_DATA_STREAM)
+		cmd_reg |= MMCCMD_STRMTP;
+
+	/* Setting whether data read or write */
+	if (host->data_dir == DAVINCI_MMC_DATADIR_WRITE)
+		cmd_reg |= MMCCMD_DTRW;
+
+	if (host->bus_mode == MMC_BUSMODE_PUSHPULL)
+		cmd_reg |= MMCCMD_PPLEN;
+
+	/* set Command timeout */
+	writel(0x1FFF, host->base + DAVINCI_MMCTOR);
+
+	/* Enable interrupt (calculate here, defer until FIFO is stuffed). */
+	im_val =  MMCST0_RSPDNE | MMCST0_CRCRS | MMCST0_TOUTRS;
+	if (host->data_dir == DAVINCI_MMC_DATADIR_WRITE) {
+		im_val |= MMCST0_DATDNE | MMCST0_CRCWR;
+
+		if (!host->do_dma)
+			im_val |= MMCST0_DXRDY;
+	} else if (host->data_dir == DAVINCI_MMC_DATADIR_READ) {
+		im_val |= MMCST0_DATDNE | MMCST0_CRCRD | MMCST0_TOUTRD;
+
+		if (!host->do_dma)
+			im_val |= MMCST0_DRRDY;
+	}
+
+	/*
+	 * Before non-DMA WRITE commands the controller needs priming:
+	 * FIFO should be populated with 32 bytes i.e. whatever is the FIFO size
+	 */
+	if (!host->do_dma && (host->data_dir == DAVINCI_MMC_DATADIR_WRITE))
+		davinci_fifo_data_trans(host, rw_threshold);
+
+	writel(cmd->arg, host->base + DAVINCI_MMCARGHL);
+	writel(cmd_reg,  host->base + DAVINCI_MMCCMD);
+	writel(im_val, host->base + DAVINCI_MMCIM);
+}
+
+/*----------------------------------------------------------------------*/
+
+/* DMA infrastructure */
+
+static void davinci_abort_dma(struct mmc_davinci_host *host)
+{
+	int sync_dev;
+
+	if (host->data_dir == DAVINCI_MMC_DATADIR_READ)
+		sync_dev = host->rxdma;
+	else
+		sync_dev = host->txdma;
+
+	edma_stop(sync_dev);
+	edma_clean_channel(sync_dev);
+}
+
+static void
+mmc_davinci_xfer_done(struct mmc_davinci_host *host, struct mmc_data *data);
+
+static void mmc_davinci_dma_cb(unsigned channel, u16 ch_status, void *data)
+{
+	if (DMA_COMPLETE != ch_status) {
+		struct mmc_davinci_host *host = data;
+
+		/* Currently means:  DMA Event Missed, or "null" transfer
+		 * request was seen.  In the future, TC errors (like bad
+		 * addresses) might be presented too.
+		 */
+		dev_warn(mmc_dev(host->mmc), "DMA %s error\n",
+			(host->data->flags & MMC_DATA_WRITE)
+				? "write" : "read");
+		host->data->error = -EIO;
+		mmc_davinci_xfer_done(host, host->data);
+	}
+}
+
+/* Set up tx or rx template, to be modified and updated later */
+static void __init mmc_davinci_dma_setup(struct mmc_davinci_host *host,
+		bool tx, struct edmacc_param *template)
+{
+	unsigned	sync_dev;
+	const u16	acnt = 4;
+	const u16	bcnt = rw_threshold >> 2;
+	const u16	ccnt = 0;
+	u32		src_port = 0;
+	u32		dst_port = 0;
+	s16		src_bidx, dst_bidx;
+	s16		src_cidx, dst_cidx;
+
+	/*
+	 * A-B Sync transfer:  each DMA request is for one "frame" of
+	 * rw_threshold bytes, broken into "acnt"-size chunks repeated
+	 * "bcnt" times.  Each segment needs "ccnt" such frames; since
+	 * we tell the block layer our mmc->max_seg_size limit, we can
+	 * trust (later) that it's within bounds.
+	 *
+	 * The FIFOs are read/written in 4-byte chunks (acnt == 4) and
+	 * EDMA will optimize memory operations to use larger bursts.
+	 */
+	if (tx) {
+		sync_dev = host->txdma;
+
+		/* src_prt, ccnt, and link to be set up later */
+		src_bidx = acnt;
+		src_cidx = acnt * bcnt;
+
+		dst_port = host->mem_res->start + DAVINCI_MMCDXR;
+		dst_bidx = 0;
+		dst_cidx = 0;
+	} else {
+		sync_dev = host->rxdma;
+
+		src_port = host->mem_res->start + DAVINCI_MMCDRR;
+		src_bidx = 0;
+		src_cidx = 0;
+
+		/* dst_prt, ccnt, and link to be set up later */
+		dst_bidx = acnt;
+		dst_cidx = acnt * bcnt;
+	}
+
+	/*
+	 * We can't use FIFO mode for the FIFOs because MMC FIFO addresses
+	 * are not 256-bit (32-byte) aligned.  So we use INCR, and the W8BIT
+	 * parameter is ignored.
+	 */
+	edma_set_src(sync_dev, src_port, INCR, W8BIT);
+	edma_set_dest(sync_dev, dst_port, INCR, W8BIT);
+
+	edma_set_src_index(sync_dev, src_bidx, src_cidx);
+	edma_set_dest_index(sync_dev, dst_bidx, dst_cidx);
+
+	edma_set_transfer_params(sync_dev, acnt, bcnt, ccnt, 8, ABSYNC);
+
+	edma_read_slot(sync_dev, template);
+
+	/* don't bother with irqs or chaining */
+	template->opt |= EDMA_CHAN_SLOT(sync_dev) << 12;
+}
+
+static void mmc_davinci_send_dma_request(struct mmc_davinci_host *host,
+		struct mmc_data *data)
+{
+	struct edmacc_param	*template;
+	int			channel, slot;
+	unsigned		link;
+	struct scatterlist	*sg;
+	unsigned		sg_len;
+	unsigned		bytes_left = host->bytes_left;
+	const unsigned		shift = ffs(rw_threshold) - 1;;
+
+	if (host->data_dir == DAVINCI_MMC_DATADIR_WRITE) {
+		template = &host->tx_template;
+		channel = host->txdma;
+	} else {
+		template = &host->rx_template;
+		channel = host->rxdma;
+	}
+
+	/* We know sg_len and ccnt will never be out of range because
+	 * we told the mmc layer which in turn tells the block layer
+	 * to ensure that it only hands us one scatterlist segment
+	 * per EDMA PARAM entry.  Update the PARAM
+	 * entries needed for each segment of this scatterlist.
+	 */
+	for (slot = channel, link = 0, sg = data->sg, sg_len = host->sg_len;
+			sg_len-- != 0 && bytes_left;
+			sg = sg_next(sg), slot = host->links[link++]) {
+		u32		buf = sg_dma_address(sg);
+		unsigned	count = sg_dma_len(sg);
+
+		template->link_bcntrld = sg_len
+				? (EDMA_CHAN_SLOT(host->links[link]) << 5)
+				: 0xffff;
+
+		if (count > bytes_left)
+			count = bytes_left;
+		bytes_left -= count;
+
+		if (host->data_dir == DAVINCI_MMC_DATADIR_WRITE)
+			template->src = buf;
+		else
+			template->dst = buf;
+		template->ccnt = count >> shift;
+
+		edma_write_slot(slot, template);
+	}
+
+	if (host->version == MMC_CTLR_VERSION_2)
+		edma_clear_event(channel);
+
+	edma_start(channel);
+}
+
+static int mmc_davinci_start_dma_transfer(struct mmc_davinci_host *host,
+		struct mmc_data *data)
+{
+	int i;
+	int mask = rw_threshold - 1;
+
+	host->sg_len = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len,
+				((data->flags & MMC_DATA_WRITE)
+				? DMA_TO_DEVICE
+				: DMA_FROM_DEVICE));
+
+	/* no individual DMA segment should need a partial FIFO */
+	for (i = 0; i < host->sg_len; i++) {
+		if (sg_dma_len(data->sg + i) & mask) {
+			dma_unmap_sg(mmc_dev(host->mmc),
+					data->sg, data->sg_len,
+					(data->flags & MMC_DATA_WRITE)
+					? DMA_TO_DEVICE
+					: DMA_FROM_DEVICE);
+			return -1;
+		}
+	}
+
+	host->do_dma = 1;
+	mmc_davinci_send_dma_request(host, data);
+
+	return 0;
+}
+
+static void __init_or_module
+davinci_release_dma_channels(struct mmc_davinci_host *host)
+{
+	unsigned	i;
+
+	if (!host->use_dma)
+		return;
+
+	for (i = 0; i < host->n_link; i++)
+		edma_free_slot(host->links[i]);
+
+	edma_free_channel(host->txdma);
+	edma_free_channel(host->rxdma);
+}
+
+static int __init davinci_acquire_dma_channels(struct mmc_davinci_host *host)
+{
+	u32 link_size;
+	int r, i;
+
+	/* Acquire master DMA write channel */
+	r = edma_alloc_channel(host->txdma, mmc_davinci_dma_cb, host,
+			EVENTQ_DEFAULT);
+	if (r < 0) {
+		dev_warn(mmc_dev(host->mmc), "alloc %s channel err %d\n",
+				"tx", r);
+		return r;
+	}
+	mmc_davinci_dma_setup(host, true, &host->tx_template);
+
+	/* Acquire master DMA read channel */
+	r = edma_alloc_channel(host->rxdma, mmc_davinci_dma_cb, host,
+			EVENTQ_DEFAULT);
+	if (r < 0) {
+		dev_warn(mmc_dev(host->mmc), "alloc %s channel err %d\n",
+				"rx", r);
+		goto free_master_write;
+	}
+	mmc_davinci_dma_setup(host, false, &host->rx_template);
+
+	/* Allocate parameter RAM slots, which will later be bound to a
+	 * channel as needed to handle a scatterlist.
+	 */
+	link_size = min_t(unsigned, host->nr_sg, ARRAY_SIZE(host->links));
+	for (i = 0; i < link_size; i++) {
+		r = edma_alloc_slot(EDMA_CTLR(host->txdma), EDMA_SLOT_ANY);
+		if (r < 0) {
+			dev_dbg(mmc_dev(host->mmc), "dma PaRAM alloc --> %d\n",
+				r);
+			break;
+		}
+		host->links[i] = r;
+	}
+	host->n_link = i;
+
+	return 0;
+
+free_master_write:
+	edma_free_channel(host->txdma);
+
+	return r;
+}
+
+/*----------------------------------------------------------------------*/
+
+static void
+mmc_davinci_prepare_data(struct mmc_davinci_host *host, struct mmc_request *req)
+{
+	int fifo_lev = (rw_threshold == 32) ? MMCFIFOCTL_FIFOLEV : 0;
+	int timeout;
+	struct mmc_data *data = req->data;
+
+	if (host->version == MMC_CTLR_VERSION_2)
+		fifo_lev = (rw_threshold == 64) ? MMCFIFOCTL_FIFOLEV : 0;
+
+	host->data = data;
+	if (data == NULL) {
+		host->data_dir = DAVINCI_MMC_DATADIR_NONE;
+		writel(0, host->base + DAVINCI_MMCBLEN);
+		writel(0, host->base + DAVINCI_MMCNBLK);
+		return;
+	}
+
+	dev_dbg(mmc_dev(host->mmc), "%s %s, %d blocks of %d bytes\n",
+		(data->flags & MMC_DATA_STREAM) ? "stream" : "block",
+		(data->flags & MMC_DATA_WRITE) ? "write" : "read",
+		data->blocks, data->blksz);
+	dev_dbg(mmc_dev(host->mmc), "  DTO %d cycles + %d ns\n",
+		data->timeout_clks, data->timeout_ns);
+	timeout = data->timeout_clks +
+		(data->timeout_ns / host->ns_in_one_cycle);
+	if (timeout > 0xffff)
+		timeout = 0xffff;
+
+	writel(timeout, host->base + DAVINCI_MMCTOD);
+	writel(data->blocks, host->base + DAVINCI_MMCNBLK);
+	writel(data->blksz, host->base + DAVINCI_MMCBLEN);
+
+	/* Configure the FIFO */
+	switch (data->flags & MMC_DATA_WRITE) {
+	case MMC_DATA_WRITE:
+		host->data_dir = DAVINCI_MMC_DATADIR_WRITE;
+		writel(fifo_lev | MMCFIFOCTL_FIFODIR_WR | MMCFIFOCTL_FIFORST,
+			host->base + DAVINCI_MMCFIFOCTL);
+		writel(fifo_lev | MMCFIFOCTL_FIFODIR_WR,
+			host->base + DAVINCI_MMCFIFOCTL);
+		break;
+
+	default:
+		host->data_dir = DAVINCI_MMC_DATADIR_READ;
+		writel(fifo_lev | MMCFIFOCTL_FIFODIR_RD | MMCFIFOCTL_FIFORST,
+			host->base + DAVINCI_MMCFIFOCTL);
+		writel(fifo_lev | MMCFIFOCTL_FIFODIR_RD,
+			host->base + DAVINCI_MMCFIFOCTL);
+		break;
+	}
+
+	host->buffer = NULL;
+	host->bytes_left = data->blocks * data->blksz;
+
+	/* For now we try to use DMA whenever we won't need partial FIFO
+	 * reads or writes, either for the whole transfer (as tested here)
+	 * or for any individual scatterlist segment (tested when we call
+	 * start_dma_transfer).
+	 *
+	 * While we *could* change that, unusual block sizes are rarely
+	 * used.  The occasional fallback to PIO should't hurt.
+	 */
+	if (host->use_dma && (host->bytes_left & (rw_threshold - 1)) == 0
+			&& mmc_davinci_start_dma_transfer(host, data) == 0) {
+		/* zero this to ensure we take no PIO paths */
+		host->bytes_left = 0;
+	} else {
+		/* Revert to CPU Copy */
+		host->sg_len = data->sg_len;
+		host->sg = host->data->sg;
+		mmc_davinci_sg_to_buf(host);
+	}
+}
+
+static void mmc_davinci_request(struct mmc_host *mmc, struct mmc_request *req)
+{
+	struct mmc_davinci_host *host = mmc_priv(mmc);
+	unsigned long timeout = jiffies + msecs_to_jiffies(900);
+	u32 mmcst1 = 0;
+
+	/* Card may still be sending BUSY after a previous operation,
+	 * typically some kind of write.  If so, we can't proceed yet.
+	 */
+	while (time_before(jiffies, timeout)) {
+		mmcst1  = readl(host->base + DAVINCI_MMCST1);
+		if (!(mmcst1 & MMCST1_BUSY))
+			break;
+		cpu_relax();
+	}
+	if (mmcst1 & MMCST1_BUSY) {
+		dev_err(mmc_dev(host->mmc), "still BUSY? bad ... \n");
+		req->cmd->error = -ETIMEDOUT;
+		mmc_request_done(mmc, req);
+		return;
+	}
+
+	host->do_dma = 0;
+	mmc_davinci_prepare_data(host, req);
+	mmc_davinci_start_command(host, req->cmd);
+}
+
+static unsigned int calculate_freq_for_card(struct mmc_davinci_host *host,
+	unsigned int mmc_req_freq)
+{
+	unsigned int mmc_freq = 0, mmc_pclk = 0, mmc_push_pull_divisor = 0;
+
+	mmc_pclk = host->mmc_input_clk;
+	if (mmc_req_freq && mmc_pclk > (2 * mmc_req_freq))
+		mmc_push_pull_divisor = ((unsigned int)mmc_pclk
+				/ (2 * mmc_req_freq)) - 1;
+	else
+		mmc_push_pull_divisor = 0;
+
+	mmc_freq = (unsigned int)mmc_pclk
+		/ (2 * (mmc_push_pull_divisor + 1));
+
+	if (mmc_freq > mmc_req_freq)
+		mmc_push_pull_divisor = mmc_push_pull_divisor + 1;
+	/* Convert ns to clock cycles */
+	if (mmc_req_freq <= 400000)
+		host->ns_in_one_cycle = (1000000) / (((mmc_pclk
+				/ (2 * (mmc_push_pull_divisor + 1)))/1000));
+	else
+		host->ns_in_one_cycle = (1000000) / (((mmc_pclk
+				/ (2 * (mmc_push_pull_divisor + 1)))/1000000));
+
+	return mmc_push_pull_divisor;
+}
+
+static void calculate_clk_divider(struct mmc_host *mmc, struct mmc_ios *ios)
+{
+	unsigned int open_drain_freq = 0, mmc_pclk = 0;
+	unsigned int mmc_push_pull_freq = 0;
+	struct mmc_davinci_host *host = mmc_priv(mmc);
+
+	if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) {
+		u32 temp;
+
+		/* Ignoring the init clock value passed for fixing the inter
+		 * operability with different cards.
+		 */
+		open_drain_freq = ((unsigned int)mmc_pclk
+				/ (2 * MMCSD_INIT_CLOCK)) - 1;
+
+		if (open_drain_freq > 0xFF)
+			open_drain_freq = 0xFF;
+
+		temp = readl(host->base + DAVINCI_MMCCLK) & ~MMCCLK_CLKRT_MASK;
+		temp |= open_drain_freq;
+		writel(temp, host->base + DAVINCI_MMCCLK);
+
+		/* Convert ns to clock cycles */
+		host->ns_in_one_cycle = (1000000) / (MMCSD_INIT_CLOCK/1000);
+	} else {
+		u32 temp;
+		mmc_push_pull_freq = calculate_freq_for_card(host, ios->clock);
+
+		if (mmc_push_pull_freq > 0xFF)
+			mmc_push_pull_freq = 0xFF;
+
+		temp = readl(host->base + DAVINCI_MMCCLK) & ~MMCCLK_CLKEN;
+		writel(temp, host->base + DAVINCI_MMCCLK);
+
+		udelay(10);
+
+		temp = readl(host->base + DAVINCI_MMCCLK) & ~MMCCLK_CLKRT_MASK;
+		temp |= mmc_push_pull_freq;
+		writel(temp, host->base + DAVINCI_MMCCLK);
+
+		writel(temp | MMCCLK_CLKEN, host->base + DAVINCI_MMCCLK);
+
+		udelay(10);
+	}
+}
+
+static void mmc_davinci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
+{
+	struct mmc_davinci_host *host = mmc_priv(mmc);
+
+	dev_dbg(mmc_dev(host->mmc),
+		"clock %dHz busmode %d powermode %d Vdd %04x\n",
+		ios->clock, ios->bus_mode, ios->power_mode,
+		ios->vdd);
+
+	switch (ios->bus_width) {
+	case MMC_BUS_WIDTH_8:
+		dev_dbg(mmc_dev(host->mmc), "Enabling 8 bit mode\n");
+		writel((readl(host->base + DAVINCI_MMCCTL) &
+			~MMCCTL_WIDTH_4_BIT) | MMCCTL_WIDTH_8_BIT,
+			host->base + DAVINCI_MMCCTL);
+		break;
+	case MMC_BUS_WIDTH_4:
+		dev_dbg(mmc_dev(host->mmc), "Enabling 4 bit mode\n");
+		if (host->version == MMC_CTLR_VERSION_2)
+			writel((readl(host->base + DAVINCI_MMCCTL) &
+				~MMCCTL_WIDTH_8_BIT) | MMCCTL_WIDTH_4_BIT,
+				host->base + DAVINCI_MMCCTL);
+		else
+			writel(readl(host->base + DAVINCI_MMCCTL) |
+				MMCCTL_WIDTH_4_BIT,
+				host->base + DAVINCI_MMCCTL);
+		break;
+	case MMC_BUS_WIDTH_1:
+		dev_dbg(mmc_dev(host->mmc), "Enabling 1 bit mode\n");
+		if (host->version == MMC_CTLR_VERSION_2)
+			writel(readl(host->base + DAVINCI_MMCCTL) &
+				~(MMCCTL_WIDTH_8_BIT | MMCCTL_WIDTH_4_BIT),
+				host->base + DAVINCI_MMCCTL);
+		else
+			writel(readl(host->base + DAVINCI_MMCCTL) &
+				~MMCCTL_WIDTH_4_BIT,
+				host->base + DAVINCI_MMCCTL);
+		break;
+	}
+
+	calculate_clk_divider(mmc, ios);
+
+	host->bus_mode = ios->bus_mode;
+	if (ios->power_mode == MMC_POWER_UP) {
+		unsigned long timeout = jiffies + msecs_to_jiffies(50);
+		bool lose = true;
+
+		/* Send clock cycles, poll completion */
+		writel(0, host->base + DAVINCI_MMCARGHL);
+		writel(MMCCMD_INITCK, host->base + DAVINCI_MMCCMD);
+		while (time_before(jiffies, timeout)) {
+			u32 tmp = readl(host->base + DAVINCI_MMCST0);
+
+			if (tmp & MMCST0_RSPDNE) {
+				lose = false;
+				break;
+			}
+			cpu_relax();
+		}
+		if (lose)
+			dev_warn(mmc_dev(host->mmc), "powerup timeout\n");
+	}
+
+	/* FIXME on power OFF, reset things ... */
+}
+
+static void
+mmc_davinci_xfer_done(struct mmc_davinci_host *host, struct mmc_data *data)
+{
+	host->data = NULL;
+
+	if (host->do_dma) {
+		davinci_abort_dma(host);
+
+		dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len,
+			     (data->flags & MMC_DATA_WRITE)
+			     ? DMA_TO_DEVICE
+			     : DMA_FROM_DEVICE);
+		host->do_dma = false;
+	}
+	host->data_dir = DAVINCI_MMC_DATADIR_NONE;
+
+	if (!data->stop || (host->cmd && host->cmd->error)) {
+		mmc_request_done(host->mmc, data->mrq);
+		writel(0, host->base + DAVINCI_MMCIM);
+	} else
+		mmc_davinci_start_command(host, data->stop);
+}
+
+static void mmc_davinci_cmd_done(struct mmc_davinci_host *host,
+				 struct mmc_command *cmd)
+{
+	host->cmd = NULL;
+
+	if (cmd->flags & MMC_RSP_PRESENT) {
+		if (cmd->flags & MMC_RSP_136) {
+			/* response type 2 */
+			cmd->resp[3] = readl(host->base + DAVINCI_MMCRSP01);
+			cmd->resp[2] = readl(host->base + DAVINCI_MMCRSP23);
+			cmd->resp[1] = readl(host->base + DAVINCI_MMCRSP45);
+			cmd->resp[0] = readl(host->base + DAVINCI_MMCRSP67);
+		} else {
+			/* response types 1, 1b, 3, 4, 5, 6 */
+			cmd->resp[0] = readl(host->base + DAVINCI_MMCRSP67);
+		}
+	}
+
+	if (host->data == NULL || cmd->error) {
+		if (cmd->error == -ETIMEDOUT)
+			cmd->mrq->cmd->retries = 0;
+		mmc_request_done(host->mmc, cmd->mrq);
+		writel(0, host->base + DAVINCI_MMCIM);
+	}
+}
+
+static inline void mmc_davinci_reset_ctrl(struct mmc_davinci_host *host,
+								int val)
+{
+	u32 temp;
+
+	temp = readl(host->base + DAVINCI_MMCCTL);
+	if (val)	/* reset */
+		temp |= MMCCTL_CMDRST | MMCCTL_DATRST;
+	else		/* enable */
+		temp &= ~(MMCCTL_CMDRST | MMCCTL_DATRST);
+
+	writel(temp, host->base + DAVINCI_MMCCTL);
+	udelay(10);
+}
+
+static void
+davinci_abort_data(struct mmc_davinci_host *host, struct mmc_data *data)
+{
+	mmc_davinci_reset_ctrl(host, 1);
+	mmc_davinci_reset_ctrl(host, 0);
+}
+
+static irqreturn_t mmc_davinci_irq(int irq, void *dev_id)
+{
+	struct mmc_davinci_host *host = (struct mmc_davinci_host *)dev_id;
+	unsigned int status, qstatus;
+	int end_command = 0;
+	int end_transfer = 0;
+	struct mmc_data *data = host->data;
+
+	if (host->cmd == NULL && host->data == NULL) {
+		status = readl(host->base + DAVINCI_MMCST0);
+		dev_dbg(mmc_dev(host->mmc),
+			"Spurious interrupt 0x%04x\n", status);
+		/* Disable the interrupt from mmcsd */
+		writel(0, host->base + DAVINCI_MMCIM);
+		return IRQ_NONE;
+	}
+
+	status = readl(host->base + DAVINCI_MMCST0);
+	qstatus = status;
+
+	/* handle FIFO first when using PIO for data.
+	 * bytes_left will decrease to zero as I/O progress and status will
+	 * read zero over iteration because this controller status
+	 * register(MMCST0) reports any status only once and it is cleared
+	 * by read. So, it is not unbouned loop even in the case of
+	 * non-dma.
+	 */
+	while (host->bytes_left && (status & (MMCST0_DXRDY | MMCST0_DRRDY))) {
+		davinci_fifo_data_trans(host, rw_threshold);
+		status = readl(host->base + DAVINCI_MMCST0);
+		if (!status)
+			break;
+		qstatus |= status;
+	}
+
+	if (qstatus & MMCST0_DATDNE) {
+		/* All blocks sent/received, and CRC checks passed */
+		if (data != NULL) {
+			if ((host->do_dma == 0) && (host->bytes_left > 0)) {
+				/* if datasize < rw_threshold
+				 * no RX ints are generated
+				 */
+				davinci_fifo_data_trans(host, host->bytes_left);
+			}
+			end_transfer = 1;
+			data->bytes_xfered = data->blocks * data->blksz;
+		} else {
+			dev_err(mmc_dev(host->mmc),
+					"DATDNE with no host->data\n");
+		}
+	}
+
+	if (qstatus & MMCST0_TOUTRD) {
+		/* Read data timeout */
+		data->error = -ETIMEDOUT;
+		end_transfer = 1;
+
+		dev_dbg(mmc_dev(host->mmc),
+			"read data timeout, status %x\n",
+			qstatus);
+
+		davinci_abort_data(host, data);
+	}
+
+	if (qstatus & (MMCST0_CRCWR | MMCST0_CRCRD)) {
+		/* Data CRC error */
+		data->error = -EILSEQ;
+		end_transfer = 1;
+
+		/* NOTE:  this controller uses CRCWR to report both CRC
+		 * errors and timeouts (on writes).  MMCDRSP values are
+		 * only weakly documented, but 0x9f was clearly a timeout
+		 * case and the two three-bit patterns in various SD specs
+		 * (101, 010) aren't part of it ...
+		 */
+		if (qstatus & MMCST0_CRCWR) {
+			u32 temp = readb(host->base + DAVINCI_MMCDRSP);
+
+			if (temp == 0x9f)
+				data->error = -ETIMEDOUT;
+		}
+		dev_dbg(mmc_dev(host->mmc), "data %s %s error\n",
+			(qstatus & MMCST0_CRCWR) ? "write" : "read",
+			(data->error == -ETIMEDOUT) ? "timeout" : "CRC");
+
+		davinci_abort_data(host, data);
+	}
+
+	if (qstatus & MMCST0_TOUTRS) {
+		/* Command timeout */
+		if (host->cmd) {
+			dev_dbg(mmc_dev(host->mmc),
+				"CMD%d timeout, status %x\n",
+				host->cmd->opcode, qstatus);
+			host->cmd->error = -ETIMEDOUT;
+			if (data) {
+				end_transfer = 1;
+				davinci_abort_data(host, data);
+			} else
+				end_command = 1;
+		}
+	}
+
+	if (qstatus & MMCST0_CRCRS) {
+		/* Command CRC error */
+		dev_dbg(mmc_dev(host->mmc), "Command CRC error\n");
+		if (host->cmd) {
+			host->cmd->error = -EILSEQ;
+			end_command = 1;
+		}
+	}
+
+	if (qstatus & MMCST0_RSPDNE) {
+		/* End of command phase */
+		end_command = (int) host->cmd;
+	}
+
+	if (end_command)
+		mmc_davinci_cmd_done(host, host->cmd);
+	if (end_transfer)
+		mmc_davinci_xfer_done(host, data);
+	return IRQ_HANDLED;
+}
+
+static int mmc_davinci_get_cd(struct mmc_host *mmc)
+{
+	struct platform_device *pdev = to_platform_device(mmc->parent);
+	struct davinci_mmc_config *config = pdev->dev.platform_data;
+
+	if (!config || !config->get_cd)
+		return -ENOSYS;
+	return config->get_cd(pdev->id);
+}
+
+static int mmc_davinci_get_ro(struct mmc_host *mmc)
+{
+	struct platform_device *pdev = to_platform_device(mmc->parent);
+	struct davinci_mmc_config *config = pdev->dev.platform_data;
+
+	if (!config || !config->get_ro)
+		return -ENOSYS;
+	return config->get_ro(pdev->id);
+}
+
+static struct mmc_host_ops mmc_davinci_ops = {
+	.request	= mmc_davinci_request,
+	.set_ios	= mmc_davinci_set_ios,
+	.get_cd		= mmc_davinci_get_cd,
+	.get_ro		= mmc_davinci_get_ro,
+};
+
+/*----------------------------------------------------------------------*/
+
+#ifdef CONFIG_CPU_FREQ
+static int mmc_davinci_cpufreq_transition(struct notifier_block *nb,
+				     unsigned long val, void *data)
+{
+	struct mmc_davinci_host *host;
+	unsigned int mmc_pclk;
+	struct mmc_host *mmc;
+	unsigned long flags;
+
+	host = container_of(nb, struct mmc_davinci_host, freq_transition);
+	mmc = host->mmc;
+	mmc_pclk = clk_get_rate(host->clk);
+
+	if (val == CPUFREQ_POSTCHANGE) {
+		spin_lock_irqsave(&mmc->lock, flags);
+		host->mmc_input_clk = mmc_pclk;
+		calculate_clk_divider(mmc, &mmc->ios);
+		spin_unlock_irqrestore(&mmc->lock, flags);
+	}
+
+	return 0;
+}
+
+static inline int mmc_davinci_cpufreq_register(struct mmc_davinci_host *host)
+{
+	host->freq_transition.notifier_call = mmc_davinci_cpufreq_transition;
+
+	return cpufreq_register_notifier(&host->freq_transition,
+					 CPUFREQ_TRANSITION_NOTIFIER);
+}
+
+static inline void mmc_davinci_cpufreq_deregister(struct mmc_davinci_host *host)
+{
+	cpufreq_unregister_notifier(&host->freq_transition,
+				    CPUFREQ_TRANSITION_NOTIFIER);
+}
+#else
+static inline int mmc_davinci_cpufreq_register(struct mmc_davinci_host *host)
+{
+	return 0;
+}
+
+static inline void mmc_davinci_cpufreq_deregister(struct mmc_davinci_host *host)
+{
+}
+#endif
+static void __init init_mmcsd_host(struct mmc_davinci_host *host)
+{
+
+	mmc_davinci_reset_ctrl(host, 1);
+
+	writel(0, host->base + DAVINCI_MMCCLK);
+	writel(MMCCLK_CLKEN, host->base + DAVINCI_MMCCLK);
+
+	writel(0x1FFF, host->base + DAVINCI_MMCTOR);
+	writel(0xFFFF, host->base + DAVINCI_MMCTOD);
+
+	mmc_davinci_reset_ctrl(host, 0);
+}
+
+static int __init davinci_mmcsd_probe(struct platform_device *pdev)
+{
+	struct davinci_mmc_config *pdata = pdev->dev.platform_data;
+	struct mmc_davinci_host *host = NULL;
+	struct mmc_host *mmc = NULL;
+	struct resource *r, *mem = NULL;
+	int ret = 0, irq = 0;
+	size_t mem_size;
+
+	/* REVISIT:  when we're fully converted, fail if pdata is NULL */
+
+	ret = -ENODEV;
+	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	irq = platform_get_irq(pdev, 0);
+	if (!r || irq == NO_IRQ)
+		goto out;
+
+	ret = -EBUSY;
+	mem_size = resource_size(r);
+	mem = request_mem_region(r->start, mem_size, pdev->name);
+	if (!mem)
+		goto out;
+
+	ret = -ENOMEM;
+	mmc = mmc_alloc_host(sizeof(struct mmc_davinci_host), &pdev->dev);
+	if (!mmc)
+		goto out;
+
+	host = mmc_priv(mmc);
+	host->mmc = mmc;	/* Important */
+
+	r = platform_get_resource(pdev, IORESOURCE_DMA, 0);
+	if (!r)
+		goto out;
+	host->rxdma = r->start;
+
+	r = platform_get_resource(pdev, IORESOURCE_DMA, 1);
+	if (!r)
+		goto out;
+	host->txdma = r->start;
+
+	host->mem_res = mem;
+	host->base = ioremap(mem->start, mem_size);
+	if (!host->base)
+		goto out;
+
+	ret = -ENXIO;
+	host->clk = clk_get(&pdev->dev, "MMCSDCLK");
+	if (IS_ERR(host->clk)) {
+		ret = PTR_ERR(host->clk);
+		goto out;
+	}
+	clk_enable(host->clk);
+	host->mmc_input_clk = clk_get_rate(host->clk);
+
+	init_mmcsd_host(host);
+
+	if (pdata->nr_sg)
+		host->nr_sg = pdata->nr_sg - 1;
+
+	if (host->nr_sg > MAX_NR_SG || !host->nr_sg)
+		host->nr_sg = MAX_NR_SG;
+
+	host->use_dma = use_dma;
+	host->irq = irq;
+
+	if (host->use_dma && davinci_acquire_dma_channels(host) != 0)
+		host->use_dma = 0;
+
+	/* REVISIT:  someday, support IRQ-driven card detection.  */
+	mmc->caps |= MMC_CAP_NEEDS_POLL;
+	mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY;
+
+	if (pdata && (pdata->wires == 4 || pdata->wires == 0))
+		mmc->caps |= MMC_CAP_4_BIT_DATA;
+
+	if (pdata && (pdata->wires == 8))
+		mmc->caps |= (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA);
+
+	host->version = pdata->version;
+
+	mmc->ops = &mmc_davinci_ops;
+	mmc->f_min = 312500;
+	mmc->f_max = 25000000;
+	if (pdata && pdata->max_freq)
+		mmc->f_max = pdata->max_freq;
+	if (pdata && pdata->caps)
+		mmc->caps |= pdata->caps;
+	mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
+
+	/* With no iommu coalescing pages, each phys_seg is a hw_seg.
+	 * Each hw_seg uses one EDMA parameter RAM slot, always one
+	 * channel and then usually some linked slots.
+	 */
+	mmc->max_hw_segs	= 1 + host->n_link;
+	mmc->max_phys_segs	= mmc->max_hw_segs;
+
+	/* EDMA limit per hw segment (one or two MBytes) */
+	mmc->max_seg_size	= MAX_CCNT * rw_threshold;
+
+	/* MMC/SD controller limits for multiblock requests */
+	mmc->max_blk_size	= 4095;  /* BLEN is 12 bits */
+	mmc->max_blk_count	= 65535; /* NBLK is 16 bits */
+	mmc->max_req_size	= mmc->max_blk_size * mmc->max_blk_count;
+
+	dev_dbg(mmc_dev(host->mmc), "max_phys_segs=%d\n", mmc->max_phys_segs);
+	dev_dbg(mmc_dev(host->mmc), "max_hw_segs=%d\n", mmc->max_hw_segs);
+	dev_dbg(mmc_dev(host->mmc), "max_blk_size=%d\n", mmc->max_blk_size);
+	dev_dbg(mmc_dev(host->mmc), "max_req_size=%d\n", mmc->max_req_size);
+	dev_dbg(mmc_dev(host->mmc), "max_seg_size=%d\n", mmc->max_seg_size);
+
+	platform_set_drvdata(pdev, host);
+
+	ret = mmc_davinci_cpufreq_register(host);
+	if (ret) {
+		dev_err(&pdev->dev, "failed to register cpufreq\n");
+		goto cpu_freq_fail;
+	}
+
+	ret = mmc_add_host(mmc);
+	if (ret < 0)
+		goto out;
+
+	ret = request_irq(irq, mmc_davinci_irq, 0, mmc_hostname(mmc), host);
+	if (ret)
+		goto out;
+
+	rename_region(mem, mmc_hostname(mmc));
+
+	dev_info(mmc_dev(host->mmc), "Using %s, %d-bit mode\n",
+		host->use_dma ? "DMA" : "PIO",
+		(mmc->caps & MMC_CAP_4_BIT_DATA) ? 4 : 1);
+
+	return 0;
+
+out:
+	mmc_davinci_cpufreq_deregister(host);
+cpu_freq_fail:
+	if (host) {
+		davinci_release_dma_channels(host);
+
+		if (host->clk) {
+			clk_disable(host->clk);
+			clk_put(host->clk);
+		}
+
+		if (host->base)
+			iounmap(host->base);
+	}
+
+	if (mmc)
+		mmc_free_host(mmc);
+
+	if (mem)
+		release_resource(mem);
+
+	dev_dbg(&pdev->dev, "probe err %d\n", ret);
+
+	return ret;
+}
+
+static int __exit davinci_mmcsd_remove(struct platform_device *pdev)
+{
+	struct mmc_davinci_host *host = platform_get_drvdata(pdev);
+
+	platform_set_drvdata(pdev, NULL);
+	if (host) {
+		mmc_davinci_cpufreq_deregister(host);
+
+		mmc_remove_host(host->mmc);
+		free_irq(host->irq, host);
+
+		davinci_release_dma_channels(host);
+
+		clk_disable(host->clk);
+		clk_put(host->clk);
+
+		iounmap(host->base);
+
+		release_resource(host->mem_res);
+
+		mmc_free_host(host->mmc);
+	}
+
+	return 0;
+}
+
+#ifdef CONFIG_PM
+static int davinci_mmcsd_suspend(struct device *dev)
+{
+	struct platform_device *pdev = to_platform_device(dev);
+	struct mmc_davinci_host *host = platform_get_drvdata(pdev);
+	int ret;
+
+	mmc_host_enable(host->mmc);
+	ret = mmc_suspend_host(host->mmc);
+	if (!ret) {
+		writel(0, host->base + DAVINCI_MMCIM);
+		mmc_davinci_reset_ctrl(host, 1);
+		mmc_host_disable(host->mmc);
+		clk_disable(host->clk);
+		host->suspended = 1;
+	} else {
+		host->suspended = 0;
+		mmc_host_disable(host->mmc);
+	}
+
+	return ret;
+}
+
+static int davinci_mmcsd_resume(struct device *dev)
+{
+	struct platform_device *pdev = to_platform_device(dev);
+	struct mmc_davinci_host *host = platform_get_drvdata(pdev);
+	int ret;
+
+	if (!host->suspended)
+		return 0;
+
+	clk_enable(host->clk);
+	mmc_host_enable(host->mmc);
+
+	mmc_davinci_reset_ctrl(host, 0);
+	ret = mmc_resume_host(host->mmc);
+	if (!ret)
+		host->suspended = 0;
+
+	return ret;
+}
+
+static const struct dev_pm_ops davinci_mmcsd_pm = {
+	.suspend        = davinci_mmcsd_suspend,
+	.resume         = davinci_mmcsd_resume,
+};
+
+#define davinci_mmcsd_pm_ops (&davinci_mmcsd_pm)
+#else
+#define davinci_mmcsd_pm_ops NULL
+#endif
+
+static struct platform_driver davinci_mmcsd_driver = {
+	.driver		= {
+		.name	= "davinci_mmc",
+		.owner	= THIS_MODULE,
+		.pm	= davinci_mmcsd_pm_ops,
+	},
+	.remove		= __exit_p(davinci_mmcsd_remove),
+};
+
+static int __init davinci_mmcsd_init(void)
+{
+	return platform_driver_probe(&davinci_mmcsd_driver,
+				     davinci_mmcsd_probe);
+}
+module_init(davinci_mmcsd_init);
+
+static void __exit davinci_mmcsd_exit(void)
+{
+	platform_driver_unregister(&davinci_mmcsd_driver);
+}
+module_exit(davinci_mmcsd_exit);
+
+MODULE_AUTHOR("Texas Instruments India");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("MMC/SD driver for Davinci MMC controller");
+
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/host/s3cmci.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/host/s3cmci.c
@@ -1178,7 +1178,7 @@
 	struct s3c24xx_mci_pdata *pdata = host->pdata;
 	int ret;
 
-	if (pdata->gpio_detect == 0)
+	if (pdata->no_detect)
 		return -ENOSYS;
 
 	ret = gpio_get_value(pdata->gpio_detect) ? 0 : 1;
@@ -1361,6 +1361,8 @@
 static struct s3c24xx_mci_pdata s3cmci_def_pdata = {
 	/* This is currently here to avoid a number of if (host->pdata)
 	 * checks. Any zero fields to ensure reaonable defaults are picked. */
+	.no_wprotect = 1,
+	.no_detect = 1,
 };
 
 #ifdef CONFIG_CPU_FREQ
@@ -1880,9 +1882,8 @@
 static int s3cmci_suspend(struct device *dev)
 {
 	struct mmc_host *mmc = platform_get_drvdata(to_platform_device(dev));
-	struct pm_message event = { PM_EVENT_SUSPEND };
 
-	return mmc_suspend_host(mmc, event);
+	return mmc_suspend_host(mmc);
 }
 
 static int s3cmci_resume(struct device *dev)
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/host/Makefile
+++ linux-mvl-dove-2.6.32/drivers/mmc/host/Makefile
@@ -12,6 +12,7 @@
 obj-$(CONFIG_MMC_MXC)		+= mxcmmc.o
 obj-$(CONFIG_MMC_SDHCI)		+= sdhci.o
 obj-$(CONFIG_MMC_SDHCI_PCI)	+= sdhci-pci.o
+obj-$(CONFIG_MMC_SDHCI_MV)	+= sdhci-mv.o
 obj-$(CONFIG_MMC_RICOH_MMC)	+= ricoh_mmc.o
 obj-$(CONFIG_MMC_SDHCI_OF)	+= sdhci-of.o
 obj-$(CONFIG_MMC_SDHCI_PLTFM)	+= sdhci-pltfm.o
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/host/omap_hsmmc.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/host/omap_hsmmc.c
@@ -1918,7 +1918,7 @@
 		}
 		cancel_work_sync(&host->mmc_carddetect_work);
 		mmc_host_enable(host->mmc);
-		ret = mmc_suspend_host(host->mmc, state);
+		ret = mmc_suspend_host(host->mmc);
 		if (ret == 0) {
 			OMAP_HSMMC_WRITE(host->base, ISE, 0);
 			OMAP_HSMMC_WRITE(host->base, IE, 0);
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/host/wbsd.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/host/wbsd.c
@@ -1818,7 +1818,7 @@
 {
 	BUG_ON(host == NULL);
 
-	return mmc_suspend_host(host->mmc, state);
+	return mmc_suspend_host(host->mmc);
 }
 
 static int wbsd_resume(struct wbsd_host *host)
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/host/sdhci-s3c.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/host/sdhci-s3c.c
@@ -372,6 +372,28 @@
 
 static int __devexit sdhci_s3c_remove(struct platform_device *pdev)
 {
+	struct sdhci_host *host =  platform_get_drvdata(pdev);
+	struct sdhci_s3c *sc = sdhci_priv(host);
+	int ptr;
+
+	sdhci_remove_host(host, 1);
+
+	for (ptr = 0; ptr < 3; ptr++) {
+		if (sc->clk_bus[ptr]) {
+			clk_disable(sc->clk_bus[ptr]);
+			clk_put(sc->clk_bus[ptr]);
+		}
+	}
+	clk_disable(sc->clk_io);
+	clk_put(sc->clk_io);
+
+	iounmap(host->ioaddr);
+	release_resource(sc->ioarea);
+	kfree(sc->ioarea);
+
+	sdhci_free_host(host);
+	platform_set_drvdata(pdev, NULL);
+
 	return 0;
 }
 
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/host/at91_mci.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/host/at91_mci.c
@@ -1196,7 +1196,7 @@
 		enable_irq_wake(host->board->det_pin);
 
 	if (mmc)
-		ret = mmc_suspend_host(mmc, state);
+		ret = mmc_suspend_host(mmc);
 
 	return ret;
 }
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/host/msm_sdcc.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/host/msm_sdcc.c
@@ -1216,7 +1216,7 @@
 			disable_irq(host->stat_irq);
 
 		if (mmc->card && mmc->card->type != MMC_TYPE_SDIO)
-			rc = mmc_suspend_host(mmc, state);
+			rc = mmc_suspend_host(mmc);
 		if (!rc) {
 			writel(0, host->base + MMCIMASK0);
 
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/host/sdhci-of-core.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/host/sdhci-of-core.c
@@ -0,0 +1,234 @@
+/*
+ * OpenFirmware bindings for Secure Digital Host Controller Interface.
+ *
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ * Copyright (c) 2009 MontaVista Software, Inc.
+ *
+ * Authors: Xiaobo Xie <X.Xie@freescale.com>
+ *	    Anton Vorontsov <avorontsov@ru.mvista.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <linux/mmc/host.h>
+#include <asm/machdep.h>
+#include "sdhci-of.h"
+#include "sdhci.h"
+
+#ifdef CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
+
+/*
+ * These accessors are designed for big endian hosts doing I/O to
+ * little endian controllers incorporating a 32-bit hardware byte swapper.
+ */
+
+u32 sdhci_be32bs_readl(struct sdhci_host *host, int reg)
+{
+	return in_be32(host->ioaddr + reg);
+}
+
+u16 sdhci_be32bs_readw(struct sdhci_host *host, int reg)
+{
+	return in_be16(host->ioaddr + (reg ^ 0x2));
+}
+
+u8 sdhci_be32bs_readb(struct sdhci_host *host, int reg)
+{
+	return in_8(host->ioaddr + (reg ^ 0x3));
+}
+
+void sdhci_be32bs_writel(struct sdhci_host *host, u32 val, int reg)
+{
+	out_be32(host->ioaddr + reg, val);
+}
+
+void sdhci_be32bs_writew(struct sdhci_host *host, u16 val, int reg)
+{
+	struct sdhci_of_host *of_host = sdhci_priv(host);
+	int base = reg & ~0x3;
+	int shift = (reg & 0x2) * 8;
+
+	switch (reg) {
+	case SDHCI_TRANSFER_MODE:
+		/*
+		 * Postpone this write, we must do it together with a
+		 * command write that is down below.
+		 */
+		of_host->xfer_mode_shadow = val;
+		return;
+	case SDHCI_COMMAND:
+		sdhci_be32bs_writel(host, val << 16 | of_host->xfer_mode_shadow,
+				    SDHCI_TRANSFER_MODE);
+		return;
+	}
+	clrsetbits_be32(host->ioaddr + base, 0xffff << shift, val << shift);
+}
+
+void sdhci_be32bs_writeb(struct sdhci_host *host, u8 val, int reg)
+{
+	int base = reg & ~0x3;
+	int shift = (reg & 0x3) * 8;
+
+	clrsetbits_be32(host->ioaddr + base , 0xff << shift, val << shift);
+}
+#endif /* CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER */
+
+#ifdef CONFIG_PM
+
+static int sdhci_of_suspend(struct of_device *ofdev, pm_message_t state)
+{
+	struct sdhci_host *host = dev_get_drvdata(&ofdev->dev);
+
+	return mmc_suspend_host(host->mmc);
+}
+
+static int sdhci_of_resume(struct of_device *ofdev)
+{
+	struct sdhci_host *host = dev_get_drvdata(&ofdev->dev);
+
+	return mmc_resume_host(host->mmc);
+}
+
+#else
+
+#define sdhci_of_suspend NULL
+#define sdhci_of_resume NULL
+
+#endif
+
+static bool __devinit sdhci_of_wp_inverted(struct device_node *np)
+{
+	if (of_get_property(np, "sdhci,wp-inverted", NULL))
+		return true;
+
+	/* Old device trees don't have the wp-inverted property. */
+	return machine_is(mpc837x_rdb) || machine_is(mpc837x_mds);
+}
+
+static int __devinit sdhci_of_probe(struct of_device *ofdev,
+				 const struct of_device_id *match)
+{
+	struct device_node *np = ofdev->dev.of_node;
+	struct sdhci_of_data *sdhci_of_data = match->data;
+	struct sdhci_host *host;
+	struct sdhci_of_host *of_host;
+	const u32 *clk;
+	int size;
+	int ret;
+
+	if (!of_device_is_available(np))
+		return -ENODEV;
+
+	host = sdhci_alloc_host(&ofdev->dev, sizeof(*of_host));
+	if (IS_ERR(host))
+		return -ENOMEM;
+
+	of_host = sdhci_priv(host);
+	dev_set_drvdata(&ofdev->dev, host);
+
+	host->ioaddr = of_iomap(np, 0);
+	if (!host->ioaddr) {
+		ret = -ENOMEM;
+		goto err_addr_map;
+	}
+
+	host->irq = irq_of_parse_and_map(np, 0);
+	if (!host->irq) {
+		ret = -EINVAL;
+		goto err_no_irq;
+	}
+
+	host->hw_name = dev_name(&ofdev->dev);
+	if (sdhci_of_data) {
+		host->quirks = sdhci_of_data->quirks;
+		host->ops = &sdhci_of_data->ops;
+	}
+
+	if (of_get_property(np, "sdhci,1-bit-only", NULL))
+		host->quirks |= SDHCI_QUIRK_FORCE_1_BIT_DATA;
+
+	if (sdhci_of_wp_inverted(np))
+		host->quirks |= SDHCI_QUIRK_INVERTED_WRITE_PROTECT;
+
+	clk = of_get_property(np, "clock-frequency", &size);
+	if (clk && size == sizeof(*clk) && *clk)
+		of_host->clock = *clk;
+
+	ret = sdhci_add_host(host);
+	if (ret)
+		goto err_add_host;
+
+	return 0;
+
+err_add_host:
+	irq_dispose_mapping(host->irq);
+err_no_irq:
+	iounmap(host->ioaddr);
+err_addr_map:
+	sdhci_free_host(host);
+	return ret;
+}
+
+static int __devexit sdhci_of_remove(struct of_device *ofdev)
+{
+	struct sdhci_host *host = dev_get_drvdata(&ofdev->dev);
+
+	sdhci_remove_host(host, 0);
+	sdhci_free_host(host);
+	irq_dispose_mapping(host->irq);
+	iounmap(host->ioaddr);
+	return 0;
+}
+
+static const struct of_device_id sdhci_of_match[] = {
+#ifdef CONFIG_MMC_SDHCI_OF_ESDHC
+	{ .compatible = "fsl,mpc8379-esdhc", .data = &sdhci_esdhc, },
+	{ .compatible = "fsl,mpc8536-esdhc", .data = &sdhci_esdhc, },
+	{ .compatible = "fsl,esdhc", .data = &sdhci_esdhc, },
+#endif
+#ifdef CONFIG_MMC_SDHCI_OF_HLWD
+	{ .compatible = "nintendo,hollywood-sdhci", .data = &sdhci_hlwd, },
+#endif
+	{ .compatible = "generic-sdhci", },
+	{},
+};
+MODULE_DEVICE_TABLE(of, sdhci_of_match);
+
+static struct of_platform_driver sdhci_of_driver = {
+	.driver = {
+		.name = "sdhci-of",
+		.owner = THIS_MODULE,
+		.of_match_table = sdhci_of_match,
+	},
+	.probe = sdhci_of_probe,
+	.remove = __devexit_p(sdhci_of_remove),
+	.suspend = sdhci_of_suspend,
+	.resume	= sdhci_of_resume,
+};
+
+static int __init sdhci_of_init(void)
+{
+	return of_register_platform_driver(&sdhci_of_driver);
+}
+module_init(sdhci_of_init);
+
+static void __exit sdhci_of_exit(void)
+{
+	of_unregister_platform_driver(&sdhci_of_driver);
+}
+module_exit(sdhci_of_exit);
+
+MODULE_DESCRIPTION("Secure Digital Host Controller Interface OF driver");
+MODULE_AUTHOR("Xiaobo Xie <X.Xie@freescale.com>, "
+	      "Anton Vorontsov <avorontsov@ru.mvista.com>");
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/host/mmci.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/host/mmci.c
@@ -798,7 +798,7 @@
 	if (mmc) {
 		struct mmci_host *host = mmc_priv(mmc);
 
-		ret = mmc_suspend_host(mmc, state);
+		ret = mmc_suspend_host(mmc);
 		if (ret == 0)
 			writel(0, host->base + MMCIMASK0);
 	}
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/host/mxcmmc.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/host/mxcmmc.c
@@ -848,7 +848,7 @@
 	int ret = 0;
 
 	if (mmc)
-		ret = mmc_suspend_host(mmc, state);
+		ret = mmc_suspend_host(mmc);
 
 	return ret;
 }
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/host/atmel-mci.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/host/atmel-mci.c
@@ -530,9 +530,10 @@
 {
 	struct mmc_data			*data = host->data;
 
-	dma_unmap_sg(&host->pdev->dev, data->sg, data->sg_len,
-		     ((data->flags & MMC_DATA_WRITE)
-		      ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
+	if (data)
+		dma_unmap_sg(&host->pdev->dev, data->sg, data->sg_len,
+			     ((data->flags & MMC_DATA_WRITE)
+			      ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
 }
 
 static void atmci_stop_dma(struct atmel_mci *host)
@@ -1037,8 +1038,8 @@
 			"command error: status=0x%08x\n", status);
 
 		if (cmd->data) {
-			host->data = NULL;
 			atmci_stop_dma(host);
+			host->data = NULL;
 			mci_writel(host, IDR, MCI_NOTBUSY
 					| MCI_TXRDY | MCI_RXRDY
 					| ATMCI_DATA_ERROR_FLAGS);
@@ -1229,6 +1230,7 @@
 			} else {
 				data->bytes_xfered = data->blocks * data->blksz;
 				data->error = 0;
+				mci_writel(host, IDR, ATMCI_DATA_ERROR_FLAGS);
 			}
 
 			if (!data->stop) {
@@ -1669,13 +1671,13 @@
 	ret = -ENODEV;
 	if (pdata->slot[0].bus_width) {
 		ret = atmci_init_slot(host, &pdata->slot[0],
-				MCI_SDCSEL_SLOT_A, 0);
+				0, MCI_SDCSEL_SLOT_A);
 		if (!ret)
 			nr_slots++;
 	}
 	if (pdata->slot[1].bus_width) {
 		ret = atmci_init_slot(host, &pdata->slot[1],
-				MCI_SDCSEL_SLOT_B, 1);
+				1, MCI_SDCSEL_SLOT_B);
 		if (!ret)
 			nr_slots++;
 	}
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/host/cb710-mmc.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/host/cb710-mmc.c
@@ -676,7 +676,7 @@
 	struct mmc_host *mmc = cb710_slot_to_mmc(slot);
 	int err;
 
-	err = mmc_suspend_host(mmc, state);
+	err = mmc_suspend_host(mmc);
 	if (err)
 		return err;
 
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/host/sdhci.h
+++ linux-mvl-dove-2.6.32/drivers/mmc/host/sdhci.h
@@ -13,6 +13,7 @@
 #include <linux/compiler.h>
 #include <linux/types.h>
 #include <linux/io.h>
+#include <linux/dove_sdhci.h>
 
 /*
  * Controller registers
@@ -234,10 +235,16 @@
 #define SDHCI_QUIRK_DELAY_AFTER_POWER			(1<<23)
 /* Controller uses SDCLK instead of TMCLK for data timeouts */
 #define SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK		(1<<24)
+/* Dove SDHCI has some issues in detecting IRQ */
+#define SDHCI_QUIRK_DISABLE_IRQ				(1<<25)
+/* Dove SDHCI needs dword access instead word accress */
+#define SDHCI_QUIRK_PIO_USE_WORD_ACCESS			(1<<26)
+/* Dove SDHCI needs dword access instead word accress */
+#define SDHCI_QUIRK_HIGH_SPEED_WA			(1<<27)
 
 	int			irq;		/* Device IRQ */
 	void __iomem *		ioaddr;		/* Mapped address */
-
+	struct resource		*res;
 	const struct sdhci_ops	*ops;		/* Low level hw interface */
 
 	/* Internal data */
@@ -286,10 +293,12 @@
 
 	struct timer_list	timer;		/* Timer for timeouts */
 
+	int			high_speed_wa;	/* high speed WA */
+
+	struct platform_device	*plat_dev;
 	unsigned long		private[0] ____cacheline_aligned;
 };
 
-
 struct sdhci_ops {
 #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
 	u32		(*readl)(struct sdhci_host *host, int reg);
@@ -306,6 +315,8 @@
 	unsigned int	(*get_max_clock)(struct sdhci_host *host);
 	unsigned int	(*get_min_clock)(struct sdhci_host *host);
 	unsigned int	(*get_timeout_clock)(struct sdhci_host *host);
+	void (*gpio_irq_enable)(struct sdhci_host *host);
+	void (*gpio_irq_disable)(struct sdhci_host *host);
 };
 
 #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/host/tifm_sd.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/host/tifm_sd.c
@@ -1032,7 +1032,7 @@
 
 static int tifm_sd_suspend(struct tifm_dev *sock, pm_message_t state)
 {
-	return mmc_suspend_host(tifm_get_drvdata(sock), state);
+	return mmc_suspend_host(tifm_get_drvdata(sock));
 }
 
 static int tifm_sd_resume(struct tifm_dev *sock)
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/host/via-sdmmc.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/host/via-sdmmc.c
@@ -1280,7 +1280,7 @@
 	via_save_pcictrlreg(host);
 	via_save_sdcreg(host);
 
-	ret = mmc_suspend_host(host->mmc, state);
+	ret = mmc_suspend_host(host->mmc);
 
 	pci_save_state(pcidev);
 	pci_enable_wake(pcidev, pci_choose_state(pcidev, state), 0);
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/host/tmio_mmc.h
+++ linux-mvl-dove-2.6.32/drivers/mmc/host/tmio_mmc.h
@@ -102,10 +102,7 @@
 
 #define ack_mmc_irqs(host, i) \
 	do { \
-		u32 mask;\
-		mask  = sd_ctrl_read32((host), CTL_STATUS); \
-		mask &= ~((i) & TMIO_MASK_IRQ); \
-		sd_ctrl_write32((host), CTL_STATUS, mask); \
+		sd_ctrl_write32((host), CTL_STATUS, ~(i)); \
 	} while (0)
 
 
@@ -200,19 +197,17 @@
 	return --host->sg_len;
 }
 
-static inline char *tmio_mmc_kmap_atomic(struct tmio_mmc_host *host,
+static inline char *tmio_mmc_kmap_atomic(struct scatterlist *sg,
 	unsigned long *flags)
 {
-	struct scatterlist *sg = host->sg_ptr;
-
 	local_irq_save(*flags);
 	return kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset;
 }
 
-static inline void tmio_mmc_kunmap_atomic(struct tmio_mmc_host *host,
+static inline void tmio_mmc_kunmap_atomic(void *virt,
 	unsigned long *flags)
 {
-	kunmap_atomic(sg_page(host->sg_ptr), KM_BIO_SRC_IRQ);
+	kunmap_atomic(virt, KM_BIO_SRC_IRQ);
 	local_irq_restore(*flags);
 }
 
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/host/sdricoh_cs.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/host/sdricoh_cs.c
@@ -519,7 +519,7 @@
 {
 	struct mmc_host *mmc = link->priv;
 	dev_dbg(&link->dev, "suspend\n");
-	mmc_suspend_host(mmc, PMSG_SUSPEND);
+	mmc_suspend_host(mmc);
 	return 0;
 }
 
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/host/imxmmc.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/host/imxmmc.c
@@ -1115,7 +1115,7 @@
 	int ret = 0;
 
 	if (mmc)
-		ret = mmc_suspend_host(mmc, state);
+		ret = mmc_suspend_host(mmc);
 
 	return ret;
 }
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/core/core.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/core/core.c
@@ -21,6 +21,7 @@
 #include <linux/leds.h>
 #include <linux/scatterlist.h>
 #include <linux/log2.h>
+#include <linux/wakelock.h>
 #include <linux/regulator/consumer.h>
 
 #include <linux/mmc/card.h>
@@ -38,6 +39,7 @@
 #include "sdio_ops.h"
 
 static struct workqueue_struct *workqueue;
+static struct wake_lock mmc_delayed_work_wake_lock;
 
 /*
  * Enabling software CRCs on the data blocks can be a significant (30%)
@@ -48,11 +50,28 @@
 module_param(use_spi_crc, bool, 0);
 
 /*
+ * We normally treat cards as removed during suspend if they are not
+ * known to be on a non-removable bus, to avoid the risk of writing
+ * back data to a different card after resume.  Allow this to be
+ * overridden if necessary.
+ */
+#ifdef CONFIG_MMC_UNSAFE_RESUME
+int mmc_assume_removable;
+#else
+int mmc_assume_removable = 1;
+#endif
+module_param_named(removable, mmc_assume_removable, bool, 0644);
+MODULE_PARM_DESC(
+	removable,
+	"MMC/SD cards are removable and may be removed during suspend");
+
+/*
  * Internal function. Schedule delayed work in the MMC work queue.
  */
 static int mmc_schedule_delayed_work(struct delayed_work *work,
 				     unsigned long delay)
 {
+	wake_lock(&mmc_delayed_work_wake_lock);
 	return queue_delayed_work(workqueue, work, delay);
 }
 
@@ -1041,6 +1060,17 @@
 		container_of(work, struct mmc_host, detect.work);
 	u32 ocr;
 	int err;
+	unsigned long flags;
+
+	spin_lock_irqsave(&host->lock, flags);
+
+	if (host->rescan_disable) {
+		spin_unlock_irqrestore(&host->lock, flags);
+		return;
+	}
+
+	spin_unlock_irqrestore(&host->lock, flags);
+
 
 	mmc_bus_get(host);
 
@@ -1073,6 +1103,7 @@
 	mmc_claim_host(host);
 
 	mmc_power_up(host);
+	sdio_reset(host);
 	mmc_go_idle(host);
 
 	mmc_send_if_cond(host, host->ocr_avail);
@@ -1100,7 +1131,11 @@
 	/*
 	 * ...and finally MMC.
 	 */
+#ifdef CONFIG_ARCH_DOVE
+	err = mmc_send_op_cond(host, 0x40000, &ocr);
+#else
 	err = mmc_send_op_cond(host, 0, &ocr);
+#endif
 	if (!err) {
 		if (mmc_attach_mmc(host, ocr))
 			mmc_power_off(host);
@@ -1111,6 +1146,9 @@
 	mmc_power_off(host);
 
 out:
+	/* give userspace some time to react */
+	wake_lock_timeout(&mmc_delayed_work_wake_lock, HZ / 2);
+
 	if (host->caps & MMC_CAP_NEEDS_POLL)
 		mmc_schedule_delayed_work(&host->detect, HZ);
 }
@@ -1135,6 +1173,9 @@
 	cancel_delayed_work(&host->detect);
 	mmc_flush_scheduled_work();
 
+	/* clear pm flags now and let card drivers set them as needed */
+	host->pm_flags = 0;
+
 	mmc_bus_get(host);
 	if (host->bus_ops && !host->bus_dead) {
 		if (host->bus_ops->remove)
@@ -1232,9 +1273,8 @@
 /**
  *	mmc_suspend_host - suspend a host
  *	@host: mmc host
- *	@state: suspend mode (PM_SUSPEND_xxx)
  */
-int mmc_suspend_host(struct mmc_host *host, pm_message_t state)
+int mmc_suspend_host(struct mmc_host *host)
 {
 	int err = 0;
 
@@ -1247,22 +1287,10 @@
 	if (host->bus_ops && !host->bus_dead) {
 		if (host->bus_ops->suspend)
 			err = host->bus_ops->suspend(host);
-		if (err == -ENOSYS || !host->bus_ops->resume) {
-			/*
-			 * We simply "remove" the card in this case.
-			 * It will be redetected on resume.
-			 */
-			if (host->bus_ops->remove)
-				host->bus_ops->remove(host);
-			mmc_claim_host(host);
-			mmc_detach_bus(host);
-			mmc_release_host(host);
-			err = 0;
-		}
 	}
 	mmc_bus_put(host);
 
-	if (!err)
+	if (!err && !(host->pm_flags & MMC_PM_KEEP_POWER))
 		mmc_power_off(host);
 
 	return err;
@@ -1280,42 +1308,95 @@
 
 	mmc_bus_get(host);
 	if (host->bus_ops && !host->bus_dead) {
-		mmc_power_up(host);
-		mmc_select_voltage(host, host->ocr);
+		if (!(host->pm_flags & MMC_PM_KEEP_POWER)) {
+			mmc_power_up(host);
+			mmc_select_voltage(host, host->ocr);
+		}
 		BUG_ON(!host->bus_ops->resume);
 		err = host->bus_ops->resume(host);
 		if (err) {
 			printk(KERN_WARNING "%s: error %d during resume "
 					    "(card was removed?)\n",
 					    mmc_hostname(host), err);
-			if (host->bus_ops->remove)
-				host->bus_ops->remove(host);
-			mmc_claim_host(host);
-			mmc_detach_bus(host);
-			mmc_release_host(host);
-			/* no need to bother upper layers */
 			err = 0;
 		}
 	}
 	mmc_bus_put(host);
 
-	/*
-	 * We add a slight delay here so that resume can progress
-	 * in parallel.
-	 */
-	mmc_detect_change(host, 1);
-
 	return err;
 }
-
 EXPORT_SYMBOL(mmc_resume_host);
 
+/* Do the card removal on suspend if card is assumed removeable
+ * Do that in pm notifier while userspace isn't yet frozen, so we will be able
+   to sync the card.
+*/
+int mmc_pm_notify(struct notifier_block *notify_block,
+					unsigned long mode, void *unused)
+{
+	struct mmc_host *host = container_of(
+		notify_block, struct mmc_host, pm_notify);
+	unsigned long flags;
+
+
+	switch (mode) {
+	case PM_HIBERNATION_PREPARE:
+	case PM_SUSPEND_PREPARE:
+
+		spin_lock_irqsave(&host->lock, flags);
+		host->rescan_disable = 1;
+		spin_unlock_irqrestore(&host->lock, flags);
+		cancel_delayed_work_sync(&host->detect);
+
+		if (!host->bus_ops || host->bus_ops->suspend)
+			break;
+
+		mmc_claim_host(host);
+
+		if (host->bus_ops->remove)
+			host->bus_ops->remove(host);
+
+		mmc_detach_bus(host);
+		mmc_release_host(host);
+		host->pm_flags = 0;
+		break;
+
+	case PM_POST_SUSPEND:
+	case PM_POST_HIBERNATION:
+
+		spin_lock_irqsave(&host->lock, flags);
+		host->rescan_disable = 0;
+		spin_unlock_irqrestore(&host->lock, flags);
+		mmc_detect_change(host, 0);
+
+	}
+
+	return 0;
+}
+#endif
+
+#ifdef CONFIG_MMC_EMBEDDED_SDIO
+void mmc_set_embedded_sdio_data(struct mmc_host *host,
+				struct sdio_cis *cis,
+				struct sdio_cccr *cccr,
+				struct sdio_embedded_func *funcs,
+				int num_funcs)
+{
+	host->embedded_sdio_data.cis = cis;
+	host->embedded_sdio_data.cccr = cccr;
+	host->embedded_sdio_data.funcs = funcs;
+	host->embedded_sdio_data.num_funcs = num_funcs;
+}
+
+EXPORT_SYMBOL(mmc_set_embedded_sdio_data);
 #endif
 
 static int __init mmc_init(void)
 {
 	int ret;
 
+	wake_lock_init(&mmc_delayed_work_wake_lock, WAKE_LOCK_SUSPEND, "mmc_delayed_work");
+
 	workqueue = create_singlethread_workqueue("kmmcd");
 	if (!workqueue)
 		return -ENOMEM;
@@ -1350,6 +1431,7 @@
 	mmc_unregister_host_class();
 	mmc_unregister_bus();
 	destroy_workqueue(workqueue);
+	wake_lock_destroy(&mmc_delayed_work_wake_lock);
 }
 
 subsys_initcall(mmc_init);
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/core/mmc_ops.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/core/mmc_ops.c
@@ -19,6 +19,39 @@
 #include "core.h"
 #include "mmc_ops.h"
 
+int mmc_force_reset (struct mmc_host *host)
+
+{
+        struct mmc_command cmd;
+        int err = 0;
+
+        BUG_ON(!host);
+
+#ifndef SD_IO_RW_DIRECT
+#define SD_IO_RW_DIRECT 52
+#endif
+
+#ifndef SDIO_CCCR_ABORT
+#define SDIO_CCCR_ABORT  0x06
+#endif
+
+#ifndef PMR_WRITE
+#define PMR_WRITE 1
+#endif
+
+       memset(&cmd, 0, sizeof(struct mmc_command));
+       cmd.opcode = SD_IO_RW_DIRECT;
+       cmd.arg = PMR_WRITE ? 0x80000000 : 0x00000000;
+       cmd.arg |= 0<<28;
+       cmd.arg |= 0x00000000;
+       cmd.arg |= SDIO_CCCR_ABORT << 9;
+       cmd.arg |= (1<<3) ;
+       cmd.flags = MMC_RSP_NONE;
+       err = mmc_wait_for_cmd(host, &cmd, 0);
+       return err;
+}
+
+
 static int _mmc_select_card(struct mmc_host *host, struct mmc_card *card)
 {
 	int err;
@@ -147,6 +180,11 @@
 
 	for (i = 100; i; i--) {
 		err = mmc_wait_for_cmd(host, &cmd, 0);
+		if (err == -ETIMEDOUT) {
+			mmc_delay(10);
+			continue;
+		}
+
 		if (err)
 			break;
 
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/core/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/mmc/core/Kconfig
@@ -3,7 +3,7 @@
 #
 
 config MMC_UNSAFE_RESUME
-	bool "Allow unsafe resume (DANGEROUS)"
+	bool "Assume MMC/SD cards are non-removable (DANGEROUS)"
 	help
 	  If you say Y here, the MMC layer will assume that all cards
 	  stayed in their respective slots during the suspend. The
@@ -14,3 +14,23 @@
 	  This option is usually just for embedded systems which use
 	  a MMC/SD card for rootfs. Most people should say N here.
 
+
+	  This option sets a default which can be overridden by the
+	  module parameter "removable=0" or "removable=1".
+
+config MMC_EMBEDDED_SDIO
+	boolean "MMC embedded SDIO device support (EXPERIMENTAL)"
+	depends on EXPERIMENTAL
+	help
+	  If you say Y here, support will be added for embedded SDIO
+	  devices which do not contain the necessary enumeration
+	  support in hardware to be properly detected.
+
+config MMC_PARANOID_SD_INIT
+	bool "Enable paranoid SD card initialization (EXPERIMENTAL)"
+	depends on EXPERIMENTAL
+	help
+	  If you say Y here, the MMC layer will be extra paranoid
+	  about re-trying SD init requests. This can be a useful
+	  work-around for buggy controllers and hardware. Enable
+	  if you are experiencing issues with SD detection.
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/core/sdio.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/core/sdio.c
@@ -24,6 +24,10 @@
 #include "sdio_ops.h"
 #include "sdio_cis.h"
 
+#ifdef CONFIG_MMC_EMBEDDED_SDIO
+#include <linux/mmc/sdio_ids.h>
+#endif
+
 static int sdio_read_fbr(struct sdio_func *func)
 {
 	int ret;
@@ -188,6 +192,40 @@
 }
 
 /*
+ * Devices that remain active during a system suspend are
+ * put back into 1-bit mode.
+ */
+static int sdio_disable_wide(struct mmc_card *card)
+{
+	int ret;
+	u8 ctrl;
+
+	if (!(card->host->caps & MMC_CAP_4_BIT_DATA))
+		return 0;
+
+	if (card->cccr.low_speed && !card->cccr.wide_bus)
+		return 0;
+
+	ret = mmc_io_rw_direct(card, 0, 0, SDIO_CCCR_IF, 0, &ctrl);
+	if (ret)
+		return ret;
+
+	if (!(ctrl & SDIO_BUS_WIDTH_4BIT))
+		return 0;
+
+	ctrl &= ~SDIO_BUS_WIDTH_4BIT;
+	ctrl |= SDIO_BUS_ASYNC_INT;
+
+	ret = mmc_io_rw_direct(card, 1, 0, SDIO_CCCR_IF, ctrl, NULL);
+	if (ret)
+		return ret;
+
+	mmc_set_bus_width(card->host, MMC_BUS_WIDTH_1);
+
+	return 0;
+}
+
+/*
  * Test if the card supports high-speed mode and, if so, switch to it.
  */
 static int sdio_enable_hs(struct mmc_card *card)
@@ -224,7 +262,7 @@
  * we're trying to reinitialise.
  */
 static int mmc_sdio_init_card(struct mmc_host *host, u32 ocr,
-			      struct mmc_card *oldcard)
+			      struct mmc_card *oldcard, int powered_resume)
 {
 	struct mmc_card *card;
 	int err;
@@ -235,9 +273,11 @@
 	/*
 	 * Inform the card of the voltage
 	 */
-	err = mmc_send_io_op_cond(host, host->ocr, &ocr);
-	if (err)
-		goto err;
+	if (!powered_resume) {
+		err = mmc_send_io_op_cond(host, host->ocr, &ocr);
+		if (err)
+			goto err;
+	}
 
 	/*
 	 * For SPI, enable CRC as appropriate.
@@ -262,18 +302,26 @@
 	/*
 	 * For native busses:  set card RCA and quit open drain mode.
 	 */
-	if (!mmc_host_is_spi(host)) {
+	if (!powered_resume && !mmc_host_is_spi(host)) {
 		err = mmc_send_relative_addr(host, &card->rca);
 		if (err)
 			goto remove;
 
+		/*
+		 * Update oldcard with the new RCA received from the SDIO
+		 * device -- we're doing this so that it's updated in the
+		 * "card" struct when oldcard overwrites that later.
+		 */
+		if (oldcard)
+			oldcard->rca = card->rca;
+
 		mmc_set_bus_mode(host, MMC_BUSMODE_PUSHPULL);
 	}
 
 	/*
 	 * Select card, as all following commands rely on that.
 	 */
-	if (!mmc_host_is_spi(host)) {
+	if (!powered_resume && !mmc_host_is_spi(host)) {
 		err = mmc_select_card(card);
 		if (err)
 			goto remove;
@@ -282,16 +330,32 @@
 	/*
 	 * Read the common registers.
 	 */
+#ifdef CONFIG_MMC_EMBEDDED_SDIO
+	if (host->embedded_sdio_data.cccr)
+		memcpy(&card->cccr, host->embedded_sdio_data.cccr, sizeof(struct sdio_cccr));
+	else {
+#endif
 	err = sdio_read_cccr(card);
 	if (err)
 		goto remove;
+#ifdef CONFIG_MMC_EMBEDDED_SDIO
+	}
+#endif
 
 	/*
 	 * Read the common CIS tuples.
 	 */
+#ifdef CONFIG_MMC_EMBEDDED_SDIO
+	if (host->embedded_sdio_data.cis)
+		memcpy(&card->cis, host->embedded_sdio_data.cis, sizeof(struct sdio_cis));
+	else {
+#endif
 	err = sdio_read_common_cis(card);
 	if (err)
 		goto remove;
+#ifdef CONFIG_MMC_EMBEDDED_SDIO
+	}
+#endif
 
 	if (oldcard) {
 		int same = (card->cis.vendor == oldcard->cis.vendor &&
@@ -425,6 +489,12 @@
 		}
 	}
 
+	if (!err && host->pm_flags & MMC_PM_KEEP_POWER) {
+		mmc_claim_host(host);
+		sdio_disable_wide(host->card);
+		mmc_release_host(host);
+	}
+
 	return err;
 }
 
@@ -437,7 +507,13 @@
 
 	/* Basic card reinitialization. */
 	mmc_claim_host(host);
-	err = mmc_sdio_init_card(host, host->ocr, host->card);
+	err = mmc_sdio_init_card(host, host->ocr, host->card,
+				 (host->pm_flags & MMC_PM_KEEP_POWER));
+	if (!err)
+		/* We may have switched to 1-bit mode during suspend. */
+		err = sdio_enable_wide(host->card);
+	if (!err && host->sdio_irqs)
+		mmc_signal_sdio_irq(host);
 	mmc_release_host(host);
 
 	/*
@@ -507,7 +583,7 @@
 	/*
 	 * Detect and init the card.
 	 */
-	err = mmc_sdio_init_card(host, host->ocr, NULL);
+	err = mmc_sdio_init_card(host, host->ocr, NULL, 0);
 	if (err)
 		goto err;
 	card = host->card;
@@ -516,22 +592,136 @@
 	 * The number of functions on the card is encoded inside
 	 * the ocr.
 	 */
-	card->sdio_funcs = funcs = (ocr & 0x70000000) >> 28;
+	funcs = (ocr & 0x70000000) >> 28;
+	card->sdio_funcs = 0;
+
+#ifdef CONFIG_MMC_EMBEDDED_SDIO
+	if (host->embedded_sdio_data.funcs)
+		funcs = host->embedded_sdio_data.num_funcs;
+#endif
+
+#if 0
+	/* The following code has been moved into mmc_sdio_init_card func. */
+
+	/*
+	 * Allocate card structure.
+	 */
+	card = mmc_alloc_card(host, NULL);
+	if (IS_ERR(card)) {
+		err = PTR_ERR(card);
+		goto err;
+	}
+
+	card->type = MMC_TYPE_SDIO;
+	card->sdio_funcs = funcs;
+
+	host->card = card;
+
+	/*
+	 * For native busses:  set card RCA and quit open drain mode.
+	 */
+	if (!mmc_host_is_spi(host)) {
+		err = mmc_send_relative_addr(host, &card->rca);
+		if (err)
+			goto remove;
+
+		mmc_set_bus_mode(host, MMC_BUSMODE_PUSHPULL);
+	}
+
+	/*
+	 * Select card, as all following commands rely on that.
+	 */
+	if (!mmc_host_is_spi(host)) {
+		err = mmc_select_card(card);
+		if (err)
+			goto remove;
+	}
 
 	/*
 	 * If needed, disconnect card detection pull-up resistor.
 	 */
-	err = sdio_disable_cd(card);
+
+#ifdef CONFIG_MMC_EMBEDDED_SDIO
+	if (host->embedded_sdio_data.cccr)
+		memcpy(&card->cccr, host->embedded_sdio_data.cccr, sizeof(struct sdio_cccr));
+	else {
+#endif
+		err = sdio_read_cccr(card);
+		if (err)
+			goto remove;
+#ifdef CONFIG_MMC_EMBEDDED_SDIO
+	}
+#endif
+
+#ifdef CONFIG_MMC_EMBEDDED_SDIO
+	if (host->embedded_sdio_data.cis)
+		memcpy(&card->cis, host->embedded_sdio_data.cis, sizeof(struct sdio_cis));
+	else {
+#endif
+		/*
+		 * Read the common CIS tuples.
+		 */
+		err = sdio_read_common_cis(card);
+		if (err)
+			goto remove;
+#ifdef CONFIG_MMC_EMBEDDED_SDIO
+	}
+#endif
+	/*
+	 * Switch to high-speed (if supported).
+	 */
+	err = sdio_enable_hs(card);
 	if (err)
 		goto remove;
 
 	/*
+	 * Change to the card's maximum speed.
+	 */
+	if (mmc_card_highspeed(card)) {
+		/*
+		 * The SDIO specification doesn't mention how
+		 * the CIS transfer speed register relates to
+		 * high-speed, but it seems that 50 MHz is
+		 * mandatory.
+		 */
+		mmc_set_clock(host, 50000000);
+	} else {
+		mmc_set_clock(host, card->cis.max_dtr);
+	}
+
+	/*
+	 * Switch to wider bus (if supported).
+	 */
+	err = sdio_enable_wide(card);
+	if (err)
+		goto remove;
+
+#endif
+	/*
 	 * Initialize (but don't add) all present functions.
 	 */
-	for (i = 0;i < funcs;i++) {
-		err = sdio_init_func(host->card, i + 1);
-		if (err)
-			goto remove;
+	for (i = 0; i < funcs; i++, card->sdio_funcs++) {
+#ifdef CONFIG_MMC_EMBEDDED_SDIO
+		if (host->embedded_sdio_data.funcs) {
+			struct sdio_func *tmp;
+
+			tmp = sdio_alloc_func(host->card);
+			if (IS_ERR(tmp))
+				goto remove;
+			tmp->num = (i + 1);
+			card->sdio_func[i] = tmp;
+			tmp->class = host->embedded_sdio_data.funcs[i].f_class;
+			tmp->max_blksize = host->embedded_sdio_data.funcs[i].f_maxblksize;
+			tmp->vendor = card->cis.vendor;
+			tmp->device = card->cis.device;
+		} else {
+#endif
+			err = sdio_init_func(host->card, i + 1);
+			if (err)
+				goto remove;
+#ifdef CONFIG_MMC_EMBEDDED_SDIO
+		}
+#endif
 	}
 
 	mmc_release_host(host);
@@ -573,3 +763,60 @@
 	return err;
 }
 
+int sdio_reset_comm(struct mmc_card *card)
+{
+	struct mmc_host *host = card->host;
+	u32 ocr;
+	int err;
+
+	printk("%s():\n", __func__);
+	mmc_go_idle(host);
+
+	mmc_set_clock(host, host->f_min);
+
+	err = mmc_send_io_op_cond(host, 0, &ocr);
+	if (err)
+		goto err;
+
+	host->ocr = mmc_select_voltage(host, ocr);
+	if (!host->ocr) {
+		err = -EINVAL;
+		goto err;
+	}
+
+	err = mmc_send_io_op_cond(host, host->ocr, &ocr);
+	if (err)
+		goto err;
+
+	if (mmc_host_is_spi(host)) {
+		err = mmc_spi_set_crc(host, use_spi_crc);
+		if (err)
+		goto err;
+	}
+
+	if (!mmc_host_is_spi(host)) {
+		err = mmc_send_relative_addr(host, &card->rca);
+		if (err)
+			goto err;
+		mmc_set_bus_mode(host, MMC_BUSMODE_PUSHPULL);
+	}
+	if (!mmc_host_is_spi(host)) {
+		err = mmc_select_card(card);
+		if (err)
+			goto err;
+	}
+
+	mmc_set_clock(host, card->cis.max_dtr);
+	err = sdio_enable_wide(card);
+	if (err)
+		goto err;
+
+	return 0;
+ err:
+	printk("%s: Error resetting SDIO communications (%d)\n",
+	       mmc_hostname(host), err);
+	return err;
+}
+EXPORT_SYMBOL(sdio_reset_comm);
+
+
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/core/sdio_ops.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/core/sdio_ops.c
@@ -67,13 +67,13 @@
 	return err;
 }
 
-int mmc_io_rw_direct(struct mmc_card *card, int write, unsigned fn,
-	unsigned addr, u8 in, u8* out)
+static int mmc_io_rw_direct_host(struct mmc_host *host, int write, unsigned fn,
+	unsigned addr, u8 in, u8 *out)
 {
 	struct mmc_command cmd;
 	int err;
 
-	BUG_ON(!card);
+	BUG_ON(!host);
 	BUG_ON(fn > 7);
 
 	/* sanity check */
@@ -90,11 +90,11 @@
 	cmd.arg |= in;
 	cmd.flags = MMC_RSP_SPI_R5 | MMC_RSP_R5 | MMC_CMD_AC;
 
-	err = mmc_wait_for_cmd(card->host, &cmd, 0);
+	err = mmc_wait_for_cmd(host, &cmd, 0);
 	if (err)
 		return err;
 
-	if (mmc_host_is_spi(card->host)) {
+	if (mmc_host_is_spi(host)) {
 		/* host driver already reported errors */
 	} else {
 		if (cmd.resp[0] & R5_ERROR)
@@ -106,7 +106,7 @@
 	}
 
 	if (out) {
-		if (mmc_host_is_spi(card->host))
+		if (mmc_host_is_spi(host))
 			*out = (cmd.resp[0] >> 8) & 0xFF;
 		else
 			*out = cmd.resp[0] & 0xFF;
@@ -115,6 +115,13 @@
 	return 0;
 }
 
+int mmc_io_rw_direct(struct mmc_card *card, int write, unsigned fn,
+	unsigned addr, u8 in, u8 *out)
+{
+	BUG_ON(!card);
+	return mmc_io_rw_direct_host(card->host, write, fn, addr, in, out);
+}
+
 int mmc_io_rw_extended(struct mmc_card *card, int write, unsigned fn,
 	unsigned addr, int incr_addr, u8 *buf, unsigned blocks, unsigned blksz)
 {
@@ -182,3 +189,20 @@
 	return 0;
 }
 
+int sdio_reset(struct mmc_host *host)
+{
+	int ret;
+	u8 abort;
+
+	/* SDIO Simplified Specification V2.0, 4.4 Reset for SDIO */
+
+	ret = mmc_io_rw_direct_host(host, 0, 0, SDIO_CCCR_ABORT, 0, &abort);
+	if (ret)
+		abort = 0x08;
+	else
+		abort |= 0x08;
+
+	ret = mmc_io_rw_direct_host(host, 1, 0, SDIO_CCCR_ABORT, abort, NULL);
+	return ret;
+}
+
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/core/mmc.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/core/mmc.c
@@ -121,7 +121,7 @@
 	 * v1.2 has extra information in bits 15, 11 and 10.
 	 */
 	csd_struct = UNSTUFF_BITS(resp, 126, 2);
-	if (csd_struct != 1 && csd_struct != 2) {
+	if (csd_struct != 1 && csd_struct != 2 && csd_struct != 3) {
 		printk(KERN_ERR "%s: unrecognised CSD structure version %d\n",
 			mmc_hostname(card->host), csd_struct);
 		return -EINVAL;
@@ -207,7 +207,7 @@
 	}
 
 	card->ext_csd.rev = ext_csd[EXT_CSD_REV];
-	if (card->ext_csd.rev > 3) {
+	if (card->ext_csd.rev > 5) {
 		printk(KERN_ERR "%s: unrecognised EXT_CSD structure "
 			"version %d\n", mmc_hostname(card->host),
 			card->ext_csd.rev);
@@ -225,7 +225,7 @@
 			mmc_card_set_blockaddr(card);
 	}
 
-	switch (ext_csd[EXT_CSD_CARD_TYPE]) {
+	switch (ext_csd[EXT_CSD_CARD_TYPE] & EXT_CSD_CARD_TYPE_MASK) {
 	case EXT_CSD_CARD_TYPE_52 | EXT_CSD_CARD_TYPE_26:
 		card->ext_csd.hs_max_dtr = 52000000;
 		break;
@@ -237,7 +237,6 @@
 		printk(KERN_WARNING "%s: card is mmc v4 but doesn't "
 			"support any high-speed modes.\n",
 			mmc_hostname(card->host));
-		goto out;
 	}
 
 	if (card->ext_csd.rev >= 3) {
@@ -602,25 +601,6 @@
 	return err;
 }
 
-#ifdef CONFIG_MMC_UNSAFE_RESUME
-
-static const struct mmc_bus_ops mmc_ops = {
-	.awake = mmc_awake,
-	.sleep = mmc_sleep,
-	.remove = mmc_remove,
-	.detect = mmc_detect,
-	.suspend = mmc_suspend,
-	.resume = mmc_resume,
-	.power_restore = mmc_power_restore,
-};
-
-static void mmc_attach_bus_ops(struct mmc_host *host)
-{
-	mmc_attach_bus(host, &mmc_ops);
-}
-
-#else
-
 static const struct mmc_bus_ops mmc_ops = {
 	.awake = mmc_awake,
 	.sleep = mmc_sleep,
@@ -645,15 +625,13 @@
 {
 	const struct mmc_bus_ops *bus_ops;
 
-	if (host->caps & MMC_CAP_NONREMOVABLE)
+	if (host->caps & MMC_CAP_NONREMOVABLE || !mmc_assume_removable)
 		bus_ops = &mmc_ops_unsafe;
 	else
 		bus_ops = &mmc_ops;
 	mmc_attach_bus(host, bus_ops);
 }
 
-#endif
-
 /*
  * Starting point for MMC card init.
  */
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/core/sdio_ops.h
+++ linux-mvl-dove-2.6.32/drivers/mmc/core/sdio_ops.h
@@ -17,6 +17,7 @@
 	unsigned addr, u8 in, u8* out);
 int mmc_io_rw_extended(struct mmc_card *card, int write, unsigned fn,
 	unsigned addr, int incr_addr, u8 *buf, unsigned blocks, unsigned blksz);
+int sdio_reset(struct mmc_host *host);
 
 #endif
 
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/core/sdio_io.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/core/sdio_io.c
@@ -189,7 +189,12 @@
 {
 	unsigned mval =	min(func->card->host->max_seg_size,
 			    func->card->host->max_blk_size);
-	mval = min(mval, func->max_blksize);
+
+	if (mmc_blksz_for_byte_mode(func->card))
+		mval = min(mval, func->cur_blksize);
+	else
+		mval = min(mval, func->max_blksize);
+
 	return min(mval, 512u); /* maximum size for byte mode */
 }
 
@@ -378,6 +383,39 @@
 EXPORT_SYMBOL_GPL(sdio_readb);
 
 /**
+ *	sdio_readb_ext - read a single byte from a SDIO function
+ *	@func: SDIO function to access
+ *	@addr: address to read
+ *	@err_ret: optional status value from transfer
+ *	@in: value to add to argument
+ *
+ *	Reads a single byte from the address space of a given SDIO
+ *	function. If there is a problem reading the address, 0xff
+ *	is returned and @err_ret will contain the error code.
+ */
+unsigned char sdio_readb_ext(struct sdio_func *func, unsigned int addr,
+	int *err_ret, unsigned in)
+{
+	int ret;
+	unsigned char val;
+
+	BUG_ON(!func);
+
+	if (err_ret)
+		*err_ret = 0;
+
+	ret = mmc_io_rw_direct(func->card, 0, func->num, addr, (u8)in, &val);
+	if (ret) {
+		if (err_ret)
+			*err_ret = ret;
+		return 0xFF;
+	}
+
+	return val;
+}
+EXPORT_SYMBOL_GPL(sdio_readb_ext);
+
+/**
  *	sdio_writeb - write a single byte to a SDIO function
  *	@func: SDIO function to access
  *	@b: byte to write
@@ -401,6 +439,36 @@
 EXPORT_SYMBOL_GPL(sdio_writeb);
 
 /**
+ *	sdio_writeb_readb - write and read a byte from SDIO function
+ *	@func: SDIO function to access
+ *	@write_byte: byte to write
+ *	@addr: address to write to
+ *	@err_ret: optional status value from transfer
+ *
+ *	Performs a RAW (Read after Write) operation as defined by SDIO spec -
+ *	single byte is written to address space of a given SDIO function and
+ *	response is read back from the same address, both using single request.
+ *	If there is a problem with the operation, 0xff is returned and
+ *	@err_ret will contain the error code.
+ */
+u8 sdio_writeb_readb(struct sdio_func *func, u8 write_byte,
+	unsigned int addr, int *err_ret)
+{
+	int ret;
+	u8 val;
+
+	ret = mmc_io_rw_direct(func->card, 1, func->num, addr,
+			write_byte, &val);
+	if (err_ret)
+		*err_ret = ret;
+	if (ret)
+		val = 0xff;
+
+	return val;
+}
+EXPORT_SYMBOL_GPL(sdio_writeb_readb);
+
+/**
  *	sdio_memcpy_fromio - read a chunk of memory from a SDIO function
  *	@func: SDIO function to access
  *	@dst: buffer to store the data
@@ -635,3 +703,52 @@
 		*err_ret = ret;
 }
 EXPORT_SYMBOL_GPL(sdio_f0_writeb);
+
+/**
+ *	sdio_get_host_pm_caps - get host power management capabilities
+ *	@func: SDIO function attached to host
+ *
+ *	Returns a capability bitmask corresponding to power management
+ *	features supported by the host controller that the card function
+ *	might rely upon during a system suspend.  The host doesn't need
+ *	to be claimed, nor the function active, for this information to be
+ *	obtained.
+ */
+mmc_pm_flag_t sdio_get_host_pm_caps(struct sdio_func *func)
+{
+	BUG_ON(!func);
+	BUG_ON(!func->card);
+
+	return func->card->host->pm_caps;
+}
+EXPORT_SYMBOL_GPL(sdio_get_host_pm_caps);
+
+/**
+ *	sdio_set_host_pm_flags - set wanted host power management capabilities
+ *	@func: SDIO function attached to host
+ *
+ *	Set a capability bitmask corresponding to wanted host controller
+ *	power management features for the upcoming suspend state.
+ *	This must be called, if needed, each time the suspend method of
+ *	the function driver is called, and must contain only bits that
+ *	were returned by sdio_get_host_pm_caps().
+ *	The host doesn't need to be claimed, nor the function active,
+ *	for this information to be set.
+ */
+int sdio_set_host_pm_flags(struct sdio_func *func, mmc_pm_flag_t flags)
+{
+	struct mmc_host *host;
+
+	BUG_ON(!func);
+	BUG_ON(!func->card);
+
+	host = func->card->host;
+
+	if (flags & ~host->pm_caps)
+		return -EINVAL;
+
+	/* function suspend methods are serialized, hence no lock needed */
+	host->pm_flags |= flags;
+	return 0;
+}
+EXPORT_SYMBOL_GPL(sdio_set_host_pm_flags);
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/core/core.h
+++ linux-mvl-dove-2.6.32/drivers/mmc/core/core.h
@@ -54,7 +54,9 @@
 int mmc_attach_sd(struct mmc_host *host, u32 ocr);
 int mmc_attach_sdio(struct mmc_host *host, u32 ocr);
 
+/* Module parameters */
 extern int use_spi_crc;
+extern int mmc_assume_removable;
 
 /* Debugfs information for hosts and cards */
 void mmc_add_host_debugfs(struct mmc_host *host);
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/core/sdio_bus.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/core/sdio_bus.c
@@ -20,6 +20,13 @@
 #include "sdio_cis.h"
 #include "sdio_bus.h"
 
+#ifdef CONFIG_MMC_EMBEDDED_SDIO
+#include <linux/mmc/host.h>
+#endif
+
+#define dev_to_sdio_func(d)	container_of(d, struct sdio_func, dev)
+#define to_sdio_driver(d)      container_of(d, struct sdio_driver, drv)
+
 /* show configuration fields */
 #define sdio_config_attr(field, format_string)				\
 static ssize_t								\
@@ -199,7 +206,14 @@
 {
 	struct sdio_func *func = dev_to_sdio_func(dev);
 
-	sdio_free_func_cis(func);
+#ifdef CONFIG_MMC_EMBEDDED_SDIO
+	/*
+	 * If this device is embedded then we never allocated
+	 * cis tables for this func
+	 */
+	if (!func->card->host->embedded_sdio_data.funcs)
+#endif
+		sdio_free_func_cis(func);
 
 	if (func->info)
 		kfree(func->info);
@@ -248,12 +262,15 @@
 /*
  * Unregister a SDIO function with the driver model, and
  * (eventually) free it.
+ * This function can be called through error paths where sdio_add_func() was
+ * never executed (because a failure occurred at an earlier point).
  */
 void sdio_remove_func(struct sdio_func *func)
 {
-	if (sdio_func_present(func))
-		device_del(&func->dev);
+	if (!sdio_func_present(func))
+		return;
 
+	device_del(&func->dev);
 	put_device(&func->dev);
 }
 
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/core/mmc_ops.h
+++ linux-mvl-dove-2.6.32/drivers/mmc/core/mmc_ops.h
@@ -12,6 +12,7 @@
 #ifndef _MMC_MMC_OPS_H
 #define _MMC_MMC_OPS_H
 
+int mmc_force_reset (struct mmc_host *host);
 int mmc_select_card(struct mmc_card *card);
 int mmc_deselect_cards(struct mmc_host *host);
 int mmc_go_idle(struct mmc_host *host);
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/core/sdio_cis.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/core/sdio_cis.c
@@ -97,26 +97,56 @@
 static const unsigned int speed_unit[8] =
 	{ 10000, 100000, 1000000, 10000000, 0, 0, 0, 0 };
 
-/* FUNCE tuples with these types get passed to SDIO drivers */
-static const unsigned char funce_type_whitelist[] = {
-	4 /* CISTPL_FUNCE_LAN_NODE_ID used in Broadcom cards */
+
+typedef int (tpl_parse_t)(struct mmc_card *, struct sdio_func *,
+			   const unsigned char *, unsigned);
+
+struct cis_tpl {
+	unsigned char code;
+	unsigned char min_size;
+	tpl_parse_t *parse;
 };
 
-static int cistpl_funce_whitelisted(unsigned char type)
+static int cis_tpl_parse(struct mmc_card *card, struct sdio_func *func,
+			 const char *tpl_descr,
+			 const struct cis_tpl *tpl, int tpl_count,
+			 unsigned char code,
+			 const unsigned char *buf, unsigned size)
 {
-	int i;
+	int i, ret;
 
-	for (i = 0; i < ARRAY_SIZE(funce_type_whitelist); i++) {
-		if (funce_type_whitelist[i] == type)
-			return 1;
+	/* look for a matching code in the table */
+	for (i = 0; i < tpl_count; i++, tpl++) {
+		if (tpl->code == code)
+			break;
 	}
-	return 0;
+	if (i < tpl_count) {
+		if (size >= tpl->min_size) {
+			if (tpl->parse)
+				ret = tpl->parse(card, func, buf, size);
+			else
+				ret = -EILSEQ;	/* known tuple, not parsed */
+		} else {
+			/* invalid tuple */
+			ret = -EINVAL;
+		}
+		if (ret && ret != -EILSEQ && ret != -ENOENT) {
+			printk(KERN_ERR "%s: bad %s tuple 0x%02x (%u bytes)\n",
+			       mmc_hostname(card->host), tpl_descr, code, size);
+		}
+	} else {
+		/* unknown tuple */
+		ret = -ENOENT;
+	}
+
+	return ret;
 }
 
-static int cistpl_funce_common(struct mmc_card *card,
+static int cistpl_funce_common(struct mmc_card *card, struct sdio_func *func,
 			       const unsigned char *buf, unsigned size)
 {
-	if (size < 0x04 || buf[0] != 0)
+	/* Only valid for the common CIS (function 0) */
+	if (func)
 		return -EINVAL;
 
 	/* TPLFE_FN0_BLK_SIZE */
@@ -129,20 +159,24 @@
 	return 0;
 }
 
-static int cistpl_funce_func(struct sdio_func *func,
+static int cistpl_funce_func(struct mmc_card *card, struct sdio_func *func,
 			     const unsigned char *buf, unsigned size)
 {
 	unsigned vsn;
 	unsigned min_size;
 
-	/* let SDIO drivers take care of whitelisted FUNCE tuples */
-	if (cistpl_funce_whitelisted(buf[0]))
-		return -EILSEQ;
+	/* Only valid for the individual function's CIS (1-7) */
+	if (!func)
+		return -EINVAL;
 
+	/*
+	 * This tuple has a different length depending on the SDIO spec
+	 * version.
+	 */
 	vsn = func->card->cccr.sdio_vsn;
 	min_size = (vsn == SDIO_SDIO_REV_1_00) ? 28 : 42;
 
-	if (size < min_size || buf[0] != 1)
+	if (size < min_size)
 		return -EINVAL;
 
 	/* TPLFE_MAX_BLK_SIZE */
@@ -157,39 +191,32 @@
 	return 0;
 }
 
+/*
+ * Known TPLFE_TYPEs table for CISTPL_FUNCE tuples.
+ *
+ * Note that, unlike PCMCIA, CISTPL_FUNCE tuples are not parsed depending
+ * on the TPLFID_FUNCTION value of the previous CISTPL_FUNCID as on SDIO
+ * TPLFID_FUNCTION is always hardcoded to 0x0C.
+ */
+static const struct cis_tpl cis_tpl_funce_list[] = {
+	{	0x00,	4,	cistpl_funce_common		},
+	{	0x01,	0,	cistpl_funce_func		},
+	{	0x04,	1+1+6,	/* CISTPL_FUNCE_LAN_NODE_ID */	},
+};
+
 static int cistpl_funce(struct mmc_card *card, struct sdio_func *func,
 			const unsigned char *buf, unsigned size)
 {
-	int ret;
-
-	/*
-	 * There should be two versions of the CISTPL_FUNCE tuple,
-	 * one for the common CIS (function 0) and a version used by
-	 * the individual function's CIS (1-7). Yet, the later has a
-	 * different length depending on the SDIO spec version.
-	 */
-	if (func)
-		ret = cistpl_funce_func(func, buf, size);
-	else
-		ret = cistpl_funce_common(card, buf, size);
-
-	if (ret && ret != -EILSEQ) {
-		printk(KERN_ERR "%s: bad CISTPL_FUNCE size %u "
-		       "type %u\n", mmc_hostname(card->host), size, buf[0]);
-	}
+	if (size < 1)
+		return -EINVAL;
 
-	return ret;
+	return cis_tpl_parse(card, func, "CISTPL_FUNCE",
+			     cis_tpl_funce_list,
+			     ARRAY_SIZE(cis_tpl_funce_list),
+			     buf[0], buf, size);
 }
 
-typedef int (tpl_parse_t)(struct mmc_card *, struct sdio_func *,
-			   const unsigned char *, unsigned);
-
-struct cis_tpl {
-	unsigned char code;
-	unsigned char min_size;
-	tpl_parse_t *parse;
-};
-
+/* Known TPL_CODEs table for CIS tuples */
 static const struct cis_tpl cis_tpl_list[] = {
 	{	0x15,	3,	cistpl_vers_1		},
 	{	0x20,	4,	cistpl_manfid		},
@@ -268,46 +295,38 @@
 			break;
 		}
 
-		for (i = 0; i < ARRAY_SIZE(cis_tpl_list); i++)
-			if (cis_tpl_list[i].code == tpl_code)
-				break;
-		if (i < ARRAY_SIZE(cis_tpl_list)) {
-			const struct cis_tpl *tpl = cis_tpl_list + i;
-			if (tpl_link < tpl->min_size) {
-				printk(KERN_ERR
-				       "%s: bad CIS tuple 0x%02x"
-				       " (length = %u, expected >= %u)\n",
-				       mmc_hostname(card->host),
-				       tpl_code, tpl_link, tpl->min_size);
-				ret = -EINVAL;
-			} else if (tpl->parse) {
-				ret = tpl->parse(card, func,
-						 this->data, tpl_link);
-			}
+		/* Try to parse the CIS tuple */
+		ret = cis_tpl_parse(card, func, "CIS",
+				    cis_tpl_list, ARRAY_SIZE(cis_tpl_list),
+				    tpl_code, this->data, tpl_link);
+		if (ret == -EILSEQ || ret == -ENOENT) {
 			/*
-			 * We don't need the tuple anymore if it was
-			 * successfully parsed by the SDIO core or if it is
-			 * not going to be parsed by SDIO drivers.
+			 * The tuple is unknown or known but not parsed.
+			 * Queue the tuple for the function driver.
 			 */
-			if (!ret || ret != -EILSEQ)
-				kfree(this);
-		} else {
-			/* unknown tuple */
-			ret = -EILSEQ;
-		}
-
-		if (ret == -EILSEQ) {
-			/* this tuple is unknown to the core or whitelisted */
 			this->next = NULL;
 			this->code = tpl_code;
 			this->size = tpl_link;
 			*prev = this;
 			prev = &this->next;
-			printk(KERN_DEBUG
-			       "%s: queuing CIS tuple 0x%02x length %u\n",
-			       mmc_hostname(card->host), tpl_code, tpl_link);
+
+			if (ret == -ENOENT) {
+				/* warn about unknown tuples */
+				printk(KERN_WARNING "%s: queuing unknown"
+				       " CIS tuple 0x%02x (%u bytes)\n",
+				       mmc_hostname(card->host),
+				       tpl_code, tpl_link);
+			}
+
 			/* keep on analyzing tuples */
 			ret = 0;
+		} else {
+			/*
+			 * We don't need the tuple anymore if it was
+			 * successfully parsed by the SDIO core or if it is
+			 * not going to be queued for a driver.
+			 */
+			kfree(this);
 		}
 
 		ptr += tpl_link;
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/core/host.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/core/host.c
@@ -16,6 +16,10 @@
 #include <linux/idr.h>
 #include <linux/pagemap.h>
 #include <linux/leds.h>
+#include <linux/suspend.h>
+
+#include <linux/slab.h>
+#include <linux/suspend.h>
 
 #include <linux/mmc/host.h>
 
@@ -84,6 +88,9 @@
 	init_waitqueue_head(&host->wq);
 	INIT_DELAYED_WORK(&host->detect, mmc_rescan);
 	INIT_DELAYED_WORK_DEFERRABLE(&host->disable, mmc_host_deeper_disable);
+#ifdef CONFIG_PM
+	host->pm_notify.notifier_call = mmc_pm_notify;
+#endif
 
 	/*
 	 * By default, hosts do not support SGIO or large requests.
@@ -132,6 +139,7 @@
 #endif
 
 	mmc_start_host(host);
+	register_pm_notifier(&host->pm_notify);
 
 	return 0;
 }
@@ -148,6 +156,7 @@
  */
 void mmc_remove_host(struct mmc_host *host)
 {
+	unregister_pm_notifier(&host->pm_notify);
 	mmc_stop_host(host);
 
 #ifdef CONFIG_DEBUG_FS
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/core/sd_ops.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/core/sd_ops.c
@@ -79,8 +79,6 @@
 	 * we cannot use the retries field in mmc_command.
 	 */
 	for (i = 0;i <= retries;i++) {
-		memset(&mrq, 0, sizeof(struct mmc_request));
-
 		err = mmc_app_cmd(host, card);
 		if (err) {
 			/* no point in retrying; no APP commands allowed */
--- linux-mvl-dove-2.6.32.orig/drivers/mmc/core/sd.c
+++ linux-mvl-dove-2.6.32/drivers/mmc/core/sd.c
@@ -336,7 +336,9 @@
 	int err;
 	u32 cid[4];
 	unsigned int max_dtr;
-
+#ifdef CONFIG_MMC_PARANOID_SD_INIT
+	int retries;
+#endif
 	BUG_ON(!host);
 	WARN_ON(!host->claimed);
 
@@ -439,11 +441,29 @@
 		err = mmc_decode_scr(card);
 		if (err < 0)
 			goto free_card;
-
 		/*
 		 * Fetch switch information from card.
 		 */
+#ifdef CONFIG_MMC_PARANOID_SD_INIT
+		for (retries = 1; retries <= 3; retries++) {
+			err = mmc_read_switch(card);
+			if (!err) {
+				if (retries > 1) {
+					printk(KERN_WARNING
+					       "%s: recovered\n", 
+					       mmc_hostname(host));
+				}
+				break;
+			} else {
+				printk(KERN_WARNING
+				       "%s: read switch failed (attempt %d)\n",
+				       mmc_hostname(host), retries);
+			}
+		}
+#else
 		err = mmc_read_switch(card);
+#endif
+
 		if (err)
 			goto free_card;
 	}
@@ -538,18 +558,36 @@
  */
 static void mmc_sd_detect(struct mmc_host *host)
 {
-	int err;
+	int err = 0;
+#ifdef CONFIG_MMC_PARANOID_SD_INIT
+        int retries = 5;
+#endif
 
 	BUG_ON(!host);
 	BUG_ON(!host->card);
-
+       
 	mmc_claim_host(host);
 
 	/*
 	 * Just check if our card has been removed.
 	 */
+#ifdef CONFIG_MMC_PARANOID_SD_INIT
+	while(retries) {
+		err = mmc_send_status(host->card, NULL);
+		if (err) {
+			retries--;
+			udelay(5);
+			continue;
+		}
+		break;
+	}
+	if (!retries) {
+		printk(KERN_ERR "%s(%s): Unable to re-detect card (%d)\n",
+		       __func__, mmc_hostname(host), err);
+	}
+#else
 	err = mmc_send_status(host->card, NULL);
-
+#endif
 	mmc_release_host(host);
 
 	if (err) {
@@ -587,12 +625,31 @@
 static int mmc_sd_resume(struct mmc_host *host)
 {
 	int err;
+#ifdef CONFIG_MMC_PARANOID_SD_INIT
+	int retries;
+#endif
 
 	BUG_ON(!host);
 	BUG_ON(!host->card);
 
 	mmc_claim_host(host);
+#ifdef CONFIG_MMC_PARANOID_SD_INIT
+	retries = 5;
+	while (retries) {
+		err = mmc_sd_init_card(host, host->ocr, host->card);
+
+		if (err) {
+			printk(KERN_ERR "%s: Re-init card rc = %d (retries = %d)\n",
+			       mmc_hostname(host), err, retries);
+			mdelay(5);
+			retries--;
+			continue;
+		}
+		break;
+	}
+#else
 	err = mmc_sd_init_card(host, host->ocr, host->card);
+#endif
 	mmc_release_host(host);
 
 	return err;
@@ -606,23 +663,6 @@
 	mmc_release_host(host);
 }
 
-#ifdef CONFIG_MMC_UNSAFE_RESUME
-
-static const struct mmc_bus_ops mmc_sd_ops = {
-	.remove = mmc_sd_remove,
-	.detect = mmc_sd_detect,
-	.suspend = mmc_sd_suspend,
-	.resume = mmc_sd_resume,
-	.power_restore = mmc_sd_power_restore,
-};
-
-static void mmc_sd_attach_bus_ops(struct mmc_host *host)
-{
-	mmc_attach_bus(host, &mmc_sd_ops);
-}
-
-#else
-
 static const struct mmc_bus_ops mmc_sd_ops = {
 	.remove = mmc_sd_remove,
 	.detect = mmc_sd_detect,
@@ -643,21 +683,22 @@
 {
 	const struct mmc_bus_ops *bus_ops;
 
-	if (host->caps & MMC_CAP_NONREMOVABLE)
+	if (host->caps & MMC_CAP_NONREMOVABLE || !mmc_assume_removable)
 		bus_ops = &mmc_sd_ops_unsafe;
 	else
 		bus_ops = &mmc_sd_ops;
 	mmc_attach_bus(host, bus_ops);
 }
 
-#endif
-
 /*
  * Starting point for SD card init.
  */
 int mmc_attach_sd(struct mmc_host *host, u32 ocr)
 {
 	int err;
+#ifdef CONFIG_MMC_PARANOID_SD_INIT
+	int retries;
+#endif
 
 	BUG_ON(!host);
 	WARN_ON(!host->claimed);
@@ -706,9 +747,27 @@
 	/*
 	 * Detect and init the card.
 	 */
+#ifdef CONFIG_MMC_PARANOID_SD_INIT
+	retries = 5;
+	while (retries) {
+		err = mmc_sd_init_card(host, host->ocr, NULL);
+		if (err) {
+			retries--;
+			continue;
+		}
+		break;
+	}
+
+	if (!retries) {
+		printk(KERN_ERR "%s: mmc_sd_init_card() failure (err = %d)\n",
+		       mmc_hostname(host), err);
+		goto err;
+	}
+#else
 	err = mmc_sd_init_card(host, host->ocr, NULL);
 	if (err)
 		goto err;
+#endif
 
 	mmc_release_host(host);
 
--- linux-mvl-dove-2.6.32.orig/drivers/cpuidle/sysfs.c
+++ linux-mvl-dove-2.6.32/drivers/cpuidle/sysfs.c
@@ -13,6 +13,8 @@
 
 #include "cpuidle.h"
 
+unsigned cpuidle_user_state = 0;
+
 static unsigned int sysfs_switch;
 static int __init cpuidle_sysfs_setup(char *unused)
 {
@@ -103,6 +105,53 @@
 		return count;
 }
 
+static ssize_t show_available_user_states(struct sysdev_class *class,
+					char *buf)
+{
+	ssize_t ret = 0;
+	struct cpuidle_device *dev = __get_cpu_var(cpuidle_devices);
+	int i;
+
+	mutex_lock(&cpuidle_lock);
+	for (i=0; i<dev->state_count; i++)
+		ret += sprintf((buf+ret), "%d ", i);
+	ret += sprintf((buf+ret), "\n");
+	mutex_unlock(&cpuidle_lock);
+
+	return ret;
+}
+
+static ssize_t show_current_user_state(struct sysdev_class *class,
+				     char *buf)
+{
+	ssize_t ret = 0;
+
+	mutex_lock(&cpuidle_lock);
+	ret = sprintf(buf, "%d\n", cpuidle_user_state);
+	mutex_unlock(&cpuidle_lock);
+
+	return ret;
+}
+
+static ssize_t store_current_user_state(struct sysdev_class *class,
+				      const char *buf, size_t count)
+{
+	unsigned int new_state;
+	struct cpuidle_device *dev = __get_cpu_var(cpuidle_devices);
+
+	sscanf(buf, "%d", &new_state);
+	if (new_state >= dev->state_count)
+		return -EINVAL;
+
+	mutex_lock(&cpuidle_lock);
+	if (strcmp(cpuidle_curr_governor->name, "user") != 0)
+		printk(KERN_WARNING "Warning: current_user_state will take effect when selecting user governor only!\n");
+	cpuidle_user_state = new_state;
+	mutex_unlock(&cpuidle_lock);
+
+	return count;
+}
+
 static SYSDEV_CLASS_ATTR(current_driver, 0444, show_current_driver, NULL);
 static SYSDEV_CLASS_ATTR(current_governor_ro, 0444, show_current_governor,
 			 NULL);
@@ -117,11 +166,17 @@
 			 NULL);
 static SYSDEV_CLASS_ATTR(current_governor, 0644, show_current_governor,
 			 store_current_governor);
+static SYSDEV_CLASS_ATTR(available_user_states, 0444, show_available_user_states,
+			 NULL);
+static SYSDEV_CLASS_ATTR(current_user_state, 0644, show_current_user_state,
+			 store_current_user_state);
 
 static struct attribute *cpuclass_switch_attrs[] = {
 	&attr_available_governors.attr,
 	&attr_current_driver.attr,
 	&attr_current_governor.attr,
+	&attr_available_user_states.attr,
+	&attr_current_user_state.attr,
 	NULL
 };
 
--- linux-mvl-dove-2.6.32.orig/drivers/cpuidle/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/cpuidle/Kconfig
@@ -18,3 +18,8 @@
 	bool
 	depends on CPU_IDLE && NO_HZ
 	default y
+
+config CPU_IDLE_GOV_USER
+	bool
+	depends on CPU_IDLE && NO_HZ
+	default y
--- linux-mvl-dove-2.6.32.orig/drivers/cpuidle/governors/menu.c
+++ linux-mvl-dove-2.6.32/drivers/cpuidle/governors/menu.c
@@ -18,6 +18,7 @@
 #include <linux/hrtimer.h>
 #include <linux/tick.h>
 #include <linux/sched.h>
+#include <linux/math64.h>
 
 #define BUCKETS 12
 #define RESOLUTION 1024
@@ -100,7 +101,6 @@
 
 	unsigned int	expected_us;
 	u64		predicted_us;
-	unsigned int	measured_us;
 	unsigned int	exit_us;
 	unsigned int	bucket;
 	u64		correction_factor[BUCKETS];
@@ -169,6 +169,12 @@
 
 static void menu_update(struct cpuidle_device *dev);
 
+/* This implements DIV_ROUND_CLOSEST but avoids 64 bit division */
+static u64 div_round64(u64 dividend, u32 divisor)
+{
+	return div_u64(dividend + (divisor / 2), divisor);
+}
+
 /**
  * menu_select - selects the next idle state to enter
  * @dev: the CPU
@@ -179,22 +185,24 @@
 	int latency_req = pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY);
 	int i;
 	int multiplier;
-
-	data->last_state_idx = 0;
-	data->exit_us = 0;
+	struct timespec t;
 
 	if (data->needs_update) {
 		menu_update(dev);
 		data->needs_update = 0;
 	}
 
+	data->last_state_idx = 0;
+	data->exit_us = 0;
+
 	/* Special case when user has set very strict latency requirement */
 	if (unlikely(latency_req == 0))
 		return 0;
 
 	/* determine the expected residency time, round up */
+	t = ktime_to_timespec(tick_nohz_get_sleep_length());
 	data->expected_us =
-	    DIV_ROUND_UP((u32)ktime_to_ns(tick_nohz_get_sleep_length()), 1000);
+		t.tv_sec * USEC_PER_SEC + t.tv_nsec / NSEC_PER_USEC;
 
 
 	data->bucket = which_bucket(data->expected_us);
@@ -209,9 +217,8 @@
 		data->correction_factor[data->bucket] = RESOLUTION * DECAY;
 
 	/* Make sure to round up for half microseconds */
-	data->predicted_us = DIV_ROUND_CLOSEST(
-		data->expected_us * data->correction_factor[data->bucket],
-		RESOLUTION * DECAY);
+	data->predicted_us = div_round64(data->expected_us * data->correction_factor[data->bucket],
+					 RESOLUTION * DECAY);
 
 	/*
 	 * We want to default to C1 (hlt), not to busy polling
@@ -288,7 +295,7 @@
 	new_factor = data->correction_factor[data->bucket]
 			* (DECAY - 1) / DECAY;
 
-	if (data->expected_us > 0 && data->measured_us < MAX_INTERESTING)
+	if (data->expected_us > 0 && measured_us < MAX_INTERESTING)
 		new_factor += RESOLUTION * measured_us / data->expected_us;
 	else
 		/*
--- linux-mvl-dove-2.6.32.orig/drivers/cpuidle/governors/Makefile
+++ linux-mvl-dove-2.6.32/drivers/cpuidle/governors/Makefile
@@ -4,3 +4,4 @@
 
 obj-$(CONFIG_CPU_IDLE_GOV_LADDER) += ladder.o
 obj-$(CONFIG_CPU_IDLE_GOV_MENU) += menu.o
+obj-$(CONFIG_CPU_IDLE_GOV_USER) += user.o
--- linux-mvl-dove-2.6.32.orig/drivers/cpuidle/governors/user.c
+++ linux-mvl-dove-2.6.32/drivers/cpuidle/governors/user.c
@@ -0,0 +1,77 @@
+/*
+ * user.c - the user space idle governor
+ *
+ * Copyright (C) 2006-2007 Tawfik Bayouk <tawfik@marvell.com>
+ *
+ * This code is licenced under the GPL.
+ */
+
+#include <linux/kernel.h>
+#include <linux/cpuidle.h>
+#include <linux/pm_qos_params.h>
+#include <linux/time.h>
+#include <linux/ktime.h>
+#include <linux/hrtimer.h>
+#include <linux/tick.h>
+
+extern unsigned cpuidle_user_state;
+
+
+/**
+ * user_select - selects the next idle state to enter
+ * @dev: the CPU
+ */
+static int user_select(struct cpuidle_device *dev)
+{
+	return cpuidle_user_state;
+}
+
+/**
+ * user_reflect - attempts to guess what happened after entry
+ * @dev: the CPU
+ *
+ * NOTE: it's important to be fast here because this operation will add to
+ *       the overall exit latency.
+ */
+static void user_reflect(struct cpuidle_device *dev)
+{
+
+}
+
+/**
+ * user_enable_device - scans a CPU's states and does setup
+ * @dev: the CPU
+ */
+static int user_enable_device(struct cpuidle_device *dev)
+{
+	return 0;
+}
+
+static struct cpuidle_governor user_governor = {
+	.name =		"user",
+	.rating =	1,
+	.enable =	user_enable_device,
+	.select =	user_select,
+	.reflect =	user_reflect,
+	.owner =	THIS_MODULE,
+};
+
+/**
+ * init_user - initializes the governor
+ */
+static int __init init_user(void)
+{
+	return cpuidle_register_governor(&user_governor);
+}
+
+/**
+ * exit_user - exits the governor
+ */
+static void __exit exit_user(void)
+{
+	cpuidle_unregister_governor(&user_governor);
+}
+
+MODULE_LICENSE("GPL");
+module_init(init_user);
+module_exit(exit_user);
--- linux-mvl-dove-2.6.32.orig/drivers/pcmcia/cardbus.c
+++ linux-mvl-dove-2.6.32/drivers/pcmcia/cardbus.c
@@ -214,7 +214,7 @@
 	unsigned int max, pass;
 
 	s->functions = pci_scan_slot(bus, PCI_DEVFN(0, 0));
-//	pcibios_fixup_bus(bus);
+	pci_fixup_cardbus(bus);
 
 	max = bus->secondary;
 	for (pass = 0; pass < 2; pass++)
--- linux-mvl-dove-2.6.32.orig/drivers/pcmcia/pcmcia_resource.c
+++ linux-mvl-dove-2.6.32/drivers/pcmcia/pcmcia_resource.c
@@ -39,7 +39,7 @@
 #ifdef CONFIG_PCMCIA_PROBE
 #include <asm/irq.h>
 /* mask of IRQs already reserved by other cards, we should avoid using them */
-static u8 pcmcia_used_irq[NR_IRQS];
+static u8 pcmcia_used_irq[32];
 #endif
 
 
@@ -719,6 +719,9 @@
 		for (try = 0; try < 64; try++) {
 			irq = try % 32;
 
+			if (irq > NR_IRQS)
+				continue;
+
 			/* marked as available by driver, and not blocked by userspace? */
 			if (!((mask >> irq) & 1))
 				continue;
--- linux-mvl-dove-2.6.32.orig/drivers/ata/libata-scsi.c
+++ linux-mvl-dove-2.6.32/drivers/ata/libata-scsi.c
@@ -1099,13 +1099,13 @@
 	/* configure max sectors */
 	blk_queue_max_sectors(sdev->request_queue, dev->max_sectors);
 
+	sdev->sector_size = ATA_SECT_SIZE;
+
 	if (dev->class == ATA_DEV_ATAPI) {
 		struct request_queue *q = sdev->request_queue;
 		void *buf;
 
-		/* set the min alignment and padding */
-		blk_queue_update_dma_alignment(sdev->request_queue,
-					       ATA_DMA_PAD_SZ - 1);
+		/* set DMA padding */
 		blk_queue_update_dma_pad(sdev->request_queue,
 					 ATA_DMA_PAD_SZ - 1);
 
@@ -1119,12 +1119,24 @@
 
 		blk_queue_dma_drain(q, atapi_drain_needed, buf, ATAPI_MAX_DRAIN);
 	} else {
-		/* ATA devices must be sector aligned */
-		blk_queue_update_dma_alignment(sdev->request_queue,
-					       ATA_SECT_SIZE - 1);
 		sdev->manage_start_stop = 1;
 	}
 
+	/*
+	 * ata_pio_sectors() expects buffer for each sector to not cross
+	 * page boundary.  Enforce it by requiring buffers to be sector
+	 * aligned, which works iff sector_size is not larger than
+	 * PAGE_SIZE.  ATAPI devices also need the alignment as
+	 * IDENTIFY_PACKET is executed as ATA_PROT_PIO.
+	 */
+	if (sdev->sector_size > PAGE_SIZE)
+		ata_dev_printk(dev, KERN_WARNING,
+			"sector_size=%u > PAGE_SIZE, PIO may malfunction\n",
+			sdev->sector_size);
+
+	blk_queue_update_dma_alignment(sdev->request_queue,
+				       sdev->sector_size - 1);
+
 	if (dev->flags & ATA_DFLAG_AN)
 		set_bit(SDEV_EVT_MEDIA_CHANGE, sdev->supported_events);
 
@@ -2497,8 +2509,11 @@
 		 *
 		 * If door lock fails, always clear sdev->locked to
 		 * avoid this infinite loop.
+		 *
+		 * This may happen before SCSI scan is complete.  Make
+		 * sure qc->dev->sdev isn't NULL before dereferencing.
 		 */
-		if (qc->cdb[0] == ALLOW_MEDIUM_REMOVAL)
+		if (qc->cdb[0] == ALLOW_MEDIUM_REMOVAL && qc->dev->sdev)
 			qc->dev->sdev->locked = 0;
 
 		qc->scsicmd->result = SAM_STAT_CHECK_CONDITION;
@@ -2825,7 +2840,7 @@
 	 * write indication (used for PIO/DMA setup), result TF is
 	 * copied back and we don't whine too much about its failure.
 	 */
-	tf->flags = ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
+	tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
 	if (scmd->sc_data_direction == DMA_TO_DEVICE)
 		tf->flags |= ATA_TFLAG_WRITE;
 
--- linux-mvl-dove-2.6.32.orig/drivers/ata/pata_pdc202xx_old.c
+++ linux-mvl-dove-2.6.32/drivers/ata/pata_pdc202xx_old.c
@@ -2,7 +2,7 @@
  * pata_pdc202xx_old.c 	- Promise PDC202xx PATA for new ATA layer
  *			  (C) 2005 Red Hat Inc
  *			  Alan Cox <alan@lxorguk.ukuu.org.uk>
- *			  (C) 2007,2009 Bartlomiej Zolnierkiewicz
+ *			  (C) 2007,2009,2010 Bartlomiej Zolnierkiewicz
  *
  * Based in part on linux/drivers/ide/pci/pdc202xx_old.c
  *
@@ -35,6 +35,15 @@
 	return ATA_CBL_PATA80;
 }
 
+static void pdc202xx_exec_command(struct ata_port *ap,
+				  const struct ata_taskfile *tf)
+{
+	DPRINTK("ata%u: cmd 0x%X\n", ap->print_id, tf->command);
+
+	iowrite8(tf->command, ap->ioaddr.command_addr);
+	ndelay(400);
+}
+
 /**
  *	pdc202xx_configure_piomode	-	set chip PIO timing
  *	@ap: ATA interface
@@ -271,6 +280,8 @@
 	.cable_detect		= ata_cable_40wire,
 	.set_piomode		= pdc202xx_set_piomode,
 	.set_dmamode		= pdc202xx_set_dmamode,
+
+	.sff_exec_command	= pdc202xx_exec_command,
 };
 
 static struct ata_port_operations pdc2026x_port_ops = {
@@ -284,6 +295,8 @@
 	.dev_config		= pdc2026x_dev_config,
 
 	.port_start		= pdc2026x_port_start,
+
+	.sff_exec_command	= pdc202xx_exec_command,
 };
 
 static int pdc202xx_init_one(struct pci_dev *dev, const struct pci_device_id *id)
--- linux-mvl-dove-2.6.32.orig/drivers/ata/ata_piix.c
+++ linux-mvl-dove-2.6.32/drivers/ata/ata_piix.c
@@ -157,6 +157,7 @@
 struct piix_host_priv {
 	const int *map;
 	u32 saved_iocfg;
+	spinlock_t sidpr_lock;	/* FIXME: remove once locking in EH is fixed */
 	void __iomem *sidpr;
 };
 
@@ -291,6 +292,14 @@
 	{ 0x8086, 0x3b2d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
 	/* SATA Controller IDE (PCH) */
 	{ 0x8086, 0x3b2e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
+	/* SATA Controller IDE (CPT) */
+	{ 0x8086, 0x1c00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
+	/* SATA Controller IDE (CPT) */
+	{ 0x8086, 0x1c01, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
+	/* SATA Controller IDE (CPT) */
+	{ 0x8086, 0x1c08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
+	/* SATA Controller IDE (CPT) */
+	{ 0x8086, 0x1c09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
 	{ }	/* terminate list */
 };
 
@@ -869,10 +878,10 @@
 				(timings[pio][1] << 8);
 		}
 
-		if (ap->udma_mask) {
+		if (ap->udma_mask)
 			udma_enable &= ~(1 << devid);
-			pci_write_config_word(dev, master_port, master_data);
-		}
+
+		pci_write_config_word(dev, master_port, master_data);
 	}
 	/* Don't scribble on 0x48 if the controller does not support UDMA */
 	if (ap->udma_mask)
@@ -940,12 +949,15 @@
 			       unsigned int reg, u32 *val)
 {
 	struct piix_host_priv *hpriv = link->ap->host->private_data;
+	unsigned long flags;
 
 	if (reg >= ARRAY_SIZE(piix_sidx_map))
 		return -EINVAL;
 
+	spin_lock_irqsave(&hpriv->sidpr_lock, flags);
 	piix_sidpr_sel(link, reg);
 	*val = ioread32(hpriv->sidpr + PIIX_SIDPR_DATA);
+	spin_unlock_irqrestore(&hpriv->sidpr_lock, flags);
 	return 0;
 }
 
@@ -953,12 +965,15 @@
 				unsigned int reg, u32 val)
 {
 	struct piix_host_priv *hpriv = link->ap->host->private_data;
+	unsigned long flags;
 
 	if (reg >= ARRAY_SIZE(piix_sidx_map))
 		return -EINVAL;
 
+	spin_lock_irqsave(&hpriv->sidpr_lock, flags);
 	piix_sidpr_sel(link, reg);
 	iowrite32(val, hpriv->sidpr + PIIX_SIDPR_DATA);
+	spin_unlock_irqrestore(&hpriv->sidpr_lock, flags);
 	return 0;
 }
 
@@ -1547,6 +1562,7 @@
 	hpriv = devm_kzalloc(dev, sizeof(*hpriv), GFP_KERNEL);
 	if (!hpriv)
 		return -ENOMEM;
+	spin_lock_init(&hpriv->sidpr_lock);
 
 	/* Save IOCFG, this will be used for cable detection, quirk
 	 * detection and restoration on detach.  This is necessary
--- linux-mvl-dove-2.6.32.orig/drivers/ata/ata_generic.c
+++ linux-mvl-dove-2.6.32/drivers/ata/ata_generic.c
@@ -32,6 +32,11 @@
  *	A generic parallel ATA driver using libata
  */
 
+enum {
+	ATA_GEN_CLASS_MATCH		= (1 << 0),
+	ATA_GEN_FORCE_DMA		= (1 << 1),
+};
+
 /**
  *	generic_set_mode	-	mode setting
  *	@link: link to set up
@@ -46,13 +51,17 @@
 static int generic_set_mode(struct ata_link *link, struct ata_device **unused)
 {
 	struct ata_port *ap = link->ap;
+	const struct pci_device_id *id = ap->host->private_data;
 	int dma_enabled = 0;
 	struct ata_device *dev;
 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 
-	/* Bits 5 and 6 indicate if DMA is active on master/slave */
-	if (ap->ioaddr.bmdma_addr)
+	if (id->driver_data & ATA_GEN_FORCE_DMA) {
+		dma_enabled = 0xff;
+	} else if (ap->ioaddr.bmdma_addr) {
+		/* Bits 5 and 6 indicate if DMA is active on master/slave */
 		dma_enabled = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
+	}
 
 	if (pdev->vendor == PCI_VENDOR_ID_CENATEK)
 		dma_enabled = 0xFF;
@@ -126,7 +135,7 @@
 	const struct ata_port_info *ppi[] = { &info, NULL };
 
 	/* Don't use the generic entry unless instructed to do so */
-	if (id->driver_data == 1 && all_generic_ide == 0)
+	if ((id->driver_data & ATA_GEN_CLASS_MATCH) && all_generic_ide == 0)
 		return -ENODEV;
 
 	/* Devices that need care */
@@ -155,7 +164,7 @@
 			return rc;
 		pcim_pin_device(dev);
 	}
-	return ata_pci_sff_init_one(dev, ppi, &generic_sht, NULL);
+	return ata_pci_sff_init_one(dev, ppi, &generic_sht, (void *)id);
 }
 
 static struct pci_device_id ata_generic[] = {
@@ -167,12 +176,21 @@
 	{ PCI_DEVICE(PCI_VENDOR_ID_HINT,   PCI_DEVICE_ID_HINT_VXPROII_IDE), },
 	{ PCI_DEVICE(PCI_VENDOR_ID_VIA,    PCI_DEVICE_ID_VIA_82C561), },
 	{ PCI_DEVICE(PCI_VENDOR_ID_OPTI,   PCI_DEVICE_ID_OPTI_82C558), },
-	{ PCI_DEVICE(PCI_VENDOR_ID_CENATEK,PCI_DEVICE_ID_CENATEK_IDE), },
+	{ PCI_DEVICE(PCI_VENDOR_ID_CENATEK,PCI_DEVICE_ID_CENATEK_IDE),
+	  .driver_data = ATA_GEN_FORCE_DMA },
+	/*
+	 * For some reason, MCP89 on MacBook 7,1 doesn't work with
+	 * ahci, use ata_generic instead.
+	 */
+	{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP89_SATA,
+	  PCI_VENDOR_ID_APPLE, 0xcb89,
+	  .driver_data = ATA_GEN_FORCE_DMA },
 	{ PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO), },
 	{ PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_1), },
 	{ PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_2),  },
 	/* Must come last. If you add entries adjust this table appropriately */
-	{ PCI_ANY_ID,		PCI_ANY_ID,			   PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE << 8, 0xFFFFFF00UL, 1},
+	{ PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_IDE << 8, 0xFFFFFF00UL),
+	  .driver_data = ATA_GEN_CLASS_MATCH },
 	{ 0, },
 };
 
--- linux-mvl-dove-2.6.32.orig/drivers/ata/libata-sff.c
+++ linux-mvl-dove-2.6.32/drivers/ata/libata-sff.c
@@ -893,6 +893,9 @@
 				       do_write);
 	}
 
+	if (!do_write && !PageSlab(page))
+		flush_dcache_page(page);
+
 	qc->curbytes += qc->sect_size;
 	qc->cursg_ofs += qc->sect_size;
 
@@ -1282,6 +1285,10 @@
 			 */
 			ap->hsm_task_state = HSM_ST;
 			ata_pio_sectors(qc);
+			if ((qc->tf.flags & ATA_TFLAG_POLLING) &&
+				(qc->tf.flags & ATA_TFLAG_WRITE))
+				status = ata_wait_drq_clear(ap);
+
 		} else
 			/* send CDB */
 			atapi_send_cdb(ap, qc);
@@ -1411,6 +1418,10 @@
 				status = ata_wait_idle(ap);
 				goto fsm_start;
 			}
+			if ((qc->tf.flags & ATA_TFLAG_POLLING) &&
+				(qc->tf.flags & ATA_TFLAG_WRITE))
+				status = ata_wait_drq_clear(ap);
+
 		}
 
 		poll_next = 1;
--- linux-mvl-dove-2.6.32.orig/drivers/ata/sata_nv.c
+++ linux-mvl-dove-2.6.32/drivers/ata/sata_nv.c
@@ -1673,7 +1673,6 @@
 	mask = readl(mmio_base + NV_INT_ENABLE_MCP55);
 	mask &= ~(NV_INT_ALL_MCP55 << shift);
 	writel(mask, mmio_base + NV_INT_ENABLE_MCP55);
-	ata_sff_freeze(ap);
 }
 
 static void nv_mcp55_thaw(struct ata_port *ap)
@@ -1687,7 +1686,6 @@
 	mask = readl(mmio_base + NV_INT_ENABLE_MCP55);
 	mask |= (NV_INT_MASK_MCP55 << shift);
 	writel(mask, mmio_base + NV_INT_ENABLE_MCP55);
-	ata_sff_thaw(ap);
 }
 
 static void nv_adma_error_handler(struct ata_port *ap)
@@ -2478,8 +2476,7 @@
 	}
 
 	pci_set_master(pdev);
-	return ata_host_activate(host, pdev->irq, ipriv->irq_handler,
-				 IRQF_SHARED, ipriv->sht);
+	return ata_pci_sff_activate_host(host, ipriv->irq_handler, ipriv->sht);
 }
 
 #ifdef CONFIG_PM
--- linux-mvl-dove-2.6.32.orig/drivers/ata/pata_ali.c
+++ linux-mvl-dove-2.6.32/drivers/ata/pata_ali.c
@@ -453,7 +453,9 @@
 			/* Clear CD-ROM DMA write bit */
 			tmp &= 0x7F;
 		/* Cable and UDMA */
-		pci_write_config_byte(pdev, 0x4B, tmp | 0x09);
+		if (pdev->revision >= 0xc2)
+			tmp |= 0x01;
+		pci_write_config_byte(pdev, 0x4B, tmp | 0x08);
 		/*
 		 * CD_ROM DMA on (0x53 bit 0). Enable this even if we want
 		 * to use PIO. 0x53 bit 1 (rev 20 only) - enable FIFO control
--- linux-mvl-dove-2.6.32.orig/drivers/ata/pata_hpt37x.c
+++ linux-mvl-dove-2.6.32/drivers/ata/pata_hpt37x.c
@@ -24,7 +24,7 @@
 #include <linux/libata.h>
 
 #define DRV_NAME	"pata_hpt37x"
-#define DRV_VERSION	"0.6.12"
+#define DRV_VERSION	"0.6.14"
 
 struct hpt_clock {
 	u8	xfer_speed;
@@ -404,9 +404,8 @@
 
 	pci_read_config_dword(pdev, addr1, &reg);
 	mode = hpt37x_find_mode(ap, adev->pio_mode);
-	mode &= ~0x8000000;	/* No FIFO in PIO */
-	mode &= ~0x30070000;	/* Leave config bits alone */
-	reg &= 0x30070000;	/* Strip timing bits */
+	mode &= 0xCFC3FFFF;	/* Leave DMA bits alone */
+	reg &= ~0xCFC3FFFF;	/* Strip timing bits */
 	pci_write_config_dword(pdev, addr1, reg | mode);
 }
 
@@ -423,8 +422,7 @@
 {
 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 	u32 addr1, addr2;
-	u32 reg;
-	u32 mode;
+	u32 reg, mode, mask;
 	u8 fast;
 
 	addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no);
@@ -436,11 +434,12 @@
 	fast |= 0x01;
 	pci_write_config_byte(pdev, addr2, fast);
 
+	mask = adev->dma_mode < XFER_UDMA_0 ? 0x31C001FF : 0x303C0000;
+
 	pci_read_config_dword(pdev, addr1, &reg);
 	mode = hpt37x_find_mode(ap, adev->dma_mode);
-	mode |= 0x8000000;	/* FIFO in MWDMA or UDMA */
-	mode &= ~0xC0000000;	/* Leave config bits alone */
-	reg &= 0xC0000000;	/* Strip timing bits */
+	mode &= mask;
+	reg &= ~mask;
 	pci_write_config_dword(pdev, addr1, reg | mode);
 }
 
@@ -508,9 +507,8 @@
 	mode = hpt37x_find_mode(ap, adev->pio_mode);
 
 	printk("Find mode for %d reports %X\n", adev->pio_mode, mode);
-	mode &= ~0x80000000;	/* No FIFO in PIO */
-	mode &= ~0x30070000;	/* Leave config bits alone */
-	reg &= 0x30070000;	/* Strip timing bits */
+	mode &= 0xCFC3FFFF;	/* Leave DMA bits alone */
+	reg &= ~0xCFC3FFFF;	/* Strip timing bits */
 	pci_write_config_dword(pdev, addr1, reg | mode);
 }
 
@@ -527,8 +525,7 @@
 {
 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 	u32 addr1, addr2;
-	u32 reg;
-	u32 mode;
+	u32 reg, mode, mask;
 	u8 fast;
 
 	addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no);
@@ -539,12 +536,13 @@
 	fast &= ~0x07;
 	pci_write_config_byte(pdev, addr2, fast);
 
+	mask = adev->dma_mode < XFER_UDMA_0 ? 0x31C001FF : 0x303C0000;
+
 	pci_read_config_dword(pdev, addr1, &reg);
 	mode = hpt37x_find_mode(ap, adev->dma_mode);
 	printk("Find mode for DMA %d reports %X\n", adev->dma_mode, mode);
-	mode &= ~0xC0000000;	/* Leave config bits alone */
-	mode |= 0x80000000;	/* FIFO in MWDMA or UDMA */
-	reg &= 0xC0000000;	/* Strip timing bits */
+	mode &= mask;
+	reg &= ~mask;
 	pci_write_config_dword(pdev, addr1, reg | mode);
 }
 
@@ -791,9 +789,8 @@
 	static const int MHz[4] = { 33, 40, 50, 66 };
 	void *private_data = NULL;
 	const struct ata_port_info *ppi[] = { NULL, NULL };
-
+	u8 rev = dev->revision;
 	u8 irqmask;
-	u32 class_rev;
 	u8 mcr1;
 	u32 freq;
 	int prefer_dpll = 1;
@@ -808,19 +805,16 @@
 	if (rc)
 		return rc;
 
-	pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
-	class_rev &= 0xFF;
-
 	if (dev->device == PCI_DEVICE_ID_TTI_HPT366) {
 		/* May be a later chip in disguise. Check */
 		/* Older chips are in the HPT366 driver. Ignore them */
-		if (class_rev < 3)
+		if (rev < 3)
 			return -ENODEV;
 		/* N series chips have their own driver. Ignore */
-		if (class_rev == 6)
+		if (rev == 6)
 			return -ENODEV;
 
-		switch(class_rev) {
+		switch(rev) {
 			case 3:
 				ppi[0] = &info_hpt370;
 				chip_table = &hpt370;
@@ -836,28 +830,29 @@
 				chip_table = &hpt372;
 				break;
 			default:
-				printk(KERN_ERR "pata_hpt37x: Unknown HPT366 subtype please report (%d).\n", class_rev);
+				printk(KERN_ERR "pata_hpt37x: Unknown HPT366 "
+				       "subtype, please report (%d).\n", rev);
 				return -ENODEV;
 		}
 	} else {
 		switch(dev->device) {
 			case PCI_DEVICE_ID_TTI_HPT372:
 				/* 372N if rev >= 2*/
-				if (class_rev >= 2)
+				if (rev >= 2)
 					return -ENODEV;
 				ppi[0] = &info_hpt372;
 				chip_table = &hpt372a;
 				break;
 			case PCI_DEVICE_ID_TTI_HPT302:
 				/* 302N if rev > 1 */
-				if (class_rev > 1)
+				if (rev > 1)
 					return -ENODEV;
 				ppi[0] = &info_hpt372;
 				/* Check this */
 				chip_table = &hpt302;
 				break;
 			case PCI_DEVICE_ID_TTI_HPT371:
-				if (class_rev > 1)
+				if (rev > 1)
 					return -ENODEV;
 				ppi[0] = &info_hpt372;
 				chip_table = &hpt371;
--- linux-mvl-dove-2.6.32.orig/drivers/ata/libata-eh.c
+++ linux-mvl-dove-2.6.32/drivers/ata/libata-eh.c
@@ -870,6 +870,8 @@
 void ata_qc_schedule_eh(struct ata_queued_cmd *qc)
 {
 	struct ata_port *ap = qc->ap;
+	struct request_queue *q = qc->scsicmd->device->request_queue;
+	unsigned long flags;
 
 	WARN_ON(!ap->ops->error_handler);
 
@@ -881,7 +883,9 @@
 	 * Note that ATA_QCFLAG_FAILED is unconditionally set after
 	 * this function completes.
 	 */
+	spin_lock_irqsave(q->queue_lock, flags);
 	blk_abort_request(qc->scsicmd->request);
+	spin_unlock_irqrestore(q->queue_lock, flags);
 }
 
 /**
@@ -1615,6 +1619,7 @@
 	}
 
 	/* okay, this error is ours */
+	memset(&tf, 0, sizeof(tf));
 	rc = ata_eh_read_log_10h(dev, &tag, &tf);
 	if (rc) {
 		ata_link_printk(link, KERN_ERR, "failed to read log page 10h "
@@ -2019,8 +2024,9 @@
 			qc->err_mask &= ~(AC_ERR_DEV | AC_ERR_OTHER);
 
 		/* determine whether the command is worth retrying */
-		if (!(qc->err_mask & AC_ERR_INVALID) &&
-		    ((qc->flags & ATA_QCFLAG_IO) || qc->err_mask != AC_ERR_DEV))
+		if (qc->flags & ATA_QCFLAG_IO ||
+		    (!(qc->err_mask & AC_ERR_INVALID) &&
+		     qc->err_mask != AC_ERR_DEV))
 			qc->flags |= ATA_QCFLAG_RETRY;
 
 		/* accumulate error info */
@@ -2701,10 +2707,11 @@
 	}
 
 	/*
-	 * Some controllers can't be frozen very well and may set
-	 * spuruious error conditions during reset.  Clear accumulated
-	 * error information.  As reset is the final recovery action,
-	 * nothing is lost by doing this.
+	 * Some controllers can't be frozen very well and may set spurious
+	 * error conditions during reset.  Clear accumulated error
+	 * information and re-thaw the port if frozen.  As reset is the
+	 * final recovery action and we cross check link onlineness against
+	 * device classification later, no hotplug event is lost by this.
 	 */
 	spin_lock_irqsave(link->ap->lock, flags);
 	memset(&link->eh_info, 0, sizeof(link->eh_info));
@@ -2713,6 +2720,9 @@
 	ap->pflags &= ~ATA_PFLAG_EH_PENDING;
 	spin_unlock_irqrestore(link->ap->lock, flags);
 
+	if (ap->pflags & ATA_PFLAG_FROZEN)
+		ata_eh_thaw_port(ap);
+
 	/*
 	 * Make sure onlineness and classification result correspond.
 	 * Hotplug could have happened during reset and some
@@ -3143,6 +3153,10 @@
 	if (link->flags & ATA_LFLAG_DISABLED)
 		return 1;
 
+	/* skip if explicitly requested */
+	if (ehc->i.flags & ATA_EHI_NO_RECOVERY)
+		return 1;
+
 	/* thaw frozen port and recover failed devices */
 	if ((ap->pflags & ATA_PFLAG_FROZEN) || ata_link_nr_enabled(link))
 		return 0;
--- linux-mvl-dove-2.6.32.orig/drivers/ata/pata_via.c
+++ linux-mvl-dove-2.6.32/drivers/ata/pata_via.c
@@ -661,6 +661,7 @@
 	{ PCI_VDEVICE(VIA, 0x3164), },
 	{ PCI_VDEVICE(VIA, 0x5324), },
 	{ PCI_VDEVICE(VIA, 0xC409), VIA_IDFLAG_SINGLE },
+	{ PCI_VDEVICE(VIA, 0x9001), VIA_IDFLAG_SINGLE },
 
 	{ },
 };
--- linux-mvl-dove-2.6.32.orig/drivers/ata/pata_sil680.c
+++ linux-mvl-dove-2.6.32/drivers/ata/pata_sil680.c
@@ -212,13 +212,11 @@
 
 static u8 sil680_init_chip(struct pci_dev *pdev, int *try_mmio)
 {
-	u32 class_rev	= 0;
 	u8 tmpbyte	= 0;
 
-        pci_read_config_dword(pdev, PCI_CLASS_REVISION, &class_rev);
-        class_rev &= 0xff;
         /* FIXME: double check */
-	pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, (class_rev) ? 1 : 255);
+	pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE,
+			      pdev->revision ? 1 : 255);
 
 	pci_write_config_byte(pdev, 0x80, 0x00);
 	pci_write_config_byte(pdev, 0x84, 0x00);
--- linux-mvl-dove-2.6.32.orig/drivers/ata/libata-core.c
+++ linux-mvl-dove-2.6.32/drivers/ata/libata-core.c
@@ -139,7 +139,7 @@
 module_param_named(fua, libata_fua, int, 0444);
 MODULE_PARM_DESC(fua, "FUA support (0=off [default], 1=on)");
 
-static int ata_ignore_hpa;
+static int ata_ignore_hpa = 1;
 module_param_named(ignore_hpa, ata_ignore_hpa, int, 0644);
 MODULE_PARM_DESC(ignore_hpa, "Ignore HPA limit (0=keep BIOS limits, 1=ignore limits, using full disk)");
 
@@ -159,6 +159,10 @@
 module_param_named(allow_tpm, libata_allow_tpm, int, 0444);
 MODULE_PARM_DESC(allow_tpm, "Permit the use of TPM commands (0=off [default], 1=on)");
 
+static int atapi_an;
+module_param(atapi_an, int, 0444);
+MODULE_PARM_DESC(atapi_an, "Enable ATAPI AN media presence notification (0=0ff [default], 1=on)");
+
 MODULE_AUTHOR("Jeff Garzik");
 MODULE_DESCRIPTION("Library module for ATA devices");
 MODULE_LICENSE("GPL");
@@ -2570,7 +2574,8 @@
 		 * to enable ATAPI AN to discern between PHY status
 		 * changed notifications and ATAPI ANs.
 		 */
-		if ((ap->flags & ATA_FLAG_AN) && ata_id_has_atapi_AN(id) &&
+		if (atapi_an &&
+		    (ap->flags & ATA_FLAG_AN) && ata_id_has_atapi_AN(id) &&
 		    (!sata_pmp_attached(ap) ||
 		     sata_scr_read(&ap->link, SCR_NOTIFICATION, &sntf) == 0)) {
 			unsigned int err_mask;
@@ -3790,21 +3795,45 @@
 int sata_link_resume(struct ata_link *link, const unsigned long *params,
 		     unsigned long deadline)
 {
+	int tries = ATA_LINK_RESUME_TRIES;
 	u32 scontrol, serror;
 	int rc;
 
 	if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
 		return rc;
 
-	scontrol = (scontrol & 0x0f0) | 0x300;
+	/*
+	 * Writes to SControl sometimes get ignored under certain
+	 * controllers (ata_piix SIDPR).  Make sure DET actually is
+	 * cleared.
+	 */
+	do {
+		scontrol = (scontrol & 0x0f0) | 0x300;
+		if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
+			return rc;
+		/*
+		 * Some PHYs react badly if SStatus is pounded
+		 * immediately after resuming.  Delay 200ms before
+		 * debouncing.
+		 */
+		msleep(200);
 
-	if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
-		return rc;
+		/* is SControl restored correctly? */
+		if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
+			return rc;
+	} while ((scontrol & 0xf0f) != 0x300 && --tries);
 
-	/* Some PHYs react badly if SStatus is pounded immediately
-	 * after resuming.  Delay 200ms before debouncing.
-	 */
-	msleep(200);
+	if ((scontrol & 0xf0f) != 0x300) {
+		ata_link_printk(link, KERN_ERR,
+				"failed to resume link (SControl %X)\n",
+				scontrol);
+		return 0;
+	}
+
+	if (tries < ATA_LINK_RESUME_TRIES)
+		ata_link_printk(link, KERN_WARNING,
+				"link resume succeeded after %d retries\n",
+				ATA_LINK_RESUME_TRIES - tries);
 
 	if ((rc = sata_link_debounce(link, params, deadline)))
 		return rc;
@@ -4323,6 +4352,10 @@
 	{ "HTS541060G9SA00",    "MB3OC60D",     ATA_HORKAGE_NONCQ, },
 	{ "HTS541080G9SA00",    "MB4OC60D",     ATA_HORKAGE_NONCQ, },
 	{ "HTS541010G9SA00",    "MBZOC60D",     ATA_HORKAGE_NONCQ, },
+	{ "FUJITSU MHW2160BH PL", "0084001E",   ATA_HORKAGE_NONCQ, },
+
+	/* https://bugzilla.kernel.org/show_bug.cgi?id=15573 */
+	{ "C300-CTFDDAC128MAG",	"0001",		ATA_HORKAGE_NONCQ, },
 
 	/* devices which puke on READ_NATIVE_MAX */
 	{ "HDS724040KLSA80",	"KFAOA20N",	ATA_HORKAGE_BROKEN_HPA, },
@@ -4984,9 +5017,6 @@
 {
 	struct ata_device *dev = qc->dev;
 
-	if (ata_tag_internal(qc->tag))
-		return;
-
 	if (ata_is_nodata(qc->tf.protocol))
 		return;
 
@@ -5030,14 +5060,23 @@
 		if (unlikely(qc->err_mask))
 			qc->flags |= ATA_QCFLAG_FAILED;
 
-		if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
-			/* always fill result TF for failed qc */
+		/*
+		 * Finish internal commands without any further processing
+		 * and always with the result TF filled.
+		 */
+		if (unlikely(ata_tag_internal(qc->tag))) {
 			fill_result_tf(qc);
+			__ata_qc_complete(qc);
+			return;
+		}
 
-			if (!ata_tag_internal(qc->tag))
-				ata_qc_schedule_eh(qc);
-			else
-				__ata_qc_complete(qc);
+		/*
+		 * Non-internal qc has failed.  Fill the result TF and
+		 * summon EH.
+		 */
+		if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
+			fill_result_tf(qc);
+			ata_qc_schedule_eh(qc);
 			return;
 		}
 
@@ -5472,6 +5511,7 @@
  */
 int ata_host_suspend(struct ata_host *host, pm_message_t mesg)
 {
+	unsigned int ehi_flags = ATA_EHI_QUIET;
 	int rc;
 
 	/*
@@ -5480,7 +5520,18 @@
 	 */
 	ata_lpm_enable(host);
 
-	rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1);
+	/*
+	 * On some hardware, device fails to respond after spun down
+	 * for suspend.  As the device won't be used before being
+	 * resumed, we don't need to touch the device.  Ask EH to skip
+	 * the usual stuff and proceed directly to suspend.
+	 *
+	 * http://thread.gmane.org/gmane.linux.ide/46764
+	 */
+	if (mesg.event == PM_EVENT_SUSPEND)
+		ehi_flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_NO_RECOVERY;
+
+	rc = ata_host_request_pm(host, mesg, 0, ehi_flags, 1);
 	if (rc == 0)
 		host->dev->power.power_state = mesg;
 	return rc;
--- linux-mvl-dove-2.6.32.orig/drivers/ata/pata_mpc52xx.c
+++ linux-mvl-dove-2.6.32/drivers/ata/pata_mpc52xx.c
@@ -610,7 +610,7 @@
 };
 
 static struct ata_port_operations mpc52xx_ata_port_ops = {
-	.inherits		= &ata_sff_port_ops,
+	.inherits		= &ata_bmdma_port_ops,
 	.sff_dev_select		= mpc52xx_ata_dev_select,
 	.set_piomode		= mpc52xx_ata_set_piomode,
 	.set_dmamode		= mpc52xx_ata_set_dmamode,
--- linux-mvl-dove-2.6.32.orig/drivers/ata/sata_via.c
+++ linux-mvl-dove-2.6.32/drivers/ata/sata_via.c
@@ -40,6 +40,8 @@
 #include <linux/blkdev.h>
 #include <linux/delay.h>
 #include <linux/device.h>
+#include <scsi/scsi.h>
+#include <scsi/scsi_cmnd.h>
 #include <scsi/scsi_host.h>
 #include <linux/libata.h>
 
@@ -80,6 +82,7 @@
 static void svia_tf_load(struct ata_port *ap, const struct ata_taskfile *tf);
 static void svia_noop_freeze(struct ata_port *ap);
 static int vt6420_prereset(struct ata_link *link, unsigned long deadline);
+static void vt6420_bmdma_start(struct ata_queued_cmd *qc);
 static int vt6421_pata_cable_detect(struct ata_port *ap);
 static void vt6421_set_pio_mode(struct ata_port *ap, struct ata_device *adev);
 static void vt6421_set_dma_mode(struct ata_port *ap, struct ata_device *adev);
@@ -121,6 +124,7 @@
 	.inherits		= &svia_base_ops,
 	.freeze			= svia_noop_freeze,
 	.prereset		= vt6420_prereset,
+	.bmdma_start		= vt6420_bmdma_start,
 };
 
 static struct ata_port_operations vt6421_pata_ops = {
@@ -377,6 +381,17 @@
 	return 0;
 }
 
+static void vt6420_bmdma_start(struct ata_queued_cmd *qc)
+{
+	struct ata_port *ap = qc->ap;
+	if ((qc->tf.command == ATA_CMD_PACKET) &&
+	    (qc->scsicmd->sc_data_direction == DMA_TO_DEVICE)) {
+		/* Prevents corruption on some ATAPI burners */
+		ata_sff_pause(ap);
+	}
+	ata_bmdma_start(qc);
+}
+
 static int vt6421_pata_cable_detect(struct ata_port *ap)
 {
 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
@@ -558,6 +573,19 @@
 		tmp8 |= NATIVE_MODE_ALL;
 		pci_write_config_byte(pdev, SATA_NATIVE_MODE, tmp8);
 	}
+
+	/*
+	 * vt6421 has problems talking to some drives.  The following
+	 * is the magic fix from Joseph Chan <JosephChan@via.com.tw>.
+	 * Please add proper documentation if possible.
+	 *
+	 * https://bugzilla.kernel.org/show_bug.cgi?id=15173
+	 */
+	if (pdev->device == 0x3249) {
+		pci_read_config_byte(pdev, 0x52, &tmp8);
+		tmp8 |= 1 << 2;
+		pci_write_config_byte(pdev, 0x52, tmp8);
+	}
 }
 
 static int svia_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
--- linux-mvl-dove-2.6.32.orig/drivers/ata/ahci.c
+++ linux-mvl-dove-2.6.32/drivers/ata/ahci.c
@@ -113,6 +113,7 @@
 	board_ahci_mcp65	= 6,
 	board_ahci_nopmp	= 7,
 	board_ahci_yesncq	= 8,
+	board_ahci_nosntf	= 9,
 
 	/* global controller registers */
 	HOST_CAP		= 0x00, /* host capabilities */
@@ -235,6 +236,7 @@
 	AHCI_HFLAG_NO_SUSPEND		= (1 << 10), /* don't suspend */
 	AHCI_HFLAG_SRST_TOUT_IS_OFFLINE	= (1 << 11), /* treat SRST timeout as
 							link offline */
+	AHCI_HFLAG_NO_SNTF		= (1 << 12), /* no sntf */
 
 	/* ap->flags bits */
 
@@ -508,7 +510,7 @@
 		.udma_mask	= ATA_UDMA6,
 		.port_ops	= &ahci_ops,
 	},
-	/* board_ahci_yesncq */
+	[board_ahci_yesncq] =
 	{
 		AHCI_HFLAGS	(AHCI_HFLAG_YES_NCQ),
 		.flags		= AHCI_FLAG_COMMON,
@@ -516,6 +518,14 @@
 		.udma_mask	= ATA_UDMA6,
 		.port_ops	= &ahci_ops,
 	},
+	[board_ahci_nosntf] =
+	{
+		AHCI_HFLAGS	(AHCI_HFLAG_NO_SNTF),
+		.flags		= AHCI_FLAG_COMMON,
+		.pio_mask	= ATA_PIO4,
+		.udma_mask	= ATA_UDMA6,
+		.port_ops	= &ahci_ops,
+	},
 };
 
 static const struct pci_device_id ahci_pci_tbl[] = {
@@ -531,7 +541,7 @@
 	{ PCI_VDEVICE(INTEL, 0x2683), board_ahci }, /* ESB2 */
 	{ PCI_VDEVICE(INTEL, 0x27c6), board_ahci }, /* ICH7-M DH */
 	{ PCI_VDEVICE(INTEL, 0x2821), board_ahci }, /* ICH8 */
-	{ PCI_VDEVICE(INTEL, 0x2822), board_ahci }, /* ICH8 */
+	{ PCI_VDEVICE(INTEL, 0x2822), board_ahci_nosntf }, /* ICH8 */
 	{ PCI_VDEVICE(INTEL, 0x2824), board_ahci }, /* ICH8 */
 	{ PCI_VDEVICE(INTEL, 0x2829), board_ahci }, /* ICH8M */
 	{ PCI_VDEVICE(INTEL, 0x282a), board_ahci }, /* ICH8M */
@@ -560,6 +570,17 @@
 	{ PCI_VDEVICE(INTEL, 0x3b2b), board_ahci }, /* PCH RAID */
 	{ PCI_VDEVICE(INTEL, 0x3b2c), board_ahci }, /* PCH RAID */
 	{ PCI_VDEVICE(INTEL, 0x3b2f), board_ahci }, /* PCH AHCI */
+	{ PCI_VDEVICE(INTEL, 0x1c02), board_ahci }, /* CPT AHCI */
+	{ PCI_VDEVICE(INTEL, 0x1c03), board_ahci }, /* CPT AHCI */
+	{ PCI_VDEVICE(INTEL, 0x1c04), board_ahci }, /* CPT RAID */
+	{ PCI_VDEVICE(INTEL, 0x1c05), board_ahci }, /* CPT RAID */
+	{ PCI_VDEVICE(INTEL, 0x1c06), board_ahci }, /* CPT RAID */
+	{ PCI_VDEVICE(INTEL, 0x1c07), board_ahci }, /* CPT RAID */
+	{ PCI_VDEVICE(INTEL, 0x1d02), board_ahci }, /* PBG AHCI */
+	{ PCI_VDEVICE(INTEL, 0x1d04), board_ahci }, /* PBG RAID */
+	{ PCI_VDEVICE(INTEL, 0x1d06), board_ahci }, /* PBG RAID */
+	{ PCI_VDEVICE(INTEL, 0x2826), board_ahci }, /* PBG RAID */
+	{ PCI_VDEVICE(INTEL, 0x2323), board_ahci }, /* DH89xxCC AHCI */
 
 	/* JMicron 360/1/3/5/6, match class to avoid IDE function */
 	{ PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
@@ -849,6 +870,12 @@
 		cap &= ~HOST_CAP_PMP;
 	}
 
+	if ((cap & HOST_CAP_SNTF) && (hpriv->flags & AHCI_HFLAG_NO_SNTF)) {
+		dev_printk(KERN_INFO, &pdev->dev,
+			   "controller can't do SNTF, turning off CAP_SNTF\n");
+		cap &= ~HOST_CAP_SNTF;
+	}
+
 	if (pdev->vendor == PCI_VENDOR_ID_JMICRON && pdev->device == 0x2361 &&
 	    port_map != 1) {
 		dev_printk(KERN_INFO, &pdev->dev,
@@ -2815,6 +2842,14 @@
 		 * On HP dv[4-6] and HDX18 with earlier BIOSen, link
 		 * to the harddisk doesn't become online after
 		 * resuming from STR.  Warn and fail suspend.
+		 *
+		 * http://bugzilla.kernel.org/show_bug.cgi?id=12276
+		 *
+		 * Use dates instead of versions to match as HP is
+		 * apparently recycling both product and version
+		 * strings.
+		 *
+		 * http://bugzilla.kernel.org/show_bug.cgi?id=15462
 		 */
 		{
 			.ident = "dv4",
@@ -2823,7 +2858,7 @@
 				DMI_MATCH(DMI_PRODUCT_NAME,
 					  "HP Pavilion dv4 Notebook PC"),
 			},
-			.driver_data = "F.30", /* cutoff BIOS version */
+			.driver_data = "20090105",	/* F.30 */
 		},
 		{
 			.ident = "dv5",
@@ -2832,7 +2867,7 @@
 				DMI_MATCH(DMI_PRODUCT_NAME,
 					  "HP Pavilion dv5 Notebook PC"),
 			},
-			.driver_data = "F.16", /* cutoff BIOS version */
+			.driver_data = "20090506",	/* F.16 */
 		},
 		{
 			.ident = "dv6",
@@ -2841,7 +2876,7 @@
 				DMI_MATCH(DMI_PRODUCT_NAME,
 					  "HP Pavilion dv6 Notebook PC"),
 			},
-			.driver_data = "F.21",	/* cutoff BIOS version */
+			.driver_data = "20090423",	/* F.21 */
 		},
 		{
 			.ident = "HDX18",
@@ -2850,19 +2885,38 @@
 				DMI_MATCH(DMI_PRODUCT_NAME,
 					  "HP HDX18 Notebook PC"),
 			},
-			.driver_data = "F.23",	/* cutoff BIOS version */
+			.driver_data = "20090430",	/* F.23 */
+		},
+		/*
+		 * Acer eMachines G725 has the same problem.  BIOS
+		 * V1.03 is known to be broken.  V3.04 is known to
+		 * work.  Inbetween, there are V1.06, V2.06 and V3.03
+		 * that we don't have much idea about.  For now,
+		 * blacklist anything older than V3.04.
+		 *
+		 * http://bugzilla.kernel.org/show_bug.cgi?id=15104
+		 */
+		{
+			.ident = "G725",
+			.matches = {
+				DMI_MATCH(DMI_SYS_VENDOR, "eMachines"),
+				DMI_MATCH(DMI_PRODUCT_NAME, "eMachines G725"),
+			},
+			.driver_data = "20091216",	/* V3.04 */
 		},
 		{ }	/* terminate list */
 	};
 	const struct dmi_system_id *dmi = dmi_first_match(sysids);
-	const char *ver;
+	int year, month, date;
+	char buf[9];
 
 	if (!dmi || pdev->bus->number || pdev->devfn != PCI_DEVFN(0x1f, 2))
 		return false;
 
-	ver = dmi_get_system_info(DMI_BIOS_VERSION);
+	dmi_get_date(DMI_BIOS_DATE, &year, &month, &date);
+	snprintf(buf, sizeof(buf), "%04d%02d%02d", year, month, date);
 
-	return !ver || strcmp(ver, dmi->driver_data) < 0;
+	return strcmp(buf, dmi->driver_data) < 0;
 }
 
 static bool ahci_broken_online(struct pci_dev *pdev)
@@ -2988,6 +3042,16 @@
 	if (pdev->vendor == PCI_VENDOR_ID_MARVELL && !marvell_enable)
 		return -ENODEV;
 
+	/*
+	 * For some reason, MCP89 on MacBook 7,1 doesn't work with
+	 * ahci, use ata_generic instead.
+	 */
+	if (pdev->vendor == PCI_VENDOR_ID_NVIDIA &&
+	    pdev->device == PCI_DEVICE_ID_NVIDIA_NFORCE_MCP89_SATA &&
+	    pdev->subsystem_vendor == PCI_VENDOR_ID_APPLE &&
+	    pdev->subsystem_device == 0xcb89)
+		return -ENODEV;
+
 	/* acquire resources */
 	rc = pcim_enable_device(pdev);
 	if (rc)
@@ -3043,8 +3107,16 @@
 	ahci_save_initial_config(pdev, hpriv);
 
 	/* prepare host */
-	if (hpriv->cap & HOST_CAP_NCQ)
-		pi.flags |= ATA_FLAG_NCQ | ATA_FLAG_FPDMA_AA;
+	if (hpriv->cap & HOST_CAP_NCQ) {
+		pi.flags |= ATA_FLAG_NCQ;
+		/* Auto-activate optimization is supposed to be supported on
+		   all AHCI controllers indicating NCQ support, but it seems
+		   to be broken at least on some NVIDIA MCP79 chipsets.
+		   Until we get info on which NVIDIA chipsets don't have this
+		   issue, if any, disable AA on all NVIDIA AHCIs. */
+		if (pdev->vendor != PCI_VENDOR_ID_NVIDIA)
+			pi.flags |= ATA_FLAG_FPDMA_AA;
+	}
 
 	if (hpriv->cap & HOST_CAP_PMP)
 		pi.flags |= ATA_FLAG_PMP;
--- linux-mvl-dove-2.6.32.orig/drivers/ata/pata_cmd64x.c
+++ linux-mvl-dove-2.6.32/drivers/ata/pata_cmd64x.c
@@ -2,6 +2,7 @@
  * pata_cmd64x.c 	- CMD64x PATA for new ATA layer
  *			  (C) 2005 Red Hat Inc
  *			  Alan Cox <alan@lxorguk.ukuu.org.uk>
+ *			  (C) 2009-2010 Bartlomiej Zolnierkiewicz
  *
  * Based upon
  * linux/drivers/ide/pci/cmd64x.c		Version 1.30	Sept 10, 2002
@@ -39,11 +40,10 @@
 
 enum {
 	CFR 		= 0x50,
-		CFR_INTR_CH0  = 0x02,
-	CNTRL 		= 0x51,
-		CNTRL_DIS_RA0 = 0x40,
-		CNTRL_DIS_RA1 = 0x80,
-		CNTRL_ENA_2ND = 0x08,
+		CFR_INTR_CH0  = 0x04,
+	CNTRL		= 0x51,
+		CNTRL_CH0     = 0x04,
+		CNTRL_CH1     = 0x08,
 	CMDTIM 		= 0x52,
 	ARTTIM0 	= 0x53,
 	DRWTIM0 	= 0x54,
@@ -53,9 +53,6 @@
 		ARTTIM23_DIS_RA2  = 0x04,
 		ARTTIM23_DIS_RA3  = 0x08,
 		ARTTIM23_INTR_CH1 = 0x10,
-	ARTTIM2 	= 0x57,
-	ARTTIM3 	= 0x57,
-	DRWTIM23	= 0x58,
 	DRWTIM2 	= 0x58,
 	BRST 		= 0x59,
 	DRWTIM3 	= 0x5b,
@@ -63,14 +60,11 @@
 	MRDMODE		= 0x71,
 		MRDMODE_INTR_CH0 = 0x04,
 		MRDMODE_INTR_CH1 = 0x08,
-		MRDMODE_BLK_CH0  = 0x10,
-		MRDMODE_BLK_CH1	 = 0x20,
 	BMIDESR0	= 0x72,
 	UDIDETCR0	= 0x73,
 	DTPR0		= 0x74,
 	BMIDECR1	= 0x78,
 	BMIDECSR	= 0x79,
-	BMIDESR1	= 0x7A,
 	UDIDETCR1	= 0x7B,
 	DTPR1		= 0x7C
 };
@@ -147,7 +141,9 @@
 	/* Now convert the clocks into values we can actually stuff into
 	   the chip */
 
-	if (t.recover > 1)
+	if (t.recover == 16)
+		t.recover = 0;
+	else if (t.recover > 1)
 		t.recover--;
 	else
 		t.recover = 15;
@@ -219,7 +215,7 @@
 		regU |= udma_data[adev->dma_mode - XFER_UDMA_0] << shift;
 		/* Merge the control bits */
 		regU |= 1 << adev->devno; /* UDMA on */
-		if (adev->dma_mode > 2)	/* 15nS timing */
+		if (adev->dma_mode > XFER_UDMA_2) /* 15nS timing */
 			regU |= 4 << adev->devno;
 	} else {
 		regU &= ~ (1 << adev->devno);	/* UDMA off */
@@ -245,7 +241,7 @@
 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 	u8 dma_intr;
 	int dma_mask = ap->port_no ? ARTTIM23_INTR_CH1 : CFR_INTR_CH0;
-	int dma_reg = ap->port_no ? ARTTIM2 : CFR;
+	int dma_reg = ap->port_no ? ARTTIM23 : CFR;
 
 	ata_bmdma_stop(qc);
 
@@ -294,8 +290,6 @@
 
 static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
 {
-	u32 class_rev;
-
 	static const struct ata_port_info cmd_info[6] = {
 		{	/* CMD 643 - no UDMA */
 			.flags = ATA_FLAG_SLAVE_POSS,
@@ -337,27 +331,41 @@
 			.port_ops = &cmd648_port_ops
 		}
 	};
-	const struct ata_port_info *ppi[] = { &cmd_info[id->driver_data], NULL };
-	u8 mrdmode;
+	const struct ata_port_info *ppi[] = {
+		&cmd_info[id->driver_data],
+		&cmd_info[id->driver_data],
+		NULL
+	};
+	u8 mrdmode, reg;
 	int rc;
+	struct pci_dev *bridge = pdev->bus->self;
+	/* mobility split bridges don't report enabled ports correctly */
+	int port_ok = !(bridge && bridge->vendor ==
+			PCI_VENDOR_ID_MOBILITY_ELECTRONICS);
+	/* all (with exceptions below) apart from 643 have CNTRL_CH0 bit */
+	int cntrl_ch0_ok = (id->driver_data != 0);
 
 	rc = pcim_enable_device(pdev);
 	if (rc)
 		return rc;
 
-	pci_read_config_dword(pdev, PCI_CLASS_REVISION, &class_rev);
-	class_rev &= 0xFF;
-
 	if (id->driver_data == 0)	/* 643 */
 		ata_pci_bmdma_clear_simplex(pdev);
 
 	if (pdev->device == PCI_DEVICE_ID_CMD_646) {
 		/* Does UDMA work ? */
-		if (class_rev > 4)
+		if (pdev->revision > 4) {
 			ppi[0] = &cmd_info[2];
+			ppi[1] = &cmd_info[2];
+		}
 		/* Early rev with other problems ? */
-		else if (class_rev == 1)
+		else if (pdev->revision == 1) {
 			ppi[0] = &cmd_info[3];
+			ppi[1] = &cmd_info[3];
+		}
+		/* revs 1,2 have no CNTRL_CH0 */
+		if (pdev->revision < 3)
+			cntrl_ch0_ok = 0;
 	}
 
 	pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 64);
@@ -366,6 +374,20 @@
 	mrdmode |= 0x02;	/* Memory read line enable */
 	pci_write_config_byte(pdev, MRDMODE, mrdmode);
 
+	/* check for enabled ports */
+	pci_read_config_byte(pdev, CNTRL, &reg);
+	if (!port_ok)
+		dev_printk(KERN_NOTICE, &pdev->dev, "Mobility Bridge detected, ignoring CNTRL port enable/disable\n");
+	if (port_ok && cntrl_ch0_ok && !(reg & CNTRL_CH0)) {
+		dev_printk(KERN_NOTICE, &pdev->dev, "Primary port is disabled\n");
+		ppi[0] = &ata_dummy_port_info;
+
+	}
+	if (port_ok && !(reg & CNTRL_CH1)) {
+		dev_printk(KERN_NOTICE, &pdev->dev, "Secondary port is disabled\n");
+		ppi[1] = &ata_dummy_port_info;
+	}
+
 	/* Force PIO 0 here.. */
 
 	/* PPC specific fixup copied from old driver */
--- linux-mvl-dove-2.6.32.orig/drivers/ata/sata_mv.c
+++ linux-mvl-dove-2.6.32/drivers/ata/sata_mv.c
@@ -59,6 +59,7 @@
 #include <linux/dmapool.h>
 #include <linux/dma-mapping.h>
 #include <linux/device.h>
+#include <linux/clk.h>
 #include <linux/platform_device.h>
 #include <linux/ata_platform.h>
 #include <linux/mbus.h>
@@ -538,6 +539,7 @@
 
 struct mv_host_priv {
 	u32			hp_flags;
+	unsigned int 		board_idx;
 	u32			main_irq_mask;
 	struct mv_port_signal	signal[8];
 	const struct mv_hw_ops	*ops;
@@ -548,6 +550,10 @@
 	u32			irq_cause_offset;
 	u32			irq_mask_offset;
 	u32			unmask_all_irqs;
+
+#if defined(CONFIG_HAVE_CLK)
+	struct clk		*clk;
+#endif
 	/*
 	 * These consistent DMA memory pools give us guaranteed
 	 * alignment for hardware-accessed data structures,
@@ -1879,19 +1885,25 @@
  *	LOCKING:
  *	Inherited from caller.
  */
-static void mv_bmdma_stop(struct ata_queued_cmd *qc)
+static void mv_bmdma_stop_ap(struct ata_port *ap)
 {
-	struct ata_port *ap = qc->ap;
 	void __iomem *port_mmio = mv_ap_base(ap);
 	u32 cmd;
 
 	/* clear start/stop bit */
 	cmd = readl(port_mmio + BMDMA_CMD);
-	cmd &= ~ATA_DMA_START;
-	writelfl(cmd, port_mmio + BMDMA_CMD);
+	if (cmd & ATA_DMA_START) {
+		cmd &= ~ATA_DMA_START;
+		writelfl(cmd, port_mmio + BMDMA_CMD);
 
-	/* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
-	ata_sff_dma_pause(ap);
+		/* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
+		ata_sff_dma_pause(ap);
+	}
+}
+
+static void mv_bmdma_stop(struct ata_queued_cmd *qc)
+{
+	mv_bmdma_stop_ap(qc->ap);
 }
 
 /**
@@ -1915,8 +1927,21 @@
 	reg = readl(port_mmio + BMDMA_STATUS);
 	if (reg & ATA_DMA_ACTIVE)
 		status = ATA_DMA_ACTIVE;
-	else
+	else if (reg & ATA_DMA_ERR)
 		status = (reg & ATA_DMA_ERR) | ATA_DMA_INTR;
+	else {
+		/*
+		 * Just because DMA_ACTIVE is 0 (DMA completed),
+		 * this does _not_ mean the device is "done".
+		 * So we should not yet be signalling ATA_DMA_INTR
+		 * in some cases.  Eg. DSM/TRIM, and perhaps others.
+		 */
+		mv_bmdma_stop_ap(ap);
+		if (ioread8(ap->ioaddr.altstatus_addr) & ATA_BUSY)
+			status = 0;
+		else
+			status = ATA_DMA_INTR;
+	}
 	return status;
 }
 
@@ -1976,6 +2001,9 @@
 
 	switch (tf->protocol) {
 	case ATA_PROT_DMA:
+		if (tf->command == ATA_CMD_DSM)
+			return;
+		/* fall-thru */
 	case ATA_PROT_NCQ:
 		break;	/* continue below */
 	case ATA_PROT_PIO:
@@ -2075,6 +2103,8 @@
 	if ((tf->protocol != ATA_PROT_DMA) &&
 	    (tf->protocol != ATA_PROT_NCQ))
 		return;
+	if (tf->command == ATA_CMD_DSM)
+		return;  /* use bmdma for this */
 
 	/* Fill in Gen IIE command request block */
 	if (!(tf->flags & ATA_TFLAG_WRITE))
@@ -2270,6 +2300,12 @@
 
 	switch (qc->tf.protocol) {
 	case ATA_PROT_DMA:
+		if (qc->tf.command == ATA_CMD_DSM) {
+			if (!ap->ops->bmdma_setup)  /* no bmdma on GEN_I */
+				return AC_ERR_OTHER;
+			break;  /* use bmdma for this */
+		}
+		/* fall thru */
 	case ATA_PROT_NCQ:
 		mv_start_edma(ap, port_mmio, pp, qc->tf.protocol);
 		pp->req_idx = (pp->req_idx + 1) & MV_MAX_Q_DEPTH_MASK;
@@ -3393,7 +3429,7 @@
 	ZERO(0x024);		/* respq outp */
 	ZERO(0x020);		/* respq inp */
 	ZERO(0x02c);		/* test control */
-	writel(0xbc, port_mmio + EDMA_IORDY_TMOUT);
+	writel(0x800, port_mmio + EDMA_IORDY_TMOUT);
 }
 
 #undef ZERO
@@ -3854,7 +3890,6 @@
 /**
  *      mv_init_host - Perform some early initialization of the host.
  *	@host: ATA host to initialize
- *      @board_idx: controller index
  *
  *      If possible, do an early global reset of the host.  Then do
  *      our port init and clear/unmask all/relevant host interrupts.
@@ -3862,13 +3897,13 @@
  *      LOCKING:
  *      Inherited from caller.
  */
-static int mv_init_host(struct ata_host *host, unsigned int board_idx)
+static int mv_init_host(struct ata_host *host)
 {
 	int rc = 0, n_hc, port, hc;
 	struct mv_host_priv *hpriv = host->private_data;
 	void __iomem *mmio = hpriv->base;
 
-	rc = mv_chip_id(host, board_idx);
+	rc = mv_chip_id(host, hpriv->board_idx);
 	if (rc)
 		goto done;
 
@@ -3905,14 +3940,6 @@
 		void __iomem *port_mmio = mv_port_base(mmio, port);
 
 		mv_port_init(&ap->ioaddr, port_mmio);
-
-#ifdef CONFIG_PCI
-		if (!IS_SOC(hpriv)) {
-			unsigned int offset = port_mmio - mmio;
-			ata_port_pbar_desc(ap, MV_PRIMARY_BAR, -1, "mmio");
-			ata_port_pbar_desc(ap, MV_PRIMARY_BAR, offset, "port");
-		}
-#endif
 	}
 
 	for (hc = 0; hc < n_hc; hc++) {
@@ -4035,12 +4062,21 @@
 		return -ENOMEM;
 	host->private_data = hpriv;
 	hpriv->n_ports = n_ports;
+	hpriv->board_idx = chip_soc;
 
 	host->iomap = NULL;
 	hpriv->base = devm_ioremap(&pdev->dev, res->start,
 				   resource_size(res));
 	hpriv->base -= SATAHC0_REG_BASE;
 
+#if defined(CONFIG_HAVE_CLK)
+	hpriv->clk = clk_get(&pdev->dev, NULL);
+	if (IS_ERR(hpriv->clk))
+		dev_notice(&pdev->dev, "cannot get clkdev\n");
+	else
+		clk_enable(hpriv->clk);
+#endif
+
 	/*
 	 * (Re-)program MBUS remapping windows if we are asked to.
 	 */
@@ -4049,12 +4085,12 @@
 
 	rc = mv_create_dma_pools(hpriv, &pdev->dev);
 	if (rc)
-		return rc;
+		goto err;
 
 	/* initialize adapter */
-	rc = mv_init_host(host, chip_soc);
+	rc = mv_init_host(host);
 	if (rc)
-		return rc;
+		goto err;
 
 	dev_printk(KERN_INFO, &pdev->dev,
 		   "slots %u ports %d\n", (unsigned)MV_MAX_Q_DEPTH,
@@ -4062,6 +4098,15 @@
 
 	return ata_host_activate(host, platform_get_irq(pdev, 0), mv_interrupt,
 				 IRQF_SHARED, &mv6_sht);
+err:
+#if defined(CONFIG_HAVE_CLK)
+	if (!IS_ERR(hpriv->clk)) {
+		clk_disable(hpriv->clk);
+		clk_put(hpriv->clk);
+	}
+#endif
+
+	return rc;
 }
 
 /*
@@ -4076,14 +4121,66 @@
 {
 	struct device *dev = &pdev->dev;
 	struct ata_host *host = dev_get_drvdata(dev);
-
+#if defined(CONFIG_HAVE_CLK)
+	struct mv_host_priv *hpriv = host->private_data;
+#endif
 	ata_host_detach(host);
+
+#if defined(CONFIG_HAVE_CLK)
+	if (!IS_ERR(hpriv->clk)) {
+		clk_disable(hpriv->clk);
+		clk_put(hpriv->clk);
+	}
+#endif
 	return 0;
 }
 
+#ifdef CONFIG_PM
+static int mv_platform_suspend(struct platform_device *pdev, pm_message_t state)
+{
+        struct ata_host *host = dev_get_drvdata(&pdev->dev);
+        if (host)
+                return ata_host_suspend(host, state);
+        else
+                return 0;
+}
+
+static int mv_platform_resume(struct platform_device *pdev)
+{
+        struct ata_host *host = dev_get_drvdata(&pdev->dev);
+        int ret;
+
+        if (host) {
+		struct mv_host_priv *hpriv = host->private_data;
+		const struct mv_sata_platform_data *mv_platform_data = \
+			pdev->dev.platform_data;
+		/*
+		 * (Re-)program MBUS remapping windows if we are asked to.
+		 */
+		if (mv_platform_data->dram != NULL)
+			mv_conf_mbus_windows(hpriv, mv_platform_data->dram);
+
+		/* initialize adapter */
+		ret = mv_init_host(host);
+                if (ret) {
+                        printk(KERN_ERR DRV_NAME ": Error during HW init\n");
+                        return ret;
+                }
+                ata_host_resume(host);
+        }
+
+        return 0;
+}
+#else
+#define mv_platform_suspend NULL
+#define mv_platform_resume NULL
+#endif
+
 static struct platform_driver mv_platform_driver = {
 	.probe			= mv_platform_probe,
 	.remove			= __devexit_p(mv_platform_remove),
+	.suspend		= mv_platform_suspend,
+	.resume			= mv_platform_resume,
 	.driver			= {
 				   .name = DRV_NAME,
 				   .owner = THIS_MODULE,
@@ -4094,6 +4191,9 @@
 #ifdef CONFIG_PCI
 static int mv_pci_init_one(struct pci_dev *pdev,
 			   const struct pci_device_id *ent);
+#ifdef CONFIG_PM
+static int mv_pci_device_resume(struct pci_dev *pdev);
+#endif
 
 
 static struct pci_driver mv_pci_driver = {
@@ -4101,6 +4201,11 @@
 	.id_table		= mv_pci_tbl,
 	.probe			= mv_pci_init_one,
 	.remove			= ata_pci_remove_one,
+#ifdef CONFIG_PM
+	.suspend		= ata_pci_device_suspend,
+	.resume			= mv_pci_device_resume,
+#endif
+
 };
 
 /* move to PCI layer or libata core? */
@@ -4194,7 +4299,7 @@
 	const struct ata_port_info *ppi[] = { &mv_port_info[board_idx], NULL };
 	struct ata_host *host;
 	struct mv_host_priv *hpriv;
-	int n_ports, rc;
+	int n_ports, port, rc;
 
 	if (!printed_version++)
 		dev_printk(KERN_INFO, &pdev->dev, "version " DRV_VERSION "\n");
@@ -4208,6 +4313,7 @@
 		return -ENOMEM;
 	host->private_data = hpriv;
 	hpriv->n_ports = n_ports;
+	hpriv->board_idx = board_idx;
 
 	/* acquire resources */
 	rc = pcim_enable_device(pdev);
@@ -4230,8 +4336,17 @@
 	if (rc)
 		return rc;
 
+	for (port = 0; port < host->n_ports; port++) {
+		struct ata_port *ap = host->ports[port];
+		void __iomem *port_mmio = mv_port_base(hpriv->base, port);
+		unsigned int offset = port_mmio - hpriv->base;
+
+		ata_port_pbar_desc(ap, MV_PRIMARY_BAR, -1, "mmio");
+		ata_port_pbar_desc(ap, MV_PRIMARY_BAR, offset, "port");
+	}
+
 	/* initialize adapter */
-	rc = mv_init_host(host, board_idx);
+	rc = mv_init_host(host);
 	if (rc)
 		return rc;
 
@@ -4247,6 +4362,27 @@
 	return ata_host_activate(host, pdev->irq, mv_interrupt, IRQF_SHARED,
 				 IS_GEN_I(hpriv) ? &mv5_sht : &mv6_sht);
 }
+
+#ifdef CONFIG_PM
+static int mv_pci_device_resume(struct pci_dev *pdev)
+{
+	struct ata_host *host = dev_get_drvdata(&pdev->dev);
+	int rc;
+
+	rc = ata_pci_device_do_resume(pdev);
+	if (rc)
+		return rc;
+
+	/* initialize adapter */
+	rc = mv_init_host(host);
+	if (rc)
+		return rc;
+
+	ata_host_resume(host);
+
+	return 0;
+}
+#endif
 #endif
 
 static int mv_platform_probe(struct platform_device *pdev);
--- linux-mvl-dove-2.6.32.orig/drivers/ata/pata_hpt3x2n.c
+++ linux-mvl-dove-2.6.32/drivers/ata/pata_hpt3x2n.c
@@ -8,7 +8,7 @@
  * Copyright (C) 1999-2003		Andre Hedrick <andre@linux-ide.org>
  * Portions Copyright (C) 2001	        Sun Microsystems, Inc.
  * Portions Copyright (C) 2003		Red Hat Inc
- * Portions Copyright (C) 2005-2007	MontaVista Software, Inc.
+ * Portions Copyright (C) 2005-2009	MontaVista Software, Inc.
  *
  *
  * TODO
@@ -25,7 +25,7 @@
 #include <linux/libata.h>
 
 #define DRV_NAME	"pata_hpt3x2n"
-#define DRV_VERSION	"0.3.4"
+#define DRV_VERSION	"0.3.9"
 
 enum {
 	HPT_PCI_FAST	=	(1 << 31),
@@ -185,9 +185,8 @@
 
 	pci_read_config_dword(pdev, addr1, &reg);
 	mode = hpt3x2n_find_mode(ap, adev->pio_mode);
-	mode &= ~0x8000000;	/* No FIFO in PIO */
-	mode &= ~0x30070000;	/* Leave config bits alone */
-	reg &= 0x30070000;	/* Strip timing bits */
+	mode &= 0xCFC3FFFF;	/* Leave DMA bits alone */
+	reg &= ~0xCFC3FFFF;	/* Strip timing bits */
 	pci_write_config_dword(pdev, addr1, reg | mode);
 }
 
@@ -204,8 +203,7 @@
 {
 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 	u32 addr1, addr2;
-	u32 reg;
-	u32 mode;
+	u32 reg, mode, mask;
 	u8 fast;
 
 	addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no);
@@ -216,11 +214,12 @@
 	fast &= ~0x07;
 	pci_write_config_byte(pdev, addr2, fast);
 
+	mask = adev->dma_mode < XFER_UDMA_0 ? 0x31C001FF : 0x303C0000;
+
 	pci_read_config_dword(pdev, addr1, &reg);
 	mode = hpt3x2n_find_mode(ap, adev->dma_mode);
-	mode |= 0x8000000;	/* FIFO in MWDMA or UDMA */
-	mode &= ~0xC0000000;	/* Leave config bits alone */
-	reg &= 0xC0000000;	/* Strip timing bits */
+	mode &= mask;
+	reg &= ~mask;
 	pci_write_config_dword(pdev, addr1, reg | mode);
 }
 
@@ -263,7 +262,7 @@
 
 static void hpt3x2n_set_clock(struct ata_port *ap, int source)
 {
-	void __iomem *bmdma = ap->ioaddr.bmdma_addr;
+	void __iomem *bmdma = ap->ioaddr.bmdma_addr - ap->port_no * 8;
 
 	/* Tristate the bus */
 	iowrite8(0x80, bmdma+0x73);
@@ -273,9 +272,9 @@
 	iowrite8(source, bmdma+0x7B);
 	iowrite8(0xC0, bmdma+0x79);
 
-	/* Reset state machines */
-	iowrite8(0x37, bmdma+0x70);
-	iowrite8(0x37, bmdma+0x74);
+	/* Reset state machines, avoid enabling the disabled channels */
+	iowrite8(ioread8(bmdma+0x70) | 0x32, bmdma+0x70);
+	iowrite8(ioread8(bmdma+0x74) | 0x32, bmdma+0x74);
 
 	/* Complete reset */
 	iowrite8(0x00, bmdma+0x79);
@@ -285,21 +284,10 @@
 	iowrite8(0x00, bmdma+0x77);
 }
 
-/* Check if our partner interface is busy */
-
-static int hpt3x2n_pair_idle(struct ata_port *ap)
-{
-	struct ata_host *host = ap->host;
-	struct ata_port *pair = host->ports[ap->port_no ^ 1];
-
-	if (pair->hsm_task_state == HSM_ST_IDLE)
-		return 1;
-	return 0;
-}
-
 static int hpt3x2n_use_dpll(struct ata_port *ap, int writing)
 {
 	long flags = (long)ap->host->private_data;
+
 	/* See if we should use the DPLL */
 	if (writing)
 		return USE_DPLL;	/* Needed for write */
@@ -308,20 +296,35 @@
 	return 0;
 }
 
+static int hpt3x2n_qc_defer(struct ata_queued_cmd *qc)
+{
+	struct ata_port *ap = qc->ap;
+	struct ata_port *alt = ap->host->ports[ap->port_no ^ 1];
+	int rc, flags = (long)ap->host->private_data;
+	int dpll = hpt3x2n_use_dpll(ap, qc->tf.flags & ATA_TFLAG_WRITE);
+
+	/* First apply the usual rules */
+	rc = ata_std_qc_defer(qc);
+	if (rc != 0)
+		return rc;
+
+	if ((flags & USE_DPLL) != dpll && alt->qc_active)
+		return ATA_DEFER_PORT;
+	return 0;
+}
+
 static unsigned int hpt3x2n_qc_issue(struct ata_queued_cmd *qc)
 {
-	struct ata_taskfile *tf = &qc->tf;
 	struct ata_port *ap = qc->ap;
 	int flags = (long)ap->host->private_data;
+	int dpll = hpt3x2n_use_dpll(ap, qc->tf.flags & ATA_TFLAG_WRITE);
 
-	if (hpt3x2n_pair_idle(ap)) {
-		int dpll = hpt3x2n_use_dpll(ap, (tf->flags & ATA_TFLAG_WRITE));
-		if ((flags & USE_DPLL) != dpll) {
-			if (dpll == 1)
-				hpt3x2n_set_clock(ap, 0x21);
-			else
-				hpt3x2n_set_clock(ap, 0x23);
-		}
+	if ((flags & USE_DPLL) != dpll) {
+		flags &= ~USE_DPLL;
+		flags |= dpll;
+		ap->host->private_data = (void *)(long)flags;
+
+		hpt3x2n_set_clock(ap, dpll ? 0x21 : 0x23);
 	}
 	return ata_sff_qc_issue(qc);
 }
@@ -338,6 +341,8 @@
 	.inherits	= &ata_bmdma_port_ops,
 
 	.bmdma_stop	= hpt3x2n_bmdma_stop,
+
+	.qc_defer	= hpt3x2n_qc_defer,
 	.qc_issue	= hpt3x2n_qc_issue,
 
 	.cable_detect	= hpt3x2n_cable_detect,
@@ -447,41 +452,36 @@
 		.port_ops = &hpt3x2n_port_ops
 	};
 	const struct ata_port_info *ppi[] = { &info, NULL };
-
+	u8 rev = dev->revision;
 	u8 irqmask;
-	u32 class_rev;
-
 	unsigned int pci_mhz;
 	unsigned int f_low, f_high;
 	int adjust;
 	unsigned long iobase = pci_resource_start(dev, 4);
-	void *hpriv = NULL;
+	void *hpriv = (void *)USE_DPLL;
 	int rc;
 
 	rc = pcim_enable_device(dev);
 	if (rc)
 		return rc;
 
-	pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
-	class_rev &= 0xFF;
-
 	switch(dev->device) {
 		case PCI_DEVICE_ID_TTI_HPT366:
-			if (class_rev < 6)
+			if (rev < 6)
 				return -ENODEV;
 			break;
 		case PCI_DEVICE_ID_TTI_HPT371:
-			if (class_rev < 2)
+			if (rev < 2)
 				return -ENODEV;
 			/* 371N if rev > 1 */
 			break;
 		case PCI_DEVICE_ID_TTI_HPT372:
 			/* 372N if rev >= 2*/
-			if (class_rev < 2)
+			if (rev < 2)
 				return -ENODEV;
 			break;
 		case PCI_DEVICE_ID_TTI_HPT302:
-			if (class_rev < 2)
+			if (rev < 2)
 				return -ENODEV;
 			break;
 		case PCI_DEVICE_ID_TTI_HPT372N:
@@ -542,16 +542,16 @@
 	       pci_mhz);
 	/* Set our private data up. We only need a few flags so we use
 	   it directly */
-	if (pci_mhz > 60) {
-		hpriv = (void *)PCI66;
-		/*
-		 * On  HPT371N, if ATA clock is 66 MHz we must set bit 2 in
-		 * the MISC. register to stretch the UltraDMA Tss timing.
-		 * NOTE: This register is only writeable via I/O space.
-		 */
-		if (dev->device == PCI_DEVICE_ID_TTI_HPT371)
-			outb(inb(iobase + 0x9c) | 0x04, iobase + 0x9c);
-	}
+	if (pci_mhz > 60)
+		hpriv = (void *)(PCI66 | USE_DPLL);
+
+	/*
+	 * On  HPT371N, if ATA clock is 66 MHz we must set bit 2 in
+	 * the MISC. register to stretch the UltraDMA Tss timing.
+	 * NOTE: This register is only writeable via I/O space.
+	 */
+	if (dev->device == PCI_DEVICE_ID_TTI_HPT371)
+		outb(inb(iobase + 0x9c) | 0x04, iobase + 0x9c);
 
 	/* Now kick off ATA set up */
 	return ata_pci_sff_init_one(dev, ppi, &hpt3x2n_sht, hpriv);
--- linux-mvl-dove-2.6.32.orig/drivers/ata/pata_hpt366.c
+++ linux-mvl-dove-2.6.32/drivers/ata/pata_hpt366.c
@@ -344,7 +344,6 @@
 	const struct ata_port_info *ppi[] = { &info_hpt366, NULL };
 
 	void *hpriv = NULL;
-	u32 class_rev;
 	u32 reg1;
 	int rc;
 
@@ -352,13 +351,10 @@
 	if (rc)
 		return rc;
 
-	pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
-	class_rev &= 0xFF;
-
 	/* May be a later chip in disguise. Check */
 	/* Newer chips are not in the HPT36x driver. Ignore them */
-	if (class_rev > 2)
-			return -ENODEV;
+	if (dev->revision > 2)
+		return -ENODEV;
 
 	hpt36x_init_chipset(dev);
 
--- linux-mvl-dove-2.6.32.orig/drivers/watchdog/mtx-1_wdt.c
+++ linux-mvl-dove-2.6.32/drivers/watchdog/mtx-1_wdt.c
@@ -211,6 +211,12 @@
 	int ret;
 
 	mtx1_wdt_device.gpio = pdev->resource[0].start;
+	ret = gpio_request_one(mtx1_wdt_device.gpio,
+				GPIOF_OUT_INIT_HIGH, "mtx1-wdt");
+	if (ret < 0) {
+		dev_err(&pdev->dev, "failed to request gpio");
+		return ret;
+	}
 
 	spin_lock_init(&mtx1_wdt_device.lock);
 	init_completion(&mtx1_wdt_device.stop);
@@ -236,6 +242,8 @@
 		mtx1_wdt_device.queue = 0;
 		wait_for_completion(&mtx1_wdt_device.stop);
 	}
+
+	gpio_free(mtx1_wdt_device.gpio);
 	misc_deregister(&mtx1_wdt_misc);
 	return 0;
 }
--- linux-mvl-dove-2.6.32.orig/drivers/watchdog/bfin_wdt.c
+++ linux-mvl-dove-2.6.32/drivers/watchdog/bfin_wdt.c
@@ -1,9 +1,8 @@
 /*
  * Blackfin On-Chip Watchdog Driver
- *  Supports BF53[123]/BF53[467]/BF54[2489]/BF561
  *
  * Originally based on softdog.c
- * Copyright 2006-2007 Analog Devices Inc.
+ * Copyright 2006-2010 Analog Devices Inc.
  * Copyright 2006-2007 Michele d'Amico
  * Copyright 1996 Alan Cox <alan@lxorguk.ukuu.org.uk>
  *
@@ -137,13 +136,15 @@
  */
 static int bfin_wdt_set_timeout(unsigned long t)
 {
-	u32 cnt;
+	u32 cnt, max_t, sclk;
 	unsigned long flags;
 
-	stampit();
+	sclk = get_sclk();
+	max_t = -1 / sclk;
+	cnt = t * sclk;
+	stamp("maxtimeout=%us newtimeout=%lus (cnt=%#x)", max_t, t, cnt);
 
-	cnt = t * get_sclk();
-	if (cnt < get_sclk()) {
+	if (t > max_t) {
 		printk(KERN_WARNING PFX "timeout value is too large\n");
 		return -EINVAL;
 	}
--- linux-mvl-dove-2.6.32.orig/drivers/watchdog/hpwdt.c
+++ linux-mvl-dove-2.6.32/drivers/watchdog/hpwdt.c
@@ -443,7 +443,7 @@
 static int hpwdt_change_timer(int new_margin)
 {
 	/* Arbitrary, can't find the card's limits */
-	if (new_margin < 30 || new_margin > 600) {
+	if (new_margin < 5 || new_margin > 600) {
 		printk(KERN_WARNING
 			"hpwdt: New value passed in is invalid: %d seconds.\n",
 			new_margin);
--- linux-mvl-dove-2.6.32.orig/drivers/watchdog/iTCO_wdt.c
+++ linux-mvl-dove-2.6.32/drivers/watchdog/iTCO_wdt.c
@@ -1,5 +1,5 @@
 /*
- *	intel TCO Watchdog Driver (Used in i82801 and i63xxESB chipsets)
+ *	intel TCO Watchdog Driver
  *
  *	(c) Copyright 2006-2009 Wim Van Sebroeck <wim@iguana.be>.
  *
@@ -14,47 +14,24 @@
  *
  *	The TCO watchdog is implemented in the following I/O controller hubs:
  *	(See the intel documentation on http://developer.intel.com.)
- *	82801AA  (ICH)       : document number 290655-003, 290677-014,
- *	82801AB  (ICHO)      : document number 290655-003, 290677-014,
- *	82801BA  (ICH2)      : document number 290687-002, 298242-027,
- *	82801BAM (ICH2-M)    : document number 290687-002, 298242-027,
- *	82801CA  (ICH3-S)    : document number 290733-003, 290739-013,
- *	82801CAM (ICH3-M)    : document number 290716-001, 290718-007,
- *	82801DB  (ICH4)      : document number 290744-001, 290745-025,
- *	82801DBM (ICH4-M)    : document number 252337-001, 252663-008,
- *	82801E   (C-ICH)     : document number 273599-001, 273645-002,
- *	82801EB  (ICH5)      : document number 252516-001, 252517-028,
- *	82801ER  (ICH5R)     : document number 252516-001, 252517-028,
- *	6300ESB  (6300ESB)   : document number 300641-004, 300884-013,
- *	82801FB  (ICH6)      : document number 301473-002, 301474-026,
- *	82801FR  (ICH6R)     : document number 301473-002, 301474-026,
- *	82801FBM (ICH6-M)    : document number 301473-002, 301474-026,
- *	82801FW  (ICH6W)     : document number 301473-001, 301474-026,
- *	82801FRW (ICH6RW)    : document number 301473-001, 301474-026,
- *	631xESB  (631xESB)   : document number 313082-001, 313075-006,
- *	632xESB  (632xESB)   : document number 313082-001, 313075-006,
- *	82801GB  (ICH7)      : document number 307013-003, 307014-024,
- *	82801GR  (ICH7R)     : document number 307013-003, 307014-024,
- *	82801GDH (ICH7DH)    : document number 307013-003, 307014-024,
- *	82801GBM (ICH7-M)    : document number 307013-003, 307014-024,
- *	82801GHM (ICH7-M DH) : document number 307013-003, 307014-024,
- *	82801GU  (ICH7-U)    : document number 307013-003, 307014-024,
- *	82801HB  (ICH8)      : document number 313056-003, 313057-017,
- *	82801HR  (ICH8R)     : document number 313056-003, 313057-017,
- *	82801HBM (ICH8M)     : document number 313056-003, 313057-017,
- *	82801HH  (ICH8DH)    : document number 313056-003, 313057-017,
- *	82801HO  (ICH8DO)    : document number 313056-003, 313057-017,
- *	82801HEM (ICH8M-E)   : document number 313056-003, 313057-017,
- *	82801IB  (ICH9)      : document number 316972-004, 316973-012,
- *	82801IR  (ICH9R)     : document number 316972-004, 316973-012,
- *	82801IH  (ICH9DH)    : document number 316972-004, 316973-012,
- *	82801IO  (ICH9DO)    : document number 316972-004, 316973-012,
- *	82801IBM (ICH9M)     : document number 316972-004, 316973-012,
- *	82801IEM (ICH9M-E)   : document number 316972-004, 316973-012,
- *	82801JIB (ICH10)     : document number 319973-002, 319974-002,
- *	82801JIR (ICH10R)    : document number 319973-002, 319974-002,
- *	82801JD  (ICH10D)    : document number 319973-002, 319974-002,
- *	82801JDO (ICH10DO)   : document number 319973-002, 319974-002
+ *	document number 290655-003, 290677-014: 82801AA (ICH), 82801AB (ICHO)
+ *	document number 290687-002, 298242-027: 82801BA (ICH2)
+ *	document number 290733-003, 290739-013: 82801CA (ICH3-S)
+ *	document number 290716-001, 290718-007: 82801CAM (ICH3-M)
+ *	document number 290744-001, 290745-025: 82801DB (ICH4)
+ *	document number 252337-001, 252663-008: 82801DBM (ICH4-M)
+ *	document number 273599-001, 273645-002: 82801E (C-ICH)
+ *	document number 252516-001, 252517-028: 82801EB (ICH5), 82801ER (ICH5R)
+ *	document number 300641-004, 300884-013: 6300ESB
+ *	document number 301473-002, 301474-026: 82801F (ICH6)
+ *	document number 313082-001, 313075-006: 631xESB, 632xESB
+ *	document number 307013-003, 307014-024: 82801G (ICH7)
+ *	document number 313056-003, 313057-017: 82801H (ICH8)
+ *	document number 316972-004, 316973-012: 82801I (ICH9)
+ *	document number 319973-002, 319974-002: 82801J (ICH10)
+ *	document number 322169-001, 322170-003: 5 Series, 3400 Series (PCH)
+ *	document number 320066-003, 320257-008: EP80597 (IICH)
+ *	document number TBD                   : Cougar Point (CPT)
  */
 
 /*
@@ -122,6 +99,53 @@
 	TCO_ICH10R,	/* ICH10R */
 	TCO_ICH10D,	/* ICH10D */
 	TCO_ICH10DO,	/* ICH10DO */
+	TCO_PCH,	/* PCH Desktop Full Featured */
+	TCO_PCHM,	/* PCH Mobile Full Featured */
+	TCO_P55,	/* P55 */
+	TCO_PM55,	/* PM55 */
+	TCO_H55,	/* H55 */
+	TCO_QM57,	/* QM57 */
+	TCO_H57,	/* H57 */
+	TCO_HM55,	/* HM55 */
+	TCO_Q57,	/* Q57 */
+	TCO_HM57,	/* HM57 */
+	TCO_PCHMSFF,	/* PCH Mobile SFF Full Featured */
+	TCO_QS57,	/* QS57 */
+	TCO_3400,	/* 3400 */
+	TCO_3420,	/* 3420 */
+	TCO_3450,	/* 3450 */
+	TCO_EP80579,	/* EP80579 */
+	TCO_CPT1,	/* Cougar Point */
+	TCO_CPT2,	/* Cougar Point Desktop */
+	TCO_CPT3,	/* Cougar Point Mobile */
+	TCO_CPT4,	/* Cougar Point */
+	TCO_CPT5,	/* Cougar Point */
+	TCO_CPT6,	/* Cougar Point */
+	TCO_CPT7,	/* Cougar Point */
+	TCO_CPT8,	/* Cougar Point */
+	TCO_CPT9,	/* Cougar Point */
+	TCO_CPT10,	/* Cougar Point */
+	TCO_CPT11,	/* Cougar Point */
+	TCO_CPT12,	/* Cougar Point */
+	TCO_CPT13,	/* Cougar Point */
+	TCO_CPT14,	/* Cougar Point */
+	TCO_CPT15,	/* Cougar Point */
+	TCO_CPT16,	/* Cougar Point */
+	TCO_CPT17,	/* Cougar Point */
+	TCO_CPT18,	/* Cougar Point */
+	TCO_CPT19,	/* Cougar Point */
+	TCO_CPT20,	/* Cougar Point */
+	TCO_CPT21,	/* Cougar Point */
+	TCO_CPT22,	/* Cougar Point */
+	TCO_CPT23,	/* Cougar Point */
+	TCO_CPT24,	/* Cougar Point */
+	TCO_CPT25,	/* Cougar Point */
+	TCO_CPT26,	/* Cougar Point */
+	TCO_CPT27,	/* Cougar Point */
+	TCO_CPT28,	/* Cougar Point */
+	TCO_CPT29,	/* Cougar Point */
+	TCO_CPT30,	/* Cougar Point */
+	TCO_CPT31,	/* Cougar Point */
 };
 
 static struct {
@@ -162,6 +186,53 @@
 	{"ICH10R", 2},
 	{"ICH10D", 2},
 	{"ICH10DO", 2},
+	{"PCH Desktop Full Featured", 2},
+	{"PCH Mobile Full Featured", 2},
+	{"P55", 2},
+	{"PM55", 2},
+	{"H55", 2},
+	{"QM57", 2},
+	{"H57", 2},
+	{"HM55", 2},
+	{"Q57", 2},
+	{"HM57", 2},
+	{"PCH Mobile SFF Full Featured", 2},
+	{"QS57", 2},
+	{"3400", 2},
+	{"3420", 2},
+	{"3450", 2},
+	{"EP80579", 2},
+	{"Cougar Point", 2},
+	{"Cougar Point", 2},
+	{"Cougar Point", 2},
+	{"Cougar Point", 2},
+	{"Cougar Point", 2},
+	{"Cougar Point", 2},
+	{"Cougar Point", 2},
+	{"Cougar Point", 2},
+	{"Cougar Point", 2},
+	{"Cougar Point", 2},
+	{"Cougar Point", 2},
+	{"Cougar Point", 2},
+	{"Cougar Point", 2},
+	{"Cougar Point", 2},
+	{"Cougar Point", 2},
+	{"Cougar Point", 2},
+	{"Cougar Point", 2},
+	{"Cougar Point", 2},
+	{"Cougar Point", 2},
+	{"Cougar Point", 2},
+	{"Cougar Point", 2},
+	{"Cougar Point", 2},
+	{"Cougar Point", 2},
+	{"Cougar Point", 2},
+	{"Cougar Point", 2},
+	{"Cougar Point", 2},
+	{"Cougar Point", 2},
+	{"Cougar Point", 2},
+	{"Cougar Point", 2},
+	{"Cougar Point", 2},
+	{"Cougar Point", 2},
 	{NULL, 0}
 };
 
@@ -230,6 +301,53 @@
 	{ ITCO_PCI_DEVICE(0x3a16,				TCO_ICH10R)},
 	{ ITCO_PCI_DEVICE(0x3a1a,				TCO_ICH10D)},
 	{ ITCO_PCI_DEVICE(0x3a14,				TCO_ICH10DO)},
+	{ ITCO_PCI_DEVICE(0x3b00,				TCO_PCH)},
+	{ ITCO_PCI_DEVICE(0x3b01,				TCO_PCHM)},
+	{ ITCO_PCI_DEVICE(0x3b02,				TCO_P55)},
+	{ ITCO_PCI_DEVICE(0x3b03,				TCO_PM55)},
+	{ ITCO_PCI_DEVICE(0x3b06,				TCO_H55)},
+	{ ITCO_PCI_DEVICE(0x3b07,				TCO_QM57)},
+	{ ITCO_PCI_DEVICE(0x3b08,				TCO_H57)},
+	{ ITCO_PCI_DEVICE(0x3b09,				TCO_HM55)},
+	{ ITCO_PCI_DEVICE(0x3b0a,				TCO_Q57)},
+	{ ITCO_PCI_DEVICE(0x3b0b,				TCO_HM57)},
+	{ ITCO_PCI_DEVICE(0x3b0d,				TCO_PCHMSFF)},
+	{ ITCO_PCI_DEVICE(0x3b0f,				TCO_QS57)},
+	{ ITCO_PCI_DEVICE(0x3b12,				TCO_3400)},
+	{ ITCO_PCI_DEVICE(0x3b14,				TCO_3420)},
+	{ ITCO_PCI_DEVICE(0x3b16,				TCO_3450)},
+	{ ITCO_PCI_DEVICE(0x5031,				TCO_EP80579)},
+	{ ITCO_PCI_DEVICE(0x1c41,				TCO_CPT1)},
+	{ ITCO_PCI_DEVICE(0x1c42,				TCO_CPT2)},
+	{ ITCO_PCI_DEVICE(0x1c43,				TCO_CPT3)},
+	{ ITCO_PCI_DEVICE(0x1c44,				TCO_CPT4)},
+	{ ITCO_PCI_DEVICE(0x1c45,				TCO_CPT5)},
+	{ ITCO_PCI_DEVICE(0x1c46,				TCO_CPT6)},
+	{ ITCO_PCI_DEVICE(0x1c47,				TCO_CPT7)},
+	{ ITCO_PCI_DEVICE(0x1c48,				TCO_CPT8)},
+	{ ITCO_PCI_DEVICE(0x1c49,				TCO_CPT9)},
+	{ ITCO_PCI_DEVICE(0x1c4a,				TCO_CPT10)},
+	{ ITCO_PCI_DEVICE(0x1c4b,				TCO_CPT11)},
+	{ ITCO_PCI_DEVICE(0x1c4c,				TCO_CPT12)},
+	{ ITCO_PCI_DEVICE(0x1c4d,				TCO_CPT13)},
+	{ ITCO_PCI_DEVICE(0x1c4e,				TCO_CPT14)},
+	{ ITCO_PCI_DEVICE(0x1c4f,				TCO_CPT15)},
+	{ ITCO_PCI_DEVICE(0x1c50,				TCO_CPT16)},
+	{ ITCO_PCI_DEVICE(0x1c51,				TCO_CPT17)},
+	{ ITCO_PCI_DEVICE(0x1c52,				TCO_CPT18)},
+	{ ITCO_PCI_DEVICE(0x1c53,				TCO_CPT19)},
+	{ ITCO_PCI_DEVICE(0x1c54,				TCO_CPT20)},
+	{ ITCO_PCI_DEVICE(0x1c55,				TCO_CPT21)},
+	{ ITCO_PCI_DEVICE(0x1c56,				TCO_CPT22)},
+	{ ITCO_PCI_DEVICE(0x1c57,				TCO_CPT23)},
+	{ ITCO_PCI_DEVICE(0x1c58,				TCO_CPT24)},
+	{ ITCO_PCI_DEVICE(0x1c59,				TCO_CPT25)},
+	{ ITCO_PCI_DEVICE(0x1c5a,				TCO_CPT26)},
+	{ ITCO_PCI_DEVICE(0x1c5b,				TCO_CPT27)},
+	{ ITCO_PCI_DEVICE(0x1c5c,				TCO_CPT28)},
+	{ ITCO_PCI_DEVICE(0x1c5d,				TCO_CPT29)},
+	{ ITCO_PCI_DEVICE(0x1c5e,				TCO_CPT30)},
+	{ ITCO_PCI_DEVICE(0x1c5f,				TCO_CPT31)},
 	{ 0, },			/* End of list */
 };
 MODULE_DEVICE_TABLE(pci, iTCO_wdt_pci_tbl);
--- linux-mvl-dove-2.6.32.orig/drivers/infiniband/ulp/iser/iser_memory.c
+++ linux-mvl-dove-2.6.32/drivers/infiniband/ulp/iser/iser_memory.c
@@ -209,6 +209,8 @@
 	mem_copy->copy_buf = NULL;
 }
 
+#define IS_4K_ALIGNED(addr)	((((unsigned long)addr) & ~MASK_4K) == 0)
+
 /**
  * iser_sg_to_page_vec - Translates scatterlist entries to physical addresses
  * and returns the length of resulting physical address array (may be less than
@@ -221,62 +223,52 @@
  * where --few fragments of the same page-- are present in the SG as
  * consecutive elements. Also, it handles one entry SG.
  */
+
 static int iser_sg_to_page_vec(struct iser_data_buf *data,
 			       struct iser_page_vec *page_vec,
 			       struct ib_device *ibdev)
 {
-	struct scatterlist *sgl = (struct scatterlist *)data->buf;
-	struct scatterlist *sg;
-	u64 first_addr, last_addr, page;
-	int end_aligned;
-	unsigned int cur_page = 0;
+	struct scatterlist *sg, *sgl = (struct scatterlist *)data->buf;
+	u64 start_addr, end_addr, page, chunk_start = 0;
 	unsigned long total_sz = 0;
-	int i;
+	unsigned int dma_len;
+	int i, new_chunk, cur_page, last_ent = data->dma_nents - 1;
 
 	/* compute the offset of first element */
 	page_vec->offset = (u64) sgl[0].offset & ~MASK_4K;
 
+	new_chunk = 1;
+	cur_page  = 0;
 	for_each_sg(sgl, sg, data->dma_nents, i) {
-		unsigned int dma_len = ib_sg_dma_len(ibdev, sg);
-
+		start_addr = ib_sg_dma_address(ibdev, sg);
+		if (new_chunk)
+			chunk_start = start_addr;
+		dma_len = ib_sg_dma_len(ibdev, sg);
+		end_addr = start_addr + dma_len;
 		total_sz += dma_len;
 
-		first_addr = ib_sg_dma_address(ibdev, sg);
-		last_addr  = first_addr + dma_len;
-
-		end_aligned   = !(last_addr  & ~MASK_4K);
-
-		/* continue to collect page fragments till aligned or SG ends */
-		while (!end_aligned && (i + 1 < data->dma_nents)) {
-			sg = sg_next(sg);
-			i++;
-			dma_len = ib_sg_dma_len(ibdev, sg);
-			total_sz += dma_len;
-			last_addr = ib_sg_dma_address(ibdev, sg) + dma_len;
-			end_aligned = !(last_addr  & ~MASK_4K);
+		/* collect page fragments until aligned or end of SG list */
+		if (!IS_4K_ALIGNED(end_addr) && i < last_ent) {
+			new_chunk = 0;
+			continue;
 		}
+		new_chunk = 1;
 
-		/* handle the 1st page in the 1st DMA element */
-		if (cur_page == 0) {
-			page = first_addr & MASK_4K;
-			page_vec->pages[cur_page] = page;
-			cur_page++;
+		/* address of the first page in the contiguous chunk;
+		   masking relevant for the very first SG entry,
+		   which might be unaligned */
+		page = chunk_start & MASK_4K;
+		do {
+			page_vec->pages[cur_page++] = page;
 			page += SIZE_4K;
-		} else
-			page = first_addr;
-
-		for (; page < last_addr; page += SIZE_4K) {
-			page_vec->pages[cur_page] = page;
-			cur_page++;
-		}
-
+		} while (page < end_addr);
 	}
+
 	page_vec->data_size = total_sz;
 	iser_dbg("page_vec->data_size:%d cur_page %d\n", page_vec->data_size,cur_page);
 	return cur_page;
 }
 
-#define IS_4K_ALIGNED(addr)	((((unsigned long)addr) & ~MASK_4K) == 0)
 
 /**
  * iser_data_buf_aligned_len - Tries to determine the maximal correctly aligned
@@ -284,42 +276,40 @@
  * the number of entries which are aligned correctly. Supports the case where
  * consecutive SG elements are actually fragments of the same physcial page.
  */
-static unsigned int iser_data_buf_aligned_len(struct iser_data_buf *data,
-					      struct ib_device *ibdev)
+static int iser_data_buf_aligned_len(struct iser_data_buf *data,
+				      struct ib_device *ibdev)
 {
-	struct scatterlist *sgl, *sg;
-	u64 end_addr, next_addr;
-	int i, cnt;
-	unsigned int ret_len = 0;
+	struct scatterlist *sgl, *sg, *next_sg = NULL;
+	u64 start_addr, end_addr;
+	int i, ret_len, start_check = 0;
+
+	if (data->dma_nents == 1)
+		return 1;
 
 	sgl = (struct scatterlist *)data->buf;
+	start_addr  = ib_sg_dma_address(ibdev, sgl);
 
-	cnt = 0;
 	for_each_sg(sgl, sg, data->dma_nents, i) {
-		/* iser_dbg("Checking sg iobuf [%d]: phys=0x%08lX "
-		   "offset: %ld sz: %ld\n", i,
-		   (unsigned long)sg_phys(sg),
-		   (unsigned long)sg->offset,
-		   (unsigned long)sg->length); */
-		end_addr = ib_sg_dma_address(ibdev, sg) +
-			   ib_sg_dma_len(ibdev, sg);
-		/* iser_dbg("Checking sg iobuf end address "
-		       "0x%08lX\n", end_addr); */
-		if (i + 1 < data->dma_nents) {
-			next_addr = ib_sg_dma_address(ibdev, sg_next(sg));
-			/* are i, i+1 fragments of the same page? */
-			if (end_addr == next_addr) {
-				cnt++;
-				continue;
-			} else if (!IS_4K_ALIGNED(end_addr)) {
-				ret_len = cnt + 1;
-				break;
-			}
-		}
-		cnt++;
+		if (start_check && !IS_4K_ALIGNED(start_addr))
+			break;
+
+		next_sg = sg_next(sg);
+		if (!next_sg)
+			break;
+
+		end_addr    = start_addr + ib_sg_dma_len(ibdev, sg);
+		start_addr  = ib_sg_dma_address(ibdev, next_sg);
+
+		if (end_addr == start_addr) {
+			start_check = 0;
+			continue;
+		} else
+			start_check = 1;
+
+		if (!IS_4K_ALIGNED(end_addr))
+			break;
 	}
-	if (i == data->dma_nents)
-		ret_len = cnt;	/* loop ended */
+	ret_len = (next_sg) ? i : i+1;
 	iser_dbg("Found %d aligned entries out of %d in sg:0x%p\n",
 		 ret_len, data->dma_nents, data);
 	return ret_len;
--- linux-mvl-dove-2.6.32.orig/drivers/infiniband/ulp/ipoib/ipoib_cm.c
+++ linux-mvl-dove-2.6.32/drivers/infiniband/ulp/ipoib/ipoib_cm.c
@@ -752,6 +752,8 @@
 		if (++priv->tx_outstanding == ipoib_sendq_size) {
 			ipoib_dbg(priv, "TX ring 0x%x full, stopping kernel net queue\n",
 				  tx->qp->qp_num);
+			if (ib_req_notify_cq(priv->send_cq, IB_CQ_NEXT_COMP))
+				ipoib_warn(priv, "request notify on send CQ failed\n");
 			netif_stop_queue(dev);
 		}
 	}
--- linux-mvl-dove-2.6.32.orig/drivers/infiniband/ulp/ipoib/ipoib_main.c
+++ linux-mvl-dove-2.6.32/drivers/infiniband/ulp/ipoib/ipoib_main.c
@@ -884,6 +884,7 @@
 
 	neigh->neighbour = neighbour;
 	neigh->dev = dev;
+	memset(&neigh->dgid.raw, 0, sizeof (union ib_gid));
 	*to_ipoib_neigh(neighbour) = neigh;
 	skb_queue_head_init(&neigh->queue);
 	ipoib_cm_set(neigh, NULL);
@@ -1162,7 +1163,7 @@
 
 	return ret ? ret : count;
 }
-static DEVICE_ATTR(create_child, S_IWUGO, NULL, create_child);
+static DEVICE_ATTR(create_child, S_IWUSR, NULL, create_child);
 
 static ssize_t delete_child(struct device *dev,
 			    struct device_attribute *attr,
@@ -1182,7 +1183,7 @@
 	return ret ? ret : count;
 
 }
-static DEVICE_ATTR(delete_child, S_IWUGO, NULL, delete_child);
+static DEVICE_ATTR(delete_child, S_IWUSR, NULL, delete_child);
 
 int ipoib_add_pkey_attr(struct net_device *dev)
 {
--- linux-mvl-dove-2.6.32.orig/drivers/infiniband/hw/cxgb3/iwch_cm.c
+++ linux-mvl-dove-2.6.32/drivers/infiniband/hw/cxgb3/iwch_cm.c
@@ -486,7 +486,8 @@
 	    V_MSS_IDX(mtu_idx) |
 	    V_L2T_IDX(ep->l2t->idx) | V_TX_CHANNEL(ep->l2t->smt_idx);
 	opt0l = V_TOS((ep->tos >> 2) & M_TOS) | V_RCV_BUFSIZ(rcv_win>>10);
-	opt2 = V_FLAVORS_VALID(1) | V_CONG_CONTROL_FLAVOR(cong_flavor);
+	opt2 = F_RX_COALESCE_VALID | V_RX_COALESCE(0) | V_FLAVORS_VALID(1) |
+	       V_CONG_CONTROL_FLAVOR(cong_flavor);
 	skb->priority = CPL_PRIORITY_SETUP;
 	set_arp_failure_handler(skb, act_open_req_arp_failure);
 
@@ -1303,7 +1304,8 @@
 	    V_MSS_IDX(mtu_idx) |
 	    V_L2T_IDX(ep->l2t->idx) | V_TX_CHANNEL(ep->l2t->smt_idx);
 	opt0l = V_TOS((ep->tos >> 2) & M_TOS) | V_RCV_BUFSIZ(rcv_win>>10);
-	opt2 = V_FLAVORS_VALID(1) | V_CONG_CONTROL_FLAVOR(cong_flavor);
+	opt2 = F_RX_COALESCE_VALID | V_RX_COALESCE(0) | V_FLAVORS_VALID(1) |
+	       V_CONG_CONTROL_FLAVOR(cong_flavor);
 
 	rpl = cplhdr(skb);
 	rpl->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_FORWARD));
--- linux-mvl-dove-2.6.32.orig/drivers/infiniband/hw/ipath/ipath_fs.c
+++ linux-mvl-dove-2.6.32/drivers/infiniband/hw/ipath/ipath_fs.c
@@ -346,10 +346,8 @@
 	list_for_each_entry_safe(dd, tmp, &ipath_dev_list, ipath_list) {
 		spin_unlock_irqrestore(&ipath_devs_lock, flags);
 		ret = create_device_files(sb, dd);
-		if (ret) {
-			deactivate_locked_super(sb);
+		if (ret)
 			goto bail;
-		}
 		spin_lock_irqsave(&ipath_devs_lock, flags);
 	}
 
--- linux-mvl-dove-2.6.32.orig/drivers/infiniband/core/uverbs_cmd.c
+++ linux-mvl-dove-2.6.32/drivers/infiniband/core/uverbs_cmd.c
@@ -875,68 +875,81 @@
 	return ret ? ret : in_len;
 }
 
+static int copy_wc_to_user(void __user *dest, struct ib_wc *wc)
+{
+	struct ib_uverbs_wc tmp;
+
+	tmp.wr_id		= wc->wr_id;
+	tmp.status		= wc->status;
+	tmp.opcode		= wc->opcode;
+	tmp.vendor_err		= wc->vendor_err;
+	tmp.byte_len		= wc->byte_len;
+	tmp.ex.imm_data		= (__u32 __force) wc->ex.imm_data;
+	tmp.qp_num		= wc->qp->qp_num;
+	tmp.src_qp		= wc->src_qp;
+	tmp.wc_flags		= wc->wc_flags;
+	tmp.pkey_index		= wc->pkey_index;
+	tmp.slid		= wc->slid;
+	tmp.sl			= wc->sl;
+	tmp.dlid_path_bits	= wc->dlid_path_bits;
+	tmp.port_num		= wc->port_num;
+	tmp.reserved		= 0;
+
+	if (copy_to_user(dest, &tmp, sizeof tmp))
+		return -EFAULT;
+
+	return 0;
+}
+
 ssize_t ib_uverbs_poll_cq(struct ib_uverbs_file *file,
 			  const char __user *buf, int in_len,
 			  int out_len)
 {
 	struct ib_uverbs_poll_cq       cmd;
-	struct ib_uverbs_poll_cq_resp *resp;
+	struct ib_uverbs_poll_cq_resp  resp;
+	u8 __user                     *header_ptr;
+	u8 __user                     *data_ptr;
 	struct ib_cq                  *cq;
-	struct ib_wc                  *wc;
-	int                            ret = 0;
-	int                            i;
-	int                            rsize;
+	struct ib_wc                   wc;
+	int                            ret;
 
 	if (copy_from_user(&cmd, buf, sizeof cmd))
 		return -EFAULT;
 
-	wc = kmalloc(cmd.ne * sizeof *wc, GFP_KERNEL);
-	if (!wc)
-		return -ENOMEM;
-
-	rsize = sizeof *resp + cmd.ne * sizeof(struct ib_uverbs_wc);
-	resp = kmalloc(rsize, GFP_KERNEL);
-	if (!resp) {
-		ret = -ENOMEM;
-		goto out_wc;
-	}
-
 	cq = idr_read_cq(cmd.cq_handle, file->ucontext, 0);
-	if (!cq) {
-		ret = -EINVAL;
-		goto out;
-	}
+	if (!cq)
+		return -EINVAL;
 
-	resp->count = ib_poll_cq(cq, cmd.ne, wc);
+	/* we copy a struct ib_uverbs_poll_cq_resp to user space */
+	header_ptr = (void __user *)(unsigned long) cmd.response;
+	data_ptr = header_ptr + sizeof resp;
 
-	put_cq_read(cq);
+	memset(&resp, 0, sizeof resp);
+	while (resp.count < cmd.ne) {
+		ret = ib_poll_cq(cq, 1, &wc);
+		if (ret < 0)
+			goto out_put;
+		if (!ret)
+			break;
+
+		ret = copy_wc_to_user(data_ptr, &wc);
+		if (ret)
+			goto out_put;
 
-	for (i = 0; i < resp->count; i++) {
-		resp->wc[i].wr_id 	   = wc[i].wr_id;
-		resp->wc[i].status 	   = wc[i].status;
-		resp->wc[i].opcode 	   = wc[i].opcode;
-		resp->wc[i].vendor_err 	   = wc[i].vendor_err;
-		resp->wc[i].byte_len 	   = wc[i].byte_len;
-		resp->wc[i].ex.imm_data    = (__u32 __force) wc[i].ex.imm_data;
-		resp->wc[i].qp_num 	   = wc[i].qp->qp_num;
-		resp->wc[i].src_qp 	   = wc[i].src_qp;
-		resp->wc[i].wc_flags 	   = wc[i].wc_flags;
-		resp->wc[i].pkey_index 	   = wc[i].pkey_index;
-		resp->wc[i].slid 	   = wc[i].slid;
-		resp->wc[i].sl 		   = wc[i].sl;
-		resp->wc[i].dlid_path_bits = wc[i].dlid_path_bits;
-		resp->wc[i].port_num 	   = wc[i].port_num;
+		data_ptr += sizeof(struct ib_uverbs_wc);
+		++resp.count;
 	}
 
-	if (copy_to_user((void __user *) (unsigned long) cmd.response, resp, rsize))
+	if (copy_to_user(header_ptr, &resp, sizeof resp)) {
 		ret = -EFAULT;
+		goto out_put;
+	}
 
-out:
-	kfree(resp);
+	ret = in_len;
 
-out_wc:
-	kfree(wc);
-	return ret ? ret : in_len;
+out_put:
+	put_cq_read(cq);
+	return ret;
 }
 
 ssize_t ib_uverbs_req_notify_cq(struct ib_uverbs_file *file,
--- linux-mvl-dove-2.6.32.orig/drivers/infiniband/core/cm.c
+++ linux-mvl-dove-2.6.32/drivers/infiniband/core/cm.c
@@ -2986,6 +2986,7 @@
 		goto out; /* No match. */
 	}
 	atomic_inc(&cur_cm_id_priv->refcount);
+	atomic_inc(&cm_id_priv->refcount);
 	spin_unlock_irq(&cm.lock);
 
 	cm_id_priv->id.cm_handler = cur_cm_id_priv->id.cm_handler;
--- linux-mvl-dove-2.6.32.orig/drivers/infiniband/core/cma.c
+++ linux-mvl-dove-2.6.32/drivers/infiniband/core/cma.c
@@ -1138,6 +1138,11 @@
 	cm_id->context = conn_id;
 	cm_id->cm_handler = cma_ib_handler;
 
+	/*
+	 * Protect against the user destroying conn_id from another thread
+	 * until we're done accessing it.
+	 */
+	atomic_inc(&conn_id->refcount);
 	ret = conn_id->id.event_handler(&conn_id->id, &event);
 	if (!ret) {
 		/*
@@ -1150,8 +1155,10 @@
 			ib_send_cm_mra(cm_id, CMA_CM_MRA_SETTING, NULL, 0);
 		mutex_unlock(&lock);
 		mutex_unlock(&conn_id->handler_mutex);
+		cma_deref_id(conn_id);
 		goto out;
 	}
+	cma_deref_id(conn_id);
 
 	/* Destroy the CM ID by returning a non-zero value. */
 	conn_id->cm_id.ib = NULL;
@@ -1353,17 +1360,25 @@
 	event.param.conn.private_data_len = iw_event->private_data_len;
 	event.param.conn.initiator_depth = attr.max_qp_init_rd_atom;
 	event.param.conn.responder_resources = attr.max_qp_rd_atom;
+
+	/*
+	 * Protect against the user destroying conn_id from another thread
+	 * until we're done accessing it.
+	 */
+	atomic_inc(&conn_id->refcount);
 	ret = conn_id->id.event_handler(&conn_id->id, &event);
 	if (ret) {
 		/* User wants to destroy the CM ID */
 		conn_id->cm_id.iw = NULL;
 		cma_exch(conn_id, CMA_DESTROYING);
 		mutex_unlock(&conn_id->handler_mutex);
+		cma_deref_id(conn_id);
 		rdma_destroy_id(&conn_id->id);
 		goto out;
 	}
 
 	mutex_unlock(&conn_id->handler_mutex);
+	cma_deref_id(conn_id);
 
 out:
 	if (dev)
--- linux-mvl-dove-2.6.32.orig/drivers/regulator/core.c
+++ linux-mvl-dove-2.6.32/drivers/regulator/core.c
@@ -640,7 +640,7 @@
 static void print_constraints(struct regulator_dev *rdev)
 {
 	struct regulation_constraints *constraints = rdev->constraints;
-	char buf[80];
+	char buf[80] = "";
 	int count;
 
 	if (rdev->desc->type == REGULATOR_VOLTAGE) {
--- linux-mvl-dove-2.6.32.orig/drivers/regulator/wm8350-regulator.c
+++ linux-mvl-dove-2.6.32/drivers/regulator/wm8350-regulator.c
@@ -1504,7 +1504,8 @@
 	led->isink_init.consumer_supplies = &led->isink_consumer;
 	led->isink_init.constraints.min_uA = 0;
 	led->isink_init.constraints.max_uA = pdata->max_uA;
-	led->isink_init.constraints.valid_ops_mask = REGULATOR_CHANGE_CURRENT;
+	led->isink_init.constraints.valid_ops_mask
+		= REGULATOR_CHANGE_CURRENT | REGULATOR_CHANGE_STATUS;
 	led->isink_init.constraints.valid_modes_mask = REGULATOR_MODE_NORMAL;
 	ret = wm8350_register_regulator(wm8350, isink, &led->isink_init);
 	if (ret != 0) {
@@ -1517,6 +1518,7 @@
 	led->dcdc_init.num_consumer_supplies = 1;
 	led->dcdc_init.consumer_supplies = &led->dcdc_consumer;
 	led->dcdc_init.constraints.valid_modes_mask = REGULATOR_MODE_NORMAL;
+	led->dcdc_init.constraints.valid_ops_mask =  REGULATOR_CHANGE_STATUS;
 	ret = wm8350_register_regulator(wm8350, dcdc, &led->dcdc_init);
 	if (ret != 0) {
 		platform_device_put(pdev);
--- linux-mvl-dove-2.6.32.orig/drivers/dma/at_hdmac.c
+++ linux-mvl-dove-2.6.32/drivers/dma/at_hdmac.c
@@ -815,7 +815,7 @@
 	dev_vdbg(chan2dev(chan), "is_tx_complete: %d (d%d, u%d)\n",
 			cookie, done ? *done : 0, used ? *used : 0);
 
-	spin_lock_bh(atchan->lock);
+	spin_lock_bh(&atchan->lock);
 
 	last_complete = atchan->completed_cookie;
 	last_used = chan->cookie;
@@ -830,7 +830,7 @@
 		ret = dma_async_is_complete(cookie, last_complete, last_used);
 	}
 
-	spin_unlock_bh(atchan->lock);
+	spin_unlock_bh(&atchan->lock);
 
 	if (done)
 		*done = last_complete;
--- linux-mvl-dove-2.6.32.orig/drivers/dma/mv_xor.c
+++ linux-mvl-dove-2.6.32/drivers/dma/mv_xor.c
@@ -161,7 +161,7 @@
 
 static void mv_xor_device_clear_eoc_cause(struct mv_xor_chan *chan)
 {
-	u32 val = (1 << (1 + (chan->idx * 16)));
+	u32 val = ~(1 << (chan->idx * 16));
 	dev_dbg(chan->device->common.dev, "%s, val 0x%08x\n", __func__, val);
 	__raw_writel(val, XOR_INTR_CAUSE(chan));
 }
@@ -448,7 +448,7 @@
 static void mv_xor_tasklet(unsigned long data)
 {
 	struct mv_xor_chan *chan = (struct mv_xor_chan *) data;
-	__mv_xor_slot_cleanup(chan);
+	mv_xor_slot_cleanup(chan);
 }
 
 static struct mv_xor_desc_slot *
@@ -1285,9 +1285,38 @@
 	writel(win_enable, base + WINDOW_BAR_ENABLE(1));
 }
 
+#ifdef CONFIG_PM
+static int mv_xor_suspend(struct platform_device *pdev, pm_message_t state)
+{
+	return 0;
+}
+
+static int mv_xor_resume(struct platform_device *pdev)
+{
+	struct mv_xor_device *device = platform_get_drvdata(pdev);
+	struct dma_chan *chan, *_chan;
+	struct mv_xor_chan *mv_chan;
+
+	list_for_each_entry_safe(chan, _chan, &device->common.channels,
+				device_node) {
+		mv_chan = to_mv_xor_chan(chan);
+		mv_chan_unmask_interrupts(mv_chan);
+
+		mv_set_mode(mv_chan, mv_chan->current_type);
+	}
+	return 0;
+}
+
+#else
+#define mv_xor_suspend NULL
+#define mv_xor_resume NULL
+#endif
+
 static struct platform_driver mv_xor_driver = {
 	.probe		= mv_xor_probe,
 	.remove		= __devexit_p(mv_xor_remove),
+	.suspend	= mv_xor_suspend,
+	.resume		= mv_xor_resume,
 	.driver		= {
 		.owner	= THIS_MODULE,
 		.name	= MV_XOR_NAME,
@@ -1326,6 +1355,14 @@
 
 	platform_set_drvdata(pdev, msp);
 
+#if defined(CONFIG_HAVE_CLK)
+	msp->clk = clk_get(&pdev->dev, NULL);
+	if (IS_ERR(msp->clk))
+		dev_notice(&pdev->dev, "cannot get clkdev\n");
+	else
+		clk_enable(msp->clk);
+#endif
+
 	/*
 	 * (Re-)program MBUS remapping windows if we are asked to.
 	 */
@@ -1337,12 +1374,47 @@
 
 static int mv_xor_shared_remove(struct platform_device *pdev)
 {
+#if defined(CONFIG_HAVE_CLK)
+	struct mv_xor_shared_private *msp = platform_get_drvdata(pdev);
+
+	if (!IS_ERR(msp->clk)) {
+		clk_disable(msp->clk);
+		clk_put(msp->clk);
+	}
+#endif
+	return 0;
+}
+
+#ifdef CONFIG_PM
+static int mv_xor_shared_suspend(struct platform_device *pdev,
+				 pm_message_t state)
+{
+	return 0;
+}
+
+static int mv_xor_shared_resume(struct platform_device *pdev)
+{
+	struct mv_xor_platform_shared_data *msd = pdev->dev.platform_data;
+	struct mv_xor_shared_private *msp = platform_get_drvdata(pdev);
+	/*
+	 * (Re-)program MBUS remapping windows if we are asked to.
+	 */
+	if (msd != NULL && msd->dram != NULL)
+		mv_xor_conf_mbus_windows(msp, msd->dram);
+
 	return 0;
 }
 
+#else
+#define mv_xor_shared_suspend NULL
+#define mv_xor_shared_resume NULL
+#endif
+
 static struct platform_driver mv_xor_shared_driver = {
 	.probe		= mv_xor_shared_probe,
 	.remove		= mv_xor_shared_remove,
+	.suspend	= mv_xor_shared_suspend,
+	.resume		= mv_xor_shared_resume,
 	.driver		= {
 		.owner	= THIS_MODULE,
 		.name	= MV_XOR_SHARED_NAME,
--- linux-mvl-dove-2.6.32.orig/drivers/dma/mv_xor.h
+++ linux-mvl-dove-2.6.32/drivers/dma/mv_xor.h
@@ -22,6 +22,7 @@
 #include <linux/io.h>
 #include <linux/dmaengine.h>
 #include <linux/interrupt.h>
+#include <linux/clk.h>
 
 #define USE_TIMER
 #define MV_XOR_SLOT_SIZE		64
@@ -55,6 +56,9 @@
 struct mv_xor_shared_private {
 	void __iomem	*xor_base;
 	void __iomem	*xor_high_base;
+#if defined(CONFIG_HAVE_CLK)
+	struct clk		*clk;
+#endif
 };
 
 
--- linux-mvl-dove-2.6.32.orig/drivers/dma/ioat/dma_v2.c
+++ linux-mvl-dove-2.6.32/drivers/dma/ioat/dma_v2.c
@@ -239,20 +239,50 @@
 		__ioat2_start_null_desc(ioat);
 }
 
-static void ioat2_restart_channel(struct ioat2_dma_chan *ioat)
+int ioat2_quiesce(struct ioat_chan_common *chan, unsigned long tmo)
 {
-	struct ioat_chan_common *chan = &ioat->base;
-	unsigned long phys_complete;
+	unsigned long end = jiffies + tmo;
+	int err = 0;
 	u32 status;
 
 	status = ioat_chansts(chan);
 	if (is_ioat_active(status) || is_ioat_idle(status))
 		ioat_suspend(chan);
 	while (is_ioat_active(status) || is_ioat_idle(status)) {
+		if (tmo && time_after(jiffies, end)) {
+			err = -ETIMEDOUT;
+			break;
+		}
 		status = ioat_chansts(chan);
 		cpu_relax();
 	}
 
+	return err;
+}
+
+int ioat2_reset_sync(struct ioat_chan_common *chan, unsigned long tmo)
+{
+	unsigned long end = jiffies + tmo;
+	int err = 0;
+
+	ioat_reset(chan);
+	while (ioat_reset_pending(chan)) {
+		if (end && time_after(jiffies, end)) {
+			err = -ETIMEDOUT;
+			break;
+		}
+		cpu_relax();
+	}
+
+	return err;
+}
+
+static void ioat2_restart_channel(struct ioat2_dma_chan *ioat)
+{
+	struct ioat_chan_common *chan = &ioat->base;
+	unsigned long phys_complete;
+
+	ioat2_quiesce(chan, 0);
 	if (ioat_cleanup_preamble(chan, &phys_complete))
 		__cleanup(ioat, phys_complete);
 
@@ -318,6 +348,19 @@
 	spin_unlock_bh(&chan->cleanup_lock);
 }
 
+static int ioat2_reset_hw(struct ioat_chan_common *chan)
+{
+	/* throw away whatever the channel was doing and get it initialized */
+	u32 chanerr;
+
+	ioat2_quiesce(chan, msecs_to_jiffies(100));
+
+	chanerr = readl(chan->reg_base + IOAT_CHANERR_OFFSET);
+	writel(chanerr, chan->reg_base + IOAT_CHANERR_OFFSET);
+
+	return ioat2_reset_sync(chan, msecs_to_jiffies(200));
+}
+
 /**
  * ioat2_enumerate_channels - find and initialize the device's channels
  * @device: the device to be enumerated
@@ -360,6 +403,10 @@
 				  (unsigned long) ioat);
 		ioat->xfercap_log = xfercap_log;
 		spin_lock_init(&ioat->ring_lock);
+		if (device->reset_hw(&ioat->base)) {
+			i = 0;
+			break;
+		}
 	}
 	dma->chancnt = i;
 	return i;
@@ -467,7 +514,6 @@
 	struct ioat2_dma_chan *ioat = to_ioat2_chan(c);
 	struct ioat_chan_common *chan = &ioat->base;
 	struct ioat_ring_ent **ring;
-	u32 chanerr;
 	int order;
 
 	/* have we already been set up? */
@@ -477,12 +523,6 @@
 	/* Setup register to interrupt and write completion status on error */
 	writew(IOAT_CHANCTRL_RUN, chan->reg_base + IOAT_CHANCTRL_OFFSET);
 
-	chanerr = readl(chan->reg_base + IOAT_CHANERR_OFFSET);
-	if (chanerr) {
-		dev_err(to_dev(chan), "CHANERR = %x, clearing\n", chanerr);
-		writel(chanerr, chan->reg_base + IOAT_CHANERR_OFFSET);
-	}
-
 	/* allocate a completion writeback area */
 	/* doing 2 32bit writes to mmio since 1 64b write doesn't work */
 	chan->completion = pci_pool_alloc(chan->device->completion_pool,
@@ -746,13 +786,7 @@
 	tasklet_disable(&chan->cleanup_task);
 	del_timer_sync(&chan->timer);
 	device->cleanup_tasklet((unsigned long) ioat);
-
-	/* Delay 100ms after reset to allow internal DMA logic to quiesce
-	 * before removing DMA descriptor resources.
-	 */
-	writeb(IOAT_CHANCMD_RESET,
-	       chan->reg_base + IOAT_CHANCMD_OFFSET(chan->device->version));
-	mdelay(100);
+	device->reset_hw(chan);
 
 	spin_lock_bh(&ioat->ring_lock);
 	descs = ioat2_ring_space(ioat);
@@ -839,6 +873,7 @@
 	int err;
 
 	device->enumerate_channels = ioat2_enumerate_channels;
+	device->reset_hw = ioat2_reset_hw;
 	device->cleanup_tasklet = ioat2_cleanup_tasklet;
 	device->timer_fn = ioat2_timer_event;
 	device->self_test = ioat_dma_self_test;
--- linux-mvl-dove-2.6.32.orig/drivers/dma/ioat/dma.c
+++ linux-mvl-dove-2.6.32/drivers/dma/ioat/dma.c
@@ -1032,7 +1032,7 @@
 	dma->dev = &pdev->dev;
 
 	if (!dma->chancnt) {
-		dev_err(dev, "zero channels detected\n");
+		dev_err(dev, "channel enumeration error\n");
 		goto err_setup_interrupts;
 	}
 
--- linux-mvl-dove-2.6.32.orig/drivers/dma/ioat/dma_v2.h
+++ linux-mvl-dove-2.6.32/drivers/dma/ioat/dma_v2.h
@@ -185,6 +185,8 @@
 void __ioat2_issue_pending(struct ioat2_dma_chan *ioat);
 void ioat2_cleanup_tasklet(unsigned long data);
 void ioat2_timer_event(unsigned long data);
+int ioat2_quiesce(struct ioat_chan_common *chan, unsigned long tmo);
+int ioat2_reset_sync(struct ioat_chan_common *chan, unsigned long tmo);
 extern struct kobj_type ioat2_ktype;
 extern struct kmem_cache *ioat2_cache;
 #endif /* IOATDMA_V2_H */
--- linux-mvl-dove-2.6.32.orig/drivers/dma/ioat/registers.h
+++ linux-mvl-dove-2.6.32/drivers/dma/ioat/registers.h
@@ -27,6 +27,7 @@
 
 #define IOAT_PCI_DEVICE_ID_OFFSET		0x02
 #define IOAT_PCI_DMAUNCERRSTS_OFFSET		0x148
+#define IOAT_PCI_CHANERR_INT_OFFSET		0x180
 #define IOAT_PCI_CHANERRMASK_INT_OFFSET		0x184
 
 /* MMIO Device Registers */
--- linux-mvl-dove-2.6.32.orig/drivers/dma/ioat/dma_v3.c
+++ linux-mvl-dove-2.6.32/drivers/dma/ioat/dma_v3.c
@@ -650,9 +650,11 @@
 
 	num_descs = ioat2_xferlen_to_descs(ioat, len);
 	/* we need 2x the number of descriptors to cover greater than 3
-	 * sources
+	 * sources (we need 1 extra source in the q-only continuation
+	 * case and 3 extra sources in the p+q continuation case.
 	 */
-	if (src_cnt > 3 || flags & DMA_PREP_CONTINUE) {
+	if (src_cnt + dmaf_p_disabled_continue(flags) > 3 ||
+	    (dmaf_continue(flags) && !dmaf_p_disabled_continue(flags))) {
 		with_ext = 1;
 		num_descs *= 2;
 	} else
@@ -1128,6 +1130,45 @@
 	return 0;
 }
 
+static int ioat3_reset_hw(struct ioat_chan_common *chan)
+{
+	/* throw away whatever the channel was doing and get it
+	 * initialized, with ioat3 specific workarounds
+	 */
+	struct ioatdma_device *device = chan->device;
+	struct pci_dev *pdev = device->pdev;
+	u32 chanerr;
+	u16 dev_id;
+	int err;
+
+	ioat2_quiesce(chan, msecs_to_jiffies(100));
+
+	chanerr = readl(chan->reg_base + IOAT_CHANERR_OFFSET);
+	writel(chanerr, chan->reg_base + IOAT_CHANERR_OFFSET);
+
+	/* -= IOAT ver.3 workarounds =- */
+	/* Write CHANERRMSK_INT with 3E07h to mask out the errors
+	 * that can cause stability issues for IOAT ver.3, and clear any
+	 * pending errors
+	 */
+	pci_write_config_dword(pdev, IOAT_PCI_CHANERRMASK_INT_OFFSET, 0x3e07);
+	err = pci_read_config_dword(pdev, IOAT_PCI_CHANERR_INT_OFFSET, &chanerr);
+	if (err) {
+		dev_err(&pdev->dev, "channel error register unreachable\n");
+		return err;
+	}
+	pci_write_config_dword(pdev, IOAT_PCI_CHANERR_INT_OFFSET, chanerr);
+
+	/* Clear DMAUNCERRSTS Cfg-Reg Parity Error status bit
+	 * (workaround for spurious config parity error after restart)
+	 */
+	pci_read_config_word(pdev, IOAT_PCI_DEVICE_ID_OFFSET, &dev_id);
+	if (dev_id == PCI_DEVICE_ID_INTEL_IOAT_TBG0)
+		pci_write_config_dword(pdev, IOAT_PCI_DMAUNCERRSTS_OFFSET, 0x10);
+
+	return ioat2_reset_sync(chan, msecs_to_jiffies(200));
+}
+
 int __devinit ioat3_dma_probe(struct ioatdma_device *device, int dca)
 {
 	struct pci_dev *pdev = device->pdev;
@@ -1137,10 +1178,10 @@
 	struct ioat_chan_common *chan;
 	bool is_raid_device = false;
 	int err;
-	u16 dev_id;
 	u32 cap;
 
 	device->enumerate_channels = ioat2_enumerate_channels;
+	device->reset_hw = ioat3_reset_hw;
 	device->self_test = ioat3_dma_self_test;
 	dma = &device->common;
 	dma->device_prep_dma_memcpy = ioat2_dma_prep_memcpy_lock;
@@ -1216,19 +1257,6 @@
 	dma->device_prep_dma_xor_val = NULL;
 	#endif
 
-	/* -= IOAT ver.3 workarounds =- */
-	/* Write CHANERRMSK_INT with 3E07h to mask out the errors
-	 * that can cause stability issues for IOAT ver.3
-	 */
-	pci_write_config_dword(pdev, IOAT_PCI_CHANERRMASK_INT_OFFSET, 0x3e07);
-
-	/* Clear DMAUNCERRSTS Cfg-Reg Parity Error status bit
-	 * (workaround for spurious config parity error after restart)
-	 */
-	pci_read_config_word(pdev, IOAT_PCI_DEVICE_ID_OFFSET, &dev_id);
-	if (dev_id == PCI_DEVICE_ID_INTEL_IOAT_TBG0)
-		pci_write_config_dword(pdev, IOAT_PCI_DMAUNCERRSTS_OFFSET, 0x10);
-
 	err = ioat_probe(device);
 	if (err)
 		return err;
--- linux-mvl-dove-2.6.32.orig/drivers/dma/ioat/dma.h
+++ linux-mvl-dove-2.6.32/drivers/dma/ioat/dma.h
@@ -60,6 +60,7 @@
  * @dca: direct cache access context
  * @intr_quirk: interrupt setup quirk (for ioat_v1 devices)
  * @enumerate_channels: hw version specific channel enumeration
+ * @reset_hw: hw version specific channel (re)initialization
  * @cleanup_tasklet: select between the v2 and v3 cleanup routines
  * @timer_fn: select between the v2 and v3 timer watchdog routines
  * @self_test: hardware version specific self test for each supported op type
@@ -78,6 +79,7 @@
 	struct dca_provider *dca;
 	void (*intr_quirk)(struct ioatdma_device *device);
 	int (*enumerate_channels)(struct ioatdma_device *device);
+	int (*reset_hw)(struct ioat_chan_common *chan);
 	void (*cleanup_tasklet)(unsigned long data);
 	void (*timer_fn)(unsigned long data);
 	int (*self_test)(struct ioatdma_device *device);
@@ -264,6 +266,22 @@
 	writeb(IOAT_CHANCMD_SUSPEND, chan->reg_base + IOAT_CHANCMD_OFFSET(ver));
 }
 
+static inline void ioat_reset(struct ioat_chan_common *chan)
+{
+	u8 ver = chan->device->version;
+
+	writeb(IOAT_CHANCMD_RESET, chan->reg_base + IOAT_CHANCMD_OFFSET(ver));
+}
+
+static inline bool ioat_reset_pending(struct ioat_chan_common *chan)
+{
+	u8 ver = chan->device->version;
+	u8 cmd;
+
+	cmd = readb(chan->reg_base + IOAT_CHANCMD_OFFSET(ver));
+	return (cmd & IOAT_CHANCMD_RESET) == IOAT_CHANCMD_RESET;
+}
+
 static inline void ioat_set_chainaddr(struct ioat_dma_chan *ioat, u64 addr)
 {
 	struct ioat_chan_common *chan = &ioat->base;
--- linux-mvl-dove-2.6.32.orig/drivers/mfd/ab3100-core.c
+++ linux-mvl-dove-2.6.32/drivers/mfd/ab3100-core.c
@@ -591,7 +591,7 @@
 	ab3100_get_priv.ab3100 = ab3100;
 	ab3100_get_priv.mode = false;
 	ab3100_get_reg_file = debugfs_create_file("get_reg",
-				S_IWUGO, ab3100_dir, &ab3100_get_priv,
+				S_IWUSR, ab3100_dir, &ab3100_get_priv,
 				&ab3100_get_set_reg_fops);
 	if (!ab3100_get_reg_file) {
 		err = -ENOMEM;
@@ -601,7 +601,7 @@
 	ab3100_set_priv.ab3100 = ab3100;
 	ab3100_set_priv.mode = true;
 	ab3100_set_reg_file = debugfs_create_file("set_reg",
-				S_IWUGO, ab3100_dir, &ab3100_set_priv,
+				S_IWUSR, ab3100_dir, &ab3100_set_priv,
 				&ab3100_get_set_reg_fops);
 	if (!ab3100_set_reg_file) {
 		err = -ENOMEM;
--- linux-mvl-dove-2.6.32.orig/drivers/mfd/ucb1x00-ts.c
+++ linux-mvl-dove-2.6.32/drivers/mfd/ucb1x00-ts.c
@@ -385,12 +385,18 @@
 	idev->close      = ucb1x00_ts_close;
 
 	__set_bit(EV_ABS, idev->evbit);
-	__set_bit(ABS_X, idev->absbit);
-	__set_bit(ABS_Y, idev->absbit);
-	__set_bit(ABS_PRESSURE, idev->absbit);
 
 	input_set_drvdata(idev, ts);
 
+	ucb1x00_adc_enable(ts->ucb);
+	ts->x_res = ucb1x00_ts_read_xres(ts);
+	ts->y_res = ucb1x00_ts_read_yres(ts);
+	ucb1x00_adc_disable(ts->ucb);
+
+	input_set_abs_params(idev, ABS_X, 0, ts->x_res, 0, 0);
+	input_set_abs_params(idev, ABS_Y, 0, ts->y_res, 0, 0);
+	input_set_abs_params(idev, ABS_PRESSURE, 0, 0, 0, 0);
+
 	err = input_register_device(idev);
 	if (err)
 		goto fail;
--- linux-mvl-dove-2.6.32.orig/drivers/mfd/wm8350-core.c
+++ linux-mvl-dove-2.6.32/drivers/mfd/wm8350-core.c
@@ -134,8 +134,7 @@
 	    wm8350->reg_cache[WM8350_SECURITY] == WM8350_UNLOCK_KEY)
 		return 0;
 
-	if ((reg == WM8350_GPIO_CONFIGURATION_I_O) ||
-	    (reg >= WM8350_GPIO_FUNCTION_SELECT_1 &&
+	if ((reg >= WM8350_GPIO_FUNCTION_SELECT_1 &&
 	     reg <= WM8350_GPIO_FUNCTION_SELECT_4) ||
 	    (reg >= WM8350_BATTERY_CHARGER_CONTROL_1 &&
 	     reg <= WM8350_BATTERY_CHARGER_CONTROL_3))
--- linux-mvl-dove-2.6.32.orig/drivers/bluetooth/btusb.c
+++ linux-mvl-dove-2.6.32/drivers/bluetooth/btusb.c
@@ -59,6 +59,21 @@
 	/* Generic Bluetooth USB device */
 	{ USB_DEVICE_INFO(0xe0, 0x01, 0x01) },
 
+	/* Apple MacBookPro 7,1 */
+	{ USB_DEVICE(0x05ac, 0x8213) },
+
+	/* Apple iMac11,1 */
+	{ USB_DEVICE(0x05ac, 0x8215) },
+
+	/* Apple MacBookPro6,2 */
+	{ USB_DEVICE(0x05ac, 0x8218) },
+
+	/* Apple MacBookAir3,1, MacBookAir3,2 */
+	{ USB_DEVICE(0x05ac, 0x821b) },
+
+	/* Apple MacBookPro8,2 */
+	{ USB_DEVICE(0x05ac, 0x821a) },
+
 	/* AVM BlueFRITZ! USB v2.0 */
 	{ USB_DEVICE(0x057c, 0x3800) },
 
@@ -307,6 +322,7 @@
 		return;
 
 	usb_anchor_urb(urb, &data->bulk_anchor);
+	usb_mark_last_busy(data->udev);
 
 	err = usb_submit_urb(urb, GFP_ATOMIC);
 	if (err < 0) {
--- linux-mvl-dove-2.6.32.orig/drivers/bluetooth/hci_ldisc.c
+++ linux-mvl-dove-2.6.32/drivers/bluetooth/hci_ldisc.c
@@ -258,9 +258,16 @@
 
 	BT_DBG("tty %p", tty);
 
+	/* FIXME: This btw is bogus, nothing requires the old ldisc to clear
+	   the pointer */
 	if (hu)
 		return -EEXIST;
 
+	/* Error if the tty has no write op instead of leaving an exploitable
+	   hole */
+	if (tty->ops->write == NULL)
+		return -EOPNOTSUPP;
+
 	if (!(hu = kzalloc(sizeof(struct hci_uart), GFP_KERNEL))) {
 		BT_ERR("Can't allocate control structure");
 		return -ENFILE;
--- linux-mvl-dove-2.6.32.orig/drivers/block/brd.c
+++ linux-mvl-dove-2.6.32/drivers/block/brd.c
@@ -498,7 +498,7 @@
 	struct kobject *kobj;
 
 	mutex_lock(&brd_devices_mutex);
-	brd = brd_init_one(dev & MINORMASK);
+	brd = brd_init_one(MINOR(dev) >> part_shift);
 	kobj = brd ? get_disk(brd->brd_disk) : ERR_PTR(-ENOMEM);
 	mutex_unlock(&brd_devices_mutex);
 
@@ -531,15 +531,18 @@
 	if (max_part > 0)
 		part_shift = fls(max_part);
 
+	if ((1UL << part_shift) > DISK_MAX_PARTS)
+		return -EINVAL;
+
 	if (rd_nr > 1UL << (MINORBITS - part_shift))
 		return -EINVAL;
 
 	if (rd_nr) {
 		nr = rd_nr;
-		range = rd_nr;
+		range = rd_nr << part_shift;
 	} else {
 		nr = CONFIG_BLK_DEV_RAM_COUNT;
-		range = 1UL << (MINORBITS - part_shift);
+		range = 1UL << MINORBITS;
 	}
 
 	if (register_blkdev(RAMDISK_MAJOR, "ramdisk"))
@@ -578,7 +581,7 @@
 	unsigned long range;
 	struct brd_device *brd, *next;
 
-	range = rd_nr ? rd_nr :  1UL << (MINORBITS - part_shift);
+	range = rd_nr ? rd_nr << part_shift : 1UL << MINORBITS;
 
 	list_for_each_entry_safe(brd, next, &brd_devices, brd_list)
 		brd_del_one(brd);
--- linux-mvl-dove-2.6.32.orig/drivers/block/cciss.h
+++ linux-mvl-dove-2.6.32/drivers/block/cciss.h
@@ -165,6 +165,7 @@
 	 printk("Sending %x - down to controller\n", c->busaddr );
 #endif /* CCISS_DEBUG */ 
          writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
+	readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
 	 h->commands_outstanding++;
 	 if ( h->commands_outstanding > h->max_outstanding)
 		h->max_outstanding = h->commands_outstanding;
--- linux-mvl-dove-2.6.32.orig/drivers/block/cciss.c
+++ linux-mvl-dove-2.6.32/drivers/block/cciss.c
@@ -339,6 +339,9 @@
 	if (*pos > h->highest_lun)
 		return 0;
 
+	if (drv == NULL) /* it's possible for h->drv[] to have holes. */
+		return 0;
+
 	if (drv->heads == 0)
 		return 0;
 
--- linux-mvl-dove-2.6.32.orig/drivers/block/nbd.c
+++ linux-mvl-dove-2.6.32/drivers/block/nbd.c
@@ -56,7 +56,7 @@
 
 static unsigned int nbds_max = 16;
 static struct nbd_device *nbd_dev;
-static int max_part;
+static int max_part = 15;
 
 /*
  * Use just one lock (or at most 1 per NIC). Two arguments for this:
@@ -754,6 +754,12 @@
 	if (max_part > 0)
 		part_shift = fls(max_part);
 
+	if ((1UL << part_shift) > DISK_MAX_PARTS)
+		return -EINVAL;
+
+	if (nbds_max > 1UL << (MINORBITS - part_shift))
+		return -EINVAL;
+
 	for (i = 0; i < nbds_max; i++) {
 		struct gendisk *disk = alloc_disk(1 << part_shift);
 		if (!disk)
--- linux-mvl-dove-2.6.32.orig/drivers/block/pktcdvd.c
+++ linux-mvl-dove-2.6.32/drivers/block/pktcdvd.c
@@ -322,7 +322,7 @@
 	pkt_kobj_remove(pd->kobj_stat);
 	pkt_kobj_remove(pd->kobj_wqueue);
 	if (class_pktcdvd)
-		device_destroy(class_pktcdvd, pd->pkt_dev);
+		device_unregister(pd->dev);
 }
 
 
@@ -2408,7 +2408,7 @@
 	pkt_shrink_pktlist(pd);
 }
 
-static struct pktcdvd_device *pkt_find_dev_from_minor(int dev_minor)
+static struct pktcdvd_device *pkt_find_dev_from_minor(unsigned int dev_minor)
 {
 	if (dev_minor >= MAX_WRITERS)
 		return NULL;
--- linux-mvl-dove-2.6.32.orig/drivers/block/loop.c
+++ linux-mvl-dove-2.6.32/drivers/block/loop.c
@@ -238,6 +238,8 @@
 		if (ret)
 			goto fail;
 
+		file_update_time(file);
+
 		transfer_result = lo_do_transfer(lo, WRITE, page, offset,
 				bvec->bv_page, bv_offs, size, IV);
 		copied = size;
@@ -1570,7 +1572,7 @@
 	struct kobject *kobj;
 
 	mutex_lock(&loop_devices_mutex);
-	lo = loop_init_one(dev & MINORMASK);
+	lo = loop_init_one(MINOR(dev) >> part_shift);
 	kobj = lo ? get_disk(lo->lo_disk) : ERR_PTR(-ENOMEM);
 	mutex_unlock(&loop_devices_mutex);
 
@@ -1603,15 +1605,18 @@
 	if (max_part > 0)
 		part_shift = fls(max_part);
 
+	if ((1UL << part_shift) > DISK_MAX_PARTS)
+		return -EINVAL;
+
 	if (max_loop > 1UL << (MINORBITS - part_shift))
 		return -EINVAL;
 
 	if (max_loop) {
 		nr = max_loop;
-		range = max_loop;
+		range = max_loop << part_shift;
 	} else {
 		nr = 8;
-		range = 1UL << (MINORBITS - part_shift);
+		range = 1UL << MINORBITS;
 	}
 
 	if (register_blkdev(LOOP_MAJOR, "loop"))
@@ -1650,7 +1655,7 @@
 	unsigned long range;
 	struct loop_device *lo, *next;
 
-	range = max_loop ? max_loop :  1UL << (MINORBITS - part_shift);
+	range = max_loop ? max_loop << part_shift : 1UL << MINORBITS;
 
 	list_for_each_entry_safe(lo, next, &loop_devices, lo_list)
 		loop_del_one(lo);
--- linux-mvl-dove-2.6.32.orig/drivers/clocksource/sh_mtu2.c
+++ linux-mvl-dove-2.6.32/drivers/clocksource/sh_mtu2.c
@@ -221,15 +221,15 @@
 	ced->cpumask = cpumask_of(0);
 	ced->set_mode = sh_mtu2_clock_event_mode;
 
+	pr_info("sh_mtu2: %s used for clock events\n", ced->name);
+	clockevents_register_device(ced);
+
 	ret = setup_irq(p->irqaction.irq, &p->irqaction);
 	if (ret) {
 		pr_err("sh_mtu2: failed to request irq %d\n",
 		       p->irqaction.irq);
 		return;
 	}
-
-	pr_info("sh_mtu2: %s used for clock events\n", ced->name);
-	clockevents_register_device(ced);
 }
 
 static int sh_mtu2_register(struct sh_mtu2_priv *p, char *name,
--- linux-mvl-dove-2.6.32.orig/drivers/clocksource/sh_cmt.c
+++ linux-mvl-dove-2.6.32/drivers/clocksource/sh_cmt.c
@@ -413,18 +413,10 @@
 static int sh_cmt_clocksource_enable(struct clocksource *cs)
 {
 	struct sh_cmt_priv *p = cs_to_sh_cmt(cs);
-	int ret;
 
 	p->total_cycles = 0;
 
-	ret = sh_cmt_start(p, FLAG_CLOCKSOURCE);
-	if (ret)
-		return ret;
-
-	/* TODO: calculate good shift from rate and counter bit width */
-	cs->shift = 0;
-	cs->mult = clocksource_hz2mult(p->rate, cs->shift);
-	return 0;
+	return sh_cmt_start(p, FLAG_CLOCKSOURCE);
 }
 
 static void sh_cmt_clocksource_disable(struct clocksource *cs)
@@ -444,7 +436,18 @@
 	cs->disable = sh_cmt_clocksource_disable;
 	cs->mask = CLOCKSOURCE_MASK(sizeof(unsigned long) * 8);
 	cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;
+
+	/* clk_get_rate() needs an enabled clock */
+	clk_enable(p->clk);
+	p->rate = clk_get_rate(p->clk) / (p->width == 16) ? 512 : 8;
+	clk_disable(p->clk);
+
+	/* TODO: calculate good shift from rate and counter bit width */
+	cs->shift = 10;
+	cs->mult = clocksource_hz2mult(p->rate, cs->shift);
+
 	pr_info("sh_cmt: %s used as clock source\n", cs->name);
+
 	clocksource_register(cs);
 	return 0;
 }
@@ -603,18 +606,13 @@
 	p->irqaction.handler = sh_cmt_interrupt;
 	p->irqaction.dev_id = p;
 	p->irqaction.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL;
-	ret = setup_irq(irq, &p->irqaction);
-	if (ret) {
-		pr_err("sh_cmt: failed to request irq %d\n", irq);
-		goto err1;
-	}
 
 	/* get hold of clock */
 	p->clk = clk_get(&p->pdev->dev, cfg->clk);
 	if (IS_ERR(p->clk)) {
 		pr_err("sh_cmt: cannot get clock \"%s\"\n", cfg->clk);
 		ret = PTR_ERR(p->clk);
-		goto err2;
+		goto err1;
 	}
 
 	if (resource_size(res) == 6) {
@@ -627,14 +625,25 @@
 		p->clear_bits = ~0xc000;
 	}
 
-	return sh_cmt_register(p, cfg->name,
-			       cfg->clockevent_rating,
-			       cfg->clocksource_rating);
- err2:
-	remove_irq(irq, &p->irqaction);
- err1:
+	ret = sh_cmt_register(p, cfg->name,
+			      cfg->clockevent_rating,
+			      cfg->clocksource_rating);
+	if (ret) {
+		pr_err("sh_cmt: registration failed\n");
+		goto err1;
+	}
+
+	ret = setup_irq(irq, &p->irqaction);
+	if (ret) {
+		pr_err("sh_cmt: failed to request irq %d\n", irq);
+		goto err1;
+	}
+
+	return 0;
+
+err1:
 	iounmap(p->mapbase);
- err0:
+err0:
 	return ret;
 }
 
--- linux-mvl-dove-2.6.32.orig/drivers/clocksource/sh_tmu.c
+++ linux-mvl-dove-2.6.32/drivers/clocksource/sh_tmu.c
@@ -199,16 +199,8 @@
 static int sh_tmu_clocksource_enable(struct clocksource *cs)
 {
 	struct sh_tmu_priv *p = cs_to_sh_tmu(cs);
-	int ret;
-
-	ret = sh_tmu_enable(p);
-	if (ret)
-		return ret;
 
-	/* TODO: calculate good shift from rate and counter bit width */
-	cs->shift = 10;
-	cs->mult = clocksource_hz2mult(p->rate, cs->shift);
-	return 0;
+	return sh_tmu_enable(p);
 }
 
 static void sh_tmu_clocksource_disable(struct clocksource *cs)
@@ -228,6 +220,16 @@
 	cs->disable = sh_tmu_clocksource_disable;
 	cs->mask = CLOCKSOURCE_MASK(32);
 	cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;
+
+	/* clk_get_rate() needs an enabled clock */
+	clk_enable(p->clk);
+	/* channel will be configured at parent clock / 4 */
+	p->rate = clk_get_rate(p->clk) / 4;
+	clk_disable(p->clk);
+	/* TODO: calculate good shift from rate and counter bit width */
+	cs->shift = 10;
+	cs->mult = clocksource_hz2mult(p->rate, cs->shift);
+
 	pr_info("sh_tmu: %s used as clock source\n", cs->name);
 	clocksource_register(cs);
 	return 0;
@@ -323,15 +325,15 @@
 	ced->set_next_event = sh_tmu_clock_event_next;
 	ced->set_mode = sh_tmu_clock_event_mode;
 
+	pr_info("sh_tmu: %s used for clock events\n", ced->name);
+	clockevents_register_device(ced);
+
 	ret = setup_irq(p->irqaction.irq, &p->irqaction);
 	if (ret) {
 		pr_err("sh_tmu: failed to request irq %d\n",
 		       p->irqaction.irq);
 		return;
 	}
-
-	pr_info("sh_tmu: %s used for clock events\n", ced->name);
-	clockevents_register_device(ced);
 }
 
 static int sh_tmu_register(struct sh_tmu_priv *p, char *name,
--- linux-mvl-dove-2.6.32.orig/drivers/lguest/segments.c
+++ linux-mvl-dove-2.6.32/drivers/lguest/segments.c
@@ -179,8 +179,10 @@
 	 * We assume the Guest has the same number of GDT entries as the
 	 * Host, otherwise we'd have to dynamically allocate the Guest GDT.
 	 */
-	if (num >= ARRAY_SIZE(cpu->arch.gdt))
+	if (num >= ARRAY_SIZE(cpu->arch.gdt)) {
 		kill_guest(cpu, "too many gdt entries %i", num);
+		return;
+	}
 
 	/* Set it up, then fix it. */
 	cpu->arch.gdt[num].a = lo;
--- linux-mvl-dove-2.6.32.orig/drivers/macintosh/therm_adt746x.c
+++ linux-mvl-dove-2.6.32/drivers/macintosh/therm_adt746x.c
@@ -79,6 +79,7 @@
 	u8			limits[3];
 	int			last_speed[2];
 	int			last_var[2];
+	int			pwm_inv[2];
 };
 
 static enum {ADT7460, ADT7467} therm_type;
@@ -89,6 +90,8 @@
 
 static void write_both_fan_speed(struct thermostat *th, int speed);
 static void write_fan_speed(struct thermostat *th, int speed, int fan);
+static void thermostat_create_files(void);
+static void thermostat_remove_files(void);
 
 static int
 write_reg(struct thermostat* th, int reg, u8 data)
@@ -160,6 +163,8 @@
 	struct thermostat *th = i2c_get_clientdata(client);
 	int i;
 	
+	thermostat_remove_files();
+
 	if (thread_therm != NULL) {
 		kthread_stop(thread_therm);
 	}
@@ -229,19 +234,23 @@
 	
 	if (speed >= 0) {
 		manual = read_reg(th, MANUAL_MODE[fan]);
+		manual &= ~INVERT_MASK;
 		write_reg(th, MANUAL_MODE[fan],
-			(manual|MANUAL_MASK) & (~INVERT_MASK));
+			manual | MANUAL_MASK | th->pwm_inv[fan]);
 		write_reg(th, FAN_SPD_SET[fan], speed);
 	} else {
 		/* back to automatic */
 		if(therm_type == ADT7460) {
 			manual = read_reg(th,
 				MANUAL_MODE[fan]) & (~MANUAL_MASK);
-
+			manual &= ~INVERT_MASK;
+			manual |= th->pwm_inv[fan];
 			write_reg(th,
 				MANUAL_MODE[fan], manual|REM_CONTROL[fan]);
 		} else {
 			manual = read_reg(th, MANUAL_MODE[fan]);
+			manual &= ~INVERT_MASK;
+			manual |= th->pwm_inv[fan];
 			write_reg(th, MANUAL_MODE[fan], manual&(~AUTO_MASK));
 		}
 	}
@@ -418,6 +427,10 @@
 
 	thermostat = th;
 
+	/* record invert bit status because fw can corrupt it after suspend */
+	th->pwm_inv[0] = read_reg(th, MANUAL_MODE[0]) & INVERT_MASK;
+	th->pwm_inv[1] = read_reg(th, MANUAL_MODE[1]) & INVERT_MASK;
+
 	/* be sure to really write fan speed the first time */
 	th->last_speed[0] = -2;
 	th->last_speed[1] = -2;
@@ -440,6 +453,8 @@
 		return -ENOMEM;
 	}
 
+	thermostat_create_files();
+
 	return 0;
 }
 
@@ -557,7 +572,6 @@
 	struct device_node* np;
 	const u32 *prop;
 	int i = 0, offset = 0;
-	int err;
 
 	np = of_find_node_by_name(NULL, "fan");
 	if (!np)
@@ -624,6 +638,17 @@
 		return -ENODEV;
 	}
 
+#ifndef CONFIG_I2C_POWERMAC
+	request_module("i2c-powermac");
+#endif
+
+	return i2c_add_driver(&thermostat_driver);
+}
+
+static void thermostat_create_files(void)
+{
+	int err;
+
 	err = device_create_file(&of_dev->dev, &dev_attr_sensor1_temperature);
 	err |= device_create_file(&of_dev->dev, &dev_attr_sensor2_temperature);
 	err |= device_create_file(&of_dev->dev, &dev_attr_sensor1_limit);
@@ -638,16 +663,9 @@
 	if (err)
 		printk(KERN_WARNING
 			"Failed to create tempertaure attribute file(s).\n");
-
-#ifndef CONFIG_I2C_POWERMAC
-	request_module("i2c-powermac");
-#endif
-
-	return i2c_add_driver(&thermostat_driver);
 }
 
-static void __exit
-thermostat_exit(void)
+static void thermostat_remove_files(void)
 {
 	if (of_dev) {
 		device_remove_file(&of_dev->dev, &dev_attr_sensor1_temperature);
@@ -664,9 +682,14 @@
 			device_remove_file(&of_dev->dev,
 					   &dev_attr_sensor2_fan_speed);
 
-		of_device_unregister(of_dev);
 	}
+}
+
+static void __exit
+thermostat_exit(void)
+{
 	i2c_del_driver(&thermostat_driver);
+	of_device_unregister(of_dev);
 }
 
 module_init(thermostat_init);
--- linux-mvl-dove-2.6.32.orig/drivers/macintosh/windfarm_smu_controls.c
+++ linux-mvl-dove-2.6.32/drivers/macintosh/windfarm_smu_controls.c
@@ -202,6 +202,8 @@
 		fct->ctrl.name = "cpu-front-fan-1";
 	else if (!strcmp(l, "CPU A PUMP"))
 		fct->ctrl.name = "cpu-pump-0";
+	else if (!strcmp(l, "CPU B PUMP"))
+		fct->ctrl.name = "cpu-pump-1";
 	else if (!strcmp(l, "Slots Fan") || !strcmp(l, "Slots fan") ||
 		 !strcmp(l, "EXPANSION SLOTS INTAKE"))
 		fct->ctrl.name = "slots-fan";
--- linux-mvl-dove-2.6.32.orig/drivers/char/power_mcu.c
+++ linux-mvl-dove-2.6.32/drivers/char/power_mcu.c
@@ -0,0 +1,187 @@
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/i2c.h>
+#include <linux/string.h>
+#include "power_mcu.h"
+#include <linux/delay.h>
+//#include <mach/gpio.h>
+//#include <mach/mfp.h>
+//#include <mach/mfp-pxa168.h>
+//#include <plat/mfp.h>
+//#include <mach/gpio_ec.h>
+
+static struct i2c_client *g_client;
+
+int power_mcu_read(unsigned char reg, void *pval)
+{
+	int ret, status = -EIO;
+	
+	//printk("power_mcu: power_mcu_read\n");
+
+	if (g_client == NULL)
+		return -EFAULT;
+
+	if ((reg < MCU_OFFSET_WORD ) && (reg >= MCU_OFFSET_BYTE ))
+	{
+		//if ( set_bus_busy() == -1 )
+		//	return -EINVAL;
+		ret = i2c_smbus_read_byte_data( g_client , reg );
+		//set_bus_free();
+		if ( ret >= 0 )
+		{
+			*((unsigned char *)pval) = (unsigned char )ret;
+			status = 0;
+		}
+	}
+	else if (( reg >= MCU_OFFSET_WORD ) && ( reg < MCU_END ))
+	{
+		//if ( set_bus_busy() == -1 )
+		//	return -EINVAL;
+		ret = i2c_smbus_read_word_data( g_client , reg );
+		//set_bus_free();
+
+		if ( ret >= 0 )
+		{
+			*((unsigned short *)pval) = (unsigned short )ret;
+			status=0;
+		}
+	}
+	else
+		return -EINVAL;
+	
+	return status;
+}
+
+
+EXPORT_SYMBOL(power_mcu_read);
+
+int power_mcu_write_word(unsigned char reg, unsigned short val)
+{
+	//unsigned char data;
+	int ret;
+	
+	//printk("power_mcu: power_mcu_write_word\n");
+	if (g_client == NULL)
+		return -EFAULT;
+	if (reg >= MCU_END )
+		return -EINVAL;
+	
+	//if ( set_bus_busy() == -1 )
+	//	return -EINVAL;
+	ret = i2c_smbus_write_word_data(g_client, reg, val);
+	//set_bus_free();
+
+	return ret;
+}
+
+int power_mcu_write_byte(unsigned char reg, unsigned char val)
+{
+	//unsigned char data;
+	int ret;
+	
+	//printk("power_mcu: power_mcu_write_byte\n");
+	if (g_client == NULL)
+		return -EFAULT;
+    
+	if (reg >= MCU_END )
+		return -EINVAL;
+
+	//if ( set_bus_busy() == -1 )
+	//	return -EINVAL; 
+	ret = i2c_smbus_write_byte_data(g_client, reg, val );
+	//set_bus_free();
+
+	return ret;
+}
+
+EXPORT_SYMBOL(power_mcu_write_byte);
+EXPORT_SYMBOL(power_mcu_write_word);
+
+void power_mcu_write_rtc( u32 rtc )
+{
+	power_mcu_write_word( MCU_RTC_LSB , rtc );
+	power_mcu_write_word( MCU_RTC_MSB , rtc >> 16 );
+}
+
+void power_mcu_read_rtc( u32 *rtc )
+{
+	power_mcu_read( MCU_RTC_LSB , rtc );
+	power_mcu_read( MCU_RTC_MSB , ((u8 *)rtc + 2 ));
+
+}
+
+EXPORT_SYMBOL(power_mcu_write_rtc);
+EXPORT_SYMBOL(power_mcu_read_rtc);
+
+static int __devinit power_i2c_probe(struct i2c_client *client)
+{
+	int i;
+	int nretry = 25;
+	unsigned char version;
+	unsigned char battery_absent;
+        g_client = client;
+	
+	//printk("power_mcu: power_i2c_probe start\n");
+	for( i = 0 ; i < nretry ; i++ )
+	{
+		if ( power_mcu_read( MCU_VERSION , &version ) == 0 )
+        	{
+			printk("MCU_VERSION==%d\n",version);
+			if ( power_mcu_read( MCU_BATT_ABSENT , &battery_absent ) == 0 )
+        		{
+				printk("MCU_BATT_ABSENT==%d\n",battery_absent);
+				return 0;
+			}
+			//return 0;
+		}
+	}
+	printk("power_mcu: probe failed\n");
+	g_client = NULL;
+	return -1;
+        
+}
+
+static int __devexit power_i2c_remove(struct i2c_client *client)
+{
+	return 0;
+}
+
+static struct i2c_device_id power_mcu_idtable[]=
+{
+	{"power_mcu",0},
+	{},
+};
+
+static struct i2c_driver power_mcu_driver = {
+	.driver = {
+		.name	= "power_mcu",
+	},
+	.id_table		= power_mcu_idtable,
+	.probe			= &power_i2c_probe,
+	.remove			= &power_i2c_remove,
+};
+
+
+static int __init power_mcu_init(void)
+{
+    	int ret;
+
+ //      printk("power_mcu_init\n");
+	if ( (ret = i2c_add_driver(&power_mcu_driver)) ) {
+		printk("power mcu Driver registration failed\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static void __exit power_mcu_exit(void)
+{
+	i2c_del_driver(&power_mcu_driver);
+}
+
+module_init(power_mcu_init);
+module_exit(power_mcu_exit);
+
+
--- linux-mvl-dove-2.6.32.orig/drivers/char/apm-emulation.c
+++ linux-mvl-dove-2.6.32/drivers/char/apm-emulation.c
@@ -20,9 +20,8 @@
 #include <linux/apm_bios.h>
 #include <linux/capability.h>
 #include <linux/sched.h>
-#include <linux/suspend.h>
+#include <linux/pm.h>
 #include <linux/apm-emulation.h>
-#include <linux/freezer.h>
 #include <linux/device.h>
 #include <linux/kernel.h>
 #include <linux/list.h>
@@ -30,9 +29,14 @@
 #include <linux/completion.h>
 #include <linux/kthread.h>
 #include <linux/delay.h>
-
+#include <linux/suspend.h>
+#include <linux/freezer.h>
 #include <asm/system.h>
 
+#if CONFIG_APM_EMU_DS2782
+#include "ds2782.h"
+#endif
+
 /*
  * The apm_bios device is one of the misc char devices.
  * This is its minor number.
@@ -153,14 +157,175 @@
 
 static const char driver_version[] = "1.13";	/* no spaces */
 
-
-
 /*
  * Compatibility cruft until the IPAQ people move over to the new
  * interface.
  */
 static void __apm_get_power_status(struct apm_power_info *info)
 {
+#if CONFIG_APM_EMU_DS2782
+	unsigned char data;
+	unsigned char data2;
+	unsigned short regValue;
+	unsigned char status;
+//	unsigned short vol;
+	unsigned short curt;
+
+//	ds2782_reg_get(0x7e, &data, 1);
+
+//	printk("=========================================\n");
+//	printk("DS2782 addr: %#x\n", data >> 1);
+
+	ds2782_reg_get(DS2782_STATUS_REG, &status, 1);
+//	printk("DS2782 Status Reg: %#x \n", status);
+
+//	ds2782_reg_get(DS2782_VOLT_REG, &data, 1);
+//	ds2782_reg_get(DS2782_VOLT_REG+1, &data2, 1);
+//	vol = ((data << 8) | data2) >> DS2782_VOLT_SHIFT_BIT;
+//	printk("DS2782 Voltage: %#x * 4.88m  V\n", vol);
+
+//	ds2782_reg_get(DS2782_TEMP_REG, &data, 1);
+//	ds2782_reg_get(DS2782_TEMP_REG+1, &data2, 1);
+//	regValue = ((data << 8) | data2) >> DS2782_TEMP_SHIFT_BIT;
+//	printk("DS2782 Temperature: %#x * 0.125  C\n", regValue);
+
+	ds2782_reg_get(DS2782_CURRENT_REG, &data, 1);
+	ds2782_reg_get(DS2782_CURRENT_REG+1, &data2, 1);
+	curt = ((data << 8) | data2) >> DS2782_CURRENT_SHIFT_BIT;
+//	printk("DS2782 Current: %#x * 156.3u  A\n", curt);
+
+	//if(curt > 0x10 && curt < 0x4000)
+	if(curt > 0xb000)
+		info->ac_line_status = APM_AC_OFFLINE;
+	else
+		info->ac_line_status = APM_AC_ONLINE;
+//	printk("ac line status: 0x%x\n", info->ac_line_status);
+
+//	ds2782_reg_get(DS2782_ACR_REG, &data, 1);
+//	ds2782_reg_get(DS2782_ACR_REG+1, &data2, 1);
+//	regValue = ((data << 8) | data2) >> DS2782_ACR_SHIFT_BIT;
+//	printk("DS2782 Accumulated Current(ACR): %#x * 625u  Ahr\n", regValue);
+
+//	ds2782_reg_get(DS2782_IAVG_REG, &data, 1);
+//	ds2782_reg_get(DS2782_IAVG_REG+1, &data2, 1);
+//	regValue = ((data << 8) | data2) >> DS2782_IAVG_SHIFT_BIT;
+//	printk("DS2782 Average Current(IAVG): %#x * 156.25u  A\n", regValue);
+
+//	ds2782_reg_get(DS2782_AC_REG, &data, 1);
+//	ds2782_reg_get(DS2782_AC_REG+1, &data2, 1);
+//	regValue = ((data << 8) | data2) >> DS2782_AC_SHIFT_BIT;
+//	printk("DS2782 Aging Cap(AC): (%#x * 6.25)/RSNSP(mOhm)  mAhr\n", regValue);
+
+//	ds2782_reg_get(DS2782_AS_REG, &data, 1);
+//	printk("DS2782 Age Scalar(AS): %#x * 0.78 %\n", data);
+
+//	ds2782_reg_get(DS2782_RSNSP_REG, &data, 1);
+//	printk("DS2782 Sense Resistor(RSNSP): 1 / %#x  Ohm\n", data);
+
+//	ds2782_reg_get(DS2782_VCHG_REG, &data, 1);
+//	printk("DS2782 Charge Voltage(VCHG): %#x * 19.52m  V\n", data);
+
+//	ds2782_reg_get(DS2782_IMIN_REG, &data, 1);
+//	printk("DS2782 Min Chg Current(IMIN): (%#x * 50)/RSNSP(mOhm)  mA\n", data);
+
+//	ds2782_reg_get(DS2782_VAE_REG, &data, 1);
+//	printk("DS2782 Active Empty Voltage(VAE): %#x * 19.52m  V\n", data);
+
+//	ds2782_reg_get(DS2782_IAE_REG, &data, 1);
+//	printk("DS2782 Active Empty Current(IAE): (%#x * 200)/RSNSP(mOhm)  mA\n", data);
+
+//	ds2782_reg_get(DS2782_FULL40_REG, &data, 1);
+//	ds2782_reg_get(DS2782_FULL40_REG+1, &data2, 1);
+//	regValue = ((data << 8) | data2) >> DS2782_FULL40_SHIFT_BIT;
+//	printk("DS2782 FULL(40): (%#x * 6.25)/RSNSP(mOhm)  mAhr\n", regValue);
+
+//	ds2782_reg_get(DS2782_FULL_REG, &data, 1);
+//	ds2782_reg_get(DS2782_FULL_REG+1, &data2, 1);
+//	regValue = ((data << 8) | data2) >> DS2782_FULL_SHIFT_BIT;
+//	printk("DS2782 FULL(T): %#x ???  mAhr\n", regValue);
+
+//	ds2782_reg_get(DS2782_AE_REG, &data, 1);
+//	ds2782_reg_get(DS2782_AE_REG+1, &data2, 1);
+//	regValue = ((data << 8) | data2) >> DS2782_AE_SHIFT_BIT;
+//	printk("DS2782 Active Empty AE(T): %#x ???  mAhr\n", regValue);
+
+//	ds2782_reg_get(DS2782_SE_REG, &data, 1);
+//	ds2782_reg_get(DS2782_SE_REG+1, &data2, 1);
+//	regValue = ((data << 8) | data2) >> DS2782_SE_SHIFT_BIT;
+//	printk("DS2782 Standby Empty SE(T): %#x ???  mAhr\n", regValue);
+
+//	ds2782_reg_get(DS2782_RAAC_REG, &data, 1);
+//	ds2782_reg_get(DS2782_RAAC_REG+1, &data2, 1);
+//	regValue = ((data << 8) | data2) >> DS2782_RAAC_SHIFT_BIT;
+//	printk("DS2782 Remaining Active Absolute Capacity (RAAC): %#x ???  mAhr\n", regValue);
+
+//	ds2782_reg_get(DS2782_RSAC_REG, &data, 1);
+//	ds2782_reg_get(DS2782_RSAC_REG+1, &data2, 1);
+//	regValue = ((data << 8) | data2) >> DS2782_RSAC_SHIFT_BIT;
+//	printk("DS2782 Remaining Standby Absolute Capacity (RSAC): %#x ???  mAhr\n", regValue);
+
+	ds2782_reg_get(DS2782_RARC_REG, &data, 1);
+//	printk("DS2782 Remaining Active Relative Capacity (RARC): %#x %\n", data);
+	info->battery_life = data;
+
+	if(info->battery_life > 0x1e) { // 30%
+		if(info->ac_line_status == APM_AC_ONLINE) {
+			if(status & 0x80) { // charge terminate flag
+				info->battery_status = APM_BATTERY_STATUS_HIGH;
+				info->battery_flag = APM_BATTERY_FLAG_HIGH;
+			} else {
+				info->battery_status = APM_BATTERY_STATUS_CHARGING;
+				info->battery_flag = APM_BATTERY_FLAG_CHARGING;
+			}
+		} else {
+			info->battery_status = APM_BATTERY_STATUS_HIGH;
+			info->battery_flag = APM_BATTERY_FLAG_HIGH;
+		}
+	} else if((info->battery_life <= 0x1e)&& (info->battery_life > 0xf)) { // 15% ~ 30%
+		if(info->ac_line_status == APM_AC_ONLINE) {
+			if(status & 0x80) { // charge terminate flag
+				info->battery_status = APM_BATTERY_STATUS_LOW;
+				info->battery_flag = APM_BATTERY_FLAG_LOW;
+			} else {
+				info->battery_status = APM_BATTERY_STATUS_CHARGING;
+				info->battery_flag = APM_BATTERY_FLAG_CHARGING;
+			}
+		} else {
+			info->battery_status = APM_BATTERY_STATUS_LOW;
+			info->battery_flag = APM_BATTERY_FLAG_LOW;
+		}
+	} else if(info->battery_life <= 0xf) { // 0 ~ 15%
+	 	if(info->ac_line_status == APM_AC_ONLINE) {
+			if(status & 0x80) { // charge terminate flag
+				info->battery_status = APM_BATTERY_STATUS_CRITICAL;
+				info->battery_flag = APM_BATTERY_FLAG_CRITICAL;
+			} else {
+				info->battery_status = APM_BATTERY_STATUS_CHARGING;
+				info->battery_flag = APM_BATTERY_FLAG_CHARGING;
+			}
+		} else {
+			info->battery_status = APM_BATTERY_STATUS_CRITICAL;
+			info->battery_flag = APM_BATTERY_FLAG_CRITICAL;
+		}
+	}
+
+//	if(status & 0x4)
+//		ds2782_reg_set(DS2782_STATUS_REG, ~0x4);
+//	if(status & 0x2)
+//		ds2782_reg_set(DS2782_STATUS_REG, ~0x2);
+//	printk("battery status: 0x%x\n", info->battery_status);
+//	printk("battery flag: 0x%x\n", info->battery_flag);
+
+	ds2782_reg_get(DS2782_RAAC_REG, &data, 1);
+	ds2782_reg_get(DS2782_RAAC_REG+1, &data2, 1);
+	regValue = ((data << 8) | data2) >> DS2782_RAAC_SHIFT_BIT;
+
+	info->units = APM_UNITS_MINS;
+	info->time = (regValue * 10) / 670 * 6;  // Time = RAAC(mAhr) / 670m * 60min
+
+//	ds2782_reg_get(DS2782_RSRC_REG, &data, 1);
+//	printk("DS2782 Remaining Standby Relative Capacity (RSRC): %#x %\n", data);
+#endif
 }
 
 /*
@@ -269,6 +434,7 @@
 apm_ioctl(struct inode * inode, struct file *filp, u_int cmd, u_long arg)
 {
 	struct apm_user *as = filp->private_data;
+	unsigned long flags;
 	int err = -EINVAL;
 
 	if (!as->suser || !as->writer)
@@ -300,8 +466,13 @@
 			/*
 			 * Wait for the suspend/resume to complete.  If there
 			 * are pending acknowledges, we wait here for them.
+			 *
+			 * Note: we need to ensure that the PM subsystem does
+			 * not kick us out of the wait when it suspends the
+			 * threads.
 			 */
-			freezer_do_not_count();
+			flags = current->flags;
+			current->flags |= PF_NOFREEZE;
 
 			wait_event(apm_suspend_waitqueue,
 				   as->suspend_state == SUSPEND_DONE);
@@ -328,6 +499,8 @@
 			as->suspend_result = pm_suspend(PM_SUSPEND_MEM);
 		}
 
+		current->flags = flags;
+
 		mutex_lock(&state_lock);
 		err = as->suspend_result;
 		as->suspend_state = SUSPEND_NONE;
@@ -448,10 +621,11 @@
  *	-1: Unknown
  *   8) min = minutes; sec = seconds
  */
-static int proc_apm_show(struct seq_file *m, void *v)
+static int apm_get_info(char *buf, char **start, off_t fpos, int length)
 {
 	struct apm_power_info info;
 	char *units;
+	int ret;
 
 	info.ac_line_status = 0xff;
 	info.battery_status = 0xff;
@@ -469,27 +643,14 @@
 	case 1: 	units = "sec";	break;
 	}
 
-	seq_printf(m, "%s 1.2 0x%02x 0x%02x 0x%02x 0x%02x %d%% %d %s\n",
+	ret = sprintf(buf, "%s 1.2 0x%02x 0x%02x 0x%02x 0x%02x %d%% %d %s\n",
 		     driver_version, APM_32_BIT_SUPPORT,
 		     info.ac_line_status, info.battery_status,
 		     info.battery_flag, info.battery_life,
 		     info.time, units);
 
-	return 0;
-}
-
-static int proc_apm_open(struct inode *inode, struct file *file)
-{
-	return single_open(file, proc_apm_show, NULL);
+	return ret;
 }
-
-static const struct file_operations apm_proc_fops = {
-	.owner		= THIS_MODULE,
-	.open		= proc_apm_open,
-	.read		= seq_read,
-	.llseek		= seq_lseek,
-	.release	= single_release,
-};
 #endif
 
 static int kapmd(void *arg)
@@ -651,6 +812,9 @@
 static int __init apm_init(void)
 {
 	int ret;
+#ifdef CONFIG_PROC_FS
+	struct proc_dir_entry *ent;
+#endif
 
 	if (apm_disabled) {
 		printk(KERN_NOTICE "apm: disabled on user request.\n");
@@ -663,15 +827,23 @@
 		kapmd_tsk = NULL;
 		goto out;
 	}
+	kapmd_tsk->flags |= PF_NOFREEZE;
 	wake_up_process(kapmd_tsk);
 
 #ifdef CONFIG_PROC_FS
-	proc_create("apm", 0, NULL, &apm_proc_fops);
+//	create_proc_info_entry("apm", 0, NULL, apm_get_info);
+	ent = create_proc_entry("apm", 0, NULL);
+	if (ent)
+		ent->read_proc = apm_get_info;
 #endif
 
 	ret = misc_register(&apm_device);
-	if (ret)
+	if (ret){
+#ifdef CONFIG_PROC_FS
+		remove_proc_entry("apm", NULL);
+#endif
 		goto out_stop;
+	}
 
 	ret = register_pm_notifier(&apm_notif_block);
 	if (ret)
@@ -692,8 +864,9 @@
 {
 	unregister_pm_notifier(&apm_notif_block);
 	misc_deregister(&apm_device);
+#ifdef CONFIG_PROC_FS
 	remove_proc_entry("apm", NULL);
-
+#endif
 	kthread_stop(kapmd_tsk);
 }
 
--- linux-mvl-dove-2.6.32.orig/drivers/char/dcc_tty.c
+++ linux-mvl-dove-2.6.32/drivers/char/dcc_tty.c
@@ -0,0 +1,326 @@
+/* drivers/char/dcc_tty.c
+ *
+ * Copyright (C) 2007 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/console.h>
+#include <linux/hrtimer.h>
+#include <linux/tty.h>
+#include <linux/tty_driver.h>
+#include <linux/tty_flip.h>
+
+MODULE_DESCRIPTION("DCC TTY Driver");
+MODULE_LICENSE("GPL");
+MODULE_VERSION("1.0");
+
+static spinlock_t g_dcc_tty_lock = SPIN_LOCK_UNLOCKED;
+static struct hrtimer g_dcc_timer;
+static char g_dcc_buffer[16];
+static int g_dcc_buffer_head;
+static int g_dcc_buffer_count;
+static unsigned g_dcc_write_delay_usecs = 1;
+static struct tty_driver *g_dcc_tty_driver;
+static struct tty_struct *g_dcc_tty;
+static int g_dcc_tty_open_count;
+
+static void dcc_poll_locked(void)
+{
+	char ch;
+	int rch;
+	int written;
+
+	while (g_dcc_buffer_count) {
+		ch = g_dcc_buffer[g_dcc_buffer_head];
+		asm(
+			"mrc 14, 0, r15, c0, c1, 0\n"
+			"mcrcc 14, 0, %1, c0, c5, 0\n"
+			"movcc %0, #1\n"
+			"movcs %0, #0\n"
+			: "=r" (written)
+			: "r" (ch)
+		);
+		if (written) {
+			if (ch == '\n')
+				g_dcc_buffer[g_dcc_buffer_head] = '\r';
+			else {
+				g_dcc_buffer_head = (g_dcc_buffer_head + 1) % ARRAY_SIZE(g_dcc_buffer);
+				g_dcc_buffer_count--;
+				if (g_dcc_tty)
+					tty_wakeup(g_dcc_tty);
+			}
+			g_dcc_write_delay_usecs = 1;
+		} else {
+			if (g_dcc_write_delay_usecs > 0x100)
+				break;
+			g_dcc_write_delay_usecs <<= 1;
+			udelay(g_dcc_write_delay_usecs);
+		}
+	}
+
+	if (g_dcc_tty && !test_bit(TTY_THROTTLED, &g_dcc_tty->flags)) {
+		asm(
+			"mrc 14, 0, %0, c0, c1, 0\n"
+			"tst %0, #(1 << 30)\n"
+			"moveq %0, #-1\n"
+			"mrcne 14, 0, %0, c0, c5, 0\n"
+			: "=r" (rch)
+		);
+		if (rch >= 0) {
+			ch = rch;
+			tty_insert_flip_string(g_dcc_tty, &ch, 1);
+			tty_flip_buffer_push(g_dcc_tty);
+		}
+	}
+
+
+	if (g_dcc_buffer_count)
+		hrtimer_start(&g_dcc_timer, ktime_set(0, g_dcc_write_delay_usecs * NSEC_PER_USEC), HRTIMER_MODE_REL);
+	else
+		hrtimer_start(&g_dcc_timer, ktime_set(0, 20 * NSEC_PER_MSEC), HRTIMER_MODE_REL);
+}
+
+static int dcc_tty_open(struct tty_struct * tty, struct file * filp)
+{
+	int ret;
+	unsigned long irq_flags;
+
+	spin_lock_irqsave(&g_dcc_tty_lock, irq_flags);
+	if (g_dcc_tty == NULL || g_dcc_tty == tty) {
+		g_dcc_tty = tty;
+		g_dcc_tty_open_count++;
+		ret = 0;
+	} else
+		ret = -EBUSY;
+	spin_unlock_irqrestore(&g_dcc_tty_lock, irq_flags);
+
+	printk("dcc_tty_open, tty %p, f_flags %x, returned %d\n", tty, filp->f_flags, ret);
+
+	return ret;
+}
+
+static void dcc_tty_close(struct tty_struct * tty, struct file * filp)
+{
+	printk("dcc_tty_close, tty %p, f_flags %x\n", tty, filp->f_flags);
+	if (g_dcc_tty == tty) {
+		if (--g_dcc_tty_open_count == 0)
+			g_dcc_tty = NULL;
+	}
+}
+
+static int dcc_write(const unsigned char *buf_start, int count)
+{
+	const unsigned char *buf = buf_start;
+	unsigned long irq_flags;
+	int copy_len;
+	int space_left;
+	int tail;
+
+	if (count < 1)
+		return 0;
+
+	spin_lock_irqsave(&g_dcc_tty_lock, irq_flags);
+	do {
+		tail = (g_dcc_buffer_head + g_dcc_buffer_count) % ARRAY_SIZE(g_dcc_buffer);
+		copy_len = ARRAY_SIZE(g_dcc_buffer) - tail;
+		space_left = ARRAY_SIZE(g_dcc_buffer) - g_dcc_buffer_count;
+		if (copy_len > space_left)
+			copy_len = space_left;
+		if (copy_len > count)
+			copy_len = count;
+		memcpy(&g_dcc_buffer[tail], buf, copy_len);
+		g_dcc_buffer_count += copy_len;
+		buf += copy_len;
+		count -= copy_len;
+		if (copy_len < count && copy_len < space_left) {
+			space_left -= copy_len;
+			copy_len = count;
+			if (copy_len > space_left) {
+				copy_len = space_left;
+			}
+			memcpy(g_dcc_buffer, buf, copy_len);
+			buf += copy_len;
+			count -= copy_len;
+			g_dcc_buffer_count += copy_len;
+		}
+		dcc_poll_locked();
+		space_left = ARRAY_SIZE(g_dcc_buffer) - g_dcc_buffer_count;
+	} while(count && space_left);
+	spin_unlock_irqrestore(&g_dcc_tty_lock, irq_flags);
+	return buf - buf_start;
+}
+
+static int dcc_tty_write(struct tty_struct * tty, const unsigned char *buf, int count)
+{
+	int ret;
+	/* printk("dcc_tty_write %p, %d\n", buf, count); */
+	ret = dcc_write(buf, count);
+	if (ret != count)
+		printk("dcc_tty_write %p, %d, returned %d\n", buf, count, ret);
+	return ret;
+}
+
+static int dcc_tty_write_room(struct tty_struct *tty)
+{
+	int space_left;
+	unsigned long irq_flags;
+
+	spin_lock_irqsave(&g_dcc_tty_lock, irq_flags);
+	space_left = ARRAY_SIZE(g_dcc_buffer) - g_dcc_buffer_count;
+	spin_unlock_irqrestore(&g_dcc_tty_lock, irq_flags);
+	return space_left;
+}
+
+static int dcc_tty_chars_in_buffer(struct tty_struct *tty)
+{
+	int ret;
+	asm(
+		"mrc 14, 0, %0, c0, c1, 0\n"
+		"mov %0, %0, LSR #30\n"
+		"and %0, %0, #1\n"
+		: "=r" (ret)
+	);
+	return ret;
+}
+
+static void dcc_tty_unthrottle(struct tty_struct * tty)
+{
+	unsigned long irq_flags;
+
+	spin_lock_irqsave(&g_dcc_tty_lock, irq_flags);
+	dcc_poll_locked();
+	spin_unlock_irqrestore(&g_dcc_tty_lock, irq_flags);
+}
+
+static enum hrtimer_restart dcc_tty_timer_func(struct hrtimer *timer)
+{
+	unsigned long irq_flags;
+
+	spin_lock_irqsave(&g_dcc_tty_lock, irq_flags);
+	dcc_poll_locked();
+	spin_unlock_irqrestore(&g_dcc_tty_lock, irq_flags);
+	return HRTIMER_NORESTART;
+}
+
+void dcc_console_write(struct console *co, const char *b, unsigned count)
+{
+#if 1
+	dcc_write(b, count);
+#else
+	/* blocking printk */
+	while (count > 0) {
+		int written;
+		written = dcc_write(b, count);
+		if (written) {
+			b += written;
+			count -= written;
+		}
+	}
+#endif
+}
+
+static struct tty_driver *dcc_console_device(struct console *c, int *index)
+{
+	*index = 0;
+	return g_dcc_tty_driver;
+}
+
+static int __init dcc_console_setup(struct console *co, char *options)
+{
+	if (co->index != 0)
+		return -ENODEV;
+	return 0;
+}
+
+
+static struct console dcc_console =
+{
+	.name		= "ttyDCC",
+	.write		= dcc_console_write,
+	.device		= dcc_console_device,
+	.setup		= dcc_console_setup,
+	.flags		= CON_PRINTBUFFER,
+	.index		= -1,
+};
+
+static struct tty_operations dcc_tty_ops = {
+	.open = dcc_tty_open,
+	.close = dcc_tty_close,
+	.write = dcc_tty_write,
+	.write_room = dcc_tty_write_room,
+	.chars_in_buffer = dcc_tty_chars_in_buffer,
+	.unthrottle = dcc_tty_unthrottle,
+};
+
+static int __init dcc_tty_init(void)
+{
+	int ret;
+
+	hrtimer_init(&g_dcc_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
+	g_dcc_timer.function = dcc_tty_timer_func;
+
+	g_dcc_tty_driver = alloc_tty_driver(1);
+	if (!g_dcc_tty_driver) {
+		printk(KERN_ERR "dcc_tty_probe: alloc_tty_driver failed\n");
+		ret = -ENOMEM;
+		goto err_alloc_tty_driver_failed;
+	}
+	g_dcc_tty_driver->owner = THIS_MODULE;
+	g_dcc_tty_driver->driver_name = "dcc";
+	g_dcc_tty_driver->name = "ttyDCC";
+	g_dcc_tty_driver->major = 0; // auto assign
+	g_dcc_tty_driver->minor_start = 0;
+	g_dcc_tty_driver->type = TTY_DRIVER_TYPE_SERIAL;
+	g_dcc_tty_driver->subtype = SERIAL_TYPE_NORMAL;
+	g_dcc_tty_driver->init_termios = tty_std_termios;
+	g_dcc_tty_driver->flags = TTY_DRIVER_RESET_TERMIOS | TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV;
+	tty_set_operations(g_dcc_tty_driver, &dcc_tty_ops);
+	ret = tty_register_driver(g_dcc_tty_driver);
+	if (ret) {
+		printk(KERN_ERR "dcc_tty_probe: tty_register_driver failed, %d\n", ret);
+		goto err_tty_register_driver_failed;
+	}
+	tty_register_device(g_dcc_tty_driver, 0, NULL);
+
+	register_console(&dcc_console);
+	hrtimer_start(&g_dcc_timer, ktime_set(0, 0), HRTIMER_MODE_REL);
+
+	return 0;
+
+err_tty_register_driver_failed:
+	put_tty_driver(g_dcc_tty_driver);
+	g_dcc_tty_driver = NULL;
+err_alloc_tty_driver_failed:
+	return ret;
+}
+
+static void  __exit dcc_tty_exit(void)
+{
+	int ret;
+
+	tty_unregister_device(g_dcc_tty_driver, 0);
+	ret = tty_unregister_driver(g_dcc_tty_driver);
+	if (ret < 0) {
+		printk(KERN_ERR "dcc_tty_remove: tty_unregister_driver failed, %d\n", ret);
+	} else {
+		put_tty_driver(g_dcc_tty_driver);
+	}
+	g_dcc_tty_driver = NULL;
+}
+
+module_init(dcc_tty_init);
+module_exit(dcc_tty_exit);
+
+
--- linux-mvl-dove-2.6.32.orig/drivers/char/synclink_gt.c
+++ linux-mvl-dove-2.6.32/drivers/char/synclink_gt.c
@@ -1057,9 +1057,6 @@
 		 unsigned int cmd, unsigned long arg)
 {
 	struct slgt_info *info = tty->driver_data;
-	struct mgsl_icount cnow;	/* kernel counter temps */
-	struct serial_icounter_struct __user *p_cuser;	/* user space */
-	unsigned long flags;
 	void __user *argp = (void __user *)arg;
 	int ret;
 
@@ -1068,7 +1065,7 @@
 	DBGINFO(("%s ioctl() cmd=%08X\n", info->device_name, cmd));
 
 	if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
-	    (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
+	    (cmd != TIOCMIWAIT)) {
 		if (tty->flags & (1 << TTY_IO_ERROR))
 		    return -EIO;
 	}
@@ -1121,25 +1118,6 @@
 	case MGSL_IOCWAITGPIO:
 		ret = wait_gpio(info, argp);
 		break;
-	case TIOCGICOUNT:
-		spin_lock_irqsave(&info->lock,flags);
-		cnow = info->icount;
-		spin_unlock_irqrestore(&info->lock,flags);
-		p_cuser = argp;
-		if (put_user(cnow.cts, &p_cuser->cts) ||
-		    put_user(cnow.dsr, &p_cuser->dsr) ||
-		    put_user(cnow.rng, &p_cuser->rng) ||
-		    put_user(cnow.dcd, &p_cuser->dcd) ||
-		    put_user(cnow.rx, &p_cuser->rx) ||
-		    put_user(cnow.tx, &p_cuser->tx) ||
-		    put_user(cnow.frame, &p_cuser->frame) ||
-		    put_user(cnow.overrun, &p_cuser->overrun) ||
-		    put_user(cnow.parity, &p_cuser->parity) ||
-		    put_user(cnow.brk, &p_cuser->brk) ||
-		    put_user(cnow.buf_overrun, &p_cuser->buf_overrun))
-			ret = -EFAULT;
-		ret = 0;
-		break;
 	default:
 		ret = -ENOIOCTLCMD;
 	}
@@ -1147,6 +1125,33 @@
 	return ret;
 }
 
+static int get_icount(struct tty_struct *tty,
+				struct serial_icounter_struct *icount)
+
+{
+	struct slgt_info *info = tty->driver_data;
+	struct mgsl_icount cnow;	/* kernel counter temps */
+	unsigned long flags;
+
+	spin_lock_irqsave(&info->lock,flags);
+	cnow = info->icount;
+	spin_unlock_irqrestore(&info->lock,flags);
+
+	icount->cts = cnow.cts;
+	icount->dsr = cnow.dsr;
+	icount->rng = cnow.rng;
+	icount->dcd = cnow.dcd;
+	icount->rx = cnow.rx;
+	icount->tx = cnow.tx;
+	icount->frame = cnow.frame;
+	icount->overrun = cnow.overrun;
+	icount->parity = cnow.parity;
+	icount->brk = cnow.brk;
+	icount->buf_overrun = cnow.buf_overrun;
+
+	return 0;
+}
+
 /*
  * support for 32 bit ioctl calls on 64 bit systems
  */
@@ -1236,10 +1241,6 @@
 	case MGSL_IOCSGPIO:
 	case MGSL_IOCGGPIO:
 	case MGSL_IOCWAITGPIO:
-	case TIOCGICOUNT:
-		rc = ioctl(tty, file, cmd, (unsigned long)(compat_ptr(arg)));
-		break;
-
 	case MGSL_IOCSTXIDLE:
 	case MGSL_IOCTXENABLE:
 	case MGSL_IOCRXENABLE:
@@ -3639,6 +3640,7 @@
 	.hangup = hangup,
 	.tiocmget = tiocmget,
 	.tiocmset = tiocmset,
+	.get_icount = get_icount,
 	.proc_fops = &synclink_gt_proc_fops,
 };
 
--- linux-mvl-dove-2.6.32.orig/drivers/char/tty_io.c
+++ linux-mvl-dove-2.6.32/drivers/char/tty_io.c
@@ -96,6 +96,7 @@
 #include <linux/bitops.h>
 #include <linux/delay.h>
 #include <linux/seq_file.h>
+#include <linux/serial.h>
 
 #include <linux/uaccess.h>
 #include <asm/system.h>
@@ -1408,6 +1409,8 @@
 	list_del_init(&tty->tty_files);
 	file_list_unlock();
 
+	put_pid(tty->pgrp);
+	put_pid(tty->session);
 	free_tty_struct(tty);
 }
 
@@ -1930,8 +1933,10 @@
 			pid = task_pid(current);
 			type = PIDTYPE_PID;
 		}
+		get_pid(pid);
 		spin_unlock_irqrestore(&tty->ctrl_lock, flags);
 		retval = __f_setown(filp, pid, type, 0);
+		put_pid(pid);
 		if (retval)
 			goto out;
 	} else {
@@ -2432,6 +2437,20 @@
 	return tty->ops->tiocmset(tty, file, set, clear);
 }
 
+static int tty_tiocgicount(struct tty_struct *tty, void __user *arg)
+{
+	int retval = -EINVAL;
+	struct serial_icounter_struct icount;
+	memset(&icount, 0, sizeof(icount));
+	if (tty->ops->get_icount)
+		retval = tty->ops->get_icount(tty, &icount);
+	if (retval != 0)
+		return retval;
+	if (copy_to_user(arg, &icount, sizeof(icount)))
+		return -EFAULT;
+	return 0;
+}
+
 struct tty_struct *tty_pair_get_tty(struct tty_struct *tty)
 {
 	if (tty->driver->type == TTY_DRIVER_TYPE_PTY &&
@@ -2552,6 +2571,12 @@
 	case TIOCMBIC:
 	case TIOCMBIS:
 		return tty_tiocmset(tty, file, cmd, p);
+	case TIOCGICOUNT:
+		retval = tty_tiocgicount(tty, p);
+		/* For the moment allow fall through to the old method */
+        	if (retval != -EINVAL)
+			return retval;
+		break;
 	case TCFLSH:
 		switch (arg) {
 		case TCIFLUSH:
--- linux-mvl-dove-2.6.32.orig/drivers/char/power_mcu.h
+++ linux-mvl-dove-2.6.32/drivers/char/power_mcu.h
@@ -0,0 +1,189 @@
+#ifndef __POWER_MCU_H__
+#define __POWER_MCU_H__
+
+#include <linux/power_supply.h>
+#include <linux/rtc.h>
+
+#define EC_NO_CONNECTION (-123)
+
+
+//_W  word
+//_B  byte
+/*
+enum {
+	MCU_VERSION_B = 0 ,        //version of ec
+	MCU_STATUS_B,          //status
+	MCU_RARC_B,           //remianing active relavtie capacity
+	MCU_RSRC_B,           //remaining standby relative capacity
+	MCU_RAAC_W ,        //remaining active absolute capacity
+	MCU_RSAC_W ,        //remaining standby absolute capacity
+	MCU_IAVG_W ,        //average current register
+	MCU_TEMP_W,        //temperature
+	MCU_VOLT_W,        //voltage
+	MCU_CURRENT_W,  //current
+	MCU_ACR_W ,         //accumulated current
+	MCU_ACRL_W ,       //low accumulated current
+	MCU_AS_B,            //age scalar
+	MCU_FULL_W,         //full capacity
+	MCU_AE_W,            //active empty
+	MCU_SE_W,           //standby empty
+	MCU_TIME_LOW_W ,  //low 16bit of rtc
+	MCU_TIME_MID1_W ,  //low mid 16bit of rtc
+	MCU_TIME_MID2_W ,  //high mid 16bit of rtc
+	MCU_TIME_HIGH_W , //high 16bit of rtc
+	MCU_END,
+};
+*/
+/*
+enum I2C_MCU_DATA {
+                   MCU_VERSION = 0x00,                               // MCU VERSION
+                   MCU_STATUS = 0x01,                           // DS STATUS
+                   MCU_RAAC_MSB = 0x02,                     
+                   MCU_RAAC_LSB = 0x03,             
+                   MCU_RSAC_MSB = 0x04,                           
+                   MCU_RSAC_LSB = 0x05,      
+                   MCU_RARC = 0x06,    
+                   MCU_RSRC = 0x07,
+                   MCU_IAVG_MSB = 0x08,  
+                   MCU_IAVG_LSB = 0x09,
+                   MCU_TEMP_MSB = 0x0a,
+                   MCU_TEMP_LSB = 0x0b,       
+                   MCU_VOLT_MSB = 0x0c,
+                   MCU_VOLT_LSB = 0x0d,
+                   MCU_CURRENT_MSB = 0x0e,
+                   MCU_CURRENT_LSB = 0x0f,             // Shut down command
+                   MCU_ACR_MSB = 0x10,            // Sleep command
+                   MCU_ACR_LSB = 0x11,
+                   MCU_ACRL_MSB = 0x12,
+                   MCU_ACRL_LSB = 0x13,
+                   MCU_AS = 0x14,
+                   MCU_SFR = 0x15,
+                   MCU_FULL_MSB = 0x16,
+                   MCU_FULL_LSB = 0x17,
+                   MCU_AE_MSB = 0x18,
+                   MCU_AE_LSB = 0x19,
+                   MCU_SE_MSB = 0x1a,
+                   MCU_SE_LSB = 0x1b,
+                   
+                   MCU_END = 0x61,
+};
+*/
+enum I2C_MCU_DATA 
+{
+	MCU_OFFSET_BYTE = 0x00,
+	MCU_VERSION = 0x00,                               // MCU VERSION
+	MCU_DS_STATUS = 0x01,                           // DS STATUS
+	MCU_DS_RARC = 0x02,                     
+	MCU_DS_RSRC = 0x03,
+	MCU_DS_AS = 0x04,
+	MCU_DS_SFR = 0x05,
+	MCU_DS_CONTROL = 0x06,
+	MCU_DS_AB = 0x07,
+	MCU_DS_VCHG = 0x08,
+	MCU_DS_IMIN = 0x09,
+	MCU_DS_VAE = 0x0a,
+	MCU_DS_IAE = 0x0b,
+	MCU_DS_RSNSP = 0x0c,
+	MCU_BATT_ABSENT = 0x0d, //1--battery is not avaiable 0--battery is avaiable
+	MCU_AC_IN = 0x0e,
+	MCU_BATT_PROTECT= 0x0f,
+	MCU_BATT_CYCLE = 0x10,
+	MCU_OFFSET_WORD = 0x12,
+	MCU_DS_RAAC = 0x12,
+	MCU_DS_IAVG = 0x16,
+	MCU_DS_VOLT1 = 0x18,
+	MCU_DS_CURRENT = 0x1a,
+	MCU_DS_ACR = 0x1c,
+	MCU_DS_ACRL = 0x1e,
+	MCU_DS_FULL = 0x20,
+	MCU_DS_AE = 0x22,
+	MCU_DS_SE = 0x24,
+	MCU_DS_AC = 0x26,
+	MCU_DS_TEMP = 0x28,
+	MCU_DS_FULL40 = 0x2c,
+	//RTC
+	MCU_RTC_LSB = 0x2e,
+	MCU_RTC_MSB = 0x30,
+	MCU_BATT_FULL = 0x32,
+	MCU_BATT_FAULT = 0x33,
+	//ALARM
+	MCU_ALARM_LSB = 0x36,
+	MCU_ALARM_MSB = 0x38,
+	
+	MCU_DS_VOLT2= 0x3e,
+	MCU_ALM_UPDATE=0x41,              // Update ALARM: Write MCU_ALARM_LLSB = 0x36,MCU_ALARM_LMSB  = 0x38,         MCU_ALARM_HLSB = 0x3a,   MCU_ALARM_HMSB= 0x3c, then wirte MCU_ALM_UPDATE=0x41,
+	MCU_END,
+
+};
+
+struct avengers_lite_device_info 
+{
+	struct device *dev;
+	unsigned long update_time;	/* jiffies when data read */
+	int ec_status;
+	int full_counter;
+
+	unsigned char VERSION;
+        int STATUS;
+	unsigned char RARC;
+	unsigned char RSRC;
+	unsigned char AS;
+	unsigned char SFR;
+	unsigned char CONTROL;
+	unsigned char AB;
+	unsigned char VCHG;
+	unsigned char IMIN;
+	unsigned char VAE;
+	unsigned char IAE;
+	unsigned char RSNSP;
+	unsigned char BATT_ABSENT;
+	unsigned char AC_IN;
+	unsigned char BATT_PROTECT;
+	unsigned char BATT_CYCLE;
+	unsigned short RAAC;
+	unsigned short RSAC;
+	unsigned short IAVG;
+	unsigned short VOLT1;
+	short CURRENT;
+	unsigned short ACR;
+	unsigned short ACRL;
+	unsigned short FULL;
+	unsigned short AE;
+	unsigned short SE;
+	unsigned short AC;
+	unsigned short TEMP;
+	unsigned short FULL40;
+	unsigned short RTC_LLSB;
+	unsigned short RTC_LMSB;
+	unsigned short RTC_HLSB;
+	unsigned short RTC_HMSB;
+	unsigned short ALARM_LLSB;
+	unsigned short ALARM_LMSB;
+	unsigned short ALARM_HLSB;
+	unsigned short ALARM_HMSB;
+	unsigned short VOLT2;
+	unsigned short BATT_FULL;
+	unsigned short BATT_FAULT;
+	struct rtc_time time;
+	unsigned long raw_time_low;
+	unsigned long raw_time_high;
+       
+	struct power_supply bat;
+	struct workqueue_struct *monitor_wqueue;
+	struct delayed_work monitor_work;
+};
+
+#define MASK_CHGTF 0x80
+#define MASK_AEF 0x40
+#define MASK_SEF 0x20
+
+#define MASK_BATT_OV 0x80
+
+
+extern int power_mcu_read(unsigned char reg,void *pval);
+//extern int power_mcu_read_word(unsigned char reg, unsigned short *pval);
+extern int power_mcu_write_byte(unsigned char reg, unsigned char val);
+extern int power_mcu_write_word(unsigned char reg, unsigned short val);
+void power_mcu_write_rtc( u32 rtc );
+void power_mcu_read_rtc( u32 *rtc );
+#endif
--- linux-mvl-dove-2.6.32.orig/drivers/char/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/char/Kconfig
@@ -1116,6 +1116,10 @@
 	depends on ISA || PCI
 	default y
 
+config DCC_TTY
+	tristate "DCC tty driver"
+	depends on ARM
+
 source "drivers/s390/char/Kconfig"
 
 endmenu
--- linux-mvl-dove-2.6.32.orig/drivers/char/synclinkmp.c
+++ linux-mvl-dove-2.6.32/drivers/char/synclinkmp.c
@@ -1255,10 +1255,6 @@
 		 unsigned int cmd, unsigned long arg)
 {
 	SLMP_INFO *info = tty->driver_data;
-	int error;
-	struct mgsl_icount cnow;	/* kernel counter temps */
-	struct serial_icounter_struct __user *p_cuser;	/* user space */
-	unsigned long flags;
 	void __user *argp = (void __user *)arg;
 
 	if (debug_level >= DEBUG_LEVEL_INFO)
@@ -1269,7 +1265,7 @@
 		return -ENODEV;
 
 	if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
-	    (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
+	    (cmd != TIOCMIWAIT)) {
 		if (tty->flags & (1 << TTY_IO_ERROR))
 		    return -EIO;
 	}
@@ -1307,34 +1303,6 @@
 		 * NB: both 1->0 and 0->1 transitions are counted except for
 		 *     RI where only 0->1 is counted.
 		 */
-	case TIOCGICOUNT:
-		spin_lock_irqsave(&info->lock,flags);
-		cnow = info->icount;
-		spin_unlock_irqrestore(&info->lock,flags);
-		p_cuser = argp;
-		PUT_USER(error,cnow.cts, &p_cuser->cts);
-		if (error) return error;
-		PUT_USER(error,cnow.dsr, &p_cuser->dsr);
-		if (error) return error;
-		PUT_USER(error,cnow.rng, &p_cuser->rng);
-		if (error) return error;
-		PUT_USER(error,cnow.dcd, &p_cuser->dcd);
-		if (error) return error;
-		PUT_USER(error,cnow.rx, &p_cuser->rx);
-		if (error) return error;
-		PUT_USER(error,cnow.tx, &p_cuser->tx);
-		if (error) return error;
-		PUT_USER(error,cnow.frame, &p_cuser->frame);
-		if (error) return error;
-		PUT_USER(error,cnow.overrun, &p_cuser->overrun);
-		if (error) return error;
-		PUT_USER(error,cnow.parity, &p_cuser->parity);
-		if (error) return error;
-		PUT_USER(error,cnow.brk, &p_cuser->brk);
-		if (error) return error;
-		PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
-		if (error) return error;
-		return 0;
 	default:
 		return -ENOIOCTLCMD;
 	}
@@ -1351,6 +1319,32 @@
 	return ret;
 }
 
+static int get_icount(struct tty_struct *tty,
+				struct serial_icounter_struct *icount)
+{
+	SLMP_INFO *info = tty->driver_data;
+	struct mgsl_icount cnow;	/* kernel counter temps */
+	unsigned long flags;
+
+	spin_lock_irqsave(&info->lock,flags);
+	cnow = info->icount;
+	spin_unlock_irqrestore(&info->lock,flags);
+
+	icount->cts = cnow.cts;
+	icount->dsr = cnow.dsr;
+	icount->rng = cnow.rng;
+	icount->dcd = cnow.dcd;
+	icount->rx = cnow.rx;
+	icount->tx = cnow.tx;
+	icount->frame = cnow.frame;
+	icount->overrun = cnow.overrun;
+	icount->parity = cnow.parity;
+	icount->brk = cnow.brk;
+	icount->buf_overrun = cnow.buf_overrun;
+
+	return 0;
+}
+
 /*
  * /proc fs routines....
  */
@@ -3908,6 +3902,7 @@
 	.hangup = hangup,
 	.tiocmget = tiocmget,
 	.tiocmset = tiocmset,
+	.get_icount = get_icount,
 	.proc_fops = &synclinkmp_proc_fops,
 };
 
--- linux-mvl-dove-2.6.32.orig/drivers/char/mem.c
+++ linux-mvl-dove-2.6.32/drivers/char/mem.c
@@ -35,6 +35,19 @@
 # include <linux/efi.h>
 #endif
 
+static inline unsigned long size_inside_page(unsigned long start,
+					     unsigned long size)
+{
+	unsigned long sz;
+
+	if (-start & (PAGE_SIZE - 1))
+		sz = -start & (PAGE_SIZE - 1);
+	else
+		sz = PAGE_SIZE;
+
+	return min_t(unsigned long, sz, size);
+}
+
 /*
  * Architectures vary in how they handle caching for addresses
  * outside of main memory.
@@ -408,6 +421,7 @@
 	unsigned long p = *ppos;
 	ssize_t low_count, read, sz;
 	char * kbuf; /* k-addr because vread() takes vmlist_lock rwlock */
+	int err = 0;
 
 	read = 0;
 	if (p < (unsigned long) high_memory) {
@@ -430,15 +444,7 @@
 		}
 #endif
 		while (low_count > 0) {
-			/*
-			 * Handle first page in case it's not aligned
-			 */
-			if (-p & (PAGE_SIZE - 1))
-				sz = -p & (PAGE_SIZE - 1);
-			else
-				sz = PAGE_SIZE;
-
-			sz = min_t(unsigned long, sz, low_count);
+			sz = size_inside_page(p, low_count);
 
 			/*
 			 * On ia64 if a page has been mapped somewhere as
@@ -462,16 +468,18 @@
 		if (!kbuf)
 			return -ENOMEM;
 		while (count > 0) {
-			int len = count;
+			int len = size_inside_page(p, count);
 
-			if (len > PAGE_SIZE)
-				len = PAGE_SIZE;
+			if (!is_vmalloc_or_module_addr((void *)p)) {
+				err = -ENXIO;
+				break;
+			}
 			len = vread(kbuf, (char *)p, len);
 			if (!len)
 				break;
 			if (copy_to_user(buf, kbuf, len)) {
-				free_page((unsigned long)kbuf);
-				return -EFAULT;
+				err = -EFAULT;
+				break;
 			}
 			count -= len;
 			buf += len;
@@ -480,8 +488,8 @@
 		}
 		free_page((unsigned long)kbuf);
 	}
- 	*ppos = p;
- 	return read;
+	*ppos = p;
+	return read ? read : err;
 }
 
 
@@ -510,15 +518,8 @@
 
 	while (count > 0) {
 		char *ptr;
-		/*
-		 * Handle first page in case it's not aligned
-		 */
-		if (-realp & (PAGE_SIZE - 1))
-			sz = -realp & (PAGE_SIZE - 1);
-		else
-			sz = PAGE_SIZE;
 
-		sz = min_t(unsigned long, sz, count);
+		sz = size_inside_page(realp, count);
 
 		/*
 		 * On ia64 if a page has been mapped somewhere as
@@ -557,6 +558,7 @@
 	ssize_t virtr = 0;
 	ssize_t written;
 	char * kbuf; /* k-addr because vwrite() takes vmlist_lock rwlock */
+	int err = 0;
 
 	if (p < (unsigned long) high_memory) {
 
@@ -578,20 +580,20 @@
 		if (!kbuf)
 			return wrote ? wrote : -ENOMEM;
 		while (count > 0) {
-			int len = count;
+			int len = size_inside_page(p, count);
 
-			if (len > PAGE_SIZE)
-				len = PAGE_SIZE;
+			if (!is_vmalloc_or_module_addr((void *)p)) {
+				err = -ENXIO;
+				break;
+			}
 			if (len) {
 				written = copy_from_user(kbuf, buf, len);
 				if (written) {
-					if (wrote + virtr)
-						break;
-					free_page((unsigned long)kbuf);
-					return -EFAULT;
+					err = -EFAULT;
+					break;
 				}
 			}
-			len = vwrite(kbuf, (char *)p, len);
+			vwrite(kbuf, (char *)p, len);
 			count -= len;
 			buf += len;
 			virtr += len;
@@ -600,8 +602,8 @@
 		free_page((unsigned long)kbuf);
 	}
 
- 	*ppos = p;
- 	return virtr + wrote;
+	*ppos = p;
+	return virtr + wrote ? : err;
 }
 #endif
 
@@ -820,10 +822,11 @@
 /*
  * capabilities for /dev/zero
  * - permits private mappings, "copies" are taken of the source of zeros
+ * - no writeback happens
  */
 static struct backing_dev_info zero_bdi = {
 	.name		= "char/mem",
-	.capabilities	= BDI_CAP_MAP_COPY,
+	.capabilities	= BDI_CAP_MAP_COPY | BDI_CAP_NO_ACCT_AND_WRITEBACK,
 };
 
 static const struct file_operations full_fops = {
--- linux-mvl-dove-2.6.32.orig/drivers/char/synclink.c
+++ linux-mvl-dove-2.6.32/drivers/char/synclink.c
@@ -2920,6 +2920,38 @@
 	
 }	/* end of mgsl_break() */
 
+/*
+ * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
+ * Return: write counters to the user passed counter struct
+ * NB: both 1->0 and 0->1 transitions are counted except for
+ *     RI where only 0->1 is counted.
+ */
+static int msgl_get_icount(struct tty_struct *tty,
+				struct serial_icounter_struct *icount)
+
+{
+	struct mgsl_struct * info = tty->driver_data;
+	struct mgsl_icount cnow;	/* kernel counter temps */
+	unsigned long flags;
+
+	spin_lock_irqsave(&info->irq_spinlock,flags);
+	cnow = info->icount;
+	spin_unlock_irqrestore(&info->irq_spinlock,flags);
+
+	icount->cts = cnow.cts;
+	icount->dsr = cnow.dsr;
+	icount->rng = cnow.rng;
+	icount->dcd = cnow.dcd;
+	icount->rx = cnow.rx;
+	icount->tx = cnow.tx;
+	icount->frame = cnow.frame;
+	icount->overrun = cnow.overrun;
+	icount->parity = cnow.parity;
+	icount->brk = cnow.brk;
+	icount->buf_overrun = cnow.buf_overrun;
+	return 0;
+}
+
 /* mgsl_ioctl()	Service an IOCTL request
  * 	
  * Arguments:
@@ -2945,7 +2977,7 @@
 		return -ENODEV;
 
 	if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
-	    (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
+	    (cmd != TIOCMIWAIT)) {
 		if (tty->flags & (1 << TTY_IO_ERROR))
 		    return -EIO;
 	}
@@ -2958,11 +2990,7 @@
 
 static int mgsl_ioctl_common(struct mgsl_struct *info, unsigned int cmd, unsigned long arg)
 {
-	int error;
-	struct mgsl_icount cnow;	/* kernel counter temps */
 	void __user *argp = (void __user *)arg;
-	struct serial_icounter_struct __user *p_cuser;	/* user space */
-	unsigned long flags;
 	
 	switch (cmd) {
 		case MGSL_IOCGPARAMS:
@@ -2991,40 +3019,6 @@
 		case TIOCMIWAIT:
 			return modem_input_wait(info,(int)arg);
 
-		/* 
-		 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
-		 * Return: write counters to the user passed counter struct
-		 * NB: both 1->0 and 0->1 transitions are counted except for
-		 *     RI where only 0->1 is counted.
-		 */
-		case TIOCGICOUNT:
-			spin_lock_irqsave(&info->irq_spinlock,flags);
-			cnow = info->icount;
-			spin_unlock_irqrestore(&info->irq_spinlock,flags);
-			p_cuser = argp;
-			PUT_USER(error,cnow.cts, &p_cuser->cts);
-			if (error) return error;
-			PUT_USER(error,cnow.dsr, &p_cuser->dsr);
-			if (error) return error;
-			PUT_USER(error,cnow.rng, &p_cuser->rng);
-			if (error) return error;
-			PUT_USER(error,cnow.dcd, &p_cuser->dcd);
-			if (error) return error;
-			PUT_USER(error,cnow.rx, &p_cuser->rx);
-			if (error) return error;
-			PUT_USER(error,cnow.tx, &p_cuser->tx);
-			if (error) return error;
-			PUT_USER(error,cnow.frame, &p_cuser->frame);
-			if (error) return error;
-			PUT_USER(error,cnow.overrun, &p_cuser->overrun);
-			if (error) return error;
-			PUT_USER(error,cnow.parity, &p_cuser->parity);
-			if (error) return error;
-			PUT_USER(error,cnow.brk, &p_cuser->brk);
-			if (error) return error;
-			PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
-			if (error) return error;
-			return 0;
 		default:
 			return -ENOIOCTLCMD;
 	}
@@ -4325,6 +4319,7 @@
 	.hangup = mgsl_hangup,
 	.tiocmget = tiocmget,
 	.tiocmset = tiocmset,
+	.get_icount = msgl_get_icount,
 	.proc_fops = &mgsl_proc_fops,
 };
 
--- linux-mvl-dove-2.6.32.orig/drivers/char/hpet.c
+++ linux-mvl-dove-2.6.32/drivers/char/hpet.c
@@ -476,6 +476,21 @@
 	if (irq) {
 		unsigned long irq_flags;
 
+		if (devp->hd_flags & HPET_SHARED_IRQ) {
+			/*
+			 * To prevent the interrupt handler from seeing an
+			 * unwanted interrupt status bit, program the timer
+			 * so that it will not fire in the near future ...
+			 */
+			writel(readl(&timer->hpet_config) & ~Tn_TYPE_CNF_MASK,
+			       &timer->hpet_config);
+			write_counter(read_counter(&hpet->hpet_mc),
+				      &timer->hpet_compare);
+			/* ... and clear any left-over status. */
+			isr = 1 << (devp - devp->hd_hpets->hp_dev);
+			writel(isr, &hpet->hpet_isr);
+		}
+
 		sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev));
 		irq_flags = devp->hd_flags & HPET_SHARED_IRQ
 						? IRQF_SHARED : IRQF_DISABLED;
@@ -970,6 +985,8 @@
 		return -ENODEV;
 
 	if (!data.hd_address || !data.hd_nirqs) {
+		if (data.hd_address)
+			iounmap(data.hd_address);
 		printk("%s: no address or irqs in _CRS\n", __func__);
 		return -ENODEV;
 	}
--- linux-mvl-dove-2.6.32.orig/drivers/char/random.c
+++ linux-mvl-dove-2.6.32/drivers/char/random.c
@@ -129,6 +129,9 @@
  *                                unsigned int value);
  * 	void add_interrupt_randomness(int irq);
  *
+ *      void random_input_words(__u32 *buf, size_t wordcount, int ent_count)
+ *      int random_input_wait(void);
+ *
  * add_input_randomness() uses the input layer interrupt timing, as well as
  * the event type information from the hardware.
  *
@@ -140,6 +143,13 @@
  * a better measure, since the timing of the disk interrupts are more
  * unpredictable.
  *
+ * random_input_words() just provides a raw block of entropy to the input
+ * pool, such as from a hardware entropy generator.
+ *
+ * random_input_wait() suspends the caller until such time as the
+ * entropy pool falls below the write threshold, and returns a count of how
+ * much entropy (in bits) is needed to sustain the pool.
+ *
  * All of these routines try to estimate how many bits of randomness a
  * particular randomness source.  They do this by keeping track of the
  * first and second order deltas of the event timings.
@@ -714,6 +724,61 @@
 }
 #endif
 
+/*
+ * random_input_words - add bulk entropy to pool
+ *
+ * @buf: buffer to add
+ * @wordcount: number of __u32 words to add
+ * @ent_count: total amount of entropy (in bits) to credit
+ *
+ * this provides bulk input of entropy to the input pool
+ *
+ */
+void random_input_words(__u32 *buf, size_t wordcount, int ent_count)
+{
+	mix_pool_bytes(&input_pool, buf, wordcount*4);
+
+	credit_entropy_bits(&input_pool, ent_count);
+
+	DEBUG_ENT("crediting %d bits => %d\n",
+		  ent_count, input_pool.entropy_count);
+	/*
+	 * Wake up waiting processes if we have enough
+	 * entropy.
+	 */
+	if (input_pool.entropy_count >= random_read_wakeup_thresh)
+		wake_up_interruptible(&random_read_wait);
+}
+EXPORT_SYMBOL(random_input_words);
+
+/*
+ * random_input_wait - wait until random needs entropy
+ *
+ * this function sleeps until the /dev/random subsystem actually
+ * needs more entropy, and then return the amount of entropy
+ * that it would be nice to have added to the system.
+ */
+int random_input_wait(void)
+{
+	int count;
+
+	wait_event_interruptible(random_write_wait, 
+			 input_pool.entropy_count < random_write_wakeup_thresh);
+
+	count = random_write_wakeup_thresh - input_pool.entropy_count;
+
+        /* likely we got woken up due to a signal */
+	if (count <= 0) count = random_read_wakeup_thresh; 
+
+	DEBUG_ENT("requesting %d bits from input_wait()er %d<%d\n",
+		  count,
+		  input_pool.entropy_count, random_write_wakeup_thresh);
+
+	return count;
+}
+EXPORT_SYMBOL(random_input_wait);
+
+
 #define EXTRACT_SIZE 10
 
 /*********************************************************************
@@ -1051,12 +1116,6 @@
 				/* like a named pipe */
 	}
 
-	/*
-	 * If we gave the user some bytes, update the access time.
-	 */
-	if (count)
-		file_accessed(file);
-
 	return (count ? count : retval);
 }
 
@@ -1107,7 +1166,6 @@
 			    size_t count, loff_t *ppos)
 {
 	size_t ret;
-	struct inode *inode = file->f_path.dentry->d_inode;
 
 	ret = write_pool(&blocking_pool, buffer, count);
 	if (ret)
@@ -1116,8 +1174,6 @@
 	if (ret)
 		return ret;
 
-	inode->i_mtime = current_fs_time(inode->i_sb);
-	mark_inode_dirty(inode);
 	return (ssize_t)count;
 }
 
--- linux-mvl-dove-2.6.32.orig/drivers/char/tty_buffer.c
+++ linux-mvl-dove-2.6.32/drivers/char/tty_buffer.c
@@ -247,7 +247,8 @@
 {
 	int copied = 0;
 	do {
-		int space = tty_buffer_request_room(tty, size - copied);
+		int goal = min(size - copied, TTY_BUFFER_PAGE);
+		int space = tty_buffer_request_room(tty, goal);
 		struct tty_buffer *tb = tty->buf.tail;
 		/* If there is no space then tb may be NULL */
 		if (unlikely(space == 0))
@@ -283,7 +284,8 @@
 {
 	int copied = 0;
 	do {
-		int space = tty_buffer_request_room(tty, size - copied);
+		int goal = min(size - copied, TTY_BUFFER_PAGE);
+		int space = tty_buffer_request_room(tty, goal);
 		struct tty_buffer *tb = tty->buf.tail;
 		/* If there is no space then tb may be NULL */
 		if (unlikely(space == 0))
@@ -410,7 +412,8 @@
 	spin_lock_irqsave(&tty->buf.lock, flags);
 
 	if (!test_and_set_bit(TTY_FLUSHING, &tty->flags)) {
-		struct tty_buffer *head;
+		struct tty_buffer *head, *tail = tty->buf.tail;
+		int seen_tail = 0;
 		while ((head = tty->buf.head) != NULL) {
 			int count;
 			char *char_buf;
@@ -420,6 +423,15 @@
 			if (!count) {
 				if (head->next == NULL)
 					break;
+				/*
+				  There's a possibility tty might get new buffer
+				  added during the unlock window below. We could
+				  end up spinning in here forever hogging the CPU
+				  completely. To avoid this let's have a rest each
+				  time we processed the tail buffer.
+				*/
+				if (tail == head)
+					seen_tail = 1;
 				tty->buf.head = head->next;
 				tty_buffer_free(tty, head);
 				continue;
@@ -429,7 +441,7 @@
 			   line discipline as we want to empty the queue */
 			if (test_bit(TTY_FLUSHPENDING, &tty->flags))
 				break;
-			if (!tty->receive_room) {
+			if (!tty->receive_room || seen_tail) {
 				schedule_delayed_work(&tty->buf.work, 1);
 				break;
 			}
--- linux-mvl-dove-2.6.32.orig/drivers/char/hvc_iucv.c
+++ linux-mvl-dove-2.6.32/drivers/char/hvc_iucv.c
@@ -139,6 +139,8 @@
  *
  * This function allocates a new struct iucv_tty_buffer element and, optionally,
  * allocates an internal data buffer with the specified size @size.
+ * The internal data buffer is always allocated with GFP_DMA which is
+ * required for receiving and sending data with IUCV.
  * Note: The total message size arises from the internal buffer size and the
  *	 members of the iucv_tty_msg structure.
  * The function returns NULL if memory allocation has failed.
@@ -154,7 +156,7 @@
 
 	if (size > 0) {
 		bufp->msg.length = MSG_SIZE(size);
-		bufp->mbuf = kmalloc(bufp->msg.length, flags);
+		bufp->mbuf = kmalloc(bufp->msg.length, flags | GFP_DMA);
 		if (!bufp->mbuf) {
 			mempool_free(bufp, hvc_iucv_mempool);
 			return NULL;
@@ -237,7 +239,7 @@
 	if (!rb->mbuf) { /* message not yet received ... */
 		/* allocate mem to store msg data; if no memory is available
 		 * then leave the buffer on the list and re-try later */
-		rb->mbuf = kmalloc(rb->msg.length, GFP_ATOMIC);
+		rb->mbuf = kmalloc(rb->msg.length, GFP_ATOMIC | GFP_DMA);
 		if (!rb->mbuf)
 			return -ENOMEM;
 
--- linux-mvl-dove-2.6.32.orig/drivers/char/Makefile
+++ linux-mvl-dove-2.6.32/drivers/char/Makefile
@@ -68,7 +68,9 @@
 
 obj-$(CONFIG_PRINTER)		+= lp.o
 
+obj-$(CONFIG_APM_EMU_DS2782)	+= ds2782.o
 obj-$(CONFIG_APM_EMULATION)	+= apm-emulation.o
+obj-$(CONFIG_BATTERY_MCU)	+= power_mcu.o
 
 obj-$(CONFIG_DTLK)		+= dtlk.o
 obj-$(CONFIG_R3964)		+= n_r3964.o
@@ -107,6 +109,7 @@
 obj-$(CONFIG_HANGCHECK_TIMER)	+= hangcheck-timer.o
 obj-$(CONFIG_TCG_TPM)		+= tpm/
 
+obj-$(CONFIG_DCC_TTY)		+= dcc_tty.o
 obj-$(CONFIG_PS3_FLASH)		+= ps3flash.o
 
 obj-$(CONFIG_JS_RTC)		+= js-rtc.o
--- linux-mvl-dove-2.6.32.orig/drivers/char/nozomi.c
+++ linux-mvl-dove-2.6.32/drivers/char/nozomi.c
@@ -1629,10 +1629,10 @@
 
 	dc->open_ttys--;
 	port->count--;
-	tty_port_tty_set(port, NULL);
 
 	if (port->count == 0) {
 		DBG1("close: %d", nport->token_dl);
+		tty_port_tty_set(port, NULL);
 		spin_lock_irqsave(&dc->spin_mutex, flags);
 		dc->last_ier &= ~(nport->token_dl);
 		writew(dc->last_ier, dc->reg_ier);
@@ -1783,24 +1783,24 @@
 	return ret;
 }
 
-static int ntty_ioctl_tiocgicount(struct port *port, void __user *argp)
+static int ntty_tiocgicount(struct tty_struct *tty,
+				struct serial_icounter_struct *icount)
 {
+	struct port *port = tty->driver_data;
 	const struct async_icount cnow = port->tty_icount;
-	struct serial_icounter_struct icount;
-
-	icount.cts = cnow.cts;
-	icount.dsr = cnow.dsr;
-	icount.rng = cnow.rng;
-	icount.dcd = cnow.dcd;
-	icount.rx = cnow.rx;
-	icount.tx = cnow.tx;
-	icount.frame = cnow.frame;
-	icount.overrun = cnow.overrun;
-	icount.parity = cnow.parity;
-	icount.brk = cnow.brk;
-	icount.buf_overrun = cnow.buf_overrun;
 
-	return copy_to_user(argp, &icount, sizeof(icount)) ? -EFAULT : 0;
+	icount->cts = cnow.cts;
+	icount->dsr = cnow.dsr;
+	icount->rng = cnow.rng;
+	icount->dcd = cnow.dcd;
+	icount->rx = cnow.rx;
+	icount->tx = cnow.tx;
+	icount->frame = cnow.frame;
+	icount->overrun = cnow.overrun;
+	icount->parity = cnow.parity;
+	icount->brk = cnow.brk;
+	icount->buf_overrun = cnow.buf_overrun;
+	return 0;
 }
 
 static int ntty_ioctl(struct tty_struct *tty, struct file *file,
@@ -1819,9 +1819,7 @@
 		rval = wait_event_interruptible(port->tty_wait,
 				ntty_cflags_changed(port, arg, &cprev));
 		break;
-	} case TIOCGICOUNT:
-		rval = ntty_ioctl_tiocgicount(port, argp);
-		break;
+	}
 	default:
 		DBG1("ERR: 0x%08X, %d", cmd, cmd);
 		break;
@@ -1895,6 +1893,7 @@
 	.chars_in_buffer = ntty_chars_in_buffer,
 	.tiocmget = ntty_tiocmget,
 	.tiocmset = ntty_tiocmset,
+	.get_icount = ntty_tiocgicount,
 };
 
 /* Module initialization */
--- linux-mvl-dove-2.6.32.orig/drivers/char/raw.c
+++ linux-mvl-dove-2.6.32/drivers/char/raw.c
@@ -247,6 +247,7 @@
 	.aio_read = 	generic_file_aio_read,
 	.write	=	do_sync_write,
 	.aio_write =	blkdev_aio_write,
+	.fsync	=	block_fsync,
 	.open	=	raw_open,
 	.release=	raw_release,
 	.ioctl	=	raw_ioctl,
--- linux-mvl-dove-2.6.32.orig/drivers/char/nvram.c
+++ linux-mvl-dove-2.6.32/drivers/char/nvram.c
@@ -265,10 +265,16 @@
 	unsigned char contents[NVRAM_BYTES];
 	unsigned i = *ppos;
 	unsigned char *tmp;
-	int len;
 
-	len = (NVRAM_BYTES - i) < count ? (NVRAM_BYTES - i) : count;
-	if (copy_from_user(contents, buf, len))
+	if (i >= NVRAM_BYTES)
+		return 0;	/* Past EOF */
+
+	if (count > NVRAM_BYTES - i)
+		count = NVRAM_BYTES - i;
+	if (count > NVRAM_BYTES)
+		return -EFAULT;	/* Can't happen, but prove it to gcc */
+
+	if (copy_from_user(contents, buf, count))
 		return -EFAULT;
 
 	spin_lock_irq(&rtc_lock);
@@ -276,7 +282,7 @@
 	if (!__nvram_check_checksum())
 		goto checksum_err;
 
-	for (tmp = contents; count-- > 0 && i < NVRAM_BYTES; ++i, ++tmp)
+	for (tmp = contents; count--; ++i, ++tmp)
 		__nvram_write_byte(*tmp, i);
 
 	__nvram_set_checksum();
--- linux-mvl-dove-2.6.32.orig/drivers/char/tty_ldisc.c
+++ linux-mvl-dove-2.6.32/drivers/char/tty_ldisc.c
@@ -45,6 +45,7 @@
 
 static DEFINE_SPINLOCK(tty_ldisc_lock);
 static DECLARE_WAIT_QUEUE_HEAD(tty_ldisc_wait);
+static DECLARE_WAIT_QUEUE_HEAD(tty_ldisc_idle);
 /* Line disc dispatch table */
 static struct tty_ldisc_ops *tty_ldiscs[NR_LDISCS];
 
@@ -81,6 +82,7 @@
 		return;
 	}
 	local_irq_restore(flags);
+	wake_up(&tty_ldisc_idle);
 }
 
 /**
@@ -442,9 +444,15 @@
 
 static int tty_ldisc_open(struct tty_struct *tty, struct tty_ldisc *ld)
 {
+	int ret;
+
 	WARN_ON(test_and_set_bit(TTY_LDISC_OPEN, &tty->flags));
-	if (ld->ops->open)
-		return ld->ops->open(tty);
+	if (ld->ops->open) {
+		ret = ld->ops->open(tty);
+		if (ret)
+			clear_bit(TTY_LDISC_OPEN, &tty->flags);
+		return ret;
+	}
 	return 0;
 }
 
@@ -522,6 +530,23 @@
 }
 
 /**
+ *	tty_ldisc_wait_idle	-	wait for the ldisc to become idle
+ *	@tty: tty to wait for
+ *
+ *	Wait for the line discipline to become idle. The discipline must
+ *	have been halted for this to guarantee it remains idle.
+ */
+static int tty_ldisc_wait_idle(struct tty_struct *tty)
+{
+	int ret;
+	ret = wait_event_timeout(tty_ldisc_idle,
+			atomic_read(&tty->ldisc->users) == 1, 5 * HZ);
+	if (ret < 0)
+		return ret;
+	return ret > 0 ? 0 : -EBUSY;
+}
+
+/**
  *	tty_set_ldisc		-	set line discipline
  *	@tty: the terminal to set
  *	@ldisc: the line discipline
@@ -616,7 +641,16 @@
 
 	flush_scheduled_work();
 
+	retval = tty_ldisc_wait_idle(tty);
+
 	mutex_lock(&tty->ldisc_mutex);
+
+	/* handle wait idle failure locked */
+	if (retval) {
+		tty_ldisc_put(new_ldisc);
+		goto enable;
+	}
+
 	if (test_bit(TTY_HUPPED, &tty->flags)) {
 		/* We were raced by the hangup method. It will have stomped
 		   the ldisc data and closed the ldisc down */
@@ -649,6 +683,7 @@
 
 	tty_ldisc_put(o_ldisc);
 
+enable:
 	/*
 	 *	Allow ldisc referencing to occur again
 	 */
@@ -687,14 +722,20 @@
 /**
  *	tty_ldisc_reinit	-	reinitialise the tty ldisc
  *	@tty: tty to reinit
+ *	@ldisc: line discipline to reinitialize
  *
- *	Switch the tty back to N_TTY line discipline and leave the
- *	ldisc state closed
+ *	Switch the tty to a line discipline and leave the ldisc
+ *	state closed
  */
 
-static void tty_ldisc_reinit(struct tty_struct *tty)
+static int tty_ldisc_reinit(struct tty_struct *tty, int ldisc)
 {
-	struct tty_ldisc *ld;
+	struct tty_ldisc *ld = tty_ldisc_get(ldisc);
+
+	if (IS_ERR(ld))
+		return -1;
+
+	WARN_ON_ONCE(tty_ldisc_wait_idle(tty));
 
 	tty_ldisc_close(tty, tty->ldisc);
 	tty_ldisc_put(tty->ldisc);
@@ -702,10 +743,10 @@
 	/*
 	 *	Switch the line discipline back
 	 */
-	ld = tty_ldisc_get(N_TTY);
-	BUG_ON(IS_ERR(ld));
 	tty_ldisc_assign(tty, ld);
-	tty_set_termios_ldisc(tty, N_TTY);
+	tty_set_termios_ldisc(tty, ldisc);
+
+	return 0;
 }
 
 /**
@@ -726,6 +767,8 @@
 void tty_ldisc_hangup(struct tty_struct *tty)
 {
 	struct tty_ldisc *ld;
+	int reset = tty->driver->flags & TTY_DRIVER_RESET_TERMIOS;
+	int err = 0;
 
 	/*
 	 * FIXME! What are the locking issues here? This may me overdoing
@@ -753,25 +796,35 @@
 	wake_up_interruptible_poll(&tty->read_wait, POLLIN);
 	/*
 	 * Shutdown the current line discipline, and reset it to
-	 * N_TTY.
+	 * N_TTY if need be.
+	 *
+	 * Avoid racing set_ldisc or tty_ldisc_release
 	 */
-	if (tty->driver->flags & TTY_DRIVER_RESET_TERMIOS) {
-		/* Avoid racing set_ldisc or tty_ldisc_release */
-		mutex_lock(&tty->ldisc_mutex);
-		tty_ldisc_halt(tty);
-		if (tty->ldisc) {	/* Not yet closed */
-			/* Switch back to N_TTY */
-			tty_ldisc_reinit(tty);
-			/* At this point we have a closed ldisc and we want to
-			   reopen it. We could defer this to the next open but
-			   it means auditing a lot of other paths so this is
-			   a FIXME */
+	mutex_lock(&tty->ldisc_mutex);
+	tty_ldisc_halt(tty);
+	/* At this point we have a closed ldisc and we want to
+	   reopen it. We could defer this to the next open but
+	   it means auditing a lot of other paths so this is
+	   a FIXME */
+	if (tty->ldisc) {	/* Not yet closed */
+		if (reset == 0) {
+
+			if (!tty_ldisc_reinit(tty, tty->termios->c_line))
+				err = tty_ldisc_open(tty, tty->ldisc);
+			else
+				err = 1;
+		}
+		/* If the re-open fails or we reset then go to N_TTY. The
+		   N_TTY open cannot fail */
+		if (reset || err) {
+			BUG_ON(tty_ldisc_reinit(tty, N_TTY));
 			WARN_ON(tty_ldisc_open(tty, tty->ldisc));
-			tty_ldisc_enable(tty);
 		}
-		mutex_unlock(&tty->ldisc_mutex);
-		tty_reset_termios(tty);
+		tty_ldisc_enable(tty);
 	}
+	mutex_unlock(&tty->ldisc_mutex);
+	if (reset)
+		tty_reset_termios(tty);
 }
 
 /**
--- linux-mvl-dove-2.6.32.orig/drivers/char/keyboard.c
+++ linux-mvl-dove-2.6.32/drivers/char/keyboard.c
@@ -1068,6 +1068,8 @@
 	int code;
 
 	switch (keycode) {
+		case KEY_RESERVED:
+			break;
 		case KEY_PAUSE:
 			put_queue(vc, 0xe1);
 			put_queue(vc, 0x1d | up_flag);
@@ -1125,6 +1127,8 @@
 
 static int emulate_raw(struct vc_data *vc, unsigned int keycode, unsigned char up_flag)
 {
+	if (keycode == KEY_RESERVED)
+		return 0;
 	if (keycode > 127)
 		return -1;
 
--- linux-mvl-dove-2.6.32.orig/drivers/char/amiserial.c
+++ linux-mvl-dove-2.6.32/drivers/char/amiserial.c
@@ -1262,6 +1262,36 @@
 	return 0;
 }
 
+/*
+ * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
+ * Return: write counters to the user passed counter struct
+ * NB: both 1->0 and 0->1 transitions are counted except for
+ *     RI where only 0->1 is counted.
+ */
+static int rs_get_icount(struct tty_struct *tty,
+				struct serial_icounter_struct *icount)
+{
+	struct async_struct *info = tty->driver_data;
+	struct async_icount cnow;
+	unsigned long flags;
+
+	local_irq_save(flags);
+	cnow = info->state->icount;
+	local_irq_restore(flags);
+	icount->cts = cnow.cts;
+	icount->dsr = cnow.dsr;
+	icount->rng = cnow.rng;
+	icount->dcd = cnow.dcd;
+	icount->rx = cnow.rx;
+	icount->tx = cnow.tx;
+	icount->frame = cnow.frame;
+	icount->overrun = cnow.overrun;
+	icount->parity = cnow.parity;
+	icount->brk = cnow.brk;
+	icount->buf_overrun = cnow.buf_overrun;
+
+	return 0;
+}
 
 static int rs_ioctl(struct tty_struct *tty, struct file * file,
 		    unsigned int cmd, unsigned long arg)
@@ -1331,31 +1361,6 @@
 			}
 			/* NOTREACHED */
 
-		/* 
-		 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
-		 * Return: write counters to the user passed counter struct
-		 * NB: both 1->0 and 0->1 transitions are counted except for
-		 *     RI where only 0->1 is counted.
-		 */
-		case TIOCGICOUNT:
-			local_irq_save(flags);
-			cnow = info->state->icount;
-			local_irq_restore(flags);
-			icount.cts = cnow.cts;
-			icount.dsr = cnow.dsr;
-			icount.rng = cnow.rng;
-			icount.dcd = cnow.dcd;
-			icount.rx = cnow.rx;
-			icount.tx = cnow.tx;
-			icount.frame = cnow.frame;
-			icount.overrun = cnow.overrun;
-			icount.parity = cnow.parity;
-			icount.brk = cnow.brk;
-			icount.buf_overrun = cnow.buf_overrun;
-
-			if (copy_to_user(argp, &icount, sizeof(icount)))
-				return -EFAULT;
-			return 0;
 		case TIOCSERGWILD:
 		case TIOCSERSWILD:
 			/* "setserial -W" is called in Debian boot */
@@ -1948,6 +1953,7 @@
 	.wait_until_sent = rs_wait_until_sent,
 	.tiocmget = rs_tiocmget,
 	.tiocmset = rs_tiocmset,
+	.get_icount = rs_get_icount,
 	.proc_fops = &rs_proc_fops,
 };
 
--- linux-mvl-dove-2.6.32.orig/drivers/char/i8k.c
+++ linux-mvl-dove-2.6.32/drivers/char/i8k.c
@@ -119,7 +119,7 @@
 	int eax = regs->eax;
 
 #if defined(CONFIG_X86_64)
-	asm("pushq %%rax\n\t"
+	asm volatile("pushq %%rax\n\t"
 		"movl 0(%%rax),%%edx\n\t"
 		"pushq %%rdx\n\t"
 		"movl 4(%%rax),%%ebx\n\t"
@@ -138,14 +138,14 @@
 		"movl %%edi,20(%%rax)\n\t"
 		"popq %%rdx\n\t"
 		"movl %%edx,0(%%rax)\n\t"
-		"lahf\n\t"
-		"shrl $8,%%eax\n\t"
+		"pushfq\n\t"
+		"popq %%rax\n\t"
 		"andl $1,%%eax\n"
 		:"=a"(rc)
 		:    "a"(regs)
 		:    "%ebx", "%ecx", "%edx", "%esi", "%edi", "memory");
 #else
-	asm("pushl %%eax\n\t"
+	asm volatile("pushl %%eax\n\t"
 	    "movl 0(%%eax),%%edx\n\t"
 	    "push %%edx\n\t"
 	    "movl 4(%%eax),%%ebx\n\t"
@@ -166,7 +166,8 @@
 	    "movl %%edx,0(%%eax)\n\t"
 	    "lahf\n\t"
 	    "shrl $8,%%eax\n\t"
-	    "andl $1,%%eax\n":"=a"(rc)
+	    "andl $1,%%eax\n"
+	    :"=a"(rc)
 	    :    "a"(regs)
 	    :    "%ebx", "%ecx", "%edx", "%esi", "%edi", "memory");
 #endif
--- linux-mvl-dove-2.6.32.orig/drivers/char/vt_ioctl.c
+++ linux-mvl-dove-2.6.32/drivers/char/vt_ioctl.c
@@ -38,6 +38,8 @@
 #include <linux/kbd_diacr.h>
 #include <linux/selection.h>
 
+#define max_font_size 65536
+
 char vt_dont_switch;
 extern struct tty_driver *console_driver;
 
@@ -503,6 +505,7 @@
 	struct kbd_struct * kbd;
 	unsigned int console;
 	unsigned char ucval;
+	unsigned int uival;
 	void __user *up = (void __user *)arg;
 	int i, perm;
 	int ret = 0;
@@ -657,7 +660,7 @@
 		break;
 
 	case KDGETMODE:
-		ucval = vc->vc_mode;
+		uival = vc->vc_mode;
 		goto setint;
 
 	case KDMAPDISP:
@@ -695,7 +698,7 @@
 		break;
 
 	case KDGKBMODE:
-		ucval = ((kbd->kbdmode == VC_RAW) ? K_RAW :
+		uival = ((kbd->kbdmode == VC_RAW) ? K_RAW :
 				 (kbd->kbdmode == VC_MEDIUMRAW) ? K_MEDIUMRAW :
 				 (kbd->kbdmode == VC_UNICODE) ? K_UNICODE :
 				 K_XLATE);
@@ -717,9 +720,9 @@
 		break;
 
 	case KDGKBMETA:
-		ucval = (vc_kbd_mode(kbd, VC_META) ? K_ESCPREFIX : K_METABIT);
+		uival = (vc_kbd_mode(kbd, VC_META) ? K_ESCPREFIX : K_METABIT);
 	setint:
-		ret = put_user(ucval, (int __user *)arg);
+		ret = put_user(uival, (int __user *)arg);
 		break;
 
 	case KDGETKEYCODE:
@@ -949,7 +952,7 @@
 		for (i = 0; i < MAX_NR_CONSOLES; ++i)
 			if (! VT_IS_IN_USE(i))
 				break;
-		ucval = i < MAX_NR_CONSOLES ? (i+1) : -1;
+		uival = i < MAX_NR_CONSOLES ? (i+1) : -1;
 		goto setint;		 
 
 	/*
@@ -1589,6 +1592,7 @@
 {
 	unsigned char old_vc_mode;
 	int old = fg_console;
+	struct vc_data *oldvc = vc_cons[fg_console].d;
 
 	last_console = fg_console;
 
@@ -1597,9 +1601,31 @@
 	 * KD_TEXT mode or vice versa, which means we need to blank or
 	 * unblank the screen later.
 	 */
-	old_vc_mode = vc_cons[fg_console].d->vc_mode;
+	old_vc_mode = oldvc->vc_mode;
+
+#if defined(CONFIG_VGA_CONSOLE)
+	if (old_vc_mode == KD_TEXT && oldvc->vc_sw == &vga_con &&
+	    oldvc->vc_sw->con_font_get) {
+		if (!oldvc->vc_font.data)
+			oldvc->vc_font.data = kmalloc(max_font_size, 
+						      GFP_KERNEL);
+		lock_kernel();
+		oldvc->vc_sw->con_font_get(oldvc, &oldvc->vc_font);
+		unlock_kernel();
+	}
+#endif
 	switch_screen(vc);
 
+#if defined(CONFIG_VGA_CONSOLE)
+	if (vc->vc_mode == KD_TEXT && vc->vc_sw == &vga_con &&
+	    vc->vc_sw->con_font_set) {
+		if (vc->vc_font.data) {
+			lock_kernel();
+			vc->vc_sw->con_font_set(vc, &vc->vc_font, 0);
+			unlock_kernel();
+		}
+	}
+#endif
 	/*
 	 * This can't appear below a successful kill_pid().  If it did,
 	 * then the *blank_screen operation could occur while X, having
--- linux-mvl-dove-2.6.32.orig/drivers/char/hvc_console.c
+++ linux-mvl-dove-2.6.32/drivers/char/hvc_console.c
@@ -312,6 +312,7 @@
 	spin_lock_irqsave(&hp->lock, flags);
 	/* Check and then increment for fast path open. */
 	if (hp->count++ > 0) {
+		tty_kref_get(tty);
 		spin_unlock_irqrestore(&hp->lock, flags);
 		hvc_kick();
 		return 0;
@@ -319,7 +320,7 @@
 
 	tty->driver_data = hp;
 
-	hp->tty = tty;
+	hp->tty = tty_kref_get(tty);
 
 	spin_unlock_irqrestore(&hp->lock, flags);
 
@@ -336,6 +337,7 @@
 		spin_lock_irqsave(&hp->lock, flags);
 		hp->tty = NULL;
 		spin_unlock_irqrestore(&hp->lock, flags);
+		tty_kref_put(tty);
 		tty->driver_data = NULL;
 		kref_put(&hp->kref, destroy_hvc_struct);
 		printk(KERN_ERR "hvc_open: request_irq failed with rc %d.\n", rc);
@@ -363,6 +365,7 @@
 		return;
 
 	hp = tty->driver_data;
+
 	spin_lock_irqsave(&hp->lock, flags);
 
 	if (--hp->count == 0) {
@@ -389,6 +392,7 @@
 		spin_unlock_irqrestore(&hp->lock, flags);
 	}
 
+	tty_kref_put(tty);
 	kref_put(&hp->kref, destroy_hvc_struct);
 }
 
@@ -424,10 +428,11 @@
 	spin_unlock_irqrestore(&hp->lock, flags);
 
 	if (hp->ops->notifier_hangup)
-			hp->ops->notifier_hangup(hp, hp->data);
+		hp->ops->notifier_hangup(hp, hp->data);
 
 	while(temp_open_count) {
 		--temp_open_count;
+		tty_kref_put(tty);
 		kref_put(&hp->kref, destroy_hvc_struct);
 	}
 }
@@ -592,7 +597,7 @@
 	}
 
 	/* No tty attached, just skip */
-	tty = hp->tty;
+	tty = tty_kref_get(hp->tty);
 	if (tty == NULL)
 		goto bail;
 
@@ -672,6 +677,8 @@
 
 		tty_flip_buffer_push(tty);
 	}
+	if (tty)
+		tty_kref_put(tty);
 
 	return poll_mask;
 }
@@ -806,7 +813,7 @@
 	struct tty_struct *tty;
 
 	spin_lock_irqsave(&hp->lock, flags);
-	tty = hp->tty;
+	tty = tty_kref_get(hp->tty);
 
 	if (hp->index < MAX_NR_HVC_CONSOLES)
 		vtermnos[hp->index] = -1;
@@ -818,18 +825,18 @@
 	/*
 	 * We 'put' the instance that was grabbed when the kref instance
 	 * was initialized using kref_init().  Let the last holder of this
-	 * kref cause it to be removed, which will probably be the tty_hangup
+	 * kref cause it to be removed, which will probably be the tty_vhangup
 	 * below.
 	 */
 	kref_put(&hp->kref, destroy_hvc_struct);
 
 	/*
-	 * This function call will auto chain call hvc_hangup.  The tty should
-	 * always be valid at this time unless a simultaneous tty close already
-	 * cleaned up the hvc_struct.
+	 * This function call will auto chain call hvc_hangup.
 	 */
-	if (tty)
-		tty_hangup(tty);
+	if (tty) {
+		tty_vhangup(tty);
+		tty_kref_put(tty);
+	}
 	return 0;
 }
 
--- linux-mvl-dove-2.6.32.orig/drivers/char/ds2782.h
+++ linux-mvl-dove-2.6.32/drivers/char/ds2782.h
@@ -0,0 +1,67 @@
+/*
+ *
+ *	Marvell Fuel Gauge IC driver
+ *	Maxim DS2782 Fuel Gauge IC
+ *
+ *	Author: 
+ *	Copyright (C) 2008 Marvell Ltd.
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef MV_DS2782_DRV
+#define MV_DS2782_DRV
+
+#define DS2782_I2C_ADDR 	0x34
+
+#define DS2782_STATUS_REG 	0x01
+#define DS2782_VOLT_REG 	0x0c
+#define DS2782_TEMP_REG 	0x0a
+#define DS2782_CURRENT_REG 	0x0e
+#define DS2782_ACR_REG 		0x10
+#define DS2782_IAVG_REG 	0x08
+#define DS2782_AC_REG 		0x62
+#define DS2782_AS_REG 		0x14
+#define DS2782_RSNSP_REG 	0x69
+#define DS2782_VCHG_REG 	0x64
+#define DS2782_IMIN_REG 	0x65
+#define DS2782_VAE_REG 		0x66
+#define DS2782_IAE_REG 		0x67
+#define DS2782_FULL40_REG 	0x6a
+#define DS2782_FULL_REG 	0x16
+#define DS2782_AE_REG 		0x18
+#define DS2782_SE_REG 		0x1a
+#define DS2782_RAAC_REG 	0x02
+#define DS2782_RSAC_REG 	0x04
+#define DS2782_RARC_REG 	0x06
+#define DS2782_RSRC_REG 	0x07
+
+#define DS2782_VOLT_SHIFT_BIT 	 	5
+#define DS2782_TEMP_SHIFT_BIT 		5
+#define DS2782_CURRENT_SHIFT_BIT 	0
+#define DS2782_ACR_SHIFT_BIT		0
+#define DS2782_IAVG_SHIFT_BIT 		0
+#define DS2782_AC_SHIFT_BIT 		0
+#define DS2782_AS_SHIFT_BIT 		0
+#define DS2782_RSNSP_SHIFT_BIT 		0
+#define DS2782_VCHG_SHIFT_BIT 		0
+#define DS2782_IMIN_SHIFT_BIT 		0
+#define DS2782_VAE_SHIFT_BIT		0
+#define DS2782_IAE_SHIFT_BIT		0
+#define DS2782_FULL40_SHIFT_BIT 	0
+#define DS2782_FULL_SHIFT_BIT 		0
+#define DS2782_AE_SHIFT_BIT 		0
+#define DS2782_SE_SHIFT_BIT 		0
+#define DS2782_RAAC_SHIFT_BIT 		0
+#define DS2782_RSAC_SHIFT_BIT 		0
+#define DS2782_RARC_SHIFT_BIT 		0
+#define DS2782_RSRC_SHIFT_BIT 		0
+
+extern int ds2782_reg_get(int offset, unsigned char *pDataBuf, int datasize);
+extern int ds2782_reg_set(int offset, unsigned char data);
+
+#endif /* MV_DS2782_DRV */
--- linux-mvl-dove-2.6.32.orig/drivers/char/mxser.c
+++ linux-mvl-dove-2.6.32/drivers/char/mxser.c
@@ -1736,7 +1736,7 @@
 		return 0;
 	}
 
-	if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT &&
+	if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT &&
 			test_bit(TTY_IO_ERROR, &tty->flags))
 		return -EIO;
 
@@ -1766,32 +1766,6 @@
 
 		return wait_event_interruptible(info->port.delta_msr_wait,
 				mxser_cflags_changed(info, arg, &cnow));
-	/*
-	 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
-	 * Return: write counters to the user passed counter struct
-	 * NB: both 1->0 and 0->1 transitions are counted except for
-	 *     RI where only 0->1 is counted.
-	 */
-	case TIOCGICOUNT: {
-		struct serial_icounter_struct icnt = { 0 };
-		spin_lock_irqsave(&info->slock, flags);
-		cnow = info->icount;
-		spin_unlock_irqrestore(&info->slock, flags);
-
-		icnt.frame = cnow.frame;
-		icnt.brk = cnow.brk;
-		icnt.overrun = cnow.overrun;
-		icnt.buf_overrun = cnow.buf_overrun;
-		icnt.parity = cnow.parity;
-		icnt.rx = cnow.rx;
-		icnt.tx = cnow.tx;
-		icnt.cts = cnow.cts;
-		icnt.dsr = cnow.dsr;
-		icnt.rng = cnow.rng;
-		icnt.dcd = cnow.dcd;
-
-		return copy_to_user(argp, &icnt, sizeof(icnt)) ? -EFAULT : 0;
-	}
 	case MOXA_HighSpeedOn:
 		return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
 	case MOXA_SDS_RSTICOUNTER:
@@ -1862,6 +1836,39 @@
 	return 0;
 }
 
+	/*
+	 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
+	 * Return: write counters to the user passed counter struct
+	 * NB: both 1->0 and 0->1 transitions are counted except for
+	 *     RI where only 0->1 is counted.
+	 */
+
+static int mxser_get_icount(struct tty_struct *tty,
+		struct serial_icounter_struct *icount)
+
+{
+	struct mxser_port *info = tty->driver_data;
+	struct async_icount cnow;
+	unsigned long flags;
+
+	spin_lock_irqsave(&info->slock, flags);
+	cnow = info->icount;
+	spin_unlock_irqrestore(&info->slock, flags);
+
+	icount->frame = cnow.frame;
+	icount->brk = cnow.brk;
+	icount->overrun = cnow.overrun;
+	icount->buf_overrun = cnow.buf_overrun;
+	icount->parity = cnow.parity;
+	icount->rx = cnow.rx;
+	icount->tx = cnow.tx;
+	icount->cts = cnow.cts;
+	icount->dsr = cnow.dsr;
+	icount->rng = cnow.rng;
+	icount->dcd = cnow.dcd;
+	return 0;
+}
+
 static void mxser_stoprx(struct tty_struct *tty)
 {
 	struct mxser_port *info = tty->driver_data;
@@ -2358,6 +2365,7 @@
 	.wait_until_sent = mxser_wait_until_sent,
 	.tiocmget = mxser_tiocmget,
 	.tiocmset = mxser_tiocmset,
+	.get_icount = mxser_get_icount,
 };
 
 struct tty_port_operations mxser_port_ops = {
--- linux-mvl-dove-2.6.32.orig/drivers/char/cyclades.c
+++ linux-mvl-dove-2.6.32/drivers/char/cyclades.c
@@ -2798,29 +2798,6 @@
 		 * NB: both 1->0 and 0->1 transitions are counted except for
 		 *     RI where only 0->1 is counted.
 		 */
-	case TIOCGICOUNT: {
-		struct serial_icounter_struct sic = { };
-
-		spin_lock_irqsave(&info->card->card_lock, flags);
-		cnow = info->icount;
-		spin_unlock_irqrestore(&info->card->card_lock, flags);
-
-		sic.cts = cnow.cts;
-		sic.dsr = cnow.dsr;
-		sic.rng = cnow.rng;
-		sic.dcd = cnow.dcd;
-		sic.rx = cnow.rx;
-		sic.tx = cnow.tx;
-		sic.frame = cnow.frame;
-		sic.overrun = cnow.overrun;
-		sic.parity = cnow.parity;
-		sic.brk = cnow.brk;
-		sic.buf_overrun = cnow.buf_overrun;
-
-		if (copy_to_user(argp, &sic, sizeof(sic)))
-			ret_val = -EFAULT;
-		break;
-	}
 	default:
 		ret_val = -ENOIOCTLCMD;
 	}
@@ -2832,6 +2809,31 @@
 	return ret_val;
 }				/* cy_ioctl */
 
+static int cy_get_icount(struct tty_struct *tty,
+				struct serial_icounter_struct *sic)
+{
+	struct cyclades_port *info = tty->driver_data;
+	struct cyclades_icount cnow;	/* Used to snapshot */
+	unsigned long flags;
+
+	spin_lock_irqsave(&info->card->card_lock, flags);
+	cnow = info->icount;
+	spin_unlock_irqrestore(&info->card->card_lock, flags);
+
+	sic->cts = cnow.cts;
+	sic->dsr = cnow.dsr;
+	sic->rng = cnow.rng;
+	sic->dcd = cnow.dcd;
+	sic->rx = cnow.rx;
+	sic->tx = cnow.tx;
+	sic->frame = cnow.frame;
+	sic->overrun = cnow.overrun;
+	sic->parity = cnow.parity;
+	sic->brk = cnow.brk;
+	sic->buf_overrun = cnow.buf_overrun;
+	return 0;
+}
+
 /*
  * This routine allows the tty driver to be notified when
  * device's termios settings have changed.  Note that a
@@ -4098,6 +4100,7 @@
 	.wait_until_sent = cy_wait_until_sent,
 	.tiocmget = cy_tiocmget,
 	.tiocmset = cy_tiocmset,
+	.get_icount = cy_get_icount,
 	.proc_fops = &cyclades_proc_fops,
 };
 
--- linux-mvl-dove-2.6.32.orig/drivers/char/ds2782.c
+++ linux-mvl-dove-2.6.32/drivers/char/ds2782.c
@@ -0,0 +1,119 @@
+/*
+ *
+ *	Marvell Fuel Gauge IC driver
+ *	Maxim DS2782 Fuel Gauge IC
+ *
+ *	Author: 
+ *	Copyright (C) 2008 Marvell Ltd.
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/i2c.h>
+#include "ds2782.h"
+
+static struct i2c_driver ds2782_i2c_driver;
+static	struct i2c_client *ds2782_i2c_client;
+static struct i2c_client *get_ds2782_i2c_client(void);
+
+int ds2782_reg_get(int offset, unsigned char *pDataBuf, int datasize)
+{
+	int rc;
+	struct i2c_client *i2c_client;
+
+	if((i2c_client = get_ds2782_i2c_client()))
+	{
+		rc = i2c_smbus_read_i2c_block_data(i2c_client, offset, datasize, pDataBuf);
+		if (rc < 0)
+			return -EIO;
+	}else{
+		return -ENODEV;
+	}
+    	return 0;	
+}
+EXPORT_SYMBOL(ds2782_reg_get);
+
+int ds2782_reg_set(int offset, unsigned char data)
+{
+	struct i2c_client *i2c_client;
+
+	if((i2c_client = get_ds2782_i2c_client()))
+	{
+		i2c_smbus_write_byte_data(i2c_client, offset, data);
+
+	}else{
+		return -ENODEV;
+	}
+    	return 0;	
+}
+EXPORT_SYMBOL(ds2782_reg_set);
+
+static struct i2c_client *get_ds2782_i2c_client(void)
+{
+	return ds2782_i2c_client;
+}
+
+
+static int ds2782_probe(struct i2c_client *client,
+			const struct i2c_device_id *id)
+{
+	int rc;
+
+	if (!i2c_check_functionality(client->adapter,
+				     I2C_FUNC_SMBUS_I2C_BLOCK)) {
+		dev_err(&client->dev, "i2c bus does not support the ds2782\n");
+		rc = -ENODEV;
+		goto exit;
+	}
+
+	ds2782_i2c_client = client;
+	return 0;
+
+ exit:
+	return rc;
+}
+
+static int ds2782_remove(struct i2c_client *client)
+{
+	ds2782_i2c_client = NULL;
+	return 0;
+}
+
+
+
+static const struct i2c_device_id ds2782_id[] = {
+	{ "ds2782", 0 },
+	{ }
+};
+MODULE_DEVICE_TABLE(i2c, ds2782_id);
+
+static struct i2c_driver ds2782_i2c_driver = {
+	.driver = {
+		.name	= "ds2782",
+	},
+	.probe = ds2782_probe,
+	.remove = ds2782_remove,
+	.id_table = ds2782_id,
+};
+
+
+
+static int __init ds2782_init(void)
+{
+	return i2c_add_driver(&ds2782_i2c_driver);
+}
+
+static void __exit ds2782_exit(void)
+{
+	i2c_del_driver(&ds2782_i2c_driver);
+}
+
+
+module_init(ds2782_init);
+module_exit(ds2782_exit);
+
+
--- linux-mvl-dove-2.6.32.orig/drivers/char/agp/sis-agp.c
+++ linux-mvl-dove-2.6.32/drivers/char/agp/sis-agp.c
@@ -415,14 +415,6 @@
 		.subvendor	= PCI_ANY_ID,
 		.subdevice	= PCI_ANY_ID,
 	},
-	{
-		.class		= (PCI_CLASS_BRIDGE_HOST << 8),
-		.class_mask	= ~0,
-		.vendor		= PCI_VENDOR_ID_SI,
-		.device		= PCI_DEVICE_ID_SI_760,
-		.subvendor	= PCI_ANY_ID,
-		.subdevice	= PCI_ANY_ID,
-	},
 	{ }
 };
 
--- linux-mvl-dove-2.6.32.orig/drivers/char/agp/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/char/agp/Kconfig
@@ -57,7 +57,7 @@
 
 config AGP_AMD64
 	tristate "AMD Opteron/Athlon64 on-CPU GART support" if !GART_IOMMU
-	depends on AGP && X86
+	depends on AGP && X86 && K8_NB
 	default y if GART_IOMMU
 	help
 	  This option gives you AGP support for the GLX component of
--- linux-mvl-dove-2.6.32.orig/drivers/char/agp/hp-agp.c
+++ linux-mvl-dove-2.6.32/drivers/char/agp/hp-agp.c
@@ -488,9 +488,8 @@
 	handle = obj;
 	do {
 		status = acpi_get_object_info(handle, &info);
-		if (ACPI_SUCCESS(status)) {
+		if (ACPI_SUCCESS(status) && (info->valid & ACPI_VALID_HID)) {
 			/* TBD check _CID also */
-			info->hardware_id.string[sizeof(info->hardware_id.length)-1] = '\0';
 			match = (strcmp(info->hardware_id.string, "HWP0001") == 0);
 			kfree(info);
 			if (match) {
--- linux-mvl-dove-2.6.32.orig/drivers/char/agp/amd64-agp.c
+++ linux-mvl-dove-2.6.32/drivers/char/agp/amd64-agp.c
@@ -499,6 +499,10 @@
 	u8 cap_ptr;
 	int err;
 
+	/* The Highlander principle */
+	if (agp_bridges_found)
+		return -ENODEV;
+
 	cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
 	if (!cap_ptr)
 		return -ENODEV;
@@ -562,6 +566,8 @@
 			   amd64_aperture_sizes[bridge->aperture_size_idx].size);
 	agp_remove_bridge(bridge);
 	agp_put_bridge(bridge);
+
+	agp_bridges_found--;
 }
 
 #ifdef CONFIG_PM
@@ -709,6 +715,11 @@
 
 MODULE_DEVICE_TABLE(pci, agp_amd64_pci_table);
 
+static DEFINE_PCI_DEVICE_TABLE(agp_amd64_pci_promisc_table) = {
+	{ PCI_DEVICE_CLASS(0, 0) },
+	{ }
+};
+
 static struct pci_driver agp_amd64_pci_driver = {
 	.name		= "agpgart-amd64",
 	.id_table	= agp_amd64_pci_table,
@@ -733,7 +744,6 @@
 		return err;
 
 	if (agp_bridges_found == 0) {
-		struct pci_dev *dev;
 		if (!agp_try_unsupported && !agp_try_unsupported_boot) {
 			printk(KERN_INFO PFX "No supported AGP bridge found.\n");
 #ifdef MODULE
@@ -749,17 +759,10 @@
 			return -ENODEV;
 
 		/* Look for any AGP bridge */
-		dev = NULL;
-		err = -ENODEV;
-		for_each_pci_dev(dev) {
-			if (!pci_find_capability(dev, PCI_CAP_ID_AGP))
-				continue;
-			/* Only one bridge supported right now */
-			if (agp_amd64_probe(dev, NULL) == 0) {
-				err = 0;
-				break;
-			}
-		}
+		agp_amd64_pci_driver.id_table = agp_amd64_pci_promisc_table;
+		err = driver_attach(&agp_amd64_pci_driver.driver);
+		if (err == 0 && agp_bridges_found == 0)
+			err = -ENODEV;
 	}
 	return err;
 }
--- linux-mvl-dove-2.6.32.orig/drivers/char/agp/intel-agp.c
+++ linux-mvl-dove-2.6.32/drivers/char/agp/intel-agp.c
@@ -8,8 +8,12 @@
 #include <linux/kernel.h>
 #include <linux/pagemap.h>
 #include <linux/agp_backend.h>
+#include <asm/smp.h>
 #include "agp.h"
 
+int intel_agp_enabled;
+EXPORT_SYMBOL(intel_agp_enabled);
+
 /*
  * If we have Intel graphics, we're not going to have anything other than
  * an Intel IOMMU. So make the correct use of the PCI DMA API contingent
@@ -48,6 +52,8 @@
 #define PCI_DEVICE_ID_INTEL_Q33_IG          0x29D2
 #define PCI_DEVICE_ID_INTEL_B43_HB          0x2E40
 #define PCI_DEVICE_ID_INTEL_B43_IG          0x2E42
+#define PCI_DEVICE_ID_INTEL_B43_1_HB        0x2E90
+#define PCI_DEVICE_ID_INTEL_B43_1_IG        0x2E92
 #define PCI_DEVICE_ID_INTEL_GM45_HB         0x2A40
 #define PCI_DEVICE_ID_INTEL_GM45_IG         0x2A42
 #define PCI_DEVICE_ID_INTEL_IGD_E_HB        0x2E00
@@ -95,6 +101,7 @@
 		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_GM45_HB || \
 		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G41_HB || \
 		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_B43_HB || \
+		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_B43_1_HB || \
 		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDNG_D_HB || \
 		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDNG_M_HB || \
 		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDNG_MA_HB || \
@@ -178,6 +185,7 @@
 	 * popup and for the GTT.
 	 */
 	int gtt_entries;			/* i830+ */
+	int gtt_total_size;
 	union {
 		void __iomem *i9xx_flush_page;
 		void *i8xx_flush_page;
@@ -814,12 +822,6 @@
 		intel_i830_fini_flush();
 }
 
-static void
-do_wbinvd(void *null)
-{
-	wbinvd();
-}
-
 /* The chipset_flush interface needs to get data that has already been
  * flushed out of the CPU all the way out to main memory, because the GPU
  * doesn't snoop those buffers.
@@ -836,12 +838,10 @@
 
 	memset(pg, 0, 1024);
 
-	if (cpu_has_clflush) {
+	if (cpu_has_clflush)
 		clflush_cache_range(pg, 1024);
-	} else {
-		if (on_each_cpu(do_wbinvd, NULL, 1) != 0)
-			printk(KERN_ERR "Timed out waiting for cache flush.\n");
-	}
+	else if (wbinvd_on_all_cpus() != 0)
+		printk(KERN_ERR "Timed out waiting for cache flush.\n");
 }
 
 /* The intel i830 automatically initializes the agp aperture during POST.
@@ -1153,7 +1153,7 @@
 	readl(intel_private.registers+I810_PGETBL_CTL);	/* PCI Posting. */
 
 	if (agp_bridge->driver->needs_scratch_page) {
-		for (i = intel_private.gtt_entries; i < current_size->num_entries; i++) {
+		for (i = intel_private.gtt_entries; i < intel_private.gtt_total_size; i++) {
 			writel(agp_bridge->scratch_page, intel_private.gtt+i);
 		}
 		readl(intel_private.gtt+i-1);	/* PCI Posting. */
@@ -1308,6 +1308,8 @@
 	if (!intel_private.gtt)
 		return -ENOMEM;
 
+	intel_private.gtt_total_size = gtt_map_size / 4;
+
 	temp &= 0xfff80000;
 
 	intel_private.registers = ioremap(temp, 128 * 4096);
@@ -1357,6 +1359,7 @@
 	case PCI_DEVICE_ID_INTEL_G45_HB:
 	case PCI_DEVICE_ID_INTEL_G41_HB:
 	case PCI_DEVICE_ID_INTEL_B43_HB:
+	case PCI_DEVICE_ID_INTEL_B43_1_HB:
 	case PCI_DEVICE_ID_INTEL_IGDNG_D_HB:
 	case PCI_DEVICE_ID_INTEL_IGDNG_M_HB:
 	case PCI_DEVICE_ID_INTEL_IGDNG_MA_HB:
@@ -1395,6 +1398,8 @@
 	if (!intel_private.gtt)
 		return -ENOMEM;
 
+	intel_private.gtt_total_size = gtt_size / 4;
+
 	intel_private.registers = ioremap(temp, 128 * 4096);
 	if (!intel_private.registers) {
 		iounmap(intel_private.gtt);
@@ -2354,6 +2359,8 @@
 	    "G45/G43", NULL, &intel_i965_driver },
 	{ PCI_DEVICE_ID_INTEL_B43_HB, PCI_DEVICE_ID_INTEL_B43_IG, 0,
 	    "B43", NULL, &intel_i965_driver },
+	{ PCI_DEVICE_ID_INTEL_B43_1_HB, PCI_DEVICE_ID_INTEL_B43_1_IG, 0,
+	    "B43", NULL, &intel_i965_driver },
 	{ PCI_DEVICE_ID_INTEL_G41_HB, PCI_DEVICE_ID_INTEL_G41_IG, 0,
 	    "G41", NULL, &intel_i965_driver },
 	{ PCI_DEVICE_ID_INTEL_IGDNG_D_HB, PCI_DEVICE_ID_INTEL_IGDNG_D_IG, 0,
@@ -2373,7 +2380,7 @@
 	struct agp_bridge_data *bridge;
 	u8 cap_ptr = 0;
 	struct resource *r;
-	int i;
+	int i, err;
 
 	cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
 
@@ -2461,7 +2468,10 @@
 				"set gfx device dma mask 36bit failed!\n");
 
 	pci_set_drvdata(pdev, bridge);
-	return agp_add_bridge(bridge);
+	err = agp_add_bridge(bridge);
+	if (!err)
+		intel_agp_enabled = 1;
+	return err;
 }
 
 static void __devexit agp_intel_remove(struct pci_dev *pdev)
@@ -2562,6 +2572,7 @@
 	ID(PCI_DEVICE_ID_INTEL_G45_HB),
 	ID(PCI_DEVICE_ID_INTEL_G41_HB),
 	ID(PCI_DEVICE_ID_INTEL_B43_HB),
+	ID(PCI_DEVICE_ID_INTEL_B43_1_HB),
 	ID(PCI_DEVICE_ID_INTEL_IGDNG_D_HB),
 	ID(PCI_DEVICE_ID_INTEL_IGDNG_M_HB),
 	ID(PCI_DEVICE_ID_INTEL_IGDNG_MA_HB),
--- linux-mvl-dove-2.6.32.orig/drivers/char/agp/generic.c
+++ linux-mvl-dove-2.6.32/drivers/char/agp/generic.c
@@ -123,6 +123,9 @@
 	struct agp_memory *new;
 	unsigned long alloc_size = num_agp_pages*sizeof(struct page *);
 
+	if (INT_MAX/sizeof(struct page *) < num_agp_pages)
+		return NULL;
+
 	new = kzalloc(sizeof(struct agp_memory), GFP_KERNEL);
 	if (new == NULL)
 		return NULL;
@@ -242,11 +245,14 @@
 	int scratch_pages;
 	struct agp_memory *new;
 	size_t i;
+	int cur_memory;
 
 	if (!bridge)
 		return NULL;
 
-	if ((atomic_read(&bridge->current_memory_agp) + page_count) > bridge->max_memory_agp)
+	cur_memory = atomic_read(&bridge->current_memory_agp);
+	if ((cur_memory + page_count > bridge->max_memory_agp) ||
+	    (cur_memory + page_count < page_count))
 		return NULL;
 
 	if (type >= AGP_USER_TYPES) {
@@ -1123,8 +1129,8 @@
 		return -EINVAL;
 	}
 
-	/* AK: could wrap */
-	if ((pg_start + mem->page_count) > num_entries)
+	if (((pg_start + mem->page_count) > num_entries) ||
+	    ((pg_start + mem->page_count) < pg_start))
 		return -EINVAL;
 
 	j = pg_start;
@@ -1158,7 +1164,7 @@
 {
 	size_t i;
 	struct agp_bridge_data *bridge;
-	int mask_type;
+	int mask_type, num_entries;
 
 	bridge = mem->bridge;
 	if (!bridge)
@@ -1170,6 +1176,11 @@
 	if (type != mem->type)
 		return -EINVAL;
 
+	num_entries = agp_num_entries();
+	if (((pg_start + mem->page_count) > num_entries) ||
+	    ((pg_start + mem->page_count) < pg_start))
+		return -EINVAL;
+
 	mask_type = bridge->driver->agp_type_to_mask_type(bridge, type);
 	if (mask_type != 0) {
 		/* The generic routines know nothing of memory types */
--- linux-mvl-dove-2.6.32.orig/drivers/char/ipmi/ipmi_si_intf.c
+++ linux-mvl-dove-2.6.32/drivers/char/ipmi/ipmi_si_intf.c
@@ -310,9 +310,14 @@
 {
 	/* Deliver the message to the upper layer with the lock
 	   released. */
-	spin_unlock(&(smi_info->si_lock));
-	ipmi_smi_msg_received(smi_info->intf, msg);
-	spin_lock(&(smi_info->si_lock));
+
+	if (smi_info->run_to_completion) {
+		ipmi_smi_msg_received(smi_info->intf, msg);
+	} else {
+		spin_unlock(&(smi_info->si_lock));
+		ipmi_smi_msg_received(smi_info->intf, msg);
+		spin_lock(&(smi_info->si_lock));
+	}
 }
 
 static void return_hosed_msg(struct smi_info *smi_info, int cCode)
--- linux-mvl-dove-2.6.32.orig/drivers/char/ip2/ip2main.c
+++ linux-mvl-dove-2.6.32/drivers/char/ip2/ip2main.c
@@ -183,6 +183,8 @@
 static int  ip2_tiocmget(struct tty_struct *tty, struct file *file);
 static int  ip2_tiocmset(struct tty_struct *tty, struct file *file,
 			 unsigned int set, unsigned int clear);
+static int ip2_get_icount(struct tty_struct *tty,
+		struct serial_icounter_struct *icount);
 
 static void set_irq(int, int);
 static void ip2_interrupt_bh(struct work_struct *work);
@@ -448,6 +450,7 @@
 	.hangup          = ip2_hangup,
 	.tiocmget	 = ip2_tiocmget,
 	.tiocmset	 = ip2_tiocmset,
+	.get_icount	 = ip2_get_icount,
 	.proc_fops	 = &ip2_proc_fops,
 };
 
@@ -2112,7 +2115,6 @@
 	i2ChanStrPtr pCh = DevTable[tty->index];
 	i2eBordStrPtr pB;
 	struct async_icount cprev, cnow;	/* kernel counter temps */
-	struct serial_icounter_struct __user *p_cuser;
 	int rc = 0;
 	unsigned long flags;
 	void __user *argp = (void __user *)arg;
@@ -2281,34 +2283,6 @@
 		break;
 
 	/*
-	 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
-	 * Return: write counters to the user passed counter struct
-	 * NB: both 1->0 and 0->1 transitions are counted except for RI where
-	 * only 0->1 is counted. The controller is quite capable of counting
-	 * both, but this done to preserve compatibility with the standard
-	 * serial driver.
-	 */
-	case TIOCGICOUNT:
-		ip2trace (CHANN, ITRC_IOCTL, 11, 1, rc );
-
-		write_lock_irqsave(&pB->read_fifo_spinlock, flags);
-		cnow = pCh->icount;
-		write_unlock_irqrestore(&pB->read_fifo_spinlock, flags);
-		p_cuser = argp;
-		rc = put_user(cnow.cts, &p_cuser->cts);
-		rc = put_user(cnow.dsr, &p_cuser->dsr);
-		rc = put_user(cnow.rng, &p_cuser->rng);
-		rc = put_user(cnow.dcd, &p_cuser->dcd);
-		rc = put_user(cnow.rx, &p_cuser->rx);
-		rc = put_user(cnow.tx, &p_cuser->tx);
-		rc = put_user(cnow.frame, &p_cuser->frame);
-		rc = put_user(cnow.overrun, &p_cuser->overrun);
-		rc = put_user(cnow.parity, &p_cuser->parity);
-		rc = put_user(cnow.brk, &p_cuser->brk);
-		rc = put_user(cnow.buf_overrun, &p_cuser->buf_overrun);
-		break;
-
-	/*
 	 * The rest are not supported by this driver. By returning -ENOIOCTLCMD they
 	 * will be passed to the line discipline for it to handle.
 	 */
@@ -2332,6 +2306,46 @@
 	return rc;
 }
 
+static int ip2_get_icount(struct tty_struct *tty,
+		struct serial_icounter_struct *icount)
+{
+	i2ChanStrPtr pCh = DevTable[tty->index];
+	i2eBordStrPtr pB;
+	struct async_icount cnow;	/* kernel counter temp */
+	unsigned long flags;
+
+	if ( pCh == NULL )
+		return -ENODEV;
+
+	pB = pCh->pMyBord;
+
+	/*
+	 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
+	 * Return: write counters to the user passed counter struct
+	 * NB: both 1->0 and 0->1 transitions are counted except for RI where
+	 * only 0->1 is counted. The controller is quite capable of counting
+	 * both, but this done to preserve compatibility with the standard
+	 * serial driver.
+	 */
+
+	write_lock_irqsave(&pB->read_fifo_spinlock, flags);
+	cnow = pCh->icount;
+	write_unlock_irqrestore(&pB->read_fifo_spinlock, flags);
+
+	icount->cts = cnow.cts;
+	icount->dsr = cnow.dsr;
+	icount->rng = cnow.rng;
+	icount->dcd = cnow.dcd;
+	icount->rx = cnow.rx;
+	icount->tx = cnow.tx;
+	icount->frame = cnow.frame;
+	icount->overrun = cnow.overrun;
+	icount->parity = cnow.parity;
+	icount->brk = cnow.brk;
+	icount->buf_overrun = cnow.buf_overrun;
+	return 0;
+}
+
 /******************************************************************************/
 /* Function:   GetSerialInfo()                                                */
 /* Parameters: Pointer to channel structure                                   */
--- linux-mvl-dove-2.6.32.orig/drivers/char/tpm/tpm_tis.c
+++ linux-mvl-dove-2.6.32/drivers/char/tpm/tpm_tis.c
@@ -257,6 +257,10 @@
 	return size;
 }
 
+static int itpm;
+module_param(itpm, bool, 0444);
+MODULE_PARM_DESC(itpm, "Force iTPM workarounds (found on some Lenovo laptops)");
+
 /*
  * If interrupts are used (signaled by an irq set in the vendor structure)
  * tpm.c can skip polling for the data to be available as the interrupt is
@@ -293,7 +297,7 @@
 		wait_for_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
 			      &chip->vendor.int_queue);
 		status = tpm_tis_status(chip);
-		if ((status & TPM_STS_DATA_EXPECT) == 0) {
+		if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) {
 			rc = -EIO;
 			goto out_err;
 		}
@@ -350,6 +354,7 @@
 		   NULL);
 static DEVICE_ATTR(caps, S_IRUGO, tpm_show_caps_1_2, NULL);
 static DEVICE_ATTR(cancel, S_IWUSR | S_IWGRP, NULL, tpm_store_cancel);
+static DEVICE_ATTR(timeouts, S_IRUGO, tpm_show_timeouts, NULL);
 
 static struct attribute *tis_attrs[] = {
 	&dev_attr_pubek.attr,
@@ -359,7 +364,8 @@
 	&dev_attr_owned.attr,
 	&dev_attr_temp_deactivated.attr,
 	&dev_attr_caps.attr,
-	&dev_attr_cancel.attr, NULL,
+	&dev_attr_cancel.attr,
+	&dev_attr_timeouts.attr, NULL,
 };
 
 static struct attribute_group tis_attr_grp = {
@@ -467,6 +473,10 @@
 		 "1.2 TPM (device-id 0x%X, rev-id %d)\n",
 		 vendor >> 16, ioread8(chip->vendor.iobase + TPM_RID(0)));
 
+	if (itpm)
+		dev_info(dev, "Intel iTPM workaround enabled\n");
+
+
 	/* Figure out the capabilities */
 	intfcaps =
 	    ioread32(chip->vendor.iobase +
@@ -614,7 +624,14 @@
 
 static int tpm_tis_pnp_resume(struct pnp_dev *dev)
 {
-	return tpm_pm_resume(&dev->dev);
+	struct tpm_chip *chip = pnp_get_drvdata(dev);
+	int ret;
+
+	ret = tpm_pm_resume(&dev->dev);
+	if (!ret)
+		tpm_continue_selftest(chip);
+
+	return ret;
 }
 
 static struct pnp_device_id tpm_pnp_tbl[] __devinitdata = {
@@ -629,6 +646,7 @@
 	{"", 0},		/* User Specified */
 	{"", 0}			/* Terminator */
 };
+MODULE_DEVICE_TABLE(pnp, tpm_pnp_tbl);
 
 static __devexit void tpm_tis_pnp_remove(struct pnp_dev *dev)
 {
--- linux-mvl-dove-2.6.32.orig/drivers/char/tpm/tpm.c
+++ linux-mvl-dove-2.6.32/drivers/char/tpm/tpm.c
@@ -353,12 +353,14 @@
 		    tpm_protected_ordinal_duration[ordinal &
 						   TPM_PROTECTED_ORDINAL_MASK];
 
-	if (duration_idx != TPM_UNDEFINED)
+	if (duration_idx != TPM_UNDEFINED) {
 		duration = chip->vendor.duration[duration_idx];
-	if (duration <= 0)
+		/* if duration is 0, it's because chip->vendor.duration wasn't */
+		/* filled yet, so we set the lowest timeout just to give enough */
+		/* time for tpm_get_timeouts() to succeed */
+		return (duration <= 0 ? HZ : duration);
+	} else
 		return 2 * 60 * HZ;
-	else
-		return duration;
 }
 EXPORT_SYMBOL_GPL(tpm_calc_ordinal_duration);
 
@@ -564,9 +566,11 @@
 	if (rc)
 		return;
 
-	if (be32_to_cpu(tpm_cmd.header.out.return_code)
-	    != 3 * sizeof(u32))
+	if (be32_to_cpu(tpm_cmd.header.out.return_code) != 0 ||
+	    be32_to_cpu(tpm_cmd.header.out.length)
+	    != sizeof(tpm_cmd.header.out) + sizeof(u32) + 3 * sizeof(u32))
 		return;
+
 	duration_cap = &tpm_cmd.params.getcap_out.cap.duration;
 	chip->vendor.duration[TPM_SHORT] =
 	    usecs_to_jiffies(be32_to_cpu(duration_cap->tpm_short));
@@ -910,6 +914,18 @@
 }
 EXPORT_SYMBOL_GPL(tpm_show_caps_1_2);
 
+ssize_t tpm_show_timeouts(struct device *dev, struct device_attribute *attr,
+			  char *buf)
+{
+	struct tpm_chip *chip = dev_get_drvdata(dev);
+
+	return sprintf(buf, "%d %d %d\n",
+	               jiffies_to_usecs(chip->vendor.duration[TPM_SHORT]),
+	               jiffies_to_usecs(chip->vendor.duration[TPM_MEDIUM]),
+	               jiffies_to_usecs(chip->vendor.duration[TPM_LONG]));
+}
+EXPORT_SYMBOL_GPL(tpm_show_timeouts);
+
 ssize_t tpm_store_cancel(struct device *dev, struct device_attribute *attr,
 			const char *buf, size_t count)
 {
@@ -953,7 +969,7 @@
 		return -EBUSY;
 	}
 
-	chip->data_buffer = kmalloc(TPM_BUFSIZE * sizeof(u8), GFP_KERNEL);
+	chip->data_buffer = kzalloc(TPM_BUFSIZE, GFP_KERNEL);
 	if (chip->data_buffer == NULL) {
 		clear_bit(0, &chip->is_open);
 		put_device(chip->dev);
--- linux-mvl-dove-2.6.32.orig/drivers/char/tpm/tpm_infineon.c
+++ linux-mvl-dove-2.6.32/drivers/char/tpm/tpm_infineon.c
@@ -39,12 +39,12 @@
 struct tpm_inf_dev {
 	int iotype;
 
-	void __iomem *mem_base;		/* MMIO ioremap'd addr */
-	unsigned long map_base;		/* phys MMIO base */
-	unsigned long map_size;		/* MMIO region size */
-	unsigned int index_off;		/* index register offset */
+	void __iomem *mem_base;	/* MMIO ioremap'd addr */
+	unsigned long map_base;	/* phys MMIO base */
+	unsigned long map_size;	/* MMIO region size */
+	unsigned int index_off;	/* index register offset */
 
-	unsigned int data_regs;		/* Data registers */
+	unsigned int data_regs;	/* Data registers */
 	unsigned int data_size;
 
 	unsigned int config_port;	/* IO Port config index reg */
@@ -406,14 +406,14 @@
 	.miscdev = {.fops = &inf_ops,},
 };
 
-static const struct pnp_device_id tpm_pnp_tbl[] = {
+static const struct pnp_device_id tpm_inf_pnp_tbl[] = {
 	/* Infineon TPMs */
 	{"IFX0101", 0},
 	{"IFX0102", 0},
 	{"", 0}
 };
 
-MODULE_DEVICE_TABLE(pnp, tpm_pnp_tbl);
+MODULE_DEVICE_TABLE(pnp, tpm_inf_pnp_tbl);
 
 static int __devinit tpm_inf_pnp_probe(struct pnp_dev *dev,
 				       const struct pnp_device_id *dev_id)
@@ -430,7 +430,7 @@
 	if (pnp_port_valid(dev, 0) && pnp_port_valid(dev, 1) &&
 	    !(pnp_port_flags(dev, 0) & IORESOURCE_DISABLED)) {
 
-	    	tpm_dev.iotype = TPM_INF_IO_PORT;
+		tpm_dev.iotype = TPM_INF_IO_PORT;
 
 		tpm_dev.config_port = pnp_port_start(dev, 0);
 		tpm_dev.config_size = pnp_port_len(dev, 0);
@@ -459,9 +459,9 @@
 			goto err_last;
 		}
 	} else if (pnp_mem_valid(dev, 0) &&
-	           !(pnp_mem_flags(dev, 0) & IORESOURCE_DISABLED)) {
+		   !(pnp_mem_flags(dev, 0) & IORESOURCE_DISABLED)) {
 
-	    	tpm_dev.iotype = TPM_INF_IO_MEM;
+		tpm_dev.iotype = TPM_INF_IO_MEM;
 
 		tpm_dev.map_base = pnp_mem_start(dev, 0);
 		tpm_dev.map_size = pnp_mem_len(dev, 0);
@@ -563,11 +563,11 @@
 			 "product id 0x%02x%02x"
 			 "%s\n",
 			 tpm_dev.iotype == TPM_INF_IO_PORT ?
-				tpm_dev.config_port :
-				tpm_dev.map_base + tpm_dev.index_off,
+			 tpm_dev.config_port :
+			 tpm_dev.map_base + tpm_dev.index_off,
 			 tpm_dev.iotype == TPM_INF_IO_PORT ?
-				tpm_dev.data_regs :
-				tpm_dev.map_base + tpm_dev.data_regs,
+			 tpm_dev.data_regs :
+			 tpm_dev.map_base + tpm_dev.data_regs,
 			 version[0], version[1],
 			 vendorid[0], vendorid[1],
 			 productid[0], productid[1], chipname);
@@ -607,20 +607,55 @@
 			iounmap(tpm_dev.mem_base);
 			release_mem_region(tpm_dev.map_base, tpm_dev.map_size);
 		}
+		tpm_dev_vendor_release(chip);
 		tpm_remove_hardware(chip->dev);
 	}
 }
 
+static int tpm_inf_pnp_suspend(struct pnp_dev *dev, pm_message_t pm_state)
+{
+	struct tpm_chip *chip = pnp_get_drvdata(dev);
+	int rc;
+	if (chip) {
+		u8 savestate[] = {
+			0, 193,	/* TPM_TAG_RQU_COMMAND */
+			0, 0, 0, 10,	/* blob length (in bytes) */
+			0, 0, 0, 152	/* TPM_ORD_SaveState */
+		};
+		dev_info(&dev->dev, "saving TPM state\n");
+		rc = tpm_inf_send(chip, savestate, sizeof(savestate));
+		if (rc < 0) {
+			dev_err(&dev->dev, "error while saving TPM state\n");
+			return rc;
+		}
+	}
+	return 0;
+}
+
+static int tpm_inf_pnp_resume(struct pnp_dev *dev)
+{
+	/* Re-configure TPM after suspending */
+	tpm_config_out(ENABLE_REGISTER_PAIR, TPM_INF_ADDR);
+	tpm_config_out(IOLIMH, TPM_INF_ADDR);
+	tpm_config_out((tpm_dev.data_regs >> 8) & 0xff, TPM_INF_DATA);
+	tpm_config_out(IOLIML, TPM_INF_ADDR);
+	tpm_config_out((tpm_dev.data_regs & 0xff), TPM_INF_DATA);
+	/* activate register */
+	tpm_config_out(TPM_DAR, TPM_INF_ADDR);
+	tpm_config_out(0x01, TPM_INF_DATA);
+	tpm_config_out(DISABLE_REGISTER_PAIR, TPM_INF_ADDR);
+	/* disable RESET, LP and IRQC */
+	tpm_data_out(RESET_LP_IRQC_DISABLE, CMD);
+	return tpm_pm_resume(&dev->dev);
+}
+
 static struct pnp_driver tpm_inf_pnp_driver = {
 	.name = "tpm_inf_pnp",
-	.driver = {
-		.owner = THIS_MODULE,
-		.suspend = tpm_pm_suspend,
-		.resume = tpm_pm_resume,
-	},
-	.id_table = tpm_pnp_tbl,
+	.id_table = tpm_inf_pnp_tbl,
 	.probe = tpm_inf_pnp_probe,
-	.remove = __devexit_p(tpm_inf_pnp_remove),
+	.suspend = tpm_inf_pnp_suspend,
+	.resume = tpm_inf_pnp_resume,
+	.remove = __devexit_p(tpm_inf_pnp_remove)
 };
 
 static int __init init_inf(void)
@@ -638,5 +673,5 @@
 
 MODULE_AUTHOR("Marcel Selhorst <m.selhorst@sirrix.com>");
 MODULE_DESCRIPTION("Driver for Infineon TPM SLD 9630 TT 1.1 / SLB 9635 TT 1.2");
-MODULE_VERSION("1.9");
+MODULE_VERSION("1.9.2");
 MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/drivers/char/tpm/tpm.h
+++ linux-mvl-dove-2.6.32/drivers/char/tpm/tpm.h
@@ -56,6 +56,8 @@
 				char *);
 extern ssize_t tpm_show_temp_deactivated(struct device *,
 					 struct device_attribute *attr, char *);
+extern ssize_t tpm_show_timeouts(struct device *,
+				 struct device_attribute *attr, char *);
 
 struct tpm_chip;
 
@@ -224,6 +226,7 @@
 	u8	algorithm[4];
 	u8	encscheme[2];
 	u8	sigscheme[2];
+	__be32	paramsize;
 	u8	parameters[12]; /*assuming RSA*/
 	__be32	keysize;
 	u8	modulus[256];
--- linux-mvl-dove-2.6.32.orig/drivers/char/pcmcia/synclink_cs.c
+++ linux-mvl-dove-2.6.32/drivers/char/pcmcia/synclink_cs.c
@@ -2252,6 +2252,32 @@
 	return 0;
 }
 
+static int mgslpc_get_icount(struct tty_struct *tty,
+				struct serial_icounter_struct *icount)
+{
+	MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
+	struct mgsl_icount cnow;	/* kernel counter temps */
+	unsigned long flags;
+
+	spin_lock_irqsave(&info->lock,flags);
+	cnow = info->icount;
+	spin_unlock_irqrestore(&info->lock,flags);
+
+	icount->cts = cnow.cts;
+	icount->dsr = cnow.dsr;
+	icount->rng = cnow.rng;
+	icount->dcd = cnow.dcd;
+	icount->rx = cnow.rx;
+	icount->tx = cnow.tx;
+	icount->frame = cnow.frame;
+	icount->overrun = cnow.overrun;
+	icount->parity = cnow.parity;
+	icount->brk = cnow.brk;
+	icount->buf_overrun = cnow.buf_overrun;
+
+	return 0;
+}
+
 /* Service an IOCTL request
  *
  * Arguments:
@@ -2267,11 +2293,7 @@
 			unsigned int cmd, unsigned long arg)
 {
 	MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
-	int error;
-	struct mgsl_icount cnow;	/* kernel counter temps */
-	struct serial_icounter_struct __user *p_cuser;	/* user space */
 	void __user *argp = (void __user *)arg;
-	unsigned long flags;
 
 	if (debug_level >= DEBUG_LEVEL_INFO)
 		printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
@@ -2281,7 +2303,7 @@
 		return -ENODEV;
 
 	if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
-	    (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
+	    (cmd != TIOCMIWAIT)) {
 		if (tty->flags & (1 << TTY_IO_ERROR))
 		    return -EIO;
 	}
@@ -2311,34 +2333,6 @@
 		return wait_events(info, argp);
 	case TIOCMIWAIT:
 		return modem_input_wait(info,(int)arg);
-	case TIOCGICOUNT:
-		spin_lock_irqsave(&info->lock,flags);
-		cnow = info->icount;
-		spin_unlock_irqrestore(&info->lock,flags);
-		p_cuser = argp;
-		PUT_USER(error,cnow.cts, &p_cuser->cts);
-		if (error) return error;
-		PUT_USER(error,cnow.dsr, &p_cuser->dsr);
-		if (error) return error;
-		PUT_USER(error,cnow.rng, &p_cuser->rng);
-		if (error) return error;
-		PUT_USER(error,cnow.dcd, &p_cuser->dcd);
-		if (error) return error;
-		PUT_USER(error,cnow.rx, &p_cuser->rx);
-		if (error) return error;
-		PUT_USER(error,cnow.tx, &p_cuser->tx);
-		if (error) return error;
-		PUT_USER(error,cnow.frame, &p_cuser->frame);
-		if (error) return error;
-		PUT_USER(error,cnow.overrun, &p_cuser->overrun);
-		if (error) return error;
-		PUT_USER(error,cnow.parity, &p_cuser->parity);
-		if (error) return error;
-		PUT_USER(error,cnow.brk, &p_cuser->brk);
-		if (error) return error;
-		PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
-		if (error) return error;
-		return 0;
 	default:
 		return -ENOIOCTLCMD;
 	}
@@ -4164,6 +4158,8 @@
 	if (cmd != SIOCWANDEV)
 		return hdlc_ioctl(dev, ifr, cmd);
 
+	memset(&new_line, 0, size);
+
 	switch(ifr->ifr_settings.type) {
 	case IF_GET_IFACE: /* return current sync_serial_settings */
 
--- linux-mvl-dove-2.6.32.orig/drivers/atm/solos-pci.c
+++ linux-mvl-dove-2.6.32/drivers/atm/solos-pci.c
@@ -688,7 +688,7 @@
 					      size);
 			}
 			if (atmdebug) {
-				dev_info(&card->dev->dev, "Received: device %d\n", port);
+				dev_info(&card->dev->dev, "Received: port %d\n", port);
 				dev_info(&card->dev->dev, "size: %d VPI: %d VCI: %d\n",
 					 size, le16_to_cpu(header->vpi),
 					 le16_to_cpu(header->vci));
@@ -774,7 +774,8 @@
 	sk_for_each(s, node, head) {
 		vcc = atm_sk(s);
 		if (vcc->dev == dev && vcc->vci == vci &&
-		    vcc->vpi == vpi && vcc->qos.rxtp.traffic_class != ATM_NONE)
+		    vcc->vpi == vpi && vcc->qos.rxtp.traffic_class != ATM_NONE &&
+		    test_bit(ATM_VF_READY, &vcc->flags))
 			goto out;
 	}
 	vcc = NULL;
@@ -900,6 +901,10 @@
 	clear_bit(ATM_VF_ADDR, &vcc->flags);
 	clear_bit(ATM_VF_READY, &vcc->flags);
 
+	/* Hold up vcc_destroy_socket() (our caller) until solos_bh() in the
+	   tasklet has finished processing any incoming packets (and, more to
+	   the point, using the vcc pointer). */
+	tasklet_unlock_wait(&card->tlet);
 	return;
 }
 
@@ -1003,8 +1008,15 @@
 
 			/* Clean up and free oldskb now it's gone */
 			if (atmdebug) {
+				struct pkt_hdr *header = (void *)oldskb->data;
+				int size = le16_to_cpu(header->size);
+
+				skb_pull(oldskb, sizeof(*header));
 				dev_info(&card->dev->dev, "Transmitted: port %d\n",
 					 port);
+				dev_info(&card->dev->dev, "size: %d VPI: %d VCI: %d\n",
+					 size, le16_to_cpu(header->vpi),
+					 le16_to_cpu(header->vci));
 				print_buffer(oldskb);
 			}
 
--- linux-mvl-dove-2.6.32.orig/drivers/cpufreq/cpufreq_stats.c
+++ linux-mvl-dove-2.6.32/drivers/cpufreq/cpufreq_stats.c
@@ -164,17 +164,27 @@
 	return -1;
 }
 
+/* should be called late in the CPU removal sequence so that the stats
+ * memory is still available in case someone tries to use it.
+ */
 static void cpufreq_stats_free_table(unsigned int cpu)
 {
 	struct cpufreq_stats *stat = per_cpu(cpufreq_stats_table, cpu);
-	struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);
-	if (policy && policy->cpu == cpu)
-		sysfs_remove_group(&policy->kobj, &stats_attr_group);
 	if (stat) {
 		kfree(stat->time_in_state);
 		kfree(stat);
 	}
 	per_cpu(cpufreq_stats_table, cpu) = NULL;
+}
+
+/* must be called early in the CPU removal sequence (before
+ * cpufreq_remove_dev) so that policy is still valid.
+ */
+static void cpufreq_stats_free_sysfs(unsigned int cpu)
+{
+	struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);
+	if (policy && policy->cpu == cpu)
+		sysfs_remove_group(&policy->kobj, &stats_attr_group);
 	if (policy)
 		cpufreq_cpu_put(policy);
 }
@@ -315,6 +325,9 @@
 	case CPU_ONLINE_FROZEN:
 		cpufreq_update_policy(cpu);
 		break;
+	case CPU_DOWN_PREPARE:
+		cpufreq_stats_free_sysfs(cpu);
+		break;
 	case CPU_DEAD:
 	case CPU_DEAD_FROZEN:
 		cpufreq_stats_free_table(cpu);
@@ -323,9 +336,11 @@
 	return NOTIFY_OK;
 }
 
+/* priority=1 so this will get called before cpufreq_remove_dev */
 static struct notifier_block cpufreq_stat_cpu_notifier __refdata =
 {
 	.notifier_call = cpufreq_stat_cpu_callback,
+	.priority = 1,
 };
 
 static struct notifier_block notifier_policy_block = {
@@ -372,6 +387,7 @@
 	unregister_hotcpu_notifier(&cpufreq_stat_cpu_notifier);
 	for_each_online_cpu(cpu) {
 		cpufreq_stats_free_table(cpu);
+		cpufreq_stats_free_sysfs(cpu);
 	}
 }
 
--- linux-mvl-dove-2.6.32.orig/drivers/cpufreq/cpufreq.c
+++ linux-mvl-dove-2.6.32/drivers/cpufreq/cpufreq.c
@@ -1183,12 +1183,28 @@
 
 	unlock_policy_rwsem_write(cpu);
 
+	cpufreq_debug_enable_ratelimit();
+
+#ifdef CONFIG_HOTPLUG_CPU
+	/* when the CPU which is the parent of the kobj is hotplugged
+	 * offline, check for siblings, and create cpufreq sysfs interface
+	 * and symlinks
+	 */
+	if (unlikely(cpumask_weight(data->cpus) > 1)) {
+		/* first sibling now owns the new sysfs dir */
+		cpumask_clear_cpu(cpu, data->cpus);
+		cpufreq_add_dev(get_cpu_sysdev(cpumask_first(data->cpus)));
+
+		/* finally remove our own symlink */
+		lock_policy_rwsem_write(cpu);
+		__cpufreq_remove_dev(sys_dev);
+	}
+#endif
+
 	free_cpumask_var(data->related_cpus);
 	free_cpumask_var(data->cpus);
 	kfree(data);
-	per_cpu(cpufreq_cpu_data, cpu) = NULL;
 
-	cpufreq_debug_enable_ratelimit();
 	return 0;
 }
 
@@ -1741,17 +1757,8 @@
 			dprintk("governor switch\n");
 
 			/* end old governor */
-			if (data->governor) {
-				/*
-				 * Need to release the rwsem around governor
-				 * stop due to lock dependency between
-				 * cancel_delayed_work_sync and the read lock
-				 * taken in the delayed work handler.
-				 */
-				unlock_policy_rwsem_write(data->cpu);
+			if (data->governor)
 				__cpufreq_governor(data, CPUFREQ_GOV_STOP);
-				lock_policy_rwsem_write(data->cpu);
-			}
 
 			/* start new governor */
 			data->governor = policy->governor;
--- linux-mvl-dove-2.6.32.orig/drivers/acpi/blacklist.c
+++ linux-mvl-dove-2.6.32/drivers/acpi/blacklist.c
@@ -185,6 +185,12 @@
 	acpi_osi_setup("!Windows 2006");
 	return 0;
 }
+static int __init dmi_disable_osi_win7(const struct dmi_system_id *d)
+{
+	printk(KERN_NOTICE PREFIX "DMI detected: %s\n", d->ident);
+	acpi_osi_setup("!Windows 2009");
+	return 0;
+}
 
 static struct dmi_system_id acpi_osi_dmi_table[] __initdata = {
 	{
@@ -211,6 +217,38 @@
 		     DMI_MATCH(DMI_PRODUCT_NAME, "Sony VGN-SR290J"),
 		},
 	},
+	{
+	.callback = dmi_disable_osi_vista,
+	.ident = "Toshiba Satellite L355",
+	.matches = {
+		     DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+		     DMI_MATCH(DMI_PRODUCT_VERSION, "Satellite L355"),
+		},
+	},
+	{
+	.callback = dmi_disable_osi_vista,
+	.ident = "Toshiba Satellite L355",
+	.matches = {
+		     DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+		     DMI_MATCH(DMI_PRODUCT_VERSION, "Satellite L355"),
+		},
+	},
+	{
+	.callback = dmi_disable_osi_win7,
+	.ident = "ASUS K50IJ",
+	.matches = {
+		     DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
+		     DMI_MATCH(DMI_PRODUCT_NAME, "K50IJ"),
+		},
+	},
+	{
+	.callback = dmi_disable_osi_vista,
+	.ident = "Toshiba P305D",
+	.matches = {
+		     DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+		     DMI_MATCH(DMI_PRODUCT_NAME, "Satellite P305D"),
+		},
+	},
 
 	/*
 	 * BIOS invocation of _OSI(Linux) is almost always a BIOS bug.
--- linux-mvl-dove-2.6.32.orig/drivers/acpi/osl.c
+++ linux-mvl-dove-2.6.32/drivers/acpi/osl.c
@@ -1151,16 +1151,10 @@
 
 	if (clash) {
 		if (acpi_enforce_resources != ENFORCE_RESOURCES_NO) {
-			printk("%sACPI: %s resource %s [0x%llx-0x%llx]"
-			       " conflicts with ACPI region %s"
-			       " [0x%llx-0x%llx]\n",
-			       acpi_enforce_resources == ENFORCE_RESOURCES_LAX
-			       ? KERN_WARNING : KERN_ERR,
-			       ioport ? "I/O" : "Memory", res->name,
-			       (long long) res->start, (long long) res->end,
-			       res_list_elem->name,
-			       (long long) res_list_elem->start,
-			       (long long) res_list_elem->end);
+			printk(KERN_INFO "ACPI: resource %s %pR"
+			       " conflicts with ACPI region %s %pR\n",
+			       res->name, res, res_list_elem->name,
+			       res_list_elem);
 			if (acpi_enforce_resources == ENFORCE_RESOURCES_LAX)
 				printk(KERN_NOTICE "ACPI: This conflict may"
 				       " cause random problems and system"
--- linux-mvl-dove-2.6.32.orig/drivers/acpi/video_detect.c
+++ linux-mvl-dove-2.6.32/drivers/acpi/video_detect.c
@@ -250,7 +250,7 @@
 				ACPI_VIDEO_BACKLIGHT_FORCE_VENDOR;
 		if (!strcmp("video", str))
 			acpi_video_support |=
-				ACPI_VIDEO_OUTPUT_SWITCHING_FORCE_VIDEO;
+				ACPI_VIDEO_BACKLIGHT_FORCE_VIDEO;
 	}
 	return 1;
 }
--- linux-mvl-dove-2.6.32.orig/drivers/acpi/processor_idle.c
+++ linux-mvl-dove-2.6.32/drivers/acpi/processor_idle.c
@@ -110,6 +110,14 @@
 	  DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
 	  DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
 	 (void *)2},
+	{ set_max_cstate, "Pavilion zv5000", {
+	  DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
+	  DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
+	 (void *)1},
+	{ set_max_cstate, "Asus L8400B", {
+	  DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
+	  DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
+	 (void *)1},
 	{},
 };
 
@@ -299,6 +307,17 @@
 	pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
 	pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
 
+	/*
+	 * FADT specified C2 latency must be less than or equal to
+	 * 100 microseconds.
+	 */
+	if (acpi_gbl_FADT.C2latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
+		ACPI_DEBUG_PRINT((ACPI_DB_INFO,
+			"C2 latency too large [%d]\n", acpi_gbl_FADT.C2latency));
+		/* invalidate C2 */
+		pr->power.states[ACPI_STATE_C2].address = 0;
+	}
+
 	ACPI_DEBUG_PRINT((ACPI_DB_INFO,
 			  "lvl2[0x%08x] lvl3[0x%08x]\n",
 			  pr->power.states[ACPI_STATE_C2].address,
@@ -495,16 +514,6 @@
 		return;
 
 	/*
-	 * C2 latency must be less than or equal to 100
-	 * microseconds.
-	 */
-	else if (cx->latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
-		ACPI_DEBUG_PRINT((ACPI_DB_INFO,
-				  "latency too large [%d]\n", cx->latency));
-		return;
-	}
-
-	/*
 	 * Otherwise we've met all of our C2 requirements.
 	 * Normalize the C2 latency to expidite policy
 	 */
@@ -879,12 +888,14 @@
 		return(acpi_idle_enter_c1(dev, state));
 
 	local_irq_disable();
-	current_thread_info()->status &= ~TS_POLLING;
-	/*
-	 * TS_POLLING-cleared state must be visible before we test
-	 * NEED_RESCHED:
-	 */
-	smp_mb();
+	if (cx->entry_method != ACPI_CSTATE_FFH) {
+		current_thread_info()->status &= ~TS_POLLING;
+		/*
+		 * TS_POLLING-cleared state must be visible before we test
+		 * NEED_RESCHED:
+		 */
+		smp_mb();
+	}
 
 	if (unlikely(need_resched())) {
 		current_thread_info()->status |= TS_POLLING;
@@ -951,7 +962,7 @@
 	if (acpi_idle_suspend)
 		return(acpi_idle_enter_c1(dev, state));
 
-	if (acpi_idle_bm_check()) {
+	if (!cx->bm_sts_skip && acpi_idle_bm_check()) {
 		if (dev->safe_state) {
 			dev->last_state = dev->safe_state;
 			return dev->safe_state->enter(dev, dev->safe_state);
@@ -964,12 +975,14 @@
 	}
 
 	local_irq_disable();
-	current_thread_info()->status &= ~TS_POLLING;
-	/*
-	 * TS_POLLING-cleared state must be visible before we test
-	 * NEED_RESCHED:
-	 */
-	smp_mb();
+	if (cx->entry_method != ACPI_CSTATE_FFH) {
+		current_thread_info()->status &= ~TS_POLLING;
+		/*
+		 * TS_POLLING-cleared state must be visible before we test
+		 * NEED_RESCHED:
+		 */
+		smp_mb();
+	}
 
 	if (unlikely(need_resched())) {
 		current_thread_info()->status |= TS_POLLING;
--- linux-mvl-dove-2.6.32.orig/drivers/acpi/button.c
+++ linux-mvl-dove-2.6.32/drivers/acpi/button.c
@@ -282,6 +282,13 @@
 	if (ret == NOTIFY_DONE)
 		ret = blocking_notifier_call_chain(&acpi_lid_notifier, state,
 						   device);
+	if (ret == NOTIFY_DONE || ret == NOTIFY_OK) {
+		/*
+		 * It is also regarded as success if the notifier_chain
+		 * returns NOTIFY_OK or NOTIFY_DONE.
+		 */
+		ret = 0;
+	}
 	return ret;
 }
 
--- linux-mvl-dove-2.6.32.orig/drivers/acpi/processor_core.c
+++ linux-mvl-dove-2.6.32/drivers/acpi/processor_core.c
@@ -134,12 +134,6 @@
 
 static struct dmi_system_id __cpuinitdata processor_idle_dmi_table[] = {
 	{
-	set_no_mwait, "IFL91 board", {
-	DMI_MATCH(DMI_BIOS_VENDOR, "COMPAL"),
-	DMI_MATCH(DMI_SYS_VENDOR, "ZEPTO"),
-	DMI_MATCH(DMI_PRODUCT_VERSION, "3215W"),
-	DMI_MATCH(DMI_BOARD_NAME, "IFL91") }, NULL},
-	{
 	set_no_mwait, "Extensa 5220", {
 	DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
 	DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
--- linux-mvl-dove-2.6.32.orig/drivers/acpi/power_meter.c
+++ linux-mvl-dove-2.6.32/drivers/acpi/power_meter.c
@@ -34,7 +34,7 @@
 #define ACPI_POWER_METER_NAME		"power_meter"
 ACPI_MODULE_NAME(ACPI_POWER_METER_NAME);
 #define ACPI_POWER_METER_DEVICE_NAME	"Power Meter"
-#define ACPI_POWER_METER_CLASS		"power_meter_resource"
+#define ACPI_POWER_METER_CLASS		"pwr_meter_resource"
 
 #define NUM_SENSORS			17
 
--- linux-mvl-dove-2.6.32.orig/drivers/acpi/tables.c
+++ linux-mvl-dove-2.6.32/drivers/acpi/tables.c
@@ -213,7 +213,7 @@
 	unsigned long table_end;
 	acpi_size tbl_size;
 
-	if (acpi_disabled)
+	if (acpi_disabled && !acpi_ht)
 		return -ENODEV;
 
 	if (!handler)
@@ -280,7 +280,7 @@
 	struct acpi_table_header *table = NULL;
 	acpi_size tbl_size;
 
-	if (acpi_disabled)
+	if (acpi_disabled && !acpi_ht)
 		return -ENODEV;
 
 	if (!handler)
--- linux-mvl-dove-2.6.32.orig/drivers/acpi/processor_perflib.c
+++ linux-mvl-dove-2.6.32/drivers/acpi/processor_perflib.c
@@ -356,7 +356,11 @@
 	if (result)
 		goto update_bios;
 
-	return 0;
+	/* We need to call _PPC once when cpufreq starts */
+	if (ignore_ppc != 1)
+		result = acpi_processor_get_platform_limit(pr);
+
+	return result;
 
 	/*
 	 * Having _PPC but missing frequencies (_PSS, _PCT) is a very good hint that
--- linux-mvl-dove-2.6.32.orig/drivers/acpi/battery.c
+++ linux-mvl-dove-2.6.32/drivers/acpi/battery.c
@@ -837,6 +837,18 @@
 #endif
 }
 
+static LIST_HEAD(acpi_battery_domain);
+
+static void acpi_battery_update_async(struct acpi_device *device, async_cookie_t cookie)
+{
+	struct acpi_battery *battery = acpi_driver_data(device);
+
+	acpi_battery_update(battery);
+	printk(KERN_INFO PREFIX "%s Slot [%s] (battery %s)\n",
+		ACPI_BATTERY_DEVICE_NAME, acpi_device_bid(device),
+		device->status.battery_present ? "present" : "absent");
+}
+
 static int acpi_battery_add(struct acpi_device *device)
 {
 	int result = 0;
@@ -851,14 +863,14 @@
 	strcpy(acpi_device_class(device), ACPI_BATTERY_CLASS);
 	device->driver_data = battery;
 	mutex_init(&battery->lock);
-	acpi_battery_update(battery);
+	/* Mark the battery for update at first access. */
+	battery->update_time = 0;
 #ifdef CONFIG_ACPI_PROCFS_POWER
 	result = acpi_battery_add_fs(device);
 #endif
 	if (!result) {
-		printk(KERN_INFO PREFIX "%s Slot [%s] (battery %s)\n",
-			ACPI_BATTERY_DEVICE_NAME, acpi_device_bid(device),
-			device->status.battery_present ? "present" : "absent");
+		async_schedule_domain(acpi_battery_update_async, device, &acpi_battery_domain);
+
 	} else {
 #ifdef CONFIG_ACPI_PROCFS_POWER
 		acpi_battery_remove_fs(device);
@@ -874,6 +886,10 @@
 
 	if (!device || !acpi_driver_data(device))
 		return -EINVAL;
+
+	/* Ensure all async updates are complete before freeing the battery. */
+	async_synchronize_full_domain(&acpi_battery_domain);
+
 	battery = acpi_driver_data(device);
 #ifdef CONFIG_ACPI_PROCFS_POWER
 	acpi_battery_remove_fs(device);
@@ -911,27 +927,21 @@
 		},
 };
 
-static void __init acpi_battery_init_async(void *unused, async_cookie_t cookie)
+static int __init acpi_battery_init(void)
 {
 	if (acpi_disabled)
 		return;
 #ifdef CONFIG_ACPI_PROCFS_POWER
 	acpi_battery_dir = acpi_lock_battery_dir();
 	if (!acpi_battery_dir)
-		return;
+		return -1;
 #endif
 	if (acpi_bus_register_driver(&acpi_battery_driver) < 0) {
 #ifdef CONFIG_ACPI_PROCFS_POWER
 		acpi_unlock_battery_dir(acpi_battery_dir);
 #endif
-		return;
+		return -1;
 	}
-	return;
-}
-
-static int __init acpi_battery_init(void)
-{
-	async_schedule(acpi_battery_init_async, NULL);
 	return 0;
 }
 
--- linux-mvl-dove-2.6.32.orig/drivers/acpi/sleep.c
+++ linux-mvl-dove-2.6.32/drivers/acpi/sleep.c
@@ -80,6 +80,7 @@
 
 #ifdef CONFIG_ACPI_SLEEP
 static u32 acpi_target_sleep_state = ACPI_STATE_S0;
+
 /*
  * ACPI 1.0 wants us to execute _PTS before suspending devices, so we allow the
  * user to request that behavior by using the 'acpi_old_suspend_ordering'
@@ -170,18 +171,6 @@
 #endif /* CONFIG_ACPI_SLEEP */
 
 #ifdef CONFIG_SUSPEND
-/*
- * According to the ACPI specification the BIOS should make sure that ACPI is
- * enabled and SCI_EN bit is set on wake-up from S1 - S3 sleep states.  Still,
- * some BIOSes don't do that and therefore we use acpi_enable() to enable ACPI
- * on such systems during resume.  Unfortunately that doesn't help in
- * particularly pathological cases in which SCI_EN has to be set directly on
- * resume, although the specification states very clearly that this flag is
- * owned by the hardware.  The set_sci_en_on_resume variable will be set in such
- * cases.
- */
-static bool set_sci_en_on_resume;
-
 extern void do_suspend_lowlevel(void);
 
 static u32 acpi_suspend_states[] = {
@@ -248,11 +237,8 @@
 		break;
 	}
 
-	/* If ACPI is not enabled by the BIOS, we need to enable it here. */
-	if (set_sci_en_on_resume)
-		acpi_write_bit_register(ACPI_BITREG_SCI_ENABLE, 1);
-	else
-		acpi_enable();
+	/* This violates the spec but is required for bug compatibility. */
+	acpi_write_bit_register(ACPI_BITREG_SCI_ENABLE, 1);
 
 	/* Reprogram control registers and execute _BFS */
 	acpi_leave_sleep_state_prep(acpi_state);
@@ -341,12 +327,6 @@
 	return 0;
 }
 
-static int __init init_set_sci_en_on_resume(const struct dmi_system_id *d)
-{
-	set_sci_en_on_resume = true;
-	return 0;
-}
-
 static struct dmi_system_id __initdata acpisleep_dmi_table[] = {
 	{
 	.callback = init_old_suspend_ordering,
@@ -365,22 +345,6 @@
 		},
 	},
 	{
-	.callback = init_set_sci_en_on_resume,
-	.ident = "Apple MacBook 1,1",
-	.matches = {
-		DMI_MATCH(DMI_SYS_VENDOR, "Apple Computer, Inc."),
-		DMI_MATCH(DMI_PRODUCT_NAME, "MacBook1,1"),
-		},
-	},
-	{
-	.callback = init_set_sci_en_on_resume,
-	.ident = "Apple MacMini 1,1",
-	.matches = {
-		DMI_MATCH(DMI_SYS_VENDOR, "Apple Computer, Inc."),
-		DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
-		},
-	},
-	{
 	.callback = init_old_suspend_ordering,
 	.ident = "Asus Pundit P1-AH2 (M2N8L motherboard)",
 	.matches = {
@@ -389,62 +353,6 @@
 		},
 	},
 	{
-	.callback = init_set_sci_en_on_resume,
-	.ident = "Toshiba Satellite L300",
-	.matches = {
-		DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
-		DMI_MATCH(DMI_PRODUCT_NAME, "Satellite L300"),
-		},
-	},
-	{
-	.callback = init_set_sci_en_on_resume,
-	.ident = "Hewlett-Packard HP G7000 Notebook PC",
-	.matches = {
-		DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
-		DMI_MATCH(DMI_PRODUCT_NAME, "HP G7000 Notebook PC"),
-		},
-	},
-	{
-	.callback = init_set_sci_en_on_resume,
-	.ident = "Hewlett-Packard HP Pavilion dv3 Notebook PC",
-	.matches = {
-		DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
-		DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion dv3 Notebook PC"),
-		},
-	},
-	{
-	.callback = init_set_sci_en_on_resume,
-	.ident = "Hewlett-Packard Pavilion dv4",
-	.matches = {
-		DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
-		DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion dv4"),
-		},
-	},
-	{
-	.callback = init_set_sci_en_on_resume,
-	.ident = "Hewlett-Packard Pavilion dv7",
-	.matches = {
-		DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
-		DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion dv7"),
-		},
-	},
-	{
-	.callback = init_set_sci_en_on_resume,
-	.ident = "Hewlett-Packard Compaq Presario C700 Notebook PC",
-	.matches = {
-		DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
-		DMI_MATCH(DMI_PRODUCT_NAME, "Compaq Presario C700 Notebook PC"),
-		},
-	},
-	{
-	.callback = init_set_sci_en_on_resume,
-	.ident = "Hewlett-Packard Compaq Presario CQ40 Notebook PC",
-	.matches = {
-		DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
-		DMI_MATCH(DMI_PRODUCT_NAME, "Compaq Presario CQ40 Notebook PC"),
-		},
-	},
-	{
 	.callback = init_old_suspend_ordering,
 	.ident = "Panasonic CF51-2L",
 	.matches = {
--- linux-mvl-dove-2.6.32.orig/drivers/acpi/ec.c
+++ linux-mvl-dove-2.6.32/drivers/acpi/ec.c
@@ -201,14 +201,13 @@
 	spin_unlock_irqrestore(&ec->curr_lock, flags);
 }
 
-static void acpi_ec_gpe_query(void *ec_cxt);
+static int acpi_ec_sync_query(struct acpi_ec *ec);
 
-static int ec_check_sci(struct acpi_ec *ec, u8 state)
+static int ec_check_sci_sync(struct acpi_ec *ec, u8 state)
 {
 	if (state & ACPI_EC_FLAG_SCI) {
 		if (!test_and_set_bit(EC_FLAGS_QUERY_PENDING, &ec->flags))
-			return acpi_os_execute(OSL_EC_BURST_HANDLER,
-				acpi_ec_gpe_query, ec);
+			return acpi_ec_sync_query(ec);
 	}
 	return 0;
 }
@@ -249,11 +248,6 @@
 {
 	unsigned long tmp;
 	int ret = 0;
-	pr_debug(PREFIX "transaction start\n");
-	/* disable GPE during transaction if storm is detected */
-	if (test_bit(EC_FLAGS_GPE_STORM, &ec->flags)) {
-		acpi_disable_gpe(NULL, ec->gpe);
-	}
 	if (EC_FLAGS_MSI)
 		udelay(ACPI_EC_MSI_UDELAY);
 	/* start transaction */
@@ -265,20 +259,9 @@
 		clear_bit(EC_FLAGS_QUERY_PENDING, &ec->flags);
 	spin_unlock_irqrestore(&ec->curr_lock, tmp);
 	ret = ec_poll(ec);
-	pr_debug(PREFIX "transaction end\n");
 	spin_lock_irqsave(&ec->curr_lock, tmp);
 	ec->curr = NULL;
 	spin_unlock_irqrestore(&ec->curr_lock, tmp);
-	if (test_bit(EC_FLAGS_GPE_STORM, &ec->flags)) {
-		/* check if we received SCI during transaction */
-		ec_check_sci(ec, acpi_ec_read_status(ec));
-		/* it is safe to enable GPE outside of transaction */
-		acpi_enable_gpe(NULL, ec->gpe);
-	} else if (t->irq_count > ACPI_EC_STORM_THRESHOLD) {
-		pr_info(PREFIX "GPE storm detected, "
-			"transactions will use polling mode\n");
-		set_bit(EC_FLAGS_GPE_STORM, &ec->flags);
-	}
 	return ret;
 }
 
@@ -321,7 +304,26 @@
 		status = -ETIME;
 		goto end;
 	}
+	pr_debug(PREFIX "transaction start\n");
+	/* disable GPE during transaction if storm is detected */
+	if (test_bit(EC_FLAGS_GPE_STORM, &ec->flags)) {
+		acpi_disable_gpe(NULL, ec->gpe);
+	}
+
 	status = acpi_ec_transaction_unlocked(ec, t);
+
+	/* check if we received SCI during transaction */
+	ec_check_sci_sync(ec, acpi_ec_read_status(ec));
+	if (test_bit(EC_FLAGS_GPE_STORM, &ec->flags)) {
+		msleep(1);
+		/* it is safe to enable GPE outside of transaction */
+		acpi_enable_gpe(NULL, ec->gpe);
+	} else if (t->irq_count > ACPI_EC_STORM_THRESHOLD) {
+		pr_info(PREFIX "GPE storm detected, "
+			"transactions will use polling mode\n");
+		set_bit(EC_FLAGS_GPE_STORM, &ec->flags);
+	}
+	pr_debug(PREFIX "transaction end\n");
 end:
 	if (ec->global_lock)
 		acpi_release_global_lock(glk);
@@ -443,7 +445,7 @@
 
 EXPORT_SYMBOL(ec_transaction);
 
-static int acpi_ec_query(struct acpi_ec *ec, u8 * data)
+static int acpi_ec_query_unlocked(struct acpi_ec *ec, u8 * data)
 {
 	int result;
 	u8 d;
@@ -452,20 +454,16 @@
 				.wlen = 0, .rlen = 1};
 	if (!ec || !data)
 		return -EINVAL;
-
 	/*
 	 * Query the EC to find out which _Qxx method we need to evaluate.
 	 * Note that successful completion of the query causes the ACPI_EC_SCI
 	 * bit to be cleared (and thus clearing the interrupt source).
 	 */
-
-	result = acpi_ec_transaction(ec, &t);
+	result = acpi_ec_transaction_unlocked(ec, &t);
 	if (result)
 		return result;
-
 	if (!d)
 		return -ENODATA;
-
 	*data = d;
 	return 0;
 }
@@ -509,43 +507,78 @@
 
 EXPORT_SYMBOL_GPL(acpi_ec_remove_query_handler);
 
-static void acpi_ec_gpe_query(void *ec_cxt)
+static void acpi_ec_run(void *cxt)
 {
-	struct acpi_ec *ec = ec_cxt;
-	u8 value = 0;
-	struct acpi_ec_query_handler *handler, copy;
-
-	if (!ec || acpi_ec_query(ec, &value))
+	struct acpi_ec_query_handler *handler = cxt;
+	if (!handler)
 		return;
-	mutex_lock(&ec->lock);
+	pr_debug(PREFIX "start query execution\n");
+	if (handler->func)
+		handler->func(handler->data);
+	else if (handler->handle)
+		acpi_evaluate_object(handler->handle, NULL, NULL, NULL);
+	pr_debug(PREFIX "stop query execution\n");
+	kfree(handler);
+}
+
+static int acpi_ec_sync_query(struct acpi_ec *ec)
+{
+	u8 value = 0;
+	int status;
+	struct acpi_ec_query_handler *handler, *copy;
+	if ((status = acpi_ec_query_unlocked(ec, &value)))
+		return status;
 	list_for_each_entry(handler, &ec->list, node) {
 		if (value == handler->query_bit) {
 			/* have custom handler for this bit */
-			memcpy(&copy, handler, sizeof(copy));
-			mutex_unlock(&ec->lock);
-			if (copy.func) {
-				copy.func(copy.data);
-			} else if (copy.handle) {
-				acpi_evaluate_object(copy.handle, NULL, NULL, NULL);
-			}
-			return;
+			copy = kmalloc(sizeof(*handler), GFP_KERNEL);
+			if (!copy)
+				return -ENOMEM;
+			memcpy(copy, handler, sizeof(*copy));
+			pr_debug(PREFIX "push query execution (0x%2x) on queue\n", value);
+			return acpi_os_execute(OSL_GPE_HANDLER,
+				acpi_ec_run, copy);
 		}
 	}
+	return 0;
+}
+
+static void acpi_ec_gpe_query(void *ec_cxt)
+{
+	struct acpi_ec *ec = ec_cxt;
+	if (!ec)
+		return;
+	mutex_lock(&ec->lock);
+	acpi_ec_sync_query(ec);
 	mutex_unlock(&ec->lock);
 }
 
+static void acpi_ec_gpe_query(void *ec_cxt);
+
+static int ec_check_sci(struct acpi_ec *ec, u8 state)
+{
+	if (state & ACPI_EC_FLAG_SCI) {
+		if (!test_and_set_bit(EC_FLAGS_QUERY_PENDING, &ec->flags)) {
+			pr_debug(PREFIX "push gpe query to the queue\n");
+			return acpi_os_execute(OSL_NOTIFY_HANDLER,
+				acpi_ec_gpe_query, ec);
+		}
+	}
+	return 0;
+}
+
 static u32 acpi_ec_gpe_handler(void *data)
 {
 	struct acpi_ec *ec = data;
-	u8 status;
 
 	pr_debug(PREFIX "~~~> interrupt\n");
-	status = acpi_ec_read_status(ec);
 
-	advance_transaction(ec, status);
-	if (ec_transaction_done(ec) && (status & ACPI_EC_FLAG_IBF) == 0)
+	advance_transaction(ec, acpi_ec_read_status(ec));
+	if (ec_transaction_done(ec) &&
+	    (acpi_ec_read_status(ec) & ACPI_EC_FLAG_IBF) == 0) {
 		wake_up(&ec->wait);
-	ec_check_sci(ec, status);
+		ec_check_sci(ec, acpi_ec_read_status(ec));
+	}
 	return ACPI_INTERRUPT_HANDLED;
 }
 
@@ -568,10 +601,7 @@
 	if (function != ACPI_READ && function != ACPI_WRITE)
 		return AE_BAD_PARAMETER;
 
-	if (bits != 8 && acpi_strict)
-		return AE_BAD_PARAMETER;
-
-	if (EC_FLAGS_MSI)
+	if (EC_FLAGS_MSI || bits > 8)
 		acpi_ec_burst_enable(ec);
 
 	if (function == ACPI_READ) {
@@ -593,7 +623,7 @@
 		}
 	}
 
-	if (EC_FLAGS_MSI)
+	if (EC_FLAGS_MSI || bits > 8)
 		acpi_ec_burst_disable(ec);
 
 	switch (result) {
@@ -916,6 +946,7 @@
 /* MSI EC needs special treatment, enable it */
 static int ec_flag_msi(const struct dmi_system_id *id)
 {
+	printk(KERN_DEBUG PREFIX "Detected MSI hardware, enabling workarounds.\n");
 	EC_FLAGS_MSI = 1;
 	EC_FLAGS_VALIDATE_ECDT = 1;
 	return 0;
@@ -928,8 +959,16 @@
 	DMI_MATCH(DMI_BOARD_NAME, "JFL92") }, NULL},
 	{
 	ec_flag_msi, "MSI hardware", {
-	DMI_MATCH(DMI_BIOS_VENDOR, "Micro-Star"),
-	DMI_MATCH(DMI_CHASSIS_VENDOR, "MICRO-Star") }, NULL},
+	DMI_MATCH(DMI_BIOS_VENDOR, "Micro-Star")}, NULL},
+	{
+	ec_flag_msi, "MSI hardware", {
+	DMI_MATCH(DMI_SYS_VENDOR, "Micro-Star")}, NULL},
+	{
+	ec_flag_msi, "MSI hardware", {
+	DMI_MATCH(DMI_CHASSIS_VENDOR, "MICRO-Star")}, NULL},
+	{
+	ec_flag_msi, "MSI hardware", {
+	DMI_MATCH(DMI_CHASSIS_VENDOR, "MICRO-STAR")}, NULL},
 	{
 	ec_validate_ecdt, "ASUS hardware", {
 	DMI_MATCH(DMI_BIOS_VENDOR, "ASUS") }, NULL},
--- linux-mvl-dove-2.6.32.orig/drivers/acpi/scan.c
+++ linux-mvl-dove-2.6.32/drivers/acpi/scan.c
@@ -1026,12 +1026,6 @@
 		if (ACPI_IS_ROOT_DEVICE(device)) {
 			acpi_add_id(device, ACPI_SYSTEM_HID);
 			break;
-		} else if (ACPI_IS_ROOT_DEVICE(device->parent)) {
-			/* \_SB_, the only root-level namespace device */
-			acpi_add_id(device, ACPI_BUS_HID);
-			strcpy(device->pnp.device_name, ACPI_BUS_DEVICE_NAME);
-			strcpy(device->pnp.device_class, ACPI_BUS_CLASS);
-			break;
 		}
 
 		status = acpi_get_object_info(device->handle, &info);
@@ -1064,6 +1058,12 @@
 			acpi_add_id(device, ACPI_BAY_HID);
 		else if (ACPI_SUCCESS(acpi_dock_match(device)))
 			acpi_add_id(device, ACPI_DOCK_HID);
+		else if (!acpi_device_hid(device) &&
+			 ACPI_IS_ROOT_DEVICE(device->parent)) {
+			acpi_add_id(device, ACPI_BUS_HID); /* \_SB, LNXSYBUS */
+			strcpy(device->pnp.device_name, ACPI_BUS_DEVICE_NAME);
+			strcpy(device->pnp.device_class, ACPI_BUS_CLASS);
+		}
 
 		break;
 	case ACPI_BUS_TYPE_POWER:
@@ -1357,6 +1357,9 @@
 {
 	struct acpi_bus_ops ops;
 
+	if (!device)
+		return -EINVAL;
+
 	memset(&ops, 0, sizeof(ops));
 	ops.acpi_op_start = 1;
 
--- linux-mvl-dove-2.6.32.orig/drivers/acpi/video.c
+++ linux-mvl-dove-2.6.32/drivers/acpi/video.c
@@ -2088,7 +2088,7 @@
 
 static int acpi_video_bus_start_devices(struct acpi_video_bus *video)
 {
-	return acpi_video_bus_DOS(video, 0, 0);
+	return acpi_video_bus_DOS(video, 0, 1);
 }
 
 static int acpi_video_bus_stop_devices(struct acpi_video_bus *video)
--- linux-mvl-dove-2.6.32.orig/drivers/acpi/bus.c
+++ linux-mvl-dove-2.6.32/drivers/acpi/bus.c
@@ -344,6 +344,167 @@
 
 EXPORT_SYMBOL(acpi_bus_can_wakeup);
 
+static void acpi_print_osc_error(acpi_handle handle,
+	struct acpi_osc_context *context, char *error)
+{
+	struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER};
+	int i;
+
+	if (ACPI_FAILURE(acpi_get_name(handle, ACPI_FULL_PATHNAME, &buffer)))
+		printk(KERN_DEBUG "%s\n", error);
+	else {
+		printk(KERN_DEBUG "%s:%s\n", (char *)buffer.pointer, error);
+		kfree(buffer.pointer);
+	}
+	printk(KERN_DEBUG"_OSC request data:");
+	for (i = 0; i < context->cap.length; i += sizeof(u32))
+		printk("%x ", *((u32 *)(context->cap.pointer + i)));
+	printk("\n");
+}
+
+static u8 hex_val(unsigned char c)
+{
+	return isdigit(c) ? c - '0' : toupper(c) - 'A' + 10;
+}
+
+static acpi_status acpi_str_to_uuid(char *str, u8 *uuid)
+{
+	int i;
+	static int opc_map_to_uuid[16] = {6, 4, 2, 0, 11, 9, 16, 14, 19, 21,
+		24, 26, 28, 30, 32, 34};
+
+	if (strlen(str) != 36)
+		return AE_BAD_PARAMETER;
+	for (i = 0; i < 36; i++) {
+		if (i == 8 || i == 13 || i == 18 || i == 23) {
+			if (str[i] != '-')
+				return AE_BAD_PARAMETER;
+		} else if (!isxdigit(str[i]))
+			return AE_BAD_PARAMETER;
+	}
+	for (i = 0; i < 16; i++) {
+		uuid[i] = hex_val(str[opc_map_to_uuid[i]]) << 4;
+		uuid[i] |= hex_val(str[opc_map_to_uuid[i] + 1]);
+	}
+	return AE_OK;
+}
+
+acpi_status acpi_run_osc(acpi_handle handle, struct acpi_osc_context *context)
+{
+	acpi_status status;
+	struct acpi_object_list input;
+	union acpi_object in_params[4];
+	union acpi_object *out_obj;
+	u8 uuid[16];
+	u32 errors;
+	struct acpi_buffer output = {ACPI_ALLOCATE_BUFFER, NULL};
+
+	if (!context)
+		return AE_ERROR;
+	if (ACPI_FAILURE(acpi_str_to_uuid(context->uuid_str, uuid)))
+		return AE_ERROR;
+	context->ret.length = ACPI_ALLOCATE_BUFFER;
+	context->ret.pointer = NULL;
+
+	/* Setting up input parameters */
+	input.count = 4;
+	input.pointer = in_params;
+	in_params[0].type 		= ACPI_TYPE_BUFFER;
+	in_params[0].buffer.length 	= 16;
+	in_params[0].buffer.pointer	= uuid;
+	in_params[1].type 		= ACPI_TYPE_INTEGER;
+	in_params[1].integer.value 	= context->rev;
+	in_params[2].type 		= ACPI_TYPE_INTEGER;
+	in_params[2].integer.value	= context->cap.length/sizeof(u32);
+	in_params[3].type		= ACPI_TYPE_BUFFER;
+	in_params[3].buffer.length 	= context->cap.length;
+	in_params[3].buffer.pointer 	= context->cap.pointer;
+
+	status = acpi_evaluate_object(handle, "_OSC", &input, &output);
+	if (ACPI_FAILURE(status))
+		return status;
+
+	if (!output.length)
+		return AE_NULL_OBJECT;
+
+	out_obj = output.pointer;
+	if (out_obj->type != ACPI_TYPE_BUFFER
+		|| out_obj->buffer.length != context->cap.length) {
+		acpi_print_osc_error(handle, context,
+			"_OSC evaluation returned wrong type");
+		status = AE_TYPE;
+		goto out_kfree;
+	}
+	/* Need to ignore the bit0 in result code */
+	errors = *((u32 *)out_obj->buffer.pointer) & ~(1 << 0);
+	if (errors) {
+		if (errors & OSC_REQUEST_ERROR)
+			acpi_print_osc_error(handle, context,
+				"_OSC request failed");
+		if (errors & OSC_INVALID_UUID_ERROR)
+			acpi_print_osc_error(handle, context,
+				"_OSC invalid UUID");
+		if (errors & OSC_INVALID_REVISION_ERROR)
+			acpi_print_osc_error(handle, context,
+				"_OSC invalid revision");
+		if (errors & OSC_CAPABILITIES_MASK_ERROR) {
+			if (((u32 *)context->cap.pointer)[OSC_QUERY_TYPE]
+			    & OSC_QUERY_ENABLE)
+				goto out_success;
+			status = AE_SUPPORT;
+			goto out_kfree;
+		}
+		status = AE_ERROR;
+		goto out_kfree;
+	}
+out_success:
+	context->ret.length = out_obj->buffer.length;
+	context->ret.pointer = kmalloc(context->ret.length, GFP_KERNEL);
+	if (!context->ret.pointer) {
+		status =  AE_NO_MEMORY;
+		goto out_kfree;
+	}
+	memcpy(context->ret.pointer, out_obj->buffer.pointer,
+		context->ret.length);
+	status =  AE_OK;
+
+out_kfree:
+	kfree(output.pointer);
+	if (status != AE_OK)
+		context->ret.pointer = NULL;
+	return status;
+}
+EXPORT_SYMBOL(acpi_run_osc);
+
+static u8 sb_uuid_str[] = "0811B06E-4A27-44F9-8D60-3CBBC22E7B48";
+static void acpi_bus_osc_support(void)
+{
+	u32 capbuf[2];
+	struct acpi_osc_context context = {
+		.uuid_str = sb_uuid_str,
+		.rev = 1,
+		.cap.length = 8,
+		.cap.pointer = capbuf,
+	};
+	acpi_handle handle;
+
+	capbuf[OSC_QUERY_TYPE] = OSC_QUERY_ENABLE;
+	capbuf[OSC_SUPPORT_TYPE] = OSC_SB_PR3_SUPPORT; /* _PR3 is in use */
+#if defined(CONFIG_ACPI_PROCESSOR_AGGREGATOR) ||\
+			defined(CONFIG_ACPI_PROCESSOR_AGGREGATOR_MODULE)
+	capbuf[OSC_SUPPORT_TYPE] |= OSC_SB_PAD_SUPPORT;
+#endif
+
+#if defined(CONFIG_ACPI_PROCESSOR) || defined(CONFIG_ACPI_PROCESSOR_MODULE)
+	capbuf[OSC_SUPPORT_TYPE] |= OSC_SB_PPC_OST_SUPPORT;
+#endif
+	if (ACPI_FAILURE(acpi_get_handle(NULL, "\\_SB", &handle)))
+		return;
+	if (ACPI_SUCCESS(acpi_run_osc(handle, &context)))
+		kfree(context.ret.pointer);
+	/* do we need to check the returned cap? Sounds no */
+}
+
 /* --------------------------------------------------------------------------
                                 Event Management
    -------------------------------------------------------------------------- */
@@ -734,6 +895,8 @@
 	status = acpi_ec_ecdt_probe();
 	/* Ignore result. Not having an ECDT is not fatal. */
 
+	acpi_bus_osc_support();
+
 	status = acpi_initialize_objects(ACPI_FULL_INITIALIZATION);
 	if (ACPI_FAILURE(status)) {
 		printk(KERN_ERR PREFIX "Unable to initialize ACPI objects\n");
--- linux-mvl-dove-2.6.32.orig/drivers/acpi/acpica/aclocal.h
+++ linux-mvl-dove-2.6.32/drivers/acpi/acpica/aclocal.h
@@ -846,6 +846,7 @@
 	ACPI_BITMASK_POWER_BUTTON_STATUS   | \
 	ACPI_BITMASK_SLEEP_BUTTON_STATUS   | \
 	ACPI_BITMASK_RT_CLOCK_STATUS       | \
+	ACPI_BITMASK_PCIEXP_WAKE_DISABLE   | \
 	ACPI_BITMASK_WAKE_STATUS)
 
 #define ACPI_BITMASK_TIMER_ENABLE               0x0001
--- linux-mvl-dove-2.6.32.orig/drivers/acpi/acpica/exprep.c
+++ linux-mvl-dove-2.6.32/drivers/acpi/acpica/exprep.c
@@ -468,6 +468,23 @@
 
 		acpi_ut_add_reference(obj_desc->field.region_obj);
 
+		/* allow full data read from EC address space */
+		if (obj_desc->field.region_obj->region.space_id ==
+			ACPI_ADR_SPACE_EC) {
+			if (obj_desc->common_field.bit_length > 8) {
+				int access_bit_width = ACPI_ROUND_UP(
+					obj_desc->common_field.bit_length, 8);
+				if (access_bit_width > sizeof(acpi_integer) * 8)
+					access_bit_width =
+						sizeof(acpi_integer) * 8;
+				obj_desc->common_field.access_bit_width =
+					 access_bit_width;
+				obj_desc->common_field.access_byte_width =
+					ACPI_DIV_8(access_bit_width);
+			}
+
+		}
+
 		ACPI_DEBUG_PRINT((ACPI_DB_BFIELD,
 				  "RegionField: BitOff %X, Off %X, Gran %X, Region %p\n",
 				  obj_desc->field.start_field_bit_offset,
--- linux-mvl-dove-2.6.32.orig/drivers/acpi/acpica/dswexec.c
+++ linux-mvl-dove-2.6.32/drivers/acpi/acpica/dswexec.c
@@ -300,10 +300,25 @@
 			 * we must enter this object into the namespace.  The created
 			 * object is temporary and will be deleted upon completion of
 			 * the execution of this method.
+			 *
+			 * Note 10/2010: Except for the Scope() op. This opcode does
+			 * not actually create a new object, it refers to an existing
+			 * object. However, for Scope(), we want to indeed open a
+			 * new scope.
 			 */
-			status = acpi_ds_load2_begin_op(walk_state, NULL);
+			if (op->common.aml_opcode != AML_SCOPE_OP) {
+				status =
+				    acpi_ds_load2_begin_op(walk_state, NULL);
+			} else {
+				status =
+				    acpi_ds_scope_stack_push(op->named.node,
+							     op->named.node->
+							     type, walk_state);
+				if (ACPI_FAILURE(status)) {
+					return_ACPI_STATUS(status);
+				}
+			}
 		}
-
 		break;
 
 	case AML_CLASS_EXECUTE:
--- linux-mvl-dove-2.6.32.orig/drivers/switch/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/switch/Kconfig
@@ -0,0 +1,15 @@
+menuconfig SWITCH
+	tristate "Switch class support"
+	help
+	  Say Y here to enable switch class support. This allows
+	  monitoring switches by userspace via sysfs and uevent.
+
+if SWITCH
+
+config SWITCH_GPIO
+	tristate "GPIO Swith support"
+	depends on GENERIC_GPIO
+	help
+	  Say Y here to enable GPIO based switch support.
+
+endif # SWITCH
--- linux-mvl-dove-2.6.32.orig/drivers/switch/switch_gpio.c
+++ linux-mvl-dove-2.6.32/drivers/switch/switch_gpio.c
@@ -0,0 +1,171 @@
+/*
+ *  drivers/switch/switch_gpio.c
+ *
+ * Copyright (C) 2008 Google, Inc.
+ * Author: Mike Lockwood <lockwood@android.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+*/
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/switch.h>
+#include <linux/workqueue.h>
+#include <linux/gpio.h>
+
+struct gpio_switch_data {
+	struct switch_dev sdev;
+	unsigned gpio;
+	const char *name_on;
+	const char *name_off;
+	const char *state_on;
+	const char *state_off;
+	int irq;
+	struct work_struct work;
+};
+
+static void gpio_switch_work(struct work_struct *work)
+{
+	int state;
+	struct gpio_switch_data	*data =
+		container_of(work, struct gpio_switch_data, work);
+
+	state = gpio_get_value(data->gpio);
+	switch_set_state(&data->sdev, state);
+}
+
+static irqreturn_t gpio_irq_handler(int irq, void *dev_id)
+{
+	struct gpio_switch_data *switch_data =
+	    (struct gpio_switch_data *)dev_id;
+
+	schedule_work(&switch_data->work);
+	return IRQ_HANDLED;
+}
+
+static ssize_t switch_gpio_print_state(struct switch_dev *sdev, char *buf)
+{
+	struct gpio_switch_data	*switch_data =
+		container_of(sdev, struct gpio_switch_data, sdev);
+	const char *state;
+	if (switch_get_state(sdev))
+		state = switch_data->state_on;
+	else
+		state = switch_data->state_off;
+
+	if (state)
+		return sprintf(buf, "%s\n", state);
+	return -1;
+}
+
+static int gpio_switch_probe(struct platform_device *pdev)
+{
+	struct gpio_switch_platform_data *pdata = pdev->dev.platform_data;
+	struct gpio_switch_data *switch_data;
+	int ret = 0;
+
+	if (!pdata)
+		return -EBUSY;
+
+	switch_data = kzalloc(sizeof(struct gpio_switch_data), GFP_KERNEL);
+	if (!switch_data)
+		return -ENOMEM;
+
+	switch_data->sdev.name = pdata->name;
+	switch_data->gpio = pdata->gpio;
+	switch_data->name_on = pdata->name_on;
+	switch_data->name_off = pdata->name_off;
+	switch_data->state_on = pdata->state_on;
+	switch_data->state_off = pdata->state_off;
+	switch_data->sdev.print_state = switch_gpio_print_state;
+
+    ret = switch_dev_register(&switch_data->sdev);
+	if (ret < 0)
+		goto err_switch_dev_register;
+
+	ret = gpio_request(switch_data->gpio, pdev->name);
+	if (ret < 0)
+		goto err_request_gpio;
+
+	ret = gpio_direction_input(switch_data->gpio);
+	if (ret < 0)
+		goto err_set_gpio_input;
+
+	INIT_WORK(&switch_data->work, gpio_switch_work);
+
+	switch_data->irq = gpio_to_irq(switch_data->gpio);
+	if (switch_data->irq < 0) {
+		ret = switch_data->irq;
+		goto err_detect_irq_num_failed;
+	}
+
+	ret = request_irq(switch_data->irq, gpio_irq_handler,
+			  IRQF_TRIGGER_LOW, pdev->name, switch_data);
+	if (ret < 0)
+		goto err_request_irq;
+
+	/* Perform initial detection */
+	gpio_switch_work(&switch_data->work);
+
+	return 0;
+
+err_request_irq:
+err_detect_irq_num_failed:
+err_set_gpio_input:
+	gpio_free(switch_data->gpio);
+err_request_gpio:
+    switch_dev_unregister(&switch_data->sdev);
+err_switch_dev_register:
+	kfree(switch_data);
+
+	return ret;
+}
+
+static int __devexit gpio_switch_remove(struct platform_device *pdev)
+{
+	struct gpio_switch_data *switch_data = platform_get_drvdata(pdev);
+
+	cancel_work_sync(&switch_data->work);
+	gpio_free(switch_data->gpio);
+    switch_dev_unregister(&switch_data->sdev);
+	kfree(switch_data);
+
+	return 0;
+}
+
+static struct platform_driver gpio_switch_driver = {
+	.probe		= gpio_switch_probe,
+	.remove		= __devexit_p(gpio_switch_remove),
+	.driver		= {
+		.name	= "switch-gpio",
+		.owner	= THIS_MODULE,
+	},
+};
+
+static int __init gpio_switch_init(void)
+{
+	return platform_driver_register(&gpio_switch_driver);
+}
+
+static void __exit gpio_switch_exit(void)
+{
+	platform_driver_unregister(&gpio_switch_driver);
+}
+
+module_init(gpio_switch_init);
+module_exit(gpio_switch_exit);
+
+MODULE_AUTHOR("Mike Lockwood <lockwood@android.com>");
+MODULE_DESCRIPTION("GPIO Switch driver");
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/drivers/switch/Makefile
+++ linux-mvl-dove-2.6.32/drivers/switch/Makefile
@@ -0,0 +1,4 @@
+# Switch Class Driver
+obj-$(CONFIG_SWITCH)		+= switch_class.o
+obj-$(CONFIG_SWITCH_GPIO)	+= switch_gpio.o
+
--- linux-mvl-dove-2.6.32.orig/drivers/switch/switch_class.c
+++ linux-mvl-dove-2.6.32/drivers/switch/switch_class.c
@@ -0,0 +1,174 @@
+/*
+ *  drivers/switch/switch_class.c
+ *
+ * Copyright (C) 2008 Google, Inc.
+ * Author: Mike Lockwood <lockwood@android.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+*/
+
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/device.h>
+#include <linux/fs.h>
+#include <linux/err.h>
+#include <linux/switch.h>
+
+struct class *switch_class;
+static atomic_t device_count;
+
+static ssize_t state_show(struct device *dev, struct device_attribute *attr,
+		char *buf)
+{
+	struct switch_dev *sdev = (struct switch_dev *)
+		dev_get_drvdata(dev);
+
+	if (sdev->print_state) {
+		int ret = sdev->print_state(sdev, buf);
+		if (ret >= 0)
+			return ret;
+	}
+	return sprintf(buf, "%d\n", sdev->state);
+}
+
+static ssize_t name_show(struct device *dev, struct device_attribute *attr,
+		char *buf)
+{
+	struct switch_dev *sdev = (struct switch_dev *)
+		dev_get_drvdata(dev);
+
+	if (sdev->print_name) {
+		int ret = sdev->print_name(sdev, buf);
+		if (ret >= 0)
+			return ret;
+	}
+	return sprintf(buf, "%s\n", sdev->name);
+}
+
+static DEVICE_ATTR(state, S_IRUGO | S_IWUSR, state_show, NULL);
+static DEVICE_ATTR(name, S_IRUGO | S_IWUSR, name_show, NULL);
+
+void switch_set_state(struct switch_dev *sdev, int state)
+{
+	char name_buf[120];
+	char state_buf[120];
+	char *prop_buf;
+	char *envp[3];
+	int env_offset = 0;
+	int length;
+
+	if (sdev->state != state) {
+		sdev->state = state;
+
+		prop_buf = (char *)get_zeroed_page(GFP_KERNEL);
+		if (prop_buf) {
+			length = name_show(sdev->dev, NULL, prop_buf);
+			if (length > 0) {
+				if (prop_buf[length - 1] == '\n')
+					prop_buf[length - 1] = 0;
+				snprintf(name_buf, sizeof(name_buf),
+					"SWITCH_NAME=%s", prop_buf);
+				envp[env_offset++] = name_buf;
+			}
+			length = state_show(sdev->dev, NULL, prop_buf);
+			if (length > 0) {
+				if (prop_buf[length - 1] == '\n')
+					prop_buf[length - 1] = 0;
+				snprintf(state_buf, sizeof(state_buf),
+					"SWITCH_STATE=%s", prop_buf);
+				envp[env_offset++] = state_buf;
+			}
+			envp[env_offset] = NULL;
+			kobject_uevent_env(&sdev->dev->kobj, KOBJ_CHANGE, envp);
+			free_page((unsigned long)prop_buf);
+		} else {
+			printk(KERN_ERR "out of memory in switch_set_state\n");
+			kobject_uevent(&sdev->dev->kobj, KOBJ_CHANGE);
+		}
+	}
+}
+EXPORT_SYMBOL_GPL(switch_set_state);
+
+static int create_switch_class(void)
+{
+	if (!switch_class) {
+		switch_class = class_create(THIS_MODULE, "switch");
+		if (IS_ERR(switch_class))
+			return PTR_ERR(switch_class);
+		atomic_set(&device_count, 0);
+	}
+
+	return 0;
+}
+
+int switch_dev_register(struct switch_dev *sdev)
+{
+	int ret;
+
+	if (!switch_class) {
+		ret = create_switch_class();
+		if (ret < 0)
+			return ret;
+	}
+
+	sdev->index = atomic_inc_return(&device_count);
+	sdev->dev = device_create(switch_class, NULL,
+		MKDEV(0, sdev->index), NULL, sdev->name);
+	if (IS_ERR(sdev->dev))
+		return PTR_ERR(sdev->dev);
+
+	ret = device_create_file(sdev->dev, &dev_attr_state);
+	if (ret < 0)
+		goto err_create_file_1;
+	ret = device_create_file(sdev->dev, &dev_attr_name);
+	if (ret < 0)
+		goto err_create_file_2;
+
+	dev_set_drvdata(sdev->dev, sdev);
+	sdev->state = 0;
+	return 0;
+
+err_create_file_2:
+	device_remove_file(sdev->dev, &dev_attr_state);
+err_create_file_1:
+	device_destroy(switch_class, MKDEV(0, sdev->index));
+	printk(KERN_ERR "switch: Failed to register driver %s\n", sdev->name);
+
+	return ret;
+}
+EXPORT_SYMBOL_GPL(switch_dev_register);
+
+void switch_dev_unregister(struct switch_dev *sdev)
+{
+	device_remove_file(sdev->dev, &dev_attr_name);
+	device_remove_file(sdev->dev, &dev_attr_state);
+	device_destroy(switch_class, MKDEV(0, sdev->index));
+	dev_set_drvdata(sdev->dev, NULL);
+}
+EXPORT_SYMBOL_GPL(switch_dev_unregister);
+
+static int __init switch_class_init(void)
+{
+	return create_switch_class();
+}
+
+static void __exit switch_class_exit(void)
+{
+	class_destroy(switch_class);
+}
+
+module_init(switch_class_init);
+module_exit(switch_class_exit);
+
+MODULE_AUTHOR("Mike Lockwood <lockwood@android.com>");
+MODULE_DESCRIPTION("Switch class driver");
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/drivers/uio/uio_vmeta.c
+++ linux-mvl-dove-2.6.32/drivers/uio/uio_vmeta.c
@@ -0,0 +1,922 @@
+/*
+ * drivers/uio/uio_vmeta.c
+ *
+ * Marvell multi-format video decoder engine UIO driver.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ *
+ * Based on an earlier version by Peter Liao.
+ */
+
+#include <linux/uio_driver.h>
+#include <linux/platform_device.h>
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/dma-mapping.h>
+#include <linux/clk.h>
+#include <linux/sched.h>
+#include <linux/uio_vmeta.h>
+#include <linux/delay.h>
+#include <linux/semaphore.h>
+#include <linux/notifier.h>
+#include <linux/suspend.h>
+#include <linux/mutex.h>
+#include <asm/uaccess.h>
+#include <asm/atomic.h>
+
+#if defined(CONFIG_PXA3xx_DVFM)
+#include <linux/notifier.h>
+#include <linux/timer.h>
+#include <mach/dvfm.h>
+#include <mach/pxa3xx_dvfm.h>
+#include <mach/pxa3xx_pm.h>
+#endif
+
+#define CONFIG_MEM_FOR_MULTIPROCESS
+#define VDEC_HW_CONTEXT_SIZE	SZ_512K
+#define VDEC_OBJ_SIZE			SZ_64K
+#define KERNEL_SHARE_SIZE		SZ_4K
+
+/* public */
+#define UIO_VMETA_NAME		"ap510-vmeta"
+#define UIO_VMETA_BUS_IRQ_NAME  UIO_VMETA_NAME"-bus"
+#define UIO_VMETA_VERSION	"build-004"
+
+#define VMETA_DEBUG 0
+
+#if VMETA_DEBUG
+#define vmeta_print printk
+#else
+#define vmeta_print(x,...)
+#endif
+
+
+/* private */
+struct vmeta_instance {
+	void			*reg_base;
+	struct uio_info		uio_info;
+	struct timer_list	irq_poll_timer;
+	spinlock_t		lock;
+	unsigned long		flags;
+	struct clk		*clk;
+	struct clk		*axi_clk;
+	struct rw_semaphore	sem;
+	int power_constraint;
+	struct timer_list power_timer;
+	int power_down_ms;
+	int power_status;//0-off 1-on
+	int clk_status;//0-off 1-400MHz 2-500MHz
+	struct semaphore *sema;
+	struct semaphore *priv_sema;
+	wait_queue_head_t 	wait;
+};
+
+#if defined(CONFIG_PXA3xx_DVFM)
+static struct dvfm_lock dvfm_lock = {
+	.lock		= SPIN_LOCK_UNLOCKED,
+	.dev_idx	= -1,
+	.count		= 0,
+};
+
+static void set_dvfm_constraint(struct vmeta_instance* vi)
+{
+	int ret = 0;
+	spin_lock_irqsave(&dvfm_lock.lock, dvfm_lock.flags);
+	if (dvfm_lock.count++ == 0) {
+#if 1
+		/* Disable dvfm for now for MG1,
+		 * todo: later should try to restore to optimize for power */
+		ret = dvfm_disable(dvfm_lock.dev_idx);
+#else
+		/* Disable Low power mode */
+		dvfm_disable_op_name("D0CS", dvfm_lock.dev_idx);
+		dvfm_disable_op_name("D1", dvfm_lock.dev_idx);
+		dvfm_disable_op_name("D2", dvfm_lock.dev_idx);
+		dvfm_disable_op_name("CG", dvfm_lock.dev_idx);
+#endif
+		if(ret) {
+			printk(KERN_ERR "vmeta dvfm disable error with %d\n", ret);
+		}
+		vi->power_constraint = 1;
+		if(timer_pending(&vi->power_timer)) {
+			del_timer(&vi->power_timer);
+		}
+	} else
+		dvfm_lock.count--;
+	spin_unlock_irqrestore(&dvfm_lock.lock, dvfm_lock.flags);
+}
+
+static void __unset_dvfm_constraint(struct vmeta_instance* vi)
+{
+	int ret;
+	spin_lock_irqsave(&dvfm_lock.lock, dvfm_lock.flags);
+	if (dvfm_lock.count == 0) {
+#if 1
+		/* Disable dvfm for now for MG1,
+		 * todo: later should try to optimize for power */
+		ret = dvfm_enable(dvfm_lock.dev_idx);
+		if(ret) {
+			printk(KERN_ERR "vmeta dvfm enable error with %d\n", ret);
+		}
+#else
+		/* Enable Low power mode */
+		dvfm_enable_op_name("D0CS", dvfm_lock.dev_idx);
+		dvfm_enable_op_name("D1", dvfm_lock.dev_idx);
+		dvfm_enable_op_name("D2", dvfm_lock.dev_idx);
+		dvfm_enable_op_name("CG", dvfm_lock.dev_idx);
+#endif
+		vi->power_constraint = 0;
+	}
+	spin_unlock_irqrestore(&dvfm_lock.lock, dvfm_lock.flags);
+}
+
+static void unset_dvfm_constraint(struct vmeta_instance* vi)
+{
+	spin_lock_irqsave(&dvfm_lock.lock, dvfm_lock.flags);
+	if (dvfm_lock.count == 0) {
+		spin_unlock_irqrestore(&dvfm_lock.lock, dvfm_lock.flags);
+		return;
+	}
+	if (--dvfm_lock.count == 0) {
+		vi->power_timer.expires = jiffies + msecs_to_jiffies(vi->power_down_ms);
+		if(!timer_pending(&vi->power_timer)) {
+			add_timer(&vi->power_timer);
+		}
+	} else
+		dvfm_lock.count++;
+	spin_unlock_irqrestore(&dvfm_lock.lock, dvfm_lock.flags);
+}
+
+static void vmeta_power_timer_handler(unsigned long data)
+{
+	struct vmeta_instance* vi = (struct vmeta_instance*) data;
+
+	__unset_dvfm_constraint(vi);
+}
+
+#endif
+
+#ifndef CONFIG_MEM_FOR_MULTIPROCESS
+static atomic_t vmeta_available = ATOMIC_INIT(1);
+#else /* CONFIG_MEM_FOR_MULTIPROCESS */
+static atomic_t vmeta_available = ATOMIC_INIT(0);
+#endif /* CONFIG_MEM_FOR_MULTIPROCESS */
+
+static atomic_t vmeta_pm_suspend_available = ATOMIC_INIT(0);
+static atomic_t vmeta_pm_suspend_successful = ATOMIC_INIT(0);
+static atomic_t vmeta_pm_suspend_watch_dog_trig = ATOMIC_INIT(0);
+struct mutex vmeta_pm_suspend_check;
+struct timer_list vmeta_pm_watch_dog;
+struct vmeta_instance *vmeta_priv_vi;
+
+static void vmeta_pm_watch_dog_timer(unsigned long data)
+{
+	if(vmeta_pm_suspend_successful.counter == 0) {
+		if(mutex_is_locked(&vmeta_pm_suspend_check)) {
+			mutex_unlock(&vmeta_pm_suspend_check);
+			atomic_set(&vmeta_pm_suspend_watch_dog_trig, 1);
+		}
+	}
+}
+
+static int vmeta_pm_event(struct notifier_block *notifier, unsigned long val, void *v)
+{
+	/* Hibernation and suspend events */
+	// PM_HIBERNATION_PREPARE	0x0001 /* Going to hibernate */
+	// PM_POST_HIBERNATION	0x0002 /* Hibernation finished */
+	// PM_SUSPEND_PREPARE	0x0003 /* Going to suspend the system */
+	// PM_POST_SUSPEND		0x0004 /* Suspend finished */
+	// PM_RESTORE_PREPARE	0x0005 /* Going to restore a saved image */
+	// PM_POST_RESTORE		0x0006 /* Restore failed */
+
+	uio_event_notify(&vmeta_priv_vi->uio_info);
+
+	switch(val) {
+		case PM_SUSPEND_PREPARE:
+		case PM_HIBERNATION_PREPARE:
+			atomic_set(&vmeta_pm_suspend_available, 1);
+#ifndef CONFIG_MEM_FOR_MULTIPROCESS
+			if(vmeta_available.counter == 0) {
+#else /* CONFIG_MEM_FOR_MULTIPROCESS */
+			if(vmeta_available.counter >= 1) {
+#endif /* CONFIG_MEM_FOR_MULTIPROCESS */
+				init_timer(&vmeta_pm_watch_dog);
+				vmeta_pm_watch_dog.function = vmeta_pm_watch_dog_timer;
+				mod_timer(&vmeta_pm_watch_dog, jiffies + HZ);
+
+				atomic_set(&vmeta_pm_suspend_successful, 0);
+				mutex_lock(&vmeta_pm_suspend_check);
+				if(vmeta_pm_suspend_watch_dog_trig.counter == 1) {
+					atomic_set(&vmeta_pm_suspend_watch_dog_trig, 0);
+					if(!mutex_is_locked(&vmeta_pm_suspend_check))
+						mutex_lock(&vmeta_pm_suspend_check);	// lock as default
+
+					return NOTIFY_BAD;
+				} else
+					atomic_set(&vmeta_pm_suspend_successful, 1);
+			}
+			break;
+		case PM_POST_SUSPEND:
+		case PM_POST_HIBERNATION:
+			atomic_set(&vmeta_pm_suspend_available, 0);
+			if(!mutex_is_locked(&vmeta_pm_suspend_check))
+				mutex_lock(&vmeta_pm_suspend_check);	// lock as default
+
+			wake_up_interruptible(&vmeta_priv_vi->wait);
+			break;
+	};
+
+	return NOTIFY_OK;
+}
+
+static struct notifier_block vmeta_pm_notifier = {
+	.notifier_call = vmeta_pm_event,
+	.priority = -5,
+};
+
+void vmeta_lock_init(struct vmeta_instance *vi)
+{
+	sema_init(vi->sema, 1);
+	sema_init(vi->priv_sema, 1);
+}
+
+
+int vmeta_lock(unsigned long ms, struct vmeta_instance *vi)
+{
+	int ret;
+
+	ret = down_timeout(vi->sema,msecs_to_jiffies(ms));
+
+	return ret;
+}
+
+int vmeta_unlock(struct vmeta_instance *vi)
+{
+	if(vi->sema->count == 0) {
+		up(vi->sema);
+		return 0;
+	}
+	else if(vi->sema->count == 1) {
+		return 0;
+	}
+	else {
+		return -1;
+	}
+}
+
+int vmeta_priv_lock(unsigned long ms, struct vmeta_instance *vi)
+{
+	int ret;
+
+	ret = down_timeout(vi->priv_sema,msecs_to_jiffies(ms));
+
+	return ret;
+}
+
+int vmeta_priv_unlock(struct vmeta_instance *vi)
+{
+	if(vi->priv_sema->count == 0) {
+		up(vi->priv_sema);
+		return 0;
+	}
+	else if(vi->priv_sema->count == 1) {
+		return 0;
+	}
+	else {
+		return -1;
+	}
+}
+
+int vmeta_power_on(struct vmeta_instance* vi)
+{
+	down_read(&vi->sem);
+	if(vi->power_status ==1) {
+		up_read(&vi->sem);
+		return 0;
+	}
+
+	clk_enable(vi->clk);
+	vi->power_status =1;
+
+	up_read(&vi->sem);
+	return 0;
+}
+
+int vmeta_clk_on(struct vmeta_instance *vi)
+{
+	if(IS_ERR(vi->clk)) {
+		printk(KERN_ERR "VMETA: vmeta_clk_on error\n");
+		return -1;
+	}
+
+	if(IS_ERR(vi->axi_clk)) {
+		printk(KERN_ERR "VMETA: vmeta_clk_on error\n");
+		return -1;
+	}
+
+	down_read(&vi->sem);
+	if(vi->clk_status != 0) {
+		up_read(&vi->sem);
+		return 0;
+	}
+
+#if defined(CONFIG_PXA3xx_DVFM)
+	set_dvfm_constraint(vi);
+#endif
+	clk_enable(vi->axi_clk);
+	clk_enable(vi->clk);
+
+	vi->clk_status = 2;
+	up_read(&vi->sem);
+	return 0;
+}
+
+int vmeta_clk_switch(struct vmeta_instance *vi, unsigned long clk_flag)
+{
+	int ret = 0;
+	unsigned long clk_rate = 0;
+
+	if(IS_ERR(vi->clk)) {
+		printk(KERN_ERR "VMETA: vmeta_clk_switch error\n");
+		return -1;
+	}
+
+	down_read(&vi->sem);
+	if(clk_flag == 0)
+		clk_rate = 400000000; // 400MHz
+	else if (clk_flag == 1)
+		clk_rate = 500000000; // 500MHz
+	ret = clk_set_rate(vi->clk,clk_rate);
+	up_read(&vi->sem);
+	return ret;
+}
+
+int vmeta_turn_on(struct vmeta_instance *vi)
+{
+	int ret;
+
+	ret = vmeta_clk_on(vi);
+	if(ret) {
+		return -1;
+	}
+
+	ret = vmeta_power_on(vi);
+	if(ret) {
+		return -1;
+	}
+
+	return 0;
+}
+
+int vmeta_power_off(struct vmeta_instance *vi)
+{
+	down_read(&vi->sem);
+	if(vi->power_status ==0) {
+		up_read(&vi->sem);
+		return 0;
+	}
+
+	clk_disable(vi->clk);
+	vi->power_status = 0;
+	up_read(&vi->sem);
+
+	return 0;
+}
+
+int vmeta_clk_off(struct vmeta_instance *vi)
+{
+	if(IS_ERR(vi->clk)) {
+		printk(KERN_ERR "VMETA: vmeta_clk_off error\n");
+		return -1;
+	}
+
+	if(IS_ERR(vi->axi_clk)) {
+		printk(KERN_ERR "VMETA: vmeta_clk_off error\n");
+		return -1;
+	}
+
+	down_read(&vi->sem);
+	if(vi->clk_status == 0) {
+		up_read(&vi->sem);
+		return 0;
+	}
+
+	clk_disable(vi->clk);
+	clk_disable(vi->axi_clk);
+#if defined(CONFIG_PXA3xx_DVFM)
+	unset_dvfm_constraint(vi);
+#endif
+	vi->clk_status = 0;
+	up_read(&vi->sem);
+	return 0;
+}
+
+int vmeta_turn_off(struct vmeta_instance *vi)
+{
+	int ret;
+
+	ret = vmeta_power_off(vi);
+	if(ret) {
+		return -1;
+	}
+
+	ret = vmeta_clk_off(vi);
+	if(ret) {
+		return -1;
+	}
+
+	return 0;
+}
+
+int vmeta_open(struct uio_info *info, struct inode *inode)
+{
+	struct vmeta_instance *vi;
+
+	vi = (struct vmeta_instance *)info->priv;
+
+#ifndef CONFIG_MEM_FOR_MULTIPROCESS
+	if (!atomic_dec_and_test(&vmeta_available)) {
+		atomic_inc(&vmeta_available);
+		return -EBUSY;	/* already open */
+	}
+	vmeta_turn_on(vi);
+#else /* CONFIG_MEM_FOR_MULTIPROCESS */
+	if (atomic_add_return(1, &vmeta_available) == 1)
+		vmeta_turn_on(vi);
+#endif /* CONFIG_MEM_FOR_MULTIPROCESS */
+	return 0;
+}
+
+inline int get_current_id(kernel_share* ks,pid_t pid)
+{
+	int i = MAX_VMETA_INSTANCE;
+
+	for(i=0;i<MAX_VMETA_INSTANCE;i++) {
+		if(ks->user_id_list[i].pid == pid){
+			return i;
+		}
+	}
+
+	return -1;
+}
+
+int vmeta_release(struct uio_info *info, struct inode *inode)
+{
+	struct vmeta_instance *vi;
+	kernel_share * ks;
+
+	vi = (struct vmeta_instance *) info->priv;
+	ks = (kernel_share*)vi->uio_info.mem[3].internal_addr;
+
+	printk(KERN_INFO "vmeta release current pid=0x%x, id=%d, active id=%d\n",current->pid, get_current_id(ks,current->pid),ks->active_user_id);
+	down_read(&vi->sem);
+	if( (ks->lock_flag==VMETA_LOCK_ON) && (get_current_id(ks,current->pid) == ks->active_user_id))
+	{
+		printk(KERN_ERR "vmeta error , pid(%d),uid(%d) exit abnormally\n",current->pid,ks->active_user_id);
+		ks->lock_flag = VMETA_LOCK_FORCE_INIT;
+		ks->ref_count--;
+		vmeta_unlock(vi);
+		memset(&(ks->user_id_list[ks->active_user_id]),0x0,sizeof(id_instance));
+	}
+
+	if(ks->ref_count == 0){
+		vmeta_turn_off(vi);
+	}
+
+	up_read(&vi->sem);
+
+#ifndef CONFIG_MEM_FOR_MULTIPROCESS
+	atomic_inc(&vmeta_available); /* release the device */
+	clk_disable(vmeta_priv_vi->clk);
+#else /* CONFIG_MEM_FOR_MULTIPROCESS */
+	if (atomic_dec_and_test(&vmeta_available))
+		clk_disable(vmeta_priv_vi->clk);
+#endif /* CONFIG_MEM_FOR_MULTIPROCESS */
+	return 0;
+}
+
+static void __attribute__ ((unused))
+vmeta_irq_poll_timer_handler(unsigned long data)
+{
+	struct vmeta_instance *vi = (struct vmeta_instance *)data;
+
+	uio_event_notify(&vi->uio_info);
+	mod_timer(&vi->irq_poll_timer, jiffies + HZ/100);/*10ms timer*/
+}
+
+static irqreturn_t
+vmeta_bus_irq_handler(int irq, void *dev_id)
+{
+	struct vmeta_instance *vi = (struct vmeta_instance *)dev_id;
+
+	printk("VMETA: bus error detected\n");
+	uio_event_notify(&vi->uio_info);
+	return IRQ_HANDLED;
+}
+
+static irqreturn_t
+vmeta_func_irq_handler(int irq, struct uio_info *dev_info)
+{
+	struct vmeta_instance *priv = dev_info->priv;
+	unsigned long flags;
+
+	/* Just disable the interrupt in the interrupt controller, and
+	 * remember the state so we can allow user space to enable it later.
+	 */
+
+	spin_lock_irqsave(&priv->lock, flags);
+	if (!test_and_set_bit(0, &priv->flags))
+		disable_irq_nosync(irq);
+
+	spin_unlock_irqrestore(&priv->lock, flags);
+
+	return IRQ_HANDLED;
+}
+
+static int vmeta_irqcontrol(struct uio_info *dev_info, s32 irq_on)
+{
+	struct vmeta_instance *priv = dev_info->priv;
+	unsigned long flags;
+
+	/* Allow user space to enable and disable the interrupt
+	 * in the interrupt controller, but keep track of the
+	 * state to prevent per-irq depth damage.
+	 *
+	 * Serialize this operation to support multiple tasks.
+	 */
+
+	spin_lock_irqsave(&priv->lock, flags);
+	if (irq_on) {
+		if (test_and_clear_bit(0, &priv->flags))
+			enable_irq(dev_info->irq);
+	} else {
+		if (!test_and_set_bit(0, &priv->flags))
+			disable_irq(dev_info->irq);
+	}
+	spin_unlock_irqrestore(&priv->lock, flags);
+
+	return 0;
+}
+
+static int vmeta_ioctl(struct uio_info *info, unsigned int cmd, unsigned long arg)
+{
+	int ret = 0;
+	struct vmeta_instance *priv = info->priv;
+
+	switch(cmd) {
+		case VMETA_CMD_POWER_ON:
+			ret = vmeta_power_on(priv);
+			break;
+		case VMETA_CMD_POWER_OFF:
+			ret = vmeta_power_off(priv);
+			break;
+		case VMETA_CMD_CLK_ON:
+			ret = vmeta_clk_on(priv);
+			break;
+		case VMETA_CMD_CLK_OFF:
+			ret = vmeta_clk_off(priv);
+			break;
+		case VMETA_CMD_CLK_SWITCH:
+			ret = vmeta_clk_switch(priv, arg);
+			break;
+		case VMETA_CMD_LOCK:
+			ret = vmeta_lock(arg,priv);
+			break;
+		case VMETA_CMD_UNLOCK:
+			ret = vmeta_unlock(priv);
+			break;
+		case VMETA_CMD_PRIV_LOCK:
+			ret = vmeta_priv_lock(arg,priv);
+			break;
+		case VMETA_CMD_PRIV_UNLOCK:
+			ret = vmeta_priv_unlock(priv);
+			break;
+		case VMETA_CMD_SUSPEND_CHECK: {
+			int vmeta_suspend_check = 0;
+			if(vmeta_pm_suspend_available.counter)
+				vmeta_suspend_check = 1;
+				__copy_to_user((int __user*)arg, &vmeta_suspend_check, sizeof(int));
+			}
+			break;
+		case VMETA_CMD_SUSPEND_READY: {
+			DECLARE_WAITQUEUE(wait, current);
+
+			add_wait_queue(&priv->wait, &wait);
+			set_current_state(TASK_INTERRUPTIBLE);
+
+			if(mutex_is_locked(&vmeta_pm_suspend_check))
+				mutex_unlock(&vmeta_pm_suspend_check);
+
+			schedule();
+			set_current_state(TASK_RUNNING);
+			remove_wait_queue(&priv->wait, &wait);
+
+
+			}
+			break;
+		case VMETA_CMD_SUSPEND_SET:
+			atomic_set(&vmeta_pm_suspend_available, 1);
+			break;
+		case VMETA_CMD_SUSPEND_UNSET:
+			atomic_set(&vmeta_pm_suspend_available, 0);
+		default:
+			break;
+	}
+
+	return ret;
+}
+
+static int vmeta_probe(struct platform_device *pdev)
+{
+	struct resource *res;
+	struct vmeta_instance *vi;
+	int ret;
+	int irq_func, irq_bus;
+	kernel_share* p_ks;
+#ifdef CONFIG_MEM_FOR_MULTIPROCESS
+	dma_addr_t mem_dma_addr;
+	void *mem_vir_addr;
+#endif
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (res == NULL) {
+		printk(KERN_ERR "vmeta_probe: no memory resources given\n");
+		return -ENODEV;
+	}
+
+#ifndef CONFIG_VMETA_POLLING_MODE
+	irq_func = platform_get_irq(pdev,0);
+	if(irq_func < 0){
+		printk(KERN_ERR "vmeta_probe: no function irq resources given in interrupt mode\n");
+		return -ENODEV;
+	}
+#endif
+
+#ifdef CONFIG_ARCH_DOVE
+#else
+	irq_bus = platform_get_irq(pdev,1);
+	if(irq_bus < 0){
+		printk(KERN_ERR "vmeta_probe: no bus irq resources given\n");
+		return -ENODEV;
+	}
+#endif
+
+	vi = kzalloc(sizeof(*vi), GFP_KERNEL);
+	if (vi == NULL) {
+		printk(KERN_ERR "vmeta_probe: out of memory\n");
+		return -ENOMEM;
+	}
+	vmeta_priv_vi = vi;
+
+	vi->sema = (struct semaphore *)kzalloc(sizeof(struct semaphore),GFP_KERNEL);
+	vi->priv_sema = (struct semaphore *)kzalloc(sizeof(struct semaphore),GFP_KERNEL);
+
+	if (vi->sema == NULL || vi->priv_sema == NULL) {
+		printk(KERN_ERR "vmeta->sema: out of memory\n");
+		return -ENOMEM;
+	}
+
+	vi->axi_clk = clk_get(&pdev->dev, "AXICLK");
+	if (IS_ERR(vi->axi_clk)) {
+		printk(KERN_ERR "vmeta_probe: cannot get AXI clock\n");
+		ret = PTR_ERR(vi->axi_clk);
+		goto out_free;
+	}
+
+	vi->clk = clk_get(&pdev->dev, "VMETA_CLK");
+	if (IS_ERR(vi->clk)) {
+		printk(KERN_ERR "vmeta_probe: cannot get vmeta clock\n");
+		ret = PTR_ERR(vi->clk);
+		goto out_free;
+	}
+
+	vi->reg_base = ioremap(res->start, res->end - res->start + 1);
+	if (vi->reg_base == NULL) {
+		printk(KERN_ERR "vmeta_probe: can't remap register area\n");
+		ret = -ENOMEM;
+		goto out_free;
+	}
+
+	platform_set_drvdata(pdev, vi);
+
+	spin_lock_init(&vi->lock);
+	vi->flags = 0; /* interrupt is enabled to begin with */
+	vi->uio_info.name = UIO_VMETA_NAME;
+	vi->uio_info.version = UIO_VMETA_VERSION;
+	vi->uio_info.mem[0].internal_addr = vi->reg_base;
+	vi->uio_info.mem[0].addr = res->start;
+	vi->uio_info.mem[0].memtype = UIO_MEM_PHYS;
+	vi->uio_info.mem[0].size = res->end - res->start + 1;
+#ifdef CONFIG_MEM_FOR_MULTIPROCESS
+	mem_vir_addr = dma_alloc_coherent(&pdev->dev, VDEC_HW_CONTEXT_SIZE,
+			&mem_dma_addr, GFP_KERNEL);
+	if (!mem_vir_addr) {
+		ret = -ENOMEM;
+		goto out_free;
+	}
+	vi->uio_info.mem[1].internal_addr = mem_vir_addr;
+	vi->uio_info.mem[1].addr = mem_dma_addr;
+	vi->uio_info.mem[1].memtype = UIO_MEM_PHYS;
+	vi->uio_info.mem[1].size = VDEC_HW_CONTEXT_SIZE;
+	vmeta_print("[1] internal addr[0x%08x],addr[0x%08x] size[%ld] \n",(unsigned int)vi->uio_info.mem[1].internal_addr,
+				(unsigned int)vi->uio_info.mem[1].addr,vi->uio_info.mem[1].size);
+
+	/*this memory is allocated for VDEC_OBJ*/
+	mem_vir_addr = dma_alloc_coherent(&pdev->dev, VDEC_OBJ_SIZE,&mem_dma_addr, GFP_KERNEL);
+	if (!mem_vir_addr) {
+		ret = -ENOMEM;
+		goto out_free;
+	}
+
+	vi->uio_info.mem[2].internal_addr = mem_vir_addr;
+	vi->uio_info.mem[2].addr = (unsigned long)mem_dma_addr;
+	vi->uio_info.mem[2].memtype = UIO_MEM_PHYS;
+	vi->uio_info.mem[2].size = VDEC_OBJ_SIZE;
+	vmeta_print("[2] internal addr[0x%08x],addr[0x%08x] size[%ld] \n",(unsigned int)vi->uio_info.mem[2].internal_addr,
+				(unsigned int)vi->uio_info.mem[2].addr,vi->uio_info.mem[2].size);
+
+	/*this memory is allocated for vmeta driver internally and shared between user space and kernel space*/
+	mem_vir_addr = dma_alloc_coherent(&pdev->dev, KERNEL_SHARE_SIZE,&mem_dma_addr, GFP_KERNEL);
+	if (!mem_vir_addr) {
+		ret = -ENOMEM;
+		goto out_free;
+	}
+	memset(mem_vir_addr,0,KERNEL_SHARE_SIZE);
+	vi->uio_info.mem[3].internal_addr = mem_vir_addr;
+	vi->uio_info.mem[3].addr = (unsigned long)mem_dma_addr;
+	vi->uio_info.mem[3].memtype = UIO_MEM_PHYS;
+	vi->uio_info.mem[3].size = KERNEL_SHARE_SIZE;
+	vmeta_print("[3] internal addr[0x%08x],addr[0x%08x] size[%ld] \n",(unsigned int)vi->uio_info.mem[3].internal_addr,
+				(unsigned int)vi->uio_info.mem[3].addr,vi->uio_info.mem[3].size);
+
+	p_ks = (kernel_share*) mem_vir_addr;
+	p_ks->active_user_id = MAX_VMETA_INSTANCE;
+
+#endif
+
+#ifdef CONFIG_VMETA_POLLING_MODE
+	vi->uio_info.irq = UIO_IRQ_CUSTOM;
+	init_timer(&vi->irq_poll_timer);
+	vi->irq_poll_timer.data = (unsigned long)vi;
+	vi->irq_poll_timer.function = vmeta_irq_poll_timer_handler;
+#else
+	vi->uio_info.irq_flags = IRQF_DISABLED;
+	vi->uio_info.irq = irq_func;
+	vi->uio_info.handler = vmeta_func_irq_handler;
+	vi->uio_info.irqcontrol = vmeta_irqcontrol;
+#endif
+	vi->uio_info.priv = vi;
+
+	vi->uio_info.open = vmeta_open;
+	vi->uio_info.release = vmeta_release;
+	vi->uio_info.ioctl = vmeta_ioctl;
+
+	init_rwsem(&(vi->sem));
+	vmeta_lock_init(vi);
+
+#if defined(CONFIG_PXA3xx_DVFM)
+	init_timer(&vi->power_timer);
+	vi->power_timer.data = (unsigned long) vi;
+	vi->power_timer.function = vmeta_power_timer_handler;
+	vi->power_down_ms=10;
+#endif
+
+	ret = uio_register_device(&pdev->dev, &vi->uio_info);
+	if (ret)
+		goto out_free;
+
+#ifdef CONFIG_VMETA_POLLING_MODE
+	mod_timer(&vi->irq_poll_timer, jiffies + HZ/100);
+#endif
+
+#ifdef CONFIG_ARCH_DOVE
+#else
+	ret = request_irq(irq_bus, vmeta_bus_irq_handler, 0, UIO_VMETA_BUS_IRQ_NAME, vi);
+	if (ret) {
+		printk(KERN_ERR "vmeta_probe: can't request bus irq\n");
+		goto out_free;
+	}
+#endif
+
+
+	// register a pm notifier
+	register_pm_notifier(&vmeta_pm_notifier);
+	mutex_init(&vmeta_pm_suspend_check);
+	if(!mutex_is_locked(&vmeta_pm_suspend_check))
+		mutex_lock(&vmeta_pm_suspend_check);	// lock as default
+
+	// init a wait queue for pm event sync
+	init_waitqueue_head(&vi->wait);
+
+	return 0;
+
+out_free:
+	if (!IS_ERR(vi->clk))
+		clk_put(vi->clk);
+	if (!IS_ERR(vi->axi_clk))
+		clk_put(vi->axi_clk);
+	kfree(vi->sema);
+	kfree(vi->priv_sema);
+	kfree(vi);
+
+	return ret;
+}
+
+static int vmeta_remove(struct platform_device *pdev)
+{
+	struct vmeta_instance *vi = platform_get_drvdata(pdev);
+#ifdef CONFIG_VMETA_POLLING_MODE
+	del_timer_sync(&vi->irq_poll_timer);
+#endif
+#ifdef CONFIG_MEM_FOR_MULTIPROCESS
+	dma_free_coherent(&pdev->dev, VDEC_HW_CONTEXT_SIZE,
+		vi->uio_info.mem[1].internal_addr, vi->uio_info.mem[1].addr);
+	dma_free_coherent(&pdev->dev, VDEC_OBJ_SIZE,
+		vi->uio_info.mem[2].internal_addr, vi->uio_info.mem[2].addr);
+	dma_free_coherent(&pdev->dev, KERNEL_SHARE_SIZE,
+		vi->uio_info.mem[3].internal_addr, vi->uio_info.mem[3].addr);
+#endif
+	uio_unregister_device(&vi->uio_info);
+
+	if (!IS_ERR(vi->clk)) {
+		clk_disable(vi->clk);
+		clk_put(vi->clk);
+	}
+
+	if (!IS_ERR(vi->axi_clk)) {
+		clk_disable(vi->axi_clk);
+		clk_put(vi->axi_clk);
+	}
+
+	iounmap(vi->reg_base);
+	kfree(vi->sema);
+	kfree(vi->priv_sema);
+	kfree(vi);
+
+	vmeta_priv_vi = NULL;
+
+	// unregister pm notifier
+	unregister_pm_notifier(&vmeta_pm_notifier);
+	if(mutex_is_locked(&vmeta_pm_suspend_check))
+		mutex_unlock(&vmeta_pm_suspend_check);
+
+	return 0;
+}
+
+static void vmeta_shutdown(struct platform_device *dev)
+{
+}
+
+#ifdef CONFIG_PM
+static int vmeta_suspend(struct platform_device *dev, pm_message_t state)
+{
+	return 0;
+}
+
+static int vmeta_resume(struct platform_device *dev)
+{
+	return 0;
+}
+#endif
+
+static struct platform_driver vmeta_driver = {
+	.probe		= vmeta_probe,
+	.remove		= vmeta_remove,
+	.shutdown	= vmeta_shutdown,
+#ifdef CONFIG_PM
+	.suspend	= vmeta_suspend,
+	.resume		= vmeta_resume,
+#endif
+	.driver = {
+		.name	= UIO_VMETA_NAME,
+		.owner	= THIS_MODULE,
+	},
+};
+
+static int __init vmeta_init(void)
+{
+#if defined(CONFIG_PXA3xx_DVFM)
+	int ret;
+	ret = dvfm_register("VMETA", &dvfm_lock.dev_idx);
+	if(ret) {
+		printk(KERN_ERR "vmeta dvfm register fail(%d)\n",ret);
+	}
+#endif
+	return platform_driver_register(&vmeta_driver);
+}
+
+static void __exit vmeta_exit(void)
+{
+#if defined(CONFIG_PXA3xx_DVFM)
+	dvfm_unregister("VMETA", &dvfm_lock.dev_idx);
+#endif
+	platform_driver_unregister(&vmeta_driver);
+}
+
+module_init(vmeta_init);
+module_exit(vmeta_exit);
+
+MODULE_DESCRIPTION("UIO driver for Marvell multi-format video codec engine");
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/drivers/uio/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/uio/Kconfig
@@ -94,4 +94,31 @@
 	  primarily, for virtualization scenarios.
 	  If you compile this as a module, it will be called uio_pci_generic.
 
+config UIO_VMETA
+	tristate "Vmeta UIO device driver"
+	depends on UIO && ARCH_DOVE
+	default y
+	help
+	  Userspace IO interface to the Marvell multi-format video
+	  decoder engine.
+	  
+	  If you compile this as a module, it will be called uio_vmeta.
+
+config UIO_VMETA_POLLING_MODE
+	tristate "Vmeta UIO poll mode"
+	depends on UIO_VMETA
+	default n
+	help
+	  Enable Vmeta interrupt mode by default. If it is set to y, it will be the polling mode.
+
+config UIO_DOVE_VMETA_MEM_SIZE
+	int "VMETA control and data memory size (MB)"
+	depends on UIO_VMETA
+	default 34
+	help
+	  Set the memory size to be reserved for VMETA usage.
+	  Use the following as a guideline:
+	  For video resolutions up to 1280x768 set this to 34 (MB).
+	  For higher resolutions set to 64 (MB).
+
 endif
--- linux-mvl-dove-2.6.32.orig/drivers/uio/Makefile
+++ linux-mvl-dove-2.6.32/drivers/uio/Makefile
@@ -6,3 +6,4 @@
 obj-$(CONFIG_UIO_AEC)	+= uio_aec.o
 obj-$(CONFIG_UIO_SERCOS3)	+= uio_sercos3.o
 obj-$(CONFIG_UIO_PCI_GENERIC)	+= uio_pci_generic.o
+obj-$(CONFIG_UIO_VMETA)	+= uio_vmeta.o
--- linux-mvl-dove-2.6.32.orig/drivers/uio/uio.c
+++ linux-mvl-dove-2.6.32/drivers/uio/uio.c
@@ -523,13 +523,18 @@
 {
 	struct uio_listener *listener = filep->private_data;
 	struct uio_device *idev = listener->dev;
+	s32 event_count;
 
 	if (idev->info->irq == UIO_IRQ_NONE)
 		return -EIO;
 
 	poll_wait(filep, &idev->wait, wait);
-	if (listener->event_count != atomic_read(&idev->event))
+
+	event_count = atomic_read(&idev->event);
+	if (listener->event_count != event_count){
+		listener->event_count = event_count;
 		return POLLIN | POLLRDNORM;
+	}
 	return 0;
 }
 
@@ -730,6 +735,29 @@
 	}
 }
 
+static int uio_ioctl(struct inode *inode, struct file *filep, unsigned int cmd, unsigned long arg)
+{
+	struct uio_device *idev;
+	int ret = 0;
+
+	idev = idr_find(&uio_idr, iminor(inode));
+	if (!idev)
+		return -ENODEV;
+
+	if (idev->info) {
+		if (idev->info->ioctl) {
+			if (!try_module_get(idev->owner))
+				return -ENODEV;
+			ret = idev->info->ioctl(idev->info, cmd, arg);
+			module_put(idev->owner);
+
+			return ret;
+		}
+	}
+
+	return -EINVAL;
+}
+
 static const struct file_operations uio_fops = {
 	.owner		= THIS_MODULE,
 	.open		= uio_open,
@@ -737,6 +765,7 @@
 	.read		= uio_read,
 	.write		= uio_write,
 	.mmap		= uio_mmap,
+	.ioctl		= uio_ioctl,
 	.poll		= uio_poll,
 	.fasync		= uio_fasync,
 };
--- linux-mvl-dove-2.6.32.orig/drivers/xen/events.c
+++ linux-mvl-dove-2.6.32/drivers/xen/events.c
@@ -106,6 +106,7 @@
 #define VALID_EVTCHN(chn)	((chn) != 0)
 
 static struct irq_chip xen_dynamic_chip;
+static struct irq_chip xen_percpu_chip;
 
 /* Constructor for packed IRQ information. */
 static struct irq_info mk_unbound_info(void)
@@ -254,7 +255,7 @@
 	}
 #endif
 
-	memset(cpu_evtchn_mask(0), ~0, sizeof(cpu_evtchn_mask(0)));
+	memset(cpu_evtchn_mask(0), ~0, sizeof(struct cpu_evtchn_s));
 }
 
 static inline void clear_evtchn(int port)
@@ -362,7 +363,7 @@
 		irq = find_unbound_irq();
 
 		set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
-					      handle_level_irq, "event");
+					      handle_edge_irq, "event");
 
 		evtchn_to_irq[evtchn] = irq;
 		irq_info[irq] = mk_evtchn_info(evtchn);
@@ -388,8 +389,8 @@
 		if (irq < 0)
 			goto out;
 
-		set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
-					      handle_level_irq, "ipi");
+		set_irq_chip_and_handler_name(irq, &xen_percpu_chip,
+					      handle_percpu_irq, "ipi");
 
 		bind_ipi.vcpu = cpu;
 		if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
@@ -429,8 +430,8 @@
 
 		irq = find_unbound_irq();
 
-		set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
-					      handle_level_irq, "virq");
+		set_irq_chip_and_handler_name(irq, &xen_percpu_chip,
+					      handle_percpu_irq, "virq");
 
 		evtchn_to_irq[evtchn] = irq;
 		irq_info[irq] = mk_virq_info(evtchn, virq);
@@ -474,6 +475,9 @@
 		bind_evtchn_to_cpu(evtchn, 0);
 
 		evtchn_to_irq[evtchn] = -1;
+	}
+
+	if (irq_info[irq].type != IRQT_UNBOUND) {
 		irq_info[irq] = mk_unbound_info();
 
 		dynamic_irq_cleanup(irq);
@@ -532,6 +536,7 @@
 	if (irq < 0)
 		return irq;
 
+	irqflags |= IRQF_NO_SUSPEND | IRQF_FORCE_RESUME;
 	retval = request_irq(irq, handler, irqflags, devname, dev_id);
 	if (retval != 0) {
 		unbind_from_irq(irq);
@@ -809,9 +814,6 @@
 		evtchn_to_irq[evtchn] = irq;
 		irq_info[irq] = mk_virq_info(evtchn, virq);
 		bind_evtchn_to_cpu(evtchn, cpu);
-
-		/* Ready for use. */
-		unmask_evtchn(evtchn);
 	}
 }
 
@@ -837,10 +839,6 @@
 		evtchn_to_irq[evtchn] = irq;
 		irq_info[irq] = mk_ipi_info(evtchn, ipi);
 		bind_evtchn_to_cpu(evtchn, cpu);
-
-		/* Ready for use. */
-		unmask_evtchn(evtchn);
-
 	}
 }
 
@@ -925,6 +923,16 @@
 	.retrigger	= retrigger_dynirq,
 };
 
+static struct irq_chip xen_percpu_chip __read_mostly = {
+	.name		= "xen-percpu",
+
+	.disable	= disable_dynirq,
+	.mask		= disable_dynirq,
+	.unmask		= enable_dynirq,
+
+	.ack		= ack_dynirq,
+};
+
 void __init xen_init_IRQ(void)
 {
 	int i;
--- linux-mvl-dove-2.6.32.orig/drivers/xen/manage.c
+++ linux-mvl-dove-2.6.32/drivers/xen/manage.c
@@ -43,7 +43,6 @@
 	if (err) {
 		printk(KERN_ERR "xen_suspend: sysdev_suspend failed: %d\n",
 			err);
-		dpm_resume_noirq(PMSG_RESUME);
 		return err;
 	}
 
@@ -69,7 +68,6 @@
 	}
 
 	sysdev_resume();
-	dpm_resume_noirq(PMSG_RESUME);
 
 	return 0;
 }
@@ -81,6 +79,12 @@
 
 	shutting_down = SHUTDOWN_SUSPEND;
 
+	err = stop_machine_create();
+	if (err) {
+		printk(KERN_ERR "xen suspend: failed to setup stop_machine %d\n", err);
+		goto out;
+	}
+
 #ifdef CONFIG_PREEMPT
 	/* If the kernel is preemptible, we need to freeze all the processes
 	   to prevent them from being in the middle of a pagetable update
@@ -88,14 +92,14 @@
 	err = freeze_processes();
 	if (err) {
 		printk(KERN_ERR "xen suspend: freeze failed %d\n", err);
-		return;
+		goto out_destroy_sm;
 	}
 #endif
 
 	err = dpm_suspend_start(PMSG_SUSPEND);
 	if (err) {
 		printk(KERN_ERR "xen suspend: dpm_suspend_start %d\n", err);
-		goto out;
+		goto out_thaw;
 	}
 
 	printk(KERN_DEBUG "suspending xenstore...\n");
@@ -104,32 +108,39 @@
 	err = dpm_suspend_noirq(PMSG_SUSPEND);
 	if (err) {
 		printk(KERN_ERR "dpm_suspend_noirq failed: %d\n", err);
-		goto resume_devices;
+		goto out_resume;
 	}
 
 	err = stop_machine(xen_suspend, &cancelled, cpumask_of(0));
+
+	dpm_resume_noirq(PMSG_RESUME);
+
 	if (err) {
 		printk(KERN_ERR "failed to start xen_suspend: %d\n", err);
-		goto out;
+		cancelled = 1;
 	}
 
+out_resume:
 	if (!cancelled) {
 		xen_arch_resume();
 		xs_resume();
 	} else
 		xs_suspend_cancel();
 
-	dpm_resume_noirq(PMSG_RESUME);
-
-resume_devices:
 	dpm_resume_end(PMSG_RESUME);
 
 	/* Make sure timer events get retriggered on all CPUs */
 	clock_was_set();
-out:
+
+out_thaw:
 #ifdef CONFIG_PREEMPT
 	thaw_processes();
+
+out_destroy_sm:
 #endif
+	stop_machine_destroy();
+
+out:
 	shutting_down = SHUTDOWN_INVALID;
 }
 #endif	/* CONFIG_PM_SLEEP */
--- linux-mvl-dove-2.6.32.orig/drivers/xen/balloon.c
+++ linux-mvl-dove-2.6.32/drivers/xen/balloon.c
@@ -66,8 +66,6 @@
 	/* We aim for 'current allocation' == 'target allocation'. */
 	unsigned long current_pages;
 	unsigned long target_pages;
-	/* We may hit the hard limit in Xen. If we do then we remember it. */
-	unsigned long hard_limit;
 	/*
 	 * Drivers may alter the memory reservation independently, but they
 	 * must inform the balloon driver so we avoid hitting the hard limit.
@@ -136,6 +134,8 @@
 		list_add(&page->lru, &ballooned_pages);
 		balloon_stats.balloon_low++;
 	}
+
+	totalram_pages--;
 }
 
 /* balloon_retrieve: rescue a page from the balloon, if it is not empty. */
@@ -156,6 +156,8 @@
 	else
 		balloon_stats.balloon_low--;
 
+	totalram_pages++;
+
 	return page;
 }
 
@@ -181,7 +183,7 @@
 
 static unsigned long current_target(void)
 {
-	unsigned long target = min(balloon_stats.target_pages, balloon_stats.hard_limit);
+	unsigned long target = balloon_stats.target_pages;
 
 	target = min(target,
 		     balloon_stats.current_pages +
@@ -217,23 +219,10 @@
 	set_xen_guest_handle(reservation.extent_start, frame_list);
 	reservation.nr_extents = nr_pages;
 	rc = HYPERVISOR_memory_op(XENMEM_populate_physmap, &reservation);
-	if (rc < nr_pages) {
-		if (rc > 0) {
-			int ret;
-
-			/* We hit the Xen hard limit: reprobe. */
-			reservation.nr_extents = rc;
-			ret = HYPERVISOR_memory_op(XENMEM_decrease_reservation,
-						   &reservation);
-			BUG_ON(ret != rc);
-		}
-		if (rc >= 0)
-			balloon_stats.hard_limit = (balloon_stats.current_pages + rc -
-						    balloon_stats.driver_pages);
+	if (rc < 0)
 		goto out;
-	}
 
-	for (i = 0; i < nr_pages; i++) {
+	for (i = 0; i < rc; i++) {
 		page = balloon_retrieve();
 		BUG_ON(page == NULL);
 
@@ -259,13 +248,12 @@
 		__free_page(page);
 	}
 
-	balloon_stats.current_pages += nr_pages;
-	totalram_pages = balloon_stats.current_pages;
+	balloon_stats.current_pages += rc;
 
  out:
 	spin_unlock_irqrestore(&balloon_lock, flags);
 
-	return 0;
+	return rc < 0 ? rc : rc != nr_pages;
 }
 
 static int decrease_reservation(unsigned long nr_pages)
@@ -323,7 +311,6 @@
 	BUG_ON(ret != nr_pages);
 
 	balloon_stats.current_pages -= nr_pages;
-	totalram_pages = balloon_stats.current_pages;
 
 	spin_unlock_irqrestore(&balloon_lock, flags);
 
@@ -367,7 +354,6 @@
 static void balloon_set_new_target(unsigned long target)
 {
 	/* No need for lock. Not read-modify-write updates. */
-	balloon_stats.hard_limit   = ~0UL;
 	balloon_stats.target_pages = target;
 	schedule_work(&balloon_worker);
 }
@@ -422,12 +408,10 @@
 	pr_info("xen_balloon: Initialising balloon driver.\n");
 
 	balloon_stats.current_pages = min(xen_start_info->nr_pages, max_pfn);
-	totalram_pages   = balloon_stats.current_pages;
 	balloon_stats.target_pages  = balloon_stats.current_pages;
 	balloon_stats.balloon_low   = 0;
 	balloon_stats.balloon_high  = 0;
 	balloon_stats.driver_pages  = 0UL;
-	balloon_stats.hard_limit    = ~0UL;
 
 	init_timer(&balloon_timer);
 	balloon_timer.data = 0;
@@ -472,9 +456,6 @@
 BALLOON_SHOW(current_kb, "%lu\n", PAGES2KB(balloon_stats.current_pages));
 BALLOON_SHOW(low_kb, "%lu\n", PAGES2KB(balloon_stats.balloon_low));
 BALLOON_SHOW(high_kb, "%lu\n", PAGES2KB(balloon_stats.balloon_high));
-BALLOON_SHOW(hard_limit_kb,
-	     (balloon_stats.hard_limit!=~0UL) ? "%lu\n" : "???\n",
-	     (balloon_stats.hard_limit!=~0UL) ? PAGES2KB(balloon_stats.hard_limit) : 0);
 BALLOON_SHOW(driver_kb, "%lu\n", PAGES2KB(balloon_stats.driver_pages));
 
 static ssize_t show_target_kb(struct sys_device *dev, struct sysdev_attribute *attr,
@@ -544,7 +525,6 @@
 	&attr_current_kb.attr,
 	&attr_low_kb.attr,
 	&attr_high_kb.attr,
-	&attr_hard_limit_kb.attr,
 	&attr_driver_kb.attr,
 	NULL
 };
--- linux-mvl-dove-2.6.32.orig/drivers/xen/xenbus/xenbus_probe.c
+++ linux-mvl-dove-2.6.32/drivers/xen/xenbus/xenbus_probe.c
@@ -454,21 +454,21 @@
 {
 	return sprintf(buf, "%s\n", to_xenbus_device(dev)->nodename);
 }
-DEVICE_ATTR(nodename, S_IRUSR | S_IRGRP | S_IROTH, xendev_show_nodename, NULL);
+static DEVICE_ATTR(nodename, S_IRUSR | S_IRGRP | S_IROTH, xendev_show_nodename, NULL);
 
 static ssize_t xendev_show_devtype(struct device *dev,
 				   struct device_attribute *attr, char *buf)
 {
 	return sprintf(buf, "%s\n", to_xenbus_device(dev)->devicetype);
 }
-DEVICE_ATTR(devtype, S_IRUSR | S_IRGRP | S_IROTH, xendev_show_devtype, NULL);
+static DEVICE_ATTR(devtype, S_IRUSR | S_IRGRP | S_IROTH, xendev_show_devtype, NULL);
 
 static ssize_t xendev_show_modalias(struct device *dev,
 				    struct device_attribute *attr, char *buf)
 {
 	return sprintf(buf, "xen:%s\n", to_xenbus_device(dev)->devicetype);
 }
-DEVICE_ATTR(modalias, S_IRUSR | S_IRGRP | S_IROTH, xendev_show_modalias, NULL);
+static DEVICE_ATTR(modalias, S_IRUSR | S_IRGRP | S_IROTH, xendev_show_modalias, NULL);
 
 int xenbus_probe_node(struct xen_bus_type *bus,
 		      const char *type,
@@ -843,7 +843,7 @@
 
 MODULE_LICENSE("GPL");
 
-static int is_disconnected_device(struct device *dev, void *data)
+static int is_device_connecting(struct device *dev, void *data)
 {
 	struct xenbus_device *xendev = to_xenbus_device(dev);
 	struct device_driver *drv = data;
@@ -861,14 +861,15 @@
 		return 0;
 
 	xendrv = to_xenbus_driver(dev->driver);
-	return (xendev->state != XenbusStateConnected ||
-		(xendrv->is_ready && !xendrv->is_ready(xendev)));
+	return (xendev->state < XenbusStateConnected ||
+		(xendev->state == XenbusStateConnected &&
+		 xendrv->is_ready && !xendrv->is_ready(xendev)));
 }
 
-static int exists_disconnected_device(struct device_driver *drv)
+static int exists_connecting_device(struct device_driver *drv)
 {
 	return bus_for_each_dev(&xenbus_frontend.bus, NULL, drv,
-				is_disconnected_device);
+				is_device_connecting);
 }
 
 static int print_device_status(struct device *dev, void *data)
@@ -884,10 +885,13 @@
 		/* Information only: is this too noisy? */
 		printk(KERN_INFO "XENBUS: Device with no driver: %s\n",
 		       xendev->nodename);
-	} else if (xendev->state != XenbusStateConnected) {
+	} else if (xendev->state < XenbusStateConnected) {
+		enum xenbus_state rstate = XenbusStateUnknown;
+		if (xendev->otherend)
+			rstate = xenbus_read_driver_state(xendev->otherend);
 		printk(KERN_WARNING "XENBUS: Timeout connecting "
-		       "to device: %s (state %d)\n",
-		       xendev->nodename, xendev->state);
+		       "to device: %s (local state %d, remote state %d)\n",
+		       xendev->nodename, xendev->state, rstate);
 	}
 
 	return 0;
@@ -897,7 +901,7 @@
 static int ready_to_wait_for_devices;
 
 /*
- * On a 10 second timeout, wait for all devices currently configured.  We need
+ * On a 5-minute timeout, wait for all devices currently configured.  We need
  * to do this to guarantee that the filesystems and / or network devices
  * needed for boot are available, before we can allow the boot to proceed.
  *
@@ -912,18 +916,30 @@
  */
 static void wait_for_devices(struct xenbus_driver *xendrv)
 {
-	unsigned long timeout = jiffies + 10*HZ;
+	unsigned long start = jiffies;
 	struct device_driver *drv = xendrv ? &xendrv->driver : NULL;
+	unsigned int seconds_waited = 0;
 
 	if (!ready_to_wait_for_devices || !xen_domain())
 		return;
 
-	while (exists_disconnected_device(drv)) {
-		if (time_after(jiffies, timeout))
-			break;
+	while (exists_connecting_device(drv)) {
+		if (time_after(jiffies, start + (seconds_waited+5)*HZ)) {
+			if (!seconds_waited)
+				printk(KERN_WARNING "XENBUS: Waiting for "
+				       "devices to initialise: ");
+			seconds_waited += 5;
+			printk("%us...", 300 - seconds_waited);
+			if (seconds_waited == 300)
+				break;
+		}
+
 		schedule_timeout_interruptible(HZ/10);
 	}
 
+	if (seconds_waited)
+		printk("\n");
+
 	bus_for_each_dev(&xenbus_frontend.bus, NULL, drv,
 			 print_device_status);
 }
--- linux-mvl-dove-2.6.32.orig/drivers/xen/xenbus/xenbus_xs.c
+++ linux-mvl-dove-2.6.32/drivers/xen/xenbus/xenbus_xs.c
@@ -499,7 +499,7 @@
 #define PRINTF_BUFFER_SIZE 4096
 	char *printf_buffer;
 
-	printf_buffer = kmalloc(PRINTF_BUFFER_SIZE, GFP_KERNEL);
+	printf_buffer = kmalloc(PRINTF_BUFFER_SIZE, GFP_NOIO | __GFP_HIGH);
 	if (printf_buffer == NULL)
 		return -ENOMEM;
 
--- linux-mvl-dove-2.6.32.orig/drivers/message/fusion/mptscsih.c
+++ linux-mvl-dove-2.6.32/drivers/message/fusion/mptscsih.c
@@ -792,11 +792,36 @@
 			 *  precedence!
 			 */
 			sc->result = (DID_OK << 16) | scsi_status;
-			if (scsi_state & MPI_SCSI_STATE_AUTOSENSE_VALID) {
-				/* Have already saved the status and sense data
+			if (!(scsi_state & MPI_SCSI_STATE_AUTOSENSE_VALID)) {
+
+				/*
+				 * For an Errata on LSI53C1030
+				 * When the length of request data
+				 * and transfer data are different
+				 * with result of command (READ or VERIFY),
+				 * DID_SOFT_ERROR is set.
 				 */
-				;
-			} else {
+				if (ioc->bus_type == SPI) {
+					if (pScsiReq->CDB[0] == READ_6  ||
+					    pScsiReq->CDB[0] == READ_10 ||
+					    pScsiReq->CDB[0] == READ_12 ||
+					    pScsiReq->CDB[0] == READ_16 ||
+					    pScsiReq->CDB[0] == VERIFY  ||
+					    pScsiReq->CDB[0] == VERIFY_16) {
+						if (scsi_bufflen(sc) !=
+							xfer_cnt) {
+							sc->result =
+							DID_SOFT_ERROR << 16;
+						    printk(KERN_WARNING "Errata"
+						    "on LSI53C1030 occurred."
+						    "sc->req_bufflen=0x%02x,"
+						    "xfer_cnt=0x%02x\n",
+						    scsi_bufflen(sc),
+						    xfer_cnt);
+						}
+					}
+				}
+
 				if (xfer_cnt < sc->underflow) {
 					if (scsi_status == SAM_STAT_BUSY)
 						sc->result = SAM_STAT_BUSY;
@@ -835,7 +860,58 @@
 			sc->result = (DID_OK << 16) | scsi_status;
 			if (scsi_state == 0) {
 				;
-			} else if (scsi_state & MPI_SCSI_STATE_AUTOSENSE_VALID) {
+			} else if (scsi_state &
+			    MPI_SCSI_STATE_AUTOSENSE_VALID) {
+
+				/*
+				 * For potential trouble on LSI53C1030.
+				 * (date:2007.xx.)
+				 * It is checked whether the length of
+				 * request data is equal to
+				 * the length of transfer and residual.
+				 * MEDIUM_ERROR is set by incorrect data.
+				 */
+				if ((ioc->bus_type == SPI) &&
+					(sc->sense_buffer[2] & 0x20)) {
+					u32	 difftransfer;
+					difftransfer =
+					sc->sense_buffer[3] << 24 |
+					sc->sense_buffer[4] << 16 |
+					sc->sense_buffer[5] << 8 |
+					sc->sense_buffer[6];
+					if (((sc->sense_buffer[3] & 0x80) ==
+						0x80) && (scsi_bufflen(sc)
+						!= xfer_cnt)) {
+						sc->sense_buffer[2] =
+						    MEDIUM_ERROR;
+						sc->sense_buffer[12] = 0xff;
+						sc->sense_buffer[13] = 0xff;
+						printk(KERN_WARNING"Errata"
+						"on LSI53C1030 occurred."
+						"sc->req_bufflen=0x%02x,"
+						"xfer_cnt=0x%02x\n" ,
+						scsi_bufflen(sc),
+						xfer_cnt);
+					}
+					if (((sc->sense_buffer[3] & 0x80)
+						!= 0x80) &&
+						(scsi_bufflen(sc) !=
+						xfer_cnt + difftransfer)) {
+						sc->sense_buffer[2] =
+							MEDIUM_ERROR;
+						sc->sense_buffer[12] = 0xff;
+						sc->sense_buffer[13] = 0xff;
+						printk(KERN_WARNING
+						"Errata on LSI53C1030 occurred"
+						"sc->req_bufflen=0x%02x,"
+						" xfer_cnt=0x%02x,"
+						"difftransfer=0x%02x\n",
+						scsi_bufflen(sc),
+						xfer_cnt,
+						difftransfer);
+					}
+				}
+
 				/*
 				 * If running against circa 200003dd 909 MPT f/w,
 				 * may get this (AUTOSENSE_VALID) for actual TASK_SET_FULL
@@ -1720,7 +1796,7 @@
 		dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT "task abort: "
 		   "Command not in the active list! (sc=%p)\n", ioc->name,
 		   SCpnt));
-		retval = 0;
+		retval = SUCCESS;
 		goto out;
 	}
 
@@ -1759,8 +1835,9 @@
 	}
 
  out:
-	printk(MYIOC_s_INFO_FMT "task abort: %s (sc=%p)\n",
-	    ioc->name, ((retval == SUCCESS) ? "SUCCESS" : "FAILED"), SCpnt);
+	printk(MYIOC_s_INFO_FMT "task abort: %s (rv=%04x) (sc=%p) (sn=%ld)\n",
+	    ioc->name, ((retval == SUCCESS) ? "SUCCESS" : "FAILED"), retval,
+	    SCpnt, SCpnt->serial_number);
 
 	return retval;
 }
@@ -1797,7 +1874,7 @@
 
 	vdevice = SCpnt->device->hostdata;
 	if (!vdevice || !vdevice->vtarget) {
-		retval = SUCCESS;
+		retval = 0;
 		goto out;
 	}
 
@@ -2363,6 +2440,8 @@
 		ioc->name,sdev->tagged_supported, sdev->simple_tags,
 		sdev->ordered_tags));
 
+	blk_queue_dma_alignment (sdev->request_queue, 512 - 1);
+
 	return 0;
 }
 
--- linux-mvl-dove-2.6.32.orig/drivers/message/fusion/mptbase.c
+++ linux-mvl-dove-2.6.32/drivers/message/fusion/mptbase.c
@@ -3232,6 +3232,16 @@
 	pfacts->IOCStatus = le16_to_cpu(pfacts->IOCStatus);
 	pfacts->IOCLogInfo = le32_to_cpu(pfacts->IOCLogInfo);
 	pfacts->MaxDevices = le16_to_cpu(pfacts->MaxDevices);
+	/*
+	 * VMware emulation is broken, its PortFact's MaxDevices reports value
+	 * programmed by IOC Init, so if you program IOC Init to 256 (which is 0,
+	 * as that field is only 8 bit), it reports back 0 in port facts, instead
+	 * of 256...  And unfortunately using 256 triggers another bug in the
+	 * code (parallel SCSI can have only 16 devices).
+	 */
+	if (pfacts->MaxDevices == 0) {
+	   pfacts->MaxDevices = 16;
+	}
 	pfacts->PortSCSIID = le16_to_cpu(pfacts->PortSCSIID);
 	pfacts->ProtocolFlags = le16_to_cpu(pfacts->ProtocolFlags);
 	pfacts->MaxPostedCmdBuffers = le16_to_cpu(pfacts->MaxPostedCmdBuffers);
@@ -4330,6 +4340,8 @@
 
 	if (ioc->bus_type == SPI)
 		num_chain *= MPT_SCSI_CAN_QUEUE;
+	else if (ioc->bus_type == SAS)
+		num_chain *= MPT_SAS_CAN_QUEUE;
 	else
 		num_chain *= MPT_FC_CAN_QUEUE;
 
--- linux-mvl-dove-2.6.32.orig/drivers/message/fusion/mptctl.c
+++ linux-mvl-dove-2.6.32/drivers/message/fusion/mptctl.c
@@ -577,6 +577,13 @@
 }
 
 static int
+mptctl_release(struct inode *inode, struct file *filep)
+{
+	fasync_helper(-1, filep, 0, &async_queue);
+	return 0;
+}
+
+static int
 mptctl_fasync(int fd, struct file *filep, int mode)
 {
 	MPT_ADAPTER	*ioc;
@@ -621,11 +628,8 @@
 	 */
 	iocnumX = khdr.iocnum & 0xFF;
 	if (((iocnum = mpt_verify_adapter(iocnumX, &iocp)) < 0) ||
-	    (iocp == NULL)) {
-		printk(KERN_DEBUG MYNAM "%s::mptctl_ioctl() @%d - ioc%d not found!\n",
-				__FILE__, __LINE__, iocnumX);
+	    (iocp == NULL))
 		return -ENODEV;
-	}
 
 	if (!iocp->active) {
 		printk(KERN_DEBUG MYNAM "%s::mptctl_ioctl() @%d - Controller disabled.\n",
@@ -2781,6 +2785,7 @@
 	.llseek =	no_llseek,
 	.fasync = 	mptctl_fasync,
 	.unlocked_ioctl = mptctl_ioctl,
+	.release =	mptctl_release,
 #ifdef CONFIG_COMPAT
 	.compat_ioctl = compat_mpctl_ioctl,
 #endif
--- linux-mvl-dove-2.6.32.orig/drivers/s390/crypto/zcrypt_pcixcc.c
+++ linux-mvl-dove-2.6.32/drivers/s390/crypto/zcrypt_pcixcc.c
@@ -462,6 +462,8 @@
 		}
 		if (service_rc == 12 && service_rs == 769)
 			return -EINVAL;
+		if (service_rc == 8 && service_rs == 72)
+			return -EINVAL;
 		zdev->online = 0;
 		return -EAGAIN;	/* repeat the request on a different device. */
 	}
--- linux-mvl-dove-2.6.32.orig/drivers/s390/crypto/zcrypt_pcicc.c
+++ linux-mvl-dove-2.6.32/drivers/s390/crypto/zcrypt_pcicc.c
@@ -373,6 +373,8 @@
 			zdev->max_mod_size = PCICC_MAX_MOD_SIZE_OLD;
 			return -EAGAIN;
 		}
+		if (service_rc == 8 && service_rs == 72)
+			return -EINVAL;
 		zdev->online = 0;
 		return -EAGAIN;	/* repeat the request on a different device. */
 	}
--- linux-mvl-dove-2.6.32.orig/drivers/s390/block/dasd_int.h
+++ linux-mvl-dove-2.6.32/drivers/s390/block/dasd_int.h
@@ -108,6 +108,16 @@
 			    d_data); \
 } while(0)
 
+#define DBF_EVENT_DEVID(d_level, d_cdev, d_str, d_data...)	\
+do { \
+	struct ccw_dev_id __dev_id;			\
+	ccw_device_get_id(d_cdev, &__dev_id);		\
+	debug_sprintf_event(dasd_debug_area,		\
+			    d_level,					\
+			    "0.%x.%04x " d_str "\n",			\
+			    __dev_id.ssid, __dev_id.devno, d_data);	\
+} while (0)
+
 #define DBF_EXC(d_level, d_str, d_data...)\
 do { \
 	debug_sprintf_exception(dasd_debug_area, \
--- linux-mvl-dove-2.6.32.orig/drivers/s390/block/dasd_proc.c
+++ linux-mvl-dove-2.6.32/drivers/s390/block/dasd_proc.c
@@ -71,7 +71,7 @@
 	/* Print device number. */
 	seq_printf(m, "%s", dev_name(&device->cdev->dev));
 	/* Print discipline string. */
-	if (device != NULL && device->discipline != NULL)
+	if (device->discipline != NULL)
 		seq_printf(m, "(%s)", device->discipline->name);
 	else
 		seq_printf(m, "(none)");
@@ -91,10 +91,7 @@
 	substr = (device->features & DASD_FEATURE_READONLY) ? "(ro)" : " ";
 	seq_printf(m, "%4s: ", substr);
 	/* Print device status information. */
-	switch ((device != NULL) ? device->state : -1) {
-	case -1:
-		seq_printf(m, "unknown");
-		break;
+	switch (device->state) {
 	case DASD_STATE_NEW:
 		seq_printf(m, "new");
 		break;
--- linux-mvl-dove-2.6.32.orig/drivers/s390/block/dasd_fba.c
+++ linux-mvl-dove-2.6.32/drivers/s390/block/dasd_fba.c
@@ -141,9 +141,8 @@
 	}
 	block = dasd_alloc_block();
 	if (IS_ERR(block)) {
-		DBF_EVENT(DBF_WARNING, "could not allocate dasd block "
-			  "structure for device: %s",
-			  dev_name(&device->cdev->dev));
+		DBF_EVENT_DEVID(DBF_WARNING, cdev, "%s", "could not allocate "
+				"dasd block structure");
 		device->private = NULL;
 		kfree(private);
 		return PTR_ERR(block);
@@ -155,9 +154,8 @@
 	rc = dasd_generic_read_dev_chars(device, DASD_FBA_MAGIC,
 					 &private->rdc_data, 32);
 	if (rc) {
-		DBF_EVENT(DBF_WARNING, "Read device characteristics returned "
-			  "error %d for device: %s",
-			  rc, dev_name(&device->cdev->dev));
+		DBF_EVENT_DEVID(DBF_WARNING, cdev, "Read device "
+				"characteristics returned error %d", rc);
 		device->block = NULL;
 		dasd_free_block(block);
 		device->private = NULL;
--- linux-mvl-dove-2.6.32.orig/drivers/s390/block/dasd_ioctl.c
+++ linux-mvl-dove-2.6.32/drivers/s390/block/dasd_ioctl.c
@@ -260,7 +260,7 @@
 	struct ccw_dev_id dev_id;
 
 	base = block->base;
-	if (!base->discipline->fill_info)
+	if (!base->discipline || !base->discipline->fill_info)
 		return -EINVAL;
 
 	dasd_info = kzalloc(sizeof(struct dasd_information2_t), GFP_KERNEL);
@@ -303,10 +303,7 @@
 	dasd_info->features |=
 		((base->features & DASD_FEATURE_READONLY) != 0);
 
-	if (base->discipline)
-		memcpy(dasd_info->type, base->discipline->name, 4);
-	else
-		memcpy(dasd_info->type, "none", 4);
+	memcpy(dasd_info->type, base->discipline->name, 4);
 
 	if (block->request_queue->request_fn) {
 		struct list_head *l;
--- linux-mvl-dove-2.6.32.orig/drivers/s390/block/dasd.c
+++ linux-mvl-dove-2.6.32/drivers/s390/block/dasd.c
@@ -994,10 +994,9 @@
 		return;
 	cqr = (struct dasd_ccw_req *) intparm;
 	if (cqr->status != DASD_CQR_IN_IO) {
-		DBF_EVENT(DBF_DEBUG,
-			"invalid status in handle_killed_request: "
-			"bus_id %s, status %02x",
-			dev_name(&cdev->dev), cqr->status);
+		DBF_EVENT_DEVID(DBF_DEBUG, cdev,
+				"invalid status in handle_killed_request: "
+				"%02x", cqr->status);
 		return;
 	}
 
@@ -1005,8 +1004,8 @@
 	if (device == NULL ||
 	    device != dasd_device_from_cdev_locked(cdev) ||
 	    strncmp(device->discipline->ebcname, (char *) &cqr->magic, 4)) {
-		DBF_DEV_EVENT(DBF_DEBUG, device, "invalid device in request: "
-			      "bus_id %s", dev_name(&cdev->dev));
+		DBF_EVENT_DEVID(DBF_DEBUG, cdev, "%s",
+				"invalid device in request");
 		return;
 	}
 
@@ -1045,12 +1044,13 @@
 		case -EIO:
 			break;
 		case -ETIMEDOUT:
-			DBF_EVENT(DBF_WARNING, "%s(%s): request timed out\n",
-			       __func__, dev_name(&cdev->dev));
+			DBF_EVENT_DEVID(DBF_WARNING, cdev, "%s: "
+					"request timed out\n", __func__);
 			break;
 		default:
-			DBF_EVENT(DBF_WARNING, "%s(%s): unknown error %ld\n",
-			       __func__, dev_name(&cdev->dev), PTR_ERR(irb));
+			DBF_EVENT_DEVID(DBF_WARNING, cdev, "%s: "
+					"unknown error %ld\n", __func__,
+					PTR_ERR(irb));
 		}
 		dasd_handle_killed_request(cdev, intparm);
 		return;
@@ -1078,8 +1078,8 @@
 	device = (struct dasd_device *) cqr->startdev;
 	if (!device ||
 	    strncmp(device->discipline->ebcname, (char *) &cqr->magic, 4)) {
-		DBF_DEV_EVENT(DBF_DEBUG, device, "invalid device in request: "
-			      "bus_id %s", dev_name(&cdev->dev));
+		DBF_EVENT_DEVID(DBF_DEBUG, cdev, "%s",
+				"invalid device in request");
 		return;
 	}
 
@@ -2217,9 +2217,9 @@
 	}
 	ret = dasd_add_sysfs_files(cdev);
 	if (ret) {
-		DBF_EVENT(DBF_WARNING,
-		       "dasd_generic_probe: could not add sysfs entries "
-		       "for %s\n", dev_name(&cdev->dev));
+		DBF_EVENT_DEVID(DBF_WARNING, cdev, "%s",
+				"dasd_generic_probe: could not add "
+				"sysfs entries");
 		return ret;
 	}
 	cdev->handler = &dasd_int_handler;
--- linux-mvl-dove-2.6.32.orig/drivers/s390/block/dasd_eckd.c
+++ linux-mvl-dove-2.6.32/drivers/s390/block/dasd_eckd.c
@@ -63,7 +63,7 @@
 static struct ccw_device_id dasd_eckd_ids[] = {
 	{ CCW_DEVICE_DEVTYPE (0x3990, 0, 0x3390, 0), .driver_info = 0x1},
 	{ CCW_DEVICE_DEVTYPE (0x2105, 0, 0x3390, 0), .driver_info = 0x2},
-	{ CCW_DEVICE_DEVTYPE (0x3880, 0, 0x3390, 0), .driver_info = 0x3},
+	{ CCW_DEVICE_DEVTYPE (0x3880, 0, 0x3380, 0), .driver_info = 0x3},
 	{ CCW_DEVICE_DEVTYPE (0x3990, 0, 0x3380, 0), .driver_info = 0x4},
 	{ CCW_DEVICE_DEVTYPE (0x2105, 0, 0x3380, 0), .driver_info = 0x5},
 	{ CCW_DEVICE_DEVTYPE (0x9343, 0, 0x9345, 0), .driver_info = 0x6},
@@ -88,9 +88,9 @@
 	/* set ECKD specific ccw-device options */
 	ret = ccw_device_set_options(cdev, CCWDEV_ALLOW_FORCE);
 	if (ret) {
-		DBF_EVENT(DBF_WARNING,
-		       "dasd_eckd_probe: could not set ccw-device options "
-		       "for %s\n", dev_name(&cdev->dev));
+		DBF_EVENT_DEVID(DBF_WARNING, cdev, "%s",
+				"dasd_eckd_probe: could not set "
+				"ccw-device options");
 		return ret;
 	}
 	ret = dasd_generic_probe(cdev, &dasd_eckd_discipline);
@@ -885,16 +885,15 @@
 			rc = dasd_eckd_read_conf_lpm(device, &conf_data,
 						     &conf_len, lpm);
 			if (rc && rc != -EOPNOTSUPP) {	/* -EOPNOTSUPP is ok */
-				DBF_EVENT(DBF_WARNING,
+				DBF_EVENT_DEVID(DBF_WARNING, device->cdev,
 					  "Read configuration data returned "
-					  "error %d for device: %s", rc,
-					  dev_name(&device->cdev->dev));
+					  "error %d", rc);
 				return rc;
 			}
 			if (conf_data == NULL) {
-				DBF_EVENT(DBF_WARNING, "No configuration "
-					  "data retrieved for device: %s",
-					  dev_name(&device->cdev->dev));
+				DBF_EVENT_DEVID(DBF_WARNING, device->cdev, "%s",
+						"No configuration data "
+						"retrieved");
 				continue;	/* no error */
 			}
 			/* save first valid configuration data */
@@ -941,9 +940,8 @@
 				    sizeof(struct dasd_rssd_features)),
 				   device);
 	if (IS_ERR(cqr)) {
-		DBF_EVENT(DBF_WARNING, "Could not allocate initialization "
-			  "request for device: %s",
-			  dev_name(&device->cdev->dev));
+		DBF_EVENT_DEVID(DBF_WARNING, device->cdev, "%s", "Could not "
+				"allocate initialization request");
 		return PTR_ERR(cqr);
 	}
 	cqr->startdev = device;
@@ -1071,10 +1069,8 @@
 	/* may be requested feature is not available on server,
 	 * therefore just report error and go ahead */
 	private = (struct dasd_eckd_private *) device->private;
-	DBF_EVENT(DBF_WARNING, "PSF-SSC on storage subsystem %s.%s.%04x "
-		  "returned rc=%d for device: %s",
-		  private->uid.vendor, private->uid.serial,
-		  private->uid.ssid, rc, dev_name(&device->cdev->dev));
+	DBF_EVENT_DEVID(DBF_WARNING, device->cdev, "PSF-SSC for SSID %04x "
+			"returned rc=%d", private->uid.ssid, rc);
 	/* RE-Read Configuration Data */
 	return dasd_eckd_read_conf(device);
 }
@@ -1123,9 +1119,9 @@
 	if (private->uid.type == UA_BASE_DEVICE) {
 		block = dasd_alloc_block();
 		if (IS_ERR(block)) {
-			DBF_EVENT(DBF_WARNING, "could not allocate dasd "
-				  "block structure for device: %s",
-				  dev_name(&device->cdev->dev));
+			DBF_EVENT_DEVID(DBF_WARNING, device->cdev, "%s",
+					"could not allocate dasd "
+					"block structure");
 			rc = PTR_ERR(block);
 			goto out_err1;
 		}
@@ -1153,9 +1149,8 @@
 	rc = dasd_generic_read_dev_chars(device, DASD_ECKD_MAGIC,
 					 &private->rdc_data, 64);
 	if (rc) {
-		DBF_EVENT(DBF_WARNING,
-			  "Read device characteristics failed, rc=%d for "
-			  "device: %s", rc, dev_name(&device->cdev->dev));
+		DBF_EVENT_DEVID(DBF_WARNING, device->cdev,
+				"Read device characteristic failed, rc=%d", rc);
 		goto out_err3;
 	}
 	/* find the vaild cylinder size */
@@ -2980,7 +2975,7 @@
 	len += sprintf(page + len, KERN_ERR PRINTK_HEADER
 		       " in req: %p CS: 0x%02X DS: 0x%02X CC: 0x%02X RC: %d\n",
 		       req, scsw_cstat(&irb->scsw), scsw_dstat(&irb->scsw),
-		       scsw_cc(&irb->scsw), req->intrc);
+		       scsw_cc(&irb->scsw), req ? req->intrc : 0);
 	len += sprintf(page + len, KERN_ERR PRINTK_HEADER
 		       " device %s: Failing CCW: %p\n",
 		       dev_name(&device->cdev->dev),
@@ -3253,9 +3248,8 @@
 	rc = dasd_generic_read_dev_chars(device, DASD_ECKD_MAGIC,
 					 &temp_rdc_data, 64);
 	if (rc) {
-		DBF_EVENT(DBF_WARNING,
-			  "Read device characteristics failed, rc=%d for "
-			  "device: %s", rc, dev_name(&device->cdev->dev));
+		DBF_EVENT_DEVID(DBF_WARNING, device->cdev,
+				"Read device characteristic failed, rc=%d", rc);
 		goto out_err;
 	}
 	spin_lock_irqsave(get_ccwdev_lock(device->cdev), flags);
--- linux-mvl-dove-2.6.32.orig/drivers/s390/block/dasd_diag.c
+++ linux-mvl-dove-2.6.32/drivers/s390/block/dasd_diag.c
@@ -145,6 +145,15 @@
 
 	mdsk_term_io(device);
 	rc = mdsk_init_io(device, device->block->bp_block, 0, NULL);
+	if (rc == 4) {
+		if (!(device->features & DASD_FEATURE_READONLY)) {
+			dev_warn(&device->cdev->dev,
+				 "The access mode of a DIAG device changed"
+				 " to read-only");
+			device->features |= DASD_FEATURE_READONLY;
+		}
+		rc = 0;
+	}
 	if (rc)
 		dev_warn(&device->cdev->dev, "DIAG ERP failed with "
 			    "rc=%d\n", rc);
@@ -433,16 +442,20 @@
 	for (sb = 512; sb < bsize; sb = sb << 1)
 		block->s2b_shift++;
 	rc = mdsk_init_io(device, block->bp_block, 0, NULL);
-	if (rc) {
+	if (rc && (rc != 4)) {
 		dev_warn(&device->cdev->dev, "DIAG initialization "
 			"failed with rc=%d\n", rc);
 		rc = -EIO;
 	} else {
+		if (rc == 4)
+			device->features |= DASD_FEATURE_READONLY;
 		dev_info(&device->cdev->dev,
-			 "New DASD with %ld byte/block, total size %ld KB\n",
+			 "New DASD with %ld byte/block, total size %ld KB%s\n",
 			 (unsigned long) block->bp_block,
 			 (unsigned long) (block->blocks <<
-					  block->s2b_shift) >> 1);
+					  block->s2b_shift) >> 1,
+			 (rc == 4) ? ", read-only device" : "");
+		rc = 0;
 	}
 out_label:
 	free_page((long) label);
--- linux-mvl-dove-2.6.32.orig/drivers/s390/char/keyboard.c
+++ linux-mvl-dove-2.6.32/drivers/s390/char/keyboard.c
@@ -462,7 +462,8 @@
 	  unsigned int cmd, unsigned long arg)
 {
 	void __user *argp;
-	int ct, perm;
+	unsigned int ct;
+	int perm;
 
 	argp = (void __user *)arg;
 
--- linux-mvl-dove-2.6.32.orig/drivers/s390/cio/device_fsm.c
+++ linux-mvl-dove-2.6.32/drivers/s390/cio/device_fsm.c
@@ -1080,14 +1080,14 @@
 		ccw_device_start_id(cdev, 0);
 }
 
-static void
-ccw_device_offline_irq(struct ccw_device *cdev, enum dev_event dev_event)
+static void ccw_device_disabled_irq(struct ccw_device *cdev,
+				    enum dev_event dev_event)
 {
 	struct subchannel *sch;
 
 	sch = to_subchannel(cdev->dev.parent);
 	/*
-	 * An interrupt in state offline means a previous disable was not
+	 * An interrupt in a disabled state means a previous disable was not
 	 * successful - should not happen, but we try to disable again.
 	 */
 	cio_disable_subchannel(sch);
@@ -1150,25 +1150,12 @@
 }
 
 /*
- * Bug operation action. 
- */
-static void
-ccw_device_bug(struct ccw_device *cdev, enum dev_event dev_event)
-{
-	CIO_MSG_EVENT(0, "Internal state [%i][%i] not handled for device "
-		      "0.%x.%04x\n", cdev->private->state, dev_event,
-		      cdev->private->dev_id.ssid,
-		      cdev->private->dev_id.devno);
-	BUG();
-}
-
-/*
  * device statemachine
  */
 fsm_func_t *dev_jumptable[NR_DEV_STATES][NR_DEV_EVENTS] = {
 	[DEV_STATE_NOT_OPER] = {
 		[DEV_EVENT_NOTOPER]	= ccw_device_nop,
-		[DEV_EVENT_INTERRUPT]	= ccw_device_bug,
+		[DEV_EVENT_INTERRUPT]	= ccw_device_disabled_irq,
 		[DEV_EVENT_TIMEOUT]	= ccw_device_nop,
 		[DEV_EVENT_VERIFY]	= ccw_device_nop,
 	},
@@ -1186,7 +1173,7 @@
 	},
 	[DEV_STATE_OFFLINE] = {
 		[DEV_EVENT_NOTOPER]	= ccw_device_generic_notoper,
-		[DEV_EVENT_INTERRUPT]	= ccw_device_offline_irq,
+		[DEV_EVENT_INTERRUPT]	= ccw_device_disabled_irq,
 		[DEV_EVENT_TIMEOUT]	= ccw_device_nop,
 		[DEV_EVENT_VERIFY]	= ccw_device_offline_verify,
 	},
@@ -1243,7 +1230,7 @@
 	[DEV_STATE_DISCONNECTED] = {
 		[DEV_EVENT_NOTOPER]	= ccw_device_nop,
 		[DEV_EVENT_INTERRUPT]	= ccw_device_start_id,
-		[DEV_EVENT_TIMEOUT]	= ccw_device_bug,
+		[DEV_EVENT_TIMEOUT]	= ccw_device_nop,
 		[DEV_EVENT_VERIFY]	= ccw_device_start_id,
 	},
 	[DEV_STATE_DISCONNECTED_SENSE_ID] = {
--- linux-mvl-dove-2.6.32.orig/drivers/s390/cio/device.c
+++ linux-mvl-dove-2.6.32/drivers/s390/cio/device.c
@@ -1292,7 +1292,7 @@
 	sch->private = kzalloc(sizeof(struct io_subchannel_private),
 			       GFP_KERNEL | GFP_DMA);
 	if (!sch->private)
-		goto out_err;
+		goto out_schedule;
 	/*
 	 * First check if a fitting device may be found amongst the
 	 * disconnected devices or in the orphanage.
@@ -1317,7 +1317,7 @@
 	}
 	cdev = io_subchannel_create_ccwdev(sch);
 	if (IS_ERR(cdev))
-		goto out_err;
+		goto out_schedule;
 	rc = io_subchannel_recog(cdev, sch);
 	if (rc) {
 		spin_lock_irqsave(sch->lock, flags);
@@ -1325,9 +1325,7 @@
 		spin_unlock_irqrestore(sch->lock, flags);
 	}
 	return 0;
-out_err:
-	kfree(sch->private);
-	sysfs_remove_group(&sch->dev.kobj, &io_subchannel_attr_group);
+
 out_schedule:
 	io_subchannel_schedule_removal(sch);
 	return 0;
@@ -1341,13 +1339,14 @@
 
 	cdev = sch_get_cdev(sch);
 	if (!cdev)
-		return 0;
+		goto out_free;
 	/* Set ccw device to not operational and drop reference. */
 	spin_lock_irqsave(cdev->ccwlock, flags);
 	sch_set_cdev(sch, NULL);
 	cdev->private->state = DEV_STATE_NOT_OPER;
 	spin_unlock_irqrestore(cdev->ccwlock, flags);
 	ccw_device_unregister(cdev);
+out_free:
 	kfree(sch->private);
 	sysfs_remove_group(&sch->dev.kobj, &io_subchannel_attr_group);
 	return 0;
--- linux-mvl-dove-2.6.32.orig/drivers/s390/cio/cio.c
+++ linux-mvl-dove-2.6.32/drivers/s390/cio/cio.c
@@ -618,6 +618,7 @@
 	old_regs = set_irq_regs(regs);
 	s390_idle_check();
 	irq_enter();
+	__get_cpu_var(s390_idle).nohz_delay = 1;
 	if (S390_lowcore.int_clock >= S390_lowcore.clock_comparator)
 		/* Serve timer interrupts first. */
 		clock_comparator_work();
--- linux-mvl-dove-2.6.32.orig/drivers/s390/net/netiucv.c
+++ linux-mvl-dove-2.6.32/drivers/s390/net/netiucv.c
@@ -741,13 +741,13 @@
 	if (single_flag) {
 		if ((skb = skb_dequeue(&conn->commit_queue))) {
 			atomic_dec(&skb->users);
-			dev_kfree_skb_any(skb);
 			if (privptr) {
 				privptr->stats.tx_packets++;
 				privptr->stats.tx_bytes +=
 					(skb->len - NETIUCV_HDRLEN
-					 	  - NETIUCV_HDRLEN);
+						  - NETIUCV_HDRLEN);
 			}
+			dev_kfree_skb_any(skb);
 		}
 	}
 	conn->tx_buff->data = conn->tx_buff->head;
--- linux-mvl-dove-2.6.32.orig/drivers/staging/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/staging/Kconfig
@@ -81,8 +81,6 @@
 
 source "drivers/staging/rtl8192e/Kconfig"
 
-source "drivers/staging/mimio/Kconfig"
-
 source "drivers/staging/frontier/Kconfig"
 
 source "drivers/staging/android/Kconfig"
@@ -101,7 +99,7 @@
 
 source "drivers/staging/line6/Kconfig"
 
-source "drivers/gpu/drm/radeon/Kconfig"
+source "drivers/gpu/drm/nouveau/Kconfig"
 
 source "drivers/staging/octeon/Kconfig"
 
--- linux-mvl-dove-2.6.32.orig/drivers/staging/Makefile
+++ linux-mvl-dove-2.6.32/drivers/staging/Makefile
@@ -5,10 +5,10 @@
 
 obj-$(CONFIG_ET131X)		+= et131x/
 obj-$(CONFIG_SLICOSS)		+= slicoss/
-obj-$(CONFIG_VIDEO_GO7007)	+= go7007/
+#obj-$(CONFIG_VIDEO_GO7007)	+= go7007/
 obj-$(CONFIG_VIDEO_CX25821)	+= cx25821/
 obj-$(CONFIG_USB_IP_COMMON)	+= usbip/
-obj-$(CONFIG_W35UND)		+= winbond/
+#obj-$(CONFIG_W35UND)		+= winbond/
 obj-$(CONFIG_PRISM2_USB)	+= wlan-ng/
 obj-$(CONFIG_ECHO)		+= echo/
 obj-$(CONFIG_POCH)		+= poch/
@@ -23,10 +23,9 @@
 obj-$(CONFIG_RTL8187SE)		+= rtl8187se/
 obj-$(CONFIG_RTL8192SU)		+= rtl8192su/
 obj-$(CONFIG_RTL8192E)		+= rtl8192e/
-obj-$(CONFIG_INPUT_MIMIO)	+= mimio/
 obj-$(CONFIG_TRANZPORT)		+= frontier/
-obj-$(CONFIG_ANDROID)		+= android/
-obj-$(CONFIG_ANDROID)		+= dream/
+#obj-$(CONFIG_ANDROID)		+= android/
+#obj-$(CONFIG_ANDROID)		+= dream/
 obj-$(CONFIG_DST)		+= dst/
 obj-$(CONFIG_POHMELFS)		+= pohmelfs/
 obj-$(CONFIG_B3DFG)		+= b3dfg/
--- linux-mvl-dove-2.6.32.orig/drivers/staging/rtl8192su/r8192S_firmware.c
+++ linux-mvl-dove-2.6.32/drivers/staging/rtl8192su/r8192S_firmware.c
@@ -68,6 +68,11 @@
 
 		/* Allocate skb buffer to contain firmware info and tx descriptor info. */
 		skb  = dev_alloc_skb(frag_length);
+		if (skb == NULL) {
+			RT_TRACE(COMP_ERR, "(%s): unable to alloc skb buffer\n",
+								__func__);
+			goto cmdsend_downloadcode_fail;
+		}
 		memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
 
 		tcb_desc = (cb_desc*)(skb->cb + MAX_DEV_ADDR_SIZE);
--- linux-mvl-dove-2.6.32.orig/drivers/staging/rtl8192su/r8192U_core.c
+++ linux-mvl-dove-2.6.32/drivers/staging/rtl8192su/r8192U_core.c
@@ -25,6 +25,7 @@
  */
 
 #include <linux/vmalloc.h>
+#include <linux/notifier.h>
 
 #undef LOOP_TEST
 #undef DUMP_RX
@@ -111,23 +112,30 @@
 #define CAM_CONTENT_COUNT 8
 
 static struct usb_device_id rtl8192_usb_id_tbl[] = {
-	/* Realtek */
-	{USB_DEVICE(0x0bda, 0x8192)},
-	{USB_DEVICE(0x0bda, 0x8709)},
-	/* Corega */
-	{USB_DEVICE(0x07aa, 0x0043)},
-	/* Belkin */
-	{USB_DEVICE(0x050d, 0x805E)},
-	/* Sitecom */
-	{USB_DEVICE(0x0df6, 0x0031)},
-	/* EnGenius */
-	{USB_DEVICE(0x1740, 0x9201)},
-	/* Dlink */
-	{USB_DEVICE(0x2001, 0x3301)},
-	/* Zinwell */
-	{USB_DEVICE(0x5a57, 0x0290)},
-	//92SU
+	{USB_DEVICE(0x0bda, 0x8171)}, /* Realtek */
 	{USB_DEVICE(0x0bda, 0x8172)},
+	{USB_DEVICE(0x0bda, 0x8173)},
+	{USB_DEVICE(0x0bda, 0x8174)},
+	{USB_DEVICE(0x0bda, 0x8712)},
+	{USB_DEVICE(0x0bda, 0x8713)},
+	{USB_DEVICE(0x07aa, 0x0047)},
+	{USB_DEVICE(0x07d1, 0x3303)},
+	{USB_DEVICE(0x07d1, 0x3302)},
+	{USB_DEVICE(0x07d1, 0x3300)},
+	{USB_DEVICE(0x1740, 0x9603)},
+	{USB_DEVICE(0x1740, 0x9605)},
+	{USB_DEVICE(0x050d, 0x815F)},
+	{USB_DEVICE(0x06f8, 0xe031)},
+	{USB_DEVICE(0x7392, 0x7611)},
+	{USB_DEVICE(0x7392, 0x7612)},
+	{USB_DEVICE(0x7392, 0x7622)},
+	{USB_DEVICE(0x0DF6, 0x0045)},
+	{USB_DEVICE(0x0E66, 0x0015)},
+	{USB_DEVICE(0x0E66, 0x0016)},
+	{USB_DEVICE(0x0b05, 0x1786)},
+	/* these are not in the official list */
+	{USB_DEVICE(0x050d, 0x815F)}, /* Belkin F5D8053 v6 */
+	{USB_DEVICE(0x0df6, 0x004b)}, /* WL-349 */
 	{}
 };
 
@@ -155,6 +163,8 @@
 static int __devinit rtl8192_usb_probe(struct usb_interface *intf,
 			 const struct usb_device_id *id);
 static void __devexit rtl8192_usb_disconnect(struct usb_interface *intf);
+static const struct net_device_ops rtl8192_netdev_ops;
+static struct notifier_block proc_netdev_notifier;
 
 static struct usb_driver rtl8192_usb_driver = {
 	.name		= RTL819xU_MODULE_NAME,	          /* Driver name   */
@@ -954,15 +964,24 @@
 	return len;
 }
 
-void rtl8192_proc_module_init(void)
+int rtl8192_proc_module_init(void)
 {
+	int ret;
+
 	RT_TRACE(COMP_INIT, "Initializing proc filesystem");
 	rtl8192_proc=create_proc_entry(RTL819xU_MODULE_NAME, S_IFDIR, init_net.proc_net);
+	if (!rtl8192_proc)
+		return -ENOMEM;
+	ret = register_netdevice_notifier(&proc_netdev_notifier);
+	if (ret)
+		remove_proc_entry(RTL819xU_MODULE_NAME, init_net.proc_net);
+	return ret;
 }
 
 
 void rtl8192_proc_module_remove(void)
 {
+	unregister_netdevice_notifier(&proc_netdev_notifier);
 	remove_proc_entry(RTL819xU_MODULE_NAME, init_net.proc_net);
 }
 
@@ -990,8 +1009,7 @@
 		remove_proc_entry("registers-e", priv->dir_dev);
 	//	remove_proc_entry("cck-registers",priv->dir_dev);
 	//	remove_proc_entry("ofdm-registers",priv->dir_dev);
-		//remove_proc_entry(dev->name, rtl8192_proc);
-		remove_proc_entry("wlan0", rtl8192_proc);
+		remove_proc_entry(priv->dir_dev->name, rtl8192_proc);
 		priv->dir_dev = NULL;
 	}
 }
@@ -1108,6 +1126,25 @@
 		      dev->name);
 	}
 }
+
+static int proc_netdev_event(struct notifier_block *this,
+			     unsigned long event, void *ptr)
+{
+	struct net_device *net_dev = ptr;
+
+	if (net_dev->netdev_ops == &rtl8192_netdev_ops &&
+	    event == NETDEV_CHANGENAME) {
+		rtl8192_proc_remove_one(net_dev);
+		rtl8192_proc_init_one(net_dev);
+	}
+
+	return NOTIFY_DONE;
+}
+
+static struct notifier_block proc_netdev_notifier = {
+	.notifier_call = proc_netdev_event,
+};
+
 /****************************************************************************
    -----------------------------MISC STUFF-------------------------
 *****************************************************************************/
@@ -7559,35 +7596,63 @@
 	ret = ieee80211_crypto_init();
 	if (ret) {
 		printk(KERN_ERR "ieee80211_crypto_init() failed %d\n", ret);
-		return ret;
+		goto fail_crypto;
 	}
 
 	ret = ieee80211_crypto_tkip_init();
 	if (ret) {
 		printk(KERN_ERR "ieee80211_crypto_tkip_init() failed %d\n",
 			ret);
-		return ret;
+		goto fail_crypto_tkip;
 	}
 
 	ret = ieee80211_crypto_ccmp_init();
 	if (ret) {
 		printk(KERN_ERR "ieee80211_crypto_ccmp_init() failed %d\n",
 			ret);
-		return ret;
+		goto fail_crypto_ccmp;
 	}
 
 	ret = ieee80211_crypto_wep_init();
 	if (ret) {
 		printk(KERN_ERR "ieee80211_crypto_wep_init() failed %d\n", ret);
-		return ret;
+		goto fail_crypto_wep;
 	}
 
 	printk(KERN_INFO "\nLinux kernel driver for RTL8192 based WLAN cards\n");
 	printk(KERN_INFO "Copyright (c) 2007-2008, Realsil Wlan\n");
 	RT_TRACE(COMP_INIT, "Initializing module");
 	RT_TRACE(COMP_INIT, "Wireless extensions version %d", WIRELESS_EXT);
-	rtl8192_proc_module_init();
-	return usb_register(&rtl8192_usb_driver);
+
+	ret = rtl8192_proc_module_init();
+	if (ret) {
+		pr_err("rtl8192_proc_module_init() failed %d\n", ret);
+		goto fail_proc;
+	}
+
+	ret = usb_register(&rtl8192_usb_driver);
+	if (ret) {
+		pr_err("usb_register() failed %d\n", ret);
+		goto fail_usb;
+	}
+
+	return 0;
+
+fail_usb:
+	rtl8192_proc_module_remove();
+fail_proc:
+	ieee80211_crypto_wep_exit();
+fail_crypto_wep:
+	ieee80211_crypto_ccmp_exit();
+fail_crypto_ccmp:
+	ieee80211_crypto_tkip_exit();
+fail_crypto_tkip:
+	ieee80211_crypto_deinit();
+fail_crypto:
+#ifdef CONFIG_IEEE80211_DEBUG
+	ieee80211_debug_exit();
+#endif
+	return ret;
 }
 
 
--- linux-mvl-dove-2.6.32.orig/drivers/staging/rtl8192su/r819xU_cmdpkt.c
+++ linux-mvl-dove-2.6.32/drivers/staging/rtl8192su/r819xU_cmdpkt.c
@@ -56,6 +56,12 @@
 
 	//Get TCB and local buffer from common pool. (It is shared by CmdQ, MgntQ, and USB coalesce DataQ)
 	skb  = dev_alloc_skb(USB_HWDESC_HEADER_LEN + DataLen + 4);
+	if (skb == NULL) {
+		RT_TRACE(COMP_ERR, "(%s): unable to alloc skb buffer\n",
+								__func__);
+		rtStatus = false;
+		return rtStatus;
+	}
 	memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
 	tcb_desc = (cb_desc*)(skb->cb + MAX_DEV_ADDR_SIZE);
 	tcb_desc->queue_index = TXCMD_QUEUE;
--- linux-mvl-dove-2.6.32.orig/drivers/staging/asus_oled/asus_oled.c
+++ linux-mvl-dove-2.6.32/drivers/staging/asus_oled/asus_oled.c
@@ -194,9 +194,11 @@
 {
 	struct usb_interface *intf = to_usb_interface(dev);
 	struct asus_oled_dev *odev = usb_get_intfdata(intf);
-	int temp = strict_strtoul(buf, 10, NULL);
+	unsigned long value;
+	if (strict_strtoul(buf, 10, &value))
+		return -EINVAL;
 
-	enable_oled(odev, temp);
+	enable_oled(odev, value);
 
 	return count;
 }
@@ -207,10 +209,12 @@
 {
 	struct asus_oled_dev *odev =
 		(struct asus_oled_dev *) dev_get_drvdata(device);
+	unsigned long value;
 
-	int temp = strict_strtoul(buf, 10, NULL);
+	if (strict_strtoul(buf, 10, &value))
+		return -EINVAL;
 
-	enable_oled(odev, temp);
+	enable_oled(odev, value);
 
 	return count;
 }
@@ -605,13 +609,13 @@
 
 #define ASUS_OLED_DEVICE_ATTR(_file)		dev_attr_asus_oled_##_file
 
-static DEVICE_ATTR(asus_oled_enabled, S_IWUGO | S_IRUGO,
+static DEVICE_ATTR(asus_oled_enabled, S_IWUSR | S_IRUGO,
 		   get_enabled, set_enabled);
-static DEVICE_ATTR(asus_oled_picture, S_IWUGO , NULL, set_picture);
+static DEVICE_ATTR(asus_oled_picture, S_IWUSR , NULL, set_picture);
 
-static DEVICE_ATTR(enabled, S_IWUGO | S_IRUGO,
+static DEVICE_ATTR(enabled, S_IWUSR | S_IRUGO,
 		   class_get_enabled, class_set_enabled);
-static DEVICE_ATTR(picture, S_IWUGO, NULL, class_set_picture);
+static DEVICE_ATTR(picture, S_IWUSR, NULL, class_set_picture);
 
 static int asus_oled_probe(struct usb_interface *interface,
 			   const struct usb_device_id *id)
--- linux-mvl-dove-2.6.32.orig/drivers/staging/frontier/tranzport.c
+++ linux-mvl-dove-2.6.32/drivers/staging/frontier/tranzport.c
@@ -202,7 +202,7 @@
     t->value = temp;							\
     return count;							\
   }									\
-  static DEVICE_ATTR(value, S_IWUGO | S_IRUGO, show_##value, set_##value);
+  static DEVICE_ATTR(value, S_IWUSR | S_IRUGO, show_##value, set_##value);
 
 show_int(enable);
 show_int(offline);
--- linux-mvl-dove-2.6.32.orig/drivers/staging/android/binder.c
+++ linux-mvl-dove-2.6.32/drivers/staging/android/binder.c
@@ -46,6 +46,7 @@
 static struct binder_node *binder_context_mgr_node;
 static uid_t binder_context_mgr_uid = -1;
 static int binder_last_id;
+static struct workqueue_struct *binder_deferred_workqueue;
 
 static int binder_read_proc_proc(char *page, char **start, off_t off,
 				 int count, int *eof, void *data);
@@ -3099,7 +3100,7 @@
 	if (hlist_unhashed(&proc->deferred_work_node)) {
 		hlist_add_head(&proc->deferred_work_node,
 				&binder_deferred_list);
-		schedule_work(&binder_deferred_work);
+		queue_work(binder_deferred_workqueue, &binder_deferred_work);
 	}
 	mutex_unlock(&binder_deferred_lock);
 }
@@ -3727,6 +3728,10 @@
 {
 	int ret;
 
+	binder_deferred_workqueue = create_singlethread_workqueue("binder");
+	if (!binder_deferred_workqueue)
+		return -ENOMEM;
+
 	binder_proc_dir_entry_root = proc_mkdir("binder", NULL);
 	if (binder_proc_dir_entry_root)
 		binder_proc_dir_entry_proc = proc_mkdir("proc",
--- linux-mvl-dove-2.6.32.orig/drivers/staging/android/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/staging/android/Kconfig
@@ -2,7 +2,6 @@
 
 config ANDROID
 	bool "Android Drivers"
-	depends on BROKEN
 	default N
 	---help---
 	  Enable support for various drivers needed on the Android platform
--- linux-mvl-dove-2.6.32.orig/drivers/staging/android/logger.c
+++ linux-mvl-dove-2.6.32/drivers/staging/android/logger.c
@@ -26,6 +26,7 @@
 #include "logger.h"
 
 #include <asm/ioctls.h>
+#include <linux/sched.h>
 
 /*
  * struct logger_log - represents a specific log, such as 'main' or 'radio'
--- linux-mvl-dove-2.6.32.orig/drivers/staging/android/lowmemorykiller.c
+++ linux-mvl-dove-2.6.32/drivers/staging/android/lowmemorykiller.c
@@ -108,7 +108,7 @@
 			task_unlock(p);
 			continue;
 		}
-		oom_adj = mm->oom_adj;
+		oom_adj = p->signal->oom_adj;
 		if (oom_adj < min_adj) {
 			task_unlock(p);
 			continue;
--- linux-mvl-dove-2.6.32.orig/drivers/staging/rt2860/common/2860_rtmp_init.c
+++ linux-mvl-dove-2.6.32/drivers/staging/rt2860/common/2860_rtmp_init.c
@@ -716,7 +716,7 @@
 	{
 		if ((pAd->RxRing.Cell[index].DmaBuf.AllocVa) && (pAd->RxRing.Cell[index].pNdisPacket))
 		{
-			PCI_UNMAP_SINGLE(pObj->pci_dev, pAd->RxRing.Cell[index].DmaBuf.AllocPa, pAd->RxRing.Cell[index].DmaBuf.AllocSize, PCI_DMA_FROMDEVICE);
+			PCI_UNMAP_SINGLE(pAd, pAd->RxRing.Cell[index].DmaBuf.AllocPa, pAd->RxRing.Cell[index].DmaBuf.AllocSize, PCI_DMA_FROMDEVICE);
 			RELEASE_NDIS_PACKET(pAd, pAd->RxRing.Cell[index].pNdisPacket, NDIS_STATUS_SUCCESS);
 		}
 	}
--- linux-mvl-dove-2.6.32.orig/drivers/staging/rt2870/2870_main_dev.c
+++ linux-mvl-dove-2.6.32/drivers/staging/rt2870/2870_main_dev.c
@@ -142,6 +142,7 @@
 	{ USB_DEVICE(0x7392, 0x7717) }, /* Edimax */
 	{ USB_DEVICE(0x1EDA, 0x2310) }, /* AirTies 3070 */
 	{ USB_DEVICE(0x1737, 0x0077) }, /* Linksys WUSB54GC-EU v3 */
+	{ USB_DEVICE(0x0411, 0x015D) }, /* Buffalo Airstation WLI-UC-GN */
 	{ } /* Terminating entry */
 };
 
--- linux-mvl-dove-2.6.32.orig/drivers/staging/vt6655/device_main.c
+++ linux-mvl-dove-2.6.32/drivers/staging/vt6655/device_main.c
@@ -1089,11 +1089,13 @@
     }
 //2008-07-21-01<Add>by MikeLiu
 //register wpadev
+#if 0
    if(wpa_set_wpadev(pDevice, 1)!=0) {
      printk("Fail to Register WPADEV?\n");
         unregister_netdev(pDevice->dev);
         free_netdev(dev);
    }
+#endif
     device_print_info(pDevice);
     pci_set_drvdata(pcid, pDevice);
     return 0;
--- linux-mvl-dove-2.6.32.orig/drivers/staging/vt6655/wpactl.c
+++ linux-mvl-dove-2.6.32/drivers/staging/vt6655/wpactl.c
@@ -767,9 +767,14 @@
     DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "wpa_ie_len = %d\n", param->u.wpa_associate.wpa_ie_len);
 
 
-	if (param->u.wpa_associate.wpa_ie &&
-	    copy_from_user(&abyWPAIE[0], param->u.wpa_associate.wpa_ie, param->u.wpa_associate.wpa_ie_len))
-	    return -EINVAL;
+	if (param->u.wpa_associate.wpa_ie_len) {
+		if (!param->u.wpa_associate.wpa_ie)
+			return -EINVAL;
+		if (param->u.wpa_associate.wpa_ie_len > sizeof(abyWPAIE))
+			return -EINVAL;
+		if (copy_from_user(&abyWPAIE[0], param->u.wpa_associate.wpa_ie, param->u.wpa_associate.wpa_ie_len))
+			return -EFAULT;
+	}
 
 	if (param->u.wpa_associate.mode == 1)
 	    pMgmt->eConfigMode = WMAC_CONFIG_IBSS_STA;
--- linux-mvl-dove-2.6.32.orig/drivers/staging/pohmelfs/inode.c
+++ linux-mvl-dove-2.6.32/drivers/staging/pohmelfs/inode.c
@@ -143,7 +143,6 @@
 	struct inode *inode = mapping->host;
 	struct pohmelfs_inode *pi = POHMELFS_I(inode);
 	struct pohmelfs_sb *psb = POHMELFS_SB(inode->i_sb);
-	struct backing_dev_info *bdi = mapping->backing_dev_info;
 	int err = 0;
 	int done = 0;
 	int nr_pages;
@@ -152,11 +151,6 @@
 	int scanned = 0;
 	int range_whole = 0;
 
-	if (wbc->nonblocking && bdi_write_congested(bdi)) {
-		wbc->encountered_congestion = 1;
-		return 0;
-	}
-
 	if (wbc->range_cyclic) {
 		index = mapping->writeback_index; /* Start from prev offset */
 		end = -1;
@@ -248,10 +242,6 @@
 
 			if (wbc->nr_to_write <= 0)
 				done = 1;
-			if (wbc->nonblocking && bdi_write_congested(bdi)) {
-				wbc->encountered_congestion = 1;
-				done = 1;
-			}
 
 			continue;
 out_continue:
--- linux-mvl-dove-2.6.32.orig/drivers/staging/hv/Vmbus.c
+++ linux-mvl-dove-2.6.32/drivers/staging/hv/Vmbus.c
@@ -129,7 +129,7 @@
 
 	/* strcpy(dev->name, "vmbus"); */
 	/* SynIC setup... */
-	ret = HvSynicInit(*irqvector);
+	on_each_cpu(HvSynicInit, (void *)irqvector, 1);
 
 	/* Connect to VMBus in the root partition */
 	ret = VmbusConnect();
@@ -150,7 +150,7 @@
 	DPRINT_ENTER(VMBUS);
 	VmbusChannelReleaseUnattachedChannels();
 	VmbusDisconnect();
-	HvSynicCleanup();
+	on_each_cpu(HvSynicCleanup, NULL, 1);
 	DPRINT_EXIT(VMBUS);
 
 	return ret;
@@ -173,7 +173,8 @@
  */
 static void VmbusOnMsgDPC(struct hv_driver *drv)
 {
-	void *page_addr = gHvContext.synICMessagePage[0];
+	int cpu = smp_processor_id();
+	void *page_addr = gHvContext.synICMessagePage[cpu];
 	struct hv_message *msg = (struct hv_message *)page_addr +
 				  VMBUS_MESSAGE_SINT;
 	struct hv_message *copied;
@@ -230,11 +231,12 @@
 static int VmbusOnISR(struct hv_driver *drv)
 {
 	int ret = 0;
+	int cpu = smp_processor_id();
 	void *page_addr;
 	struct hv_message *msg;
 	union hv_synic_event_flags *event;
 
-	page_addr = gHvContext.synICMessagePage[0];
+	page_addr = gHvContext.synICMessagePage[cpu];
 	msg = (struct hv_message *)page_addr + VMBUS_MESSAGE_SINT;
 
 	DPRINT_ENTER(VMBUS);
@@ -248,11 +250,11 @@
 	}
 
 	/* TODO: Check if there are events to be process */
-	page_addr = gHvContext.synICEventPage[0];
+	page_addr = gHvContext.synICEventPage[cpu];
 	event = (union hv_synic_event_flags *)page_addr + VMBUS_MESSAGE_SINT;
 
 	/* Since we are a child, we only need to check bit 0 */
-	if (test_and_clear_bit(0, (unsigned long *) &event->Flags32[0])) {
+	if (sync_test_and_clear_bit(0, (unsigned long *) &event->Flags32[0])) {
 		DPRINT_DBG(VMBUS, "received event %d", event->Flags32[0]);
 		ret |= 0x2;
 	}
--- linux-mvl-dove-2.6.32.orig/drivers/staging/hv/blkvsc_drv.c
+++ linux-mvl-dove-2.6.32/drivers/staging/hv/blkvsc_drv.c
@@ -378,6 +378,7 @@
 		blkdev->gd->first_minor = 0;
 	blkdev->gd->fops = &block_ops;
 	blkdev->gd->private_data = blkdev;
+	blkdev->gd->driverfs_dev = &(blkdev->device_ctx->device);
 	sprintf(blkdev->gd->disk_name, "hd%c", 'a' + devnum);
 
 	blkvsc_do_inquiry(blkdev);
--- linux-mvl-dove-2.6.32.orig/drivers/staging/hv/VmbusPrivate.h
+++ linux-mvl-dove-2.6.32/drivers/staging/hv/VmbusPrivate.h
@@ -32,6 +32,7 @@
 #include "ChannelInterface.h"
 #include "RingBuffer.h"
 #include <linux/list.h>
+#include <asm/sync_bitops.h>
 
 
 /*
--- linux-mvl-dove-2.6.32.orig/drivers/staging/hv/Hv.c
+++ linux-mvl-dove-2.6.32/drivers/staging/hv/Hv.c
@@ -306,9 +306,9 @@
 	DPRINT_ENTER(VMBUS);
 
 	if (gHvContext.SignalEventBuffer) {
+		kfree(gHvContext.SignalEventBuffer);
 		gHvContext.SignalEventBuffer = NULL;
 		gHvContext.SignalEventParam = NULL;
-		kfree(gHvContext.SignalEventBuffer);
 	}
 
 	if (gHvContext.GuestId == HV_LINUX_GUEST_ID) {
@@ -386,7 +386,7 @@
  * retrieve the initialized message and event pages.  Otherwise, we create and
  * initialize the message and event pages.
  */
-int HvSynicInit(u32 irqVector)
+void HvSynicInit(void *irqarg)
 {
 	u64 version;
 	union hv_synic_simp simp;
@@ -394,13 +394,14 @@
 	union hv_synic_sint sharedSint;
 	union hv_synic_scontrol sctrl;
 	u64 guestID;
-	int ret = 0;
+	u32 irqVector = *((u32 *)(irqarg));
+	int cpu = smp_processor_id();
 
 	DPRINT_ENTER(VMBUS);
 
 	if (!gHvContext.HypercallPage) {
 		DPRINT_EXIT(VMBUS);
-		return ret;
+		return;
 	}
 
 	/* Check the version */
@@ -425,27 +426,27 @@
 		 */
 		rdmsrl(HV_X64_MSR_GUEST_OS_ID, guestID);
 		if (guestID == HV_LINUX_GUEST_ID) {
-			gHvContext.synICMessagePage[0] =
+			gHvContext.synICMessagePage[cpu] =
 				phys_to_virt(simp.BaseSimpGpa << PAGE_SHIFT);
-			gHvContext.synICEventPage[0] =
+			gHvContext.synICEventPage[cpu] =
 				phys_to_virt(siefp.BaseSiefpGpa << PAGE_SHIFT);
 		} else {
 			DPRINT_ERR(VMBUS, "unknown guest id!!");
 			goto Cleanup;
 		}
 		DPRINT_DBG(VMBUS, "MAPPED: Simp: %p, Sifep: %p",
-			   gHvContext.synICMessagePage[0],
-			   gHvContext.synICEventPage[0]);
+			   gHvContext.synICMessagePage[cpu],
+			   gHvContext.synICEventPage[cpu]);
 	} else {
-		gHvContext.synICMessagePage[0] = osd_PageAlloc(1);
-		if (gHvContext.synICMessagePage[0] == NULL) {
+		gHvContext.synICMessagePage[cpu] = (void *)get_zeroed_page(GFP_ATOMIC);
+		if (gHvContext.synICMessagePage[cpu] == NULL) {
 			DPRINT_ERR(VMBUS,
 				   "unable to allocate SYNIC message page!!");
 			goto Cleanup;
 		}
 
-		gHvContext.synICEventPage[0] = osd_PageAlloc(1);
-		if (gHvContext.synICEventPage[0] == NULL) {
+		gHvContext.synICEventPage[cpu] = (void *)get_zeroed_page(GFP_ATOMIC);
+		if (gHvContext.synICEventPage[cpu] == NULL) {
 			DPRINT_ERR(VMBUS,
 				   "unable to allocate SYNIC event page!!");
 			goto Cleanup;
@@ -454,7 +455,7 @@
 		/* Setup the Synic's message page */
 		rdmsrl(HV_X64_MSR_SIMP, simp.AsUINT64);
 		simp.SimpEnabled = 1;
-		simp.BaseSimpGpa = virt_to_phys(gHvContext.synICMessagePage[0])
+		simp.BaseSimpGpa = virt_to_phys(gHvContext.synICMessagePage[cpu])
 					>> PAGE_SHIFT;
 
 		DPRINT_DBG(VMBUS, "HV_X64_MSR_SIMP msr set to: %llx",
@@ -465,7 +466,7 @@
 		/* Setup the Synic's event page */
 		rdmsrl(HV_X64_MSR_SIEFP, siefp.AsUINT64);
 		siefp.SiefpEnabled = 1;
-		siefp.BaseSiefpGpa = virt_to_phys(gHvContext.synICEventPage[0])
+		siefp.BaseSiefpGpa = virt_to_phys(gHvContext.synICEventPage[cpu])
 					>> PAGE_SHIFT;
 
 		DPRINT_DBG(VMBUS, "HV_X64_MSR_SIEFP msr set to: %llx",
@@ -501,32 +502,30 @@
 
 	DPRINT_EXIT(VMBUS);
 
-	return ret;
+	return;
 
 Cleanup:
-	ret = -1;
-
 	if (gHvContext.GuestId == HV_LINUX_GUEST_ID) {
-		if (gHvContext.synICEventPage[0])
-			osd_PageFree(gHvContext.synICEventPage[0], 1);
+		if (gHvContext.synICEventPage[cpu])
+			osd_PageFree(gHvContext.synICEventPage[cpu], 1);
 
-		if (gHvContext.synICMessagePage[0])
-			osd_PageFree(gHvContext.synICMessagePage[0], 1);
+		if (gHvContext.synICMessagePage[cpu])
+			osd_PageFree(gHvContext.synICMessagePage[cpu], 1);
 	}
 
 	DPRINT_EXIT(VMBUS);
-
-	return ret;
+	return;
 }
 
 /**
  * HvSynicCleanup - Cleanup routine for HvSynicInit().
  */
-void HvSynicCleanup(void)
+void HvSynicCleanup(void *arg)
 {
 	union hv_synic_sint sharedSint;
 	union hv_synic_simp simp;
 	union hv_synic_siefp siefp;
+	int cpu = smp_processor_id();
 
 	DPRINT_ENTER(VMBUS);
 
@@ -539,6 +538,7 @@
 
 	sharedSint.Masked = 1;
 
+	/* Need to correctly cleanup in the case of SMP!!! */
 	/* Disable the interrupt */
 	wrmsrl(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, sharedSint.AsUINT64);
 
@@ -560,8 +560,8 @@
 
 		wrmsrl(HV_X64_MSR_SIEFP, siefp.AsUINT64);
 
-		osd_PageFree(gHvContext.synICMessagePage[0], 1);
-		osd_PageFree(gHvContext.synICEventPage[0], 1);
+		osd_PageFree(gHvContext.synICMessagePage[cpu], 1);
+		osd_PageFree(gHvContext.synICEventPage[cpu], 1);
 	}
 
 	DPRINT_EXIT(VMBUS);
--- linux-mvl-dove-2.6.32.orig/drivers/staging/hv/storvsc_drv.c
+++ linux-mvl-dove-2.6.32/drivers/staging/hv/storvsc_drv.c
@@ -532,7 +532,7 @@
 
 		ASSERT(orig_sgl[i].offset + orig_sgl[i].length <= PAGE_SIZE);
 
-		if (j == 0)
+		if (bounce_addr == 0)
 			bounce_addr = (unsigned long)kmap_atomic(sg_page((&bounce_sgl[j])), KM_IRQ0);
 
 		while (srclen) {
@@ -593,7 +593,7 @@
 		destlen = orig_sgl[i].length;
 		ASSERT(orig_sgl[i].offset + orig_sgl[i].length <= PAGE_SIZE);
 
-		if (j == 0)
+		if (bounce_addr == 0)
 			bounce_addr = (unsigned long)kmap_atomic(sg_page((&bounce_sgl[j])), KM_IRQ0);
 
 		while (destlen) {
@@ -652,6 +652,7 @@
 	unsigned int request_size = 0;
 	int i;
 	struct scatterlist *sgl;
+	unsigned int sg_count = 0;
 
 	DPRINT_ENTER(STORVSC_DRV);
 
@@ -736,6 +737,7 @@
 	request->DataBuffer.Length = scsi_bufflen(scmnd);
 	if (scsi_sg_count(scmnd)) {
 		sgl = (struct scatterlist *)scsi_sglist(scmnd);
+		sg_count = scsi_sg_count(scmnd);
 
 		/* check if we need to bounce the sgl */
 		if (do_bounce_buffer(sgl, scsi_sg_count(scmnd)) != -1) {
@@ -770,11 +772,12 @@
 					      scsi_sg_count(scmnd));
 
 			sgl = cmd_request->bounce_sgl;
+			sg_count = cmd_request->bounce_sgl_count;
 		}
 
 		request->DataBuffer.Offset = sgl[0].offset;
 
-		for (i = 0; i < scsi_sg_count(scmnd); i++) {
+		for (i = 0; i < sg_count; i++) {
 			DPRINT_DBG(STORVSC_DRV, "sgl[%d] len %d offset %d \n",
 				   i, sgl[i].length, sgl[i].offset);
 			request->DataBuffer.PfnArray[i] =
--- linux-mvl-dove-2.6.32.orig/drivers/staging/hv/Hv.h
+++ linux-mvl-dove-2.6.32/drivers/staging/hv/Hv.h
@@ -93,7 +93,7 @@
 	},
 };
 
-#define MAX_NUM_CPUS	1
+#define MAX_NUM_CPUS	32
 
 
 struct hv_input_signal_event_buffer {
@@ -137,8 +137,8 @@
 
 extern u16 HvSignalEvent(void);
 
-extern int HvSynicInit(u32 irqVector);
+extern void HvSynicInit(void *irqarg);
 
-extern void HvSynicCleanup(void);
+extern void HvSynicCleanup(void *arg);
 
 #endif /* __HV_H__ */
--- linux-mvl-dove-2.6.32.orig/drivers/staging/hv/StorVscApi.h
+++ linux-mvl-dove-2.6.32/drivers/staging/hv/StorVscApi.h
@@ -28,10 +28,10 @@
 #include "VmbusApi.h"
 
 /* Defines */
-#define STORVSC_RING_BUFFER_SIZE			(10*PAGE_SIZE)
+#define STORVSC_RING_BUFFER_SIZE			(20*PAGE_SIZE)
 #define BLKVSC_RING_BUFFER_SIZE				(20*PAGE_SIZE)
 
-#define STORVSC_MAX_IO_REQUESTS				64
+#define STORVSC_MAX_IO_REQUESTS				128
 
 /*
  * In Hyper-V, each port/path/target maps to 1 scsi host adapter.  In
--- linux-mvl-dove-2.6.32.orig/drivers/staging/hv/Connection.c
+++ linux-mvl-dove-2.6.32/drivers/staging/hv/Connection.c
@@ -284,7 +284,9 @@
 		for (dword = 0; dword < maxdword; dword++) {
 			if (recvInterruptPage[dword]) {
 				for (bit = 0; bit < 32; bit++) {
-					if (test_and_clear_bit(bit, (unsigned long *)&recvInterruptPage[dword])) {
+					if (sync_test_and_clear_bit(bit,
+						(unsigned long *)
+						&recvInterruptPage[dword])) {
 						relid = (dword << 5) + bit;
 						DPRINT_DBG(VMBUS, "event detected for relid - %d", relid);
 
@@ -329,7 +331,7 @@
 	DPRINT_ENTER(VMBUS);
 
 	/* Each u32 represents 32 channels */
-	set_bit(childRelId & 31,
+	sync_set_bit(childRelId & 31,
 		(unsigned long *)gVmbusConnection.SendInterruptPage +
 		(childRelId >> 5));
 
--- linux-mvl-dove-2.6.32.orig/drivers/staging/hv/RingBuffer.c
+++ linux-mvl-dove-2.6.32/drivers/staging/hv/RingBuffer.c
@@ -192,7 +192,7 @@
 static inline u64
 GetRingBufferIndices(RING_BUFFER_INFO* RingInfo)
 {
-	return ((u64)RingInfo->RingBuffer->WriteIndex << 32) || RingInfo->RingBuffer->ReadIndex;
+	return (u64)RingInfo->RingBuffer->WriteIndex << 32;
 }
 
 
--- linux-mvl-dove-2.6.32.orig/drivers/staging/hv/Channel.c
+++ linux-mvl-dove-2.6.32/drivers/staging/hv/Channel.c
@@ -75,14 +75,14 @@
 
 	if (Channel->OfferMsg.MonitorAllocated) {
 		/* Each u32 represents 32 channels */
-		set_bit(Channel->OfferMsg.ChildRelId & 31,
+		sync_set_bit(Channel->OfferMsg.ChildRelId & 31,
 			(unsigned long *) gVmbusConnection.SendInterruptPage +
 			(Channel->OfferMsg.ChildRelId >> 5));
 
 		monitorPage = gVmbusConnection.MonitorPages;
 		monitorPage++; /* Get the child to parent monitor page */
 
-		set_bit(Channel->MonitorBit,
+		sync_set_bit(Channel->MonitorBit,
 			(unsigned long *)&monitorPage->TriggerGroup
 					[Channel->MonitorGroup].Pending);
 
@@ -102,7 +102,7 @@
 
 	if (Channel->OfferMsg.MonitorAllocated) {
 		/* Each u32 represents 32 channels */
-		clear_bit(Channel->OfferMsg.ChildRelId & 31,
+		sync_clear_bit(Channel->OfferMsg.ChildRelId & 31,
 			  (unsigned long *)gVmbusConnection.SendInterruptPage +
 			  (Channel->OfferMsg.ChildRelId >> 5));
 
@@ -110,7 +110,7 @@
 			(struct hv_monitor_page *)gVmbusConnection.MonitorPages;
 		monitorPage++; /* Get the child to parent monitor page */
 
-		clear_bit(Channel->MonitorBit,
+		sync_clear_bit(Channel->MonitorBit,
 			  (unsigned long *)&monitorPage->TriggerGroup
 					[Channel->MonitorGroup].Pending);
 	}
--- linux-mvl-dove-2.6.32.orig/drivers/staging/hv/RndisFilter.c
+++ linux-mvl-dove-2.6.32/drivers/staging/hv/RndisFilter.c
@@ -756,6 +756,7 @@
 
 	ret = RndisFilterSetPacketFilter(Device,
 					 NDIS_PACKET_TYPE_BROADCAST |
+					 NDIS_PACKET_TYPE_ALL_MULTICAST |
 					 NDIS_PACKET_TYPE_DIRECTED);
 	if (ret == 0)
 		Device->State = RNDIS_DEV_DATAINITIALIZED;
--- linux-mvl-dove-2.6.32.orig/drivers/staging/hv/vmbus_drv.c
+++ linux-mvl-dove-2.6.32/drivers/staging/hv/vmbus_drv.c
@@ -24,6 +24,8 @@
 #include <linux/irq.h>
 #include <linux/interrupt.h>
 #include <linux/sysctl.h>
+#include <linux/pci.h>
+#include <linux/dmi.h>
 #include "osd.h"
 #include "logging.h"
 #include "vmbus.h"
@@ -946,6 +948,19 @@
 	}
 }
 
+static struct dmi_system_id __initdata microsoft_hv_dmi_table[] = {
+	{
+		.ident = "Hyper-V",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Virtual Machine"),
+			DMI_MATCH(DMI_BOARD_NAME, "Virtual Machine"),
+		},
+	},
+	{ },
+};
+MODULE_DEVICE_TABLE(dmi, microsoft_hv_dmi_table);
+
 static int __init vmbus_init(void)
 {
 	int ret = 0;
@@ -957,6 +972,9 @@
 		vmbus_loglevel, HIWORD(vmbus_loglevel), LOWORD(vmbus_loglevel));
 	/* Todo: it is used for loglevel, to be ported to new kernel. */
 
+	if (!dmi_check_system(microsoft_hv_dmi_table))
+		return -ENODEV;
+
 	ret = vmbus_bus_init(VmbusInitialize);
 
 	DPRINT_EXIT(VMBUS_DRV);
@@ -973,6 +991,18 @@
 	return;
 }
 
+/*
+ * We use a PCI table to determine if we should autoload this driver  This is
+ * needed by distro tools to determine if the hyperv drivers should be
+ * installed and/or configured.  We don't do anything else with the table, but
+ * it needs to be present.
+ */
+const static struct pci_device_id microsoft_hv_pci_table[] = {
+	{ PCI_DEVICE(0x1414, 0x5353) },	/* VGA compatible controller */
+	{ 0 }
+};
+MODULE_DEVICE_TABLE(pci, microsoft_hv_pci_table);
+
 MODULE_LICENSE("GPL");
 module_param(vmbus_irq, int, S_IRUGO);
 module_param(vmbus_loglevel, int, S_IRUGO);
--- linux-mvl-dove-2.6.32.orig/drivers/staging/hv/netvsc_drv.c
+++ linux-mvl-dove-2.6.32/drivers/staging/hv/netvsc_drv.c
@@ -44,6 +44,7 @@
 	/* point back to our device context */
 	struct device_context *device_ctx;
 	struct net_device_stats stats;
+	struct work_struct work;
 };
 
 struct netvsc_driver_context {
@@ -284,6 +285,7 @@
 {
 	struct device_context *device_ctx = to_device_context(device_obj);
 	struct net_device *net = dev_get_drvdata(&device_ctx->device);
+	struct net_device_context *ndev_ctx;
 
 	DPRINT_ENTER(NETVSC_DRV);
 
@@ -296,6 +298,9 @@
 	if (status == 1) {
 		netif_carrier_on(net);
 		netif_wake_queue(net);
+		netif_notify_peers(net);
+		ndev_ctx = netdev_priv(net);
+		schedule_work(&ndev_ctx->work);
 	} else {
 		netif_carrier_off(net);
 		netif_stop_queue(net);
@@ -392,8 +397,30 @@
 	.ndo_start_xmit =		netvsc_start_xmit,
 	.ndo_get_stats =		netvsc_get_stats,
 	.ndo_set_multicast_list =	netvsc_set_multicast_list,
+	.ndo_change_mtu =		eth_change_mtu,
+	.ndo_validate_addr =		eth_validate_addr,
+	.ndo_set_mac_address =		eth_mac_addr,
 };
 
+/*
+ * Send GARP packet to network peers after migrations.
+ * After Quick Migration, the network is not immediately operational in the
+ * current context when receiving RNDIS_STATUS_MEDIA_CONNECT event. So, add
+ * another netif_notify_peers() into a scheduled work, otherwise GARP packet
+ * will not be sent after quick migration, and cause network disconnection.
+ */
+static void netvsc_send_garp(struct work_struct *w)
+{
+	struct net_device_context *ndev_ctx;
+	struct net_device *net;
+
+	msleep(20);
+	ndev_ctx = container_of(w, struct net_device_context, work);
+	net = dev_get_drvdata(&ndev_ctx->device_ctx->device);
+	netif_notify_peers(net);
+}
+
+
 static int netvsc_probe(struct device *device)
 {
 	struct driver_context *driver_ctx =
@@ -413,8 +440,7 @@
 	if (!net_drv_obj->Base.OnDeviceAdd)
 		return -1;
 
-	net = alloc_netdev(sizeof(struct net_device_context), "seth%d",
-			   ether_setup);
+	net = alloc_etherdev(sizeof(struct net_device_context));
 	if (!net)
 		return -1;
 
@@ -425,6 +451,7 @@
 	net_device_ctx = netdev_priv(net);
 	net_device_ctx->device_ctx = device_ctx;
 	dev_set_drvdata(device, net);
+	INIT_WORK(&net_device_ctx->work, netvsc_send_garp);
 
 	/* Notify the netvsc driver of the new device */
 	ret = net_drv_obj->Base.OnDeviceAdd(device_obj, &device_info);
--- linux-mvl-dove-2.6.32.orig/drivers/staging/comedi/comedi_fops.c
+++ linux-mvl-dove-2.6.32/drivers/staging/comedi/comedi_fops.c
@@ -367,8 +367,8 @@
 	/* fill devinfo structure */
 	devinfo.version_code = COMEDI_VERSION_CODE;
 	devinfo.n_subdevs = dev->n_subdevices;
-	memcpy(devinfo.driver_name, dev->driver->driver_name, COMEDI_NAMELEN);
-	memcpy(devinfo.board_name, dev->board_name, COMEDI_NAMELEN);
+	strlcpy(devinfo.driver_name, dev->driver->driver_name, COMEDI_NAMELEN);
+	strlcpy(devinfo.board_name, dev->board_name, COMEDI_NAMELEN);
 
 	if (read_subdev)
 		devinfo.read_subdevice = read_subdev - dev->subdevices;
--- linux-mvl-dove-2.6.32.orig/drivers/staging/comedi/comedi.h
+++ linux-mvl-dove-2.6.32/drivers/staging/comedi/comedi.h
@@ -455,7 +455,7 @@
 
 #define COMEDI_CB_EOS		1	/* end of scan */
 #define COMEDI_CB_EOA		2	/* end of acquisition */
-#define COMEDI_CB_BLOCK		4	/* DEPRECATED: convenient block size */
+#define COMEDI_CB_BLOCK		4	/* data has arrived: wakes up read() / write() */
 #define COMEDI_CB_EOBUF		8	/* DEPRECATED: end of buffer */
 #define COMEDI_CB_ERROR		16	/* card error during acquisition */
 #define COMEDI_CB_OVERFLOW	32	/* buffer overflow/underflow */
--- linux-mvl-dove-2.6.32.orig/drivers/staging/comedi/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/staging/comedi/Kconfig
@@ -16,6 +16,7 @@
 config COMEDI_PCI_DRIVERS
 	tristate "Comedi PCI drivers"
 	depends on COMEDI && PCI
+	select COMEDI_8255
 	default N
 	---help---
 	  Enable lots of comedi PCI drivers to be built
@@ -23,6 +24,7 @@
 config COMEDI_PCMCIA_DRIVERS
 	tristate "Comedi PCMCIA drivers"
 	depends on COMEDI && PCMCIA && PCCARD
+	select COMEDI_8255
 	default N
 	---help---
 	  Enable lots of comedi PCMCIA and PCCARD drivers to be built
@@ -33,3 +35,6 @@
 	default N
 	---help---
 	  Enable lots of comedi USB drivers to be built
+
+config COMEDI_8255
+	tristate
--- linux-mvl-dove-2.6.32.orig/drivers/staging/comedi/drivers/ni_mio_cs.c
+++ linux-mvl-dove-2.6.32/drivers/staging/comedi/drivers/ni_mio_cs.c
@@ -123,7 +123,7 @@
 	 .adbits = 12,
 	 .ai_fifo_depth = 1024,
 	 .alwaysdither = 0,
-	 .gainlkup = ai_gain_16,
+	 .gainlkup = ai_gain_4,
 	 .ai_speed = 5000,
 	 .n_aochan = 2,
 	 .aobits = 12,
--- linux-mvl-dove-2.6.32.orig/drivers/staging/comedi/drivers/ni_labpc.c
+++ linux-mvl-dove-2.6.32/drivers/staging/comedi/drivers/ni_labpc.c
@@ -528,7 +528,8 @@
 	/* grab our IRQ */
 	if (irq) {
 		isr_flags = 0;
-		if (thisboard->bustype == pci_bustype)
+		if (thisboard->bustype == pci_bustype
+		    || thisboard->bustype == pcmcia_bustype)
 			isr_flags |= IRQF_SHARED;
 		if (request_irq(irq, labpc_interrupt, isr_flags,
 				driver_labpc.driver_name, dev)) {
--- linux-mvl-dove-2.6.32.orig/drivers/staging/comedi/drivers/jr3_pci.c
+++ linux-mvl-dove-2.6.32/drivers/staging/comedi/drivers/jr3_pci.c
@@ -52,6 +52,7 @@
 
 #define PCI_VENDOR_ID_JR3 0x1762
 #define PCI_DEVICE_ID_JR3_1_CHANNEL 0x3111
+#define PCI_DEVICE_ID_JR3_1_CHANNEL_NEW 0x1111
 #define PCI_DEVICE_ID_JR3_2_CHANNEL 0x3112
 #define PCI_DEVICE_ID_JR3_3_CHANNEL 0x3113
 #define PCI_DEVICE_ID_JR3_4_CHANNEL 0x3114
@@ -71,6 +72,8 @@
 	{
 	PCI_VENDOR_ID_JR3, PCI_DEVICE_ID_JR3_1_CHANNEL,
 		    PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
+	PCI_VENDOR_ID_JR3, PCI_DEVICE_ID_JR3_1_CHANNEL_NEW,
+		    PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
 	PCI_VENDOR_ID_JR3, PCI_DEVICE_ID_JR3_2_CHANNEL,
 		    PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
 	PCI_VENDOR_ID_JR3, PCI_DEVICE_ID_JR3_3_CHANNEL,
@@ -807,6 +810,10 @@
 					devpriv->n_channels = 1;
 				}
 				break;
+			case PCI_DEVICE_ID_JR3_1_CHANNEL_NEW:{
+					devpriv->n_channels = 1;
+				}
+				break;
 			case PCI_DEVICE_ID_JR3_2_CHANNEL:{
 					devpriv->n_channels = 2;
 				}
@@ -849,8 +856,11 @@
 	}
 
 	devpriv->pci_enabled = 1;
-	devpriv->iobase =
-	    ioremap(pci_resource_start(card, 0), sizeof(struct jr3_t));
+	devpriv->iobase = ioremap(pci_resource_start(card, 0),
+			offsetof(struct jr3_t, channel[devpriv->n_channels]));
+	if (!devpriv->iobase)
+		return -ENOMEM;
+
 	result = alloc_subdevices(dev, devpriv->n_channels);
 	if (result < 0)
 		goto out;
--- linux-mvl-dove-2.6.32.orig/drivers/staging/comedi/drivers/Makefile
+++ linux-mvl-dove-2.6.32/drivers/staging/comedi/drivers/Makefile
@@ -8,8 +8,10 @@
 obj-$(CONFIG_COMEDI)			+= comedi_parport.o
 obj-$(CONFIG_COMEDI)			+= pcm_common.o
 
+# Comedi 8255 module
+obj-$(CONFIG_COMEDI_8255)		+= 8255.o
+
 # Comedi PCI drivers
-obj-$(CONFIG_COMEDI_PCI_DRIVERS)	+= 8255.o
 obj-$(CONFIG_COMEDI_PCI_DRIVERS)	+= acl7225b.o
 obj-$(CONFIG_COMEDI_PCI_DRIVERS)	+= addi_apci_035.o
 obj-$(CONFIG_COMEDI_PCI_DRIVERS)	+= addi_apci_1032.o
--- linux-mvl-dove-2.6.32.orig/drivers/staging/comedi/drivers/usbdux.c
+++ linux-mvl-dove-2.6.32/drivers/staging/comedi/drivers/usbdux.c
@@ -1,4 +1,4 @@
-#define DRIVER_VERSION "v2.2"
+#define DRIVER_VERSION "v2.4"
 #define DRIVER_AUTHOR "Bernd Porr, BerndPorr@f2s.com"
 #define DRIVER_DESC "Stirling/ITL USB-DUX -- Bernd.Porr@f2s.com"
 /*
@@ -80,6 +80,9 @@
  * 2.0:  PWM seems to be stable and is not interfering with the other functions
  * 2.1:  changed PWM API
  * 2.2:  added firmware kernel request to fix an udev problem
+ * 2.3:  corrected a bug in bulk timeouts which were far too short
+ * 2.4:  fixed a bug which causes the driver to hang when it ran out of data.
+ *       Thanks to Jan-Matthias Braun and Ian to spot the bug and fix it.
  *
  */
 
@@ -101,8 +104,8 @@
 
 #define BOARDNAME "usbdux"
 
-/* timeout for the USB-transfer */
-#define EZTIMEOUT 30
+/* timeout for the USB-transfer in ms*/
+#define BULK_TIMEOUT 1000
 
 /* constants for "firmware" upload and download */
 #define USBDUXSUB_FIRMWARE 0xA0
@@ -531,6 +534,7 @@
 		}
 	}
 	/* tell comedi that data is there */
+	s->async->events |= COMEDI_CB_BLOCK | COMEDI_CB_EOS;
 	comedi_event(this_usbduxsub->comedidev, s);
 }
 
@@ -750,7 +754,7 @@
 				  /* Length */
 				  1,
 				  /* Timeout */
-				  EZTIMEOUT);
+				  BULK_TIMEOUT);
 	if (errcode < 0) {
 		dev_err(&usbduxsub->interface->dev,
 			"comedi_: control msg failed (start)\n");
@@ -780,7 +784,7 @@
 				  /* Length */
 				  1,
 				  /* Timeout */
-				  EZTIMEOUT);
+				  BULK_TIMEOUT);
 	if (errcode < 0) {
 		dev_err(&usbduxsub->interface->dev,
 			"comedi_: control msg failed (stop)\n");
@@ -810,7 +814,7 @@
 				  /* length */
 				  len,
 				  /* timeout */
-				  EZTIMEOUT);
+				  BULK_TIMEOUT);
 	dev_dbg(&usbduxsub->interface->dev, "comedi_: result=%d\n", errcode);
 	if (errcode < 0) {
 		dev_err(&usbduxsub->interface->dev, "comedi_: upload failed\n");
@@ -1110,7 +1114,7 @@
 			      usb_sndbulkpipe(this_usbduxsub->usbdev,
 					      COMMAND_OUT_EP),
 			      this_usbduxsub->dux_commands, SIZEOFDUXBUFFER,
-			      &nsent, 10);
+			      &nsent, BULK_TIMEOUT);
 	if (result < 0)
 		dev_err(&this_usbduxsub->interface->dev, "comedi%d: "
 			"could not transmit dux_command to the usb-device, "
@@ -1130,7 +1134,7 @@
 				      usb_rcvbulkpipe(this_usbduxsub->usbdev,
 						      COMMAND_IN_EP),
 				      this_usbduxsub->insnBuffer, SIZEINSNBUF,
-				      &nrec, 1);
+				      &nrec, BULK_TIMEOUT);
 		if (result < 0) {
 			dev_err(&this_usbduxsub->interface->dev, "comedi%d: "
 				"insn: USB error %d while receiving DUX command"
--- linux-mvl-dove-2.6.32.orig/drivers/staging/rtl8187se/r8180_wx.c
+++ linux-mvl-dove-2.6.32/drivers/staging/rtl8187se/r8180_wx.c
@@ -377,7 +377,7 @@
 	//	queue_work(priv->ieee80211->wq, &priv->ieee80211->wx_sync_scan_wq);
 		//printk("start scan============================>\n");
 		ieee80211_softmac_ips_scan_syncro(priv->ieee80211);
-//ieee80211_start_scan(priv->ieee80211);
+//ieee80211_rtl_start_scan(priv->ieee80211);
 		/* intentionally forget to up sem */
 //			up(&priv->ieee80211->wx_sem);
 			ret = 0;
--- linux-mvl-dove-2.6.32.orig/drivers/staging/rtl8187se/r8180_core.c
+++ linux-mvl-dove-2.6.32/drivers/staging/rtl8187se/r8180_core.c
@@ -1830,7 +1830,7 @@
 			if(priv->rx_skb->len > 4)
 				skb_trim(priv->rx_skb,priv->rx_skb->len-4);
 #ifndef RX_DONT_PASS_UL
-			if(!ieee80211_rx(priv->ieee80211,
+			if(!ieee80211_rtl_rx(priv->ieee80211,
 					 priv->rx_skb, &stats)){
 #endif // RX_DONT_PASS_UL
 
@@ -1936,11 +1936,11 @@
 	if (!check_nic_enought_desc(dev, priority)){
 		DMESGW("Error: no descriptor left by previous TX (avail %d) ",
 			get_curr_tx_free_desc(dev, priority));
-		ieee80211_stop_queue(priv->ieee80211);
+		ieee80211_rtl_stop_queue(priv->ieee80211);
 	}
 	rtl8180_tx(dev, skb->data, skb->len, priority, morefrag,0,rate);
 	if (!check_nic_enought_desc(dev, priority))
-		ieee80211_stop_queue(priv->ieee80211);
+		ieee80211_rtl_stop_queue(priv->ieee80211);
 
 	spin_unlock_irqrestore(&priv->tx_lock,flags);
 }
@@ -3846,7 +3846,7 @@
 	.ndo_set_mac_address	= r8180_set_mac_adr,
 	.ndo_validate_addr	= eth_validate_addr,
 	.ndo_change_mtu		= eth_change_mtu,
-	.ndo_start_xmit		= ieee80211_xmit,
+	.ndo_start_xmit		= ieee80211_rtl_xmit,
 };
 
 static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
@@ -4066,7 +4066,7 @@
 	spin_unlock_irqrestore(&priv->tx_lock,flags);
 
 	if(enough_desc)
-		ieee80211_wake_queue(priv->ieee80211);
+		ieee80211_rtl_wake_queue(priv->ieee80211);
 }
 
 void rtl8180_tx_isr(struct net_device *dev, int pri,short error)
--- linux-mvl-dove-2.6.32.orig/drivers/staging/rtl8187se/r8185b_init.c
+++ linux-mvl-dove-2.6.32/drivers/staging/rtl8187se/r8185b_init.c
@@ -356,8 +356,12 @@
 			}
 			udelay(10);
 		}
-		if (TryCnt == TC_3W_POLL_MAX_TRY_CNT)
-			panic("HwThreeWire(): CmdReg: %#X RE|WE bits are not clear!!\n", u1bTmp);
+		if (TryCnt == TC_3W_POLL_MAX_TRY_CNT) {
+			printk(KERN_ERR "rtl8187se: HwThreeWire(): CmdReg:"
+			       " %#X RE|WE bits are not clear!!\n", u1bTmp);
+			dump_stack();
+			return 0;
+		}
 
 		// RTL8187S HSSI Read/Write Function
 		u1bTmp = read_nic_byte(dev, RF_SW_CONFIG);
@@ -397,13 +401,23 @@
 				int idx;
 				int ByteCnt = nDataBufBitCnt / 8;
                                 //printk("%d\n",nDataBufBitCnt);
-				if ((nDataBufBitCnt % 8) != 0)
-				panic("HwThreeWire(): nDataBufBitCnt(%d) should be multiple of 8!!!\n",
-				nDataBufBitCnt);
+				if ((nDataBufBitCnt % 8) != 0) {
+					printk(KERN_ERR "rtl8187se: "
+					       "HwThreeWire(): nDataBufBitCnt(%d)"
+					       " should be multiple of 8!!!\n",
+					       nDataBufBitCnt);
+					dump_stack();
+					nDataBufBitCnt += 8;
+					nDataBufBitCnt &= ~7;
+				}
 
-			       if (nDataBufBitCnt > 64)
-				panic("HwThreeWire(): nDataBufBitCnt(%d) should <= 64!!!\n",
-				nDataBufBitCnt);
+			       if (nDataBufBitCnt > 64) {
+					printk(KERN_ERR "rtl8187se: HwThreeWire():"
+					       " nDataBufBitCnt(%d) should <= 64!!!\n",
+					       nDataBufBitCnt);
+					dump_stack();
+					nDataBufBitCnt = 64;
+				}
 
 				for(idx = 0; idx < ByteCnt; idx++)
 				{
--- linux-mvl-dove-2.6.32.orig/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c
+++ linux-mvl-dove-2.6.32/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c
@@ -689,7 +689,7 @@
 }
 
 /* called with ieee->lock held */
-void ieee80211_start_scan(struct ieee80211_device *ieee)
+void ieee80211_rtl_start_scan(struct ieee80211_device *ieee)
 {
 	if(IS_DOT11D_ENABLE(ieee) )
 	{
@@ -1196,7 +1196,7 @@
 	}
 }
 
-void ieee80211_auth_challenge(struct ieee80211_device *ieee, u8 *challenge, int chlen)
+void ieee80211_rtl_auth_challenge(struct ieee80211_device *ieee, u8 *challenge, int chlen)
 {
 	u8 *c;
 	struct sk_buff *skb;
@@ -1898,7 +1898,7 @@
 
 								ieee80211_associate_step2(ieee);
 							}else{
-								ieee80211_auth_challenge(ieee, challenge, chlen);
+								ieee80211_rtl_auth_challenge(ieee, challenge, chlen);
 							}
 						}else{
 							ieee->softmac_stats.rx_auth_rs_err++;
@@ -2047,7 +2047,7 @@
 
 }
 
-void ieee80211_wake_queue(struct ieee80211_device *ieee)
+void ieee80211_rtl_wake_queue(struct ieee80211_device *ieee)
 {
 
 	unsigned long flags;
@@ -2089,7 +2089,7 @@
 }
 
 
-void ieee80211_stop_queue(struct ieee80211_device *ieee)
+void ieee80211_rtl_stop_queue(struct ieee80211_device *ieee)
 {
 	//unsigned long flags;
 	//spin_lock_irqsave(&ieee->lock,flags);
@@ -2301,7 +2301,7 @@
 //#else
 	if (ieee->state == IEEE80211_NOLINK){
 		ieee->actscanning = true;
-		ieee80211_start_scan(ieee);
+		ieee80211_rtl_start_scan(ieee);
 	}
 //#endif
 	spin_unlock_irqrestore(&ieee->lock, flags);
@@ -2357,7 +2357,7 @@
 	if(ieee->state == IEEE80211_NOLINK){
 		ieee->beinretry = false;
 		ieee->actscanning = true;
-		ieee80211_start_scan(ieee);
+		ieee80211_rtl_start_scan(ieee);
 	}
 	//YJ,add,080828, notify os here
 	if(ieee->state == IEEE80211_NOLINK)
--- linux-mvl-dove-2.6.32.orig/drivers/staging/rtl8187se/ieee80211/ieee80211_tx.c
+++ linux-mvl-dove-2.6.32/drivers/staging/rtl8187se/ieee80211/ieee80211_tx.c
@@ -305,7 +305,7 @@
 }
 
 /* SKBs are added to the ieee->tx_queue. */
-int ieee80211_xmit(struct sk_buff *skb,
+int ieee80211_rtl_xmit(struct sk_buff *skb,
 		   struct net_device *dev)
 {
 	struct ieee80211_device *ieee = netdev_priv(dev);
--- linux-mvl-dove-2.6.32.orig/drivers/staging/rtl8187se/ieee80211/ieee80211_rx.c
+++ linux-mvl-dove-2.6.32/drivers/staging/rtl8187se/ieee80211/ieee80211_rx.c
@@ -470,7 +470,7 @@
 /* All received frames are sent to this function. @skb contains the frame in
  * IEEE 802.11 format, i.e., in the format it was sent over air.
  * This function is called only as a tasklet (software IRQ). */
-int ieee80211_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
+int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
 		 struct ieee80211_rx_stats *rx_stats)
 {
 	struct net_device *dev = ieee->dev;
--- linux-mvl-dove-2.6.32.orig/drivers/staging/rtl8187se/ieee80211/ieee80211.h
+++ linux-mvl-dove-2.6.32/drivers/staging/rtl8187se/ieee80211/ieee80211.h
@@ -1318,13 +1318,13 @@
 	struct sk_buff *frag,
 	int hdr_len);
 
-extern int ieee80211_xmit(struct sk_buff *skb,
+extern int ieee80211_rtl_xmit(struct sk_buff *skb,
 			  struct net_device *dev);
 extern void ieee80211_txb_free(struct ieee80211_txb *);
 
 
 /* ieee80211_rx.c */
-extern int ieee80211_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
+extern int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
 			struct ieee80211_rx_stats *rx_stats);
 extern void ieee80211_rx_mgt(struct ieee80211_device *ieee,
 			     struct ieee80211_hdr_4addr *header,
@@ -1376,8 +1376,8 @@
 extern void ieee80211_softmac_start_protocol(struct ieee80211_device *ieee);
 extern void ieee80211_softmac_stop_protocol(struct ieee80211_device *ieee);
 extern void ieee80211_reset_queue(struct ieee80211_device *ieee);
-extern void ieee80211_wake_queue(struct ieee80211_device *ieee);
-extern void ieee80211_stop_queue(struct ieee80211_device *ieee);
+extern void ieee80211_rtl_wake_queue(struct ieee80211_device *ieee);
+extern void ieee80211_rtl_stop_queue(struct ieee80211_device *ieee);
 extern struct sk_buff *ieee80211_get_beacon(struct ieee80211_device *ieee);
 extern void ieee80211_start_send_beacons(struct ieee80211_device *ieee);
 extern void ieee80211_stop_send_beacons(struct ieee80211_device *ieee);
@@ -1385,7 +1385,7 @@
 extern void notify_wx_assoc_event(struct ieee80211_device *ieee);
 extern void ieee80211_ps_tx_ack(struct ieee80211_device *ieee, short success);
 extern void SendDisassociation(struct ieee80211_device *ieee,u8* asSta,u8 asRsn);
-extern void ieee80211_start_scan(struct ieee80211_device *ieee);
+extern void ieee80211_rtl_start_scan(struct ieee80211_device *ieee);
 
 //Add for RF power on power off by lizhaoming 080512
 extern void SendDisassociation(struct ieee80211_device *ieee,
--- linux-mvl-dove-2.6.32.orig/drivers/staging/usbip/vhci_rx.c
+++ linux-mvl-dove-2.6.32/drivers/staging/usbip/vhci_rx.c
@@ -21,16 +21,14 @@
 #include "vhci.h"
 
 
-/* get URB from transmitted urb queue */
-static struct urb *pickup_urb_and_free_priv(struct vhci_device *vdev,
+/* get URB from transmitted urb queue. caller must hold vdev->priv_lock */
+struct urb *pickup_urb_and_free_priv(struct vhci_device *vdev,
 					    __u32 seqnum)
 {
 	struct vhci_priv *priv, *tmp;
 	struct urb *urb = NULL;
 	int status;
 
-	spin_lock(&vdev->priv_lock);
-
 	list_for_each_entry_safe(priv, tmp, &vdev->priv_rx, list) {
 		if (priv->seqnum == seqnum) {
 			urb = priv->urb;
@@ -61,8 +59,6 @@
 		}
 	}
 
-	spin_unlock(&vdev->priv_lock);
-
 	return urb;
 }
 
@@ -72,9 +68,11 @@
 	struct usbip_device *ud = &vdev->ud;
 	struct urb *urb;
 
+	spin_lock(&vdev->priv_lock);
 
 	urb = pickup_urb_and_free_priv(vdev, pdu->base.seqnum);
 
+	spin_unlock(&vdev->priv_lock);
 
 	if (!urb) {
 		usbip_uerr("cannot find a urb of seqnum %u\n",
@@ -99,6 +97,9 @@
 	if (usbip_recv_iso(ud, urb) < 0)
 		return;
 
+	/* restore the padding in iso packets */
+	if (usbip_pad_iso(ud, urb) < 0)
+		return;
 
 	if (usbip_dbg_flag_vhci_rx)
 		usbip_dump_urb(urb);
@@ -159,7 +160,12 @@
 		return;
 	}
 
+	spin_lock(&vdev->priv_lock);
+
 	urb = pickup_urb_and_free_priv(vdev, unlink->unlink_seqnum);
+
+	spin_unlock(&vdev->priv_lock);
+
 	if (!urb) {
 		/*
 		 * I get the result of a unlink request. But, it seems that I
--- linux-mvl-dove-2.6.32.orig/drivers/staging/usbip/vhci.h
+++ linux-mvl-dove-2.6.32/drivers/staging/usbip/vhci.h
@@ -100,9 +100,6 @@
 	 * But, the index of this array begins from 0.
 	 */
 	struct vhci_device vdev[VHCI_NPORTS];
-
-	/* vhci_device which has not been assiged its address yet */
-	int pending_port;
 };
 
 
@@ -119,6 +116,9 @@
 void vhci_rx_loop(struct usbip_task *ut);
 void vhci_tx_loop(struct usbip_task *ut);
 
+struct urb *pickup_urb_and_free_priv(struct vhci_device *vdev,
+					    __u32 seqnum);
+
 #define hardware		(&the_controller->pdev.dev)
 
 static inline struct vhci_device *port_to_vdev(__u32 port)
--- linux-mvl-dove-2.6.32.orig/drivers/staging/usbip/vhci_hcd.c
+++ linux-mvl-dove-2.6.32/drivers/staging/usbip/vhci_hcd.c
@@ -137,8 +137,6 @@
 	 * the_controller->vdev[rhport].ud.status = VDEV_CONNECT;
 	 * spin_unlock(&the_controller->vdev[rhport].ud.lock); */
 
-	the_controller->pending_port = rhport;
-
 	spin_unlock_irqrestore(&the_controller->lock, flags);
 
 	usb_hcd_poll_rh_status(vhci_to_hcd(the_controller));
@@ -163,6 +161,8 @@
 	 * spin_unlock(&vdev->ud.lock); */
 
 	spin_unlock_irqrestore(&the_controller->lock, flags);
+
+	usb_hcd_poll_rh_status(vhci_to_hcd(the_controller));
 }
 
 
@@ -556,6 +556,7 @@
 	struct device *dev = &urb->dev->dev;
 	int ret = 0;
 	unsigned long flags;
+	struct vhci_device *vdev;
 
 	usbip_dbg_vhci_hc("enter, usb_hcd %p urb %p mem_flags %d\n",
 		    hcd, urb, mem_flags);
@@ -571,6 +572,18 @@
 		return urb->status;
 	}
 
+	vdev = port_to_vdev(urb->dev->portnum-1);
+
+	/* refuse enqueue for dead connection */
+	spin_lock(&vdev->ud.lock);
+	if (vdev->ud.status == VDEV_ST_NULL || vdev->ud.status == VDEV_ST_ERROR) {
+		usbip_uerr("enqueue for inactive port %d\n", vdev->rhport);
+		spin_unlock(&vdev->ud.lock);
+		spin_unlock_irqrestore(&the_controller->lock, flags);
+		return -ENODEV;
+	}
+	spin_unlock(&vdev->ud.lock);
+
 	ret = usb_hcd_link_urb_to_ep(hcd, urb);
 	if (ret)
 		goto no_need_unlink;
@@ -589,8 +602,6 @@
 		__u8 type = usb_pipetype(urb->pipe);
 		struct usb_ctrlrequest *ctrlreq =
 				(struct usb_ctrlrequest *) urb->setup_packet;
-		struct vhci_device *vdev =
-				port_to_vdev(the_controller->pending_port);
 
 		if (type != PIPE_CONTROL || !ctrlreq) {
 			dev_err(dev, "invalid request to devnum 0\n");
@@ -604,7 +615,9 @@
 			dev_info(dev, "SetAddress Request (%d) to port %d\n",
 				 ctrlreq->wValue, vdev->rhport);
 
-			vdev->udev = urb->dev;
+			if (vdev->udev)
+				usb_put_dev(vdev->udev);
+			vdev->udev = usb_get_dev(urb->dev);
 
 			spin_lock(&vdev->ud.lock);
 			vdev->ud.status = VDEV_ST_USED;
@@ -624,8 +637,9 @@
 						"Get_Descriptor to device 0 "
 						"(get max pipe size)\n");
 
-			/* FIXME: reference count? (usb_get_dev()) */
-			vdev->udev = urb->dev;
+			if (vdev->udev)
+				usb_put_dev(vdev->udev);
+			vdev->udev = usb_get_dev(urb->dev);
 			goto out;
 
 		default:
@@ -796,27 +810,12 @@
 		spin_unlock_irqrestore(&vdev->priv_lock, flags2);
 	}
 
-
-	if (!vdev->ud.tcp_socket) {
-		/* tcp connection is closed */
-		usbip_uinfo("vhci_hcd: vhci_urb_dequeue() gives back urb %p\n",
-									urb);
-
-		usb_hcd_unlink_urb_from_ep(hcd, urb);
-
-		spin_unlock_irqrestore(&the_controller->lock, flags);
-		usb_hcd_giveback_urb(vhci_to_hcd(the_controller), urb,
-								urb->status);
-		spin_lock_irqsave(&the_controller->lock, flags);
-	}
-
 	spin_unlock_irqrestore(&the_controller->lock, flags);
 
 	usbip_dbg_vhci_hc("leave\n");
 	return 0;
 }
 
-
 static void vhci_device_unlink_cleanup(struct vhci_device *vdev)
 {
 	struct vhci_unlink *unlink, *tmp;
@@ -824,11 +823,34 @@
 	spin_lock(&vdev->priv_lock);
 
 	list_for_each_entry_safe(unlink, tmp, &vdev->unlink_tx, list) {
+		usbip_uinfo("unlink cleanup tx %lu\n", unlink->unlink_seqnum);
 		list_del(&unlink->list);
 		kfree(unlink);
 	}
 
 	list_for_each_entry_safe(unlink, tmp, &vdev->unlink_rx, list) {
+		struct urb *urb;
+
+		/* give back URB of unanswered unlink request */
+		usbip_uinfo("unlink cleanup rx %lu\n", unlink->unlink_seqnum);
+
+		urb = pickup_urb_and_free_priv(vdev, unlink->unlink_seqnum);
+		if (!urb) {
+			usbip_uinfo("the urb (seqnum %lu) was already given back\n",
+							unlink->unlink_seqnum);
+			list_del(&unlink->list);
+			kfree(unlink);
+			continue;
+		}
+
+		urb->status = -ENODEV;
+
+		spin_lock(&the_controller->lock);
+		usb_hcd_unlink_urb_from_ep(vhci_to_hcd(the_controller), urb);
+		spin_unlock(&the_controller->lock);
+
+		usb_hcd_giveback_urb(vhci_to_hcd(the_controller), urb, urb->status);
+
 		list_del(&unlink->list);
 		kfree(unlink);
 	}
@@ -898,6 +920,10 @@
 	vdev->speed  = 0;
 	vdev->devid  = 0;
 
+	if (vdev->udev)
+		usb_put_dev(vdev->udev);
+	vdev->udev = NULL;
+
 	ud->tcp_socket = NULL;
 
 	ud->status = VDEV_ST_NULL;
@@ -1108,7 +1134,7 @@
 		usbip_uerr("create hcd failed\n");
 		return -ENOMEM;
 	}
-
+	hcd->has_tt = 1;
 
 	/* this is private data for vhci_hcd */
 	the_controller = hcd_to_vhci(hcd);
--- linux-mvl-dove-2.6.32.orig/drivers/staging/usbip/usbip_event.c
+++ linux-mvl-dove-2.6.32/drivers/staging/usbip/usbip_event.c
@@ -38,21 +38,13 @@
 			ud->eh_ops.shutdown(ud);
 
 			ud->event &= ~USBIP_EH_SHUTDOWN;
-
-			break;
 		}
 
-		/* Stop the error handler. */
-		if (ud->event & USBIP_EH_BYE)
-			return -1;
-
 		/* Reset the device. */
 		if (ud->event & USBIP_EH_RESET) {
 			ud->eh_ops.reset(ud);
 
 			ud->event &= ~USBIP_EH_RESET;
-
-			break;
 		}
 
 		/* Mark the device as unusable. */
@@ -60,13 +52,11 @@
 			ud->eh_ops.unusable(ud);
 
 			ud->event &= ~USBIP_EH_UNUSABLE;
-
-			break;
 		}
 
-		/* NOTREACHED */
-		printk(KERN_ERR "%s: unknown event\n", __func__);
-		return -1;
+		/* Stop the error handler. */
+		if (ud->event & USBIP_EH_BYE)
+			return -1;
 	}
 
 	return 0;
@@ -117,6 +107,9 @@
 {
 	struct usbip_task *eh = &ud->eh;
 
+	if (eh->thread == current)
+		return; /* do not wait for myself */
+
 	wait_for_completion(&eh->thread_done);
 	usbip_dbg_eh("usbip_eh has finished\n");
 }
--- linux-mvl-dove-2.6.32.orig/drivers/staging/usbip/usbip_common.h
+++ linux-mvl-dove-2.6.32/drivers/staging/usbip/usbip_common.h
@@ -393,6 +393,8 @@
 int usbip_recv_xbuff(struct usbip_device *ud, struct urb *urb);
 /* some members of urb must be substituted before. */
 int usbip_recv_iso(struct usbip_device *ud, struct urb *urb);
+/* some members of urb must be substituted before. */
+int usbip_pad_iso(struct usbip_device *ud, struct urb *urb);
 void *usbip_alloc_iso_desc_pdu(struct urb *urb, ssize_t *bufflen);
 
 
--- linux-mvl-dove-2.6.32.orig/drivers/staging/usbip/stub_tx.c
+++ linux-mvl-dove-2.6.32/drivers/staging/usbip/stub_tx.c
@@ -167,7 +167,6 @@
 	struct stub_priv *priv, *tmp;
 
 	struct msghdr msg;
-	struct kvec iov[3];
 	size_t txsize;
 
 	size_t total_size = 0;
@@ -177,28 +176,73 @@
 		struct urb *urb = priv->urb;
 		struct usbip_header pdu_header;
 		void *iso_buffer = NULL;
+		struct kvec *iov = NULL;
+		int iovnum = 0;
 
 		txsize = 0;
 		memset(&pdu_header, 0, sizeof(pdu_header));
 		memset(&msg, 0, sizeof(msg));
-		memset(&iov, 0, sizeof(iov));
 
-		usbip_dbg_stub_tx("setup txdata urb %p\n", urb);
+		if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS)
+			iovnum = 2 + urb->number_of_packets;
+		else
+			iovnum = 2;
+
+		iov = kzalloc(iovnum * sizeof(struct kvec), GFP_KERNEL);
 
+		if (!iov) {
+			usbip_event_add(&sdev->ud, SDEV_EVENT_ERROR_MALLOC);
+			return -1;
+		}
+
+		iovnum = 0;
 
 		/* 1. setup usbip_header */
 		setup_ret_submit_pdu(&pdu_header, urb);
+		usbip_dbg_stub_tx("setup txdata seqnum: %d urb: %p\n",
+						pdu_header.base.seqnum, urb);
+		/*usbip_dump_header(pdu_header);*/
 		usbip_header_correct_endian(&pdu_header, 1);
 
-		iov[0].iov_base = &pdu_header;
-		iov[0].iov_len  = sizeof(pdu_header);
+		iov[iovnum].iov_base = &pdu_header;
+		iov[iovnum].iov_len  = sizeof(pdu_header);
+		iovnum++;
 		txsize += sizeof(pdu_header);
 
 		/* 2. setup transfer buffer */
-		if (usb_pipein(urb->pipe) && urb->actual_length > 0) {
-			iov[1].iov_base = urb->transfer_buffer;
-			iov[1].iov_len  = urb->actual_length;
+		if (usb_pipein(urb->pipe) &&
+				usb_pipetype(urb->pipe) != PIPE_ISOCHRONOUS &&
+					urb->actual_length > 0) {
+			iov[iovnum].iov_base = urb->transfer_buffer;
+			iov[iovnum].iov_len  = urb->actual_length;
+			iovnum++;
 			txsize += urb->actual_length;
+		} else if (usb_pipein(urb->pipe) &&
+				usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
+			/*
+			 * For isochronous packets: actual length is the sum of
+			 * the actual length of the individual, packets, but as
+			 * the packet offsets are not changed there will be
+			 * padding between the packets. To optimally use the
+			 * bandwidth the padding is not transmitted.
+			 */
+
+			int i;
+			for (i = 0; i < urb->number_of_packets; i++) {
+				iov[iovnum].iov_base = urb->transfer_buffer + urb->iso_frame_desc[i].offset;
+				iov[iovnum].iov_len = urb->iso_frame_desc[i].actual_length;
+				iovnum++;
+				txsize += urb->iso_frame_desc[i].actual_length;
+			}
+
+			if (txsize != sizeof(pdu_header) + urb->actual_length) {
+				dev_err(&sdev->interface->dev,
+					"actual length of urb (%d) does not match iso packet sizes (%d)\n",
+					urb->actual_length, txsize-sizeof(pdu_header));
+				kfree(iov);
+				usbip_event_add(&sdev->ud, SDEV_EVENT_ERROR_TCP);
+			   return -1;
+			}
 		}
 
 		/* 3. setup iso_packet_descriptor */
@@ -209,32 +253,34 @@
 			if (!iso_buffer) {
 				usbip_event_add(&sdev->ud,
 						SDEV_EVENT_ERROR_MALLOC);
+				kfree(iov);
 				return -1;
 			}
 
-			iov[2].iov_base = iso_buffer;
-			iov[2].iov_len  = len;
+			iov[iovnum].iov_base = iso_buffer;
+			iov[iovnum].iov_len  = len;
 			txsize += len;
+			iovnum++;
 		}
 
-		ret = kernel_sendmsg(sdev->ud.tcp_socket, &msg, iov,
-				     3, txsize);
+		ret = kernel_sendmsg(sdev->ud.tcp_socket, &msg,
+						iov,  iovnum, txsize);
 		if (ret != txsize) {
 			dev_err(&sdev->interface->dev,
 				"sendmsg failed!, retval %d for %zd\n",
 				ret, txsize);
+			kfree(iov);
 			kfree(iso_buffer);
 			usbip_event_add(&sdev->ud, SDEV_EVENT_ERROR_TCP);
 			return -1;
 		}
 
+		kfree(iov);
 		kfree(iso_buffer);
-		usbip_dbg_stub_tx("send txdata\n");
 
 		total_size += txsize;
 	}
 
-
 	spin_lock_irqsave(&sdev->priv_lock, flags);
 
 	list_for_each_entry_safe(priv, tmp, &sdev->priv_free, list) {
--- linux-mvl-dove-2.6.32.orig/drivers/staging/usbip/stub_rx.c
+++ linux-mvl-dove-2.6.32/drivers/staging/usbip/stub_rx.c
@@ -168,33 +168,23 @@
 
 static int tweak_reset_device_cmd(struct urb *urb)
 {
-	struct usb_ctrlrequest *req;
-	__u16 value;
-	__u16 index;
-	int ret;
-
-	req = (struct usb_ctrlrequest *) urb->setup_packet;
-	value = le16_to_cpu(req->wValue);
-	index = le16_to_cpu(req->wIndex);
-
-	usbip_uinfo("reset_device (port %d) to %s\n", index,
-						dev_name(&urb->dev->dev));
-
-	/* all interfaces should be owned by usbip driver, so just reset it.  */
-	ret = usb_lock_device_for_reset(urb->dev, NULL);
-	if (ret < 0) {
-		dev_err(&urb->dev->dev, "lock for reset\n");
-		return ret;
-	}
+	struct stub_priv *priv = (struct stub_priv *) urb->context;
+	struct stub_device *sdev = priv->sdev;
 
-	/* try to reset the device */
-	ret = usb_reset_device(urb->dev);
-	if (ret < 0)
-		dev_err(&urb->dev->dev, "device reset\n");
+	usbip_uinfo("reset_device %s\n", dev_name(&urb->dev->dev));
 
-	usb_unlock_device(urb->dev);
-
-	return ret;
+	/*
+	 * usb_lock_device_for_reset caused a deadlock: it causes the driver
+	 * to unbind. In the shutdown the rx thread is signalled to shut down
+	 * but this thread is pending in the usb_lock_device_for_reset.
+	 *
+	 * Instead queue the reset.
+	 *
+	 * Unfortunatly an existing usbip connection will be dropped due to
+	 * driver unbinding.
+	 */
+	usb_queue_reset_device(sdev->interface);
+	return 0;
 }
 
 /*
--- linux-mvl-dove-2.6.32.orig/drivers/staging/usbip/usbip_common.c
+++ linux-mvl-dove-2.6.32/drivers/staging/usbip/usbip_common.c
@@ -361,10 +361,11 @@
 		usbip_udbg("CMD_UNLINK: seq %u\n", pdu->u.cmd_unlink.seqnum);
 		break;
 	case USBIP_RET_SUBMIT:
-		usbip_udbg("RET_SUBMIT: st %d al %u sf %d ec %d\n",
+		usbip_udbg("RET_SUBMIT: st %d al %u sf %d #p %d ec %d\n",
 				pdu->u.ret_submit.status,
 				pdu->u.ret_submit.actual_length,
 				pdu->u.ret_submit.start_frame,
+				pdu->u.ret_submit.number_of_packets,
 				pdu->u.ret_submit.error_count);
 	case USBIP_RET_UNLINK:
 		usbip_udbg("RET_UNLINK: status %d\n", pdu->u.ret_unlink.status);
@@ -686,6 +687,7 @@
 		rpdu->status		= urb->status;
 		rpdu->actual_length	= urb->actual_length;
 		rpdu->start_frame	= urb->start_frame;
+		rpdu->number_of_packets = urb->number_of_packets;
 		rpdu->error_count	= urb->error_count;
 	} else {
 		/* vhci_rx.c */
@@ -693,6 +695,7 @@
 		urb->status		= rpdu->status;
 		urb->actual_length	= rpdu->actual_length;
 		urb->start_frame	= rpdu->start_frame;
+		urb->number_of_packets = rpdu->number_of_packets;
 		urb->error_count	= rpdu->error_count;
 	}
 }
@@ -761,11 +764,13 @@
 		cpu_to_be32s(&pdu->status);
 		cpu_to_be32s(&pdu->actual_length);
 		cpu_to_be32s(&pdu->start_frame);
+		cpu_to_be32s(&pdu->number_of_packets);
 		cpu_to_be32s(&pdu->error_count);
 	} else {
 		be32_to_cpus(&pdu->status);
 		be32_to_cpus(&pdu->actual_length);
 		be32_to_cpus(&pdu->start_frame);
+		be32_to_cpus(&pdu->number_of_packets);
 		be32_to_cpus(&pdu->error_count);
 	}
 }
@@ -891,6 +896,7 @@
 	int size = np * sizeof(*iso);
 	int i;
 	int ret;
+	int total_length = 0;
 
 	if (!usb_pipeisoc(urb->pipe))
 		return 0;
@@ -920,19 +926,75 @@
 		return -EPIPE;
 	}
 
+
 	for (i = 0; i < np; i++) {
 		iso = buff + (i * sizeof(*iso));
 
 		usbip_iso_pakcet_correct_endian(iso, 0);
 		usbip_pack_iso(iso, &urb->iso_frame_desc[i], 0);
+		total_length += urb->iso_frame_desc[i].actual_length;
 	}
 
 	kfree(buff);
 
+	if (total_length != urb->actual_length) {
+		dev_err(&urb->dev->dev,
+		  "total length of iso packets (%d) not equal to actual length of buffer (%d)\n",
+		  total_length, urb->actual_length);
+
+		if (ud->side == USBIP_STUB)
+			usbip_event_add(ud, SDEV_EVENT_ERROR_TCP);
+		else
+			usbip_event_add(ud, VDEV_EVENT_ERROR_TCP);
+
+		return -EPIPE;
+	}
+
 	return ret;
 }
 EXPORT_SYMBOL_GPL(usbip_recv_iso);
 
+/*
+ * This functions restores the padding which was removed for optimizing
+ * the bandwidth during transfer over tcp/ip
+ *
+ * buffer and iso packets need to be stored and be in propeper endian in urb
+ * before calling this function
+ */
+int usbip_pad_iso(struct usbip_device *ud, struct urb *urb)
+{
+	int np = urb->number_of_packets;
+	int i;
+	int ret;
+	int actualoffset = urb->actual_length;
+
+	if (!usb_pipeisoc(urb->pipe))
+		return 0;
+
+	/* if no packets or length of data is 0, then nothing to unpack */
+	if (np == 0 || urb->actual_length == 0)
+		return 0;
+
+	/*
+	 * if actual_length is transfer_buffer_length then no padding is
+	 * present.
+	*/
+	if (urb->actual_length == urb->transfer_buffer_length)
+		return 0;
+
+	/*
+	 * loop over all packets from last to first (to prevent overwritting
+	 * memory when padding) and move them into the proper place
+	 */
+	for (i = np-1; i > 0; i--) {
+		actualoffset -= urb->iso_frame_desc[i].actual_length;
+		memmove(urb->transfer_buffer + urb->iso_frame_desc[i].offset,
+				  urb->transfer_buffer + actualoffset,
+				  urb->iso_frame_desc[i].actual_length);
+	}
+	return ret;
+}
+EXPORT_SYMBOL_GPL(usbip_pad_iso);
 
 /* some members of urb must be substituted before. */
 int usbip_recv_xbuff(struct usbip_device *ud, struct urb *urb)
--- linux-mvl-dove-2.6.32.orig/drivers/staging/line6/midi.c
+++ linux-mvl-dove-2.6.32/drivers/staging/line6/midi.c
@@ -349,8 +349,8 @@
 	return count;
 }
 
-static DEVICE_ATTR(midi_mask_transmit, S_IWUGO | S_IRUGO, midi_get_midi_mask_transmit, midi_set_midi_mask_transmit);
-static DEVICE_ATTR(midi_mask_receive, S_IWUGO | S_IRUGO, midi_get_midi_mask_receive, midi_set_midi_mask_receive);
+static DEVICE_ATTR(midi_mask_transmit, S_IWUSR | S_IRUGO, midi_get_midi_mask_transmit, midi_set_midi_mask_transmit);
+static DEVICE_ATTR(midi_mask_receive, S_IWUSR | S_IRUGO, midi_get_midi_mask_receive, midi_set_midi_mask_receive);
 
 /* MIDI device destructor */
 static int snd_line6_midi_free(struct snd_device *device)
--- linux-mvl-dove-2.6.32.orig/drivers/staging/line6/variax.c
+++ linux-mvl-dove-2.6.32/drivers/staging/line6/variax.c
@@ -366,17 +366,17 @@
 #endif
 
 /* Variax workbench special files: */
-static DEVICE_ATTR(model, S_IWUGO | S_IRUGO, variax_get_model, variax_set_model);
-static DEVICE_ATTR(volume, S_IWUGO | S_IRUGO, variax_get_volume, variax_set_volume);
-static DEVICE_ATTR(tone, S_IWUGO | S_IRUGO, variax_get_tone, variax_set_tone);
+static DEVICE_ATTR(model, S_IWUSR | S_IRUGO, variax_get_model, variax_set_model);
+static DEVICE_ATTR(volume, S_IWUSR | S_IRUGO, variax_get_volume, variax_set_volume);
+static DEVICE_ATTR(tone, S_IWUSR | S_IRUGO, variax_get_tone, variax_set_tone);
 static DEVICE_ATTR(name, S_IRUGO, variax_get_name, line6_nop_write);
 static DEVICE_ATTR(bank, S_IRUGO, variax_get_bank, line6_nop_write);
 static DEVICE_ATTR(dump, S_IRUGO, variax_get_dump, line6_nop_write);
-static DEVICE_ATTR(active, S_IWUGO | S_IRUGO, variax_get_active, variax_set_active);
+static DEVICE_ATTR(active, S_IWUSR | S_IRUGO, variax_get_active, variax_set_active);
 
 #if CREATE_RAW_FILE
-static DEVICE_ATTR(raw, S_IWUGO, line6_nop_read, line6_set_raw);
-static DEVICE_ATTR(raw2, S_IWUGO, line6_nop_read, variax_set_raw2);
+static DEVICE_ATTR(raw, S_IWUSR, line6_nop_read, line6_set_raw);
+static DEVICE_ATTR(raw2, S_IWUSR, line6_nop_read, variax_set_raw2);
 #endif
 
 
--- linux-mvl-dove-2.6.32.orig/drivers/staging/line6/pod.c
+++ linux-mvl-dove-2.6.32/drivers/staging/line6/pod.c
@@ -912,33 +912,33 @@
 #undef GET_SYSTEM_PARAM
 
 /* POD special files: */
-static DEVICE_ATTR(channel, S_IWUGO | S_IRUGO, pod_get_channel, pod_set_channel);
+static DEVICE_ATTR(channel, S_IWUSR | S_IRUGO, pod_get_channel, pod_set_channel);
 static DEVICE_ATTR(clip, S_IRUGO, pod_wait_for_clip, line6_nop_write);
 static DEVICE_ATTR(device_id, S_IRUGO, pod_get_device_id, line6_nop_write);
 static DEVICE_ATTR(dirty, S_IRUGO, pod_get_dirty, line6_nop_write);
-static DEVICE_ATTR(dump, S_IWUGO | S_IRUGO, pod_get_dump, pod_set_dump);
-static DEVICE_ATTR(dump_buf, S_IWUGO | S_IRUGO, pod_get_dump_buf, pod_set_dump_buf);
-static DEVICE_ATTR(finish, S_IWUGO, line6_nop_read, pod_set_finish);
+static DEVICE_ATTR(dump, S_IWUSR | S_IRUGO, pod_get_dump, pod_set_dump);
+static DEVICE_ATTR(dump_buf, S_IWUSR | S_IRUGO, pod_get_dump_buf, pod_set_dump_buf);
+static DEVICE_ATTR(finish, S_IWUSR, line6_nop_read, pod_set_finish);
 static DEVICE_ATTR(firmware_version, S_IRUGO, pod_get_firmware_version, line6_nop_write);
-static DEVICE_ATTR(midi_postprocess, S_IWUGO | S_IRUGO, pod_get_midi_postprocess, pod_set_midi_postprocess);
-static DEVICE_ATTR(monitor_level, S_IWUGO | S_IRUGO, pod_get_monitor_level, pod_set_monitor_level);
+static DEVICE_ATTR(midi_postprocess, S_IWUSR | S_IRUGO, pod_get_midi_postprocess, pod_set_midi_postprocess);
+static DEVICE_ATTR(monitor_level, S_IWUSR | S_IRUGO, pod_get_monitor_level, pod_set_monitor_level);
 static DEVICE_ATTR(name, S_IRUGO, pod_get_name, line6_nop_write);
 static DEVICE_ATTR(name_buf, S_IRUGO, pod_get_name_buf, line6_nop_write);
-static DEVICE_ATTR(retrieve_amp_setup, S_IWUGO, line6_nop_read, pod_set_retrieve_amp_setup);
-static DEVICE_ATTR(retrieve_channel, S_IWUGO, line6_nop_read, pod_set_retrieve_channel);
-static DEVICE_ATTR(retrieve_effects_setup, S_IWUGO, line6_nop_read, pod_set_retrieve_effects_setup);
-static DEVICE_ATTR(routing, S_IWUGO | S_IRUGO, pod_get_routing, pod_set_routing);
+static DEVICE_ATTR(retrieve_amp_setup, S_IWUSR, line6_nop_read, pod_set_retrieve_amp_setup);
+static DEVICE_ATTR(retrieve_channel, S_IWUSR, line6_nop_read, pod_set_retrieve_channel);
+static DEVICE_ATTR(retrieve_effects_setup, S_IWUSR, line6_nop_read, pod_set_retrieve_effects_setup);
+static DEVICE_ATTR(routing, S_IWUSR | S_IRUGO, pod_get_routing, pod_set_routing);
 static DEVICE_ATTR(serial_number, S_IRUGO, pod_get_serial_number, line6_nop_write);
-static DEVICE_ATTR(store_amp_setup, S_IWUGO, line6_nop_read, pod_set_store_amp_setup);
-static DEVICE_ATTR(store_channel, S_IWUGO, line6_nop_read, pod_set_store_channel);
-static DEVICE_ATTR(store_effects_setup, S_IWUGO, line6_nop_read, pod_set_store_effects_setup);
-static DEVICE_ATTR(tuner_freq, S_IWUGO | S_IRUGO, pod_get_tuner_freq, pod_set_tuner_freq);
-static DEVICE_ATTR(tuner_mute, S_IWUGO | S_IRUGO, pod_get_tuner_mute, pod_set_tuner_mute);
+static DEVICE_ATTR(store_amp_setup, S_IWUSR, line6_nop_read, pod_set_store_amp_setup);
+static DEVICE_ATTR(store_channel, S_IWUSR, line6_nop_read, pod_set_store_channel);
+static DEVICE_ATTR(store_effects_setup, S_IWUSR, line6_nop_read, pod_set_store_effects_setup);
+static DEVICE_ATTR(tuner_freq, S_IWUSR | S_IRUGO, pod_get_tuner_freq, pod_set_tuner_freq);
+static DEVICE_ATTR(tuner_mute, S_IWUSR | S_IRUGO, pod_get_tuner_mute, pod_set_tuner_mute);
 static DEVICE_ATTR(tuner_note, S_IRUGO, pod_get_tuner_note, line6_nop_write);
 static DEVICE_ATTR(tuner_pitch, S_IRUGO, pod_get_tuner_pitch, line6_nop_write);
 
 #if CREATE_RAW_FILE
-static DEVICE_ATTR(raw, S_IWUGO, line6_nop_read, line6_set_raw);
+static DEVICE_ATTR(raw, S_IWUSR, line6_nop_read, line6_set_raw);
 #endif
 
 /*
--- linux-mvl-dove-2.6.32.orig/drivers/staging/line6/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/staging/line6/Kconfig
@@ -2,6 +2,7 @@
 	tristate "Line6 USB support"
 	depends on USB && SND
 	select SND_RAWMIDI
+	select SND_PCM
 	help
 	  This is a driver for the guitar amp, cab, and effects modeller
 	  PODxt Pro by Line6 (and similar devices), supporting the
--- linux-mvl-dove-2.6.32.orig/drivers/staging/line6/toneport.c
+++ linux-mvl-dove-2.6.32/drivers/staging/line6/toneport.c
@@ -117,8 +117,8 @@
 	return count;
 }
 
-static DEVICE_ATTR(led_red, S_IWUGO | S_IRUGO, line6_nop_read, toneport_set_led_red);
-static DEVICE_ATTR(led_green, S_IWUGO | S_IRUGO, line6_nop_read, toneport_set_led_green);
+static DEVICE_ATTR(led_red, S_IWUSR | S_IRUGO, line6_nop_read, toneport_set_led_red);
+static DEVICE_ATTR(led_green, S_IWUSR | S_IRUGO, line6_nop_read, toneport_set_led_green);
 
 
 static int toneport_send_cmd(struct usb_device *usbdev, int cmd1, int cmd2)
--- linux-mvl-dove-2.6.32.orig/drivers/staging/line6/control.c
+++ linux-mvl-dove-2.6.32/drivers/staging/line6/control.c
@@ -259,108 +259,108 @@
 VARIAX_PARAM_R(float, mix1);
 VARIAX_PARAM_R(int, pickup_wiring);
 
-static DEVICE_ATTR(tweak, S_IWUGO | S_IRUGO, pod_get_tweak, pod_set_tweak);
-static DEVICE_ATTR(wah_position, S_IWUGO | S_IRUGO, pod_get_wah_position, pod_set_wah_position);
-static DEVICE_ATTR(compression_gain, S_IWUGO | S_IRUGO, pod_get_compression_gain, pod_set_compression_gain);
-static DEVICE_ATTR(vol_pedal_position, S_IWUGO | S_IRUGO, pod_get_vol_pedal_position, pod_set_vol_pedal_position);
-static DEVICE_ATTR(compression_threshold, S_IWUGO | S_IRUGO, pod_get_compression_threshold, pod_set_compression_threshold);
-static DEVICE_ATTR(pan, S_IWUGO | S_IRUGO, pod_get_pan, pod_set_pan);
-static DEVICE_ATTR(amp_model_setup, S_IWUGO | S_IRUGO, pod_get_amp_model_setup, pod_set_amp_model_setup);
-static DEVICE_ATTR(amp_model, S_IWUGO | S_IRUGO, pod_get_amp_model, pod_set_amp_model);
-static DEVICE_ATTR(drive, S_IWUGO | S_IRUGO, pod_get_drive, pod_set_drive);
-static DEVICE_ATTR(bass, S_IWUGO | S_IRUGO, pod_get_bass, pod_set_bass);
-static DEVICE_ATTR(mid, S_IWUGO | S_IRUGO, pod_get_mid, pod_set_mid);
-static DEVICE_ATTR(lowmid, S_IWUGO | S_IRUGO, pod_get_lowmid, pod_set_lowmid);
-static DEVICE_ATTR(treble, S_IWUGO | S_IRUGO, pod_get_treble, pod_set_treble);
-static DEVICE_ATTR(highmid, S_IWUGO | S_IRUGO, pod_get_highmid, pod_set_highmid);
-static DEVICE_ATTR(chan_vol, S_IWUGO | S_IRUGO, pod_get_chan_vol, pod_set_chan_vol);
-static DEVICE_ATTR(reverb_mix, S_IWUGO | S_IRUGO, pod_get_reverb_mix, pod_set_reverb_mix);
-static DEVICE_ATTR(effect_setup, S_IWUGO | S_IRUGO, pod_get_effect_setup, pod_set_effect_setup);
-static DEVICE_ATTR(band_1_frequency, S_IWUGO | S_IRUGO, pod_get_band_1_frequency, pod_set_band_1_frequency);
-static DEVICE_ATTR(presence, S_IWUGO | S_IRUGO, pod_get_presence, pod_set_presence);
-static DEVICE_ATTR2(treble__bass, treble, S_IWUGO | S_IRUGO, pod_get_treble__bass, pod_set_treble__bass);
-static DEVICE_ATTR(noise_gate_enable, S_IWUGO | S_IRUGO, pod_get_noise_gate_enable, pod_set_noise_gate_enable);
-static DEVICE_ATTR(gate_threshold, S_IWUGO | S_IRUGO, pod_get_gate_threshold, pod_set_gate_threshold);
-static DEVICE_ATTR(gate_decay_time, S_IWUGO | S_IRUGO, pod_get_gate_decay_time, pod_set_gate_decay_time);
-static DEVICE_ATTR(stomp_enable, S_IWUGO | S_IRUGO, pod_get_stomp_enable, pod_set_stomp_enable);
-static DEVICE_ATTR(comp_enable, S_IWUGO | S_IRUGO, pod_get_comp_enable, pod_set_comp_enable);
-static DEVICE_ATTR(stomp_time, S_IWUGO | S_IRUGO, pod_get_stomp_time, pod_set_stomp_time);
-static DEVICE_ATTR(delay_enable, S_IWUGO | S_IRUGO, pod_get_delay_enable, pod_set_delay_enable);
-static DEVICE_ATTR(mod_param_1, S_IWUGO | S_IRUGO, pod_get_mod_param_1, pod_set_mod_param_1);
-static DEVICE_ATTR(delay_param_1, S_IWUGO | S_IRUGO, pod_get_delay_param_1, pod_set_delay_param_1);
-static DEVICE_ATTR(delay_param_1_note_value, S_IWUGO | S_IRUGO, pod_get_delay_param_1_note_value, pod_set_delay_param_1_note_value);
-static DEVICE_ATTR2(band_2_frequency__bass, band_2_frequency, S_IWUGO | S_IRUGO, pod_get_band_2_frequency__bass, pod_set_band_2_frequency__bass);
-static DEVICE_ATTR(delay_param_2, S_IWUGO | S_IRUGO, pod_get_delay_param_2, pod_set_delay_param_2);
-static DEVICE_ATTR(delay_volume_mix, S_IWUGO | S_IRUGO, pod_get_delay_volume_mix, pod_set_delay_volume_mix);
-static DEVICE_ATTR(delay_param_3, S_IWUGO | S_IRUGO, pod_get_delay_param_3, pod_set_delay_param_3);
-static DEVICE_ATTR(reverb_enable, S_IWUGO | S_IRUGO, pod_get_reverb_enable, pod_set_reverb_enable);
-static DEVICE_ATTR(reverb_type, S_IWUGO | S_IRUGO, pod_get_reverb_type, pod_set_reverb_type);
-static DEVICE_ATTR(reverb_decay, S_IWUGO | S_IRUGO, pod_get_reverb_decay, pod_set_reverb_decay);
-static DEVICE_ATTR(reverb_tone, S_IWUGO | S_IRUGO, pod_get_reverb_tone, pod_set_reverb_tone);
-static DEVICE_ATTR(reverb_pre_delay, S_IWUGO | S_IRUGO, pod_get_reverb_pre_delay, pod_set_reverb_pre_delay);
-static DEVICE_ATTR(reverb_pre_post, S_IWUGO | S_IRUGO, pod_get_reverb_pre_post, pod_set_reverb_pre_post);
-static DEVICE_ATTR(band_2_frequency, S_IWUGO | S_IRUGO, pod_get_band_2_frequency, pod_set_band_2_frequency);
-static DEVICE_ATTR2(band_3_frequency__bass, band_3_frequency, S_IWUGO | S_IRUGO, pod_get_band_3_frequency__bass, pod_set_band_3_frequency__bass);
-static DEVICE_ATTR(wah_enable, S_IWUGO | S_IRUGO, pod_get_wah_enable, pod_set_wah_enable);
-static DEVICE_ATTR(modulation_lo_cut, S_IWUGO | S_IRUGO, pod_get_modulation_lo_cut, pod_set_modulation_lo_cut);
-static DEVICE_ATTR(delay_reverb_lo_cut, S_IWUGO | S_IRUGO, pod_get_delay_reverb_lo_cut, pod_set_delay_reverb_lo_cut);
-static DEVICE_ATTR(volume_pedal_minimum, S_IWUGO | S_IRUGO, pod_get_volume_pedal_minimum, pod_set_volume_pedal_minimum);
-static DEVICE_ATTR(eq_pre_post, S_IWUGO | S_IRUGO, pod_get_eq_pre_post, pod_set_eq_pre_post);
-static DEVICE_ATTR(volume_pre_post, S_IWUGO | S_IRUGO, pod_get_volume_pre_post, pod_set_volume_pre_post);
-static DEVICE_ATTR(di_model, S_IWUGO | S_IRUGO, pod_get_di_model, pod_set_di_model);
-static DEVICE_ATTR(di_delay, S_IWUGO | S_IRUGO, pod_get_di_delay, pod_set_di_delay);
-static DEVICE_ATTR(mod_enable, S_IWUGO | S_IRUGO, pod_get_mod_enable, pod_set_mod_enable);
-static DEVICE_ATTR(mod_param_1_note_value, S_IWUGO | S_IRUGO, pod_get_mod_param_1_note_value, pod_set_mod_param_1_note_value);
-static DEVICE_ATTR(mod_param_2, S_IWUGO | S_IRUGO, pod_get_mod_param_2, pod_set_mod_param_2);
-static DEVICE_ATTR(mod_param_3, S_IWUGO | S_IRUGO, pod_get_mod_param_3, pod_set_mod_param_3);
-static DEVICE_ATTR(mod_param_4, S_IWUGO | S_IRUGO, pod_get_mod_param_4, pod_set_mod_param_4);
-static DEVICE_ATTR(mod_param_5, S_IWUGO | S_IRUGO, pod_get_mod_param_5, pod_set_mod_param_5);
-static DEVICE_ATTR(mod_volume_mix, S_IWUGO | S_IRUGO, pod_get_mod_volume_mix, pod_set_mod_volume_mix);
-static DEVICE_ATTR(mod_pre_post, S_IWUGO | S_IRUGO, pod_get_mod_pre_post, pod_set_mod_pre_post);
-static DEVICE_ATTR(modulation_model, S_IWUGO | S_IRUGO, pod_get_modulation_model, pod_set_modulation_model);
-static DEVICE_ATTR(band_3_frequency, S_IWUGO | S_IRUGO, pod_get_band_3_frequency, pod_set_band_3_frequency);
-static DEVICE_ATTR2(band_4_frequency__bass, band_4_frequency, S_IWUGO | S_IRUGO, pod_get_band_4_frequency__bass, pod_set_band_4_frequency__bass);
-static DEVICE_ATTR(mod_param_1_double_precision, S_IWUGO | S_IRUGO, pod_get_mod_param_1_double_precision, pod_set_mod_param_1_double_precision);
-static DEVICE_ATTR(delay_param_1_double_precision, S_IWUGO | S_IRUGO, pod_get_delay_param_1_double_precision, pod_set_delay_param_1_double_precision);
-static DEVICE_ATTR(eq_enable, S_IWUGO | S_IRUGO, pod_get_eq_enable, pod_set_eq_enable);
-static DEVICE_ATTR(tap, S_IWUGO | S_IRUGO, pod_get_tap, pod_set_tap);
-static DEVICE_ATTR(volume_tweak_pedal_assign, S_IWUGO | S_IRUGO, pod_get_volume_tweak_pedal_assign, pod_set_volume_tweak_pedal_assign);
-static DEVICE_ATTR(band_5_frequency, S_IWUGO | S_IRUGO, pod_get_band_5_frequency, pod_set_band_5_frequency);
-static DEVICE_ATTR(tuner, S_IWUGO | S_IRUGO, pod_get_tuner, pod_set_tuner);
-static DEVICE_ATTR(mic_selection, S_IWUGO | S_IRUGO, pod_get_mic_selection, pod_set_mic_selection);
-static DEVICE_ATTR(cabinet_model, S_IWUGO | S_IRUGO, pod_get_cabinet_model, pod_set_cabinet_model);
-static DEVICE_ATTR(stomp_model, S_IWUGO | S_IRUGO, pod_get_stomp_model, pod_set_stomp_model);
-static DEVICE_ATTR(roomlevel, S_IWUGO | S_IRUGO, pod_get_roomlevel, pod_set_roomlevel);
-static DEVICE_ATTR(band_4_frequency, S_IWUGO | S_IRUGO, pod_get_band_4_frequency, pod_set_band_4_frequency);
-static DEVICE_ATTR(band_6_frequency, S_IWUGO | S_IRUGO, pod_get_band_6_frequency, pod_set_band_6_frequency);
-static DEVICE_ATTR(stomp_param_1_note_value, S_IWUGO | S_IRUGO, pod_get_stomp_param_1_note_value, pod_set_stomp_param_1_note_value);
-static DEVICE_ATTR(stomp_param_2, S_IWUGO | S_IRUGO, pod_get_stomp_param_2, pod_set_stomp_param_2);
-static DEVICE_ATTR(stomp_param_3, S_IWUGO | S_IRUGO, pod_get_stomp_param_3, pod_set_stomp_param_3);
-static DEVICE_ATTR(stomp_param_4, S_IWUGO | S_IRUGO, pod_get_stomp_param_4, pod_set_stomp_param_4);
-static DEVICE_ATTR(stomp_param_5, S_IWUGO | S_IRUGO, pod_get_stomp_param_5, pod_set_stomp_param_5);
-static DEVICE_ATTR(stomp_param_6, S_IWUGO | S_IRUGO, pod_get_stomp_param_6, pod_set_stomp_param_6);
-static DEVICE_ATTR(amp_switch_select, S_IWUGO | S_IRUGO, pod_get_amp_switch_select, pod_set_amp_switch_select);
-static DEVICE_ATTR(delay_param_4, S_IWUGO | S_IRUGO, pod_get_delay_param_4, pod_set_delay_param_4);
-static DEVICE_ATTR(delay_param_5, S_IWUGO | S_IRUGO, pod_get_delay_param_5, pod_set_delay_param_5);
-static DEVICE_ATTR(delay_pre_post, S_IWUGO | S_IRUGO, pod_get_delay_pre_post, pod_set_delay_pre_post);
-static DEVICE_ATTR(delay_model, S_IWUGO | S_IRUGO, pod_get_delay_model, pod_set_delay_model);
-static DEVICE_ATTR(delay_verb_model, S_IWUGO | S_IRUGO, pod_get_delay_verb_model, pod_set_delay_verb_model);
-static DEVICE_ATTR(tempo_msb, S_IWUGO | S_IRUGO, pod_get_tempo_msb, pod_set_tempo_msb);
-static DEVICE_ATTR(tempo_lsb, S_IWUGO | S_IRUGO, pod_get_tempo_lsb, pod_set_tempo_lsb);
-static DEVICE_ATTR(wah_model, S_IWUGO | S_IRUGO, pod_get_wah_model, pod_set_wah_model);
-static DEVICE_ATTR(bypass_volume, S_IWUGO | S_IRUGO, pod_get_bypass_volume, pod_set_bypass_volume);
-static DEVICE_ATTR(fx_loop_on_off, S_IWUGO | S_IRUGO, pod_get_fx_loop_on_off, pod_set_fx_loop_on_off);
-static DEVICE_ATTR(tweak_param_select, S_IWUGO | S_IRUGO, pod_get_tweak_param_select, pod_set_tweak_param_select);
-static DEVICE_ATTR(amp1_engage, S_IWUGO | S_IRUGO, pod_get_amp1_engage, pod_set_amp1_engage);
-static DEVICE_ATTR(band_1_gain, S_IWUGO | S_IRUGO, pod_get_band_1_gain, pod_set_band_1_gain);
-static DEVICE_ATTR2(band_2_gain__bass, band_2_gain, S_IWUGO | S_IRUGO, pod_get_band_2_gain__bass, pod_set_band_2_gain__bass);
-static DEVICE_ATTR(band_2_gain, S_IWUGO | S_IRUGO, pod_get_band_2_gain, pod_set_band_2_gain);
-static DEVICE_ATTR2(band_3_gain__bass, band_3_gain, S_IWUGO | S_IRUGO, pod_get_band_3_gain__bass, pod_set_band_3_gain__bass);
-static DEVICE_ATTR(band_3_gain, S_IWUGO | S_IRUGO, pod_get_band_3_gain, pod_set_band_3_gain);
-static DEVICE_ATTR2(band_4_gain__bass, band_4_gain, S_IWUGO | S_IRUGO, pod_get_band_4_gain__bass, pod_set_band_4_gain__bass);
-static DEVICE_ATTR2(band_5_gain__bass, band_5_gain, S_IWUGO | S_IRUGO, pod_get_band_5_gain__bass, pod_set_band_5_gain__bass);
-static DEVICE_ATTR(band_4_gain, S_IWUGO | S_IRUGO, pod_get_band_4_gain, pod_set_band_4_gain);
-static DEVICE_ATTR2(band_6_gain__bass, band_6_gain, S_IWUGO | S_IRUGO, pod_get_band_6_gain__bass, pod_set_band_6_gain__bass);
+static DEVICE_ATTR(tweak, S_IWUSR | S_IRUGO, pod_get_tweak, pod_set_tweak);
+static DEVICE_ATTR(wah_position, S_IWUSR | S_IRUGO, pod_get_wah_position, pod_set_wah_position);
+static DEVICE_ATTR(compression_gain, S_IWUSR | S_IRUGO, pod_get_compression_gain, pod_set_compression_gain);
+static DEVICE_ATTR(vol_pedal_position, S_IWUSR | S_IRUGO, pod_get_vol_pedal_position, pod_set_vol_pedal_position);
+static DEVICE_ATTR(compression_threshold, S_IWUSR | S_IRUGO, pod_get_compression_threshold, pod_set_compression_threshold);
+static DEVICE_ATTR(pan, S_IWUSR | S_IRUGO, pod_get_pan, pod_set_pan);
+static DEVICE_ATTR(amp_model_setup, S_IWUSR | S_IRUGO, pod_get_amp_model_setup, pod_set_amp_model_setup);
+static DEVICE_ATTR(amp_model, S_IWUSR | S_IRUGO, pod_get_amp_model, pod_set_amp_model);
+static DEVICE_ATTR(drive, S_IWUSR | S_IRUGO, pod_get_drive, pod_set_drive);
+static DEVICE_ATTR(bass, S_IWUSR | S_IRUGO, pod_get_bass, pod_set_bass);
+static DEVICE_ATTR(mid, S_IWUSR | S_IRUGO, pod_get_mid, pod_set_mid);
+static DEVICE_ATTR(lowmid, S_IWUSR | S_IRUGO, pod_get_lowmid, pod_set_lowmid);
+static DEVICE_ATTR(treble, S_IWUSR | S_IRUGO, pod_get_treble, pod_set_treble);
+static DEVICE_ATTR(highmid, S_IWUSR | S_IRUGO, pod_get_highmid, pod_set_highmid);
+static DEVICE_ATTR(chan_vol, S_IWUSR | S_IRUGO, pod_get_chan_vol, pod_set_chan_vol);
+static DEVICE_ATTR(reverb_mix, S_IWUSR | S_IRUGO, pod_get_reverb_mix, pod_set_reverb_mix);
+static DEVICE_ATTR(effect_setup, S_IWUSR | S_IRUGO, pod_get_effect_setup, pod_set_effect_setup);
+static DEVICE_ATTR(band_1_frequency, S_IWUSR | S_IRUGO, pod_get_band_1_frequency, pod_set_band_1_frequency);
+static DEVICE_ATTR(presence, S_IWUSR | S_IRUGO, pod_get_presence, pod_set_presence);
+static DEVICE_ATTR2(treble__bass, treble, S_IWUSR | S_IRUGO, pod_get_treble__bass, pod_set_treble__bass);
+static DEVICE_ATTR(noise_gate_enable, S_IWUSR | S_IRUGO, pod_get_noise_gate_enable, pod_set_noise_gate_enable);
+static DEVICE_ATTR(gate_threshold, S_IWUSR | S_IRUGO, pod_get_gate_threshold, pod_set_gate_threshold);
+static DEVICE_ATTR(gate_decay_time, S_IWUSR | S_IRUGO, pod_get_gate_decay_time, pod_set_gate_decay_time);
+static DEVICE_ATTR(stomp_enable, S_IWUSR | S_IRUGO, pod_get_stomp_enable, pod_set_stomp_enable);
+static DEVICE_ATTR(comp_enable, S_IWUSR | S_IRUGO, pod_get_comp_enable, pod_set_comp_enable);
+static DEVICE_ATTR(stomp_time, S_IWUSR | S_IRUGO, pod_get_stomp_time, pod_set_stomp_time);
+static DEVICE_ATTR(delay_enable, S_IWUSR | S_IRUGO, pod_get_delay_enable, pod_set_delay_enable);
+static DEVICE_ATTR(mod_param_1, S_IWUSR | S_IRUGO, pod_get_mod_param_1, pod_set_mod_param_1);
+static DEVICE_ATTR(delay_param_1, S_IWUSR | S_IRUGO, pod_get_delay_param_1, pod_set_delay_param_1);
+static DEVICE_ATTR(delay_param_1_note_value, S_IWUSR | S_IRUGO, pod_get_delay_param_1_note_value, pod_set_delay_param_1_note_value);
+static DEVICE_ATTR2(band_2_frequency__bass, band_2_frequency, S_IWUSR | S_IRUGO, pod_get_band_2_frequency__bass, pod_set_band_2_frequency__bass);
+static DEVICE_ATTR(delay_param_2, S_IWUSR | S_IRUGO, pod_get_delay_param_2, pod_set_delay_param_2);
+static DEVICE_ATTR(delay_volume_mix, S_IWUSR | S_IRUGO, pod_get_delay_volume_mix, pod_set_delay_volume_mix);
+static DEVICE_ATTR(delay_param_3, S_IWUSR | S_IRUGO, pod_get_delay_param_3, pod_set_delay_param_3);
+static DEVICE_ATTR(reverb_enable, S_IWUSR | S_IRUGO, pod_get_reverb_enable, pod_set_reverb_enable);
+static DEVICE_ATTR(reverb_type, S_IWUSR | S_IRUGO, pod_get_reverb_type, pod_set_reverb_type);
+static DEVICE_ATTR(reverb_decay, S_IWUSR | S_IRUGO, pod_get_reverb_decay, pod_set_reverb_decay);
+static DEVICE_ATTR(reverb_tone, S_IWUSR | S_IRUGO, pod_get_reverb_tone, pod_set_reverb_tone);
+static DEVICE_ATTR(reverb_pre_delay, S_IWUSR | S_IRUGO, pod_get_reverb_pre_delay, pod_set_reverb_pre_delay);
+static DEVICE_ATTR(reverb_pre_post, S_IWUSR | S_IRUGO, pod_get_reverb_pre_post, pod_set_reverb_pre_post);
+static DEVICE_ATTR(band_2_frequency, S_IWUSR | S_IRUGO, pod_get_band_2_frequency, pod_set_band_2_frequency);
+static DEVICE_ATTR2(band_3_frequency__bass, band_3_frequency, S_IWUSR | S_IRUGO, pod_get_band_3_frequency__bass, pod_set_band_3_frequency__bass);
+static DEVICE_ATTR(wah_enable, S_IWUSR | S_IRUGO, pod_get_wah_enable, pod_set_wah_enable);
+static DEVICE_ATTR(modulation_lo_cut, S_IWUSR | S_IRUGO, pod_get_modulation_lo_cut, pod_set_modulation_lo_cut);
+static DEVICE_ATTR(delay_reverb_lo_cut, S_IWUSR | S_IRUGO, pod_get_delay_reverb_lo_cut, pod_set_delay_reverb_lo_cut);
+static DEVICE_ATTR(volume_pedal_minimum, S_IWUSR | S_IRUGO, pod_get_volume_pedal_minimum, pod_set_volume_pedal_minimum);
+static DEVICE_ATTR(eq_pre_post, S_IWUSR | S_IRUGO, pod_get_eq_pre_post, pod_set_eq_pre_post);
+static DEVICE_ATTR(volume_pre_post, S_IWUSR | S_IRUGO, pod_get_volume_pre_post, pod_set_volume_pre_post);
+static DEVICE_ATTR(di_model, S_IWUSR | S_IRUGO, pod_get_di_model, pod_set_di_model);
+static DEVICE_ATTR(di_delay, S_IWUSR | S_IRUGO, pod_get_di_delay, pod_set_di_delay);
+static DEVICE_ATTR(mod_enable, S_IWUSR | S_IRUGO, pod_get_mod_enable, pod_set_mod_enable);
+static DEVICE_ATTR(mod_param_1_note_value, S_IWUSR | S_IRUGO, pod_get_mod_param_1_note_value, pod_set_mod_param_1_note_value);
+static DEVICE_ATTR(mod_param_2, S_IWUSR | S_IRUGO, pod_get_mod_param_2, pod_set_mod_param_2);
+static DEVICE_ATTR(mod_param_3, S_IWUSR | S_IRUGO, pod_get_mod_param_3, pod_set_mod_param_3);
+static DEVICE_ATTR(mod_param_4, S_IWUSR | S_IRUGO, pod_get_mod_param_4, pod_set_mod_param_4);
+static DEVICE_ATTR(mod_param_5, S_IWUSR | S_IRUGO, pod_get_mod_param_5, pod_set_mod_param_5);
+static DEVICE_ATTR(mod_volume_mix, S_IWUSR | S_IRUGO, pod_get_mod_volume_mix, pod_set_mod_volume_mix);
+static DEVICE_ATTR(mod_pre_post, S_IWUSR | S_IRUGO, pod_get_mod_pre_post, pod_set_mod_pre_post);
+static DEVICE_ATTR(modulation_model, S_IWUSR | S_IRUGO, pod_get_modulation_model, pod_set_modulation_model);
+static DEVICE_ATTR(band_3_frequency, S_IWUSR | S_IRUGO, pod_get_band_3_frequency, pod_set_band_3_frequency);
+static DEVICE_ATTR2(band_4_frequency__bass, band_4_frequency, S_IWUSR | S_IRUGO, pod_get_band_4_frequency__bass, pod_set_band_4_frequency__bass);
+static DEVICE_ATTR(mod_param_1_double_precision, S_IWUSR | S_IRUGO, pod_get_mod_param_1_double_precision, pod_set_mod_param_1_double_precision);
+static DEVICE_ATTR(delay_param_1_double_precision, S_IWUSR | S_IRUGO, pod_get_delay_param_1_double_precision, pod_set_delay_param_1_double_precision);
+static DEVICE_ATTR(eq_enable, S_IWUSR | S_IRUGO, pod_get_eq_enable, pod_set_eq_enable);
+static DEVICE_ATTR(tap, S_IWUSR | S_IRUGO, pod_get_tap, pod_set_tap);
+static DEVICE_ATTR(volume_tweak_pedal_assign, S_IWUSR | S_IRUGO, pod_get_volume_tweak_pedal_assign, pod_set_volume_tweak_pedal_assign);
+static DEVICE_ATTR(band_5_frequency, S_IWUSR | S_IRUGO, pod_get_band_5_frequency, pod_set_band_5_frequency);
+static DEVICE_ATTR(tuner, S_IWUSR | S_IRUGO, pod_get_tuner, pod_set_tuner);
+static DEVICE_ATTR(mic_selection, S_IWUSR | S_IRUGO, pod_get_mic_selection, pod_set_mic_selection);
+static DEVICE_ATTR(cabinet_model, S_IWUSR | S_IRUGO, pod_get_cabinet_model, pod_set_cabinet_model);
+static DEVICE_ATTR(stomp_model, S_IWUSR | S_IRUGO, pod_get_stomp_model, pod_set_stomp_model);
+static DEVICE_ATTR(roomlevel, S_IWUSR | S_IRUGO, pod_get_roomlevel, pod_set_roomlevel);
+static DEVICE_ATTR(band_4_frequency, S_IWUSR | S_IRUGO, pod_get_band_4_frequency, pod_set_band_4_frequency);
+static DEVICE_ATTR(band_6_frequency, S_IWUSR | S_IRUGO, pod_get_band_6_frequency, pod_set_band_6_frequency);
+static DEVICE_ATTR(stomp_param_1_note_value, S_IWUSR | S_IRUGO, pod_get_stomp_param_1_note_value, pod_set_stomp_param_1_note_value);
+static DEVICE_ATTR(stomp_param_2, S_IWUSR | S_IRUGO, pod_get_stomp_param_2, pod_set_stomp_param_2);
+static DEVICE_ATTR(stomp_param_3, S_IWUSR | S_IRUGO, pod_get_stomp_param_3, pod_set_stomp_param_3);
+static DEVICE_ATTR(stomp_param_4, S_IWUSR | S_IRUGO, pod_get_stomp_param_4, pod_set_stomp_param_4);
+static DEVICE_ATTR(stomp_param_5, S_IWUSR | S_IRUGO, pod_get_stomp_param_5, pod_set_stomp_param_5);
+static DEVICE_ATTR(stomp_param_6, S_IWUSR | S_IRUGO, pod_get_stomp_param_6, pod_set_stomp_param_6);
+static DEVICE_ATTR(amp_switch_select, S_IWUSR | S_IRUGO, pod_get_amp_switch_select, pod_set_amp_switch_select);
+static DEVICE_ATTR(delay_param_4, S_IWUSR | S_IRUGO, pod_get_delay_param_4, pod_set_delay_param_4);
+static DEVICE_ATTR(delay_param_5, S_IWUSR | S_IRUGO, pod_get_delay_param_5, pod_set_delay_param_5);
+static DEVICE_ATTR(delay_pre_post, S_IWUSR | S_IRUGO, pod_get_delay_pre_post, pod_set_delay_pre_post);
+static DEVICE_ATTR(delay_model, S_IWUSR | S_IRUGO, pod_get_delay_model, pod_set_delay_model);
+static DEVICE_ATTR(delay_verb_model, S_IWUSR | S_IRUGO, pod_get_delay_verb_model, pod_set_delay_verb_model);
+static DEVICE_ATTR(tempo_msb, S_IWUSR | S_IRUGO, pod_get_tempo_msb, pod_set_tempo_msb);
+static DEVICE_ATTR(tempo_lsb, S_IWUSR | S_IRUGO, pod_get_tempo_lsb, pod_set_tempo_lsb);
+static DEVICE_ATTR(wah_model, S_IWUSR | S_IRUGO, pod_get_wah_model, pod_set_wah_model);
+static DEVICE_ATTR(bypass_volume, S_IWUSR | S_IRUGO, pod_get_bypass_volume, pod_set_bypass_volume);
+static DEVICE_ATTR(fx_loop_on_off, S_IWUSR | S_IRUGO, pod_get_fx_loop_on_off, pod_set_fx_loop_on_off);
+static DEVICE_ATTR(tweak_param_select, S_IWUSR | S_IRUGO, pod_get_tweak_param_select, pod_set_tweak_param_select);
+static DEVICE_ATTR(amp1_engage, S_IWUSR | S_IRUGO, pod_get_amp1_engage, pod_set_amp1_engage);
+static DEVICE_ATTR(band_1_gain, S_IWUSR | S_IRUGO, pod_get_band_1_gain, pod_set_band_1_gain);
+static DEVICE_ATTR2(band_2_gain__bass, band_2_gain, S_IWUSR | S_IRUGO, pod_get_band_2_gain__bass, pod_set_band_2_gain__bass);
+static DEVICE_ATTR(band_2_gain, S_IWUSR | S_IRUGO, pod_get_band_2_gain, pod_set_band_2_gain);
+static DEVICE_ATTR2(band_3_gain__bass, band_3_gain, S_IWUSR | S_IRUGO, pod_get_band_3_gain__bass, pod_set_band_3_gain__bass);
+static DEVICE_ATTR(band_3_gain, S_IWUSR | S_IRUGO, pod_get_band_3_gain, pod_set_band_3_gain);
+static DEVICE_ATTR2(band_4_gain__bass, band_4_gain, S_IWUSR | S_IRUGO, pod_get_band_4_gain__bass, pod_set_band_4_gain__bass);
+static DEVICE_ATTR2(band_5_gain__bass, band_5_gain, S_IWUSR | S_IRUGO, pod_get_band_5_gain__bass, pod_set_band_5_gain__bass);
+static DEVICE_ATTR(band_4_gain, S_IWUSR | S_IRUGO, pod_get_band_4_gain, pod_set_band_4_gain);
+static DEVICE_ATTR2(band_6_gain__bass, band_6_gain, S_IWUSR | S_IRUGO, pod_get_band_6_gain__bass, pod_set_band_6_gain__bass);
 static DEVICE_ATTR(body, S_IRUGO, variax_get_body, line6_nop_write);
 static DEVICE_ATTR(pickup1_enable, S_IRUGO, variax_get_pickup1_enable, line6_nop_write);
 static DEVICE_ATTR(pickup1_type, S_IRUGO, variax_get_pickup1_type, line6_nop_write);
--- linux-mvl-dove-2.6.32.orig/drivers/staging/panel/panel.c
+++ linux-mvl-dove-2.6.32/drivers/staging/panel/panel.c
@@ -2181,6 +2181,7 @@
 		if (pprt) {
 			parport_release(pprt);
 			parport_unregister_device(pprt);
+			pprt = NULL;
 		}
 		parport_unregister_driver(&panel_driver);
 		printk(KERN_ERR "Panel driver version " PANEL_VERSION
@@ -2230,6 +2231,7 @@
 		/* TODO: free all input signals */
 		parport_release(pprt);
 		parport_unregister_device(pprt);
+		pprt = NULL;
 	}
 	parport_unregister_driver(&panel_driver);
 }
--- linux-mvl-dove-2.6.32.orig/drivers/i2c/i2c-core.c
+++ linux-mvl-dove-2.6.32/drivers/i2c/i2c-core.c
@@ -745,6 +745,14 @@
 static int __unregister_client(struct device *dev, void *dummy)
 {
 	struct i2c_client *client = i2c_verify_client(dev);
+	if (client && strcmp(client->name, "dummy"))
+		i2c_unregister_device(client);
+	return 0;
+}
+
+static int __unregister_dummy(struct device *dev, void *dummy)
+{
+	struct i2c_client *client = i2c_verify_client(dev);
 	if (client)
 		i2c_unregister_device(client);
 	return 0;
@@ -793,14 +801,21 @@
 	}
 
 	/* Detach any active clients. This can't fail, thus we do not
-	   checking the returned value. */
+	 * check the returned value. This is a two-pass process, because
+	 * we can't remove the dummy devices during the first pass: they
+	 * could have been instantiated by real devices wishing to clean
+	 * them up properly, so we give them a chance to do that first. */
 	res = device_for_each_child(&adap->dev, NULL, __unregister_client);
+	res = device_for_each_child(&adap->dev, NULL, __unregister_dummy);
 
 #ifdef CONFIG_I2C_COMPAT
 	class_compat_remove_link(i2c_adapter_compat_class, &adap->dev,
 				 adap->dev.parent);
 #endif
 
+	/* device name is gone after device_unregister */
+	dev_dbg(&adap->dev, "adapter [%s] unregistered\n", adap->name);
+
 	/* clean up the sysfs representation */
 	init_completion(&adap->dev_released);
 	device_unregister(&adap->dev);
@@ -813,8 +828,6 @@
 	idr_remove(&i2c_adapter_idr, adap->nr);
 	mutex_unlock(&core_lock);
 
-	dev_dbg(&adap->dev, "adapter [%s] unregistered\n", adap->name);
-
 	/* Clear the device structure in case this adapter is ever going to be
 	   added again */
 	memset(&adap->dev, 0, sizeof(adap->dev));
@@ -1201,14 +1214,24 @@
 
 	/* Make sure there is something at this address, unless forced */
 	if (kind < 0) {
-		if (i2c_smbus_xfer(adapter, addr, 0, 0, 0,
-				   I2C_SMBUS_QUICK, NULL) < 0)
-			return 0;
-
-		/* prevent 24RF08 corruption */
-		if ((addr & ~0x0f) == 0x50)
-			i2c_smbus_xfer(adapter, addr, 0, 0, 0,
-				       I2C_SMBUS_QUICK, NULL);
+		if (addr == 0x73 && (adapter->class & I2C_CLASS_HWMON)) {
+			/* Special probe for FSC hwmon chips */
+			union i2c_smbus_data dummy;
+
+			if (i2c_smbus_xfer(adapter, addr, 0, I2C_SMBUS_READ, 0,
+					   I2C_SMBUS_BYTE_DATA, &dummy) < 0)
+				return 0;
+		} else {
+			if (i2c_smbus_xfer(adapter, addr, 0, I2C_SMBUS_WRITE, 0,
+					   I2C_SMBUS_QUICK, NULL) < 0)
+				return 0;
+
+			/* Prevent 24RF08 corruption */
+			if ((addr & ~0x0f) == 0x50)
+				i2c_smbus_xfer(adapter, addr, 0,
+					       I2C_SMBUS_WRITE, 0,
+					       I2C_SMBUS_QUICK, NULL);
+		}
 	}
 
 	/* Finally call the custom detection function */
--- linux-mvl-dove-2.6.32.orig/drivers/i2c/chips/max1535.c
+++ linux-mvl-dove-2.6.32/drivers/i2c/chips/max1535.c
@@ -0,0 +1,134 @@
+/*
+    This driver supports the MAX 1535B/1535C/1535D SMBus Battery Chargers.
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; version 2 of the License.
+*/
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/i2c.h>
+#include <linux/proc_fs.h>
+
+#define MAX1535_CHARGER_SPEC_INFO		0x11
+#define MAX1535_CHARGER_STATUS			0x13
+#define MAX1535_MANUFACTURER_ID			0xFE
+#define MAX1535_DEVICE_ID			0xFF
+#define MAX1535_INPUT_CURRENT_LIMIT		0x3F
+#define MAX1535_INPUT_CURRENT_LIMIT_DEF		0x0800	/* 4A */
+
+static const struct i2c_device_id max1535_id[] = {
+     { "max1535_i2c", 0 },
+     { }
+};
+
+struct i2c_client *max1535_client = NULL;
+
+int charger_proc_write(struct file *file, const char *buffer,unsigned long count, void *data)
+{	
+	int cmd;
+	int val;
+
+	sscanf(buffer, "%x %x", &cmd, &val);
+	printk("Writing to 0x%x 0x%x\n", (u8)cmd, (u16)val);
+	i2c_smbus_write_word_data(max1535_client, (u8)cmd, (u16)val);
+	
+	return count;
+}
+
+int charger_proc_read(char* page, char** start, off_t off, int count,int* eof, void* data)
+{
+	int len = 0;
+	s32 rd;
+
+	if ((rd = (int)i2c_smbus_read_word_data(max1535_client, MAX1535_CHARGER_SPEC_INFO)) < 0) {
+          	return -EIO;
+     	}
+	len += sprintf(page+len, "Charger Spec Info (0x11) = %04x\n", rd);
+
+	if ((rd = (int)i2c_smbus_read_word_data(max1535_client, MAX1535_CHARGER_STATUS)) < 0) {
+          	return -EIO;
+     	}
+	len += sprintf(page+len, "Charger Status (0x13) = %04x\n", rd);
+
+	if ((rd = (int)i2c_smbus_read_word_data(max1535_client, MAX1535_MANUFACTURER_ID)) < 0) {
+          	return -EIO;
+     	}
+	len += sprintf(page+len, "Manufacturer ID (0xFE) = %04x\n", rd);
+
+	if ((rd = (int)i2c_smbus_read_word_data(max1535_client, MAX1535_DEVICE_ID)) < 0) {
+          	return -EIO;
+     	}
+	len += sprintf(page+len, "Device ID (0xFF) = %04x\n", rd);
+
+	len += sprintf(page+len, "\n\nUsage:\n");
+	len += sprintf(page+len, "  echo <reg> <val> > /proc/charger\n");
+	return len;
+}
+
+static struct proc_dir_entry *charger_proc_entry;
+extern struct proc_dir_entry proc_root;
+static int charger_proc_init(void)
+{
+	charger_proc_entry = create_proc_entry("charger", 0666, &proc_root);
+	charger_proc_entry->read_proc = charger_proc_read;
+	charger_proc_entry->write_proc = charger_proc_write;
+	return 0;
+}
+
+static int __devinit max1535_probe(struct i2c_client *client,
+			       const struct i2c_device_id *id)
+{
+     if (!i2c_check_functionality(to_i2c_adapter(client->dev.parent),
+				  I2C_FUNC_SMBUS_EMUL))
+	  return -EIO;
+
+     /* Raise the charge current */
+     if (i2c_smbus_write_word_data(client, MAX1535_INPUT_CURRENT_LIMIT, 
+					MAX1535_INPUT_CURRENT_LIMIT_DEF) < 0) {
+          dev_err(&client->dev, "Failed To initialize Current Limit in SMBus Charger");
+          return -EIO;
+     }
+
+     max1535_client = client;
+
+     charger_proc_init();
+
+     printk("MAX1535 SMBus Battery Charger driver loaded successfully\n");
+     return 0;
+}
+static int __devexit max1535_remove(struct i2c_client *client)
+{
+     return 0;
+}
+
+
+static struct i2c_driver max1535_driver = {
+     .driver = {
+	  .name   = "max1535_i2c",
+	  .owner  = THIS_MODULE,
+     },
+     .probe          = max1535_probe,
+     .remove         = __devexit_p(max1535_remove),
+     .id_table       = max1535_id,
+};
+
+static int __init max1535_init(void)
+{
+	return i2c_add_driver(&max1535_driver);
+}
+
+static void __exit max1535_exit(void)
+{
+	i2c_del_driver(&max1535_driver);
+}
+
+MODULE_AUTHOR("Tawfik Bayouk <tawfik@marvell.com>");
+MODULE_DESCRIPTION("MAX1535 SMBus Battery Charger Driver");
+MODULE_LICENSE("GPL");
+
+module_init(max1535_init);
+module_exit(max1535_exit);
--- linux-mvl-dove-2.6.32.orig/drivers/i2c/chips/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/i2c/chips/Kconfig
@@ -26,4 +26,21 @@
 	  This driver can also be built as a module.  If so, the module
 	  will be called tsl2550.
 
+config MENELAUS
+	bool "TWL92330/Menelaus PM chip"
+	depends on I2C=y && ARCH_OMAP24XX
+	help
+	  If you say yes here you get support for the Texas Instruments
+	  TWL92330/Menelaus Power Management chip. This include voltage
+	  regulators, Dual slot memory card tranceivers, real-time clock
+	  and other features that are often used in portable devices like
+	  cell phones and PDAs.
+
+config MAX1535
+	tristate "MAX 1535 SMBus Battery Charger chip"
+	default y if MACH_DOVE_RD
+	help
+	  If you say yes here you get support for MAX 1535 SMBus Battery
+	  Charger.
+
 endmenu
--- linux-mvl-dove-2.6.32.orig/drivers/i2c/chips/Makefile
+++ linux-mvl-dove-2.6.32/drivers/i2c/chips/Makefile
@@ -12,6 +12,7 @@
 
 obj-$(CONFIG_DS1682)		+= ds1682.o
 obj-$(CONFIG_SENSORS_TSL2550)	+= tsl2550.o
+obj-$(CONFIG_MAX1535)		+= max1535.o
 
 ifeq ($(CONFIG_I2C_DEBUG_CHIP),y)
 EXTRA_CFLAGS += -DDEBUG
--- linux-mvl-dove-2.6.32.orig/drivers/i2c/busses/i2c-tiny-usb.c
+++ linux-mvl-dove-2.6.32/drivers/i2c/busses/i2c-tiny-usb.c
@@ -13,6 +13,7 @@
 #include <linux/kernel.h>
 #include <linux/errno.h>
 #include <linux/module.h>
+#include <linux/types.h>
 
 /* include interfaces to usb layer */
 #include <linux/usb.h>
@@ -31,8 +32,8 @@
 #define CMD_I2C_IO_END		(1<<1)
 
 /* i2c bit delay, default is 10us -> 100kHz */
-static int delay = 10;
-module_param(delay, int, 0);
+static unsigned short delay = 10;
+module_param(delay, ushort, 0);
 MODULE_PARM_DESC(delay, "bit delay in microseconds, "
 		 "e.g. 10 for 100kHz (default is 100kHz)");
 
@@ -109,7 +110,7 @@
 
 static u32 usb_func(struct i2c_adapter *adapter)
 {
-	u32 func;
+	__le32 func;
 
 	/* get functionality from adapter */
 	if (usb_read(adapter, CMD_GET_FUNC, 0, 0, &func, sizeof(func)) !=
@@ -118,7 +119,7 @@
 		return 0;
 	}
 
-	return func;
+	return le32_to_cpu(func);
 }
 
 /* This is the actual algorithm we define */
@@ -216,8 +217,7 @@
 		 "i2c-tiny-usb at bus %03d device %03d",
 		 dev->usb_dev->bus->busnum, dev->usb_dev->devnum);
 
-	if (usb_write(&dev->adapter, CMD_SET_DELAY,
-		      cpu_to_le16(delay), 0, NULL, 0) != 0) {
+	if (usb_write(&dev->adapter, CMD_SET_DELAY, delay, 0, NULL, 0) != 0) {
 		dev_err(&dev->adapter.dev,
 			"failure setting delay to %dus\n", delay);
 		retval = -EIO;
--- linux-mvl-dove-2.6.32.orig/drivers/i2c/busses/i2c-mv64xxx.c
+++ linux-mvl-dove-2.6.32/drivers/i2c/busses/i2c-mv64xxx.c
@@ -9,11 +9,13 @@
  * is licensed "as is" without any warranty of any kind, whether express
  * or implied.
  */
+//#define DEBUG
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/spinlock.h>
 #include <linux/i2c.h>
 #include <linux/interrupt.h>
+#include <linux/delay.h>
 #include <linux/mv643xx_i2c.h>
 #include <linux/platform_device.h>
 
@@ -63,6 +65,7 @@
 	MV64XXX_I2C_STATE_WAITING_FOR_ADDR_2_ACK,
 	MV64XXX_I2C_STATE_WAITING_FOR_SLAVE_ACK,
 	MV64XXX_I2C_STATE_WAITING_FOR_SLAVE_DATA,
+	MV64XXX_I2C_STATE_WAITING_FOR_REPEATED_START,
 };
 
 /* Driver actions */
@@ -76,6 +79,7 @@
 	MV64XXX_I2C_ACTION_RCV_DATA,
 	MV64XXX_I2C_ACTION_RCV_DATA_STOP,
 	MV64XXX_I2C_ACTION_SEND_STOP,
+	MV64XXX_I2C_ACTION_NO_STOP,
 };
 
 struct mv64xxx_i2c_data {
@@ -95,12 +99,27 @@
 	int			rc;
 	u32			freq_m;
 	u32			freq_n;
+	u32			delay_after_stop;
+	int			irq_disabled;
 	wait_queue_head_t	waitq;
 	spinlock_t		lock;
+	struct device		*dev;
 	struct i2c_msg		*msg;
+	struct i2c_adapter	*adapter;
+#ifdef CONFIG_I2C_MV64XXX_PORT_EXPANDER
+	struct semaphore	exp_sem;
+	int	(*select_exp_port)(unsigned int port_id);
+#endif
+	u32			combine_access;
+};
+
+struct mv64xxx_i2c_exp_data {
+	struct mv64xxx_i2c_data	*hw_adapter;
 	struct i2c_adapter	adapter;
 };
 
+#define	get_adapter(pdata) ((pdata)->adapter)
+
 /*
  *****************************************************************************
  *
@@ -109,6 +128,25 @@
  *****************************************************************************
  */
 
+static void
+mv64xxx_i2c_wait_after_stop(struct mv64xxx_i2c_data *drv_data)
+{
+	int i = 0;
+
+	udelay(drv_data->delay_after_stop);
+
+	/* wait for the stop bit up to 100 usec more */
+	while (readl(drv_data->reg_base + MV64XXX_I2C_REG_CONTROL) &
+	       MV64XXX_I2C_REG_CONTROL_STOP){
+		udelay(1);
+		if (i++ > 100) {
+			dev_err(drv_data->dev,
+				" I2C bus locked, stop bit not cleared\n");
+			break;
+		}
+	}
+
+}
 /* Reset hardware and initialize FSM */
 static void
 mv64xxx_i2c_hw_init(struct mv64xxx_i2c_data *drv_data)
@@ -120,6 +158,7 @@
 	writel(0, drv_data->reg_base + MV64XXX_I2C_REG_EXT_SLAVE_ADDR);
 	writel(MV64XXX_I2C_REG_CONTROL_TWSIEN | MV64XXX_I2C_REG_CONTROL_STOP,
 		drv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
+	mv64xxx_i2c_wait_after_stop(drv_data);
 	drv_data->state = MV64XXX_I2C_STATE_IDLE;
 }
 
@@ -156,11 +195,15 @@
 		/* FALLTHRU */
 	case MV64XXX_I2C_STATUS_MAST_WR_ADDR_2_ACK: /* 0xd0 */
 	case MV64XXX_I2C_STATUS_MAST_WR_ACK: /* 0x28 */
-		if ((drv_data->bytes_left == 0)
-				|| (drv_data->aborting
-					&& (drv_data->byte_posn != 0))) {
-			drv_data->action = MV64XXX_I2C_ACTION_SEND_STOP;
-			drv_data->state = MV64XXX_I2C_STATE_IDLE;
+		if (drv_data->bytes_left == 0) {
+				if ((drv_data->aborting
+				     && (drv_data->byte_posn != 0)) || !drv_data->combine_access) {
+					drv_data->action = MV64XXX_I2C_ACTION_SEND_STOP;
+					drv_data->state = MV64XXX_I2C_STATE_IDLE;
+				} else {
+					drv_data->action = MV64XXX_I2C_ACTION_NO_STOP;
+					drv_data->state = MV64XXX_I2C_STATE_WAITING_FOR_REPEATED_START;
+				}
 		} else {
 			drv_data->action = MV64XXX_I2C_ACTION_SEND_DATA;
 			drv_data->state =
@@ -213,7 +256,7 @@
 		break;
 
 	default:
-		dev_err(&drv_data->adapter.dev,
+		dev_err(drv_data->dev,
 			"mv64xxx_i2c_fsm: Ctlr Error -- state: 0x%x, "
 			"status: 0x%x, addr: 0x%x, flags: 0x%x\n",
 			 drv_data->state, status, drv_data->msg->addr,
@@ -227,6 +270,9 @@
 static void
 mv64xxx_i2c_do_action(struct mv64xxx_i2c_data *drv_data)
 {
+	dev_dbg(drv_data->dev,
+		"do_action:  state: 0x%x,  action: 0x%x\n",
+		drv_data->state, drv_data->action);
 	switch(drv_data->action) {
 	case MV64XXX_I2C_ACTION_CONTINUE:
 		writel(drv_data->cntl_bits,
@@ -236,6 +282,11 @@
 	case MV64XXX_I2C_ACTION_SEND_START:
 		writel(drv_data->cntl_bits | MV64XXX_I2C_REG_CONTROL_START,
 			drv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
+		if (drv_data->irq_disabled){
+			udelay(3);
+			drv_data->irq_disabled = 0;
+			enable_irq(drv_data->irq);
+		}
 		break;
 
 	case MV64XXX_I2C_ACTION_SEND_ADDR_1:
@@ -270,15 +321,26 @@
 		drv_data->msg->buf[drv_data->byte_posn++] =
 			readl(drv_data->reg_base + MV64XXX_I2C_REG_DATA);
 		drv_data->cntl_bits &= ~MV64XXX_I2C_REG_CONTROL_INTEN;
+
 		writel(drv_data->cntl_bits | MV64XXX_I2C_REG_CONTROL_STOP,
-			drv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
+		       drv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
+		mv64xxx_i2c_wait_after_stop(drv_data);
 		drv_data->block = 0;
-		wake_up_interruptible(&drv_data->waitq);
+		wake_up(&drv_data->waitq);
+		break;
+	case MV64XXX_I2C_ACTION_NO_STOP:
+		/* can't mask interrupts by clearing the INTEN as this 
+		 * triggers the controller to send the data.
+		 */
+		drv_data->irq_disabled = 1;
+		disable_irq_nosync(drv_data->irq);
+		drv_data->block = 0;
+		wake_up(&drv_data->waitq);
 		break;
 
 	case MV64XXX_I2C_ACTION_INVALID:
 	default:
-		dev_err(&drv_data->adapter.dev,
+		dev_err(drv_data->dev,
 			"mv64xxx_i2c_do_action: Invalid action: %d\n",
 			drv_data->action);
 		drv_data->rc = -EIO;
@@ -286,9 +348,10 @@
 	case MV64XXX_I2C_ACTION_SEND_STOP:
 		drv_data->cntl_bits &= ~MV64XXX_I2C_REG_CONTROL_INTEN;
 		writel(drv_data->cntl_bits | MV64XXX_I2C_REG_CONTROL_STOP,
-			drv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
+		       drv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
+		mv64xxx_i2c_wait_after_stop(drv_data);
 		drv_data->block = 0;
-		wake_up_interruptible(&drv_data->waitq);
+		wake_up(&drv_data->waitq);
 		break;
 	}
 }
@@ -305,9 +368,14 @@
 	while (readl(drv_data->reg_base + MV64XXX_I2C_REG_CONTROL) &
 						MV64XXX_I2C_REG_CONTROL_IFLG) {
 		status = readl(drv_data->reg_base + MV64XXX_I2C_REG_STATUS);
+		dev_dbg(drv_data->dev,
+			"intr:  status: 0x%x, \n", status);
+
 		mv64xxx_i2c_fsm(drv_data, status);
 		mv64xxx_i2c_do_action(drv_data);
 		rc = IRQ_HANDLED;
+		if (drv_data->state == MV64XXX_I2C_STATE_WAITING_FOR_REPEATED_START)
+			break;
 	}
 	spin_unlock_irqrestore(&drv_data->lock, flags);
 
@@ -357,8 +425,8 @@
 	unsigned long	flags;
 	char		abort = 0;
 
-	time_left = wait_event_interruptible_timeout(drv_data->waitq,
-		!drv_data->block, drv_data->adapter.timeout);
+	time_left = wait_event_timeout(drv_data->waitq,
+		!drv_data->block, get_adapter(drv_data)->timeout);
 
 	spin_lock_irqsave(&drv_data->lock, flags);
 	if (!time_left) { /* Timed out */
@@ -374,11 +442,12 @@
 		spin_unlock_irqrestore(&drv_data->lock, flags);
 
 		time_left = wait_event_timeout(drv_data->waitq,
-			!drv_data->block, drv_data->adapter.timeout);
+			!drv_data->block, get_adapter(drv_data)->timeout);
+		drv_data->rc = time_left;
 
 		if ((time_left <= 0) && drv_data->block) {
 			drv_data->state = MV64XXX_I2C_STATE_IDLE;
-			dev_err(&drv_data->adapter.dev,
+			dev_err(drv_data->dev,
 				"mv64xxx: I2C bus locked, block: %d, "
 				"time_left: %d\n", drv_data->block,
 				(int)time_left);
@@ -433,7 +502,7 @@
 {
 	return I2C_FUNC_I2C | I2C_FUNC_10BIT_ADDR | I2C_FUNC_SMBUS_EMUL;
 }
-
+#ifndef CONFIG_I2C_MV64XXX_PORT_EXPANDER
 static int
 mv64xxx_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
 {
@@ -441,9 +510,20 @@
 	int	i, rc;
 
 	for (i=0; i<num; i++)
+	{
+		if(num > 1 && (i != num-1))
+                {//if comebine access, we don't send stop signal between msgs.
+			drv_data->combine_access = 1;
+			dev_dbg(drv_data->dev,
+				"xfer:  combine_access\n");
+
+                }else{
+			drv_data->combine_access = 0;
+                }
+
 		if ((rc = mv64xxx_i2c_execute_msg(drv_data, &msgs[i])) < 0)
 			return rc;
-
+	}
 	return num;
 }
 
@@ -451,7 +531,7 @@
 	.master_xfer = mv64xxx_i2c_xfer,
 	.functionality = mv64xxx_i2c_functionality,
 };
-
+#endif
 /*
  *****************************************************************************
  *
@@ -471,7 +551,7 @@
 
 	size = resource_size(r);
 
-	if (!request_mem_region(r->start, size, drv_data->adapter.name))
+	if (!request_mem_region(r->start, size, pd->name))
 		return -EBUSY;
 
 	drv_data->reg_base = ioremap(r->start, size);
@@ -498,6 +578,7 @@
 {
 	struct mv64xxx_i2c_data		*drv_data;
 	struct mv64xxx_i2c_pdata	*pdata = pd->dev.platform_data;
+	struct i2c_adapter	*adapter;
 	int	rc;
 
 	if ((pd->id != 0) || !pdata)
@@ -506,47 +587,63 @@
 	drv_data = kzalloc(sizeof(struct mv64xxx_i2c_data), GFP_KERNEL);
 	if (!drv_data)
 		return -ENOMEM;
+#ifndef CONFIG_I2C_MV64XXX_PORT_EXPANDER
+	adapter = kzalloc(sizeof(struct i2c_adapter), GFP_KERNEL);
+	if (!adapter)
+		return -ENOMEM;
 
+	drv_data->adapter = adapter;
+#endif
 	if (mv64xxx_i2c_map_regs(pd, drv_data)) {
 		rc = -ENODEV;
 		goto exit_kfree;
 	}
 
-	strlcpy(drv_data->adapter.name, MV64XXX_I2C_CTLR_NAME " adapter",
-		sizeof(drv_data->adapter.name));
-
 	init_waitqueue_head(&drv_data->waitq);
 	spin_lock_init(&drv_data->lock);
-
+#ifdef CONFIG_I2C_MV64XXX_PORT_EXPANDER
+	init_MUTEX(&drv_data->exp_sem);
+	drv_data->select_exp_port = pdata->select_exp_port;
+#endif
 	drv_data->freq_m = pdata->freq_m;
 	drv_data->freq_n = pdata->freq_n;
+	drv_data->delay_after_stop = pdata->delay_after_stop ?
+		pdata->delay_after_stop : 10;
 	drv_data->irq = platform_get_irq(pd, 0);
 	if (drv_data->irq < 0) {
 		rc = -ENXIO;
 		goto exit_unmap_regs;
 	}
-	drv_data->adapter.dev.parent = &pd->dev;
-	drv_data->adapter.algo = &mv64xxx_i2c_algo;
-	drv_data->adapter.owner = THIS_MODULE;
-	drv_data->adapter.class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
-	drv_data->adapter.timeout = msecs_to_jiffies(pdata->timeout);
-	drv_data->adapter.nr = pd->id;
+	drv_data->irq_disabled = 0;
+	drv_data->dev = &pd->dev;
+#ifndef CONFIG_I2C_MV64XXX_PORT_EXPANDER
+	strlcpy(drv_data->adapter->name, MV64XXX_I2C_CTLR_NAME " adapter",
+		sizeof(drv_data->adapter->name));
+	drv_data->adapter->dev.parent = &pd->dev;
+	drv_data->adapter->algo = &mv64xxx_i2c_algo;
+	drv_data->adapter->owner = THIS_MODULE;
+	drv_data->adapter->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
+	drv_data->adapter->timeout = pdata->timeout;
+	drv_data->adapter->nr = pd->id;
+	i2c_set_adapdata(drv_data->adapter, drv_data);
+#endif
 	platform_set_drvdata(pd, drv_data);
-	i2c_set_adapdata(&drv_data->adapter, drv_data);
 
 	mv64xxx_i2c_hw_init(drv_data);
 
 	if (request_irq(drv_data->irq, mv64xxx_i2c_intr, 0,
 			MV64XXX_I2C_CTLR_NAME, drv_data)) {
-		dev_err(&drv_data->adapter.dev,
+		dev_err(drv_data->dev,
 			"mv64xxx: Can't register intr handler irq: %d\n",
 			drv_data->irq);
 		rc = -EINVAL;
 		goto exit_unmap_regs;
-	} else if ((rc = i2c_add_numbered_adapter(&drv_data->adapter)) != 0) {
-		dev_err(&drv_data->adapter.dev,
+#ifndef CONFIG_I2C_MV64XXX_PORT_EXPANDER
+	} else if ((rc = i2c_add_numbered_adapter(drv_data->adapter)) != 0) {
+		dev_err(drv_data->dev,
 			"mv64xxx: Can't add i2c adapter, rc: %d\n", -rc);
 		goto exit_free_irq;
+#endif
 	}
 
 	return 0;
@@ -564,9 +661,11 @@
 mv64xxx_i2c_remove(struct platform_device *dev)
 {
 	struct mv64xxx_i2c_data		*drv_data = platform_get_drvdata(dev);
-	int	rc;
+	int	rc = 0;
 
-	rc = i2c_del_adapter(&drv_data->adapter);
+#ifndef CONFIG_I2C_MV64XXX_PORT_EXPANDER
+	rc = i2c_del_adapter(drv_data->adapter);
+#endif
 	free_irq(drv_data->irq, drv_data);
 	mv64xxx_i2c_unmap_regs(drv_data);
 	kfree(drv_data);
@@ -574,24 +673,136 @@
 	return rc;
 }
 
+#ifdef CONFIG_PM
+static int
+mv64xxx_i2c_resume(struct platform_device *dev)
+{
+	struct mv64xxx_i2c_data	*drv_data = platform_get_drvdata(dev);
+	mv64xxx_i2c_hw_init(drv_data);
+	return 0;
+}
+
+#else
+#define mv64xxx_i2c_resume NULL
+#endif
+
 static struct platform_driver mv64xxx_i2c_driver = {
 	.probe	= mv64xxx_i2c_probe,
 	.remove	= __devexit_p(mv64xxx_i2c_remove),
+	.resume = mv64xxx_i2c_resume,
 	.driver	= {
 		.owner	= THIS_MODULE,
 		.name	= MV64XXX_I2C_CTLR_NAME,
 	},
 };
 
+#ifdef CONFIG_I2C_MV64XXX_PORT_EXPANDER
+static int
+mv64xxx_i2c_exp_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
+{
+	struct mv64xxx_i2c_exp_data *exp_drv_data = i2c_get_adapdata(adap);
+	struct mv64xxx_i2c_data *drv_data = exp_drv_data->hw_adapter;
+	int	i, rc;
+
+	down(&drv_data->exp_sem);
+	drv_data->adapter = adap;
+	drv_data->select_exp_port(adap->nr);
+	for (i=0; i<num; i++)
+	{
+		if(num > 1 && (i != num-1))
+                {//if comebine access, we don't send stop signal between msgs.
+			drv_data->combine_access = 1;
+			dev_dbg(drv_data->dev,
+				"xfer:  combine_access\n");
+                }else{
+			drv_data->combine_access = 0;
+                }
+
+		if ((rc = mv64xxx_i2c_execute_msg(drv_data, &msgs[i])) < 0) {
+			up(&drv_data->exp_sem);
+			return rc;
+		}
+	}
+	up(&drv_data->exp_sem);
+	return num;
+}
+
+static const struct i2c_algorithm mv64xxx_i2c_exp_algo = {
+	.master_xfer = mv64xxx_i2c_exp_xfer,
+	.functionality = mv64xxx_i2c_functionality,
+};
+
+static int __devinit
+mv64xxx_i2c_exp_probe(struct platform_device *pd)
+{
+	struct mv64xxx_i2c_exp_data	*exp_drv_data;
+	struct mv64xxx_i2c_exp_pdata	*pdata = pd->dev.platform_data;
+	int	rc = 0;
+
+	if (!pdata)
+		return -ENODEV;
+
+	exp_drv_data = devm_kzalloc(&pd->dev, sizeof(struct mv64xxx_i2c_exp_data),
+				GFP_KERNEL);
+	if (!exp_drv_data)
+		return -ENOMEM;
+
+	strlcpy(exp_drv_data->adapter.name, MV64XXX_I2C_EXPANDER_NAME " adapter",
+		sizeof(exp_drv_data->adapter.name));
+	exp_drv_data->adapter.dev.parent = &pd->dev;
+	exp_drv_data->adapter.algo = &mv64xxx_i2c_exp_algo;
+	exp_drv_data->adapter.owner = THIS_MODULE;
+	exp_drv_data->adapter.class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
+	exp_drv_data->adapter.timeout = pdata->timeout;
+	exp_drv_data->adapter.nr = pd->id;
+	exp_drv_data->hw_adapter = platform_get_drvdata(pdata->hw_adapter);
+	platform_set_drvdata(pd, exp_drv_data);
+	i2c_set_adapdata(&exp_drv_data->adapter, exp_drv_data);
+
+	if ((rc = i2c_add_numbered_adapter(&exp_drv_data->adapter)) != 0) {
+		dev_err(&pd->dev,
+			"mv64xxx expander: Can't add i2c adapter, rc: %d\n", -rc);
+	}
+	return rc;
+}
+
+static int __devexit
+mv64xxx_i2c_exp_remove(struct platform_device *dev)
+{
+	struct mv64xxx_i2c_exp_data	*exp_drv_data = platform_get_drvdata(dev);
+
+	return i2c_del_adapter(&exp_drv_data->adapter);
+}
+
+static struct platform_driver mv64xxx_i2c_exp_driver = {
+	.probe	= mv64xxx_i2c_exp_probe,
+	.remove	= __devexit_p(mv64xxx_i2c_exp_remove),
+	.driver	= {
+		.owner	= THIS_MODULE,
+		.name	= MV64XXX_I2C_EXPANDER_NAME,
+	},
+};
+#endif
+
 static int __init
 mv64xxx_i2c_init(void)
 {
-	return platform_driver_register(&mv64xxx_i2c_driver);
+	int rc = platform_driver_register(&mv64xxx_i2c_driver);
+	if (rc < 0)
+		return rc;
+
+#ifdef CONFIG_I2C_MV64XXX_PORT_EXPANDER
+	rc = platform_driver_register(&mv64xxx_i2c_exp_driver);
+#endif
+	return rc;
 }
 
 static void __exit
 mv64xxx_i2c_exit(void)
 {
+#ifdef CONFIG_I2C_MV64XXX_PORT_EXPANDER
+	platform_driver_unregister(&mv64xxx_i2c_exp_driver);
+#endif
 	platform_driver_unregister(&mv64xxx_i2c_driver);
 }
 
--- linux-mvl-dove-2.6.32.orig/drivers/i2c/busses/i2c-pca-isa.c
+++ linux-mvl-dove-2.6.32/drivers/i2c/busses/i2c-pca-isa.c
@@ -71,21 +71,25 @@
 
 static int pca_isa_waitforcompletion(void *pd)
 {
-	long ret = ~0;
 	unsigned long timeout;
+	long ret;
 
 	if (irq > -1) {
-		ret = wait_event_interruptible_timeout(pca_wait,
+		ret = wait_event_timeout(pca_wait,
 				pca_isa_readbyte(pd, I2C_PCA_CON)
 				& I2C_PCA_CON_SI, pca_isa_ops.timeout);
 	} else {
 		/* Do polling */
 		timeout = jiffies + pca_isa_ops.timeout;
-		while (((pca_isa_readbyte(pd, I2C_PCA_CON)
-				& I2C_PCA_CON_SI) == 0)
-				&& (ret = time_before(jiffies, timeout)))
+		do {
+			ret = time_before(jiffies, timeout);
+			if (pca_isa_readbyte(pd, I2C_PCA_CON)
+					& I2C_PCA_CON_SI)
+				break;
 			udelay(100);
+		} while (ret);
 	}
+
 	return ret > 0;
 }
 
@@ -96,7 +100,7 @@
 }
 
 static irqreturn_t pca_handler(int this_irq, void *dev_id) {
-	wake_up_interruptible(&pca_wait);
+	wake_up(&pca_wait);
 	return IRQ_HANDLED;
 }
 
--- linux-mvl-dove-2.6.32.orig/drivers/i2c/busses/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/i2c/busses/Kconfig
@@ -77,7 +77,7 @@
 	  will be called i2c-amd8111.
 
 config I2C_I801
-	tristate "Intel 82801 (ICH)"
+	tristate "Intel 82801 (ICH/PCH)"
 	depends on PCI
 	help
 	  If you say yes to this option, support will be included for the Intel
@@ -97,7 +97,8 @@
 	    ICH9
 	    Tolapai
 	    ICH10
-	    PCH
+	    3400/5 Series (PCH)
+	    Cougar Point (PCH)
 
 	  This driver can also be built as a module.  If so, the module
 	  will be called i2c-i801.
@@ -439,6 +440,13 @@
 	  This driver can also be built as a module.  If so, the module
 	  will be called i2c-mv64xxx.
 
+config I2C_MV64XXX_PORT_EXPANDER
+	bool "Marvell mv64xxx I2C Port Expander"
+	depends on I2C_MV64XXX
+	help
+	  If you say yes to this option, support will be included for the
+	  I2C port expander on some of Marvell SoC's.
+
 config I2C_OCORES
 	tristate "OpenCores I2C Controller"
 	depends on EXPERIMENTAL
--- linux-mvl-dove-2.6.32.orig/drivers/i2c/busses/i2c-i801.c
+++ linux-mvl-dove-2.6.32/drivers/i2c/busses/i2c-i801.c
@@ -41,7 +41,8 @@
   Tolapai               0x5032     32     hard     yes     yes     yes
   ICH10                 0x3a30     32     hard     yes     yes     yes
   ICH10                 0x3a60     32     hard     yes     yes     yes
-  PCH                   0x3b30     32     hard     yes     yes     yes
+  3400/5 Series (PCH)   0x3b30     32     hard     yes     yes     yes
+  Cougar Point (PCH)    0x1c22     32     hard     yes     yes     yes
 
   Features supported by this driver:
   Software PEC                     no
@@ -415,9 +416,11 @@
 		data->block[0] = 32;	/* max for SMBus block reads */
 	}
 
+	/* Experience has shown that the block buffer can only be used for
+	   SMBus (not I2C) block transactions, even though the datasheet
+	   doesn't mention this limitation. */
 	if ((i801_features & FEATURE_BLOCK_BUFFER)
-	 && !(command == I2C_SMBUS_I2C_BLOCK_DATA
-	      && read_write == I2C_SMBUS_READ)
+	 && command != I2C_SMBUS_I2C_BLOCK_DATA
 	 && i801_set_block_buffer_mode() == 0)
 		result = i801_block_transaction_by_block(data, read_write,
 							 hwpec);
@@ -578,6 +581,7 @@
 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_4) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_5) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PCH_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CPT_SMBUS) },
 	{ 0, }
 };
 
@@ -707,6 +711,7 @@
 	case PCI_DEVICE_ID_INTEL_ICH10_4:
 	case PCI_DEVICE_ID_INTEL_ICH10_5:
 	case PCI_DEVICE_ID_INTEL_PCH_SMBUS:
+	case PCI_DEVICE_ID_INTEL_CPT_SMBUS:
 		i801_features |= FEATURE_I2C_BLOCK_READ;
 		/* fall through */
 	case PCI_DEVICE_ID_INTEL_82801DB_3:
--- linux-mvl-dove-2.6.32.orig/drivers/i2c/busses/i2c-pca-platform.c
+++ linux-mvl-dove-2.6.32/drivers/i2c/busses/i2c-pca-platform.c
@@ -80,20 +80,23 @@
 static int i2c_pca_pf_waitforcompletion(void *pd)
 {
 	struct i2c_pca_pf_data *i2c = pd;
-	long ret = ~0;
 	unsigned long timeout;
+	long ret;
 
 	if (i2c->irq) {
-		ret = wait_event_interruptible_timeout(i2c->wait,
+		ret = wait_event_timeout(i2c->wait,
 			i2c->algo_data.read_byte(i2c, I2C_PCA_CON)
 			& I2C_PCA_CON_SI, i2c->adap.timeout);
 	} else {
 		/* Do polling */
 		timeout = jiffies + i2c->adap.timeout;
-		while (((i2c->algo_data.read_byte(i2c, I2C_PCA_CON)
-				& I2C_PCA_CON_SI) == 0)
-				&& (ret = time_before(jiffies, timeout)))
+		do {
+			ret = time_before(jiffies, timeout);
+			if (i2c->algo_data.read_byte(i2c, I2C_PCA_CON)
+					& I2C_PCA_CON_SI)
+				break;
 			udelay(100);
+		} while (ret);
 	}
 
 	return ret > 0;
@@ -122,7 +125,7 @@
 	if ((i2c->algo_data.read_byte(i2c, I2C_PCA_CON) & I2C_PCA_CON_SI) == 0)
 		return IRQ_NONE;
 
-	wake_up_interruptible(&i2c->wait);
+	wake_up(&i2c->wait);
 
 	return IRQ_HANDLED;
 }
@@ -221,7 +224,7 @@
 
 	if (irq) {
 		ret = request_irq(irq, i2c_pca_pf_handler,
-			IRQF_TRIGGER_FALLING, i2c->adap.name, i2c);
+			IRQF_TRIGGER_FALLING, pdev->name, i2c);
 		if (ret)
 			goto e_reqirq;
 	}
--- linux-mvl-dove-2.6.32.orig/drivers/i2c/busses/i2c-taos-evm.c
+++ linux-mvl-dove-2.6.32/drivers/i2c/busses/i2c-taos-evm.c
@@ -234,7 +234,7 @@
 
 	if (taos->state != TAOS_STATE_IDLE) {
 		err = -ENODEV;
-		dev_dbg(&serio->dev, "TAOS EVM reset failed (state=%d, "
+		dev_err(&serio->dev, "TAOS EVM reset failed (state=%d, "
 			"pos=%d)\n", taos->state, taos->pos);
 		goto exit_close;
 	}
@@ -255,7 +255,7 @@
 					 msecs_to_jiffies(250));
 	if (taos->state != TAOS_STATE_IDLE) {
 		err = -ENODEV;
-		dev_err(&adapter->dev, "Echo off failed "
+		dev_err(&serio->dev, "TAOS EVM echo off failed "
 			"(state=%d)\n", taos->state);
 		goto exit_close;
 	}
@@ -263,7 +263,7 @@
 	err = i2c_add_adapter(adapter);
 	if (err)
 		goto exit_close;
-	dev_dbg(&serio->dev, "Connected to TAOS EVM\n");
+	dev_info(&serio->dev, "Connected to TAOS EVM\n");
 
 	taos->client = taos_instantiate_device(adapter);
 	return 0;
@@ -288,7 +288,7 @@
 	serio_set_drvdata(serio, NULL);
 	kfree(taos);
 
-	dev_dbg(&serio->dev, "Disconnected from TAOS EVM\n");
+	dev_info(&serio->dev, "Disconnected from TAOS EVM\n");
 }
 
 static struct serio_device_id taos_serio_ids[] = {
--- linux-mvl-dove-2.6.32.orig/drivers/hwmon/sht15.c
+++ linux-mvl-dove-2.6.32/drivers/hwmon/sht15.c
@@ -302,13 +302,13 @@
  **/
 static inline int sht15_calc_temp(struct sht15_data *data)
 {
-	int d1 = 0;
+	int d1 = temppoints[0].d1;
 	int i;
 
-	for (i = 1; i < ARRAY_SIZE(temppoints) - 1; i++)
+	for (i = ARRAY_SIZE(temppoints) - 1; i > 0; i--)
 		/* Find pointer to interpolate */
 		if (data->supply_uV > temppoints[i - 1].vdd) {
-			d1 = (data->supply_uV/1000 - temppoints[i - 1].vdd)
+			d1 = (data->supply_uV - temppoints[i - 1].vdd)
 				* (temppoints[i].d1 - temppoints[i - 1].d1)
 				/ (temppoints[i].vdd - temppoints[i - 1].vdd)
 				+ temppoints[i - 1].d1;
@@ -332,12 +332,12 @@
 
 	const int c1 = -4;
 	const int c2 = 40500; /* x 10 ^ -6 */
-	const int c3 = 2800; /* x10 ^ -9 */
+	const int c3 = -28; /* x 10 ^ -7 */
 
 	RHlinear = c1*1000
 		+ c2 * data->val_humid/1000
-		+ (data->val_humid * data->val_humid * c3)/1000000;
-	return (temp - 25000) * (10000 + 800 * data->val_humid)
+		+ (data->val_humid * data->val_humid * c3) / 10000;
+	return (temp - 25000) * (10000 + 80 * data->val_humid)
 		/ 1000000 + RHlinear;
 }
 
@@ -541,7 +541,12 @@
 /* If a regulator is available, query what the supply voltage actually is!*/
 	data->reg = regulator_get(data->dev, "vcc");
 	if (!IS_ERR(data->reg)) {
-		data->supply_uV = regulator_get_voltage(data->reg);
+		int voltage;
+
+		voltage = regulator_get_voltage(data->reg);
+		if (voltage)
+			data->supply_uV = voltage;
+
 		regulator_enable(data->reg);
 		/* setup a notifier block to update this if another device
 		 *  causes the voltage to change */
--- linux-mvl-dove-2.6.32.orig/drivers/hwmon/it87.c
+++ linux-mvl-dove-2.6.32/drivers/hwmon/it87.c
@@ -80,6 +80,13 @@
 	return inb(VAL);
 }
 
+static inline void
+superio_outb(int reg, int val)
+{
+	outb(reg, REG);
+	outb(val, VAL);
+}
+
 static int superio_inw(int reg)
 {
 	int val;
@@ -1036,6 +1043,21 @@
 			sio_data->vid_value = superio_inb(IT87_SIO_VID_REG);
 
 		reg = superio_inb(IT87_SIO_PINX2_REG);
+		/*
+		 * The IT8720F has no VIN7 pin, so VCCH should always be
+		 * routed internally to VIN7 with an internal divider.
+		 * Curiously, there still is a configuration bit to control
+		 * this, which means it can be set incorrectly. And even
+		 * more curiously, many boards out there are improperly
+		 * configured, even though the IT8720F datasheet claims
+		 * that the internal routing of VCCH to VIN7 is the default
+		 * setting. So we force the internal routing in this case.
+		 */
+		if (sio_data->type == it8720 && !(reg & (1 << 1))) {
+			reg |= (1 << 1);
+			superio_outb(IT87_SIO_PINX2_REG, reg);
+			pr_notice("it87: Routing internal VCCH to in7\n");
+		}
 		if (reg & (1 << 0))
 			pr_info("it87: in3 is VCC (+5V)\n");
 		if (reg & (1 << 1))
--- linux-mvl-dove-2.6.32.orig/drivers/hwmon/fschmd.c
+++ linux-mvl-dove-2.6.32/drivers/hwmon/fschmd.c
@@ -767,6 +767,7 @@
 static int watchdog_open(struct inode *inode, struct file *filp)
 {
 	struct fschmd_data *pos, *data = NULL;
+	int watchdog_is_open;
 
 	/* We get called from drivers/char/misc.c with misc_mtx hold, and we
 	   call misc_register() from fschmd_probe() with watchdog_data_mutex
@@ -781,10 +782,12 @@
 		}
 	}
 	/* Note we can never not have found data, so we don't check for this */
-	kref_get(&data->kref);
+	watchdog_is_open = test_and_set_bit(0, &data->watchdog_is_open);
+	if (!watchdog_is_open)
+		kref_get(&data->kref);
 	mutex_unlock(&watchdog_data_mutex);
 
-	if (test_and_set_bit(0, &data->watchdog_is_open))
+	if (watchdog_is_open)
 		return -EBUSY;
 
 	/* Start the watchdog */
--- linux-mvl-dove-2.6.32.orig/drivers/hwmon/w83781d.c
+++ linux-mvl-dove-2.6.32/drivers/hwmon/w83781d.c
@@ -1818,17 +1818,17 @@
 w83781d_isa_found(unsigned short address)
 {
 	int val, save, found = 0;
+	int port;
 
-	/* We have to request the region in two parts because some
-	   boards declare base+4 to base+7 as a PNP device */
-	if (!request_region(address, 4, "w83781d")) {
-		pr_debug("w83781d: Failed to request low part of region\n");
-		return 0;
-	}
-	if (!request_region(address + 4, 4, "w83781d")) {
-		pr_debug("w83781d: Failed to request high part of region\n");
-		release_region(address, 4);
-		return 0;
+	/* Some boards declare base+0 to base+7 as a PNP device, some base+4
+	 * to base+7 and some base+5 to base+6. So we better request each port
+	 * individually for the probing phase. */
+	for (port = address; port < address + W83781D_EXTENT; port++) {
+		if (!request_region(port, 1, "w83781d")) {
+			pr_debug("w83781d: Failed to request port 0x%x\n",
+				 port);
+			goto release;
+		}
 	}
 
 #define REALLY_SLOW_IO
@@ -1902,8 +1902,8 @@
 			val == 0x30 ? "W83782D" : "W83781D", (int)address);
 
  release:
-	release_region(address + 4, 4);
-	release_region(address, 4);
+	for (port--; port >= address; port--)
+		release_region(port, 1);
 	return found;
 }
 
--- linux-mvl-dove-2.6.32.orig/drivers/hwmon/adt7462.c
+++ linux-mvl-dove-2.6.32/drivers/hwmon/adt7462.c
@@ -97,7 +97,7 @@
 #define		ADT7462_PIN24_SHIFT		6
 #define		ADT7462_PIN26_VOLT_INPUT	0x08
 #define		ADT7462_PIN25_VOLT_INPUT	0x20
-#define		ADT7462_PIN28_SHIFT		6	/* cfg3 */
+#define		ADT7462_PIN28_SHIFT		4	/* cfg3 */
 #define		ADT7462_PIN28_VOLT		0x5
 
 #define ADT7462_REG_ALARM1			0xB8
@@ -182,7 +182,7 @@
  *
  * Some, but not all, of these voltages have low/high limits.
  */
-#define ADT7462_VOLT_COUNT	12
+#define ADT7462_VOLT_COUNT	13
 
 #define ADT7462_VENDOR		0x41
 #define ADT7462_DEVICE		0x62
--- linux-mvl-dove-2.6.32.orig/drivers/hwmon/lm78.c
+++ linux-mvl-dove-2.6.32/drivers/hwmon/lm78.c
@@ -870,17 +870,16 @@
 static int __init lm78_isa_found(unsigned short address)
 {
 	int val, save, found = 0;
+	int port;
 
-	/* We have to request the region in two parts because some
-	   boards declare base+4 to base+7 as a PNP device */
-	if (!request_region(address, 4, "lm78")) {
-		pr_debug("lm78: Failed to request low part of region\n");
-		return 0;
-	}
-	if (!request_region(address + 4, 4, "lm78")) {
-		pr_debug("lm78: Failed to request high part of region\n");
-		release_region(address, 4);
-		return 0;
+	/* Some boards declare base+0 to base+7 as a PNP device, some base+4
+	 * to base+7 and some base+5 to base+6. So we better request each port
+	 * individually for the probing phase. */
+	for (port = address; port < address + LM78_EXTENT; port++) {
+		if (!request_region(port, 1, "lm78")) {
+			pr_debug("lm78: Failed to request port 0x%x\n", port);
+			goto release;
+		}
 	}
 
 #define REALLY_SLOW_IO
@@ -944,8 +943,8 @@
 			val & 0x80 ? "LM79" : "LM78", (int)address);
 
  release:
-	release_region(address + 4, 4);
-	release_region(address, 4);
+	for (port--; port >= address; port--)
+		release_region(port, 1);
 	return found;
 }
 
--- linux-mvl-dove-2.6.32.orig/drivers/hwmon/tmp421.c
+++ linux-mvl-dove-2.6.32/drivers/hwmon/tmp421.c
@@ -62,9 +62,9 @@
 #define TMP423_DEVICE_ID			0x23
 
 static const struct i2c_device_id tmp421_id[] = {
-	{ "tmp421", tmp421 },
-	{ "tmp422", tmp422 },
-	{ "tmp423", tmp423 },
+	{ "tmp421", 2 },
+	{ "tmp422", 3 },
+	{ "tmp423", 4 },
 	{ }
 };
 MODULE_DEVICE_TABLE(i2c, tmp421_id);
@@ -74,21 +74,23 @@
 	struct mutex update_lock;
 	char valid;
 	unsigned long last_updated;
-	int kind;
+	int channels;
 	u8 config;
 	s16 temp[4];
 };
 
 static int temp_from_s16(s16 reg)
 {
-	int temp = reg;
+	/* Mask out status bits */
+	int temp = reg & ~0xf;
 
 	return (temp * 1000 + 128) / 256;
 }
 
 static int temp_from_u16(u16 reg)
 {
-	int temp = reg;
+	/* Mask out status bits */
+	int temp = reg & ~0xf;
 
 	/* Add offset for extended temperature range. */
 	temp -= 64 * 256;
@@ -108,7 +110,7 @@
 		data->config = i2c_smbus_read_byte_data(client,
 			TMP421_CONFIG_REG_1);
 
-		for (i = 0; i <= data->kind; i++) {
+		for (i = 0; i < data->channels; i++) {
 			data->temp[i] = i2c_smbus_read_byte_data(client,
 				TMP421_TEMP_MSB[i]) << 8;
 			data->temp[i] |= i2c_smbus_read_byte_data(client,
@@ -167,7 +169,7 @@
 	devattr = container_of(a, struct device_attribute, attr);
 	index = to_sensor_dev_attr(devattr)->index;
 
-	if (data->kind > index)
+	if (index < data->channels)
 		return a->mode;
 
 	return 0;
@@ -275,7 +277,7 @@
 
 	i2c_set_clientdata(client, data);
 	mutex_init(&data->update_lock);
-	data->kind = id->driver_data;
+	data->channels = id->driver_data;
 
 	err = tmp421_init_client(client);
 	if (err)
--- linux-mvl-dove-2.6.32.orig/drivers/hwmon/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/hwmon/Kconfig
@@ -39,6 +39,14 @@
 
 comment "Native drivers"
 
+####################################################
+config BMA020
+	tristate "BOSH bma020 acceleration sensor"
+	depends on I2C
+	help
+	support for bosch g-sensor
+####################################################
+
 config SENSORS_ABITUGURU
 	tristate "Abit uGuru (rev 1 & 2)"
 	depends on X86 && EXPERIMENTAL
@@ -374,7 +382,7 @@
 
 config SENSORS_CORETEMP
 	tristate "Intel Core/Core2/Atom temperature sensor"
-	depends on X86 && EXPERIMENTAL
+	depends on X86 && PCI && EXPERIMENTAL
 	help
 	  If you say yes here you get support for the temperature
 	  sensor inside your CPU. Most of the family 6 CPUs
@@ -1008,6 +1016,17 @@
 	  Say Y here if you have an applicable laptop and want to experience
 	  the awesome power of applesmc.
 
+config SENSORS_DOVE
+	tristate "Dove SoC Thermal Sensor"
+	depends on ARCH_DOVE
+	default y
+	help
+	  This driver provides support for the Marvell's Dove SoC thermal
+	  Controller, which provides onchip temperature sensors.
+
+config HWMON_DEBUG_CHIP
+	bool "Hardware Monitoring Chip debugging messages"
+
 if ACPI
 
 comment "ACPI drivers"
--- linux-mvl-dove-2.6.32.orig/drivers/hwmon/ltc4245.c
+++ linux-mvl-dove-2.6.32/drivers/hwmon/ltc4245.c
@@ -45,9 +45,7 @@
 	LTC4245_VEEIN			= 0x19,
 	LTC4245_VEESENSE		= 0x1a,
 	LTC4245_VEEOUT			= 0x1b,
-	LTC4245_GPIOADC1		= 0x1c,
-	LTC4245_GPIOADC2		= 0x1d,
-	LTC4245_GPIOADC3		= 0x1e,
+	LTC4245_GPIOADC			= 0x1c,
 };
 
 struct ltc4245_data {
@@ -61,7 +59,7 @@
 	u8 cregs[0x08];
 
 	/* Voltage registers */
-	u8 vregs[0x0f];
+	u8 vregs[0x0d];
 };
 
 static struct ltc4245_data *ltc4245_update_device(struct device *dev)
@@ -86,7 +84,7 @@
 				data->cregs[i] = val;
 		}
 
-		/* Read voltage registers -- 0x10 to 0x1f */
+		/* Read voltage registers -- 0x10 to 0x1c */
 		for (i = 0; i < ARRAY_SIZE(data->vregs); i++) {
 			val = i2c_smbus_read_byte_data(client, i+0x10);
 			if (unlikely(val < 0))
@@ -128,9 +126,7 @@
 	case LTC4245_VEEOUT:
 		voltage = regval * -55;
 		break;
-	case LTC4245_GPIOADC1:
-	case LTC4245_GPIOADC2:
-	case LTC4245_GPIOADC3:
+	case LTC4245_GPIOADC:
 		voltage = regval * 10;
 		break;
 	default:
@@ -297,9 +293,7 @@
 LTC4245_ALARM(in8_min_alarm,	(1 << 3),	LTC4245_FAULT2);
 
 /* GPIO voltages */
-LTC4245_VOLTAGE(in9_input,			LTC4245_GPIOADC1);
-LTC4245_VOLTAGE(in10_input,			LTC4245_GPIOADC2);
-LTC4245_VOLTAGE(in11_input,			LTC4245_GPIOADC3);
+LTC4245_VOLTAGE(in9_input,			LTC4245_GPIOADC);
 
 /* Power Consumption (virtual) */
 LTC4245_POWER(power1_input,			LTC4245_12VSENSE);
@@ -342,8 +336,6 @@
 	&sensor_dev_attr_in8_min_alarm.dev_attr.attr,
 
 	&sensor_dev_attr_in9_input.dev_attr.attr,
-	&sensor_dev_attr_in10_input.dev_attr.attr,
-	&sensor_dev_attr_in11_input.dev_attr.attr,
 
 	&sensor_dev_attr_power1_input.dev_attr.attr,
 	&sensor_dev_attr_power2_input.dev_attr.attr,
--- linux-mvl-dove-2.6.32.orig/drivers/hwmon/adm1026.c
+++ linux-mvl-dove-2.6.32/drivers/hwmon/adm1026.c
@@ -919,27 +919,27 @@
 	int nr = sensor_attr->index;
 	struct i2c_client *client = to_i2c_client(dev);
 	struct adm1026_data *data = i2c_get_clientdata(client);
-	int val, orig_div, new_div, shift;
+	int val, orig_div, new_div;
 
 	val = simple_strtol(buf, NULL, 10);
 	new_div = DIV_TO_REG(val);
-	if (new_div == 0) {
-		return -EINVAL;
-	}
+
 	mutex_lock(&data->update_lock);
 	orig_div = data->fan_div[nr];
 	data->fan_div[nr] = DIV_FROM_REG(new_div);
 
 	if (nr < 4) { /* 0 <= nr < 4 */
-		shift = 2 * nr;
 		adm1026_write_value(client, ADM1026_REG_FAN_DIV_0_3,
-			((DIV_TO_REG(orig_div) & (~(0x03 << shift))) |
-			(new_div << shift)));
+				    (DIV_TO_REG(data->fan_div[0]) << 0) |
+				    (DIV_TO_REG(data->fan_div[1]) << 2) |
+				    (DIV_TO_REG(data->fan_div[2]) << 4) |
+				    (DIV_TO_REG(data->fan_div[3]) << 6));
 	} else { /* 3 < nr < 8 */
-		shift = 2 * (nr - 4);
 		adm1026_write_value(client, ADM1026_REG_FAN_DIV_4_7,
-			((DIV_TO_REG(orig_div) & (~(0x03 << (2 * shift)))) |
-			(new_div << shift)));
+				    (DIV_TO_REG(data->fan_div[4]) << 0) |
+				    (DIV_TO_REG(data->fan_div[5]) << 2) |
+				    (DIV_TO_REG(data->fan_div[6]) << 4) |
+				    (DIV_TO_REG(data->fan_div[7]) << 6));
 	}
 
 	if (data->fan_div[nr] != orig_div) {
--- linux-mvl-dove-2.6.32.orig/drivers/hwmon/f75375s.c
+++ linux-mvl-dove-2.6.32/drivers/hwmon/f75375s.c
@@ -79,7 +79,7 @@
 #define F75375_REG_PWM2_DROP_DUTY	0x6C
 
 #define FAN_CTRL_LINEAR(nr)		(4 + nr)
-#define FAN_CTRL_MODE(nr)		(5 + ((nr) * 2))
+#define FAN_CTRL_MODE(nr)		(4 + ((nr) * 2))
 
 /*
  * Data structures and manipulation thereof
@@ -298,7 +298,7 @@
 		return -EINVAL;
 
 	fanmode = f75375_read8(client, F75375_REG_FAN_TIMER);
-	fanmode = ~(3 << FAN_CTRL_MODE(nr));
+	fanmode &= ~(3 << FAN_CTRL_MODE(nr));
 
 	switch (val) {
 	case 0: /* Full speed */
@@ -350,7 +350,7 @@
 
 	mutex_lock(&data->update_lock);
 	conf = f75375_read8(client, F75375_REG_CONFIG1);
-	conf = ~(1 << FAN_CTRL_LINEAR(nr));
+	conf &= ~(1 << FAN_CTRL_LINEAR(nr));
 
 	if (val == 0)
 		conf |= (1 << FAN_CTRL_LINEAR(nr)) ;
--- linux-mvl-dove-2.6.32.orig/drivers/hwmon/Makefile
+++ linux-mvl-dove-2.6.32/drivers/hwmon/Makefile
@@ -94,6 +94,9 @@
 obj-$(CONFIG_SENSORS_WM831X)	+= wm831x-hwmon.o
 obj-$(CONFIG_SENSORS_WM8350)	+= wm8350-hwmon.o
 
+obj-$(CONFIG_BMA020)	+= bma020/
+
+
 ifeq ($(CONFIG_HWMON_DEBUG_CHIP),y)
 EXTRA_CFLAGS += -DDEBUG
 endif
--- linux-mvl-dove-2.6.32.orig/drivers/hwmon/k8temp.c
+++ linux-mvl-dove-2.6.32/drivers/hwmon/k8temp.c
@@ -120,7 +120,7 @@
 	int temp;
 	struct k8temp_data *data = k8temp_update_device(dev);
 
-	if (data->swap_core_select)
+	if (data->swap_core_select && (data->sensorsp & SEL_CORE))
 		core = core ? 0 : 1;
 
 	temp = TEMP_FROM_REG(data->temp[core][place]) + data->temp_offset;
@@ -143,6 +143,37 @@
 
 MODULE_DEVICE_TABLE(pci, k8temp_ids);
 
+static int __devinit is_rev_g_desktop(u8 model)
+{
+	u32 brandidx;
+
+	if (model < 0x69)
+		return 0;
+
+	if (model == 0xc1 || model == 0x6c || model == 0x7c)
+		return 0;
+
+	/*
+	 * Differentiate between AM2 and ASB1.
+	 * See "Constructing the processor Name String" in "Revision
+	 * Guide for AMD NPT Family 0Fh Processors" (33610).
+	 */
+	brandidx = cpuid_ebx(0x80000001);
+	brandidx = (brandidx >> 9) & 0x1f;
+
+	/* Single core */
+	if ((model == 0x6f || model == 0x7f) &&
+	    (brandidx == 0x7 || brandidx == 0x9 || brandidx == 0xc))
+		return 0;
+
+	/* Dual core */
+	if (model == 0x6b &&
+	    (brandidx == 0xb || brandidx == 0xc))
+		return 0;
+
+	return 1;
+}
+
 static int __devinit k8temp_probe(struct pci_dev *pdev,
 				  const struct pci_device_id *id)
 {
@@ -179,12 +210,12 @@
 				 "wrong - check erratum #141\n");
 		}
 
-		if ((model >= 0x69) &&
-		    !(model == 0xc1 || model == 0x6c || model == 0x7c)) {
+		if (is_rev_g_desktop(model)) {
 			/*
-			 * RevG desktop CPUs (i.e. no socket S1G1 parts)
-			 * need additional offset, otherwise reported
-			 * temperature is below ambient temperature
+			 * RevG desktop CPUs (i.e. no socket S1G1 or
+			 * ASB1 parts) need additional offset,
+			 * otherwise reported temperature is below
+			 * ambient temperature
 			 */
 			data->temp_offset = 21000;
 		}
--- linux-mvl-dove-2.6.32.orig/drivers/hwmon/f71882fg.c
+++ linux-mvl-dove-2.6.32/drivers/hwmon/f71882fg.c
@@ -1957,7 +1957,6 @@
 	int i;
 	struct f71882fg_data *data = platform_get_drvdata(pdev);
 
-	platform_set_drvdata(pdev, NULL);
 	if (data->hwmon_dev)
 		hwmon_device_unregister(data->hwmon_dev);
 
@@ -1982,6 +1981,7 @@
 	for (i = 0; i < ARRAY_SIZE(f8000_fan_attr); i++)
 		device_remove_file(&pdev->dev, &f8000_fan_attr[i].dev_attr);
 
+	platform_set_drvdata(pdev, NULL);
 	kfree(data);
 
 	return 0;
--- linux-mvl-dove-2.6.32.orig/drivers/hwmon/lis3lv02d.h
+++ linux-mvl-dove-2.6.32/drivers/hwmon/lis3lv02d.h
@@ -103,6 +103,7 @@
 	CTRL1_DF1	= 0x20,
 	CTRL1_PD0	= 0x40,
 	CTRL1_PD1	= 0x80,
+	CTRL1_DR	= 0x80, /* Data rate on 8 bits */
 };
 enum lis3lv02d_ctrl2 {
 	CTRL2_DAS	= 0x01,
--- linux-mvl-dove-2.6.32.orig/drivers/hwmon/max1111.c
+++ linux-mvl-dove-2.6.32/drivers/hwmon/max1111.c
@@ -39,6 +39,8 @@
 	struct spi_transfer	xfer[2];
 	uint8_t *tx_buf;
 	uint8_t *rx_buf;
+	struct mutex		drvdata_lock;
+	/* protect msg, xfer and buffers from multiple access */
 };
 
 static int max1111_read(struct device *dev, int channel)
@@ -47,6 +49,9 @@
 	uint8_t v1, v2;
 	int err;
 
+	/* writing to drvdata struct is not thread safe, wait on mutex */
+	mutex_lock(&data->drvdata_lock);
+
 	data->tx_buf[0] = (channel << MAX1111_CTRL_SEL_SH) |
 		MAX1111_CTRL_PD0 | MAX1111_CTRL_PD1 |
 		MAX1111_CTRL_SGL | MAX1111_CTRL_UNI | MAX1111_CTRL_STR;
@@ -54,12 +59,15 @@
 	err = spi_sync(data->spi, &data->msg);
 	if (err < 0) {
 		dev_err(dev, "spi_sync failed with %d\n", err);
+		mutex_unlock(&data->drvdata_lock);
 		return err;
 	}
 
 	v1 = data->rx_buf[0];
 	v2 = data->rx_buf[1];
 
+	mutex_unlock(&data->drvdata_lock);
+
 	if ((v1 & 0xc0) || (v2 & 0x3f))
 		return -EINVAL;
 
@@ -175,6 +183,8 @@
 	if (err)
 		goto err_free_data;
 
+	mutex_init(&data->drvdata_lock);
+
 	data->spi = spi;
 	spi_set_drvdata(spi, data);
 
@@ -212,6 +222,7 @@
 
 	hwmon_device_unregister(data->hwmon_dev);
 	sysfs_remove_group(&spi->dev.kobj, &max1111_attr_group);
+	mutex_destroy(&data->drvdata_lock);
 	kfree(data->rx_buf);
 	kfree(data->tx_buf);
 	kfree(data);
--- linux-mvl-dove-2.6.32.orig/drivers/hwmon/coretemp.c
+++ linux-mvl-dove-2.6.32/drivers/hwmon/coretemp.c
@@ -33,6 +33,7 @@
 #include <linux/list.h>
 #include <linux/platform_device.h>
 #include <linux/cpu.h>
+#include <linux/pci.h>
 #include <asm/msr.h>
 #include <asm/processor.h>
 
@@ -52,6 +53,7 @@
 	struct mutex update_lock;
 	const char *name;
 	u32 id;
+	u16 core_id;
 	char valid;		/* zero until following fields are valid */
 	unsigned long last_updated;	/* in jiffies */
 	int temp;
@@ -74,7 +76,7 @@
 	if (attr->index == SHOW_NAME)
 		ret = sprintf(buf, "%s\n", data->name);
 	else	/* show label */
-		ret = sprintf(buf, "Core %d\n", data->id);
+		ret = sprintf(buf, "Core %d\n", data->core_id);
 	return ret;
 }
 
@@ -161,6 +163,7 @@
 	int usemsr_ee = 1;
 	int err;
 	u32 eax, edx;
+	struct pci_dev *host_bridge;
 
 	/* Early chips have no MSR for TjMax */
 
@@ -168,11 +171,21 @@
 		usemsr_ee = 0;
 	}
 
-	/* Atoms seems to have TjMax at 90C */
+	/* Atom CPUs */
 
 	if (c->x86_model == 0x1c) {
 		usemsr_ee = 0;
-		tjmax = 90000;
+
+		host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
+
+		if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL
+		    && (host_bridge->device == 0xa000	/* NM10 based nettop */
+		    || host_bridge->device == 0xa010))	/* NM10 based netbook */
+			tjmax = 100000;
+		else
+			tjmax = 90000;
+
+		pci_dev_put(host_bridge);
 	}
 
 	if ((c->x86_model > 0xe) && (usemsr_ee)) {
@@ -216,7 +229,7 @@
 		if (err) {
 			dev_warn(dev,
 				 "Unable to access MSR 0xEE, for Tjmax, left"
-				 " at default");
+				 " at default\n");
 		} else if (eax & 0x40000000) {
 			tjmax = tjmax_ee;
 		}
@@ -243,6 +256,9 @@
 	}
 
 	data->id = pdev->id;
+#ifdef CONFIG_SMP
+	data->core_id = c->cpu_core_id;
+#endif
 	data->name = "coretemp";
 	mutex_init(&data->update_lock);
 
@@ -340,6 +356,10 @@
 	struct list_head list;
 	struct platform_device *pdev;
 	unsigned int cpu;
+#ifdef CONFIG_SMP
+	u16 phys_proc_id;
+	u16 cpu_core_id;
+#endif
 };
 
 static LIST_HEAD(pdev_list);
@@ -350,6 +370,22 @@
 	int err;
 	struct platform_device *pdev;
 	struct pdev_entry *pdev_entry;
+#ifdef CONFIG_SMP
+	struct cpuinfo_x86 *c = &cpu_data(cpu);
+#endif
+
+	mutex_lock(&pdev_list_mutex);
+
+#ifdef CONFIG_SMP
+	/* Skip second HT entry of each core */
+	list_for_each_entry(pdev_entry, &pdev_list, list) {
+		if (c->phys_proc_id == pdev_entry->phys_proc_id &&
+		    c->cpu_core_id == pdev_entry->cpu_core_id) {
+			err = 0;	/* Not an error */
+			goto exit;
+		}
+	}
+#endif
 
 	pdev = platform_device_alloc(DRVNAME, cpu);
 	if (!pdev) {
@@ -373,7 +409,10 @@
 
 	pdev_entry->pdev = pdev;
 	pdev_entry->cpu = cpu;
-	mutex_lock(&pdev_list_mutex);
+#ifdef CONFIG_SMP
+	pdev_entry->phys_proc_id = c->phys_proc_id;
+	pdev_entry->cpu_core_id = c->cpu_core_id;
+#endif
 	list_add_tail(&pdev_entry->list, &pdev_list);
 	mutex_unlock(&pdev_list_mutex);
 
@@ -384,6 +423,7 @@
 exit_device_put:
 	platform_device_put(pdev);
 exit:
+	mutex_unlock(&pdev_list_mutex);
 	return err;
 }
 
--- linux-mvl-dove-2.6.32.orig/drivers/hwmon/via686a.c
+++ linux-mvl-dove-2.6.32/drivers/hwmon/via686a.c
@@ -687,6 +687,13 @@
 	return 0;
 }
 
+static void via686a_update_fan_div(struct via686a_data *data)
+{
+	int reg = via686a_read_value(data, VIA686A_REG_FANDIV);
+	data->fan_div[0] = (reg >> 4) & 0x03;
+	data->fan_div[1] = reg >> 6;
+}
+
 static void __devinit via686a_init_device(struct via686a_data *data)
 {
 	u8 reg;
@@ -700,6 +707,9 @@
 	via686a_write_value(data, VIA686A_REG_TEMP_MODE,
 			    (reg & ~VIA686A_TEMP_MODE_MASK)
 			    | VIA686A_TEMP_MODE_CONTINUOUS);
+
+	/* Pre-read fan clock divisor values */
+	via686a_update_fan_div(data);
 }
 
 static struct via686a_data *via686a_update_device(struct device *dev)
@@ -751,9 +761,7 @@
 		    (via686a_read_value(data, VIA686A_REG_TEMP_LOW23) &
 		     0xc0) >> 6;
 
-		i = via686a_read_value(data, VIA686A_REG_FANDIV);
-		data->fan_div[0] = (i >> 4) & 0x03;
-		data->fan_div[1] = i >> 6;
+		via686a_update_fan_div(data);
 		data->alarms =
 		    via686a_read_value(data,
 				       VIA686A_REG_ALARM1) |
--- linux-mvl-dove-2.6.32.orig/drivers/hwmon/lis3lv02d.c
+++ linux-mvl-dove-2.6.32/drivers/hwmon/lis3lv02d.c
@@ -127,12 +127,14 @@
 
 	/*
 	 * Common configuration
-	 * BDU: LSB and MSB values are not updated until both have been read.
-	 *      So the value read will always be correct.
+	 * BDU: (12 bits sensors only) LSB and MSB values are not updated until
+	 *      both have been read. So the value read will always be correct.
 	 */
-	lis3->read(lis3, CTRL_REG2, &reg);
-	reg |= CTRL2_BDU;
-	lis3->write(lis3, CTRL_REG2, reg);
+	if (lis3->whoami == LIS_DOUBLE_ID) {
+		lis3->read(lis3, CTRL_REG2, &reg);
+		reg |= CTRL2_BDU;
+		lis3->write(lis3, CTRL_REG2, reg);
+	}
 }
 EXPORT_SYMBOL_GPL(lis3lv02d_poweron);
 
@@ -361,7 +363,8 @@
 }
 
 /* conversion btw sampling rate and the register values */
-static int lis3lv02dl_df_val[4] = {40, 160, 640, 2560};
+static int lis3_12_rates[4] = {40, 160, 640, 2560};
+static int lis3_8_rates[2] = {100, 400};
 static ssize_t lis3lv02d_rate_show(struct device *dev,
 			struct device_attribute *attr, char *buf)
 {
@@ -369,8 +372,13 @@
 	int val;
 
 	lis3_dev.read(&lis3_dev, CTRL_REG1, &ctrl);
-	val = (ctrl & (CTRL1_DF0 | CTRL1_DF1)) >> 4;
-	return sprintf(buf, "%d\n", lis3lv02dl_df_val[val]);
+
+	if (lis3_dev.whoami == LIS_DOUBLE_ID)
+		val = lis3_12_rates[(ctrl & (CTRL1_DF0 | CTRL1_DF1)) >> 4];
+	else
+		val = lis3_8_rates[(ctrl & CTRL1_DR) >> 7];
+
+	return sprintf(buf, "%d\n", val);
 }
 
 static DEVICE_ATTR(position, S_IRUGO, lis3lv02d_position_show, NULL);
--- linux-mvl-dove-2.6.32.orig/drivers/hwmon/lm85.c
+++ linux-mvl-dove-2.6.32/drivers/hwmon/lm85.c
@@ -1286,6 +1286,7 @@
 	switch (data->type) {
 	case adm1027:
 	case adt7463:
+	case adt7468:
 	case emc6d100:
 	case emc6d102:
 		data->freq_map = adm1027_freq_map;
--- linux-mvl-dove-2.6.32.orig/drivers/hwmon/hp_accel.c
+++ linux-mvl-dove-2.6.32/drivers/hwmon/hp_accel.c
@@ -324,8 +324,8 @@
 	lis3lv02d_joystick_disable();
 	lis3lv02d_poweroff(&lis3_dev);
 
-	flush_work(&hpled_led.work);
 	led_classdev_unregister(&hpled_led.led_classdev);
+	flush_work(&hpled_led.work);
 
 	return lis3lv02d_remove_fs(&lis3_dev);
 }
--- linux-mvl-dove-2.6.32.orig/drivers/hwmon/applesmc.c
+++ linux-mvl-dove-2.6.32/drivers/hwmon/applesmc.c
@@ -142,6 +142,30 @@
 	  "TM1S", "TM2P", "TM2S", "TM3S", "TM8P", "TM8S", "TM9P", "TM9S",
 	  "TN0C", "TN0D", "TN0H", "TS0C", "Tp0C", "Tp1C", "Tv0S", "Tv1S",
 	  NULL },
+/* Set 17: iMac 9,1 */
+	{ "TA0P", "TC0D", "TC0H", "TC0P", "TG0D", "TG0H", "TH0P", "TL0P",
+	  "TN0D", "TN0H", "TN0P", "TO0P", "Tm0P", "Tp0P", NULL },
+/* Set 18: MacBook Pro 2,2 */
+	{ "TB0T", "TC0D", "TC0P", "TG0H", "TG0P", "TG0T", "TM0P", "TTF0",
+	  "Th0H", "Th1H", "Tm0P", "Ts0P", NULL },
+/* Set 19: Macbook Pro 5,3 */
+	{ "TB0T", "TB1T", "TB2T", "TB3T", "TC0D", "TC0F", "TC0P", "TG0D",
+	  "TG0F", "TG0H", "TG0P", "TG0T", "TN0D", "TN0P", "TTF0", "Th2H",
+	  "Tm0P", "Ts0P", "Ts0S", NULL },
+/* Set 20: MacBook Pro 5,4 */
+	{ "TB0T", "TB1T", "TB2T", "TB3T", "TC0D", "TC0F", "TC0P", "TN0D",
+	  "TN0P", "TTF0", "Th2H", "Ts0P", "Ts0S", NULL },
+/* Set 21: MacBook Pro 6,2 */
+	{ "TB0T", "TB1T", "TB2T", "TC0C", "TC0D", "TC0P", "TC1C", "TG0D",
+	  "TG0P", "TG0T", "TMCD", "TP0P", "TPCD", "Th1H", "Th2H", "Tm0P",
+	  "Ts0P", "Ts0S", NULL },
+/* Set 22: MacBook Pro 7,1 */
+	{ "TB0T", "TB1T", "TB2T", "TC0D", "TC0P", "TN0D", "TN0P", "TN0S",
+	  "TN1D", "TN1F", "TN1G", "TN1S", "Th1H", "Ts0P", "Ts0S", NULL },
+/* Set 23: MacBook Air 3,1 */
+	{ "TB0T", "TB1T", "TB2T", "TC0D", "TC0E", "TC0P", "TC1E", "TCZ3",
+	  "TCZ4", "TCZ5", "TG0E", "TG1E", "TG2E", "TGZ3", "TGZ4", "TGZ5",
+	  "TH0F", "TH0O", "TM0P" },
 };
 
 /* List of keys used to read/write fan speeds */
@@ -1350,11 +1374,29 @@
 	{ .accelerometer = 1, .light = 1, .temperature_set = 15 },
 /* MacPro3,1: temperature set 16 */
 	{ .accelerometer = 0, .light = 0, .temperature_set = 16 },
+/* iMac 9,1: light sensor only, temperature set 17 */
+	{ .accelerometer = 0, .light = 0, .temperature_set = 17 },
+/* MacBook Pro 2,2: accelerometer, backlight and temperature set 18 */
+	{ .accelerometer = 1, .light = 1, .temperature_set = 18 },
+/* MacBook Pro 5,3: accelerometer, backlight and temperature set 19 */
+	{ .accelerometer = 1, .light = 1, .temperature_set = 19 },
+/* MacBook Pro 5,4: accelerometer, backlight and temperature set 20 */
+	{ .accelerometer = 1, .light = 1, .temperature_set = 20 },
+/* MacBook Pro 6,2: accelerometer, backlight and temperature set 21 */
+	{ .accelerometer = 1, .light = 1, .temperature_set = 21 },
+/* MacBook Pro 7,1: accelerometer, backlight and temperature set 22 */
+	{ .accelerometer = 1, .light = 1, .temperature_set = 22 },
+/* MacBook Air 3,1: accelerometer, backlight and temperature set 23 */
+	{ .accelerometer = 0, .light = 0, .temperature_set = 23 },
 };
 
 /* Note that DMI_MATCH(...,"MacBook") will match "MacBookPro1,1".
  * So we need to put "Apple MacBook Pro" before "Apple MacBook". */
 static __initdata struct dmi_system_id applesmc_whitelist[] = {
+	{ applesmc_dmi_match, "Apple MacBook Air 3", {
+	  DMI_MATCH(DMI_BOARD_VENDOR, "Apple"),
+	  DMI_MATCH(DMI_PRODUCT_NAME, "MacBookAir3") },
+		&applesmc_dmi_data[23]},
 	{ applesmc_dmi_match, "Apple MacBook Air 2", {
 	  DMI_MATCH(DMI_BOARD_VENDOR, "Apple"),
 	  DMI_MATCH(DMI_PRODUCT_NAME, "MacBookAir2") },
@@ -1363,6 +1405,22 @@
 	  DMI_MATCH(DMI_BOARD_VENDOR, "Apple"),
 	  DMI_MATCH(DMI_PRODUCT_NAME, "MacBookAir") },
 		&applesmc_dmi_data[7]},
+	{ applesmc_dmi_match, "Apple MacBook Pro 7", {
+	  DMI_MATCH(DMI_BOARD_VENDOR, "Apple"),
+	  DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro7") },
+		&applesmc_dmi_data[22]},
+	{ applesmc_dmi_match, "Apple MacBook Pro 5,4", {
+	  DMI_MATCH(DMI_BOARD_VENDOR, "Apple"),
+	  DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro5,4") },
+		&applesmc_dmi_data[20]},
+	{ applesmc_dmi_match, "Apple MacBook Pro 5,3", {
+	  DMI_MATCH(DMI_BOARD_VENDOR, "Apple"),
+	  DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro5,3") },
+		&applesmc_dmi_data[19]},
+	{ applesmc_dmi_match, "Apple MacBook Pro 6", {
+	  DMI_MATCH(DMI_BOARD_VENDOR, "Apple"),
+	  DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro6") },
+		&applesmc_dmi_data[21]},
 	{ applesmc_dmi_match, "Apple MacBook Pro 5", {
 	  DMI_MATCH(DMI_BOARD_VENDOR, "Apple"),
 	  DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro5") },
@@ -1375,6 +1433,10 @@
 	  DMI_MATCH(DMI_BOARD_VENDOR, "Apple"),
 	  DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro3") },
 		&applesmc_dmi_data[9]},
+	{ applesmc_dmi_match, "Apple MacBook Pro 2,2", {
+	  DMI_MATCH(DMI_BOARD_VENDOR, "Apple Computer, Inc."),
+	  DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro2,2") },
+		&applesmc_dmi_data[18]},
 	{ applesmc_dmi_match, "Apple MacBook Pro", {
 	  DMI_MATCH(DMI_BOARD_VENDOR,"Apple"),
 	  DMI_MATCH(DMI_PRODUCT_NAME,"MacBookPro") },
@@ -1415,6 +1477,10 @@
 	  DMI_MATCH(DMI_BOARD_VENDOR, "Apple"),
 	  DMI_MATCH(DMI_PRODUCT_NAME, "MacPro") },
 		&applesmc_dmi_data[4]},
+	{ applesmc_dmi_match, "Apple iMac 9,1", {
+	  DMI_MATCH(DMI_BOARD_VENDOR, "Apple Inc."),
+	  DMI_MATCH(DMI_PRODUCT_NAME, "iMac9,1") },
+		&applesmc_dmi_data[17]},
 	{ applesmc_dmi_match, "Apple iMac 8", {
 	  DMI_MATCH(DMI_BOARD_VENDOR, "Apple"),
 	  DMI_MATCH(DMI_PRODUCT_NAME, "iMac8") },
--- linux-mvl-dove-2.6.32.orig/drivers/hwmon/pc87360.c
+++ linux-mvl-dove-2.6.32/drivers/hwmon/pc87360.c
@@ -1610,11 +1610,8 @@
 
 static int __init pc87360_device_add(unsigned short address)
 {
-	struct resource res = {
-		.name	= "pc87360",
-		.flags	= IORESOURCE_IO,
-	};
-	int err, i;
+	struct resource res[3];
+	int err, i, res_count;
 
 	pdev = platform_device_alloc("pc87360", address);
 	if (!pdev) {
@@ -1623,22 +1620,28 @@
 		goto exit;
 	}
 
+	memset(res, 0, 3 * sizeof(struct resource));
+	res_count = 0;
 	for (i = 0; i < 3; i++) {
 		if (!extra_isa[i])
 			continue;
-		res.start = extra_isa[i];
-		res.end = extra_isa[i] + PC87360_EXTENT - 1;
+		res[res_count].start = extra_isa[i];
+		res[res_count].end = extra_isa[i] + PC87360_EXTENT - 1;
+		res[res_count].name = "pc87360",
+		res[res_count].flags = IORESOURCE_IO,
 
-		err = acpi_check_resource_conflict(&res);
+		err = acpi_check_resource_conflict(&res[res_count]);
 		if (err)
 			goto exit_device_put;
 
-		err = platform_device_add_resources(pdev, &res, 1);
-		if (err) {
-			printk(KERN_ERR "pc87360: Device resource[%d] "
-			       "addition failed (%d)\n", i, err);
-			goto exit_device_put;
-		}
+		res_count++;
+	}
+
+	err = platform_device_add_resources(pdev, res, res_count);
+	if (err) {
+		printk(KERN_ERR "pc87360: Device resources addition failed "
+		       "(%d)\n", err);
+		goto exit_device_put;
 	}
 
 	err = platform_device_add(pdev);
--- linux-mvl-dove-2.6.32.orig/drivers/hwmon/ams/ams-i2c.c
+++ linux-mvl-dove-2.6.32/drivers/hwmon/ams/ams-i2c.c
@@ -238,6 +238,8 @@
 static int ams_i2c_remove(struct i2c_client *client)
 {
 	if (ams_info.has_device) {
+		ams_sensor_detach();
+
 		/* Disable interrupts */
 		ams_i2c_set_irq(AMS_IRQ_ALL, 0);
 
--- linux-mvl-dove-2.6.32.orig/drivers/hwmon/ams/ams.h
+++ linux-mvl-dove-2.6.32/drivers/hwmon/ams/ams.h
@@ -61,6 +61,7 @@
 
 extern void ams_sensors(s8 *x, s8 *y, s8 *z);
 extern int ams_sensor_attach(void);
+extern void ams_sensor_detach(void);
 
 extern int ams_pmu_init(struct device_node *np);
 extern int ams_i2c_init(struct device_node *np);
--- linux-mvl-dove-2.6.32.orig/drivers/hwmon/ams/ams-pmu.c
+++ linux-mvl-dove-2.6.32/drivers/hwmon/ams/ams-pmu.c
@@ -133,6 +133,8 @@
 
 static void ams_pmu_exit(void)
 {
+	ams_sensor_detach();
+
 	/* Disable interrupts */
 	ams_pmu_set_irq(AMS_IRQ_ALL, 0);
 
--- linux-mvl-dove-2.6.32.orig/drivers/hwmon/ams/ams-core.c
+++ linux-mvl-dove-2.6.32/drivers/hwmon/ams/ams-core.c
@@ -213,7 +213,7 @@
 	return -ENODEV;
 }
 
-void ams_exit(void)
+void ams_sensor_detach(void)
 {
 	/* Remove input device */
 	ams_input_exit();
@@ -221,9 +221,6 @@
 	/* Remove attributes */
 	device_remove_file(&ams_info.of_dev->dev, &dev_attr_current);
 
-	/* Shut down implementation */
-	ams_info.exit();
-
 	/* Flush interrupt worker
 	 *
 	 * We do this after ams_info.exit(), because an interrupt might
@@ -239,6 +236,12 @@
 	pmf_unregister_irq_client(&ams_freefall_client);
 }
 
+static void __exit ams_exit(void)
+{
+	/* Shut down implementation */
+	ams_info.exit();
+}
+
 MODULE_AUTHOR("Stelian Pop, Michael Hanselmann");
 MODULE_DESCRIPTION("Apple Motion Sensor driver");
 MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/drivers/hwmon/bma020/bma020_fs.c
+++ linux-mvl-dove-2.6.32/drivers/hwmon/bma020/bma020_fs.c
@@ -0,0 +1,1471 @@
+/*
+*  bma020_fs.c - ST BMA020 accelerometer driver
+*
+*  Copyright (C) 2007-2008 Yan Burman
+*  Copyright (C) 2008 Eric Piel
+*
+*  This program is free software; you can redistribute it and/or modify
+*  it under the terms of the GNU General Public License as published by
+*  the Free Software Foundation; either version 2 of the License, or
+*  (at your option) any later version.
+*
+*  This program is distributed in the hope that it will be useful,
+*  but WITHOUT ANY WARRANTY; without even the implied warranty of
+*  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+*  GNU General Public License for more details.
+*
+*  You should have received a copy of the GNU General Public License
+*  along with this program; if not, write to the Free Software
+*  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+*/
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/dmi.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/platform_device.h>
+#include <linux/interrupt.h>
+#include <linux/input.h>
+#include <linux/kthread.h>
+#include <linux/semaphore.h>
+#include <linux/delay.h>
+#include <linux/wait.h>
+#include <linux/poll.h>
+#include <linux/freezer.h>
+#include <linux/uaccess.h>
+#include <linux/proc_fs.h>
+#include <linux/i2c.h>
+#include <asm/atomic.h>
+#include <linux/fs.h>
+#include <asm/system.h>
+#include <mach/gpio.h>
+//#include <mach/gpio_ec.h>  //JP
+//#include <mach/mfp-pxa168.h> //JP
+#include <mach/irqs.h>
+
+#include "bma020_fs.h"
+/* #define DEBUG_INFO */
+
+static struct i2c_bma020 bma_dev;
+static struct i2c_client *g_client;
+
+//**********************i2c bus function*****************************//
+
+static int i2c_bma020_read_buf(u8 reg_addr, u8 *buf, u8 cnt)/* ret 0 for success */
+{
+	int ret = 0;
+
+	if (NULL == g_client)	/* No global client pointer? */
+		return -EFAULT;
+	/*
+	if (-1 == set_bus_busy())
+		return -EINVAL;
+	*/
+	ret = i2c_master_send(g_client, &reg_addr, 1);/* i2c_smbus_write_byte(g_client,reg_addr); */
+	/* set_bus_free(); */
+
+	if (ret < 0)
+		return -EIO;
+
+	/*
+	if (-1 == set_bus_busy())
+		return -EINVAL;
+	*/
+	ret = i2c_master_recv(g_client, buf, cnt);
+	/* set_bus_free(); */
+
+	if (ret < 0)
+		return -EIO;
+
+	return 0;
+}
+
+static int i2c_bma020_write_buf(u8 reg_addr, u8 *buf, u8 cnt)/* ret 0 for success */
+{
+	int ret = 0;
+	int status;
+
+	if (NULL == g_client)	/* No global client pointer? */
+		return -EFAULT;
+
+	/*
+	if (-1 == set_bus_busy())
+		return -EINVAL;
+	*/
+	ret = i2c_smbus_write_byte_data(g_client, reg_addr, *buf);/* 0 for success */
+	/* set_bus_free(); */
+
+	if (0 == ret)
+		return 0;
+	else
+		return -EIO;
+}
+
+//*************************** low level operation **************************************//
+static int bma020_detect(void)
+{
+	int comres = 0;
+	unsigned char data;
+	/* get chip info. */
+	bma_dev.dev_addr = BMA020_I2C_ADDR;	/* preset SM380 I2C_addr */
+	comres |= i2c_bma020_read_buf(CHIP_ID__REG, &data, 1);/* read Chip Id */
+	bma_dev.chip_id = BMA020_GET_BITSLICE(data, CHIP_ID);	/* get bitslice */
+	comres |= i2c_bma020_read_buf(ML_VERSION__REG, &data, 1); /* read Version reg */
+	bma_dev.ml_version = BMA020_GET_BITSLICE(data, ML_VERSION);	/* get ML Version */
+	bma_dev.al_version = BMA020_GET_BITSLICE(data, AL_VERSION);/* get AL Version */
+
+	return comres;
+}
+
+/** Perform soft reset of BMA020 via bus command
+*/
+int bma020_soft_reset(void)
+{
+	int comres;
+	unsigned char data = 0;
+	data = BMA020_SET_BITSLICE(data, SOFT_RESET, 1);
+	comres = i2c_bma020_write_buf(SOFT_RESET__REG, &data, 1);
+	return comres;
+}
+
+/**	start BMA020s integrated selftest function
+\param st 1 = selftest0, 3 = selftest1 (see also)
+\return result of bus communication function
+\see BMA020_SELF_TEST0_ON
+\see BMA020_SELF_TEST1_ON
+*/
+int bma020_selftest(unsigned char st)
+{
+	int comres;
+	unsigned char data;
+	comres = i2c_bma020_read_buf(SELF_TEST__REG, &data, 1);
+	data = BMA020_SET_BITSLICE(data, SELF_TEST, st);
+	comres |= i2c_bma020_write_buf(SELF_TEST__REG, &data, 1);
+	return comres;
+}
+
+/**	set bma020s range
+\param range
+\return  result of bus communication function
+\see BMA020_RANGE_2G
+\see BMA020_RANGE_4G
+\see BMA020_RANGE_8G
+*/
+int bma020_set_range(char range)
+{
+	int comres = 0;
+	unsigned char data;
+
+	if (range < 3) {
+		comres = i2c_bma020_read_buf(RANGE__REG, &data, 1);
+		data = BMA020_SET_BITSLICE(data, RANGE, range);
+		comres |= i2c_bma020_write_buf(RANGE__REG, &data, 1);
+	}
+	return comres;
+}
+
+/* readout select range from BMA020
+\param *range pointer to range setting
+\return result of bus communication function
+\see BMA020_RANGE_2G, BMA020_RANGE_4G, BMA020_RANGE_8G
+\see bma020_set_range()
+*/
+int bma020_get_range(unsigned char *range)
+{
+	int comres = 0;
+
+	comres = i2c_bma020_read_buf(RANGE__REG, range, 1);
+	*range = BMA020_GET_BITSLICE(*range, RANGE);
+	return comres;
+}
+
+/** set BMA020s operation mode
+\param mode 0 = normal, 2 = sleep, 3 = auto wake up
+\return result of bus communication function
+\note Available constants see below
+\see BMA020_MODE_NORMAL, BMA020_MODE_SLEEP, BMA020_MODE_WAKE_UP
+\see bma020_get_mode()
+*/
+int bma020_set_mode(unsigned char mode)
+{
+	int comres = 0;
+	unsigned char data1, data2;
+
+	if (mode < 4 || mode != 1) {
+		comres = i2c_bma020_read_buf(WAKE_UP__REG, &data1, 1);
+		data1  = BMA020_SET_BITSLICE(data1, WAKE_UP, mode);
+		comres |= i2c_bma020_read_buf(SLEEP__REG, &data2, 1);
+		data2  = BMA020_SET_BITSLICE(data2, SLEEP, (mode >> 1));
+
+		comres |= i2c_bma020_write_buf(WAKE_UP__REG, &data1, 1);
+		comres |= i2c_bma020_write_buf(SLEEP__REG, &data2, 1);
+		bma_dev.mode = mode;
+	}
+	return comres;
+}
+
+/** get selected mode
+\return used mode
+\note this function returns the mode stored in \ref bma020_t structure
+\see BMA020_MODE_NORMAL, BMA020_MODE_SLEEP, BMA020_MODE_WAKE_UP
+\see bma020_set_mode()
+*/
+unsigned char bma020_get_mode(void)
+{
+	return bma_dev.mode;
+}
+
+/** set BMA020 internal filter bandwidth
+\param bw bandwidth (see bandwidth constants)
+\return result of bus communication function
+\see #define BMA020_BW_25HZ, BMA020_BW_50HZ, BMA020_BW_100HZ,
+\BMA020_BW_190HZ, BMA020_BW_375HZ,
+\BMA020_BW_750HZ, BMA020_BW_1500HZ
+\see bma020_get_bandwidth()
+*/
+int bma020_set_bandwidth(char bw)
+{
+	int comres = 0;
+	unsigned char data;
+	if (bw < 8) {
+		comres = i2c_bma020_read_buf(BANDWIDTH__REG, &data, 1);
+		data = BMA020_SET_BITSLICE(data, BANDWIDTH, bw);
+		comres |= i2c_bma020_write_buf(BANDWIDTH__REG, &data, 1);
+	}
+	return comres;
+}
+
+/** read selected bandwidth from BMA020
+\param *bw pointer to bandwidth return value
+\return result of bus communication function
+\see #define BMA020_BW_25HZ, BMA020_BW_50HZ, BMA020_BW_100HZ,
+\BMA020_BW_190HZ, BMA020_BW_375HZ,BMA020_BW_750HZ, BMA020_BW_1500HZ
+\see bma020_set_bandwidth()
+*/
+int bma020_get_bandwidth(unsigned char *bw)
+{
+	int comres = 1;
+
+	comres = i2c_bma020_read_buf(BANDWIDTH__REG, bw, 1);
+	*bw = BMA020_GET_BITSLICE(*bw, BANDWIDTH);
+	return comres;
+}
+
+/** set BMA020 auto wake up pause
+\param wup wake_up_pause parameters
+\return result of bus communication function
+\see BMA020_WAKE_UP_PAUSE_20MS, BMA020_WAKE_UP_PAUSE_80MS,
+\BMA020_WAKE_UP_PAUSE_320MS,BMA020_WAKE_UP_PAUSE_2560MS
+\see bma020_get_wake_up_pause()
+*/
+
+int bma020_set_wake_up_pause(unsigned char wup)
+{
+	int comres = 0;
+	unsigned char data;
+
+	comres = i2c_bma020_read_buf(WAKE_UP_PAUSE__REG, &data, 1);
+	data = BMA020_SET_BITSLICE(data, WAKE_UP_PAUSE, wup);
+	comres |= i2c_bma020_write_buf(WAKE_UP_PAUSE__REG, &data, 1);
+	return comres;
+}
+
+/** read BMA020 auto wake up pause from image
+\param *wup wake up pause read back pointer
+\see BMA020_WAKE_UP_PAUSE_20MS, BMA020_WAKE_UP_PAUSE_80MS,
+\BMA020_WAKE_UP_PAUSE_320MS,BMA020_WAKE_UP_PAUSE_2560MS
+\see bma020_set_wake_up_pause()
+*/
+int bma020_get_wake_up_pause(unsigned char *wup)
+{
+	int comres = 1;
+	unsigned char data;
+	comres = i2c_bma020_read_buf(WAKE_UP_PAUSE__REG, &data,  1);
+	*wup = BMA020_GET_BITSLICE(data, WAKE_UP_PAUSE);
+	return comres;
+}
+
+/* Thresholds and Interrupt Configuration */
+/** set low-g interrupt threshold
+\param th set the threshold
+\note the threshold depends on configured range. A macro
+\ref BMA020_LG_THRES_IN_G() for range to
+\register value conversion is available.
+\see BMA020_LG_THRES_IN_G()
+\see bma020_get_low_g_threshold()
+*/
+int bma020_set_low_g_threshold(unsigned char th)
+{
+	int comres;
+	comres = i2c_bma020_write_buf(LG_THRES__REG, &th, 1);
+	return comres;
+}
+
+/** get low-g interrupt threshold
+\param *th get the threshold  value from sensor image
+\see bma020_set_low_g_threshold()
+*/
+int bma020_get_low_g_threshold(unsigned char *th)
+{
+	int comres = 1;
+	comres = i2c_bma020_read_buf(LG_THRES__REG, th, 1);
+	return comres;
+}
+
+/** set low-g interrupt countdown
+\param cnt get the countdown value from sensor image
+\see bma020_get_low_g_countdown()
+*/
+int bma020_set_low_g_countdown(unsigned char cnt)
+{
+	int comres = 0;
+	unsigned char data;
+	comres = i2c_bma020_read_buf(COUNTER_LG__REG, &data, 1);
+	data = BMA020_SET_BITSLICE(data, COUNTER_LG, cnt);
+	comres |= i2c_bma020_write_buf(COUNTER_LG__REG, &data, 1);
+	return comres;
+}
+
+/** get low-g interrupt countdown
+\param cnt get the countdown  value from sensor image
+\see bma020_set_low_g_countdown()
+*/
+int bma020_get_low_g_countdown(unsigned char *cnt)
+{
+	int comres = 1;
+	unsigned char data;
+	comres = i2c_bma020_read_buf(COUNTER_LG__REG, &data,  1);
+	*cnt = BMA020_GET_BITSLICE(data, COUNTER_LG);
+	return comres;
+}
+
+/** set high-g interrupt countdown
+\param cnt get the countdown value from sensor image
+\see bma020_get_high_g_countdown()
+*/
+int bma020_set_high_g_countdown(unsigned char cnt)
+{
+	int comres = 1;
+	unsigned char data;
+	comres = i2c_bma020_read_buf(COUNTER_HG__REG, &data, 1);
+	data = BMA020_SET_BITSLICE(data, COUNTER_HG, cnt);
+	comres |= i2c_bma020_write_buf(COUNTER_HG__REG, &data, 1);
+	return comres;
+}
+
+/** get high-g interrupt countdown
+\param cnt get the countdown  value from sensor image
+\see bma020_set_high_g_countdown()
+*/
+int bma020_get_high_g_countdown(unsigned char *cnt)
+{
+	int comres = 0;
+	unsigned char data;
+	comres = i2c_bma020_read_buf(COUNTER_HG__REG, &data,  1);
+	*cnt = BMA020_GET_BITSLICE(data, COUNTER_HG);
+	return comres;
+}
+
+/** configure low-g duration value
+\param dur low-g duration in miliseconds
+\see bma020_get_low_g_duration(), bma020_get_high_g_duration(),
+\bma020_set_high_g_duration()
+*/
+int bma020_set_low_g_duration(unsigned char dur)
+{
+	int comres = 0;
+	comres = i2c_bma020_write_buf(LG_DUR__REG, &dur, 1);
+	return comres;
+}
+
+int bma020_set_low_g_hyst(unsigned char hyst)
+{
+	int comres = 0;
+	unsigned char data;
+
+	comres = i2c_bma020_read_buf(LG_HYST__REG, &data, 1);
+	data = BMA020_SET_BITSLICE(data, LG_HYST , hyst);
+#ifdef DEBUG_INFO
+	printk(KERN_INFO"hyst=0x%x\n", data);
+#endif
+	comres |= i2c_bma020_write_buf(LG_HYST__REG, &data, 1);
+	return comres;
+}
+
+int bma020_set_high_g_hyst(unsigned char hyst)
+{
+	int comres = 0;
+	unsigned char data;
+
+	comres = i2c_bma020_read_buf(HG_HYST__REG, &data, 1);
+	data = BMA020_SET_BITSLICE(data, HG_HYST , hyst);
+#ifdef DEBUG_INFO
+	printk(KERN_INFO"hyst=0x%x\n", data);
+#endif
+	comres |= i2c_bma020_write_buf(HG_HYST__REG, &data, 1);
+	return comres;
+}
+
+/** read out low-g duration value from sensor image
+\param dur low-g duration in miliseconds
+\see bma020_set_low_g_duration(), bma020_get_high_g_duration(),
+\bma020_set_high_g_duration()
+*/
+int bma020_get_low_g_duration(unsigned char *dur)
+{
+	int comres = 0;
+	comres = i2c_bma020_read_buf(LG_DUR__REG, dur, 1);
+	return comres;
+}
+
+/** set low-g interrupt threshold
+\param th set the threshold
+\note the threshold depends on configured range. A macro
+\ref BMA020_HG_THRES_IN_G() for range to
+\register value conversion is available.
+\see BMA020_HG_THRES_IN_G()
+\see bma020_get_high_g_threshold()
+*/
+int bma020_set_high_g_threshold(unsigned char th)
+{
+	int comres = 0;
+	comres = i2c_bma020_write_buf(HG_THRES__REG, &th, 1);
+	return comres;
+}
+
+/** get high-g interrupt threshold
+\param *th get the threshold  value from sensor image
+\see bma020_set_high_g_threshold()
+*/
+int bma020_get_high_g_threshold(unsigned char *th)
+{
+	int comres = 0;
+	comres = i2c_bma020_read_buf(HG_THRES__REG, th, 1);
+	return comres;
+}
+
+/** configure high-g duration value
+\param dur high-g duration in miliseconds
+\see  bma020_get_high_g_duration(), bma020_set_low_g_duration(),
+\bma020_get_low_g_duration()
+*/
+int bma020_set_high_g_duration(unsigned char dur)
+{
+	int comres = 0;
+	comres = i2c_bma020_write_buf(HG_DUR__REG, &dur, 1);
+	return comres;
+}
+
+/** read out high-g duration value from sensor image
+\param dur high-g duration in miliseconds
+\see  bma020_set_high_g_duration(), bma020_get_low_g_duration(), bma020_set_low_g_duration(),
+*/
+int bma020_get_high_g_duration(unsigned char *dur)
+{
+	int comres = 0;
+	comres = i2c_bma020_read_buf(HG_DUR__REG, dur, 1);
+	return comres;
+}
+
+/**  set threshold value for any_motion feature
+\param th set the threshold a macro \ref BMA020_ANY_MOTION_THRES_IN_G()  is available for that
+\see BMA020_ANY_MOTION_THRES_IN_G()
+*/
+int bma020_set_any_motion_threshold(unsigned char th)
+{
+	int comres = 0;
+	comres = i2c_bma020_write_buf(ANY_MOTION_THRES__REG, &th, 1);
+	return comres;
+}
+
+/**  get threshold value for any_motion feature
+\param *th read back any_motion threshold from image register
+\see BMA020_ANY_MOTION_THRES_IN_G()
+*/
+int bma020_get_any_motion_threshold(unsigned char *th)
+{
+	int comres = 0;
+	comres = i2c_bma020_read_buf(ANY_MOTION_THRES__REG, th, 1);
+	return comres;
+}
+
+/**  set counter value for any_motion feature
+\param amc set the counter value, constants are available for that
+\see BMA020_ANY_MOTION_DUR_1, BMA020_ANY_MOTION_DUR_3, BMA020_ANY_MOTION_DUR_5,
+\BMA020_ANY_MOTION_DUR_7
+*/
+int bma020_set_any_motion_count(unsigned char amc)
+{
+	int comres = 0;
+	unsigned char data;
+	comres = i2c_bma020_read_buf(ANY_MOTION_DUR__REG, &data, 1);
+	data = BMA020_SET_BITSLICE(data, ANY_MOTION_DUR, amc);
+	comres = i2c_bma020_write_buf(ANY_MOTION_DUR__REG, &data, 1);
+	return comres;
+}
+
+/**  get counter value for any_motion feature from image register
+\param *amc readback pointer for counter value
+\see BMA020_ANY_MOTION_DUR_1, BMA020_ANY_MOTION_DUR_3, BMA020_ANY_MOTION_DUR_5,
+\BMA020_ANY_MOTION_DUR_7
+*/
+int bma020_get_any_motion_count(unsigned char *amc)
+{
+	int comres = 0;
+	unsigned char data;
+	comres = i2c_bma020_read_buf(ANY_MOTION_DUR__REG, &data,  1);
+	*amc = BMA020_GET_BITSLICE(data, ANY_MOTION_DUR);
+	return comres;
+}
+
+/** set the interrupt mask for BMA020's interrupt features in one mask
+\param mask input for interrupt mask
+\see BMA020_INT_ALERT, BMA020_INT_ANY_MOTION, BMA020_INT_EN_ADV_INT, BMA020_INT_NEW_DATA,
+\BMA020_INT_LATCH, BMA020_INT_HG, BMA020_INT_LG
+*/
+int bma020_set_interrupt_mask(unsigned char mask)
+{
+	int comres = 0;
+	unsigned char data[4];
+	data[0] = mask & BMA020_CONF1_INT_MSK;
+	data[2] = ((mask<<1) & BMA020_CONF2_INT_MSK);
+	comres = i2c_bma020_read_buf(BMA020_CONF1_REG, &data[1], 1);
+	comres |= i2c_bma020_read_buf(BMA020_CONF2_REG, &data[3], 1);
+	data[1] &= (~BMA020_CONF1_INT_MSK);
+	data[1] |= data[0];
+	data[3] &= (~(BMA020_CONF2_INT_MSK));
+	data[3] |= data[2];
+	comres |= i2c_bma020_write_buf(BMA020_CONF1_REG, &data[1], 1);
+	comres |= i2c_bma020_write_buf(BMA020_CONF2_REG, &data[3], 1);
+	return comres;
+}
+
+/** set the shadow_dis for BMA020's shadow_dis bit
+\param ssd input for on/off control
+\see BMA020_SHADOW_DIS_OFF, BMA020_SHADOW_DIS_ON
+*/
+int bma020_set_shadow_dis(unsigned char ssd)
+{
+	int comres = 0;
+	unsigned char data;
+	if ((ssd == 1) || (ssd == 0)) {
+		comres = i2c_bma020_read_buf(BMA020_CONF2_REG, &data, 1);
+		data = BMA020_SET_BITSLICE(data, SHADOW_DIS, ssd);
+		comres |= i2c_bma020_write_buf(BMA020_CONF2_REG, &data, 1);
+	}
+	return comres;
+}
+
+/** get the current interrupt mask settings from BMA020 image registers
+\param *mask return variable pointer for interrupt mask
+\see BMA020_INT_ALERT, BMA020_INT_ANY_MOTION, BMA020_INT_EN_ADV_INT, BMA020_INT_NEW_DATA,
+\BMA020_INT_LATCH, BMA020_INT_HG, BMA020_INT_LG
+*/
+int bma020_get_interrupt_mask(unsigned char *mask)
+{
+	int comres = 0;
+	unsigned char data;
+	comres = i2c_bma020_read_buf(BMA020_CONF1_REG, &data, 1);
+	*mask = data & BMA020_CONF1_INT_MSK;
+	comres |= i2c_bma020_read_buf(BMA020_CONF2_REG, &data, 1);
+	*mask = *mask | ((data & BMA020_CONF2_INT_MSK)>>1);
+	return comres;
+}
+
+/** resets the BMA020 interrupt status
+\note this feature can be used to reset a latched interrupt
+*/
+int bma020_reset_interrupt(void)
+{
+#ifdef DEBUG_INFO
+	printk(KERN_INFO"file=%s, func=%s\n", __FILE__, __FUNCTION__);
+#endif
+	int comres = 0;
+	unsigned char data = (1 << RESET_INT__POS);
+	comres = i2c_bma020_write_buf(RESET_INT__REG, &data, 1);
+	return comres;
+}
+
+/* Data Readout */
+/** X-axis acceleration data readout
+\param *a_x pointer for 16 bit 2's complement data output (LSB aligned)
+*/
+int bma020_read_accel_x(short *a_x)
+{
+	int comres;
+	unsigned char data[2];
+	comres = i2c_bma020_read_buf(ACC_X_LSB__REG, data, 2);
+	if (comres)
+		return -EIO;
+	*a_x = BMA020_GET_BITSLICE(data[0], ACC_X_LSB) |
+		BMA020_GET_BITSLICE(data[1], ACC_X_MSB) << ACC_X_LSB__LEN;
+	*a_x = *a_x << (sizeof(short)*8 - (ACC_X_LSB__LEN + ACC_X_MSB__LEN));
+	*a_x = *a_x >> (sizeof(short)*8 - (ACC_X_LSB__LEN + ACC_X_MSB__LEN));
+	return comres;
+}
+
+/** Y-axis acceleration data readout
+\param *a_y pointer for 16 bit 2's complement data output (LSB aligned)
+*/
+int bma020_read_accel_y(short *a_y)
+{
+	int comres;
+	unsigned char data[2];
+
+	comres = i2c_bma020_read_buf(ACC_Y_LSB__REG, data, 2);
+	if (comres)
+		return -EIO;
+	*a_y = BMA020_GET_BITSLICE(data[0], ACC_Y_LSB) |
+		BMA020_GET_BITSLICE(data[1], ACC_Y_MSB) << ACC_Y_LSB__LEN;
+	*a_y = *a_y << (sizeof(short)*8 - (ACC_Y_LSB__LEN + ACC_Y_MSB__LEN));
+	*a_y = *a_y >> (sizeof(short)*8 - (ACC_Y_LSB__LEN + ACC_Y_MSB__LEN));
+	return comres;
+}
+
+/** Z-axis acceleration data readout
+\param *a_z pointer for 16 bit 2's complement data output (LSB aligned)
+*/
+int bma020_read_accel_z(short *a_z)
+{
+	int comres;
+	unsigned char data[2];
+
+	comres = i2c_bma020_read_buf(ACC_Z_LSB__REG, data, 2);
+	if (comres)
+		return -EIO;
+	*a_z = BMA020_GET_BITSLICE(data[0], ACC_Z_LSB) |
+		BMA020_GET_BITSLICE(data[1], ACC_Z_MSB) << ACC_Z_LSB__LEN;
+	*a_z = *a_z << (sizeof(short)*8 - (ACC_Z_LSB__LEN + ACC_Z_MSB__LEN));
+	*a_z = *a_z >> (sizeof(short)*8 - (ACC_Z_LSB__LEN + ACC_Z_MSB__LEN));
+	return comres;
+}
+
+/** X,Y and Z-axis acceleration data readout
+\param *acc pointer to \ref bma020acc_t structure for x,y,z data readout
+\note data will be read by multi-byte protocol into a 6 byte structure
+*/
+int bma020_read_accel_xyz(bma020acc_t *acc)
+{
+	int comres;
+	unsigned char data[6];
+	comres = i2c_bma020_read_buf(ACC_X_LSB__REG, &data[0], 6);
+	if (comres)
+		return -EIO;
+	acc->x = BMA020_GET_BITSLICE(data[0], ACC_X_LSB) |
+		(BMA020_GET_BITSLICE(data[1], ACC_X_MSB) << ACC_X_LSB__LEN);
+	acc->x = acc->x << (sizeof(short)*8 - (ACC_X_LSB__LEN + ACC_X_MSB__LEN));
+	acc->x = acc->x >> (sizeof(short)*8 - (ACC_X_LSB__LEN + ACC_X_MSB__LEN));
+	acc->y = BMA020_GET_BITSLICE(data[2], ACC_Y_LSB) |
+		(BMA020_GET_BITSLICE(data[3], ACC_Y_MSB) << ACC_Y_LSB__LEN);
+	acc->y = acc->y << (sizeof(short)*8 - (ACC_Y_LSB__LEN + ACC_Y_MSB__LEN));
+	acc->y = acc->y >> (sizeof(short)*8 - (ACC_Y_LSB__LEN + ACC_Y_MSB__LEN));
+	acc->z = BMA020_GET_BITSLICE(data[4], ACC_Z_LSB) |
+		(BMA020_GET_BITSLICE(data[5], ACC_Z_MSB) << ACC_Z_LSB__LEN);
+	acc->z = acc->z << (sizeof(short)*8 - (ACC_Z_LSB__LEN + ACC_Z_MSB__LEN));
+	acc->z = acc->z >> (sizeof(short)*8 - (ACC_Z_LSB__LEN + ACC_Z_MSB__LEN));
+	return comres;
+}
+
+/** check current interrupt status from interrupt status register in BMA020 image register
+\param *ist pointer to interrupt status byte
+\see BMA020_INT_STATUS_HG, BMA020_INT_STATUS_LG, BMA020_INT_STATUS_HG_LATCHED,
+\BMA020_INT_STATUS_LG_LATCHED, BMA020_INT_STATUS_ALERT, BMA020_INT_STATUS_ST_RESULT
+*/
+int bma020_get_interrupt_status(unsigned char *ist)
+{
+	int comres = 0;
+	comres = i2c_bma020_read_buf(BMA020_STATUS_REG, ist, 1);
+	return comres;
+}
+
+/** enable/ disable low-g interrupt feature
+\param onoff enable=1, disable=0
+*/
+int bma020_set_low_g_int(unsigned char onoff)
+{
+	int comres;
+	unsigned char data;
+
+	comres = i2c_bma020_read_buf(ENABLE_LG__REG, &data, 1);
+	data = BMA020_SET_BITSLICE(data, ENABLE_LG, onoff);
+	comres |= i2c_bma020_write_buf(ENABLE_LG__REG, &data, 1);
+	return comres;
+}
+
+/** enable/ disable high-g interrupt feature
+\param onoff enable=1, disable=0
+*/
+int bma020_set_high_g_int(unsigned char onoff)
+{
+	int comres;
+	unsigned char data;
+
+	comres = i2c_bma020_read_buf(ENABLE_HG__REG, &data, 1);
+	data = BMA020_SET_BITSLICE(data, ENABLE_HG, onoff);
+	comres |= i2c_bma020_write_buf(ENABLE_HG__REG, &data, 1);
+	return comres;
+}
+
+/** enable/ disable any_motion interrupt feature
+\param onoff enable=1, disable=0
+\note for any_motion interrupt feature usage see also \ref bma020_set_advanced_int()
+*/
+int bma020_set_any_motion_int(unsigned char onoff)
+{
+	int comres;
+	unsigned char data;
+	comres = i2c_bma020_read_buf(EN_ANY_MOTION__REG, &data, 1);
+	data = BMA020_SET_BITSLICE(data, EN_ANY_MOTION, onoff);
+	comres |= i2c_bma020_write_buf(EN_ANY_MOTION__REG, &data, 1);
+	return comres;
+}
+
+/** enable/ disable alert-int interrupt feature
+\param onoff enable=1, disable=0
+\note for any_motion interrupt feature usage see also \ref bma020_set_advanced_int()
+*/
+int bma020_set_alert_int(unsigned char onoff)
+{
+	int comres;
+	unsigned char data;
+
+	comres = i2c_bma020_read_buf(ALERT__REG, &data, 1);
+	data = BMA020_SET_BITSLICE(data, ALERT, onoff);
+	comres |= i2c_bma020_write_buf(ALERT__REG, &data, 1);
+	return comres;
+}
+
+/** enable/ disable advanced interrupt feature
+\param onoff enable=1, disable=0
+\see bma020_set_any_motion_int()
+\see bma020_set_alert_int()
+*/
+int bma020_set_advanced_int(unsigned char onoff)
+{
+	int comres;
+	unsigned char data;
+	comres = i2c_bma020_read_buf(ENABLE_ADV_INT__REG, &data, 1);
+	data = BMA020_SET_BITSLICE(data, EN_ANY_MOTION, onoff);
+	comres |= i2c_bma020_write_buf(ENABLE_ADV_INT__REG, &data, 1);
+	return comres;
+}
+
+/** enable/disable latched interrupt for all interrupt feature (global option)
+\param latched (=1 for latched interrupts), (=0 for unlatched interrupts)
+*/
+
+int bma020_latch_int(unsigned char latched)
+{
+	int comres;
+	unsigned char data;
+	comres = i2c_bma020_read_buf(LATCH_INT__REG, &data, 1);
+
+#ifdef DEBUG_INFO
+	printk("read1=0x%x\n", data);
+#endif
+	data = BMA020_SET_BITSLICE(data, LATCH_INT, latched);
+#ifdef DEBUG_INFO
+	printk("read2=0x%x\n", data);
+#endif
+	comres |= i2c_bma020_write_buf(LATCH_INT__REG, &data, 1);
+	return comres;
+}
+
+int bma020_set_new_data_int(unsigned char onoff)
+{
+	/* printk("bma020_set_new_data_int onoff:%d \n", onoff); */
+	int comres;
+	unsigned char data;
+	comres = i2c_bma020_read_buf(NEW_DATA_INT__REG, &data, 1);
+	data = BMA020_SET_BITSLICE(data, NEW_DATA_INT, onoff);
+	comres |= i2c_bma020_write_buf(NEW_DATA_INT__REG, &data, 1);
+	return comres;
+}
+
+/** read function for raw register access
+\param addr register address
+\param *data pointer to data array for register read back
+\param len number of bytes to be read starting from addr
+*/
+int bma020_read_reg(unsigned char addr, unsigned char *data, unsigned char len)
+{
+	int comres;
+
+	comres = i2c_bma020_read_buf(addr, data, len);
+	return comres;
+}
+
+/** write function for raw register access
+\param addr register address
+\param *data pointer to data array for register write
+\param len number of bytes to be written starting from addr
+*/
+int bma020_write_reg(unsigned char addr, unsigned char *data, unsigned char len)
+{
+	int comres;
+	comres = i2c_bma020_write_buf(addr, data, len);
+	return comres;
+}
+
+/* Maximum value our axis may get for the input device (signed 10 bits) */
+#define ACC_MAX_VAL 512
+
+static int bma020_remove_fs(void);
+static int bma020_add_fs(struct device *device);
+
+/**
+* bma020_get_axis - For the given axis, give the value converted
+* @axis:      1,2,3 - can also be negative
+* @hw_values: raw values returned by the hardware
+*
+* Returns the converted value.
+*/
+static inline int bma020_get_axis(s8 axis, int hw_values[3])
+{
+	if (axis > 0)
+		return hw_values[axis - 1];
+	else
+		return -hw_values[-axis - 1];
+}
+
+#ifdef DEBUG_INFO
+void bma020_driver_test(void)
+
+{
+	bma020acc_t data;
+	int tmp;
+	char s;
+	int i = 20;
+	bma020_soft_reset();
+	tmp = bma020_selftest(0);
+	printk("bustest num=%d\n", tmp);
+	bma020_set_range(BMA020_RANGE_2G);
+	/* bma020_set_range(BMA020_RANGE_8G); */
+	bma020_set_mode(0);
+	bma020_set_bandwidth(BMA020_BW_25HZ);
+
+	while (i-- > 0) {
+		bma020_get_range(&s);
+		printk("range:%d\n", s);
+		bma020_read_accel_xyz(&data);
+		printk("x=%d:  ", data.x);
+		printk("y=%d:  ", data.y);
+		printk("z=%d:  ", data.z);
+		printk("\n");
+		msleep(1000);
+	}
+}
+#endif
+
+/**
+* bma020_get_xyz_axis_adjusted - Get X, Y and Z axis values from the accelerometer
+* @handle: the handle to the device
+* @x:      where to store the X axis value
+* @y:      where to store the Y axis value
+* @z:      where to store the Z axis value
+*
+* Note that 40Hz input device can eat up about 10% CPU at 800MHZ
+*/
+static int bma020_get_xyz_axis_adjusted(int *x, int *y, int *z)
+{
+	int position[3];
+	int ret;
+
+	bma020acc_t acc;
+	ret = bma020_read_accel_xyz(&acc);
+	if (ret)
+		return -EIO;
+	position[0] = acc.x;
+	position[1] = acc.y;
+	position[2] = acc.z;
+
+	*x = bma020_get_axis(bma_dev.ac.x, position);
+	*y = bma020_get_axis(bma_dev.ac.y, position);
+	*z = bma020_get_axis(bma_dev.ac.z, position);
+	return 0;
+}
+
+static int bma020_poweroff(void)
+{
+	//printk(KERN_INFO"bma020 poweroff.\n");
+	bma020_set_mode(BMA020_MODE_SLEEP);/* set to sleep mode instead of power off */
+	return 0;
+}
+
+static int bma020_poweron(void)
+{
+	unsigned char data1, data2;
+	int ret = 0;
+	//printk(KERN_INFO"bma020 poweron.\n");
+
+	ret |= bma020_set_mode(BMA020_MODE_NORMAL);	/* set to normal mode */
+	msleep(2);		/* delay for 1ms */
+	ret |= bma020_soft_reset();
+	msleep(5);		/* delay for >=1.3ms; */
+	ret |= bma020_set_range(bma_dev.range);
+	ret |= bma020_set_bandwidth(bma_dev.bandwidth);
+	/* bma020_set_shadow_dis(BMA020_SHADOW_DIS_ON);	//free read sequence */
+
+	/* bma020_selftest(0); */
+	/* test customer reserved reg at addr CUSTOMER1_REG, CUSTOMER2_REG */
+	data1 = 0x55;
+	data2 = 0xAA;
+	ret |= i2c_bma020_write_buf(CUSTOMER_RESERVED1__REG, &data1, 1);
+	ret |= i2c_bma020_write_buf(CUSTOMER_RESERVED2__REG, &data2, 1);
+	ret |= i2c_bma020_read_buf(CUSTOMER_RESERVED1__REG, &data1, 1);
+	ret |= i2c_bma020_read_buf(CUSTOMER_RESERVED2__REG, &data2, 1);
+	if (ret)
+		return ret;
+
+	if ((0x55 != data1) || (0xAA != data2)) {
+		//printk(KERN_ERR"bma020 poweron err.\n");
+		bma020_set_mode(BMA020_MODE_SLEEP);	/* set to normal mode */
+		return -1;
+	}
+
+	ret |= bma020_set_mode(BMA020_MODE_NORMAL);	/* set to normal mode */
+	msleep(1);		/* delay for 1ms */
+	return ret;
+	/* bma020_soft_reset(); */
+	/* msleep(5);		//delay for >=1.3ms; */
+}
+
+
+static int bma020_kthread(void *data)
+{
+	int x, y, z;
+	int ret;
+	static int x_last = 0, y_last = 0, z_last = 0;
+	
+	while (!kthread_should_stop()) {
+		ret = bma020_get_xyz_axis_adjusted(&x, &y, &z);
+		if (ret) {/* retry if this time failed */
+			try_to_freeze();
+			msleep_interruptible(bma_dev.sample_interval);
+			return;
+		}
+
+		x = (x * 1 + x_last * 3) / 4;
+		y = (y * 1 + y_last * 3) / 4;
+		z = (z * 1 + z_last * 3) / 4;
+		x_last = x;
+		y_last = y;
+		z_last = z;
+
+#ifdef DEBUG_INFO
+		//printk("x=%d, y=%d, z=%d \n", x, y, z);
+#endif
+#if 1
+		input_report_abs(bma_dev.idev, ABS_X, y - bma_dev.xcalib);
+		input_report_abs(bma_dev.idev, ABS_Y, x - bma_dev.ycalib);
+		input_report_abs(bma_dev.idev, ABS_Z, -z - bma_dev.zcalib);
+#else
+		input_report_abs(bma_dev.idev, ABS_X, x);
+		input_report_abs(bma_dev.idev, ABS_Y, y);
+		input_report_abs(bma_dev.idev, ABS_Z, z);
+#endif
+		input_sync(bma_dev.idev);
+
+		//try_to_freeze();  //masked by JP
+		msleep_interruptible(bma_dev.sample_interval);
+	}
+
+}
+
+
+/*
+* To be called before starting to use the device. It makes sure that the
+* device will always be on until a call to bma020_decrease_use(). Not to be
+* used from interrupt context.
+*/
+static void bma020_increase_use(void)
+{
+	printk(KERN_INFO"%s\n", __FUNCTION__);
+	mutex_lock(&bma_dev.lock);
+	bma_dev.usage++;
+	if (bma_dev.usage == 1) {
+		if (!bma_dev.is_on) {
+			if (!bma020_poweron()) {
+				/* 0 for success power on */
+				bma_dev.is_on = 1;
+				bma_dev.kthread = kthread_run(bma020_kthread, NULL, "bma020");
+			} else {
+				bma_dev.is_on = 0;
+				bma_dev.usage = 0;
+			}
+		}
+	}
+	mutex_unlock(&bma_dev.lock);
+}
+
+/*
+* To be called whenever a usage of the device is stopped.
+* It will make sure to turn off the device when there is not usage.
+*/
+static void bma020_decrease_use(void)
+{
+	printk(KERN_INFO"%s\n", __FUNCTION__);
+	mutex_lock(&bma_dev.lock);
+	if (bma_dev.usage == 0) {
+		mutex_unlock(&bma_dev.lock);
+		return;
+	}
+	bma_dev.usage--;
+	if (bma_dev.usage == 0) {
+		bma020_poweroff();
+		bma_dev.is_on = 0;
+		kthread_stop(bma_dev.kthread);
+	}
+	mutex_unlock(&bma_dev.lock);
+}
+
+static inline void bma020_calibrate_joystick(void)
+{
+	bma020_get_xyz_axis_adjusted(&bma_dev.xcalib, &bma_dev.ycalib, &bma_dev.zcalib);
+}
+
+static int bma020_joystick_enable(void)
+{
+	int err;
+
+	if (bma_dev.idev)
+		return -EINVAL;
+
+	bma_dev.idev = input_allocate_device();
+	if (!bma_dev.idev)
+		return -ENOMEM;
+
+	bma_dev.idev->name       = "BOSCH BMA020 Accelerometer";
+	bma_dev.idev->name       = "bma020_input";
+	bma_dev.idev->phys       = "bma020/input0";
+	bma_dev.idev->id.bustype = BUS_I2C;
+	bma_dev.idev->id.vendor  = 0;
+	bma_dev.idev->dev.parent = bma_dev.device;
+	/*
+	   bma_dev.idev->open       = bma020_joystick_open;
+	   bma_dev.idev->close      = bma020_joystick_close;
+	   */
+	__set_bit(EV_ABS, bma_dev.idev->evbit);
+	__set_bit(ABS_X, bma_dev.idev->absbit);
+	__set_bit(ABS_Y, bma_dev.idev->absbit);
+	__set_bit(ABS_Z, bma_dev.idev->absbit);
+
+	__set_bit(EV_SYN, bma_dev.idev->evbit);
+	__set_bit(EV_KEY, bma_dev.idev->evbit);
+
+	input_set_abs_params(bma_dev.idev, ABS_X,
+			-ACC_MAX_VAL, ACC_MAX_VAL, 0, 0);
+	input_set_abs_params(bma_dev.idev, ABS_Y,
+			-ACC_MAX_VAL, ACC_MAX_VAL, 0, 0);
+	input_set_abs_params(bma_dev.idev, ABS_Z,
+			-ACC_MAX_VAL, ACC_MAX_VAL, 0, 0);
+
+	err = input_register_device(bma_dev.idev);
+	if (err) {
+		printk(KERN_ERR "regist input driver error\n");
+		input_free_device(bma_dev.idev);
+		bma_dev.idev = NULL;
+	}
+
+	return err;
+}
+
+static void bma020_joystick_disable(void)
+{
+	if (!bma_dev.idev)
+		return;
+
+	input_unregister_device(bma_dev.idev);
+	bma_dev.idev = NULL;
+}
+
+
+/*
+* Initialise the accelerometer and the various subsystems.
+* Should be rather independant of the bus system.
+*/
+static int bma020_init_device(struct i2c_bma020 *dev)
+{
+	bma020_add_fs(dev->device);
+
+	if (bma020_joystick_enable())
+		printk(KERN_ERR "bma020: joystick initialization failed\n");
+
+	return 0;
+}
+
+static int bma020_dmi_matched(const struct dmi_system_id *dmi)
+{
+	bma_dev.ac = *((struct axis_conversion *)dmi->driver_data);
+	printk(KERN_INFO "bma020: hardware type %s found.\n", dmi->ident);
+
+	return 1;
+}
+
+/* Represents, for each axis seen by userspace, the corresponding hw axis (+1).
+* If the value is negative, the opposite of the hw value is used. */
+static struct axis_conversion bma020_axis_normal = {1, 2, 3};
+static struct axis_conversion bma020_axis_y_inverted = {1, -2, 3};
+static struct axis_conversion bma020_axis_x_inverted = {-1, 2, 3};
+static struct axis_conversion bma020_axis_z_inverted = {1, 2, -3};
+static struct axis_conversion bma020_axis_xy_rotated_left = {-2, 1, 3};
+static struct axis_conversion bma020_axis_xy_swap_inverted = {-2, -1, 3};
+
+#define AXIS_DMI_MATCH(_ident, _name, _axis) {		\
+	.ident = _ident,				\
+	.callback = bma020_dmi_matched,		\
+	.matches = {					\
+		DMI_MATCH(DMI_PRODUCT_NAME, _name)	\
+	},						\
+	.driver_data = &bma020_axis_##_axis		\
+}
+static struct dmi_system_id bma020_dmi_ids[] = {
+	/* product names are truncated to match all kinds of a same model */
+	AXIS_DMI_MATCH("NC64x0", "HP Compaq nc64", x_inverted),
+	AXIS_DMI_MATCH("NC84x0", "HP Compaq nc84", z_inverted),
+	AXIS_DMI_MATCH("NX9420", "HP Compaq nx9420", x_inverted),
+	AXIS_DMI_MATCH("NW9440", "HP Compaq nw9440", x_inverted),
+	AXIS_DMI_MATCH("NC2510", "HP Compaq 2510", y_inverted),
+	AXIS_DMI_MATCH("NC8510", "HP Compaq 8510", xy_swap_inverted),
+	AXIS_DMI_MATCH("HP2133", "HP 2133", xy_rotated_left),
+	{ NULL, }
+	/* Laptop models without axis info (yet):
+	 * "NC651xx" "HP Compaq 651"
+	 * "NC671xx" "HP Compaq 671"
+	 * "NC6910" "HP Compaq 6910"
+	 * HP Compaq 8710x Notebook PC / Mobile Workstation
+	 * "NC2400" "HP Compaq nc2400"
+	 * "NX74x0" "HP Compaq nx74"
+	 * "NX6325" "HP Compaq nx6325"
+	 * "NC4400" "HP Compaq nc4400"
+	 */
+};
+
+static int bma020_add(struct device *device)
+{
+	if (!device)
+		return -EINVAL;
+	bma_dev.device = device;
+
+	/* ##!!## axis direction should be checked */
+	/* If possible use a "standard" axes order */
+	if (dmi_check_system(bma020_dmi_ids) == 0) {
+		printk(KERN_INFO "bma020" ": laptop model unknown, "
+				"using default axes configuration\n");
+		bma_dev.ac = bma020_axis_normal;
+	}
+	return bma020_init_device(&bma_dev);
+}
+
+
+/*********************** Sysfs stuff ***********************/
+static ssize_t bma020_acceleration_show(struct device *dev,
+		struct device_attribute *attr, char *buf)
+{
+	int x, y, z;
+	if (bma_dev.is_on != 0) {
+		bma020_get_xyz_axis_adjusted(&x, &y, &z);
+	} else {
+		x = 0; y = 0; z = 0;
+	}
+
+	if (x < ACC_MAX_VAL && x > -ACC_MAX_VAL &&
+		y < ACC_MAX_VAL && y > -ACC_MAX_VAL &&
+		z < ACC_MAX_VAL && z > -ACC_MAX_VAL) {
+		return sprintf(buf, "(%d,%d,%d)\n", x, y, z);
+	} else
+		return 0;
+}
+
+static ssize_t bma020_calibrate_show(struct device *dev,
+		struct device_attribute *attr, char *buf)
+{
+	return sprintf(buf, "(%d,%d,%d)\n", bma_dev.xcalib, bma_dev.ycalib, bma_dev.zcalib);
+}
+
+static ssize_t bma020_calibrate_store(struct device *dev,
+		struct device_attribute *attr,
+		const char *buf, size_t count)
+{
+#ifdef DEBUG_INFO
+	printk(KERN_INFO"func=%s\n", __FUNCTION__);
+	printk(KERN_INFO"msg=%s\n", buf);
+#endif
+	if (bma_dev.is_on != 0)
+		bma020_calibrate_joystick();
+
+	return count;
+}
+
+static ssize_t bma020_status_show(struct device *dev,
+		struct device_attribute *attr, char *buf)
+{
+	if (bma_dev.is_on == 0)
+		return sprintf(buf, "off\n");
+	else
+		return sprintf(buf, "on,user %d\n", bma_dev.usage);
+}
+
+static ssize_t bma020_status_set(struct device *dev,
+		struct device_attribute *attr,
+		const char *buf, size_t count)
+{
+	if (strcmp(buf, "on\n") == 0)
+		bma020_increase_use();
+	else if (strcmp(buf, "off\n") == 0)
+		bma020_decrease_use();
+	else
+		printk(KERN_INFO"unrecognized, using on/off\n");
+	return count;
+}
+
+
+static ssize_t bma020_interval_set(struct device *dev,
+		struct device_attribute *attr,
+		const char *buf, size_t count)
+{
+	unsigned int val = 0;
+	char msg[256] = "\0";
+	if (count > 256)
+		count = 256;
+	memcpy(msg, buf, count-1);/* skip last "\n"  */
+	msg[count-1] = '\0';
+	val = (unsigned int) simple_strtoul(msg, NULL, 10);
+	if (val < 5)	/* TODO:avoid i2c too busy */
+		val = 5;
+	bma_dev.sample_interval = val;/* double increase sample rate */
+	printk(KERN_INFO "bma020 sample interval %d ms\n", bma_dev.sample_interval);
+	return count;
+}
+
+static ssize_t bma020_interval_show(struct device *dev,
+		struct device_attribute *attr, char *buf)
+{
+	return sprintf(buf, "%d\n", bma_dev.sample_interval);
+}
+
+static ssize_t bma020_range_set(struct device *dev,
+		struct device_attribute *attr,
+		const char *buf, size_t count)
+{
+	unsigned int val = 0;
+	char msg[10] = "\0";
+	if (count > 10)
+		count = 10;
+	memcpy(msg, buf, count-1);/* skip last "\n" */
+	msg[count-1] = '\0';
+	val = (unsigned int) simple_strtoul(msg, NULL, 10);
+	if (val >= 2)
+		bma_dev.range = BMA020_RANGE_8G;
+	else
+		bma_dev.range = val;/* 0 for BMA020_RANGE_2G, 1 for BMA020_RANGE_4G */
+	if (bma_dev.is_on)/* activate immediately? */
+		bma020_set_range(bma_dev.range);
+
+	printk(KERN_INFO"bma020 range %d\n", bma_dev.range);
+	return count;
+}
+
+static ssize_t bma020_range_show(struct device *dev,
+		struct device_attribute *attr, char *buf)
+{
+	return sprintf(buf, "%d\n", bma_dev.range);
+}
+
+static ssize_t bma020_bandwidth_set(struct device *dev,
+		struct device_attribute *attr,
+		const char *buf, size_t count)
+{
+	unsigned int val = 0;
+	char msg[10] = "\0";
+	if (count > 10)
+		count = 10;
+	memcpy(msg, buf, count-1);/* skip last "\n" */
+	msg[count-1] = '\0';
+	val = (unsigned int) simple_strtoul(msg, NULL, 10);
+	printk("val=%d\n", val);
+	if (val >= 6)
+		bma_dev.bandwidth = BMA020_BW_1500HZ;
+	else
+		bma_dev.bandwidth = val;
+	if (bma_dev.is_on)/* activate immediately? */
+		bma020_set_bandwidth(bma_dev.bandwidth);
+
+	printk(KERN_INFO"bma020 bandwidth %d\n", bma_dev.bandwidth);
+	return count;
+}
+
+static ssize_t bma020_bandwidth_show(struct device *dev,
+		struct device_attribute *attr, char *buf)
+{
+	return sprintf(buf, "%d\n", bma_dev.bandwidth);
+}
+
+
+static DEVICE_ATTR(status, S_IRUGO|S_IWUGO, bma020_status_show, bma020_status_set);
+static DEVICE_ATTR(acceleration, S_IRUGO, bma020_acceleration_show, NULL);
+static DEVICE_ATTR(calibrate, S_IRUGO|S_IWUGO, bma020_calibrate_show,
+		bma020_calibrate_store);
+static DEVICE_ATTR(interval, S_IRUGO|S_IWUGO, bma020_interval_show,
+		bma020_interval_set);
+static DEVICE_ATTR(range, S_IRUGO|S_IWUGO, bma020_range_show,
+		bma020_range_set);
+static DEVICE_ATTR(bandwidth, S_IRUGO|S_IWUGO, bma020_bandwidth_show,
+		bma020_bandwidth_set);
+/* static DEVICE_ATTR(rate, S_IRUGO, bma020_rate_show, NULL); */
+
+static struct attribute *bma020_attributes[] = {
+	&dev_attr_status.attr,
+	&dev_attr_acceleration.attr,
+	&dev_attr_calibrate.attr,
+	&dev_attr_interval.attr,
+	&dev_attr_range.attr,
+	&dev_attr_bandwidth.attr,
+	NULL
+};
+
+static struct attribute_group bma020_attribute_group = {
+	.attrs = bma020_attributes
+};
+
+static int bma020_add_fs(struct device *device)
+{
+	return sysfs_create_group(&bma_dev.device->kobj, &bma020_attribute_group);
+}
+
+static int bma020_remove_fs(void)
+{
+	sysfs_remove_group(&bma_dev.device->kobj, &bma020_attribute_group);
+	return 0;
+}
+
+
+#ifdef	CONFIG_PM
+static int bma020_suspend(struct i2c_client *client, pm_message_t state)
+{
+	bma020_poweroff();
+	return 0;
+}
+
+static int bma020_resume(struct i2c_client *client)
+{
+	bma020_poweron();
+	return 0;
+}
+#else
+#define	bma020_suspend		NULL
+#define	bma020_resume		NULL
+#endif
+
+static int __devinit bma020_probe(struct i2c_client *client,
+		const struct i2c_device_id *id)
+{
+#ifdef DEBUG_INFO
+	printk(KERN_INFO"bma020_i2c_probe \n");
+#endif
+	int retry;
+
+	/* initialize global ptr */
+	g_client = client;
+
+	bma_dev.usage = 0;
+	bma_dev.is_on = 0;
+	bma_dev.range = BMA020_RANGE_2G;
+	bma_dev.bandwidth = BMA020_BW_25HZ;
+	bma_dev.sample_interval = 1000;/* ms */
+	mutex_init(&bma_dev.lock);/* be called before bma020_increase_use() */
+
+	/* make sure it's a bma020 sensor */
+	for (retry = 0; retry < 30; retry++) {
+		bma020_poweron();
+		bma020_detect();
+		bma020_poweroff();
+		if (bma_dev.chip_id == 0x02)
+			break;
+	}
+	if (bma_dev.chip_id != 0x02) {
+		printk(KERN_ERR "bma020 chip id error\n");
+		return -1;
+	}
+
+	printk(KERN_INFO "bma020:attatch to i2c bus, addr=0x%x, chip id=0x%x \n",
+			bma_dev.dev_addr, bma_dev.chip_id);
+
+#ifdef DEBUG_INFO
+	printk(KERN_INFO "chip id: 0x%x\n", bma_dev.chip_id);
+	printk(KERN_INFO "ml version: 0x%x\n", bma_dev.ml_version);
+	printk(KERN_INFO "al version: 0x%x\n", bma_dev.al_version);
+#endif
+
+	/* bma gpio interrupt initialization */
+	//bma_dev.gpio = mfp_to_gpio(MFP_PIN_GPIO111);
+	bma_dev.gpio = 0x17;
+	//g_client->irq = gpio_to_irq(bma_dev.gpio);
+
+	gpio_direction_input(bma_dev.gpio);	/* set gpio pin as input */
+
+#ifdef DEBUG_INFO
+	printk(KERN_INFO "irq=%d\n", g_client->irq);
+	printk(KERN_INFO "gpio=%d\n", bma_dev.gpio);
+#endif
+
+#ifdef DEBUG_INFO
+	bma020_poweron();
+	bma020_driver_test();/* show some measured data for simple test */
+	bma020_poweroff();
+#endif
+
+	bma020_add(&client->dev);
+	return 0;
+}
+
+static int bma020_remove(struct i2c_client *client)
+{
+	bma020_joystick_disable();
+	bma020_remove_fs();
+	bma020_poweroff();
+	bma_dev.usage = 0;
+	bma_dev.is_on = 0;
+
+	return 0;
+}
+
+static const struct i2c_device_id bma020_id[] = {
+	{ "bma020", 0 },
+	{ }
+};
+
+static struct i2c_driver bma020_driver = {
+	.driver = {
+		.name	= "bma020",
+	},
+	.id_table 	= bma020_id,
+	.probe		= bma020_probe,
+	.remove		= bma020_remove,
+	.suspend	= bma020_suspend,
+	.resume		= bma020_resume,
+};
+
+static int __init bma020_i2c_init(void)
+{
+#ifdef DEBUG_INFO
+	printk(KERN_INFO"func=%s \n", __FUNCTION__);
+#endif
+	return i2c_add_driver(&bma020_driver);
+}
+
+static void __exit bma020_i2c_exit(void)
+{
+	i2c_del_driver(&bma020_driver);
+}
+
+/*====================================================================*/
+
+MODULE_DESCRIPTION("BOSCH BMA020 three-axis digital accelerometer (I2C) driver");
+MODULE_LICENSE("GPL");
+
+module_init(bma020_i2c_init);
+module_exit(bma020_i2c_exit);
+
+/*====================================================================*/
--- linux-mvl-dove-2.6.32.orig/drivers/hwmon/bma020/bma020_fs.h
+++ linux-mvl-dove-2.6.32/drivers/hwmon/bma020/bma020_fs.h
@@ -0,0 +1,710 @@
+/*
+*  bma020.c - ST BMA020 accelerometer driver
+*
+*  Copyright (C) 2007-2008 Yan Burman
+*  Copyright (C) 2008 Eric Piel
+*
+*  This program is free software; you can redistribute it and/or modify
+*  it under the terms of the GNU General Public License as published by
+*  the Free Software Foundation; either version 2 of the License, or
+*  (at your option) any later version.
+*
+*  This program is distributed in the hope that it will be useful,
+*  but WITHOUT ANY WARRANTY; without even the implied warranty of
+*  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+*  GNU General Public License for more details.
+*
+*  You should have received a copy of the GNU General Public License
+*  along with this program; if not, write to the Free Software
+*  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+*/
+
+#ifndef __BMA020_H__
+#define __BMA020_H__
+
+/** BMA020 I2C Address*/
+#define BMA020_I2C_ADDR		0x38
+
+/** register definitions*/
+#define CHIP_ID_REG		0x00
+#define VERSION_REG		0x01
+#define X_AXIS_LSB_REG		0x02
+#define X_AXIS_MSB_REG		0x03
+#define Y_AXIS_LSB_REG		0x04
+#define Y_AXIS_MSB_REG		0x05
+#define Z_AXIS_LSB_REG		0x06
+#define Z_AXIS_MSB_REG		0x07
+#define TEMP_RD_REG		0x08
+#define BMA020_STATUS_REG	0x09
+#define BMA020_CTRL_REG		0x0a
+#define BMA020_CONF1_REG	0x0b
+#define LG_THRESHOLD_REG	0x0c
+#define LG_DURATION_REG		0x0d
+#define HG_THRESHOLD_REG	0x0e
+#define HG_DURATION_REG		0x0f
+#define MOTION_THRS_REG		0x10
+#define HYSTERESIS_REG		0x11
+#define CUSTOMER1_REG		0x12
+#define CUSTOMER2_REG		0x13
+#define RANGE_BWIDTH_REG	0x14
+#define BMA020_CONF2_REG	0x15
+
+#define OFFS_GAIN_X_REG		0x16
+#define OFFS_GAIN_Y_REG		0x17
+#define OFFS_GAIN_Z_REG		0x18
+#define OFFS_GAIN_T_REG		0x19
+#define OFFSET_X_REG		0x1a
+#define OFFSET_Y_REG		0x1b
+#define OFFSET_Z_REG		0x1c
+#define OFFSET_T_REG		0x1d
+
+/** bma020 typedef structure
+	\brief This structure holds all relevant information about BMA020 and links communication to the
+*/
+#define BUF_LEN		(20*1)
+
+typedef struct  {
+	short x, /**< holds x-axis acceleration data sign extended. Range -512 to 511. */
+	y, /**< holds y-axis acceleration data sign extended. Range -512 to 511. */
+	z; /**< holds z-axis acceleration data sign extended. Range -512 to 511. */
+} bma020acc_t;
+
+struct axis_conversion {
+	s8	x;
+	s8	y;
+	s8	z;
+};
+
+struct i2c_bma020 {
+	unsigned int		sample_interval;
+	int gpio;				/* gpio pin for g-sensor's interrupt wire */
+	/* bma020acc_t mem[BUF_LEN];		//data buffer  */
+	unsigned char mode;		/*< save current BMA020 operation mode */
+	unsigned char range;
+	unsigned char bandwidth;
+
+	unsigned char chip_id,	/*< save BMA020's chip id which has to be 0x02 after calling bma020_init() */
+				  ml_version, /*< holds the BMA020 ML_version number */
+				  al_version; /*< holds the BMA020 AL_version number */
+	unsigned char dev_addr;   /*< initializes BMA020's I2C device address 0x38 */
+	unsigned char int_mask;	  /*< stores the current BMA020 API generated interrupt mask */
+	/*-----*/
+	struct device		*device;   /* The device */
+	struct input_dev	*idev;     /* input device */
+	struct task_struct	*kthread;  /* kthread for input */
+	struct completion	thread_exit_complete;
+	int 			thread_exit;
+	struct mutex            lock;
+	atomic_t		count;     /* interrupt count after last read */
+	int			xcalib;    /* calibrated null value for x */
+	int			ycalib;    /* calibrated null value for y */
+	int			zcalib;    /* calibrated null value for z */
+	unsigned char		is_on;     /* whether the device is on or off */
+	unsigned char		usage;     /* usage counter */
+	struct axis_conversion	ac;        /* hw -> logical axis */
+	unsigned int		delay;
+	wait_queue_head_t	wait;
+};
+
+/*
+*	bit slice positions in registers
+*/
+
+/** \cond BITSLICE */
+
+#define CHIP_ID__POS		0
+#define CHIP_ID__MSK		0x07
+#define CHIP_ID__LEN		3
+#define CHIP_ID__REG		CHIP_ID_REG
+
+#define ML_VERSION__POS		0
+#define ML_VERSION__LEN		4
+#define ML_VERSION__MSK		0x0F
+#define ML_VERSION__REG		VERSION_REG
+
+#define AL_VERSION__POS  	4
+#define AL_VERSION__LEN  	4
+#define AL_VERSION__MSK		0xF0
+#define AL_VERSION__REG		VERSION_REG
+
+/* DATA REGISTERS */
+
+#define NEW_DATA_X__POS  	0
+#define NEW_DATA_X__LEN  	1
+#define NEW_DATA_X__MSK  	0x01
+#define NEW_DATA_X__REG		X_AXIS_LSB_REG
+
+#define ACC_X_LSB__POS   	6
+#define ACC_X_LSB__LEN   	2
+#define ACC_X_LSB__MSK		0xC0
+#define ACC_X_LSB__REG		X_AXIS_LSB_REG
+
+#define ACC_X_MSB__POS   	0
+#define ACC_X_MSB__LEN   	8
+#define ACC_X_MSB__MSK		0xFF
+#define ACC_X_MSB__REG		X_AXIS_MSB_REG
+
+#define NEW_DATA_Y__POS  	0
+#define NEW_DATA_Y__LEN  	1
+#define NEW_DATA_Y__MSK  	0x01
+#define NEW_DATA_Y__REG		Y_AXIS_LSB_REG
+
+#define ACC_Y_LSB__POS   	6
+#define ACC_Y_LSB__LEN   	2
+#define ACC_Y_LSB__MSK   	0xC0
+#define ACC_Y_LSB__REG		Y_AXIS_LSB_REG
+
+#define ACC_Y_MSB__POS   	0
+#define ACC_Y_MSB__LEN   	8
+#define ACC_Y_MSB__MSK   	0xFF
+#define ACC_Y_MSB__REG		Y_AXIS_MSB_REG
+
+#define NEW_DATA_Z__POS  	0
+#define NEW_DATA_Z__LEN  	1
+#define NEW_DATA_Z__MSK		0x01
+#define NEW_DATA_Z__REG		Z_AXIS_LSB_REG
+
+#define ACC_Z_LSB__POS   	6
+#define ACC_Z_LSB__LEN   	2
+#define ACC_Z_LSB__MSK		0xC0
+#define ACC_Z_LSB__REG		Z_AXIS_LSB_REG
+
+#define ACC_Z_MSB__POS   	0
+#define ACC_Z_MSB__LEN   	8
+#define ACC_Z_MSB__MSK		0xFF
+#define ACC_Z_MSB__REG		Z_AXIS_MSB_REG
+
+/* STATUS BITS */
+
+#define STATUS_HG__POS		0
+#define STATUS_HG__LEN		1
+#define STATUS_HG__MSK		0x01
+#define STATUS_HG__REG		BMA020_STATUS_REG
+
+#define STATUS_LG__POS		1
+#define STATUS_LG__LEN		1
+#define STATUS_LG__MSK		0x02
+#define STATUS_LG__REG		BMA020_STATUS_REG
+
+#define HG_LATCHED__POS  	2
+#define HG_LATCHED__LEN  	1
+#define HG_LATCHED__MSK		0x04
+#define HG_LATCHED__REG		BMA020_STATUS_REG
+
+#define LG_LATCHED__POS		3
+#define LG_LATCHED__LEN		1
+#define LG_LATCHED__MSK		8
+#define LG_LATCHED__REG		BMA020_STATUS_REG
+
+#define ALERT_PHASE__POS	4
+#define ALERT_PHASE__LEN	1
+#define ALERT_PHASE__MSK	0x10
+#define ALERT_PHASE__REG	BMA020_STATUS_REG
+
+#define ST_RESULT__POS		7
+#define ST_RESULT__LEN		1
+#define ST_RESULT__MSK		0x80
+#define ST_RESULT__REG		BMA020_STATUS_REG
+
+/* CONTROL BITS */
+
+#define SLEEP__POS			0
+#define SLEEP__LEN			1
+#define SLEEP__MSK			0x01
+#define SLEEP__REG			BMA020_CTRL_REG
+
+#define SOFT_RESET__POS		1
+#define SOFT_RESET__LEN		1
+#define SOFT_RESET__MSK		0x02
+#define SOFT_RESET__REG		BMA020_CTRL_REG
+
+#define SELF_TEST__POS		2
+#define SELF_TEST__LEN		2
+#define SELF_TEST__MSK		0x0C
+#define SELF_TEST__REG		BMA020_CTRL_REG
+
+#define SELF_TEST0__POS		2
+#define SELF_TEST0__LEN		1
+#define SELF_TEST0__MSK		0x04
+#define SELF_TEST0__REG		BMA020_CTRL_REG
+
+#define SELF_TEST1__POS		3
+#define SELF_TEST1__LEN		1
+#define SELF_TEST1__MSK		0x08
+#define SELF_TEST1__REG		BMA020_CTRL_REG
+
+#define RESET_INT__POS		6
+#define RESET_INT__LEN		1
+#define RESET_INT__MSK		0x40
+#define RESET_INT__REG		BMA020_CTRL_REG
+
+/* LOW-G, HIGH-G settings */
+
+#define ENABLE_LG__POS		0
+#define ENABLE_LG__LEN		1
+#define ENABLE_LG__MSK		0x01
+#define ENABLE_LG__REG		BMA020_CONF1_REG
+
+#define ENABLE_HG__POS		1
+#define ENABLE_HG__LEN		1
+#define ENABLE_HG__MSK		0x02
+#define ENABLE_HG__REG		BMA020_CONF1_REG
+
+/* LG/HG counter */
+
+#define COUNTER_LG__POS			2
+#define COUNTER_LG__LEN			2
+#define COUNTER_LG__MSK			0x0C
+#define COUNTER_LG__REG			BMA020_CONF1_REG
+
+#define COUNTER_HG__POS			4
+#define COUNTER_HG__LEN			2
+#define COUNTER_HG__MSK			0x30
+#define COUNTER_HG__REG			BMA020_CONF1_REG
+
+/* LG/HG duration is in ms */
+
+#define LG_DUR__POS			0
+#define LG_DUR__LEN			8
+#define LG_DUR__MSK			0xFF
+#define LG_DUR__REG			LG_DURATION_REG
+
+#define HG_DUR__POS			0
+#define HG_DUR__LEN			8
+#define HG_DUR__MSK			0xFF
+#define HG_DUR__REG			HG_DURATION_REG
+
+#define LG_THRES__POS		0
+#define LG_THRES__LEN		8
+#define LG_THRES__MSK		0xFF
+#define LG_THRES__REG		LG_THRESHOLD_REG
+
+#define HG_THRES__POS		0
+#define HG_THRES__LEN		8
+#define HG_THRES__MSK		0xFF
+#define HG_THRES__REG		HG_THRESHOLD_REG
+
+#define LG_HYST__POS			0
+#define LG_HYST__LEN			3
+#define LG_HYST__MSK			0x07
+#define LG_HYST__REG			HYSTERESIS_REG
+
+#define HG_HYST__POS			3
+#define HG_HYST__LEN			3
+#define HG_HYST__MSK			0x38
+#define HG_HYST__REG			HYSTERESIS_REG
+
+/* ANY MOTION and ALERT settings */
+
+#define EN_ANY_MOTION__POS		6
+#define EN_ANY_MOTION__LEN		1
+#define EN_ANY_MOTION__MSK		0x40
+#define EN_ANY_MOTION__REG		BMA020_CONF1_REG
+
+/* ALERT settings */
+#define ALERT__POS			7
+#define ALERT__LEN			1
+#define ALERT__MSK			0x80
+#define ALERT__REG			BMA020_CONF1_REG
+
+/* ANY MOTION Duration */
+
+#define ANY_MOTION_THRES__POS	0
+#define ANY_MOTION_THRES__LEN	8
+#define ANY_MOTION_THRES__MSK	0xFF
+#define ANY_MOTION_THRES__REG	MOTION_THRS_REG
+
+#define ANY_MOTION_DUR__POS		6
+#define ANY_MOTION_DUR__LEN		2
+#define ANY_MOTION_DUR__MSK		0xC0
+#define ANY_MOTION_DUR__REG		HYSTERESIS_REG
+
+#define CUSTOMER_RESERVED1__POS		0
+#define CUSTOMER_RESERVED1__LEN	 	8
+#define CUSTOMER_RESERVED1__MSK		0xFF
+#define CUSTOMER_RESERVED1__REG		CUSTOMER1_REG
+
+#define CUSTOMER_RESERVED2__POS		0
+#define CUSTOMER_RESERVED2__LEN	 	8
+#define CUSTOMER_RESERVED2__MSK		0xFF
+#define CUSTOMER_RESERVED2__REG		CUSTOMER2_REG
+
+/* BANDWIDTH dependend definitions */
+
+#define BANDWIDTH__POS				0
+#define BANDWIDTH__LEN			 	3
+#define BANDWIDTH__MSK			 	0x07
+#define BANDWIDTH__REG				RANGE_BWIDTH_REG
+
+/* RANGE */
+
+#define RANGE__POS				3
+#define RANGE__LEN				2
+#define RANGE__MSK				0x18
+#define RANGE__REG				RANGE_BWIDTH_REG
+
+/* WAKE UP */
+#define WAKE_UP__POS			0
+#define WAKE_UP__LEN			1
+#define WAKE_UP__MSK			0x01
+#define WAKE_UP__REG			BMA020_CONF2_REG
+
+#define WAKE_UP_PAUSE__POS		1
+#define WAKE_UP_PAUSE__LEN		2
+#define WAKE_UP_PAUSE__MSK		0x06
+#define WAKE_UP_PAUSE__REG		BMA020_CONF2_REG
+
+/* ACCELERATION DATA SHADOW */
+#define SHADOW_DIS__POS			3
+#define SHADOW_DIS__LEN			1
+#define SHADOW_DIS__MSK			0x08
+#define SHADOW_DIS__REG			BMA020_CONF2_REG
+
+/* LATCH Interrupt */
+
+#define LATCH_INT__POS			4
+#define LATCH_INT__LEN			1
+#define LATCH_INT__MSK			0x10
+#define LATCH_INT__REG			BMA020_CONF2_REG
+
+/* new data interrupt */
+#define NEW_DATA_INT__POS		5
+#define NEW_DATA_INT__LEN		1
+#define NEW_DATA_INT__MSK		0x20
+#define NEW_DATA_INT__REG		BMA020_CONF2_REG
+
+#define ENABLE_ADV_INT__POS		6
+#define ENABLE_ADV_INT__LEN		1
+#define ENABLE_ADV_INT__MSK		0x40
+#define ENABLE_ADV_INT__REG		BMA020_CONF2_REG
+
+/*
+#define BMA020_SPI4_OFF	0
+#define BMA020_SPI4_ON	1
+
+#define SPI4__POS				7
+#define SPI4__LEN				1
+#define SPI4__MSK				0x80
+#define SPI4__REG				BMA020_CONF2_REG
+*/
+#define GAIN_X__POS			0
+#define GAIN_X__LEN			6
+#define GAIN_X__MSK			0x3f
+#define GAIN_X__REG			OFFS_GAIN_X_REG
+
+#define GAIN_Y__POS			0
+#define GAIN_Y__LEN			6
+#define GAIN_Y__MSK			0x3f
+#define GAIN_Y__REG			OFFS_GAIN_Y_REG
+
+#define GAIN_Z__POS			0
+#define GAIN_Z__LEN			6
+#define GAIN_Z__MSK			0x3f
+#define GAIN_Z__REG			OFFS_GAIN_Z_REG
+
+#define OFFSET_T_LSB__POS	6
+#define OFFSET_T_LSB__LEN	2
+#define OFFSET_T_LSB__MSK	0xC0
+#define OFFSET_T_LSB__REG	OFFS_GAIN_T_REG
+
+#define GAIN_T__POS			0
+#define GAIN_T__LEN			6
+#define GAIN_T__MSK			0x3f
+#define GAIN_T__REG			OFFS_GAIN_T_REG
+
+#define OFFSET_X_MSB__POS	0
+#define OFFSET_X_MSB__LEN	8
+#define OFFSET_X_MSB__MSK	0xFF
+#define OFFSET_X_MSB__REG	OFFSET_X_REG
+
+#define OFFSET_Y_MSB__POS	0
+#define OFFSET_Y_MSB__LEN	8
+#define OFFSET_Y_MSB__MSK	0xFF
+#define OFFSET_Y_MSB__REG	OFFSET_Y_REG
+
+#define OFFSET_Z_MSB__POS	0
+#define OFFSET_Z_MSB__LEN	8
+#define OFFSET_Z_MSB__MSK	0xFF
+#define OFFSET_Z_MSB__REG	OFFSET_Z_REG
+
+#define OFFSET_T_MSB__POS	0
+#define OFFSET_T_MSB__LEN	8
+#define OFFSET_T_MSB__MSK	0xFF
+#define OFFSET_T_MSB__REG	OFFSET_T_REG
+
+#define BMA020_GET_BITSLICE(regvar, bitname)\
+			((regvar & bitname##__MSK) >> bitname##__POS)
+
+#define BMA020_SET_BITSLICE(regvar, bitname, val)\
+		((regvar & ~bitname##__MSK) | ((val<<bitname##__POS)&bitname##__MSK))
+
+/** \endcond */
+
+/* CONSTANTS */
+
+/* range and bandwidth */
+
+#define BMA020_RANGE_2G			0 /**< sets range to 2G mode \see bma020_set_range() */
+#define BMA020_RANGE_4G			1 /**< sets range to 4G mode \see bma020_set_range() */
+#define BMA020_RANGE_8G			2 /**< sets range to 8G mode \see bma020_set_range() */
+
+#define BMA020_BW_25HZ		0	/**< sets bandwidth to 25HZ \see bma020_set_bandwidth() */
+#define BMA020_BW_50HZ		1	/**< sets bandwidth to 50HZ \see bma020_set_bandwidth() */
+#define BMA020_BW_100HZ		2	/**< sets bandwidth to 100HZ \see bma020_set_bandwidth() */
+#define BMA020_BW_190HZ		3	/**< sets bandwidth to 190HZ \see bma020_set_bandwidth() */
+#define BMA020_BW_375HZ		4	/**< sets bandwidth to 375HZ \see bma020_set_bandwidth() */
+#define BMA020_BW_750HZ		5	/**< sets bandwidth to 750HZ \see bma020_set_bandwidth() */
+#define BMA020_BW_1500HZ	6	/**< sets bandwidth to 1500HZ \see bma020_set_bandwidth() */
+
+/* mode settings */
+#define BMA020_MODE_NORMAL      0
+#define BMA020_MODE_SLEEP       2
+#define BMA020_MODE_WAKE_UP     3
+
+/* wake up */
+#define BMA020_WAKE_UP_PAUSE_20MS		0
+#define BMA020_WAKE_UP_PAUSE_80MS		1
+#define BMA020_WAKE_UP_PAUSE_320MS		2
+#define BMA020_WAKE_UP_PAUSE_2560MS		3
+
+/* LG/HG thresholds are in LSB and depend on RANGE setting */
+/* no range check on threshold calculation */
+
+#define BMA020_SELF_TEST0_ON		1
+#define BMA020_SELF_TEST1_ON		3
+
+#define BMA020_EE_W_OFF			0
+#define BMA020_EE_W_ON			1
+
+/* low-g, high-g, any_motion */
+
+#define BMA020_COUNTER_LG_RST		0
+#define BMA020_COUNTER_LG_0LSB		BMA020_COUNTER_LG_RST
+#define BMA020_COUNTER_LG_1LSB		1
+#define BMA020_COUNTER_LG_2LSB		2
+#define BMA020_COUNTER_LG_3LSB		3
+
+#define BMA020_COUNTER_HG_RST		0
+#define BMA020_COUNTER_HG_0LSB		BMA020_COUNTER_HG_RST
+#define BMA020_COUNTER_HG_1LSB		1
+#define BMA020_COUNTER_HG_2LSB		2
+#define BMA020_COUNTER_HG_3LSB		3
+
+#define BMA020_COUNTER_RST			0
+#define BMA020_COUNTER_0LSB			BMA020_COUNTER_RST
+#define BMA020_COUNTER_1LSB			1
+#define BMA020_COUNTER_2LSB			2
+#define BMA020_COUNTER_3LSB			3
+
+/** Macro to convert floating point low-g-thresholds in G to 8-bit register
+ * values.<br>
+ * Example: BMA020_LG_THRES_IN_G( 0.3, 2.0) generates the register value
+ * for 0.3G threshold in 2G mode.
+ * \brief convert g-values to 8-bit value
+ */
+#define BMA020_LG_THRES_IN_G(gthres, range)			((256 * gthres) / range)
+
+/** Macro to convert floating point high-g-thresholds in G to 8-bit register
+ * values.<br>
+ * Example: BMA020_HG_THRES_IN_G( 1.4, 2.0) generates the register value
+ * for 1.4G threshold in 2G mode.
+ * \brief convert g-values to 8-bit value
+ */
+#define BMA020_HG_THRES_IN_G(gthres, range)				((256 * gthres) / range)
+
+/** Macro to convert floating point low-g-hysteresis in G to 8-bit register
+ * values.<br>
+ * Example: BMA020_LG_HYST_THRES_IN_G( 0.2, 2.0) generates the register value
+ * for 0.2G threshold in 2G mode.
+ * \brief convert g-values to 8-bit value
+ */
+#define BMA020_LG_HYST_IN_G(ghyst, range)				((32 * ghyst) / range)
+
+/** Macro to convert floating point high-g-hysteresis in G to 8-bit register
+ * values.<br>
+ * Example: BMA020_HG_HYST_THRES_IN_G( 0.2, 2.0) generates the register value
+ * for 0.2G threshold in 2G mode.
+ * \brief convert g-values to 8-bit value
+ */
+#define BMA020_HG_HYST_IN_G(ghyst, range)				((32 * ghyst) / range)
+
+/** Macro to convert floating point G-thresholds to 8-bit register values<br>
+ * Example: BMA020_ANY_MOTION_THRES_IN_G( 1.2, 2.0) generates the register
+ * value for 1.2G threshold in 2G mode.
+ * \brief convert g-values to 8-bit value
+ */
+#define BMA020_ANY_MOTION_THRES_IN_G(gthres, range)	((128 * gthres) / range)
+
+
+#define BMA020_ANY_MOTION_DUR_1		0
+#define BMA020_ANY_MOTION_DUR_3		1
+#define BMA020_ANY_MOTION_DUR_5		2
+#define BMA020_ANY_MOTION_DUR_7		3
+
+#define BMA020_SHADOW_DIS_OFF	0
+#define BMA020_SHADOW_DIS_ON	1
+
+#define BMA020_LATCH_INT_OFF	0
+#define BMA020_LATCH_INT_ON		1
+
+#define BMA020_NEW_DATA_INT_OFF	0
+#define BMA020_NEW_DATA_INT_ON	1
+
+#define BMA020_ENABLE_ADV_INT_OFF	0
+#define BMA020_ENABLE_ADV_INT_ON	1
+
+#define BMA020_EN_ANY_MOTION_OFF 	0
+#define BMA020_EN_ANY_MOTION_ON 	1
+
+#define BMA020_ALERT_OFF	0
+#define BMA020_ALERT_ON		1
+
+#define BMA020_ENABLE_LG_OFF	0
+#define BMA020_ENABLE_LG_ON		1
+
+#define BMA020_ENABLE_HG_OFF	0
+#define BMA020_ENABLE_HG_ON		1
+
+#define BMA020_INT_ALERT		(1<<7)
+#define BMA020_INT_ANY_MOTION	(1<<6)
+#define BMA020_INT_EN_ADV_INT	(1<<5)
+#define BMA020_INT_NEW_DATA		(1<<4)
+#define BMA020_INT_LATCH		(1<<3)
+#define BMA020_INT_HG			(1<<1)
+#define BMA020_INT_LG			(1<<0)
+
+#define BMA020_INT_STATUS_HG			(1<<0)
+#define BMA020_INT_STATUS_LG			(1<<1)
+#define BMA020_INT_STATUS_HG_LATCHED	(1<<2)
+#define BMA020_INT_STATUS_LG_LATCHED	(1<<3)
+#define BMA020_INT_STATUS_ALERT			(1<<4)
+#define BMA020_INT_STATUS_ST_RESULT		(1<<7)
+
+#define BMA020_CONF1_INT_MSK	((1<<ALERT__POS) | (1<<EN_ANY_MOTION__POS) | (1<<ENABLE_HG__POS) | (1<<ENABLE_LG__POS))
+#define BMA020_CONF2_INT_MSK	((1<<ENABLE_ADV_INT__POS) | (1<<NEW_DATA_INT__POS) | (1<<LATCH_INT__POS))
+
+//********************************************************************//
+/* IOCTL Command macro */
+
+#define		SET_RST		0x01
+
+#define		SET_NORMAL	0x08
+
+/* return BMA020_MODE_NORMAL, BMA020_MODE_SLEEP, BMA020_MODE_WAKE_UP */
+#define		GET_MODE		0x02
+
+#define		SET_SLEEP		0x03
+
+/* para BMA020_WAKE_UP_PAUSE_20MS, BMA020_WAKE_UP_PAUSE_80MS,
+ * BMA020_WAKE_UP_PAUSE_320MS, BMA020_WAKE_UP_PAUSE_2560MS
+ */
+#define		SET_WAKEUP_DUR		0x04
+
+#define		SET_AUTO_WAKEUP		0x05
+
+/* return BMA020_RANGE_2G;BMA020_RANGE_4G;BMA020_RANGE_8G */
+#define		GET_G			0x06
+
+/* para BMA020_RANGE_2G;BMA020_RANGE_4G;BMA020_RANGE_8G */
+#define		SET_G			0x07
+
+/* return BMA020_BW_25HZ, BMA020_BW_50HZ, BMA020_BW_100HZ, BMA020_BW_190HZ,
+ * BMA020_BW_375HZ, BMA020_BW_750HZ, BMA020_BW_1500HZ
+ */
+#define		GET_BANDWIDTH		0x09
+
+/* para BMA020_BW_25HZ, BMA020_BW_50HZ, BMA020_BW_100HZ, BMA020_BW_190HZ,
+ * BMA020_BW_375HZ, BMA020_BW_750HZ, BMA020_BW_1500HZ
+ */
+#define		SET_BANDWIDTH		0x0A
+
+/* BMA020_WAKE_UP_PAUSE_20MS, BMA020_WAKE_UP_PAUSE_80MS,
+ * BMA020_WAKE_UP_PAUSE_320MS, BMA020_WAKE_UP_PAUSE_2560MS
+ */
+#define		GET_WAKEUP_DUR		0x40
+
+/* ref to BMA020_LG_THRES_IN_G() */
+#define SET_LOW_G_THRESHOULD		0x20
+
+#define GET_LOW_G_THRESHOULD		0x21
+
+#define SET_LOW_G_COUNTDOWN		0x22
+
+#define GET_LOW_G_COUNTDOWN		0x23
+
+#define SET_HIGH_G_COUNTDOWN		0x24
+
+#define GET_HIGH_G_COUNTDOWN		0x25
+
+#define SET_LOW_G_DUR			0x26
+
+#define GET_LOW_G_DUR			0x27
+
+/* BMA020_HG_THRES_IN_G()  */
+#define SET_HIGH_G_THRESHOULD		0x28
+
+#define GET_HIGH_G_THRESHOULD		0x29
+
+
+/* BMA020_ANY_MOTION_THRES_IN_G() */
+#define SET_ANY_MOTION_THRESHOULD	0x2C
+
+/* BMA020_ANY_MOTION_THRES_IN_G() */
+#define GET_ANY_MOTION_THRESHOULD	0x2D
+
+/* BMA020_ANY_MOTION_DUR_1, BMA020_ANY_MOTION_DUR_3, BMA020_ANY_MOTION_DUR_5,
+ * BMA020_ANY_MOTION_DUR_7
+ */
+#define SET_ANY_MOTION_COUNT		0x2E
+
+/* BMA020_ANY_MOTION_DUR_1, BMA020_ANY_MOTION_DUR_3, BMA020_ANY_MOTION_DUR_5,
+ * BMA020_ANY_MOTION_DUR_7
+ */
+#define GET_ANY_MOTION_COUNT		0x2F
+
+/* BMA020_INT_ALERT, BMA020_INT_ANY_MOTION, BMA020_INT_EN_ADV_INT,
+ * BMA020_INT_NEW_DATA, BMA020_INT_LATCH, BMA020_INT_HG, BMA020_INT_LG
+ */
+#define SET_INTERRUPT_MASK		0x30
+
+/* BMA020_INT_ALERT, BMA020_INT_ANY_MOTION, BMA020_INT_EN_ADV_INT,
+ * BMA020_INT_NEW_DATA, BMA020_INT_LATCH, BMA020_INT_HG, BMA020_INT_LG
+ */
+#define GET_INTERRUPT_MASK		0x31
+
+/* resets the BMA020 interrupt status, can be used to reset a latched
+ * interrupt
+ */
+#define RESET_INT			0x32
+
+/* X,Y and Z-axis acceleration data readout, ref bma020acc_t structure
+ * for x,y,z data readout
+ */
+#define READ_ACCEL_XYZ			0x33
+
+/* BMA020_INT_STATUS_HG, BMA020_INT_STATUS_LG, BMA020_INT_STATUS_HG_LATCHED,
+ * BMA020_INT_STATUS_LG_LATCHED, BMA020_INT_STATUS_ALERT,
+ * BMA020_INT_STATUS_ST_RESULT
+ */
+#define GET_INT_STATUS			0x34
+
+/* param onoff, enable=1, disable=0  */
+#define SET_LOW_G_INT			0x35
+
+/* param onoff enable=1, disable=0 */
+#define SET_HIGH_G_INT			0x36
+
+/* param onoff enable=1, disable=0 */
+#define SET_ANY_MOTION_INT		0x37
+
+/* param onoff enable=1, disable=0 */
+#define SET_ADVANCED_INT		0x38
+
+/* param latched (=1 for latched interrupts), (=0 for unlatched interrupts) */
+#define LATCH_INT			0x39
+
+/* param onoff enable=1, disable=0 */
+#define SET_NEW_DATA_INT		0x3A
+
+#endif   /* __BMA020_H__ */
+
--- linux-mvl-dove-2.6.32.orig/drivers/hwmon/bma020/bma020.c
+++ linux-mvl-dove-2.6.32/drivers/hwmon/bma020/bma020.c
@@ -0,0 +1,2018 @@
+/*  $Date: 2007/08/07 16:05:10 $
+ *  $Revision: 1.4 $
+ *
+ */
+
+/*
+* Copyright (C) 2007 Bosch Sensortec GmbH
+*
+* BMA020 acceleration sensor API
+*
+* Usage:	Application Programming Interface for BMA020 configuration and data read out
+*
+* Author:	Lars.Beseke@bosch-sensortec.com
+*
+* Disclaimer
+*
+* Common:
+* Bosch Sensortec products are developed for the consumer goods industry. They may only be used
+* within the parameters of the respective valid product data sheet.  Bosch Sensortec products are
+* provided with the express understanding that there is no warranty of fitness for a particular purpose.
+* They are not fit for use in life-sustaining, safety or security sensitive systems or any system or device
+* that may lead to bodily harm or property damage if the system or device malfunctions. In addition,
+* Bosch Sensortec products are not fit for use in products which interact with motor vehicle systems.
+* The resale and/or use of products are at the purchaser’s own risk and his own responsibility. The
+* examination of fitness for the intended use is the sole responsibility of the Purchaser.
+*
+* The purchaser shall indemnify Bosch Sensortec from all third party claims, including any claims for
+* incidental, or consequential damages, arising from any product use not covered by the parameters of
+* the respective valid product data sheet or not approved by Bosch Sensortec and reimburse Bosch
+* Sensortec for all costs in connection with such claims.
+*
+* The purchaser must monitor the market for the purchased products, particularly with regard to
+* product safety and inform Bosch Sensortec without delay of all security relevant incidents.
+*
+* Engineering Samples are marked with an asterisk (*) or (e). Samples may vary from the valid
+* technical specifications of the product series. They are therefore not intended or fit for resale to third
+* parties or for use in end products. Their sole purpose is internal client testing. The testing of an
+* engineering sample may in no way replace the testing of a product series. Bosch Sensortec
+* assumes no liability for the use of engineering samples. By accepting the engineering samples, the
+* Purchaser agrees to indemnify Bosch Sensortec from all claims arising from the use of engineering
+* samples.
+*
+* Special:
+* This software module (hereinafter called "Software") and any information on application-sheets
+* (hereinafter called "Information") is provided free of charge for the sole purpose to support your
+* application work. The Software and Information is subject to the following terms and conditions:
+*
+* The Software is specifically designed for the exclusive use for Bosch Sensortec products by
+* personnel who have special experience and training. Do not use this Software if you do not have the
+* proper experience or training.
+*
+* This Software package is provided `` as is `` and without any expressed or implied warranties,
+* including without limitation, the implied warranties of merchantability and fitness for a particular
+* purpose.
+*
+* Bosch Sensortec and their representatives and agents deny any liability for the functional impairment
+* of this Software in terms of fitness, performance and safety. Bosch Sensortec and their
+* representatives and agents shall not be liable for any direct or indirect damages or injury, except as
+* otherwise stipulated in mandatory applicable law.
+*
+* The Information provided is believed to be accurate and reliable. Bosch Sensortec assumes no
+* responsibility for the consequences of use of such Information nor for any infringement of patents or
+* other rights of third parties which may result from its use. No license is granted by implication or
+* otherwise under any patent or patent rights of Bosch. Specifications mentioned in the Information are
+* subject to change without notice.
+*
+* It is not allowed to deliver the source code of the Software to any third party without permission of
+* Bosch Sensortec.
+*/
+
+
+/*! \file bma020.c
+    \brief This file contains all function implementations for the BMA020 API
+
+    Details.
+*/
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/delay.h>
+
+#include <linux/interrupt.h>
+#include <linux/slab.h>
+#include <linux/i2c.h>
+#include <linux/platform_device.h>
+#include <linux/err.h>
+#include <linux/mutex.h>
+#include <linux/cdev.h>
+#include <linux/mm.h>
+#include <linux/io.h>
+#include <asm/uaccess.h>
+#include <linux/fs.h>
+#include <asm/system.h>
+#include <mach/gpio.h>
+
+//#include <mach/mfp-pxa168.h> //JP
+#include <mach/irqs.h>   //JP
+
+#include <linux/input-polldev.h>
+#include <linux/hwmon.h>
+
+
+#include <linux/bma020.h>
+
+//#include <asm/hardware.h>
+//#include <asm/arch/mfp.h>
+//#include <linux/hwmon.h>
+//#include <linux/hwmon-vid.h>
+//#include <linux/hwmon-sysfs.h>
+
+
+
+
+/*****************************************************************************
+ *                              BMA020 I2C Client Driver
+ *****************************************************************************/
+//#define INPUT_POLL			//for input_poll interface, otherwise ioctl interface
+
+#define DEBUG_INFO
+#define DEBUG
+
+/** select one of below **/
+//#define DEBUG_INPUT_POLL		//for input_poll interface
+//#define DEBUG_IOCTL			//for ioctl interface
+
+#define G_INT_PIN 0x17
+
+#if 0
+//old i2c attach method
+#define	BMA020_ADDRESS	(0x38)			//0x70/71
+static unsigned short ignore[]={I2C_CLIENT_END};
+static unsigned short normal_addr[]={BMA020_ADDRESS,I2C_CLIENT_END,};
+static struct i2c_client_address_data addr_data={
+	.normal_i2c	= normal_addr,
+	.probe		= ignore,
+	.ignore		= ignore,
+};
+//static unsigned short normal_i2c[] = {BMA020_ADDRESS, I2C_CLIENT_END };
+#endif
+
+static struct i2c_client *g_client;
+
+static DEFINE_MUTEX(bma020_lock);
+
+static bma020_t *p_bma020 = NULL;				/**< pointer to BMA020 device structure  */
+
+
+//***************************i2c bus function**************************************//
+
+char i2c_bma020_read_buf( u8 dev_addr,u8 reg_addr, u8* buf,u8 cnt)
+{
+	i2c_master_send(g_client,&reg_addr,1);		//i2c_smbus_write_byte(g_client,reg_addr);
+	return i2c_master_recv(g_client, buf ,cnt);
+}
+
+char i2c_bma020_write_buf( u8 dev_addr,u8 reg_addr, u8* buf,u8 cnt)
+{
+	int i;
+	char *t_buf = kmalloc(cnt+1, GFP_KERNEL);
+	t_buf[0] = reg_addr;
+	for(i=0; i< cnt; i++)
+		t_buf[i+1] = buf[i];
+	//here issue cnt always be 1!
+	//printk(KERN_ALERT"********** %s *********\n",__FUNCTION__); //JP
+	return i2c_smbus_write_byte_data(g_client,reg_addr,*buf); //JP
+	//i2c_master_send(g_client, &reg_addr, 1); //JP
+	//i2c_master_send(g_client, t_buf, cnt+1); //JP
+	
+}
+
+
+//*************************bma020 hw configuration***********************************//
+int bma020_detect(void)
+{
+	int comres=0;
+	unsigned char data;
+
+
+	//get chip info.
+	p_bma020->dev_addr = BMA020_I2C_ADDR;	/* preset SM380 I2C_addr */
+	p_bma020->bus_write = i2c_bma020_write_buf;
+	p_bma020->bus_read = i2c_bma020_read_buf;
+
+	comres += p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, CHIP_ID__REG, &data, 1);/* read Chip Id */
+
+	p_bma020->chip_id = BMA020_GET_BITSLICE(data, CHIP_ID);	/* get bitslice */
+
+	comres += p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, ML_VERSION__REG, &data, 1); /* read Version reg */
+	p_bma020->ml_version = BMA020_GET_BITSLICE(data, ML_VERSION);	/* get ML Version */
+	p_bma020->al_version = BMA020_GET_BITSLICE(data, AL_VERSION);/* get AL Version */
+
+	return comres;
+}
+
+/** Perform soft reset of BMA020 via bus command
+*/
+int bma020_soft_reset(void)
+{
+	int comres;
+	unsigned char data=0;
+	if (p_bma020==0)
+		return E_BMA_NULL_PTR;
+	data = BMA020_SET_BITSLICE(data, SOFT_RESET, 1);
+	comres = p_bma020->BMA020_BUS_WRITE_FUNC(p_bma020->dev_addr, SOFT_RESET__REG, &data,1);
+	return comres;
+}
+
+/**	start BMA020s integrated selftest function
+   \param st 1 = selftest0, 3 = selftest1 (see also)
+	 \return result of bus communication function
+
+	 \see BMA020_SELF_TEST0_ON
+	 \see BMA020_SELF_TEST1_ON
+
+ */
+int bma020_selftest(unsigned char st)
+{
+	int comres;
+	unsigned char data;
+	comres = p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, SELF_TEST__REG, &data, 1);
+	data = BMA020_SET_BITSLICE(data, SELF_TEST, st);
+	comres += p_bma020->BMA020_BUS_WRITE_FUNC(p_bma020->dev_addr, SELF_TEST__REG, &data, 1);
+	return comres;
+
+}
+
+
+
+/**	set bma020s range
+ \param range
+ \return  result of bus communication function
+
+ \see BMA020_RANGE_2G
+ \see BMA020_RANGE_4G
+ \see BMA020_RANGE_8G
+*/
+int bma020_set_range(char range)
+{
+   int comres = 0;
+   unsigned char data;
+
+   if (p_bma020==0)
+	    return E_BMA_NULL_PTR;
+
+   if (range<3) {
+		comres = p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, RANGE__REG, &data, 1 );
+		data = BMA020_SET_BITSLICE(data, RANGE, range);
+		comres += p_bma020->BMA020_BUS_WRITE_FUNC(p_bma020->dev_addr, RANGE__REG, &data, 1);
+   }
+   return comres;
+
+}
+
+
+/* readout select range from BMA020
+   \param *range pointer to range setting
+   \return result of bus communication function
+   \see BMA020_RANGE_2G, BMA020_RANGE_4G, BMA020_RANGE_8G
+   \see bma020_set_range()
+*/
+int bma020_get_range(unsigned char *range)
+{
+
+	int comres = 0;
+
+	if (p_bma020==0)
+		return E_BMA_NULL_PTR;
+	comres = p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, RANGE__REG, range, 1 );
+
+	*range = BMA020_GET_BITSLICE(*range, RANGE);
+
+	return comres;
+
+}
+
+
+
+/** set BMA020s operation mode
+   \param mode 0 = normal, 2 = sleep, 3 = auto wake up
+   \return result of bus communication function
+   \note Available constants see below
+   \see BMA020_MODE_NORMAL, BMA020_MODE_SLEEP, BMA020_MODE_WAKE_UP
+	 \see bma020_get_mode()
+*/
+int bma020_set_mode(unsigned char mode) {
+
+	int comres=0;
+	unsigned char data1, data2;
+ 	//printk(KERN_ALERT"func:%s\n",__func__); //JP
+	//printk(KERN_ALERT"func:%s\n", __FUNCTION__); //JP
+	//printk(KERN_ALERT"000000000000000\n"); //JP
+	if (p_bma020==0)
+		return E_BMA_NULL_PTR;
+	
+ 	//printk(KERN_ALERT"11111111111\n"); //JP
+
+	if (mode<4 || mode!=1) {
+		comres = p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, WAKE_UP__REG, &data1, 1 );
+		data1  = BMA020_SET_BITSLICE(data1, WAKE_UP, mode);
+		comres += p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, SLEEP__REG, &data2, 1 );
+		data2  = BMA020_SET_BITSLICE(data2, SLEEP, (mode>>1));
+
+		//printk(KERN_ALERT"before write\n"); //JP
+
+		comres += p_bma020->BMA020_BUS_WRITE_FUNC(p_bma020->dev_addr, WAKE_UP__REG, &data1, 1);
+		comres += p_bma020->BMA020_BUS_WRITE_FUNC(p_bma020->dev_addr, SLEEP__REG, &data2, 1);
+		p_bma020->mode = mode;
+	}
+ 	//printk(KERN_ALERT"222222222222\n"); //JP
+	return comres;
+
+}
+
+
+
+/** get selected mode
+   \return used mode
+   \note this function returns the mode stored in \ref bma020_t structure
+   \see BMA020_MODE_NORMAL, BMA020_MODE_SLEEP, BMA020_MODE_WAKE_UP
+   \see bma020_set_mode()
+
+*/
+unsigned char bma020_get_mode(void)
+{
+	if (p_bma020==0)
+		return E_BMA_NULL_PTR;
+	return p_bma020->mode;
+
+}
+
+/** set BMA020 internal filter bandwidth
+   \param bw bandwidth (see bandwidth constants)
+   \return result of bus communication function
+   \see #define BMA020_BW_25HZ, BMA020_BW_50HZ, BMA020_BW_100HZ, BMA020_BW_190HZ, BMA020_BW_375HZ,
+   \BMA020_BW_750HZ, BMA020_BW_1500HZ
+   \see bma020_get_bandwidth()
+*/
+int bma020_set_bandwidth(char bw)
+{
+	int comres = 0;
+	unsigned char data;
+
+
+	if (p_bma020==0)
+		return E_BMA_NULL_PTR;
+
+	if (bw<8) {
+		comres = p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, BANDWIDTH__REG, &data, 1 );
+		data = BMA020_SET_BITSLICE(data, BANDWIDTH, bw);
+		comres += p_bma020->BMA020_BUS_WRITE_FUNC(p_bma020->dev_addr, BANDWIDTH__REG, &data, 1 );
+	}
+    return comres;
+
+
+}
+
+/** read selected bandwidth from BMA020
+ \param *bw pointer to bandwidth return value
+ \return result of bus communication function
+ \see #define BMA020_BW_25HZ, BMA020_BW_50HZ, BMA020_BW_100HZ, BMA020_BW_190HZ, BMA020_BW_375HZ,
+ \BMA020_BW_750HZ, BMA020_BW_1500HZ
+ \see bma020_set_bandwidth()
+*/
+int bma020_get_bandwidth(unsigned char *bw) {
+	int comres = 1;
+	if (p_bma020==0)
+		return E_BMA_NULL_PTR;
+
+	comres = p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, BANDWIDTH__REG, bw, 1 );
+
+	*bw = BMA020_GET_BITSLICE(*bw, BANDWIDTH);
+
+	return comres;
+
+}
+
+/** set BMA020 auto wake up pause
+  \param wup wake_up_pause parameters
+	\return result of bus communication function
+	\see BMA020_WAKE_UP_PAUSE_20MS, BMA020_WAKE_UP_PAUSE_80MS, BMA020_WAKE_UP_PAUSE_320MS,
+	\BMA020_WAKE_UP_PAUSE_2560MS
+	\see bma020_get_wake_up_pause()
+*/
+
+int bma020_set_wake_up_pause(unsigned char wup)
+{
+	int comres=0;
+	unsigned char data;
+
+	if (p_bma020==0)
+		return E_BMA_NULL_PTR;
+
+
+	    comres = p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, WAKE_UP_PAUSE__REG, &data, 1 );
+		data = BMA020_SET_BITSLICE(data, WAKE_UP_PAUSE, wup);
+		comres += p_bma020->BMA020_BUS_WRITE_FUNC(p_bma020->dev_addr, WAKE_UP_PAUSE__REG, &data, 1 );
+	return comres;
+}
+
+/** read BMA020 auto wake up pause from image
+  \param *wup wake up pause read back pointer
+	\see BMA020_WAKE_UP_PAUSE_20MS, BMA020_WAKE_UP_PAUSE_80MS, BMA020_WAKE_UP_PAUSE_320MS,
+	\BMA020_WAKE_UP_PAUSE_2560MS
+	\see bma020_set_wake_up_pause()
+*/
+int bma020_get_wake_up_pause(unsigned char *wup)
+{
+    int comres = 1;
+	unsigned char data;
+	if (p_bma020==0)
+		return E_BMA_NULL_PTR;
+
+	comres = p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, WAKE_UP_PAUSE__REG, &data,  1 );
+
+	*wup = BMA020_GET_BITSLICE(data, WAKE_UP_PAUSE);
+
+	return comres;
+
+}
+
+
+/* Thresholds and Interrupt Configuration */
+
+
+/** set low-g interrupt threshold
+   \param th set the threshold
+   \note the threshold depends on configured range. A macro \ref BMA020_LG_THRES_IN_G() for range to
+   \register value conversion is available.
+   \see BMA020_LG_THRES_IN_G()
+   \see bma020_get_low_g_threshold()
+*/
+int bma020_set_low_g_threshold(unsigned char th)
+{
+
+	int comres;
+
+	if (p_bma020==0)
+		return E_BMA_NULL_PTR;
+
+	comres = p_bma020->BMA020_BUS_WRITE_FUNC(p_bma020->dev_addr, LG_THRES__REG, &th, 1);
+	return comres;
+
+}
+
+
+/** get low-g interrupt threshold
+   \param *th get the threshold  value from sensor image
+   \see bma020_set_low_g_threshold()
+*/
+int bma020_get_low_g_threshold(unsigned char *th)
+{
+
+	int comres=1;
+	if (p_bma020==0)
+		return E_BMA_NULL_PTR;
+
+		comres = p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, LG_THRES__REG, th, 1);
+
+	return comres;
+
+}
+
+
+/** set low-g interrupt countdown
+   \param cnt get the countdown value from sensor image
+   \see bma020_get_low_g_countdown()
+*/
+int bma020_set_low_g_countdown(unsigned char cnt)
+{
+	int comres=0;
+	unsigned char data;
+
+	if (p_bma020==0)
+		return E_BMA_NULL_PTR;
+  comres = p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, COUNTER_LG__REG, &data, 1 );
+  data = BMA020_SET_BITSLICE(data, COUNTER_LG, cnt);
+	comres += p_bma020->BMA020_BUS_WRITE_FUNC(p_bma020->dev_addr, COUNTER_LG__REG, &data, 1 );
+	return comres;
+}
+
+
+/** get low-g interrupt countdown
+   \param cnt get the countdown  value from sensor image
+   \see bma020_set_low_g_countdown()
+*/
+int bma020_get_low_g_countdown(unsigned char *cnt)
+{
+    int comres = 1;
+	unsigned char data;
+	if (p_bma020==0)
+		return E_BMA_NULL_PTR;
+
+	comres = p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, COUNTER_LG__REG, &data,  1 );
+	*cnt = BMA020_GET_BITSLICE(data, COUNTER_LG);
+
+	return comres;
+}
+
+/** set high-g interrupt countdown
+   \param cnt get the countdown value from sensor image
+   \see bma020_get_high_g_countdown()
+*/
+int bma020_set_high_g_countdown(unsigned char cnt)
+{
+	int comres=1;
+	unsigned char data;
+
+	if (p_bma020==0)
+		return E_BMA_NULL_PTR;
+
+        comres = p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, COUNTER_HG__REG, &data, 1 );
+	data = BMA020_SET_BITSLICE(data, COUNTER_HG, cnt);
+	comres += p_bma020->BMA020_BUS_WRITE_FUNC(p_bma020->dev_addr, COUNTER_HG__REG, &data, 1 );
+	return comres;
+}
+
+/** get high-g interrupt countdown
+   \param cnt get the countdown  value from sensor image
+   \see bma020_set_high_g_countdown()
+*/
+int bma020_get_high_g_countdown(unsigned char *cnt)
+{
+    int comres = 0;
+	unsigned char data;
+	if (p_bma020==0)
+		return E_BMA_NULL_PTR;
+	comres = p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, COUNTER_HG__REG, &data,  1 );
+
+	*cnt = BMA020_GET_BITSLICE(data, COUNTER_HG);
+
+	return comres;
+
+}
+
+
+/** configure low-g duration value
+	\param dur low-g duration in miliseconds
+	\see bma020_get_low_g_duration(), bma020_get_high_g_duration(), bma020_set_high_g_duration()
+
+*/
+int bma020_set_low_g_duration(unsigned char dur)
+{
+	int comres=0;
+	if (p_bma020==0)
+		return E_BMA_NULL_PTR;
+
+
+	comres = p_bma020->BMA020_BUS_WRITE_FUNC(p_bma020->dev_addr, LG_DUR__REG, &dur, 1);
+
+	return comres;
+}
+
+
+int bma020_set_low_g_hyst(unsigned char hyst)
+{
+	int comres=0;
+	unsigned char data;
+	if (p_bma020==0)
+		return E_BMA_NULL_PTR;
+
+        comres = p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, LG_HYST__REG, &data, 1 );
+	data = BMA020_SET_BITSLICE(data, LG_HYST , hyst);
+	#ifdef DEBUG_INFO
+	printk("##!!## hyst=0x%x\n",data);
+	#endif
+	comres += p_bma020->BMA020_BUS_WRITE_FUNC(p_bma020->dev_addr, LG_HYST__REG, &data, 1 );
+
+	return comres;
+}
+
+int bma020_set_high_g_hyst(unsigned char hyst)
+{
+	int comres=0;
+	unsigned char data;
+	if (p_bma020==0)
+		return E_BMA_NULL_PTR;
+
+        comres = p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, HG_HYST__REG, &data, 1 );
+	data = BMA020_SET_BITSLICE(data, HG_HYST , hyst);
+	#ifdef DEBUG_INFO
+	printk("##!!## hyst=0x%x\n",data);
+	#endif
+	comres += p_bma020->BMA020_BUS_WRITE_FUNC(p_bma020->dev_addr, HG_HYST__REG, &data, 1 );
+
+	return comres;
+}
+
+/** read out low-g duration value from sensor image
+	\param dur low-g duration in miliseconds
+	\see bma020_set_low_g_duration(), bma020_get_high_g_duration(), bma020_set_high_g_duration()
+
+*/
+int bma020_get_low_g_duration(unsigned char *dur) {
+
+	int comres=0;
+	if (p_bma020==0)
+		return E_BMA_NULL_PTR;
+
+	comres = p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, LG_DUR__REG, dur, 1);
+	return comres;
+
+}
+
+
+
+
+/** set low-g interrupt threshold
+   \param th set the threshold
+   \note the threshold depends on configured range. A macro \ref BMA020_HG_THRES_IN_G() for range to
+   \register value conversion is available.
+   \see BMA020_HG_THRES_IN_G()
+   \see bma020_get_high_g_threshold()
+*/
+int bma020_set_high_g_threshold(unsigned char th)
+{
+
+	int comres=0;
+
+	if (p_bma020==0)
+		return E_BMA_NULL_PTR;
+
+	comres = p_bma020->BMA020_BUS_WRITE_FUNC(p_bma020->dev_addr, HG_THRES__REG, &th, 1);
+	return comres;
+
+}
+
+/** get high-g interrupt threshold
+   \param *th get the threshold  value from sensor image
+   \see bma020_set_high_g_threshold()
+*/
+int bma020_get_high_g_threshold(unsigned char *th)
+{
+
+	int comres=0;
+	if (p_bma020==0)
+		return E_BMA_NULL_PTR;
+
+	comres = p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, HG_THRES__REG, th, 1);
+
+	return comres;
+
+}
+
+
+
+/** configure high-g duration value
+	\param dur high-g duration in miliseconds
+	\see  bma020_get_high_g_duration(), bma020_set_low_g_duration(), bma020_get_low_g_duration()
+
+*/
+int bma020_set_high_g_duration(unsigned char dur)
+{
+	int comres=0;
+
+	if (p_bma020==0)
+		return E_BMA_NULL_PTR;
+
+	comres = p_bma020->BMA020_BUS_WRITE_FUNC(p_bma020->dev_addr, HG_DUR__REG, &dur, 1);
+	return comres;
+}
+
+
+/** read out high-g duration value from sensor image
+	\param dur high-g duration in miliseconds
+	\see  bma020_set_high_g_duration(), bma020_get_low_g_duration(), bma020_set_low_g_duration(),
+
+*/
+int bma020_get_high_g_duration(unsigned char *dur) {
+
+	int comres=0;
+	if (p_bma020==0)
+		return E_BMA_NULL_PTR;
+
+        comres = p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, HG_DUR__REG, dur, 1);
+
+	return comres;
+
+}
+
+
+
+
+/**  set threshold value for any_motion feature
+		\param th set the threshold a macro \ref BMA020_ANY_MOTION_THRES_IN_G()  is available for that
+		\see BMA020_ANY_MOTION_THRES_IN_G()
+*/
+int bma020_set_any_motion_threshold(unsigned char th)
+{
+	int comres=0;
+
+	if (p_bma020==0)
+		return E_BMA_NULL_PTR;
+
+	comres = p_bma020->BMA020_BUS_WRITE_FUNC(p_bma020->dev_addr, ANY_MOTION_THRES__REG, &th, 1);
+
+	return comres;
+}
+
+
+/**  get threshold value for any_motion feature
+		\param *th read back any_motion threshold from image register
+		\see BMA020_ANY_MOTION_THRES_IN_G()
+*/
+int bma020_get_any_motion_threshold(unsigned char *th)
+{
+
+	int comres=0;
+	if (p_bma020==0)
+		return E_BMA_NULL_PTR;
+	comres = p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, ANY_MOTION_THRES__REG, th, 1);
+
+	return comres;
+
+}
+
+/**  set counter value for any_motion feature
+		\param amc set the counter value, constants are available for that
+		\see BMA020_ANY_MOTION_DUR_1, BMA020_ANY_MOTION_DUR_3, BMA020_ANY_MOTION_DUR_5,
+		\BMA020_ANY_MOTION_DUR_7
+*/
+int bma020_set_any_motion_count(unsigned char amc)
+{
+	int comres=0;
+	unsigned char data;
+	if (p_bma020==0)
+		return E_BMA_NULL_PTR;
+
+	comres = p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, ANY_MOTION_DUR__REG, &data, 1 );
+	data = BMA020_SET_BITSLICE(data, ANY_MOTION_DUR, amc);
+	comres = p_bma020->BMA020_BUS_WRITE_FUNC(p_bma020->dev_addr, ANY_MOTION_DUR__REG, &data, 1 );
+	return comres;
+}
+
+
+/**  get counter value for any_motion feature from image register
+		\param *amc readback pointer for counter value
+		\see BMA020_ANY_MOTION_DUR_1, BMA020_ANY_MOTION_DUR_3, BMA020_ANY_MOTION_DUR_5,
+		\BMA020_ANY_MOTION_DUR_7
+*/
+int bma020_get_any_motion_count(unsigned char *amc)
+{
+    int comres = 0;
+	unsigned char data;
+	if (p_bma020==0)
+		return E_BMA_NULL_PTR;
+
+	comres = p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, ANY_MOTION_DUR__REG, &data,  1 );
+
+	*amc = BMA020_GET_BITSLICE(data, ANY_MOTION_DUR);
+	return comres;
+
+}
+
+
+
+/** set the interrupt mask for BMA020's interrupt features in one mask
+	\param mask input for interrupt mask
+	\see BMA020_INT_ALERT, BMA020_INT_ANY_MOTION, BMA020_INT_EN_ADV_INT, BMA020_INT_NEW_DATA,
+	\BMA020_INT_LATCH, BMA020_INT_HG, BMA020_INT_LG
+*/
+int bma020_set_interrupt_mask(unsigned char mask)
+{
+	int comres=0;
+	unsigned char data[4];
+
+	if (p_bma020==0)
+		return E_BMA_NULL_PTR;
+	data[0] = mask & BMA020_CONF1_INT_MSK;
+	data[2] = ((mask<<1) & BMA020_CONF2_INT_MSK);
+
+
+	comres = p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, BMA020_CONF1_REG, &data[1], 1);
+	comres += p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, BMA020_CONF2_REG, &data[3], 1);
+	data[1] &= (~BMA020_CONF1_INT_MSK);
+	data[1] |= data[0];
+	data[3] &=(~(BMA020_CONF2_INT_MSK));
+	data[3] |= data[2];
+
+	comres += p_bma020->BMA020_BUS_WRITE_FUNC(p_bma020->dev_addr, BMA020_CONF1_REG, &data[1], 1);
+	comres += p_bma020->BMA020_BUS_WRITE_FUNC(p_bma020->dev_addr, BMA020_CONF2_REG, &data[3], 1);
+
+	return comres;
+}
+
+
+
+
+/** set the shadow_dis for BMA020's shadow_dis bit
+	\param ssd input for on/off control
+	\see BMA020_SHADOW_DIS_OFF, BMA020_SHADOW_DIS_ON
+*/
+int bma020_set_shadow_dis(unsigned char ssd)
+{
+	   int comres = 0;
+	   unsigned char data;
+
+	   if (p_bma020==0)
+		    return E_BMA_NULL_PTR;
+
+	   if ((ssd==1)||(ssd==0)) {
+			comres = p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, BMA020_CONF2_REG, &data, 1 );
+			data = BMA020_SET_BITSLICE(data, SHADOW_DIS, ssd);
+			comres += p_bma020->BMA020_BUS_WRITE_FUNC(p_bma020->dev_addr, BMA020_CONF2_REG, &data, 1);
+	   }
+	   return comres;
+
+}
+
+/** get the current interrupt mask settings from BMA020 image registers
+	\param *mask return variable pointer for interrupt mask
+	\see BMA020_INT_ALERT, BMA020_INT_ANY_MOTION, BMA020_INT_EN_ADV_INT, BMA020_INT_NEW_DATA,
+	\BMA020_INT_LATCH, BMA020_INT_HG, BMA020_INT_LG
+*/
+int bma020_get_interrupt_mask(unsigned char *mask)
+{
+	int comres=0;
+	unsigned char data;
+
+	if (p_bma020==0)
+		return E_BMA_NULL_PTR;
+
+	p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, BMA020_CONF1_REG, &data,1);
+	*mask = data & BMA020_CONF1_INT_MSK;
+	p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, BMA020_CONF2_REG, &data,1);
+	*mask = *mask | ((data & BMA020_CONF2_INT_MSK)>>1);
+
+	return comres;
+}
+
+
+/** resets the BMA020 interrupt status
+		\note this feature can be used to reset a latched interrupt
+
+*/
+int bma020_reset_interrupt(void)
+{
+	#ifdef DEBUG_INFO
+	printk("##!!## file=%s,func=%s\n",__FILE__,__FUNCTION__);
+	#endif
+	int comres=0;
+	unsigned char data=(1<<RESET_INT__POS);
+
+	if (p_bma020==0)
+		return E_BMA_NULL_PTR;
+
+	comres = p_bma020->BMA020_BUS_WRITE_FUNC(p_bma020->dev_addr, RESET_INT__REG, &data, 1);
+	return comres;
+
+}
+
+
+
+
+
+/* Data Readout */
+
+/** X-axis acceleration data readout
+	\param *a_x pointer for 16 bit 2's complement data output (LSB aligned)
+*/
+int bma020_read_accel_x(short *a_x)
+{
+	int comres;
+	unsigned char data[2];
+
+
+	if (p_bma020==0)
+		return E_BMA_NULL_PTR;
+
+	comres = p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, ACC_X_LSB__REG, data, 2);
+	*a_x = BMA020_GET_BITSLICE(data[0],ACC_X_LSB) | BMA020_GET_BITSLICE(data[1],ACC_X_MSB)<<ACC_X_LSB__LEN;
+	*a_x = *a_x << (sizeof(short)*8-(ACC_X_LSB__LEN+ACC_X_MSB__LEN));
+	*a_x = *a_x >> (sizeof(short)*8-(ACC_X_LSB__LEN+ACC_X_MSB__LEN));
+	return comres;
+
+}
+
+
+
+/** Y-axis acceleration data readout
+	\param *a_y pointer for 16 bit 2's complement data output (LSB aligned)
+*/
+int bma020_read_accel_y(short *a_y)
+{
+	int comres;
+	unsigned char data[2];
+
+
+	if (p_bma020==0)
+		return E_BMA_NULL_PTR;
+
+	comres = p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, ACC_Y_LSB__REG, data, 2);
+	*a_y = BMA020_GET_BITSLICE(data[0],ACC_Y_LSB) | BMA020_GET_BITSLICE(data[1],ACC_Y_MSB)<<ACC_Y_LSB__LEN;
+	*a_y = *a_y << (sizeof(short)*8-(ACC_Y_LSB__LEN+ACC_Y_MSB__LEN));
+	*a_y = *a_y >> (sizeof(short)*8-(ACC_Y_LSB__LEN+ACC_Y_MSB__LEN));
+	return comres;
+}
+
+
+/** Z-axis acceleration data readout
+	\param *a_z pointer for 16 bit 2's complement data output (LSB aligned)
+*/
+int bma020_read_accel_z(short *a_z)
+{
+	int comres;
+	unsigned char data[2];
+
+	if (p_bma020==0)
+		return E_BMA_NULL_PTR;
+
+	comres = p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, ACC_Z_LSB__REG, data, 2);
+	*a_z = BMA020_GET_BITSLICE(data[0],ACC_Z_LSB) | BMA020_GET_BITSLICE(data[1],ACC_Z_MSB)<<ACC_Z_LSB__LEN;
+	*a_z = *a_z << (sizeof(short)*8-(ACC_Z_LSB__LEN+ACC_Z_MSB__LEN));
+	*a_z = *a_z >> (sizeof(short)*8-(ACC_Z_LSB__LEN+ACC_Z_MSB__LEN));
+	return comres;
+}
+
+
+/** X,Y and Z-axis acceleration data readout
+	\param *acc pointer to \ref bma020acc_t structure for x,y,z data readout
+	\note data will be read by multi-byte protocol into a 6 byte structure
+*/
+int bma020_read_accel_xyz(bma020acc_t * acc)
+{
+	int comres;
+	unsigned char data[6];
+
+
+	if (p_bma020==0)
+		return E_BMA_NULL_PTR;
+
+	comres = p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, ACC_X_LSB__REG, &data[0],6);
+
+	acc->x = BMA020_GET_BITSLICE(data[0],ACC_X_LSB) | (BMA020_GET_BITSLICE(data[1],ACC_X_MSB)<<ACC_X_LSB__LEN);
+	acc->x = acc->x << (sizeof(short)*8-(ACC_X_LSB__LEN+ACC_X_MSB__LEN));
+	acc->x = acc->x >> (sizeof(short)*8-(ACC_X_LSB__LEN+ACC_X_MSB__LEN));
+
+	acc->y = BMA020_GET_BITSLICE(data[2],ACC_Y_LSB) | (BMA020_GET_BITSLICE(data[3],ACC_Y_MSB)<<ACC_Y_LSB__LEN);
+	acc->y = acc->y << (sizeof(short)*8-(ACC_Y_LSB__LEN + ACC_Y_MSB__LEN));
+	acc->y = acc->y >> (sizeof(short)*8-(ACC_Y_LSB__LEN + ACC_Y_MSB__LEN));
+
+
+	acc->z = BMA020_GET_BITSLICE(data[4],ACC_Z_LSB) | (BMA020_GET_BITSLICE(data[5],ACC_Z_MSB)<<ACC_Z_LSB__LEN);
+	acc->z = acc->z << (sizeof(short)*8-(ACC_Z_LSB__LEN+ACC_Z_MSB__LEN));
+	acc->z = acc->z >> (sizeof(short)*8-(ACC_Z_LSB__LEN+ACC_Z_MSB__LEN));
+
+	return comres;
+
+}
+
+
+
+/** check current interrupt status from interrupt status register in BMA020 image register
+	\param *ist pointer to interrupt status byte
+	\see BMA020_INT_STATUS_HG, BMA020_INT_STATUS_LG, BMA020_INT_STATUS_HG_LATCHED,
+	\BMA020_INT_STATUS_LG_LATCHED, BMA020_INT_STATUS_ALERT, BMA020_INT_STATUS_ST_RESULT
+*/
+int bma020_get_interrupt_status(unsigned char * ist)
+{
+
+	int comres=0;
+	if (p_bma020==0)
+		return E_BMA_NULL_PTR;
+	comres = p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, BMA020_STATUS_REG, ist, 1);
+	return comres;
+}
+
+/** enable/ disable low-g interrupt feature
+		\param onoff enable=1, disable=0
+*/
+
+int bma020_set_low_g_int(unsigned char onoff) {
+	int comres;
+	unsigned char data;
+	if(p_bma020==0)
+		return E_BMA_NULL_PTR;
+
+	comres = p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, ENABLE_LG__REG, &data, 1);
+	data = BMA020_SET_BITSLICE(data, ENABLE_LG, onoff);
+
+	comres += p_bma020->BMA020_BUS_WRITE_FUNC(p_bma020->dev_addr, ENABLE_LG__REG, &data, 1);
+
+	return comres;
+
+}
+
+/** enable/ disable high-g interrupt feature
+		\param onoff enable=1, disable=0
+*/
+
+int bma020_set_high_g_int(unsigned char onoff) {
+	int comres;
+	unsigned char data;
+	if(p_bma020==0)
+		return E_BMA_NULL_PTR;
+
+	comres = p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, ENABLE_HG__REG, &data, 1);
+	data = BMA020_SET_BITSLICE(data, ENABLE_HG, onoff);
+	comres += p_bma020->BMA020_BUS_WRITE_FUNC(p_bma020->dev_addr, ENABLE_HG__REG, &data, 1);
+
+	return comres;
+}
+
+
+
+/** enable/ disable any_motion interrupt feature
+		\param onoff enable=1, disable=0
+		\note for any_motion interrupt feature usage see also \ref bma020_set_advanced_int()
+*/
+int bma020_set_any_motion_int(unsigned char onoff) {
+	int comres;
+	unsigned char data;
+	if(p_bma020==0)
+		return E_BMA_NULL_PTR;
+	comres = p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, EN_ANY_MOTION__REG, &data, 1);
+	data = BMA020_SET_BITSLICE(data, EN_ANY_MOTION, onoff);
+	comres += p_bma020->BMA020_BUS_WRITE_FUNC(p_bma020->dev_addr, EN_ANY_MOTION__REG, &data, 1);
+
+	return comres;
+
+}
+
+/** enable/ disable alert-int interrupt feature
+		\param onoff enable=1, disable=0
+		\note for any_motion interrupt feature usage see also \ref bma020_set_advanced_int()
+*/
+int bma020_set_alert_int(unsigned char onoff) {
+	int comres;
+	unsigned char data;
+	if(p_bma020==0)
+		return E_BMA_NULL_PTR;
+
+	comres = p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, ALERT__REG, &data, 1);
+	data = BMA020_SET_BITSLICE(data, ALERT, onoff);
+
+	comres += p_bma020->BMA020_BUS_WRITE_FUNC(p_bma020->dev_addr, ALERT__REG, &data, 1);
+
+	return comres;
+
+}
+
+
+/** enable/ disable advanced interrupt feature
+		\param onoff enable=1, disable=0
+		\see bma020_set_any_motion_int()
+		\see bma020_set_alert_int()
+*/
+int bma020_set_advanced_int(unsigned char onoff) {
+	int comres;
+	unsigned char data;
+	if(p_bma020==0)
+		return E_BMA_NULL_PTR;
+	comres = p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, ENABLE_ADV_INT__REG, &data, 1);
+	data = BMA020_SET_BITSLICE(data, EN_ANY_MOTION, onoff);
+
+	comres += p_bma020->BMA020_BUS_WRITE_FUNC(p_bma020->dev_addr, ENABLE_ADV_INT__REG, &data, 1);
+
+	return comres;
+
+}
+
+/** enable/disable latched interrupt for all interrupt feature (global option)
+	\param latched (=1 for latched interrupts), (=0 for unlatched interrupts)
+*/
+
+int bma020_latch_int(unsigned char latched) {
+	int comres;
+	unsigned char data;
+	if(p_bma020==0)
+		return E_BMA_NULL_PTR;
+	comres = p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, LATCH_INT__REG, &data, 1);
+
+	#ifdef DEBUG_INFO
+	printk("read1=0x%x\n",data);
+	#endif
+	data = BMA020_SET_BITSLICE(data, LATCH_INT, latched);
+	#ifdef DEBUG_INFO
+	printk("read2=0x%x\n",data);
+	#endif
+
+	comres += p_bma020->BMA020_BUS_WRITE_FUNC(p_bma020->dev_addr, LATCH_INT__REG, &data, 1);
+
+	return comres;
+
+}
+
+
+
+/** enable/ disable new data interrupt feature
+		\param onoff enable=1, disable=0
+*/
+
+int bma020_set_new_data_int(unsigned char onoff) {
+
+//printk("bma020_set_new_data_int onoff:%d \n",onoff);
+
+	int comres;
+	unsigned char data;
+	if(p_bma020==0)
+		return E_BMA_NULL_PTR;
+
+	comres = p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, NEW_DATA_INT__REG, &data, 1);
+	data = BMA020_SET_BITSLICE(data, NEW_DATA_INT, onoff);
+	comres += p_bma020->BMA020_BUS_WRITE_FUNC(p_bma020->dev_addr, NEW_DATA_INT__REG, &data, 1);
+
+	return comres;
+
+}
+
+
+
+/** read function for raw register access
+
+		\param addr register address
+		\param *data pointer to data array for register read back
+		\param len number of bytes to be read starting from addr
+
+*/
+
+int bma020_read_reg(unsigned char addr, unsigned char *data, unsigned char len)
+{
+
+	int comres;
+	if (p_bma020==0)
+		return E_BMA_NULL_PTR;
+
+	comres = p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, addr, data, len);
+	return comres;
+
+}
+
+
+/** write function for raw register access
+		\param addr register address
+		\param *data pointer to data array for register write
+		\param len number of bytes to be written starting from addr
+*/
+int bma020_write_reg(unsigned char addr, unsigned char *data, unsigned char len)
+{
+
+	int comres;
+
+	if (p_bma020==0)
+		return E_BMA_NULL_PTR;
+
+	comres = p_bma020->BMA020_BUS_WRITE_FUNC(p_bma020->dev_addr, addr, data, len);
+
+	return comres;
+
+}
+
+
+// the new_data_int occur every 330us, CNT_MAX is adopted to reduce the sampling rate for new data int
+#define CNT_MAX   (100)
+#if 0
+static irqreturn_t  bma020_interrupt(int irq, void *dev_id)
+{
+	static int cnt=0;
+	if(p_bma020->int_kind == NORMAL_INT){
+		if(cnt >= CNT_MAX){
+			cnt=0;
+			wake_up_interruptible(&(p_bma020->int_wait));
+		}
+		else{
+			cnt++;
+		}
+		//wake_up_interruptible(&(p_bma020->int_wait));
+		bma020_reset_interrupt();
+	}
+	else if(p_bma020->int_kind == ADV_INT){
+		wake_up_interruptible(&(p_bma020->int_wait));
+	}
+	//bma020_reset_interrupt();
+//	schedule_work(&p_bma020->irq_work);
+	return IRQ_HANDLED;
+}
+
+static void bma020_irq_work(struct work_struct *work)
+{
+	/*
+	bma020_read_accel_xyz(bma020_dev.mem+cnt);
+	static int cnt=0;
+	cnt++;
+	if(cnt==2000){
+		cnt=0;
+		printk("-->%d---\n",cnt);
+	}
+	*/
+	bma020acc_t data;
+	static int cnt=0;
+	cnt++;
+	if(cnt==2000){
+		bma020_read_accel_xyz(&data);
+		printk("x=%d:  ",data.x);
+		printk("y=%d:  ",data.y);
+		printk("z=%d:  ",data.z);
+		printk("\n");
+	}
+}
+#endif
+static struct fasync_struct *async = NULL;
+
+
+static int app_fasync(int fd,struct file *filp,int mode)
+{
+	#ifdef DEBUG_INFO
+	printk("##!!## file=%s,func=%s\n",__FILE__,__FUNCTION__);
+	#endif
+	return fasync_helper(fd,filp,mode,&async);
+
+}
+
+static irqreturn_t  bma020_interrupt(int irq, void *dev_id)
+{
+
+	if(async)
+		kill_fasync(&async,SIGIO,POLL_IN);
+	#ifdef DEBUG_INFO
+	printk("##!!## file=%s,func=%s\n",__FILE__,__FUNCTION__);
+	printk("##!!## bma int fasync\n");
+	#endif
+
+//	bma020_reset_interrupt();
+
+	return IRQ_HANDLED;
+
+}
+
+//=======================================================================================
+
+
+static struct i2c_device_id bma020_idtable[]=
+{
+	{"bma020",0},
+	{},
+};
+
+struct i2c_driver bma020_driver  =
+{
+	.driver = {
+		.name		= "bma020",
+	},
+	.id_table		= bma020_idtable,
+	.probe			= bma020_i2c_probe,
+	.remove			= bma020_i2c_remove,
+};
+
+
+
+void bma020_driver_test(void)
+{
+	bma020acc_t data;
+	int tmp;
+	char s;
+
+	bma020_soft_reset();
+
+	tmp=bma020_selftest(0);
+	printk("bustest num=%d\n",tmp);
+
+	bma020_set_range(BMA020_RANGE_2G);
+	//bma020_set_range(BMA020_RANGE_8G);
+	bma020_set_mode(0);
+	bma020_set_bandwidth(BMA020_BW_25HZ);
+
+	for(;;){
+		bma020_get_range(&s);
+		printk("range:%d\n",s);
+		bma020_read_accel_xyz(&data);
+		printk("x=%d:  ",data.x);
+		printk("y=%d:  ",data.y);
+		printk("z=%d:  ",data.z);
+		printk("\n");
+		msleep(1000);
+	}
+}
+
+//static int __devinit bma020_i2c_probe(struct i2c_client *client)
+static int __devinit bma020_i2c_probe(struct i2c_client *client, const struct i2c_device_id *dev_id)
+{
+	int ret,i;
+	struct irq_desc *desc;
+
+	//printk(KERN_ALERT"probing... \n");
+	#ifdef DEBUG_INFO
+	printk("##!!## bma020_i2c_probe \n");
+	#endif
+
+	//initialize global ptr
+	g_client = client;
+
+	//make sure it's a bma020 sensor
+	bma020_detect();
+	if(p_bma020->chip_id != 0x02){
+		printk(KERN_ERR "bma020 chip id error\n");
+		return -1;
+	}
+	else 
+		printk(KERN_ALERT"bma020 detected, ID=%x\n",p_bma020->chip_id);
+
+	#ifdef DEBUG_INFO
+	printk(KERN_NOTICE "bma020 detect by i2c bus\n");
+	#endif
+
+	printk("bma020: bma020 attatch to i2c bus, addr=0x%x, chip id=0x%x \n",
+		p_bma020->dev_addr,p_bma020->chip_id);
+
+	#ifdef DEBUG_INFO
+	printk("chip id: 0x%x\n",p_bma020->chip_id);
+	printk("ml version: 0x%x\n",p_bma020->ml_version);
+	printk("al version: 0x%x\n",p_bma020->al_version);
+	#endif
+
+	//bma gpio interrupt initialization
+	//p_bma020->gpio = mfp_to_gpio(MFP_PIN_GPIO111); //JP
+	p_bma020->gpio = G_INT_PIN;      //JP
+	//g_client->irq = gpio_to_irq(p_bma020->gpio); //JP
+	g_client->irq = IRQ_DOVE_GPIO_16_23;  //JP
+
+	gpio_direction_input(p_bma020->gpio);	//set gpio pin as input
+
+	#ifdef DEBUG_INFO
+	printk("irq=%d\n",g_client->irq);
+	printk("gpio=%d\n",p_bma020->gpio);
+	#endif
+
+	//IRQF_TRIGGER_RISING, IRQF_TRIGGER_FALLING, IRQF_TRIGGER_HIGH, IRQF_TRIGGER_LOW
+	//ret = request_irq(g_client->irq, bma020_interrupt, IRQF_DISABLED | IRQF_TRIGGER_RISING,
+	//	"bma020_irq", NULL);
+	
+        ret = request_irq(g_client->irq, bma020_interrupt, IRQF_SAMPLE_RANDOM | IRQF_TRIGGER_RISING,
+              "bma020_irq", NULL);
+
+	if (ret){
+		printk(KERN_ERR "bma020 request irq failed\n");
+		goto IRQ_ERR;
+	}
+
+	/*************************for simple test**************************/
+	#ifdef DEBUG_IOCTL
+	bma020_driver_test();
+	#endif
+
+
+//	INIT_WORK(&p_bma020->irq_work, bma020_irq_work);
+//	bma020_latch_int(1);
+//	bma020_set_mode(BMA020_MODE_SLEEP);	//set to sleep mode
+
+	return 0;
+
+IRQ_ERR:
+	return ret;
+
+}
+
+static int __devexit bma020_i2c_remove(struct i2c_client *client)
+{
+	if(client->irq){
+		free_irq(client->irq, client);
+		client->irq=0;
+	}
+
+	g_client = NULL;
+	return 0;
+}
+
+
+
+
+static int i2c_bma020_init(void)
+{
+	#ifdef DEBUG_INFO
+	printk(KERN_ALERT"bma020 try attach to i2c bus.\n");
+	#endif
+
+	int ret;
+	if ( (ret = i2c_add_driver(&bma020_driver)) ) {   //JP
+	//if( ret = (i2c_register_driver(THIS_MODULE, &bma020_driver)) ){    //JP
+		printk(KERN_ERR "bma020: Driver registration failed,"
+			"module not inserted.\n");
+		return ret;
+	}
+	else
+		printk(KERN_ERR"driver registrated succussfully! ret= %d\n",ret);
+	return 0;
+}
+
+static void i2c_bma020_exit(void)
+{
+	i2c_del_driver(&bma020_driver);
+}
+
+
+//**************************application interface*************************//
+
+int app_open(struct inode *inode, struct file *filp)
+{
+
+		unsigned char data1,data2;
+
+		printk(KERN_ALERT"##!!## open entry\n");
+		bma020_set_mode(BMA020_MODE_NORMAL);	//set to normal mode
+		//printk(KERN_ALERT"111111111111\n");
+		msleep(2);		//delay for 1ms
+		//printk(KERN_ALERT"222222222222\n");
+		bma020_soft_reset();
+		//printk(KERN_ALERT"333333333333\n");
+		msleep(5);		//delay for >=1.3ms;
+		bma020_set_range(BMA020_RANGE_2G);
+		bma020_set_bandwidth(BMA020_BW_25HZ);
+			bma020_set_shadow_dis(BMA020_SHADOW_DIS_ON);	//free read sequence
+
+		//bma020_selftest(0);
+
+		//test customer reserved reg at addr CUSTOMER1_REG, CUSTOMER2_REG
+		data1=0x55;
+		data2=0xAA;
+		p_bma020->BMA020_BUS_WRITE_FUNC(p_bma020->dev_addr, CUSTOMER_RESERVED1__REG, &data1, 1);
+		p_bma020->BMA020_BUS_WRITE_FUNC(p_bma020->dev_addr, CUSTOMER_RESERVED2__REG, &data2, 1 );
+		p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, CUSTOMER_RESERVED1__REG, &data1, 1 );
+		p_bma020->BMA020_BUS_READ_FUNC(p_bma020->dev_addr, CUSTOMER_RESERVED2__REG, &data2, 1 );
+
+		if((0x55!=data1)||(0xAA!=data2)){
+			printk("bma020 open err.\n");
+			return -1;
+		}
+
+		//initialize the wait queue head
+		init_waitqueue_head(&p_bma020->int_wait);
+
+		bma020_set_mode(BMA020_MODE_NORMAL);	//set to normal mode
+		msleep(1);		//delay for 1ms
+		bma020_soft_reset();
+		printk(KERN_ALERT"bma020_soft_reset\n"); //JP
+		msleep(5);		//delay for >=1.3ms;
+
+                printk(KERN_ALERT"##!!## open quit \n");
+		return 0;
+}
+
+int app_release(struct inode *inode, struct file *filp)
+{
+//printk("##!!## release entry\n");
+		bma020_set_mode(BMA020_MODE_NORMAL);	//set to normal mode
+		msleep(1);		//delay for 1ms
+		bma020_soft_reset();
+		msleep(5);		//delay for >=1.3ms;
+		bma020_set_range(BMA020_RANGE_2G);
+		bma020_set_bandwidth(BMA020_BW_25HZ);
+		//bma020_set_shadow_dis(BMA020_SHADOW_DIS_ON);	//free read sequence
+
+		bma020_set_mode(BMA020_MODE_SLEEP);//sleep
+
+		return app_fasync(-1,filp,0);
+
+//printk("##!!## release quit\n");
+
+		return 0;
+}
+
+
+
+
+//ppos: range in [0~0x15], assign address offset in mem map of BMA020
+static ssize_t app_read(struct file *filp, char __user *buf, size_t count,loff_t *ppos)
+{
+
+	char local[0x16];
+	int i;
+	int pos=*(ppos);
+	int read_len=count;
+	int ret;
+        bma020acc_t acc_data;  //JP
+
+	if((pos>0x15L)||(pos<0))
+		return 0;
+	if((pos+read_len)>(0x16L))
+		read_len=(0x16L - pos);
+	#if 0
+	pos = 0x06;  //JP
+	ret= bma020_read_reg(pos, local, read_len);  //JP
+	#endif
+        ret = bma020_read_accel_xyz(&acc_data);   //JP
+	//printk("##%x, %x, %x\n",acc_data.x,acc_data.y,acc_data.z);
+	local[0] = (acc_data.x & 0xFF) ;
+	local[1] = (acc_data.x >> 8 & 0xFF);
+	local[2] = (acc_data.y & 0xFF) ;
+	local[3] = (acc_data.y >> 8 & 0xFF);
+	local[4] = (acc_data.z & 0xFF);
+	local[5] = (acc_data.z >> 8 & 0xFF);
+	if(copy_to_user((char*)buf,local,ret)){
+		return  -EFAULT;
+	}
+
+	return ret;
+
+}
+static ssize_t app_lseek(struct file *filp, loff_t off, int whence)
+{
+	
+}
+
+
+//arg: data format should be 'char' for 'SET_XXX' and 'char *' for 'GET_XXX'
+static int app_ioctl(struct inode *inodep, struct file *filp, unsigned int cmd, unsigned long arg)
+{
+	unsigned char val;
+	bma020acc_t acc_data;
+
+	printk(KERN_ALERT"##!!##ioctl entry\n"); //JP
+	//printk(KERN_ALERT"cmd: %d  arg: %d\n",cmd , (*(int *)arg)); //JP
+	switch (cmd)
+	{
+		case SET_RST:
+		case SET_NORMAL:
+			bma020_set_mode(BMA020_MODE_NORMAL);
+			msleep(1);		//delay for 1ms
+			//bma020_soft_reset();
+			msleep(2);		//delay for >=1.3ms
+			bma020_reset_interrupt();
+			break;
+
+		case GET_MODE://return BMA020_MODE_NORMAL, BMA020_MODE_SLEEP, BMA020_MODE_WAKE_UP
+			val=bma020_get_mode();
+			if(copy_to_user((char*)arg,&val,sizeof(val)))
+				return -EFAULT;
+			break;
+
+		case SET_SLEEP:
+			bma020_set_mode(BMA020_MODE_SLEEP);
+			break;
+
+		case SET_WAKEUP_DUR://para BMA020_WAKE_UP_PAUSE_20MS, BMA020_WAKE_UP_PAUSE_80MS,
+					//BMA020_WAKE_UP_PAUSE_320MS, BMA020_WAKE_UP_PAUSE_2560MS
+			val = (unsigned char)arg;
+			bma020_set_wake_up_pause(val);
+			break;
+
+		case SET_AUTO_WAKEUP:
+			bma020_set_mode(BMA020_MODE_WAKE_UP);
+			break;
+
+		case GET_G://return BMA020_RANGE_2G;BMA020_RANGE_4G;BMA020_RANGE_8G
+			bma020_get_range(&val);
+			printk(KERN_ALERT"get range: %x \n", val); //JP
+			if(copy_to_user((char*)arg,&val,sizeof(val)))
+				return -EFAULT;
+			break;
+
+		case SET_G://para BMA020_RANGE_2G;BMA020_RANGE_4G;BMA020_RANGE_8G
+			val = (unsigned char)arg;
+			bma020_set_range(val);
+			break;
+
+		case SET_BANDWIDTH:
+			val = (unsigned char)arg;
+			bma020_set_bandwidth(val);
+			break;
+
+		case GET_BANDWIDTH:
+			bma020_get_bandwidth(&val);
+			if(copy_to_user((char*)arg,&val,sizeof(val)))
+				return -EFAULT;
+			break;
+
+		case GET_WAKEUP_DUR://BMA020_WAKE_UP_PAUSE_20MS, BMA020_WAKE_UP_PAUSE_80MS,
+					//BMA020_WAKE_UP_PAUSE_320MS, BMA020_WAKE_UP_PAUSE_2560MS
+			bma020_get_wake_up_pause(&val);
+			if(copy_to_user((char*)arg,&val,sizeof(val)))
+				return -EFAULT;
+			break;
+
+		case SET_LOW_G_THRESHOULD://ref to BMA020_LG_THRES_IN_G()
+			val = (unsigned char)arg;
+			#ifdef DEBUG_INFO
+			printk("##!!## low g thr= %d \n",val);
+			#endif
+			bma020_set_low_g_threshold(val);
+			break;
+
+		case GET_LOW_G_THRESHOULD://
+			bma020_get_low_g_threshold(&val);
+			if(copy_to_user((char*)arg,&val,sizeof(val)))
+				return -EFAULT;
+			break;
+
+		case SET_LOW_G_COUNTDOWN:
+			val = (unsigned char)arg;
+			bma020_set_low_g_countdown(val);
+			break;
+
+		case GET_LOW_G_COUNTDOWN:
+			bma020_get_low_g_countdown(&val);
+			if(copy_to_user((char*)arg,&val,sizeof(val)))
+				return -EFAULT;
+			break;
+
+
+		case SET_LOW_G_DUR:
+			val = (unsigned char)arg;
+			bma020_set_low_g_duration(val);
+			break;
+
+		case GET_LOW_G_DUR:
+			bma020_get_low_g_duration(&val);
+			if(copy_to_user((char*)arg,&val,sizeof(val)))
+				return -EFAULT;
+			break;
+
+		case SET_HIGH_G_DUR:
+			val = (unsigned char)arg;
+			bma020_set_high_g_duration(val);
+			break;
+
+		case GET_HIGH_G_DUR:
+			bma020_get_high_g_duration(&val);
+			if(copy_to_user((char*)arg,&val,sizeof(val)))
+				return -EFAULT;
+			break;
+
+		case SET_HIGH_G_THRESHOULD://BMA020_HG_THRES_IN_G()
+			val = (unsigned char)arg;
+			#ifdef DEBUG_INFO
+			printk("##!!## high g thr= %d \n",val);
+			#endif
+			bma020_set_high_g_threshold(val);
+			break;
+
+		case GET_HIGH_G_THRESHOULD:
+			bma020_get_high_g_threshold(&val);
+			if(copy_to_user((char*)arg,&val,sizeof(val)))
+				return -EFAULT;
+			break;
+
+		case SET_HIGH_G_COUNTDOWN:
+			val = (unsigned char)arg;
+			bma020_set_high_g_countdown(val);
+			break;
+
+		case GET_HIGH_G_COUNTDOWN:
+			bma020_get_high_g_countdown(&val);
+			if(copy_to_user((char*)arg,&val,sizeof(val)))
+				return -EFAULT;
+			break;
+
+		case SET_HIGH_G_HYST:
+			val = (unsigned char)arg;
+			bma020_set_high_g_hyst(val);
+			break;
+		case SET_LOW_G_HYST:
+			val = (unsigned char)arg;
+			bma020_set_low_g_hyst(val);
+			break;
+
+		case SET_ANY_MOTION_THRESHOULD://BMA020_ANY_MOTION_THRES_IN_G()
+			val = (unsigned char)arg;
+			bma020_set_any_motion_threshold(val);
+			break;
+
+		case GET_ANY_MOTION_THRESHOULD://BMA020_ANY_MOTION_THRES_IN_G()
+			bma020_get_any_motion_threshold(&val);
+			if(copy_to_user((char*)arg,&val,sizeof(val)))
+				return -EFAULT;
+			break;
+
+		case SET_ANY_MOTION_COUNT://BMA020_ANY_MOTION_DUR_1, BMA020_ANY_MOTION_DUR_3,
+						//BMA020_ANY_MOTION_DUR_5, BMA020_ANY_MOTION_DUR_7
+			val = (unsigned char)arg;
+			bma020_set_any_motion_count(val);
+			break;
+
+		case GET_ANY_MOTION_COUNT://BMA020_ANY_MOTION_DUR_1, BMA020_ANY_MOTION_DUR_3,
+						//BMA020_ANY_MOTION_DUR_5, BMA020_ANY_MOTION_DUR_7
+			bma020_get_any_motion_count(&val);
+			if(copy_to_user((char*)arg,&val,sizeof(val)))
+				return -EFAULT;
+			break;
+
+		/*
+		case SET_INTERRUPT_MASK://BMA020_INT_ALERT, BMA020_INT_ANY_MOTION, BMA020_INT_EN_ADV_INT,
+					//BMA020_INT_NEW_DATA, BMA020_INT_LATCH, BMA020_INT_HG, BMA020_INT_LG
+			val = (unsigned char)arg;
+			bma020_set_interrupt_mask(val);
+			break;
+
+		case GET_INTERRUPT_MASK://BMA020_INT_ALERT, BMA020_INT_ANY_MOTION, BMA020_INT_EN_ADV_INT,
+					//BMA020_INT_NEW_DATA, BMA020_INT_LATCH, BMA020_INT_HG, BMA020_INT_LG
+			bma020_get_interrupt_mask(&val);
+			if(copy_to_user((char*)arg,&val,sizeof(val)))
+				return -EFAULT;
+			break;
+		*/
+
+		case RESET_INT://resets the BMA020 interrupt status, can be used to reset a latched interrupt
+			bma020_reset_interrupt();
+			break;
+
+		case READ_ACCEL_XYZ:// X,Y and Z-axis acceleration data readout, ref bma020acc_t structure for x,y,z data readout
+			bma020_read_accel_xyz(&acc_data);
+			//debug
+			/*
+			printk("x=%d:  ",acc_data.x);
+			printk("y=%d:  ",acc_data.y);
+			printk("z=%d:  ",acc_data.z);
+			printk("\n");
+			*/
+			if(copy_to_user((char *)arg, &acc_data, sizeof(acc_data)))
+				return -EFAULT;
+			break;
+
+		case GET_INT_STATUS://BMA020_INT_STATUS_HG, BMA020_INT_STATUS_LG, BMA020_INT_STATUS_HG_LATCHED,
+					//BMA020_INT_STATUS_LG_LATCHED, BMA020_INT_STATUS_ALERT, BMA020_INT_STATUS_ST_RESULT
+			bma020_get_interrupt_status(&val);
+			if(copy_to_user((char*)arg,&val,sizeof(val)))
+				return -EFAULT;
+			break;
+
+		case SET_LOW_G_INT://param onoff, enable=1, disable=0
+			val = (unsigned char)arg;
+			bma020_set_low_g_int(val);
+			break;
+
+		case SET_HIGH_G_INT://param onoff enable=1, disable=0
+			val = (unsigned char)arg;
+			bma020_set_high_g_int(val) ;
+			break;
+
+		case SET_ANY_MOTION_INT://param onoff enable=1, disable=0
+			val = (unsigned char)arg;
+			bma020_set_any_motion_int(val);
+			break;
+
+		case SET_ADVANCED_INT://param onoff enable=1, disable=0
+			val = (unsigned char)arg;
+			bma020_set_advanced_int(val) ;
+			break;
+
+		case LATCH_INT://param latched (=1 for latched interrupts), (=0 for unlatched interrupts)
+			val = (unsigned char)arg;
+			bma020_latch_int(val) ;
+			break;
+
+		case SET_NEW_DATA_INT://param onoff enable=1, disable=0
+			val = (unsigned char)arg;
+			bma020_set_new_data_int(val);
+			break;
+
+		case WAIT_FOR_INT:
+
+			interruptible_sleep_on(&(p_bma020->int_wait));
+
+			if(signal_pending(current))
+				return -ERESTARTSYS;
+			bma020_read_accel_xyz(&acc_data);
+			if(copy_to_user((char *)arg, &acc_data, sizeof(acc_data)))
+				return -EFAULT;
+			//debug
+			/*
+			printk("x=%d:  ",acc_data.x);
+			printk("y=%d:  ",acc_data.y);
+			printk("z=%d:  ",acc_data.z);
+			printk("\n");
+			*/
+			break;
+
+		default:
+			return  - EINVAL;
+	}
+//printk("##!!##ioctl quit\n");
+	return 0;
+}
+
+
+/*************************************************************/
+#ifdef INPUT_POLL
+static void bma020_idev_poll(struct input_polled_dev *dev)
+{
+	bma020acc_t acc_data;
+	struct input_dev *idev;
+
+	mutex_lock(&bma020_lock);
+
+	idev=dev->input;
+
+	bma020_read_accel_xyz(&acc_data);
+
+	//debug
+	#ifdef DEBUG_INPUT_POLL
+	printk("x=%d:  ",acc_data.x);
+	printk("y=%d:  ",acc_data.y);
+	printk("z=%d:  ",acc_data.z);
+	printk("\n");
+	#endif
+
+	input_report_rel(idev, REL_X, acc_data.x);
+	input_report_rel(idev, REL_Y, acc_data.y);
+	input_report_rel(idev, REL_Z, acc_data.z);
+	input_sync(idev);
+
+	mutex_unlock(&bma020_lock);
+
+}
+#endif
+
+
+#define BMA020_POLL_INTERVAL 200  //msec
+
+
+//***************************cdev register****************************//
+static const struct file_operations app_fops =
+{
+	  .owner = THIS_MODULE,
+	  .read = app_read,
+	  //.write=,
+	  .ioctl = app_ioctl,
+	  //.poll = ,
+	  .open = app_open,
+	  .release = app_release,
+	  .fasync = app_fasync,
+};
+
+
+static int register_as_cdev(void)//return 0 for success
+{
+	int ret,devno;
+
+	p_bma020->app_major=55;		//major dev no.
+
+	//apply for dev no.
+	devno = MKDEV(p_bma020->app_major, 0);
+	ret = register_chrdev_region(devno, 1, "bma020_device");//
+
+	#if 0
+	if (p_bma020->app_major ){
+		devno = MKDEV(p_bma020->app_major, 0);
+		ret = register_chrdev_region(devno, 1, "bma020_device");
+	}
+	else {
+		ret = alloc_chrdev_region(&devno, 0, 1, "bma020_device");
+		p_bma020->app_major = MAJOR(devno);
+	}
+	#endif
+
+	if (ret < 0){
+		printk(KERN_ERR "Failed to register bma020 cdev.\n");
+		goto ERROR0;
+	}
+	printk(KERN_ALERT"register bma cdev, major: %d \n",p_bma020->app_major);
+
+	cdev_init(&(p_bma020->bma_cdev), &app_fops);
+	p_bma020->bma_cdev.owner = THIS_MODULE;
+
+	ret = cdev_add(&(p_bma020->bma_cdev), devno, 1);//
+	if (ret){
+		printk(KERN_ERR "Error cdev bma020 added\n");
+		goto ERROR1;
+	}
+
+	return 0;
+ERROR1:
+	unregister_chrdev_region(MKDEV(p_bma020->app_major, 0), 1);
+ERROR0:
+	return ret;
+}
+
+static void unregister_as_cdev(void)
+{
+	cdev_del(&(p_bma020->bma_cdev));
+	unregister_chrdev_region(MKDEV(p_bma020->app_major, 0), 1);
+	printk(KERN_ALERT"Driver unregistered!\n");
+}
+#ifdef INPUT_POLL
+static int register_as_hwmon(void)
+{
+	struct input_dev *idev;
+	int ret;
+
+	//register input poll dev
+
+	p_bma020->bma020_idev = input_allocate_polled_device();//
+	if (!(p_bma020->bma020_idev)) {
+		ret = -ENOMEM;
+		goto ERROR2;
+	}
+
+	p_bma020->bma020_idev->poll = bma020_idev_poll;
+	p_bma020->bma020_idev->poll_interval = BMA020_POLL_INTERVAL;
+
+	/* initialize the input device */
+	idev=p_bma020->bma020_idev->input;
+	idev->name = "bma020_input";
+	idev->phys = "bma020/input0";
+	idev->dev.parent = & g_client->dev;
+
+	idev->id.bustype = BUS_HOST;
+
+	input_set_capability(idev, EV_REL, REL_X);
+	input_set_capability(idev, EV_REL, REL_Y);
+	input_set_capability(idev, EV_REL, REL_Z);
+
+	ret = input_register_polled_device(p_bma020->bma020_idev);//
+
+	if (ret)
+		goto ERROR3;
+
+	//initialize sensor to normal operation mode
+	bma020_set_mode(BMA020_MODE_NORMAL);	//set to normal mode
+	msleep(2);		//delay for 1ms
+	bma020_soft_reset();
+	msleep(2);		//delay for >=1.3ms;
+	bma020_set_range(BMA020_RANGE_2G);
+	bma020_set_bandwidth(BMA020_BW_25HZ);
+	bma020_set_shadow_dis(BMA020_SHADOW_DIS_ON);	//free read sequence
+
+	return 0;
+
+ERROR3:
+	 input_free_polled_device(p_bma020->bma020_idev);
+ERROR2:
+	return ret;
+
+}
+#endif
+
+void unregister_as_hwmon(void)
+{
+	input_unregister_polled_device(p_bma020->bma020_idev);
+	input_free_polled_device(p_bma020->bma020_idev);
+}
+
+
+
+
+static int __init app_init(void)
+{
+	int ret;
+	bma020_t *new_bma020=NULL;
+
+	printk(KERN_ALERT"ima020 init..... \n");
+	//*****************initialize bma020 device*******************
+	new_bma020 = kzalloc(sizeof(bma020_t), GFP_KERNEL );
+
+	if ( !new_bma020 )  {
+		printk(KERN_ALERT"Failed to allocate bma020 device.\n");
+		ret = -ENOMEM;
+		goto ERROR0;
+	}
+	//initialize global ptr
+	p_bma020=new_bma020;
+
+	//===================================================
+#ifndef INPUT_POLL
+	//register as char device, combine file_operations
+	ret = register_as_cdev();//
+	if(ret)
+		goto ERROR1;
+	else
+		printk(KERN_ALERT"register as cdev\n");
+#endif
+	//attach to i2c bus
+	ret = i2c_bma020_init();//
+	if(ret){
+	#ifdef INPUT_POLL
+		goto ERROR1;
+	#else
+		goto ERROR2;
+	#endif
+	}
+	printk(KERN_ALERT"All inited\n");
+#ifdef INPUT_POLL
+	//register as input hardware monitor device, create input poll event
+	ret = register_as_hwmon();//
+	if(ret)
+		goto ERROR3;
+#endif
+
+	return 0;
+
+#ifdef INPUT_POLL
+ERROR3:
+	i2c_bma020_exit();
+#endif
+
+#ifndef INPUT_POLL
+ERROR2:
+	unregister_as_cdev();
+#endif
+
+ERROR1:
+	kfree(new_bma020);
+
+ERROR0:
+	p_bma020=NULL;
+	return ret;
+
+}
+
+static void __exit  app_exit(void)
+{
+#ifdef INPUT_POLL
+	unregister_as_hwmon();
+#endif
+	i2c_bma020_exit();
+#ifndef INPUT_POLL
+	unregister_as_cdev();
+#endif
+	kfree(p_bma020);
+	p_bma020=NULL;
+}
+
+
+
+module_init(app_init);
+module_exit(app_exit);
+
+MODULE_DESCRIPTION("BMA020 I2C Client driver");
+MODULE_LICENSE("GPL");
+
+
--- linux-mvl-dove-2.6.32.orig/drivers/hwmon/bma020/Makefile
+++ linux-mvl-dove-2.6.32/drivers/hwmon/bma020/Makefile
@@ -0,0 +1,13 @@
+#
+# Makefile for sensor chip drivers.
+#
+
+
+#obj-n	+= bma020.o
+obj-$(CONFIG_BMA020)	+= bma020_fs.o
+#obj-$(CONFIG_BMA020)   += bma020.o
+
+
+
+
+
--- linux-mvl-dove-2.6.32.orig/drivers/hid/hid-input.c
+++ linux-mvl-dove-2.6.32/drivers/hid/hid-input.c
@@ -193,12 +193,17 @@
 		break;
 
 	case HID_UP_BUTTON:
-		code = ((usage->hid - 1) & 0xf);
+		code = ((usage->hid - 1) & HID_USAGE);
 
 		switch (field->application) {
 		case HID_GD_MOUSE:
 		case HID_GD_POINTER:  code += 0x110; break;
-		case HID_GD_JOYSTICK: code += 0x120; break;
+		case HID_GD_JOYSTICK:
+				      if (code <= 0xf)
+					      code += BTN_JOYSTICK;
+				      else
+					      code += BTN_TRIGGER_HAPPY;
+				      break;
 		case HID_GD_GAMEPAD:  code += 0x130; break;
 		default:
 			switch (field->physical) {
--- linux-mvl-dove-2.6.32.orig/drivers/hid/hid-cypress.c
+++ linux-mvl-dove-2.6.32/drivers/hid/hid-cypress.c
@@ -126,6 +126,8 @@
 		.driver_data = CP_RDESC_SWAPPED_MIN_MAX },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_CYPRESS, USB_DEVICE_ID_CYPRESS_BARCODE_2),
 		.driver_data = CP_RDESC_SWAPPED_MIN_MAX },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_CYPRESS, USB_DEVICE_ID_CYPRESS_BARCODE_3),
+		.driver_data = CP_RDESC_SWAPPED_MIN_MAX },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_CYPRESS, USB_DEVICE_ID_CYPRESS_MOUSE),
 		.driver_data = CP_2WHEEL_MOUSE_HACK },
 	{ }
--- linux-mvl-dove-2.6.32.orig/drivers/hid/hid-quanta.c
+++ linux-mvl-dove-2.6.32/drivers/hid/hid-quanta.c
@@ -0,0 +1,260 @@
+/*
+ *  HID driver for Quanta Optical Touch dual-touch panels
+ *
+ *  Copyright (c) 2009-2010 Stephane Chatty <chatty@enac.fr>
+ *
+ */
+
+/*
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ */
+
+#include <linux/device.h>
+#include <linux/hid.h>
+#include <linux/module.h>
+
+MODULE_AUTHOR("Stephane Chatty <chatty@enac.fr>");
+MODULE_DESCRIPTION("Quanta dual-touch panel");
+MODULE_LICENSE("GPL");
+
+#include "hid-ids.h"
+
+struct quanta_data {
+	__u16 x, y;
+	__u8 id;
+	bool valid;		/* valid finger data, or just placeholder? */
+	bool first;		/* is this the first finger in this frame? */
+	bool activity_now;	/* at least one active finger in this frame? */
+	bool activity;		/* at least one active finger previously? */
+};
+
+static int quanta_input_mapping(struct hid_device *hdev, struct hid_input *hi,
+		struct hid_field *field, struct hid_usage *usage,
+		unsigned long **bit, int *max)
+{
+	switch (usage->hid & HID_USAGE_PAGE) {
+
+	case HID_UP_GENDESK:
+		switch (usage->hid) {
+		case HID_GD_X:
+			hid_map_usage(hi, usage, bit, max,
+					EV_ABS, ABS_MT_POSITION_X);
+			/* touchscreen emulation */
+			input_set_abs_params(hi->input, ABS_X,
+						field->logical_minimum,
+						field->logical_maximum, 0, 0);
+			return 1;
+		case HID_GD_Y:
+			hid_map_usage(hi, usage, bit, max,
+					EV_ABS, ABS_MT_POSITION_Y);
+			/* touchscreen emulation */
+			input_set_abs_params(hi->input, ABS_Y,
+						field->logical_minimum,
+						field->logical_maximum, 0, 0);
+			return 1;
+		}
+		return 0;
+
+	case HID_UP_DIGITIZER:
+		switch (usage->hid) {
+		case HID_DG_CONFIDENCE:
+		case HID_DG_TIPSWITCH:
+		case HID_DG_INPUTMODE:
+		case HID_DG_DEVICEINDEX:
+		case HID_DG_CONTACTCOUNT:
+		case HID_DG_CONTACTMAX:
+		case HID_DG_TIPPRESSURE:
+		case HID_DG_WIDTH:
+		case HID_DG_HEIGHT:
+			return -1;
+		case HID_DG_INRANGE:
+			/* touchscreen emulation */
+			hid_map_usage(hi, usage, bit, max, EV_KEY, BTN_TOUCH);
+			return 1;
+		case HID_DG_CONTACTID:
+			hid_map_usage(hi, usage, bit, max,
+					EV_ABS, ABS_MT_TRACKING_ID);
+			return 1;
+		}
+		return 0;
+
+	case 0xff000000:
+		/* ignore vendor-specific features */
+		return -1;
+	}
+
+	return 0;
+}
+
+static int quanta_input_mapped(struct hid_device *hdev, struct hid_input *hi,
+		struct hid_field *field, struct hid_usage *usage,
+		unsigned long **bit, int *max)
+{
+	if (usage->type == EV_KEY || usage->type == EV_ABS)
+		clear_bit(usage->code, *bit);
+
+	return 0;
+}
+
+/*
+ * this function is called when a whole finger has been parsed,
+ * so that it can decide what to send to the input layer.
+ */
+static void quanta_filter_event(struct quanta_data *td, struct input_dev *input)
+{
+	
+	td->first = !td->first; /* touchscreen emulation */
+
+	if (!td->valid) {
+		/*
+		 * touchscreen emulation: if no finger in this frame is valid
+		 * and there previously was finger activity, this is a release
+		 */ 
+		if (!td->first && !td->activity_now && td->activity) {
+			input_event(input, EV_KEY, BTN_TOUCH, 0);
+			td->activity = false;
+		}
+		return;
+	}
+
+	input_event(input, EV_ABS, ABS_MT_TRACKING_ID, td->id);
+	input_event(input, EV_ABS, ABS_MT_POSITION_X, td->x);
+	input_event(input, EV_ABS, ABS_MT_POSITION_Y, td->y);
+
+	input_mt_sync(input);
+	td->valid = false;
+
+	/* touchscreen emulation: if first active finger in this frame... */
+	if (!td->activity_now) {
+		/* if there was no previous activity, emit touch event */
+		if (!td->activity) {
+			input_event(input, EV_KEY, BTN_TOUCH, 1);
+			td->activity = true;
+		}
+		td->activity_now = true;
+		/* and in any case this is our preferred finger */
+		input_event(input, EV_ABS, ABS_X, td->x);
+		input_event(input, EV_ABS, ABS_Y, td->y);
+	}
+}
+
+
+static int quanta_event(struct hid_device *hid, struct hid_field *field,
+				struct hid_usage *usage, __s32 value)
+{
+	struct quanta_data *td = hid_get_drvdata(hid);
+
+	if (hid->claimed & HID_CLAIMED_INPUT) {
+		struct input_dev *input = field->hidinput->input;
+
+		switch (usage->hid) {
+		case HID_DG_INRANGE:
+			td->valid = !!value;
+			break;
+		case HID_GD_X:
+			td->x = value;
+			break;
+		case HID_GD_Y:
+			td->y = value;
+			quanta_filter_event(td, input);
+			break;
+		case HID_DG_CONTACTID:
+			td->id = value;
+			break;
+		case HID_DG_CONTACTCOUNT:
+			/* touch emulation: this is the last field in a frame */
+			td->first = false;
+			td->activity_now = false;
+			break;
+		case HID_DG_CONFIDENCE:
+		case HID_DG_TIPSWITCH:
+			/* avoid interference from generic hidinput handling */
+			break;
+
+		default:
+			/* fallback to the generic hidinput handling */
+			return 0;
+		}
+	}
+
+	/* we have handled the hidinput part, now remains hiddev */
+	if (hid->claimed & HID_CLAIMED_HIDDEV && hid->hiddev_hid_event)
+		hid->hiddev_hid_event(hid, field, usage, value);
+
+	return 1;
+}
+
+static int quanta_probe(struct hid_device *hdev, const struct hid_device_id *id)
+{
+	int ret;
+	struct quanta_data *td;
+
+	td = kmalloc(sizeof(struct quanta_data), GFP_KERNEL);
+	if (!td) {
+		dev_err(&hdev->dev, "cannot allocate Quanta Touch data\n");
+		return -ENOMEM;
+	}
+	td->valid = false;
+	td->activity = false;
+	td->activity_now = false;
+	td->first = false;
+	hid_set_drvdata(hdev, td);
+
+	ret = hid_parse(hdev);
+	if (!ret)
+		ret = hid_hw_start(hdev, HID_CONNECT_DEFAULT);
+
+	if (ret)
+		kfree(td);
+
+	return ret;
+}
+
+static void quanta_remove(struct hid_device *hdev)
+{
+	hid_hw_stop(hdev);
+	kfree(hid_get_drvdata(hdev));
+	hid_set_drvdata(hdev, NULL);
+}
+
+static const struct hid_device_id quanta_devices[] = {
+	{ HID_USB_DEVICE(USB_VENDOR_ID_QUANTA,
+			USB_DEVICE_ID_QUANTA_OPTICAL_TOUCH) },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_QUANTA,
+			USB_DEVICE_ID_PIXART_IMAGING_INC_OPTICAL_TOUCH_SCREEN) },
+	{ }
+};
+MODULE_DEVICE_TABLE(hid, quanta_devices);
+
+static const struct hid_usage_id quanta_grabbed_usages[] = {
+	{ HID_ANY_ID, HID_ANY_ID, HID_ANY_ID },
+	{ HID_ANY_ID - 1, HID_ANY_ID - 1, HID_ANY_ID - 1}
+};
+
+static struct hid_driver quanta_driver = {
+	.name = "quanta-touch",
+	.id_table = quanta_devices,
+	.probe = quanta_probe,
+	.remove = quanta_remove,
+	.input_mapping = quanta_input_mapping,
+	.input_mapped = quanta_input_mapped,
+	.usage_table = quanta_grabbed_usages,
+	.event = quanta_event,
+};
+
+static int __init quanta_init(void)
+{
+	return hid_register_driver(&quanta_driver);
+}
+
+static void __exit quanta_exit(void)
+{
+	hid_unregister_driver(&quanta_driver);
+}
+
+module_init(quanta_init);
+module_exit(quanta_exit);
+
--- linux-mvl-dove-2.6.32.orig/drivers/hid/hid-ntrig.c
+++ linux-mvl-dove-2.6.32/drivers/hid/hid-ntrig.c
@@ -1,8 +1,8 @@
 /*
  *  HID driver for N-Trig touchscreens
  *
- *  Copyright (c) 2008 Rafi Rubin
- *  Copyright (c) 2009 Stephane Chatty
+ *  Copyright (c) 2008-2010 Rafi Rubin
+ *  Copyright (c) 2009-2010 Stephane Chatty
  *
  */
 
@@ -15,21 +15,27 @@
 
 #include <linux/device.h>
 #include <linux/hid.h>
+#include <linux/usb.h>
+#include "usbhid/usbhid.h"
 #include <linux/module.h>
 
 #include "hid-ids.h"
 
 #define NTRIG_DUPLICATE_USAGES	0x001
 
-#define nt_map_key_clear(c)	hid_map_usage_clear(hi, usage, bit, max, \
-					EV_KEY, (c))
-
 struct ntrig_data {
-	__s32 x, y, id, w, h;
-	char reading_a_point, found_contact_id;
-	char pen_active;
-	char finger_active;
-	char inverted;
+	/* Incoming raw values for a single contact */
+	__u16 x, y, w, h;
+	__u16 id;
+
+	bool tipswitch;
+	bool confidence;
+	bool first_contact_touch;
+
+	bool reading_mt;
+
+	__u8 mt_footer[4];
+	__u8 mt_foot_count;
 };
 
 /*
@@ -42,8 +48,11 @@
 		struct hid_field *field, struct hid_usage *usage,
 		unsigned long **bit, int *max)
 {
-	switch (usage->hid & HID_USAGE_PAGE) {
+	/* No special mappings needed for the pen and single touch */
+	if (field->physical)
+		return 0;
 
+	switch (usage->hid & HID_USAGE_PAGE) {
 	case HID_UP_GENDESK:
 		switch (usage->hid) {
 		case HID_GD_X:
@@ -66,18 +75,12 @@
 	case HID_UP_DIGITIZER:
 		switch (usage->hid) {
 		/* we do not want to map these for now */
-		case HID_DG_CONTACTID: /* value is useless */
+		case HID_DG_CONTACTID: /* Not trustworthy, squelch for now */
 		case HID_DG_INPUTMODE:
 		case HID_DG_DEVICEINDEX:
-		case HID_DG_CONTACTCOUNT:
 		case HID_DG_CONTACTMAX:
 			return -1;
 
-		/* original mapping by Rafi Rubin */
-		case HID_DG_CONFIDENCE:
-			nt_map_key_clear(BTN_TOOL_DOUBLETAP);
-			return 1;
-
 		/* width/height mapped on TouchMajor/TouchMinor/Orientation */
 		case HID_DG_WIDTH:
 			hid_map_usage(hi, usage, bit, max,
@@ -104,6 +107,10 @@
 		struct hid_field *field, struct hid_usage *usage,
 		unsigned long **bit, int *max)
 {
+	/* No special mappings needed for the pen and single touch */
+	if (field->physical)
+		return 0;
+
 	if (usage->type == EV_KEY || usage->type == EV_REL
 			|| usage->type == EV_ABS)
 		clear_bit(usage->code, *bit);
@@ -123,31 +130,34 @@
 	struct input_dev *input = field->hidinput->input;
 	struct ntrig_data *nd = hid_get_drvdata(hid);
 
+	/* No special handling needed for the pen */
+	if (field->application == HID_DG_PEN)
+		return 0;
+
         if (hid->claimed & HID_CLAIMED_INPUT) {
 		switch (usage->hid) {
-
-		case HID_DG_INRANGE:
-			if (field->application & 0x3)
-				nd->pen_active = (value != 0);
-			else
-				nd->finger_active = (value != 0);
-			return 0;
-
-		case HID_DG_INVERT:
-			nd->inverted = value;
-			return 0;
-
+		case 0xff000001:
+			/* Tag indicating the start of a multitouch group */
+			nd->reading_mt = 1;
+			nd->first_contact_touch = 0;
+			break;
+		case HID_DG_TIPSWITCH:
+			nd->tipswitch = value;
+			/* Prevent emission of touch until validated */
+			return 1;
+		case HID_DG_CONFIDENCE:
+			nd->confidence = value;
+			break;
 		case HID_GD_X:
 			nd->x = value;
-			nd->reading_a_point = 1;
+			/* Clear the contact footer */
+			nd->mt_foot_count = 0;
 			break;
 		case HID_GD_Y:
 			nd->y = value;
 			break;
 		case HID_DG_CONTACTID:
 			nd->id = value;
-			/* we receive this only when in multitouch mode */
-			nd->found_contact_id = 1;
 			break;
 		case HID_DG_WIDTH:
 			nd->w = value;
@@ -159,33 +169,17 @@
 			 * report received in a finger event. We want
 			 * to emit a normal (X, Y) position
 			 */
-			if (!nd->found_contact_id) {
-				if (nd->pen_active && nd->finger_active) {
-					input_report_key(input, BTN_TOOL_DOUBLETAP, 0);
-					input_report_key(input, BTN_TOOL_DOUBLETAP, 1);
-				}
-				input_event(input, EV_ABS, ABS_X, nd->x);
-				input_event(input, EV_ABS, ABS_Y, nd->y);
-			}
-			break;
-		case HID_DG_TIPPRESSURE:
-			/*
-			 * when in single touch mode, this is the last
-			 * report received in a pen event. We want
-			 * to emit a normal (X, Y) position
-			 */
-			if (! nd->found_contact_id) {
-				if (nd->pen_active && nd->finger_active) {
-					input_report_key(input,
-							nd->inverted ? BTN_TOOL_RUBBER : BTN_TOOL_PEN
-							, 0);
-					input_report_key(input,
-							nd->inverted ? BTN_TOOL_RUBBER : BTN_TOOL_PEN
-							, 1);
-				}
+			if (!nd->reading_mt) {
+				/*
+				 * TipSwitch indicates the presence of a
+				 * finger in single touch mode.
+				 */
+				input_report_key(input, BTN_TOUCH,
+						 nd->tipswitch);
+				input_report_key(input, BTN_TOOL_DOUBLETAP,
+						 nd->tipswitch);
 				input_event(input, EV_ABS, ABS_X, nd->x);
 				input_event(input, EV_ABS, ABS_Y, nd->y);
-				input_event(input, EV_ABS, ABS_PRESSURE, value);
 			}
 			break;
 		case 0xff000002:
@@ -195,10 +189,40 @@
 			 * this usage tells if the contact point is real
 			 * or a placeholder
 			 */
-			if (!nd->reading_a_point || value != 1)
+
+			/* Shouldn't get more than 4 footer packets, so skip */
+			if (nd->mt_foot_count >= 4)
 				break;
+
+			nd->mt_footer[nd->mt_foot_count++] = value;
+
+			/* if the footer isn't complete break */
+			if (nd->mt_foot_count != 4)
+				break;
+
+			/* Pen activity signal, trigger end of touch. */
+			if (nd->mt_footer[2]) {
+				nd->confidence = 0;
+				break;
+			}
+
+			/* If the contact was invalid */
+			if (!(nd->confidence && nd->mt_footer[0])
+					|| nd->w <= 250
+					|| nd->h <= 190) {
+				nd->confidence = 0;
+				break;
+			}
+
 			/* emit a normal (X, Y) for the first point only */
 			if (nd->id == 0) {
+				/*
+				 * TipSwitch is superfluous in multitouch
+				 * mode.  The footer events tell us
+				 * if there is a finger on the screen or
+				 * not.
+				 */
+				nd->first_contact_touch = nd->confidence;
 				input_event(input, EV_ABS, ABS_X, nd->x);
 				input_event(input, EV_ABS, ABS_Y, nd->y);
 			}
@@ -220,8 +244,21 @@
 						ABS_MT_TOUCH_MINOR, nd->w);
 			}
 			input_mt_sync(field->hidinput->input);
-			nd->reading_a_point = 0;
-			nd->found_contact_id = 0;
+			break;
+
+		case HID_DG_CONTACTCOUNT: /* End of a multitouch group */
+			if (!nd->reading_mt)
+				break;
+
+			nd->reading_mt = 0;
+
+			if (nd->first_contact_touch) {
+				input_report_key(input, BTN_TOOL_DOUBLETAP, 1);
+				input_report_key(input, BTN_TOUCH, 1);
+			} else {
+				input_report_key(input, BTN_TOOL_DOUBLETAP, 0);
+				input_report_key(input, BTN_TOUCH, 0);
+			}
 			break;
 
 		default:
@@ -231,8 +268,8 @@
 	}
 
 	/* we have handled the hidinput part, now remains hiddev */
-        if (hid->claimed & HID_CLAIMED_HIDDEV && hid->hiddev_hid_event)
-                hid->hiddev_hid_event(hid, field, usage, value);
+	if ((hid->claimed & HID_CLAIMED_HIDDEV) && hid->hiddev_hid_event)
+		hid->hiddev_hid_event(hid, field, usage, value);
 
 	return 1;
 }
@@ -241,23 +278,75 @@
 {
 	int ret;
 	struct ntrig_data *nd;
+	struct hid_input *hidinput;
+	struct input_dev *input;
+	struct hid_report *report;
+
+	if (id->driver_data)
+		hdev->quirks |= HID_QUIRK_MULTI_INPUT;
 
 	nd = kmalloc(sizeof(struct ntrig_data), GFP_KERNEL);
 	if (!nd) {
 		dev_err(&hdev->dev, "cannot allocate N-Trig data\n");
 		return -ENOMEM;
 	}
-	nd->reading_a_point = 0;
-	nd->found_contact_id = 0;
+
+	nd->reading_mt = 0;
 	hid_set_drvdata(hdev, nd);
 
 	ret = hid_parse(hdev);
-	if (!ret)
-		ret = hid_hw_start(hdev, HID_CONNECT_DEFAULT);
+	if (ret) {
+		dev_err(&hdev->dev, "parse failed\n");
+		goto err_free;
+	}
+
+	ret = hid_hw_start(hdev, HID_CONNECT_DEFAULT & ~HID_CONNECT_FF);
+	if (ret) {
+		dev_err(&hdev->dev, "hw start failed\n");
+		goto err_free;
+	}
 
-	if (ret)
-		kfree (nd);
 
+	list_for_each_entry(hidinput, &hdev->inputs, list) {
+		if (hidinput->report->maxfield < 1)
+			continue;
+
+		input = hidinput->input;
+		switch (hidinput->report->field[0]->application) {
+		case HID_DG_PEN:
+			input->name = "N-Trig Pen";
+			break;
+		case HID_DG_TOUCHSCREEN:
+			/* These keys are redundant for fingers, clear them
+			 * to prevent incorrect identification */
+			__clear_bit(BTN_TOOL_PEN, input->keybit);
+			__clear_bit(BTN_TOOL_FINGER, input->keybit);
+			__clear_bit(BTN_0, input->keybit);
+			__set_bit(BTN_TOOL_DOUBLETAP, input->keybit);
+			/*
+			 * The physical touchscreen (single touch)
+			 * input has a value for physical, whereas
+			 * the multitouch only has logical input
+			 * fields.
+			 */
+			input->name =
+				(hidinput->report->field[0]
+				 ->physical) ?
+				"N-Trig Touchscreen" :
+				"N-Trig MultiTouch";
+			break;
+		}
+	}
+
+	/* This is needed for devices with more recent firmware versions */
+	report = hdev->report_enum[HID_FEATURE_REPORT].report_id_hash[0x0a];
+	if (report)
+		usbhid_submit_report(hdev, report, USB_DIR_OUT);
+
+
+	return 0;
+err_free:
+	kfree(nd);
 	return ret;
 }
 
@@ -276,7 +365,7 @@
 
 static const struct hid_usage_id ntrig_grabbed_usages[] = {
 	{ HID_ANY_ID, HID_ANY_ID, HID_ANY_ID },
-	{ HID_ANY_ID - 1, HID_ANY_ID - 1, HID_ANY_ID - 1}
+	{ HID_ANY_ID - 1, HID_ANY_ID - 1, HID_ANY_ID - 1 }
 };
 
 static struct hid_driver ntrig_driver = {
--- linux-mvl-dove-2.6.32.orig/drivers/hid/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/hid/Kconfig
@@ -55,6 +55,12 @@
 menu "Special HID drivers"
 	depends on HID
 
+config HID_3M_PCT
+	tristate "3M PCT"
+	depends on USB_HID
+	---help---
+	Support for 3M PCT touch screens.
+
 config HID_A4TECH
 	tristate "A4 tech" if EMBEDDED
 	depends on USB_HID
@@ -190,6 +196,12 @@
 	---help---
 	Support for Microsoft devices that are not fully compliant with HID standard.
 
+config HID_MOSART
+	tristate "MosArt"
+	depends on USB_HID
+	---help---
+	Support for MosArt dual-touch panels.
+
 config HID_MONTEREY
 	tristate "Monterey" if EMBEDDED
 	depends on USB_HID
@@ -204,6 +216,13 @@
 	---help---
 	Support for N-Trig touch screen.
 
+config HID_ORTEK
+	tristate "Ortek" if EMBEDDED
+	depends on USB_HID
+	default !EMBEDDED
+	---help---
+	Support for Ortek WKB-2000 wireless keyboard + mouse trackpad.
+
 config HID_PANTHERLORD
 	tristate "Pantherlord support" if EMBEDDED
 	depends on USB_HID
@@ -227,6 +246,12 @@
 	---help---
 	Support for Petalynx Maxter remote control.
 
+config HID_QUANTA
+	tristate "Quanta Optical Touch"
+	depends on USB_HID
+	---help---
+	Support for Quanta Optical Touch dual-touch panels.
+
 config HID_SAMSUNG
 	tristate "Samsung" if EMBEDDED
 	depends on USB_HID
@@ -241,6 +266,12 @@
 	---help---
 	Support for Sony PS3 controller.
 
+config HID_STANTUM
+	tristate "Stantum"
+	depends on USB_HID
+	---help---
+	Support for Stantum multitouch panel.
+
 config HID_SUNPLUS
 	tristate "Sunplus" if EMBEDDED
 	depends on USB_HID
--- linux-mvl-dove-2.6.32.orig/drivers/hid/hid-ids.h
+++ linux-mvl-dove-2.6.32/drivers/hid/hid-ids.h
@@ -18,6 +18,9 @@
 #ifndef HID_IDS_H_FILE
 #define HID_IDS_H_FILE
 
+#define USB_VENDOR_ID_3M		0x0596
+#define USB_DEVICE_ID_3M1968		0x0500
+
 #define USB_VENDOR_ID_A4TECH		0x09da
 #define USB_DEVICE_ID_A4TECH_WCP32PU	0x0006
 #define USB_DEVICE_ID_A4TECH_X5_005D	0x000a
@@ -88,14 +91,26 @@
 #define USB_DEVICE_ID_APPLE_WELLSPRING3_ANSI	0x0236
 #define USB_DEVICE_ID_APPLE_WELLSPRING3_ISO	0x0237
 #define USB_DEVICE_ID_APPLE_WELLSPRING3_JIS	0x0238
+#define USB_DEVICE_ID_APPLE_WELLSPRING4_ANSI	0x023f
+#define USB_DEVICE_ID_APPLE_WELLSPRING4_ISO	0x0240
+#define USB_DEVICE_ID_APPLE_WELLSPRING4_JIS	0x0241
+#define USB_DEVICE_ID_APPLE_WELLSPRING4A_ANSI	0x0242
+#define USB_DEVICE_ID_APPLE_WELLSPRING4A_ISO	0x0243
+#define USB_DEVICE_ID_APPLE_WELLSPRING4A_JIS	0x0244
+#define USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_ANSI  0x0239
+#define USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_ISO   0x023a
+#define USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_JIS   0x023b
 #define USB_DEVICE_ID_APPLE_FOUNTAIN_TP_ONLY	0x030a
 #define USB_DEVICE_ID_APPLE_GEYSER1_TP_ONLY	0x030b
 #define USB_DEVICE_ID_APPLE_ATV_IRCONTROL	0x8241
 #define USB_DEVICE_ID_APPLE_IRCONTROL4	0x8242
 
-#define USB_VENDOR_ID_ASUS		0x0b05
-#define USB_DEVICE_ID_ASUS_LCM		0x1726
-#define USB_DEVICE_ID_ASUS_LCM2		0x175b
+#define USB_VENDOR_ID_ASUS		0x0486
+#define USB_DEVICE_ID_ASUS_T91MT	0x0185
+
+#define USB_VENDOR_ID_ASUSTEK		0x0b05
+#define USB_DEVICE_ID_ASUSTEK_LCM	0x1726
+#define USB_DEVICE_ID_ASUSTEK_LCM2	0x175b
 
 #define USB_VENDOR_ID_ATEN		0x0557
 #define USB_DEVICE_ID_ATEN_UC100KM	0x2004
@@ -145,6 +160,7 @@
 #define USB_DEVICE_ID_CYPRESS_ULTRAMOUSE	0x7417
 #define USB_DEVICE_ID_CYPRESS_BARCODE_1	0xde61
 #define USB_DEVICE_ID_CYPRESS_BARCODE_2	0xde64
+#define USB_DEVICE_ID_CYPRESS_BARCODE_3	0xbca1
 
 #define USB_VENDOR_ID_DEALEXTREAME	0x10c5
 #define USB_DEVICE_ID_DEALEXTREAME_RADIO_SI4701	0x819a
@@ -248,6 +264,7 @@
 #define USB_VENDOR_ID_GYRATION		0x0c16
 #define USB_DEVICE_ID_GYRATION_REMOTE	0x0002
 #define USB_DEVICE_ID_GYRATION_REMOTE_2 0x0003
+#define USB_DEVICE_ID_GYRATION_REMOTE_3 0x0008
 
 #define USB_VENDOR_ID_HAPP		0x078b
 #define USB_DEVICE_ID_UGCI_DRIVING	0x0010
@@ -346,12 +363,18 @@
 #define USB_VENDOR_ID_NEC		0x073e
 #define USB_DEVICE_ID_NEC_USB_GAME_PAD	0x0301
 
+#define USB_VENDOR_ID_NEXTWINDOW	0x1926
+#define USB_DEVICE_ID_NEXTWINDOW_TOUCHSCREEN	0x0003
+
 #define USB_VENDOR_ID_NTRIG                0x1b96
 #define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN   0x0001
 
 #define USB_VENDOR_ID_ONTRAK		0x0a07
 #define USB_DEVICE_ID_ONTRAK_ADU100	0x0064
 
+#define USB_VENDOR_ID_ORTEK		0x05a4
+#define USB_DEVICE_ID_ORTEK_WKB2000	0x2000
+
 #define USB_VENDOR_ID_PANJIT		0x134c
 
 #define USB_VENDOR_ID_PANTHERLORD	0x0810
@@ -372,6 +395,10 @@
 #define USB_VENDOR_ID_SAITEK		0x06a3
 #define USB_DEVICE_ID_SAITEK_RUMBLEPAD	0xff17
 
+#define USB_VENDOR_ID_QUANTA		0x0408
+#define USB_DEVICE_ID_QUANTA_OPTICAL_TOUCH	0x3000
+#define USB_DEVICE_ID_PIXART_IMAGING_INC_OPTICAL_TOUCH_SCREEN	0x3001
+
 #define USB_VENDOR_ID_SAMSUNG		0x0419
 #define USB_DEVICE_ID_SAMSUNG_IR_REMOTE	0x0001
 
@@ -383,16 +410,15 @@
 #define USB_DEVICE_ID_SOUNDGRAPH_IMON_FIRST	0x0034
 #define USB_DEVICE_ID_SOUNDGRAPH_IMON_LAST	0x0046
 
+#define USB_VENDOR_ID_STANTUM		0x1f87
+#define USB_DEVICE_ID_MTP		0x0002
+
 #define USB_VENDOR_ID_SUN		0x0430
 #define USB_DEVICE_ID_RARITAN_KVM_DONGLE	0xcdab
 
 #define USB_VENDOR_ID_SUNPLUS		0x04fc
 #define USB_DEVICE_ID_SUNPLUS_WDESKTOP	0x05d8
 
-#define USB_VENDOR_ID_TENX		0x1130
-#define USB_DEVICE_ID_TENX_IBUDDY1	0x0001
-#define USB_DEVICE_ID_TENX_IBUDDY2	0x0002
-
 #define USB_VENDOR_ID_THRUSTMASTER	0x044f
 
 #define USB_VENDOR_ID_TOPMAX		0x0663
--- linux-mvl-dove-2.6.32.orig/drivers/hid/hid-ortek.c
+++ linux-mvl-dove-2.6.32/drivers/hid/hid-ortek.c
@@ -0,0 +1,56 @@
+/*
+ *  HID driver for Ortek WKB-2000 (wireless keyboard + mouse trackpad).
+ *  Fixes LogicalMaximum error in USB report description, see
+ *  http://bugzilla.kernel.org/show_bug.cgi?id=14787
+ *
+ *  Copyright (c) 2010 Johnathon Harris <jmharris@gmail.com>
+ */
+
+/*
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ */
+
+#include <linux/device.h>
+#include <linux/hid.h>
+#include <linux/module.h>
+
+#include "hid-ids.h"
+
+static void ortek_report_fixup(struct hid_device *hdev, __u8 *rdesc,
+		unsigned int rsize)
+{
+	if (rsize >= 56 && rdesc[54] == 0x25 && rdesc[55] == 0x01) {
+		dev_info(&hdev->dev, "Fixing up Ortek WKB-2000 "
+				"report descriptor.\n");
+		rdesc[55] = 0x92;
+	}
+}
+
+static const struct hid_device_id ortek_devices[] = {
+	{ HID_USB_DEVICE(USB_VENDOR_ID_ORTEK, USB_DEVICE_ID_ORTEK_WKB2000) },
+	{ }
+};
+MODULE_DEVICE_TABLE(hid, ortek_devices);
+
+static struct hid_driver ortek_driver = {
+	.name = "ortek",
+	.id_table = ortek_devices,
+	.report_fixup = ortek_report_fixup
+};
+
+static int __init ortek_init(void)
+{
+	return hid_register_driver(&ortek_driver);
+}
+
+static void __exit ortek_exit(void)
+{
+	hid_unregister_driver(&ortek_driver);
+}
+
+module_init(ortek_init);
+module_exit(ortek_exit);
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/drivers/hid/hid-gyration.c
+++ linux-mvl-dove-2.6.32/drivers/hid/hid-gyration.c
@@ -53,10 +53,13 @@
 static int gyration_event(struct hid_device *hdev, struct hid_field *field,
 		struct hid_usage *usage, __s32 value)
 {
-	struct input_dev *input = field->hidinput->input;
+
+	if (!(hdev->claimed & HID_CLAIMED_INPUT) || !field->hidinput)
+		return 0;
 
 	if ((usage->hid & HID_USAGE_PAGE) == HID_UP_GENDESK &&
 			(usage->hid & 0xff) == 0x82) {
+		struct input_dev *input = field->hidinput->input;
 		input_event(input, usage->type, usage->code, 1);
 		input_sync(input);
 		input_event(input, usage->type, usage->code, 0);
@@ -70,6 +73,7 @@
 static const struct hid_device_id gyration_devices[] = {
 	{ HID_USB_DEVICE(USB_VENDOR_ID_GYRATION, USB_DEVICE_ID_GYRATION_REMOTE) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_GYRATION, USB_DEVICE_ID_GYRATION_REMOTE_2) },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_GYRATION, USB_DEVICE_ID_GYRATION_REMOTE_3) },
 	{ }
 };
 MODULE_DEVICE_TABLE(hid, gyration_devices);
--- linux-mvl-dove-2.6.32.orig/drivers/hid/Makefile
+++ linux-mvl-dove-2.6.32/drivers/hid/Makefile
@@ -19,6 +19,7 @@
 	hid-logitech-objs	+= hid-lg2ff.o
 endif
 
+obj-$(CONFIG_HID_3M_PCT)	+= hid-3m-pct.o
 obj-$(CONFIG_HID_A4TECH)	+= hid-a4tech.o
 obj-$(CONFIG_HID_APPLE)		+= hid-apple.o
 obj-$(CONFIG_HID_BELKIN)	+= hid-belkin.o
@@ -32,13 +33,17 @@
 obj-$(CONFIG_HID_KYE)		+= hid-kye.o
 obj-$(CONFIG_HID_LOGITECH)	+= hid-logitech.o
 obj-$(CONFIG_HID_MICROSOFT)	+= hid-microsoft.o
+obj-$(CONFIG_HID_ORTEK)		+= hid-ortek.o
 obj-$(CONFIG_HID_MONTEREY)	+= hid-monterey.o
+obj-$(CONFIG_HID_MOSART)	+= hid-mosart.o
 obj-$(CONFIG_HID_NTRIG)		+= hid-ntrig.o
+obj-$(CONFIG_HID_QUANTA)	+= hid-quanta.o
 obj-$(CONFIG_HID_PANTHERLORD)	+= hid-pl.o
 obj-$(CONFIG_HID_PETALYNX)	+= hid-petalynx.o
 obj-$(CONFIG_HID_SAMSUNG)	+= hid-samsung.o
 obj-$(CONFIG_HID_SMARTJOYPLUS)	+= hid-sjoy.o
 obj-$(CONFIG_HID_SONY)		+= hid-sony.o
+obj-$(CONFIG_HID_STANTUM)	+= hid-stantum.o
 obj-$(CONFIG_HID_SUNPLUS)	+= hid-sunplus.o
 obj-$(CONFIG_HID_GREENASIA)	+= hid-gaff.o
 obj-$(CONFIG_HID_THRUSTMASTER)	+= hid-tmff.o
--- linux-mvl-dove-2.6.32.orig/drivers/hid/hid-3m-pct.c
+++ linux-mvl-dove-2.6.32/drivers/hid/hid-3m-pct.c
@@ -0,0 +1,290 @@
+/*
+ *  HID driver for 3M PCT multitouch panels
+ *
+ *  Copyright (c) 2009 Stephane Chatty <chatty@enac.fr>
+ *
+ */
+
+/*
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ */
+
+#include <linux/device.h>
+#include <linux/hid.h>
+#include <linux/module.h>
+#include <linux/usb.h>
+
+MODULE_AUTHOR("Stephane Chatty <chatty@enac.fr>");
+MODULE_DESCRIPTION("3M PCT multitouch panels");
+MODULE_LICENSE("GPL");
+
+#include "hid-ids.h"
+
+struct mmm_finger {
+	__s32 x, y;
+	__u8 rank;
+	bool touch, valid;
+};
+
+struct mmm_data {
+	struct mmm_finger f[10];
+	__u8 curid, num;
+	bool touch, valid;
+};
+
+static int mmm_input_mapping(struct hid_device *hdev, struct hid_input *hi,
+		struct hid_field *field, struct hid_usage *usage,
+		unsigned long **bit, int *max)
+{
+	switch (usage->hid & HID_USAGE_PAGE) {
+
+	case HID_UP_BUTTON:
+		return -1;
+
+	case HID_UP_GENDESK:
+		switch (usage->hid) {
+		case HID_GD_X:
+			hid_map_usage(hi, usage, bit, max,
+					EV_ABS, ABS_MT_POSITION_X);
+			/* touchscreen emulation */
+			input_set_abs_params(hi->input, ABS_X,
+						field->logical_minimum,
+						field->logical_maximum, 0, 0);
+			return 1;
+		case HID_GD_Y:
+			hid_map_usage(hi, usage, bit, max,
+					EV_ABS, ABS_MT_POSITION_Y);
+			/* touchscreen emulation */
+			input_set_abs_params(hi->input, ABS_Y,
+						field->logical_minimum,
+						field->logical_maximum, 0, 0);
+			return 1;
+		}
+		return 0;
+
+	case HID_UP_DIGITIZER:
+		switch (usage->hid) {
+		/* we do not want to map these: no input-oriented meaning */
+		case 0x14:
+		case 0x23:
+		case HID_DG_INPUTMODE:
+		case HID_DG_DEVICEINDEX:
+		case HID_DG_CONTACTCOUNT:
+		case HID_DG_CONTACTMAX:
+		case HID_DG_INRANGE:
+		case HID_DG_CONFIDENCE:
+			return -1;
+		case HID_DG_TIPSWITCH:
+			/* touchscreen emulation */
+			hid_map_usage(hi, usage, bit, max, EV_KEY, BTN_TOUCH);
+			return 1;
+		case HID_DG_CONTACTID:
+			hid_map_usage(hi, usage, bit, max,
+					EV_ABS, ABS_MT_TRACKING_ID);
+			return 1;
+		}
+		/* let hid-input decide for the others */
+		return 0;
+
+	case 0xff000000:
+		/* we do not want to map these: no input-oriented meaning */
+		return -1;
+	}
+
+	return 0;
+}
+
+static int mmm_input_mapped(struct hid_device *hdev, struct hid_input *hi,
+		struct hid_field *field, struct hid_usage *usage,
+		unsigned long **bit, int *max)
+{
+	if (usage->type == EV_KEY || usage->type == EV_ABS)
+		clear_bit(usage->code, *bit);
+
+	return 0;
+}
+
+/*
+ * this function is called when a whole packet has been received and processed,
+ * so that it can decide what to send to the input layer.
+ */
+static void mmm_filter_event(struct mmm_data *md, struct input_dev *input)
+{
+	struct mmm_finger *oldest = 0;
+	bool pressed = false, released = false;
+	int i;
+
+	/*
+	 * we need to iterate on all fingers to decide if we have a press
+	 * or a release event in our touchscreen emulation.
+	 */
+	for (i = 0; i < 10; ++i) {
+		struct mmm_finger *f = &md->f[i];
+		if (!f->valid) {
+			/* this finger is just placeholder data, ignore */
+		} else if (f->touch) {
+			/* this finger is on the screen */
+			input_event(input, EV_ABS, ABS_MT_TRACKING_ID, i);
+			input_event(input, EV_ABS, ABS_MT_POSITION_X, f->x);
+			input_event(input, EV_ABS, ABS_MT_POSITION_Y, f->y);
+			input_mt_sync(input);
+			/*
+			 * touchscreen emulation: maintain the age rank
+			 * of this finger, decide if we have a press
+			 */
+			if (f->rank == 0) {
+				f->rank = ++(md->num);
+				if (f->rank == 1)
+					pressed = true;
+			}
+			if (f->rank == 1)
+				oldest = f;
+		} else {
+			/* this finger took off the screen */
+			/* touchscreen emulation: maintain age rank of others */
+			int j;
+
+			for (j = 0; j < 10; ++j) {
+				struct mmm_finger *g = &md->f[j];
+				if (g->rank > f->rank) {
+					g->rank--;
+					if (g->rank == 1)
+						oldest = g;
+				}
+			}
+			f->rank = 0;
+			--(md->num);
+			if (md->num == 0)
+				released = true;
+		}
+		f->valid = 0;
+	}
+
+	/* touchscreen emulation */
+	if (oldest) {
+		if (pressed)
+			input_event(input, EV_KEY, BTN_TOUCH, 1);
+		input_event(input, EV_ABS, ABS_X, oldest->x);
+		input_event(input, EV_ABS, ABS_Y, oldest->y);
+	} else if (released) {
+		input_event(input, EV_KEY, BTN_TOUCH, 0);
+	}
+}
+
+/*
+ * this function is called upon all reports
+ * so that we can accumulate contact point information,
+ * and call input_mt_sync after each point.
+ */
+static int mmm_event(struct hid_device *hid, struct hid_field *field,
+				struct hid_usage *usage, __s32 value)
+{
+	struct mmm_data *md = hid_get_drvdata(hid);
+	/*
+	 * strangely, this function can be called before
+	 * field->hidinput is initialized!
+	 */
+	if (hid->claimed & HID_CLAIMED_INPUT) {
+		struct input_dev *input = field->hidinput->input;
+		switch (usage->hid) {
+		case HID_DG_TIPSWITCH:
+			md->touch = value;
+			break;
+		case HID_DG_CONFIDENCE:
+			md->valid = value;
+			break;
+		case HID_DG_CONTACTID:
+			if (md->valid) {
+				md->curid = value;
+				md->f[value].touch = md->touch;
+				md->f[value].valid = 1;
+			}
+			break;
+		case HID_GD_X:
+			if (md->valid)
+				md->f[md->curid].x = value;
+			break;
+		case HID_GD_Y:
+			if (md->valid)
+				md->f[md->curid].y = value;
+			break;
+		case HID_DG_CONTACTCOUNT:
+			mmm_filter_event(md, input);
+			break;
+		}
+	}
+
+	/* we have handled the hidinput part, now remains hiddev */
+	if (hid->claimed & HID_CLAIMED_HIDDEV && hid->hiddev_hid_event)
+		hid->hiddev_hid_event(hid, field, usage, value);
+
+	return 1;
+}
+
+static int mmm_probe(struct hid_device *hdev, const struct hid_device_id *id)
+{
+	int ret;
+	struct mmm_data *md;
+
+	md = kzalloc(sizeof(struct mmm_data), GFP_KERNEL);
+	if (!md) {
+		dev_err(&hdev->dev, "cannot allocate 3M data\n");
+		return -ENOMEM;
+	}
+	hid_set_drvdata(hdev, md);
+
+	ret = hid_parse(hdev);
+	if (!ret)
+		ret = hid_hw_start(hdev, HID_CONNECT_DEFAULT);
+
+	if (ret)
+		kfree(md);
+	return ret;
+}
+
+static void mmm_remove(struct hid_device *hdev)
+{
+	hid_hw_stop(hdev);
+	kfree(hid_get_drvdata(hdev));
+	hid_set_drvdata(hdev, NULL);
+}
+
+static const struct hid_device_id mmm_devices[] = {
+	{ HID_USB_DEVICE(USB_VENDOR_ID_3M, USB_DEVICE_ID_3M1968) },
+	{ }
+};
+MODULE_DEVICE_TABLE(hid, mmm_devices);
+
+static const struct hid_usage_id mmm_grabbed_usages[] = {
+	{ HID_ANY_ID, HID_ANY_ID, HID_ANY_ID },
+	{ HID_ANY_ID - 1, HID_ANY_ID - 1, HID_ANY_ID - 1}
+};
+
+static struct hid_driver mmm_driver = {
+	.name = "3m-pct",
+	.id_table = mmm_devices,
+	.probe = mmm_probe,
+	.remove = mmm_remove,
+	.input_mapping = mmm_input_mapping,
+	.input_mapped = mmm_input_mapped,
+	.usage_table = mmm_grabbed_usages,
+	.event = mmm_event,
+};
+
+static int __init mmm_init(void)
+{
+	return hid_register_driver(&mmm_driver);
+}
+
+static void __exit mmm_exit(void)
+{
+	hid_unregister_driver(&mmm_driver);
+}
+
+module_init(mmm_init);
+module_exit(mmm_exit);
+MODULE_LICENSE("GPL");
+
--- linux-mvl-dove-2.6.32.orig/drivers/hid/hid-mosart.c
+++ linux-mvl-dove-2.6.32/drivers/hid/hid-mosart.c
@@ -0,0 +1,273 @@
+/*
+ *  HID driver for the multitouch panel on the ASUS EeePC T91MT
+ *
+ *  Copyright (c) 2009-2010 Stephane Chatty <chatty@enac.fr>
+ *  Copyright (c) 2010 Teemu Tuominen <teemu.tuominen@cybercom.com>
+ *
+ */
+
+/*
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ */
+
+#include <linux/device.h>
+#include <linux/hid.h>
+#include <linux/module.h>
+#include <linux/usb.h>
+#include "usbhid/usbhid.h"
+
+MODULE_AUTHOR("Stephane Chatty <chatty@enac.fr>");
+MODULE_DESCRIPTION("MosArt dual-touch panel");
+MODULE_LICENSE("GPL");
+
+#include "hid-ids.h"
+
+struct mosart_data {
+	__u16 x, y;
+	__u8 id;
+	bool valid;		/* valid finger data, or just placeholder? */
+	bool first;		/* is this the first finger in this frame? */
+	bool activity_now;	/* at least one active finger in this frame? */
+	bool activity;		/* at least one active finger previously? */
+};
+
+static int mosart_input_mapping(struct hid_device *hdev, struct hid_input *hi,
+		struct hid_field *field, struct hid_usage *usage,
+		unsigned long **bit, int *max)
+{
+	switch (usage->hid & HID_USAGE_PAGE) {
+
+	case HID_UP_GENDESK:
+		switch (usage->hid) {
+		case HID_GD_X:
+			hid_map_usage(hi, usage, bit, max,
+					EV_ABS, ABS_MT_POSITION_X);
+			/* touchscreen emulation */
+			input_set_abs_params(hi->input, ABS_X,
+						field->logical_minimum,
+						field->logical_maximum, 0, 0);
+			return 1;
+		case HID_GD_Y:
+			hid_map_usage(hi, usage, bit, max,
+					EV_ABS, ABS_MT_POSITION_Y);
+			/* touchscreen emulation */
+			input_set_abs_params(hi->input, ABS_Y,
+						field->logical_minimum,
+						field->logical_maximum, 0, 0);
+			return 1;
+		}
+		return 0;
+
+	case HID_UP_DIGITIZER:
+		switch (usage->hid) {
+		case HID_DG_CONFIDENCE:
+		case HID_DG_TIPSWITCH:
+		case HID_DG_INPUTMODE:
+		case HID_DG_DEVICEINDEX:
+		case HID_DG_CONTACTCOUNT:
+		case HID_DG_CONTACTMAX:
+		case HID_DG_TIPPRESSURE:
+		case HID_DG_WIDTH:
+		case HID_DG_HEIGHT:
+			return -1;
+		case HID_DG_INRANGE:
+			/* touchscreen emulation */
+			hid_map_usage(hi, usage, bit, max, EV_KEY, BTN_TOUCH);
+			return 1;
+
+		case HID_DG_CONTACTID:
+			hid_map_usage(hi, usage, bit, max,
+					EV_ABS, ABS_MT_TRACKING_ID);
+			return 1;
+
+		}
+		return 0;
+
+	case 0xff000000:
+		/* ignore HID features */
+		return -1;
+	}
+
+	return 0;
+}
+
+static int mosart_input_mapped(struct hid_device *hdev, struct hid_input *hi,
+		struct hid_field *field, struct hid_usage *usage,
+		unsigned long **bit, int *max)
+{
+	if (usage->type == EV_KEY || usage->type == EV_ABS)
+		clear_bit(usage->code, *bit);
+
+	return 0;
+}
+
+/*
+ * this function is called when a whole finger has been parsed,
+ * so that it can decide what to send to the input layer.
+ */
+static void mosart_filter_event(struct mosart_data *td, struct input_dev *input)
+{
+	td->first = !td->first; /* touchscreen emulation */
+
+	if (!td->valid) {
+		/*
+		 * touchscreen emulation: if no finger in this frame is valid
+		 * and there previously was finger activity, this is a release
+		 */ 
+		if (!td->first && !td->activity_now && td->activity) {
+			input_event(input, EV_KEY, BTN_TOUCH, 0);
+			td->activity = false;
+		}
+		return;
+	}
+
+	input_event(input, EV_ABS, ABS_MT_TRACKING_ID, td->id);
+	input_event(input, EV_ABS, ABS_MT_POSITION_X, td->x);
+	input_event(input, EV_ABS, ABS_MT_POSITION_Y, td->y);
+
+	input_mt_sync(input);
+	td->valid = false;
+
+	/* touchscreen emulation: if first active finger in this frame... */
+	if (!td->activity_now) {
+		/* if there was no previous activity, emit touch event */
+		if (!td->activity) {
+			input_event(input, EV_KEY, BTN_TOUCH, 1);
+			td->activity = true;
+		}
+		td->activity_now = true;
+		/* and in any case this is our preferred finger */
+		input_event(input, EV_ABS, ABS_X, td->x);
+		input_event(input, EV_ABS, ABS_Y, td->y);
+	}
+}
+
+
+static int mosart_event(struct hid_device *hid, struct hid_field *field,
+				struct hid_usage *usage, __s32 value)
+{
+	struct mosart_data *td = hid_get_drvdata(hid);
+
+	if (hid->claimed & HID_CLAIMED_INPUT) {
+		struct input_dev *input = field->hidinput->input;
+		switch (usage->hid) {
+		case HID_DG_INRANGE:
+			td->valid = !!value;
+			break;
+		case HID_GD_X:
+			td->x = value;
+			break;
+		case HID_GD_Y:
+			td->y = value;
+			mosart_filter_event(td, input);
+			break;
+		case HID_DG_CONTACTID:
+			td->id = value;
+			break;
+		case HID_DG_CONTACTCOUNT:
+			/* touch emulation: this is the last field in a frame */
+			td->first = false;
+			td->activity_now = false;
+			break;
+		case HID_DG_CONFIDENCE:
+		case HID_DG_TIPSWITCH:
+			/* avoid interference from generic hidinput handling */
+			break;
+
+		default:
+			/* fallback to the generic hidinput handling */
+			return 0;
+		}
+	}
+
+	/* we have handled the hidinput part, now remains hiddev */
+	if (hid->claimed & HID_CLAIMED_HIDDEV && hid->hiddev_hid_event)
+		hid->hiddev_hid_event(hid, field, usage, value);
+
+	return 1;
+}
+
+static int mosart_probe(struct hid_device *hdev, const struct hid_device_id *id)
+{
+	int ret;
+	struct mosart_data *td;
+
+
+	td = kmalloc(sizeof(struct mosart_data), GFP_KERNEL);
+	if (!td) {
+		dev_err(&hdev->dev, "cannot allocate MosArt data\n");
+		return -ENOMEM;
+	}
+	td->valid = false;
+	td->activity = false;
+	td->activity_now = false;
+	td->first = false;
+	hid_set_drvdata(hdev, td);
+
+	/* currently, it's better to have one evdev device only */
+#if 0
+	hdev->quirks |= HID_QUIRK_MULTI_INPUT;
+#endif
+
+	ret = hid_parse(hdev);
+	if (ret == 0)
+		ret = hid_hw_start(hdev, HID_CONNECT_DEFAULT);
+
+	if (ret == 0) {
+		struct hid_report_enum *re = hdev->report_enum
+						+ HID_FEATURE_REPORT;
+		struct hid_report *r = re->report_id_hash[7];
+
+		r->field[0]->value[0] = 0x02;
+		usbhid_submit_report(hdev, r, USB_DIR_OUT);
+	} else 
+		kfree(td);
+
+	return ret;
+}
+
+static void mosart_remove(struct hid_device *hdev)
+{
+	hid_hw_stop(hdev);
+	kfree(hid_get_drvdata(hdev));
+	hid_set_drvdata(hdev, NULL);
+}
+
+static const struct hid_device_id mosart_devices[] = {
+	{ HID_USB_DEVICE(USB_VENDOR_ID_ASUS, USB_DEVICE_ID_ASUS_T91MT) },
+	{ }
+};
+MODULE_DEVICE_TABLE(hid, mosart_devices);
+
+static const struct hid_usage_id mosart_grabbed_usages[] = {
+	{ HID_ANY_ID, HID_ANY_ID, HID_ANY_ID },
+	{ HID_ANY_ID - 1, HID_ANY_ID - 1, HID_ANY_ID - 1}
+};
+
+static struct hid_driver mosart_driver = {
+	.name = "mosart",
+	.id_table = mosart_devices,
+	.probe = mosart_probe,
+	.remove = mosart_remove,
+	.input_mapping = mosart_input_mapping,
+	.input_mapped = mosart_input_mapped,
+	.usage_table = mosart_grabbed_usages,
+	.event = mosart_event,
+};
+
+static int __init mosart_init(void)
+{
+	return hid_register_driver(&mosart_driver);
+}
+
+static void __exit mosart_exit(void)
+{
+	hid_unregister_driver(&mosart_driver);
+}
+
+module_init(mosart_init);
+module_exit(mosart_exit);
+
--- linux-mvl-dove-2.6.32.orig/drivers/hid/hid-stantum.c
+++ linux-mvl-dove-2.6.32/drivers/hid/hid-stantum.c
@@ -0,0 +1,283 @@
+/*
+ *  HID driver for Stantum multitouch panels
+ *
+ *  Copyright (c) 2009 Stephane Chatty <chatty@enac.fr>
+ *
+ */
+
+/*
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ */
+
+#include <linux/device.h>
+#include <linux/hid.h>
+#include <linux/module.h>
+
+MODULE_AUTHOR("Stephane Chatty <chatty@enac.fr>");
+MODULE_DESCRIPTION("Stantum HID multitouch panels");
+MODULE_LICENSE("GPL");
+
+#include "hid-ids.h"
+
+struct stantum_data {
+	__s32 x, y, z, w, h;	/* x, y, pressure, width, height */
+	__u16 id;		/* touch id */
+	bool valid;		/* valid finger data, or just placeholder? */
+	bool first;		/* first finger in the HID packet? */
+	bool activity;		/* at least one active finger so far? */
+};
+
+static int stantum_input_mapping(struct hid_device *hdev, struct hid_input *hi,
+		struct hid_field *field, struct hid_usage *usage,
+		unsigned long **bit, int *max)
+{
+	switch (usage->hid & HID_USAGE_PAGE) {
+
+	case HID_UP_GENDESK:
+		switch (usage->hid) {
+		case HID_GD_X:
+			hid_map_usage(hi, usage, bit, max,
+					EV_ABS, ABS_MT_POSITION_X);
+			/* touchscreen emulation */
+			input_set_abs_params(hi->input, ABS_X,
+						field->logical_minimum,
+						field->logical_maximum, 0, 0);
+			return 1;
+		case HID_GD_Y:
+			hid_map_usage(hi, usage, bit, max,
+					EV_ABS, ABS_MT_POSITION_Y);
+			/* touchscreen emulation */
+			input_set_abs_params(hi->input, ABS_Y,
+						field->logical_minimum,
+						field->logical_maximum, 0, 0);
+			return 1;
+		}
+		return 0;
+
+	case HID_UP_DIGITIZER:
+		switch (usage->hid) {
+		case HID_DG_INRANGE:
+		case HID_DG_CONFIDENCE:
+		case HID_DG_INPUTMODE:
+		case HID_DG_DEVICEINDEX:
+		case HID_DG_CONTACTCOUNT:
+		case HID_DG_CONTACTMAX:
+			return -1;
+
+		case HID_DG_TIPSWITCH:
+			/* touchscreen emulation */
+			hid_map_usage(hi, usage, bit, max, EV_KEY, BTN_TOUCH);
+			return 1;
+
+		case HID_DG_WIDTH:
+			hid_map_usage(hi, usage, bit, max,
+					EV_ABS, ABS_MT_TOUCH_MAJOR);
+			return 1;
+		case HID_DG_HEIGHT:
+			hid_map_usage(hi, usage, bit, max,
+					EV_ABS, ABS_MT_TOUCH_MINOR);
+			input_set_abs_params(hi->input, ABS_MT_ORIENTATION,
+					1, 1, 0, 0);
+			return 1;
+		case HID_DG_TIPPRESSURE:
+			hid_map_usage(hi, usage, bit, max,
+					EV_ABS, ABS_MT_PRESSURE);
+			return 1;
+
+		case HID_DG_CONTACTID:
+			hid_map_usage(hi, usage, bit, max,
+					EV_ABS, ABS_MT_TRACKING_ID);
+			return 1;
+
+		}
+		return 0;
+
+	case 0xff000000:
+		/* no input-oriented meaning */
+		return -1;
+	}
+
+	return 0;
+}
+
+static int stantum_input_mapped(struct hid_device *hdev, struct hid_input *hi,
+		struct hid_field *field, struct hid_usage *usage,
+		unsigned long **bit, int *max)
+{
+	if (usage->type == EV_KEY || usage->type == EV_ABS)
+		clear_bit(usage->code, *bit);
+
+	return 0;
+}
+
+/*
+ * this function is called when a whole finger has been parsed,
+ * so that it can decide what to send to the input layer.
+ */
+static void stantum_filter_event(struct stantum_data *sd,
+					struct input_dev *input)
+{
+	bool wide;
+
+	if (!sd->valid) {
+		/*
+		 * touchscreen emulation: if the first finger is not valid and
+		 * there previously was finger activity, this is a release
+		 */
+		if (sd->first && sd->activity) {
+			input_event(input, EV_KEY, BTN_TOUCH, 0);
+			sd->activity = false;
+		}
+		return;
+	}
+
+	input_event(input, EV_ABS, ABS_MT_TRACKING_ID, sd->id);
+	input_event(input, EV_ABS, ABS_MT_POSITION_X, sd->x);
+	input_event(input, EV_ABS, ABS_MT_POSITION_Y, sd->y);
+
+	wide = (sd->w > sd->h);
+	input_event(input, EV_ABS, ABS_MT_ORIENTATION, wide);
+	input_event(input, EV_ABS, ABS_MT_TOUCH_MAJOR, wide ? sd->w : sd->h);
+	input_event(input, EV_ABS, ABS_MT_TOUCH_MINOR, wide ? sd->h : sd->w);
+
+	input_event(input, EV_ABS, ABS_MT_PRESSURE, sd->z);
+
+	input_mt_sync(input);
+	sd->valid = false;
+
+	/* touchscreen emulation */
+	if (sd->first) {
+		if (!sd->activity) {
+			input_event(input, EV_KEY, BTN_TOUCH, 1);
+			sd->activity = true;
+		}
+		input_event(input, EV_ABS, ABS_X, sd->x);
+		input_event(input, EV_ABS, ABS_Y, sd->y);
+	}
+	sd->first = false;
+}
+
+
+static int stantum_event(struct hid_device *hid, struct hid_field *field,
+				struct hid_usage *usage, __s32 value)
+{
+	struct stantum_data *sd = hid_get_drvdata(hid);
+
+	if (hid->claimed & HID_CLAIMED_INPUT) {
+		struct input_dev *input = field->hidinput->input;
+
+		switch (usage->hid) {
+		case HID_DG_INRANGE:
+			/* this is the last field in a finger */
+			stantum_filter_event(sd, input);
+			break;
+		case HID_DG_WIDTH:
+			sd->w = value;
+			break;
+		case HID_DG_HEIGHT:
+			sd->h = value;
+			break;
+		case HID_GD_X:
+			sd->x = value;
+			break;
+		case HID_GD_Y:
+			sd->y = value;
+			break;
+		case HID_DG_TIPPRESSURE:
+			sd->z = value;
+			break;
+		case HID_DG_CONTACTID:
+			sd->id = value;
+			break;
+		case HID_DG_CONFIDENCE:
+			sd->valid = !!value;
+			break;
+		case 0xff000002:
+			/* this comes only before the first finger */
+			sd->first = true;
+			break;
+
+		default:
+			/* ignore the others */
+			return 1;
+		}
+	}
+
+	/* we have handled the hidinput part, now remains hiddev */
+	if (hid->claimed & HID_CLAIMED_HIDDEV && hid->hiddev_hid_event)
+		hid->hiddev_hid_event(hid, field, usage, value);
+
+	return 1;
+}
+
+static int stantum_probe(struct hid_device *hdev,
+				const struct hid_device_id *id)
+{
+	int ret;
+	struct stantum_data *sd;
+
+	sd = kmalloc(sizeof(struct stantum_data), GFP_KERNEL);
+	if (!sd) {
+		dev_err(&hdev->dev, "cannot allocate Stantum data\n");
+		return -ENOMEM;
+	}
+	sd->valid = false;
+	sd->first = false;
+	sd->activity = false;
+	hid_set_drvdata(hdev, sd);
+
+	ret = hid_parse(hdev);
+	if (!ret)
+		ret = hid_hw_start(hdev, HID_CONNECT_DEFAULT);
+
+	if (ret)
+		kfree(sd);
+
+	return ret;
+}
+
+static void stantum_remove(struct hid_device *hdev)
+{
+	hid_hw_stop(hdev);
+	kfree(hid_get_drvdata(hdev));
+	hid_set_drvdata(hdev, NULL);
+}
+
+static const struct hid_device_id stantum_devices[] = {
+	{ HID_USB_DEVICE(USB_VENDOR_ID_STANTUM, USB_DEVICE_ID_MTP) },
+	{ }
+};
+MODULE_DEVICE_TABLE(hid, stantum_devices);
+
+static const struct hid_usage_id stantum_grabbed_usages[] = {
+	{ HID_ANY_ID, HID_ANY_ID, HID_ANY_ID },
+	{ HID_ANY_ID - 1, HID_ANY_ID - 1, HID_ANY_ID - 1}
+};
+
+static struct hid_driver stantum_driver = {
+	.name = "stantum",
+	.id_table = stantum_devices,
+	.probe = stantum_probe,
+	.remove = stantum_remove,
+	.input_mapping = stantum_input_mapping,
+	.input_mapped = stantum_input_mapped,
+	.usage_table = stantum_grabbed_usages,
+	.event = stantum_event,
+};
+
+static int __init stantum_init(void)
+{
+	return hid_register_driver(&stantum_driver);
+}
+
+static void __exit stantum_exit(void)
+{
+	hid_unregister_driver(&stantum_driver);
+}
+
+module_init(stantum_init);
+module_exit(stantum_exit);
+
--- linux-mvl-dove-2.6.32.orig/drivers/hid/hid-apple.c
+++ linux-mvl-dove-2.6.32/drivers/hid/hid-apple.c
@@ -53,6 +53,27 @@
 	u8 flags;
 };
 
+static const struct apple_key_translation macbookair_fn_keys[] = {
+	{ KEY_BACKSPACE, KEY_DELETE },
+	{ KEY_ENTER,	KEY_INSERT },
+	{ KEY_F1,	KEY_BRIGHTNESSDOWN, APPLE_FLAG_FKEY },
+	{ KEY_F2,	KEY_BRIGHTNESSUP,   APPLE_FLAG_FKEY },
+	{ KEY_F3,	KEY_SCALE,          APPLE_FLAG_FKEY },
+	{ KEY_F4,	KEY_DASHBOARD,      APPLE_FLAG_FKEY },
+	{ KEY_F6,	KEY_PREVIOUSSONG,   APPLE_FLAG_FKEY },
+	{ KEY_F7,	KEY_PLAYPAUSE,      APPLE_FLAG_FKEY },
+	{ KEY_F8,	KEY_NEXTSONG,       APPLE_FLAG_FKEY },
+	{ KEY_F9,	KEY_MUTE,           APPLE_FLAG_FKEY },
+	{ KEY_F10,	KEY_VOLUMEDOWN,     APPLE_FLAG_FKEY },
+	{ KEY_F11,	KEY_VOLUMEUP,       APPLE_FLAG_FKEY },
+	{ KEY_F12,	KEY_EJECTCD,        APPLE_FLAG_FKEY },
+	{ KEY_UP,	KEY_PAGEUP },
+	{ KEY_DOWN,	KEY_PAGEDOWN },
+	{ KEY_LEFT,	KEY_HOME },
+	{ KEY_RIGHT,	KEY_END },
+	{ }
+};
+
 static const struct apple_key_translation apple_fn_keys[] = {
 	{ KEY_BACKSPACE, KEY_DELETE },
 	{ KEY_ENTER,	KEY_INSERT },
@@ -151,10 +172,15 @@
 	if (fnmode) {
 		int do_translate;
 
-		trans = apple_find_translation((hid->product < 0x21d ||
-					hid->product >= 0x300) ?
-					powerbook_fn_keys : apple_fn_keys,
-					usage->code);
+		if(hid->product >= USB_DEVICE_ID_APPLE_WELLSPRING4_ANSI &&
+				hid->product <= USB_DEVICE_ID_APPLE_WELLSPRING4A_JIS) {
+			trans = apple_find_translation(macbookair_fn_keys, usage->code);
+		} else if (hid->product < 0x21d || hid->product >= 0x300) {
+			trans = apple_find_translation(powerbook_fn_keys, usage->code);
+		} else {
+			trans = apple_find_translation(apple_fn_keys, usage->code);
+		}
+
 		if (trans) {
 			if (test_bit(usage->code, asc->pressed_fn))
 				do_translate = 1;
@@ -431,6 +457,25 @@
 		.driver_data = APPLE_HAS_FN | APPLE_ISO_KEYBOARD },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING3_JIS),
 		.driver_data = APPLE_HAS_FN | APPLE_RDESC_JIS },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING4_ANSI),
+		.driver_data = APPLE_HAS_FN },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING4_ISO),
+		.driver_data = APPLE_HAS_FN | APPLE_ISO_KEYBOARD },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING4_JIS),
+		.driver_data = APPLE_HAS_FN | APPLE_RDESC_JIS },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING4A_ANSI),
+		.driver_data = APPLE_HAS_FN },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING4A_ISO),
+		.driver_data = APPLE_HAS_FN | APPLE_ISO_KEYBOARD },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING4A_JIS),
+		.driver_data = APPLE_HAS_FN | APPLE_RDESC_JIS },
+	{ HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_ANSI),
+		.driver_data = APPLE_NUMLOCK_EMULATION | APPLE_HAS_FN },
+	{ HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_ISO),
+		.driver_data = APPLE_NUMLOCK_EMULATION | APPLE_HAS_FN |
+			APPLE_ISO_KEYBOARD },
+	{ HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_JIS),
+		.driver_data = APPLE_NUMLOCK_EMULATION | APPLE_HAS_FN },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_FOUNTAIN_TP_ONLY),
 		.driver_data = APPLE_NUMLOCK_EMULATION | APPLE_HAS_FN },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_GEYSER1_TP_ONLY),
--- linux-mvl-dove-2.6.32.orig/drivers/hid/hid-core.c
+++ linux-mvl-dove-2.6.32/drivers/hid/hid-core.c
@@ -1250,6 +1250,7 @@
 
 /* a list of devices for which there is a specialized driver on HID bus */
 static const struct hid_device_id hid_blacklist[] = {
+	{ HID_USB_DEVICE(USB_VENDOR_ID_3M, USB_DEVICE_ID_3M1968) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_A4TECH, USB_DEVICE_ID_A4TECH_WCP32PU) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_A4TECH, USB_DEVICE_ID_A4TECH_X5_005D) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ATV_IRCONTROL) },
@@ -1287,6 +1288,15 @@
 	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING3_ANSI) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING3_ISO) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING3_JIS) },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING4_ANSI) },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING4_ISO) },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING4_JIS) },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING4A_ANSI) },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING4A_ISO) },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING4A_JIS) },
+	{ HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_ANSI) },
+	{ HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_ISO) },
+	{ HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_JIS) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_FOUNTAIN_TP_ONLY) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_GEYSER1_TP_ONLY) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_BELKIN, USB_DEVICE_ID_FLIP_KVM) },
@@ -1294,6 +1304,7 @@
 	{ HID_USB_DEVICE(USB_VENDOR_ID_CHICONY, USB_DEVICE_ID_CHICONY_TACTICAL_PAD) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_CYPRESS, USB_DEVICE_ID_CYPRESS_BARCODE_1) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_CYPRESS, USB_DEVICE_ID_CYPRESS_BARCODE_2) },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_CYPRESS, USB_DEVICE_ID_CYPRESS_BARCODE_3) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_CYPRESS, USB_DEVICE_ID_CYPRESS_MOUSE) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_DRAGONRISE, 0x0006) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_EZKEY, USB_DEVICE_ID_BTC_8193) },
@@ -1303,6 +1314,7 @@
 	{ HID_USB_DEVICE(USB_VENDOR_ID_GREENASIA, 0x0012) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_GYRATION, USB_DEVICE_ID_GYRATION_REMOTE) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_GYRATION, USB_DEVICE_ID_GYRATION_REMOTE_2) },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_GYRATION, USB_DEVICE_ID_GYRATION_REMOTE_3) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_KENSINGTON, USB_DEVICE_ID_KS_SLIMBLADE) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_KYE, USB_DEVICE_ID_KYE_ERGO_525V) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_LABTEC, USB_DEVICE_ID_LABTEC_WIRELESS_KEYBOARD) },
@@ -1333,10 +1345,14 @@
 	{ HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_WIRELESS_OPTICAL_DESKTOP_3_0) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_MONTEREY, USB_DEVICE_ID_GENIUS_KB29E) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN) },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_ORTEK, USB_DEVICE_ID_ORTEK_WKB2000) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_PETALYNX, USB_DEVICE_ID_PETALYNX_MAXTER_REMOTE) },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_QUANTA, USB_DEVICE_ID_QUANTA_OPTICAL_TOUCH) },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_QUANTA, USB_DEVICE_ID_PIXART_IMAGING_INC_OPTICAL_TOUCH_SCREEN) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_SAMSUNG, USB_DEVICE_ID_SAMSUNG_IR_REMOTE) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_SONY, USB_DEVICE_ID_SONY_PS3_CONTROLLER) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_SONY, USB_DEVICE_ID_SONY_VAIO_VGX_MOUSE) },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_STANTUM, USB_DEVICE_ID_MTP) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_SUNPLUS, USB_DEVICE_ID_SUNPLUS_WDESKTOP) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_THRUSTMASTER, 0xb300) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_THRUSTMASTER, 0xb304) },
@@ -1539,8 +1555,9 @@
 	{ HID_USB_DEVICE(USB_VENDOR_ID_AIPTEK, USB_DEVICE_ID_AIPTEK_24) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_AIRCABLE, USB_DEVICE_ID_AIRCABLE1) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_ALCOR, USB_DEVICE_ID_ALCOR_USBRS232) },
-	{ HID_USB_DEVICE(USB_VENDOR_ID_ASUS, USB_DEVICE_ID_ASUS_LCM)},
-	{ HID_USB_DEVICE(USB_VENDOR_ID_ASUS, USB_DEVICE_ID_ASUS_LCM2)},
+	{ HID_USB_DEVICE(USB_VENDOR_ID_ASUS, USB_DEVICE_ID_ASUS_T91MT)},
+	{ HID_USB_DEVICE(USB_VENDOR_ID_ASUSTEK, USB_DEVICE_ID_ASUSTEK_LCM)},
+	{ HID_USB_DEVICE(USB_VENDOR_ID_ASUSTEK, USB_DEVICE_ID_ASUSTEK_LCM2)},
 	{ HID_USB_DEVICE(USB_VENDOR_ID_AVERMEDIA, USB_DEVICE_ID_AVER_FM_MR800) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_BERKSHIRE, USB_DEVICE_ID_BERKSHIRE_PCWD) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_CIDC, 0x0103) },
@@ -1655,8 +1672,6 @@
 	{ HID_USB_DEVICE(USB_VENDOR_ID_PANJIT, 0x0004) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_PHILIPS, USB_DEVICE_ID_PHILIPS_IEEE802154_DONGLE) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_POWERCOM, USB_DEVICE_ID_POWERCOM_UPS) },
-	{ HID_USB_DEVICE(USB_VENDOR_ID_TENX, USB_DEVICE_ID_TENX_IBUDDY1) },
-	{ HID_USB_DEVICE(USB_VENDOR_ID_TENX, USB_DEVICE_ID_TENX_IBUDDY2) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_VERNIER, USB_DEVICE_ID_VERNIER_LABPRO) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_VERNIER, USB_DEVICE_ID_VERNIER_GOTEMP) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_VERNIER, USB_DEVICE_ID_VERNIER_SKIP) },
@@ -1702,6 +1717,12 @@
 	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING3_ANSI) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING3_ISO) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING3_JIS) },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING4_ANSI) },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING4_ISO) },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING4_JIS) },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING4A_ANSI) },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING4A_ISO) },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING4A_JIS) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_FOUNTAIN_TP_ONLY) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_GEYSER1_TP_ONLY) },
 	{ }
--- linux-mvl-dove-2.6.32.orig/drivers/hid/hidraw.c
+++ linux-mvl-dove-2.6.32/drivers/hid/hidraw.c
@@ -105,11 +105,15 @@
 static ssize_t hidraw_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
 {
 	unsigned int minor = iminor(file->f_path.dentry->d_inode);
-	/* FIXME: What stops hidraw_table going NULL */
-	struct hid_device *dev = hidraw_table[minor]->hid;
+	struct hid_device *dev;
 	__u8 *buf;
 	int ret = 0;
 
+	if (!hidraw_table[minor])
+		return -ENODEV;
+
+	dev = hidraw_table[minor]->hid;
+
 	if (!dev->hid_output_raw_report)
 		return -ENODEV;
 
@@ -207,11 +211,14 @@
 	unsigned int minor = iminor(inode);
 	struct hidraw *dev;
 	struct hidraw_list *list = file->private_data;
+	int ret;
 
+	mutex_lock(&minors_lock);
 	if (!hidraw_table[minor]) {
 		printk(KERN_EMERG "hidraw device with minor %d doesn't exist\n",
 				minor);
-		return -ENODEV;
+		ret = -ENODEV;
+		goto unlock;
 	}
 
 	list_del(&list->node);
@@ -225,10 +232,12 @@
 			kfree(list->hidraw);
 		}
 	}
-
 	kfree(list);
+	ret = 0;
+unlock:
+	mutex_unlock(&minors_lock);
 
-	return 0;
+	return ret;
 }
 
 static long hidraw_ioctl(struct file *file, unsigned int cmd,
@@ -237,11 +246,16 @@
 	struct inode *inode = file->f_path.dentry->d_inode;
 	unsigned int minor = iminor(inode);
 	long ret = 0;
-	/* FIXME: What stops hidraw_table going NULL */
-	struct hidraw *dev = hidraw_table[minor];
+	struct hidraw *dev;
 	void __user *user_arg = (void __user*) arg;
 
 	lock_kernel();
+	dev = hidraw_table[minor];
+	if (!dev) {
+		ret = -ENODEV;
+		goto out;
+	}
+
 	switch (cmd) {
 		case HIDIOCGRDESCSIZE:
 			if (put_user(dev->hid->rsize, (int __user *)arg))
@@ -314,6 +328,7 @@
 
 		ret = -ENOTTY;
 	}
+out:
 	unlock_kernel();
 	return ret;
 }
--- linux-mvl-dove-2.6.32.orig/drivers/hid/usbhid/hid-quirks.c
+++ linux-mvl-dove-2.6.32/drivers/hid/usbhid/hid-quirks.c
@@ -37,6 +37,7 @@
 	{ USB_VENDOR_ID_HAPP, USB_DEVICE_ID_UGCI_FIGHTING, HID_QUIRK_BADPAD | HID_QUIRK_MULTI_INPUT },
 	{ USB_VENDOR_ID_NATSU, USB_DEVICE_ID_NATSU_GAMEPAD, HID_QUIRK_BADPAD },
 	{ USB_VENDOR_ID_NEC, USB_DEVICE_ID_NEC_USB_GAME_PAD, HID_QUIRK_BADPAD },
+	{ USB_VENDOR_ID_NEXTWINDOW, USB_DEVICE_ID_NEXTWINDOW_TOUCHSCREEN, HID_QUIRK_MULTI_INPUT},
 	{ USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_RUMBLEPAD, HID_QUIRK_BADPAD },
 	{ USB_VENDOR_ID_TOPMAX, USB_DEVICE_ID_TOPMAX_COBRAPAD, HID_QUIRK_BADPAD },
 
@@ -280,7 +281,7 @@
 	if (idVendor == USB_VENDOR_ID_NCR &&
 			idProduct >= USB_DEVICE_ID_NCR_FIRST &&
 			idProduct <= USB_DEVICE_ID_NCR_LAST)
-			return HID_QUIRK_NOGET;
+			return HID_QUIRK_NO_INIT_REPORTS;
 
 	down_read(&dquirks_rwsem);
 	bl_entry = usbhid_exists_dquirk(idVendor, idProduct);
--- linux-mvl-dove-2.6.32.orig/drivers/hid/usbhid/usbhid.h
+++ linux-mvl-dove-2.6.32/drivers/hid/usbhid/usbhid.h
@@ -80,12 +80,14 @@
 	unsigned char ctrlhead, ctrltail;                               /* Control fifo head & tail */
 	char *ctrlbuf;                                                  /* Control buffer */
 	dma_addr_t ctrlbuf_dma;                                         /* Control buffer dma */
+	unsigned long last_ctrl;						/* record of last output for timeouts */
 
 	struct urb *urbout;                                             /* Output URB */
 	struct hid_output_fifo out[HID_CONTROL_FIFO_SIZE];              /* Output pipe fifo */
 	unsigned char outhead, outtail;                                 /* Output pipe fifo head & tail */
 	char *outbuf;                                                   /* Output buffer */
 	dma_addr_t outbuf_dma;                                          /* Output buffer dma */
+	unsigned long last_out;							/* record of last output for timeouts */
 
 	spinlock_t lock;						/* fifo spinlock */
 	unsigned long iofl;                                             /* I/O flags (CTRL_RUNNING, OUT_RUNNING) */
--- linux-mvl-dove-2.6.32.orig/drivers/hid/usbhid/hid-core.c
+++ linux-mvl-dove-2.6.32/drivers/hid/usbhid/hid-core.c
@@ -318,6 +318,7 @@
 			err_hid("usb_submit_urb(out) failed");
 			return -1;
 		}
+		usbhid->last_out = jiffies;
 	} else {
 		/*
 		 * queue work to wake up the device.
@@ -379,6 +380,7 @@
 			err_hid("usb_submit_urb(ctrl) failed");
 			return -1;
 		}
+		usbhid->last_ctrl = jiffies;
 	} else {
 		/*
 		 * queue work to wake up the device.
@@ -514,9 +516,20 @@
 		usbhid->out[usbhid->outhead].report = report;
 		usbhid->outhead = head;
 
-		if (!test_and_set_bit(HID_OUT_RUNNING, &usbhid->iofl))
+		if (!test_and_set_bit(HID_OUT_RUNNING, &usbhid->iofl)) {
 			if (hid_submit_out(hid))
 				clear_bit(HID_OUT_RUNNING, &usbhid->iofl);
+		} else {
+			/*
+			 * the queue is known to run
+			 * but an earlier request may be stuck
+			 * we may need to time out
+			 * no race because this is called under
+			 * spinlock
+			 */
+			if (time_after(jiffies, usbhid->last_out + HZ * 5))
+				usb_unlink_urb(usbhid->urbout);
+		}
 		return;
 	}
 
@@ -537,9 +550,20 @@
 	usbhid->ctrl[usbhid->ctrlhead].dir = dir;
 	usbhid->ctrlhead = head;
 
-	if (!test_and_set_bit(HID_CTRL_RUNNING, &usbhid->iofl))
+	if (!test_and_set_bit(HID_CTRL_RUNNING, &usbhid->iofl)) {
 		if (hid_submit_ctrl(hid))
 			clear_bit(HID_CTRL_RUNNING, &usbhid->iofl);
+	} else {
+		/*
+		 * the queue is known to run
+		 * but an earlier request may be stuck
+		 * we may need to time out
+		 * no race because this is called under
+		 * spinlock
+		 */
+		if (time_after(jiffies, usbhid->last_ctrl + HZ * 5))
+			usb_unlink_urb(usbhid->urbctrl);
+	}
 }
 
 void usbhid_submit_report(struct hid_device *hid, struct hid_report *report, unsigned char dir)
@@ -976,16 +1000,6 @@
 		}
 	}
 
-	init_waitqueue_head(&usbhid->wait);
-	INIT_WORK(&usbhid->reset_work, hid_reset);
-	INIT_WORK(&usbhid->restart_work, __usbhid_restart_queues);
-	setup_timer(&usbhid->io_retry, hid_retry_timeout, (unsigned long) hid);
-
-	spin_lock_init(&usbhid->lock);
-
-	usbhid->intf = intf;
-	usbhid->ifnum = interface->desc.bInterfaceNumber;
-
 	usbhid->urbctrl = usb_alloc_urb(0, GFP_KERNEL);
 	if (!usbhid->urbctrl) {
 		ret = -ENOMEM;
@@ -998,7 +1012,8 @@
 	usbhid->urbctrl->transfer_dma = usbhid->ctrlbuf_dma;
 	usbhid->urbctrl->transfer_flags |= (URB_NO_TRANSFER_DMA_MAP | URB_NO_SETUP_DMA_MAP);
 
-	usbhid_init_reports(hid);
+	if (!(hid->quirks & HID_QUIRK_NO_INIT_REPORTS))
+		usbhid_init_reports(hid);
 
 	set_bit(HID_STARTED, &usbhid->iofl);
 
@@ -1155,6 +1170,14 @@
 
 	hid->driver_data = usbhid;
 	usbhid->hid = hid;
+	usbhid->intf = intf;
+	usbhid->ifnum = interface->desc.bInterfaceNumber;
+
+	init_waitqueue_head(&usbhid->wait);
+	INIT_WORK(&usbhid->reset_work, hid_reset);
+	INIT_WORK(&usbhid->restart_work, __usbhid_restart_queues);
+	setup_timer(&usbhid->io_retry, hid_retry_timeout, (unsigned long) hid);
+	spin_lock_init(&usbhid->lock);
 
 	ret = hid_add_device(hid);
 	if (ret) {
--- linux-mvl-dove-2.6.32.orig/drivers/pci/setup-bus.c
+++ linux-mvl-dove-2.6.32/drivers/pci/setup-bus.c
@@ -142,7 +142,6 @@
 	struct pci_dev *bridge = bus->self;
 	struct pci_bus_region region;
 	u32 l, bu, lu, io_upper16;
-	int pref_mem64;
 
 	if (pci_is_enabled(bridge))
 		return;
@@ -198,7 +197,6 @@
 	pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, 0);
 
 	/* Set up PREF base/limit. */
-	pref_mem64 = 0;
 	bu = lu = 0;
 	pcibios_resource_to_bus(bridge, &region, bus->resource[2]);
 	if (bus->resource[2]->flags & IORESOURCE_PREFETCH) {
@@ -206,7 +204,6 @@
 		l = (region.start >> 16) & 0xfff0;
 		l |= region.end & 0xfff00000;
 		if (bus->resource[2]->flags & IORESOURCE_MEM_64) {
-			pref_mem64 = 1;
 			bu = upper_32_bits(region.start);
 			lu = upper_32_bits(region.end);
 			width = 16;
@@ -221,11 +218,9 @@
 	}
 	pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, l);
 
-	if (pref_mem64) {
-		/* Set the upper 32 bits of PREF base & limit. */
-		pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32, bu);
-		pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, lu);
-	}
+	/* Set the upper 32 bits of PREF base & limit. */
+	pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32, bu);
+	pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, lu);
 
 	pci_write_config_word(bridge, PCI_BRIDGE_CONTROL, bus->bridge_ctl);
 }
--- linux-mvl-dove-2.6.32.orig/drivers/pci/pci-stub.c
+++ linux-mvl-dove-2.6.32/drivers/pci/pci-stub.c
@@ -54,6 +54,9 @@
 			subdevice = PCI_ANY_ID, class=0, class_mask=0;
 		int fields;
 
+		if (!strlen(id))
+			continue;
+
 		fields = sscanf(id, "%x:%x:%x:%x:%x:%x",
 				&vendor, &device, &subvendor, &subdevice,
 				&class, &class_mask);
--- linux-mvl-dove-2.6.32.orig/drivers/pci/intel-iommu.c
+++ linux-mvl-dove-2.6.32/drivers/pci/intel-iommu.c
@@ -71,6 +71,49 @@
 #define DMA_32BIT_PFN		IOVA_PFN(DMA_BIT_MASK(32))
 #define DMA_64BIT_PFN		IOVA_PFN(DMA_BIT_MASK(64))
 
+/* page table handling */
+#define LEVEL_STRIDE		(9)
+#define LEVEL_MASK		(((u64)1 << LEVEL_STRIDE) - 1)
+
+static inline int agaw_to_level(int agaw)
+{
+	return agaw + 2;
+}
+
+static inline int agaw_to_width(int agaw)
+{
+	return 30 + agaw * LEVEL_STRIDE;
+}
+
+static inline int width_to_agaw(int width)
+{
+	return (width - 30) / LEVEL_STRIDE;
+}
+
+static inline unsigned int level_to_offset_bits(int level)
+{
+	return (level - 1) * LEVEL_STRIDE;
+}
+
+static inline int pfn_level_offset(unsigned long pfn, int level)
+{
+	return (pfn >> level_to_offset_bits(level)) & LEVEL_MASK;
+}
+
+static inline unsigned long level_mask(int level)
+{
+	return -1UL << level_to_offset_bits(level);
+}
+
+static inline unsigned long level_size(int level)
+{
+	return 1UL << level_to_offset_bits(level);
+}
+
+static inline unsigned long align_to_level(unsigned long pfn, int level)
+{
+	return (pfn + level_size(level) - 1) & level_mask(level);
+}
 
 /* VT-d pages must always be _smaller_ than MM pages. Otherwise things
    are never going to work. */
@@ -339,7 +382,7 @@
 int dmar_disabled = 1;
 #endif /*CONFIG_DMAR_DEFAULT_ON*/
 
-static int __initdata dmar_map_gfx = 1;
+static int dmar_map_gfx = 1;
 static int dmar_forcedac;
 static int intel_iommu_strict;
 
@@ -449,8 +492,6 @@
 }
 
 
-static inline int width_to_agaw(int width);
-
 static int __iommu_calculate_agaw(struct intel_iommu *iommu, int max_gaw)
 {
 	unsigned long sagaw;
@@ -664,51 +705,6 @@
 	spin_unlock_irqrestore(&iommu->lock, flags);
 }
 
-/* page table handling */
-#define LEVEL_STRIDE		(9)
-#define LEVEL_MASK		(((u64)1 << LEVEL_STRIDE) - 1)
-
-static inline int agaw_to_level(int agaw)
-{
-	return agaw + 2;
-}
-
-static inline int agaw_to_width(int agaw)
-{
-	return 30 + agaw * LEVEL_STRIDE;
-
-}
-
-static inline int width_to_agaw(int width)
-{
-	return (width - 30) / LEVEL_STRIDE;
-}
-
-static inline unsigned int level_to_offset_bits(int level)
-{
-	return (level - 1) * LEVEL_STRIDE;
-}
-
-static inline int pfn_level_offset(unsigned long pfn, int level)
-{
-	return (pfn >> level_to_offset_bits(level)) & LEVEL_MASK;
-}
-
-static inline unsigned long level_mask(int level)
-{
-	return -1UL << level_to_offset_bits(level);
-}
-
-static inline unsigned long level_size(int level)
-{
-	return 1UL << level_to_offset_bits(level);
-}
-
-static inline unsigned long align_to_level(unsigned long pfn, int level)
-{
-	return (pfn + level_size(level) - 1) & level_mask(level);
-}
-
 static struct dma_pte *pfn_to_dma_pte(struct dmar_domain *domain,
 				      unsigned long pfn)
 {
@@ -1523,12 +1519,15 @@
 
 		/* Skip top levels of page tables for
 		 * iommu which has less agaw than default.
+		 * Unnecessary for PT mode.
 		 */
-		for (agaw = domain->agaw; agaw != iommu->agaw; agaw--) {
-			pgd = phys_to_virt(dma_pte_addr(pgd));
-			if (!dma_pte_present(pgd)) {
-				spin_unlock_irqrestore(&iommu->lock, flags);
-				return -ENOMEM;
+		if (translation != CONTEXT_TT_PASS_THROUGH) {
+			for (agaw = domain->agaw; agaw != iommu->agaw; agaw--) {
+				pgd = phys_to_virt(dma_pte_addr(pgd));
+				if (!dma_pte_present(pgd)) {
+					spin_unlock_irqrestore(&iommu->lock, flags);
+					return -ENOMEM;
+				}
 			}
 		}
 	}
@@ -1859,7 +1858,7 @@
 
 	ret = iommu_attach_domain(domain, iommu);
 	if (ret) {
-		domain_exit(domain);
+		free_domain_mem(domain);
 		goto error;
 	}
 
@@ -1991,6 +1990,16 @@
 	       "IOMMU: Setting identity map for device %s [0x%Lx - 0x%Lx]\n",
 	       pci_name(pdev), start, end);
 	
+	if (end < start) {
+		WARN(1, "Your BIOS is broken; RMRR ends before it starts!\n"
+			"BIOS vendor: %s; Ver: %s; Product Version: %s\n",
+			dmi_get_system_info(DMI_BIOS_VENDOR),
+			dmi_get_system_info(DMI_BIOS_VERSION),
+		     dmi_get_system_info(DMI_PRODUCT_VERSION));
+		ret = -EIO;
+		goto error;
+	}
+
 	if (end >> agaw_to_width(domain->agaw)) {
 		WARN(1, "Your BIOS is broken; RMRR exceeds permitted address width (%d bits)\n"
 		     "BIOS vendor: %s; Ver: %s; Product Version: %s\n",
@@ -3228,13 +3237,22 @@
 	struct pci_dev *pdev = to_pci_dev(dev);
 	struct dmar_domain *domain;
 
+	if (iommu_no_mapping(dev))
+		return 0;
+
 	domain = find_domain(pdev);
 	if (!domain)
 		return 0;
 
-	if (action == BUS_NOTIFY_UNBOUND_DRIVER && !iommu_pass_through)
+	if (action == BUS_NOTIFY_UNBOUND_DRIVER && !iommu_pass_through) {
 		domain_remove_one_dev_info(domain, pdev);
 
+		if (!(domain->flags & DOMAIN_FLAG_VIRTUAL_MACHINE) &&
+		    !(domain->flags & DOMAIN_FLAG_STATIC_IDENTITY) &&
+		    list_empty(&domain->devices))
+			domain_exit(domain);
+	}
+
 	return 0;
 }
 
@@ -3381,6 +3399,11 @@
 		domain->iommu_count--;
 		domain_update_iommu_cap(domain);
 		spin_unlock_irqrestore(&domain->iommu_lock, tmp_flags);
+
+		spin_lock_irqsave(&iommu->lock, tmp_flags);
+		clear_bit(domain->id, iommu->domain_ids);
+		iommu->domains[domain->id] = NULL;
+		spin_unlock_irqrestore(&iommu->lock, tmp_flags);
 	}
 
 	spin_unlock_irqrestore(&device_domain_lock, flags);
@@ -3718,6 +3741,12 @@
 	 */
 	printk(KERN_INFO "DMAR: Forcing write-buffer flush capability\n");
 	rwbf_quirk = 1;
+
+	/* https://bugzilla.redhat.com/show_bug.cgi?id=538163 */
+	if (dev->revision == 0x07) {
+		printk(KERN_INFO "DMAR: Disabling IOMMU for graphics on this chipset\n");
+		dmar_map_gfx = 0;
+	}
 }
 
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2a40, quirk_iommu_rwbf);
--- linux-mvl-dove-2.6.32.orig/drivers/pci/proc.c
+++ linux-mvl-dove-2.6.32/drivers/pci/proc.c
@@ -259,7 +259,7 @@
 
 	/* Make sure the caller is mapping a real resource for this device */
 	for (i = 0; i < PCI_ROM_RESOURCE; i++) {
-		if (pci_mmap_fits(dev, i, vma))
+		if (pci_mmap_fits(dev, i, vma,  PCI_MMAP_PROCFS))
 			break;
 	}
 
--- linux-mvl-dove-2.6.32.orig/drivers/pci/dmar.c
+++ linux-mvl-dove-2.6.32/drivers/pci/dmar.c
@@ -582,6 +582,8 @@
 	return 0;
 }
 
+static int bios_warned;
+
 int __init check_zero_address(void)
 {
 	struct acpi_table_dmar *dmar;
@@ -601,6 +603,9 @@
 		}
 
 		if (entry_header->type == ACPI_DMAR_TYPE_HARDWARE_UNIT) {
+			void __iomem *addr;
+			u64 cap, ecap;
+
 			drhd = (void *)entry_header;
 			if (!drhd->address) {
 				/* Promote an attitude of violence to a BIOS engineer today */
@@ -609,17 +614,40 @@
 				     dmi_get_system_info(DMI_BIOS_VENDOR),
 				     dmi_get_system_info(DMI_BIOS_VERSION),
 				     dmi_get_system_info(DMI_PRODUCT_VERSION));
-#ifdef CONFIG_DMAR
-				dmar_disabled = 1;
-#endif
-				return 0;
+				bios_warned = 1;
+				goto failed;
+			}
+
+			addr = early_ioremap(drhd->address, VTD_PAGE_SIZE);
+			if (!addr ) {
+				printk("IOMMU: can't validate: %llx\n", drhd->address);
+				goto failed;
+			}
+			cap = dmar_readq(addr + DMAR_CAP_REG);
+			ecap = dmar_readq(addr + DMAR_ECAP_REG);
+			early_iounmap(addr, VTD_PAGE_SIZE);
+			if (cap == (uint64_t)-1 && ecap == (uint64_t)-1) {
+				/* Promote an attitude of violence to a BIOS engineer today */
+				WARN(1, "Your BIOS is broken; DMAR reported at address %llx returns all ones!\n"
+				     "BIOS vendor: %s; Ver: %s; Product Version: %s\n",
+				      drhd->address,
+				      dmi_get_system_info(DMI_BIOS_VENDOR),
+				      dmi_get_system_info(DMI_BIOS_VERSION),
+				      dmi_get_system_info(DMI_PRODUCT_VERSION));
+				bios_warned = 1;
+				goto failed;
 			}
-			break;
 		}
 
 		entry_header = ((void *)entry_header + entry_header->length);
 	}
 	return 1;
+
+failed:
+#ifdef CONFIG_DMAR
+	dmar_disabled = 1;
+#endif
+	return 0;
 }
 
 void __init detect_intel_iommu(void)
@@ -664,6 +692,18 @@
 	int agaw = 0;
 	int msagaw = 0;
 
+	if (!drhd->reg_base_addr) {
+		if (!bios_warned) {
+			WARN(1, "Your BIOS is broken; DMAR reported at address zero!\n"
+			     "BIOS vendor: %s; Ver: %s; Product Version: %s\n",
+			     dmi_get_system_info(DMI_BIOS_VENDOR),
+			     dmi_get_system_info(DMI_BIOS_VERSION),
+			     dmi_get_system_info(DMI_PRODUCT_VERSION));
+			bios_warned = 1;
+		}
+		return -EINVAL;
+	}
+
 	iommu = kzalloc(sizeof(*iommu), GFP_KERNEL);
 	if (!iommu)
 		return -ENOMEM;
@@ -680,13 +720,16 @@
 	iommu->ecap = dmar_readq(iommu->reg + DMAR_ECAP_REG);
 
 	if (iommu->cap == (uint64_t)-1 && iommu->ecap == (uint64_t)-1) {
-		/* Promote an attitude of violence to a BIOS engineer today */
-		WARN(1, "Your BIOS is broken; DMAR reported at address %llx returns all ones!\n"
-		     "BIOS vendor: %s; Ver: %s; Product Version: %s\n",
-		     drhd->reg_base_addr,
-		     dmi_get_system_info(DMI_BIOS_VENDOR),
-		     dmi_get_system_info(DMI_BIOS_VERSION),
-		     dmi_get_system_info(DMI_PRODUCT_VERSION));
+		if (!bios_warned) {
+			/* Promote an attitude of violence to a BIOS engineer today */
+			WARN(1, "Your BIOS is broken; DMAR reported at address %llx returns all ones!\n"
+			     "BIOS vendor: %s; Ver: %s; Product Version: %s\n",
+			     drhd->reg_base_addr,
+			     dmi_get_system_info(DMI_BIOS_VENDOR),
+			     dmi_get_system_info(DMI_BIOS_VERSION),
+			     dmi_get_system_info(DMI_PRODUCT_VERSION));
+			bios_warned = 1;
+		}
 		goto err_unmap;
 	}
 
@@ -1337,6 +1380,11 @@
 			       (unsigned long long)drhd->reg_base_addr, ret);
 			return -1;
 		}
+
+		/*
+		 * Clear any previous faults.
+		 */
+		dmar_fault(iommu->irq, iommu);
 	}
 
 	return 0;
--- linux-mvl-dove-2.6.32.orig/drivers/pci/pci-sysfs.c
+++ linux-mvl-dove-2.6.32/drivers/pci/pci-sysfs.c
@@ -662,17 +662,21 @@
 
 #ifdef HAVE_PCI_MMAP
 
-int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma)
+int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
+		  enum pci_mmap_api mmap_api)
 {
-	unsigned long nr, start, size;
+	unsigned long nr, start, size, pci_start;
 
+	if (pci_resource_len(pdev, resno) == 0)
+		return 0;
 	nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
 	start = vma->vm_pgoff;
 	size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
-	if (start < size && size - start >= nr)
+	pci_start = (mmap_api == PCI_MMAP_PROCFS) ?
+			pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0;
+	if (start >= pci_start && start < pci_start + size &&
+			start + nr <= pci_start + size)
 		return 1;
-	WARN(1, "process \"%s\" tried to map 0x%08lx-0x%08lx on %s BAR %d (size 0x%08lx)\n",
-		current->comm, start, start+nr, pci_name(pdev), resno, size);
 	return 0;
 }
 
@@ -702,8 +706,14 @@
 	if (i >= PCI_ROM_RESOURCE)
 		return -ENODEV;
 
-	if (!pci_mmap_fits(pdev, i, vma))
+	if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) {
+		WARN(1, "process \"%s\" tried to map 0x%08lx bytes "
+			"at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
+			current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
+			pci_name(pdev), i,
+			pci_resource_start(pdev, i), pci_resource_len(pdev, i));
 		return -EINVAL;
+	}
 
 	/* pci_mmap_page_range() expects the same kind of entry as coming
 	 * from /proc/bus/pci/ which is a "user visible" value. If this is
@@ -929,7 +939,12 @@
 
 	if (val != 1)
 		return -EINVAL;
-	return pci_reset_function(pdev);
+
+	result = pci_reset_function(pdev);
+	if (result < 0)
+		return result;
+
+	return count;
 }
 
 static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
@@ -952,7 +967,7 @@
 		attr->write = write_vpd_attr;
 		retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
 		if (retval) {
-			kfree(dev->vpd->attr);
+			kfree(attr);
 			return retval;
 		}
 		dev->vpd->attr = attr;
--- linux-mvl-dove-2.6.32.orig/drivers/pci/quirks.c
+++ linux-mvl-dove-2.6.32/drivers/pci/quirks.c
@@ -155,6 +155,26 @@
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NEC,	PCI_DEVICE_ID_NEC_CBUS_3,	quirk_isa_dma_hangs);
 
 /*
+ * Intel NM10 "TigerPoint" LPC PM1a_STS.BM_STS must be clear
+ * for some HT machines to use C4 w/o hanging.
+ */
+static void __devinit quirk_tigerpoint_bm_sts(struct pci_dev *dev)
+{
+	u32 pmbase;
+	u16 pm1a;
+
+	pci_read_config_dword(dev, 0x40, &pmbase);
+	pmbase = pmbase & 0xff80;
+	pm1a = inw(pmbase);
+
+	if (pm1a & 0x10) {
+		dev_info(&dev->dev, FW_BUG "TigerPoint LPC.BM_STS cleared\n");
+		outw(0x10, pmbase);
+	}
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TGP_LPC, quirk_tigerpoint_bm_sts);
+
+/*
  *	Chipsets where PCI->PCI transfers vanish or hang
  */
 static void __devinit quirk_nopcipci(struct pci_dev *dev)
@@ -486,6 +506,17 @@
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL,	PCI_DEVICE_ID_INTEL_82371AB_3,	quirk_piix4_acpi);
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL,	PCI_DEVICE_ID_INTEL_82443MX_3,	quirk_piix4_acpi);
 
+#define ICH_PMBASE	0x40
+#define ICH_ACPI_CNTL	0x44
+#define  ICH4_ACPI_EN	0x10
+#define  ICH6_ACPI_EN	0x80
+#define ICH4_GPIOBASE	0x58
+#define ICH4_GPIO_CNTL	0x5c
+#define  ICH4_GPIO_EN	0x10
+#define ICH6_GPIOBASE	0x48
+#define ICH6_GPIO_CNTL	0x4c
+#define  ICH6_GPIO_EN	0x10
+
 /*
  * ICH4, ICH4-M, ICH5, ICH5-M ACPI: Three IO regions pointed to by longwords at
  *	0x40 (128 bytes of ACPI, GPIO & TCO registers)
@@ -494,12 +525,33 @@
 static void __devinit quirk_ich4_lpc_acpi(struct pci_dev *dev)
 {
 	u32 region;
+	u8 enable;
 
-	pci_read_config_dword(dev, 0x40, &region);
-	quirk_io_region(dev, region, 128, PCI_BRIDGE_RESOURCES, "ICH4 ACPI/GPIO/TCO");
+	/*
+	 * The check for PCIBIOS_MIN_IO is to ensure we won't create a conflict
+	 * with low legacy (and fixed) ports. We don't know the decoding
+	 * priority and can't tell whether the legacy device or the one created
+	 * here is really at that address.  This happens on boards with broken
+	 * BIOSes.
+	*/
+
+	pci_read_config_byte(dev, ICH_ACPI_CNTL, &enable);
+	if (enable & ICH4_ACPI_EN) {
+		pci_read_config_dword(dev, ICH_PMBASE, &region);
+		region &= PCI_BASE_ADDRESS_IO_MASK;
+		if (region >= PCIBIOS_MIN_IO)
+			quirk_io_region(dev, region, 128, PCI_BRIDGE_RESOURCES,
+					"ICH4 ACPI/GPIO/TCO");
+	}
 
-	pci_read_config_dword(dev, 0x58, &region);
-	quirk_io_region(dev, region, 64, PCI_BRIDGE_RESOURCES+1, "ICH4 GPIO");
+	pci_read_config_byte(dev, ICH4_GPIO_CNTL, &enable);
+	if (enable & ICH4_GPIO_EN) {
+		pci_read_config_dword(dev, ICH4_GPIOBASE, &region);
+		region &= PCI_BASE_ADDRESS_IO_MASK;
+		if (region >= PCIBIOS_MIN_IO)
+			quirk_io_region(dev, region, 64,
+					PCI_BRIDGE_RESOURCES + 1, "ICH4 GPIO");
+	}
 }
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL,    PCI_DEVICE_ID_INTEL_82801AA_0,		quirk_ich4_lpc_acpi);
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL,    PCI_DEVICE_ID_INTEL_82801AB_0,		quirk_ich4_lpc_acpi);
@@ -515,12 +567,25 @@
 static void __devinit ich6_lpc_acpi_gpio(struct pci_dev *dev)
 {
 	u32 region;
+	u8 enable;
 
-	pci_read_config_dword(dev, 0x40, &region);
-	quirk_io_region(dev, region, 128, PCI_BRIDGE_RESOURCES, "ICH6 ACPI/GPIO/TCO");
+	pci_read_config_byte(dev, ICH_ACPI_CNTL, &enable);
+	if (enable & ICH6_ACPI_EN) {
+		pci_read_config_dword(dev, ICH_PMBASE, &region);
+		region &= PCI_BASE_ADDRESS_IO_MASK;
+		if (region >= PCIBIOS_MIN_IO)
+			quirk_io_region(dev, region, 128, PCI_BRIDGE_RESOURCES,
+					"ICH6 ACPI/GPIO/TCO");
+	}
 
-	pci_read_config_dword(dev, 0x48, &region);
-	quirk_io_region(dev, region, 64, PCI_BRIDGE_RESOURCES+1, "ICH6 GPIO");
+	pci_read_config_byte(dev, ICH6_GPIO_CNTL, &enable);
+	if (enable & ICH4_GPIO_EN) {
+		pci_read_config_dword(dev, ICH6_GPIOBASE, &region);
+		region &= PCI_BASE_ADDRESS_IO_MASK;
+		if (region >= PCIBIOS_MIN_IO)
+			quirk_io_region(dev, region, 64,
+					PCI_BRIDGE_RESOURCES + 1, "ICH6 GPIO");
+	}
 }
 
 static void __devinit ich6_lpc_generic_decode(struct pci_dev *dev, unsigned reg, const char *name, int dynsize)
@@ -1444,7 +1509,8 @@
 	conf5 &= ~(1 << 24);  /* Clear bit 24 */
 
 	switch (pdev->device) {
-	case PCI_DEVICE_ID_JMICRON_JMB360:
+	case PCI_DEVICE_ID_JMICRON_JMB360: /* SATA single port */
+	case PCI_DEVICE_ID_JMICRON_JMB362: /* SATA dual ports */
 		/* The controller should be in single function ahci mode */
 		conf1 |= 0x0002A100; /* Set 8, 13, 15, 17 */
 		break;
@@ -1480,12 +1546,14 @@
 }
 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB360, quirk_jmicron_ata);
 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB361, quirk_jmicron_ata);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB362, quirk_jmicron_ata);
 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB363, quirk_jmicron_ata);
 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB365, quirk_jmicron_ata);
 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB366, quirk_jmicron_ata);
 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB368, quirk_jmicron_ata);
 DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB360, quirk_jmicron_ata);
 DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB361, quirk_jmicron_ata);
+DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB362, quirk_jmicron_ata);
 DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB363, quirk_jmicron_ata);
 DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB365, quirk_jmicron_ata);
 DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB366, quirk_jmicron_ata);
@@ -2081,6 +2149,7 @@
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT3336, quirk_disable_all_msi);
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT3351, quirk_disable_all_msi);
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT3364, quirk_disable_all_msi);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8380_0, quirk_disable_all_msi);
 
 /* Disable MSI on chipsets that are known to not support it */
 static void __devinit quirk_disable_msi(struct pci_dev *dev)
@@ -2092,6 +2161,8 @@
 	}
 }
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE, quirk_disable_msi);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, 0xa238, quirk_disable_msi);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x5a3f, quirk_disable_msi);
 
 /* Go through the list of Hypertransport capabilities and
  * return 1 if a HT MSI capability is found and enabled */
@@ -2183,15 +2254,16 @@
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8132_BRIDGE,
 			 ht_enable_msi_mapping);
 
-/* The P5N32-SLI Premium motherboard from Asus has a problem with msi
+/* The P5N32-SLI motherboards from Asus have a problem with msi
  * for the MCP55 NIC. It is not yet determined whether the msi problem
  * also affects other devices. As for now, turn off msi for this device.
  */
 static void __devinit nvenet_msi_disable(struct pci_dev *dev)
 {
-	if (dmi_name_in_vendors("P5N32-SLI PREMIUM")) {
+	if (dmi_name_in_vendors("P5N32-SLI PREMIUM") ||
+	    dmi_name_in_vendors("P5N32-E SLI")) {
 		dev_info(&dev->dev,
-			 "Disabling msi for MCP55 NIC on P5N32-SLI Premium\n");
+			 "Disabling msi for MCP55 NIC on P5N32-SLI\n");
 		dev->no_msi = 1;
 	}
 }
@@ -2350,6 +2422,9 @@
 	int pos;
 	int found;
 
+	if (!pci_msi_enabled())
+		return;
+
 	/* check if there is HT MSI cap or enabled on this device */
 	found = ht_check_msi_mapping(dev);
 
@@ -2465,56 +2540,15 @@
 
 #endif /* CONFIG_PCI_MSI */
 
-#ifdef CONFIG_PCI_IOV
-
-/*
- * For Intel 82576 SR-IOV NIC, if BIOS doesn't allocate resources for the
- * SR-IOV BARs, zero the Flash BAR and program the SR-IOV BARs to use the
- * old Flash Memory Space.
- */
-static void __devinit quirk_i82576_sriov(struct pci_dev *dev)
+static void __devinit fixup_ti816x_class(struct pci_dev* dev)
 {
-	int pos, flags;
-	u32 bar, start, size;
-
-	if (PAGE_SIZE > 0x10000)
-		return;
-
-	flags = pci_resource_flags(dev, 0);
-	if ((flags & PCI_BASE_ADDRESS_SPACE) !=
-			PCI_BASE_ADDRESS_SPACE_MEMORY ||
-	    (flags & PCI_BASE_ADDRESS_MEM_TYPE_MASK) !=
-			PCI_BASE_ADDRESS_MEM_TYPE_32)
-		return;
-
-	pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
-	if (!pos)
-		return;
-
-	pci_read_config_dword(dev, pos + PCI_SRIOV_BAR, &bar);
-	if (bar & PCI_BASE_ADDRESS_MEM_MASK)
-		return;
-
-	start = pci_resource_start(dev, 1);
-	size = pci_resource_len(dev, 1);
-	if (!start || size != 0x400000 || start & (size - 1))
-		return;
-
-	pci_resource_flags(dev, 1) = 0;
-	pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, 0);
-	pci_write_config_dword(dev, pos + PCI_SRIOV_BAR, start);
-	pci_write_config_dword(dev, pos + PCI_SRIOV_BAR + 12, start + size / 2);
-
-	dev_info(&dev->dev, "use Flash Memory Space for SR-IOV BARs\n");
+	/* TI 816x devices do not have class code set when in PCIe boot mode */
+	if (dev->class == PCI_CLASS_NOT_DEFINED) {
+		dev_info(&dev->dev, "Setting PCI class for 816x PCIe device\n");
+		dev->class = PCI_CLASS_MULTIMEDIA_VIDEO;
+	}
 }
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x10c9, quirk_i82576_sriov);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x10e6, quirk_i82576_sriov);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x10e7, quirk_i82576_sriov);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x10e8, quirk_i82576_sriov);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x150a, quirk_i82576_sriov);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x150d, quirk_i82576_sriov);
-
-#endif	/* CONFIG_PCI_IOV */
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_TI, 0xb800, fixup_ti816x_class);
 
 static void pci_do_fixups(struct pci_dev *dev, struct pci_fixup *f,
 			  struct pci_fixup *end)
@@ -2544,6 +2578,29 @@
 extern struct pci_fixup __start_pci_fixups_suspend[];
 extern struct pci_fixup __end_pci_fixups_suspend[];
 
+#if defined(CONFIG_DMAR) || defined(CONFIG_INTR_REMAP)
+#define VTUNCERRMSK_REG	0x1ac
+#define VTD_MSK_SPEC_ERRORS	(1 << 31)
+/*
+ * This is a quirk for masking vt-d spec defined errors to platform error
+ * handling logic. With out this, platforms using Intel 7500, 5500 chipsets
+ * (and the derivative chipsets like X58 etc) seem to generate NMI/SMI (based
+ * on the RAS config settings of the platform) when a vt-d fault happens.
+ * The resulting SMI caused the system to hang.
+ *
+ * VT-d spec related errors are already handled by the VT-d OS code, so no
+ * need to report the same error through other channels.
+ */
+static void vtd_mask_spec_errors(struct pci_dev *dev)
+{
+	u32 word;
+
+	pci_read_config_dword(dev, VTUNCERRMSK_REG, &word);
+	pci_write_config_dword(dev, VTUNCERRMSK_REG, word | VTD_MSK_SPEC_ERRORS);
+}
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x342e, vtd_mask_spec_errors);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x3c28, vtd_mask_spec_errors);
+#endif
 
 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev)
 {
--- linux-mvl-dove-2.6.32.orig/drivers/pci/pci.c
+++ linux-mvl-dove-2.6.32/drivers/pci/pci.c
@@ -373,8 +373,12 @@
 			continue;	/* Wrong type */
 		if (!((res->flags ^ r->flags) & IORESOURCE_PREFETCH))
 			return r;	/* Exact match */
-		if ((res->flags & IORESOURCE_PREFETCH) && !(r->flags & IORESOURCE_PREFETCH))
-			best = r;	/* Approximating prefetchable by non-prefetchable */
+		/* We can't insert a non-prefetch resource inside a prefetchable parent .. */
+		if (r->flags & IORESOURCE_PREFETCH)
+			continue;
+		/* .. but we can put a prefetchable resource inside a non-prefetchable one */
+		if (!best)
+			best = r;
 	}
 	return best;
 }
@@ -601,7 +605,7 @@
  */
 int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state)
 {
-	return state > PCI_D0 ?
+	return state >= PCI_D0 ?
 			pci_platform_power_transition(dev, state) : -EINVAL;
 }
 EXPORT_SYMBOL_GPL(__pci_complete_power_transition);
@@ -638,10 +642,6 @@
 		 */
 		return 0;
 
-	/* Check if we're already there */
-	if (dev->current_state == state)
-		return 0;
-
 	__pci_start_power_transition(dev, state);
 
 	/* This device is quirked not to be put into D3, so
@@ -1507,7 +1507,7 @@
 {
 	int pos;
 	u32 cap;
-	u16 ctrl;
+	u16 flags, ctrl;
 	struct pci_dev *bridge;
 
 	if (!dev->is_pcie || dev->devfn)
@@ -1525,6 +1525,11 @@
 	if (!pos)
 		return;
 
+	/* ARI is a PCIe v2 feature */
+	pci_read_config_word(bridge, pos + PCI_EXP_FLAGS, &flags);
+	if ((flags & PCI_EXP_FLAGS_VERS) < 2)
+		return;
+
 	pci_read_config_dword(bridge, pos + PCI_EXP_DEVCAP2, &cap);
 	if (!(cap & PCI_EXP_DEVCAP2_ARI))
 		return;
@@ -2050,6 +2055,7 @@
 		pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control);
 	}
 }
+EXPORT_SYMBOL_GPL(pci_msi_off);
 
 #ifndef HAVE_ARCH_PCI_SET_DMA_MASK
 /*
@@ -2350,18 +2356,17 @@
  */
 int pcix_get_max_mmrbc(struct pci_dev *dev)
 {
-	int err, cap;
+	int cap;
 	u32 stat;
 
 	cap = pci_find_capability(dev, PCI_CAP_ID_PCIX);
 	if (!cap)
 		return -EINVAL;
 
-	err = pci_read_config_dword(dev, cap + PCI_X_STATUS, &stat);
-	if (err)
+	if (pci_read_config_dword(dev, cap + PCI_X_STATUS, &stat))
 		return -EINVAL;
 
-	return (stat & PCI_X_STATUS_MAX_READ) >> 12;
+	return 512 << ((stat & PCI_X_STATUS_MAX_READ) >> 21);
 }
 EXPORT_SYMBOL(pcix_get_max_mmrbc);
 
@@ -2374,18 +2379,17 @@
  */
 int pcix_get_mmrbc(struct pci_dev *dev)
 {
-	int ret, cap;
-	u32 cmd;
+	int cap;
+	u16 cmd;
 
 	cap = pci_find_capability(dev, PCI_CAP_ID_PCIX);
 	if (!cap)
 		return -EINVAL;
 
-	ret = pci_read_config_dword(dev, cap + PCI_X_CMD, &cmd);
-	if (!ret)
-		ret = 512 << ((cmd & PCI_X_CMD_MAX_READ) >> 2);
+	if (pci_read_config_word(dev, cap + PCI_X_CMD, &cmd))
+		return -EINVAL;
 
-	return ret;
+	return 512 << ((cmd & PCI_X_CMD_MAX_READ) >> 2);
 }
 EXPORT_SYMBOL(pcix_get_mmrbc);
 
@@ -2400,28 +2404,27 @@
  */
 int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc)
 {
-	int cap, err = -EINVAL;
-	u32 stat, cmd, v, o;
+	int cap;
+	u32 stat, v, o;
+	u16 cmd;
 
 	if (mmrbc < 512 || mmrbc > 4096 || !is_power_of_2(mmrbc))
-		goto out;
+		return -EINVAL;
 
 	v = ffs(mmrbc) - 10;
 
 	cap = pci_find_capability(dev, PCI_CAP_ID_PCIX);
 	if (!cap)
-		goto out;
+		return -EINVAL;
 
-	err = pci_read_config_dword(dev, cap + PCI_X_STATUS, &stat);
-	if (err)
-		goto out;
+	if (pci_read_config_dword(dev, cap + PCI_X_STATUS, &stat))
+		return -EINVAL;
 
 	if (v > (stat & PCI_X_STATUS_MAX_READ) >> 21)
 		return -E2BIG;
 
-	err = pci_read_config_dword(dev, cap + PCI_X_CMD, &cmd);
-	if (err)
-		goto out;
+	if (pci_read_config_word(dev, cap + PCI_X_CMD, &cmd))
+		return -EINVAL;
 
 	o = (cmd & PCI_X_CMD_MAX_READ) >> 2;
 	if (o != v) {
@@ -2431,10 +2434,10 @@
 
 		cmd &= ~PCI_X_CMD_MAX_READ;
 		cmd |= v << 2;
-		err = pci_write_config_dword(dev, cap + PCI_X_CMD, cmd);
+		if (pci_write_config_word(dev, cap + PCI_X_CMD, cmd))
+			return -EIO;
 	}
-out:
-	return err;
+	return 0;
 }
 EXPORT_SYMBOL(pcix_set_mmrbc);
 
@@ -2544,6 +2547,23 @@
 	return 0;
 }
 
+/* Some architectures require additional programming to enable VGA */
+static arch_set_vga_state_t arch_set_vga_state;
+
+void __init pci_register_set_vga_state(arch_set_vga_state_t func)
+{
+	arch_set_vga_state = func;	/* NULL disables */
+}
+
+static int pci_set_vga_state_arch(struct pci_dev *dev, bool decode,
+		      unsigned int command_bits, bool change_bridge)
+{
+	if (arch_set_vga_state)
+		return arch_set_vga_state(dev, decode, command_bits,
+						change_bridge);
+	return 0;
+}
+
 /**
  * pci_set_vga_state - set VGA decode state on device and parents if requested
  * @dev: the PCI device
@@ -2557,9 +2577,15 @@
 	struct pci_bus *bus;
 	struct pci_dev *bridge;
 	u16 cmd;
+	int rc;
 
 	WARN_ON(command_bits & ~(PCI_COMMAND_IO|PCI_COMMAND_MEMORY));
 
+	/* ARCH specific VGA enables */
+	rc = pci_set_vga_state_arch(dev, decode, command_bits, change_bridge);
+	if (rc)
+		return rc;
+
 	pci_read_config_word(dev, PCI_COMMAND, &cmd);
 	if (decode == true)
 		cmd |= command_bits;
@@ -2723,6 +2749,11 @@
 	return 1;
 }
 
+void __weak pci_fixup_cardbus(struct pci_bus *bus)
+{
+}
+EXPORT_SYMBOL(pci_fixup_cardbus);
+
 static int __init pci_setup(char *str)
 {
 	while (str) {
@@ -2801,4 +2832,3 @@
 EXPORT_SYMBOL(pci_prepare_to_sleep);
 EXPORT_SYMBOL(pci_back_from_sleep);
 EXPORT_SYMBOL_GPL(pci_set_pcie_reset_state);
-
--- linux-mvl-dove-2.6.32.orig/drivers/pci/pci.h
+++ linux-mvl-dove-2.6.32/drivers/pci/pci.h
@@ -13,8 +13,13 @@
 extern void pci_remove_sysfs_dev_files(struct pci_dev *pdev);
 extern void pci_cleanup_rom(struct pci_dev *dev);
 #ifdef HAVE_PCI_MMAP
+enum pci_mmap_api {
+	PCI_MMAP_SYSFS,	/* mmap on /sys/bus/pci/devices/<BDF>/resource<N> */
+	PCI_MMAP_PROCFS	/* mmap on /proc/bus/pci/<BDF> */
+};
 extern int pci_mmap_fits(struct pci_dev *pdev, int resno,
-			 struct vm_area_struct *vma);
+			 struct vm_area_struct *vmai,
+			 enum pci_mmap_api mmap_api);
 #endif
 int pci_probe_reset_function(struct pci_dev *dev);
 
--- linux-mvl-dove-2.6.32.orig/drivers/pci/msi.c
+++ linux-mvl-dove-2.6.32/drivers/pci/msi.c
@@ -195,6 +195,9 @@
 void read_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg)
 {
 	struct msi_desc *entry = get_irq_desc_msi(desc);
+
+	BUG_ON(entry->dev->current_state != PCI_D0);
+
 	if (entry->msi_attrib.is_msix) {
 		void __iomem *base = entry->mask_base +
 			entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
@@ -228,10 +231,32 @@
 	read_msi_msg_desc(desc, msg);
 }
 
+void get_cached_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg)
+{
+	struct msi_desc *entry = get_irq_desc_msi(desc);
+
+	/* Assert that the cache is valid, assuming that
+	 * valid messages are not all-zeroes. */
+	BUG_ON(!(entry->msg.address_hi | entry->msg.address_lo |
+		 entry->msg.data));
+
+	*msg = entry->msg;
+}
+
+void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
+{
+	struct irq_desc *desc = irq_to_desc(irq);
+
+	get_cached_msi_msg_desc(desc, msg);
+}
+
 void write_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg)
 {
 	struct msi_desc *entry = get_irq_desc_msi(desc);
-	if (entry->msi_attrib.is_msix) {
+
+	if (entry->dev->current_state != PCI_D0) {
+		/* Don't touch the hardware now */
+	} else if (entry->msi_attrib.is_msix) {
 		void __iomem *base;
 		base = entry->mask_base +
 			entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
--- linux-mvl-dove-2.6.32.orig/drivers/pci/hotplug/acpiphp_glue.c
+++ linux-mvl-dove-2.6.32/drivers/pci/hotplug/acpiphp_glue.c
@@ -213,6 +213,7 @@
 
 	pdev = pci_get_slot(pbus, PCI_DEVFN(device, function));
 	if (pdev) {
+		pdev->current_state = PCI_D0;
 		slot->flags |= (SLOT_ENABLED | SLOT_POWEREDON);
 		pci_dev_put(pdev);
 	}
--- linux-mvl-dove-2.6.32.orig/drivers/pci/hotplug/pcihp_slot.c
+++ linux-mvl-dove-2.6.32/drivers/pci/hotplug/pcihp_slot.c
@@ -158,6 +158,47 @@
 	 */
 }
 
+/* Program PCIE MaxPayload setting on device: ensure parent maxpayload <= device */
+static int pci_set_payload(struct pci_dev *dev)
+{
+       int pos, ppos;
+       u16 pctl, psz;
+       u16 dctl, dsz, dcap, dmax;
+       struct pci_dev *parent;
+
+       parent = dev->bus->self;
+       pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
+       if (!pos)
+               return 0;
+
+       /* Read Device MaxPayload capability and setting */
+       pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &dctl);
+       pci_read_config_word(dev, pos + PCI_EXP_DEVCAP, &dcap);
+       dsz = (dctl & PCI_EXP_DEVCTL_PAYLOAD) >> 5;
+       dmax = (dcap & PCI_EXP_DEVCAP_PAYLOAD);
+
+       /* Read Parent MaxPayload setting */
+       ppos = pci_find_capability(parent, PCI_CAP_ID_EXP);
+       if (!ppos)
+               return 0;
+       pci_read_config_word(parent, ppos + PCI_EXP_DEVCTL, &pctl);
+       psz = (pctl &  PCI_EXP_DEVCTL_PAYLOAD) >> 5;
+
+       /* If parent payload > device max payload -> error
+        * If parent payload > device payload -> set speed
+        * If parent payload <= device payload -> do nothing
+        */
+       if (psz > dmax)
+               return -1;
+       else if (psz > dsz) {
+               dev_info(&dev->dev, "Setting MaxPayload to %d\n", 128 << psz);
+               pci_write_config_word(dev, pos + PCI_EXP_DEVCTL,
+                                     (dctl & ~PCI_EXP_DEVCTL_PAYLOAD) +
+                                     (psz << 5));
+       }
+       return 0;
+}
+
 void pci_configure_slot(struct pci_dev *dev)
 {
 	struct pci_dev *cdev;
@@ -169,6 +210,10 @@
 			(dev->class >> 8) == PCI_CLASS_BRIDGE_PCI)))
 		return;
 
+       ret = pci_set_payload(dev);
+       if (ret)
+               dev_warn(&dev->dev, "could not set device max payload\n");
+
 	memset(&hpp, 0, sizeof(hpp));
 	ret = pci_get_hp_params(dev, &hpp);
 	if (ret)
--- linux-mvl-dove-2.6.32.orig/drivers/pci/hotplug/ibmphp_ebda.c
+++ linux-mvl-dove-2.6.32/drivers/pci/hotplug/ibmphp_ebda.c
@@ -245,7 +245,7 @@
 
 int __init ibmphp_access_ebda (void)
 {
-	u8 format, num_ctlrs, rio_complete, hs_complete;
+	u8 format, num_ctlrs, rio_complete, hs_complete, ebda_sz;
 	u16 ebda_seg, num_entries, next_offset, offset, blk_id, sub_addr, re, rc_id, re_id, base;
 	int rc = 0;
 
@@ -260,7 +260,16 @@
 	iounmap (io_mem);
 	debug ("returned ebda segment: %x\n", ebda_seg);
 	
-	io_mem = ioremap(ebda_seg<<4, 1024);
+	io_mem = ioremap(ebda_seg<<4, 1);
+	if (!io_mem)
+		return -ENOMEM;
+	ebda_sz = readb(io_mem);
+	iounmap(io_mem);
+	debug("ebda size: %d(KiB)\n", ebda_sz);
+	if (ebda_sz == 0)
+		return -ENOMEM;
+
+	io_mem = ioremap(ebda_seg<<4, (ebda_sz * 1024));
 	if (!io_mem )
 		return -ENOMEM;
 	next_offset = 0x180;
--- linux-mvl-dove-2.6.32.orig/drivers/pci/pcie/aer/aer_inject.c
+++ linux-mvl-dove-2.6.32/drivers/pci/pcie/aer/aer_inject.c
@@ -302,7 +302,7 @@
 	unsigned long flags;
 	unsigned int devfn = PCI_DEVFN(einj->dev, einj->fn);
 	int pos_cap_err, rp_pos_cap_err;
-	u32 sever;
+	u32 sever, cor_mask, uncor_mask;
 	int ret = 0;
 
 	dev = pci_get_bus_and_slot(einj->bus, devfn);
@@ -320,6 +320,9 @@
 		goto out_put;
 	}
 	pci_read_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_SEVER, &sever);
+	pci_read_config_dword(dev, pos_cap_err + PCI_ERR_COR_MASK, &cor_mask);
+	pci_read_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_MASK,
+			      &uncor_mask);
 
 	rp_pos_cap_err = pci_find_ext_capability(rpdev, PCI_EXT_CAP_ID_ERR);
 	if (!rp_pos_cap_err) {
@@ -354,6 +357,21 @@
 	err->header_log2 = einj->header_log2;
 	err->header_log3 = einj->header_log3;
 
+	if (einj->cor_status && !(einj->cor_status & ~cor_mask)) {
+		ret = -EINVAL;
+		printk(KERN_WARNING "The correctable error(s) is masked "
+				"by device\n");
+		spin_unlock_irqrestore(&inject_lock, flags);
+		goto out_put;
+	}
+	if (einj->uncor_status && !(einj->uncor_status & ~uncor_mask)) {
+		ret = -EINVAL;
+		printk(KERN_WARNING "The uncorrectable error(s) is masked "
+				"by device\n");
+		spin_unlock_irqrestore(&inject_lock, flags);
+		goto out_put;
+	}
+
 	rperr = __find_aer_error_by_dev(rpdev);
 	if (!rperr) {
 		rperr = rperr_alloc;
@@ -392,8 +410,14 @@
 	if (ret)
 		goto out_put;
 
-	if (find_aer_device(rpdev, &edev))
+	if (find_aer_device(rpdev, &edev)) {
+		if (!get_service_data(edev)) {
+			printk(KERN_WARNING "AER service is not initialized\n");
+			ret = -EINVAL;
+			goto out_put;
+		}
 		aer_irq(-1, edev);
+	}
 	else
 		ret = -EINVAL;
 out_put:
--- linux-mvl-dove-2.6.32.orig/drivers/pci/pcie/aer/aerdrv_core.c
+++ linux-mvl-dove-2.6.32/drivers/pci/pcie/aer/aerdrv_core.c
@@ -78,19 +78,15 @@
 int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev)
 {
 	int pos;
-	u32 status, mask;
+	u32 status;
 
 	pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
 	if (!pos)
 		return -EIO;
 
 	pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, &status);
-	pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, &mask);
-	if (dev->error_state == pci_channel_io_normal)
-		status &= ~mask; /* Clear corresponding nonfatal bits */
-	else
-		status &= mask; /* Clear corresponding fatal bits */
-	pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, status);
+	if (status)
+		pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, status);
 
 	return 0;
 }
--- linux-mvl-dove-2.6.32.orig/drivers/firmware/dcdbas.c
+++ linux-mvl-dove-2.6.32/drivers/firmware/dcdbas.c
@@ -267,8 +267,10 @@
 	}
 
 	/* generate SMI */
+	/* inb to force posted write through and make SMI happen now */
 	asm volatile (
-		"outb %b0,%w1"
+		"outb %b0,%w1\n"
+		"inb %w1"
 		: /* no output args */
 		: "a" (smi_cmd->command_code),
 		  "d" (smi_cmd->command_address),
--- linux-mvl-dove-2.6.32.orig/drivers/firmware/dmi_scan.c
+++ linux-mvl-dove-2.6.32/drivers/firmware/dmi_scan.c
@@ -429,7 +429,7 @@
 	for (i = 0; i < ARRAY_SIZE(dmi->matches); i++) {
 		int s = dmi->matches[i].slot;
 		if (s == DMI_NONE)
-			continue;
+			break;
 		if (dmi_ident[s]
 		    && strstr(dmi_ident[s], dmi->matches[i].substr))
 			continue;
@@ -440,6 +440,15 @@
 }
 
 /**
+ *	dmi_is_end_of_table - check for end-of-table marker
+ *	@dmi: pointer to the dmi_system_id structure to check
+ */
+static bool dmi_is_end_of_table(const struct dmi_system_id *dmi)
+{
+	return dmi->matches[0].slot == DMI_NONE;
+}
+
+/**
  *	dmi_check_system - check system DMI data
  *	@list: array of dmi_system_id structures to match against
  *		All non-null elements of the list must match
@@ -457,7 +466,7 @@
 	int count = 0;
 	const struct dmi_system_id *d;
 
-	for (d = list; d->ident; d++)
+	for (d = list; !dmi_is_end_of_table(d); d++)
 		if (dmi_matches(d)) {
 			count++;
 			if (d->callback && d->callback(d))
@@ -484,7 +493,7 @@
 {
 	const struct dmi_system_id *d;
 
-	for (d = list; d->ident; d++)
+	for (d = list; !dmi_is_end_of_table(d); d++)
 		if (dmi_matches(d))
 			return d;
 
--- linux-mvl-dove-2.6.32.orig/drivers/firewire/ohci.c
+++ linux-mvl-dove-2.6.32/drivers/firewire/ohci.c
@@ -628,7 +628,7 @@
 	d = &ab->descriptor;
 
 	if (d->res_count == 0) {
-		size_t size, rest, offset;
+		size_t size, size2, rest, pktsize, size3, offset;
 		dma_addr_t start_bus;
 		void *start;
 
@@ -639,25 +639,61 @@
 		 */
 
 		offset = offsetof(struct ar_buffer, data);
-		start = buffer = ab;
+		start = ab;
 		start_bus = le32_to_cpu(ab->descriptor.data_address) - offset;
+		buffer = ab->data;
 
 		ab = ab->next;
 		d = &ab->descriptor;
-		size = buffer + PAGE_SIZE - ctx->pointer;
+		size = start + PAGE_SIZE - ctx->pointer;
+		/* valid buffer data in the next page */
 		rest = le16_to_cpu(d->req_count) - le16_to_cpu(d->res_count);
+		/* what actually fits in this page */
+		size2 = min(rest, (size_t)PAGE_SIZE - offset - size);
 		memmove(buffer, ctx->pointer, size);
-		memcpy(buffer + size, ab->data, rest);
-		ctx->current_buffer = ab;
-		ctx->pointer = (void *) ab->data + rest;
-		end = buffer + size + rest;
+		memcpy(buffer + size, ab->data, size2);
 
-		while (buffer < end)
-			buffer = handle_ar_packet(ctx, buffer);
+		while (size > 0) {
+			void *next = handle_ar_packet(ctx, buffer);
+			pktsize = next - buffer;
+			if (pktsize >= size) {
+				/*
+				 * We have handled all the data that was
+				 * originally in this page, so we can now
+				 * continue in the next page.
+				 */
+				buffer = next;
+				break;
+			}
+			/* move the next packet to the start of the buffer */
+			memmove(buffer, next, size + size2 - pktsize);
+			size -= pktsize;
+			/* fill up this page again */
+			size3 = min(rest - size2,
+				    (size_t)PAGE_SIZE - offset - size - size2);
+			memcpy(buffer + size + size2,
+			       (void *) ab->data + size2, size3);
+			size2 += size3;
+		}
 
-		dma_free_coherent(ohci->card.device, PAGE_SIZE,
-				  start, start_bus);
-		ar_context_add_page(ctx);
+		if (rest > 0) {
+			/* handle the packets that are fully in the next page */
+			buffer = (void *) ab->data +
+					(buffer - (start + offset + size));
+			end = (void *) ab->data + rest;
+
+			while (buffer < end)
+				buffer = handle_ar_packet(ctx, buffer);
+
+			ctx->current_buffer = ab;
+			ctx->pointer = end;
+
+			dma_free_coherent(ohci->card.device, PAGE_SIZE,
+					  start, start_bus);
+			ar_context_add_page(ctx);
+		} else {
+			ctx->pointer = start + PAGE_SIZE;
+		}
 	} else {
 		buffer = ctx->pointer;
 		ctx->pointer = end =
@@ -2209,6 +2245,13 @@
 	page     = payload >> PAGE_SHIFT;
 	offset   = payload & ~PAGE_MASK;
 	rest     = p->payload_length;
+	/*
+	 * The controllers I've tested have not worked correctly when
+	 * second_req_count is zero.  Rather than do something we know won't
+	 * work, return an error
+	 */
+	if (rest == 0)
+		return -EINVAL;
 
 	/* FIXME: make packet-per-buffer/dual-buffer a context option */
 	while (rest > 0) {
@@ -2262,7 +2305,7 @@
 					unsigned long payload)
 {
 	struct iso_context *ctx = container_of(base, struct iso_context, base);
-	struct descriptor *d = NULL, *pd = NULL;
+	struct descriptor *d, *pd;
 	struct fw_iso_packet *p = packet;
 	dma_addr_t d_bus, page_bus;
 	u32 z, header_z, rest;
@@ -2300,8 +2343,9 @@
 		d->data_address = cpu_to_le32(d_bus + (z * sizeof(*d)));
 
 		rest = payload_per_buffer;
+		pd = d;
 		for (j = 1; j < z; j++) {
-			pd = d + j;
+			pd++;
 			pd->control = cpu_to_le16(DESCRIPTOR_STATUS |
 						  DESCRIPTOR_INPUT_MORE);
 
@@ -2404,6 +2448,7 @@
 
 #define PCI_VENDOR_ID_AGERE		PCI_VENDOR_ID_ATT
 #define PCI_DEVICE_ID_AGERE_FW643	0x5901
+#define PCI_DEVICE_ID_TI_TSB43AB23	0x8024
 
 static int __devinit pci_probe(struct pci_dev *dev,
 			       const struct pci_device_id *ent)
@@ -2469,7 +2514,8 @@
 #if !defined(CONFIG_X86_32)
 	/* dual-buffer mode is broken with descriptor addresses above 2G */
 	if (dev->vendor == PCI_VENDOR_ID_TI &&
-	    dev->device == PCI_DEVICE_ID_TI_TSB43AB22)
+	    (dev->device == PCI_DEVICE_ID_TI_TSB43AB22 ||
+	     dev->device == PCI_DEVICE_ID_TI_TSB43AB23))
 		ohci->use_dualbuffer = false;
 #endif
 
--- linux-mvl-dove-2.6.32.orig/drivers/firewire/core-device.c
+++ linux-mvl-dove-2.6.32/drivers/firewire/core-device.c
@@ -463,6 +463,7 @@
 		return -ENOMEM;
 
 	stack = &rom[READ_BIB_ROM_SIZE];
+	memset(rom, 0, sizeof(*rom) * READ_BIB_ROM_SIZE);
 
 	device->max_speed = SCODE_100;
 
--- linux-mvl-dove-2.6.32.orig/drivers/firewire/core-card.c
+++ linux-mvl-dove-2.6.32/drivers/firewire/core-card.c
@@ -57,6 +57,9 @@
 static LIST_HEAD(descriptor_list);
 static int descriptor_count;
 
+/* ROM header, bus info block, root dir header, capabilities = 7 quadlets */
+static size_t config_rom_length = 1 + 4 + 1 + 1;
+
 #define BIB_CRC(v)		((v) <<  0)
 #define BIB_CRC_LENGTH(v)	((v) << 16)
 #define BIB_INFO_LENGTH(v)	((v) << 24)
@@ -72,7 +75,7 @@
 #define BIB_CMC			((1) << 30)
 #define BIB_IMC			((1) << 31)
 
-static u32 *generate_config_rom(struct fw_card *card, size_t *config_rom_length)
+static u32 *generate_config_rom(struct fw_card *card)
 {
 	struct fw_descriptor *desc;
 	static u32 config_rom[256];
@@ -131,7 +134,7 @@
 	for (i = 0; i < j; i += length + 1)
 		length = fw_compute_block_crc(config_rom + i);
 
-	*config_rom_length = j;
+	WARN_ON(j != config_rom_length);
 
 	return config_rom;
 }
@@ -140,17 +143,24 @@
 {
 	struct fw_card *card;
 	u32 *config_rom;
-	size_t length;
 
 	list_for_each_entry (card, &card_list, link) {
-		config_rom = generate_config_rom(card, &length);
-		card->driver->set_config_rom(card, config_rom, length);
+		config_rom = generate_config_rom(card);
+		card->driver->set_config_rom(card, config_rom,
+					     config_rom_length);
 	}
 }
 
+static size_t required_space(struct fw_descriptor *desc)
+{
+	/* descriptor + entry into root dir + optional immediate entry */
+	return desc->length + 1 + (desc->immediate > 0 ? 1 : 0);
+}
+
 int fw_core_add_descriptor(struct fw_descriptor *desc)
 {
 	size_t i;
+	int ret;
 
 	/*
 	 * Check descriptor is valid; the length of all blocks in the
@@ -166,15 +176,21 @@
 
 	mutex_lock(&card_mutex);
 
-	list_add_tail(&desc->link, &descriptor_list);
-	descriptor_count++;
-	if (desc->immediate > 0)
+	if (config_rom_length + required_space(desc) > 256) {
+		ret = -EBUSY;
+	} else {
+		list_add_tail(&desc->link, &descriptor_list);
+		config_rom_length += required_space(desc);
 		descriptor_count++;
-	update_config_roms();
+		if (desc->immediate > 0)
+			descriptor_count++;
+		update_config_roms();
+		ret = 0;
+	}
 
 	mutex_unlock(&card_mutex);
 
-	return 0;
+	return ret;
 }
 EXPORT_SYMBOL(fw_core_add_descriptor);
 
@@ -183,6 +199,7 @@
 	mutex_lock(&card_mutex);
 
 	list_del(&desc->link);
+	config_rom_length -= required_space(desc);
 	descriptor_count--;
 	if (desc->immediate > 0)
 		descriptor_count--;
@@ -222,7 +239,7 @@
 static void fw_card_bm_work(struct work_struct *work)
 {
 	struct fw_card *card = container_of(work, struct fw_card, work.work);
-	struct fw_device *root_device;
+	struct fw_device *root_device, *irm_device;
 	struct fw_node *root_node;
 	unsigned long flags;
 	int root_id, new_root_id, irm_id, local_id;
@@ -230,6 +247,7 @@
 	bool do_reset = false;
 	bool root_device_is_running;
 	bool root_device_is_cmc;
+	bool irm_is_1394_1995_only;
 
 	spin_lock_irqsave(&card->lock, flags);
 
@@ -239,12 +257,18 @@
 	}
 
 	generation = card->generation;
+
 	root_node = card->root_node;
 	fw_node_get(root_node);
 	root_device = root_node->data;
 	root_device_is_running = root_device &&
 			atomic_read(&root_device->state) == FW_DEVICE_RUNNING;
 	root_device_is_cmc = root_device && root_device->cmc;
+
+	irm_device = card->irm_node->data;
+	irm_is_1394_1995_only = irm_device && irm_device->config_rom &&
+			(irm_device->config_rom[2] & 0x000000f0) == 0;
+
 	root_id  = root_node->node_id;
 	irm_id   = card->irm_node->node_id;
 	local_id = card->local_node->node_id;
@@ -267,8 +291,15 @@
 
 		if (!card->irm_node->link_on) {
 			new_root_id = local_id;
-			fw_notify("IRM has link off, making local node (%02x) root.\n",
-				  new_root_id);
+			fw_notify("%s, making local node (%02x) root.\n",
+				  "IRM has link off", new_root_id);
+			goto pick_me;
+		}
+
+		if (irm_is_1394_1995_only) {
+			new_root_id = local_id;
+			fw_notify("%s, making local node (%02x) root.\n",
+				  "IRM is not 1394a compliant", new_root_id);
 			goto pick_me;
 		}
 
@@ -307,8 +338,8 @@
 			 * root, and thus, IRM.
 			 */
 			new_root_id = local_id;
-			fw_notify("BM lock failed, making local node (%02x) root.\n",
-				  new_root_id);
+			fw_notify("%s, making local node (%02x) root.\n",
+				  "BM lock failed", new_root_id);
 			goto pick_me;
 		}
 	} else if (card->bm_generation != generation) {
@@ -436,7 +467,6 @@
 		u32 max_receive, u32 link_speed, u64 guid)
 {
 	u32 *config_rom;
-	size_t length;
 	int ret;
 
 	card->max_receive = max_receive;
@@ -445,8 +475,8 @@
 
 	mutex_lock(&card_mutex);
 
-	config_rom = generate_config_rom(card, &length);
-	ret = card->driver->enable(card, config_rom, length);
+	config_rom = generate_config_rom(card);
+	ret = card->driver->enable(card, config_rom, config_rom_length);
 	if (ret == 0)
 		list_add_tail(&card->link, &card_list);
 
--- linux-mvl-dove-2.6.32.orig/drivers/firewire/core-cdev.c
+++ linux-mvl-dove-2.6.32/drivers/firewire/core-cdev.c
@@ -1299,24 +1299,24 @@
 	int ret;
 
 	if (_IOC_TYPE(cmd) != '#' ||
-	    _IOC_NR(cmd) >= ARRAY_SIZE(ioctl_handlers))
+	    _IOC_NR(cmd) >= ARRAY_SIZE(ioctl_handlers) ||
+	    _IOC_SIZE(cmd) > sizeof(buffer))
 		return -EINVAL;
 
-	if (_IOC_DIR(cmd) & _IOC_WRITE) {
-		if (_IOC_SIZE(cmd) > sizeof(buffer) ||
-		    copy_from_user(buffer, arg, _IOC_SIZE(cmd)))
+	if (_IOC_DIR(cmd) == _IOC_READ)
+		memset(&buffer, 0, _IOC_SIZE(cmd));
+
+	if (_IOC_DIR(cmd) & _IOC_WRITE)
+		if (copy_from_user(buffer, arg, _IOC_SIZE(cmd)))
 			return -EFAULT;
-	}
 
 	ret = ioctl_handlers[_IOC_NR(cmd)](client, buffer);
 	if (ret < 0)
 		return ret;
 
-	if (_IOC_DIR(cmd) & _IOC_READ) {
-		if (_IOC_SIZE(cmd) > sizeof(buffer) ||
-		    copy_to_user(arg, buffer, _IOC_SIZE(cmd)))
+	if (_IOC_DIR(cmd) & _IOC_READ)
+		if (copy_to_user(arg, buffer, _IOC_SIZE(cmd)))
 			return -EFAULT;
-	}
 
 	return ret;
 }
--- linux-mvl-dove-2.6.32.orig/drivers/rtc/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/rtc/Kconfig
@@ -109,6 +109,16 @@
 	  clock several times per second, please enable this option
 	  only if you know that you really need it.
 
+config RTC_INTF_ALARM
+	bool "Android alarm driver"
+	depends on RTC_CLASS
+	default y
+	help
+	  Provides non-wakeup and rtc backed wakeup alarms based on rtc or
+	  elapsed realtime, and a non-wakeup alarm on the monotonic clock.
+	  Also provides an ioctl to set the wall time which must be used
+	  for elapsed realtime to work.
+
 config RTC_DRV_TEST
 	tristate "Test driver/device"
 	help
@@ -780,7 +790,6 @@
 
 config RTC_DRV_MV
 	tristate "Marvell SoC RTC"
-	depends on ARCH_KIRKWOOD
 	help
 	  If you say yes here you will get support for the in-chip RTC
 	  that can be found in some of Marvell's SoC devices, such as
--- linux-mvl-dove-2.6.32.orig/drivers/rtc/rtc-fm3130.c
+++ linux-mvl-dove-2.6.32/drivers/rtc/rtc-fm3130.c
@@ -376,20 +376,22 @@
 	}
 
 	/* Disabling calibration mode */
-	if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_CAL)
+	if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_CAL) {
 		i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
 			fm3130->regs[FM3130_RTC_CONTROL] &
 				~(FM3130_RTC_CONTROL_BIT_CAL));
 		dev_warn(&client->dev, "Disabling calibration mode!\n");
+	}
 
 	/* Disabling read and write modes */
 	if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_WRITE ||
-	    fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_READ)
+	    fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_READ) {
 		i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
 			fm3130->regs[FM3130_RTC_CONTROL] &
 				~(FM3130_RTC_CONTROL_BIT_READ |
 					FM3130_RTC_CONTROL_BIT_WRITE));
 		dev_warn(&client->dev, "Disabling READ or WRITE mode!\n");
+	}
 
 	/* oscillator off?  turn it on, so clock can tick. */
 	if (fm3130->regs[FM3130_CAL_CONTROL] & FM3130_CAL_CONTROL_BIT_nOSCEN)
--- linux-mvl-dove-2.6.32.orig/drivers/rtc/rtc-s3c.c
+++ linux-mvl-dove-2.6.32/drivers/rtc/rtc-s3c.c
@@ -456,8 +456,6 @@
  	pr_debug("s3c2410_rtc: RTCCON=%02x\n",
 		 readb(s3c_rtc_base + S3C2410_RTCCON));
 
-	s3c_rtc_setfreq(&pdev->dev, 1);
-
 	device_init_wakeup(&pdev->dev, 1);
 
 	/* register RTC and exit */
@@ -474,6 +472,9 @@
 	rtc->max_user_freq = 128;
 
 	platform_set_drvdata(pdev, rtc);
+
+	s3c_rtc_setfreq(&pdev->dev, 1);
+
 	return 0;
 
  err_nortc:
--- linux-mvl-dove-2.6.32.orig/drivers/rtc/class.c
+++ linux-mvl-dove-2.6.32/drivers/rtc/class.c
@@ -40,25 +40,32 @@
  */
 
 static struct timespec	delta;
+static struct timespec	delta_delta;
 static time_t		oldtime;
 
 static int rtc_suspend(struct device *dev, pm_message_t mesg)
 {
 	struct rtc_device	*rtc = to_rtc_device(dev);
 	struct rtc_time		tm;
-	struct timespec		ts = current_kernel_time();
+	struct timespec		ts;
+	struct timespec		new_delta;
 
 	if (strcmp(dev_name(&rtc->dev), CONFIG_RTC_HCTOSYS_DEVICE) != 0)
 		return 0;
 
+	getnstimeofday(&ts);
 	rtc_read_time(rtc, &tm);
 	rtc_tm_to_time(&tm, &oldtime);
 
 	/* RTC precision is 1 second; adjust delta for avg 1/2 sec err */
-	set_normalized_timespec(&delta,
+	set_normalized_timespec(&new_delta,
 				ts.tv_sec - oldtime,
 				ts.tv_nsec - (NSEC_PER_SEC >> 1));
 
+	/* prevent 1/2 sec errors from accumulating */
+	delta_delta = timespec_sub(new_delta, delta);
+	if (delta_delta.tv_sec < -2 || delta_delta.tv_sec >= 2)
+		delta = new_delta;
 	return 0;
 }
 
@@ -78,6 +85,8 @@
 		return 0;
 	}
 	rtc_tm_to_time(&tm, &newtime);
+	if (delta_delta.tv_sec < -1)
+		newtime++;
 	if (newtime <= oldtime) {
 		if (newtime < oldtime)
 			pr_debug("%s:  time travel!\n", dev_name(&rtc->dev));
@@ -226,6 +235,7 @@
 {
 	rtc_dev_exit();
 	class_destroy(rtc_class);
+	idr_destroy(&rtc_idr);
 }
 
 subsys_initcall(rtc_init);
--- linux-mvl-dove-2.6.32.orig/drivers/rtc/Makefile
+++ linux-mvl-dove-2.6.32/drivers/rtc/Makefile
@@ -11,6 +11,7 @@
 obj-$(CONFIG_RTC_CLASS)		+= rtc-core.o
 rtc-core-y			:= class.o interface.o
 
+rtc-core-$(CONFIG_RTC_INTF_ALARM) += alarm.o
 rtc-core-$(CONFIG_RTC_INTF_DEV)	+= rtc-dev.o
 rtc-core-$(CONFIG_RTC_INTF_PROC) += rtc-proc.o
 rtc-core-$(CONFIG_RTC_INTF_SYSFS) += rtc-sysfs.o
--- linux-mvl-dove-2.6.32.orig/drivers/rtc/rtc-coh901331.c
+++ linux-mvl-dove-2.6.32/drivers/rtc/rtc-coh901331.c
@@ -271,12 +271,13 @@
 {
 	struct coh901331_port *rtap = dev_get_drvdata(&pdev->dev);
 
-	if (device_may_wakeup(&pdev->dev))
+	if (device_may_wakeup(&pdev->dev)) {
 		disable_irq_wake(rtap->irq);
-	else
+	} else {
 		clk_enable(rtap->clk);
 		writel(rtap->irqmaskstore, rtap->virtbase + COH901331_IRQ_MASK);
 		clk_disable(rtap->clk);
+	}
 	return 0;
 }
 #else
--- linux-mvl-dove-2.6.32.orig/drivers/rtc/rtc-cmos.c
+++ linux-mvl-dove-2.6.32/drivers/rtc/rtc-cmos.c
@@ -36,6 +36,7 @@
 #include <linux/platform_device.h>
 #include <linux/mod_devicetable.h>
 #include <linux/log2.h>
+#include <linux/pm.h>
 
 /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
 #include <asm-generic/rtc.h>
@@ -723,6 +724,9 @@
 		}
 	}
 
+	cmos_rtc.dev = dev;
+	dev_set_drvdata(dev, &cmos_rtc);
+
 	cmos_rtc.rtc = rtc_device_register(driver_name, dev,
 				&cmos_rtc_ops, THIS_MODULE);
 	if (IS_ERR(cmos_rtc.rtc)) {
@@ -730,8 +734,6 @@
 		goto cleanup0;
 	}
 
-	cmos_rtc.dev = dev;
-	dev_set_drvdata(dev, &cmos_rtc);
 	rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
 
 	spin_lock_irq(&rtc_lock);
@@ -854,7 +856,7 @@
 
 #ifdef	CONFIG_PM
 
-static int cmos_suspend(struct device *dev, pm_message_t mesg)
+static int cmos_suspend(struct device *dev)
 {
 	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
 	unsigned char	tmp;
@@ -901,7 +903,7 @@
  */
 static inline int cmos_poweroff(struct device *dev)
 {
-	return cmos_suspend(dev, PMSG_HIBERNATE);
+	return cmos_suspend(dev);
 }
 
 static int cmos_resume(struct device *dev)
@@ -948,9 +950,9 @@
 	return 0;
 }
 
+static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume);
+
 #else
-#define	cmos_suspend	NULL
-#define	cmos_resume	NULL
 
 static inline int cmos_poweroff(struct device *dev)
 {
@@ -1086,7 +1088,7 @@
 
 static int cmos_pnp_suspend(struct pnp_dev *pnp, pm_message_t mesg)
 {
-	return cmos_suspend(&pnp->dev, mesg);
+	return cmos_suspend(&pnp->dev);
 }
 
 static int cmos_pnp_resume(struct pnp_dev *pnp)
@@ -1099,9 +1101,9 @@
 #define	cmos_pnp_resume		NULL
 #endif
 
-static void cmos_pnp_shutdown(struct device *pdev)
+static void cmos_pnp_shutdown(struct pnp_dev *pnp)
 {
-	if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(pdev))
+	if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(&pnp->dev))
 		return;
 
 	cmos_do_shutdown();
@@ -1120,15 +1122,12 @@
 	.id_table	= rtc_ids,
 	.probe		= cmos_pnp_probe,
 	.remove		= __exit_p(cmos_pnp_remove),
+	.shutdown	= cmos_pnp_shutdown,
 
 	/* flag ensures resume() gets called, and stops syslog spam */
 	.flags		= PNP_DRIVER_RES_DO_NOT_CHANGE,
 	.suspend	= cmos_pnp_suspend,
 	.resume		= cmos_pnp_resume,
-	.driver		= {
-		.name	  = (char *)driver_name,
-		.shutdown = cmos_pnp_shutdown,
-	}
 };
 
 #endif	/* CONFIG_PNP */
@@ -1169,8 +1168,9 @@
 	.shutdown	= cmos_platform_shutdown,
 	.driver = {
 		.name		= (char *) driver_name,
-		.suspend	= cmos_suspend,
-		.resume		= cmos_resume,
+#ifdef CONFIG_PM
+		.pm		= &cmos_pm_ops,
+#endif
 	}
 };
 
--- linux-mvl-dove-2.6.32.orig/drivers/rtc/rtc-mv.c
+++ linux-mvl-dove-2.6.32/drivers/rtc/rtc-mv.c
@@ -16,21 +16,28 @@
 
 
 #define RTC_TIME_REG_OFFS	0
-#define RTC_SECONDS_OFFS	0
-#define RTC_MINUTES_OFFS	8
-#define RTC_HOURS_OFFS		16
-#define RTC_WDAY_OFFS		24
-#define RTC_HOURS_12H_MODE		(1 << 22) /* 12 hours mode */
+#define  RTC_SECONDS_OFFS	0
+#define  RTC_MINUTES_OFFS	8
+#define  RTC_HOURS_OFFS		16
+#define  RTC_WDAY_OFFS		24
+#define  RTC_HOURS_12H_MODE		(1 << 22) /* 12 hours mode */
 
 #define RTC_DATE_REG_OFFS	4
-#define RTC_MDAY_OFFS		0
-#define RTC_MONTH_OFFS		8
-#define RTC_YEAR_OFFS		16
+#define  RTC_MDAY_OFFS		0
+#define  RTC_MONTH_OFFS		8
+#define  RTC_YEAR_OFFS		16
+
+#define RTC_ALARM_TIME_REG_OFFS	8
+#define RTC_ALARM_DATE_REG_OFFS	0xc
+#define  RTC_ALARM_VALID	(1 << 7)
 
+#define RTC_ALARM_INTERRUPT_MASK_REG_OFFS	0x10
+#define RTC_ALARM_INTERRUPT_CASUE_REG_OFFS	0x14
 
 struct rtc_plat_data {
 	struct rtc_device *rtc;
 	void __iomem *ioaddr;
+	int		irq;
 };
 
 static int mv_rtc_set_time(struct device *dev, struct rtc_time *tm)
@@ -81,7 +88,126 @@
 	/* hw counts from year 2000, but tm_year is relative to 1900 */
 	tm->tm_year = bcd2bin(year) + 100;
 
-	return rtc_valid_tm(tm);
+	if (rtc_valid_tm(tm) < 0) {
+		/* The HW default value when no battery found can be invalid */
+		rtc_time_to_tm(0, tm);
+	}
+	return 0;
+}
+
+static int mv_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
+{
+	struct rtc_plat_data *pdata = dev_get_drvdata(dev);
+	void __iomem *ioaddr = pdata->ioaddr;
+	u32	rtc_time, rtc_date;
+	unsigned int year, month, day, hour, minute, second, wday;
+
+	rtc_time = readl(ioaddr + RTC_ALARM_TIME_REG_OFFS);
+	rtc_date = readl(ioaddr + RTC_ALARM_DATE_REG_OFFS);
+
+	second = rtc_time & 0x7f;
+	minute = (rtc_time >> RTC_MINUTES_OFFS) & 0x7f;
+	hour = (rtc_time >> RTC_HOURS_OFFS) & 0x3f; /* assume 24 hours mode */
+	wday = (rtc_time >> RTC_WDAY_OFFS) & 0x7;
+
+	day = rtc_date & 0x3f;
+	month = (rtc_date >> RTC_MONTH_OFFS) & 0x3f;
+	year = (rtc_date >> RTC_YEAR_OFFS) & 0x7f;
+
+	alm->time.tm_sec = bcd2bin(second);
+	alm->time.tm_min = bcd2bin(minute);
+	alm->time.tm_hour = bcd2bin(hour);
+	alm->time.tm_mday = bcd2bin(day);
+	alm->time.tm_wday = bcd2bin(wday);
+	alm->time.tm_mon = bcd2bin(month) - 1;
+	/* hw counts from year 2000, but tm_year is relative to 1900 */
+	alm->time.tm_year = bcd2bin(year) + 100;
+
+	if (rtc_valid_tm(&alm->time) < 0) {
+		dev_err(dev, "retrieved alarm date/time is not valid.\n");
+		rtc_time_to_tm(0, &alm->time);
+	}
+
+	alm->enabled = !!readl(ioaddr + RTC_ALARM_INTERRUPT_MASK_REG_OFFS);
+	return 0;
+}
+
+static int mv_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
+{
+	struct rtc_plat_data *pdata = dev_get_drvdata(dev);
+	void __iomem *ioaddr = pdata->ioaddr;
+	u32 rtc_reg = 0;
+
+	if (alm->time.tm_sec >= 0)
+		rtc_reg |= (RTC_ALARM_VALID | bin2bcd(alm->time.tm_sec))
+			<< RTC_SECONDS_OFFS;
+	if (alm->time.tm_min >= 0)
+		rtc_reg |= (RTC_ALARM_VALID | bin2bcd(alm->time.tm_min))
+			<< RTC_MINUTES_OFFS;
+	if (alm->time.tm_hour >= 0)
+		rtc_reg |= (RTC_ALARM_VALID | bin2bcd(alm->time.tm_hour))
+			<< RTC_HOURS_OFFS;
+
+	writel(rtc_reg, ioaddr + RTC_ALARM_TIME_REG_OFFS);
+
+	if (alm->time.tm_mday >= 0)
+		rtc_reg = (RTC_ALARM_VALID | bin2bcd(alm->time.tm_mday))
+			<< RTC_MDAY_OFFS;
+	else
+		rtc_reg = 0;
+
+	if (alm->time.tm_mon >= 0)
+		rtc_reg |= (RTC_ALARM_VALID | bin2bcd(alm->time.tm_mon + 1))
+			<< RTC_MONTH_OFFS;
+
+	if (alm->time.tm_year >= 0)
+		rtc_reg |= (RTC_ALARM_VALID | bin2bcd(alm->time.tm_year % 100))
+			<< RTC_YEAR_OFFS;
+
+	writel(rtc_reg, ioaddr + RTC_ALARM_DATE_REG_OFFS);
+	writel(0, ioaddr + RTC_ALARM_INTERRUPT_CASUE_REG_OFFS);
+	writel(alm->enabled ? 1 : 0, 
+	       ioaddr + RTC_ALARM_INTERRUPT_MASK_REG_OFFS);
+	
+	return 0;
+}
+
+static int mv_rtc_ioctl(struct device *dev, unsigned int cmd,
+			unsigned long arg)
+{
+	struct platform_device *pdev = to_platform_device(dev);
+	struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
+	void __iomem *ioaddr = pdata->ioaddr;
+
+	if (pdata->irq < 0)
+		return -ENOIOCTLCMD; /* fall back into rtc-dev's emulation */
+	switch (cmd) {
+	case RTC_AIE_OFF:
+		writel(0, ioaddr + RTC_ALARM_INTERRUPT_MASK_REG_OFFS);
+		break;
+	case RTC_AIE_ON:
+		writel(1, ioaddr + RTC_ALARM_INTERRUPT_MASK_REG_OFFS);
+		break;
+	default:
+		return -ENOIOCTLCMD;
+	}
+	return 0;
+}
+
+
+static irqreturn_t mv_rtc_interrupt(int irq, void *data)
+{
+        struct rtc_plat_data *pdata = data;
+        void __iomem *ioaddr = pdata->ioaddr;
+
+	/* alarm irq? */
+	if (!readl(ioaddr + RTC_ALARM_INTERRUPT_CASUE_REG_OFFS))
+		return IRQ_NONE; 
+	
+        /* clear interrupt */
+	writel(0, ioaddr + RTC_ALARM_INTERRUPT_CASUE_REG_OFFS);	
+	rtc_update_irq(pdata->rtc, 1, RTC_IRQF | RTC_AF);
+	return IRQ_HANDLED;
 }
 
 static const struct rtc_class_ops mv_rtc_ops = {
@@ -89,7 +215,16 @@
 	.set_time	= mv_rtc_set_time,
 };
 
-static int __init mv_rtc_probe(struct platform_device *pdev)
+static const struct rtc_class_ops mv_rtc_alarm_ops = {
+	.read_time	= mv_rtc_read_time,
+	.set_time	= mv_rtc_set_time,
+        .read_alarm     = mv_rtc_read_alarm,
+        .set_alarm      = mv_rtc_set_alarm,
+        .ioctl          = mv_rtc_ioctl,
+
+};
+
+static int __devinit mv_rtc_probe(struct platform_device *pdev)
 {
 	struct resource *res;
 	struct rtc_plat_data *pdata;
@@ -119,7 +254,6 @@
 		dev_err(&pdev->dev, "24 Hours mode not supported.\n");
 		return -EINVAL;
 	}
-
 	/* make sure it is actually functional */
 	if (rtc_time == 0x01000000) {
 		ssleep(1);
@@ -130,12 +264,30 @@
 		}
 	}
 
+	pdata->irq = platform_get_irq(pdev, 0);
+
 	platform_set_drvdata(pdev, pdata);
-	pdata->rtc = rtc_device_register(pdev->name, &pdev->dev,
-					 &mv_rtc_ops, THIS_MODULE);
+
+	if(pdata->irq >= 0) {
+		device_init_wakeup(&pdev->dev, 1);
+		pdata->rtc = rtc_device_register(pdev->name, &pdev->dev,
+						 &mv_rtc_alarm_ops, THIS_MODULE);
+	} else
+		pdata->rtc = rtc_device_register(pdev->name, &pdev->dev,
+						 &mv_rtc_ops, THIS_MODULE);
 	if (IS_ERR(pdata->rtc))
 		return PTR_ERR(pdata->rtc);
 
+	if(pdata->irq >= 0) {
+		writel(0, pdata->ioaddr + RTC_ALARM_INTERRUPT_MASK_REG_OFFS);
+                if (devm_request_irq(&pdev->dev, pdata->irq, mv_rtc_interrupt,
+				     IRQF_DISABLED | IRQF_SHARED,
+				     pdev->name, pdata) < 0) {
+                        dev_warn(&pdev->dev, "interrupt not available.\n");
+                        pdata->irq = -1;
+                }
+	}
+
 	return 0;
 }
 
@@ -143,6 +295,9 @@
 {
 	struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
 
+	if(pdata->irq >= 0)
+		device_init_wakeup(&pdev->dev, 0);
+
 	rtc_device_unregister(pdata->rtc);
 	return 0;
 }
--- linux-mvl-dove-2.6.32.orig/drivers/rtc/alarm.c
+++ linux-mvl-dove-2.6.32/drivers/rtc/alarm.c
@@ -0,0 +1,568 @@
+/* drivers/rtc/alarm.c
+ *
+ * Copyright (C) 2007 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <asm/mach/time.h>
+#include <linux/android_alarm.h>
+#include <linux/device.h>
+#include <linux/miscdevice.h>
+#include <linux/platform_device.h>
+#include <linux/rtc.h>
+#include <linux/spinlock.h>
+#include <linux/sysdev.h>
+#include <linux/wakelock.h>
+#include <linux/sched.h>
+
+#define ANDROID_ALARM_PRINT_ERRORS (1U << 0)
+#define ANDROID_ALARM_PRINT_INIT_STATUS (1U << 1)
+#define ANDROID_ALARM_PRINT_INFO (1U << 2)
+#define ANDROID_ALARM_PRINT_IO (1U << 3)
+#define ANDROID_ALARM_PRINT_INT (1U << 4)
+#define ANDROID_ALARM_PRINT_FLOW (1U << 5)
+
+#if 0
+#define ANDROID_ALARM_DPRINTF_MASK (~0)
+#define ANDROID_ALARM_DPRINTF(debug_level_mask, args...) \
+	do { \
+		if (ANDROID_ALARM_DPRINTF_MASK & debug_level_mask) { \
+			printk(args); \
+		} \
+	} while (0)
+#else
+#define ANDROID_ALARM_DPRINTF(args...)
+#endif
+
+#define ANDROID_ALARM_WAKEUP_MASK ( \
+	ANDROID_ALARM_RTC_WAKEUP_MASK | \
+	ANDROID_ALARM_ELAPSED_REALTIME_WAKEUP_MASK)
+
+/* support old usespace code */
+#define ANDROID_ALARM_SET_OLD               _IOW('a', 2, time_t) /* set alarm */
+#define ANDROID_ALARM_SET_AND_WAIT_OLD      _IOW('a', 3, time_t)
+
+static struct rtc_device *alarm_rtc_dev;
+static int alarm_opened;
+static DEFINE_SPINLOCK(alarm_slock);
+static DEFINE_MUTEX(alarm_setrtc_mutex);
+static struct wake_lock alarm_wake_lock;
+static struct wake_lock alarm_rtc_wake_lock;
+static DECLARE_WAIT_QUEUE_HEAD(alarm_wait_queue);
+static uint32_t alarm_pending;
+static uint32_t alarm_enabled;
+static uint32_t wait_pending;
+static struct platform_device *alarm_platform_dev;
+static struct hrtimer alarm_timer[ANDROID_ALARM_TYPE_COUNT];
+static struct timespec alarm_time[ANDROID_ALARM_TYPE_COUNT];
+static struct timespec elapsed_rtc_delta;
+
+static void alarm_start_hrtimer(enum android_alarm_type alarm_type)
+{
+	struct timespec hr_alarm_time;
+	if (!(alarm_enabled & (1U << alarm_type)))
+		return;
+	hr_alarm_time = alarm_time[alarm_type];
+	if (alarm_type == ANDROID_ALARM_ELAPSED_REALTIME_WAKEUP ||
+	    alarm_type == ANDROID_ALARM_ELAPSED_REALTIME)
+		set_normalized_timespec(&hr_alarm_time,
+			hr_alarm_time.tv_sec + elapsed_rtc_delta.tv_sec,
+			hr_alarm_time.tv_nsec + elapsed_rtc_delta.tv_nsec);
+	ANDROID_ALARM_DPRINTF(ANDROID_ALARM_PRINT_FLOW,
+		"alarm start hrtimer %d at %ld.%09ld\n",
+		alarm_type, hr_alarm_time.tv_sec, hr_alarm_time.tv_nsec);
+	hrtimer_start(&alarm_timer[alarm_type],
+		      timespec_to_ktime(hr_alarm_time), HRTIMER_MODE_ABS);
+}
+
+static long alarm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+	int rv = 0;
+	unsigned long flags;
+	int i;
+	struct timespec new_alarm_time;
+	struct timespec new_rtc_time;
+	struct timespec tmp_time;
+	struct rtc_time rtc_new_rtc_time;
+	enum android_alarm_type alarm_type = ANDROID_ALARM_IOCTL_TO_TYPE(cmd);
+	uint32_t alarm_type_mask = 1U << alarm_type;
+
+	if (alarm_type >= ANDROID_ALARM_TYPE_COUNT)
+		return -EINVAL;
+
+	if (ANDROID_ALARM_BASE_CMD(cmd) != ANDROID_ALARM_GET_TIME(0)) {
+		if ((file->f_flags & O_ACCMODE) == O_RDONLY)
+			return -EPERM;
+		if (file->private_data == NULL &&
+		    cmd != ANDROID_ALARM_SET_RTC) {
+			spin_lock_irqsave(&alarm_slock, flags);
+			if (alarm_opened) {
+				spin_unlock_irqrestore(&alarm_slock, flags);
+				return -EBUSY;
+			}
+			alarm_opened = 1;
+			file->private_data = (void *)1;
+			spin_unlock_irqrestore(&alarm_slock, flags);
+		}
+	}
+
+	switch (ANDROID_ALARM_BASE_CMD(cmd)) {
+	case ANDROID_ALARM_CLEAR(0):
+		spin_lock_irqsave(&alarm_slock, flags);
+		ANDROID_ALARM_DPRINTF(ANDROID_ALARM_PRINT_IO,
+				      "alarm %d clear\n", alarm_type);
+		hrtimer_try_to_cancel(&alarm_timer[alarm_type]);
+		if (alarm_pending) {
+			alarm_pending &= ~alarm_type_mask;
+			if (!alarm_pending && !wait_pending)
+				wake_unlock(&alarm_wake_lock);
+		}
+		alarm_enabled &= ~alarm_type_mask;
+		spin_unlock_irqrestore(&alarm_slock, flags);
+		break;
+
+	case ANDROID_ALARM_SET_OLD:
+	case ANDROID_ALARM_SET_AND_WAIT_OLD:
+		if (get_user(new_alarm_time.tv_sec, (int __user *)arg)) {
+			rv = -EFAULT;
+			goto err1;
+		}
+		new_alarm_time.tv_nsec = 0;
+		goto from_old_alarm_set;
+
+	case ANDROID_ALARM_SET_AND_WAIT(0):
+	case ANDROID_ALARM_SET(0):
+		if (copy_from_user(&new_alarm_time, (void __user *)arg,
+		    sizeof(new_alarm_time))) {
+			rv = -EFAULT;
+			goto err1;
+		}
+from_old_alarm_set:
+		spin_lock_irqsave(&alarm_slock, flags);
+		ANDROID_ALARM_DPRINTF(ANDROID_ALARM_PRINT_IO,
+			"alarm %d set %ld.%09ld\n", alarm_type,
+			new_alarm_time.tv_sec, new_alarm_time.tv_nsec);
+		alarm_time[alarm_type] = new_alarm_time;
+		alarm_enabled |= alarm_type_mask;
+		alarm_start_hrtimer(alarm_type);
+		spin_unlock_irqrestore(&alarm_slock, flags);
+		if (ANDROID_ALARM_BASE_CMD(cmd) != ANDROID_ALARM_SET_AND_WAIT(0)
+		    && cmd != ANDROID_ALARM_SET_AND_WAIT_OLD)
+			break;
+		/* fall though */
+	case ANDROID_ALARM_WAIT:
+		spin_lock_irqsave(&alarm_slock, flags);
+		ANDROID_ALARM_DPRINTF(ANDROID_ALARM_PRINT_IO, "alarm wait\n");
+		if (!alarm_pending && wait_pending) {
+			wake_unlock(&alarm_wake_lock);
+			wait_pending = 0;
+		}
+		spin_unlock_irqrestore(&alarm_slock, flags);
+		rv = wait_event_interruptible(alarm_wait_queue, alarm_pending);
+		if (rv)
+			goto err1;
+		spin_lock_irqsave(&alarm_slock, flags);
+		rv = alarm_pending;
+		wait_pending = 1;
+		alarm_pending = 0;
+		if (rv & ANDROID_ALARM_WAKEUP_MASK)
+			wake_unlock(&alarm_rtc_wake_lock);
+		spin_unlock_irqrestore(&alarm_slock, flags);
+		break;
+	case ANDROID_ALARM_SET_RTC:
+		if (copy_from_user(&new_rtc_time, (void __user *)arg,
+		    sizeof(new_rtc_time))) {
+			rv = -EFAULT;
+			goto err1;
+		}
+		rtc_time_to_tm(new_rtc_time.tv_sec, &rtc_new_rtc_time);
+
+		ANDROID_ALARM_DPRINTF(ANDROID_ALARM_PRINT_IO,
+			"set rtc %ld %ld - rtc %02d:%02d:%02d %02d/%02d/%04d\n",
+			new_rtc_time.tv_sec, new_rtc_time.tv_nsec,
+			rtc_new_rtc_time.tm_hour, rtc_new_rtc_time.tm_min,
+			rtc_new_rtc_time.tm_sec, rtc_new_rtc_time.tm_mon + 1,
+			rtc_new_rtc_time.tm_mday,
+			rtc_new_rtc_time.tm_year + 1900);
+
+		mutex_lock(&alarm_setrtc_mutex);
+		spin_lock_irqsave(&alarm_slock, flags);
+		for (i = 0; i < ANDROID_ALARM_SYSTEMTIME; i++)
+			hrtimer_try_to_cancel(&alarm_timer[i]);
+		getnstimeofday(&tmp_time);
+		elapsed_rtc_delta = timespec_sub(elapsed_rtc_delta,
+					timespec_sub(tmp_time, new_rtc_time));
+		spin_unlock_irqrestore(&alarm_slock, flags);
+		rv = do_settimeofday(&new_rtc_time);
+		spin_lock_irqsave(&alarm_slock, flags);
+		for (i = 0; i < ANDROID_ALARM_SYSTEMTIME; i++)
+			alarm_start_hrtimer(i);
+		spin_unlock_irqrestore(&alarm_slock, flags);
+		if (rv < 0) {
+			ANDROID_ALARM_DPRINTF(ANDROID_ALARM_PRINT_ERRORS,
+					      "Failed to set time\n");
+			mutex_unlock(&alarm_setrtc_mutex);
+			goto err1;
+		}
+		rv = rtc_set_time(alarm_rtc_dev, &rtc_new_rtc_time);
+		spin_lock_irqsave(&alarm_slock, flags);
+		alarm_pending |= ANDROID_ALARM_TIME_CHANGE_MASK;
+		wake_up(&alarm_wait_queue);
+		spin_unlock_irqrestore(&alarm_slock, flags);
+		mutex_unlock(&alarm_setrtc_mutex);
+		if (rv < 0) {
+			ANDROID_ALARM_DPRINTF(ANDROID_ALARM_PRINT_ERRORS,
+			    "Failed to set RTC, time will be lost on reboot\n");
+			goto err1;
+		}
+		break;
+	case ANDROID_ALARM_GET_TIME(0):
+		mutex_lock(&alarm_setrtc_mutex);
+		spin_lock_irqsave(&alarm_slock, flags);
+		if (alarm_type != ANDROID_ALARM_SYSTEMTIME) {
+			getnstimeofday(&tmp_time);
+			if (alarm_type >= ANDROID_ALARM_ELAPSED_REALTIME_WAKEUP)
+				tmp_time = timespec_sub(tmp_time,
+							elapsed_rtc_delta);
+		} else
+			ktime_get_ts(&tmp_time);
+		spin_unlock_irqrestore(&alarm_slock, flags);
+		mutex_unlock(&alarm_setrtc_mutex);
+		if (copy_to_user((void __user *)arg, &tmp_time,
+		    sizeof(tmp_time))) {
+			rv = -EFAULT;
+			goto err1;
+		}
+		break;
+
+	default:
+		rv = -EINVAL;
+		goto err1;
+	}
+err1:
+	return rv;
+}
+
+static int alarm_open(struct inode *inode, struct file *file)
+{
+	file->private_data = NULL;
+	return 0;
+}
+
+static int alarm_release(struct inode *inode, struct file *file)
+{
+	int i;
+	unsigned long flags;
+
+	spin_lock_irqsave(&alarm_slock, flags);
+	if (file->private_data != 0) {
+		for (i = 0; i < ANDROID_ALARM_TYPE_COUNT; i++) {
+			uint32_t alarm_type_mask = 1U << i;
+			if (alarm_enabled & alarm_type_mask) {
+				ANDROID_ALARM_DPRINTF(ANDROID_ALARM_PRINT_INFO,
+					"alarm_release: clear alarm, "
+					"pending %d\n",
+					!!(alarm_pending & alarm_type_mask));
+				alarm_enabled &= ~alarm_type_mask;
+			}
+			spin_unlock_irqrestore(&alarm_slock, flags);
+			hrtimer_cancel(&alarm_timer[i]);
+			spin_lock_irqsave(&alarm_slock, flags);
+		}
+		if (alarm_pending | wait_pending) {
+			if (alarm_pending)
+				ANDROID_ALARM_DPRINTF(ANDROID_ALARM_PRINT_INFO,
+					"alarm_release: clear pending alarms "
+					"%x\n", alarm_pending);
+			wake_unlock(&alarm_wake_lock);
+			wait_pending = 0;
+			alarm_pending = 0;
+		}
+		alarm_opened = 0;
+	}
+	spin_unlock_irqrestore(&alarm_slock, flags);
+	return 0;
+}
+
+static enum hrtimer_restart alarm_timer_triggered(struct hrtimer *timer)
+{
+	unsigned long flags;
+	enum android_alarm_type alarm_type = (timer - alarm_timer);
+	uint32_t alarm_type_mask = 1U << alarm_type;
+
+
+	ANDROID_ALARM_DPRINTF(ANDROID_ALARM_PRINT_INT,
+			      "alarm_timer_triggered type %d\n", alarm_type);
+	spin_lock_irqsave(&alarm_slock, flags);
+	if (alarm_enabled & alarm_type_mask) {
+		wake_lock_timeout(&alarm_wake_lock, 5 * HZ);
+		alarm_enabled &= ~alarm_type_mask;
+		alarm_pending |= alarm_type_mask;
+		wake_up(&alarm_wait_queue);
+	}
+	spin_unlock_irqrestore(&alarm_slock, flags);
+	return HRTIMER_NORESTART;
+}
+
+static void alarm_triggered_func(void *p)
+{
+	struct rtc_device *rtc = alarm_rtc_dev;
+	if (!(rtc->irq_data & RTC_AF))
+		return;
+	ANDROID_ALARM_DPRINTF(ANDROID_ALARM_PRINT_INT, "rtc alarm triggered\n");
+	wake_lock_timeout(&alarm_rtc_wake_lock, 1 * HZ);
+}
+
+int alarm_suspend(struct platform_device *pdev, pm_message_t state)
+{
+	int                 err = 0;
+	unsigned long       flags;
+	struct rtc_wkalrm   rtc_alarm;
+	struct rtc_time     rtc_current_rtc_time;
+	unsigned long       rtc_current_time;
+	unsigned long       rtc_alarm_time;
+	struct timespec     rtc_current_timespec;
+	struct timespec     rtc_delta;
+	struct timespec     elapsed_realtime_alarm_time;
+
+	ANDROID_ALARM_DPRINTF(ANDROID_ALARM_PRINT_FLOW,
+			      "alarm_suspend(%p, %d)\n", pdev, state.event);
+	spin_lock_irqsave(&alarm_slock, flags);
+	if (alarm_pending && !wake_lock_active(&alarm_wake_lock)) {
+		ANDROID_ALARM_DPRINTF(ANDROID_ALARM_PRINT_INFO,
+				      "alarm pending\n");
+		err = -EBUSY;
+		goto err1;
+	}
+	if (alarm_enabled & ANDROID_ALARM_WAKEUP_MASK) {
+		spin_unlock_irqrestore(&alarm_slock, flags);
+		if (alarm_enabled & ANDROID_ALARM_RTC_WAKEUP_MASK)
+			hrtimer_cancel(&alarm_timer[ANDROID_ALARM_RTC_WAKEUP]);
+		if (alarm_enabled & ANDROID_ALARM_ELAPSED_REALTIME_WAKEUP_MASK)
+			hrtimer_cancel(&alarm_timer[
+					ANDROID_ALARM_ELAPSED_REALTIME_WAKEUP]);
+
+		rtc_read_time(alarm_rtc_dev, &rtc_current_rtc_time);
+		rtc_current_timespec.tv_nsec = 0;
+		rtc_tm_to_time(&rtc_current_rtc_time,
+			       &rtc_current_timespec.tv_sec);
+		save_time_delta(&rtc_delta, &rtc_current_timespec);
+		set_normalized_timespec(&elapsed_realtime_alarm_time,
+			alarm_time[ANDROID_ALARM_ELAPSED_REALTIME_WAKEUP]
+			.tv_sec + elapsed_rtc_delta.tv_sec,
+			alarm_time[ANDROID_ALARM_ELAPSED_REALTIME_WAKEUP]
+			.tv_nsec + elapsed_rtc_delta.tv_nsec);
+		if ((alarm_enabled & ANDROID_ALARM_RTC_WAKEUP_MASK) &&
+		    (!(alarm_enabled &
+		       ANDROID_ALARM_ELAPSED_REALTIME_WAKEUP_MASK) ||
+		     timespec_compare(&alarm_time[ANDROID_ALARM_RTC_WAKEUP],
+				      &elapsed_realtime_alarm_time) < 0))
+			rtc_alarm_time = timespec_sub(
+					alarm_time[ANDROID_ALARM_RTC_WAKEUP],
+					rtc_delta).tv_sec;
+		else
+			rtc_alarm_time = timespec_sub(
+				elapsed_realtime_alarm_time, rtc_delta).tv_sec;
+		rtc_time_to_tm(rtc_alarm_time, &rtc_alarm.time);
+		rtc_alarm.enabled = 1;
+		rtc_set_alarm(alarm_rtc_dev, &rtc_alarm);
+		rtc_read_time(alarm_rtc_dev, &rtc_current_rtc_time);
+		rtc_tm_to_time(&rtc_current_rtc_time, &rtc_current_time);
+		ANDROID_ALARM_DPRINTF(ANDROID_ALARM_PRINT_INFO,
+			"rtc alarm set at %ld, now %ld, rtc delta %ld.%09ld\n",
+			rtc_alarm_time, rtc_current_time,
+			rtc_delta.tv_sec, rtc_delta.tv_nsec);
+		if (rtc_current_time + 1 >= rtc_alarm_time) {
+			ANDROID_ALARM_DPRINTF(ANDROID_ALARM_PRINT_INFO,
+					      "alarm about to go off\n");
+			memset(&rtc_alarm, 0, sizeof(rtc_alarm));
+			rtc_alarm.enabled = 0;
+			rtc_set_alarm(alarm_rtc_dev, &rtc_alarm);
+
+			spin_lock_irqsave(&alarm_slock, flags);
+			wake_lock_timeout(&alarm_rtc_wake_lock, 2 * HZ);
+			alarm_start_hrtimer(ANDROID_ALARM_RTC_WAKEUP);
+			alarm_start_hrtimer(
+				ANDROID_ALARM_ELAPSED_REALTIME_WAKEUP);
+			err = -EBUSY;
+			spin_unlock_irqrestore(&alarm_slock, flags);
+		}
+	} else {
+err1:
+		spin_unlock_irqrestore(&alarm_slock, flags);
+	}
+	return err;
+}
+
+int alarm_resume(struct platform_device *pdev)
+{
+	struct rtc_wkalrm alarm;
+	ANDROID_ALARM_DPRINTF(ANDROID_ALARM_PRINT_FLOW,
+			      "alarm_resume(%p)\n", pdev);
+	if (alarm_enabled & ANDROID_ALARM_WAKEUP_MASK) {
+		memset(&alarm, 0, sizeof(alarm));
+		alarm.enabled = 0;
+		rtc_set_alarm(alarm_rtc_dev, &alarm);
+		alarm_start_hrtimer(ANDROID_ALARM_RTC_WAKEUP);
+		alarm_start_hrtimer(ANDROID_ALARM_ELAPSED_REALTIME_WAKEUP);
+	}
+	return 0;
+}
+
+static struct rtc_task alarm_rtc_task = {
+	.func = alarm_triggered_func
+};
+
+static struct file_operations alarm_fops = {
+	.owner = THIS_MODULE,
+	.unlocked_ioctl = alarm_ioctl,
+	.open = alarm_open,
+	.release = alarm_release,
+};
+
+static struct miscdevice alarm_device = {
+	.minor = MISC_DYNAMIC_MINOR,
+	.name = "alarm",
+	.fops = &alarm_fops,
+};
+
+static int rtc_alarm_add_device(struct device *dev,
+				struct class_interface *class_intf)
+{
+	int err;
+	struct rtc_device *rtc = to_rtc_device(dev);
+
+	mutex_lock(&alarm_setrtc_mutex);
+
+	if (alarm_rtc_dev) {
+		err = -EBUSY;
+		goto err1;
+	}
+
+	err = misc_register(&alarm_device);
+	if (err)
+		goto err1;
+	alarm_platform_dev =
+		platform_device_register_simple("alarm", -1, NULL, 0);
+	if (IS_ERR(alarm_platform_dev)) {
+		err = PTR_ERR(alarm_platform_dev);
+		goto err2;
+	}
+	err = rtc_irq_register(rtc, &alarm_rtc_task);
+	if (err)
+		goto err3;
+	alarm_rtc_dev = rtc;
+	mutex_unlock(&alarm_setrtc_mutex);
+
+	ANDROID_ALARM_DPRINTF(ANDROID_ALARM_PRINT_INFO, "alarm: parent %p\n",
+			      alarm_platform_dev->dev.power.pm_parent);
+	return 0;
+
+err3:
+	platform_device_unregister(alarm_platform_dev);
+err2:
+	misc_deregister(&alarm_device);
+err1:
+	mutex_unlock(&alarm_setrtc_mutex);
+	return err;
+}
+
+static void rtc_alarm_remove_device(struct device *dev,
+				    struct class_interface *class_intf)
+{
+	if (dev == &alarm_rtc_dev->dev) {
+		rtc_irq_unregister(alarm_rtc_dev, &alarm_rtc_task);
+		platform_device_unregister(alarm_platform_dev);
+		misc_deregister(&alarm_device);
+		alarm_rtc_dev = NULL;
+	}
+}
+
+static struct class_interface rtc_alarm_interface = {
+	.add_dev = &rtc_alarm_add_device,
+	.remove_dev = &rtc_alarm_remove_device,
+};
+
+static struct platform_driver alarm_driver = {
+	.suspend = alarm_suspend,
+	.resume = alarm_resume,
+	.driver = {
+		.name = "alarm"
+	}
+};
+
+static int __init alarm_late_init(void)
+{
+	unsigned long   flags;
+	struct timespec system_time;
+
+	/* this needs to run after the rtc is read at boot */
+	spin_lock_irqsave(&alarm_slock, flags);
+	/* We read the current rtc and system time so we can later calulate
+	 * elasped realtime to be (boot_systemtime + rtc - boot_rtc) ==
+	 * (rtc - (boot_rtc - boot_systemtime))
+	 */
+	getnstimeofday(&elapsed_rtc_delta);
+	ktime_get_ts(&system_time);
+	elapsed_rtc_delta = timespec_sub(elapsed_rtc_delta, system_time);
+	spin_unlock_irqrestore(&alarm_slock, flags);
+
+	ANDROID_ALARM_DPRINTF(ANDROID_ALARM_PRINT_INFO,
+		"alarm_late_init: rtc to elapsed realtime delta %ld.%09ld\n",
+		elapsed_rtc_delta.tv_sec, elapsed_rtc_delta.tv_nsec);
+	return 0;
+}
+
+static int __init alarm_init(void)
+{
+	int err;
+	int i;
+
+	for (i = 0; i < ANDROID_ALARM_SYSTEMTIME; i++) {
+		hrtimer_init(&alarm_timer[i], CLOCK_REALTIME, HRTIMER_MODE_ABS);
+		alarm_timer[i].function = alarm_timer_triggered;
+	}
+	hrtimer_init(&alarm_timer[ANDROID_ALARM_SYSTEMTIME],
+		     CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
+	alarm_timer[ANDROID_ALARM_SYSTEMTIME].function = alarm_timer_triggered;
+	err = platform_driver_register(&alarm_driver);
+	if (err < 0)
+		goto err1;
+	wake_lock_init(&alarm_wake_lock, WAKE_LOCK_SUSPEND, "alarm");
+	wake_lock_init(&alarm_rtc_wake_lock, WAKE_LOCK_SUSPEND, "alarm_rtc");
+	rtc_alarm_interface.class = rtc_class;
+	err = class_interface_register(&rtc_alarm_interface);
+	if (err < 0)
+		goto err2;
+
+	return 0;
+
+err2:
+	wake_lock_destroy(&alarm_rtc_wake_lock);
+	wake_lock_destroy(&alarm_wake_lock);
+	platform_driver_unregister(&alarm_driver);
+err1:
+	return err;
+}
+
+static void  __exit alarm_exit(void)
+{
+	class_interface_unregister(&rtc_alarm_interface);
+	wake_lock_destroy(&alarm_rtc_wake_lock);
+	wake_lock_destroy(&alarm_wake_lock);
+	platform_driver_unregister(&alarm_driver);
+}
+
+late_initcall(alarm_late_init);
+module_init(alarm_init);
+module_exit(alarm_exit);
+
--- linux-mvl-dove-2.6.32.orig/drivers/rtc/rtc-ds1307.c
+++ linux-mvl-dove-2.6.32/drivers/rtc/rtc-ds1307.c
@@ -775,7 +775,7 @@
 
 read_rtc:
 	/* read RTC registers */
-	tmp = ds1307->read_block_data(ds1307->client, 0, 8, buf);
+	tmp = ds1307->read_block_data(ds1307->client, ds1307->offset, 8, buf);
 	if (tmp != 8) {
 		pr_debug("read error %d\n", tmp);
 		err = -EIO;
@@ -860,7 +860,7 @@
 		if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
 			tmp += 12;
 		i2c_smbus_write_byte_data(client,
-				DS1307_REG_HOUR,
+				ds1307->offset + DS1307_REG_HOUR,
 				bin2bcd(tmp));
 	}
 
--- linux-mvl-dove-2.6.32.orig/drivers/rtc/rtc-ds1511.c
+++ linux-mvl-dove-2.6.32/drivers/rtc/rtc-ds1511.c
@@ -480,7 +480,7 @@
 static struct bin_attribute ds1511_nvram_attr = {
 	.attr = {
 		.name = "nvram",
-		.mode = S_IRUGO | S_IWUGO,
+		.mode = S_IRUGO | S_IWUSR,
 	},
 	.size = DS1511_RAM_MAX,
 	.read = ds1511_nvram_read,
--- linux-mvl-dove-2.6.32.orig/drivers/net/sky2.h
+++ linux-mvl-dove-2.6.32/drivers/net/sky2.h
@@ -16,6 +16,13 @@
 	PCI_DEV_REG5    = 0x88,
 	PCI_CFG_REG_0	= 0x90,
 	PCI_CFG_REG_1	= 0x94,
+
+	PSM_CONFIG_REG0  = 0x98,
+	PSM_CONFIG_REG1	 = 0x9C,
+	PSM_CONFIG_REG2  = 0x160,
+	PSM_CONFIG_REG3  = 0x164,
+	PSM_CONFIG_REG4  = 0x168,
+
 };
 
 /* Yukon-2 */
@@ -48,6 +55,37 @@
 	PCI_USEDATA64	= 1<<0,		/* Use 64Bit Data bus ext */
 };
 
+/*	PCI_OUR_REG_3		32 bit	Our Register 3 (Yukon-ECU only) */
+enum pci_dev_reg_3 {
+	P_CLK_ASF_REGS_DIS	= 1<<18,/* Disable Clock ASF (Yukon-Ext.) */
+	P_CLK_COR_REGS_D0_DIS	= 1<<17,/* Disable Clock Core Regs D0 */
+	P_CLK_MACSEC_DIS	= 1<<17,/* Disable Clock MACSec (Yukon-Ext.) */
+	P_CLK_PCI_REGS_D0_DIS	= 1<<16,/* Disable Clock PCI  Regs D0 */
+	P_CLK_COR_YTB_ARB_DIS	= 1<<15,/* Disable Clock YTB  Arbiter */
+	P_CLK_MAC_LNK1_D3_DIS	= 1<<14,/* Disable Clock MAC  Link1 D3 */
+	P_CLK_COR_LNK1_D0_DIS	= 1<<13,/* Disable Clock Core Link1 D0 */
+	P_CLK_MAC_LNK1_D0_DIS	= 1<<12,/* Disable Clock MAC  Link1 D0 */
+	P_CLK_COR_LNK1_D3_DIS	= 1<<11,/* Disable Clock Core Link1 D3 */
+	P_CLK_PCI_MST_ARB_DIS	= 1<<10,/* Disable Clock PCI  Master Arb. */
+	P_CLK_COR_REGS_D3_DIS	= 1<<9,	/* Disable Clock Core Regs D3 */
+	P_CLK_PCI_REGS_D3_DIS	= 1<<8,	/* Disable Clock PCI  Regs D3 */
+	P_CLK_REF_LNK1_GM_DIS	= 1<<7,	/* Disable Clock Ref. Link1 GMAC */
+	P_CLK_COR_LNK1_GM_DIS	= 1<<6,	/* Disable Clock Core Link1 GMAC */
+	P_CLK_PCI_COMMON_DIS	= 1<<5,	/* Disable Clock PCI  Common */
+	P_CLK_COR_COMMON_DIS	= 1<<4,	/* Disable Clock Core Common */
+	P_CLK_PCI_LNK1_BMU_DIS	= 1<<3,	/* Disable Clock PCI  Link1 BMU */
+	P_CLK_COR_LNK1_BMU_DIS	= 1<<2,	/* Disable Clock Core Link1 BMU */
+	P_CLK_PCI_LNK1_BIU_DIS	= 1<<1,	/* Disable Clock PCI  Link1 BIU */
+	P_CLK_COR_LNK1_BIU_DIS	= 1<<0,	/* Disable Clock Core Link1 BIU */
+	PCIE_OUR3_WOL_D3_COLD_SET = P_CLK_ASF_REGS_DIS |
+				    P_CLK_COR_REGS_D0_DIS |
+				    P_CLK_COR_LNK1_D0_DIS |
+				    P_CLK_MAC_LNK1_D0_DIS |
+				    P_CLK_PCI_MST_ARB_DIS |
+				    P_CLK_COR_COMMON_DIS |
+				    P_CLK_COR_LNK1_BMU_DIS,
+};
+
 /*	PCI_OUR_REG_4		32 bit	Our Register 4 (Yukon-ECU only) */
 enum pci_dev_reg_4 {
 				/* (Link Training & Status State Machine) */
@@ -114,7 +152,7 @@
 				     P_GAT_PCIE_RX_EL_IDLE,
 };
 
-#/*	PCI_CFG_REG_1			32 bit	Config Register 1 (Yukon-Ext only) */
+/*	PCI_CFG_REG_1			32 bit	Config Register 1 (Yukon-Ext only) */
 enum pci_cfg_reg1 {
 	P_CF1_DIS_REL_EVT_RST	= 1<<24, /* Dis. Rel. Event during PCIE reset */
 										/* Bit 23..21: Release Clock on Event */
@@ -145,6 +183,72 @@
 					P_CF1_ENA_TXBMU_WR_IDLE,
 };
 
+/* Yukon-Optima */
+enum {
+	PSM_CONFIG_REG1_AC_PRESENT_STATUS = 1<<31,   /* AC Present Status */
+
+	PSM_CONFIG_REG1_PTP_CLK_SEL	  = 1<<29,   /* PTP Clock Select */
+	PSM_CONFIG_REG1_PTP_MODE	  = 1<<28,   /* PTP Mode */
+
+	PSM_CONFIG_REG1_MUX_PHY_LINK	  = 1<<27,   /* PHY Energy Detect Event */
+
+	PSM_CONFIG_REG1_EN_PIN63_AC_PRESENT = 1<<26,  /* Enable LED_DUPLEX for ac_present */
+	PSM_CONFIG_REG1_EN_PCIE_TIMER	  = 1<<25,    /* Enable PCIe Timer */
+	PSM_CONFIG_REG1_EN_SPU_TIMER	  = 1<<24,    /* Enable SPU Timer */
+	PSM_CONFIG_REG1_POLARITY_AC_PRESENT = 1<<23,  /* AC Present Polarity */
+
+	PSM_CONFIG_REG1_EN_AC_PRESENT	  = 1<<21,    /* Enable AC Present */
+
+	PSM_CONFIG_REG1_EN_GPHY_INT_PSM	= 1<<20,      /* Enable GPHY INT for PSM */
+	PSM_CONFIG_REG1_DIS_PSM_TIMER	= 1<<19,      /* Disable PSM Timer */
+};
+
+/* Yukon-Supreme */
+enum {
+	PSM_CONFIG_REG1_GPHY_ENERGY_STS	= 1<<31, /* GPHY Energy Detect Status */
+
+	PSM_CONFIG_REG1_UART_MODE_MSK	= 3<<29, /* UART_Mode */
+	PSM_CONFIG_REG1_CLK_RUN_ASF	= 1<<28, /* Enable Clock Free Running for ASF Subsystem */
+	PSM_CONFIG_REG1_UART_CLK_DISABLE= 1<<27, /* Disable UART clock */
+	PSM_CONFIG_REG1_VAUX_ONE	= 1<<26, /* Tie internal Vaux to 1'b1 */
+	PSM_CONFIG_REG1_UART_FC_RI_VAL	= 1<<25, /* Default value for UART_RI_n */
+	PSM_CONFIG_REG1_UART_FC_DCD_VAL	= 1<<24, /* Default value for UART_DCD_n */
+	PSM_CONFIG_REG1_UART_FC_DSR_VAL	= 1<<23, /* Default value for UART_DSR_n */
+	PSM_CONFIG_REG1_UART_FC_CTS_VAL	= 1<<22, /* Default value for UART_CTS_n */
+	PSM_CONFIG_REG1_LATCH_VAUX	= 1<<21, /* Enable Latch current Vaux_avlbl */
+	PSM_CONFIG_REG1_FORCE_TESTMODE_INPUT= 1<<20, /* Force Testmode pin as input PAD */
+	PSM_CONFIG_REG1_UART_RST	= 1<<19, /* UART_RST */
+	PSM_CONFIG_REG1_PSM_PCIE_L1_POL	= 1<<18, /* PCIE L1 Event Polarity for PSM */
+	PSM_CONFIG_REG1_TIMER_STAT	= 1<<17, /* PSM Timer Status */
+	PSM_CONFIG_REG1_GPHY_INT	= 1<<16, /* GPHY INT Status */
+	PSM_CONFIG_REG1_FORCE_TESTMODE_ZERO= 1<<15, /* Force internal Testmode as 1'b0 */
+	PSM_CONFIG_REG1_EN_INT_ASPM_CLKREQ = 1<<14, /* ENABLE INT for CLKRUN on ASPM and CLKREQ */
+	PSM_CONFIG_REG1_EN_SND_TASK_ASPM_CLKREQ	= 1<<13, /* ENABLE Snd_task for CLKRUN on ASPM and CLKREQ */
+	PSM_CONFIG_REG1_DIS_CLK_GATE_SND_TASK	= 1<<12, /* Disable CLK_GATE control snd_task */
+	PSM_CONFIG_REG1_DIS_FF_CHIAN_SND_INTA	= 1<<11, /* Disable flip-flop chain for sndmsg_inta */
+
+	PSM_CONFIG_REG1_DIS_LOADER	= 1<<9, /* Disable Loader SM after PSM Goes back to IDLE */
+	PSM_CONFIG_REG1_DO_PWDN		= 1<<8, /* Do Power Down, Start PSM Scheme */
+	PSM_CONFIG_REG1_DIS_PIG		= 1<<7, /* Disable Plug-in-Go SM after PSM Goes back to IDLE */
+	PSM_CONFIG_REG1_DIS_PERST	= 1<<6, /* Disable Internal PCIe Reset after PSM Goes back to IDLE */
+	PSM_CONFIG_REG1_EN_REG18_PD	= 1<<5, /* Enable REG18 Power Down for PSM */
+	PSM_CONFIG_REG1_EN_PSM_LOAD	= 1<<4, /* Disable EEPROM Loader after PSM Goes back to IDLE */
+	PSM_CONFIG_REG1_EN_PSM_HOT_RST	= 1<<3, /* Enable PCIe Hot Reset for PSM */
+	PSM_CONFIG_REG1_EN_PSM_PERST	= 1<<2, /* Enable PCIe Reset Event for PSM */
+	PSM_CONFIG_REG1_EN_PSM_PCIE_L1	= 1<<1, /* Enable PCIe L1 Event for PSM */
+	PSM_CONFIG_REG1_EN_PSM		= 1<<0, /* Enable PSM Scheme */
+};
+
+/*	PSM_CONFIG_REG4				0x0168	PSM Config Register 4 */
+enum {
+						/* PHY Link Detect Timer */
+	PSM_CONFIG_REG4_TIMER_PHY_LINK_DETECT_MSK = 0xf<<4,
+	PSM_CONFIG_REG4_TIMER_PHY_LINK_DETECT_BASE = 4,
+
+	PSM_CONFIG_REG4_DEBUG_TIMER	    = 1<<1, /* Debug Timer */
+	PSM_CONFIG_REG4_RST_PHY_LINK_DETECT = 1<<0, /* Reset GPHY Link Detect */
+};
+
 
 #define PCI_STATUS_ERROR_BITS (PCI_STATUS_DETECTED_PARITY | \
 			       PCI_STATUS_SIG_SYSTEM_ERROR | \
@@ -197,6 +301,9 @@
 	B2_I2C_IRQ	= 0x0168,
 	B2_I2C_SW	= 0x016c,
 
+	Y2_PEX_PHY_DATA = 0x0170,
+	Y2_PEX_PHY_ADDR = 0x0172,
+
 	B3_RAM_ADDR	= 0x0180,
 	B3_RAM_DATA_LO	= 0x0184,
 	B3_RAM_DATA_HI	= 0x0188,
@@ -317,6 +424,10 @@
 	Y2_IS_CHK_TXS2	= 1<<9,		/* Descriptor error TXS 2 */
 	Y2_IS_CHK_TXA2	= 1<<8,		/* Descriptor error TXA 2 */
 
+	Y2_IS_PSM_ACK	= 1<<7,		/* PSM Acknowledge (Yukon-Optima only) */
+	Y2_IS_PTP_TIST	= 1<<6,		/* PTP Time Stamp (Yukon-Optima only) */
+	Y2_IS_PHY_QLNK	= 1<<5,		/* PHY Quick Link (Yukon-Optima only) */
+
 	Y2_IS_IRQ_PHY1	= 1<<4,		/* Interrupt from PHY 1 */
 	Y2_IS_IRQ_MAC1	= 1<<3,		/* Interrupt from MAC 1 */
 	Y2_IS_CHK_RX1	= 1<<2,		/* Descriptor error Rx 1 */
@@ -435,6 +546,7 @@
  	CHIP_ID_YUKON_FE_P = 0xb8, /* YUKON-2 FE+ */
 	CHIP_ID_YUKON_SUPR = 0xb9, /* YUKON-2 Supreme */
 	CHIP_ID_YUKON_UL_2 = 0xba, /* YUKON-2 Ultra 2 */
+	CHIP_ID_YUKON_OPT  = 0xbc, /* YUKON-2 Optima */
 };
 enum yukon_ec_rev {
 	CHIP_REV_YU_EC_A1    = 0,  /* Chip Rev. for Yukon-EC A1/A0 */
@@ -459,6 +571,8 @@
 };
 enum yukon_supr_rev {
 	CHIP_REV_YU_SU_A0    = 0,
+	CHIP_REV_YU_SU_B0    = 1,
+	CHIP_REV_YU_SU_B1    = 3,
 };
 
 
@@ -513,6 +627,12 @@
 	TIM_T_STEP	= 1<<0,	/* Test step */
 };
 
+/*	Y2_PEX_PHY_ADDR/DATA		PEX PHY address and data reg  (Yukon-2 only) */
+enum {
+	PEX_RD_ACCESS	= 1<<31, /* Access Mode Read = 1, Write = 0 */
+	PEX_DB_ACCESS	= 1<<30, /* Access to debug register */
+};
+
 /*	B3_RAM_ADDR		32 bit	RAM Address, to read or write */
 					/* Bit 31..19:	reserved */
 #define RAM_ADR_RAN	0x0007ffffL	/* Bit 18.. 0:	RAM Address Range */
@@ -754,6 +874,42 @@
 	BMU_TX_CLR_IRQ_TCP	= 1<<11, /* Clear IRQ on TCP segment length mismatch */
 };
 
+/*	TBMU_TEST			0x06B8	Transmit BMU Test Register */
+enum {
+	TBMU_TEST_BMU_TX_CHK_AUTO_OFF		= 1<<31, /* BMU Tx Checksum Auto Calculation Disable */
+	TBMU_TEST_BMU_TX_CHK_AUTO_ON		= 1<<30, /* BMU Tx Checksum Auto Calculation Enable */
+	TBMU_TEST_HOME_ADD_PAD_FIX1_EN		= 1<<29, /* Home Address Paddiing FIX1 Enable */
+	TBMU_TEST_HOME_ADD_PAD_FIX1_DIS		= 1<<28, /* Home Address Paddiing FIX1 Disable */
+	TBMU_TEST_ROUTING_ADD_FIX_EN		= 1<<27, /* Routing Address Fix Enable */
+	TBMU_TEST_ROUTING_ADD_FIX_DIS		= 1<<26, /* Routing Address Fix Disable */
+	TBMU_TEST_HOME_ADD_FIX_EN		= 1<<25, /* Home address checksum fix enable */
+	TBMU_TEST_HOME_ADD_FIX_DIS		= 1<<24, /* Home address checksum fix disable */
+
+	TBMU_TEST_TEST_RSPTR_ON			= 1<<22, /* Testmode Shadow Read Ptr On */
+	TBMU_TEST_TEST_RSPTR_OFF		= 1<<21, /* Testmode Shadow Read Ptr Off */
+	TBMU_TEST_TESTSTEP_RSPTR		= 1<<20, /* Teststep Shadow Read Ptr */
+
+	TBMU_TEST_TEST_RPTR_ON			= 1<<18, /* Testmode Read Ptr On */
+	TBMU_TEST_TEST_RPTR_OFF			= 1<<17, /* Testmode Read Ptr Off */
+	TBMU_TEST_TESTSTEP_RPTR			= 1<<16, /* Teststep Read Ptr */
+
+	TBMU_TEST_TEST_WSPTR_ON			= 1<<14, /* Testmode Shadow Write Ptr On */
+	TBMU_TEST_TEST_WSPTR_OFF		= 1<<13, /* Testmode Shadow Write Ptr Off */
+	TBMU_TEST_TESTSTEP_WSPTR		= 1<<12, /* Teststep Shadow Write Ptr */
+
+	TBMU_TEST_TEST_WPTR_ON			= 1<<10, /* Testmode Write Ptr On */
+	TBMU_TEST_TEST_WPTR_OFF			= 1<<9, /* Testmode Write Ptr Off */
+	TBMU_TEST_TESTSTEP_WPTR			= 1<<8,			/* Teststep Write Ptr */
+
+	TBMU_TEST_TEST_REQ_NB_ON		= 1<<6, /* Testmode Req Nbytes/Addr On */
+	TBMU_TEST_TEST_REQ_NB_OFF		= 1<<5, /* Testmode Req Nbytes/Addr Off */
+	TBMU_TEST_TESTSTEP_REQ_NB		= 1<<4, /* Teststep Req Nbytes/Addr */
+
+	TBMU_TEST_TEST_DONE_IDX_ON		= 1<<2, /* Testmode Done Index On */
+	TBMU_TEST_TEST_DONE_IDX_OFF		= 1<<1, /* Testmode Done Index Off */
+	TBMU_TEST_TESTSTEP_DONE_IDX		= 1<<0,	/* Teststep Done Index */
+};
+
 /* Queue Prefetch Unit Offsets, use Y2_QADDR() to address (Yukon-2 only)*/
 /* PREF_UNIT_CTRL	32 bit	Prefetch Control register */
 enum {
@@ -1674,6 +1830,12 @@
 
 /*	RX_GMF_CTRL_T	32 bit	Rx GMAC FIFO Control/Test */
 enum {
+	RX_GCLKMAC_ENA	= 1<<31,	/* RX MAC Clock Gating Enable */
+	RX_GCLKMAC_OFF	= 1<<30,
+
+	RX_STFW_DIS	= 1<<29,	/* RX Store and Forward Enable */
+	RX_STFW_ENA	= 1<<28,
+
 	RX_TRUNC_ON	= 1<<27,  	/* enable  packet truncation */
 	RX_TRUNC_OFF	= 1<<26, 	/* disable packet truncation */
 	RX_VLAN_STRIP_ON = 1<<25,	/* enable  VLAN stripping */
@@ -1711,6 +1873,20 @@
 	GMF_RX_CTRL_DEF	= GMF_OPER_ON | GMF_RX_F_FL_ON,
 };
 
+/*	RX_GMF_FL_CTRL	16 bit	Rx GMAC FIFO Flush Control (Yukon-Supreme) */
+enum {
+	RX_IPV6_SA_MOB_ENA	= 1<<9,	/* IPv6 SA Mobility Support Enable */
+	RX_IPV6_SA_MOB_DIS	= 1<<8,	/* IPv6 SA Mobility Support Disable */
+	RX_IPV6_DA_MOB_ENA	= 1<<7,	/* IPv6 DA Mobility Support Enable */
+	RX_IPV6_DA_MOB_DIS	= 1<<6,	/* IPv6 DA Mobility Support Disable */
+	RX_PTR_SYNCDLY_ENA	= 1<<5,	/* Pointers Delay Synch Enable */
+	RX_PTR_SYNCDLY_DIS	= 1<<4,	/* Pointers Delay Synch Disable */
+	RX_ASF_NEWFLAG_ENA	= 1<<3,	/* RX ASF Flag New Logic Enable */
+	RX_ASF_NEWFLAG_DIS	= 1<<2,	/* RX ASF Flag New Logic Disable */
+	RX_FLSH_MISSPKT_ENA	= 1<<1,	/* RX Flush Miss-Packet Enable */
+	RX_FLSH_MISSPKT_DIS	= 1<<0,	/* RX Flush Miss-Packet Disable */
+};
+
 /*	TX_GMF_EA		32 bit	Tx GMAC FIFO End Address */
 enum {
 	TX_DYN_WM_ENA	= 3,	/* Yukon-FE+ specific */
--- linux-mvl-dove-2.6.32.orig/drivers/net/jme.c
+++ linux-mvl-dove-2.6.32/drivers/net/jme.c
@@ -681,20 +681,28 @@
 	struct jme_ring *rxring = &(jme->rxring[0]);
 	struct jme_buffer_info *rxbi = rxring->bufinf + i;
 	struct sk_buff *skb;
+	dma_addr_t mapping;
 
 	skb = netdev_alloc_skb(jme->dev,
 		jme->dev->mtu + RX_EXTRA_LEN);
 	if (unlikely(!skb))
 		return -ENOMEM;
 
+	mapping = pci_map_page(jme->pdev, virt_to_page(skb->data),
+			       offset_in_page(skb->data), skb_tailroom(skb),
+			       PCI_DMA_FROMDEVICE);
+	if (unlikely(pci_dma_mapping_error(jme->pdev, mapping))) {
+		dev_kfree_skb(skb);
+		return -ENOMEM;
+	}
+
+	if (likely(rxbi->mapping))
+		pci_unmap_page(jme->pdev, rxbi->mapping,
+			       rxbi->len, PCI_DMA_FROMDEVICE);
+
 	rxbi->skb = skb;
 	rxbi->len = skb_tailroom(skb);
-	rxbi->mapping = pci_map_page(jme->pdev,
-					virt_to_page(skb->data),
-					offset_in_page(skb->data),
-					rxbi->len,
-					PCI_DMA_FROMDEVICE);
-
+	rxbi->mapping = mapping;
 	return 0;
 }
 
@@ -946,6 +954,8 @@
 				jme->jme_vlan_rx(skb, jme->vlgrp,
 					le16_to_cpu(rxdesc->descwb.vlan));
 				NET_STAT(jme).rx_bytes += 4;
+			} else {
+				dev_kfree_skb(skb);
 			}
 		} else {
 			jme->jme_rx(skb);
@@ -1576,6 +1586,16 @@
 	}
 }
 
+static inline void
+jme_phy_on(struct jme_adapter *jme)
+{
+	u32 bmcr;
+
+	bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
+	bmcr &= ~BMCR_PDOWN;
+	jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
+}
+
 static int
 jme_open(struct net_device *netdev)
 {
@@ -1596,10 +1616,12 @@
 
 	jme_start_irq(jme);
 
-	if (test_bit(JME_FLAG_SSET, &jme->flags))
+	if (test_bit(JME_FLAG_SSET, &jme->flags)) {
+		jme_phy_on(jme);
 		jme_set_settings(netdev, &jme->old_ecmd);
-	else
+	} else {
 		jme_reset_phy_processor(jme);
+	}
 
 	jme_reset_link(jme);
 
@@ -2085,12 +2107,45 @@
 	jme_reset_link(jme);
 }
 
+static inline void jme_pause_rx(struct jme_adapter *jme)
+{
+	atomic_dec(&jme->link_changing);
+
+	jme_set_rx_pcc(jme, PCC_OFF);
+	if (test_bit(JME_FLAG_POLL, &jme->flags)) {
+		JME_NAPI_DISABLE(jme);
+	} else {
+		tasklet_disable(&jme->rxclean_task);
+		tasklet_disable(&jme->rxempty_task);
+	}
+}
+
+static inline void jme_resume_rx(struct jme_adapter *jme)
+{
+	struct dynpcc_info *dpi = &(jme->dpi);
+
+	if (test_bit(JME_FLAG_POLL, &jme->flags)) {
+		JME_NAPI_ENABLE(jme);
+	} else {
+		tasklet_hi_enable(&jme->rxclean_task);
+		tasklet_hi_enable(&jme->rxempty_task);
+	}
+	dpi->cur		= PCC_P1;
+	dpi->attempt		= PCC_P1;
+	dpi->cnt		= 0;
+	jme_set_rx_pcc(jme, PCC_P1);
+
+	atomic_inc(&jme->link_changing);
+}
+
 static void
 jme_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
 {
 	struct jme_adapter *jme = netdev_priv(netdev);
 
+	jme_pause_rx(jme);
 	jme->vlgrp = grp;
+	jme_resume_rx(jme);
 }
 
 static void
@@ -2978,10 +3033,12 @@
 	jme_clear_pm(jme);
 	pci_restore_state(pdev);
 
-	if (test_bit(JME_FLAG_SSET, &jme->flags))
+	if (test_bit(JME_FLAG_SSET, &jme->flags)) {
+		jme_phy_on(jme);
 		jme_set_settings(netdev, &jme->old_ecmd);
-	else
+	} else {
 		jme_reset_phy_processor(jme);
+	}
 
 	jme_start_irq(jme);
 	netif_device_attach(netdev);
--- linux-mvl-dove-2.6.32.orig/drivers/net/tg3.c
+++ linux-mvl-dove-2.6.32/drivers/net/tg3.c
@@ -4995,7 +4995,7 @@
 	struct tg3 *tp = netdev_priv(dev);
 
 	for (i = 0; i < tp->irq_cnt; i++)
-		tg3_interrupt(tp->napi[i].irq_vec, dev);
+		tg3_interrupt(tp->napi[i].irq_vec, &tp->napi[i]);
 }
 #endif
 
@@ -5392,7 +5392,7 @@
 	mss = 0;
 	if ((mss = skb_shinfo(skb)->gso_size) != 0) {
 		struct iphdr *iph;
-		int tcp_opt_len, ip_tcp_len, hdr_len;
+		u32 tcp_opt_len, ip_tcp_len, hdr_len;
 
 		if (skb_header_cloned(skb) &&
 		    pskb_expand_head(skb, 0, 0, GFP_ATOMIC)) {
@@ -5423,8 +5423,10 @@
 								 IPPROTO_TCP,
 								 0);
 
-		if ((tp->tg3_flags2 & TG3_FLG2_HW_TSO) ||
-		    (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705)) {
+		if (tp->tg3_flags2 & TG3_FLG2_HW_TSO_2)
+			mss |= hdr_len << 9;
+		else if ((tp->tg3_flags2 & TG3_FLG2_HW_TSO_1) ||
+			GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) {
 			if (tcp_opt_len || iph->ihl > 5) {
 				int tsflags;
 
@@ -5459,6 +5461,9 @@
 
 	would_hit_hwbug = 0;
 
+	if ((tp->tg3_flags3 & TG3_FLG3_SHORT_DMA_BUG) && len <= 8)
+		would_hit_hwbug = 1;
+
 	if (tp->tg3_flags3 & TG3_FLG3_5701_DMA_BUG)
 		would_hit_hwbug = 1;
 	else if (tg3_4g_overflow_test(mapping, len))
@@ -5482,6 +5487,10 @@
 
 			tnapi->tx_buffers[entry].skb = NULL;
 
+			if ((tp->tg3_flags3 & TG3_FLG3_SHORT_DMA_BUG) &&
+				len <= 8)
+					would_hit_hwbug = 1;
+
 			if (tg3_4g_overflow_test(mapping, len))
 				would_hit_hwbug = 1;
 
@@ -8159,6 +8168,7 @@
 	pci_disable_msi(tp->pdev);
 
 	tp->tg3_flags2 &= ~TG3_FLG2_USING_MSI;
+	tp->napi[0].irq_vec = tp->pdev->irq;
 
 	err = tg3_request_irq(tp, 0);
 	if (err)
@@ -12608,6 +12618,9 @@
 		}
 	}
 
+	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)
+		tp->tg3_flags3 |= TG3_FLG3_SHORT_DMA_BUG;
+
 	tp->irq_max = 1;
 
 #ifdef TG3_NAPI
@@ -13975,8 +13988,7 @@
 		goto err_out_iounmap;
 	}
 
-	if ((tp->tg3_flags3 & TG3_FLG3_5755_PLUS) ||
-	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)
+	if (tp->tg3_flags3 & TG3_FLG3_5755_PLUS)
 		dev->netdev_ops = &tg3_netdev_ops;
 	else
 		dev->netdev_ops = &tg3_netdev_ops_dma_bug;
--- linux-mvl-dove-2.6.32.orig/drivers/net/pppol2tp.c
+++ linux-mvl-dove-2.6.32/drivers/net/pppol2tp.c
@@ -756,6 +756,7 @@
 
 	/* Try to dequeue as many skbs from reorder_q as we can. */
 	pppol2tp_recv_dequeue(session);
+	sock_put(sock);
 
 	return 0;
 
@@ -772,6 +773,7 @@
 	UDP_INC_STATS_USER(&init_net, UDP_MIB_INERRORS, 0);
 	tunnel->stats.rx_errors++;
 	kfree_skb(skb);
+	sock_put(sock);
 
 	return 0;
 
@@ -1178,7 +1180,8 @@
 	/* Calculate UDP checksum if configured to do so */
 	if (sk_tun->sk_no_check == UDP_CSUM_NOXMIT)
 		skb->ip_summed = CHECKSUM_NONE;
-	else if (!(skb_dst(skb)->dev->features & NETIF_F_V4_CSUM)) {
+	else if ((skb_dst(skb) && skb_dst(skb)->dev) &&
+		 (!(skb_dst(skb)->dev->features & NETIF_F_V4_CSUM))) {
 		skb->ip_summed = CHECKSUM_COMPLETE;
 		csum = skb_checksum(skb, 0, udp_len, 0);
 		uh->check = csum_tcpudp_magic(inet->saddr, inet->daddr,
@@ -1657,6 +1660,7 @@
 		if (tunnel_sock == NULL)
 			goto end;
 
+		sock_hold(tunnel_sock);
 		tunnel = tunnel_sock->sk_user_data;
 	} else {
 		tunnel = pppol2tp_tunnel_find(sock_net(sk), sp->pppol2tp.s_tunnel);
--- linux-mvl-dove-2.6.32.orig/drivers/net/ne-h8300.c
+++ linux-mvl-dove-2.6.32/drivers/net/ne-h8300.c
@@ -167,7 +167,7 @@
 #ifndef MODULE
 struct net_device * __init ne_probe(int unit)
 {
-	struct net_device *dev = alloc_ei_netdev();
+	struct net_device *dev = ____alloc_ei_netdev(0);
 	int err;
 
 	if (!dev)
@@ -197,15 +197,15 @@
 	.ndo_open		= ne_open,
 	.ndo_stop		= ne_close,
 
-	.ndo_start_xmit		= ei_start_xmit,
-	.ndo_tx_timeout		= ei_tx_timeout,
-	.ndo_get_stats		= ei_get_stats,
-	.ndo_set_multicast_list = ei_set_multicast_list,
+	.ndo_start_xmit		= __ei_start_xmit,
+	.ndo_tx_timeout		= __ei_tx_timeout,
+	.ndo_get_stats		= __ei_get_stats,
+	.ndo_set_multicast_list = __ei_set_multicast_list,
 	.ndo_validate_addr	= eth_validate_addr,
-	.ndo_set_mac_address 	= eth_mac_addr,
+	.ndo_set_mac_address	= eth_mac_addr,
 	.ndo_change_mtu		= eth_change_mtu,
 #ifdef CONFIG_NET_POLL_CONTROLLER
-	.ndo_poll_controller	= ei_poll,
+	.ndo_poll_controller	= __ei_poll,
 #endif
 };
 
@@ -638,7 +638,7 @@
 	int err;
 
 	for (this_dev = 0; this_dev < MAX_NE_CARDS; this_dev++) {
-		struct net_device *dev = alloc_ei_netdev();
+		struct net_device *dev = ____alloc_ei_netdev(0);
 		if (!dev)
 			break;
 		if (io[this_dev]) {
--- linux-mvl-dove-2.6.32.orig/drivers/net/tehuti.c
+++ linux-mvl-dove-2.6.32/drivers/net/tehuti.c
@@ -324,7 +324,7 @@
 	ENTER;
 	master = READ_REG(priv, regINIT_SEMAPHORE);
 	if (!READ_REG(priv, regINIT_STATUS) && master) {
-		rc = request_firmware(&fw, "tehuti/firmware.bin", &priv->pdev->dev);
+		rc = request_firmware(&fw, "tehuti/bdx.bin", &priv->pdev->dev);
 		if (rc)
 			goto out;
 		bdx_tx_push_desc_safe(priv, (char *)fw->data, fw->size);
@@ -2524,4 +2524,4 @@
 MODULE_LICENSE("GPL");
 MODULE_AUTHOR(DRIVER_AUTHOR);
 MODULE_DESCRIPTION(BDX_DRV_DESC);
-MODULE_FIRMWARE("tehuti/firmware.bin");
+MODULE_FIRMWARE("tehuti/bdx.bin");
--- linux-mvl-dove-2.6.32.orig/drivers/net/r6040.c
+++ linux-mvl-dove-2.6.32/drivers/net/r6040.c
@@ -135,7 +135,7 @@
 #define RX_DESC_SIZE	(RX_DCNT * sizeof(struct r6040_descriptor))
 #define TX_DESC_SIZE	(TX_DCNT * sizeof(struct r6040_descriptor))
 #define MBCR_DEFAULT	0x012A	/* MAC Bus Control Register */
-#define MCAST_MAX	4	/* Max number multicast addresses to filter */
+#define MCAST_MAX	3	/* Max number multicast addresses to filter */
 
 /* Descriptor status */
 #define DSC_OWNER_MAC	0x8000	/* MAC is the owner of this descriptor */
@@ -985,9 +985,6 @@
 			crc >>= 26;
 			hash_table[crc >> 4] |= 1 << (15 - (crc & 0xf));
 		}
-		/* Write the index of the hash table */
-		for (i = 0; i < 4; i++)
-			iowrite16(hash_table[i] << 14, ioaddr + MCR1);
 		/* Fill the MAC hash tables with their values */
 		iowrite16(hash_table[0], ioaddr + MAR0);
 		iowrite16(hash_table[1], ioaddr + MAR1);
@@ -995,6 +992,7 @@
 		iowrite16(hash_table[3], ioaddr + MAR3);
 	}
 	/* Multicast Address 1~4 case */
+	dmi = dev->mc_list;
 	for (i = 0, dmi; (i < dev->mc_count) && (i < MCAST_MAX); i++) {
 		adrp = (u16 *)dmi->dmi_addr;
 		iowrite16(adrp[0], ioaddr + MID_1L + 8*i);
@@ -1003,9 +1001,9 @@
 		dmi = dmi->next;
 	}
 	for (i = dev->mc_count; i < MCAST_MAX; i++) {
-		iowrite16(0xffff, ioaddr + MID_0L + 8*i);
-		iowrite16(0xffff, ioaddr + MID_0M + 8*i);
-		iowrite16(0xffff, ioaddr + MID_0H + 8*i);
+		iowrite16(0xffff, ioaddr + MID_1L + 8*i);
+		iowrite16(0xffff, ioaddr + MID_1M + 8*i);
+		iowrite16(0xffff, ioaddr + MID_1H + 8*i);
 	}
 }
 
--- linux-mvl-dove-2.6.32.orig/drivers/net/niu.c
+++ linux-mvl-dove-2.6.32/drivers/net/niu.c
@@ -7315,33 +7315,28 @@
 	struct niu_parent *parent = np->parent;
 	struct niu_tcam_entry *tp;
 	int i, idx, cnt;
-	u16 n_entries;
 	unsigned long flags;
-
+	int ret = 0;
 
 	/* put the tcam size here */
 	nfc->data = tcam_get_size(np);
 
 	niu_lock_parent(np, flags);
-	n_entries = nfc->rule_cnt;
 	for (cnt = 0, i = 0; i < nfc->data; i++) {
 		idx = tcam_get_index(np, i);
 		tp = &parent->tcam[idx];
 		if (!tp->valid)
 			continue;
+		if (cnt == nfc->rule_cnt) {
+			ret = -EMSGSIZE;
+			break;
+		}
 		rule_locs[cnt] = i;
 		cnt++;
 	}
 	niu_unlock_parent(np, flags);
 
-	if (n_entries != cnt) {
-		/* print warning, this should not happen */
-		pr_info(PFX "niu%d: %s In niu_get_ethtool_tcam_all, "
-			"n_entries[%d] != cnt[%d]!!!\n\n",
-			np->parent->index, np->dev->name, n_entries, cnt);
-	}
-
-	return 0;
+	return ret;
 }
 
 static int niu_get_nfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
--- linux-mvl-dove-2.6.32.orig/drivers/net/virtio_net.c
+++ linux-mvl-dove-2.6.32/drivers/net/virtio_net.c
@@ -391,6 +391,20 @@
 	}
 }
 
+static void virtnet_napi_enable(struct virtnet_info *vi)
+{
+	napi_enable(&vi->napi);
+
+	/* If all buffers were filled by other side before we napi_enabled, we
+	 * won't get another interrupt, so process any outstanding packets
+	 * now.  virtnet_poll wants re-enable the queue, so we disable here.
+	 * We synchronize against interrupts via NAPI_STATE_SCHED */
+	if (napi_schedule_prep(&vi->napi)) {
+		vi->rvq->vq_ops->disable_cb(vi->rvq);
+		__napi_schedule(&vi->napi);
+	}
+}
+
 static void refill_work(struct work_struct *work)
 {
 	struct virtnet_info *vi;
@@ -398,9 +412,8 @@
 
 	vi = container_of(work, struct virtnet_info, refill.work);
 	napi_disable(&vi->napi);
-	try_fill_recv(vi, GFP_KERNEL);
-	still_empty = (vi->num == 0);
-	napi_enable(&vi->napi);
+	still_empty = !try_fill_recv(vi, GFP_KERNEL);
+	virtnet_napi_enable(vi);
 
 	/* In theory, this can happen: if we don't get any buffers in
 	 * we will *never* try to fill again. */
@@ -512,7 +525,6 @@
 	struct virtnet_info *vi = netdev_priv(dev);
 	int capacity;
 
-again:
 	/* Free up any pending old buffers before queueing new ones. */
 	free_old_xmit_skbs(vi);
 
@@ -521,14 +533,20 @@
 
 	/* This can happen with OOM and indirect buffers. */
 	if (unlikely(capacity < 0)) {
-		netif_stop_queue(dev);
-		dev_warn(&dev->dev, "Unexpected full queue\n");
-		if (unlikely(!vi->svq->vq_ops->enable_cb(vi->svq))) {
-			vi->svq->vq_ops->disable_cb(vi->svq);
-			netif_start_queue(dev);
-			goto again;
+		if (net_ratelimit()) {
+			if (likely(capacity == -ENOMEM)) {
+				dev_warn(&dev->dev,
+					 "TX queue failure: out of memory\n");
+			} else {
+				dev->stats.tx_fifo_errors++;
+				dev_warn(&dev->dev,
+					 "Unexpected TX queue failure: %d\n",
+					 capacity);
+			}
 		}
-		return NETDEV_TX_BUSY;
+		dev->stats.tx_dropped++;
+		kfree_skb(skb);
+		return NETDEV_TX_OK;
 	}
 	vi->svq->vq_ops->kick(vi->svq);
 
@@ -592,16 +610,7 @@
 {
 	struct virtnet_info *vi = netdev_priv(dev);
 
-	napi_enable(&vi->napi);
-
-	/* If all buffers were filled by other side before we napi_enabled, we
-	 * won't get another interrupt, so process any outstanding packets
-	 * now.  virtnet_poll wants re-enable the queue, so we disable here.
-	 * We synchronize against interrupts via NAPI_STATE_SCHED */
-	if (napi_schedule_prep(&vi->napi)) {
-		vi->rvq->vq_ops->disable_cb(vi->rvq);
-		__napi_schedule(&vi->napi);
-	}
+	virtnet_napi_enable(vi);
 	return 0;
 }
 
--- linux-mvl-dove-2.6.32.orig/drivers/net/starfire.c
+++ linux-mvl-dove-2.6.32/drivers/net/starfire.c
@@ -1063,7 +1063,7 @@
 	if (retval) {
 		printk(KERN_ERR "starfire: Failed to load firmware \"%s\"\n",
 		       FIRMWARE_RX);
-		return retval;
+		goto out_init;
 	}
 	if (fw_rx->size % 4) {
 		printk(KERN_ERR "starfire: bogus length %zu in \"%s\"\n",
@@ -1108,6 +1108,9 @@
 	release_firmware(fw_tx);
 out_rx:
 	release_firmware(fw_rx);
+out_init:
+	if (retval)
+		netdev_close(dev);
 	return retval;
 }
 
--- linux-mvl-dove-2.6.32.orig/drivers/net/bnx2.c
+++ linux-mvl-dove-2.6.32/drivers/net/bnx2.c
@@ -247,6 +247,9 @@
 
 MODULE_DEVICE_TABLE(pci, bnx2_pci_tbl);
 
+static void bnx2_init_napi(struct bnx2 *bp);
+static void bnx2_del_napi(struct bnx2 *bp);
+
 static inline u32 bnx2_tx_avail(struct bnx2 *bp, struct bnx2_tx_ring_info *txr)
 {
 	u32 diff;
@@ -4752,8 +4755,12 @@
 		rc = bnx2_alloc_bad_rbuf(bp);
 	}
 
-	if (bp->flags & BNX2_FLAG_USING_MSIX)
+	if (bp->flags & BNX2_FLAG_USING_MSIX) {
 		bnx2_setup_msix_tbl(bp);
+		/* Prevent MSIX table reads and write from timing out */
+		REG_WR(bp, BNX2_MISC_ECO_HW_CTL,
+			BNX2_MISC_ECO_HW_CTL_LARGE_GRC_TMOUT_EN);
+	}
 
 	return rc;
 }
@@ -6169,6 +6176,7 @@
 	bnx2_disable_int(bp);
 
 	bnx2_setup_int_mode(bp, disable_msi);
+	bnx2_init_napi(bp);
 	bnx2_napi_enable(bp);
 	rc = bnx2_alloc_mem(bp);
 	if (rc)
@@ -6230,6 +6238,7 @@
 	bnx2_free_skbs(bp);
 	bnx2_free_irq(bp);
 	bnx2_free_mem(bp);
+	bnx2_del_napi(bp);
 	return rc;
 }
 
@@ -6437,6 +6446,7 @@
 	bnx2_free_irq(bp);
 	bnx2_free_skbs(bp);
 	bnx2_free_mem(bp);
+	bnx2_del_napi(bp);
 	bp->link_up = 0;
 	netif_carrier_off(bp->dev);
 	bnx2_set_power_state(bp, PCI_D3hot);
@@ -8012,12 +8022,21 @@
 	return str;
 }
 
-static void __devinit
+static void
+bnx2_del_napi(struct bnx2 *bp)
+{
+	int i;
+
+	for (i = 0; i < bp->irq_nvecs; i++)
+		netif_napi_del(&bp->bnx2_napi[i].napi);
+}
+
+static void
 bnx2_init_napi(struct bnx2 *bp)
 {
 	int i;
 
-	for (i = 0; i < BNX2_MAX_MSIX_VEC; i++) {
+	for (i = 0; i < bp->irq_nvecs; i++) {
 		struct bnx2_napi *bnapi = &bp->bnx2_napi[i];
 		int (*poll)(struct napi_struct *, int);
 
@@ -8086,7 +8105,6 @@
 	dev->ethtool_ops = &bnx2_ethtool_ops;
 
 	bp = netdev_priv(dev);
-	bnx2_init_napi(bp);
 
 	pci_set_drvdata(pdev, dev);
 
--- linux-mvl-dove-2.6.32.orig/drivers/net/via-velocity.c
+++ linux-mvl-dove-2.6.32/drivers/net/via-velocity.c
@@ -2186,8 +2186,6 @@
 	/* Ensure chip is running */
 	pci_set_power_state(vptr->pdev, PCI_D0);
 
-	velocity_give_many_rx_descs(vptr);
-
 	velocity_init_registers(vptr, VELOCITY_INIT_COLD);
 
 	ret = request_irq(vptr->pdev->irq, &velocity_intr, IRQF_SHARED,
@@ -2199,6 +2197,8 @@
 		goto out;
 	}
 
+	velocity_give_many_rx_descs(vptr);
+
 	mac_enable_int(vptr->mac_regs);
 	netif_start_queue(dev);
 	vptr->flags |= VELOCITY_FLAGS_OPENED;
@@ -2287,10 +2287,10 @@
 
 		dev->mtu = new_mtu;
 
-		velocity_give_many_rx_descs(vptr);
-
 		velocity_init_registers(vptr, VELOCITY_INIT_COLD);
 
+		velocity_give_many_rx_descs(vptr);
+
 		mac_enable_int(vptr->mac_regs);
 		netif_start_queue(dev);
 
--- linux-mvl-dove-2.6.32.orig/drivers/net/tg3.h
+++ linux-mvl-dove-2.6.32/drivers/net/tg3.h
@@ -2759,6 +2759,9 @@
 #define TG3_FLG3_TOGGLE_10_100_L1PLLPD	0x00008000
 #define TG3_FLG3_PHY_IS_FET		0x00010000
 #define TG3_FLG3_ENABLE_RSS		0x00020000
+#define TG3_FLG3_4G_DMA_BNDRY_BUG      0x00080000
+#define TG3_FLG3_40BIT_DMA_LIMIT_BUG   0x00100000
+#define TG3_FLG3_SHORT_DMA_BUG  0x00200000
 
 	struct timer_list		timer;
 	u16				timer_counter;
--- linux-mvl-dove-2.6.32.orig/drivers/net/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/net/Kconfig
@@ -3113,6 +3113,23 @@
 	  and session setup). One such daemon is OpenL2TP
 	  (http://openl2tp.sourceforge.net/).
 
+config PPPOLAC
+	tristate "PPP on L2TP Access Concentrator"
+	depends on PPP && INET
+	help
+	  L2TP (RFC 2661) is a tunneling protocol widely used in virtual private
+	  networks. This driver handles L2TP data packets between a UDP socket
+	  and a PPP channel, but only permits one session per socket. Thus it is
+	  fairly simple and suited for clients.
+
+config PPPOPNS
+	tristate "PPP on PPTP Network Server"
+	depends on PPP && INET
+	help
+	  PPTP (RFC 2637) is a tunneling protocol widely used in virtual private
+	  networks. This driver handles PPTP data packets between a RAW socket
+	  and a PPP channel. It is fairly simple and easy to use.
+
 config SLIP
 	tristate "SLIP (serial line) support"
 	---help---
--- linux-mvl-dove-2.6.32.orig/drivers/net/ipg.c
+++ linux-mvl-dove-2.6.32/drivers/net/ipg.c
@@ -88,7 +88,6 @@
 	"Sundance Technology ST2021 based NIC",
 	"Tamarack Microelectronics TC9020/9021 based NIC",
 	"Tamarack Microelectronics TC9020/9021 based NIC",
-	"D-Link NIC",
 	"D-Link NIC IP1000A"
 };
 
@@ -97,8 +96,7 @@
 	{ PCI_VDEVICE(SUNDANCE,	0x2021), 1 },
 	{ PCI_VDEVICE(SUNDANCE,	0x1021), 2 },
 	{ PCI_VDEVICE(DLINK,	0x9021), 3 },
-	{ PCI_VDEVICE(DLINK,	0x4000), 4 },
-	{ PCI_VDEVICE(DLINK,	0x4020), 5 },
+	{ PCI_VDEVICE(DLINK,	0x4020), 4 },
 	{ 0, }
 };
 
--- linux-mvl-dove-2.6.32.orig/drivers/net/eql.c
+++ linux-mvl-dove-2.6.32/drivers/net/eql.c
@@ -554,6 +554,8 @@
 	equalizer_t *eql;
 	master_config_t mc;
 
+	memset(&mc, 0, sizeof(master_config_t));
+
 	if (eql_is_master(dev)) {
 		eql = netdev_priv(dev);
 		mc.max_slaves = eql->max_slaves;
--- linux-mvl-dove-2.6.32.orig/drivers/net/netx-eth.c
+++ linux-mvl-dove-2.6.32/drivers/net/netx-eth.c
@@ -510,3 +510,6 @@
 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
 MODULE_LICENSE("GPL");
 MODULE_ALIAS("platform:" CARDNAME);
+MODULE_FIRMWARE("xc0.bin");
+MODULE_FIRMWARE("xc1.bin");
+MODULE_FIRMWARE("xc2.bin");
--- linux-mvl-dove-2.6.32.orig/drivers/net/spider_net.c
+++ linux-mvl-dove-2.6.32/drivers/net/spider_net.c
@@ -57,6 +57,7 @@
 MODULE_DESCRIPTION("Spider Southbridge Gigabit Ethernet driver");
 MODULE_LICENSE("GPL");
 MODULE_VERSION(VERSION);
+MODULE_FIRMWARE(SPIDER_NET_FIRMWARE_NAME);
 
 static int rx_descriptors = SPIDER_NET_RX_DESCRIPTORS_DEFAULT;
 static int tx_descriptors = SPIDER_NET_TX_DESCRIPTORS_DEFAULT;
--- linux-mvl-dove-2.6.32.orig/drivers/net/sky2.c
+++ linux-mvl-dove-2.6.32/drivers/net/sky2.c
@@ -139,6 +139,7 @@
 	{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436D) }, /* 88E8055 */
 	{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4370) }, /* 88E8075 */
 	{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4380) }, /* 88E8057 */
+	{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4381) }, /* 88E8059 */
 	{ 0 }
 };
 
@@ -602,6 +603,16 @@
 		/* apply workaround for integrated resistors calibration */
 		gm_phy_write(hw, port, PHY_MARV_PAGE_ADDR, 17);
 		gm_phy_write(hw, port, PHY_MARV_PAGE_DATA, 0x3f60);
+	} else if (hw->chip_id == CHIP_ID_YUKON_OPT && hw->chip_rev == 0) {
+		/* apply fixes in PHY AFE */
+		gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0x00ff);
+
+		/* apply RDAC termination workaround */
+		gm_phy_write(hw, port, 24, 0x2800);
+		gm_phy_write(hw, port, 23, 0x2001);
+
+		/* set page register back to 0 */
+		gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
 	} else if (hw->chip_id != CHIP_ID_YUKON_EX &&
 		   hw->chip_id < CHIP_ID_YUKON_SUPR) {
 		/* no effect on Yukon-XL */
@@ -704,11 +715,24 @@
 	sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
 }
 
+/* Enable Rx/Tx */
+static void sky2_enable_rx_tx(struct sky2_port *sky2)
+{
+	struct sky2_hw *hw = sky2->hw;
+	unsigned port = sky2->port;
+	u16 reg;
+
+	reg = gma_read16(hw, port, GM_GP_CTRL);
+	reg |= GM_GPCR_RX_ENA | GM_GPCR_TX_ENA;
+	gma_write16(hw, port, GM_GP_CTRL, reg);
+}
+
 /* Force a renegotiation */
 static void sky2_phy_reinit(struct sky2_port *sky2)
 {
 	spin_lock_bh(&sky2->phy_lock);
 	sky2_phy_init(sky2->hw, sky2->port);
+	sky2_enable_rx_tx(sky2);
 	spin_unlock_bh(&sky2->phy_lock);
 }
 
@@ -1008,11 +1032,8 @@
 static inline struct sky2_tx_le *get_tx_le(struct sky2_port *sky2, u16 *slot)
 {
 	struct sky2_tx_le *le = sky2->tx_le + *slot;
-	struct tx_ring_info *re = sky2->tx_ring + *slot;
 
 	*slot = RING_NEXT(*slot, sky2->tx_ring_size);
-	re->flags = 0;
-	re->skb = NULL;
 	le->ctrl = 0;
 	return le;
 }
@@ -1580,8 +1601,7 @@
 	return count;
 }
 
-static void sky2_tx_unmap(struct pci_dev *pdev,
-			  const struct tx_ring_info *re)
+static void sky2_tx_unmap(struct pci_dev *pdev, struct tx_ring_info *re)
 {
 	if (re->flags & TX_MAP_SINGLE)
 		pci_unmap_single(pdev, pci_unmap_addr(re, mapaddr),
@@ -1591,6 +1611,7 @@
 		pci_unmap_page(pdev, pci_unmap_addr(re, mapaddr),
 			       pci_unmap_len(re, maplen),
 			       PCI_DMA_TODEVICE);
+	re->flags = 0;
 }
 
 /*
@@ -1797,6 +1818,7 @@
 			dev->stats.tx_packets++;
 			dev->stats.tx_bytes += skb->len;
 
+			re->skb = NULL;
 			dev_kfree_skb_any(skb);
 
 			sky2->tx_next = RING_NEXT(idx, sky2->tx_ring_size);
@@ -1806,7 +1828,8 @@
 	sky2->tx_cons = idx;
 	smp_mb();
 
-	if (tx_avail(sky2) > MAX_SKB_TX_LE + 4)
+	/* Wake unless it's detached, and called e.g. from sky2_down() */
+	if (tx_avail(sky2) > MAX_SKB_TX_LE + 4 && netif_device_present(dev))
 		netif_wake_queue(dev);
 }
 
@@ -1930,7 +1953,6 @@
 {
 	struct sky2_hw *hw = sky2->hw;
 	unsigned port = sky2->port;
-	u16 reg;
 	static const char *fc_name[] = {
 		[FC_NONE]	= "none",
 		[FC_TX]		= "tx",
@@ -1938,10 +1960,7 @@
 		[FC_BOTH]	= "both",
 	};
 
-	/* enable Rx/Tx */
-	reg = gma_read16(hw, port, GM_GP_CTRL);
-	reg |= GM_GPCR_RX_ENA | GM_GPCR_TX_ENA;
-	gma_write16(hw, port, GM_GP_CTRL, reg);
+	sky2_enable_rx_tx(sky2);
 
 	gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK);
 
@@ -2096,6 +2115,27 @@
 	spin_unlock(&sky2->phy_lock);
 }
 
+/* Special quick link interrupt (Yukon-2 Optima only) */
+static void sky2_qlink_intr(struct sky2_hw *hw)
+{
+	struct sky2_port *sky2 = netdev_priv(hw->dev[0]);
+	u32 imask;
+	u16 phy;
+
+	/* disable irq */
+	imask = sky2_read32(hw, B0_IMSK);
+	imask &= ~Y2_IS_PHY_QLNK;
+	sky2_write32(hw, B0_IMSK, imask);
+
+	/* reset PHY Link Detect */
+	phy = sky2_pci_read16(hw, PSM_CONFIG_REG4);
+	sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
+	sky2_pci_write16(hw, PSM_CONFIG_REG4, phy | 1);
+	sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
+
+	sky2_link_up(sky2);
+}
+
 /* Transmit timeout is only called if we are running, carrier is up
  * and tx queue is full (stopped).
  */
@@ -2766,6 +2806,9 @@
 	if (status & Y2_IS_IRQ_PHY2)
 		sky2_phy_intr(hw, 1);
 
+	if (status & Y2_IS_PHY_QLNK)
+		sky2_qlink_intr(hw);
+
 	while ((idx = sky2_read16(hw, STAT_PUT_IDX)) != hw->st_idx) {
 		work_done += sky2_status_intr(hw, work_limit - work_done, idx);
 
@@ -2815,6 +2858,7 @@
 	case CHIP_ID_YUKON_EX:
 	case CHIP_ID_YUKON_SUPR:
 	case CHIP_ID_YUKON_UL_2:
+	case CHIP_ID_YUKON_OPT:
 		return 125;
 
 	case CHIP_ID_YUKON_FE:
@@ -2908,6 +2952,12 @@
 			| SKY2_HW_ADV_POWER_CTL;
 		break;
 
+	case CHIP_ID_YUKON_OPT:
+		hw->flags = SKY2_HW_GIGABIT
+			| SKY2_HW_NEW_LE
+			| SKY2_HW_ADV_POWER_CTL;
+		break;
+
 	default:
 		dev_err(&hw->pdev->dev, "unsupported chip type 0x%x\n",
 			hw->chip_id);
@@ -2988,6 +3038,48 @@
 				     | GMC_BYP_RETR_ON);
 	}
 
+	if (hw->chip_id == CHIP_ID_YUKON_OPT) {
+		u16 reg;
+		u32 msk;
+
+		if (hw->chip_rev == 0) {
+			/* disable PCI-E PHY power down (set PHY reg 0x80, bit 7 */
+			sky2_write32(hw, Y2_PEX_PHY_DATA, (0x80UL << 16) | (1 << 7));
+
+			/* set PHY Link Detect Timer to 1.1 second (11x 100ms) */
+			reg = 10;
+		} else {
+			/* set PHY Link Detect Timer to 0.4 second (4x 100ms) */
+			reg = 3;
+		}
+
+		reg <<= PSM_CONFIG_REG4_TIMER_PHY_LINK_DETECT_BASE;
+
+		/* reset PHY Link Detect */
+		sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
+		sky2_pci_write16(hw, PSM_CONFIG_REG4,
+				 reg | PSM_CONFIG_REG4_RST_PHY_LINK_DETECT);
+		sky2_pci_write16(hw, PSM_CONFIG_REG4, reg);
+
+
+		/* enable PHY Quick Link */
+		msk = sky2_read32(hw, B0_IMSK);
+		msk |= Y2_IS_PHY_QLNK;
+		sky2_write32(hw, B0_IMSK, msk);
+
+		/* check if PSMv2 was running before */
+		reg = sky2_pci_read16(hw, PSM_CONFIG_REG3);
+		if (reg & PCI_EXP_LNKCTL_ASPMC) {
+			int cap = pci_find_capability(pdev, PCI_CAP_ID_EXP);
+			/* restore the PCIe Link Control register */
+			sky2_pci_write16(hw, cap + PCI_EXP_LNKCTL, reg);
+		}
+		sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
+
+		/* re-enable PEX PM in PEX PHY debug reg. 8 (clear bit 12) */
+		sky2_write32(hw, Y2_PEX_PHY_DATA, PEX_DB_ACCESS | (0x08UL << 16));
+	}
+
 	/* Clear I2C IRQ noise */
 	sky2_write32(hw, B2_I2C_IRQ, 1);
 
@@ -4406,9 +4498,11 @@
 		"FE+",		/* 0xb8 */
 		"Supreme",	/* 0xb9 */
 		"UL 2",		/* 0xba */
+		"Unknown",	/* 0xbb */
+		"Optima",	/* 0xbc */
 	};
 
-	if (chipid >= CHIP_ID_YUKON_XL && chipid < CHIP_ID_YUKON_UL_2)
+	if (chipid >= CHIP_ID_YUKON_XL && chipid <= CHIP_ID_YUKON_OPT)
 		strncpy(buf, name[chipid - CHIP_ID_YUKON_XL], sz);
 	else
 		snprintf(buf, sz, "(chip %#x)", chipid);
--- linux-mvl-dove-2.6.32.orig/drivers/net/tun.c
+++ linux-mvl-dove-2.6.32/drivers/net/tun.c
@@ -721,8 +721,18 @@
 				gso.gso_type = VIRTIO_NET_HDR_GSO_TCPV6;
 			else if (sinfo->gso_type & SKB_GSO_UDP)
 				gso.gso_type = VIRTIO_NET_HDR_GSO_UDP;
-			else
-				BUG();
+			else {
+				printk(KERN_ERR "tun: unexpected GSO type: "
+				       "0x%x, gso_size %d, hdr_len %d\n",
+				       sinfo->gso_type, gso.gso_size,
+				       gso.hdr_len);
+				print_hex_dump(KERN_ERR, "tun: ",
+					       DUMP_PREFIX_NONE,
+					       16, 1, skb->head,
+					       min((int)gso.hdr_len, 64), true);
+				WARN_ON_ONCE(1);
+				return -EINVAL;
+			}
 			if (sinfo->gso_type & SKB_GSO_TCP_ECN)
 				gso.gso_type |= VIRTIO_NET_HDR_GSO_ECN;
 		} else
@@ -1006,7 +1016,8 @@
 		if (err < 0)
 			goto err_free_sk;
 
-		if (device_create_file(&tun->dev->dev, &dev_attr_tun_flags) ||
+		if (!net_eq(dev_net(tun->dev), &init_net) ||
+		    device_create_file(&tun->dev->dev, &dev_attr_tun_flags) ||
 		    device_create_file(&tun->dev->dev, &dev_attr_owner) ||
 		    device_create_file(&tun->dev->dev, &dev_attr_group))
 			printk(KERN_ERR "Failed to create tun sysfs files\n");
--- linux-mvl-dove-2.6.32.orig/drivers/net/ucc_geth.c
+++ linux-mvl-dove-2.6.32/drivers/net/ucc_geth.c
@@ -1563,7 +1563,10 @@
 
 static void ugeth_quiesce(struct ucc_geth_private *ugeth)
 {
-	/* Wait for and prevent any further xmits. */
+	/* Prevent any further xmits, plus detach the device. */
+	netif_device_detach(ugeth->ndev);
+
+	/* Wait for any current xmits to finish. */
 	netif_tx_disable(ugeth->ndev);
 
 	/* Disable the interrupt to avoid NAPI rescheduling. */
@@ -1577,7 +1580,7 @@
 {
 	napi_enable(&ugeth->napi);
 	enable_irq(ugeth->ug_info->uf_info.irq);
-	netif_tx_wake_all_queues(ugeth->ndev);
+	netif_device_attach(ugeth->ndev);
 }
 
 /* Called every time the controller might need to be made
@@ -3273,13 +3276,12 @@
 		/* Handle the transmitted buffer and release */
 		/* the BD to be used with the current frame  */
 
-		if ((bd == ugeth->txBd[txQ]) && (netif_queue_stopped(dev) == 0))
+		skb = ugeth->tx_skbuff[txQ][ugeth->skb_dirtytx[txQ]];
+		if (!skb)
 			break;
 
 		dev->stats.tx_packets++;
 
-		skb = ugeth->tx_skbuff[txQ][ugeth->skb_dirtytx[txQ]];
-
 		if (skb_queue_len(&ugeth->rx_recycle) < RX_BD_RING_LEN &&
 			     skb_recycle_check(skb,
 				    ugeth->ug_info->uf_info.max_rx_buf_length +
--- linux-mvl-dove-2.6.32.orig/drivers/net/mv643xx_eth.c
+++ linux-mvl-dove-2.6.32/drivers/net/mv643xx_eth.c
@@ -47,6 +47,7 @@
 #include <linux/platform_device.h>
 #include <linux/module.h>
 #include <linux/kernel.h>
+#include <linux/clk.h>
 #include <linux/spinlock.h>
 #include <linux/workqueue.h>
 #include <linux/phy.h>
@@ -259,6 +260,10 @@
 	 */
 	void __iomem *base;
 
+#if defined(CONFIG_HAVE_CLK)
+	struct clk	*clk;
+#endif
+
 	/*
 	 * Points at the right SMI instance to use.
 	 */
@@ -383,7 +388,7 @@
 	int port_num;
 
 	struct net_device *dev;
-
+	struct platform_device *pdev;
 	struct phy_device *phy;
 
 	struct timer_list mib_counters_timer;
@@ -406,6 +411,7 @@
 	int skb_size;
 	struct sk_buff_head rx_recycle;
 
+	u8 wol;
 	/*
 	 * RX state.
 	 */
@@ -656,6 +662,7 @@
 		struct sk_buff *skb;
 		int rx;
 		struct rx_desc *rx_desc;
+		int size;
 
 		skb = __skb_dequeue(&mp->rx_recycle);
 		if (skb == NULL)
@@ -678,10 +685,11 @@
 
 		rx_desc = rxq->rx_desc_area + rx;
 
+		size = skb->end - skb->data;
 		rx_desc->buf_ptr = dma_map_single(mp->dev->dev.parent,
-						  skb->data, mp->skb_size,
+						  skb->data, size,
 						  DMA_FROM_DEVICE);
-		rx_desc->buf_size = mp->skb_size;
+		rx_desc->buf_size = size;
 		rxq->rx_skb[rx] = skb;
 		wmb();
 		rx_desc->cmd_sts = BUFFER_OWNED_BY_DMA | RX_ENABLE_INTERRUPT;
@@ -1643,6 +1651,89 @@
 	return -EOPNOTSUPP;
 }
 
+/* Wake on Lan only supported on phy 1310 */
+static u32 wol_supported(const struct mv643xx_eth_private *mp)
+{
+	u32 phy_id;
+
+	if (mp->phy == NULL)
+		return 0;
+
+	phy_id = phy_read(mp->phy, MII_PHYSID1) << 16;
+	phy_id |= phy_read(mp->phy, MII_PHYSID2);
+
+	if((phy_id & 0xfffffff0) == (0x01410e90 & 0xfffffff0))
+		return WAKE_MAGIC | WAKE_PHY;
+	printk("wol not support for phy 0x%x\n", phy_id);
+	return 0;
+}
+
+static void phy_set_wol(struct mv643xx_eth_private *mp)
+{
+	unsigned char *addr = mp->dev->dev_addr;
+	u16 wol_control = 0x500;
+
+	phy_write(mp->phy, 22, 0);
+	phy_write(mp->phy, 18, phy_read(mp->phy, 18) | (1 << 7)); // WOL interrupt enable
+	phy_write(mp->phy, 22, 3);
+	phy_write(mp->phy, 18, (phy_read(mp->phy, 18) & 0x7fff) | 0x4880);// active low, INTn to LED2
+	phy_write(mp->phy, 22, 17);
+
+	if (mp->wol & WAKE_MAGIC) {
+		phy_write(mp->phy, 23, addr[5] << 8 | addr[4]);
+		phy_write(mp->phy, 24, addr[3] << 8 | addr[2]);
+		phy_write(mp->phy, 25, addr[1] << 8 | addr[0]);
+		wol_control |= 1 << 14;
+	}
+	if (mp->wol & WAKE_PHY)
+		wol_control |= 1 << 13;
+
+	phy_write(mp->phy, 16, wol_control);
+	phy_write(mp->phy, 22, 0);
+}
+
+static void phy_clear_wol(struct mv643xx_eth_private *mp)
+{
+	u16 wol_control = 0x500;
+
+	printk("reg 0 19 %x\n", phy_read(mp->phy, 19));
+	phy_write(mp->phy, 22, 17);
+	phy_read(mp->phy, 17);
+	printk("reg 17 17 (WOL status) %x\n", phy_read(mp->phy, 17));
+	if (mp->wol & WAKE_MAGIC)
+		wol_control |= 1 << 14; //Magic packet match enable
+	if (mp->wol & WAKE_PHY)
+		wol_control |= 1 << 13; // Link
+	
+	wol_control |= 1 << 12; //Clear WOL status
+	phy_write(mp->phy, 16, wol_control);
+       
+	phy_write(mp->phy, 22, 0);
+	phy_read(mp->phy, 19);
+}
+
+static void mv643xx_eth_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
+{
+	struct mv643xx_eth_private *mp = netdev_priv(dev);
+
+	wol->supported = wol_supported(mp);
+	wol->wolopts = mp->wol;
+}
+
+static int mv643xx_eth_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
+{
+	struct mv643xx_eth_private *mp = netdev_priv(dev);
+
+	if ((wol->wolopts & ~wol_supported(mp))
+	    || !device_can_wakeup(&mp->pdev->dev))
+		return -EOPNOTSUPP;
+
+	mp->wol = wol->wolopts;
+	device_set_wakeup_enable(&mp->pdev->dev, mp->wol);
+
+	return 0;
+}
+
 static const struct ethtool_ops mv643xx_eth_ethtool_ops = {
 	.get_settings		= mv643xx_eth_get_settings,
 	.set_settings		= mv643xx_eth_set_settings,
@@ -1662,6 +1753,8 @@
 	.get_flags		= ethtool_op_get_flags,
 	.set_flags		= ethtool_op_set_flags,
 	.get_sset_count		= mv643xx_eth_get_sset_count,
+	.get_wol		= mv643xx_eth_get_wol,
+	.set_wol		= mv643xx_eth_set_wol,
 };
 
 
@@ -2215,7 +2308,7 @@
 	} while (data >= 0 && data & BMCR_RESET);
 }
 
-static void port_start(struct mv643xx_eth_private *mp)
+static void port_start(struct mv643xx_eth_private *mp, bool reset_phy)
 {
 	u32 pscr;
 	int i;
@@ -2223,7 +2316,7 @@
 	/*
 	 * Perform PHY reset, if there is a PHY.
 	 */
-	if (mp->phy != NULL) {
+	if (reset_phy && mp->phy != NULL) {
 		struct ethtool_cmd cmd;
 
 		mv643xx_eth_get_settings(mp->dev, &cmd);
@@ -2368,7 +2461,7 @@
 		mp->int_mask |= INT_TX_END_0 << i;
 	}
 
-	port_start(mp);
+	port_start(mp, true);
 
 	wrlp(mp, INT_MASK_EXT, INT_EXT_LINK_PHY | INT_EXT_TX);
 	wrlp(mp, INT_MASK, mp->int_mask);
@@ -2464,6 +2557,14 @@
 	mv643xx_eth_recalc_skb_size(mp);
 	tx_set_rate(mp, 1000000000, 16777216);
 
+	if (dev->mtu > 1600) {
+		dev->features &= ~NETIF_F_IP_CSUM;
+		dev->vlan_features &= ~NETIF_F_IP_CSUM;
+	} else {
+		dev->features |= NETIF_F_IP_CSUM;
+		dev->vlan_features |= NETIF_F_IP_CSUM;
+	}
+
 	if (!netif_running(dev))
 		return 0;
 
@@ -2491,7 +2592,7 @@
 	if (netif_running(mp->dev)) {
 		netif_tx_stop_all_queues(mp->dev);
 		port_reset(mp);
-		port_start(mp);
+		port_start(mp, true);
 		netif_tx_wake_all_queues(mp->dev);
 	}
 }
@@ -2613,6 +2714,14 @@
 	if (msp->base == NULL)
 		goto out_free;
 
+#if defined(CONFIG_HAVE_CLK)
+	msp->clk = clk_get(&pdev->dev, NULL);
+	if (IS_ERR(msp->clk))
+		dev_notice(&pdev->dev, "cannot get clkdev\n");
+	else
+		clk_enable(msp->clk);
+#endif
+
 	/*
 	 * Set up and register SMI bus.
 	 */
@@ -2672,6 +2781,12 @@
 out_free_mii_bus:
 	mdiobus_free(msp->smi_bus);
 out_unmap:
+#if defined(CONFIG_HAVE_CLK)
+	if (!IS_ERR(msp->clk)) {
+		clk_disable(msp->clk);
+		clk_put(msp->clk);
+	}
+#endif
 	iounmap(msp->base);
 out_free:
 	kfree(msp);
@@ -2684,6 +2799,13 @@
 	struct mv643xx_eth_shared_private *msp = platform_get_drvdata(pdev);
 	struct mv643xx_eth_shared_platform_data *pd = pdev->dev.platform_data;
 
+#if defined(CONFIG_HAVE_CLK)
+	if (!IS_ERR(msp->clk)) {
+		clk_disable(msp->clk);
+		clk_put(msp->clk);
+	}
+#endif
+
 	if (pd == NULL || pd->shared_smi == NULL) {
 		mdiobus_unregister(msp->smi_bus);
 		mdiobus_free(msp->smi_bus);
@@ -2696,9 +2818,41 @@
 	return 0;
 }
 
+#ifdef CONFIG_PM
+static int mv643xx_eth_shared_suspend(struct platform_device *pdev,
+				      pm_message_t state)
+{
+	return 0;
+}
+static int mv643xx_eth_shared_resume(struct platform_device *pdev)
+{
+	struct mv643xx_eth_shared_private *msp = platform_get_drvdata(pdev);
+	struct mv643xx_eth_shared_platform_data *pd = pdev->dev.platform_data;
+
+	/*
+	 * (Re-)program MBUS remapping windows if we are asked to.
+	 */
+	if (pd != NULL && pd->dram != NULL)
+		mv643xx_eth_conf_mbus_windows(msp, pd->dram);
+
+	/*
+	 * Detect hardware parameters.
+	 */
+	msp->t_clk = (pd != NULL && pd->t_clk != 0) ? pd->t_clk : 133000000;
+	infer_hw_params(msp);
+	return 0;
+}
+
+#else
+#define mv643xx_eth_shared_suspend	NULL
+#define mv643xx_eth_shared_resume	NULL
+#endif
+
 static struct platform_driver mv643xx_eth_shared_driver = {
 	.probe		= mv643xx_eth_shared_probe,
 	.remove		= mv643xx_eth_shared_remove,
+	.suspend	= mv643xx_eth_shared_suspend,
+	.resume		= mv643xx_eth_shared_resume,
 	.driver = {
 		.name	= MV643XX_ETH_SHARED_NAME,
 		.owner	= THIS_MODULE,
@@ -2884,6 +3038,7 @@
 	mp->port_num = pd->port_number;
 
 	mp->dev = dev;
+	mp->pdev = pdev;
 
 	set_params(mp, pd);
 	dev->real_num_tx_queues = mp->txq_count;
@@ -2894,6 +3049,9 @@
 	if (mp->phy != NULL)
 		phy_init(mp, pd->speed, pd->duplex);
 
+	mp->wol = wol_supported(mp) & WAKE_MAGIC;
+	device_init_wakeup(&mp->pdev->dev, mp->wol);
+
 	SET_ETHTOOL_OPS(dev, &mv643xx_eth_ethtool_ops);
 
 	init_pscr(mp, pd->speed, pd->duplex);
@@ -2985,12 +3143,101 @@
 
 	if (netif_running(mp->dev))
 		port_reset(mp);
+
+	if (mp->phy != NULL && mp->wol)
+		phy_set_wol(mp);
+}
+
+#if CONFIG_PM
+static int mv643xx_eth_suspend(struct platform_device *pdev, pm_message_t state)
+{
+	struct mv643xx_eth_private *mp = platform_get_drvdata(pdev);
+
+	if (netif_running(mp->dev)) {
+		netif_device_detach(mp->dev);
+
+		wrlp(mp, INT_MASK_EXT, 0);
+		wrlp(mp, INT_MASK, 0);
+		rdlp(mp, INT_MASK);
+
+		port_reset(mp);
+		mv643xx_eth_get_stats(mp->dev);
+		mib_counters_update(mp);
+	}
+
+	if (mp->phy != NULL) {
+		if (mp->wol)
+			phy_set_wol(mp);
+		else
+			phy_detach(mp->phy);
+	}
+
+	return 0;
 }
 
+static int mv643xx_eth_resume(struct platform_device *pdev)
+{
+	struct mv643xx_eth_private *mp = platform_get_drvdata(pdev);
+	struct mv643xx_eth_platform_data *pd = pdev->dev.platform_data;
+	
+	if (pd->phy_addr != MV643XX_ETH_PHY_NONE)
+		mp->phy = phy_scan(mp, pd->phy_addr);
+
+	if (mp->wol)
+		phy_clear_wol(mp);
+	else if (mp->phy != NULL)
+		phy_init(mp, pd->speed, pd->duplex);
+
+	if (netif_running(mp->dev)) {
+		wrlp(mp, INT_CAUSE, 0);
+		wrlp(mp, INT_CAUSE_EXT, 0);
+		rdlp(mp, INT_CAUSE_EXT);
+
+		init_pscr(mp, pd->speed, pd->duplex);
+
+		mib_counters_clear(mp);
+
+		if (mp->shared->win_protect)
+			wrl(mp, WINDOW_PROTECT(mp->port_num),
+			    mp->shared->win_protect);
+
+		wrlp(mp, SDMA_CONFIG, PORT_SDMA_CONFIG_DEFAULT_VALUE);
+
+		set_rx_coal(mp, 250);
+		set_tx_coal(mp, 0);
+
+		port_start(mp, false);
+
+		wrlp(mp, INT_MASK_EXT, INT_EXT_LINK_PHY | INT_EXT_TX);
+		wrlp(mp, INT_MASK, mp->int_mask);
+		netif_device_attach(mp->dev);
+	} else {
+		init_pscr(mp, pd->speed, pd->duplex);
+		mib_counters_clear(mp);
+
+		if (mp->shared->win_protect)
+			wrl(mp, WINDOW_PROTECT(mp->port_num),
+			    mp->shared->win_protect);
+
+		wrlp(mp, SDMA_CONFIG, PORT_SDMA_CONFIG_DEFAULT_VALUE);
+
+		set_rx_coal(mp, 250);
+		set_tx_coal(mp, 0);
+	}
+	return 0;
+}
+
+#else
+#define mv643xx_eth_suspend	NULL
+#define mv643xx_eth_resume	NULL
+#endif
+
 static struct platform_driver mv643xx_eth_driver = {
 	.probe		= mv643xx_eth_probe,
 	.remove		= mv643xx_eth_remove,
 	.shutdown	= mv643xx_eth_shutdown,
+	.suspend	= mv643xx_eth_suspend,
+	.resume		= mv643xx_eth_resume,
 	.driver = {
 		.name	= MV643XX_ETH_NAME,
 		.owner	= THIS_MODULE,
--- linux-mvl-dove-2.6.32.orig/drivers/net/Makefile
+++ linux-mvl-dove-2.6.32/drivers/net/Makefile
@@ -25,6 +25,8 @@
 obj-$(CONFIG_ATL2) += atlx/
 obj-$(CONFIG_ATL1E) += atl1e/
 obj-$(CONFIG_ATL1C) += atl1c/
+obj-$(CONFIG_MV_INCLUDE_GIG_ETH) += ../../arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_network/mv_ethernet/
+obj-$(CONFIG_MV_ETH_NFP) += ../../arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_network/nfp_mgr/
 obj-$(CONFIG_GIANFAR) += gianfar_driver.o
 obj-$(CONFIG_TEHUTI) += tehuti.o
 obj-$(CONFIG_ENIC) += enic/
@@ -138,7 +140,7 @@
 obj-$(CONFIG_SB1250_MAC) += sb1250-mac.o
 obj-$(CONFIG_B44) += b44.o
 obj-$(CONFIG_FORCEDETH) += forcedeth.o
-obj-$(CONFIG_NE_H8300) += ne-h8300.o 8390.o
+obj-$(CONFIG_NE_H8300) += ne-h8300.o
 obj-$(CONFIG_AX88796) += ax88796.o
 obj-$(CONFIG_BCM63XX_ENET) += bcm63xx_enet.o
 
@@ -158,6 +160,8 @@
 obj-$(CONFIG_PPP_MPPE) += ppp_mppe.o
 obj-$(CONFIG_PPPOE) += pppox.o pppoe.o
 obj-$(CONFIG_PPPOL2TP) += pppox.o pppol2tp.o
+obj-$(CONFIG_PPPOLAC) += pppox.o pppolac.o
+obj-$(CONFIG_PPPOPNS) += pppox.o pppopns.o
 
 obj-$(CONFIG_SLIP) += slip.o
 obj-$(CONFIG_SLHC) += slhc.o
@@ -208,7 +212,7 @@
 obj-$(CONFIG_LP486E) += lp486e.o
 
 obj-$(CONFIG_ETH16I) += eth16i.o
-obj-$(CONFIG_ZORRO8390) += zorro8390.o 8390.o
+obj-$(CONFIG_ZORRO8390) += zorro8390.o
 obj-$(CONFIG_HPLANCE) += hplance.o 7990.o
 obj-$(CONFIG_MVME147_NET) += mvme147.o 7990.o
 obj-$(CONFIG_EQUALIZER) += eql.o
@@ -220,7 +224,7 @@
 obj-$(CONFIG_DECLANCE) += declance.o
 obj-$(CONFIG_ATARILANCE) += atarilance.o
 obj-$(CONFIG_A2065) += a2065.o
-obj-$(CONFIG_HYDRA) += hydra.o 8390.o
+obj-$(CONFIG_HYDRA) += hydra.o
 obj-$(CONFIG_ARIADNE) += ariadne.o
 obj-$(CONFIG_CS89x0) += cs89x0.o
 obj-$(CONFIG_MACSONIC) += macsonic.o
--- linux-mvl-dove-2.6.32.orig/drivers/net/forcedeth.c
+++ linux-mvl-dove-2.6.32/drivers/net/forcedeth.c
@@ -5900,7 +5900,7 @@
 	/* Limit the number of tx's outstanding for hw bug */
 	if (id->driver_data & DEV_NEED_TX_LIMIT) {
 		np->tx_limit = 1;
-		if ((id->driver_data & DEV_NEED_TX_LIMIT2) &&
+		if (((id->driver_data & DEV_NEED_TX_LIMIT2) == DEV_NEED_TX_LIMIT2) &&
 		    pci_dev->revision >= 0xA2)
 			np->tx_limit = 0;
 	}
--- linux-mvl-dove-2.6.32.orig/drivers/net/zorro8390.c
+++ linux-mvl-dove-2.6.32/drivers/net/zorro8390.c
@@ -125,7 +125,7 @@
 
     board = z->resource.start;
     ioaddr = board+cards[i].offset;
-    dev = alloc_ei_netdev();
+    dev = ____alloc_ei_netdev(0);
     if (!dev)
 	return -ENOMEM;
     if (!request_mem_region(ioaddr, NE_IO_EXTENT*2, DRV_NAME)) {
@@ -145,15 +145,15 @@
 static const struct net_device_ops zorro8390_netdev_ops = {
 	.ndo_open		= zorro8390_open,
 	.ndo_stop		= zorro8390_close,
-	.ndo_start_xmit		= ei_start_xmit,
-	.ndo_tx_timeout		= ei_tx_timeout,
-	.ndo_get_stats		= ei_get_stats,
-	.ndo_set_multicast_list = ei_set_multicast_list,
+	.ndo_start_xmit		= __ei_start_xmit,
+	.ndo_tx_timeout		= __ei_tx_timeout,
+	.ndo_get_stats		= __ei_get_stats,
+	.ndo_set_multicast_list = __ei_set_multicast_list,
 	.ndo_validate_addr	= eth_validate_addr,
 	.ndo_set_mac_address 	= eth_mac_addr,
 	.ndo_change_mtu		= eth_change_mtu,
 #ifdef CONFIG_NET_POLL_CONTROLLER
-	.ndo_poll_controller	= ei_poll,
+	.ndo_poll_controller	= __ei_poll,
 #endif
 };
 
--- linux-mvl-dove-2.6.32.orig/drivers/net/ks8851_mll.c
+++ linux-mvl-dove-2.6.32/drivers/net/ks8851_mll.c
@@ -854,8 +854,8 @@
 
 static irqreturn_t ks_irq(int irq, void *pw)
 {
-	struct ks_net *ks = pw;
-	struct net_device *netdev = ks->netdev;
+	struct net_device *netdev = pw;
+	struct ks_net *ks = netdev_priv(netdev);
 	u16 status;
 
 	/*this should be the first in IRQ handler */
--- linux-mvl-dove-2.6.32.orig/drivers/net/hydra.c
+++ linux-mvl-dove-2.6.32/drivers/net/hydra.c
@@ -98,15 +98,15 @@
 	.ndo_open		= hydra_open,
 	.ndo_stop		= hydra_close,
 
-	.ndo_start_xmit		= ei_start_xmit,
-	.ndo_tx_timeout		= ei_tx_timeout,
-	.ndo_get_stats		= ei_get_stats,
-	.ndo_set_multicast_list = ei_set_multicast_list,
+	.ndo_start_xmit		= __ei_start_xmit,
+	.ndo_tx_timeout		= __ei_tx_timeout,
+	.ndo_get_stats		= __ei_get_stats,
+	.ndo_set_multicast_list = __ei_set_multicast_list,
 	.ndo_validate_addr	= eth_validate_addr,
-	.ndo_set_mac_address 	= eth_mac_addr,
+	.ndo_set_mac_address	= eth_mac_addr,
 	.ndo_change_mtu		= eth_change_mtu,
 #ifdef CONFIG_NET_POLL_CONTROLLER
-	.ndo_poll_controller	= ei_poll,
+	.ndo_poll_controller	= __ei_poll,
 #endif
 };
 
@@ -125,7 +125,7 @@
 	0x10, 0x12, 0x14, 0x16, 0x18, 0x1a, 0x1c, 0x1e,
     };
 
-    dev = alloc_ei_netdev();
+    dev = ____alloc_ei_netdev(0);
     if (!dev)
 	return -ENOMEM;
 
--- linux-mvl-dove-2.6.32.orig/drivers/net/3c503.c
+++ linux-mvl-dove-2.6.32/drivers/net/3c503.c
@@ -380,6 +380,12 @@
     return retval;
 }
 
+static irqreturn_t el2_probe_interrupt(int irq, void *seen)
+{
+	*(bool *)seen = true;
+	return IRQ_HANDLED;
+}
+
 static int
 el2_open(struct net_device *dev)
 {
@@ -391,22 +397,35 @@
 
 	outb(EGACFR_NORM, E33G_GACFR);	/* Enable RAM and interrupts. */
 	do {
-	    retval = request_irq(*irqp, NULL, 0, "bogus", dev);
-	    if (retval >= 0) {
+		bool seen;
+
+		retval = request_irq(*irqp, el2_probe_interrupt, 0,
+				     dev->name, &seen);
+		if (retval == -EBUSY)
+			continue;
+		if (retval < 0)
+			goto err_disable;
+
 		/* Twinkle the interrupt, and check if it's seen. */
-		unsigned long cookie = probe_irq_on();
+		seen = false;
+		smp_wmb();
 		outb_p(0x04 << ((*irqp == 9) ? 2 : *irqp), E33G_IDCFR);
 		outb_p(0x00, E33G_IDCFR);
-		if (*irqp == probe_irq_off(cookie)	/* It's a good IRQ line! */
-		    && ((retval = request_irq(dev->irq = *irqp,
-		    eip_interrupt, 0, dev->name, dev)) == 0))
-		    break;
-	    } else {
-		    if (retval != -EBUSY)
-			    return retval;
-	    }
+		msleep(1);
+		free_irq(*irqp, el2_probe_interrupt);
+		if (!seen)
+			continue;
+
+		retval = request_irq(dev->irq = *irqp, eip_interrupt, 0,
+				     dev->name, dev);
+		if (retval == -EBUSY)
+			continue;
+		if (retval < 0)
+			goto err_disable;
 	} while (*++irqp);
+
 	if (*irqp == 0) {
+	err_disable:
 	    outb(EGACFR_IRQOFF, E33G_GACFR);	/* disable interrupts. */
 	    return -EAGAIN;
 	}
--- linux-mvl-dove-2.6.32.orig/drivers/net/bcm63xx_enet.c
+++ linux-mvl-dove-2.6.32/drivers/net/bcm63xx_enet.c
@@ -1248,9 +1248,15 @@
 	drvinfo->n_stats = BCM_ENET_STATS_LEN;
 }
 
-static int bcm_enet_get_stats_count(struct net_device *netdev)
+static int bcm_enet_get_sset_count(struct net_device *netdev,
+					int string_set)
 {
-	return BCM_ENET_STATS_LEN;
+	switch (string_set) {
+	case ETH_SS_STATS:
+		return BCM_ENET_STATS_LEN;
+	default:
+		return -EINVAL;
+	}
 }
 
 static void bcm_enet_get_strings(struct net_device *netdev,
@@ -1476,7 +1482,7 @@
 
 static struct ethtool_ops bcm_enet_ethtool_ops = {
 	.get_strings		= bcm_enet_get_strings,
-	.get_stats_count	= bcm_enet_get_stats_count,
+	.get_sset_count		= bcm_enet_get_sset_count,
 	.get_ethtool_stats      = bcm_enet_get_ethtool_stats,
 	.get_settings		= bcm_enet_get_settings,
 	.set_settings		= bcm_enet_set_settings,
--- linux-mvl-dove-2.6.32.orig/drivers/net/pppopns.c
+++ linux-mvl-dove-2.6.32/drivers/net/pppopns.c
@@ -0,0 +1,334 @@
+/* drivers/net/pppopns.c
+ *
+ * Driver for PPP on PPTP Network Server / PPPoPNS Socket (RFC 2637)
+ *
+ * Copyright (C) 2009 Google, Inc.
+ * Author: Chia-chi Yeh <chiachi@android.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/* This driver handles PPTP data packets between a RAW socket and a PPP channel.
+ * The socket is created in the kernel space and connected to the same address
+ * of the control socket. To keep things simple, packets are always sent with
+ * sequence but without acknowledgement. This driver should work on both IPv4
+ * and IPv6. */
+
+#include <linux/module.h>
+#include <linux/skbuff.h>
+#include <linux/file.h>
+#include <linux/net.h>
+#include <linux/ppp_defs.h>
+#include <linux/if.h>
+#include <linux/if_ppp.h>
+#include <linux/if_pppox.h>
+#include <linux/ppp_channel.h>
+
+#define GRE_HEADER_SIZE		8
+
+#define PPTP_GRE_BITS		htons(0x2001)
+#define PPTP_GRE_BITS_MASK	htons(0xEF7F)
+#define PPTP_GRE_SEQ_BIT	htons(0x1000)
+#define PPTP_GRE_ACK_BIT	htons(0x0080)
+#define PPTP_GRE_TYPE		htons(0x880B)
+
+#define PPP_ADDR	0xFF
+#define PPP_CTRL	0x03
+
+struct header {
+	__u16	bits;
+	__u16	type;
+	__u16	length;
+	__u16	call;
+	__u32	sequence;
+} __attribute__((packed));
+
+static void pppopns_recv(struct sock *sk_raw, int length)
+{
+	struct sock *sk;
+	struct pppopns_opt *opt;
+	struct sk_buff *skb;
+	struct header *hdr;
+
+	/* Lock sk_raw to prevent sk from being closed. */
+	lock_sock(sk_raw);
+	sk = (struct sock *)sk_raw->sk_user_data;
+	if (!sk) {
+		release_sock(sk_raw);
+		return;
+	}
+	sock_hold(sk);
+	release_sock(sk_raw);
+	opt = &pppox_sk(sk)->proto.pns;
+
+	/* Process packets from the receive queue. */
+	while ((skb = skb_dequeue(&sk_raw->sk_receive_queue))) {
+		skb_pull(skb, skb_transport_header(skb) - skb->data);
+
+		/* Drop the packet if it is too short. */
+		if (skb->len < GRE_HEADER_SIZE)
+			goto drop;
+
+		/* Check the header. */
+		hdr = (struct header *)skb->data;
+		if (hdr->type != PPTP_GRE_TYPE || hdr->call != opt->local ||
+			(hdr->bits & PPTP_GRE_BITS_MASK) != PPTP_GRE_BITS)
+			goto drop;
+
+		/* Skip all fields including optional ones. */
+		if (!skb_pull(skb, GRE_HEADER_SIZE +
+				(hdr->bits & PPTP_GRE_SEQ_BIT ? 4 : 0) +
+				(hdr->bits & PPTP_GRE_ACK_BIT ? 4 : 0)))
+			goto drop;
+
+		/* Check the length. */
+		if (skb->len != ntohs(hdr->length))
+			goto drop;
+
+		/* Skip PPP address and control if they are present. */
+		if (skb->len >= 2 && skb->data[0] == PPP_ADDR &&
+				skb->data[1] == PPP_CTRL)
+			skb_pull(skb, 2);
+
+		/* Fix PPP protocol if it is compressed. */
+		if (skb->len >= 1 && skb->data[0] & 1)
+			skb_push(skb, 1)[0] = 0;
+
+		/* Deliver the packet to PPP channel. We have to lock sk to
+		 * prevent another thread from calling pppox_unbind_sock(). */
+		skb_orphan(skb);
+		lock_sock(sk);
+		ppp_input(&pppox_sk(sk)->chan, skb);
+		release_sock(sk);
+		continue;
+drop:
+		kfree_skb(skb);
+	}
+	sock_put(sk);
+}
+
+static int pppopns_xmit(struct ppp_channel *chan, struct sk_buff *skb)
+{
+	struct sock *sk_raw = (struct sock *)chan->private;
+	struct pppopns_opt *opt = &pppox_sk(sk_raw->sk_user_data)->proto.pns;
+	struct msghdr msg = {.msg_flags = MSG_NOSIGNAL | MSG_DONTWAIT};
+	struct kvec iov;
+	struct header *hdr;
+	__u16 length;
+
+	/* Install PPP address and control. */
+	skb_push(skb, 2);
+	skb->data[0] = PPP_ADDR;
+	skb->data[1] = PPP_CTRL;
+	length = skb->len;
+
+	/* Install PPTP GRE header. */
+	hdr = (struct header *)skb_push(skb, 12);
+	hdr->bits = PPTP_GRE_BITS | PPTP_GRE_SEQ_BIT;
+	hdr->type = PPTP_GRE_TYPE;
+	hdr->length = htons(length);
+	hdr->call = opt->remote;
+	hdr->sequence = htonl(opt->sequence);
+	opt->sequence++;
+
+	/* Now send the packet via RAW socket. */
+	iov.iov_base = skb->data;
+	iov.iov_len = skb->len;
+	kernel_sendmsg(sk_raw->sk_socket, &msg, &iov, 1, skb->len);
+	kfree_skb(skb);
+	return 1;
+}
+
+/******************************************************************************/
+
+static struct ppp_channel_ops pppopns_channel_ops = {
+	.start_xmit = pppopns_xmit,
+};
+
+static int pppopns_connect(struct socket *sock, struct sockaddr *useraddr,
+	int addrlen, int flags)
+{
+	struct sock *sk = sock->sk;
+	struct pppox_sock *po = pppox_sk(sk);
+	struct sockaddr_pppopns *addr = (struct sockaddr_pppopns *)useraddr;
+	struct sockaddr_storage ss;
+	struct socket *sock_tcp = NULL;
+	struct socket *sock_raw = NULL;
+	struct sock *sk_tcp;
+	struct sock *sk_raw;
+	int error;
+
+	if (addrlen != sizeof(struct sockaddr_pppopns))
+		return -EINVAL;
+
+	lock_sock(sk);
+	error = -EALREADY;
+	if (sk->sk_state != PPPOX_NONE)
+		goto out;
+
+	sock_tcp = sockfd_lookup(addr->tcp_socket, &error);
+	if (!sock_tcp)
+		goto out;
+	sk_tcp = sock_tcp->sk;
+	error = -EPROTONOSUPPORT;
+	if (sk_tcp->sk_protocol != IPPROTO_TCP)
+		goto out;
+	addrlen = sizeof(struct sockaddr_storage);
+	error = kernel_getpeername(sock_tcp, (struct sockaddr *)&ss, &addrlen);
+	if (error)
+		goto out;
+	if (!sk_tcp->sk_bound_dev_if) {
+		struct dst_entry *dst = sk_dst_get(sk_tcp);
+		error = -ENODEV;
+		if (!dst)
+			goto out;
+		sk_tcp->sk_bound_dev_if = dst->dev->ifindex;
+		dst_release(dst);
+	}
+
+	error = sock_create(ss.ss_family, SOCK_RAW, IPPROTO_GRE, &sock_raw);
+	if (error)
+		goto out;
+	sk_raw = sock_raw->sk;
+	sk_raw->sk_bound_dev_if = sk_tcp->sk_bound_dev_if;
+	error = kernel_connect(sock_raw, (struct sockaddr *)&ss, addrlen, 0);
+	if (error)
+		goto out;
+
+	po->chan.hdrlen = 14;
+	po->chan.private = sk_raw;
+	po->chan.ops = &pppopns_channel_ops;
+	po->chan.mtu = PPP_MTU - 80;
+	po->proto.pns.local = addr->local;
+	po->proto.pns.remote = addr->remote;
+
+	error = ppp_register_channel(&po->chan);
+	if (error)
+		goto out;
+
+	sk->sk_state = PPPOX_CONNECTED;
+	sk_raw->sk_user_data = sk;
+	sk_raw->sk_data_ready = pppopns_recv;
+
+out:
+	if (sock_tcp)
+		sockfd_put(sock_tcp);
+	if (error && sock_raw)
+		sock_release(sock_raw);
+	release_sock(sk);
+	return error;
+}
+
+static int pppopns_release(struct socket *sock)
+{
+	struct sock *sk = sock->sk;
+
+	if (!sk)
+		return 0;
+
+	lock_sock(sk);
+	if (sock_flag(sk, SOCK_DEAD)) {
+		release_sock(sk);
+		return -EBADF;
+	}
+
+	if (sk->sk_state != PPPOX_NONE) {
+		struct sock *sk_raw = (struct sock *)pppox_sk(sk)->chan.private;
+		pppox_unbind_sock(sk);
+		lock_sock(sk_raw);
+		sk_raw->sk_user_data = NULL;
+		release_sock(sk_raw);
+		sock_release(sk_raw->sk_socket);
+	}
+
+	sock_orphan(sk);
+	sock->sk = NULL;
+	release_sock(sk);
+	sock_put(sk);
+	return 0;
+}
+
+/******************************************************************************/
+
+static struct proto pppopns_proto = {
+	.name = "PPPOPNS",
+	.owner = THIS_MODULE,
+	.obj_size = sizeof(struct pppox_sock),
+};
+
+static struct proto_ops pppopns_proto_ops = {
+	.family = PF_PPPOX,
+	.owner = THIS_MODULE,
+	.release = pppopns_release,
+	.bind = sock_no_bind,
+	.connect = pppopns_connect,
+	.socketpair = sock_no_socketpair,
+	.accept = sock_no_accept,
+	.getname = sock_no_getname,
+	.poll = sock_no_poll,
+	.ioctl = pppox_ioctl,
+	.listen = sock_no_listen,
+	.shutdown = sock_no_shutdown,
+	.setsockopt = sock_no_setsockopt,
+	.getsockopt = sock_no_getsockopt,
+	.sendmsg = sock_no_sendmsg,
+	.recvmsg = sock_no_recvmsg,
+	.mmap = sock_no_mmap,
+};
+
+static int pppopns_create(struct net *net, struct socket *sock)
+{
+	struct sock *sk;
+
+	sk = sk_alloc(net, PF_PPPOX, GFP_KERNEL, &pppopns_proto);
+	if (!sk)
+		return -ENOMEM;
+
+	sock_init_data(sock, sk);
+	sock->state = SS_UNCONNECTED;
+	sock->ops = &pppopns_proto_ops;
+	sk->sk_protocol = PX_PROTO_OPNS;
+	sk->sk_state = PPPOX_NONE;
+	return 0;
+}
+
+/******************************************************************************/
+
+static struct pppox_proto pppopns_pppox_proto = {
+	.create = pppopns_create,
+	.owner = THIS_MODULE,
+};
+
+static int __init pppopns_init(void)
+{
+	int error;
+
+	error = proto_register(&pppopns_proto, 0);
+	if (error)
+		return error;
+
+	error = register_pppox_proto(PX_PROTO_OPNS, &pppopns_pppox_proto);
+	if (error)
+		proto_unregister(&pppopns_proto);
+	return error;
+}
+
+static void __exit pppopns_exit(void)
+{
+	unregister_pppox_proto(PX_PROTO_OPNS);
+	proto_unregister(&pppopns_proto);
+}
+
+module_init(pppopns_init);
+module_exit(pppopns_exit);
+
+MODULE_DESCRIPTION("PPP on PPTP Network Server (PPPoPNS)");
+MODULE_AUTHOR("Chia-chi Yeh <chiachi@android.com>");
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/drivers/net/bnx2x_main.c
+++ linux-mvl-dove-2.6.32/drivers/net/bnx2x_main.c
@@ -49,6 +49,7 @@
 #include <linux/prefetch.h>
 #include <linux/zlib.h>
 #include <linux/io.h>
+#include <linux/stringify.h>
 
 
 #include "bnx2x.h"
@@ -63,8 +64,13 @@
 #include <linux/firmware.h>
 #include "bnx2x_fw_file_hdr.h"
 /* FW files */
-#define FW_FILE_PREFIX_E1	"bnx2x-e1-"
-#define FW_FILE_PREFIX_E1H	"bnx2x-e1h-"
+#define FW_FILE_VERSION					\
+	__stringify(BCM_5710_FW_MAJOR_VERSION) "."	\
+	__stringify(BCM_5710_FW_MINOR_VERSION) "."	\
+	__stringify(BCM_5710_FW_REVISION_VERSION) "."	\
+	__stringify(BCM_5710_FW_ENGINEERING_VERSION)
+#define FW_FILE_NAME_E1		"bnx2x-e1-" FW_FILE_VERSION ".fw"
+#define FW_FILE_NAME_E1H	"bnx2x-e1h-" FW_FILE_VERSION ".fw"
 
 /* Time in jiffies before concluding the transmitter is hung */
 #define TX_TIMEOUT		(5*HZ)
@@ -77,6 +83,8 @@
 MODULE_DESCRIPTION("Broadcom NetXtreme II BCM57710/57711/57711E Driver");
 MODULE_LICENSE("GPL");
 MODULE_VERSION(DRV_MODULE_VERSION);
+MODULE_FIRMWARE(FW_FILE_NAME_E1);
+MODULE_FIRMWARE(FW_FILE_NAME_E1H);
 
 static int multi_mode = 1;
 module_param(multi_mode, int, 0);
@@ -11830,21 +11838,14 @@
 
 static int __devinit bnx2x_init_firmware(struct bnx2x *bp, struct device *dev)
 {
-	char fw_file_name[40] = {0};
+	const char *fw_file_name;
 	struct bnx2x_fw_file_hdr *fw_hdr;
-	int rc, offset;
+	int rc;
 
-	/* Create a FW file name */
 	if (CHIP_IS_E1(bp))
-		offset = sprintf(fw_file_name, FW_FILE_PREFIX_E1);
+		fw_file_name = FW_FILE_NAME_E1;
 	else
-		offset = sprintf(fw_file_name, FW_FILE_PREFIX_E1H);
-
-	sprintf(fw_file_name + offset, "%d.%d.%d.%d.fw",
-		BCM_5710_FW_MAJOR_VERSION,
-		BCM_5710_FW_MINOR_VERSION,
-		BCM_5710_FW_REVISION_VERSION,
-		BCM_5710_FW_ENGINEERING_VERSION);
+		fw_file_name = FW_FILE_NAME_E1H;
 
 	printk(KERN_INFO PFX "Loading %s\n", fw_file_name);
 
--- linux-mvl-dove-2.6.32.orig/drivers/net/r8169.c
+++ linux-mvl-dove-2.6.32/drivers/net/r8169.c
@@ -23,6 +23,7 @@
 #include <linux/tcp.h>
 #include <linux/init.h>
 #include <linux/dma-mapping.h>
+#include <linux/pci-aspm.h>
 
 #include <asm/system.h>
 #include <asm/io.h>
@@ -186,7 +187,12 @@
 
 MODULE_DEVICE_TABLE(pci, rtl8169_pci_tbl);
 
-static int rx_copybreak = 200;
+/*
+ * we set our copybreak very high so that we don't have
+ * to allocate 16k frames all the time (see note in
+ * rtl8169_open()
+ */
+static int rx_copybreak = 16383;
 static int use_dac;
 static struct {
 	u32 msg_enable;
@@ -552,6 +558,11 @@
 			break;
 		udelay(25);
 	}
+	/*
+	 * According to hardware specs a 20us delay is required after write
+	 * complete indication, but before sending next command.
+	 */
+	udelay(20);
 }
 
 static int mdio_read(void __iomem *ioaddr, int reg_addr)
@@ -571,6 +582,12 @@
 		}
 		udelay(25);
 	}
+	/*
+	 * According to hardware specs a 20us delay is required after read
+	 * complete indication, but before sending next command.
+	 */
+	udelay(20);
+
 	return value;
 }
 
@@ -2827,8 +2844,13 @@
 	spin_lock_irq(&tp->lock);
 
 	RTL_W8(Cfg9346, Cfg9346_Unlock);
-	RTL_W32(MAC0, low);
+
 	RTL_W32(MAC4, high);
+	RTL_R32(MAC4);
+
+	RTL_W32(MAC0, low);
+	RTL_R32(MAC0);
+
 	RTL_W8(Cfg9346, Cfg9346_Lock);
 
 	spin_unlock_irq(&tp->lock);
@@ -3009,6 +3031,11 @@
 	mii->reg_num_mask = 0x1f;
 	mii->supports_gmii = !!(cfg->features & RTL_FEATURE_GMII);
 
+	/* disable ASPM completely as that cause random device stop working
+	 * problems as well as full system hangs for some PCIe devices users */
+	pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
+				     PCIE_LINK_STATE_CLKPM);
+
 	/* enable device (incl. PCI PM wakeup and hotplug setup) */
 	rc = pci_enable_device(pdev);
 	if (rc < 0) {
@@ -3169,6 +3196,13 @@
 	dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
 #endif
 
+	/* Ubuntu temporary workaround for bug #76489, disable
+	 * NETIF_F_TSO by default for RTL8111/8168B chipsets.
+	 * People can re-enable if required */
+	if (tp->mac_version == RTL_GIGA_MAC_VER_11
+				|| tp->mac_version == RTL_GIGA_MAC_VER_12)
+		dev->features &= ~NETIF_F_TSO;
+
 	tp->intr_mask = 0xffff;
 	tp->align = cfg->align;
 	tp->hw_start = cfg->hw_start;
@@ -3245,9 +3279,13 @@
 }
 
 static void rtl8169_set_rxbufsize(struct rtl8169_private *tp,
-				  struct net_device *dev)
+				  unsigned int mtu)
 {
-	unsigned int max_frame = dev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
+	unsigned int max_frame = mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
+
+	if (max_frame != 16383)
+		printk(KERN_WARNING PFX "WARNING! Changing of MTU on this "
+			"NIC may lead to frame reception errors!\n");
 
 	tp->rx_buf_sz = (max_frame > RX_BUF_SIZE) ? max_frame : RX_BUF_SIZE;
 }
@@ -3259,7 +3297,17 @@
 	int retval = -ENOMEM;
 
 
-	rtl8169_set_rxbufsize(tp, dev);
+	/*
+	 * Note that we use a magic value here, its wierd I know
+	 * its done because, some subset of rtl8169 hardware suffers from
+	 * a problem in which frames received that are longer than
+	 * the size set in RxMaxSize register return garbage sizes
+	 * when received.  To avoid this we need to turn off filtering,
+	 * which is done by setting a value of 16383 in the RxMaxSize register
+	 * and allocating 16k frames to handle the largest possible rx value
+	 * thats what the magic math below does.
+	 */
+	rtl8169_set_rxbufsize(tp, 16383 - VLAN_ETH_HLEN - ETH_FCS_LEN);
 
 	/*
 	 * Rx and Tx desscriptors needs 256 bytes alignment.
@@ -3700,7 +3748,8 @@
 	RTL_W16(IntrMitigate, 0x5151);
 
 	/* Work around for RxFIFO overflow. */
-	if (tp->mac_version == RTL_GIGA_MAC_VER_11) {
+	if (tp->mac_version == RTL_GIGA_MAC_VER_11 ||
+	    tp->mac_version == RTL_GIGA_MAC_VER_22) {
 		tp->intr_event |= RxFIFOOver | PCSTimeout;
 		tp->intr_event &= ~RxOverflow;
 	}
@@ -3912,7 +3961,7 @@
 
 	rtl8169_down(dev);
 
-	rtl8169_set_rxbufsize(tp, dev);
+	rtl8169_set_rxbufsize(tp, dev->mtu);
 
 	ret = rtl8169_init_ring(dev);
 	if (ret < 0)
@@ -3964,7 +4013,7 @@
 static struct sk_buff *rtl8169_alloc_rx_skb(struct pci_dev *pdev,
 					    struct net_device *dev,
 					    struct RxDesc *desc, int rx_buf_sz,
-					    unsigned int align)
+					    unsigned int align, gfp_t gfp)
 {
 	struct sk_buff *skb;
 	dma_addr_t mapping;
@@ -3972,7 +4021,7 @@
 
 	pad = align ? align : NET_IP_ALIGN;
 
-	skb = netdev_alloc_skb(dev, rx_buf_sz + pad);
+	skb = __netdev_alloc_skb(dev, rx_buf_sz + pad, gfp);
 	if (!skb)
 		goto err_out;
 
@@ -4003,7 +4052,7 @@
 }
 
 static u32 rtl8169_rx_fill(struct rtl8169_private *tp, struct net_device *dev,
-			   u32 start, u32 end)
+			   u32 start, u32 end, gfp_t gfp)
 {
 	u32 cur;
 
@@ -4018,7 +4067,7 @@
 
 		skb = rtl8169_alloc_rx_skb(tp->pci_dev, dev,
 					   tp->RxDescArray + i,
-					   tp->rx_buf_sz, tp->align);
+					   tp->rx_buf_sz, tp->align, gfp);
 		if (!skb)
 			break;
 
@@ -4046,7 +4095,7 @@
 	memset(tp->tx_skb, 0x0, NUM_TX_DESC * sizeof(struct ring_info));
 	memset(tp->Rx_skbuff, 0x0, NUM_RX_DESC * sizeof(struct sk_buff *));
 
-	if (rtl8169_rx_fill(tp, dev, 0, NUM_RX_DESC) != NUM_RX_DESC)
+	if (rtl8169_rx_fill(tp, dev, 0, NUM_RX_DESC, GFP_KERNEL) != NUM_RX_DESC)
 		goto err_out;
 
 	rtl8169_mark_as_last_descriptor(tp->RxDescArray + NUM_RX_DESC - 1);
@@ -4297,7 +4346,7 @@
 
 	tp->cur_tx += frags + 1;
 
-	smp_wmb();
+	wmb();
 
 	RTL_W8(TxPoll, NPQ);	/* set polling bit */
 
@@ -4549,7 +4598,7 @@
 	count = cur_rx - tp->cur_rx;
 	tp->cur_rx = cur_rx;
 
-	delta = rtl8169_rx_fill(tp, dev, tp->dirty_rx, tp->cur_rx);
+	delta = rtl8169_rx_fill(tp, dev, tp->dirty_rx, tp->cur_rx, GFP_ATOMIC);
 	if (!delta && count && netif_msg_intr(tp))
 		printk(KERN_INFO "%s: no Rx buffer allocated\n", dev->name);
 	tp->dirty_rx += delta;
@@ -4592,7 +4641,8 @@
 
 		/* Work around for rx fifo overflow */
 		if (unlikely(status & RxFIFOOver) &&
-		(tp->mac_version == RTL_GIGA_MAC_VER_11)) {
+		    (tp->mac_version == RTL_GIGA_MAC_VER_11 ||
+		     tp->mac_version == RTL_GIGA_MAC_VER_22)) {
 			netif_stop_queue(dev);
 			rtl8169_tx_timeout(dev);
 			break;
@@ -4657,7 +4707,7 @@
 		 * until it does.
 		 */
 		tp->intr_mask = 0xffff;
-		smp_wmb();
+		wmb();
 		RTL_W16(IntrMask, tp->intr_event);
 	}
 
@@ -4795,8 +4845,8 @@
 		mc_filter[1] = swab32(data);
 	}
 
-	RTL_W32(MAR0 + 0, mc_filter[0]);
 	RTL_W32(MAR0 + 4, mc_filter[1]);
+	RTL_W32(MAR0 + 0, mc_filter[0]);
 
 	RTL_W32(RxConfig, tmp);
 
--- linux-mvl-dove-2.6.32.orig/drivers/net/dm9000.c
+++ linux-mvl-dove-2.6.32/drivers/net/dm9000.c
@@ -471,17 +471,13 @@
 	return dm->rx_csum;
 }
 
-static int dm9000_set_rx_csum(struct net_device *dev, uint32_t data)
+static int dm9000_set_rx_csum_unlocked(struct net_device *dev, uint32_t data)
 {
 	board_info_t *dm = to_dm9000_board(dev);
-	unsigned long flags;
 
 	if (dm->can_csum) {
 		dm->rx_csum = data;
-
-		spin_lock_irqsave(&dm->lock, flags);
 		iow(dm, DM9000_RCSR, dm->rx_csum ? RCSR_CSUM : 0);
-		spin_unlock_irqrestore(&dm->lock, flags);
 
 		return 0;
 	}
@@ -489,6 +485,19 @@
 	return -EOPNOTSUPP;
 }
 
+static int dm9000_set_rx_csum(struct net_device *dev, uint32_t data)
+{
+	board_info_t *dm = to_dm9000_board(dev);
+	unsigned long flags;
+	int ret;
+
+	spin_lock_irqsave(&dm->lock, flags);
+	ret = dm9000_set_rx_csum_unlocked(dev, data);
+	spin_unlock_irqrestore(&dm->lock, flags);
+
+	return ret;
+}
+
 static int dm9000_set_tx_csum(struct net_device *dev, uint32_t data)
 {
 	board_info_t *dm = to_dm9000_board(dev);
@@ -667,7 +676,7 @@
  *  Set DM9000 multicast address
  */
 static void
-dm9000_hash_table(struct net_device *dev)
+dm9000_hash_table_unlocked(struct net_device *dev)
 {
 	board_info_t *db = netdev_priv(dev);
 	struct dev_mc_list *mcptr = dev->mc_list;
@@ -676,12 +685,9 @@
 	u32 hash_val;
 	u16 hash_table[4];
 	u8 rcr = RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN;
-	unsigned long flags;
 
 	dm9000_dbg(db, 1, "entering %s\n", __func__);
 
-	spin_lock_irqsave(&db->lock, flags);
-
 	for (i = 0, oft = DM9000_PAR; i < 6; i++, oft++)
 		iow(db, oft, dev->dev_addr[i]);
 
@@ -711,6 +717,16 @@
 	}
 
 	iow(db, DM9000_RCR, rcr);
+}
+
+static void
+dm9000_hash_table(struct net_device *dev)
+{
+	board_info_t *db = netdev_priv(dev);
+	unsigned long flags;
+
+	spin_lock_irqsave(&db->lock, flags);
+	dm9000_hash_table_unlocked(dev);
 	spin_unlock_irqrestore(&db->lock, flags);
 }
 
@@ -729,7 +745,7 @@
 	db->io_mode = ior(db, DM9000_ISR) >> 6;	/* ISR bit7:6 keeps I/O mode */
 
 	/* Checksum mode */
-	dm9000_set_rx_csum(dev, db->rx_csum);
+	dm9000_set_rx_csum_unlocked(dev, db->rx_csum);
 
 	/* GPIO0 on pre-activate PHY */
 	iow(db, DM9000_GPR, 0);	/* REG_1F bit0 activate phyxcer */
@@ -749,7 +765,7 @@
 	iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */
 
 	/* Set address filter table */
-	dm9000_hash_table(dev);
+	dm9000_hash_table_unlocked(dev);
 
 	imr = IMR_PAR | IMR_PTM | IMR_PRM;
 	if (db->type != TYPE_DM9000E)
--- linux-mvl-dove-2.6.32.orig/drivers/net/cpmac.c
+++ linux-mvl-dove-2.6.32/drivers/net/cpmac.c
@@ -1176,7 +1176,8 @@
 		if (netif_msg_drv(priv))
 			printk(KERN_ERR "%s: Could not attach to PHY\n",
 			       dev->name);
-		return PTR_ERR(priv->phy);
+		rc = PTR_ERR(priv->phy);
+		goto fail;
 	}
 
 	if ((rc = register_netdev(dev))) {
--- linux-mvl-dove-2.6.32.orig/drivers/net/gianfar.c
+++ linux-mvl-dove-2.6.32/drivers/net/gianfar.c
@@ -1621,7 +1621,7 @@
 		if (skb_queue_len(&priv->rx_recycle) < priv->rx_ring_size &&
 				skb_recycle_check(skb, priv->rx_buffer_size +
 					RXBUF_ALIGNMENT))
-			__skb_queue_head(&priv->rx_recycle, skb);
+			skb_queue_head(&priv->rx_recycle, skb);
 		else
 			dev_kfree_skb_any(skb);
 
@@ -1703,7 +1703,7 @@
 	struct gfar_private *priv = netdev_priv(dev);
 	struct sk_buff *skb = NULL;
 
-	skb = __skb_dequeue(&priv->rx_recycle);
+	skb = skb_dequeue(&priv->rx_recycle);
 	if (!skb)
 		skb = netdev_alloc_skb(dev,
 				priv->rx_buffer_size + RXBUF_ALIGNMENT);
@@ -1862,7 +1862,7 @@
 				 * recycle list.
 				 */
 				skb->data = skb->head + NET_SKB_PAD;
-				__skb_queue_head(&priv->rx_recycle, skb);
+				skb_queue_head(&priv->rx_recycle, skb);
 			}
 		} else {
 			/* Increment the number of packets */
--- linux-mvl-dove-2.6.32.orig/drivers/net/skge.c
+++ linux-mvl-dove-2.6.32/drivers/net/skge.c
@@ -40,6 +40,7 @@
 #include <linux/sched.h>
 #include <linux/seq_file.h>
 #include <linux/mii.h>
+#include <linux/dmi.h>
 #include <asm/irq.h>
 
 #include "skge.h"
@@ -3890,6 +3891,8 @@
 		       dev->name, dev->dev_addr);
 }
 
+static int only_32bit_dma;
+
 static int __devinit skge_probe(struct pci_dev *pdev,
 				const struct pci_device_id *ent)
 {
@@ -3911,7 +3914,7 @@
 
 	pci_set_master(pdev);
 
-	if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
+	if (!only_32bit_dma && !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
 		using_dac = 1;
 		err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
 	} else if (!(err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))) {
@@ -4168,8 +4171,21 @@
 	.shutdown =	skge_shutdown,
 };
 
+static struct dmi_system_id skge_32bit_dma_boards[] = {
+	{
+		.ident = "Gigabyte nForce boards",
+		.matches = {
+			DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co"),
+			DMI_MATCH(DMI_BOARD_NAME, "nForce"),
+		},
+	},
+	{}
+};
+
 static int __init skge_init_module(void)
 {
+	if (dmi_check_system(skge_32bit_dma_boards))
+		only_32bit_dma = 1;
 	skge_debug_init();
 	return pci_register_driver(&skge_driver);
 }
--- linux-mvl-dove-2.6.32.orig/drivers/net/smc911x.c
+++ linux-mvl-dove-2.6.32/drivers/net/smc911x.c
@@ -106,6 +106,58 @@
  */
 #define POWER_DOWN		 1
 
+
+/* store this information for the driver.. */
+struct smc911x_local {
+	/*
+	 * If I have to wait until the DMA is finished and ready to reload a
+	 * packet, I will store the skbuff here. Then, the DMA will send it
+	 * out and free it.
+	 */
+	struct sk_buff *pending_tx_skb;
+
+	/* version/revision of the SMC911x chip */
+	u16 version;
+	u16 revision;
+
+	/* FIFO sizes */
+	int tx_fifo_kb;
+	int tx_fifo_size;
+	int rx_fifo_size;
+	int afc_cfg;
+
+	/* Contains the current active receive/phy mode */
+	int ctl_rfduplx;
+	int ctl_rspeed;
+
+	u32 msg_enable;
+	u32 phy_type;
+	struct mii_if_info mii;
+
+	/* work queue */
+	struct work_struct phy_configure;
+
+	int tx_throttle;
+	spinlock_t lock;
+
+	struct net_device *netdev;
+
+#ifdef SMC_USE_DMA
+	/* DMA needs the physical address of the chip */
+	u_long physaddr;
+	int rxdma;
+	int txdma;
+	int rxdma_active;
+	int txdma_active;
+	struct sk_buff *current_rx_skb;
+	struct sk_buff *current_tx_skb;
+	struct device *dev;
+#endif
+
+	/* Interrupt polarity */
+	int int_polarity;
+};
+
 #if SMC_DEBUG > 0
 #define DBG(n, args...)				 \
 	do {					 \
@@ -1916,6 +1968,8 @@
 		"%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME,
 		lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg);
 
+	lp->int_polarity = int_polarity;
+
 	spin_lock_init(&lp->lock);
 
 	/* Get the MAC address */
@@ -2055,9 +2109,11 @@
  */
 static int __devinit smc911x_drv_probe(struct platform_device *pdev)
 {
+	struct smc911x_platdata *pd = pdev->dev.platform_data;
 	struct net_device *ndev;
 	struct resource *res;
 	struct smc911x_local *lp;
+	int int_polarity;
 	unsigned int *addr;
 	int ret;
 
@@ -2105,6 +2161,10 @@
 		goto release_both;
 	}
 
+	int_polarity = 0;
+	if (pd != NULL)
+		int_polarity = pd->int_polarity;
+
 	platform_set_drvdata(pdev, ndev);
 	lp->base = addr;
 	ndev->base_addr = res->start;
--- linux-mvl-dove-2.6.32.orig/drivers/net/smsc911x.c
+++ linux-mvl-dove-2.6.32/drivers/net/smsc911x.c
@@ -85,8 +85,7 @@
 	 */
 	spinlock_t mac_lock;
 
-	/* spinlock to ensure 16-bit accesses are serialised.
-	 * unused with a 32-bit bus */
+	/* spinlock to ensure register accesses are serialised */
 	spinlock_t dev_lock;
 
 	struct phy_device *phy_dev;
@@ -119,37 +118,33 @@
 	unsigned int hashlo;
 };
 
-/* The 16-bit access functions are significantly slower, due to the locking
- * necessary.  If your bus hardware can be configured to do this for you
- * (in response to a single 32-bit operation from software), you should use
- * the 32-bit access functions instead. */
-
-static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
+static inline u32 __smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
 {
 	if (pdata->config.flags & SMSC911X_USE_32BIT)
 		return readl(pdata->ioaddr + reg);
 
-	if (pdata->config.flags & SMSC911X_USE_16BIT) {
-		u32 data;
-		unsigned long flags;
-
-		/* these two 16-bit reads must be performed consecutively, so
-		 * must not be interrupted by our own ISR (which would start
-		 * another read operation) */
-		spin_lock_irqsave(&pdata->dev_lock, flags);
-		data = ((readw(pdata->ioaddr + reg) & 0xFFFF) |
+	if (pdata->config.flags & SMSC911X_USE_16BIT)
+		return ((readw(pdata->ioaddr + reg) & 0xFFFF) |
 			((readw(pdata->ioaddr + reg + 2) & 0xFFFF) << 16));
-		spin_unlock_irqrestore(&pdata->dev_lock, flags);
-
-		return data;
-	}
 
 	BUG();
 	return 0;
 }
 
-static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
-				      u32 val)
+static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
+{
+	u32 data;
+	unsigned long flags;
+
+	spin_lock_irqsave(&pdata->dev_lock, flags);
+	data = __smsc911x_reg_read(pdata, reg);
+	spin_unlock_irqrestore(&pdata->dev_lock, flags);
+
+	return data;
+}
+
+static inline void __smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
+					u32 val)
 {
 	if (pdata->config.flags & SMSC911X_USE_32BIT) {
 		writel(val, pdata->ioaddr + reg);
@@ -157,44 +152,54 @@
 	}
 
 	if (pdata->config.flags & SMSC911X_USE_16BIT) {
-		unsigned long flags;
-
-		/* these two 16-bit writes must be performed consecutively, so
-		 * must not be interrupted by our own ISR (which would start
-		 * another read operation) */
-		spin_lock_irqsave(&pdata->dev_lock, flags);
 		writew(val & 0xFFFF, pdata->ioaddr + reg);
 		writew((val >> 16) & 0xFFFF, pdata->ioaddr + reg + 2);
-		spin_unlock_irqrestore(&pdata->dev_lock, flags);
 		return;
 	}
 
 	BUG();
 }
 
+static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
+				      u32 val)
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&pdata->dev_lock, flags);
+	__smsc911x_reg_write(pdata, reg, val);
+	spin_unlock_irqrestore(&pdata->dev_lock, flags);
+}
+
 /* Writes a packet to the TX_DATA_FIFO */
 static inline void
 smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf,
 		      unsigned int wordcount)
 {
+	unsigned long flags;
+
+	spin_lock_irqsave(&pdata->dev_lock, flags);
+
 	if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
 		while (wordcount--)
-			smsc911x_reg_write(pdata, TX_DATA_FIFO, swab32(*buf++));
-		return;
+			__smsc911x_reg_write(pdata, TX_DATA_FIFO,
+					     swab32(*buf++));
+		goto out;
 	}
 
 	if (pdata->config.flags & SMSC911X_USE_32BIT) {
 		writesl(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount);
-		return;
+		goto out;
 	}
 
 	if (pdata->config.flags & SMSC911X_USE_16BIT) {
 		while (wordcount--)
-			smsc911x_reg_write(pdata, TX_DATA_FIFO, *buf++);
-		return;
+			__smsc911x_reg_write(pdata, TX_DATA_FIFO, *buf++);
+		goto out;
 	}
 
 	BUG();
+out:
+	spin_unlock_irqrestore(&pdata->dev_lock, flags);
 }
 
 /* Reads a packet out of the RX_DATA_FIFO */
@@ -202,24 +207,31 @@
 smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf,
 		     unsigned int wordcount)
 {
+	unsigned long flags;
+
+	spin_lock_irqsave(&pdata->dev_lock, flags);
+
 	if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
 		while (wordcount--)
-			*buf++ = swab32(smsc911x_reg_read(pdata, RX_DATA_FIFO));
-		return;
+			*buf++ = swab32(__smsc911x_reg_read(pdata,
+							    RX_DATA_FIFO));
+		goto out;
 	}
 
 	if (pdata->config.flags & SMSC911X_USE_32BIT) {
 		readsl(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount);
-		return;
+		goto out;
 	}
 
 	if (pdata->config.flags & SMSC911X_USE_16BIT) {
 		while (wordcount--)
-			*buf++ = smsc911x_reg_read(pdata, RX_DATA_FIFO);
-		return;
+			*buf++ = __smsc911x_reg_read(pdata, RX_DATA_FIFO);
+		goto out;
 	}
 
 	BUG();
+out:
+	spin_unlock_irqrestore(&pdata->dev_lock, flags);
 }
 
 /* waits for MAC not busy, with timeout.  Only called by smsc911x_mac_read
--- linux-mvl-dove-2.6.32.orig/drivers/net/e100.c
+++ linux-mvl-dove-2.6.32/drivers/net/e100.c
@@ -1817,6 +1817,7 @@
 				  &nic->cbs_dma_addr);
 	if (!nic->cbs)
 		return -ENOMEM;
+	memset(nic->cbs, 0, count * sizeof(struct cb));
 
 	for (cb = nic->cbs, i = 0; i < count; cb++, i++) {
 		cb->next = (i + 1 < count) ? cb + 1 : nic->cbs;
@@ -1825,7 +1826,6 @@
 		cb->dma_addr = nic->cbs_dma_addr + i * sizeof(struct cb);
 		cb->link = cpu_to_le32(nic->cbs_dma_addr +
 			((i+1) % count) * sizeof(struct cb));
-		cb->skb = NULL;
 	}
 
 	nic->cb_to_use = nic->cb_to_send = nic->cb_to_clean = nic->cbs;
--- linux-mvl-dove-2.6.32.orig/drivers/net/via-rhine.c
+++ linux-mvl-dove-2.6.32/drivers/net/via-rhine.c
@@ -102,6 +102,7 @@
 #include <linux/ethtool.h>
 #include <linux/crc32.h>
 #include <linux/bitops.h>
+#include <linux/workqueue.h>
 #include <asm/processor.h>	/* Processor type for cache alignment. */
 #include <asm/io.h>
 #include <asm/irq.h>
@@ -389,6 +390,7 @@
 	struct net_device *dev;
 	struct napi_struct napi;
 	spinlock_t lock;
+	struct work_struct reset_task;
 
 	/* Frequently used values: keep some adjacent for cache effect. */
 	u32 quirks;
@@ -407,6 +409,7 @@
 static int  mdio_read(struct net_device *dev, int phy_id, int location);
 static void mdio_write(struct net_device *dev, int phy_id, int location, int value);
 static int  rhine_open(struct net_device *dev);
+static void rhine_reset_task(struct work_struct *work);
 static void rhine_tx_timeout(struct net_device *dev);
 static netdev_tx_t rhine_start_tx(struct sk_buff *skb,
 				  struct net_device *dev);
@@ -775,6 +778,8 @@
 	dev->irq = pdev->irq;
 
 	spin_lock_init(&rp->lock);
+	INIT_WORK(&rp->reset_task, rhine_reset_task);
+
 	rp->mii_if.dev = dev;
 	rp->mii_if.mdio_read = mdio_read;
 	rp->mii_if.mdio_write = mdio_write;
@@ -1179,22 +1184,18 @@
 	return 0;
 }
 
-static void rhine_tx_timeout(struct net_device *dev)
+static void rhine_reset_task(struct work_struct *work)
 {
-	struct rhine_private *rp = netdev_priv(dev);
-	void __iomem *ioaddr = rp->base;
-
-	printk(KERN_WARNING "%s: Transmit timed out, status %4.4x, PHY status "
-	       "%4.4x, resetting...\n",
-	       dev->name, ioread16(ioaddr + IntrStatus),
-	       mdio_read(dev, rp->mii_if.phy_id, MII_BMSR));
+	struct rhine_private *rp = container_of(work, struct rhine_private,
+						reset_task);
+	struct net_device *dev = rp->dev;
 
 	/* protect against concurrent rx interrupts */
 	disable_irq(rp->pdev->irq);
 
 	napi_disable(&rp->napi);
 
-	spin_lock(&rp->lock);
+	spin_lock_bh(&rp->lock);
 
 	/* clear all descriptors */
 	free_tbufs(dev);
@@ -1206,7 +1207,7 @@
 	rhine_chip_reset(dev);
 	init_registers(dev);
 
-	spin_unlock(&rp->lock);
+	spin_unlock_bh(&rp->lock);
 	enable_irq(rp->pdev->irq);
 
 	dev->trans_start = jiffies;
@@ -1214,6 +1215,19 @@
 	netif_wake_queue(dev);
 }
 
+static void rhine_tx_timeout(struct net_device *dev)
+{
+	struct rhine_private *rp = netdev_priv(dev);
+	void __iomem *ioaddr = rp->base;
+
+	printk(KERN_WARNING "%s: Transmit timed out, status %4.4x, PHY status "
+	       "%4.4x, resetting...\n",
+	       dev->name, ioread16(ioaddr + IntrStatus),
+	       mdio_read(dev, rp->mii_if.phy_id, MII_BMSR));
+
+	schedule_work(&rp->reset_task);
+}
+
 static netdev_tx_t rhine_start_tx(struct sk_buff *skb,
 				  struct net_device *dev)
 {
@@ -1830,10 +1844,11 @@
 	struct rhine_private *rp = netdev_priv(dev);
 	void __iomem *ioaddr = rp->base;
 
-	spin_lock_irq(&rp->lock);
-
-	netif_stop_queue(dev);
 	napi_disable(&rp->napi);
+	cancel_work_sync(&rp->reset_task);
+	netif_stop_queue(dev);
+
+	spin_lock_irq(&rp->lock);
 
 	if (debug > 1)
 		printk(KERN_DEBUG "%s: Shutting down ethercard, "
--- linux-mvl-dove-2.6.32.orig/drivers/net/b44.c
+++ linux-mvl-dove-2.6.32/drivers/net/b44.c
@@ -1505,8 +1505,7 @@
 		for (k = 0; k< ethaddr_bytes; k++) {
 			ppattern[offset + magicsync +
 				(j * ETH_ALEN) + k] = macaddr[k];
-			len++;
-			set_bit(len, (unsigned long *) pmask);
+			set_bit(len++, (unsigned long *) pmask);
 		}
 	}
 	return len - 1;
@@ -2176,8 +2175,6 @@
 	dev->irq = sdev->irq;
 	SET_ETHTOOL_OPS(dev, &b44_ethtool_ops);
 
-	netif_carrier_off(dev);
-
 	err = ssb_bus_powerup(sdev->bus, 0);
 	if (err) {
 		dev_err(sdev->dev,
@@ -2217,6 +2214,8 @@
 		goto err_out_powerdown;
 	}
 
+	netif_carrier_off(dev);
+
 	ssb_set_drvdata(sdev, dev);
 
 	/* Chip reset provides power to the b44 MAC & PCI cores, which
--- linux-mvl-dove-2.6.32.orig/drivers/net/xen-netfront.c
+++ linux-mvl-dove-2.6.32/drivers/net/xen-netfront.c
@@ -1619,6 +1619,7 @@
 		if (xennet_connect(netdev) != 0)
 			break;
 		xenbus_switch_state(dev, XenbusStateConnected);
+		netif_notify_peers(netdev);
 		break;
 
 	case XenbusStateClosing:
--- linux-mvl-dove-2.6.32.orig/drivers/net/slip.c
+++ linux-mvl-dove-2.6.32/drivers/net/slip.c
@@ -850,7 +850,9 @@
 	/* Done.  We have linked the TTY line to a channel. */
 	rtnl_unlock();
 	tty->receive_room = 65536;	/* We don't flow control */
-	return sl->dev->base_addr;
+
+	/* TTY layer expects 0 on success */
+	return 0;
 
 err_free_bufs:
 	sl_free_bufs(sl);
--- linux-mvl-dove-2.6.32.orig/drivers/net/smc911x.h
+++ linux-mvl-dove-2.6.32/drivers/net/smc911x.h
@@ -43,15 +43,19 @@
   #define SMC_USE_32BIT		1
   #define SMC_IRQ_SENSE		IRQF_TRIGGER_LOW
 #elif defined(CONFIG_ARCH_OMAP34XX)
-  #define SMC_USE_16BIT		0
-  #define SMC_USE_32BIT		1
-  #define SMC_IRQ_SENSE		IRQF_TRIGGER_LOW
-  #define SMC_MEM_RESERVED	1
+  #define SMC_USE_16BIT         0
+  #define SMC_USE_32BIT         1
+  #define SMC_IRQ_SENSE         IRQF_TRIGGER_LOW
+  #define SMC_MEM_RESERVED      1
+#elif defined(CONFIG_MACH_REALVIEW_EB)
+  #define SMC_USE_16BIT         0
+  #define SMC_USE_32BIT         1
+  #define SMC_IRQ_SENSE         IRQF_TRIGGER_LOW
 #elif defined(CONFIG_ARCH_OMAP24XX)
-  #define SMC_USE_16BIT		0
-  #define SMC_USE_32BIT		1
-  #define SMC_IRQ_SENSE		IRQF_TRIGGER_LOW
-  #define SMC_MEM_RESERVED	1
+  #define SMC_USE_16BIT         0
+  #define SMC_USE_32BIT         1
+  #define SMC_IRQ_SENSE         IRQF_TRIGGER_LOW
+  #define SMC_MEM_RESERVED      1
 #else
 /*
  * Default configuration
--- linux-mvl-dove-2.6.32.orig/drivers/net/pppolac.c
+++ linux-mvl-dove-2.6.32/drivers/net/pppolac.c
@@ -0,0 +1,366 @@
+/* drivers/net/pppolac.c
+ *
+ * Driver for PPP on L2TP Access Concentrator / PPPoLAC Socket (RFC 2661)
+ *
+ * Copyright (C) 2009 Google, Inc.
+ * Author: Chia-chi Yeh <chiachi@android.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/* This driver handles L2TP data packets between a UDP socket and a PPP channel.
+ * To keep things simple, only one session per socket is permitted. Packets are
+ * sent via the socket, so it must keep connected to the same address. One must
+ * not set sequencing in ICCN but let LNS controll it. Currently this driver
+ * only works on IPv4 due to the lack of UDP encapsulation support in IPv6. */
+
+#include <linux/module.h>
+#include <linux/skbuff.h>
+#include <linux/file.h>
+#include <linux/net.h>
+#include <linux/udp.h>
+#include <linux/ppp_defs.h>
+#include <linux/if_ppp.h>
+#include <linux/if_pppox.h>
+#include <linux/ppp_channel.h>
+#include <net/tcp_states.h>
+
+#define L2TP_CONTROL_BIT	0x80
+#define L2TP_LENGTH_BIT		0x40
+#define L2TP_SEQUENCE_BIT	0x08
+#define L2TP_OFFSET_BIT		0x02
+#define L2TP_VERSION		0x02
+#define L2TP_VERSION_MASK	0x0F
+
+#define PPP_ADDR	0xFF
+#define PPP_CTRL	0x03
+
+union unaligned {
+	__u32 u32;
+} __attribute__((packed));
+
+static inline union unaligned *unaligned(void *ptr)
+{
+	return (union unaligned *)ptr;
+}
+
+static int pppolac_recv(struct sock *sk_udp, struct sk_buff *skb)
+{
+	struct sock *sk;
+	struct pppolac_opt *opt;
+	__u8 bits;
+	__u8 *ptr;
+
+	/* Drop the packet if it is too short. */
+	if (skb->len < sizeof(struct udphdr) + 6)
+		goto drop;
+
+	/* Put it back if it is a control packet. */
+	if (skb->data[sizeof(struct udphdr)] & L2TP_CONTROL_BIT)
+		return 1;
+
+	/* Now the packet is ours. Skip UDP header. */
+	skb_pull(skb, sizeof(struct udphdr));
+
+	/* Check the version. */
+	if ((skb->data[1] & L2TP_VERSION_MASK) != L2TP_VERSION)
+		goto drop;
+	bits = skb->data[0];
+	ptr = &skb->data[2];
+
+	/* Check the length if it is present. */
+	if (bits & L2TP_LENGTH_BIT) {
+		if ((ptr[0] << 8 | ptr[1]) != skb->len)
+			goto drop;
+		ptr += 2;
+	}
+
+	/* Skip all fields including optional ones. */
+	if (!skb_pull(skb, 6 + (bits & L2TP_SEQUENCE_BIT ? 4 : 0) +
+			(bits & L2TP_LENGTH_BIT ? 2 : 0) +
+			(bits & L2TP_OFFSET_BIT ? 2 : 0)))
+		goto drop;
+
+	/* Skip the offset padding if it is present. */
+	if (bits & L2TP_OFFSET_BIT &&
+			!skb_pull(skb, skb->data[-2] << 8 | skb->data[-1]))
+		goto drop;
+
+	/* Now ptr is pointing to the tunnel and skb is pointing to the payload.
+	 * We have to lock sk_udp to prevent sk from being closed. */
+	lock_sock(sk_udp);
+	sk = sk_udp->sk_user_data;
+	if (!sk) {
+		release_sock(sk_udp);
+		goto drop;
+	}
+	sock_hold(sk);
+	release_sock(sk_udp);
+	opt = &pppox_sk(sk)->proto.lac;
+
+	/* Check the tunnel and the session. */
+	if (unaligned(ptr)->u32 != opt->local) {
+		sock_put(sk);
+		goto drop;
+	}
+
+	/* Check the sequence if it is present. According to RFC 2661 page 10
+	 * and 43, the only thing to do is updating opt->sequencing. */
+	opt->sequencing = bits & L2TP_SEQUENCE_BIT;
+
+	/* Skip PPP address and control if they are present. */
+	if (skb->len >= 2 && skb->data[0] == PPP_ADDR &&
+			skb->data[1] == PPP_CTRL)
+		skb_pull(skb, 2);
+
+	/* Fix PPP protocol if it is compressed. */
+	if (skb->len >= 1 && skb->data[0] & 1)
+		skb_push(skb, 1)[0] = 0;
+
+	/* Finally, deliver the packet to PPP channel. We have to lock sk to
+	 * prevent another thread from calling pppox_unbind_sock(). */
+	skb_orphan(skb);
+	lock_sock(sk);
+	ppp_input(&pppox_sk(sk)->chan, skb);
+	release_sock(sk);
+	sock_put(sk);
+	return 0;
+
+drop:
+	kfree_skb(skb);
+	return 0;
+}
+
+static int pppolac_xmit(struct ppp_channel *chan, struct sk_buff *skb)
+{
+	struct sock *sk_udp = (struct sock *)chan->private;
+	struct pppolac_opt *opt = &pppox_sk(sk_udp->sk_user_data)->proto.lac;
+	struct msghdr msg = {.msg_flags = MSG_NOSIGNAL | MSG_DONTWAIT};
+	struct kvec iov;
+
+	/* Install PPP address and control. */
+	skb_push(skb, 2);
+	skb->data[0] = PPP_ADDR;
+	skb->data[1] = PPP_CTRL;
+
+	/* Install L2TP header. */
+	if (opt->sequencing) {
+		skb_push(skb, 10);
+		skb->data[0] = L2TP_SEQUENCE_BIT;
+		skb->data[6] = opt->sequence >> 8;
+		skb->data[7] = opt->sequence;
+		skb->data[8] = 0;
+		skb->data[9] = 0;
+		opt->sequence++;
+	} else {
+		skb_push(skb, 6);
+		skb->data[0] = 0;
+	}
+	skb->data[1] = L2TP_VERSION;
+	unaligned(&skb->data[2])->u32 = opt->remote;
+
+	/* Now send the packet via UDP socket. */
+	iov.iov_base = skb->data;
+	iov.iov_len = skb->len;
+	kernel_sendmsg(sk_udp->sk_socket, &msg, &iov, 1, skb->len);
+	kfree_skb(skb);
+	return 1;
+}
+
+/******************************************************************************/
+
+static struct ppp_channel_ops pppolac_channel_ops = {
+	.start_xmit = pppolac_xmit,
+};
+
+static int pppolac_connect(struct socket *sock, struct sockaddr *useraddr,
+	int addrlen, int flags)
+{
+	struct sock *sk = sock->sk;
+	struct pppox_sock *po = pppox_sk(sk);
+	struct sockaddr_pppolac *addr = (struct sockaddr_pppolac *)useraddr;
+	struct socket *sock_udp = NULL;
+	struct sock *sk_udp;
+	int error;
+
+	if (addrlen != sizeof(struct sockaddr_pppolac) ||
+			!addr->local.tunnel || !addr->local.session ||
+			!addr->remote.tunnel || !addr->remote.session) {
+		return -EINVAL;
+	}
+
+	lock_sock(sk);
+	error = -EALREADY;
+	if (sk->sk_state != PPPOX_NONE)
+		goto out;
+
+	sock_udp = sockfd_lookup(addr->udp_socket, &error);
+	if (!sock_udp)
+		goto out;
+	sk_udp = sock_udp->sk;
+	lock_sock(sk_udp);
+
+	/* Remove this check when IPv6 supports UDP encapsulation. */
+	error = -EAFNOSUPPORT;
+	if (sk_udp->sk_family != AF_INET)
+		goto out;
+	error = -EPROTONOSUPPORT;
+	if (sk_udp->sk_protocol != IPPROTO_UDP)
+		goto out;
+	error = -EDESTADDRREQ;
+	if (sk_udp->sk_state != TCP_ESTABLISHED)
+		goto out;
+	error = -EBUSY;
+	if (udp_sk(sk_udp)->encap_type || sk_udp->sk_user_data)
+		goto out;
+	if (!sk_udp->sk_bound_dev_if) {
+		struct dst_entry *dst = sk_dst_get(sk_udp);
+		error = -ENODEV;
+		if (!dst)
+			goto out;
+		sk_udp->sk_bound_dev_if = dst->dev->ifindex;
+		dst_release(dst);
+	}
+
+	po->chan.hdrlen = 12;
+	po->chan.private = sk_udp;
+	po->chan.ops = &pppolac_channel_ops;
+	po->chan.mtu = PPP_MTU - 80;
+	po->proto.lac.local = unaligned(&addr->local)->u32;
+	po->proto.lac.remote = unaligned(&addr->remote)->u32;
+
+	error = ppp_register_channel(&po->chan);
+	if (error)
+		goto out;
+
+	sk->sk_state = PPPOX_CONNECTED;
+	udp_sk(sk_udp)->encap_type = UDP_ENCAP_L2TPINUDP;
+	udp_sk(sk_udp)->encap_rcv = pppolac_recv;
+	sk_udp->sk_user_data = sk;
+
+out:
+	if (sock_udp) {
+		release_sock(sk_udp);
+		if (error)
+			sockfd_put(sock_udp);
+	}
+	release_sock(sk);
+	return error;
+}
+
+static int pppolac_release(struct socket *sock)
+{
+	struct sock *sk = sock->sk;
+
+	if (!sk)
+		return 0;
+
+	lock_sock(sk);
+	if (sock_flag(sk, SOCK_DEAD)) {
+		release_sock(sk);
+		return -EBADF;
+	}
+
+	if (sk->sk_state != PPPOX_NONE) {
+		struct sock *sk_udp = (struct sock *)pppox_sk(sk)->chan.private;
+		pppox_unbind_sock(sk);
+
+		lock_sock(sk_udp);
+		sk_udp->sk_user_data = NULL;
+		udp_sk(sk_udp)->encap_type = 0;
+		udp_sk(sk_udp)->encap_rcv = NULL;
+		release_sock(sk_udp);
+		sockfd_put(sk_udp->sk_socket);
+	}
+
+	sock_orphan(sk);
+	sock->sk = NULL;
+	release_sock(sk);
+	sock_put(sk);
+	return 0;
+}
+
+/******************************************************************************/
+
+static struct proto pppolac_proto = {
+	.name = "PPPOLAC",
+	.owner = THIS_MODULE,
+	.obj_size = sizeof(struct pppox_sock),
+};
+
+static struct proto_ops pppolac_proto_ops = {
+	.family = PF_PPPOX,
+	.owner = THIS_MODULE,
+	.release = pppolac_release,
+	.bind = sock_no_bind,
+	.connect = pppolac_connect,
+	.socketpair = sock_no_socketpair,
+	.accept = sock_no_accept,
+	.getname = sock_no_getname,
+	.poll = sock_no_poll,
+	.ioctl = pppox_ioctl,
+	.listen = sock_no_listen,
+	.shutdown = sock_no_shutdown,
+	.setsockopt = sock_no_setsockopt,
+	.getsockopt = sock_no_getsockopt,
+	.sendmsg = sock_no_sendmsg,
+	.recvmsg = sock_no_recvmsg,
+	.mmap = sock_no_mmap,
+};
+
+static int pppolac_create(struct net *net, struct socket *sock)
+{
+	struct sock *sk;
+
+	sk = sk_alloc(net, PF_PPPOX, GFP_KERNEL, &pppolac_proto);
+	if (!sk)
+		return -ENOMEM;
+
+	sock_init_data(sock, sk);
+	sock->state = SS_UNCONNECTED;
+	sock->ops = &pppolac_proto_ops;
+	sk->sk_protocol = PX_PROTO_OLAC;
+	sk->sk_state = PPPOX_NONE;
+	return 0;
+}
+
+/******************************************************************************/
+
+static struct pppox_proto pppolac_pppox_proto = {
+	.create = pppolac_create,
+	.owner = THIS_MODULE,
+};
+
+static int __init pppolac_init(void)
+{
+	int error;
+
+	error = proto_register(&pppolac_proto, 0);
+	if (error)
+		return error;
+
+	error = register_pppox_proto(PX_PROTO_OLAC, &pppolac_pppox_proto);
+	if (error)
+		proto_unregister(&pppolac_proto);
+	return error;
+}
+
+static void __exit pppolac_exit(void)
+{
+	unregister_pppox_proto(PX_PROTO_OLAC);
+	proto_unregister(&pppolac_proto);
+}
+
+module_init(pppolac_init);
+module_exit(pppolac_exit);
+
+MODULE_DESCRIPTION("PPP on L2TP Access Concentrator (PPPoLAC)");
+MODULE_AUTHOR("Chia-chi Yeh <chiachi@android.com>");
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/drivers/net/bonding/bond_main.c
+++ linux-mvl-dove-2.6.32/drivers/net/bonding/bond_main.c
@@ -2692,6 +2692,10 @@
 	if (!slave || !slave_do_arp_validate(bond, slave))
 		goto out_unlock;
 
+	skb = skb_share_check(skb, GFP_ATOMIC);
+	if (!skb)
+		goto out_unlock;
+
 	if (!pskb_may_pull(skb, arp_hdr_len(dev)))
 		goto out_unlock;
 
--- linux-mvl-dove-2.6.32.orig/drivers/net/bonding/bond_ipv6.c
+++ linux-mvl-dove-2.6.32/drivers/net/bonding/bond_ipv6.c
@@ -66,6 +66,13 @@
 	};
 	struct sk_buff *skb;
 
+	/* The Ethernet header is built in ndisc_send_skb(), not
+	 * ndisc_build_skb(), so we cannot insert a VLAN tag.  Only an
+	 * out-of-line tag inserted by the hardware will work.
+	 */
+	if (vlan_id && !(slave_dev->features & NETIF_F_HW_VLAN_TX))
+		return;
+
 	icmp6h.icmp6_router = router;
 	icmp6h.icmp6_solicited = 0;
 	icmp6h.icmp6_override = 1;
@@ -84,7 +91,7 @@
 	}
 
 	if (vlan_id) {
-		skb = vlan_put_tag(skb, vlan_id);
+		skb = __vlan_hwaccel_put_tag(skb, vlan_id);
 		if (!skb) {
 			pr_err(DRV_NAME ": failed to insert VLAN tag\n");
 			return;
--- linux-mvl-dove-2.6.32.orig/drivers/net/bonding/bond_alb.c
+++ linux-mvl-dove-2.6.32/drivers/net/bonding/bond_alb.c
@@ -370,6 +370,13 @@
 		goto out;
 	}
 
+	skb = skb_share_check(skb, GFP_ATOMIC);
+	if (!skb)
+		goto out;
+
+	if (!pskb_may_pull(skb, arp_hdr_len(bond_dev)))
+		goto out;
+
 	if (skb->len < sizeof(struct arp_pkt)) {
 		pr_debug("Packet is too small to be an ARP\n");
 		goto out;
--- linux-mvl-dove-2.6.32.orig/drivers/net/bonding/bond_3ad.c
+++ linux-mvl-dove-2.6.32/drivers/net/bonding/bond_3ad.c
@@ -2451,6 +2451,13 @@
 	if (!(dev->flags & IFF_MASTER))
 		goto out;
 
+	skb = skb_share_check(skb, GFP_ATOMIC);
+	if (!skb)
+		goto out;
+
+	if (!pskb_may_pull(skb, sizeof(struct lacpdu)))
+		goto out;
+
 	read_lock(&bond->lock);
 	slave = bond_get_slave_by_dev((struct bonding *)netdev_priv(dev),
 					orig_dev);
--- linux-mvl-dove-2.6.32.orig/drivers/net/sfc/mcdi_phy.c
+++ linux-mvl-dove-2.6.32/drivers/net/sfc/mcdi_phy.c
@@ -0,0 +1,574 @@
+/****************************************************************************
+ * Driver for Solarflare Solarstorm network controllers and boards
+ * Copyright 2009 Solarflare Communications Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation, incorporated herein by reference.
+ */
+
+/*
+ * Driver for PHY related operations via MCDI.
+ */
+
+#include "efx.h"
+#include "phy.h"
+#include "mcdi.h"
+#include "mcdi_pcol.h"
+#include "mdio_10g.h"
+
+struct efx_mcdi_phy_cfg {
+	u32 flags;
+	u32 type;
+	u32 supported_cap;
+	u32 channel;
+	u32 port;
+	u32 stats_mask;
+	u8 name[20];
+	u32 media;
+	u32 mmd_mask;
+	u8 revision[20];
+	u32 forced_cap;
+};
+
+static int
+efx_mcdi_get_phy_cfg(struct efx_nic *efx, struct efx_mcdi_phy_cfg *cfg)
+{
+	u8 outbuf[MC_CMD_GET_PHY_CFG_OUT_LEN];
+	size_t outlen;
+	int rc;
+
+	BUILD_BUG_ON(MC_CMD_GET_PHY_CFG_IN_LEN != 0);
+	BUILD_BUG_ON(MC_CMD_GET_PHY_CFG_OUT_NAME_LEN != sizeof(cfg->name));
+
+	rc = efx_mcdi_rpc(efx, MC_CMD_GET_PHY_CFG, NULL, 0,
+			  outbuf, sizeof(outbuf), &outlen);
+	if (rc)
+		goto fail;
+
+	if (outlen < MC_CMD_GET_PHY_CFG_OUT_LEN) {
+		rc = -EMSGSIZE;
+		goto fail;
+	}
+
+	cfg->flags = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_FLAGS);
+	cfg->type = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_TYPE);
+	cfg->supported_cap =
+		MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_SUPPORTED_CAP);
+	cfg->channel = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_CHANNEL);
+	cfg->port = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_PRT);
+	cfg->stats_mask = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_STATS_MASK);
+	memcpy(cfg->name, MCDI_PTR(outbuf, GET_PHY_CFG_OUT_NAME),
+	       sizeof(cfg->name));
+	cfg->media = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_MEDIA_TYPE);
+	cfg->mmd_mask = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_MMD_MASK);
+	memcpy(cfg->revision, MCDI_PTR(outbuf, GET_PHY_CFG_OUT_REVISION),
+	       sizeof(cfg->revision));
+
+	return 0;
+
+fail:
+	EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
+	return rc;
+}
+
+static int efx_mcdi_set_link(struct efx_nic *efx, u32 capabilities,
+			     u32 flags, u32 loopback_mode,
+			     u32 loopback_speed)
+{
+	u8 inbuf[MC_CMD_SET_LINK_IN_LEN];
+	int rc;
+
+	BUILD_BUG_ON(MC_CMD_SET_LINK_OUT_LEN != 0);
+
+	MCDI_SET_DWORD(inbuf, SET_LINK_IN_CAP, capabilities);
+	MCDI_SET_DWORD(inbuf, SET_LINK_IN_FLAGS, flags);
+	MCDI_SET_DWORD(inbuf, SET_LINK_IN_LOOPBACK_MODE, loopback_mode);
+	MCDI_SET_DWORD(inbuf, SET_LINK_IN_LOOPBACK_SPEED, loopback_speed);
+
+	rc = efx_mcdi_rpc(efx, MC_CMD_SET_LINK, inbuf, sizeof(inbuf),
+			  NULL, 0, NULL);
+	if (rc)
+		goto fail;
+
+	return 0;
+
+fail:
+	EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
+	return rc;
+}
+
+static int efx_mcdi_loopback_modes(struct efx_nic *efx, u64 *loopback_modes)
+{
+	u8 outbuf[MC_CMD_GET_LOOPBACK_MODES_OUT_LEN];
+	size_t outlen;
+	int rc;
+
+	rc = efx_mcdi_rpc(efx, MC_CMD_GET_LOOPBACK_MODES, NULL, 0,
+			  outbuf, sizeof(outbuf), &outlen);
+	if (rc)
+		goto fail;
+
+	if (outlen < MC_CMD_GET_LOOPBACK_MODES_OUT_LEN) {
+		rc = -EMSGSIZE;
+		goto fail;
+	}
+
+	*loopback_modes = MCDI_QWORD(outbuf, GET_LOOPBACK_MODES_SUGGESTED);
+
+	return 0;
+
+fail:
+	EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
+	return rc;
+}
+
+int efx_mcdi_mdio_read(struct efx_nic *efx, unsigned int bus,
+			 unsigned int prtad, unsigned int devad, u16 addr,
+			 u16 *value_out, u32 *status_out)
+{
+	u8 inbuf[MC_CMD_MDIO_READ_IN_LEN];
+	u8 outbuf[MC_CMD_MDIO_READ_OUT_LEN];
+	size_t outlen;
+	int rc;
+
+	MCDI_SET_DWORD(inbuf, MDIO_READ_IN_BUS, bus);
+	MCDI_SET_DWORD(inbuf, MDIO_READ_IN_PRTAD, prtad);
+	MCDI_SET_DWORD(inbuf, MDIO_READ_IN_DEVAD, devad);
+	MCDI_SET_DWORD(inbuf, MDIO_READ_IN_ADDR, addr);
+
+	rc = efx_mcdi_rpc(efx, MC_CMD_MDIO_READ, inbuf, sizeof(inbuf),
+			  outbuf, sizeof(outbuf), &outlen);
+	if (rc)
+		goto fail;
+
+	*value_out = (u16)MCDI_DWORD(outbuf, MDIO_READ_OUT_VALUE);
+	*status_out = MCDI_DWORD(outbuf, MDIO_READ_OUT_STATUS);
+	return 0;
+
+fail:
+	EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
+	return rc;
+}
+
+int efx_mcdi_mdio_write(struct efx_nic *efx, unsigned int bus,
+			  unsigned int prtad, unsigned int devad, u16 addr,
+			  u16 value, u32 *status_out)
+{
+	u8 inbuf[MC_CMD_MDIO_WRITE_IN_LEN];
+	u8 outbuf[MC_CMD_MDIO_WRITE_OUT_LEN];
+	size_t outlen;
+	int rc;
+
+	MCDI_SET_DWORD(inbuf, MDIO_WRITE_IN_BUS, bus);
+	MCDI_SET_DWORD(inbuf, MDIO_WRITE_IN_PRTAD, prtad);
+	MCDI_SET_DWORD(inbuf, MDIO_WRITE_IN_DEVAD, devad);
+	MCDI_SET_DWORD(inbuf, MDIO_WRITE_IN_ADDR, addr);
+	MCDI_SET_DWORD(inbuf, MDIO_WRITE_IN_VALUE, value);
+
+	rc = efx_mcdi_rpc(efx, MC_CMD_MDIO_WRITE, inbuf, sizeof(inbuf),
+			  outbuf, sizeof(outbuf), &outlen);
+	if (rc)
+		goto fail;
+
+	*status_out = MCDI_DWORD(outbuf, MDIO_WRITE_OUT_STATUS);
+	return 0;
+
+fail:
+	EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
+	return rc;
+}
+
+static u32 mcdi_to_ethtool_cap(u32 media, u32 cap)
+{
+	u32 result = 0;
+
+	switch (media) {
+	case MC_CMD_MEDIA_KX4:
+		result |= SUPPORTED_Backplane;
+		if (cap & (1 << MC_CMD_PHY_CAP_1000FDX_LBN))
+			result |= SUPPORTED_1000baseKX_Full;
+		if (cap & (1 << MC_CMD_PHY_CAP_10000FDX_LBN))
+			result |= SUPPORTED_10000baseKX4_Full;
+		break;
+
+	case MC_CMD_MEDIA_XFP:
+	case MC_CMD_MEDIA_SFP_PLUS:
+		result |= SUPPORTED_FIBRE;
+		break;
+
+	case MC_CMD_MEDIA_BASE_T:
+		result |= SUPPORTED_TP;
+		if (cap & (1 << MC_CMD_PHY_CAP_10HDX_LBN))
+			result |= SUPPORTED_10baseT_Half;
+		if (cap & (1 << MC_CMD_PHY_CAP_10FDX_LBN))
+			result |= SUPPORTED_10baseT_Full;
+		if (cap & (1 << MC_CMD_PHY_CAP_100HDX_LBN))
+			result |= SUPPORTED_100baseT_Half;
+		if (cap & (1 << MC_CMD_PHY_CAP_100FDX_LBN))
+			result |= SUPPORTED_100baseT_Full;
+		if (cap & (1 << MC_CMD_PHY_CAP_1000HDX_LBN))
+			result |= SUPPORTED_1000baseT_Half;
+		if (cap & (1 << MC_CMD_PHY_CAP_1000FDX_LBN))
+			result |= SUPPORTED_1000baseT_Full;
+		if (cap & (1 << MC_CMD_PHY_CAP_10000FDX_LBN))
+			result |= SUPPORTED_10000baseT_Full;
+		break;
+	}
+
+	if (cap & (1 << MC_CMD_PHY_CAP_PAUSE_LBN))
+		result |= SUPPORTED_Pause;
+	if (cap & (1 << MC_CMD_PHY_CAP_ASYM_LBN))
+		result |= SUPPORTED_Asym_Pause;
+	if (cap & (1 << MC_CMD_PHY_CAP_AN_LBN))
+		result |= SUPPORTED_Autoneg;
+
+	return result;
+}
+
+static u32 ethtool_to_mcdi_cap(u32 cap)
+{
+	u32 result = 0;
+
+	if (cap & SUPPORTED_10baseT_Half)
+		result |= (1 << MC_CMD_PHY_CAP_10HDX_LBN);
+	if (cap & SUPPORTED_10baseT_Full)
+		result |= (1 << MC_CMD_PHY_CAP_10FDX_LBN);
+	if (cap & SUPPORTED_100baseT_Half)
+		result |= (1 << MC_CMD_PHY_CAP_100HDX_LBN);
+	if (cap & SUPPORTED_100baseT_Full)
+		result |= (1 << MC_CMD_PHY_CAP_100FDX_LBN);
+	if (cap & SUPPORTED_1000baseT_Half)
+		result |= (1 << MC_CMD_PHY_CAP_1000HDX_LBN);
+	if (cap & (SUPPORTED_1000baseT_Full | SUPPORTED_1000baseKX_Full))
+		result |= (1 << MC_CMD_PHY_CAP_1000FDX_LBN);
+	if (cap & (SUPPORTED_10000baseT_Full | SUPPORTED_10000baseKX4_Full))
+		result |= (1 << MC_CMD_PHY_CAP_10000FDX_LBN);
+	if (cap & SUPPORTED_Pause)
+		result |= (1 << MC_CMD_PHY_CAP_PAUSE_LBN);
+	if (cap & SUPPORTED_Asym_Pause)
+		result |= (1 << MC_CMD_PHY_CAP_ASYM_LBN);
+	if (cap & SUPPORTED_Autoneg)
+		result |= (1 << MC_CMD_PHY_CAP_AN_LBN);
+
+	return result;
+}
+
+static u32 efx_get_mcdi_phy_flags(struct efx_nic *efx)
+{
+	struct efx_mcdi_phy_cfg *phy_cfg = efx->phy_data;
+	enum efx_phy_mode mode, supported;
+	u32 flags;
+
+	/* TODO: Advertise the capabilities supported by this PHY */
+	supported = 0;
+	if (phy_cfg->flags & (1 << MC_CMD_GET_PHY_CFG_TXDIS_LBN))
+		supported |= PHY_MODE_TX_DISABLED;
+	if (phy_cfg->flags & (1 << MC_CMD_GET_PHY_CFG_LOWPOWER_LBN))
+		supported |= PHY_MODE_LOW_POWER;
+	if (phy_cfg->flags & (1 << MC_CMD_GET_PHY_CFG_POWEROFF_LBN))
+		supported |= PHY_MODE_OFF;
+
+	mode = efx->phy_mode & supported;
+
+	flags = 0;
+	if (mode & PHY_MODE_TX_DISABLED)
+		flags |= (1 << MC_CMD_SET_LINK_TXDIS_LBN);
+	if (mode & PHY_MODE_LOW_POWER)
+		flags |= (1 << MC_CMD_SET_LINK_LOWPOWER_LBN);
+	if (mode & PHY_MODE_OFF)
+		flags |= (1 << MC_CMD_SET_LINK_POWEROFF_LBN);
+
+	return flags;
+}
+
+static u32 mcdi_to_ethtool_media(u32 media)
+{
+	switch (media) {
+	case MC_CMD_MEDIA_XAUI:
+	case MC_CMD_MEDIA_CX4:
+	case MC_CMD_MEDIA_KX4:
+		return PORT_OTHER;
+
+	case MC_CMD_MEDIA_XFP:
+	case MC_CMD_MEDIA_SFP_PLUS:
+		return PORT_FIBRE;
+
+	case MC_CMD_MEDIA_BASE_T:
+		return PORT_TP;
+
+	default:
+		return PORT_OTHER;
+	}
+}
+
+static int efx_mcdi_phy_probe(struct efx_nic *efx)
+{
+	struct efx_mcdi_phy_cfg *phy_data;
+	u8 outbuf[MC_CMD_GET_LINK_OUT_LEN];
+	u32 caps;
+	int rc;
+
+	/* Initialise and populate phy_data */
+	phy_data = kzalloc(sizeof(*phy_data), GFP_KERNEL);
+	if (phy_data == NULL)
+		return -ENOMEM;
+
+	rc = efx_mcdi_get_phy_cfg(efx, phy_data);
+	if (rc != 0)
+		goto fail;
+
+	/* Read initial link advertisement */
+	BUILD_BUG_ON(MC_CMD_GET_LINK_IN_LEN != 0);
+	rc = efx_mcdi_rpc(efx, MC_CMD_GET_LINK, NULL, 0,
+			  outbuf, sizeof(outbuf), NULL);
+	if (rc)
+		goto fail;
+
+	/* Fill out nic state */
+	efx->phy_data = phy_data;
+	efx->phy_type = phy_data->type;
+
+	efx->mdio_bus = phy_data->channel;
+	efx->mdio.prtad = phy_data->port;
+	efx->mdio.mmds = phy_data->mmd_mask & ~(1 << MC_CMD_MMD_CLAUSE22);
+	efx->mdio.mode_support = 0;
+	if (phy_data->mmd_mask & (1 << MC_CMD_MMD_CLAUSE22))
+		efx->mdio.mode_support |= MDIO_SUPPORTS_C22;
+	if (phy_data->mmd_mask & ~(1 << MC_CMD_MMD_CLAUSE22))
+		efx->mdio.mode_support |= MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
+
+	caps = MCDI_DWORD(outbuf, GET_LINK_OUT_CAP);
+	if (caps & (1 << MC_CMD_PHY_CAP_AN_LBN))
+		efx->link_advertising =
+			mcdi_to_ethtool_cap(phy_data->media, caps);
+	else
+		phy_data->forced_cap = caps;
+
+	/* Assert that we can map efx -> mcdi loopback modes */
+	BUILD_BUG_ON(LOOPBACK_NONE != MC_CMD_LOOPBACK_NONE);
+	BUILD_BUG_ON(LOOPBACK_DATA != MC_CMD_LOOPBACK_DATA);
+	BUILD_BUG_ON(LOOPBACK_GMAC != MC_CMD_LOOPBACK_GMAC);
+	BUILD_BUG_ON(LOOPBACK_XGMII != MC_CMD_LOOPBACK_XGMII);
+	BUILD_BUG_ON(LOOPBACK_XGXS != MC_CMD_LOOPBACK_XGXS);
+	BUILD_BUG_ON(LOOPBACK_XAUI != MC_CMD_LOOPBACK_XAUI);
+	BUILD_BUG_ON(LOOPBACK_GMII != MC_CMD_LOOPBACK_GMII);
+	BUILD_BUG_ON(LOOPBACK_SGMII != MC_CMD_LOOPBACK_SGMII);
+	BUILD_BUG_ON(LOOPBACK_XGBR != MC_CMD_LOOPBACK_XGBR);
+	BUILD_BUG_ON(LOOPBACK_XFI != MC_CMD_LOOPBACK_XFI);
+	BUILD_BUG_ON(LOOPBACK_XAUI_FAR != MC_CMD_LOOPBACK_XAUI_FAR);
+	BUILD_BUG_ON(LOOPBACK_GMII_FAR != MC_CMD_LOOPBACK_GMII_FAR);
+	BUILD_BUG_ON(LOOPBACK_SGMII_FAR != MC_CMD_LOOPBACK_SGMII_FAR);
+	BUILD_BUG_ON(LOOPBACK_XFI_FAR != MC_CMD_LOOPBACK_XFI_FAR);
+	BUILD_BUG_ON(LOOPBACK_GPHY != MC_CMD_LOOPBACK_GPHY);
+	BUILD_BUG_ON(LOOPBACK_PHYXS != MC_CMD_LOOPBACK_PHYXS);
+	BUILD_BUG_ON(LOOPBACK_PCS != MC_CMD_LOOPBACK_PCS);
+	BUILD_BUG_ON(LOOPBACK_PMAPMD != MC_CMD_LOOPBACK_PMAPMD);
+	BUILD_BUG_ON(LOOPBACK_XPORT != MC_CMD_LOOPBACK_XPORT);
+	BUILD_BUG_ON(LOOPBACK_XGMII_WS != MC_CMD_LOOPBACK_XGMII_WS);
+	BUILD_BUG_ON(LOOPBACK_XAUI_WS != MC_CMD_LOOPBACK_XAUI_WS);
+	BUILD_BUG_ON(LOOPBACK_XAUI_WS_FAR != MC_CMD_LOOPBACK_XAUI_WS_FAR);
+	BUILD_BUG_ON(LOOPBACK_XAUI_WS_NEAR != MC_CMD_LOOPBACK_XAUI_WS_NEAR);
+	BUILD_BUG_ON(LOOPBACK_GMII_WS != MC_CMD_LOOPBACK_GMII_WS);
+	BUILD_BUG_ON(LOOPBACK_XFI_WS != MC_CMD_LOOPBACK_XFI_WS);
+	BUILD_BUG_ON(LOOPBACK_XFI_WS_FAR != MC_CMD_LOOPBACK_XFI_WS_FAR);
+	BUILD_BUG_ON(LOOPBACK_PHYXS_WS != MC_CMD_LOOPBACK_PHYXS_WS);
+
+	rc = efx_mcdi_loopback_modes(efx, &efx->loopback_modes);
+	if (rc != 0)
+		goto fail;
+	/* The MC indicates that LOOPBACK_NONE is a valid loopback mode,
+	 * but by convention we don't */
+	efx->loopback_modes &= ~(1 << LOOPBACK_NONE);
+
+	return 0;
+
+fail:
+	kfree(phy_data);
+	return rc;
+}
+
+int efx_mcdi_phy_reconfigure(struct efx_nic *efx)
+{
+	struct efx_mcdi_phy_cfg *phy_cfg = efx->phy_data;
+	u32 caps = (efx->link_advertising ?
+		    ethtool_to_mcdi_cap(efx->link_advertising) :
+		    phy_cfg->forced_cap);
+
+	return efx_mcdi_set_link(efx, caps, efx_get_mcdi_phy_flags(efx),
+				 efx->loopback_mode, 0);
+}
+
+void efx_mcdi_phy_decode_link(struct efx_nic *efx,
+			      struct efx_link_state *link_state,
+			      u32 speed, u32 flags, u32 fcntl)
+{
+	switch (fcntl) {
+	case MC_CMD_FCNTL_AUTO:
+		WARN_ON(1);	/* This is not a link mode */
+		link_state->fc = EFX_FC_AUTO | EFX_FC_TX | EFX_FC_RX;
+		break;
+	case MC_CMD_FCNTL_BIDIR:
+		link_state->fc = EFX_FC_TX | EFX_FC_RX;
+		break;
+	case MC_CMD_FCNTL_RESPOND:
+		link_state->fc = EFX_FC_RX;
+		break;
+	default:
+		WARN_ON(1);
+	case MC_CMD_FCNTL_OFF:
+		link_state->fc = 0;
+		break;
+	}
+
+	link_state->up = !!(flags & (1 << MC_CMD_GET_LINK_LINK_UP_LBN));
+	link_state->fd = !!(flags & (1 << MC_CMD_GET_LINK_FULL_DUPLEX_LBN));
+	link_state->speed = speed;
+}
+
+/* Verify that the forced flow control settings (!EFX_FC_AUTO) are
+ * supported by the link partner. Warn the user if this isn't the case
+ */
+void efx_mcdi_phy_check_fcntl(struct efx_nic *efx, u32 lpa)
+{
+	struct efx_mcdi_phy_cfg *phy_cfg = efx->phy_data;
+	u32 rmtadv;
+
+	/* The link partner capabilities are only relevent if the
+	 * link supports flow control autonegotiation */
+	if (~phy_cfg->supported_cap & (1 << MC_CMD_PHY_CAP_ASYM_LBN))
+		return;
+
+	/* If flow control autoneg is supported and enabled, then fine */
+	if (efx->wanted_fc & EFX_FC_AUTO)
+		return;
+
+	rmtadv = 0;
+	if (lpa & (1 << MC_CMD_PHY_CAP_PAUSE_LBN))
+		rmtadv |= ADVERTISED_Pause;
+	if (lpa & (1 << MC_CMD_PHY_CAP_ASYM_LBN))
+		rmtadv |=  ADVERTISED_Asym_Pause;
+
+	if ((efx->wanted_fc & EFX_FC_TX) && rmtadv == ADVERTISED_Asym_Pause)
+		EFX_ERR(efx, "warning: link partner doesn't support "
+			"pause frames");
+}
+
+static bool efx_mcdi_phy_poll(struct efx_nic *efx)
+{
+	struct efx_link_state old_state = efx->link_state;
+	u8 outbuf[MC_CMD_GET_LINK_OUT_LEN];
+	int rc;
+
+	WARN_ON(!mutex_is_locked(&efx->mac_lock));
+
+	BUILD_BUG_ON(MC_CMD_GET_LINK_IN_LEN != 0);
+
+	rc = efx_mcdi_rpc(efx, MC_CMD_GET_LINK, NULL, 0,
+			  outbuf, sizeof(outbuf), NULL);
+	if (rc) {
+		EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
+		efx->link_state.up = false;
+	} else {
+		efx_mcdi_phy_decode_link(
+			efx, &efx->link_state,
+			MCDI_DWORD(outbuf, GET_LINK_OUT_LINK_SPEED),
+			MCDI_DWORD(outbuf, GET_LINK_OUT_FLAGS),
+			MCDI_DWORD(outbuf, GET_LINK_OUT_FCNTL));
+	}
+
+	return !efx_link_state_equal(&efx->link_state, &old_state);
+}
+
+static void efx_mcdi_phy_remove(struct efx_nic *efx)
+{
+	struct efx_mcdi_phy_data *phy_data = efx->phy_data;
+
+	efx->phy_data = NULL;
+	kfree(phy_data);
+}
+
+static void efx_mcdi_phy_get_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd)
+{
+	struct efx_mcdi_phy_cfg *phy_cfg = efx->phy_data;
+	u8 outbuf[MC_CMD_GET_LINK_OUT_LEN];
+	int rc;
+
+	ecmd->supported =
+		mcdi_to_ethtool_cap(phy_cfg->media, phy_cfg->supported_cap);
+	ecmd->advertising = efx->link_advertising;
+	ecmd->speed = efx->link_state.speed;
+	ecmd->duplex = efx->link_state.fd;
+	ecmd->port = mcdi_to_ethtool_media(phy_cfg->media);
+	ecmd->phy_address = phy_cfg->port;
+	ecmd->transceiver = XCVR_INTERNAL;
+	ecmd->autoneg = !!(efx->link_advertising & ADVERTISED_Autoneg);
+	ecmd->mdio_support = (efx->mdio.mode_support &
+			      (MDIO_SUPPORTS_C45 | MDIO_SUPPORTS_C22));
+
+	BUILD_BUG_ON(MC_CMD_GET_LINK_IN_LEN != 0);
+	rc = efx_mcdi_rpc(efx, MC_CMD_GET_LINK, NULL, 0,
+			  outbuf, sizeof(outbuf), NULL);
+	if (rc) {
+		EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
+		return;
+	}
+	ecmd->lp_advertising =
+		mcdi_to_ethtool_cap(phy_cfg->media,
+				    MCDI_DWORD(outbuf, GET_LINK_OUT_LP_CAP));
+}
+
+static int efx_mcdi_phy_set_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd)
+{
+	struct efx_mcdi_phy_cfg *phy_cfg = efx->phy_data;
+	u32 caps;
+	int rc;
+
+	if (ecmd->autoneg) {
+		caps = (ethtool_to_mcdi_cap(ecmd->advertising) |
+			 1 << MC_CMD_PHY_CAP_AN_LBN);
+	} else if (ecmd->duplex) {
+		switch (ecmd->speed) {
+		case 10:    caps = 1 << MC_CMD_PHY_CAP_10FDX_LBN;    break;
+		case 100:   caps = 1 << MC_CMD_PHY_CAP_100FDX_LBN;   break;
+		case 1000:  caps = 1 << MC_CMD_PHY_CAP_1000FDX_LBN;  break;
+		case 10000: caps = 1 << MC_CMD_PHY_CAP_10000FDX_LBN; break;
+		default:    return -EINVAL;
+		}
+	} else {
+		switch (ecmd->speed) {
+		case 10:    caps = 1 << MC_CMD_PHY_CAP_10HDX_LBN;    break;
+		case 100:   caps = 1 << MC_CMD_PHY_CAP_100HDX_LBN;   break;
+		case 1000:  caps = 1 << MC_CMD_PHY_CAP_1000HDX_LBN;  break;
+		default:    return -EINVAL;
+		}
+	}
+
+	rc = efx_mcdi_set_link(efx, caps, efx_get_mcdi_phy_flags(efx),
+			       efx->loopback_mode, 0);
+	if (rc)
+		return rc;
+
+	if (ecmd->autoneg) {
+		efx_link_set_advertising(
+			efx, ecmd->advertising | ADVERTISED_Autoneg);
+		phy_cfg->forced_cap = 0;
+	} else {
+		efx_link_set_advertising(efx, 0);
+		phy_cfg->forced_cap = caps;
+	}
+	return 0;
+}
+
+struct efx_phy_operations efx_mcdi_phy_ops = {
+	.probe		= efx_mcdi_phy_probe,
+	.init 	 	= efx_port_dummy_op_int,
+	.reconfigure	= efx_mcdi_phy_reconfigure,
+	.poll		= efx_mcdi_phy_poll,
+	.fini		= efx_port_dummy_op_void,
+	.remove		= efx_mcdi_phy_remove,
+	.get_settings	= efx_mcdi_phy_get_settings,
+	.set_settings	= efx_mcdi_phy_set_settings,
+	.run_tests	= NULL,
+	.test_name	= NULL,
+};
--- linux-mvl-dove-2.6.32.orig/drivers/net/sfc/ethtool.c
+++ linux-mvl-dove-2.6.32/drivers/net/sfc/ethtool.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * Driver for Solarflare Solarstorm network controllers and boards
  * Copyright 2005-2006 Fen Systems Ltd.
- * Copyright 2006-2008 Solarflare Communications Inc.
+ * Copyright 2006-2009 Solarflare Communications Inc.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of the GNU General Public License version 2 as published
@@ -10,30 +10,15 @@
 
 #include <linux/netdevice.h>
 #include <linux/ethtool.h>
-#include <linux/mdio.h>
 #include <linux/rtnetlink.h>
 #include "net_driver.h"
 #include "workarounds.h"
 #include "selftest.h"
 #include "efx.h"
-#include "ethtool.h"
-#include "falcon.h"
+#include "nic.h"
 #include "spi.h"
 #include "mdio_10g.h"
 
-const char *efx_loopback_mode_names[] = {
-	[LOOPBACK_NONE]		= "NONE",
-	[LOOPBACK_GMAC]		= "GMAC",
-	[LOOPBACK_XGMII]	= "XGMII",
-	[LOOPBACK_XGXS]		= "XGXS",
-	[LOOPBACK_XAUI] 	= "XAUI",
-	[LOOPBACK_GPHY]		= "GPHY",
-	[LOOPBACK_PHYXS]	= "PHYXS",
-	[LOOPBACK_PCS]	 	= "PCS",
-	[LOOPBACK_PMAPMD]	= "PMA/PMD",
-	[LOOPBACK_NETWORK]	= "NETWORK",
-};
-
 struct ethtool_string {
 	char name[ETH_GSTRING_LEN];
 };
@@ -167,6 +152,7 @@
 	EFX_ETHTOOL_UINT_CHANNEL_STAT(rx_tobe_disc),
 	EFX_ETHTOOL_UINT_CHANNEL_STAT(rx_ip_hdr_chksum_err),
 	EFX_ETHTOOL_UINT_CHANNEL_STAT(rx_tcp_udp_chksum_err),
+	EFX_ETHTOOL_UINT_CHANNEL_STAT(rx_mcast_mismatch),
 	EFX_ETHTOOL_UINT_CHANNEL_STAT(rx_frm_trunc),
 };
 
@@ -187,13 +173,15 @@
 {
 	struct efx_nic *efx = netdev_priv(net_dev);
 
-	efx->board_info.blink(efx, 1);
-	set_current_state(TASK_INTERRUPTIBLE);
-	if (count)
-		schedule_timeout(count * HZ);
-	else
-		schedule();
-	efx->board_info.blink(efx, 0);
+	do {
+		efx->type->set_id_led(efx, EFX_LED_ON);
+		schedule_timeout_interruptible(HZ / 2);
+
+		efx->type->set_id_led(efx, EFX_LED_OFF);
+		schedule_timeout_interruptible(HZ / 2);
+	} while (!signal_pending(current) && --count != 0);
+
+	efx->type->set_id_led(efx, EFX_LED_DEFAULT);
 	return 0;
 }
 
@@ -202,6 +190,7 @@
 			     struct ethtool_cmd *ecmd)
 {
 	struct efx_nic *efx = netdev_priv(net_dev);
+	struct efx_link_state *link_state = &efx->link_state;
 
 	mutex_lock(&efx->mac_lock);
 	efx->phy_op->get_settings(efx, ecmd);
@@ -209,6 +198,13 @@
 
 	/* Falcon GMAC does not support 1000Mbps HD */
 	ecmd->supported &= ~SUPPORTED_1000baseT_Half;
+	/* Both MACs support pause frames (bidirectional and respond-only) */
+	ecmd->supported |= SUPPORTED_Pause | SUPPORTED_Asym_Pause;
+
+	if (LOOPBACK_INTERNAL(efx)) {
+		ecmd->speed = link_state->speed;
+		ecmd->duplex = link_state->fd ? DUPLEX_FULL : DUPLEX_HALF;
+	}
 
 	return 0;
 }
@@ -230,9 +226,6 @@
 	mutex_lock(&efx->mac_lock);
 	rc = efx->phy_op->set_settings(efx, ecmd);
 	mutex_unlock(&efx->mac_lock);
-	if (!rc)
-		efx_reconfigure_port(efx);
-
 	return rc;
 }
 
@@ -243,6 +236,9 @@
 
 	strlcpy(info->driver, EFX_DRIVER_NAME, sizeof(info->driver));
 	strlcpy(info->version, EFX_DRIVER_VERSION, sizeof(info->version));
+	if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0)
+		siena_print_fwver(efx, info->fw_version,
+				  sizeof(info->fw_version));
 	strlcpy(info->bus_info, pci_name(efx->pci_dev), sizeof(info->bus_info));
 }
 
@@ -289,7 +285,7 @@
 #define EFX_TX_QUEUE_NAME(_tx_queue) "txq%d", _tx_queue->queue
 #define EFX_RX_QUEUE_NAME(_rx_queue) "rxq%d", _rx_queue->queue
 #define EFX_LOOPBACK_NAME(_mode, _counter)			\
-	"loopback.%s." _counter, LOOPBACK_MODE_NAME(mode)
+	"loopback.%s." _counter, STRING_TABLE_LOOKUP(_mode, efx_loopback_mode)
 
 /**
  * efx_fill_loopback_test - fill in a block of loopback self-test entries
@@ -372,9 +368,21 @@
 	efx_fill_test(n++, strings, data, &tests->registers,
 		      "core", 0, "registers", NULL);
 
-	for (i = 0; i < efx->phy_op->num_tests; i++)
-		efx_fill_test(n++, strings, data, &tests->phy[i],
-			      "phy", 0, efx->phy_op->test_names[i], NULL);
+	if (efx->phy_op->run_tests != NULL) {
+		EFX_BUG_ON_PARANOID(efx->phy_op->test_name == NULL);
+
+		for (i = 0; true; ++i) {
+			const char *name;
+
+			EFX_BUG_ON_PARANOID(i >= EFX_MAX_PHY_TESTS);
+			name = efx->phy_op->test_name(efx, i);
+			if (name == NULL)
+				break;
+
+			efx_fill_test(n++, strings, data, &tests->phy[i],
+				      "phy", 0, name, NULL);
+		}
+	}
 
 	/* Loopback tests */
 	for (mode = LOOPBACK_NONE; mode <= LOOPBACK_TEST_MAX; mode++) {
@@ -463,6 +471,36 @@
 	}
 }
 
+static int efx_ethtool_set_tso(struct net_device *net_dev, u32 enable)
+{
+	struct efx_nic *efx __attribute__ ((unused)) = netdev_priv(net_dev);
+	unsigned long features;
+
+	features = NETIF_F_TSO;
+	if (efx->type->offload_features & NETIF_F_V6_CSUM)
+		features |= NETIF_F_TSO6;
+
+	if (enable)
+		net_dev->features |= features;
+	else
+		net_dev->features &= ~features;
+
+	return 0;
+}
+
+static int efx_ethtool_set_tx_csum(struct net_device *net_dev, u32 enable)
+{
+	struct efx_nic *efx = netdev_priv(net_dev);
+	unsigned long features = efx->type->offload_features & NETIF_F_ALL_CSUM;
+
+	if (enable)
+		net_dev->features |= features;
+	else
+		net_dev->features &= ~features;
+
+	return 0;
+}
+
 static int efx_ethtool_set_rx_csum(struct net_device *net_dev, u32 enable)
 {
 	struct efx_nic *efx = netdev_priv(net_dev);
@@ -537,7 +575,7 @@
 {
 	struct efx_nic *efx = netdev_priv(net_dev);
 
-	return efx->link_up;
+	return efx->link_state.up;
 }
 
 static int efx_ethtool_get_eeprom_len(struct net_device *net_dev)
@@ -562,7 +600,8 @@
 	rc = mutex_lock_interruptible(&efx->spi_lock);
 	if (rc)
 		return rc;
-	rc = falcon_spi_read(spi, eeprom->offset + EFX_EEPROM_BOOTCONFIG_START,
+	rc = falcon_spi_read(efx, spi,
+			     eeprom->offset + EFX_EEPROM_BOOTCONFIG_START,
 			     eeprom->len, &len, buf);
 	mutex_unlock(&efx->spi_lock);
 
@@ -585,7 +624,8 @@
 	rc = mutex_lock_interruptible(&efx->spi_lock);
 	if (rc)
 		return rc;
-	rc = falcon_spi_write(spi, eeprom->offset + EFX_EEPROM_BOOTCONFIG_START,
+	rc = falcon_spi_write(efx, spi,
+			      eeprom->offset + EFX_EEPROM_BOOTCONFIG_START,
 			      eeprom->len, &len, buf);
 	mutex_unlock(&efx->spi_lock);
 
@@ -618,6 +658,9 @@
 	coalesce->use_adaptive_rx_coalesce = efx->irq_rx_adaptive;
 	coalesce->rx_coalesce_usecs_irq = efx->irq_rx_moderation;
 
+	coalesce->tx_coalesce_usecs_irq *= EFX_IRQ_MOD_RESOLUTION;
+	coalesce->rx_coalesce_usecs_irq *= EFX_IRQ_MOD_RESOLUTION;
+
 	return 0;
 }
 
@@ -656,13 +699,8 @@
 	}
 
 	efx_init_irq_moderation(efx, tx_usecs, rx_usecs, adaptive);
-
-	/* Reset channel to pick up new moderation value.  Note that
-	 * this may change the value of the irq_moderation field
-	 * (e.g. to allow for hardware timer granularity).
-	 */
 	efx_for_each_channel(channel, efx)
-		falcon_set_int_moderation(channel);
+		efx->type->push_irq_moderation(channel);
 
 	return 0;
 }
@@ -671,8 +709,12 @@
 				      struct ethtool_pauseparam *pause)
 {
 	struct efx_nic *efx = netdev_priv(net_dev);
-	enum efx_fc_type wanted_fc;
+	enum efx_fc_type wanted_fc, old_fc;
+	u32 old_adv;
 	bool reset;
+	int rc = 0;
+
+	mutex_lock(&efx->mac_lock);
 
 	wanted_fc = ((pause->rx_pause ? EFX_FC_RX : 0) |
 		     (pause->tx_pause ? EFX_FC_TX : 0) |
@@ -680,14 +722,14 @@
 
 	if ((wanted_fc & EFX_FC_TX) && !(wanted_fc & EFX_FC_RX)) {
 		EFX_LOG(efx, "Flow control unsupported: tx ON rx OFF\n");
-		return -EINVAL;
+		rc = -EINVAL;
+		goto out;
 	}
 
-	if (!(efx->phy_op->mmds & MDIO_DEVS_AN) &&
-	    (wanted_fc & EFX_FC_AUTO)) {
-		EFX_LOG(efx, "PHY does not support flow control "
-			"autonegotiation\n");
-		return -EINVAL;
+	if ((wanted_fc & EFX_FC_AUTO) && !efx->link_advertising) {
+		EFX_LOG(efx, "Autonegotiation is disabled\n");
+		rc = -EINVAL;
+		goto out;
 	}
 
 	/* TX flow control may automatically turn itself off if the
@@ -697,27 +739,40 @@
 	 * and fix it be cycling transmit flow control on this end. */
 	reset = (wanted_fc & EFX_FC_TX) && !(efx->wanted_fc & EFX_FC_TX);
 	if (EFX_WORKAROUND_11482(efx) && reset) {
-		if (falcon_rev(efx) >= FALCON_REV_B0) {
+		if (efx_nic_rev(efx) == EFX_REV_FALCON_B0) {
 			/* Recover by resetting the EM block */
-			if (efx->link_up)
-				falcon_drain_tx_fifo(efx);
+			falcon_stop_nic_stats(efx);
+			falcon_drain_tx_fifo(efx);
+			efx->mac_op->reconfigure(efx);
+			falcon_start_nic_stats(efx);
 		} else {
 			/* Schedule a reset to recover */
 			efx_schedule_reset(efx, RESET_TYPE_INVISIBLE);
 		}
 	}
 
-	/* Try to push the pause parameters */
-	mutex_lock(&efx->mac_lock);
+	old_adv = efx->link_advertising;
+	old_fc = efx->wanted_fc;
+	efx_link_set_wanted_fc(efx, wanted_fc);
+	if (efx->link_advertising != old_adv ||
+	    (efx->wanted_fc ^ old_fc) & EFX_FC_AUTO) {
+		rc = efx->phy_op->reconfigure(efx);
+		if (rc) {
+			EFX_ERR(efx, "Unable to advertise requested flow "
+				"control setting\n");
+			goto out;
+		}
+	}
 
-	efx->wanted_fc = wanted_fc;
-	if (efx->phy_op->mmds & MDIO_DEVS_AN)
-		mdio45_ethtool_spauseparam_an(&efx->mdio, pause);
-	__efx_reconfigure_port(efx);
+	/* Reconfigure the MAC. The PHY *may* generate a link state change event
+	 * if the user just changed the advertised capabilities, but there's no
+	 * harm doing this twice */
+	efx->mac_op->reconfigure(efx);
 
+out:
 	mutex_unlock(&efx->mac_lock);
 
-	return 0;
+	return rc;
 }
 
 static void efx_ethtool_get_pauseparam(struct net_device *net_dev,
@@ -731,6 +786,50 @@
 }
 
 
+static void efx_ethtool_get_wol(struct net_device *net_dev,
+				struct ethtool_wolinfo *wol)
+{
+	struct efx_nic *efx = netdev_priv(net_dev);
+	return efx->type->get_wol(efx, wol);
+}
+
+
+static int efx_ethtool_set_wol(struct net_device *net_dev,
+			       struct ethtool_wolinfo *wol)
+{
+	struct efx_nic *efx = netdev_priv(net_dev);
+	return efx->type->set_wol(efx, wol->wolopts);
+}
+
+extern int efx_ethtool_reset(struct net_device *net_dev, u32 *flags)
+{
+	struct efx_nic *efx = netdev_priv(net_dev);
+	enum reset_type method;
+	enum {
+		ETH_RESET_EFX_INVISIBLE = (ETH_RESET_DMA | ETH_RESET_FILTER |
+					   ETH_RESET_OFFLOAD | ETH_RESET_MAC)
+	};
+
+	/* Check for minimal reset flags */
+	if ((*flags & ETH_RESET_EFX_INVISIBLE) != ETH_RESET_EFX_INVISIBLE)
+		return -EINVAL;
+	*flags ^= ETH_RESET_EFX_INVISIBLE;
+	method = RESET_TYPE_INVISIBLE;
+
+	if (*flags & ETH_RESET_PHY) {
+		*flags ^= ETH_RESET_PHY;
+		method = RESET_TYPE_ALL;
+	}
+
+	if ((*flags & efx->type->reset_world_flags) ==
+	    efx->type->reset_world_flags) {
+		*flags ^= efx->type->reset_world_flags;
+		method = RESET_TYPE_WORLD;
+	}
+
+	return efx_reset(efx, method);
+}
+
 const struct ethtool_ops efx_ethtool_ops = {
 	.get_settings		= efx_ethtool_get_settings,
 	.set_settings		= efx_ethtool_set_settings,
@@ -747,11 +846,13 @@
 	.get_rx_csum		= efx_ethtool_get_rx_csum,
 	.set_rx_csum		= efx_ethtool_set_rx_csum,
 	.get_tx_csum		= ethtool_op_get_tx_csum,
-	.set_tx_csum		= ethtool_op_set_tx_csum,
+	/* Need to enable/disable IPv6 too */
+	.set_tx_csum		= efx_ethtool_set_tx_csum,
 	.get_sg			= ethtool_op_get_sg,
 	.set_sg			= ethtool_op_set_sg,
 	.get_tso		= ethtool_op_get_tso,
-	.set_tso		= ethtool_op_set_tso,
+	/* Need to enable/disable TSO-IPv6 too */
+	.set_tso		= efx_ethtool_set_tso,
 	.get_flags		= ethtool_op_get_flags,
 	.set_flags		= ethtool_op_set_flags,
 	.get_sset_count		= efx_ethtool_get_sset_count,
@@ -759,4 +860,7 @@
 	.get_strings		= efx_ethtool_get_strings,
 	.phys_id		= efx_ethtool_phys_id,
 	.get_ethtool_stats	= efx_ethtool_get_stats,
+	.get_wol                = efx_ethtool_get_wol,
+	.set_wol                = efx_ethtool_set_wol,
+	.reset			= efx_ethtool_reset,
 };
--- linux-mvl-dove-2.6.32.orig/drivers/net/sfc/mdio_10g.h
+++ linux-mvl-dove-2.6.32/drivers/net/sfc/mdio_10g.h
@@ -1,6 +1,6 @@
 /****************************************************************************
  * Driver for Solarflare Solarstorm network controllers and boards
- * Copyright 2006-2008 Solarflare Communications Inc.
+ * Copyright 2006-2009 Solarflare Communications Inc.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of the GNU General Public License version 2 as published
@@ -17,7 +17,6 @@
  */
 
 #include "efx.h"
-#include "boards.h"
 
 static inline unsigned efx_mdio_id_rev(u32 id) { return id & 0xf; }
 static inline unsigned efx_mdio_id_model(u32 id) { return (id >> 4) & 0x3f; }
@@ -87,6 +86,9 @@
 /* Set (some of) the PHY settings over MDIO */
 extern int efx_mdio_set_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd);
 
+/* Push advertising flags and restart autonegotiation */
+extern void efx_mdio_an_reconfigure(struct efx_nic *efx);
+
 /* Get pause parameters from AN if available (otherwise return
  * requested pause parameters)
  */
--- linux-mvl-dove-2.6.32.orig/drivers/net/sfc/siena.c
+++ linux-mvl-dove-2.6.32/drivers/net/sfc/siena.c
@@ -0,0 +1,614 @@
+/****************************************************************************
+ * Driver for Solarflare Solarstorm network controllers and boards
+ * Copyright 2005-2006 Fen Systems Ltd.
+ * Copyright 2006-2009 Solarflare Communications Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation, incorporated herein by reference.
+ */
+
+#include <linux/bitops.h>
+#include <linux/delay.h>
+#include <linux/pci.h>
+#include <linux/module.h>
+#include "net_driver.h"
+#include "bitfield.h"
+#include "efx.h"
+#include "nic.h"
+#include "mac.h"
+#include "spi.h"
+#include "regs.h"
+#include "io.h"
+#include "phy.h"
+#include "workarounds.h"
+#include "mcdi.h"
+#include "mcdi_pcol.h"
+
+/* Hardware control for SFC9000 family including SFL9021 (aka Siena). */
+
+static void siena_init_wol(struct efx_nic *efx);
+
+
+static void siena_push_irq_moderation(struct efx_channel *channel)
+{
+	efx_dword_t timer_cmd;
+
+	if (channel->irq_moderation)
+		EFX_POPULATE_DWORD_2(timer_cmd,
+				     FRF_CZ_TC_TIMER_MODE,
+				     FFE_CZ_TIMER_MODE_INT_HLDOFF,
+				     FRF_CZ_TC_TIMER_VAL,
+				     channel->irq_moderation - 1);
+	else
+		EFX_POPULATE_DWORD_2(timer_cmd,
+				     FRF_CZ_TC_TIMER_MODE,
+				     FFE_CZ_TIMER_MODE_DIS,
+				     FRF_CZ_TC_TIMER_VAL, 0);
+	efx_writed_page_locked(channel->efx, &timer_cmd, FR_BZ_TIMER_COMMAND_P0,
+			       channel->channel);
+}
+
+static void siena_push_multicast_hash(struct efx_nic *efx)
+{
+	WARN_ON(!mutex_is_locked(&efx->mac_lock));
+
+	efx_mcdi_rpc(efx, MC_CMD_SET_MCAST_HASH,
+		     efx->multicast_hash.byte, sizeof(efx->multicast_hash),
+		     NULL, 0, NULL);
+}
+
+static int siena_mdio_write(struct net_device *net_dev,
+			    int prtad, int devad, u16 addr, u16 value)
+{
+	struct efx_nic *efx = netdev_priv(net_dev);
+	uint32_t status;
+	int rc;
+
+	rc = efx_mcdi_mdio_write(efx, efx->mdio_bus, prtad, devad,
+				 addr, value, &status);
+	if (rc)
+		return rc;
+	if (status != MC_CMD_MDIO_STATUS_GOOD)
+		return -EIO;
+
+	return 0;
+}
+
+static int siena_mdio_read(struct net_device *net_dev,
+			   int prtad, int devad, u16 addr)
+{
+	struct efx_nic *efx = netdev_priv(net_dev);
+	uint16_t value;
+	uint32_t status;
+	int rc;
+
+	rc = efx_mcdi_mdio_read(efx, efx->mdio_bus, prtad, devad,
+				addr, &value, &status);
+	if (rc)
+		return rc;
+	if (status != MC_CMD_MDIO_STATUS_GOOD)
+		return -EIO;
+
+	return (int)value;
+}
+
+/* This call is responsible for hooking in the MAC and PHY operations */
+static int siena_probe_port(struct efx_nic *efx)
+{
+	int rc;
+
+	/* Hook in PHY operations table */
+	efx->phy_op = &efx_mcdi_phy_ops;
+
+	/* Set up MDIO structure for PHY */
+	efx->mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
+	efx->mdio.mdio_read = siena_mdio_read;
+	efx->mdio.mdio_write = siena_mdio_write;
+
+	/* Fill out MDIO structure and loopback modes */
+	rc = efx->phy_op->probe(efx);
+	if (rc != 0)
+		return rc;
+
+	/* Initial assumption */
+	efx->link_state.speed = 10000;
+	efx->link_state.fd = true;
+	efx->wanted_fc = EFX_FC_RX | EFX_FC_TX;
+
+	/* Allocate buffer for stats */
+	rc = efx_nic_alloc_buffer(efx, &efx->stats_buffer,
+				  MC_CMD_MAC_NSTATS * sizeof(u64));
+	if (rc)
+		return rc;
+	EFX_LOG(efx, "stats buffer at %llx (virt %p phys %llx)\n",
+		(u64)efx->stats_buffer.dma_addr,
+		efx->stats_buffer.addr,
+		(u64)virt_to_phys(efx->stats_buffer.addr));
+
+	efx_mcdi_mac_stats(efx, efx->stats_buffer.dma_addr, 0, 0, 1);
+
+	return 0;
+}
+
+void siena_remove_port(struct efx_nic *efx)
+{
+	efx->phy_op->remove(efx);
+	efx_nic_free_buffer(efx, &efx->stats_buffer);
+}
+
+static const struct efx_nic_register_test siena_register_tests[] = {
+	{ FR_AZ_ADR_REGION,
+	  EFX_OWORD32(0x0001FFFF, 0x0001FFFF, 0x0001FFFF, 0x0001FFFF) },
+	{ FR_CZ_USR_EV_CFG,
+	  EFX_OWORD32(0x000103FF, 0x00000000, 0x00000000, 0x00000000) },
+	{ FR_AZ_RX_CFG,
+	  EFX_OWORD32(0xFFFFFFFE, 0xFFFFFFFF, 0x0003FFFF, 0x00000000) },
+	{ FR_AZ_TX_CFG,
+	  EFX_OWORD32(0x7FFF0037, 0xFFFF8000, 0xFFFFFFFF, 0x03FFFFFF) },
+	{ FR_AZ_TX_RESERVED,
+	  EFX_OWORD32(0xFFFEFE80, 0x1FFFFFFF, 0x020000FE, 0x007FFFFF) },
+	{ FR_AZ_SRM_TX_DC_CFG,
+	  EFX_OWORD32(0x001FFFFF, 0x00000000, 0x00000000, 0x00000000) },
+	{ FR_AZ_RX_DC_CFG,
+	  EFX_OWORD32(0x00000003, 0x00000000, 0x00000000, 0x00000000) },
+	{ FR_AZ_RX_DC_PF_WM,
+	  EFX_OWORD32(0x000003FF, 0x00000000, 0x00000000, 0x00000000) },
+	{ FR_BZ_DP_CTRL,
+	  EFX_OWORD32(0x00000FFF, 0x00000000, 0x00000000, 0x00000000) },
+	{ FR_BZ_RX_RSS_TKEY,
+	  EFX_OWORD32(0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF) },
+	{ FR_CZ_RX_RSS_IPV6_REG1,
+	  EFX_OWORD32(0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF) },
+	{ FR_CZ_RX_RSS_IPV6_REG2,
+	  EFX_OWORD32(0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF) },
+	{ FR_CZ_RX_RSS_IPV6_REG3,
+	  EFX_OWORD32(0xFFFFFFFF, 0xFFFFFFFF, 0x00000007, 0x00000000) },
+};
+
+static int siena_test_registers(struct efx_nic *efx)
+{
+	return efx_nic_test_registers(efx, siena_register_tests,
+				      ARRAY_SIZE(siena_register_tests));
+}
+
+/**************************************************************************
+ *
+ * Device reset
+ *
+ **************************************************************************
+ */
+
+static int siena_reset_hw(struct efx_nic *efx, enum reset_type method)
+{
+
+	if (method == RESET_TYPE_WORLD)
+		return efx_mcdi_reset_mc(efx);
+	else
+		return efx_mcdi_reset_port(efx);
+}
+
+static int siena_probe_nvconfig(struct efx_nic *efx)
+{
+	int rc;
+
+	rc = efx_mcdi_get_board_cfg(efx, efx->mac_address, NULL);
+	if (rc)
+		return rc;
+
+	return 0;
+}
+
+static int siena_probe_nic(struct efx_nic *efx)
+{
+	struct siena_nic_data *nic_data;
+	bool already_attached = 0;
+	int rc;
+
+	/* Allocate storage for hardware specific data */
+	nic_data = kzalloc(sizeof(struct siena_nic_data), GFP_KERNEL);
+	if (!nic_data)
+		return -ENOMEM;
+	efx->nic_data = nic_data;
+
+	if (efx_nic_fpga_ver(efx) != 0) {
+		EFX_ERR(efx, "Siena FPGA not supported\n");
+		rc = -ENODEV;
+		goto fail1;
+	}
+
+	efx_mcdi_init(efx);
+
+	/* Recover from a failed assertion before probing */
+	rc = efx_mcdi_handle_assertion(efx);
+	if (rc)
+		goto fail1;
+
+	rc = efx_mcdi_fwver(efx, &nic_data->fw_version, &nic_data->fw_build);
+	if (rc) {
+		EFX_ERR(efx, "Failed to read MCPU firmware version - "
+			"rc %d\n", rc);
+		goto fail1; /* MCPU absent? */
+	}
+
+	/* Let the BMC know that the driver is now in charge of link and
+	 * filter settings. We must do this before we reset the NIC */
+	rc = efx_mcdi_drv_attach(efx, true, &already_attached);
+	if (rc) {
+		EFX_ERR(efx, "Unable to register driver with MCPU\n");
+		goto fail2;
+	}
+	if (already_attached)
+		/* Not a fatal error */
+		EFX_ERR(efx, "Host already registered with MCPU\n");
+
+	/* Now we can reset the NIC */
+	rc = siena_reset_hw(efx, RESET_TYPE_ALL);
+	if (rc) {
+		EFX_ERR(efx, "failed to reset NIC\n");
+		goto fail3;
+	}
+
+	siena_init_wol(efx);
+
+	/* Allocate memory for INT_KER */
+	rc = efx_nic_alloc_buffer(efx, &efx->irq_status, sizeof(efx_oword_t));
+	if (rc)
+		goto fail4;
+	BUG_ON(efx->irq_status.dma_addr & 0x0f);
+
+	EFX_LOG(efx, "INT_KER at %llx (virt %p phys %llx)\n",
+		(unsigned long long)efx->irq_status.dma_addr,
+		efx->irq_status.addr,
+		(unsigned long long)virt_to_phys(efx->irq_status.addr));
+
+	/* Read in the non-volatile configuration */
+	rc = siena_probe_nvconfig(efx);
+	if (rc == -EINVAL) {
+		EFX_ERR(efx, "NVRAM is invalid therefore using defaults\n");
+		efx->phy_type = PHY_TYPE_NONE;
+		efx->mdio.prtad = MDIO_PRTAD_NONE;
+	} else if (rc) {
+		goto fail5;
+	}
+
+	return 0;
+
+fail5:
+	efx_nic_free_buffer(efx, &efx->irq_status);
+fail4:
+fail3:
+	efx_mcdi_drv_attach(efx, false, NULL);
+fail2:
+fail1:
+	kfree(efx->nic_data);
+	return rc;
+}
+
+/* This call performs hardware-specific global initialisation, such as
+ * defining the descriptor cache sizes and number of RSS channels.
+ * It does not set up any buffers, descriptor rings or event queues.
+ */
+static int siena_init_nic(struct efx_nic *efx)
+{
+	efx_oword_t temp;
+	int rc;
+
+	/* Recover from a failed assertion post-reset */
+	rc = efx_mcdi_handle_assertion(efx);
+	if (rc)
+		return rc;
+
+	/* Squash TX of packets of 16 bytes or less */
+	efx_reado(efx, &temp, FR_AZ_TX_RESERVED);
+	EFX_SET_OWORD_FIELD(temp, FRF_BZ_TX_FLUSH_MIN_LEN_EN, 1);
+	efx_writeo(efx, &temp, FR_AZ_TX_RESERVED);
+
+	/* Do not enable TX_NO_EOP_DISC_EN, since it limits packets to 16
+	 * descriptors (which is bad).
+	 */
+	efx_reado(efx, &temp, FR_AZ_TX_CFG);
+	EFX_SET_OWORD_FIELD(temp, FRF_AZ_TX_NO_EOP_DISC_EN, 0);
+	EFX_SET_OWORD_FIELD(temp, FRF_CZ_TX_FILTER_EN_BIT, 1);
+	efx_writeo(efx, &temp, FR_AZ_TX_CFG);
+
+	efx_reado(efx, &temp, FR_AZ_RX_CFG);
+	EFX_SET_OWORD_FIELD(temp, FRF_BZ_RX_DESC_PUSH_EN, 0);
+	EFX_SET_OWORD_FIELD(temp, FRF_BZ_RX_INGR_EN, 1);
+	efx_writeo(efx, &temp, FR_AZ_RX_CFG);
+
+	if (efx_nic_rx_xoff_thresh >= 0 || efx_nic_rx_xon_thresh >= 0)
+		/* No MCDI operation has been defined to set thresholds */
+		EFX_ERR(efx, "ignoring RX flow control thresholds\n");
+
+	/* Enable event logging */
+	rc = efx_mcdi_log_ctrl(efx, true, false, 0);
+	if (rc)
+		return rc;
+
+	/* Set destination of both TX and RX Flush events */
+	EFX_POPULATE_OWORD_1(temp, FRF_BZ_FLS_EVQ_ID, 0);
+	efx_writeo(efx, &temp, FR_BZ_DP_CTRL);
+
+	EFX_POPULATE_OWORD_1(temp, FRF_CZ_USREV_DIS, 1);
+	efx_writeo(efx, &temp, FR_CZ_USR_EV_CFG);
+
+	efx_nic_init_common(efx);
+	return 0;
+}
+
+static void siena_remove_nic(struct efx_nic *efx)
+{
+	efx_nic_free_buffer(efx, &efx->irq_status);
+
+	siena_reset_hw(efx, RESET_TYPE_ALL);
+
+	/* Relinquish the device back to the BMC */
+	if (efx_nic_has_mc(efx))
+		efx_mcdi_drv_attach(efx, false, NULL);
+
+	/* Tear down the private nic state */
+	kfree(efx->nic_data);
+	efx->nic_data = NULL;
+}
+
+#define STATS_GENERATION_INVALID ((u64)(-1))
+
+static int siena_try_update_nic_stats(struct efx_nic *efx)
+{
+	u64 *dma_stats;
+	struct efx_mac_stats *mac_stats;
+	u64 generation_start;
+	u64 generation_end;
+
+	mac_stats = &efx->mac_stats;
+	dma_stats = (u64 *)efx->stats_buffer.addr;
+
+	generation_end = dma_stats[MC_CMD_MAC_GENERATION_END];
+	if (generation_end == STATS_GENERATION_INVALID)
+		return 0;
+	rmb();
+
+#define MAC_STAT(M, D) \
+	mac_stats->M = dma_stats[MC_CMD_MAC_ ## D]
+
+	MAC_STAT(tx_bytes, TX_BYTES);
+	MAC_STAT(tx_bad_bytes, TX_BAD_BYTES);
+	mac_stats->tx_good_bytes = (mac_stats->tx_bytes -
+				    mac_stats->tx_bad_bytes);
+	MAC_STAT(tx_packets, TX_PKTS);
+	MAC_STAT(tx_bad, TX_BAD_FCS_PKTS);
+	MAC_STAT(tx_pause, TX_PAUSE_PKTS);
+	MAC_STAT(tx_control, TX_CONTROL_PKTS);
+	MAC_STAT(tx_unicast, TX_UNICAST_PKTS);
+	MAC_STAT(tx_multicast, TX_MULTICAST_PKTS);
+	MAC_STAT(tx_broadcast, TX_BROADCAST_PKTS);
+	MAC_STAT(tx_lt64, TX_LT64_PKTS);
+	MAC_STAT(tx_64, TX_64_PKTS);
+	MAC_STAT(tx_65_to_127, TX_65_TO_127_PKTS);
+	MAC_STAT(tx_128_to_255, TX_128_TO_255_PKTS);
+	MAC_STAT(tx_256_to_511, TX_256_TO_511_PKTS);
+	MAC_STAT(tx_512_to_1023, TX_512_TO_1023_PKTS);
+	MAC_STAT(tx_1024_to_15xx, TX_1024_TO_15XX_PKTS);
+	MAC_STAT(tx_15xx_to_jumbo, TX_15XX_TO_JUMBO_PKTS);
+	MAC_STAT(tx_gtjumbo, TX_GTJUMBO_PKTS);
+	mac_stats->tx_collision = 0;
+	MAC_STAT(tx_single_collision, TX_SINGLE_COLLISION_PKTS);
+	MAC_STAT(tx_multiple_collision, TX_MULTIPLE_COLLISION_PKTS);
+	MAC_STAT(tx_excessive_collision, TX_EXCESSIVE_COLLISION_PKTS);
+	MAC_STAT(tx_deferred, TX_DEFERRED_PKTS);
+	MAC_STAT(tx_late_collision, TX_LATE_COLLISION_PKTS);
+	mac_stats->tx_collision = (mac_stats->tx_single_collision +
+				   mac_stats->tx_multiple_collision +
+				   mac_stats->tx_excessive_collision +
+				   mac_stats->tx_late_collision);
+	MAC_STAT(tx_excessive_deferred, TX_EXCESSIVE_DEFERRED_PKTS);
+	MAC_STAT(tx_non_tcpudp, TX_NON_TCPUDP_PKTS);
+	MAC_STAT(tx_mac_src_error, TX_MAC_SRC_ERR_PKTS);
+	MAC_STAT(tx_ip_src_error, TX_IP_SRC_ERR_PKTS);
+	MAC_STAT(rx_bytes, RX_BYTES);
+	MAC_STAT(rx_bad_bytes, RX_BAD_BYTES);
+	mac_stats->rx_good_bytes = (mac_stats->rx_bytes -
+				    mac_stats->rx_bad_bytes);
+	MAC_STAT(rx_packets, RX_PKTS);
+	MAC_STAT(rx_good, RX_GOOD_PKTS);
+	mac_stats->rx_bad = mac_stats->rx_packets - mac_stats->rx_good;
+	MAC_STAT(rx_pause, RX_PAUSE_PKTS);
+	MAC_STAT(rx_control, RX_CONTROL_PKTS);
+	MAC_STAT(rx_unicast, RX_UNICAST_PKTS);
+	MAC_STAT(rx_multicast, RX_MULTICAST_PKTS);
+	MAC_STAT(rx_broadcast, RX_BROADCAST_PKTS);
+	MAC_STAT(rx_lt64, RX_UNDERSIZE_PKTS);
+	MAC_STAT(rx_64, RX_64_PKTS);
+	MAC_STAT(rx_65_to_127, RX_65_TO_127_PKTS);
+	MAC_STAT(rx_128_to_255, RX_128_TO_255_PKTS);
+	MAC_STAT(rx_256_to_511, RX_256_TO_511_PKTS);
+	MAC_STAT(rx_512_to_1023, RX_512_TO_1023_PKTS);
+	MAC_STAT(rx_1024_to_15xx, RX_1024_TO_15XX_PKTS);
+	MAC_STAT(rx_15xx_to_jumbo, RX_15XX_TO_JUMBO_PKTS);
+	MAC_STAT(rx_gtjumbo, RX_GTJUMBO_PKTS);
+	mac_stats->rx_bad_lt64 = 0;
+	mac_stats->rx_bad_64_to_15xx = 0;
+	mac_stats->rx_bad_15xx_to_jumbo = 0;
+	MAC_STAT(rx_bad_gtjumbo, RX_JABBER_PKTS);
+	MAC_STAT(rx_overflow, RX_OVERFLOW_PKTS);
+	mac_stats->rx_missed = 0;
+	MAC_STAT(rx_false_carrier, RX_FALSE_CARRIER_PKTS);
+	MAC_STAT(rx_symbol_error, RX_SYMBOL_ERROR_PKTS);
+	MAC_STAT(rx_align_error, RX_ALIGN_ERROR_PKTS);
+	MAC_STAT(rx_length_error, RX_LENGTH_ERROR_PKTS);
+	MAC_STAT(rx_internal_error, RX_INTERNAL_ERROR_PKTS);
+	mac_stats->rx_good_lt64 = 0;
+
+	efx->n_rx_nodesc_drop_cnt = dma_stats[MC_CMD_MAC_RX_NODESC_DROPS];
+
+#undef MAC_STAT
+
+	rmb();
+	generation_start = dma_stats[MC_CMD_MAC_GENERATION_START];
+	if (generation_end != generation_start)
+		return -EAGAIN;
+
+	return 0;
+}
+
+static void siena_update_nic_stats(struct efx_nic *efx)
+{
+	int retry;
+
+	/* If we're unlucky enough to read statistics wduring the DMA, wait
+	 * up to 10ms for it to finish (typically takes <500us) */
+	for (retry = 0; retry < 100; ++retry) {
+		if (siena_try_update_nic_stats(efx) == 0)
+			return;
+		udelay(100);
+	}
+
+	/* Use the old values instead */
+}
+
+static void siena_start_nic_stats(struct efx_nic *efx)
+{
+	u64 *dma_stats = (u64 *)efx->stats_buffer.addr;
+
+	dma_stats[MC_CMD_MAC_GENERATION_END] = STATS_GENERATION_INVALID;
+
+	efx_mcdi_mac_stats(efx, efx->stats_buffer.dma_addr,
+			   MC_CMD_MAC_NSTATS * sizeof(u64), 1, 0);
+}
+
+static void siena_stop_nic_stats(struct efx_nic *efx)
+{
+	efx_mcdi_mac_stats(efx, efx->stats_buffer.dma_addr, 0, 0, 0);
+}
+
+void siena_print_fwver(struct efx_nic *efx, char *buf, size_t len)
+{
+	struct siena_nic_data *nic_data = efx->nic_data;
+	snprintf(buf, len, "%u.%u.%u.%u",
+		 (unsigned int)(nic_data->fw_version >> 48),
+		 (unsigned int)(nic_data->fw_version >> 32 & 0xffff),
+		 (unsigned int)(nic_data->fw_version >> 16 & 0xffff),
+		 (unsigned int)(nic_data->fw_version & 0xffff));
+}
+
+/**************************************************************************
+ *
+ * Wake on LAN
+ *
+ **************************************************************************
+ */
+
+static void siena_get_wol(struct efx_nic *efx, struct ethtool_wolinfo *wol)
+{
+	struct siena_nic_data *nic_data = efx->nic_data;
+
+	wol->supported = WAKE_MAGIC;
+	if (nic_data->wol_filter_id != -1)
+		wol->wolopts = WAKE_MAGIC;
+	else
+		wol->wolopts = 0;
+	memset(&wol->sopass, 0, sizeof(wol->sopass));
+}
+
+
+static int siena_set_wol(struct efx_nic *efx, u32 type)
+{
+	struct siena_nic_data *nic_data = efx->nic_data;
+	int rc;
+
+	if (type & ~WAKE_MAGIC)
+		return -EINVAL;
+
+	if (type & WAKE_MAGIC) {
+		if (nic_data->wol_filter_id != -1)
+			efx_mcdi_wol_filter_remove(efx,
+						   nic_data->wol_filter_id);
+		rc = efx_mcdi_wol_filter_set_magic(efx, efx->mac_address,
+						   &nic_data->wol_filter_id);
+		if (rc)
+			goto fail;
+
+		pci_wake_from_d3(efx->pci_dev, true);
+	} else {
+		rc = efx_mcdi_wol_filter_reset(efx);
+		nic_data->wol_filter_id = -1;
+		pci_wake_from_d3(efx->pci_dev, false);
+		if (rc)
+			goto fail;
+	}
+
+	return 0;
+ fail:
+	EFX_ERR(efx, "%s failed: type=%d rc=%d\n", __func__, type, rc);
+	return rc;
+}
+
+
+static void siena_init_wol(struct efx_nic *efx)
+{
+	struct siena_nic_data *nic_data = efx->nic_data;
+	int rc;
+
+	rc = efx_mcdi_wol_filter_get_magic(efx, &nic_data->wol_filter_id);
+
+	if (rc != 0) {
+		/* If it failed, attempt to get into a synchronised
+		 * state with MC by resetting any set WoL filters */
+		efx_mcdi_wol_filter_reset(efx);
+		nic_data->wol_filter_id = -1;
+	} else if (nic_data->wol_filter_id != -1) {
+		pci_wake_from_d3(efx->pci_dev, true);
+	}
+}
+
+
+/**************************************************************************
+ *
+ * Revision-dependent attributes used by efx.c and nic.c
+ *
+ **************************************************************************
+ */
+
+struct efx_nic_type siena_a0_nic_type = {
+	.probe = siena_probe_nic,
+	.remove = siena_remove_nic,
+	.init = siena_init_nic,
+	.fini = efx_port_dummy_op_void,
+	.monitor = NULL,
+	.reset = siena_reset_hw,
+	.probe_port = siena_probe_port,
+	.remove_port = siena_remove_port,
+	.prepare_flush = efx_port_dummy_op_void,
+	.update_stats = siena_update_nic_stats,
+	.start_stats = siena_start_nic_stats,
+	.stop_stats = siena_stop_nic_stats,
+	.set_id_led = efx_mcdi_set_id_led,
+	.push_irq_moderation = siena_push_irq_moderation,
+	.push_multicast_hash = siena_push_multicast_hash,
+	.reconfigure_port = efx_mcdi_phy_reconfigure,
+	.get_wol = siena_get_wol,
+	.set_wol = siena_set_wol,
+	.resume_wol = siena_init_wol,
+	.test_registers = siena_test_registers,
+	.default_mac_ops = &efx_mcdi_mac_operations,
+
+	.revision = EFX_REV_SIENA_A0,
+	.mem_map_size = (FR_CZ_MC_TREG_SMEM +
+			 FR_CZ_MC_TREG_SMEM_STEP * FR_CZ_MC_TREG_SMEM_ROWS),
+	.txd_ptr_tbl_base = FR_BZ_TX_DESC_PTR_TBL,
+	.rxd_ptr_tbl_base = FR_BZ_RX_DESC_PTR_TBL,
+	.buf_tbl_base = FR_BZ_BUF_FULL_TBL,
+	.evq_ptr_tbl_base = FR_BZ_EVQ_PTR_TBL,
+	.evq_rptr_tbl_base = FR_BZ_EVQ_RPTR,
+	.max_dma_mask = DMA_BIT_MASK(FSF_AZ_TX_KER_BUF_ADDR_WIDTH),
+	.rx_buffer_padding = 0,
+	.max_interrupt_mode = EFX_INT_MODE_MSIX,
+	.phys_addr_channels = 32, /* Hardware limit is 64, but the legacy
+				   * interrupt handler only supports 32
+				   * channels */
+	.tx_dc_base = 0x88000,
+	.rx_dc_base = 0x68000,
+	.offload_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM,
+	.reset_world_flags = ETH_RESET_MGMT << ETH_RESET_SHARED_SHIFT,
+};
--- linux-mvl-dove-2.6.32.orig/drivers/net/sfc/mac.h
+++ linux-mvl-dove-2.6.32/drivers/net/sfc/mac.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * Driver for Solarflare Solarstorm network controllers and boards
  * Copyright 2005-2006 Fen Systems Ltd.
- * Copyright 2006-2008 Solarflare Communications Inc.
+ * Copyright 2006-2009 Solarflare Communications Inc.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of the GNU General Public License version 2 as published
@@ -15,5 +15,9 @@
 
 extern struct efx_mac_operations falcon_gmac_operations;
 extern struct efx_mac_operations falcon_xmac_operations;
+extern struct efx_mac_operations efx_mcdi_mac_operations;
+extern void falcon_reconfigure_xmac_core(struct efx_nic *efx);
+extern int efx_mcdi_mac_stats(struct efx_nic *efx, dma_addr_t dma_addr,
+			      u32 dma_len, int enable, int clear);
 
 #endif
--- linux-mvl-dove-2.6.32.orig/drivers/net/sfc/mcdi_mac.c
+++ linux-mvl-dove-2.6.32/drivers/net/sfc/mcdi_mac.c
@@ -0,0 +1,152 @@
+/****************************************************************************
+ * Driver for Solarflare Solarstorm network controllers and boards
+ * Copyright 2009 Solarflare Communications Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation, incorporated herein by reference.
+ */
+
+#include "net_driver.h"
+#include "efx.h"
+#include "mac.h"
+#include "mcdi.h"
+#include "mcdi_pcol.h"
+
+static int efx_mcdi_set_mac(struct efx_nic *efx)
+{
+	u32 reject, fcntl;
+	u8 cmdbytes[MC_CMD_SET_MAC_IN_LEN];
+
+	memcpy(cmdbytes + MC_CMD_SET_MAC_IN_ADDR_OFST,
+	       efx->net_dev->dev_addr, ETH_ALEN);
+
+	MCDI_SET_DWORD(cmdbytes, SET_MAC_IN_MTU,
+			EFX_MAX_FRAME_LEN(efx->net_dev->mtu));
+	MCDI_SET_DWORD(cmdbytes, SET_MAC_IN_DRAIN, 0);
+
+	/* The MCDI command provides for controlling accept/reject
+	 * of broadcast packets too, but the driver doesn't currently
+	 * expose this. */
+	reject = (efx->promiscuous) ? 0 :
+		(1 << MC_CMD_SET_MAC_IN_REJECT_UNCST_LBN);
+	MCDI_SET_DWORD(cmdbytes, SET_MAC_IN_REJECT, reject);
+
+	switch (efx->wanted_fc) {
+	case EFX_FC_RX | EFX_FC_TX:
+		fcntl = MC_CMD_FCNTL_BIDIR;
+		break;
+	case EFX_FC_RX:
+		fcntl = MC_CMD_FCNTL_RESPOND;
+		break;
+	default:
+		fcntl = MC_CMD_FCNTL_OFF;
+		break;
+	}
+	if (efx->wanted_fc & EFX_FC_AUTO)
+		fcntl = MC_CMD_FCNTL_AUTO;
+
+	MCDI_SET_DWORD(cmdbytes, SET_MAC_IN_FCNTL, fcntl);
+
+	return efx_mcdi_rpc(efx, MC_CMD_SET_MAC, cmdbytes, sizeof(cmdbytes),
+			    NULL, 0, NULL);
+}
+
+static int efx_mcdi_get_mac_faults(struct efx_nic *efx, u32 *faults)
+{
+	u8 outbuf[MC_CMD_GET_LINK_OUT_LEN];
+	size_t outlength;
+	int rc;
+
+	BUILD_BUG_ON(MC_CMD_GET_LINK_IN_LEN != 0);
+
+	rc = efx_mcdi_rpc(efx, MC_CMD_GET_LINK, NULL, 0,
+			  outbuf, sizeof(outbuf), &outlength);
+	if (rc)
+		goto fail;
+
+	*faults = MCDI_DWORD(outbuf, GET_LINK_OUT_MAC_FAULT);
+	return 0;
+
+fail:
+	EFX_ERR(efx, "%s: failed rc=%d\n",
+		__func__, rc);
+	return rc;
+}
+
+int efx_mcdi_mac_stats(struct efx_nic *efx, dma_addr_t dma_addr,
+		       u32 dma_len, int enable, int clear)
+{
+	u8 inbuf[MC_CMD_MAC_STATS_IN_LEN];
+	int rc;
+	efx_dword_t *cmd_ptr;
+	int period = 1000;
+	u32 addr_hi;
+	u32 addr_lo;
+
+	BUILD_BUG_ON(MC_CMD_MAC_STATS_OUT_LEN != 0);
+
+	addr_lo = ((u64)dma_addr) >> 0;
+	addr_hi = ((u64)dma_addr) >> 32;
+
+	MCDI_SET_DWORD(inbuf, MAC_STATS_IN_DMA_ADDR_LO, addr_lo);
+	MCDI_SET_DWORD(inbuf, MAC_STATS_IN_DMA_ADDR_HI, addr_hi);
+	cmd_ptr = (efx_dword_t *)MCDI_PTR(inbuf, MAC_STATS_IN_CMD);
+	if (enable)
+		EFX_POPULATE_DWORD_6(*cmd_ptr,
+				     MC_CMD_MAC_STATS_CMD_DMA, 1,
+				     MC_CMD_MAC_STATS_CMD_CLEAR, clear,
+				     MC_CMD_MAC_STATS_CMD_PERIODIC_CHANGE, 1,
+				     MC_CMD_MAC_STATS_CMD_PERIODIC_ENABLE, 1,
+				     MC_CMD_MAC_STATS_CMD_PERIODIC_CLEAR, 0,
+				     MC_CMD_MAC_STATS_CMD_PERIOD_MS, period);
+	else
+		EFX_POPULATE_DWORD_5(*cmd_ptr,
+				     MC_CMD_MAC_STATS_CMD_DMA, 0,
+				     MC_CMD_MAC_STATS_CMD_CLEAR, clear,
+				     MC_CMD_MAC_STATS_CMD_PERIODIC_CHANGE, 1,
+				     MC_CMD_MAC_STATS_CMD_PERIODIC_ENABLE, 0,
+				     MC_CMD_MAC_STATS_CMD_PERIODIC_CLEAR, 0);
+	MCDI_SET_DWORD(inbuf, MAC_STATS_IN_DMA_LEN, dma_len);
+
+	rc = efx_mcdi_rpc(efx, MC_CMD_MAC_STATS, inbuf, sizeof(inbuf),
+			  NULL, 0, NULL);
+	if (rc)
+		goto fail;
+
+	return 0;
+
+fail:
+	EFX_ERR(efx, "%s: %s failed rc=%d\n",
+		__func__, enable ? "enable" : "disable", rc);
+	return rc;
+}
+
+static int efx_mcdi_mac_reconfigure(struct efx_nic *efx)
+{
+	int rc;
+
+	rc = efx_mcdi_set_mac(efx);
+	if (rc != 0)
+		return rc;
+
+	/* Restore the multicast hash registers. */
+	efx->type->push_multicast_hash(efx);
+
+	return 0;
+}
+
+
+static bool efx_mcdi_mac_check_fault(struct efx_nic *efx)
+{
+	u32 faults;
+	int rc = efx_mcdi_get_mac_faults(efx, &faults);
+	return (rc != 0) || (faults != 0);
+}
+
+
+struct efx_mac_operations efx_mcdi_mac_operations = {
+	.reconfigure	= efx_mcdi_mac_reconfigure,
+	.update_stats	= efx_port_dummy_op_void,
+	.check_fault 	= efx_mcdi_mac_check_fault,
+};
--- linux-mvl-dove-2.6.32.orig/drivers/net/sfc/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/net/sfc/Kconfig
@@ -1,5 +1,5 @@
 config SFC
-	tristate "Solarflare Solarstorm SFC4000 support"
+	tristate "Solarflare Solarstorm SFC4000/SFC9000-family support"
 	depends on PCI && INET
 	select MDIO
 	select CRC32
@@ -7,15 +7,16 @@
 	select I2C_ALGOBIT
 	help
 	  This driver supports 10-gigabit Ethernet cards based on
-	  the Solarflare Communications Solarstorm SFC4000 controller.
+	  the Solarflare Communications Solarstorm SFC4000 and
+	  SFC9000-family controllers.
 
 	  To compile this driver as a module, choose M here.  The module
 	  will be called sfc.
 config SFC_MTD
-	bool "Solarflare Solarstorm SFC4000 flash MTD support"
+	bool "Solarflare Solarstorm SFC4000/SFC9000-family MTD support"
 	depends on SFC && MTD && !(SFC=y && MTD=m)
 	default y
 	help
-	  This exposes the on-board flash memory as an MTD device (e.g.
-          /dev/mtd1).  This makes it possible to upload new boot code
-          to the NIC.
+	  This exposes the on-board flash memory as MTD devices (e.g.
+	  /dev/mtd1).  This makes it possible to upload new firmware
+	  to the NIC.
--- linux-mvl-dove-2.6.32.orig/drivers/net/sfc/enum.h
+++ linux-mvl-dove-2.6.32/drivers/net/sfc/enum.h
@@ -1,6 +1,6 @@
 /****************************************************************************
  * Driver for Solarflare Solarstorm network controllers and boards
- * Copyright 2007-2008 Solarflare Communications Inc.
+ * Copyright 2007-2009 Solarflare Communications Inc.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of the GNU General Public License version 2 as published
@@ -13,44 +13,101 @@
 /**
  * enum efx_loopback_mode - loopback modes
  * @LOOPBACK_NONE: no loopback
- * @LOOPBACK_GMAC: loopback within GMAC at unspecified level
- * @LOOPBACK_XGMII: loopback within XMAC at XGMII level
- * @LOOPBACK_XGXS: loopback within XMAC at XGXS level
- * @LOOPBACK_XAUI: loopback within XMAC at XAUI level
+ * @LOOPBACK_DATA: data path loopback
+ * @LOOPBACK_GMAC: loopback within GMAC
+ * @LOOPBACK_XGMII: loopback after XMAC
+ * @LOOPBACK_XGXS: loopback within BPX after XGXS
+ * @LOOPBACK_XAUI: loopback within BPX before XAUI serdes
+ * @LOOPBACK_GMII: loopback within BPX after GMAC
+ * @LOOPBACK_SGMII: loopback within BPX within SGMII
+ * @LOOPBACK_XGBR: loopback within BPX within XGBR
+ * @LOOPBACK_XFI: loopback within BPX before XFI serdes
+ * @LOOPBACK_XAUI_FAR: loopback within BPX after XAUI serdes
+ * @LOOPBACK_GMII_FAR: loopback within BPX before SGMII
+ * @LOOPBACK_SGMII_FAR: loopback within BPX after SGMII
+ * @LOOPBACK_XFI_FAR: loopback after XFI serdes
  * @LOOPBACK_GPHY: loopback within 1G PHY at unspecified level
  * @LOOPBACK_PHYXS: loopback within 10G PHY at PHYXS level
  * @LOOPBACK_PCS: loopback within 10G PHY at PCS level
  * @LOOPBACK_PMAPMD: loopback within 10G PHY at PMAPMD level
- * @LOOPBACK_NETWORK: reflecting loopback (even further than furthest!)
+ * @LOOPBACK_XPORT: cross port loopback
+ * @LOOPBACK_XGMII_WS: wireside loopback excluding XMAC
+ * @LOOPBACK_XAUI_WS: wireside loopback within BPX within XAUI serdes
+ * @LOOPBACK_XAUI_WS_FAR: wireside loopback within BPX including XAUI serdes
+ * @LOOPBACK_XAUI_WS_NEAR: wireside loopback within BPX excluding XAUI serdes
+ * @LOOPBACK_GMII_WS: wireside loopback excluding GMAC
+ * @LOOPBACK_XFI_WS: wireside loopback excluding XFI serdes
+ * @LOOPBACK_XFI_WS_FAR: wireside loopback including XFI serdes
+ * @LOOPBACK_PHYXS_WS: wireside loopback within 10G PHY at PHYXS level
  */
-/* Please keep in order and up-to-date w.r.t the following two #defines */
+/* Please keep up-to-date w.r.t the following two #defines */
 enum efx_loopback_mode {
 	LOOPBACK_NONE = 0,
-	LOOPBACK_GMAC = 1,
-	LOOPBACK_XGMII = 2,
-	LOOPBACK_XGXS = 3,
-	LOOPBACK_XAUI = 4,
-	LOOPBACK_GPHY = 5,
-	LOOPBACK_PHYXS = 6,
-	LOOPBACK_PCS = 7,
-	LOOPBACK_PMAPMD = 8,
-	LOOPBACK_NETWORK = 9,
+	LOOPBACK_DATA = 1,
+	LOOPBACK_GMAC = 2,
+	LOOPBACK_XGMII = 3,
+	LOOPBACK_XGXS = 4,
+	LOOPBACK_XAUI = 5,
+	LOOPBACK_GMII = 6,
+	LOOPBACK_SGMII = 7,
+	LOOPBACK_XGBR = 8,
+	LOOPBACK_XFI = 9,
+	LOOPBACK_XAUI_FAR = 10,
+	LOOPBACK_GMII_FAR = 11,
+	LOOPBACK_SGMII_FAR = 12,
+	LOOPBACK_XFI_FAR = 13,
+	LOOPBACK_GPHY = 14,
+	LOOPBACK_PHYXS = 15,
+	LOOPBACK_PCS = 16,
+	LOOPBACK_PMAPMD = 17,
+	LOOPBACK_XPORT = 18,
+	LOOPBACK_XGMII_WS = 19,
+	LOOPBACK_XAUI_WS = 20,
+	LOOPBACK_XAUI_WS_FAR = 21,
+	LOOPBACK_XAUI_WS_NEAR = 22,
+	LOOPBACK_GMII_WS = 23,
+	LOOPBACK_XFI_WS = 24,
+	LOOPBACK_XFI_WS_FAR = 25,
+	LOOPBACK_PHYXS_WS = 26,
 	LOOPBACK_MAX
 };
-
 #define LOOPBACK_TEST_MAX LOOPBACK_PMAPMD
 
-extern const char *efx_loopback_mode_names[];
-#define LOOPBACK_MODE_NAME(mode)			\
-	STRING_TABLE_LOOKUP(mode, efx_loopback_mode)
-#define LOOPBACK_MODE(efx)				\
-	LOOPBACK_MODE_NAME(efx->loopback_mode)
-
 /* These loopbacks occur within the controller */
-#define LOOPBACKS_INTERNAL ((1 << LOOPBACK_GMAC) |     \
-			    (1 << LOOPBACK_XGMII)|     \
-			    (1 << LOOPBACK_XGXS) |     \
-			    (1 << LOOPBACK_XAUI))
+#define LOOPBACKS_INTERNAL ((1 << LOOPBACK_DATA) |		\
+			    (1 << LOOPBACK_GMAC) |		\
+			    (1 << LOOPBACK_XGMII)|		\
+			    (1 << LOOPBACK_XGXS) |		\
+			    (1 << LOOPBACK_XAUI) |		\
+			    (1 << LOOPBACK_GMII) |		\
+			    (1 << LOOPBACK_SGMII) |		\
+			    (1 << LOOPBACK_SGMII) |		\
+			    (1 << LOOPBACK_XGBR) |		\
+			    (1 << LOOPBACK_XFI) |		\
+			    (1 << LOOPBACK_XAUI_FAR) |		\
+			    (1 << LOOPBACK_GMII_FAR) |		\
+			    (1 << LOOPBACK_SGMII_FAR) |		\
+			    (1 << LOOPBACK_XFI_FAR) |		\
+			    (1 << LOOPBACK_XGMII_WS) |		\
+			    (1 << LOOPBACK_XAUI_WS) |		\
+			    (1 << LOOPBACK_XAUI_WS_FAR) |	\
+			    (1 << LOOPBACK_XAUI_WS_NEAR) |	\
+			    (1 << LOOPBACK_GMII_WS) |		\
+			    (1 << LOOPBACK_XFI_WS) |		\
+			    (1 << LOOPBACK_XFI_WS_FAR))
+
+#define LOOPBACKS_WS ((1 << LOOPBACK_XGMII_WS) |		\
+		      (1 << LOOPBACK_XAUI_WS) |			\
+		      (1 << LOOPBACK_XAUI_WS_FAR) |		\
+		      (1 << LOOPBACK_XAUI_WS_NEAR) |		\
+		      (1 << LOOPBACK_GMII_WS) |			\
+		      (1 << LOOPBACK_XFI_WS) |			\
+		      (1 << LOOPBACK_XFI_WS_FAR) |		\
+		      (1 << LOOPBACK_PHYXS_WS))
+
+#define LOOPBACKS_EXTERNAL(_efx)					\
+	((_efx)->loopback_modes & ~LOOPBACKS_INTERNAL &			\
+	 ~(1 << LOOPBACK_NONE))
 
 #define LOOPBACK_MASK(_efx)			\
 	(1 << (_efx)->loopback_mode)
@@ -58,6 +115,9 @@
 #define LOOPBACK_INTERNAL(_efx)				\
 	(!!(LOOPBACKS_INTERNAL & LOOPBACK_MASK(_efx)))
 
+#define LOOPBACK_EXTERNAL(_efx)				\
+	(!!(LOOPBACK_MASK(_efx) & LOOPBACKS_EXTERNAL(_efx)))
+
 #define LOOPBACK_CHANGED(_from, _to, _mask)				\
 	(!!((LOOPBACK_MASK(_from) ^ LOOPBACK_MASK(_to)) & (_mask)))
 
@@ -84,6 +144,7 @@
  * @RESET_TYPE_RX_DESC_FETCH: pcie error during rx descriptor fetch
  * @RESET_TYPE_TX_DESC_FETCH: pcie error during tx descriptor fetch
  * @RESET_TYPE_TX_SKIP: hardware completed empty tx descriptors
+ * @RESET_TYPE_MC_FAILURE: MC reboot/assertion
  */
 enum reset_type {
 	RESET_TYPE_NONE = -1,
@@ -98,6 +159,7 @@
 	RESET_TYPE_RX_DESC_FETCH,
 	RESET_TYPE_TX_DESC_FETCH,
 	RESET_TYPE_TX_SKIP,
+	RESET_TYPE_MC_FAILURE,
 	RESET_TYPE_MAX,
 };
 
--- linux-mvl-dove-2.6.32.orig/drivers/net/sfc/mcdi_pcol.h
+++ linux-mvl-dove-2.6.32/drivers/net/sfc/mcdi_pcol.h
@@ -0,0 +1,1580 @@
+/****************************************************************************
+ * Driver for Solarflare Solarstorm network controllers and boards
+ * Copyright 2009 Solarflare Communications Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation, incorporated herein by reference.
+ */
+
+
+#ifndef MCDI_PCOL_H
+#define MCDI_PCOL_H
+
+/* Values to be written into FMCR_CZ_RESET_STATE_REG to control boot. */
+/* Power-on reset state */
+#define MC_FW_STATE_POR (1)
+/* If this is set in MC_RESET_STATE_REG then it should be
+ * possible to jump into IMEM without loading code from flash. */
+#define MC_FW_WARM_BOOT_OK (2)
+/* The MC main image has started to boot. */
+#define MC_FW_STATE_BOOTING (4)
+/* The Scheduler has started. */
+#define MC_FW_STATE_SCHED (8)
+
+/* Values to be written to the per-port status dword in shared
+ * memory on reboot and assert */
+#define MC_STATUS_DWORD_REBOOT (0xb007b007)
+#define MC_STATUS_DWORD_ASSERT (0xdeaddead)
+
+/* The current version of the MCDI protocol.
+ *
+ * Note that the ROM burnt into the card only talks V0, so at the very
+ * least every driver must support version 0 and MCDI_PCOL_VERSION
+ */
+#define MCDI_PCOL_VERSION 1
+
+/**
+ * MCDI version 1
+ *
+ * Each MCDI request starts with an MCDI_HEADER, which is a 32byte
+ * structure, filled in by the client.
+ *
+ *       0       7  8     16    20     22  23  24    31
+ *      | CODE | R | LEN | SEQ | Rsvd | E | R | XFLAGS |
+ *               |                      |   |
+ *               |                      |   \--- Response
+ *               |                      \------- Error
+ *               \------------------------------ Resync (always set)
+ *
+ * The client writes it's request into MC shared memory, and rings the
+ * doorbell. Each request is completed by either by the MC writting
+ * back into shared memory, or by writting out an event.
+ *
+ * All MCDI commands support completion by shared memory response. Each
+ * request may also contain additional data (accounted for by HEADER.LEN),
+ * and some response's may also contain additional data (again, accounted
+ * for by HEADER.LEN).
+ *
+ * Some MCDI commands support completion by event, in which any associated
+ * response data is included in the event.
+ *
+ * The protocol requires one response to be delivered for every request, a
+ * request should not be sent unless the response for the previous request
+ * has been received (either by polling shared memory, or by receiving
+ * an event).
+ */
+
+/** Request/Response structure */
+#define MCDI_HEADER_OFST 0
+#define MCDI_HEADER_CODE_LBN 0
+#define MCDI_HEADER_CODE_WIDTH 7
+#define MCDI_HEADER_RESYNC_LBN 7
+#define MCDI_HEADER_RESYNC_WIDTH 1
+#define MCDI_HEADER_DATALEN_LBN 8
+#define MCDI_HEADER_DATALEN_WIDTH 8
+#define MCDI_HEADER_SEQ_LBN 16
+#define MCDI_HEADER_RSVD_LBN 20
+#define MCDI_HEADER_RSVD_WIDTH 2
+#define MCDI_HEADER_SEQ_WIDTH 4
+#define MCDI_HEADER_ERROR_LBN 22
+#define MCDI_HEADER_ERROR_WIDTH 1
+#define MCDI_HEADER_RESPONSE_LBN 23
+#define MCDI_HEADER_RESPONSE_WIDTH 1
+#define MCDI_HEADER_XFLAGS_LBN 24
+#define MCDI_HEADER_XFLAGS_WIDTH 8
+/* Request response using event */
+#define MCDI_HEADER_XFLAGS_EVREQ 0x01
+
+/* Maximum number of payload bytes */
+#define MCDI_CTL_SDU_LEN_MAX 0xfc
+
+/* The MC can generate events for two reasons:
+ *   - To complete a shared memory request if XFLAGS_EVREQ was set
+ *   - As a notification (link state, i2c event), controlled
+ *     via MC_CMD_LOG_CTRL
+ *
+ * Both events share a common structure:
+ *
+ *  0      32     33      36    44     52     60
+ * | Data | Cont | Level | Src | Code | Rsvd |
+ *           |
+ *           \ There is another event pending in this notification
+ *
+ * If Code==CMDDONE, then the fields are further interpreted as:
+ *
+ *   - LEVEL==INFO    Command succeded
+ *   - LEVEL==ERR     Command failed
+ *
+ *    0     8         16      24     32
+ *   | Seq | Datalen | Errno | Rsvd |
+ *
+ *   These fields are taken directly out of the standard MCDI header, i.e.,
+ *   LEVEL==ERR, Datalen == 0 => Reboot
+ *
+ * Events can be squirted out of the UART (using LOG_CTRL) without a
+ * MCDI header.  An event can be distinguished from a MCDI response by
+ * examining the first byte which is 0xc0.  This corresponds to the
+ * non-existent MCDI command MC_CMD_DEBUG_LOG.
+ *
+ *      0         7        8
+ *     | command | Resync |     = 0xc0
+ *
+ * Since the event is written in big-endian byte order, this works
+ * providing bits 56-63 of the event are 0xc0.
+ *
+ *      56     60  63
+ *     | Rsvd | Code |    = 0xc0
+ *
+ * Which means for convenience the event code is 0xc for all MC
+ * generated events.
+ */
+#define FSE_AZ_EV_CODE_MCDI_EVRESPONSE 0xc
+
+#define MCDI_EVENT_DATA_LBN 0
+#define MCDI_EVENT_DATA_WIDTH 32
+#define MCDI_EVENT_CONT_LBN 32
+#define MCDI_EVENT_CONT_WIDTH 1
+#define MCDI_EVENT_LEVEL_LBN 33
+#define MCDI_EVENT_LEVEL_WIDTH 3
+#define MCDI_EVENT_LEVEL_INFO (0)
+#define MCDI_EVENT_LEVEL_WARN (1)
+#define MCDI_EVENT_LEVEL_ERR (2)
+#define MCDI_EVENT_LEVEL_FATAL (3)
+#define MCDI_EVENT_SRC_LBN 36
+#define MCDI_EVENT_SRC_WIDTH 8
+#define MCDI_EVENT_CODE_LBN 44
+#define MCDI_EVENT_CODE_WIDTH 8
+#define MCDI_EVENT_CODE_BADSSERT (1)
+#define MCDI_EVENT_CODE_PMNOTICE (2)
+#define MCDI_EVENT_CODE_CMDDONE (3)
+#define  MCDI_EVENT_CMDDONE_SEQ_LBN 0
+#define  MCDI_EVENT_CMDDONE_SEQ_WIDTH 8
+#define  MCDI_EVENT_CMDDONE_DATALEN_LBN 8
+#define  MCDI_EVENT_CMDDONE_DATALEN_WIDTH 8
+#define  MCDI_EVENT_CMDDONE_ERRNO_LBN 16
+#define  MCDI_EVENT_CMDDONE_ERRNO_WIDTH 8
+#define MCDI_EVENT_CODE_LINKCHANGE (4)
+#define  MCDI_EVENT_LINKCHANGE_LP_CAP_LBN 0
+#define  MCDI_EVENT_LINKCHANGE_LP_CAP_WIDTH 16
+#define  MCDI_EVENT_LINKCHANGE_SPEED_LBN 16
+#define  MCDI_EVENT_LINKCHANGE_SPEED_WIDTH 4
+#define  MCDI_EVENT_LINKCHANGE_SPEED_100M 1
+#define  MCDI_EVENT_LINKCHANGE_SPEED_1G 2
+#define  MCDI_EVENT_LINKCHANGE_SPEED_10G 3
+#define  MCDI_EVENT_LINKCHANGE_FCNTL_LBN 20
+#define  MCDI_EVENT_LINKCHANGE_FCNTL_WIDTH 4
+#define  MCDI_EVENT_LINKCHANGE_LINK_FLAGS_LBN 24
+#define  MCDI_EVENT_LINKCHANGE_LINK_FLAGS_WIDTH 8
+#define MCDI_EVENT_CODE_SENSOREVT (5)
+#define  MCDI_EVENT_SENSOREVT_MONITOR_LBN 0
+#define  MCDI_EVENT_SENSOREVT_MONITOR_WIDTH 8
+#define  MCDI_EVENT_SENSOREVT_STATE_LBN 8
+#define  MCDI_EVENT_SENSOREVT_STATE_WIDTH 8
+#define  MCDI_EVENT_SENSOREVT_VALUE_LBN 16
+#define  MCDI_EVENT_SENSOREVT_VALUE_WIDTH 16
+#define MCDI_EVENT_CODE_SCHEDERR (6)
+#define MCDI_EVENT_CODE_REBOOT (7)
+#define MCDI_EVENT_CODE_MAC_STATS_DMA (8)
+#define  MCDI_EVENT_MAC_STATS_DMA_GENERATION_LBN 0
+#define  MCDI_EVENT_MAC_STATS_DMA_GENERATION_WIDTH 32
+
+/* Non-existent command target */
+#define MC_CMD_ERR_ENOENT 2
+/* assert() has killed the MC */
+#define MC_CMD_ERR_EINTR 4
+/* Caller does not hold required locks */
+#define MC_CMD_ERR_EACCES 13
+/* Resource is currently unavailable (e.g. lock contention) */
+#define MC_CMD_ERR_EBUSY 16
+/* Invalid argument to target */
+#define MC_CMD_ERR_EINVAL 22
+/* Non-recursive resource is already acquired */
+#define MC_CMD_ERR_EDEADLK 35
+/* Operation not implemented */
+#define MC_CMD_ERR_ENOSYS 38
+/* Operation timed out */
+#define MC_CMD_ERR_ETIME 62
+
+#define MC_CMD_ERR_CODE_OFST 0
+
+
+/* MC_CMD_READ32: (debug, variadic out)
+ * Read multiple 32byte words from MC memory
+ */
+#define MC_CMD_READ32 0x01
+#define MC_CMD_READ32_IN_LEN 8
+#define MC_CMD_READ32_IN_ADDR_OFST 0
+#define MC_CMD_READ32_IN_NUMWORDS_OFST 4
+#define MC_CMD_READ32_OUT_LEN(_numwords) \
+	(4 * (_numwords))
+#define MC_CMD_READ32_OUT_BUFFER_OFST 0
+
+/* MC_CMD_WRITE32: (debug, variadic in)
+ * Write multiple 32byte words to MC memory
+ */
+#define MC_CMD_WRITE32 0x02
+#define MC_CMD_WRITE32_IN_LEN(_numwords) (((_numwords) * 4) + 4)
+#define MC_CMD_WRITE32_IN_ADDR_OFST 0
+#define MC_CMD_WRITE32_IN_BUFFER_OFST 4
+#define MC_CMD_WRITE32_OUT_LEN 0
+
+/* MC_CMD_COPYCODE: (debug)
+ * Copy MC code between two locations and jump
+ */
+#define MC_CMD_COPYCODE 0x03
+#define MC_CMD_COPYCODE_IN_LEN 16
+#define MC_CMD_COPYCODE_IN_SRC_ADDR_OFST 0
+#define MC_CMD_COPYCODE_IN_DEST_ADDR_OFST 4
+#define MC_CMD_COPYCODE_IN_NUMWORDS_OFST 8
+#define MC_CMD_COPYCODE_IN_JUMP_OFST 12
+/* Control should return to the caller rather than jumping */
+#define MC_CMD_COPYCODE_JUMP_NONE 1
+#define MC_CMD_COPYCODE_OUT_LEN 0
+
+/* MC_CMD_SET_FUNC: (debug)
+ * Select function for function-specific commands.
+ */
+#define MC_CMD_SET_FUNC 0x04
+#define MC_CMD_SET_FUNC_IN_LEN 4
+#define MC_CMD_SET_FUNC_IN_FUNC_OFST 0
+#define MC_CMD_SET_FUNC_OUT_LEN 0
+
+/* MC_CMD_GET_BOOT_STATUS:
+ * Get the instruction address from which the MC booted.
+ */
+#define MC_CMD_GET_BOOT_STATUS 0x05
+#define MC_CMD_GET_BOOT_STATUS_IN_LEN 0
+#define MC_CMD_GET_BOOT_STATUS_OUT_LEN 8
+#define MC_CMD_GET_BOOT_STATUS_OUT_BOOT_OFFSET_OFST 0
+#define MC_CMD_GET_BOOT_STATUS_OUT_FLAGS_OFST 4
+/* Reboot caused by watchdog */
+#define MC_CMD_GET_BOOT_STATUS_FLAGS_WATCHDOG_LBN   (0)
+#define MC_CMD_GET_BOOT_STATUS_FLAGS_WATCHDOG_WIDTH (1)
+/* MC booted from primary flash partition */
+#define MC_CMD_GET_BOOT_STATUS_FLAGS_PRIMARY_LBN    (1)
+#define MC_CMD_GET_BOOT_STATUS_FLAGS_PRIMARY_WIDTH  (1)
+/* MC booted from backup flash partition */
+#define MC_CMD_GET_BOOT_STATUS_FLAGS_BACKUP_LBN     (2)
+#define MC_CMD_GET_BOOT_STATUS_FLAGS_BACKUP_WIDTH   (1)
+
+/* MC_CMD_GET_ASSERTS: (debug, variadic out)
+ * Get (and optionally clear) the current assertion status.
+ *
+ * Only OUT.GLOBAL_FLAGS is guaranteed to exist in the completion
+ * payload. The other fields will only be present if
+ * OUT.GLOBAL_FLAGS != NO_FAILS
+ */
+#define MC_CMD_GET_ASSERTS 0x06
+#define MC_CMD_GET_ASSERTS_IN_LEN 4
+#define MC_CMD_GET_ASSERTS_IN_CLEAR_OFST 0
+#define MC_CMD_GET_ASSERTS_OUT_LEN 140
+/* Assertion status flag */
+#define MC_CMD_GET_ASSERTS_OUT_GLOBAL_FLAGS_OFST 0
+/*! No assertions have failed. */
+#define MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS 1
+/*! A system-level assertion has failed. */
+#define MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL 2
+/*! A thread-level assertion has failed. */
+#define MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL 3
+/*! The system was reset by the watchdog. */
+#define MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED 4
+/* Failing PC value */
+#define MC_CMD_GET_ASSERTS_OUT_SAVED_PC_OFFS_OFST 4
+/* Saved GP regs */
+#define MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_OFST 8
+#define MC_CMD_GET_ASSERTS_OUT_GP_REGS_LEN 124
+/* Failing thread address */
+#define MC_CMD_GET_ASSERTS_OUT_THREAD_OFFS_OFST 132
+
+/* MC_CMD_LOG_CTRL:
+ * Determine the output stream for various events and messages
+ */
+#define MC_CMD_LOG_CTRL 0x07
+#define MC_CMD_LOG_CTRL_IN_LEN 8
+#define MC_CMD_LOG_CTRL_IN_LOG_DEST_OFST 0
+#define MC_CMD_LOG_CTRL_IN_LOG_DEST_UART (1)
+#define MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ (2)
+#define MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ_OFST 4
+#define MC_CMD_LOG_CTRL_OUT_LEN 0
+
+/* MC_CMD_GET_VERSION:
+ * Get version information about the MC firmware
+ */
+#define MC_CMD_GET_VERSION 0x08
+#define MC_CMD_GET_VERSION_IN_LEN 0
+#define MC_CMD_GET_VERSION_V0_OUT_LEN 4
+#define MC_CMD_GET_VERSION_V1_OUT_LEN 32
+#define MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0
+/* Reserved version number to indicate "any" version. */
+#define MC_CMD_GET_VERSION_OUT_FIRMWARE_ANY 0xffffffff
+/* The version response of a boot ROM awaiting rescue */
+#define MC_CMD_GET_VERSION_OUT_FIRMWARE_BOOTROM 0xb0070000
+#define MC_CMD_GET_VERSION_V1_OUT_PCOL_OFST 4
+/* 128bit mask of functions supported by the current firmware */
+#define MC_CMD_GET_VERSION_V1_OUT_SUPPORTED_FUNCS_OFST 8
+/* The command set exported by the boot ROM (MCDI v0) */
+#define MC_CMD_GET_VERSION_V0_SUPPORTED_FUNCS {		\
+	(1 << MC_CMD_READ32)	|			\
+	(1 << MC_CMD_WRITE32)	|			\
+	(1 << MC_CMD_COPYCODE)	|			\
+	(1 << MC_CMD_GET_VERSION),			\
+	0, 0, 0 }
+#define MC_CMD_GET_VERSION_OUT_VERSION_OFST 24
+
+/* Vectors in the boot ROM */
+/* Point to the copycode entry point. */
+#define MC_BOOTROM_COPYCODE_VEC (0x7f4)
+/* Points to the recovery mode entry point. */
+#define MC_BOOTROM_NOFLASH_VEC (0x7f8)
+
+/* Test execution limits */
+#define MC_TESTEXEC_VARIANT_COUNT 16
+#define MC_TESTEXEC_RESULT_COUNT 7
+
+/* MC_CMD_SET_TESTVARS: (debug, variadic in)
+ * Write variant words for test.
+ *
+ * The user supplies a bitmap of the variants they wish to set.
+ * They must ensure that IN.LEN >= 4 + 4 * ffs(BITMAP)
+ */
+#define MC_CMD_SET_TESTVARS 0x09
+#define MC_CMD_SET_TESTVARS_IN_LEN(_numwords)	\
+  (4 + 4*(_numwords))
+#define MC_CMD_SET_TESTVARS_IN_ARGS_BITMAP_OFST 0
+/* Up to MC_TESTEXEC_VARIANT_COUNT of 32byte words start here */
+#define MC_CMD_SET_TESTVARS_IN_ARGS_BUFFER_OFST 4
+#define MC_CMD_SET_TESTVARS_OUT_LEN 0
+
+/* MC_CMD_GET_TESTRCS: (debug, variadic out)
+ * Return result words from test.
+ */
+#define MC_CMD_GET_TESTRCS 0x0a
+#define MC_CMD_GET_TESTRCS_IN_LEN 4
+#define MC_CMD_GET_TESTRCS_IN_NUMWORDS_OFST 0
+#define MC_CMD_GET_TESTRCS_OUT_LEN(_numwords) \
+	(4 * (_numwords))
+#define MC_CMD_GET_TESTRCS_OUT_BUFFER_OFST 0
+
+/* MC_CMD_RUN_TEST: (debug)
+ * Run the test exported by this firmware image
+ */
+#define MC_CMD_RUN_TEST 0x0b
+#define MC_CMD_RUN_TEST_IN_LEN 0
+#define MC_CMD_RUN_TEST_OUT_LEN 0
+
+/* MC_CMD_CSR_READ32: (debug, variadic out)
+ * Read 32bit words from the indirect memory map
+ */
+#define MC_CMD_CSR_READ32 0x0c
+#define MC_CMD_CSR_READ32_IN_LEN 12
+#define MC_CMD_CSR_READ32_IN_ADDR_OFST 0
+#define MC_CMD_CSR_READ32_IN_STEP_OFST 4
+#define MC_CMD_CSR_READ32_IN_NUMWORDS_OFST 8
+#define MC_CMD_CSR_READ32_OUT_LEN(_numwords)	\
+	(((_numwords) * 4) + 4)
+/* IN.NUMWORDS of 32bit words start here */
+#define MC_CMD_CSR_READ32_OUT_BUFFER_OFST 0
+#define MC_CMD_CSR_READ32_OUT_IREG_STATUS_OFST(_numwords)	\
+	((_numwords) * 4)
+
+/* MC_CMD_CSR_WRITE32: (debug, variadic in)
+ * Write 32bit dwords to the indirect memory map
+ */
+#define MC_CMD_CSR_WRITE32 0x0d
+#define MC_CMD_CSR_WRITE32_IN_LEN(_numwords)	\
+	(((_numwords) * 4) + 8)
+#define MC_CMD_CSR_WRITE32_IN_ADDR_OFST 0
+#define MC_CMD_CSR_WRITE32_IN_STEP_OFST 4
+/* Multiple 32bit words of data to write start here */
+#define MC_CMD_CSR_WRITE32_IN_BUFFER_OFST 8
+#define MC_CMD_CSR_WRITE32_OUT_LEN 4
+#define MC_CMD_CSR_WRITE32_OUT_STATUS_OFST 0
+
+/* MC_CMD_JTAG_WORK: (debug, fpga only)
+ * Process JTAG work buffer for RBF acceleration.
+ *
+ *  Host: bit count, (up to) 32 words of data to clock out to JTAG
+ *   (bits 1,0=TMS,TDO for first bit; bits 3,2=TMS,TDO for second bit, etc.)
+ *  MC: bit count, (up to) 32 words of data clocked in from JTAG
+ *   (bit 0=TDI for first bit, bit 1=TDI for second bit, etc.; [31:16] unused)
+ */
+#define MC_CMD_JTAG_WORK 0x0e
+
+/* MC_CMD_STACKINFO: (debug, variadic out)
+ * Get stack information
+ *
+ * Host: nothing
+ * MC: (thread ptr, stack size, free space) for each thread in system
+ */
+#define MC_CMD_STACKINFO 0x0f
+
+/* MC_CMD_MDIO_READ:
+ * MDIO register read
+ */
+#define MC_CMD_MDIO_READ 0x10
+#define MC_CMD_MDIO_READ_IN_LEN 16
+#define MC_CMD_MDIO_READ_IN_BUS_OFST 0
+#define MC_CMD_MDIO_READ_IN_PRTAD_OFST 4
+#define MC_CMD_MDIO_READ_IN_DEVAD_OFST 8
+#define MC_CMD_MDIO_READ_IN_ADDR_OFST 12
+#define MC_CMD_MDIO_READ_OUT_LEN 8
+#define MC_CMD_MDIO_READ_OUT_VALUE_OFST 0
+#define MC_CMD_MDIO_READ_OUT_STATUS_OFST 4
+
+/* MC_CMD_MDIO_WRITE:
+ * MDIO register write
+ */
+#define MC_CMD_MDIO_WRITE 0x11
+#define MC_CMD_MDIO_WRITE_IN_LEN 20
+#define MC_CMD_MDIO_WRITE_IN_BUS_OFST 0
+#define MC_CMD_MDIO_WRITE_IN_PRTAD_OFST 4
+#define MC_CMD_MDIO_WRITE_IN_DEVAD_OFST 8
+#define MC_CMD_MDIO_WRITE_IN_ADDR_OFST 12
+#define MC_CMD_MDIO_WRITE_IN_VALUE_OFST 16
+#define MC_CMD_MDIO_WRITE_OUT_LEN 4
+#define MC_CMD_MDIO_WRITE_OUT_STATUS_OFST 0
+
+/* By default all the MCDI MDIO operations perform clause45 mode.
+ * If you want to use clause22 then set DEVAD = MC_CMD_MDIO_CLAUSE22.
+ */
+#define MC_CMD_MDIO_CLAUSE22 32
+
+/* There are two MDIO buses: one for the internal PHY, and one for external
+ * devices.
+ */
+#define MC_CMD_MDIO_BUS_INTERNAL 0
+#define MC_CMD_MDIO_BUS_EXTERNAL 1
+
+/* The MDIO commands return the raw status bits from the MDIO block.  A "good"
+ * transaction should have the DONE bit set and all other bits clear.
+ */
+#define MC_CMD_MDIO_STATUS_GOOD 0x08
+
+
+/* MC_CMD_DBI_WRITE: (debug)
+ * Write DBI register(s)
+ *
+ * Host: address, byte-enables (and VF selection, and cs2 flag),
+ *       value [,address ...]
+ * MC: nothing
+ */
+#define MC_CMD_DBI_WRITE 0x12
+#define MC_CMD_DBI_WRITE_IN_LEN(_numwords)		\
+	(12 * (_numwords))
+#define MC_CMD_DBI_WRITE_IN_ADDRESS_OFST(_word)		\
+	(((_word) * 12) + 0)
+#define MC_CMD_DBI_WRITE_IN_BYTE_MASK_OFST(_word)	\
+	(((_word) * 12) + 4)
+#define MC_CMD_DBI_WRITE_IN_VALUE_OFST(_word)		\
+	(((_word) * 12) + 8)
+#define MC_CMD_DBI_WRITE_OUT_LEN 0
+
+/* MC_CMD_DBI_READ: (debug)
+ * Read DBI register(s)
+ *
+ * Host: address, [,address ...]
+ * MC: value [,value ...]
+ * (note: this does not support reading from VFs, but is retained for backwards
+ * compatibility; see MC_CMD_DBI_READX below)
+ */
+#define MC_CMD_DBI_READ 0x13
+#define MC_CMD_DBI_READ_IN_LEN(_numwords)		\
+	(4 * (_numwords))
+#define MC_CMD_DBI_READ_OUT_LEN(_numwords)		\
+	(4 * (_numwords))
+
+/* MC_CMD_PORT_READ32: (debug)
+ * Read a 32-bit register from the indirect port register map.
+ *
+ * The port to access is implied by the Shared memory channel used.
+ */
+#define MC_CMD_PORT_READ32 0x14
+#define MC_CMD_PORT_READ32_IN_LEN 4
+#define MC_CMD_PORT_READ32_IN_ADDR_OFST 0
+#define MC_CMD_PORT_READ32_OUT_LEN 8
+#define MC_CMD_PORT_READ32_OUT_VALUE_OFST 0
+#define MC_CMD_PORT_READ32_OUT_STATUS_OFST 4
+
+/* MC_CMD_PORT_WRITE32: (debug)
+ * Write a 32-bit register to the indirect port register map.
+ *
+ * The port to access is implied by the Shared memory channel used.
+ */
+#define MC_CMD_PORT_WRITE32 0x15
+#define MC_CMD_PORT_WRITE32_IN_LEN 8
+#define MC_CMD_PORT_WRITE32_IN_ADDR_OFST 0
+#define MC_CMD_PORT_WRITE32_IN_VALUE_OFST 4
+#define MC_CMD_PORT_WRITE32_OUT_LEN 4
+#define MC_CMD_PORT_WRITE32_OUT_STATUS_OFST 0
+
+/* MC_CMD_PORT_READ128: (debug)
+ * Read a 128-bit register from indirect port register map
+ *
+ * The port to access is implied by the Shared memory channel used.
+ */
+#define MC_CMD_PORT_READ128 0x16
+#define MC_CMD_PORT_READ128_IN_LEN 4
+#define MC_CMD_PORT_READ128_IN_ADDR_OFST 0
+#define MC_CMD_PORT_READ128_OUT_LEN 20
+#define MC_CMD_PORT_READ128_OUT_VALUE_OFST 0
+#define MC_CMD_PORT_READ128_OUT_STATUS_OFST 16
+
+/* MC_CMD_PORT_WRITE128: (debug)
+ * Write a 128-bit register to indirect port register map.
+ *
+ * The port to access is implied by the Shared memory channel used.
+ */
+#define MC_CMD_PORT_WRITE128 0x17
+#define MC_CMD_PORT_WRITE128_IN_LEN 20
+#define MC_CMD_PORT_WRITE128_IN_ADDR_OFST 0
+#define MC_CMD_PORT_WRITE128_IN_VALUE_OFST 4
+#define MC_CMD_PORT_WRITE128_OUT_LEN 4
+#define MC_CMD_PORT_WRITE128_OUT_STATUS_OFST 0
+
+/* MC_CMD_GET_BOARD_CFG:
+ * Returns the MC firmware configuration structure
+ *
+ * The FW_SUBTYPE_LIST contains a 16-bit value for each of the 12 types of
+ * NVRAM area.  The values are defined in the firmware/mc/platform/<xxx>.c file
+ * for a specific board type, but otherwise have no meaning to the MC; they
+ * are used by the driver to manage selection of appropriate firmware updates.
+ */
+#define MC_CMD_GET_BOARD_CFG 0x18
+#define MC_CMD_GET_BOARD_CFG_IN_LEN 0
+#define MC_CMD_GET_BOARD_CFG_OUT_LEN 96
+#define MC_CMD_GET_BOARD_CFG_OUT_BOARD_TYPE_OFST 0
+#define MC_CMD_GET_BOARD_CFG_OUT_BOARD_NAME_OFST 4
+#define MC_CMD_GET_BOARD_CFG_OUT_BOARD_NAME_LEN 32
+#define MC_CMD_GET_BOARD_CFG_OUT_CAPABILITIES_PORT0_OFST 36
+#define MC_CMD_GET_BOARD_CFG_OUT_CAPABILITIES_PORT1_OFST 40
+#define MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0_OFST 44
+#define MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0_LEN 6
+#define MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1_OFST 50
+#define MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1_LEN 6
+#define MC_CMD_GET_BOARD_CFG_OUT_MAC_COUNT_PORT0_OFST 56
+#define MC_CMD_GET_BOARD_CFG_OUT_MAC_COUNT_PORT1_OFST 60
+#define MC_CMD_GET_BOARD_CFG_OUT_MAC_STRIDE_PORT0_OFST 64
+#define MC_CMD_GET_BOARD_CFG_OUT_MAC_STRIDE_PORT1_OFST 68
+#define MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_OFST 72
+#define MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_LEN 24
+
+/* MC_CMD_DBI_READX: (debug)
+ * Read DBI register(s) -- extended functionality
+ *
+ * Host: vf selection, address, [,vf selection ...]
+ * MC: value [,value ...]
+ */
+#define MC_CMD_DBI_READX 0x19
+#define MC_CMD_DBI_READX_IN_LEN(_numwords)	\
+  (8*(_numwords))
+#define MC_CMD_DBI_READX_OUT_LEN(_numwords)	\
+  (4*(_numwords))
+
+/* MC_CMD_SET_RAND_SEED:
+ * Set the 16byte seed for the MC psuedo-random generator
+ */
+#define MC_CMD_SET_RAND_SEED 0x1a
+#define MC_CMD_SET_RAND_SEED_IN_LEN 16
+#define MC_CMD_SET_RAND_SEED_IN_SEED_OFST 0
+#define MC_CMD_SET_RAND_SEED_OUT_LEN 0
+
+/* MC_CMD_LTSSM_HIST: (debug)
+ * Retrieve the history of the LTSSM, if the build supports it.
+ *
+ * Host: nothing
+ * MC: variable number of LTSSM values, as bytes
+ * The history is read-to-clear.
+ */
+#define MC_CMD_LTSSM_HIST 0x1b
+
+/* MC_CMD_DRV_ATTACH:
+ * Inform MCPU that this port is managed on the host (i.e. driver active)
+ */
+#define MC_CMD_DRV_ATTACH 0x1c
+#define MC_CMD_DRV_ATTACH_IN_LEN 8
+#define MC_CMD_DRV_ATTACH_IN_NEW_STATE_OFST 0
+#define MC_CMD_DRV_ATTACH_IN_UPDATE_OFST 4
+#define MC_CMD_DRV_ATTACH_OUT_LEN 4
+#define MC_CMD_DRV_ATTACH_OUT_OLD_STATE_OFST 0
+
+/* MC_CMD_NCSI_PROD: (debug)
+ * Trigger an NC-SI event (and possibly an AEN in response)
+ */
+#define MC_CMD_NCSI_PROD 0x1d
+#define MC_CMD_NCSI_PROD_IN_LEN 4
+#define MC_CMD_NCSI_PROD_IN_EVENTS_OFST 0
+#define MC_CMD_NCSI_PROD_LINKCHANGE_LBN 0
+#define MC_CMD_NCSI_PROD_LINKCHANGE_WIDTH 1
+#define MC_CMD_NCSI_PROD_RESET_LBN 1
+#define MC_CMD_NCSI_PROD_RESET_WIDTH 1
+#define MC_CMD_NCSI_PROD_DRVATTACH_LBN 2
+#define MC_CMD_NCSI_PROD_DRVATTACH_WIDTH 1
+#define MC_CMD_NCSI_PROD_OUT_LEN 0
+
+/* Enumeration */
+#define MC_CMD_NCSI_PROD_LINKCHANGE 0
+#define MC_CMD_NCSI_PROD_RESET 1
+#define MC_CMD_NCSI_PROD_DRVATTACH 2
+
+/* MC_CMD_DEVEL: (debug)
+ * Reserved for development
+ */
+#define MC_CMD_DEVEL 0x1e
+
+/* MC_CMD_SHMUART: (debug)
+ * Route UART output to circular buffer in shared memory instead.
+ */
+#define MC_CMD_SHMUART 0x1f
+#define MC_CMD_SHMUART_IN_FLAG_OFST 0
+#define MC_CMD_SHMUART_IN_LEN 4
+#define MC_CMD_SHMUART_OUT_LEN 0
+
+/* MC_CMD_PORT_RESET:
+ * Generic per-port reset. There is no equivalent for per-board reset.
+ *
+ * Locks required: None
+ * Return code: 0, ETIME
+ */
+#define MC_CMD_PORT_RESET 0x20
+#define MC_CMD_PORT_RESET_IN_LEN 0
+#define MC_CMD_PORT_RESET_OUT_LEN 0
+
+/* MC_CMD_RESOURCE_LOCK:
+ * Generic resource lock/unlock interface.
+ *
+ * Locks required: None
+ * Return code: 0,
+ *              EBUSY (if trylock is contended by other port),
+ *              EDEADLK (if trylock is already acquired by this port)
+ *              EINVAL (if unlock doesn't own the lock)
+ */
+#define MC_CMD_RESOURCE_LOCK 0x21
+#define MC_CMD_RESOURCE_LOCK_IN_LEN 8
+#define MC_CMD_RESOURCE_LOCK_IN_ACTION_OFST 0
+#define MC_CMD_RESOURCE_LOCK_ACTION_TRYLOCK 1
+#define MC_CMD_RESOURCE_LOCK_ACTION_UNLOCK 0
+#define MC_CMD_RESOURCE_LOCK_IN_RESOURCE_OFST 4
+#define MC_CMD_RESOURCE_LOCK_I2C 2
+#define MC_CMD_RESOURCE_LOCK_PHY 3
+#define MC_CMD_RESOURCE_LOCK_OUT_LEN 0
+
+/* MC_CMD_SPI_COMMAND: (variadic in, variadic out)
+ * Read/Write to/from the SPI device.
+ *
+ * Locks required: SPI_LOCK
+ * Return code: 0, ETIME, EINVAL, EACCES (if SPI_LOCK is not held)
+ */
+#define MC_CMD_SPI_COMMAND 0x22
+#define MC_CMD_SPI_COMMAND_IN_LEN(_write_bytes)	(12 + (_write_bytes))
+#define MC_CMD_SPI_COMMAND_IN_ARGS_OFST 0
+#define MC_CMD_SPI_COMMAND_IN_ARGS_ADDRESS_OFST 0
+#define MC_CMD_SPI_COMMAND_IN_ARGS_READ_BYTES_OFST 4
+#define MC_CMD_SPI_COMMAND_IN_ARGS_CHIP_SELECT_OFST 8
+/* Data to write here */
+#define MC_CMD_SPI_COMMAND_IN_WRITE_BUFFER_OFST 12
+#define MC_CMD_SPI_COMMAND_OUT_LEN(_read_bytes) (_read_bytes)
+/* Data read here */
+#define MC_CMD_SPI_COMMAND_OUT_READ_BUFFER_OFST 0
+
+/* MC_CMD_I2C_READ_WRITE: (variadic in, variadic out)
+ * Read/Write to/from the I2C bus.
+ *
+ * Locks required: I2C_LOCK
+ * Return code: 0, ETIME, EINVAL, EACCES (if I2C_LOCK is not held)
+ */
+#define MC_CMD_I2C_RW 0x23
+#define MC_CMD_I2C_RW_IN_LEN(_write_bytes) (8 + (_write_bytes))
+#define MC_CMD_I2C_RW_IN_ARGS_OFST 0
+#define MC_CMD_I2C_RW_IN_ARGS_ADDR_OFST 0
+#define MC_CMD_I2C_RW_IN_ARGS_READ_BYTES_OFST 4
+/* Data to write here */
+#define MC_CMD_I2C_RW_IN_WRITE_BUFFER_OFSET 8
+#define MC_CMD_I2C_RW_OUT_LEN(_read_bytes) (_read_bytes)
+/* Data read here */
+#define MC_CMD_I2C_RW_OUT_READ_BUFFER_OFST 0
+
+/* Generic phy capability bitmask */
+#define MC_CMD_PHY_CAP_10HDX_LBN 1
+#define MC_CMD_PHY_CAP_10HDX_WIDTH 1
+#define MC_CMD_PHY_CAP_10FDX_LBN 2
+#define MC_CMD_PHY_CAP_10FDX_WIDTH 1
+#define MC_CMD_PHY_CAP_100HDX_LBN 3
+#define MC_CMD_PHY_CAP_100HDX_WIDTH 1
+#define MC_CMD_PHY_CAP_100FDX_LBN 4
+#define MC_CMD_PHY_CAP_100FDX_WIDTH 1
+#define MC_CMD_PHY_CAP_1000HDX_LBN 5
+#define MC_CMD_PHY_CAP_1000HDX_WIDTH 1
+#define MC_CMD_PHY_CAP_1000FDX_LBN 6
+#define MC_CMD_PHY_CAP_1000FDX_WIDTH 1
+#define MC_CMD_PHY_CAP_10000FDX_LBN 7
+#define MC_CMD_PHY_CAP_10000FDX_WIDTH 1
+#define MC_CMD_PHY_CAP_PAUSE_LBN 8
+#define MC_CMD_PHY_CAP_PAUSE_WIDTH 1
+#define MC_CMD_PHY_CAP_ASYM_LBN 9
+#define MC_CMD_PHY_CAP_ASYM_WIDTH 1
+#define MC_CMD_PHY_CAP_AN_LBN 10
+#define MC_CMD_PHY_CAP_AN_WIDTH 1
+
+/* Generic loopback enumeration */
+#define MC_CMD_LOOPBACK_NONE 0
+#define MC_CMD_LOOPBACK_DATA 1
+#define MC_CMD_LOOPBACK_GMAC 2
+#define MC_CMD_LOOPBACK_XGMII 3
+#define MC_CMD_LOOPBACK_XGXS 4
+#define MC_CMD_LOOPBACK_XAUI 5
+#define MC_CMD_LOOPBACK_GMII 6
+#define MC_CMD_LOOPBACK_SGMII 7
+#define MC_CMD_LOOPBACK_XGBR 8
+#define MC_CMD_LOOPBACK_XFI 9
+#define MC_CMD_LOOPBACK_XAUI_FAR 10
+#define MC_CMD_LOOPBACK_GMII_FAR 11
+#define MC_CMD_LOOPBACK_SGMII_FAR 12
+#define MC_CMD_LOOPBACK_XFI_FAR 13
+#define MC_CMD_LOOPBACK_GPHY 14
+#define MC_CMD_LOOPBACK_PHYXS 15
+#define MC_CMD_LOOPBACK_PCS 16
+#define MC_CMD_LOOPBACK_PMAPMD 17
+#define MC_CMD_LOOPBACK_XPORT 18
+#define MC_CMD_LOOPBACK_XGMII_WS 19
+#define MC_CMD_LOOPBACK_XAUI_WS 20
+#define MC_CMD_LOOPBACK_XAUI_WS_FAR 21
+#define MC_CMD_LOOPBACK_XAUI_WS_NEAR 22
+#define MC_CMD_LOOPBACK_GMII_WS 23
+#define MC_CMD_LOOPBACK_XFI_WS 24
+#define MC_CMD_LOOPBACK_XFI_WS_FAR 25
+#define MC_CMD_LOOPBACK_PHYXS_WS 26
+
+/* Generic PHY statistics enumeration */
+#define MC_CMD_OUI 0
+#define MC_CMD_PMA_PMD_LINK_UP 1
+#define MC_CMD_PMA_PMD_RX_FAULT 2
+#define MC_CMD_PMA_PMD_TX_FAULT 3
+#define MC_CMD_PMA_PMD_SIGNAL 4
+#define MC_CMD_PMA_PMD_SNR_A 5
+#define MC_CMD_PMA_PMD_SNR_B 6
+#define MC_CMD_PMA_PMD_SNR_C 7
+#define MC_CMD_PMA_PMD_SNR_D 8
+#define MC_CMD_PCS_LINK_UP 9
+#define MC_CMD_PCS_RX_FAULT 10
+#define MC_CMD_PCS_TX_FAULT 11
+#define MC_CMD_PCS_BER 12
+#define MC_CMD_PCS_BLOCK_ERRORS 13
+#define MC_CMD_PHYXS_LINK_UP 14
+#define MC_CMD_PHYXS_RX_FAULT 15
+#define MC_CMD_PHYXS_TX_FAULT 16
+#define MC_CMD_PHYXS_ALIGN 17
+#define MC_CMD_PHYXS_SYNC 18
+#define MC_CMD_AN_LINK_UP 19
+#define MC_CMD_AN_COMPLETE 20
+#define MC_CMD_AN_10GBT_STATUS 21
+#define MC_CMD_CL22_LINK_UP 22
+#define MC_CMD_PHY_NSTATS 23
+
+/* MC_CMD_GET_PHY_CFG:
+ * Report PHY configuration.  This guarantees to succeed even if the PHY is in
+ * a "zombie" state.
+ *
+ * Locks required: None
+ * Return code: 0
+ */
+#define MC_CMD_GET_PHY_CFG 0x24
+
+#define MC_CMD_GET_PHY_CFG_IN_LEN 0
+#define MC_CMD_GET_PHY_CFG_OUT_LEN 72
+
+#define MC_CMD_GET_PHY_CFG_OUT_FLAGS_OFST 0
+#define MC_CMD_GET_PHY_CFG_PRESENT_LBN 0
+#define MC_CMD_GET_PHY_CFG_PRESENT_WIDTH 1
+#define MC_CMD_GET_PHY_CFG_SHORTBIST_LBN 1
+#define MC_CMD_GET_PHY_CFG_SHORTBIST_WIDTH 1
+#define MC_CMD_GET_PHY_CFG_LONGBIST_LBN 2
+#define MC_CMD_GET_PHY_CFG_LONGBIST_WIDTH 1
+#define MC_CMD_GET_PHY_CFG_LOWPOWER_LBN 3
+#define MC_CMD_GET_PHY_CFG_LOWPOWER_WIDTH 1
+#define MC_CMD_GET_PHY_CFG_POWEROFF_LBN 4
+#define MC_CMD_GET_PHY_CFG_POWEROFF_WIDTH 1
+#define MC_CMD_GET_PHY_CFG_TXDIS_LBN 5
+#define MC_CMD_GET_PHY_CFG_TXDIS_WIDTH 1
+#define MC_CMD_GET_PHY_CFG_OUT_TYPE_OFST 4
+/* Bitmask of supported capabilities */
+#define MC_CMD_GET_PHY_CFG_OUT_SUPPORTED_CAP_OFST 8
+#define MC_CMD_GET_PHY_CFG_OUT_CHANNEL_OFST 12
+#define MC_CMD_GET_PHY_CFG_OUT_PRT_OFST 16
+/* PHY statistics bitmap */
+#define MC_CMD_GET_PHY_CFG_OUT_STATS_MASK_OFST 20
+/* PHY type/name string */
+#define MC_CMD_GET_PHY_CFG_OUT_NAME_OFST 24
+#define MC_CMD_GET_PHY_CFG_OUT_NAME_LEN 20
+#define MC_CMD_GET_PHY_CFG_OUT_MEDIA_TYPE_OFST 44
+#define MC_CMD_MEDIA_XAUI 1
+#define MC_CMD_MEDIA_CX4 2
+#define MC_CMD_MEDIA_KX4 3
+#define MC_CMD_MEDIA_XFP 4
+#define MC_CMD_MEDIA_SFP_PLUS 5
+#define MC_CMD_MEDIA_BASE_T 6
+/* MDIO "MMDS" supported */
+#define MC_CMD_GET_PHY_CFG_OUT_MMD_MASK_OFST 48
+/* Native clause 22 */
+#define MC_CMD_MMD_CLAUSE22  0
+#define MC_CMD_MMD_CLAUSE45_PMAPMD 1
+#define MC_CMD_MMD_CLAUSE45_WIS 2
+#define MC_CMD_MMD_CLAUSE45_PCS 3
+#define MC_CMD_MMD_CLAUSE45_PHYXS 4
+#define MC_CMD_MMD_CLAUSE45_DTEXS 5
+#define MC_CMD_MMD_CLAUSE45_TC 6
+#define MC_CMD_MMD_CLAUSE45_AN 7
+/* Clause22 proxied over clause45 by PHY */
+#define MC_CMD_MMD_CLAUSE45_C22EXT 29
+#define MC_CMD_MMD_CLAUSE45_VEND1 30
+#define MC_CMD_MMD_CLAUSE45_VEND2 31
+/* PHY stepping version */
+#define MC_CMD_GET_PHY_CFG_OUT_REVISION_OFST 52
+#define MC_CMD_GET_PHY_CFG_OUT_REVISION_LEN 20
+
+/* MC_CMD_START_PHY_BIST:
+ * Start a BIST test on the PHY.
+ *
+ * Locks required: PHY_LOCK if doing a  PHY BIST
+ * Return code: 0, EINVAL, EACCES (if PHY_LOCK is not held)
+ */
+#define MC_CMD_START_BIST 0x25
+#define MC_CMD_START_BIST_IN_LEN 4
+#define MC_CMD_START_BIST_TYPE_OFST 0
+
+/* Run the PHY's short BIST */
+#define MC_CMD_PHY_BIST_SHORT  1
+/* Run the PHY's long BIST */
+#define MC_CMD_PHY_BIST_LONG   2
+/* Run BIST on the currently selected BPX Serdes (XAUI or XFI) */
+#define MC_CMD_BPX_SERDES_BIST 3
+
+/* MC_CMD_POLL_PHY_BIST: (variadic output)
+ * Poll for BIST completion
+ *
+ * Returns a single status code, and a binary blob of phy-specific
+ * bist output. If the driver can't succesfully parse the BIST output,
+ * it should still respect the Pass/Fail in OUT.RESULT.
+ *
+ * Locks required: PHY_LOCK  if doing a  PHY BIST
+ * Return code: 0, EACCES (if PHY_LOCK is not held)
+ */
+#define MC_CMD_POLL_BIST 0x26
+#define MC_CMD_POLL_BIST_IN_LEN 0
+#define MC_CMD_POLL_BIST_OUT_LEN UNKNOWN
+#define MC_CMD_POLL_BIST_OUT_RESULT_OFST 0
+#define MC_CMD_POLL_BIST_RUNNING 1
+#define MC_CMD_POLL_BIST_PASSED 2
+#define MC_CMD_POLL_BIST_FAILED 3
+#define MC_CMD_POLL_BIST_TIMEOUT 4
+#define MC_CMD_POLL_BIST_OUT_PRIVATE_OFST 4
+
+/* MC_CMD_PHY_SPI: (variadic in, variadic out)
+ * Read/Write/Erase the PHY SPI device
+ *
+ * Locks required: PHY_LOCK
+ * Return code: 0, ETIME, EINVAL, EACCES (if PHY_LOCK is not held)
+ */
+#define MC_CMD_PHY_SPI 0x27
+#define MC_CMD_PHY_SPI_IN_LEN(_write_bytes) (12 + (_write_bytes))
+#define MC_CMD_PHY_SPI_IN_ARGS_OFST 0
+#define MC_CMD_PHY_SPI_IN_ARGS_ADDR_OFST 0
+#define MC_CMD_PHY_SPI_IN_ARGS_READ_BYTES_OFST 4
+#define MC_CMD_PHY_SPI_IN_ARGS_ERASE_ALL_OFST 8
+/* Data to write here */
+#define MC_CMD_PHY_SPI_IN_WRITE_BUFFER_OFSET 12
+#define MC_CMD_PHY_SPI_OUT_LEN(_read_bytes) (_read_bytes)
+/* Data read here */
+#define MC_CMD_PHY_SPI_OUT_READ_BUFFER_OFST 0
+
+
+/* MC_CMD_GET_LOOPBACK_MODES:
+ * Returns a bitmask of loopback modes evailable at each speed.
+ *
+ * Locks required: None
+ * Return code: 0
+ */
+#define MC_CMD_GET_LOOPBACK_MODES 0x28
+#define MC_CMD_GET_LOOPBACK_MODES_IN_LEN 0
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_LEN 32
+#define MC_CMD_GET_LOOPBACK_MODES_100M_OFST 0
+#define MC_CMD_GET_LOOPBACK_MODES_1G_OFST 8
+#define MC_CMD_GET_LOOPBACK_MODES_10G_OFST 16
+#define MC_CMD_GET_LOOPBACK_MODES_SUGGESTED_OFST 24
+
+/* Flow control enumeration */
+#define MC_CMD_FCNTL_OFF 0
+#define MC_CMD_FCNTL_RESPOND 1
+#define MC_CMD_FCNTL_BIDIR 2
+/* Auto - Use what the link has autonegotiated
+ *      - The driver should modify the advertised capabilities via SET_LINK.CAP
+ *        to control the negotiated flow control mode.
+ *      - Can only be set if the PHY supports PAUSE+ASYM capabilities
+ *      - Never returned by GET_LINK as the value programmed into the MAC
+ */
+#define MC_CMD_FCNTL_AUTO 3
+
+/* Generic mac fault bitmask */
+#define MC_CMD_MAC_FAULT_XGMII_LOCAL_LBN 0
+#define MC_CMD_MAC_FAULT_XGMII_LOCAL_WIDTH 1
+#define MC_CMD_MAC_FAULT_XGMII_REMOTE_LBN 1
+#define MC_CMD_MAC_FAULT_XGMII_REMOTE_WIDTH 1
+#define MC_CMD_MAC_FAULT_SGMII_REMOTE_LBN 2
+#define MC_CMD_MAC_FAULT_SGMII_REMOTE_WIDTH 1
+
+/* MC_CMD_GET_LINK:
+ * Read the unified MAC/PHY link state
+ *
+ * Locks required: None
+ * Return code: 0, ETIME
+ */
+#define MC_CMD_GET_LINK 0x29
+#define MC_CMD_GET_LINK_IN_LEN 0
+#define MC_CMD_GET_LINK_OUT_LEN 28
+/* near-side and link-partner advertised capabilities */
+#define MC_CMD_GET_LINK_OUT_CAP_OFST 0
+#define MC_CMD_GET_LINK_OUT_LP_CAP_OFST 4
+/* Autonegotiated speed in mbit/s. The link may still be down
+ * even if this reads non-zero */
+#define MC_CMD_GET_LINK_OUT_LINK_SPEED_OFST 8
+#define MC_CMD_GET_LINK_OUT_LOOPBACK_MODE_OFST 12
+#define MC_CMD_GET_LINK_OUT_FLAGS_OFST 16
+/* Whether we have overall link up */
+#define MC_CMD_GET_LINK_LINK_UP_LBN 0
+#define MC_CMD_GET_LINK_LINK_UP_WIDTH 1
+#define MC_CMD_GET_LINK_FULL_DUPLEX_LBN 1
+#define MC_CMD_GET_LINK_FULL_DUPLEX_WIDTH 1
+/* Whether we have link at the layers provided by the BPX */
+#define MC_CMD_GET_LINK_BPX_LINK_LBN 2
+#define MC_CMD_GET_LINK_BPX_LINK_WIDTH 1
+/* Whether the PHY has external link */
+#define MC_CMD_GET_LINK_PHY_LINK_LBN 3
+#define MC_CMD_GET_LINK_PHY_LINK_WIDTH 1
+#define MC_CMD_GET_LINK_OUT_FCNTL_OFST 20
+#define MC_CMD_GET_LINK_OUT_MAC_FAULT_OFST 24
+
+/* MC_CMD_SET_LINK:
+ * Write the unified MAC/PHY link configuration
+ *
+ * A loopback speed of "0" is supported, and means
+ * (choose any available speed)
+ *
+ * Locks required: None
+ * Return code: 0, EINVAL, ETIME
+ */
+#define MC_CMD_SET_LINK 0x2a
+#define MC_CMD_SET_LINK_IN_LEN 16
+#define MC_CMD_SET_LINK_IN_CAP_OFST 0
+#define MC_CMD_SET_LINK_IN_FLAGS_OFST 4
+#define MC_CMD_SET_LINK_LOWPOWER_LBN 0
+#define MC_CMD_SET_LINK_LOWPOWER_WIDTH 1
+#define MC_CMD_SET_LINK_POWEROFF_LBN 1
+#define MC_CMD_SET_LINK_POWEROFF_WIDTH 1
+#define MC_CMD_SET_LINK_TXDIS_LBN 2
+#define MC_CMD_SET_LINK_TXDIS_WIDTH 1
+#define MC_CMD_SET_LINK_IN_LOOPBACK_MODE_OFST 8
+#define MC_CMD_SET_LINK_IN_LOOPBACK_SPEED_OFST 12
+#define MC_CMD_SET_LINK_OUT_LEN 0
+
+/* MC_CMD_SET_ID_LED:
+ * Set indentification LED state
+ *
+ * Locks required: None
+ * Return code: 0, EINVAL
+ */
+#define MC_CMD_SET_ID_LED 0x2b
+#define MC_CMD_SET_ID_LED_IN_LEN 4
+#define MC_CMD_SET_ID_LED_IN_STATE_OFST 0
+#define  MC_CMD_LED_OFF 0
+#define  MC_CMD_LED_ON 1
+#define  MC_CMD_LED_DEFAULT 2
+#define MC_CMD_SET_ID_LED_OUT_LEN 0
+
+/* MC_CMD_SET_MAC:
+ * Set MAC configuration
+ *
+ * The MTU is the MTU programmed directly into the XMAC/GMAC
+ * (inclusive of EtherII, VLAN, bug16011 padding)
+ *
+ * Locks required: None
+ * Return code: 0, EINVAL
+ */
+#define MC_CMD_SET_MAC 0x2c
+#define MC_CMD_SET_MAC_IN_LEN 24
+#define MC_CMD_SET_MAC_IN_MTU_OFST 0
+#define MC_CMD_SET_MAC_IN_DRAIN_OFST 4
+#define MC_CMD_SET_MAC_IN_ADDR_OFST 8
+#define MC_CMD_SET_MAC_IN_REJECT_OFST 16
+#define MC_CMD_SET_MAC_IN_REJECT_UNCST_LBN 0
+#define MC_CMD_SET_MAC_IN_REJECT_UNCST_WIDTH 1
+#define MC_CMD_SET_MAC_IN_REJECT_BRDCST_LBN 1
+#define MC_CMD_SET_MAC_IN_REJECT_BRDCST_WIDTH 1
+#define MC_CMD_SET_MAC_IN_FCNTL_OFST 20
+#define MC_CMD_SET_MAC_OUT_LEN 0
+
+/* MC_CMD_PHY_STATS:
+ * Get generic PHY statistics
+ *
+ * This call returns the statistics for a generic PHY, by direct DMA
+ * into host memory, in a sparse array (indexed by the enumerate).
+ * Each value is represented by a 32bit number.
+ *
+ * Locks required: None
+ * Returns: 0, ETIME
+ * Response methods: shared memory, event
+ */
+#define MC_CMD_PHY_STATS 0x2d
+#define MC_CMD_PHY_STATS_IN_LEN 8
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_LO_OFST 0
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_HI_OFST 4
+#define MC_CMD_PHY_STATS_OUT_LEN 0
+
+/* Unified MAC statistics enumeration */
+#define MC_CMD_MAC_GENERATION_START 0
+#define MC_CMD_MAC_TX_PKTS 1
+#define MC_CMD_MAC_TX_PAUSE_PKTS 2
+#define MC_CMD_MAC_TX_CONTROL_PKTS 3
+#define MC_CMD_MAC_TX_UNICAST_PKTS 4
+#define MC_CMD_MAC_TX_MULTICAST_PKTS 5
+#define MC_CMD_MAC_TX_BROADCAST_PKTS 6
+#define MC_CMD_MAC_TX_BYTES 7
+#define MC_CMD_MAC_TX_BAD_BYTES 8
+#define MC_CMD_MAC_TX_LT64_PKTS 9
+#define MC_CMD_MAC_TX_64_PKTS 10
+#define MC_CMD_MAC_TX_65_TO_127_PKTS 11
+#define MC_CMD_MAC_TX_128_TO_255_PKTS 12
+#define MC_CMD_MAC_TX_256_TO_511_PKTS 13
+#define MC_CMD_MAC_TX_512_TO_1023_PKTS 14
+#define MC_CMD_MAC_TX_1024_TO_15XX_PKTS 15
+#define MC_CMD_MAC_TX_15XX_TO_JUMBO_PKTS 16
+#define MC_CMD_MAC_TX_GTJUMBO_PKTS 17
+#define MC_CMD_MAC_TX_BAD_FCS_PKTS 18
+#define MC_CMD_MAC_TX_SINGLE_COLLISION_PKTS 19
+#define MC_CMD_MAC_TX_MULTIPLE_COLLISION_PKTS 20
+#define MC_CMD_MAC_TX_EXCESSIVE_COLLISION_PKTS 21
+#define MC_CMD_MAC_TX_LATE_COLLISION_PKTS 22
+#define MC_CMD_MAC_TX_DEFERRED_PKTS 23
+#define MC_CMD_MAC_TX_EXCESSIVE_DEFERRED_PKTS 24
+#define MC_CMD_MAC_TX_NON_TCPUDP_PKTS 25
+#define MC_CMD_MAC_TX_MAC_SRC_ERR_PKTS 26
+#define MC_CMD_MAC_TX_IP_SRC_ERR_PKTS 27
+#define MC_CMD_MAC_RX_PKTS 28
+#define MC_CMD_MAC_RX_PAUSE_PKTS 29
+#define MC_CMD_MAC_RX_GOOD_PKTS 30
+#define MC_CMD_MAC_RX_CONTROL_PKTS 31
+#define MC_CMD_MAC_RX_UNICAST_PKTS 32
+#define MC_CMD_MAC_RX_MULTICAST_PKTS 33
+#define MC_CMD_MAC_RX_BROADCAST_PKTS 34
+#define MC_CMD_MAC_RX_BYTES 35
+#define MC_CMD_MAC_RX_BAD_BYTES 36
+#define MC_CMD_MAC_RX_64_PKTS 37
+#define MC_CMD_MAC_RX_65_TO_127_PKTS 38
+#define MC_CMD_MAC_RX_128_TO_255_PKTS 39
+#define MC_CMD_MAC_RX_256_TO_511_PKTS 40
+#define MC_CMD_MAC_RX_512_TO_1023_PKTS 41
+#define MC_CMD_MAC_RX_1024_TO_15XX_PKTS 42
+#define MC_CMD_MAC_RX_15XX_TO_JUMBO_PKTS 43
+#define MC_CMD_MAC_RX_GTJUMBO_PKTS 44
+#define MC_CMD_MAC_RX_UNDERSIZE_PKTS 45
+#define MC_CMD_MAC_RX_BAD_FCS_PKTS 46
+#define MC_CMD_MAC_RX_OVERFLOW_PKTS 47
+#define MC_CMD_MAC_RX_FALSE_CARRIER_PKTS 48
+#define MC_CMD_MAC_RX_SYMBOL_ERROR_PKTS 49
+#define MC_CMD_MAC_RX_ALIGN_ERROR_PKTS 50
+#define MC_CMD_MAC_RX_LENGTH_ERROR_PKTS 51
+#define MC_CMD_MAC_RX_INTERNAL_ERROR_PKTS 52
+#define MC_CMD_MAC_RX_JABBER_PKTS 53
+#define MC_CMD_MAC_RX_NODESC_DROPS 54
+#define MC_CMD_MAC_RX_LANES01_CHAR_ERR 55
+#define MC_CMD_MAC_RX_LANES23_CHAR_ERR 56
+#define MC_CMD_MAC_RX_LANES01_DISP_ERR 57
+#define MC_CMD_MAC_RX_LANES23_DISP_ERR 58
+#define MC_CMD_MAC_RX_MATCH_FAULT 59
+#define MC_CMD_GMAC_DMABUF_START 64
+#define MC_CMD_GMAC_DMABUF_END   95
+/* Insert new members here. */
+#define MC_CMD_MAC_GENERATION_END 96
+#define MC_CMD_MAC_NSTATS (MC_CMD_MAC_GENERATION_END+1)
+
+/* MC_CMD_MAC_STATS:
+ * Get unified GMAC/XMAC statistics
+ *
+ * This call returns unified statistics maintained by the MC as it
+ * switches between the GMAC and XMAC. The MC will write out all
+ * supported stats.  The driver should zero initialise the buffer to
+ * guarantee consistent results.
+ *
+ * Locks required: None
+ * Returns: 0
+ * Response methods: shared memory, event
+ */
+#define MC_CMD_MAC_STATS 0x2e
+#define MC_CMD_MAC_STATS_IN_LEN 16
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_LO_OFST 0
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_HI_OFST 4
+#define MC_CMD_MAC_STATS_IN_CMD_OFST 8
+#define MC_CMD_MAC_STATS_CMD_DMA_LBN 0
+#define MC_CMD_MAC_STATS_CMD_DMA_WIDTH 1
+#define MC_CMD_MAC_STATS_CMD_CLEAR_LBN 1
+#define MC_CMD_MAC_STATS_CMD_CLEAR_WIDTH 1
+#define MC_CMD_MAC_STATS_CMD_PERIODIC_CHANGE_LBN 2
+#define MC_CMD_MAC_STATS_CMD_PERIODIC_CHANGE_WIDTH 1
+/* Fields only relevent when PERIODIC_CHANGE is set */
+#define MC_CMD_MAC_STATS_CMD_PERIODIC_ENABLE_LBN 3
+#define MC_CMD_MAC_STATS_CMD_PERIODIC_ENABLE_WIDTH 1
+#define MC_CMD_MAC_STATS_CMD_PERIODIC_CLEAR_LBN 4
+#define MC_CMD_MAC_STATS_CMD_PERIODIC_CLEAR_WIDTH 1
+#define MC_CMD_MAC_STATS_CMD_PERIOD_MS_LBN 16
+#define MC_CMD_MAC_STATS_CMD_PERIOD_MS_WIDTH 16
+#define MC_CMD_MAC_STATS_IN_DMA_LEN_OFST 12
+
+#define MC_CMD_MAC_STATS_OUT_LEN 0
+
+/* Callisto flags */
+#define MC_CMD_SFT9001_ROBUST_LBN 0
+#define MC_CMD_SFT9001_ROBUST_WIDTH 1
+#define MC_CMD_SFT9001_SHORT_REACH_LBN 1
+#define MC_CMD_SFT9001_SHORT_REACH_WIDTH 1
+
+/* MC_CMD_SFT9001_GET:
+ * Read current callisto specific setting
+ *
+ * Locks required: None
+ * Returns: 0, ETIME
+ */
+#define MC_CMD_SFT9001_GET 0x30
+#define MC_CMD_SFT9001_GET_IN_LEN 0
+#define MC_CMD_SFT9001_GET_OUT_LEN 4
+#define MC_CMD_SFT9001_GET_OUT_FLAGS_OFST 0
+
+/* MC_CMD_SFT9001_SET:
+ * Write current callisto specific setting
+ *
+ * Locks required: None
+ * Returns: 0, ETIME, EINVAL
+ */
+#define MC_CMD_SFT9001_SET 0x31
+#define MC_CMD_SFT9001_SET_IN_LEN 4
+#define MC_CMD_SFT9001_SET_IN_FLAGS_OFST 0
+#define MC_CMD_SFT9001_SET_OUT_LEN 0
+
+
+/* MC_CMD_WOL_FILTER_SET:
+ * Set a WoL filter
+ *
+ * Locks required: None
+ * Returns: 0, EBUSY, EINVAL, ENOSYS
+ */
+#define MC_CMD_WOL_FILTER_SET 0x32
+#define MC_CMD_WOL_FILTER_SET_IN_LEN 192 /* 190 rounded up to a word */
+#define MC_CMD_WOL_FILTER_SET_IN_FILTER_MODE_OFST 0
+#define MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_OFST 4
+
+/* There is a union at offset 8, following defines overlap due to
+ * this */
+#define MC_CMD_WOL_FILTER_SET_IN_DATA_OFST 8
+
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_OFST		\
+	MC_CMD_WOL_FILTER_SET_IN_DATA_OFST
+
+#define MC_CMD_WOL_FILTER_SET_IN_IPV4_SYN_SRC_IP_OFST   \
+	MC_CMD_WOL_FILTER_SET_IN_DATA_OFST
+#define MC_CMD_WOL_FILTER_SET_IN_IPV4_SYN_DST_IP_OFST   \
+	(MC_CMD_WOL_FILTER_SET_IN_DATA_OFST + 4)
+#define MC_CMD_WOL_FILTER_SET_IN_IPV4_SYN_SRC_PORT_OFST \
+	(MC_CMD_WOL_FILTER_SET_IN_DATA_OFST + 8)
+#define MC_CMD_WOL_FILTER_SET_IN_IPV4_SYN_DST_PORT_OFST \
+	(MC_CMD_WOL_FILTER_SET_IN_DATA_OFST + 10)
+
+#define MC_CMD_WOL_FILTER_SET_IN_IPV6_SYN_SRC_IP_OFST   \
+	MC_CMD_WOL_FILTER_SET_IN_DATA_OFST
+#define MC_CMD_WOL_FILTER_SET_IN_IPV6_SYN_DST_IP_OFST   \
+	(MC_CMD_WOL_FILTER_SET_IN_DATA_OFST + 16)
+#define MC_CMD_WOL_FILTER_SET_IN_IPV6_SYN_SRC_PORT_OFST \
+	(MC_CMD_WOL_FILTER_SET_IN_DATA_OFST + 32)
+#define MC_CMD_WOL_FILTER_SET_IN_IPV6_SYN_DST_PORT_OFST \
+	(MC_CMD_WOL_FILTER_SET_IN_DATA_OFST + 34)
+
+#define MC_CMD_WOL_FILTER_SET_IN_BITMAP_MASK_OFST	\
+	MC_CMD_WOL_FILTER_SET_IN_DATA_OFST
+#define MC_CMD_WOL_FILTER_SET_IN_BITMAP_OFST		\
+	(MC_CMD_WOL_FILTER_SET_IN_DATA_OFST + 48)
+#define MC_CMD_WOL_FILTER_SET_IN_BITMAP_LEN_OFST	\
+	(MC_CMD_WOL_FILTER_SET_IN_DATA_OFST + 176)
+#define MC_CMD_WOL_FILTER_SET_IN_BITMAP_LAYER3_OFST	\
+	(MC_CMD_WOL_FILTER_SET_IN_DATA_OFST + 177)
+#define MC_CMD_WOL_FILTER_SET_IN_BITMAP_LAYER4_OFST	\
+	(MC_CMD_WOL_FILTER_SET_IN_DATA_OFST + 178)
+
+#define MC_CMD_WOL_FILTER_SET_OUT_LEN 4
+#define MC_CMD_WOL_FILTER_SET_OUT_FILTER_ID_OFST 0
+
+/* WOL Filter types enumeration */
+#define MC_CMD_WOL_TYPE_MAGIC      0x0
+			 /* unused 0x1 */
+#define MC_CMD_WOL_TYPE_WIN_MAGIC  0x2
+#define MC_CMD_WOL_TYPE_IPV4_SYN   0x3
+#define MC_CMD_WOL_TYPE_IPV6_SYN   0x4
+#define MC_CMD_WOL_TYPE_BITMAP     0x5
+#define MC_CMD_WOL_TYPE_MAX        0x6
+
+#define MC_CMD_FILTER_MODE_SIMPLE     0x0
+#define MC_CMD_FILTER_MODE_STRUCTURED 0xffffffff
+
+/* MC_CMD_WOL_FILTER_REMOVE:
+ * Remove a WoL filter
+ *
+ * Locks required: None
+ * Returns: 0, EINVAL, ENOSYS
+ */
+#define MC_CMD_WOL_FILTER_REMOVE 0x33
+#define MC_CMD_WOL_FILTER_REMOVE_IN_LEN 4
+#define MC_CMD_WOL_FILTER_REMOVE_IN_FILTER_ID_OFST 0
+#define MC_CMD_WOL_FILTER_REMOVE_OUT_LEN 0
+
+
+/* MC_CMD_WOL_FILTER_RESET:
+ * Reset (i.e. remove all) WoL filters
+ *
+ * Locks required: None
+ * Returns: 0, ENOSYS
+ */
+#define MC_CMD_WOL_FILTER_RESET 0x34
+#define MC_CMD_WOL_FILTER_RESET_IN_LEN 0
+#define MC_CMD_WOL_FILTER_RESET_OUT_LEN 0
+
+/* MC_CMD_SET_MCAST_HASH:
+ * Set the MCASH hash value without otherwise
+ * reconfiguring the MAC
+ */
+#define MC_CMD_SET_MCAST_HASH 0x35
+#define MC_CMD_SET_MCAST_HASH_IN_LEN 32
+#define MC_CMD_SET_MCAST_HASH_IN_HASH0_OFST 0
+#define MC_CMD_SET_MCAST_HASH_IN_HASH1_OFST 16
+#define MC_CMD_SET_MCAST_HASH_OUT_LEN 0
+
+/* MC_CMD_NVRAM_TYPES:
+ * Return bitfield indicating available types of virtual NVRAM partitions
+ *
+ * Locks required: none
+ * Returns: 0
+ */
+#define MC_CMD_NVRAM_TYPES 0x36
+#define MC_CMD_NVRAM_TYPES_IN_LEN 0
+#define MC_CMD_NVRAM_TYPES_OUT_LEN 4
+#define MC_CMD_NVRAM_TYPES_OUT_TYPES_OFST 0
+
+/* Supported NVRAM types */
+#define MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO 0
+#define MC_CMD_NVRAM_TYPE_MC_FW 1
+#define MC_CMD_NVRAM_TYPE_MC_FW_BACKUP 2
+#define MC_CMD_NVRAM_TYPE_STATIC_CFG_PORT0 3
+#define MC_CMD_NVRAM_TYPE_STATIC_CFG_PORT1 4
+#define MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0 5
+#define MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1 6
+#define MC_CMD_NVRAM_TYPE_EXP_ROM 7
+#define MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT0 8
+#define MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT1 9
+#define MC_CMD_NVRAM_TYPE_PHY_PORT0 10
+#define MC_CMD_NVRAM_TYPE_PHY_PORT1 11
+#define MC_CMD_NVRAM_TYPE_LOG 12
+
+/* MC_CMD_NVRAM_INFO:
+ * Read info about a virtual NVRAM partition
+ *
+ * Locks required: none
+ * Returns: 0, EINVAL (bad type)
+ */
+#define MC_CMD_NVRAM_INFO 0x37
+#define MC_CMD_NVRAM_INFO_IN_LEN 4
+#define MC_CMD_NVRAM_INFO_IN_TYPE_OFST 0
+#define MC_CMD_NVRAM_INFO_OUT_LEN 24
+#define MC_CMD_NVRAM_INFO_OUT_TYPE_OFST 0
+#define MC_CMD_NVRAM_INFO_OUT_SIZE_OFST 4
+#define MC_CMD_NVRAM_INFO_OUT_ERASESIZE_OFST 8
+#define MC_CMD_NVRAM_INFO_OUT_FLAGS_OFST 12
+#define   MC_CMD_NVRAM_PROTECTED_LBN 0
+#define   MC_CMD_NVRAM_PROTECTED_WIDTH 1
+#define MC_CMD_NVRAM_INFO_OUT_PHYSDEV_OFST 16
+#define MC_CMD_NVRAM_INFO_OUT_PHYSADDR_OFST 20
+
+/* MC_CMD_NVRAM_UPDATE_START:
+ * Start a group of update operations on a virtual NVRAM partition
+ *
+ * Locks required: PHY_LOCK if type==*PHY*
+ * Returns: 0, EINVAL (bad type), EACCES (if PHY_LOCK required and not held)
+ */
+#define MC_CMD_NVRAM_UPDATE_START 0x38
+#define MC_CMD_NVRAM_UPDATE_START_IN_LEN 4
+#define MC_CMD_NVRAM_UPDATE_START_IN_TYPE_OFST 0
+#define MC_CMD_NVRAM_UPDATE_START_OUT_LEN 0
+
+/* MC_CMD_NVRAM_READ:
+ * Read data from a virtual NVRAM partition
+ *
+ * Locks required: PHY_LOCK if type==*PHY*
+ * Returns: 0, EINVAL (bad type/offset/length), EACCES (if PHY_LOCK required and not held)
+ */
+#define MC_CMD_NVRAM_READ 0x39
+#define MC_CMD_NVRAM_READ_IN_LEN 12
+#define MC_CMD_NVRAM_READ_IN_TYPE_OFST 0
+#define MC_CMD_NVRAM_READ_IN_OFFSET_OFST 4
+#define MC_CMD_NVRAM_READ_IN_LENGTH_OFST 8
+#define MC_CMD_NVRAM_READ_OUT_LEN(_read_bytes) (_read_bytes)
+#define MC_CMD_NVRAM_READ_OUT_READ_BUFFER_OFST 0
+
+/* MC_CMD_NVRAM_WRITE:
+ * Write data to a virtual NVRAM partition
+ *
+ * Locks required: PHY_LOCK if type==*PHY*
+ * Returns: 0, EINVAL (bad type/offset/length), EACCES (if PHY_LOCK required and not held)
+ */
+#define MC_CMD_NVRAM_WRITE 0x3a
+#define MC_CMD_NVRAM_WRITE_IN_TYPE_OFST 0
+#define MC_CMD_NVRAM_WRITE_IN_OFFSET_OFST 4
+#define MC_CMD_NVRAM_WRITE_IN_LENGTH_OFST 8
+#define MC_CMD_NVRAM_WRITE_IN_WRITE_BUFFER_OFST 12
+#define MC_CMD_NVRAM_WRITE_IN_LEN(_write_bytes) (12 + _write_bytes)
+#define MC_CMD_NVRAM_WRITE_OUT_LEN 0
+
+/* MC_CMD_NVRAM_ERASE:
+ * Erase sector(s) from a virtual NVRAM partition
+ *
+ * Locks required: PHY_LOCK if type==*PHY*
+ * Returns: 0, EINVAL (bad type/offset/length), EACCES (if PHY_LOCK required and not held)
+ */
+#define MC_CMD_NVRAM_ERASE 0x3b
+#define MC_CMD_NVRAM_ERASE_IN_LEN 12
+#define MC_CMD_NVRAM_ERASE_IN_TYPE_OFST 0
+#define MC_CMD_NVRAM_ERASE_IN_OFFSET_OFST 4
+#define MC_CMD_NVRAM_ERASE_IN_LENGTH_OFST 8
+#define MC_CMD_NVRAM_ERASE_OUT_LEN 0
+
+/* MC_CMD_NVRAM_UPDATE_FINISH:
+ * Finish a group of update operations on a virtual NVRAM partition
+ *
+ * Locks required: PHY_LOCK if type==*PHY*
+ * Returns: 0, EINVAL (bad type/offset/length), EACCES (if PHY_LOCK required and not held)
+ */
+#define MC_CMD_NVRAM_UPDATE_FINISH 0x3c
+#define MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN 4
+#define MC_CMD_NVRAM_UPDATE_FINISH_IN_TYPE_OFST 0
+#define MC_CMD_NVRAM_UPDATE_FINISH_OUT_LEN 0
+
+/* MC_CMD_REBOOT:
+ * Reboot the MC. The AFTER_ASSERTION flag is intended to be used
+ * when the driver notices an assertion failure, to allow two ports to
+ * both recover (semi-)gracefully.
+ *
+ * Locks required: NONE
+ * Returns: Nothing. You get back a response with ERR=1, DATALEN=0
+ */
+#define MC_CMD_REBOOT 0x3d
+#define MC_CMD_REBOOT_IN_LEN 4
+#define MC_CMD_REBOOT_IN_FLAGS_OFST 0
+#define MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION 1
+#define MC_CMD_REBOOT_OUT_LEN 0
+
+/* MC_CMD_SCHEDINFO:
+ * Request scheduler info. from the MC.
+ *
+ * Locks required: NONE
+ * Returns: An array of (timeslice,maximum overrun), one for each thread,
+ * in ascending order of thread address.s
+ */
+#define MC_CMD_SCHEDINFO 0x3e
+#define MC_CMD_SCHEDINFO_IN_LEN 0
+
+
+/* MC_CMD_SET_REBOOT_MODE: (debug)
+ * Set the mode for the next MC reboot.
+ *
+ * Locks required: NONE
+ *
+ * Sets the reboot mode to the specified value.  Returns the old mode.
+ */
+#define MC_CMD_REBOOT_MODE 0x3f
+#define MC_CMD_REBOOT_MODE_IN_LEN 4
+#define MC_CMD_REBOOT_MODE_IN_VALUE_OFST 0
+#define MC_CMD_REBOOT_MODE_OUT_LEN 4
+#define MC_CMD_REBOOT_MODE_OUT_VALUE_OFST 0
+#define   MC_CMD_REBOOT_MODE_NORMAL 0
+#define   MC_CMD_REBOOT_MODE_SNAPPER 3
+
+/* MC_CMD_DEBUG_LOG:
+ * Null request/response command (debug)
+ * - sequence number is always zero
+ * - only supported on the UART interface
+ * (the same set of bytes is delivered as an
+ * event over PCI)
+ */
+#define MC_CMD_DEBUG_LOG 0x40
+#define MC_CMD_DEBUG_LOG_IN_LEN 0
+#define MC_CMD_DEBUG_LOG_OUT_LEN 0
+
+/* Generic sensor enumeration. Note that a dual port NIC
+ * will EITHER expose PHY_COMMON_TEMP OR PHY0_TEMP and
+ * PHY1_TEMP depending on whether there is a single sensor
+ * in the vicinity of the two port, or one per port.
+ */
+#define MC_CMD_SENSOR_CONTROLLER_TEMP 0		/* degC */
+#define MC_CMD_SENSOR_PHY_COMMON_TEMP 1		/* degC */
+#define MC_CMD_SENSOR_CONTROLLER_COOLING 2	/* bool */
+#define MC_CMD_SENSOR_PHY0_TEMP 3		/* degC */
+#define MC_CMD_SENSOR_PHY0_COOLING 4		/* bool */
+#define MC_CMD_SENSOR_PHY1_TEMP 5		/* degC */
+#define MC_CMD_SENSOR_PHY1_COOLING 6		/* bool */
+#define MC_CMD_SENSOR_IN_1V0 7			/* mV */
+#define MC_CMD_SENSOR_IN_1V2 8			/* mV */
+#define MC_CMD_SENSOR_IN_1V8 9			/* mV */
+#define MC_CMD_SENSOR_IN_2V5 10			/* mV */
+#define MC_CMD_SENSOR_IN_3V3 11			/* mV */
+#define MC_CMD_SENSOR_IN_12V0 12		/* mV */
+
+
+/* Sensor state */
+#define MC_CMD_SENSOR_STATE_OK 0
+#define MC_CMD_SENSOR_STATE_WARNING 1
+#define MC_CMD_SENSOR_STATE_FATAL 2
+#define MC_CMD_SENSOR_STATE_BROKEN 3
+
+/* MC_CMD_SENSOR_INFO:
+ * Returns information about every available sensor.
+ *
+ * Each sensor has a single (16bit) value, and a corresponding state.
+ * The mapping between value and sensor is nominally determined by the
+ * MC, but in practise is implemented as zero (BROKEN), one (TEMPERATURE),
+ * or two (VOLTAGE) ranges per sensor per state.
+ *
+ * This call returns a mask (32bit) of the sensors that are supported
+ * by this platform, then an array (indexed by MC_CMD_SENSOR) of byte
+ * offsets to the per-sensor arrays. Each sensor array has four 16bit
+ * numbers, min1, max1, min2, max2.
+ *
+ * Locks required: None
+ * Returns: 0
+ */
+#define MC_CMD_SENSOR_INFO 0x41
+#define MC_CMD_SENSOR_INFO_IN_LEN 0
+#define MC_CMD_SENSOR_INFO_OUT_MASK_OFST 0
+#define MC_CMD_SENSOR_INFO_OUT_OFFSET_OFST(_x) \
+	(4 + (_x))
+#define MC_CMD_SENSOR_INFO_OUT_MIN1_OFST(_ofst) \
+	((_ofst) + 0)
+#define MC_CMD_SENSOR_INFO_OUT_MAX1_OFST(_ofst) \
+	((_ofst) + 2)
+#define MC_CMD_SENSOR_INFO_OUT_MIN2_OFST(_ofst) \
+	((_ofst) + 4)
+#define MC_CMD_SENSOR_INFO_OUT_MAX2_OFST(_ofst) \
+	((_ofst) + 6)
+
+/* MC_CMD_READ_SENSORS
+ * Returns the current (value, state) for each sensor
+ *
+ * Returns the current (value, state) [each 16bit] of each sensor supported by
+ * this board, by DMA'ing a sparse array (indexed by the sensor type) into host
+ * memory.
+ *
+ * The MC will send a SENSOREVT event every time any sensor changes state. The
+ * driver is responsible for ensuring that it doesn't miss any events. The board
+ * will function normally if all sensors are in STATE_OK or state_WARNING.
+ * Otherwise the board should not be expected to function.
+ */
+#define MC_CMD_READ_SENSORS 0x42
+#define MC_CMD_READ_SENSORS_IN_LEN 8
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_LO_OFST 0
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_HI_OFST 4
+#define MC_CMD_READ_SENSORS_OUT_LEN 0
+
+
+/* MC_CMD_GET_PHY_STATE:
+ * Report current state of PHY.  A "zombie" PHY is a PHY that has failed to
+ * boot (e.g. due to missing or corrupted firmware).
+ *
+ * Locks required: None
+ * Return code: 0
+ */
+#define MC_CMD_GET_PHY_STATE 0x43
+
+#define MC_CMD_GET_PHY_STATE_IN_LEN 0
+#define MC_CMD_GET_PHY_STATE_OUT_LEN 4
+#define MC_CMD_GET_PHY_STATE_STATE_OFST 0
+/* PHY state enumeration: */
+#define MC_CMD_PHY_STATE_OK 1
+#define MC_CMD_PHY_STATE_ZOMBIE 2
+
+
+/* 802.1Qbb control. 8 Tx queues that map to priorities 0 - 7. Use all 1s to
+ * disable 802.Qbb for a given priority. */
+#define MC_CMD_SETUP_8021QBB 0x44
+#define MC_CMD_SETUP_8021QBB_IN_LEN 32
+#define MC_CMD_SETUP_8021QBB_OUT_LEN 0
+#define MC_CMD_SETUP_8021QBB_IN_TXQS_OFFST 0
+
+
+/* MC_CMD_WOL_FILTER_GET:
+ * Retrieve ID of any WoL filters
+ *
+ * Locks required: None
+ * Returns: 0, ENOSYS
+ */
+#define MC_CMD_WOL_FILTER_GET 0x45
+#define MC_CMD_WOL_FILTER_GET_IN_LEN 0
+#define MC_CMD_WOL_FILTER_GET_OUT_LEN 4
+#define MC_CMD_WOL_FILTER_GET_OUT_FILTER_ID_OFST 0
+
+
+/* MC_CMD_ADD_LIGHTSOUT_OFFLOAD:
+ * Offload a protocol to NIC for lights-out state
+ *
+ * Locks required: None
+ * Returns: 0, ENOSYS
+ */
+#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD 0x46
+
+#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_LEN 16
+#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_OFST 0
+
+/* There is a union at offset 4, following defines overlap due to
+ * this */
+#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_OFST 4
+#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_ARPMAC_OFST 4
+#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_ARPIP_OFST 10
+#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NSMAC_OFST 4
+#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NSSNIPV6_OFST 10
+#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NSIPV6_OFST 26
+
+#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_OUT_LEN 4
+#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_OUT_FILTER_ID_OFST 0
+
+
+/* MC_CMD_REMOVE_LIGHTSOUT_PROTOCOL_OFFLOAD:
+ * Offload a protocol to NIC for lights-out state
+ *
+ * Locks required: None
+ * Returns: 0, ENOSYS
+ */
+#define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD 0x47
+#define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN_LEN 8
+#define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_OUT_LEN 0
+
+#define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_OFST 0
+#define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN_FILTER_ID_OFST 4
+
+/* Lights-out offload protocols enumeration */
+#define MC_CMD_LIGHTSOUT_OFFLOAD_PROTOCOL_ARP 0x1
+#define MC_CMD_LIGHTSOUT_OFFLOAD_PROTOCOL_NS  0x2
+
+
+/* MC_CMD_MAC_RESET_RESTORE:
+ * Restore MAC after block reset
+ *
+ * Locks required: None
+ * Returns: 0
+ */
+
+#define MC_CMD_MAC_RESET_RESTORE 0x48
+#define MC_CMD_MAC_RESET_RESTORE_IN_LEN 0
+#define MC_CMD_MAC_RESET_RESTORE_OUT_LEN 0
+
+#endif /* MCDI_PCOL_H */
--- linux-mvl-dove-2.6.32.orig/drivers/net/sfc/falcon_boards.c
+++ linux-mvl-dove-2.6.32/drivers/net/sfc/falcon_boards.c
@@ -0,0 +1,754 @@
+/****************************************************************************
+ * Driver for Solarflare Solarstorm network controllers and boards
+ * Copyright 2007-2009 Solarflare Communications Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation, incorporated herein by reference.
+ */
+
+#include <linux/rtnetlink.h>
+
+#include "net_driver.h"
+#include "phy.h"
+#include "efx.h"
+#include "nic.h"
+#include "regs.h"
+#include "io.h"
+#include "workarounds.h"
+
+/* Macros for unpacking the board revision */
+/* The revision info is in host byte order. */
+#define FALCON_BOARD_TYPE(_rev) (_rev >> 8)
+#define FALCON_BOARD_MAJOR(_rev) ((_rev >> 4) & 0xf)
+#define FALCON_BOARD_MINOR(_rev) (_rev & 0xf)
+
+/* Board types */
+#define FALCON_BOARD_SFE4001 0x01
+#define FALCON_BOARD_SFE4002 0x02
+#define FALCON_BOARD_SFN4111T 0x51
+#define FALCON_BOARD_SFN4112F 0x52
+
+/* Board temperature is about 15°C above ambient when air flow is
+ * limited. */
+#define FALCON_BOARD_TEMP_BIAS	15
+
+/* SFC4000 datasheet says: 'The maximum permitted junction temperature
+ * is 125°C; the thermal design of the environment for the SFC4000
+ * should aim to keep this well below 100°C.' */
+#define FALCON_JUNC_TEMP_MAX	90
+
+/*****************************************************************************
+ * Support for LM87 sensor chip used on several boards
+ */
+#define LM87_REG_ALARMS1		0x41
+#define LM87_REG_ALARMS2		0x42
+#define LM87_IN_LIMITS(nr, _min, _max)			\
+	0x2B + (nr) * 2, _max, 0x2C + (nr) * 2, _min
+#define LM87_AIN_LIMITS(nr, _min, _max)			\
+	0x3B + (nr), _max, 0x1A + (nr), _min
+#define LM87_TEMP_INT_LIMITS(_min, _max)		\
+	0x39, _max, 0x3A, _min
+#define LM87_TEMP_EXT1_LIMITS(_min, _max)		\
+	0x37, _max, 0x38, _min
+
+#define LM87_ALARM_TEMP_INT		0x10
+#define LM87_ALARM_TEMP_EXT1		0x20
+
+#if defined(CONFIG_SENSORS_LM87) || defined(CONFIG_SENSORS_LM87_MODULE)
+
+static int efx_init_lm87(struct efx_nic *efx, struct i2c_board_info *info,
+			 const u8 *reg_values)
+{
+	struct falcon_board *board = falcon_board(efx);
+	struct i2c_client *client = i2c_new_device(&board->i2c_adap, info);
+	int rc;
+
+	if (!client)
+		return -EIO;
+
+	while (*reg_values) {
+		u8 reg = *reg_values++;
+		u8 value = *reg_values++;
+		rc = i2c_smbus_write_byte_data(client, reg, value);
+		if (rc)
+			goto err;
+	}
+
+	board->hwmon_client = client;
+	return 0;
+
+err:
+	i2c_unregister_device(client);
+	return rc;
+}
+
+static void efx_fini_lm87(struct efx_nic *efx)
+{
+	i2c_unregister_device(falcon_board(efx)->hwmon_client);
+}
+
+static int efx_check_lm87(struct efx_nic *efx, unsigned mask)
+{
+	struct i2c_client *client = falcon_board(efx)->hwmon_client;
+	s32 alarms1, alarms2;
+
+	/* If link is up then do not monitor temperature */
+	if (EFX_WORKAROUND_7884(efx) && efx->link_state.up)
+		return 0;
+
+	alarms1 = i2c_smbus_read_byte_data(client, LM87_REG_ALARMS1);
+	alarms2 = i2c_smbus_read_byte_data(client, LM87_REG_ALARMS2);
+	if (alarms1 < 0)
+		return alarms1;
+	if (alarms2 < 0)
+		return alarms2;
+	alarms1 &= mask;
+	alarms2 &= mask >> 8;
+	if (alarms1 || alarms2) {
+		EFX_ERR(efx,
+			"LM87 detected a hardware failure (status %02x:%02x)"
+			"%s%s\n",
+			alarms1, alarms2,
+			(alarms1 & LM87_ALARM_TEMP_INT) ? " INTERNAL" : "",
+			(alarms1 & LM87_ALARM_TEMP_EXT1) ? " EXTERNAL" : "");
+		return -ERANGE;
+	}
+
+	return 0;
+}
+
+#else /* !CONFIG_SENSORS_LM87 */
+
+static inline int
+efx_init_lm87(struct efx_nic *efx, struct i2c_board_info *info,
+	      const u8 *reg_values)
+{
+	return 0;
+}
+static inline void efx_fini_lm87(struct efx_nic *efx)
+{
+}
+static inline int efx_check_lm87(struct efx_nic *efx, unsigned mask)
+{
+	return 0;
+}
+
+#endif /* CONFIG_SENSORS_LM87 */
+
+/*****************************************************************************
+ * Support for the SFE4001 and SFN4111T NICs.
+ *
+ * The SFE4001 does not power-up fully at reset due to its high power
+ * consumption.  We control its power via a PCA9539 I/O expander.
+ * Both boards have a MAX6647 temperature monitor which we expose to
+ * the lm90 driver.
+ *
+ * This also provides minimal support for reflashing the PHY, which is
+ * initiated by resetting it with the FLASH_CFG_1 pin pulled down.
+ * On SFE4001 rev A2 and later this is connected to the 3V3X output of
+ * the IO-expander; on the SFN4111T it is connected to Falcon's GPIO3.
+ * We represent reflash mode as PHY_MODE_SPECIAL and make it mutually
+ * exclusive with the network device being open.
+ */
+
+/**************************************************************************
+ * Support for I2C IO Expander device on SFE4001
+ */
+#define	PCA9539 0x74
+
+#define	P0_IN 0x00
+#define	P0_OUT 0x02
+#define	P0_INVERT 0x04
+#define	P0_CONFIG 0x06
+
+#define	P0_EN_1V0X_LBN 0
+#define	P0_EN_1V0X_WIDTH 1
+#define	P0_EN_1V2_LBN 1
+#define	P0_EN_1V2_WIDTH 1
+#define	P0_EN_2V5_LBN 2
+#define	P0_EN_2V5_WIDTH 1
+#define	P0_EN_3V3X_LBN 3
+#define	P0_EN_3V3X_WIDTH 1
+#define	P0_EN_5V_LBN 4
+#define	P0_EN_5V_WIDTH 1
+#define	P0_SHORTEN_JTAG_LBN 5
+#define	P0_SHORTEN_JTAG_WIDTH 1
+#define	P0_X_TRST_LBN 6
+#define	P0_X_TRST_WIDTH 1
+#define	P0_DSP_RESET_LBN 7
+#define	P0_DSP_RESET_WIDTH 1
+
+#define	P1_IN 0x01
+#define	P1_OUT 0x03
+#define	P1_INVERT 0x05
+#define	P1_CONFIG 0x07
+
+#define	P1_AFE_PWD_LBN 0
+#define	P1_AFE_PWD_WIDTH 1
+#define	P1_DSP_PWD25_LBN 1
+#define	P1_DSP_PWD25_WIDTH 1
+#define	P1_RESERVED_LBN 2
+#define	P1_RESERVED_WIDTH 2
+#define	P1_SPARE_LBN 4
+#define	P1_SPARE_WIDTH 4
+
+/* Temperature Sensor */
+#define MAX664X_REG_RSL		0x02
+#define MAX664X_REG_WLHO	0x0B
+
+static void sfe4001_poweroff(struct efx_nic *efx)
+{
+	struct i2c_client *ioexp_client = falcon_board(efx)->ioexp_client;
+	struct i2c_client *hwmon_client = falcon_board(efx)->hwmon_client;
+
+	/* Turn off all power rails and disable outputs */
+	i2c_smbus_write_byte_data(ioexp_client, P0_OUT, 0xff);
+	i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG, 0xff);
+	i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0xff);
+
+	/* Clear any over-temperature alert */
+	i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
+}
+
+static int sfe4001_poweron(struct efx_nic *efx)
+{
+	struct i2c_client *ioexp_client = falcon_board(efx)->ioexp_client;
+	struct i2c_client *hwmon_client = falcon_board(efx)->hwmon_client;
+	unsigned int i, j;
+	int rc;
+	u8 out;
+
+	/* Clear any previous over-temperature alert */
+	rc = i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
+	if (rc < 0)
+		return rc;
+
+	/* Enable port 0 and port 1 outputs on IO expander */
+	rc = i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0x00);
+	if (rc)
+		return rc;
+	rc = i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG,
+				       0xff & ~(1 << P1_SPARE_LBN));
+	if (rc)
+		goto fail_on;
+
+	/* If PHY power is on, turn it all off and wait 1 second to
+	 * ensure a full reset.
+	 */
+	rc = i2c_smbus_read_byte_data(ioexp_client, P0_OUT);
+	if (rc < 0)
+		goto fail_on;
+	out = 0xff & ~((0 << P0_EN_1V2_LBN) | (0 << P0_EN_2V5_LBN) |
+		       (0 << P0_EN_3V3X_LBN) | (0 << P0_EN_5V_LBN) |
+		       (0 << P0_EN_1V0X_LBN));
+	if (rc != out) {
+		EFX_INFO(efx, "power-cycling PHY\n");
+		rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
+		if (rc)
+			goto fail_on;
+		schedule_timeout_uninterruptible(HZ);
+	}
+
+	for (i = 0; i < 20; ++i) {
+		/* Turn on 1.2V, 2.5V, 3.3V and 5V power rails */
+		out = 0xff & ~((1 << P0_EN_1V2_LBN) | (1 << P0_EN_2V5_LBN) |
+			       (1 << P0_EN_3V3X_LBN) | (1 << P0_EN_5V_LBN) |
+			       (1 << P0_X_TRST_LBN));
+		if (efx->phy_mode & PHY_MODE_SPECIAL)
+			out |= 1 << P0_EN_3V3X_LBN;
+
+		rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
+		if (rc)
+			goto fail_on;
+		msleep(10);
+
+		/* Turn on 1V power rail */
+		out &= ~(1 << P0_EN_1V0X_LBN);
+		rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
+		if (rc)
+			goto fail_on;
+
+		EFX_INFO(efx, "waiting for DSP boot (attempt %d)...\n", i);
+
+		/* In flash config mode, DSP does not turn on AFE, so
+		 * just wait 1 second.
+		 */
+		if (efx->phy_mode & PHY_MODE_SPECIAL) {
+			schedule_timeout_uninterruptible(HZ);
+			return 0;
+		}
+
+		for (j = 0; j < 10; ++j) {
+			msleep(100);
+
+			/* Check DSP has asserted AFE power line */
+			rc = i2c_smbus_read_byte_data(ioexp_client, P1_IN);
+			if (rc < 0)
+				goto fail_on;
+			if (rc & (1 << P1_AFE_PWD_LBN))
+				return 0;
+		}
+	}
+
+	EFX_INFO(efx, "timed out waiting for DSP boot\n");
+	rc = -ETIMEDOUT;
+fail_on:
+	sfe4001_poweroff(efx);
+	return rc;
+}
+
+static int sfn4111t_reset(struct efx_nic *efx)
+{
+	struct falcon_board *board = falcon_board(efx);
+	efx_oword_t reg;
+
+	/* GPIO 3 and the GPIO register are shared with I2C, so block that */
+	i2c_lock_adapter(&board->i2c_adap);
+
+	/* Pull RST_N (GPIO 2) low then let it up again, setting the
+	 * FLASH_CFG_1 strap (GPIO 3) appropriately.  Only change the
+	 * output enables; the output levels should always be 0 (low)
+	 * and we rely on external pull-ups. */
+	efx_reado(efx, &reg, FR_AB_GPIO_CTL);
+	EFX_SET_OWORD_FIELD(reg, FRF_AB_GPIO2_OEN, true);
+	efx_writeo(efx, &reg, FR_AB_GPIO_CTL);
+	msleep(1000);
+	EFX_SET_OWORD_FIELD(reg, FRF_AB_GPIO2_OEN, false);
+	EFX_SET_OWORD_FIELD(reg, FRF_AB_GPIO3_OEN,
+			    !!(efx->phy_mode & PHY_MODE_SPECIAL));
+	efx_writeo(efx, &reg, FR_AB_GPIO_CTL);
+	msleep(1);
+
+	i2c_unlock_adapter(&board->i2c_adap);
+
+	ssleep(1);
+	return 0;
+}
+
+static ssize_t show_phy_flash_cfg(struct device *dev,
+				  struct device_attribute *attr, char *buf)
+{
+	struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
+	return sprintf(buf, "%d\n", !!(efx->phy_mode & PHY_MODE_SPECIAL));
+}
+
+static ssize_t set_phy_flash_cfg(struct device *dev,
+				 struct device_attribute *attr,
+				 const char *buf, size_t count)
+{
+	struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
+	enum efx_phy_mode old_mode, new_mode;
+	int err;
+
+	rtnl_lock();
+	old_mode = efx->phy_mode;
+	if (count == 0 || *buf == '0')
+		new_mode = old_mode & ~PHY_MODE_SPECIAL;
+	else
+		new_mode = PHY_MODE_SPECIAL;
+	if (old_mode == new_mode) {
+		err = 0;
+	} else if (efx->state != STATE_RUNNING || netif_running(efx->net_dev)) {
+		err = -EBUSY;
+	} else {
+		/* Reset the PHY, reconfigure the MAC and enable/disable
+		 * MAC stats accordingly. */
+		efx->phy_mode = new_mode;
+		if (new_mode & PHY_MODE_SPECIAL)
+			falcon_stop_nic_stats(efx);
+		if (falcon_board(efx)->type->id == FALCON_BOARD_SFE4001)
+			err = sfe4001_poweron(efx);
+		else
+			err = sfn4111t_reset(efx);
+		if (!err)
+			err = efx_reconfigure_port(efx);
+		if (!(new_mode & PHY_MODE_SPECIAL))
+			falcon_start_nic_stats(efx);
+	}
+	rtnl_unlock();
+
+	return err ? err : count;
+}
+
+static DEVICE_ATTR(phy_flash_cfg, 0644, show_phy_flash_cfg, set_phy_flash_cfg);
+
+static void sfe4001_fini(struct efx_nic *efx)
+{
+	struct falcon_board *board = falcon_board(efx);
+
+	EFX_INFO(efx, "%s\n", __func__);
+
+	device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
+	sfe4001_poweroff(efx);
+	i2c_unregister_device(board->ioexp_client);
+	i2c_unregister_device(board->hwmon_client);
+}
+
+static int sfe4001_check_hw(struct efx_nic *efx)
+{
+	s32 status;
+
+	/* If XAUI link is up then do not monitor */
+	if (EFX_WORKAROUND_7884(efx) && !efx->xmac_poll_required)
+		return 0;
+
+	/* Check the powered status of the PHY. Lack of power implies that
+	 * the MAX6647 has shut down power to it, probably due to a temp.
+	 * alarm. Reading the power status rather than the MAX6647 status
+	 * directly because the later is read-to-clear and would thus
+	 * start to power up the PHY again when polled, causing us to blip
+	 * the power undesirably.
+	 * We know we can read from the IO expander because we did
+	 * it during power-on. Assume failure now is bad news. */
+	status = i2c_smbus_read_byte_data(falcon_board(efx)->ioexp_client, P1_IN);
+	if (status >= 0 &&
+	    (status & ((1 << P1_AFE_PWD_LBN) | (1 << P1_DSP_PWD25_LBN))) != 0)
+		return 0;
+
+	/* Use board power control, not PHY power control */
+	sfe4001_poweroff(efx);
+	efx->phy_mode = PHY_MODE_OFF;
+
+	return (status < 0) ? -EIO : -ERANGE;
+}
+
+static struct i2c_board_info sfe4001_hwmon_info = {
+	I2C_BOARD_INFO("max6647", 0x4e),
+};
+
+/* This board uses an I2C expander to provider power to the PHY, which needs to
+ * be turned on before the PHY can be used.
+ * Context: Process context, rtnl lock held
+ */
+static int sfe4001_init(struct efx_nic *efx)
+{
+	struct falcon_board *board = falcon_board(efx);
+	int rc;
+
+#if defined(CONFIG_SENSORS_LM90) || defined(CONFIG_SENSORS_LM90_MODULE)
+	board->hwmon_client =
+		i2c_new_device(&board->i2c_adap, &sfe4001_hwmon_info);
+#else
+	board->hwmon_client =
+		i2c_new_dummy(&board->i2c_adap, sfe4001_hwmon_info.addr);
+#endif
+	if (!board->hwmon_client)
+		return -EIO;
+
+	/* Raise board/PHY high limit from 85 to 90 degrees Celsius */
+	rc = i2c_smbus_write_byte_data(board->hwmon_client,
+				       MAX664X_REG_WLHO, 90);
+	if (rc)
+		goto fail_hwmon;
+
+	board->ioexp_client = i2c_new_dummy(&board->i2c_adap, PCA9539);
+	if (!board->ioexp_client) {
+		rc = -EIO;
+		goto fail_hwmon;
+	}
+
+	if (efx->phy_mode & PHY_MODE_SPECIAL) {
+		/* PHY won't generate a 156.25 MHz clock and MAC stats fetch
+		 * will fail. */
+		falcon_stop_nic_stats(efx);
+	}
+	rc = sfe4001_poweron(efx);
+	if (rc)
+		goto fail_ioexp;
+
+	rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
+	if (rc)
+		goto fail_on;
+
+	EFX_INFO(efx, "PHY is powered on\n");
+	return 0;
+
+fail_on:
+	sfe4001_poweroff(efx);
+fail_ioexp:
+	i2c_unregister_device(board->ioexp_client);
+fail_hwmon:
+	i2c_unregister_device(board->hwmon_client);
+	return rc;
+}
+
+static int sfn4111t_check_hw(struct efx_nic *efx)
+{
+	s32 status;
+
+	/* If XAUI link is up then do not monitor */
+	if (EFX_WORKAROUND_7884(efx) && !efx->xmac_poll_required)
+		return 0;
+
+	/* Test LHIGH, RHIGH, FAULT, EOT and IOT alarms */
+	status = i2c_smbus_read_byte_data(falcon_board(efx)->hwmon_client,
+					  MAX664X_REG_RSL);
+	if (status < 0)
+		return -EIO;
+	if (status & 0x57)
+		return -ERANGE;
+	return 0;
+}
+
+static void sfn4111t_fini(struct efx_nic *efx)
+{
+	EFX_INFO(efx, "%s\n", __func__);
+
+	device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
+	i2c_unregister_device(falcon_board(efx)->hwmon_client);
+}
+
+static struct i2c_board_info sfn4111t_a0_hwmon_info = {
+	I2C_BOARD_INFO("max6647", 0x4e),
+};
+
+static struct i2c_board_info sfn4111t_r5_hwmon_info = {
+	I2C_BOARD_INFO("max6646", 0x4d),
+};
+
+static void sfn4111t_init_phy(struct efx_nic *efx)
+{
+	if (!(efx->phy_mode & PHY_MODE_SPECIAL)) {
+		if (sft9001_wait_boot(efx) != -EINVAL)
+			return;
+
+		efx->phy_mode = PHY_MODE_SPECIAL;
+		falcon_stop_nic_stats(efx);
+	}
+
+	sfn4111t_reset(efx);
+	sft9001_wait_boot(efx);
+}
+
+static int sfn4111t_init(struct efx_nic *efx)
+{
+	struct falcon_board *board = falcon_board(efx);
+	int rc;
+
+	board->hwmon_client =
+		i2c_new_device(&board->i2c_adap,
+			       (board->minor < 5) ?
+			       &sfn4111t_a0_hwmon_info :
+			       &sfn4111t_r5_hwmon_info);
+	if (!board->hwmon_client)
+		return -EIO;
+
+	rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
+	if (rc)
+		goto fail_hwmon;
+
+	if (efx->phy_mode & PHY_MODE_SPECIAL)
+		/* PHY may not generate a 156.25 MHz clock and MAC
+		 * stats fetch will fail. */
+		falcon_stop_nic_stats(efx);
+
+	return 0;
+
+fail_hwmon:
+	i2c_unregister_device(board->hwmon_client);
+	return rc;
+}
+
+/*****************************************************************************
+ * Support for the SFE4002
+ *
+ */
+static u8 sfe4002_lm87_channel = 0x03; /* use AIN not FAN inputs */
+
+static const u8 sfe4002_lm87_regs[] = {
+	LM87_IN_LIMITS(0, 0x7c, 0x99),		/* 2.5V:  1.8V +/- 10% */
+	LM87_IN_LIMITS(1, 0x4c, 0x5e),		/* Vccp1: 1.2V +/- 10% */
+	LM87_IN_LIMITS(2, 0xac, 0xd4),		/* 3.3V:  3.3V +/- 10% */
+	LM87_IN_LIMITS(3, 0xac, 0xd4),		/* 5V:    5.0V +/- 10% */
+	LM87_IN_LIMITS(4, 0xac, 0xe0),		/* 12V:   10.8-14V */
+	LM87_IN_LIMITS(5, 0x3f, 0x4f),		/* Vccp2: 1.0V +/- 10% */
+	LM87_AIN_LIMITS(0, 0x98, 0xbb),		/* AIN1:  1.66V +/- 10% */
+	LM87_AIN_LIMITS(1, 0x8a, 0xa9),		/* AIN2:  1.5V +/- 10% */
+	LM87_TEMP_INT_LIMITS(0, 80 + FALCON_BOARD_TEMP_BIAS),
+	LM87_TEMP_EXT1_LIMITS(0, FALCON_JUNC_TEMP_MAX),
+	0
+};
+
+static struct i2c_board_info sfe4002_hwmon_info = {
+	I2C_BOARD_INFO("lm87", 0x2e),
+	.platform_data	= &sfe4002_lm87_channel,
+};
+
+/****************************************************************************/
+/* LED allocations. Note that on rev A0 boards the schematic and the reality
+ * differ: red and green are swapped. Below is the fixed (A1) layout (there
+ * are only 3 A0 boards in existence, so no real reason to make this
+ * conditional).
+ */
+#define SFE4002_FAULT_LED (2)	/* Red */
+#define SFE4002_RX_LED    (0)	/* Green */
+#define SFE4002_TX_LED    (1)	/* Amber */
+
+static void sfe4002_init_phy(struct efx_nic *efx)
+{
+	/* Set the TX and RX LEDs to reflect status and activity, and the
+	 * fault LED off */
+	falcon_qt202x_set_led(efx, SFE4002_TX_LED,
+			      QUAKE_LED_TXLINK | QUAKE_LED_LINK_ACTSTAT);
+	falcon_qt202x_set_led(efx, SFE4002_RX_LED,
+			      QUAKE_LED_RXLINK | QUAKE_LED_LINK_ACTSTAT);
+	falcon_qt202x_set_led(efx, SFE4002_FAULT_LED, QUAKE_LED_OFF);
+}
+
+static void sfe4002_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
+{
+	falcon_qt202x_set_led(
+		efx, SFE4002_FAULT_LED,
+		(mode == EFX_LED_ON) ? QUAKE_LED_ON : QUAKE_LED_OFF);
+}
+
+static int sfe4002_check_hw(struct efx_nic *efx)
+{
+	struct falcon_board *board = falcon_board(efx);
+
+	/* A0 board rev. 4002s report a temperature fault the whole time
+	 * (bad sensor) so we mask it out. */
+	unsigned alarm_mask =
+		(board->major == 0 && board->minor == 0) ?
+		~LM87_ALARM_TEMP_EXT1 : ~0;
+
+	return efx_check_lm87(efx, alarm_mask);
+}
+
+static int sfe4002_init(struct efx_nic *efx)
+{
+	return efx_init_lm87(efx, &sfe4002_hwmon_info, sfe4002_lm87_regs);
+}
+
+/*****************************************************************************
+ * Support for the SFN4112F
+ *
+ */
+static u8 sfn4112f_lm87_channel = 0x03; /* use AIN not FAN inputs */
+
+static const u8 sfn4112f_lm87_regs[] = {
+	LM87_IN_LIMITS(0, 0x7c, 0x99),		/* 2.5V:  1.8V +/- 10% */
+	LM87_IN_LIMITS(1, 0x4c, 0x5e),		/* Vccp1: 1.2V +/- 10% */
+	LM87_IN_LIMITS(2, 0xac, 0xd4),		/* 3.3V:  3.3V +/- 10% */
+	LM87_IN_LIMITS(4, 0xac, 0xe0),		/* 12V:   10.8-14V */
+	LM87_IN_LIMITS(5, 0x3f, 0x4f),		/* Vccp2: 1.0V +/- 10% */
+	LM87_AIN_LIMITS(1, 0x8a, 0xa9),		/* AIN2:  1.5V +/- 10% */
+	LM87_TEMP_INT_LIMITS(0, 60 + FALCON_BOARD_TEMP_BIAS),
+	LM87_TEMP_EXT1_LIMITS(0, FALCON_JUNC_TEMP_MAX),
+	0
+};
+
+static struct i2c_board_info sfn4112f_hwmon_info = {
+	I2C_BOARD_INFO("lm87", 0x2e),
+	.platform_data	= &sfn4112f_lm87_channel,
+};
+
+#define SFN4112F_ACT_LED	0
+#define SFN4112F_LINK_LED	1
+
+static void sfn4112f_init_phy(struct efx_nic *efx)
+{
+	falcon_qt202x_set_led(efx, SFN4112F_ACT_LED,
+			      QUAKE_LED_RXLINK | QUAKE_LED_LINK_ACT);
+	falcon_qt202x_set_led(efx, SFN4112F_LINK_LED,
+			      QUAKE_LED_RXLINK | QUAKE_LED_LINK_STAT);
+}
+
+static void sfn4112f_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
+{
+	int reg;
+
+	switch (mode) {
+	case EFX_LED_OFF:
+		reg = QUAKE_LED_OFF;
+		break;
+	case EFX_LED_ON:
+		reg = QUAKE_LED_ON;
+		break;
+	default:
+		reg = QUAKE_LED_RXLINK | QUAKE_LED_LINK_STAT;
+		break;
+	}
+
+	falcon_qt202x_set_led(efx, SFN4112F_LINK_LED, reg);
+}
+
+static int sfn4112f_check_hw(struct efx_nic *efx)
+{
+	/* Mask out unused sensors */
+	return efx_check_lm87(efx, ~0x48);
+}
+
+static int sfn4112f_init(struct efx_nic *efx)
+{
+	return efx_init_lm87(efx, &sfn4112f_hwmon_info, sfn4112f_lm87_regs);
+}
+
+static const struct falcon_board_type board_types[] = {
+	{
+		.id		= FALCON_BOARD_SFE4001,
+		.ref_model	= "SFE4001",
+		.gen_type	= "10GBASE-T adapter",
+		.init		= sfe4001_init,
+		.init_phy	= efx_port_dummy_op_void,
+		.fini		= sfe4001_fini,
+		.set_id_led	= tenxpress_set_id_led,
+		.monitor	= sfe4001_check_hw,
+	},
+	{
+		.id		= FALCON_BOARD_SFE4002,
+		.ref_model	= "SFE4002",
+		.gen_type	= "XFP adapter",
+		.init		= sfe4002_init,
+		.init_phy	= sfe4002_init_phy,
+		.fini		= efx_fini_lm87,
+		.set_id_led	= sfe4002_set_id_led,
+		.monitor	= sfe4002_check_hw,
+	},
+	{
+		.id		= FALCON_BOARD_SFN4111T,
+		.ref_model	= "SFN4111T",
+		.gen_type	= "100/1000/10GBASE-T adapter",
+		.init		= sfn4111t_init,
+		.init_phy	= sfn4111t_init_phy,
+		.fini		= sfn4111t_fini,
+		.set_id_led	= tenxpress_set_id_led,
+		.monitor	= sfn4111t_check_hw,
+	},
+	{
+		.id		= FALCON_BOARD_SFN4112F,
+		.ref_model	= "SFN4112F",
+		.gen_type	= "SFP+ adapter",
+		.init		= sfn4112f_init,
+		.init_phy	= sfn4112f_init_phy,
+		.fini		= efx_fini_lm87,
+		.set_id_led	= sfn4112f_set_id_led,
+		.monitor	= sfn4112f_check_hw,
+	},
+};
+
+int falcon_probe_board(struct efx_nic *efx, u16 revision_info)
+{
+	struct falcon_board *board = falcon_board(efx);
+	u8 type_id = FALCON_BOARD_TYPE(revision_info);
+	int i;
+
+	board->major = FALCON_BOARD_MAJOR(revision_info);
+	board->minor = FALCON_BOARD_MINOR(revision_info);
+
+	for (i = 0; i < ARRAY_SIZE(board_types); i++)
+		if (board_types[i].id == type_id)
+			board->type = &board_types[i];
+
+	if (board->type) {
+		EFX_INFO(efx, "board is %s rev %c%d\n",
+			 (efx->pci_dev->subsystem_vendor == EFX_VENDID_SFC)
+			 ? board->type->ref_model : board->type->gen_type,
+			 'A' + board->major, board->minor);
+		return 0;
+	} else {
+		EFX_ERR(efx, "unknown board type %d\n", type_id);
+		return -ENODEV;
+	}
+}
--- linux-mvl-dove-2.6.32.orig/drivers/net/sfc/falcon.c
+++ linux-mvl-dove-2.6.32/drivers/net/sfc/falcon.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * Driver for Solarflare Solarstorm network controllers and boards
  * Copyright 2005-2006 Fen Systems Ltd.
- * Copyright 2006-2008 Solarflare Communications Inc.
+ * Copyright 2006-2009 Solarflare Communications Inc.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of the GNU General Public License version 2 as published
@@ -14,1344 +14,124 @@
 #include <linux/module.h>
 #include <linux/seq_file.h>
 #include <linux/i2c.h>
-#include <linux/i2c-algo-bit.h>
 #include <linux/mii.h>
 #include "net_driver.h"
 #include "bitfield.h"
 #include "efx.h"
 #include "mac.h"
 #include "spi.h"
-#include "falcon.h"
-#include "falcon_hwdefs.h"
-#include "falcon_io.h"
+#include "nic.h"
+#include "regs.h"
+#include "io.h"
 #include "mdio_10g.h"
 #include "phy.h"
-#include "boards.h"
 #include "workarounds.h"
 
-/* Falcon hardware control.
- * Falcon is the internal codename for the SFC4000 controller that is
- * present in SFE400X evaluation boards
- */
-
-/**
- * struct falcon_nic_data - Falcon NIC state
- * @next_buffer_table: First available buffer table id
- * @pci_dev2: The secondary PCI device if present
- * @i2c_data: Operations and state for I2C bit-bashing algorithm
- * @int_error_count: Number of internal errors seen recently
- * @int_error_expire: Time at which error count will be expired
- */
-struct falcon_nic_data {
-	unsigned next_buffer_table;
-	struct pci_dev *pci_dev2;
-	struct i2c_algo_bit_data i2c_data;
-
-	unsigned int_error_count;
-	unsigned long int_error_expire;
-};
-
-/**************************************************************************
- *
- * Configurable values
- *
- **************************************************************************
- */
-
-static int disable_dma_stats;
-
-/* This is set to 16 for a good reason.  In summary, if larger than
- * 16, the descriptor cache holds more than a default socket
- * buffer's worth of packets (for UDP we can only have at most one
- * socket buffer's worth outstanding).  This combined with the fact
- * that we only get 1 TX event per descriptor cache means the NIC
- * goes idle.
- */
-#define TX_DC_ENTRIES 16
-#define TX_DC_ENTRIES_ORDER 0
-#define TX_DC_BASE 0x130000
-
-#define RX_DC_ENTRIES 64
-#define RX_DC_ENTRIES_ORDER 2
-#define RX_DC_BASE 0x100000
-
-static const unsigned int
-/* "Large" EEPROM device: Atmel AT25640 or similar
- * 8 KB, 16-bit address, 32 B write block */
-large_eeprom_type = ((13 << SPI_DEV_TYPE_SIZE_LBN)
-		     | (2 << SPI_DEV_TYPE_ADDR_LEN_LBN)
-		     | (5 << SPI_DEV_TYPE_BLOCK_SIZE_LBN)),
-/* Default flash device: Atmel AT25F1024
- * 128 KB, 24-bit address, 32 KB erase block, 256 B write block */
-default_flash_type = ((17 << SPI_DEV_TYPE_SIZE_LBN)
-		      | (3 << SPI_DEV_TYPE_ADDR_LEN_LBN)
-		      | (0x52 << SPI_DEV_TYPE_ERASE_CMD_LBN)
-		      | (15 << SPI_DEV_TYPE_ERASE_SIZE_LBN)
-		      | (8 << SPI_DEV_TYPE_BLOCK_SIZE_LBN));
-
-/* RX FIFO XOFF watermark
- *
- * When the amount of the RX FIFO increases used increases past this
- * watermark send XOFF. Only used if RX flow control is enabled (ethtool -A)
- * This also has an effect on RX/TX arbitration
- */
-static int rx_xoff_thresh_bytes = -1;
-module_param(rx_xoff_thresh_bytes, int, 0644);
-MODULE_PARM_DESC(rx_xoff_thresh_bytes, "RX fifo XOFF threshold");
-
-/* RX FIFO XON watermark
- *
- * When the amount of the RX FIFO used decreases below this
- * watermark send XON. Only used if TX flow control is enabled (ethtool -A)
- * This also has an effect on RX/TX arbitration
- */
-static int rx_xon_thresh_bytes = -1;
-module_param(rx_xon_thresh_bytes, int, 0644);
-MODULE_PARM_DESC(rx_xon_thresh_bytes, "RX fifo XON threshold");
-
-/* TX descriptor ring size - min 512 max 4k */
-#define FALCON_TXD_RING_ORDER TX_DESCQ_SIZE_1K
-#define FALCON_TXD_RING_SIZE 1024
-#define FALCON_TXD_RING_MASK (FALCON_TXD_RING_SIZE - 1)
-
-/* RX descriptor ring size - min 512 max 4k */
-#define FALCON_RXD_RING_ORDER RX_DESCQ_SIZE_1K
-#define FALCON_RXD_RING_SIZE 1024
-#define FALCON_RXD_RING_MASK (FALCON_RXD_RING_SIZE - 1)
-
-/* Event queue size - max 32k */
-#define FALCON_EVQ_ORDER EVQ_SIZE_4K
-#define FALCON_EVQ_SIZE 4096
-#define FALCON_EVQ_MASK (FALCON_EVQ_SIZE - 1)
-
-/* If FALCON_MAX_INT_ERRORS internal errors occur within
- * FALCON_INT_ERROR_EXPIRE seconds, we consider the NIC broken and
- * disable it.
- */
-#define FALCON_INT_ERROR_EXPIRE 3600
-#define FALCON_MAX_INT_ERRORS 5
-
-/* We poll for events every FLUSH_INTERVAL ms, and check FLUSH_POLL_COUNT times
- */
-#define FALCON_FLUSH_INTERVAL 10
-#define FALCON_FLUSH_POLL_COUNT 100
-
-/**************************************************************************
- *
- * Falcon constants
- *
- **************************************************************************
- */
-
-/* DMA address mask */
-#define FALCON_DMA_MASK DMA_BIT_MASK(46)
-
-/* TX DMA length mask (13-bit) */
-#define FALCON_TX_DMA_MASK (4096 - 1)
-
-/* Size and alignment of special buffers (4KB) */
-#define FALCON_BUF_SIZE 4096
-
-/* Dummy SRAM size code */
-#define SRM_NB_BSZ_ONCHIP_ONLY (-1)
-
-#define FALCON_IS_DUAL_FUNC(efx)		\
-	(falcon_rev(efx) < FALCON_REV_B0)
-
-/**************************************************************************
- *
- * Falcon hardware access
- *
- **************************************************************************/
-
-/* Read the current event from the event queue */
-static inline efx_qword_t *falcon_event(struct efx_channel *channel,
-					unsigned int index)
-{
-	return (((efx_qword_t *) (channel->eventq.addr)) + index);
-}
-
-/* See if an event is present
- *
- * We check both the high and low dword of the event for all ones.  We
- * wrote all ones when we cleared the event, and no valid event can
- * have all ones in either its high or low dwords.  This approach is
- * robust against reordering.
- *
- * Note that using a single 64-bit comparison is incorrect; even
- * though the CPU read will be atomic, the DMA write may not be.
- */
-static inline int falcon_event_present(efx_qword_t *event)
-{
-	return (!(EFX_DWORD_IS_ALL_ONES(event->dword[0]) |
-		  EFX_DWORD_IS_ALL_ONES(event->dword[1])));
-}
-
-/**************************************************************************
- *
- * I2C bus - this is a bit-bashing interface using GPIO pins
- * Note that it uses the output enables to tristate the outputs
- * SDA is the data pin and SCL is the clock
- *
- **************************************************************************
- */
-static void falcon_setsda(void *data, int state)
-{
-	struct efx_nic *efx = (struct efx_nic *)data;
-	efx_oword_t reg;
-
-	falcon_read(efx, &reg, GPIO_CTL_REG_KER);
-	EFX_SET_OWORD_FIELD(reg, GPIO3_OEN, !state);
-	falcon_write(efx, &reg, GPIO_CTL_REG_KER);
-}
-
-static void falcon_setscl(void *data, int state)
-{
-	struct efx_nic *efx = (struct efx_nic *)data;
-	efx_oword_t reg;
-
-	falcon_read(efx, &reg, GPIO_CTL_REG_KER);
-	EFX_SET_OWORD_FIELD(reg, GPIO0_OEN, !state);
-	falcon_write(efx, &reg, GPIO_CTL_REG_KER);
-}
-
-static int falcon_getsda(void *data)
-{
-	struct efx_nic *efx = (struct efx_nic *)data;
-	efx_oword_t reg;
-
-	falcon_read(efx, &reg, GPIO_CTL_REG_KER);
-	return EFX_OWORD_FIELD(reg, GPIO3_IN);
-}
-
-static int falcon_getscl(void *data)
-{
-	struct efx_nic *efx = (struct efx_nic *)data;
-	efx_oword_t reg;
-
-	falcon_read(efx, &reg, GPIO_CTL_REG_KER);
-	return EFX_OWORD_FIELD(reg, GPIO0_IN);
-}
-
-static struct i2c_algo_bit_data falcon_i2c_bit_operations = {
-	.setsda		= falcon_setsda,
-	.setscl		= falcon_setscl,
-	.getsda		= falcon_getsda,
-	.getscl		= falcon_getscl,
-	.udelay		= 5,
-	/* Wait up to 50 ms for slave to let us pull SCL high */
-	.timeout	= DIV_ROUND_UP(HZ, 20),
-};
-
-/**************************************************************************
- *
- * Falcon special buffer handling
- * Special buffers are used for event queues and the TX and RX
- * descriptor rings.
- *
- *************************************************************************/
-
-/*
- * Initialise a Falcon special buffer
- *
- * This will define a buffer (previously allocated via
- * falcon_alloc_special_buffer()) in Falcon's buffer table, allowing
- * it to be used for event queues, descriptor rings etc.
- */
-static void
-falcon_init_special_buffer(struct efx_nic *efx,
-			   struct efx_special_buffer *buffer)
-{
-	efx_qword_t buf_desc;
-	int index;
-	dma_addr_t dma_addr;
-	int i;
-
-	EFX_BUG_ON_PARANOID(!buffer->addr);
-
-	/* Write buffer descriptors to NIC */
-	for (i = 0; i < buffer->entries; i++) {
-		index = buffer->index + i;
-		dma_addr = buffer->dma_addr + (i * 4096);
-		EFX_LOG(efx, "mapping special buffer %d at %llx\n",
-			index, (unsigned long long)dma_addr);
-		EFX_POPULATE_QWORD_4(buf_desc,
-				     IP_DAT_BUF_SIZE, IP_DAT_BUF_SIZE_4K,
-				     BUF_ADR_REGION, 0,
-				     BUF_ADR_FBUF, (dma_addr >> 12),
-				     BUF_OWNER_ID_FBUF, 0);
-		falcon_write_sram(efx, &buf_desc, index);
-	}
-}
-
-/* Unmaps a buffer from Falcon and clears the buffer table entries */
-static void
-falcon_fini_special_buffer(struct efx_nic *efx,
-			   struct efx_special_buffer *buffer)
-{
-	efx_oword_t buf_tbl_upd;
-	unsigned int start = buffer->index;
-	unsigned int end = (buffer->index + buffer->entries - 1);
-
-	if (!buffer->entries)
-		return;
-
-	EFX_LOG(efx, "unmapping special buffers %d-%d\n",
-		buffer->index, buffer->index + buffer->entries - 1);
-
-	EFX_POPULATE_OWORD_4(buf_tbl_upd,
-			     BUF_UPD_CMD, 0,
-			     BUF_CLR_CMD, 1,
-			     BUF_CLR_END_ID, end,
-			     BUF_CLR_START_ID, start);
-	falcon_write(efx, &buf_tbl_upd, BUF_TBL_UPD_REG_KER);
-}
-
-/*
- * Allocate a new Falcon special buffer
- *
- * This allocates memory for a new buffer, clears it and allocates a
- * new buffer ID range.  It does not write into Falcon's buffer table.
- *
- * This call will allocate 4KB buffers, since Falcon can't use 8KB
- * buffers for event queues and descriptor rings.
- */
-static int falcon_alloc_special_buffer(struct efx_nic *efx,
-				       struct efx_special_buffer *buffer,
-				       unsigned int len)
-{
-	struct falcon_nic_data *nic_data = efx->nic_data;
-
-	len = ALIGN(len, FALCON_BUF_SIZE);
-
-	buffer->addr = pci_alloc_consistent(efx->pci_dev, len,
-					    &buffer->dma_addr);
-	if (!buffer->addr)
-		return -ENOMEM;
-	buffer->len = len;
-	buffer->entries = len / FALCON_BUF_SIZE;
-	BUG_ON(buffer->dma_addr & (FALCON_BUF_SIZE - 1));
-
-	/* All zeros is a potentially valid event so memset to 0xff */
-	memset(buffer->addr, 0xff, len);
-
-	/* Select new buffer ID */
-	buffer->index = nic_data->next_buffer_table;
-	nic_data->next_buffer_table += buffer->entries;
-
-	EFX_LOG(efx, "allocating special buffers %d-%d at %llx+%x "
-		"(virt %p phys %llx)\n", buffer->index,
-		buffer->index + buffer->entries - 1,
-		(u64)buffer->dma_addr, len,
-		buffer->addr, (u64)virt_to_phys(buffer->addr));
-
-	return 0;
-}
-
-static void falcon_free_special_buffer(struct efx_nic *efx,
-				       struct efx_special_buffer *buffer)
-{
-	if (!buffer->addr)
-		return;
-
-	EFX_LOG(efx, "deallocating special buffers %d-%d at %llx+%x "
-		"(virt %p phys %llx)\n", buffer->index,
-		buffer->index + buffer->entries - 1,
-		(u64)buffer->dma_addr, buffer->len,
-		buffer->addr, (u64)virt_to_phys(buffer->addr));
-
-	pci_free_consistent(efx->pci_dev, buffer->len, buffer->addr,
-			    buffer->dma_addr);
-	buffer->addr = NULL;
-	buffer->entries = 0;
-}
-
-/**************************************************************************
- *
- * Falcon generic buffer handling
- * These buffers are used for interrupt status and MAC stats
- *
- **************************************************************************/
-
-static int falcon_alloc_buffer(struct efx_nic *efx,
-			       struct efx_buffer *buffer, unsigned int len)
-{
-	buffer->addr = pci_alloc_consistent(efx->pci_dev, len,
-					    &buffer->dma_addr);
-	if (!buffer->addr)
-		return -ENOMEM;
-	buffer->len = len;
-	memset(buffer->addr, 0, len);
-	return 0;
-}
-
-static void falcon_free_buffer(struct efx_nic *efx, struct efx_buffer *buffer)
-{
-	if (buffer->addr) {
-		pci_free_consistent(efx->pci_dev, buffer->len,
-				    buffer->addr, buffer->dma_addr);
-		buffer->addr = NULL;
-	}
-}
-
-/**************************************************************************
- *
- * Falcon TX path
- *
- **************************************************************************/
-
-/* Returns a pointer to the specified transmit descriptor in the TX
- * descriptor queue belonging to the specified channel.
- */
-static inline efx_qword_t *falcon_tx_desc(struct efx_tx_queue *tx_queue,
-					       unsigned int index)
-{
-	return (((efx_qword_t *) (tx_queue->txd.addr)) + index);
-}
-
-/* This writes to the TX_DESC_WPTR; write pointer for TX descriptor ring */
-static inline void falcon_notify_tx_desc(struct efx_tx_queue *tx_queue)
-{
-	unsigned write_ptr;
-	efx_dword_t reg;
-
-	write_ptr = tx_queue->write_count & FALCON_TXD_RING_MASK;
-	EFX_POPULATE_DWORD_1(reg, TX_DESC_WPTR_DWORD, write_ptr);
-	falcon_writel_page(tx_queue->efx, &reg,
-			   TX_DESC_UPD_REG_KER_DWORD, tx_queue->queue);
-}
-
-
-/* For each entry inserted into the software descriptor ring, create a
- * descriptor in the hardware TX descriptor ring (in host memory), and
- * write a doorbell.
- */
-void falcon_push_buffers(struct efx_tx_queue *tx_queue)
-{
-
-	struct efx_tx_buffer *buffer;
-	efx_qword_t *txd;
-	unsigned write_ptr;
-
-	BUG_ON(tx_queue->write_count == tx_queue->insert_count);
-
-	do {
-		write_ptr = tx_queue->write_count & FALCON_TXD_RING_MASK;
-		buffer = &tx_queue->buffer[write_ptr];
-		txd = falcon_tx_desc(tx_queue, write_ptr);
-		++tx_queue->write_count;
-
-		/* Create TX descriptor ring entry */
-		EFX_POPULATE_QWORD_5(*txd,
-				     TX_KER_PORT, 0,
-				     TX_KER_CONT, buffer->continuation,
-				     TX_KER_BYTE_CNT, buffer->len,
-				     TX_KER_BUF_REGION, 0,
-				     TX_KER_BUF_ADR, buffer->dma_addr);
-	} while (tx_queue->write_count != tx_queue->insert_count);
-
-	wmb(); /* Ensure descriptors are written before they are fetched */
-	falcon_notify_tx_desc(tx_queue);
-}
-
-/* Allocate hardware resources for a TX queue */
-int falcon_probe_tx(struct efx_tx_queue *tx_queue)
-{
-	struct efx_nic *efx = tx_queue->efx;
-	return falcon_alloc_special_buffer(efx, &tx_queue->txd,
-					   FALCON_TXD_RING_SIZE *
-					   sizeof(efx_qword_t));
-}
-
-void falcon_init_tx(struct efx_tx_queue *tx_queue)
-{
-	efx_oword_t tx_desc_ptr;
-	struct efx_nic *efx = tx_queue->efx;
-
-	tx_queue->flushed = false;
-
-	/* Pin TX descriptor ring */
-	falcon_init_special_buffer(efx, &tx_queue->txd);
-
-	/* Push TX descriptor ring to card */
-	EFX_POPULATE_OWORD_10(tx_desc_ptr,
-			      TX_DESCQ_EN, 1,
-			      TX_ISCSI_DDIG_EN, 0,
-			      TX_ISCSI_HDIG_EN, 0,
-			      TX_DESCQ_BUF_BASE_ID, tx_queue->txd.index,
-			      TX_DESCQ_EVQ_ID, tx_queue->channel->channel,
-			      TX_DESCQ_OWNER_ID, 0,
-			      TX_DESCQ_LABEL, tx_queue->queue,
-			      TX_DESCQ_SIZE, FALCON_TXD_RING_ORDER,
-			      TX_DESCQ_TYPE, 0,
-			      TX_NON_IP_DROP_DIS_B0, 1);
-
-	if (falcon_rev(efx) >= FALCON_REV_B0) {
-		int csum = tx_queue->queue == EFX_TX_QUEUE_OFFLOAD_CSUM;
-		EFX_SET_OWORD_FIELD(tx_desc_ptr, TX_IP_CHKSM_DIS_B0, !csum);
-		EFX_SET_OWORD_FIELD(tx_desc_ptr, TX_TCP_CHKSM_DIS_B0, !csum);
-	}
-
-	falcon_write_table(efx, &tx_desc_ptr, efx->type->txd_ptr_tbl_base,
-			   tx_queue->queue);
-
-	if (falcon_rev(efx) < FALCON_REV_B0) {
-		efx_oword_t reg;
-
-		/* Only 128 bits in this register */
-		BUILD_BUG_ON(EFX_TX_QUEUE_COUNT >= 128);
-
-		falcon_read(efx, &reg, TX_CHKSM_CFG_REG_KER_A1);
-		if (tx_queue->queue == EFX_TX_QUEUE_OFFLOAD_CSUM)
-			clear_bit_le(tx_queue->queue, (void *)&reg);
-		else
-			set_bit_le(tx_queue->queue, (void *)&reg);
-		falcon_write(efx, &reg, TX_CHKSM_CFG_REG_KER_A1);
-	}
-}
-
-static void falcon_flush_tx_queue(struct efx_tx_queue *tx_queue)
-{
-	struct efx_nic *efx = tx_queue->efx;
-	efx_oword_t tx_flush_descq;
-
-	/* Post a flush command */
-	EFX_POPULATE_OWORD_2(tx_flush_descq,
-			     TX_FLUSH_DESCQ_CMD, 1,
-			     TX_FLUSH_DESCQ, tx_queue->queue);
-	falcon_write(efx, &tx_flush_descq, TX_FLUSH_DESCQ_REG_KER);
-}
-
-void falcon_fini_tx(struct efx_tx_queue *tx_queue)
-{
-	struct efx_nic *efx = tx_queue->efx;
-	efx_oword_t tx_desc_ptr;
-
-	/* The queue should have been flushed */
-	WARN_ON(!tx_queue->flushed);
-
-	/* Remove TX descriptor ring from card */
-	EFX_ZERO_OWORD(tx_desc_ptr);
-	falcon_write_table(efx, &tx_desc_ptr, efx->type->txd_ptr_tbl_base,
-			   tx_queue->queue);
-
-	/* Unpin TX descriptor ring */
-	falcon_fini_special_buffer(efx, &tx_queue->txd);
-}
-
-/* Free buffers backing TX queue */
-void falcon_remove_tx(struct efx_tx_queue *tx_queue)
-{
-	falcon_free_special_buffer(tx_queue->efx, &tx_queue->txd);
-}
-
-/**************************************************************************
- *
- * Falcon RX path
- *
- **************************************************************************/
-
-/* Returns a pointer to the specified descriptor in the RX descriptor queue */
-static inline efx_qword_t *falcon_rx_desc(struct efx_rx_queue *rx_queue,
-					       unsigned int index)
-{
-	return (((efx_qword_t *) (rx_queue->rxd.addr)) + index);
-}
-
-/* This creates an entry in the RX descriptor queue */
-static inline void falcon_build_rx_desc(struct efx_rx_queue *rx_queue,
-					unsigned index)
-{
-	struct efx_rx_buffer *rx_buf;
-	efx_qword_t *rxd;
-
-	rxd = falcon_rx_desc(rx_queue, index);
-	rx_buf = efx_rx_buffer(rx_queue, index);
-	EFX_POPULATE_QWORD_3(*rxd,
-			     RX_KER_BUF_SIZE,
-			     rx_buf->len -
-			     rx_queue->efx->type->rx_buffer_padding,
-			     RX_KER_BUF_REGION, 0,
-			     RX_KER_BUF_ADR, rx_buf->dma_addr);
-}
-
-/* This writes to the RX_DESC_WPTR register for the specified receive
- * descriptor ring.
- */
-void falcon_notify_rx_desc(struct efx_rx_queue *rx_queue)
-{
-	efx_dword_t reg;
-	unsigned write_ptr;
-
-	while (rx_queue->notified_count != rx_queue->added_count) {
-		falcon_build_rx_desc(rx_queue,
-				     rx_queue->notified_count &
-				     FALCON_RXD_RING_MASK);
-		++rx_queue->notified_count;
-	}
-
-	wmb();
-	write_ptr = rx_queue->added_count & FALCON_RXD_RING_MASK;
-	EFX_POPULATE_DWORD_1(reg, RX_DESC_WPTR_DWORD, write_ptr);
-	falcon_writel_page(rx_queue->efx, &reg,
-			   RX_DESC_UPD_REG_KER_DWORD, rx_queue->queue);
-}
-
-int falcon_probe_rx(struct efx_rx_queue *rx_queue)
-{
-	struct efx_nic *efx = rx_queue->efx;
-	return falcon_alloc_special_buffer(efx, &rx_queue->rxd,
-					   FALCON_RXD_RING_SIZE *
-					   sizeof(efx_qword_t));
-}
-
-void falcon_init_rx(struct efx_rx_queue *rx_queue)
-{
-	efx_oword_t rx_desc_ptr;
-	struct efx_nic *efx = rx_queue->efx;
-	bool is_b0 = falcon_rev(efx) >= FALCON_REV_B0;
-	bool iscsi_digest_en = is_b0;
-
-	EFX_LOG(efx, "RX queue %d ring in special buffers %d-%d\n",
-		rx_queue->queue, rx_queue->rxd.index,
-		rx_queue->rxd.index + rx_queue->rxd.entries - 1);
-
-	rx_queue->flushed = false;
-
-	/* Pin RX descriptor ring */
-	falcon_init_special_buffer(efx, &rx_queue->rxd);
-
-	/* Push RX descriptor ring to card */
-	EFX_POPULATE_OWORD_10(rx_desc_ptr,
-			      RX_ISCSI_DDIG_EN, iscsi_digest_en,
-			      RX_ISCSI_HDIG_EN, iscsi_digest_en,
-			      RX_DESCQ_BUF_BASE_ID, rx_queue->rxd.index,
-			      RX_DESCQ_EVQ_ID, rx_queue->channel->channel,
-			      RX_DESCQ_OWNER_ID, 0,
-			      RX_DESCQ_LABEL, rx_queue->queue,
-			      RX_DESCQ_SIZE, FALCON_RXD_RING_ORDER,
-			      RX_DESCQ_TYPE, 0 /* kernel queue */ ,
-			      /* For >=B0 this is scatter so disable */
-			      RX_DESCQ_JUMBO, !is_b0,
-			      RX_DESCQ_EN, 1);
-	falcon_write_table(efx, &rx_desc_ptr, efx->type->rxd_ptr_tbl_base,
-			   rx_queue->queue);
-}
-
-static void falcon_flush_rx_queue(struct efx_rx_queue *rx_queue)
-{
-	struct efx_nic *efx = rx_queue->efx;
-	efx_oword_t rx_flush_descq;
-
-	/* Post a flush command */
-	EFX_POPULATE_OWORD_2(rx_flush_descq,
-			     RX_FLUSH_DESCQ_CMD, 1,
-			     RX_FLUSH_DESCQ, rx_queue->queue);
-	falcon_write(efx, &rx_flush_descq, RX_FLUSH_DESCQ_REG_KER);
-}
-
-void falcon_fini_rx(struct efx_rx_queue *rx_queue)
-{
-	efx_oword_t rx_desc_ptr;
-	struct efx_nic *efx = rx_queue->efx;
-
-	/* The queue should already have been flushed */
-	WARN_ON(!rx_queue->flushed);
-
-	/* Remove RX descriptor ring from card */
-	EFX_ZERO_OWORD(rx_desc_ptr);
-	falcon_write_table(efx, &rx_desc_ptr, efx->type->rxd_ptr_tbl_base,
-			   rx_queue->queue);
-
-	/* Unpin RX descriptor ring */
-	falcon_fini_special_buffer(efx, &rx_queue->rxd);
-}
-
-/* Free buffers backing RX queue */
-void falcon_remove_rx(struct efx_rx_queue *rx_queue)
-{
-	falcon_free_special_buffer(rx_queue->efx, &rx_queue->rxd);
-}
-
-/**************************************************************************
- *
- * Falcon event queue processing
- * Event queues are processed by per-channel tasklets.
- *
- **************************************************************************/
-
-/* Update a channel's event queue's read pointer (RPTR) register
- *
- * This writes the EVQ_RPTR_REG register for the specified channel's
- * event queue.
- *
- * Note that EVQ_RPTR_REG contains the index of the "last read" event,
- * whereas channel->eventq_read_ptr contains the index of the "next to
- * read" event.
- */
-void falcon_eventq_read_ack(struct efx_channel *channel)
-{
-	efx_dword_t reg;
-	struct efx_nic *efx = channel->efx;
-
-	EFX_POPULATE_DWORD_1(reg, EVQ_RPTR_DWORD, channel->eventq_read_ptr);
-	falcon_writel_table(efx, &reg, efx->type->evq_rptr_tbl_base,
-			    channel->channel);
-}
-
-/* Use HW to insert a SW defined event */
-void falcon_generate_event(struct efx_channel *channel, efx_qword_t *event)
-{
-	efx_oword_t drv_ev_reg;
-
-	EFX_POPULATE_OWORD_2(drv_ev_reg,
-			     DRV_EV_QID, channel->channel,
-			     DRV_EV_DATA,
-			     EFX_QWORD_FIELD64(*event, WHOLE_EVENT));
-	falcon_write(channel->efx, &drv_ev_reg, DRV_EV_REG_KER);
-}
-
-/* Handle a transmit completion event
- *
- * Falcon batches TX completion events; the message we receive is of
- * the form "complete all TX events up to this index".
- */
-static void falcon_handle_tx_event(struct efx_channel *channel,
-				   efx_qword_t *event)
-{
-	unsigned int tx_ev_desc_ptr;
-	unsigned int tx_ev_q_label;
-	struct efx_tx_queue *tx_queue;
-	struct efx_nic *efx = channel->efx;
-
-	if (likely(EFX_QWORD_FIELD(*event, TX_EV_COMP))) {
-		/* Transmit completion */
-		tx_ev_desc_ptr = EFX_QWORD_FIELD(*event, TX_EV_DESC_PTR);
-		tx_ev_q_label = EFX_QWORD_FIELD(*event, TX_EV_Q_LABEL);
-		tx_queue = &efx->tx_queue[tx_ev_q_label];
-		channel->irq_mod_score +=
-			(tx_ev_desc_ptr - tx_queue->read_count) &
-			efx->type->txd_ring_mask;
-		efx_xmit_done(tx_queue, tx_ev_desc_ptr);
-	} else if (EFX_QWORD_FIELD(*event, TX_EV_WQ_FF_FULL)) {
-		/* Rewrite the FIFO write pointer */
-		tx_ev_q_label = EFX_QWORD_FIELD(*event, TX_EV_Q_LABEL);
-		tx_queue = &efx->tx_queue[tx_ev_q_label];
-
-		if (efx_dev_registered(efx))
-			netif_tx_lock(efx->net_dev);
-		falcon_notify_tx_desc(tx_queue);
-		if (efx_dev_registered(efx))
-			netif_tx_unlock(efx->net_dev);
-	} else if (EFX_QWORD_FIELD(*event, TX_EV_PKT_ERR) &&
-		   EFX_WORKAROUND_10727(efx)) {
-		efx_schedule_reset(efx, RESET_TYPE_TX_DESC_FETCH);
-	} else {
-		EFX_ERR(efx, "channel %d unexpected TX event "
-			EFX_QWORD_FMT"\n", channel->channel,
-			EFX_QWORD_VAL(*event));
-	}
-}
-
-/* Detect errors included in the rx_evt_pkt_ok bit. */
-static void falcon_handle_rx_not_ok(struct efx_rx_queue *rx_queue,
-				    const efx_qword_t *event,
-				    bool *rx_ev_pkt_ok,
-				    bool *discard)
-{
-	struct efx_nic *efx = rx_queue->efx;
-	bool rx_ev_buf_owner_id_err, rx_ev_ip_hdr_chksum_err;
-	bool rx_ev_tcp_udp_chksum_err, rx_ev_eth_crc_err;
-	bool rx_ev_frm_trunc, rx_ev_drib_nib, rx_ev_tobe_disc;
-	bool rx_ev_other_err, rx_ev_pause_frm;
-	bool rx_ev_ip_frag_err, rx_ev_hdr_type, rx_ev_mcast_pkt;
-	unsigned rx_ev_pkt_type;
-
-	rx_ev_hdr_type = EFX_QWORD_FIELD(*event, RX_EV_HDR_TYPE);
-	rx_ev_mcast_pkt = EFX_QWORD_FIELD(*event, RX_EV_MCAST_PKT);
-	rx_ev_tobe_disc = EFX_QWORD_FIELD(*event, RX_EV_TOBE_DISC);
-	rx_ev_pkt_type = EFX_QWORD_FIELD(*event, RX_EV_PKT_TYPE);
-	rx_ev_buf_owner_id_err = EFX_QWORD_FIELD(*event,
-						 RX_EV_BUF_OWNER_ID_ERR);
-	rx_ev_ip_frag_err = EFX_QWORD_FIELD(*event, RX_EV_IF_FRAG_ERR);
-	rx_ev_ip_hdr_chksum_err = EFX_QWORD_FIELD(*event,
-						  RX_EV_IP_HDR_CHKSUM_ERR);
-	rx_ev_tcp_udp_chksum_err = EFX_QWORD_FIELD(*event,
-						   RX_EV_TCP_UDP_CHKSUM_ERR);
-	rx_ev_eth_crc_err = EFX_QWORD_FIELD(*event, RX_EV_ETH_CRC_ERR);
-	rx_ev_frm_trunc = EFX_QWORD_FIELD(*event, RX_EV_FRM_TRUNC);
-	rx_ev_drib_nib = ((falcon_rev(efx) >= FALCON_REV_B0) ?
-			  0 : EFX_QWORD_FIELD(*event, RX_EV_DRIB_NIB));
-	rx_ev_pause_frm = EFX_QWORD_FIELD(*event, RX_EV_PAUSE_FRM_ERR);
-
-	/* Every error apart from tobe_disc and pause_frm */
-	rx_ev_other_err = (rx_ev_drib_nib | rx_ev_tcp_udp_chksum_err |
-			   rx_ev_buf_owner_id_err | rx_ev_eth_crc_err |
-			   rx_ev_frm_trunc | rx_ev_ip_hdr_chksum_err);
-
-	/* Count errors that are not in MAC stats.  Ignore expected
-	 * checksum errors during self-test. */
-	if (rx_ev_frm_trunc)
-		++rx_queue->channel->n_rx_frm_trunc;
-	else if (rx_ev_tobe_disc)
-		++rx_queue->channel->n_rx_tobe_disc;
-	else if (!efx->loopback_selftest) {
-		if (rx_ev_ip_hdr_chksum_err)
-			++rx_queue->channel->n_rx_ip_hdr_chksum_err;
-		else if (rx_ev_tcp_udp_chksum_err)
-			++rx_queue->channel->n_rx_tcp_udp_chksum_err;
-	}
-	if (rx_ev_ip_frag_err)
-		++rx_queue->channel->n_rx_ip_frag_err;
-
-	/* The frame must be discarded if any of these are true. */
-	*discard = (rx_ev_eth_crc_err | rx_ev_frm_trunc | rx_ev_drib_nib |
-		    rx_ev_tobe_disc | rx_ev_pause_frm);
-
-	/* TOBE_DISC is expected on unicast mismatches; don't print out an
-	 * error message.  FRM_TRUNC indicates RXDP dropped the packet due
-	 * to a FIFO overflow.
-	 */
-#ifdef EFX_ENABLE_DEBUG
-	if (rx_ev_other_err) {
-		EFX_INFO_RL(efx, " RX queue %d unexpected RX event "
-			    EFX_QWORD_FMT "%s%s%s%s%s%s%s%s\n",
-			    rx_queue->queue, EFX_QWORD_VAL(*event),
-			    rx_ev_buf_owner_id_err ? " [OWNER_ID_ERR]" : "",
-			    rx_ev_ip_hdr_chksum_err ?
-			    " [IP_HDR_CHKSUM_ERR]" : "",
-			    rx_ev_tcp_udp_chksum_err ?
-			    " [TCP_UDP_CHKSUM_ERR]" : "",
-			    rx_ev_eth_crc_err ? " [ETH_CRC_ERR]" : "",
-			    rx_ev_frm_trunc ? " [FRM_TRUNC]" : "",
-			    rx_ev_drib_nib ? " [DRIB_NIB]" : "",
-			    rx_ev_tobe_disc ? " [TOBE_DISC]" : "",
-			    rx_ev_pause_frm ? " [PAUSE]" : "");
-	}
-#endif
-}
-
-/* Handle receive events that are not in-order. */
-static void falcon_handle_rx_bad_index(struct efx_rx_queue *rx_queue,
-				       unsigned index)
-{
-	struct efx_nic *efx = rx_queue->efx;
-	unsigned expected, dropped;
-
-	expected = rx_queue->removed_count & FALCON_RXD_RING_MASK;
-	dropped = ((index + FALCON_RXD_RING_SIZE - expected) &
-		   FALCON_RXD_RING_MASK);
-	EFX_INFO(efx, "dropped %d events (index=%d expected=%d)\n",
-		dropped, index, expected);
-
-	efx_schedule_reset(efx, EFX_WORKAROUND_5676(efx) ?
-			   RESET_TYPE_RX_RECOVERY : RESET_TYPE_DISABLE);
-}
-
-/* Handle a packet received event
- *
- * Falcon silicon gives a "discard" flag if it's a unicast packet with the
- * wrong destination address
- * Also "is multicast" and "matches multicast filter" flags can be used to
- * discard non-matching multicast packets.
- */
-static void falcon_handle_rx_event(struct efx_channel *channel,
-				   const efx_qword_t *event)
-{
-	unsigned int rx_ev_desc_ptr, rx_ev_byte_cnt;
-	unsigned int rx_ev_hdr_type, rx_ev_mcast_pkt;
-	unsigned expected_ptr;
-	bool rx_ev_pkt_ok, discard = false, checksummed;
-	struct efx_rx_queue *rx_queue;
-	struct efx_nic *efx = channel->efx;
-
-	/* Basic packet information */
-	rx_ev_byte_cnt = EFX_QWORD_FIELD(*event, RX_EV_BYTE_CNT);
-	rx_ev_pkt_ok = EFX_QWORD_FIELD(*event, RX_EV_PKT_OK);
-	rx_ev_hdr_type = EFX_QWORD_FIELD(*event, RX_EV_HDR_TYPE);
-	WARN_ON(EFX_QWORD_FIELD(*event, RX_EV_JUMBO_CONT));
-	WARN_ON(EFX_QWORD_FIELD(*event, RX_EV_SOP) != 1);
-	WARN_ON(EFX_QWORD_FIELD(*event, RX_EV_Q_LABEL) != channel->channel);
-
-	rx_queue = &efx->rx_queue[channel->channel];
-
-	rx_ev_desc_ptr = EFX_QWORD_FIELD(*event, RX_EV_DESC_PTR);
-	expected_ptr = rx_queue->removed_count & FALCON_RXD_RING_MASK;
-	if (unlikely(rx_ev_desc_ptr != expected_ptr))
-		falcon_handle_rx_bad_index(rx_queue, rx_ev_desc_ptr);
-
-	if (likely(rx_ev_pkt_ok)) {
-		/* If packet is marked as OK and packet type is TCP/IPv4 or
-		 * UDP/IPv4, then we can rely on the hardware checksum.
-		 */
-		checksummed = RX_EV_HDR_TYPE_HAS_CHECKSUMS(rx_ev_hdr_type);
-	} else {
-		falcon_handle_rx_not_ok(rx_queue, event, &rx_ev_pkt_ok,
-					&discard);
-		checksummed = false;
-	}
-
-	/* Detect multicast packets that didn't match the filter */
-	rx_ev_mcast_pkt = EFX_QWORD_FIELD(*event, RX_EV_MCAST_PKT);
-	if (rx_ev_mcast_pkt) {
-		unsigned int rx_ev_mcast_hash_match =
-			EFX_QWORD_FIELD(*event, RX_EV_MCAST_HASH_MATCH);
-
-		if (unlikely(!rx_ev_mcast_hash_match))
-			discard = true;
-	}
-
-	channel->irq_mod_score += 2;
-
-	/* Handle received packet */
-	efx_rx_packet(rx_queue, rx_ev_desc_ptr, rx_ev_byte_cnt,
-		      checksummed, discard);
-}
-
-/* Global events are basically PHY events */
-static void falcon_handle_global_event(struct efx_channel *channel,
-				       efx_qword_t *event)
-{
-	struct efx_nic *efx = channel->efx;
-	bool handled = false;
-
-	if (EFX_QWORD_FIELD(*event, G_PHY0_INTR) ||
-	    EFX_QWORD_FIELD(*event, G_PHY1_INTR) ||
-	    EFX_QWORD_FIELD(*event, XG_PHY_INTR) ||
-	    EFX_QWORD_FIELD(*event, XFP_PHY_INTR)) {
-		efx->phy_op->clear_interrupt(efx);
-		queue_work(efx->workqueue, &efx->phy_work);
-		handled = true;
-	}
-
-	if ((falcon_rev(efx) >= FALCON_REV_B0) &&
-	    EFX_QWORD_FIELD(*event, XG_MNT_INTR_B0)) {
-		queue_work(efx->workqueue, &efx->mac_work);
-		handled = true;
-	}
-
-	if (EFX_QWORD_FIELD_VER(efx, *event, RX_RECOVERY)) {
-		EFX_ERR(efx, "channel %d seen global RX_RESET "
-			"event. Resetting.\n", channel->channel);
-
-		atomic_inc(&efx->rx_reset);
-		efx_schedule_reset(efx, EFX_WORKAROUND_6555(efx) ?
-				   RESET_TYPE_RX_RECOVERY : RESET_TYPE_DISABLE);
-		handled = true;
-	}
-
-	if (!handled)
-		EFX_ERR(efx, "channel %d unknown global event "
-			EFX_QWORD_FMT "\n", channel->channel,
-			EFX_QWORD_VAL(*event));
-}
-
-static void falcon_handle_driver_event(struct efx_channel *channel,
-				       efx_qword_t *event)
-{
-	struct efx_nic *efx = channel->efx;
-	unsigned int ev_sub_code;
-	unsigned int ev_sub_data;
-
-	ev_sub_code = EFX_QWORD_FIELD(*event, DRIVER_EV_SUB_CODE);
-	ev_sub_data = EFX_QWORD_FIELD(*event, DRIVER_EV_SUB_DATA);
-
-	switch (ev_sub_code) {
-	case TX_DESCQ_FLS_DONE_EV_DECODE:
-		EFX_TRACE(efx, "channel %d TXQ %d flushed\n",
-			  channel->channel, ev_sub_data);
-		break;
-	case RX_DESCQ_FLS_DONE_EV_DECODE:
-		EFX_TRACE(efx, "channel %d RXQ %d flushed\n",
-			  channel->channel, ev_sub_data);
-		break;
-	case EVQ_INIT_DONE_EV_DECODE:
-		EFX_LOG(efx, "channel %d EVQ %d initialised\n",
-			channel->channel, ev_sub_data);
-		break;
-	case SRM_UPD_DONE_EV_DECODE:
-		EFX_TRACE(efx, "channel %d SRAM update done\n",
-			  channel->channel);
-		break;
-	case WAKE_UP_EV_DECODE:
-		EFX_TRACE(efx, "channel %d RXQ %d wakeup event\n",
-			  channel->channel, ev_sub_data);
-		break;
-	case TIMER_EV_DECODE:
-		EFX_TRACE(efx, "channel %d RX queue %d timer expired\n",
-			  channel->channel, ev_sub_data);
-		break;
-	case RX_RECOVERY_EV_DECODE:
-		EFX_ERR(efx, "channel %d seen DRIVER RX_RESET event. "
-			"Resetting.\n", channel->channel);
-		atomic_inc(&efx->rx_reset);
-		efx_schedule_reset(efx,
-				   EFX_WORKAROUND_6555(efx) ?
-				   RESET_TYPE_RX_RECOVERY :
-				   RESET_TYPE_DISABLE);
-		break;
-	case RX_DSC_ERROR_EV_DECODE:
-		EFX_ERR(efx, "RX DMA Q %d reports descriptor fetch error."
-			" RX Q %d is disabled.\n", ev_sub_data, ev_sub_data);
-		efx_schedule_reset(efx, RESET_TYPE_RX_DESC_FETCH);
-		break;
-	case TX_DSC_ERROR_EV_DECODE:
-		EFX_ERR(efx, "TX DMA Q %d reports descriptor fetch error."
-			" TX Q %d is disabled.\n", ev_sub_data, ev_sub_data);
-		efx_schedule_reset(efx, RESET_TYPE_TX_DESC_FETCH);
-		break;
-	default:
-		EFX_TRACE(efx, "channel %d unknown driver event code %d "
-			  "data %04x\n", channel->channel, ev_sub_code,
-			  ev_sub_data);
-		break;
-	}
-}
-
-int falcon_process_eventq(struct efx_channel *channel, int rx_quota)
-{
-	unsigned int read_ptr;
-	efx_qword_t event, *p_event;
-	int ev_code;
-	int rx_packets = 0;
-
-	read_ptr = channel->eventq_read_ptr;
-
-	do {
-		p_event = falcon_event(channel, read_ptr);
-		event = *p_event;
-
-		if (!falcon_event_present(&event))
-			/* End of events */
-			break;
-
-		EFX_TRACE(channel->efx, "channel %d event is "EFX_QWORD_FMT"\n",
-			  channel->channel, EFX_QWORD_VAL(event));
-
-		/* Clear this event by marking it all ones */
-		EFX_SET_QWORD(*p_event);
-
-		ev_code = EFX_QWORD_FIELD(event, EV_CODE);
-
-		switch (ev_code) {
-		case RX_IP_EV_DECODE:
-			falcon_handle_rx_event(channel, &event);
-			++rx_packets;
-			break;
-		case TX_IP_EV_DECODE:
-			falcon_handle_tx_event(channel, &event);
-			break;
-		case DRV_GEN_EV_DECODE:
-			channel->eventq_magic
-				= EFX_QWORD_FIELD(event, EVQ_MAGIC);
-			EFX_LOG(channel->efx, "channel %d received generated "
-				"event "EFX_QWORD_FMT"\n", channel->channel,
-				EFX_QWORD_VAL(event));
-			break;
-		case GLOBAL_EV_DECODE:
-			falcon_handle_global_event(channel, &event);
-			break;
-		case DRIVER_EV_DECODE:
-			falcon_handle_driver_event(channel, &event);
-			break;
-		default:
-			EFX_ERR(channel->efx, "channel %d unknown event type %d"
-				" (data " EFX_QWORD_FMT ")\n", channel->channel,
-				ev_code, EFX_QWORD_VAL(event));
-		}
-
-		/* Increment read pointer */
-		read_ptr = (read_ptr + 1) & FALCON_EVQ_MASK;
-
-	} while (rx_packets < rx_quota);
-
-	channel->eventq_read_ptr = read_ptr;
-	return rx_packets;
-}
-
-void falcon_set_int_moderation(struct efx_channel *channel)
-{
-	efx_dword_t timer_cmd;
-	struct efx_nic *efx = channel->efx;
-
-	/* Set timer register */
-	if (channel->irq_moderation) {
-		/* Round to resolution supported by hardware.  The value we
-		 * program is based at 0.  So actual interrupt moderation
-		 * achieved is ((x + 1) * res).
-		 */
-		channel->irq_moderation -= (channel->irq_moderation %
-					    FALCON_IRQ_MOD_RESOLUTION);
-		if (channel->irq_moderation < FALCON_IRQ_MOD_RESOLUTION)
-			channel->irq_moderation = FALCON_IRQ_MOD_RESOLUTION;
-		EFX_POPULATE_DWORD_2(timer_cmd,
-				     TIMER_MODE, TIMER_MODE_INT_HLDOFF,
-				     TIMER_VAL,
-				     channel->irq_moderation /
-				     FALCON_IRQ_MOD_RESOLUTION - 1);
-	} else {
-		EFX_POPULATE_DWORD_2(timer_cmd,
-				     TIMER_MODE, TIMER_MODE_DIS,
-				     TIMER_VAL, 0);
-	}
-	falcon_writel_page_locked(efx, &timer_cmd, TIMER_CMD_REG_KER,
-				  channel->channel);
-
-}
-
-/* Allocate buffer table entries for event queue */
-int falcon_probe_eventq(struct efx_channel *channel)
-{
-	struct efx_nic *efx = channel->efx;
-	unsigned int evq_size;
-
-	evq_size = FALCON_EVQ_SIZE * sizeof(efx_qword_t);
-	return falcon_alloc_special_buffer(efx, &channel->eventq, evq_size);
-}
-
-void falcon_init_eventq(struct efx_channel *channel)
-{
-	efx_oword_t evq_ptr;
-	struct efx_nic *efx = channel->efx;
-
-	EFX_LOG(efx, "channel %d event queue in special buffers %d-%d\n",
-		channel->channel, channel->eventq.index,
-		channel->eventq.index + channel->eventq.entries - 1);
-
-	/* Pin event queue buffer */
-	falcon_init_special_buffer(efx, &channel->eventq);
-
-	/* Fill event queue with all ones (i.e. empty events) */
-	memset(channel->eventq.addr, 0xff, channel->eventq.len);
-
-	/* Push event queue to card */
-	EFX_POPULATE_OWORD_3(evq_ptr,
-			     EVQ_EN, 1,
-			     EVQ_SIZE, FALCON_EVQ_ORDER,
-			     EVQ_BUF_BASE_ID, channel->eventq.index);
-	falcon_write_table(efx, &evq_ptr, efx->type->evq_ptr_tbl_base,
-			   channel->channel);
-
-	falcon_set_int_moderation(channel);
-}
-
-void falcon_fini_eventq(struct efx_channel *channel)
-{
-	efx_oword_t eventq_ptr;
-	struct efx_nic *efx = channel->efx;
-
-	/* Remove event queue from card */
-	EFX_ZERO_OWORD(eventq_ptr);
-	falcon_write_table(efx, &eventq_ptr, efx->type->evq_ptr_tbl_base,
-			   channel->channel);
-
-	/* Unpin event queue */
-	falcon_fini_special_buffer(efx, &channel->eventq);
-}
-
-/* Free buffers backing event queue */
-void falcon_remove_eventq(struct efx_channel *channel)
-{
-	falcon_free_special_buffer(channel->efx, &channel->eventq);
-}
+/* Hardware control for SFC4000 (aka Falcon). */
 
+static const unsigned int
+/* "Large" EEPROM device: Atmel AT25640 or similar
+ * 8 KB, 16-bit address, 32 B write block */
+large_eeprom_type = ((13 << SPI_DEV_TYPE_SIZE_LBN)
+		     | (2 << SPI_DEV_TYPE_ADDR_LEN_LBN)
+		     | (5 << SPI_DEV_TYPE_BLOCK_SIZE_LBN)),
+/* Default flash device: Atmel AT25F1024
+ * 128 KB, 24-bit address, 32 KB erase block, 256 B write block */
+default_flash_type = ((17 << SPI_DEV_TYPE_SIZE_LBN)
+		      | (3 << SPI_DEV_TYPE_ADDR_LEN_LBN)
+		      | (0x52 << SPI_DEV_TYPE_ERASE_CMD_LBN)
+		      | (15 << SPI_DEV_TYPE_ERASE_SIZE_LBN)
+		      | (8 << SPI_DEV_TYPE_BLOCK_SIZE_LBN));
 
-/* Generates a test event on the event queue.  A subsequent call to
- * process_eventq() should pick up the event and place the value of
- * "magic" into channel->eventq_magic;
+/**************************************************************************
+ *
+ * I2C bus - this is a bit-bashing interface using GPIO pins
+ * Note that it uses the output enables to tristate the outputs
+ * SDA is the data pin and SCL is the clock
+ *
+ **************************************************************************
  */
-void falcon_generate_test_event(struct efx_channel *channel, unsigned int magic)
+static void falcon_setsda(void *data, int state)
 {
-	efx_qword_t test_event;
+	struct efx_nic *efx = (struct efx_nic *)data;
+	efx_oword_t reg;
 
-	EFX_POPULATE_QWORD_2(test_event,
-			     EV_CODE, DRV_GEN_EV_DECODE,
-			     EVQ_MAGIC, magic);
-	falcon_generate_event(channel, &test_event);
+	efx_reado(efx, &reg, FR_AB_GPIO_CTL);
+	EFX_SET_OWORD_FIELD(reg, FRF_AB_GPIO3_OEN, !state);
+	efx_writeo(efx, &reg, FR_AB_GPIO_CTL);
 }
 
-void falcon_sim_phy_event(struct efx_nic *efx)
+static void falcon_setscl(void *data, int state)
 {
-	efx_qword_t phy_event;
-
-	EFX_POPULATE_QWORD_1(phy_event, EV_CODE, GLOBAL_EV_DECODE);
-	if (EFX_IS10G(efx))
-		EFX_SET_QWORD_FIELD(phy_event, XG_PHY_INTR, 1);
-	else
-		EFX_SET_QWORD_FIELD(phy_event, G_PHY0_INTR, 1);
+	struct efx_nic *efx = (struct efx_nic *)data;
+	efx_oword_t reg;
 
-	falcon_generate_event(&efx->channel[0], &phy_event);
+	efx_reado(efx, &reg, FR_AB_GPIO_CTL);
+	EFX_SET_OWORD_FIELD(reg, FRF_AB_GPIO0_OEN, !state);
+	efx_writeo(efx, &reg, FR_AB_GPIO_CTL);
 }
 
-/**************************************************************************
- *
- * Flush handling
- *
- **************************************************************************/
-
-
-static void falcon_poll_flush_events(struct efx_nic *efx)
+static int falcon_getsda(void *data)
 {
-	struct efx_channel *channel = &efx->channel[0];
-	struct efx_tx_queue *tx_queue;
-	struct efx_rx_queue *rx_queue;
-	unsigned int read_ptr = channel->eventq_read_ptr;
-	unsigned int end_ptr = (read_ptr - 1) & FALCON_EVQ_MASK;
-
-	do {
-		efx_qword_t *event = falcon_event(channel, read_ptr);
-		int ev_code, ev_sub_code, ev_queue;
-		bool ev_failed;
-
-		if (!falcon_event_present(event))
-			break;
-
-		ev_code = EFX_QWORD_FIELD(*event, EV_CODE);
-		ev_sub_code = EFX_QWORD_FIELD(*event, DRIVER_EV_SUB_CODE);
-		if (ev_code == DRIVER_EV_DECODE &&
-		    ev_sub_code == TX_DESCQ_FLS_DONE_EV_DECODE) {
-			ev_queue = EFX_QWORD_FIELD(*event,
-						   DRIVER_EV_TX_DESCQ_ID);
-			if (ev_queue < EFX_TX_QUEUE_COUNT) {
-				tx_queue = efx->tx_queue + ev_queue;
-				tx_queue->flushed = true;
-			}
-		} else if (ev_code == DRIVER_EV_DECODE &&
-			   ev_sub_code == RX_DESCQ_FLS_DONE_EV_DECODE) {
-			ev_queue = EFX_QWORD_FIELD(*event,
-						   DRIVER_EV_RX_DESCQ_ID);
-			ev_failed = EFX_QWORD_FIELD(*event,
-						    DRIVER_EV_RX_FLUSH_FAIL);
-			if (ev_queue < efx->n_rx_queues) {
-				rx_queue = efx->rx_queue + ev_queue;
-
-				/* retry the rx flush */
-				if (ev_failed)
-					falcon_flush_rx_queue(rx_queue);
-				else
-					rx_queue->flushed = true;
-			}
-		}
+	struct efx_nic *efx = (struct efx_nic *)data;
+	efx_oword_t reg;
 
-		read_ptr = (read_ptr + 1) & FALCON_EVQ_MASK;
-	} while (read_ptr != end_ptr);
+	efx_reado(efx, &reg, FR_AB_GPIO_CTL);
+	return EFX_OWORD_FIELD(reg, FRF_AB_GPIO3_IN);
 }
 
-/* Handle tx and rx flushes at the same time, since they run in
- * parallel in the hardware and there's no reason for us to
- * serialise them */
-int falcon_flush_queues(struct efx_nic *efx)
+static int falcon_getscl(void *data)
 {
-	struct efx_rx_queue *rx_queue;
-	struct efx_tx_queue *tx_queue;
-	int i;
-	bool outstanding;
-
-	/* Issue flush requests */
-	efx_for_each_tx_queue(tx_queue, efx) {
-		tx_queue->flushed = false;
-		falcon_flush_tx_queue(tx_queue);
-	}
-	efx_for_each_rx_queue(rx_queue, efx) {
-		rx_queue->flushed = false;
-		falcon_flush_rx_queue(rx_queue);
-	}
-
-	/* Poll the evq looking for flush completions. Since we're not pushing
-	 * any more rx or tx descriptors at this point, we're in no danger of
-	 * overflowing the evq whilst we wait */
-	for (i = 0; i < FALCON_FLUSH_POLL_COUNT; ++i) {
-		msleep(FALCON_FLUSH_INTERVAL);
-		falcon_poll_flush_events(efx);
-
-		/* Check if every queue has been succesfully flushed */
-		outstanding = false;
-		efx_for_each_tx_queue(tx_queue, efx)
-			outstanding |= !tx_queue->flushed;
-		efx_for_each_rx_queue(rx_queue, efx)
-			outstanding |= !rx_queue->flushed;
-		if (!outstanding)
-			return 0;
-	}
-
-	/* Mark the queues as all flushed. We're going to return failure
-	 * leading to a reset, or fake up success anyway. "flushed" now
-	 * indicates that we tried to flush. */
-	efx_for_each_tx_queue(tx_queue, efx) {
-		if (!tx_queue->flushed)
-			EFX_ERR(efx, "tx queue %d flush command timed out\n",
-				tx_queue->queue);
-		tx_queue->flushed = true;
-	}
-	efx_for_each_rx_queue(rx_queue, efx) {
-		if (!rx_queue->flushed)
-			EFX_ERR(efx, "rx queue %d flush command timed out\n",
-				rx_queue->queue);
-		rx_queue->flushed = true;
-	}
-
-	if (EFX_WORKAROUND_7803(efx))
-		return 0;
+	struct efx_nic *efx = (struct efx_nic *)data;
+	efx_oword_t reg;
 
-	return -ETIMEDOUT;
+	efx_reado(efx, &reg, FR_AB_GPIO_CTL);
+	return EFX_OWORD_FIELD(reg, FRF_AB_GPIO0_IN);
 }
 
-/**************************************************************************
- *
- * Falcon hardware interrupts
- * The hardware interrupt handler does very little work; all the event
- * queue processing is carried out by per-channel tasklets.
- *
- **************************************************************************/
+static struct i2c_algo_bit_data falcon_i2c_bit_operations = {
+	.setsda		= falcon_setsda,
+	.setscl		= falcon_setscl,
+	.getsda		= falcon_getsda,
+	.getscl		= falcon_getscl,
+	.udelay		= 5,
+	/* Wait up to 50 ms for slave to let us pull SCL high */
+	.timeout	= DIV_ROUND_UP(HZ, 20),
+};
 
-/* Enable/disable/generate Falcon interrupts */
-static inline void falcon_interrupts(struct efx_nic *efx, int enabled,
-				     int force)
+static void falcon_push_irq_moderation(struct efx_channel *channel)
 {
-	efx_oword_t int_en_reg_ker;
+	efx_dword_t timer_cmd;
+	struct efx_nic *efx = channel->efx;
 
-	EFX_POPULATE_OWORD_2(int_en_reg_ker,
-			     KER_INT_KER, force,
-			     DRV_INT_EN_KER, enabled);
-	falcon_write(efx, &int_en_reg_ker, INT_EN_REG_KER);
+	/* Set timer register */
+	if (channel->irq_moderation) {
+		EFX_POPULATE_DWORD_2(timer_cmd,
+				     FRF_AB_TC_TIMER_MODE,
+				     FFE_BB_TIMER_MODE_INT_HLDOFF,
+				     FRF_AB_TC_TIMER_VAL,
+				     channel->irq_moderation - 1);
+	} else {
+		EFX_POPULATE_DWORD_2(timer_cmd,
+				     FRF_AB_TC_TIMER_MODE,
+				     FFE_BB_TIMER_MODE_DIS,
+				     FRF_AB_TC_TIMER_VAL, 0);
+	}
+	BUILD_BUG_ON(FR_AA_TIMER_COMMAND_KER != FR_BZ_TIMER_COMMAND_P0);
+	efx_writed_page_locked(efx, &timer_cmd, FR_BZ_TIMER_COMMAND_P0,
+			       channel->channel);
 }
 
-void falcon_enable_interrupts(struct efx_nic *efx)
-{
-	efx_oword_t int_adr_reg_ker;
-	struct efx_channel *channel;
-
-	EFX_ZERO_OWORD(*((efx_oword_t *) efx->irq_status.addr));
-	wmb(); /* Ensure interrupt vector is clear before interrupts enabled */
+static void falcon_deconfigure_mac_wrapper(struct efx_nic *efx);
 
-	/* Program address */
-	EFX_POPULATE_OWORD_2(int_adr_reg_ker,
-			     NORM_INT_VEC_DIS_KER, EFX_INT_MODE_USE_MSI(efx),
-			     INT_ADR_KER, efx->irq_status.dma_addr);
-	falcon_write(efx, &int_adr_reg_ker, INT_ADR_REG_KER);
-
-	/* Enable interrupts */
-	falcon_interrupts(efx, 1, 0);
-
-	/* Force processing of all the channels to get the EVQ RPTRs up to
-	   date */
-	efx_for_each_channel(channel, efx)
-		efx_schedule_channel(channel);
-}
-
-void falcon_disable_interrupts(struct efx_nic *efx)
+static void falcon_prepare_flush(struct efx_nic *efx)
 {
-	/* Disable interrupts */
-	falcon_interrupts(efx, 0, 0);
-}
+	falcon_deconfigure_mac_wrapper(efx);
 
-/* Generate a Falcon test interrupt
- * Interrupt must already have been enabled, otherwise nasty things
- * may happen.
- */
-void falcon_generate_interrupt(struct efx_nic *efx)
-{
-	falcon_interrupts(efx, 1, 1);
+	/* Wait for the tx and rx fifo's to get to the next packet boundary
+	 * (~1ms without back-pressure), then to drain the remainder of the
+	 * fifo's at data path speeds (negligible), with a healthy margin. */
+	msleep(10);
 }
 
 /* Acknowledge a legacy interrupt from Falcon
@@ -1364,113 +144,17 @@
  *
  * NB most hardware supports MSI interrupts
  */
-static inline void falcon_irq_ack_a1(struct efx_nic *efx)
-{
-	efx_dword_t reg;
-
-	EFX_POPULATE_DWORD_1(reg, INT_ACK_DUMMY_DATA, 0xb7eb7e);
-	falcon_writel(efx, &reg, INT_ACK_REG_KER_A1);
-	falcon_readl(efx, &reg, WORK_AROUND_BROKEN_PCI_READS_REG_KER_A1);
-}
-
-/* Process a fatal interrupt
- * Disable bus mastering ASAP and schedule a reset
- */
-static irqreturn_t falcon_fatal_interrupt(struct efx_nic *efx)
-{
-	struct falcon_nic_data *nic_data = efx->nic_data;
-	efx_oword_t *int_ker = efx->irq_status.addr;
-	efx_oword_t fatal_intr;
-	int error, mem_perr;
-
-	falcon_read(efx, &fatal_intr, FATAL_INTR_REG_KER);
-	error = EFX_OWORD_FIELD(fatal_intr, INT_KER_ERROR);
-
-	EFX_ERR(efx, "SYSTEM ERROR " EFX_OWORD_FMT " status "
-		EFX_OWORD_FMT ": %s\n", EFX_OWORD_VAL(*int_ker),
-		EFX_OWORD_VAL(fatal_intr),
-		error ? "disabling bus mastering" : "no recognised error");
-	if (error == 0)
-		goto out;
-
-	/* If this is a memory parity error dump which blocks are offending */
-	mem_perr = EFX_OWORD_FIELD(fatal_intr, MEM_PERR_INT_KER);
-	if (mem_perr) {
-		efx_oword_t reg;
-		falcon_read(efx, &reg, MEM_STAT_REG_KER);
-		EFX_ERR(efx, "SYSTEM ERROR: memory parity error "
-			EFX_OWORD_FMT "\n", EFX_OWORD_VAL(reg));
-	}
-
-	/* Disable both devices */
-	pci_clear_master(efx->pci_dev);
-	if (FALCON_IS_DUAL_FUNC(efx))
-		pci_clear_master(nic_data->pci_dev2);
-	falcon_disable_interrupts(efx);
-
-	/* Count errors and reset or disable the NIC accordingly */
-	if (nic_data->int_error_count == 0 ||
-	    time_after(jiffies, nic_data->int_error_expire)) {
-		nic_data->int_error_count = 0;
-		nic_data->int_error_expire =
-			jiffies + FALCON_INT_ERROR_EXPIRE * HZ;
-	}
-	if (++nic_data->int_error_count < FALCON_MAX_INT_ERRORS) {
-		EFX_ERR(efx, "SYSTEM ERROR - reset scheduled\n");
-		efx_schedule_reset(efx, RESET_TYPE_INT_ERROR);
-	} else {
-		EFX_ERR(efx, "SYSTEM ERROR - max number of errors seen."
-			"NIC will be disabled\n");
-		efx_schedule_reset(efx, RESET_TYPE_DISABLE);
-	}
-out:
-	return IRQ_HANDLED;
-}
-
-/* Handle a legacy interrupt from Falcon
- * Acknowledges the interrupt and schedule event queue processing.
- */
-static irqreturn_t falcon_legacy_interrupt_b0(int irq, void *dev_id)
+inline void falcon_irq_ack_a1(struct efx_nic *efx)
 {
-	struct efx_nic *efx = dev_id;
-	efx_oword_t *int_ker = efx->irq_status.addr;
-	irqreturn_t result = IRQ_NONE;
-	struct efx_channel *channel;
 	efx_dword_t reg;
-	u32 queues;
-	int syserr;
-
-	/* Read the ISR which also ACKs the interrupts */
-	falcon_readl(efx, &reg, INT_ISR0_B0);
-	queues = EFX_EXTRACT_DWORD(reg, 0, 31);
-
-	/* Check to see if we have a serious error condition */
-	syserr = EFX_OWORD_FIELD(*int_ker, FATAL_INT);
-	if (unlikely(syserr))
-		return falcon_fatal_interrupt(efx);
-
-	/* Schedule processing of any interrupting queues */
-	efx_for_each_channel(channel, efx) {
-		if ((queues & 1) ||
-		    falcon_event_present(
-			    falcon_event(channel, channel->eventq_read_ptr))) {
-			efx_schedule_channel(channel);
-			result = IRQ_HANDLED;
-		}
-		queues >>= 1;
-	}
-
-	if (result == IRQ_HANDLED) {
-		efx->last_irq_cpu = raw_smp_processor_id();
-		EFX_TRACE(efx, "IRQ %d on CPU %d status " EFX_DWORD_FMT "\n",
-			  irq, raw_smp_processor_id(), EFX_DWORD_VAL(reg));
-	}
 
-	return result;
+	EFX_POPULATE_DWORD_1(reg, FRF_AA_INT_ACK_KER_FIELD, 0xb7eb7e);
+	efx_writed(efx, &reg, FR_AA_INT_ACK_KER);
+	efx_readd(efx, &reg, FR_AA_WORK_AROUND_BROKEN_PCI_READS);
 }
 
 
-static irqreturn_t falcon_legacy_interrupt_a1(int irq, void *dev_id)
+irqreturn_t falcon_legacy_interrupt_a1(int irq, void *dev_id)
 {
 	struct efx_nic *efx = dev_id;
 	efx_oword_t *int_ker = efx->irq_status.addr;
@@ -1491,15 +175,15 @@
 		  irq, raw_smp_processor_id(), EFX_OWORD_VAL(*int_ker));
 
 	/* Check to see if we have a serious error condition */
-	syserr = EFX_OWORD_FIELD(*int_ker, FATAL_INT);
+	syserr = EFX_OWORD_FIELD(*int_ker, FSF_AZ_NET_IVEC_FATAL_INT);
 	if (unlikely(syserr))
-		return falcon_fatal_interrupt(efx);
+		return efx_nic_fatal_interrupt(efx);
 
 	/* Determine interrupting queues, clear interrupt status
 	 * register and acknowledge the device interrupt.
 	 */
-	BUILD_BUG_ON(INT_EVQS_WIDTH > EFX_MAX_CHANNELS);
-	queues = EFX_OWORD_FIELD(*int_ker, INT_EVQS);
+	BUILD_BUG_ON(FSF_AZ_NET_IVEC_INT_Q_WIDTH > EFX_MAX_CHANNELS);
+	queues = EFX_OWORD_FIELD(*int_ker, FSF_AZ_NET_IVEC_INT_Q);
 	EFX_ZERO_OWORD(*int_ker);
 	wmb(); /* Ensure the vector is cleared before interrupt ack */
 	falcon_irq_ack_a1(efx);
@@ -1515,126 +199,6 @@
 
 	return IRQ_HANDLED;
 }
-
-/* Handle an MSI interrupt from Falcon
- *
- * Handle an MSI hardware interrupt.  This routine schedules event
- * queue processing.  No interrupt acknowledgement cycle is necessary.
- * Also, we never need to check that the interrupt is for us, since
- * MSI interrupts cannot be shared.
- */
-static irqreturn_t falcon_msi_interrupt(int irq, void *dev_id)
-{
-	struct efx_channel *channel = dev_id;
-	struct efx_nic *efx = channel->efx;
-	efx_oword_t *int_ker = efx->irq_status.addr;
-	int syserr;
-
-	efx->last_irq_cpu = raw_smp_processor_id();
-	EFX_TRACE(efx, "IRQ %d on CPU %d status " EFX_OWORD_FMT "\n",
-		  irq, raw_smp_processor_id(), EFX_OWORD_VAL(*int_ker));
-
-	/* Check to see if we have a serious error condition */
-	syserr = EFX_OWORD_FIELD(*int_ker, FATAL_INT);
-	if (unlikely(syserr))
-		return falcon_fatal_interrupt(efx);
-
-	/* Schedule processing of the channel */
-	efx_schedule_channel(channel);
-
-	return IRQ_HANDLED;
-}
-
-
-/* Setup RSS indirection table.
- * This maps from the hash value of the packet to RXQ
- */
-static void falcon_setup_rss_indir_table(struct efx_nic *efx)
-{
-	int i = 0;
-	unsigned long offset;
-	efx_dword_t dword;
-
-	if (falcon_rev(efx) < FALCON_REV_B0)
-		return;
-
-	for (offset = RX_RSS_INDIR_TBL_B0;
-	     offset < RX_RSS_INDIR_TBL_B0 + 0x800;
-	     offset += 0x10) {
-		EFX_POPULATE_DWORD_1(dword, RX_RSS_INDIR_ENT_B0,
-				     i % efx->n_rx_queues);
-		falcon_writel(efx, &dword, offset);
-		i++;
-	}
-}
-
-/* Hook interrupt handler(s)
- * Try MSI and then legacy interrupts.
- */
-int falcon_init_interrupt(struct efx_nic *efx)
-{
-	struct efx_channel *channel;
-	int rc;
-
-	if (!EFX_INT_MODE_USE_MSI(efx)) {
-		irq_handler_t handler;
-		if (falcon_rev(efx) >= FALCON_REV_B0)
-			handler = falcon_legacy_interrupt_b0;
-		else
-			handler = falcon_legacy_interrupt_a1;
-
-		rc = request_irq(efx->legacy_irq, handler, IRQF_SHARED,
-				 efx->name, efx);
-		if (rc) {
-			EFX_ERR(efx, "failed to hook legacy IRQ %d\n",
-				efx->pci_dev->irq);
-			goto fail1;
-		}
-		return 0;
-	}
-
-	/* Hook MSI or MSI-X interrupt */
-	efx_for_each_channel(channel, efx) {
-		rc = request_irq(channel->irq, falcon_msi_interrupt,
-				 IRQF_PROBE_SHARED, /* Not shared */
-				 channel->name, channel);
-		if (rc) {
-			EFX_ERR(efx, "failed to hook IRQ %d\n", channel->irq);
-			goto fail2;
-		}
-	}
-
-	return 0;
-
- fail2:
-	efx_for_each_channel(channel, efx)
-		free_irq(channel->irq, channel);
- fail1:
-	return rc;
-}
-
-void falcon_fini_interrupt(struct efx_nic *efx)
-{
-	struct efx_channel *channel;
-	efx_oword_t reg;
-
-	/* Disable MSI/MSI-X interrupts */
-	efx_for_each_channel(channel, efx) {
-		if (channel->irq)
-			free_irq(channel->irq, channel);
-	}
-
-	/* ACK legacy interrupt */
-	if (falcon_rev(efx) >= FALCON_REV_B0)
-		falcon_read(efx, &reg, INT_ISR0_B0);
-	else
-		falcon_irq_ack_a1(efx);
-
-	/* Disable legacy interrupt */
-	if (efx->legacy_irq)
-		free_irq(efx->legacy_irq, efx);
-}
-
 /**************************************************************************
  *
  * EEPROM/flash
@@ -1647,8 +211,8 @@
 static int falcon_spi_poll(struct efx_nic *efx)
 {
 	efx_oword_t reg;
-	falcon_read(efx, &reg, EE_SPI_HCMD_REG_KER);
-	return EFX_OWORD_FIELD(reg, EE_SPI_HCMD_CMD_EN) ? -EBUSY : 0;
+	efx_reado(efx, &reg, FR_AB_EE_SPI_HCMD);
+	return EFX_OWORD_FIELD(reg, FRF_AB_EE_SPI_HCMD_CMD_EN) ? -EBUSY : 0;
 }
 
 /* Wait for SPI command completion */
@@ -1678,11 +242,10 @@
 	}
 }
 
-int falcon_spi_cmd(const struct efx_spi_device *spi,
+int falcon_spi_cmd(struct efx_nic *efx, const struct efx_spi_device *spi,
 		   unsigned int command, int address,
 		   const void *in, void *out, size_t len)
 {
-	struct efx_nic *efx = spi->efx;
 	bool addressed = (address >= 0);
 	bool reading = (out != NULL);
 	efx_oword_t reg;
@@ -1700,27 +263,27 @@
 
 	/* Program address register, if we have an address */
 	if (addressed) {
-		EFX_POPULATE_OWORD_1(reg, EE_SPI_HADR_ADR, address);
-		falcon_write(efx, &reg, EE_SPI_HADR_REG_KER);
+		EFX_POPULATE_OWORD_1(reg, FRF_AB_EE_SPI_HADR_ADR, address);
+		efx_writeo(efx, &reg, FR_AB_EE_SPI_HADR);
 	}
 
 	/* Program data register, if we have data */
 	if (in != NULL) {
 		memcpy(&reg, in, len);
-		falcon_write(efx, &reg, EE_SPI_HDATA_REG_KER);
+		efx_writeo(efx, &reg, FR_AB_EE_SPI_HDATA);
 	}
 
 	/* Issue read/write command */
 	EFX_POPULATE_OWORD_7(reg,
-			     EE_SPI_HCMD_CMD_EN, 1,
-			     EE_SPI_HCMD_SF_SEL, spi->device_id,
-			     EE_SPI_HCMD_DABCNT, len,
-			     EE_SPI_HCMD_READ, reading,
-			     EE_SPI_HCMD_DUBCNT, 0,
-			     EE_SPI_HCMD_ADBCNT,
+			     FRF_AB_EE_SPI_HCMD_CMD_EN, 1,
+			     FRF_AB_EE_SPI_HCMD_SF_SEL, spi->device_id,
+			     FRF_AB_EE_SPI_HCMD_DABCNT, len,
+			     FRF_AB_EE_SPI_HCMD_READ, reading,
+			     FRF_AB_EE_SPI_HCMD_DUBCNT, 0,
+			     FRF_AB_EE_SPI_HCMD_ADBCNT,
 			     (addressed ? spi->addr_len : 0),
-			     EE_SPI_HCMD_ENC, command);
-	falcon_write(efx, &reg, EE_SPI_HCMD_REG_KER);
+			     FRF_AB_EE_SPI_HCMD_ENC, command);
+	efx_writeo(efx, &reg, FR_AB_EE_SPI_HCMD);
 
 	/* Wait for read/write to complete */
 	rc = falcon_spi_wait(efx);
@@ -1729,7 +292,7 @@
 
 	/* Read data */
 	if (out != NULL) {
-		falcon_read(efx, &reg, EE_SPI_HDATA_REG_KER);
+		efx_reado(efx, &reg, FR_AB_EE_SPI_HDATA);
 		memcpy(out, &reg, len);
 	}
 
@@ -1751,15 +314,15 @@
 }
 
 /* Wait up to 10 ms for buffered write completion */
-int falcon_spi_wait_write(const struct efx_spi_device *spi)
+int
+falcon_spi_wait_write(struct efx_nic *efx, const struct efx_spi_device *spi)
 {
-	struct efx_nic *efx = spi->efx;
 	unsigned long timeout = jiffies + 1 + DIV_ROUND_UP(HZ, 100);
 	u8 status;
 	int rc;
 
 	for (;;) {
-		rc = falcon_spi_cmd(spi, SPI_RDSR, -1, NULL,
+		rc = falcon_spi_cmd(efx, spi, SPI_RDSR, -1, NULL,
 				    &status, sizeof(status));
 		if (rc)
 			return rc;
@@ -1775,8 +338,8 @@
 	}
 }
 
-int falcon_spi_read(const struct efx_spi_device *spi, loff_t start,
-		    size_t len, size_t *retlen, u8 *buffer)
+int falcon_spi_read(struct efx_nic *efx, const struct efx_spi_device *spi,
+		    loff_t start, size_t len, size_t *retlen, u8 *buffer)
 {
 	size_t block_len, pos = 0;
 	unsigned int command;
@@ -1786,7 +349,7 @@
 		block_len = min(len - pos, FALCON_SPI_MAX_LEN);
 
 		command = efx_spi_munge_command(spi, SPI_READ, start + pos);
-		rc = falcon_spi_cmd(spi, command, start + pos, NULL,
+		rc = falcon_spi_cmd(efx, spi, command, start + pos, NULL,
 				    buffer + pos, block_len);
 		if (rc)
 			break;
@@ -1805,8 +368,9 @@
 	return rc;
 }
 
-int falcon_spi_write(const struct efx_spi_device *spi, loff_t start,
-		     size_t len, size_t *retlen, const u8 *buffer)
+int
+falcon_spi_write(struct efx_nic *efx, const struct efx_spi_device *spi,
+		 loff_t start, size_t len, size_t *retlen, const u8 *buffer)
 {
 	u8 verify_buffer[FALCON_SPI_MAX_LEN];
 	size_t block_len, pos = 0;
@@ -1814,24 +378,24 @@
 	int rc = 0;
 
 	while (pos < len) {
-		rc = falcon_spi_cmd(spi, SPI_WREN, -1, NULL, NULL, 0);
+		rc = falcon_spi_cmd(efx, spi, SPI_WREN, -1, NULL, NULL, 0);
 		if (rc)
 			break;
 
 		block_len = min(len - pos,
 				falcon_spi_write_limit(spi, start + pos));
 		command = efx_spi_munge_command(spi, SPI_WRITE, start + pos);
-		rc = falcon_spi_cmd(spi, command, start + pos,
+		rc = falcon_spi_cmd(efx, spi, command, start + pos,
 				    buffer + pos, NULL, block_len);
 		if (rc)
 			break;
 
-		rc = falcon_spi_wait_write(spi);
+		rc = falcon_spi_wait_write(efx, spi);
 		if (rc)
 			break;
 
 		command = efx_spi_munge_command(spi, SPI_READ, start + pos);
-		rc = falcon_spi_cmd(spi, command, start + pos,
+		rc = falcon_spi_cmd(efx, spi, command, start + pos,
 				    NULL, verify_buffer, block_len);
 		if (memcmp(verify_buffer, buffer + pos, block_len)) {
 			rc = -EIO;
@@ -1860,60 +424,70 @@
  **************************************************************************
  */
 
-static int falcon_reset_macs(struct efx_nic *efx)
+static void falcon_push_multicast_hash(struct efx_nic *efx)
 {
-	efx_oword_t reg;
+	union efx_multicast_hash *mc_hash = &efx->multicast_hash;
+
+	WARN_ON(!mutex_is_locked(&efx->mac_lock));
+
+	efx_writeo(efx, &mc_hash->oword[0], FR_AB_MAC_MC_HASH_REG0);
+	efx_writeo(efx, &mc_hash->oword[1], FR_AB_MAC_MC_HASH_REG1);
+}
+
+static void falcon_reset_macs(struct efx_nic *efx)
+{
+	struct falcon_nic_data *nic_data = efx->nic_data;
+	efx_oword_t reg, mac_ctrl;
 	int count;
 
-	if (falcon_rev(efx) < FALCON_REV_B0) {
+	if (efx_nic_rev(efx) < EFX_REV_FALCON_B0) {
 		/* It's not safe to use GLB_CTL_REG to reset the
 		 * macs, so instead use the internal MAC resets
 		 */
 		if (!EFX_IS10G(efx)) {
-			EFX_POPULATE_OWORD_1(reg, GM_SW_RST, 1);
-			falcon_write(efx, &reg, GM_CFG1_REG);
+			EFX_POPULATE_OWORD_1(reg, FRF_AB_GM_SW_RST, 1);
+			efx_writeo(efx, &reg, FR_AB_GM_CFG1);
 			udelay(1000);
 
-			EFX_POPULATE_OWORD_1(reg, GM_SW_RST, 0);
-			falcon_write(efx, &reg, GM_CFG1_REG);
+			EFX_POPULATE_OWORD_1(reg, FRF_AB_GM_SW_RST, 0);
+			efx_writeo(efx, &reg, FR_AB_GM_CFG1);
 			udelay(1000);
-			return 0;
+			return;
 		} else {
-			EFX_POPULATE_OWORD_1(reg, XM_CORE_RST, 1);
-			falcon_write(efx, &reg, XM_GLB_CFG_REG);
+			EFX_POPULATE_OWORD_1(reg, FRF_AB_XM_CORE_RST, 1);
+			efx_writeo(efx, &reg, FR_AB_XM_GLB_CFG);
 
 			for (count = 0; count < 10000; count++) {
-				falcon_read(efx, &reg, XM_GLB_CFG_REG);
-				if (EFX_OWORD_FIELD(reg, XM_CORE_RST) == 0)
-					return 0;
+				efx_reado(efx, &reg, FR_AB_XM_GLB_CFG);
+				if (EFX_OWORD_FIELD(reg, FRF_AB_XM_CORE_RST) ==
+				    0)
+					return;
 				udelay(10);
 			}
 
 			EFX_ERR(efx, "timed out waiting for XMAC core reset\n");
-			return -ETIMEDOUT;
 		}
 	}
 
-	/* MAC stats will fail whilst the TX fifo is draining. Serialise
-	 * the drain sequence with the statistics fetch */
-	efx_stats_disable(efx);
-
-	falcon_read(efx, &reg, MAC0_CTRL_REG_KER);
-	EFX_SET_OWORD_FIELD(reg, TXFIFO_DRAIN_EN_B0, 1);
-	falcon_write(efx, &reg, MAC0_CTRL_REG_KER);
-
-	falcon_read(efx, &reg, GLB_CTL_REG_KER);
-	EFX_SET_OWORD_FIELD(reg, RST_XGTX, 1);
-	EFX_SET_OWORD_FIELD(reg, RST_XGRX, 1);
-	EFX_SET_OWORD_FIELD(reg, RST_EM, 1);
-	falcon_write(efx, &reg, GLB_CTL_REG_KER);
+	/* Mac stats will fail whist the TX fifo is draining */
+	WARN_ON(nic_data->stats_disable_count == 0);
+
+	efx_reado(efx, &mac_ctrl, FR_AB_MAC_CTRL);
+	EFX_SET_OWORD_FIELD(mac_ctrl, FRF_BB_TXFIFO_DRAIN_EN, 1);
+	efx_writeo(efx, &mac_ctrl, FR_AB_MAC_CTRL);
+
+	efx_reado(efx, &reg, FR_AB_GLB_CTL);
+	EFX_SET_OWORD_FIELD(reg, FRF_AB_RST_XGTX, 1);
+	EFX_SET_OWORD_FIELD(reg, FRF_AB_RST_XGRX, 1);
+	EFX_SET_OWORD_FIELD(reg, FRF_AB_RST_EM, 1);
+	efx_writeo(efx, &reg, FR_AB_GLB_CTL);
 
 	count = 0;
 	while (1) {
-		falcon_read(efx, &reg, GLB_CTL_REG_KER);
-		if (!EFX_OWORD_FIELD(reg, RST_XGTX) &&
-		    !EFX_OWORD_FIELD(reg, RST_XGRX) &&
-		    !EFX_OWORD_FIELD(reg, RST_EM)) {
+		efx_reado(efx, &reg, FR_AB_GLB_CTL);
+		if (!EFX_OWORD_FIELD(reg, FRF_AB_RST_XGTX) &&
+		    !EFX_OWORD_FIELD(reg, FRF_AB_RST_XGRX) &&
+		    !EFX_OWORD_FIELD(reg, FRF_AB_RST_EM)) {
 			EFX_LOG(efx, "Completed MAC reset after %d loops\n",
 				count);
 			break;
@@ -1926,55 +500,50 @@
 		udelay(10);
 	}
 
-	efx_stats_enable(efx);
-
-	/* If we've reset the EM block and the link is up, then
-	 * we'll have to kick the XAUI link so the PHY can recover */
-	if (efx->link_up && EFX_IS10G(efx) && EFX_WORKAROUND_5147(efx))
-		falcon_reset_xaui(efx);
-
-	return 0;
+	/* Ensure the correct MAC is selected before statistics
+	 * are re-enabled by the caller */
+	efx_writeo(efx, &mac_ctrl, FR_AB_MAC_CTRL);
 }
 
 void falcon_drain_tx_fifo(struct efx_nic *efx)
 {
 	efx_oword_t reg;
 
-	if ((falcon_rev(efx) < FALCON_REV_B0) ||
+	if ((efx_nic_rev(efx) < EFX_REV_FALCON_B0) ||
 	    (efx->loopback_mode != LOOPBACK_NONE))
 		return;
 
-	falcon_read(efx, &reg, MAC0_CTRL_REG_KER);
+	efx_reado(efx, &reg, FR_AB_MAC_CTRL);
 	/* There is no point in draining more than once */
-	if (EFX_OWORD_FIELD(reg, TXFIFO_DRAIN_EN_B0))
+	if (EFX_OWORD_FIELD(reg, FRF_BB_TXFIFO_DRAIN_EN))
 		return;
 
 	falcon_reset_macs(efx);
 }
 
-void falcon_deconfigure_mac_wrapper(struct efx_nic *efx)
+static void falcon_deconfigure_mac_wrapper(struct efx_nic *efx)
 {
 	efx_oword_t reg;
 
-	if (falcon_rev(efx) < FALCON_REV_B0)
+	if (efx_nic_rev(efx) < EFX_REV_FALCON_B0)
 		return;
 
 	/* Isolate the MAC -> RX */
-	falcon_read(efx, &reg, RX_CFG_REG_KER);
-	EFX_SET_OWORD_FIELD(reg, RX_INGR_EN_B0, 0);
-	falcon_write(efx, &reg, RX_CFG_REG_KER);
+	efx_reado(efx, &reg, FR_AZ_RX_CFG);
+	EFX_SET_OWORD_FIELD(reg, FRF_BZ_RX_INGR_EN, 0);
+	efx_writeo(efx, &reg, FR_AZ_RX_CFG);
 
-	if (!efx->link_up)
-		falcon_drain_tx_fifo(efx);
+	/* Isolate TX -> MAC */
+	falcon_drain_tx_fifo(efx);
 }
 
 void falcon_reconfigure_mac_wrapper(struct efx_nic *efx)
 {
+	struct efx_link_state *link_state = &efx->link_state;
 	efx_oword_t reg;
 	int link_speed;
-	bool tx_fc;
 
-	switch (efx->link_speed) {
+	switch (link_state->speed) {
 	case 10000: link_speed = 3; break;
 	case 1000:  link_speed = 2; break;
 	case 100:   link_speed = 1; break;
@@ -1985,75 +554,139 @@
 	 * indefinitely held and TX queue can be flushed at any point
 	 * while the link is down. */
 	EFX_POPULATE_OWORD_5(reg,
-			     MAC_XOFF_VAL, 0xffff /* max pause time */,
-			     MAC_BCAD_ACPT, 1,
-			     MAC_UC_PROM, efx->promiscuous,
-			     MAC_LINK_STATUS, 1, /* always set */
-			     MAC_SPEED, link_speed);
+			     FRF_AB_MAC_XOFF_VAL, 0xffff /* max pause time */,
+			     FRF_AB_MAC_BCAD_ACPT, 1,
+			     FRF_AB_MAC_UC_PROM, efx->promiscuous,
+			     FRF_AB_MAC_LINK_STATUS, 1, /* always set */
+			     FRF_AB_MAC_SPEED, link_speed);
 	/* On B0, MAC backpressure can be disabled and packets get
 	 * discarded. */
-	if (falcon_rev(efx) >= FALCON_REV_B0) {
-		EFX_SET_OWORD_FIELD(reg, TXFIFO_DRAIN_EN_B0,
-				    !efx->link_up);
+	if (efx_nic_rev(efx) >= EFX_REV_FALCON_B0) {
+		EFX_SET_OWORD_FIELD(reg, FRF_BB_TXFIFO_DRAIN_EN,
+				    !link_state->up);
+	}
+
+	efx_writeo(efx, &reg, FR_AB_MAC_CTRL);
+
+	/* Restore the multicast hash registers. */
+	falcon_push_multicast_hash(efx);
+
+	efx_reado(efx, &reg, FR_AZ_RX_CFG);
+	/* Enable XOFF signal from RX FIFO (we enabled it during NIC
+	 * initialisation but it may read back as 0) */
+	EFX_SET_OWORD_FIELD(reg, FRF_AZ_RX_XOFF_MAC_EN, 1);
+	/* Unisolate the MAC -> RX */
+	if (efx_nic_rev(efx) >= EFX_REV_FALCON_B0)
+		EFX_SET_OWORD_FIELD(reg, FRF_BZ_RX_INGR_EN, 1);
+	efx_writeo(efx, &reg, FR_AZ_RX_CFG);
+}
+
+static void falcon_stats_request(struct efx_nic *efx)
+{
+	struct falcon_nic_data *nic_data = efx->nic_data;
+	efx_oword_t reg;
+
+	WARN_ON(nic_data->stats_pending);
+	WARN_ON(nic_data->stats_disable_count);
+
+	if (nic_data->stats_dma_done == NULL)
+		return;	/* no mac selected */
+
+	*nic_data->stats_dma_done = FALCON_STATS_NOT_DONE;
+	nic_data->stats_pending = true;
+	wmb(); /* ensure done flag is clear */
+
+	/* Initiate DMA transfer of stats */
+	EFX_POPULATE_OWORD_2(reg,
+			     FRF_AB_MAC_STAT_DMA_CMD, 1,
+			     FRF_AB_MAC_STAT_DMA_ADR,
+			     efx->stats_buffer.dma_addr);
+	efx_writeo(efx, &reg, FR_AB_MAC_STAT_DMA);
+
+	mod_timer(&nic_data->stats_timer, round_jiffies_up(jiffies + HZ / 2));
+}
+
+static void falcon_stats_complete(struct efx_nic *efx)
+{
+	struct falcon_nic_data *nic_data = efx->nic_data;
+
+	if (!nic_data->stats_pending)
+		return;
+
+	nic_data->stats_pending = 0;
+	if (*nic_data->stats_dma_done == FALCON_STATS_DONE) {
+		rmb(); /* read the done flag before the stats */
+		efx->mac_op->update_stats(efx);
+	} else {
+		EFX_ERR(efx, "timed out waiting for statistics\n");
 	}
+}
+
+static void falcon_stats_timer_func(unsigned long context)
+{
+	struct efx_nic *efx = (struct efx_nic *)context;
+	struct falcon_nic_data *nic_data = efx->nic_data;
+
+	spin_lock(&efx->stats_lock);
 
-	falcon_write(efx, &reg, MAC0_CTRL_REG_KER);
+	falcon_stats_complete(efx);
+	if (nic_data->stats_disable_count == 0)
+		falcon_stats_request(efx);
 
-	/* Restore the multicast hash registers. */
-	falcon_set_multicast_hash(efx);
+	spin_unlock(&efx->stats_lock);
+}
 
-	/* Transmission of pause frames when RX crosses the threshold is
-	 * covered by RX_XOFF_MAC_EN and XM_TX_CFG_REG:XM_FCNTL.
-	 * Action on receipt of pause frames is controller by XM_DIS_FCNTL */
-	tx_fc = !!(efx->link_fc & EFX_FC_TX);
-	falcon_read(efx, &reg, RX_CFG_REG_KER);
-	EFX_SET_OWORD_FIELD_VER(efx, reg, RX_XOFF_MAC_EN, tx_fc);
+static void falcon_switch_mac(struct efx_nic *efx);
 
-	/* Unisolate the MAC -> RX */
-	if (falcon_rev(efx) >= FALCON_REV_B0)
-		EFX_SET_OWORD_FIELD(reg, RX_INGR_EN_B0, 1);
-	falcon_write(efx, &reg, RX_CFG_REG_KER);
+static bool falcon_loopback_link_poll(struct efx_nic *efx)
+{
+	struct efx_link_state old_state = efx->link_state;
+
+	WARN_ON(!mutex_is_locked(&efx->mac_lock));
+	WARN_ON(!LOOPBACK_INTERNAL(efx));
+
+	efx->link_state.fd = true;
+	efx->link_state.fc = efx->wanted_fc;
+	efx->link_state.up = true;
+
+	if (efx->loopback_mode == LOOPBACK_GMAC)
+		efx->link_state.speed = 1000;
+	else
+		efx->link_state.speed = 10000;
+
+	return !efx_link_state_equal(&efx->link_state, &old_state);
 }
 
-int falcon_dma_stats(struct efx_nic *efx, unsigned int done_offset)
+static int falcon_reconfigure_port(struct efx_nic *efx)
 {
-	efx_oword_t reg;
-	u32 *dma_done;
-	int i;
+	int rc;
 
-	if (disable_dma_stats)
-		return 0;
+	WARN_ON(efx_nic_rev(efx) > EFX_REV_FALCON_B0);
 
-	/* Statistics fetch will fail if the MAC is in TX drain */
-	if (falcon_rev(efx) >= FALCON_REV_B0) {
-		efx_oword_t temp;
-		falcon_read(efx, &temp, MAC0_CTRL_REG_KER);
-		if (EFX_OWORD_FIELD(temp, TXFIFO_DRAIN_EN_B0))
-			return 0;
-	}
+	/* Poll the PHY link state *before* reconfiguring it. This means we
+	 * will pick up the correct speed (in loopback) to select the correct
+	 * MAC.
+	 */
+	if (LOOPBACK_INTERNAL(efx))
+		falcon_loopback_link_poll(efx);
+	else
+		efx->phy_op->poll(efx);
 
-	dma_done = (efx->stats_buffer.addr + done_offset);
-	*dma_done = FALCON_STATS_NOT_DONE;
-	wmb(); /* ensure done flag is clear */
+	falcon_stop_nic_stats(efx);
+	falcon_deconfigure_mac_wrapper(efx);
 
-	/* Initiate DMA transfer of stats */
-	EFX_POPULATE_OWORD_2(reg,
-			     MAC_STAT_DMA_CMD, 1,
-			     MAC_STAT_DMA_ADR,
-			     efx->stats_buffer.dma_addr);
-	falcon_write(efx, &reg, MAC0_STAT_DMA_REG_KER);
+	falcon_switch_mac(efx);
 
-	/* Wait for transfer to complete */
-	for (i = 0; i < 400; i++) {
-		if (*(volatile u32 *)dma_done == FALCON_STATS_DONE) {
-			rmb(); /* Ensure the stats are valid. */
-			return 0;
-		}
-		udelay(10);
-	}
+	efx->phy_op->reconfigure(efx);
+	rc = efx->mac_op->reconfigure(efx);
+	BUG_ON(rc);
 
-	EFX_ERR(efx, "timed out waiting for statistics\n");
-	return -ETIMEDOUT;
+	falcon_start_nic_stats(efx);
+
+	/* Synchronise efx->link_state with the kernel */
+	efx_link_status_changed(efx);
+
+	return 0;
 }
 
 /**************************************************************************
@@ -2066,18 +699,18 @@
 /* Wait for GMII access to complete */
 static int falcon_gmii_wait(struct efx_nic *efx)
 {
-	efx_dword_t md_stat;
+	efx_oword_t md_stat;
 	int count;
 
 	/* wait upto 50ms - taken max from datasheet */
 	for (count = 0; count < 5000; count++) {
-		falcon_readl(efx, &md_stat, MD_STAT_REG_KER);
-		if (EFX_DWORD_FIELD(md_stat, MD_BSY) == 0) {
-			if (EFX_DWORD_FIELD(md_stat, MD_LNFL) != 0 ||
-			    EFX_DWORD_FIELD(md_stat, MD_BSERR) != 0) {
+		efx_reado(efx, &md_stat, FR_AB_MD_STAT);
+		if (EFX_OWORD_FIELD(md_stat, FRF_AB_MD_BSY) == 0) {
+			if (EFX_OWORD_FIELD(md_stat, FRF_AB_MD_LNFL) != 0 ||
+			    EFX_OWORD_FIELD(md_stat, FRF_AB_MD_BSERR) != 0) {
 				EFX_ERR(efx, "error from GMII access "
-					EFX_DWORD_FMT"\n",
-					EFX_DWORD_VAL(md_stat));
+					EFX_OWORD_FMT"\n",
+					EFX_OWORD_VAL(md_stat));
 				return -EIO;
 			}
 			return 0;
@@ -2099,7 +732,7 @@
 	EFX_REGDUMP(efx, "writing MDIO %d register %d.%d with 0x%04x\n",
 		    prtad, devad, addr, value);
 
-	spin_lock_bh(&efx->phy_lock);
+	mutex_lock(&efx->mdio_lock);
 
 	/* Check MDIO not currently being accessed */
 	rc = falcon_gmii_wait(efx);
@@ -2107,34 +740,35 @@
 		goto out;
 
 	/* Write the address/ID register */
-	EFX_POPULATE_OWORD_1(reg, MD_PHY_ADR, addr);
-	falcon_write(efx, &reg, MD_PHY_ADR_REG_KER);
+	EFX_POPULATE_OWORD_1(reg, FRF_AB_MD_PHY_ADR, addr);
+	efx_writeo(efx, &reg, FR_AB_MD_PHY_ADR);
 
-	EFX_POPULATE_OWORD_2(reg, MD_PRT_ADR, prtad, MD_DEV_ADR, devad);
-	falcon_write(efx, &reg, MD_ID_REG_KER);
+	EFX_POPULATE_OWORD_2(reg, FRF_AB_MD_PRT_ADR, prtad,
+			     FRF_AB_MD_DEV_ADR, devad);
+	efx_writeo(efx, &reg, FR_AB_MD_ID);
 
 	/* Write data */
-	EFX_POPULATE_OWORD_1(reg, MD_TXD, value);
-	falcon_write(efx, &reg, MD_TXD_REG_KER);
+	EFX_POPULATE_OWORD_1(reg, FRF_AB_MD_TXD, value);
+	efx_writeo(efx, &reg, FR_AB_MD_TXD);
 
 	EFX_POPULATE_OWORD_2(reg,
-			     MD_WRC, 1,
-			     MD_GC, 0);
-	falcon_write(efx, &reg, MD_CS_REG_KER);
+			     FRF_AB_MD_WRC, 1,
+			     FRF_AB_MD_GC, 0);
+	efx_writeo(efx, &reg, FR_AB_MD_CS);
 
 	/* Wait for data to be written */
 	rc = falcon_gmii_wait(efx);
 	if (rc) {
 		/* Abort the write operation */
 		EFX_POPULATE_OWORD_2(reg,
-				     MD_WRC, 0,
-				     MD_GC, 1);
-		falcon_write(efx, &reg, MD_CS_REG_KER);
+				     FRF_AB_MD_WRC, 0,
+				     FRF_AB_MD_GC, 1);
+		efx_writeo(efx, &reg, FR_AB_MD_CS);
 		udelay(10);
 	}
 
- out:
-	spin_unlock_bh(&efx->phy_lock);
+out:
+	mutex_unlock(&efx->mdio_lock);
 	return rc;
 }
 
@@ -2146,152 +780,139 @@
 	efx_oword_t reg;
 	int rc;
 
-	spin_lock_bh(&efx->phy_lock);
+	mutex_lock(&efx->mdio_lock);
 
 	/* Check MDIO not currently being accessed */
 	rc = falcon_gmii_wait(efx);
 	if (rc)
 		goto out;
 
-	EFX_POPULATE_OWORD_1(reg, MD_PHY_ADR, addr);
-	falcon_write(efx, &reg, MD_PHY_ADR_REG_KER);
+	EFX_POPULATE_OWORD_1(reg, FRF_AB_MD_PHY_ADR, addr);
+	efx_writeo(efx, &reg, FR_AB_MD_PHY_ADR);
 
-	EFX_POPULATE_OWORD_2(reg, MD_PRT_ADR, prtad, MD_DEV_ADR, devad);
-	falcon_write(efx, &reg, MD_ID_REG_KER);
+	EFX_POPULATE_OWORD_2(reg, FRF_AB_MD_PRT_ADR, prtad,
+			     FRF_AB_MD_DEV_ADR, devad);
+	efx_writeo(efx, &reg, FR_AB_MD_ID);
 
 	/* Request data to be read */
-	EFX_POPULATE_OWORD_2(reg, MD_RDC, 1, MD_GC, 0);
-	falcon_write(efx, &reg, MD_CS_REG_KER);
+	EFX_POPULATE_OWORD_2(reg, FRF_AB_MD_RDC, 1, FRF_AB_MD_GC, 0);
+	efx_writeo(efx, &reg, FR_AB_MD_CS);
 
 	/* Wait for data to become available */
 	rc = falcon_gmii_wait(efx);
 	if (rc == 0) {
-		falcon_read(efx, &reg, MD_RXD_REG_KER);
-		rc = EFX_OWORD_FIELD(reg, MD_RXD);
+		efx_reado(efx, &reg, FR_AB_MD_RXD);
+		rc = EFX_OWORD_FIELD(reg, FRF_AB_MD_RXD);
 		EFX_REGDUMP(efx, "read from MDIO %d register %d.%d, got %04x\n",
 			    prtad, devad, addr, rc);
 	} else {
 		/* Abort the read operation */
 		EFX_POPULATE_OWORD_2(reg,
-				     MD_RIC, 0,
-				     MD_GC, 1);
-		falcon_write(efx, &reg, MD_CS_REG_KER);
+				     FRF_AB_MD_RIC, 0,
+				     FRF_AB_MD_GC, 1);
+		efx_writeo(efx, &reg, FR_AB_MD_CS);
 
 		EFX_LOG(efx, "read from MDIO %d register %d.%d, got error %d\n",
 			prtad, devad, addr, rc);
 	}
 
- out:
-	spin_unlock_bh(&efx->phy_lock);
+out:
+	mutex_unlock(&efx->mdio_lock);
 	return rc;
 }
 
-static int falcon_probe_phy(struct efx_nic *efx)
+static void falcon_clock_mac(struct efx_nic *efx)
 {
-	switch (efx->phy_type) {
-	case PHY_TYPE_SFX7101:
-		efx->phy_op = &falcon_sfx7101_phy_ops;
-		break;
-	case PHY_TYPE_SFT9001A:
-	case PHY_TYPE_SFT9001B:
-		efx->phy_op = &falcon_sft9001_phy_ops;
-		break;
-	case PHY_TYPE_QT2022C2:
-	case PHY_TYPE_QT2025C:
-		efx->phy_op = &falcon_xfp_phy_ops;
-		break;
-	default:
-		EFX_ERR(efx, "Unknown PHY type %d\n",
-			efx->phy_type);
-		return -1;
-	}
-
-	if (efx->phy_op->macs & EFX_XMAC)
-		efx->loopback_modes |= ((1 << LOOPBACK_XGMII) |
-					(1 << LOOPBACK_XGXS) |
-					(1 << LOOPBACK_XAUI));
-	if (efx->phy_op->macs & EFX_GMAC)
-		efx->loopback_modes |= (1 << LOOPBACK_GMAC);
-	efx->loopback_modes |= efx->phy_op->loopbacks;
+	unsigned strap_val;
+	efx_oword_t nic_stat;
 
-	return 0;
+	/* Configure the NIC generated MAC clock correctly */
+	efx_reado(efx, &nic_stat, FR_AB_NIC_STAT);
+	strap_val = EFX_IS10G(efx) ? 5 : 3;
+	if (efx_nic_rev(efx) >= EFX_REV_FALCON_B0) {
+		EFX_SET_OWORD_FIELD(nic_stat, FRF_BB_EE_STRAP_EN, 1);
+		EFX_SET_OWORD_FIELD(nic_stat, FRF_BB_EE_STRAP, strap_val);
+		efx_writeo(efx, &nic_stat, FR_AB_NIC_STAT);
+	} else {
+		/* Falcon A1 does not support 1G/10G speed switching
+		 * and must not be used with a PHY that does. */
+		BUG_ON(EFX_OWORD_FIELD(nic_stat, FRF_AB_STRAP_PINS) !=
+		       strap_val);
+	}
 }
 
-int falcon_switch_mac(struct efx_nic *efx)
+static void falcon_switch_mac(struct efx_nic *efx)
 {
 	struct efx_mac_operations *old_mac_op = efx->mac_op;
-	efx_oword_t nic_stat;
-	unsigned strap_val;
-	int rc = 0;
-
-	/* Don't try to fetch MAC stats while we're switching MACs */
-	efx_stats_disable(efx);
-
-	/* Internal loopbacks override the phy speed setting */
-	if (efx->loopback_mode == LOOPBACK_GMAC) {
-		efx->link_speed = 1000;
-		efx->link_fd = true;
-	} else if (LOOPBACK_INTERNAL(efx)) {
-		efx->link_speed = 10000;
-		efx->link_fd = true;
-	}
+	struct falcon_nic_data *nic_data = efx->nic_data;
+	unsigned int stats_done_offset;
 
 	WARN_ON(!mutex_is_locked(&efx->mac_lock));
+	WARN_ON(nic_data->stats_disable_count == 0);
+
 	efx->mac_op = (EFX_IS10G(efx) ?
 		       &falcon_xmac_operations : &falcon_gmac_operations);
 
-	/* Always push the NIC_STAT_REG setting even if the mac hasn't
-	 * changed, because this function is run post online reset */
-	falcon_read(efx, &nic_stat, NIC_STAT_REG);
-	strap_val = EFX_IS10G(efx) ? 5 : 3;
-	if (falcon_rev(efx) >= FALCON_REV_B0) {
-		EFX_SET_OWORD_FIELD(nic_stat, EE_STRAP_EN, 1);
-		EFX_SET_OWORD_FIELD(nic_stat, EE_STRAP_OVR, strap_val);
-		falcon_write(efx, &nic_stat, NIC_STAT_REG);
-	} else {
-		/* Falcon A1 does not support 1G/10G speed switching
-		 * and must not be used with a PHY that does. */
-		BUG_ON(EFX_OWORD_FIELD(nic_stat, STRAP_PINS) != strap_val);
-	}
+	if (EFX_IS10G(efx))
+		stats_done_offset = XgDmaDone_offset;
+	else
+		stats_done_offset = GDmaDone_offset;
+	nic_data->stats_dma_done = efx->stats_buffer.addr + stats_done_offset;
 
 	if (old_mac_op == efx->mac_op)
-		goto out;
+		return;
+
+	falcon_clock_mac(efx);
 
 	EFX_LOG(efx, "selected %cMAC\n", EFX_IS10G(efx) ? 'X' : 'G');
 	/* Not all macs support a mac-level link state */
-	efx->mac_up = true;
-
-	rc = falcon_reset_macs(efx);
-out:
-	efx_stats_enable(efx);
-	return rc;
+	efx->xmac_poll_required = false;
+	falcon_reset_macs(efx);
 }
 
 /* This call is responsible for hooking in the MAC and PHY operations */
-int falcon_probe_port(struct efx_nic *efx)
+static int falcon_probe_port(struct efx_nic *efx)
 {
 	int rc;
 
-	/* Hook in PHY operations table */
-	rc = falcon_probe_phy(efx);
-	if (rc)
-		return rc;
+	switch (efx->phy_type) {
+	case PHY_TYPE_SFX7101:
+		efx->phy_op = &falcon_sfx7101_phy_ops;
+		break;
+	case PHY_TYPE_SFT9001A:
+	case PHY_TYPE_SFT9001B:
+		efx->phy_op = &falcon_sft9001_phy_ops;
+		break;
+	case PHY_TYPE_QT2022C2:
+	case PHY_TYPE_QT2025C:
+		efx->phy_op = &falcon_qt202x_phy_ops;
+		break;
+	default:
+		EFX_ERR(efx, "Unknown PHY type %d\n",
+			efx->phy_type);
+		return -ENODEV;
+	}
 
-	/* Set up MDIO structure for PHY */
-	efx->mdio.mmds = efx->phy_op->mmds;
-	efx->mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
+	/* Fill out MDIO structure and loopback modes */
 	efx->mdio.mdio_read = falcon_mdio_read;
 	efx->mdio.mdio_write = falcon_mdio_write;
+	rc = efx->phy_op->probe(efx);
+	if (rc != 0)
+		return rc;
+
+	/* Initial assumption */
+	efx->link_state.speed = 10000;
+	efx->link_state.fd = true;
 
 	/* Hardware flow ctrl. FalconA RX FIFO too small for pause generation */
-	if (falcon_rev(efx) >= FALCON_REV_B0)
+	if (efx_nic_rev(efx) >= EFX_REV_FALCON_B0)
 		efx->wanted_fc = EFX_FC_RX | EFX_FC_TX;
 	else
 		efx->wanted_fc = EFX_FC_RX;
 
 	/* Allocate buffer for stats */
-	rc = falcon_alloc_buffer(efx, &efx->stats_buffer,
-				 FALCON_MAC_STATS_SIZE);
+	rc = efx_nic_alloc_buffer(efx, &efx->stats_buffer,
+				  FALCON_MAC_STATS_SIZE);
 	if (rc)
 		return rc;
 	EFX_LOG(efx, "stats buffer at %llx (virt %p phys %llx)\n",
@@ -2302,40 +923,20 @@
 	return 0;
 }
 
-void falcon_remove_port(struct efx_nic *efx)
-{
-	falcon_free_buffer(efx, &efx->stats_buffer);
-}
-
-/**************************************************************************
- *
- * Multicast filtering
- *
- **************************************************************************
- */
-
-void falcon_set_multicast_hash(struct efx_nic *efx)
+static void falcon_remove_port(struct efx_nic *efx)
 {
-	union efx_multicast_hash *mc_hash = &efx->multicast_hash;
-
-	/* Broadcast packets go through the multicast hash filter.
-	 * ether_crc_le() of the broadcast address is 0xbe2612ff
-	 * so we always add bit 0xff to the mask.
-	 */
-	set_bit_le(0xff, mc_hash->byte);
-
-	falcon_write(efx, &mc_hash->oword[0], MAC_MCAST_HASH_REG0_KER);
-	falcon_write(efx, &mc_hash->oword[1], MAC_MCAST_HASH_REG1_KER);
+	efx->phy_op->remove(efx);
+	efx_nic_free_buffer(efx, &efx->stats_buffer);
 }
 
-
 /**************************************************************************
  *
  * Falcon test code
  *
  **************************************************************************/
 
-int falcon_read_nvram(struct efx_nic *efx, struct falcon_nvconfig *nvconfig_out)
+static int
+falcon_read_nvram(struct efx_nic *efx, struct falcon_nvconfig *nvconfig_out)
 {
 	struct falcon_nvconfig *nvconfig;
 	struct efx_spi_device *spi;
@@ -2351,10 +952,10 @@
 	region = kmalloc(FALCON_NVCONFIG_END, GFP_KERNEL);
 	if (!region)
 		return -ENOMEM;
-	nvconfig = region + NVCONFIG_OFFSET;
+	nvconfig = region + FALCON_NVCONFIG_OFFSET;
 
 	mutex_lock(&efx->spi_lock);
-	rc = falcon_spi_read(spi, 0, FALCON_NVCONFIG_END, NULL, region);
+	rc = falcon_spi_read(efx, spi, 0, FALCON_NVCONFIG_END, NULL, region);
 	mutex_unlock(&efx->spi_lock);
 	if (rc) {
 		EFX_ERR(efx, "Failed to read %s\n",
@@ -2367,7 +968,7 @@
 	struct_ver = le16_to_cpu(nvconfig->board_struct_ver);
 
 	rc = -EINVAL;
-	if (magic_num != NVCONFIG_BOARD_MAGIC_NUM) {
+	if (magic_num != FALCON_NVCONFIG_BOARD_MAGIC_NUM) {
 		EFX_ERR(efx, "NVRAM bad magic 0x%x\n", magic_num);
 		goto out;
 	}
@@ -2398,107 +999,54 @@
 	return rc;
 }
 
-/* Registers tested in the falcon register test */
-static struct {
-	unsigned address;
-	efx_oword_t mask;
-} efx_test_registers[] = {
-	{ ADR_REGION_REG_KER,
+static int falcon_test_nvram(struct efx_nic *efx)
+{
+	return falcon_read_nvram(efx, NULL);
+}
+
+static const struct efx_nic_register_test falcon_b0_register_tests[] = {
+	{ FR_AZ_ADR_REGION,
 	  EFX_OWORD32(0x0001FFFF, 0x0001FFFF, 0x0001FFFF, 0x0001FFFF) },
-	{ RX_CFG_REG_KER,
+	{ FR_AZ_RX_CFG,
 	  EFX_OWORD32(0xFFFFFFFE, 0x00017FFF, 0x00000000, 0x00000000) },
-	{ TX_CFG_REG_KER,
+	{ FR_AZ_TX_CFG,
 	  EFX_OWORD32(0x7FFF0037, 0x00000000, 0x00000000, 0x00000000) },
-	{ TX_CFG2_REG_KER,
+	{ FR_AZ_TX_RESERVED,
 	  EFX_OWORD32(0xFFFEFE80, 0x1FFFFFFF, 0x020000FE, 0x007FFFFF) },
-	{ MAC0_CTRL_REG_KER,
+	{ FR_AB_MAC_CTRL,
 	  EFX_OWORD32(0xFFFF0000, 0x00000000, 0x00000000, 0x00000000) },
-	{ SRM_TX_DC_CFG_REG_KER,
+	{ FR_AZ_SRM_TX_DC_CFG,
 	  EFX_OWORD32(0x001FFFFF, 0x00000000, 0x00000000, 0x00000000) },
-	{ RX_DC_CFG_REG_KER,
+	{ FR_AZ_RX_DC_CFG,
 	  EFX_OWORD32(0x0000000F, 0x00000000, 0x00000000, 0x00000000) },
-	{ RX_DC_PF_WM_REG_KER,
+	{ FR_AZ_RX_DC_PF_WM,
 	  EFX_OWORD32(0x000003FF, 0x00000000, 0x00000000, 0x00000000) },
-	{ DP_CTRL_REG,
+	{ FR_BZ_DP_CTRL,
 	  EFX_OWORD32(0x00000FFF, 0x00000000, 0x00000000, 0x00000000) },
-	{ GM_CFG2_REG,
+	{ FR_AB_GM_CFG2,
 	  EFX_OWORD32(0x00007337, 0x00000000, 0x00000000, 0x00000000) },
-	{ GMF_CFG0_REG,
+	{ FR_AB_GMF_CFG0,
 	  EFX_OWORD32(0x00001F1F, 0x00000000, 0x00000000, 0x00000000) },
-	{ XM_GLB_CFG_REG,
+	{ FR_AB_XM_GLB_CFG,
 	  EFX_OWORD32(0x00000C68, 0x00000000, 0x00000000, 0x00000000) },
-	{ XM_TX_CFG_REG,
+	{ FR_AB_XM_TX_CFG,
 	  EFX_OWORD32(0x00080164, 0x00000000, 0x00000000, 0x00000000) },
-	{ XM_RX_CFG_REG,
+	{ FR_AB_XM_RX_CFG,
 	  EFX_OWORD32(0x07100A0C, 0x00000000, 0x00000000, 0x00000000) },
-	{ XM_RX_PARAM_REG,
+	{ FR_AB_XM_RX_PARAM,
 	  EFX_OWORD32(0x00001FF8, 0x00000000, 0x00000000, 0x00000000) },
-	{ XM_FC_REG,
+	{ FR_AB_XM_FC,
 	  EFX_OWORD32(0xFFFF0001, 0x00000000, 0x00000000, 0x00000000) },
-	{ XM_ADR_LO_REG,
+	{ FR_AB_XM_ADR_LO,
 	  EFX_OWORD32(0xFFFFFFFF, 0x00000000, 0x00000000, 0x00000000) },
-	{ XX_SD_CTL_REG,
+	{ FR_AB_XX_SD_CTL,
 	  EFX_OWORD32(0x0003FF0F, 0x00000000, 0x00000000, 0x00000000) },
 };
 
-static bool efx_masked_compare_oword(const efx_oword_t *a, const efx_oword_t *b,
-				     const efx_oword_t *mask)
-{
-	return ((a->u64[0] ^ b->u64[0]) & mask->u64[0]) ||
-		((a->u64[1] ^ b->u64[1]) & mask->u64[1]);
-}
-
-int falcon_test_registers(struct efx_nic *efx)
+static int falcon_b0_test_registers(struct efx_nic *efx)
 {
-	unsigned address = 0, i, j;
-	efx_oword_t mask, imask, original, reg, buf;
-
-	/* Falcon should be in loopback to isolate the XMAC from the PHY */
-	WARN_ON(!LOOPBACK_INTERNAL(efx));
-
-	for (i = 0; i < ARRAY_SIZE(efx_test_registers); ++i) {
-		address = efx_test_registers[i].address;
-		mask = imask = efx_test_registers[i].mask;
-		EFX_INVERT_OWORD(imask);
-
-		falcon_read(efx, &original, address);
-
-		/* bit sweep on and off */
-		for (j = 0; j < 128; j++) {
-			if (!EFX_EXTRACT_OWORD32(mask, j, j))
-				continue;
-
-			/* Test this testable bit can be set in isolation */
-			EFX_AND_OWORD(reg, original, mask);
-			EFX_SET_OWORD32(reg, j, j, 1);
-
-			falcon_write(efx, &reg, address);
-			falcon_read(efx, &buf, address);
-
-			if (efx_masked_compare_oword(&reg, &buf, &mask))
-				goto fail;
-
-			/* Test this testable bit can be cleared in isolation */
-			EFX_OR_OWORD(reg, original, mask);
-			EFX_SET_OWORD32(reg, j, j, 0);
-
-			falcon_write(efx, &reg, address);
-			falcon_read(efx, &buf, address);
-
-			if (efx_masked_compare_oword(&reg, &buf, &mask))
-				goto fail;
-		}
-
-		falcon_write(efx, &original, address);
-	}
-
-	return 0;
-
-fail:
-	EFX_ERR(efx, "wrote "EFX_OWORD_FMT" read "EFX_OWORD_FMT
-		" at address 0x%x mask "EFX_OWORD_FMT"\n", EFX_OWORD_VAL(reg),
-		EFX_OWORD_VAL(buf), address, EFX_OWORD_VAL(mask));
-	return -EIO;
+	return efx_nic_test_registers(efx, falcon_b0_register_tests,
+				      ARRAY_SIZE(falcon_b0_register_tests));
 }
 
 /**************************************************************************
@@ -2510,13 +1058,13 @@
 
 /* Resets NIC to known state.  This routine must be called in process
  * context and is allowed to sleep. */
-int falcon_reset_hw(struct efx_nic *efx, enum reset_type method)
+static int falcon_reset_hw(struct efx_nic *efx, enum reset_type method)
 {
 	struct falcon_nic_data *nic_data = efx->nic_data;
 	efx_oword_t glb_ctl_reg_ker;
 	int rc;
 
-	EFX_LOG(efx, "performing hardware reset (%d)\n", method);
+	EFX_LOG(efx, "performing %s hardware reset\n", RESET_TYPE(method));
 
 	/* Initiate device reset */
 	if (method == RESET_TYPE_WORLD) {
@@ -2526,7 +1074,7 @@
 				"function prior to hardware reset\n");
 			goto fail1;
 		}
-		if (FALCON_IS_DUAL_FUNC(efx)) {
+		if (efx_nic_is_dual_func(efx)) {
 			rc = pci_save_state(nic_data->pci_dev2);
 			if (rc) {
 				EFX_ERR(efx, "failed to backup PCI state of "
@@ -2537,29 +1085,31 @@
 		}
 
 		EFX_POPULATE_OWORD_2(glb_ctl_reg_ker,
-				     EXT_PHY_RST_DUR, 0x7,
-				     SWRST, 1);
+				     FRF_AB_EXT_PHY_RST_DUR,
+				     FFE_AB_EXT_PHY_RST_DUR_10240US,
+				     FRF_AB_SWRST, 1);
 	} else {
-		int reset_phy = (method == RESET_TYPE_INVISIBLE ?
-				 EXCLUDE_FROM_RESET : 0);
-
 		EFX_POPULATE_OWORD_7(glb_ctl_reg_ker,
-				     EXT_PHY_RST_CTL, reset_phy,
-				     PCIE_CORE_RST_CTL, EXCLUDE_FROM_RESET,
-				     PCIE_NSTCK_RST_CTL, EXCLUDE_FROM_RESET,
-				     PCIE_SD_RST_CTL, EXCLUDE_FROM_RESET,
-				     EE_RST_CTL, EXCLUDE_FROM_RESET,
-				     EXT_PHY_RST_DUR, 0x7 /* 10ms */,
-				     SWRST, 1);
+				     /* exclude PHY from "invisible" reset */
+				     FRF_AB_EXT_PHY_RST_CTL,
+				     method == RESET_TYPE_INVISIBLE,
+				     /* exclude EEPROM/flash and PCIe */
+				     FRF_AB_PCIE_CORE_RST_CTL, 1,
+				     FRF_AB_PCIE_NSTKY_RST_CTL, 1,
+				     FRF_AB_PCIE_SD_RST_CTL, 1,
+				     FRF_AB_EE_RST_CTL, 1,
+				     FRF_AB_EXT_PHY_RST_DUR,
+				     FFE_AB_EXT_PHY_RST_DUR_10240US,
+				     FRF_AB_SWRST, 1);
 	}
-	falcon_write(efx, &glb_ctl_reg_ker, GLB_CTL_REG_KER);
+	efx_writeo(efx, &glb_ctl_reg_ker, FR_AB_GLB_CTL);
 
 	EFX_LOG(efx, "waiting for hardware reset\n");
 	schedule_timeout_uninterruptible(HZ / 20);
 
 	/* Restore PCI configuration if needed */
 	if (method == RESET_TYPE_WORLD) {
-		if (FALCON_IS_DUAL_FUNC(efx)) {
+		if (efx_nic_is_dual_func(efx)) {
 			rc = pci_restore_state(nic_data->pci_dev2);
 			if (rc) {
 				EFX_ERR(efx, "failed to restore PCI config for "
@@ -2577,8 +1127,8 @@
 	}
 
 	/* Assert that reset complete */
-	falcon_read(efx, &glb_ctl_reg_ker, GLB_CTL_REG_KER);
-	if (EFX_OWORD_FIELD(glb_ctl_reg_ker, SWRST) != 0) {
+	efx_reado(efx, &glb_ctl_reg_ker, FR_AB_GLB_CTL);
+	if (EFX_OWORD_FIELD(glb_ctl_reg_ker, FRF_AB_SWRST) != 0) {
 		rc = -ETIMEDOUT;
 		EFX_ERR(efx, "timed out waiting for hardware reset\n");
 		goto fail5;
@@ -2597,6 +1147,44 @@
 	return rc;
 }
 
+static void falcon_monitor(struct efx_nic *efx)
+{
+	bool link_changed;
+	int rc;
+
+	BUG_ON(!mutex_is_locked(&efx->mac_lock));
+
+	rc = falcon_board(efx)->type->monitor(efx);
+	if (rc) {
+		EFX_ERR(efx, "Board sensor %s; shutting down PHY\n",
+			(rc == -ERANGE) ? "reported fault" : "failed");
+		efx->phy_mode |= PHY_MODE_LOW_POWER;
+		rc = __efx_reconfigure_port(efx);
+		WARN_ON(rc);
+	}
+
+	if (LOOPBACK_INTERNAL(efx))
+		link_changed = falcon_loopback_link_poll(efx);
+	else
+		link_changed = efx->phy_op->poll(efx);
+
+	if (link_changed) {
+		falcon_stop_nic_stats(efx);
+		falcon_deconfigure_mac_wrapper(efx);
+
+		falcon_switch_mac(efx);
+		rc = efx->mac_op->reconfigure(efx);
+		BUG_ON(rc);
+
+		falcon_start_nic_stats(efx);
+
+		efx_link_status_changed(efx);
+	}
+
+	if (EFX_IS10G(efx))
+		falcon_poll_xmac(efx);
+}
+
 /* Zeroes out the SRAM contents.  This routine must be called in
  * process context and is allowed to sleep.
  */
@@ -2606,16 +1194,16 @@
 	int count;
 
 	/* Set the SRAM wake/sleep GPIO appropriately. */
-	falcon_read(efx, &gpio_cfg_reg_ker, GPIO_CTL_REG_KER);
-	EFX_SET_OWORD_FIELD(gpio_cfg_reg_ker, GPIO1_OEN, 1);
-	EFX_SET_OWORD_FIELD(gpio_cfg_reg_ker, GPIO1_OUT, 1);
-	falcon_write(efx, &gpio_cfg_reg_ker, GPIO_CTL_REG_KER);
+	efx_reado(efx, &gpio_cfg_reg_ker, FR_AB_GPIO_CTL);
+	EFX_SET_OWORD_FIELD(gpio_cfg_reg_ker, FRF_AB_GPIO1_OEN, 1);
+	EFX_SET_OWORD_FIELD(gpio_cfg_reg_ker, FRF_AB_GPIO1_OUT, 1);
+	efx_writeo(efx, &gpio_cfg_reg_ker, FR_AB_GPIO_CTL);
 
 	/* Initiate SRAM reset */
 	EFX_POPULATE_OWORD_2(srm_cfg_reg_ker,
-			     SRAM_OOB_BT_INIT_EN, 1,
-			     SRM_NUM_BANKS_AND_BANK_SIZE, 0);
-	falcon_write(efx, &srm_cfg_reg_ker, SRM_CFG_REG_KER);
+			     FRF_AZ_SRM_INIT_EN, 1,
+			     FRF_AZ_SRM_NB_SZ, 0);
+	efx_writeo(efx, &srm_cfg_reg_ker, FR_AZ_SRM_CFG);
 
 	/* Wait for SRAM reset to complete */
 	count = 0;
@@ -2626,8 +1214,8 @@
 		schedule_timeout_uninterruptible(HZ / 50);
 
 		/* Check for reset complete */
-		falcon_read(efx, &srm_cfg_reg_ker, SRM_CFG_REG_KER);
-		if (!EFX_OWORD_FIELD(srm_cfg_reg_ker, SRAM_OOB_BT_INIT_EN)) {
+		efx_reado(efx, &srm_cfg_reg_ker, FR_AZ_SRM_CFG);
+		if (!EFX_OWORD_FIELD(srm_cfg_reg_ker, FRF_AZ_SRM_INIT_EN)) {
 			EFX_LOG(efx, "SRAM reset complete\n");
 
 			return 0;
@@ -2663,8 +1251,6 @@
 		spi_device->block_size =
 			1 << SPI_DEV_TYPE_FIELD(device_type,
 						SPI_DEV_TYPE_BLOCK_SIZE);
-
-		spi_device->efx = efx;
 	} else {
 		spi_device = NULL;
 	}
@@ -2674,7 +1260,6 @@
 	return 0;
 }
 
-
 static void falcon_remove_spi_devices(struct efx_nic *efx)
 {
 	kfree(efx->spi_eeprom);
@@ -2712,16 +1297,16 @@
 		board_rev = le16_to_cpu(v2->board_revision);
 
 		if (le16_to_cpu(nvconfig->board_struct_ver) >= 3) {
-			__le32 fl = v3->spi_device_type[EE_SPI_FLASH];
-			__le32 ee = v3->spi_device_type[EE_SPI_EEPROM];
-			rc = falcon_spi_device_init(efx, &efx->spi_flash,
-						    EE_SPI_FLASH,
-						    le32_to_cpu(fl));
+			rc = falcon_spi_device_init(
+				efx, &efx->spi_flash, FFE_AB_SPI_DEVICE_FLASH,
+				le32_to_cpu(v3->spi_device_type
+					    [FFE_AB_SPI_DEVICE_FLASH]));
 			if (rc)
 				goto fail2;
-			rc = falcon_spi_device_init(efx, &efx->spi_eeprom,
-						    EE_SPI_EEPROM,
-						    le32_to_cpu(ee));
+			rc = falcon_spi_device_init(
+				efx, &efx->spi_eeprom, FFE_AB_SPI_DEVICE_EEPROM,
+				le32_to_cpu(v3->spi_device_type
+					    [FFE_AB_SPI_DEVICE_EEPROM]));
 			if (rc)
 				goto fail2;
 		}
@@ -2732,7 +1317,9 @@
 
 	EFX_LOG(efx, "PHY is %d phy_id %d\n", efx->phy_type, efx->mdio.prtad);
 
-	efx_set_board_info(efx, board_rev);
+	rc = falcon_probe_board(efx, board_rev);
+	if (rc)
+		goto fail2;
 
 	kfree(nvconfig);
 	return 0;
@@ -2744,89 +1331,49 @@
 	return rc;
 }
 
-/* Probe the NIC variant (revision, ASIC vs FPGA, function count, port
- * count, port speed).  Set workaround and feature flags accordingly.
- */
-static int falcon_probe_nic_variant(struct efx_nic *efx)
-{
-	efx_oword_t altera_build;
-	efx_oword_t nic_stat;
-
-	falcon_read(efx, &altera_build, ALTERA_BUILD_REG_KER);
-	if (EFX_OWORD_FIELD(altera_build, VER_ALL)) {
-		EFX_ERR(efx, "Falcon FPGA not supported\n");
-		return -ENODEV;
-	}
-
-	falcon_read(efx, &nic_stat, NIC_STAT_REG);
-
-	switch (falcon_rev(efx)) {
-	case FALCON_REV_A0:
-	case 0xff:
-		EFX_ERR(efx, "Falcon rev A0 not supported\n");
-		return -ENODEV;
-
-	case FALCON_REV_A1:
-		if (EFX_OWORD_FIELD(nic_stat, STRAP_PCIE) == 0) {
-			EFX_ERR(efx, "Falcon rev A1 PCI-X not supported\n");
-			return -ENODEV;
-		}
-		break;
-
-	case FALCON_REV_B0:
-		break;
-
-	default:
-		EFX_ERR(efx, "Unknown Falcon rev %d\n", falcon_rev(efx));
-		return -ENODEV;
-	}
-
-	/* Initial assumed speed */
-	efx->link_speed = EFX_OWORD_FIELD(nic_stat, STRAP_10G) ? 10000 : 1000;
-
-	return 0;
-}
-
 /* Probe all SPI devices on the NIC */
 static void falcon_probe_spi_devices(struct efx_nic *efx)
 {
 	efx_oword_t nic_stat, gpio_ctl, ee_vpd_cfg;
 	int boot_dev;
 
-	falcon_read(efx, &gpio_ctl, GPIO_CTL_REG_KER);
-	falcon_read(efx, &nic_stat, NIC_STAT_REG);
-	falcon_read(efx, &ee_vpd_cfg, EE_VPD_CFG_REG_KER);
-
-	if (EFX_OWORD_FIELD(gpio_ctl, BOOTED_USING_NVDEVICE)) {
-		boot_dev = (EFX_OWORD_FIELD(nic_stat, SF_PRST) ?
-			    EE_SPI_FLASH : EE_SPI_EEPROM);
+	efx_reado(efx, &gpio_ctl, FR_AB_GPIO_CTL);
+	efx_reado(efx, &nic_stat, FR_AB_NIC_STAT);
+	efx_reado(efx, &ee_vpd_cfg, FR_AB_EE_VPD_CFG0);
+
+	if (EFX_OWORD_FIELD(gpio_ctl, FRF_AB_GPIO3_PWRUP_VALUE)) {
+		boot_dev = (EFX_OWORD_FIELD(nic_stat, FRF_AB_SF_PRST) ?
+			    FFE_AB_SPI_DEVICE_FLASH : FFE_AB_SPI_DEVICE_EEPROM);
 		EFX_LOG(efx, "Booted from %s\n",
-			boot_dev == EE_SPI_FLASH ? "flash" : "EEPROM");
+			boot_dev == FFE_AB_SPI_DEVICE_FLASH ? "flash" : "EEPROM");
 	} else {
 		/* Disable VPD and set clock dividers to safe
 		 * values for initial programming. */
 		boot_dev = -1;
 		EFX_LOG(efx, "Booted from internal ASIC settings;"
 			" setting SPI config\n");
-		EFX_POPULATE_OWORD_3(ee_vpd_cfg, EE_VPD_EN, 0,
+		EFX_POPULATE_OWORD_3(ee_vpd_cfg, FRF_AB_EE_VPD_EN, 0,
 				     /* 125 MHz / 7 ~= 20 MHz */
-				     EE_SF_CLOCK_DIV, 7,
+				     FRF_AB_EE_SF_CLOCK_DIV, 7,
 				     /* 125 MHz / 63 ~= 2 MHz */
-				     EE_EE_CLOCK_DIV, 63);
-		falcon_write(efx, &ee_vpd_cfg, EE_VPD_CFG_REG_KER);
+				     FRF_AB_EE_EE_CLOCK_DIV, 63);
+		efx_writeo(efx, &ee_vpd_cfg, FR_AB_EE_VPD_CFG0);
 	}
 
-	if (boot_dev == EE_SPI_FLASH)
-		falcon_spi_device_init(efx, &efx->spi_flash, EE_SPI_FLASH,
+	if (boot_dev == FFE_AB_SPI_DEVICE_FLASH)
+		falcon_spi_device_init(efx, &efx->spi_flash,
+				       FFE_AB_SPI_DEVICE_FLASH,
 				       default_flash_type);
-	if (boot_dev == EE_SPI_EEPROM)
-		falcon_spi_device_init(efx, &efx->spi_eeprom, EE_SPI_EEPROM,
+	if (boot_dev == FFE_AB_SPI_DEVICE_EEPROM)
+		falcon_spi_device_init(efx, &efx->spi_eeprom,
+				       FFE_AB_SPI_DEVICE_EEPROM,
 				       large_eeprom_type);
 }
 
-int falcon_probe_nic(struct efx_nic *efx)
+static int falcon_probe_nic(struct efx_nic *efx)
 {
 	struct falcon_nic_data *nic_data;
+	struct falcon_board *board;
 	int rc;
 
 	/* Allocate storage for hardware specific data */
@@ -2835,15 +1382,33 @@
 		return -ENOMEM;
 	efx->nic_data = nic_data;
 
-	/* Determine number of ports etc. */
-	rc = falcon_probe_nic_variant(efx);
-	if (rc)
+	rc = -ENODEV;
+
+	if (efx_nic_fpga_ver(efx) != 0) {
+		EFX_ERR(efx, "Falcon FPGA not supported\n");
 		goto fail1;
+	}
 
-	/* Probe secondary function if expected */
-	if (FALCON_IS_DUAL_FUNC(efx)) {
-		struct pci_dev *dev = pci_dev_get(efx->pci_dev);
+	if (efx_nic_rev(efx) <= EFX_REV_FALCON_A1) {
+		efx_oword_t nic_stat;
+		struct pci_dev *dev;
+		u8 pci_rev = efx->pci_dev->revision;
+
+		if ((pci_rev == 0xff) || (pci_rev == 0)) {
+			EFX_ERR(efx, "Falcon rev A0 not supported\n");
+			goto fail1;
+		}
+		efx_reado(efx, &nic_stat, FR_AB_NIC_STAT);
+		if (EFX_OWORD_FIELD(nic_stat, FRF_AB_STRAP_10G) == 0) {
+			EFX_ERR(efx, "Falcon rev A1 1G not supported\n");
+			goto fail1;
+		}
+		if (EFX_OWORD_FIELD(nic_stat, FRF_AA_STRAP_PCIE) == 0) {
+			EFX_ERR(efx, "Falcon rev A1 PCI-X not supported\n");
+			goto fail1;
+		}
 
+		dev = pci_dev_get(efx->pci_dev);
 		while ((dev = pci_get_device(EFX_VENDID_SFC, FALCON_A_S_DEVID,
 					     dev))) {
 			if (dev->bus == efx->pci_dev->bus &&
@@ -2867,7 +1432,7 @@
 	}
 
 	/* Allocate memory for INT_KER */
-	rc = falcon_alloc_buffer(efx, &efx->irq_status, sizeof(efx_oword_t));
+	rc = efx_nic_alloc_buffer(efx, &efx->irq_status, sizeof(efx_oword_t));
 	if (rc)
 		goto fail4;
 	BUG_ON(efx->irq_status.dma_addr & 0x0f);
@@ -2884,21 +1449,36 @@
 		goto fail5;
 
 	/* Initialise I2C adapter */
-	efx->i2c_adap.owner = THIS_MODULE;
-	nic_data->i2c_data = falcon_i2c_bit_operations;
-	nic_data->i2c_data.data = efx;
-	efx->i2c_adap.algo_data = &nic_data->i2c_data;
-	efx->i2c_adap.dev.parent = &efx->pci_dev->dev;
-	strlcpy(efx->i2c_adap.name, "SFC4000 GPIO", sizeof(efx->i2c_adap.name));
-	rc = i2c_bit_add_bus(&efx->i2c_adap);
+	board = falcon_board(efx);
+	board->i2c_adap.owner = THIS_MODULE;
+	board->i2c_data = falcon_i2c_bit_operations;
+	board->i2c_data.data = efx;
+	board->i2c_adap.algo_data = &board->i2c_data;
+	board->i2c_adap.dev.parent = &efx->pci_dev->dev;
+	strlcpy(board->i2c_adap.name, "SFC4000 GPIO",
+		sizeof(board->i2c_adap.name));
+	rc = i2c_bit_add_bus(&board->i2c_adap);
 	if (rc)
 		goto fail5;
 
+	rc = falcon_board(efx)->type->init(efx);
+	if (rc) {
+		EFX_ERR(efx, "failed to initialise board\n");
+		goto fail6;
+	}
+
+	nic_data->stats_disable_count = 1;
+	setup_timer(&nic_data->stats_timer, &falcon_stats_timer_func,
+		    (unsigned long)efx);
+
 	return 0;
 
+ fail6:
+	BUG_ON(i2c_del_adapter(&board->i2c_adap));
+	memset(&board->i2c_adap, 0, sizeof(board->i2c_adap));
  fail5:
 	falcon_remove_spi_devices(efx);
-	falcon_free_buffer(efx, &efx->irq_status);
+	efx_nic_free_buffer(efx, &efx->irq_status);
  fail4:
  fail3:
 	if (nic_data->pci_dev2) {
@@ -2911,166 +1491,147 @@
 	return rc;
 }
 
+static void falcon_init_rx_cfg(struct efx_nic *efx)
+{
+	/* Prior to Siena the RX DMA engine will split each frame at
+	 * intervals of RX_USR_BUF_SIZE (32-byte units). We set it to
+	 * be so large that that never happens. */
+	const unsigned huge_buf_size = (3 * 4096) >> 5;
+	/* RX control FIFO thresholds (32 entries) */
+	const unsigned ctrl_xon_thr = 20;
+	const unsigned ctrl_xoff_thr = 25;
+	/* RX data FIFO thresholds (256-byte units; size varies) */
+	int data_xon_thr = efx_nic_rx_xon_thresh >> 8;
+	int data_xoff_thr = efx_nic_rx_xoff_thresh >> 8;
+	efx_oword_t reg;
+
+	efx_reado(efx, &reg, FR_AZ_RX_CFG);
+	if (efx_nic_rev(efx) <= EFX_REV_FALCON_A1) {
+		/* Data FIFO size is 5.5K */
+		if (data_xon_thr < 0)
+			data_xon_thr = 512 >> 8;
+		if (data_xoff_thr < 0)
+			data_xoff_thr = 2048 >> 8;
+		EFX_SET_OWORD_FIELD(reg, FRF_AA_RX_DESC_PUSH_EN, 0);
+		EFX_SET_OWORD_FIELD(reg, FRF_AA_RX_USR_BUF_SIZE,
+				    huge_buf_size);
+		EFX_SET_OWORD_FIELD(reg, FRF_AA_RX_XON_MAC_TH, data_xon_thr);
+		EFX_SET_OWORD_FIELD(reg, FRF_AA_RX_XOFF_MAC_TH, data_xoff_thr);
+		EFX_SET_OWORD_FIELD(reg, FRF_AA_RX_XON_TX_TH, ctrl_xon_thr);
+		EFX_SET_OWORD_FIELD(reg, FRF_AA_RX_XOFF_TX_TH, ctrl_xoff_thr);
+	} else {
+		/* Data FIFO size is 80K; register fields moved */
+		if (data_xon_thr < 0)
+			data_xon_thr = 27648 >> 8; /* ~3*max MTU */
+		if (data_xoff_thr < 0)
+			data_xoff_thr = 54272 >> 8; /* ~80Kb - 3*max MTU */
+		EFX_SET_OWORD_FIELD(reg, FRF_BZ_RX_DESC_PUSH_EN, 0);
+		EFX_SET_OWORD_FIELD(reg, FRF_BZ_RX_USR_BUF_SIZE,
+				    huge_buf_size);
+		EFX_SET_OWORD_FIELD(reg, FRF_BZ_RX_XON_MAC_TH, data_xon_thr);
+		EFX_SET_OWORD_FIELD(reg, FRF_BZ_RX_XOFF_MAC_TH, data_xoff_thr);
+		EFX_SET_OWORD_FIELD(reg, FRF_BZ_RX_XON_TX_TH, ctrl_xon_thr);
+		EFX_SET_OWORD_FIELD(reg, FRF_BZ_RX_XOFF_TX_TH, ctrl_xoff_thr);
+		EFX_SET_OWORD_FIELD(reg, FRF_BZ_RX_INGR_EN, 1);
+	}
+	/* Always enable XOFF signal from RX FIFO.  We enable
+	 * or disable transmission of pause frames at the MAC. */
+	EFX_SET_OWORD_FIELD(reg, FRF_AZ_RX_XOFF_MAC_EN, 1);
+	efx_writeo(efx, &reg, FR_AZ_RX_CFG);
+}
+
 /* This call performs hardware-specific global initialisation, such as
  * defining the descriptor cache sizes and number of RSS channels.
  * It does not set up any buffers, descriptor rings or event queues.
  */
-int falcon_init_nic(struct efx_nic *efx)
+static int falcon_init_nic(struct efx_nic *efx)
 {
 	efx_oword_t temp;
-	unsigned thresh;
 	int rc;
 
 	/* Use on-chip SRAM */
-	falcon_read(efx, &temp, NIC_STAT_REG);
-	EFX_SET_OWORD_FIELD(temp, ONCHIP_SRAM, 1);
-	falcon_write(efx, &temp, NIC_STAT_REG);
+	efx_reado(efx, &temp, FR_AB_NIC_STAT);
+	EFX_SET_OWORD_FIELD(temp, FRF_AB_ONCHIP_SRAM, 1);
+	efx_writeo(efx, &temp, FR_AB_NIC_STAT);
 
 	/* Set the source of the GMAC clock */
-	if (falcon_rev(efx) == FALCON_REV_B0) {
-		falcon_read(efx, &temp, GPIO_CTL_REG_KER);
-		EFX_SET_OWORD_FIELD(temp, GPIO_USE_NIC_CLK, true);
-		falcon_write(efx, &temp, GPIO_CTL_REG_KER);
+	if (efx_nic_rev(efx) == EFX_REV_FALCON_B0) {
+		efx_reado(efx, &temp, FR_AB_GPIO_CTL);
+		EFX_SET_OWORD_FIELD(temp, FRF_AB_USE_NIC_CLK, true);
+		efx_writeo(efx, &temp, FR_AB_GPIO_CTL);
 	}
 
-	/* Set buffer table mode */
-	EFX_POPULATE_OWORD_1(temp, BUF_TBL_MODE, BUF_TBL_MODE_FULL);
-	falcon_write(efx, &temp, BUF_TBL_CFG_REG_KER);
+	/* Select the correct MAC */
+	falcon_clock_mac(efx);
 
 	rc = falcon_reset_sram(efx);
 	if (rc)
 		return rc;
 
-	/* Set positions of descriptor caches in SRAM. */
-	EFX_POPULATE_OWORD_1(temp, SRM_TX_DC_BASE_ADR, TX_DC_BASE / 8);
-	falcon_write(efx, &temp, SRM_TX_DC_CFG_REG_KER);
-	EFX_POPULATE_OWORD_1(temp, SRM_RX_DC_BASE_ADR, RX_DC_BASE / 8);
-	falcon_write(efx, &temp, SRM_RX_DC_CFG_REG_KER);
-
-	/* Set TX descriptor cache size. */
-	BUILD_BUG_ON(TX_DC_ENTRIES != (16 << TX_DC_ENTRIES_ORDER));
-	EFX_POPULATE_OWORD_1(temp, TX_DC_SIZE, TX_DC_ENTRIES_ORDER);
-	falcon_write(efx, &temp, TX_DC_CFG_REG_KER);
-
-	/* Set RX descriptor cache size.  Set low watermark to size-8, as
-	 * this allows most efficient prefetching.
-	 */
-	BUILD_BUG_ON(RX_DC_ENTRIES != (16 << RX_DC_ENTRIES_ORDER));
-	EFX_POPULATE_OWORD_1(temp, RX_DC_SIZE, RX_DC_ENTRIES_ORDER);
-	falcon_write(efx, &temp, RX_DC_CFG_REG_KER);
-	EFX_POPULATE_OWORD_1(temp, RX_DC_PF_LWM, RX_DC_ENTRIES - 8);
-	falcon_write(efx, &temp, RX_DC_PF_WM_REG_KER);
-
 	/* Clear the parity enables on the TX data fifos as
 	 * they produce false parity errors because of timing issues
 	 */
 	if (EFX_WORKAROUND_5129(efx)) {
-		falcon_read(efx, &temp, SPARE_REG_KER);
-		EFX_SET_OWORD_FIELD(temp, MEM_PERR_EN_TX_DATA, 0);
-		falcon_write(efx, &temp, SPARE_REG_KER);
+		efx_reado(efx, &temp, FR_AZ_CSR_SPARE);
+		EFX_SET_OWORD_FIELD(temp, FRF_AB_MEM_PERR_EN_TX_DATA, 0);
+		efx_writeo(efx, &temp, FR_AZ_CSR_SPARE);
 	}
 
-	/* Enable all the genuinely fatal interrupts.  (They are still
-	 * masked by the overall interrupt mask, controlled by
-	 * falcon_interrupts()).
-	 *
-	 * Note: All other fatal interrupts are enabled
-	 */
-	EFX_POPULATE_OWORD_3(temp,
-			     ILL_ADR_INT_KER_EN, 1,
-			     RBUF_OWN_INT_KER_EN, 1,
-			     TBUF_OWN_INT_KER_EN, 1);
-	EFX_INVERT_OWORD(temp);
-	falcon_write(efx, &temp, FATAL_INTR_REG_KER);
-
 	if (EFX_WORKAROUND_7244(efx)) {
-		falcon_read(efx, &temp, RX_FILTER_CTL_REG);
-		EFX_SET_OWORD_FIELD(temp, UDP_FULL_SRCH_LIMIT, 8);
-		EFX_SET_OWORD_FIELD(temp, UDP_WILD_SRCH_LIMIT, 8);
-		EFX_SET_OWORD_FIELD(temp, TCP_FULL_SRCH_LIMIT, 8);
-		EFX_SET_OWORD_FIELD(temp, TCP_WILD_SRCH_LIMIT, 8);
-		falcon_write(efx, &temp, RX_FILTER_CTL_REG);
+		efx_reado(efx, &temp, FR_BZ_RX_FILTER_CTL);
+		EFX_SET_OWORD_FIELD(temp, FRF_BZ_UDP_FULL_SRCH_LIMIT, 8);
+		EFX_SET_OWORD_FIELD(temp, FRF_BZ_UDP_WILD_SRCH_LIMIT, 8);
+		EFX_SET_OWORD_FIELD(temp, FRF_BZ_TCP_FULL_SRCH_LIMIT, 8);
+		EFX_SET_OWORD_FIELD(temp, FRF_BZ_TCP_WILD_SRCH_LIMIT, 8);
+		efx_writeo(efx, &temp, FR_BZ_RX_FILTER_CTL);
 	}
 
-	falcon_setup_rss_indir_table(efx);
-
+	/* XXX This is documented only for Falcon A0/A1 */
 	/* Setup RX.  Wait for descriptor is broken and must
 	 * be disabled.  RXDP recovery shouldn't be needed, but is.
 	 */
-	falcon_read(efx, &temp, RX_SELF_RST_REG_KER);
-	EFX_SET_OWORD_FIELD(temp, RX_NODESC_WAIT_DIS, 1);
-	EFX_SET_OWORD_FIELD(temp, RX_RECOVERY_EN, 1);
+	efx_reado(efx, &temp, FR_AA_RX_SELF_RST);
+	EFX_SET_OWORD_FIELD(temp, FRF_AA_RX_NODESC_WAIT_DIS, 1);
+	EFX_SET_OWORD_FIELD(temp, FRF_AA_RX_SELF_RST_EN, 1);
 	if (EFX_WORKAROUND_5583(efx))
-		EFX_SET_OWORD_FIELD(temp, RX_ISCSI_DIS, 1);
-	falcon_write(efx, &temp, RX_SELF_RST_REG_KER);
-
-	/* Disable the ugly timer-based TX DMA backoff and allow TX DMA to be
-	 * controlled by the RX FIFO fill level. Set arbitration to one pkt/Q.
-	 */
-	falcon_read(efx, &temp, TX_CFG2_REG_KER);
-	EFX_SET_OWORD_FIELD(temp, TX_RX_SPACER, 0xfe);
-	EFX_SET_OWORD_FIELD(temp, TX_RX_SPACER_EN, 1);
-	EFX_SET_OWORD_FIELD(temp, TX_ONE_PKT_PER_Q, 1);
-	EFX_SET_OWORD_FIELD(temp, TX_CSR_PUSH_EN, 0);
-	EFX_SET_OWORD_FIELD(temp, TX_DIS_NON_IP_EV, 1);
-	/* Enable SW_EV to inherit in char driver - assume harmless here */
-	EFX_SET_OWORD_FIELD(temp, TX_SW_EV_EN, 1);
-	/* Prefetch threshold 2 => fetch when descriptor cache half empty */
-	EFX_SET_OWORD_FIELD(temp, TX_PREF_THRESHOLD, 2);
-	/* Squash TX of packets of 16 bytes or less */
-	if (falcon_rev(efx) >= FALCON_REV_B0 && EFX_WORKAROUND_9141(efx))
-		EFX_SET_OWORD_FIELD(temp, TX_FLUSH_MIN_LEN_EN_B0, 1);
-	falcon_write(efx, &temp, TX_CFG2_REG_KER);
+		EFX_SET_OWORD_FIELD(temp, FRF_AA_RX_ISCSI_DIS, 1);
+	efx_writeo(efx, &temp, FR_AA_RX_SELF_RST);
 
 	/* Do not enable TX_NO_EOP_DISC_EN, since it limits packets to 16
 	 * descriptors (which is bad).
 	 */
-	falcon_read(efx, &temp, TX_CFG_REG_KER);
-	EFX_SET_OWORD_FIELD(temp, TX_NO_EOP_DISC_EN, 0);
-	falcon_write(efx, &temp, TX_CFG_REG_KER);
-
-	/* RX config */
-	falcon_read(efx, &temp, RX_CFG_REG_KER);
-	EFX_SET_OWORD_FIELD_VER(efx, temp, RX_DESC_PUSH_EN, 0);
-	if (EFX_WORKAROUND_7575(efx))
-		EFX_SET_OWORD_FIELD_VER(efx, temp, RX_USR_BUF_SIZE,
-					(3 * 4096) / 32);
-	if (falcon_rev(efx) >= FALCON_REV_B0)
-		EFX_SET_OWORD_FIELD(temp, RX_INGR_EN_B0, 1);
-
-	/* RX FIFO flow control thresholds */
-	thresh = ((rx_xon_thresh_bytes >= 0) ?
-		  rx_xon_thresh_bytes : efx->type->rx_xon_thresh);
-	EFX_SET_OWORD_FIELD_VER(efx, temp, RX_XON_MAC_TH, thresh / 256);
-	thresh = ((rx_xoff_thresh_bytes >= 0) ?
-		  rx_xoff_thresh_bytes : efx->type->rx_xoff_thresh);
-	EFX_SET_OWORD_FIELD_VER(efx, temp, RX_XOFF_MAC_TH, thresh / 256);
-	/* RX control FIFO thresholds [32 entries] */
-	EFX_SET_OWORD_FIELD_VER(efx, temp, RX_XON_TX_TH, 20);
-	EFX_SET_OWORD_FIELD_VER(efx, temp, RX_XOFF_TX_TH, 25);
-	falcon_write(efx, &temp, RX_CFG_REG_KER);
+	efx_reado(efx, &temp, FR_AZ_TX_CFG);
+	EFX_SET_OWORD_FIELD(temp, FRF_AZ_TX_NO_EOP_DISC_EN, 0);
+	efx_writeo(efx, &temp, FR_AZ_TX_CFG);
+
+	falcon_init_rx_cfg(efx);
 
 	/* Set destination of both TX and RX Flush events */
-	if (falcon_rev(efx) >= FALCON_REV_B0) {
-		EFX_POPULATE_OWORD_1(temp, FLS_EVQ_ID, 0);
-		falcon_write(efx, &temp, DP_CTRL_REG);
+	if (efx_nic_rev(efx) >= EFX_REV_FALCON_B0) {
+		EFX_POPULATE_OWORD_1(temp, FRF_BZ_FLS_EVQ_ID, 0);
+		efx_writeo(efx, &temp, FR_BZ_DP_CTRL);
 	}
 
+	efx_nic_init_common(efx);
+
 	return 0;
 }
 
-void falcon_remove_nic(struct efx_nic *efx)
+static void falcon_remove_nic(struct efx_nic *efx)
 {
 	struct falcon_nic_data *nic_data = efx->nic_data;
+	struct falcon_board *board = falcon_board(efx);
 	int rc;
 
+	board->type->fini(efx);
+
 	/* Remove I2C adapter and clear it in preparation for a retry */
-	rc = i2c_del_adapter(&efx->i2c_adap);
+	rc = i2c_del_adapter(&board->i2c_adap);
 	BUG_ON(rc);
-	memset(&efx->i2c_adap, 0, sizeof(efx->i2c_adap));
+	memset(&board->i2c_adap, 0, sizeof(board->i2c_adap));
 
 	falcon_remove_spi_devices(efx);
-	falcon_free_buffer(efx, &efx->irq_status);
+	efx_nic_free_buffer(efx, &efx->irq_status);
 
 	falcon_reset_hw(efx, RESET_TYPE_ALL);
 
@@ -3085,12 +1646,86 @@
 	efx->nic_data = NULL;
 }
 
-void falcon_update_nic_stats(struct efx_nic *efx)
+static void falcon_update_nic_stats(struct efx_nic *efx)
 {
+	struct falcon_nic_data *nic_data = efx->nic_data;
 	efx_oword_t cnt;
 
-	falcon_read(efx, &cnt, RX_NODESC_DROP_REG_KER);
-	efx->n_rx_nodesc_drop_cnt += EFX_OWORD_FIELD(cnt, RX_NODESC_DROP_CNT);
+	if (nic_data->stats_disable_count)
+		return;
+
+	efx_reado(efx, &cnt, FR_AZ_RX_NODESC_DROP);
+	efx->n_rx_nodesc_drop_cnt +=
+		EFX_OWORD_FIELD(cnt, FRF_AB_RX_NODESC_DROP_CNT);
+
+	if (nic_data->stats_pending &&
+	    *nic_data->stats_dma_done == FALCON_STATS_DONE) {
+		nic_data->stats_pending = false;
+		rmb(); /* read the done flag before the stats */
+		efx->mac_op->update_stats(efx);
+	}
+}
+
+void falcon_start_nic_stats(struct efx_nic *efx)
+{
+	struct falcon_nic_data *nic_data = efx->nic_data;
+
+	spin_lock_bh(&efx->stats_lock);
+	if (--nic_data->stats_disable_count == 0)
+		falcon_stats_request(efx);
+	spin_unlock_bh(&efx->stats_lock);
+}
+
+void falcon_stop_nic_stats(struct efx_nic *efx)
+{
+	struct falcon_nic_data *nic_data = efx->nic_data;
+	int i;
+
+	might_sleep();
+
+	spin_lock_bh(&efx->stats_lock);
+	++nic_data->stats_disable_count;
+	spin_unlock_bh(&efx->stats_lock);
+
+	del_timer_sync(&nic_data->stats_timer);
+
+	/* Wait enough time for the most recent transfer to
+	 * complete. */
+	for (i = 0; i < 4 && nic_data->stats_pending; i++) {
+		if (*nic_data->stats_dma_done == FALCON_STATS_DONE)
+			break;
+		msleep(1);
+	}
+
+	spin_lock_bh(&efx->stats_lock);
+	falcon_stats_complete(efx);
+	spin_unlock_bh(&efx->stats_lock);
+}
+
+static void falcon_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
+{
+	falcon_board(efx)->type->set_id_led(efx, mode);
+}
+
+/**************************************************************************
+ *
+ * Wake on LAN
+ *
+ **************************************************************************
+ */
+
+static void falcon_get_wol(struct efx_nic *efx, struct ethtool_wolinfo *wol)
+{
+	wol->supported = 0;
+	wol->wolopts = 0;
+	memset(&wol->sopass, 0, sizeof(wol->sopass));
+}
+
+static int falcon_set_wol(struct efx_nic *efx, u32 type)
+{
+	if (type != 0)
+		return -EINVAL;
+	return 0;
 }
 
 /**************************************************************************
@@ -3100,50 +1735,91 @@
  **************************************************************************
  */
 
-struct efx_nic_type falcon_a_nic_type = {
-	.mem_bar = 2,
+struct efx_nic_type falcon_a1_nic_type = {
+	.probe = falcon_probe_nic,
+	.remove = falcon_remove_nic,
+	.init = falcon_init_nic,
+	.fini = efx_port_dummy_op_void,
+	.monitor = falcon_monitor,
+	.reset = falcon_reset_hw,
+	.probe_port = falcon_probe_port,
+	.remove_port = falcon_remove_port,
+	.prepare_flush = falcon_prepare_flush,
+	.update_stats = falcon_update_nic_stats,
+	.start_stats = falcon_start_nic_stats,
+	.stop_stats = falcon_stop_nic_stats,
+	.set_id_led = falcon_set_id_led,
+	.push_irq_moderation = falcon_push_irq_moderation,
+	.push_multicast_hash = falcon_push_multicast_hash,
+	.reconfigure_port = falcon_reconfigure_port,
+	.get_wol = falcon_get_wol,
+	.set_wol = falcon_set_wol,
+	.resume_wol = efx_port_dummy_op_void,
+	.test_nvram = falcon_test_nvram,
+	.default_mac_ops = &falcon_xmac_operations,
+
+	.revision = EFX_REV_FALCON_A1,
 	.mem_map_size = 0x20000,
-	.txd_ptr_tbl_base = TX_DESC_PTR_TBL_KER_A1,
-	.rxd_ptr_tbl_base = RX_DESC_PTR_TBL_KER_A1,
-	.buf_tbl_base = BUF_TBL_KER_A1,
-	.evq_ptr_tbl_base = EVQ_PTR_TBL_KER_A1,
-	.evq_rptr_tbl_base = EVQ_RPTR_REG_KER_A1,
-	.txd_ring_mask = FALCON_TXD_RING_MASK,
-	.rxd_ring_mask = FALCON_RXD_RING_MASK,
-	.evq_size = FALCON_EVQ_SIZE,
-	.max_dma_mask = FALCON_DMA_MASK,
-	.tx_dma_mask = FALCON_TX_DMA_MASK,
-	.bug5391_mask = 0xf,
-	.rx_xoff_thresh = 2048,
-	.rx_xon_thresh = 512,
+	.txd_ptr_tbl_base = FR_AA_TX_DESC_PTR_TBL_KER,
+	.rxd_ptr_tbl_base = FR_AA_RX_DESC_PTR_TBL_KER,
+	.buf_tbl_base = FR_AA_BUF_FULL_TBL_KER,
+	.evq_ptr_tbl_base = FR_AA_EVQ_PTR_TBL_KER,
+	.evq_rptr_tbl_base = FR_AA_EVQ_RPTR_KER,
+	.max_dma_mask = DMA_BIT_MASK(FSF_AZ_TX_KER_BUF_ADDR_WIDTH),
 	.rx_buffer_padding = 0x24,
 	.max_interrupt_mode = EFX_INT_MODE_MSI,
 	.phys_addr_channels = 4,
+	.tx_dc_base = 0x130000,
+	.rx_dc_base = 0x100000,
+	.offload_features = NETIF_F_IP_CSUM,
+	.reset_world_flags = ETH_RESET_IRQ,
 };
 
-struct efx_nic_type falcon_b_nic_type = {
-	.mem_bar = 2,
+struct efx_nic_type falcon_b0_nic_type = {
+	.probe = falcon_probe_nic,
+	.remove = falcon_remove_nic,
+	.init = falcon_init_nic,
+	.fini = efx_port_dummy_op_void,
+	.monitor = falcon_monitor,
+	.reset = falcon_reset_hw,
+	.probe_port = falcon_probe_port,
+	.remove_port = falcon_remove_port,
+	.prepare_flush = falcon_prepare_flush,
+	.update_stats = falcon_update_nic_stats,
+	.start_stats = falcon_start_nic_stats,
+	.stop_stats = falcon_stop_nic_stats,
+	.set_id_led = falcon_set_id_led,
+	.push_irq_moderation = falcon_push_irq_moderation,
+	.push_multicast_hash = falcon_push_multicast_hash,
+	.reconfigure_port = falcon_reconfigure_port,
+	.get_wol = falcon_get_wol,
+	.set_wol = falcon_set_wol,
+	.resume_wol = efx_port_dummy_op_void,
+	.test_registers = falcon_b0_test_registers,
+	.test_nvram = falcon_test_nvram,
+	.default_mac_ops = &falcon_xmac_operations,
+
+	.revision = EFX_REV_FALCON_B0,
 	/* Map everything up to and including the RSS indirection
 	 * table.  Don't map MSI-X table, MSI-X PBA since Linux
 	 * requires that they not be mapped.  */
-	.mem_map_size = RX_RSS_INDIR_TBL_B0 + 0x800,
-	.txd_ptr_tbl_base = TX_DESC_PTR_TBL_KER_B0,
-	.rxd_ptr_tbl_base = RX_DESC_PTR_TBL_KER_B0,
-	.buf_tbl_base = BUF_TBL_KER_B0,
-	.evq_ptr_tbl_base = EVQ_PTR_TBL_KER_B0,
-	.evq_rptr_tbl_base = EVQ_RPTR_REG_KER_B0,
-	.txd_ring_mask = FALCON_TXD_RING_MASK,
-	.rxd_ring_mask = FALCON_RXD_RING_MASK,
-	.evq_size = FALCON_EVQ_SIZE,
-	.max_dma_mask = FALCON_DMA_MASK,
-	.tx_dma_mask = FALCON_TX_DMA_MASK,
-	.bug5391_mask = 0,
-	.rx_xoff_thresh = 54272, /* ~80Kb - 3*max MTU */
-	.rx_xon_thresh = 27648,  /* ~3*max MTU */
+	.mem_map_size = (FR_BZ_RX_INDIRECTION_TBL +
+			 FR_BZ_RX_INDIRECTION_TBL_STEP *
+			 FR_BZ_RX_INDIRECTION_TBL_ROWS),
+	.txd_ptr_tbl_base = FR_BZ_TX_DESC_PTR_TBL,
+	.rxd_ptr_tbl_base = FR_BZ_RX_DESC_PTR_TBL,
+	.buf_tbl_base = FR_BZ_BUF_FULL_TBL,
+	.evq_ptr_tbl_base = FR_BZ_EVQ_PTR_TBL,
+	.evq_rptr_tbl_base = FR_BZ_EVQ_RPTR,
+	.max_dma_mask = DMA_BIT_MASK(FSF_AZ_TX_KER_BUF_ADDR_WIDTH),
 	.rx_buffer_padding = 0,
 	.max_interrupt_mode = EFX_INT_MODE_MSIX,
 	.phys_addr_channels = 32, /* Hardware limit is 64, but the legacy
 				   * interrupt handler only supports 32
 				   * channels */
+	.tx_dc_base = 0x130000,
+	.rx_dc_base = 0x100000,
+	.offload_features = NETIF_F_IP_CSUM,
+	.reset_world_flags = ETH_RESET_IRQ,
 };
 
--- linux-mvl-dove-2.6.32.orig/drivers/net/sfc/mcdi.h
+++ linux-mvl-dove-2.6.32/drivers/net/sfc/mcdi.h
@@ -0,0 +1,131 @@
+/****************************************************************************
+ * Driver for Solarflare Solarstorm network controllers and boards
+ * Copyright 2008-2009 Solarflare Communications Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation, incorporated herein by reference.
+ */
+
+#ifndef EFX_MCDI_H
+#define EFX_MCDI_H
+
+/**
+ * enum efx_mcdi_state
+ * @MCDI_STATE_QUIESCENT: No pending MCDI requests. If the caller holds the
+ *	mcdi_lock then they are able to move to MCDI_STATE_RUNNING
+ * @MCDI_STATE_RUNNING: There is an MCDI request pending. Only the thread that
+ *	moved into this state is allowed to move out of it.
+ * @MCDI_STATE_COMPLETED: An MCDI request has completed, but the owning thread
+ *	has not yet consumed the result. For all other threads, equivalent to
+ *	MCDI_STATE_RUNNING.
+ */
+enum efx_mcdi_state {
+	MCDI_STATE_QUIESCENT,
+	MCDI_STATE_RUNNING,
+	MCDI_STATE_COMPLETED,
+};
+
+enum efx_mcdi_mode {
+	MCDI_MODE_POLL,
+	MCDI_MODE_EVENTS,
+};
+
+/**
+ * struct efx_mcdi_iface
+ * @state: Interface state. Waited for by mcdi_wq.
+ * @wq: Wait queue for threads waiting for state != STATE_RUNNING
+ * @iface_lock: Protects @credits, @seqno, @resprc, @resplen
+ * @mode: Poll for mcdi completion, or wait for an mcdi_event.
+ *	Serialised by @lock
+ * @seqno: The next sequence number to use for mcdi requests.
+ *	Serialised by @lock
+ * @credits: Number of spurious MCDI completion events allowed before we
+ *	trigger a fatal error. Protected by @lock
+ * @resprc: Returned MCDI completion
+ * @resplen: Returned payload length
+ */
+struct efx_mcdi_iface {
+	atomic_t state;
+	wait_queue_head_t wq;
+	spinlock_t iface_lock;
+	enum efx_mcdi_mode mode;
+	unsigned int credits;
+	unsigned int seqno;
+	unsigned int resprc;
+	size_t resplen;
+};
+
+extern void efx_mcdi_init(struct efx_nic *efx);
+
+extern int efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd, const u8 *inbuf,
+			size_t inlen, u8 *outbuf, size_t outlen,
+			size_t *outlen_actual);
+
+extern int efx_mcdi_poll_reboot(struct efx_nic *efx);
+extern void efx_mcdi_mode_poll(struct efx_nic *efx);
+extern void efx_mcdi_mode_event(struct efx_nic *efx);
+
+extern void efx_mcdi_process_event(struct efx_channel *channel,
+				   efx_qword_t *event);
+
+#define MCDI_PTR2(_buf, _ofst)						\
+	(((u8 *)_buf) + _ofst)
+#define MCDI_SET_DWORD2(_buf, _ofst, _value)				\
+	EFX_POPULATE_DWORD_1(*((efx_dword_t *)MCDI_PTR2(_buf, _ofst)),	\
+			     EFX_DWORD_0, _value)
+#define MCDI_DWORD2(_buf, _ofst)					\
+	EFX_DWORD_FIELD(*((efx_dword_t *)MCDI_PTR2(_buf, _ofst)),	\
+			EFX_DWORD_0)
+#define MCDI_QWORD2(_buf, _ofst)					\
+	EFX_QWORD_FIELD64(*((efx_qword_t *)MCDI_PTR2(_buf, _ofst)),	\
+			  EFX_QWORD_0)
+
+#define MCDI_PTR(_buf, _ofst)						\
+	MCDI_PTR2(_buf, MC_CMD_ ## _ofst ## _OFST)
+#define MCDI_SET_DWORD(_buf, _ofst, _value)				\
+	MCDI_SET_DWORD2(_buf, MC_CMD_ ## _ofst ## _OFST, _value)
+#define MCDI_DWORD(_buf, _ofst)						\
+	MCDI_DWORD2(_buf, MC_CMD_ ## _ofst ## _OFST)
+#define MCDI_QWORD(_buf, _ofst)						\
+	MCDI_QWORD2(_buf, MC_CMD_ ## _ofst ## _OFST)
+
+#define MCDI_EVENT_FIELD(_ev, _field)			\
+	EFX_QWORD_FIELD(_ev, MCDI_EVENT_ ## _field)
+
+extern int efx_mcdi_fwver(struct efx_nic *efx, u64 *version, u32 *build);
+extern int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
+			       bool *was_attached_out);
+extern int efx_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address,
+				  u16 *fw_subtype_list);
+extern int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart,
+			     u32 dest_evq);
+extern int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out);
+extern int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type,
+			       size_t *size_out, size_t *erase_size_out,
+			       bool *protected_out);
+extern int efx_mcdi_nvram_update_start(struct efx_nic *efx,
+				       unsigned int type);
+extern int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type,
+			       loff_t offset, u8 *buffer, size_t length);
+extern int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type,
+				loff_t offset, const u8 *buffer,
+				size_t length);
+#define EFX_MCDI_NVRAM_LEN_MAX 128
+extern int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type,
+				loff_t offset, size_t length);
+extern int efx_mcdi_nvram_update_finish(struct efx_nic *efx,
+					unsigned int type);
+extern int efx_mcdi_handle_assertion(struct efx_nic *efx);
+extern void efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode);
+extern int efx_mcdi_reset_port(struct efx_nic *efx);
+extern int efx_mcdi_reset_mc(struct efx_nic *efx);
+extern int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type,
+				   const u8 *mac, int *id_out);
+extern int efx_mcdi_wol_filter_set_magic(struct efx_nic *efx,
+					 const u8 *mac, int *id_out);
+extern int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out);
+extern int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id);
+extern int efx_mcdi_wol_filter_reset(struct efx_nic *efx);
+
+#endif /* EFX_MCDI_H */
--- linux-mvl-dove-2.6.32.orig/drivers/net/sfc/nic.c
+++ linux-mvl-dove-2.6.32/drivers/net/sfc/nic.c
@@ -0,0 +1,1585 @@
+/****************************************************************************
+ * Driver for Solarflare Solarstorm network controllers and boards
+ * Copyright 2005-2006 Fen Systems Ltd.
+ * Copyright 2006-2009 Solarflare Communications Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation, incorporated herein by reference.
+ */
+
+#include <linux/bitops.h>
+#include <linux/delay.h>
+#include <linux/pci.h>
+#include <linux/module.h>
+#include <linux/seq_file.h>
+#include "net_driver.h"
+#include "bitfield.h"
+#include "efx.h"
+#include "nic.h"
+#include "regs.h"
+#include "io.h"
+#include "workarounds.h"
+
+/**************************************************************************
+ *
+ * Configurable values
+ *
+ **************************************************************************
+ */
+
+/* This is set to 16 for a good reason.  In summary, if larger than
+ * 16, the descriptor cache holds more than a default socket
+ * buffer's worth of packets (for UDP we can only have at most one
+ * socket buffer's worth outstanding).  This combined with the fact
+ * that we only get 1 TX event per descriptor cache means the NIC
+ * goes idle.
+ */
+#define TX_DC_ENTRIES 16
+#define TX_DC_ENTRIES_ORDER 1
+
+#define RX_DC_ENTRIES 64
+#define RX_DC_ENTRIES_ORDER 3
+
+/* RX FIFO XOFF watermark
+ *
+ * When the amount of the RX FIFO increases used increases past this
+ * watermark send XOFF. Only used if RX flow control is enabled (ethtool -A)
+ * This also has an effect on RX/TX arbitration
+ */
+int efx_nic_rx_xoff_thresh = -1;
+module_param_named(rx_xoff_thresh_bytes, efx_nic_rx_xoff_thresh, int, 0644);
+MODULE_PARM_DESC(rx_xoff_thresh_bytes, "RX fifo XOFF threshold");
+
+/* RX FIFO XON watermark
+ *
+ * When the amount of the RX FIFO used decreases below this
+ * watermark send XON. Only used if TX flow control is enabled (ethtool -A)
+ * This also has an effect on RX/TX arbitration
+ */
+int efx_nic_rx_xon_thresh = -1;
+module_param_named(rx_xon_thresh_bytes, efx_nic_rx_xon_thresh, int, 0644);
+MODULE_PARM_DESC(rx_xon_thresh_bytes, "RX fifo XON threshold");
+
+/* If EFX_MAX_INT_ERRORS internal errors occur within
+ * EFX_INT_ERROR_EXPIRE seconds, we consider the NIC broken and
+ * disable it.
+ */
+#define EFX_INT_ERROR_EXPIRE 3600
+#define EFX_MAX_INT_ERRORS 5
+
+/* We poll for events every FLUSH_INTERVAL ms, and check FLUSH_POLL_COUNT times
+ */
+#define EFX_FLUSH_INTERVAL 10
+#define EFX_FLUSH_POLL_COUNT 100
+
+/* Size and alignment of special buffers (4KB) */
+#define EFX_BUF_SIZE 4096
+
+/* Depth of RX flush request fifo */
+#define EFX_RX_FLUSH_COUNT 4
+
+/**************************************************************************
+ *
+ * Solarstorm hardware access
+ *
+ **************************************************************************/
+
+static inline void efx_write_buf_tbl(struct efx_nic *efx, efx_qword_t *value,
+				     unsigned int index)
+{
+	efx_sram_writeq(efx, efx->membase + efx->type->buf_tbl_base,
+			value, index);
+}
+
+/* Read the current event from the event queue */
+static inline efx_qword_t *efx_event(struct efx_channel *channel,
+				     unsigned int index)
+{
+	return (((efx_qword_t *) (channel->eventq.addr)) + index);
+}
+
+/* See if an event is present
+ *
+ * We check both the high and low dword of the event for all ones.  We
+ * wrote all ones when we cleared the event, and no valid event can
+ * have all ones in either its high or low dwords.  This approach is
+ * robust against reordering.
+ *
+ * Note that using a single 64-bit comparison is incorrect; even
+ * though the CPU read will be atomic, the DMA write may not be.
+ */
+static inline int efx_event_present(efx_qword_t *event)
+{
+	return (!(EFX_DWORD_IS_ALL_ONES(event->dword[0]) |
+		  EFX_DWORD_IS_ALL_ONES(event->dword[1])));
+}
+
+static bool efx_masked_compare_oword(const efx_oword_t *a, const efx_oword_t *b,
+				     const efx_oword_t *mask)
+{
+	return ((a->u64[0] ^ b->u64[0]) & mask->u64[0]) ||
+		((a->u64[1] ^ b->u64[1]) & mask->u64[1]);
+}
+
+int efx_nic_test_registers(struct efx_nic *efx,
+			   const struct efx_nic_register_test *regs,
+			   size_t n_regs)
+{
+	unsigned address = 0, i, j;
+	efx_oword_t mask, imask, original, reg, buf;
+
+	/* Falcon should be in loopback to isolate the XMAC from the PHY */
+	WARN_ON(!LOOPBACK_INTERNAL(efx));
+
+	for (i = 0; i < n_regs; ++i) {
+		address = regs[i].address;
+		mask = imask = regs[i].mask;
+		EFX_INVERT_OWORD(imask);
+
+		efx_reado(efx, &original, address);
+
+		/* bit sweep on and off */
+		for (j = 0; j < 128; j++) {
+			if (!EFX_EXTRACT_OWORD32(mask, j, j))
+				continue;
+
+			/* Test this testable bit can be set in isolation */
+			EFX_AND_OWORD(reg, original, mask);
+			EFX_SET_OWORD32(reg, j, j, 1);
+
+			efx_writeo(efx, &reg, address);
+			efx_reado(efx, &buf, address);
+
+			if (efx_masked_compare_oword(&reg, &buf, &mask))
+				goto fail;
+
+			/* Test this testable bit can be cleared in isolation */
+			EFX_OR_OWORD(reg, original, mask);
+			EFX_SET_OWORD32(reg, j, j, 0);
+
+			efx_writeo(efx, &reg, address);
+			efx_reado(efx, &buf, address);
+
+			if (efx_masked_compare_oword(&reg, &buf, &mask))
+				goto fail;
+		}
+
+		efx_writeo(efx, &original, address);
+	}
+
+	return 0;
+
+fail:
+	EFX_ERR(efx, "wrote "EFX_OWORD_FMT" read "EFX_OWORD_FMT
+		" at address 0x%x mask "EFX_OWORD_FMT"\n", EFX_OWORD_VAL(reg),
+		EFX_OWORD_VAL(buf), address, EFX_OWORD_VAL(mask));
+	return -EIO;
+}
+
+/**************************************************************************
+ *
+ * Special buffer handling
+ * Special buffers are used for event queues and the TX and RX
+ * descriptor rings.
+ *
+ *************************************************************************/
+
+/*
+ * Initialise a special buffer
+ *
+ * This will define a buffer (previously allocated via
+ * efx_alloc_special_buffer()) in the buffer table, allowing
+ * it to be used for event queues, descriptor rings etc.
+ */
+static void
+efx_init_special_buffer(struct efx_nic *efx, struct efx_special_buffer *buffer)
+{
+	efx_qword_t buf_desc;
+	int index;
+	dma_addr_t dma_addr;
+	int i;
+
+	EFX_BUG_ON_PARANOID(!buffer->addr);
+
+	/* Write buffer descriptors to NIC */
+	for (i = 0; i < buffer->entries; i++) {
+		index = buffer->index + i;
+		dma_addr = buffer->dma_addr + (i * 4096);
+		EFX_LOG(efx, "mapping special buffer %d at %llx\n",
+			index, (unsigned long long)dma_addr);
+		EFX_POPULATE_QWORD_3(buf_desc,
+				     FRF_AZ_BUF_ADR_REGION, 0,
+				     FRF_AZ_BUF_ADR_FBUF, dma_addr >> 12,
+				     FRF_AZ_BUF_OWNER_ID_FBUF, 0);
+		efx_write_buf_tbl(efx, &buf_desc, index);
+	}
+}
+
+/* Unmaps a buffer and clears the buffer table entries */
+static void
+efx_fini_special_buffer(struct efx_nic *efx, struct efx_special_buffer *buffer)
+{
+	efx_oword_t buf_tbl_upd;
+	unsigned int start = buffer->index;
+	unsigned int end = (buffer->index + buffer->entries - 1);
+
+	if (!buffer->entries)
+		return;
+
+	EFX_LOG(efx, "unmapping special buffers %d-%d\n",
+		buffer->index, buffer->index + buffer->entries - 1);
+
+	EFX_POPULATE_OWORD_4(buf_tbl_upd,
+			     FRF_AZ_BUF_UPD_CMD, 0,
+			     FRF_AZ_BUF_CLR_CMD, 1,
+			     FRF_AZ_BUF_CLR_END_ID, end,
+			     FRF_AZ_BUF_CLR_START_ID, start);
+	efx_writeo(efx, &buf_tbl_upd, FR_AZ_BUF_TBL_UPD);
+}
+
+/*
+ * Allocate a new special buffer
+ *
+ * This allocates memory for a new buffer, clears it and allocates a
+ * new buffer ID range.  It does not write into the buffer table.
+ *
+ * This call will allocate 4KB buffers, since 8KB buffers can't be
+ * used for event queues and descriptor rings.
+ */
+static int efx_alloc_special_buffer(struct efx_nic *efx,
+				    struct efx_special_buffer *buffer,
+				    unsigned int len)
+{
+	len = ALIGN(len, EFX_BUF_SIZE);
+
+	buffer->addr = pci_alloc_consistent(efx->pci_dev, len,
+					    &buffer->dma_addr);
+	if (!buffer->addr)
+		return -ENOMEM;
+	buffer->len = len;
+	buffer->entries = len / EFX_BUF_SIZE;
+	BUG_ON(buffer->dma_addr & (EFX_BUF_SIZE - 1));
+
+	/* All zeros is a potentially valid event so memset to 0xff */
+	memset(buffer->addr, 0xff, len);
+
+	/* Select new buffer ID */
+	buffer->index = efx->next_buffer_table;
+	efx->next_buffer_table += buffer->entries;
+
+	EFX_LOG(efx, "allocating special buffers %d-%d at %llx+%x "
+		"(virt %p phys %llx)\n", buffer->index,
+		buffer->index + buffer->entries - 1,
+		(u64)buffer->dma_addr, len,
+		buffer->addr, (u64)virt_to_phys(buffer->addr));
+
+	return 0;
+}
+
+static void
+efx_free_special_buffer(struct efx_nic *efx, struct efx_special_buffer *buffer)
+{
+	if (!buffer->addr)
+		return;
+
+	EFX_LOG(efx, "deallocating special buffers %d-%d at %llx+%x "
+		"(virt %p phys %llx)\n", buffer->index,
+		buffer->index + buffer->entries - 1,
+		(u64)buffer->dma_addr, buffer->len,
+		buffer->addr, (u64)virt_to_phys(buffer->addr));
+
+	pci_free_consistent(efx->pci_dev, buffer->len, buffer->addr,
+			    buffer->dma_addr);
+	buffer->addr = NULL;
+	buffer->entries = 0;
+}
+
+/**************************************************************************
+ *
+ * Generic buffer handling
+ * These buffers are used for interrupt status and MAC stats
+ *
+ **************************************************************************/
+
+int efx_nic_alloc_buffer(struct efx_nic *efx, struct efx_buffer *buffer,
+			 unsigned int len)
+{
+	buffer->addr = pci_alloc_consistent(efx->pci_dev, len,
+					    &buffer->dma_addr);
+	if (!buffer->addr)
+		return -ENOMEM;
+	buffer->len = len;
+	memset(buffer->addr, 0, len);
+	return 0;
+}
+
+void efx_nic_free_buffer(struct efx_nic *efx, struct efx_buffer *buffer)
+{
+	if (buffer->addr) {
+		pci_free_consistent(efx->pci_dev, buffer->len,
+				    buffer->addr, buffer->dma_addr);
+		buffer->addr = NULL;
+	}
+}
+
+/**************************************************************************
+ *
+ * TX path
+ *
+ **************************************************************************/
+
+/* Returns a pointer to the specified transmit descriptor in the TX
+ * descriptor queue belonging to the specified channel.
+ */
+static inline efx_qword_t *
+efx_tx_desc(struct efx_tx_queue *tx_queue, unsigned int index)
+{
+	return (((efx_qword_t *) (tx_queue->txd.addr)) + index);
+}
+
+/* This writes to the TX_DESC_WPTR; write pointer for TX descriptor ring */
+static inline void efx_notify_tx_desc(struct efx_tx_queue *tx_queue)
+{
+	unsigned write_ptr;
+	efx_dword_t reg;
+
+	write_ptr = tx_queue->write_count & EFX_TXQ_MASK;
+	EFX_POPULATE_DWORD_1(reg, FRF_AZ_TX_DESC_WPTR_DWORD, write_ptr);
+	efx_writed_page(tx_queue->efx, &reg,
+			FR_AZ_TX_DESC_UPD_DWORD_P0, tx_queue->queue);
+}
+
+
+/* For each entry inserted into the software descriptor ring, create a
+ * descriptor in the hardware TX descriptor ring (in host memory), and
+ * write a doorbell.
+ */
+void efx_nic_push_buffers(struct efx_tx_queue *tx_queue)
+{
+
+	struct efx_tx_buffer *buffer;
+	efx_qword_t *txd;
+	unsigned write_ptr;
+
+	BUG_ON(tx_queue->write_count == tx_queue->insert_count);
+
+	do {
+		write_ptr = tx_queue->write_count & EFX_TXQ_MASK;
+		buffer = &tx_queue->buffer[write_ptr];
+		txd = efx_tx_desc(tx_queue, write_ptr);
+		++tx_queue->write_count;
+
+		/* Create TX descriptor ring entry */
+		EFX_POPULATE_QWORD_4(*txd,
+				     FSF_AZ_TX_KER_CONT, buffer->continuation,
+				     FSF_AZ_TX_KER_BYTE_COUNT, buffer->len,
+				     FSF_AZ_TX_KER_BUF_REGION, 0,
+				     FSF_AZ_TX_KER_BUF_ADDR, buffer->dma_addr);
+	} while (tx_queue->write_count != tx_queue->insert_count);
+
+	wmb(); /* Ensure descriptors are written before they are fetched */
+	efx_notify_tx_desc(tx_queue);
+}
+
+/* Allocate hardware resources for a TX queue */
+int efx_nic_probe_tx(struct efx_tx_queue *tx_queue)
+{
+	struct efx_nic *efx = tx_queue->efx;
+	BUILD_BUG_ON(EFX_TXQ_SIZE < 512 || EFX_TXQ_SIZE > 4096 ||
+		     EFX_TXQ_SIZE & EFX_TXQ_MASK);
+	return efx_alloc_special_buffer(efx, &tx_queue->txd,
+					EFX_TXQ_SIZE * sizeof(efx_qword_t));
+}
+
+void efx_nic_init_tx(struct efx_tx_queue *tx_queue)
+{
+	efx_oword_t tx_desc_ptr;
+	struct efx_nic *efx = tx_queue->efx;
+
+	tx_queue->flushed = FLUSH_NONE;
+
+	/* Pin TX descriptor ring */
+	efx_init_special_buffer(efx, &tx_queue->txd);
+
+	/* Push TX descriptor ring to card */
+	EFX_POPULATE_OWORD_10(tx_desc_ptr,
+			      FRF_AZ_TX_DESCQ_EN, 1,
+			      FRF_AZ_TX_ISCSI_DDIG_EN, 0,
+			      FRF_AZ_TX_ISCSI_HDIG_EN, 0,
+			      FRF_AZ_TX_DESCQ_BUF_BASE_ID, tx_queue->txd.index,
+			      FRF_AZ_TX_DESCQ_EVQ_ID,
+			      tx_queue->channel->channel,
+			      FRF_AZ_TX_DESCQ_OWNER_ID, 0,
+			      FRF_AZ_TX_DESCQ_LABEL, tx_queue->queue,
+			      FRF_AZ_TX_DESCQ_SIZE,
+			      __ffs(tx_queue->txd.entries),
+			      FRF_AZ_TX_DESCQ_TYPE, 0,
+			      FRF_BZ_TX_NON_IP_DROP_DIS, 1);
+
+	if (efx_nic_rev(efx) >= EFX_REV_FALCON_B0) {
+		int csum = tx_queue->queue == EFX_TX_QUEUE_OFFLOAD_CSUM;
+		EFX_SET_OWORD_FIELD(tx_desc_ptr, FRF_BZ_TX_IP_CHKSM_DIS, !csum);
+		EFX_SET_OWORD_FIELD(tx_desc_ptr, FRF_BZ_TX_TCP_CHKSM_DIS,
+				    !csum);
+	}
+
+	efx_writeo_table(efx, &tx_desc_ptr, efx->type->txd_ptr_tbl_base,
+			 tx_queue->queue);
+
+	if (efx_nic_rev(efx) < EFX_REV_FALCON_B0) {
+		efx_oword_t reg;
+
+		/* Only 128 bits in this register */
+		BUILD_BUG_ON(EFX_TX_QUEUE_COUNT >= 128);
+
+		efx_reado(efx, &reg, FR_AA_TX_CHKSM_CFG);
+		if (tx_queue->queue == EFX_TX_QUEUE_OFFLOAD_CSUM)
+			clear_bit_le(tx_queue->queue, (void *)&reg);
+		else
+			set_bit_le(tx_queue->queue, (void *)&reg);
+		efx_writeo(efx, &reg, FR_AA_TX_CHKSM_CFG);
+	}
+}
+
+static void efx_flush_tx_queue(struct efx_tx_queue *tx_queue)
+{
+	struct efx_nic *efx = tx_queue->efx;
+	efx_oword_t tx_flush_descq;
+
+	tx_queue->flushed = FLUSH_PENDING;
+
+	/* Post a flush command */
+	EFX_POPULATE_OWORD_2(tx_flush_descq,
+			     FRF_AZ_TX_FLUSH_DESCQ_CMD, 1,
+			     FRF_AZ_TX_FLUSH_DESCQ, tx_queue->queue);
+	efx_writeo(efx, &tx_flush_descq, FR_AZ_TX_FLUSH_DESCQ);
+}
+
+void efx_nic_fini_tx(struct efx_tx_queue *tx_queue)
+{
+	struct efx_nic *efx = tx_queue->efx;
+	efx_oword_t tx_desc_ptr;
+
+	/* The queue should have been flushed */
+	WARN_ON(tx_queue->flushed != FLUSH_DONE);
+
+	/* Remove TX descriptor ring from card */
+	EFX_ZERO_OWORD(tx_desc_ptr);
+	efx_writeo_table(efx, &tx_desc_ptr, efx->type->txd_ptr_tbl_base,
+			 tx_queue->queue);
+
+	/* Unpin TX descriptor ring */
+	efx_fini_special_buffer(efx, &tx_queue->txd);
+}
+
+/* Free buffers backing TX queue */
+void efx_nic_remove_tx(struct efx_tx_queue *tx_queue)
+{
+	efx_free_special_buffer(tx_queue->efx, &tx_queue->txd);
+}
+
+/**************************************************************************
+ *
+ * RX path
+ *
+ **************************************************************************/
+
+/* Returns a pointer to the specified descriptor in the RX descriptor queue */
+static inline efx_qword_t *
+efx_rx_desc(struct efx_rx_queue *rx_queue, unsigned int index)
+{
+	return (((efx_qword_t *) (rx_queue->rxd.addr)) + index);
+}
+
+/* This creates an entry in the RX descriptor queue */
+static inline void
+efx_build_rx_desc(struct efx_rx_queue *rx_queue, unsigned index)
+{
+	struct efx_rx_buffer *rx_buf;
+	efx_qword_t *rxd;
+
+	rxd = efx_rx_desc(rx_queue, index);
+	rx_buf = efx_rx_buffer(rx_queue, index);
+	EFX_POPULATE_QWORD_3(*rxd,
+			     FSF_AZ_RX_KER_BUF_SIZE,
+			     rx_buf->len -
+			     rx_queue->efx->type->rx_buffer_padding,
+			     FSF_AZ_RX_KER_BUF_REGION, 0,
+			     FSF_AZ_RX_KER_BUF_ADDR, rx_buf->dma_addr);
+}
+
+/* This writes to the RX_DESC_WPTR register for the specified receive
+ * descriptor ring.
+ */
+void efx_nic_notify_rx_desc(struct efx_rx_queue *rx_queue)
+{
+	efx_dword_t reg;
+	unsigned write_ptr;
+
+	while (rx_queue->notified_count != rx_queue->added_count) {
+		efx_build_rx_desc(rx_queue,
+				  rx_queue->notified_count &
+				  EFX_RXQ_MASK);
+		++rx_queue->notified_count;
+	}
+
+	wmb();
+	write_ptr = rx_queue->added_count & EFX_RXQ_MASK;
+	EFX_POPULATE_DWORD_1(reg, FRF_AZ_RX_DESC_WPTR_DWORD, write_ptr);
+	efx_writed_page(rx_queue->efx, &reg,
+			FR_AZ_RX_DESC_UPD_DWORD_P0, rx_queue->queue);
+}
+
+int efx_nic_probe_rx(struct efx_rx_queue *rx_queue)
+{
+	struct efx_nic *efx = rx_queue->efx;
+	BUILD_BUG_ON(EFX_RXQ_SIZE < 512 || EFX_RXQ_SIZE > 4096 ||
+		     EFX_RXQ_SIZE & EFX_RXQ_MASK);
+	return efx_alloc_special_buffer(efx, &rx_queue->rxd,
+					EFX_RXQ_SIZE * sizeof(efx_qword_t));
+}
+
+void efx_nic_init_rx(struct efx_rx_queue *rx_queue)
+{
+	efx_oword_t rx_desc_ptr;
+	struct efx_nic *efx = rx_queue->efx;
+	bool is_b0 = efx_nic_rev(efx) >= EFX_REV_FALCON_B0;
+	bool iscsi_digest_en = is_b0;
+
+	EFX_LOG(efx, "RX queue %d ring in special buffers %d-%d\n",
+		rx_queue->queue, rx_queue->rxd.index,
+		rx_queue->rxd.index + rx_queue->rxd.entries - 1);
+
+	rx_queue->flushed = FLUSH_NONE;
+
+	/* Pin RX descriptor ring */
+	efx_init_special_buffer(efx, &rx_queue->rxd);
+
+	/* Push RX descriptor ring to card */
+	EFX_POPULATE_OWORD_10(rx_desc_ptr,
+			      FRF_AZ_RX_ISCSI_DDIG_EN, iscsi_digest_en,
+			      FRF_AZ_RX_ISCSI_HDIG_EN, iscsi_digest_en,
+			      FRF_AZ_RX_DESCQ_BUF_BASE_ID, rx_queue->rxd.index,
+			      FRF_AZ_RX_DESCQ_EVQ_ID,
+			      rx_queue->channel->channel,
+			      FRF_AZ_RX_DESCQ_OWNER_ID, 0,
+			      FRF_AZ_RX_DESCQ_LABEL, rx_queue->queue,
+			      FRF_AZ_RX_DESCQ_SIZE,
+			      __ffs(rx_queue->rxd.entries),
+			      FRF_AZ_RX_DESCQ_TYPE, 0 /* kernel queue */ ,
+			      /* For >=B0 this is scatter so disable */
+			      FRF_AZ_RX_DESCQ_JUMBO, !is_b0,
+			      FRF_AZ_RX_DESCQ_EN, 1);
+	efx_writeo_table(efx, &rx_desc_ptr, efx->type->rxd_ptr_tbl_base,
+			 rx_queue->queue);
+}
+
+static void efx_flush_rx_queue(struct efx_rx_queue *rx_queue)
+{
+	struct efx_nic *efx = rx_queue->efx;
+	efx_oword_t rx_flush_descq;
+
+	rx_queue->flushed = FLUSH_PENDING;
+
+	/* Post a flush command */
+	EFX_POPULATE_OWORD_2(rx_flush_descq,
+			     FRF_AZ_RX_FLUSH_DESCQ_CMD, 1,
+			     FRF_AZ_RX_FLUSH_DESCQ, rx_queue->queue);
+	efx_writeo(efx, &rx_flush_descq, FR_AZ_RX_FLUSH_DESCQ);
+}
+
+void efx_nic_fini_rx(struct efx_rx_queue *rx_queue)
+{
+	efx_oword_t rx_desc_ptr;
+	struct efx_nic *efx = rx_queue->efx;
+
+	/* The queue should already have been flushed */
+	WARN_ON(rx_queue->flushed != FLUSH_DONE);
+
+	/* Remove RX descriptor ring from card */
+	EFX_ZERO_OWORD(rx_desc_ptr);
+	efx_writeo_table(efx, &rx_desc_ptr, efx->type->rxd_ptr_tbl_base,
+			 rx_queue->queue);
+
+	/* Unpin RX descriptor ring */
+	efx_fini_special_buffer(efx, &rx_queue->rxd);
+}
+
+/* Free buffers backing RX queue */
+void efx_nic_remove_rx(struct efx_rx_queue *rx_queue)
+{
+	efx_free_special_buffer(rx_queue->efx, &rx_queue->rxd);
+}
+
+/**************************************************************************
+ *
+ * Event queue processing
+ * Event queues are processed by per-channel tasklets.
+ *
+ **************************************************************************/
+
+/* Update a channel's event queue's read pointer (RPTR) register
+ *
+ * This writes the EVQ_RPTR_REG register for the specified channel's
+ * event queue.
+ *
+ * Note that EVQ_RPTR_REG contains the index of the "last read" event,
+ * whereas channel->eventq_read_ptr contains the index of the "next to
+ * read" event.
+ */
+void efx_nic_eventq_read_ack(struct efx_channel *channel)
+{
+	efx_dword_t reg;
+	struct efx_nic *efx = channel->efx;
+
+	EFX_POPULATE_DWORD_1(reg, FRF_AZ_EVQ_RPTR, channel->eventq_read_ptr);
+	efx_writed_table(efx, &reg, efx->type->evq_rptr_tbl_base,
+			 channel->channel);
+}
+
+/* Use HW to insert a SW defined event */
+void efx_generate_event(struct efx_channel *channel, efx_qword_t *event)
+{
+	efx_oword_t drv_ev_reg;
+
+	BUILD_BUG_ON(FRF_AZ_DRV_EV_DATA_LBN != 0 ||
+		     FRF_AZ_DRV_EV_DATA_WIDTH != 64);
+	drv_ev_reg.u32[0] = event->u32[0];
+	drv_ev_reg.u32[1] = event->u32[1];
+	drv_ev_reg.u32[2] = 0;
+	drv_ev_reg.u32[3] = 0;
+	EFX_SET_OWORD_FIELD(drv_ev_reg, FRF_AZ_DRV_EV_QID, channel->channel);
+	efx_writeo(channel->efx, &drv_ev_reg, FR_AZ_DRV_EV);
+}
+
+/* Handle a transmit completion event
+ *
+ * The NIC batches TX completion events; the message we receive is of
+ * the form "complete all TX events up to this index".
+ */
+static void
+efx_handle_tx_event(struct efx_channel *channel, efx_qword_t *event)
+{
+	unsigned int tx_ev_desc_ptr;
+	unsigned int tx_ev_q_label;
+	struct efx_tx_queue *tx_queue;
+	struct efx_nic *efx = channel->efx;
+
+	if (likely(EFX_QWORD_FIELD(*event, FSF_AZ_TX_EV_COMP))) {
+		/* Transmit completion */
+		tx_ev_desc_ptr = EFX_QWORD_FIELD(*event, FSF_AZ_TX_EV_DESC_PTR);
+		tx_ev_q_label = EFX_QWORD_FIELD(*event, FSF_AZ_TX_EV_Q_LABEL);
+		tx_queue = &efx->tx_queue[tx_ev_q_label];
+		channel->irq_mod_score +=
+			(tx_ev_desc_ptr - tx_queue->read_count) &
+			EFX_TXQ_MASK;
+		efx_xmit_done(tx_queue, tx_ev_desc_ptr);
+	} else if (EFX_QWORD_FIELD(*event, FSF_AZ_TX_EV_WQ_FF_FULL)) {
+		/* Rewrite the FIFO write pointer */
+		tx_ev_q_label = EFX_QWORD_FIELD(*event, FSF_AZ_TX_EV_Q_LABEL);
+		tx_queue = &efx->tx_queue[tx_ev_q_label];
+
+		if (efx_dev_registered(efx))
+			netif_tx_lock(efx->net_dev);
+		efx_notify_tx_desc(tx_queue);
+		if (efx_dev_registered(efx))
+			netif_tx_unlock(efx->net_dev);
+	} else if (EFX_QWORD_FIELD(*event, FSF_AZ_TX_EV_PKT_ERR) &&
+		   EFX_WORKAROUND_10727(efx)) {
+		efx_schedule_reset(efx, RESET_TYPE_TX_DESC_FETCH);
+	} else {
+		EFX_ERR(efx, "channel %d unexpected TX event "
+			EFX_QWORD_FMT"\n", channel->channel,
+			EFX_QWORD_VAL(*event));
+	}
+}
+
+/* Detect errors included in the rx_evt_pkt_ok bit. */
+static void efx_handle_rx_not_ok(struct efx_rx_queue *rx_queue,
+				 const efx_qword_t *event,
+				 bool *rx_ev_pkt_ok,
+				 bool *discard)
+{
+	struct efx_nic *efx = rx_queue->efx;
+	bool rx_ev_buf_owner_id_err, rx_ev_ip_hdr_chksum_err;
+	bool rx_ev_tcp_udp_chksum_err, rx_ev_eth_crc_err;
+	bool rx_ev_frm_trunc, rx_ev_drib_nib, rx_ev_tobe_disc;
+	bool rx_ev_other_err, rx_ev_pause_frm;
+	bool rx_ev_hdr_type, rx_ev_mcast_pkt;
+	unsigned rx_ev_pkt_type;
+
+	rx_ev_hdr_type = EFX_QWORD_FIELD(*event, FSF_AZ_RX_EV_HDR_TYPE);
+	rx_ev_mcast_pkt = EFX_QWORD_FIELD(*event, FSF_AZ_RX_EV_MCAST_PKT);
+	rx_ev_tobe_disc = EFX_QWORD_FIELD(*event, FSF_AZ_RX_EV_TOBE_DISC);
+	rx_ev_pkt_type = EFX_QWORD_FIELD(*event, FSF_AZ_RX_EV_PKT_TYPE);
+	rx_ev_buf_owner_id_err = EFX_QWORD_FIELD(*event,
+						 FSF_AZ_RX_EV_BUF_OWNER_ID_ERR);
+	rx_ev_ip_hdr_chksum_err = EFX_QWORD_FIELD(*event,
+						  FSF_AZ_RX_EV_IP_HDR_CHKSUM_ERR);
+	rx_ev_tcp_udp_chksum_err = EFX_QWORD_FIELD(*event,
+						   FSF_AZ_RX_EV_TCP_UDP_CHKSUM_ERR);
+	rx_ev_eth_crc_err = EFX_QWORD_FIELD(*event, FSF_AZ_RX_EV_ETH_CRC_ERR);
+	rx_ev_frm_trunc = EFX_QWORD_FIELD(*event, FSF_AZ_RX_EV_FRM_TRUNC);
+	rx_ev_drib_nib = ((efx_nic_rev(efx) >= EFX_REV_FALCON_B0) ?
+			  0 : EFX_QWORD_FIELD(*event, FSF_AA_RX_EV_DRIB_NIB));
+	rx_ev_pause_frm = EFX_QWORD_FIELD(*event, FSF_AZ_RX_EV_PAUSE_FRM_ERR);
+
+	/* Every error apart from tobe_disc and pause_frm */
+	rx_ev_other_err = (rx_ev_drib_nib | rx_ev_tcp_udp_chksum_err |
+			   rx_ev_buf_owner_id_err | rx_ev_eth_crc_err |
+			   rx_ev_frm_trunc | rx_ev_ip_hdr_chksum_err);
+
+	/* Count errors that are not in MAC stats.  Ignore expected
+	 * checksum errors during self-test. */
+	if (rx_ev_frm_trunc)
+		++rx_queue->channel->n_rx_frm_trunc;
+	else if (rx_ev_tobe_disc)
+		++rx_queue->channel->n_rx_tobe_disc;
+	else if (!efx->loopback_selftest) {
+		if (rx_ev_ip_hdr_chksum_err)
+			++rx_queue->channel->n_rx_ip_hdr_chksum_err;
+		else if (rx_ev_tcp_udp_chksum_err)
+			++rx_queue->channel->n_rx_tcp_udp_chksum_err;
+	}
+
+	/* The frame must be discarded if any of these are true. */
+	*discard = (rx_ev_eth_crc_err | rx_ev_frm_trunc | rx_ev_drib_nib |
+		    rx_ev_tobe_disc | rx_ev_pause_frm);
+
+	/* TOBE_DISC is expected on unicast mismatches; don't print out an
+	 * error message.  FRM_TRUNC indicates RXDP dropped the packet due
+	 * to a FIFO overflow.
+	 */
+#ifdef EFX_ENABLE_DEBUG
+	if (rx_ev_other_err) {
+		EFX_INFO_RL(efx, " RX queue %d unexpected RX event "
+			    EFX_QWORD_FMT "%s%s%s%s%s%s%s%s\n",
+			    rx_queue->queue, EFX_QWORD_VAL(*event),
+			    rx_ev_buf_owner_id_err ? " [OWNER_ID_ERR]" : "",
+			    rx_ev_ip_hdr_chksum_err ?
+			    " [IP_HDR_CHKSUM_ERR]" : "",
+			    rx_ev_tcp_udp_chksum_err ?
+			    " [TCP_UDP_CHKSUM_ERR]" : "",
+			    rx_ev_eth_crc_err ? " [ETH_CRC_ERR]" : "",
+			    rx_ev_frm_trunc ? " [FRM_TRUNC]" : "",
+			    rx_ev_drib_nib ? " [DRIB_NIB]" : "",
+			    rx_ev_tobe_disc ? " [TOBE_DISC]" : "",
+			    rx_ev_pause_frm ? " [PAUSE]" : "");
+	}
+#endif
+}
+
+/* Handle receive events that are not in-order. */
+static void
+efx_handle_rx_bad_index(struct efx_rx_queue *rx_queue, unsigned index)
+{
+	struct efx_nic *efx = rx_queue->efx;
+	unsigned expected, dropped;
+
+	expected = rx_queue->removed_count & EFX_RXQ_MASK;
+	dropped = (index - expected) & EFX_RXQ_MASK;
+	EFX_INFO(efx, "dropped %d events (index=%d expected=%d)\n",
+		dropped, index, expected);
+
+	efx_schedule_reset(efx, EFX_WORKAROUND_5676(efx) ?
+			   RESET_TYPE_RX_RECOVERY : RESET_TYPE_DISABLE);
+}
+
+/* Handle a packet received event
+ *
+ * The NIC gives a "discard" flag if it's a unicast packet with the
+ * wrong destination address
+ * Also "is multicast" and "matches multicast filter" flags can be used to
+ * discard non-matching multicast packets.
+ */
+static void
+efx_handle_rx_event(struct efx_channel *channel, const efx_qword_t *event)
+{
+	unsigned int rx_ev_desc_ptr, rx_ev_byte_cnt;
+	unsigned int rx_ev_hdr_type, rx_ev_mcast_pkt;
+	unsigned expected_ptr;
+	bool rx_ev_pkt_ok, discard = false, checksummed;
+	struct efx_rx_queue *rx_queue;
+	struct efx_nic *efx = channel->efx;
+
+	/* Basic packet information */
+	rx_ev_byte_cnt = EFX_QWORD_FIELD(*event, FSF_AZ_RX_EV_BYTE_CNT);
+	rx_ev_pkt_ok = EFX_QWORD_FIELD(*event, FSF_AZ_RX_EV_PKT_OK);
+	rx_ev_hdr_type = EFX_QWORD_FIELD(*event, FSF_AZ_RX_EV_HDR_TYPE);
+	WARN_ON(EFX_QWORD_FIELD(*event, FSF_AZ_RX_EV_JUMBO_CONT));
+	WARN_ON(EFX_QWORD_FIELD(*event, FSF_AZ_RX_EV_SOP) != 1);
+	WARN_ON(EFX_QWORD_FIELD(*event, FSF_AZ_RX_EV_Q_LABEL) !=
+		channel->channel);
+
+	rx_queue = &efx->rx_queue[channel->channel];
+
+	rx_ev_desc_ptr = EFX_QWORD_FIELD(*event, FSF_AZ_RX_EV_DESC_PTR);
+	expected_ptr = rx_queue->removed_count & EFX_RXQ_MASK;
+	if (unlikely(rx_ev_desc_ptr != expected_ptr))
+		efx_handle_rx_bad_index(rx_queue, rx_ev_desc_ptr);
+
+	if (likely(rx_ev_pkt_ok)) {
+		/* If packet is marked as OK and packet type is TCP/IP or
+		 * UDP/IP, then we can rely on the hardware checksum.
+		 */
+		checksummed =
+			likely(efx->rx_checksum_enabled) &&
+			(rx_ev_hdr_type == FSE_CZ_RX_EV_HDR_TYPE_IPV4V6_TCP ||
+			 rx_ev_hdr_type == FSE_CZ_RX_EV_HDR_TYPE_IPV4V6_UDP);
+	} else {
+		efx_handle_rx_not_ok(rx_queue, event, &rx_ev_pkt_ok, &discard);
+		checksummed = false;
+	}
+
+	/* Detect multicast packets that didn't match the filter */
+	rx_ev_mcast_pkt = EFX_QWORD_FIELD(*event, FSF_AZ_RX_EV_MCAST_PKT);
+	if (rx_ev_mcast_pkt) {
+		unsigned int rx_ev_mcast_hash_match =
+			EFX_QWORD_FIELD(*event, FSF_AZ_RX_EV_MCAST_HASH_MATCH);
+
+		if (unlikely(!rx_ev_mcast_hash_match)) {
+			++channel->n_rx_mcast_mismatch;
+			discard = true;
+		}
+	}
+
+	channel->irq_mod_score += 2;
+
+	/* Handle received packet */
+	efx_rx_packet(rx_queue, rx_ev_desc_ptr, rx_ev_byte_cnt,
+		      checksummed, discard);
+}
+
+/* Global events are basically PHY events */
+static void
+efx_handle_global_event(struct efx_channel *channel, efx_qword_t *event)
+{
+	struct efx_nic *efx = channel->efx;
+	bool handled = false;
+
+	if (EFX_QWORD_FIELD(*event, FSF_AB_GLB_EV_G_PHY0_INTR) ||
+	    EFX_QWORD_FIELD(*event, FSF_AB_GLB_EV_XG_PHY0_INTR) ||
+	    EFX_QWORD_FIELD(*event, FSF_AB_GLB_EV_XFP_PHY0_INTR)) {
+		/* Ignored */
+		handled = true;
+	}
+
+	if ((efx_nic_rev(efx) >= EFX_REV_FALCON_B0) &&
+	    EFX_QWORD_FIELD(*event, FSF_BB_GLB_EV_XG_MGT_INTR)) {
+		efx->xmac_poll_required = true;
+		handled = true;
+	}
+
+	if (efx_nic_rev(efx) <= EFX_REV_FALCON_A1 ?
+	    EFX_QWORD_FIELD(*event, FSF_AA_GLB_EV_RX_RECOVERY) :
+	    EFX_QWORD_FIELD(*event, FSF_BB_GLB_EV_RX_RECOVERY)) {
+		EFX_ERR(efx, "channel %d seen global RX_RESET "
+			"event. Resetting.\n", channel->channel);
+
+		atomic_inc(&efx->rx_reset);
+		efx_schedule_reset(efx, EFX_WORKAROUND_6555(efx) ?
+				   RESET_TYPE_RX_RECOVERY : RESET_TYPE_DISABLE);
+		handled = true;
+	}
+
+	if (!handled)
+		EFX_ERR(efx, "channel %d unknown global event "
+			EFX_QWORD_FMT "\n", channel->channel,
+			EFX_QWORD_VAL(*event));
+}
+
+static void
+efx_handle_driver_event(struct efx_channel *channel, efx_qword_t *event)
+{
+	struct efx_nic *efx = channel->efx;
+	unsigned int ev_sub_code;
+	unsigned int ev_sub_data;
+
+	ev_sub_code = EFX_QWORD_FIELD(*event, FSF_AZ_DRIVER_EV_SUBCODE);
+	ev_sub_data = EFX_QWORD_FIELD(*event, FSF_AZ_DRIVER_EV_SUBDATA);
+
+	switch (ev_sub_code) {
+	case FSE_AZ_TX_DESCQ_FLS_DONE_EV:
+		EFX_TRACE(efx, "channel %d TXQ %d flushed\n",
+			  channel->channel, ev_sub_data);
+		break;
+	case FSE_AZ_RX_DESCQ_FLS_DONE_EV:
+		EFX_TRACE(efx, "channel %d RXQ %d flushed\n",
+			  channel->channel, ev_sub_data);
+		break;
+	case FSE_AZ_EVQ_INIT_DONE_EV:
+		EFX_LOG(efx, "channel %d EVQ %d initialised\n",
+			channel->channel, ev_sub_data);
+		break;
+	case FSE_AZ_SRM_UPD_DONE_EV:
+		EFX_TRACE(efx, "channel %d SRAM update done\n",
+			  channel->channel);
+		break;
+	case FSE_AZ_WAKE_UP_EV:
+		EFX_TRACE(efx, "channel %d RXQ %d wakeup event\n",
+			  channel->channel, ev_sub_data);
+		break;
+	case FSE_AZ_TIMER_EV:
+		EFX_TRACE(efx, "channel %d RX queue %d timer expired\n",
+			  channel->channel, ev_sub_data);
+		break;
+	case FSE_AA_RX_RECOVER_EV:
+		EFX_ERR(efx, "channel %d seen DRIVER RX_RESET event. "
+			"Resetting.\n", channel->channel);
+		atomic_inc(&efx->rx_reset);
+		efx_schedule_reset(efx,
+				   EFX_WORKAROUND_6555(efx) ?
+				   RESET_TYPE_RX_RECOVERY :
+				   RESET_TYPE_DISABLE);
+		break;
+	case FSE_BZ_RX_DSC_ERROR_EV:
+		EFX_ERR(efx, "RX DMA Q %d reports descriptor fetch error."
+			" RX Q %d is disabled.\n", ev_sub_data, ev_sub_data);
+		efx_schedule_reset(efx, RESET_TYPE_RX_DESC_FETCH);
+		break;
+	case FSE_BZ_TX_DSC_ERROR_EV:
+		EFX_ERR(efx, "TX DMA Q %d reports descriptor fetch error."
+			" TX Q %d is disabled.\n", ev_sub_data, ev_sub_data);
+		efx_schedule_reset(efx, RESET_TYPE_TX_DESC_FETCH);
+		break;
+	default:
+		EFX_TRACE(efx, "channel %d unknown driver event code %d "
+			  "data %04x\n", channel->channel, ev_sub_code,
+			  ev_sub_data);
+		break;
+	}
+}
+
+int efx_nic_process_eventq(struct efx_channel *channel, int rx_quota)
+{
+	unsigned int read_ptr;
+	efx_qword_t event, *p_event;
+	int ev_code;
+	int rx_packets = 0;
+
+	read_ptr = channel->eventq_read_ptr;
+
+	do {
+		p_event = efx_event(channel, read_ptr);
+		event = *p_event;
+
+		if (!efx_event_present(&event))
+			/* End of events */
+			break;
+
+		EFX_TRACE(channel->efx, "channel %d event is "EFX_QWORD_FMT"\n",
+			  channel->channel, EFX_QWORD_VAL(event));
+
+		/* Clear this event by marking it all ones */
+		EFX_SET_QWORD(*p_event);
+
+		ev_code = EFX_QWORD_FIELD(event, FSF_AZ_EV_CODE);
+
+		switch (ev_code) {
+		case FSE_AZ_EV_CODE_RX_EV:
+			efx_handle_rx_event(channel, &event);
+			++rx_packets;
+			break;
+		case FSE_AZ_EV_CODE_TX_EV:
+			efx_handle_tx_event(channel, &event);
+			break;
+		case FSE_AZ_EV_CODE_DRV_GEN_EV:
+			channel->eventq_magic = EFX_QWORD_FIELD(
+				event, FSF_AZ_DRV_GEN_EV_MAGIC);
+			EFX_LOG(channel->efx, "channel %d received generated "
+				"event "EFX_QWORD_FMT"\n", channel->channel,
+				EFX_QWORD_VAL(event));
+			break;
+		case FSE_AZ_EV_CODE_GLOBAL_EV:
+			efx_handle_global_event(channel, &event);
+			break;
+		case FSE_AZ_EV_CODE_DRIVER_EV:
+			efx_handle_driver_event(channel, &event);
+			break;
+		case FSE_CZ_EV_CODE_MCDI_EV:
+			efx_mcdi_process_event(channel, &event);
+			break;
+		default:
+			EFX_ERR(channel->efx, "channel %d unknown event type %d"
+				" (data " EFX_QWORD_FMT ")\n", channel->channel,
+				ev_code, EFX_QWORD_VAL(event));
+		}
+
+		/* Increment read pointer */
+		read_ptr = (read_ptr + 1) & EFX_EVQ_MASK;
+
+	} while (rx_packets < rx_quota);
+
+	channel->eventq_read_ptr = read_ptr;
+	return rx_packets;
+}
+
+
+/* Allocate buffer table entries for event queue */
+int efx_nic_probe_eventq(struct efx_channel *channel)
+{
+	struct efx_nic *efx = channel->efx;
+	BUILD_BUG_ON(EFX_EVQ_SIZE < 512 || EFX_EVQ_SIZE > 32768 ||
+		     EFX_EVQ_SIZE & EFX_EVQ_MASK);
+	return efx_alloc_special_buffer(efx, &channel->eventq,
+					EFX_EVQ_SIZE * sizeof(efx_qword_t));
+}
+
+void efx_nic_init_eventq(struct efx_channel *channel)
+{
+	efx_oword_t reg;
+	struct efx_nic *efx = channel->efx;
+
+	EFX_LOG(efx, "channel %d event queue in special buffers %d-%d\n",
+		channel->channel, channel->eventq.index,
+		channel->eventq.index + channel->eventq.entries - 1);
+
+	if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0) {
+		EFX_POPULATE_OWORD_3(reg,
+				     FRF_CZ_TIMER_Q_EN, 1,
+				     FRF_CZ_HOST_NOTIFY_MODE, 0,
+				     FRF_CZ_TIMER_MODE, FFE_CZ_TIMER_MODE_DIS);
+		efx_writeo_table(efx, &reg, FR_BZ_TIMER_TBL, channel->channel);
+	}
+
+	/* Pin event queue buffer */
+	efx_init_special_buffer(efx, &channel->eventq);
+
+	/* Fill event queue with all ones (i.e. empty events) */
+	memset(channel->eventq.addr, 0xff, channel->eventq.len);
+
+	/* Push event queue to card */
+	EFX_POPULATE_OWORD_3(reg,
+			     FRF_AZ_EVQ_EN, 1,
+			     FRF_AZ_EVQ_SIZE, __ffs(channel->eventq.entries),
+			     FRF_AZ_EVQ_BUF_BASE_ID, channel->eventq.index);
+	efx_writeo_table(efx, &reg, efx->type->evq_ptr_tbl_base,
+			 channel->channel);
+
+	efx->type->push_irq_moderation(channel);
+}
+
+void efx_nic_fini_eventq(struct efx_channel *channel)
+{
+	efx_oword_t reg;
+	struct efx_nic *efx = channel->efx;
+
+	/* Remove event queue from card */
+	EFX_ZERO_OWORD(reg);
+	efx_writeo_table(efx, &reg, efx->type->evq_ptr_tbl_base,
+			 channel->channel);
+	if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0)
+		efx_writeo_table(efx, &reg, FR_BZ_TIMER_TBL, channel->channel);
+
+	/* Unpin event queue */
+	efx_fini_special_buffer(efx, &channel->eventq);
+}
+
+/* Free buffers backing event queue */
+void efx_nic_remove_eventq(struct efx_channel *channel)
+{
+	efx_free_special_buffer(channel->efx, &channel->eventq);
+}
+
+
+/* Generates a test event on the event queue.  A subsequent call to
+ * process_eventq() should pick up the event and place the value of
+ * "magic" into channel->eventq_magic;
+ */
+void efx_nic_generate_test_event(struct efx_channel *channel, unsigned int magic)
+{
+	efx_qword_t test_event;
+
+	EFX_POPULATE_QWORD_2(test_event, FSF_AZ_EV_CODE,
+			     FSE_AZ_EV_CODE_DRV_GEN_EV,
+			     FSF_AZ_DRV_GEN_EV_MAGIC, magic);
+	efx_generate_event(channel, &test_event);
+}
+
+/**************************************************************************
+ *
+ * Flush handling
+ *
+ **************************************************************************/
+
+
+static void efx_poll_flush_events(struct efx_nic *efx)
+{
+	struct efx_channel *channel = &efx->channel[0];
+	struct efx_tx_queue *tx_queue;
+	struct efx_rx_queue *rx_queue;
+	unsigned int read_ptr = channel->eventq_read_ptr;
+	unsigned int end_ptr = (read_ptr - 1) & EFX_EVQ_MASK;
+
+	do {
+		efx_qword_t *event = efx_event(channel, read_ptr);
+		int ev_code, ev_sub_code, ev_queue;
+		bool ev_failed;
+
+		if (!efx_event_present(event))
+			break;
+
+		ev_code = EFX_QWORD_FIELD(*event, FSF_AZ_EV_CODE);
+		ev_sub_code = EFX_QWORD_FIELD(*event,
+					      FSF_AZ_DRIVER_EV_SUBCODE);
+		if (ev_code == FSE_AZ_EV_CODE_DRIVER_EV &&
+		    ev_sub_code == FSE_AZ_TX_DESCQ_FLS_DONE_EV) {
+			ev_queue = EFX_QWORD_FIELD(*event,
+						   FSF_AZ_DRIVER_EV_SUBDATA);
+			if (ev_queue < EFX_TX_QUEUE_COUNT) {
+				tx_queue = efx->tx_queue + ev_queue;
+				tx_queue->flushed = FLUSH_DONE;
+			}
+		} else if (ev_code == FSE_AZ_EV_CODE_DRIVER_EV &&
+			   ev_sub_code == FSE_AZ_RX_DESCQ_FLS_DONE_EV) {
+			ev_queue = EFX_QWORD_FIELD(
+				*event, FSF_AZ_DRIVER_EV_RX_DESCQ_ID);
+			ev_failed = EFX_QWORD_FIELD(
+				*event, FSF_AZ_DRIVER_EV_RX_FLUSH_FAIL);
+			if (ev_queue < efx->n_rx_queues) {
+				rx_queue = efx->rx_queue + ev_queue;
+				rx_queue->flushed =
+					ev_failed ? FLUSH_FAILED : FLUSH_DONE;
+			}
+		}
+
+		/* We're about to destroy the queue anyway, so
+		 * it's ok to throw away every non-flush event */
+		EFX_SET_QWORD(*event);
+
+		read_ptr = (read_ptr + 1) & EFX_EVQ_MASK;
+	} while (read_ptr != end_ptr);
+
+	channel->eventq_read_ptr = read_ptr;
+}
+
+/* Handle tx and rx flushes at the same time, since they run in
+ * parallel in the hardware and there's no reason for us to
+ * serialise them */
+int efx_nic_flush_queues(struct efx_nic *efx)
+{
+	struct efx_rx_queue *rx_queue;
+	struct efx_tx_queue *tx_queue;
+	int i, tx_pending, rx_pending;
+
+	/* If necessary prepare the hardware for flushing */
+	efx->type->prepare_flush(efx);
+
+	/* Flush all tx queues in parallel */
+	efx_for_each_tx_queue(tx_queue, efx)
+		efx_flush_tx_queue(tx_queue);
+
+	/* The hardware supports four concurrent rx flushes, each of which may
+	 * need to be retried if there is an outstanding descriptor fetch */
+	for (i = 0; i < EFX_FLUSH_POLL_COUNT; ++i) {
+		rx_pending = tx_pending = 0;
+		efx_for_each_rx_queue(rx_queue, efx) {
+			if (rx_queue->flushed == FLUSH_PENDING)
+				++rx_pending;
+		}
+		efx_for_each_rx_queue(rx_queue, efx) {
+			if (rx_pending == EFX_RX_FLUSH_COUNT)
+				break;
+			if (rx_queue->flushed == FLUSH_FAILED ||
+			    rx_queue->flushed == FLUSH_NONE) {
+				efx_flush_rx_queue(rx_queue);
+				++rx_pending;
+			}
+		}
+		efx_for_each_tx_queue(tx_queue, efx) {
+			if (tx_queue->flushed != FLUSH_DONE)
+				++tx_pending;
+		}
+
+		if (rx_pending == 0 && tx_pending == 0)
+			return 0;
+
+		msleep(EFX_FLUSH_INTERVAL);
+		efx_poll_flush_events(efx);
+	}
+
+	/* Mark the queues as all flushed. We're going to return failure
+	 * leading to a reset, or fake up success anyway */
+	efx_for_each_tx_queue(tx_queue, efx) {
+		if (tx_queue->flushed != FLUSH_DONE)
+			EFX_ERR(efx, "tx queue %d flush command timed out\n",
+				tx_queue->queue);
+		tx_queue->flushed = FLUSH_DONE;
+	}
+	efx_for_each_rx_queue(rx_queue, efx) {
+		if (rx_queue->flushed != FLUSH_DONE)
+			EFX_ERR(efx, "rx queue %d flush command timed out\n",
+				rx_queue->queue);
+		rx_queue->flushed = FLUSH_DONE;
+	}
+
+	if (EFX_WORKAROUND_7803(efx))
+		return 0;
+
+	return -ETIMEDOUT;
+}
+
+/**************************************************************************
+ *
+ * Hardware interrupts
+ * The hardware interrupt handler does very little work; all the event
+ * queue processing is carried out by per-channel tasklets.
+ *
+ **************************************************************************/
+
+/* Enable/disable/generate interrupts */
+static inline void efx_nic_interrupts(struct efx_nic *efx,
+				      bool enabled, bool force)
+{
+	efx_oword_t int_en_reg_ker;
+	unsigned int level = 0;
+
+	if (EFX_WORKAROUND_17213(efx) && !EFX_INT_MODE_USE_MSI(efx))
+		/* Set the level always even if we're generating a test
+		 * interrupt, because our legacy interrupt handler is safe */
+		level = 0x1f;
+
+	EFX_POPULATE_OWORD_3(int_en_reg_ker,
+			     FRF_AZ_KER_INT_LEVE_SEL, level,
+			     FRF_AZ_KER_INT_KER, force,
+			     FRF_AZ_DRV_INT_EN_KER, enabled);
+	efx_writeo(efx, &int_en_reg_ker, FR_AZ_INT_EN_KER);
+}
+
+void efx_nic_enable_interrupts(struct efx_nic *efx)
+{
+	struct efx_channel *channel;
+
+	EFX_ZERO_OWORD(*((efx_oword_t *) efx->irq_status.addr));
+	wmb(); /* Ensure interrupt vector is clear before interrupts enabled */
+
+	/* Enable interrupts */
+	efx_nic_interrupts(efx, true, false);
+
+	/* Force processing of all the channels to get the EVQ RPTRs up to
+	   date */
+	efx_for_each_channel(channel, efx)
+		efx_schedule_channel(channel);
+}
+
+void efx_nic_disable_interrupts(struct efx_nic *efx)
+{
+	/* Disable interrupts */
+	efx_nic_interrupts(efx, false, false);
+}
+
+/* Generate a test interrupt
+ * Interrupt must already have been enabled, otherwise nasty things
+ * may happen.
+ */
+void efx_nic_generate_interrupt(struct efx_nic *efx)
+{
+	efx_nic_interrupts(efx, true, true);
+}
+
+/* Process a fatal interrupt
+ * Disable bus mastering ASAP and schedule a reset
+ */
+irqreturn_t efx_nic_fatal_interrupt(struct efx_nic *efx)
+{
+	struct falcon_nic_data *nic_data = efx->nic_data;
+	efx_oword_t *int_ker = efx->irq_status.addr;
+	efx_oword_t fatal_intr;
+	int error, mem_perr;
+
+	efx_reado(efx, &fatal_intr, FR_AZ_FATAL_INTR_KER);
+	error = EFX_OWORD_FIELD(fatal_intr, FRF_AZ_FATAL_INTR);
+
+	EFX_ERR(efx, "SYSTEM ERROR " EFX_OWORD_FMT " status "
+		EFX_OWORD_FMT ": %s\n", EFX_OWORD_VAL(*int_ker),
+		EFX_OWORD_VAL(fatal_intr),
+		error ? "disabling bus mastering" : "no recognised error");
+	if (error == 0)
+		goto out;
+
+	/* If this is a memory parity error dump which blocks are offending */
+	mem_perr = EFX_OWORD_FIELD(fatal_intr, FRF_AZ_MEM_PERR_INT_KER);
+	if (mem_perr) {
+		efx_oword_t reg;
+		efx_reado(efx, &reg, FR_AZ_MEM_STAT);
+		EFX_ERR(efx, "SYSTEM ERROR: memory parity error "
+			EFX_OWORD_FMT "\n", EFX_OWORD_VAL(reg));
+	}
+
+	/* Disable both devices */
+	pci_clear_master(efx->pci_dev);
+	if (efx_nic_is_dual_func(efx))
+		pci_clear_master(nic_data->pci_dev2);
+	efx_nic_disable_interrupts(efx);
+
+	/* Count errors and reset or disable the NIC accordingly */
+	if (efx->int_error_count == 0 ||
+	    time_after(jiffies, efx->int_error_expire)) {
+		efx->int_error_count = 0;
+		efx->int_error_expire =
+			jiffies + EFX_INT_ERROR_EXPIRE * HZ;
+	}
+	if (++efx->int_error_count < EFX_MAX_INT_ERRORS) {
+		EFX_ERR(efx, "SYSTEM ERROR - reset scheduled\n");
+		efx_schedule_reset(efx, RESET_TYPE_INT_ERROR);
+	} else {
+		EFX_ERR(efx, "SYSTEM ERROR - max number of errors seen."
+			"NIC will be disabled\n");
+		efx_schedule_reset(efx, RESET_TYPE_DISABLE);
+	}
+out:
+	return IRQ_HANDLED;
+}
+
+/* Handle a legacy interrupt
+ * Acknowledges the interrupt and schedule event queue processing.
+ */
+static irqreturn_t efx_legacy_interrupt(int irq, void *dev_id)
+{
+	struct efx_nic *efx = dev_id;
+	efx_oword_t *int_ker = efx->irq_status.addr;
+	irqreturn_t result = IRQ_NONE;
+	struct efx_channel *channel;
+	efx_dword_t reg;
+	u32 queues;
+	int syserr;
+
+	/* Read the ISR which also ACKs the interrupts */
+	efx_readd(efx, &reg, FR_BZ_INT_ISR0);
+	queues = EFX_EXTRACT_DWORD(reg, 0, 31);
+
+	/* Check to see if we have a serious error condition */
+	syserr = EFX_OWORD_FIELD(*int_ker, FSF_AZ_NET_IVEC_FATAL_INT);
+	if (unlikely(syserr))
+		return efx_nic_fatal_interrupt(efx);
+
+	if (queues != 0) {
+		if (EFX_WORKAROUND_15783(efx))
+			efx->irq_zero_count = 0;
+
+		/* Schedule processing of any interrupting queues */
+		efx_for_each_channel(channel, efx) {
+			if (queues & 1)
+				efx_schedule_channel(channel);
+			queues >>= 1;
+		}
+		result = IRQ_HANDLED;
+
+	} else if (EFX_WORKAROUND_15783(efx) &&
+		   efx->irq_zero_count++ == 0) {
+		efx_qword_t *event;
+
+		/* Ensure we rearm all event queues */
+		efx_for_each_channel(channel, efx) {
+			event = efx_event(channel, channel->eventq_read_ptr);
+			if (efx_event_present(event))
+				efx_schedule_channel(channel);
+		}
+
+		result = IRQ_HANDLED;
+	}
+
+	if (result == IRQ_HANDLED) {
+		efx->last_irq_cpu = raw_smp_processor_id();
+		EFX_TRACE(efx, "IRQ %d on CPU %d status " EFX_DWORD_FMT "\n",
+			  irq, raw_smp_processor_id(), EFX_DWORD_VAL(reg));
+	}
+
+	return result;
+}
+
+/* Handle an MSI interrupt
+ *
+ * Handle an MSI hardware interrupt.  This routine schedules event
+ * queue processing.  No interrupt acknowledgement cycle is necessary.
+ * Also, we never need to check that the interrupt is for us, since
+ * MSI interrupts cannot be shared.
+ */
+static irqreturn_t efx_msi_interrupt(int irq, void *dev_id)
+{
+	struct efx_channel *channel = dev_id;
+	struct efx_nic *efx = channel->efx;
+	efx_oword_t *int_ker = efx->irq_status.addr;
+	int syserr;
+
+	efx->last_irq_cpu = raw_smp_processor_id();
+	EFX_TRACE(efx, "IRQ %d on CPU %d status " EFX_OWORD_FMT "\n",
+		  irq, raw_smp_processor_id(), EFX_OWORD_VAL(*int_ker));
+
+	/* Check to see if we have a serious error condition */
+	syserr = EFX_OWORD_FIELD(*int_ker, FSF_AZ_NET_IVEC_FATAL_INT);
+	if (unlikely(syserr))
+		return efx_nic_fatal_interrupt(efx);
+
+	/* Schedule processing of the channel */
+	efx_schedule_channel(channel);
+
+	return IRQ_HANDLED;
+}
+
+
+/* Setup RSS indirection table.
+ * This maps from the hash value of the packet to RXQ
+ */
+static void efx_setup_rss_indir_table(struct efx_nic *efx)
+{
+	int i = 0;
+	unsigned long offset;
+	efx_dword_t dword;
+
+	if (efx_nic_rev(efx) < EFX_REV_FALCON_B0)
+		return;
+
+	for (offset = FR_BZ_RX_INDIRECTION_TBL;
+	     offset < FR_BZ_RX_INDIRECTION_TBL + 0x800;
+	     offset += 0x10) {
+		EFX_POPULATE_DWORD_1(dword, FRF_BZ_IT_QUEUE,
+				     i % efx->n_rx_queues);
+		efx_writed(efx, &dword, offset);
+		i++;
+	}
+}
+
+/* Hook interrupt handler(s)
+ * Try MSI and then legacy interrupts.
+ */
+int efx_nic_init_interrupt(struct efx_nic *efx)
+{
+	struct efx_channel *channel;
+	int rc;
+
+	if (!EFX_INT_MODE_USE_MSI(efx)) {
+		irq_handler_t handler;
+		if (efx_nic_rev(efx) >= EFX_REV_FALCON_B0)
+			handler = efx_legacy_interrupt;
+		else
+			handler = falcon_legacy_interrupt_a1;
+
+		rc = request_irq(efx->legacy_irq, handler, IRQF_SHARED,
+				 efx->name, efx);
+		if (rc) {
+			EFX_ERR(efx, "failed to hook legacy IRQ %d\n",
+				efx->pci_dev->irq);
+			goto fail1;
+		}
+		return 0;
+	}
+
+	/* Hook MSI or MSI-X interrupt */
+	efx_for_each_channel(channel, efx) {
+		rc = request_irq(channel->irq, efx_msi_interrupt,
+				 IRQF_PROBE_SHARED, /* Not shared */
+				 channel->name, channel);
+		if (rc) {
+			EFX_ERR(efx, "failed to hook IRQ %d\n", channel->irq);
+			goto fail2;
+		}
+	}
+
+	return 0;
+
+ fail2:
+	efx_for_each_channel(channel, efx)
+		free_irq(channel->irq, channel);
+ fail1:
+	return rc;
+}
+
+void efx_nic_fini_interrupt(struct efx_nic *efx)
+{
+	struct efx_channel *channel;
+	efx_oword_t reg;
+
+	/* Disable MSI/MSI-X interrupts */
+	efx_for_each_channel(channel, efx) {
+		if (channel->irq)
+			free_irq(channel->irq, channel);
+	}
+
+	/* ACK legacy interrupt */
+	if (efx_nic_rev(efx) >= EFX_REV_FALCON_B0)
+		efx_reado(efx, &reg, FR_BZ_INT_ISR0);
+	else
+		falcon_irq_ack_a1(efx);
+
+	/* Disable legacy interrupt */
+	if (efx->legacy_irq)
+		free_irq(efx->legacy_irq, efx);
+}
+
+u32 efx_nic_fpga_ver(struct efx_nic *efx)
+{
+	efx_oword_t altera_build;
+	efx_reado(efx, &altera_build, FR_AZ_ALTERA_BUILD);
+	return EFX_OWORD_FIELD(altera_build, FRF_AZ_ALTERA_BUILD_VER);
+}
+
+void efx_nic_init_common(struct efx_nic *efx)
+{
+	efx_oword_t temp;
+
+	/* Set positions of descriptor caches in SRAM. */
+	EFX_POPULATE_OWORD_1(temp, FRF_AZ_SRM_TX_DC_BASE_ADR,
+			     efx->type->tx_dc_base / 8);
+	efx_writeo(efx, &temp, FR_AZ_SRM_TX_DC_CFG);
+	EFX_POPULATE_OWORD_1(temp, FRF_AZ_SRM_RX_DC_BASE_ADR,
+			     efx->type->rx_dc_base / 8);
+	efx_writeo(efx, &temp, FR_AZ_SRM_RX_DC_CFG);
+
+	/* Set TX descriptor cache size. */
+	BUILD_BUG_ON(TX_DC_ENTRIES != (8 << TX_DC_ENTRIES_ORDER));
+	EFX_POPULATE_OWORD_1(temp, FRF_AZ_TX_DC_SIZE, TX_DC_ENTRIES_ORDER);
+	efx_writeo(efx, &temp, FR_AZ_TX_DC_CFG);
+
+	/* Set RX descriptor cache size.  Set low watermark to size-8, as
+	 * this allows most efficient prefetching.
+	 */
+	BUILD_BUG_ON(RX_DC_ENTRIES != (8 << RX_DC_ENTRIES_ORDER));
+	EFX_POPULATE_OWORD_1(temp, FRF_AZ_RX_DC_SIZE, RX_DC_ENTRIES_ORDER);
+	efx_writeo(efx, &temp, FR_AZ_RX_DC_CFG);
+	EFX_POPULATE_OWORD_1(temp, FRF_AZ_RX_DC_PF_LWM, RX_DC_ENTRIES - 8);
+	efx_writeo(efx, &temp, FR_AZ_RX_DC_PF_WM);
+
+	/* Program INT_KER address */
+	EFX_POPULATE_OWORD_2(temp,
+			     FRF_AZ_NORM_INT_VEC_DIS_KER,
+			     EFX_INT_MODE_USE_MSI(efx),
+			     FRF_AZ_INT_ADR_KER, efx->irq_status.dma_addr);
+	efx_writeo(efx, &temp, FR_AZ_INT_ADR_KER);
+
+	/* Enable all the genuinely fatal interrupts.  (They are still
+	 * masked by the overall interrupt mask, controlled by
+	 * falcon_interrupts()).
+	 *
+	 * Note: All other fatal interrupts are enabled
+	 */
+	EFX_POPULATE_OWORD_3(temp,
+			     FRF_AZ_ILL_ADR_INT_KER_EN, 1,
+			     FRF_AZ_RBUF_OWN_INT_KER_EN, 1,
+			     FRF_AZ_TBUF_OWN_INT_KER_EN, 1);
+	EFX_INVERT_OWORD(temp);
+	efx_writeo(efx, &temp, FR_AZ_FATAL_INTR_KER);
+
+	efx_setup_rss_indir_table(efx);
+
+	/* Disable the ugly timer-based TX DMA backoff and allow TX DMA to be
+	 * controlled by the RX FIFO fill level. Set arbitration to one pkt/Q.
+	 */
+	efx_reado(efx, &temp, FR_AZ_TX_RESERVED);
+	EFX_SET_OWORD_FIELD(temp, FRF_AZ_TX_RX_SPACER, 0xfe);
+	EFX_SET_OWORD_FIELD(temp, FRF_AZ_TX_RX_SPACER_EN, 1);
+	EFX_SET_OWORD_FIELD(temp, FRF_AZ_TX_ONE_PKT_PER_Q, 1);
+	EFX_SET_OWORD_FIELD(temp, FRF_AZ_TX_PUSH_EN, 0);
+	EFX_SET_OWORD_FIELD(temp, FRF_AZ_TX_DIS_NON_IP_EV, 1);
+	/* Enable SW_EV to inherit in char driver - assume harmless here */
+	EFX_SET_OWORD_FIELD(temp, FRF_AZ_TX_SOFT_EVT_EN, 1);
+	/* Prefetch threshold 2 => fetch when descriptor cache half empty */
+	EFX_SET_OWORD_FIELD(temp, FRF_AZ_TX_PREF_THRESHOLD, 2);
+	/* Disable hardware watchdog which can misfire */
+	EFX_SET_OWORD_FIELD(temp, FRF_AZ_TX_PREF_WD_TMR, 0x3fffff);
+	/* Squash TX of packets of 16 bytes or less */
+	if (efx_nic_rev(efx) >= EFX_REV_FALCON_B0)
+		EFX_SET_OWORD_FIELD(temp, FRF_BZ_TX_FLUSH_MIN_LEN_EN, 1);
+	efx_writeo(efx, &temp, FR_AZ_TX_RESERVED);
+}
--- linux-mvl-dove-2.6.32.orig/drivers/net/sfc/efx.h
+++ linux-mvl-dove-2.6.32/drivers/net/sfc/efx.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * Driver for Solarflare Solarstorm network controllers and boards
  * Copyright 2005-2006 Fen Systems Ltd.
- * Copyright 2006-2008 Solarflare Communications Inc.
+ * Copyright 2006-2009 Solarflare Communications Inc.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of the GNU General Public License version 2 as published
@@ -18,35 +18,64 @@
 #define FALCON_A_P_DEVID	0x0703
 #define FALCON_A_S_DEVID        0x6703
 #define FALCON_B_P_DEVID        0x0710
+#define BETHPAGE_A_P_DEVID      0x0803
+#define SIENA_A_P_DEVID         0x0813
+
+/* Solarstorm controllers use BAR 0 for I/O space and BAR 2(&3) for memory */
+#define EFX_MEM_BAR 2
 
 /* TX */
-extern netdev_tx_t efx_xmit(struct efx_nic *efx,
-				  struct efx_tx_queue *tx_queue,
-				  struct sk_buff *skb);
+extern int efx_probe_tx_queue(struct efx_tx_queue *tx_queue);
+extern void efx_remove_tx_queue(struct efx_tx_queue *tx_queue);
+extern void efx_init_tx_queue(struct efx_tx_queue *tx_queue);
+extern void efx_fini_tx_queue(struct efx_tx_queue *tx_queue);
+extern void efx_release_tx_buffers(struct efx_tx_queue *tx_queue);
+extern netdev_tx_t
+efx_hard_start_xmit(struct sk_buff *skb, struct net_device *net_dev);
+extern netdev_tx_t
+efx_enqueue_skb(struct efx_tx_queue *tx_queue, struct sk_buff *skb);
+extern void efx_xmit_done(struct efx_tx_queue *tx_queue, unsigned int index);
 extern void efx_stop_queue(struct efx_nic *efx);
 extern void efx_wake_queue(struct efx_nic *efx);
+#define EFX_TXQ_SIZE 1024
+#define EFX_TXQ_MASK (EFX_TXQ_SIZE - 1)
 
 /* RX */
-extern void efx_xmit_done(struct efx_tx_queue *tx_queue, unsigned int index);
+extern int efx_probe_rx_queue(struct efx_rx_queue *rx_queue);
+extern void efx_remove_rx_queue(struct efx_rx_queue *rx_queue);
+extern void efx_init_rx_queue(struct efx_rx_queue *rx_queue);
+extern void efx_fini_rx_queue(struct efx_rx_queue *rx_queue);
+extern void efx_rx_strategy(struct efx_channel *channel);
+extern void efx_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue);
+extern void efx_rx_work(struct work_struct *data);
+extern void __efx_rx_packet(struct efx_channel *channel,
+			    struct efx_rx_buffer *rx_buf, bool checksummed);
 extern void efx_rx_packet(struct efx_rx_queue *rx_queue, unsigned int index,
 			  unsigned int len, bool checksummed, bool discard);
 extern void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue, int delay);
+#define EFX_RXQ_SIZE 1024
+#define EFX_RXQ_MASK (EFX_RXQ_SIZE - 1)
 
 /* Channels */
 extern void efx_process_channel_now(struct efx_channel *channel);
-extern void efx_flush_queues(struct efx_nic *efx);
+#define EFX_EVQ_SIZE 4096
+#define EFX_EVQ_MASK (EFX_EVQ_SIZE - 1)
 
 /* Ports */
-extern void efx_stats_disable(struct efx_nic *efx);
-extern void efx_stats_enable(struct efx_nic *efx);
-extern void efx_reconfigure_port(struct efx_nic *efx);
-extern void __efx_reconfigure_port(struct efx_nic *efx);
+extern int efx_reconfigure_port(struct efx_nic *efx);
+extern int __efx_reconfigure_port(struct efx_nic *efx);
+
+/* Ethtool support */
+extern int efx_ethtool_get_settings(struct net_device *net_dev,
+				    struct ethtool_cmd *ecmd);
+extern int efx_ethtool_set_settings(struct net_device *net_dev,
+				    struct ethtool_cmd *ecmd);
+extern const struct ethtool_ops efx_ethtool_ops;
 
 /* Reset handling */
-extern void efx_reset_down(struct efx_nic *efx, enum reset_type method,
-			   struct ethtool_cmd *ecmd);
-extern int efx_reset_up(struct efx_nic *efx, enum reset_type method,
-			struct ethtool_cmd *ecmd, bool ok);
+extern int efx_reset(struct efx_nic *efx, enum reset_type method);
+extern void efx_reset_down(struct efx_nic *efx, enum reset_type method);
+extern int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok);
 
 /* Global */
 extern void efx_schedule_reset(struct efx_nic *efx, enum reset_type type);
@@ -60,7 +89,9 @@
 /* Dummy PHY ops for PHY drivers */
 extern int efx_port_dummy_op_int(struct efx_nic *efx);
 extern void efx_port_dummy_op_void(struct efx_nic *efx);
-extern void efx_port_dummy_op_blink(struct efx_nic *efx, bool blink);
+extern void
+efx_port_dummy_op_set_id_led(struct efx_nic *efx, enum efx_led_mode mode);
+extern bool efx_port_dummy_op_poll(struct efx_nic *efx);
 
 /* MTD */
 #ifdef CONFIG_SFC_MTD
@@ -84,4 +115,8 @@
 	napi_schedule(&channel->napi_str);
 }
 
+extern void efx_link_status_changed(struct efx_nic *efx);
+extern void efx_link_set_advertising(struct efx_nic *efx, u32);
+extern void efx_link_set_wanted_fc(struct efx_nic *efx, enum efx_fc_type);
+
 #endif /* EFX_EFX_H */
--- linux-mvl-dove-2.6.32.orig/drivers/net/sfc/mdio_10g.c
+++ linux-mvl-dove-2.6.32/drivers/net/sfc/mdio_10g.c
@@ -1,6 +1,6 @@
 /****************************************************************************
  * Driver for Solarflare Solarstorm network controllers and boards
- * Copyright 2006-2008 Solarflare Communications Inc.
+ * Copyright 2006-2009 Solarflare Communications Inc.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of the GNU General Public License version 2 as published
@@ -14,8 +14,8 @@
 #include <linux/delay.h>
 #include "net_driver.h"
 #include "mdio_10g.h"
-#include "boards.h"
 #include "workarounds.h"
+#include "nic.h"
 
 unsigned efx_mdio_id_oui(u32 id)
 {
@@ -174,7 +174,7 @@
 	 * of mmd's */
 	if (LOOPBACK_INTERNAL(efx))
 		return true;
-	else if (efx->loopback_mode == LOOPBACK_NETWORK)
+	else if (LOOPBACK_MASK(efx) & LOOPBACKS_WS)
 		return false;
 	else if (efx_phy_mode_disabled(efx->phy_mode))
 		return false;
@@ -211,7 +211,7 @@
 			  efx->loopback_mode == LOOPBACK_PCS);
 	efx_mdio_set_flag(efx, MDIO_MMD_PHYXS,
 			  MDIO_CTRL1, MDIO_PHYXS_CTRL1_LOOPBACK,
-			  efx->loopback_mode == LOOPBACK_NETWORK);
+			  efx->loopback_mode == LOOPBACK_PHYXS_WS);
 }
 
 static void efx_mdio_set_mmd_lpower(struct efx_nic *efx,
@@ -249,8 +249,6 @@
 int efx_mdio_set_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd)
 {
 	struct ethtool_cmd prev;
-	u32 required;
-	int reg;
 
 	efx->phy_op->get_settings(efx, &prev);
 
@@ -266,86 +264,74 @@
 		return -EINVAL;
 
 	/* Check that PHY supports these settings */
-	if (ecmd->autoneg) {
-		required = SUPPORTED_Autoneg;
-	} else if (ecmd->duplex) {
-		switch (ecmd->speed) {
-		case SPEED_10:  required = SUPPORTED_10baseT_Full;  break;
-		case SPEED_100: required = SUPPORTED_100baseT_Full; break;
-		default:        return -EINVAL;
-		}
-	} else {
-		switch (ecmd->speed) {
-		case SPEED_10:  required = SUPPORTED_10baseT_Half;  break;
-		case SPEED_100: required = SUPPORTED_100baseT_Half; break;
-		default:        return -EINVAL;
-		}
-	}
-	required |= ecmd->advertising;
-	if (required & ~prev.supported)
+	if (!ecmd->autoneg ||
+	    (ecmd->advertising | SUPPORTED_Autoneg) & ~prev.supported)
 		return -EINVAL;
 
-	if (ecmd->autoneg) {
-		bool xnp = (ecmd->advertising & ADVERTISED_10000baseT_Full
-			    || EFX_WORKAROUND_13204(efx));
-
-		/* Set up the base page */
-		reg = ADVERTISE_CSMA;
-		if (ecmd->advertising & ADVERTISED_10baseT_Half)
-			reg |= ADVERTISE_10HALF;
-		if (ecmd->advertising & ADVERTISED_10baseT_Full)
-			reg |= ADVERTISE_10FULL;
-		if (ecmd->advertising & ADVERTISED_100baseT_Half)
-			reg |= ADVERTISE_100HALF;
-		if (ecmd->advertising & ADVERTISED_100baseT_Full)
-			reg |= ADVERTISE_100FULL;
-		if (xnp)
-			reg |= ADVERTISE_RESV;
-		else if (ecmd->advertising & (ADVERTISED_1000baseT_Half |
-					      ADVERTISED_1000baseT_Full))
-			reg |= ADVERTISE_NPAGE;
-		reg |= mii_advertise_flowctrl(efx->wanted_fc);
-		efx_mdio_write(efx, MDIO_MMD_AN, MDIO_AN_ADVERTISE, reg);
-
-		/* Set up the (extended) next page if necessary */
-		if (efx->phy_op->set_npage_adv)
-			efx->phy_op->set_npage_adv(efx, ecmd->advertising);
-
-		/* Enable and restart AN */
-		reg = efx_mdio_read(efx, MDIO_MMD_AN, MDIO_CTRL1);
-		reg |= MDIO_AN_CTRL1_ENABLE;
-		if (!(EFX_WORKAROUND_15195(efx) &&
-		      LOOPBACK_MASK(efx) & efx->phy_op->loopbacks))
-			reg |= MDIO_AN_CTRL1_RESTART;
-		if (xnp)
-			reg |= MDIO_AN_CTRL1_XNP;
-		else
-			reg &= ~MDIO_AN_CTRL1_XNP;
-		efx_mdio_write(efx, MDIO_MMD_AN, MDIO_CTRL1, reg);
-	} else {
-		/* Disable AN */
-		efx_mdio_set_flag(efx, MDIO_MMD_AN, MDIO_CTRL1,
-				  MDIO_AN_CTRL1_ENABLE, false);
-
-		/* Set the basic control bits */
-		reg = efx_mdio_read(efx, MDIO_MMD_PMAPMD, MDIO_CTRL1);
-		reg &= ~(MDIO_CTRL1_SPEEDSEL | MDIO_CTRL1_FULLDPLX);
-		if (ecmd->speed == SPEED_100)
-			reg |= MDIO_PMA_CTRL1_SPEED100;
-		if (ecmd->duplex)
-			reg |= MDIO_CTRL1_FULLDPLX;
-		efx_mdio_write(efx, MDIO_MMD_PMAPMD, MDIO_CTRL1, reg);
-	}
-
+	efx_link_set_advertising(efx, ecmd->advertising | ADVERTISED_Autoneg);
+	efx_mdio_an_reconfigure(efx);
 	return 0;
 }
 
+/**
+ * efx_mdio_an_reconfigure - Push advertising flags and restart autonegotiation
+ * @efx:		Efx NIC
+ */
+void efx_mdio_an_reconfigure(struct efx_nic *efx)
+{
+	bool xnp = (efx->link_advertising & ADVERTISED_10000baseT_Full
+		    || EFX_WORKAROUND_13204(efx));
+	int reg;
+
+	WARN_ON(!(efx->mdio.mmds & MDIO_DEVS_AN));
+
+	/* Set up the base page */
+	reg = ADVERTISE_CSMA;
+	if (efx->link_advertising & ADVERTISED_10baseT_Half)
+		reg |= ADVERTISE_10HALF;
+	if (efx->link_advertising & ADVERTISED_10baseT_Full)
+		reg |= ADVERTISE_10FULL;
+	if (efx->link_advertising & ADVERTISED_100baseT_Half)
+		reg |= ADVERTISE_100HALF;
+	if (efx->link_advertising & ADVERTISED_100baseT_Full)
+		reg |= ADVERTISE_100FULL;
+	if (xnp)
+		reg |= ADVERTISE_RESV;
+	else if (efx->link_advertising & (ADVERTISED_1000baseT_Half |
+					  ADVERTISED_1000baseT_Full))
+		reg |= ADVERTISE_NPAGE;
+	if (efx->link_advertising & ADVERTISED_Pause)
+		reg |= ADVERTISE_PAUSE_CAP;
+	if (efx->link_advertising & ADVERTISED_Asym_Pause)
+		reg |= ADVERTISE_PAUSE_ASYM;
+	efx_mdio_write(efx, MDIO_MMD_AN, MDIO_AN_ADVERTISE, reg);
+
+	/* Set up the (extended) next page if necessary */
+	if (efx->phy_op->set_npage_adv)
+		efx->phy_op->set_npage_adv(efx, efx->link_advertising);
+
+	/* Enable and restart AN */
+	reg = efx_mdio_read(efx, MDIO_MMD_AN, MDIO_CTRL1);
+	reg |= MDIO_AN_CTRL1_ENABLE;
+	if (!(EFX_WORKAROUND_15195(efx) && LOOPBACK_EXTERNAL(efx)))
+		reg |= MDIO_AN_CTRL1_RESTART;
+	if (xnp)
+		reg |= MDIO_AN_CTRL1_XNP;
+	else
+		reg &= ~MDIO_AN_CTRL1_XNP;
+	efx_mdio_write(efx, MDIO_MMD_AN, MDIO_CTRL1, reg);
+}
+
 enum efx_fc_type efx_mdio_get_pause(struct efx_nic *efx)
 {
-	int lpa;
+	BUILD_BUG_ON(EFX_FC_AUTO & (EFX_FC_RX | EFX_FC_TX));
 
-	if (!(efx->phy_op->mmds & MDIO_DEVS_AN))
+	if (!(efx->wanted_fc & EFX_FC_AUTO))
 		return efx->wanted_fc;
-	lpa = efx_mdio_read(efx, MDIO_MMD_AN, MDIO_AN_LPA);
-	return efx_fc_resolve(efx->wanted_fc, lpa);
+
+	WARN_ON(!(efx->mdio.mmds & MDIO_DEVS_AN));
+
+	return mii_resolve_flowctrl_fdx(
+		mii_advertise_flowctrl(efx->wanted_fc),
+		efx_mdio_read(efx, MDIO_MMD_AN, MDIO_AN_LPA));
 }
--- linux-mvl-dove-2.6.32.orig/drivers/net/sfc/falcon_gmac.c
+++ linux-mvl-dove-2.6.32/drivers/net/sfc/falcon_gmac.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * Driver for Solarflare Solarstorm network controllers and boards
  * Copyright 2005-2006 Fen Systems Ltd.
- * Copyright 2006-2008 Solarflare Communications Inc.
+ * Copyright 2006-2009 Solarflare Communications Inc.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of the GNU General Public License version 2 as published
@@ -11,11 +11,10 @@
 #include <linux/delay.h>
 #include "net_driver.h"
 #include "efx.h"
-#include "falcon.h"
+#include "nic.h"
 #include "mac.h"
-#include "falcon_hwdefs.h"
-#include "falcon_io.h"
-#include "gmii.h"
+#include "regs.h"
+#include "io.h"
 
 /**************************************************************************
  *
@@ -23,106 +22,109 @@
  *
  *************************************************************************/
 
-static void falcon_reconfigure_gmac(struct efx_nic *efx)
+static int falcon_reconfigure_gmac(struct efx_nic *efx)
 {
+	struct efx_link_state *link_state = &efx->link_state;
 	bool loopback, tx_fc, rx_fc, bytemode;
 	int if_mode;
 	unsigned int max_frame_len;
 	efx_oword_t reg;
 
 	/* Configuration register 1 */
-	tx_fc = (efx->link_fc & EFX_FC_TX) || !efx->link_fd;
-	rx_fc = !!(efx->link_fc & EFX_FC_RX);
+	tx_fc = (link_state->fc & EFX_FC_TX) || !link_state->fd;
+	rx_fc = !!(link_state->fc & EFX_FC_RX);
 	loopback = (efx->loopback_mode == LOOPBACK_GMAC);
-	bytemode = (efx->link_speed == 1000);
+	bytemode = (link_state->speed == 1000);
 
 	EFX_POPULATE_OWORD_5(reg,
-			     GM_LOOP, loopback,
-			     GM_TX_EN, 1,
-			     GM_TX_FC_EN, tx_fc,
-			     GM_RX_EN, 1,
-			     GM_RX_FC_EN, rx_fc);
-	falcon_write(efx, &reg, GM_CFG1_REG);
+			     FRF_AB_GM_LOOP, loopback,
+			     FRF_AB_GM_TX_EN, 1,
+			     FRF_AB_GM_TX_FC_EN, tx_fc,
+			     FRF_AB_GM_RX_EN, 1,
+			     FRF_AB_GM_RX_FC_EN, rx_fc);
+	efx_writeo(efx, &reg, FR_AB_GM_CFG1);
 	udelay(10);
 
 	/* Configuration register 2 */
 	if_mode = (bytemode) ? 2 : 1;
 	EFX_POPULATE_OWORD_5(reg,
-			     GM_IF_MODE, if_mode,
-			     GM_PAD_CRC_EN, 1,
-			     GM_LEN_CHK, 1,
-			     GM_FD, efx->link_fd,
-			     GM_PAMBL_LEN, 0x7/*datasheet recommended */);
+			     FRF_AB_GM_IF_MODE, if_mode,
+			     FRF_AB_GM_PAD_CRC_EN, 1,
+			     FRF_AB_GM_LEN_CHK, 1,
+			     FRF_AB_GM_FD, link_state->fd,
+			     FRF_AB_GM_PAMBL_LEN, 0x7/*datasheet recommended */);
 
-	falcon_write(efx, &reg, GM_CFG2_REG);
+	efx_writeo(efx, &reg, FR_AB_GM_CFG2);
 	udelay(10);
 
 	/* Max frame len register */
 	max_frame_len = EFX_MAX_FRAME_LEN(efx->net_dev->mtu);
-	EFX_POPULATE_OWORD_1(reg, GM_MAX_FLEN, max_frame_len);
-	falcon_write(efx, &reg, GM_MAX_FLEN_REG);
+	EFX_POPULATE_OWORD_1(reg, FRF_AB_GM_MAX_FLEN, max_frame_len);
+	efx_writeo(efx, &reg, FR_AB_GM_MAX_FLEN);
 	udelay(10);
 
 	/* FIFO configuration register 0 */
 	EFX_POPULATE_OWORD_5(reg,
-			     GMF_FTFENREQ, 1,
-			     GMF_STFENREQ, 1,
-			     GMF_FRFENREQ, 1,
-			     GMF_SRFENREQ, 1,
-			     GMF_WTMENREQ, 1);
-	falcon_write(efx, &reg, GMF_CFG0_REG);
+			     FRF_AB_GMF_FTFENREQ, 1,
+			     FRF_AB_GMF_STFENREQ, 1,
+			     FRF_AB_GMF_FRFENREQ, 1,
+			     FRF_AB_GMF_SRFENREQ, 1,
+			     FRF_AB_GMF_WTMENREQ, 1);
+	efx_writeo(efx, &reg, FR_AB_GMF_CFG0);
 	udelay(10);
 
 	/* FIFO configuration register 1 */
 	EFX_POPULATE_OWORD_2(reg,
-			     GMF_CFGFRTH, 0x12,
-			     GMF_CFGXOFFRTX, 0xffff);
-	falcon_write(efx, &reg, GMF_CFG1_REG);
+			     FRF_AB_GMF_CFGFRTH, 0x12,
+			     FRF_AB_GMF_CFGXOFFRTX, 0xffff);
+	efx_writeo(efx, &reg, FR_AB_GMF_CFG1);
 	udelay(10);
 
 	/* FIFO configuration register 2 */
 	EFX_POPULATE_OWORD_2(reg,
-			     GMF_CFGHWM, 0x3f,
-			     GMF_CFGLWM, 0xa);
-	falcon_write(efx, &reg, GMF_CFG2_REG);
+			     FRF_AB_GMF_CFGHWM, 0x3f,
+			     FRF_AB_GMF_CFGLWM, 0xa);
+	efx_writeo(efx, &reg, FR_AB_GMF_CFG2);
 	udelay(10);
 
 	/* FIFO configuration register 3 */
 	EFX_POPULATE_OWORD_2(reg,
-			     GMF_CFGHWMFT, 0x1c,
-			     GMF_CFGFTTH, 0x08);
-	falcon_write(efx, &reg, GMF_CFG3_REG);
+			     FRF_AB_GMF_CFGHWMFT, 0x1c,
+			     FRF_AB_GMF_CFGFTTH, 0x08);
+	efx_writeo(efx, &reg, FR_AB_GMF_CFG3);
 	udelay(10);
 
 	/* FIFO configuration register 4 */
-	EFX_POPULATE_OWORD_1(reg, GMF_HSTFLTRFRM_PAUSE, 1);
-	falcon_write(efx, &reg, GMF_CFG4_REG);
+	EFX_POPULATE_OWORD_1(reg, FRF_AB_GMF_HSTFLTRFRM_PAUSE, 1);
+	efx_writeo(efx, &reg, FR_AB_GMF_CFG4);
 	udelay(10);
 
 	/* FIFO configuration register 5 */
-	falcon_read(efx, &reg, GMF_CFG5_REG);
-	EFX_SET_OWORD_FIELD(reg, GMF_CFGBYTMODE, bytemode);
-	EFX_SET_OWORD_FIELD(reg, GMF_CFGHDPLX, !efx->link_fd);
-	EFX_SET_OWORD_FIELD(reg, GMF_HSTDRPLT64, !efx->link_fd);
-	EFX_SET_OWORD_FIELD(reg, GMF_HSTFLTRFRMDC_PAUSE, 0);
-	falcon_write(efx, &reg, GMF_CFG5_REG);
+	efx_reado(efx, &reg, FR_AB_GMF_CFG5);
+	EFX_SET_OWORD_FIELD(reg, FRF_AB_GMF_CFGBYTMODE, bytemode);
+	EFX_SET_OWORD_FIELD(reg, FRF_AB_GMF_CFGHDPLX, !link_state->fd);
+	EFX_SET_OWORD_FIELD(reg, FRF_AB_GMF_HSTDRPLT64, !link_state->fd);
+	EFX_SET_OWORD_FIELD(reg, FRF_AB_GMF_HSTFLTRFRMDC_PAUSE, 0);
+	efx_writeo(efx, &reg, FR_AB_GMF_CFG5);
 	udelay(10);
 
 	/* MAC address */
 	EFX_POPULATE_OWORD_4(reg,
-			     GM_HWADDR_5, efx->net_dev->dev_addr[5],
-			     GM_HWADDR_4, efx->net_dev->dev_addr[4],
-			     GM_HWADDR_3, efx->net_dev->dev_addr[3],
-			     GM_HWADDR_2, efx->net_dev->dev_addr[2]);
-	falcon_write(efx, &reg, GM_ADR1_REG);
+			     FRF_AB_GM_ADR_B0, efx->net_dev->dev_addr[5],
+			     FRF_AB_GM_ADR_B1, efx->net_dev->dev_addr[4],
+			     FRF_AB_GM_ADR_B2, efx->net_dev->dev_addr[3],
+			     FRF_AB_GM_ADR_B3, efx->net_dev->dev_addr[2]);
+	efx_writeo(efx, &reg, FR_AB_GM_ADR1);
 	udelay(10);
 	EFX_POPULATE_OWORD_2(reg,
-			     GM_HWADDR_1, efx->net_dev->dev_addr[1],
-			     GM_HWADDR_0, efx->net_dev->dev_addr[0]);
-	falcon_write(efx, &reg, GM_ADR2_REG);
+			     FRF_AB_GM_ADR_B4, efx->net_dev->dev_addr[1],
+			     FRF_AB_GM_ADR_B5, efx->net_dev->dev_addr[0]);
+	efx_writeo(efx, &reg, FR_AB_GM_ADR2);
 	udelay(10);
 
 	falcon_reconfigure_mac_wrapper(efx);
+
+	return 0;
 }
 
 static void falcon_update_stats_gmac(struct efx_nic *efx)
@@ -130,11 +132,6 @@
 	struct efx_mac_stats *mac_stats = &efx->mac_stats;
 	unsigned long old_rx_pause, old_tx_pause;
 	unsigned long new_rx_pause, new_tx_pause;
-	int rc;
-
-	rc = falcon_dma_stats(efx, GDmaDone_offset);
-	if (rc)
-		return;
 
 	/* Pause frames are erroneously counted as errors (SFC bug 3269) */
 	old_rx_pause = mac_stats->rx_pause;
@@ -221,9 +218,13 @@
 	mac_stats->rx_lt64 = mac_stats->rx_good_lt64 + mac_stats->rx_bad_lt64;
 }
 
+static bool falcon_gmac_check_fault(struct efx_nic *efx)
+{
+	return false;
+}
+
 struct efx_mac_operations falcon_gmac_operations = {
 	.reconfigure	= falcon_reconfigure_gmac,
 	.update_stats	= falcon_update_stats_gmac,
-	.irq		= efx_port_dummy_op_void,
-	.poll		= efx_port_dummy_op_void,
+	.check_fault 	= falcon_gmac_check_fault,
 };
--- linux-mvl-dove-2.6.32.orig/drivers/net/sfc/falcon_xmac.c
+++ linux-mvl-dove-2.6.32/drivers/net/sfc/falcon_xmac.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * Driver for Solarflare Solarstorm network controllers and boards
  * Copyright 2005-2006 Fen Systems Ltd.
- * Copyright 2006-2008 Solarflare Communications Inc.
+ * Copyright 2006-2009 Solarflare Communications Inc.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of the GNU General Public License version 2 as published
@@ -11,13 +11,12 @@
 #include <linux/delay.h>
 #include "net_driver.h"
 #include "efx.h"
-#include "falcon.h"
-#include "falcon_hwdefs.h"
-#include "falcon_io.h"
+#include "nic.h"
+#include "regs.h"
+#include "io.h"
 #include "mac.h"
 #include "mdio_10g.h"
 #include "phy.h"
-#include "boards.h"
 #include "workarounds.h"
 
 /**************************************************************************
@@ -36,43 +35,47 @@
 	if (efx->phy_type == PHY_TYPE_NONE)
 		return;
 
-	falcon_read(efx, &sdctl, XX_SD_CTL_REG);
-	EFX_SET_OWORD_FIELD(sdctl, XX_HIDRVD, XX_SD_CTL_DRV_DEFAULT);
-	EFX_SET_OWORD_FIELD(sdctl, XX_LODRVD, XX_SD_CTL_DRV_DEFAULT);
-	EFX_SET_OWORD_FIELD(sdctl, XX_HIDRVC, XX_SD_CTL_DRV_DEFAULT);
-	EFX_SET_OWORD_FIELD(sdctl, XX_LODRVC, XX_SD_CTL_DRV_DEFAULT);
-	EFX_SET_OWORD_FIELD(sdctl, XX_HIDRVB, XX_SD_CTL_DRV_DEFAULT);
-	EFX_SET_OWORD_FIELD(sdctl, XX_LODRVB, XX_SD_CTL_DRV_DEFAULT);
-	EFX_SET_OWORD_FIELD(sdctl, XX_HIDRVA, XX_SD_CTL_DRV_DEFAULT);
-	EFX_SET_OWORD_FIELD(sdctl, XX_LODRVA, XX_SD_CTL_DRV_DEFAULT);
-	falcon_write(efx, &sdctl, XX_SD_CTL_REG);
+	efx_reado(efx, &sdctl, FR_AB_XX_SD_CTL);
+	EFX_SET_OWORD_FIELD(sdctl, FRF_AB_XX_HIDRVD, FFE_AB_XX_SD_CTL_DRV_DEF);
+	EFX_SET_OWORD_FIELD(sdctl, FRF_AB_XX_LODRVD, FFE_AB_XX_SD_CTL_DRV_DEF);
+	EFX_SET_OWORD_FIELD(sdctl, FRF_AB_XX_HIDRVC, FFE_AB_XX_SD_CTL_DRV_DEF);
+	EFX_SET_OWORD_FIELD(sdctl, FRF_AB_XX_LODRVC, FFE_AB_XX_SD_CTL_DRV_DEF);
+	EFX_SET_OWORD_FIELD(sdctl, FRF_AB_XX_HIDRVB, FFE_AB_XX_SD_CTL_DRV_DEF);
+	EFX_SET_OWORD_FIELD(sdctl, FRF_AB_XX_LODRVB, FFE_AB_XX_SD_CTL_DRV_DEF);
+	EFX_SET_OWORD_FIELD(sdctl, FRF_AB_XX_HIDRVA, FFE_AB_XX_SD_CTL_DRV_DEF);
+	EFX_SET_OWORD_FIELD(sdctl, FRF_AB_XX_LODRVA, FFE_AB_XX_SD_CTL_DRV_DEF);
+	efx_writeo(efx, &sdctl, FR_AB_XX_SD_CTL);
 
 	EFX_POPULATE_OWORD_8(txdrv,
-			     XX_DEQD, XX_TXDRV_DEQ_DEFAULT,
-			     XX_DEQC, XX_TXDRV_DEQ_DEFAULT,
-			     XX_DEQB, XX_TXDRV_DEQ_DEFAULT,
-			     XX_DEQA, XX_TXDRV_DEQ_DEFAULT,
-			     XX_DTXD, XX_TXDRV_DTX_DEFAULT,
-			     XX_DTXC, XX_TXDRV_DTX_DEFAULT,
-			     XX_DTXB, XX_TXDRV_DTX_DEFAULT,
-			     XX_DTXA, XX_TXDRV_DTX_DEFAULT);
-	falcon_write(efx, &txdrv, XX_TXDRV_CTL_REG);
+			     FRF_AB_XX_DEQD, FFE_AB_XX_TXDRV_DEQ_DEF,
+			     FRF_AB_XX_DEQC, FFE_AB_XX_TXDRV_DEQ_DEF,
+			     FRF_AB_XX_DEQB, FFE_AB_XX_TXDRV_DEQ_DEF,
+			     FRF_AB_XX_DEQA, FFE_AB_XX_TXDRV_DEQ_DEF,
+			     FRF_AB_XX_DTXD, FFE_AB_XX_TXDRV_DTX_DEF,
+			     FRF_AB_XX_DTXC, FFE_AB_XX_TXDRV_DTX_DEF,
+			     FRF_AB_XX_DTXB, FFE_AB_XX_TXDRV_DTX_DEF,
+			     FRF_AB_XX_DTXA, FFE_AB_XX_TXDRV_DTX_DEF);
+	efx_writeo(efx, &txdrv, FR_AB_XX_TXDRV_CTL);
 }
 
 int falcon_reset_xaui(struct efx_nic *efx)
 {
+	struct falcon_nic_data *nic_data = efx->nic_data;
 	efx_oword_t reg;
 	int count;
 
+	/* Don't fetch MAC statistics over an XMAC reset */
+	WARN_ON(nic_data->stats_disable_count == 0);
+
 	/* Start reset sequence */
-	EFX_POPULATE_DWORD_1(reg, XX_RST_XX_EN, 1);
-	falcon_write(efx, &reg, XX_PWR_RST_REG);
+	EFX_POPULATE_OWORD_1(reg, FRF_AB_XX_RST_XX_EN, 1);
+	efx_writeo(efx, &reg, FR_AB_XX_PWR_RST);
 
 	/* Wait up to 10 ms for completion, then reinitialise */
 	for (count = 0; count < 1000; count++) {
-		falcon_read(efx, &reg, XX_PWR_RST_REG);
-		if (EFX_OWORD_FIELD(reg, XX_RST_XX_EN) == 0 &&
-		    EFX_OWORD_FIELD(reg, XX_SD_RST_ACT) == 0) {
+		efx_reado(efx, &reg, FR_AB_XX_PWR_RST);
+		if (EFX_OWORD_FIELD(reg, FRF_AB_XX_RST_XX_EN) == 0 &&
+		    EFX_OWORD_FIELD(reg, FRF_AB_XX_SD_RST_ACT) == 0) {
 			falcon_setup_xaui(efx);
 			return 0;
 		}
@@ -86,117 +89,118 @@
 {
 	efx_oword_t reg;
 
-	if ((falcon_rev(efx) != FALCON_REV_B0) || LOOPBACK_INTERNAL(efx))
+	if ((efx_nic_rev(efx) != EFX_REV_FALCON_B0) || LOOPBACK_INTERNAL(efx))
 		return;
 
 	/* We expect xgmii faults if the wireside link is up */
-	if (!EFX_WORKAROUND_5147(efx) || !efx->link_up)
+	if (!EFX_WORKAROUND_5147(efx) || !efx->link_state.up)
 		return;
 
 	/* We can only use this interrupt to signal the negative edge of
 	 * xaui_align [we have to poll the positive edge]. */
-	if (!efx->mac_up)
+	if (efx->xmac_poll_required)
 		return;
 
 	/* Flush the ISR */
 	if (enable)
-		falcon_read(efx, &reg, XM_MGT_INT_REG_B0);
+		efx_reado(efx, &reg, FR_AB_XM_MGT_INT_MSK);
 
 	EFX_POPULATE_OWORD_2(reg,
-			     XM_MSK_RMTFLT, !enable,
-			     XM_MSK_LCLFLT, !enable);
-	falcon_write(efx, &reg, XM_MGT_INT_MSK_REG_B0);
+			     FRF_AB_XM_MSK_RMTFLT, !enable,
+			     FRF_AB_XM_MSK_LCLFLT, !enable);
+	efx_writeo(efx, &reg, FR_AB_XM_MGT_INT_MASK);
 }
 
-/* Get status of XAUI link */
-bool falcon_xaui_link_ok(struct efx_nic *efx)
+static bool falcon_xgxs_link_ok(struct efx_nic *efx)
 {
 	efx_oword_t reg;
 	bool align_done, link_ok = false;
 	int sync_status;
 
-	if (LOOPBACK_INTERNAL(efx))
-		return true;
-
 	/* Read link status */
-	falcon_read(efx, &reg, XX_CORE_STAT_REG);
+	efx_reado(efx, &reg, FR_AB_XX_CORE_STAT);
 
-	align_done = EFX_OWORD_FIELD(reg, XX_ALIGN_DONE);
-	sync_status = EFX_OWORD_FIELD(reg, XX_SYNC_STAT);
-	if (align_done && (sync_status == XX_SYNC_STAT_DECODE_SYNCED))
+	align_done = EFX_OWORD_FIELD(reg, FRF_AB_XX_ALIGN_DONE);
+	sync_status = EFX_OWORD_FIELD(reg, FRF_AB_XX_SYNC_STAT);
+	if (align_done && (sync_status == FFE_AB_XX_STAT_ALL_LANES))
 		link_ok = true;
 
 	/* Clear link status ready for next read */
-	EFX_SET_OWORD_FIELD(reg, XX_COMMA_DET, XX_COMMA_DET_RESET);
-	EFX_SET_OWORD_FIELD(reg, XX_CHARERR, XX_CHARERR_RESET);
-	EFX_SET_OWORD_FIELD(reg, XX_DISPERR, XX_DISPERR_RESET);
-	falcon_write(efx, &reg, XX_CORE_STAT_REG);
-
-	/* If the link is up, then check the phy side of the xaui link */
-	if (efx->link_up && link_ok)
-		if (efx->phy_op->mmds & (1 << MDIO_MMD_PHYXS))
-			link_ok = efx_mdio_phyxgxs_lane_sync(efx);
+	EFX_SET_OWORD_FIELD(reg, FRF_AB_XX_COMMA_DET, FFE_AB_XX_STAT_ALL_LANES);
+	EFX_SET_OWORD_FIELD(reg, FRF_AB_XX_CHAR_ERR, FFE_AB_XX_STAT_ALL_LANES);
+	EFX_SET_OWORD_FIELD(reg, FRF_AB_XX_DISPERR, FFE_AB_XX_STAT_ALL_LANES);
+	efx_writeo(efx, &reg, FR_AB_XX_CORE_STAT);
 
 	return link_ok;
 }
 
-static void falcon_reconfigure_xmac_core(struct efx_nic *efx)
+static bool falcon_xmac_link_ok(struct efx_nic *efx)
+{
+	/*
+	 * Check MAC's XGXS link status except when using XGMII loopback
+	 * which bypasses the XGXS block.
+	 * If possible, check PHY's XGXS link status except when using
+	 * MAC loopback.
+	 */
+	return (efx->loopback_mode == LOOPBACK_XGMII ||
+		falcon_xgxs_link_ok(efx)) &&
+		(!(efx->mdio.mmds & (1 << MDIO_MMD_PHYXS)) ||
+		 LOOPBACK_INTERNAL(efx) || 
+		 efx_mdio_phyxgxs_lane_sync(efx));
+}
+
+void falcon_reconfigure_xmac_core(struct efx_nic *efx)
 {
 	unsigned int max_frame_len;
 	efx_oword_t reg;
-	bool rx_fc = !!(efx->link_fc & EFX_FC_RX);
+	bool rx_fc = !!(efx->link_state.fc & EFX_FC_RX);
+	bool tx_fc = !!(efx->link_state.fc & EFX_FC_TX);
 
 	/* Configure MAC  - cut-thru mode is hard wired on */
-	EFX_POPULATE_DWORD_3(reg,
-			     XM_RX_JUMBO_MODE, 1,
-			     XM_TX_STAT_EN, 1,
-			     XM_RX_STAT_EN, 1);
-	falcon_write(efx, &reg, XM_GLB_CFG_REG);
+	EFX_POPULATE_OWORD_3(reg,
+			     FRF_AB_XM_RX_JUMBO_MODE, 1,
+			     FRF_AB_XM_TX_STAT_EN, 1,
+			     FRF_AB_XM_RX_STAT_EN, 1);
+	efx_writeo(efx, &reg, FR_AB_XM_GLB_CFG);
 
 	/* Configure TX */
-	EFX_POPULATE_DWORD_6(reg,
-			     XM_TXEN, 1,
-			     XM_TX_PRMBL, 1,
-			     XM_AUTO_PAD, 1,
-			     XM_TXCRC, 1,
-			     XM_FCNTL, 1,
-			     XM_IPG, 0x3);
-	falcon_write(efx, &reg, XM_TX_CFG_REG);
+	EFX_POPULATE_OWORD_6(reg,
+			     FRF_AB_XM_TXEN, 1,
+			     FRF_AB_XM_TX_PRMBL, 1,
+			     FRF_AB_XM_AUTO_PAD, 1,
+			     FRF_AB_XM_TXCRC, 1,
+			     FRF_AB_XM_FCNTL, tx_fc,
+			     FRF_AB_XM_IPG, 0x3);
+	efx_writeo(efx, &reg, FR_AB_XM_TX_CFG);
 
 	/* Configure RX */
-	EFX_POPULATE_DWORD_5(reg,
-			     XM_RXEN, 1,
-			     XM_AUTO_DEPAD, 0,
-			     XM_ACPT_ALL_MCAST, 1,
-			     XM_ACPT_ALL_UCAST, efx->promiscuous,
-			     XM_PASS_CRC_ERR, 1);
-	falcon_write(efx, &reg, XM_RX_CFG_REG);
+	EFX_POPULATE_OWORD_5(reg,
+			     FRF_AB_XM_RXEN, 1,
+			     FRF_AB_XM_AUTO_DEPAD, 0,
+			     FRF_AB_XM_ACPT_ALL_MCAST, 1,
+			     FRF_AB_XM_ACPT_ALL_UCAST, efx->promiscuous,
+			     FRF_AB_XM_PASS_CRC_ERR, 1);
+	efx_writeo(efx, &reg, FR_AB_XM_RX_CFG);
 
 	/* Set frame length */
 	max_frame_len = EFX_MAX_FRAME_LEN(efx->net_dev->mtu);
-	EFX_POPULATE_DWORD_1(reg, XM_MAX_RX_FRM_SIZE, max_frame_len);
-	falcon_write(efx, &reg, XM_RX_PARAM_REG);
-	EFX_POPULATE_DWORD_2(reg,
-			     XM_MAX_TX_FRM_SIZE, max_frame_len,
-			     XM_TX_JUMBO_MODE, 1);
-	falcon_write(efx, &reg, XM_TX_PARAM_REG);
-
-	EFX_POPULATE_DWORD_2(reg,
-			     XM_PAUSE_TIME, 0xfffe, /* MAX PAUSE TIME */
-			     XM_DIS_FCNTL, !rx_fc);
-	falcon_write(efx, &reg, XM_FC_REG);
+	EFX_POPULATE_OWORD_1(reg, FRF_AB_XM_MAX_RX_FRM_SIZE, max_frame_len);
+	efx_writeo(efx, &reg, FR_AB_XM_RX_PARAM);
+	EFX_POPULATE_OWORD_2(reg,
+			     FRF_AB_XM_MAX_TX_FRM_SIZE, max_frame_len,
+			     FRF_AB_XM_TX_JUMBO_MODE, 1);
+	efx_writeo(efx, &reg, FR_AB_XM_TX_PARAM);
+
+	EFX_POPULATE_OWORD_2(reg,
+			     FRF_AB_XM_PAUSE_TIME, 0xfffe, /* MAX PAUSE TIME */
+			     FRF_AB_XM_DIS_FCNTL, !rx_fc);
+	efx_writeo(efx, &reg, FR_AB_XM_FC);
 
 	/* Set MAC address */
-	EFX_POPULATE_DWORD_4(reg,
-			     XM_ADR_0, efx->net_dev->dev_addr[0],
-			     XM_ADR_1, efx->net_dev->dev_addr[1],
-			     XM_ADR_2, efx->net_dev->dev_addr[2],
-			     XM_ADR_3, efx->net_dev->dev_addr[3]);
-	falcon_write(efx, &reg, XM_ADR_LO_REG);
-	EFX_POPULATE_DWORD_2(reg,
-			     XM_ADR_4, efx->net_dev->dev_addr[4],
-			     XM_ADR_5, efx->net_dev->dev_addr[5]);
-	falcon_write(efx, &reg, XM_ADR_HI_REG);
+	memcpy(&reg, &efx->net_dev->dev_addr[0], 4);
+	efx_writeo(efx, &reg, FR_AB_XM_ADR_LO);
+	memcpy(&reg, &efx->net_dev->dev_addr[4], 2);
+	efx_writeo(efx, &reg, FR_AB_XM_ADR_HI);
 }
 
 static void falcon_reconfigure_xgxs_core(struct efx_nic *efx)
@@ -212,12 +216,13 @@
 		bool old_xgmii_loopback, old_xgxs_loopback, old_xaui_loopback;
 		bool reset_xgxs;
 
-		falcon_read(efx, &reg, XX_CORE_STAT_REG);
-		old_xgxs_loopback = EFX_OWORD_FIELD(reg, XX_XGXS_LB_EN);
-		old_xgmii_loopback = EFX_OWORD_FIELD(reg, XX_XGMII_LB_EN);
+		efx_reado(efx, &reg, FR_AB_XX_CORE_STAT);
+		old_xgxs_loopback = EFX_OWORD_FIELD(reg, FRF_AB_XX_XGXS_LB_EN);
+		old_xgmii_loopback =
+			EFX_OWORD_FIELD(reg, FRF_AB_XX_XGMII_LB_EN);
 
-		falcon_read(efx, &reg, XX_SD_CTL_REG);
-		old_xaui_loopback = EFX_OWORD_FIELD(reg, XX_LPBKA);
+		efx_reado(efx, &reg, FR_AB_XX_SD_CTL);
+		old_xaui_loopback = EFX_OWORD_FIELD(reg, FRF_AB_XX_LPBKA);
 
 		/* The PHY driver may have turned XAUI off */
 		reset_xgxs = ((xgxs_loopback != old_xgxs_loopback) ||
@@ -228,45 +233,55 @@
 			falcon_reset_xaui(efx);
 	}
 
-	falcon_read(efx, &reg, XX_CORE_STAT_REG);
-	EFX_SET_OWORD_FIELD(reg, XX_FORCE_SIG,
+	efx_reado(efx, &reg, FR_AB_XX_CORE_STAT);
+	EFX_SET_OWORD_FIELD(reg, FRF_AB_XX_FORCE_SIG,
 			    (xgxs_loopback || xaui_loopback) ?
-			    XX_FORCE_SIG_DECODE_FORCED : 0);
-	EFX_SET_OWORD_FIELD(reg, XX_XGXS_LB_EN, xgxs_loopback);
-	EFX_SET_OWORD_FIELD(reg, XX_XGMII_LB_EN, xgmii_loopback);
-	falcon_write(efx, &reg, XX_CORE_STAT_REG);
+			    FFE_AB_XX_FORCE_SIG_ALL_LANES : 0);
+	EFX_SET_OWORD_FIELD(reg, FRF_AB_XX_XGXS_LB_EN, xgxs_loopback);
+	EFX_SET_OWORD_FIELD(reg, FRF_AB_XX_XGMII_LB_EN, xgmii_loopback);
+	efx_writeo(efx, &reg, FR_AB_XX_CORE_STAT);
 
-	falcon_read(efx, &reg, XX_SD_CTL_REG);
-	EFX_SET_OWORD_FIELD(reg, XX_LPBKD, xaui_loopback);
-	EFX_SET_OWORD_FIELD(reg, XX_LPBKC, xaui_loopback);
-	EFX_SET_OWORD_FIELD(reg, XX_LPBKB, xaui_loopback);
-	EFX_SET_OWORD_FIELD(reg, XX_LPBKA, xaui_loopback);
-	falcon_write(efx, &reg, XX_SD_CTL_REG);
+	efx_reado(efx, &reg, FR_AB_XX_SD_CTL);
+	EFX_SET_OWORD_FIELD(reg, FRF_AB_XX_LPBKD, xaui_loopback);
+	EFX_SET_OWORD_FIELD(reg, FRF_AB_XX_LPBKC, xaui_loopback);
+	EFX_SET_OWORD_FIELD(reg, FRF_AB_XX_LPBKB, xaui_loopback);
+	EFX_SET_OWORD_FIELD(reg, FRF_AB_XX_LPBKA, xaui_loopback);
+	efx_writeo(efx, &reg, FR_AB_XX_SD_CTL);
 }
 
 
-/* Try and bring the Falcon side of the Falcon-Phy XAUI link fails
- * to come back up. Bash it until it comes back up */
-static void falcon_check_xaui_link_up(struct efx_nic *efx, int tries)
+/* Try to bring up the Falcon side of the Falcon-Phy XAUI link */
+static bool falcon_xmac_link_ok_retry(struct efx_nic *efx, int tries)
 {
-	efx->mac_up = falcon_xaui_link_ok(efx);
+	bool mac_up = falcon_xmac_link_ok(efx);
 
-	if ((efx->loopback_mode == LOOPBACK_NETWORK) ||
+	if (LOOPBACK_MASK(efx) & LOOPBACKS_EXTERNAL(efx) & LOOPBACKS_WS ||
 	    efx_phy_mode_disabled(efx->phy_mode))
 		/* XAUI link is expected to be down */
-		return;
+		return mac_up;
+
+	falcon_stop_nic_stats(efx);
 
-	while (!efx->mac_up && tries) {
+	while (!mac_up && tries) {
 		EFX_LOG(efx, "bashing xaui\n");
 		falcon_reset_xaui(efx);
 		udelay(200);
 
-		efx->mac_up = falcon_xaui_link_ok(efx);
+		mac_up = falcon_xmac_link_ok(efx);
 		--tries;
 	}
+
+	falcon_start_nic_stats(efx);
+
+	return mac_up;
+}
+
+static bool falcon_xmac_check_fault(struct efx_nic *efx)
+{
+	return !falcon_xmac_link_ok_retry(efx, 5);
 }
 
-static void falcon_reconfigure_xmac(struct efx_nic *efx)
+static int falcon_reconfigure_xmac(struct efx_nic *efx)
 {
 	falcon_mask_status_intr(efx, false);
 
@@ -275,18 +290,15 @@
 
 	falcon_reconfigure_mac_wrapper(efx);
 
-	falcon_check_xaui_link_up(efx, 5);
+	efx->xmac_poll_required = !falcon_xmac_link_ok_retry(efx, 5);
 	falcon_mask_status_intr(efx, true);
+
+	return 0;
 }
 
 static void falcon_update_stats_xmac(struct efx_nic *efx)
 {
 	struct efx_mac_stats *mac_stats = &efx->mac_stats;
-	int rc;
-
-	rc = falcon_dma_stats(efx, XgDmaDone_offset);
-	if (rc)
-		return;
 
 	/* Update MAC stats from DMAed values */
 	FALCON_STAT(efx, XgRxOctets, rx_bytes);
@@ -344,35 +356,19 @@
 		 mac_stats->rx_control * 64);
 }
 
-static void falcon_xmac_irq(struct efx_nic *efx)
-{
-	/* The XGMII link has a transient fault, which indicates either:
-	 *   - there's a transient xgmii fault
-	 *   - falcon's end of the xaui link may need a kick
-	 *   - the wire-side link may have gone down, but the lasi/poll()
-	 *     hasn't noticed yet.
-	 *
-	 * We only want to even bother polling XAUI if we're confident it's
-	 * not (1) or (3). In both cases, the only reliable way to spot this
-	 * is to wait a bit. We do this here by forcing the mac link state
-	 * to down, and waiting for the mac poll to come round and check
-	 */
-	efx->mac_up = false;
-}
-
-static void falcon_poll_xmac(struct efx_nic *efx)
+void falcon_poll_xmac(struct efx_nic *efx)
 {
-	if (!EFX_WORKAROUND_5147(efx) || !efx->link_up || efx->mac_up)
+	if (!EFX_WORKAROUND_5147(efx) || !efx->link_state.up ||
+	    !efx->xmac_poll_required)
 		return;
 
 	falcon_mask_status_intr(efx, false);
-	falcon_check_xaui_link_up(efx, 1);
+	efx->xmac_poll_required = !falcon_xmac_link_ok_retry(efx, 1);
 	falcon_mask_status_intr(efx, true);
 }
 
 struct efx_mac_operations falcon_xmac_operations = {
 	.reconfigure	= falcon_reconfigure_xmac,
 	.update_stats	= falcon_update_stats_xmac,
-	.irq		= falcon_xmac_irq,
-	.poll		= falcon_poll_xmac,
+	.check_fault	= falcon_xmac_check_fault,
 };
--- linux-mvl-dove-2.6.32.orig/drivers/net/sfc/selftest.c
+++ linux-mvl-dove-2.6.32/drivers/net/sfc/selftest.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * Driver for Solarflare Solarstorm network controllers and boards
  * Copyright 2005-2006 Fen Systems Ltd.
- * Copyright 2006-2008 Solarflare Communications Inc.
+ * Copyright 2006-2009 Solarflare Communications Inc.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of the GNU General Public License version 2 as published
@@ -20,14 +20,12 @@
 #include <linux/rtnetlink.h>
 #include <asm/io.h>
 #include "net_driver.h"
-#include "ethtool.h"
 #include "efx.h"
-#include "falcon.h"
+#include "nic.h"
 #include "selftest.h"
-#include "boards.h"
 #include "workarounds.h"
 #include "spi.h"
-#include "falcon_io.h"
+#include "io.h"
 #include "mdio_10g.h"
 
 /*
@@ -49,7 +47,7 @@
 	0x00, 0x0f, 0x53, 0x1b, 0x1b, 0x1b,
 };
 
-static const char *payload_msg =
+static const char payload_msg[] =
 	"Hello world! This is an Efx loopback test in progress!";
 
 /**
@@ -57,6 +55,7 @@
  * @flush:		Drop all packets in efx_loopback_rx_packet
  * @packet_count:	Number of packets being used in this test
  * @skbs:		An array of skbs transmitted
+ * @offload_csum:	Checksums are being offloaded
  * @rx_good:		RX good packet count
  * @rx_bad:		RX bad packet count
  * @payload:		Payload used in tests
@@ -65,10 +64,7 @@
 	bool flush;
 	int packet_count;
 	struct sk_buff **skbs;
-
-	/* Checksums are being offloaded */
 	bool offload_csum;
-
 	atomic_t rx_good;
 	atomic_t rx_bad;
 	struct efx_loopback_payload payload;
@@ -83,10 +79,14 @@
 static int efx_test_mdio(struct efx_nic *efx, struct efx_self_tests *tests)
 {
 	int rc = 0;
-	int devad = __ffs(efx->mdio.mmds);
+	int devad;
 	u16 physid1, physid2;
 
-	if (efx->phy_type == PHY_TYPE_NONE)
+	if (efx->mdio.mode_support & MDIO_SUPPORTS_C45)
+		devad = __ffs(efx->mdio.mmds);
+	else if (efx->mdio.mode_support & MDIO_SUPPORTS_C22)
+		devad = MDIO_DEVAD_NONE;
+	else
 		return 0;
 
 	mutex_lock(&efx->mac_lock);
@@ -104,7 +104,7 @@
 	}
 
 	if (EFX_IS10G(efx)) {
-		rc = efx_mdio_check_mmds(efx, efx->phy_op->mmds, 0);
+		rc = efx_mdio_check_mmds(efx, efx->mdio.mmds, 0);
 		if (rc)
 			goto out;
 	}
@@ -117,23 +117,26 @@
 
 static int efx_test_nvram(struct efx_nic *efx, struct efx_self_tests *tests)
 {
-	int rc;
+	int rc = 0;
+
+	if (efx->type->test_nvram) {
+		rc = efx->type->test_nvram(efx);
+		tests->nvram = rc ? -1 : 1;
+	}
 
-	rc = falcon_read_nvram(efx, NULL);
-	tests->nvram = rc ? -1 : 1;
 	return rc;
 }
 
 static int efx_test_chip(struct efx_nic *efx, struct efx_self_tests *tests)
 {
-	int rc;
+	int rc = 0;
 
-	/* Not supported on A-series silicon */
-	if (falcon_rev(efx) < FALCON_REV_B0)
-		return 0;
+	/* Test register access */
+	if (efx->type->test_registers) {
+		rc = efx->type->test_registers(efx);
+		tests->registers = rc ? -1 : 1;
+	}
 
-	rc = falcon_test_registers(efx);
-	tests->registers = rc ? -1 : 1;
 	return rc;
 }
 
@@ -165,7 +168,7 @@
 			goto success;
 	}
 
-	falcon_generate_interrupt(efx);
+	efx_nic_generate_interrupt(efx);
 
 	/* Wait for arrival of test interrupt. */
 	EFX_LOG(efx, "waiting for test interrupt\n");
@@ -177,8 +180,8 @@
 	return -ETIMEDOUT;
 
  success:
-	EFX_LOG(efx, "test interrupt (mode %d) seen on CPU%d\n",
-		efx->interrupt_mode, efx->last_irq_cpu);
+	EFX_LOG(efx, "%s test interrupt seen on CPU%d\n", INT_MODE(efx),
+		efx->last_irq_cpu);
 	tests->interrupt = 1;
 	return 0;
 }
@@ -203,7 +206,7 @@
 	channel->eventq_magic = 0;
 	smp_wmb();
 
-	falcon_generate_test_event(channel, magic);
+	efx_nic_generate_test_event(channel, magic);
 
 	/* Wait for arrival of interrupt */
 	count = 0;
@@ -254,9 +257,6 @@
 	if (!efx->phy_op->run_tests)
 		return 0;
 
-	EFX_BUG_ON_PARANOID(efx->phy_op->num_tests == 0 ||
-			    efx->phy_op->num_tests > EFX_MAX_PHY_TESTS);
-
 	mutex_lock(&efx->mac_lock);
 	rc = efx->phy_op->run_tests(efx, tests->phy, flags);
 	mutex_unlock(&efx->mac_lock);
@@ -426,7 +426,7 @@
 
 		if (efx_dev_registered(efx))
 			netif_tx_lock_bh(efx->net_dev);
-		rc = efx_xmit(efx, tx_queue, skb);
+		rc = efx_enqueue_skb(tx_queue, skb);
 		if (efx_dev_registered(efx))
 			netif_tx_unlock_bh(efx->net_dev);
 
@@ -439,7 +439,6 @@
 			kfree_skb(skb);
 			return -EPIPE;
 		}
-		efx->net_dev->trans_start = jiffies;
 	}
 
 	return 0;
@@ -527,7 +526,7 @@
 
 	for (i = 0; i < 3; i++) {
 		/* Determine how many packets to send */
-		state->packet_count = (efx->type->txd_ring_mask + 1) / 3;
+		state->packet_count = EFX_TXQ_SIZE / 3;
 		state->packet_count = min(1 << (i << 2), state->packet_count);
 		state->skbs = kzalloc(sizeof(state->skbs[0]) *
 				      state->packet_count, GFP_KERNEL);
@@ -568,14 +567,49 @@
 	return 0;
 }
 
+/* Wait for link up. On Falcon, we would prefer to rely on efx_monitor, but
+ * any contention on the mac lock (via e.g. efx_mac_mcast_work) causes it
+ * to delay and retry. Therefore, it's safer to just poll directly. Wait
+ * for link up and any faults to dissipate. */
+static int efx_wait_for_link(struct efx_nic *efx)
+{
+	struct efx_link_state *link_state = &efx->link_state;
+	int count;
+	bool link_up;
+
+	for (count = 0; count < 40; count++) {
+		schedule_timeout_uninterruptible(HZ / 10);
+
+		if (efx->type->monitor != NULL) {
+			mutex_lock(&efx->mac_lock);
+			efx->type->monitor(efx);
+			mutex_unlock(&efx->mac_lock);
+		} else {
+			struct efx_channel *channel = &efx->channel[0];
+			if (channel->work_pending)
+				efx_process_channel_now(channel);
+		}
+
+		mutex_lock(&efx->mac_lock);
+		link_up = link_state->up;
+		if (link_up)
+			link_up = !efx->mac_op->check_fault(efx);
+		mutex_unlock(&efx->mac_lock);
+
+		if (link_up)
+			return 0;
+	}
+
+	return -ETIMEDOUT;
+}
+
 static int efx_test_loopbacks(struct efx_nic *efx, struct efx_self_tests *tests,
 			      unsigned int loopback_modes)
 {
 	enum efx_loopback_mode mode;
 	struct efx_loopback_state *state;
 	struct efx_tx_queue *tx_queue;
-	bool link_up;
-	int count, rc = 0;
+	int rc = 0;
 
 	/* Set the port loopback_selftest member. From this point on
 	 * all received packets will be dropped. Mark the state as
@@ -594,46 +628,23 @@
 
 		/* Move the port into the specified loopback mode. */
 		state->flush = true;
+		mutex_lock(&efx->mac_lock);
 		efx->loopback_mode = mode;
-		efx_reconfigure_port(efx);
-
-		/* Wait for the PHY to signal the link is up. Interrupts
-		 * are enabled for PHY's using LASI, otherwise we poll()
-		 * quickly */
-		count = 0;
-		do {
-			struct efx_channel *channel = &efx->channel[0];
+		rc = __efx_reconfigure_port(efx);
+		mutex_unlock(&efx->mac_lock);
+		if (rc) {
+			EFX_ERR(efx, "unable to move into %s loopback\n",
+				LOOPBACK_MODE(efx));
+			goto out;
+		}
 
-			efx->phy_op->poll(efx);
-			schedule_timeout_uninterruptible(HZ / 10);
-			if (channel->work_pending)
-				efx_process_channel_now(channel);
-			/* Wait for PHY events to be processed */
-			flush_workqueue(efx->workqueue);
-			rmb();
-
-			/* We need both the phy and xaui links to be ok.
-			 * rather than relying on the falcon_xmac irq/poll
-			 * regime, just poll xaui directly */
-			link_up = efx->link_up;
-			if (link_up && EFX_IS10G(efx) &&
-			    !falcon_xaui_link_ok(efx))
-				link_up = false;
-
-		} while ((++count < 20) && !link_up);
-
-		/* The link should now be up. If it isn't, there is no point
-		 * in attempting a loopback test */
-		if (!link_up) {
+		rc = efx_wait_for_link(efx);
+		if (rc) {
 			EFX_ERR(efx, "loopback %s never came up\n",
 				LOOPBACK_MODE(efx));
-			rc = -EIO;
 			goto out;
 		}
 
-		EFX_LOG(efx, "link came up in %s loopback in %d iterations\n",
-			LOOPBACK_MODE(efx), count);
-
 		/* Test every TX queue */
 		efx_for_each_tx_queue(tx_queue, efx) {
 			state->offload_csum = (tx_queue->queue ==
@@ -667,7 +678,6 @@
 	enum efx_loopback_mode loopback_mode = efx->loopback_mode;
 	int phy_mode = efx->phy_mode;
 	enum reset_type reset_method = RESET_TYPE_INVISIBLE;
-	struct ethtool_cmd ecmd;
 	struct efx_channel *channel;
 	int rc_test = 0, rc_reset = 0, rc;
 
@@ -720,21 +730,21 @@
 	mutex_unlock(&efx->mac_lock);
 
 	/* free up all consumers of SRAM (including all the queues) */
-	efx_reset_down(efx, reset_method, &ecmd);
+	efx_reset_down(efx, reset_method);
 
 	rc = efx_test_chip(efx, tests);
 	if (rc && !rc_test)
 		rc_test = rc;
 
 	/* reset the chip to recover from the register test */
-	rc_reset = falcon_reset_hw(efx, reset_method);
+	rc_reset = efx->type->reset(efx, reset_method);
 
 	/* Ensure that the phy is powered and out of loopback
 	 * for the bist and loopback tests */
 	efx->phy_mode &= ~PHY_MODE_LOW_POWER;
 	efx->loopback_mode = LOOPBACK_NONE;
 
-	rc = efx_reset_up(efx, reset_method, &ecmd, rc_reset == 0);
+	rc = efx_reset_up(efx, reset_method, rc_reset == 0);
 	if (rc && !rc_reset)
 		rc_reset = rc;
 
@@ -753,10 +763,12 @@
 		rc_test = rc;
 
 	/* restore the PHY to the previous state */
-	efx->loopback_mode = loopback_mode;
+	mutex_lock(&efx->mac_lock);
 	efx->phy_mode = phy_mode;
 	efx->port_inhibited = false;
-	efx_ethtool_set_settings(efx->net_dev, &ecmd);
+	efx->loopback_mode = loopback_mode;
+	__efx_reconfigure_port(efx);
+	mutex_unlock(&efx->mac_lock);
 
 	return rc_test;
 }
--- linux-mvl-dove-2.6.32.orig/drivers/net/sfc/rx.c
+++ linux-mvl-dove-2.6.32/drivers/net/sfc/rx.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * Driver for Solarflare Solarstorm network controllers and boards
  * Copyright 2005-2006 Fen Systems Ltd.
- * Copyright 2005-2008 Solarflare Communications Inc.
+ * Copyright 2005-2009 Solarflare Communications Inc.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of the GNU General Public License version 2 as published
@@ -16,9 +16,8 @@
 #include <net/ip.h>
 #include <net/checksum.h>
 #include "net_driver.h"
-#include "rx.h"
 #include "efx.h"
-#include "falcon.h"
+#include "nic.h"
 #include "selftest.h"
 #include "workarounds.h"
 
@@ -61,7 +60,7 @@
  *   rx_alloc_method = (rx_alloc_level > RX_ALLOC_LEVEL_LRO ?
  *                      RX_ALLOC_METHOD_PAGE : RX_ALLOC_METHOD_SKB)
  */
-static int rx_alloc_method = RX_ALLOC_METHOD_PAGE;
+static int rx_alloc_method = RX_ALLOC_METHOD_AUTO;
 
 #define RX_ALLOC_LEVEL_LRO 0x2000
 #define RX_ALLOC_LEVEL_MAX 0x3000
@@ -293,8 +292,7 @@
 	 * fill anyway.
 	 */
 	fill_level = (rx_queue->added_count - rx_queue->removed_count);
-	EFX_BUG_ON_PARANOID(fill_level >
-			    rx_queue->efx->type->rxd_ring_mask + 1);
+	EFX_BUG_ON_PARANOID(fill_level > EFX_RXQ_SIZE);
 
 	/* Don't fill if we don't need to */
 	if (fill_level >= rx_queue->fast_fill_trigger)
@@ -316,8 +314,7 @@
  retry:
 	/* Recalculate current fill level now that we have the lock */
 	fill_level = (rx_queue->added_count - rx_queue->removed_count);
-	EFX_BUG_ON_PARANOID(fill_level >
-			    rx_queue->efx->type->rxd_ring_mask + 1);
+	EFX_BUG_ON_PARANOID(fill_level > EFX_RXQ_SIZE);
 	space = rx_queue->fast_fill_limit - fill_level;
 	if (space < EFX_RX_BATCH)
 		goto out_unlock;
@@ -329,8 +326,7 @@
 
 	do {
 		for (i = 0; i < EFX_RX_BATCH; ++i) {
-			index = (rx_queue->added_count &
-				 rx_queue->efx->type->rxd_ring_mask);
+			index = rx_queue->added_count & EFX_RXQ_MASK;
 			rx_buf = efx_rx_buffer(rx_queue, index);
 			rc = efx_init_rx_buffer(rx_queue, rx_buf);
 			if (unlikely(rc))
@@ -345,7 +341,7 @@
 
  out:
 	/* Send write pointer to card. */
-	falcon_notify_rx_desc(rx_queue);
+	efx_nic_notify_rx_desc(rx_queue);
 
 	/* If the fast fill is running inside from the refill tasklet, then
 	 * for SMP systems it may be running on a different CPU to
@@ -448,17 +444,23 @@
 			      bool checksummed)
 {
 	struct napi_struct *napi = &channel->napi_str;
+	gro_result_t gro_result;
 
 	/* Pass the skb/page into the LRO engine */
 	if (rx_buf->page) {
-		struct sk_buff *skb = napi_get_frags(napi);
+		struct page *page = rx_buf->page;
+		struct sk_buff *skb;
 
+		EFX_BUG_ON_PARANOID(rx_buf->skb);
+		rx_buf->page = NULL;
+
+		skb = napi_get_frags(napi);
 		if (!skb) {
-			put_page(rx_buf->page);
-			goto out;
+			put_page(page);
+			return;
 		}
 
-		skb_shinfo(skb)->frags[0].page = rx_buf->page;
+		skb_shinfo(skb)->frags[0].page = page;
 		skb_shinfo(skb)->frags[0].page_offset =
 			efx_rx_buf_offset(rx_buf);
 		skb_shinfo(skb)->frags[0].size = rx_buf->len;
@@ -470,17 +472,24 @@
 		skb->ip_summed =
 			checksummed ? CHECKSUM_UNNECESSARY : CHECKSUM_NONE;
 
-		napi_gro_frags(napi);
+		skb_record_rx_queue(skb, channel->channel);
 
-out:
-		EFX_BUG_ON_PARANOID(rx_buf->skb);
-		rx_buf->page = NULL;
+		gro_result = napi_gro_frags(napi);
 	} else {
-		EFX_BUG_ON_PARANOID(!rx_buf->skb);
-		EFX_BUG_ON_PARANOID(!checksummed);
+		struct sk_buff *skb = rx_buf->skb;
 
-		napi_gro_receive(napi, rx_buf->skb);
+		EFX_BUG_ON_PARANOID(!skb);
+		EFX_BUG_ON_PARANOID(!checksummed);
 		rx_buf->skb = NULL;
+
+		gro_result = napi_gro_receive(napi, skb);
+	}
+
+	if (gro_result == GRO_NORMAL) {
+		channel->rx_alloc_level += RX_ALLOC_FACTOR_SKB;
+	} else if (gro_result != GRO_DROP) {
+		channel->rx_alloc_level += RX_ALLOC_FACTOR_LRO;
+		channel->irq_mod_score += 2;
 	}
 }
 
@@ -558,7 +567,7 @@
 	if (unlikely(efx->loopback_selftest)) {
 		efx_loopback_rx_packet(efx, rx_buf->data, rx_buf->len);
 		efx_free_rx_buffer(efx, rx_buf);
-		goto done;
+		return;
 	}
 
 	if (rx_buf->skb) {
@@ -570,34 +579,28 @@
 		 * at the ethernet header */
 		rx_buf->skb->protocol = eth_type_trans(rx_buf->skb,
 						       efx->net_dev);
+
+		skb_record_rx_queue(rx_buf->skb, channel->channel);
 	}
 
 	if (likely(checksummed || rx_buf->page)) {
 		efx_rx_packet_lro(channel, rx_buf, checksummed);
-		goto done;
+		return;
 	}
 
 	/* We now own the SKB */
 	skb = rx_buf->skb;
 	rx_buf->skb = NULL;
-
-	EFX_BUG_ON_PARANOID(rx_buf->page);
-	EFX_BUG_ON_PARANOID(rx_buf->skb);
 	EFX_BUG_ON_PARANOID(!skb);
 
 	/* Set the SKB flags */
 	skb->ip_summed = CHECKSUM_NONE;
 
-	skb_record_rx_queue(skb, channel->channel);
-
 	/* Pass the packet up */
 	netif_receive_skb(skb);
 
 	/* Update allocation strategy method */
 	channel->rx_alloc_level += RX_ALLOC_FACTOR_SKB;
-
-done:
-	;
 }
 
 void efx_rx_strategy(struct efx_channel *channel)
@@ -632,12 +635,12 @@
 	EFX_LOG(efx, "creating RX queue %d\n", rx_queue->queue);
 
 	/* Allocate RX buffers */
-	rxq_size = (efx->type->rxd_ring_mask + 1) * sizeof(*rx_queue->buffer);
+	rxq_size = EFX_RXQ_SIZE * sizeof(*rx_queue->buffer);
 	rx_queue->buffer = kzalloc(rxq_size, GFP_KERNEL);
 	if (!rx_queue->buffer)
 		return -ENOMEM;
 
-	rc = falcon_probe_rx(rx_queue);
+	rc = efx_nic_probe_rx(rx_queue);
 	if (rc) {
 		kfree(rx_queue->buffer);
 		rx_queue->buffer = NULL;
@@ -647,7 +650,6 @@
 
 void efx_init_rx_queue(struct efx_rx_queue *rx_queue)
 {
-	struct efx_nic *efx = rx_queue->efx;
 	unsigned int max_fill, trigger, limit;
 
 	EFX_LOG(rx_queue->efx, "initialising RX queue %d\n", rx_queue->queue);
@@ -660,7 +662,7 @@
 	rx_queue->min_overfill = -1U;
 
 	/* Initialise limit fields */
-	max_fill = efx->type->rxd_ring_mask + 1 - EFX_RXD_HEAD_ROOM;
+	max_fill = EFX_RXQ_SIZE - EFX_RXD_HEAD_ROOM;
 	trigger = max_fill * min(rx_refill_threshold, 100U) / 100U;
 	limit = max_fill * min(rx_refill_limit, 100U) / 100U;
 
@@ -669,7 +671,7 @@
 	rx_queue->fast_fill_limit = limit;
 
 	/* Set up RX descriptor ring */
-	falcon_init_rx(rx_queue);
+	efx_nic_init_rx(rx_queue);
 }
 
 void efx_fini_rx_queue(struct efx_rx_queue *rx_queue)
@@ -679,11 +681,11 @@
 
 	EFX_LOG(rx_queue->efx, "shutting down RX queue %d\n", rx_queue->queue);
 
-	falcon_fini_rx(rx_queue);
+	efx_nic_fini_rx(rx_queue);
 
 	/* Release RX buffers NB start at index 0 not current HW ptr */
 	if (rx_queue->buffer) {
-		for (i = 0; i <= rx_queue->efx->type->rxd_ring_mask; i++) {
+		for (i = 0; i <= EFX_RXQ_MASK; i++) {
 			rx_buf = efx_rx_buffer(rx_queue, i);
 			efx_fini_rx_buffer(rx_queue, rx_buf);
 		}
@@ -704,7 +706,7 @@
 {
 	EFX_LOG(rx_queue->efx, "destroying RX queue %d\n", rx_queue->queue);
 
-	falcon_remove_rx(rx_queue);
+	efx_nic_remove_rx(rx_queue);
 
 	kfree(rx_queue->buffer);
 	rx_queue->buffer = NULL;
--- linux-mvl-dove-2.6.32.orig/drivers/net/sfc/Makefile
+++ linux-mvl-dove-2.6.32/drivers/net/sfc/Makefile
@@ -1,6 +1,7 @@
-sfc-y			+= efx.o falcon.o tx.o rx.o falcon_gmac.o \
-			   falcon_xmac.o selftest.o ethtool.o xfp_phy.o \
-			   mdio_10g.o tenxpress.o boards.o sfe4001.o
+sfc-y			+= efx.o nic.o falcon.o siena.o tx.o rx.o \
+			   falcon_gmac.o falcon_xmac.o mcdi_mac.o \
+			   selftest.o ethtool.o qt202x_phy.o mdio_10g.o \
+			   tenxpress.o falcon_boards.o mcdi.o mcdi_phy.o
 sfc-$(CONFIG_SFC_MTD)	+= mtd.o
 
 obj-$(CONFIG_SFC)	+= sfc.o
--- linux-mvl-dove-2.6.32.orig/drivers/net/sfc/workarounds.h
+++ linux-mvl-dove-2.6.32/drivers/net/sfc/workarounds.h
@@ -1,6 +1,6 @@
 /****************************************************************************
  * Driver for Solarflare Solarstorm network controllers and boards
- * Copyright 2006-2008 Solarflare Communications Inc.
+ * Copyright 2006-2009 Solarflare Communications Inc.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of the GNU General Public License version 2 as published
@@ -16,7 +16,9 @@
  */
 
 #define EFX_WORKAROUND_ALWAYS(efx) 1
-#define EFX_WORKAROUND_FALCON_A(efx) (falcon_rev(efx) <= FALCON_REV_A1)
+#define EFX_WORKAROUND_FALCON_A(efx) (efx_nic_rev(efx) <= EFX_REV_FALCON_A1)
+#define EFX_WORKAROUND_FALCON_AB(efx) (efx_nic_rev(efx) <= EFX_REV_FALCON_B0)
+#define EFX_WORKAROUND_SIENA(efx) (efx_nic_rev(efx) == EFX_REV_SIENA_A0)
 #define EFX_WORKAROUND_10G(efx) EFX_IS10G(efx)
 #define EFX_WORKAROUND_SFT9001(efx) ((efx)->phy_type == PHY_TYPE_SFT9001A || \
 				     (efx)->phy_type == PHY_TYPE_SFT9001B)
@@ -27,20 +29,22 @@
 #define EFX_WORKAROUND_7575 EFX_WORKAROUND_ALWAYS
 /* Bit-bashed I2C reads cause performance drop */
 #define EFX_WORKAROUND_7884 EFX_WORKAROUND_10G
-/* TX pkt parser problem with <= 16 byte TXes */
-#define EFX_WORKAROUND_9141 EFX_WORKAROUND_ALWAYS
 /* TX_EV_PKT_ERR can be caused by a dangling TX descriptor
  * or a PCIe error (bug 11028) */
 #define EFX_WORKAROUND_10727 EFX_WORKAROUND_ALWAYS
 /* Transmit flow control may get disabled */
-#define EFX_WORKAROUND_11482 EFX_WORKAROUND_ALWAYS
-/* Flush events can take a very long time to appear */
-#define EFX_WORKAROUND_11557 EFX_WORKAROUND_ALWAYS
+#define EFX_WORKAROUND_11482 EFX_WORKAROUND_FALCON_AB
 /* Truncated IPv4 packets can confuse the TX packet parser */
-#define EFX_WORKAROUND_15592 EFX_WORKAROUND_ALWAYS
+#define EFX_WORKAROUND_15592 EFX_WORKAROUND_FALCON_AB
+/* Legacy ISR read can return zero once */
+#define EFX_WORKAROUND_15783 EFX_WORKAROUND_SIENA
+/* Legacy interrupt storm when interrupt fifo fills */
+#define EFX_WORKAROUND_17213 EFX_WORKAROUND_SIENA
 
 /* Spurious parity errors in TSORT buffers */
 #define EFX_WORKAROUND_5129 EFX_WORKAROUND_FALCON_A
+/* Unaligned read request >512 bytes after aligning may break TSORT */
+#define EFX_WORKAROUND_5391 EFX_WORKAROUND_FALCON_A
 /* iSCSI parsing errors */
 #define EFX_WORKAROUND_5583 EFX_WORKAROUND_FALCON_A
 /* RX events go missing */
--- linux-mvl-dove-2.6.32.orig/drivers/net/sfc/phy.h
+++ linux-mvl-dove-2.6.32/drivers/net/sfc/phy.h
@@ -1,6 +1,6 @@
 /****************************************************************************
  * Driver for Solarflare Solarstorm network controllers and boards
- * Copyright 2007-2008 Solarflare Communications Inc.
+ * Copyright 2007-2009 Solarflare Communications Inc.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of the GNU General Public License version 2 as published
@@ -16,16 +16,16 @@
 extern struct efx_phy_operations falcon_sfx7101_phy_ops;
 extern struct efx_phy_operations falcon_sft9001_phy_ops;
 
-extern void tenxpress_phy_blink(struct efx_nic *efx, bool blink);
+extern void tenxpress_set_id_led(struct efx_nic *efx, enum efx_led_mode mode);
 
 /* Wait for the PHY to boot. Return 0 on success, -EINVAL if the PHY failed
  * to boot due to corrupt flash, or some other negative error code. */
 extern int sft9001_wait_boot(struct efx_nic *efx);
 
 /****************************************************************************
- * AMCC/Quake QT20xx PHYs
+ * AMCC/Quake QT202x PHYs
  */
-extern struct efx_phy_operations falcon_xfp_phy_ops;
+extern struct efx_phy_operations falcon_qt202x_phy_ops;
 
 /* These PHYs provide various H/W control states for LEDs */
 #define QUAKE_LED_LINK_INVAL	(0)
@@ -39,6 +39,23 @@
 #define QUAKE_LED_TXLINK	(0)
 #define QUAKE_LED_RXLINK	(8)
 
-extern void xfp_set_led(struct efx_nic *p, int led, int state);
+extern void falcon_qt202x_set_led(struct efx_nic *p, int led, int state);
+
+/****************************************************************************
+ * Siena managed PHYs
+ */
+extern struct efx_phy_operations efx_mcdi_phy_ops;
+
+extern int efx_mcdi_mdio_read(struct efx_nic *efx, unsigned int bus,
+			      unsigned int prtad, unsigned int devad,
+			      u16 addr, u16 *value_out, u32 *status_out);
+extern int efx_mcdi_mdio_write(struct efx_nic *efx, unsigned int bus,
+			       unsigned int prtad, unsigned int devad,
+			       u16 addr, u16 value, u32 *status_out);
+extern void efx_mcdi_phy_decode_link(struct efx_nic *efx,
+				     struct efx_link_state *link_state,
+				     u32 speed, u32 flags, u32 fcntl);
+extern int efx_mcdi_phy_reconfigure(struct efx_nic *efx);
+extern void efx_mcdi_phy_check_fcntl(struct efx_nic *efx, u32 lpa);
 
 #endif
--- linux-mvl-dove-2.6.32.orig/drivers/net/sfc/spi.h
+++ linux-mvl-dove-2.6.32/drivers/net/sfc/spi.h
@@ -36,8 +36,6 @@
 
 /**
  * struct efx_spi_device - an Efx SPI (Serial Peripheral Interface) device
- * @efx:		The Efx controller that owns this device
- * @mtd:		MTD state
  * @device_id:		Controller's id for the device
  * @size:		Size (in bytes)
  * @addr_len:		Number of address bytes in read/write commands
@@ -54,10 +52,6 @@
  *	Write commands are limited to blocks with this size and alignment.
  */
 struct efx_spi_device {
-	struct efx_nic *efx;
-#ifdef CONFIG_SFC_MTD
-	void *mtd;
-#endif
 	int device_id;
 	unsigned int size;
 	unsigned int addr_len;
@@ -67,12 +61,16 @@
 	unsigned int block_size;
 };
 
-int falcon_spi_cmd(const struct efx_spi_device *spi, unsigned int command,
+int falcon_spi_cmd(struct efx_nic *efx,
+		   const struct efx_spi_device *spi, unsigned int command,
 		   int address, const void* in, void *out, size_t len);
-int falcon_spi_wait_write(const struct efx_spi_device *spi);
-int falcon_spi_read(const struct efx_spi_device *spi, loff_t start,
+int falcon_spi_wait_write(struct efx_nic *efx,
+			  const struct efx_spi_device *spi);
+int falcon_spi_read(struct efx_nic *efx,
+		    const struct efx_spi_device *spi, loff_t start,
 		    size_t len, size_t *retlen, u8 *buffer);
-int falcon_spi_write(const struct efx_spi_device *spi, loff_t start,
+int falcon_spi_write(struct efx_nic *efx,
+		     const struct efx_spi_device *spi, loff_t start,
 		     size_t len, size_t *retlen, const u8 *buffer);
 
 /*
--- linux-mvl-dove-2.6.32.orig/drivers/net/sfc/bitfield.h
+++ linux-mvl-dove-2.6.32/drivers/net/sfc/bitfield.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * Driver for Solarflare Solarstorm network controllers and boards
  * Copyright 2005-2006 Fen Systems Ltd.
- * Copyright 2006-2008 Solarflare Communications Inc.
+ * Copyright 2006-2009 Solarflare Communications Inc.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of the GNU General Public License version 2 as published
@@ -37,6 +37,8 @@
 #define EFX_DWORD_2_WIDTH 32
 #define EFX_DWORD_3_LBN 96
 #define EFX_DWORD_3_WIDTH 32
+#define EFX_QWORD_0_LBN 0
+#define EFX_QWORD_0_WIDTH 64
 
 /* Specified attribute (e.g. LBN) of the specified field */
 #define EFX_VAL(field, attribute) field ## _ ## attribute
@@ -520,19 +522,6 @@
 #define EFX_SET_QWORD_FIELD EFX_SET_QWORD_FIELD32
 #endif
 
-#define EFX_SET_OWORD_FIELD_VER(efx, oword, field, value) do { \
-	if (falcon_rev(efx) >= FALCON_REV_B0) {			   \
-		EFX_SET_OWORD_FIELD((oword), field##_B0, (value)); \
-	} else { \
-		EFX_SET_OWORD_FIELD((oword), field##_A1, (value)); \
-	} \
-} while (0)
-
-#define EFX_QWORD_FIELD_VER(efx, qword, field)	\
-	(falcon_rev(efx) >= FALCON_REV_B0 ?	\
-	 EFX_QWORD_FIELD((qword), field##_B0) :	\
-	 EFX_QWORD_FIELD((qword), field##_A1))
-
 /* Used to avoid compiler warnings about shift range exceeding width
  * of the data types when dma_addr_t is only 32 bits wide.
  */
--- linux-mvl-dove-2.6.32.orig/drivers/net/sfc/regs.h
+++ linux-mvl-dove-2.6.32/drivers/net/sfc/regs.h
@@ -0,0 +1,3168 @@
+/****************************************************************************
+ * Driver for Solarflare Solarstorm network controllers and boards
+ * Copyright 2005-2006 Fen Systems Ltd.
+ * Copyright 2006-2009 Solarflare Communications Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation, incorporated herein by reference.
+ */
+
+#ifndef EFX_REGS_H
+#define EFX_REGS_H
+
+/*
+ * Falcon hardware architecture definitions have a name prefix following
+ * the format:
+ *
+ *     F<type>_<min-rev><max-rev>_
+ *
+ * The following <type> strings are used:
+ *
+ *             MMIO register  MC register  Host memory structure
+ * -------------------------------------------------------------
+ * Address     R              MCR
+ * Bitfield    RF             MCRF         SF
+ * Enumerator  FE             MCFE         SE
+ *
+ * <min-rev> is the first revision to which the definition applies:
+ *
+ *     A: Falcon A1 (SFC4000AB)
+ *     B: Falcon B0 (SFC4000BA)
+ *     C: Siena A0 (SFL9021AA)
+ *
+ * If the definition has been changed or removed in later revisions
+ * then <max-rev> is the last revision to which the definition applies;
+ * otherwise it is "Z".
+ */
+
+/**************************************************************************
+ *
+ * Falcon/Siena registers and descriptors
+ *
+ **************************************************************************
+ */
+
+/* ADR_REGION_REG: Address region register */
+#define	FR_AZ_ADR_REGION 0x00000000
+#define	FRF_AZ_ADR_REGION3_LBN 96
+#define	FRF_AZ_ADR_REGION3_WIDTH 18
+#define	FRF_AZ_ADR_REGION2_LBN 64
+#define	FRF_AZ_ADR_REGION2_WIDTH 18
+#define	FRF_AZ_ADR_REGION1_LBN 32
+#define	FRF_AZ_ADR_REGION1_WIDTH 18
+#define	FRF_AZ_ADR_REGION0_LBN 0
+#define	FRF_AZ_ADR_REGION0_WIDTH 18
+
+/* INT_EN_REG_KER: Kernel driver Interrupt enable register */
+#define	FR_AZ_INT_EN_KER 0x00000010
+#define	FRF_AZ_KER_INT_LEVE_SEL_LBN 8
+#define	FRF_AZ_KER_INT_LEVE_SEL_WIDTH 6
+#define	FRF_AZ_KER_INT_CHAR_LBN 4
+#define	FRF_AZ_KER_INT_CHAR_WIDTH 1
+#define	FRF_AZ_KER_INT_KER_LBN 3
+#define	FRF_AZ_KER_INT_KER_WIDTH 1
+#define	FRF_AZ_DRV_INT_EN_KER_LBN 0
+#define	FRF_AZ_DRV_INT_EN_KER_WIDTH 1
+
+/* INT_EN_REG_CHAR: Char Driver interrupt enable register */
+#define	FR_BZ_INT_EN_CHAR 0x00000020
+#define	FRF_BZ_CHAR_INT_LEVE_SEL_LBN 8
+#define	FRF_BZ_CHAR_INT_LEVE_SEL_WIDTH 6
+#define	FRF_BZ_CHAR_INT_CHAR_LBN 4
+#define	FRF_BZ_CHAR_INT_CHAR_WIDTH 1
+#define	FRF_BZ_CHAR_INT_KER_LBN 3
+#define	FRF_BZ_CHAR_INT_KER_WIDTH 1
+#define	FRF_BZ_DRV_INT_EN_CHAR_LBN 0
+#define	FRF_BZ_DRV_INT_EN_CHAR_WIDTH 1
+
+/* INT_ADR_REG_KER: Interrupt host address for Kernel driver */
+#define	FR_AZ_INT_ADR_KER 0x00000030
+#define	FRF_AZ_NORM_INT_VEC_DIS_KER_LBN 64
+#define	FRF_AZ_NORM_INT_VEC_DIS_KER_WIDTH 1
+#define	FRF_AZ_INT_ADR_KER_LBN 0
+#define	FRF_AZ_INT_ADR_KER_WIDTH 64
+
+/* INT_ADR_REG_CHAR: Interrupt host address for Char driver */
+#define	FR_BZ_INT_ADR_CHAR 0x00000040
+#define	FRF_BZ_NORM_INT_VEC_DIS_CHAR_LBN 64
+#define	FRF_BZ_NORM_INT_VEC_DIS_CHAR_WIDTH 1
+#define	FRF_BZ_INT_ADR_CHAR_LBN 0
+#define	FRF_BZ_INT_ADR_CHAR_WIDTH 64
+
+/* INT_ACK_KER: Kernel interrupt acknowledge register */
+#define	FR_AA_INT_ACK_KER 0x00000050
+#define	FRF_AA_INT_ACK_KER_FIELD_LBN 0
+#define	FRF_AA_INT_ACK_KER_FIELD_WIDTH 32
+
+/* INT_ISR0_REG: Function 0 Interrupt Acknowlege Status register */
+#define	FR_BZ_INT_ISR0 0x00000090
+#define	FRF_BZ_INT_ISR_REG_LBN 0
+#define	FRF_BZ_INT_ISR_REG_WIDTH 64
+
+/* HW_INIT_REG: Hardware initialization register */
+#define	FR_AZ_HW_INIT 0x000000c0
+#define	FRF_BB_BDMRD_CPLF_FULL_LBN 124
+#define	FRF_BB_BDMRD_CPLF_FULL_WIDTH 1
+#define	FRF_BB_PCIE_CPL_TIMEOUT_CTRL_LBN 121
+#define	FRF_BB_PCIE_CPL_TIMEOUT_CTRL_WIDTH 3
+#define	FRF_CZ_TX_MRG_TAGS_LBN 120
+#define	FRF_CZ_TX_MRG_TAGS_WIDTH 1
+#define	FRF_AB_TRGT_MASK_ALL_LBN 100
+#define	FRF_AB_TRGT_MASK_ALL_WIDTH 1
+#define	FRF_AZ_DOORBELL_DROP_LBN 92
+#define	FRF_AZ_DOORBELL_DROP_WIDTH 8
+#define	FRF_AB_TX_RREQ_MASK_EN_LBN 76
+#define	FRF_AB_TX_RREQ_MASK_EN_WIDTH 1
+#define	FRF_AB_PE_EIDLE_DIS_LBN 75
+#define	FRF_AB_PE_EIDLE_DIS_WIDTH 1
+#define	FRF_AA_FC_BLOCKING_EN_LBN 45
+#define	FRF_AA_FC_BLOCKING_EN_WIDTH 1
+#define	FRF_BZ_B2B_REQ_EN_LBN 45
+#define	FRF_BZ_B2B_REQ_EN_WIDTH 1
+#define	FRF_AA_B2B_REQ_EN_LBN 44
+#define	FRF_AA_B2B_REQ_EN_WIDTH 1
+#define	FRF_BB_FC_BLOCKING_EN_LBN 44
+#define	FRF_BB_FC_BLOCKING_EN_WIDTH 1
+#define	FRF_AZ_POST_WR_MASK_LBN 40
+#define	FRF_AZ_POST_WR_MASK_WIDTH 4
+#define	FRF_AZ_TLP_TC_LBN 34
+#define	FRF_AZ_TLP_TC_WIDTH 3
+#define	FRF_AZ_TLP_ATTR_LBN 32
+#define	FRF_AZ_TLP_ATTR_WIDTH 2
+#define	FRF_AB_INTB_VEC_LBN 24
+#define	FRF_AB_INTB_VEC_WIDTH 5
+#define	FRF_AB_INTA_VEC_LBN 16
+#define	FRF_AB_INTA_VEC_WIDTH 5
+#define	FRF_AZ_WD_TIMER_LBN 8
+#define	FRF_AZ_WD_TIMER_WIDTH 8
+#define	FRF_AZ_US_DISABLE_LBN 5
+#define	FRF_AZ_US_DISABLE_WIDTH 1
+#define	FRF_AZ_TLP_EP_LBN 4
+#define	FRF_AZ_TLP_EP_WIDTH 1
+#define	FRF_AZ_ATTR_SEL_LBN 3
+#define	FRF_AZ_ATTR_SEL_WIDTH 1
+#define	FRF_AZ_TD_SEL_LBN 1
+#define	FRF_AZ_TD_SEL_WIDTH 1
+#define	FRF_AZ_TLP_TD_LBN 0
+#define	FRF_AZ_TLP_TD_WIDTH 1
+
+/* EE_SPI_HCMD_REG: SPI host command register */
+#define	FR_AB_EE_SPI_HCMD 0x00000100
+#define	FRF_AB_EE_SPI_HCMD_CMD_EN_LBN 31
+#define	FRF_AB_EE_SPI_HCMD_CMD_EN_WIDTH 1
+#define	FRF_AB_EE_WR_TIMER_ACTIVE_LBN 28
+#define	FRF_AB_EE_WR_TIMER_ACTIVE_WIDTH 1
+#define	FRF_AB_EE_SPI_HCMD_SF_SEL_LBN 24
+#define	FRF_AB_EE_SPI_HCMD_SF_SEL_WIDTH 1
+#define	FRF_AB_EE_SPI_HCMD_DABCNT_LBN 16
+#define	FRF_AB_EE_SPI_HCMD_DABCNT_WIDTH 5
+#define	FRF_AB_EE_SPI_HCMD_READ_LBN 15
+#define	FRF_AB_EE_SPI_HCMD_READ_WIDTH 1
+#define	FRF_AB_EE_SPI_HCMD_DUBCNT_LBN 12
+#define	FRF_AB_EE_SPI_HCMD_DUBCNT_WIDTH 2
+#define	FRF_AB_EE_SPI_HCMD_ADBCNT_LBN 8
+#define	FRF_AB_EE_SPI_HCMD_ADBCNT_WIDTH 2
+#define	FRF_AB_EE_SPI_HCMD_ENC_LBN 0
+#define	FRF_AB_EE_SPI_HCMD_ENC_WIDTH 8
+
+/* USR_EV_CFG: User Level Event Configuration register */
+#define	FR_CZ_USR_EV_CFG 0x00000100
+#define	FRF_CZ_USREV_DIS_LBN 16
+#define	FRF_CZ_USREV_DIS_WIDTH 1
+#define	FRF_CZ_DFLT_EVQ_LBN 0
+#define	FRF_CZ_DFLT_EVQ_WIDTH 10
+
+/* EE_SPI_HADR_REG: SPI host address register */
+#define	FR_AB_EE_SPI_HADR 0x00000110
+#define	FRF_AB_EE_SPI_HADR_DUBYTE_LBN 24
+#define	FRF_AB_EE_SPI_HADR_DUBYTE_WIDTH 8
+#define	FRF_AB_EE_SPI_HADR_ADR_LBN 0
+#define	FRF_AB_EE_SPI_HADR_ADR_WIDTH 24
+
+/* EE_SPI_HDATA_REG: SPI host data register */
+#define	FR_AB_EE_SPI_HDATA 0x00000120
+#define	FRF_AB_EE_SPI_HDATA3_LBN 96
+#define	FRF_AB_EE_SPI_HDATA3_WIDTH 32
+#define	FRF_AB_EE_SPI_HDATA2_LBN 64
+#define	FRF_AB_EE_SPI_HDATA2_WIDTH 32
+#define	FRF_AB_EE_SPI_HDATA1_LBN 32
+#define	FRF_AB_EE_SPI_HDATA1_WIDTH 32
+#define	FRF_AB_EE_SPI_HDATA0_LBN 0
+#define	FRF_AB_EE_SPI_HDATA0_WIDTH 32
+
+/* EE_BASE_PAGE_REG: Expansion ROM base mirror register */
+#define	FR_AB_EE_BASE_PAGE 0x00000130
+#define	FRF_AB_EE_EXPROM_MASK_LBN 16
+#define	FRF_AB_EE_EXPROM_MASK_WIDTH 13
+#define	FRF_AB_EE_EXP_ROM_WINDOW_BASE_LBN 0
+#define	FRF_AB_EE_EXP_ROM_WINDOW_BASE_WIDTH 13
+
+/* EE_VPD_CFG0_REG: SPI/VPD configuration register 0 */
+#define	FR_AB_EE_VPD_CFG0 0x00000140
+#define	FRF_AB_EE_SF_FASTRD_EN_LBN 127
+#define	FRF_AB_EE_SF_FASTRD_EN_WIDTH 1
+#define	FRF_AB_EE_SF_CLOCK_DIV_LBN 120
+#define	FRF_AB_EE_SF_CLOCK_DIV_WIDTH 7
+#define	FRF_AB_EE_VPD_WIP_POLL_LBN 119
+#define	FRF_AB_EE_VPD_WIP_POLL_WIDTH 1
+#define	FRF_AB_EE_EE_CLOCK_DIV_LBN 112
+#define	FRF_AB_EE_EE_CLOCK_DIV_WIDTH 7
+#define	FRF_AB_EE_EE_WR_TMR_VALUE_LBN 96
+#define	FRF_AB_EE_EE_WR_TMR_VALUE_WIDTH 16
+#define	FRF_AB_EE_VPDW_LENGTH_LBN 80
+#define	FRF_AB_EE_VPDW_LENGTH_WIDTH 15
+#define	FRF_AB_EE_VPDW_BASE_LBN 64
+#define	FRF_AB_EE_VPDW_BASE_WIDTH 15
+#define	FRF_AB_EE_VPD_WR_CMD_EN_LBN 56
+#define	FRF_AB_EE_VPD_WR_CMD_EN_WIDTH 8
+#define	FRF_AB_EE_VPD_BASE_LBN 32
+#define	FRF_AB_EE_VPD_BASE_WIDTH 24
+#define	FRF_AB_EE_VPD_LENGTH_LBN 16
+#define	FRF_AB_EE_VPD_LENGTH_WIDTH 15
+#define	FRF_AB_EE_VPD_AD_SIZE_LBN 8
+#define	FRF_AB_EE_VPD_AD_SIZE_WIDTH 5
+#define	FRF_AB_EE_VPD_ACCESS_ON_LBN 5
+#define	FRF_AB_EE_VPD_ACCESS_ON_WIDTH 1
+#define	FRF_AB_EE_VPD_ACCESS_BLOCK_LBN 4
+#define	FRF_AB_EE_VPD_ACCESS_BLOCK_WIDTH 1
+#define	FRF_AB_EE_VPD_DEV_SF_SEL_LBN 2
+#define	FRF_AB_EE_VPD_DEV_SF_SEL_WIDTH 1
+#define	FRF_AB_EE_VPD_EN_AD9_MODE_LBN 1
+#define	FRF_AB_EE_VPD_EN_AD9_MODE_WIDTH 1
+#define	FRF_AB_EE_VPD_EN_LBN 0
+#define	FRF_AB_EE_VPD_EN_WIDTH 1
+
+/* EE_VPD_SW_CNTL_REG: VPD access SW control register */
+#define	FR_AB_EE_VPD_SW_CNTL 0x00000150
+#define	FRF_AB_EE_VPD_CYCLE_PENDING_LBN 31
+#define	FRF_AB_EE_VPD_CYCLE_PENDING_WIDTH 1
+#define	FRF_AB_EE_VPD_CYC_WRITE_LBN 28
+#define	FRF_AB_EE_VPD_CYC_WRITE_WIDTH 1
+#define	FRF_AB_EE_VPD_CYC_ADR_LBN 0
+#define	FRF_AB_EE_VPD_CYC_ADR_WIDTH 15
+
+/* EE_VPD_SW_DATA_REG: VPD access SW data register */
+#define	FR_AB_EE_VPD_SW_DATA 0x00000160
+#define	FRF_AB_EE_VPD_CYC_DAT_LBN 0
+#define	FRF_AB_EE_VPD_CYC_DAT_WIDTH 32
+
+/* PBMX_DBG_IADDR_REG: Capture Module address register */
+#define	FR_CZ_PBMX_DBG_IADDR 0x000001f0
+#define	FRF_CZ_PBMX_DBG_IADDR_LBN 0
+#define	FRF_CZ_PBMX_DBG_IADDR_WIDTH 32
+
+/* PCIE_CORE_INDIRECT_REG: Indirect Access to PCIE Core registers */
+#define	FR_BB_PCIE_CORE_INDIRECT 0x000001f0
+#define	FRF_BB_PCIE_CORE_TARGET_DATA_LBN 32
+#define	FRF_BB_PCIE_CORE_TARGET_DATA_WIDTH 32
+#define	FRF_BB_PCIE_CORE_INDIRECT_ACCESS_DIR_LBN 15
+#define	FRF_BB_PCIE_CORE_INDIRECT_ACCESS_DIR_WIDTH 1
+#define	FRF_BB_PCIE_CORE_TARGET_REG_ADRS_LBN 0
+#define	FRF_BB_PCIE_CORE_TARGET_REG_ADRS_WIDTH 12
+
+/* PBMX_DBG_IDATA_REG: Capture Module data register */
+#define	FR_CZ_PBMX_DBG_IDATA 0x000001f8
+#define	FRF_CZ_PBMX_DBG_IDATA_LBN 0
+#define	FRF_CZ_PBMX_DBG_IDATA_WIDTH 64
+
+/* NIC_STAT_REG: NIC status register */
+#define	FR_AB_NIC_STAT 0x00000200
+#define	FRF_BB_AER_DIS_LBN 34
+#define	FRF_BB_AER_DIS_WIDTH 1
+#define	FRF_BB_EE_STRAP_EN_LBN 31
+#define	FRF_BB_EE_STRAP_EN_WIDTH 1
+#define	FRF_BB_EE_STRAP_LBN 24
+#define	FRF_BB_EE_STRAP_WIDTH 4
+#define	FRF_BB_REVISION_ID_LBN 17
+#define	FRF_BB_REVISION_ID_WIDTH 7
+#define	FRF_AB_ONCHIP_SRAM_LBN 16
+#define	FRF_AB_ONCHIP_SRAM_WIDTH 1
+#define	FRF_AB_SF_PRST_LBN 9
+#define	FRF_AB_SF_PRST_WIDTH 1
+#define	FRF_AB_EE_PRST_LBN 8
+#define	FRF_AB_EE_PRST_WIDTH 1
+#define	FRF_AB_ATE_MODE_LBN 3
+#define	FRF_AB_ATE_MODE_WIDTH 1
+#define	FRF_AB_STRAP_PINS_LBN 0
+#define	FRF_AB_STRAP_PINS_WIDTH 3
+
+/* GPIO_CTL_REG: GPIO control register */
+#define	FR_AB_GPIO_CTL 0x00000210
+#define	FRF_AB_GPIO_OUT3_LBN 112
+#define	FRF_AB_GPIO_OUT3_WIDTH 16
+#define	FRF_AB_GPIO_IN3_LBN 104
+#define	FRF_AB_GPIO_IN3_WIDTH 8
+#define	FRF_AB_GPIO_PWRUP_VALUE3_LBN 96
+#define	FRF_AB_GPIO_PWRUP_VALUE3_WIDTH 8
+#define	FRF_AB_GPIO_OUT2_LBN 80
+#define	FRF_AB_GPIO_OUT2_WIDTH 16
+#define	FRF_AB_GPIO_IN2_LBN 72
+#define	FRF_AB_GPIO_IN2_WIDTH 8
+#define	FRF_AB_GPIO_PWRUP_VALUE2_LBN 64
+#define	FRF_AB_GPIO_PWRUP_VALUE2_WIDTH 8
+#define	FRF_AB_GPIO15_OEN_LBN 63
+#define	FRF_AB_GPIO15_OEN_WIDTH 1
+#define	FRF_AB_GPIO14_OEN_LBN 62
+#define	FRF_AB_GPIO14_OEN_WIDTH 1
+#define	FRF_AB_GPIO13_OEN_LBN 61
+#define	FRF_AB_GPIO13_OEN_WIDTH 1
+#define	FRF_AB_GPIO12_OEN_LBN 60
+#define	FRF_AB_GPIO12_OEN_WIDTH 1
+#define	FRF_AB_GPIO11_OEN_LBN 59
+#define	FRF_AB_GPIO11_OEN_WIDTH 1
+#define	FRF_AB_GPIO10_OEN_LBN 58
+#define	FRF_AB_GPIO10_OEN_WIDTH 1
+#define	FRF_AB_GPIO9_OEN_LBN 57
+#define	FRF_AB_GPIO9_OEN_WIDTH 1
+#define	FRF_AB_GPIO8_OEN_LBN 56
+#define	FRF_AB_GPIO8_OEN_WIDTH 1
+#define	FRF_AB_GPIO15_OUT_LBN 55
+#define	FRF_AB_GPIO15_OUT_WIDTH 1
+#define	FRF_AB_GPIO14_OUT_LBN 54
+#define	FRF_AB_GPIO14_OUT_WIDTH 1
+#define	FRF_AB_GPIO13_OUT_LBN 53
+#define	FRF_AB_GPIO13_OUT_WIDTH 1
+#define	FRF_AB_GPIO12_OUT_LBN 52
+#define	FRF_AB_GPIO12_OUT_WIDTH 1
+#define	FRF_AB_GPIO11_OUT_LBN 51
+#define	FRF_AB_GPIO11_OUT_WIDTH 1
+#define	FRF_AB_GPIO10_OUT_LBN 50
+#define	FRF_AB_GPIO10_OUT_WIDTH 1
+#define	FRF_AB_GPIO9_OUT_LBN 49
+#define	FRF_AB_GPIO9_OUT_WIDTH 1
+#define	FRF_AB_GPIO8_OUT_LBN 48
+#define	FRF_AB_GPIO8_OUT_WIDTH 1
+#define	FRF_AB_GPIO15_IN_LBN 47
+#define	FRF_AB_GPIO15_IN_WIDTH 1
+#define	FRF_AB_GPIO14_IN_LBN 46
+#define	FRF_AB_GPIO14_IN_WIDTH 1
+#define	FRF_AB_GPIO13_IN_LBN 45
+#define	FRF_AB_GPIO13_IN_WIDTH 1
+#define	FRF_AB_GPIO12_IN_LBN 44
+#define	FRF_AB_GPIO12_IN_WIDTH 1
+#define	FRF_AB_GPIO11_IN_LBN 43
+#define	FRF_AB_GPIO11_IN_WIDTH 1
+#define	FRF_AB_GPIO10_IN_LBN 42
+#define	FRF_AB_GPIO10_IN_WIDTH 1
+#define	FRF_AB_GPIO9_IN_LBN 41
+#define	FRF_AB_GPIO9_IN_WIDTH 1
+#define	FRF_AB_GPIO8_IN_LBN 40
+#define	FRF_AB_GPIO8_IN_WIDTH 1
+#define	FRF_AB_GPIO15_PWRUP_VALUE_LBN 39
+#define	FRF_AB_GPIO15_PWRUP_VALUE_WIDTH 1
+#define	FRF_AB_GPIO14_PWRUP_VALUE_LBN 38
+#define	FRF_AB_GPIO14_PWRUP_VALUE_WIDTH 1
+#define	FRF_AB_GPIO13_PWRUP_VALUE_LBN 37
+#define	FRF_AB_GPIO13_PWRUP_VALUE_WIDTH 1
+#define	FRF_AB_GPIO12_PWRUP_VALUE_LBN 36
+#define	FRF_AB_GPIO12_PWRUP_VALUE_WIDTH 1
+#define	FRF_AB_GPIO11_PWRUP_VALUE_LBN 35
+#define	FRF_AB_GPIO11_PWRUP_VALUE_WIDTH 1
+#define	FRF_AB_GPIO10_PWRUP_VALUE_LBN 34
+#define	FRF_AB_GPIO10_PWRUP_VALUE_WIDTH 1
+#define	FRF_AB_GPIO9_PWRUP_VALUE_LBN 33
+#define	FRF_AB_GPIO9_PWRUP_VALUE_WIDTH 1
+#define	FRF_AB_GPIO8_PWRUP_VALUE_LBN 32
+#define	FRF_AB_GPIO8_PWRUP_VALUE_WIDTH 1
+#define	FRF_AB_CLK156_OUT_EN_LBN 31
+#define	FRF_AB_CLK156_OUT_EN_WIDTH 1
+#define	FRF_AB_USE_NIC_CLK_LBN 30
+#define	FRF_AB_USE_NIC_CLK_WIDTH 1
+#define	FRF_AB_GPIO5_OEN_LBN 29
+#define	FRF_AB_GPIO5_OEN_WIDTH 1
+#define	FRF_AB_GPIO4_OEN_LBN 28
+#define	FRF_AB_GPIO4_OEN_WIDTH 1
+#define	FRF_AB_GPIO3_OEN_LBN 27
+#define	FRF_AB_GPIO3_OEN_WIDTH 1
+#define	FRF_AB_GPIO2_OEN_LBN 26
+#define	FRF_AB_GPIO2_OEN_WIDTH 1
+#define	FRF_AB_GPIO1_OEN_LBN 25
+#define	FRF_AB_GPIO1_OEN_WIDTH 1
+#define	FRF_AB_GPIO0_OEN_LBN 24
+#define	FRF_AB_GPIO0_OEN_WIDTH 1
+#define	FRF_AB_GPIO7_OUT_LBN 23
+#define	FRF_AB_GPIO7_OUT_WIDTH 1
+#define	FRF_AB_GPIO6_OUT_LBN 22
+#define	FRF_AB_GPIO6_OUT_WIDTH 1
+#define	FRF_AB_GPIO5_OUT_LBN 21
+#define	FRF_AB_GPIO5_OUT_WIDTH 1
+#define	FRF_AB_GPIO4_OUT_LBN 20
+#define	FRF_AB_GPIO4_OUT_WIDTH 1
+#define	FRF_AB_GPIO3_OUT_LBN 19
+#define	FRF_AB_GPIO3_OUT_WIDTH 1
+#define	FRF_AB_GPIO2_OUT_LBN 18
+#define	FRF_AB_GPIO2_OUT_WIDTH 1
+#define	FRF_AB_GPIO1_OUT_LBN 17
+#define	FRF_AB_GPIO1_OUT_WIDTH 1
+#define	FRF_AB_GPIO0_OUT_LBN 16
+#define	FRF_AB_GPIO0_OUT_WIDTH 1
+#define	FRF_AB_GPIO7_IN_LBN 15
+#define	FRF_AB_GPIO7_IN_WIDTH 1
+#define	FRF_AB_GPIO6_IN_LBN 14
+#define	FRF_AB_GPIO6_IN_WIDTH 1
+#define	FRF_AB_GPIO5_IN_LBN 13
+#define	FRF_AB_GPIO5_IN_WIDTH 1
+#define	FRF_AB_GPIO4_IN_LBN 12
+#define	FRF_AB_GPIO4_IN_WIDTH 1
+#define	FRF_AB_GPIO3_IN_LBN 11
+#define	FRF_AB_GPIO3_IN_WIDTH 1
+#define	FRF_AB_GPIO2_IN_LBN 10
+#define	FRF_AB_GPIO2_IN_WIDTH 1
+#define	FRF_AB_GPIO1_IN_LBN 9
+#define	FRF_AB_GPIO1_IN_WIDTH 1
+#define	FRF_AB_GPIO0_IN_LBN 8
+#define	FRF_AB_GPIO0_IN_WIDTH 1
+#define	FRF_AB_GPIO7_PWRUP_VALUE_LBN 7
+#define	FRF_AB_GPIO7_PWRUP_VALUE_WIDTH 1
+#define	FRF_AB_GPIO6_PWRUP_VALUE_LBN 6
+#define	FRF_AB_GPIO6_PWRUP_VALUE_WIDTH 1
+#define	FRF_AB_GPIO5_PWRUP_VALUE_LBN 5
+#define	FRF_AB_GPIO5_PWRUP_VALUE_WIDTH 1
+#define	FRF_AB_GPIO4_PWRUP_VALUE_LBN 4
+#define	FRF_AB_GPIO4_PWRUP_VALUE_WIDTH 1
+#define	FRF_AB_GPIO3_PWRUP_VALUE_LBN 3
+#define	FRF_AB_GPIO3_PWRUP_VALUE_WIDTH 1
+#define	FRF_AB_GPIO2_PWRUP_VALUE_LBN 2
+#define	FRF_AB_GPIO2_PWRUP_VALUE_WIDTH 1
+#define	FRF_AB_GPIO1_PWRUP_VALUE_LBN 1
+#define	FRF_AB_GPIO1_PWRUP_VALUE_WIDTH 1
+#define	FRF_AB_GPIO0_PWRUP_VALUE_LBN 0
+#define	FRF_AB_GPIO0_PWRUP_VALUE_WIDTH 1
+
+/* GLB_CTL_REG: Global control register */
+#define	FR_AB_GLB_CTL 0x00000220
+#define	FRF_AB_EXT_PHY_RST_CTL_LBN 63
+#define	FRF_AB_EXT_PHY_RST_CTL_WIDTH 1
+#define	FRF_AB_XAUI_SD_RST_CTL_LBN 62
+#define	FRF_AB_XAUI_SD_RST_CTL_WIDTH 1
+#define	FRF_AB_PCIE_SD_RST_CTL_LBN 61
+#define	FRF_AB_PCIE_SD_RST_CTL_WIDTH 1
+#define	FRF_AA_PCIX_RST_CTL_LBN 60
+#define	FRF_AA_PCIX_RST_CTL_WIDTH 1
+#define	FRF_BB_BIU_RST_CTL_LBN 60
+#define	FRF_BB_BIU_RST_CTL_WIDTH 1
+#define	FRF_AB_PCIE_STKY_RST_CTL_LBN 59
+#define	FRF_AB_PCIE_STKY_RST_CTL_WIDTH 1
+#define	FRF_AB_PCIE_NSTKY_RST_CTL_LBN 58
+#define	FRF_AB_PCIE_NSTKY_RST_CTL_WIDTH 1
+#define	FRF_AB_PCIE_CORE_RST_CTL_LBN 57
+#define	FRF_AB_PCIE_CORE_RST_CTL_WIDTH 1
+#define	FRF_AB_XGRX_RST_CTL_LBN 56
+#define	FRF_AB_XGRX_RST_CTL_WIDTH 1
+#define	FRF_AB_XGTX_RST_CTL_LBN 55
+#define	FRF_AB_XGTX_RST_CTL_WIDTH 1
+#define	FRF_AB_EM_RST_CTL_LBN 54
+#define	FRF_AB_EM_RST_CTL_WIDTH 1
+#define	FRF_AB_EV_RST_CTL_LBN 53
+#define	FRF_AB_EV_RST_CTL_WIDTH 1
+#define	FRF_AB_SR_RST_CTL_LBN 52
+#define	FRF_AB_SR_RST_CTL_WIDTH 1
+#define	FRF_AB_RX_RST_CTL_LBN 51
+#define	FRF_AB_RX_RST_CTL_WIDTH 1
+#define	FRF_AB_TX_RST_CTL_LBN 50
+#define	FRF_AB_TX_RST_CTL_WIDTH 1
+#define	FRF_AB_EE_RST_CTL_LBN 49
+#define	FRF_AB_EE_RST_CTL_WIDTH 1
+#define	FRF_AB_CS_RST_CTL_LBN 48
+#define	FRF_AB_CS_RST_CTL_WIDTH 1
+#define	FRF_AB_HOT_RST_CTL_LBN 40
+#define	FRF_AB_HOT_RST_CTL_WIDTH 2
+#define	FRF_AB_RST_EXT_PHY_LBN 31
+#define	FRF_AB_RST_EXT_PHY_WIDTH 1
+#define	FRF_AB_RST_XAUI_SD_LBN 30
+#define	FRF_AB_RST_XAUI_SD_WIDTH 1
+#define	FRF_AB_RST_PCIE_SD_LBN 29
+#define	FRF_AB_RST_PCIE_SD_WIDTH 1
+#define	FRF_AA_RST_PCIX_LBN 28
+#define	FRF_AA_RST_PCIX_WIDTH 1
+#define	FRF_BB_RST_BIU_LBN 28
+#define	FRF_BB_RST_BIU_WIDTH 1
+#define	FRF_AB_RST_PCIE_STKY_LBN 27
+#define	FRF_AB_RST_PCIE_STKY_WIDTH 1
+#define	FRF_AB_RST_PCIE_NSTKY_LBN 26
+#define	FRF_AB_RST_PCIE_NSTKY_WIDTH 1
+#define	FRF_AB_RST_PCIE_CORE_LBN 25
+#define	FRF_AB_RST_PCIE_CORE_WIDTH 1
+#define	FRF_AB_RST_XGRX_LBN 24
+#define	FRF_AB_RST_XGRX_WIDTH 1
+#define	FRF_AB_RST_XGTX_LBN 23
+#define	FRF_AB_RST_XGTX_WIDTH 1
+#define	FRF_AB_RST_EM_LBN 22
+#define	FRF_AB_RST_EM_WIDTH 1
+#define	FRF_AB_RST_EV_LBN 21
+#define	FRF_AB_RST_EV_WIDTH 1
+#define	FRF_AB_RST_SR_LBN 20
+#define	FRF_AB_RST_SR_WIDTH 1
+#define	FRF_AB_RST_RX_LBN 19
+#define	FRF_AB_RST_RX_WIDTH 1
+#define	FRF_AB_RST_TX_LBN 18
+#define	FRF_AB_RST_TX_WIDTH 1
+#define	FRF_AB_RST_SF_LBN 17
+#define	FRF_AB_RST_SF_WIDTH 1
+#define	FRF_AB_RST_CS_LBN 16
+#define	FRF_AB_RST_CS_WIDTH 1
+#define	FRF_AB_INT_RST_DUR_LBN 4
+#define	FRF_AB_INT_RST_DUR_WIDTH 3
+#define	FRF_AB_EXT_PHY_RST_DUR_LBN 1
+#define	FRF_AB_EXT_PHY_RST_DUR_WIDTH 3
+#define	FFE_AB_EXT_PHY_RST_DUR_10240US 7
+#define	FFE_AB_EXT_PHY_RST_DUR_5120US 6
+#define	FFE_AB_EXT_PHY_RST_DUR_2560US 5
+#define	FFE_AB_EXT_PHY_RST_DUR_1280US 4
+#define	FFE_AB_EXT_PHY_RST_DUR_640US 3
+#define	FFE_AB_EXT_PHY_RST_DUR_320US 2
+#define	FFE_AB_EXT_PHY_RST_DUR_160US 1
+#define	FFE_AB_EXT_PHY_RST_DUR_80US 0
+#define	FRF_AB_SWRST_LBN 0
+#define	FRF_AB_SWRST_WIDTH 1
+
+/* FATAL_INTR_REG_KER: Fatal interrupt register for Kernel */
+#define	FR_AZ_FATAL_INTR_KER 0x00000230
+#define	FRF_CZ_SRAM_PERR_INT_P_KER_EN_LBN 44
+#define	FRF_CZ_SRAM_PERR_INT_P_KER_EN_WIDTH 1
+#define	FRF_AB_PCI_BUSERR_INT_KER_EN_LBN 43
+#define	FRF_AB_PCI_BUSERR_INT_KER_EN_WIDTH 1
+#define	FRF_CZ_MBU_PERR_INT_KER_EN_LBN 43
+#define	FRF_CZ_MBU_PERR_INT_KER_EN_WIDTH 1
+#define	FRF_AZ_SRAM_OOB_INT_KER_EN_LBN 42
+#define	FRF_AZ_SRAM_OOB_INT_KER_EN_WIDTH 1
+#define	FRF_AZ_BUFID_OOB_INT_KER_EN_LBN 41
+#define	FRF_AZ_BUFID_OOB_INT_KER_EN_WIDTH 1
+#define	FRF_AZ_MEM_PERR_INT_KER_EN_LBN 40
+#define	FRF_AZ_MEM_PERR_INT_KER_EN_WIDTH 1
+#define	FRF_AZ_RBUF_OWN_INT_KER_EN_LBN 39
+#define	FRF_AZ_RBUF_OWN_INT_KER_EN_WIDTH 1
+#define	FRF_AZ_TBUF_OWN_INT_KER_EN_LBN 38
+#define	FRF_AZ_TBUF_OWN_INT_KER_EN_WIDTH 1
+#define	FRF_AZ_RDESCQ_OWN_INT_KER_EN_LBN 37
+#define	FRF_AZ_RDESCQ_OWN_INT_KER_EN_WIDTH 1
+#define	FRF_AZ_TDESCQ_OWN_INT_KER_EN_LBN 36
+#define	FRF_AZ_TDESCQ_OWN_INT_KER_EN_WIDTH 1
+#define	FRF_AZ_EVQ_OWN_INT_KER_EN_LBN 35
+#define	FRF_AZ_EVQ_OWN_INT_KER_EN_WIDTH 1
+#define	FRF_AZ_EVF_OFLO_INT_KER_EN_LBN 34
+#define	FRF_AZ_EVF_OFLO_INT_KER_EN_WIDTH 1
+#define	FRF_AZ_ILL_ADR_INT_KER_EN_LBN 33
+#define	FRF_AZ_ILL_ADR_INT_KER_EN_WIDTH 1
+#define	FRF_AZ_SRM_PERR_INT_KER_EN_LBN 32
+#define	FRF_AZ_SRM_PERR_INT_KER_EN_WIDTH 1
+#define	FRF_CZ_SRAM_PERR_INT_P_KER_LBN 12
+#define	FRF_CZ_SRAM_PERR_INT_P_KER_WIDTH 1
+#define	FRF_AB_PCI_BUSERR_INT_KER_LBN 11
+#define	FRF_AB_PCI_BUSERR_INT_KER_WIDTH 1
+#define	FRF_CZ_MBU_PERR_INT_KER_LBN 11
+#define	FRF_CZ_MBU_PERR_INT_KER_WIDTH 1
+#define	FRF_AZ_SRAM_OOB_INT_KER_LBN 10
+#define	FRF_AZ_SRAM_OOB_INT_KER_WIDTH 1
+#define	FRF_AZ_BUFID_DC_OOB_INT_KER_LBN 9
+#define	FRF_AZ_BUFID_DC_OOB_INT_KER_WIDTH 1
+#define	FRF_AZ_MEM_PERR_INT_KER_LBN 8
+#define	FRF_AZ_MEM_PERR_INT_KER_WIDTH 1
+#define	FRF_AZ_RBUF_OWN_INT_KER_LBN 7
+#define	FRF_AZ_RBUF_OWN_INT_KER_WIDTH 1
+#define	FRF_AZ_TBUF_OWN_INT_KER_LBN 6
+#define	FRF_AZ_TBUF_OWN_INT_KER_WIDTH 1
+#define	FRF_AZ_RDESCQ_OWN_INT_KER_LBN 5
+#define	FRF_AZ_RDESCQ_OWN_INT_KER_WIDTH 1
+#define	FRF_AZ_TDESCQ_OWN_INT_KER_LBN 4
+#define	FRF_AZ_TDESCQ_OWN_INT_KER_WIDTH 1
+#define	FRF_AZ_EVQ_OWN_INT_KER_LBN 3
+#define	FRF_AZ_EVQ_OWN_INT_KER_WIDTH 1
+#define	FRF_AZ_EVF_OFLO_INT_KER_LBN 2
+#define	FRF_AZ_EVF_OFLO_INT_KER_WIDTH 1
+#define	FRF_AZ_ILL_ADR_INT_KER_LBN 1
+#define	FRF_AZ_ILL_ADR_INT_KER_WIDTH 1
+#define	FRF_AZ_SRM_PERR_INT_KER_LBN 0
+#define	FRF_AZ_SRM_PERR_INT_KER_WIDTH 1
+
+/* FATAL_INTR_REG_CHAR: Fatal interrupt register for Char */
+#define	FR_BZ_FATAL_INTR_CHAR 0x00000240
+#define	FRF_CZ_SRAM_PERR_INT_P_CHAR_EN_LBN 44
+#define	FRF_CZ_SRAM_PERR_INT_P_CHAR_EN_WIDTH 1
+#define	FRF_BB_PCI_BUSERR_INT_CHAR_EN_LBN 43
+#define	FRF_BB_PCI_BUSERR_INT_CHAR_EN_WIDTH 1
+#define	FRF_CZ_MBU_PERR_INT_CHAR_EN_LBN 43
+#define	FRF_CZ_MBU_PERR_INT_CHAR_EN_WIDTH 1
+#define	FRF_BZ_SRAM_OOB_INT_CHAR_EN_LBN 42
+#define	FRF_BZ_SRAM_OOB_INT_CHAR_EN_WIDTH 1
+#define	FRF_BZ_BUFID_OOB_INT_CHAR_EN_LBN 41
+#define	FRF_BZ_BUFID_OOB_INT_CHAR_EN_WIDTH 1
+#define	FRF_BZ_MEM_PERR_INT_CHAR_EN_LBN 40
+#define	FRF_BZ_MEM_PERR_INT_CHAR_EN_WIDTH 1
+#define	FRF_BZ_RBUF_OWN_INT_CHAR_EN_LBN 39
+#define	FRF_BZ_RBUF_OWN_INT_CHAR_EN_WIDTH 1
+#define	FRF_BZ_TBUF_OWN_INT_CHAR_EN_LBN 38
+#define	FRF_BZ_TBUF_OWN_INT_CHAR_EN_WIDTH 1
+#define	FRF_BZ_RDESCQ_OWN_INT_CHAR_EN_LBN 37
+#define	FRF_BZ_RDESCQ_OWN_INT_CHAR_EN_WIDTH 1
+#define	FRF_BZ_TDESCQ_OWN_INT_CHAR_EN_LBN 36
+#define	FRF_BZ_TDESCQ_OWN_INT_CHAR_EN_WIDTH 1
+#define	FRF_BZ_EVQ_OWN_INT_CHAR_EN_LBN 35
+#define	FRF_BZ_EVQ_OWN_INT_CHAR_EN_WIDTH 1
+#define	FRF_BZ_EVF_OFLO_INT_CHAR_EN_LBN 34
+#define	FRF_BZ_EVF_OFLO_INT_CHAR_EN_WIDTH 1
+#define	FRF_BZ_ILL_ADR_INT_CHAR_EN_LBN 33
+#define	FRF_BZ_ILL_ADR_INT_CHAR_EN_WIDTH 1
+#define	FRF_BZ_SRM_PERR_INT_CHAR_EN_LBN 32
+#define	FRF_BZ_SRM_PERR_INT_CHAR_EN_WIDTH 1
+#define	FRF_CZ_SRAM_PERR_INT_P_CHAR_LBN 12
+#define	FRF_CZ_SRAM_PERR_INT_P_CHAR_WIDTH 1
+#define	FRF_BB_PCI_BUSERR_INT_CHAR_LBN 11
+#define	FRF_BB_PCI_BUSERR_INT_CHAR_WIDTH 1
+#define	FRF_CZ_MBU_PERR_INT_CHAR_LBN 11
+#define	FRF_CZ_MBU_PERR_INT_CHAR_WIDTH 1
+#define	FRF_BZ_SRAM_OOB_INT_CHAR_LBN 10
+#define	FRF_BZ_SRAM_OOB_INT_CHAR_WIDTH 1
+#define	FRF_BZ_BUFID_DC_OOB_INT_CHAR_LBN 9
+#define	FRF_BZ_BUFID_DC_OOB_INT_CHAR_WIDTH 1
+#define	FRF_BZ_MEM_PERR_INT_CHAR_LBN 8
+#define	FRF_BZ_MEM_PERR_INT_CHAR_WIDTH 1
+#define	FRF_BZ_RBUF_OWN_INT_CHAR_LBN 7
+#define	FRF_BZ_RBUF_OWN_INT_CHAR_WIDTH 1
+#define	FRF_BZ_TBUF_OWN_INT_CHAR_LBN 6
+#define	FRF_BZ_TBUF_OWN_INT_CHAR_WIDTH 1
+#define	FRF_BZ_RDESCQ_OWN_INT_CHAR_LBN 5
+#define	FRF_BZ_RDESCQ_OWN_INT_CHAR_WIDTH 1
+#define	FRF_BZ_TDESCQ_OWN_INT_CHAR_LBN 4
+#define	FRF_BZ_TDESCQ_OWN_INT_CHAR_WIDTH 1
+#define	FRF_BZ_EVQ_OWN_INT_CHAR_LBN 3
+#define	FRF_BZ_EVQ_OWN_INT_CHAR_WIDTH 1
+#define	FRF_BZ_EVF_OFLO_INT_CHAR_LBN 2
+#define	FRF_BZ_EVF_OFLO_INT_CHAR_WIDTH 1
+#define	FRF_BZ_ILL_ADR_INT_CHAR_LBN 1
+#define	FRF_BZ_ILL_ADR_INT_CHAR_WIDTH 1
+#define	FRF_BZ_SRM_PERR_INT_CHAR_LBN 0
+#define	FRF_BZ_SRM_PERR_INT_CHAR_WIDTH 1
+
+/* DP_CTRL_REG: Datapath control register */
+#define	FR_BZ_DP_CTRL 0x00000250
+#define	FRF_BZ_FLS_EVQ_ID_LBN 0
+#define	FRF_BZ_FLS_EVQ_ID_WIDTH 12
+
+/* MEM_STAT_REG: Memory status register */
+#define	FR_AZ_MEM_STAT 0x00000260
+#define	FRF_AB_MEM_PERR_VEC_LBN 53
+#define	FRF_AB_MEM_PERR_VEC_WIDTH 38
+#define	FRF_AB_MBIST_CORR_LBN 38
+#define	FRF_AB_MBIST_CORR_WIDTH 15
+#define	FRF_AB_MBIST_ERR_LBN 0
+#define	FRF_AB_MBIST_ERR_WIDTH 40
+#define	FRF_CZ_MEM_PERR_VEC_LBN 0
+#define	FRF_CZ_MEM_PERR_VEC_WIDTH 35
+
+/* CS_DEBUG_REG: Debug register */
+#define	FR_AZ_CS_DEBUG 0x00000270
+#define	FRF_AB_GLB_DEBUG2_SEL_LBN 50
+#define	FRF_AB_GLB_DEBUG2_SEL_WIDTH 3
+#define	FRF_AB_DEBUG_BLK_SEL2_LBN 47
+#define	FRF_AB_DEBUG_BLK_SEL2_WIDTH 3
+#define	FRF_AB_DEBUG_BLK_SEL1_LBN 44
+#define	FRF_AB_DEBUG_BLK_SEL1_WIDTH 3
+#define	FRF_AB_DEBUG_BLK_SEL0_LBN 41
+#define	FRF_AB_DEBUG_BLK_SEL0_WIDTH 3
+#define	FRF_CZ_CS_PORT_NUM_LBN 40
+#define	FRF_CZ_CS_PORT_NUM_WIDTH 2
+#define	FRF_AB_MISC_DEBUG_ADDR_LBN 36
+#define	FRF_AB_MISC_DEBUG_ADDR_WIDTH 5
+#define	FRF_AB_SERDES_DEBUG_ADDR_LBN 31
+#define	FRF_AB_SERDES_DEBUG_ADDR_WIDTH 5
+#define	FRF_CZ_CS_PORT_FPE_LBN 1
+#define	FRF_CZ_CS_PORT_FPE_WIDTH 35
+#define	FRF_AB_EM_DEBUG_ADDR_LBN 26
+#define	FRF_AB_EM_DEBUG_ADDR_WIDTH 5
+#define	FRF_AB_SR_DEBUG_ADDR_LBN 21
+#define	FRF_AB_SR_DEBUG_ADDR_WIDTH 5
+#define	FRF_AB_EV_DEBUG_ADDR_LBN 16
+#define	FRF_AB_EV_DEBUG_ADDR_WIDTH 5
+#define	FRF_AB_RX_DEBUG_ADDR_LBN 11
+#define	FRF_AB_RX_DEBUG_ADDR_WIDTH 5
+#define	FRF_AB_TX_DEBUG_ADDR_LBN 6
+#define	FRF_AB_TX_DEBUG_ADDR_WIDTH 5
+#define	FRF_AB_CS_BIU_DEBUG_ADDR_LBN 1
+#define	FRF_AB_CS_BIU_DEBUG_ADDR_WIDTH 5
+#define	FRF_AZ_CS_DEBUG_EN_LBN 0
+#define	FRF_AZ_CS_DEBUG_EN_WIDTH 1
+
+/* DRIVER_REG: Driver scratch register [0-7] */
+#define	FR_AZ_DRIVER 0x00000280
+#define	FR_AZ_DRIVER_STEP 16
+#define	FR_AZ_DRIVER_ROWS 8
+#define	FRF_AZ_DRIVER_DW0_LBN 0
+#define	FRF_AZ_DRIVER_DW0_WIDTH 32
+
+/* ALTERA_BUILD_REG: Altera build register */
+#define	FR_AZ_ALTERA_BUILD 0x00000300
+#define	FRF_AZ_ALTERA_BUILD_VER_LBN 0
+#define	FRF_AZ_ALTERA_BUILD_VER_WIDTH 32
+
+/* CSR_SPARE_REG: Spare register */
+#define	FR_AZ_CSR_SPARE 0x00000310
+#define	FRF_AB_MEM_PERR_EN_LBN 64
+#define	FRF_AB_MEM_PERR_EN_WIDTH 38
+#define	FRF_CZ_MEM_PERR_EN_LBN 64
+#define	FRF_CZ_MEM_PERR_EN_WIDTH 35
+#define	FRF_AB_MEM_PERR_EN_TX_DATA_LBN 72
+#define	FRF_AB_MEM_PERR_EN_TX_DATA_WIDTH 2
+#define	FRF_AZ_CSR_SPARE_BITS_LBN 0
+#define	FRF_AZ_CSR_SPARE_BITS_WIDTH 32
+
+/* PCIE_SD_CTL0123_REG: PCIE SerDes control register 0 to 3 */
+#define	FR_AB_PCIE_SD_CTL0123 0x00000320
+#define	FRF_AB_PCIE_TESTSIG_H_LBN 96
+#define	FRF_AB_PCIE_TESTSIG_H_WIDTH 19
+#define	FRF_AB_PCIE_TESTSIG_L_LBN 64
+#define	FRF_AB_PCIE_TESTSIG_L_WIDTH 19
+#define	FRF_AB_PCIE_OFFSET_LBN 56
+#define	FRF_AB_PCIE_OFFSET_WIDTH 8
+#define	FRF_AB_PCIE_OFFSETEN_H_LBN 55
+#define	FRF_AB_PCIE_OFFSETEN_H_WIDTH 1
+#define	FRF_AB_PCIE_OFFSETEN_L_LBN 54
+#define	FRF_AB_PCIE_OFFSETEN_L_WIDTH 1
+#define	FRF_AB_PCIE_HIVMODE_H_LBN 53
+#define	FRF_AB_PCIE_HIVMODE_H_WIDTH 1
+#define	FRF_AB_PCIE_HIVMODE_L_LBN 52
+#define	FRF_AB_PCIE_HIVMODE_L_WIDTH 1
+#define	FRF_AB_PCIE_PARRESET_H_LBN 51
+#define	FRF_AB_PCIE_PARRESET_H_WIDTH 1
+#define	FRF_AB_PCIE_PARRESET_L_LBN 50
+#define	FRF_AB_PCIE_PARRESET_L_WIDTH 1
+#define	FRF_AB_PCIE_LPBKWDRV_H_LBN 49
+#define	FRF_AB_PCIE_LPBKWDRV_H_WIDTH 1
+#define	FRF_AB_PCIE_LPBKWDRV_L_LBN 48
+#define	FRF_AB_PCIE_LPBKWDRV_L_WIDTH 1
+#define	FRF_AB_PCIE_LPBK_LBN 40
+#define	FRF_AB_PCIE_LPBK_WIDTH 8
+#define	FRF_AB_PCIE_PARLPBK_LBN 32
+#define	FRF_AB_PCIE_PARLPBK_WIDTH 8
+#define	FRF_AB_PCIE_RXTERMADJ_H_LBN 30
+#define	FRF_AB_PCIE_RXTERMADJ_H_WIDTH 2
+#define	FRF_AB_PCIE_RXTERMADJ_L_LBN 28
+#define	FRF_AB_PCIE_RXTERMADJ_L_WIDTH 2
+#define	FFE_AB_PCIE_RXTERMADJ_MIN15PCNT 3
+#define	FFE_AB_PCIE_RXTERMADJ_PL10PCNT 2
+#define	FFE_AB_PCIE_RXTERMADJ_MIN17PCNT 1
+#define	FFE_AB_PCIE_RXTERMADJ_NOMNL 0
+#define	FRF_AB_PCIE_TXTERMADJ_H_LBN 26
+#define	FRF_AB_PCIE_TXTERMADJ_H_WIDTH 2
+#define	FRF_AB_PCIE_TXTERMADJ_L_LBN 24
+#define	FRF_AB_PCIE_TXTERMADJ_L_WIDTH 2
+#define	FFE_AB_PCIE_TXTERMADJ_MIN15PCNT 3
+#define	FFE_AB_PCIE_TXTERMADJ_PL10PCNT 2
+#define	FFE_AB_PCIE_TXTERMADJ_MIN17PCNT 1
+#define	FFE_AB_PCIE_TXTERMADJ_NOMNL 0
+#define	FRF_AB_PCIE_RXEQCTL_H_LBN 18
+#define	FRF_AB_PCIE_RXEQCTL_H_WIDTH 2
+#define	FRF_AB_PCIE_RXEQCTL_L_LBN 16
+#define	FRF_AB_PCIE_RXEQCTL_L_WIDTH 2
+#define	FFE_AB_PCIE_RXEQCTL_OFF_ALT 3
+#define	FFE_AB_PCIE_RXEQCTL_OFF 2
+#define	FFE_AB_PCIE_RXEQCTL_MIN 1
+#define	FFE_AB_PCIE_RXEQCTL_MAX 0
+#define	FRF_AB_PCIE_HIDRV_LBN 8
+#define	FRF_AB_PCIE_HIDRV_WIDTH 8
+#define	FRF_AB_PCIE_LODRV_LBN 0
+#define	FRF_AB_PCIE_LODRV_WIDTH 8
+
+/* PCIE_SD_CTL45_REG: PCIE SerDes control register 4 and 5 */
+#define	FR_AB_PCIE_SD_CTL45 0x00000330
+#define	FRF_AB_PCIE_DTX7_LBN 60
+#define	FRF_AB_PCIE_DTX7_WIDTH 4
+#define	FRF_AB_PCIE_DTX6_LBN 56
+#define	FRF_AB_PCIE_DTX6_WIDTH 4
+#define	FRF_AB_PCIE_DTX5_LBN 52
+#define	FRF_AB_PCIE_DTX5_WIDTH 4
+#define	FRF_AB_PCIE_DTX4_LBN 48
+#define	FRF_AB_PCIE_DTX4_WIDTH 4
+#define	FRF_AB_PCIE_DTX3_LBN 44
+#define	FRF_AB_PCIE_DTX3_WIDTH 4
+#define	FRF_AB_PCIE_DTX2_LBN 40
+#define	FRF_AB_PCIE_DTX2_WIDTH 4
+#define	FRF_AB_PCIE_DTX1_LBN 36
+#define	FRF_AB_PCIE_DTX1_WIDTH 4
+#define	FRF_AB_PCIE_DTX0_LBN 32
+#define	FRF_AB_PCIE_DTX0_WIDTH 4
+#define	FRF_AB_PCIE_DEQ7_LBN 28
+#define	FRF_AB_PCIE_DEQ7_WIDTH 4
+#define	FRF_AB_PCIE_DEQ6_LBN 24
+#define	FRF_AB_PCIE_DEQ6_WIDTH 4
+#define	FRF_AB_PCIE_DEQ5_LBN 20
+#define	FRF_AB_PCIE_DEQ5_WIDTH 4
+#define	FRF_AB_PCIE_DEQ4_LBN 16
+#define	FRF_AB_PCIE_DEQ4_WIDTH 4
+#define	FRF_AB_PCIE_DEQ3_LBN 12
+#define	FRF_AB_PCIE_DEQ3_WIDTH 4
+#define	FRF_AB_PCIE_DEQ2_LBN 8
+#define	FRF_AB_PCIE_DEQ2_WIDTH 4
+#define	FRF_AB_PCIE_DEQ1_LBN 4
+#define	FRF_AB_PCIE_DEQ1_WIDTH 4
+#define	FRF_AB_PCIE_DEQ0_LBN 0
+#define	FRF_AB_PCIE_DEQ0_WIDTH 4
+
+/* PCIE_PCS_CTL_STAT_REG: PCIE PCS control and status register */
+#define	FR_AB_PCIE_PCS_CTL_STAT 0x00000340
+#define	FRF_AB_PCIE_PRBSERRCOUNT0_H_LBN 52
+#define	FRF_AB_PCIE_PRBSERRCOUNT0_H_WIDTH 4
+#define	FRF_AB_PCIE_PRBSERRCOUNT0_L_LBN 48
+#define	FRF_AB_PCIE_PRBSERRCOUNT0_L_WIDTH 4
+#define	FRF_AB_PCIE_PRBSERR_LBN 40
+#define	FRF_AB_PCIE_PRBSERR_WIDTH 8
+#define	FRF_AB_PCIE_PRBSERRH0_LBN 32
+#define	FRF_AB_PCIE_PRBSERRH0_WIDTH 8
+#define	FRF_AB_PCIE_FASTINIT_H_LBN 15
+#define	FRF_AB_PCIE_FASTINIT_H_WIDTH 1
+#define	FRF_AB_PCIE_FASTINIT_L_LBN 14
+#define	FRF_AB_PCIE_FASTINIT_L_WIDTH 1
+#define	FRF_AB_PCIE_CTCDISABLE_H_LBN 13
+#define	FRF_AB_PCIE_CTCDISABLE_H_WIDTH 1
+#define	FRF_AB_PCIE_CTCDISABLE_L_LBN 12
+#define	FRF_AB_PCIE_CTCDISABLE_L_WIDTH 1
+#define	FRF_AB_PCIE_PRBSSYNC_H_LBN 11
+#define	FRF_AB_PCIE_PRBSSYNC_H_WIDTH 1
+#define	FRF_AB_PCIE_PRBSSYNC_L_LBN 10
+#define	FRF_AB_PCIE_PRBSSYNC_L_WIDTH 1
+#define	FRF_AB_PCIE_PRBSERRACK_H_LBN 9
+#define	FRF_AB_PCIE_PRBSERRACK_H_WIDTH 1
+#define	FRF_AB_PCIE_PRBSERRACK_L_LBN 8
+#define	FRF_AB_PCIE_PRBSERRACK_L_WIDTH 1
+#define	FRF_AB_PCIE_PRBSSEL_LBN 0
+#define	FRF_AB_PCIE_PRBSSEL_WIDTH 8
+
+/* DEBUG_DATA_OUT_REG: Live Debug and Debug 2 out ports */
+#define	FR_BB_DEBUG_DATA_OUT 0x00000350
+#define	FRF_BB_DEBUG2_PORT_LBN 25
+#define	FRF_BB_DEBUG2_PORT_WIDTH 15
+#define	FRF_BB_DEBUG1_PORT_LBN 0
+#define	FRF_BB_DEBUG1_PORT_WIDTH 25
+
+/* EVQ_RPTR_REGP0: Event queue read pointer register */
+#define	FR_BZ_EVQ_RPTR_P0 0x00000400
+#define	FR_BZ_EVQ_RPTR_P0_STEP 8192
+#define	FR_BZ_EVQ_RPTR_P0_ROWS 1024
+/* EVQ_RPTR_REG_KER: Event queue read pointer register */
+#define	FR_AA_EVQ_RPTR_KER 0x00011b00
+#define	FR_AA_EVQ_RPTR_KER_STEP 4
+#define	FR_AA_EVQ_RPTR_KER_ROWS 4
+/* EVQ_RPTR_REG: Event queue read pointer register */
+#define	FR_BZ_EVQ_RPTR 0x00fa0000
+#define	FR_BZ_EVQ_RPTR_STEP 16
+#define	FR_BB_EVQ_RPTR_ROWS 4096
+#define	FR_CZ_EVQ_RPTR_ROWS 1024
+/* EVQ_RPTR_REGP123: Event queue read pointer register */
+#define	FR_BB_EVQ_RPTR_P123 0x01000400
+#define	FR_BB_EVQ_RPTR_P123_STEP 8192
+#define	FR_BB_EVQ_RPTR_P123_ROWS 3072
+#define	FRF_AZ_EVQ_RPTR_VLD_LBN 15
+#define	FRF_AZ_EVQ_RPTR_VLD_WIDTH 1
+#define	FRF_AZ_EVQ_RPTR_LBN 0
+#define	FRF_AZ_EVQ_RPTR_WIDTH 15
+
+/* TIMER_COMMAND_REGP0: Timer Command Registers */
+#define	FR_BZ_TIMER_COMMAND_P0 0x00000420
+#define	FR_BZ_TIMER_COMMAND_P0_STEP 8192
+#define	FR_BZ_TIMER_COMMAND_P0_ROWS 1024
+/* TIMER_COMMAND_REG_KER: Timer Command Registers */
+#define	FR_AA_TIMER_COMMAND_KER 0x00000420
+#define	FR_AA_TIMER_COMMAND_KER_STEP 8192
+#define	FR_AA_TIMER_COMMAND_KER_ROWS 4
+/* TIMER_COMMAND_REGP123: Timer Command Registers */
+#define	FR_BB_TIMER_COMMAND_P123 0x01000420
+#define	FR_BB_TIMER_COMMAND_P123_STEP 8192
+#define	FR_BB_TIMER_COMMAND_P123_ROWS 3072
+#define	FRF_CZ_TC_TIMER_MODE_LBN 14
+#define	FRF_CZ_TC_TIMER_MODE_WIDTH 2
+#define	FRF_AB_TC_TIMER_MODE_LBN 12
+#define	FRF_AB_TC_TIMER_MODE_WIDTH 2
+#define	FRF_CZ_TC_TIMER_VAL_LBN 0
+#define	FRF_CZ_TC_TIMER_VAL_WIDTH 14
+#define	FRF_AB_TC_TIMER_VAL_LBN 0
+#define	FRF_AB_TC_TIMER_VAL_WIDTH 12
+
+/* DRV_EV_REG: Driver generated event register */
+#define	FR_AZ_DRV_EV 0x00000440
+#define	FRF_AZ_DRV_EV_QID_LBN 64
+#define	FRF_AZ_DRV_EV_QID_WIDTH 12
+#define	FRF_AZ_DRV_EV_DATA_LBN 0
+#define	FRF_AZ_DRV_EV_DATA_WIDTH 64
+
+/* EVQ_CTL_REG: Event queue control register */
+#define	FR_AZ_EVQ_CTL 0x00000450
+#define	FRF_CZ_RX_EVQ_WAKEUP_MASK_LBN 15
+#define	FRF_CZ_RX_EVQ_WAKEUP_MASK_WIDTH 10
+#define	FRF_BB_RX_EVQ_WAKEUP_MASK_LBN 15
+#define	FRF_BB_RX_EVQ_WAKEUP_MASK_WIDTH 6
+#define	FRF_AZ_EVQ_OWNERR_CTL_LBN 14
+#define	FRF_AZ_EVQ_OWNERR_CTL_WIDTH 1
+#define	FRF_AZ_EVQ_FIFO_AF_TH_LBN 7
+#define	FRF_AZ_EVQ_FIFO_AF_TH_WIDTH 7
+#define	FRF_AZ_EVQ_FIFO_NOTAF_TH_LBN 0
+#define	FRF_AZ_EVQ_FIFO_NOTAF_TH_WIDTH 7
+
+/* EVQ_CNT1_REG: Event counter 1 register */
+#define	FR_AZ_EVQ_CNT1 0x00000460
+#define	FRF_AZ_EVQ_CNT_PRE_FIFO_LBN 120
+#define	FRF_AZ_EVQ_CNT_PRE_FIFO_WIDTH 7
+#define	FRF_AZ_EVQ_CNT_TOBIU_LBN 100
+#define	FRF_AZ_EVQ_CNT_TOBIU_WIDTH 20
+#define	FRF_AZ_EVQ_TX_REQ_CNT_LBN 80
+#define	FRF_AZ_EVQ_TX_REQ_CNT_WIDTH 20
+#define	FRF_AZ_EVQ_RX_REQ_CNT_LBN 60
+#define	FRF_AZ_EVQ_RX_REQ_CNT_WIDTH 20
+#define	FRF_AZ_EVQ_EM_REQ_CNT_LBN 40
+#define	FRF_AZ_EVQ_EM_REQ_CNT_WIDTH 20
+#define	FRF_AZ_EVQ_CSR_REQ_CNT_LBN 20
+#define	FRF_AZ_EVQ_CSR_REQ_CNT_WIDTH 20
+#define	FRF_AZ_EVQ_ERR_REQ_CNT_LBN 0
+#define	FRF_AZ_EVQ_ERR_REQ_CNT_WIDTH 20
+
+/* EVQ_CNT2_REG: Event counter 2 register */
+#define	FR_AZ_EVQ_CNT2 0x00000470
+#define	FRF_AZ_EVQ_UPD_REQ_CNT_LBN 104
+#define	FRF_AZ_EVQ_UPD_REQ_CNT_WIDTH 20
+#define	FRF_AZ_EVQ_CLR_REQ_CNT_LBN 84
+#define	FRF_AZ_EVQ_CLR_REQ_CNT_WIDTH 20
+#define	FRF_AZ_EVQ_RDY_CNT_LBN 80
+#define	FRF_AZ_EVQ_RDY_CNT_WIDTH 4
+#define	FRF_AZ_EVQ_WU_REQ_CNT_LBN 60
+#define	FRF_AZ_EVQ_WU_REQ_CNT_WIDTH 20
+#define	FRF_AZ_EVQ_WET_REQ_CNT_LBN 40
+#define	FRF_AZ_EVQ_WET_REQ_CNT_WIDTH 20
+#define	FRF_AZ_EVQ_INIT_REQ_CNT_LBN 20
+#define	FRF_AZ_EVQ_INIT_REQ_CNT_WIDTH 20
+#define	FRF_AZ_EVQ_TM_REQ_CNT_LBN 0
+#define	FRF_AZ_EVQ_TM_REQ_CNT_WIDTH 20
+
+/* USR_EV_REG: Event mailbox register */
+#define	FR_CZ_USR_EV 0x00000540
+#define	FR_CZ_USR_EV_STEP 8192
+#define	FR_CZ_USR_EV_ROWS 1024
+#define	FRF_CZ_USR_EV_DATA_LBN 0
+#define	FRF_CZ_USR_EV_DATA_WIDTH 32
+
+/* BUF_TBL_CFG_REG: Buffer table configuration register */
+#define	FR_AZ_BUF_TBL_CFG 0x00000600
+#define	FRF_AZ_BUF_TBL_MODE_LBN 3
+#define	FRF_AZ_BUF_TBL_MODE_WIDTH 1
+
+/* SRM_RX_DC_CFG_REG: SRAM receive descriptor cache configuration register */
+#define	FR_AZ_SRM_RX_DC_CFG 0x00000610
+#define	FRF_AZ_SRM_CLK_TMP_EN_LBN 21
+#define	FRF_AZ_SRM_CLK_TMP_EN_WIDTH 1
+#define	FRF_AZ_SRM_RX_DC_BASE_ADR_LBN 0
+#define	FRF_AZ_SRM_RX_DC_BASE_ADR_WIDTH 21
+
+/* SRM_TX_DC_CFG_REG: SRAM transmit descriptor cache configuration register */
+#define	FR_AZ_SRM_TX_DC_CFG 0x00000620
+#define	FRF_AZ_SRM_TX_DC_BASE_ADR_LBN 0
+#define	FRF_AZ_SRM_TX_DC_BASE_ADR_WIDTH 21
+
+/* SRM_CFG_REG: SRAM configuration register */
+#define	FR_AZ_SRM_CFG 0x00000630
+#define	FRF_AZ_SRM_OOB_ADR_INTEN_LBN 5
+#define	FRF_AZ_SRM_OOB_ADR_INTEN_WIDTH 1
+#define	FRF_AZ_SRM_OOB_BUF_INTEN_LBN 4
+#define	FRF_AZ_SRM_OOB_BUF_INTEN_WIDTH 1
+#define	FRF_AZ_SRM_INIT_EN_LBN 3
+#define	FRF_AZ_SRM_INIT_EN_WIDTH 1
+#define	FRF_AZ_SRM_NUM_BANK_LBN 2
+#define	FRF_AZ_SRM_NUM_BANK_WIDTH 1
+#define	FRF_AZ_SRM_BANK_SIZE_LBN 0
+#define	FRF_AZ_SRM_BANK_SIZE_WIDTH 2
+
+/* BUF_TBL_UPD_REG: Buffer table update register */
+#define	FR_AZ_BUF_TBL_UPD 0x00000650
+#define	FRF_AZ_BUF_UPD_CMD_LBN 63
+#define	FRF_AZ_BUF_UPD_CMD_WIDTH 1
+#define	FRF_AZ_BUF_CLR_CMD_LBN 62
+#define	FRF_AZ_BUF_CLR_CMD_WIDTH 1
+#define	FRF_AZ_BUF_CLR_END_ID_LBN 32
+#define	FRF_AZ_BUF_CLR_END_ID_WIDTH 20
+#define	FRF_AZ_BUF_CLR_START_ID_LBN 0
+#define	FRF_AZ_BUF_CLR_START_ID_WIDTH 20
+
+/* SRM_UPD_EVQ_REG: Buffer table update register */
+#define	FR_AZ_SRM_UPD_EVQ 0x00000660
+#define	FRF_AZ_SRM_UPD_EVQ_ID_LBN 0
+#define	FRF_AZ_SRM_UPD_EVQ_ID_WIDTH 12
+
+/* SRAM_PARITY_REG: SRAM parity register. */
+#define	FR_AZ_SRAM_PARITY 0x00000670
+#define	FRF_CZ_BYPASS_ECC_LBN 3
+#define	FRF_CZ_BYPASS_ECC_WIDTH 1
+#define	FRF_CZ_SEC_INT_LBN 2
+#define	FRF_CZ_SEC_INT_WIDTH 1
+#define	FRF_CZ_FORCE_SRAM_DOUBLE_ERR_LBN 1
+#define	FRF_CZ_FORCE_SRAM_DOUBLE_ERR_WIDTH 1
+#define	FRF_AB_FORCE_SRAM_PERR_LBN 0
+#define	FRF_AB_FORCE_SRAM_PERR_WIDTH 1
+#define	FRF_CZ_FORCE_SRAM_SINGLE_ERR_LBN 0
+#define	FRF_CZ_FORCE_SRAM_SINGLE_ERR_WIDTH 1
+
+/* RX_CFG_REG: Receive configuration register */
+#define	FR_AZ_RX_CFG 0x00000800
+#define	FRF_CZ_RX_MIN_KBUF_SIZE_LBN 72
+#define	FRF_CZ_RX_MIN_KBUF_SIZE_WIDTH 14
+#define	FRF_CZ_RX_HDR_SPLIT_EN_LBN 71
+#define	FRF_CZ_RX_HDR_SPLIT_EN_WIDTH 1
+#define	FRF_CZ_RX_HDR_SPLIT_PLD_BUF_SIZE_LBN 62
+#define	FRF_CZ_RX_HDR_SPLIT_PLD_BUF_SIZE_WIDTH 9
+#define	FRF_CZ_RX_HDR_SPLIT_HDR_BUF_SIZE_LBN 53
+#define	FRF_CZ_RX_HDR_SPLIT_HDR_BUF_SIZE_WIDTH 9
+#define	FRF_CZ_RX_PRE_RFF_IPG_LBN 49
+#define	FRF_CZ_RX_PRE_RFF_IPG_WIDTH 4
+#define	FRF_BZ_RX_TCP_SUP_LBN 48
+#define	FRF_BZ_RX_TCP_SUP_WIDTH 1
+#define	FRF_BZ_RX_INGR_EN_LBN 47
+#define	FRF_BZ_RX_INGR_EN_WIDTH 1
+#define	FRF_BZ_RX_IP_HASH_LBN 46
+#define	FRF_BZ_RX_IP_HASH_WIDTH 1
+#define	FRF_BZ_RX_HASH_ALG_LBN 45
+#define	FRF_BZ_RX_HASH_ALG_WIDTH 1
+#define	FRF_BZ_RX_HASH_INSRT_HDR_LBN 44
+#define	FRF_BZ_RX_HASH_INSRT_HDR_WIDTH 1
+#define	FRF_BZ_RX_DESC_PUSH_EN_LBN 43
+#define	FRF_BZ_RX_DESC_PUSH_EN_WIDTH 1
+#define	FRF_BZ_RX_RDW_PATCH_EN_LBN 42
+#define	FRF_BZ_RX_RDW_PATCH_EN_WIDTH 1
+#define	FRF_BB_RX_PCI_BURST_SIZE_LBN 39
+#define	FRF_BB_RX_PCI_BURST_SIZE_WIDTH 3
+#define	FRF_BZ_RX_OWNERR_CTL_LBN 38
+#define	FRF_BZ_RX_OWNERR_CTL_WIDTH 1
+#define	FRF_BZ_RX_XON_TX_TH_LBN 33
+#define	FRF_BZ_RX_XON_TX_TH_WIDTH 5
+#define	FRF_AA_RX_DESC_PUSH_EN_LBN 35
+#define	FRF_AA_RX_DESC_PUSH_EN_WIDTH 1
+#define	FRF_AA_RX_RDW_PATCH_EN_LBN 34
+#define	FRF_AA_RX_RDW_PATCH_EN_WIDTH 1
+#define	FRF_AA_RX_PCI_BURST_SIZE_LBN 31
+#define	FRF_AA_RX_PCI_BURST_SIZE_WIDTH 3
+#define	FRF_BZ_RX_XOFF_TX_TH_LBN 28
+#define	FRF_BZ_RX_XOFF_TX_TH_WIDTH 5
+#define	FRF_AA_RX_OWNERR_CTL_LBN 30
+#define	FRF_AA_RX_OWNERR_CTL_WIDTH 1
+#define	FRF_AA_RX_XON_TX_TH_LBN 25
+#define	FRF_AA_RX_XON_TX_TH_WIDTH 5
+#define	FRF_BZ_RX_USR_BUF_SIZE_LBN 19
+#define	FRF_BZ_RX_USR_BUF_SIZE_WIDTH 9
+#define	FRF_AA_RX_XOFF_TX_TH_LBN 20
+#define	FRF_AA_RX_XOFF_TX_TH_WIDTH 5
+#define	FRF_AA_RX_USR_BUF_SIZE_LBN 11
+#define	FRF_AA_RX_USR_BUF_SIZE_WIDTH 9
+#define	FRF_BZ_RX_XON_MAC_TH_LBN 10
+#define	FRF_BZ_RX_XON_MAC_TH_WIDTH 9
+#define	FRF_AA_RX_XON_MAC_TH_LBN 6
+#define	FRF_AA_RX_XON_MAC_TH_WIDTH 5
+#define	FRF_BZ_RX_XOFF_MAC_TH_LBN 1
+#define	FRF_BZ_RX_XOFF_MAC_TH_WIDTH 9
+#define	FRF_AA_RX_XOFF_MAC_TH_LBN 1
+#define	FRF_AA_RX_XOFF_MAC_TH_WIDTH 5
+#define	FRF_AZ_RX_XOFF_MAC_EN_LBN 0
+#define	FRF_AZ_RX_XOFF_MAC_EN_WIDTH 1
+
+/* RX_FILTER_CTL_REG: Receive filter control registers */
+#define	FR_BZ_RX_FILTER_CTL 0x00000810
+#define	FRF_CZ_ETHERNET_WILDCARD_SEARCH_LIMIT_LBN 94
+#define	FRF_CZ_ETHERNET_WILDCARD_SEARCH_LIMIT_WIDTH 8
+#define	FRF_CZ_ETHERNET_FULL_SEARCH_LIMIT_LBN 86
+#define	FRF_CZ_ETHERNET_FULL_SEARCH_LIMIT_WIDTH 8
+#define	FRF_CZ_RX_FILTER_ALL_VLAN_ETHERTYPES_LBN 85
+#define	FRF_CZ_RX_FILTER_ALL_VLAN_ETHERTYPES_WIDTH 1
+#define	FRF_CZ_RX_VLAN_MATCH_ETHERTYPE_LBN 69
+#define	FRF_CZ_RX_VLAN_MATCH_ETHERTYPE_WIDTH 16
+#define	FRF_CZ_MULTICAST_NOMATCH_Q_ID_LBN 57
+#define	FRF_CZ_MULTICAST_NOMATCH_Q_ID_WIDTH 12
+#define	FRF_CZ_MULTICAST_NOMATCH_RSS_ENABLED_LBN 56
+#define	FRF_CZ_MULTICAST_NOMATCH_RSS_ENABLED_WIDTH 1
+#define	FRF_CZ_MULTICAST_NOMATCH_IP_OVERRIDE_LBN 55
+#define	FRF_CZ_MULTICAST_NOMATCH_IP_OVERRIDE_WIDTH 1
+#define	FRF_CZ_UNICAST_NOMATCH_Q_ID_LBN 43
+#define	FRF_CZ_UNICAST_NOMATCH_Q_ID_WIDTH 12
+#define	FRF_CZ_UNICAST_NOMATCH_RSS_ENABLED_LBN 42
+#define	FRF_CZ_UNICAST_NOMATCH_RSS_ENABLED_WIDTH 1
+#define	FRF_CZ_UNICAST_NOMATCH_IP_OVERRIDE_LBN 41
+#define	FRF_CZ_UNICAST_NOMATCH_IP_OVERRIDE_WIDTH 1
+#define	FRF_BZ_SCATTER_ENBL_NO_MATCH_Q_LBN 40
+#define	FRF_BZ_SCATTER_ENBL_NO_MATCH_Q_WIDTH 1
+#define	FRF_BZ_UDP_FULL_SRCH_LIMIT_LBN 32
+#define	FRF_BZ_UDP_FULL_SRCH_LIMIT_WIDTH 8
+#define	FRF_BZ_NUM_KER_LBN 24
+#define	FRF_BZ_NUM_KER_WIDTH 2
+#define	FRF_BZ_UDP_WILD_SRCH_LIMIT_LBN 16
+#define	FRF_BZ_UDP_WILD_SRCH_LIMIT_WIDTH 8
+#define	FRF_BZ_TCP_WILD_SRCH_LIMIT_LBN 8
+#define	FRF_BZ_TCP_WILD_SRCH_LIMIT_WIDTH 8
+#define	FRF_BZ_TCP_FULL_SRCH_LIMIT_LBN 0
+#define	FRF_BZ_TCP_FULL_SRCH_LIMIT_WIDTH 8
+
+/* RX_FLUSH_DESCQ_REG: Receive flush descriptor queue register */
+#define	FR_AZ_RX_FLUSH_DESCQ 0x00000820
+#define	FRF_AZ_RX_FLUSH_DESCQ_CMD_LBN 24
+#define	FRF_AZ_RX_FLUSH_DESCQ_CMD_WIDTH 1
+#define	FRF_AZ_RX_FLUSH_DESCQ_LBN 0
+#define	FRF_AZ_RX_FLUSH_DESCQ_WIDTH 12
+
+/* RX_DESC_UPD_REGP0: Receive descriptor update register. */
+#define	FR_BZ_RX_DESC_UPD_P0 0x00000830
+#define	FR_BZ_RX_DESC_UPD_P0_STEP 8192
+#define	FR_BZ_RX_DESC_UPD_P0_ROWS 1024
+/* RX_DESC_UPD_REG_KER: Receive descriptor update register. */
+#define	FR_AA_RX_DESC_UPD_KER 0x00000830
+#define	FR_AA_RX_DESC_UPD_KER_STEP 8192
+#define	FR_AA_RX_DESC_UPD_KER_ROWS 4
+/* RX_DESC_UPD_REGP123: Receive descriptor update register. */
+#define	FR_BB_RX_DESC_UPD_P123 0x01000830
+#define	FR_BB_RX_DESC_UPD_P123_STEP 8192
+#define	FR_BB_RX_DESC_UPD_P123_ROWS 3072
+#define	FRF_AZ_RX_DESC_WPTR_LBN 96
+#define	FRF_AZ_RX_DESC_WPTR_WIDTH 12
+#define	FRF_AZ_RX_DESC_PUSH_CMD_LBN 95
+#define	FRF_AZ_RX_DESC_PUSH_CMD_WIDTH 1
+#define	FRF_AZ_RX_DESC_LBN 0
+#define	FRF_AZ_RX_DESC_WIDTH 64
+
+/* RX_DC_CFG_REG: Receive descriptor cache configuration register */
+#define	FR_AZ_RX_DC_CFG 0x00000840
+#define	FRF_AB_RX_MAX_PF_LBN 2
+#define	FRF_AB_RX_MAX_PF_WIDTH 2
+#define	FRF_AZ_RX_DC_SIZE_LBN 0
+#define	FRF_AZ_RX_DC_SIZE_WIDTH 2
+#define	FFE_AZ_RX_DC_SIZE_64 3
+#define	FFE_AZ_RX_DC_SIZE_32 2
+#define	FFE_AZ_RX_DC_SIZE_16 1
+#define	FFE_AZ_RX_DC_SIZE_8 0
+
+/* RX_DC_PF_WM_REG: Receive descriptor cache pre-fetch watermark register */
+#define	FR_AZ_RX_DC_PF_WM 0x00000850
+#define	FRF_AZ_RX_DC_PF_HWM_LBN 6
+#define	FRF_AZ_RX_DC_PF_HWM_WIDTH 6
+#define	FRF_AZ_RX_DC_PF_LWM_LBN 0
+#define	FRF_AZ_RX_DC_PF_LWM_WIDTH 6
+
+/* RX_RSS_TKEY_REG: RSS Toeplitz hash key */
+#define	FR_BZ_RX_RSS_TKEY 0x00000860
+#define	FRF_BZ_RX_RSS_TKEY_HI_LBN 64
+#define	FRF_BZ_RX_RSS_TKEY_HI_WIDTH 64
+#define	FRF_BZ_RX_RSS_TKEY_LO_LBN 0
+#define	FRF_BZ_RX_RSS_TKEY_LO_WIDTH 64
+
+/* RX_NODESC_DROP_REG: Receive dropped packet counter register */
+#define	FR_AZ_RX_NODESC_DROP 0x00000880
+#define	FRF_CZ_RX_NODESC_DROP_CNT_LBN 0
+#define	FRF_CZ_RX_NODESC_DROP_CNT_WIDTH 32
+#define	FRF_AB_RX_NODESC_DROP_CNT_LBN 0
+#define	FRF_AB_RX_NODESC_DROP_CNT_WIDTH 16
+
+/* RX_SELF_RST_REG: Receive self reset register */
+#define	FR_AA_RX_SELF_RST 0x00000890
+#define	FRF_AA_RX_ISCSI_DIS_LBN 17
+#define	FRF_AA_RX_ISCSI_DIS_WIDTH 1
+#define	FRF_AA_RX_SW_RST_REG_LBN 16
+#define	FRF_AA_RX_SW_RST_REG_WIDTH 1
+#define FRF_AA_RX_NODESC_WAIT_DIS_LBN 9
+#define FRF_AA_RX_NODESC_WAIT_DIS_WIDTH 1
+#define	FRF_AA_RX_SELF_RST_EN_LBN 8
+#define	FRF_AA_RX_SELF_RST_EN_WIDTH 1
+#define	FRF_AA_RX_MAX_PF_LAT_LBN 4
+#define	FRF_AA_RX_MAX_PF_LAT_WIDTH 4
+#define	FRF_AA_RX_MAX_LU_LAT_LBN 0
+#define	FRF_AA_RX_MAX_LU_LAT_WIDTH 4
+
+/* RX_DEBUG_REG: undocumented register */
+#define	FR_AZ_RX_DEBUG 0x000008a0
+#define	FRF_AZ_RX_DEBUG_LBN 0
+#define	FRF_AZ_RX_DEBUG_WIDTH 64
+
+/* RX_PUSH_DROP_REG: Receive descriptor push dropped counter register */
+#define	FR_AZ_RX_PUSH_DROP 0x000008b0
+#define	FRF_AZ_RX_PUSH_DROP_CNT_LBN 0
+#define	FRF_AZ_RX_PUSH_DROP_CNT_WIDTH 32
+
+/* RX_RSS_IPV6_REG1: IPv6 RSS Toeplitz hash key low bytes */
+#define	FR_CZ_RX_RSS_IPV6_REG1 0x000008d0
+#define	FRF_CZ_RX_RSS_IPV6_TKEY_LO_LBN 0
+#define	FRF_CZ_RX_RSS_IPV6_TKEY_LO_WIDTH 128
+
+/* RX_RSS_IPV6_REG2: IPv6 RSS Toeplitz hash key middle bytes */
+#define	FR_CZ_RX_RSS_IPV6_REG2 0x000008e0
+#define	FRF_CZ_RX_RSS_IPV6_TKEY_MID_LBN 0
+#define	FRF_CZ_RX_RSS_IPV6_TKEY_MID_WIDTH 128
+
+/* RX_RSS_IPV6_REG3: IPv6 RSS Toeplitz hash key upper bytes and IPv6 RSS settings */
+#define	FR_CZ_RX_RSS_IPV6_REG3 0x000008f0
+#define	FRF_CZ_RX_RSS_IPV6_THASH_ENABLE_LBN 66
+#define	FRF_CZ_RX_RSS_IPV6_THASH_ENABLE_WIDTH 1
+#define	FRF_CZ_RX_RSS_IPV6_IP_THASH_ENABLE_LBN 65
+#define	FRF_CZ_RX_RSS_IPV6_IP_THASH_ENABLE_WIDTH 1
+#define	FRF_CZ_RX_RSS_IPV6_TCP_SUPPRESS_LBN 64
+#define	FRF_CZ_RX_RSS_IPV6_TCP_SUPPRESS_WIDTH 1
+#define	FRF_CZ_RX_RSS_IPV6_TKEY_HI_LBN 0
+#define	FRF_CZ_RX_RSS_IPV6_TKEY_HI_WIDTH 64
+
+/* TX_FLUSH_DESCQ_REG: Transmit flush descriptor queue register */
+#define	FR_AZ_TX_FLUSH_DESCQ 0x00000a00
+#define	FRF_AZ_TX_FLUSH_DESCQ_CMD_LBN 12
+#define	FRF_AZ_TX_FLUSH_DESCQ_CMD_WIDTH 1
+#define	FRF_AZ_TX_FLUSH_DESCQ_LBN 0
+#define	FRF_AZ_TX_FLUSH_DESCQ_WIDTH 12
+
+/* TX_DESC_UPD_REGP0: Transmit descriptor update register. */
+#define	FR_BZ_TX_DESC_UPD_P0 0x00000a10
+#define	FR_BZ_TX_DESC_UPD_P0_STEP 8192
+#define	FR_BZ_TX_DESC_UPD_P0_ROWS 1024
+/* TX_DESC_UPD_REG_KER: Transmit descriptor update register. */
+#define	FR_AA_TX_DESC_UPD_KER 0x00000a10
+#define	FR_AA_TX_DESC_UPD_KER_STEP 8192
+#define	FR_AA_TX_DESC_UPD_KER_ROWS 8
+/* TX_DESC_UPD_REGP123: Transmit descriptor update register. */
+#define	FR_BB_TX_DESC_UPD_P123 0x01000a10
+#define	FR_BB_TX_DESC_UPD_P123_STEP 8192
+#define	FR_BB_TX_DESC_UPD_P123_ROWS 3072
+#define	FRF_AZ_TX_DESC_WPTR_LBN 96
+#define	FRF_AZ_TX_DESC_WPTR_WIDTH 12
+#define	FRF_AZ_TX_DESC_PUSH_CMD_LBN 95
+#define	FRF_AZ_TX_DESC_PUSH_CMD_WIDTH 1
+#define	FRF_AZ_TX_DESC_LBN 0
+#define	FRF_AZ_TX_DESC_WIDTH 95
+
+/* TX_DC_CFG_REG: Transmit descriptor cache configuration register */
+#define	FR_AZ_TX_DC_CFG 0x00000a20
+#define	FRF_AZ_TX_DC_SIZE_LBN 0
+#define	FRF_AZ_TX_DC_SIZE_WIDTH 2
+#define	FFE_AZ_TX_DC_SIZE_32 2
+#define	FFE_AZ_TX_DC_SIZE_16 1
+#define	FFE_AZ_TX_DC_SIZE_8 0
+
+/* TX_CHKSM_CFG_REG: Transmit checksum configuration register */
+#define	FR_AA_TX_CHKSM_CFG 0x00000a30
+#define	FRF_AA_TX_Q_CHKSM_DIS_96_127_LBN 96
+#define	FRF_AA_TX_Q_CHKSM_DIS_96_127_WIDTH 32
+#define	FRF_AA_TX_Q_CHKSM_DIS_64_95_LBN 64
+#define	FRF_AA_TX_Q_CHKSM_DIS_64_95_WIDTH 32
+#define	FRF_AA_TX_Q_CHKSM_DIS_32_63_LBN 32
+#define	FRF_AA_TX_Q_CHKSM_DIS_32_63_WIDTH 32
+#define	FRF_AA_TX_Q_CHKSM_DIS_0_31_LBN 0
+#define	FRF_AA_TX_Q_CHKSM_DIS_0_31_WIDTH 32
+
+/* TX_CFG_REG: Transmit configuration register */
+#define	FR_AZ_TX_CFG 0x00000a50
+#define	FRF_CZ_TX_CONT_LOOKUP_THRESH_RANGE_LBN 114
+#define	FRF_CZ_TX_CONT_LOOKUP_THRESH_RANGE_WIDTH 8
+#define	FRF_CZ_TX_FILTER_TEST_MODE_BIT_LBN 113
+#define	FRF_CZ_TX_FILTER_TEST_MODE_BIT_WIDTH 1
+#define	FRF_CZ_TX_ETH_FILTER_WILD_SEARCH_RANGE_LBN 105
+#define	FRF_CZ_TX_ETH_FILTER_WILD_SEARCH_RANGE_WIDTH 8
+#define	FRF_CZ_TX_ETH_FILTER_FULL_SEARCH_RANGE_LBN 97
+#define	FRF_CZ_TX_ETH_FILTER_FULL_SEARCH_RANGE_WIDTH 8
+#define	FRF_CZ_TX_UDPIP_FILTER_WILD_SEARCH_RANGE_LBN 89
+#define	FRF_CZ_TX_UDPIP_FILTER_WILD_SEARCH_RANGE_WIDTH 8
+#define	FRF_CZ_TX_UDPIP_FILTER_FULL_SEARCH_RANGE_LBN 81
+#define	FRF_CZ_TX_UDPIP_FILTER_FULL_SEARCH_RANGE_WIDTH 8
+#define	FRF_CZ_TX_TCPIP_FILTER_WILD_SEARCH_RANGE_LBN 73
+#define	FRF_CZ_TX_TCPIP_FILTER_WILD_SEARCH_RANGE_WIDTH 8
+#define	FRF_CZ_TX_TCPIP_FILTER_FULL_SEARCH_RANGE_LBN 65
+#define	FRF_CZ_TX_TCPIP_FILTER_FULL_SEARCH_RANGE_WIDTH 8
+#define	FRF_CZ_TX_FILTER_ALL_VLAN_ETHERTYPES_BIT_LBN 64
+#define	FRF_CZ_TX_FILTER_ALL_VLAN_ETHERTYPES_BIT_WIDTH 1
+#define	FRF_CZ_TX_VLAN_MATCH_ETHERTYPE_RANGE_LBN 48
+#define	FRF_CZ_TX_VLAN_MATCH_ETHERTYPE_RANGE_WIDTH 16
+#define	FRF_CZ_TX_FILTER_EN_BIT_LBN 47
+#define	FRF_CZ_TX_FILTER_EN_BIT_WIDTH 1
+#define	FRF_AZ_TX_IP_ID_P0_OFS_LBN 16
+#define	FRF_AZ_TX_IP_ID_P0_OFS_WIDTH 15
+#define	FRF_AZ_TX_NO_EOP_DISC_EN_LBN 5
+#define	FRF_AZ_TX_NO_EOP_DISC_EN_WIDTH 1
+#define	FRF_AZ_TX_P1_PRI_EN_LBN 4
+#define	FRF_AZ_TX_P1_PRI_EN_WIDTH 1
+#define	FRF_AZ_TX_OWNERR_CTL_LBN 2
+#define	FRF_AZ_TX_OWNERR_CTL_WIDTH 1
+#define	FRF_AA_TX_NON_IP_DROP_DIS_LBN 1
+#define	FRF_AA_TX_NON_IP_DROP_DIS_WIDTH 1
+#define	FRF_AZ_TX_IP_ID_REP_EN_LBN 0
+#define	FRF_AZ_TX_IP_ID_REP_EN_WIDTH 1
+
+/* TX_PUSH_DROP_REG: Transmit push dropped register */
+#define	FR_AZ_TX_PUSH_DROP 0x00000a60
+#define	FRF_AZ_TX_PUSH_DROP_CNT_LBN 0
+#define	FRF_AZ_TX_PUSH_DROP_CNT_WIDTH 32
+
+/* TX_RESERVED_REG: Transmit configuration register */
+#define	FR_AZ_TX_RESERVED 0x00000a80
+#define	FRF_AZ_TX_EVT_CNT_LBN 121
+#define	FRF_AZ_TX_EVT_CNT_WIDTH 7
+#define	FRF_AZ_TX_PREF_AGE_CNT_LBN 119
+#define	FRF_AZ_TX_PREF_AGE_CNT_WIDTH 2
+#define	FRF_AZ_TX_RD_COMP_TMR_LBN 96
+#define	FRF_AZ_TX_RD_COMP_TMR_WIDTH 23
+#define	FRF_AZ_TX_PUSH_EN_LBN 89
+#define	FRF_AZ_TX_PUSH_EN_WIDTH 1
+#define	FRF_AZ_TX_PUSH_CHK_DIS_LBN 88
+#define	FRF_AZ_TX_PUSH_CHK_DIS_WIDTH 1
+#define	FRF_AZ_TX_D_FF_FULL_P0_LBN 85
+#define	FRF_AZ_TX_D_FF_FULL_P0_WIDTH 1
+#define	FRF_AZ_TX_DMAR_ST_P0_LBN 81
+#define	FRF_AZ_TX_DMAR_ST_P0_WIDTH 1
+#define	FRF_AZ_TX_DMAQ_ST_LBN 78
+#define	FRF_AZ_TX_DMAQ_ST_WIDTH 1
+#define	FRF_AZ_TX_RX_SPACER_LBN 64
+#define	FRF_AZ_TX_RX_SPACER_WIDTH 8
+#define	FRF_AZ_TX_DROP_ABORT_EN_LBN 60
+#define	FRF_AZ_TX_DROP_ABORT_EN_WIDTH 1
+#define	FRF_AZ_TX_SOFT_EVT_EN_LBN 59
+#define	FRF_AZ_TX_SOFT_EVT_EN_WIDTH 1
+#define	FRF_AZ_TX_PS_EVT_DIS_LBN 58
+#define	FRF_AZ_TX_PS_EVT_DIS_WIDTH 1
+#define	FRF_AZ_TX_RX_SPACER_EN_LBN 57
+#define	FRF_AZ_TX_RX_SPACER_EN_WIDTH 1
+#define	FRF_AZ_TX_XP_TIMER_LBN 52
+#define	FRF_AZ_TX_XP_TIMER_WIDTH 5
+#define	FRF_AZ_TX_PREF_SPACER_LBN 44
+#define	FRF_AZ_TX_PREF_SPACER_WIDTH 8
+#define	FRF_AZ_TX_PREF_WD_TMR_LBN 22
+#define	FRF_AZ_TX_PREF_WD_TMR_WIDTH 22
+#define	FRF_AZ_TX_ONLY1TAG_LBN 21
+#define	FRF_AZ_TX_ONLY1TAG_WIDTH 1
+#define	FRF_AZ_TX_PREF_THRESHOLD_LBN 19
+#define	FRF_AZ_TX_PREF_THRESHOLD_WIDTH 2
+#define	FRF_AZ_TX_ONE_PKT_PER_Q_LBN 18
+#define	FRF_AZ_TX_ONE_PKT_PER_Q_WIDTH 1
+#define	FRF_AZ_TX_DIS_NON_IP_EV_LBN 17
+#define	FRF_AZ_TX_DIS_NON_IP_EV_WIDTH 1
+#define	FRF_AA_TX_DMA_FF_THR_LBN 16
+#define	FRF_AA_TX_DMA_FF_THR_WIDTH 1
+#define	FRF_AZ_TX_DMA_SPACER_LBN 8
+#define	FRF_AZ_TX_DMA_SPACER_WIDTH 8
+#define	FRF_AA_TX_TCP_DIS_LBN 7
+#define	FRF_AA_TX_TCP_DIS_WIDTH 1
+#define	FRF_BZ_TX_FLUSH_MIN_LEN_EN_LBN 7
+#define	FRF_BZ_TX_FLUSH_MIN_LEN_EN_WIDTH 1
+#define	FRF_AA_TX_IP_DIS_LBN 6
+#define	FRF_AA_TX_IP_DIS_WIDTH 1
+#define	FRF_AZ_TX_MAX_CPL_LBN 2
+#define	FRF_AZ_TX_MAX_CPL_WIDTH 2
+#define	FFE_AZ_TX_MAX_CPL_16 3
+#define	FFE_AZ_TX_MAX_CPL_8 2
+#define	FFE_AZ_TX_MAX_CPL_4 1
+#define	FFE_AZ_TX_MAX_CPL_NOLIMIT 0
+#define	FRF_AZ_TX_MAX_PREF_LBN 0
+#define	FRF_AZ_TX_MAX_PREF_WIDTH 2
+#define	FFE_AZ_TX_MAX_PREF_32 3
+#define	FFE_AZ_TX_MAX_PREF_16 2
+#define	FFE_AZ_TX_MAX_PREF_8 1
+#define	FFE_AZ_TX_MAX_PREF_OFF 0
+
+/* TX_PACE_REG: Transmit pace control register */
+#define	FR_BZ_TX_PACE 0x00000a90
+#define	FRF_BZ_TX_PACE_SB_NOT_AF_LBN 19
+#define	FRF_BZ_TX_PACE_SB_NOT_AF_WIDTH 10
+#define	FRF_BZ_TX_PACE_SB_AF_LBN 9
+#define	FRF_BZ_TX_PACE_SB_AF_WIDTH 10
+#define	FRF_BZ_TX_PACE_FB_BASE_LBN 5
+#define	FRF_BZ_TX_PACE_FB_BASE_WIDTH 4
+#define	FRF_BZ_TX_PACE_BIN_TH_LBN 0
+#define	FRF_BZ_TX_PACE_BIN_TH_WIDTH 5
+
+/* TX_PACE_DROP_QID_REG: PACE Drop QID Counter */
+#define	FR_BZ_TX_PACE_DROP_QID 0x00000aa0
+#define	FRF_BZ_TX_PACE_QID_DRP_CNT_LBN 0
+#define	FRF_BZ_TX_PACE_QID_DRP_CNT_WIDTH 16
+
+/* TX_VLAN_REG: Transmit VLAN tag register */
+#define	FR_BB_TX_VLAN 0x00000ae0
+#define	FRF_BB_TX_VLAN_EN_LBN 127
+#define	FRF_BB_TX_VLAN_EN_WIDTH 1
+#define	FRF_BB_TX_VLAN7_PORT1_EN_LBN 125
+#define	FRF_BB_TX_VLAN7_PORT1_EN_WIDTH 1
+#define	FRF_BB_TX_VLAN7_PORT0_EN_LBN 124
+#define	FRF_BB_TX_VLAN7_PORT0_EN_WIDTH 1
+#define	FRF_BB_TX_VLAN7_LBN 112
+#define	FRF_BB_TX_VLAN7_WIDTH 12
+#define	FRF_BB_TX_VLAN6_PORT1_EN_LBN 109
+#define	FRF_BB_TX_VLAN6_PORT1_EN_WIDTH 1
+#define	FRF_BB_TX_VLAN6_PORT0_EN_LBN 108
+#define	FRF_BB_TX_VLAN6_PORT0_EN_WIDTH 1
+#define	FRF_BB_TX_VLAN6_LBN 96
+#define	FRF_BB_TX_VLAN6_WIDTH 12
+#define	FRF_BB_TX_VLAN5_PORT1_EN_LBN 93
+#define	FRF_BB_TX_VLAN5_PORT1_EN_WIDTH 1
+#define	FRF_BB_TX_VLAN5_PORT0_EN_LBN 92
+#define	FRF_BB_TX_VLAN5_PORT0_EN_WIDTH 1
+#define	FRF_BB_TX_VLAN5_LBN 80
+#define	FRF_BB_TX_VLAN5_WIDTH 12
+#define	FRF_BB_TX_VLAN4_PORT1_EN_LBN 77
+#define	FRF_BB_TX_VLAN4_PORT1_EN_WIDTH 1
+#define	FRF_BB_TX_VLAN4_PORT0_EN_LBN 76
+#define	FRF_BB_TX_VLAN4_PORT0_EN_WIDTH 1
+#define	FRF_BB_TX_VLAN4_LBN 64
+#define	FRF_BB_TX_VLAN4_WIDTH 12
+#define	FRF_BB_TX_VLAN3_PORT1_EN_LBN 61
+#define	FRF_BB_TX_VLAN3_PORT1_EN_WIDTH 1
+#define	FRF_BB_TX_VLAN3_PORT0_EN_LBN 60
+#define	FRF_BB_TX_VLAN3_PORT0_EN_WIDTH 1
+#define	FRF_BB_TX_VLAN3_LBN 48
+#define	FRF_BB_TX_VLAN3_WIDTH 12
+#define	FRF_BB_TX_VLAN2_PORT1_EN_LBN 45
+#define	FRF_BB_TX_VLAN2_PORT1_EN_WIDTH 1
+#define	FRF_BB_TX_VLAN2_PORT0_EN_LBN 44
+#define	FRF_BB_TX_VLAN2_PORT0_EN_WIDTH 1
+#define	FRF_BB_TX_VLAN2_LBN 32
+#define	FRF_BB_TX_VLAN2_WIDTH 12
+#define	FRF_BB_TX_VLAN1_PORT1_EN_LBN 29
+#define	FRF_BB_TX_VLAN1_PORT1_EN_WIDTH 1
+#define	FRF_BB_TX_VLAN1_PORT0_EN_LBN 28
+#define	FRF_BB_TX_VLAN1_PORT0_EN_WIDTH 1
+#define	FRF_BB_TX_VLAN1_LBN 16
+#define	FRF_BB_TX_VLAN1_WIDTH 12
+#define	FRF_BB_TX_VLAN0_PORT1_EN_LBN 13
+#define	FRF_BB_TX_VLAN0_PORT1_EN_WIDTH 1
+#define	FRF_BB_TX_VLAN0_PORT0_EN_LBN 12
+#define	FRF_BB_TX_VLAN0_PORT0_EN_WIDTH 1
+#define	FRF_BB_TX_VLAN0_LBN 0
+#define	FRF_BB_TX_VLAN0_WIDTH 12
+
+/* TX_IPFIL_PORTEN_REG: Transmit filter control register */
+#define	FR_BZ_TX_IPFIL_PORTEN 0x00000af0
+#define	FRF_BZ_TX_MADR0_FIL_EN_LBN 64
+#define	FRF_BZ_TX_MADR0_FIL_EN_WIDTH 1
+#define	FRF_BB_TX_IPFIL31_PORT_EN_LBN 62
+#define	FRF_BB_TX_IPFIL31_PORT_EN_WIDTH 1
+#define	FRF_BB_TX_IPFIL30_PORT_EN_LBN 60
+#define	FRF_BB_TX_IPFIL30_PORT_EN_WIDTH 1
+#define	FRF_BB_TX_IPFIL29_PORT_EN_LBN 58
+#define	FRF_BB_TX_IPFIL29_PORT_EN_WIDTH 1
+#define	FRF_BB_TX_IPFIL28_PORT_EN_LBN 56
+#define	FRF_BB_TX_IPFIL28_PORT_EN_WIDTH 1
+#define	FRF_BB_TX_IPFIL27_PORT_EN_LBN 54
+#define	FRF_BB_TX_IPFIL27_PORT_EN_WIDTH 1
+#define	FRF_BB_TX_IPFIL26_PORT_EN_LBN 52
+#define	FRF_BB_TX_IPFIL26_PORT_EN_WIDTH 1
+#define	FRF_BB_TX_IPFIL25_PORT_EN_LBN 50
+#define	FRF_BB_TX_IPFIL25_PORT_EN_WIDTH 1
+#define	FRF_BB_TX_IPFIL24_PORT_EN_LBN 48
+#define	FRF_BB_TX_IPFIL24_PORT_EN_WIDTH 1
+#define	FRF_BB_TX_IPFIL23_PORT_EN_LBN 46
+#define	FRF_BB_TX_IPFIL23_PORT_EN_WIDTH 1
+#define	FRF_BB_TX_IPFIL22_PORT_EN_LBN 44
+#define	FRF_BB_TX_IPFIL22_PORT_EN_WIDTH 1
+#define	FRF_BB_TX_IPFIL21_PORT_EN_LBN 42
+#define	FRF_BB_TX_IPFIL21_PORT_EN_WIDTH 1
+#define	FRF_BB_TX_IPFIL20_PORT_EN_LBN 40
+#define	FRF_BB_TX_IPFIL20_PORT_EN_WIDTH 1
+#define	FRF_BB_TX_IPFIL19_PORT_EN_LBN 38
+#define	FRF_BB_TX_IPFIL19_PORT_EN_WIDTH 1
+#define	FRF_BB_TX_IPFIL18_PORT_EN_LBN 36
+#define	FRF_BB_TX_IPFIL18_PORT_EN_WIDTH 1
+#define	FRF_BB_TX_IPFIL17_PORT_EN_LBN 34
+#define	FRF_BB_TX_IPFIL17_PORT_EN_WIDTH 1
+#define	FRF_BB_TX_IPFIL16_PORT_EN_LBN 32
+#define	FRF_BB_TX_IPFIL16_PORT_EN_WIDTH 1
+#define	FRF_BB_TX_IPFIL15_PORT_EN_LBN 30
+#define	FRF_BB_TX_IPFIL15_PORT_EN_WIDTH 1
+#define	FRF_BB_TX_IPFIL14_PORT_EN_LBN 28
+#define	FRF_BB_TX_IPFIL14_PORT_EN_WIDTH 1
+#define	FRF_BB_TX_IPFIL13_PORT_EN_LBN 26
+#define	FRF_BB_TX_IPFIL13_PORT_EN_WIDTH 1
+#define	FRF_BB_TX_IPFIL12_PORT_EN_LBN 24
+#define	FRF_BB_TX_IPFIL12_PORT_EN_WIDTH 1
+#define	FRF_BB_TX_IPFIL11_PORT_EN_LBN 22
+#define	FRF_BB_TX_IPFIL11_PORT_EN_WIDTH 1
+#define	FRF_BB_TX_IPFIL10_PORT_EN_LBN 20
+#define	FRF_BB_TX_IPFIL10_PORT_EN_WIDTH 1
+#define	FRF_BB_TX_IPFIL9_PORT_EN_LBN 18
+#define	FRF_BB_TX_IPFIL9_PORT_EN_WIDTH 1
+#define	FRF_BB_TX_IPFIL8_PORT_EN_LBN 16
+#define	FRF_BB_TX_IPFIL8_PORT_EN_WIDTH 1
+#define	FRF_BB_TX_IPFIL7_PORT_EN_LBN 14
+#define	FRF_BB_TX_IPFIL7_PORT_EN_WIDTH 1
+#define	FRF_BB_TX_IPFIL6_PORT_EN_LBN 12
+#define	FRF_BB_TX_IPFIL6_PORT_EN_WIDTH 1
+#define	FRF_BB_TX_IPFIL5_PORT_EN_LBN 10
+#define	FRF_BB_TX_IPFIL5_PORT_EN_WIDTH 1
+#define	FRF_BB_TX_IPFIL4_PORT_EN_LBN 8
+#define	FRF_BB_TX_IPFIL4_PORT_EN_WIDTH 1
+#define	FRF_BB_TX_IPFIL3_PORT_EN_LBN 6
+#define	FRF_BB_TX_IPFIL3_PORT_EN_WIDTH 1
+#define	FRF_BB_TX_IPFIL2_PORT_EN_LBN 4
+#define	FRF_BB_TX_IPFIL2_PORT_EN_WIDTH 1
+#define	FRF_BB_TX_IPFIL1_PORT_EN_LBN 2
+#define	FRF_BB_TX_IPFIL1_PORT_EN_WIDTH 1
+#define	FRF_BB_TX_IPFIL0_PORT_EN_LBN 0
+#define	FRF_BB_TX_IPFIL0_PORT_EN_WIDTH 1
+
+/* TX_IPFIL_TBL: Transmit IP source address filter table */
+#define	FR_BB_TX_IPFIL_TBL 0x00000b00
+#define	FR_BB_TX_IPFIL_TBL_STEP 16
+#define	FR_BB_TX_IPFIL_TBL_ROWS 16
+#define	FRF_BB_TX_IPFIL_MASK_1_LBN 96
+#define	FRF_BB_TX_IPFIL_MASK_1_WIDTH 32
+#define	FRF_BB_TX_IP_SRC_ADR_1_LBN 64
+#define	FRF_BB_TX_IP_SRC_ADR_1_WIDTH 32
+#define	FRF_BB_TX_IPFIL_MASK_0_LBN 32
+#define	FRF_BB_TX_IPFIL_MASK_0_WIDTH 32
+#define	FRF_BB_TX_IP_SRC_ADR_0_LBN 0
+#define	FRF_BB_TX_IP_SRC_ADR_0_WIDTH 32
+
+/* MD_TXD_REG: PHY management transmit data register */
+#define	FR_AB_MD_TXD 0x00000c00
+#define	FRF_AB_MD_TXD_LBN 0
+#define	FRF_AB_MD_TXD_WIDTH 16
+
+/* MD_RXD_REG: PHY management receive data register */
+#define	FR_AB_MD_RXD 0x00000c10
+#define	FRF_AB_MD_RXD_LBN 0
+#define	FRF_AB_MD_RXD_WIDTH 16
+
+/* MD_CS_REG: PHY management configuration & status register */
+#define	FR_AB_MD_CS 0x00000c20
+#define	FRF_AB_MD_RD_EN_CMD_LBN 15
+#define	FRF_AB_MD_RD_EN_CMD_WIDTH 1
+#define	FRF_AB_MD_WR_EN_CMD_LBN 14
+#define	FRF_AB_MD_WR_EN_CMD_WIDTH 1
+#define	FRF_AB_MD_ADDR_CMD_LBN 13
+#define	FRF_AB_MD_ADDR_CMD_WIDTH 1
+#define	FRF_AB_MD_PT_LBN 7
+#define	FRF_AB_MD_PT_WIDTH 3
+#define	FRF_AB_MD_PL_LBN 6
+#define	FRF_AB_MD_PL_WIDTH 1
+#define	FRF_AB_MD_INT_CLR_LBN 5
+#define	FRF_AB_MD_INT_CLR_WIDTH 1
+#define	FRF_AB_MD_GC_LBN 4
+#define	FRF_AB_MD_GC_WIDTH 1
+#define	FRF_AB_MD_PRSP_LBN 3
+#define	FRF_AB_MD_PRSP_WIDTH 1
+#define	FRF_AB_MD_RIC_LBN 2
+#define	FRF_AB_MD_RIC_WIDTH 1
+#define	FRF_AB_MD_RDC_LBN 1
+#define	FRF_AB_MD_RDC_WIDTH 1
+#define	FRF_AB_MD_WRC_LBN 0
+#define	FRF_AB_MD_WRC_WIDTH 1
+
+/* MD_PHY_ADR_REG: PHY management PHY address register */
+#define	FR_AB_MD_PHY_ADR 0x00000c30
+#define	FRF_AB_MD_PHY_ADR_LBN 0
+#define	FRF_AB_MD_PHY_ADR_WIDTH 16
+
+/* MD_ID_REG: PHY management ID register */
+#define	FR_AB_MD_ID 0x00000c40
+#define	FRF_AB_MD_PRT_ADR_LBN 11
+#define	FRF_AB_MD_PRT_ADR_WIDTH 5
+#define	FRF_AB_MD_DEV_ADR_LBN 6
+#define	FRF_AB_MD_DEV_ADR_WIDTH 5
+
+/* MD_STAT_REG: PHY management status & mask register */
+#define	FR_AB_MD_STAT 0x00000c50
+#define	FRF_AB_MD_PINT_LBN 4
+#define	FRF_AB_MD_PINT_WIDTH 1
+#define	FRF_AB_MD_DONE_LBN 3
+#define	FRF_AB_MD_DONE_WIDTH 1
+#define	FRF_AB_MD_BSERR_LBN 2
+#define	FRF_AB_MD_BSERR_WIDTH 1
+#define	FRF_AB_MD_LNFL_LBN 1
+#define	FRF_AB_MD_LNFL_WIDTH 1
+#define	FRF_AB_MD_BSY_LBN 0
+#define	FRF_AB_MD_BSY_WIDTH 1
+
+/* MAC_STAT_DMA_REG: Port MAC statistical counter DMA register */
+#define	FR_AB_MAC_STAT_DMA 0x00000c60
+#define	FRF_AB_MAC_STAT_DMA_CMD_LBN 48
+#define	FRF_AB_MAC_STAT_DMA_CMD_WIDTH 1
+#define	FRF_AB_MAC_STAT_DMA_ADR_LBN 0
+#define	FRF_AB_MAC_STAT_DMA_ADR_WIDTH 48
+
+/* MAC_CTRL_REG: Port MAC control register */
+#define	FR_AB_MAC_CTRL 0x00000c80
+#define	FRF_AB_MAC_XOFF_VAL_LBN 16
+#define	FRF_AB_MAC_XOFF_VAL_WIDTH 16
+#define	FRF_BB_TXFIFO_DRAIN_EN_LBN 7
+#define	FRF_BB_TXFIFO_DRAIN_EN_WIDTH 1
+#define	FRF_AB_MAC_XG_DISTXCRC_LBN 5
+#define	FRF_AB_MAC_XG_DISTXCRC_WIDTH 1
+#define	FRF_AB_MAC_BCAD_ACPT_LBN 4
+#define	FRF_AB_MAC_BCAD_ACPT_WIDTH 1
+#define	FRF_AB_MAC_UC_PROM_LBN 3
+#define	FRF_AB_MAC_UC_PROM_WIDTH 1
+#define	FRF_AB_MAC_LINK_STATUS_LBN 2
+#define	FRF_AB_MAC_LINK_STATUS_WIDTH 1
+#define	FRF_AB_MAC_SPEED_LBN 0
+#define	FRF_AB_MAC_SPEED_WIDTH 2
+#define	FFE_AB_MAC_SPEED_10G 3
+#define	FFE_AB_MAC_SPEED_1G 2
+#define	FFE_AB_MAC_SPEED_100M 1
+#define	FFE_AB_MAC_SPEED_10M 0
+
+/* GEN_MODE_REG: General Purpose mode register (external interrupt mask) */
+#define	FR_BB_GEN_MODE 0x00000c90
+#define	FRF_BB_XFP_PHY_INT_POL_SEL_LBN 3
+#define	FRF_BB_XFP_PHY_INT_POL_SEL_WIDTH 1
+#define	FRF_BB_XG_PHY_INT_POL_SEL_LBN 2
+#define	FRF_BB_XG_PHY_INT_POL_SEL_WIDTH 1
+#define	FRF_BB_XFP_PHY_INT_MASK_LBN 1
+#define	FRF_BB_XFP_PHY_INT_MASK_WIDTH 1
+#define	FRF_BB_XG_PHY_INT_MASK_LBN 0
+#define	FRF_BB_XG_PHY_INT_MASK_WIDTH 1
+
+/* MAC_MC_HASH_REG0: Multicast address hash table */
+#define	FR_AB_MAC_MC_HASH_REG0 0x00000ca0
+#define	FRF_AB_MAC_MCAST_HASH0_LBN 0
+#define	FRF_AB_MAC_MCAST_HASH0_WIDTH 128
+
+/* MAC_MC_HASH_REG1: Multicast address hash table */
+#define	FR_AB_MAC_MC_HASH_REG1 0x00000cb0
+#define	FRF_AB_MAC_MCAST_HASH1_LBN 0
+#define	FRF_AB_MAC_MCAST_HASH1_WIDTH 128
+
+/* GM_CFG1_REG: GMAC configuration register 1 */
+#define	FR_AB_GM_CFG1 0x00000e00
+#define	FRF_AB_GM_SW_RST_LBN 31
+#define	FRF_AB_GM_SW_RST_WIDTH 1
+#define	FRF_AB_GM_SIM_RST_LBN 30
+#define	FRF_AB_GM_SIM_RST_WIDTH 1
+#define	FRF_AB_GM_RST_RX_MAC_CTL_LBN 19
+#define	FRF_AB_GM_RST_RX_MAC_CTL_WIDTH 1
+#define	FRF_AB_GM_RST_TX_MAC_CTL_LBN 18
+#define	FRF_AB_GM_RST_TX_MAC_CTL_WIDTH 1
+#define	FRF_AB_GM_RST_RX_FUNC_LBN 17
+#define	FRF_AB_GM_RST_RX_FUNC_WIDTH 1
+#define	FRF_AB_GM_RST_TX_FUNC_LBN 16
+#define	FRF_AB_GM_RST_TX_FUNC_WIDTH 1
+#define	FRF_AB_GM_LOOP_LBN 8
+#define	FRF_AB_GM_LOOP_WIDTH 1
+#define	FRF_AB_GM_RX_FC_EN_LBN 5
+#define	FRF_AB_GM_RX_FC_EN_WIDTH 1
+#define	FRF_AB_GM_TX_FC_EN_LBN 4
+#define	FRF_AB_GM_TX_FC_EN_WIDTH 1
+#define	FRF_AB_GM_SYNC_RXEN_LBN 3
+#define	FRF_AB_GM_SYNC_RXEN_WIDTH 1
+#define	FRF_AB_GM_RX_EN_LBN 2
+#define	FRF_AB_GM_RX_EN_WIDTH 1
+#define	FRF_AB_GM_SYNC_TXEN_LBN 1
+#define	FRF_AB_GM_SYNC_TXEN_WIDTH 1
+#define	FRF_AB_GM_TX_EN_LBN 0
+#define	FRF_AB_GM_TX_EN_WIDTH 1
+
+/* GM_CFG2_REG: GMAC configuration register 2 */
+#define	FR_AB_GM_CFG2 0x00000e10
+#define	FRF_AB_GM_PAMBL_LEN_LBN 12
+#define	FRF_AB_GM_PAMBL_LEN_WIDTH 4
+#define	FRF_AB_GM_IF_MODE_LBN 8
+#define	FRF_AB_GM_IF_MODE_WIDTH 2
+#define	FFE_AB_IF_MODE_BYTE_MODE 2
+#define	FFE_AB_IF_MODE_NIBBLE_MODE 1
+#define	FRF_AB_GM_HUGE_FRM_EN_LBN 5
+#define	FRF_AB_GM_HUGE_FRM_EN_WIDTH 1
+#define	FRF_AB_GM_LEN_CHK_LBN 4
+#define	FRF_AB_GM_LEN_CHK_WIDTH 1
+#define	FRF_AB_GM_PAD_CRC_EN_LBN 2
+#define	FRF_AB_GM_PAD_CRC_EN_WIDTH 1
+#define	FRF_AB_GM_CRC_EN_LBN 1
+#define	FRF_AB_GM_CRC_EN_WIDTH 1
+#define	FRF_AB_GM_FD_LBN 0
+#define	FRF_AB_GM_FD_WIDTH 1
+
+/* GM_IPG_REG: GMAC IPG register */
+#define	FR_AB_GM_IPG 0x00000e20
+#define	FRF_AB_GM_NONB2B_IPG1_LBN 24
+#define	FRF_AB_GM_NONB2B_IPG1_WIDTH 7
+#define	FRF_AB_GM_NONB2B_IPG2_LBN 16
+#define	FRF_AB_GM_NONB2B_IPG2_WIDTH 7
+#define	FRF_AB_GM_MIN_IPG_ENF_LBN 8
+#define	FRF_AB_GM_MIN_IPG_ENF_WIDTH 8
+#define	FRF_AB_GM_B2B_IPG_LBN 0
+#define	FRF_AB_GM_B2B_IPG_WIDTH 7
+
+/* GM_HD_REG: GMAC half duplex register */
+#define	FR_AB_GM_HD 0x00000e30
+#define	FRF_AB_GM_ALT_BOFF_VAL_LBN 20
+#define	FRF_AB_GM_ALT_BOFF_VAL_WIDTH 4
+#define	FRF_AB_GM_ALT_BOFF_EN_LBN 19
+#define	FRF_AB_GM_ALT_BOFF_EN_WIDTH 1
+#define	FRF_AB_GM_BP_NO_BOFF_LBN 18
+#define	FRF_AB_GM_BP_NO_BOFF_WIDTH 1
+#define	FRF_AB_GM_DIS_BOFF_LBN 17
+#define	FRF_AB_GM_DIS_BOFF_WIDTH 1
+#define	FRF_AB_GM_EXDEF_TX_EN_LBN 16
+#define	FRF_AB_GM_EXDEF_TX_EN_WIDTH 1
+#define	FRF_AB_GM_RTRY_LIMIT_LBN 12
+#define	FRF_AB_GM_RTRY_LIMIT_WIDTH 4
+#define	FRF_AB_GM_COL_WIN_LBN 0
+#define	FRF_AB_GM_COL_WIN_WIDTH 10
+
+/* GM_MAX_FLEN_REG: GMAC maximum frame length register */
+#define	FR_AB_GM_MAX_FLEN 0x00000e40
+#define	FRF_AB_GM_MAX_FLEN_LBN 0
+#define	FRF_AB_GM_MAX_FLEN_WIDTH 16
+
+/* GM_TEST_REG: GMAC test register */
+#define	FR_AB_GM_TEST 0x00000e70
+#define	FRF_AB_GM_MAX_BOFF_LBN 3
+#define	FRF_AB_GM_MAX_BOFF_WIDTH 1
+#define	FRF_AB_GM_REG_TX_FLOW_EN_LBN 2
+#define	FRF_AB_GM_REG_TX_FLOW_EN_WIDTH 1
+#define	FRF_AB_GM_TEST_PAUSE_LBN 1
+#define	FRF_AB_GM_TEST_PAUSE_WIDTH 1
+#define	FRF_AB_GM_SHORT_SLOT_LBN 0
+#define	FRF_AB_GM_SHORT_SLOT_WIDTH 1
+
+/* GM_ADR1_REG: GMAC station address register 1 */
+#define	FR_AB_GM_ADR1 0x00000f00
+#define	FRF_AB_GM_ADR_B0_LBN 24
+#define	FRF_AB_GM_ADR_B0_WIDTH 8
+#define	FRF_AB_GM_ADR_B1_LBN 16
+#define	FRF_AB_GM_ADR_B1_WIDTH 8
+#define	FRF_AB_GM_ADR_B2_LBN 8
+#define	FRF_AB_GM_ADR_B2_WIDTH 8
+#define	FRF_AB_GM_ADR_B3_LBN 0
+#define	FRF_AB_GM_ADR_B3_WIDTH 8
+
+/* GM_ADR2_REG: GMAC station address register 2 */
+#define	FR_AB_GM_ADR2 0x00000f10
+#define	FRF_AB_GM_ADR_B4_LBN 24
+#define	FRF_AB_GM_ADR_B4_WIDTH 8
+#define	FRF_AB_GM_ADR_B5_LBN 16
+#define	FRF_AB_GM_ADR_B5_WIDTH 8
+
+/* GMF_CFG0_REG: GMAC FIFO configuration register 0 */
+#define	FR_AB_GMF_CFG0 0x00000f20
+#define	FRF_AB_GMF_FTFENRPLY_LBN 20
+#define	FRF_AB_GMF_FTFENRPLY_WIDTH 1
+#define	FRF_AB_GMF_STFENRPLY_LBN 19
+#define	FRF_AB_GMF_STFENRPLY_WIDTH 1
+#define	FRF_AB_GMF_FRFENRPLY_LBN 18
+#define	FRF_AB_GMF_FRFENRPLY_WIDTH 1
+#define	FRF_AB_GMF_SRFENRPLY_LBN 17
+#define	FRF_AB_GMF_SRFENRPLY_WIDTH 1
+#define	FRF_AB_GMF_WTMENRPLY_LBN 16
+#define	FRF_AB_GMF_WTMENRPLY_WIDTH 1
+#define	FRF_AB_GMF_FTFENREQ_LBN 12
+#define	FRF_AB_GMF_FTFENREQ_WIDTH 1
+#define	FRF_AB_GMF_STFENREQ_LBN 11
+#define	FRF_AB_GMF_STFENREQ_WIDTH 1
+#define	FRF_AB_GMF_FRFENREQ_LBN 10
+#define	FRF_AB_GMF_FRFENREQ_WIDTH 1
+#define	FRF_AB_GMF_SRFENREQ_LBN 9
+#define	FRF_AB_GMF_SRFENREQ_WIDTH 1
+#define	FRF_AB_GMF_WTMENREQ_LBN 8
+#define	FRF_AB_GMF_WTMENREQ_WIDTH 1
+#define	FRF_AB_GMF_HSTRSTFT_LBN 4
+#define	FRF_AB_GMF_HSTRSTFT_WIDTH 1
+#define	FRF_AB_GMF_HSTRSTST_LBN 3
+#define	FRF_AB_GMF_HSTRSTST_WIDTH 1
+#define	FRF_AB_GMF_HSTRSTFR_LBN 2
+#define	FRF_AB_GMF_HSTRSTFR_WIDTH 1
+#define	FRF_AB_GMF_HSTRSTSR_LBN 1
+#define	FRF_AB_GMF_HSTRSTSR_WIDTH 1
+#define	FRF_AB_GMF_HSTRSTWT_LBN 0
+#define	FRF_AB_GMF_HSTRSTWT_WIDTH 1
+
+/* GMF_CFG1_REG: GMAC FIFO configuration register 1 */
+#define	FR_AB_GMF_CFG1 0x00000f30
+#define	FRF_AB_GMF_CFGFRTH_LBN 16
+#define	FRF_AB_GMF_CFGFRTH_WIDTH 5
+#define	FRF_AB_GMF_CFGXOFFRTX_LBN 0
+#define	FRF_AB_GMF_CFGXOFFRTX_WIDTH 16
+
+/* GMF_CFG2_REG: GMAC FIFO configuration register 2 */
+#define	FR_AB_GMF_CFG2 0x00000f40
+#define	FRF_AB_GMF_CFGHWM_LBN 16
+#define	FRF_AB_GMF_CFGHWM_WIDTH 6
+#define	FRF_AB_GMF_CFGLWM_LBN 0
+#define	FRF_AB_GMF_CFGLWM_WIDTH 6
+
+/* GMF_CFG3_REG: GMAC FIFO configuration register 3 */
+#define	FR_AB_GMF_CFG3 0x00000f50
+#define	FRF_AB_GMF_CFGHWMFT_LBN 16
+#define	FRF_AB_GMF_CFGHWMFT_WIDTH 6
+#define	FRF_AB_GMF_CFGFTTH_LBN 0
+#define	FRF_AB_GMF_CFGFTTH_WIDTH 6
+
+/* GMF_CFG4_REG: GMAC FIFO configuration register 4 */
+#define	FR_AB_GMF_CFG4 0x00000f60
+#define	FRF_AB_GMF_HSTFLTRFRM_LBN 0
+#define	FRF_AB_GMF_HSTFLTRFRM_WIDTH 18
+
+/* GMF_CFG5_REG: GMAC FIFO configuration register 5 */
+#define	FR_AB_GMF_CFG5 0x00000f70
+#define	FRF_AB_GMF_CFGHDPLX_LBN 22
+#define	FRF_AB_GMF_CFGHDPLX_WIDTH 1
+#define	FRF_AB_GMF_SRFULL_LBN 21
+#define	FRF_AB_GMF_SRFULL_WIDTH 1
+#define	FRF_AB_GMF_HSTSRFULLCLR_LBN 20
+#define	FRF_AB_GMF_HSTSRFULLCLR_WIDTH 1
+#define	FRF_AB_GMF_CFGBYTMODE_LBN 19
+#define	FRF_AB_GMF_CFGBYTMODE_WIDTH 1
+#define	FRF_AB_GMF_HSTDRPLT64_LBN 18
+#define	FRF_AB_GMF_HSTDRPLT64_WIDTH 1
+#define	FRF_AB_GMF_HSTFLTRFRMDC_LBN 0
+#define	FRF_AB_GMF_HSTFLTRFRMDC_WIDTH 18
+
+/* TX_SRC_MAC_TBL: Transmit IP source address filter table */
+#define	FR_BB_TX_SRC_MAC_TBL 0x00001000
+#define	FR_BB_TX_SRC_MAC_TBL_STEP 16
+#define	FR_BB_TX_SRC_MAC_TBL_ROWS 16
+#define	FRF_BB_TX_SRC_MAC_ADR_1_LBN 64
+#define	FRF_BB_TX_SRC_MAC_ADR_1_WIDTH 48
+#define	FRF_BB_TX_SRC_MAC_ADR_0_LBN 0
+#define	FRF_BB_TX_SRC_MAC_ADR_0_WIDTH 48
+
+/* TX_SRC_MAC_CTL_REG: Transmit MAC source address filter control */
+#define	FR_BB_TX_SRC_MAC_CTL 0x00001100
+#define	FRF_BB_TX_SRC_DROP_CTR_LBN 16
+#define	FRF_BB_TX_SRC_DROP_CTR_WIDTH 16
+#define	FRF_BB_TX_SRC_FLTR_EN_LBN 15
+#define	FRF_BB_TX_SRC_FLTR_EN_WIDTH 1
+#define	FRF_BB_TX_DROP_CTR_CLR_LBN 12
+#define	FRF_BB_TX_DROP_CTR_CLR_WIDTH 1
+#define	FRF_BB_TX_MAC_QID_SEL_LBN 0
+#define	FRF_BB_TX_MAC_QID_SEL_WIDTH 3
+
+/* XM_ADR_LO_REG: XGMAC address register low */
+#define	FR_AB_XM_ADR_LO 0x00001200
+#define	FRF_AB_XM_ADR_LO_LBN 0
+#define	FRF_AB_XM_ADR_LO_WIDTH 32
+
+/* XM_ADR_HI_REG: XGMAC address register high */
+#define	FR_AB_XM_ADR_HI 0x00001210
+#define	FRF_AB_XM_ADR_HI_LBN 0
+#define	FRF_AB_XM_ADR_HI_WIDTH 16
+
+/* XM_GLB_CFG_REG: XGMAC global configuration */
+#define	FR_AB_XM_GLB_CFG 0x00001220
+#define	FRF_AB_XM_RMTFLT_GEN_LBN 17
+#define	FRF_AB_XM_RMTFLT_GEN_WIDTH 1
+#define	FRF_AB_XM_DEBUG_MODE_LBN 16
+#define	FRF_AB_XM_DEBUG_MODE_WIDTH 1
+#define	FRF_AB_XM_RX_STAT_EN_LBN 11
+#define	FRF_AB_XM_RX_STAT_EN_WIDTH 1
+#define	FRF_AB_XM_TX_STAT_EN_LBN 10
+#define	FRF_AB_XM_TX_STAT_EN_WIDTH 1
+#define	FRF_AB_XM_RX_JUMBO_MODE_LBN 6
+#define	FRF_AB_XM_RX_JUMBO_MODE_WIDTH 1
+#define	FRF_AB_XM_WAN_MODE_LBN 5
+#define	FRF_AB_XM_WAN_MODE_WIDTH 1
+#define	FRF_AB_XM_INTCLR_MODE_LBN 3
+#define	FRF_AB_XM_INTCLR_MODE_WIDTH 1
+#define	FRF_AB_XM_CORE_RST_LBN 0
+#define	FRF_AB_XM_CORE_RST_WIDTH 1
+
+/* XM_TX_CFG_REG: XGMAC transmit configuration */
+#define	FR_AB_XM_TX_CFG 0x00001230
+#define	FRF_AB_XM_TX_PROG_LBN 24
+#define	FRF_AB_XM_TX_PROG_WIDTH 1
+#define	FRF_AB_XM_IPG_LBN 16
+#define	FRF_AB_XM_IPG_WIDTH 4
+#define	FRF_AB_XM_FCNTL_LBN 10
+#define	FRF_AB_XM_FCNTL_WIDTH 1
+#define	FRF_AB_XM_TXCRC_LBN 8
+#define	FRF_AB_XM_TXCRC_WIDTH 1
+#define	FRF_AB_XM_EDRC_LBN 6
+#define	FRF_AB_XM_EDRC_WIDTH 1
+#define	FRF_AB_XM_AUTO_PAD_LBN 5
+#define	FRF_AB_XM_AUTO_PAD_WIDTH 1
+#define	FRF_AB_XM_TX_PRMBL_LBN 2
+#define	FRF_AB_XM_TX_PRMBL_WIDTH 1
+#define	FRF_AB_XM_TXEN_LBN 1
+#define	FRF_AB_XM_TXEN_WIDTH 1
+#define	FRF_AB_XM_TX_RST_LBN 0
+#define	FRF_AB_XM_TX_RST_WIDTH 1
+
+/* XM_RX_CFG_REG: XGMAC receive configuration */
+#define	FR_AB_XM_RX_CFG 0x00001240
+#define	FRF_AB_XM_PASS_LENERR_LBN 26
+#define	FRF_AB_XM_PASS_LENERR_WIDTH 1
+#define	FRF_AB_XM_PASS_CRC_ERR_LBN 25
+#define	FRF_AB_XM_PASS_CRC_ERR_WIDTH 1
+#define	FRF_AB_XM_PASS_PRMBLE_ERR_LBN 24
+#define	FRF_AB_XM_PASS_PRMBLE_ERR_WIDTH 1
+#define	FRF_AB_XM_REJ_BCAST_LBN 20
+#define	FRF_AB_XM_REJ_BCAST_WIDTH 1
+#define	FRF_AB_XM_ACPT_ALL_MCAST_LBN 11
+#define	FRF_AB_XM_ACPT_ALL_MCAST_WIDTH 1
+#define	FRF_AB_XM_ACPT_ALL_UCAST_LBN 9
+#define	FRF_AB_XM_ACPT_ALL_UCAST_WIDTH 1
+#define	FRF_AB_XM_AUTO_DEPAD_LBN 8
+#define	FRF_AB_XM_AUTO_DEPAD_WIDTH 1
+#define	FRF_AB_XM_RXCRC_LBN 3
+#define	FRF_AB_XM_RXCRC_WIDTH 1
+#define	FRF_AB_XM_RX_PRMBL_LBN 2
+#define	FRF_AB_XM_RX_PRMBL_WIDTH 1
+#define	FRF_AB_XM_RXEN_LBN 1
+#define	FRF_AB_XM_RXEN_WIDTH 1
+#define	FRF_AB_XM_RX_RST_LBN 0
+#define	FRF_AB_XM_RX_RST_WIDTH 1
+
+/* XM_MGT_INT_MASK: documentation to be written for sum_XM_MGT_INT_MASK */
+#define	FR_AB_XM_MGT_INT_MASK 0x00001250
+#define	FRF_AB_XM_MSK_STA_INTR_LBN 16
+#define	FRF_AB_XM_MSK_STA_INTR_WIDTH 1
+#define	FRF_AB_XM_MSK_STAT_CNTR_HF_LBN 9
+#define	FRF_AB_XM_MSK_STAT_CNTR_HF_WIDTH 1
+#define	FRF_AB_XM_MSK_STAT_CNTR_OF_LBN 8
+#define	FRF_AB_XM_MSK_STAT_CNTR_OF_WIDTH 1
+#define	FRF_AB_XM_MSK_PRMBLE_ERR_LBN 2
+#define	FRF_AB_XM_MSK_PRMBLE_ERR_WIDTH 1
+#define	FRF_AB_XM_MSK_RMTFLT_LBN 1
+#define	FRF_AB_XM_MSK_RMTFLT_WIDTH 1
+#define	FRF_AB_XM_MSK_LCLFLT_LBN 0
+#define	FRF_AB_XM_MSK_LCLFLT_WIDTH 1
+
+/* XM_FC_REG: XGMAC flow control register */
+#define	FR_AB_XM_FC 0x00001270
+#define	FRF_AB_XM_PAUSE_TIME_LBN 16
+#define	FRF_AB_XM_PAUSE_TIME_WIDTH 16
+#define	FRF_AB_XM_RX_MAC_STAT_LBN 11
+#define	FRF_AB_XM_RX_MAC_STAT_WIDTH 1
+#define	FRF_AB_XM_TX_MAC_STAT_LBN 10
+#define	FRF_AB_XM_TX_MAC_STAT_WIDTH 1
+#define	FRF_AB_XM_MCNTL_PASS_LBN 8
+#define	FRF_AB_XM_MCNTL_PASS_WIDTH 2
+#define	FRF_AB_XM_REJ_CNTL_UCAST_LBN 6
+#define	FRF_AB_XM_REJ_CNTL_UCAST_WIDTH 1
+#define	FRF_AB_XM_REJ_CNTL_MCAST_LBN 5
+#define	FRF_AB_XM_REJ_CNTL_MCAST_WIDTH 1
+#define	FRF_AB_XM_ZPAUSE_LBN 2
+#define	FRF_AB_XM_ZPAUSE_WIDTH 1
+#define	FRF_AB_XM_XMIT_PAUSE_LBN 1
+#define	FRF_AB_XM_XMIT_PAUSE_WIDTH 1
+#define	FRF_AB_XM_DIS_FCNTL_LBN 0
+#define	FRF_AB_XM_DIS_FCNTL_WIDTH 1
+
+/* XM_PAUSE_TIME_REG: XGMAC pause time register */
+#define	FR_AB_XM_PAUSE_TIME 0x00001290
+#define	FRF_AB_XM_TX_PAUSE_CNT_LBN 16
+#define	FRF_AB_XM_TX_PAUSE_CNT_WIDTH 16
+#define	FRF_AB_XM_RX_PAUSE_CNT_LBN 0
+#define	FRF_AB_XM_RX_PAUSE_CNT_WIDTH 16
+
+/* XM_TX_PARAM_REG: XGMAC transmit parameter register */
+#define	FR_AB_XM_TX_PARAM 0x000012d0
+#define	FRF_AB_XM_TX_JUMBO_MODE_LBN 31
+#define	FRF_AB_XM_TX_JUMBO_MODE_WIDTH 1
+#define	FRF_AB_XM_MAX_TX_FRM_SIZE_HI_LBN 19
+#define	FRF_AB_XM_MAX_TX_FRM_SIZE_HI_WIDTH 11
+#define	FRF_AB_XM_MAX_TX_FRM_SIZE_LO_LBN 16
+#define	FRF_AB_XM_MAX_TX_FRM_SIZE_LO_WIDTH 3
+#define	FRF_AB_XM_PAD_CHAR_LBN 0
+#define	FRF_AB_XM_PAD_CHAR_WIDTH 8
+
+/* XM_RX_PARAM_REG: XGMAC receive parameter register */
+#define	FR_AB_XM_RX_PARAM 0x000012e0
+#define	FRF_AB_XM_MAX_RX_FRM_SIZE_HI_LBN 3
+#define	FRF_AB_XM_MAX_RX_FRM_SIZE_HI_WIDTH 11
+#define	FRF_AB_XM_MAX_RX_FRM_SIZE_LO_LBN 0
+#define	FRF_AB_XM_MAX_RX_FRM_SIZE_LO_WIDTH 3
+
+/* XM_MGT_INT_MSK_REG: XGMAC management interrupt mask register */
+#define	FR_AB_XM_MGT_INT_MSK 0x000012f0
+#define	FRF_AB_XM_STAT_CNTR_OF_LBN 9
+#define	FRF_AB_XM_STAT_CNTR_OF_WIDTH 1
+#define	FRF_AB_XM_STAT_CNTR_HF_LBN 8
+#define	FRF_AB_XM_STAT_CNTR_HF_WIDTH 1
+#define	FRF_AB_XM_PRMBLE_ERR_LBN 2
+#define	FRF_AB_XM_PRMBLE_ERR_WIDTH 1
+#define	FRF_AB_XM_RMTFLT_LBN 1
+#define	FRF_AB_XM_RMTFLT_WIDTH 1
+#define	FRF_AB_XM_LCLFLT_LBN 0
+#define	FRF_AB_XM_LCLFLT_WIDTH 1
+
+/* XX_PWR_RST_REG: XGXS/XAUI powerdown/reset register */
+#define	FR_AB_XX_PWR_RST 0x00001300
+#define	FRF_AB_XX_PWRDND_SIG_LBN 31
+#define	FRF_AB_XX_PWRDND_SIG_WIDTH 1
+#define	FRF_AB_XX_PWRDNC_SIG_LBN 30
+#define	FRF_AB_XX_PWRDNC_SIG_WIDTH 1
+#define	FRF_AB_XX_PWRDNB_SIG_LBN 29
+#define	FRF_AB_XX_PWRDNB_SIG_WIDTH 1
+#define	FRF_AB_XX_PWRDNA_SIG_LBN 28
+#define	FRF_AB_XX_PWRDNA_SIG_WIDTH 1
+#define	FRF_AB_XX_SIM_MODE_LBN 27
+#define	FRF_AB_XX_SIM_MODE_WIDTH 1
+#define	FRF_AB_XX_RSTPLLCD_SIG_LBN 25
+#define	FRF_AB_XX_RSTPLLCD_SIG_WIDTH 1
+#define	FRF_AB_XX_RSTPLLAB_SIG_LBN 24
+#define	FRF_AB_XX_RSTPLLAB_SIG_WIDTH 1
+#define	FRF_AB_XX_RESETD_SIG_LBN 23
+#define	FRF_AB_XX_RESETD_SIG_WIDTH 1
+#define	FRF_AB_XX_RESETC_SIG_LBN 22
+#define	FRF_AB_XX_RESETC_SIG_WIDTH 1
+#define	FRF_AB_XX_RESETB_SIG_LBN 21
+#define	FRF_AB_XX_RESETB_SIG_WIDTH 1
+#define	FRF_AB_XX_RESETA_SIG_LBN 20
+#define	FRF_AB_XX_RESETA_SIG_WIDTH 1
+#define	FRF_AB_XX_RSTXGXSRX_SIG_LBN 18
+#define	FRF_AB_XX_RSTXGXSRX_SIG_WIDTH 1
+#define	FRF_AB_XX_RSTXGXSTX_SIG_LBN 17
+#define	FRF_AB_XX_RSTXGXSTX_SIG_WIDTH 1
+#define	FRF_AB_XX_SD_RST_ACT_LBN 16
+#define	FRF_AB_XX_SD_RST_ACT_WIDTH 1
+#define	FRF_AB_XX_PWRDND_EN_LBN 15
+#define	FRF_AB_XX_PWRDND_EN_WIDTH 1
+#define	FRF_AB_XX_PWRDNC_EN_LBN 14
+#define	FRF_AB_XX_PWRDNC_EN_WIDTH 1
+#define	FRF_AB_XX_PWRDNB_EN_LBN 13
+#define	FRF_AB_XX_PWRDNB_EN_WIDTH 1
+#define	FRF_AB_XX_PWRDNA_EN_LBN 12
+#define	FRF_AB_XX_PWRDNA_EN_WIDTH 1
+#define	FRF_AB_XX_RSTPLLCD_EN_LBN 9
+#define	FRF_AB_XX_RSTPLLCD_EN_WIDTH 1
+#define	FRF_AB_XX_RSTPLLAB_EN_LBN 8
+#define	FRF_AB_XX_RSTPLLAB_EN_WIDTH 1
+#define	FRF_AB_XX_RESETD_EN_LBN 7
+#define	FRF_AB_XX_RESETD_EN_WIDTH 1
+#define	FRF_AB_XX_RESETC_EN_LBN 6
+#define	FRF_AB_XX_RESETC_EN_WIDTH 1
+#define	FRF_AB_XX_RESETB_EN_LBN 5
+#define	FRF_AB_XX_RESETB_EN_WIDTH 1
+#define	FRF_AB_XX_RESETA_EN_LBN 4
+#define	FRF_AB_XX_RESETA_EN_WIDTH 1
+#define	FRF_AB_XX_RSTXGXSRX_EN_LBN 2
+#define	FRF_AB_XX_RSTXGXSRX_EN_WIDTH 1
+#define	FRF_AB_XX_RSTXGXSTX_EN_LBN 1
+#define	FRF_AB_XX_RSTXGXSTX_EN_WIDTH 1
+#define	FRF_AB_XX_RST_XX_EN_LBN 0
+#define	FRF_AB_XX_RST_XX_EN_WIDTH 1
+
+/* XX_SD_CTL_REG: XGXS/XAUI powerdown/reset control register */
+#define	FR_AB_XX_SD_CTL 0x00001310
+#define	FRF_AB_XX_TERMADJ1_LBN 17
+#define	FRF_AB_XX_TERMADJ1_WIDTH 1
+#define	FRF_AB_XX_TERMADJ0_LBN 16
+#define	FRF_AB_XX_TERMADJ0_WIDTH 1
+#define	FRF_AB_XX_HIDRVD_LBN 15
+#define	FRF_AB_XX_HIDRVD_WIDTH 1
+#define	FRF_AB_XX_LODRVD_LBN 14
+#define	FRF_AB_XX_LODRVD_WIDTH 1
+#define	FRF_AB_XX_HIDRVC_LBN 13
+#define	FRF_AB_XX_HIDRVC_WIDTH 1
+#define	FRF_AB_XX_LODRVC_LBN 12
+#define	FRF_AB_XX_LODRVC_WIDTH 1
+#define	FRF_AB_XX_HIDRVB_LBN 11
+#define	FRF_AB_XX_HIDRVB_WIDTH 1
+#define	FRF_AB_XX_LODRVB_LBN 10
+#define	FRF_AB_XX_LODRVB_WIDTH 1
+#define	FRF_AB_XX_HIDRVA_LBN 9
+#define	FRF_AB_XX_HIDRVA_WIDTH 1
+#define	FRF_AB_XX_LODRVA_LBN 8
+#define	FRF_AB_XX_LODRVA_WIDTH 1
+#define	FRF_AB_XX_LPBKD_LBN 3
+#define	FRF_AB_XX_LPBKD_WIDTH 1
+#define	FRF_AB_XX_LPBKC_LBN 2
+#define	FRF_AB_XX_LPBKC_WIDTH 1
+#define	FRF_AB_XX_LPBKB_LBN 1
+#define	FRF_AB_XX_LPBKB_WIDTH 1
+#define	FRF_AB_XX_LPBKA_LBN 0
+#define	FRF_AB_XX_LPBKA_WIDTH 1
+
+/* XX_TXDRV_CTL_REG: XAUI SerDes transmit drive control register */
+#define	FR_AB_XX_TXDRV_CTL 0x00001320
+#define	FRF_AB_XX_DEQD_LBN 28
+#define	FRF_AB_XX_DEQD_WIDTH 4
+#define	FRF_AB_XX_DEQC_LBN 24
+#define	FRF_AB_XX_DEQC_WIDTH 4
+#define	FRF_AB_XX_DEQB_LBN 20
+#define	FRF_AB_XX_DEQB_WIDTH 4
+#define	FRF_AB_XX_DEQA_LBN 16
+#define	FRF_AB_XX_DEQA_WIDTH 4
+#define	FRF_AB_XX_DTXD_LBN 12
+#define	FRF_AB_XX_DTXD_WIDTH 4
+#define	FRF_AB_XX_DTXC_LBN 8
+#define	FRF_AB_XX_DTXC_WIDTH 4
+#define	FRF_AB_XX_DTXB_LBN 4
+#define	FRF_AB_XX_DTXB_WIDTH 4
+#define	FRF_AB_XX_DTXA_LBN 0
+#define	FRF_AB_XX_DTXA_WIDTH 4
+
+/* XX_PRBS_CTL_REG: documentation to be written for sum_XX_PRBS_CTL_REG */
+#define	FR_AB_XX_PRBS_CTL 0x00001330
+#define	FRF_AB_XX_CH3_RX_PRBS_SEL_LBN 30
+#define	FRF_AB_XX_CH3_RX_PRBS_SEL_WIDTH 2
+#define	FRF_AB_XX_CH3_RX_PRBS_INV_LBN 29
+#define	FRF_AB_XX_CH3_RX_PRBS_INV_WIDTH 1
+#define	FRF_AB_XX_CH3_RX_PRBS_CHKEN_LBN 28
+#define	FRF_AB_XX_CH3_RX_PRBS_CHKEN_WIDTH 1
+#define	FRF_AB_XX_CH2_RX_PRBS_SEL_LBN 26
+#define	FRF_AB_XX_CH2_RX_PRBS_SEL_WIDTH 2
+#define	FRF_AB_XX_CH2_RX_PRBS_INV_LBN 25
+#define	FRF_AB_XX_CH2_RX_PRBS_INV_WIDTH 1
+#define	FRF_AB_XX_CH2_RX_PRBS_CHKEN_LBN 24
+#define	FRF_AB_XX_CH2_RX_PRBS_CHKEN_WIDTH 1
+#define	FRF_AB_XX_CH1_RX_PRBS_SEL_LBN 22
+#define	FRF_AB_XX_CH1_RX_PRBS_SEL_WIDTH 2
+#define	FRF_AB_XX_CH1_RX_PRBS_INV_LBN 21
+#define	FRF_AB_XX_CH1_RX_PRBS_INV_WIDTH 1
+#define	FRF_AB_XX_CH1_RX_PRBS_CHKEN_LBN 20
+#define	FRF_AB_XX_CH1_RX_PRBS_CHKEN_WIDTH 1
+#define	FRF_AB_XX_CH0_RX_PRBS_SEL_LBN 18
+#define	FRF_AB_XX_CH0_RX_PRBS_SEL_WIDTH 2
+#define	FRF_AB_XX_CH0_RX_PRBS_INV_LBN 17
+#define	FRF_AB_XX_CH0_RX_PRBS_INV_WIDTH 1
+#define	FRF_AB_XX_CH0_RX_PRBS_CHKEN_LBN 16
+#define	FRF_AB_XX_CH0_RX_PRBS_CHKEN_WIDTH 1
+#define	FRF_AB_XX_CH3_TX_PRBS_SEL_LBN 14
+#define	FRF_AB_XX_CH3_TX_PRBS_SEL_WIDTH 2
+#define	FRF_AB_XX_CH3_TX_PRBS_INV_LBN 13
+#define	FRF_AB_XX_CH3_TX_PRBS_INV_WIDTH 1
+#define	FRF_AB_XX_CH3_TX_PRBS_CHKEN_LBN 12
+#define	FRF_AB_XX_CH3_TX_PRBS_CHKEN_WIDTH 1
+#define	FRF_AB_XX_CH2_TX_PRBS_SEL_LBN 10
+#define	FRF_AB_XX_CH2_TX_PRBS_SEL_WIDTH 2
+#define	FRF_AB_XX_CH2_TX_PRBS_INV_LBN 9
+#define	FRF_AB_XX_CH2_TX_PRBS_INV_WIDTH 1
+#define	FRF_AB_XX_CH2_TX_PRBS_CHKEN_LBN 8
+#define	FRF_AB_XX_CH2_TX_PRBS_CHKEN_WIDTH 1
+#define	FRF_AB_XX_CH1_TX_PRBS_SEL_LBN 6
+#define	FRF_AB_XX_CH1_TX_PRBS_SEL_WIDTH 2
+#define	FRF_AB_XX_CH1_TX_PRBS_INV_LBN 5
+#define	FRF_AB_XX_CH1_TX_PRBS_INV_WIDTH 1
+#define	FRF_AB_XX_CH1_TX_PRBS_CHKEN_LBN 4
+#define	FRF_AB_XX_CH1_TX_PRBS_CHKEN_WIDTH 1
+#define	FRF_AB_XX_CH0_TX_PRBS_SEL_LBN 2
+#define	FRF_AB_XX_CH0_TX_PRBS_SEL_WIDTH 2
+#define	FRF_AB_XX_CH0_TX_PRBS_INV_LBN 1
+#define	FRF_AB_XX_CH0_TX_PRBS_INV_WIDTH 1
+#define	FRF_AB_XX_CH0_TX_PRBS_CHKEN_LBN 0
+#define	FRF_AB_XX_CH0_TX_PRBS_CHKEN_WIDTH 1
+
+/* XX_PRBS_CHK_REG: documentation to be written for sum_XX_PRBS_CHK_REG */
+#define	FR_AB_XX_PRBS_CHK 0x00001340
+#define	FRF_AB_XX_REV_LB_EN_LBN 16
+#define	FRF_AB_XX_REV_LB_EN_WIDTH 1
+#define	FRF_AB_XX_CH3_DEG_DET_LBN 15
+#define	FRF_AB_XX_CH3_DEG_DET_WIDTH 1
+#define	FRF_AB_XX_CH3_LFSR_LOCK_IND_LBN 14
+#define	FRF_AB_XX_CH3_LFSR_LOCK_IND_WIDTH 1
+#define	FRF_AB_XX_CH3_PRBS_FRUN_LBN 13
+#define	FRF_AB_XX_CH3_PRBS_FRUN_WIDTH 1
+#define	FRF_AB_XX_CH3_ERR_CHK_LBN 12
+#define	FRF_AB_XX_CH3_ERR_CHK_WIDTH 1
+#define	FRF_AB_XX_CH2_DEG_DET_LBN 11
+#define	FRF_AB_XX_CH2_DEG_DET_WIDTH 1
+#define	FRF_AB_XX_CH2_LFSR_LOCK_IND_LBN 10
+#define	FRF_AB_XX_CH2_LFSR_LOCK_IND_WIDTH 1
+#define	FRF_AB_XX_CH2_PRBS_FRUN_LBN 9
+#define	FRF_AB_XX_CH2_PRBS_FRUN_WIDTH 1
+#define	FRF_AB_XX_CH2_ERR_CHK_LBN 8
+#define	FRF_AB_XX_CH2_ERR_CHK_WIDTH 1
+#define	FRF_AB_XX_CH1_DEG_DET_LBN 7
+#define	FRF_AB_XX_CH1_DEG_DET_WIDTH 1
+#define	FRF_AB_XX_CH1_LFSR_LOCK_IND_LBN 6
+#define	FRF_AB_XX_CH1_LFSR_LOCK_IND_WIDTH 1
+#define	FRF_AB_XX_CH1_PRBS_FRUN_LBN 5
+#define	FRF_AB_XX_CH1_PRBS_FRUN_WIDTH 1
+#define	FRF_AB_XX_CH1_ERR_CHK_LBN 4
+#define	FRF_AB_XX_CH1_ERR_CHK_WIDTH 1
+#define	FRF_AB_XX_CH0_DEG_DET_LBN 3
+#define	FRF_AB_XX_CH0_DEG_DET_WIDTH 1
+#define	FRF_AB_XX_CH0_LFSR_LOCK_IND_LBN 2
+#define	FRF_AB_XX_CH0_LFSR_LOCK_IND_WIDTH 1
+#define	FRF_AB_XX_CH0_PRBS_FRUN_LBN 1
+#define	FRF_AB_XX_CH0_PRBS_FRUN_WIDTH 1
+#define	FRF_AB_XX_CH0_ERR_CHK_LBN 0
+#define	FRF_AB_XX_CH0_ERR_CHK_WIDTH 1
+
+/* XX_PRBS_ERR_REG: documentation to be written for sum_XX_PRBS_ERR_REG */
+#define	FR_AB_XX_PRBS_ERR 0x00001350
+#define	FRF_AB_XX_CH3_PRBS_ERR_CNT_LBN 24
+#define	FRF_AB_XX_CH3_PRBS_ERR_CNT_WIDTH 8
+#define	FRF_AB_XX_CH2_PRBS_ERR_CNT_LBN 16
+#define	FRF_AB_XX_CH2_PRBS_ERR_CNT_WIDTH 8
+#define	FRF_AB_XX_CH1_PRBS_ERR_CNT_LBN 8
+#define	FRF_AB_XX_CH1_PRBS_ERR_CNT_WIDTH 8
+#define	FRF_AB_XX_CH0_PRBS_ERR_CNT_LBN 0
+#define	FRF_AB_XX_CH0_PRBS_ERR_CNT_WIDTH 8
+
+/* XX_CORE_STAT_REG: XAUI XGXS core status register */
+#define	FR_AB_XX_CORE_STAT 0x00001360
+#define	FRF_AB_XX_FORCE_SIG3_LBN 31
+#define	FRF_AB_XX_FORCE_SIG3_WIDTH 1
+#define	FRF_AB_XX_FORCE_SIG3_VAL_LBN 30
+#define	FRF_AB_XX_FORCE_SIG3_VAL_WIDTH 1
+#define	FRF_AB_XX_FORCE_SIG2_LBN 29
+#define	FRF_AB_XX_FORCE_SIG2_WIDTH 1
+#define	FRF_AB_XX_FORCE_SIG2_VAL_LBN 28
+#define	FRF_AB_XX_FORCE_SIG2_VAL_WIDTH 1
+#define	FRF_AB_XX_FORCE_SIG1_LBN 27
+#define	FRF_AB_XX_FORCE_SIG1_WIDTH 1
+#define	FRF_AB_XX_FORCE_SIG1_VAL_LBN 26
+#define	FRF_AB_XX_FORCE_SIG1_VAL_WIDTH 1
+#define	FRF_AB_XX_FORCE_SIG0_LBN 25
+#define	FRF_AB_XX_FORCE_SIG0_WIDTH 1
+#define	FRF_AB_XX_FORCE_SIG0_VAL_LBN 24
+#define	FRF_AB_XX_FORCE_SIG0_VAL_WIDTH 1
+#define	FRF_AB_XX_XGXS_LB_EN_LBN 23
+#define	FRF_AB_XX_XGXS_LB_EN_WIDTH 1
+#define	FRF_AB_XX_XGMII_LB_EN_LBN 22
+#define	FRF_AB_XX_XGMII_LB_EN_WIDTH 1
+#define	FRF_AB_XX_MATCH_FAULT_LBN 21
+#define	FRF_AB_XX_MATCH_FAULT_WIDTH 1
+#define	FRF_AB_XX_ALIGN_DONE_LBN 20
+#define	FRF_AB_XX_ALIGN_DONE_WIDTH 1
+#define	FRF_AB_XX_SYNC_STAT3_LBN 19
+#define	FRF_AB_XX_SYNC_STAT3_WIDTH 1
+#define	FRF_AB_XX_SYNC_STAT2_LBN 18
+#define	FRF_AB_XX_SYNC_STAT2_WIDTH 1
+#define	FRF_AB_XX_SYNC_STAT1_LBN 17
+#define	FRF_AB_XX_SYNC_STAT1_WIDTH 1
+#define	FRF_AB_XX_SYNC_STAT0_LBN 16
+#define	FRF_AB_XX_SYNC_STAT0_WIDTH 1
+#define	FRF_AB_XX_COMMA_DET_CH3_LBN 15
+#define	FRF_AB_XX_COMMA_DET_CH3_WIDTH 1
+#define	FRF_AB_XX_COMMA_DET_CH2_LBN 14
+#define	FRF_AB_XX_COMMA_DET_CH2_WIDTH 1
+#define	FRF_AB_XX_COMMA_DET_CH1_LBN 13
+#define	FRF_AB_XX_COMMA_DET_CH1_WIDTH 1
+#define	FRF_AB_XX_COMMA_DET_CH0_LBN 12
+#define	FRF_AB_XX_COMMA_DET_CH0_WIDTH 1
+#define	FRF_AB_XX_CGRP_ALIGN_CH3_LBN 11
+#define	FRF_AB_XX_CGRP_ALIGN_CH3_WIDTH 1
+#define	FRF_AB_XX_CGRP_ALIGN_CH2_LBN 10
+#define	FRF_AB_XX_CGRP_ALIGN_CH2_WIDTH 1
+#define	FRF_AB_XX_CGRP_ALIGN_CH1_LBN 9
+#define	FRF_AB_XX_CGRP_ALIGN_CH1_WIDTH 1
+#define	FRF_AB_XX_CGRP_ALIGN_CH0_LBN 8
+#define	FRF_AB_XX_CGRP_ALIGN_CH0_WIDTH 1
+#define	FRF_AB_XX_CHAR_ERR_CH3_LBN 7
+#define	FRF_AB_XX_CHAR_ERR_CH3_WIDTH 1
+#define	FRF_AB_XX_CHAR_ERR_CH2_LBN 6
+#define	FRF_AB_XX_CHAR_ERR_CH2_WIDTH 1
+#define	FRF_AB_XX_CHAR_ERR_CH1_LBN 5
+#define	FRF_AB_XX_CHAR_ERR_CH1_WIDTH 1
+#define	FRF_AB_XX_CHAR_ERR_CH0_LBN 4
+#define	FRF_AB_XX_CHAR_ERR_CH0_WIDTH 1
+#define	FRF_AB_XX_DISPERR_CH3_LBN 3
+#define	FRF_AB_XX_DISPERR_CH3_WIDTH 1
+#define	FRF_AB_XX_DISPERR_CH2_LBN 2
+#define	FRF_AB_XX_DISPERR_CH2_WIDTH 1
+#define	FRF_AB_XX_DISPERR_CH1_LBN 1
+#define	FRF_AB_XX_DISPERR_CH1_WIDTH 1
+#define	FRF_AB_XX_DISPERR_CH0_LBN 0
+#define	FRF_AB_XX_DISPERR_CH0_WIDTH 1
+
+/* RX_DESC_PTR_TBL_KER: Receive descriptor pointer table */
+#define	FR_AA_RX_DESC_PTR_TBL_KER 0x00011800
+#define	FR_AA_RX_DESC_PTR_TBL_KER_STEP 16
+#define	FR_AA_RX_DESC_PTR_TBL_KER_ROWS 4
+/* RX_DESC_PTR_TBL: Receive descriptor pointer table */
+#define	FR_BZ_RX_DESC_PTR_TBL 0x00f40000
+#define	FR_BZ_RX_DESC_PTR_TBL_STEP 16
+#define	FR_BB_RX_DESC_PTR_TBL_ROWS 4096
+#define	FR_CZ_RX_DESC_PTR_TBL_ROWS 1024
+#define	FRF_CZ_RX_HDR_SPLIT_LBN 90
+#define	FRF_CZ_RX_HDR_SPLIT_WIDTH 1
+#define	FRF_AA_RX_RESET_LBN 89
+#define	FRF_AA_RX_RESET_WIDTH 1
+#define	FRF_AZ_RX_ISCSI_DDIG_EN_LBN 88
+#define	FRF_AZ_RX_ISCSI_DDIG_EN_WIDTH 1
+#define	FRF_AZ_RX_ISCSI_HDIG_EN_LBN 87
+#define	FRF_AZ_RX_ISCSI_HDIG_EN_WIDTH 1
+#define	FRF_AZ_RX_DESC_PREF_ACT_LBN 86
+#define	FRF_AZ_RX_DESC_PREF_ACT_WIDTH 1
+#define	FRF_AZ_RX_DC_HW_RPTR_LBN 80
+#define	FRF_AZ_RX_DC_HW_RPTR_WIDTH 6
+#define	FRF_AZ_RX_DESCQ_HW_RPTR_LBN 68
+#define	FRF_AZ_RX_DESCQ_HW_RPTR_WIDTH 12
+#define	FRF_AZ_RX_DESCQ_SW_WPTR_LBN 56
+#define	FRF_AZ_RX_DESCQ_SW_WPTR_WIDTH 12
+#define	FRF_AZ_RX_DESCQ_BUF_BASE_ID_LBN 36
+#define	FRF_AZ_RX_DESCQ_BUF_BASE_ID_WIDTH 20
+#define	FRF_AZ_RX_DESCQ_EVQ_ID_LBN 24
+#define	FRF_AZ_RX_DESCQ_EVQ_ID_WIDTH 12
+#define	FRF_AZ_RX_DESCQ_OWNER_ID_LBN 10
+#define	FRF_AZ_RX_DESCQ_OWNER_ID_WIDTH 14
+#define	FRF_AZ_RX_DESCQ_LABEL_LBN 5
+#define	FRF_AZ_RX_DESCQ_LABEL_WIDTH 5
+#define	FRF_AZ_RX_DESCQ_SIZE_LBN 3
+#define	FRF_AZ_RX_DESCQ_SIZE_WIDTH 2
+#define	FFE_AZ_RX_DESCQ_SIZE_4K 3
+#define	FFE_AZ_RX_DESCQ_SIZE_2K 2
+#define	FFE_AZ_RX_DESCQ_SIZE_1K 1
+#define	FFE_AZ_RX_DESCQ_SIZE_512 0
+#define	FRF_AZ_RX_DESCQ_TYPE_LBN 2
+#define	FRF_AZ_RX_DESCQ_TYPE_WIDTH 1
+#define	FRF_AZ_RX_DESCQ_JUMBO_LBN 1
+#define	FRF_AZ_RX_DESCQ_JUMBO_WIDTH 1
+#define	FRF_AZ_RX_DESCQ_EN_LBN 0
+#define	FRF_AZ_RX_DESCQ_EN_WIDTH 1
+
+/* TX_DESC_PTR_TBL_KER: Transmit descriptor pointer */
+#define	FR_AA_TX_DESC_PTR_TBL_KER 0x00011900
+#define	FR_AA_TX_DESC_PTR_TBL_KER_STEP 16
+#define	FR_AA_TX_DESC_PTR_TBL_KER_ROWS 8
+/* TX_DESC_PTR_TBL: Transmit descriptor pointer */
+#define	FR_BZ_TX_DESC_PTR_TBL 0x00f50000
+#define	FR_BZ_TX_DESC_PTR_TBL_STEP 16
+#define	FR_BB_TX_DESC_PTR_TBL_ROWS 4096
+#define	FR_CZ_TX_DESC_PTR_TBL_ROWS 1024
+#define	FRF_CZ_TX_DPT_Q_MASK_WIDTH_LBN 94
+#define	FRF_CZ_TX_DPT_Q_MASK_WIDTH_WIDTH 2
+#define	FRF_CZ_TX_DPT_ETH_FILT_EN_LBN 93
+#define	FRF_CZ_TX_DPT_ETH_FILT_EN_WIDTH 1
+#define	FRF_CZ_TX_DPT_IP_FILT_EN_LBN 92
+#define	FRF_CZ_TX_DPT_IP_FILT_EN_WIDTH 1
+#define	FRF_BZ_TX_NON_IP_DROP_DIS_LBN 91
+#define	FRF_BZ_TX_NON_IP_DROP_DIS_WIDTH 1
+#define	FRF_BZ_TX_IP_CHKSM_DIS_LBN 90
+#define	FRF_BZ_TX_IP_CHKSM_DIS_WIDTH 1
+#define	FRF_BZ_TX_TCP_CHKSM_DIS_LBN 89
+#define	FRF_BZ_TX_TCP_CHKSM_DIS_WIDTH 1
+#define	FRF_AZ_TX_DESCQ_EN_LBN 88
+#define	FRF_AZ_TX_DESCQ_EN_WIDTH 1
+#define	FRF_AZ_TX_ISCSI_DDIG_EN_LBN 87
+#define	FRF_AZ_TX_ISCSI_DDIG_EN_WIDTH 1
+#define	FRF_AZ_TX_ISCSI_HDIG_EN_LBN 86
+#define	FRF_AZ_TX_ISCSI_HDIG_EN_WIDTH 1
+#define	FRF_AZ_TX_DC_HW_RPTR_LBN 80
+#define	FRF_AZ_TX_DC_HW_RPTR_WIDTH 6
+#define	FRF_AZ_TX_DESCQ_HW_RPTR_LBN 68
+#define	FRF_AZ_TX_DESCQ_HW_RPTR_WIDTH 12
+#define	FRF_AZ_TX_DESCQ_SW_WPTR_LBN 56
+#define	FRF_AZ_TX_DESCQ_SW_WPTR_WIDTH 12
+#define	FRF_AZ_TX_DESCQ_BUF_BASE_ID_LBN 36
+#define	FRF_AZ_TX_DESCQ_BUF_BASE_ID_WIDTH 20
+#define	FRF_AZ_TX_DESCQ_EVQ_ID_LBN 24
+#define	FRF_AZ_TX_DESCQ_EVQ_ID_WIDTH 12
+#define	FRF_AZ_TX_DESCQ_OWNER_ID_LBN 10
+#define	FRF_AZ_TX_DESCQ_OWNER_ID_WIDTH 14
+#define	FRF_AZ_TX_DESCQ_LABEL_LBN 5
+#define	FRF_AZ_TX_DESCQ_LABEL_WIDTH 5
+#define	FRF_AZ_TX_DESCQ_SIZE_LBN 3
+#define	FRF_AZ_TX_DESCQ_SIZE_WIDTH 2
+#define	FFE_AZ_TX_DESCQ_SIZE_4K 3
+#define	FFE_AZ_TX_DESCQ_SIZE_2K 2
+#define	FFE_AZ_TX_DESCQ_SIZE_1K 1
+#define	FFE_AZ_TX_DESCQ_SIZE_512 0
+#define	FRF_AZ_TX_DESCQ_TYPE_LBN 1
+#define	FRF_AZ_TX_DESCQ_TYPE_WIDTH 2
+#define	FRF_AZ_TX_DESCQ_FLUSH_LBN 0
+#define	FRF_AZ_TX_DESCQ_FLUSH_WIDTH 1
+
+/* EVQ_PTR_TBL_KER: Event queue pointer table */
+#define	FR_AA_EVQ_PTR_TBL_KER 0x00011a00
+#define	FR_AA_EVQ_PTR_TBL_KER_STEP 16
+#define	FR_AA_EVQ_PTR_TBL_KER_ROWS 4
+/* EVQ_PTR_TBL: Event queue pointer table */
+#define	FR_BZ_EVQ_PTR_TBL 0x00f60000
+#define	FR_BZ_EVQ_PTR_TBL_STEP 16
+#define	FR_CZ_EVQ_PTR_TBL_ROWS 1024
+#define	FR_BB_EVQ_PTR_TBL_ROWS 4096
+#define	FRF_BZ_EVQ_RPTR_IGN_LBN 40
+#define	FRF_BZ_EVQ_RPTR_IGN_WIDTH 1
+#define	FRF_AB_EVQ_WKUP_OR_INT_EN_LBN 39
+#define	FRF_AB_EVQ_WKUP_OR_INT_EN_WIDTH 1
+#define	FRF_CZ_EVQ_DOS_PROTECT_EN_LBN 39
+#define	FRF_CZ_EVQ_DOS_PROTECT_EN_WIDTH 1
+#define	FRF_AZ_EVQ_NXT_WPTR_LBN 24
+#define	FRF_AZ_EVQ_NXT_WPTR_WIDTH 15
+#define	FRF_AZ_EVQ_EN_LBN 23
+#define	FRF_AZ_EVQ_EN_WIDTH 1
+#define	FRF_AZ_EVQ_SIZE_LBN 20
+#define	FRF_AZ_EVQ_SIZE_WIDTH 3
+#define	FFE_AZ_EVQ_SIZE_32K 6
+#define	FFE_AZ_EVQ_SIZE_16K 5
+#define	FFE_AZ_EVQ_SIZE_8K 4
+#define	FFE_AZ_EVQ_SIZE_4K 3
+#define	FFE_AZ_EVQ_SIZE_2K 2
+#define	FFE_AZ_EVQ_SIZE_1K 1
+#define	FFE_AZ_EVQ_SIZE_512 0
+#define	FRF_AZ_EVQ_BUF_BASE_ID_LBN 0
+#define	FRF_AZ_EVQ_BUF_BASE_ID_WIDTH 20
+
+/* BUF_HALF_TBL_KER: Buffer table in half buffer table mode direct access by driver */
+#define	FR_AA_BUF_HALF_TBL_KER 0x00018000
+#define	FR_AA_BUF_HALF_TBL_KER_STEP 8
+#define	FR_AA_BUF_HALF_TBL_KER_ROWS 4096
+/* BUF_HALF_TBL: Buffer table in half buffer table mode direct access by driver */
+#define	FR_BZ_BUF_HALF_TBL 0x00800000
+#define	FR_BZ_BUF_HALF_TBL_STEP 8
+#define	FR_CZ_BUF_HALF_TBL_ROWS 147456
+#define	FR_BB_BUF_HALF_TBL_ROWS 524288
+#define	FRF_AZ_BUF_ADR_HBUF_ODD_LBN 44
+#define	FRF_AZ_BUF_ADR_HBUF_ODD_WIDTH 20
+#define	FRF_AZ_BUF_OWNER_ID_HBUF_ODD_LBN 32
+#define	FRF_AZ_BUF_OWNER_ID_HBUF_ODD_WIDTH 12
+#define	FRF_AZ_BUF_ADR_HBUF_EVEN_LBN 12
+#define	FRF_AZ_BUF_ADR_HBUF_EVEN_WIDTH 20
+#define	FRF_AZ_BUF_OWNER_ID_HBUF_EVEN_LBN 0
+#define	FRF_AZ_BUF_OWNER_ID_HBUF_EVEN_WIDTH 12
+
+/* BUF_FULL_TBL_KER: Buffer table in full buffer table mode direct access by driver */
+#define	FR_AA_BUF_FULL_TBL_KER 0x00018000
+#define	FR_AA_BUF_FULL_TBL_KER_STEP 8
+#define	FR_AA_BUF_FULL_TBL_KER_ROWS 4096
+/* BUF_FULL_TBL: Buffer table in full buffer table mode direct access by driver */
+#define	FR_BZ_BUF_FULL_TBL 0x00800000
+#define	FR_BZ_BUF_FULL_TBL_STEP 8
+#define	FR_CZ_BUF_FULL_TBL_ROWS 147456
+#define	FR_BB_BUF_FULL_TBL_ROWS 917504
+#define	FRF_AZ_BUF_FULL_UNUSED_LBN 51
+#define	FRF_AZ_BUF_FULL_UNUSED_WIDTH 13
+#define	FRF_AZ_IP_DAT_BUF_SIZE_LBN 50
+#define	FRF_AZ_IP_DAT_BUF_SIZE_WIDTH 1
+#define	FRF_AZ_BUF_ADR_REGION_LBN 48
+#define	FRF_AZ_BUF_ADR_REGION_WIDTH 2
+#define	FFE_AZ_BUF_ADR_REGN3 3
+#define	FFE_AZ_BUF_ADR_REGN2 2
+#define	FFE_AZ_BUF_ADR_REGN1 1
+#define	FFE_AZ_BUF_ADR_REGN0 0
+#define	FRF_AZ_BUF_ADR_FBUF_LBN 14
+#define	FRF_AZ_BUF_ADR_FBUF_WIDTH 34
+#define	FRF_AZ_BUF_OWNER_ID_FBUF_LBN 0
+#define	FRF_AZ_BUF_OWNER_ID_FBUF_WIDTH 14
+
+/* RX_FILTER_TBL0: TCP/IPv4 Receive filter table */
+#define	FR_BZ_RX_FILTER_TBL0 0x00f00000
+#define	FR_BZ_RX_FILTER_TBL0_STEP 32
+#define	FR_BZ_RX_FILTER_TBL0_ROWS 8192
+/* RX_FILTER_TBL1: TCP/IPv4 Receive filter table */
+#define	FR_BB_RX_FILTER_TBL1 0x00f00010
+#define	FR_BB_RX_FILTER_TBL1_STEP 32
+#define	FR_BB_RX_FILTER_TBL1_ROWS 8192
+#define	FRF_BZ_RSS_EN_LBN 110
+#define	FRF_BZ_RSS_EN_WIDTH 1
+#define	FRF_BZ_SCATTER_EN_LBN 109
+#define	FRF_BZ_SCATTER_EN_WIDTH 1
+#define	FRF_BZ_TCP_UDP_LBN 108
+#define	FRF_BZ_TCP_UDP_WIDTH 1
+#define	FRF_BZ_RXQ_ID_LBN 96
+#define	FRF_BZ_RXQ_ID_WIDTH 12
+#define	FRF_BZ_DEST_IP_LBN 64
+#define	FRF_BZ_DEST_IP_WIDTH 32
+#define	FRF_BZ_DEST_PORT_TCP_LBN 48
+#define	FRF_BZ_DEST_PORT_TCP_WIDTH 16
+#define	FRF_BZ_SRC_IP_LBN 16
+#define	FRF_BZ_SRC_IP_WIDTH 32
+#define	FRF_BZ_SRC_TCP_DEST_UDP_LBN 0
+#define	FRF_BZ_SRC_TCP_DEST_UDP_WIDTH 16
+
+/* RX_MAC_FILTER_TBL0: Receive Ethernet filter table */
+#define	FR_CZ_RX_MAC_FILTER_TBL0 0x00f00010
+#define	FR_CZ_RX_MAC_FILTER_TBL0_STEP 32
+#define	FR_CZ_RX_MAC_FILTER_TBL0_ROWS 512
+#define	FRF_CZ_RMFT_RSS_EN_LBN 75
+#define	FRF_CZ_RMFT_RSS_EN_WIDTH 1
+#define	FRF_CZ_RMFT_SCATTER_EN_LBN 74
+#define	FRF_CZ_RMFT_SCATTER_EN_WIDTH 1
+#define	FRF_CZ_RMFT_IP_OVERRIDE_LBN 73
+#define	FRF_CZ_RMFT_IP_OVERRIDE_WIDTH 1
+#define	FRF_CZ_RMFT_RXQ_ID_LBN 61
+#define	FRF_CZ_RMFT_RXQ_ID_WIDTH 12
+#define	FRF_CZ_RMFT_WILDCARD_MATCH_LBN 60
+#define	FRF_CZ_RMFT_WILDCARD_MATCH_WIDTH 1
+#define	FRF_CZ_RMFT_DEST_MAC_LBN 16
+#define	FRF_CZ_RMFT_DEST_MAC_WIDTH 44
+#define	FRF_CZ_RMFT_VLAN_ID_LBN 0
+#define	FRF_CZ_RMFT_VLAN_ID_WIDTH 12
+
+/* TIMER_TBL: Timer table */
+#define	FR_BZ_TIMER_TBL 0x00f70000
+#define	FR_BZ_TIMER_TBL_STEP 16
+#define	FR_CZ_TIMER_TBL_ROWS 1024
+#define	FR_BB_TIMER_TBL_ROWS 4096
+#define	FRF_CZ_TIMER_Q_EN_LBN 33
+#define	FRF_CZ_TIMER_Q_EN_WIDTH 1
+#define	FRF_CZ_INT_ARMD_LBN 32
+#define	FRF_CZ_INT_ARMD_WIDTH 1
+#define	FRF_CZ_INT_PEND_LBN 31
+#define	FRF_CZ_INT_PEND_WIDTH 1
+#define	FRF_CZ_HOST_NOTIFY_MODE_LBN 30
+#define	FRF_CZ_HOST_NOTIFY_MODE_WIDTH 1
+#define	FRF_CZ_RELOAD_TIMER_VAL_LBN 16
+#define	FRF_CZ_RELOAD_TIMER_VAL_WIDTH 14
+#define	FRF_CZ_TIMER_MODE_LBN 14
+#define	FRF_CZ_TIMER_MODE_WIDTH 2
+#define	FFE_CZ_TIMER_MODE_INT_HLDOFF 3
+#define	FFE_CZ_TIMER_MODE_TRIG_START 2
+#define	FFE_CZ_TIMER_MODE_IMMED_START 1
+#define	FFE_CZ_TIMER_MODE_DIS 0
+#define	FRF_BB_TIMER_MODE_LBN 12
+#define	FRF_BB_TIMER_MODE_WIDTH 2
+#define	FFE_BB_TIMER_MODE_INT_HLDOFF 2
+#define	FFE_BB_TIMER_MODE_TRIG_START 2
+#define	FFE_BB_TIMER_MODE_IMMED_START 1
+#define	FFE_BB_TIMER_MODE_DIS 0
+#define	FRF_CZ_TIMER_VAL_LBN 0
+#define	FRF_CZ_TIMER_VAL_WIDTH 14
+#define	FRF_BB_TIMER_VAL_LBN 0
+#define	FRF_BB_TIMER_VAL_WIDTH 12
+
+/* TX_PACE_TBL: Transmit pacing table */
+#define	FR_BZ_TX_PACE_TBL 0x00f80000
+#define	FR_BZ_TX_PACE_TBL_STEP 16
+#define	FR_CZ_TX_PACE_TBL_ROWS 1024
+#define	FR_BB_TX_PACE_TBL_ROWS 4096
+#define	FRF_BZ_TX_PACE_LBN 0
+#define	FRF_BZ_TX_PACE_WIDTH 5
+
+/* RX_INDIRECTION_TBL: RX Indirection Table */
+#define	FR_BZ_RX_INDIRECTION_TBL 0x00fb0000
+#define	FR_BZ_RX_INDIRECTION_TBL_STEP 16
+#define	FR_BZ_RX_INDIRECTION_TBL_ROWS 128
+#define	FRF_BZ_IT_QUEUE_LBN 0
+#define	FRF_BZ_IT_QUEUE_WIDTH 6
+
+/* TX_FILTER_TBL0: TCP/IPv4 Transmit filter table */
+#define	FR_CZ_TX_FILTER_TBL0 0x00fc0000
+#define	FR_CZ_TX_FILTER_TBL0_STEP 16
+#define	FR_CZ_TX_FILTER_TBL0_ROWS 8192
+#define	FRF_CZ_TIFT_TCP_UDP_LBN 108
+#define	FRF_CZ_TIFT_TCP_UDP_WIDTH 1
+#define	FRF_CZ_TIFT_TXQ_ID_LBN 96
+#define	FRF_CZ_TIFT_TXQ_ID_WIDTH 12
+#define	FRF_CZ_TIFT_DEST_IP_LBN 64
+#define	FRF_CZ_TIFT_DEST_IP_WIDTH 32
+#define	FRF_CZ_TIFT_DEST_PORT_TCP_LBN 48
+#define	FRF_CZ_TIFT_DEST_PORT_TCP_WIDTH 16
+#define	FRF_CZ_TIFT_SRC_IP_LBN 16
+#define	FRF_CZ_TIFT_SRC_IP_WIDTH 32
+#define	FRF_CZ_TIFT_SRC_TCP_DEST_UDP_LBN 0
+#define	FRF_CZ_TIFT_SRC_TCP_DEST_UDP_WIDTH 16
+
+/* TX_MAC_FILTER_TBL0: Transmit Ethernet filter table */
+#define	FR_CZ_TX_MAC_FILTER_TBL0 0x00fe0000
+#define	FR_CZ_TX_MAC_FILTER_TBL0_STEP 16
+#define	FR_CZ_TX_MAC_FILTER_TBL0_ROWS 512
+#define	FRF_CZ_TMFT_TXQ_ID_LBN 61
+#define	FRF_CZ_TMFT_TXQ_ID_WIDTH 12
+#define	FRF_CZ_TMFT_WILDCARD_MATCH_LBN 60
+#define	FRF_CZ_TMFT_WILDCARD_MATCH_WIDTH 1
+#define	FRF_CZ_TMFT_SRC_MAC_LBN 16
+#define	FRF_CZ_TMFT_SRC_MAC_WIDTH 44
+#define	FRF_CZ_TMFT_VLAN_ID_LBN 0
+#define	FRF_CZ_TMFT_VLAN_ID_WIDTH 12
+
+/* MC_TREG_SMEM: MC Shared Memory */
+#define	FR_CZ_MC_TREG_SMEM 0x00ff0000
+#define	FR_CZ_MC_TREG_SMEM_STEP 4
+#define	FR_CZ_MC_TREG_SMEM_ROWS 512
+#define	FRF_CZ_MC_TREG_SMEM_ROW_LBN 0
+#define	FRF_CZ_MC_TREG_SMEM_ROW_WIDTH 32
+
+/* MSIX_VECTOR_TABLE: MSIX Vector Table */
+#define	FR_BB_MSIX_VECTOR_TABLE 0x00ff0000
+#define	FR_BZ_MSIX_VECTOR_TABLE_STEP 16
+#define	FR_BB_MSIX_VECTOR_TABLE_ROWS 64
+/* MSIX_VECTOR_TABLE: MSIX Vector Table */
+#define	FR_CZ_MSIX_VECTOR_TABLE 0x00000000
+/* FR_BZ_MSIX_VECTOR_TABLE_STEP 16 */
+#define	FR_CZ_MSIX_VECTOR_TABLE_ROWS 1024
+#define	FRF_BZ_MSIX_VECTOR_RESERVED_LBN 97
+#define	FRF_BZ_MSIX_VECTOR_RESERVED_WIDTH 31
+#define	FRF_BZ_MSIX_VECTOR_MASK_LBN 96
+#define	FRF_BZ_MSIX_VECTOR_MASK_WIDTH 1
+#define	FRF_BZ_MSIX_MESSAGE_DATA_LBN 64
+#define	FRF_BZ_MSIX_MESSAGE_DATA_WIDTH 32
+#define	FRF_BZ_MSIX_MESSAGE_ADDRESS_HI_LBN 32
+#define	FRF_BZ_MSIX_MESSAGE_ADDRESS_HI_WIDTH 32
+#define	FRF_BZ_MSIX_MESSAGE_ADDRESS_LO_LBN 0
+#define	FRF_BZ_MSIX_MESSAGE_ADDRESS_LO_WIDTH 32
+
+/* MSIX_PBA_TABLE: MSIX Pending Bit Array */
+#define	FR_BB_MSIX_PBA_TABLE 0x00ff2000
+#define	FR_BZ_MSIX_PBA_TABLE_STEP 4
+#define	FR_BB_MSIX_PBA_TABLE_ROWS 2
+/* MSIX_PBA_TABLE: MSIX Pending Bit Array */
+#define	FR_CZ_MSIX_PBA_TABLE 0x00008000
+/* FR_BZ_MSIX_PBA_TABLE_STEP 4 */
+#define	FR_CZ_MSIX_PBA_TABLE_ROWS 32
+#define	FRF_BZ_MSIX_PBA_PEND_DWORD_LBN 0
+#define	FRF_BZ_MSIX_PBA_PEND_DWORD_WIDTH 32
+
+/* SRM_DBG_REG: SRAM debug access */
+#define	FR_BZ_SRM_DBG 0x03000000
+#define	FR_BZ_SRM_DBG_STEP 8
+#define	FR_CZ_SRM_DBG_ROWS 262144
+#define	FR_BB_SRM_DBG_ROWS 2097152
+#define	FRF_BZ_SRM_DBG_LBN 0
+#define	FRF_BZ_SRM_DBG_WIDTH 64
+
+/* TB_MSIX_PBA_TABLE: MSIX Pending Bit Array */
+#define	FR_CZ_TB_MSIX_PBA_TABLE 0x00008000
+#define	FR_CZ_TB_MSIX_PBA_TABLE_STEP 4
+#define	FR_CZ_TB_MSIX_PBA_TABLE_ROWS 1024
+#define	FRF_CZ_TB_MSIX_PBA_PEND_DWORD_LBN 0
+#define	FRF_CZ_TB_MSIX_PBA_PEND_DWORD_WIDTH 32
+
+/* DRIVER_EV */
+#define	FSF_AZ_DRIVER_EV_SUBCODE_LBN 56
+#define	FSF_AZ_DRIVER_EV_SUBCODE_WIDTH 4
+#define	FSE_BZ_TX_DSC_ERROR_EV 15
+#define	FSE_BZ_RX_DSC_ERROR_EV 14
+#define	FSE_AA_RX_RECOVER_EV 11
+#define	FSE_AZ_TIMER_EV 10
+#define	FSE_AZ_TX_PKT_NON_TCP_UDP 9
+#define	FSE_AZ_WAKE_UP_EV 6
+#define	FSE_AZ_SRM_UPD_DONE_EV 5
+#define	FSE_AB_EVQ_NOT_EN_EV 3
+#define	FSE_AZ_EVQ_INIT_DONE_EV 2
+#define	FSE_AZ_RX_DESCQ_FLS_DONE_EV 1
+#define	FSE_AZ_TX_DESCQ_FLS_DONE_EV 0
+#define	FSF_AZ_DRIVER_EV_SUBDATA_LBN 0
+#define	FSF_AZ_DRIVER_EV_SUBDATA_WIDTH 14
+
+/* EVENT_ENTRY */
+#define	FSF_AZ_EV_CODE_LBN 60
+#define	FSF_AZ_EV_CODE_WIDTH 4
+#define	FSE_CZ_EV_CODE_MCDI_EV 12
+#define	FSE_CZ_EV_CODE_USER_EV 8
+#define	FSE_AZ_EV_CODE_DRV_GEN_EV 7
+#define	FSE_AZ_EV_CODE_GLOBAL_EV 6
+#define	FSE_AZ_EV_CODE_DRIVER_EV 5
+#define	FSE_AZ_EV_CODE_TX_EV 2
+#define	FSE_AZ_EV_CODE_RX_EV 0
+#define	FSF_AZ_EV_DATA_LBN 0
+#define	FSF_AZ_EV_DATA_WIDTH 60
+
+/* GLOBAL_EV */
+#define	FSF_BB_GLB_EV_RX_RECOVERY_LBN 12
+#define	FSF_BB_GLB_EV_RX_RECOVERY_WIDTH 1
+#define	FSF_AA_GLB_EV_RX_RECOVERY_LBN 11
+#define	FSF_AA_GLB_EV_RX_RECOVERY_WIDTH 1
+#define	FSF_BB_GLB_EV_XG_MGT_INTR_LBN 11
+#define	FSF_BB_GLB_EV_XG_MGT_INTR_WIDTH 1
+#define	FSF_AB_GLB_EV_XFP_PHY0_INTR_LBN 10
+#define	FSF_AB_GLB_EV_XFP_PHY0_INTR_WIDTH 1
+#define	FSF_AB_GLB_EV_XG_PHY0_INTR_LBN 9
+#define	FSF_AB_GLB_EV_XG_PHY0_INTR_WIDTH 1
+#define	FSF_AB_GLB_EV_G_PHY0_INTR_LBN 7
+#define	FSF_AB_GLB_EV_G_PHY0_INTR_WIDTH 1
+
+/* LEGACY_INT_VEC */
+#define	FSF_AZ_NET_IVEC_FATAL_INT_LBN 64
+#define	FSF_AZ_NET_IVEC_FATAL_INT_WIDTH 1
+#define	FSF_AZ_NET_IVEC_INT_Q_LBN 40
+#define	FSF_AZ_NET_IVEC_INT_Q_WIDTH 4
+#define	FSF_AZ_NET_IVEC_INT_FLAG_LBN 32
+#define	FSF_AZ_NET_IVEC_INT_FLAG_WIDTH 1
+#define	FSF_AZ_NET_IVEC_EVQ_FIFO_HF_LBN 1
+#define	FSF_AZ_NET_IVEC_EVQ_FIFO_HF_WIDTH 1
+#define	FSF_AZ_NET_IVEC_EVQ_FIFO_AF_LBN 0
+#define	FSF_AZ_NET_IVEC_EVQ_FIFO_AF_WIDTH 1
+
+/* MC_XGMAC_FLTR_RULE_DEF */
+#define	FSF_CZ_MC_XFRC_MODE_LBN 416
+#define	FSF_CZ_MC_XFRC_MODE_WIDTH 1
+#define	FSE_CZ_MC_XFRC_MODE_LAYERED 1
+#define	FSE_CZ_MC_XFRC_MODE_SIMPLE 0
+#define	FSF_CZ_MC_XFRC_HASH_LBN 384
+#define	FSF_CZ_MC_XFRC_HASH_WIDTH 32
+#define	FSF_CZ_MC_XFRC_LAYER4_BYTE_MASK_LBN 256
+#define	FSF_CZ_MC_XFRC_LAYER4_BYTE_MASK_WIDTH 128
+#define	FSF_CZ_MC_XFRC_LAYER3_BYTE_MASK_LBN 128
+#define	FSF_CZ_MC_XFRC_LAYER3_BYTE_MASK_WIDTH 128
+#define	FSF_CZ_MC_XFRC_LAYER2_OR_SIMPLE_BYTE_MASK_LBN 0
+#define	FSF_CZ_MC_XFRC_LAYER2_OR_SIMPLE_BYTE_MASK_WIDTH 128
+
+/* RX_EV */
+#define	FSF_CZ_RX_EV_PKT_NOT_PARSED_LBN 58
+#define	FSF_CZ_RX_EV_PKT_NOT_PARSED_WIDTH 1
+#define	FSF_CZ_RX_EV_IPV6_PKT_LBN 57
+#define	FSF_CZ_RX_EV_IPV6_PKT_WIDTH 1
+#define	FSF_AZ_RX_EV_PKT_OK_LBN 56
+#define	FSF_AZ_RX_EV_PKT_OK_WIDTH 1
+#define	FSF_AZ_RX_EV_PAUSE_FRM_ERR_LBN 55
+#define	FSF_AZ_RX_EV_PAUSE_FRM_ERR_WIDTH 1
+#define	FSF_AZ_RX_EV_BUF_OWNER_ID_ERR_LBN 54
+#define	FSF_AZ_RX_EV_BUF_OWNER_ID_ERR_WIDTH 1
+#define	FSF_AZ_RX_EV_IP_FRAG_ERR_LBN 53
+#define	FSF_AZ_RX_EV_IP_FRAG_ERR_WIDTH 1
+#define	FSF_AZ_RX_EV_IP_HDR_CHKSUM_ERR_LBN 52
+#define	FSF_AZ_RX_EV_IP_HDR_CHKSUM_ERR_WIDTH 1
+#define	FSF_AZ_RX_EV_TCP_UDP_CHKSUM_ERR_LBN 51
+#define	FSF_AZ_RX_EV_TCP_UDP_CHKSUM_ERR_WIDTH 1
+#define	FSF_AZ_RX_EV_ETH_CRC_ERR_LBN 50
+#define	FSF_AZ_RX_EV_ETH_CRC_ERR_WIDTH 1
+#define	FSF_AZ_RX_EV_FRM_TRUNC_LBN 49
+#define	FSF_AZ_RX_EV_FRM_TRUNC_WIDTH 1
+#define	FSF_AA_RX_EV_DRIB_NIB_LBN 49
+#define	FSF_AA_RX_EV_DRIB_NIB_WIDTH 1
+#define	FSF_AZ_RX_EV_TOBE_DISC_LBN 47
+#define	FSF_AZ_RX_EV_TOBE_DISC_WIDTH 1
+#define	FSF_AZ_RX_EV_PKT_TYPE_LBN 44
+#define	FSF_AZ_RX_EV_PKT_TYPE_WIDTH 3
+#define	FSE_AZ_RX_EV_PKT_TYPE_VLAN_JUMBO 5
+#define	FSE_AZ_RX_EV_PKT_TYPE_VLAN_LLC 4
+#define	FSE_AZ_RX_EV_PKT_TYPE_VLAN 3
+#define	FSE_AZ_RX_EV_PKT_TYPE_JUMBO 2
+#define	FSE_AZ_RX_EV_PKT_TYPE_LLC 1
+#define	FSE_AZ_RX_EV_PKT_TYPE_ETH 0
+#define	FSF_AZ_RX_EV_HDR_TYPE_LBN 42
+#define	FSF_AZ_RX_EV_HDR_TYPE_WIDTH 2
+#define	FSE_AZ_RX_EV_HDR_TYPE_OTHER 3
+#define	FSE_AB_RX_EV_HDR_TYPE_IPV4_OTHER 2
+#define	FSE_CZ_RX_EV_HDR_TYPE_IPV4V6_OTHER 2
+#define	FSE_AB_RX_EV_HDR_TYPE_IPV4_UDP 1
+#define	FSE_CZ_RX_EV_HDR_TYPE_IPV4V6_UDP 1
+#define	FSE_AB_RX_EV_HDR_TYPE_IPV4_TCP 0
+#define	FSE_CZ_RX_EV_HDR_TYPE_IPV4V6_TCP 0
+#define	FSF_AZ_RX_EV_DESC_Q_EMPTY_LBN 41
+#define	FSF_AZ_RX_EV_DESC_Q_EMPTY_WIDTH 1
+#define	FSF_AZ_RX_EV_MCAST_HASH_MATCH_LBN 40
+#define	FSF_AZ_RX_EV_MCAST_HASH_MATCH_WIDTH 1
+#define	FSF_AZ_RX_EV_MCAST_PKT_LBN 39
+#define	FSF_AZ_RX_EV_MCAST_PKT_WIDTH 1
+#define	FSF_AA_RX_EV_RECOVERY_FLAG_LBN 37
+#define	FSF_AA_RX_EV_RECOVERY_FLAG_WIDTH 1
+#define	FSF_AZ_RX_EV_Q_LABEL_LBN 32
+#define	FSF_AZ_RX_EV_Q_LABEL_WIDTH 5
+#define	FSF_AZ_RX_EV_JUMBO_CONT_LBN 31
+#define	FSF_AZ_RX_EV_JUMBO_CONT_WIDTH 1
+#define	FSF_AZ_RX_EV_PORT_LBN 30
+#define	FSF_AZ_RX_EV_PORT_WIDTH 1
+#define	FSF_AZ_RX_EV_BYTE_CNT_LBN 16
+#define	FSF_AZ_RX_EV_BYTE_CNT_WIDTH 14
+#define	FSF_AZ_RX_EV_SOP_LBN 15
+#define	FSF_AZ_RX_EV_SOP_WIDTH 1
+#define	FSF_AZ_RX_EV_ISCSI_PKT_OK_LBN 14
+#define	FSF_AZ_RX_EV_ISCSI_PKT_OK_WIDTH 1
+#define	FSF_AZ_RX_EV_ISCSI_DDIG_ERR_LBN 13
+#define	FSF_AZ_RX_EV_ISCSI_DDIG_ERR_WIDTH 1
+#define	FSF_AZ_RX_EV_ISCSI_HDIG_ERR_LBN 12
+#define	FSF_AZ_RX_EV_ISCSI_HDIG_ERR_WIDTH 1
+#define	FSF_AZ_RX_EV_DESC_PTR_LBN 0
+#define	FSF_AZ_RX_EV_DESC_PTR_WIDTH 12
+
+/* RX_KER_DESC */
+#define	FSF_AZ_RX_KER_BUF_SIZE_LBN 48
+#define	FSF_AZ_RX_KER_BUF_SIZE_WIDTH 14
+#define	FSF_AZ_RX_KER_BUF_REGION_LBN 46
+#define	FSF_AZ_RX_KER_BUF_REGION_WIDTH 2
+#define	FSF_AZ_RX_KER_BUF_ADDR_LBN 0
+#define	FSF_AZ_RX_KER_BUF_ADDR_WIDTH 46
+
+/* RX_USER_DESC */
+#define	FSF_AZ_RX_USER_2BYTE_OFFSET_LBN 20
+#define	FSF_AZ_RX_USER_2BYTE_OFFSET_WIDTH 12
+#define	FSF_AZ_RX_USER_BUF_ID_LBN 0
+#define	FSF_AZ_RX_USER_BUF_ID_WIDTH 20
+
+/* TX_EV */
+#define	FSF_AZ_TX_EV_PKT_ERR_LBN 38
+#define	FSF_AZ_TX_EV_PKT_ERR_WIDTH 1
+#define	FSF_AZ_TX_EV_PKT_TOO_BIG_LBN 37
+#define	FSF_AZ_TX_EV_PKT_TOO_BIG_WIDTH 1
+#define	FSF_AZ_TX_EV_Q_LABEL_LBN 32
+#define	FSF_AZ_TX_EV_Q_LABEL_WIDTH 5
+#define	FSF_AZ_TX_EV_PORT_LBN 16
+#define	FSF_AZ_TX_EV_PORT_WIDTH 1
+#define	FSF_AZ_TX_EV_WQ_FF_FULL_LBN 15
+#define	FSF_AZ_TX_EV_WQ_FF_FULL_WIDTH 1
+#define	FSF_AZ_TX_EV_BUF_OWNER_ID_ERR_LBN 14
+#define	FSF_AZ_TX_EV_BUF_OWNER_ID_ERR_WIDTH 1
+#define	FSF_AZ_TX_EV_COMP_LBN 12
+#define	FSF_AZ_TX_EV_COMP_WIDTH 1
+#define	FSF_AZ_TX_EV_DESC_PTR_LBN 0
+#define	FSF_AZ_TX_EV_DESC_PTR_WIDTH 12
+
+/* TX_KER_DESC */
+#define	FSF_AZ_TX_KER_CONT_LBN 62
+#define	FSF_AZ_TX_KER_CONT_WIDTH 1
+#define	FSF_AZ_TX_KER_BYTE_COUNT_LBN 48
+#define	FSF_AZ_TX_KER_BYTE_COUNT_WIDTH 14
+#define	FSF_AZ_TX_KER_BUF_REGION_LBN 46
+#define	FSF_AZ_TX_KER_BUF_REGION_WIDTH 2
+#define	FSF_AZ_TX_KER_BUF_ADDR_LBN 0
+#define	FSF_AZ_TX_KER_BUF_ADDR_WIDTH 46
+
+/* TX_USER_DESC */
+#define	FSF_AZ_TX_USER_SW_EV_EN_LBN 48
+#define	FSF_AZ_TX_USER_SW_EV_EN_WIDTH 1
+#define	FSF_AZ_TX_USER_CONT_LBN 46
+#define	FSF_AZ_TX_USER_CONT_WIDTH 1
+#define	FSF_AZ_TX_USER_BYTE_CNT_LBN 33
+#define	FSF_AZ_TX_USER_BYTE_CNT_WIDTH 13
+#define	FSF_AZ_TX_USER_BUF_ID_LBN 13
+#define	FSF_AZ_TX_USER_BUF_ID_WIDTH 20
+#define	FSF_AZ_TX_USER_BYTE_OFS_LBN 0
+#define	FSF_AZ_TX_USER_BYTE_OFS_WIDTH 13
+
+/* USER_EV */
+#define	FSF_CZ_USER_QID_LBN 32
+#define	FSF_CZ_USER_QID_WIDTH 10
+#define	FSF_CZ_USER_EV_REG_VALUE_LBN 0
+#define	FSF_CZ_USER_EV_REG_VALUE_WIDTH 32
+
+/**************************************************************************
+ *
+ * Falcon B0 PCIe core indirect registers
+ *
+ **************************************************************************
+ */
+
+#define FPCR_BB_PCIE_DEVICE_CTRL_STAT 0x68
+
+#define FPCR_BB_PCIE_LINK_CTRL_STAT 0x70
+
+#define FPCR_BB_ACK_RPL_TIMER 0x700
+#define FPCRF_BB_ACK_TL_LBN 0
+#define FPCRF_BB_ACK_TL_WIDTH 16
+#define FPCRF_BB_RPL_TL_LBN 16
+#define FPCRF_BB_RPL_TL_WIDTH 16
+
+#define FPCR_BB_ACK_FREQ 0x70C
+#define FPCRF_BB_ACK_FREQ_LBN 0
+#define FPCRF_BB_ACK_FREQ_WIDTH 7
+
+/**************************************************************************
+ *
+ * Pseudo-registers and fields
+ *
+ **************************************************************************
+ */
+
+/* Interrupt acknowledge work-around register (A0/A1 only) */
+#define FR_AA_WORK_AROUND_BROKEN_PCI_READS 0x0070
+
+/* EE_SPI_HCMD_REG: SPI host command register */
+/* Values for the EE_SPI_HCMD_SF_SEL register field */
+#define FFE_AB_SPI_DEVICE_EEPROM 0
+#define FFE_AB_SPI_DEVICE_FLASH 1
+
+/* NIC_STAT_REG: NIC status register */
+#define FRF_AB_STRAP_10G_LBN 2
+#define FRF_AB_STRAP_10G_WIDTH 1
+#define FRF_AA_STRAP_PCIE_LBN 0
+#define FRF_AA_STRAP_PCIE_WIDTH 1
+
+/* FATAL_INTR_REG_KER: Fatal interrupt register for Kernel */
+#define FRF_AZ_FATAL_INTR_LBN 0
+#define FRF_AZ_FATAL_INTR_WIDTH 12
+
+/* SRM_CFG_REG: SRAM configuration register */
+/* We treat the number of SRAM banks and bank size as a single field */
+#define	FRF_AZ_SRM_NB_SZ_LBN FRF_AZ_SRM_BANK_SIZE_LBN
+#define	FRF_AZ_SRM_NB_SZ_WIDTH \
+	(FRF_AZ_SRM_BANK_SIZE_WIDTH + FRF_AZ_SRM_NUM_BANK_WIDTH)
+#define FFE_AB_SRM_NB1_SZ2M 0
+#define FFE_AB_SRM_NB1_SZ4M 1
+#define FFE_AB_SRM_NB1_SZ8M 2
+#define FFE_AB_SRM_NB_SZ_DEF 3
+#define FFE_AB_SRM_NB2_SZ4M 4
+#define FFE_AB_SRM_NB2_SZ8M 5
+#define FFE_AB_SRM_NB2_SZ16M 6
+#define FFE_AB_SRM_NB_SZ_RES 7
+
+/* RX_DESC_UPD_REGP0: Receive descriptor update register. */
+/* We write just the last dword of these registers */
+#define	FR_AZ_RX_DESC_UPD_DWORD_P0 \
+	(BUILD_BUG_ON_ZERO(FR_AA_RX_DESC_UPD_KER != FR_BZ_RX_DESC_UPD_P0) + \
+	 FR_BZ_RX_DESC_UPD_P0 + 3 * 4)
+#define	FRF_AZ_RX_DESC_WPTR_DWORD_LBN (FRF_AZ_RX_DESC_WPTR_LBN - 3 * 32)
+#define	FRF_AZ_RX_DESC_WPTR_DWORD_WIDTH FRF_AZ_RX_DESC_WPTR_WIDTH
+
+/* TX_DESC_UPD_REGP0: Transmit descriptor update register. */
+#define FR_AZ_TX_DESC_UPD_DWORD_P0 \
+	(BUILD_BUG_ON_ZERO(FR_AA_TX_DESC_UPD_KER != FR_BZ_TX_DESC_UPD_P0) + \
+	 FR_BZ_TX_DESC_UPD_P0 + 3 * 4)
+#define	FRF_AZ_TX_DESC_WPTR_DWORD_LBN (FRF_AZ_TX_DESC_WPTR_LBN - 3 * 32)
+#define	FRF_AZ_TX_DESC_WPTR_DWORD_WIDTH FRF_AZ_TX_DESC_WPTR_WIDTH
+
+/* GMF_CFG4_REG: GMAC FIFO configuration register 4 */
+#define FRF_AB_GMF_HSTFLTRFRM_PAUSE_LBN 12
+#define FRF_AB_GMF_HSTFLTRFRM_PAUSE_WIDTH 1
+
+/* GMF_CFG5_REG: GMAC FIFO configuration register 5 */
+#define FRF_AB_GMF_HSTFLTRFRMDC_PAUSE_LBN 12
+#define FRF_AB_GMF_HSTFLTRFRMDC_PAUSE_WIDTH 1
+
+/* XM_TX_PARAM_REG: XGMAC transmit parameter register */
+#define	FRF_AB_XM_MAX_TX_FRM_SIZE_LBN FRF_AB_XM_MAX_TX_FRM_SIZE_LO_LBN
+#define	FRF_AB_XM_MAX_TX_FRM_SIZE_WIDTH (FRF_AB_XM_MAX_TX_FRM_SIZE_HI_WIDTH + \
+					 FRF_AB_XM_MAX_TX_FRM_SIZE_LO_WIDTH)
+
+/* XM_RX_PARAM_REG: XGMAC receive parameter register */
+#define	FRF_AB_XM_MAX_RX_FRM_SIZE_LBN FRF_AB_XM_MAX_RX_FRM_SIZE_LO_LBN
+#define	FRF_AB_XM_MAX_RX_FRM_SIZE_WIDTH (FRF_AB_XM_MAX_RX_FRM_SIZE_HI_WIDTH + \
+					 FRF_AB_XM_MAX_RX_FRM_SIZE_LO_WIDTH)
+
+/* XX_TXDRV_CTL_REG: XAUI SerDes transmit drive control register */
+/* Default values */
+#define FFE_AB_XX_TXDRV_DEQ_DEF 0xe /* deq=.6 */
+#define FFE_AB_XX_TXDRV_DTX_DEF 0x5 /* 1.25 */
+#define FFE_AB_XX_SD_CTL_DRV_DEF 0  /* 20mA */
+
+/* XX_CORE_STAT_REG: XAUI XGXS core status register */
+/* XGXS all-lanes status fields */
+#define	FRF_AB_XX_SYNC_STAT_LBN FRF_AB_XX_SYNC_STAT0_LBN
+#define	FRF_AB_XX_SYNC_STAT_WIDTH 4
+#define	FRF_AB_XX_COMMA_DET_LBN FRF_AB_XX_COMMA_DET_CH0_LBN
+#define	FRF_AB_XX_COMMA_DET_WIDTH 4
+#define	FRF_AB_XX_CHAR_ERR_LBN FRF_AB_XX_CHAR_ERR_CH0_LBN
+#define	FRF_AB_XX_CHAR_ERR_WIDTH 4
+#define	FRF_AB_XX_DISPERR_LBN FRF_AB_XX_DISPERR_CH0_LBN
+#define	FRF_AB_XX_DISPERR_WIDTH 4
+#define	FFE_AB_XX_STAT_ALL_LANES 0xf
+#define	FRF_AB_XX_FORCE_SIG_LBN FRF_AB_XX_FORCE_SIG0_VAL_LBN
+#define	FRF_AB_XX_FORCE_SIG_WIDTH 8
+#define	FFE_AB_XX_FORCE_SIG_ALL_LANES 0xff
+
+/* DRIVER_EV */
+/* Sub-fields of an RX flush completion event */
+#define FSF_AZ_DRIVER_EV_RX_FLUSH_FAIL_LBN 12
+#define FSF_AZ_DRIVER_EV_RX_FLUSH_FAIL_WIDTH 1
+#define FSF_AZ_DRIVER_EV_RX_DESCQ_ID_LBN 0
+#define FSF_AZ_DRIVER_EV_RX_DESCQ_ID_WIDTH 12
+
+/* EVENT_ENTRY */
+/* Magic number field for event test */
+#define FSF_AZ_DRV_GEN_EV_MAGIC_LBN 0
+#define FSF_AZ_DRV_GEN_EV_MAGIC_WIDTH 32
+
+/**************************************************************************
+ *
+ * Falcon MAC stats
+ *
+ **************************************************************************
+ *
+ */
+
+#define GRxGoodOct_offset 0x0
+#define GRxGoodOct_WIDTH 48
+#define GRxBadOct_offset 0x8
+#define GRxBadOct_WIDTH 48
+#define GRxMissPkt_offset 0x10
+#define GRxMissPkt_WIDTH 32
+#define GRxFalseCRS_offset 0x14
+#define GRxFalseCRS_WIDTH 32
+#define GRxPausePkt_offset 0x18
+#define GRxPausePkt_WIDTH 32
+#define GRxBadPkt_offset 0x1C
+#define GRxBadPkt_WIDTH 32
+#define GRxUcastPkt_offset 0x20
+#define GRxUcastPkt_WIDTH 32
+#define GRxMcastPkt_offset 0x24
+#define GRxMcastPkt_WIDTH 32
+#define GRxBcastPkt_offset 0x28
+#define GRxBcastPkt_WIDTH 32
+#define GRxGoodLt64Pkt_offset 0x2C
+#define GRxGoodLt64Pkt_WIDTH 32
+#define GRxBadLt64Pkt_offset 0x30
+#define GRxBadLt64Pkt_WIDTH 32
+#define GRx64Pkt_offset 0x34
+#define GRx64Pkt_WIDTH 32
+#define GRx65to127Pkt_offset 0x38
+#define GRx65to127Pkt_WIDTH 32
+#define GRx128to255Pkt_offset 0x3C
+#define GRx128to255Pkt_WIDTH 32
+#define GRx256to511Pkt_offset 0x40
+#define GRx256to511Pkt_WIDTH 32
+#define GRx512to1023Pkt_offset 0x44
+#define GRx512to1023Pkt_WIDTH 32
+#define GRx1024to15xxPkt_offset 0x48
+#define GRx1024to15xxPkt_WIDTH 32
+#define GRx15xxtoJumboPkt_offset 0x4C
+#define GRx15xxtoJumboPkt_WIDTH 32
+#define GRxGtJumboPkt_offset 0x50
+#define GRxGtJumboPkt_WIDTH 32
+#define GRxFcsErr64to15xxPkt_offset 0x54
+#define GRxFcsErr64to15xxPkt_WIDTH 32
+#define GRxFcsErr15xxtoJumboPkt_offset 0x58
+#define GRxFcsErr15xxtoJumboPkt_WIDTH 32
+#define GRxFcsErrGtJumboPkt_offset 0x5C
+#define GRxFcsErrGtJumboPkt_WIDTH 32
+#define GTxGoodBadOct_offset 0x80
+#define GTxGoodBadOct_WIDTH 48
+#define GTxGoodOct_offset 0x88
+#define GTxGoodOct_WIDTH 48
+#define GTxSglColPkt_offset 0x90
+#define GTxSglColPkt_WIDTH 32
+#define GTxMultColPkt_offset 0x94
+#define GTxMultColPkt_WIDTH 32
+#define GTxExColPkt_offset 0x98
+#define GTxExColPkt_WIDTH 32
+#define GTxDefPkt_offset 0x9C
+#define GTxDefPkt_WIDTH 32
+#define GTxLateCol_offset 0xA0
+#define GTxLateCol_WIDTH 32
+#define GTxExDefPkt_offset 0xA4
+#define GTxExDefPkt_WIDTH 32
+#define GTxPausePkt_offset 0xA8
+#define GTxPausePkt_WIDTH 32
+#define GTxBadPkt_offset 0xAC
+#define GTxBadPkt_WIDTH 32
+#define GTxUcastPkt_offset 0xB0
+#define GTxUcastPkt_WIDTH 32
+#define GTxMcastPkt_offset 0xB4
+#define GTxMcastPkt_WIDTH 32
+#define GTxBcastPkt_offset 0xB8
+#define GTxBcastPkt_WIDTH 32
+#define GTxLt64Pkt_offset 0xBC
+#define GTxLt64Pkt_WIDTH 32
+#define GTx64Pkt_offset 0xC0
+#define GTx64Pkt_WIDTH 32
+#define GTx65to127Pkt_offset 0xC4
+#define GTx65to127Pkt_WIDTH 32
+#define GTx128to255Pkt_offset 0xC8
+#define GTx128to255Pkt_WIDTH 32
+#define GTx256to511Pkt_offset 0xCC
+#define GTx256to511Pkt_WIDTH 32
+#define GTx512to1023Pkt_offset 0xD0
+#define GTx512to1023Pkt_WIDTH 32
+#define GTx1024to15xxPkt_offset 0xD4
+#define GTx1024to15xxPkt_WIDTH 32
+#define GTx15xxtoJumboPkt_offset 0xD8
+#define GTx15xxtoJumboPkt_WIDTH 32
+#define GTxGtJumboPkt_offset 0xDC
+#define GTxGtJumboPkt_WIDTH 32
+#define GTxNonTcpUdpPkt_offset 0xE0
+#define GTxNonTcpUdpPkt_WIDTH 16
+#define GTxMacSrcErrPkt_offset 0xE4
+#define GTxMacSrcErrPkt_WIDTH 16
+#define GTxIpSrcErrPkt_offset 0xE8
+#define GTxIpSrcErrPkt_WIDTH 16
+#define GDmaDone_offset 0xEC
+#define GDmaDone_WIDTH 32
+
+#define XgRxOctets_offset 0x0
+#define XgRxOctets_WIDTH 48
+#define XgRxOctetsOK_offset 0x8
+#define XgRxOctetsOK_WIDTH 48
+#define XgRxPkts_offset 0x10
+#define XgRxPkts_WIDTH 32
+#define XgRxPktsOK_offset 0x14
+#define XgRxPktsOK_WIDTH 32
+#define XgRxBroadcastPkts_offset 0x18
+#define XgRxBroadcastPkts_WIDTH 32
+#define XgRxMulticastPkts_offset 0x1C
+#define XgRxMulticastPkts_WIDTH 32
+#define XgRxUnicastPkts_offset 0x20
+#define XgRxUnicastPkts_WIDTH 32
+#define XgRxUndersizePkts_offset 0x24
+#define XgRxUndersizePkts_WIDTH 32
+#define XgRxOversizePkts_offset 0x28
+#define XgRxOversizePkts_WIDTH 32
+#define XgRxJabberPkts_offset 0x2C
+#define XgRxJabberPkts_WIDTH 32
+#define XgRxUndersizeFCSerrorPkts_offset 0x30
+#define XgRxUndersizeFCSerrorPkts_WIDTH 32
+#define XgRxDropEvents_offset 0x34
+#define XgRxDropEvents_WIDTH 32
+#define XgRxFCSerrorPkts_offset 0x38
+#define XgRxFCSerrorPkts_WIDTH 32
+#define XgRxAlignError_offset 0x3C
+#define XgRxAlignError_WIDTH 32
+#define XgRxSymbolError_offset 0x40
+#define XgRxSymbolError_WIDTH 32
+#define XgRxInternalMACError_offset 0x44
+#define XgRxInternalMACError_WIDTH 32
+#define XgRxControlPkts_offset 0x48
+#define XgRxControlPkts_WIDTH 32
+#define XgRxPausePkts_offset 0x4C
+#define XgRxPausePkts_WIDTH 32
+#define XgRxPkts64Octets_offset 0x50
+#define XgRxPkts64Octets_WIDTH 32
+#define XgRxPkts65to127Octets_offset 0x54
+#define XgRxPkts65to127Octets_WIDTH 32
+#define XgRxPkts128to255Octets_offset 0x58
+#define XgRxPkts128to255Octets_WIDTH 32
+#define XgRxPkts256to511Octets_offset 0x5C
+#define XgRxPkts256to511Octets_WIDTH 32
+#define XgRxPkts512to1023Octets_offset 0x60
+#define XgRxPkts512to1023Octets_WIDTH 32
+#define XgRxPkts1024to15xxOctets_offset 0x64
+#define XgRxPkts1024to15xxOctets_WIDTH 32
+#define XgRxPkts15xxtoMaxOctets_offset 0x68
+#define XgRxPkts15xxtoMaxOctets_WIDTH 32
+#define XgRxLengthError_offset 0x6C
+#define XgRxLengthError_WIDTH 32
+#define XgTxPkts_offset 0x80
+#define XgTxPkts_WIDTH 32
+#define XgTxOctets_offset 0x88
+#define XgTxOctets_WIDTH 48
+#define XgTxMulticastPkts_offset 0x90
+#define XgTxMulticastPkts_WIDTH 32
+#define XgTxBroadcastPkts_offset 0x94
+#define XgTxBroadcastPkts_WIDTH 32
+#define XgTxUnicastPkts_offset 0x98
+#define XgTxUnicastPkts_WIDTH 32
+#define XgTxControlPkts_offset 0x9C
+#define XgTxControlPkts_WIDTH 32
+#define XgTxPausePkts_offset 0xA0
+#define XgTxPausePkts_WIDTH 32
+#define XgTxPkts64Octets_offset 0xA4
+#define XgTxPkts64Octets_WIDTH 32
+#define XgTxPkts65to127Octets_offset 0xA8
+#define XgTxPkts65to127Octets_WIDTH 32
+#define XgTxPkts128to255Octets_offset 0xAC
+#define XgTxPkts128to255Octets_WIDTH 32
+#define XgTxPkts256to511Octets_offset 0xB0
+#define XgTxPkts256to511Octets_WIDTH 32
+#define XgTxPkts512to1023Octets_offset 0xB4
+#define XgTxPkts512to1023Octets_WIDTH 32
+#define XgTxPkts1024to15xxOctets_offset 0xB8
+#define XgTxPkts1024to15xxOctets_WIDTH 32
+#define XgTxPkts1519toMaxOctets_offset 0xBC
+#define XgTxPkts1519toMaxOctets_WIDTH 32
+#define XgTxUndersizePkts_offset 0xC0
+#define XgTxUndersizePkts_WIDTH 32
+#define XgTxOversizePkts_offset 0xC4
+#define XgTxOversizePkts_WIDTH 32
+#define XgTxNonTcpUdpPkt_offset 0xC8
+#define XgTxNonTcpUdpPkt_WIDTH 16
+#define XgTxMacSrcErrPkt_offset 0xCC
+#define XgTxMacSrcErrPkt_WIDTH 16
+#define XgTxIpSrcErrPkt_offset 0xD0
+#define XgTxIpSrcErrPkt_WIDTH 16
+#define XgDmaDone_offset 0xD4
+#define XgDmaDone_WIDTH 32
+
+#define FALCON_STATS_NOT_DONE 0x00000000
+#define FALCON_STATS_DONE 0xffffffff
+
+/**************************************************************************
+ *
+ * Falcon non-volatile configuration
+ *
+ **************************************************************************
+ */
+
+/* Board configuration v2 (v1 is obsolete; later versions are compatible) */
+struct falcon_nvconfig_board_v2 {
+	__le16 nports;
+	u8 port0_phy_addr;
+	u8 port0_phy_type;
+	u8 port1_phy_addr;
+	u8 port1_phy_type;
+	__le16 asic_sub_revision;
+	__le16 board_revision;
+} __packed;
+
+/* Board configuration v3 extra information */
+struct falcon_nvconfig_board_v3 {
+	__le32 spi_device_type[2];
+} __packed;
+
+/* Bit numbers for spi_device_type */
+#define SPI_DEV_TYPE_SIZE_LBN 0
+#define SPI_DEV_TYPE_SIZE_WIDTH 5
+#define SPI_DEV_TYPE_ADDR_LEN_LBN 6
+#define SPI_DEV_TYPE_ADDR_LEN_WIDTH 2
+#define SPI_DEV_TYPE_ERASE_CMD_LBN 8
+#define SPI_DEV_TYPE_ERASE_CMD_WIDTH 8
+#define SPI_DEV_TYPE_ERASE_SIZE_LBN 16
+#define SPI_DEV_TYPE_ERASE_SIZE_WIDTH 5
+#define SPI_DEV_TYPE_BLOCK_SIZE_LBN 24
+#define SPI_DEV_TYPE_BLOCK_SIZE_WIDTH 5
+#define SPI_DEV_TYPE_FIELD(type, field)					\
+	(((type) >> EFX_LOW_BIT(field)) & EFX_MASK32(EFX_WIDTH(field)))
+
+#define FALCON_NVCONFIG_OFFSET 0x300
+
+#define FALCON_NVCONFIG_BOARD_MAGIC_NUM 0xFA1C
+struct falcon_nvconfig {
+	efx_oword_t ee_vpd_cfg_reg;			/* 0x300 */
+	u8 mac_address[2][8];			/* 0x310 */
+	efx_oword_t pcie_sd_ctl0123_reg;		/* 0x320 */
+	efx_oword_t pcie_sd_ctl45_reg;			/* 0x330 */
+	efx_oword_t pcie_pcs_ctl_stat_reg;		/* 0x340 */
+	efx_oword_t hw_init_reg;			/* 0x350 */
+	efx_oword_t nic_stat_reg;			/* 0x360 */
+	efx_oword_t glb_ctl_reg;			/* 0x370 */
+	efx_oword_t srm_cfg_reg;			/* 0x380 */
+	efx_oword_t spare_reg;				/* 0x390 */
+	__le16 board_magic_num;			/* 0x3A0 */
+	__le16 board_struct_ver;
+	__le16 board_checksum;
+	struct falcon_nvconfig_board_v2 board_v2;
+	efx_oword_t ee_base_page_reg;			/* 0x3B0 */
+	struct falcon_nvconfig_board_v3 board_v3;	/* 0x3C0 */
+} __packed;
+
+#endif /* EFX_REGS_H */
--- linux-mvl-dove-2.6.32.orig/drivers/net/sfc/mtd.c
+++ linux-mvl-dove-2.6.32/drivers/net/sfc/mtd.c
@@ -1,36 +1,79 @@
 /****************************************************************************
  * Driver for Solarflare Solarstorm network controllers and boards
  * Copyright 2005-2006 Fen Systems Ltd.
- * Copyright 2006-2008 Solarflare Communications Inc.
+ * Copyright 2006-2009 Solarflare Communications Inc.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of the GNU General Public License version 2 as published
  * by the Free Software Foundation, incorporated herein by reference.
  */
 
+#include <linux/bitops.h>
 #include <linux/module.h>
 #include <linux/mtd/mtd.h>
 #include <linux/delay.h>
+#include <linux/rtnetlink.h>
 
 #define EFX_DRIVER_NAME "sfc_mtd"
 #include "net_driver.h"
 #include "spi.h"
 #include "efx.h"
+#include "nic.h"
+#include "mcdi.h"
+#include "mcdi_pcol.h"
 
 #define EFX_SPI_VERIFY_BUF_LEN 16
 
-struct efx_mtd {
-	const struct efx_spi_device *spi;
+struct efx_mtd_partition {
 	struct mtd_info mtd;
+	union {
+		struct {
+			bool updating;
+			u8 nvram_type;
+			u16 fw_subtype;
+		} mcdi;
+		size_t offset;
+	};
+	const char *type_name;
 	char name[IFNAMSIZ + 20];
 };
 
+struct efx_mtd_ops {
+	int (*read)(struct mtd_info *mtd, loff_t start, size_t len,
+		    size_t *retlen, u8 *buffer);
+	int (*erase)(struct mtd_info *mtd, loff_t start, size_t len);
+	int (*write)(struct mtd_info *mtd, loff_t start, size_t len,
+		     size_t *retlen, const u8 *buffer);
+	int (*sync)(struct mtd_info *mtd);
+};
+
+struct efx_mtd {
+	struct list_head node;
+	struct efx_nic *efx;
+	const struct efx_spi_device *spi;
+	const char *name;
+	const struct efx_mtd_ops *ops;
+	size_t n_parts;
+	struct efx_mtd_partition part[0];
+};
+
+#define efx_for_each_partition(part, efx_mtd)			\
+	for ((part) = &(efx_mtd)->part[0];			\
+	     (part) != &(efx_mtd)->part[(efx_mtd)->n_parts];	\
+	     (part)++)
+
+#define to_efx_mtd_partition(mtd)				\
+	container_of(mtd, struct efx_mtd_partition, mtd)
+
+static int falcon_mtd_probe(struct efx_nic *efx);
+static int siena_mtd_probe(struct efx_nic *efx);
+
 /* SPI utilities */
 
 static int efx_spi_slow_wait(struct efx_mtd *efx_mtd, bool uninterruptible)
 {
 	const struct efx_spi_device *spi = efx_mtd->spi;
-	struct efx_nic *efx = spi->efx;
+	struct efx_nic *efx = efx_mtd->efx;
 	u8 status;
 	int rc, i;
 
@@ -39,7 +82,7 @@
 		__set_current_state(uninterruptible ?
 				    TASK_UNINTERRUPTIBLE : TASK_INTERRUPTIBLE);
 		schedule_timeout(HZ / 10);
-		rc = falcon_spi_cmd(spi, SPI_RDSR, -1, NULL,
+		rc = falcon_spi_cmd(efx, spi, SPI_RDSR, -1, NULL,
 				    &status, sizeof(status));
 		if (rc)
 			return rc;
@@ -52,32 +95,35 @@
 	return -ETIMEDOUT;
 }
 
-static int efx_spi_unlock(const struct efx_spi_device *spi)
+static int
+efx_spi_unlock(struct efx_nic *efx, const struct efx_spi_device *spi)
 {
 	const u8 unlock_mask = (SPI_STATUS_BP2 | SPI_STATUS_BP1 |
 				SPI_STATUS_BP0);
 	u8 status;
 	int rc;
 
-	rc = falcon_spi_cmd(spi, SPI_RDSR, -1, NULL, &status, sizeof(status));
+	rc = falcon_spi_cmd(efx, spi, SPI_RDSR, -1, NULL,
+			    &status, sizeof(status));
 	if (rc)
 		return rc;
 
 	if (!(status & unlock_mask))
 		return 0; /* already unlocked */
 
-	rc = falcon_spi_cmd(spi, SPI_WREN, -1, NULL, NULL, 0);
+	rc = falcon_spi_cmd(efx, spi, SPI_WREN, -1, NULL, NULL, 0);
 	if (rc)
 		return rc;
-	rc = falcon_spi_cmd(spi, SPI_SST_EWSR, -1, NULL, NULL, 0);
+	rc = falcon_spi_cmd(efx, spi, SPI_SST_EWSR, -1, NULL, NULL, 0);
 	if (rc)
 		return rc;
 
 	status &= ~unlock_mask;
-	rc = falcon_spi_cmd(spi, SPI_WRSR, -1, &status, NULL, sizeof(status));
+	rc = falcon_spi_cmd(efx, spi, SPI_WRSR, -1, &status,
+			    NULL, sizeof(status));
 	if (rc)
 		return rc;
-	rc = falcon_spi_wait_write(spi);
+	rc = falcon_spi_wait_write(efx, spi);
 	if (rc)
 		return rc;
 
@@ -87,6 +133,7 @@
 static int efx_spi_erase(struct efx_mtd *efx_mtd, loff_t start, size_t len)
 {
 	const struct efx_spi_device *spi = efx_mtd->spi;
+	struct efx_nic *efx = efx_mtd->efx;
 	unsigned pos, block_len;
 	u8 empty[EFX_SPI_VERIFY_BUF_LEN];
 	u8 buffer[EFX_SPI_VERIFY_BUF_LEN];
@@ -98,13 +145,14 @@
 	if (spi->erase_command == 0)
 		return -EOPNOTSUPP;
 
-	rc = efx_spi_unlock(spi);
+	rc = efx_spi_unlock(efx, spi);
 	if (rc)
 		return rc;
-	rc = falcon_spi_cmd(spi, SPI_WREN, -1, NULL, NULL, 0);
+	rc = falcon_spi_cmd(efx, spi, SPI_WREN, -1, NULL, NULL, 0);
 	if (rc)
 		return rc;
-	rc = falcon_spi_cmd(spi, spi->erase_command, start, NULL, NULL, 0);
+	rc = falcon_spi_cmd(efx, spi, spi->erase_command, start, NULL,
+			    NULL, 0);
 	if (rc)
 		return rc;
 	rc = efx_spi_slow_wait(efx_mtd, false);
@@ -113,7 +161,8 @@
 	memset(empty, 0xff, sizeof(empty));
 	for (pos = 0; pos < len; pos += block_len) {
 		block_len = min(len - pos, sizeof(buffer));
-		rc = falcon_spi_read(spi, start + pos, block_len, NULL, buffer);
+		rc = falcon_spi_read(efx, spi, start + pos, block_len,
+				     NULL, buffer);
 		if (rc)
 			return rc;
 		if (memcmp(empty, buffer, block_len))
@@ -130,140 +179,473 @@
 
 /* MTD interface */
 
-static int efx_mtd_read(struct mtd_info *mtd, loff_t start, size_t len,
-			size_t *retlen, u8 *buffer)
+static int efx_mtd_erase(struct mtd_info *mtd, struct erase_info *erase)
+{
+	struct efx_mtd *efx_mtd = mtd->priv;
+	int rc;
+
+	rc = efx_mtd->ops->erase(mtd, erase->addr, erase->len);
+	if (rc == 0) {
+		erase->state = MTD_ERASE_DONE;
+	} else {
+		erase->state = MTD_ERASE_FAILED;
+		erase->fail_addr = 0xffffffff;
+	}
+	mtd_erase_callback(erase);
+	return rc;
+}
+
+static void efx_mtd_sync(struct mtd_info *mtd)
 {
 	struct efx_mtd *efx_mtd = mtd->priv;
+	struct efx_nic *efx = efx_mtd->efx;
+	int rc;
+
+	rc = efx_mtd->ops->sync(mtd);
+	if (rc)
+		EFX_ERR(efx, "%s sync failed (%d)\n", efx_mtd->name, rc);
+}
+
+static void efx_mtd_remove_partition(struct efx_mtd_partition *part)
+{
+	int rc;
+
+	for (;;) {
+		rc = del_mtd_device(&part->mtd);
+		if (rc != -EBUSY)
+			break;
+		ssleep(1);
+	}
+	WARN_ON(rc);
+}
+
+static void efx_mtd_remove_device(struct efx_mtd *efx_mtd)
+{
+	struct efx_mtd_partition *part;
+
+	efx_for_each_partition(part, efx_mtd)
+		efx_mtd_remove_partition(part);
+	list_del(&efx_mtd->node);
+	kfree(efx_mtd);
+}
+
+static void efx_mtd_rename_device(struct efx_mtd *efx_mtd)
+{
+	struct efx_mtd_partition *part;
+
+	efx_for_each_partition(part, efx_mtd)
+		if (efx_nic_rev(efx_mtd->efx) >= EFX_REV_SIENA_A0)
+			snprintf(part->name, sizeof(part->name),
+				 "%s %s:%02x", efx_mtd->efx->name,
+				 part->type_name, part->mcdi.fw_subtype);
+		else
+			snprintf(part->name, sizeof(part->name),
+				 "%s %s", efx_mtd->efx->name,
+				 part->type_name);
+}
+
+static int efx_mtd_probe_device(struct efx_nic *efx, struct efx_mtd *efx_mtd)
+{
+	struct efx_mtd_partition *part;
+
+	efx_mtd->efx = efx;
+
+	efx_mtd_rename_device(efx_mtd);
+
+	efx_for_each_partition(part, efx_mtd) {
+		part->mtd.writesize = 1;
+
+		part->mtd.owner = THIS_MODULE;
+		part->mtd.priv = efx_mtd;
+		part->mtd.name = part->name;
+		part->mtd.erase = efx_mtd_erase;
+		part->mtd.read = efx_mtd->ops->read;
+		part->mtd.write = efx_mtd->ops->write;
+		part->mtd.sync = efx_mtd_sync;
+
+		if (add_mtd_device(&part->mtd))
+			goto fail;
+	}
+
+	list_add(&efx_mtd->node, &efx->mtd_list);
+	return 0;
+
+fail:
+	while (part != &efx_mtd->part[0]) {
+		--part;
+		efx_mtd_remove_partition(part);
+	}
+	/* add_mtd_device() returns 1 if the MTD table is full */
+	return -ENOMEM;
+}
+
+void efx_mtd_remove(struct efx_nic *efx)
+{
+	struct efx_mtd *efx_mtd, *next;
+
+	WARN_ON(efx_dev_registered(efx));
+
+	list_for_each_entry_safe(efx_mtd, next, &efx->mtd_list, node)
+		efx_mtd_remove_device(efx_mtd);
+}
+
+void efx_mtd_rename(struct efx_nic *efx)
+{
+	struct efx_mtd *efx_mtd;
+
+	ASSERT_RTNL();
+
+	list_for_each_entry(efx_mtd, &efx->mtd_list, node)
+		efx_mtd_rename_device(efx_mtd);
+}
+
+int efx_mtd_probe(struct efx_nic *efx)
+{
+	if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0)
+		return siena_mtd_probe(efx);
+	else
+		return falcon_mtd_probe(efx);
+}
+
+/* Implementation of MTD operations for Falcon */
+
+static int falcon_mtd_read(struct mtd_info *mtd, loff_t start,
+			   size_t len, size_t *retlen, u8 *buffer)
+{
+	struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
+	struct efx_mtd *efx_mtd = mtd->priv;
 	const struct efx_spi_device *spi = efx_mtd->spi;
-	struct efx_nic *efx = spi->efx;
+	struct efx_nic *efx = efx_mtd->efx;
 	int rc;
 
 	rc = mutex_lock_interruptible(&efx->spi_lock);
 	if (rc)
 		return rc;
-	rc = falcon_spi_read(spi, FALCON_FLASH_BOOTCODE_START + start,
-			     len, retlen, buffer);
+	rc = falcon_spi_read(efx, spi, part->offset + start, len,
+			     retlen, buffer);
 	mutex_unlock(&efx->spi_lock);
 	return rc;
 }
 
-static int efx_mtd_erase(struct mtd_info *mtd, struct erase_info *erase)
+static int falcon_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
 {
+	struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
 	struct efx_mtd *efx_mtd = mtd->priv;
-	struct efx_nic *efx = efx_mtd->spi->efx;
+	struct efx_nic *efx = efx_mtd->efx;
 	int rc;
 
 	rc = mutex_lock_interruptible(&efx->spi_lock);
 	if (rc)
 		return rc;
-	rc = efx_spi_erase(efx_mtd, FALCON_FLASH_BOOTCODE_START + erase->addr,
-			   erase->len);
+	rc = efx_spi_erase(efx_mtd, part->offset + start, len);
 	mutex_unlock(&efx->spi_lock);
-
-	if (rc == 0) {
-		erase->state = MTD_ERASE_DONE;
-	} else {
-		erase->state = MTD_ERASE_FAILED;
-		erase->fail_addr = 0xffffffff;
-	}
-	mtd_erase_callback(erase);
 	return rc;
 }
 
-static int efx_mtd_write(struct mtd_info *mtd, loff_t start,
-			 size_t len, size_t *retlen, const u8 *buffer)
+static int falcon_mtd_write(struct mtd_info *mtd, loff_t start,
+			    size_t len, size_t *retlen, const u8 *buffer)
 {
+	struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
 	struct efx_mtd *efx_mtd = mtd->priv;
 	const struct efx_spi_device *spi = efx_mtd->spi;
-	struct efx_nic *efx = spi->efx;
+	struct efx_nic *efx = efx_mtd->efx;
 	int rc;
 
 	rc = mutex_lock_interruptible(&efx->spi_lock);
 	if (rc)
 		return rc;
-	rc = falcon_spi_write(spi, FALCON_FLASH_BOOTCODE_START + start,
-			      len, retlen, buffer);
+	rc = falcon_spi_write(efx, spi, part->offset + start, len,
+			      retlen, buffer);
 	mutex_unlock(&efx->spi_lock);
 	return rc;
 }
 
-static void efx_mtd_sync(struct mtd_info *mtd)
+static int falcon_mtd_sync(struct mtd_info *mtd)
 {
 	struct efx_mtd *efx_mtd = mtd->priv;
-	struct efx_nic *efx = efx_mtd->spi->efx;
+	struct efx_nic *efx = efx_mtd->efx;
 	int rc;
 
 	mutex_lock(&efx->spi_lock);
 	rc = efx_spi_slow_wait(efx_mtd, true);
 	mutex_unlock(&efx->spi_lock);
+	return rc;
+}
+
+static struct efx_mtd_ops falcon_mtd_ops = {
+	.read	= falcon_mtd_read,
+	.erase	= falcon_mtd_erase,
+	.write	= falcon_mtd_write,
+	.sync	= falcon_mtd_sync,
+};
+
+static int falcon_mtd_probe(struct efx_nic *efx)
+{
+	struct efx_spi_device *spi = efx->spi_flash;
+	struct efx_mtd *efx_mtd;
+	int rc;
 
+	ASSERT_RTNL();
+
+	if (!spi || spi->size <= FALCON_FLASH_BOOTCODE_START)
+		return -ENODEV;
+
+	efx_mtd = kzalloc(sizeof(*efx_mtd) + sizeof(efx_mtd->part[0]),
+			  GFP_KERNEL);
+	if (!efx_mtd)
+		return -ENOMEM;
+
+	efx_mtd->spi = spi;
+	efx_mtd->name = "flash";
+	efx_mtd->ops = &falcon_mtd_ops;
+
+	efx_mtd->n_parts = 1;
+	efx_mtd->part[0].mtd.type = MTD_NORFLASH;
+	efx_mtd->part[0].mtd.flags = MTD_CAP_NORFLASH;
+	efx_mtd->part[0].mtd.size = spi->size - FALCON_FLASH_BOOTCODE_START;
+	efx_mtd->part[0].mtd.erasesize = spi->erase_size;
+	efx_mtd->part[0].offset = FALCON_FLASH_BOOTCODE_START;
+	efx_mtd->part[0].type_name = "sfc_flash_bootrom";
+
+	rc = efx_mtd_probe_device(efx, efx_mtd);
 	if (rc)
-		EFX_ERR(efx, "%s sync failed (%d)\n", efx_mtd->name, rc);
-	return;
+		kfree(efx_mtd);
+	return rc;
 }
 
-void efx_mtd_remove(struct efx_nic *efx)
+/* Implementation of MTD operations for Siena */
+
+static int siena_mtd_read(struct mtd_info *mtd, loff_t start,
+			  size_t len, size_t *retlen, u8 *buffer)
 {
-	if (efx->spi_flash && efx->spi_flash->mtd) {
-		struct efx_mtd *efx_mtd = efx->spi_flash->mtd;
-		int rc;
-
-		for (;;) {
-			rc = del_mtd_device(&efx_mtd->mtd);
-			if (rc != -EBUSY)
-				break;
-			ssleep(1);
-		}
-		WARN_ON(rc);
-		kfree(efx_mtd);
+	struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
+	struct efx_mtd *efx_mtd = mtd->priv;
+	struct efx_nic *efx = efx_mtd->efx;
+	loff_t offset = start;
+	loff_t end = min_t(loff_t, start + len, mtd->size);
+	size_t chunk;
+	int rc = 0;
+
+	while (offset < end) {
+		chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
+		rc = efx_mcdi_nvram_read(efx, part->mcdi.nvram_type, offset,
+					 buffer, chunk);
+		if (rc)
+			goto out;
+		offset += chunk;
+		buffer += chunk;
 	}
+out:
+	*retlen = offset - start;
+	return rc;
 }
 
-void efx_mtd_rename(struct efx_nic *efx)
+static int siena_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
 {
-	if (efx->spi_flash && efx->spi_flash->mtd) {
-		struct efx_mtd *efx_mtd = efx->spi_flash->mtd;
-		snprintf(efx_mtd->name, sizeof(efx_mtd->name),
-			 "%s sfc_flash_bootrom", efx->name);
+	struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
+	struct efx_mtd *efx_mtd = mtd->priv;
+	struct efx_nic *efx = efx_mtd->efx;
+	loff_t offset = start & ~((loff_t)(mtd->erasesize - 1));
+	loff_t end = min_t(loff_t, start + len, mtd->size);
+	size_t chunk = part->mtd.erasesize;
+	int rc = 0;
+
+	if (!part->mcdi.updating) {
+		rc = efx_mcdi_nvram_update_start(efx, part->mcdi.nvram_type);
+		if (rc)
+			goto out;
+		part->mcdi.updating = 1;
 	}
+
+	/* The MCDI interface can in fact do multiple erase blocks at once;
+	 * but erasing may be slow, so we make multiple calls here to avoid
+	 * tripping the MCDI RPC timeout. */
+	while (offset < end) {
+		rc = efx_mcdi_nvram_erase(efx, part->mcdi.nvram_type, offset,
+					  chunk);
+		if (rc)
+			goto out;
+		offset += chunk;
+	}
+out:
+	return rc;
 }
 
-int efx_mtd_probe(struct efx_nic *efx)
+static int siena_mtd_write(struct mtd_info *mtd, loff_t start,
+			   size_t len, size_t *retlen, const u8 *buffer)
 {
-	struct efx_spi_device *spi = efx->spi_flash;
-	struct efx_mtd *efx_mtd;
+	struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
+	struct efx_mtd *efx_mtd = mtd->priv;
+	struct efx_nic *efx = efx_mtd->efx;
+	loff_t offset = start;
+	loff_t end = min_t(loff_t, start + len, mtd->size);
+	size_t chunk;
+	int rc = 0;
 
-	if (!spi || spi->size <= FALCON_FLASH_BOOTCODE_START)
+	if (!part->mcdi.updating) {
+		rc = efx_mcdi_nvram_update_start(efx, part->mcdi.nvram_type);
+		if (rc)
+			goto out;
+		part->mcdi.updating = 1;
+	}
+
+	while (offset < end) {
+		chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
+		rc = efx_mcdi_nvram_write(efx, part->mcdi.nvram_type, offset,
+					  buffer, chunk);
+		if (rc)
+			goto out;
+		offset += chunk;
+		buffer += chunk;
+	}
+out:
+	*retlen = offset - start;
+	return rc;
+}
+
+static int siena_mtd_sync(struct mtd_info *mtd)
+{
+	struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
+	struct efx_mtd *efx_mtd = mtd->priv;
+	struct efx_nic *efx = efx_mtd->efx;
+	int rc = 0;
+
+	if (part->mcdi.updating) {
+		part->mcdi.updating = 0;
+		rc = efx_mcdi_nvram_update_finish(efx, part->mcdi.nvram_type);
+	}
+
+	return rc;
+}
+
+static struct efx_mtd_ops siena_mtd_ops = {
+	.read	= siena_mtd_read,
+	.erase	= siena_mtd_erase,
+	.write	= siena_mtd_write,
+	.sync	= siena_mtd_sync,
+};
+
+struct siena_nvram_type_info {
+	int port;
+	const char *name;
+};
+
+static struct siena_nvram_type_info siena_nvram_types[] = {
+	[MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO]	= { 0, "sfc_dummy_phy" },
+	[MC_CMD_NVRAM_TYPE_MC_FW]		= { 0, "sfc_mcfw" },
+	[MC_CMD_NVRAM_TYPE_MC_FW_BACKUP]	= { 0, "sfc_mcfw_backup" },
+	[MC_CMD_NVRAM_TYPE_STATIC_CFG_PORT0]	= { 0, "sfc_static_cfg" },
+	[MC_CMD_NVRAM_TYPE_STATIC_CFG_PORT1]	= { 1, "sfc_static_cfg" },
+	[MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0]	= { 0, "sfc_dynamic_cfg" },
+	[MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1]	= { 1, "sfc_dynamic_cfg" },
+	[MC_CMD_NVRAM_TYPE_EXP_ROM]		= { 0, "sfc_exp_rom" },
+	[MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT0]	= { 0, "sfc_exp_rom_cfg" },
+	[MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT1]	= { 1, "sfc_exp_rom_cfg" },
+	[MC_CMD_NVRAM_TYPE_PHY_PORT0]		= { 0, "sfc_phy_fw" },
+	[MC_CMD_NVRAM_TYPE_PHY_PORT1]		= { 1, "sfc_phy_fw" },
+};
+
+static int siena_mtd_probe_partition(struct efx_nic *efx,
+				     struct efx_mtd *efx_mtd,
+				     unsigned int part_id,
+				     unsigned int type)
+{
+	struct efx_mtd_partition *part = &efx_mtd->part[part_id];
+	struct siena_nvram_type_info *info;
+	size_t size, erase_size;
+	bool protected;
+	int rc;
+
+	if (type >= ARRAY_SIZE(siena_nvram_types))
+		return -ENODEV;
+
+	info = &siena_nvram_types[type];
+
+	if (info->port != efx_port_num(efx))
 		return -ENODEV;
 
-	efx_mtd = kzalloc(sizeof(*efx_mtd), GFP_KERNEL);
+	rc = efx_mcdi_nvram_info(efx, type, &size, &erase_size, &protected);
+	if (rc)
+		return rc;
+	if (protected)
+		return -ENODEV; /* hide it */
+
+	part->mcdi.nvram_type = type;
+	part->type_name = info->name;
+
+	part->mtd.type = MTD_NORFLASH;
+	part->mtd.flags = MTD_CAP_NORFLASH;
+	part->mtd.size = size;
+	part->mtd.erasesize = erase_size;
+
+	return 0;
+}
+
+static int siena_mtd_get_fw_subtypes(struct efx_nic *efx,
+				     struct efx_mtd *efx_mtd)
+{
+	struct efx_mtd_partition *part;
+	uint16_t fw_subtype_list[MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_LEN /
+				 sizeof(uint16_t)];
+	int rc;
+
+	rc = efx_mcdi_get_board_cfg(efx, NULL, fw_subtype_list);
+	if (rc)
+		return rc;
+
+	efx_for_each_partition(part, efx_mtd)
+		part->mcdi.fw_subtype = fw_subtype_list[part->mcdi.nvram_type];
+
+	return 0;
+}
+
+static int siena_mtd_probe(struct efx_nic *efx)
+{
+	struct efx_mtd *efx_mtd;
+	int rc = -ENODEV;
+	u32 nvram_types;
+	unsigned int type;
+
+	ASSERT_RTNL();
+
+	rc = efx_mcdi_nvram_types(efx, &nvram_types);
+	if (rc)
+		return rc;
+
+	efx_mtd = kzalloc(sizeof(*efx_mtd) +
+			  hweight32(nvram_types) * sizeof(efx_mtd->part[0]),
+			  GFP_KERNEL);
 	if (!efx_mtd)
 		return -ENOMEM;
 
-	efx_mtd->spi = spi;
-	spi->mtd = efx_mtd;
+	efx_mtd->name = "Siena NVRAM manager";
 
-	efx_mtd->mtd.type = MTD_NORFLASH;
-	efx_mtd->mtd.flags = MTD_CAP_NORFLASH;
-	efx_mtd->mtd.size = spi->size - FALCON_FLASH_BOOTCODE_START;
-	efx_mtd->mtd.erasesize = spi->erase_size;
-	efx_mtd->mtd.writesize = 1;
-	efx_mtd_rename(efx);
-
-	efx_mtd->mtd.owner = THIS_MODULE;
-	efx_mtd->mtd.priv = efx_mtd;
-	efx_mtd->mtd.name = efx_mtd->name;
-	efx_mtd->mtd.erase = efx_mtd_erase;
-	efx_mtd->mtd.read = efx_mtd_read;
-	efx_mtd->mtd.write = efx_mtd_write;
-	efx_mtd->mtd.sync = efx_mtd_sync;
+	efx_mtd->ops = &siena_mtd_ops;
 
-	if (add_mtd_device(&efx_mtd->mtd)) {
-		kfree(efx_mtd);
-		spi->mtd = NULL;
-		/* add_mtd_device() returns 1 if the MTD table is full */
-		return -ENOMEM;
+	type = 0;
+	efx_mtd->n_parts = 0;
+
+	while (nvram_types != 0) {
+		if (nvram_types & 1) {
+			rc = siena_mtd_probe_partition(efx, efx_mtd,
+						       efx_mtd->n_parts, type);
+			if (rc == 0)
+				efx_mtd->n_parts++;
+			else if (rc != -ENODEV)
+				goto fail;
+		}
+		type++;
+		nvram_types >>= 1;
 	}
 
-	return 0;
+	rc = siena_mtd_get_fw_subtypes(efx, efx_mtd);
+	if (rc)
+		goto fail;
+
+	rc = efx_mtd_probe_device(efx, efx_mtd);
+fail:
+	if (rc)
+		kfree(efx_mtd);
+	return rc;
 }
+
--- linux-mvl-dove-2.6.32.orig/drivers/net/sfc/tx.c
+++ linux-mvl-dove-2.6.32/drivers/net/sfc/tx.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * Driver for Solarflare Solarstorm network controllers and boards
  * Copyright 2005-2006 Fen Systems Ltd.
- * Copyright 2005-2008 Solarflare Communications Inc.
+ * Copyright 2005-2009 Solarflare Communications Inc.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of the GNU General Public License version 2 as published
@@ -12,12 +12,13 @@
 #include <linux/tcp.h>
 #include <linux/ip.h>
 #include <linux/in.h>
+#include <linux/ipv6.h>
+#include <net/ipv6.h>
 #include <linux/if_ether.h>
 #include <linux/highmem.h>
 #include "net_driver.h"
-#include "tx.h"
 #include "efx.h"
-#include "falcon.h"
+#include "nic.h"
 #include "workarounds.h"
 
 /*
@@ -26,8 +27,7 @@
  * The tx_queue descriptor ring fill-level must fall below this value
  * before we restart the netif queue
  */
-#define EFX_NETDEV_TX_THRESHOLD(_tx_queue)	\
-	(_tx_queue->efx->type->txd_ring_mask / 2u)
+#define EFX_TXQ_THRESHOLD (EFX_TXQ_MASK / 2u)
 
 /* We want to be able to nest calls to netif_stop_queue(), since each
  * channel can have an individual stop on the queue.
@@ -125,6 +125,24 @@
 }
 
 
+static inline unsigned
+efx_max_tx_len(struct efx_nic *efx, dma_addr_t dma_addr)
+{
+	/* Depending on the NIC revision, we can use descriptor
+	 * lengths up to 8K or 8K-1.  However, since PCI Express
+	 * devices must split read requests at 4K boundaries, there is
+	 * little benefit from using descriptors that cross those
+	 * boundaries and we keep things simple by not doing so.
+	 */
+	unsigned len = (~dma_addr & 0xfff) + 1;
+
+	/* Work around hardware bug for unaligned buffers. */
+	if (EFX_WORKAROUND_5391(efx) && (dma_addr & 0xf))
+		len = min_t(unsigned, len, 512 - (dma_addr & 0xf));
+
+	return len;
+}
+
 /*
  * Add a socket buffer to a TX queue
  *
@@ -135,11 +153,13 @@
  * If any DMA mapping fails, any mapped fragments will be unmapped,
  * the queue's insert pointer will be restored to its original value.
  *
+ * This function is split out from efx_hard_start_xmit to allow the
+ * loopback test to direct packets via specific TX queues.
+ *
  * Returns NETDEV_TX_OK or NETDEV_TX_BUSY
  * You must hold netif_tx_lock() to call this function.
  */
-static netdev_tx_t efx_enqueue_skb(struct efx_tx_queue *tx_queue,
-					 struct sk_buff *skb)
+netdev_tx_t efx_enqueue_skb(struct efx_tx_queue *tx_queue, struct sk_buff *skb)
 {
 	struct efx_nic *efx = tx_queue->efx;
 	struct pci_dev *pci_dev = efx->pci_dev;
@@ -147,7 +167,7 @@
 	skb_frag_t *fragment;
 	struct page *page;
 	int page_offset;
-	unsigned int len, unmap_len = 0, fill_level, insert_ptr, misalign;
+	unsigned int len, unmap_len = 0, fill_level, insert_ptr;
 	dma_addr_t dma_addr, unmap_addr = 0;
 	unsigned int dma_len;
 	bool unmap_single;
@@ -156,7 +176,7 @@
 
 	EFX_BUG_ON_PARANOID(tx_queue->write_count != tx_queue->insert_count);
 
-	if (skb_shinfo((struct sk_buff *)skb)->gso_size)
+	if (skb_shinfo(skb)->gso_size)
 		return efx_enqueue_skb_tso(tx_queue, skb);
 
 	/* Get size of the initial fragment */
@@ -171,7 +191,7 @@
 	}
 
 	fill_level = tx_queue->insert_count - tx_queue->old_read_count;
-	q_space = efx->type->txd_ring_mask - 1 - fill_level;
+	q_space = EFX_TXQ_MASK - 1 - fill_level;
 
 	/* Map for DMA.  Use pci_map_single rather than pci_map_page
 	 * since this is more efficient on machines with sparse
@@ -208,16 +228,14 @@
 					&tx_queue->read_count;
 				fill_level = (tx_queue->insert_count
 					      - tx_queue->old_read_count);
-				q_space = (efx->type->txd_ring_mask - 1 -
-					   fill_level);
+				q_space = EFX_TXQ_MASK - 1 - fill_level;
 				if (unlikely(q_space-- <= 0))
 					goto stop;
 				smp_mb();
 				--tx_queue->stopped;
 			}
 
-			insert_ptr = (tx_queue->insert_count &
-				      efx->type->txd_ring_mask);
+			insert_ptr = tx_queue->insert_count & EFX_TXQ_MASK;
 			buffer = &tx_queue->buffer[insert_ptr];
 			efx_tsoh_free(tx_queue, buffer);
 			EFX_BUG_ON_PARANOID(buffer->tsoh);
@@ -226,14 +244,10 @@
 			EFX_BUG_ON_PARANOID(!buffer->continuation);
 			EFX_BUG_ON_PARANOID(buffer->unmap_len);
 
-			dma_len = (((~dma_addr) & efx->type->tx_dma_mask) + 1);
-			if (likely(dma_len > len))
+			dma_len = efx_max_tx_len(efx, dma_addr);
+			if (likely(dma_len >= len))
 				dma_len = len;
 
-			misalign = (unsigned)dma_addr & efx->type->bug5391_mask;
-			if (misalign && dma_len + misalign > 512)
-				dma_len = 512 - misalign;
-
 			/* Fill out per descriptor fields */
 			buffer->len = dma_len;
 			buffer->dma_addr = dma_addr;
@@ -266,7 +280,7 @@
 	buffer->continuation = false;
 
 	/* Pass off to hardware */
-	falcon_push_buffers(tx_queue);
+	efx_nic_push_buffers(tx_queue);
 
 	return NETDEV_TX_OK;
 
@@ -276,7 +290,7 @@
 		   skb_shinfo(skb)->nr_frags + 1);
 
 	/* Mark the packet as transmitted, and free the SKB ourselves */
-	dev_kfree_skb_any((struct sk_buff *)skb);
+	dev_kfree_skb_any(skb);
 	goto unwind;
 
  stop:
@@ -289,7 +303,7 @@
 	/* Work backwards until we hit the original insert pointer value */
 	while (tx_queue->insert_count != tx_queue->write_count) {
 		--tx_queue->insert_count;
-		insert_ptr = tx_queue->insert_count & efx->type->txd_ring_mask;
+		insert_ptr = tx_queue->insert_count & EFX_TXQ_MASK;
 		buffer = &tx_queue->buffer[insert_ptr];
 		efx_dequeue_buffer(tx_queue, buffer);
 		buffer->len = 0;
@@ -318,10 +332,9 @@
 {
 	struct efx_nic *efx = tx_queue->efx;
 	unsigned int stop_index, read_ptr;
-	unsigned int mask = tx_queue->efx->type->txd_ring_mask;
 
-	stop_index = (index + 1) & mask;
-	read_ptr = tx_queue->read_count & mask;
+	stop_index = (index + 1) & EFX_TXQ_MASK;
+	read_ptr = tx_queue->read_count & EFX_TXQ_MASK;
 
 	while (read_ptr != stop_index) {
 		struct efx_tx_buffer *buffer = &tx_queue->buffer[read_ptr];
@@ -338,28 +351,10 @@
 		buffer->len = 0;
 
 		++tx_queue->read_count;
-		read_ptr = tx_queue->read_count & mask;
+		read_ptr = tx_queue->read_count & EFX_TXQ_MASK;
 	}
 }
 
-/* Initiate a packet transmission on the specified TX queue.
- * Note that returning anything other than NETDEV_TX_OK will cause the
- * OS to free the skb.
- *
- * This function is split out from efx_hard_start_xmit to allow the
- * loopback test to direct packets via specific TX queues.  It is
- * therefore a non-static inline, so as not to penalise performance
- * for non-loopback transmissions.
- *
- * Context: netif_tx_lock held
- */
-inline netdev_tx_t efx_xmit(struct efx_nic *efx,
-			   struct efx_tx_queue *tx_queue, struct sk_buff *skb)
-{
-	/* Map fragments for DMA and add to TX queue */
-	return efx_enqueue_skb(tx_queue, skb);
-}
-
 /* Initiate a packet transmission.  We use one channel per CPU
  * (sharing when we have more CPUs than channels).  On Falcon, the TX
  * completion events will be directed back to the CPU that transmitted
@@ -383,7 +378,7 @@
 	else
 		tx_queue = &efx->tx_queue[EFX_TX_QUEUE_NO_CSUM];
 
-	return efx_xmit(efx, tx_queue, skb);
+	return efx_enqueue_skb(tx_queue, skb);
 }
 
 void efx_xmit_done(struct efx_tx_queue *tx_queue, unsigned int index)
@@ -391,7 +386,7 @@
 	unsigned fill_level;
 	struct efx_nic *efx = tx_queue->efx;
 
-	EFX_BUG_ON_PARANOID(index > efx->type->txd_ring_mask);
+	EFX_BUG_ON_PARANOID(index > EFX_TXQ_MASK);
 
 	efx_dequeue_buffers(tx_queue, index);
 
@@ -401,7 +396,7 @@
 	smp_mb();
 	if (unlikely(tx_queue->stopped) && likely(efx->port_enabled)) {
 		fill_level = tx_queue->insert_count - tx_queue->read_count;
-		if (fill_level < EFX_NETDEV_TX_THRESHOLD(tx_queue)) {
+		if (fill_level < EFX_TXQ_THRESHOLD) {
 			EFX_BUG_ON_PARANOID(!efx_dev_registered(efx));
 
 			/* Do this under netif_tx_lock(), to avoid racing
@@ -425,15 +420,15 @@
 	EFX_LOG(efx, "creating TX queue %d\n", tx_queue->queue);
 
 	/* Allocate software ring */
-	txq_size = (efx->type->txd_ring_mask + 1) * sizeof(*tx_queue->buffer);
+	txq_size = EFX_TXQ_SIZE * sizeof(*tx_queue->buffer);
 	tx_queue->buffer = kzalloc(txq_size, GFP_KERNEL);
 	if (!tx_queue->buffer)
 		return -ENOMEM;
-	for (i = 0; i <= efx->type->txd_ring_mask; ++i)
+	for (i = 0; i <= EFX_TXQ_MASK; ++i)
 		tx_queue->buffer[i].continuation = true;
 
 	/* Allocate hardware ring */
-	rc = falcon_probe_tx(tx_queue);
+	rc = efx_nic_probe_tx(tx_queue);
 	if (rc)
 		goto fail;
 
@@ -456,7 +451,7 @@
 	BUG_ON(tx_queue->stopped);
 
 	/* Set up TX descriptor ring */
-	falcon_init_tx(tx_queue);
+	efx_nic_init_tx(tx_queue);
 }
 
 void efx_release_tx_buffers(struct efx_tx_queue *tx_queue)
@@ -468,8 +463,7 @@
 
 	/* Free any buffers left in the ring */
 	while (tx_queue->read_count != tx_queue->write_count) {
-		buffer = &tx_queue->buffer[tx_queue->read_count &
-					   tx_queue->efx->type->txd_ring_mask];
+		buffer = &tx_queue->buffer[tx_queue->read_count & EFX_TXQ_MASK];
 		efx_dequeue_buffer(tx_queue, buffer);
 		buffer->continuation = true;
 		buffer->len = 0;
@@ -483,7 +477,7 @@
 	EFX_LOG(tx_queue->efx, "shutting down TX queue %d\n", tx_queue->queue);
 
 	/* Flush TX queue, remove descriptor ring */
-	falcon_fini_tx(tx_queue);
+	efx_nic_fini_tx(tx_queue);
 
 	efx_release_tx_buffers(tx_queue);
 
@@ -500,7 +494,7 @@
 void efx_remove_tx_queue(struct efx_tx_queue *tx_queue)
 {
 	EFX_LOG(tx_queue->efx, "destroying TX queue %d\n", tx_queue->queue);
-	falcon_remove_tx(tx_queue);
+	efx_nic_remove_tx(tx_queue);
 
 	kfree(tx_queue->buffer);
 	tx_queue->buffer = NULL;
@@ -539,6 +533,7 @@
 #define ETH_HDR_LEN(skb)  (skb_network_header(skb) - (skb)->data)
 #define SKB_TCP_OFF(skb)  PTR_DIFF(tcp_hdr(skb), (skb)->data)
 #define SKB_IPV4_OFF(skb) PTR_DIFF(ip_hdr(skb), (skb)->data)
+#define SKB_IPV6_OFF(skb) PTR_DIFF(ipv6_hdr(skb), (skb)->data)
 
 /**
  * struct tso_state - TSO state for an SKB
@@ -551,6 +546,7 @@
  * @unmap_len: Length of SKB fragment
  * @unmap_addr: DMA address of SKB fragment
  * @unmap_single: DMA single vs page mapping flag
+ * @protocol: Network protocol (after any VLAN header)
  * @header_len: Number of bytes of header
  * @full_packet_size: Number of bytes to put in each outgoing segment
  *
@@ -571,6 +567,7 @@
 	dma_addr_t unmap_addr;
 	bool unmap_single;
 
+	__be16 protocol;
 	unsigned header_len;
 	int full_packet_size;
 };
@@ -578,9 +575,9 @@
 
 /*
  * Verify that our various assumptions about sk_buffs and the conditions
- * under which TSO will be attempted hold true.
+ * under which TSO will be attempted hold true.  Return the protocol number.
  */
-static void efx_tso_check_safe(struct sk_buff *skb)
+static __be16 efx_tso_check_protocol(struct sk_buff *skb)
 {
 	__be16 protocol = skb->protocol;
 
@@ -595,13 +592,22 @@
 		if (protocol == htons(ETH_P_IP))
 			skb_set_transport_header(skb, sizeof(*veh) +
 						 4 * ip_hdr(skb)->ihl);
+		else if (protocol == htons(ETH_P_IPV6))
+			skb_set_transport_header(skb, sizeof(*veh) +
+						 sizeof(struct ipv6hdr));
 	}
 
-	EFX_BUG_ON_PARANOID(protocol != htons(ETH_P_IP));
-	EFX_BUG_ON_PARANOID(ip_hdr(skb)->protocol != IPPROTO_TCP);
+	if (protocol == htons(ETH_P_IP)) {
+		EFX_BUG_ON_PARANOID(ip_hdr(skb)->protocol != IPPROTO_TCP);
+	} else {
+		EFX_BUG_ON_PARANOID(protocol != htons(ETH_P_IPV6));
+		EFX_BUG_ON_PARANOID(ipv6_hdr(skb)->nexthdr != NEXTHDR_TCP);
+	}
 	EFX_BUG_ON_PARANOID((PTR_DIFF(tcp_hdr(skb), skb->data)
 			     + (tcp_hdr(skb)->doff << 2u)) >
 			    skb_headlen(skb));
+
+	return protocol;
 }
 
 
@@ -708,14 +714,14 @@
 {
 	struct efx_tx_buffer *buffer;
 	struct efx_nic *efx = tx_queue->efx;
-	unsigned dma_len, fill_level, insert_ptr, misalign;
+	unsigned dma_len, fill_level, insert_ptr;
 	int q_space;
 
 	EFX_BUG_ON_PARANOID(len <= 0);
 
 	fill_level = tx_queue->insert_count - tx_queue->old_read_count;
 	/* -1 as there is no way to represent all descriptors used */
-	q_space = efx->type->txd_ring_mask - 1 - fill_level;
+	q_space = EFX_TXQ_MASK - 1 - fill_level;
 
 	while (1) {
 		if (unlikely(q_space-- <= 0)) {
@@ -731,7 +737,7 @@
 				*(volatile unsigned *)&tx_queue->read_count;
 			fill_level = (tx_queue->insert_count
 				      - tx_queue->old_read_count);
-			q_space = efx->type->txd_ring_mask - 1 - fill_level;
+			q_space = EFX_TXQ_MASK - 1 - fill_level;
 			if (unlikely(q_space-- <= 0)) {
 				*final_buffer = NULL;
 				return 1;
@@ -740,13 +746,13 @@
 			--tx_queue->stopped;
 		}
 
-		insert_ptr = tx_queue->insert_count & efx->type->txd_ring_mask;
+		insert_ptr = tx_queue->insert_count & EFX_TXQ_MASK;
 		buffer = &tx_queue->buffer[insert_ptr];
 		++tx_queue->insert_count;
 
 		EFX_BUG_ON_PARANOID(tx_queue->insert_count -
 				    tx_queue->read_count >
-				    efx->type->txd_ring_mask);
+				    EFX_TXQ_MASK);
 
 		efx_tsoh_free(tx_queue, buffer);
 		EFX_BUG_ON_PARANOID(buffer->len);
@@ -757,12 +763,7 @@
 
 		buffer->dma_addr = dma_addr;
 
-		/* Ensure we do not cross a boundary unsupported by H/W */
-		dma_len = (~dma_addr & efx->type->tx_dma_mask) + 1;
-
-		misalign = (unsigned)dma_addr & efx->type->bug5391_mask;
-		if (misalign && dma_len + misalign > 512)
-			dma_len = 512 - misalign;
+		dma_len = efx_max_tx_len(efx, dma_addr);
 
 		/* If there is enough space to send then do so */
 		if (dma_len >= len)
@@ -792,8 +793,7 @@
 {
 	struct efx_tx_buffer *buffer;
 
-	buffer = &tx_queue->buffer[tx_queue->insert_count &
-				   tx_queue->efx->type->txd_ring_mask];
+	buffer = &tx_queue->buffer[tx_queue->insert_count & EFX_TXQ_MASK];
 	efx_tsoh_free(tx_queue, buffer);
 	EFX_BUG_ON_PARANOID(buffer->len);
 	EFX_BUG_ON_PARANOID(buffer->unmap_len);
@@ -818,11 +818,9 @@
 	while (tx_queue->insert_count != tx_queue->write_count) {
 		--tx_queue->insert_count;
 		buffer = &tx_queue->buffer[tx_queue->insert_count &
-					   tx_queue->efx->type->txd_ring_mask];
+					   EFX_TXQ_MASK];
 		efx_tsoh_free(tx_queue, buffer);
 		EFX_BUG_ON_PARANOID(buffer->skb);
-		buffer->len = 0;
-		buffer->continuation = true;
 		if (buffer->unmap_len) {
 			unmap_addr = (buffer->dma_addr + buffer->len -
 				      buffer->unmap_len);
@@ -836,6 +834,8 @@
 					       PCI_DMA_TODEVICE);
 			buffer->unmap_len = 0;
 		}
+		buffer->len = 0;
+		buffer->continuation = true;
 	}
 }
 
@@ -850,7 +850,10 @@
 			  + PTR_DIFF(tcp_hdr(skb), skb->data));
 	st->full_packet_size = st->header_len + skb_shinfo(skb)->gso_size;
 
-	st->ipv4_id = ntohs(ip_hdr(skb)->id);
+	if (st->protocol == htons(ETH_P_IP))
+		st->ipv4_id = ntohs(ip_hdr(skb)->id);
+	else
+		st->ipv4_id = 0;
 	st->seqnum = ntohl(tcp_hdr(skb)->seq);
 
 	EFX_BUG_ON_PARANOID(tcp_hdr(skb)->urg);
@@ -965,7 +968,6 @@
 				struct tso_state *st)
 {
 	struct efx_tso_header *tsoh;
-	struct iphdr *tsoh_iph;
 	struct tcphdr *tsoh_th;
 	unsigned ip_length;
 	u8 *header;
@@ -989,7 +991,6 @@
 
 	header = TSOH_BUFFER(tsoh);
 	tsoh_th = (struct tcphdr *)(header + SKB_TCP_OFF(skb));
-	tsoh_iph = (struct iphdr *)(header + SKB_IPV4_OFF(skb));
 
 	/* Copy and update the headers. */
 	memcpy(header, skb->data, st->header_len);
@@ -1007,11 +1008,22 @@
 		tsoh_th->fin = tcp_hdr(skb)->fin;
 		tsoh_th->psh = tcp_hdr(skb)->psh;
 	}
-	tsoh_iph->tot_len = htons(ip_length);
 
-	/* Linux leaves suitable gaps in the IP ID space for us to fill. */
-	tsoh_iph->id = htons(st->ipv4_id);
-	st->ipv4_id++;
+	if (st->protocol == htons(ETH_P_IP)) {
+		struct iphdr *tsoh_iph =
+			(struct iphdr *)(header + SKB_IPV4_OFF(skb));
+
+		tsoh_iph->tot_len = htons(ip_length);
+
+		/* Linux leaves suitable gaps in the IP ID space for us to fill. */
+		tsoh_iph->id = htons(st->ipv4_id);
+		st->ipv4_id++;
+	} else {
+		struct ipv6hdr *tsoh_iph =
+			(struct ipv6hdr *)(header + SKB_IPV6_OFF(skb));
+
+		tsoh_iph->payload_len = htons(ip_length - sizeof(*tsoh_iph));
+	}
 
 	st->packet_space = skb_shinfo(skb)->gso_size;
 	++tx_queue->tso_packets;
@@ -1041,8 +1053,8 @@
 	int frag_i, rc, rc2 = NETDEV_TX_OK;
 	struct tso_state state;
 
-	/* Verify TSO is safe - these checks should never fail. */
-	efx_tso_check_safe(skb);
+	/* Find the packet protocol and sanity-check it */
+	state.protocol = efx_tso_check_protocol(skb);
 
 	EFX_BUG_ON_PARANOID(tx_queue->write_count != tx_queue->insert_count);
 
@@ -1092,14 +1104,14 @@
 	}
 
 	/* Pass off to hardware */
-	falcon_push_buffers(tx_queue);
+	efx_nic_push_buffers(tx_queue);
 
 	tx_queue->tso_bursts++;
 	return NETDEV_TX_OK;
 
  mem_err:
 	EFX_ERR(efx, "Out of memory for TSO headers, or PCI mapping error\n");
-	dev_kfree_skb_any((struct sk_buff *)skb);
+	dev_kfree_skb_any(skb);
 	goto unwind;
 
  stop:
@@ -1135,7 +1147,7 @@
 	unsigned i;
 
 	if (tx_queue->buffer) {
-		for (i = 0; i <= tx_queue->efx->type->txd_ring_mask; ++i)
+		for (i = 0; i <= EFX_TXQ_MASK; ++i)
 			efx_tsoh_free(tx_queue, &tx_queue->buffer[i]);
 	}
 
--- linux-mvl-dove-2.6.32.orig/drivers/net/sfc/nic.h
+++ linux-mvl-dove-2.6.32/drivers/net/sfc/nic.h
@@ -0,0 +1,261 @@
+/****************************************************************************
+ * Driver for Solarflare Solarstorm network controllers and boards
+ * Copyright 2005-2006 Fen Systems Ltd.
+ * Copyright 2006-2009 Solarflare Communications Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation, incorporated herein by reference.
+ */
+
+#ifndef EFX_NIC_H
+#define EFX_NIC_H
+
+#include <linux/i2c-algo-bit.h>
+#include "net_driver.h"
+#include "efx.h"
+#include "mcdi.h"
+
+/*
+ * Falcon hardware control
+ */
+
+enum {
+	EFX_REV_FALCON_A0 = 0,
+	EFX_REV_FALCON_A1 = 1,
+	EFX_REV_FALCON_B0 = 2,
+	EFX_REV_SIENA_A0 = 3,
+};
+
+static inline int efx_nic_rev(struct efx_nic *efx)
+{
+	return efx->type->revision;
+}
+
+extern u32 efx_nic_fpga_ver(struct efx_nic *efx);
+
+static inline bool efx_nic_has_mc(struct efx_nic *efx)
+{
+	return efx_nic_rev(efx) >= EFX_REV_SIENA_A0;
+}
+/* NIC has two interlinked PCI functions for the same port. */
+static inline bool efx_nic_is_dual_func(struct efx_nic *efx)
+{
+	return efx_nic_rev(efx) < EFX_REV_FALCON_B0;
+}
+
+enum {
+	PHY_TYPE_NONE = 0,
+	PHY_TYPE_TXC43128 = 1,
+	PHY_TYPE_88E1111 = 2,
+	PHY_TYPE_SFX7101 = 3,
+	PHY_TYPE_QT2022C2 = 4,
+	PHY_TYPE_PM8358 = 6,
+	PHY_TYPE_SFT9001A = 8,
+	PHY_TYPE_QT2025C = 9,
+	PHY_TYPE_SFT9001B = 10,
+};
+
+#define FALCON_XMAC_LOOPBACKS			\
+	((1 << LOOPBACK_XGMII) |		\
+	 (1 << LOOPBACK_XGXS) |			\
+	 (1 << LOOPBACK_XAUI))
+
+#define FALCON_GMAC_LOOPBACKS			\
+	(1 << LOOPBACK_GMAC)
+
+/**
+ * struct falcon_board_type - board operations and type information
+ * @id: Board type id, as found in NVRAM
+ * @ref_model: Model number of Solarflare reference design
+ * @gen_type: Generic board type description
+ * @init: Allocate resources and initialise peripheral hardware
+ * @init_phy: Do board-specific PHY initialisation
+ * @fini: Shut down hardware and free resources
+ * @set_id_led: Set state of identifying LED or revert to automatic function
+ * @monitor: Board-specific health check function
+ */
+struct falcon_board_type {
+	u8 id;
+	const char *ref_model;
+	const char *gen_type;
+	int (*init) (struct efx_nic *nic);
+	void (*init_phy) (struct efx_nic *efx);
+	void (*fini) (struct efx_nic *nic);
+	void (*set_id_led) (struct efx_nic *efx, enum efx_led_mode mode);
+	int (*monitor) (struct efx_nic *nic);
+};
+
+/**
+ * struct falcon_board - board information
+ * @type: Type of board
+ * @major: Major rev. ('A', 'B' ...)
+ * @minor: Minor rev. (0, 1, ...)
+ * @i2c_adap: I2C adapter for on-board peripherals
+ * @i2c_data: Data for bit-banging algorithm
+ * @hwmon_client: I2C client for hardware monitor
+ * @ioexp_client: I2C client for power/port control
+ */
+struct falcon_board {
+	const struct falcon_board_type *type;
+	int major;
+	int minor;
+	struct i2c_adapter i2c_adap;
+	struct i2c_algo_bit_data i2c_data;
+	struct i2c_client *hwmon_client, *ioexp_client;
+};
+
+/**
+ * struct falcon_nic_data - Falcon NIC state
+ * @pci_dev2: Secondary function of Falcon A
+ * @board: Board state and functions
+ * @stats_disable_count: Nest count for disabling statistics fetches
+ * @stats_pending: Is there a pending DMA of MAC statistics.
+ * @stats_timer: A timer for regularly fetching MAC statistics.
+ * @stats_dma_done: Pointer to the flag which indicates DMA completion.
+ */
+struct falcon_nic_data {
+	struct pci_dev *pci_dev2;
+	struct falcon_board board;
+	unsigned int stats_disable_count;
+	bool stats_pending;
+	struct timer_list stats_timer;
+	u32 *stats_dma_done;
+};
+
+static inline struct falcon_board *falcon_board(struct efx_nic *efx)
+{
+	struct falcon_nic_data *data = efx->nic_data;
+	return &data->board;
+}
+
+/**
+ * struct siena_nic_data - Siena NIC state
+ * @fw_version: Management controller firmware version
+ * @fw_build: Firmware build number
+ * @mcdi: Management-Controller-to-Driver Interface
+ * @wol_filter_id: Wake-on-LAN packet filter id
+ */
+struct siena_nic_data {
+	u64 fw_version;
+	u32 fw_build;
+	struct efx_mcdi_iface mcdi;
+	int wol_filter_id;
+};
+
+extern void siena_print_fwver(struct efx_nic *efx, char *buf, size_t len);
+
+extern struct efx_nic_type falcon_a1_nic_type;
+extern struct efx_nic_type falcon_b0_nic_type;
+extern struct efx_nic_type siena_a0_nic_type;
+
+/**************************************************************************
+ *
+ * Externs
+ *
+ **************************************************************************
+ */
+
+extern int falcon_probe_board(struct efx_nic *efx, u16 revision_info);
+
+/* TX data path */
+extern int efx_nic_probe_tx(struct efx_tx_queue *tx_queue);
+extern void efx_nic_init_tx(struct efx_tx_queue *tx_queue);
+extern void efx_nic_fini_tx(struct efx_tx_queue *tx_queue);
+extern void efx_nic_remove_tx(struct efx_tx_queue *tx_queue);
+extern void efx_nic_push_buffers(struct efx_tx_queue *tx_queue);
+
+/* RX data path */
+extern int efx_nic_probe_rx(struct efx_rx_queue *rx_queue);
+extern void efx_nic_init_rx(struct efx_rx_queue *rx_queue);
+extern void efx_nic_fini_rx(struct efx_rx_queue *rx_queue);
+extern void efx_nic_remove_rx(struct efx_rx_queue *rx_queue);
+extern void efx_nic_notify_rx_desc(struct efx_rx_queue *rx_queue);
+
+/* Event data path */
+extern int efx_nic_probe_eventq(struct efx_channel *channel);
+extern void efx_nic_init_eventq(struct efx_channel *channel);
+extern void efx_nic_fini_eventq(struct efx_channel *channel);
+extern void efx_nic_remove_eventq(struct efx_channel *channel);
+extern int efx_nic_process_eventq(struct efx_channel *channel, int rx_quota);
+extern void efx_nic_eventq_read_ack(struct efx_channel *channel);
+
+/* MAC/PHY */
+extern void falcon_drain_tx_fifo(struct efx_nic *efx);
+extern void falcon_reconfigure_mac_wrapper(struct efx_nic *efx);
+extern int efx_nic_rx_xoff_thresh, efx_nic_rx_xon_thresh;
+
+/* Interrupts and test events */
+extern int efx_nic_init_interrupt(struct efx_nic *efx);
+extern void efx_nic_enable_interrupts(struct efx_nic *efx);
+extern void efx_nic_generate_test_event(struct efx_channel *channel,
+					unsigned int magic);
+extern void efx_nic_generate_interrupt(struct efx_nic *efx);
+extern void efx_nic_disable_interrupts(struct efx_nic *efx);
+extern void efx_nic_fini_interrupt(struct efx_nic *efx);
+extern irqreturn_t efx_nic_fatal_interrupt(struct efx_nic *efx);
+extern irqreturn_t falcon_legacy_interrupt_a1(int irq, void *dev_id);
+extern void falcon_irq_ack_a1(struct efx_nic *efx);
+
+#define EFX_IRQ_MOD_RESOLUTION 5
+
+/* Global Resources */
+extern int efx_nic_flush_queues(struct efx_nic *efx);
+extern void falcon_start_nic_stats(struct efx_nic *efx);
+extern void falcon_stop_nic_stats(struct efx_nic *efx);
+extern int falcon_reset_xaui(struct efx_nic *efx);
+extern void efx_nic_init_common(struct efx_nic *efx);
+
+int efx_nic_alloc_buffer(struct efx_nic *efx, struct efx_buffer *buffer,
+			 unsigned int len);
+void efx_nic_free_buffer(struct efx_nic *efx, struct efx_buffer *buffer);
+
+/* Tests */
+struct efx_nic_register_test {
+	unsigned address;
+	efx_oword_t mask;
+};
+extern int efx_nic_test_registers(struct efx_nic *efx,
+				  const struct efx_nic_register_test *regs,
+				  size_t n_regs);
+
+/**************************************************************************
+ *
+ * Falcon MAC stats
+ *
+ **************************************************************************
+ */
+
+#define FALCON_STAT_OFFSET(falcon_stat) EFX_VAL(falcon_stat, offset)
+#define FALCON_STAT_WIDTH(falcon_stat) EFX_VAL(falcon_stat, WIDTH)
+
+/* Retrieve statistic from statistics block */
+#define FALCON_STAT(efx, falcon_stat, efx_stat) do {		\
+	if (FALCON_STAT_WIDTH(falcon_stat) == 16)		\
+		(efx)->mac_stats.efx_stat += le16_to_cpu(	\
+			*((__force __le16 *)				\
+			  (efx->stats_buffer.addr +		\
+			   FALCON_STAT_OFFSET(falcon_stat))));	\
+	else if (FALCON_STAT_WIDTH(falcon_stat) == 32)		\
+		(efx)->mac_stats.efx_stat += le32_to_cpu(	\
+			*((__force __le32 *)				\
+			  (efx->stats_buffer.addr +		\
+			   FALCON_STAT_OFFSET(falcon_stat))));	\
+	else							\
+		(efx)->mac_stats.efx_stat += le64_to_cpu(	\
+			*((__force __le64 *)				\
+			  (efx->stats_buffer.addr +		\
+			   FALCON_STAT_OFFSET(falcon_stat))));	\
+	} while (0)
+
+#define FALCON_MAC_STATS_SIZE 0x100
+
+#define MAC_DATA_LBN 0
+#define MAC_DATA_WIDTH 32
+
+extern void efx_nic_generate_event(struct efx_channel *channel,
+				   efx_qword_t *event);
+
+extern void falcon_poll_xmac(struct efx_nic *efx);
+
+#endif /* EFX_NIC_H */
--- linux-mvl-dove-2.6.32.orig/drivers/net/sfc/qt202x_phy.c
+++ linux-mvl-dove-2.6.32/drivers/net/sfc/qt202x_phy.c
@@ -0,0 +1,448 @@
+/****************************************************************************
+ * Driver for Solarflare Solarstorm network controllers and boards
+ * Copyright 2006-2009 Solarflare Communications Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation, incorporated herein by reference.
+ */
+/*
+ * Driver for AMCC QT202x SFP+ and XFP adapters; see www.amcc.com for details
+ */
+
+#include <linux/timer.h>
+#include <linux/delay.h>
+#include "efx.h"
+#include "mdio_10g.h"
+#include "phy.h"
+#include "nic.h"
+
+#define QT202X_REQUIRED_DEVS (MDIO_DEVS_PCS |		\
+			      MDIO_DEVS_PMAPMD |	\
+			      MDIO_DEVS_PHYXS)
+
+#define QT202X_LOOPBACKS ((1 << LOOPBACK_PCS) |		\
+			  (1 << LOOPBACK_PMAPMD) |	\
+			  (1 << LOOPBACK_PHYXS_WS))
+
+/****************************************************************************/
+/* Quake-specific MDIO registers */
+#define MDIO_QUAKE_LED0_REG	(0xD006)
+
+/* QT2025C only */
+#define PCS_FW_HEARTBEAT_REG	0xd7ee
+#define PCS_FW_HEARTB_LBN	0
+#define PCS_FW_HEARTB_WIDTH	8
+#define PCS_FW_PRODUCT_CODE_1	0xd7f0
+#define PCS_FW_VERSION_1	0xd7f3
+#define PCS_FW_BUILD_1		0xd7f6
+#define PCS_UC8051_STATUS_REG	0xd7fd
+#define PCS_UC_STATUS_LBN	0
+#define PCS_UC_STATUS_WIDTH	8
+#define PCS_UC_STATUS_FW_SAVE	0x20
+#define PMA_PMD_FTX_CTRL2_REG	0xc309
+#define PMA_PMD_FTX_STATIC_LBN	13
+#define PMA_PMD_VEND1_REG	0xc001
+#define PMA_PMD_VEND1_LBTXD_LBN	15
+#define PCS_VEND1_REG	   	0xc000
+#define PCS_VEND1_LBTXD_LBN	5
+
+void falcon_qt202x_set_led(struct efx_nic *p, int led, int mode)
+{
+	int addr = MDIO_QUAKE_LED0_REG + led;
+	efx_mdio_write(p, MDIO_MMD_PMAPMD, addr, mode);
+}
+
+struct qt202x_phy_data {
+	enum efx_phy_mode phy_mode;
+	bool bug17190_in_bad_state;
+	unsigned long bug17190_timer;
+	u32 firmware_ver;
+};
+
+#define QT2022C2_MAX_RESET_TIME 500
+#define QT2022C2_RESET_WAIT 10
+
+#define QT2025C_MAX_HEARTB_TIME (5 * HZ)
+#define QT2025C_HEARTB_WAIT 100
+#define QT2025C_MAX_FWSTART_TIME (25 * HZ / 10)
+#define QT2025C_FWSTART_WAIT 100
+
+#define BUG17190_INTERVAL (2 * HZ)
+
+static int qt2025c_wait_heartbeat(struct efx_nic *efx)
+{
+	unsigned long timeout = jiffies + QT2025C_MAX_HEARTB_TIME;
+	int reg, old_counter = 0;
+
+	/* Wait for firmware heartbeat to start */
+	for (;;) {
+		int counter;
+		reg = efx_mdio_read(efx, MDIO_MMD_PCS, PCS_FW_HEARTBEAT_REG);
+		if (reg < 0)
+			return reg;
+		counter = ((reg >> PCS_FW_HEARTB_LBN) &
+			    ((1 << PCS_FW_HEARTB_WIDTH) - 1));
+		if (old_counter == 0)
+			old_counter = counter;
+		else if (counter != old_counter)
+			break;
+		if (time_after(jiffies, timeout)) {
+			/* Some cables have EEPROMs that conflict with the
+			 * PHY's on-board EEPROM so it cannot load firmware */
+			EFX_ERR(efx, "If an SFP+ direct attach cable is"
+				" connected, please check that it complies"
+				" with the SFP+ specification\n");
+			return -ETIMEDOUT;
+		}
+		msleep(QT2025C_HEARTB_WAIT);
+	}
+
+	return 0;
+}
+
+static int qt2025c_wait_fw_status_good(struct efx_nic *efx)
+{
+	unsigned long timeout = jiffies + QT2025C_MAX_FWSTART_TIME;
+	int reg;
+
+	/* Wait for firmware status to look good */
+	for (;;) {
+		reg = efx_mdio_read(efx, MDIO_MMD_PCS, PCS_UC8051_STATUS_REG);
+		if (reg < 0)
+			return reg;
+		if ((reg &
+		     ((1 << PCS_UC_STATUS_WIDTH) - 1) << PCS_UC_STATUS_LBN) >=
+		    PCS_UC_STATUS_FW_SAVE)
+			break;
+		if (time_after(jiffies, timeout))
+			return -ETIMEDOUT;
+		msleep(QT2025C_FWSTART_WAIT);
+	}
+
+	return 0;
+}
+
+static void qt2025c_restart_firmware(struct efx_nic *efx)
+{
+	/* Restart microcontroller execution of firmware from RAM */
+	efx_mdio_write(efx, 3, 0xe854, 0x00c0);
+	efx_mdio_write(efx, 3, 0xe854, 0x0040);
+	msleep(50);
+}
+
+static int qt2025c_wait_reset(struct efx_nic *efx)
+{
+	int rc;
+
+	rc = qt2025c_wait_heartbeat(efx);
+	if (rc != 0)
+		return rc;
+
+	rc = qt2025c_wait_fw_status_good(efx);
+	if (rc == -ETIMEDOUT) {
+		/* Bug 17689: occasionally heartbeat starts but firmware status
+		 * code never progresses beyond 0x00.  Try again, once, after
+		 * restarting execution of the firmware image. */
+		EFX_LOG(efx, "bashing QT2025C microcontroller\n");
+		qt2025c_restart_firmware(efx);
+		rc = qt2025c_wait_heartbeat(efx);
+		if (rc != 0)
+			return rc;
+		rc = qt2025c_wait_fw_status_good(efx);
+	}
+
+	return rc;
+}
+
+static void qt2025c_firmware_id(struct efx_nic *efx)
+{
+	struct qt202x_phy_data *phy_data = efx->phy_data;
+	u8 firmware_id[9];
+	size_t i;
+
+	for (i = 0; i < sizeof(firmware_id); i++)
+		firmware_id[i] = efx_mdio_read(efx, MDIO_MMD_PCS,
+					       PCS_FW_PRODUCT_CODE_1 + i);
+	EFX_INFO(efx, "QT2025C firmware %xr%d v%d.%d.%d.%d [20%02d-%02d-%02d]\n",
+		 (firmware_id[0] << 8) | firmware_id[1], firmware_id[2],
+		 firmware_id[3] >> 4, firmware_id[3] & 0xf,
+		 firmware_id[4], firmware_id[5],
+		 firmware_id[6], firmware_id[7], firmware_id[8]);
+	phy_data->firmware_ver = ((firmware_id[3] & 0xf0) << 20) |
+				 ((firmware_id[3] & 0x0f) << 16) |
+				 (firmware_id[4] << 8) | firmware_id[5];
+}
+
+static void qt2025c_bug17190_workaround(struct efx_nic *efx)
+{
+	struct qt202x_phy_data *phy_data = efx->phy_data;
+
+	/* The PHY can get stuck in a state where it reports PHY_XS and PMA/PMD
+	 * layers up, but PCS down (no block_lock).  If we notice this state
+	 * persisting for a couple of seconds, we switch PMA/PMD loopback
+	 * briefly on and then off again, which is normally sufficient to
+	 * recover it.
+	 */
+	if (efx->link_state.up ||
+	    !efx_mdio_links_ok(efx, MDIO_DEVS_PMAPMD | MDIO_DEVS_PHYXS)) {
+		phy_data->bug17190_in_bad_state = false;
+		return;
+	}
+
+	if (!phy_data->bug17190_in_bad_state) {
+		phy_data->bug17190_in_bad_state = true;
+		phy_data->bug17190_timer = jiffies + BUG17190_INTERVAL;
+		return;
+	}
+
+	if (time_after_eq(jiffies, phy_data->bug17190_timer)) {
+		EFX_LOG(efx, "bashing QT2025C PMA/PMD\n");
+		efx_mdio_set_flag(efx, MDIO_MMD_PMAPMD, MDIO_CTRL1,
+				  MDIO_PMA_CTRL1_LOOPBACK, true);
+		msleep(100);
+		efx_mdio_set_flag(efx, MDIO_MMD_PMAPMD, MDIO_CTRL1,
+				  MDIO_PMA_CTRL1_LOOPBACK, false);
+		phy_data->bug17190_timer = jiffies + BUG17190_INTERVAL;
+	}
+}
+
+static int qt2025c_select_phy_mode(struct efx_nic *efx)
+{
+	struct qt202x_phy_data *phy_data = efx->phy_data;
+	struct falcon_board *board = falcon_board(efx);
+	int reg, rc, i;
+	uint16_t phy_op_mode;
+
+	/* Only 2.0.1.0+ PHY firmware supports the more optimal SFP+
+	 * Self-Configure mode.  Don't attempt any switching if we encounter
+	 * older firmware. */
+	if (phy_data->firmware_ver < 0x02000100)
+		return 0;
+
+	/* In general we will get optimal behaviour in "SFP+ Self-Configure"
+	 * mode; however, that powers down most of the PHY when no module is
+	 * present, so we must use a different mode (any fixed mode will do)
+	 * to be sure that loopbacks will work. */
+	phy_op_mode = (efx->loopback_mode == LOOPBACK_NONE) ? 0x0038 : 0x0020;
+
+	/* Only change mode if really necessary */
+	reg = efx_mdio_read(efx, 1, 0xc319);
+	if ((reg & 0x0038) == phy_op_mode)
+		return 0;
+	EFX_LOG(efx, "Switching PHY to mode 0x%04x\n", phy_op_mode);
+
+	/* This sequence replicates the register writes configured in the boot
+	 * EEPROM (including the differences between board revisions), except
+	 * that the operating mode is changed, and the PHY is prevented from
+	 * unnecessarily reloading the main firmware image again. */
+	efx_mdio_write(efx, 1, 0xc300, 0x0000);
+	/* (Note: this portion of the boot EEPROM sequence, which bit-bashes 9
+	 * STOPs onto the firmware/module I2C bus to reset it, varies across
+	 * board revisions, as the bus is connected to different GPIO/LED
+	 * outputs on the PHY.) */
+	if (board->major == 0 && board->minor < 2) {
+		efx_mdio_write(efx, 1, 0xc303, 0x4498);
+		for (i = 0; i < 9; i++) {
+			efx_mdio_write(efx, 1, 0xc303, 0x4488);
+			efx_mdio_write(efx, 1, 0xc303, 0x4480);
+			efx_mdio_write(efx, 1, 0xc303, 0x4490);
+			efx_mdio_write(efx, 1, 0xc303, 0x4498);
+		}
+	} else {
+		efx_mdio_write(efx, 1, 0xc303, 0x0920);
+		efx_mdio_write(efx, 1, 0xd008, 0x0004);
+		for (i = 0; i < 9; i++) {
+			efx_mdio_write(efx, 1, 0xc303, 0x0900);
+			efx_mdio_write(efx, 1, 0xd008, 0x0005);
+			efx_mdio_write(efx, 1, 0xc303, 0x0920);
+			efx_mdio_write(efx, 1, 0xd008, 0x0004);
+		}
+		efx_mdio_write(efx, 1, 0xc303, 0x4900);
+	}
+	efx_mdio_write(efx, 1, 0xc303, 0x4900);
+	efx_mdio_write(efx, 1, 0xc302, 0x0004);
+	efx_mdio_write(efx, 1, 0xc316, 0x0013);
+	efx_mdio_write(efx, 1, 0xc318, 0x0054);
+	efx_mdio_write(efx, 1, 0xc319, phy_op_mode);
+	efx_mdio_write(efx, 1, 0xc31a, 0x0098);
+	efx_mdio_write(efx, 3, 0x0026, 0x0e00);
+	efx_mdio_write(efx, 3, 0x0027, 0x0013);
+	efx_mdio_write(efx, 3, 0x0028, 0xa528);
+	efx_mdio_write(efx, 1, 0xd006, 0x000a);
+	efx_mdio_write(efx, 1, 0xd007, 0x0009);
+	efx_mdio_write(efx, 1, 0xd008, 0x0004);
+	/* This additional write is not present in the boot EEPROM.  It
+	 * prevents the PHY's internal boot ROM doing another pointless (and
+	 * slow) reload of the firmware image (the microcontroller's code
+	 * memory is not affected by the microcontroller reset). */
+	efx_mdio_write(efx, 1, 0xc317, 0x00ff);
+	efx_mdio_write(efx, 1, 0xc300, 0x0002);
+	msleep(20);
+
+	/* Restart microcontroller execution of firmware from RAM */
+	qt2025c_restart_firmware(efx);
+
+	/* Wait for the microcontroller to be ready again */
+	rc = qt2025c_wait_reset(efx);
+	if (rc < 0) {
+		EFX_ERR(efx, "PHY microcontroller reset during mode switch "
+				"timed out\n");
+		return rc;
+	}
+
+	return 0;
+}
+
+static int qt202x_reset_phy(struct efx_nic *efx)
+{
+	int rc;
+
+	if (efx->phy_type == PHY_TYPE_QT2025C) {
+		/* Wait for the reset triggered by falcon_reset_hw()
+		 * to complete */
+		rc = qt2025c_wait_reset(efx);
+		if (rc < 0)
+			goto fail;
+	} else {
+		/* Reset the PHYXS MMD. This is documented as doing
+		 * a complete soft reset. */
+		rc = efx_mdio_reset_mmd(efx, MDIO_MMD_PHYXS,
+					QT2022C2_MAX_RESET_TIME /
+					QT2022C2_RESET_WAIT,
+					QT2022C2_RESET_WAIT);
+		if (rc < 0)
+			goto fail;
+	}
+
+	/* Wait 250ms for the PHY to complete bootup */
+	msleep(250);
+
+	falcon_board(efx)->type->init_phy(efx);
+
+	return 0;
+
+ fail:
+	EFX_ERR(efx, "PHY reset timed out\n");
+	return rc;
+}
+
+static int qt202x_phy_probe(struct efx_nic *efx)
+{
+	struct qt202x_phy_data *phy_data;
+
+	phy_data = kzalloc(sizeof(struct qt202x_phy_data), GFP_KERNEL);
+	if (!phy_data)
+		return -ENOMEM;
+	efx->phy_data = phy_data;
+	phy_data->phy_mode = efx->phy_mode;
+	phy_data->bug17190_in_bad_state = false;
+	phy_data->bug17190_timer = 0;
+
+	efx->mdio.mmds = QT202X_REQUIRED_DEVS;
+	efx->mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
+	efx->loopback_modes = QT202X_LOOPBACKS | FALCON_XMAC_LOOPBACKS;
+	return 0;
+}
+
+static int qt202x_phy_init(struct efx_nic *efx)
+{
+	u32 devid;
+	int rc;
+
+	rc = qt202x_reset_phy(efx);
+	if (rc) {
+		EFX_ERR(efx, "PHY init failed\n");
+		return rc;
+	}
+
+	devid = efx_mdio_read_id(efx, MDIO_MMD_PHYXS);
+	EFX_INFO(efx, "PHY ID reg %x (OUI %06x model %02x revision %x)\n",
+		 devid, efx_mdio_id_oui(devid), efx_mdio_id_model(devid),
+		 efx_mdio_id_rev(devid));
+
+	if (efx->phy_type == PHY_TYPE_QT2025C)
+		qt2025c_firmware_id(efx);
+
+	return 0;
+}
+
+static int qt202x_link_ok(struct efx_nic *efx)
+{
+	return efx_mdio_links_ok(efx, QT202X_REQUIRED_DEVS);
+}
+
+static bool qt202x_phy_poll(struct efx_nic *efx)
+{
+	bool was_up = efx->link_state.up;
+
+	efx->link_state.up = qt202x_link_ok(efx);
+	efx->link_state.speed = 10000;
+	efx->link_state.fd = true;
+	efx->link_state.fc = efx->wanted_fc;
+
+	if (efx->phy_type == PHY_TYPE_QT2025C)
+		qt2025c_bug17190_workaround(efx);
+
+	return efx->link_state.up != was_up;
+}
+
+static int qt202x_phy_reconfigure(struct efx_nic *efx)
+{
+	struct qt202x_phy_data *phy_data = efx->phy_data;
+
+	if (efx->phy_type == PHY_TYPE_QT2025C) {
+		int rc = qt2025c_select_phy_mode(efx);
+		if (rc)
+			return rc;
+
+		/* There are several different register bits which can
+		 * disable TX (and save power) on direct-attach cables
+		 * or optical transceivers, varying somewhat between
+		 * firmware versions.  Only 'static mode' appears to
+		 * cover everything. */
+		mdio_set_flag(
+			&efx->mdio, efx->mdio.prtad, MDIO_MMD_PMAPMD,
+			PMA_PMD_FTX_CTRL2_REG, 1 << PMA_PMD_FTX_STATIC_LBN,
+			efx->phy_mode & PHY_MODE_TX_DISABLED ||
+			efx->phy_mode & PHY_MODE_LOW_POWER ||
+			efx->loopback_mode == LOOPBACK_PCS ||
+			efx->loopback_mode == LOOPBACK_PMAPMD);
+	} else {
+		/* Reset the PHY when moving from tx off to tx on */
+		if (!(efx->phy_mode & PHY_MODE_TX_DISABLED) &&
+		    (phy_data->phy_mode & PHY_MODE_TX_DISABLED))
+			qt202x_reset_phy(efx);
+
+		efx_mdio_transmit_disable(efx);
+	}
+
+	efx_mdio_phy_reconfigure(efx);
+
+	phy_data->phy_mode = efx->phy_mode;
+
+	return 0;
+}
+
+static void qt202x_phy_get_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd)
+{
+	mdio45_ethtool_gset(&efx->mdio, ecmd);
+}
+
+static void qt202x_phy_remove(struct efx_nic *efx)
+{
+	/* Free the context block */
+	kfree(efx->phy_data);
+	efx->phy_data = NULL;
+}
+
+struct efx_phy_operations falcon_qt202x_phy_ops = {
+	.probe		 = qt202x_phy_probe,
+	.init		 = qt202x_phy_init,
+	.reconfigure	 = qt202x_phy_reconfigure,
+	.poll	     	 = qt202x_phy_poll,
+	.fini		 = efx_port_dummy_op_void,
+	.remove	  	 = qt202x_phy_remove,
+	.get_settings	 = qt202x_phy_get_settings,
+	.set_settings	 = efx_mdio_set_settings,
+};
--- linux-mvl-dove-2.6.32.orig/drivers/net/sfc/efx.c
+++ linux-mvl-dove-2.6.32/drivers/net/sfc/efx.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * Driver for Solarflare Solarstorm network controllers and boards
  * Copyright 2005-2006 Fen Systems Ltd.
- * Copyright 2005-2008 Solarflare Communications Inc.
+ * Copyright 2005-2009 Solarflare Communications Inc.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of the GNU General Public License version 2 as published
@@ -21,12 +21,73 @@
 #include <linux/ethtool.h>
 #include <linux/topology.h>
 #include "net_driver.h"
-#include "ethtool.h"
-#include "tx.h"
-#include "rx.h"
 #include "efx.h"
 #include "mdio_10g.h"
-#include "falcon.h"
+#include "nic.h"
+
+#include "mcdi.h"
+
+/**************************************************************************
+ *
+ * Type name strings
+ *
+ **************************************************************************
+ */
+
+/* Loopback mode names (see LOOPBACK_MODE()) */
+const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
+const char *efx_loopback_mode_names[] = {
+	[LOOPBACK_NONE]		= "NONE",
+	[LOOPBACK_DATA]		= "DATAPATH",
+	[LOOPBACK_GMAC]		= "GMAC",
+	[LOOPBACK_XGMII]	= "XGMII",
+	[LOOPBACK_XGXS]		= "XGXS",
+	[LOOPBACK_XAUI]  	= "XAUI",
+	[LOOPBACK_GMII] 	= "GMII",
+	[LOOPBACK_SGMII] 	= "SGMII",
+	[LOOPBACK_XGBR]		= "XGBR",
+	[LOOPBACK_XFI]		= "XFI",
+	[LOOPBACK_XAUI_FAR]	= "XAUI_FAR",
+	[LOOPBACK_GMII_FAR]	= "GMII_FAR",
+	[LOOPBACK_SGMII_FAR]	= "SGMII_FAR",
+	[LOOPBACK_XFI_FAR]	= "XFI_FAR",
+	[LOOPBACK_GPHY]		= "GPHY",
+	[LOOPBACK_PHYXS]	= "PHYXS",
+	[LOOPBACK_PCS]	 	= "PCS",
+	[LOOPBACK_PMAPMD] 	= "PMA/PMD",
+	[LOOPBACK_XPORT]	= "XPORT",
+	[LOOPBACK_XGMII_WS]	= "XGMII_WS",
+	[LOOPBACK_XAUI_WS]  	= "XAUI_WS",
+	[LOOPBACK_XAUI_WS_FAR]  = "XAUI_WS_FAR",
+	[LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
+	[LOOPBACK_GMII_WS] 	= "GMII_WS",
+	[LOOPBACK_XFI_WS]	= "XFI_WS",
+	[LOOPBACK_XFI_WS_FAR]	= "XFI_WS_FAR",
+	[LOOPBACK_PHYXS_WS]  	= "PHYXS_WS",
+};
+
+/* Interrupt mode names (see INT_MODE())) */
+const unsigned int efx_interrupt_mode_max = EFX_INT_MODE_MAX;
+const char *efx_interrupt_mode_names[] = {
+	[EFX_INT_MODE_MSIX]   = "MSI-X",
+	[EFX_INT_MODE_MSI]    = "MSI",
+	[EFX_INT_MODE_LEGACY] = "legacy",
+};
+
+const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
+const char *efx_reset_type_names[] = {
+	[RESET_TYPE_INVISIBLE]     = "INVISIBLE",
+	[RESET_TYPE_ALL]           = "ALL",
+	[RESET_TYPE_WORLD]         = "WORLD",
+	[RESET_TYPE_DISABLE]       = "DISABLE",
+	[RESET_TYPE_TX_WATCHDOG]   = "TX_WATCHDOG",
+	[RESET_TYPE_INT_ERROR]     = "INT_ERROR",
+	[RESET_TYPE_RX_RECOVERY]   = "RX_RECOVERY",
+	[RESET_TYPE_RX_DESC_FETCH] = "RX_DESC_FETCH",
+	[RESET_TYPE_TX_DESC_FETCH] = "TX_DESC_FETCH",
+	[RESET_TYPE_TX_SKIP]       = "TX_SKIP",
+	[RESET_TYPE_MC_FAILURE]    = "MC_FAILURE",
+};
 
 #define EFX_MAX_MTU (9 * 1024)
 
@@ -145,7 +206,8 @@
 
 #define EFX_ASSERT_RESET_SERIALISED(efx)		\
 	do {						\
-		if (efx->state == STATE_RUNNING)	\
+		if ((efx->state == STATE_RUNNING) ||	\
+		    (efx->state == STATE_DISABLED))	\
 			ASSERT_RTNL();			\
 	} while (0)
 
@@ -171,7 +233,7 @@
 		     !channel->enabled))
 		return 0;
 
-	rx_packets = falcon_process_eventq(channel, rx_quota);
+	rx_packets = efx_nic_process_eventq(channel, rx_quota);
 	if (rx_packets == 0)
 		return 0;
 
@@ -203,7 +265,7 @@
 	channel->work_pending = false;
 	smp_wmb();
 
-	falcon_eventq_read_ack(channel);
+	efx_nic_eventq_read_ack(channel);
 }
 
 /* NAPI poll handler
@@ -228,26 +290,20 @@
 		if (channel->used_flags & EFX_USED_BY_RX &&
 		    efx->irq_rx_adaptive &&
 		    unlikely(++channel->irq_count == 1000)) {
-			unsigned old_irq_moderation = channel->irq_moderation;
-
 			if (unlikely(channel->irq_mod_score <
 				     irq_adapt_low_thresh)) {
-				channel->irq_moderation =
-					max_t(int,
-					      channel->irq_moderation -
-					      FALCON_IRQ_MOD_RESOLUTION,
-					      FALCON_IRQ_MOD_RESOLUTION);
+				if (channel->irq_moderation > 1) {
+					channel->irq_moderation -= 1;
+					efx->type->push_irq_moderation(channel);
+				}
 			} else if (unlikely(channel->irq_mod_score >
 					    irq_adapt_high_thresh)) {
-				channel->irq_moderation =
-					min(channel->irq_moderation +
-					    FALCON_IRQ_MOD_RESOLUTION,
-					    efx->irq_rx_moderation);
+				if (channel->irq_moderation <
+				    efx->irq_rx_moderation) {
+					channel->irq_moderation += 1;
+					efx->type->push_irq_moderation(channel);
+				}
 			}
-
-			if (channel->irq_moderation != old_irq_moderation)
-				falcon_set_int_moderation(channel);
-
 			channel->irq_count = 0;
 			channel->irq_mod_score = 0;
 		}
@@ -280,7 +336,7 @@
 	BUG_ON(!channel->enabled);
 
 	/* Disable interrupts and wait for ISRs to complete */
-	falcon_disable_interrupts(efx);
+	efx_nic_disable_interrupts(efx);
 	if (efx->legacy_irq)
 		synchronize_irq(efx->legacy_irq);
 	if (channel->irq)
@@ -290,14 +346,14 @@
 	napi_disable(&channel->napi_str);
 
 	/* Poll the channel */
-	efx_process_channel(channel, efx->type->evq_size);
+	efx_process_channel(channel, EFX_EVQ_SIZE);
 
 	/* Ack the eventq. This may cause an interrupt to be generated
 	 * when they are reenabled */
 	efx_channel_processed(channel);
 
 	napi_enable(&channel->napi_str);
-	falcon_enable_interrupts(efx);
+	efx_nic_enable_interrupts(efx);
 }
 
 /* Create event queue
@@ -309,7 +365,7 @@
 {
 	EFX_LOG(channel->efx, "chan %d create event queue\n", channel->channel);
 
-	return falcon_probe_eventq(channel);
+	return efx_nic_probe_eventq(channel);
 }
 
 /* Prepare channel's event queue */
@@ -319,21 +375,21 @@
 
 	channel->eventq_read_ptr = 0;
 
-	falcon_init_eventq(channel);
+	efx_nic_init_eventq(channel);
 }
 
 static void efx_fini_eventq(struct efx_channel *channel)
 {
 	EFX_LOG(channel->efx, "chan %d fini event queue\n", channel->channel);
 
-	falcon_fini_eventq(channel);
+	efx_nic_fini_eventq(channel);
 }
 
 static void efx_remove_eventq(struct efx_channel *channel)
 {
 	EFX_LOG(channel->efx, "chan %d remove event queue\n", channel->channel);
 
-	falcon_remove_eventq(channel);
+	efx_nic_remove_eventq(channel);
 }
 
 /**************************************************************************
@@ -499,7 +555,7 @@
 	EFX_ASSERT_RESET_SERIALISED(efx);
 	BUG_ON(efx->port_enabled);
 
-	rc = falcon_flush_queues(efx);
+	rc = efx_nic_flush_queues(efx);
 	if (rc)
 		EFX_ERR(efx, "failed to flush queues\n");
 	else
@@ -547,8 +603,10 @@
  * netif_carrier_on/off) of the link status, and also maintains the
  * link status's stop on the port's TX queue.
  */
-static void efx_link_status_changed(struct efx_nic *efx)
+void efx_link_status_changed(struct efx_nic *efx)
 {
+	struct efx_link_state *link_state = &efx->link_state;
+
 	/* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
 	 * that no events are triggered between unregister_netdev() and the
 	 * driver unloading. A more general condition is that NETDEV_CHANGE
@@ -561,19 +619,19 @@
 		return;
 	}
 
-	if (efx->link_up != netif_carrier_ok(efx->net_dev)) {
+	if (link_state->up != netif_carrier_ok(efx->net_dev)) {
 		efx->n_link_state_changes++;
 
-		if (efx->link_up)
+		if (link_state->up)
 			netif_carrier_on(efx->net_dev);
 		else
 			netif_carrier_off(efx->net_dev);
 	}
 
 	/* Status message for kernel log */
-	if (efx->link_up) {
+	if (link_state->up) {
 		EFX_INFO(efx, "link up at %uMbps %s-duplex (MTU %d)%s\n",
-			 efx->link_speed, efx->link_fd ? "full" : "half",
+			 link_state->speed, link_state->fd ? "full" : "half",
 			 efx->net_dev->mtu,
 			 (efx->promiscuous ? " [PROMISC]" : ""));
 	} else {
@@ -582,16 +640,49 @@
 
 }
 
+void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
+{
+	efx->link_advertising = advertising;
+	if (advertising) {
+		if (advertising & ADVERTISED_Pause)
+			efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
+		else
+			efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
+		if (advertising & ADVERTISED_Asym_Pause)
+			efx->wanted_fc ^= EFX_FC_TX;
+	}
+}
+
+void efx_link_set_wanted_fc(struct efx_nic *efx, enum efx_fc_type wanted_fc)
+{
+	efx->wanted_fc = wanted_fc;
+	if (efx->link_advertising) {
+		if (wanted_fc & EFX_FC_RX)
+			efx->link_advertising |= (ADVERTISED_Pause |
+						  ADVERTISED_Asym_Pause);
+		else
+			efx->link_advertising &= ~(ADVERTISED_Pause |
+						   ADVERTISED_Asym_Pause);
+		if (wanted_fc & EFX_FC_TX)
+			efx->link_advertising ^= ADVERTISED_Asym_Pause;
+	}
+}
+
 static void efx_fini_port(struct efx_nic *efx);
 
-/* This call reinitialises the MAC to pick up new PHY settings. The
- * caller must hold the mac_lock */
-void __efx_reconfigure_port(struct efx_nic *efx)
+/* Push loopback/power/transmit disable settings to the PHY, and reconfigure
+ * the MAC appropriately. All other PHY configuration changes are pushed
+ * through phy_op->set_settings(), and pushed asynchronously to the MAC
+ * through efx_monitor().
+ *
+ * Callers must hold the mac_lock
+ */
+int __efx_reconfigure_port(struct efx_nic *efx)
 {
-	WARN_ON(!mutex_is_locked(&efx->mac_lock));
+	enum efx_phy_mode phy_mode;
+	int rc;
 
-	EFX_LOG(efx, "reconfiguring MAC from PHY settings on CPU %d\n",
-		raw_smp_processor_id());
+	WARN_ON(!mutex_is_locked(&efx->mac_lock));
 
 	/* Serialise the promiscuous flag with efx_set_multicast_list. */
 	if (efx_dev_registered(efx)) {
@@ -599,61 +690,48 @@
 		netif_addr_unlock_bh(efx->net_dev);
 	}
 
-	falcon_deconfigure_mac_wrapper(efx);
-
-	/* Reconfigure the PHY, disabling transmit in mac level loopback. */
+	/* Disable PHY transmit in mac level loopbacks */
+	phy_mode = efx->phy_mode;
 	if (LOOPBACK_INTERNAL(efx))
 		efx->phy_mode |= PHY_MODE_TX_DISABLED;
 	else
 		efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
-	efx->phy_op->reconfigure(efx);
-
-	if (falcon_switch_mac(efx))
-		goto fail;
 
-	efx->mac_op->reconfigure(efx);
+	rc = efx->type->reconfigure_port(efx);
 
-	/* Inform kernel of loss/gain of carrier */
-	efx_link_status_changed(efx);
-	return;
+	if (rc)
+		efx->phy_mode = phy_mode;
 
-fail:
-	EFX_ERR(efx, "failed to reconfigure MAC\n");
-	efx->port_enabled = false;
-	efx_fini_port(efx);
+	return rc;
 }
 
 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
  * disabled. */
-void efx_reconfigure_port(struct efx_nic *efx)
+int efx_reconfigure_port(struct efx_nic *efx)
 {
+	int rc;
+
 	EFX_ASSERT_RESET_SERIALISED(efx);
 
 	mutex_lock(&efx->mac_lock);
-	__efx_reconfigure_port(efx);
+	rc = __efx_reconfigure_port(efx);
 	mutex_unlock(&efx->mac_lock);
-}
-
-/* Asynchronous efx_reconfigure_port work item. To speed up efx_flush_all()
- * we don't efx_reconfigure_port() if the port is disabled. Care is taken
- * in efx_stop_all() and efx_start_port() to prevent PHY events being lost */
-static void efx_phy_work(struct work_struct *data)
-{
-	struct efx_nic *efx = container_of(data, struct efx_nic, phy_work);
 
-	mutex_lock(&efx->mac_lock);
-	if (efx->port_enabled)
-		__efx_reconfigure_port(efx);
-	mutex_unlock(&efx->mac_lock);
+	return rc;
 }
 
+/* Asynchronous work item for changing MAC promiscuity and multicast
+ * hash.  Avoid a drain/rx_ingress enable by reconfiguring the current
+ * MAC directly. */
 static void efx_mac_work(struct work_struct *data)
 {
 	struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
 
 	mutex_lock(&efx->mac_lock);
-	if (efx->port_enabled)
-		efx->mac_op->irq(efx);
+	if (efx->port_enabled) {
+		efx->type->push_multicast_hash(efx);
+		efx->mac_op->reconfigure(efx);
+	}
 	mutex_unlock(&efx->mac_lock);
 }
 
@@ -663,14 +741,14 @@
 
 	EFX_LOG(efx, "create port\n");
 
-	/* Connect up MAC/PHY operations table and read MAC address */
-	rc = falcon_probe_port(efx);
-	if (rc)
-		goto err;
-
 	if (phy_flash_cfg)
 		efx->phy_mode = PHY_MODE_SPECIAL;
 
+	/* Connect up MAC/PHY operations table */
+	rc = efx->type->probe_port(efx);
+	if (rc)
+		goto err;
+
 	/* Sanity check MAC address */
 	if (is_valid_ether_addr(efx->mac_address)) {
 		memcpy(efx->net_dev->dev_addr, efx->mac_address, ETH_ALEN);
@@ -699,29 +777,33 @@
 
 	EFX_LOG(efx, "init port\n");
 
-	rc = efx->phy_op->init(efx);
-	if (rc)
-		return rc;
 	mutex_lock(&efx->mac_lock);
-	efx->phy_op->reconfigure(efx);
-	rc = falcon_switch_mac(efx);
-	mutex_unlock(&efx->mac_lock);
+
+	rc = efx->phy_op->init(efx);
 	if (rc)
-		goto fail;
-	efx->mac_op->reconfigure(efx);
+		goto fail1;
 
 	efx->port_initialized = true;
-	efx_stats_enable(efx);
+
+	/* Reconfigure the MAC before creating dma queues (required for
+	 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
+	efx->mac_op->reconfigure(efx);
+
+	/* Ensure the PHY advertises the correct flow control settings */
+	rc = efx->phy_op->reconfigure(efx);
+	if (rc)
+		goto fail2;
+
+	mutex_unlock(&efx->mac_lock);
 	return 0;
 
-fail:
+fail2:
 	efx->phy_op->fini(efx);
+fail1:
+	mutex_unlock(&efx->mac_lock);
 	return rc;
 }
 
-/* Allow efx_reconfigure_port() to be scheduled, and close the window
- * between efx_stop_port and efx_flush_all whereby a previously scheduled
- * efx_phy_work()/efx_mac_work() may have been cancelled */
 static void efx_start_port(struct efx_nic *efx)
 {
 	EFX_LOG(efx, "start port\n");
@@ -729,15 +811,16 @@
 
 	mutex_lock(&efx->mac_lock);
 	efx->port_enabled = true;
-	__efx_reconfigure_port(efx);
-	efx->mac_op->irq(efx);
+
+	/* efx_mac_work() might have been scheduled after efx_stop_port(),
+	 * and then cancelled by efx_flush_all() */
+	efx->type->push_multicast_hash(efx);
+	efx->mac_op->reconfigure(efx);
+
 	mutex_unlock(&efx->mac_lock);
 }
 
-/* Prevent efx_phy_work, efx_mac_work, and efx_monitor() from executing,
- * and efx_set_multicast_list() from scheduling efx_phy_work. efx_phy_work
- * and efx_mac_work may still be scheduled via NAPI processing until
- * efx_flush_all() is called */
+/* Prevent efx_mac_work() and efx_monitor() from working */
 static void efx_stop_port(struct efx_nic *efx)
 {
 	EFX_LOG(efx, "stop port\n");
@@ -760,11 +843,10 @@
 	if (!efx->port_initialized)
 		return;
 
-	efx_stats_disable(efx);
 	efx->phy_op->fini(efx);
 	efx->port_initialized = false;
 
-	efx->link_up = false;
+	efx->link_state.up = false;
 	efx_link_status_changed(efx);
 }
 
@@ -772,7 +854,7 @@
 {
 	EFX_LOG(efx, "destroying port\n");
 
-	falcon_remove_port(efx);
+	efx->type->remove_port(efx);
 }
 
 /**************************************************************************
@@ -824,9 +906,8 @@
 		goto fail2;
 	}
 
-	efx->membase_phys = pci_resource_start(efx->pci_dev,
-					       efx->type->mem_bar);
-	rc = pci_request_region(pci_dev, efx->type->mem_bar, "sfc");
+	efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
+	rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
 	if (rc) {
 		EFX_ERR(efx, "request for memory BAR failed\n");
 		rc = -EIO;
@@ -835,21 +916,20 @@
 	efx->membase = ioremap_nocache(efx->membase_phys,
 				       efx->type->mem_map_size);
 	if (!efx->membase) {
-		EFX_ERR(efx, "could not map memory BAR %d at %llx+%x\n",
-			efx->type->mem_bar,
+		EFX_ERR(efx, "could not map memory BAR at %llx+%x\n",
 			(unsigned long long)efx->membase_phys,
 			efx->type->mem_map_size);
 		rc = -ENOMEM;
 		goto fail4;
 	}
-	EFX_LOG(efx, "memory BAR %u at %llx+%x (virtual %p)\n",
-		efx->type->mem_bar, (unsigned long long)efx->membase_phys,
+	EFX_LOG(efx, "memory BAR at %llx+%x (virtual %p)\n",
+		(unsigned long long)efx->membase_phys,
 		efx->type->mem_map_size, efx->membase);
 
 	return 0;
 
  fail4:
-	pci_release_region(efx->pci_dev, efx->type->mem_bar);
+	pci_release_region(efx->pci_dev, EFX_MEM_BAR);
  fail3:
 	efx->membase_phys = 0;
  fail2:
@@ -868,7 +948,7 @@
 	}
 
 	if (efx->membase_phys) {
-		pci_release_region(efx->pci_dev, efx->type->mem_bar);
+		pci_release_region(efx->pci_dev, EFX_MEM_BAR);
 		efx->membase_phys = 0;
 	}
 
@@ -1011,7 +1091,7 @@
 	EFX_LOG(efx, "creating NIC\n");
 
 	/* Carry out hardware-type specific initialisation */
-	rc = falcon_probe_nic(efx);
+	rc = efx->type->probe(efx);
 	if (rc)
 		return rc;
 
@@ -1032,7 +1112,7 @@
 	EFX_LOG(efx, "destroying NIC\n");
 
 	efx_remove_interrupts(efx);
-	falcon_remove_nic(efx);
+	efx->type->remove(efx);
 }
 
 /**************************************************************************
@@ -1112,12 +1192,31 @@
 	efx_for_each_channel(channel, efx)
 		efx_start_channel(channel);
 
-	falcon_enable_interrupts(efx);
+	efx_nic_enable_interrupts(efx);
 
-	/* Start hardware monitor if we're in RUNNING */
-	if (efx->state == STATE_RUNNING)
+	/* Switch to event based MCDI completions after enabling interrupts.
+	 * If a reset has been scheduled, then we need to stay in polled mode.
+	 * Rather than serialising efx_mcdi_mode_event() [which sleeps] and
+	 * reset_pending [modified from an atomic context], we instead guarantee
+	 * that efx_mcdi_mode_poll() isn't reverted erroneously */
+	efx_mcdi_mode_event(efx);
+	if (efx->reset_pending != RESET_TYPE_NONE)
+		efx_mcdi_mode_poll(efx);
+
+	/* Start the hardware monitor if there is one. Otherwise (we're link
+	 * event driven), we have to poll the PHY because after an event queue
+	 * flush, we could have a missed a link state change */
+	if (efx->type->monitor != NULL) {
 		queue_delayed_work(efx->workqueue, &efx->monitor_work,
 				   efx_monitor_interval);
+	} else {
+		mutex_lock(&efx->mac_lock);
+		if (efx->phy_op->poll(efx))
+			efx_link_status_changed(efx);
+		mutex_unlock(&efx->mac_lock);
+	}
+
+	efx->type->start_stats(efx);
 }
 
 /* Flush all delayed work. Should only be called when no more delayed work
@@ -1136,8 +1235,6 @@
 
 	/* Stop scheduled port reconfigurations */
 	cancel_work_sync(&efx->mac_work);
-	cancel_work_sync(&efx->phy_work);
-
 }
 
 /* Quiesce hardware and software without bringing the link down.
@@ -1155,8 +1252,13 @@
 	if (!efx->port_enabled)
 		return;
 
+	efx->type->stop_stats(efx);
+
+	/* Switch to MCDI polling on Siena before disabling interrupts */
+	efx_mcdi_mode_poll(efx);
+
 	/* Disable interrupts and wait for ISR to complete */
-	falcon_disable_interrupts(efx);
+	efx_nic_disable_interrupts(efx);
 	if (efx->legacy_irq)
 		synchronize_irq(efx->legacy_irq);
 	efx_for_each_channel(channel, efx) {
@@ -1173,15 +1275,9 @@
 	 * window to loose phy events */
 	efx_stop_port(efx);
 
-	/* Flush efx_phy_work, efx_mac_work, refill_workqueue, monitor_work */
+	/* Flush efx_mac_work(), refill_workqueue, monitor_work */
 	efx_flush_all(efx);
 
-	/* Isolate the MAC from the TX and RX engines, so that queue
-	 * flushes will complete in a timely fashion. */
-	falcon_deconfigure_mac_wrapper(efx);
-	msleep(10); /* Let the Rx FIFO drain */
-	falcon_drain_tx_fifo(efx);
-
 	/* Stop the kernel transmit interface late, so the watchdog
 	 * timer isn't ticking over the flush */
 	if (efx_dev_registered(efx)) {
@@ -1201,41 +1297,39 @@
 	efx_remove_nic(efx);
 }
 
-/* A convinience function to safely flush all the queues */
-void efx_flush_queues(struct efx_nic *efx)
-{
-	EFX_ASSERT_RESET_SERIALISED(efx);
-
-	efx_stop_all(efx);
-
-	efx_fini_channels(efx);
-	efx_init_channels(efx);
-
-	efx_start_all(efx);
-}
-
 /**************************************************************************
  *
  * Interrupt moderation
  *
  **************************************************************************/
 
+static unsigned irq_mod_ticks(int usecs, int resolution)
+{
+	if (usecs <= 0)
+		return 0; /* cannot receive interrupts ahead of time :-) */
+	if (usecs < resolution)
+		return 1; /* never round down to 0 */
+	return usecs / resolution;
+}
+
 /* Set interrupt moderation parameters */
 void efx_init_irq_moderation(struct efx_nic *efx, int tx_usecs, int rx_usecs,
 			     bool rx_adaptive)
 {
 	struct efx_tx_queue *tx_queue;
 	struct efx_rx_queue *rx_queue;
+	unsigned tx_ticks = irq_mod_ticks(tx_usecs, EFX_IRQ_MOD_RESOLUTION);
+	unsigned rx_ticks = irq_mod_ticks(rx_usecs, EFX_IRQ_MOD_RESOLUTION);
 
 	EFX_ASSERT_RESET_SERIALISED(efx);
 
 	efx_for_each_tx_queue(tx_queue, efx)
-		tx_queue->channel->irq_moderation = tx_usecs;
+		tx_queue->channel->irq_moderation = tx_ticks;
 
 	efx->irq_rx_adaptive = rx_adaptive;
-	efx->irq_rx_moderation = rx_usecs;
+	efx->irq_rx_moderation = rx_ticks;
 	efx_for_each_rx_queue(rx_queue, efx)
-		rx_queue->channel->irq_moderation = rx_usecs;
+		rx_queue->channel->irq_moderation = rx_ticks;
 }
 
 /**************************************************************************
@@ -1250,10 +1344,10 @@
 {
 	struct efx_nic *efx = container_of(data, struct efx_nic,
 					   monitor_work.work);
-	int rc;
 
 	EFX_TRACE(efx, "hardware monitor executing on CPU %d\n",
 		  raw_smp_processor_id());
+	BUG_ON(efx->type->monitor == NULL);
 
 	/* If the mac_lock is already held then it is likely a port
 	 * reconfiguration is already in place, which will likely do
@@ -1262,15 +1356,7 @@
 		goto out_requeue;
 	if (!efx->port_enabled)
 		goto out_unlock;
-	rc = efx->board_info.monitor(efx);
-	if (rc) {
-		EFX_ERR(efx, "Board sensor %s; shutting down PHY\n",
-			(rc == -ERANGE) ? "reported fault" : "failed");
-		efx->phy_mode |= PHY_MODE_LOW_POWER;
-		falcon_sim_phy_event(efx);
-	}
-	efx->phy_op->poll(efx);
-	efx->mac_op->poll(efx);
+	efx->type->monitor(efx);
 
 out_unlock:
 	mutex_unlock(&efx->mac_lock);
@@ -1374,6 +1460,12 @@
 		return -EIO;
 	if (efx->phy_mode & PHY_MODE_SPECIAL)
 		return -EBUSY;
+	if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
+		return -EIO;
+
+	/* Notify the kernel of the link state polled during driver load,
+	 * before the monitor starts running */
+	efx_link_status_changed(efx);
 
 	efx_start_all(efx);
 	return 0;
@@ -1400,20 +1492,6 @@
 	return 0;
 }
 
-void efx_stats_disable(struct efx_nic *efx)
-{
-	spin_lock(&efx->stats_lock);
-	++efx->stats_disable_count;
-	spin_unlock(&efx->stats_lock);
-}
-
-void efx_stats_enable(struct efx_nic *efx)
-{
-	spin_lock(&efx->stats_lock);
-	--efx->stats_disable_count;
-	spin_unlock(&efx->stats_lock);
-}
-
 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
 static struct net_device_stats *efx_net_stats(struct net_device *net_dev)
 {
@@ -1421,17 +1499,9 @@
 	struct efx_mac_stats *mac_stats = &efx->mac_stats;
 	struct net_device_stats *stats = &net_dev->stats;
 
-	/* Update stats if possible, but do not wait if another thread
-	 * is updating them or if MAC stats fetches are temporarily
-	 * disabled; slightly stale stats are acceptable.
-	 */
-	if (!spin_trylock(&efx->stats_lock))
-		return stats;
-	if (!efx->stats_disable_count) {
-		efx->mac_op->update_stats(efx);
-		falcon_update_nic_stats(efx);
-	}
-	spin_unlock(&efx->stats_lock);
+	spin_lock_bh(&efx->stats_lock);
+	efx->type->update_stats(efx);
+	spin_unlock_bh(&efx->stats_lock);
 
 	stats->rx_packets = mac_stats->rx_packets;
 	stats->tx_packets = mac_stats->tx_packets;
@@ -1490,7 +1560,14 @@
 	EFX_LOG(efx, "changing MTU to %d\n", new_mtu);
 
 	efx_fini_channels(efx);
+
+	mutex_lock(&efx->mac_lock);
+	/* Reconfigure the MAC before enabling the dma queues so that
+	 * the RX buffers don't overflow */
 	net_dev->mtu = new_mtu;
+	efx->mac_op->reconfigure(efx);
+	mutex_unlock(&efx->mac_lock);
+
 	efx_init_channels(efx);
 
 	efx_start_all(efx);
@@ -1514,7 +1591,9 @@
 	memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
 
 	/* Reconfigure the MAC */
-	efx_reconfigure_port(efx);
+	mutex_lock(&efx->mac_lock);
+	efx->mac_op->reconfigure(efx);
+	mutex_unlock(&efx->mac_lock);
 
 	return 0;
 }
@@ -1525,16 +1604,14 @@
 	struct efx_nic *efx = netdev_priv(net_dev);
 	struct dev_mc_list *mc_list = net_dev->mc_list;
 	union efx_multicast_hash *mc_hash = &efx->multicast_hash;
-	bool promiscuous = !!(net_dev->flags & IFF_PROMISC);
-	bool changed = (efx->promiscuous != promiscuous);
 	u32 crc;
 	int bit;
 	int i;
 
-	efx->promiscuous = promiscuous;
+	efx->promiscuous = !!(net_dev->flags & IFF_PROMISC);
 
 	/* Build multicast hash table */
-	if (promiscuous || (net_dev->flags & IFF_ALLMULTI)) {
+	if (efx->promiscuous || (net_dev->flags & IFF_ALLMULTI)) {
 		memset(mc_hash, 0xff, sizeof(*mc_hash));
 	} else {
 		memset(mc_hash, 0x00, sizeof(*mc_hash));
@@ -1544,17 +1621,17 @@
 			set_bit_le(bit, mc_hash->byte);
 			mc_list = mc_list->next;
 		}
-	}
 
-	if (!efx->port_enabled)
-		/* Delay pushing settings until efx_start_port() */
-		return;
-
-	if (changed)
-		queue_work(efx->workqueue, &efx->phy_work);
+		/* Broadcast packets go through the multicast hash filter.
+		 * ether_crc_le() of the broadcast address is 0xbe2612ff
+		 * so we always add bit 0xff to the mask.
+		 */
+		set_bit_le(0xff, mc_hash->byte);
+	}
 
-	/* Create and activate new global multicast hash table */
-	falcon_set_multicast_hash(efx);
+	if (efx->port_enabled)
+		queue_work(efx->workqueue, &efx->mac_work);
+	/* Otherwise efx_start_port() will do this */
 }
 
 static const struct net_device_ops efx_netdev_ops = {
@@ -1683,21 +1760,18 @@
 
 /* Tears down the entire software state and most of the hardware state
  * before reset.  */
-void efx_reset_down(struct efx_nic *efx, enum reset_type method,
-		    struct ethtool_cmd *ecmd)
+void efx_reset_down(struct efx_nic *efx, enum reset_type method)
 {
 	EFX_ASSERT_RESET_SERIALISED(efx);
 
-	efx_stats_disable(efx);
 	efx_stop_all(efx);
 	mutex_lock(&efx->mac_lock);
 	mutex_lock(&efx->spi_lock);
 
-	efx->phy_op->get_settings(efx, ecmd);
-
 	efx_fini_channels(efx);
 	if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
 		efx->phy_op->fini(efx);
+	efx->type->fini(efx);
 }
 
 /* This function will always ensure that the locks acquired in
@@ -1705,79 +1779,67 @@
  * that we were unable to reinitialise the hardware, and the
  * driver should be disabled. If ok is false, then the rx and tx
  * engines are not restarted, pending a RESET_DISABLE. */
-int efx_reset_up(struct efx_nic *efx, enum reset_type method,
-		 struct ethtool_cmd *ecmd, bool ok)
+int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
 {
 	int rc;
 
 	EFX_ASSERT_RESET_SERIALISED(efx);
 
-	rc = falcon_init_nic(efx);
+	rc = efx->type->init(efx);
 	if (rc) {
 		EFX_ERR(efx, "failed to initialise NIC\n");
-		ok = false;
+		goto fail;
 	}
 
+	if (!ok)
+		goto fail;
+
 	if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
-		if (ok) {
-			rc = efx->phy_op->init(efx);
-			if (rc)
-				ok = false;
-		}
-		if (!ok)
-			efx->port_initialized = false;
+		rc = efx->phy_op->init(efx);
+		if (rc)
+			goto fail;
+		if (efx->phy_op->reconfigure(efx))
+			EFX_ERR(efx, "could not restore PHY settings\n");
 	}
 
-	if (ok) {
-		efx_init_channels(efx);
+	efx->mac_op->reconfigure(efx);
 
-		if (efx->phy_op->set_settings(efx, ecmd))
-			EFX_ERR(efx, "could not restore PHY settings\n");
-	}
+	efx_init_channels(efx);
+
+	mutex_unlock(&efx->spi_lock);
+	mutex_unlock(&efx->mac_lock);
+
+	efx_start_all(efx);
+
+	return 0;
+
+fail:
+	efx->port_initialized = false;
 
 	mutex_unlock(&efx->spi_lock);
 	mutex_unlock(&efx->mac_lock);
 
-	if (ok) {
-		efx_start_all(efx);
-		efx_stats_enable(efx);
-	}
 	return rc;
 }
 
-/* Reset the NIC as transparently as possible. Do not reset the PHY
- * Note that the reset may fail, in which case the card will be left
- * in a most-probably-unusable state.
+/* Reset the NIC using the specified method.  Note that the reset may
+ * fail, in which case the card will be left in an unusable state.
  *
- * This function will sleep.  You cannot reset from within an atomic
- * state; use efx_schedule_reset() instead.
- *
- * Grabs the rtnl_lock.
+ * Caller must hold the rtnl_lock.
  */
-static int efx_reset(struct efx_nic *efx)
+int efx_reset(struct efx_nic *efx, enum reset_type method)
 {
-	struct ethtool_cmd ecmd;
-	enum reset_type method = efx->reset_pending;
-	int rc = 0;
-
-	/* Serialise with kernel interfaces */
-	rtnl_lock();
-
-	/* If we're not RUNNING then don't reset. Leave the reset_pending
-	 * flag set so that efx_pci_probe_main will be retried */
-	if (efx->state != STATE_RUNNING) {
-		EFX_INFO(efx, "scheduled reset quenched. NIC not RUNNING\n");
-		goto out_unlock;
-	}
+	int rc, rc2;
+	bool disabled;
 
-	EFX_INFO(efx, "resetting (%d)\n", method);
+	EFX_INFO(efx, "resetting (%s)\n", RESET_TYPE(method));
 
-	efx_reset_down(efx, method, &ecmd);
+	efx_reset_down(efx, method);
 
-	rc = falcon_reset_hw(efx, method);
+	rc = efx->type->reset(efx, method);
 	if (rc) {
 		EFX_ERR(efx, "failed to reset hardware\n");
-		goto out_disable;
+		goto out;
 	}
 
 	/* Allow resets to be rescheduled. */
@@ -1789,25 +1851,23 @@
 	 * can respond to requests. */
 	pci_set_master(efx->pci_dev);
 
+out:
 	/* Leave device stopped if necessary */
-	if (method == RESET_TYPE_DISABLE) {
-		efx_reset_up(efx, method, &ecmd, false);
-		rc = -EIO;
-	} else {
-		rc = efx_reset_up(efx, method, &ecmd, true);
+	disabled = rc || method == RESET_TYPE_DISABLE;
+	rc2 = efx_reset_up(efx, method, !disabled);
+	if (rc2) {
+		disabled = true;
+		if (!rc)
+			rc = rc2;
 	}
 
-out_disable:
-	if (rc) {
+	if (disabled) {
+		dev_close(efx->net_dev);
 		EFX_ERR(efx, "has been disabled\n");
 		efx->state = STATE_DISABLED;
-		dev_close(efx->net_dev);
 	} else {
 		EFX_LOG(efx, "reset complete\n");
 	}
-
-out_unlock:
-	rtnl_unlock();
 	return rc;
 }
 
@@ -1816,9 +1876,18 @@
  */
 static void efx_reset_work(struct work_struct *data)
 {
-	struct efx_nic *nic = container_of(data, struct efx_nic, reset_work);
+	struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
+
+	/* If we're not RUNNING then don't reset. Leave the reset_pending
+	 * flag set so that efx_pci_probe_main will be retried */
+	if (efx->state != STATE_RUNNING) {
+		EFX_INFO(efx, "scheduled reset quenched. NIC not RUNNING\n");
+		return;
+	}
 
-	efx_reset(nic);
+	rtnl_lock();
+	(void)efx_reset(efx, efx->reset_pending);
+	rtnl_unlock();
 }
 
 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
@@ -1843,18 +1912,24 @@
 	case RESET_TYPE_TX_SKIP:
 		method = RESET_TYPE_INVISIBLE;
 		break;
+	case RESET_TYPE_MC_FAILURE:
 	default:
 		method = RESET_TYPE_ALL;
 		break;
 	}
 
 	if (method != type)
-		EFX_LOG(efx, "scheduling reset (%d:%d)\n", type, method);
+		EFX_LOG(efx, "scheduling %s reset for %s\n",
+			RESET_TYPE(method), RESET_TYPE(type));
 	else
-		EFX_LOG(efx, "scheduling reset (%d)\n", method);
+		EFX_LOG(efx, "scheduling %s reset\n", RESET_TYPE(method));
 
 	efx->reset_pending = method;
 
+	/* efx_process_channel() will no longer read events once a
+	 * reset is scheduled. So switch back to poll'd MCDI completions. */
+	efx_mcdi_mode_poll(efx);
+
 	queue_work(reset_workqueue, &efx->reset_work);
 }
 
@@ -1867,15 +1942,19 @@
 /* PCI device ID table */
 static struct pci_device_id efx_pci_table[] __devinitdata = {
 	{PCI_DEVICE(EFX_VENDID_SFC, FALCON_A_P_DEVID),
-	 .driver_data = (unsigned long) &falcon_a_nic_type},
+	 .driver_data = (unsigned long) &falcon_a1_nic_type},
 	{PCI_DEVICE(EFX_VENDID_SFC, FALCON_B_P_DEVID),
-	 .driver_data = (unsigned long) &falcon_b_nic_type},
+	 .driver_data = (unsigned long) &falcon_b0_nic_type},
+	{PCI_DEVICE(EFX_VENDID_SFC, BETHPAGE_A_P_DEVID),
+	 .driver_data = (unsigned long) &siena_a0_nic_type},
+	{PCI_DEVICE(EFX_VENDID_SFC, SIENA_A_P_DEVID),
+	 .driver_data = (unsigned long) &siena_a0_nic_type},
 	{0}			/* end of list */
 };
 
 /**************************************************************************
  *
- * Dummy PHY/MAC/Board operations
+ * Dummy PHY/MAC operations
  *
  * Can be used for some unimplemented operations
  * Needed so all function pointers are valid and do not have to be tested
@@ -1887,29 +1966,19 @@
 	return 0;
 }
 void efx_port_dummy_op_void(struct efx_nic *efx) {}
-void efx_port_dummy_op_blink(struct efx_nic *efx, bool blink) {}
-
-static struct efx_mac_operations efx_dummy_mac_operations = {
-	.reconfigure	= efx_port_dummy_op_void,
-	.poll		= efx_port_dummy_op_void,
-	.irq		= efx_port_dummy_op_void,
-};
+void efx_port_dummy_op_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
+{
+}
+bool efx_port_dummy_op_poll(struct efx_nic *efx)
+{
+	return false;
+}
 
 static struct efx_phy_operations efx_dummy_phy_operations = {
 	.init		 = efx_port_dummy_op_int,
-	.reconfigure	 = efx_port_dummy_op_void,
-	.poll		 = efx_port_dummy_op_void,
+	.reconfigure	 = efx_port_dummy_op_int,
+	.poll		 = efx_port_dummy_op_poll,
 	.fini		 = efx_port_dummy_op_void,
-	.clear_interrupt = efx_port_dummy_op_void,
-};
-
-static struct efx_board efx_dummy_board_info = {
-	.init		= efx_port_dummy_op_int,
-	.init_leds	= efx_port_dummy_op_void,
-	.set_id_led	= efx_port_dummy_op_blink,
-	.monitor	= efx_port_dummy_op_int,
-	.blink		= efx_port_dummy_op_blink,
-	.fini		= efx_port_dummy_op_void,
 };
 
 /**************************************************************************
@@ -1932,26 +2001,26 @@
 	/* Initialise common structures */
 	memset(efx, 0, sizeof(*efx));
 	spin_lock_init(&efx->biu_lock);
-	spin_lock_init(&efx->phy_lock);
+	mutex_init(&efx->mdio_lock);
 	mutex_init(&efx->spi_lock);
+#ifdef CONFIG_SFC_MTD
+	INIT_LIST_HEAD(&efx->mtd_list);
+#endif
 	INIT_WORK(&efx->reset_work, efx_reset_work);
 	INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
 	efx->pci_dev = pci_dev;
 	efx->state = STATE_INIT;
 	efx->reset_pending = RESET_TYPE_NONE;
 	strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
-	efx->board_info = efx_dummy_board_info;
 
 	efx->net_dev = net_dev;
 	efx->rx_checksum_enabled = true;
 	spin_lock_init(&efx->netif_stop_lock);
 	spin_lock_init(&efx->stats_lock);
-	efx->stats_disable_count = 1;
 	mutex_init(&efx->mac_lock);
-	efx->mac_op = &efx_dummy_mac_operations;
+	efx->mac_op = type->default_mac_ops;
 	efx->phy_op = &efx_dummy_phy_operations;
 	efx->mdio.dev = net_dev;
-	INIT_WORK(&efx->phy_work, efx_phy_work);
 	INIT_WORK(&efx->mac_work, efx_mac_work);
 	atomic_set(&efx->netif_stop_count, 1);
 
@@ -1981,17 +2050,9 @@
 
 	efx->type = type;
 
-	/* Sanity-check NIC type */
-	EFX_BUG_ON_PARANOID(efx->type->txd_ring_mask &
-			    (efx->type->txd_ring_mask + 1));
-	EFX_BUG_ON_PARANOID(efx->type->rxd_ring_mask &
-			    (efx->type->rxd_ring_mask + 1));
-	EFX_BUG_ON_PARANOID(efx->type->evq_size &
-			    (efx->type->evq_size - 1));
 	/* As close as we can get to guaranteeing that we don't overflow */
-	EFX_BUG_ON_PARANOID(efx->type->evq_size <
-			    (efx->type->txd_ring_mask + 1 +
-			     efx->type->rxd_ring_mask + 1));
+	BUILD_BUG_ON(EFX_EVQ_SIZE < EFX_TXQ_SIZE + EFX_RXQ_SIZE);
+
 	EFX_BUG_ON_PARANOID(efx->type->phys_addr_channels > EFX_MAX_CHANNELS);
 
 	/* Higher numbered interrupt modes are less capable! */
@@ -2027,19 +2088,10 @@
  */
 static void efx_pci_remove_main(struct efx_nic *efx)
 {
-	EFX_ASSERT_RESET_SERIALISED(efx);
-
-	/* Skip everything if we never obtained a valid membase */
-	if (!efx->membase)
-		return;
-
+	efx_nic_fini_interrupt(efx);
 	efx_fini_channels(efx);
 	efx_fini_port(efx);
-
-	/* Shutdown the board, then the NIC and board state */
-	efx->board_info.fini(efx);
-	falcon_fini_interrupt(efx);
-
+	efx->type->fini(efx);
 	efx_fini_napi(efx);
 	efx_remove_all(efx);
 }
@@ -2063,9 +2115,6 @@
 	/* Allow any queued efx_resets() to complete */
 	rtnl_unlock();
 
-	if (efx->membase == NULL)
-		goto out;
-
 	efx_unregister_netdev(efx);
 
 	efx_mtd_remove(efx);
@@ -2078,7 +2127,6 @@
 
 	efx_pci_remove_main(efx);
 
-out:
 	efx_fini_io(efx);
 	EFX_LOG(efx, "shutdown successful\n");
 
@@ -2103,39 +2151,31 @@
 	if (rc)
 		goto fail2;
 
-	/* Initialise the board */
-	rc = efx->board_info.init(efx);
-	if (rc) {
-		EFX_ERR(efx, "failed to initialise board\n");
-		goto fail3;
-	}
-
-	rc = falcon_init_nic(efx);
+	rc = efx->type->init(efx);
 	if (rc) {
 		EFX_ERR(efx, "failed to initialise NIC\n");
-		goto fail4;
+		goto fail3;
 	}
 
 	rc = efx_init_port(efx);
 	if (rc) {
 		EFX_ERR(efx, "failed to initialise port\n");
-		goto fail5;
+		goto fail4;
 	}
 
 	efx_init_channels(efx);
 
-	rc = falcon_init_interrupt(efx);
+	rc = efx_nic_init_interrupt(efx);
 	if (rc)
-		goto fail6;
+		goto fail5;
 
 	return 0;
 
- fail6:
+ fail5:
 	efx_fini_channels(efx);
 	efx_fini_port(efx);
- fail5:
  fail4:
-	efx->board_info.fini(efx);
+	efx->type->fini(efx);
  fail3:
 	efx_fini_napi(efx);
  fail2:
@@ -2165,9 +2205,11 @@
 	net_dev = alloc_etherdev(sizeof(*efx));
 	if (!net_dev)
 		return -ENOMEM;
-	net_dev->features |= (NETIF_F_IP_CSUM | NETIF_F_SG |
+	net_dev->features |= (type->offload_features | NETIF_F_SG |
 			      NETIF_F_HIGHDMA | NETIF_F_TSO |
 			      NETIF_F_GRO);
+	if (type->offload_features & NETIF_F_V6_CSUM)
+		net_dev->features |= NETIF_F_TSO6;
 	/* Mask for features that also apply to VLAN devices */
 	net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
 				   NETIF_F_HIGHDMA | NETIF_F_TSO);
@@ -2219,18 +2261,19 @@
 		goto fail4;
 	}
 
-	/* Switch to the running state before we expose the device to
-	 * the OS.  This is to ensure that the initial gathering of
-	 * MAC stats succeeds. */
+	/* Switch to the running state before we expose the device to the OS,
+	 * so that dev_open()|efx_start_all() will actually start the device */
 	efx->state = STATE_RUNNING;
 
-	efx_mtd_probe(efx); /* allowed to fail */
-
 	rc = efx_register_netdev(efx);
 	if (rc)
 		goto fail5;
 
 	EFX_LOG(efx, "initialisation successful\n");
+
+	rtnl_lock();
+	efx_mtd_probe(efx); /* allowed to fail */
+	rtnl_unlock();
 	return 0;
 
  fail5:
@@ -2241,16 +2284,113 @@
  fail2:
 	efx_fini_struct(efx);
  fail1:
+	WARN_ON(rc > 0);
 	EFX_LOG(efx, "initialisation failed. rc=%d\n", rc);
 	free_netdev(net_dev);
 	return rc;
 }
 
+static int efx_pm_freeze(struct device *dev)
+{
+	struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
+
+	efx->state = STATE_FINI;
+
+	netif_device_detach(efx->net_dev);
+
+	efx_stop_all(efx);
+	efx_fini_channels(efx);
+
+	return 0;
+}
+
+static int efx_pm_thaw(struct device *dev)
+{
+	struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
+
+	efx->state = STATE_INIT;
+
+	efx_init_channels(efx);
+
+	mutex_lock(&efx->mac_lock);
+	efx->phy_op->reconfigure(efx);
+	mutex_unlock(&efx->mac_lock);
+
+	efx_start_all(efx);
+
+	netif_device_attach(efx->net_dev);
+
+	efx->state = STATE_RUNNING;
+
+	efx->type->resume_wol(efx);
+
+	return 0;
+}
+
+static int efx_pm_poweroff(struct device *dev)
+{
+	struct pci_dev *pci_dev = to_pci_dev(dev);
+	struct efx_nic *efx = pci_get_drvdata(pci_dev);
+
+	efx->type->fini(efx);
+
+	efx->reset_pending = RESET_TYPE_NONE;
+
+	pci_save_state(pci_dev);
+	return pci_set_power_state(pci_dev, PCI_D3hot);
+}
+
+/* Used for both resume and restore */
+static int efx_pm_resume(struct device *dev)
+{
+	struct pci_dev *pci_dev = to_pci_dev(dev);
+	struct efx_nic *efx = pci_get_drvdata(pci_dev);
+	int rc;
+
+	rc = pci_set_power_state(pci_dev, PCI_D0);
+	if (rc)
+		return rc;
+	pci_restore_state(pci_dev);
+	rc = pci_enable_device(pci_dev);
+	if (rc)
+		return rc;
+	pci_set_master(efx->pci_dev);
+	rc = efx->type->reset(efx, RESET_TYPE_ALL);
+	if (rc)
+		return rc;
+	rc = efx->type->init(efx);
+	if (rc)
+		return rc;
+	efx_pm_thaw(dev);
+	return 0;
+}
+
+static int efx_pm_suspend(struct device *dev)
+{
+	int rc;
+
+	efx_pm_freeze(dev);
+	rc = efx_pm_poweroff(dev);
+	if (rc)
+		efx_pm_resume(dev);
+	return rc;
+}
+
+static struct dev_pm_ops efx_pm_ops = {
+	.suspend	= efx_pm_suspend,
+	.resume		= efx_pm_resume,
+	.freeze		= efx_pm_freeze,
+	.thaw		= efx_pm_thaw,
+	.poweroff	= efx_pm_poweroff,
+	.restore	= efx_pm_resume,
+};
+
 static struct pci_driver efx_pci_driver = {
 	.name		= EFX_DRIVER_NAME,
 	.id_table	= efx_pci_table,
 	.probe		= efx_pci_probe,
 	.remove		= efx_pci_remove,
+	.driver.pm	= &efx_pm_ops,
 };
 
 /**************************************************************************
@@ -2314,8 +2454,8 @@
 module_init(efx_init_module);
 module_exit(efx_exit_module);
 
-MODULE_AUTHOR("Michael Brown <mbrown@fensystems.co.uk> and "
-	      "Solarflare Communications");
+MODULE_AUTHOR("Solarflare Communications and "
+	      "Michael Brown <mbrown@fensystems.co.uk>");
 MODULE_DESCRIPTION("Solarflare Communications network driver");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, efx_pci_table);
--- linux-mvl-dove-2.6.32.orig/drivers/net/sfc/tenxpress.c
+++ linux-mvl-dove-2.6.32/drivers/net/sfc/tenxpress.c
@@ -1,6 +1,6 @@
 /****************************************************************************
  * Driver for Solarflare Solarstorm network controllers and boards
- * Copyright 2007-2008 Solarflare Communications Inc.
+ * Copyright 2007-2009 Solarflare Communications Inc.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of the GNU General Public License version 2 as published
@@ -12,10 +12,9 @@
 #include <linux/seq_file.h>
 #include "efx.h"
 #include "mdio_10g.h"
-#include "falcon.h"
+#include "nic.h"
 #include "phy.h"
-#include "falcon_hwdefs.h"
-#include "boards.h"
+#include "regs.h"
 #include "workarounds.h"
 #include "selftest.h"
 
@@ -31,13 +30,13 @@
 #define SFX7101_LOOPBACKS ((1 << LOOPBACK_PHYXS) |	\
 			   (1 << LOOPBACK_PCS) |	\
 			   (1 << LOOPBACK_PMAPMD) |	\
-			   (1 << LOOPBACK_NETWORK))
+			   (1 << LOOPBACK_PHYXS_WS))
 
 #define SFT9001_LOOPBACKS ((1 << LOOPBACK_GPHY) |	\
 			   (1 << LOOPBACK_PHYXS) |	\
 			   (1 << LOOPBACK_PCS) |	\
 			   (1 << LOOPBACK_PMAPMD) |	\
-			   (1 << LOOPBACK_NETWORK))
+			   (1 << LOOPBACK_PHYXS_WS))
 
 /* We complain if we fail to see the link partner as 10G capable this many
  * times in a row (must be > 1 as sampling the autoneg. registers is racy)
@@ -84,9 +83,9 @@
 #define PMA_PMD_LED_FLASH	(3)
 #define PMA_PMD_LED_MASK	3
 /* All LEDs under hardware control */
-#define PMA_PMD_LED_FULL_AUTO	(0)
+#define SFT9001_PMA_PMD_LED_DEFAULT 0
 /* Green and Amber under hardware control, Red off */
-#define PMA_PMD_LED_DEFAULT	(PMA_PMD_LED_OFF << PMA_PMD_LED_RX_LBN)
+#define SFX7101_PMA_PMD_LED_DEFAULT (PMA_PMD_LED_OFF << PMA_PMD_LED_RX_LBN)
 
 #define PMA_PMD_SPEED_ENABLE_REG 49192
 #define PMA_PMD_100TX_ADV_LBN    1
@@ -200,15 +199,20 @@
 				   const char *buf, size_t count)
 {
 	struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
+	int rc;
 
 	rtnl_lock();
-	efx_mdio_set_flag(efx, MDIO_MMD_PMAPMD, MDIO_PMA_10GBT_TXPWR,
-			  MDIO_PMA_10GBT_TXPWR_SHORT,
-			  count != 0 && *buf != '0');
-	efx_reconfigure_port(efx);
+	if (efx->state != STATE_RUNNING) {
+		rc = -EBUSY;
+	} else {
+		efx_mdio_set_flag(efx, MDIO_MMD_PMAPMD, MDIO_PMA_10GBT_TXPWR,
+				  MDIO_PMA_10GBT_TXPWR_SHORT,
+				  count != 0 && *buf != '0');
+		rc = efx_reconfigure_port(efx);
+	}
 	rtnl_unlock();
 
-	return count;
+	return rc < 0 ? rc : (ssize_t)count;
 }
 
 static DEVICE_ATTR(phy_short_reach, 0644, show_phy_short_reach,
@@ -292,23 +296,68 @@
 		efx_mdio_set_flag(efx, MDIO_MMD_PMAPMD, PMA_PMD_LED_CTRL_REG,
 				  1 << PMA_PMA_LED_ACTIVITY_LBN, true);
 		efx_mdio_write(efx, MDIO_MMD_PMAPMD, PMA_PMD_LED_OVERR_REG,
-			       PMA_PMD_LED_DEFAULT);
+			       SFX7101_PMA_PMD_LED_DEFAULT);
 	}
 
 	return 0;
 }
 
-static int tenxpress_phy_init(struct efx_nic *efx)
+static int tenxpress_phy_probe(struct efx_nic *efx)
 {
 	struct tenxpress_phy_data *phy_data;
-	int rc = 0;
+	int rc;
 
+	/* Allocate phy private storage */
 	phy_data = kzalloc(sizeof(*phy_data), GFP_KERNEL);
 	if (!phy_data)
 		return -ENOMEM;
 	efx->phy_data = phy_data;
 	phy_data->phy_mode = efx->phy_mode;
 
+	/* Create any special files */
+	if (efx->phy_type == PHY_TYPE_SFT9001B) {
+		rc = device_create_file(&efx->pci_dev->dev,
+					&dev_attr_phy_short_reach);
+		if (rc)
+			goto fail;
+	}
+
+	if (efx->phy_type == PHY_TYPE_SFX7101) {
+		efx->mdio.mmds = TENXPRESS_REQUIRED_DEVS;
+		efx->mdio.mode_support = MDIO_SUPPORTS_C45;
+
+		efx->loopback_modes = SFX7101_LOOPBACKS | FALCON_XMAC_LOOPBACKS;
+
+		efx->link_advertising = (ADVERTISED_TP | ADVERTISED_Autoneg |
+					 ADVERTISED_10000baseT_Full);
+	} else {
+		efx->mdio.mmds = TENXPRESS_REQUIRED_DEVS;
+		efx->mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
+
+		efx->loopback_modes = (SFT9001_LOOPBACKS |
+				       FALCON_XMAC_LOOPBACKS | 
+				       FALCON_GMAC_LOOPBACKS);
+
+		efx->link_advertising = (ADVERTISED_TP | ADVERTISED_Autoneg |
+					 ADVERTISED_10000baseT_Full |
+					 ADVERTISED_1000baseT_Full |
+					 ADVERTISED_100baseT_Full);
+	}
+
+	return 0;
+
+fail:
+	kfree(efx->phy_data);
+	efx->phy_data = NULL;
+	return rc;
+}
+
+static int tenxpress_phy_init(struct efx_nic *efx)
+{
+	int rc;
+
+	falcon_board(efx)->type->init_phy(efx);
+
 	if (!(efx->phy_mode & PHY_MODE_SPECIAL)) {
 		if (efx->phy_type == PHY_TYPE_SFT9001A) {
 			int reg;
@@ -322,23 +371,20 @@
 
 		rc = efx_mdio_wait_reset_mmds(efx, TENXPRESS_REQUIRED_DEVS);
 		if (rc < 0)
-			goto fail;
+			return rc;
 
 		rc = efx_mdio_check_mmds(efx, TENXPRESS_REQUIRED_DEVS, 0);
 		if (rc < 0)
-			goto fail;
+			return rc;
 	}
 
 	rc = tenxpress_init(efx);
 	if (rc < 0)
-		goto fail;
+		return rc;
 
-	if (efx->phy_type == PHY_TYPE_SFT9001B) {
-		rc = device_create_file(&efx->pci_dev->dev,
-					&dev_attr_phy_short_reach);
-		if (rc)
-			goto fail;
-	}
+	/* Reinitialise flow control settings */
+	efx_link_set_wanted_fc(efx, efx->wanted_fc);
+	efx_mdio_an_reconfigure(efx);
 
 	schedule_timeout_uninterruptible(HZ / 5); /* 200ms */
 
@@ -346,11 +392,6 @@
 	falcon_reset_xaui(efx);
 
 	return 0;
-
- fail:
-	kfree(efx->phy_data);
-	efx->phy_data = NULL;
-	return rc;
 }
 
 /* Perform a "special software reset" on the PHY. The caller is
@@ -363,7 +404,7 @@
 	/* The XGMAC clock is driven from the SFC7101/SFT9001 312MHz clock, so
 	 * a special software reset can glitch the XGMAC sufficiently for stats
 	 * requests to fail. */
-	efx_stats_disable(efx);
+	falcon_stop_nic_stats(efx);
 
 	/* Initiate reset */
 	reg = efx_mdio_read(efx, MDIO_MMD_PMAPMD, PMA_PMD_XCONTROL_REG);
@@ -385,7 +426,7 @@
 	/* Wait for the XGXS state machine to churn */
 	mdelay(10);
 out:
-	efx_stats_enable(efx);
+	falcon_start_nic_stats(efx);
 	return rc;
 }
 
@@ -489,133 +530,126 @@
 			!!(efx->phy_mode & PHY_MODE_LOW_POWER));
 }
 
-static void tenxpress_phy_reconfigure(struct efx_nic *efx)
+static int tenxpress_phy_reconfigure(struct efx_nic *efx)
 {
 	struct tenxpress_phy_data *phy_data = efx->phy_data;
-	struct ethtool_cmd ecmd;
 	bool phy_mode_change, loop_reset;
 
 	if (efx->phy_mode & (PHY_MODE_OFF | PHY_MODE_SPECIAL)) {
 		phy_data->phy_mode = efx->phy_mode;
-		return;
+		return 0;
 	}
 
-	tenxpress_low_power(efx);
-
 	phy_mode_change = (efx->phy_mode == PHY_MODE_NORMAL &&
 			   phy_data->phy_mode != PHY_MODE_NORMAL);
-	loop_reset = (LOOPBACK_OUT_OF(phy_data, efx, efx->phy_op->loopbacks) ||
+	loop_reset = (LOOPBACK_OUT_OF(phy_data, efx, LOOPBACKS_EXTERNAL(efx)) ||
 		      LOOPBACK_CHANGED(phy_data, efx, 1 << LOOPBACK_GPHY));
 
 	if (loop_reset || phy_mode_change) {
-		int rc;
-
-		efx->phy_op->get_settings(efx, &ecmd);
-
-		if (loop_reset || phy_mode_change) {
-			tenxpress_special_reset(efx);
+		tenxpress_special_reset(efx);
 
-			/* Reset XAUI if we were in 10G, and are staying
-			 * in 10G. If we're moving into and out of 10G
-			 * then xaui will be reset anyway */
-			if (EFX_IS10G(efx))
-				falcon_reset_xaui(efx);
-		}
-
-		rc = efx->phy_op->set_settings(efx, &ecmd);
-		WARN_ON(rc);
+		/* Reset XAUI if we were in 10G, and are staying
+		 * in 10G. If we're moving into and out of 10G
+		 * then xaui will be reset anyway */
+		if (EFX_IS10G(efx))
+			falcon_reset_xaui(efx);
 	}
 
+	tenxpress_low_power(efx);
 	efx_mdio_transmit_disable(efx);
 	efx_mdio_phy_reconfigure(efx);
 	tenxpress_ext_loopback(efx);
+	efx_mdio_an_reconfigure(efx);
 
 	phy_data->loopback_mode = efx->loopback_mode;
 	phy_data->phy_mode = efx->phy_mode;
 
-	if (efx->phy_type == PHY_TYPE_SFX7101) {
-		efx->link_speed = 10000;
-		efx->link_fd = true;
-		efx->link_up = sfx7101_link_ok(efx);
-	} else {
-		efx->phy_op->get_settings(efx, &ecmd);
-		efx->link_speed = ecmd.speed;
-		efx->link_fd = ecmd.duplex == DUPLEX_FULL;
-		efx->link_up = sft9001_link_ok(efx, &ecmd);
-	}
-	efx->link_fc = efx_mdio_get_pause(efx);
+	return 0;
 }
 
-/* Poll PHY for interrupt */
-static void tenxpress_phy_poll(struct efx_nic *efx)
+static void
+tenxpress_get_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd);
+
+/* Poll for link state changes */
+static bool tenxpress_phy_poll(struct efx_nic *efx)
 {
-	struct tenxpress_phy_data *phy_data = efx->phy_data;
-	bool change = false;
+	struct efx_link_state old_state = efx->link_state;
 
 	if (efx->phy_type == PHY_TYPE_SFX7101) {
-		bool link_ok = sfx7101_link_ok(efx);
-		if (link_ok != efx->link_up) {
-			change = true;
-		} else {
-			unsigned int link_fc = efx_mdio_get_pause(efx);
-			if (link_fc != efx->link_fc)
-				change = true;
-		}
-		sfx7101_check_bad_lp(efx, link_ok);
-	} else if (efx->loopback_mode) {
-		bool link_ok = sft9001_link_ok(efx, NULL);
-		if (link_ok != efx->link_up)
-			change = true;
+		efx->link_state.up = sfx7101_link_ok(efx);
+		efx->link_state.speed = 10000;
+		efx->link_state.fd = true;
+		efx->link_state.fc = efx_mdio_get_pause(efx);
+
+		sfx7101_check_bad_lp(efx, efx->link_state.up);
 	} else {
-		int status = efx_mdio_read(efx, MDIO_MMD_PMAPMD,
-					   MDIO_PMA_LASI_STAT);
-		if (status & MDIO_PMA_LASI_LSALARM)
-			change = true;
-	}
+		struct ethtool_cmd ecmd;
 
-	if (change)
-		falcon_sim_phy_event(efx);
+		/* Check the LASI alarm first */
+		if (efx->loopback_mode == LOOPBACK_NONE &&
+		    !(efx_mdio_read(efx, MDIO_MMD_PMAPMD, MDIO_PMA_LASI_STAT) &
+		      MDIO_PMA_LASI_LSALARM))
+			return false;
 
-	if (phy_data->phy_mode != PHY_MODE_NORMAL)
-		return;
+		tenxpress_get_settings(efx, &ecmd);
+
+		efx->link_state.up = sft9001_link_ok(efx, &ecmd);
+		efx->link_state.speed = ecmd.speed;
+		efx->link_state.fd = (ecmd.duplex == DUPLEX_FULL);
+		efx->link_state.fc = efx_mdio_get_pause(efx);
+	}
+
+	return !efx_link_state_equal(&efx->link_state, &old_state);
 }
 
-static void tenxpress_phy_fini(struct efx_nic *efx)
+static void sfx7101_phy_fini(struct efx_nic *efx)
 {
 	int reg;
 
+	/* Power down the LNPGA */
+	reg = (1 << PMA_PMD_LNPGA_POWERDOWN_LBN);
+	efx_mdio_write(efx, MDIO_MMD_PMAPMD, PMA_PMD_XCONTROL_REG, reg);
+
+	/* Waiting here ensures that the board fini, which can turn
+	 * off the power to the PHY, won't get run until the LNPGA
+	 * powerdown has been given long enough to complete. */
+	schedule_timeout_uninterruptible(LNPGA_PDOWN_WAIT); /* 200 ms */
+}
+
+static void tenxpress_phy_remove(struct efx_nic *efx)
+{
 	if (efx->phy_type == PHY_TYPE_SFT9001B)
 		device_remove_file(&efx->pci_dev->dev,
 				   &dev_attr_phy_short_reach);
 
-	if (efx->phy_type == PHY_TYPE_SFX7101) {
-		/* Power down the LNPGA */
-		reg = (1 << PMA_PMD_LNPGA_POWERDOWN_LBN);
-		efx_mdio_write(efx, MDIO_MMD_PMAPMD, PMA_PMD_XCONTROL_REG, reg);
-
-		/* Waiting here ensures that the board fini, which can turn
-		 * off the power to the PHY, won't get run until the LNPGA
-		 * powerdown has been given long enough to complete. */
-		schedule_timeout_uninterruptible(LNPGA_PDOWN_WAIT); /* 200 ms */
-	}
-
 	kfree(efx->phy_data);
 	efx->phy_data = NULL;
 }
 
 
-/* Set the RX and TX LEDs and Link LED flashing. The other LEDs
- * (which probably aren't wired anyway) are left in AUTO mode */
-void tenxpress_phy_blink(struct efx_nic *efx, bool blink)
+/* Override the RX, TX and link LEDs */
+void tenxpress_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
 {
 	int reg;
 
-	if (blink)
-		reg = (PMA_PMD_LED_FLASH << PMA_PMD_LED_TX_LBN) |
-			(PMA_PMD_LED_FLASH << PMA_PMD_LED_RX_LBN) |
-			(PMA_PMD_LED_FLASH << PMA_PMD_LED_LINK_LBN);
-	else
-		reg = PMA_PMD_LED_DEFAULT;
+	switch (mode) {
+	case EFX_LED_OFF:
+		reg = (PMA_PMD_LED_OFF << PMA_PMD_LED_TX_LBN) |
+			(PMA_PMD_LED_OFF << PMA_PMD_LED_RX_LBN) |
+			(PMA_PMD_LED_OFF << PMA_PMD_LED_LINK_LBN);
+		break;
+	case EFX_LED_ON:
+		reg = (PMA_PMD_LED_ON << PMA_PMD_LED_TX_LBN) |
+			(PMA_PMD_LED_ON << PMA_PMD_LED_RX_LBN) |
+			(PMA_PMD_LED_ON << PMA_PMD_LED_LINK_LBN);
+		break;
+	default:
+		if (efx->phy_type == PHY_TYPE_SFX7101)
+			reg = SFX7101_PMA_PMD_LED_DEFAULT;
+		else
+			reg = SFT9001_PMA_PMD_LED_DEFAULT;
+		break;
+	}
 
 	efx_mdio_write(efx, MDIO_MMD_PMAPMD, PMA_PMD_LED_OVERR_REG, reg);
 }
@@ -624,6 +658,13 @@
 	"bist"
 };
 
+static const char *sfx7101_test_name(struct efx_nic *efx, unsigned int index)
+{
+	if (index < ARRAY_SIZE(sfx7101_test_names))
+		return sfx7101_test_names[index];
+	return NULL;
+}
+
 static int
 sfx7101_run_tests(struct efx_nic *efx, int *results, unsigned flags)
 {
@@ -635,6 +676,9 @@
 	/* BIST is automatically run after a special software reset */
 	rc = tenxpress_special_reset(efx);
 	results[0] = rc ? -1 : 1;
+
+	efx_mdio_an_reconfigure(efx);
+
 	return rc;
 }
 
@@ -650,14 +694,17 @@
 	"cable.pairD.length",
 };
 
+static const char *sft9001_test_name(struct efx_nic *efx, unsigned int index)
+{
+	if (index < ARRAY_SIZE(sft9001_test_names))
+		return sft9001_test_names[index];
+	return NULL;
+}
+
 static int sft9001_run_tests(struct efx_nic *efx, int *results, unsigned flags)
 {
-	struct ethtool_cmd ecmd;
 	int rc = 0, rc2, i, ctrl_reg, res_reg;
 
-	if (flags & ETH_TEST_FL_OFFLINE)
-		efx->phy_op->get_settings(efx, &ecmd);
-
 	/* Initialise cable diagnostic results to unknown failure */
 	for (i = 1; i < 9; ++i)
 		results[i] = -1;
@@ -709,9 +756,7 @@
 		if (!rc)
 			rc = rc2;
 
-		rc2 = efx->phy_op->set_settings(efx, &ecmd);
-		if (!rc)
-			rc = rc2;
+		efx_mdio_an_reconfigure(efx);
 	}
 
 	return rc;
@@ -758,7 +803,7 @@
 	 * but doesn't advertise the correct speed. So override it */
 	if (efx->loopback_mode == LOOPBACK_GPHY)
 		ecmd->speed = SPEED_1000;
-	else if (LOOPBACK_MASK(efx) & efx->phy_op->loopbacks)
+	else if (LOOPBACK_EXTERNAL(efx))
 		ecmd->speed = SPEED_10000;
 }
 
@@ -788,35 +833,29 @@
 }
 
 struct efx_phy_operations falcon_sfx7101_phy_ops = {
-	.macs		  = EFX_XMAC,
+	.probe		  = tenxpress_phy_probe,
 	.init             = tenxpress_phy_init,
 	.reconfigure      = tenxpress_phy_reconfigure,
 	.poll             = tenxpress_phy_poll,
-	.fini             = tenxpress_phy_fini,
-	.clear_interrupt  = efx_port_dummy_op_void,
+	.fini             = sfx7101_phy_fini,
+	.remove		  = tenxpress_phy_remove,
 	.get_settings	  = tenxpress_get_settings,
 	.set_settings	  = tenxpress_set_settings,
 	.set_npage_adv    = sfx7101_set_npage_adv,
-	.num_tests	  = ARRAY_SIZE(sfx7101_test_names),
-	.test_names	  = sfx7101_test_names,
+	.test_name	  = sfx7101_test_name,
 	.run_tests	  = sfx7101_run_tests,
-	.mmds             = TENXPRESS_REQUIRED_DEVS,
-	.loopbacks        = SFX7101_LOOPBACKS,
 };
 
 struct efx_phy_operations falcon_sft9001_phy_ops = {
-	.macs		  = EFX_GMAC | EFX_XMAC,
+	.probe		  = tenxpress_phy_probe,
 	.init             = tenxpress_phy_init,
 	.reconfigure      = tenxpress_phy_reconfigure,
 	.poll             = tenxpress_phy_poll,
-	.fini             = tenxpress_phy_fini,
-	.clear_interrupt  = efx_port_dummy_op_void,
+	.fini             = efx_port_dummy_op_void,
+	.remove		  = tenxpress_phy_remove,
 	.get_settings	  = tenxpress_get_settings,
 	.set_settings	  = tenxpress_set_settings,
 	.set_npage_adv    = sft9001_set_npage_adv,
-	.num_tests	  = ARRAY_SIZE(sft9001_test_names),
-	.test_names	  = sft9001_test_names,
+	.test_name	  = sft9001_test_name,
 	.run_tests	  = sft9001_run_tests,
-	.mmds             = TENXPRESS_REQUIRED_DEVS,
-	.loopbacks        = SFT9001_LOOPBACKS,
 };
--- linux-mvl-dove-2.6.32.orig/drivers/net/sfc/io.h
+++ linux-mvl-dove-2.6.32/drivers/net/sfc/io.h
@@ -0,0 +1,256 @@
+/****************************************************************************
+ * Driver for Solarflare Solarstorm network controllers and boards
+ * Copyright 2005-2006 Fen Systems Ltd.
+ * Copyright 2006-2009 Solarflare Communications Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation, incorporated herein by reference.
+ */
+
+#ifndef EFX_IO_H
+#define EFX_IO_H
+
+#include <linux/io.h>
+#include <linux/spinlock.h>
+
+/**************************************************************************
+ *
+ * NIC register I/O
+ *
+ **************************************************************************
+ *
+ * Notes on locking strategy:
+ *
+ * Most NIC registers require 16-byte (or 8-byte, for SRAM) atomic writes
+ * which necessitates locking.
+ * Under normal operation few writes to NIC registers are made and these
+ * registers (EVQ_RPTR_REG, RX_DESC_UPD_REG and TX_DESC_UPD_REG) are special
+ * cased to allow 4-byte (hence lockless) accesses.
+ *
+ * It *is* safe to write to these 4-byte registers in the middle of an
+ * access to an 8-byte or 16-byte register.  We therefore use a
+ * spinlock to protect accesses to the larger registers, but no locks
+ * for the 4-byte registers.
+ *
+ * A write barrier is needed to ensure that DW3 is written after DW0/1/2
+ * due to the way the 16byte registers are "collected" in the BIU.
+ *
+ * We also lock when carrying out reads, to ensure consistency of the
+ * data (made possible since the BIU reads all 128 bits into a cache).
+ * Reads are very rare, so this isn't a significant performance
+ * impact.  (Most data transferred from NIC to host is DMAed directly
+ * into host memory).
+ *
+ * I/O BAR access uses locks for both reads and writes (but is only provided
+ * for testing purposes).
+ */
+
+#if BITS_PER_LONG == 64
+#define EFX_USE_QWORD_IO 1
+#endif
+
+#ifdef EFX_USE_QWORD_IO
+static inline void _efx_writeq(struct efx_nic *efx, __le64 value,
+				  unsigned int reg)
+{
+	__raw_writeq((__force u64)value, efx->membase + reg);
+}
+static inline __le64 _efx_readq(struct efx_nic *efx, unsigned int reg)
+{
+	return (__force __le64)__raw_readq(efx->membase + reg);
+}
+#endif
+
+static inline void _efx_writed(struct efx_nic *efx, __le32 value,
+				  unsigned int reg)
+{
+	__raw_writel((__force u32)value, efx->membase + reg);
+}
+static inline __le32 _efx_readd(struct efx_nic *efx, unsigned int reg)
+{
+	return (__force __le32)__raw_readl(efx->membase + reg);
+}
+
+/* Writes to a normal 16-byte Efx register, locking as appropriate. */
+static inline void efx_writeo(struct efx_nic *efx, efx_oword_t *value,
+			      unsigned int reg)
+{
+	unsigned long flags __attribute__ ((unused));
+
+	EFX_REGDUMP(efx, "writing register %x with " EFX_OWORD_FMT "\n", reg,
+		    EFX_OWORD_VAL(*value));
+
+	spin_lock_irqsave(&efx->biu_lock, flags);
+#ifdef EFX_USE_QWORD_IO
+	_efx_writeq(efx, value->u64[0], reg + 0);
+	wmb();
+	_efx_writeq(efx, value->u64[1], reg + 8);
+#else
+	_efx_writed(efx, value->u32[0], reg + 0);
+	_efx_writed(efx, value->u32[1], reg + 4);
+	_efx_writed(efx, value->u32[2], reg + 8);
+	wmb();
+	_efx_writed(efx, value->u32[3], reg + 12);
+#endif
+	mmiowb();
+	spin_unlock_irqrestore(&efx->biu_lock, flags);
+}
+
+/* Write an 8-byte NIC SRAM entry through the supplied mapping,
+ * locking as appropriate. */
+static inline void efx_sram_writeq(struct efx_nic *efx, void __iomem *membase,
+				   efx_qword_t *value, unsigned int index)
+{
+	unsigned int addr = index * sizeof(*value);
+	unsigned long flags __attribute__ ((unused));
+
+	EFX_REGDUMP(efx, "writing SRAM address %x with " EFX_QWORD_FMT "\n",
+		    addr, EFX_QWORD_VAL(*value));
+
+	spin_lock_irqsave(&efx->biu_lock, flags);
+#ifdef EFX_USE_QWORD_IO
+	__raw_writeq((__force u64)value->u64[0], membase + addr);
+#else
+	__raw_writel((__force u32)value->u32[0], membase + addr);
+	wmb();
+	__raw_writel((__force u32)value->u32[1], membase + addr + 4);
+#endif
+	mmiowb();
+	spin_unlock_irqrestore(&efx->biu_lock, flags);
+}
+
+/* Write dword to NIC register that allows partial writes
+ *
+ * Some registers (EVQ_RPTR_REG, RX_DESC_UPD_REG and
+ * TX_DESC_UPD_REG) can be written to as a single dword.  This allows
+ * for lockless writes.
+ */
+static inline void efx_writed(struct efx_nic *efx, efx_dword_t *value,
+			      unsigned int reg)
+{
+	EFX_REGDUMP(efx, "writing partial register %x with "EFX_DWORD_FMT"\n",
+		    reg, EFX_DWORD_VAL(*value));
+
+	/* No lock required */
+	_efx_writed(efx, value->u32[0], reg);
+}
+
+/* Read from a NIC register
+ *
+ * This reads an entire 16-byte register in one go, locking as
+ * appropriate.  It is essential to read the first dword first, as this
+ * prompts the NIC to load the current value into the shadow register.
+ */
+static inline void efx_reado(struct efx_nic *efx, efx_oword_t *value,
+			     unsigned int reg)
+{
+	unsigned long flags __attribute__ ((unused));
+
+	spin_lock_irqsave(&efx->biu_lock, flags);
+	value->u32[0] = _efx_readd(efx, reg + 0);
+	rmb();
+	value->u32[1] = _efx_readd(efx, reg + 4);
+	value->u32[2] = _efx_readd(efx, reg + 8);
+	value->u32[3] = _efx_readd(efx, reg + 12);
+	spin_unlock_irqrestore(&efx->biu_lock, flags);
+
+	EFX_REGDUMP(efx, "read from register %x, got " EFX_OWORD_FMT "\n", reg,
+		    EFX_OWORD_VAL(*value));
+}
+
+/* Read an 8-byte SRAM entry through supplied mapping,
+ * locking as appropriate. */
+static inline void efx_sram_readq(struct efx_nic *efx, void __iomem *membase,
+				  efx_qword_t *value, unsigned int index)
+{
+	unsigned int addr = index * sizeof(*value);
+	unsigned long flags __attribute__ ((unused));
+
+	spin_lock_irqsave(&efx->biu_lock, flags);
+#ifdef EFX_USE_QWORD_IO
+	value->u64[0] = (__force __le64)__raw_readq(membase + addr);
+#else
+	value->u32[0] = (__force __le32)__raw_readl(membase + addr);
+	rmb();
+	value->u32[1] = (__force __le32)__raw_readl(membase + addr + 4);
+#endif
+	spin_unlock_irqrestore(&efx->biu_lock, flags);
+
+	EFX_REGDUMP(efx, "read from SRAM address %x, got "EFX_QWORD_FMT"\n",
+		    addr, EFX_QWORD_VAL(*value));
+}
+
+/* Read dword from register that allows partial writes (sic) */
+static inline void efx_readd(struct efx_nic *efx, efx_dword_t *value,
+				unsigned int reg)
+{
+	value->u32[0] = _efx_readd(efx, reg);
+	EFX_REGDUMP(efx, "read from register %x, got "EFX_DWORD_FMT"\n",
+		    reg, EFX_DWORD_VAL(*value));
+}
+
+/* Write to a register forming part of a table */
+static inline void efx_writeo_table(struct efx_nic *efx, efx_oword_t *value,
+				      unsigned int reg, unsigned int index)
+{
+	efx_writeo(efx, value, reg + index * sizeof(efx_oword_t));
+}
+
+/* Read to a register forming part of a table */
+static inline void efx_reado_table(struct efx_nic *efx, efx_oword_t *value,
+				     unsigned int reg, unsigned int index)
+{
+	efx_reado(efx, value, reg + index * sizeof(efx_oword_t));
+}
+
+/* Write to a dword register forming part of a table */
+static inline void efx_writed_table(struct efx_nic *efx, efx_dword_t *value,
+				       unsigned int reg, unsigned int index)
+{
+	efx_writed(efx, value, reg + index * sizeof(efx_oword_t));
+}
+
+/* Page-mapped register block size */
+#define EFX_PAGE_BLOCK_SIZE 0x2000
+
+/* Calculate offset to page-mapped register block */
+#define EFX_PAGED_REG(page, reg) \
+	((page) * EFX_PAGE_BLOCK_SIZE + (reg))
+
+/* As for efx_writeo(), but for a page-mapped register. */
+static inline void efx_writeo_page(struct efx_nic *efx, efx_oword_t *value,
+				   unsigned int reg, unsigned int page)
+{
+	efx_writeo(efx, value, EFX_PAGED_REG(page, reg));
+}
+
+/* As for efx_writed(), but for a page-mapped register. */
+static inline void efx_writed_page(struct efx_nic *efx, efx_dword_t *value,
+				   unsigned int reg, unsigned int page)
+{
+	efx_writed(efx, value, EFX_PAGED_REG(page, reg));
+}
+
+/* Write dword to page-mapped register with an extra lock.
+ *
+ * As for efx_writed_page(), but for a register that suffers from
+ * SFC bug 3181. Take out a lock so the BIU collector cannot be
+ * confused. */
+static inline void efx_writed_page_locked(struct efx_nic *efx,
+					  efx_dword_t *value,
+					  unsigned int reg,
+					  unsigned int page)
+{
+	unsigned long flags __attribute__ ((unused));
+
+	if (page == 0) {
+		spin_lock_irqsave(&efx->biu_lock, flags);
+		efx_writed(efx, value, EFX_PAGED_REG(page, reg));
+		spin_unlock_irqrestore(&efx->biu_lock, flags);
+	} else {
+		efx_writed(efx, value, EFX_PAGED_REG(page, reg));
+	}
+}
+
+#endif /* EFX_IO_H */
--- linux-mvl-dove-2.6.32.orig/drivers/net/sfc/mcdi.c
+++ linux-mvl-dove-2.6.32/drivers/net/sfc/mcdi.c
@@ -0,0 +1,1114 @@
+/****************************************************************************
+ * Driver for Solarflare Solarstorm network controllers and boards
+ * Copyright 2008-2009 Solarflare Communications Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation, incorporated herein by reference.
+ */
+
+#include <linux/delay.h>
+#include "net_driver.h"
+#include "nic.h"
+#include "io.h"
+#include "regs.h"
+#include "mcdi_pcol.h"
+#include "phy.h"
+
+/**************************************************************************
+ *
+ * Management-Controller-to-Driver Interface
+ *
+ **************************************************************************
+ */
+
+/* Software-defined structure to the shared-memory */
+#define CMD_NOTIFY_PORT0 0
+#define CMD_NOTIFY_PORT1 4
+#define CMD_PDU_PORT0    0x008
+#define CMD_PDU_PORT1    0x108
+#define REBOOT_FLAG_PORT0 0x3f8
+#define REBOOT_FLAG_PORT1 0x3fc
+
+#define MCDI_RPC_TIMEOUT       10 /*seconds */
+
+#define MCDI_PDU(efx)							\
+	(efx_port_num(efx) ? CMD_PDU_PORT1 : CMD_PDU_PORT0)
+#define MCDI_DOORBELL(efx)						\
+	(efx_port_num(efx) ? CMD_NOTIFY_PORT1 : CMD_NOTIFY_PORT0)
+#define MCDI_REBOOT_FLAG(efx)						\
+	(efx_port_num(efx) ? REBOOT_FLAG_PORT1 : REBOOT_FLAG_PORT0)
+
+#define SEQ_MASK							\
+	EFX_MASK32(EFX_WIDTH(MCDI_HEADER_SEQ))
+
+static inline struct efx_mcdi_iface *efx_mcdi(struct efx_nic *efx)
+{
+	struct siena_nic_data *nic_data;
+	EFX_BUG_ON_PARANOID(efx_nic_rev(efx) < EFX_REV_SIENA_A0);
+	nic_data = efx->nic_data;
+	return &nic_data->mcdi;
+}
+
+void efx_mcdi_init(struct efx_nic *efx)
+{
+	struct efx_mcdi_iface *mcdi;
+
+	if (efx_nic_rev(efx) < EFX_REV_SIENA_A0)
+		return;
+
+	mcdi = efx_mcdi(efx);
+	init_waitqueue_head(&mcdi->wq);
+	spin_lock_init(&mcdi->iface_lock);
+	atomic_set(&mcdi->state, MCDI_STATE_QUIESCENT);
+	mcdi->mode = MCDI_MODE_POLL;
+
+	(void) efx_mcdi_poll_reboot(efx);
+}
+
+static void efx_mcdi_copyin(struct efx_nic *efx, unsigned cmd,
+			    const u8 *inbuf, size_t inlen)
+{
+	struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
+	unsigned pdu = FR_CZ_MC_TREG_SMEM + MCDI_PDU(efx);
+	unsigned doorbell = FR_CZ_MC_TREG_SMEM + MCDI_DOORBELL(efx);
+	unsigned int i;
+	efx_dword_t hdr;
+	u32 xflags, seqno;
+
+	BUG_ON(atomic_read(&mcdi->state) == MCDI_STATE_QUIESCENT);
+	BUG_ON(inlen & 3 || inlen >= 0x100);
+
+	seqno = mcdi->seqno & SEQ_MASK;
+	xflags = 0;
+	if (mcdi->mode == MCDI_MODE_EVENTS)
+		xflags |= MCDI_HEADER_XFLAGS_EVREQ;
+
+	EFX_POPULATE_DWORD_6(hdr,
+			     MCDI_HEADER_RESPONSE, 0,
+			     MCDI_HEADER_RESYNC, 1,
+			     MCDI_HEADER_CODE, cmd,
+			     MCDI_HEADER_DATALEN, inlen,
+			     MCDI_HEADER_SEQ, seqno,
+			     MCDI_HEADER_XFLAGS, xflags);
+
+	efx_writed(efx, &hdr, pdu);
+
+	for (i = 0; i < inlen; i += 4)
+		_efx_writed(efx, *((__le32 *)(inbuf + i)), pdu + 4 + i);
+
+	/* Ensure the payload is written out before the header */
+	wmb();
+
+	/* ring the doorbell with a distinctive value */
+	_efx_writed(efx, (__force __le32) 0x45789abc, doorbell);
+}
+
+static void efx_mcdi_copyout(struct efx_nic *efx, u8 *outbuf, size_t outlen)
+{
+	struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
+	unsigned int pdu = FR_CZ_MC_TREG_SMEM + MCDI_PDU(efx);
+	int i;
+
+	BUG_ON(atomic_read(&mcdi->state) == MCDI_STATE_QUIESCENT);
+	BUG_ON(outlen & 3 || outlen >= 0x100);
+
+	for (i = 0; i < outlen; i += 4)
+		*((__le32 *)(outbuf + i)) = _efx_readd(efx, pdu + 4 + i);
+}
+
+static int efx_mcdi_poll(struct efx_nic *efx)
+{
+	struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
+	unsigned int time, finish;
+	unsigned int respseq, respcmd, error;
+	unsigned int pdu = FR_CZ_MC_TREG_SMEM + MCDI_PDU(efx);
+	unsigned int rc, spins;
+	efx_dword_t reg;
+
+	/* Check for a reboot atomically with respect to efx_mcdi_copyout() */
+	rc = -efx_mcdi_poll_reboot(efx);
+	if (rc)
+		goto out;
+
+	/* Poll for completion. Poll quickly (once a us) for the 1st jiffy,
+	 * because generally mcdi responses are fast. After that, back off
+	 * and poll once a jiffy (approximately)
+	 */
+	spins = TICK_USEC;
+	finish = get_seconds() + MCDI_RPC_TIMEOUT;
+
+	while (1) {
+		if (spins != 0) {
+			--spins;
+			udelay(1);
+		} else {
+			schedule_timeout_uninterruptible(1);
+		}
+
+		time = get_seconds();
+
+		rmb();
+		efx_readd(efx, &reg, pdu);
+
+		/* All 1's indicates that shared memory is in reset (and is
+		 * not a valid header). Wait for it to come out reset before
+		 * completing the command */
+		if (EFX_DWORD_FIELD(reg, EFX_DWORD_0) != 0xffffffff &&
+		    EFX_DWORD_FIELD(reg, MCDI_HEADER_RESPONSE))
+			break;
+
+		if (time >= finish)
+			return -ETIMEDOUT;
+	}
+
+	mcdi->resplen = EFX_DWORD_FIELD(reg, MCDI_HEADER_DATALEN);
+	respseq = EFX_DWORD_FIELD(reg, MCDI_HEADER_SEQ);
+	respcmd = EFX_DWORD_FIELD(reg, MCDI_HEADER_CODE);
+	error = EFX_DWORD_FIELD(reg, MCDI_HEADER_ERROR);
+
+	if (error && mcdi->resplen == 0) {
+		EFX_ERR(efx, "MC rebooted\n");
+		rc = EIO;
+	} else if ((respseq ^ mcdi->seqno) & SEQ_MASK) {
+		EFX_ERR(efx, "MC response mismatch tx seq 0x%x rx seq 0x%x\n",
+			respseq, mcdi->seqno);
+		rc = EIO;
+	} else if (error) {
+		efx_readd(efx, &reg, pdu + 4);
+		switch (EFX_DWORD_FIELD(reg, EFX_DWORD_0)) {
+#define TRANSLATE_ERROR(name)					\
+		case MC_CMD_ERR_ ## name:			\
+			rc = name;				\
+			break
+			TRANSLATE_ERROR(ENOENT);
+			TRANSLATE_ERROR(EINTR);
+			TRANSLATE_ERROR(EACCES);
+			TRANSLATE_ERROR(EBUSY);
+			TRANSLATE_ERROR(EINVAL);
+			TRANSLATE_ERROR(EDEADLK);
+			TRANSLATE_ERROR(ENOSYS);
+			TRANSLATE_ERROR(ETIME);
+#undef TRANSLATE_ERROR
+		default:
+			rc = EIO;
+			break;
+		}
+	} else
+		rc = 0;
+
+out:
+	mcdi->resprc = rc;
+	if (rc)
+		mcdi->resplen = 0;
+
+	/* Return rc=0 like wait_event_timeout() */
+	return 0;
+}
+
+/* Test and clear MC-rebooted flag for this port/function */
+int efx_mcdi_poll_reboot(struct efx_nic *efx)
+{
+	unsigned int addr = FR_CZ_MC_TREG_SMEM + MCDI_REBOOT_FLAG(efx);
+	efx_dword_t reg;
+	uint32_t value;
+
+	if (efx_nic_rev(efx) < EFX_REV_SIENA_A0)
+		return false;
+
+	efx_readd(efx, &reg, addr);
+	value = EFX_DWORD_FIELD(reg, EFX_DWORD_0);
+
+	if (value == 0)
+		return 0;
+
+	EFX_ZERO_DWORD(reg);
+	efx_writed(efx, &reg, addr);
+
+	if (value == MC_STATUS_DWORD_ASSERT)
+		return -EINTR;
+	else
+		return -EIO;
+}
+
+static void efx_mcdi_acquire(struct efx_mcdi_iface *mcdi)
+{
+	/* Wait until the interface becomes QUIESCENT and we win the race
+	 * to mark it RUNNING. */
+	wait_event(mcdi->wq,
+		   atomic_cmpxchg(&mcdi->state,
+				  MCDI_STATE_QUIESCENT,
+				  MCDI_STATE_RUNNING)
+		   == MCDI_STATE_QUIESCENT);
+}
+
+static int efx_mcdi_await_completion(struct efx_nic *efx)
+{
+	struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
+
+	if (wait_event_timeout(
+		    mcdi->wq,
+		    atomic_read(&mcdi->state) == MCDI_STATE_COMPLETED,
+		    msecs_to_jiffies(MCDI_RPC_TIMEOUT * 1000)) == 0)
+		return -ETIMEDOUT;
+
+	/* Check if efx_mcdi_set_mode() switched us back to polled completions.
+	 * In which case, poll for completions directly. If efx_mcdi_ev_cpl()
+	 * completed the request first, then we'll just end up completing the
+	 * request again, which is safe.
+	 *
+	 * We need an smp_rmb() to synchronise with efx_mcdi_mode_poll(), which
+	 * wait_event_timeout() implicitly provides.
+	 */
+	if (mcdi->mode == MCDI_MODE_POLL)
+		return efx_mcdi_poll(efx);
+
+	return 0;
+}
+
+static bool efx_mcdi_complete(struct efx_mcdi_iface *mcdi)
+{
+	/* If the interface is RUNNING, then move to COMPLETED and wake any
+	 * waiters. If the interface isn't in RUNNING then we've received a
+	 * duplicate completion after we've already transitioned back to
+	 * QUIESCENT. [A subsequent invocation would increment seqno, so would
+	 * have failed the seqno check].
+	 */
+	if (atomic_cmpxchg(&mcdi->state,
+			   MCDI_STATE_RUNNING,
+			   MCDI_STATE_COMPLETED) == MCDI_STATE_RUNNING) {
+		wake_up(&mcdi->wq);
+		return true;
+	}
+
+	return false;
+}
+
+static void efx_mcdi_release(struct efx_mcdi_iface *mcdi)
+{
+	atomic_set(&mcdi->state, MCDI_STATE_QUIESCENT);
+	wake_up(&mcdi->wq);
+}
+
+static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno,
+			    unsigned int datalen, unsigned int errno)
+{
+	struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
+	bool wake = false;
+
+	spin_lock(&mcdi->iface_lock);
+
+	if ((seqno ^ mcdi->seqno) & SEQ_MASK) {
+		if (mcdi->credits)
+			/* The request has been cancelled */
+			--mcdi->credits;
+		else
+			EFX_ERR(efx, "MC response mismatch tx seq 0x%x rx "
+				"seq 0x%x\n", seqno, mcdi->seqno);
+	} else {
+		mcdi->resprc = errno;
+		mcdi->resplen = datalen;
+
+		wake = true;
+	}
+
+	spin_unlock(&mcdi->iface_lock);
+
+	if (wake)
+		efx_mcdi_complete(mcdi);
+}
+
+/* Issue the given command by writing the data into the shared memory PDU,
+ * ring the doorbell and wait for completion. Copyout the result. */
+int efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd,
+		 const u8 *inbuf, size_t inlen, u8 *outbuf, size_t outlen,
+		 size_t *outlen_actual)
+{
+	struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
+	int rc;
+	BUG_ON(efx_nic_rev(efx) < EFX_REV_SIENA_A0);
+
+	efx_mcdi_acquire(mcdi);
+
+	/* Serialise with efx_mcdi_ev_cpl() and efx_mcdi_ev_death() */
+	spin_lock_bh(&mcdi->iface_lock);
+	++mcdi->seqno;
+	spin_unlock_bh(&mcdi->iface_lock);
+
+	efx_mcdi_copyin(efx, cmd, inbuf, inlen);
+
+	if (mcdi->mode == MCDI_MODE_POLL)
+		rc = efx_mcdi_poll(efx);
+	else
+		rc = efx_mcdi_await_completion(efx);
+
+	if (rc != 0) {
+		/* Close the race with efx_mcdi_ev_cpl() executing just too late
+		 * and completing a request we've just cancelled, by ensuring
+		 * that the seqno check therein fails.
+		 */
+		spin_lock_bh(&mcdi->iface_lock);
+		++mcdi->seqno;
+		++mcdi->credits;
+		spin_unlock_bh(&mcdi->iface_lock);
+
+		EFX_ERR(efx, "MC command 0x%x inlen %d mode %d timed out\n",
+			cmd, (int)inlen, mcdi->mode);
+	} else {
+		size_t resplen;
+
+		/* At the very least we need a memory barrier here to ensure
+		 * we pick up changes from efx_mcdi_ev_cpl(). Protect against
+		 * a spurious efx_mcdi_ev_cpl() running concurrently by
+		 * acquiring the iface_lock. */
+		spin_lock_bh(&mcdi->iface_lock);
+		rc = -mcdi->resprc;
+		resplen = mcdi->resplen;
+		spin_unlock_bh(&mcdi->iface_lock);
+
+		if (rc == 0) {
+			efx_mcdi_copyout(efx, outbuf,
+					 min(outlen, mcdi->resplen + 3) & ~0x3);
+			if (outlen_actual != NULL)
+				*outlen_actual = resplen;
+		} else if (cmd == MC_CMD_REBOOT && rc == -EIO)
+			; /* Don't reset if MC_CMD_REBOOT returns EIO */
+		else if (rc == -EIO || rc == -EINTR) {
+			EFX_ERR(efx, "MC fatal error %d\n", -rc);
+			efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
+		} else
+			EFX_ERR(efx, "MC command 0x%x inlen %d failed rc=%d\n",
+				cmd, (int)inlen, -rc);
+	}
+
+	efx_mcdi_release(mcdi);
+	return rc;
+}
+
+void efx_mcdi_mode_poll(struct efx_nic *efx)
+{
+	struct efx_mcdi_iface *mcdi;
+
+	if (efx_nic_rev(efx) < EFX_REV_SIENA_A0)
+		return;
+
+	mcdi = efx_mcdi(efx);
+	if (mcdi->mode == MCDI_MODE_POLL)
+		return;
+
+	/* We can switch from event completion to polled completion, because
+	 * mcdi requests are always completed in shared memory. We do this by
+	 * switching the mode to POLL'd then completing the request.
+	 * efx_mcdi_await_completion() will then call efx_mcdi_poll().
+	 *
+	 * We need an smp_wmb() to synchronise with efx_mcdi_await_completion(),
+	 * which efx_mcdi_complete() provides for us.
+	 */
+	mcdi->mode = MCDI_MODE_POLL;
+
+	efx_mcdi_complete(mcdi);
+}
+
+void efx_mcdi_mode_event(struct efx_nic *efx)
+{
+	struct efx_mcdi_iface *mcdi;
+
+	if (efx_nic_rev(efx) < EFX_REV_SIENA_A0)
+		return;
+
+	mcdi = efx_mcdi(efx);
+
+	if (mcdi->mode == MCDI_MODE_EVENTS)
+		return;
+
+	/* We can't switch from polled to event completion in the middle of a
+	 * request, because the completion method is specified in the request.
+	 * So acquire the interface to serialise the requestors. We don't need
+	 * to acquire the iface_lock to change the mode here, but we do need a
+	 * write memory barrier ensure that efx_mcdi_rpc() sees it, which
+	 * efx_mcdi_acquire() provides.
+	 */
+	efx_mcdi_acquire(mcdi);
+	mcdi->mode = MCDI_MODE_EVENTS;
+	efx_mcdi_release(mcdi);
+}
+
+static void efx_mcdi_ev_death(struct efx_nic *efx, int rc)
+{
+	struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
+
+	/* If there is an outstanding MCDI request, it has been terminated
+	 * either by a BADASSERT or REBOOT event. If the mcdi interface is
+	 * in polled mode, then do nothing because the MC reboot handler will
+	 * set the header correctly. However, if the mcdi interface is waiting
+	 * for a CMDDONE event it won't receive it [and since all MCDI events
+	 * are sent to the same queue, we can't be racing with
+	 * efx_mcdi_ev_cpl()]
+	 *
+	 * There's a race here with efx_mcdi_rpc(), because we might receive
+	 * a REBOOT event *before* the request has been copied out. In polled
+	 * mode (during startup) this is irrelevent, because efx_mcdi_complete()
+	 * is ignored. In event mode, this condition is just an edge-case of
+	 * receiving a REBOOT event after posting the MCDI request. Did the mc
+	 * reboot before or after the copyout? The best we can do always is
+	 * just return failure.
+	 */
+	spin_lock(&mcdi->iface_lock);
+	if (efx_mcdi_complete(mcdi)) {
+		if (mcdi->mode == MCDI_MODE_EVENTS) {
+			mcdi->resprc = rc;
+			mcdi->resplen = 0;
+		}
+	} else
+		/* Nobody was waiting for an MCDI request, so trigger a reset */
+		efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
+
+	spin_unlock(&mcdi->iface_lock);
+}
+
+static unsigned int efx_mcdi_event_link_speed[] = {
+	[MCDI_EVENT_LINKCHANGE_SPEED_100M] = 100,
+	[MCDI_EVENT_LINKCHANGE_SPEED_1G] = 1000,
+	[MCDI_EVENT_LINKCHANGE_SPEED_10G] = 10000,
+};
+
+
+static void efx_mcdi_process_link_change(struct efx_nic *efx, efx_qword_t *ev)
+{
+	u32 flags, fcntl, speed, lpa;
+
+	speed = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_SPEED);
+	EFX_BUG_ON_PARANOID(speed >= ARRAY_SIZE(efx_mcdi_event_link_speed));
+	speed = efx_mcdi_event_link_speed[speed];
+
+	flags = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_LINK_FLAGS);
+	fcntl = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_FCNTL);
+	lpa = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_LP_CAP);
+
+	/* efx->link_state is only modified by efx_mcdi_phy_get_link(),
+	 * which is only run after flushing the event queues. Therefore, it
+	 * is safe to modify the link state outside of the mac_lock here.
+	 */
+	efx_mcdi_phy_decode_link(efx, &efx->link_state, speed, flags, fcntl);
+
+	efx_mcdi_phy_check_fcntl(efx, lpa);
+
+	efx_link_status_changed(efx);
+}
+
+static const char *sensor_names[] = {
+	[MC_CMD_SENSOR_CONTROLLER_TEMP] = "Controller temp. sensor",
+	[MC_CMD_SENSOR_PHY_COMMON_TEMP] = "PHY shared temp. sensor",
+	[MC_CMD_SENSOR_CONTROLLER_COOLING] = "Controller cooling",
+	[MC_CMD_SENSOR_PHY0_TEMP] = "PHY 0 temp. sensor",
+	[MC_CMD_SENSOR_PHY0_COOLING] = "PHY 0 cooling",
+	[MC_CMD_SENSOR_PHY1_TEMP] = "PHY 1 temp. sensor",
+	[MC_CMD_SENSOR_PHY1_COOLING] = "PHY 1 cooling",
+	[MC_CMD_SENSOR_IN_1V0] = "1.0V supply sensor",
+	[MC_CMD_SENSOR_IN_1V2] = "1.2V supply sensor",
+	[MC_CMD_SENSOR_IN_1V8] = "1.8V supply sensor",
+	[MC_CMD_SENSOR_IN_2V5] = "2.5V supply sensor",
+	[MC_CMD_SENSOR_IN_3V3] = "3.3V supply sensor",
+	[MC_CMD_SENSOR_IN_12V0] = "12V supply sensor"
+};
+
+static const char *sensor_status_names[] = {
+	[MC_CMD_SENSOR_STATE_OK] = "OK",
+	[MC_CMD_SENSOR_STATE_WARNING] = "Warning",
+	[MC_CMD_SENSOR_STATE_FATAL] = "Fatal",
+	[MC_CMD_SENSOR_STATE_BROKEN] = "Device failure",
+};
+
+static void efx_mcdi_sensor_event(struct efx_nic *efx, efx_qword_t *ev)
+{
+	unsigned int monitor, state, value;
+	const char *name, *state_txt;
+	monitor = EFX_QWORD_FIELD(*ev, MCDI_EVENT_SENSOREVT_MONITOR);
+	state = EFX_QWORD_FIELD(*ev, MCDI_EVENT_SENSOREVT_STATE);
+	value = EFX_QWORD_FIELD(*ev, MCDI_EVENT_SENSOREVT_VALUE);
+	/* Deal gracefully with the board having more drivers than we
+	 * know about, but do not expect new sensor states. */
+	name = (monitor >= ARRAY_SIZE(sensor_names))
+				    ? "No sensor name available" :
+				    sensor_names[monitor];
+	EFX_BUG_ON_PARANOID(state >= ARRAY_SIZE(sensor_status_names));
+	state_txt = sensor_status_names[state];
+
+	EFX_ERR(efx, "Sensor %d (%s) reports condition '%s' for raw value %d\n",
+		monitor, name, state_txt, value);
+}
+
+/* Called from  falcon_process_eventq for MCDI events */
+void efx_mcdi_process_event(struct efx_channel *channel,
+			    efx_qword_t *event)
+{
+	struct efx_nic *efx = channel->efx;
+	int code = EFX_QWORD_FIELD(*event, MCDI_EVENT_CODE);
+	u32 data = EFX_QWORD_FIELD(*event, MCDI_EVENT_DATA);
+
+	switch (code) {
+	case MCDI_EVENT_CODE_BADSSERT:
+		EFX_ERR(efx, "MC watchdog or assertion failure at 0x%x\n", data);
+		efx_mcdi_ev_death(efx, EINTR);
+		break;
+
+	case MCDI_EVENT_CODE_PMNOTICE:
+		EFX_INFO(efx, "MCDI PM event.\n");
+		break;
+
+	case MCDI_EVENT_CODE_CMDDONE:
+		efx_mcdi_ev_cpl(efx,
+				MCDI_EVENT_FIELD(*event, CMDDONE_SEQ),
+				MCDI_EVENT_FIELD(*event, CMDDONE_DATALEN),
+				MCDI_EVENT_FIELD(*event, CMDDONE_ERRNO));
+		break;
+
+	case MCDI_EVENT_CODE_LINKCHANGE:
+		efx_mcdi_process_link_change(efx, event);
+		break;
+	case MCDI_EVENT_CODE_SENSOREVT:
+		efx_mcdi_sensor_event(efx, event);
+		break;
+	case MCDI_EVENT_CODE_SCHEDERR:
+		EFX_INFO(efx, "MC Scheduler error address=0x%x\n", data);
+		break;
+	case MCDI_EVENT_CODE_REBOOT:
+		EFX_INFO(efx, "MC Reboot\n");
+		efx_mcdi_ev_death(efx, EIO);
+		break;
+	case MCDI_EVENT_CODE_MAC_STATS_DMA:
+		/* MAC stats are gather lazily.  We can ignore this. */
+		break;
+
+	default:
+		EFX_ERR(efx, "Unknown MCDI event 0x%x\n", code);
+	}
+}
+
+/**************************************************************************
+ *
+ * Specific request functions
+ *
+ **************************************************************************
+ */
+
+int efx_mcdi_fwver(struct efx_nic *efx, u64 *version, u32 *build)
+{
+	u8 outbuf[ALIGN(MC_CMD_GET_VERSION_V1_OUT_LEN, 4)];
+	size_t outlength;
+	const __le16 *ver_words;
+	int rc;
+
+	BUILD_BUG_ON(MC_CMD_GET_VERSION_IN_LEN != 0);
+
+	rc = efx_mcdi_rpc(efx, MC_CMD_GET_VERSION, NULL, 0,
+			  outbuf, sizeof(outbuf), &outlength);
+	if (rc)
+		goto fail;
+
+	if (outlength == MC_CMD_GET_VERSION_V0_OUT_LEN) {
+		*version = 0;
+		*build = MCDI_DWORD(outbuf, GET_VERSION_OUT_FIRMWARE);
+		return 0;
+	}
+
+	if (outlength < MC_CMD_GET_VERSION_V1_OUT_LEN) {
+		rc = -EMSGSIZE;
+		goto fail;
+	}
+
+	ver_words = (__le16 *)MCDI_PTR(outbuf, GET_VERSION_OUT_VERSION);
+	*version = (((u64)le16_to_cpu(ver_words[0]) << 48) |
+		    ((u64)le16_to_cpu(ver_words[1]) << 32) |
+		    ((u64)le16_to_cpu(ver_words[2]) << 16) |
+		    le16_to_cpu(ver_words[3]));
+	*build = MCDI_DWORD(outbuf, GET_VERSION_OUT_FIRMWARE);
+
+	return 0;
+
+fail:
+	EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
+	return rc;
+}
+
+int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
+			bool *was_attached)
+{
+	u8 inbuf[MC_CMD_DRV_ATTACH_IN_LEN];
+	u8 outbuf[MC_CMD_DRV_ATTACH_OUT_LEN];
+	size_t outlen;
+	int rc;
+
+	MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_NEW_STATE,
+		       driver_operating ? 1 : 0);
+	MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_UPDATE, 1);
+
+	rc = efx_mcdi_rpc(efx, MC_CMD_DRV_ATTACH, inbuf, sizeof(inbuf),
+			  outbuf, sizeof(outbuf), &outlen);
+	if (rc)
+		goto fail;
+	if (outlen < MC_CMD_DRV_ATTACH_OUT_LEN)
+		goto fail;
+
+	if (was_attached != NULL)
+		*was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE);
+	return 0;
+
+fail:
+	EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
+	return rc;
+}
+
+int efx_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address,
+			   u16 *fw_subtype_list)
+{
+	uint8_t outbuf[MC_CMD_GET_BOARD_CFG_OUT_LEN];
+	size_t outlen;
+	int port_num = efx_port_num(efx);
+	int offset;
+	int rc;
+
+	BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_IN_LEN != 0);
+
+	rc = efx_mcdi_rpc(efx, MC_CMD_GET_BOARD_CFG, NULL, 0,
+			  outbuf, sizeof(outbuf), &outlen);
+	if (rc)
+		goto fail;
+
+	if (outlen < MC_CMD_GET_BOARD_CFG_OUT_LEN) {
+		rc = -EMSGSIZE;
+		goto fail;
+	}
+
+	offset = (port_num)
+		? MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1_OFST
+		: MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0_OFST;
+	if (mac_address)
+		memcpy(mac_address, outbuf + offset, ETH_ALEN);
+	if (fw_subtype_list)
+		memcpy(fw_subtype_list,
+		       outbuf + MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_OFST,
+		       MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_LEN);
+
+	return 0;
+
+fail:
+	EFX_ERR(efx, "%s: failed rc=%d len=%d\n", __func__, rc, (int)outlen);
+
+	return rc;
+}
+
+int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart, u32 dest_evq)
+{
+	u8 inbuf[MC_CMD_LOG_CTRL_IN_LEN];
+	u32 dest = 0;
+	int rc;
+
+	if (uart)
+		dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_UART;
+	if (evq)
+		dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ;
+
+	MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST, dest);
+	MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST_EVQ, dest_evq);
+
+	BUILD_BUG_ON(MC_CMD_LOG_CTRL_OUT_LEN != 0);
+
+	rc = efx_mcdi_rpc(efx, MC_CMD_LOG_CTRL, inbuf, sizeof(inbuf),
+			  NULL, 0, NULL);
+	if (rc)
+		goto fail;
+
+	return 0;
+
+fail:
+	EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
+	return rc;
+}
+
+int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out)
+{
+	u8 outbuf[MC_CMD_NVRAM_TYPES_OUT_LEN];
+	size_t outlen;
+	int rc;
+
+	BUILD_BUG_ON(MC_CMD_NVRAM_TYPES_IN_LEN != 0);
+
+	rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TYPES, NULL, 0,
+			  outbuf, sizeof(outbuf), &outlen);
+	if (rc)
+		goto fail;
+	if (outlen < MC_CMD_NVRAM_TYPES_OUT_LEN)
+		goto fail;
+
+	*nvram_types_out = MCDI_DWORD(outbuf, NVRAM_TYPES_OUT_TYPES);
+	return 0;
+
+fail:
+	EFX_ERR(efx, "%s: failed rc=%d\n",
+		__func__, rc);
+	return rc;
+}
+
+int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type,
+			size_t *size_out, size_t *erase_size_out,
+			bool *protected_out)
+{
+	u8 inbuf[MC_CMD_NVRAM_INFO_IN_LEN];
+	u8 outbuf[MC_CMD_NVRAM_INFO_OUT_LEN];
+	size_t outlen;
+	int rc;
+
+	MCDI_SET_DWORD(inbuf, NVRAM_INFO_IN_TYPE, type);
+
+	rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_INFO, inbuf, sizeof(inbuf),
+			  outbuf, sizeof(outbuf), &outlen);
+	if (rc)
+		goto fail;
+	if (outlen < MC_CMD_NVRAM_INFO_OUT_LEN)
+		goto fail;
+
+	*size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE);
+	*erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE);
+	*protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) &
+				(1 << MC_CMD_NVRAM_PROTECTED_LBN));
+	return 0;
+
+fail:
+	EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
+	return rc;
+}
+
+int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type)
+{
+	u8 inbuf[MC_CMD_NVRAM_UPDATE_START_IN_LEN];
+	int rc;
+
+	MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_START_IN_TYPE, type);
+
+	BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_START_OUT_LEN != 0);
+
+	rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_START, inbuf, sizeof(inbuf),
+			  NULL, 0, NULL);
+	if (rc)
+		goto fail;
+
+	return 0;
+
+fail:
+	EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
+	return rc;
+}
+
+int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type,
+			loff_t offset, u8 *buffer, size_t length)
+{
+	u8 inbuf[MC_CMD_NVRAM_READ_IN_LEN];
+	u8 outbuf[MC_CMD_NVRAM_READ_OUT_LEN(EFX_MCDI_NVRAM_LEN_MAX)];
+	size_t outlen;
+	int rc;
+
+	MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_TYPE, type);
+	MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_OFFSET, offset);
+	MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_LENGTH, length);
+
+	rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_READ, inbuf, sizeof(inbuf),
+			  outbuf, sizeof(outbuf), &outlen);
+	if (rc)
+		goto fail;
+
+	memcpy(buffer, MCDI_PTR(outbuf, NVRAM_READ_OUT_READ_BUFFER), length);
+	return 0;
+
+fail:
+	EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
+	return rc;
+}
+
+int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type,
+			   loff_t offset, const u8 *buffer, size_t length)
+{
+	u8 inbuf[MC_CMD_NVRAM_WRITE_IN_LEN(EFX_MCDI_NVRAM_LEN_MAX)];
+	int rc;
+
+	MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type);
+	MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset);
+	MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length);
+	memcpy(MCDI_PTR(inbuf, NVRAM_WRITE_IN_WRITE_BUFFER), buffer, length);
+
+	BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0);
+
+	rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf,
+			  ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4),
+			  NULL, 0, NULL);
+	if (rc)
+		goto fail;
+
+	return 0;
+
+fail:
+	EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
+	return rc;
+}
+
+int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type,
+			 loff_t offset, size_t length)
+{
+	u8 inbuf[MC_CMD_NVRAM_ERASE_IN_LEN];
+	int rc;
+
+	MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_TYPE, type);
+	MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_OFFSET, offset);
+	MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_LENGTH, length);
+
+	BUILD_BUG_ON(MC_CMD_NVRAM_ERASE_OUT_LEN != 0);
+
+	rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_ERASE, inbuf, sizeof(inbuf),
+			  NULL, 0, NULL);
+	if (rc)
+		goto fail;
+
+	return 0;
+
+fail:
+	EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
+	return rc;
+}
+
+int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type)
+{
+	u8 inbuf[MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN];
+	int rc;
+
+	MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type);
+
+	BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_FINISH_OUT_LEN != 0);
+
+	rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf, sizeof(inbuf),
+			  NULL, 0, NULL);
+	if (rc)
+		goto fail;
+
+	return 0;
+
+fail:
+	EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
+	return rc;
+}
+
+int efx_mcdi_handle_assertion(struct efx_nic *efx)
+{
+	union {
+		u8 asserts[MC_CMD_GET_ASSERTS_IN_LEN];
+		u8 reboot[MC_CMD_REBOOT_IN_LEN];
+	} inbuf;
+	u8 assertion[MC_CMD_GET_ASSERTS_OUT_LEN];
+	unsigned int flags, index, ofst;
+	const char *reason;
+	size_t outlen;
+	int retry;
+	int rc;
+
+	/* Check if the MC is in the assertion handler, retrying twice. Once
+	 * because a boot-time assertion might cause this command to fail
+	 * with EINTR. And once again because GET_ASSERTS can race with
+	 * MC_CMD_REBOOT running on the other port. */
+	retry = 2;
+	do {
+		MCDI_SET_DWORD(inbuf.asserts, GET_ASSERTS_IN_CLEAR, 0);
+		rc = efx_mcdi_rpc(efx, MC_CMD_GET_ASSERTS,
+				  inbuf.asserts, MC_CMD_GET_ASSERTS_IN_LEN,
+				  assertion, sizeof(assertion), &outlen);
+	} while ((rc == -EINTR || rc == -EIO) && retry-- > 0);
+
+	if (rc)
+		return rc;
+	if (outlen < MC_CMD_GET_ASSERTS_OUT_LEN)
+		return -EINVAL;
+
+	flags = MCDI_DWORD(assertion, GET_ASSERTS_OUT_GLOBAL_FLAGS);
+	if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS)
+		return 0;
+
+	/* Reset the hardware atomically such that only one port with succeed.
+	 * This command will succeed if a reboot is no longer required (because
+	 * the other port did it first), but fail with EIO if it succeeds.
+	 */
+	BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
+	MCDI_SET_DWORD(inbuf.reboot, REBOOT_IN_FLAGS,
+		       MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION);
+	efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf.reboot, MC_CMD_REBOOT_IN_LEN,
+		     NULL, 0, NULL);
+
+	/* Print out the assertion */
+	reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL)
+		? "system-level assertion"
+		: (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL)
+		? "thread-level assertion"
+		: (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED)
+		? "watchdog reset"
+		: "unknown assertion";
+	EFX_ERR(efx, "MCPU %s at PC = 0x%.8x in thread 0x%.8x\n", reason,
+		MCDI_DWORD(assertion, GET_ASSERTS_OUT_SAVED_PC_OFFS),
+		MCDI_DWORD(assertion, GET_ASSERTS_OUT_THREAD_OFFS));
+
+	/* Print out the registers */
+	ofst = MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_OFST;
+	for (index = 1; index < 32; index++) {
+		EFX_ERR(efx, "R%.2d (?): 0x%.8x\n", index,
+			MCDI_DWORD2(assertion, ofst));
+		ofst += sizeof(efx_dword_t);
+	}
+
+	return 0;
+}
+
+void efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
+{
+	u8 inbuf[MC_CMD_SET_ID_LED_IN_LEN];
+	int rc;
+
+	BUILD_BUG_ON(EFX_LED_OFF != MC_CMD_LED_OFF);
+	BUILD_BUG_ON(EFX_LED_ON != MC_CMD_LED_ON);
+	BUILD_BUG_ON(EFX_LED_DEFAULT != MC_CMD_LED_DEFAULT);
+
+	BUILD_BUG_ON(MC_CMD_SET_ID_LED_OUT_LEN != 0);
+
+	MCDI_SET_DWORD(inbuf, SET_ID_LED_IN_STATE, mode);
+
+	rc = efx_mcdi_rpc(efx, MC_CMD_SET_ID_LED, inbuf, sizeof(inbuf),
+			  NULL, 0, NULL);
+	if (rc)
+		EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
+}
+
+int efx_mcdi_reset_port(struct efx_nic *efx)
+{
+	int rc = efx_mcdi_rpc(efx, MC_CMD_PORT_RESET, NULL, 0, NULL, 0, NULL);
+	if (rc)
+		EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
+	return rc;
+}
+
+int efx_mcdi_reset_mc(struct efx_nic *efx)
+{
+	u8 inbuf[MC_CMD_REBOOT_IN_LEN];
+	int rc;
+
+	BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
+	MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 0);
+	rc = efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, sizeof(inbuf),
+			  NULL, 0, NULL);
+	/* White is black, and up is down */
+	if (rc == -EIO)
+		return 0;
+	if (rc == 0)
+		rc = -EIO;
+	EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
+	return rc;
+}
+
+int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type,
+			    const u8 *mac, int *id_out)
+{
+	u8 inbuf[MC_CMD_WOL_FILTER_SET_IN_LEN];
+	u8 outbuf[MC_CMD_WOL_FILTER_SET_OUT_LEN];
+	size_t outlen;
+	int rc;
+
+	MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_WOL_TYPE, type);
+	MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_FILTER_MODE,
+		       MC_CMD_FILTER_MODE_SIMPLE);
+	memcpy(MCDI_PTR(inbuf, WOL_FILTER_SET_IN_MAGIC_MAC), mac, ETH_ALEN);
+
+	rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_SET, inbuf, sizeof(inbuf),
+			  outbuf, sizeof(outbuf), &outlen);
+	if (rc)
+		goto fail;
+
+	if (outlen < MC_CMD_WOL_FILTER_SET_OUT_LEN) {
+		rc = -EMSGSIZE;
+		goto fail;
+	}
+
+	*id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_SET_OUT_FILTER_ID);
+
+	return 0;
+
+fail:
+	*id_out = -1;
+	EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
+	return rc;
+
+}
+
+
+int
+efx_mcdi_wol_filter_set_magic(struct efx_nic *efx,  const u8 *mac, int *id_out)
+{
+	return efx_mcdi_wol_filter_set(efx, MC_CMD_WOL_TYPE_MAGIC, mac, id_out);
+}
+
+
+int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out)
+{
+	u8 outbuf[MC_CMD_WOL_FILTER_GET_OUT_LEN];
+	size_t outlen;
+	int rc;
+
+	rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_GET, NULL, 0,
+			  outbuf, sizeof(outbuf), &outlen);
+	if (rc)
+		goto fail;
+
+	if (outlen < MC_CMD_WOL_FILTER_GET_OUT_LEN) {
+		rc = -EMSGSIZE;
+		goto fail;
+	}
+
+	*id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_GET_OUT_FILTER_ID);
+
+	return 0;
+
+fail:
+	*id_out = -1;
+	EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
+	return rc;
+}
+
+
+int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id)
+{
+	u8 inbuf[MC_CMD_WOL_FILTER_REMOVE_IN_LEN];
+	int rc;
+
+	MCDI_SET_DWORD(inbuf, WOL_FILTER_REMOVE_IN_FILTER_ID, (u32)id);
+
+	rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_REMOVE, inbuf, sizeof(inbuf),
+			  NULL, 0, NULL);
+	if (rc)
+		goto fail;
+
+	return 0;
+
+fail:
+	EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
+	return rc;
+}
+
+
+int efx_mcdi_wol_filter_reset(struct efx_nic *efx)
+{
+	int rc;
+
+	rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_RESET, NULL, 0, NULL, 0, NULL);
+	if (rc)
+		goto fail;
+
+	return 0;
+
+fail:
+	EFX_ERR(efx, "%s: failed rc=%d\n", __func__, rc);
+	return rc;
+}
+
--- linux-mvl-dove-2.6.32.orig/drivers/net/sfc/net_driver.h
+++ linux-mvl-dove-2.6.32/drivers/net/sfc/net_driver.h
@@ -1,7 +1,7 @@
 /****************************************************************************
  * Driver for Solarflare Solarstorm network controllers and boards
  * Copyright 2005-2006 Fen Systems Ltd.
- * Copyright 2005-2008 Solarflare Communications Inc.
+ * Copyright 2005-2009 Solarflare Communications Inc.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of the GNU General Public License version 2 as published
@@ -38,7 +38,7 @@
 #ifndef EFX_DRIVER_NAME
 #define EFX_DRIVER_NAME	"sfc"
 #endif
-#define EFX_DRIVER_VERSION	"2.3"
+#define EFX_DRIVER_VERSION	"3.0"
 
 #ifdef EFX_ENABLE_DEBUG
 #define EFX_BUG_ON_PARANOID(x) BUG_ON(x)
@@ -113,6 +113,13 @@
 	int entries;
 };
 
+enum efx_flush_state {
+	FLUSH_NONE,
+	FLUSH_PENDING,
+	FLUSH_FAILED,
+	FLUSH_DONE,
+};
+
 /**
  * struct efx_tx_buffer - An Efx TX buffer
  * @skb: The associated socket buffer.
@@ -189,7 +196,7 @@
 	struct efx_nic *nic;
 	struct efx_tx_buffer *buffer;
 	struct efx_special_buffer txd;
-	bool flushed;
+	enum efx_flush_state flushed;
 
 	/* Members used mainly on the completion path */
 	unsigned int read_count ____cacheline_aligned_in_smp;
@@ -284,7 +291,7 @@
 	struct page *buf_page;
 	dma_addr_t buf_dma_addr;
 	char *buf_data;
-	bool flushed;
+	enum efx_flush_state flushed;
 };
 
 /**
@@ -327,7 +334,7 @@
  * @used_flags: Channel is used by net driver
  * @enabled: Channel enabled indicator
  * @irq: IRQ number (MSI and MSI-X only)
- * @irq_moderation: IRQ moderation value (in us)
+ * @irq_moderation: IRQ moderation value (in hardware ticks)
  * @napi_dev: Net device used with NAPI
  * @napi_str: NAPI control structure
  * @reset_work: Scheduled reset work thread
@@ -343,9 +350,9 @@
  * @rx_alloc_push_pages: RX allocation method currently in use for pushing
  *	descriptors
  * @n_rx_tobe_disc: Count of RX_TOBE_DISC errors
- * @n_rx_ip_frag_err: Count of RX IP fragment errors
  * @n_rx_ip_hdr_chksum_err: Count of RX IP header checksum errors
  * @n_rx_tcp_udp_chksum_err: Count of RX TCP and UDP checksum errors
+ * @n_rx_mcast_mismatch: Count of unmatched multicast frames
  * @n_rx_frm_trunc: Count of RX_FRM_TRUNC errors
  * @n_rx_overlength: Count of RX_OVERLENGTH errors
  * @n_skbuff_leaks: Count of skbuffs leaked due to RX overrun
@@ -373,9 +380,9 @@
 	int rx_alloc_push_pages;
 
 	unsigned n_rx_tobe_disc;
-	unsigned n_rx_ip_frag_err;
 	unsigned n_rx_ip_hdr_chksum_err;
 	unsigned n_rx_tcp_udp_chksum_err;
+	unsigned n_rx_mcast_mismatch;
 	unsigned n_rx_frm_trunc;
 	unsigned n_rx_overlength;
 	unsigned n_skbuff_leaks;
@@ -388,53 +395,29 @@
 
 };
 
-/**
- * struct efx_blinker - S/W LED blinking context
- * @state: Current state - on or off
- * @resubmit: Timer resubmission flag
- * @timer: Control timer for blinking
- */
-struct efx_blinker {
-	bool state;
-	bool resubmit;
-	struct timer_list timer;
-};
-
-
-/**
- * struct efx_board - board information
- * @type: Board model type
- * @major: Major rev. ('A', 'B' ...)
- * @minor: Minor rev. (0, 1, ...)
- * @init: Initialisation function
- * @init_leds: Sets up board LEDs. May be called repeatedly.
- * @set_id_led: Turns the identification LED on or off
- * @blink: Starts/stops blinking
- * @monitor: Board-specific health check function
- * @fini: Cleanup function
- * @blinker: used to blink LEDs in software
- * @hwmon_client: I2C client for hardware monitor
- * @ioexp_client: I2C client for power/port control
- */
-struct efx_board {
-	int type;
-	int major;
-	int minor;
-	int (*init) (struct efx_nic *nic);
-	/* As the LEDs are typically attached to the PHY, LEDs
-	 * have a separate init callback that happens later than
-	 * board init. */
-	void (*init_leds)(struct efx_nic *efx);
-	void (*set_id_led) (struct efx_nic *efx, bool state);
-	int (*monitor) (struct efx_nic *nic);
-	void (*blink) (struct efx_nic *efx, bool start);
-	void (*fini) (struct efx_nic *nic);
-	struct efx_blinker blinker;
-	struct i2c_client *hwmon_client, *ioexp_client;
-};
-
-#define STRING_TABLE_LOOKUP(val, member)	\
-	member ## _names[val]
+enum efx_led_mode {
+	EFX_LED_OFF	= 0,
+	EFX_LED_ON	= 1,
+	EFX_LED_DEFAULT	= 2
+};
+
+#define STRING_TABLE_LOOKUP(val, member) \
+	((val) < member ## _max) ? member ## _names[val] : "(invalid)"
+
+extern const char *efx_loopback_mode_names[];
+extern const unsigned int efx_loopback_mode_max;
+#define LOOPBACK_MODE(efx) \
+	STRING_TABLE_LOOKUP((efx)->loopback_mode, efx_loopback_mode)
+
+extern const char *efx_interrupt_mode_names[];
+extern const unsigned int efx_interrupt_mode_max;
+#define INT_MODE(efx) \
+	STRING_TABLE_LOOKUP(efx->interrupt_mode, efx_interrupt_mode)
+
+extern const char *efx_reset_type_names[];
+extern const unsigned int efx_reset_type_max;
+#define RESET_TYPE(type) \
+	STRING_TABLE_LOOKUP(type, efx_reset_type)
 
 enum efx_int_mode {
 	/* Be careful if altering to correct macro below */
@@ -445,20 +428,7 @@
 };
 #define EFX_INT_MODE_USE_MSI(x) (((x)->interrupt_mode) <= EFX_INT_MODE_MSI)
 
-enum phy_type {
-	PHY_TYPE_NONE = 0,
-	PHY_TYPE_TXC43128 = 1,
-	PHY_TYPE_88E1111 = 2,
-	PHY_TYPE_SFX7101 = 3,
-	PHY_TYPE_QT2022C2 = 4,
-	PHY_TYPE_PM8358 = 6,
-	PHY_TYPE_SFT9001A = 8,
-	PHY_TYPE_QT2025C = 9,
-	PHY_TYPE_SFT9001B = 10,
-	PHY_TYPE_MAX	/* Insert any new items before this */
-};
-
-#define EFX_IS10G(efx) ((efx)->link_speed == 10000)
+#define EFX_IS10G(efx) ((efx)->link_state.speed == 10000)
 
 enum nic_state {
 	STATE_INIT = 0,
@@ -500,73 +470,70 @@
 	EFX_FC_AUTO = 4,
 };
 
-/* Supported MAC bit-mask */
-enum efx_mac_type {
-	EFX_GMAC = 1,
-	EFX_XMAC = 2,
+/**
+ * struct efx_link_state - Current state of the link
+ * @up: Link is up
+ * @fd: Link is full-duplex
+ * @fc: Actual flow control flags
+ * @speed: Link speed (Mbps)
+ */
+struct efx_link_state {
+	bool up;
+	bool fd;
+	enum efx_fc_type fc;
+	unsigned int speed;
 };
 
-static inline enum efx_fc_type efx_fc_resolve(enum efx_fc_type wanted_fc,
-					      unsigned int lpa)
+static inline bool efx_link_state_equal(const struct efx_link_state *left,
+					const struct efx_link_state *right)
 {
-	BUILD_BUG_ON(EFX_FC_AUTO & (EFX_FC_RX | EFX_FC_TX));
-
-	if (!(wanted_fc & EFX_FC_AUTO))
-		return wanted_fc;
-
-	return mii_resolve_flowctrl_fdx(mii_advertise_flowctrl(wanted_fc), lpa);
+	return left->up == right->up && left->fd == right->fd &&
+		left->fc == right->fc && left->speed == right->speed;
 }
 
 /**
  * struct efx_mac_operations - Efx MAC operations table
  * @reconfigure: Reconfigure MAC. Serialised by the mac_lock
  * @update_stats: Update statistics
- * @irq: Hardware MAC event callback. Serialised by the mac_lock
- * @poll: Poll for hardware state. Serialised by the mac_lock
+ * @check_fault: Check fault state. True if fault present.
  */
 struct efx_mac_operations {
-	void (*reconfigure) (struct efx_nic *efx);
+	int (*reconfigure) (struct efx_nic *efx);
 	void (*update_stats) (struct efx_nic *efx);
-	void (*irq) (struct efx_nic *efx);
-	void (*poll) (struct efx_nic *efx);
+	bool (*check_fault)(struct efx_nic *efx);
 };
 
 /**
  * struct efx_phy_operations - Efx PHY operations table
+ * @probe: Probe PHY and initialise efx->mdio.mode_support, efx->mdio.mmds,
+ *	efx->loopback_modes.
  * @init: Initialise PHY
  * @fini: Shut down PHY
  * @reconfigure: Reconfigure PHY (e.g. for new link parameters)
- * @clear_interrupt: Clear down interrupt
- * @blink: Blink LEDs
- * @poll: Poll for hardware state. Serialised by the mac_lock.
+ * @poll: Update @link_state and report whether it changed.
+ *	Serialised by the mac_lock.
  * @get_settings: Get ethtool settings. Serialised by the mac_lock.
  * @set_settings: Set ethtool settings. Serialised by the mac_lock.
  * @set_npage_adv: Set abilities advertised in (Extended) Next Page
  *	(only needed where AN bit is set in mmds)
- * @num_tests: Number of PHY-specific tests/results
- * @test_names: Names of the tests/results
+ * @test_name: Get the name of a PHY-specific test/result
  * @run_tests: Run tests and record results as appropriate.
  *	Flags are the ethtool tests flags.
- * @mmds: MMD presence mask
- * @loopbacks: Supported loopback modes mask
  */
 struct efx_phy_operations {
-	enum efx_mac_type macs;
+	int (*probe) (struct efx_nic *efx);
 	int (*init) (struct efx_nic *efx);
 	void (*fini) (struct efx_nic *efx);
-	void (*reconfigure) (struct efx_nic *efx);
-	void (*clear_interrupt) (struct efx_nic *efx);
-	void (*poll) (struct efx_nic *efx);
+	void (*remove) (struct efx_nic *efx);
+	int (*reconfigure) (struct efx_nic *efx);
+	bool (*poll) (struct efx_nic *efx);
 	void (*get_settings) (struct efx_nic *efx,
 			      struct ethtool_cmd *ecmd);
 	int (*set_settings) (struct efx_nic *efx,
 			     struct ethtool_cmd *ecmd);
 	void (*set_npage_adv) (struct efx_nic *efx, u32);
-	u32 num_tests;
-	const char *const *test_names;
+	const char *(*test_name) (struct efx_nic *efx, unsigned int index);
 	int (*run_tests) (struct efx_nic *efx, int *results, unsigned flags);
-	int mmds;
-	unsigned loopbacks;
 };
 
 /**
@@ -690,36 +657,38 @@
  * @interrupt_mode: Interrupt mode
  * @irq_rx_adaptive: Adaptive IRQ moderation enabled for RX event queues
  * @irq_rx_moderation: IRQ moderation time for RX event queues
- * @i2c_adap: I2C adapter
- * @board_info: Board-level information
  * @state: Device state flag. Serialised by the rtnl_lock.
  * @reset_pending: Pending reset method (normally RESET_TYPE_NONE)
  * @tx_queue: TX DMA queues
  * @rx_queue: RX DMA queues
  * @channel: Channels
+ * @next_buffer_table: First available buffer table id
  * @n_rx_queues: Number of RX queues
  * @n_channels: Number of channels in use
  * @rx_buffer_len: RX buffer length
  * @rx_buffer_order: Order (log2) of number of pages for each RX buffer
+ * @int_error_count: Number of internal errors seen recently
+ * @int_error_expire: Time at which error count will be expired
  * @irq_status: Interrupt status buffer
  * @last_irq_cpu: Last CPU to handle interrupt.
  *	This register is written with the SMP processor ID whenever an
  *	interrupt is handled.  It is used by falcon_test_interrupt()
  *	to verify that an interrupt has occurred.
  * @spi_flash: SPI flash device
- *	This field will be %NULL if no flash device is present.
+ *	This field will be %NULL if no flash device is present (or for Siena).
  * @spi_eeprom: SPI EEPROM device
- *	This field will be %NULL if no EEPROM device is present.
+ *	This field will be %NULL if no EEPROM device is present (or for Siena).
  * @spi_lock: SPI bus lock
+ * @mtd_list: List of MTDs attached to the NIC
  * @n_rx_nodesc_drop_cnt: RX no descriptor drop count
  * @nic_data: Hardware dependant state
  * @mac_lock: MAC access lock. Protects @port_enabled, @phy_mode,
  *	@port_inhibited, efx_monitor() and efx_reconfigure_port()
  * @port_enabled: Port enabled indicator.
- *	Serialises efx_stop_all(), efx_start_all(), efx_monitor(),
- *	efx_phy_work(), and efx_mac_work() with kernel interfaces. Safe to read
- *	under any one of the rtnl_lock, mac_lock, or netif_tx_lock, but all
- *	three must be held to modify it.
+ *	Serialises efx_stop_all(), efx_start_all(), efx_monitor() and
+ *	efx_mac_work() with kernel interfaces. Safe to read under any
+ *	one of the rtnl_lock, mac_lock, or netif_tx_lock, but all three must
+ *	be held to modify it.
  * @port_inhibited: If set, the netif_carrier is always off. Hold the mac_lock
  * @port_initialized: Port initialized?
  * @net_dev: Operating system network device. Consider holding the rtnl lock
@@ -731,26 +700,23 @@
  *	&struct net_device_stats.
  * @stats_buffer: DMA buffer for statistics
  * @stats_lock: Statistics update lock. Serialises statistics fetches
- * @stats_disable_count: Nest count for disabling statistics fetches
  * @mac_op: MAC interface
  * @mac_address: Permanent MAC address
  * @phy_type: PHY type
- * @phy_lock: PHY access lock
+ * @mdio_lock: MDIO lock
  * @phy_op: PHY interface
  * @phy_data: PHY private data (including PHY-specific stats)
  * @mdio: PHY MDIO interface
+ * @mdio_bus: PHY MDIO bus ID (only used by Siena)
  * @phy_mode: PHY operating mode. Serialised by @mac_lock.
- * @mac_up: MAC link state
- * @link_up: Link status
- * @link_fd: Link is full duplex
- * @link_fc: Actualy flow control flags
- * @link_speed: Link speed (Mbps)
+ * @xmac_poll_required: XMAC link state needs polling
+ * @link_advertising: Autonegotiation advertising flags
+ * @link_state: Current state of the link
  * @n_link_state_changes: Number of times the link has changed state
  * @promiscuous: Promiscuous flag. Protected by netif_tx_lock.
  * @multicast_hash: Multicast hash table
  * @wanted_fc: Wanted flow control flags
- * @phy_work: work item for dealing with PHY events
- * @mac_work: work item for dealing with MAC events
+ * @mac_work: Work item for changing MAC promiscuity and multicast hash
  * @loopback_mode: Loopback status
  * @loopback_modes: Supported loopback mode bitmask
  * @loopback_selftest: Offline self-test private state
@@ -774,9 +740,6 @@
 	bool irq_rx_adaptive;
 	unsigned int irq_rx_moderation;
 
-	struct i2c_adapter i2c_adap;
-	struct efx_board board_info;
-
 	enum nic_state state;
 	enum reset_type reset_pending;
 
@@ -784,21 +747,29 @@
 	struct efx_rx_queue rx_queue[EFX_MAX_RX_QUEUES];
 	struct efx_channel channel[EFX_MAX_CHANNELS];
 
+	unsigned next_buffer_table;
 	int n_rx_queues;
 	int n_channels;
 	unsigned int rx_buffer_len;
 	unsigned int rx_buffer_order;
 
+	unsigned int_error_count;
+	unsigned long int_error_expire;
+
 	struct efx_buffer irq_status;
 	volatile signed int last_irq_cpu;
+	unsigned long irq_zero_count;
 
 	struct efx_spi_device *spi_flash;
 	struct efx_spi_device *spi_eeprom;
 	struct mutex spi_lock;
+#ifdef CONFIG_SFC_MTD
+	struct list_head mtd_list;
+#endif
 
 	unsigned n_rx_nodesc_drop_cnt;
 
-	struct falcon_nic_data *nic_data;
+	void *nic_data;
 
 	struct mutex mac_lock;
 	struct work_struct mac_work;
@@ -815,24 +786,21 @@
 	struct efx_mac_stats mac_stats;
 	struct efx_buffer stats_buffer;
 	spinlock_t stats_lock;
-	unsigned int stats_disable_count;
 
 	struct efx_mac_operations *mac_op;
 	unsigned char mac_address[ETH_ALEN];
 
-	enum phy_type phy_type;
-	spinlock_t phy_lock;
-	struct work_struct phy_work;
+	unsigned int phy_type;
+	struct mutex mdio_lock;
 	struct efx_phy_operations *phy_op;
 	void *phy_data;
 	struct mdio_if_info mdio;
+	unsigned int mdio_bus;
 	enum efx_phy_mode phy_mode;
 
-	bool mac_up;
-	bool link_up;
-	bool link_fd;
-	enum efx_fc_type link_fc;
-	unsigned int link_speed;
+	bool xmac_poll_required;
+	u32 link_advertising;
+	struct efx_link_state link_state;
 	unsigned int n_link_state_changes;
 
 	bool promiscuous;
@@ -841,7 +809,7 @@
 
 	atomic_t rx_reset;
 	enum efx_loopback_mode loopback_mode;
-	unsigned int loopback_modes;
+	u64 loopback_modes;
 
 	void *loopback_selftest;
 };
@@ -860,50 +828,95 @@
 	return efx_dev_registered(efx) ? efx->name : "";
 }
 
+static inline unsigned int efx_port_num(struct efx_nic *efx)
+{
+	return PCI_FUNC(efx->pci_dev->devfn);
+}
+
 /**
  * struct efx_nic_type - Efx device type definition
- * @mem_bar: Memory BAR number
+ * @probe: Probe the controller
+ * @remove: Free resources allocated by probe()
+ * @init: Initialise the controller
+ * @fini: Shut down the controller
+ * @monitor: Periodic function for polling link state and hardware monitor
+ * @reset: Reset the controller hardware and possibly the PHY.  This will
+ *	be called while the controller is uninitialised.
+ * @probe_port: Probe the MAC and PHY
+ * @remove_port: Free resources allocated by probe_port()
+ * @prepare_flush: Prepare the hardware for flushing the DMA queues
+ * @update_stats: Update statistics not provided by event handling
+ * @start_stats: Start the regular fetching of statistics
+ * @stop_stats: Stop the regular fetching of statistics
+ * @set_id_led: Set state of identifying LED or revert to automatic function
+ * @push_irq_moderation: Apply interrupt moderation value
+ * @push_multicast_hash: Apply multicast hash table
+ * @reconfigure_port: Push loopback/power/txdis changes to the MAC and PHY
+ * @get_wol: Get WoL configuration from driver state
+ * @set_wol: Push WoL configuration to the NIC
+ * @resume_wol: Synchronise WoL state between driver and MC (e.g. after resume)
+ * @test_registers: Test read/write functionality of control registers
+ * @test_nvram: Test validity of NVRAM contents
+ * @default_mac_ops: efx_mac_operations to set at startup
+ * @revision: Hardware architecture revision
  * @mem_map_size: Memory BAR mapped size
  * @txd_ptr_tbl_base: TX descriptor ring base address
  * @rxd_ptr_tbl_base: RX descriptor ring base address
  * @buf_tbl_base: Buffer table base address
  * @evq_ptr_tbl_base: Event queue pointer table base address
  * @evq_rptr_tbl_base: Event queue read-pointer table base address
- * @txd_ring_mask: TX descriptor ring size - 1 (must be a power of two - 1)
- * @rxd_ring_mask: RX descriptor ring size - 1 (must be a power of two - 1)
- * @evq_size: Event queue size (must be a power of two)
  * @max_dma_mask: Maximum possible DMA mask
- * @tx_dma_mask: TX DMA mask
- * @bug5391_mask: Address mask for bug 5391 workaround
- * @rx_xoff_thresh: RX FIFO XOFF watermark (bytes)
- * @rx_xon_thresh: RX FIFO XON watermark (bytes)
  * @rx_buffer_padding: Padding added to each RX buffer
  * @max_interrupt_mode: Highest capability interrupt mode supported
  *	from &enum efx_init_mode.
  * @phys_addr_channels: Number of channels with physically addressed
  *	descriptors
+ * @tx_dc_base: Base address in SRAM of TX queue descriptor caches
+ * @rx_dc_base: Base address in SRAM of RX queue descriptor caches
+ * @offload_features: net_device feature flags for protocol offload
+ *	features implemented in hardware
+ * @reset_world_flags: Flags for additional components covered by
+ *	reset method RESET_TYPE_WORLD
  */
 struct efx_nic_type {
-	unsigned int mem_bar;
+	int (*probe)(struct efx_nic *efx);
+	void (*remove)(struct efx_nic *efx);
+	int (*init)(struct efx_nic *efx);
+	void (*fini)(struct efx_nic *efx);
+	void (*monitor)(struct efx_nic *efx);
+	int (*reset)(struct efx_nic *efx, enum reset_type method);
+	int (*probe_port)(struct efx_nic *efx);
+	void (*remove_port)(struct efx_nic *efx);
+	void (*prepare_flush)(struct efx_nic *efx);
+	void (*update_stats)(struct efx_nic *efx);
+	void (*start_stats)(struct efx_nic *efx);
+	void (*stop_stats)(struct efx_nic *efx);
+	void (*set_id_led)(struct efx_nic *efx, enum efx_led_mode mode);
+	void (*push_irq_moderation)(struct efx_channel *channel);
+	void (*push_multicast_hash)(struct efx_nic *efx);
+	int (*reconfigure_port)(struct efx_nic *efx);
+	void (*get_wol)(struct efx_nic *efx, struct ethtool_wolinfo *wol);
+	int (*set_wol)(struct efx_nic *efx, u32 type);
+	void (*resume_wol)(struct efx_nic *efx);
+	int (*test_registers)(struct efx_nic *efx);
+	int (*test_nvram)(struct efx_nic *efx);
+	struct efx_mac_operations *default_mac_ops;
+
+	int revision;
 	unsigned int mem_map_size;
 	unsigned int txd_ptr_tbl_base;
 	unsigned int rxd_ptr_tbl_base;
 	unsigned int buf_tbl_base;
 	unsigned int evq_ptr_tbl_base;
 	unsigned int evq_rptr_tbl_base;
-
-	unsigned int txd_ring_mask;
-	unsigned int rxd_ring_mask;
-	unsigned int evq_size;
 	u64 max_dma_mask;
-	unsigned int tx_dma_mask;
-	unsigned bug5391_mask;
-
-	int rx_xoff_thresh;
-	int rx_xon_thresh;
 	unsigned int rx_buffer_padding;
 	unsigned int max_interrupt_mode;
 	unsigned int phys_addr_channels;
+	unsigned int tx_dc_base;
+	unsigned int rx_dc_base;
+	unsigned long offload_features;
+	u32 reset_world_flags;
 };
 
 /**************************************************************************
--- linux-mvl-dove-2.6.32.orig/drivers/net/qlge/qlge_mpi.c
+++ linux-mvl-dove-2.6.32/drivers/net/qlge/qlge_mpi.c
@@ -446,6 +446,9 @@
 		ql_aen_lost(qdev, mbcp);
 		break;
 
+	case AEN_DCBX_CHG:
+		/* Need to support AEN 8110 */
+		break;
 	default:
 		QPRINTK(qdev, DRV, ERR,
 			"Unsupported AE %.08x.\n", mbcp->mbox_out[0]);
--- linux-mvl-dove-2.6.32.orig/drivers/net/qlge/qlge_main.c
+++ linux-mvl-dove-2.6.32/drivers/net/qlge/qlge_main.c
@@ -3310,10 +3310,8 @@
 
 	/* Initialize the port and set the max framesize. */
 	status = qdev->nic_ops->port_initialize(qdev);
-       if (status) {
-              QPRINTK(qdev, IFUP, ERR, "Failed to start port.\n");
-              return status;
-       }
+	if (status)
+		QPRINTK(qdev, IFUP, ERR, "Failed to start port.\n");
 
 	/* Set up the MAC address and frame routing filter. */
 	status = ql_cam_route_initialize(qdev);
@@ -3714,9 +3712,6 @@
 	struct sockaddr *addr = p;
 	int status;
 
-	if (netif_running(ndev))
-		return -EBUSY;
-
 	if (!is_valid_ether_addr(addr->sa_data))
 		return -EADDRNOTAVAIL;
 	memcpy(ndev->dev_addr, addr->sa_data, ndev->addr_len);
@@ -3868,8 +3863,7 @@
 				    struct net_device *ndev, int cards_found)
 {
 	struct ql_adapter *qdev = netdev_priv(ndev);
-	int pos, err = 0;
-	u16 val16;
+	int err = 0;
 
 	memset((void *)qdev, 0, sizeof(*qdev));
 	err = pci_enable_device(pdev);
@@ -3881,18 +3875,12 @@
 	qdev->ndev = ndev;
 	qdev->pdev = pdev;
 	pci_set_drvdata(pdev, ndev);
-	pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
-	if (pos <= 0) {
-		dev_err(&pdev->dev, PFX "Cannot find PCI Express capability, "
-			"aborting.\n");
-		return pos;
-	} else {
-		pci_read_config_word(pdev, pos + PCI_EXP_DEVCTL, &val16);
-		val16 &= ~PCI_EXP_DEVCTL_NOSNOOP_EN;
-		val16 |= (PCI_EXP_DEVCTL_CERE |
-			  PCI_EXP_DEVCTL_NFERE |
-			  PCI_EXP_DEVCTL_FERE | PCI_EXP_DEVCTL_URRE);
-		pci_write_config_word(pdev, pos + PCI_EXP_DEVCTL, val16);
+
+	/* Set PCIe read request size */
+	err = pcie_set_readrq(pdev, 4096);
+	if (err) {
+		dev_err(&pdev->dev, "Set readrq failed.\n");
+		goto err_out;
 	}
 
 	err = pci_request_regions(pdev, DRV_NAME);
--- linux-mvl-dove-2.6.32.orig/drivers/net/cxgb3/cxgb3_main.c
+++ linux-mvl-dove-2.6.32/drivers/net/cxgb3/cxgb3_main.c
@@ -44,6 +44,7 @@
 #include <linux/rtnetlink.h>
 #include <linux/firmware.h>
 #include <linux/log2.h>
+#include <linux/stringify.h>
 #include <asm/uaccess.h>
 
 #include "common.h"
@@ -989,11 +990,21 @@
 	return err;
 }
 
-#define FW_FNAME "cxgb3/t3fw-%d.%d.%d.bin"
-#define TPSRAM_NAME "cxgb3/t3%c_psram-%d.%d.%d.bin"
+#define FW_VERSION __stringify(FW_VERSION_MAJOR) "."			\
+	__stringify(FW_VERSION_MINOR) "." __stringify(FW_VERSION_MICRO)
+#define FW_FNAME "cxgb3/t3fw-" FW_VERSION ".bin"
+#define TPSRAM_VERSION __stringify(TP_VERSION_MAJOR) "."		\
+	__stringify(TP_VERSION_MINOR) "." __stringify(TP_VERSION_MICRO)
+#define TPSRAM_NAME "cxgb3/t3%c_psram-" TPSRAM_VERSION ".bin"
 #define AEL2005_OPT_EDC_NAME "cxgb3/ael2005_opt_edc.bin"
 #define AEL2005_TWX_EDC_NAME "cxgb3/ael2005_twx_edc.bin"
 #define AEL2020_TWX_EDC_NAME "cxgb3/ael2020_twx_edc.bin"
+MODULE_FIRMWARE(FW_FNAME);
+MODULE_FIRMWARE("cxgb3/t3b_psram-" TPSRAM_VERSION ".bin");
+MODULE_FIRMWARE("cxgb3/t3c_psram-" TPSRAM_VERSION ".bin");
+MODULE_FIRMWARE(AEL2005_OPT_EDC_NAME);
+MODULE_FIRMWARE(AEL2005_TWX_EDC_NAME);
+MODULE_FIRMWARE(AEL2020_TWX_EDC_NAME);
 
 static inline const char *get_edc_fw_name(int edc_idx)
 {
@@ -1064,16 +1075,13 @@
 static int upgrade_fw(struct adapter *adap)
 {
 	int ret;
-	char buf[64];
 	const struct firmware *fw;
 	struct device *dev = &adap->pdev->dev;
 
-	snprintf(buf, sizeof(buf), FW_FNAME, FW_VERSION_MAJOR,
-		 FW_VERSION_MINOR, FW_VERSION_MICRO);
-	ret = request_firmware(&fw, buf, dev);
+	ret = request_firmware(&fw, FW_FNAME, dev);
 	if (ret < 0) {
 		dev_err(dev, "could not upgrade firmware: unable to load %s\n",
-			buf);
+			FW_FNAME);
 		return ret;
 	}
 	ret = t3_load_fw(adap, fw->data, fw->size);
@@ -1117,8 +1125,7 @@
 	if (!rev)
 		return 0;
 
-	snprintf(buf, sizeof(buf), TPSRAM_NAME, rev,
-		 TP_VERSION_MAJOR, TP_VERSION_MINOR, TP_VERSION_MICRO);
+	snprintf(buf, sizeof(buf), TPSRAM_NAME, rev);
 
 	ret = request_firmware(&tpsram, buf, dev);
 	if (ret < 0) {
@@ -1274,6 +1281,7 @@
 
 	free_irq_resources(adapter);
 	quiesce_rx(adapter);
+	t3_sge_stop(adapter);
 	flush_workqueue(cxgb3_wq);	/* wait for external IRQ handler */
 }
 
@@ -2274,6 +2282,8 @@
 	case CHELSIO_GET_QSET_NUM:{
 		struct ch_reg edata;
 
+		memset(&edata, 0, sizeof(struct ch_reg));
+
 		edata.cmd = CHELSIO_GET_QSET_NUM;
 		edata.val = pi->nqsets;
 		if (copy_to_user(useraddr, &edata, sizeof(edata)))
--- linux-mvl-dove-2.6.32.orig/drivers/net/cxgb3/ael1002.c
+++ linux-mvl-dove-2.6.32/drivers/net/cxgb3/ael1002.c
@@ -934,7 +934,7 @@
 int t3_xaui_direct_phy_prep(struct cphy *phy, struct adapter *adapter,
 			    int phy_addr, const struct mdio_ops *mdio_ops)
 {
-	cphy_init(phy, adapter, MDIO_PRTAD_NONE, &xaui_direct_ops, mdio_ops,
+	cphy_init(phy, adapter, phy_addr, &xaui_direct_ops, mdio_ops,
 		  SUPPORTED_10000baseT_Full | SUPPORTED_AUI | SUPPORTED_TP,
 		  "10GBASE-CX4");
 	return 0;
--- linux-mvl-dove-2.6.32.orig/drivers/net/cxgb3/common.h
+++ linux-mvl-dove-2.6.32/drivers/net/cxgb3/common.h
@@ -125,11 +125,9 @@
 	IRQ_NUM_STATS		/* keep last */
 };
 
-enum {
-	TP_VERSION_MAJOR	= 1,
-	TP_VERSION_MINOR	= 1,
-	TP_VERSION_MICRO	= 0
-};
+#define TP_VERSION_MAJOR	1
+#define TP_VERSION_MINOR	1
+#define TP_VERSION_MICRO	0
 
 #define S_TP_VERSION_MAJOR		16
 #define M_TP_VERSION_MAJOR		0xFF
--- linux-mvl-dove-2.6.32.orig/drivers/net/hamradio/6pack.c
+++ linux-mvl-dove-2.6.32/drivers/net/hamradio/6pack.c
@@ -690,10 +690,10 @@
 {
 	struct sixpack *sp;
 
-	write_lock(&disc_data_lock);
+	write_lock_bh(&disc_data_lock);
 	sp = tty->disc_data;
 	tty->disc_data = NULL;
-	write_unlock(&disc_data_lock);
+	write_unlock_bh(&disc_data_lock);
 	if (!sp)
 		return;
 
--- linux-mvl-dove-2.6.32.orig/drivers/net/hamradio/mkiss.c
+++ linux-mvl-dove-2.6.32/drivers/net/hamradio/mkiss.c
@@ -811,10 +811,10 @@
 {
 	struct mkiss *ax;
 
-	write_lock(&disc_data_lock);
+	write_lock_bh(&disc_data_lock);
 	ax = tty->disc_data;
 	tty->disc_data = NULL;
-	write_unlock(&disc_data_lock);
+	write_unlock_bh(&disc_data_lock);
 
 	if (!ax)
 		return;
--- linux-mvl-dove-2.6.32.orig/drivers/net/atl1c/atl1c_main.c
+++ linux-mvl-dove-2.6.32/drivers/net/atl1c/atl1c_main.c
@@ -198,27 +198,12 @@
 
 void atl1c_reinit_locked(struct atl1c_adapter *adapter)
 {
-
 	WARN_ON(in_interrupt());
 	atl1c_down(adapter);
 	atl1c_up(adapter);
 	clear_bit(__AT_RESETTING, &adapter->flags);
 }
 
-static void atl1c_reset_task(struct work_struct *work)
-{
-	struct atl1c_adapter *adapter;
-	struct net_device *netdev;
-
-	adapter = container_of(work, struct atl1c_adapter, reset_task);
-	netdev = adapter->netdev;
-
-	netif_device_detach(netdev);
-	atl1c_down(adapter);
-	atl1c_up(adapter);
-	netif_device_attach(netdev);
-}
-
 static void atl1c_check_link_status(struct atl1c_adapter *adapter)
 {
 	struct atl1c_hw *hw = &adapter->hw;
@@ -275,18 +260,6 @@
 	}
 }
 
-/*
- * atl1c_link_chg_task - deal with link change event Out of interrupt context
- * @netdev: network interface device structure
- */
-static void atl1c_link_chg_task(struct work_struct *work)
-{
-	struct atl1c_adapter *adapter;
-
-	adapter = container_of(work, struct atl1c_adapter, link_chg_task);
-	atl1c_check_link_status(adapter);
-}
-
 static void atl1c_link_chg_event(struct atl1c_adapter *adapter)
 {
 	struct net_device *netdev = adapter->netdev;
@@ -311,20 +284,40 @@
 			adapter->link_speed = SPEED_0;
 		}
 	}
-	schedule_work(&adapter->link_chg_task);
+
+	adapter->work_event |= ATL1C_WORK_EVENT_LINK_CHANGE;
+	schedule_work(&adapter->common_task);
 }
 
-static void atl1c_del_timer(struct atl1c_adapter *adapter)
+static void atl1c_common_task(struct work_struct *work)
 {
-	del_timer_sync(&adapter->phy_config_timer);
+	struct atl1c_adapter *adapter;
+	struct net_device *netdev;
+
+	adapter = container_of(work, struct atl1c_adapter, common_task);
+	netdev = adapter->netdev;
+
+	if (adapter->work_event & ATL1C_WORK_EVENT_RESET) {
+		netif_device_detach(netdev);
+		atl1c_down(adapter);
+		atl1c_up(adapter);
+		netif_device_attach(netdev);
+		return;
+	}
+
+	if (adapter->work_event & ATL1C_WORK_EVENT_LINK_CHANGE)
+		atl1c_check_link_status(adapter);
+
+	return;
 }
 
-static void atl1c_cancel_work(struct atl1c_adapter *adapter)
+
+static void atl1c_del_timer(struct atl1c_adapter *adapter)
 {
-	cancel_work_sync(&adapter->reset_task);
-	cancel_work_sync(&adapter->link_chg_task);
+	del_timer_sync(&adapter->phy_config_timer);
 }
 
+
 /*
  * atl1c_tx_timeout - Respond to a Tx Hang
  * @netdev: network interface device structure
@@ -334,7 +327,8 @@
 	struct atl1c_adapter *adapter = netdev_priv(netdev);
 
 	/* Do the reset outside of interrupt context */
-	schedule_work(&adapter->reset_task);
+	adapter->work_event |= ATL1C_WORK_EVENT_RESET;
+	schedule_work(&adapter->common_task);
 }
 
 /*
@@ -1536,7 +1530,8 @@
 			/* reset MAC */
 			hw->intr_mask &= ~ISR_ERROR;
 			AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
-			schedule_work(&adapter->reset_task);
+			adapter->work_event |= ATL1C_WORK_EVENT_RESET;
+			schedule_work(&adapter->common_task);
 			break;
 		}
 
@@ -1981,8 +1976,6 @@
 		else {
 			use_tpd = atl1c_get_tpd(adapter, type);
 			memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
-			use_tpd = atl1c_get_tpd(adapter, type);
-			memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
 		}
 		buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
 		buffer_info->length = buf_len - mapped_len;
@@ -2200,8 +2193,7 @@
 	struct net_device *netdev = adapter->netdev;
 
 	atl1c_del_timer(adapter);
-	atl1c_cancel_work(adapter);
-
+	adapter->work_event = 0; /* clear all event */
 	/* signal that we're down so the interrupt handler does not
 	 * reschedule our watchdog timer */
 	set_bit(__AT_DOWN, &adapter->flags);
@@ -2601,8 +2593,8 @@
 			adapter->hw.mac_addr[4], adapter->hw.mac_addr[5]);
 
 	atl1c_hw_set_mac_addr(&adapter->hw);
-	INIT_WORK(&adapter->reset_task, atl1c_reset_task);
-	INIT_WORK(&adapter->link_chg_task, atl1c_link_chg_task);
+	INIT_WORK(&adapter->common_task, atl1c_common_task);
+	adapter->work_event = 0;
 	err = register_netdev(netdev);
 	if (err) {
 		dev_err(&pdev->dev, "register netdevice failed\n");
--- linux-mvl-dove-2.6.32.orig/drivers/net/atl1c/atl1c.h
+++ linux-mvl-dove-2.6.32/drivers/net/atl1c/atl1c.h
@@ -534,6 +534,9 @@
 #define __AT_TESTING        0x0001
 #define __AT_RESETTING      0x0002
 #define __AT_DOWN           0x0003
+	u8 work_event;
+#define ATL1C_WORK_EVENT_RESET 		0x01
+#define ATL1C_WORK_EVENT_LINK_CHANGE	0x02
 	u32 msg_enable;
 
 	bool have_msi;
@@ -545,8 +548,7 @@
 	spinlock_t tx_lock;
 	atomic_t irq_sem;
 
-	struct work_struct reset_task;
-	struct work_struct link_chg_task;
+	struct work_struct common_task;
 	struct timer_list watchdog_timer;
 	struct timer_list phy_config_timer;
 
--- linux-mvl-dove-2.6.32.orig/drivers/net/ixgbe/ixgbe_82599.c
+++ linux-mvl-dove-2.6.32/drivers/net/ixgbe/ixgbe_82599.c
@@ -332,11 +332,13 @@
 	case IXGBE_DEV_ID_82599_KX4:
 	case IXGBE_DEV_ID_82599_KX4_MEZZ:
 	case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
+	case IXGBE_DEV_ID_82599_KR:
 	case IXGBE_DEV_ID_82599_XAUI_LOM:
 		/* Default device ID is mezzanine card KX/KX4 */
 		media_type = ixgbe_media_type_backplane;
 		break;
 	case IXGBE_DEV_ID_82599_SFP:
+	case IXGBE_DEV_ID_82599_SFP_EM:
 		media_type = ixgbe_media_type_fiber;
 		break;
 	case IXGBE_DEV_ID_82599_CX4:
--- linux-mvl-dove-2.6.32.orig/drivers/net/ixgbe/ixgbe_type.h
+++ linux-mvl-dove-2.6.32/drivers/net/ixgbe/ixgbe_type.h
@@ -50,8 +50,10 @@
 #define IXGBE_DEV_ID_82598EB_XF_LR       0x10F4
 #define IXGBE_DEV_ID_82599_KX4           0x10F7
 #define IXGBE_DEV_ID_82599_KX4_MEZZ      0x1514
+#define IXGBE_DEV_ID_82599_KR            0x1517
 #define IXGBE_DEV_ID_82599_CX4           0x10F9
 #define IXGBE_DEV_ID_82599_SFP           0x10FB
+#define IXGBE_DEV_ID_82599_SFP_EM        0x1507
 #define IXGBE_DEV_ID_82599_XAUI_LOM      0x10FC
 #define IXGBE_DEV_ID_82599_COMBO_BACKPLANE 0x10F8
 
--- linux-mvl-dove-2.6.32.orig/drivers/net/ixgbe/ixgbe_main.c
+++ linux-mvl-dove-2.6.32/drivers/net/ixgbe/ixgbe_main.c
@@ -96,8 +96,12 @@
 	 board_82599 },
 	{PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM),
 	 board_82599 },
+	{PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR),
+	 board_82599 },
 	{PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP),
 	 board_82599 },
+	{PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM),
+	 board_82599 },
 	{PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ),
 	 board_82599 },
 	{PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4),
@@ -789,6 +793,7 @@
 			break;
 		(*work_done)++;
 
+		rmb(); /* read descriptor and rx_buffer_info after status DD */
 		if (rx_ring->flags & IXGBE_RING_RX_PS_ENABLED) {
 			hdr_info = le16_to_cpu(ixgbe_get_hdr_info(rx_desc));
 			len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
@@ -2129,6 +2134,10 @@
 	/* Decide whether to use packet split mode or not */
 	adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
 
+	/* Disable packet split due to 82599 erratum #45 */
+	if (hw->mac.type == ixgbe_mac_82599EB)
+		adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
+
 	/* Set the RX buffer length according to the mode */
 	if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
 		rx_buf_len = IXGBE_RX_HDR_SIZE;
@@ -5239,9 +5248,13 @@
 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb)
 {
 	struct ixgbe_adapter *adapter = netdev_priv(dev);
+	int txq = smp_processor_id();
 
-	if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE)
-		return smp_processor_id();
+	if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
+		while (unlikely(txq >= dev->real_num_tx_queues))
+			txq -= dev->real_num_tx_queues;
+		return txq;
+	}
 
 	if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
 		return (skb->vlan_tci & IXGBE_TX_FLAGS_VLAN_PRIO_MASK) >> 13;
--- linux-mvl-dove-2.6.32.orig/drivers/net/atlx/atl1.c
+++ linux-mvl-dove-2.6.32/drivers/net/atlx/atl1.c
@@ -2856,10 +2856,11 @@
 	pci_enable_wake(pdev, PCI_D3cold, 0);
 
 	atl1_reset_hw(&adapter->hw);
-	adapter->cmb.cmb->int_stats = 0;
 
-	if (netif_running(netdev))
+	if (netif_running(netdev)) {
+		adapter->cmb.cmb->int_stats = 0;
 		atl1_up(adapter);
+	}
 	netif_device_attach(netdev);
 
 	return 0;
--- linux-mvl-dove-2.6.32.orig/drivers/net/tokenring/tms380tr.c
+++ linux-mvl-dove-2.6.32/drivers/net/tokenring/tms380tr.c
@@ -1364,6 +1364,8 @@
 	return (-1);
 }
 
+MODULE_FIRMWARE("tms380tr.bin");
+
 /*
  * Starts bring up diagnostics of token ring adapter and evaluates
  * diagnostic results.
--- linux-mvl-dove-2.6.32.orig/drivers/net/myri10ge/myri10ge.c
+++ linux-mvl-dove-2.6.32/drivers/net/myri10ge/myri10ge.c
@@ -264,6 +264,10 @@
 static char *myri10ge_fw_aligned = "myri10ge_eth_z8e.dat";
 static char *myri10ge_fw_rss_unaligned = "myri10ge_rss_ethp_z8e.dat";
 static char *myri10ge_fw_rss_aligned = "myri10ge_rss_eth_z8e.dat";
+MODULE_FIRMWARE("myri10ge_ethp_z8e.dat");
+MODULE_FIRMWARE("myri10ge_eth_z8e.dat");
+MODULE_FIRMWARE("myri10ge_rss_ethp_z8e.dat");
+MODULE_FIRMWARE("myri10ge_rss_eth_z8e.dat");
 
 static char *myri10ge_fw_name = NULL;
 module_param(myri10ge_fw_name, charp, S_IRUGO | S_IWUSR);
@@ -3640,6 +3644,7 @@
 			dma_free_coherent(&pdev->dev, bytes,
 					  ss->fw_stats, ss->fw_stats_bus);
 			ss->fw_stats = NULL;
+			netif_napi_del(&ss->napi);
 		}
 	}
 	kfree(mgp->ss);
--- linux-mvl-dove-2.6.32.orig/drivers/net/pcmcia/pcnet_cs.c
+++ linux-mvl-dove-2.6.32/drivers/net/pcmcia/pcnet_cs.c
@@ -1768,6 +1768,13 @@
 	PCMCIA_DEVICE_NULL
 };
 MODULE_DEVICE_TABLE(pcmcia, pcnet_ids);
+MODULE_FIRMWARE("cis/PCMLM28.cis");
+MODULE_FIRMWARE("cis/DP83903.cis");
+MODULE_FIRMWARE("cis/LA-PCM.cis");
+MODULE_FIRMWARE("PE520.cis");
+MODULE_FIRMWARE("cis/NE2K.cis");
+MODULE_FIRMWARE("cis/PE-200.cis");
+MODULE_FIRMWARE("cis/tamarack.cis");
 
 static struct pcmcia_driver pcnet_driver = {
 	.drv		= {
--- linux-mvl-dove-2.6.32.orig/drivers/net/mlx4/icm.c
+++ linux-mvl-dove-2.6.32/drivers/net/mlx4/icm.c
@@ -174,9 +174,10 @@
 
 				if (chunk->nsg <= 0)
 					goto fail;
+			}
 
+			if (chunk->npages == MLX4_ICM_CHUNK_LEN)
 				chunk = NULL;
-			}
 
 			npages -= 1 << cur_order;
 		} else {
--- linux-mvl-dove-2.6.32.orig/drivers/net/e1000/e1000_main.c
+++ linux-mvl-dove-2.6.32/drivers/net/e1000/e1000_main.c
@@ -790,6 +790,70 @@
 };
 
 /**
+ * e1000_init_hw_struct - initialize members of hw struct
+ * @adapter: board private struct
+ * @hw: structure used by e1000_hw.c
+ *
+ * Factors out initialization of the e1000_hw struct to its own function
+ * that can be called very early at init (just after struct allocation).
+ * Fields are initialized based on PCI device information and
+ * OS network device settings (MTU size).
+ * Returns negative error codes if MAC type setup fails.
+ */
+static int e1000_init_hw_struct(struct e1000_adapter *adapter,
+				struct e1000_hw *hw)
+{
+	struct pci_dev *pdev = adapter->pdev;
+
+	/* PCI config space info */
+	hw->vendor_id = pdev->vendor;
+	hw->device_id = pdev->device;
+	hw->subsystem_vendor_id = pdev->subsystem_vendor;
+	hw->subsystem_id = pdev->subsystem_device;
+	hw->revision_id = pdev->revision;
+
+	pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
+
+	hw->max_frame_size = adapter->netdev->mtu +
+			     ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
+	hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
+
+	/* identify the MAC */
+	if (e1000_set_mac_type(hw)) {
+		DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
+		return -EIO;
+	}
+
+	switch (hw->mac_type) {
+	default:
+		break;
+	case e1000_82541:
+	case e1000_82547:
+	case e1000_82541_rev_2:
+	case e1000_82547_rev_2:
+		hw->phy_init_script = 1;
+		break;
+	}
+
+	e1000_set_media_type(hw);
+	e1000_get_bus_info(hw);
+
+	hw->wait_autoneg_complete = false;
+	hw->tbi_compatibility_en = true;
+	hw->adaptive_ifs = true;
+
+	/* Copper options */
+
+	if (hw->media_type == e1000_media_type_copper) {
+		hw->mdix = AUTO_ALL_MODES;
+		hw->disable_polarity_correction = false;
+		hw->master_slave = E1000_MASTER_SLAVE;
+	}
+
+	return 0;
+}
+
+/**
  * e1000_probe - Device Initialization Routine
  * @pdev: PCI device information struct
  * @ent: entry in e1000_pci_tbl
@@ -826,22 +890,6 @@
 	if (err)
 		return err;
 
-	if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) &&
-	    !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
-		pci_using_dac = 1;
-	} else {
-		err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
-		if (err) {
-			err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
-			if (err) {
-				E1000_ERR("No usable DMA configuration, "
-					  "aborting\n");
-				goto err_dma;
-			}
-		}
-		pci_using_dac = 0;
-	}
-
 	err = pci_request_selected_regions(pdev, bars, e1000_driver_name);
 	if (err)
 		goto err_pci_reg;
@@ -882,6 +930,32 @@
 		}
 	}
 
+	/* make ready for any if (hw->...) below */
+	err = e1000_init_hw_struct(adapter, hw);
+	if (err)
+		goto err_sw_init;
+
+	/*
+	 * there is a workaround being applied below that limits
+	 * 64-bit DMA addresses to 64-bit hardware.  There are some
+	 * 32-bit adapters that Tx hang when given 64-bit DMA addresses
+	 */
+	pci_using_dac = 0;
+	if ((hw->bus_type == e1000_bus_type_pcix) &&
+	    !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
+		/*
+		 * according to DMA-API-HOWTO, coherent calls will always
+		 * succeed if the set call did
+		 */
+		pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
+		pci_using_dac = 1;
+	} else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
+		pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
+	} else {
+		E1000_ERR("No usable DMA configuration, aborting\n");
+		goto err_dma;
+	}
+
 	netdev->netdev_ops = &e1000_netdev_ops;
 	e1000_set_ethtool_ops(netdev);
 	netdev->watchdog_timeo = 5 * HZ;
@@ -956,8 +1030,6 @@
 	if (!is_valid_ether_addr(netdev->perm_addr))
 		DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
 
-	e1000_get_bus_info(hw);
-
 	init_timer(&adapter->tx_fifo_stall_timer);
 	adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
 	adapter->tx_fifo_stall_timer.data = (unsigned long)adapter;
@@ -1070,6 +1142,7 @@
 		iounmap(hw->flash_address);
 	kfree(adapter->tx_ring);
 	kfree(adapter->rx_ring);
+err_dma:
 err_sw_init:
 	iounmap(hw->hw_addr);
 err_ioremap:
@@ -1077,7 +1150,6 @@
 err_alloc_etherdev:
 	pci_release_selected_regions(pdev, bars);
 err_pci_reg:
-err_dma:
 	pci_disable_device(pdev);
 	return err;
 }
@@ -1129,62 +1201,12 @@
  * @adapter: board private structure to initialize
  *
  * e1000_sw_init initializes the Adapter private data structure.
- * Fields are initialized based on PCI device information and
- * OS network device settings (MTU size).
+ * e1000_init_hw_struct MUST be called before this function
  **/
 
 static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
 {
-	struct e1000_hw *hw = &adapter->hw;
-	struct net_device *netdev = adapter->netdev;
-	struct pci_dev *pdev = adapter->pdev;
-
-	/* PCI config space info */
-
-	hw->vendor_id = pdev->vendor;
-	hw->device_id = pdev->device;
-	hw->subsystem_vendor_id = pdev->subsystem_vendor;
-	hw->subsystem_id = pdev->subsystem_device;
-	hw->revision_id = pdev->revision;
-
-	pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
-
 	adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
-	hw->max_frame_size = netdev->mtu +
-			     ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
-	hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
-
-	/* identify the MAC */
-
-	if (e1000_set_mac_type(hw)) {
-		DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
-		return -EIO;
-	}
-
-	switch (hw->mac_type) {
-	default:
-		break;
-	case e1000_82541:
-	case e1000_82547:
-	case e1000_82541_rev_2:
-	case e1000_82547_rev_2:
-		hw->phy_init_script = 1;
-		break;
-	}
-
-	e1000_set_media_type(hw);
-
-	hw->wait_autoneg_complete = false;
-	hw->tbi_compatibility_en = true;
-	hw->adaptive_ifs = true;
-
-	/* Copper options */
-
-	if (hw->media_type == e1000_media_type_copper) {
-		hw->mdix = AUTO_ALL_MODES;
-		hw->disable_polarity_correction = false;
-		hw->master_slave = E1000_MASTER_SLAVE;
-	}
 
 	adapter->num_tx_queues = 1;
 	adapter->num_rx_queues = 1;
@@ -1698,18 +1720,6 @@
 	rctl &= ~E1000_RCTL_SZ_4096;
 	rctl |= E1000_RCTL_BSEX;
 	switch (adapter->rx_buffer_len) {
-		case E1000_RXBUFFER_256:
-			rctl |= E1000_RCTL_SZ_256;
-			rctl &= ~E1000_RCTL_BSEX;
-			break;
-		case E1000_RXBUFFER_512:
-			rctl |= E1000_RCTL_SZ_512;
-			rctl &= ~E1000_RCTL_BSEX;
-			break;
-		case E1000_RXBUFFER_1024:
-			rctl |= E1000_RCTL_SZ_1024;
-			rctl &= ~E1000_RCTL_BSEX;
-			break;
 		case E1000_RXBUFFER_2048:
 		default:
 			rctl |= E1000_RCTL_SZ_2048;
@@ -3154,13 +3164,7 @@
 	 *  however with the new *_jumbo_rx* routines, jumbo receives will use
 	 *  fragmented skbs */
 
-	if (max_frame <= E1000_RXBUFFER_256)
-		adapter->rx_buffer_len = E1000_RXBUFFER_256;
-	else if (max_frame <= E1000_RXBUFFER_512)
-		adapter->rx_buffer_len = E1000_RXBUFFER_512;
-	else if (max_frame <= E1000_RXBUFFER_1024)
-		adapter->rx_buffer_len = E1000_RXBUFFER_1024;
-	else if (max_frame <= E1000_RXBUFFER_2048)
+	if (max_frame <= E1000_RXBUFFER_2048)
 		adapter->rx_buffer_len = E1000_RXBUFFER_2048;
 	else
 #if (PAGE_SIZE >= E1000_RXBUFFER_16384)
@@ -3827,13 +3831,22 @@
 
 		length = le16_to_cpu(rx_desc->length);
 		/* !EOP means multiple descriptors were used to store a single
-		 * packet, also make sure the frame isn't just CRC only */
-		if (unlikely(!(status & E1000_RXD_STAT_EOP) || (length <= 4))) {
+		 * packet, if thats the case we need to toss it.  In fact, we
+		 * to toss every packet with the EOP bit clear and the next
+		 * frame that _does_ have the EOP bit set, as it is by
+		 * definition only a frame fragment
+		 */
+		if (unlikely(!(status & E1000_RXD_STAT_EOP)))
+			adapter->discarding = true;
+
+		if (adapter->discarding) {
 			/* All receives must fit into a single buffer */
 			E1000_DBG("%s: Receive packet consumed multiple"
 				  " buffers\n", netdev->name);
 			/* recycle */
 			buffer_info->skb = skb;
+			if (status & E1000_RXD_STAT_EOP)
+				adapter->discarding = false;
 			goto next_desc;
 		}
 
--- linux-mvl-dove-2.6.32.orig/drivers/net/e1000/e1000.h
+++ linux-mvl-dove-2.6.32/drivers/net/e1000/e1000.h
@@ -326,6 +326,8 @@
 	/* for ioport free */
 	int bars;
 	int need_ioport;
+
+	bool discarding;
 };
 
 enum e1000_state_t {
--- linux-mvl-dove-2.6.32.orig/drivers/net/ehea/ehea_ethtool.c
+++ linux-mvl-dove-2.6.32/drivers/net/ehea/ehea_ethtool.c
@@ -53,15 +53,20 @@
 		cmd->duplex = -1;
 	}
 
-	cmd->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_1000baseT_Full
-		       | SUPPORTED_100baseT_Full |  SUPPORTED_100baseT_Half
-		       | SUPPORTED_10baseT_Full | SUPPORTED_10baseT_Half
-		       | SUPPORTED_Autoneg | SUPPORTED_FIBRE);
-
-	cmd->advertising = (ADVERTISED_10000baseT_Full | ADVERTISED_Autoneg
-			 | ADVERTISED_FIBRE);
+	if (cmd->speed == SPEED_10000) {
+		cmd->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
+		cmd->advertising = (ADVERTISED_10000baseT_Full | ADVERTISED_FIBRE);
+		cmd->port = PORT_FIBRE;
+	} else {
+		cmd->supported = (SUPPORTED_1000baseT_Full | SUPPORTED_100baseT_Full
+			       | SUPPORTED_100baseT_Half | SUPPORTED_10baseT_Full
+			       | SUPPORTED_10baseT_Half | SUPPORTED_Autoneg
+			       | SUPPORTED_TP);
+		cmd->advertising = (ADVERTISED_1000baseT_Full | ADVERTISED_Autoneg
+				 | ADVERTISED_TP);
+		cmd->port = PORT_TP;
+	}
 
-	cmd->port = PORT_FIBRE;
 	cmd->autoneg = port->autoneg == 1 ? AUTONEG_ENABLE : AUTONEG_DISABLE;
 
 	return 0;
--- linux-mvl-dove-2.6.32.orig/drivers/net/netxen/netxen_nic_main.c
+++ linux-mvl-dove-2.6.32/drivers/net/netxen/netxen_nic_main.c
@@ -38,6 +38,9 @@
 MODULE_DESCRIPTION("NetXen Multi port (1/10) Gigabit Network Driver");
 MODULE_LICENSE("GPL");
 MODULE_VERSION(NETXEN_NIC_LINUX_VERSIONID);
+MODULE_FIRMWARE(NX_P2_MN_ROMIMAGE_NAME);
+MODULE_FIRMWARE(NX_P3_CT_ROMIMAGE_NAME);
+MODULE_FIRMWARE(NX_P3_MN_ROMIMAGE_NAME);
 
 char netxen_nic_driver_name[] = "netxen_nic";
 static char netxen_nic_driver_string[] = "NetXen Network Driver version "
--- linux-mvl-dove-2.6.32.orig/drivers/net/netxen/netxen_nic_hw.c
+++ linux-mvl-dove-2.6.32/drivers/net/netxen/netxen_nic_hw.c
@@ -685,6 +685,9 @@
 	struct list_head *head;
 	nx_mac_list_t *cur;
 
+	if (adapter->is_up != NETXEN_ADAPTER_UP_MAGIC)
+		return;
+
 	list_splice_tail_init(&adapter->mac_list, &del_list);
 
 	nx_p3_nic_add_mac(adapter, adapter->mac_addr, &del_list);
--- linux-mvl-dove-2.6.32.orig/drivers/net/netxen/netxen_nic.h
+++ linux-mvl-dove-2.6.32/drivers/net/netxen/netxen_nic.h
@@ -487,6 +487,11 @@
 #define NX_P3_MN_ROMIMAGE	2
 #define NX_FLASH_ROMIMAGE	3
 
+#define NX_P2_MN_ROMIMAGE_NAME		"nxromimg.bin"
+#define NX_P3_CT_ROMIMAGE_NAME		"nx3fwct.bin"
+#define NX_P3_MN_ROMIMAGE_NAME		"nx3fwmn.bin"
+#define NX_FLASH_ROMIMAGE_NAME		"flash"
+
 extern char netxen_nic_driver_name[];
 
 /* Number of status descriptors to handle per interrupt */
--- linux-mvl-dove-2.6.32.orig/drivers/net/netxen/netxen_nic_init.c
+++ linux-mvl-dove-2.6.32/drivers/net/netxen/netxen_nic_init.c
@@ -673,7 +673,10 @@
 }
 
 static char *fw_name[] = {
-	"nxromimg.bin", "nx3fwct.bin", "nx3fwmn.bin", "flash",
+	NX_P2_MN_ROMIMAGE_NAME,
+	NX_P3_CT_ROMIMAGE_NAME,
+	NX_P3_MN_ROMIMAGE_NAME,
+	NX_FLASH_ROMIMAGE_NAME,
 };
 
 int
@@ -1199,7 +1202,6 @@
 	if (pkt_offset)
 		skb_pull(skb, pkt_offset);
 
-	skb->truesize = skb->len + sizeof(struct sk_buff);
 	skb->protocol = eth_type_trans(skb, netdev);
 
 	napi_gro_receive(&sds_ring->napi, skb);
@@ -1261,8 +1263,6 @@
 
 	skb_put(skb, lro_length + data_offset);
 
-	skb->truesize = skb->len + sizeof(struct sk_buff) + skb_headroom(skb);
-
 	skb_pull(skb, l2_hdr_offset);
 	skb->protocol = eth_type_trans(skb, netdev);
 
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/rndis_wlan.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/rndis_wlan.c
@@ -83,11 +83,11 @@
 	"set roaming tendency: 0=aggressive, 1=moderate, "
 				"2=conservative (default: moderate)");
 
-static int modparam_workaround_interval = 500;
+static int modparam_workaround_interval;
 module_param_named(workaround_interval, modparam_workaround_interval,
 							int, 0444);
 MODULE_PARM_DESC(workaround_interval,
-	"set stall workaround interval in msecs (default: 500)");
+	"set stall workaround interval in msecs (0=disabled) (default: 0)");
 
 
 /* various RNDIS OID defs */
@@ -733,12 +733,13 @@
 			le32_to_cpu(u.get_c->status));
 
 	if (ret == 0) {
+		memcpy(data, u.buf + le32_to_cpu(u.get_c->offset) + 8, *len);
+
 		ret = le32_to_cpu(u.get_c->len);
 		if (ret > *len)
 			*len = ret;
-		memcpy(data, u.buf + le32_to_cpu(u.get_c->offset) + 8, *len);
-		ret = rndis_error_status(u.get_c->status);
 
+		ret = rndis_error_status(u.get_c->status);
 		if (ret < 0)
 			devdbg(dev, "rndis_query_oid(%s): device returned "
 				"error,  0x%08x (%d)", oid_to_string(oid),
@@ -1072,6 +1073,8 @@
 		auth_mode = NDIS_80211_AUTH_SHARED;
 	else if (auth_type == NL80211_AUTHTYPE_OPEN_SYSTEM)
 		auth_mode = NDIS_80211_AUTH_OPEN;
+	else if (auth_type == NL80211_AUTHTYPE_AUTOMATIC)
+		auth_mode = NDIS_80211_AUTH_AUTO_SWITCH;
 	else
 		return -ENOTSUPP;
 
@@ -2547,7 +2550,7 @@
 	/* Workaround transfer stalls on poor quality links.
 	 * TODO: find right way to fix these stalls (as stalls do not happen
 	 * with ndiswrapper/windows driver). */
-	if (priv->last_qual <= 25) {
+	if (priv->param_workaround_interval > 0 && priv->last_qual <= 25) {
 		/* Decrease stats worker interval to catch stalls.
 		 * faster. Faster than 400-500ms causes packet loss,
 		 * Slower doesn't catch stalls fast enough.
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/airo.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/airo.c
@@ -5254,11 +5254,7 @@
 	WepKeyRid wkr;
 	int rc;
 
-	if (keylen == 0) {
-		airo_print_err(ai->dev->name, "%s: key length to set was zero",
-			       __func__);
-		return -1;
-	}
+	WARN_ON(keylen == 0);
 
 	memset(&wkr, 0, sizeof(wkr));
 	wkr.len = cpu_to_le16(sizeof(wkr));
@@ -6404,11 +6400,7 @@
 		if (dwrq->length > MIN_KEY_SIZE)
 			key.len = MAX_KEY_SIZE;
 		else
-			if (dwrq->length > 0)
-				key.len = MIN_KEY_SIZE;
-			else
-				/* Disable the key */
-				key.len = 0;
+			key.len = MIN_KEY_SIZE;
 		/* Check if the key is not marked as invalid */
 		if(!(dwrq->flags & IW_ENCODE_NOKEY)) {
 			/* Cleanup */
@@ -6589,12 +6581,22 @@
 		default:
 			return -EINVAL;
 		}
-		/* Send the key to the card */
-		rc = set_wep_key(local, idx, key.key, key.len, perm, 1);
-		if (rc < 0) {
-			airo_print_err(local->dev->name, "failed to set WEP key"
-			               " at index %d: %d.", idx, rc);
-			return rc;
+		if (key.len == 0) {
+			rc = set_wep_tx_idx(local, idx, perm, 1);
+			if (rc < 0) {
+				airo_print_err(local->dev->name,
+					       "failed to set WEP transmit index to %d: %d.",
+					       idx, rc);
+				return rc;
+			}
+		} else {
+			rc = set_wep_key(local, idx, key.key, key.len, perm, 1);
+			if (rc < 0) {
+				airo_print_err(local->dev->name,
+					       "failed to set WEP key at index %d: %d.",
+					       idx, rc);
+				return rc;
+			}
 		}
 	}
 
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/rtl818x/rtl8187_dev.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/rtl818x/rtl8187_dev.c
@@ -65,6 +65,7 @@
 	/* Sitecom */
 	{USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187},
 	{USB_DEVICE(0x0df6, 0x0028), .driver_info = DEVICE_RTL8187B},
+	{USB_DEVICE(0x0df6, 0x0029), .driver_info = DEVICE_RTL8187B},
 	/* Sphairon Access Systems GmbH */
 	{USB_DEVICE(0x114B, 0x0150), .driver_info = DEVICE_RTL8187},
 	/* Dick Smith Electronics */
@@ -1329,6 +1330,7 @@
 	struct ieee80211_channel *channel;
 	const char *chip_name;
 	u16 txpwr, reg;
+	u16 product_id = le16_to_cpu(udev->descriptor.idProduct);
 	int err, i;
 
 	dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
@@ -1488,6 +1490,13 @@
 		(*channel++).hw_value = txpwr & 0xFF;
 		(*channel++).hw_value = txpwr >> 8;
 	}
+	/* Handle the differing rfkill GPIO bit in different models */
+	priv->rfkill_mask = RFKILL_MASK_8187_89_97;
+	if (product_id == 0x8197 || product_id == 0x8198) {
+		eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_SELECT_GPIO, &reg);
+		if (reg & 0xFF00)
+			priv->rfkill_mask = RFKILL_MASK_8198;
+	}
 
 	/*
 	 * XXX: Once this driver supports anything that requires
@@ -1516,9 +1525,9 @@
 	mutex_init(&priv->conf_mutex);
 	skb_queue_head_init(&priv->b_tx_status.queue);
 
-	printk(KERN_INFO "%s: hwaddr %pM, %s V%d + %s\n",
+	printk(KERN_INFO "%s: hwaddr %pM, %s V%d + %s, rfkill mask %d\n",
 	       wiphy_name(dev->wiphy), dev->wiphy->perm_addr,
-	       chip_name, priv->asic_rev, priv->rf->name);
+	       chip_name, priv->asic_rev, priv->rf->name, priv->rfkill_mask);
 
 #ifdef CONFIG_RTL8187_LEDS
 	eeprom_93cx6_read(&eeprom, 0x3F, &reg);
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/rtl818x/rtl8187_rfkill.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/rtl818x/rtl8187_rfkill.c
@@ -25,10 +25,10 @@
 	u8 gpio;
 
 	gpio = rtl818x_ioread8(priv, &priv->map->GPIO0);
-	rtl818x_iowrite8(priv, &priv->map->GPIO0, gpio & ~0x02);
+	rtl818x_iowrite8(priv, &priv->map->GPIO0, gpio & ~priv->rfkill_mask);
 	gpio = rtl818x_ioread8(priv, &priv->map->GPIO1);
 
-	return gpio & 0x02;
+	return gpio & priv->rfkill_mask;
 }
 
 void rtl8187_rfkill_init(struct ieee80211_hw *hw)
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/rtl818x/rtl8180_dev.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/rtl818x/rtl8180_dev.c
@@ -190,6 +190,7 @@
 			info->flags |= IEEE80211_TX_STAT_ACK;
 
 		info->status.rates[0].count = (flags & 0xFF) + 1;
+		info->status.rates[1].idx = -1;
 
 		ieee80211_tx_status_irqsafe(dev, skb);
 		if (ring->entries - skb_queue_len(&ring->queue) == 2)
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/rtl818x/rtl8187.h
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/rtl818x/rtl8187.h
@@ -23,6 +23,7 @@
 #define RTL8187_EEPROM_TXPWR_CHAN_1	0x16	/* 3 channels */
 #define RTL8187_EEPROM_TXPWR_CHAN_6	0x1B	/* 2 channels */
 #define RTL8187_EEPROM_TXPWR_CHAN_4	0x3D	/* 2 channels */
+#define RTL8187_EEPROM_SELECT_GPIO	0x3B
 
 #define RTL8187_REQT_READ	0xC0
 #define RTL8187_REQT_WRITE	0x40
@@ -31,6 +32,9 @@
 
 #define RTL8187_MAX_RX		0x9C4
 
+#define RFKILL_MASK_8187_89_97	0x2
+#define RFKILL_MASK_8198	0x4
+
 struct rtl8187_rx_info {
 	struct urb *urb;
 	struct ieee80211_hw *dev;
@@ -123,6 +127,7 @@
 	u8 noise;
 	u8 slot_time;
 	u8 aifsn[4];
+	u8 rfkill_mask;
 	struct {
 		__le64 buf;
 		struct sk_buff_head queue;
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/hostap/hostap_hw.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/hostap/hostap_hw.c
@@ -68,7 +68,7 @@
 module_param_string(essid, essid, sizeof(essid), 0444);
 MODULE_PARM_DESC(essid, "Host AP's ESSID");
 
-static int iw_mode[MAX_PARM_DEVICES] = { IW_MODE_MASTER, DEF_INTS };
+static int iw_mode[MAX_PARM_DEVICES] = { IW_MODE_INFRA, DEF_INTS };
 module_param_array(iw_mode, int, NULL, 0444);
 MODULE_PARM_DESC(iw_mode, "Initial operation mode");
 
@@ -2618,9 +2618,30 @@
 	int events = 0;
 	u16 ev;
 
+	/* Detect early interrupt before driver is fully configued */
+	if (!dev->base_addr) {
+		if (net_ratelimit()) {
+			printk(KERN_DEBUG "%s: Interrupt, but dev not configured\n",
+			       dev->name);
+		}
+		return IRQ_HANDLED;
+	}
+
 	iface = netdev_priv(dev);
 	local = iface->local;
 
+	/* Detect early interrupt before driver is fully configued */
+	spin_lock(&local->irq_init_lock);
+	if (!dev->base_addr) {
+		if (net_ratelimit()) {
+			printk(KERN_DEBUG "%s: Interrupt, but dev not configured\n",
+			       dev->name);
+		}
+		spin_unlock(&local->irq_init_lock);
+		return IRQ_HANDLED;
+	}
+	spin_unlock(&local->irq_init_lock);
+
 	prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_INTERRUPT, 0, 0);
 
 	if (local->func->card_present && !local->func->card_present(local)) {
@@ -3138,6 +3159,7 @@
 	spin_lock_init(&local->cmdlock);
 	spin_lock_init(&local->baplock);
 	spin_lock_init(&local->lock);
+	spin_lock_init(&local->irq_init_lock);
 	mutex_init(&local->rid_bap_mtx);
 
 	if (card_idx < 0 || card_idx >= MAX_PARM_DEVICES)
@@ -3383,6 +3405,7 @@
 	memset(&wrqu, 0, sizeof(wrqu));
 	wrqu.ap_addr.sa_family = ARPHRD_ETHER;
 	wireless_send_event(local->dev, SIOCGIWAP, &wrqu, NULL);
+	wireless_send_event(local->ddev, SIOCGIWAP, &wrqu, NULL);
 
 	/* Disable hardware and firmware */
 	prism2_hw_shutdown(dev, 0);
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/hostap/hostap_cs.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/hostap/hostap_cs.c
@@ -626,6 +626,7 @@
 	int ret = 1;
 	int last_fn, last_ret;
 	struct hostap_cs_priv *hw_priv;
+	unsigned long flags;
 
 	PDEBUG(DEBUG_FLOW, "prism2_config()\n");
 
@@ -683,8 +684,11 @@
 	CS_CHECK(RequestConfiguration,
 		 pcmcia_request_configuration(link, &link->conf));
 
+	/* IRQ handler cannot proceed until at dev->base_addr is initialized */
+	spin_lock_irqsave(&local->irq_init_lock, flags);
 	dev->irq = link->irq.AssignedIRQ;
 	dev->base_addr = link->io.BasePort1;
+	spin_unlock_irqrestore(&local->irq_init_lock, flags);
 
 	/* Finally, report what we've done */
 	printk(KERN_INFO "%s: index 0x%02x: ",
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/hostap/hostap_info.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/hostap/hostap_info.c
@@ -238,6 +238,7 @@
 	wrqu.data.length = 0;
 	wrqu.data.flags = 0;
 	wireless_send_event(local->dev, SIOCGIWSCAN, &wrqu, NULL);
+	wireless_send_event(local->ddev, SIOCGIWSCAN, &wrqu, NULL);
 
 	/* Allow SIOCGIWSCAN handling to occur since we have received
 	 * scanning result */
@@ -449,8 +450,10 @@
 	 * frames and can confuse wpa_supplicant about the current association
 	 * status.
 	 */
-	if (connected || local->prev_linkstatus_connected)
+	if (connected || local->prev_linkstatus_connected) {
 		wireless_send_event(local->dev, SIOCGIWAP, &wrqu, NULL);
+		wireless_send_event(local->ddev, SIOCGIWAP, &wrqu, NULL);
+	}
 	local->prev_linkstatus_connected = connected;
 }
 
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/hostap/hostap_main.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/hostap/hostap_main.c
@@ -1100,6 +1100,7 @@
 				   (u8 *) &val, 2);
 	memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN);
 	wireless_send_event(local->dev, SIOCGIWAP, &wrqu, NULL);
+	wireless_send_event(local->ddev, SIOCGIWAP, &wrqu, NULL);
 	return ret;
 }
 
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/hostap/hostap_pci.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/hostap/hostap_pci.c
@@ -329,6 +329,7 @@
 
         dev->irq = pdev->irq;
         hw_priv->mem_start = mem;
+	dev->base_addr = (unsigned long) mem;
 
 	prism2_pci_cor_sreset(local);
 
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/hostap/hostap_wlan.h
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/hostap/hostap_wlan.h
@@ -654,7 +654,7 @@
 	rwlock_t iface_lock; /* hostap_interfaces read lock; use write lock
 			      * when removing entries from the list.
 			      * TX and RX paths can use read lock. */
-	spinlock_t cmdlock, baplock, lock;
+	spinlock_t cmdlock, baplock, lock, irq_init_lock;
 	struct mutex rid_bap_mtx;
 	u16 infofid; /* MAC buffer id for info frame */
 	/* txfid, intransmitfid, next_txtid, and next_alloc are protected by
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/p54/txrx.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/p54/txrx.c
@@ -186,7 +186,7 @@
 	struct ieee80211_tx_queue_stats *queue;
 	unsigned long flags;
 
-	if (WARN_ON(p54_queue > P54_QUEUE_NUM))
+	if (WARN_ON(p54_queue >= P54_QUEUE_NUM))
 		return -EINVAL;
 
 	queue = &priv->tx_stats[p54_queue];
@@ -445,7 +445,7 @@
 	}
 
 	if (!(info->flags & IEEE80211_TX_CTL_NO_ACK) &&
-	     (!payload->status))
+	     !(payload->status & P54_TX_FAILED))
 		info->flags |= IEEE80211_TX_STAT_ACK;
 	if (payload->status & P54_TX_PSM_CANCELLED)
 		info->flags |= IEEE80211_TX_STAT_TX_FILTERED;
@@ -617,7 +617,7 @@
 	else
 		*burst_possible = false;
 
-	if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ)
+	if (!(info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ))
 		*flags |= P54_HDR_FLAG_DATA_OUT_SEQNR;
 
 	if (info->flags & IEEE80211_TX_CTL_PSPOLL_RESPONSE)
@@ -703,7 +703,7 @@
 	struct p54_tx_info *p54info;
 	struct p54_hdr *hdr;
 	struct p54_tx_data *txhdr;
-	unsigned int padding, len, extra_len;
+	unsigned int padding, len, extra_len = 0;
 	int i, j, ridx;
 	u16 hdr_flags = 0, aid = 0;
 	u8 rate, queue = 0, crypt_offset = 0;
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/p54/eeprom.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/p54/eeprom.c
@@ -126,7 +126,7 @@
 	int ret = -ENOMEM;
 
 	if ((!list->entries) || (!list->band_channel_num[band]))
-		return 0;
+		return -EINVAL;
 
 	tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
 	if (!tmp)
@@ -158,6 +158,7 @@
 			       (list->channels[i].data & CHAN_HAS_CURVE ? "" :
 				" [curve data]"),
 			       list->channels[i].index, list->channels[i].freq);
+			continue;
 		}
 
 		tmp->channels[j].band = list->channels[i].band;
@@ -165,7 +166,16 @@
 		j++;
 	}
 
-	tmp->n_channels = list->band_channel_num[band];
+	if (j == 0) {
+		printk(KERN_ERR "%s: Disabling totally damaged %s band.\n",
+		       wiphy_name(dev->wiphy), (band == IEEE80211_BAND_2GHZ) ?
+		       "2 GHz" : "5 GHz");
+
+		ret = -ENODATA;
+		goto err_out;
+	}
+
+	tmp->n_channels = j;
 	old = priv->band_table[band];
 	priv->band_table[band] = tmp;
 	if (old) {
@@ -228,13 +238,13 @@
 	struct p54_common *priv = dev->priv;
 	struct p54_channel_list *list;
 	unsigned int i, j, max_channel_num;
-	int ret = -ENOMEM;
+	int ret = 0;
 	u16 freq;
 
 	if ((priv->iq_autocal_len != priv->curve_data->entries) ||
 	    (priv->iq_autocal_len != priv->output_limit->entries))
-		printk(KERN_ERR "%s: EEPROM is damaged... you may not be able"
-				"to use all channels with this device.\n",
+		printk(KERN_ERR "%s: Unsupported or damaged EEPROM detected. "
+				"You may not be able to use all channels.\n",
 				wiphy_name(dev->wiphy));
 
 	max_channel_num = max_t(unsigned int, priv->output_limit->entries,
@@ -243,14 +253,18 @@
 				priv->curve_data->entries);
 
 	list = kzalloc(sizeof(*list), GFP_KERNEL);
-	if (!list)
+	if (!list) {
+		ret = -ENOMEM;
 		goto free;
+	}
 
 	list->max_entries = max_channel_num;
 	list->channels = kzalloc(sizeof(struct p54_channel_entry) *
 				 max_channel_num, GFP_KERNEL);
-	if (!list->channels)
+	if (!list->channels) {
+		ret = -ENOMEM;
 		goto free;
+	}
 
 	for (i = 0; i < max_channel_num; i++) {
 		if (i < priv->iq_autocal_len) {
@@ -282,13 +296,8 @@
 	     p54_compare_channels, NULL);
 
 	for (i = 0, j = 0; i < IEEE80211_NUM_BANDS; i++) {
-		if (list->band_channel_num[i]) {
-			ret = p54_generate_band(dev, list, i);
-			if (ret)
-				goto free;
-
+		if (p54_generate_band(dev, list, i) == 0)
 			j++;
-		}
 	}
 	if (j == 0) {
 		/* no useable band available. */
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/p54/p54usb.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/p54/p54usb.c
@@ -32,10 +32,21 @@
 MODULE_FIRMWARE("isl3886usb");
 MODULE_FIRMWARE("isl3887usb");
 
+/*
+ * Note:
+ *
+ * Always update our wiki's device list (located at:
+ * http://wireless.kernel.org/en/users/Drivers/p54/devices ),
+ * whenever you add a new device.
+ */
+
 static struct usb_device_id p54u_table[] __devinitdata = {
 	/* Version 1 devices (pci chip + net2280) */
+	{USB_DEVICE(0x0411, 0x0050)},	/* Buffalo WLI2-USB2-G54 */
+	{USB_DEVICE(0x045e, 0x00c2)},	/* Microsoft MN-710 */
 	{USB_DEVICE(0x0506, 0x0a11)},	/* 3COM 3CRWE254G72 */
 	{USB_DEVICE(0x0707, 0xee06)},	/* SMC 2862W-G */
+	{USB_DEVICE(0x07aa, 0x001c)},	/* Corega CG-WLUSB2GT */
 	{USB_DEVICE(0x083a, 0x4501)},	/* Accton 802.11g WN4501 USB */
 	{USB_DEVICE(0x083a, 0x4502)},	/* Siemens Gigaset USB Adapter */
 	{USB_DEVICE(0x083a, 0x5501)},	/* Phillips CPWUA054 */
@@ -43,12 +54,20 @@
 	{USB_DEVICE(0x0846, 0x4210)},	/* Netgear WG121 the second ? */
 	{USB_DEVICE(0x0846, 0x4220)},	/* Netgear WG111 */
 	{USB_DEVICE(0x09aa, 0x1000)},	/* Spinnaker Proto board */
+	{USB_DEVICE(0x0bf8, 0x1007)},	/* Fujitsu E-5400 USB */
 	{USB_DEVICE(0x0cde, 0x0006)},	/* Medion 40900, Roper Europe */
+	{USB_DEVICE(0x0db0, 0x6826)},	/* MSI UB54G (MS-6826) */
+	{USB_DEVICE(0x107b, 0x55f2)},	/* Gateway WGU-210 (Gemtek) */
 	{USB_DEVICE(0x124a, 0x4023)},	/* Shuttle PN15, Airvast WM168g, IOGear GWU513 */
+	{USB_DEVICE(0x1435, 0x0210)},	/* Inventel UR054G */
+	{USB_DEVICE(0x15a9, 0x0002)},	/* Gemtek WUBI-100GW 802.11g */
+	{USB_DEVICE(0x1630, 0x0005)},	/* 2Wire 802.11g USB (v1) / Z-Com */
+	{USB_DEVICE(0x182d, 0x096b)},	/* Sitecom WL-107 */
 	{USB_DEVICE(0x1915, 0x2234)},	/* Linksys WUSB54G OEM */
 	{USB_DEVICE(0x1915, 0x2235)},	/* Linksys WUSB54G Portable OEM */
 	{USB_DEVICE(0x2001, 0x3701)},	/* DLink DWL-G120 Spinnaker */
 	{USB_DEVICE(0x2001, 0x3703)},	/* DLink DWL-G122 */
+	{USB_DEVICE(0x2001, 0x3762)},	/* Conceptronic C54U */
 	{USB_DEVICE(0x5041, 0x2234)},	/* Linksys WUSB54G */
 	{USB_DEVICE(0x5041, 0x2235)},	/* Linksys WUSB54G Portable */
 
@@ -57,15 +76,18 @@
 	{USB_DEVICE(0x050d, 0x7050)},	/* Belkin F5D7050 ver 1000 */
 	{USB_DEVICE(0x0572, 0x2000)},	/* Cohiba Proto board */
 	{USB_DEVICE(0x0572, 0x2002)},	/* Cohiba Proto board */
+	{USB_DEVICE(0x06a9, 0x000e)},	/* Westell 802.11g USB (A90-211WG-01) */
 	{USB_DEVICE(0x06b9, 0x0121)},	/* Thomson SpeedTouch 121g */
 	{USB_DEVICE(0x0707, 0xee13)},   /* SMC 2862W-G version 2 */
 	{USB_DEVICE(0x083a, 0x4521)},   /* Siemens Gigaset USB Adapter 54 version 2 */
+	{USB_DEVICE(0x083a, 0xc501)},	/* Zoom Wireless-G 4410 */
+	{USB_DEVICE(0x083a, 0xf503)},	/* Accton FD7050E ver 1010ec  */
 	{USB_DEVICE(0x0846, 0x4240)},	/* Netgear WG111 (v2) */
 	{USB_DEVICE(0x0915, 0x2000)},	/* Cohiba Proto board */
 	{USB_DEVICE(0x0915, 0x2002)},	/* Cohiba Proto board */
 	{USB_DEVICE(0x0baf, 0x0118)},   /* U.S. Robotics U5 802.11g Adapter*/
 	{USB_DEVICE(0x0bf8, 0x1009)},   /* FUJITSU E-5400 USB D1700*/
-	{USB_DEVICE(0x0cde, 0x0006)},   /* Medion MD40900 */
+// DUPE	{USB_DEVICE(0x0cde, 0x0006)},   /* Medion MD40900 */
 	{USB_DEVICE(0x0cde, 0x0008)},	/* Sagem XG703A */
 	{USB_DEVICE(0x0cde, 0x0015)},	/* Zcomax XG-705A */
 	{USB_DEVICE(0x0d8e, 0x3762)},	/* DLink DWL-G120 Cohiba */
@@ -75,7 +97,11 @@
 	{USB_DEVICE(0x13B1, 0x000C)},	/* Linksys WUSB54AG */
 	{USB_DEVICE(0x1413, 0x5400)},   /* Telsey 802.11g USB2.0 Adapter */
 	{USB_DEVICE(0x1435, 0x0427)},	/* Inventel UR054G */
+	{USB_DEVICE(0x1668, 0x1050)},	/* Actiontec 802UIG-1 */
+	{USB_DEVICE(0x1740, 0x1000)},	/* Senao NUB-350 */
 	{USB_DEVICE(0x2001, 0x3704)},	/* DLink DWL-G122 rev A2 */
+	{USB_DEVICE(0x2001, 0x3705)},	/* D-Link DWL-G120 rev C1 */
+	{USB_DEVICE(0x413c, 0x5513)},	/* Dell WLA3310 USB Wireless Adapter */
 	{USB_DEVICE(0x413c, 0x8102)},	/* Spinnaker DUT */
 	{USB_DEVICE(0x413c, 0x8104)},	/* Cohiba Proto board */
 	{}
@@ -926,8 +952,8 @@
 #ifdef CONFIG_PM
 		/* ISL3887 needs a full reset on resume */
 		udev->reset_resume = 1;
+#endif /* CONFIG_PM */
 		err = p54u_device_reset(dev);
-#endif
 
 		priv->hw_type = P54U_3887;
 		dev->extra_tx_headroom += sizeof(struct lm87_tx_hdr);
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/p54/p54pci.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/p54/p54pci.c
@@ -40,6 +40,8 @@
 	{ PCI_DEVICE(0x1260, 0x3877) },
 	/* Intersil PRISM Javelin/Xbow Wireless LAN adapter */
 	{ PCI_DEVICE(0x1260, 0x3886) },
+	/* Intersil PRISM Xbow Wireless LAN adapter (Symbol AP-300) */
+	{ PCI_DEVICE(0x1260, 0xffff) },
 	{ },
 };
 
@@ -157,6 +159,14 @@
 						 skb_tail_pointer(skb),
 						 priv->common.rx_mtu + 32,
 						 PCI_DMA_FROMDEVICE);
+
+			if (pci_dma_mapping_error(priv->pdev, mapping)) {
+				dev_kfree_skb_any(skb);
+				dev_err(&priv->pdev->dev,
+					"RX DMA Mapping error\n");
+				break;
+			}
+
 			desc->host_addr = cpu_to_le32(mapping);
 			desc->device_addr = 0;	// FIXME: necessary?
 			desc->len = cpu_to_le16(priv->common.rx_mtu + 32);
@@ -188,6 +198,7 @@
 	while (i != idx) {
 		u16 len;
 		struct sk_buff *skb;
+		dma_addr_t dma_addr;
 		desc = &ring[i];
 		len = le16_to_cpu(desc->len);
 		skb = rx_buf[i];
@@ -197,17 +208,28 @@
 			i %= ring_limit;
 			continue;
 		}
+
+		if (unlikely(len > priv->common.rx_mtu)) {
+			if (net_ratelimit())
+				dev_err(&priv->pdev->dev, "rx'd frame size "
+					"exceeds length threshold.\n");
+
+			len = priv->common.rx_mtu;
+		}
+		dma_addr = le32_to_cpu(desc->host_addr);
+		pci_dma_sync_single_for_cpu(priv->pdev, dma_addr,
+			priv->common.rx_mtu + 32, PCI_DMA_FROMDEVICE);
 		skb_put(skb, len);
 
 		if (p54_rx(dev, skb)) {
-			pci_unmap_single(priv->pdev,
-					 le32_to_cpu(desc->host_addr),
-					 priv->common.rx_mtu + 32,
-					 PCI_DMA_FROMDEVICE);
+			pci_unmap_single(priv->pdev, dma_addr,
+				priv->common.rx_mtu + 32, PCI_DMA_FROMDEVICE);
 			rx_buf[i] = NULL;
-			desc->host_addr = 0;
+			desc->host_addr = cpu_to_le32(0);
 		} else {
 			skb_trim(skb, 0);
+			pci_dma_sync_single_for_device(priv->pdev, dma_addr,
+				priv->common.rx_mtu + 32, PCI_DMA_FROMDEVICE);
 			desc->len = cpu_to_le16(priv->common.rx_mtu + 32);
 		}
 
@@ -229,7 +251,7 @@
 	u32 idx, i;
 
 	i = (*index) % ring_limit;
-	(*index) = idx = le32_to_cpu(ring_control->device_idx[1]);
+	(*index) = idx = le32_to_cpu(ring_control->device_idx[ring_index]);
 	idx %= ring_limit;
 
 	while (i != idx) {
@@ -317,14 +339,20 @@
 	u32 device_idx, idx, i;
 
 	spin_lock_irqsave(&priv->lock, flags);
-
 	device_idx = le32_to_cpu(ring_control->device_idx[1]);
 	idx = le32_to_cpu(ring_control->host_idx[1]);
 	i = idx % ARRAY_SIZE(ring_control->tx_data);
 
-	priv->tx_buf_data[i] = skb;
 	mapping = pci_map_single(priv->pdev, skb->data, skb->len,
 				 PCI_DMA_TODEVICE);
+	if (pci_dma_mapping_error(priv->pdev, mapping)) {
+		spin_unlock_irqrestore(&priv->lock, flags);
+		p54_free_skb(dev, skb);
+		dev_err(&priv->pdev->dev, "TX DMA mapping error\n");
+		return ;
+	}
+	priv->tx_buf_data[i] = skb;
+
 	desc = &ring_control->tx_data[i];
 	desc->host_addr = cpu_to_le32(mapping);
 	desc->device_addr = ((struct p54_hdr *)skb->data)->req_id;
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/ipw2x00/ipw2200.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/ipw2x00/ipw2200.c
@@ -90,7 +90,7 @@
 static u32 ipw_debug_level;
 static int associate;
 static int auto_create = 1;
-static int led_support = 0;
+static int led_support = 1;
 static int disable = 0;
 static int bt_coexist = 0;
 static int hwcrypto = 0;
@@ -11962,7 +11962,7 @@
 MODULE_PARM_DESC(auto_create, "auto create adhoc network (default on)");
 
 module_param_named(led, led_support, int, 0444);
-MODULE_PARM_DESC(led, "enable led control on some systems (default 0 off)");
+MODULE_PARM_DESC(led, "enable led control on some systems (default 1 on)");
 
 module_param(debug, int, 0444);
 MODULE_PARM_DESC(debug, "debug output mask");
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/ipw2x00/ipw2100.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/ipw2x00/ipw2100.c
@@ -6487,6 +6487,16 @@
 }
 #endif
 
+static void ipw2100_shutdown(struct pci_dev *pci_dev)
+{
+	struct ipw2100_priv *priv = pci_get_drvdata(pci_dev);
+
+	/* Take down the device; powers it off, etc. */
+	ipw2100_down(priv);
+
+	pci_disable_device(pci_dev);
+}
+
 #define IPW2100_DEV_ID(x) { PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, x }
 
 static struct pci_device_id ipw2100_pci_id_table[] __devinitdata = {
@@ -6550,6 +6560,7 @@
 	.suspend = ipw2100_suspend,
 	.resume = ipw2100_resume,
 #endif
+	.shutdown = ipw2100_shutdown,
 };
 
 /**
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/wl12xx/wl1251_sdio.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/wl12xx/wl1251_sdio.c
@@ -160,6 +160,7 @@
 	sdio_disable_func(func);
 release:
 	sdio_release_host(func);
+	wl1251_free_hw(wl);
 	return ret;
 }
 
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/wl12xx/wl1251_debugfs.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/wl12xx/wl1251_debugfs.c
@@ -443,7 +443,8 @@
 
 void wl1251_debugfs_reset(struct wl1251 *wl)
 {
-	memset(wl->stats.fw_stats, 0, sizeof(*wl->stats.fw_stats));
+	if (wl->stats.fw_stats != NULL)
+		memset(wl->stats.fw_stats, 0, sizeof(*wl->stats.fw_stats));
 	wl->stats.retry_count = 0;
 	wl->stats.excessive_retries = 0;
 }
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/b43/pio.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/b43/pio.c
@@ -342,12 +342,15 @@
 			q->mmio_base + B43_PIO_TXDATA,
 			sizeof(u16));
 	if (data_len & 1) {
+		u8 *tail = wl->pio_tailspace;
+		BUILD_BUG_ON(sizeof(wl->pio_tailspace) < 2);
+
 		/* Write the last byte. */
 		ctl &= ~B43_PIO_TXCTL_WRITEHI;
 		b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
-		wl->tx_tail[0] = data[data_len - 1];
-		wl->tx_tail[1] = 0;
-		ssb_block_write(dev->dev, wl->tx_tail, 2,
+		tail[0] = data[data_len - 1];
+		tail[1] = 0;
+		ssb_block_write(dev->dev, tail, 2,
 				q->mmio_base + B43_PIO_TXDATA,
 				sizeof(u16));
 	}
@@ -393,31 +396,31 @@
 			q->mmio_base + B43_PIO8_TXDATA,
 			sizeof(u32));
 	if (data_len & 3) {
-		wl->tx_tail[3] = 0;
+		u8 *tail = wl->pio_tailspace;
+		BUILD_BUG_ON(sizeof(wl->pio_tailspace) < 4);
+
+		memset(tail, 0, 4);
 		/* Write the last few bytes. */
 		ctl &= ~(B43_PIO8_TXCTL_8_15 | B43_PIO8_TXCTL_16_23 |
 			 B43_PIO8_TXCTL_24_31);
 		switch (data_len & 3) {
 		case 3:
 			ctl |= B43_PIO8_TXCTL_16_23 | B43_PIO8_TXCTL_8_15;
-			wl->tx_tail[0] = data[data_len - 3];
-			wl->tx_tail[1] = data[data_len - 2];
-			wl->tx_tail[2] = data[data_len - 1];
+			tail[0] = data[data_len - 3];
+			tail[1] = data[data_len - 2];
+			tail[2] = data[data_len - 1];
 			break;
 		case 2:
 			ctl |= B43_PIO8_TXCTL_8_15;
-			wl->tx_tail[0] = data[data_len - 2];
-			wl->tx_tail[1] = data[data_len - 1];
-			wl->tx_tail[2] = 0;
+			tail[0] = data[data_len - 2];
+			tail[1] = data[data_len - 1];
 			break;
 		case 1:
-			wl->tx_tail[0] = data[data_len - 1];
-			wl->tx_tail[1] = 0;
-			wl->tx_tail[2] = 0;
+			tail[0] = data[data_len - 1];
 			break;
 		}
 		b43_piotx_write32(q, B43_PIO8_TXCTL, ctl);
-		ssb_block_write(dev->dev, wl->tx_tail, 4,
+		ssb_block_write(dev->dev, tail, 4,
 				q->mmio_base + B43_PIO8_TXDATA,
 				sizeof(u32));
 	}
@@ -456,6 +459,7 @@
 	int err;
 	unsigned int hdrlen;
 	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
+	struct b43_txhdr *txhdr = (struct b43_txhdr *)wl->pio_scratchspace;
 
 	B43_WARN_ON(list_empty(&q->packets_list));
 	pack = list_entry(q->packets_list.next,
@@ -463,7 +467,9 @@
 
 	cookie = generate_cookie(q, pack);
 	hdrlen = b43_txhdr_size(dev);
-	err = b43_generate_txhdr(dev, (u8 *)&wl->txhdr, skb,
+	BUILD_BUG_ON(sizeof(wl->pio_scratchspace) < sizeof(struct b43_txhdr));
+	B43_WARN_ON(sizeof(wl->pio_scratchspace) < hdrlen);
+	err = b43_generate_txhdr(dev, (u8 *)txhdr, skb,
 				 info, cookie);
 	if (err)
 		return err;
@@ -477,9 +483,9 @@
 
 	pack->skb = skb;
 	if (q->rev >= 8)
-		pio_tx_frame_4byte_queue(pack, (const u8 *)&wl->txhdr, hdrlen);
+		pio_tx_frame_4byte_queue(pack, (const u8 *)txhdr, hdrlen);
 	else
-		pio_tx_frame_2byte_queue(pack, (const u8 *)&wl->txhdr, hdrlen);
+		pio_tx_frame_2byte_queue(pack, (const u8 *)txhdr, hdrlen);
 
 	/* Remove it from the list of available packet slots.
 	 * It will be put back when we receive the status report. */
@@ -625,8 +631,11 @@
 	unsigned int i, padding;
 	struct sk_buff *skb;
 	const char *err_msg = NULL;
+	struct b43_rxhdr_fw4 *rxhdr =
+		(struct b43_rxhdr_fw4 *)wl->pio_scratchspace;
 
-	memset(&wl->rxhdr, 0, sizeof(wl->rxhdr));
+	BUILD_BUG_ON(sizeof(wl->pio_scratchspace) < sizeof(*rxhdr));
+	memset(rxhdr, 0, sizeof(*rxhdr));
 
 	/* Check if we have data and wait for it to get ready. */
 	if (q->rev >= 8) {
@@ -664,16 +673,16 @@
 
 	/* Get the preamble (RX header) */
 	if (q->rev >= 8) {
-		ssb_block_read(dev->dev, &wl->rxhdr, sizeof(wl->rxhdr),
+		ssb_block_read(dev->dev, rxhdr, sizeof(*rxhdr),
 			       q->mmio_base + B43_PIO8_RXDATA,
 			       sizeof(u32));
 	} else {
-		ssb_block_read(dev->dev, &wl->rxhdr, sizeof(wl->rxhdr),
+		ssb_block_read(dev->dev, rxhdr, sizeof(*rxhdr),
 			       q->mmio_base + B43_PIO_RXDATA,
 			       sizeof(u16));
 	}
 	/* Sanity checks. */
-	len = le16_to_cpu(wl->rxhdr.frame_len);
+	len = le16_to_cpu(rxhdr->frame_len);
 	if (unlikely(len > 0x700)) {
 		err_msg = "len > 0x700";
 		goto rx_error;
@@ -683,7 +692,7 @@
 		goto rx_error;
 	}
 
-	macstat = le32_to_cpu(wl->rxhdr.mac_status);
+	macstat = le32_to_cpu(rxhdr->mac_status);
 	if (macstat & B43_RX_MAC_FCSERR) {
 		if (!(q->dev->wl->filter_flags & FIF_FCSFAIL)) {
 			/* Drop frames with failed FCS. */
@@ -708,22 +717,25 @@
 			       q->mmio_base + B43_PIO8_RXDATA,
 			       sizeof(u32));
 		if (len & 3) {
+			u8 *tail = wl->pio_tailspace;
+			BUILD_BUG_ON(sizeof(wl->pio_tailspace) < 4);
+
 			/* Read the last few bytes. */
-			ssb_block_read(dev->dev, wl->rx_tail, 4,
+			ssb_block_read(dev->dev, tail, 4,
 				       q->mmio_base + B43_PIO8_RXDATA,
 				       sizeof(u32));
 			switch (len & 3) {
 			case 3:
-				skb->data[len + padding - 3] = wl->rx_tail[0];
-				skb->data[len + padding - 2] = wl->rx_tail[1];
-				skb->data[len + padding - 1] = wl->rx_tail[2];
+				skb->data[len + padding - 3] = tail[0];
+				skb->data[len + padding - 2] = tail[1];
+				skb->data[len + padding - 1] = tail[2];
 				break;
 			case 2:
-				skb->data[len + padding - 2] = wl->rx_tail[0];
-				skb->data[len + padding - 1] = wl->rx_tail[1];
+				skb->data[len + padding - 2] = tail[0];
+				skb->data[len + padding - 1] = tail[1];
 				break;
 			case 1:
-				skb->data[len + padding - 1] = wl->rx_tail[0];
+				skb->data[len + padding - 1] = tail[0];
 				break;
 			}
 		}
@@ -732,15 +744,18 @@
 			       q->mmio_base + B43_PIO_RXDATA,
 			       sizeof(u16));
 		if (len & 1) {
+			u8 *tail = wl->pio_tailspace;
+			BUILD_BUG_ON(sizeof(wl->pio_tailspace) < 2);
+
 			/* Read the last byte. */
-			ssb_block_read(dev->dev, wl->rx_tail, 2,
+			ssb_block_read(dev->dev, tail, 2,
 				       q->mmio_base + B43_PIO_RXDATA,
 				       sizeof(u16));
-			skb->data[len + padding - 1] = wl->rx_tail[0];
+			skb->data[len + padding - 1] = tail[0];
 		}
 	}
 
-	b43_rx(q->dev, skb, &wl->rxhdr);
+	b43_rx(q->dev, skb, rxhdr);
 
 	return 1;
 
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/b43/rfkill.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/b43/rfkill.c
@@ -33,8 +33,14 @@
 		      & B43_MMIO_RADIO_HWENABLED_HI_MASK))
 			return 1;
 	} else {
-		if (b43_status(dev) >= B43_STAT_STARTED &&
-		    b43_read16(dev, B43_MMIO_RADIO_HWENABLED_LO)
+		/* To prevent CPU fault on PPC, do not read a register
+		 * unless the interface is started; however, on resume
+		 * for hibernation, this routine is entered early. When
+		 * that happens, unconditionally return TRUE.
+		 */
+		if (b43_status(dev) < B43_STAT_STARTED)
+			return 1;
+		if (b43_read16(dev, B43_MMIO_RADIO_HWENABLED_LO)
 		    & B43_MMIO_RADIO_HWENABLED_LO_MASK)
 			return 1;
 	}
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/b43/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/b43/Kconfig
@@ -78,11 +78,11 @@
 
 	  If unsure, say N.
 
-# Data transfers to the device via PIO
-# This is only needed on PCMCIA and SDIO devices. All others can do DMA properly.
+#Data transfers to the device via PIO. We want it as a fallback even
+# if we can do DMA.
 config B43_PIO
 	bool
-	depends on B43 && (B43_SDIO || B43_PCMCIA || B43_FORCE_PIO)
+	depends on B43
 	select SSB_BLOCKIO
 	default y
 
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/b43/dma.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/b43/dma.c
@@ -1521,7 +1521,7 @@
 		dmaaddr = meta->dmaaddr;
 		goto drop_recycle_buffer;
 	}
-	if (unlikely(len > ring->rx_buffersize)) {
+	if (unlikely(len + ring->frameoffset > ring->rx_buffersize)) {
 		/* The data did not fit into one descriptor buffer
 		 * and is split over multiple buffers.
 		 * This should never happen, as we try to allocate buffers
@@ -1620,7 +1620,6 @@
 	b43_power_saving_ctl_bits(dev, 0);
 }
 
-#ifdef CONFIG_B43_PIO
 static void direct_fifo_rx(struct b43_wldev *dev, enum b43_dmatype type,
 			   u16 mmio_base, bool enable)
 {
@@ -1654,4 +1653,3 @@
 	mmio_base = b43_dmacontroller_base(type, engine_index);
 	direct_fifo_rx(dev, type, mmio_base, enable);
 }
-#endif /* CONFIG_B43_PIO */
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/b43/sdio.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/b43/sdio.c
@@ -162,6 +162,7 @@
 err_free_ssb:
 	kfree(sdio);
 err_disable_func:
+	sdio_claim_host(func);
 	sdio_disable_func(func);
 err_release_host:
 	sdio_release_host(func);
@@ -174,7 +175,9 @@
 	struct b43_sdio *sdio = sdio_get_drvdata(func);
 
 	ssb_bus_unregister(&sdio->ssb);
+	sdio_claim_host(func);
 	sdio_disable_func(func);
+	sdio_release_host(func);
 	kfree(sdio);
 	sdio_set_drvdata(func, NULL);
 }
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/b43/main.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/b43/main.c
@@ -66,8 +66,38 @@
 MODULE_AUTHOR("Gábor Stefanik");
 MODULE_LICENSE("GPL");
 
-MODULE_FIRMWARE(B43_SUPPORTED_FIRMWARE_ID);
-
+MODULE_FIRMWARE("b43/a0g0bsinitvals5.fw");
+MODULE_FIRMWARE("b43/a0g0bsinitvals9.fw");
+MODULE_FIRMWARE("b43/a0g0initvals5.fw");
+MODULE_FIRMWARE("b43/a0g0initvals9.fw");
+MODULE_FIRMWARE("b43/a0g1bsinitvals13.fw");
+MODULE_FIRMWARE("b43/a0g1bsinitvals5.fw");
+MODULE_FIRMWARE("b43/a0g1bsinitvals9.fw");
+MODULE_FIRMWARE("b43/a0g1initvals13.fw");
+MODULE_FIRMWARE("b43/a0g1initvals5.fw");
+MODULE_FIRMWARE("b43/a0g1initvals9.fw");
+MODULE_FIRMWARE("b43/b0g0bsinitvals13.fw");
+MODULE_FIRMWARE("b43/b0g0bsinitvals5.fw");
+MODULE_FIRMWARE("b43/b0g0bsinitvals9.fw");
+MODULE_FIRMWARE("b43/b0g0initvals13.fw");
+MODULE_FIRMWARE("b43/b0g0initvals5.fw");
+MODULE_FIRMWARE("b43/b0g0initvals9.fw");
+MODULE_FIRMWARE("b43/lp0bsinitvals13.fw");
+MODULE_FIRMWARE("b43/lp0bsinitvals14.fw");
+MODULE_FIRMWARE("b43/lp0bsinitvals15.fw");
+MODULE_FIRMWARE("b43/lp0initvals13.fw");
+MODULE_FIRMWARE("b43/lp0initvals14.fw");
+MODULE_FIRMWARE("b43/lp0initvals15.fw");
+MODULE_FIRMWARE("b43/n0absinitvals11.fw");
+MODULE_FIRMWARE("b43/n0bsinitvals11.fw");
+MODULE_FIRMWARE("b43/n0initvals11.fw");
+MODULE_FIRMWARE("b43/pcm5.fw");
+MODULE_FIRMWARE("b43/ucode11.fw");
+MODULE_FIRMWARE("b43/ucode13.fw");
+MODULE_FIRMWARE("b43/ucode14.fw");
+MODULE_FIRMWARE("b43/ucode15.fw");
+MODULE_FIRMWARE("b43/ucode5.fw");
+MODULE_FIRMWARE("b43/ucode9.fw");
 
 static int modparam_bad_frames_preempt;
 module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
@@ -102,6 +132,9 @@
 module_param_named(verbose, b43_modparam_verbose, int, 0644);
 MODULE_PARM_DESC(verbose, "Log message verbosity: 0=error, 1=warn, 2=info(default), 3=debug");
 
+int b43_modparam_pio = B43_PIO_DEFAULT;
+module_param_named(pio, b43_modparam_pio, int, 0644);
+MODULE_PARM_DESC(pio, "Use PIO accesses by default: 0=DMA, 1=PIO");
 
 static const struct ssb_device_id b43_ssb_tbl[] = {
 	SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 5),
@@ -628,10 +661,17 @@
 static void b43_set_slot_time(struct b43_wldev *dev, u16 slot_time)
 {
 	/* slot_time is in usec. */
-	if (dev->phy.type != B43_PHYTYPE_G)
+	/* This test used to exit for all but a G PHY. */
+	if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ)
 		return;
-	b43_write16(dev, 0x684, 510 + slot_time);
-	b43_shm_write16(dev, B43_SHM_SHARED, 0x0010, slot_time);
+	b43_write16(dev, B43_MMIO_IFSSLOT, 510 + slot_time);
+	/* Shared memory location 0x0010 is the slot time and should be
+	 * set to slot_time; however, this register is initially 0 and changing
+	 * the value adversely affects the transmit rate for BCM4311
+	 * devices. Until this behavior is unterstood, delete this step
+	 *
+	 * b43_shm_write16(dev, B43_SHM_SHARED, 0x0010, slot_time);
+	 */
 }
 
 static void b43_short_slot_timing_enable(struct b43_wldev *dev)
@@ -845,19 +885,16 @@
 	if (B43_WARN_ON(!modparam_hwtkip))
 		return;
 
-	mutex_lock(&wl->mutex);
-
+	/* This is only called from the RX path through mac80211, where
+	 * our mutex is already locked. */
+	B43_WARN_ON(!mutex_is_locked(&wl->mutex));
 	dev = wl->current_dev;
-	if (!dev || b43_status(dev) < B43_STAT_INITIALIZED)
-		goto out_unlock;
+	B43_WARN_ON(!dev || b43_status(dev) < B43_STAT_INITIALIZED);
 
 	keymac_write(dev, index, NULL);	/* First zero out mac to avoid race */
 
 	rx_tkip_phase1_write(dev, index, iv32, phase1key);
 	keymac_write(dev, index, addr);
-
-out_unlock:
-	mutex_unlock(&wl->mutex);
 }
 
 static void do_key_write(struct b43_wldev *dev,
@@ -1784,6 +1821,10 @@
 			       dma_reason[0], dma_reason[1],
 			       dma_reason[2], dma_reason[3],
 			       dma_reason[4], dma_reason[5]);
+			b43err(dev->wl, "This device does not support DMA "
+			       "on your system. Please use PIO instead.\n");
+			/* Fall back to PIO transfers if we get fatal DMA errors! */
+			dev->use_pio = 1;
 			b43_controller_restart(dev, "DMA error");
 			return;
 		}
@@ -3960,6 +4001,7 @@
 	}
 
 	/* We are ready to run. */
+	ieee80211_wake_queues(dev->wl->hw);
 	b43_set_status(dev, B43_STAT_STARTED);
 
 	/* Start data flow (TX/RX). */
@@ -4350,7 +4392,7 @@
 
 	if ((dev->dev->bus->bustype == SSB_BUSTYPE_PCMCIA) ||
 	    (dev->dev->bus->bustype == SSB_BUSTYPE_SDIO) ||
-	    B43_FORCE_PIO) {
+	    dev->use_pio) {
 		dev->__using_pio_transfers = 1;
 		err = b43_pio_init(dev);
 	} else {
@@ -4369,8 +4411,6 @@
 
 	ieee80211_wake_queues(dev->wl->hw);
 
-	ieee80211_wake_queues(dev->wl->hw);
-
 	b43_set_status(dev, B43_STAT_INITIALIZED);
 
 out:
@@ -4820,6 +4860,7 @@
 	if (!wldev)
 		goto out;
 
+	wldev->use_pio = b43_modparam_pio;
 	wldev->dev = dev;
 	wldev->wl = wl;
 	b43_set_status(wldev, B43_STAT_UNINIT);
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/b43/xmit.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/b43/xmit.c
@@ -27,7 +27,7 @@
 
 */
 
-#include "b43.h"
+#include "xmit.h"
 #include "phy_common.h"
 #include "dma.h"
 #include "pio.h"
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/b43/Makefile
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/b43/Makefile
@@ -12,7 +12,7 @@
 b43-y				+= lo.o
 b43-y				+= wa.o
 b43-y				+= dma.o
-b43-$(CONFIG_B43_PIO)		+= pio.o
+b43-y				+= pio.o
 b43-y				+= rfkill.o
 b43-$(CONFIG_B43_LEDS)		+= leds.o
 b43-$(CONFIG_B43_PCMCIA)	+= pcmcia.o
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/b43/pio.h
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/b43/pio.h
@@ -55,8 +55,6 @@
 #define B43_PIO_MAX_NR_TXPACKETS	32
 
 
-#ifdef CONFIG_B43_PIO
-
 struct b43_pio_txpacket {
 	/* Pointer to the TX queue we belong to. */
 	struct b43_pio_txqueue *queue;
@@ -169,42 +167,4 @@
 void b43_pio_tx_suspend(struct b43_wldev *dev);
 void b43_pio_tx_resume(struct b43_wldev *dev);
 
-
-#else /* CONFIG_B43_PIO */
-
-
-static inline int b43_pio_init(struct b43_wldev *dev)
-{
-	return 0;
-}
-static inline void b43_pio_free(struct b43_wldev *dev)
-{
-}
-static inline void b43_pio_stop(struct b43_wldev *dev)
-{
-}
-static inline int b43_pio_tx(struct b43_wldev *dev,
-			     struct sk_buff *skb)
-{
-	return 0;
-}
-static inline void b43_pio_handle_txstatus(struct b43_wldev *dev,
-					   const struct b43_txstatus *status)
-{
-}
-static inline void b43_pio_get_tx_stats(struct b43_wldev *dev,
-					struct ieee80211_tx_queue_stats *stats)
-{
-}
-static inline void b43_pio_rx(struct b43_pio_rxqueue *q)
-{
-}
-static inline void b43_pio_tx_suspend(struct b43_wldev *dev)
-{
-}
-static inline void b43_pio_tx_resume(struct b43_wldev *dev)
-{
-}
-
-#endif /* CONFIG_B43_PIO */
 #endif /* B43_PIO_H_ */
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/b43/b43.h
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/b43/b43.h
@@ -117,6 +117,7 @@
 #define B43_MMIO_TSF_2			0x636	/* core rev < 3 only */
 #define B43_MMIO_TSF_3			0x638	/* core rev < 3 only */
 #define B43_MMIO_RNG			0x65A
+#define B43_MMIO_IFSSLOT		0x684	/* Interframe slot time */
 #define B43_MMIO_IFSCTL			0x688 /* Interframe space control */
 #define  B43_MMIO_IFSCTL_USE_EDCF	0x0004
 #define B43_MMIO_POWERUP_DELAY		0x6A8
@@ -695,6 +696,7 @@
 	bool radio_hw_enable;	/* saved state of radio hardware enabled state */
 	bool qos_enabled;		/* TRUE, if QoS is used. */
 	bool hwcrypto_enabled;		/* TRUE, if HW crypto acceleration is enabled. */
+	bool use_pio;			/* TRUE if next init should use PIO */
 
 	/* PHY/Radio device. */
 	struct b43_phy phy;
@@ -749,12 +751,6 @@
 #endif
 };
 
-/*
- * Include goes here to avoid a dependency problem.
- * A better fix would be to integrate xmit.h into b43.h.
- */
-#include "xmit.h"
-
 /* Data structure for the WLAN parts (802.11 cores) of the b43 chip. */
 struct b43_wl {
 	/* Pointer to the active wireless device on this chip */
@@ -829,15 +825,9 @@
 	/* The device LEDs. */
 	struct b43_leds leds;
 
-#ifdef CONFIG_B43_PIO
-	/*
-	 * RX/TX header/tail buffers used by the frame transmit functions.
-	 */
-	struct b43_rxhdr_fw4 rxhdr;
-	struct b43_txhdr txhdr;
-	u8 rx_tail[4];
-	u8 tx_tail[4];
-#endif /* CONFIG_B43_PIO */
+	/* Kmalloc'ed scratch space for PIO TX/RX. Protected by wl->mutex. */
+	u8 pio_scratchspace[110] __attribute__((__aligned__(8)));
+	u8 pio_tailspace[4] __attribute__((__aligned__(8)));
 };
 
 static inline struct b43_wl *hw_to_b43_wl(struct ieee80211_hw *hw)
@@ -888,20 +878,15 @@
 
 static inline bool b43_using_pio_transfers(struct b43_wldev *dev)
 {
-#ifdef CONFIG_B43_PIO
 	return dev->__using_pio_transfers;
-#else
-	return 0;
-#endif
 }
 
 #ifdef CONFIG_B43_FORCE_PIO
-# define B43_FORCE_PIO	1
+# define B43_PIO_DEFAULT 1
 #else
-# define B43_FORCE_PIO	0
+# define B43_PIO_DEFAULT 0
 #endif
 
-
 /* Message printing */
 void b43info(struct b43_wl *wl, const char *fmt, ...)
     __attribute__ ((format(printf, 2, 3)));
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/b43/dma.h
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/b43/dma.h
@@ -163,7 +163,7 @@
 /* DMA engine tuning knobs */
 #define B43_TXRING_SLOTS		256
 #define B43_RXRING_SLOTS		64
-#define B43_DMA0_RX_BUFFERSIZE		IEEE80211_MAX_FRAME_LEN
+#define B43_DMA0_RX_BUFFERSIZE		(B43_DMA0_RX_FRAMEOFFSET + IEEE80211_MAX_FRAME_LEN)
 
 
 struct sk_buff;
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/rt2x00/rt73usb.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/rt2x00/rt73usb.c
@@ -2068,7 +2068,6 @@
 	    IEEE80211_HW_SIGNAL_DBM |
 	    IEEE80211_HW_SUPPORTS_PS |
 	    IEEE80211_HW_PS_NULLFUNC_STACK;
-	rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
 
 	SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
 	SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
@@ -2311,6 +2310,7 @@
 	.eeprom_size	= EEPROM_SIZE,
 	.rf_size	= RF_SIZE,
 	.tx_queues	= NUM_TX_QUEUES,
+	.extra_tx_headroom = TXD_DESC_SIZE,
 	.rx		= &rt73usb_queue_rx,
 	.tx		= &rt73usb_queue_tx,
 	.bcn		= &rt73usb_queue_bcn,
@@ -2400,6 +2400,7 @@
 	{ USB_DEVICE(0x04bb, 0x093d), USB_DEVICE_DATA(&rt73usb_ops) },
 	{ USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt73usb_ops) },
 	{ USB_DEVICE(0x148f, 0x2671), USB_DEVICE_DATA(&rt73usb_ops) },
+	{ USB_DEVICE(0x0812, 0x3101), USB_DEVICE_DATA(&rt73usb_ops) },
 	/* Qcom */
 	{ USB_DEVICE(0x18e8, 0x6196), USB_DEVICE_DATA(&rt73usb_ops) },
 	{ USB_DEVICE(0x18e8, 0x6229), USB_DEVICE_DATA(&rt73usb_ops) },
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/rt2x00/rt2x00.h
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/rt2x00/rt2x00.h
@@ -112,6 +112,12 @@
 	(  ((unsigned long)((__skb)->data + (__header))) & 3 )
 
 /*
+ * Constants for extra TX headroom for alignment purposes.
+ */
+#define RT2X00_ALIGN_SIZE	4 /* Only whole frame needs alignment */
+#define RT2X00_L2PAD_SIZE	8 /* Both header & payload need alignment */
+
+/*
  * Standard timing and size defines.
  * These values should follow the ieee80211 specifications.
  */
@@ -579,6 +585,7 @@
 	const unsigned int eeprom_size;
 	const unsigned int rf_size;
 	const unsigned int tx_queues;
+	const unsigned int extra_tx_headroom;
 	const struct data_queue_desc *rx;
 	const struct data_queue_desc *tx;
 	const struct data_queue_desc *bcn;
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/rt2x00/rt61pci.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/rt2x00/rt61pci.c
@@ -2538,6 +2538,11 @@
 	unsigned int i;
 
 	/*
+	 * Disable powersaving as default.
+	 */
+	rt2x00dev->hw->wiphy->ps_default = false;
+
+	/*
 	 * Initialize all hw fields.
 	 */
 	rt2x00dev->hw->flags =
@@ -2545,7 +2550,6 @@
 	    IEEE80211_HW_SIGNAL_DBM |
 	    IEEE80211_HW_SUPPORTS_PS |
 	    IEEE80211_HW_PS_NULLFUNC_STACK;
-	rt2x00dev->hw->extra_tx_headroom = 0;
 
 	SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
 	SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
@@ -2793,6 +2797,7 @@
 	.eeprom_size	= EEPROM_SIZE,
 	.rf_size	= RF_SIZE,
 	.tx_queues	= NUM_TX_QUEUES,
+	.extra_tx_headroom = 0,
 	.rx		= &rt61pci_queue_rx,
 	.tx		= &rt61pci_queue_tx,
 	.bcn		= &rt61pci_queue_bcn,
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/rt2x00/rt2400pci.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/rt2x00/rt2400pci.c
@@ -1431,7 +1431,6 @@
 			       IEEE80211_HW_SIGNAL_DBM |
 			       IEEE80211_HW_SUPPORTS_PS |
 			       IEEE80211_HW_PS_NULLFUNC_STACK;
-	rt2x00dev->hw->extra_tx_headroom = 0;
 
 	SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
 	SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
@@ -1628,6 +1627,7 @@
 	.eeprom_size	= EEPROM_SIZE,
 	.rf_size	= RF_SIZE,
 	.tx_queues	= NUM_TX_QUEUES,
+	.extra_tx_headroom = 0,
 	.rx		= &rt2400pci_queue_rx,
 	.tx		= &rt2400pci_queue_tx,
 	.bcn		= &rt2400pci_queue_bcn,
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/rt2x00/rt2500pci.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/rt2x00/rt2500pci.c
@@ -1732,8 +1732,6 @@
 			       IEEE80211_HW_SUPPORTS_PS |
 			       IEEE80211_HW_PS_NULLFUNC_STACK;
 
-	rt2x00dev->hw->extra_tx_headroom = 0;
-
 	SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
 	SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
 				rt2x00_eeprom_addr(rt2x00dev,
@@ -1927,6 +1925,7 @@
 	.eeprom_size	= EEPROM_SIZE,
 	.rf_size	= RF_SIZE,
 	.tx_queues	= NUM_TX_QUEUES,
+	.extra_tx_headroom = 0,
 	.rx		= &rt2500pci_queue_rx,
 	.tx		= &rt2500pci_queue_tx,
 	.bcn		= &rt2500pci_queue_bcn,
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/rt2x00/rt2x00queue.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/rt2x00/rt2x00queue.c
@@ -103,7 +103,7 @@
 	 * is also mapped to the DMA so it can be used for transfering
 	 * additional descriptor information to the hardware.
 	 */
-	skb_push(skb, rt2x00dev->hw->extra_tx_headroom);
+	skb_push(skb, rt2x00dev->ops->extra_tx_headroom);
 
 	skbdesc->skb_dma =
 	    dma_map_single(rt2x00dev->dev, skb->data, skb->len, DMA_TO_DEVICE);
@@ -111,7 +111,7 @@
 	/*
 	 * Restore data pointer to original location again.
 	 */
-	skb_pull(skb, rt2x00dev->hw->extra_tx_headroom);
+	skb_pull(skb, rt2x00dev->ops->extra_tx_headroom);
 
 	skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
 }
@@ -133,7 +133,7 @@
 		 * by the driver, but it was actually mapped to DMA.
 		 */
 		dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma,
-				 skb->len + rt2x00dev->hw->extra_tx_headroom,
+				 skb->len + rt2x00dev->ops->extra_tx_headroom,
 				 DMA_TO_DEVICE);
 		skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
 	}
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/rt2x00/rt2500usb.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/rt2x00/rt2500usb.c
@@ -347,6 +347,7 @@
 	int timeout;
 	u32 mask;
 	u16 reg;
+	enum cipher curr_cipher;
 
 	if (crypto->cmd == SET_KEY) {
 		/*
@@ -357,6 +358,7 @@
 		mask = TXRX_CSR0_KEY_ID.bit_mask;
 
 		rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
+		curr_cipher = rt2x00_get_field16(reg, TXRX_CSR0_ALGORITHM);
 		reg &= mask;
 
 		if (reg && reg == mask)
@@ -365,6 +367,14 @@
 		reg = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
 
 		key->hw_key_idx += reg ? ffz(reg) : 0;
+		/*
+		 * Hardware requires that all keys use the same cipher
+		 * (e.g. TKIP-only, AES-only, but not TKIP+AES).
+		 * If this is not the first key, compare the cipher with the
+		 * first one and fall back to SW crypto if not the same.
+		 */
+		if (key->hw_key_idx > 0 && crypto->cipher != curr_cipher)
+			return -EOPNOTSUPP;
 
 		/*
 		 * The encryption key doesn't fit within the CSR cache,
@@ -1788,8 +1798,6 @@
 	    IEEE80211_HW_SUPPORTS_PS |
 	    IEEE80211_HW_PS_NULLFUNC_STACK;
 
-	rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
-
 	SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
 	SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
 				rt2x00_eeprom_addr(rt2x00dev,
@@ -1962,6 +1970,7 @@
 	.eeprom_size	= EEPROM_SIZE,
 	.rf_size	= RF_SIZE,
 	.tx_queues	= NUM_TX_QUEUES,
+	.extra_tx_headroom = TXD_DESC_SIZE,
 	.rx		= &rt2500usb_queue_rx,
 	.tx		= &rt2500usb_queue_tx,
 	.bcn		= &rt2500usb_queue_bcn,
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/rt2x00/rt2x00dev.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/rt2x00/rt2x00dev.c
@@ -684,6 +684,21 @@
 	rt2x00dev->hw->queues = rt2x00dev->ops->tx_queues;
 
 	/*
+	 * Initialize extra TX headroom required.
+	 */
+	rt2x00dev->hw->extra_tx_headroom =
+		max_t(unsigned int, IEEE80211_TX_STATUS_HEADROOM,
+		      rt2x00dev->ops->extra_tx_headroom);
+
+	/*
+	 * Take TX headroom required for alignment into account.
+	 */
+	if (test_bit(DRIVER_REQUIRE_L2PAD, &rt2x00dev->flags))
+		rt2x00dev->hw->extra_tx_headroom += RT2X00_L2PAD_SIZE;
+	else if (test_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags))
+		rt2x00dev->hw->extra_tx_headroom += RT2X00_ALIGN_SIZE;
+
+	/*
 	 * Register HW.
 	 */
 	status = ieee80211_register_hw(rt2x00dev->hw);
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/rt2x00/rt2800usb.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/rt2x00/rt2800usb.c
@@ -2509,7 +2509,6 @@
 	    IEEE80211_HW_SIGNAL_DBM |
 	    IEEE80211_HW_SUPPORTS_PS |
 	    IEEE80211_HW_PS_NULLFUNC_STACK;
-	rt2x00dev->hw->extra_tx_headroom = TXINFO_DESC_SIZE + TXWI_DESC_SIZE;
 
 	SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
 	SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
@@ -2858,6 +2857,7 @@
 	.eeprom_size	= EEPROM_SIZE,
 	.rf_size	= RF_SIZE,
 	.tx_queues	= NUM_TX_QUEUES,
+	.extra_tx_headroom = TXINFO_DESC_SIZE + TXWI_DESC_SIZE,
 	.rx		= &rt2800usb_queue_rx,
 	.tx		= &rt2800usb_queue_tx,
 	.bcn		= &rt2800usb_queue_bcn,
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/libertas/cmd.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/libertas/cmd.c
@@ -1758,8 +1758,8 @@
 				    cpu_to_le16(CMD_SUBCMD_EXIT_PS)) {
 					lbs_deb_host(
 					       "EXEC_NEXT_CMD: ignore ENTER_PS cmd\n");
-					list_del(&cmdnode->list);
 					spin_lock_irqsave(&priv->driver_lock, flags);
+					list_del(&cmdnode->list);
 					lbs_complete_command(priv, cmdnode, 0);
 					spin_unlock_irqrestore(&priv->driver_lock, flags);
 
@@ -1771,8 +1771,8 @@
 				    (priv->psstate == PS_STATE_PRE_SLEEP)) {
 					lbs_deb_host(
 					       "EXEC_NEXT_CMD: ignore EXIT_PS cmd in sleep\n");
-					list_del(&cmdnode->list);
 					spin_lock_irqsave(&priv->driver_lock, flags);
+					list_del(&cmdnode->list);
 					lbs_complete_command(priv, cmdnode, 0);
 					spin_unlock_irqrestore(&priv->driver_lock, flags);
 					priv->needtowakeup = 1;
@@ -1785,7 +1785,9 @@
 				       "EXEC_NEXT_CMD: sending EXIT_PS\n");
 			}
 		}
+		spin_lock_irqsave(&priv->driver_lock, flags);
 		list_del(&cmdnode->list);
+		spin_unlock_irqrestore(&priv->driver_lock, flags);
 		lbs_deb_host("EXEC_NEXT_CMD: sending command 0x%04x\n",
 			    le16_to_cpu(cmd->command));
 		lbs_submit_command(priv, cmdnode);
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/libertas/wext.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/libertas/wext.c
@@ -1953,10 +1953,8 @@
 	if (priv->connect_status == LBS_CONNECTED) {
 		memcpy(extra, priv->curbssparams.ssid,
 		       priv->curbssparams.ssid_len);
-		extra[priv->curbssparams.ssid_len] = '\0';
 	} else {
 		memset(extra, 0, 32);
-		extra[priv->curbssparams.ssid_len] = '\0';
 	}
 	/*
 	 * If none, we may want to get the one that was set
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/libertas/if_sdio.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/libertas/if_sdio.c
@@ -34,6 +34,8 @@
 #include <linux/mmc/card.h>
 #include <linux/mmc/sdio_func.h>
 #include <linux/mmc/sdio_ids.h>
+#include <linux/mmc/sdio.h>
+#include <linux/mmc/host.h>
 
 #include "host.h"
 #include "decl.h"
@@ -883,6 +885,7 @@
 	int ret, i;
 	unsigned int model;
 	struct if_sdio_packet *packet;
+	struct mmc_host *host = func->card->host;
 
 	lbs_deb_enter(LBS_DEB_SDIO);
 
@@ -963,6 +966,25 @@
 	if (ret)
 		goto disable;
 
+	/* For 1-bit transfers to the 8686 model, we need to enable the
+	 * interrupt flag in the CCCR register. Set the MMC_QUIRK_LENIENT_FN0
+	 * bit to allow access to non-vendor registers. */
+	if ((card->model == IF_SDIO_MODEL_8686) &&
+	    (host->caps & MMC_CAP_SDIO_IRQ) &&
+	    (host->ios.bus_width == MMC_BUS_WIDTH_1)) {
+		u8 reg;
+
+		func->card->quirks |= MMC_QUIRK_LENIENT_FN0;
+		reg = sdio_f0_readb(func, SDIO_CCCR_IF, &ret);
+		if (ret)
+			goto release_int;
+
+		reg |= SDIO_BUS_ECSI;
+		sdio_f0_writeb(func, reg, SDIO_CCCR_IF, &ret);
+		if (ret)
+			goto release_int;
+	}
+
 	card->ioport = sdio_readb(func, IF_SDIO_IOPORT, &ret);
 	if (ret)
 		goto release_int;
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/libertas/scan.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/libertas/scan.c
@@ -399,11 +399,8 @@
 	chan_count = lbs_scan_create_channel_list(priv, chan_list);
 
 	netif_stop_queue(priv->dev);
-	netif_carrier_off(priv->dev);
-	if (priv->mesh_dev) {
+	if (priv->mesh_dev)
 		netif_stop_queue(priv->mesh_dev);
-		netif_carrier_off(priv->mesh_dev);
-	}
 
 	/* Prepare to continue an interrupted scan */
 	lbs_deb_scan("chan_count %d, scan_channel %d\n",
@@ -467,16 +464,13 @@
 	priv->scan_channel = 0;
 
 out:
-	if (priv->connect_status == LBS_CONNECTED) {
-		netif_carrier_on(priv->dev);
-		if (!priv->tx_pending_len)
-			netif_wake_queue(priv->dev);
-	}
-	if (priv->mesh_dev && (priv->mesh_connect_status == LBS_CONNECTED)) {
-		netif_carrier_on(priv->mesh_dev);
-		if (!priv->tx_pending_len)
-			netif_wake_queue(priv->mesh_dev);
-	}
+	if (priv->connect_status == LBS_CONNECTED && !priv->tx_pending_len)
+		netif_wake_queue(priv->dev);
+
+	if (priv->mesh_dev && (priv->mesh_connect_status == LBS_CONNECTED) &&
+	    !priv->tx_pending_len)
+		netif_wake_queue(priv->mesh_dev);
+
 	kfree(chan_list);
 
 	lbs_deb_leave_args(LBS_DEB_SCAN, "ret %d", ret);
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/iwlwifi/iwl-rx.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/iwlwifi/iwl-rx.c
@@ -345,10 +345,10 @@
 		}
 	}
 
-	pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
-			    rxq->dma_addr);
-	pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
-			    rxq->rb_stts, rxq->rb_stts_dma);
+	dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
+			  rxq->dma_addr);
+	dma_free_coherent(&priv->pci_dev->dev, sizeof(struct iwl_rb_status),
+			  rxq->rb_stts, rxq->rb_stts_dma);
 	rxq->bd = NULL;
 	rxq->rb_stts  = NULL;
 }
@@ -357,7 +357,7 @@
 int iwl_rx_queue_alloc(struct iwl_priv *priv)
 {
 	struct iwl_rx_queue *rxq = &priv->rxq;
-	struct pci_dev *dev = priv->pci_dev;
+	struct device *dev = &priv->pci_dev->dev;
 	int i;
 
 	spin_lock_init(&rxq->lock);
@@ -365,12 +365,13 @@
 	INIT_LIST_HEAD(&rxq->rx_used);
 
 	/* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
-	rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
+	rxq->bd = dma_alloc_coherent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr,
+				     GFP_KERNEL);
 	if (!rxq->bd)
 		goto err_bd;
 
-	rxq->rb_stts = pci_alloc_consistent(dev, sizeof(struct iwl_rb_status),
-					&rxq->rb_stts_dma);
+	rxq->rb_stts = dma_alloc_coherent(dev, sizeof(struct iwl_rb_status),
+					  &rxq->rb_stts_dma, GFP_KERNEL);
 	if (!rxq->rb_stts)
 		goto err_rb;
 
@@ -387,8 +388,8 @@
 	return 0;
 
 err_rb:
-	pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
-			    rxq->dma_addr);
+	dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
+			  rxq->dma_addr);
 err_bd:
 	return -ENOMEM;
 }
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/iwlwifi/iwl-eeprom.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/iwlwifi/iwl-eeprom.c
@@ -337,7 +337,7 @@
 	return ret;
 }
 
-static int iwl_read_otp_word(struct iwl_priv *priv, u16 addr, u16 *eeprom_data)
+static int iwl_read_otp_word(struct iwl_priv *priv, u16 addr, __le16 *eeprom_data)
 {
 	int ret = 0;
 	u32 r;
@@ -370,7 +370,7 @@
 				CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK);
 		IWL_ERR(priv, "Correctable OTP ECC error, continue read\n");
 	}
-	*eeprom_data = le16_to_cpu((__force __le16)(r >> 16));
+	*eeprom_data = cpu_to_le16(r >> 16);
 	return 0;
 }
 
@@ -379,7 +379,8 @@
  */
 static bool iwl_is_otp_empty(struct iwl_priv *priv)
 {
-	u16 next_link_addr = 0, link_value;
+	u16 next_link_addr = 0;
+	__le16 link_value;
 	bool is_empty = false;
 
 	/* locate the beginning of OTP link list */
@@ -409,7 +410,8 @@
 static int iwl_find_otp_image(struct iwl_priv *priv,
 					u16 *validblockaddr)
 {
-	u16 next_link_addr = 0, link_value = 0, valid_addr;
+	u16 next_link_addr = 0, valid_addr;
+	__le16 link_value = 0;
 	int usedblocks = 0;
 
 	/* set addressing mode to absolute to traverse the link list */
@@ -429,7 +431,7 @@
 		 * check for more block on the link list
 		 */
 		valid_addr = next_link_addr;
-		next_link_addr = link_value * sizeof(u16);
+		next_link_addr = le16_to_cpu(link_value) * sizeof(u16);
 		IWL_DEBUG_INFO(priv, "OTP blocks %d addr 0x%x\n",
 			       usedblocks, next_link_addr);
 		if (iwl_read_otp_word(priv, next_link_addr, &link_value))
@@ -463,7 +465,7 @@
  */
 int iwl_eeprom_init(struct iwl_priv *priv)
 {
-	u16 *e;
+	__le16 *e;
 	u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
 	int sz;
 	int ret;
@@ -482,7 +484,7 @@
 		ret = -ENOMEM;
 		goto alloc_err;
 	}
-	e = (u16 *)priv->eeprom;
+	e = (__le16 *)priv->eeprom;
 
 	ret = priv->cfg->ops->lib->eeprom_ops.verify_signature(priv);
 	if (ret < 0) {
@@ -521,7 +523,7 @@
 		}
 		for (addr = validblockaddr; addr < validblockaddr + sz;
 		     addr += sizeof(u16)) {
-			u16 eeprom_data;
+			__le16 eeprom_data;
 
 			ret = iwl_read_otp_word(priv, addr, &eeprom_data);
 			if (ret)
@@ -545,7 +547,7 @@
 				goto done;
 			}
 			r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
-			e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
+			e[addr / 2] = cpu_to_le16(r >> 16);
 		}
 	}
 	ret = 0;
@@ -709,7 +711,8 @@
 	ch_info->ht40_min_power = 0;
 	ch_info->ht40_scan_power = eeprom_ch->max_power_avg;
 	ch_info->ht40_flags = eeprom_ch->flags;
-	ch_info->ht40_extension_channel &= ~clear_ht40_extension_channel;
+	if (eeprom_ch->flags & EEPROM_CHANNEL_VALID)
+		ch_info->ht40_extension_channel &= ~clear_ht40_extension_channel;
 
 	return 0;
 }
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/iwlwifi/iwl-scan.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/iwlwifi/iwl-scan.c
@@ -405,21 +405,6 @@
 
 static int iwl_scan_initiate(struct iwl_priv *priv)
 {
-	if (!iwl_is_ready_rf(priv)) {
-		IWL_DEBUG_SCAN(priv, "Aborting scan due to not ready.\n");
-		return -EIO;
-	}
-
-	if (test_bit(STATUS_SCANNING, &priv->status)) {
-		IWL_DEBUG_SCAN(priv, "Scan already in progress.\n");
-		return -EAGAIN;
-	}
-
-	if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
-		IWL_DEBUG_SCAN(priv, "Scan request while abort pending\n");
-		return -EAGAIN;
-	}
-
 	IWL_DEBUG_INFO(priv, "Starting scan...\n");
 	set_bit(STATUS_SCANNING, &priv->status);
 	priv->scan_start = jiffies;
@@ -450,6 +435,18 @@
 		goto out_unlock;
 	}
 
+	if (test_bit(STATUS_SCANNING, &priv->status)) {
+		IWL_DEBUG_SCAN(priv, "Scan already in progress.\n");
+		ret = -EAGAIN;
+		goto out_unlock;
+	}
+
+	if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
+		IWL_DEBUG_SCAN(priv, "Scan request while abort pending\n");
+		ret = -EAGAIN;
+		goto out_unlock;
+	}
+
 	/* We don't schedule scan within next_scan_jiffies period.
 	 * Avoid scanning during possible EAPOL exchange, return
 	 * success immediately.
@@ -500,11 +497,10 @@
 		return;
 
 	mutex_lock(&priv->mutex);
-	if (test_bit(STATUS_SCANNING, &priv->status) ||
-	    test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
-		IWL_DEBUG_SCAN(priv, "Scan completion watchdog resetting "
-			"adapter (%dms)\n",
-			jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
+	if (test_bit(STATUS_SCANNING, &priv->status) &&
+	    !test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
+		IWL_DEBUG_SCAN(priv, "Scan completion watchdog (%dms)\n",
+			       jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
 
 		if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
 			iwl_send_scan_abort(priv);
@@ -800,11 +796,11 @@
 	    !test_bit(STATUS_GEO_CONFIGURED, &priv->status))
 		return;
 
-	mutex_lock(&priv->mutex);
-
-	set_bit(STATUS_SCAN_ABORTING, &priv->status);
-	iwl_send_scan_abort(priv);
+	cancel_delayed_work(&priv->scan_check);
 
+	mutex_lock(&priv->mutex);
+	if (test_bit(STATUS_SCAN_ABORTING, &priv->status))
+		iwl_send_scan_abort(priv);
 	mutex_unlock(&priv->mutex);
 }
 EXPORT_SYMBOL(iwl_bg_abort_scan);
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/iwlwifi/iwl-dev.h
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/iwlwifi/iwl-dev.h
@@ -53,9 +53,10 @@
 extern struct iwl_cfg iwl5300_agn_cfg;
 extern struct iwl_cfg iwl5100_agn_cfg;
 extern struct iwl_cfg iwl5350_agn_cfg;
-extern struct iwl_cfg iwl5100_bg_cfg;
+extern struct iwl_cfg iwl5100_bgn_cfg;
 extern struct iwl_cfg iwl5100_abg_cfg;
 extern struct iwl_cfg iwl5150_agn_cfg;
+extern struct iwl_cfg iwl5150_abg_cfg;
 extern struct iwl_cfg iwl6000h_2agn_cfg;
 extern struct iwl_cfg iwl6000i_2agn_cfg;
 extern struct iwl_cfg iwl6000_3agn_cfg;
@@ -703,7 +704,7 @@
 extern int iwl_queue_space(const struct iwl_queue *q);
 static inline int iwl_queue_used(const struct iwl_queue *q, int i)
 {
-	return q->write_ptr > q->read_ptr ?
+	return q->write_ptr >= q->read_ptr ?
 		(i >= q->read_ptr && i < q->write_ptr) :
 		!(i < q->read_ptr && i >= q->write_ptr);
 }
@@ -1149,7 +1150,7 @@
 	u32 last_beacon_time;
 	u64 last_tsf;
 
-	/* eeprom */
+	/* eeprom -- this is in the card's little endian byte order */
 	u8 *eeprom;
 	int    nvm_device_type;
 	struct iwl_eeprom_calib_info *calib_info;
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/iwlwifi/iwl-4965.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/iwlwifi/iwl-4965.c
@@ -715,6 +715,13 @@
 
 	iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
 
+	/* make sure all queue are not stopped */
+	memset(&priv->queue_stopped[0], 0, sizeof(priv->queue_stopped));
+	for (i = 0; i < 4; i++)
+		atomic_set(&priv->queue_stop_count[i], 0);
+
+	/* reset to 0 to enable all the queue first */
+	priv->txq_ctx_active_msk = 0;
 	/* Map each Tx/cmd queue to its corresponding fifo */
 	for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
 		int ac = default_queue_to_tx_fifo[i];
@@ -1337,7 +1344,7 @@
 	iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
 
 	/* calculate tx gain adjustment based on power supply voltage */
-	voltage = priv->calib_info->voltage;
+	voltage = le16_to_cpu(priv->calib_info->voltage);
 	init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
 	voltage_compensation =
 	    iwl4965_get_voltage_compensation(voltage, init_voltage);
@@ -2087,7 +2094,7 @@
 	struct ieee80211_tx_info *info;
 	struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
 	u32  status = le32_to_cpu(tx_resp->u.status);
-	int tid = MAX_TID_COUNT;
+	int tid = MAX_TID_COUNT - 1;
 	int sta_id;
 	int freed;
 	u8 *qc = NULL;
@@ -2134,7 +2141,9 @@
 			IWL_DEBUG_TX_REPLY(priv, "Retry scheduler reclaim scd_ssn "
 					   "%d index %d\n", scd_ssn , index);
 			freed = iwl_tx_queue_reclaim(priv, txq_id, index);
-			priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
+			if (qc)
+				iwl_free_tfds_in_queue(priv, sta_id,
+						       tid, freed);
 
 			if (priv->mac80211_registered &&
 			    (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
@@ -2162,13 +2171,14 @@
 
 		freed = iwl_tx_queue_reclaim(priv, txq_id, index);
 		if (qc && likely(sta_id != IWL_INVALID_STATION))
-			priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
+			iwl_free_tfds_in_queue(priv, sta_id, tid, freed);
+		else if (sta_id == IWL_INVALID_STATION)
+			IWL_DEBUG_TX_REPLY(priv, "Station not known\n");
 
 		if (priv->mac80211_registered &&
 		    (iwl_queue_space(&txq->q) > txq->q.low_mark))
 			iwl_wake_queue(priv, txq_id);
 	}
-
 	if (qc && likely(sta_id != IWL_INVALID_STATION))
 		iwl_txq_check_empty(priv, sta_id, tid, txq_id);
 
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/iwlwifi/iwl-5000-hw.h
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/iwlwifi/iwl-5000-hw.h
@@ -92,11 +92,15 @@
 
 static inline s32 iwl_temp_calib_to_offset(struct iwl_priv *priv)
 {
-	u16 *temp_calib = (u16 *)iwl_eeprom_query_addr(priv,
-						       EEPROM_5000_TEMPERATURE);
-	/* offset =  temperature -  voltage / coef */
-	s32 offset = (s32)(temp_calib[0] - temp_calib[1] / IWL_5150_VOLTAGE_TO_TEMPERATURE_COEFF);
-	return offset;
+	u16 temperature, voltage;
+	__le16 *temp_calib =
+		(__le16 *)iwl_eeprom_query_addr(priv, EEPROM_5000_TEMPERATURE);
+
+	temperature = le16_to_cpu(temp_calib[0]);
+	voltage = le16_to_cpu(temp_calib[1]);
+
+	/* offset = temp - volt / coeff */
+	return (s32)(temperature - voltage / IWL_5150_VOLTAGE_TO_TEMPERATURE_COEFF);
 }
 
 /* Fixed (non-configurable) rx data from phy */
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/iwlwifi/iwl-agn-rs.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/iwlwifi/iwl-agn-rs.c
@@ -402,10 +402,23 @@
 				      struct iwl_lq_sta *lq_data, u8 tid,
 				      struct ieee80211_sta *sta)
 {
+	int ret;
+
 	if (rs_tl_get_load(lq_data, tid) > IWL_AGG_LOAD_THRESHOLD) {
 		IWL_DEBUG_HT(priv, "Starting Tx agg: STA: %pM tid: %d\n",
 				sta->addr, tid);
-		ieee80211_start_tx_ba_session(priv->hw, sta->addr, tid);
+		ret = ieee80211_start_tx_ba_session(priv->hw, sta->addr, tid);
+		if (ret == -EAGAIN) {
+			/*
+			 * driver and mac80211 is out of sync
+			 * this might be cause by reloading firmware
+			 * stop the tx ba session here
+			 */
+			IWL_DEBUG_HT(priv, "Fail start Tx agg on tid: %d\n",
+				tid);
+			ret = ieee80211_stop_tx_ba_session(priv->hw, sta->addr, tid,
+						WLAN_BACK_INITIATOR);
+		}
 	}
 }
 
@@ -2180,9 +2193,12 @@
 
 	/* Else we have enough samples; calculate estimate of
 	 * actual average throughput */
-
-	BUG_ON(window->average_tpt != ((window->success_ratio *
-			tbl->expected_tpt[index] + 64) / 128));
+	if (window->average_tpt != ((window->success_ratio *
+			tbl->expected_tpt[index] + 64) / 128)) {
+		IWL_ERR(priv, "expected_tpt should have been calculated by now\n");
+		window->average_tpt = ((window->success_ratio *
+					tbl->expected_tpt[index] + 64) / 128);
+	}
 
 	/* If we are searching for better modulation mode, check success. */
 	if (lq_sta->search_better_tbl &&
@@ -2808,7 +2824,7 @@
 		repeat_rate--;
 	}
 
-	lq_cmd->agg_params.agg_frame_cnt_limit = LINK_QUAL_AGG_FRAME_LIMIT_MAX;
+	lq_cmd->agg_params.agg_frame_cnt_limit = LINK_QUAL_AGG_FRAME_LIMIT_DEF;
 	lq_cmd->agg_params.agg_dis_start_th = LINK_QUAL_AGG_DISABLE_START_DEF;
 	lq_cmd->agg_params.agg_time_limit =
 		cpu_to_le16(LINK_QUAL_AGG_TIME_LIMIT_DEF);
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/iwlwifi/iwl-eeprom.h
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/iwlwifi/iwl-eeprom.h
@@ -133,7 +133,7 @@
  *
  */
 struct iwl_eeprom_enhanced_txpwr {
-	u16 reserved;
+	__le16 common;
 	s8 chain_a_max;
 	s8 chain_b_max;
 	s8 chain_c_max;
@@ -347,7 +347,7 @@
 struct iwl_eeprom_calib_info {
 	u8 saturation_power24;	/* half-dBm (e.g. "34" = 17 dBm) */
 	u8 saturation_power52;	/* half-dBm */
-	s16 voltage;		/* signed */
+	__le16 voltage;		/* signed */
 	struct iwl_eeprom_calib_subband_info
 		band_info[EEPROM_TX_POWER_BANDS];
 } __attribute__ ((packed));
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/iwlwifi/iwl-core.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/iwlwifi/iwl-core.c
@@ -1598,9 +1598,9 @@
 void iwl_free_isr_ict(struct iwl_priv *priv)
 {
 	if (priv->ict_tbl_vir) {
-		pci_free_consistent(priv->pci_dev, (sizeof(u32) * ICT_COUNT) +
-					PAGE_SIZE, priv->ict_tbl_vir,
-					priv->ict_tbl_dma);
+		dma_free_coherent(&priv->pci_dev->dev,
+				  (sizeof(u32) * ICT_COUNT) + PAGE_SIZE,
+				  priv->ict_tbl_vir, priv->ict_tbl_dma);
 		priv->ict_tbl_vir = NULL;
 	}
 }
@@ -1616,9 +1616,9 @@
 	if (priv->cfg->use_isr_legacy)
 		return 0;
 	/* allocate shrared data table */
-	priv->ict_tbl_vir = pci_alloc_consistent(priv->pci_dev, (sizeof(u32) *
-						  ICT_COUNT) + PAGE_SIZE,
-						  &priv->ict_tbl_dma);
+	priv->ict_tbl_vir = dma_alloc_coherent(&priv->pci_dev->dev,
+					(sizeof(u32) * ICT_COUNT) + PAGE_SIZE,
+					&priv->ict_tbl_dma, GFP_KERNEL);
 	if (!priv->ict_tbl_vir)
 		return -ENOMEM;
 
@@ -2646,6 +2646,7 @@
 			priv->staging_rxon.flags = 0;
 
 		iwl_set_rxon_channel(priv, conf->channel);
+		iwl_set_rxon_ht(priv, ht_conf);
 
 		iwl_set_flags_for_band(priv, conf->channel->band);
 		spin_unlock_irqrestore(&priv->lock, flags);
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/iwlwifi/iwl-5000.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/iwlwifi/iwl-5000.c
@@ -460,14 +460,15 @@
 static int iwl5000_set_Xtal_calib(struct iwl_priv *priv)
 {
 	struct iwl_calib_xtal_freq_cmd cmd;
-	u16 *xtal_calib = (u16 *)iwl_eeprom_query_addr(priv, EEPROM_5000_XTAL);
+	__le16 *xtal_calib =
+		(__le16 *)iwl_eeprom_query_addr(priv, EEPROM_5000_XTAL);
 
 	cmd.hdr.op_code = IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD;
 	cmd.hdr.first_group = 0;
 	cmd.hdr.groups_num = 1;
 	cmd.hdr.data_valid = 1;
-	cmd.cap_pin1 = (u8)xtal_calib[0];
-	cmd.cap_pin2 = (u8)xtal_calib[1];
+	cmd.cap_pin1 = le16_to_cpu(xtal_calib[0]);
+	cmd.cap_pin2 = le16_to_cpu(xtal_calib[1]);
 	return iwl_calib_set(&priv->calib_results[IWL_CALIB_XTAL],
 			     (u8 *)&cmd, sizeof(cmd));
 }
@@ -792,6 +793,13 @@
 
 	iwl5000_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
 
+	/* make sure all queue are not stopped */
+	memset(&priv->queue_stopped[0], 0, sizeof(priv->queue_stopped));
+	for (i = 0; i < 4; i++)
+		atomic_set(&priv->queue_stop_count[i], 0);
+
+	/* reset to 0 to enable all the queue first */
+	priv->txq_ctx_active_msk = 0;
 	/* map qos queues to fifos one-to-one */
 	for (i = 0; i < ARRAY_SIZE(iwl5000_default_queue_to_tx_fifo); i++) {
 		int ac = iwl5000_default_queue_to_tx_fifo[i];
@@ -1263,7 +1271,7 @@
 					scd_ssn , index, txq_id, txq->swq_id);
 
 			freed = iwl_tx_queue_reclaim(priv, txq_id, index);
-			priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
+			iwl_free_tfds_in_queue(priv, sta_id, tid, freed);
 
 			if (priv->mac80211_registered &&
 			    (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
@@ -1292,16 +1300,14 @@
 				   tx_resp->failure_frame);
 
 		freed = iwl_tx_queue_reclaim(priv, txq_id, index);
-		if (ieee80211_is_data_qos(tx_resp->frame_ctrl))
-			priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
+		iwl_free_tfds_in_queue(priv, sta_id, tid, freed);
 
 		if (priv->mac80211_registered &&
 		    (iwl_queue_space(&txq->q) > txq->q.low_mark))
 			iwl_wake_queue(priv, txq_id);
 	}
 
-	if (ieee80211_is_data_qos(tx_resp->frame_ctrl))
-		iwl_txq_check_empty(priv, sta_id, tid, txq_id);
+	iwl_txq_check_empty(priv, sta_id, tid, txq_id);
 
 	if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
 		IWL_ERR(priv, "TODO:  Implement Tx ABORT REQUIRED!!!\n");
@@ -1665,14 +1671,15 @@
 	.valid_rx_ant = ANT_ABC,
 	.need_pll_cfg = true,
 	.ht_greenfield_support = true,
+	.use_rts_for_ht = true, /* use rts/cts protection */
 };
 
-struct iwl_cfg iwl5100_bg_cfg = {
-	.name = "5100BG",
+struct iwl_cfg iwl5100_bgn_cfg = {
+	.name = "5100BGN",
 	.fw_name_pre = IWL5000_FW_PRE,
 	.ucode_api_max = IWL5000_UCODE_API_MAX,
 	.ucode_api_min = IWL5000_UCODE_API_MIN,
-	.sku = IWL_SKU_G,
+	.sku = IWL_SKU_G|IWL_SKU_N,
 	.ops = &iwl5000_ops,
 	.eeprom_size = IWL_5000_EEPROM_IMG_SIZE,
 	.eeprom_ver = EEPROM_5000_EEPROM_VERSION,
@@ -1698,7 +1705,6 @@
 	.valid_tx_ant = ANT_B,
 	.valid_rx_ant = ANT_AB,
 	.need_pll_cfg = true,
-	.ht_greenfield_support = true,
 };
 
 struct iwl_cfg iwl5100_agn_cfg = {
@@ -1716,6 +1722,7 @@
 	.valid_rx_ant = ANT_AB,
 	.need_pll_cfg = true,
 	.ht_greenfield_support = true,
+	.use_rts_for_ht = true, /* use rts/cts protection */
 };
 
 struct iwl_cfg iwl5350_agn_cfg = {
@@ -1733,6 +1740,7 @@
 	.valid_rx_ant = ANT_ABC,
 	.need_pll_cfg = true,
 	.ht_greenfield_support = true,
+	.use_rts_for_ht = true, /* use rts/cts protection */
 };
 
 struct iwl_cfg iwl5150_agn_cfg = {
@@ -1750,6 +1758,23 @@
 	.valid_rx_ant = ANT_AB,
 	.need_pll_cfg = true,
 	.ht_greenfield_support = true,
+	.use_rts_for_ht = true, /* use rts/cts protection */
+};
+
+struct iwl_cfg iwl5150_abg_cfg = {
+	.name = "5150ABG",
+	.fw_name_pre = IWL5150_FW_PRE,
+	.ucode_api_max = IWL5150_UCODE_API_MAX,
+	.ucode_api_min = IWL5150_UCODE_API_MIN,
+	.sku = IWL_SKU_A|IWL_SKU_G,
+	.ops = &iwl5150_ops,
+	.eeprom_size = IWL_5000_EEPROM_IMG_SIZE,
+	.eeprom_ver = EEPROM_5050_EEPROM_VERSION,
+	.eeprom_calib_ver = EEPROM_5050_TX_POWER_VERSION,
+	.mod_params = &iwl50_mod_params,
+	.valid_tx_ant = ANT_A,
+	.valid_rx_ant = ANT_AB,
+	.need_pll_cfg = true,
 };
 
 MODULE_FIRMWARE(IWL5000_MODULE_FIRMWARE(IWL5000_UCODE_API_MAX));
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/iwlwifi/iwl3945-base.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/iwlwifi/iwl3945-base.c
@@ -356,10 +356,10 @@
 static void iwl3945_unset_hw_params(struct iwl_priv *priv)
 {
 	if (priv->shared_virt)
-		pci_free_consistent(priv->pci_dev,
-				    sizeof(struct iwl3945_shared),
-				    priv->shared_virt,
-				    priv->shared_phys);
+		dma_free_coherent(&priv->pci_dev->dev,
+				  sizeof(struct iwl3945_shared),
+				  priv->shared_virt,
+				  priv->shared_phys);
 }
 
 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
@@ -562,6 +562,9 @@
 	txq = &priv->txq[txq_id];
 	q = &txq->q;
 
+	if ((iwl_queue_space(q) < q->high_mark))
+		goto drop;
+
 	spin_lock_irqsave(&priv->lock, flags);
 
 	idx = get_cmd_index(q, q->write_ptr, 0);
@@ -1269,10 +1272,10 @@
 		}
 	}
 
-	pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
-			    rxq->dma_addr);
-	pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
-			    rxq->rb_stts, rxq->rb_stts_dma);
+	dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
+			  rxq->dma_addr);
+	dma_free_coherent(&priv->pci_dev->dev, sizeof(struct iwl_rb_status),
+			  rxq->rb_stts, rxq->rb_stts_dma);
 	rxq->bd = NULL;
 	rxq->rb_stts  = NULL;
 }
@@ -1901,7 +1904,7 @@
 {
 	int i;
 
-	for (i = 0; i < IWL_RATE_COUNT; i++) {
+	for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
 		rates[i].bitrate = iwl3945_rates[i].ieee * 5;
 		rates[i].hw_value = i; /* Rate scaling will work on indexes */
 		rates[i].hw_value_short = i;
@@ -3854,9 +3857,11 @@
 	/* Tell mac80211 our characteristics */
 	hw->flags = IEEE80211_HW_SIGNAL_DBM |
 		    IEEE80211_HW_NOISE_DBM |
-		    IEEE80211_HW_SPECTRUM_MGMT |
-		    IEEE80211_HW_SUPPORTS_PS |
-		    IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
+		    IEEE80211_HW_SPECTRUM_MGMT;
+
+	if (!priv->cfg->broken_powersave)
+		hw->flags |= IEEE80211_HW_SUPPORTS_PS |
+			     IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
 
 	hw->wiphy->interface_modes =
 		BIT(NL80211_IFTYPE_STATION) |
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/iwlwifi/iwl-core.h
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/iwlwifi/iwl-core.h
@@ -410,6 +410,8 @@
 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
 			 struct iwl_tx_queue *txq);
 int iwl_txq_update_write_ptr(struct iwl_priv *priv, struct iwl_tx_queue *txq);
+void iwl_free_tfds_in_queue(struct iwl_priv *priv,
+			    int sta_id, int tid, int freed);
 int iwl_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq,
 		      int slots_num, u32 txq_id);
 void iwl_tx_queue_free(struct iwl_priv *priv, int txq_id);
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/iwlwifi/iwl-helpers.h
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/iwlwifi/iwl-helpers.h
@@ -80,8 +80,8 @@
 				    struct fw_desc *desc)
 {
 	if (desc->v_addr)
-		pci_free_consistent(pci_dev, desc->len,
-				    desc->v_addr, desc->p_addr);
+		dma_free_coherent(&pci_dev->dev, desc->len,
+				  desc->v_addr, desc->p_addr);
 	desc->v_addr = NULL;
 	desc->len = 0;
 }
@@ -89,7 +89,8 @@
 static inline int iwl_alloc_fw_desc(struct pci_dev *pci_dev,
 				    struct fw_desc *desc)
 {
-	desc->v_addr = pci_alloc_consistent(pci_dev, desc->len, &desc->p_addr);
+	desc->v_addr = dma_alloc_coherent(&pci_dev->dev, desc->len,
+					  &desc->p_addr, GFP_KERNEL);
 	return (desc->v_addr != NULL) ? 0 : -ENOMEM;
 }
 
@@ -159,6 +160,12 @@
 	IWL_DEBUG_ISR(priv, "Disabled interrupts\n");
 }
 
+static inline void iwl_enable_rfkill_int(struct iwl_priv *priv)
+{
+	IWL_DEBUG_ISR(priv, "Enabling rfkill interrupt\n");
+	iwl_write32(priv, CSR_INT_MASK, CSR_INT_BIT_RF_KILL);
+}
+
 static inline void iwl_enable_interrupts(struct iwl_priv *priv)
 {
 	IWL_DEBUG_ISR(priv, "Enabling interrupts\n");
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/iwlwifi/iwl-tx.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/iwlwifi/iwl-tx.c
@@ -60,7 +60,8 @@
 static inline int iwl_alloc_dma_ptr(struct iwl_priv *priv,
 				    struct iwl_dma_ptr *ptr, size_t size)
 {
-	ptr->addr = pci_alloc_consistent(priv->pci_dev, size, &ptr->dma);
+	ptr->addr = dma_alloc_coherent(&priv->pci_dev->dev, size, &ptr->dma,
+				       GFP_KERNEL);
 	if (!ptr->addr)
 		return -ENOMEM;
 	ptr->size = size;
@@ -73,7 +74,7 @@
 	if (unlikely(!ptr->addr))
 		return;
 
-	pci_free_consistent(priv->pci_dev, ptr->size, ptr->addr, ptr->dma);
+	dma_free_coherent(&priv->pci_dev->dev, ptr->size, ptr->addr, ptr->dma);
 	memset(ptr, 0, sizeof(*ptr));
 }
 
@@ -119,6 +120,20 @@
 EXPORT_SYMBOL(iwl_txq_update_write_ptr);
 
 
+void iwl_free_tfds_in_queue(struct iwl_priv *priv,
+			    int sta_id, int tid, int freed)
+{
+	if (priv->stations[sta_id].tid[tid].tfds_in_queue >= freed)
+		priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
+	else {
+		IWL_DEBUG_TX(priv, "free more than tfds_in_queue (%u:%d)\n",
+			priv->stations[sta_id].tid[tid].tfds_in_queue,
+			freed);
+		priv->stations[sta_id].tid[tid].tfds_in_queue = 0;
+	}
+}
+EXPORT_SYMBOL(iwl_free_tfds_in_queue);
+
 /**
  * iwl_tx_queue_free - Deallocate DMA queue.
  * @txq: Transmit queue to deallocate.
@@ -131,7 +146,7 @@
 {
 	struct iwl_tx_queue *txq = &priv->txq[txq_id];
 	struct iwl_queue *q = &txq->q;
-	struct pci_dev *dev = priv->pci_dev;
+	struct device *dev = &priv->pci_dev->dev;
 	int i, len;
 
 	if (q->n_bd == 0)
@@ -150,8 +165,8 @@
 
 	/* De-alloc circular buffer of TFDs */
 	if (txq->q.n_bd)
-		pci_free_consistent(dev, priv->hw_params.tfd_size *
-				    txq->q.n_bd, txq->tfds, txq->q.dma_addr);
+		dma_free_coherent(dev, priv->hw_params.tfd_size *
+				  txq->q.n_bd, txq->tfds, txq->q.dma_addr);
 
 	/* De-alloc array of per-TFD driver data */
 	kfree(txq->txb);
@@ -180,7 +195,7 @@
 {
 	struct iwl_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
 	struct iwl_queue *q = &txq->q;
-	struct pci_dev *dev = priv->pci_dev;
+	struct device *dev = &priv->pci_dev->dev;
 	int i, len;
 
 	if (q->n_bd == 0)
@@ -195,8 +210,8 @@
 
 	/* De-alloc circular buffer of TFDs */
 	if (txq->q.n_bd)
-		pci_free_consistent(dev, priv->hw_params.tfd_size *
-				    txq->q.n_bd, txq->tfds, txq->q.dma_addr);
+		dma_free_coherent(dev, priv->hw_params.tfd_size * txq->q.n_bd,
+				  txq->tfds, txq->q.dma_addr);
 
 	/* deallocate arrays */
 	kfree(txq->cmd);
@@ -287,7 +302,7 @@
 static int iwl_tx_queue_alloc(struct iwl_priv *priv,
 			      struct iwl_tx_queue *txq, u32 id)
 {
-	struct pci_dev *dev = priv->pci_dev;
+	struct device *dev = &priv->pci_dev->dev;
 	size_t tfd_sz = priv->hw_params.tfd_size * TFD_QUEUE_SIZE_MAX;
 
 	/* Driver private data, only for Tx (not command) queues,
@@ -306,8 +321,8 @@
 
 	/* Circular buffer of transmit frame descriptors (TFDs),
 	 * shared with device */
-	txq->tfds = pci_alloc_consistent(dev, tfd_sz, &txq->q.dma_addr);
-
+	txq->tfds = dma_alloc_coherent(dev, tfd_sz, &txq->q.dma_addr,
+				       GFP_KERNEL);
 	if (!txq->tfds) {
 		IWL_ERR(priv, "pci_alloc_consistent(%zd) failed\n", tfd_sz);
 		goto error;
@@ -776,8 +791,10 @@
 		hdr->seq_ctrl |= cpu_to_le16(seq_number);
 		seq_number += 0x10;
 		/* aggregation is on for this <sta,tid> */
-		if (info->flags & IEEE80211_TX_CTL_AMPDU)
+		if (info->flags & IEEE80211_TX_CTL_AMPDU &&
+		    priv->stations[sta_id].tid[tid].agg.state == IWL_AGG_ON) {
 			txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
+		}
 	}
 
 	txq = &priv->txq[txq_id];
@@ -1057,6 +1074,7 @@
 	struct iwl_queue *q = &txq->q;
 	struct iwl_tx_info *tx_info;
 	int nfreed = 0;
+	struct ieee80211_hdr *hdr;
 
 	if ((index >= q->n_bd) || (iwl_queue_used(q, index) == 0)) {
 		IWL_ERR(priv, "Read index for DMA queue txq id (%d), index %d, "
@@ -1070,6 +1088,14 @@
 	     q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
 
 		tx_info = &txq->txb[txq->q.read_ptr];
+
+		if (WARN_ON_ONCE(tx_info->skb == NULL))
+			continue;
+
+		hdr = (struct ieee80211_hdr *)tx_info->skb[0]->data;
+		if (ieee80211_is_data_qos(hdr->frame_control))
+			nfreed++;
+
 		ieee80211_tx_status_irqsafe(priv->hw, tx_info->skb[0]);
 		tx_info->skb[0] = NULL;
 
@@ -1077,7 +1103,6 @@
 			priv->cfg->ops->lib->txq_inval_byte_cnt_tbl(priv, txq);
 
 		priv->cfg->ops->lib->txq_free_tfd(priv, txq);
-		nfreed++;
 	}
 	return nfreed;
 }
@@ -1254,7 +1279,7 @@
 {
 	int tx_fifo_id, txq_id, sta_id, ssn = -1;
 	struct iwl_tid_data *tid_data;
-	int ret, write_ptr, read_ptr;
+	int write_ptr, read_ptr;
 	unsigned long flags;
 
 	if (!ra) {
@@ -1306,13 +1331,17 @@
 	priv->stations[sta_id].tid[tid].agg.state = IWL_AGG_OFF;
 
 	spin_lock_irqsave(&priv->lock, flags);
-	ret = priv->cfg->ops->lib->txq_agg_disable(priv, txq_id, ssn,
+	/*
+	 * the only reason this call can fail is queue number out of range,
+	 * which can happen if uCode is reloaded and all the station
+	 * information are lost. if it is outside the range, there is no need
+	 * to deactivate the uCode queue, just return "success" to allow
+	 *  mac80211 to clean up it own data.
+	 */
+	priv->cfg->ops->lib->txq_agg_disable(priv, txq_id, ssn,
 						   tx_fifo_id);
 	spin_unlock_irqrestore(&priv->lock, flags);
 
-	if (ret)
-		return ret;
-
 	ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, ra, tid);
 
 	return 0;
@@ -1454,6 +1483,11 @@
 	sta_id = ba_resp->sta_id;
 	tid = ba_resp->tid;
 	agg = &priv->stations[sta_id].tid[tid].agg;
+	if (unlikely(agg->txq_id != scd_flow)) {
+		IWL_ERR(priv, "BA scd_flow %d does not match txq_id %d\n",
+			scd_flow, agg->txq_id);
+		return;
+	}
 
 	/* Find index just before block-ack window */
 	index = iwl_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd);
@@ -1485,7 +1519,7 @@
 	if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) {
 		/* calculate mac80211 ampdu sw queue to wake */
 		int freed = iwl_tx_queue_reclaim(priv, scd_flow, index);
-		priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
+		iwl_free_tfds_in_queue(priv, sta_id, tid, freed);
 
 		if ((iwl_queue_space(&txq->q) > txq->q.low_mark) &&
 		    priv->mac80211_registered &&
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/iwlwifi/iwl-agn.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/iwlwifi/iwl-agn.c
@@ -1044,6 +1044,9 @@
 	/* only Re-enable if diabled by irq */
 	if (test_bit(STATUS_INT_ENABLED, &priv->status))
 		iwl_enable_interrupts(priv);
+	/* Re-enable RF_KILL if it occurred */
+	else if (handled & CSR_INT_BIT_RF_KILL)
+		iwl_enable_rfkill_int(priv);
 
 #ifdef CONFIG_IWLWIFI_DEBUG
 	if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
@@ -1245,6 +1248,9 @@
 	/* only Re-enable if diabled by irq */
 	if (test_bit(STATUS_INT_ENABLED, &priv->status))
 		iwl_enable_interrupts(priv);
+	/* Re-enable RF_KILL if it occurred */
+	else if (handled & CSR_INT_BIT_RF_KILL)
+		iwl_enable_rfkill_int(priv);
 
 	spin_unlock_irqrestore(&priv->lock, flags);
 
@@ -2358,9 +2364,10 @@
 
 	flush_workqueue(priv->workqueue);
 
-	/* enable interrupts again in order to receive rfkill changes */
+	/* User space software may expect getting rfkill changes
+	 * even if interface is down */
 	iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
-	iwl_enable_interrupts(priv);
+	iwl_enable_rfkill_int(priv);
 
 	IWL_DEBUG_MAC80211(priv, "leave\n");
 }
@@ -3060,14 +3067,14 @@
 	 * 8. Setup and register mac80211
 	 **********************************/
 
-	/* enable interrupts if needed: hw bug w/a */
+	/* enable rfkill interrupt: hw bug w/a */
 	pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
 	if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
 		pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
 		pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
 	}
 
-	iwl_enable_interrupts(priv);
+	iwl_enable_rfkill_int(priv);
 
 	err = iwl_setup_mac(priv);
 	if (err)
@@ -3203,23 +3210,63 @@
 	{IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
 #endif /* CONFIG_IWL4965 */
 #ifdef CONFIG_IWL5000
-	{IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)},
-	{IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)},
-	{IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)},
-	{IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)},
-	{IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)},
-	{IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)},
-	{IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
-	{IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
-	{IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)},
-	{IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)},
-/* 5350 WiFi/WiMax */
-	{IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)},
-	{IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)},
-	{IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)},
-/* 5150 Wifi/WiMax */
-	{IWL_PCI_DEVICE(0x423C, PCI_ANY_ID, iwl5150_agn_cfg)},
-	{IWL_PCI_DEVICE(0x423D, PCI_ANY_ID, iwl5150_agn_cfg)},
+/* 5100 Series WiFi */
+	{IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
+	{IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
+	{IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
+	{IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
+	{IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
+	{IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
+	{IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
+	{IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
+	{IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
+	{IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
+	{IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
+	{IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
+	{IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
+	{IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
+	{IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
+	{IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
+	{IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
+	{IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
+	{IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
+	{IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
+	{IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
+	{IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
+	{IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
+	{IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
+
+/* 5300 Series WiFi */
+	{IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
+	{IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
+	{IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
+	{IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
+	{IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
+	{IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
+	{IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
+	{IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
+	{IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
+	{IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
+	{IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
+	{IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
+
+/* 5350 Series WiFi/WiMax */
+	{IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
+	{IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
+	{IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
+
+/* 5150 Series Wifi/WiMax */
+	{IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
+	{IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
+	{IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
+	{IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
+	{IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
+	{IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
+
+	{IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
+	{IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
+	{IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
+	{IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
 /* 6000/6050 Series */
 	{IWL_PCI_DEVICE(0x008D, PCI_ANY_ID, iwl6000h_2agn_cfg)},
 	{IWL_PCI_DEVICE(0x008E, PCI_ANY_ID, iwl6000h_2agn_cfg)},
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/iwlwifi/iwl-3945.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/iwlwifi/iwl-3945.c
@@ -2545,11 +2545,9 @@
 	memset((void *)&priv->hw_params, 0,
 	       sizeof(struct iwl_hw_params));
 
-	priv->shared_virt =
-	    pci_alloc_consistent(priv->pci_dev,
-				 sizeof(struct iwl3945_shared),
-				 &priv->shared_phys);
-
+	priv->shared_virt = dma_alloc_coherent(&priv->pci_dev->dev,
+					       sizeof(struct iwl3945_shared),
+					       &priv->shared_phys, GFP_KERNEL);
 	if (!priv->shared_virt) {
 		IWL_ERR(priv, "failed to allocate pci memory\n");
 		mutex_unlock(&priv->mutex);
@@ -2895,6 +2893,7 @@
 	.mod_params = &iwl3945_mod_params,
 	.use_isr_legacy = true,
 	.ht_greenfield_support = false,
+	.broken_powersave = true,
 };
 
 static struct iwl_cfg iwl3945_abg_cfg = {
@@ -2909,6 +2908,7 @@
 	.mod_params = &iwl3945_mod_params,
 	.use_isr_legacy = true,
 	.ht_greenfield_support = false,
+	.broken_powersave = true,
 };
 
 struct pci_device_id iwl3945_hw_card_ids[] = {
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/ath/regd.h
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/ath/regd.h
@@ -31,7 +31,6 @@
 #define NO_CTL 0xff
 #define SD_NO_CTL               0xE0
 #define NO_CTL                  0xff
-#define CTL_MODE_M              7
 #define CTL_11A                 0
 #define CTL_11B                 1
 #define CTL_11G                 2
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/ath/regd_common.h
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/ath/regd_common.h
@@ -195,6 +195,7 @@
 	{APL9_WORLD, CTL_ETSI, CTL_ETSI},
 
 	{APL3_FCCA, CTL_FCC, CTL_FCC},
+	{APL7_FCCA, CTL_FCC, CTL_FCC},
 	{APL1_ETSIC, CTL_FCC, CTL_ETSI},
 	{APL2_ETSIC, CTL_FCC, CTL_ETSI},
 	{APL2_APLD, CTL_FCC, NO_CTL},
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/ath/ath9k/hw.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/ath/ath9k/hw.c
@@ -398,7 +398,6 @@
 	ah->config.pcie_clock_req = 0;
 	ah->config.pcie_waen = 0;
 	ah->config.analog_shiftreg = 1;
-	ah->config.ht_enable = 1;
 	ah->config.ofdm_trig_low = 200;
 	ah->config.ofdm_trig_high = 500;
 	ah->config.cck_trig_high = 200;
@@ -412,6 +411,11 @@
 		ah->config.spurchans[i][1] = AR_NO_SPUR;
 	}
 
+	if (ah->hw_version.devid != AR2427_DEVID_PCIE)
+		ah->config.ht_enable = 1;
+	else
+		ah->config.ht_enable = 0;
+
 	ah->config.intr_mitigation = true;
 
 	/*
@@ -617,6 +621,7 @@
 	case AR9285_DEVID_PCIE:
 	case AR5416_DEVID_AR9287_PCI:
 	case AR5416_DEVID_AR9287_PCIE:
+	case AR2427_DEVID_PCIE:
 		return true;
 	default:
 		break;
@@ -880,12 +885,11 @@
 	}
 }
 
-static void ath9k_hw_init_11a_eeprom_fix(struct ath_hw *ah)
+static void ath9k_hw_init_eeprom_fix(struct ath_hw *ah)
 {
 	u32 i, j;
 
-	if ((ah->hw_version.devid == AR9280_DEVID_PCI) &&
-	    test_bit(ATH9K_MODE_11A, ah->caps.wireless_modes)) {
+	if (ah->hw_version.devid == AR9280_DEVID_PCI) {
 
 		/* EEPROM Fixup */
 		for (i = 0; i < ah->iniModes.ia_rows; i++) {
@@ -913,6 +917,8 @@
 	ath9k_hw_init_defaults(ah);
 	ath9k_hw_init_config(ah);
 
+	ath9k_hw_read_revisions(ah);
+
 	if (!ath9k_hw_set_reset_reg(ah, ATH9K_RESET_POWER_ON)) {
 		DPRINTF(ah->ah_sc, ATH_DBG_FATAL, "Couldn't reset chip\n");
 		return -EIO;
@@ -925,7 +931,8 @@
 
 	if (ah->config.serialize_regmode == SER_REG_MODE_AUTO) {
 		if (ah->hw_version.macVersion == AR_SREV_VERSION_5416_PCI ||
-		    (AR_SREV_9280(ah) && !ah->is_pciexpress)) {
+		    ((AR_SREV_9160(ah) || AR_SREV_9280(ah)) &&
+		     !ah->is_pciexpress)) {
 			ah->config.serialize_regmode =
 				SER_REG_MODE_ON;
 		} else {
@@ -937,6 +944,11 @@
 	DPRINTF(ah->ah_sc, ATH_DBG_RESET, "serialize_regmode is %d\n",
 		ah->config.serialize_regmode);
 
+	if (AR_SREV_9285(ah) || AR_SREV_9271(ah))
+		ah->config.max_txtrig_level = MAX_TX_FIFO_THRESHOLD >> 1;
+	else
+		ah->config.max_txtrig_level = MAX_TX_FIFO_THRESHOLD;
+
 	if (!ath9k_hw_macversion_supported(ah->hw_version.macVersion)) {
 		DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
 			"Mac Chip Rev 0x%02x.%x is not supported by "
@@ -975,7 +987,7 @@
 
 	ath9k_hw_init_mode_gain_regs(ah);
 	ath9k_hw_fill_cap_info(ah);
-	ath9k_hw_init_11a_eeprom_fix(ah);
+	ath9k_hw_init_eeprom_fix(ah);
 
 	r = ath9k_hw_init_macaddr(ah);
 	if (r) {
@@ -1291,6 +1303,16 @@
 	 * Necessary to avoid issues on AR5416 2.0
 	 */
 	REG_WRITE(ah, 0x9800 + (651 << 2), 0x11);
+
+	/*
+	 * Disable RIFS search on some chips to avoid baseband
+	 * hang issues.
+	 */
+	if (AR_SREV_9100(ah) || AR_SREV_9160(ah)) {
+		val = REG_READ(ah, AR_PHY_HEAVY_CLIP_FACTOR_RIFS);
+		val &= ~AR_PHY_RIFS_INIT_DELAY;
+		REG_WRITE(ah, AR_PHY_HEAVY_CLIP_FACTOR_RIFS, val);
+	}
 }
 
 static u32 ath9k_hw_def_ini_fixup(struct ath_hw *ah,
@@ -1738,8 +1760,6 @@
 		return false;
 	}
 
-	ath9k_hw_read_revisions(ah);
-
 	return ath9k_hw_set_reset(ah, ATH9K_RESET_WARM);
 }
 
@@ -2383,7 +2403,8 @@
 	macStaId1 = REG_READ(ah, AR_STA_ID1) & AR_STA_ID1_BASE_RATE_11B;
 
 	/* For chips on which RTC reset is done, save TSF before it gets cleared */
-	if (AR_SREV_9280(ah) && ah->eep_ops->get_eeprom(ah, EEP_OL_PWRCTRL))
+	if (AR_SREV_9100(ah) ||
+	    (AR_SREV_9280(ah) && ah->eep_ops->get_eeprom(ah, EEP_OL_PWRCTRL)))
 		tsf = ath9k_hw_gettsf64(ah);
 
 	saveLedState = REG_READ(ah, AR_CFG_LED) &
@@ -2413,7 +2434,7 @@
 	}
 
 	/* Restore TSF */
-	if (tsf && AR_SREV_9280(ah) && ah->eep_ops->get_eeprom(ah, EEP_OL_PWRCTRL))
+	if (tsf)
 		ath9k_hw_settsf64(ah, tsf);
 
 	if (AR_SREV_9280_10_OR_LATER(ah))
@@ -2433,6 +2454,17 @@
 	if (r)
 		return r;
 
+	/*
+	 * Some AR91xx SoC devices frequently fail to accept TSF writes
+	 * right after the chip reset. When that happens, write a new
+	 * value after the initvals have been applied, with an offset
+	 * based on measured time difference
+	 */
+	if (AR_SREV_9100(ah) && (ath9k_hw_gettsf64(ah) < tsf)) {
+		tsf += 1500;
+		ath9k_hw_settsf64(ah, tsf);
+	}
+
 	/* Setup MFP options for CCMP */
 	if (AR_SREV_9280_20_OR_LATER(ah)) {
 		/* Mask Retry(b11), PwrMgt(b12), MoreData(b13) to 0 in mgmt
@@ -3670,7 +3702,11 @@
 		pCap->keycache_size = AR_KEYTABLE_SIZE;
 
 	pCap->hw_caps |= ATH9K_HW_CAP_FASTCC;
-	pCap->tx_triglevel_max = MAX_TX_FIFO_THRESHOLD;
+
+	if (AR_SREV_9285(ah) || AR_SREV_9271(ah))
+		pCap->tx_triglevel_max = MAX_TX_FIFO_THRESHOLD >> 1;
+	else
+		pCap->tx_triglevel_max = MAX_TX_FIFO_THRESHOLD;
 
 	if (AR_SREV_9285_10_OR_LATER(ah))
 		pCap->num_gpio_pins = AR9285_NUM_GPIO;
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/ath/ath9k/mac.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/ath/ath9k/mac.c
@@ -70,7 +70,7 @@
 	u32 txcfg, curLevel, newLevel;
 	enum ath9k_int omask;
 
-	if (ah->tx_trig_level >= MAX_TX_FIFO_THRESHOLD)
+	if (ah->tx_trig_level >= ah->config.max_txtrig_level)
 		return false;
 
 	omask = ath9k_hw_set_interrupts(ah, ah->mask_reg & ~ATH9K_INT_GLOBAL);
@@ -79,7 +79,7 @@
 	curLevel = MS(txcfg, AR_FTRIG);
 	newLevel = curLevel;
 	if (bIncTrigLevel) {
-		if (curLevel < MAX_TX_FIFO_THRESHOLD)
+		if (curLevel < ah->config.max_txtrig_level)
 			newLevel++;
 	} else if (curLevel > MIN_TX_FIFO_THRESHOLD)
 		newLevel--;
@@ -155,7 +155,7 @@
 		wait = wait_time;
 		while (ath9k_hw_numtxpending(ah, q)) {
 			if ((--wait) == 0) {
-				DPRINTF(ah->ah_sc, ATH_DBG_QUEUE,
+				DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
 					"Failed to stop TX DMA in 100 "
 					"msec after killing last frame\n");
 				break;
@@ -222,6 +222,8 @@
 	ds->ds_txstat.ts_status = 0;
 	ds->ds_txstat.ts_flags = 0;
 
+	if (ads->ds_txstatus1 & AR_FrmXmitOK)
+		ds->ds_txstat.ts_status |= ATH9K_TX_ACKED;
 	if (ads->ds_txstatus1 & AR_ExcessiveRetries)
 		ds->ds_txstat.ts_status |= ATH9K_TXERR_XRETRY;
 	if (ads->ds_txstatus1 & AR_Filtered)
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/ath/ath9k/eeprom.h
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/ath/ath9k/eeprom.h
@@ -60,7 +60,7 @@
 
 #define SD_NO_CTL               0xE0
 #define NO_CTL                  0xff
-#define CTL_MODE_M              7
+#define CTL_MODE_M              0xf
 #define CTL_11A                 0
 #define CTL_11B                 1
 #define CTL_11G                 2
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/ath/ath9k/mac.h
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/ath/ath9k/mac.h
@@ -76,6 +76,10 @@
 #define ATH9K_TXERR_FIFO           0x04
 #define ATH9K_TXERR_XTXOP          0x08
 #define ATH9K_TXERR_TIMER_EXPIRED  0x10
+#define ATH9K_TX_ACKED		   0x20
+#define ATH9K_TXERR_MASK						\
+	(ATH9K_TXERR_XRETRY | ATH9K_TXERR_FILT | ATH9K_TXERR_FIFO |	\
+	 ATH9K_TXERR_XTXOP | ATH9K_TXERR_TIMER_EXPIRED)
 
 #define ATH9K_TX_BA                0x01
 #define ATH9K_TX_PWRMGMT           0x02
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/ath/ath9k/initvals.h
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/ath/ath9k/initvals.h
@@ -2762,7 +2762,7 @@
     { 0x00008258, 0x00000000 },
     { 0x0000825c, 0x400000ff },
     { 0x00008260, 0x00080922 },
-    { 0x00008264, 0xa8a00010 },
+    { 0x00008264, 0x88a00010 },
     { 0x00008270, 0x00000000 },
     { 0x00008274, 0x40000000 },
     { 0x00008278, 0x003e4180 },
@@ -3935,7 +3935,7 @@
     { 0x00008258, 0x00000000 },
     { 0x0000825c, 0x400000ff },
     { 0x00008260, 0x00080922 },
-    { 0x00008264, 0xa8a00010 },
+    { 0x00008264, 0x88a00010 },
     { 0x00008270, 0x00000000 },
     { 0x00008274, 0x40000000 },
     { 0x00008278, 0x003e4180 },
@@ -5072,7 +5072,7 @@
     { 0x00008258, 0x00000000 },
     { 0x0000825c, 0x400000ff },
     { 0x00008260, 0x00080922 },
-    { 0x00008264, 0xa8a00010 },
+    { 0x00008264, 0x88a00010 },
     { 0x00008270, 0x00000000 },
     { 0x00008274, 0x40000000 },
     { 0x00008278, 0x003e4180 },
@@ -6864,7 +6864,7 @@
     { 0x00008258, 0x00000000 },
     { 0x0000825c, 0x400000ff },
     { 0x00008260, 0x00080922 },
-    { 0x00008264, 0xa8a00010 },
+    { 0x00008264, 0x88a00010 },
     { 0x00008270, 0x00000000 },
     { 0x00008274, 0x40000000 },
     { 0x00008278, 0x003e4180 },
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/ath/ath9k/main.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/ath/ath9k/main.c
@@ -1538,14 +1538,19 @@
 
 void ath_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw)
 {
+	struct ath_hw *ah = sc->sc_ah;
+
 	hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
 		IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
 		IEEE80211_HW_SIGNAL_DBM |
-		IEEE80211_HW_AMPDU_AGGREGATION |
 		IEEE80211_HW_SUPPORTS_PS |
 		IEEE80211_HW_PS_NULLFUNC_STACK |
+		IEEE80211_HW_REPORTS_TX_ACK_STATUS |
 		IEEE80211_HW_SPECTRUM_MGMT;
 
+	if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT)
+		 hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
+
 	if (AR_SREV_9160_10_OR_LATER(sc->sc_ah) || modparam_nohwcrypt)
 		hw->flags |= IEEE80211_HW_MFP_CAPABLE;
 
@@ -1555,7 +1560,10 @@
 		BIT(NL80211_IFTYPE_ADHOC) |
 		BIT(NL80211_IFTYPE_MESH_POINT);
 
-	hw->wiphy->ps_default = false;
+	if (AR_SREV_5416(ah))
+		hw->wiphy->ps_default = false;
+	else
+		hw->wiphy->ps_default = true;
 
 	hw->queues = 4;
 	hw->max_rates = 4;
@@ -1910,6 +1918,8 @@
 	DPRINTF(sc, ATH_DBG_CONFIG, "Starting driver with "
 		"initial channel: %d MHz\n", curchan->center_freq);
 
+	ath9k_ps_wakeup(sc);
+
 	mutex_lock(&sc->mutex);
 
 	if (ath9k_wiphy_started(sc)) {
@@ -2017,6 +2027,8 @@
 mutex_unlock:
 	mutex_unlock(&sc->mutex);
 
+	ath9k_ps_restore(sc);
+
 	return r;
 }
 
@@ -2147,6 +2159,9 @@
 		return; /* another wiphy still in use */
 	}
 
+	/* Ensure HW is awake when we try to shut it down. */
+	ath9k_ps_wakeup(sc);
+
 	if (sc->sc_flags & SC_OP_BTCOEX_ENABLED) {
 		ath9k_hw_btcoex_disable(sc->sc_ah);
 		if (sc->btcoex_info.btcoex_scheme == ATH_BTCOEX_CFG_3WIRE)
@@ -2167,6 +2182,9 @@
 	/* disable HAL and put h/w to sleep */
 	ath9k_hw_disable(sc->sc_ah);
 	ath9k_hw_configpcipowersave(sc->sc_ah, 1, 1);
+	ath9k_ps_restore(sc);
+
+	/* Finally, put the chip in FULL SLEEP mode */
 	ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 
 	sc->sc_flags |= SC_OP_INVALID;
@@ -2277,10 +2295,12 @@
 	if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
 	    (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
 	    (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
+		ath9k_ps_wakeup(sc);
 		ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
-		ath_beacon_return(sc, avp);
+		ath9k_ps_restore(sc);
 	}
 
+	ath_beacon_return(sc, avp);
 	sc->sc_flags &= ~SC_OP_BEACONS;
 
 	for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
@@ -2297,6 +2317,19 @@
 	mutex_unlock(&sc->mutex);
 }
 
+void ath9k_enable_ps(struct ath_softc *sc)
+{
+	sc->ps_enabled = true;
+	if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
+		if ((sc->imask & ATH9K_INT_TIM_TIMER) == 0) {
+			sc->imask |= ATH9K_INT_TIM_TIMER;
+			ath9k_hw_set_interrupts(sc->sc_ah,
+					sc->imask);
+		}
+	}
+	ath9k_hw_setrxabort(sc->sc_ah, 1);
+}
+
 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
 {
 	struct ath_wiphy *aphy = hw->priv;
@@ -2327,18 +2360,15 @@
 
 	if (changed & IEEE80211_CONF_CHANGE_PS) {
 		if (conf->flags & IEEE80211_CONF_PS) {
-			if (!(ah->caps.hw_caps &
-			      ATH9K_HW_CAP_AUTOSLEEP)) {
-				if ((sc->imask & ATH9K_INT_TIM_TIMER) == 0) {
-					sc->imask |= ATH9K_INT_TIM_TIMER;
-					ath9k_hw_set_interrupts(sc->sc_ah,
-							sc->imask);
-				}
-				ath9k_hw_setrxabort(sc->sc_ah, 1);
+			sc->sc_flags |= SC_OP_PS_ENABLED;
+			if ((sc->sc_flags & SC_OP_NULLFUNC_COMPLETED)) {
+				sc->sc_flags &= ~SC_OP_NULLFUNC_COMPLETED;
+				ath9k_enable_ps(sc);
 			}
-			sc->ps_enabled = true;
 		} else {
 			sc->ps_enabled = false;
+			sc->sc_flags &= ~(SC_OP_PS_ENABLED |
+					  SC_OP_NULLFUNC_COMPLETED);
 			ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 			if (!(ah->caps.hw_caps &
 			      ATH9K_HW_CAP_AUTOSLEEP)) {
@@ -2717,15 +2747,21 @@
 	case IEEE80211_AMPDU_RX_STOP:
 		break;
 	case IEEE80211_AMPDU_TX_START:
+		ath9k_ps_wakeup(sc);
 		ath_tx_aggr_start(sc, sta, tid, ssn);
 		ieee80211_start_tx_ba_cb_irqsafe(hw, sta->addr, tid);
+		ath9k_ps_restore(sc);
 		break;
 	case IEEE80211_AMPDU_TX_STOP:
+		ath9k_ps_wakeup(sc);
 		ath_tx_aggr_stop(sc, sta, tid);
 		ieee80211_stop_tx_ba_cb_irqsafe(hw, sta->addr, tid);
+		ath9k_ps_restore(sc);
 		break;
 	case IEEE80211_AMPDU_TX_OPERATIONAL:
+		ath9k_ps_wakeup(sc);
 		ath_tx_aggr_resume(sc, sta, tid);
+		ath9k_ps_restore(sc);
 		break;
 	default:
 		DPRINTF(sc, ATH_DBG_FATAL, "Unknown AMPDU action\n");
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/ath/ath9k/beacon.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/ath/ath9k/beacon.c
@@ -512,16 +512,13 @@
 {
 	u32 nexttbtt, intval;
 
-	/* Configure the timers only when the TSF has to be reset */
-
-	if (!(sc->sc_flags & SC_OP_TSF_RESET))
-		return;
-
 	/* NB: the beacon interval is kept internally in TU's */
 	intval = conf->beacon_interval & ATH9K_BEACON_PERIOD;
 	intval /= ATH_BCBUF;    /* for staggered beacons */
 	nexttbtt = intval;
-	intval |= ATH9K_BEACON_RESET_TSF;
+
+	if (sc->sc_flags & SC_OP_TSF_RESET)
+		intval |= ATH9K_BEACON_RESET_TSF;
 
 	/*
 	 * In AP mode we enable the beacon timers and SWBA interrupts to
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/ath/ath9k/rc.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/ath/ath9k/rc.c
@@ -757,7 +757,7 @@
 	struct ieee80211_tx_rate *rates = tx_info->control.rates;
 	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
 	__le16 fc = hdr->frame_control;
-	u8 try_per_rate, i = 0, rix, nrix;
+	u8 try_per_rate, i = 0, rix;
 	int is_probe = 0;
 
 	if (rate_control_send_low(sta, priv_sta, txrc))
@@ -777,26 +777,25 @@
 
 	rate_table = sc->cur_rate_table;
 	rix = ath_rc_get_highest_rix(sc, ath_rc_priv, rate_table, &is_probe);
-	nrix = rix;
 
 	if (is_probe) {
 		/* set one try for probe rates. For the
 		 * probes don't enable rts */
 		ath_rc_rate_set_series(rate_table, &rates[i++], txrc,
-				       1, nrix, 0);
+				       1, rix, 0);
 
 		/* Get the next tried/allowed rate. No RTS for the next series
 		 * after the probe rate
 		 */
-		ath_rc_get_lower_rix(rate_table, ath_rc_priv, rix, &nrix);
+		ath_rc_get_lower_rix(rate_table, ath_rc_priv, rix, &rix);
 		ath_rc_rate_set_series(rate_table, &rates[i++], txrc,
-				       try_per_rate, nrix, 0);
+				       try_per_rate, rix, 0);
 
 		tx_info->flags |= IEEE80211_TX_CTL_RATE_CTRL_PROBE;
 	} else {
 		/* Set the choosen rate. No RTS for first series entry. */
 		ath_rc_rate_set_series(rate_table, &rates[i++], txrc,
-				       try_per_rate, nrix, 0);
+				       try_per_rate, rix, 0);
 	}
 
 	/* Fill in the other rates for multirate retry */
@@ -805,10 +804,10 @@
 		if (i + 1 == 4)
 			try_per_rate = 4;
 
-		ath_rc_get_lower_rix(rate_table, ath_rc_priv, rix, &nrix);
+		ath_rc_get_lower_rix(rate_table, ath_rc_priv, rix, &rix);
 		/* All other rates in the series have RTS enabled */
 		ath_rc_rate_set_series(rate_table, &rates[i], txrc,
-				       try_per_rate, nrix, 1);
+				       try_per_rate, rix, 1);
 	}
 
 	/*
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/ath/ath9k/xmit.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/ath/ath9k/xmit.c
@@ -423,6 +423,14 @@
 		bf = bf_next;
 	}
 
+	/* prepend un-acked frames to the beginning of the pending frame queue */
+	if (!list_empty(&bf_pending)) {
+		spin_lock_bh(&txq->axq_lock);
+		list_splice(&bf_pending, &tid->buf_q);
+		ath_tx_queue_tid(txq, tid);
+		spin_unlock_bh(&txq->axq_lock);
+	}
+
 	if (tid->state & AGGR_CLEANUP) {
 		if (tid->baw_head == tid->baw_tail) {
 			tid->state &= ~AGGR_ADDBA_COMPLETE;
@@ -435,14 +443,6 @@
 		return;
 	}
 
-	/* prepend un-acked frames to the beginning of the pending frame queue */
-	if (!list_empty(&bf_pending)) {
-		spin_lock_bh(&txq->axq_lock);
-		list_splice(&bf_pending, &tid->buf_q);
-		ath_tx_queue_tid(txq, tid);
-		spin_unlock_bh(&txq->axq_lock);
-	}
-
 	rcu_read_unlock();
 
 	if (needreset)
@@ -1076,10 +1076,10 @@
 	if (npend) {
 		int r;
 
-		DPRINTF(sc, ATH_DBG_XMIT, "Unable to stop TxDMA. Reset HAL!\n");
+		DPRINTF(sc, ATH_DBG_FATAL, "Unable to stop TxDMA. Reset HAL!\n");
 
 		spin_lock_bh(&sc->sc_resetlock);
-		r = ath9k_hw_reset(ah, sc->sc_ah->curchan, true);
+		r = ath9k_hw_reset(ah, sc->sc_ah->curchan, false);
 		if (r)
 			DPRINTF(sc, ATH_DBG_FATAL,
 				"Unable to reset hardware; reset status %d\n",
@@ -1320,25 +1320,6 @@
 	return htype;
 }
 
-static bool is_pae(struct sk_buff *skb)
-{
-	struct ieee80211_hdr *hdr;
-	__le16 fc;
-
-	hdr = (struct ieee80211_hdr *)skb->data;
-	fc = hdr->frame_control;
-
-	if (ieee80211_is_data(fc)) {
-		if (ieee80211_is_nullfunc(fc) ||
-		    /* Port Access Entity (IEEE 802.1X) */
-		    (skb->protocol == cpu_to_be16(ETH_P_PAE))) {
-			return true;
-		}
-	}
-
-	return false;
-}
-
 static int get_hw_crypto_keytype(struct sk_buff *skb)
 {
 	struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
@@ -1563,7 +1544,7 @@
 
 	bf->bf_frmlen = skb->len + FCS_LEN - (hdrlen & 3);
 
-	if (conf_is_ht(&sc->hw->conf) && !is_pae(skb))
+	if (conf_is_ht(&sc->hw->conf))
 		bf->bf_state.bf_type |= BUF_HT;
 
 	bf->bf_flags = setup_tx_flags(sc, skb, txctl->txq);
@@ -1592,6 +1573,13 @@
 	}
 
 	bf->bf_buf_addr = bf->bf_dmacontext;
+
+	if (ieee80211_is_nullfunc(fc) && ieee80211_has_pm(fc)) {
+		bf->bf_isnullfunc = true;
+		sc->sc_flags &= ~SC_OP_NULLFUNC_COMPLETED;
+	} else
+		bf->bf_isnullfunc = false;
+
 	return 0;
 }
 
@@ -1989,6 +1977,14 @@
 		if (ds == txq->axq_gatingds)
 			txq->axq_gatingds = NULL;
 
+		if (bf->bf_isnullfunc &&
+		    (ds->ds_txstat.ts_status & ATH9K_TX_ACKED)) {
+			if ((sc->sc_flags & SC_OP_PS_ENABLED))
+				ath9k_enable_ps(sc);
+			else
+				sc->sc_flags |= SC_OP_NULLFUNC_COMPLETED;
+		}
+
 		/*
 		 * Remove ath_buf's of the same transmit unit from txq,
 		 * however leave the last descriptor back as the holding
@@ -2004,7 +2000,7 @@
 		if (bf_isaggr(bf))
 			txq->axq_aggr_depth--;
 
-		txok = (ds->ds_txstat.ts_status == 0);
+		txok = !(ds->ds_txstat.ts_status & ATH9K_TXERR_MASK);
 		txq->axq_tx_inprogress = false;
 		spin_unlock_bh(&txq->axq_lock);
 
@@ -2065,7 +2061,9 @@
 
 	if (needreset) {
 		DPRINTF(sc, ATH_DBG_RESET, "tx hung, resetting the chip\n");
+		ath9k_ps_wakeup(sc);
 		ath_reset(sc, false);
+		ath9k_ps_restore(sc);
 	}
 
 	ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work,
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/ath/ath9k/phy.h
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/ath/ath9k/phy.h
@@ -368,6 +368,9 @@
 
 #define AR_PHY_HEAVY_CLIP_ENABLE         0x99E0
 
+#define AR_PHY_HEAVY_CLIP_FACTOR_RIFS    0x99EC
+#define AR_PHY_RIFS_INIT_DELAY         0x03ff0000
+
 #define AR_PHY_M_SLEEP      0x99f0
 #define AR_PHY_REFCLKDLY    0x99f4
 #define AR_PHY_REFCLKPD     0x99f8
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/ath/ath9k/reg.h
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/ath/ath9k/reg.h
@@ -969,10 +969,10 @@
 #define AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_S         4
 #define AR_GPIO_INPUT_EN_VAL_RFSILENT_DEF        0x00000080
 #define AR_GPIO_INPUT_EN_VAL_RFSILENT_DEF_S      7
+#define AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB      0x00000400
+#define AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB_S    10
 #define AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB        0x00001000
 #define AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB_S      12
-#define AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB      0x00001000
-#define AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB_S    1
 #define AR_GPIO_INPUT_EN_VAL_RFSILENT_BB         0x00008000
 #define AR_GPIO_INPUT_EN_VAL_RFSILENT_BB_S       15
 #define AR_GPIO_RTC_RESET_OVERRIDE_ENABLE        0x00010000
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/ath/ath9k/pci.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/ath/ath9k/pci.c
@@ -25,6 +25,7 @@
 	{ PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI   */
 	{ PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
 	{ PCI_VDEVICE(ATHEROS, 0x002B) }, /* PCI-E */
+	{ PCI_VDEVICE(ATHEROS, 0x002C) }, /* PCI-E 802.11n bonded out */
 	{ PCI_VDEVICE(ATHEROS, 0x002D) }, /* PCI   */
 	{ PCI_VDEVICE(ATHEROS, 0x002E) }, /* PCI-E */
 	{ 0 }
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/ath/ath9k/hw.h
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/ath/ath9k/hw.h
@@ -37,6 +37,7 @@
 #define AR9280_DEVID_PCI	0x0029
 #define AR9280_DEVID_PCIE	0x002a
 #define AR9285_DEVID_PCIE	0x002b
+#define AR2427_DEVID_PCIE	0x002c
 #define AR5416_AR9100_DEVID	0x000b
 #define	AR_SUBVENDOR_ID_NOG	0x0e11
 #define AR_SUBVENDOR_ID_NEW_A	0x7065
@@ -218,6 +219,7 @@
 #define AR_SPUR_FEEQ_BOUND_HT20 10
 	int spurmode;
 	u16 spurchans[AR_EEPROM_MODAL_SPURS][2];
+	u8 max_txtrig_level;
 };
 
 enum ath9k_int {
@@ -407,7 +409,7 @@
  * Using de Bruijin sequence to to look up 1's index in a 32 bit number
  * debruijn32 = 0000 0111 0111 1100 1011 0101 0011 0001
  */
-#define debruijn32 0x077CB531UL
+#define debruijn32 0x077CB531U
 
 struct ath_gen_timer_configuration {
 	u32 next_addr;
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/ath/ath9k/ath9k.h
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/ath/ath9k/ath9k.h
@@ -139,6 +139,7 @@
 	dma_addr_t bf_daddr;		/* physical addr of desc */
 	dma_addr_t bf_buf_addr;		/* physical addr of data buffer */
 	bool bf_stale;
+	bool bf_isnullfunc;
 	u16 bf_flags;
 	struct ath_buf_state bf_state;
 	dma_addr_t bf_dmacontext;
@@ -213,8 +214,8 @@
 
 /* returns delimiter padding required given the packet length */
 #define ATH_AGGR_GET_NDELIM(_len)					\
-	(((((_len) + ATH_AGGR_DELIM_SZ) < ATH_AGGR_MINPLEN) ?           \
-	  (ATH_AGGR_MINPLEN - (_len) - ATH_AGGR_DELIM_SZ) : 0) >> 2)
+       (((_len) >= ATH_AGGR_MINPLEN) ? 0 :                             \
+        DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ))
 
 #define BAW_WITHIN(_start, _bawsz, _seqno) \
 	((((_seqno) - (_start)) & 4095) < (_bawsz))
@@ -367,6 +368,7 @@
 		       u16 tid, u16 *ssn);
 void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
 void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
+void ath9k_enable_ps(struct ath_softc *sc);
 
 /********/
 /* VIFs */
@@ -524,6 +526,8 @@
 #define SC_OP_BEACON_SYNC       BIT(19)
 #define SC_OP_BTCOEX_ENABLED    BIT(20)
 #define SC_OP_BT_PRIORITY_DETECTED BIT(21)
+#define SC_OP_NULLFUNC_COMPLETED   BIT(22)
+#define SC_OP_PS_ENABLED	BIT(23)
 
 struct ath_bus_ops {
 	void		(*read_cachesize)(struct ath_softc *sc, int *csz);
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/ath/ath9k/eeprom_def.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/ath/ath9k/eeprom_def.c
@@ -714,7 +714,7 @@
 				    vpdTableI[i][sizeCurrVpdTable - 2]);
 		vpdStep = (int16_t)((vpdStep < 1) ? 1 : vpdStep);
 
-		if (tgtIndex > maxIndex) {
+		if (tgtIndex >= maxIndex) {
 			while ((ss <= tgtIndex) &&
 			       (k < (AR5416_NUM_PDADC_VALUES - 1))) {
 				tmpVal = (int16_t)((vpdTableI[i][sizeCurrVpdTable - 1] +
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/ath/ath5k/phy.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/ath/ath5k/phy.c
@@ -2954,8 +2954,6 @@
 		ATH5K_ERR(ah->ah_sc, "invalid tx power: %u\n", txpower);
 		return -EINVAL;
 	}
-	if (txpower == 0)
-		txpower = AR5K_TUNE_DEFAULT_TXPOWER;
 
 	/* Reset TX power values */
 	memset(&ah->ah_txpower, 0, sizeof(ah->ah_txpower));
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/ath/ath5k/eeprom.h
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/ath/ath5k/eeprom.h
@@ -37,6 +37,14 @@
 #define AR5K_EEPROM_RFKILL_POLARITY_S	1
 
 #define AR5K_EEPROM_REG_DOMAIN		0x00bf	/* EEPROM regdom */
+
+/* FLASH(EEPROM) Defines for AR531X chips */
+#define AR5K_EEPROM_SIZE_LOWER		0x1b /* size info -- lower */
+#define AR5K_EEPROM_SIZE_UPPER		0x1c /* size info -- upper */
+#define AR5K_EEPROM_SIZE_UPPER_MASK	0xfff0
+#define AR5K_EEPROM_SIZE_UPPER_SHIFT	4
+#define AR5K_EEPROM_SIZE_ENDLOC_SHIFT	12
+
 #define AR5K_EEPROM_CHECKSUM		0x00c0	/* EEPROM checksum */
 #define AR5K_EEPROM_INFO_BASE		0x00c0	/* EEPROM header */
 #define AR5K_EEPROM_INFO_MAX		(0x400 - AR5K_EEPROM_INFO_BASE)
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/ath/ath5k/eeprom.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/ath/ath5k/eeprom.c
@@ -97,6 +97,7 @@
 	struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
 	int ret;
 	u16 val;
+	u32 cksum, offset, eep_max = AR5K_EEPROM_INFO_MAX;
 
 	/*
 	 * Read values from EEPROM and store them in the capability structure
@@ -111,20 +112,44 @@
 	if (ah->ah_ee_version < AR5K_EEPROM_VERSION_3_0)
 		return 0;
 
-#ifdef notyet
 	/*
 	 * Validate the checksum of the EEPROM date. There are some
 	 * devices with invalid EEPROMs.
 	 */
-	for (cksum = 0, offset = 0; offset < AR5K_EEPROM_INFO_MAX; offset++) {
+	AR5K_EEPROM_READ(AR5K_EEPROM_SIZE_UPPER, val);
+	if (val) {
+		eep_max = (val & AR5K_EEPROM_SIZE_UPPER_MASK) <<
+			   AR5K_EEPROM_SIZE_ENDLOC_SHIFT;
+		AR5K_EEPROM_READ(AR5K_EEPROM_SIZE_LOWER, val);
+		eep_max = (eep_max | val) - AR5K_EEPROM_INFO_BASE;
+
+		/*
+		 * Fail safe check to prevent stupid loops due
+		 * to busted EEPROMs. XXX: This value is likely too
+		 * big still, waiting on a better value.
+		 */
+		if (eep_max > (3 * AR5K_EEPROM_INFO_MAX)) {
+			ATH5K_ERR(ah->ah_sc, "Invalid max custom EEPROM size: "
+				  "%d (0x%04x) max expected: %d (0x%04x)\n",
+				  eep_max, eep_max,
+				  3 * AR5K_EEPROM_INFO_MAX,
+				  3 * AR5K_EEPROM_INFO_MAX);
+			return -EIO;
+		}
+	}
+
+	for (cksum = 0, offset = 0; offset < eep_max; offset++) {
 		AR5K_EEPROM_READ(AR5K_EEPROM_INFO(offset), val);
 		cksum ^= val;
 	}
 	if (cksum != AR5K_EEPROM_INFO_CKSUM) {
-		ATH5K_ERR(ah->ah_sc, "Invalid EEPROM checksum 0x%04x\n", cksum);
+		ATH5K_ERR(ah->ah_sc, "Invalid EEPROM "
+			  "checksum: 0x%04x eep_max: 0x%04x (%s)\n",
+			  cksum, eep_max,
+			  eep_max == AR5K_EEPROM_INFO_MAX ?
+				"default size" : "custom size");
 		return -EIO;
 	}
-#endif
 
 	AR5K_EEPROM_READ_HDR(AR5K_EEPROM_ANT_GAIN(ah->ah_ee_version),
 	    ee_ant_gain);
@@ -1563,14 +1588,12 @@
 		if (!chinfo[pier].pd_curves)
 			continue;
 
-		for (pdg = 0; pdg < ee->ee_pd_gains[mode]; pdg++) {
+		for (pdg = 0; pdg < AR5K_EEPROM_N_PD_CURVES; pdg++) {
 			struct ath5k_pdgain_info *pd =
 					&chinfo[pier].pd_curves[pdg];
 
-			if (pd != NULL) {
-				kfree(pd->pd_step);
-				kfree(pd->pd_pwr);
-			}
+			kfree(pd->pd_step);
+			kfree(pd->pd_pwr);
 		}
 
 		kfree(chinfo[pier].pd_curves);
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/ath/ath5k/reset.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/ath/ath5k/reset.c
@@ -1382,8 +1382,9 @@
 	 * Set clocks to 32KHz operation and use an
 	 * external 32KHz crystal when sleeping if one
 	 * exists */
-	if (ah->ah_version == AR5K_AR5212)
-			ath5k_hw_set_sleep_clock(ah, true);
+	if (ah->ah_version == AR5K_AR5212 &&
+	    ah->ah_op_mode != NL80211_IFTYPE_AP)
+		ath5k_hw_set_sleep_clock(ah, true);
 
 	/*
 	 * Disable beacons and reset the register
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/ath/ath5k/ath5k.h
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/ath/ath5k/ath5k.h
@@ -540,13 +540,12 @@
 	u32	tqi_cbr_period; /* Constant bit rate period */
 	u32	tqi_cbr_overflow_limit;
 	u32	tqi_burst_time;
-	u32	tqi_ready_time; /* Not used */
+	u32	tqi_ready_time; /* Time queue waits after an event */
 };
 
 /*
  * Transmit packet types.
  * used on tx control descriptor
- * TODO: Use them inside base.c corectly
  */
 enum ath5k_pkt_type {
 	AR5K_PKT_TYPE_NORMAL		= 0,
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/ath/ath5k/base.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/ath/ath5k/base.c
@@ -48,6 +48,7 @@
 #include <linux/netdevice.h>
 #include <linux/cache.h>
 #include <linux/pci.h>
+#include <linux/pci-aspm.h>
 #include <linux/ethtool.h>
 #include <linux/uaccess.h>
 
@@ -448,6 +449,26 @@
 	int ret;
 	u8 csz;
 
+	/*
+	 * L0s needs to be disabled on all ath5k cards.
+	 *
+	 * For distributions shipping with CONFIG_PCIEASPM (this will be enabled
+	 * by default in the future in 2.6.36) this will also mean both L1 and
+	 * L0s will be disabled when a pre 1.1 PCIe device is detected. We do
+	 * know L1 works correctly even for all ath5k pre 1.1 PCIe devices
+	 * though but cannot currently undue the effect of a blacklist, for
+	 * details you can read pcie_aspm_sanity_check() and see how it adjusts
+	 * the device link capability.
+	 *
+	 * It may be possible in the future to implement some PCI API to allow
+	 * drivers to override blacklists for pre 1.1 PCIe but for now it is
+	 * best to accept that both L0s and L1 will be disabled completely for
+	 * distributions shipping with CONFIG_PCIEASPM rather than having this
+	 * issue present. Motivation for adding this new API will be to help
+	 * with power consumption for some of these devices.
+	 */
+	pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
+
 	ret = pci_enable_device(pdev);
 	if (ret) {
 		dev_err(&pdev->dev, "can't enable device\n");
@@ -1220,6 +1241,29 @@
 	return 0;
 }
 
+static enum ath5k_pkt_type get_hw_packet_type(struct sk_buff *skb)
+{
+	struct ieee80211_hdr *hdr;
+	enum ath5k_pkt_type htype;
+	__le16 fc;
+
+	hdr = (struct ieee80211_hdr *)skb->data;
+	fc = hdr->frame_control;
+
+	if (ieee80211_is_beacon(fc))
+		htype = AR5K_PKT_TYPE_BEACON;
+	else if (ieee80211_is_probe_resp(fc))
+		htype = AR5K_PKT_TYPE_PROBE_RESP;
+	else if (ieee80211_is_atim(fc))
+		htype = AR5K_PKT_TYPE_ATIM;
+	else if (ieee80211_is_pspoll(fc))
+		htype = AR5K_PKT_TYPE_PSPOLL;
+	else
+		htype = AR5K_PKT_TYPE_NORMAL;
+
+	return htype;
+}
+
 static int
 ath5k_txbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf,
 		  struct ath5k_txq *txq)
@@ -1244,6 +1288,10 @@
 			PCI_DMA_TODEVICE);
 
 	rate = ieee80211_get_tx_rate(sc->hw, info);
+	if (!rate) {
+		ret = -EINVAL;
+		goto err_unmap;
+	}
 
 	if (info->flags & IEEE80211_TX_CTL_NO_ACK)
 		flags |= AR5K_TXDESC_NOACK;
@@ -1274,7 +1322,8 @@
 			sc->vif, pktlen, info));
 	}
 	ret = ah->ah_setup_tx_desc(ah, ds, pktlen,
-		ieee80211_get_hdrlen_from_skb(skb), AR5K_PKT_TYPE_NORMAL,
+		ieee80211_get_hdrlen_from_skb(skb),
+		get_hw_packet_type(skb),
 		(sc->power_level * 2),
 		hw_rate,
 		info->control.rates[0].count, keyidx, ah->ah_tx_ant, flags,
@@ -1487,7 +1536,8 @@
 
 	ret = ath5k_hw_get_tx_queueprops(ah, sc->bhalq, &qi);
 	if (ret)
-		return ret;
+		goto err;
+
 	if (sc->opmode == NL80211_IFTYPE_AP ||
 		sc->opmode == NL80211_IFTYPE_MESH_POINT) {
 		/*
@@ -1514,10 +1564,25 @@
 	if (ret) {
 		ATH5K_ERR(sc, "%s: unable to update parameters for beacon "
 			"hardware queue!\n", __func__);
-		return ret;
+		goto err;
 	}
+	ret = ath5k_hw_reset_tx_queue(ah, sc->bhalq); /* push to h/w */
+	if (ret)
+		goto err;
+
+	/* reconfigure cabq with ready time to 80% of beacon_interval */
+	ret = ath5k_hw_get_tx_queueprops(ah, AR5K_TX_QUEUE_ID_CAB, &qi);
+	if (ret)
+		goto err;
+
+	qi.tqi_ready_time = (sc->bintval * 80) / 100;
+	ret = ath5k_hw_set_tx_queueprops(ah, AR5K_TX_QUEUE_ID_CAB, &qi);
+	if (ret)
+		goto err;
 
-	return ath5k_hw_reset_tx_queue(ah, sc->bhalq); /* push to h/w */;
+	ret = ath5k_hw_reset_tx_queue(ah, AR5K_TX_QUEUE_ID_CAB);
+err:
+	return ret;
 }
 
 static void
@@ -1778,11 +1843,6 @@
 			return;
 		}
 
-		if (unlikely(rs.rs_more)) {
-			ATH5K_WARN(sc, "unsupported jumbo\n");
-			goto next;
-		}
-
 		if (unlikely(rs.rs_status)) {
 			if (rs.rs_status & AR5K_RXERR_PHY)
 				goto next;
@@ -1812,6 +1872,8 @@
 					sc->opmode != NL80211_IFTYPE_MONITOR)
 				goto next;
 		}
+		if (unlikely(rs.rs_more))
+			goto next;
 accept:
 		next_skb = ath5k_rx_skb_alloc(sc, &next_skb_addr);
 
@@ -2349,6 +2411,9 @@
 	 */
 	ath5k_stop_locked(sc);
 
+	/* Set PHY calibration interval */
+	ah->ah_cal_intval = ath5k_calinterval;
+
 	/*
 	 * The basic interface to setting the hardware in a good
 	 * state is ``reset''.  On return the hardware is known to
@@ -2376,10 +2441,6 @@
 
 	/* Set ack to be sent at low bit-rates */
 	ath5k_hw_set_ack_bitrate_high(ah, false);
-
-	/* Set PHY calibration inteval */
-	ah->ah_cal_intval = ath5k_calinterval;
-
 	ret = 0;
 done:
 	mmiowb();
@@ -2936,13 +2997,15 @@
 
 	if (changed_flags & (FIF_PROMISC_IN_BSS | FIF_OTHER_BSS)) {
 		if (*new_flags & FIF_PROMISC_IN_BSS) {
-			rfilt |= AR5K_RX_FILTER_PROM;
 			__set_bit(ATH_STAT_PROMISC, sc->status);
 		} else {
 			__clear_bit(ATH_STAT_PROMISC, sc->status);
 		}
 	}
 
+	if (test_bit(ATH_STAT_PROMISC, sc->status))
+		rfilt |= AR5K_RX_FILTER_PROM;
+
 	/* Note, AR5K_RX_FILTER_MCAST is already enabled */
 	if (*new_flags & FIF_ALLMULTI) {
 		mfilt[0] =  ~0;
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/ath/ath5k/attach.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/ath/ath5k/attach.c
@@ -133,6 +133,7 @@
 	ah->ah_cw_min = AR5K_TUNE_CWMIN;
 	ah->ah_limit_tx_retries = AR5K_INIT_TX_RETRY;
 	ah->ah_software_retry = false;
+	ah->ah_current_channel = &sc->channels[0];
 
 	/*
 	 * Find the mac version
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/ath/ath5k/qcu.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/ath/ath5k/qcu.c
@@ -408,12 +408,13 @@
 			break;
 
 		case AR5K_TX_QUEUE_CAB:
+			/* XXX: use BCN_SENT_GT, if we can figure out how */
 			AR5K_REG_ENABLE_BITS(ah, AR5K_QUEUE_MISC(queue),
-				AR5K_QCU_MISC_FRSHED_BCN_SENT_GT |
+				AR5K_QCU_MISC_FRSHED_DBA_GT |
 				AR5K_QCU_MISC_CBREXP_DIS |
 				AR5K_QCU_MISC_CBREXP_BCN_DIS);
 
-			ath5k_hw_reg_write(ah, ((AR5K_TUNE_BEACON_INTERVAL -
+			ath5k_hw_reg_write(ah, ((tq->tqi_ready_time -
 				(AR5K_TUNE_SW_BEACON_RESP -
 				AR5K_TUNE_DMA_BEACON_RESP) -
 				AR5K_TUNE_ADDITIONAL_SWBA_BACKOFF) * 1024) |
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/ath/ar9170/main.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/ath/ar9170/main.c
@@ -2526,7 +2526,7 @@
 	 * tends to split the streams into seperate rx descriptors.
 	 */
 
-	skb = __dev_alloc_skb(AR9170_MAX_RX_BUFFER_SIZE, GFP_KERNEL);
+	skb = __dev_alloc_skb(AR9170_RX_STREAM_MAX_SIZE, GFP_KERNEL);
 	if (!skb)
 		goto err_nomem;
 
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/ath/ar9170/usb.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/ath/ar9170/usb.c
@@ -66,16 +66,28 @@
 	{ USB_DEVICE(0x0cf3, 0x1001) },
 	/* TP-Link TL-WN821N v2 */
 	{ USB_DEVICE(0x0cf3, 0x1002) },
+	/* 3Com Dual Band 802.11n USB Adapter */
+	{ USB_DEVICE(0x0cf3, 0x1010) },
+	/* H3C Dual Band 802.11n USB Adapter */
+	{ USB_DEVICE(0x0cf3, 0x1011) },
 	/* Cace Airpcap NX */
 	{ USB_DEVICE(0xcace, 0x0300) },
-	/* D-Link DWA 160A */
+	/* D-Link DWA 160 A1 */
 	{ USB_DEVICE(0x07d1, 0x3c10) },
+	/* D-Link DWA 160 A2 */
+	{ USB_DEVICE(0x07d1, 0x3a09) },
+	/* Netgear WNA1000 */
+	{ USB_DEVICE(0x0846, 0x9040) },
 	/* Netgear WNDA3100 */
 	{ USB_DEVICE(0x0846, 0x9010) },
 	/* Netgear WN111 v2 */
 	{ USB_DEVICE(0x0846, 0x9001) },
 	/* Zydas ZD1221 */
 	{ USB_DEVICE(0x0ace, 0x1221) },
+	/* Proxim ORiNOCO 802.11n USB */
+	{ USB_DEVICE(0x1435, 0x0804) },
+	/* WNC Generic 11n USB Dongle */
+	{ USB_DEVICE(0x1435, 0x0326) },
 	/* ZyXEL NWD271N */
 	{ USB_DEVICE(0x0586, 0x3417) },
 	/* Z-Com UB81 BG */
@@ -412,7 +424,7 @@
 	spin_unlock_irqrestore(&aru->common.cmdlock, flags);
 
 	usb_fill_int_urb(urb, aru->udev,
-			 usb_sndbulkpipe(aru->udev, AR9170_EP_CMD),
+			 usb_sndintpipe(aru->udev, AR9170_EP_CMD),
 			 aru->common.cmdbuf, plen + 4,
 			 ar9170_usb_tx_urb_complete, NULL, 1);
 
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/ath/ar9170/hw.h
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/ath/ar9170/hw.h
@@ -422,5 +422,6 @@
 
 #define AR9170_TXQ_DEPTH	32
 #define AR9170_TX_MAX_PENDING	128
+#define AR9170_RX_STREAM_MAX_SIZE 65535
 
 #endif /* __AR9170_HW_H */
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/b43legacy/rfkill.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/b43legacy/rfkill.c
@@ -34,6 +34,13 @@
 		      & B43legacy_MMIO_RADIO_HWENABLED_HI_MASK))
 			return 1;
 	} else {
+		/* To prevent CPU fault on PPC, do not read a register
+		 * unless the interface is started; however, on resume
+		 * for hibernation, this routine is entered early. When
+		 * that happens, unconditionally return TRUE.
+		 */
+		if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
+			return 1;
 		if (b43legacy_read16(dev, B43legacy_MMIO_RADIO_HWENABLED_LO)
 		    & B43legacy_MMIO_RADIO_HWENABLED_LO_MASK)
 			return 1;
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/b43legacy/main.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/b43legacy/main.c
@@ -2921,6 +2921,7 @@
 		goto out;
 	}
 	/* We are ready to run. */
+	ieee80211_wake_queues(dev->wl->hw);
 	b43legacy_set_status(dev, B43legacy_STAT_STARTED);
 
 	/* Start data flow (TX/RX) */
@@ -3341,6 +3342,7 @@
 	b43legacy_security_init(dev);
 	b43legacy_rng_init(wl);
 
+	ieee80211_wake_queues(dev->wl->hw);
 	b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
 
 	b43legacy_leds_init(dev);
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/iwmc3200wifi/iwm.h
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/iwmc3200wifi/iwm.h
@@ -258,7 +258,7 @@
 
 	struct sk_buff_head rx_list;
 	struct list_head rx_tickets;
-	struct list_head rx_packets[IWM_RX_ID_HASH];
+	struct list_head rx_packets[IWM_RX_ID_HASH + 1];
 	struct workqueue_struct *rx_wq;
 	struct work_struct rx_worker;
 
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/orinoco/wext.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/orinoco/wext.c
@@ -23,7 +23,7 @@
 #define MAX_RID_LEN 1024
 
 /* Helper routine to record keys
- * Do not call from interrupt context */
+ * It is called under orinoco_lock so it may not sleep */
 static int orinoco_set_key(struct orinoco_private *priv, int index,
 			   enum orinoco_alg alg, const u8 *key, int key_len,
 			   const u8 *seq, int seq_len)
@@ -32,14 +32,14 @@
 	kzfree(priv->keys[index].seq);
 
 	if (key_len) {
-		priv->keys[index].key = kzalloc(key_len, GFP_KERNEL);
+		priv->keys[index].key = kzalloc(key_len, GFP_ATOMIC);
 		if (!priv->keys[index].key)
 			goto nomem;
 	} else
 		priv->keys[index].key = NULL;
 
 	if (seq_len) {
-		priv->keys[index].seq = kzalloc(seq_len, GFP_KERNEL);
+		priv->keys[index].seq = kzalloc(seq_len, GFP_ATOMIC);
 		if (!priv->keys[index].seq)
 			goto free_key;
 	} else
@@ -1022,10 +1022,10 @@
 		 */
 		if (param->value) {
 			priv->tkip_cm_active = 1;
-			ret = hermes_enable_port(hw, 0);
+			ret = hermes_disable_port(hw, 0);
 		} else {
 			priv->tkip_cm_active = 0;
-			ret = hermes_disable_port(hw, 0);
+			ret = hermes_enable_port(hw, 0);
 		}
 		break;
 
--- linux-mvl-dove-2.6.32.orig/drivers/net/wireless/orinoco/main.c
+++ linux-mvl-dove-2.6.32/drivers/net/wireless/orinoco/main.c
@@ -1767,6 +1767,12 @@
 	struct net_device *dev = priv->ndev;
 	int err = 0;
 
+	/* If we've called commit, we are reconfiguring or bringing the
+	 * interface up. Maintaining countermeasures across this would
+	 * be confusing, so note that we've disabled them. The port will
+	 * be enabled later in orinoco_commit or __orinoco_up. */
+	priv->tkip_cm_active = 0;
+
 	err = orinoco_hw_program_rids(priv);
 
 	/* FIXME: what about netif_tx_lock */
--- linux-mvl-dove-2.6.32.orig/drivers/net/igb/e1000_mbx.c
+++ linux-mvl-dove-2.6.32/drivers/net/igb/e1000_mbx.c
@@ -143,12 +143,16 @@
 	if (!countdown || !mbx->ops.check_for_msg)
 		goto out;
 
-	while (mbx->ops.check_for_msg(hw, mbx_id)) {
+	while (countdown && mbx->ops.check_for_msg(hw, mbx_id)) {
 		countdown--;
 		if (!countdown)
 			break;
 		udelay(mbx->usec_delay);
 	}
+
+	/* if we failed, all future posted messages fail until reset */
+	if (!countdown)
+		mbx->timeout = 0;
 out:
 	return countdown ? 0 : -E1000_ERR_MBX;
 }
@@ -168,12 +172,16 @@
 	if (!countdown || !mbx->ops.check_for_ack)
 		goto out;
 
-	while (mbx->ops.check_for_ack(hw, mbx_id)) {
+	while (countdown && mbx->ops.check_for_ack(hw, mbx_id)) {
 		countdown--;
 		if (!countdown)
 			break;
 		udelay(mbx->usec_delay);
 	}
+
+	/* if we failed, all future posted messages fail until reset */
+	if (!countdown)
+		mbx->timeout = 0;
 out:
 	return countdown ? 0 : -E1000_ERR_MBX;
 }
@@ -217,12 +225,13 @@
 static s32 igb_write_posted_mbx(struct e1000_hw *hw, u32 *msg, u16 size, u16 mbx_id)
 {
 	struct e1000_mbx_info *mbx = &hw->mbx;
-	s32 ret_val = 0;
+	s32 ret_val = -E1000_ERR_MBX;
 
-	if (!mbx->ops.write)
+	/* exit if either we can't write or there isn't a defined timeout */
+	if (!mbx->ops.write || !mbx->timeout)
 		goto out;
 
-	/* send msg*/
+	/* send msg */
 	ret_val = mbx->ops.write(hw, msg, size, mbx_id);
 
 	/* if msg sent wait until we receive an ack */
@@ -305,6 +314,30 @@
 }
 
 /**
+ *  igb_obtain_mbx_lock_pf - obtain mailbox lock
+ *  @hw: pointer to the HW structure
+ *  @vf_number: the VF index
+ *
+ *  return SUCCESS if we obtained the mailbox lock
+ **/
+static s32 igb_obtain_mbx_lock_pf(struct e1000_hw *hw, u16 vf_number)
+{
+	s32 ret_val = -E1000_ERR_MBX;
+	u32 p2v_mailbox;
+
+
+	/* Take ownership of the buffer */
+	wr32(E1000_P2VMAILBOX(vf_number), E1000_P2VMAILBOX_PFU);
+
+	/* reserve mailbox for vf use */
+	p2v_mailbox = rd32(E1000_P2VMAILBOX(vf_number));
+	if (p2v_mailbox & E1000_P2VMAILBOX_PFU)
+		ret_val = 0;
+
+	return ret_val;
+}
+
+/**
  *  igb_write_mbx_pf - Places a message in the mailbox
  *  @hw: pointer to the HW structure
  *  @msg: The message buffer
@@ -316,27 +349,17 @@
 static s32 igb_write_mbx_pf(struct e1000_hw *hw, u32 *msg, u16 size,
                               u16 vf_number)
 {
-	u32 p2v_mailbox;
-	s32 ret_val = 0;
+	s32 ret_val;
 	u16 i;
 
-	/* Take ownership of the buffer */
-	wr32(E1000_P2VMAILBOX(vf_number), E1000_P2VMAILBOX_PFU);
-
-	/* Make sure we have ownership now... */
-	p2v_mailbox = rd32(E1000_P2VMAILBOX(vf_number));
-	if (!(p2v_mailbox & E1000_P2VMAILBOX_PFU)) {
-		/* failed to grab ownership */
-		ret_val = -E1000_ERR_MBX;
+	/* lock the mailbox to prevent pf/vf race condition */
+	ret_val = igb_obtain_mbx_lock_pf(hw, vf_number);
+	if (ret_val)
 		goto out_no_write;
-	}
 
-	/*
-	 * flush any ack or msg which may already be in the queue
-	 * as they are likely the result of an error
-	 */
-	igb_check_for_ack_pf(hw, vf_number);
+	/* flush msg and acks as we are overwriting the message buffer */
 	igb_check_for_msg_pf(hw, vf_number);
+	igb_check_for_ack_pf(hw, vf_number);
 
 	/* copy the caller specified message to the mailbox memory buffer */
 	for (i = 0; i < size; i++)
@@ -367,20 +390,13 @@
 static s32 igb_read_mbx_pf(struct e1000_hw *hw, u32 *msg, u16 size,
                              u16 vf_number)
 {
-	u32 p2v_mailbox;
-	s32 ret_val = 0;
+	s32 ret_val;
 	u16 i;
 
-	/* Take ownership of the buffer */
-	wr32(E1000_P2VMAILBOX(vf_number), E1000_P2VMAILBOX_PFU);
-
-	/* Make sure we have ownership now... */
-	p2v_mailbox = rd32(E1000_P2VMAILBOX(vf_number));
-	if (!(p2v_mailbox & E1000_P2VMAILBOX_PFU)) {
-		/* failed to grab ownership */
-		ret_val = -E1000_ERR_MBX;
+	/* lock the mailbox to prevent pf/vf race condition */
+	ret_val = igb_obtain_mbx_lock_pf(hw, vf_number);
+	if (ret_val)
 		goto out_no_read;
-	}
 
 	/* copy the message to the mailbox memory buffer */
 	for (i = 0; i < size; i++)
@@ -392,8 +408,6 @@
 	/* update stats */
 	hw->mbx.stats.msgs_rx++;
 
-	ret_val = 0;
-
 out_no_read:
 	return ret_val;
 }
--- linux-mvl-dove-2.6.32.orig/drivers/net/igb/e1000_phy.c
+++ linux-mvl-dove-2.6.32/drivers/net/igb/e1000_phy.c
@@ -39,6 +39,9 @@
 /* Cable length tables */
 static const u16 e1000_m88_cable_length_table[] =
 	{ 0, 50, 80, 110, 140, 140, E1000_CABLE_LENGTH_UNDEFINED };
+#define M88E1000_CABLE_LENGTH_TABLE_SIZE \
+                (sizeof(e1000_m88_cable_length_table) / \
+                 sizeof(e1000_m88_cable_length_table[0]))
 
 static const u16 e1000_igp_2_cable_length_table[] =
     { 0, 0, 0, 0, 0, 0, 0, 0, 3, 5, 8, 11, 13, 16, 18, 21,
@@ -109,7 +112,10 @@
  **/
 static s32 igb_phy_reset_dsp(struct e1000_hw *hw)
 {
-	s32 ret_val;
+	s32 ret_val = 0;
+
+	if (!(hw->phy.ops.write_reg))
+		goto out;
 
 	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xC1);
 	if (ret_val)
@@ -130,7 +136,7 @@
  *  Reads the MDI control regsiter in the PHY at offset and stores the
  *  information read to data.
  **/
-static s32 igb_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data)
+s32 igb_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data)
 {
 	struct e1000_phy_info *phy = &hw->phy;
 	u32 i, mdic = 0;
@@ -188,7 +194,7 @@
  *
  *  Writes data to MDI control register in the PHY at offset.
  **/
-static s32 igb_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data)
+s32 igb_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data)
 {
 	struct e1000_phy_info *phy = &hw->phy;
 	u32 i, mdic = 0;
@@ -239,6 +245,103 @@
 }
 
 /**
+ *  igb_read_phy_reg_i2c - Read PHY register using i2c
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to be read
+ *  @data: pointer to the read data
+ *
+ *  Reads the PHY register at offset using the i2c interface and stores the
+ *  retrieved information in data.
+ **/
+s32 igb_read_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 *data)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	u32 i, i2ccmd = 0;
+
+
+	/*
+	 * Set up Op-code, Phy Address, and register address in the I2CCMD
+	 * register.  The MAC will take care of interfacing with the
+	 * PHY to retrieve the desired data.
+	 */
+	i2ccmd = ((offset << E1000_I2CCMD_REG_ADDR_SHIFT) |
+	          (phy->addr << E1000_I2CCMD_PHY_ADDR_SHIFT) |
+	          (E1000_I2CCMD_OPCODE_READ));
+
+	wr32(E1000_I2CCMD, i2ccmd);
+
+	/* Poll the ready bit to see if the I2C read completed */
+	for (i = 0; i < E1000_I2CCMD_PHY_TIMEOUT; i++) {
+		udelay(50);
+		i2ccmd = rd32(E1000_I2CCMD);
+		if (i2ccmd & E1000_I2CCMD_READY)
+			break;
+	}
+	if (!(i2ccmd & E1000_I2CCMD_READY)) {
+		hw_dbg("I2CCMD Read did not complete\n");
+		return -E1000_ERR_PHY;
+	}
+	if (i2ccmd & E1000_I2CCMD_ERROR) {
+		hw_dbg("I2CCMD Error bit set\n");
+		return -E1000_ERR_PHY;
+	}
+
+	/* Need to byte-swap the 16-bit value. */
+	*data = ((i2ccmd >> 8) & 0x00FF) | ((i2ccmd << 8) & 0xFF00);
+
+	return 0;
+}
+
+/**
+ *  igb_write_phy_reg_i2c - Write PHY register using i2c
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to write to
+ *  @data: data to write at register offset
+ *
+ *  Writes the data to PHY register at the offset using the i2c interface.
+ **/
+s32 igb_write_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 data)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	u32 i, i2ccmd = 0;
+	u16 phy_data_swapped;
+
+
+	/* Swap the data bytes for the I2C interface */
+	phy_data_swapped = ((data >> 8) & 0x00FF) | ((data << 8) & 0xFF00);
+
+	/*
+	 * Set up Op-code, Phy Address, and register address in the I2CCMD
+	 * register.  The MAC will take care of interfacing with the
+	 * PHY to retrieve the desired data.
+	 */
+	i2ccmd = ((offset << E1000_I2CCMD_REG_ADDR_SHIFT) |
+	          (phy->addr << E1000_I2CCMD_PHY_ADDR_SHIFT) |
+	          E1000_I2CCMD_OPCODE_WRITE |
+	          phy_data_swapped);
+
+	wr32(E1000_I2CCMD, i2ccmd);
+
+	/* Poll the ready bit to see if the I2C read completed */
+	for (i = 0; i < E1000_I2CCMD_PHY_TIMEOUT; i++) {
+		udelay(50);
+		i2ccmd = rd32(E1000_I2CCMD);
+		if (i2ccmd & E1000_I2CCMD_READY)
+			break;
+	}
+	if (!(i2ccmd & E1000_I2CCMD_READY)) {
+		hw_dbg("I2CCMD Write did not complete\n");
+		return -E1000_ERR_PHY;
+	}
+	if (i2ccmd & E1000_I2CCMD_ERROR) {
+		hw_dbg("I2CCMD Error bit set\n");
+		return -E1000_ERR_PHY;
+	}
+
+	return 0;
+}
+
+/**
  *  igb_read_phy_reg_igp - Read igp PHY register
  *  @hw: pointer to the HW structure
  *  @offset: register offset to be read
@@ -318,6 +421,48 @@
 }
 
 /**
+ *  igb_copper_link_setup_82580 - Setup 82580 PHY for copper link
+ *  @hw: pointer to the HW structure
+ *
+ *  Sets up Carrier-sense on Transmit and downshift values.
+ **/
+s32 igb_copper_link_setup_82580(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 phy_data;
+
+
+	if (phy->reset_disable) {
+		ret_val = 0;
+		goto out;
+	}
+
+	if (phy->type == e1000_phy_82580) {
+		ret_val = hw->phy.ops.reset(hw);
+		if (ret_val) {
+			hw_dbg("Error resetting the PHY.\n");
+			goto out;
+		}
+	}
+
+	/* Enable CRS on TX. This must be set for half-duplex operation. */
+	ret_val = phy->ops.read_reg(hw, I82580_CFG_REG, &phy_data);
+	if (ret_val)
+		goto out;
+
+	phy_data |= I82580_CFG_ASSERT_CRS_ON_TX;
+
+	/* Enable downshift */
+	phy_data |= I82580_CFG_ENABLE_DOWNSHIFT;
+
+	ret_val = phy->ops.write_reg(hw, I82580_CFG_REG, phy_data);
+
+out:
+	return ret_val;
+}
+
+/**
  *  igb_copper_link_setup_m88 - Setup m88 PHY's for copper link
  *  @hw: pointer to the HW structure
  *
@@ -572,7 +717,7 @@
  *  and restart the negotiation process between the link partner.  If
  *  autoneg_wait_to_complete, then wait for autoneg to complete before exiting.
  **/
-s32 igb_copper_link_autoneg(struct e1000_hw *hw)
+static s32 igb_copper_link_autoneg(struct e1000_hw *hw)
 {
 	struct e1000_phy_info *phy = &hw->phy;
 	s32 ret_val;
@@ -796,6 +941,65 @@
 }
 
 /**
+ *  igb_setup_copper_link - Configure copper link settings
+ *  @hw: pointer to the HW structure
+ *
+ *  Calls the appropriate function to configure the link for auto-neg or forced
+ *  speed and duplex.  Then we check for link, once link is established calls
+ *  to configure collision distance and flow control are called.  If link is
+ *  not established, we return -E1000_ERR_PHY (-2).
+ **/
+s32 igb_setup_copper_link(struct e1000_hw *hw)
+{
+	s32 ret_val;
+	bool link;
+
+
+	if (hw->mac.autoneg) {
+		/*
+		 * Setup autoneg and flow control advertisement and perform
+		 * autonegotiation.
+		 */
+		ret_val = igb_copper_link_autoneg(hw);
+		if (ret_val)
+			goto out;
+	} else {
+		/*
+		 * PHY will be set to 10H, 10F, 100H or 100F
+		 * depending on user settings.
+		 */
+		hw_dbg("Forcing Speed and Duplex\n");
+		ret_val = hw->phy.ops.force_speed_duplex(hw);
+		if (ret_val) {
+			hw_dbg("Error Forcing Speed and Duplex\n");
+			goto out;
+		}
+	}
+
+	/*
+	 * Check link status. Wait up to 100 microseconds for link to become
+	 * valid.
+	 */
+	ret_val = igb_phy_has_link(hw,
+	                           COPPER_LINK_UP_LIMIT,
+	                           10,
+	                           &link);
+	if (ret_val)
+		goto out;
+
+	if (link) {
+		hw_dbg("Valid link established!!!\n");
+		igb_config_collision_dist(hw);
+		ret_val = igb_config_fc_after_link_up(hw);
+	} else {
+		hw_dbg("Unable to establish link!!!\n");
+	}
+
+out:
+	return ret_val;
+}
+
+/**
  *  igb_phy_force_speed_duplex_igp - Force speed/duplex for igp PHY
  *  @hw: pointer to the HW structure
  *
@@ -903,22 +1107,19 @@
 
 	igb_phy_force_speed_duplex_setup(hw, &phy_data);
 
-	/* Reset the phy to commit changes. */
-	phy_data |= MII_CR_RESET;
-
 	ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_data);
 	if (ret_val)
 		goto out;
 
-	udelay(1);
+	/* Reset the phy to commit changes. */
+	ret_val = igb_phy_sw_reset(hw);
+	if (ret_val)
+		goto out;
 
 	if (phy->autoneg_wait_to_complete) {
 		hw_dbg("Waiting for forced speed/duplex link on M88 phy.\n");
 
-		ret_val = igb_phy_has_link(hw,
-						     PHY_FORCE_LIMIT,
-						     100000,
-						     &link);
+		ret_val = igb_phy_has_link(hw, PHY_FORCE_LIMIT, 100000, &link);
 		if (ret_val)
 			goto out;
 
@@ -928,8 +1129,8 @@
 			 * Reset the DSP and cross our fingers.
 			 */
 			ret_val = phy->ops.write_reg(hw,
-						      M88E1000_PHY_PAGE_SELECT,
-						      0x001d);
+						     M88E1000_PHY_PAGE_SELECT,
+						     0x001d);
 			if (ret_val)
 				goto out;
 			ret_val = igb_phy_reset_dsp(hw);
@@ -939,7 +1140,7 @@
 
 		/* Try once more */
 		ret_val = igb_phy_has_link(hw, PHY_FORCE_LIMIT,
-					     100000, &link);
+					   100000, &link);
 		if (ret_val)
 			goto out;
 	}
@@ -1051,9 +1252,12 @@
 s32 igb_set_d3_lplu_state(struct e1000_hw *hw, bool active)
 {
 	struct e1000_phy_info *phy = &hw->phy;
-	s32 ret_val;
+	s32 ret_val = 0;
 	u16 data;
 
+	if (!(hw->phy.ops.read_reg))
+		goto out;
+
 	ret_val = phy->ops.read_reg(hw, IGP02E1000_PHY_POWER_MGMT, &data);
 	if (ret_val)
 		goto out;
@@ -1288,8 +1492,14 @@
 		 * it across the board.
 		 */
 		ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status);
-		if (ret_val)
-			break;
+		if (ret_val) {
+			/*
+			 * If the first read fails, another entity may have
+			 * ownership of the resources, wait and try again to
+			 * see if they have relinquished the resources yet.
+			 */
+			udelay(usec_interval);
+		}
 		ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status);
 		if (ret_val)
 			break;
@@ -1333,8 +1543,13 @@
 
 	index = (phy_data & M88E1000_PSSR_CABLE_LENGTH) >>
 		M88E1000_PSSR_CABLE_LENGTH_SHIFT;
+	if (index >= M88E1000_CABLE_LENGTH_TABLE_SIZE - 1) {
+		ret_val = -E1000_ERR_PHY;
+		goto out;
+	}
+
 	phy->min_cable_length = e1000_m88_cable_length_table[index];
-	phy->max_cable_length = e1000_m88_cable_length_table[index+1];
+	phy->max_cable_length = e1000_m88_cable_length_table[index + 1];
 
 	phy->cable_length = (phy->min_cable_length + phy->max_cable_length) / 2;
 
@@ -1715,3 +1930,194 @@
 	return 0;
 }
 
+/**
+ *  igb_check_polarity_82580 - Checks the polarity.
+ *  @hw: pointer to the HW structure
+ *
+ *  Success returns 0, Failure returns -E1000_ERR_PHY (-2)
+ *
+ *  Polarity is determined based on the PHY specific status register.
+ **/
+static s32 igb_check_polarity_82580(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 data;
+
+
+	ret_val = phy->ops.read_reg(hw, I82580_PHY_STATUS_2, &data);
+
+	if (!ret_val)
+		phy->cable_polarity = (data & I82580_PHY_STATUS2_REV_POLARITY)
+		                      ? e1000_rev_polarity_reversed
+		                      : e1000_rev_polarity_normal;
+
+	return ret_val;
+}
+
+/**
+ *  igb_phy_force_speed_duplex_82580 - Force speed/duplex for I82580 PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  Calls the PHY setup function to force speed and duplex.  Clears the
+ *  auto-crossover to force MDI manually.  Waits for link and returns
+ *  successful if link up is successful, else -E1000_ERR_PHY (-2).
+ **/
+s32 igb_phy_force_speed_duplex_82580(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 phy_data;
+	bool link;
+
+
+	ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_data);
+	if (ret_val)
+		goto out;
+
+	igb_phy_force_speed_duplex_setup(hw, &phy_data);
+
+	ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_data);
+	if (ret_val)
+		goto out;
+
+	/*
+	 * Clear Auto-Crossover to force MDI manually.  82580 requires MDI
+	 * forced whenever speed and duplex are forced.
+	 */
+	ret_val = phy->ops.read_reg(hw, I82580_PHY_CTRL_2, &phy_data);
+	if (ret_val)
+		goto out;
+
+	phy_data &= ~I82580_PHY_CTRL2_AUTO_MDIX;
+	phy_data &= ~I82580_PHY_CTRL2_FORCE_MDI_MDIX;
+
+	ret_val = phy->ops.write_reg(hw, I82580_PHY_CTRL_2, phy_data);
+	if (ret_val)
+		goto out;
+
+	hw_dbg("I82580_PHY_CTRL_2: %X\n", phy_data);
+
+	udelay(1);
+
+	if (phy->autoneg_wait_to_complete) {
+		hw_dbg("Waiting for forced speed/duplex link on 82580 phy\n");
+
+		ret_val = igb_phy_has_link(hw,
+		                           PHY_FORCE_LIMIT,
+		                           100000,
+		                           &link);
+		if (ret_val)
+			goto out;
+
+		if (!link)
+			hw_dbg("Link taking longer than expected.\n");
+
+		/* Try once more */
+		ret_val = igb_phy_has_link(hw,
+		                           PHY_FORCE_LIMIT,
+		                           100000,
+		                           &link);
+		if (ret_val)
+			goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_get_phy_info_82580 - Retrieve I82580 PHY information
+ *  @hw: pointer to the HW structure
+ *
+ *  Read PHY status to determine if link is up.  If link is up, then
+ *  set/determine 10base-T extended distance and polarity correction.  Read
+ *  PHY port status to determine MDI/MDIx and speed.  Based on the speed,
+ *  determine on the cable length, local and remote receiver.
+ **/
+s32 igb_get_phy_info_82580(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 data;
+	bool link;
+
+
+	ret_val = igb_phy_has_link(hw, 1, 0, &link);
+	if (ret_val)
+		goto out;
+
+	if (!link) {
+		hw_dbg("Phy info is only valid if link is up\n");
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+	phy->polarity_correction = true;
+
+	ret_val = igb_check_polarity_82580(hw);
+	if (ret_val)
+		goto out;
+
+	ret_val = phy->ops.read_reg(hw, I82580_PHY_STATUS_2, &data);
+	if (ret_val)
+		goto out;
+
+	phy->is_mdix = (data & I82580_PHY_STATUS2_MDIX) ? true : false;
+
+	if ((data & I82580_PHY_STATUS2_SPEED_MASK) ==
+	    I82580_PHY_STATUS2_SPEED_1000MBPS) {
+		ret_val = hw->phy.ops.get_cable_length(hw);
+		if (ret_val)
+			goto out;
+
+		ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, &data);
+		if (ret_val)
+			goto out;
+
+		phy->local_rx = (data & SR_1000T_LOCAL_RX_STATUS)
+		                ? e1000_1000t_rx_status_ok
+		                : e1000_1000t_rx_status_not_ok;
+
+		phy->remote_rx = (data & SR_1000T_REMOTE_RX_STATUS)
+		                 ? e1000_1000t_rx_status_ok
+		                 : e1000_1000t_rx_status_not_ok;
+	} else {
+		phy->cable_length = E1000_CABLE_LENGTH_UNDEFINED;
+		phy->local_rx = e1000_1000t_rx_status_undefined;
+		phy->remote_rx = e1000_1000t_rx_status_undefined;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_get_cable_length_82580 - Determine cable length for 82580 PHY
+ *  @hw: pointer to the HW structure
+ *
+ * Reads the diagnostic status register and verifies result is valid before
+ * placing it in the phy_cable_length field.
+ **/
+s32 igb_get_cable_length_82580(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 phy_data, length;
+
+
+	ret_val = phy->ops.read_reg(hw, I82580_PHY_DIAG_STATUS, &phy_data);
+	if (ret_val)
+		goto out;
+
+	length = (phy_data & I82580_DSTATUS_CABLE_LENGTH) >>
+	         I82580_DSTATUS_CABLE_LENGTH_SHIFT;
+
+	if (length == E1000_CABLE_LENGTH_UNDEFINED)
+		ret_val = -E1000_ERR_PHY;
+
+	phy->cable_length = length;
+
+out:
+	return ret_val;
+}
--- linux-mvl-dove-2.6.32.orig/drivers/net/igb/e1000_hw.h
+++ linux-mvl-dove-2.6.32/drivers/net/igb/e1000_hw.h
@@ -42,20 +42,35 @@
 #define E1000_DEV_ID_82576_SERDES             0x10E7
 #define E1000_DEV_ID_82576_QUAD_COPPER        0x10E8
 #define E1000_DEV_ID_82576_NS                 0x150A
+#define E1000_DEV_ID_82576_NS_SERDES          0x1518
 #define E1000_DEV_ID_82576_SERDES_QUAD        0x150D
 #define E1000_DEV_ID_82575EB_COPPER           0x10A7
 #define E1000_DEV_ID_82575EB_FIBER_SERDES     0x10A9
 #define E1000_DEV_ID_82575GB_QUAD_COPPER      0x10D6
+#define E1000_DEV_ID_82580_COPPER             0x150E
+#define E1000_DEV_ID_82580_FIBER              0x150F
+#define E1000_DEV_ID_82580_SERDES             0x1510
+#define E1000_DEV_ID_82580_SGMII              0x1511
+#define E1000_DEV_ID_82580_COPPER_DUAL        0x1516
 
 #define E1000_REVISION_2 2
 #define E1000_REVISION_4 4
 
+#define E1000_FUNC_0     0
 #define E1000_FUNC_1     1
+#define E1000_FUNC_2     2
+#define E1000_FUNC_3     3
+
+#define E1000_ALT_MAC_ADDRESS_OFFSET_LAN0   0
+#define E1000_ALT_MAC_ADDRESS_OFFSET_LAN1   3
+#define E1000_ALT_MAC_ADDRESS_OFFSET_LAN2   6
+#define E1000_ALT_MAC_ADDRESS_OFFSET_LAN3   9
 
 enum e1000_mac_type {
 	e1000_undefined = 0,
 	e1000_82575,
 	e1000_82576,
+	e1000_82580,
 	e1000_num_macs  /* List is 1-based, so subtract 1 for true count. */
 };
 
@@ -70,7 +85,6 @@
 	e1000_nvm_unknown = 0,
 	e1000_nvm_none,
 	e1000_nvm_eeprom_spi,
-	e1000_nvm_eeprom_microwire,
 	e1000_nvm_flash_hw,
 	e1000_nvm_flash_sw
 };
@@ -79,8 +93,6 @@
 	e1000_nvm_override_none = 0,
 	e1000_nvm_override_spi_small,
 	e1000_nvm_override_spi_large,
-	e1000_nvm_override_microwire_small,
-	e1000_nvm_override_microwire_large
 };
 
 enum e1000_phy_type {
@@ -92,6 +104,7 @@
 	e1000_phy_gg82563,
 	e1000_phy_igp_3,
 	e1000_phy_ife,
+	e1000_phy_82580,
 };
 
 enum e1000_bus_type {
@@ -288,6 +301,7 @@
 
 struct e1000_phy_operations {
 	s32  (*acquire)(struct e1000_hw *);
+	s32  (*check_polarity)(struct e1000_hw *);
 	s32  (*check_reset_block)(struct e1000_hw *);
 	s32  (*force_speed_duplex)(struct e1000_hw *);
 	s32  (*get_cfg_done)(struct e1000_hw *hw);
@@ -339,6 +353,7 @@
 	u16 ifs_ratio;
 	u16 ifs_step_size;
 	u16 mta_reg_count;
+	u16 uta_reg_count;
 
 	/* Maximum size of the MTA register table in all supported adapters */
 	#define MAX_MTA_REG 128
@@ -463,6 +478,7 @@
 
 struct e1000_dev_spec_82575 {
 	bool sgmii_active;
+	bool global_device_reset;
 };
 
 struct e1000_hw {
--- linux-mvl-dove-2.6.32.orig/drivers/net/igb/e1000_phy.h
+++ linux-mvl-dove-2.6.32/drivers/net/igb/e1000_phy.h
@@ -43,7 +43,6 @@
 
 s32  igb_check_downshift(struct e1000_hw *hw);
 s32  igb_check_reset_block(struct e1000_hw *hw);
-s32  igb_copper_link_autoneg(struct e1000_hw *hw);
 s32  igb_copper_link_setup_igp(struct e1000_hw *hw);
 s32  igb_copper_link_setup_m88(struct e1000_hw *hw);
 s32  igb_phy_force_speed_duplex_igp(struct e1000_hw *hw);
@@ -57,10 +56,19 @@
 s32  igb_phy_hw_reset(struct e1000_hw *hw);
 s32  igb_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data);
 s32  igb_set_d3_lplu_state(struct e1000_hw *hw, bool active);
+s32  igb_setup_copper_link(struct e1000_hw *hw);
 s32  igb_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data);
 s32  igb_phy_has_link(struct e1000_hw *hw, u32 iterations,
 				u32 usec_interval, bool *success);
 s32  igb_phy_init_script_igp3(struct e1000_hw *hw);
+s32  igb_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data);
+s32  igb_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data);
+s32  igb_read_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 *data);
+s32  igb_write_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 data);
+s32  igb_copper_link_setup_82580(struct e1000_hw *hw);
+s32  igb_get_phy_info_82580(struct e1000_hw *hw);
+s32  igb_phy_force_speed_duplex_82580(struct e1000_hw *hw);
+s32  igb_get_cable_length_82580(struct e1000_hw *hw);
 
 /* IGP01E1000 Specific Registers */
 #define IGP01E1000_PHY_PORT_CONFIG        0x10 /* Port Config */
@@ -75,6 +83,33 @@
 #define IGP01E1000_PSCR_FORCE_MDI_MDIX    0x2000 /* 0=MDI, 1=MDIX */
 #define IGP01E1000_PSCFR_SMART_SPEED      0x0080
 
+#define I82580_ADDR_REG                   16
+#define I82580_CFG_REG                    22
+#define I82580_CFG_ASSERT_CRS_ON_TX       (1 << 15)
+#define I82580_CFG_ENABLE_DOWNSHIFT       (3 << 10) /* auto downshift 100/10 */
+#define I82580_CTRL_REG                   23
+#define I82580_CTRL_DOWNSHIFT_MASK        (7 << 10)
+
+/* 82580 specific PHY registers */
+#define I82580_PHY_CTRL_2            18
+#define I82580_PHY_LBK_CTRL          19
+#define I82580_PHY_STATUS_2          26
+#define I82580_PHY_DIAG_STATUS       31
+
+/* I82580 PHY Status 2 */
+#define I82580_PHY_STATUS2_REV_POLARITY   0x0400
+#define I82580_PHY_STATUS2_MDIX           0x0800
+#define I82580_PHY_STATUS2_SPEED_MASK     0x0300
+#define I82580_PHY_STATUS2_SPEED_1000MBPS 0x0200
+#define I82580_PHY_STATUS2_SPEED_100MBPS  0x0100
+
+/* I82580 PHY Control 2 */
+#define I82580_PHY_CTRL2_AUTO_MDIX        0x0400
+#define I82580_PHY_CTRL2_FORCE_MDI_MDIX   0x0200
+
+/* I82580 PHY Diagnostics Status */
+#define I82580_DSTATUS_CABLE_LENGTH       0x03FC
+#define I82580_DSTATUS_CABLE_LENGTH_SHIFT 2
 /* Enable flexible speed on link-up */
 #define IGP02E1000_PM_D0_LPLU             0x0002 /* For D0a states */
 #define IGP02E1000_PM_D3_LPLU             0x0004 /* For all other states */
--- linux-mvl-dove-2.6.32.orig/drivers/net/igb/igb_ethtool.c
+++ linux-mvl-dove-2.6.32/drivers/net/igb/igb_ethtool.c
@@ -44,78 +44,94 @@
 	int stat_offset;
 };
 
-#define IGB_STAT(m) FIELD_SIZEOF(struct igb_adapter, m), \
-		      offsetof(struct igb_adapter, m)
+#define IGB_STAT(_name, _stat) { \
+	.stat_string = _name, \
+	.sizeof_stat = FIELD_SIZEOF(struct igb_adapter, _stat), \
+	.stat_offset = offsetof(struct igb_adapter, _stat) \
+}
 static const struct igb_stats igb_gstrings_stats[] = {
-	{ "rx_packets", IGB_STAT(stats.gprc) },
-	{ "tx_packets", IGB_STAT(stats.gptc) },
-	{ "rx_bytes", IGB_STAT(stats.gorc) },
-	{ "tx_bytes", IGB_STAT(stats.gotc) },
-	{ "rx_broadcast", IGB_STAT(stats.bprc) },
-	{ "tx_broadcast", IGB_STAT(stats.bptc) },
-	{ "rx_multicast", IGB_STAT(stats.mprc) },
-	{ "tx_multicast", IGB_STAT(stats.mptc) },
-	{ "rx_errors", IGB_STAT(net_stats.rx_errors) },
-	{ "tx_errors", IGB_STAT(net_stats.tx_errors) },
-	{ "tx_dropped", IGB_STAT(net_stats.tx_dropped) },
-	{ "multicast", IGB_STAT(stats.mprc) },
-	{ "collisions", IGB_STAT(stats.colc) },
-	{ "rx_length_errors", IGB_STAT(net_stats.rx_length_errors) },
-	{ "rx_over_errors", IGB_STAT(net_stats.rx_over_errors) },
-	{ "rx_crc_errors", IGB_STAT(stats.crcerrs) },
-	{ "rx_frame_errors", IGB_STAT(net_stats.rx_frame_errors) },
-	{ "rx_no_buffer_count", IGB_STAT(stats.rnbc) },
-	{ "rx_queue_drop_packet_count", IGB_STAT(net_stats.rx_fifo_errors) },
-	{ "rx_missed_errors", IGB_STAT(stats.mpc) },
-	{ "tx_aborted_errors", IGB_STAT(stats.ecol) },
-	{ "tx_carrier_errors", IGB_STAT(stats.tncrs) },
-	{ "tx_fifo_errors", IGB_STAT(net_stats.tx_fifo_errors) },
-	{ "tx_heartbeat_errors", IGB_STAT(net_stats.tx_heartbeat_errors) },
-	{ "tx_window_errors", IGB_STAT(stats.latecol) },
-	{ "tx_abort_late_coll", IGB_STAT(stats.latecol) },
-	{ "tx_deferred_ok", IGB_STAT(stats.dc) },
-	{ "tx_single_coll_ok", IGB_STAT(stats.scc) },
-	{ "tx_multi_coll_ok", IGB_STAT(stats.mcc) },
-	{ "tx_timeout_count", IGB_STAT(tx_timeout_count) },
-	{ "tx_restart_queue", IGB_STAT(restart_queue) },
-	{ "rx_long_length_errors", IGB_STAT(stats.roc) },
-	{ "rx_short_length_errors", IGB_STAT(stats.ruc) },
-	{ "rx_align_errors", IGB_STAT(stats.algnerrc) },
-	{ "tx_tcp_seg_good", IGB_STAT(stats.tsctc) },
-	{ "tx_tcp_seg_failed", IGB_STAT(stats.tsctfc) },
-	{ "rx_flow_control_xon", IGB_STAT(stats.xonrxc) },
-	{ "rx_flow_control_xoff", IGB_STAT(stats.xoffrxc) },
-	{ "tx_flow_control_xon", IGB_STAT(stats.xontxc) },
-	{ "tx_flow_control_xoff", IGB_STAT(stats.xofftxc) },
-	{ "rx_long_byte_count", IGB_STAT(stats.gorc) },
-	{ "rx_csum_offload_good", IGB_STAT(hw_csum_good) },
-	{ "rx_csum_offload_errors", IGB_STAT(hw_csum_err) },
-	{ "tx_dma_out_of_sync", IGB_STAT(stats.doosync) },
-	{ "alloc_rx_buff_failed", IGB_STAT(alloc_rx_buff_failed) },
-	{ "tx_smbus", IGB_STAT(stats.mgptc) },
-	{ "rx_smbus", IGB_STAT(stats.mgprc) },
-	{ "dropped_smbus", IGB_STAT(stats.mgpdc) },
+	IGB_STAT("rx_packets", stats.gprc),
+	IGB_STAT("tx_packets", stats.gptc),
+	IGB_STAT("rx_bytes", stats.gorc),
+	IGB_STAT("tx_bytes", stats.gotc),
+	IGB_STAT("rx_broadcast", stats.bprc),
+	IGB_STAT("tx_broadcast", stats.bptc),
+	IGB_STAT("rx_multicast", stats.mprc),
+	IGB_STAT("tx_multicast", stats.mptc),
+	IGB_STAT("multicast", stats.mprc),
+	IGB_STAT("collisions", stats.colc),
+	IGB_STAT("rx_crc_errors", stats.crcerrs),
+	IGB_STAT("rx_no_buffer_count", stats.rnbc),
+	IGB_STAT("rx_missed_errors", stats.mpc),
+	IGB_STAT("tx_aborted_errors", stats.ecol),
+	IGB_STAT("tx_carrier_errors", stats.tncrs),
+	IGB_STAT("tx_window_errors", stats.latecol),
+	IGB_STAT("tx_abort_late_coll", stats.latecol),
+	IGB_STAT("tx_deferred_ok", stats.dc),
+	IGB_STAT("tx_single_coll_ok", stats.scc),
+	IGB_STAT("tx_multi_coll_ok", stats.mcc),
+	IGB_STAT("tx_timeout_count", tx_timeout_count),
+	IGB_STAT("rx_long_length_errors", stats.roc),
+	IGB_STAT("rx_short_length_errors", stats.ruc),
+	IGB_STAT("rx_align_errors", stats.algnerrc),
+	IGB_STAT("tx_tcp_seg_good", stats.tsctc),
+	IGB_STAT("tx_tcp_seg_failed", stats.tsctfc),
+	IGB_STAT("rx_flow_control_xon", stats.xonrxc),
+	IGB_STAT("rx_flow_control_xoff", stats.xoffrxc),
+	IGB_STAT("tx_flow_control_xon", stats.xontxc),
+	IGB_STAT("tx_flow_control_xoff", stats.xofftxc),
+	IGB_STAT("rx_long_byte_count", stats.gorc),
+	IGB_STAT("tx_dma_out_of_sync", stats.doosync),
+	IGB_STAT("tx_smbus", stats.mgptc),
+	IGB_STAT("rx_smbus", stats.mgprc),
+	IGB_STAT("dropped_smbus", stats.mgpdc),
+};
+
+#define IGB_NETDEV_STAT(_net_stat) { \
+	.stat_string = __stringify(_net_stat), \
+	.sizeof_stat = FIELD_SIZEOF(struct net_device_stats, _net_stat), \
+	.stat_offset = offsetof(struct net_device_stats, _net_stat) \
+}
+static const struct igb_stats igb_gstrings_net_stats[] = {
+	IGB_NETDEV_STAT(rx_errors),
+	IGB_NETDEV_STAT(tx_errors),
+	IGB_NETDEV_STAT(tx_dropped),
+	IGB_NETDEV_STAT(rx_length_errors),
+	IGB_NETDEV_STAT(rx_over_errors),
+	IGB_NETDEV_STAT(rx_frame_errors),
+	IGB_NETDEV_STAT(rx_fifo_errors),
+	IGB_NETDEV_STAT(tx_fifo_errors),
+	IGB_NETDEV_STAT(tx_heartbeat_errors)
 };
 
-#define IGB_QUEUE_STATS_LEN \
-	(((((struct igb_adapter *)netdev_priv(netdev))->num_rx_queues)* \
-	  (sizeof(struct igb_rx_queue_stats) / sizeof(u64))) + \
-	 ((((struct igb_adapter *)netdev_priv(netdev))->num_tx_queues) * \
-	  (sizeof(struct igb_tx_queue_stats) / sizeof(u64))))
 #define IGB_GLOBAL_STATS_LEN	\
-	sizeof(igb_gstrings_stats) / sizeof(struct igb_stats)
-#define IGB_STATS_LEN (IGB_GLOBAL_STATS_LEN + IGB_QUEUE_STATS_LEN)
+	(sizeof(igb_gstrings_stats) / sizeof(struct igb_stats))
+#define IGB_NETDEV_STATS_LEN	\
+	(sizeof(igb_gstrings_net_stats) / sizeof(struct igb_stats))
+#define IGB_RX_QUEUE_STATS_LEN \
+	(sizeof(struct igb_rx_queue_stats) / sizeof(u64))
+#define IGB_TX_QUEUE_STATS_LEN \
+	(sizeof(struct igb_tx_queue_stats) / sizeof(u64))
+#define IGB_QUEUE_STATS_LEN \
+	((((struct igb_adapter *)netdev_priv(netdev))->num_rx_queues * \
+	  IGB_RX_QUEUE_STATS_LEN) + \
+	 (((struct igb_adapter *)netdev_priv(netdev))->num_tx_queues * \
+	  IGB_TX_QUEUE_STATS_LEN))
+#define IGB_STATS_LEN \
+	(IGB_GLOBAL_STATS_LEN + IGB_NETDEV_STATS_LEN + IGB_QUEUE_STATS_LEN)
+
 static const char igb_gstrings_test[][ETH_GSTRING_LEN] = {
 	"Register test  (offline)", "Eeprom test    (offline)",
 	"Interrupt test (offline)", "Loopback test  (offline)",
 	"Link test   (on/offline)"
 };
-#define IGB_TEST_LEN sizeof(igb_gstrings_test) / ETH_GSTRING_LEN
+#define IGB_TEST_LEN (sizeof(igb_gstrings_test) / ETH_GSTRING_LEN)
 
 static int igb_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
 {
 	struct igb_adapter *adapter = netdev_priv(netdev);
 	struct e1000_hw *hw = &adapter->hw;
+	u32 status;
 
 	if (hw->phy.media_type == e1000_media_type_copper) {
 
@@ -150,17 +166,20 @@
 
 	ecmd->transceiver = XCVR_INTERNAL;
 
-	if (rd32(E1000_STATUS) & E1000_STATUS_LU) {
+	status = rd32(E1000_STATUS);
 
-		adapter->hw.mac.ops.get_speed_and_duplex(hw,
-					&adapter->link_speed,
-					&adapter->link_duplex);
-		ecmd->speed = adapter->link_speed;
+	if (status & E1000_STATUS_LU) {
 
-		/* unfortunately FULL_DUPLEX != DUPLEX_FULL
-		 *          and HALF_DUPLEX != DUPLEX_HALF */
+		if ((status & E1000_STATUS_SPEED_1000) ||
+		    hw->phy.media_type != e1000_media_type_copper)
+			ecmd->speed = SPEED_1000;
+		else if (status & E1000_STATUS_SPEED_100)
+			ecmd->speed = SPEED_100;
+		else
+			ecmd->speed = SPEED_10;
 
-		if (adapter->link_duplex == FULL_DUPLEX)
+		if ((status & E1000_STATUS_FD) ||
+		    hw->phy.media_type != e1000_media_type_copper)
 			ecmd->duplex = DUPLEX_FULL;
 		else
 			ecmd->duplex = DUPLEX_HALF;
@@ -251,8 +270,9 @@
 		if (netif_running(adapter->netdev)) {
 			igb_down(adapter);
 			igb_up(adapter);
-		} else
+		} else {
 			igb_reset(adapter);
+		}
 	} else {
 		if (pause->rx_pause && pause->tx_pause)
 			hw->fc.requested_mode = e1000_fc_full;
@@ -276,17 +296,20 @@
 static u32 igb_get_rx_csum(struct net_device *netdev)
 {
 	struct igb_adapter *adapter = netdev_priv(netdev);
-	return !(adapter->flags & IGB_FLAG_RX_CSUM_DISABLED);
+	return !!(adapter->rx_ring[0].flags & IGB_RING_FLAG_RX_CSUM);
 }
 
 static int igb_set_rx_csum(struct net_device *netdev, u32 data)
 {
 	struct igb_adapter *adapter = netdev_priv(netdev);
+	int i;
 
-	if (data)
-		adapter->flags &= ~IGB_FLAG_RX_CSUM_DISABLED;
-	else
-		adapter->flags |= IGB_FLAG_RX_CSUM_DISABLED;
+	for (i = 0; i < adapter->num_rx_queues; i++) {
+		if (data)
+			adapter->rx_ring[i].flags |= IGB_RING_FLAG_RX_CSUM;
+		else
+			adapter->rx_ring[i].flags &= ~IGB_RING_FLAG_RX_CSUM;
+	}
 
 	return 0;
 }
@@ -302,7 +325,7 @@
 
 	if (data) {
 		netdev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
-		if (adapter->hw.mac.type == e1000_82576)
+		if (adapter->hw.mac.type >= e1000_82576)
 			netdev->features |= NETIF_F_SCTP_CSUM;
 	} else {
 		netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
@@ -496,19 +519,10 @@
 	regs_buff[119] = adapter->stats.scvpc;
 	regs_buff[120] = adapter->stats.hrmpc;
 
-	/* These should probably be added to e1000_regs.h instead */
-	#define E1000_PSRTYPE_REG(_i) (0x05480 + ((_i) * 4))
-	#define E1000_IP4AT_REG(_i)   (0x05840 + ((_i) * 8))
-	#define E1000_IP6AT_REG(_i)   (0x05880 + ((_i) * 4))
-	#define E1000_WUPM_REG(_i)    (0x05A00 + ((_i) * 4))
-	#define E1000_FFMT_REG(_i)    (0x09000 + ((_i) * 8))
-	#define E1000_FFVT_REG(_i)    (0x09800 + ((_i) * 8))
-	#define E1000_FFLT_REG(_i)    (0x05F00 + ((_i) * 8))
-
 	for (i = 0; i < 4; i++)
 		regs_buff[121 + i] = rd32(E1000_SRRCTL(i));
 	for (i = 0; i < 4; i++)
-		regs_buff[125 + i] = rd32(E1000_PSRTYPE_REG(i));
+		regs_buff[125 + i] = rd32(E1000_PSRTYPE(i));
 	for (i = 0; i < 4; i++)
 		regs_buff[129 + i] = rd32(E1000_RDBAL(i));
 	for (i = 0; i < 4; i++)
@@ -733,17 +747,17 @@
 	struct igb_adapter *adapter = netdev_priv(netdev);
 	struct igb_ring *temp_ring;
 	int i, err = 0;
-	u32 new_rx_count, new_tx_count;
+	u16 new_rx_count, new_tx_count;
 
 	if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
 		return -EINVAL;
 
-	new_rx_count = max(ring->rx_pending, (u32)IGB_MIN_RXD);
-	new_rx_count = min(new_rx_count, (u32)IGB_MAX_RXD);
+	new_rx_count = min_t(u32, ring->rx_pending, IGB_MAX_RXD);
+	new_rx_count = max_t(u16, new_rx_count, IGB_MIN_RXD);
 	new_rx_count = ALIGN(new_rx_count, REQ_RX_DESCRIPTOR_MULTIPLE);
 
-	new_tx_count = max(ring->tx_pending, (u32)IGB_MIN_TXD);
-	new_tx_count = min(new_tx_count, (u32)IGB_MAX_TXD);
+	new_tx_count = min_t(u32, ring->tx_pending, IGB_MAX_TXD);
+	new_tx_count = max_t(u16, new_tx_count, IGB_MIN_TXD);
 	new_tx_count = ALIGN(new_tx_count, REQ_TX_DESCRIPTOR_MULTIPLE);
 
 	if ((new_tx_count == adapter->tx_ring_count) &&
@@ -788,7 +802,7 @@
 
 		for (i = 0; i < adapter->num_tx_queues; i++) {
 			temp_ring[i].count = new_tx_count;
-			err = igb_setup_tx_resources(adapter, &temp_ring[i]);
+			err = igb_setup_tx_resources(&temp_ring[i]);
 			if (err) {
 				while (i) {
 					i--;
@@ -813,7 +827,7 @@
 
 		for (i = 0; i < adapter->num_rx_queues; i++) {
 			temp_ring[i].count = new_rx_count;
-			err = igb_setup_rx_resources(adapter, &temp_ring[i]);
+			err = igb_setup_rx_resources(&temp_ring[i]);
 			if (err) {
 				while (i) {
 					i--;
@@ -867,6 +881,49 @@
 #define TABLE64_TEST_LO	5
 #define TABLE64_TEST_HI	6
 
+/* 82580 reg test */
+static struct igb_reg_test reg_test_82580[] = {
+	{ E1000_FCAL,	   0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
+	{ E1000_FCAH,	   0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
+	{ E1000_FCT,	   0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
+	{ E1000_VET,	   0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
+	{ E1000_RDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
+	{ E1000_RDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
+	{ E1000_RDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
+	{ E1000_RDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
+	{ E1000_RDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
+	{ E1000_RDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
+	/* RDH is read-only for 82580, only test RDT. */
+	{ E1000_RDT(0),	   0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
+	{ E1000_RDT(4),	   0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
+	{ E1000_FCRTH,	   0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
+	{ E1000_FCTTV,	   0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
+	{ E1000_TIPG,	   0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
+	{ E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
+	{ E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
+	{ E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
+	{ E1000_TDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
+	{ E1000_TDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
+	{ E1000_TDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
+	{ E1000_TDT(0),	   0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
+	{ E1000_TDT(4),	   0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
+	{ E1000_RCTL,	   0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
+	{ E1000_RCTL, 	   0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
+	{ E1000_RCTL, 	   0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
+	{ E1000_TCTL,	   0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
+	{ E1000_RA,	   0, 16, TABLE64_TEST_LO,
+						0xFFFFFFFF, 0xFFFFFFFF },
+	{ E1000_RA,	   0, 16, TABLE64_TEST_HI,
+						0x83FFFFFF, 0xFFFFFFFF },
+	{ E1000_RA2,	   0, 8, TABLE64_TEST_LO,
+						0xFFFFFFFF, 0xFFFFFFFF },
+	{ E1000_RA2,	   0, 8, TABLE64_TEST_HI,
+						0x83FFFFFF, 0xFFFFFFFF },
+	{ E1000_MTA,	   0, 128, TABLE32_TEST,
+						0xFFFFFFFF, 0xFFFFFFFF },
+	{ 0, 0, 0, 0 }
+};
+
 /* 82576 reg test */
 static struct igb_reg_test reg_test_82576[] = {
 	{ E1000_FCAL,	   0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
@@ -944,7 +1001,7 @@
 {
 	struct e1000_hw *hw = &adapter->hw;
 	u32 pat, val;
-	u32 _test[] =
+	static const u32 _test[] =
 		{0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
 	for (pat = 0; pat < ARRAY_SIZE(_test); pat++) {
 		wr32(reg, (_test[pat] & write));
@@ -957,6 +1014,7 @@
 			return 1;
 		}
 	}
+
 	return 0;
 }
 
@@ -974,6 +1032,7 @@
 		*data = reg;
 		return 1;
 	}
+
 	return 0;
 }
 
@@ -996,14 +1055,18 @@
 	u32 value, before, after;
 	u32 i, toggle;
 
-	toggle = 0x7FFFF3FF;
-
 	switch (adapter->hw.mac.type) {
+	case e1000_82580:
+		test = reg_test_82580;
+		toggle = 0x7FEFF3FF;
+		break;
 	case e1000_82576:
 		test = reg_test_82576;
+		toggle = 0x7FFFF3FF;
 		break;
 	default:
 		test = reg_test_82575;
+		toggle = 0x7FFFF3FF;
 		break;
 	}
 
@@ -1081,8 +1144,7 @@
 	*data = 0;
 	/* Read and add up the contents of the EEPROM */
 	for (i = 0; i < (NVM_CHECKSUM_REG + 1); i++) {
-		if ((adapter->hw.nvm.ops.read(&adapter->hw, i, 1, &temp))
-		    < 0) {
+		if ((adapter->hw.nvm.ops.read(&adapter->hw, i, 1, &temp)) < 0) {
 			*data = 1;
 			break;
 		}
@@ -1098,8 +1160,7 @@
 
 static irqreturn_t igb_test_intr(int irq, void *data)
 {
-	struct net_device *netdev = (struct net_device *) data;
-	struct igb_adapter *adapter = netdev_priv(netdev);
+	struct igb_adapter *adapter = (struct igb_adapter *) data;
 	struct e1000_hw *hw = &adapter->hw;
 
 	adapter->test_icr |= rd32(E1000_ICR);
@@ -1117,38 +1178,45 @@
 	*data = 0;
 
 	/* Hook up test interrupt handler just for this test */
-	if (adapter->msix_entries)
-		/* NOTE: we don't test MSI-X interrupts here, yet */
-		return 0;
-
-	if (adapter->flags & IGB_FLAG_HAS_MSI) {
+	if (adapter->msix_entries) {
+		if (request_irq(adapter->msix_entries[0].vector,
+		                &igb_test_intr, 0, netdev->name, adapter)) {
+			*data = 1;
+			return -1;
+		}
+	} else if (adapter->flags & IGB_FLAG_HAS_MSI) {
 		shared_int = false;
-		if (request_irq(irq, &igb_test_intr, 0, netdev->name, netdev)) {
+		if (request_irq(irq,
+		                &igb_test_intr, 0, netdev->name, adapter)) {
 			*data = 1;
 			return -1;
 		}
 	} else if (!request_irq(irq, &igb_test_intr, IRQF_PROBE_SHARED,
-				netdev->name, netdev)) {
+				netdev->name, adapter)) {
 		shared_int = false;
 	} else if (request_irq(irq, &igb_test_intr, IRQF_SHARED,
-		 netdev->name, netdev)) {
+		 netdev->name, adapter)) {
 		*data = 1;
 		return -1;
 	}
 	dev_info(&adapter->pdev->dev, "testing %s interrupt\n",
 		(shared_int ? "shared" : "unshared"));
+
 	/* Disable all the interrupts */
-	wr32(E1000_IMC, 0xFFFFFFFF);
+	wr32(E1000_IMC, ~0);
 	msleep(10);
 
 	/* Define all writable bits for ICS */
-	switch(hw->mac.type) {
+	switch (hw->mac.type) {
 	case e1000_82575:
 		ics_mask = 0x37F47EDD;
 		break;
 	case e1000_82576:
 		ics_mask = 0x77D4FBFD;
 		break;
+	case e1000_82580:
+		ics_mask = 0x77DCFED5;
+		break;
 	default:
 		ics_mask = 0x7FFFFFFF;
 		break;
@@ -1232,190 +1300,61 @@
 	msleep(10);
 
 	/* Unhook test interrupt handler */
-	free_irq(irq, netdev);
+	if (adapter->msix_entries)
+		free_irq(adapter->msix_entries[0].vector, adapter);
+	else
+		free_irq(irq, adapter);
 
 	return *data;
 }
 
 static void igb_free_desc_rings(struct igb_adapter *adapter)
 {
-	struct igb_ring *tx_ring = &adapter->test_tx_ring;
-	struct igb_ring *rx_ring = &adapter->test_rx_ring;
-	struct pci_dev *pdev = adapter->pdev;
-	int i;
-
-	if (tx_ring->desc && tx_ring->buffer_info) {
-		for (i = 0; i < tx_ring->count; i++) {
-			struct igb_buffer *buf = &(tx_ring->buffer_info[i]);
-			if (buf->dma)
-				pci_unmap_single(pdev, buf->dma, buf->length,
-						 PCI_DMA_TODEVICE);
-			if (buf->skb)
-				dev_kfree_skb(buf->skb);
-		}
-	}
-
-	if (rx_ring->desc && rx_ring->buffer_info) {
-		for (i = 0; i < rx_ring->count; i++) {
-			struct igb_buffer *buf = &(rx_ring->buffer_info[i]);
-			if (buf->dma)
-				pci_unmap_single(pdev, buf->dma,
-						 IGB_RXBUFFER_2048,
-						 PCI_DMA_FROMDEVICE);
-			if (buf->skb)
-				dev_kfree_skb(buf->skb);
-		}
-	}
-
-	if (tx_ring->desc) {
-		pci_free_consistent(pdev, tx_ring->size, tx_ring->desc,
-				    tx_ring->dma);
-		tx_ring->desc = NULL;
-	}
-	if (rx_ring->desc) {
-		pci_free_consistent(pdev, rx_ring->size, rx_ring->desc,
-				    rx_ring->dma);
-		rx_ring->desc = NULL;
-	}
-
-	kfree(tx_ring->buffer_info);
-	tx_ring->buffer_info = NULL;
-	kfree(rx_ring->buffer_info);
-	rx_ring->buffer_info = NULL;
-
-	return;
+	igb_free_tx_resources(&adapter->test_tx_ring);
+	igb_free_rx_resources(&adapter->test_rx_ring);
 }
 
 static int igb_setup_desc_rings(struct igb_adapter *adapter)
 {
-	struct e1000_hw *hw = &adapter->hw;
 	struct igb_ring *tx_ring = &adapter->test_tx_ring;
 	struct igb_ring *rx_ring = &adapter->test_rx_ring;
-	struct pci_dev *pdev = adapter->pdev;
-	struct igb_buffer *buffer_info;
-	u32 rctl;
-	int i, ret_val;
+	struct e1000_hw *hw = &adapter->hw;
+	int ret_val;
 
 	/* Setup Tx descriptor ring and Tx buffers */
+	tx_ring->count = IGB_DEFAULT_TXD;
+	tx_ring->pdev = adapter->pdev;
+	tx_ring->netdev = adapter->netdev;
+	tx_ring->reg_idx = adapter->vfs_allocated_count;
 
-	if (!tx_ring->count)
-		tx_ring->count = IGB_DEFAULT_TXD;
-
-	tx_ring->buffer_info = kcalloc(tx_ring->count,
-				       sizeof(struct igb_buffer),
-				       GFP_KERNEL);
-	if (!tx_ring->buffer_info) {
+	if (igb_setup_tx_resources(tx_ring)) {
 		ret_val = 1;
 		goto err_nomem;
 	}
 
-	tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
-	tx_ring->size = ALIGN(tx_ring->size, 4096);
-	tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
-					     &tx_ring->dma);
-	if (!tx_ring->desc) {
-		ret_val = 2;
-		goto err_nomem;
-	}
-	tx_ring->next_to_use = tx_ring->next_to_clean = 0;
-
-	wr32(E1000_TDBAL(0),
-			((u64) tx_ring->dma & 0x00000000FFFFFFFF));
-	wr32(E1000_TDBAH(0), ((u64) tx_ring->dma >> 32));
-	wr32(E1000_TDLEN(0),
-			tx_ring->count * sizeof(union e1000_adv_tx_desc));
-	wr32(E1000_TDH(0), 0);
-	wr32(E1000_TDT(0), 0);
-	wr32(E1000_TCTL,
-			E1000_TCTL_PSP | E1000_TCTL_EN |
-			E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
-			E1000_COLLISION_DISTANCE << E1000_COLD_SHIFT);
-
-	for (i = 0; i < tx_ring->count; i++) {
-		union e1000_adv_tx_desc *tx_desc;
-		struct sk_buff *skb;
-		unsigned int size = 1024;
-
-		tx_desc = E1000_TX_DESC_ADV(*tx_ring, i);
-		skb = alloc_skb(size, GFP_KERNEL);
-		if (!skb) {
-			ret_val = 3;
-			goto err_nomem;
-		}
-		skb_put(skb, size);
-		buffer_info = &tx_ring->buffer_info[i];
-		buffer_info->skb = skb;
-		buffer_info->length = skb->len;
-		buffer_info->dma = pci_map_single(pdev, skb->data, skb->len,
-		                                  PCI_DMA_TODEVICE);
-		tx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
-		tx_desc->read.olinfo_status = cpu_to_le32(skb->len) <<
-		                              E1000_ADVTXD_PAYLEN_SHIFT;
-		tx_desc->read.cmd_type_len = cpu_to_le32(skb->len);
-		tx_desc->read.cmd_type_len |= cpu_to_le32(E1000_TXD_CMD_EOP |
-		                                          E1000_TXD_CMD_IFCS |
-		                                          E1000_TXD_CMD_RS |
-		                                          E1000_ADVTXD_DTYP_DATA |
-		                                          E1000_ADVTXD_DCMD_DEXT);
-	}
+	igb_setup_tctl(adapter);
+	igb_configure_tx_ring(adapter, tx_ring);
 
 	/* Setup Rx descriptor ring and Rx buffers */
+	rx_ring->count = IGB_DEFAULT_RXD;
+	rx_ring->pdev = adapter->pdev;
+	rx_ring->netdev = adapter->netdev;
+	rx_ring->rx_buffer_len = IGB_RXBUFFER_2048;
+	rx_ring->reg_idx = adapter->vfs_allocated_count;
 
-	if (!rx_ring->count)
-		rx_ring->count = IGB_DEFAULT_RXD;
-
-	rx_ring->buffer_info = kcalloc(rx_ring->count,
-				       sizeof(struct igb_buffer),
-				       GFP_KERNEL);
-	if (!rx_ring->buffer_info) {
-		ret_val = 4;
+	if (igb_setup_rx_resources(rx_ring)) {
+		ret_val = 3;
 		goto err_nomem;
 	}
 
-	rx_ring->size = rx_ring->count * sizeof(union e1000_adv_rx_desc);
-	rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size,
-					     &rx_ring->dma);
-	if (!rx_ring->desc) {
-		ret_val = 5;
-		goto err_nomem;
-	}
-	rx_ring->next_to_use = rx_ring->next_to_clean = 0;
+	/* set the default queue to queue 0 of PF */
+	wr32(E1000_MRQC, adapter->vfs_allocated_count << 3);
 
-	rctl = rd32(E1000_RCTL);
-	wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
-	wr32(E1000_RDBAL(0),
-			((u64) rx_ring->dma & 0xFFFFFFFF));
-	wr32(E1000_RDBAH(0),
-			((u64) rx_ring->dma >> 32));
-	wr32(E1000_RDLEN(0), rx_ring->size);
-	wr32(E1000_RDH(0), 0);
-	wr32(E1000_RDT(0), 0);
-	rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
-	rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
-		(adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
-	wr32(E1000_RCTL, rctl);
-	wr32(E1000_SRRCTL(0), E1000_SRRCTL_DESCTYPE_ADV_ONEBUF);
+	/* enable receive ring */
+	igb_setup_rctl(adapter);
+	igb_configure_rx_ring(adapter, rx_ring);
 
-	for (i = 0; i < rx_ring->count; i++) {
-		union e1000_adv_rx_desc *rx_desc;
-		struct sk_buff *skb;
-
-		buffer_info = &rx_ring->buffer_info[i];
-		rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
-		skb = alloc_skb(IGB_RXBUFFER_2048 + NET_IP_ALIGN,
-				GFP_KERNEL);
-		if (!skb) {
-			ret_val = 6;
-			goto err_nomem;
-		}
-		skb_reserve(skb, NET_IP_ALIGN);
-		buffer_info->skb = skb;
-		buffer_info->dma = pci_map_single(pdev, skb->data,
-		                                  IGB_RXBUFFER_2048,
-		                                  PCI_DMA_FROMDEVICE);
-		rx_desc->read.pkt_addr = cpu_to_le64(buffer_info->dma);
-		memset(skb->data, 0x00, skb->len);
-	}
+	igb_alloc_rx_buffers_adv(rx_ring, igb_desc_unused(rx_ring));
 
 	return 0;
 
@@ -1449,6 +1388,9 @@
 		igb_write_phy_reg(hw, PHY_CONTROL, 0x9140);
 		/* autoneg off */
 		igb_write_phy_reg(hw, PHY_CONTROL, 0x8140);
+	} else if (hw->phy.type == e1000_phy_82580) {
+		/* enable MII loopback */
+		igb_write_phy_reg(hw, I82580_PHY_LBK_CTRL, 0x8041);
 	}
 
 	ctrl_reg = rd32(E1000_CTRL);
@@ -1491,7 +1433,10 @@
 	struct e1000_hw *hw = &adapter->hw;
 	u32 reg;
 
-	if (hw->phy.media_type == e1000_media_type_internal_serdes) {
+	reg = rd32(E1000_CTRL_EXT);
+
+	/* use CTRL_EXT to identify link type as SGMII can appear as copper */
+	if (reg & E1000_CTRL_EXT_LINK_MODE_MASK) {
 		reg = rd32(E1000_RCTL);
 		reg |= E1000_RCTL_LBM_TCVR;
 		wr32(E1000_RCTL, reg);
@@ -1522,11 +1467,9 @@
 		wr32(E1000_PCS_LCTL, reg);
 
 		return 0;
-	} else if (hw->phy.media_type == e1000_media_type_copper) {
-		return igb_set_phy_loopback(adapter);
 	}
 
-	return 7;
+	return igb_set_phy_loopback(adapter);
 }
 
 static void igb_loopback_cleanup(struct igb_adapter *adapter)
@@ -1552,35 +1495,99 @@
 				    unsigned int frame_size)
 {
 	memset(skb->data, 0xFF, frame_size);
-	frame_size &= ~1;
-	memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
-	memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
-	memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
+	frame_size /= 2;
+	memset(&skb->data[frame_size], 0xAA, frame_size - 1);
+	memset(&skb->data[frame_size + 10], 0xBE, 1);
+	memset(&skb->data[frame_size + 12], 0xAF, 1);
 }
 
 static int igb_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
 {
-	frame_size &= ~1;
-	if (*(skb->data + 3) == 0xFF)
-		if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
-		   (*(skb->data + frame_size / 2 + 12) == 0xAF))
+	frame_size /= 2;
+	if (*(skb->data + 3) == 0xFF) {
+		if ((*(skb->data + frame_size + 10) == 0xBE) &&
+		   (*(skb->data + frame_size + 12) == 0xAF)) {
 			return 0;
+		}
+	}
 	return 13;
 }
 
+static int igb_clean_test_rings(struct igb_ring *rx_ring,
+                                struct igb_ring *tx_ring,
+                                unsigned int size)
+{
+	union e1000_adv_rx_desc *rx_desc;
+	struct igb_buffer *buffer_info;
+	int rx_ntc, tx_ntc, count = 0;
+	u32 staterr;
+
+	/* initialize next to clean and descriptor values */
+	rx_ntc = rx_ring->next_to_clean;
+	tx_ntc = tx_ring->next_to_clean;
+	rx_desc = E1000_RX_DESC_ADV(*rx_ring, rx_ntc);
+	staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
+
+	while (staterr & E1000_RXD_STAT_DD) {
+		/* check rx buffer */
+		buffer_info = &rx_ring->buffer_info[rx_ntc];
+
+		/* unmap rx buffer, will be remapped by alloc_rx_buffers */
+		pci_unmap_single(rx_ring->pdev,
+		                 buffer_info->dma,
+				 rx_ring->rx_buffer_len,
+				 PCI_DMA_FROMDEVICE);
+		buffer_info->dma = 0;
+
+		/* verify contents of skb */
+		if (!igb_check_lbtest_frame(buffer_info->skb, size))
+			count++;
+
+		/* unmap buffer on tx side */
+		buffer_info = &tx_ring->buffer_info[tx_ntc];
+		igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
+
+		/* increment rx/tx next to clean counters */
+		rx_ntc++;
+		if (rx_ntc == rx_ring->count)
+			rx_ntc = 0;
+		tx_ntc++;
+		if (tx_ntc == tx_ring->count)
+			tx_ntc = 0;
+
+		/* fetch next descriptor */
+		rx_desc = E1000_RX_DESC_ADV(*rx_ring, rx_ntc);
+		staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
+	}
+
+	/* re-map buffers to ring, store next to clean values */
+	igb_alloc_rx_buffers_adv(rx_ring, count);
+	rx_ring->next_to_clean = rx_ntc;
+	tx_ring->next_to_clean = tx_ntc;
+
+	return count;
+}
+
 static int igb_run_loopback_test(struct igb_adapter *adapter)
 {
-	struct e1000_hw *hw = &adapter->hw;
 	struct igb_ring *tx_ring = &adapter->test_tx_ring;
 	struct igb_ring *rx_ring = &adapter->test_rx_ring;
-	struct pci_dev *pdev = adapter->pdev;
-	int i, j, k, l, lc, good_cnt;
-	int ret_val = 0;
-	unsigned long time;
+	int i, j, lc, good_cnt, ret_val = 0;
+	unsigned int size = 1024;
+	netdev_tx_t tx_ret_val;
+	struct sk_buff *skb;
+
+	/* allocate test skb */
+	skb = alloc_skb(size, GFP_KERNEL);
+	if (!skb)
+		return 11;
+
+	/* place data into test skb */
+	igb_create_lbtest_frame(skb, size);
+	skb_put(skb, size);
 
-	wr32(E1000_RDT(0), rx_ring->count - 1);
-
-	/* Calculate the loop count based on the largest descriptor ring
+	/*
+	 * Calculate the loop count based on the largest descriptor ring
 	 * The idea is to wrap the largest ring a number of times using 64
 	 * send/receive pairs during each loop
 	 */
@@ -1590,50 +1597,36 @@
 	else
 		lc = ((rx_ring->count / 64) * 2) + 1;
 
-	k = l = 0;
 	for (j = 0; j <= lc; j++) { /* loop count loop */
-		for (i = 0; i < 64; i++) { /* send the packets */
-			igb_create_lbtest_frame(tx_ring->buffer_info[k].skb,
-						1024);
-			pci_dma_sync_single_for_device(pdev,
-				tx_ring->buffer_info[k].dma,
-				tx_ring->buffer_info[k].length,
-				PCI_DMA_TODEVICE);
-			k++;
-			if (k == tx_ring->count)
-				k = 0;
-		}
-		wr32(E1000_TDT(0), k);
-		msleep(200);
-		time = jiffies; /* set the start time for the receive */
+		/* reset count of good packets */
 		good_cnt = 0;
-		do { /* receive the sent packets */
-			pci_dma_sync_single_for_cpu(pdev,
-					rx_ring->buffer_info[l].dma,
-					IGB_RXBUFFER_2048,
-					PCI_DMA_FROMDEVICE);
-
-			ret_val = igb_check_lbtest_frame(
-					     rx_ring->buffer_info[l].skb, 1024);
-			if (!ret_val)
+
+		/* place 64 packets on the transmit queue*/
+		for (i = 0; i < 64; i++) {
+			skb_get(skb);
+			tx_ret_val = igb_xmit_frame_ring_adv(skb, tx_ring);
+			if (tx_ret_val == NETDEV_TX_OK)
 				good_cnt++;
-			l++;
-			if (l == rx_ring->count)
-				l = 0;
-			/* time + 20 msecs (200 msecs on 2.4) is more than
-			 * enough time to complete the receives, if it's
-			 * exceeded, break and error off
-			 */
-		} while (good_cnt < 64 && jiffies < (time + 20));
+		}
+
 		if (good_cnt != 64) {
-			ret_val = 13; /* ret_val is the same as mis-compare */
+			ret_val = 12;
 			break;
 		}
-		if (jiffies >= (time + 20)) {
-			ret_val = 14; /* error code for time out error */
+
+		/* allow 200 milliseconds for packets to go from tx to rx */
+		msleep(200);
+
+		good_cnt = igb_clean_test_rings(rx_ring, tx_ring, size);
+		if (good_cnt != 64) {
+			ret_val = 13;
 			break;
 		}
 	} /* end loop count loop */
+
+	/* free the original skb */
+	kfree_skb(skb);
+
 	return ret_val;
 }
 
@@ -1686,8 +1679,7 @@
 		if (hw->mac.autoneg)
 			msleep(4000);
 
-		if (!(rd32(E1000_STATUS) &
-		      E1000_STATUS_LU))
+		if (!(rd32(E1000_STATUS) & E1000_STATUS_LU))
 			*data = 1;
 	}
 	return *data;
@@ -1803,7 +1795,7 @@
 		/* dual port cards only support WoL on port A from now on
 		 * unless it was enabled in the eeprom for port B
 		 * so exclude FUNC_1 ports from having WoL enabled */
-		if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1 &&
+		if ((rd32(E1000_STATUS) & E1000_STATUS_FUNC_MASK) &&
 		    !adapter->eeprom_wol) {
 			wol->supported = 0;
 			break;
@@ -1869,7 +1861,6 @@
 		adapter->wol |= E1000_WUFC_BC;
 	if (wol->wolopts & WAKE_MAGIC)
 		adapter->wol |= E1000_WUFC_MAG;
-
 	device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
 
 	return 0;
@@ -1882,12 +1873,19 @@
 {
 	struct igb_adapter *adapter = netdev_priv(netdev);
 	struct e1000_hw *hw = &adapter->hw;
+	unsigned long timeout;
 
-	if (!data || data > (u32)(MAX_SCHEDULE_TIMEOUT / HZ))
-		data = (u32)(MAX_SCHEDULE_TIMEOUT / HZ);
+	timeout = data * 1000;
+
+	/*
+	 *  msleep_interruptable only accepts unsigned int so we are limited
+	 * in how long a duration we can wait
+	 */
+	if (!timeout || timeout > UINT_MAX)
+		timeout = UINT_MAX;
 
 	igb_blink_led(hw);
-	msleep_interruptible(data * 1000);
+	msleep_interruptible(timeout);
 
 	igb_led_off(hw);
 	clear_bit(IGB_LED_ON, &adapter->led_status);
@@ -1900,7 +1898,6 @@
 			    struct ethtool_coalesce *ec)
 {
 	struct igb_adapter *adapter = netdev_priv(netdev);
-	struct e1000_hw *hw = &adapter->hw;
 	int i;
 
 	if ((ec->rx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
@@ -1909,17 +1906,39 @@
 	    (ec->rx_coalesce_usecs == 2))
 		return -EINVAL;
 
+	if ((ec->tx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
+	    ((ec->tx_coalesce_usecs > 3) &&
+	     (ec->tx_coalesce_usecs < IGB_MIN_ITR_USECS)) ||
+	    (ec->tx_coalesce_usecs == 2))
+		return -EINVAL;
+
+	if ((adapter->flags & IGB_FLAG_QUEUE_PAIRS) && ec->tx_coalesce_usecs)
+		return -EINVAL;
+
 	/* convert to rate of irq's per second */
-	if (ec->rx_coalesce_usecs && ec->rx_coalesce_usecs <= 3) {
-		adapter->itr_setting = ec->rx_coalesce_usecs;
-		adapter->itr = IGB_START_ITR;
-	} else {
-		adapter->itr_setting = ec->rx_coalesce_usecs << 2;
-		adapter->itr = adapter->itr_setting;
-	}
+	if (ec->rx_coalesce_usecs && ec->rx_coalesce_usecs <= 3)
+		adapter->rx_itr_setting = ec->rx_coalesce_usecs;
+	else
+		adapter->rx_itr_setting = ec->rx_coalesce_usecs << 2;
 
-	for (i = 0; i < adapter->num_rx_queues; i++)
-		wr32(adapter->rx_ring[i].itr_register, adapter->itr);
+	/* convert to rate of irq's per second */
+	if (adapter->flags & IGB_FLAG_QUEUE_PAIRS)
+		adapter->tx_itr_setting = adapter->rx_itr_setting;
+	else if (ec->tx_coalesce_usecs && ec->tx_coalesce_usecs <= 3)
+		adapter->tx_itr_setting = ec->tx_coalesce_usecs;
+	else
+		adapter->tx_itr_setting = ec->tx_coalesce_usecs << 2;
+
+	for (i = 0; i < adapter->num_q_vectors; i++) {
+		struct igb_q_vector *q_vector = adapter->q_vector[i];
+		if (q_vector->rx_ring)
+			q_vector->itr_val = adapter->rx_itr_setting;
+		else
+			q_vector->itr_val = adapter->tx_itr_setting;
+		if (q_vector->itr_val && q_vector->itr_val <= 3)
+			q_vector->itr_val = IGB_START_ITR;
+		q_vector->set_itr = 1;
+	}
 
 	return 0;
 }
@@ -1929,15 +1948,21 @@
 {
 	struct igb_adapter *adapter = netdev_priv(netdev);
 
-	if (adapter->itr_setting <= 3)
-		ec->rx_coalesce_usecs = adapter->itr_setting;
+	if (adapter->rx_itr_setting <= 3)
+		ec->rx_coalesce_usecs = adapter->rx_itr_setting;
 	else
-		ec->rx_coalesce_usecs = adapter->itr_setting >> 2;
+		ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2;
+
+	if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS)) {
+		if (adapter->tx_itr_setting <= 3)
+			ec->tx_coalesce_usecs = adapter->tx_itr_setting;
+		else
+			ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2;
+	}
 
 	return 0;
 }
 
-
 static int igb_nway_reset(struct net_device *netdev)
 {
 	struct igb_adapter *adapter = netdev_priv(netdev);
@@ -1962,31 +1987,32 @@
 				  struct ethtool_stats *stats, u64 *data)
 {
 	struct igb_adapter *adapter = netdev_priv(netdev);
+	struct net_device_stats *net_stats = &netdev->stats;
 	u64 *queue_stat;
-	int stat_count_tx = sizeof(struct igb_tx_queue_stats) / sizeof(u64);
-	int stat_count_rx = sizeof(struct igb_rx_queue_stats) / sizeof(u64);
-	int j;
-	int i;
+	int i, j, k;
+	char *p;
 
 	igb_update_stats(adapter);
+
 	for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
-		char *p = (char *)adapter+igb_gstrings_stats[i].stat_offset;
+		p = (char *)adapter + igb_gstrings_stats[i].stat_offset;
 		data[i] = (igb_gstrings_stats[i].sizeof_stat ==
 			sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
 	}
+	for (j = 0; j < IGB_NETDEV_STATS_LEN; j++, i++) {
+		p = (char *)net_stats + igb_gstrings_net_stats[j].stat_offset;
+		data[i] = (igb_gstrings_net_stats[j].sizeof_stat ==
+			sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
+	}
 	for (j = 0; j < adapter->num_tx_queues; j++) {
-		int k;
 		queue_stat = (u64 *)&adapter->tx_ring[j].tx_stats;
-		for (k = 0; k < stat_count_tx; k++)
-			data[i + k] = queue_stat[k];
-		i += k;
+		for (k = 0; k < IGB_TX_QUEUE_STATS_LEN; k++, i++)
+			data[i] = queue_stat[k];
 	}
 	for (j = 0; j < adapter->num_rx_queues; j++) {
-		int k;
 		queue_stat = (u64 *)&adapter->rx_ring[j].rx_stats;
-		for (k = 0; k < stat_count_rx; k++)
-			data[i + k] = queue_stat[k];
-		i += k;
+		for (k = 0; k < IGB_RX_QUEUE_STATS_LEN; k++, i++)
+			data[i] = queue_stat[k];
 	}
 }
 
@@ -2007,11 +2033,18 @@
 			       ETH_GSTRING_LEN);
 			p += ETH_GSTRING_LEN;
 		}
+		for (i = 0; i < IGB_NETDEV_STATS_LEN; i++) {
+			memcpy(p, igb_gstrings_net_stats[i].stat_string,
+			       ETH_GSTRING_LEN);
+			p += ETH_GSTRING_LEN;
+		}
 		for (i = 0; i < adapter->num_tx_queues; i++) {
 			sprintf(p, "tx_queue_%u_packets", i);
 			p += ETH_GSTRING_LEN;
 			sprintf(p, "tx_queue_%u_bytes", i);
 			p += ETH_GSTRING_LEN;
+			sprintf(p, "tx_queue_%u_restart", i);
+			p += ETH_GSTRING_LEN;
 		}
 		for (i = 0; i < adapter->num_rx_queues; i++) {
 			sprintf(p, "rx_queue_%u_packets", i);
@@ -2020,6 +2053,10 @@
 			p += ETH_GSTRING_LEN;
 			sprintf(p, "rx_queue_%u_drops", i);
 			p += ETH_GSTRING_LEN;
+			sprintf(p, "rx_queue_%u_csum_err", i);
+			p += ETH_GSTRING_LEN;
+			sprintf(p, "rx_queue_%u_alloc_failed", i);
+			p += ETH_GSTRING_LEN;
 		}
 /*		BUG_ON(p - data != IGB_STATS_LEN * ETH_GSTRING_LEN); */
 		break;
--- linux-mvl-dove-2.6.32.orig/drivers/net/igb/e1000_mbx.h
+++ linux-mvl-dove-2.6.32/drivers/net/igb/e1000_mbx.h
@@ -58,10 +58,12 @@
 #define E1000_VT_MSGINFO_MASK     (0xFF << E1000_VT_MSGINFO_SHIFT)
 
 #define E1000_VF_RESET            0x01 /* VF requests reset */
-#define E1000_VF_SET_MAC_ADDR     0x02 /* VF requests PF to set MAC addr */
-#define E1000_VF_SET_MULTICAST    0x03 /* VF requests PF to set MC addr */
-#define E1000_VF_SET_VLAN         0x04 /* VF requests PF to set VLAN */
-#define E1000_VF_SET_LPE          0x05 /* VF requests PF to set VMOLR.LPE */
+#define E1000_VF_SET_MAC_ADDR     0x02 /* VF requests to set MAC addr */
+#define E1000_VF_SET_MULTICAST    0x03 /* VF requests to set MC addr */
+#define E1000_VF_SET_VLAN         0x04 /* VF requests to set VLAN */
+#define E1000_VF_SET_LPE          0x05 /* VF requests to set VMOLR.LPE */
+#define E1000_VF_SET_PROMISC      0x06 /*VF requests to clear VMOLR.ROPE/MPME*/
+#define E1000_VF_SET_PROMISC_MULTICAST    (0x02 << E1000_VT_MSGINFO_SHIFT)
 
 #define E1000_PF_CONTROL_MSG      0x0100 /* PF control message */
 
--- linux-mvl-dove-2.6.32.orig/drivers/net/igb/e1000_mac.c
+++ linux-mvl-dove-2.6.32/drivers/net/igb/e1000_mac.c
@@ -185,13 +185,12 @@
 	}
 
 	if (nvm_alt_mac_addr_offset == 0xFFFF) {
-		ret_val = -(E1000_NOT_IMPLEMENTED);
+		/* There is no Alternate MAC Address */
 		goto out;
 	}
 
 	if (hw->bus.func == E1000_FUNC_1)
-		nvm_alt_mac_addr_offset += ETH_ALEN/sizeof(u16);
-
+		nvm_alt_mac_addr_offset += E1000_ALT_MAC_ADDRESS_OFFSET_LAN1;
 	for (i = 0; i < ETH_ALEN; i += 2) {
 		offset = nvm_alt_mac_addr_offset + (i >> 1);
 		ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data);
@@ -206,14 +205,16 @@
 
 	/* if multicast bit is set, the alternate address will not be used */
 	if (alt_mac_addr[0] & 0x01) {
-		ret_val = -(E1000_NOT_IMPLEMENTED);
+		hw_dbg("Ignoring Alternate Mac Address with MC bit set\n");
 		goto out;
 	}
 
-	for (i = 0; i < ETH_ALEN; i++)
-		hw->mac.addr[i] = hw->mac.perm_addr[i] = alt_mac_addr[i];
-
-	hw->mac.ops.rar_set(hw, hw->mac.perm_addr, 0);
+	/*
+	 * We have a valid alternate MAC address, and we want to treat it the
+	 * same as the normal permanent MAC address stored by the HW into the
+	 * RAR. Do this by mapping this address into RAR0.
+	 */
+	hw->mac.ops.rar_set(hw, alt_mac_addr, 0);
 
 out:
 	return ret_val;
@@ -246,8 +247,15 @@
 	if (rar_low || rar_high)
 		rar_high |= E1000_RAH_AV;
 
+	/*
+	 * Some bridges will combine consecutive 32-bit writes into
+	 * a single burst write, which will malfunction on some parts.
+	 * The flushes avoid this.
+	 */
 	wr32(E1000_RAL(index), rar_low);
+	wrfl();
 	wr32(E1000_RAH(index), rar_high);
+	wrfl();
 }
 
 /**
@@ -399,45 +407,43 @@
  **/
 void igb_clear_hw_cntrs_base(struct e1000_hw *hw)
 {
-	u32 temp;
-
-	temp = rd32(E1000_CRCERRS);
-	temp = rd32(E1000_SYMERRS);
-	temp = rd32(E1000_MPC);
-	temp = rd32(E1000_SCC);
-	temp = rd32(E1000_ECOL);
-	temp = rd32(E1000_MCC);
-	temp = rd32(E1000_LATECOL);
-	temp = rd32(E1000_COLC);
-	temp = rd32(E1000_DC);
-	temp = rd32(E1000_SEC);
-	temp = rd32(E1000_RLEC);
-	temp = rd32(E1000_XONRXC);
-	temp = rd32(E1000_XONTXC);
-	temp = rd32(E1000_XOFFRXC);
-	temp = rd32(E1000_XOFFTXC);
-	temp = rd32(E1000_FCRUC);
-	temp = rd32(E1000_GPRC);
-	temp = rd32(E1000_BPRC);
-	temp = rd32(E1000_MPRC);
-	temp = rd32(E1000_GPTC);
-	temp = rd32(E1000_GORCL);
-	temp = rd32(E1000_GORCH);
-	temp = rd32(E1000_GOTCL);
-	temp = rd32(E1000_GOTCH);
-	temp = rd32(E1000_RNBC);
-	temp = rd32(E1000_RUC);
-	temp = rd32(E1000_RFC);
-	temp = rd32(E1000_ROC);
-	temp = rd32(E1000_RJC);
-	temp = rd32(E1000_TORL);
-	temp = rd32(E1000_TORH);
-	temp = rd32(E1000_TOTL);
-	temp = rd32(E1000_TOTH);
-	temp = rd32(E1000_TPR);
-	temp = rd32(E1000_TPT);
-	temp = rd32(E1000_MPTC);
-	temp = rd32(E1000_BPTC);
+	rd32(E1000_CRCERRS);
+	rd32(E1000_SYMERRS);
+	rd32(E1000_MPC);
+	rd32(E1000_SCC);
+	rd32(E1000_ECOL);
+	rd32(E1000_MCC);
+	rd32(E1000_LATECOL);
+	rd32(E1000_COLC);
+	rd32(E1000_DC);
+	rd32(E1000_SEC);
+	rd32(E1000_RLEC);
+	rd32(E1000_XONRXC);
+	rd32(E1000_XONTXC);
+	rd32(E1000_XOFFRXC);
+	rd32(E1000_XOFFTXC);
+	rd32(E1000_FCRUC);
+	rd32(E1000_GPRC);
+	rd32(E1000_BPRC);
+	rd32(E1000_MPRC);
+	rd32(E1000_GPTC);
+	rd32(E1000_GORCL);
+	rd32(E1000_GORCH);
+	rd32(E1000_GOTCL);
+	rd32(E1000_GOTCH);
+	rd32(E1000_RNBC);
+	rd32(E1000_RUC);
+	rd32(E1000_RFC);
+	rd32(E1000_ROC);
+	rd32(E1000_RJC);
+	rd32(E1000_TORL);
+	rd32(E1000_TORH);
+	rd32(E1000_TOTL);
+	rd32(E1000_TOTH);
+	rd32(E1000_TPR);
+	rd32(E1000_TPT);
+	rd32(E1000_MPTC);
+	rd32(E1000_BPTC);
 }
 
 /**
--- linux-mvl-dove-2.6.32.orig/drivers/net/igb/igb.h
+++ linux-mvl-dove-2.6.32/drivers/net/igb/igb.h
@@ -55,12 +55,14 @@
 #define IGB_DEFAULT_ITR                    3 /* dynamic */
 #define IGB_MAX_ITR_USECS              10000
 #define IGB_MIN_ITR_USECS                 10
+#define NON_Q_VECTORS                      1
+#define MAX_Q_VECTORS                      8
 
 /* Transmit and receive queues */
-#define IGB_MAX_RX_QUEUES     (adapter->vfs_allocated_count ? \
-                               (adapter->vfs_allocated_count > 6 ? 1 : 2) : 4)
-#define IGB_MAX_TX_QUEUES     IGB_MAX_RX_QUEUES
-#define IGB_ABS_MAX_TX_QUEUES     4
+#define IGB_MAX_RX_QUEUES                  (adapter->vfs_allocated_count ? 2 : \
+                                           (hw->mac.type > e1000_82575 ? 8 : 4))
+#define IGB_ABS_MAX_TX_QUEUES              8
+#define IGB_MAX_TX_QUEUES                  IGB_MAX_RX_QUEUES
 
 #define IGB_MAX_VF_MC_ENTRIES              30
 #define IGB_MAX_VF_FUNCTIONS               8
@@ -71,9 +73,14 @@
 	u16 vf_mc_hashes[IGB_MAX_VF_MC_ENTRIES];
 	u16 num_vf_mc_hashes;
 	u16 vlans_enabled;
-	bool clear_to_send;
+	u32 flags;
+	unsigned long last_nack;
 };
 
+#define IGB_VF_FLAG_CTS            0x00000001 /* VF is clear to send data */
+#define IGB_VF_FLAG_UNI_PROMISC    0x00000002 /* VF has unicast promisc */
+#define IGB_VF_FLAG_MULTI_PROMISC  0x00000004 /* VF has multicast promisc */
+
 /* RX descriptor control thresholds.
  * PTHRESH - MAC will consider prefetch if it has fewer than this number of
  *           descriptors available in its onboard memory.
@@ -85,17 +92,19 @@
  *           descriptors until either it has this many to write back, or the
  *           ITR timer expires.
  */
-#define IGB_RX_PTHRESH                    16
+#define IGB_RX_PTHRESH                    (hw->mac.type <= e1000_82576 ? 16 : 8)
 #define IGB_RX_HTHRESH                     8
 #define IGB_RX_WTHRESH                     1
+#define IGB_TX_PTHRESH                     8
+#define IGB_TX_HTHRESH                     1
+#define IGB_TX_WTHRESH                     ((hw->mac.type == e1000_82576 && \
+                                             adapter->msix_entries) ? 0 : 16)
 
 /* this is the size past which hardware will drop packets when setting LPE=0 */
 #define MAXIMUM_ETHERNET_VLAN_SIZE 1522
 
 /* Supported Rx Buffer Sizes */
 #define IGB_RXBUFFER_128   128    /* Used for packet split */
-#define IGB_RXBUFFER_256   256    /* Used for packet split */
-#define IGB_RXBUFFER_512   512
 #define IGB_RXBUFFER_1024  1024
 #define IGB_RXBUFFER_2048  2048
 #define IGB_RXBUFFER_16384 16384
@@ -128,12 +137,13 @@
 			unsigned long time_stamp;
 			u16 length;
 			u16 next_to_watch;
+			u16 mapped_as_page;
 		};
 		/* RX */
 		struct {
 			struct page *page;
-			u64 page_dma;
-			unsigned int page_offset;
+			dma_addr_t page_dma;
+			u16 page_offset;
 		};
 	};
 };
@@ -141,36 +151,55 @@
 struct igb_tx_queue_stats {
 	u64 packets;
 	u64 bytes;
+	u64 restart_queue;
 };
 
 struct igb_rx_queue_stats {
 	u64 packets;
 	u64 bytes;
 	u64 drops;
+	u64 csum_err;
+	u64 alloc_failed;
 };
 
-struct igb_ring {
+struct igb_q_vector {
 	struct igb_adapter *adapter; /* backlink */
-	void *desc;                  /* descriptor ring memory */
-	dma_addr_t dma;              /* phys address of the ring */
-	unsigned int size;           /* length of desc. ring in bytes */
-	unsigned int count;          /* number of desc. in the ring */
-	u16 next_to_use;
-	u16 next_to_clean;
-	u16 head;
-	u16 tail;
-	struct igb_buffer *buffer_info; /* array of buffer info structs */
+	struct igb_ring *rx_ring;
+	struct igb_ring *tx_ring;
+	struct napi_struct napi;
 
 	u32 eims_value;
-	u32 itr_val;
-	u16 itr_register;
 	u16 cpu;
 
-	u16 queue_index;
-	u16 reg_idx;
+	u16 itr_val;
+	u8 set_itr;
+	u8 itr_shift;
+	void __iomem *itr_register;
+
+	char name[IFNAMSIZ + 9];
+};
+
+struct igb_ring {
+	struct igb_q_vector *q_vector; /* backlink to q_vector */
+	struct net_device *netdev;     /* back pointer to net_device */
+	struct pci_dev *pdev;          /* pci device for dma mapping */
+	dma_addr_t dma;                /* phys address of the ring */
+	void *desc;                    /* descriptor ring memory */
+	unsigned int size;             /* length of desc. ring in bytes */
+	u16 count;                     /* number of desc. in the ring */
+	u16 next_to_use;
+	u16 next_to_clean;
+	u8 queue_index;
+	u8 reg_idx;
+	void __iomem *head;
+	void __iomem *tail;
+	struct igb_buffer *buffer_info; /* array of buffer info structs */
+
 	unsigned int total_bytes;
 	unsigned int total_packets;
 
+	u32 flags;
+
 	union {
 		/* TX */
 		struct {
@@ -180,16 +209,18 @@
 		/* RX */
 		struct {
 			struct igb_rx_queue_stats rx_stats;
-			u64 rx_queue_drops;
-			struct napi_struct napi;
-			int set_itr;
-			struct igb_ring *buddy;
+			u32 rx_buffer_len;
 		};
 	};
-
-	char name[IFNAMSIZ + 5];
 };
 
+#define IGB_RING_FLAG_RX_CSUM        0x00000001 /* RX CSUM enabled */
+#define IGB_RING_FLAG_RX_SCTP_CSUM   0x00000002 /* SCTP CSUM offload enabled */
+
+#define IGB_RING_FLAG_TX_CTX_IDX     0x00000001 /* HW requires context index */
+
+#define IGB_ADVTXD_DCMD (E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS)
+
 #define E1000_RX_DESC_ADV(R, i)	    \
 	(&(((union e1000_adv_rx_desc *)((R).desc))[i]))
 #define E1000_TX_DESC_ADV(R, i)	    \
@@ -197,6 +228,15 @@
 #define E1000_TX_CTXTDESC_ADV(R, i)	    \
 	(&(((struct e1000_adv_tx_context_desc *)((R).desc))[i]))
 
+/* igb_desc_unused - calculate if we have unused descriptors */
+static inline int igb_desc_unused(struct igb_ring *ring)
+{
+	if (ring->next_to_clean > ring->next_to_use)
+		return ring->next_to_clean - ring->next_to_use - 1;
+
+	return ring->count + ring->next_to_clean - ring->next_to_use - 1;
+}
+
 /* board specific private data structure */
 
 struct igb_adapter {
@@ -205,18 +245,14 @@
 	struct vlan_group *vlgrp;
 	u16 mng_vlan_id;
 	u32 bd_number;
-	u32 rx_buffer_len;
 	u32 wol;
 	u32 en_mng_pt;
 	u16 link_speed;
 	u16 link_duplex;
-	unsigned int total_tx_bytes;
-	unsigned int total_tx_packets;
-	unsigned int total_rx_bytes;
-	unsigned int total_rx_packets;
+
 	/* Interrupt Throttle Rate */
-	u32 itr;
-	u32 itr_setting;
+	u32 rx_itr_setting;
+	u32 tx_itr_setting;
 	u16 tx_itr;
 	u16 rx_itr;
 
@@ -229,13 +265,7 @@
 
 	/* TX */
 	struct igb_ring *tx_ring;      /* One per active queue */
-	unsigned int restart_queue;
 	unsigned long tx_queue_len;
-	u32 txd_cmd;
-	u32 gotc;
-	u64 gotc_old;
-	u64 tpt_old;
-	u64 colc_old;
 	u32 tx_timeout_count;
 
 	/* RX */
@@ -243,20 +273,12 @@
 	int num_tx_queues;
 	int num_rx_queues;
 
-	u64 hw_csum_err;
-	u64 hw_csum_good;
-	u32 alloc_rx_buff_failed;
-	u32 gorc;
-	u64 gorc_old;
-	u16 rx_ps_hdr_size;
 	u32 max_frame_size;
 	u32 min_frame_size;
 
 	/* OS defined structs */
 	struct net_device *netdev;
-	struct napi_struct napi;
 	struct pci_dev *pdev;
-	struct net_device_stats net_stats;
 	struct cyclecounter cycles;
 	struct timecounter clock;
 	struct timecompare compare;
@@ -273,6 +295,9 @@
 	struct igb_ring test_rx_ring;
 
 	int msg_enable;
+
+	unsigned int num_q_vectors;
+	struct igb_q_vector *q_vector[MAX_Q_VECTORS];
 	struct msix_entry *msix_entries;
 	u32 eims_enable_mask;
 	u32 eims_other;
@@ -283,18 +308,20 @@
 	u32 eeprom_wol;
 
 	struct igb_ring *multi_tx_table[IGB_ABS_MAX_TX_QUEUES];
-	unsigned int tx_ring_count;
-	unsigned int rx_ring_count;
+	u16 tx_ring_count;
+	u16 rx_ring_count;
 	unsigned int vfs_allocated_count;
 	struct vf_data_storage *vf_data;
+	u32 rss_queues;
 };
 
 #define IGB_FLAG_HAS_MSI           (1 << 0)
 #define IGB_FLAG_DCA_ENABLED       (1 << 1)
 #define IGB_FLAG_QUAD_PORT_A       (1 << 2)
-#define IGB_FLAG_NEED_CTX_IDX      (1 << 3)
-#define IGB_FLAG_RX_CSUM_DISABLED  (1 << 4)
+#define IGB_FLAG_QUEUE_PAIRS       (1 << 3)
 
+#define IGB_82576_TSYNC_SHIFT 19
+#define IGB_82580_TSYNC_SHIFT 24
 enum e1000_state_t {
 	__IGB_TESTING,
 	__IGB_RESETTING,
@@ -314,10 +341,18 @@
 extern void igb_reinit_locked(struct igb_adapter *);
 extern void igb_reset(struct igb_adapter *);
 extern int igb_set_spd_dplx(struct igb_adapter *, u16);
-extern int igb_setup_tx_resources(struct igb_adapter *, struct igb_ring *);
-extern int igb_setup_rx_resources(struct igb_adapter *, struct igb_ring *);
+extern int igb_setup_tx_resources(struct igb_ring *);
+extern int igb_setup_rx_resources(struct igb_ring *);
 extern void igb_free_tx_resources(struct igb_ring *);
 extern void igb_free_rx_resources(struct igb_ring *);
+extern void igb_configure_tx_ring(struct igb_adapter *, struct igb_ring *);
+extern void igb_configure_rx_ring(struct igb_adapter *, struct igb_ring *);
+extern void igb_setup_tctl(struct igb_adapter *);
+extern void igb_setup_rctl(struct igb_adapter *);
+extern netdev_tx_t igb_xmit_frame_ring_adv(struct sk_buff *, struct igb_ring *);
+extern void igb_unmap_and_free_tx_resource(struct igb_ring *,
+					   struct igb_buffer *);
+extern void igb_alloc_rx_buffers_adv(struct igb_ring *, int);
 extern void igb_update_stats(struct igb_adapter *);
 extern void igb_set_ethtool_ops(struct net_device *);
 
--- linux-mvl-dove-2.6.32.orig/drivers/net/igb/e1000_82575.h
+++ linux-mvl-dove-2.6.32/drivers/net/igb/e1000_82575.h
@@ -38,6 +38,11 @@
 
 #define E1000_RAR_ENTRIES_82575   16
 #define E1000_RAR_ENTRIES_82576   24
+#define E1000_RAR_ENTRIES_82580   24
+
+#define E1000_SW_SYNCH_MB              0x00000100
+#define E1000_STAT_DEV_RST_SET         0x00100000
+#define E1000_CTRL_DEV_RST             0x20000000
 
 /* SRRCTL bit definitions */
 #define E1000_SRRCTL_BSIZEPKT_SHIFT                     10 /* Shift _right_ */
@@ -66,6 +71,8 @@
     E1000_EICR_RX_QUEUE3)
 
 /* Immediate Interrupt Rx (A.K.A. Low Latency Interrupt) */
+#define E1000_IMIREXT_SIZE_BP     0x00001000  /* Packet size bypass */
+#define E1000_IMIREXT_CTRL_BP     0x00080000  /* Bypass check of ctrl bits */
 
 /* Receive Descriptor - Advanced */
 union e1000_adv_rx_desc {
@@ -98,6 +105,7 @@
 
 #define E1000_RXDADV_HDRBUFLEN_MASK      0x7FE0
 #define E1000_RXDADV_HDRBUFLEN_SHIFT     5
+#define E1000_RXDADV_STAT_TS             0x10000 /* Pkt was time stamped */
 
 /* Transmit Descriptor - Advanced */
 union e1000_adv_tx_desc {
@@ -167,6 +175,18 @@
 #define E1000_DCA_TXCTRL_CPUID_SHIFT 24 /* Tx CPUID now in the last byte */
 #define E1000_DCA_RXCTRL_CPUID_SHIFT 24 /* Rx CPUID now in the last byte */
 
+/* ETQF register bit definitions */
+#define E1000_ETQF_FILTER_ENABLE   (1 << 26)
+#define E1000_ETQF_1588            (1 << 30)
+
+/* FTQF register bit definitions */
+#define E1000_FTQF_VF_BP               0x00008000
+#define E1000_FTQF_1588_TIME_STAMP     0x08000000
+#define E1000_FTQF_MASK                0xF0000000
+#define E1000_FTQF_MASK_PROTO_BP       0x10000000
+#define E1000_FTQF_MASK_SOURCE_PORT_BP 0x80000000
+
+#define E1000_NVM_APME_82575          0x0400
 #define MAX_NUM_VFS                   8
 
 #define E1000_DTXSWC_VMDQ_LOOPBACK_EN (1 << 31)  /* global VF LB enable */
@@ -202,9 +222,21 @@
 #define E1000_IOVCTL 0x05BBC
 #define E1000_IOVCTL_REUSE_VFQ 0x00000001
 
+#define E1000_RPLOLR_STRVLAN   0x40000000
+#define E1000_RPLOLR_STRCRC    0x80000000
+
+#define E1000_DTXCTL_8023LL     0x0004
+#define E1000_DTXCTL_VLAN_ADDED 0x0008
+#define E1000_DTXCTL_OOS_ENABLE 0x0010
+#define E1000_DTXCTL_MDP_EN     0x0020
+#define E1000_DTXCTL_SPOOF_INT  0x0040
+
 #define ALL_QUEUES   0xFFFF
 
+/* RX packet buffer size defines */
+#define E1000_RXPBS_SIZE_MASK_82576  0x0000007F
 void igb_vmdq_set_loopback_pf(struct e1000_hw *, bool);
 void igb_vmdq_set_replication_pf(struct e1000_hw *, bool);
+u16 igb_rxpbs_adjust_82580(u32 data);
 
 #endif
--- linux-mvl-dove-2.6.32.orig/drivers/net/igb/e1000_nvm.c
+++ linux-mvl-dove-2.6.32/drivers/net/igb/e1000_nvm.c
@@ -78,9 +78,7 @@
 	u32 mask;
 
 	mask = 0x01 << (count - 1);
-	if (nvm->type == e1000_nvm_eeprom_microwire)
-		eecd &= ~E1000_EECD_DO;
-	else if (nvm->type == e1000_nvm_eeprom_spi)
+	if (nvm->type == e1000_nvm_eeprom_spi)
 		eecd |= E1000_EECD_DO;
 
 	do {
@@ -220,22 +218,7 @@
 	struct e1000_nvm_info *nvm = &hw->nvm;
 	u32 eecd = rd32(E1000_EECD);
 
-	if (nvm->type == e1000_nvm_eeprom_microwire) {
-		eecd &= ~(E1000_EECD_CS | E1000_EECD_SK);
-		wr32(E1000_EECD, eecd);
-		wrfl();
-		udelay(nvm->delay_usec);
-
-		igb_raise_eec_clk(hw, &eecd);
-
-		/* Select EEPROM */
-		eecd |= E1000_EECD_CS;
-		wr32(E1000_EECD, eecd);
-		wrfl();
-		udelay(nvm->delay_usec);
-
-		igb_lower_eec_clk(hw, &eecd);
-	} else if (nvm->type == e1000_nvm_eeprom_spi) {
+	if (nvm->type == e1000_nvm_eeprom_spi) {
 		/* Toggle CS to flush commands */
 		eecd |= E1000_EECD_CS;
 		wr32(E1000_EECD, eecd);
@@ -263,12 +246,6 @@
 		/* Pull CS high */
 		eecd |= E1000_EECD_CS;
 		igb_lower_eec_clk(hw, &eecd);
-	} else if (hw->nvm.type == e1000_nvm_eeprom_microwire) {
-		/* CS on Microcwire is active-high */
-		eecd &= ~(E1000_EECD_CS | E1000_EECD_DI);
-		wr32(E1000_EECD, eecd);
-		igb_raise_eec_clk(hw, &eecd);
-		igb_lower_eec_clk(hw, &eecd);
 	}
 }
 
@@ -304,14 +281,7 @@
 	u8 spi_stat_reg;
 
 
-	if (nvm->type == e1000_nvm_eeprom_microwire) {
-		/* Clear SK and DI */
-		eecd &= ~(E1000_EECD_DI | E1000_EECD_SK);
-		wr32(E1000_EECD, eecd);
-		/* Set CS */
-		eecd |= E1000_EECD_CS;
-		wr32(E1000_EECD, eecd);
-	} else if (nvm->type == e1000_nvm_eeprom_spi) {
+	if (nvm->type == e1000_nvm_eeprom_spi) {
 		/* Clear SK and CS */
 		eecd &= ~(E1000_EECD_CS | E1000_EECD_SK);
 		wr32(E1000_EECD, eecd);
--- linux-mvl-dove-2.6.32.orig/drivers/net/igb/e1000_regs.h
+++ linux-mvl-dove-2.6.32/drivers/net/igb/e1000_regs.h
@@ -34,6 +34,7 @@
 #define E1000_EERD     0x00014  /* EEPROM Read - RW */
 #define E1000_CTRL_EXT 0x00018  /* Extended Device Control - RW */
 #define E1000_MDIC     0x00020  /* MDI Control - RW */
+#define E1000_MDICNFG  0x00E04  /* MDI Config - RW */
 #define E1000_SCTL     0x00024  /* SerDes Control - RW */
 #define E1000_FCAL     0x00028  /* Flow Control Address Low - RW */
 #define E1000_FCAH     0x0002C  /* Flow Control Address High -RW */
@@ -76,59 +77,20 @@
 #define E1000_FCRTV    0x02460  /* Flow Control Refresh Timer Value - RW */
 
 /* IEEE 1588 TIMESYNCH */
-#define E1000_TSYNCTXCTL 0x0B614
-#define E1000_TSYNCTXCTL_VALID (1<<0)
-#define E1000_TSYNCTXCTL_ENABLED (1<<4)
-#define E1000_TSYNCRXCTL 0x0B620
-#define E1000_TSYNCRXCTL_VALID (1<<0)
-#define E1000_TSYNCRXCTL_ENABLED (1<<4)
-enum {
-	E1000_TSYNCRXCTL_TYPE_L2_V2 = 0,
-	E1000_TSYNCRXCTL_TYPE_L4_V1 = (1<<1),
-	E1000_TSYNCRXCTL_TYPE_L2_L4_V2 = (1<<2),
-	E1000_TSYNCRXCTL_TYPE_ALL = (1<<3),
-	E1000_TSYNCRXCTL_TYPE_EVENT_V2 = (1<<3) | (1<<1),
-};
-#define E1000_TSYNCRXCFG 0x05F50
-enum {
-	E1000_TSYNCRXCFG_PTP_V1_SYNC_MESSAGE = 0<<0,
-	E1000_TSYNCRXCFG_PTP_V1_DELAY_REQ_MESSAGE = 1<<0,
-	E1000_TSYNCRXCFG_PTP_V1_FOLLOWUP_MESSAGE = 2<<0,
-	E1000_TSYNCRXCFG_PTP_V1_DELAY_RESP_MESSAGE = 3<<0,
-	E1000_TSYNCRXCFG_PTP_V1_MANAGEMENT_MESSAGE = 4<<0,
-
-	E1000_TSYNCRXCFG_PTP_V2_SYNC_MESSAGE = 0<<8,
-	E1000_TSYNCRXCFG_PTP_V2_DELAY_REQ_MESSAGE = 1<<8,
-	E1000_TSYNCRXCFG_PTP_V2_PATH_DELAY_REQ_MESSAGE = 2<<8,
-	E1000_TSYNCRXCFG_PTP_V2_PATH_DELAY_RESP_MESSAGE = 3<<8,
-	E1000_TSYNCRXCFG_PTP_V2_FOLLOWUP_MESSAGE = 8<<8,
-	E1000_TSYNCRXCFG_PTP_V2_DELAY_RESP_MESSAGE = 9<<8,
-	E1000_TSYNCRXCFG_PTP_V2_PATH_DELAY_FOLLOWUP_MESSAGE = 0xA<<8,
-	E1000_TSYNCRXCFG_PTP_V2_ANNOUNCE_MESSAGE = 0xB<<8,
-	E1000_TSYNCRXCFG_PTP_V2_SIGNALLING_MESSAGE = 0xC<<8,
-	E1000_TSYNCRXCFG_PTP_V2_MANAGEMENT_MESSAGE = 0xD<<8,
-};
-#define E1000_SYSTIML 0x0B600
-#define E1000_SYSTIMH 0x0B604
-#define E1000_TIMINCA 0x0B608
-
-#define E1000_RXMTRL     0x0B634
-#define E1000_RXSTMPL 0x0B624
-#define E1000_RXSTMPH 0x0B628
-#define E1000_RXSATRL 0x0B62C
-#define E1000_RXSATRH 0x0B630
-
-#define E1000_TXSTMPL 0x0B618
-#define E1000_TXSTMPH 0x0B61C
-
-#define E1000_ETQF0   0x05CB0
-#define E1000_ETQF1   0x05CB4
-#define E1000_ETQF2   0x05CB8
-#define E1000_ETQF3   0x05CBC
-#define E1000_ETQF4   0x05CC0
-#define E1000_ETQF5   0x05CC4
-#define E1000_ETQF6   0x05CC8
-#define E1000_ETQF7   0x05CCC
+#define E1000_TSYNCRXCTL 0x0B620 /* Rx Time Sync Control register - RW */
+#define E1000_TSYNCTXCTL 0x0B614 /* Tx Time Sync Control register - RW */
+#define E1000_TSYNCRXCFG 0x05F50 /* Time Sync Rx Configuration - RW */
+#define E1000_RXSTMPL    0x0B624 /* Rx timestamp Low - RO */
+#define E1000_RXSTMPH    0x0B628 /* Rx timestamp High - RO */
+#define E1000_RXSATRL    0x0B62C /* Rx timestamp attribute low - RO */
+#define E1000_RXSATRH    0x0B630 /* Rx timestamp attribute high - RO */
+#define E1000_TXSTMPL    0x0B618 /* Tx timestamp value Low - RO */
+#define E1000_TXSTMPH    0x0B61C /* Tx timestamp value High - RO */
+#define E1000_SYSTIML    0x0B600 /* System time register Low - RO */
+#define E1000_SYSTIMH    0x0B604 /* System time register High - RO */
+#define E1000_TIMINCA    0x0B608 /* Increment attributes register - RW */
+#define E1000_TSAUXC     0x0B640 /* Timesync Auxiliary Control register */
+#define E1000_SYSTIMR    0x0B6F8 /* System time register Residue */
 
 /* Filtering Registers */
 #define E1000_SAQF(_n) (0x5980 + 4 * (_n))
@@ -143,7 +105,9 @@
 #define E1000_ETQF(_n)  (0x05CB0 + (4 * (_n))) /* EType Queue Fltr */
 
 #define E1000_RQDPC(_n) (0x0C030 + ((_n) * 0x40))
+
 /* Split and Replication RX Control - RW */
+#define E1000_RXPBS    0x02404  /* Rx Packet Buffer Size - RW */
 /*
  * Convenience macros
  *
@@ -288,10 +252,17 @@
 #define E1000_MTA      0x05200  /* Multicast Table Array - RW Array */
 #define E1000_RA       0x05400  /* Receive Address - RW Array */
 #define E1000_RA2      0x054E0  /* 2nd half of receive address array - RW Array */
+#define E1000_PSRTYPE(_i)       (0x05480 + ((_i) * 4))
 #define E1000_RAL(_i)  (((_i) <= 15) ? (0x05400 + ((_i) * 8)) : \
                                        (0x054E0 + ((_i - 16) * 8)))
 #define E1000_RAH(_i)  (((_i) <= 15) ? (0x05404 + ((_i) * 8)) : \
                                        (0x054E4 + ((_i - 16) * 8)))
+#define E1000_IP4AT_REG(_i)     (0x05840 + ((_i) * 8))
+#define E1000_IP6AT_REG(_i)     (0x05880 + ((_i) * 4))
+#define E1000_WUPM_REG(_i)      (0x05A00 + ((_i) * 4))
+#define E1000_FFMT_REG(_i)      (0x09000 + ((_i) * 8))
+#define E1000_FFVT_REG(_i)      (0x09800 + ((_i) * 8))
+#define E1000_FFLT_REG(_i)      (0x05F00 + ((_i) * 8))
 #define E1000_VFTA     0x05600  /* VLAN Filter Table Array - RW Array */
 #define E1000_VT_CTL   0x0581C  /* VMDq Control - RW */
 #define E1000_WUC      0x05800  /* Wakeup Control - RW */
@@ -331,6 +302,7 @@
 #define E1000_QDE       0x02408 /* Queue Drop Enable - RW */
 #define E1000_DTXSWC    0x03500 /* DMA Tx Switch Control - RW */
 #define E1000_RPLOLR    0x05AF0 /* Replication Offload - RW */
+#define E1000_UTA       0x0A000 /* Unicast Table Array - RW */
 #define E1000_IOVTCL    0x05BBC /* IOV Control Register */
 /* These act per VF so an array friendly macro is used */
 #define E1000_P2VMAILBOX(_n)   (0x00C00 + (4 * (_n)))
@@ -348,4 +320,6 @@
 #define array_rd32(reg, offset) \
 	(readl(hw->hw_addr + reg + ((offset) << 2)))
 
+/* DMA Coalescing registers */
+#define E1000_PCIEMISC          0x05BB8 /* PCIE misc config register */
 #endif
--- linux-mvl-dove-2.6.32.orig/drivers/net/igb/e1000_82575.c
+++ linux-mvl-dove-2.6.32/drivers/net/igb/e1000_82575.c
@@ -46,7 +46,10 @@
 static s32  igb_init_hw_82575(struct e1000_hw *);
 static s32  igb_phy_hw_reset_sgmii_82575(struct e1000_hw *);
 static s32  igb_read_phy_reg_sgmii_82575(struct e1000_hw *, u32, u16 *);
+static s32  igb_read_phy_reg_82580(struct e1000_hw *, u32, u16 *);
+static s32  igb_write_phy_reg_82580(struct e1000_hw *, u32, u16);
 static s32  igb_reset_hw_82575(struct e1000_hw *);
+static s32  igb_reset_hw_82580(struct e1000_hw *);
 static s32  igb_set_d0_lplu_state_82575(struct e1000_hw *, bool);
 static s32  igb_setup_copper_link_82575(struct e1000_hw *);
 static s32  igb_setup_serdes_link_82575(struct e1000_hw *);
@@ -62,6 +65,12 @@
 static s32  igb_read_mac_addr_82575(struct e1000_hw *);
 static s32  igb_set_pcie_completion_timeout(struct e1000_hw *hw);
 
+static const u16 e1000_82580_rxpbs_table[] =
+	{ 36, 72, 144, 1, 2, 4, 8, 16,
+	  35, 70, 140 };
+#define E1000_82580_RXPBS_TABLE_SIZE \
+	(sizeof(e1000_82580_rxpbs_table)/sizeof(u16))
+
 static s32 igb_get_invariants_82575(struct e1000_hw *hw)
 {
 	struct e1000_phy_info *phy = &hw->phy;
@@ -81,12 +90,20 @@
 		break;
 	case E1000_DEV_ID_82576:
 	case E1000_DEV_ID_82576_NS:
+	case E1000_DEV_ID_82576_NS_SERDES:
 	case E1000_DEV_ID_82576_FIBER:
 	case E1000_DEV_ID_82576_SERDES:
 	case E1000_DEV_ID_82576_QUAD_COPPER:
 	case E1000_DEV_ID_82576_SERDES_QUAD:
 		mac->type = e1000_82576;
 		break;
+	case E1000_DEV_ID_82580_COPPER:
+	case E1000_DEV_ID_82580_FIBER:
+	case E1000_DEV_ID_82580_SERDES:
+	case E1000_DEV_ID_82580_SGMII:
+	case E1000_DEV_ID_82580_COPPER_DUAL:
+		mac->type = e1000_82580;
+		break;
 	default:
 		return -E1000_ERR_MAC_INIT;
 		break;
@@ -109,6 +126,7 @@
 		dev_spec->sgmii_active = true;
 		ctrl_ext |= E1000_CTRL_I2C_ENA;
 		break;
+	case E1000_CTRL_EXT_LINK_MODE_1000BASE_KX:
 	case E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES:
 		hw->phy.media_type = e1000_media_type_internal_serdes;
 		ctrl_ext |= E1000_CTRL_I2C_ENA;
@@ -120,12 +138,26 @@
 
 	wr32(E1000_CTRL_EXT, ctrl_ext);
 
+	/*
+	 * if using i2c make certain the MDICNFG register is cleared to prevent
+	 * communications from being misrouted to the mdic registers
+	 */
+	if ((ctrl_ext & E1000_CTRL_I2C_ENA) && (hw->mac.type == e1000_82580))
+		wr32(E1000_MDICNFG, 0);
+
 	/* Set mta register count */
 	mac->mta_reg_count = 128;
 	/* Set rar entry count */
 	mac->rar_entry_count = E1000_RAR_ENTRIES_82575;
 	if (mac->type == e1000_82576)
 		mac->rar_entry_count = E1000_RAR_ENTRIES_82576;
+	if (mac->type == e1000_82580)
+		mac->rar_entry_count = E1000_RAR_ENTRIES_82580;
+	/* reset */
+	if (mac->type == e1000_82580)
+		mac->ops.reset_hw = igb_reset_hw_82580;
+	else
+		mac->ops.reset_hw = igb_reset_hw_82575;
 	/* Set if part includes ASF firmware */
 	mac->asf_firmware_present = true;
 	/* Set if manageability features are enabled. */
@@ -193,6 +225,10 @@
 		phy->ops.reset              = igb_phy_hw_reset_sgmii_82575;
 		phy->ops.read_reg           = igb_read_phy_reg_sgmii_82575;
 		phy->ops.write_reg          = igb_write_phy_reg_sgmii_82575;
+	} else if (hw->mac.type == e1000_82580) {
+		phy->ops.reset              = igb_phy_hw_reset;
+		phy->ops.read_reg           = igb_read_phy_reg_82580;
+		phy->ops.write_reg          = igb_write_phy_reg_82580;
 	} else {
 		phy->ops.reset              = igb_phy_hw_reset;
 		phy->ops.read_reg           = igb_read_phy_reg_igp;
@@ -224,6 +260,12 @@
 		phy->ops.set_d0_lplu_state  = igb_set_d0_lplu_state_82575;
 		phy->ops.set_d3_lplu_state  = igb_set_d3_lplu_state;
 		break;
+	case I82580_I_PHY_ID:
+		phy->type                   = e1000_phy_82580;
+		phy->ops.force_speed_duplex = igb_phy_force_speed_duplex_82580;
+		phy->ops.get_cable_length   = igb_get_cable_length_82580;
+		phy->ops.get_phy_info       = igb_get_phy_info_82580;
+		break;
 	default:
 		return -E1000_ERR_PHY;
 	}
@@ -240,9 +282,10 @@
  **/
 static s32 igb_acquire_phy_82575(struct e1000_hw *hw)
 {
-	u16 mask;
+	u16 mask = E1000_SWFW_PHY0_SM;
 
-	mask = hw->bus.func ? E1000_SWFW_PHY1_SM : E1000_SWFW_PHY0_SM;
+	if (hw->bus.func == E1000_FUNC_1)
+		mask = E1000_SWFW_PHY1_SM;
 
 	return igb_acquire_swfw_sync_82575(hw, mask);
 }
@@ -256,9 +299,11 @@
  **/
 static void igb_release_phy_82575(struct e1000_hw *hw)
 {
-	u16 mask;
+	u16 mask = E1000_SWFW_PHY0_SM;
+
+	if (hw->bus.func == E1000_FUNC_1)
+		mask = E1000_SWFW_PHY1_SM;
 
-	mask = hw->bus.func ? E1000_SWFW_PHY1_SM : E1000_SWFW_PHY0_SM;
 	igb_release_swfw_sync_82575(hw, mask);
 }
 
@@ -274,45 +319,23 @@
 static s32 igb_read_phy_reg_sgmii_82575(struct e1000_hw *hw, u32 offset,
 					  u16 *data)
 {
-	struct e1000_phy_info *phy = &hw->phy;
-	u32 i, i2ccmd = 0;
+	s32 ret_val = -E1000_ERR_PARAM;
 
 	if (offset > E1000_MAX_SGMII_PHY_REG_ADDR) {
 		hw_dbg("PHY Address %u is out of range\n", offset);
-		return -E1000_ERR_PARAM;
+		goto out;
 	}
 
-	/*
-	 * Set up Op-code, Phy Address, and register address in the I2CCMD
-	 * register.  The MAC will take care of interfacing with the
-	 * PHY to retrieve the desired data.
-	 */
-	i2ccmd = ((offset << E1000_I2CCMD_REG_ADDR_SHIFT) |
-		  (phy->addr << E1000_I2CCMD_PHY_ADDR_SHIFT) |
-		  (E1000_I2CCMD_OPCODE_READ));
-
-	wr32(E1000_I2CCMD, i2ccmd);
+	ret_val = hw->phy.ops.acquire(hw);
+	if (ret_val)
+		goto out;
 
-	/* Poll the ready bit to see if the I2C read completed */
-	for (i = 0; i < E1000_I2CCMD_PHY_TIMEOUT; i++) {
-		udelay(50);
-		i2ccmd = rd32(E1000_I2CCMD);
-		if (i2ccmd & E1000_I2CCMD_READY)
-			break;
-	}
-	if (!(i2ccmd & E1000_I2CCMD_READY)) {
-		hw_dbg("I2CCMD Read did not complete\n");
-		return -E1000_ERR_PHY;
-	}
-	if (i2ccmd & E1000_I2CCMD_ERROR) {
-		hw_dbg("I2CCMD Error bit set\n");
-		return -E1000_ERR_PHY;
-	}
+	ret_val = igb_read_phy_reg_i2c(hw, offset, data);
 
-	/* Need to byte-swap the 16-bit value. */
-	*data = ((i2ccmd >> 8) & 0x00FF) | ((i2ccmd << 8) & 0xFF00);
+	hw->phy.ops.release(hw);
 
-	return 0;
+out:
+	return ret_val;
 }
 
 /**
@@ -327,47 +350,24 @@
 static s32 igb_write_phy_reg_sgmii_82575(struct e1000_hw *hw, u32 offset,
 					   u16 data)
 {
-	struct e1000_phy_info *phy = &hw->phy;
-	u32 i, i2ccmd = 0;
-	u16 phy_data_swapped;
+	s32 ret_val = -E1000_ERR_PARAM;
+
 
 	if (offset > E1000_MAX_SGMII_PHY_REG_ADDR) {
 		hw_dbg("PHY Address %d is out of range\n", offset);
-		return -E1000_ERR_PARAM;
+		goto out;
 	}
 
-	/* Swap the data bytes for the I2C interface */
-	phy_data_swapped = ((data >> 8) & 0x00FF) | ((data << 8) & 0xFF00);
-
-	/*
-	 * Set up Op-code, Phy Address, and register address in the I2CCMD
-	 * register.  The MAC will take care of interfacing with the
-	 * PHY to retrieve the desired data.
-	 */
-	i2ccmd = ((offset << E1000_I2CCMD_REG_ADDR_SHIFT) |
-		  (phy->addr << E1000_I2CCMD_PHY_ADDR_SHIFT) |
-		  E1000_I2CCMD_OPCODE_WRITE |
-		  phy_data_swapped);
+	ret_val = hw->phy.ops.acquire(hw);
+	if (ret_val)
+		goto out;
 
-	wr32(E1000_I2CCMD, i2ccmd);
+	ret_val = igb_write_phy_reg_i2c(hw, offset, data);
 
-	/* Poll the ready bit to see if the I2C read completed */
-	for (i = 0; i < E1000_I2CCMD_PHY_TIMEOUT; i++) {
-		udelay(50);
-		i2ccmd = rd32(E1000_I2CCMD);
-		if (i2ccmd & E1000_I2CCMD_READY)
-			break;
-	}
-	if (!(i2ccmd & E1000_I2CCMD_READY)) {
-		hw_dbg("I2CCMD Write did not complete\n");
-		return -E1000_ERR_PHY;
-	}
-	if (i2ccmd & E1000_I2CCMD_ERROR) {
-		hw_dbg("I2CCMD Error bit set\n");
-		return -E1000_ERR_PHY;
-	}
+	hw->phy.ops.release(hw);
 
-	return 0;
+out:
+	return ret_val;
 }
 
 /**
@@ -676,6 +676,10 @@
 
 	if (hw->bus.func == 1)
 		mask = E1000_NVM_CFG_DONE_PORT_1;
+	else if (hw->bus.func == E1000_FUNC_2)
+		mask = E1000_NVM_CFG_DONE_PORT_2;
+	else if (hw->bus.func == E1000_FUNC_3)
+		mask = E1000_NVM_CFG_DONE_PORT_3;
 
 	while (timeout) {
 		if (rd32(E1000_EEMNGCTL) & mask)
@@ -706,9 +710,7 @@
 	s32 ret_val;
 	u16 speed, duplex;
 
-	/* SGMII link check is done through the PCS register. */
-	if ((hw->phy.media_type != e1000_media_type_copper) ||
-	    (igb_sgmii_active_82575(hw))) {
+	if (hw->phy.media_type != e1000_media_type_copper) {
 		ret_val = igb_get_pcs_speed_and_duplex_82575(hw, &speed,
 		                                             &duplex);
 		/*
@@ -723,6 +725,7 @@
 
 	return ret_val;
 }
+
 /**
  *  igb_get_pcs_speed_and_duplex_82575 - Retrieve current speed/duplex
  *  @hw: pointer to the HW structure
@@ -788,13 +791,27 @@
 void igb_shutdown_serdes_link_82575(struct e1000_hw *hw)
 {
 	u32 reg;
+	u16 eeprom_data = 0;
 
 	if (hw->phy.media_type != e1000_media_type_internal_serdes ||
 	    igb_sgmii_active_82575(hw))
 		return;
 
-	/* if the management interface is not enabled, then power down */
-	if (!igb_enable_mng_pass_thru(hw)) {
+	if (hw->bus.func == E1000_FUNC_0)
+		hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
+	else if (hw->mac.type == e1000_82580)
+		hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
+		                 NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
+		                 &eeprom_data);
+	else if (hw->bus.func == E1000_FUNC_1)
+		hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
+
+	/*
+	 * If APM is not enabled in the EEPROM and management interface is
+	 * not enabled, then power down.
+	 */
+	if (!(eeprom_data & E1000_NVM_APME_82575) &&
+	    !igb_enable_mng_pass_thru(hw)) {
 		/* Disable PCS to turn off link */
 		reg = rd32(E1000_PCS_CFG0);
 		reg &= ~E1000_PCS_CFG_PCS_EN;
@@ -908,6 +925,11 @@
 	for (i = 0; i < mac->mta_reg_count; i++)
 		array_wr32(E1000_MTA, i, 0);
 
+	/* Zero out the Unicast HASH table */
+	hw_dbg("Zeroing the UTA\n");
+	for (i = 0; i < mac->uta_reg_count; i++)
+		array_wr32(E1000_UTA, i, 0);
+
 	/* Setup link and flow control */
 	ret_val = igb_setup_link(hw);
 
@@ -934,7 +956,6 @@
 {
 	u32 ctrl;
 	s32  ret_val;
-	bool link;
 
 	ctrl = rd32(E1000_CTRL);
 	ctrl |= E1000_CTRL_SLU;
@@ -946,6 +967,9 @@
 		goto out;
 
 	if (igb_sgmii_active_82575(hw) && !hw->phy.reset_disable) {
+		/* allow time for SFP cage time to power up phy */
+		msleep(300);
+
 		ret_val = hw->phy.ops.reset(hw);
 		if (ret_val) {
 			hw_dbg("Error resetting the PHY.\n");
@@ -959,6 +983,9 @@
 	case e1000_phy_igp_3:
 		ret_val = igb_copper_link_setup_igp(hw);
 		break;
+	case e1000_phy_82580:
+		ret_val = igb_copper_link_setup_82580(hw);
+		break;
 	default:
 		ret_val = -E1000_ERR_PHY;
 		break;
@@ -967,57 +994,24 @@
 	if (ret_val)
 		goto out;
 
-	if (hw->mac.autoneg) {
-		/*
-		 * Setup autoneg and flow control advertisement
-		 * and perform autonegotiation.
-		 */
-		ret_val = igb_copper_link_autoneg(hw);
-		if (ret_val)
-			goto out;
-	} else {
-		/*
-		 * PHY will be set to 10H, 10F, 100H or 100F
-		 * depending on user settings.
-		 */
-		hw_dbg("Forcing Speed and Duplex\n");
-		ret_val = hw->phy.ops.force_speed_duplex(hw);
-		if (ret_val) {
-			hw_dbg("Error Forcing Speed and Duplex\n");
-			goto out;
-		}
-	}
-
-	/*
-	 * Check link status. Wait up to 100 microseconds for link to become
-	 * valid.
-	 */
-	ret_val = igb_phy_has_link(hw, COPPER_LINK_UP_LIMIT, 10, &link);
-	if (ret_val)
-		goto out;
-
-	if (link) {
-		hw_dbg("Valid link established!!!\n");
-		/* Config the MAC and PHY after link is up */
-		igb_config_collision_dist(hw);
-		ret_val = igb_config_fc_after_link_up(hw);
-	} else {
-		hw_dbg("Unable to establish link!!!\n");
-	}
-
+	ret_val = igb_setup_copper_link(hw);
 out:
 	return ret_val;
 }
 
 /**
- *  igb_setup_serdes_link_82575 - Setup link for fiber/serdes
+ *  igb_setup_serdes_link_82575 - Setup link for serdes
  *  @hw: pointer to the HW structure
  *
- *  Configures speed and duplex for fiber and serdes links.
+ *  Configure the physical coding sub-layer (PCS) link.  The PCS link is
+ *  used on copper connections where the serialized gigabit media independent
+ *  interface (sgmii), or serdes fiber is being used.  Configures the link
+ *  for auto-negotiation or forces speed/duplex.
  **/
 static s32 igb_setup_serdes_link_82575(struct e1000_hw *hw)
 {
-	u32 ctrl_reg, reg;
+	u32 ctrl_ext, ctrl_reg, reg;
+	bool pcs_autoneg;
 
 	if ((hw->phy.media_type != e1000_media_type_internal_serdes) &&
 	    !igb_sgmii_active_82575(hw))
@@ -1032,9 +1026,9 @@
 	wr32(E1000_SCTL, E1000_SCTL_DISABLE_SERDES_LOOPBACK);
 
 	/* power on the sfp cage if present */
-	reg = rd32(E1000_CTRL_EXT);
-	reg &= ~E1000_CTRL_EXT_SDP3_DATA;
-	wr32(E1000_CTRL_EXT, reg);
+	ctrl_ext = rd32(E1000_CTRL_EXT);
+	ctrl_ext &= ~E1000_CTRL_EXT_SDP3_DATA;
+	wr32(E1000_CTRL_EXT, ctrl_ext);
 
 	ctrl_reg = rd32(E1000_CTRL);
 	ctrl_reg |= E1000_CTRL_SLU;
@@ -1051,15 +1045,31 @@
 
 	reg = rd32(E1000_PCS_LCTL);
 
-	if (igb_sgmii_active_82575(hw)) {
-		/* allow time for SFP cage to power up phy */
-		msleep(300);
+	/* default pcs_autoneg to the same setting as mac autoneg */
+	pcs_autoneg = hw->mac.autoneg;
 
-		/* AN time out should be disabled for SGMII mode */
+	switch (ctrl_ext & E1000_CTRL_EXT_LINK_MODE_MASK) {
+	case E1000_CTRL_EXT_LINK_MODE_SGMII:
+		/* sgmii mode lets the phy handle forcing speed/duplex */
+		pcs_autoneg = true;
+		/* autoneg time out should be disabled for SGMII mode */
 		reg &= ~(E1000_PCS_LCTL_AN_TIMEOUT);
-	} else {
+		break;
+	case E1000_CTRL_EXT_LINK_MODE_1000BASE_KX:
+		/* disable PCS autoneg and support parallel detect only */
+		pcs_autoneg = false;
+	default:
+		/*
+		 * non-SGMII modes only supports a speed of 1000/Full for the
+		 * link so it is best to just force the MAC and let the pcs
+		 * link either autoneg or be forced to 1000/Full
+		 */
 		ctrl_reg |= E1000_CTRL_SPD_1000 | E1000_CTRL_FRCSPD |
 		            E1000_CTRL_FD | E1000_CTRL_FRCDPX;
+
+		/* set speed of 1000/Full if speed/duplex is forced */
+		reg |= E1000_PCS_LCTL_FSV_1000 | E1000_PCS_LCTL_FDV_FULL;
+		break;
 	}
 
 	wr32(E1000_CTRL, ctrl_reg);
@@ -1070,7 +1080,6 @@
 	 * mode that will be compatible with older link partners and switches.
 	 * However, both are supported by the hardware and some drivers/tools.
 	 */
-
 	reg &= ~(E1000_PCS_LCTL_AN_ENABLE | E1000_PCS_LCTL_FLV_LINK_UP |
 		E1000_PCS_LCTL_FSD | E1000_PCS_LCTL_FORCE_LINK);
 
@@ -1080,25 +1089,16 @@
 	 */
 	reg |= E1000_PCS_LCTL_FORCE_FCTRL;
 
-	/*
-	 * we always set sgmii to autoneg since it is the phy that will be
-	 * forcing the link and the serdes is just a go-between
-	 */
-	if (hw->mac.autoneg || igb_sgmii_active_82575(hw)) {
+	if (pcs_autoneg) {
 		/* Set PCS register for autoneg */
-		reg |= E1000_PCS_LCTL_FSV_1000 |      /* Force 1000    */
-		       E1000_PCS_LCTL_FDV_FULL |      /* SerDes Full duplex */
-		       E1000_PCS_LCTL_AN_ENABLE |     /* Enable Autoneg */
-		       E1000_PCS_LCTL_AN_RESTART;     /* Restart autoneg */
-		hw_dbg("Configuring Autoneg; PCS_LCTL = 0x%08X\n", reg);
+		reg |= E1000_PCS_LCTL_AN_ENABLE | /* Enable Autoneg */
+		       E1000_PCS_LCTL_AN_RESTART; /* Restart autoneg */
+		hw_dbg("Configuring Autoneg:PCS_LCTL=0x%08X\n", reg);
 	} else {
-		/* Set PCS register for forced speed */
-		reg |= E1000_PCS_LCTL_FLV_LINK_UP |   /* Force link up */
-		       E1000_PCS_LCTL_FSV_1000 |      /* Force 1000    */
-		       E1000_PCS_LCTL_FDV_FULL |      /* SerDes Full duplex */
-		       E1000_PCS_LCTL_FSD |           /* Force Speed */
-		       E1000_PCS_LCTL_FORCE_LINK;     /* Force Link */
-		hw_dbg("Configuring Forced Link; PCS_LCTL = 0x%08X\n", reg);
+		/* Set PCS register for forced link */
+		reg |= E1000_PCS_LCTL_FSD;        /* Force Speed */
+
+		hw_dbg("Configuring Forced Link:PCS_LCTL=0x%08X\n", reg);
 	}
 
 	wr32(E1000_PCS_LCTL, reg);
@@ -1167,9 +1167,18 @@
 {
 	s32 ret_val = 0;
 
-	if (igb_check_alt_mac_addr(hw))
-		ret_val = igb_read_mac_addr(hw);
+	/*
+	 * If there's an alternate MAC address place it in RAR0
+	 * so that it will override the Si installed default perm
+	 * address.
+	 */
+	ret_val = igb_check_alt_mac_addr(hw);
+	if (ret_val)
+		goto out;
+
+	ret_val = igb_read_mac_addr(hw);
 
+out:
 	return ret_val;
 }
 
@@ -1181,61 +1190,59 @@
  **/
 static void igb_clear_hw_cntrs_82575(struct e1000_hw *hw)
 {
-	u32 temp;
-
 	igb_clear_hw_cntrs_base(hw);
 
-	temp = rd32(E1000_PRC64);
-	temp = rd32(E1000_PRC127);
-	temp = rd32(E1000_PRC255);
-	temp = rd32(E1000_PRC511);
-	temp = rd32(E1000_PRC1023);
-	temp = rd32(E1000_PRC1522);
-	temp = rd32(E1000_PTC64);
-	temp = rd32(E1000_PTC127);
-	temp = rd32(E1000_PTC255);
-	temp = rd32(E1000_PTC511);
-	temp = rd32(E1000_PTC1023);
-	temp = rd32(E1000_PTC1522);
-
-	temp = rd32(E1000_ALGNERRC);
-	temp = rd32(E1000_RXERRC);
-	temp = rd32(E1000_TNCRS);
-	temp = rd32(E1000_CEXTERR);
-	temp = rd32(E1000_TSCTC);
-	temp = rd32(E1000_TSCTFC);
-
-	temp = rd32(E1000_MGTPRC);
-	temp = rd32(E1000_MGTPDC);
-	temp = rd32(E1000_MGTPTC);
-
-	temp = rd32(E1000_IAC);
-	temp = rd32(E1000_ICRXOC);
-
-	temp = rd32(E1000_ICRXPTC);
-	temp = rd32(E1000_ICRXATC);
-	temp = rd32(E1000_ICTXPTC);
-	temp = rd32(E1000_ICTXATC);
-	temp = rd32(E1000_ICTXQEC);
-	temp = rd32(E1000_ICTXQMTC);
-	temp = rd32(E1000_ICRXDMTC);
-
-	temp = rd32(E1000_CBTMPC);
-	temp = rd32(E1000_HTDPMC);
-	temp = rd32(E1000_CBRMPC);
-	temp = rd32(E1000_RPTHC);
-	temp = rd32(E1000_HGPTC);
-	temp = rd32(E1000_HTCBDPC);
-	temp = rd32(E1000_HGORCL);
-	temp = rd32(E1000_HGORCH);
-	temp = rd32(E1000_HGOTCL);
-	temp = rd32(E1000_HGOTCH);
-	temp = rd32(E1000_LENERRS);
+	rd32(E1000_PRC64);
+	rd32(E1000_PRC127);
+	rd32(E1000_PRC255);
+	rd32(E1000_PRC511);
+	rd32(E1000_PRC1023);
+	rd32(E1000_PRC1522);
+	rd32(E1000_PTC64);
+	rd32(E1000_PTC127);
+	rd32(E1000_PTC255);
+	rd32(E1000_PTC511);
+	rd32(E1000_PTC1023);
+	rd32(E1000_PTC1522);
+
+	rd32(E1000_ALGNERRC);
+	rd32(E1000_RXERRC);
+	rd32(E1000_TNCRS);
+	rd32(E1000_CEXTERR);
+	rd32(E1000_TSCTC);
+	rd32(E1000_TSCTFC);
+
+	rd32(E1000_MGTPRC);
+	rd32(E1000_MGTPDC);
+	rd32(E1000_MGTPTC);
+
+	rd32(E1000_IAC);
+	rd32(E1000_ICRXOC);
+
+	rd32(E1000_ICRXPTC);
+	rd32(E1000_ICRXATC);
+	rd32(E1000_ICTXPTC);
+	rd32(E1000_ICTXATC);
+	rd32(E1000_ICTXQEC);
+	rd32(E1000_ICTXQMTC);
+	rd32(E1000_ICRXDMTC);
+
+	rd32(E1000_CBTMPC);
+	rd32(E1000_HTDPMC);
+	rd32(E1000_CBRMPC);
+	rd32(E1000_RPTHC);
+	rd32(E1000_HGPTC);
+	rd32(E1000_HTCBDPC);
+	rd32(E1000_HGORCL);
+	rd32(E1000_HGORCH);
+	rd32(E1000_HGOTCL);
+	rd32(E1000_HGOTCH);
+	rd32(E1000_LENERRS);
 
 	/* This register should not be read in copper configurations */
 	if (hw->phy.media_type == e1000_media_type_internal_serdes ||
 	    igb_sgmii_active_82575(hw))
-		temp = rd32(E1000_SCVPC);
+		rd32(E1000_SCVPC);
 }
 
 /**
@@ -1400,8 +1407,183 @@
 	wr32(E1000_VT_CTL, vt_ctl);
 }
 
+/**
+ *  igb_read_phy_reg_82580 - Read 82580 MDI control register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to be read
+ *  @data: pointer to the read data
+ *
+ *  Reads the MDI control register in the PHY at offset and stores the
+ *  information read to data.
+ **/
+static s32 igb_read_phy_reg_82580(struct e1000_hw *hw, u32 offset, u16 *data)
+{
+	u32 mdicnfg = 0;
+	s32 ret_val;
+
+
+	ret_val = hw->phy.ops.acquire(hw);
+	if (ret_val)
+		goto out;
+
+	/*
+	 * We config the phy address in MDICNFG register now. Same bits
+	 * as before. The values in MDIC can be written but will be
+	 * ignored. This allows us to call the old function after
+	 * configuring the PHY address in the new register
+	 */
+	mdicnfg = (hw->phy.addr << E1000_MDIC_PHY_SHIFT);
+	wr32(E1000_MDICNFG, mdicnfg);
+
+	ret_val = igb_read_phy_reg_mdic(hw, offset, data);
+
+	hw->phy.ops.release(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_write_phy_reg_82580 - Write 82580 MDI control register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to write to
+ *  @data: data to write to register at offset
+ *
+ *  Writes data to MDI control register in the PHY at offset.
+ **/
+static s32 igb_write_phy_reg_82580(struct e1000_hw *hw, u32 offset, u16 data)
+{
+	u32 mdicnfg = 0;
+	s32 ret_val;
+
+
+	ret_val = hw->phy.ops.acquire(hw);
+	if (ret_val)
+		goto out;
+
+	/*
+	 * We config the phy address in MDICNFG register now. Same bits
+	 * as before. The values in MDIC can be written but will be
+	 * ignored. This allows us to call the old function after
+	 * configuring the PHY address in the new register
+	 */
+	mdicnfg = (hw->phy.addr << E1000_MDIC_PHY_SHIFT);
+	wr32(E1000_MDICNFG, mdicnfg);
+
+	ret_val = igb_write_phy_reg_mdic(hw, offset, data);
+
+	hw->phy.ops.release(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_reset_hw_82580 - Reset hardware
+ *  @hw: pointer to the HW structure
+ *
+ *  This resets function or entire device (all ports, etc.)
+ *  to a known state.
+ **/
+static s32 igb_reset_hw_82580(struct e1000_hw *hw)
+{
+	s32 ret_val = 0;
+	/* BH SW mailbox bit in SW_FW_SYNC */
+	u16 swmbsw_mask = E1000_SW_SYNCH_MB;
+	u32 ctrl, icr;
+	bool global_device_reset = hw->dev_spec._82575.global_device_reset;
+
+
+	hw->dev_spec._82575.global_device_reset = false;
+
+	/* Get current control state. */
+	ctrl = rd32(E1000_CTRL);
+
+	/*
+	 * Prevent the PCI-E bus from sticking if there is no TLP connection
+	 * on the last TLP read/write transaction when MAC is reset.
+	 */
+	ret_val = igb_disable_pcie_master(hw);
+	if (ret_val)
+		hw_dbg("PCI-E Master disable polling has failed.\n");
+
+	hw_dbg("Masking off all interrupts\n");
+	wr32(E1000_IMC, 0xffffffff);
+	wr32(E1000_RCTL, 0);
+	wr32(E1000_TCTL, E1000_TCTL_PSP);
+	wrfl();
+
+	msleep(10);
+
+	/* Determine whether or not a global dev reset is requested */
+	if (global_device_reset &&
+		igb_acquire_swfw_sync_82575(hw, swmbsw_mask))
+			global_device_reset = false;
+
+	if (global_device_reset &&
+		!(rd32(E1000_STATUS) & E1000_STAT_DEV_RST_SET))
+		ctrl |= E1000_CTRL_DEV_RST;
+	else
+		ctrl |= E1000_CTRL_RST;
+
+	wr32(E1000_CTRL, ctrl);
+
+	/* Add delay to insure DEV_RST has time to complete */
+	if (global_device_reset)
+		msleep(5);
+
+	ret_val = igb_get_auto_rd_done(hw);
+	if (ret_val) {
+		/*
+		 * When auto config read does not complete, do not
+		 * return with an error. This can happen in situations
+		 * where there is no eeprom and prevents getting link.
+		 */
+		hw_dbg("Auto Read Done did not complete\n");
+	}
+
+	/* If EEPROM is not present, run manual init scripts */
+	if ((rd32(E1000_EECD) & E1000_EECD_PRES) == 0)
+		igb_reset_init_script_82575(hw);
+
+	/* clear global device reset status bit */
+	wr32(E1000_STATUS, E1000_STAT_DEV_RST_SET);
+
+	/* Clear any pending interrupt events. */
+	wr32(E1000_IMC, 0xffffffff);
+	icr = rd32(E1000_ICR);
+
+	/* Install any alternate MAC address into RAR0 */
+	ret_val = igb_check_alt_mac_addr(hw);
+
+	/* Release semaphore */
+	if (global_device_reset)
+		igb_release_swfw_sync_82575(hw, swmbsw_mask);
+
+	return ret_val;
+}
+
+/**
+ *  igb_rxpbs_adjust_82580 - adjust RXPBS value to reflect actual RX PBA size
+ *  @data: data received by reading RXPBS register
+ *
+ *  The 82580 uses a table based approach for packet buffer allocation sizes.
+ *  This function converts the retrieved value into the correct table value
+ *     0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7
+ *  0x0 36  72 144   1   2   4   8  16
+ *  0x8 35  70 140 rsv rsv rsv rsv rsv
+ */
+u16 igb_rxpbs_adjust_82580(u32 data)
+{
+	u16 ret_val = 0;
+
+	if (data < E1000_82580_RXPBS_TABLE_SIZE)
+		ret_val = e1000_82580_rxpbs_table[data];
+
+	return ret_val;
+}
+
 static struct e1000_mac_operations e1000_mac_ops_82575 = {
-	.reset_hw             = igb_reset_hw_82575,
 	.init_hw              = igb_init_hw_82575,
 	.check_for_link       = igb_check_for_link_82575,
 	.rar_set              = igb_rar_set,
--- linux-mvl-dove-2.6.32.orig/drivers/net/igb/igb_main.c
+++ linux-mvl-dove-2.6.32/drivers/net/igb/igb_main.c
@@ -49,7 +49,7 @@
 #endif
 #include "igb.h"
 
-#define DRV_VERSION "1.3.16-k2"
+#define DRV_VERSION "2.1.0-k2"
 char igb_driver_name[] = "igb";
 char igb_driver_version[] = DRV_VERSION;
 static const char igb_driver_string[] =
@@ -61,8 +61,14 @@
 };
 
 static struct pci_device_id igb_pci_tbl[] = {
+	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
+	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
+	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
+	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
+	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 },
+	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 },
 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD), board_82575 },
@@ -81,6 +87,7 @@
 static int igb_setup_all_rx_resources(struct igb_adapter *);
 static void igb_free_all_tx_resources(struct igb_adapter *);
 static void igb_free_all_rx_resources(struct igb_adapter *);
+static void igb_setup_mrqc(struct igb_adapter *);
 void igb_update_stats(struct igb_adapter *);
 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 static void __devexit igb_remove(struct pci_dev *pdev);
@@ -89,7 +96,6 @@
 static int igb_close(struct net_device *);
 static void igb_configure_tx(struct igb_adapter *);
 static void igb_configure_rx(struct igb_adapter *);
-static void igb_setup_rctl(struct igb_adapter *);
 static void igb_clean_all_tx_rings(struct igb_adapter *);
 static void igb_clean_all_rx_rings(struct igb_adapter *);
 static void igb_clean_tx_ring(struct igb_ring *);
@@ -98,28 +104,22 @@
 static void igb_update_phy_info(unsigned long);
 static void igb_watchdog(unsigned long);
 static void igb_watchdog_task(struct work_struct *);
-static netdev_tx_t igb_xmit_frame_ring_adv(struct sk_buff *,
-					   struct net_device *,
-					   struct igb_ring *);
-static netdev_tx_t igb_xmit_frame_adv(struct sk_buff *skb,
-				      struct net_device *);
+static netdev_tx_t igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *);
 static struct net_device_stats *igb_get_stats(struct net_device *);
 static int igb_change_mtu(struct net_device *, int);
 static int igb_set_mac(struct net_device *, void *);
+static void igb_set_uta(struct igb_adapter *adapter);
 static irqreturn_t igb_intr(int irq, void *);
 static irqreturn_t igb_intr_msi(int irq, void *);
 static irqreturn_t igb_msix_other(int irq, void *);
-static irqreturn_t igb_msix_rx(int irq, void *);
-static irqreturn_t igb_msix_tx(int irq, void *);
+static irqreturn_t igb_msix_ring(int irq, void *);
 #ifdef CONFIG_IGB_DCA
-static void igb_update_rx_dca(struct igb_ring *);
-static void igb_update_tx_dca(struct igb_ring *);
+static void igb_update_dca(struct igb_q_vector *);
 static void igb_setup_dca(struct igb_adapter *);
 #endif /* CONFIG_IGB_DCA */
-static bool igb_clean_tx_irq(struct igb_ring *);
+static bool igb_clean_tx_irq(struct igb_q_vector *);
 static int igb_poll(struct napi_struct *, int);
-static bool igb_clean_rx_irq_adv(struct igb_ring *, int *, int);
-static void igb_alloc_rx_buffers_adv(struct igb_ring *, int);
+static bool igb_clean_rx_irq_adv(struct igb_q_vector *, int *, int);
 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 static void igb_tx_timeout(struct net_device *);
 static void igb_reset_task(struct work_struct *);
@@ -127,57 +127,13 @@
 static void igb_vlan_rx_add_vid(struct net_device *, u16);
 static void igb_vlan_rx_kill_vid(struct net_device *, u16);
 static void igb_restore_vlan(struct igb_adapter *);
+static void igb_rar_set_qsel(struct igb_adapter *, u8 *, u32 , u8);
 static void igb_ping_all_vfs(struct igb_adapter *);
 static void igb_msg_task(struct igb_adapter *);
-static int igb_rcv_msg_from_vf(struct igb_adapter *, u32);
-static inline void igb_set_rah_pool(struct e1000_hw *, int , int);
 static void igb_vmm_control(struct igb_adapter *);
-static int igb_set_vf_mac(struct igb_adapter *adapter, int, unsigned char *);
+static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 
-static inline void igb_set_vmolr(struct e1000_hw *hw, int vfn)
-{
-	u32 reg_data;
-
-	reg_data = rd32(E1000_VMOLR(vfn));
-	reg_data |= E1000_VMOLR_BAM |	 /* Accept broadcast */
-	            E1000_VMOLR_ROPE |   /* Accept packets matched in UTA */
-	            E1000_VMOLR_ROMPE |  /* Accept packets matched in MTA */
-	            E1000_VMOLR_AUPE |   /* Accept untagged packets */
-	            E1000_VMOLR_STRVLAN; /* Strip vlan tags */
-	wr32(E1000_VMOLR(vfn), reg_data);
-}
-
-static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
-                                 int vfn)
-{
-	struct e1000_hw *hw = &adapter->hw;
-	u32 vmolr;
-
-	/* if it isn't the PF check to see if VFs are enabled and
-	 * increase the size to support vlan tags */
-	if (vfn < adapter->vfs_allocated_count &&
-	    adapter->vf_data[vfn].vlans_enabled)
-		size += VLAN_TAG_SIZE;
-
-	vmolr = rd32(E1000_VMOLR(vfn));
-	vmolr &= ~E1000_VMOLR_RLPML_MASK;
-	vmolr |= size | E1000_VMOLR_LPE;
-	wr32(E1000_VMOLR(vfn), vmolr);
-
-	return 0;
-}
-
-static inline void igb_set_rah_pool(struct e1000_hw *hw, int pool, int entry)
-{
-	u32 reg_data;
-
-	reg_data = rd32(E1000_RAH(entry));
-	reg_data &= ~E1000_RAH_POOL_MASK;
-	reg_data |= E1000_RAH_POOL_1 << pool;;
-	wr32(E1000_RAH(entry), reg_data);
-}
-
 #ifdef CONFIG_PM
 static int igb_suspend(struct pci_dev *, pm_message_t);
 static int igb_resume(struct pci_dev *);
@@ -228,46 +184,12 @@
 	.err_handler = &igb_err_handler
 };
 
-static int global_quad_port_a; /* global quad port a indication */
-
 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 MODULE_LICENSE("GPL");
 MODULE_VERSION(DRV_VERSION);
 
 /**
- * Scale the NIC clock cycle by a large factor so that
- * relatively small clock corrections can be added or
- * substracted at each clock tick. The drawbacks of a
- * large factor are a) that the clock register overflows
- * more quickly (not such a big deal) and b) that the
- * increment per tick has to fit into 24 bits.
- *
- * Note that
- *   TIMINCA = IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS *
- *             IGB_TSYNC_SCALE
- *   TIMINCA += TIMINCA * adjustment [ppm] / 1e9
- *
- * The base scale factor is intentionally a power of two
- * so that the division in %struct timecounter can be done with
- * a shift.
- */
-#define IGB_TSYNC_SHIFT (19)
-#define IGB_TSYNC_SCALE (1<<IGB_TSYNC_SHIFT)
-
-/**
- * The duration of one clock cycle of the NIC.
- *
- * @todo This hard-coded value is part of the specification and might change
- * in future hardware revisions. Add revision check.
- */
-#define IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS 16
-
-#if (IGB_TSYNC_SCALE * IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS) >= (1<<24)
-# error IGB_TSYNC_SCALE and/or IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS are too large to fit into TIMINCA
-#endif
-
-/**
  * igb_read_clock - read raw cycle counter (to be used by time counter)
  */
 static cycle_t igb_read_clock(const struct cyclecounter *tc)
@@ -275,11 +197,21 @@
 	struct igb_adapter *adapter =
 		container_of(tc, struct igb_adapter, cycles);
 	struct e1000_hw *hw = &adapter->hw;
-	u64 stamp;
+	u64 stamp = 0;
+	int shift = 0;
 
-	stamp =  rd32(E1000_SYSTIML);
-	stamp |= (u64)rd32(E1000_SYSTIMH) << 32ULL;
+	/*
+	 * The timestamp latches on lowest register read. For the 82580
+	 * the lowest register is SYSTIMR instead of SYSTIML.  However we never
+	 * adjusted TIMINCA so SYSTIMR will just read as all 0s so ignore it.
+	 */
+	if (hw->mac.type == e1000_82580) {
+		stamp = rd32(E1000_SYSTIMR) >> 8;
+		shift = IGB_82580_TSYNC_SHIFT;
+	}
 
+	stamp |= (u64)rd32(E1000_SYSTIML) << shift;
+	stamp |= (u64)rd32(E1000_SYSTIMH) << (shift + 32);
 	return stamp;
 }
 
@@ -320,17 +252,6 @@
 #endif
 
 /**
- * igb_desc_unused - calculate if we have unused descriptors
- **/
-static int igb_desc_unused(struct igb_ring *ring)
-{
-	if (ring->next_to_clean > ring->next_to_use)
-		return ring->next_to_clean - ring->next_to_use - 1;
-
-	return ring->count + ring->next_to_clean - ring->next_to_use - 1;
-}
-
-/**
  * igb_init_module - Driver Registration Routine
  *
  * igb_init_module is the first routine called when the driver is
@@ -344,12 +265,9 @@
 
 	printk(KERN_INFO "%s\n", igb_copyright);
 
-	global_quad_port_a = 0;
-
 #ifdef CONFIG_IGB_DCA
 	dca_register_notify(&dca_notifier);
 #endif
-
 	ret = pci_register_driver(&igb_driver);
 	return ret;
 }
@@ -382,8 +300,8 @@
  **/
 static void igb_cache_ring_register(struct igb_adapter *adapter)
 {
-	int i;
-	unsigned int rbase_offset = adapter->vfs_allocated_count;
+	int i = 0, j = 0;
+	u32 rbase_offset = adapter->vfs_allocated_count;
 
 	switch (adapter->hw.mac.type) {
 	case e1000_82576:
@@ -392,23 +310,37 @@
 		 * In order to avoid collision we start at the first free queue
 		 * and continue consuming queues in the same sequence
 		 */
-		for (i = 0; i < adapter->num_rx_queues; i++)
-			adapter->rx_ring[i].reg_idx = rbase_offset +
-			                              Q_IDX_82576(i);
-		for (i = 0; i < adapter->num_tx_queues; i++)
-			adapter->tx_ring[i].reg_idx = rbase_offset +
-			                              Q_IDX_82576(i);
-		break;
+		if (adapter->vfs_allocated_count) {
+			for (; i < adapter->rss_queues; i++)
+				adapter->rx_ring[i].reg_idx = rbase_offset +
+				                              Q_IDX_82576(i);
+			for (; j < adapter->rss_queues; j++)
+				adapter->tx_ring[j].reg_idx = rbase_offset +
+				                              Q_IDX_82576(j);
+		}
 	case e1000_82575:
+	case e1000_82580:
 	default:
-		for (i = 0; i < adapter->num_rx_queues; i++)
-			adapter->rx_ring[i].reg_idx = i;
-		for (i = 0; i < adapter->num_tx_queues; i++)
-			adapter->tx_ring[i].reg_idx = i;
+		for (; i < adapter->num_rx_queues; i++)
+			adapter->rx_ring[i].reg_idx = rbase_offset + i;
+		for (; j < adapter->num_tx_queues; j++)
+			adapter->tx_ring[j].reg_idx = rbase_offset + j;
 		break;
 	}
 }
 
+static void igb_free_queues(struct igb_adapter *adapter)
+{
+	kfree(adapter->tx_ring);
+	kfree(adapter->rx_ring);
+
+	adapter->tx_ring = NULL;
+	adapter->rx_ring = NULL;
+
+	adapter->num_rx_queues = 0;
+	adapter->num_tx_queues = 0;
+}
+
 /**
  * igb_alloc_queues - Allocate memory for all rings
  * @adapter: board private structure to initialize
@@ -423,59 +355,61 @@
 	adapter->tx_ring = kcalloc(adapter->num_tx_queues,
 				   sizeof(struct igb_ring), GFP_KERNEL);
 	if (!adapter->tx_ring)
-		return -ENOMEM;
+		goto err;
 
 	adapter->rx_ring = kcalloc(adapter->num_rx_queues,
 				   sizeof(struct igb_ring), GFP_KERNEL);
-	if (!adapter->rx_ring) {
-		kfree(adapter->tx_ring);
-		return -ENOMEM;
-	}
-
-	adapter->rx_ring->buddy = adapter->tx_ring;
+	if (!adapter->rx_ring)
+		goto err;
 
 	for (i = 0; i < adapter->num_tx_queues; i++) {
 		struct igb_ring *ring = &(adapter->tx_ring[i]);
 		ring->count = adapter->tx_ring_count;
-		ring->adapter = adapter;
 		ring->queue_index = i;
+		ring->pdev = adapter->pdev;
+		ring->netdev = adapter->netdev;
+		/* For 82575, context index must be unique per ring. */
+		if (adapter->hw.mac.type == e1000_82575)
+			ring->flags = IGB_RING_FLAG_TX_CTX_IDX;
 	}
+
 	for (i = 0; i < adapter->num_rx_queues; i++) {
 		struct igb_ring *ring = &(adapter->rx_ring[i]);
 		ring->count = adapter->rx_ring_count;
-		ring->adapter = adapter;
 		ring->queue_index = i;
-		ring->itr_register = E1000_ITR;
-
-		/* set a default napi handler for each rx_ring */
-		netif_napi_add(adapter->netdev, &ring->napi, igb_poll, 64);
+		ring->pdev = adapter->pdev;
+		ring->netdev = adapter->netdev;
+		ring->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
+		ring->flags = IGB_RING_FLAG_RX_CSUM; /* enable rx checksum */
+		/* set flag indicating ring supports SCTP checksum offload */
+		if (adapter->hw.mac.type >= e1000_82576)
+			ring->flags |= IGB_RING_FLAG_RX_SCTP_CSUM;
 	}
 
 	igb_cache_ring_register(adapter);
-	return 0;
-}
-
-static void igb_free_queues(struct igb_adapter *adapter)
-{
-	int i;
 
-	for (i = 0; i < adapter->num_rx_queues; i++)
-		netif_napi_del(&adapter->rx_ring[i].napi);
+	return 0;
 
-	adapter->num_rx_queues = 0;
-	adapter->num_tx_queues = 0;
+err:
+	igb_free_queues(adapter);
 
-	kfree(adapter->tx_ring);
-	kfree(adapter->rx_ring);
+	return -ENOMEM;
 }
 
 #define IGB_N0_QUEUE -1
-static void igb_assign_vector(struct igb_adapter *adapter, int rx_queue,
-			      int tx_queue, int msix_vector)
+static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 {
 	u32 msixbm = 0;
+	struct igb_adapter *adapter = q_vector->adapter;
 	struct e1000_hw *hw = &adapter->hw;
 	u32 ivar, index;
+	int rx_queue = IGB_N0_QUEUE;
+	int tx_queue = IGB_N0_QUEUE;
+
+	if (q_vector->rx_ring)
+		rx_queue = q_vector->rx_ring->reg_idx;
+	if (q_vector->tx_ring)
+		tx_queue = q_vector->tx_ring->reg_idx;
 
 	switch (hw->mac.type) {
 	case e1000_82575:
@@ -483,16 +417,14 @@
 		   bitmask for the EICR/EIMS/EIMC registers.  To assign one
 		   or more queues to a vector, we write the appropriate bits
 		   into the MSIXBM register for that vector. */
-		if (rx_queue > IGB_N0_QUEUE) {
+		if (rx_queue > IGB_N0_QUEUE)
 			msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
-			adapter->rx_ring[rx_queue].eims_value = msixbm;
-		}
-		if (tx_queue > IGB_N0_QUEUE) {
+		if (tx_queue > IGB_N0_QUEUE)
 			msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
-			adapter->tx_ring[tx_queue].eims_value =
-				  E1000_EICR_TX_QUEUE0 << tx_queue;
-		}
+		if (!adapter->msix_entries && msix_vector == 0)
+			msixbm |= E1000_EIMS_OTHER;
 		array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
+		q_vector->eims_value = msixbm;
 		break;
 	case e1000_82576:
 		/* 82576 uses a table-based method for assigning vectors.
@@ -500,7 +432,40 @@
 		   a vector number along with a "valid" bit.  Sadly, the layout
 		   of the table is somewhat counterintuitive. */
 		if (rx_queue > IGB_N0_QUEUE) {
-			index = (rx_queue >> 1) + adapter->vfs_allocated_count;
+			index = (rx_queue & 0x7);
+			ivar = array_rd32(E1000_IVAR0, index);
+			if (rx_queue < 8) {
+				/* vector goes into low byte of register */
+				ivar = ivar & 0xFFFFFF00;
+				ivar |= msix_vector | E1000_IVAR_VALID;
+			} else {
+				/* vector goes into third byte of register */
+				ivar = ivar & 0xFF00FFFF;
+				ivar |= (msix_vector | E1000_IVAR_VALID) << 16;
+			}
+			array_wr32(E1000_IVAR0, index, ivar);
+		}
+		if (tx_queue > IGB_N0_QUEUE) {
+			index = (tx_queue & 0x7);
+			ivar = array_rd32(E1000_IVAR0, index);
+			if (tx_queue < 8) {
+				/* vector goes into second byte of register */
+				ivar = ivar & 0xFFFF00FF;
+				ivar |= (msix_vector | E1000_IVAR_VALID) << 8;
+			} else {
+				/* vector goes into high byte of register */
+				ivar = ivar & 0x00FFFFFF;
+				ivar |= (msix_vector | E1000_IVAR_VALID) << 24;
+			}
+			array_wr32(E1000_IVAR0, index, ivar);
+		}
+		q_vector->eims_value = 1 << msix_vector;
+		break;
+	case e1000_82580:
+		/* 82580 uses the same table-based approach as 82576 but has fewer
+		   entries as a result we carry over for queues greater than 4. */
+		if (rx_queue > IGB_N0_QUEUE) {
+			index = (rx_queue >> 1);
 			ivar = array_rd32(E1000_IVAR0, index);
 			if (rx_queue & 0x1) {
 				/* vector goes into third byte of register */
@@ -511,11 +476,10 @@
 				ivar = ivar & 0xFFFFFF00;
 				ivar |= msix_vector | E1000_IVAR_VALID;
 			}
-			adapter->rx_ring[rx_queue].eims_value= 1 << msix_vector;
 			array_wr32(E1000_IVAR0, index, ivar);
 		}
 		if (tx_queue > IGB_N0_QUEUE) {
-			index = (tx_queue >> 1) + adapter->vfs_allocated_count;
+			index = (tx_queue >> 1);
 			ivar = array_rd32(E1000_IVAR0, index);
 			if (tx_queue & 0x1) {
 				/* vector goes into high byte of register */
@@ -526,9 +490,9 @@
 				ivar = ivar & 0xFFFF00FF;
 				ivar |= (msix_vector | E1000_IVAR_VALID) << 8;
 			}
-			adapter->tx_ring[tx_queue].eims_value= 1 << msix_vector;
 			array_wr32(E1000_IVAR0, index, ivar);
 		}
+		q_vector->eims_value = 1 << msix_vector;
 		break;
 	default:
 		BUG();
@@ -549,43 +513,10 @@
 	struct e1000_hw *hw = &adapter->hw;
 
 	adapter->eims_enable_mask = 0;
-	if (hw->mac.type == e1000_82576)
-		/* Turn on MSI-X capability first, or our settings
-		 * won't stick.  And it will take days to debug. */
-		wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
-				   E1000_GPIE_PBA | E1000_GPIE_EIAME |
- 				   E1000_GPIE_NSICR);
-
-	for (i = 0; i < adapter->num_tx_queues; i++) {
-		struct igb_ring *tx_ring = &adapter->tx_ring[i];
-		igb_assign_vector(adapter, IGB_N0_QUEUE, i, vector++);
-		adapter->eims_enable_mask |= tx_ring->eims_value;
-		if (tx_ring->itr_val)
-			writel(tx_ring->itr_val,
-			       hw->hw_addr + tx_ring->itr_register);
-		else
-			writel(1, hw->hw_addr + tx_ring->itr_register);
-	}
-
-	for (i = 0; i < adapter->num_rx_queues; i++) {
-		struct igb_ring *rx_ring = &adapter->rx_ring[i];
-		rx_ring->buddy = NULL;
-		igb_assign_vector(adapter, i, IGB_N0_QUEUE, vector++);
-		adapter->eims_enable_mask |= rx_ring->eims_value;
-		if (rx_ring->itr_val)
-			writel(rx_ring->itr_val,
-			       hw->hw_addr + rx_ring->itr_register);
-		else
-			writel(1, hw->hw_addr + rx_ring->itr_register);
-	}
-
 
 	/* set vector for other causes, i.e. link changes */
 	switch (hw->mac.type) {
 	case e1000_82575:
-		array_wr32(E1000_MSIXBM(0), vector++,
-				      E1000_EIMS_OTHER);
-
 		tmp = rd32(E1000_CTRL_EXT);
 		/* enable MSI-X PBA support*/
 		tmp |= E1000_CTRL_EXT_PBA_CLR;
@@ -595,22 +526,41 @@
 		tmp |= E1000_CTRL_EXT_IRCA;
 
 		wr32(E1000_CTRL_EXT, tmp);
-		adapter->eims_enable_mask |= E1000_EIMS_OTHER;
+
+		/* enable msix_other interrupt */
+		array_wr32(E1000_MSIXBM(0), vector++,
+		                      E1000_EIMS_OTHER);
 		adapter->eims_other = E1000_EIMS_OTHER;
 
 		break;
 
 	case e1000_82576:
+	case e1000_82580:
+		/* Turn on MSI-X capability first, or our settings
+		 * won't stick.  And it will take days to debug. */
+		wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
+		                E1000_GPIE_PBA | E1000_GPIE_EIAME |
+		                E1000_GPIE_NSICR);
+
+		/* enable msix_other interrupt */
+		adapter->eims_other = 1 << vector;
 		tmp = (vector++ | E1000_IVAR_VALID) << 8;
-		wr32(E1000_IVAR_MISC, tmp);
 
-		adapter->eims_enable_mask = (1 << (vector)) - 1;
-		adapter->eims_other = 1 << (vector - 1);
+		wr32(E1000_IVAR_MISC, tmp);
 		break;
 	default:
 		/* do nothing, since nothing else supports MSI-X */
 		break;
 	} /* switch (hw->mac.type) */
+
+	adapter->eims_enable_mask |= adapter->eims_other;
+
+	for (i = 0; i < adapter->num_q_vectors; i++) {
+		struct igb_q_vector *q_vector = adapter->q_vector[i];
+		igb_assign_vector(q_vector, vector++);
+		adapter->eims_enable_mask |= q_vector->eims_value;
+	}
+
 	wrfl();
 }
 
@@ -623,43 +573,40 @@
 static int igb_request_msix(struct igb_adapter *adapter)
 {
 	struct net_device *netdev = adapter->netdev;
+	struct e1000_hw *hw = &adapter->hw;
 	int i, err = 0, vector = 0;
 
-	vector = 0;
+	err = request_irq(adapter->msix_entries[vector].vector,
+	                  &igb_msix_other, 0, netdev->name, adapter);
+	if (err)
+		goto out;
+	vector++;
 
-	for (i = 0; i < adapter->num_tx_queues; i++) {
-		struct igb_ring *ring = &(adapter->tx_ring[i]);
-		sprintf(ring->name, "%s-tx-%d", netdev->name, i);
-		err = request_irq(adapter->msix_entries[vector].vector,
-				  &igb_msix_tx, 0, ring->name,
-				  &(adapter->tx_ring[i]));
-		if (err)
-			goto out;
-		ring->itr_register = E1000_EITR(0) + (vector << 2);
-		ring->itr_val = 976; /* ~4000 ints/sec */
-		vector++;
-	}
-	for (i = 0; i < adapter->num_rx_queues; i++) {
-		struct igb_ring *ring = &(adapter->rx_ring[i]);
-		if (strlen(netdev->name) < (IFNAMSIZ - 5))
-			sprintf(ring->name, "%s-rx-%d", netdev->name, i);
+	for (i = 0; i < adapter->num_q_vectors; i++) {
+		struct igb_q_vector *q_vector = adapter->q_vector[i];
+
+		q_vector->itr_register = hw->hw_addr + E1000_EITR(vector);
+
+		if (q_vector->rx_ring && q_vector->tx_ring)
+			sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
+			        q_vector->rx_ring->queue_index);
+		else if (q_vector->tx_ring)
+			sprintf(q_vector->name, "%s-tx-%u", netdev->name,
+			        q_vector->tx_ring->queue_index);
+		else if (q_vector->rx_ring)
+			sprintf(q_vector->name, "%s-rx-%u", netdev->name,
+			        q_vector->rx_ring->queue_index);
 		else
-			memcpy(ring->name, netdev->name, IFNAMSIZ);
+			sprintf(q_vector->name, "%s-unused", netdev->name);
+
 		err = request_irq(adapter->msix_entries[vector].vector,
-				  &igb_msix_rx, 0, ring->name,
-				  &(adapter->rx_ring[i]));
+		                  &igb_msix_ring, 0, q_vector->name,
+		                  q_vector);
 		if (err)
 			goto out;
-		ring->itr_register = E1000_EITR(0) + (vector << 2);
-		ring->itr_val = adapter->itr;
 		vector++;
 	}
 
-	err = request_irq(adapter->msix_entries[vector].vector,
-			  &igb_msix_other, 0, netdev->name, netdev);
-	if (err)
-		goto out;
-
 	igb_configure_msix(adapter);
 	return 0;
 out:
@@ -672,11 +619,44 @@
 		pci_disable_msix(adapter->pdev);
 		kfree(adapter->msix_entries);
 		adapter->msix_entries = NULL;
-	} else if (adapter->flags & IGB_FLAG_HAS_MSI)
+	} else if (adapter->flags & IGB_FLAG_HAS_MSI) {
 		pci_disable_msi(adapter->pdev);
-	return;
+	}
+}
+
+/**
+ * igb_free_q_vectors - Free memory allocated for interrupt vectors
+ * @adapter: board private structure to initialize
+ *
+ * This function frees the memory allocated to the q_vectors.  In addition if
+ * NAPI is enabled it will delete any references to the NAPI struct prior
+ * to freeing the q_vector.
+ **/
+static void igb_free_q_vectors(struct igb_adapter *adapter)
+{
+	int v_idx;
+
+	for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
+		struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
+		adapter->q_vector[v_idx] = NULL;
+		netif_napi_del(&q_vector->napi);
+		kfree(q_vector);
+	}
+	adapter->num_q_vectors = 0;
 }
 
+/**
+ * igb_clear_interrupt_scheme - reset the device to a state of no interrupts
+ *
+ * This function resets the device so that it has 0 rx queues, tx queues, and
+ * MSI-X interrupts allocated.
+ */
+static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
+{
+	igb_free_queues(adapter);
+	igb_free_q_vectors(adapter);
+	igb_reset_interrupt_capability(adapter);
+}
 
 /**
  * igb_set_interrupt_capability - set MSI or MSI-X if supported
@@ -690,11 +670,21 @@
 	int numvecs, i;
 
 	/* Number of supported queues. */
-	/* Having more queues than CPUs doesn't make sense. */
-	adapter->num_rx_queues = min_t(u32, IGB_MAX_RX_QUEUES, num_online_cpus());
-	adapter->num_tx_queues = min_t(u32, IGB_MAX_TX_QUEUES, num_online_cpus());
+	adapter->num_rx_queues = adapter->rss_queues;
+	adapter->num_tx_queues = adapter->rss_queues;
+
+	/* start with one vector for every rx queue */
+	numvecs = adapter->num_rx_queues;
+
+	/* if tx handler is seperate add 1 for every tx queue */
+	if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
+		numvecs += adapter->num_tx_queues;
+
+	/* store the number of vectors reserved for queues */
+	adapter->num_q_vectors = numvecs;
 
-	numvecs = adapter->num_tx_queues + adapter->num_rx_queues + 1;
+	/* add 1 vector for link status interrupts */
+	numvecs++;
 	adapter->msix_entries = kcalloc(numvecs, sizeof(struct msix_entry),
 					GFP_KERNEL);
 	if (!adapter->msix_entries)
@@ -728,8 +718,12 @@
 		dev_info(&adapter->pdev->dev, "IOV Disabled\n");
 	}
 #endif
+	adapter->vfs_allocated_count = 0;
+	adapter->rss_queues = 1;
+	adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
 	adapter->num_rx_queues = 1;
 	adapter->num_tx_queues = 1;
+	adapter->num_q_vectors = 1;
 	if (!pci_enable_msi(adapter->pdev))
 		adapter->flags |= IGB_FLAG_HAS_MSI;
 out:
@@ -739,93 +733,238 @@
 }
 
 /**
- * igb_request_irq - initialize interrupts
+ * igb_alloc_q_vectors - Allocate memory for interrupt vectors
+ * @adapter: board private structure to initialize
  *
- * Attempts to configure interrupts using the best available
- * capabilities of the hardware and kernel.
+ * We allocate one q_vector per queue interrupt.  If allocation fails we
+ * return -ENOMEM.
  **/
-static int igb_request_irq(struct igb_adapter *adapter)
+static int igb_alloc_q_vectors(struct igb_adapter *adapter)
 {
-	struct net_device *netdev = adapter->netdev;
+	struct igb_q_vector *q_vector;
 	struct e1000_hw *hw = &adapter->hw;
-	int err = 0;
+	int v_idx;
 
-	if (adapter->msix_entries) {
-		err = igb_request_msix(adapter);
-		if (!err)
-			goto request_done;
-		/* fall back to MSI */
-		igb_reset_interrupt_capability(adapter);
-		if (!pci_enable_msi(adapter->pdev))
-			adapter->flags |= IGB_FLAG_HAS_MSI;
-		igb_free_all_tx_resources(adapter);
-		igb_free_all_rx_resources(adapter);
-		adapter->num_rx_queues = 1;
-		igb_alloc_queues(adapter);
-	} else {
-		switch (hw->mac.type) {
-		case e1000_82575:
-			wr32(E1000_MSIXBM(0),
-			     (E1000_EICR_RX_QUEUE0 | E1000_EIMS_OTHER));
-			break;
-		case e1000_82576:
-			wr32(E1000_IVAR0, E1000_IVAR_VALID);
-			break;
-		default:
-			break;
-		}
+	for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
+		q_vector = kzalloc(sizeof(struct igb_q_vector), GFP_KERNEL);
+		if (!q_vector)
+			goto err_out;
+		q_vector->adapter = adapter;
+		q_vector->itr_shift = (hw->mac.type == e1000_82575) ? 16 : 0;
+		q_vector->itr_register = hw->hw_addr + E1000_EITR(0);
+		q_vector->itr_val = IGB_START_ITR;
+		q_vector->set_itr = 1;
+		netif_napi_add(adapter->netdev, &q_vector->napi, igb_poll, 64);
+		adapter->q_vector[v_idx] = q_vector;
 	}
+	return 0;
 
-	if (adapter->flags & IGB_FLAG_HAS_MSI) {
-		err = request_irq(adapter->pdev->irq, &igb_intr_msi, 0,
-				  netdev->name, netdev);
-		if (!err)
-			goto request_done;
-		/* fall back to legacy interrupts */
-		igb_reset_interrupt_capability(adapter);
-		adapter->flags &= ~IGB_FLAG_HAS_MSI;
+err_out:
+	while (v_idx) {
+		v_idx--;
+		q_vector = adapter->q_vector[v_idx];
+		netif_napi_del(&q_vector->napi);
+		kfree(q_vector);
+		adapter->q_vector[v_idx] = NULL;
 	}
+	return -ENOMEM;
+}
 
-	err = request_irq(adapter->pdev->irq, &igb_intr, IRQF_SHARED,
-			  netdev->name, netdev);
+static void igb_map_rx_ring_to_vector(struct igb_adapter *adapter,
+                                      int ring_idx, int v_idx)
+{
+	struct igb_q_vector *q_vector;
 
-	if (err)
-		dev_err(&adapter->pdev->dev, "Error %d getting interrupt\n",
-			err);
+	q_vector = adapter->q_vector[v_idx];
+	q_vector->rx_ring = &adapter->rx_ring[ring_idx];
+	q_vector->rx_ring->q_vector = q_vector;
+	q_vector->itr_val = adapter->rx_itr_setting;
+	if (q_vector->itr_val && q_vector->itr_val <= 3)
+		q_vector->itr_val = IGB_START_ITR;
+}
 
-request_done:
-	return err;
+static void igb_map_tx_ring_to_vector(struct igb_adapter *adapter,
+                                      int ring_idx, int v_idx)
+{
+	struct igb_q_vector *q_vector;
+
+	q_vector = adapter->q_vector[v_idx];
+	q_vector->tx_ring = &adapter->tx_ring[ring_idx];
+	q_vector->tx_ring->q_vector = q_vector;
+	q_vector->itr_val = adapter->tx_itr_setting;
+	if (q_vector->itr_val && q_vector->itr_val <= 3)
+		q_vector->itr_val = IGB_START_ITR;
 }
 
-static void igb_free_irq(struct igb_adapter *adapter)
+/**
+ * igb_map_ring_to_vector - maps allocated queues to vectors
+ *
+ * This function maps the recently allocated queues to vectors.
+ **/
+static int igb_map_ring_to_vector(struct igb_adapter *adapter)
 {
-	struct net_device *netdev = adapter->netdev;
+	int i;
+	int v_idx = 0;
 
-	if (adapter->msix_entries) {
-		int vector = 0, i;
+	if ((adapter->num_q_vectors < adapter->num_rx_queues) ||
+	    (adapter->num_q_vectors < adapter->num_tx_queues))
+		return -ENOMEM;
 
-		for (i = 0; i < adapter->num_tx_queues; i++)
-			free_irq(adapter->msix_entries[vector++].vector,
-				&(adapter->tx_ring[i]));
+	if (adapter->num_q_vectors >=
+	    (adapter->num_rx_queues + adapter->num_tx_queues)) {
 		for (i = 0; i < adapter->num_rx_queues; i++)
-			free_irq(adapter->msix_entries[vector++].vector,
-				&(adapter->rx_ring[i]));
-
-		free_irq(adapter->msix_entries[vector++].vector, netdev);
-		return;
+			igb_map_rx_ring_to_vector(adapter, i, v_idx++);
+		for (i = 0; i < adapter->num_tx_queues; i++)
+			igb_map_tx_ring_to_vector(adapter, i, v_idx++);
+	} else {
+		for (i = 0; i < adapter->num_rx_queues; i++) {
+			if (i < adapter->num_tx_queues)
+				igb_map_tx_ring_to_vector(adapter, i, v_idx);
+			igb_map_rx_ring_to_vector(adapter, i, v_idx++);
+		}
+		for (; i < adapter->num_tx_queues; i++)
+			igb_map_tx_ring_to_vector(adapter, i, v_idx++);
 	}
-
-	free_irq(adapter->pdev->irq, netdev);
+	return 0;
 }
 
 /**
- * igb_irq_disable - Mask off interrupt generation on the NIC
+ * igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
+ *
+ * This function initializes the interrupts and allocates all of the queues.
+ **/
+static int igb_init_interrupt_scheme(struct igb_adapter *adapter)
+{
+	struct pci_dev *pdev = adapter->pdev;
+	int err;
+
+	igb_set_interrupt_capability(adapter);
+
+	err = igb_alloc_q_vectors(adapter);
+	if (err) {
+		dev_err(&pdev->dev, "Unable to allocate memory for vectors\n");
+		goto err_alloc_q_vectors;
+	}
+
+	err = igb_alloc_queues(adapter);
+	if (err) {
+		dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
+		goto err_alloc_queues;
+	}
+
+	err = igb_map_ring_to_vector(adapter);
+	if (err) {
+		dev_err(&pdev->dev, "Invalid q_vector to ring mapping\n");
+		goto err_map_queues;
+	}
+
+
+	return 0;
+err_map_queues:
+	igb_free_queues(adapter);
+err_alloc_queues:
+	igb_free_q_vectors(adapter);
+err_alloc_q_vectors:
+	igb_reset_interrupt_capability(adapter);
+	return err;
+}
+
+/**
+ * igb_request_irq - initialize interrupts
+ *
+ * Attempts to configure interrupts using the best available
+ * capabilities of the hardware and kernel.
+ **/
+static int igb_request_irq(struct igb_adapter *adapter)
+{
+	struct net_device *netdev = adapter->netdev;
+	struct pci_dev *pdev = adapter->pdev;
+	int err = 0;
+
+	if (adapter->msix_entries) {
+		err = igb_request_msix(adapter);
+		if (!err)
+			goto request_done;
+		/* fall back to MSI */
+		igb_clear_interrupt_scheme(adapter);
+		if (!pci_enable_msi(adapter->pdev))
+			adapter->flags |= IGB_FLAG_HAS_MSI;
+		igb_free_all_tx_resources(adapter);
+		igb_free_all_rx_resources(adapter);
+		adapter->num_tx_queues = 1;
+		adapter->num_rx_queues = 1;
+		adapter->num_q_vectors = 1;
+		err = igb_alloc_q_vectors(adapter);
+		if (err) {
+			dev_err(&pdev->dev,
+			        "Unable to allocate memory for vectors\n");
+			goto request_done;
+		}
+		err = igb_alloc_queues(adapter);
+		if (err) {
+			dev_err(&pdev->dev,
+			        "Unable to allocate memory for queues\n");
+			igb_free_q_vectors(adapter);
+			goto request_done;
+		}
+		igb_setup_all_tx_resources(adapter);
+		igb_setup_all_rx_resources(adapter);
+	} else {
+		igb_assign_vector(adapter->q_vector[0], 0);
+	}
+
+	if (adapter->flags & IGB_FLAG_HAS_MSI) {
+		err = request_irq(adapter->pdev->irq, &igb_intr_msi, 0,
+				  netdev->name, adapter);
+		if (!err)
+			goto request_done;
+
+		/* fall back to legacy interrupts */
+		igb_reset_interrupt_capability(adapter);
+		adapter->flags &= ~IGB_FLAG_HAS_MSI;
+	}
+
+	err = request_irq(adapter->pdev->irq, &igb_intr, IRQF_SHARED,
+			  netdev->name, adapter);
+
+	if (err)
+		dev_err(&adapter->pdev->dev, "Error %d getting interrupt\n",
+			err);
+
+request_done:
+	return err;
+}
+
+static void igb_free_irq(struct igb_adapter *adapter)
+{
+	if (adapter->msix_entries) {
+		int vector = 0, i;
+
+		free_irq(adapter->msix_entries[vector++].vector, adapter);
+
+		for (i = 0; i < adapter->num_q_vectors; i++) {
+			struct igb_q_vector *q_vector = adapter->q_vector[i];
+			free_irq(adapter->msix_entries[vector++].vector,
+			         q_vector);
+		}
+	} else {
+		free_irq(adapter->pdev->irq, adapter);
+	}
+}
+
+/**
+ * igb_irq_disable - Mask off interrupt generation on the NIC
  * @adapter: board private structure
  **/
 static void igb_irq_disable(struct igb_adapter *adapter)
 {
 	struct e1000_hw *hw = &adapter->hw;
 
+	/*
+	 * we need to be careful when disabling interrupts.  The VFs are also
+	 * mapped into these registers and so clearing the bits can cause
+	 * issues on the VF drivers so we only need to clear what we set
+	 */
 	if (adapter->msix_entries) {
 		u32 regval = rd32(E1000_EIAM);
 		wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
@@ -849,41 +988,47 @@
 	struct e1000_hw *hw = &adapter->hw;
 
 	if (adapter->msix_entries) {
+		u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC;
 		u32 regval = rd32(E1000_EIAC);
 		wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
 		regval = rd32(E1000_EIAM);
 		wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
 		wr32(E1000_EIMS, adapter->eims_enable_mask);
-		if (adapter->vfs_allocated_count)
+		if (adapter->vfs_allocated_count) {
 			wr32(E1000_MBVFIMR, 0xFF);
-		wr32(E1000_IMS, (E1000_IMS_LSC | E1000_IMS_VMMB |
-		                 E1000_IMS_DOUTSYNC));
+			ims |= E1000_IMS_VMMB;
+		}
+		if (adapter->hw.mac.type == e1000_82580)
+			ims |= E1000_IMS_DRSTA;
+
+		wr32(E1000_IMS, ims);
 	} else {
-		wr32(E1000_IMS, IMS_ENABLE_MASK);
-		wr32(E1000_IAM, IMS_ENABLE_MASK);
+		wr32(E1000_IMS, IMS_ENABLE_MASK |
+				E1000_IMS_DRSTA);
+		wr32(E1000_IAM, IMS_ENABLE_MASK |
+				E1000_IMS_DRSTA);
 	}
 }
 
 static void igb_update_mng_vlan(struct igb_adapter *adapter)
 {
-	struct net_device *netdev = adapter->netdev;
+	struct e1000_hw *hw = &adapter->hw;
 	u16 vid = adapter->hw.mng_cookie.vlan_id;
 	u16 old_vid = adapter->mng_vlan_id;
-	if (adapter->vlgrp) {
-		if (!vlan_group_get_device(adapter->vlgrp, vid)) {
-			if (adapter->hw.mng_cookie.status &
-				E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
-				igb_vlan_rx_add_vid(netdev, vid);
-				adapter->mng_vlan_id = vid;
-			} else
-				adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
-
-			if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
-					(vid != old_vid) &&
-			    !vlan_group_get_device(adapter->vlgrp, old_vid))
-				igb_vlan_rx_kill_vid(netdev, old_vid);
-		} else
-			adapter->mng_vlan_id = vid;
+
+	if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
+		/* add VID to filter table */
+		igb_vfta_set(hw, vid, true);
+		adapter->mng_vlan_id = vid;
+	} else {
+		adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
+	}
+
+	if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
+	    (vid != old_vid) &&
+	    !vlan_group_get_device(adapter->vlgrp, old_vid)) {
+		/* remove VID from filter table */
+		igb_vfta_set(hw, old_vid, false);
 	}
 }
 
@@ -907,7 +1052,6 @@
 			ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
 }
 
-
 /**
  * igb_get_hw_control - get control of the h/w from f/w
  * @adapter: address of board private structure
@@ -942,8 +1086,11 @@
 
 	igb_restore_vlan(adapter);
 
-	igb_configure_tx(adapter);
+	igb_setup_tctl(adapter);
+	igb_setup_mrqc(adapter);
 	igb_setup_rctl(adapter);
+
+	igb_configure_tx(adapter);
 	igb_configure_rx(adapter);
 
 	igb_rx_fifo_flush_82575(&adapter->hw);
@@ -965,7 +1112,6 @@
  * igb_up - Open the interface and prepare it to handle traffic
  * @adapter: board private structure
  **/
-
 int igb_up(struct igb_adapter *adapter)
 {
 	struct e1000_hw *hw = &adapter->hw;
@@ -976,30 +1122,39 @@
 
 	clear_bit(__IGB_DOWN, &adapter->state);
 
-	for (i = 0; i < adapter->num_rx_queues; i++)
-		napi_enable(&adapter->rx_ring[i].napi);
+	for (i = 0; i < adapter->num_q_vectors; i++) {
+		struct igb_q_vector *q_vector = adapter->q_vector[i];
+		napi_enable(&q_vector->napi);
+	}
 	if (adapter->msix_entries)
 		igb_configure_msix(adapter);
-
-	igb_vmm_control(adapter);
-	igb_set_rah_pool(hw, adapter->vfs_allocated_count, 0);
-	igb_set_vmolr(hw, adapter->vfs_allocated_count);
+	else
+		igb_assign_vector(adapter->q_vector[0], 0);
 
 	/* Clear any pending interrupts. */
 	rd32(E1000_ICR);
 	igb_irq_enable(adapter);
 
+	/* notify VFs that reset has been completed */
+	if (adapter->vfs_allocated_count) {
+		u32 reg_data = rd32(E1000_CTRL_EXT);
+		reg_data |= E1000_CTRL_EXT_PFRSTD;
+		wr32(E1000_CTRL_EXT, reg_data);
+	}
+
 	netif_tx_start_all_queues(adapter->netdev);
 
-	/* Fire a link change interrupt to start the watchdog. */
-	wr32(E1000_ICS, E1000_ICS_LSC);
+	/* start the watchdog. */
+	hw->mac.get_link_status = 1;
+	schedule_work(&adapter->watchdog_task);
+
 	return 0;
 }
 
 void igb_down(struct igb_adapter *adapter)
 {
-	struct e1000_hw *hw = &adapter->hw;
 	struct net_device *netdev = adapter->netdev;
+	struct e1000_hw *hw = &adapter->hw;
 	u32 tctl, rctl;
 	int i;
 
@@ -1022,8 +1177,10 @@
 	wrfl();
 	msleep(10);
 
-	for (i = 0; i < adapter->num_rx_queues; i++)
-		napi_disable(&adapter->rx_ring[i].napi);
+	for (i = 0; i < adapter->num_q_vectors; i++) {
+		struct igb_q_vector *q_vector = adapter->q_vector[i];
+		napi_disable(&q_vector->napi);
+	}
 
 	igb_irq_disable(adapter);
 
@@ -1062,6 +1219,7 @@
 
 void igb_reset(struct igb_adapter *adapter)
 {
+	struct pci_dev *pdev = adapter->pdev;
 	struct e1000_hw *hw = &adapter->hw;
 	struct e1000_mac_info *mac = &hw->mac;
 	struct e1000_fc_info *fc = &hw->fc;
@@ -1072,8 +1230,13 @@
 	 * To take effect CTRL.RST is required.
 	 */
 	switch (mac->type) {
+	case e1000_82580:
+		pba = rd32(E1000_RXPBS);
+		pba = igb_rxpbs_adjust_82580(pba);
+		break;
 	case e1000_82576:
-		pba = E1000_PBA_64K;
+		pba = rd32(E1000_RXPBS);
+		pba &= E1000_RXPBS_SIZE_MASK_82576;
 		break;
 	case e1000_82575:
 	default:
@@ -1133,13 +1296,8 @@
 	hwm = min(((pba << 10) * 9 / 10),
 			((pba << 10) - 2 * adapter->max_frame_size));
 
-	if (mac->type < e1000_82576) {
-		fc->high_water = hwm & 0xFFF8;	/* 8-byte granularity */
-		fc->low_water = fc->high_water - 8;
-	} else {
-		fc->high_water = hwm & 0xFFF0;	/* 16-byte granularity */
-		fc->low_water = fc->high_water - 16;
-	}
+	fc->high_water = hwm & 0xFFF0;	/* 16-byte granularity */
+	fc->low_water = fc->high_water - 16;
 	fc->pause_time = 0xFFFF;
 	fc->send_xon = 1;
 	fc->current_mode = fc->requested_mode;
@@ -1148,10 +1306,10 @@
 	if (adapter->vfs_allocated_count) {
 		int i;
 		for (i = 0 ; i < adapter->vfs_allocated_count; i++)
-			adapter->vf_data[i].clear_to_send = false;
+			adapter->vf_data[i].flags = 0;
 
 		/* ping all the active vfs to let them know we are going down */
-			igb_ping_all_vfs(adapter);
+		igb_ping_all_vfs(adapter);
 
 		/* disable transmits and receives */
 		wr32(E1000_VFRE, 0);
@@ -1159,23 +1317,28 @@
 	}
 
 	/* Allow time for pending master requests to run */
-	adapter->hw.mac.ops.reset_hw(&adapter->hw);
+	hw->mac.ops.reset_hw(hw);
 	wr32(E1000_WUC, 0);
 
-	if (adapter->hw.mac.ops.init_hw(&adapter->hw))
-		dev_err(&adapter->pdev->dev, "Hardware Error\n");
+	if (hw->mac.ops.init_hw(hw))
+		dev_err(&pdev->dev, "Hardware Error\n");
 
+	if (hw->mac.type == e1000_82580) {
+		u32 reg = rd32(E1000_PCIEMISC);
+		wr32(E1000_PCIEMISC,
+		                reg & ~E1000_PCIEMISC_LX_DECISION);
+	}
 	igb_update_mng_vlan(adapter);
 
 	/* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
 	wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
 
-	igb_reset_adaptive(&adapter->hw);
-	igb_get_phy_info(&adapter->hw);
+	igb_reset_adaptive(hw);
+	igb_get_phy_info(hw);
 }
 
 static const struct net_device_ops igb_netdev_ops = {
-	.ndo_open 		= igb_open,
+	.ndo_open		= igb_open,
 	.ndo_stop		= igb_close,
 	.ndo_start_xmit		= igb_xmit_frame_adv,
 	.ndo_get_stats		= igb_get_stats,
@@ -1211,10 +1374,11 @@
 	struct net_device *netdev;
 	struct igb_adapter *adapter;
 	struct e1000_hw *hw;
+	u16 eeprom_data = 0;
+	static int global_quad_port_a; /* global quad port a indication */
 	const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
 	unsigned long mmio_start, mmio_len;
 	int err, pci_using_dac;
-	u16 eeprom_data = 0;
 	u16 eeprom_apme_mask = IGB_EEPROM_APME;
 	u32 part_num;
 
@@ -1291,8 +1455,6 @@
 	hw->subsystem_vendor_id = pdev->subsystem_vendor;
 	hw->subsystem_device_id = pdev->subsystem_device;
 
-	/* setup the private structure */
-	hw->back = adapter;
 	/* Copy the default MAC, PHY and NVM function pointers */
 	memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
 	memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
@@ -1302,46 +1464,6 @@
 	if (err)
 		goto err_sw_init;
 
-#ifdef CONFIG_PCI_IOV
-	/* since iov functionality isn't critical to base device function we
-	 * can accept failure.  If it fails we don't allow iov to be enabled */
-	if (hw->mac.type == e1000_82576) {
-		/* 82576 supports a maximum of 7 VFs in addition to the PF */
-		unsigned int num_vfs = (max_vfs > 7) ? 7 : max_vfs;
-		int i;
-		unsigned char mac_addr[ETH_ALEN];
-
-		if (num_vfs) {
-			adapter->vf_data = kcalloc(num_vfs,
-						sizeof(struct vf_data_storage),
-						GFP_KERNEL);
-			if (!adapter->vf_data) {
-				dev_err(&pdev->dev,
-				        "Could not allocate VF private data - "
-					"IOV enable failed\n");
-			} else {
-				err = pci_enable_sriov(pdev, num_vfs);
-				if (!err) {
-					adapter->vfs_allocated_count = num_vfs;
-					dev_info(&pdev->dev,
-					         "%d vfs allocated\n",
-					         num_vfs);
-					for (i = 0;
-					     i < adapter->vfs_allocated_count;
-					     i++) {
-						random_ether_addr(mac_addr);
-						igb_set_vf_mac(adapter, i,
-						               mac_addr);
-					}
-				} else {
-					kfree(adapter->vf_data);
-					adapter->vf_data = NULL;
-				}
-			}
-		}
-	}
-
-#endif
 	/* setup the private structure */
 	err = igb_sw_init(adapter);
 	if (err)
@@ -1349,16 +1471,6 @@
 
 	igb_get_bus_info_pcie(hw);
 
-	/* set flags */
-	switch (hw->mac.type) {
-	case e1000_82575:
-		adapter->flags |= IGB_FLAG_NEED_CTX_IDX;
-		break;
-	case e1000_82576:
-	default:
-		break;
-	}
-
 	hw->phy.autoneg_wait_to_complete = false;
 	hw->mac.adaptive_ifs = true;
 
@@ -1382,7 +1494,6 @@
 	netdev->features |= NETIF_F_IPV6_CSUM;
 	netdev->features |= NETIF_F_TSO;
 	netdev->features |= NETIF_F_TSO6;
-
 	netdev->features |= NETIF_F_GRO;
 
 	netdev->vlan_features |= NETIF_F_TSO;
@@ -1394,10 +1505,10 @@
 	if (pci_using_dac)
 		netdev->features |= NETIF_F_HIGHDMA;
 
-	if (adapter->hw.mac.type == e1000_82576)
+	if (hw->mac.type >= e1000_82576)
 		netdev->features |= NETIF_F_SCTP_CSUM;
 
-	adapter->en_mng_pt = igb_enable_mng_pass_thru(&adapter->hw);
+	adapter->en_mng_pt = igb_enable_mng_pass_thru(hw);
 
 	/* before reading the NVM, reset the controller to put the device in a
 	 * known good starting state */
@@ -1439,9 +1550,6 @@
 	hw->fc.requested_mode = e1000_fc_default;
 	hw->fc.current_mode = e1000_fc_default;
 
-	adapter->itr_setting = IGB_DEFAULT_ITR;
-	adapter->itr = IGB_START_ITR;
-
 	igb_validate_mdi_setting(hw);
 
 	/* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
@@ -1450,6 +1558,10 @@
 
 	if (hw->bus.func == 0)
 		hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
+	else if (hw->mac.type == e1000_82580)
+		hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
+		                 NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
+		                 &eeprom_data);
 	else if (hw->bus.func == 1)
 		hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
 
@@ -1508,66 +1620,14 @@
 		dev_info(&pdev->dev, "DCA enabled\n");
 		igb_setup_dca(adapter);
 	}
-#endif
-
-	/*
-	 * Initialize hardware timer: we keep it running just in case
-	 * that some program needs it later on.
-	 */
-	memset(&adapter->cycles, 0, sizeof(adapter->cycles));
-	adapter->cycles.read = igb_read_clock;
-	adapter->cycles.mask = CLOCKSOURCE_MASK(64);
-	adapter->cycles.mult = 1;
-	adapter->cycles.shift = IGB_TSYNC_SHIFT;
-	wr32(E1000_TIMINCA,
-	     (1<<24) |
-	     IGB_TSYNC_CYCLE_TIME_IN_NANOSECONDS * IGB_TSYNC_SCALE);
-#if 0
-	/*
-	 * Avoid rollover while we initialize by resetting the time counter.
-	 */
-	wr32(E1000_SYSTIML, 0x00000000);
-	wr32(E1000_SYSTIMH, 0x00000000);
-#else
-	/*
-	 * Set registers so that rollover occurs soon to test this.
-	 */
-	wr32(E1000_SYSTIML, 0x00000000);
-	wr32(E1000_SYSTIMH, 0xFF800000);
-#endif
-	wrfl();
-	timecounter_init(&adapter->clock,
-			 &adapter->cycles,
-			 ktime_to_ns(ktime_get_real()));
-
-	/*
-	 * Synchronize our NIC clock against system wall clock. NIC
-	 * time stamp reading requires ~3us per sample, each sample
-	 * was pretty stable even under load => only require 10
-	 * samples for each offset comparison.
-	 */
-	memset(&adapter->compare, 0, sizeof(adapter->compare));
-	adapter->compare.source = &adapter->clock;
-	adapter->compare.target = ktime_get_real;
-	adapter->compare.num_samples = 10;
-	timecompare_update(&adapter->compare, 0);
 
-#ifdef DEBUG
-	{
-		char buffer[160];
-		printk(KERN_DEBUG
-			"igb: %s: hw %p initialized timer\n",
-			igb_get_time_str(adapter, buffer),
-			&adapter->hw);
-	}
 #endif
-
 	dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
 	/* print bus type/speed/width info */
 	dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
 		 netdev->name,
-		 ((hw->bus.speed == e1000_bus_speed_2500)
-		  ? "2.5Gb/s" : "unknown"),
+		 ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
+		                                            "unknown"),
 		 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
 		  (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
 		  (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
@@ -1594,15 +1654,14 @@
 
 	if (hw->flash_address)
 		iounmap(hw->flash_address);
-
-	igb_free_queues(adapter);
 err_sw_init:
+	igb_clear_interrupt_scheme(adapter);
 	iounmap(hw->hw_addr);
 err_ioremap:
 	free_netdev(netdev);
 err_alloc_etherdev:
-	pci_release_selected_regions(pdev, pci_select_bars(pdev,
-	                             IORESOURCE_MEM));
+	pci_release_selected_regions(pdev,
+	                             pci_select_bars(pdev, IORESOURCE_MEM));
 err_pci_reg:
 err_dma:
 	pci_disable_device(pdev);
@@ -1647,12 +1706,10 @@
 
 	unregister_netdev(netdev);
 
-	if (!igb_check_reset_block(&adapter->hw))
-		igb_reset_phy(&adapter->hw);
-
-	igb_reset_interrupt_capability(adapter);
+	if (!igb_check_reset_block(hw))
+		igb_reset_phy(hw);
 
-	igb_free_queues(adapter);
+	igb_clear_interrupt_scheme(adapter);
 
 #ifdef CONFIG_PCI_IOV
 	/* reclaim resources allocated to VFs */
@@ -1668,11 +1725,12 @@
 		dev_info(&pdev->dev, "IOV Disabled\n");
 	}
 #endif
+
 	iounmap(hw->hw_addr);
 	if (hw->flash_address)
 		iounmap(hw->flash_address);
-	pci_release_selected_regions(pdev, pci_select_bars(pdev,
-	                             IORESOURCE_MEM));
+	pci_release_selected_regions(pdev,
+	                             pci_select_bars(pdev, IORESOURCE_MEM));
 
 	free_netdev(netdev);
 
@@ -1682,6 +1740,160 @@
 }
 
 /**
+ * igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
+ * @adapter: board private structure to initialize
+ *
+ * This function initializes the vf specific data storage and then attempts to
+ * allocate the VFs.  The reason for ordering it this way is because it is much
+ * mor expensive time wise to disable SR-IOV than it is to allocate and free
+ * the memory for the VFs.
+ **/
+static void __devinit igb_probe_vfs(struct igb_adapter * adapter)
+{
+#ifdef CONFIG_PCI_IOV
+	struct pci_dev *pdev = adapter->pdev;
+
+	if (adapter->vfs_allocated_count > 7)
+		adapter->vfs_allocated_count = 7;
+
+	if (adapter->vfs_allocated_count) {
+		adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
+		                           sizeof(struct vf_data_storage),
+		                           GFP_KERNEL);
+		/* if allocation failed then we do not support SR-IOV */
+		if (!adapter->vf_data) {
+			adapter->vfs_allocated_count = 0;
+			dev_err(&pdev->dev, "Unable to allocate memory for VF "
+			        "Data Storage\n");
+		}
+	}
+
+	if (pci_enable_sriov(pdev, adapter->vfs_allocated_count)) {
+		kfree(adapter->vf_data);
+		adapter->vf_data = NULL;
+#endif /* CONFIG_PCI_IOV */
+		adapter->vfs_allocated_count = 0;
+#ifdef CONFIG_PCI_IOV
+	} else {
+		unsigned char mac_addr[ETH_ALEN];
+		int i;
+		dev_info(&pdev->dev, "%d vfs allocated\n",
+		         adapter->vfs_allocated_count);
+		for (i = 0; i < adapter->vfs_allocated_count; i++) {
+			random_ether_addr(mac_addr);
+			igb_set_vf_mac(adapter, i, mac_addr);
+		}
+	}
+#endif /* CONFIG_PCI_IOV */
+}
+
+
+/**
+ * igb_init_hw_timer - Initialize hardware timer used with IEEE 1588 timestamp
+ * @adapter: board private structure to initialize
+ *
+ * igb_init_hw_timer initializes the function pointer and values for the hw
+ * timer found in hardware.
+ **/
+static void igb_init_hw_timer(struct igb_adapter *adapter)
+{
+	struct e1000_hw *hw = &adapter->hw;
+
+	switch (hw->mac.type) {
+	case e1000_82580:
+		memset(&adapter->cycles, 0, sizeof(adapter->cycles));
+		adapter->cycles.read = igb_read_clock;
+		adapter->cycles.mask = CLOCKSOURCE_MASK(64);
+		adapter->cycles.mult = 1;
+		/*
+		 * The 82580 timesync updates the system timer every 8ns by 8ns
+		 * and the value cannot be shifted.  Instead we need to shift
+		 * the registers to generate a 64bit timer value.  As a result
+		 * SYSTIMR/L/H, TXSTMPL/H, RXSTMPL/H all have to be shifted by
+		 * 24 in order to generate a larger value for synchronization.
+		 */
+		adapter->cycles.shift = IGB_82580_TSYNC_SHIFT;
+		/* disable system timer temporarily by setting bit 31 */
+		wr32(E1000_TSAUXC, 0x80000000);
+		wrfl();
+
+		/* Set registers so that rollover occurs soon to test this. */
+		wr32(E1000_SYSTIMR, 0x00000000);
+		wr32(E1000_SYSTIML, 0x80000000);
+		wr32(E1000_SYSTIMH, 0x000000FF);
+		wrfl();
+
+		/* enable system timer by clearing bit 31 */
+		wr32(E1000_TSAUXC, 0x0);
+		wrfl();
+
+		timecounter_init(&adapter->clock,
+				 &adapter->cycles,
+				 ktime_to_ns(ktime_get_real()));
+		/*
+		 * Synchronize our NIC clock against system wall clock. NIC
+		 * time stamp reading requires ~3us per sample, each sample
+		 * was pretty stable even under load => only require 10
+		 * samples for each offset comparison.
+		 */
+		memset(&adapter->compare, 0, sizeof(adapter->compare));
+		adapter->compare.source = &adapter->clock;
+		adapter->compare.target = ktime_get_real;
+		adapter->compare.num_samples = 10;
+		timecompare_update(&adapter->compare, 0);
+		break;
+	case e1000_82576:
+		/*
+		 * Initialize hardware timer: we keep it running just in case
+		 * that some program needs it later on.
+		 */
+		memset(&adapter->cycles, 0, sizeof(adapter->cycles));
+		adapter->cycles.read = igb_read_clock;
+		adapter->cycles.mask = CLOCKSOURCE_MASK(64);
+		adapter->cycles.mult = 1;
+		/**
+		 * Scale the NIC clock cycle by a large factor so that
+		 * relatively small clock corrections can be added or
+		 * substracted at each clock tick. The drawbacks of a large
+		 * factor are a) that the clock register overflows more quickly
+		 * (not such a big deal) and b) that the increment per tick has
+		 * to fit into 24 bits.  As a result we need to use a shift of
+		 * 19 so we can fit a value of 16 into the TIMINCA register.
+		 */
+		adapter->cycles.shift = IGB_82576_TSYNC_SHIFT;
+		wr32(E1000_TIMINCA,
+		                (1 << E1000_TIMINCA_16NS_SHIFT) |
+		                (16 << IGB_82576_TSYNC_SHIFT));
+
+		/* Set registers so that rollover occurs soon to test this. */
+		wr32(E1000_SYSTIML, 0x00000000);
+		wr32(E1000_SYSTIMH, 0xFF800000);
+		wrfl();
+
+		timecounter_init(&adapter->clock,
+				 &adapter->cycles,
+				 ktime_to_ns(ktime_get_real()));
+		/*
+		 * Synchronize our NIC clock against system wall clock. NIC
+		 * time stamp reading requires ~3us per sample, each sample
+		 * was pretty stable even under load => only require 10
+		 * samples for each offset comparison.
+		 */
+		memset(&adapter->compare, 0, sizeof(adapter->compare));
+		adapter->compare.source = &adapter->clock;
+		adapter->compare.target = ktime_get_real;
+		adapter->compare.num_samples = 10;
+		timecompare_update(&adapter->compare, 0);
+		break;
+	case e1000_82575:
+		/* 82575 does not support timesync */
+	default:
+		break;
+	}
+
+}
+
+/**
  * igb_sw_init - Initialize general software structures (struct igb_adapter)
  * @adapter: board private structure to initialize
  *
@@ -1699,20 +1911,37 @@
 
 	adapter->tx_ring_count = IGB_DEFAULT_TXD;
 	adapter->rx_ring_count = IGB_DEFAULT_RXD;
-	adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
-	adapter->rx_ps_hdr_size = 0; /* disable packet split */
+	adapter->rx_itr_setting = IGB_DEFAULT_ITR;
+	adapter->tx_itr_setting = IGB_DEFAULT_ITR;
+
 	adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
 	adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
 
-	/* This call may decrease the number of queues depending on
-	 * interrupt mode. */
-	igb_set_interrupt_capability(adapter);
+#ifdef CONFIG_PCI_IOV
+	if (hw->mac.type == e1000_82576)
+		adapter->vfs_allocated_count = max_vfs;
+
+#endif /* CONFIG_PCI_IOV */
+	adapter->rss_queues = min_t(u32, IGB_MAX_RX_QUEUES, num_online_cpus());
+
+	/*
+	 * if rss_queues > 4 or vfs are going to be allocated with rss_queues
+	 * then we should combine the queues into a queue pair in order to
+	 * conserve interrupts due to limited supply
+	 */
+	if ((adapter->rss_queues > 4) ||
+	    ((adapter->rss_queues > 1) && (adapter->vfs_allocated_count > 6)))
+		adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
 
-	if (igb_alloc_queues(adapter)) {
+	/* This call may decrease the number of queues */
+	if (igb_init_interrupt_scheme(adapter)) {
 		dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
 		return -ENOMEM;
 	}
 
+	igb_init_hw_timer(adapter);
+	igb_probe_vfs(adapter);
+
 	/* Explicitly disable IRQ since the NIC can be in any state. */
 	igb_irq_disable(adapter);
 
@@ -1757,21 +1986,12 @@
 
 	/* e1000_power_up_phy(adapter); */
 
-	adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
-	if ((adapter->hw.mng_cookie.status &
-	     E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
-		igb_update_mng_vlan(adapter);
-
 	/* before we allocate an interrupt, we must be ready to handle it.
 	 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
 	 * as soon as we call pci_request_irq, so we have to setup our
 	 * clean_rx handler before we do so.  */
 	igb_configure(adapter);
 
-	igb_vmm_control(adapter);
-	igb_set_rah_pool(hw, adapter->vfs_allocated_count, 0);
-	igb_set_vmolr(hw, adapter->vfs_allocated_count);
-
 	err = igb_request_irq(adapter);
 	if (err)
 		goto err_req_irq;
@@ -1779,18 +1999,28 @@
 	/* From here on the code is the same as igb_up() */
 	clear_bit(__IGB_DOWN, &adapter->state);
 
-	for (i = 0; i < adapter->num_rx_queues; i++)
-		napi_enable(&adapter->rx_ring[i].napi);
+	for (i = 0; i < adapter->num_q_vectors; i++) {
+		struct igb_q_vector *q_vector = adapter->q_vector[i];
+		napi_enable(&q_vector->napi);
+	}
 
 	/* Clear any pending interrupts. */
 	rd32(E1000_ICR);
 
 	igb_irq_enable(adapter);
 
+	/* notify VFs that reset has been completed */
+	if (adapter->vfs_allocated_count) {
+		u32 reg_data = rd32(E1000_CTRL_EXT);
+		reg_data |= E1000_CTRL_EXT_PFRSTD;
+		wr32(E1000_CTRL_EXT, reg_data);
+	}
+
 	netif_tx_start_all_queues(netdev);
 
-	/* Fire a link status change interrupt to start the watchdog. */
-	wr32(E1000_ICS, E1000_ICS_LSC);
+	/* start the watchdog. */
+	hw->mac.get_link_status = 1;
+	schedule_work(&adapter->watchdog_task);
 
 	return 0;
 
@@ -1829,28 +2059,18 @@
 	igb_free_all_tx_resources(adapter);
 	igb_free_all_rx_resources(adapter);
 
-	/* kill manageability vlan ID if supported, but not if a vlan with
-	 * the same ID is registered on the host OS (let 8021q kill it) */
-	if ((adapter->hw.mng_cookie.status &
-			  E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
-	     !(adapter->vlgrp &&
-	       vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
-		igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
-
 	return 0;
 }
 
 /**
  * igb_setup_tx_resources - allocate Tx resources (Descriptors)
- * @adapter: board private structure
  * @tx_ring: tx descriptor ring (for a specific queue) to setup
  *
  * Return 0 on success, negative on failure
  **/
-int igb_setup_tx_resources(struct igb_adapter *adapter,
-			   struct igb_ring *tx_ring)
+int igb_setup_tx_resources(struct igb_ring *tx_ring)
 {
-	struct pci_dev *pdev = adapter->pdev;
+	struct pci_dev *pdev = tx_ring->pdev;
 	int size;
 
 	size = sizeof(struct igb_buffer) * tx_ring->count;
@@ -1863,20 +2083,20 @@
 	tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
 	tx_ring->size = ALIGN(tx_ring->size, 4096);
 
-	tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
+	tx_ring->desc = pci_alloc_consistent(pdev,
+	                                     tx_ring->size,
 					     &tx_ring->dma);
 
 	if (!tx_ring->desc)
 		goto err;
 
-	tx_ring->adapter = adapter;
 	tx_ring->next_to_use = 0;
 	tx_ring->next_to_clean = 0;
 	return 0;
 
 err:
 	vfree(tx_ring->buffer_info);
-	dev_err(&adapter->pdev->dev,
+	dev_err(&pdev->dev,
 		"Unable to allocate memory for the transmit descriptor ring\n");
 	return -ENOMEM;
 }
@@ -1890,13 +2110,13 @@
  **/
 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
 {
+	struct pci_dev *pdev = adapter->pdev;
 	int i, err = 0;
-	int r_idx;
 
 	for (i = 0; i < adapter->num_tx_queues; i++) {
-		err = igb_setup_tx_resources(adapter, &adapter->tx_ring[i]);
+		err = igb_setup_tx_resources(&adapter->tx_ring[i]);
 		if (err) {
-			dev_err(&adapter->pdev->dev,
+			dev_err(&pdev->dev,
 				"Allocation for Tx Queue %u failed\n", i);
 			for (i--; i >= 0; i--)
 				igb_free_tx_resources(&adapter->tx_ring[i]);
@@ -1904,57 +2124,24 @@
 		}
 	}
 
-	for (i = 0; i < IGB_MAX_TX_QUEUES; i++) {
-		r_idx = i % adapter->num_tx_queues;
+	for (i = 0; i < IGB_ABS_MAX_TX_QUEUES; i++) {
+		int r_idx = i % adapter->num_tx_queues;
 		adapter->multi_tx_table[i] = &adapter->tx_ring[r_idx];
 	}
 	return err;
 }
 
 /**
- * igb_configure_tx - Configure transmit Unit after Reset
- * @adapter: board private structure
- *
- * Configure the Tx unit of the MAC after a reset.
+ * igb_setup_tctl - configure the transmit control registers
+ * @adapter: Board private structure
  **/
-static void igb_configure_tx(struct igb_adapter *adapter)
+void igb_setup_tctl(struct igb_adapter *adapter)
 {
-	u64 tdba;
 	struct e1000_hw *hw = &adapter->hw;
 	u32 tctl;
-	u32 txdctl, txctrl;
-	int i, j;
 
-	for (i = 0; i < adapter->num_tx_queues; i++) {
-		struct igb_ring *ring = &adapter->tx_ring[i];
-		j = ring->reg_idx;
-		wr32(E1000_TDLEN(j),
-		     ring->count * sizeof(union e1000_adv_tx_desc));
-		tdba = ring->dma;
-		wr32(E1000_TDBAL(j),
-		     tdba & 0x00000000ffffffffULL);
-		wr32(E1000_TDBAH(j), tdba >> 32);
-
-		ring->head = E1000_TDH(j);
-		ring->tail = E1000_TDT(j);
-		writel(0, hw->hw_addr + ring->tail);
-		writel(0, hw->hw_addr + ring->head);
-		txdctl = rd32(E1000_TXDCTL(j));
-		txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
-		wr32(E1000_TXDCTL(j), txdctl);
-
-		/* Turn off Relaxed Ordering on head write-backs.  The
-		 * writebacks MUST be delivered in order or it will
-		 * completely screw up our bookeeping.
-		 */
-		txctrl = rd32(E1000_DCA_TXCTRL(j));
-		txctrl &= ~E1000_DCA_TXCTRL_TX_WB_RO_EN;
-		wr32(E1000_DCA_TXCTRL(j), txctrl);
-	}
-
-	/* disable queue 0 to prevent tail bump w/o re-configuration */
-	if (adapter->vfs_allocated_count)
-		wr32(E1000_TXDCTL(0), 0);
+	/* disable queue 0 which is enabled by default on 82575 and 82576 */
+	wr32(E1000_TXDCTL(0), 0);
 
 	/* Program the Transmit Control Register */
 	tctl = rd32(E1000_TCTL);
@@ -1964,9 +2151,6 @@
 
 	igb_config_collision_dist(hw);
 
-	/* Setup Transmit Descriptor Settings for eop descriptor */
-	adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS;
-
 	/* Enable transmits */
 	tctl |= E1000_TCTL_EN;
 
@@ -1974,16 +2158,69 @@
 }
 
 /**
- * igb_setup_rx_resources - allocate Rx resources (Descriptors)
+ * igb_configure_tx_ring - Configure transmit ring after Reset
+ * @adapter: board private structure
+ * @ring: tx ring to configure
+ *
+ * Configure a transmit ring after a reset.
+ **/
+void igb_configure_tx_ring(struct igb_adapter *adapter,
+                           struct igb_ring *ring)
+{
+	struct e1000_hw *hw = &adapter->hw;
+	u32 txdctl;
+	u64 tdba = ring->dma;
+	int reg_idx = ring->reg_idx;
+
+	/* disable the queue */
+	txdctl = rd32(E1000_TXDCTL(reg_idx));
+	wr32(E1000_TXDCTL(reg_idx),
+	                txdctl & ~E1000_TXDCTL_QUEUE_ENABLE);
+	wrfl();
+	mdelay(10);
+
+	wr32(E1000_TDLEN(reg_idx),
+	                ring->count * sizeof(union e1000_adv_tx_desc));
+	wr32(E1000_TDBAL(reg_idx),
+	                tdba & 0x00000000ffffffffULL);
+	wr32(E1000_TDBAH(reg_idx), tdba >> 32);
+
+	ring->head = hw->hw_addr + E1000_TDH(reg_idx);
+	ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
+	writel(0, ring->head);
+	writel(0, ring->tail);
+
+	txdctl |= IGB_TX_PTHRESH;
+	txdctl |= IGB_TX_HTHRESH << 8;
+	txdctl |= IGB_TX_WTHRESH << 16;
+
+	txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
+	wr32(E1000_TXDCTL(reg_idx), txdctl);
+}
+
+/**
+ * igb_configure_tx - Configure transmit Unit after Reset
  * @adapter: board private structure
+ *
+ * Configure the Tx unit of the MAC after a reset.
+ **/
+static void igb_configure_tx(struct igb_adapter *adapter)
+{
+	int i;
+
+	for (i = 0; i < adapter->num_tx_queues; i++)
+		igb_configure_tx_ring(adapter, &adapter->tx_ring[i]);
+}
+
+/**
+ * igb_setup_rx_resources - allocate Rx resources (Descriptors)
  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
  *
  * Returns 0 on success, negative on failure
  **/
-int igb_setup_rx_resources(struct igb_adapter *adapter,
-			   struct igb_ring *rx_ring)
+int igb_setup_rx_resources(struct igb_ring *rx_ring)
 {
-	struct pci_dev *pdev = adapter->pdev;
+	struct pci_dev *pdev = rx_ring->pdev;
 	int size, desc_len;
 
 	size = sizeof(struct igb_buffer) * rx_ring->count;
@@ -2007,13 +2244,12 @@
 	rx_ring->next_to_clean = 0;
 	rx_ring->next_to_use = 0;
 
-	rx_ring->adapter = adapter;
-
 	return 0;
 
 err:
 	vfree(rx_ring->buffer_info);
-	dev_err(&adapter->pdev->dev, "Unable to allocate memory for "
+	rx_ring->buffer_info = NULL;
+	dev_err(&pdev->dev, "Unable to allocate memory for "
 		"the receive descriptor ring\n");
 	return -ENOMEM;
 }
@@ -2027,12 +2263,13 @@
  **/
 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
 {
+	struct pci_dev *pdev = adapter->pdev;
 	int i, err = 0;
 
 	for (i = 0; i < adapter->num_rx_queues; i++) {
-		err = igb_setup_rx_resources(adapter, &adapter->rx_ring[i]);
+		err = igb_setup_rx_resources(&adapter->rx_ring[i]);
 		if (err) {
-			dev_err(&adapter->pdev->dev,
+			dev_err(&pdev->dev,
 				"Allocation for Rx Queue %u failed\n", i);
 			for (i--; i >= 0; i--)
 				igb_free_rx_resources(&adapter->rx_ring[i]);
@@ -2044,15 +2281,122 @@
 }
 
 /**
+ * igb_setup_mrqc - configure the multiple receive queue control registers
+ * @adapter: Board private structure
+ **/
+static void igb_setup_mrqc(struct igb_adapter *adapter)
+{
+	struct e1000_hw *hw = &adapter->hw;
+	u32 mrqc, rxcsum;
+	u32 j, num_rx_queues, shift = 0, shift2 = 0;
+	union e1000_reta {
+		u32 dword;
+		u8  bytes[4];
+	} reta;
+	static const u8 rsshash[40] = {
+		0x6d, 0x5a, 0x56, 0xda, 0x25, 0x5b, 0x0e, 0xc2, 0x41, 0x67,
+		0x25, 0x3d, 0x43, 0xa3, 0x8f, 0xb0, 0xd0, 0xca, 0x2b, 0xcb,
+		0xae, 0x7b, 0x30, 0xb4,	0x77, 0xcb, 0x2d, 0xa3, 0x80, 0x30,
+		0xf2, 0x0c, 0x6a, 0x42, 0xb7, 0x3b, 0xbe, 0xac, 0x01, 0xfa };
+
+	/* Fill out hash function seeds */
+	for (j = 0; j < 10; j++) {
+		u32 rsskey = rsshash[(j * 4)];
+		rsskey |= rsshash[(j * 4) + 1] << 8;
+		rsskey |= rsshash[(j * 4) + 2] << 16;
+		rsskey |= rsshash[(j * 4) + 3] << 24;
+		array_wr32(E1000_RSSRK(0), j, rsskey);
+	}
+
+	num_rx_queues = adapter->rss_queues;
+
+	if (adapter->vfs_allocated_count) {
+		/* 82575 and 82576 supports 2 RSS queues for VMDq */
+		switch (hw->mac.type) {
+		case e1000_82580:
+			num_rx_queues = 1;
+			shift = 0;
+			break;
+		case e1000_82576:
+			shift = 3;
+			num_rx_queues = 2;
+			break;
+		case e1000_82575:
+			shift = 2;
+			shift2 = 6;
+		default:
+			break;
+		}
+	} else {
+		if (hw->mac.type == e1000_82575)
+			shift = 6;
+	}
+
+	for (j = 0; j < (32 * 4); j++) {
+		reta.bytes[j & 3] = (j % num_rx_queues) << shift;
+		if (shift2)
+			reta.bytes[j & 3] |= num_rx_queues << shift2;
+		if ((j & 3) == 3)
+			wr32(E1000_RETA(j >> 2), reta.dword);
+	}
+
+	/*
+	 * Disable raw packet checksumming so that RSS hash is placed in
+	 * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
+	 * offloads as they are enabled by default
+	 */
+	rxcsum = rd32(E1000_RXCSUM);
+	rxcsum |= E1000_RXCSUM_PCSD;
+
+	if (adapter->hw.mac.type >= e1000_82576)
+		/* Enable Receive Checksum Offload for SCTP */
+		rxcsum |= E1000_RXCSUM_CRCOFL;
+
+	/* Don't need to set TUOFL or IPOFL, they default to 1 */
+	wr32(E1000_RXCSUM, rxcsum);
+
+	/* If VMDq is enabled then we set the appropriate mode for that, else
+	 * we default to RSS so that an RSS hash is calculated per packet even
+	 * if we are only using one queue */
+	if (adapter->vfs_allocated_count) {
+		if (hw->mac.type > e1000_82575) {
+			/* Set the default pool for the PF's first queue */
+			u32 vtctl = rd32(E1000_VT_CTL);
+			vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
+				   E1000_VT_CTL_DISABLE_DEF_POOL);
+			vtctl |= adapter->vfs_allocated_count <<
+				E1000_VT_CTL_DEFAULT_POOL_SHIFT;
+			wr32(E1000_VT_CTL, vtctl);
+		}
+		if (adapter->rss_queues > 1)
+			mrqc = E1000_MRQC_ENABLE_VMDQ_RSS_2Q;
+		else
+			mrqc = E1000_MRQC_ENABLE_VMDQ;
+	} else {
+		mrqc = E1000_MRQC_ENABLE_RSS_4Q;
+	}
+	igb_vmm_control(adapter);
+
+	mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
+		 E1000_MRQC_RSS_FIELD_IPV4_TCP);
+	mrqc |= (E1000_MRQC_RSS_FIELD_IPV6 |
+		 E1000_MRQC_RSS_FIELD_IPV6_TCP);
+	mrqc |= (E1000_MRQC_RSS_FIELD_IPV4_UDP |
+		 E1000_MRQC_RSS_FIELD_IPV6_UDP);
+	mrqc |= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX |
+		 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
+
+	wr32(E1000_MRQC, mrqc);
+}
+
+/**
  * igb_setup_rctl - configure the receive control registers
  * @adapter: Board private structure
  **/
-static void igb_setup_rctl(struct igb_adapter *adapter)
+void igb_setup_rctl(struct igb_adapter *adapter)
 {
 	struct e1000_hw *hw = &adapter->hw;
 	u32 rctl;
-	u32 srrctl = 0;
-	int i;
 
 	rctl = rd32(E1000_RCTL);
 
@@ -2069,75 +2413,45 @@
 	 */
 	rctl |= E1000_RCTL_SECRC;
 
-	/*
-	 * disable store bad packets and clear size bits.
-	 */
+	/* disable store bad packets and clear size bits. */
 	rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
 
-	/* enable LPE when to prevent packets larger than max_frame_size */
-		rctl |= E1000_RCTL_LPE;
+	/* enable LPE to prevent packets larger than max_frame_size */
+	rctl |= E1000_RCTL_LPE;
 
-	/* Setup buffer sizes */
-	switch (adapter->rx_buffer_len) {
-	case IGB_RXBUFFER_256:
-		rctl |= E1000_RCTL_SZ_256;
-		break;
-	case IGB_RXBUFFER_512:
-		rctl |= E1000_RCTL_SZ_512;
-		break;
-	default:
-		srrctl = ALIGN(adapter->rx_buffer_len, 1024)
-		         >> E1000_SRRCTL_BSIZEPKT_SHIFT;
-		break;
-	}
-
-	/* 82575 and greater support packet-split where the protocol
-	 * header is placed in skb->data and the packet data is
-	 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
-	 * In the case of a non-split, skb->data is linearly filled,
-	 * followed by the page buffers.  Therefore, skb->data is
-	 * sized to hold the largest protocol header.
-	 */
-	/* allocations using alloc_page take too long for regular MTU
-	 * so only enable packet split for jumbo frames */
-	if (adapter->netdev->mtu > ETH_DATA_LEN) {
-		adapter->rx_ps_hdr_size = IGB_RXBUFFER_128;
-		srrctl |= adapter->rx_ps_hdr_size <<
-			 E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
-		srrctl |= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
-	} else {
-		adapter->rx_ps_hdr_size = 0;
-		srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
-	}
+	/* disable queue 0 to prevent tail write w/o re-config */
+	wr32(E1000_RXDCTL(0), 0);
 
 	/* Attention!!!  For SR-IOV PF driver operations you must enable
 	 * queue drop for all VF and PF queues to prevent head of line blocking
 	 * if an un-trusted VF does not provide descriptors to hardware.
 	 */
 	if (adapter->vfs_allocated_count) {
-		u32 vmolr;
-
 		/* set all queue drop enable bits */
 		wr32(E1000_QDE, ALL_QUEUES);
-		srrctl |= E1000_SRRCTL_DROP_EN;
+	}
 
-		/* disable queue 0 to prevent tail write w/o re-config */
-		wr32(E1000_RXDCTL(0), 0);
+	wr32(E1000_RCTL, rctl);
+}
 
-		vmolr = rd32(E1000_VMOLR(adapter->vfs_allocated_count));
-		if (rctl & E1000_RCTL_LPE)
-			vmolr |= E1000_VMOLR_LPE;
-		if (adapter->num_rx_queues > 1)
-			vmolr |= E1000_VMOLR_RSSE;
-		wr32(E1000_VMOLR(adapter->vfs_allocated_count), vmolr);
-	}
+static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
+                                   int vfn)
+{
+	struct e1000_hw *hw = &adapter->hw;
+	u32 vmolr;
 
-	for (i = 0; i < adapter->num_rx_queues; i++) {
-		int j = adapter->rx_ring[i].reg_idx;
-		wr32(E1000_SRRCTL(j), srrctl);
-	}
+	/* if it isn't the PF check to see if VFs are enabled and
+	 * increase the size to support vlan tags */
+	if (vfn < adapter->vfs_allocated_count &&
+	    adapter->vf_data[vfn].vlans_enabled)
+		size += VLAN_TAG_SIZE;
 
-	wr32(E1000_RCTL, rctl);
+	vmolr = rd32(E1000_VMOLR(vfn));
+	vmolr &= ~E1000_VMOLR_RLPML_MASK;
+	vmolr |= size | E1000_VMOLR_LPE;
+	wr32(E1000_VMOLR(vfn), vmolr);
+
+	return 0;
 }
 
 /**
@@ -2159,33 +2473,107 @@
 	 * size and set the VMOLR RLPML to the size we need */
 	if (pf_id) {
 		igb_set_vf_rlpml(adapter, max_frame_size, pf_id);
-		max_frame_size = MAX_STD_JUMBO_FRAME_SIZE + VLAN_TAG_SIZE;
+		max_frame_size = MAX_JUMBO_FRAME_SIZE;
 	}
 
 	wr32(E1000_RLPML, max_frame_size);
 }
 
+static inline void igb_set_vmolr(struct igb_adapter *adapter, int vfn)
+{
+	struct e1000_hw *hw = &adapter->hw;
+	u32 vmolr;
+
+	/*
+	 * This register exists only on 82576 and newer so if we are older then
+	 * we should exit and do nothing
+	 */
+	if (hw->mac.type < e1000_82576)
+		return;
+
+	vmolr = rd32(E1000_VMOLR(vfn));
+	vmolr |= E1000_VMOLR_AUPE |        /* Accept untagged packets */
+	         E1000_VMOLR_STRVLAN;      /* Strip vlan tags */
+
+	/* clear all bits that might not be set */
+	vmolr &= ~(E1000_VMOLR_BAM | E1000_VMOLR_RSSE);
+
+	if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
+		vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
+	/*
+	 * for VMDq only allow the VFs and pool 0 to accept broadcast and
+	 * multicast packets
+	 */
+	if (vfn <= adapter->vfs_allocated_count)
+		vmolr |= E1000_VMOLR_BAM;	   /* Accept broadcast */
+
+	wr32(E1000_VMOLR(vfn), vmolr);
+}
+
 /**
- * igb_configure_vt_default_pool - Configure VT default pool
+ * igb_configure_rx_ring - Configure a receive ring after Reset
  * @adapter: board private structure
+ * @ring: receive ring to be configured
  *
- * Configure the default pool
+ * Configure the Rx unit of the MAC after a reset.
  **/
-static void igb_configure_vt_default_pool(struct igb_adapter *adapter)
+void igb_configure_rx_ring(struct igb_adapter *adapter,
+                           struct igb_ring *ring)
 {
 	struct e1000_hw *hw = &adapter->hw;
-	u16 pf_id = adapter->vfs_allocated_count;
-	u32 vtctl;
+	u64 rdba = ring->dma;
+	int reg_idx = ring->reg_idx;
+	u32 srrctl, rxdctl;
+
+	/* disable the queue */
+	rxdctl = rd32(E1000_RXDCTL(reg_idx));
+	wr32(E1000_RXDCTL(reg_idx),
+	                rxdctl & ~E1000_RXDCTL_QUEUE_ENABLE);
+
+	/* Set DMA base address registers */
+	wr32(E1000_RDBAL(reg_idx),
+	     rdba & 0x00000000ffffffffULL);
+	wr32(E1000_RDBAH(reg_idx), rdba >> 32);
+	wr32(E1000_RDLEN(reg_idx),
+	               ring->count * sizeof(union e1000_adv_rx_desc));
+
+	/* initialize head and tail */
+	ring->head = hw->hw_addr + E1000_RDH(reg_idx);
+	ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
+	writel(0, ring->head);
+	writel(0, ring->tail);
+
+	/* set descriptor configuration */
+	if (ring->rx_buffer_len < IGB_RXBUFFER_1024) {
+		srrctl = ALIGN(ring->rx_buffer_len, 64) <<
+		         E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
+#if (PAGE_SIZE / 2) > IGB_RXBUFFER_16384
+		srrctl |= IGB_RXBUFFER_16384 >>
+		          E1000_SRRCTL_BSIZEPKT_SHIFT;
+#else
+		srrctl |= (PAGE_SIZE / 2) >>
+		          E1000_SRRCTL_BSIZEPKT_SHIFT;
+#endif
+		srrctl |= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
+	} else {
+		srrctl = ALIGN(ring->rx_buffer_len, 1024) >>
+		         E1000_SRRCTL_BSIZEPKT_SHIFT;
+		srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
+	}
 
-	/* not in sr-iov mode - do nothing */
-	if (!pf_id)
-		return;
+	wr32(E1000_SRRCTL(reg_idx), srrctl);
+
+	/* set filtering for VMDQ pools */
+	igb_set_vmolr(adapter, reg_idx & 0x7);
 
-	vtctl = rd32(E1000_VT_CTL);
-	vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
-		   E1000_VT_CTL_DISABLE_DEF_POOL);
-	vtctl |= pf_id << E1000_VT_CTL_DEFAULT_POOL_SHIFT;
-	wr32(E1000_VT_CTL, vtctl);
+	/* enable receive descriptor fetching */
+	rxdctl = rd32(E1000_RXDCTL(reg_idx));
+	rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
+	rxdctl &= 0xFFF00000;
+	rxdctl |= IGB_RX_PTHRESH;
+	rxdctl |= IGB_RX_HTHRESH << 8;
+	rxdctl |= IGB_RX_WTHRESH << 16;
+	wr32(E1000_RXDCTL(reg_idx), rxdctl);
 }
 
 /**
@@ -2196,112 +2584,19 @@
  **/
 static void igb_configure_rx(struct igb_adapter *adapter)
 {
-	u64 rdba;
-	struct e1000_hw *hw = &adapter->hw;
-	u32 rctl, rxcsum;
-	u32 rxdctl;
 	int i;
 
-	/* disable receives while setting up the descriptors */
-	rctl = rd32(E1000_RCTL);
-	wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
-	wrfl();
-	mdelay(10);
+	/* set UTA to appropriate mode */
+	igb_set_uta(adapter);
 
-	if (adapter->itr_setting > 3)
-		wr32(E1000_ITR, adapter->itr);
+	/* set the correct pool for the PF default MAC address in entry 0 */
+	igb_rar_set_qsel(adapter, adapter->hw.mac.addr, 0,
+	                 adapter->vfs_allocated_count);
 
 	/* Setup the HW Rx Head and Tail Descriptor Pointers and
 	 * the Base and Length of the Rx Descriptor Ring */
-	for (i = 0; i < adapter->num_rx_queues; i++) {
-		struct igb_ring *ring = &adapter->rx_ring[i];
-		int j = ring->reg_idx;
-		rdba = ring->dma;
-		wr32(E1000_RDBAL(j),
-		     rdba & 0x00000000ffffffffULL);
-		wr32(E1000_RDBAH(j), rdba >> 32);
-		wr32(E1000_RDLEN(j),
-		     ring->count * sizeof(union e1000_adv_rx_desc));
-
-		ring->head = E1000_RDH(j);
-		ring->tail = E1000_RDT(j);
-		writel(0, hw->hw_addr + ring->tail);
-		writel(0, hw->hw_addr + ring->head);
-
-		rxdctl = rd32(E1000_RXDCTL(j));
-		rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
-		rxdctl &= 0xFFF00000;
-		rxdctl |= IGB_RX_PTHRESH;
-		rxdctl |= IGB_RX_HTHRESH << 8;
-		rxdctl |= IGB_RX_WTHRESH << 16;
-		wr32(E1000_RXDCTL(j), rxdctl);
-	}
-
-	if (adapter->num_rx_queues > 1) {
-		u32 random[10];
-		u32 mrqc;
-		u32 j, shift;
-		union e1000_reta {
-			u32 dword;
-			u8  bytes[4];
-		} reta;
-
-		get_random_bytes(&random[0], 40);
-
-		if (hw->mac.type >= e1000_82576)
-			shift = 0;
-		else
-			shift = 6;
-		for (j = 0; j < (32 * 4); j++) {
-			reta.bytes[j & 3] =
-				adapter->rx_ring[(j % adapter->num_rx_queues)].reg_idx << shift;
-			if ((j & 3) == 3)
-				writel(reta.dword,
-				       hw->hw_addr + E1000_RETA(0) + (j & ~3));
-		}
-		if (adapter->vfs_allocated_count)
-			mrqc = E1000_MRQC_ENABLE_VMDQ_RSS_2Q;
-		else
-			mrqc = E1000_MRQC_ENABLE_RSS_4Q;
-
-		/* Fill out hash function seeds */
-		for (j = 0; j < 10; j++)
-			array_wr32(E1000_RSSRK(0), j, random[j]);
-
-		mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
-			 E1000_MRQC_RSS_FIELD_IPV4_TCP);
-		mrqc |= (E1000_MRQC_RSS_FIELD_IPV6 |
-			 E1000_MRQC_RSS_FIELD_IPV6_TCP);
-		mrqc |= (E1000_MRQC_RSS_FIELD_IPV4_UDP |
-			 E1000_MRQC_RSS_FIELD_IPV6_UDP);
-		mrqc |= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX |
-			 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
-
-		wr32(E1000_MRQC, mrqc);
-	} else if (adapter->vfs_allocated_count) {
-		/* Enable multi-queue for sr-iov */
-		wr32(E1000_MRQC, E1000_MRQC_ENABLE_VMDQ);
-	}
-
-	/* Enable Receive Checksum Offload for TCP and UDP */
-	rxcsum = rd32(E1000_RXCSUM);
-	/* Disable raw packet checksumming */
-	rxcsum |= E1000_RXCSUM_PCSD;
-
-	if (adapter->hw.mac.type == e1000_82576)
-		/* Enable Receive Checksum Offload for SCTP */
-		rxcsum |= E1000_RXCSUM_CRCOFL;
-
-	/* Don't need to set TUOFL or IPOFL, they default to 1 */
-	wr32(E1000_RXCSUM, rxcsum);
-
-	/* Set the default pool for the PF's first queue */
-	igb_configure_vt_default_pool(adapter);
-
-	igb_rlpml_set(adapter);
-
-	/* Enable Receives */
-	wr32(E1000_RCTL, rctl);
+	for (i = 0; i < adapter->num_rx_queues; i++)
+		igb_configure_rx_ring(adapter, &adapter->rx_ring[i]);
 }
 
 /**
@@ -2312,14 +2607,17 @@
  **/
 void igb_free_tx_resources(struct igb_ring *tx_ring)
 {
-	struct pci_dev *pdev = tx_ring->adapter->pdev;
-
 	igb_clean_tx_ring(tx_ring);
 
 	vfree(tx_ring->buffer_info);
 	tx_ring->buffer_info = NULL;
 
-	pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
+	/* if not set, then don't free */
+	if (!tx_ring->desc)
+		return;
+
+	pci_free_consistent(tx_ring->pdev, tx_ring->size,
+	                    tx_ring->desc, tx_ring->dma);
 
 	tx_ring->desc = NULL;
 }
@@ -2338,18 +2636,30 @@
 		igb_free_tx_resources(&adapter->tx_ring[i]);
 }
 
-static void igb_unmap_and_free_tx_resource(struct igb_adapter *adapter,
-					   struct igb_buffer *buffer_info)
+void igb_unmap_and_free_tx_resource(struct igb_ring *tx_ring,
+				    struct igb_buffer *buffer_info)
 {
-	buffer_info->dma = 0;
+	if (buffer_info->dma) {
+		if (buffer_info->mapped_as_page)
+			pci_unmap_page(tx_ring->pdev,
+					buffer_info->dma,
+					buffer_info->length,
+					PCI_DMA_TODEVICE);
+		else
+			pci_unmap_single(tx_ring->pdev,
+					buffer_info->dma,
+					buffer_info->length,
+					PCI_DMA_TODEVICE);
+		buffer_info->dma = 0;
+	}
 	if (buffer_info->skb) {
-		skb_dma_unmap(&adapter->pdev->dev, buffer_info->skb,
-		              DMA_TO_DEVICE);
 		dev_kfree_skb_any(buffer_info->skb);
 		buffer_info->skb = NULL;
 	}
 	buffer_info->time_stamp = 0;
-	/* buffer_info must be completely set up in the transmit path */
+	buffer_info->length = 0;
+	buffer_info->next_to_watch = 0;
+	buffer_info->mapped_as_page = false;
 }
 
 /**
@@ -2358,7 +2668,6 @@
  **/
 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
 {
-	struct igb_adapter *adapter = tx_ring->adapter;
 	struct igb_buffer *buffer_info;
 	unsigned long size;
 	unsigned int i;
@@ -2369,21 +2678,17 @@
 
 	for (i = 0; i < tx_ring->count; i++) {
 		buffer_info = &tx_ring->buffer_info[i];
-		igb_unmap_and_free_tx_resource(adapter, buffer_info);
+		igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
 	}
 
 	size = sizeof(struct igb_buffer) * tx_ring->count;
 	memset(tx_ring->buffer_info, 0, size);
 
 	/* Zero out the descriptor ring */
-
 	memset(tx_ring->desc, 0, tx_ring->size);
 
 	tx_ring->next_to_use = 0;
 	tx_ring->next_to_clean = 0;
-
-	writel(0, adapter->hw.hw_addr + tx_ring->head);
-	writel(0, adapter->hw.hw_addr + tx_ring->tail);
 }
 
 /**
@@ -2406,14 +2711,17 @@
  **/
 void igb_free_rx_resources(struct igb_ring *rx_ring)
 {
-	struct pci_dev *pdev = rx_ring->adapter->pdev;
-
 	igb_clean_rx_ring(rx_ring);
 
 	vfree(rx_ring->buffer_info);
 	rx_ring->buffer_info = NULL;
 
-	pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
+	/* if not set, then don't free */
+	if (!rx_ring->desc)
+		return;
+
+	pci_free_consistent(rx_ring->pdev, rx_ring->size,
+	                    rx_ring->desc, rx_ring->dma);
 
 	rx_ring->desc = NULL;
 }
@@ -2438,26 +2746,21 @@
  **/
 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
 {
-	struct igb_adapter *adapter = rx_ring->adapter;
 	struct igb_buffer *buffer_info;
-	struct pci_dev *pdev = adapter->pdev;
 	unsigned long size;
 	unsigned int i;
 
 	if (!rx_ring->buffer_info)
 		return;
+
 	/* Free all the Rx ring sk_buffs */
 	for (i = 0; i < rx_ring->count; i++) {
 		buffer_info = &rx_ring->buffer_info[i];
 		if (buffer_info->dma) {
-			if (adapter->rx_ps_hdr_size)
-				pci_unmap_single(pdev, buffer_info->dma,
-						 adapter->rx_ps_hdr_size,
-						 PCI_DMA_FROMDEVICE);
-			else
-				pci_unmap_single(pdev, buffer_info->dma,
-						 adapter->rx_buffer_len,
-						 PCI_DMA_FROMDEVICE);
+			pci_unmap_single(rx_ring->pdev,
+			                 buffer_info->dma,
+					 rx_ring->rx_buffer_len,
+					 PCI_DMA_FROMDEVICE);
 			buffer_info->dma = 0;
 		}
 
@@ -2465,14 +2768,16 @@
 			dev_kfree_skb(buffer_info->skb);
 			buffer_info->skb = NULL;
 		}
+		if (buffer_info->page_dma) {
+			pci_unmap_page(rx_ring->pdev,
+			               buffer_info->page_dma,
+				       PAGE_SIZE / 2,
+				       PCI_DMA_FROMDEVICE);
+			buffer_info->page_dma = 0;
+		}
 		if (buffer_info->page) {
-			if (buffer_info->page_dma)
-				pci_unmap_page(pdev, buffer_info->page_dma,
-					       PAGE_SIZE / 2,
-					       PCI_DMA_FROMDEVICE);
 			put_page(buffer_info->page);
 			buffer_info->page = NULL;
-			buffer_info->page_dma = 0;
 			buffer_info->page_offset = 0;
 		}
 	}
@@ -2483,48 +2788,135 @@
 	/* Zero out the descriptor ring */
 	memset(rx_ring->desc, 0, rx_ring->size);
 
-	rx_ring->next_to_clean = 0;
-	rx_ring->next_to_use = 0;
+	rx_ring->next_to_clean = 0;
+	rx_ring->next_to_use = 0;
+}
+
+/**
+ * igb_clean_all_rx_rings - Free Rx Buffers for all queues
+ * @adapter: board private structure
+ **/
+static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
+{
+	int i;
+
+	for (i = 0; i < adapter->num_rx_queues; i++)
+		igb_clean_rx_ring(&adapter->rx_ring[i]);
+}
+
+/**
+ * igb_set_mac - Change the Ethernet Address of the NIC
+ * @netdev: network interface device structure
+ * @p: pointer to an address structure
+ *
+ * Returns 0 on success, negative on failure
+ **/
+static int igb_set_mac(struct net_device *netdev, void *p)
+{
+	struct igb_adapter *adapter = netdev_priv(netdev);
+	struct e1000_hw *hw = &adapter->hw;
+	struct sockaddr *addr = p;
+
+	if (!is_valid_ether_addr(addr->sa_data))
+		return -EADDRNOTAVAIL;
+
+	memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
+	memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
+
+	/* set the correct pool for the new PF MAC address in entry 0 */
+	igb_rar_set_qsel(adapter, hw->mac.addr, 0,
+	                 adapter->vfs_allocated_count);
+
+	return 0;
+}
+
+/**
+ * igb_write_mc_addr_list - write multicast addresses to MTA
+ * @netdev: network interface device structure
+ *
+ * Writes multicast address list to the MTA hash table.
+ * Returns: -ENOMEM on failure
+ *                0 on no addresses written
+ *                X on writing X addresses to MTA
+ **/
+static int igb_write_mc_addr_list(struct net_device *netdev)
+{
+	struct igb_adapter *adapter = netdev_priv(netdev);
+	struct e1000_hw *hw = &adapter->hw;
+	struct dev_mc_list *mc_ptr = netdev->mc_list;
+	u8  *mta_list;
+	u32 vmolr = 0;
+	int i;
+
+	if (!netdev->mc_count) {
+		/* nothing to program, so clear mc list */
+		igb_update_mc_addr_list(hw, NULL, 0);
+		igb_restore_vf_multicasts(adapter);
+		return 0;
+	}
+
+	mta_list = kzalloc(netdev->mc_count * 6, GFP_ATOMIC);
+	if (!mta_list)
+		return -ENOMEM;
+
+	/* set vmolr receive overflow multicast bit */
+	vmolr |= E1000_VMOLR_ROMPE;
 
-	writel(0, adapter->hw.hw_addr + rx_ring->head);
-	writel(0, adapter->hw.hw_addr + rx_ring->tail);
-}
+	/* The shared function expects a packed array of only addresses. */
+	mc_ptr = netdev->mc_list;
 
-/**
- * igb_clean_all_rx_rings - Free Rx Buffers for all queues
- * @adapter: board private structure
- **/
-static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
-{
-	int i;
+	for (i = 0; i < netdev->mc_count; i++) {
+		if (!mc_ptr)
+			break;
+		memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr, ETH_ALEN);
+		mc_ptr = mc_ptr->next;
+	}
+	igb_update_mc_addr_list(hw, mta_list, i);
+	kfree(mta_list);
 
-	for (i = 0; i < adapter->num_rx_queues; i++)
-		igb_clean_rx_ring(&adapter->rx_ring[i]);
+	return netdev->mc_count;
 }
 
 /**
- * igb_set_mac - Change the Ethernet Address of the NIC
+ * igb_write_uc_addr_list - write unicast addresses to RAR table
  * @netdev: network interface device structure
- * @p: pointer to an address structure
  *
- * Returns 0 on success, negative on failure
+ * Writes unicast address list to the RAR table.
+ * Returns: -ENOMEM on failure/insufficient address space
+ *                0 on no addresses written
+ *                X on writing X addresses to the RAR table
  **/
-static int igb_set_mac(struct net_device *netdev, void *p)
+static int igb_write_uc_addr_list(struct net_device *netdev)
 {
 	struct igb_adapter *adapter = netdev_priv(netdev);
 	struct e1000_hw *hw = &adapter->hw;
-	struct sockaddr *addr = p;
-
-	if (!is_valid_ether_addr(addr->sa_data))
-		return -EADDRNOTAVAIL;
+	unsigned int vfn = adapter->vfs_allocated_count;
+	unsigned int rar_entries = hw->mac.rar_entry_count - (vfn + 1);
+	int count = 0;
 
-	memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
-	memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
+	/* return ENOMEM indicating insufficient memory for addresses */
+	if (netdev->uc.count > rar_entries)
+		return -ENOMEM;
 
-	igb_rar_set(hw, hw->mac.addr, 0);
-	igb_set_rah_pool(hw, adapter->vfs_allocated_count, 0);
+	if (netdev->uc.count && rar_entries) {
+		struct netdev_hw_addr *ha;
+		list_for_each_entry(ha, &netdev->uc.list, list) {
+			if (!rar_entries)
+				break;
+			igb_rar_set_qsel(adapter, ha->addr,
+			                 rar_entries--,
+			                 vfn);
+			count++;
+		}
+	}
+	/* write the addresses in reverse order to avoid write combining */
+	for (; rar_entries > 0 ; rar_entries--) {
+		wr32(E1000_RAH(rar_entries), 0);
+		wr32(E1000_RAL(rar_entries), 0);
+	}
+	wrfl();
 
-	return 0;
+	return count;
 }
 
 /**
@@ -2540,74 +2932,63 @@
 {
 	struct igb_adapter *adapter = netdev_priv(netdev);
 	struct e1000_hw *hw = &adapter->hw;
-	unsigned int rar_entries = hw->mac.rar_entry_count -
-	                           (adapter->vfs_allocated_count + 1);
-	struct dev_mc_list *mc_ptr = netdev->mc_list;
-	u8  *mta_list = NULL;
-	u32 rctl;
-	int i;
+	unsigned int vfn = adapter->vfs_allocated_count;
+	u32 rctl, vmolr = 0;
+	int count;
 
 	/* Check for Promiscuous and All Multicast modes */
 	rctl = rd32(E1000_RCTL);
 
+	/* clear the effected bits */
+	rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_VFE);
+
 	if (netdev->flags & IFF_PROMISC) {
 		rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
-		rctl &= ~E1000_RCTL_VFE;
+		vmolr |= (E1000_VMOLR_ROPE | E1000_VMOLR_MPME);
 	} else {
-		if (netdev->flags & IFF_ALLMULTI)
+		if (netdev->flags & IFF_ALLMULTI) {
 			rctl |= E1000_RCTL_MPE;
-		else
-			rctl &= ~E1000_RCTL_MPE;
-
-		if (netdev->uc.count > rar_entries)
+			vmolr |= E1000_VMOLR_MPME;
+		} else {
+			/*
+			 * Write addresses to the MTA, if the attempt fails
+			 * then we should just turn on promiscous mode so
+			 * that we can at least receive multicast traffic
+			 */
+			count = igb_write_mc_addr_list(netdev);
+			if (count < 0) {
+				rctl |= E1000_RCTL_MPE;
+				vmolr |= E1000_VMOLR_MPME;
+			} else if (count) {
+				vmolr |= E1000_VMOLR_ROMPE;
+			}
+		}
+		/*
+		 * Write addresses to available RAR registers, if there is not
+		 * sufficient space to store all the addresses then enable
+		 * unicast promiscous mode
+		 */
+		count = igb_write_uc_addr_list(netdev);
+		if (count < 0) {
 			rctl |= E1000_RCTL_UPE;
-		else
-			rctl &= ~E1000_RCTL_UPE;
+			vmolr |= E1000_VMOLR_ROPE;
+		}
 		rctl |= E1000_RCTL_VFE;
 	}
 	wr32(E1000_RCTL, rctl);
 
-	if (netdev->uc.count && rar_entries) {
-		struct netdev_hw_addr *ha;
-		list_for_each_entry(ha, &netdev->uc.list, list) {
-			if (!rar_entries)
-				break;
-			igb_rar_set(hw, ha->addr, rar_entries);
-			igb_set_rah_pool(hw, adapter->vfs_allocated_count,
-			                 rar_entries);
-			rar_entries--;
-		}
-	}
-	/* write the addresses in reverse order to avoid write combining */
-	for (; rar_entries > 0 ; rar_entries--) {
-		wr32(E1000_RAH(rar_entries), 0);
-		wr32(E1000_RAL(rar_entries), 0);
-	}
-	wrfl();
-
-	if (!netdev->mc_count) {
-		/* nothing to program, so clear mc list */
-		igb_update_mc_addr_list(hw, NULL, 0);
-		igb_restore_vf_multicasts(adapter);
-		return;
-	}
-
-	mta_list = kzalloc(netdev->mc_count * 6, GFP_ATOMIC);
-	if (!mta_list) {
-		dev_err(&adapter->pdev->dev,
-		        "failed to allocate multicast filter list\n");
+	/*
+	 * In order to support SR-IOV and eventually VMDq it is necessary to set
+	 * the VMOLR to enable the appropriate modes.  Without this workaround
+	 * we will have issues with VLAN tag stripping not being done for frames
+	 * that are only arriving because we are the default pool
+	 */
+	if (hw->mac.type < e1000_82576)
 		return;
-	}
 
-	/* The shared function expects a packed array of only addresses. */
-	for (i = 0; i < netdev->mc_count; i++) {
-		if (!mc_ptr)
-			break;
-		memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr, ETH_ALEN);
-		mc_ptr = mc_ptr->next;
-	}
-	igb_update_mc_addr_list(hw, mta_list, i);
-	kfree(mta_list);
+	vmolr |= rd32(E1000_VMOLR(vfn)) &
+	         ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
+	wr32(E1000_VMOLR(vfn), vmolr);
 	igb_restore_vf_multicasts(adapter);
 }
 
@@ -2669,37 +3050,33 @@
 static void igb_watchdog_task(struct work_struct *work)
 {
 	struct igb_adapter *adapter = container_of(work,
-					struct igb_adapter, watchdog_task);
+	                                           struct igb_adapter,
+                                                   watchdog_task);
 	struct e1000_hw *hw = &adapter->hw;
 	struct net_device *netdev = adapter->netdev;
-	struct igb_ring *tx_ring = adapter->tx_ring;
 	u32 link;
-	u32 eics = 0;
 	int i;
 
 	link = igb_has_link(adapter);
-	if ((netif_carrier_ok(netdev)) && link)
-		goto link_up;
-
 	if (link) {
 		if (!netif_carrier_ok(netdev)) {
 			u32 ctrl;
-			hw->mac.ops.get_speed_and_duplex(&adapter->hw,
-						   &adapter->link_speed,
-						   &adapter->link_duplex);
+			hw->mac.ops.get_speed_and_duplex(hw,
+			                                 &adapter->link_speed,
+			                                 &adapter->link_duplex);
 
 			ctrl = rd32(E1000_CTRL);
 			/* Links status message must follow this format */
 			printk(KERN_INFO "igb: %s NIC Link is Up %d Mbps %s, "
 				 "Flow Control: %s\n",
-			         netdev->name,
-				 adapter->link_speed,
-				 adapter->link_duplex == FULL_DUPLEX ?
+			       netdev->name,
+			       adapter->link_speed,
+			       adapter->link_duplex == FULL_DUPLEX ?
 				 "Full Duplex" : "Half Duplex",
-				 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
-				 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
-				 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
-				 E1000_CTRL_TFCE) ? "TX" : "None")));
+			       ((ctrl & E1000_CTRL_TFCE) &&
+			        (ctrl & E1000_CTRL_RFCE)) ? "RX/TX" :
+			       ((ctrl & E1000_CTRL_RFCE) ?  "RX" :
+			       ((ctrl & E1000_CTRL_TFCE) ?  "TX" : "None")));
 
 			/* tweak tx_queue_len according to speed/duplex and
 			 * adjust the timeout factor */
@@ -2743,46 +3120,40 @@
 		}
 	}
 
-link_up:
 	igb_update_stats(adapter);
+	igb_update_adaptive(hw);
 
-	hw->mac.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
-	adapter->tpt_old = adapter->stats.tpt;
-	hw->mac.collision_delta = adapter->stats.colc - adapter->colc_old;
-	adapter->colc_old = adapter->stats.colc;
-
-	adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
-	adapter->gorc_old = adapter->stats.gorc;
-	adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
-	adapter->gotc_old = adapter->stats.gotc;
-
-	igb_update_adaptive(&adapter->hw);
-
-	if (!netif_carrier_ok(netdev)) {
-		if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
+	for (i = 0; i < adapter->num_tx_queues; i++) {
+		struct igb_ring *tx_ring = &adapter->tx_ring[i];
+		if (!netif_carrier_ok(netdev)) {
 			/* We've lost link, so the controller stops DMA,
 			 * but we've got queued Tx work that's never going
 			 * to get done, so reset controller to flush Tx.
 			 * (Do the reset outside of interrupt context). */
-			adapter->tx_timeout_count++;
-			schedule_work(&adapter->reset_task);
-			/* return immediately since reset is imminent */
-			return;
+			if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
+				adapter->tx_timeout_count++;
+				schedule_work(&adapter->reset_task);
+				/* return immediately since reset is imminent */
+				return;
+			}
 		}
+
+		/* Force detection of hung controller every watchdog period */
+		tx_ring->detect_tx_hung = true;
 	}
 
 	/* Cause software interrupt to ensure rx ring is cleaned */
 	if (adapter->msix_entries) {
-		for (i = 0; i < adapter->num_rx_queues; i++)
-			eics |= adapter->rx_ring[i].eims_value;
+		u32 eics = 0;
+		for (i = 0; i < adapter->num_q_vectors; i++) {
+			struct igb_q_vector *q_vector = adapter->q_vector[i];
+			eics |= q_vector->eims_value;
+		}
 		wr32(E1000_EICS, eics);
 	} else {
 		wr32(E1000_ICS, E1000_ICS_RXDMT0);
 	}
 
-	/* Force detection of hung controller every watchdog period */
-	tx_ring->detect_tx_hung = true;
-
 	/* Reset the timer */
 	if (!test_bit(__IGB_DOWN, &adapter->state))
 		mod_timer(&adapter->watchdog_timer,
@@ -2796,7 +3167,6 @@
 	latency_invalid = 255
 };
 
-
 /**
  * igb_update_ring_itr - update the dynamic ITR value based on packet size
  *
@@ -2811,25 +3181,37 @@
  *      parameter (see igb_param.c)
  *      NOTE:  This function is called only when operating in a multiqueue
  *             receive environment.
- * @rx_ring: pointer to ring
+ * @q_vector: pointer to q_vector
  **/
-static void igb_update_ring_itr(struct igb_ring *rx_ring)
+static void igb_update_ring_itr(struct igb_q_vector *q_vector)
 {
-	int new_val = rx_ring->itr_val;
+	int new_val = q_vector->itr_val;
 	int avg_wire_size = 0;
-	struct igb_adapter *adapter = rx_ring->adapter;
-
-	if (!rx_ring->total_packets)
-		goto clear_counts; /* no packets, so don't do anything */
+	struct igb_adapter *adapter = q_vector->adapter;
 
 	/* For non-gigabit speeds, just fix the interrupt rate at 4000
 	 * ints/sec - ITR timer value of 120 ticks.
 	 */
 	if (adapter->link_speed != SPEED_1000) {
-		new_val = 120;
+		new_val = 976;
 		goto set_itr_val;
 	}
-	avg_wire_size = rx_ring->total_bytes / rx_ring->total_packets;
+
+	if (q_vector->rx_ring && q_vector->rx_ring->total_packets) {
+		struct igb_ring *ring = q_vector->rx_ring;
+		avg_wire_size = ring->total_bytes / ring->total_packets;
+	}
+
+	if (q_vector->tx_ring && q_vector->tx_ring->total_packets) {
+		struct igb_ring *ring = q_vector->tx_ring;
+		avg_wire_size = max_t(u32, avg_wire_size,
+		                      (ring->total_bytes /
+		                       ring->total_packets));
+	}
+
+	/* if avg_wire_size isn't set no work was done */
+	if (!avg_wire_size)
+		goto clear_counts;
 
 	/* Add 24 bytes to size to account for CRC, preamble, and gap */
 	avg_wire_size += 24;
@@ -2844,13 +3226,19 @@
 		new_val = avg_wire_size / 2;
 
 set_itr_val:
-	if (new_val != rx_ring->itr_val) {
-		rx_ring->itr_val = new_val;
-		rx_ring->set_itr = 1;
+	if (new_val != q_vector->itr_val) {
+		q_vector->itr_val = new_val;
+		q_vector->set_itr = 1;
 	}
 clear_counts:
-	rx_ring->total_bytes = 0;
-	rx_ring->total_packets = 0;
+	if (q_vector->rx_ring) {
+		q_vector->rx_ring->total_bytes = 0;
+		q_vector->rx_ring->total_packets = 0;
+	}
+	if (q_vector->tx_ring) {
+		q_vector->tx_ring->total_bytes = 0;
+		q_vector->tx_ring->total_packets = 0;
+	}
 }
 
 /**
@@ -2867,7 +3255,7 @@
  *      NOTE:  These calculations are only valid when operating in a single-
  *             queue environment.
  * @adapter: pointer to adapter
- * @itr_setting: current adapter->itr
+ * @itr_setting: current q_vector->itr_val
  * @packets: the number of packets during this measurement interval
  * @bytes: the number of bytes during this measurement interval
  **/
@@ -2919,8 +3307,9 @@
 
 static void igb_set_itr(struct igb_adapter *adapter)
 {
+	struct igb_q_vector *q_vector = adapter->q_vector[0];
 	u16 current_itr;
-	u32 new_itr = adapter->itr;
+	u32 new_itr = q_vector->itr_val;
 
 	/* for non-gigabit speeds, just fix the interrupt rate at 4000 */
 	if (adapter->link_speed != SPEED_1000) {
@@ -2934,18 +3323,14 @@
 				    adapter->rx_ring->total_packets,
 				    adapter->rx_ring->total_bytes);
 
-	if (adapter->rx_ring->buddy) {
-		adapter->tx_itr = igb_update_itr(adapter,
-					    adapter->tx_itr,
-					    adapter->tx_ring->total_packets,
-					    adapter->tx_ring->total_bytes);
-		current_itr = max(adapter->rx_itr, adapter->tx_itr);
-	} else {
-		current_itr = adapter->rx_itr;
-	}
+	adapter->tx_itr = igb_update_itr(adapter,
+				    adapter->tx_itr,
+				    adapter->tx_ring->total_packets,
+				    adapter->tx_ring->total_bytes);
+	current_itr = max(adapter->rx_itr, adapter->tx_itr);
 
 	/* conservative mode (itr 3) eliminates the lowest_latency setting */
-	if (adapter->itr_setting == 3 && current_itr == lowest_latency)
+	if (adapter->rx_itr_setting == 3 && current_itr == lowest_latency)
 		current_itr = low_latency;
 
 	switch (current_itr) {
@@ -2966,18 +3351,17 @@
 set_itr_now:
 	adapter->rx_ring->total_bytes = 0;
 	adapter->rx_ring->total_packets = 0;
-	if (adapter->rx_ring->buddy) {
-		adapter->rx_ring->buddy->total_bytes = 0;
-		adapter->rx_ring->buddy->total_packets = 0;
-	}
+	adapter->tx_ring->total_bytes = 0;
+	adapter->tx_ring->total_packets = 0;
 
-	if (new_itr != adapter->itr) {
+	if (new_itr != q_vector->itr_val) {
 		/* this attempts to bias the interrupt rate towards Bulk
 		 * by adding intermediate steps when interrupt rate is
 		 * increasing */
-		new_itr = new_itr > adapter->itr ?
-			     max((new_itr * adapter->itr) /
-			         (new_itr + (adapter->itr >> 2)), new_itr) :
+		new_itr = new_itr > q_vector->itr_val ?
+		             max((new_itr * q_vector->itr_val) /
+		                 (new_itr + (q_vector->itr_val >> 2)),
+		                 new_itr) :
 			     new_itr;
 		/* Don't write the value here; it resets the adapter's
 		 * internal timer, and causes us to delay far longer than
@@ -2985,25 +3369,22 @@
 		 * value at the beginning of the next interrupt so the timing
 		 * ends up being correct.
 		 */
-		adapter->itr = new_itr;
-		adapter->rx_ring->itr_val = new_itr;
-		adapter->rx_ring->set_itr = 1;
+		q_vector->itr_val = new_itr;
+		q_vector->set_itr = 1;
 	}
 
 	return;
 }
 
-
 #define IGB_TX_FLAGS_CSUM		0x00000001
 #define IGB_TX_FLAGS_VLAN		0x00000002
 #define IGB_TX_FLAGS_TSO		0x00000004
 #define IGB_TX_FLAGS_IPV4		0x00000008
-#define IGB_TX_FLAGS_TSTAMP             0x00000010
-#define IGB_TX_FLAGS_VLAN_MASK	0xffff0000
-#define IGB_TX_FLAGS_VLAN_SHIFT	16
+#define IGB_TX_FLAGS_TSTAMP		0x00000010
+#define IGB_TX_FLAGS_VLAN_MASK		0xffff0000
+#define IGB_TX_FLAGS_VLAN_SHIFT		        16
 
-static inline int igb_tso_adv(struct igb_adapter *adapter,
-			      struct igb_ring *tx_ring,
+static inline int igb_tso_adv(struct igb_ring *tx_ring,
 			      struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
 {
 	struct e1000_adv_tx_context_desc *context_desc;
@@ -3065,8 +3446,8 @@
 	mss_l4len_idx |= (l4len << E1000_ADVTXD_L4LEN_SHIFT);
 
 	/* For 82575, context index must be unique per ring. */
-	if (adapter->flags & IGB_FLAG_NEED_CTX_IDX)
-		mss_l4len_idx |= tx_ring->queue_index << 4;
+	if (tx_ring->flags & IGB_RING_FLAG_TX_CTX_IDX)
+		mss_l4len_idx |= tx_ring->reg_idx << 4;
 
 	context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
 	context_desc->seqnum_seed = 0;
@@ -3083,14 +3464,14 @@
 	return true;
 }
 
-static inline bool igb_tx_csum_adv(struct igb_adapter *adapter,
-					struct igb_ring *tx_ring,
-					struct sk_buff *skb, u32 tx_flags)
+static inline bool igb_tx_csum_adv(struct igb_ring *tx_ring,
+				   struct sk_buff *skb, u32 tx_flags)
 {
 	struct e1000_adv_tx_context_desc *context_desc;
-	unsigned int i;
+	struct pci_dev *pdev = tx_ring->pdev;
 	struct igb_buffer *buffer_info;
 	u32 info = 0, tu_cmd = 0;
+	unsigned int i;
 
 	if ((skb->ip_summed == CHECKSUM_PARTIAL) ||
 	    (tx_flags & IGB_TX_FLAGS_VLAN)) {
@@ -3100,6 +3481,7 @@
 
 		if (tx_flags & IGB_TX_FLAGS_VLAN)
 			info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
+
 		info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
 		if (skb->ip_summed == CHECKSUM_PARTIAL)
 			info |= skb_network_header_len(skb);
@@ -3137,7 +3519,7 @@
 				break;
 			default:
 				if (unlikely(net_ratelimit()))
-					dev_warn(&adapter->pdev->dev,
+					dev_warn(&pdev->dev,
 					    "partial checksum but proto=%x!\n",
 					    skb->protocol);
 				break;
@@ -3146,11 +3528,9 @@
 
 		context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
 		context_desc->seqnum_seed = 0;
-		if (adapter->flags & IGB_FLAG_NEED_CTX_IDX)
+		if (tx_ring->flags & IGB_RING_FLAG_TX_CTX_IDX)
 			context_desc->mss_l4len_idx =
-				cpu_to_le32(tx_ring->queue_index << 4);
-		else
-			context_desc->mss_l4len_idx = 0;
+				cpu_to_le32(tx_ring->reg_idx << 4);
 
 		buffer_info->time_stamp = jiffies;
 		buffer_info->next_to_watch = i;
@@ -3169,36 +3549,32 @@
 #define IGB_MAX_TXD_PWR	16
 #define IGB_MAX_DATA_PER_TXD	(1<<IGB_MAX_TXD_PWR)
 
-static inline int igb_tx_map_adv(struct igb_adapter *adapter,
-				 struct igb_ring *tx_ring, struct sk_buff *skb,
+static inline int igb_tx_map_adv(struct igb_ring *tx_ring, struct sk_buff *skb,
 				 unsigned int first)
 {
 	struct igb_buffer *buffer_info;
+	struct pci_dev *pdev = tx_ring->pdev;
 	unsigned int len = skb_headlen(skb);
 	unsigned int count = 0, i;
 	unsigned int f;
-	dma_addr_t *map;
 
 	i = tx_ring->next_to_use;
 
-	if (skb_dma_map(&adapter->pdev->dev, skb, DMA_TO_DEVICE)) {
-		dev_err(&adapter->pdev->dev, "TX DMA map failed\n");
-		return 0;
-	}
-
-	map = skb_shinfo(skb)->dma_maps;
-
 	buffer_info = &tx_ring->buffer_info[i];
 	BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
 	buffer_info->length = len;
 	/* set time_stamp *before* dma to help avoid a possible race */
 	buffer_info->time_stamp = jiffies;
 	buffer_info->next_to_watch = i;
-	buffer_info->dma = skb_shinfo(skb)->dma_head;
+	buffer_info->dma = pci_map_single(pdev, skb->data, len,
+					  PCI_DMA_TODEVICE);
+	if (pci_dma_mapping_error(pdev, buffer_info->dma))
+		goto dma_error;
 
 	for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) {
 		struct skb_frag_struct *frag;
 
+		count++;
 		i++;
 		if (i == tx_ring->count)
 			i = 0;
@@ -3211,25 +3587,54 @@
 		buffer_info->length = len;
 		buffer_info->time_stamp = jiffies;
 		buffer_info->next_to_watch = i;
-		buffer_info->dma = map[count];
-		count++;
+		buffer_info->mapped_as_page = true;
+		buffer_info->dma = pci_map_page(pdev,
+						frag->page,
+						frag->page_offset,
+						len,
+						PCI_DMA_TODEVICE);
+		if (pci_dma_mapping_error(pdev, buffer_info->dma))
+			goto dma_error;
+
 	}
 
 	tx_ring->buffer_info[i].skb = skb;
 	tx_ring->buffer_info[first].next_to_watch = i;
 
-	return count + 1;
+	return ++count;
+
+dma_error:
+	dev_err(&pdev->dev, "TX DMA map failed\n");
+
+	/* clear timestamp and dma mappings for failed buffer_info mapping */
+	buffer_info->dma = 0;
+	buffer_info->time_stamp = 0;
+	buffer_info->length = 0;
+	buffer_info->next_to_watch = 0;
+	buffer_info->mapped_as_page = false;
+	count--;
+
+	/* clear timestamp and dma mappings for remaining portion of packet */
+	while (count >= 0) {
+		count--;
+		i--;
+		if (i < 0)
+			i += tx_ring->count;
+		buffer_info = &tx_ring->buffer_info[i];
+		igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
+	}
+
+	return 0;
 }
 
-static inline void igb_tx_queue_adv(struct igb_adapter *adapter,
-				    struct igb_ring *tx_ring,
+static inline void igb_tx_queue_adv(struct igb_ring *tx_ring,
 				    int tx_flags, int count, u32 paylen,
 				    u8 hdr_len)
 {
-	union e1000_adv_tx_desc *tx_desc = NULL;
+	union e1000_adv_tx_desc *tx_desc;
 	struct igb_buffer *buffer_info;
 	u32 olinfo_status = 0, cmd_type_len;
-	unsigned int i;
+	unsigned int i = tx_ring->next_to_use;
 
 	cmd_type_len = (E1000_ADVTXD_DTYP_DATA | E1000_ADVTXD_DCMD_IFCS |
 			E1000_ADVTXD_DCMD_DEXT);
@@ -3254,27 +3659,28 @@
 		olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
 	}
 
-	if ((adapter->flags & IGB_FLAG_NEED_CTX_IDX) &&
-	    (tx_flags & (IGB_TX_FLAGS_CSUM | IGB_TX_FLAGS_TSO |
+	if ((tx_ring->flags & IGB_RING_FLAG_TX_CTX_IDX) &&
+	    (tx_flags & (IGB_TX_FLAGS_CSUM |
+	                 IGB_TX_FLAGS_TSO |
 			 IGB_TX_FLAGS_VLAN)))
-		olinfo_status |= tx_ring->queue_index << 4;
+		olinfo_status |= tx_ring->reg_idx << 4;
 
 	olinfo_status |= ((paylen - hdr_len) << E1000_ADVTXD_PAYLEN_SHIFT);
 
-	i = tx_ring->next_to_use;
-	while (count--) {
+	do {
 		buffer_info = &tx_ring->buffer_info[i];
 		tx_desc = E1000_TX_DESC_ADV(*tx_ring, i);
 		tx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
 		tx_desc->read.cmd_type_len =
 			cpu_to_le32(cmd_type_len | buffer_info->length);
 		tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
+		count--;
 		i++;
 		if (i == tx_ring->count)
 			i = 0;
-	}
+	} while (count > 0);
 
-	tx_desc->read.cmd_type_len |= cpu_to_le32(adapter->txd_cmd);
+	tx_desc->read.cmd_type_len |= cpu_to_le32(IGB_ADVTXD_DCMD);
 	/* Force memory writes to complete before letting h/w
 	 * know there are new descriptors to fetch.  (Only
 	 * applicable for weak-ordered memory model archs,
@@ -3282,16 +3688,15 @@
 	wmb();
 
 	tx_ring->next_to_use = i;
-	writel(i, adapter->hw.hw_addr + tx_ring->tail);
+	writel(i, tx_ring->tail);
 	/* we need this if more than one processor can write to our tail
 	 * at a time, it syncronizes IO on IA64/Altix systems */
 	mmiowb();
 }
 
-static int __igb_maybe_stop_tx(struct net_device *netdev,
-			       struct igb_ring *tx_ring, int size)
+static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, int size)
 {
-	struct igb_adapter *adapter = netdev_priv(netdev);
+	struct net_device *netdev = tx_ring->netdev;
 
 	netif_stop_subqueue(netdev, tx_ring->queue_index);
 
@@ -3307,66 +3712,43 @@
 
 	/* A reprieve! */
 	netif_wake_subqueue(netdev, tx_ring->queue_index);
-	++adapter->restart_queue;
+	tx_ring->tx_stats.restart_queue++;
 	return 0;
 }
 
-static int igb_maybe_stop_tx(struct net_device *netdev,
-			     struct igb_ring *tx_ring, int size)
+static int igb_maybe_stop_tx(struct igb_ring *tx_ring, int size)
 {
 	if (igb_desc_unused(tx_ring) >= size)
 		return 0;
-	return __igb_maybe_stop_tx(netdev, tx_ring, size);
+	return __igb_maybe_stop_tx(tx_ring, size);
 }
 
-static netdev_tx_t igb_xmit_frame_ring_adv(struct sk_buff *skb,
-					   struct net_device *netdev,
-					   struct igb_ring *tx_ring)
+netdev_tx_t igb_xmit_frame_ring_adv(struct sk_buff *skb,
+				    struct igb_ring *tx_ring)
 {
-	struct igb_adapter *adapter = netdev_priv(netdev);
+	struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
 	unsigned int first;
 	unsigned int tx_flags = 0;
 	u8 hdr_len = 0;
-	int count = 0;
-	int tso = 0;
-	union skb_shared_tx *shtx;
-
-	if (test_bit(__IGB_DOWN, &adapter->state)) {
-		dev_kfree_skb_any(skb);
-		return NETDEV_TX_OK;
-	}
-
-	if (skb->len <= 0) {
-		dev_kfree_skb_any(skb);
-		return NETDEV_TX_OK;
-	}
+	int tso = 0, count;
+	union skb_shared_tx *shtx = skb_tx(skb);
 
 	/* need: 1 descriptor per page,
 	 *       + 2 desc gap to keep tail from touching head,
 	 *       + 1 desc for skb->data,
 	 *       + 1 desc for context descriptor,
 	 * otherwise try next time */
-	if (igb_maybe_stop_tx(netdev, tx_ring, skb_shinfo(skb)->nr_frags + 4)) {
+	if (igb_maybe_stop_tx(tx_ring, skb_shinfo(skb)->nr_frags + 4)) {
 		/* this is a hard error */
 		return NETDEV_TX_BUSY;
 	}
 
-	/*
-	 * TODO: check that there currently is no other packet with
-	 * time stamping in the queue
-	 *
-	 * When doing time stamping, keep the connection to the socket
-	 * a while longer: it is still needed by skb_hwtstamp_tx(),
-	 * called either in igb_tx_hwtstamp() or by our caller when
-	 * doing software time stamping.
-	 */
-	shtx = skb_tx(skb);
 	if (unlikely(shtx->hardware)) {
 		shtx->in_progress = 1;
 		tx_flags |= IGB_TX_FLAGS_TSTAMP;
 	}
 
-	if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
+	if (vlan_tx_tag_present(skb) && adapter->vlgrp) {
 		tx_flags |= IGB_TX_FLAGS_VLAN;
 		tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
 	}
@@ -3375,37 +3757,38 @@
 		tx_flags |= IGB_TX_FLAGS_IPV4;
 
 	first = tx_ring->next_to_use;
-	tso = skb_is_gso(skb) ? igb_tso_adv(adapter, tx_ring, skb, tx_flags,
-					      &hdr_len) : 0;
+	if (skb_is_gso(skb)) {
+		tso = igb_tso_adv(tx_ring, skb, tx_flags, &hdr_len);
 
-	if (tso < 0) {
-		dev_kfree_skb_any(skb);
-		return NETDEV_TX_OK;
+		if (tso < 0) {
+			dev_kfree_skb_any(skb);
+			return NETDEV_TX_OK;
+		}
 	}
 
 	if (tso)
 		tx_flags |= IGB_TX_FLAGS_TSO;
-	else if (igb_tx_csum_adv(adapter, tx_ring, skb, tx_flags) &&
+	else if (igb_tx_csum_adv(tx_ring, skb, tx_flags) &&
 	         (skb->ip_summed == CHECKSUM_PARTIAL))
 		tx_flags |= IGB_TX_FLAGS_CSUM;
 
 	/*
-	 * count reflects descriptors mapped, if 0 then mapping error
+	 * count reflects descriptors mapped, if 0 or less then mapping error
 	 * has occured and we need to rewind the descriptor queue
 	 */
-	count = igb_tx_map_adv(adapter, tx_ring, skb, first);
-
-	if (count) {
-		igb_tx_queue_adv(adapter, tx_ring, tx_flags, count,
-			         skb->len, hdr_len);
-		/* Make sure there is space in the ring for the next send. */
-		igb_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 4);
-	} else {
+	count = igb_tx_map_adv(tx_ring, skb, first);
+	if (!count) {
 		dev_kfree_skb_any(skb);
 		tx_ring->buffer_info[first].time_stamp = 0;
 		tx_ring->next_to_use = first;
+		return NETDEV_TX_OK;
 	}
 
+	igb_tx_queue_adv(tx_ring, tx_flags, count, skb->len, hdr_len);
+
+	/* Make sure there is space in the ring for the next send. */
+	igb_maybe_stop_tx(tx_ring, MAX_SKB_FRAGS + 4);
+
 	return NETDEV_TX_OK;
 }
 
@@ -3414,8 +3797,18 @@
 {
 	struct igb_adapter *adapter = netdev_priv(netdev);
 	struct igb_ring *tx_ring;
-
 	int r_idx = 0;
+
+	if (test_bit(__IGB_DOWN, &adapter->state)) {
+		dev_kfree_skb_any(skb);
+		return NETDEV_TX_OK;
+	}
+
+	if (skb->len <= 0) {
+		dev_kfree_skb_any(skb);
+		return NETDEV_TX_OK;
+	}
+
 	r_idx = skb->queue_mapping & (IGB_ABS_MAX_TX_QUEUES - 1);
 	tx_ring = adapter->multi_tx_table[r_idx];
 
@@ -3423,7 +3816,7 @@
 	 * to a flow.  Right now, performance is impacted slightly negatively
 	 * if using multiple tx queues.  If the stack breaks away from a
 	 * single qdisc implementation, we can look at this again. */
-	return igb_xmit_frame_ring_adv(skb, netdev, tx_ring);
+	return igb_xmit_frame_ring_adv(skb, tx_ring);
 }
 
 /**
@@ -3437,6 +3830,10 @@
 
 	/* Do the reset outside of interrupt context */
 	adapter->tx_timeout_count++;
+
+	if (hw->mac.type == e1000_82580)
+		hw->dev_spec._82575.global_device_reset = true;
+
 	schedule_work(&adapter->reset_task);
 	wr32(E1000_EICS,
 	     (adapter->eims_enable_mask & ~adapter->eims_other));
@@ -3459,10 +3856,8 @@
  **/
 static struct net_device_stats *igb_get_stats(struct net_device *netdev)
 {
-	struct igb_adapter *adapter = netdev_priv(netdev);
-
 	/* only return the current stats */
-	return &adapter->net_stats;
+	return &netdev->stats;
 }
 
 /**
@@ -3475,16 +3870,17 @@
 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
 {
 	struct igb_adapter *adapter = netdev_priv(netdev);
+	struct pci_dev *pdev = adapter->pdev;
 	int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
+	u32 rx_buffer_len, i;
 
-	if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
-	    (max_frame > MAX_JUMBO_FRAME_SIZE)) {
-		dev_err(&adapter->pdev->dev, "Invalid MTU setting\n");
+	if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
+		dev_err(&pdev->dev, "Invalid MTU setting\n");
 		return -EINVAL;
 	}
 
 	if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
-		dev_err(&adapter->pdev->dev, "MTU > 9216 not supported.\n");
+		dev_err(&pdev->dev, "MTU > 9216 not supported.\n");
 		return -EINVAL;
 	}
 
@@ -3493,8 +3889,6 @@
 
 	/* igb_down has a dependency on max_frame_size */
 	adapter->max_frame_size = max_frame;
-	if (netif_running(netdev))
-		igb_down(adapter);
 
 	/* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
 	 * means we reserve 2 more, this pushes us to allocate from the next
@@ -3502,35 +3896,23 @@
 	 * i.e. RXBUFFER_2048 --> size-4096 slab
 	 */
 
-	if (max_frame <= IGB_RXBUFFER_256)
-		adapter->rx_buffer_len = IGB_RXBUFFER_256;
-	else if (max_frame <= IGB_RXBUFFER_512)
-		adapter->rx_buffer_len = IGB_RXBUFFER_512;
-	else if (max_frame <= IGB_RXBUFFER_1024)
-		adapter->rx_buffer_len = IGB_RXBUFFER_1024;
-	else if (max_frame <= IGB_RXBUFFER_2048)
-		adapter->rx_buffer_len = IGB_RXBUFFER_2048;
+	if (max_frame <= IGB_RXBUFFER_1024)
+		rx_buffer_len = IGB_RXBUFFER_1024;
+	else if (max_frame <= MAXIMUM_ETHERNET_VLAN_SIZE)
+		rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
 	else
-#if (PAGE_SIZE / 2) > IGB_RXBUFFER_16384
-		adapter->rx_buffer_len = IGB_RXBUFFER_16384;
-#else
-		adapter->rx_buffer_len = PAGE_SIZE / 2;
-#endif
+		rx_buffer_len = IGB_RXBUFFER_128;
 
-	/* if sr-iov is enabled we need to force buffer size to 1K or larger */
-	if (adapter->vfs_allocated_count &&
-	    (adapter->rx_buffer_len < IGB_RXBUFFER_1024))
-		adapter->rx_buffer_len = IGB_RXBUFFER_1024;
-
-	/* adjust allocation if LPE protects us, and we aren't using SBP */
-	if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
-	     (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE))
-		adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
+	if (netif_running(netdev))
+		igb_down(adapter);
 
-	dev_info(&adapter->pdev->dev, "changing MTU from %d to %d\n",
+	dev_info(&pdev->dev, "changing MTU from %d to %d\n",
 		 netdev->mtu, new_mtu);
 	netdev->mtu = new_mtu;
 
+	for (i = 0; i < adapter->num_rx_queues; i++)
+		adapter->rx_ring[i].rx_buffer_len = rx_buffer_len;
+
 	if (netif_running(netdev))
 		igb_up(adapter);
 	else
@@ -3548,9 +3930,13 @@
 
 void igb_update_stats(struct igb_adapter *adapter)
 {
+	struct net_device_stats *net_stats = igb_get_stats(adapter->netdev);
 	struct e1000_hw *hw = &adapter->hw;
 	struct pci_dev *pdev = adapter->pdev;
+	u32 rnbc;
 	u16 phy_tmp;
+	int i;
+	u64 bytes, packets;
 
 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
 
@@ -3563,6 +3949,29 @@
 	if (pci_channel_offline(pdev))
 		return;
 
+	bytes = 0;
+	packets = 0;
+	for (i = 0; i < adapter->num_rx_queues; i++) {
+		u32 rqdpc_tmp = rd32(E1000_RQDPC(i)) & 0x0FFF;
+		adapter->rx_ring[i].rx_stats.drops += rqdpc_tmp;
+		net_stats->rx_fifo_errors += rqdpc_tmp;
+		bytes += adapter->rx_ring[i].rx_stats.bytes;
+		packets += adapter->rx_ring[i].rx_stats.packets;
+	}
+
+	net_stats->rx_bytes = bytes;
+	net_stats->rx_packets = packets;
+
+	bytes = 0;
+	packets = 0;
+	for (i = 0; i < adapter->num_tx_queues; i++) {
+		bytes += adapter->tx_ring[i].tx_stats.bytes;
+		packets += adapter->tx_ring[i].tx_stats.packets;
+	}
+	net_stats->tx_bytes = bytes;
+	net_stats->tx_packets = packets;
+
+	/* read stats registers */
 	adapter->stats.crcerrs += rd32(E1000_CRCERRS);
 	adapter->stats.gprc += rd32(E1000_GPRC);
 	adapter->stats.gorc += rd32(E1000_GORCL);
@@ -3595,7 +4004,9 @@
 	adapter->stats.gptc += rd32(E1000_GPTC);
 	adapter->stats.gotc += rd32(E1000_GOTCL);
 	rd32(E1000_GOTCH); /* clear GOTCL */
-	adapter->stats.rnbc += rd32(E1000_RNBC);
+	rnbc = rd32(E1000_RNBC);
+	adapter->stats.rnbc += rnbc;
+	net_stats->rx_fifo_errors += rnbc;
 	adapter->stats.ruc += rd32(E1000_RUC);
 	adapter->stats.rfc += rd32(E1000_RFC);
 	adapter->stats.rjc += rd32(E1000_RJC);
@@ -3614,7 +4025,6 @@
 	adapter->stats.bptc += rd32(E1000_BPTC);
 
 	/* used for adaptive IFS */
-
 	hw->mac.tx_packet_delta = rd32(E1000_TPT);
 	adapter->stats.tpt += hw->mac.tx_packet_delta;
 	hw->mac.collision_delta = rd32(E1000_COLC);
@@ -3637,56 +4047,29 @@
 	adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
 
 	/* Fill out the OS statistics structure */
-	adapter->net_stats.multicast = adapter->stats.mprc;
-	adapter->net_stats.collisions = adapter->stats.colc;
+	net_stats->multicast = adapter->stats.mprc;
+	net_stats->collisions = adapter->stats.colc;
 
 	/* Rx Errors */
 
-	if (hw->mac.type != e1000_82575) {
-		u32 rqdpc_tmp;
-		u64 rqdpc_total = 0;
-		int i;
-		/* Read out drops stats per RX queue.  Notice RQDPC (Receive
-		 * Queue Drop Packet Count) stats only gets incremented, if
-		 * the DROP_EN but it set (in the SRRCTL register for that
-		 * queue).  If DROP_EN bit is NOT set, then the some what
-		 * equivalent count is stored in RNBC (not per queue basis).
-		 * Also note the drop count is due to lack of available
-		 * descriptors.
-		 */
-		for (i = 0; i < adapter->num_rx_queues; i++) {
-			rqdpc_tmp = rd32(E1000_RQDPC(i)) & 0xFFF;
-			adapter->rx_ring[i].rx_stats.drops += rqdpc_tmp;
-			rqdpc_total += adapter->rx_ring[i].rx_stats.drops;
-		}
-		adapter->net_stats.rx_fifo_errors = rqdpc_total;
-	}
-
-	/* Note RNBC (Receive No Buffers Count) is an not an exact
-	 * drop count as the hardware FIFO might save the day.  Thats
-	 * one of the reason for saving it in rx_fifo_errors, as its
-	 * potentially not a true drop.
-	 */
-	adapter->net_stats.rx_fifo_errors += adapter->stats.rnbc;
-
 	/* RLEC on some newer hardware can be incorrect so build
 	 * our own version based on RUC and ROC */
-	adapter->net_stats.rx_errors = adapter->stats.rxerrc +
+	net_stats->rx_errors = adapter->stats.rxerrc +
 		adapter->stats.crcerrs + adapter->stats.algnerrc +
 		adapter->stats.ruc + adapter->stats.roc +
 		adapter->stats.cexterr;
-	adapter->net_stats.rx_length_errors = adapter->stats.ruc +
-					      adapter->stats.roc;
-	adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
-	adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
-	adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
+	net_stats->rx_length_errors = adapter->stats.ruc +
+				      adapter->stats.roc;
+	net_stats->rx_crc_errors = adapter->stats.crcerrs;
+	net_stats->rx_frame_errors = adapter->stats.algnerrc;
+	net_stats->rx_missed_errors = adapter->stats.mpc;
 
 	/* Tx Errors */
-	adapter->net_stats.tx_errors = adapter->stats.ecol +
-				       adapter->stats.latecol;
-	adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
-	adapter->net_stats.tx_window_errors = adapter->stats.latecol;
-	adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
+	net_stats->tx_errors = adapter->stats.ecol +
+			       adapter->stats.latecol;
+	net_stats->tx_aborted_errors = adapter->stats.ecol;
+	net_stats->tx_window_errors = adapter->stats.latecol;
+	net_stats->tx_carrier_errors = adapter->stats.tncrs;
 
 	/* Tx Dropped needs to be maintained elsewhere */
 
@@ -3707,14 +4090,12 @@
 
 static irqreturn_t igb_msix_other(int irq, void *data)
 {
-	struct net_device *netdev = data;
-	struct igb_adapter *adapter = netdev_priv(netdev);
+	struct igb_adapter *adapter = data;
 	struct e1000_hw *hw = &adapter->hw;
 	u32 icr = rd32(E1000_ICR);
-
 	/* reading ICR causes bit 31 of EICR to be cleared */
 
-	if(icr & E1000_ICR_DOUTSYNC) {
+	if (icr & E1000_ICR_DOUTSYNC) {
 		/* HW is reporting DMA is out of sync */
 		adapter->stats.doosync++;
 	}
@@ -3730,125 +4111,90 @@
 			mod_timer(&adapter->watchdog_timer, jiffies + 1);
 	}
 
-	wr32(E1000_IMS, E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_VMMB);
+	if (adapter->vfs_allocated_count)
+		wr32(E1000_IMS, E1000_IMS_LSC |
+				E1000_IMS_VMMB |
+				E1000_IMS_DOUTSYNC);
+	else
+		wr32(E1000_IMS, E1000_IMS_LSC | E1000_IMS_DOUTSYNC);
 	wr32(E1000_EIMS, adapter->eims_other);
 
 	return IRQ_HANDLED;
 }
 
-static irqreturn_t igb_msix_tx(int irq, void *data)
+static void igb_write_itr(struct igb_q_vector *q_vector)
 {
-	struct igb_ring *tx_ring = data;
-	struct igb_adapter *adapter = tx_ring->adapter;
-	struct e1000_hw *hw = &adapter->hw;
+	u32 itr_val = q_vector->itr_val & 0x7FFC;
 
-#ifdef CONFIG_IGB_DCA
-	if (adapter->flags & IGB_FLAG_DCA_ENABLED)
-		igb_update_tx_dca(tx_ring);
-#endif
+	if (!q_vector->set_itr)
+		return;
 
-	tx_ring->total_bytes = 0;
-	tx_ring->total_packets = 0;
+	if (!itr_val)
+		itr_val = 0x4;
 
-	/* auto mask will automatically reenable the interrupt when we write
-	 * EICS */
-	if (!igb_clean_tx_irq(tx_ring))
-		/* Ring was not completely cleaned, so fire another interrupt */
-		wr32(E1000_EICS, tx_ring->eims_value);
+	if (q_vector->itr_shift)
+		itr_val |= itr_val << q_vector->itr_shift;
 	else
-		wr32(E1000_EIMS, tx_ring->eims_value);
-
-	return IRQ_HANDLED;
-}
+		itr_val |= 0x8000000;
 
-static void igb_write_itr(struct igb_ring *ring)
-{
-	struct e1000_hw *hw = &ring->adapter->hw;
-	if ((ring->adapter->itr_setting & 3) && ring->set_itr) {
-		switch (hw->mac.type) {
-		case e1000_82576:
-			wr32(ring->itr_register, ring->itr_val |
-			     0x80000000);
-			break;
-		default:
-			wr32(ring->itr_register, ring->itr_val |
-			     (ring->itr_val << 16));
-			break;
-		}
-		ring->set_itr = 0;
-	}
+	writel(itr_val, q_vector->itr_register);
+	q_vector->set_itr = 0;
 }
 
-static irqreturn_t igb_msix_rx(int irq, void *data)
+static irqreturn_t igb_msix_ring(int irq, void *data)
 {
-	struct igb_ring *rx_ring = data;
-
-	/* Write the ITR value calculated at the end of the
-	 * previous interrupt.
-	 */
+	struct igb_q_vector *q_vector = data;
 
-	igb_write_itr(rx_ring);
+	/* Write the ITR value calculated from the previous interrupt. */
+	igb_write_itr(q_vector);
 
-	if (napi_schedule_prep(&rx_ring->napi))
-		__napi_schedule(&rx_ring->napi);
-
-#ifdef CONFIG_IGB_DCA
-	if (rx_ring->adapter->flags & IGB_FLAG_DCA_ENABLED)
-		igb_update_rx_dca(rx_ring);
-#endif
-		return IRQ_HANDLED;
-}
-
-#ifdef CONFIG_IGB_DCA
-static void igb_update_rx_dca(struct igb_ring *rx_ring)
-{
-	u32 dca_rxctrl;
-	struct igb_adapter *adapter = rx_ring->adapter;
-	struct e1000_hw *hw = &adapter->hw;
-	int cpu = get_cpu();
-	int q = rx_ring->reg_idx;
+	napi_schedule(&q_vector->napi);
 
-	if (rx_ring->cpu != cpu) {
-		dca_rxctrl = rd32(E1000_DCA_RXCTRL(q));
-		if (hw->mac.type == e1000_82576) {
-			dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK_82576;
-			dca_rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu) <<
-			              E1000_DCA_RXCTRL_CPUID_SHIFT;
-		} else {
-			dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK;
-			dca_rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
-		}
-		dca_rxctrl |= E1000_DCA_RXCTRL_DESC_DCA_EN;
-		dca_rxctrl |= E1000_DCA_RXCTRL_HEAD_DCA_EN;
-		dca_rxctrl |= E1000_DCA_RXCTRL_DATA_DCA_EN;
-		wr32(E1000_DCA_RXCTRL(q), dca_rxctrl);
-		rx_ring->cpu = cpu;
-	}
-	put_cpu();
+	return IRQ_HANDLED;
 }
 
-static void igb_update_tx_dca(struct igb_ring *tx_ring)
+#ifdef CONFIG_IGB_DCA
+static void igb_update_dca(struct igb_q_vector *q_vector)
 {
-	u32 dca_txctrl;
-	struct igb_adapter *adapter = tx_ring->adapter;
+	struct igb_adapter *adapter = q_vector->adapter;
 	struct e1000_hw *hw = &adapter->hw;
 	int cpu = get_cpu();
-	int q = tx_ring->reg_idx;
 
-	if (tx_ring->cpu != cpu) {
-		dca_txctrl = rd32(E1000_DCA_TXCTRL(q));
-		if (hw->mac.type == e1000_82576) {
+	if (q_vector->cpu == cpu)
+		goto out_no_update;
+
+	if (q_vector->tx_ring) {
+		int q = q_vector->tx_ring->reg_idx;
+		u32 dca_txctrl = rd32(E1000_DCA_TXCTRL(q));
+		if (hw->mac.type == e1000_82575) {
+			dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK;
+			dca_txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
+		} else {
 			dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK_82576;
 			dca_txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu) <<
 			              E1000_DCA_TXCTRL_CPUID_SHIFT;
-		} else {
-			dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK;
-			dca_txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
 		}
 		dca_txctrl |= E1000_DCA_TXCTRL_DESC_DCA_EN;
 		wr32(E1000_DCA_TXCTRL(q), dca_txctrl);
-		tx_ring->cpu = cpu;
 	}
+	if (q_vector->rx_ring) {
+		int q = q_vector->rx_ring->reg_idx;
+		u32 dca_rxctrl = rd32(E1000_DCA_RXCTRL(q));
+		if (hw->mac.type == e1000_82575) {
+			dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK;
+			dca_rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
+		} else {
+			dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK_82576;
+			dca_rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu) <<
+			              E1000_DCA_RXCTRL_CPUID_SHIFT;
+		}
+		dca_rxctrl |= E1000_DCA_RXCTRL_DESC_DCA_EN;
+		dca_rxctrl |= E1000_DCA_RXCTRL_HEAD_DCA_EN;
+		dca_rxctrl |= E1000_DCA_RXCTRL_DATA_DCA_EN;
+		wr32(E1000_DCA_RXCTRL(q), dca_rxctrl);
+	}
+	q_vector->cpu = cpu;
+out_no_update:
 	put_cpu();
 }
 
@@ -3863,13 +4209,10 @@
 	/* Always use CB2 mode, difference is masked in the CB driver. */
 	wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
 
-	for (i = 0; i < adapter->num_tx_queues; i++) {
-		adapter->tx_ring[i].cpu = -1;
-		igb_update_tx_dca(&adapter->tx_ring[i]);
-	}
-	for (i = 0; i < adapter->num_rx_queues; i++) {
-		adapter->rx_ring[i].cpu = -1;
-		igb_update_rx_dca(&adapter->rx_ring[i]);
+	for (i = 0; i < adapter->num_q_vectors; i++) {
+		struct igb_q_vector *q_vector = adapter->q_vector[i];
+		q_vector->cpu = -1;
+		igb_update_dca(q_vector);
 	}
 }
 
@@ -3877,6 +4220,7 @@
 {
 	struct net_device *netdev = dev_get_drvdata(dev);
 	struct igb_adapter *adapter = netdev_priv(netdev);
+	struct pci_dev *pdev = adapter->pdev;
 	struct e1000_hw *hw = &adapter->hw;
 	unsigned long event = *(unsigned long *)data;
 
@@ -3885,12 +4229,9 @@
 		/* if already enabled, don't do it again */
 		if (adapter->flags & IGB_FLAG_DCA_ENABLED)
 			break;
-		/* Always use CB2 mode, difference is masked
-		 * in the CB driver. */
-		wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
 		if (dca_add_requester(dev) == 0) {
 			adapter->flags |= IGB_FLAG_DCA_ENABLED;
-			dev_info(&adapter->pdev->dev, "DCA enabled\n");
+			dev_info(&pdev->dev, "DCA enabled\n");
 			igb_setup_dca(adapter);
 			break;
 		}
@@ -3898,9 +4239,9 @@
 	case DCA_PROVIDER_REMOVE:
 		if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
 			/* without this a class_device is left
- 			 * hanging around in the sysfs model */
+			 * hanging around in the sysfs model */
 			dca_remove_requester(dev);
-			dev_info(&adapter->pdev->dev, "DCA disabled\n");
+			dev_info(&pdev->dev, "DCA disabled\n");
 			adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
 			wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
 		}
@@ -3930,12 +4271,51 @@
 
 	for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
 		ping = E1000_PF_CONTROL_MSG;
-		if (adapter->vf_data[i].clear_to_send)
+		if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
 			ping |= E1000_VT_MSGTYPE_CTS;
 		igb_write_mbx(hw, &ping, 1, i);
 	}
 }
 
+static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
+{
+	struct e1000_hw *hw = &adapter->hw;
+	u32 vmolr = rd32(E1000_VMOLR(vf));
+	struct vf_data_storage *vf_data = &adapter->vf_data[vf];
+
+	vf_data->flags |= ~(IGB_VF_FLAG_UNI_PROMISC |
+	                    IGB_VF_FLAG_MULTI_PROMISC);
+	vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
+
+	if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
+		vmolr |= E1000_VMOLR_MPME;
+		*msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
+	} else {
+		/*
+		 * if we have hashes and we are clearing a multicast promisc
+		 * flag we need to write the hashes to the MTA as this step
+		 * was previously skipped
+		 */
+		if (vf_data->num_vf_mc_hashes > 30) {
+			vmolr |= E1000_VMOLR_MPME;
+		} else if (vf_data->num_vf_mc_hashes) {
+			int j;
+			vmolr |= E1000_VMOLR_ROMPE;
+			for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
+				igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
+		}
+	}
+
+	wr32(E1000_VMOLR(vf), vmolr);
+
+	/* there are flags left unprocessed, likely not supported */
+	if (*msgbuf & E1000_VT_MSGINFO_MASK)
+		return -EINVAL;
+
+	return 0;
+
+}
+
 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
 				  u32 *msgbuf, u32 vf)
 {
@@ -3944,18 +4324,17 @@
 	struct vf_data_storage *vf_data = &adapter->vf_data[vf];
 	int i;
 
-	/* only up to 30 hash values supported */
-	if (n > 30)
-		n = 30;
-
-	/* salt away the number of multi cast addresses assigned
+	/* salt away the number of multicast addresses assigned
 	 * to this VF for later use to restore when the PF multi cast
 	 * list changes
 	 */
 	vf_data->num_vf_mc_hashes = n;
 
-	/* VFs are limited to using the MTA hash table for their multicast
-	 * addresses */
+	/* only up to 30 hash values supported */
+	if (n > 30)
+		n = 30;
+
+	/* store the hashes for later use */
 	for (i = 0; i < n; i++)
 		vf_data->vf_mc_hashes[i] = hash_list[i];
 
@@ -3972,9 +4351,20 @@
 	int i, j;
 
 	for (i = 0; i < adapter->vfs_allocated_count; i++) {
+		u32 vmolr = rd32(E1000_VMOLR(i));
+		vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
+
 		vf_data = &adapter->vf_data[i];
-		for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
-			igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
+
+		if ((vf_data->num_vf_mc_hashes > 30) ||
+		    (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
+			vmolr |= E1000_VMOLR_MPME;
+		} else if (vf_data->num_vf_mc_hashes) {
+			vmolr |= E1000_VMOLR_ROMPE;
+			for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
+				igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
+		}
+		wr32(E1000_VMOLR(i), vmolr);
 	}
 }
 
@@ -4012,7 +4402,11 @@
 	struct e1000_hw *hw = &adapter->hw;
 	u32 reg, i;
 
-	/* It is an error to call this function when VFs are not enabled */
+	/* The vlvf table only exists on 82576 hardware and newer */
+	if (hw->mac.type < e1000_82576)
+		return -1;
+
+	/* we only need to do this if VMDq is enabled */
 	if (!adapter->vfs_allocated_count)
 		return -1;
 
@@ -4042,16 +4436,12 @@
 
 			/* if !enabled we need to set this up in vfta */
 			if (!(reg & E1000_VLVF_VLANID_ENABLE)) {
-				/* add VID to filter table, if bit already set
-				 * PF must have added it outside of table */
-				if (igb_vfta_set(hw, vid, true))
-					reg |= 1 << (E1000_VLVF_POOLSEL_SHIFT +
-						adapter->vfs_allocated_count);
+				/* add VID to filter table */
+				igb_vfta_set(hw, vid, true);
 				reg |= E1000_VLVF_VLANID_ENABLE;
 			}
 			reg &= ~E1000_VLVF_VLANID_MASK;
 			reg |= vid;
-
 			wr32(E1000_VLVF(i), reg);
 
 			/* do not modify RLPML for PF devices */
@@ -4067,8 +4457,8 @@
 				reg |= size;
 				wr32(E1000_VMOLR(vf), reg);
 			}
-			adapter->vf_data[vf].vlans_enabled++;
 
+			adapter->vf_data[vf].vlans_enabled++;
 			return 0;
 		}
 	} else {
@@ -4110,15 +4500,14 @@
 	return igb_vlvf_set(adapter, vid, add, vf);
 }
 
-static inline void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
+static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
 {
-	struct e1000_hw *hw = &adapter->hw;
-
-	/* disable mailbox functionality for vf */
-	adapter->vf_data[vf].clear_to_send = false;
+	/* clear all flags */
+	adapter->vf_data[vf].flags = 0;
+	adapter->vf_data[vf].last_nack = jiffies;
 
 	/* reset offloads to defaults */
-	igb_set_vmolr(hw, vf);
+	igb_set_vmolr(adapter, vf);
 
 	/* reset vlans for device */
 	igb_clear_vf_vfta(adapter, vf);
@@ -4130,7 +4519,18 @@
 	igb_set_rx_mode(adapter->netdev);
 }
 
-static inline void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
+static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
+{
+	unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
+
+	/* generate a new mac address as we were hotplug removed/added */
+	random_ether_addr(vf_mac);
+
+	/* process remaining reset events */
+	igb_vf_reset(adapter, vf);
+}
+
+static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
 {
 	struct e1000_hw *hw = &adapter->hw;
 	unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
@@ -4139,11 +4539,10 @@
 	u8 *addr = (u8 *)(&msgbuf[1]);
 
 	/* process all the same items cleared in a function level reset */
-	igb_vf_reset_event(adapter, vf);
+	igb_vf_reset(adapter, vf);
 
 	/* set vf mac address */
-	igb_rar_set(hw, vf_mac, rar_entry);
-	igb_set_rah_pool(hw, vf, rar_entry);
+	igb_rar_set_qsel(adapter, vf_mac, rar_entry, vf);
 
 	/* enable transmit and receive for vf */
 	reg = rd32(E1000_VFTE);
@@ -4151,8 +4550,7 @@
 	reg = rd32(E1000_VFRE);
 	wr32(E1000_VFRE, reg | (1 << vf));
 
-	/* enable mailbox functionality for vf */
-	adapter->vf_data[vf].clear_to_send = true;
+	adapter->vf_data[vf].flags = IGB_VF_FLAG_CTS;
 
 	/* reply to reset with ack and vf mac address */
 	msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
@@ -4162,66 +4560,51 @@
 
 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
 {
-		unsigned char *addr = (char *)&msg[1];
-		int err = -1;
+	unsigned char *addr = (char *)&msg[1];
+	int err = -1;
 
-		if (is_valid_ether_addr(addr))
-			err = igb_set_vf_mac(adapter, vf, addr);
-
-		return err;
+	if (is_valid_ether_addr(addr))
+		err = igb_set_vf_mac(adapter, vf, addr);
 
+	return err;
 }
 
 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
 {
 	struct e1000_hw *hw = &adapter->hw;
+	struct vf_data_storage *vf_data = &adapter->vf_data[vf];
 	u32 msg = E1000_VT_MSGTYPE_NACK;
 
 	/* if device isn't clear to send it shouldn't be reading either */
-	if (!adapter->vf_data[vf].clear_to_send)
+	if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
+	    time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
 		igb_write_mbx(hw, &msg, 1, vf);
-}
-
-
-static void igb_msg_task(struct igb_adapter *adapter)
-{
-	struct e1000_hw *hw = &adapter->hw;
-	u32 vf;
-
-	for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
-		/* process any reset requests */
-		if (!igb_check_for_rst(hw, vf)) {
-			adapter->vf_data[vf].clear_to_send = false;
-			igb_vf_reset_event(adapter, vf);
-		}
-
-		/* process any messages pending */
-		if (!igb_check_for_msg(hw, vf))
-			igb_rcv_msg_from_vf(adapter, vf);
-
-		/* process any acks */
-		if (!igb_check_for_ack(hw, vf))
-			igb_rcv_ack_from_vf(adapter, vf);
-
+		vf_data->last_nack = jiffies;
 	}
 }
 
-static int igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
+static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
 {
-	u32 mbx_size = E1000_VFMAILBOX_SIZE;
-	u32 msgbuf[mbx_size];
+	struct pci_dev *pdev = adapter->pdev;
+	u32 msgbuf[E1000_VFMAILBOX_SIZE];
 	struct e1000_hw *hw = &adapter->hw;
+	struct vf_data_storage *vf_data = &adapter->vf_data[vf];
 	s32 retval;
 
-	retval = igb_read_mbx(hw, msgbuf, mbx_size, vf);
+	retval = igb_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
 
-	if (retval)
-		dev_err(&adapter->pdev->dev,
-		        "Error receiving message from VF\n");
+	if (retval) {
+		/* if receive failed revoke VF CTS stats and restart init */
+		dev_err(&pdev->dev, "Error receiving message from VF\n");
+		vf_data->flags &= ~IGB_VF_FLAG_CTS;
+		if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
+			return;
+		goto out;
+	}
 
 	/* this is a message we already processed, do nothing */
 	if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
-		return retval;
+		return;
 
 	/*
 	 * until the vf completes a reset it should not be
@@ -4230,20 +4613,23 @@
 
 	if (msgbuf[0] == E1000_VF_RESET) {
 		igb_vf_reset_msg(adapter, vf);
-
-		return retval;
+		return;
 	}
 
-	if (!adapter->vf_data[vf].clear_to_send) {
-		msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
-		igb_write_mbx(hw, msgbuf, 1, vf);
-		return retval;
+	if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
+		if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
+			return;
+		retval = -1;
+		goto out;
 	}
 
 	switch ((msgbuf[0] & 0xFFFF)) {
 	case E1000_VF_SET_MAC_ADDR:
 		retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
 		break;
+	case E1000_VF_SET_PROMISC:
+		retval = igb_set_vf_promisc(adapter, msgbuf, vf);
+		break;
 	case E1000_VF_SET_MULTICAST:
 		retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
 		break;
@@ -4254,22 +4640,67 @@
 		retval = igb_set_vf_vlan(adapter, msgbuf, vf);
 		break;
 	default:
-		dev_err(&adapter->pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
+		dev_err(&pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
 		retval = -1;
 		break;
 	}
 
+	msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
+out:
 	/* notify the VF of the results of what it sent us */
 	if (retval)
 		msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
 	else
 		msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
 
-	msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
-
 	igb_write_mbx(hw, msgbuf, 1, vf);
+}
 
-	return retval;
+static void igb_msg_task(struct igb_adapter *adapter)
+{
+	struct e1000_hw *hw = &adapter->hw;
+	u32 vf;
+
+	for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
+		/* process any reset requests */
+		if (!igb_check_for_rst(hw, vf))
+			igb_vf_reset_event(adapter, vf);
+
+		/* process any messages pending */
+		if (!igb_check_for_msg(hw, vf))
+			igb_rcv_msg_from_vf(adapter, vf);
+
+		/* process any acks */
+		if (!igb_check_for_ack(hw, vf))
+			igb_rcv_ack_from_vf(adapter, vf);
+	}
+}
+
+/**
+ *  igb_set_uta - Set unicast filter table address
+ *  @adapter: board private structure
+ *
+ *  The unicast table address is a register array of 32-bit registers.
+ *  The table is meant to be used in a way similar to how the MTA is used
+ *  however due to certain limitations in the hardware it is necessary to
+ *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscous
+ *  enable bit to allow vlan tag stripping when promiscous mode is enabled
+ **/
+static void igb_set_uta(struct igb_adapter *adapter)
+{
+	struct e1000_hw *hw = &adapter->hw;
+	int i;
+
+	/* The UTA table only exists on 82576 hardware and newer */
+	if (hw->mac.type < e1000_82576)
+		return;
+
+	/* we only need to do this if VMDq is enabled */
+	if (!adapter->vfs_allocated_count)
+		return;
+
+	for (i = 0; i < hw->mac.uta_reg_count; i++)
+		array_wr32(E1000_UTA, i, ~0);
 }
 
 /**
@@ -4279,15 +4710,15 @@
  **/
 static irqreturn_t igb_intr_msi(int irq, void *data)
 {
-	struct net_device *netdev = data;
-	struct igb_adapter *adapter = netdev_priv(netdev);
+	struct igb_adapter *adapter = data;
+	struct igb_q_vector *q_vector = adapter->q_vector[0];
 	struct e1000_hw *hw = &adapter->hw;
 	/* read ICR disables interrupts using IAM */
 	u32 icr = rd32(E1000_ICR);
 
-	igb_write_itr(adapter->rx_ring);
+	igb_write_itr(q_vector);
 
-	if(icr & E1000_ICR_DOUTSYNC) {
+	if (icr & E1000_ICR_DOUTSYNC) {
 		/* HW is reporting DMA is out of sync */
 		adapter->stats.doosync++;
 	}
@@ -4298,7 +4729,7 @@
 			mod_timer(&adapter->watchdog_timer, jiffies + 1);
 	}
 
-	napi_schedule(&adapter->rx_ring[0].napi);
+	napi_schedule(&q_vector->napi);
 
 	return IRQ_HANDLED;
 }
@@ -4310,8 +4741,8 @@
  **/
 static irqreturn_t igb_intr(int irq, void *data)
 {
-	struct net_device *netdev = data;
-	struct igb_adapter *adapter = netdev_priv(netdev);
+	struct igb_adapter *adapter = data;
+	struct igb_q_vector *q_vector = adapter->q_vector[0];
 	struct e1000_hw *hw = &adapter->hw;
 	/* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
 	 * need for the IMC write */
@@ -4319,14 +4750,14 @@
 	if (!icr)
 		return IRQ_NONE;  /* Not our interrupt */
 
-	igb_write_itr(adapter->rx_ring);
+	igb_write_itr(q_vector);
 
 	/* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
 	 * not set, then the adapter didn't send an interrupt */
 	if (!(icr & E1000_ICR_INT_ASSERTED))
 		return IRQ_NONE;
 
-	if(icr & E1000_ICR_DOUTSYNC) {
+	if (icr & E1000_ICR_DOUTSYNC) {
 		/* HW is reporting DMA is out of sync */
 		adapter->stats.doosync++;
 	}
@@ -4338,26 +4769,27 @@
 			mod_timer(&adapter->watchdog_timer, jiffies + 1);
 	}
 
-	napi_schedule(&adapter->rx_ring[0].napi);
+	napi_schedule(&q_vector->napi);
 
 	return IRQ_HANDLED;
 }
 
-static inline void igb_rx_irq_enable(struct igb_ring *rx_ring)
+static inline void igb_ring_irq_enable(struct igb_q_vector *q_vector)
 {
-	struct igb_adapter *adapter = rx_ring->adapter;
+	struct igb_adapter *adapter = q_vector->adapter;
 	struct e1000_hw *hw = &adapter->hw;
 
-	if (adapter->itr_setting & 3) {
-		if (adapter->num_rx_queues == 1)
+	if ((q_vector->rx_ring && (adapter->rx_itr_setting & 3)) ||
+	    (!q_vector->rx_ring && (adapter->tx_itr_setting & 3))) {
+		if (!adapter->msix_entries)
 			igb_set_itr(adapter);
 		else
-			igb_update_ring_itr(rx_ring);
+			igb_update_ring_itr(q_vector);
 	}
 
 	if (!test_bit(__IGB_DOWN, &adapter->state)) {
 		if (adapter->msix_entries)
-			wr32(E1000_EIMS, rx_ring->eims_value);
+			wr32(E1000_EIMS, q_vector->eims_value);
 		else
 			igb_irq_enable(adapter);
 	}
@@ -4370,76 +4802,101 @@
  **/
 static int igb_poll(struct napi_struct *napi, int budget)
 {
-	struct igb_ring *rx_ring = container_of(napi, struct igb_ring, napi);
-	int work_done = 0;
+	struct igb_q_vector *q_vector = container_of(napi,
+	                                             struct igb_q_vector,
+	                                             napi);
+	int tx_clean_complete = 1, work_done = 0;
 
 #ifdef CONFIG_IGB_DCA
-	if (rx_ring->adapter->flags & IGB_FLAG_DCA_ENABLED)
-		igb_update_rx_dca(rx_ring);
+	if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
+		igb_update_dca(q_vector);
 #endif
-	igb_clean_rx_irq_adv(rx_ring, &work_done, budget);
+	if (q_vector->tx_ring)
+		tx_clean_complete = igb_clean_tx_irq(q_vector);
 
-	if (rx_ring->buddy) {
-#ifdef CONFIG_IGB_DCA
-		if (rx_ring->adapter->flags & IGB_FLAG_DCA_ENABLED)
-			igb_update_tx_dca(rx_ring->buddy);
-#endif
-		if (!igb_clean_tx_irq(rx_ring->buddy))
-			work_done = budget;
-	}
+	if (q_vector->rx_ring)
+		igb_clean_rx_irq_adv(q_vector, &work_done, budget);
+
+	if (!tx_clean_complete)
+		work_done = budget;
 
 	/* If not enough Rx work done, exit the polling mode */
 	if (work_done < budget) {
 		napi_complete(napi);
-		igb_rx_irq_enable(rx_ring);
+		igb_ring_irq_enable(q_vector);
 	}
 
 	return work_done;
 }
 
 /**
- * igb_hwtstamp - utility function which checks for TX time stamp
+ * igb_systim_to_hwtstamp - convert system time value to hw timestamp
  * @adapter: board private structure
+ * @shhwtstamps: timestamp structure to update
+ * @regval: unsigned 64bit system time value.
+ *
+ * We need to convert the system time value stored in the RX/TXSTMP registers
+ * into a hwtstamp which can be used by the upper level timestamping functions
+ */
+static void igb_systim_to_hwtstamp(struct igb_adapter *adapter,
+                                   struct skb_shared_hwtstamps *shhwtstamps,
+                                   u64 regval)
+{
+	u64 ns;
+
+	/*
+	 * The 82580 starts with 1ns at bit 0 in RX/TXSTMPL, shift this up to
+	 * 24 to match clock shift we setup earlier.
+	 */
+	if (adapter->hw.mac.type == e1000_82580)
+		regval <<= IGB_82580_TSYNC_SHIFT;
+
+	ns = timecounter_cyc2time(&adapter->clock, regval);
+	timecompare_update(&adapter->compare, ns);
+	memset(shhwtstamps, 0, sizeof(struct skb_shared_hwtstamps));
+	shhwtstamps->hwtstamp = ns_to_ktime(ns);
+	shhwtstamps->syststamp = timecompare_transform(&adapter->compare, ns);
+}
+
+/**
+ * igb_tx_hwtstamp - utility function which checks for TX time stamp
+ * @q_vector: pointer to q_vector containing needed info
  * @skb: packet that was just sent
  *
  * If we were asked to do hardware stamping and such a time stamp is
  * available, then it must have been for this skb here because we only
  * allow only one such packet into the queue.
  */
-static void igb_tx_hwtstamp(struct igb_adapter *adapter, struct sk_buff *skb)
+static void igb_tx_hwtstamp(struct igb_q_vector *q_vector, struct sk_buff *skb)
 {
+	struct igb_adapter *adapter = q_vector->adapter;
 	union skb_shared_tx *shtx = skb_tx(skb);
 	struct e1000_hw *hw = &adapter->hw;
+	struct skb_shared_hwtstamps shhwtstamps;
+	u64 regval;
 
-	if (unlikely(shtx->hardware)) {
-		u32 valid = rd32(E1000_TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID;
-		if (valid) {
-			u64 regval = rd32(E1000_TXSTMPL);
-			u64 ns;
-			struct skb_shared_hwtstamps shhwtstamps;
-
-			memset(&shhwtstamps, 0, sizeof(shhwtstamps));
-			regval |= (u64)rd32(E1000_TXSTMPH) << 32;
-			ns = timecounter_cyc2time(&adapter->clock,
-						  regval);
-			timecompare_update(&adapter->compare, ns);
-			shhwtstamps.hwtstamp = ns_to_ktime(ns);
-			shhwtstamps.syststamp =
-				timecompare_transform(&adapter->compare, ns);
-			skb_tstamp_tx(skb, &shhwtstamps);
-		}
-	}
+	/* if skb does not support hw timestamp or TX stamp not valid exit */
+	if (likely(!shtx->hardware) ||
+	    !(rd32(E1000_TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID))
+		return;
+
+	regval = rd32(E1000_TXSTMPL);
+	regval |= (u64)rd32(E1000_TXSTMPH) << 32;
+
+	igb_systim_to_hwtstamp(adapter, &shhwtstamps, regval);
+	skb_tstamp_tx(skb, &shhwtstamps);
 }
 
 /**
  * igb_clean_tx_irq - Reclaim resources after transmit completes
- * @adapter: board private structure
+ * @q_vector: pointer to q_vector containing needed info
  * returns true if ring is completely cleaned
  **/
-static bool igb_clean_tx_irq(struct igb_ring *tx_ring)
+static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
 {
-	struct igb_adapter *adapter = tx_ring->adapter;
-	struct net_device *netdev = adapter->netdev;
+	struct igb_adapter *adapter = q_vector->adapter;
+	struct igb_ring *tx_ring = q_vector->tx_ring;
+	struct net_device *netdev = tx_ring->netdev;
 	struct e1000_hw *hw = &adapter->hw;
 	struct igb_buffer *buffer_info;
 	struct sk_buff *skb;
@@ -4470,10 +4927,10 @@
 				total_packets += segs;
 				total_bytes += bytecount;
 
-				igb_tx_hwtstamp(adapter, skb);
+				igb_tx_hwtstamp(q_vector, skb);
 			}
 
-			igb_unmap_and_free_tx_resource(adapter, buffer_info);
+			igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
 			tx_desc->wb.status = 0;
 
 			i++;
@@ -4496,7 +4953,7 @@
 		if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
 		    !(test_bit(__IGB_DOWN, &adapter->state))) {
 			netif_wake_subqueue(netdev, tx_ring->queue_index);
-			++adapter->restart_queue;
+			tx_ring->tx_stats.restart_queue++;
 		}
 	}
 
@@ -4511,7 +4968,7 @@
 			 E1000_STATUS_TXOFF)) {
 
 			/* detected Tx unit hang */
-			dev_err(&adapter->pdev->dev,
+			dev_err(&tx_ring->pdev->dev,
 				"Detected Tx Unit Hang\n"
 				"  Tx Queue             <%d>\n"
 				"  TDH                  <%x>\n"
@@ -4524,11 +4981,11 @@
 				"  jiffies              <%lx>\n"
 				"  desc.status          <%x>\n",
 				tx_ring->queue_index,
-				readl(adapter->hw.hw_addr + tx_ring->head),
-				readl(adapter->hw.hw_addr + tx_ring->tail),
+				readl(tx_ring->head),
+				readl(tx_ring->tail),
 				tx_ring->next_to_use,
 				tx_ring->next_to_clean,
-				tx_ring->buffer_info[i].time_stamp,
+				tx_ring->buffer_info[eop].time_stamp,
 				eop,
 				jiffies,
 				eop_desc->wb.status);
@@ -4539,43 +4996,38 @@
 	tx_ring->total_packets += total_packets;
 	tx_ring->tx_stats.bytes += total_bytes;
 	tx_ring->tx_stats.packets += total_packets;
-	adapter->net_stats.tx_bytes += total_bytes;
-	adapter->net_stats.tx_packets += total_packets;
 	return (count < tx_ring->count);
 }
 
 /**
  * igb_receive_skb - helper function to handle rx indications
- * @ring: pointer to receive ring receving this packet
- * @status: descriptor status field as written by hardware
- * @rx_desc: receive descriptor containing vlan and type information.
- * @skb: pointer to sk_buff to be indicated to stack
- **/
-static void igb_receive_skb(struct igb_ring *ring, u8 status,
-                            union e1000_adv_rx_desc * rx_desc,
-                            struct sk_buff *skb)
-{
-	struct igb_adapter * adapter = ring->adapter;
-	bool vlan_extracted = (adapter->vlgrp && (status & E1000_RXD_STAT_VP));
-
-	skb_record_rx_queue(skb, ring->queue_index);
-	if (vlan_extracted)
-		vlan_gro_receive(&ring->napi, adapter->vlgrp,
-		                 le16_to_cpu(rx_desc->wb.upper.vlan),
-		                 skb);
+ * @q_vector: structure containing interrupt and ring information
+ * @skb: packet to send up
+ * @vlan_tag: vlan tag for packet
+ **/
+static void igb_receive_skb(struct igb_q_vector *q_vector,
+                            struct sk_buff *skb,
+                            u16 vlan_tag)
+{
+	struct igb_adapter *adapter = q_vector->adapter;
+
+	if (vlan_tag && adapter->vlgrp)
+		vlan_gro_receive(&q_vector->napi, adapter->vlgrp,
+		                 vlan_tag, skb);
 	else
-		napi_gro_receive(&ring->napi, skb);
+		napi_gro_receive(&q_vector->napi, skb);
 }
 
-static inline void igb_rx_checksum_adv(struct igb_adapter *adapter,
+static inline void igb_rx_checksum_adv(struct igb_ring *ring,
 				       u32 status_err, struct sk_buff *skb)
 {
 	skb->ip_summed = CHECKSUM_NONE;
 
 	/* Ignore Checksum bit is set or checksum is disabled through ethtool */
-	if ((status_err & E1000_RXD_STAT_IXSM) ||
-	    (adapter->flags & IGB_FLAG_RX_CSUM_DISABLED))
+	if (!(ring->flags & IGB_RING_FLAG_RX_CSUM) ||
+	     (status_err & E1000_RXD_STAT_IXSM))
 		return;
+
 	/* TCP/UDP checksum error bit is set */
 	if (status_err &
 	    (E1000_RXDEXT_STATERR_TCPE | E1000_RXDEXT_STATERR_IPE)) {
@@ -4584,9 +5036,10 @@
 		 * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
 		 * packets, (aka let the stack check the crc32c)
 		 */
-		if (!((adapter->hw.mac.type == e1000_82576) &&
-		      (skb->len == 60)))
-			adapter->hw_csum_err++;
+		if ((skb->len == 60) &&
+		    (ring->flags & IGB_RING_FLAG_RX_SCTP_CSUM))
+			ring->rx_stats.csum_err++;
+
 		/* let the stack verify checksum errors */
 		return;
 	}
@@ -4594,11 +5047,38 @@
 	if (status_err & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))
 		skb->ip_summed = CHECKSUM_UNNECESSARY;
 
-	dev_dbg(&adapter->pdev->dev, "cksum success: bits %08X\n", status_err);
-	adapter->hw_csum_good++;
+	dev_dbg(&ring->pdev->dev, "cksum success: bits %08X\n", status_err);
 }
 
-static inline u16 igb_get_hlen(struct igb_adapter *adapter,
+static inline void igb_rx_hwtstamp(struct igb_q_vector *q_vector, u32 staterr,
+                                   struct sk_buff *skb)
+{
+	struct igb_adapter *adapter = q_vector->adapter;
+	struct e1000_hw *hw = &adapter->hw;
+	u64 regval;
+
+	/*
+	 * If this bit is set, then the RX registers contain the time stamp. No
+	 * other packet will be time stamped until we read these registers, so
+	 * read the registers to make them available again. Because only one
+	 * packet can be time stamped at a time, we know that the register
+	 * values must belong to this one here and therefore we don't need to
+	 * compare any of the additional attributes stored for it.
+	 *
+	 * If nothing went wrong, then it should have a skb_shared_tx that we
+	 * can turn into a skb_shared_hwtstamps.
+	 */
+	if (likely(!(staterr & E1000_RXDADV_STAT_TS)))
+		return;
+	if (!(rd32(E1000_TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
+		return;
+
+	regval = rd32(E1000_RXSTMPL);
+	regval |= (u64)rd32(E1000_RXSTMPH) << 32;
+
+	igb_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), regval);
+}
+static inline u16 igb_get_hlen(struct igb_ring *rx_ring,
                                union e1000_adv_rx_desc *rx_desc)
 {
 	/* HW will not DMA in data larger than the given buffer, even if it
@@ -4607,27 +5087,28 @@
 	 */
 	u16 hlen = (le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info) &
 	           E1000_RXDADV_HDRBUFLEN_MASK) >> E1000_RXDADV_HDRBUFLEN_SHIFT;
-	if (hlen > adapter->rx_ps_hdr_size)
-		hlen = adapter->rx_ps_hdr_size;
+	if (hlen > rx_ring->rx_buffer_len)
+		hlen = rx_ring->rx_buffer_len;
 	return hlen;
 }
 
-static bool igb_clean_rx_irq_adv(struct igb_ring *rx_ring,
-				 int *work_done, int budget)
+static bool igb_clean_rx_irq_adv(struct igb_q_vector *q_vector,
+                                 int *work_done, int budget)
 {
-	struct igb_adapter *adapter = rx_ring->adapter;
-	struct net_device *netdev = adapter->netdev;
-	struct e1000_hw *hw = &adapter->hw;
-	struct pci_dev *pdev = adapter->pdev;
+	struct igb_ring *rx_ring = q_vector->rx_ring;
+	struct net_device *netdev = rx_ring->netdev;
+	struct pci_dev *pdev = rx_ring->pdev;
 	union e1000_adv_rx_desc *rx_desc , *next_rxd;
 	struct igb_buffer *buffer_info , *next_buffer;
 	struct sk_buff *skb;
 	bool cleaned = false;
 	int cleaned_count = 0;
+	int current_node = numa_node_id();
 	unsigned int total_bytes = 0, total_packets = 0;
 	unsigned int i;
 	u32 staterr;
 	u16 length;
+	u16 vlan_tag;
 
 	i = rx_ring->next_to_clean;
 	buffer_info = &rx_ring->buffer_info[i];
@@ -4646,6 +5127,7 @@
 		i++;
 		if (i == rx_ring->count)
 			i = 0;
+
 		next_rxd = E1000_RX_DESC_ADV(*rx_ring, i);
 		prefetch(next_rxd);
 		next_buffer = &rx_ring->buffer_info[i];
@@ -4654,23 +5136,16 @@
 		cleaned = true;
 		cleaned_count++;
 
-		/* this is the fast path for the non-packet split case */
-		if (!adapter->rx_ps_hdr_size) {
-			pci_unmap_single(pdev, buffer_info->dma,
-					 adapter->rx_buffer_len,
-					 PCI_DMA_FROMDEVICE);
-			buffer_info->dma = 0;
-			skb_put(skb, length);
-			goto send_up;
-		}
-
 		if (buffer_info->dma) {
-			u16 hlen = igb_get_hlen(adapter, rx_desc);
 			pci_unmap_single(pdev, buffer_info->dma,
-					 adapter->rx_ps_hdr_size,
+					 rx_ring->rx_buffer_len,
 					 PCI_DMA_FROMDEVICE);
 			buffer_info->dma = 0;
-			skb_put(skb, hlen);
+			if (rx_ring->rx_buffer_len >= IGB_RXBUFFER_1024) {
+				skb_put(skb, length);
+				goto send_up;
+			}
+			skb_put(skb, igb_get_hlen(rx_ring, rx_desc));
 		}
 
 		if (length) {
@@ -4683,15 +5158,14 @@
 						buffer_info->page_offset,
 						length);
 
-			if ((adapter->rx_buffer_len > (PAGE_SIZE / 2)) ||
-			    (page_count(buffer_info->page) != 1))
+			if ((page_count(buffer_info->page) != 1) ||
+			    (page_to_nid(buffer_info->page) != current_node))
 				buffer_info->page = NULL;
 			else
 				get_page(buffer_info->page);
 
 			skb->len += length;
 			skb->data_len += length;
-
 			skb->truesize += length;
 		}
 
@@ -4703,60 +5177,24 @@
 			goto next_desc;
 		}
 send_up:
-		/*
-		 * If this bit is set, then the RX registers contain
-		 * the time stamp. No other packet will be time
-		 * stamped until we read these registers, so read the
-		 * registers to make them available again. Because
-		 * only one packet can be time stamped at a time, we
-		 * know that the register values must belong to this
-		 * one here and therefore we don't need to compare
-		 * any of the additional attributes stored for it.
-		 *
-		 * If nothing went wrong, then it should have a
-		 * skb_shared_tx that we can turn into a
-		 * skb_shared_hwtstamps.
-		 *
-		 * TODO: can time stamping be triggered (thus locking
-		 * the registers) without the packet reaching this point
-		 * here? In that case RX time stamping would get stuck.
-		 *
-		 * TODO: in "time stamp all packets" mode this bit is
-		 * not set. Need a global flag for this mode and then
-		 * always read the registers. Cannot be done without
-		 * a race condition.
-		 */
-		if (unlikely(staterr & E1000_RXD_STAT_TS)) {
-			u64 regval;
-			u64 ns;
-			struct skb_shared_hwtstamps *shhwtstamps =
-				skb_hwtstamps(skb);
-
-			WARN(!(rd32(E1000_TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID),
-			     "igb: no RX time stamp available for time stamped packet");
-			regval = rd32(E1000_RXSTMPL);
-			regval |= (u64)rd32(E1000_RXSTMPH) << 32;
-			ns = timecounter_cyc2time(&adapter->clock, regval);
-			timecompare_update(&adapter->compare, ns);
-			memset(shhwtstamps, 0, sizeof(*shhwtstamps));
-			shhwtstamps->hwtstamp = ns_to_ktime(ns);
-			shhwtstamps->syststamp =
-				timecompare_transform(&adapter->compare, ns);
-		}
-
 		if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
 			dev_kfree_skb_irq(skb);
 			goto next_desc;
 		}
 
+		igb_rx_hwtstamp(q_vector, staterr, skb);
 		total_bytes += skb->len;
 		total_packets++;
 
-		igb_rx_checksum_adv(adapter, staterr, skb);
+		igb_rx_checksum_adv(rx_ring, staterr, skb);
 
 		skb->protocol = eth_type_trans(skb, netdev);
+		skb_record_rx_queue(skb, rx_ring->queue_index);
+
+		vlan_tag = ((staterr & E1000_RXD_STAT_VP) ?
+		            le16_to_cpu(rx_desc->wb.upper.vlan) : 0);
 
-		igb_receive_skb(rx_ring, staterr, rx_desc, skb);
+		igb_receive_skb(q_vector, skb, vlan_tag);
 
 next_desc:
 		rx_desc->wb.upper.status_error = 0;
@@ -4783,8 +5221,6 @@
 	rx_ring->total_bytes += total_bytes;
 	rx_ring->rx_stats.packets += total_packets;
 	rx_ring->rx_stats.bytes += total_bytes;
-	adapter->net_stats.rx_bytes += total_bytes;
-	adapter->net_stats.rx_packets += total_packets;
 	return cleaned;
 }
 
@@ -4792,12 +5228,9 @@
  * igb_alloc_rx_buffers_adv - Replace used receive buffers; packet split
  * @adapter: address of board private structure
  **/
-static void igb_alloc_rx_buffers_adv(struct igb_ring *rx_ring,
-				     int cleaned_count)
+void igb_alloc_rx_buffers_adv(struct igb_ring *rx_ring, int cleaned_count)
 {
-	struct igb_adapter *adapter = rx_ring->adapter;
-	struct net_device *netdev = adapter->netdev;
-	struct pci_dev *pdev = adapter->pdev;
+	struct net_device *netdev = rx_ring->netdev;
 	union e1000_adv_rx_desc *rx_desc;
 	struct igb_buffer *buffer_info;
 	struct sk_buff *skb;
@@ -4807,19 +5240,16 @@
 	i = rx_ring->next_to_use;
 	buffer_info = &rx_ring->buffer_info[i];
 
-	if (adapter->rx_ps_hdr_size)
-		bufsz = adapter->rx_ps_hdr_size;
-	else
-		bufsz = adapter->rx_buffer_len;
+	bufsz = rx_ring->rx_buffer_len;
 
 	while (cleaned_count--) {
 		rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
 
-		if (adapter->rx_ps_hdr_size && !buffer_info->page_dma) {
+		if ((bufsz < IGB_RXBUFFER_1024) && !buffer_info->page_dma) {
 			if (!buffer_info->page) {
-				buffer_info->page = alloc_page(GFP_ATOMIC);
+				buffer_info->page = netdev_alloc_page(netdev);
 				if (!buffer_info->page) {
-					adapter->alloc_rx_buff_failed++;
+					rx_ring->rx_stats.alloc_failed++;
 					goto no_buffers;
 				}
 				buffer_info->page_offset = 0;
@@ -4827,16 +5257,23 @@
 				buffer_info->page_offset ^= PAGE_SIZE / 2;
 			}
 			buffer_info->page_dma =
-				pci_map_page(pdev, buffer_info->page,
+				pci_map_page(rx_ring->pdev, buffer_info->page,
 					     buffer_info->page_offset,
 					     PAGE_SIZE / 2,
 					     PCI_DMA_FROMDEVICE);
+			if (pci_dma_mapping_error(rx_ring->pdev,
+			                          buffer_info->page_dma)) {
+				buffer_info->page_dma = 0;
+				rx_ring->rx_stats.alloc_failed++;
+				goto no_buffers;
+			}
 		}
 
+		skb = buffer_info->skb;
 		if (!buffer_info->skb) {
 			skb = netdev_alloc_skb(netdev, bufsz + NET_IP_ALIGN);
 			if (!skb) {
-				adapter->alloc_rx_buff_failed++;
+				rx_ring->rx_stats.alloc_failed++;
 				goto no_buffers;
 			}
 
@@ -4847,19 +5284,27 @@
 			skb_reserve(skb, NET_IP_ALIGN);
 
 			buffer_info->skb = skb;
-			buffer_info->dma = pci_map_single(pdev, skb->data,
+		}
+		if (!buffer_info->dma) {
+			buffer_info->dma = pci_map_single(rx_ring->pdev,
+			                                  skb->data,
 							  bufsz,
 							  PCI_DMA_FROMDEVICE);
+			if (pci_dma_mapping_error(rx_ring->pdev,
+			                          buffer_info->dma)) {
+				buffer_info->dma = 0;
+				rx_ring->rx_stats.alloc_failed++;
+				goto no_buffers;
+			}
 		}
 		/* Refresh the desc even if buffer_addrs didn't change because
 		 * each write-back erases this info. */
-		if (adapter->rx_ps_hdr_size) {
+		if (bufsz < IGB_RXBUFFER_1024) {
 			rx_desc->read.pkt_addr =
 			     cpu_to_le64(buffer_info->page_dma);
 			rx_desc->read.hdr_addr = cpu_to_le64(buffer_info->dma);
 		} else {
-			rx_desc->read.pkt_addr =
-			     cpu_to_le64(buffer_info->dma);
+			rx_desc->read.pkt_addr = cpu_to_le64(buffer_info->dma);
 			rx_desc->read.hdr_addr = 0;
 		}
 
@@ -4882,7 +5327,7 @@
 		 * applicable for weak-ordered memory model archs,
 		 * such as IA-64). */
 		wmb();
-		writel(i, adapter->hw.hw_addr + rx_ring->tail);
+		writel(i, rx_ring->tail);
 	}
 }
 
@@ -4941,13 +5386,11 @@
 	struct igb_adapter *adapter = netdev_priv(netdev);
 	struct e1000_hw *hw = &adapter->hw;
 	struct hwtstamp_config config;
-	u32 tsync_tx_ctl_bit = E1000_TSYNCTXCTL_ENABLED;
-	u32 tsync_rx_ctl_bit = E1000_TSYNCRXCTL_ENABLED;
-	u32 tsync_rx_ctl_type = 0;
+	u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
+	u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
 	u32 tsync_rx_cfg = 0;
-	int is_l4 = 0;
-	int is_l2 = 0;
-	short port = 319; /* PTP */
+	bool is_l4 = false;
+	bool is_l2 = false;
 	u32 regval;
 
 	if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
@@ -4959,10 +5402,8 @@
 
 	switch (config.tx_type) {
 	case HWTSTAMP_TX_OFF:
-		tsync_tx_ctl_bit = 0;
-		break;
+		tsync_tx_ctl = 0;
 	case HWTSTAMP_TX_ON:
-		tsync_tx_ctl_bit = E1000_TSYNCTXCTL_ENABLED;
 		break;
 	default:
 		return -ERANGE;
@@ -4970,7 +5411,7 @@
 
 	switch (config.rx_filter) {
 	case HWTSTAMP_FILTER_NONE:
-		tsync_rx_ctl_bit = 0;
+		tsync_rx_ctl = 0;
 		break;
 	case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
 	case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
@@ -4981,86 +5422,97 @@
 		 * possible to time stamp both Sync and Delay_Req messages
 		 * => fall back to time stamping all packets
 		 */
-		tsync_rx_ctl_type = E1000_TSYNCRXCTL_TYPE_ALL;
+		tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
 		config.rx_filter = HWTSTAMP_FILTER_ALL;
 		break;
 	case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
-		tsync_rx_ctl_type = E1000_TSYNCRXCTL_TYPE_L4_V1;
+		tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
 		tsync_rx_cfg = E1000_TSYNCRXCFG_PTP_V1_SYNC_MESSAGE;
-		is_l4 = 1;
+		is_l4 = true;
 		break;
 	case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
-		tsync_rx_ctl_type = E1000_TSYNCRXCTL_TYPE_L4_V1;
+		tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
 		tsync_rx_cfg = E1000_TSYNCRXCFG_PTP_V1_DELAY_REQ_MESSAGE;
-		is_l4 = 1;
+		is_l4 = true;
 		break;
 	case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
 	case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
-		tsync_rx_ctl_type = E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
+		tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
 		tsync_rx_cfg = E1000_TSYNCRXCFG_PTP_V2_SYNC_MESSAGE;
-		is_l2 = 1;
-		is_l4 = 1;
+		is_l2 = true;
+		is_l4 = true;
 		config.rx_filter = HWTSTAMP_FILTER_SOME;
 		break;
 	case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
 	case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
-		tsync_rx_ctl_type = E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
+		tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
 		tsync_rx_cfg = E1000_TSYNCRXCFG_PTP_V2_DELAY_REQ_MESSAGE;
-		is_l2 = 1;
-		is_l4 = 1;
+		is_l2 = true;
+		is_l4 = true;
 		config.rx_filter = HWTSTAMP_FILTER_SOME;
 		break;
 	case HWTSTAMP_FILTER_PTP_V2_EVENT:
 	case HWTSTAMP_FILTER_PTP_V2_SYNC:
 	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
-		tsync_rx_ctl_type = E1000_TSYNCRXCTL_TYPE_EVENT_V2;
+		tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
 		config.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
-		is_l2 = 1;
+		is_l2 = true;
 		break;
 	default:
 		return -ERANGE;
 	}
 
+	if (hw->mac.type == e1000_82575) {
+		if (tsync_rx_ctl | tsync_tx_ctl)
+			return -EINVAL;
+		return 0;
+	}
+
 	/* enable/disable TX */
 	regval = rd32(E1000_TSYNCTXCTL);
-	regval = (regval & ~E1000_TSYNCTXCTL_ENABLED) | tsync_tx_ctl_bit;
+	regval &= ~E1000_TSYNCTXCTL_ENABLED;
+	regval |= tsync_tx_ctl;
 	wr32(E1000_TSYNCTXCTL, regval);
 
-	/* enable/disable RX, define which PTP packets are time stamped */
+	/* enable/disable RX */
 	regval = rd32(E1000_TSYNCRXCTL);
-	regval = (regval & ~E1000_TSYNCRXCTL_ENABLED) | tsync_rx_ctl_bit;
-	regval = (regval & ~0xE) | tsync_rx_ctl_type;
+	regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
+	regval |= tsync_rx_ctl;
 	wr32(E1000_TSYNCRXCTL, regval);
-	wr32(E1000_TSYNCRXCFG, tsync_rx_cfg);
 
-	/*
-	 * Ethertype Filter Queue Filter[0][15:0] = 0x88F7
-	 *                                          (Ethertype to filter on)
-	 * Ethertype Filter Queue Filter[0][26] = 0x1 (Enable filter)
-	 * Ethertype Filter Queue Filter[0][30] = 0x1 (Enable Timestamping)
-	 */
-	wr32(E1000_ETQF0, is_l2 ? 0x440088f7 : 0);
+	/* define which PTP packets are time stamped */
+	wr32(E1000_TSYNCRXCFG, tsync_rx_cfg);
 
-	/* L4 Queue Filter[0]: only filter by source and destination port */
-	wr32(E1000_SPQF0, htons(port));
-	wr32(E1000_IMIREXT(0), is_l4 ?
-	     ((1<<12) | (1<<19) /* bypass size and control flags */) : 0);
-	wr32(E1000_IMIR(0), is_l4 ?
-	     (htons(port)
-	      | (0<<16) /* immediate interrupt disabled */
-	      | 0 /* (1<<17) bit cleared: do not bypass
-		     destination port check */)
-		: 0);
-	wr32(E1000_FTQF0, is_l4 ?
-	     (0x11 /* UDP */
-	      | (1<<15) /* VF not compared */
-	      | (1<<27) /* Enable Timestamping */
-	      | (7<<28) /* only source port filter enabled,
-			   source/target address and protocol
-			   masked */)
-	     : ((1<<15) | (15<<28) /* all mask bits set = filter not
-				      enabled */));
+	/* define ethertype filter for timestamped packets */
+	if (is_l2)
+		wr32(E1000_ETQF(3),
+		                (E1000_ETQF_FILTER_ENABLE | /* enable filter */
+		                 E1000_ETQF_1588 | /* enable timestamping */
+		                 ETH_P_1588));     /* 1588 eth protocol type */
+	else
+		wr32(E1000_ETQF(3), 0);
 
+#define PTP_PORT 319
+	/* L4 Queue Filter[3]: filter by destination port and protocol */
+	if (is_l4) {
+		u32 ftqf = (IPPROTO_UDP /* UDP */
+			| E1000_FTQF_VF_BP /* VF not compared */
+			| E1000_FTQF_1588_TIME_STAMP /* Enable Timestamping */
+			| E1000_FTQF_MASK); /* mask all inputs */
+		ftqf &= ~E1000_FTQF_MASK_PROTO_BP; /* enable protocol check */
+
+		wr32(E1000_IMIR(3), htons(PTP_PORT));
+		wr32(E1000_IMIREXT(3),
+		     (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_BP));
+		if (hw->mac.type == e1000_82576) {
+			/* enable source port check */
+			wr32(E1000_SPQF(3), htons(PTP_PORT));
+			ftqf &= ~E1000_FTQF_MASK_SOURCE_PORT_BP;
+		}
+		wr32(E1000_FTQF(3), ftqf);
+	} else {
+		wr32(E1000_FTQF(3), E1000_FTQF_MASK);
+	}
 	wrfl();
 
 	adapter->hwtstamp_config = config;
@@ -5137,21 +5589,15 @@
 		ctrl |= E1000_CTRL_VME;
 		wr32(E1000_CTRL, ctrl);
 
-		/* enable VLAN receive filtering */
+		/* Disable CFI check */
 		rctl = rd32(E1000_RCTL);
 		rctl &= ~E1000_RCTL_CFIEN;
 		wr32(E1000_RCTL, rctl);
-		igb_update_mng_vlan(adapter);
 	} else {
 		/* disable VLAN tag insert/strip */
 		ctrl = rd32(E1000_CTRL);
 		ctrl &= ~E1000_CTRL_VME;
 		wr32(E1000_CTRL, ctrl);
-
-		if (adapter->mng_vlan_id != (u16)IGB_MNG_VLAN_NONE) {
-			igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
-			adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
-		}
 	}
 
 	igb_rlpml_set(adapter);
@@ -5166,16 +5612,11 @@
 	struct e1000_hw *hw = &adapter->hw;
 	int pf_id = adapter->vfs_allocated_count;
 
-	if ((hw->mng_cookie.status &
-	     E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
-	    (vid == adapter->mng_vlan_id))
-		return;
-
-	/* add vid to vlvf if sr-iov is enabled,
-	 * if that fails add directly to filter table */
-	if (igb_vlvf_set(adapter, vid, true, pf_id))
-		igb_vfta_set(hw, vid, true);
+	/* attempt to add filter to vlvf array */
+	igb_vlvf_set(adapter, vid, true, pf_id);
 
+	/* add the filter since PF can receive vlans w/o entry in vlvf */
+	igb_vfta_set(hw, vid, true);
 }
 
 static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
@@ -5183,6 +5624,7 @@
 	struct igb_adapter *adapter = netdev_priv(netdev);
 	struct e1000_hw *hw = &adapter->hw;
 	int pf_id = adapter->vfs_allocated_count;
+	s32 err;
 
 	igb_irq_disable(adapter);
 	vlan_group_set_device(adapter->vlgrp, vid, NULL);
@@ -5190,17 +5632,11 @@
 	if (!test_bit(__IGB_DOWN, &adapter->state))
 		igb_irq_enable(adapter);
 
-	if ((adapter->hw.mng_cookie.status &
-	     E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
-	    (vid == adapter->mng_vlan_id)) {
-		/* release control to f/w */
-		igb_release_hw_control(adapter);
-		return;
-	}
+	/* remove vlan from VLVF table array */
+	err = igb_vlvf_set(adapter, vid, false, pf_id);
 
-	/* remove vid from vlvf if sr-iov is enabled,
-	 * if not in vlvf remove from vfta */
-	if (igb_vlvf_set(adapter, vid, false, pf_id))
+	/* if vid was not present in VLVF just remove it from table */
+	if (err)
 		igb_vfta_set(hw, vid, false);
 }
 
@@ -5220,6 +5656,7 @@
 
 int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
 {
+	struct pci_dev *pdev = adapter->pdev;
 	struct e1000_mac_info *mac = &adapter->hw.mac;
 
 	mac->autoneg = 0;
@@ -5243,8 +5680,7 @@
 		break;
 	case SPEED_1000 + DUPLEX_HALF: /* not supported */
 	default:
-		dev_err(&adapter->pdev->dev,
-			"Unsupported Speed/Duplex configuration\n");
+		dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
 		return -EINVAL;
 	}
 	return 0;
@@ -5266,9 +5702,7 @@
 	if (netif_running(netdev))
 		igb_close(netdev);
 
-	igb_reset_interrupt_capability(adapter);
-
-	igb_free_queues(adapter);
+	igb_clear_interrupt_scheme(adapter);
 
 #ifdef CONFIG_PM
 	retval = pci_save_state(pdev);
@@ -5300,7 +5734,7 @@
 		wr32(E1000_CTRL, ctrl);
 
 		/* Allow time for pending master requests to run */
-		igb_disable_pcie_master(&adapter->hw);
+		igb_disable_pcie_master(hw);
 
 		wr32(E1000_WUC, E1000_WUC_PME_EN);
 		wr32(E1000_WUFC, wufc);
@@ -5363,9 +5797,7 @@
 	pci_enable_wake(pdev, PCI_D3hot, 0);
 	pci_enable_wake(pdev, PCI_D3cold, 0);
 
-	igb_set_interrupt_capability(adapter);
-
-	if (igb_alloc_queues(adapter)) {
+	if (igb_init_interrupt_scheme(adapter)) {
 		dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
 		return -ENOMEM;
 	}
@@ -5417,22 +5849,16 @@
 	int i;
 
 	if (!adapter->msix_entries) {
+		struct igb_q_vector *q_vector = adapter->q_vector[0];
 		igb_irq_disable(adapter);
-		napi_schedule(&adapter->rx_ring[0].napi);
+		napi_schedule(&q_vector->napi);
 		return;
 	}
 
-	for (i = 0; i < adapter->num_tx_queues; i++) {
-		struct igb_ring *tx_ring = &adapter->tx_ring[i];
-		wr32(E1000_EIMC, tx_ring->eims_value);
-		igb_clean_tx_irq(tx_ring);
-		wr32(E1000_EIMS, tx_ring->eims_value);
-	}
-
-	for (i = 0; i < adapter->num_rx_queues; i++) {
-		struct igb_ring *rx_ring = &adapter->rx_ring[i];
-		wr32(E1000_EIMC, rx_ring->eims_value);
-		napi_schedule(&rx_ring->napi);
+	for (i = 0; i < adapter->num_q_vectors; i++) {
+		struct igb_q_vector *q_vector = adapter->q_vector[i];
+		wr32(E1000_EIMC, q_vector->eims_value);
+		napi_schedule(&q_vector->napi);
 	}
 }
 #endif /* CONFIG_NET_POLL_CONTROLLER */
@@ -5532,6 +5958,33 @@
 	igb_get_hw_control(adapter);
 }
 
+static void igb_rar_set_qsel(struct igb_adapter *adapter, u8 *addr, u32 index,
+                             u8 qsel)
+{
+	u32 rar_low, rar_high;
+	struct e1000_hw *hw = &adapter->hw;
+
+	/* HW expects these in little endian so we reverse the byte order
+	 * from network order (big endian) to little endian
+	 */
+	rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
+	          ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
+	rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
+
+	/* Indicate to hardware the Address is Valid. */
+	rar_high |= E1000_RAH_AV;
+
+	if (hw->mac.type == e1000_82575)
+		rar_high |= E1000_RAH_POOL_1 * qsel;
+	else
+		rar_high |= E1000_RAH_POOL_1 << qsel;
+
+	wr32(E1000_RAL(index), rar_low);
+	wrfl();
+	wr32(E1000_RAH(index), rar_high);
+	wrfl();
+}
+
 static int igb_set_vf_mac(struct igb_adapter *adapter,
                           int vf, unsigned char *mac_addr)
 {
@@ -5542,8 +5995,7 @@
 
 	memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
 
-	igb_rar_set(hw, mac_addr, rar_entry);
-	igb_set_rah_pool(hw, vf, rar_entry);
+	igb_rar_set_qsel(adapter, mac_addr, rar_entry, vf);
 
 	return 0;
 }
@@ -5551,19 +6003,29 @@
 static void igb_vmm_control(struct igb_adapter *adapter)
 {
 	struct e1000_hw *hw = &adapter->hw;
-	u32 reg_data;
+	u32 reg;
 
-	if (!adapter->vfs_allocated_count)
+	/* replication is not supported for 82575 */
+	if (hw->mac.type == e1000_82575)
 		return;
 
-	/* VF's need PF reset indication before they
-	 * can send/receive mail */
-	reg_data = rd32(E1000_CTRL_EXT);
-	reg_data |= E1000_CTRL_EXT_PFRSTD;
-	wr32(E1000_CTRL_EXT, reg_data);
+	/* enable replication vlan tag stripping */
+	reg = rd32(E1000_RPLOLR);
+	reg |= E1000_RPLOLR_STRVLAN;
+	wr32(E1000_RPLOLR, reg);
+
+	/* notify HW that the MAC is adding vlan tags */
+	reg = rd32(E1000_DTXCTL);
+	reg |= E1000_DTXCTL_VLAN_ADDED;
+	wr32(E1000_DTXCTL, reg);
 
-	igb_vmdq_set_loopback_pf(hw, true);
-	igb_vmdq_set_replication_pf(hw, true);
+	if (adapter->vfs_allocated_count) {
+		igb_vmdq_set_loopback_pf(hw, true);
+		igb_vmdq_set_replication_pf(hw, true);
+	} else {
+		igb_vmdq_set_loopback_pf(hw, false);
+		igb_vmdq_set_replication_pf(hw, false);
+	}
 }
 
 /* igb_main.c */
--- linux-mvl-dove-2.6.32.orig/drivers/net/igb/e1000_defines.h
+++ linux-mvl-dove-2.6.32/drivers/net/igb/e1000_defines.h
@@ -49,6 +49,7 @@
 #define E1000_CTRL_EXT_PFRSTD    0x00004000
 #define E1000_CTRL_EXT_LINK_MODE_MASK 0x00C00000
 #define E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES  0x00C00000
+#define E1000_CTRL_EXT_LINK_MODE_1000BASE_KX  0x00400000
 #define E1000_CTRL_EXT_LINK_MODE_SGMII   0x00800000
 #define E1000_CTRL_EXT_EIAME          0x01000000
 #define E1000_CTRL_EXT_IRCA           0x00000001
@@ -329,6 +330,7 @@
 #define E1000_ICR_RXDMT0        0x00000010 /* rx desc min. threshold (0) */
 #define E1000_ICR_RXT0          0x00000080 /* rx timer intr (ring 0) */
 #define E1000_ICR_VMMB          0x00000100 /* VM MB event */
+#define E1000_ICR_DRSTA         0x40000000 /* Device Reset Asserted */
 /* If this bit asserted, the driver should claim the interrupt */
 #define E1000_ICR_INT_ASSERTED  0x80000000
 /* LAN connected device generates an interrupt */
@@ -370,6 +372,7 @@
 #define E1000_IMS_RXSEQ     E1000_ICR_RXSEQ     /* rx sequence error */
 #define E1000_IMS_RXDMT0    E1000_ICR_RXDMT0    /* rx desc min. threshold */
 #define E1000_IMS_RXT0      E1000_ICR_RXT0      /* rx timer intr */
+#define E1000_IMS_DRSTA     E1000_ICR_DRSTA     /* Device Reset Asserted */
 #define E1000_IMS_DOUTSYNC  E1000_ICR_DOUTSYNC /* NIC DMA out of sync */
 
 /* Extended Interrupt Mask Set */
@@ -378,6 +381,7 @@
 /* Interrupt Cause Set */
 #define E1000_ICS_LSC       E1000_ICR_LSC       /* Link Status Change */
 #define E1000_ICS_RXDMT0    E1000_ICR_RXDMT0    /* rx desc min. threshold */
+#define E1000_ICS_DRSTA     E1000_ICR_DRSTA     /* Device Reset Aserted */
 
 /* Extended Interrupt Cause Set */
 
@@ -435,6 +439,39 @@
 /* Flow Control */
 #define E1000_FCRTL_XONE 0x80000000     /* Enable XON frame transmission */
 
+#define E1000_TSYNCTXCTL_VALID    0x00000001 /* tx timestamp valid */
+#define E1000_TSYNCTXCTL_ENABLED  0x00000010 /* enable tx timestampping */
+
+#define E1000_TSYNCRXCTL_VALID      0x00000001 /* rx timestamp valid */
+#define E1000_TSYNCRXCTL_TYPE_MASK  0x0000000E /* rx type mask */
+#define E1000_TSYNCRXCTL_TYPE_L2_V2       0x00
+#define E1000_TSYNCRXCTL_TYPE_L4_V1       0x02
+#define E1000_TSYNCRXCTL_TYPE_L2_L4_V2    0x04
+#define E1000_TSYNCRXCTL_TYPE_ALL         0x08
+#define E1000_TSYNCRXCTL_TYPE_EVENT_V2    0x0A
+#define E1000_TSYNCRXCTL_ENABLED    0x00000010 /* enable rx timestampping */
+
+#define E1000_TSYNCRXCFG_PTP_V1_CTRLT_MASK   0x000000FF
+#define E1000_TSYNCRXCFG_PTP_V1_SYNC_MESSAGE       0x00
+#define E1000_TSYNCRXCFG_PTP_V1_DELAY_REQ_MESSAGE  0x01
+#define E1000_TSYNCRXCFG_PTP_V1_FOLLOWUP_MESSAGE   0x02
+#define E1000_TSYNCRXCFG_PTP_V1_DELAY_RESP_MESSAGE 0x03
+#define E1000_TSYNCRXCFG_PTP_V1_MANAGEMENT_MESSAGE 0x04
+
+#define E1000_TSYNCRXCFG_PTP_V2_MSGID_MASK               0x00000F00
+#define E1000_TSYNCRXCFG_PTP_V2_SYNC_MESSAGE                 0x0000
+#define E1000_TSYNCRXCFG_PTP_V2_DELAY_REQ_MESSAGE            0x0100
+#define E1000_TSYNCRXCFG_PTP_V2_PATH_DELAY_REQ_MESSAGE       0x0200
+#define E1000_TSYNCRXCFG_PTP_V2_PATH_DELAY_RESP_MESSAGE      0x0300
+#define E1000_TSYNCRXCFG_PTP_V2_FOLLOWUP_MESSAGE             0x0800
+#define E1000_TSYNCRXCFG_PTP_V2_DELAY_RESP_MESSAGE           0x0900
+#define E1000_TSYNCRXCFG_PTP_V2_PATH_DELAY_FOLLOWUP_MESSAGE  0x0A00
+#define E1000_TSYNCRXCFG_PTP_V2_ANNOUNCE_MESSAGE             0x0B00
+#define E1000_TSYNCRXCFG_PTP_V2_SIGNALLING_MESSAGE           0x0C00
+#define E1000_TSYNCRXCFG_PTP_V2_MANAGEMENT_MESSAGE           0x0D00
+
+#define E1000_TIMINCA_16NS_SHIFT 24
+
 /* PCI Express Control */
 #define E1000_GCR_CMPL_TMOUT_MASK       0x0000F000
 #define E1000_GCR_CMPL_TMOUT_10ms       0x00001000
@@ -524,8 +561,12 @@
 #define NVM_ALT_MAC_ADDR_PTR       0x0037
 #define NVM_CHECKSUM_REG           0x003F
 
-#define E1000_NVM_CFG_DONE_PORT_0  0x40000 /* MNG config cycle done */
-#define E1000_NVM_CFG_DONE_PORT_1  0x80000 /* ...for second port */
+#define E1000_NVM_CFG_DONE_PORT_0  0x040000 /* MNG config cycle done */
+#define E1000_NVM_CFG_DONE_PORT_1  0x080000 /* ...for second port */
+#define E1000_NVM_CFG_DONE_PORT_2  0x100000 /* ...for third port */
+#define E1000_NVM_CFG_DONE_PORT_3  0x200000 /* ...for fourth port */
+
+#define NVM_82580_LAN_FUNC_OFFSET(a) (a ? (0x40 + (0x40 * a)) : 0)
 
 /* Mask bits for fields in Word 0x0f of the NVM */
 #define NVM_WORD0F_PAUSE_MASK       0x3000
@@ -592,6 +633,7 @@
  */
 #define M88E1111_I_PHY_ID    0x01410CC0
 #define IGP03E1000_E_PHY_ID  0x02A80390
+#define I82580_I_PHY_ID      0x015403A0
 #define M88_VENDOR           0x0141
 
 /* M88E1000 Specific Registers */
@@ -678,4 +720,8 @@
 #define E1000_VFTA_ENTRY_MASK                0x7F
 #define E1000_VFTA_ENTRY_BIT_SHIFT_MASK      0x1F
 
+/* DMA Coalescing register fields */
+#define E1000_PCIEMISC_LX_DECISION      0x00000080 /* Lx power decision based
+                                                      on DMA coal */
+
 #endif
--- linux-mvl-dove-2.6.32.orig/drivers/net/atl1e/atl1e_main.c
+++ linux-mvl-dove-2.6.32/drivers/net/atl1e/atl1e_main.c
@@ -1666,41 +1666,6 @@
 			}
 			return 0;
 		}
-
-		if (offload_type & SKB_GSO_TCPV6) {
-			real_len = (((unsigned char *)ipv6_hdr(skb) - skb->data)
-					+ ntohs(ipv6_hdr(skb)->payload_len));
-			if (real_len < skb->len)
-				pskb_trim(skb, real_len);
-
-			/* check payload == 0 byte ? */
-			hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
-			if (unlikely(skb->len == hdr_len)) {
-				/* only xsum need */
-				dev_warn(&pdev->dev,
-					"IPV6 tso with zero data??\n");
-				goto check_sum;
-			} else {
-				tcp_hdr(skb)->check = ~csum_ipv6_magic(
-						&ipv6_hdr(skb)->saddr,
-						&ipv6_hdr(skb)->daddr,
-						0, IPPROTO_TCP, 0);
-				tpd->word3 |= 1 << TPD_IP_VERSION_SHIFT;
-				hdr_len >>= 1;
-				tpd->word3 |= (hdr_len & TPD_V6_IPHLLO_MASK) <<
-					TPD_V6_IPHLLO_SHIFT;
-				tpd->word3 |= ((hdr_len >> 3) &
-					TPD_V6_IPHLHI_MASK) <<
-					TPD_V6_IPHLHI_SHIFT;
-				tpd->word3 |= (tcp_hdrlen(skb) >> 2 &
-					TPD_TCPHDRLEN_MASK) <<
-					TPD_TCPHDRLEN_SHIFT;
-				tpd->word3 |= ((skb_shinfo(skb)->gso_size) &
-					TPD_MSS_MASK) << TPD_MSS_SHIFT;
-					tpd->word3 |= 1 << TPD_SEGMENT_EN_SHIFT;
-			}
-		}
-		return 0;
 	}
 
 check_sum:
@@ -2289,7 +2254,6 @@
 		NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
 	netdev->features |= NETIF_F_LLTX;
 	netdev->features |= NETIF_F_TSO;
-	netdev->features |= NETIF_F_TSO6;
 
 	return 0;
 }
--- linux-mvl-dove-2.6.32.orig/drivers/net/atl1e/atl1e_ethtool.c
+++ linux-mvl-dove-2.6.32/drivers/net/atl1e/atl1e_ethtool.c
@@ -394,11 +394,13 @@
 	.get_eeprom             = atl1e_get_eeprom,
 	.set_eeprom             = atl1e_set_eeprom,
 	.get_tx_csum            = atl1e_get_tx_csum,
+	.set_tx_csum            = ethtool_op_set_tx_hw_csum,
 	.get_sg                 = ethtool_op_get_sg,
 	.set_sg                 = ethtool_op_set_sg,
 #ifdef NETIF_F_TSO
 	.get_tso                = ethtool_op_get_tso,
 #endif
+	.set_tso                = ethtool_op_set_tso,
 };
 
 void atl1e_set_ethtool_ops(struct net_device *netdev)
--- linux-mvl-dove-2.6.32.orig/drivers/net/igbvf/igbvf.h
+++ linux-mvl-dove-2.6.32/drivers/net/igbvf/igbvf.h
@@ -125,7 +125,6 @@
 			unsigned int page_offset;
 		};
 	};
-	struct page *page;
 };
 
 union igbvf_desc {
--- linux-mvl-dove-2.6.32.orig/drivers/net/e1000e/hw.h
+++ linux-mvl-dove-2.6.32/drivers/net/e1000e/hw.h
@@ -304,7 +304,7 @@
 #define E1000_KMRNCTRLSTA_DIAG_OFFSET	0x3    /* Kumeran Diagnostic */
 #define E1000_KMRNCTRLSTA_DIAG_NELPBK	0x1000 /* Nearend Loopback mode */
 #define E1000_KMRNCTRLSTA_K1_CONFIG	0x7
-#define E1000_KMRNCTRLSTA_K1_ENABLE	0x140E
+#define E1000_KMRNCTRLSTA_K1_ENABLE	0x0002
 #define E1000_KMRNCTRLSTA_K1_DISABLE	0x1400
 
 #define IFE_PHY_EXTENDED_STATUS_CONTROL	0x10
@@ -356,6 +356,7 @@
 #define E1000_DEV_ID_80003ES2LAN_COPPER_SPT	0x10BA
 #define E1000_DEV_ID_80003ES2LAN_SERDES_SPT	0x10BB
 
+#define E1000_DEV_ID_ICH8_82567V_3		0x1501
 #define E1000_DEV_ID_ICH8_IGP_M_AMT		0x1049
 #define E1000_DEV_ID_ICH8_IGP_AMT		0x104A
 #define E1000_DEV_ID_ICH8_IGP_C			0x104B
@@ -368,6 +369,7 @@
 #define E1000_DEV_ID_ICH9_IGP_M_AMT		0x10F5
 #define E1000_DEV_ID_ICH9_IGP_M			0x10BF
 #define E1000_DEV_ID_ICH9_IGP_M_V		0x10CB
+#define E1000_DEV_ID_ICH9_IGP_M_V_2		0x10BE
 #define E1000_DEV_ID_ICH9_IGP_C			0x294C
 #define E1000_DEV_ID_ICH9_IFE			0x10C0
 #define E1000_DEV_ID_ICH9_IFE_GT		0x10C3
--- linux-mvl-dove-2.6.32.orig/drivers/net/e1000e/netdev.c
+++ linux-mvl-dove-2.6.32/drivers/net/e1000e/netdev.c
@@ -482,14 +482,24 @@
 
 		length = le16_to_cpu(rx_desc->length);
 
-		/* !EOP means multiple descriptors were used to store a single
-		 * packet, also make sure the frame isn't just CRC only */
-		if (!(status & E1000_RXD_STAT_EOP) || (length <= 4)) {
+		/*
+		 * !EOP means multiple descriptors were used to store a single
+		 * packet, if that's the case we need to toss it.  In fact, we
+		 * need to toss every packet with the EOP bit clear and the
+		 * next frame that _does_ have the EOP bit set, as it is by
+		 * definition only a frame fragment
+		 */
+		if (unlikely(!(status & E1000_RXD_STAT_EOP)))
+			adapter->flags2 |= FLAG2_IS_DISCARDING;
+
+		if (adapter->flags2 & FLAG2_IS_DISCARDING) {
 			/* All receives must fit into a single buffer */
 			e_dbg("%s: Receive packet consumed multiple buffers\n",
 			      netdev->name);
 			/* recycle */
 			buffer_info->skb = skb;
+			if (status & E1000_RXD_STAT_EOP)
+				adapter->flags2 &= ~FLAG2_IS_DISCARDING;
 			goto next_desc;
 		}
 
@@ -655,6 +665,8 @@
 				i = 0;
 		}
 
+		if (i == tx_ring->next_to_use)
+			break;
 		eop = tx_ring->buffer_info[i].next_to_watch;
 		eop_desc = E1000_TX_DESC(*tx_ring, eop);
 	}
@@ -747,10 +759,16 @@
 				 PCI_DMA_FROMDEVICE);
 		buffer_info->dma = 0;
 
-		if (!(staterr & E1000_RXD_STAT_EOP)) {
+		/* see !EOP comment in other rx routine */
+		if (!(staterr & E1000_RXD_STAT_EOP))
+			adapter->flags2 |= FLAG2_IS_DISCARDING;
+
+		if (adapter->flags2 & FLAG2_IS_DISCARDING) {
 			e_dbg("%s: Packet Split buffers didn't pick up the "
 			      "full packet\n", netdev->name);
 			dev_kfree_skb_irq(skb);
+			if (staterr & E1000_RXD_STAT_EOP)
+				adapter->flags2 &= ~FLAG2_IS_DISCARDING;
 			goto next_desc;
 		}
 
@@ -1120,6 +1138,7 @@
 
 	rx_ring->next_to_clean = 0;
 	rx_ring->next_to_use = 0;
+	adapter->flags2 &= ~FLAG2_IS_DISCARDING;
 
 	writel(0, adapter->hw.hw_addr + rx_ring->head);
 	writel(0, adapter->hw.hw_addr + rx_ring->tail);
@@ -2330,18 +2349,6 @@
 	rctl &= ~E1000_RCTL_SZ_4096;
 	rctl |= E1000_RCTL_BSEX;
 	switch (adapter->rx_buffer_len) {
-	case 256:
-		rctl |= E1000_RCTL_SZ_256;
-		rctl &= ~E1000_RCTL_BSEX;
-		break;
-	case 512:
-		rctl |= E1000_RCTL_SZ_512;
-		rctl &= ~E1000_RCTL_BSEX;
-		break;
-	case 1024:
-		rctl |= E1000_RCTL_SZ_1024;
-		rctl &= ~E1000_RCTL_BSEX;
-		break;
 	case 2048:
 	default:
 		rctl |= E1000_RCTL_SZ_2048;
@@ -3066,13 +3073,18 @@
 
 	/* disable SERR in case the MSI write causes a master abort */
 	pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
-	pci_write_config_word(adapter->pdev, PCI_COMMAND,
-			      pci_cmd & ~PCI_COMMAND_SERR);
+	if (pci_cmd & PCI_COMMAND_SERR)
+		pci_write_config_word(adapter->pdev, PCI_COMMAND,
+				      pci_cmd & ~PCI_COMMAND_SERR);
 
 	err = e1000_test_msi_interrupt(adapter);
 
-	/* restore previous setting of command word */
-	pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
+	/* re-enable SERR */
+	if (pci_cmd & PCI_COMMAND_SERR) {
+		pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
+		pci_cmd |= PCI_COMMAND_SERR;
+		pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
+	}
 
 	/* success ! */
 	if (!err)
@@ -4321,13 +4333,7 @@
 	 * fragmented skbs
 	 */
 
-	if (max_frame <= 256)
-		adapter->rx_buffer_len = 256;
-	else if (max_frame <= 512)
-		adapter->rx_buffer_len = 512;
-	else if (max_frame <= 1024)
-		adapter->rx_buffer_len = 1024;
-	else if (max_frame <= 2048)
+	if (max_frame <= 2048)
 		adapter->rx_buffer_len = 2048;
 	else
 		adapter->rx_buffer_len = 4096;
@@ -5180,7 +5186,8 @@
 		/* APME bit in EEPROM is mapped to WUC.APME */
 		eeprom_data = er32(WUC);
 		eeprom_apme_mask = E1000_WUC_APME;
-		if (eeprom_data & E1000_WUC_PHY_WAKE)
+		if ((hw->mac.type > e1000_ich10lan) &&
+		    (eeprom_data & E1000_WUC_PHY_WAKE))
 			adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
 	} else if (adapter->flags & FLAG_APME_IN_CTRL3) {
 		if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
@@ -5361,6 +5368,7 @@
 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
+	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
 
 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
@@ -5371,6 +5379,7 @@
 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
+	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V_2), board_ich9lan },
 
 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
--- linux-mvl-dove-2.6.32.orig/drivers/net/e1000e/e1000.h
+++ linux-mvl-dove-2.6.32/drivers/net/e1000e/e1000.h
@@ -417,6 +417,7 @@
 /* CRC Stripping defines */
 #define FLAG2_CRC_STRIPPING               (1 << 0)
 #define FLAG2_HAS_PHY_WAKEUP              (1 << 1)
+#define FLAG2_IS_DISCARDING               (1 << 2)
 
 #define E1000_RX_DESC_PS(R, i)	    \
 	(&(((union e1000_rx_desc_packet_split *)((R).desc))[i]))
--- linux-mvl-dove-2.6.32.orig/drivers/net/e1000e/ich8lan.c
+++ linux-mvl-dove-2.6.32/drivers/net/e1000e/ich8lan.c
@@ -274,6 +274,16 @@
 	phy->ops.write_phy_reg_locked = e1000_write_phy_reg_hv_locked;
 	phy->autoneg_mask             = AUTONEG_ADVERTISE_SPEED_DEFAULT;
 
+	/*
+	 * Reset the PHY before any acccess to it.  Doing so, ensures that
+	 * the PHY is in a known good state before we read/write PHY registers.
+	 * The generic reset is sufficient here, because we haven't determined
+	 * the PHY type yet.
+	 */
+	ret_val = e1000e_phy_hw_reset_generic(hw);
+	if (ret_val)
+		goto out;
+
 	phy->id = e1000_phy_unknown;
 	e1000e_get_phy_id(hw);
 	phy->type = e1000e_get_phy_type_from_id(phy->id);
@@ -287,6 +297,7 @@
 		phy->ops.commit_phy = e1000e_phy_sw_reset;
 	}
 
+ out:
 	return ret_val;
 }
 
@@ -3209,6 +3220,7 @@
 	u32 phy_ctrl;
 
 	switch (hw->mac.type) {
+	case e1000_ich8lan:
 	case e1000_ich9lan:
 	case e1000_ich10lan:
 	case e1000_pchlan:
--- linux-mvl-dove-2.6.32.orig/drivers/net/benet/be.h
+++ linux-mvl-dove-2.6.32/drivers/net/benet/be.h
@@ -35,20 +35,31 @@
 #define DRV_VER			"2.101.205"
 #define DRV_NAME		"be2net"
 #define BE_NAME			"ServerEngines BladeEngine2 10Gbps NIC"
+#define BE3_NAME		"ServerEngines BladeEngine3 10Gbps NIC"
 #define OC_NAME			"Emulex OneConnect 10Gbps NIC"
+#define OC_NAME1		"Emulex OneConnect 10Gbps NIC (be3)"
 #define DRV_DESC		BE_NAME "Driver"
 
 #define BE_VENDOR_ID 		0x19a2
 #define BE_DEVICE_ID1		0x211
+#define BE_DEVICE_ID2		0x221
 #define OC_DEVICE_ID1		0x700
 #define OC_DEVICE_ID2		0x701
+#define OC_DEVICE_ID3		0x710
 
 static inline char *nic_name(struct pci_dev *pdev)
 {
-	if (pdev->device == OC_DEVICE_ID1 || pdev->device == OC_DEVICE_ID2)
+	switch (pdev->device) {
+	case OC_DEVICE_ID1:
+	case OC_DEVICE_ID2:
 		return OC_NAME;
-	else
+	case OC_DEVICE_ID3:
+		return OC_NAME1;
+	case BE_DEVICE_ID2:
+		return BE3_NAME;
+	default:
 		return BE_NAME;
+	}
 }
 
 /* Number of bytes of an RX frame that are copied to skb->data */
@@ -154,6 +165,7 @@
 	ulong be_tx_jiffies;
 	u64 be_tx_bytes;
 	u64 be_tx_bytes_prev;
+	u64 be_tx_pkts;
 	u32 be_tx_rate;
 
 	u32 cache_barrier[16];
@@ -165,6 +177,7 @@
 	ulong be_rx_jiffies;
 	u64 be_rx_bytes;
 	u64 be_rx_bytes_prev;
+	u64 be_rx_pkts;
 	u32 be_rx_rate;
 	/* number of non ether type II frames dropped where
 	 * frame len > length field of Mac Hdr */
@@ -261,8 +274,13 @@
 	u32 cap;
 	u32 rx_fc;		/* Rx flow control */
 	u32 tx_fc;		/* Tx flow control */
+	u8 generation;		/* BladeEngine ASIC generation */
 };
 
+/* BladeEngine Generation numbers */
+#define BE_GEN2 2
+#define BE_GEN3 3
+
 extern const struct ethtool_ops be_ethtool_ops;
 
 #define drvr_stats(adapter)		(&adapter->stats.drvr_stats)
--- linux-mvl-dove-2.6.32.orig/drivers/net/benet/be_main.c
+++ linux-mvl-dove-2.6.32/drivers/net/benet/be_main.c
@@ -31,8 +31,10 @@
 
 static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
 	{ PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
+	{ PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
 	{ PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
 	{ PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
+	{ PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID3) },
 	{ 0 }
 };
 MODULE_DEVICE_TABLE(pci, be_dev_ids);
@@ -144,13 +146,10 @@
 	struct net_device_stats *dev_stats = &adapter->stats.net_stats;
 	struct be_erx_stats *erx_stats = &hw_stats->erx;
 
-	dev_stats->rx_packets = port_stats->rx_total_frames;
-	dev_stats->tx_packets = port_stats->tx_unicastframes +
-		port_stats->tx_multicastframes + port_stats->tx_broadcastframes;
-	dev_stats->rx_bytes = (u64) port_stats->rx_bytes_msd << 32 |
-				(u64) port_stats->rx_bytes_lsd;
-	dev_stats->tx_bytes = (u64) port_stats->tx_bytes_msd << 32 |
-				(u64) port_stats->tx_bytes_lsd;
+	dev_stats->rx_packets = drvr_stats(adapter)->be_rx_pkts;
+	dev_stats->tx_packets = drvr_stats(adapter)->be_tx_pkts;
+	dev_stats->rx_bytes = drvr_stats(adapter)->be_rx_bytes;
+	dev_stats->tx_bytes = drvr_stats(adapter)->be_tx_bytes;
 
 	/* bad pkts received */
 	dev_stats->rx_errors = port_stats->rx_crc_errors +
@@ -307,12 +306,13 @@
 }
 
 static void be_tx_stats_update(struct be_adapter *adapter,
-			u32 wrb_cnt, u32 copied, bool stopped)
+			u32 wrb_cnt, u32 copied, u32 gso_segs, bool stopped)
 {
 	struct be_drvr_stats *stats = drvr_stats(adapter);
 	stats->be_tx_reqs++;
 	stats->be_tx_wrbs += wrb_cnt;
 	stats->be_tx_bytes += copied;
+	stats->be_tx_pkts += (gso_segs ? gso_segs : 1);
 	if (stopped)
 		stats->be_tx_stops++;
 }
@@ -460,7 +460,8 @@
 
 		be_txq_notify(adapter, txq->id, wrb_cnt);
 
-		be_tx_stats_update(adapter, wrb_cnt, copied, stopped);
+		be_tx_stats_update(adapter, wrb_cnt, copied,
+				skb_shinfo(skb)->gso_segs, stopped);
 	} else {
 		txq->head = start;
 		dev_kfree_skb_any(skb);
@@ -603,6 +604,7 @@
 	stats->be_rx_compl++;
 	stats->be_rx_frags += numfrags;
 	stats->be_rx_bytes += pktsize;
+	stats->be_rx_pkts++;
 }
 
 static inline bool do_pkt_csum(struct be_eth_rx_compl *rxcp, bool cso)
@@ -1942,6 +1944,7 @@
 static int be_map_pci_bars(struct be_adapter *adapter)
 {
 	u8 __iomem *addr;
+	int pcicfg_reg;
 
 	addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
 			pci_resource_len(adapter->pdev, 2));
@@ -1955,8 +1958,13 @@
 		goto pci_map_err;
 	adapter->db = addr;
 
-	addr = ioremap_nocache(pci_resource_start(adapter->pdev, 1),
-			pci_resource_len(adapter->pdev, 1));
+	if (adapter->generation == BE_GEN2)
+		pcicfg_reg = 1;
+	else
+		pcicfg_reg = 0;
+
+	addr = ioremap_nocache(pci_resource_start(adapter->pdev, pcicfg_reg),
+			pci_resource_len(adapter->pdev, pcicfg_reg));
 	if (addr == NULL)
 		goto pci_map_err;
 	adapter->pcicfg = addr;
@@ -2026,6 +2034,7 @@
 	cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
 	if (cmd->va == NULL)
 		return -1;
+	memset(cmd->va, 0, cmd->size);
 	return 0;
 }
 
@@ -2099,6 +2108,20 @@
 		goto rel_reg;
 	}
 	adapter = netdev_priv(netdev);
+
+	switch (pdev->device) {
+	case BE_DEVICE_ID1:
+	case OC_DEVICE_ID1:
+		adapter->generation = BE_GEN2;
+		break;
+	case BE_DEVICE_ID2:
+	case OC_DEVICE_ID2:
+		adapter->generation = BE_GEN3;
+		break;
+	default:
+		adapter->generation = 0;
+	}
+
 	adapter->pdev = pdev;
 	pci_set_drvdata(pdev, adapter);
 	adapter->netdev = netdev;
--- linux-mvl-dove-2.6.32.orig/drivers/net/benet/be_cmds.h
+++ linux-mvl-dove-2.6.32/drivers/net/benet/be_cmds.h
@@ -154,7 +154,8 @@
 	u8 domain;		/* dword 0 */
 	u32 timeout;		/* dword 1 */
 	u32 request_length;	/* dword 2 */
-	u32 rsvd;		/* dword 3 */
+	u8 version;		/* dword 3 */
+	u8 rsvd[3];		/* dword 3 */
 };
 
 #define RESP_HDR_INFO_OPCODE_SHIFT	0	/* bits 0 - 7 */
--- linux-mvl-dove-2.6.32.orig/drivers/net/arcnet/com20020-pci.c
+++ linux-mvl-dove-2.6.32/drivers/net/arcnet/com20020-pci.c
@@ -165,8 +165,8 @@
 	{ 0x1571, 0xa204, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_CAN_10MBIT },
 	{ 0x1571, 0xa205, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_CAN_10MBIT },
 	{ 0x1571, 0xa206, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_CAN_10MBIT },
-	{ 0x10B5, 0x9030, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_CAN_10MBIT },
-	{ 0x10B5, 0x9050, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_CAN_10MBIT },
+	{ 0x10B5, 0x9030, 0x10B5,     0x2978,     0, 0, ARC_CAN_10MBIT },
+	{ 0x10B5, 0x9050, 0x10B5,     0x2273,     0, 0, ARC_CAN_10MBIT },
 	{ 0x14BA, 0x6000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_CAN_10MBIT },
 	{ 0x10B5, 0x2200, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_CAN_10MBIT },
 	{0,}
--- linux-mvl-dove-2.6.32.orig/drivers/net/can/sja1000/sja1000.h
+++ linux-mvl-dove-2.6.32/drivers/net/can/sja1000/sja1000.h
@@ -165,6 +165,7 @@
 
 	void __iomem *reg_base;	 /* ioremap'ed address to registers */
 	unsigned long irq_flags; /* for request_irq() */
+	spinlock_t cmdreg_lock;  /* lock for concurrent cmd register writes */
 
 	u16 flags;		/* custom mode flags */
 	u8 ocr;			/* output control register */
--- linux-mvl-dove-2.6.32.orig/drivers/net/can/sja1000/sja1000.c
+++ linux-mvl-dove-2.6.32/drivers/net/can/sja1000/sja1000.c
@@ -84,6 +84,20 @@
 	.brp_inc = 1,
 };
 
+static void sja1000_write_cmdreg(struct sja1000_priv *priv, u8 val)
+{
+	unsigned long flags;
+
+	/*
+	 * The command register needs some locking and time to settle
+	 * the write_reg() operation - especially on SMP systems.
+	 */
+	spin_lock_irqsave(&priv->cmdreg_lock, flags);
+	priv->write_reg(priv, REG_CMR, val);
+	priv->read_reg(priv, REG_SR);
+	spin_unlock_irqrestore(&priv->cmdreg_lock, flags);
+}
+
 static int sja1000_probe_chip(struct net_device *dev)
 {
 	struct sja1000_priv *priv = netdev_priv(dev);
@@ -279,7 +293,7 @@
 
 	can_put_echo_skb(skb, dev, 0);
 
-	priv->write_reg(priv, REG_CMR, CMD_TR);
+	sja1000_write_cmdreg(priv, CMD_TR);
 
 	return NETDEV_TX_OK;
 }
@@ -334,7 +348,7 @@
 		cf->data[i++] = 0;
 
 	/* release receive buffer */
-	priv->write_reg(priv, REG_CMR, CMD_RRB);
+	sja1000_write_cmdreg(priv, CMD_RRB);
 
 	netif_rx(skb);
 
@@ -368,7 +382,7 @@
 		cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
 		stats->rx_over_errors++;
 		stats->rx_errors++;
-		priv->write_reg(priv, REG_CMR, CMD_CDO);	/* clear bit */
+		sja1000_write_cmdreg(priv, CMD_CDO);	/* clear bit */
 	}
 
 	if (isrc & IRQ_EI) {
--- linux-mvl-dove-2.6.32.orig/drivers/net/tulip/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/net/tulip/Kconfig
@@ -101,6 +101,10 @@
 
 	  If in doubt, say Y.
 
+config TULIP_DM910X
+	def_bool y
+	depends on TULIP && SPARC
+
 config DE4X5
 	tristate "Generic DECchip & DIGITAL EtherWORKS PCI/EISA"
 	depends on PCI || EISA
--- linux-mvl-dove-2.6.32.orig/drivers/net/tulip/dmfe.c
+++ linux-mvl-dove-2.6.32/drivers/net/tulip/dmfe.c
@@ -92,6 +92,10 @@
 #include <asm/uaccess.h>
 #include <asm/irq.h>
 
+#ifdef CONFIG_TULIP_DM910X
+#include <linux/of.h>
+#endif
+
 
 /* Board/System/Debug information/definition ---------------- */
 #define PCI_DM9132_ID   0x91321282      /* Davicom DM9132 ID */
@@ -377,6 +381,23 @@
 	if (!printed_version++)
 		printk(version);
 
+	/*
+	 *	SPARC on-board DM910x chips should be handled by the main
+	 *	tulip driver, except for early DM9100s.
+	 */
+#ifdef CONFIG_TULIP_DM910X
+	if ((ent->driver_data == PCI_DM9100_ID && pdev->revision >= 0x30) ||
+	    ent->driver_data == PCI_DM9102_ID) {
+		struct device_node *dp = pci_device_to_OF_node(pdev);
+
+		if (dp && of_get_property(dp, "local-mac-address", NULL)) {
+			printk(KERN_INFO DRV_NAME
+			       ": skipping on-board DM910x (use tulip)\n");
+			return -ENODEV;
+		}
+	}
+#endif
+
 	/* Init network device */
 	dev = alloc_etherdev(sizeof(*db));
 	if (dev == NULL)
--- linux-mvl-dove-2.6.32.orig/drivers/net/tulip/tulip_core.c
+++ linux-mvl-dove-2.6.32/drivers/net/tulip/tulip_core.c
@@ -196,9 +196,13 @@
 	| HAS_NWAY | HAS_PCI_MWI, tulip_timer, tulip_media_task },
 
   /* DM910X */
+#ifdef CONFIG_TULIP_DM910X
   { "Davicom DM9102/DM9102A", 128, 0x0001ebef,
 	HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | HAS_ACPI,
 	tulip_timer, tulip_media_task },
+#else
+  { NULL },
+#endif
 
   /* RS7112 */
   { "Conexant LANfinity", 256, 0x0001ebef,
@@ -228,8 +232,10 @@
 	{ 0x1259, 0xa120, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
 	{ 0x11F6, 0x9881, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMPEX9881 },
 	{ 0x8086, 0x0039, PCI_ANY_ID, PCI_ANY_ID, 0, 0, I21145 },
+#ifdef CONFIG_TULIP_DM910X
 	{ 0x1282, 0x9100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X },
 	{ 0x1282, 0x9102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X },
+#endif
 	{ 0x1113, 0x1216, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
 	{ 0x1113, 0x1217, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98715 },
 	{ 0x1113, 0x9511, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
@@ -243,6 +249,7 @@
 	{ 0x17B3, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
 	{ 0x10b7, 0x9300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* 3Com 3CSOHO100B-TX */
 	{ 0x14ea, 0xab08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* Planex FNW-3602-TX */
+	{ 0x1414, 0x0001, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* Microsoft MN-120 */
 	{ 0x1414, 0x0002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
 	{ } /* terminate list */
 };
@@ -1299,18 +1306,30 @@
 	}
 
 	/*
-	 *	Early DM9100's need software CRC and the DMFE driver
+	 *	DM910x chips should be handled by the dmfe driver, except
+	 *	on-board chips on SPARC systems.  Also, early DM9100s need
+	 *	software CRC which only the dmfe driver supports.
 	 */
 
-	if (pdev->vendor == 0x1282 && pdev->device == 0x9100)
-	{
-		/* Read Chip revision */
-		if (pdev->revision < 0x30)
-		{
-			printk(KERN_ERR PFX "skipping early DM9100 with Crc bug (use dmfe)\n");
+#ifdef CONFIG_TULIP_DM910X
+	if (chip_idx == DM910X) {
+		struct device_node *dp;
+
+		if (pdev->vendor == 0x1282 && pdev->device == 0x9100 &&
+		    pdev->revision < 0x30) {
+			printk(KERN_INFO PFX
+			       "skipping early DM9100 with Crc bug (use dmfe)\n");
+			return -ENODEV;
+		}
+
+		dp = pci_device_to_OF_node(pdev);
+		if (!(dp && of_get_property(dp, "local-mac-address", NULL))) {
+			printk(KERN_INFO PFX
+			       "skipping DM910x expansion card (use dmfe)\n");
 			return -ENODEV;
 		}
 	}
+#endif
 
 	/*
 	 *	Looks for early PCI chipsets where people report hangs
--- linux-mvl-dove-2.6.32.orig/drivers/net/vmxnet3/vmxnet3_ethtool.c
+++ linux-mvl-dove-2.6.32/drivers/net/vmxnet3/vmxnet3_ethtool.c
@@ -288,6 +288,9 @@
 		/* toggle the LRO feature*/
 		netdev->features ^= NETIF_F_LRO;
 
+		/* Update private LRO flag */
+		adapter->lro = lro_requested;
+
 		/* update harware LRO capability accordingly */
 		if (lro_requested)
 			adapter->shared->devRead.misc.uptFeatures &= UPT1_F_LRO;
--- linux-mvl-dove-2.6.32.orig/drivers/net/usb/hso.c
+++ linux-mvl-dove-2.6.32/drivers/net/usb/hso.c
@@ -1634,6 +1634,8 @@
 	struct uart_icount cnow;
 	struct hso_tiocmget  *tiocmget = serial->tiocmget;
 
+	memset(&icount, 0, sizeof(struct serial_icounter_struct));
+
 	if (!tiocmget)
 		 return -ENOENT;
 	spin_lock_irq(&serial->serial_lock);
--- linux-mvl-dove-2.6.32.orig/drivers/net/usb/rtl8150.c
+++ linux-mvl-dove-2.6.32/drivers/net/usb/rtl8150.c
@@ -324,7 +324,7 @@
 		dbg("%02X:", netdev->dev_addr[i]);
 	dbg("%02X\n", netdev->dev_addr[i]);
 	/* Set the IDR registers. */
-	set_registers(dev, IDR, sizeof(netdev->dev_addr), netdev->dev_addr);
+	set_registers(dev, IDR, netdev->addr_len, netdev->dev_addr);
 #ifdef EEPROM_WRITE
 	{
 	u8 cr;
--- linux-mvl-dove-2.6.32.orig/drivers/net/usb/cdc-phonet.c
+++ linux-mvl-dove-2.6.32/drivers/net/usb/cdc-phonet.c
@@ -325,13 +325,13 @@
 {
 	static const char ifname[] = "usbpn%d";
 	const struct usb_cdc_union_desc *union_header = NULL;
-	const struct usb_cdc_header_desc *phonet_header = NULL;
 	const struct usb_host_interface *data_desc;
 	struct usb_interface *data_intf;
 	struct usb_device *usbdev = interface_to_usbdev(intf);
 	struct net_device *dev;
 	struct usbpn_dev *pnd;
 	u8 *data;
+	int phonet = 0;
 	int len, err;
 
 	data = intf->altsetting->extra;
@@ -352,10 +352,7 @@
 					(struct usb_cdc_union_desc *)data;
 				break;
 			case 0xAB:
-				if (phonet_header || dlen < 5)
-					break;
-				phonet_header =
-					(struct usb_cdc_header_desc *)data;
+				phonet = 1;
 				break;
 			}
 		}
@@ -363,7 +360,7 @@
 		len -= dlen;
 	}
 
-	if (!union_header || !phonet_header)
+	if (!union_header || !phonet)
 		return -EINVAL;
 
 	data_intf = usb_ifnum_to_if(usbdev, union_header->bSlaveInterface0);
--- linux-mvl-dove-2.6.32.orig/drivers/net/usb/dm9601.c
+++ linux-mvl-dove-2.6.32/drivers/net/usb/dm9601.c
@@ -238,7 +238,7 @@
 		goto out;
 
 	dm_write_reg(dev, DM_SHARED_ADDR, phy ? (reg | 0x40) : reg);
-	dm_write_reg(dev, DM_SHARED_CTRL, phy ? 0x1c : 0x14);
+	dm_write_reg(dev, DM_SHARED_CTRL, phy ? 0x1a : 0x12);
 
 	for (i = 0; i < DM_TIMEOUT; i++) {
 		u8 tmp;
--- linux-mvl-dove-2.6.32.orig/drivers/net/usb/asix.c
+++ linux-mvl-dove-2.6.32/drivers/net/usb/asix.c
@@ -54,6 +54,7 @@
 #define AX_CMD_WRITE_IPG0		0x12
 #define AX_CMD_WRITE_IPG1		0x13
 #define AX_CMD_READ_NODE_ID		0x13
+#define AX_CMD_WRITE_NODE_ID		0x14
 #define AX_CMD_WRITE_IPG2		0x14
 #define AX_CMD_WRITE_MULTI_FILTER	0x16
 #define AX88172_CMD_READ_NODE_ID	0x17
@@ -165,6 +166,7 @@
 /* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes */
 struct asix_data {
 	u8 multi_filter[AX_MCAST_FILTER_SIZE];
+	u8 mac_addr[ETH_ALEN];
 	u8 phymode;
 	u8 ledmode;
 	u8 eeprom_len;
@@ -728,6 +730,30 @@
 	return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
 }
 
+static int asix_set_mac_address(struct net_device *net, void *p)
+{
+	struct usbnet *dev = netdev_priv(net);
+	struct asix_data *data = (struct asix_data *)&dev->data;
+	struct sockaddr *addr = p;
+
+	if (netif_running(net))
+		return -EBUSY;
+	if (!is_valid_ether_addr(addr->sa_data))
+		return -EADDRNOTAVAIL;
+
+	memcpy(net->dev_addr, addr->sa_data, ETH_ALEN);
+
+	/* We use the 20 byte dev->data
+	 * for our 6 byte mac buffer
+	 * to avoid allocating memory that
+	 * is tricky to free later */
+	memcpy(data->mac_addr, addr->sa_data, ETH_ALEN);
+	asix_write_cmd_async(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
+							data->mac_addr);
+
+	return 0;
+}
+
 /* We need to override some ethtool_ops so we require our
    own structure so we don't interfere with other usbnet
    devices that may be connected at the same time. */
@@ -915,7 +941,7 @@
 	.ndo_start_xmit		= usbnet_start_xmit,
 	.ndo_tx_timeout		= usbnet_tx_timeout,
 	.ndo_change_mtu		= usbnet_change_mtu,
-	.ndo_set_mac_address 	= eth_mac_addr,
+	.ndo_set_mac_address 	= asix_set_mac_address,
 	.ndo_validate_addr	= eth_validate_addr,
 	.ndo_do_ioctl		= asix_ioctl,
 	.ndo_set_multicast_list = asix_set_multicast,
@@ -1208,7 +1234,7 @@
 	.ndo_stop		= usbnet_stop,
 	.ndo_start_xmit		= usbnet_start_xmit,
 	.ndo_tx_timeout		= usbnet_tx_timeout,
-	.ndo_set_mac_address 	= eth_mac_addr,
+	.ndo_set_mac_address 	= asix_set_mac_address,
 	.ndo_validate_addr	= eth_validate_addr,
 	.ndo_set_multicast_list = asix_set_multicast,
 	.ndo_do_ioctl 		= asix_ioctl,
--- linux-mvl-dove-2.6.32.orig/drivers/gpio/pca953x.c
+++ linux-mvl-dove-2.6.32/drivers/gpio/pca953x.c
@@ -350,12 +350,60 @@
 	return 0;
 }
 
+#ifdef CONFIG_PM
+static int pca953x_suspend(struct i2c_client *client, pm_message_t state)
+{
+	struct pca953x_platform_data *pdata = client->dev.platform_data;
+	struct pca953x_chip *chip = i2c_get_clientdata(client);
+	int ret;
+
+	ret = pca953x_read_reg(chip, PCA953X_OUTPUT, &chip->reg_output);
+	if (ret)
+		return ret;
+
+	ret = pca953x_read_reg(chip, PCA953X_DIRECTION, &chip->reg_direction);
+
+	return ret;
+}
+
+static int pca953x_resume(struct i2c_client *client)
+{
+	struct pca953x_platform_data *pdata = client->dev.platform_data;
+	struct pca953x_chip *chip = i2c_get_clientdata(client);
+	uint16_t reg_val;
+	int ret = 0;
+
+	/* set platform specific polarity inversion */
+	ret = pca953x_write_reg(chip, PCA953X_INVERT, pdata->invert);
+	if (ret)
+		return ret;
+
+	ret = pca953x_write_reg(chip, PCA953X_OUTPUT, chip->reg_output);
+	if (ret)
+		return ret;
+
+	ret = pca953x_write_reg(chip, PCA953X_DIRECTION, chip->reg_direction);
+
+	if (ret)
+		return ret;
+
+	ret = pca953x_read_reg(chip, PCA953X_INPUT, &reg_val);
+	return ret;
+}
+
+#else
+#define pca953x_suspend	NULL
+#define pca953x_resume	NULL
+#endif
+
 static struct i2c_driver pca953x_driver = {
 	.driver = {
 		.name	= "pca953x",
 	},
 	.probe		= pca953x_probe,
 	.remove		= pca953x_remove,
+	.suspend	= pca953x_suspend,
+	.resume		= pca953x_resume,
 	.id_table	= pca953x_id,
 };
 
--- linux-mvl-dove-2.6.32.orig/drivers/gpio/wm831x-gpio.c
+++ linux-mvl-dove-2.6.32/drivers/gpio/wm831x-gpio.c
@@ -61,23 +61,31 @@
 		return 0;
 }
 
-static int wm831x_gpio_direction_out(struct gpio_chip *chip,
-				     unsigned offset, int value)
+static void wm831x_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
 {
 	struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip);
 	struct wm831x *wm831x = wm831x_gpio->wm831x;
 
-	return wm831x_set_bits(wm831x, WM831X_GPIO1_CONTROL + offset,
-			       WM831X_GPN_DIR | WM831X_GPN_TRI, 0);
+	wm831x_set_bits(wm831x, WM831X_GPIO_LEVEL, 1 << offset,
+			value << offset);
 }
 
-static void wm831x_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
+static int wm831x_gpio_direction_out(struct gpio_chip *chip,
+				     unsigned offset, int value)
 {
 	struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip);
 	struct wm831x *wm831x = wm831x_gpio->wm831x;
+	int ret;
 
-	wm831x_set_bits(wm831x, WM831X_GPIO_LEVEL, 1 << offset,
-			value << offset);
+	ret = wm831x_set_bits(wm831x, WM831X_GPIO1_CONTROL + offset,
+			      WM831X_GPN_DIR | WM831X_GPN_TRI, 0);
+	if (ret < 0)
+		return ret;
+
+	/* Can only set GPIO state once it's in output mode */
+	wm831x_gpio_set(chip, offset, value);
+
+	return 0;
 }
 
 #ifdef CONFIG_DEBUG_FS
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/st.h
+++ linux-mvl-dove-2.6.32/drivers/scsi/st.h
@@ -46,6 +46,7 @@
 	struct st_request *last_SRpnt;
 	struct st_cmdstatus cmdstat;
 	struct page **reserved_pages;
+	int reserved_page_order;
 	struct page **mapped_pages;
 	struct rq_map_data map_data;
 	unsigned char *b_data;
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/ses.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/ses.c
@@ -157,6 +157,10 @@
 	return NULL;
 }
 
+/* For device slot and array device slot elements, byte 3 bit 6
+ * is "fault sensed" while byte 3 bit 5 is "fault reqstd". As this
+ * code stands these bits are shifted 4 positions right so in
+ * sysfs they will appear as bits 2 and 1 respectively. Strange. */
 static void ses_get_fault(struct enclosure_device *edev,
 			  struct enclosure_component *ecomp)
 {
@@ -178,7 +182,7 @@
 		/* zero is disabled */
 		break;
 	case ENCLOSURE_SETTING_ENABLED:
-		desc[2] = 0x02;
+		desc[3] = 0x20;
 		break;
 	default:
 		/* SES doesn't do the SGPIO blink settings */
@@ -389,9 +393,9 @@
 		len = (desc_ptr[2] << 8) + desc_ptr[3];
 		/* skip past overall descriptor */
 		desc_ptr += len + 4;
-		if (ses_dev->page10)
-			addl_desc_ptr = ses_dev->page10 + 8;
 	}
+	if (ses_dev->page10)
+		addl_desc_ptr = ses_dev->page10 + 8;
 	type_ptr = ses_dev->page1 + 12 + ses_dev->page1[11];
 	components = 0;
 	for (i = 0; i < types; i++, type_ptr += 4) {
@@ -591,8 +595,6 @@
 		ses_dev->page10_len = len;
 		buf = NULL;
 	}
-	kfree(hdr_buf);
-
 	scomp = kzalloc(sizeof(struct ses_component) * components, GFP_KERNEL);
 	if (!scomp)
 		goto err_free;
@@ -604,6 +606,8 @@
 		goto err_free;
 	}
 
+	kfree(hdr_buf);
+
 	edev->scratch = ses_dev;
 	for (i = 0; i < components; i++)
 		edev->component[i].scratch = scomp + i;
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/scsi_debug.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/scsi_debug.c
@@ -914,7 +914,8 @@
 static sector_t get_sdebug_capacity(void)
 {
 	if (scsi_debug_virtual_gb > 0)
-		return 2048 * 1024 * (sector_t)scsi_debug_virtual_gb;
+		return (sector_t)scsi_debug_virtual_gb *
+			(1073741824 / scsi_debug_sector_size);
 	else
 		return sdebug_store_sectors;
 }
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/hosts.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/hosts.c
@@ -180,14 +180,20 @@
 EXPORT_SYMBOL(scsi_remove_host);
 
 /**
- * scsi_add_host - add a scsi host
+ * scsi_add_host_with_dma - add a scsi host with dma device
  * @shost:	scsi host pointer to add
  * @dev:	a struct device of type scsi class
+ * @dma_dev:	dma device for the host
+ *
+ * Note: You rarely need to worry about this unless you're in a
+ * virtualised host environments, so use the simpler scsi_add_host()
+ * function instead.
  *
  * Return value: 
  * 	0 on success / != 0 for error
  **/
-int scsi_add_host(struct Scsi_Host *shost, struct device *dev)
+int scsi_add_host_with_dma(struct Scsi_Host *shost, struct device *dev,
+			   struct device *dma_dev)
 {
 	struct scsi_host_template *sht = shost->hostt;
 	int error = -EINVAL;
@@ -207,6 +213,7 @@
 
 	if (!shost->shost_gendev.parent)
 		shost->shost_gendev.parent = dev ? dev : &platform_bus;
+	shost->dma_dev = dma_dev;
 
 	error = device_add(&shost->shost_gendev);
 	if (error)
@@ -262,7 +269,7 @@
  fail:
 	return error;
 }
-EXPORT_SYMBOL(scsi_add_host);
+EXPORT_SYMBOL(scsi_add_host_with_dma);
 
 static void scsi_host_dev_release(struct device *dev)
 {
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/scsi_transport_iscsi.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/scsi_transport_iscsi.c
@@ -627,8 +627,10 @@
 	spin_unlock_irqrestore(&session->lock, flags);
 	scsi_target_block(&session->dev);
 	ISCSI_DBG_TRANS_SESSION(session, "Completed SCSI target blocking\n");
-	queue_delayed_work(iscsi_eh_timer_workq, &session->recovery_work,
-			   session->recovery_tmo * HZ);
+	if (session->recovery_tmo >= 0)
+		queue_delayed_work(iscsi_eh_timer_workq,
+				   &session->recovery_work,
+				   session->recovery_tmo * HZ);
 }
 
 void iscsi_block_session(struct iscsi_cls_session *session)
@@ -1348,8 +1350,7 @@
 	switch (ev->u.set_param.param) {
 	case ISCSI_PARAM_SESS_RECOVERY_TMO:
 		sscanf(data, "%d", &value);
-		if (value != 0)
-			session->recovery_tmo = value;
+		session->recovery_tmo = value;
 		break;
 	default:
 		err = transport->set_param(conn, ev->u.set_param.param,
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/scsi_lib.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/scsi_lib.c
@@ -749,9 +749,9 @@
 			 */
 			req->next_rq->resid_len = scsi_in(cmd)->resid;
 
+			scsi_release_buffers(cmd);
 			blk_end_request_all(req, 0);
 
-			scsi_release_buffers(cmd);
 			scsi_next_command(cmd);
 			return;
 		}
@@ -773,8 +773,14 @@
 	 * we already took a copy of the original into rq->errors which
 	 * is what gets returned to the user
 	 */
-	if (sense_valid && sshdr.sense_key == RECOVERED_ERROR) {
-		if (!(req->cmd_flags & REQ_QUIET))
+	if (sense_valid && (sshdr.sense_key == RECOVERED_ERROR)) {
+		/* if ATA PASS-THROUGH INFORMATION AVAILABLE skip
+		 * print since caller wants ATA registers. Only occurs on
+		 * SCSI ATA PASS_THROUGH commands when CK_COND=1
+		 */
+		if ((sshdr.asc == 0x0) && (sshdr.ascq == 0x1d))
+			;
+		else if (!(req->cmd_flags & REQ_QUIET))
 			scsi_print_sense("", cmd);
 		result = 0;
 		/* BLOCK_PC may have set error */
@@ -1630,9 +1636,8 @@
 
 	blk_queue_max_segment_size(q, dma_get_max_seg_size(dev));
 
-	/* New queue, no concurrency on queue_flags */
 	if (!shost->use_clustering)
-		queue_flag_clear_unlocked(QUEUE_FLAG_CLUSTER, q);
+		q->limits.cluster = 0;
 
 	/*
 	 * set a reasonable default alignment on word boundaries: the
@@ -2426,7 +2431,8 @@
 		sdev->sdev_state = SDEV_RUNNING;
 	else if (sdev->sdev_state == SDEV_CREATED_BLOCK)
 		sdev->sdev_state = SDEV_CREATED;
-	else
+	else if (sdev->sdev_state != SDEV_CANCEL &&
+		 sdev->sdev_state != SDEV_OFFLINE)
 		return -EINVAL;
 
 	spin_lock_irqsave(q->queue_lock, flags);
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/pmcraid.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/pmcraid.c
@@ -3508,6 +3508,9 @@
 			rc = -EFAULT;
 			goto out_free_buffer;
 		}
+	} else if (request_size < 0) {
+		rc = -EINVAL;
+		goto out_free_buffer;
 	}
 
 	/* check if we have any additional command parameters */
@@ -3554,6 +3557,9 @@
 			pmcraid_err("couldn't build passthrough ioadls\n");
 			goto out_free_buffer;
 		}
+	} else if (request_size < 0) {
+		rc = -EINVAL;
+		goto out_free_buffer;
 	}
 
 	/* If data is being written into the device, copy the data from user
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/scsi/Kconfig
@@ -521,6 +521,7 @@
 source "drivers/scsi/aic7xxx/Kconfig.aic79xx"
 source "drivers/scsi/aic94xx/Kconfig"
 source "drivers/scsi/mvsas/Kconfig"
+source "drivers/scsi/mvumi/Kconfig"
 
 config SCSI_DPT_I2O
 	tristate "Adaptec I2O RAID support "
@@ -621,6 +622,14 @@
 	  substantial, so users of MultiMaster Host Adapters may not
 	  wish to include it.
 
+config VMWARE_PVSCSI
+	tristate "VMware PVSCSI driver support"
+	depends on PCI && SCSI && X86
+	help
+	  This driver supports VMware's para virtualized SCSI HBA.
+	  To compile this driver as a module, choose M here: the
+	  module will be called vmw_pvscsi.
+
 config LIBFC
 	tristate "LibFC module"
 	select SCSI_FC_ATTRS
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/vmw_pvscsi.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/vmw_pvscsi.c
@@ -0,0 +1,1407 @@
+/*
+ * Linux driver for VMware's para-virtualized SCSI HBA.
+ *
+ * Copyright (C) 2008-2009, VMware, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; version 2 of the License and no later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
+ * NON INFRINGEMENT.  See the GNU General Public License for more
+ * details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Maintained by: Alok N Kataria <akataria@vmware.com>
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/workqueue.h>
+#include <linux/pci.h>
+
+#include <scsi/scsi.h>
+#include <scsi/scsi_host.h>
+#include <scsi/scsi_cmnd.h>
+#include <scsi/scsi_device.h>
+
+#include "vmw_pvscsi.h"
+
+#define PVSCSI_LINUX_DRIVER_DESC "VMware PVSCSI driver"
+
+MODULE_DESCRIPTION(PVSCSI_LINUX_DRIVER_DESC);
+MODULE_AUTHOR("VMware, Inc.");
+MODULE_LICENSE("GPL");
+MODULE_VERSION(PVSCSI_DRIVER_VERSION_STRING);
+
+#define PVSCSI_DEFAULT_NUM_PAGES_PER_RING	8
+#define PVSCSI_DEFAULT_NUM_PAGES_MSG_RING	1
+#define PVSCSI_DEFAULT_QUEUE_DEPTH		64
+#define SGL_SIZE				PAGE_SIZE
+
+struct pvscsi_sg_list {
+	struct PVSCSISGElement sge[PVSCSI_MAX_NUM_SG_ENTRIES_PER_SEGMENT];
+};
+
+struct pvscsi_ctx {
+	/*
+	 * The index of the context in cmd_map serves as the context ID for a
+	 * 1-to-1 mapping completions back to requests.
+	 */
+	struct scsi_cmnd	*cmd;
+	struct pvscsi_sg_list	*sgl;
+	struct list_head	list;
+	dma_addr_t		dataPA;
+	dma_addr_t		sensePA;
+	dma_addr_t		sglPA;
+};
+
+struct pvscsi_adapter {
+	char				*mmioBase;
+	unsigned int			irq;
+	u8				rev;
+	bool				use_msi;
+	bool				use_msix;
+	bool				use_msg;
+
+	spinlock_t			hw_lock;
+
+	struct workqueue_struct		*workqueue;
+	struct work_struct		work;
+
+	struct PVSCSIRingReqDesc	*req_ring;
+	unsigned			req_pages;
+	unsigned			req_depth;
+	dma_addr_t			reqRingPA;
+
+	struct PVSCSIRingCmpDesc	*cmp_ring;
+	unsigned			cmp_pages;
+	dma_addr_t			cmpRingPA;
+
+	struct PVSCSIRingMsgDesc	*msg_ring;
+	unsigned			msg_pages;
+	dma_addr_t			msgRingPA;
+
+	struct PVSCSIRingsState		*rings_state;
+	dma_addr_t			ringStatePA;
+
+	struct pci_dev			*dev;
+	struct Scsi_Host		*host;
+
+	struct list_head		cmd_pool;
+	struct pvscsi_ctx		*cmd_map;
+};
+
+
+/* Command line parameters */
+static int pvscsi_ring_pages     = PVSCSI_DEFAULT_NUM_PAGES_PER_RING;
+static int pvscsi_msg_ring_pages = PVSCSI_DEFAULT_NUM_PAGES_MSG_RING;
+static int pvscsi_cmd_per_lun    = PVSCSI_DEFAULT_QUEUE_DEPTH;
+static bool pvscsi_disable_msi;
+static bool pvscsi_disable_msix;
+static bool pvscsi_use_msg       = true;
+
+#define PVSCSI_RW (S_IRUSR | S_IWUSR)
+
+module_param_named(ring_pages, pvscsi_ring_pages, int, PVSCSI_RW);
+MODULE_PARM_DESC(ring_pages, "Number of pages per req/cmp ring - (default="
+		 __stringify(PVSCSI_DEFAULT_NUM_PAGES_PER_RING) ")");
+
+module_param_named(msg_ring_pages, pvscsi_msg_ring_pages, int, PVSCSI_RW);
+MODULE_PARM_DESC(msg_ring_pages, "Number of pages for the msg ring - (default="
+		 __stringify(PVSCSI_DEFAULT_NUM_PAGES_MSG_RING) ")");
+
+module_param_named(cmd_per_lun, pvscsi_cmd_per_lun, int, PVSCSI_RW);
+MODULE_PARM_DESC(cmd_per_lun, "Maximum commands per lun - (default="
+		 __stringify(PVSCSI_MAX_REQ_QUEUE_DEPTH) ")");
+
+module_param_named(disable_msi, pvscsi_disable_msi, bool, PVSCSI_RW);
+MODULE_PARM_DESC(disable_msi, "Disable MSI use in driver - (default=0)");
+
+module_param_named(disable_msix, pvscsi_disable_msix, bool, PVSCSI_RW);
+MODULE_PARM_DESC(disable_msix, "Disable MSI-X use in driver - (default=0)");
+
+module_param_named(use_msg, pvscsi_use_msg, bool, PVSCSI_RW);
+MODULE_PARM_DESC(use_msg, "Use msg ring when available - (default=1)");
+
+static const struct pci_device_id pvscsi_pci_tbl[] = {
+	{ PCI_VDEVICE(VMWARE, PCI_DEVICE_ID_VMWARE_PVSCSI) },
+	{ 0 }
+};
+
+MODULE_DEVICE_TABLE(pci, pvscsi_pci_tbl);
+
+static struct device *
+pvscsi_dev(const struct pvscsi_adapter *adapter)
+{
+	return &(adapter->dev->dev);
+}
+
+static struct pvscsi_ctx *
+pvscsi_find_context(const struct pvscsi_adapter *adapter, struct scsi_cmnd *cmd)
+{
+	struct pvscsi_ctx *ctx, *end;
+
+	end = &adapter->cmd_map[adapter->req_depth];
+	for (ctx = adapter->cmd_map; ctx < end; ctx++)
+		if (ctx->cmd == cmd)
+			return ctx;
+
+	return NULL;
+}
+
+static struct pvscsi_ctx *
+pvscsi_acquire_context(struct pvscsi_adapter *adapter, struct scsi_cmnd *cmd)
+{
+	struct pvscsi_ctx *ctx;
+
+	if (list_empty(&adapter->cmd_pool))
+		return NULL;
+
+	ctx = list_first_entry(&adapter->cmd_pool, struct pvscsi_ctx, list);
+	ctx->cmd = cmd;
+	list_del(&ctx->list);
+
+	return ctx;
+}
+
+static void pvscsi_release_context(struct pvscsi_adapter *adapter,
+				   struct pvscsi_ctx *ctx)
+{
+	ctx->cmd = NULL;
+	list_add(&ctx->list, &adapter->cmd_pool);
+}
+
+/*
+ * Map a pvscsi_ctx struct to a context ID field value; we map to a simple
+ * non-zero integer. ctx always points to an entry in cmd_map array, hence
+ * the return value is always >=1.
+ */
+static u64 pvscsi_map_context(const struct pvscsi_adapter *adapter,
+			      const struct pvscsi_ctx *ctx)
+{
+	return ctx - adapter->cmd_map + 1;
+}
+
+static struct pvscsi_ctx *
+pvscsi_get_context(const struct pvscsi_adapter *adapter, u64 context)
+{
+	return &adapter->cmd_map[context - 1];
+}
+
+static void pvscsi_reg_write(const struct pvscsi_adapter *adapter,
+			     u32 offset, u32 val)
+{
+	writel(val, adapter->mmioBase + offset);
+}
+
+static u32 pvscsi_reg_read(const struct pvscsi_adapter *adapter, u32 offset)
+{
+	return readl(adapter->mmioBase + offset);
+}
+
+static u32 pvscsi_read_intr_status(const struct pvscsi_adapter *adapter)
+{
+	return pvscsi_reg_read(adapter, PVSCSI_REG_OFFSET_INTR_STATUS);
+}
+
+static void pvscsi_write_intr_status(const struct pvscsi_adapter *adapter,
+				     u32 val)
+{
+	pvscsi_reg_write(adapter, PVSCSI_REG_OFFSET_INTR_STATUS, val);
+}
+
+static void pvscsi_unmask_intr(const struct pvscsi_adapter *adapter)
+{
+	u32 intr_bits;
+
+	intr_bits = PVSCSI_INTR_CMPL_MASK;
+	if (adapter->use_msg)
+		intr_bits |= PVSCSI_INTR_MSG_MASK;
+
+	pvscsi_reg_write(adapter, PVSCSI_REG_OFFSET_INTR_MASK, intr_bits);
+}
+
+static void pvscsi_mask_intr(const struct pvscsi_adapter *adapter)
+{
+	pvscsi_reg_write(adapter, PVSCSI_REG_OFFSET_INTR_MASK, 0);
+}
+
+static void pvscsi_write_cmd_desc(const struct pvscsi_adapter *adapter,
+				  u32 cmd, const void *desc, size_t len)
+{
+	const u32 *ptr = desc;
+	size_t i;
+
+	len /= sizeof(*ptr);
+	pvscsi_reg_write(adapter, PVSCSI_REG_OFFSET_COMMAND, cmd);
+	for (i = 0; i < len; i++)
+		pvscsi_reg_write(adapter,
+				 PVSCSI_REG_OFFSET_COMMAND_DATA, ptr[i]);
+}
+
+static void pvscsi_abort_cmd(const struct pvscsi_adapter *adapter,
+			     const struct pvscsi_ctx *ctx)
+{
+	struct PVSCSICmdDescAbortCmd cmd = { 0 };
+
+	cmd.target = ctx->cmd->device->id;
+	cmd.context = pvscsi_map_context(adapter, ctx);
+
+	pvscsi_write_cmd_desc(adapter, PVSCSI_CMD_ABORT_CMD, &cmd, sizeof(cmd));
+}
+
+static void pvscsi_kick_rw_io(const struct pvscsi_adapter *adapter)
+{
+	pvscsi_reg_write(adapter, PVSCSI_REG_OFFSET_KICK_RW_IO, 0);
+}
+
+static void pvscsi_process_request_ring(const struct pvscsi_adapter *adapter)
+{
+	pvscsi_reg_write(adapter, PVSCSI_REG_OFFSET_KICK_NON_RW_IO, 0);
+}
+
+static int scsi_is_rw(unsigned char op)
+{
+	return op == READ_6  || op == WRITE_6 ||
+	       op == READ_10 || op == WRITE_10 ||
+	       op == READ_12 || op == WRITE_12 ||
+	       op == READ_16 || op == WRITE_16;
+}
+
+static void pvscsi_kick_io(const struct pvscsi_adapter *adapter,
+			   unsigned char op)
+{
+	if (scsi_is_rw(op))
+		pvscsi_kick_rw_io(adapter);
+	else
+		pvscsi_process_request_ring(adapter);
+}
+
+static void ll_adapter_reset(const struct pvscsi_adapter *adapter)
+{
+	dev_dbg(pvscsi_dev(adapter), "Adapter Reset on %p\n", adapter);
+
+	pvscsi_write_cmd_desc(adapter, PVSCSI_CMD_ADAPTER_RESET, NULL, 0);
+}
+
+static void ll_bus_reset(const struct pvscsi_adapter *adapter)
+{
+	dev_dbg(pvscsi_dev(adapter), "Reseting bus on %p\n", adapter);
+
+	pvscsi_write_cmd_desc(adapter, PVSCSI_CMD_RESET_BUS, NULL, 0);
+}
+
+static void ll_device_reset(const struct pvscsi_adapter *adapter, u32 target)
+{
+	struct PVSCSICmdDescResetDevice cmd = { 0 };
+
+	dev_dbg(pvscsi_dev(adapter), "Reseting device: target=%u\n", target);
+
+	cmd.target = target;
+
+	pvscsi_write_cmd_desc(adapter, PVSCSI_CMD_RESET_DEVICE,
+			      &cmd, sizeof(cmd));
+}
+
+static void pvscsi_create_sg(struct pvscsi_ctx *ctx,
+			     struct scatterlist *sg, unsigned count)
+{
+	unsigned i;
+	struct PVSCSISGElement *sge;
+
+	BUG_ON(count > PVSCSI_MAX_NUM_SG_ENTRIES_PER_SEGMENT);
+
+	sge = &ctx->sgl->sge[0];
+	for (i = 0; i < count; i++, sg++) {
+		sge[i].addr   = sg_dma_address(sg);
+		sge[i].length = sg_dma_len(sg);
+		sge[i].flags  = 0;
+	}
+}
+
+/*
+ * Map all data buffers for a command into PCI space and
+ * setup the scatter/gather list if needed.
+ */
+static void pvscsi_map_buffers(struct pvscsi_adapter *adapter,
+			       struct pvscsi_ctx *ctx, struct scsi_cmnd *cmd,
+			       struct PVSCSIRingReqDesc *e)
+{
+	unsigned count;
+	unsigned bufflen = scsi_bufflen(cmd);
+	struct scatterlist *sg;
+
+	e->dataLen = bufflen;
+	e->dataAddr = 0;
+	if (bufflen == 0)
+		return;
+
+	sg = scsi_sglist(cmd);
+	count = scsi_sg_count(cmd);
+	if (count != 0) {
+		int segs = scsi_dma_map(cmd);
+		if (segs > 1) {
+			pvscsi_create_sg(ctx, sg, segs);
+
+			e->flags |= PVSCSI_FLAG_CMD_WITH_SG_LIST;
+			ctx->sglPA = pci_map_single(adapter->dev, ctx->sgl,
+						    SGL_SIZE, PCI_DMA_TODEVICE);
+			e->dataAddr = ctx->sglPA;
+		} else
+			e->dataAddr = sg_dma_address(sg);
+	} else {
+		/*
+		 * In case there is no S/G list, scsi_sglist points
+		 * directly to the buffer.
+		 */
+		ctx->dataPA = pci_map_single(adapter->dev, sg, bufflen,
+					     cmd->sc_data_direction);
+		e->dataAddr = ctx->dataPA;
+	}
+}
+
+static void pvscsi_unmap_buffers(const struct pvscsi_adapter *adapter,
+				 struct pvscsi_ctx *ctx)
+{
+	struct scsi_cmnd *cmd;
+	unsigned bufflen;
+
+	cmd = ctx->cmd;
+	bufflen = scsi_bufflen(cmd);
+
+	if (bufflen != 0) {
+		unsigned count = scsi_sg_count(cmd);
+
+		if (count != 0) {
+			scsi_dma_unmap(cmd);
+			if (ctx->sglPA) {
+				pci_unmap_single(adapter->dev, ctx->sglPA,
+						 SGL_SIZE, PCI_DMA_TODEVICE);
+				ctx->sglPA = 0;
+			}
+		} else
+			pci_unmap_single(adapter->dev, ctx->dataPA, bufflen,
+					 cmd->sc_data_direction);
+	}
+	if (cmd->sense_buffer)
+		pci_unmap_single(adapter->dev, ctx->sensePA,
+				 SCSI_SENSE_BUFFERSIZE, PCI_DMA_FROMDEVICE);
+}
+
+static int __devinit pvscsi_allocate_rings(struct pvscsi_adapter *adapter)
+{
+	adapter->rings_state = pci_alloc_consistent(adapter->dev, PAGE_SIZE,
+						    &adapter->ringStatePA);
+	if (!adapter->rings_state)
+		return -ENOMEM;
+
+	adapter->req_pages = min(PVSCSI_MAX_NUM_PAGES_REQ_RING,
+				 pvscsi_ring_pages);
+	adapter->req_depth = adapter->req_pages
+					* PVSCSI_MAX_NUM_REQ_ENTRIES_PER_PAGE;
+	adapter->req_ring = pci_alloc_consistent(adapter->dev,
+						 adapter->req_pages * PAGE_SIZE,
+						 &adapter->reqRingPA);
+	if (!adapter->req_ring)
+		return -ENOMEM;
+
+	adapter->cmp_pages = min(PVSCSI_MAX_NUM_PAGES_CMP_RING,
+				 pvscsi_ring_pages);
+	adapter->cmp_ring = pci_alloc_consistent(adapter->dev,
+						 adapter->cmp_pages * PAGE_SIZE,
+						 &adapter->cmpRingPA);
+	if (!adapter->cmp_ring)
+		return -ENOMEM;
+
+	BUG_ON(!IS_ALIGNED(adapter->ringStatePA, PAGE_SIZE));
+	BUG_ON(!IS_ALIGNED(adapter->reqRingPA, PAGE_SIZE));
+	BUG_ON(!IS_ALIGNED(adapter->cmpRingPA, PAGE_SIZE));
+
+	if (!adapter->use_msg)
+		return 0;
+
+	adapter->msg_pages = min(PVSCSI_MAX_NUM_PAGES_MSG_RING,
+				 pvscsi_msg_ring_pages);
+	adapter->msg_ring = pci_alloc_consistent(adapter->dev,
+						 adapter->msg_pages * PAGE_SIZE,
+						 &adapter->msgRingPA);
+	if (!adapter->msg_ring)
+		return -ENOMEM;
+	BUG_ON(!IS_ALIGNED(adapter->msgRingPA, PAGE_SIZE));
+
+	return 0;
+}
+
+static void pvscsi_setup_all_rings(const struct pvscsi_adapter *adapter)
+{
+	struct PVSCSICmdDescSetupRings cmd = { 0 };
+	dma_addr_t base;
+	unsigned i;
+
+	cmd.ringsStatePPN   = adapter->ringStatePA >> PAGE_SHIFT;
+	cmd.reqRingNumPages = adapter->req_pages;
+	cmd.cmpRingNumPages = adapter->cmp_pages;
+
+	base = adapter->reqRingPA;
+	for (i = 0; i < adapter->req_pages; i++) {
+		cmd.reqRingPPNs[i] = base >> PAGE_SHIFT;
+		base += PAGE_SIZE;
+	}
+
+	base = adapter->cmpRingPA;
+	for (i = 0; i < adapter->cmp_pages; i++) {
+		cmd.cmpRingPPNs[i] = base >> PAGE_SHIFT;
+		base += PAGE_SIZE;
+	}
+
+	memset(adapter->rings_state, 0, PAGE_SIZE);
+	memset(adapter->req_ring, 0, adapter->req_pages * PAGE_SIZE);
+	memset(adapter->cmp_ring, 0, adapter->cmp_pages * PAGE_SIZE);
+
+	pvscsi_write_cmd_desc(adapter, PVSCSI_CMD_SETUP_RINGS,
+			      &cmd, sizeof(cmd));
+
+	if (adapter->use_msg) {
+		struct PVSCSICmdDescSetupMsgRing cmd_msg = { 0 };
+
+		cmd_msg.numPages = adapter->msg_pages;
+
+		base = adapter->msgRingPA;
+		for (i = 0; i < adapter->msg_pages; i++) {
+			cmd_msg.ringPPNs[i] = base >> PAGE_SHIFT;
+			base += PAGE_SIZE;
+		}
+		memset(adapter->msg_ring, 0, adapter->msg_pages * PAGE_SIZE);
+
+		pvscsi_write_cmd_desc(adapter, PVSCSI_CMD_SETUP_MSG_RING,
+				      &cmd_msg, sizeof(cmd_msg));
+	}
+}
+
+/*
+ * Pull a completion descriptor off and pass the completion back
+ * to the SCSI mid layer.
+ */
+static void pvscsi_complete_request(struct pvscsi_adapter *adapter,
+				    const struct PVSCSIRingCmpDesc *e)
+{
+	struct pvscsi_ctx *ctx;
+	struct scsi_cmnd *cmd;
+	u32 btstat = e->hostStatus;
+	u32 sdstat = e->scsiStatus;
+
+	ctx = pvscsi_get_context(adapter, e->context);
+	cmd = ctx->cmd;
+	pvscsi_unmap_buffers(adapter, ctx);
+	pvscsi_release_context(adapter, ctx);
+	cmd->result = 0;
+
+	if (sdstat != SAM_STAT_GOOD &&
+	    (btstat == BTSTAT_SUCCESS ||
+	     btstat == BTSTAT_LINKED_COMMAND_COMPLETED ||
+	     btstat == BTSTAT_LINKED_COMMAND_COMPLETED_WITH_FLAG)) {
+		cmd->result = (DID_OK << 16) | sdstat;
+		if (sdstat == SAM_STAT_CHECK_CONDITION && cmd->sense_buffer)
+			cmd->result |= (DRIVER_SENSE << 24);
+	} else
+		switch (btstat) {
+		case BTSTAT_SUCCESS:
+		case BTSTAT_LINKED_COMMAND_COMPLETED:
+		case BTSTAT_LINKED_COMMAND_COMPLETED_WITH_FLAG:
+			/* If everything went fine, let's move on..  */
+			cmd->result = (DID_OK << 16);
+			break;
+
+		case BTSTAT_DATARUN:
+		case BTSTAT_DATA_UNDERRUN:
+			/* Report residual data in underruns */
+			scsi_set_resid(cmd, scsi_bufflen(cmd) - e->dataLen);
+			cmd->result = (DID_ERROR << 16);
+			break;
+
+		case BTSTAT_SELTIMEO:
+			/* Our emulation returns this for non-connected devs */
+			cmd->result = (DID_BAD_TARGET << 16);
+			break;
+
+		case BTSTAT_LUNMISMATCH:
+		case BTSTAT_TAGREJECT:
+		case BTSTAT_BADMSG:
+			cmd->result = (DRIVER_INVALID << 24);
+			/* fall through */
+
+		case BTSTAT_HAHARDWARE:
+		case BTSTAT_INVPHASE:
+		case BTSTAT_HATIMEOUT:
+		case BTSTAT_NORESPONSE:
+		case BTSTAT_DISCONNECT:
+		case BTSTAT_HASOFTWARE:
+		case BTSTAT_BUSFREE:
+		case BTSTAT_SENSFAILED:
+			cmd->result |= (DID_ERROR << 16);
+			break;
+
+		case BTSTAT_SENTRST:
+		case BTSTAT_RECVRST:
+		case BTSTAT_BUSRESET:
+			cmd->result = (DID_RESET << 16);
+			break;
+
+		case BTSTAT_ABORTQUEUE:
+			cmd->result = (DID_ABORT << 16);
+			break;
+
+		case BTSTAT_SCSIPARITY:
+			cmd->result = (DID_PARITY << 16);
+			break;
+
+		default:
+			cmd->result = (DID_ERROR << 16);
+			scmd_printk(KERN_DEBUG, cmd,
+				    "Unknown completion status: 0x%x\n",
+				    btstat);
+	}
+
+	dev_dbg(&cmd->device->sdev_gendev,
+		"cmd=%p %x ctx=%p result=0x%x status=0x%x,%x\n",
+		cmd, cmd->cmnd[0], ctx, cmd->result, btstat, sdstat);
+
+	cmd->scsi_done(cmd);
+}
+
+/*
+ * barrier usage : Since the PVSCSI device is emulated, there could be cases
+ * where we may want to serialize some accesses between the driver and the
+ * emulation layer. We use compiler barriers instead of the more expensive
+ * memory barriers because PVSCSI is only supported on X86 which has strong
+ * memory access ordering.
+ */
+static void pvscsi_process_completion_ring(struct pvscsi_adapter *adapter)
+{
+	struct PVSCSIRingsState *s = adapter->rings_state;
+	struct PVSCSIRingCmpDesc *ring = adapter->cmp_ring;
+	u32 cmp_entries = s->cmpNumEntriesLog2;
+
+	while (s->cmpConsIdx != s->cmpProdIdx) {
+		struct PVSCSIRingCmpDesc *e = ring + (s->cmpConsIdx &
+						      MASK(cmp_entries));
+		/*
+		 * This barrier() ensures that *e is not dereferenced while
+		 * the device emulation still writes data into the slot.
+		 * Since the device emulation advances s->cmpProdIdx only after
+		 * updating the slot we want to check it first.
+		 */
+		barrier();
+		pvscsi_complete_request(adapter, e);
+		/*
+		 * This barrier() ensures that compiler doesn't reorder write
+		 * to s->cmpConsIdx before the read of (*e) inside
+		 * pvscsi_complete_request. Otherwise, device emulation may
+		 * overwrite *e before we had a chance to read it.
+		 */
+		barrier();
+		s->cmpConsIdx++;
+	}
+}
+
+/*
+ * Translate a Linux SCSI request into a request ring entry.
+ */
+static int pvscsi_queue_ring(struct pvscsi_adapter *adapter,
+			     struct pvscsi_ctx *ctx, struct scsi_cmnd *cmd)
+{
+	struct PVSCSIRingsState *s;
+	struct PVSCSIRingReqDesc *e;
+	struct scsi_device *sdev;
+	u32 req_entries;
+
+	s = adapter->rings_state;
+	sdev = cmd->device;
+	req_entries = s->reqNumEntriesLog2;
+
+	/*
+	 * If this condition holds, we might have room on the request ring, but
+	 * we might not have room on the completion ring for the response.
+	 * However, we have already ruled out this possibility - we would not
+	 * have successfully allocated a context if it were true, since we only
+	 * have one context per request entry.  Check for it anyway, since it
+	 * would be a serious bug.
+	 */
+	if (s->reqProdIdx - s->cmpConsIdx >= 1 << req_entries) {
+		scmd_printk(KERN_ERR, cmd, "vmw_pvscsi: "
+			    "ring full: reqProdIdx=%d cmpConsIdx=%d\n",
+			    s->reqProdIdx, s->cmpConsIdx);
+		return -1;
+	}
+
+	e = adapter->req_ring + (s->reqProdIdx & MASK(req_entries));
+
+	e->bus    = sdev->channel;
+	e->target = sdev->id;
+	memset(e->lun, 0, sizeof(e->lun));
+	e->lun[1] = sdev->lun;
+
+	if (cmd->sense_buffer) {
+		ctx->sensePA = pci_map_single(adapter->dev, cmd->sense_buffer,
+					      SCSI_SENSE_BUFFERSIZE,
+					      PCI_DMA_FROMDEVICE);
+		e->senseAddr = ctx->sensePA;
+		e->senseLen = SCSI_SENSE_BUFFERSIZE;
+	} else {
+		e->senseLen  = 0;
+		e->senseAddr = 0;
+	}
+	e->cdbLen   = cmd->cmd_len;
+	e->vcpuHint = smp_processor_id();
+	memcpy(e->cdb, cmd->cmnd, e->cdbLen);
+
+	e->tag = SIMPLE_QUEUE_TAG;
+	if (sdev->tagged_supported &&
+	    (cmd->tag == HEAD_OF_QUEUE_TAG ||
+	     cmd->tag == ORDERED_QUEUE_TAG))
+		e->tag = cmd->tag;
+
+	if (cmd->sc_data_direction == DMA_FROM_DEVICE)
+		e->flags = PVSCSI_FLAG_CMD_DIR_TOHOST;
+	else if (cmd->sc_data_direction == DMA_TO_DEVICE)
+		e->flags = PVSCSI_FLAG_CMD_DIR_TODEVICE;
+	else if (cmd->sc_data_direction == DMA_NONE)
+		e->flags = PVSCSI_FLAG_CMD_DIR_NONE;
+	else
+		e->flags = 0;
+
+	pvscsi_map_buffers(adapter, ctx, cmd, e);
+
+	e->context = pvscsi_map_context(adapter, ctx);
+
+	barrier();
+
+	s->reqProdIdx++;
+
+	return 0;
+}
+
+static int pvscsi_queue(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
+{
+	struct Scsi_Host *host = cmd->device->host;
+	struct pvscsi_adapter *adapter = shost_priv(host);
+	struct pvscsi_ctx *ctx;
+	unsigned long flags;
+
+	spin_lock_irqsave(&adapter->hw_lock, flags);
+
+	ctx = pvscsi_acquire_context(adapter, cmd);
+	if (!ctx || pvscsi_queue_ring(adapter, ctx, cmd) != 0) {
+		if (ctx)
+			pvscsi_release_context(adapter, ctx);
+		spin_unlock_irqrestore(&adapter->hw_lock, flags);
+		return SCSI_MLQUEUE_HOST_BUSY;
+	}
+
+	cmd->scsi_done = done;
+
+	dev_dbg(&cmd->device->sdev_gendev,
+		"queued cmd %p, ctx %p, op=%x\n", cmd, ctx, cmd->cmnd[0]);
+
+	spin_unlock_irqrestore(&adapter->hw_lock, flags);
+
+	pvscsi_kick_io(adapter, cmd->cmnd[0]);
+
+	return 0;
+}
+
+static int pvscsi_abort(struct scsi_cmnd *cmd)
+{
+	struct pvscsi_adapter *adapter = shost_priv(cmd->device->host);
+	struct pvscsi_ctx *ctx;
+	unsigned long flags;
+
+	scmd_printk(KERN_DEBUG, cmd, "task abort on host %u, %p\n",
+		    adapter->host->host_no, cmd);
+
+	spin_lock_irqsave(&adapter->hw_lock, flags);
+
+	/*
+	 * Poll the completion ring first - we might be trying to abort
+	 * a command that is waiting to be dispatched in the completion ring.
+	 */
+	pvscsi_process_completion_ring(adapter);
+
+	/*
+	 * If there is no context for the command, it either already succeeded
+	 * or else was never properly issued.  Not our problem.
+	 */
+	ctx = pvscsi_find_context(adapter, cmd);
+	if (!ctx) {
+		scmd_printk(KERN_DEBUG, cmd, "Failed to abort cmd %p\n", cmd);
+		goto out;
+	}
+
+	pvscsi_abort_cmd(adapter, ctx);
+
+	pvscsi_process_completion_ring(adapter);
+
+out:
+	spin_unlock_irqrestore(&adapter->hw_lock, flags);
+	return SUCCESS;
+}
+
+/*
+ * Abort all outstanding requests.  This is only safe to use if the completion
+ * ring will never be walked again or the device has been reset, because it
+ * destroys the 1-1 mapping between context field passed to emulation and our
+ * request structure.
+ */
+static void pvscsi_reset_all(struct pvscsi_adapter *adapter)
+{
+	unsigned i;
+
+	for (i = 0; i < adapter->req_depth; i++) {
+		struct pvscsi_ctx *ctx = &adapter->cmd_map[i];
+		struct scsi_cmnd *cmd = ctx->cmd;
+		if (cmd) {
+			scmd_printk(KERN_ERR, cmd,
+				    "Forced reset on cmd %p\n", cmd);
+			pvscsi_unmap_buffers(adapter, ctx);
+			pvscsi_release_context(adapter, ctx);
+			cmd->result = (DID_RESET << 16);
+			cmd->scsi_done(cmd);
+		}
+	}
+}
+
+static int pvscsi_host_reset(struct scsi_cmnd *cmd)
+{
+	struct Scsi_Host *host = cmd->device->host;
+	struct pvscsi_adapter *adapter = shost_priv(host);
+	unsigned long flags;
+	bool use_msg;
+
+	scmd_printk(KERN_INFO, cmd, "SCSI Host reset\n");
+
+	spin_lock_irqsave(&adapter->hw_lock, flags);
+
+	use_msg = adapter->use_msg;
+
+	if (use_msg) {
+		adapter->use_msg = 0;
+		spin_unlock_irqrestore(&adapter->hw_lock, flags);
+
+		/*
+		 * Now that we know that the ISR won't add more work on the
+		 * workqueue we can safely flush any outstanding work.
+		 */
+		flush_workqueue(adapter->workqueue);
+		spin_lock_irqsave(&adapter->hw_lock, flags);
+	}
+
+	/*
+	 * We're going to tear down the entire ring structure and set it back
+	 * up, so stalling new requests until all completions are flushed and
+	 * the rings are back in place.
+	 */
+
+	pvscsi_process_request_ring(adapter);
+
+	ll_adapter_reset(adapter);
+
+	/*
+	 * Now process any completions.  Note we do this AFTER adapter reset,
+	 * which is strange, but stops races where completions get posted
+	 * between processing the ring and issuing the reset.  The backend will
+	 * not touch the ring memory after reset, so the immediately pre-reset
+	 * completion ring state is still valid.
+	 */
+	pvscsi_process_completion_ring(adapter);
+
+	pvscsi_reset_all(adapter);
+	adapter->use_msg = use_msg;
+	pvscsi_setup_all_rings(adapter);
+	pvscsi_unmask_intr(adapter);
+
+	spin_unlock_irqrestore(&adapter->hw_lock, flags);
+
+	return SUCCESS;
+}
+
+static int pvscsi_bus_reset(struct scsi_cmnd *cmd)
+{
+	struct Scsi_Host *host = cmd->device->host;
+	struct pvscsi_adapter *adapter = shost_priv(host);
+	unsigned long flags;
+
+	scmd_printk(KERN_INFO, cmd, "SCSI Bus reset\n");
+
+	/*
+	 * We don't want to queue new requests for this bus after
+	 * flushing all pending requests to emulation, since new
+	 * requests could then sneak in during this bus reset phase,
+	 * so take the lock now.
+	 */
+	spin_lock_irqsave(&adapter->hw_lock, flags);
+
+	pvscsi_process_request_ring(adapter);
+	ll_bus_reset(adapter);
+	pvscsi_process_completion_ring(adapter);
+
+	spin_unlock_irqrestore(&adapter->hw_lock, flags);
+
+	return SUCCESS;
+}
+
+static int pvscsi_device_reset(struct scsi_cmnd *cmd)
+{
+	struct Scsi_Host *host = cmd->device->host;
+	struct pvscsi_adapter *adapter = shost_priv(host);
+	unsigned long flags;
+
+	scmd_printk(KERN_INFO, cmd, "SCSI device reset on scsi%u:%u\n",
+		    host->host_no, cmd->device->id);
+
+	/*
+	 * We don't want to queue new requests for this device after flushing
+	 * all pending requests to emulation, since new requests could then
+	 * sneak in during this device reset phase, so take the lock now.
+	 */
+	spin_lock_irqsave(&adapter->hw_lock, flags);
+
+	pvscsi_process_request_ring(adapter);
+	ll_device_reset(adapter, cmd->device->id);
+	pvscsi_process_completion_ring(adapter);
+
+	spin_unlock_irqrestore(&adapter->hw_lock, flags);
+
+	return SUCCESS;
+}
+
+static struct scsi_host_template pvscsi_template;
+
+static const char *pvscsi_info(struct Scsi_Host *host)
+{
+	struct pvscsi_adapter *adapter = shost_priv(host);
+	static char buf[256];
+
+	sprintf(buf, "VMware PVSCSI storage adapter rev %d, req/cmp/msg rings: "
+		"%u/%u/%u pages, cmd_per_lun=%u", adapter->rev,
+		adapter->req_pages, adapter->cmp_pages, adapter->msg_pages,
+		pvscsi_template.cmd_per_lun);
+
+	return buf;
+}
+
+static struct scsi_host_template pvscsi_template = {
+	.module				= THIS_MODULE,
+	.name				= "VMware PVSCSI Host Adapter",
+	.proc_name			= "vmw_pvscsi",
+	.info				= pvscsi_info,
+	.queuecommand			= pvscsi_queue,
+	.this_id			= -1,
+	.sg_tablesize			= PVSCSI_MAX_NUM_SG_ENTRIES_PER_SEGMENT,
+	.dma_boundary			= UINT_MAX,
+	.max_sectors			= 0xffff,
+	.use_clustering			= ENABLE_CLUSTERING,
+	.eh_abort_handler		= pvscsi_abort,
+	.eh_device_reset_handler	= pvscsi_device_reset,
+	.eh_bus_reset_handler		= pvscsi_bus_reset,
+	.eh_host_reset_handler		= pvscsi_host_reset,
+};
+
+static void pvscsi_process_msg(const struct pvscsi_adapter *adapter,
+			       const struct PVSCSIRingMsgDesc *e)
+{
+	struct PVSCSIRingsState *s = adapter->rings_state;
+	struct Scsi_Host *host = adapter->host;
+	struct scsi_device *sdev;
+
+	printk(KERN_INFO "vmw_pvscsi: msg type: 0x%x - MSG RING: %u/%u (%u) \n",
+	       e->type, s->msgProdIdx, s->msgConsIdx, s->msgNumEntriesLog2);
+
+	BUILD_BUG_ON(PVSCSI_MSG_LAST != 2);
+
+	if (e->type == PVSCSI_MSG_DEV_ADDED) {
+		struct PVSCSIMsgDescDevStatusChanged *desc;
+		desc = (struct PVSCSIMsgDescDevStatusChanged *)e;
+
+		printk(KERN_INFO
+		       "vmw_pvscsi: msg: device added at scsi%u:%u:%u\n",
+		       desc->bus, desc->target, desc->lun[1]);
+
+		if (!scsi_host_get(host))
+			return;
+
+		sdev = scsi_device_lookup(host, desc->bus, desc->target,
+					  desc->lun[1]);
+		if (sdev) {
+			printk(KERN_INFO "vmw_pvscsi: device already exists\n");
+			scsi_device_put(sdev);
+		} else
+			scsi_add_device(adapter->host, desc->bus,
+					desc->target, desc->lun[1]);
+
+		scsi_host_put(host);
+	} else if (e->type == PVSCSI_MSG_DEV_REMOVED) {
+		struct PVSCSIMsgDescDevStatusChanged *desc;
+		desc = (struct PVSCSIMsgDescDevStatusChanged *)e;
+
+		printk(KERN_INFO
+		       "vmw_pvscsi: msg: device removed at scsi%u:%u:%u\n",
+		       desc->bus, desc->target, desc->lun[1]);
+
+		if (!scsi_host_get(host))
+			return;
+
+		sdev = scsi_device_lookup(host, desc->bus, desc->target,
+					  desc->lun[1]);
+		if (sdev) {
+			scsi_remove_device(sdev);
+			scsi_device_put(sdev);
+		} else
+			printk(KERN_INFO
+			       "vmw_pvscsi: failed to lookup scsi%u:%u:%u\n",
+			       desc->bus, desc->target, desc->lun[1]);
+
+		scsi_host_put(host);
+	}
+}
+
+static int pvscsi_msg_pending(const struct pvscsi_adapter *adapter)
+{
+	struct PVSCSIRingsState *s = adapter->rings_state;
+
+	return s->msgProdIdx != s->msgConsIdx;
+}
+
+static void pvscsi_process_msg_ring(const struct pvscsi_adapter *adapter)
+{
+	struct PVSCSIRingsState *s = adapter->rings_state;
+	struct PVSCSIRingMsgDesc *ring = adapter->msg_ring;
+	u32 msg_entries = s->msgNumEntriesLog2;
+
+	while (pvscsi_msg_pending(adapter)) {
+		struct PVSCSIRingMsgDesc *e = ring + (s->msgConsIdx &
+						      MASK(msg_entries));
+
+		barrier();
+		pvscsi_process_msg(adapter, e);
+		barrier();
+		s->msgConsIdx++;
+	}
+}
+
+static void pvscsi_msg_workqueue_handler(struct work_struct *data)
+{
+	struct pvscsi_adapter *adapter;
+
+	adapter = container_of(data, struct pvscsi_adapter, work);
+
+	pvscsi_process_msg_ring(adapter);
+}
+
+static int pvscsi_setup_msg_workqueue(struct pvscsi_adapter *adapter)
+{
+	char name[32];
+
+	if (!pvscsi_use_msg)
+		return 0;
+
+	pvscsi_reg_write(adapter, PVSCSI_REG_OFFSET_COMMAND,
+			 PVSCSI_CMD_SETUP_MSG_RING);
+
+	if (pvscsi_reg_read(adapter, PVSCSI_REG_OFFSET_COMMAND_STATUS) == -1)
+		return 0;
+
+	snprintf(name, sizeof(name),
+		 "vmw_pvscsi_wq_%u", adapter->host->host_no);
+
+	adapter->workqueue = create_singlethread_workqueue(name);
+	if (!adapter->workqueue) {
+		printk(KERN_ERR "vmw_pvscsi: failed to create work queue\n");
+		return 0;
+	}
+	INIT_WORK(&adapter->work, pvscsi_msg_workqueue_handler);
+
+	return 1;
+}
+
+static irqreturn_t pvscsi_isr(int irq, void *devp)
+{
+	struct pvscsi_adapter *adapter = devp;
+	int handled;
+
+	if (adapter->use_msi || adapter->use_msix)
+		handled = true;
+	else {
+		u32 val = pvscsi_read_intr_status(adapter);
+		handled = (val & PVSCSI_INTR_ALL_SUPPORTED) != 0;
+		if (handled)
+			pvscsi_write_intr_status(devp, val);
+	}
+
+	if (handled) {
+		unsigned long flags;
+
+		spin_lock_irqsave(&adapter->hw_lock, flags);
+
+		pvscsi_process_completion_ring(adapter);
+		if (adapter->use_msg && pvscsi_msg_pending(adapter))
+			queue_work(adapter->workqueue, &adapter->work);
+
+		spin_unlock_irqrestore(&adapter->hw_lock, flags);
+	}
+
+	return IRQ_RETVAL(handled);
+}
+
+static void pvscsi_free_sgls(const struct pvscsi_adapter *adapter)
+{
+	struct pvscsi_ctx *ctx = adapter->cmd_map;
+	unsigned i;
+
+	for (i = 0; i < adapter->req_depth; ++i, ++ctx)
+		free_pages((unsigned long)ctx->sgl, get_order(SGL_SIZE));
+}
+
+static int pvscsi_setup_msix(const struct pvscsi_adapter *adapter, int *irq)
+{
+	struct msix_entry entry = { 0, PVSCSI_VECTOR_COMPLETION };
+	int ret;
+
+	ret = pci_enable_msix(adapter->dev, &entry, 1);
+	if (ret)
+		return ret;
+
+	*irq = entry.vector;
+
+	return 0;
+}
+
+static void pvscsi_shutdown_intr(struct pvscsi_adapter *adapter)
+{
+	if (adapter->irq) {
+		free_irq(adapter->irq, adapter);
+		adapter->irq = 0;
+	}
+	if (adapter->use_msi) {
+		pci_disable_msi(adapter->dev);
+		adapter->use_msi = 0;
+	} else if (adapter->use_msix) {
+		pci_disable_msix(adapter->dev);
+		adapter->use_msix = 0;
+	}
+}
+
+static void pvscsi_release_resources(struct pvscsi_adapter *adapter)
+{
+	pvscsi_shutdown_intr(adapter);
+
+	if (adapter->workqueue)
+		destroy_workqueue(adapter->workqueue);
+
+	if (adapter->mmioBase)
+		pci_iounmap(adapter->dev, adapter->mmioBase);
+
+	pci_release_regions(adapter->dev);
+
+	if (adapter->cmd_map) {
+		pvscsi_free_sgls(adapter);
+		kfree(adapter->cmd_map);
+	}
+
+	if (adapter->rings_state)
+		pci_free_consistent(adapter->dev, PAGE_SIZE,
+				    adapter->rings_state, adapter->ringStatePA);
+
+	if (adapter->req_ring)
+		pci_free_consistent(adapter->dev,
+				    adapter->req_pages * PAGE_SIZE,
+				    adapter->req_ring, adapter->reqRingPA);
+
+	if (adapter->cmp_ring)
+		pci_free_consistent(adapter->dev,
+				    adapter->cmp_pages * PAGE_SIZE,
+				    adapter->cmp_ring, adapter->cmpRingPA);
+
+	if (adapter->msg_ring)
+		pci_free_consistent(adapter->dev,
+				    adapter->msg_pages * PAGE_SIZE,
+				    adapter->msg_ring, adapter->msgRingPA);
+}
+
+/*
+ * Allocate scatter gather lists.
+ *
+ * These are statically allocated.  Trying to be clever was not worth it.
+ *
+ * Dynamic allocation can fail, and we can't go deeep into the memory
+ * allocator, since we're a SCSI driver, and trying too hard to allocate
+ * memory might generate disk I/O.  We also don't want to fail disk I/O
+ * in that case because we can't get an allocation - the I/O could be
+ * trying to swap out data to free memory.  Since that is pathological,
+ * just use a statically allocated scatter list.
+ *
+ */
+static int __devinit pvscsi_allocate_sg(struct pvscsi_adapter *adapter)
+{
+	struct pvscsi_ctx *ctx;
+	int i;
+
+	ctx = adapter->cmd_map;
+	BUILD_BUG_ON(sizeof(struct pvscsi_sg_list) > SGL_SIZE);
+
+	for (i = 0; i < adapter->req_depth; ++i, ++ctx) {
+		ctx->sgl = (void *)__get_free_pages(GFP_KERNEL,
+						    get_order(SGL_SIZE));
+		ctx->sglPA = 0;
+		BUG_ON(!IS_ALIGNED(((unsigned long)ctx->sgl), PAGE_SIZE));
+		if (!ctx->sgl) {
+			for (; i >= 0; --i, --ctx) {
+				free_pages((unsigned long)ctx->sgl,
+					   get_order(SGL_SIZE));
+				ctx->sgl = NULL;
+			}
+			return -ENOMEM;
+		}
+	}
+
+	return 0;
+}
+
+static int __devinit pvscsi_probe(struct pci_dev *pdev,
+				  const struct pci_device_id *id)
+{
+	struct pvscsi_adapter *adapter;
+	struct Scsi_Host *host;
+	unsigned int i;
+	unsigned long flags = 0;
+	int error;
+
+	error = -ENODEV;
+
+	if (pci_enable_device(pdev))
+		return error;
+
+	if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) == 0 &&
+	    pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)) == 0) {
+		printk(KERN_INFO "vmw_pvscsi: using 64bit dma\n");
+	} else if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) == 0 &&
+		   pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) == 0) {
+		printk(KERN_INFO "vmw_pvscsi: using 32bit dma\n");
+	} else {
+		printk(KERN_ERR "vmw_pvscsi: failed to set DMA mask\n");
+		goto out_disable_device;
+	}
+
+	pvscsi_template.can_queue =
+		min(PVSCSI_MAX_NUM_PAGES_REQ_RING, pvscsi_ring_pages) *
+		PVSCSI_MAX_NUM_REQ_ENTRIES_PER_PAGE;
+	pvscsi_template.cmd_per_lun =
+		min(pvscsi_template.can_queue, pvscsi_cmd_per_lun);
+	host = scsi_host_alloc(&pvscsi_template, sizeof(struct pvscsi_adapter));
+	if (!host) {
+		printk(KERN_ERR "vmw_pvscsi: failed to allocate host\n");
+		goto out_disable_device;
+	}
+
+	adapter = shost_priv(host);
+	memset(adapter, 0, sizeof(*adapter));
+	adapter->dev  = pdev;
+	adapter->host = host;
+
+	spin_lock_init(&adapter->hw_lock);
+
+	host->max_channel = 0;
+	host->max_id      = 16;
+	host->max_lun     = 1;
+	host->max_cmd_len = 16;
+
+	adapter->rev = pdev->revision;
+
+	if (pci_request_regions(pdev, "vmw_pvscsi")) {
+		printk(KERN_ERR "vmw_pvscsi: pci memory selection failed\n");
+		goto out_free_host;
+	}
+
+	for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
+		if ((pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE_IO))
+			continue;
+
+		if (pci_resource_len(pdev, i) < PVSCSI_MEM_SPACE_SIZE)
+			continue;
+
+		break;
+	}
+
+	if (i == DEVICE_COUNT_RESOURCE) {
+		printk(KERN_ERR
+		       "vmw_pvscsi: adapter has no suitable MMIO region\n");
+		goto out_release_resources;
+	}
+
+	adapter->mmioBase = pci_iomap(pdev, i, PVSCSI_MEM_SPACE_SIZE);
+
+	if (!adapter->mmioBase) {
+		printk(KERN_ERR
+		       "vmw_pvscsi: can't iomap for BAR %d memsize %lu\n",
+		       i, PVSCSI_MEM_SPACE_SIZE);
+		goto out_release_resources;
+	}
+
+	pci_set_master(pdev);
+	pci_set_drvdata(pdev, host);
+
+	ll_adapter_reset(adapter);
+
+	adapter->use_msg = pvscsi_setup_msg_workqueue(adapter);
+
+	error = pvscsi_allocate_rings(adapter);
+	if (error) {
+		printk(KERN_ERR "vmw_pvscsi: unable to allocate ring memory\n");
+		goto out_release_resources;
+	}
+
+	/*
+	 * From this point on we should reset the adapter if anything goes
+	 * wrong.
+	 */
+	pvscsi_setup_all_rings(adapter);
+
+	adapter->cmd_map = kcalloc(adapter->req_depth,
+				   sizeof(struct pvscsi_ctx), GFP_KERNEL);
+	if (!adapter->cmd_map) {
+		printk(KERN_ERR "vmw_pvscsi: failed to allocate memory.\n");
+		error = -ENOMEM;
+		goto out_reset_adapter;
+	}
+
+	INIT_LIST_HEAD(&adapter->cmd_pool);
+	for (i = 0; i < adapter->req_depth; i++) {
+		struct pvscsi_ctx *ctx = adapter->cmd_map + i;
+		list_add(&ctx->list, &adapter->cmd_pool);
+	}
+
+	error = pvscsi_allocate_sg(adapter);
+	if (error) {
+		printk(KERN_ERR "vmw_pvscsi: unable to allocate s/g table\n");
+		goto out_reset_adapter;
+	}
+
+	if (!pvscsi_disable_msix &&
+	    pvscsi_setup_msix(adapter, &adapter->irq) == 0) {
+		printk(KERN_INFO "vmw_pvscsi: using MSI-X\n");
+		adapter->use_msix = 1;
+	} else if (!pvscsi_disable_msi && pci_enable_msi(pdev) == 0) {
+		printk(KERN_INFO "vmw_pvscsi: using MSI\n");
+		adapter->use_msi = 1;
+		adapter->irq = pdev->irq;
+	} else {
+		printk(KERN_INFO "vmw_pvscsi: using INTx\n");
+		adapter->irq = pdev->irq;
+		flags = IRQF_SHARED;
+	}
+
+	error = request_irq(adapter->irq, pvscsi_isr, flags,
+			    "vmw_pvscsi", adapter);
+	if (error) {
+		printk(KERN_ERR
+		       "vmw_pvscsi: unable to request IRQ: %d\n", error);
+		adapter->irq = 0;
+		goto out_reset_adapter;
+	}
+
+	error = scsi_add_host(host, &pdev->dev);
+	if (error) {
+		printk(KERN_ERR
+		       "vmw_pvscsi: scsi_add_host failed: %d\n", error);
+		goto out_reset_adapter;
+	}
+
+	dev_info(&pdev->dev, "VMware PVSCSI rev %d host #%u\n",
+		 adapter->rev, host->host_no);
+
+	pvscsi_unmask_intr(adapter);
+
+	scsi_scan_host(host);
+
+	return 0;
+
+out_reset_adapter:
+	ll_adapter_reset(adapter);
+out_release_resources:
+	pvscsi_release_resources(adapter);
+out_free_host:
+	scsi_host_put(host);
+out_disable_device:
+	pci_set_drvdata(pdev, NULL);
+	pci_disable_device(pdev);
+
+	return error;
+}
+
+static void __pvscsi_shutdown(struct pvscsi_adapter *adapter)
+{
+	pvscsi_mask_intr(adapter);
+
+	if (adapter->workqueue)
+		flush_workqueue(adapter->workqueue);
+
+	pvscsi_shutdown_intr(adapter);
+
+	pvscsi_process_request_ring(adapter);
+	pvscsi_process_completion_ring(adapter);
+	ll_adapter_reset(adapter);
+}
+
+static void pvscsi_shutdown(struct pci_dev *dev)
+{
+	struct Scsi_Host *host = pci_get_drvdata(dev);
+	struct pvscsi_adapter *adapter = shost_priv(host);
+
+	__pvscsi_shutdown(adapter);
+}
+
+static void pvscsi_remove(struct pci_dev *pdev)
+{
+	struct Scsi_Host *host = pci_get_drvdata(pdev);
+	struct pvscsi_adapter *adapter = shost_priv(host);
+
+	scsi_remove_host(host);
+
+	__pvscsi_shutdown(adapter);
+	pvscsi_release_resources(adapter);
+
+	scsi_host_put(host);
+
+	pci_set_drvdata(pdev, NULL);
+	pci_disable_device(pdev);
+}
+
+static struct pci_driver pvscsi_pci_driver = {
+	.name		= "vmw_pvscsi",
+	.id_table	= pvscsi_pci_tbl,
+	.probe		= pvscsi_probe,
+	.remove		= __devexit_p(pvscsi_remove),
+	.shutdown       = pvscsi_shutdown,
+};
+
+static int __init pvscsi_init(void)
+{
+	pr_info("%s - version %s\n",
+		PVSCSI_LINUX_DRIVER_DESC, PVSCSI_DRIVER_VERSION_STRING);
+	return pci_register_driver(&pvscsi_pci_driver);
+}
+
+static void __exit pvscsi_exit(void)
+{
+	pci_unregister_driver(&pvscsi_pci_driver);
+}
+
+module_init(pvscsi_init);
+module_exit(pvscsi_exit);
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/scsi_scan.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/scsi_scan.c
@@ -1336,8 +1336,10 @@
 		sdev = scsi_alloc_sdev(starget, 0, NULL);
 		if (!sdev)
 			return 0;
-		if (scsi_device_get(sdev))
+		if (scsi_device_get(sdev)) {
+			__scsi_remove_device(sdev);
 			return 0;
+		}
 	}
 
 	sprintf(devname, "host %d channel %d id %d",
@@ -1904,10 +1906,9 @@
 		goto out;
 
 	sdev = scsi_alloc_sdev(starget, 0, NULL);
-	if (sdev) {
-		sdev->sdev_gendev.parent = get_device(&starget->dev);
+	if (sdev)
 		sdev->borken = 0;
-	} else
+	else
 		scsi_target_reap(starget);
 	put_device(&starget->dev);
  out:
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/scsi_lib_dma.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/scsi_lib_dma.c
@@ -23,7 +23,7 @@
 	int nseg = 0;
 
 	if (scsi_sg_count(cmd)) {
-		struct device *dev = cmd->device->host->shost_gendev.parent;
+		struct device *dev = cmd->device->host->dma_dev;
 
 		nseg = dma_map_sg(dev, scsi_sglist(cmd), scsi_sg_count(cmd),
 				  cmd->sc_data_direction);
@@ -41,7 +41,7 @@
 void scsi_dma_unmap(struct scsi_cmnd *cmd)
 {
 	if (scsi_sg_count(cmd)) {
-		struct device *dev = cmd->device->host->shost_gendev.parent;
+		struct device *dev = cmd->device->host->dma_dev;
 
 		dma_unmap_sg(dev, scsi_sglist(cmd), scsi_sg_count(cmd),
 			     cmd->sc_data_direction);
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/ultrastor.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/ultrastor.c
@@ -306,7 +306,7 @@
 	"0: bsfw %1,%w0\n\t"
 	"btr %0,%1\n\t"
 	"jnc 0b"
-	: "=&r" (rv), "=m" (*field) :);
+	: "=&r" (rv), "+m" (*field) :);
 
   return rv;
 }
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/scsi_error.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/scsi_error.c
@@ -301,7 +301,20 @@
 		if (scmd->device->allow_restart &&
 		    (sshdr.asc == 0x04) && (sshdr.ascq == 0x02))
 			return FAILED;
-		return SUCCESS;
+
+		if (blk_barrier_rq(scmd->request))
+			/*
+			 * barrier requests should always retry on UA
+			 * otherwise block will get a spurious error
+			 */
+			return NEEDS_RETRY;
+		else
+			/*
+			 * for normal (non barrier) commands, pass the
+			 * UA upwards for a determination in the
+			 * completion functions
+			 */
+			return SUCCESS;
 
 		/* these three are not supported */
 	case COPY_ABORTED:
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/libiscsi.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/libiscsi.c
@@ -384,12 +384,12 @@
 
 	WARN_ON(hdrlength >= 256);
 	hdr->hlength = hdrlength & 0xFF;
+	hdr->cmdsn = task->cmdsn = cpu_to_be32(session->cmdsn);
 
 	if (session->tt->init_task && session->tt->init_task(task))
 		return -EIO;
 
 	task->state = ISCSI_TASK_RUNNING;
-	hdr->cmdsn = task->cmdsn = cpu_to_be32(session->cmdsn);
 	session->cmdsn++;
 
 	conn->scsicmd_pdus_cnt++;
@@ -2823,14 +2823,15 @@
 		session->state = ISCSI_STATE_TERMINATE;
 	else if (conn->stop_stage != STOP_CONN_RECOVER)
 		session->state = ISCSI_STATE_IN_RECOVERY;
+
+	old_stop_stage = conn->stop_stage;
+	conn->stop_stage = flag;
 	spin_unlock_bh(&session->lock);
 
 	del_timer_sync(&conn->transport_timer);
 	iscsi_suspend_tx(conn);
 
 	spin_lock_bh(&session->lock);
-	old_stop_stage = conn->stop_stage;
-	conn->stop_stage = flag;
 	conn->c_stage = ISCSI_CONN_STOPPED;
 	spin_unlock_bh(&session->lock);
 
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/scsi_sysfs.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/scsi_sysfs.c
@@ -844,7 +844,8 @@
 	struct request_queue *rq = sdev->request_queue;
 	struct scsi_target *starget = sdev->sdev_target;
 
-	if ((error = scsi_device_set_state(sdev, SDEV_RUNNING)) != 0)
+	error = scsi_device_set_state(sdev, SDEV_RUNNING);
+	if (error)
 		return error;
 
 	error = scsi_target_add(starget);
@@ -855,13 +856,13 @@
 	error = device_add(&sdev->sdev_gendev);
 	if (error) {
 		printk(KERN_INFO "error 1\n");
-		goto out_remove;
+		return error;
 	}
 	error = device_add(&sdev->sdev_dev);
 	if (error) {
 		printk(KERN_INFO "error 2\n");
 		device_del(&sdev->sdev_gendev);
-		goto out_remove;
+		return error;
 	}
 	transport_add_device(&sdev->sdev_gendev);
 	sdev->is_visible = 1;
@@ -872,14 +873,14 @@
 	else
 		error = device_create_file(&sdev->sdev_gendev, &dev_attr_queue_depth);
 	if (error)
-		goto out_remove;
+		return error;
 
 	if (sdev->host->hostt->change_queue_type)
 		error = device_create_file(&sdev->sdev_gendev, &sdev_attr_queue_type_rw);
 	else
 		error = device_create_file(&sdev->sdev_gendev, &dev_attr_queue_type);
 	if (error)
-		goto out_remove;
+		return error;
 
 	error = bsg_register_queue(rq, &sdev->sdev_gendev, NULL, NULL);
 
@@ -895,16 +896,11 @@
 			error = device_create_file(&sdev->sdev_gendev,
 					sdev->host->hostt->sdev_attrs[i]);
 			if (error)
-				goto out_remove;
+				return error;
 		}
 	}
 
-	return 0;
-
- out_remove:
-	__scsi_remove_device(sdev);
 	return error;
-
 }
 
 void __scsi_remove_device(struct scsi_device *sdev)
@@ -954,10 +950,11 @@
 	list_for_each_entry(sdev, &shost->__devices, siblings) {
 		if (sdev->channel != starget->channel ||
 		    sdev->id != starget->id ||
-		    sdev->sdev_state == SDEV_DEL)
+		    scsi_device_get(sdev))
 			continue;
 		spin_unlock_irqrestore(shost->host_lock, flags);
 		scsi_remove_device(sdev);
+		scsi_device_put(sdev);
 		spin_lock_irqsave(shost->host_lock, flags);
 		goto restart;
 	}
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/vmw_pvscsi.h
+++ linux-mvl-dove-2.6.32/drivers/scsi/vmw_pvscsi.h
@@ -0,0 +1,397 @@
+/*
+ * VMware PVSCSI header file
+ *
+ * Copyright (C) 2008-2009, VMware, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; version 2 of the License and no later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
+ * NON INFRINGEMENT.  See the GNU General Public License for more
+ * details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Maintained by: Alok N Kataria <akataria@vmware.com>
+ *
+ */
+
+#ifndef _VMW_PVSCSI_H_
+#define _VMW_PVSCSI_H_
+
+#include <linux/types.h>
+
+#define PVSCSI_DRIVER_VERSION_STRING   "1.0.1.0-k"
+
+#define PVSCSI_MAX_NUM_SG_ENTRIES_PER_SEGMENT 128
+
+#define MASK(n)        ((1 << (n)) - 1)        /* make an n-bit mask */
+
+#define PCI_VENDOR_ID_VMWARE		0x15AD
+#define PCI_DEVICE_ID_VMWARE_PVSCSI	0x07C0
+
+/*
+ * host adapter status/error codes
+ */
+enum HostBusAdapterStatus {
+   BTSTAT_SUCCESS       = 0x00,  /* CCB complete normally with no errors */
+   BTSTAT_LINKED_COMMAND_COMPLETED           = 0x0a,
+   BTSTAT_LINKED_COMMAND_COMPLETED_WITH_FLAG = 0x0b,
+   BTSTAT_DATA_UNDERRUN = 0x0c,
+   BTSTAT_SELTIMEO      = 0x11,  /* SCSI selection timeout */
+   BTSTAT_DATARUN       = 0x12,  /* data overrun/underrun */
+   BTSTAT_BUSFREE       = 0x13,  /* unexpected bus free */
+   BTSTAT_INVPHASE      = 0x14,  /* invalid bus phase or sequence requested by target */
+   BTSTAT_LUNMISMATCH   = 0x17,  /* linked CCB has different LUN from first CCB */
+   BTSTAT_SENSFAILED    = 0x1b,  /* auto request sense failed */
+   BTSTAT_TAGREJECT     = 0x1c,  /* SCSI II tagged queueing message rejected by target */
+   BTSTAT_BADMSG        = 0x1d,  /* unsupported message received by the host adapter */
+   BTSTAT_HAHARDWARE    = 0x20,  /* host adapter hardware failed */
+   BTSTAT_NORESPONSE    = 0x21,  /* target did not respond to SCSI ATN, sent a SCSI RST */
+   BTSTAT_SENTRST       = 0x22,  /* host adapter asserted a SCSI RST */
+   BTSTAT_RECVRST       = 0x23,  /* other SCSI devices asserted a SCSI RST */
+   BTSTAT_DISCONNECT    = 0x24,  /* target device reconnected improperly (w/o tag) */
+   BTSTAT_BUSRESET      = 0x25,  /* host adapter issued BUS device reset */
+   BTSTAT_ABORTQUEUE    = 0x26,  /* abort queue generated */
+   BTSTAT_HASOFTWARE    = 0x27,  /* host adapter software error */
+   BTSTAT_HATIMEOUT     = 0x30,  /* host adapter hardware timeout error */
+   BTSTAT_SCSIPARITY    = 0x34,  /* SCSI parity error detected */
+};
+
+/*
+ * Register offsets.
+ *
+ * These registers are accessible both via i/o space and mm i/o.
+ */
+
+enum PVSCSIRegOffset {
+	PVSCSI_REG_OFFSET_COMMAND        =    0x0,
+	PVSCSI_REG_OFFSET_COMMAND_DATA   =    0x4,
+	PVSCSI_REG_OFFSET_COMMAND_STATUS =    0x8,
+	PVSCSI_REG_OFFSET_LAST_STS_0     =  0x100,
+	PVSCSI_REG_OFFSET_LAST_STS_1     =  0x104,
+	PVSCSI_REG_OFFSET_LAST_STS_2     =  0x108,
+	PVSCSI_REG_OFFSET_LAST_STS_3     =  0x10c,
+	PVSCSI_REG_OFFSET_INTR_STATUS    = 0x100c,
+	PVSCSI_REG_OFFSET_INTR_MASK      = 0x2010,
+	PVSCSI_REG_OFFSET_KICK_NON_RW_IO = 0x3014,
+	PVSCSI_REG_OFFSET_DEBUG          = 0x3018,
+	PVSCSI_REG_OFFSET_KICK_RW_IO     = 0x4018,
+};
+
+/*
+ * Virtual h/w commands.
+ */
+
+enum PVSCSICommands {
+	PVSCSI_CMD_FIRST             = 0, /* has to be first */
+
+	PVSCSI_CMD_ADAPTER_RESET     = 1,
+	PVSCSI_CMD_ISSUE_SCSI        = 2,
+	PVSCSI_CMD_SETUP_RINGS       = 3,
+	PVSCSI_CMD_RESET_BUS         = 4,
+	PVSCSI_CMD_RESET_DEVICE      = 5,
+	PVSCSI_CMD_ABORT_CMD         = 6,
+	PVSCSI_CMD_CONFIG            = 7,
+	PVSCSI_CMD_SETUP_MSG_RING    = 8,
+	PVSCSI_CMD_DEVICE_UNPLUG     = 9,
+
+	PVSCSI_CMD_LAST              = 10  /* has to be last */
+};
+
+/*
+ * Command descriptor for PVSCSI_CMD_RESET_DEVICE --
+ */
+
+struct PVSCSICmdDescResetDevice {
+	u32	target;
+	u8	lun[8];
+} __packed;
+
+/*
+ * Command descriptor for PVSCSI_CMD_ABORT_CMD --
+ *
+ * - currently does not support specifying the LUN.
+ * - _pad should be 0.
+ */
+
+struct PVSCSICmdDescAbortCmd {
+	u64	context;
+	u32	target;
+	u32	_pad;
+} __packed;
+
+/*
+ * Command descriptor for PVSCSI_CMD_SETUP_RINGS --
+ *
+ * Notes:
+ * - reqRingNumPages and cmpRingNumPages need to be power of two.
+ * - reqRingNumPages and cmpRingNumPages need to be different from 0,
+ * - reqRingNumPages and cmpRingNumPages need to be inferior to
+ *   PVSCSI_SETUP_RINGS_MAX_NUM_PAGES.
+ */
+
+#define PVSCSI_SETUP_RINGS_MAX_NUM_PAGES        32
+struct PVSCSICmdDescSetupRings {
+	u32	reqRingNumPages;
+	u32	cmpRingNumPages;
+	u64	ringsStatePPN;
+	u64	reqRingPPNs[PVSCSI_SETUP_RINGS_MAX_NUM_PAGES];
+	u64	cmpRingPPNs[PVSCSI_SETUP_RINGS_MAX_NUM_PAGES];
+} __packed;
+
+/*
+ * Command descriptor for PVSCSI_CMD_SETUP_MSG_RING --
+ *
+ * Notes:
+ * - this command was not supported in the initial revision of the h/w
+ *   interface. Before using it, you need to check that it is supported by
+ *   writing PVSCSI_CMD_SETUP_MSG_RING to the 'command' register, then
+ *   immediately after read the 'command status' register:
+ *       * a value of -1 means that the cmd is NOT supported,
+ *       * a value != -1 means that the cmd IS supported.
+ *   If it's supported the 'command status' register should return:
+ *      sizeof(PVSCSICmdDescSetupMsgRing) / sizeof(u32).
+ * - this command should be issued _after_ the usual SETUP_RINGS so that the
+ *   RingsState page is already setup. If not, the command is a nop.
+ * - numPages needs to be a power of two,
+ * - numPages needs to be different from 0,
+ * - _pad should be zero.
+ */
+
+#define PVSCSI_SETUP_MSG_RING_MAX_NUM_PAGES  16
+
+struct PVSCSICmdDescSetupMsgRing {
+	u32	numPages;
+	u32	_pad;
+	u64	ringPPNs[PVSCSI_SETUP_MSG_RING_MAX_NUM_PAGES];
+} __packed;
+
+enum PVSCSIMsgType {
+	PVSCSI_MSG_DEV_ADDED          = 0,
+	PVSCSI_MSG_DEV_REMOVED        = 1,
+	PVSCSI_MSG_LAST               = 2,
+};
+
+/*
+ * Msg descriptor.
+ *
+ * sizeof(struct PVSCSIRingMsgDesc) == 128.
+ *
+ * - type is of type enum PVSCSIMsgType.
+ * - the content of args depend on the type of event being delivered.
+ */
+
+struct PVSCSIRingMsgDesc {
+	u32	type;
+	u32	args[31];
+} __packed;
+
+struct PVSCSIMsgDescDevStatusChanged {
+	u32	type;  /* PVSCSI_MSG_DEV _ADDED / _REMOVED */
+	u32	bus;
+	u32	target;
+	u8	lun[8];
+	u32	pad[27];
+} __packed;
+
+/*
+ * Rings state.
+ *
+ * - the fields:
+ *    . msgProdIdx,
+ *    . msgConsIdx,
+ *    . msgNumEntriesLog2,
+ *   .. are only used once the SETUP_MSG_RING cmd has been issued.
+ * - '_pad' helps to ensure that the msg related fields are on their own
+ *   cache-line.
+ */
+
+struct PVSCSIRingsState {
+	u32	reqProdIdx;
+	u32	reqConsIdx;
+	u32	reqNumEntriesLog2;
+
+	u32	cmpProdIdx;
+	u32	cmpConsIdx;
+	u32	cmpNumEntriesLog2;
+
+	u8	_pad[104];
+
+	u32	msgProdIdx;
+	u32	msgConsIdx;
+	u32	msgNumEntriesLog2;
+} __packed;
+
+/*
+ * Request descriptor.
+ *
+ * sizeof(RingReqDesc) = 128
+ *
+ * - context: is a unique identifier of a command. It could normally be any
+ *   64bit value, however we currently store it in the serialNumber variable
+ *   of struct SCSI_Command, so we have the following restrictions due to the
+ *   way this field is handled in the vmkernel storage stack:
+ *    * this value can't be 0,
+ *    * the upper 32bit need to be 0 since serialNumber is as a u32.
+ *   Currently tracked as PR 292060.
+ * - dataLen: contains the total number of bytes that need to be transferred.
+ * - dataAddr:
+ *   * if PVSCSI_FLAG_CMD_WITH_SG_LIST is set: dataAddr is the PA of the first
+ *     s/g table segment, each s/g segment is entirely contained on a single
+ *     page of physical memory,
+ *   * if PVSCSI_FLAG_CMD_WITH_SG_LIST is NOT set, then dataAddr is the PA of
+ *     the buffer used for the DMA transfer,
+ * - flags:
+ *   * PVSCSI_FLAG_CMD_WITH_SG_LIST: see dataAddr above,
+ *   * PVSCSI_FLAG_CMD_DIR_NONE: no DMA involved,
+ *   * PVSCSI_FLAG_CMD_DIR_TOHOST: transfer from device to main memory,
+ *   * PVSCSI_FLAG_CMD_DIR_TODEVICE: transfer from main memory to device,
+ *   * PVSCSI_FLAG_CMD_OUT_OF_BAND_CDB: reserved to handle CDBs larger than
+ *     16bytes. To be specified.
+ * - vcpuHint: vcpuId of the processor that will be most likely waiting for the
+ *   completion of the i/o. For guest OSes that use lowest priority message
+ *   delivery mode (such as windows), we use this "hint" to deliver the
+ *   completion action to the proper vcpu. For now, we can use the vcpuId of
+ *   the processor that initiated the i/o as a likely candidate for the vcpu
+ *   that will be waiting for the completion..
+ * - bus should be 0: we currently only support bus 0 for now.
+ * - unused should be zero'd.
+ */
+
+#define PVSCSI_FLAG_CMD_WITH_SG_LIST        (1 << 0)
+#define PVSCSI_FLAG_CMD_OUT_OF_BAND_CDB     (1 << 1)
+#define PVSCSI_FLAG_CMD_DIR_NONE            (1 << 2)
+#define PVSCSI_FLAG_CMD_DIR_TOHOST          (1 << 3)
+#define PVSCSI_FLAG_CMD_DIR_TODEVICE        (1 << 4)
+
+struct PVSCSIRingReqDesc {
+	u64	context;
+	u64	dataAddr;
+	u64	dataLen;
+	u64	senseAddr;
+	u32	senseLen;
+	u32	flags;
+	u8	cdb[16];
+	u8	cdbLen;
+	u8	lun[8];
+	u8	tag;
+	u8	bus;
+	u8	target;
+	u8	vcpuHint;
+	u8	unused[59];
+} __packed;
+
+/*
+ * Scatter-gather list management.
+ *
+ * As described above, when PVSCSI_FLAG_CMD_WITH_SG_LIST is set in the
+ * RingReqDesc.flags, then RingReqDesc.dataAddr is the PA of the first s/g
+ * table segment.
+ *
+ * - each segment of the s/g table contain a succession of struct
+ *   PVSCSISGElement.
+ * - each segment is entirely contained on a single physical page of memory.
+ * - a "chain" s/g element has the flag PVSCSI_SGE_FLAG_CHAIN_ELEMENT set in
+ *   PVSCSISGElement.flags and in this case:
+ *     * addr is the PA of the next s/g segment,
+ *     * length is undefined, assumed to be 0.
+ */
+
+struct PVSCSISGElement {
+	u64	addr;
+	u32	length;
+	u32	flags;
+} __packed;
+
+/*
+ * Completion descriptor.
+ *
+ * sizeof(RingCmpDesc) = 32
+ *
+ * - context: identifier of the command. The same thing that was specified
+ *   under "context" as part of struct RingReqDesc at initiation time,
+ * - dataLen: number of bytes transferred for the actual i/o operation,
+ * - senseLen: number of bytes written into the sense buffer,
+ * - hostStatus: adapter status,
+ * - scsiStatus: device status,
+ * - _pad should be zero.
+ */
+
+struct PVSCSIRingCmpDesc {
+	u64	context;
+	u64	dataLen;
+	u32	senseLen;
+	u16	hostStatus;
+	u16	scsiStatus;
+	u32	_pad[2];
+} __packed;
+
+/*
+ * Interrupt status / IRQ bits.
+ */
+
+#define PVSCSI_INTR_CMPL_0                 (1 << 0)
+#define PVSCSI_INTR_CMPL_1                 (1 << 1)
+#define PVSCSI_INTR_CMPL_MASK              MASK(2)
+
+#define PVSCSI_INTR_MSG_0                  (1 << 2)
+#define PVSCSI_INTR_MSG_1                  (1 << 3)
+#define PVSCSI_INTR_MSG_MASK               (MASK(2) << 2)
+
+#define PVSCSI_INTR_ALL_SUPPORTED          MASK(4)
+
+/*
+ * Number of MSI-X vectors supported.
+ */
+#define PVSCSI_MAX_INTRS        24
+
+/*
+ * Enumeration of supported MSI-X vectors
+ */
+#define PVSCSI_VECTOR_COMPLETION   0
+
+/*
+ * Misc constants for the rings.
+ */
+
+#define PVSCSI_MAX_NUM_PAGES_REQ_RING   PVSCSI_SETUP_RINGS_MAX_NUM_PAGES
+#define PVSCSI_MAX_NUM_PAGES_CMP_RING   PVSCSI_SETUP_RINGS_MAX_NUM_PAGES
+#define PVSCSI_MAX_NUM_PAGES_MSG_RING   PVSCSI_SETUP_MSG_RING_MAX_NUM_PAGES
+
+#define PVSCSI_MAX_NUM_REQ_ENTRIES_PER_PAGE \
+				(PAGE_SIZE / sizeof(struct PVSCSIRingReqDesc))
+
+#define PVSCSI_MAX_REQ_QUEUE_DEPTH \
+	(PVSCSI_MAX_NUM_PAGES_REQ_RING * PVSCSI_MAX_NUM_REQ_ENTRIES_PER_PAGE)
+
+#define PVSCSI_MEM_SPACE_COMMAND_NUM_PAGES     1
+#define PVSCSI_MEM_SPACE_INTR_STATUS_NUM_PAGES 1
+#define PVSCSI_MEM_SPACE_MISC_NUM_PAGES        2
+#define PVSCSI_MEM_SPACE_KICK_IO_NUM_PAGES     2
+#define PVSCSI_MEM_SPACE_MSIX_NUM_PAGES        2
+
+enum PVSCSIMemSpace {
+	PVSCSI_MEM_SPACE_COMMAND_PAGE		= 0,
+	PVSCSI_MEM_SPACE_INTR_STATUS_PAGE	= 1,
+	PVSCSI_MEM_SPACE_MISC_PAGE		= 2,
+	PVSCSI_MEM_SPACE_KICK_IO_PAGE		= 4,
+	PVSCSI_MEM_SPACE_MSIX_TABLE_PAGE	= 6,
+	PVSCSI_MEM_SPACE_MSIX_PBA_PAGE		= 7,
+};
+
+#define PVSCSI_MEM_SPACE_NUM_PAGES \
+	(PVSCSI_MEM_SPACE_COMMAND_NUM_PAGES +       \
+	 PVSCSI_MEM_SPACE_INTR_STATUS_NUM_PAGES +   \
+	 PVSCSI_MEM_SPACE_MISC_NUM_PAGES +          \
+	 PVSCSI_MEM_SPACE_KICK_IO_NUM_PAGES +       \
+	 PVSCSI_MEM_SPACE_MSIX_NUM_PAGES)
+
+#define PVSCSI_MEM_SPACE_SIZE        (PVSCSI_MEM_SPACE_NUM_PAGES * PAGE_SIZE)
+
+#endif /* _VMW_PVSCSI_H_ */
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/Makefile
+++ linux-mvl-dove-2.6.32/drivers/scsi/Makefile
@@ -128,12 +128,15 @@
 obj-$(CONFIG_SCSI_HPTIOP)	+= hptiop.o
 obj-$(CONFIG_SCSI_STEX)		+= stex.o
 obj-$(CONFIG_SCSI_MVSAS)	+= mvsas/
+obj-$(CONFIG_MVUMI_SAS)		+= mvumi/
 obj-$(CONFIG_PS3_ROM)		+= ps3rom.o
 obj-$(CONFIG_SCSI_CXGB3_ISCSI)	+= libiscsi.o libiscsi_tcp.o cxgb3i/
 obj-$(CONFIG_SCSI_BNX2_ISCSI)	+= libiscsi.o bnx2i/
 obj-$(CONFIG_BE2ISCSI)		+= libiscsi.o be2iscsi/
 obj-$(CONFIG_SCSI_PMCRAID)	+= pmcraid.o
+obj-$(CONFIG_VMWARE_PVSCSI)	+= vmw_pvscsi.o
 
+obj-$(CONFIG_SCSI_MVSATA)       += ../../arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sata/
 obj-$(CONFIG_ARM)		+= arm/
 
 obj-$(CONFIG_CHR_DEV_ST)	+= st.o
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/qla1280.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/qla1280.c
@@ -1640,8 +1640,10 @@
 	uint16_t mb[MAILBOX_REGISTER_COUNT], i;
 	int err;
 
+	spin_unlock_irq(ha->host->host_lock);
 	err = request_firmware(&fw, ql1280_board_tbl[ha->devnum].fwname,
 			       &ha->pdev->dev);
+	spin_lock_irq(ha->host->host_lock);
 	if (err) {
 		printk(KERN_ERR "Failed to load image \"%s\" err %d\n",
 		       ql1280_board_tbl[ha->devnum].fwname, err);
@@ -1699,8 +1701,10 @@
 		return -ENOMEM;
 #endif
 
+	spin_unlock_irq(ha->host->host_lock);
 	err = request_firmware(&fw, ql1280_board_tbl[ha->devnum].fwname,
 			       &ha->pdev->dev);
+	spin_lock_irq(ha->host->host_lock);
 	if (err) {
 		printk(KERN_ERR "Failed to load image \"%s\" err %d\n",
 		       ql1280_board_tbl[ha->devnum].fwname, err);
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/ipr.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/ipr.c
@@ -6516,6 +6516,7 @@
 	int rc;
 
 	ENTER;
+	ioa_cfg->pdev->state_saved = true;
 	rc = pci_restore_state(ioa_cfg->pdev);
 
 	if (rc != PCIBIOS_SUCCESSFUL) {
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/scsi_devinfo.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/scsi_devinfo.c
@@ -168,11 +168,10 @@
 	{"Generic", "USB SD Reader", "1.00", BLIST_FORCELUN | BLIST_INQUIRY_36},
 	{"Generic", "USB Storage-SMC", "0180", BLIST_FORCELUN | BLIST_INQUIRY_36},
 	{"Generic", "USB Storage-SMC", "0207", BLIST_FORCELUN | BLIST_INQUIRY_36},
-	{"HITACHI", "DF400", "*", BLIST_SPARSELUN},
-	{"HITACHI", "DF500", "*", BLIST_SPARSELUN},
-	{"HITACHI", "DF600", "*", BLIST_SPARSELUN},
-	{"HITACHI", "DISK-SUBSYSTEM", "*", BLIST_ATTACH_PQ3 | BLIST_SPARSELUN | BLIST_LARGELUN},
-	{"HITACHI", "OPEN-E", "*", BLIST_ATTACH_PQ3 | BLIST_SPARSELUN | BLIST_LARGELUN},
+	{"HITACHI", "DF400", "*", BLIST_REPORTLUN2},
+	{"HITACHI", "DF500", "*", BLIST_REPORTLUN2},
+	{"HITACHI", "DISK-SUBSYSTEM", "*", BLIST_REPORTLUN2},
+	{"HITACHI", "OPEN-", "*", BLIST_REPORTLUN2},
 	{"HITACHI", "OP-C-", "*", BLIST_SPARSELUN | BLIST_LARGELUN},
 	{"HITACHI", "3380-", "*", BLIST_SPARSELUN | BLIST_LARGELUN},
 	{"HITACHI", "3390-", "*", BLIST_SPARSELUN | BLIST_LARGELUN},
@@ -197,6 +196,7 @@
 	{"IBM", "ProFibre 4000R", "*", BLIST_SPARSELUN | BLIST_LARGELUN},
 	{"IBM", "2105", NULL, BLIST_RETRY_HWERROR},
 	{"iomega", "jaz 1GB", "J.86", BLIST_NOTQ | BLIST_NOLUN},
+	{"IOMEGA", "ZIP", NULL, BLIST_NOTQ | BLIST_NOLUN},
 	{"IOMEGA", "Io20S         *F", NULL, BLIST_KEY},
 	{"INSITE", "Floptical   F*8I", NULL, BLIST_KEY},
 	{"INSITE", "I325VM", NULL, BLIST_KEY},
@@ -243,6 +243,7 @@
 	{"Tornado-", "F4", "*", BLIST_NOREPORTLUN},
 	{"TOSHIBA", "CDROM", NULL, BLIST_ISROM},
 	{"TOSHIBA", "CD-ROM", NULL, BLIST_ISROM},
+	{"Traxdata", "CDR4120", NULL, BLIST_NOLUN},	/* locks up */
 	{"USB2.0", "SMARTMEDIA/XD", NULL, BLIST_FORCELUN | BLIST_INQUIRY_36},
 	{"WangDAT", "Model 2600", "01.7", BLIST_SELECT_NO_ATN},
 	{"WangDAT", "Model 3200", "02.2", BLIST_SELECT_NO_ATN},
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/scsi_transport_fc.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/scsi_transport_fc.c
@@ -648,11 +648,22 @@
 		return error;
 	error = transport_class_register(&fc_vport_class);
 	if (error)
-		return error;
+		goto unreg_host_class;
 	error = transport_class_register(&fc_rport_class);
 	if (error)
-		return error;
-	return transport_class_register(&fc_transport_class);
+		goto unreg_vport_class;
+	error = transport_class_register(&fc_transport_class);
+	if (error)
+		goto unreg_rport_class;
+	return 0;
+
+unreg_rport_class:
+	transport_class_unregister(&fc_rport_class);
+unreg_vport_class:
+	transport_class_unregister(&fc_vport_class);
+unreg_host_class:
+	transport_class_unregister(&fc_host_class);
+	return error;
 }
 
 static void __exit fc_transport_exit(void)
@@ -1204,6 +1215,15 @@
 {
 	struct fc_vport *vport = transport_class_to_vport(dev);
 	struct Scsi_Host *shost = vport_to_shost(vport);
+	unsigned long flags;
+
+	spin_lock_irqsave(shost->host_lock, flags);
+	if (vport->flags & (FC_VPORT_DEL | FC_VPORT_CREATING)) {
+		spin_unlock_irqrestore(shost->host_lock, flags);
+		return -EBUSY;
+	}
+	vport->flags |= FC_VPORT_DELETING;
+	spin_unlock_irqrestore(shost->host_lock, flags);
 
 	fc_queue_work(shost, &vport->vport_delete_work);
 	return count;
@@ -1793,6 +1813,9 @@
 	list_for_each_entry(vport, &fc_host->vports, peers) {
 		if ((vport->channel == 0) &&
 		    (vport->port_name == wwpn) && (vport->node_name == wwnn)) {
+			if (vport->flags & (FC_VPORT_DEL | FC_VPORT_CREATING))
+				break;
+			vport->flags |= FC_VPORT_DELETING;
 			match = 1;
 			break;
 		}
@@ -2384,6 +2407,7 @@
 	struct Scsi_Host *shost = rport_to_shost(rport);
 	struct fc_internal *i = to_fc_internal(shost->transportt);
 	unsigned long flags;
+	int do_callback = 0;
 
 	/*
 	 * if a scan is pending, flush the SCSI Host work_q so that
@@ -2422,8 +2446,15 @@
 	 * Avoid this call if we already called it when we preserved the
 	 * rport for the binding.
 	 */
+	spin_lock_irqsave(shost->host_lock, flags);
 	if (!(rport->flags & FC_RPORT_DEVLOSS_CALLBK_DONE) &&
-	    (i->f->dev_loss_tmo_callbk))
+	    (i->f->dev_loss_tmo_callbk)) {
+		rport->flags |= FC_RPORT_DEVLOSS_CALLBK_DONE;
+		do_callback = 1;
+	}
+	spin_unlock_irqrestore(shost->host_lock, flags);
+
+	if (do_callback)
 		i->f->dev_loss_tmo_callbk(rport);
 
 	fc_bsg_remove(rport->rqst_q);
@@ -2970,6 +3001,7 @@
 	struct fc_internal *i = to_fc_internal(shost->transportt);
 	struct fc_host_attrs *fc_host = shost_to_fc_host(shost);
 	unsigned long flags;
+	int do_callback = 0;
 
 	spin_lock_irqsave(shost->host_lock, flags);
 
@@ -3035,7 +3067,6 @@
 	rport->roles = FC_PORT_ROLE_UNKNOWN;
 	rport->port_state = FC_PORTSTATE_NOTPRESENT;
 	rport->flags &= ~FC_RPORT_FAST_FAIL_TIMEDOUT;
-	rport->flags |= FC_RPORT_DEVLOSS_CALLBK_DONE;
 
 	/*
 	 * Pre-emptively kill I/O rather than waiting for the work queue
@@ -3045,32 +3076,40 @@
 	spin_unlock_irqrestore(shost->host_lock, flags);
 	fc_terminate_rport_io(rport);
 
-	BUG_ON(rport->port_state != FC_PORTSTATE_NOTPRESENT);
+	spin_lock_irqsave(shost->host_lock, flags);
 
-	/* remove the identifiers that aren't used in the consisting binding */
-	switch (fc_host->tgtid_bind_type) {
-	case FC_TGTID_BIND_BY_WWPN:
-		rport->node_name = -1;
-		rport->port_id = -1;
-		break;
-	case FC_TGTID_BIND_BY_WWNN:
-		rport->port_name = -1;
-		rport->port_id = -1;
-		break;
-	case FC_TGTID_BIND_BY_ID:
-		rport->node_name = -1;
-		rport->port_name = -1;
-		break;
-	case FC_TGTID_BIND_NONE:	/* to keep compiler happy */
-		break;
+	if (rport->port_state == FC_PORTSTATE_NOTPRESENT) {	/* still missing */
+
+		/* remove the identifiers that aren't used in the consisting binding */
+		switch (fc_host->tgtid_bind_type) {
+		case FC_TGTID_BIND_BY_WWPN:
+			rport->node_name = -1;
+			rport->port_id = -1;
+			break;
+		case FC_TGTID_BIND_BY_WWNN:
+			rport->port_name = -1;
+			rport->port_id = -1;
+			break;
+		case FC_TGTID_BIND_BY_ID:
+			rport->node_name = -1;
+			rport->port_name = -1;
+			break;
+		case FC_TGTID_BIND_NONE:	/* to keep compiler happy */
+			break;
+		}
+
+		/*
+		 * As this only occurs if the remote port (scsi target)
+		 * went away and didn't come back - we'll remove
+		 * all attached scsi devices.
+		 */
+		rport->flags |= FC_RPORT_DEVLOSS_CALLBK_DONE;
+		fc_queue_work(shost, &rport->stgt_delete_work);
+
+		do_callback = 1;
 	}
 
-	/*
-	 * As this only occurs if the remote port (scsi target)
-	 * went away and didn't come back - we'll remove
-	 * all attached scsi devices.
-	 */
-	fc_queue_work(shost, &rport->stgt_delete_work);
+	spin_unlock_irqrestore(shost->host_lock, flags);
 
 	/*
 	 * Notify the driver that the rport is now dead. The LLDD will
@@ -3078,7 +3117,7 @@
 	 *
 	 * Note: we set the CALLBK_DONE flag above to correspond
 	 */
-	if (i->f->dev_loss_tmo_callbk)
+	if (do_callback && i->f->dev_loss_tmo_callbk)
 		i->f->dev_loss_tmo_callbk(rport);
 }
 
@@ -3301,18 +3340,6 @@
 	unsigned long flags;
 	int stat;
 
-	spin_lock_irqsave(shost->host_lock, flags);
-	if (vport->flags & FC_VPORT_CREATING) {
-		spin_unlock_irqrestore(shost->host_lock, flags);
-		return -EBUSY;
-	}
-	if (vport->flags & (FC_VPORT_DEL)) {
-		spin_unlock_irqrestore(shost->host_lock, flags);
-		return -EALREADY;
-	}
-	vport->flags |= FC_VPORT_DELETING;
-	spin_unlock_irqrestore(shost->host_lock, flags);
-
 	if (i->f->vport_delete)
 		stat = i->f->vport_delete(vport);
 	else
@@ -3769,8 +3796,9 @@
 		return;
 
 	while (!blk_queue_plugged(q)) {
-		if (rport && (rport->port_state == FC_PORTSTATE_BLOCKED))
-				break;
+		if (rport && (rport->port_state == FC_PORTSTATE_BLOCKED) &&
+		    !(rport->flags & FC_RPORT_FAST_FAIL_TIMEDOUT))
+			break;
 
 		req = blk_fetch_request(q);
 		if (!req)
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/st.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/st.c
@@ -552,13 +552,15 @@
 	SRpnt->waiting = waiting;
 
 	if (STp->buffer->do_dio) {
+		mdata->page_order = 0;
 		mdata->nr_entries = STp->buffer->sg_segs;
 		mdata->pages = STp->buffer->mapped_pages;
 	} else {
+		mdata->page_order = STp->buffer->reserved_page_order;
 		mdata->nr_entries =
 			DIV_ROUND_UP(bytes, PAGE_SIZE << mdata->page_order);
-		STp->buffer->map_data.pages = STp->buffer->reserved_pages;
-		STp->buffer->map_data.offset = 0;
+		mdata->pages = STp->buffer->reserved_pages;
+		mdata->offset = 0;
 	}
 
 	memcpy(SRpnt->cmd, cmd, sizeof(SRpnt->cmd));
@@ -3718,7 +3720,7 @@
 		priority |= __GFP_ZERO;
 
 	if (STbuffer->frp_segs) {
-		order = STbuffer->map_data.page_order;
+		order = STbuffer->reserved_page_order;
 		b_size = PAGE_SIZE << order;
 	} else {
 		for (b_size = PAGE_SIZE, order = 0;
@@ -3751,7 +3753,7 @@
 		segs++;
 	}
 	STbuffer->b_data = page_address(STbuffer->reserved_pages[0]);
-	STbuffer->map_data.page_order = order;
+	STbuffer->reserved_page_order = order;
 
 	return 1;
 }
@@ -3764,7 +3766,7 @@
 
 	for (i=0; i < st_bp->frp_segs; i++)
 		memset(page_address(st_bp->reserved_pages[i]), 0,
-		       PAGE_SIZE << st_bp->map_data.page_order);
+		       PAGE_SIZE << st_bp->reserved_page_order);
 	st_bp->cleared = 1;
 }
 
@@ -3772,7 +3774,7 @@
 /* Release the extra buffer */
 static void normalize_buffer(struct st_buffer * STbuffer)
 {
-	int i, order = STbuffer->map_data.page_order;
+	int i, order = STbuffer->reserved_page_order;
 
 	for (i = 0; i < STbuffer->frp_segs; i++) {
 		__free_pages(STbuffer->reserved_pages[i], order);
@@ -3780,7 +3782,7 @@
 	}
 	STbuffer->frp_segs = 0;
 	STbuffer->sg_segs = 0;
-	STbuffer->map_data.page_order = 0;
+	STbuffer->reserved_page_order = 0;
 	STbuffer->map_data.offset = 0;
 }
 
@@ -3790,7 +3792,7 @@
 static int append_to_buffer(const char __user *ubp, struct st_buffer * st_bp, int do_count)
 {
 	int i, cnt, res, offset;
-	int length = PAGE_SIZE << st_bp->map_data.page_order;
+	int length = PAGE_SIZE << st_bp->reserved_page_order;
 
 	for (i = 0, offset = st_bp->buffer_bytes;
 	     i < st_bp->frp_segs && offset >= length; i++)
@@ -3822,7 +3824,7 @@
 static int from_buffer(struct st_buffer * st_bp, char __user *ubp, int do_count)
 {
 	int i, cnt, res, offset;
-	int length = PAGE_SIZE << st_bp->map_data.page_order;
+	int length = PAGE_SIZE << st_bp->reserved_page_order;
 
 	for (i = 0, offset = st_bp->read_pointer;
 	     i < st_bp->frp_segs && offset >= length; i++)
@@ -3855,7 +3857,7 @@
 {
 	int src_seg, dst_seg, src_offset = 0, dst_offset;
 	int count, total;
-	int length = PAGE_SIZE << st_bp->map_data.page_order;
+	int length = PAGE_SIZE << st_bp->reserved_page_order;
 
 	if (offset == 0)
 		return;
@@ -4577,7 +4579,6 @@
         }
 
 	mdata->offset = uaddr & ~PAGE_MASK;
-	mdata->page_order = 0;
 	STbp->mapped_pages = pages;
 
 	return nr_pages;
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/scsi_ioctl.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/scsi_ioctl.c
@@ -308,6 +308,9 @@
 		case SG_SCSI_RESET_DEVICE:
 			val = SCSI_TRY_RESET_DEVICE;
 			break;
+		case SG_SCSI_RESET_TARGET:
+			val = SCSI_TRY_RESET_TARGET;
+			break;
 		case SG_SCSI_RESET_BUS:
 			val = SCSI_TRY_RESET_BUS;
 			break;
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/gdth.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/gdth.c
@@ -4174,6 +4174,14 @@
     ha = gdth_find_ha(gen.ionode);
     if (!ha)
         return -EFAULT;
+
+    if (gen.data_len > INT_MAX)
+        return -EINVAL;
+    if (gen.sense_len > INT_MAX)
+        return -EINVAL;
+    if (gen.data_len + gen.sense_len > INT_MAX)
+        return -EINVAL;
+
     if (gen.data_len + gen.sense_len != 0) {
         if (!(buf = gdth_ioctl_alloc(ha, gen.data_len + gen.sense_len,
                                      FALSE, &paddr)))
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/sd.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/sd.c
@@ -971,6 +971,7 @@
 {
 	rq->cmd_type = REQ_TYPE_BLOCK_PC;
 	rq->timeout = SD_TIMEOUT;
+	rq->retries = SD_MAX_RETRIES;
 	rq->cmd[0] = SYNCHRONIZE_CACHE;
 	rq->cmd_len = 10;
 }
@@ -1039,6 +1040,12 @@
 	u64 end_lba = blk_rq_pos(scmd->request) + (scsi_bufflen(scmd) / 512);
 	u64 bad_lba;
 	int info_valid;
+	/*
+	 * resid is optional but mostly filled in.  When it's unused,
+	 * its value is zero, so we assume the whole buffer transferred
+	 */
+	unsigned int transferred = scsi_bufflen(scmd) - scsi_get_resid(scmd);
+	unsigned int good_bytes;
 
 	if (!blk_fs_request(scmd->request))
 		return 0;
@@ -1072,7 +1079,8 @@
 	/* This computation should always be done in terms of
 	 * the resolution of the device's medium.
 	 */
-	return (bad_lba - start_lba) * scmd->device->sector_size;
+	good_bytes = (bad_lba - start_lba) * scmd->device->sector_size;
+	return min(good_bytes, transferred);
 }
 
 /**
@@ -2048,11 +2056,10 @@
 	index = sdkp->index;
 	dev = &sdp->sdev_gendev;
 
-	if (index < SD_MAX_DISKS) {
-		gd->major = sd_major((index & 0xf0) >> 4);
-		gd->first_minor = ((index & 0xf) << 4) | (index & 0xfff00);
-		gd->minors = SD_MINORS;
-	}
+	gd->major = sd_major((index & 0xf0) >> 4);
+	gd->first_minor = ((index & 0xf) << 4) | (index & 0xfff00);
+	gd->minors = SD_MINORS;
+
 	gd->fops = &sd_fops;
 	gd->private_data = &sdkp->driver;
 	gd->queue = sdkp->device->request_queue;
@@ -2141,6 +2148,12 @@
 	if (error)
 		goto out_put;
 
+	if (index >= SD_MAX_DISKS) {
+		error = -ENODEV;
+		sdev_printk(KERN_WARNING, sdp, "SCSI disk (sd) name space exhausted.\n");
+		goto out_free_index;
+	}
+
 	error = sd_format_disk_name("sd", index, gd->disk_name, DISK_NAME_LEN);
 	if (error)
 		goto out_free_index;
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/aic7xxx/aic79xx_core.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/aic7xxx/aic79xx_core.c
@@ -3171,13 +3171,16 @@
 				tinfo->curr.transport_version = 2;
 				tinfo->goal.transport_version = 2;
 				tinfo->goal.ppr_options = 0;
-				/*
-				 * Remove any SCBs in the waiting for selection
-				 * queue that may also be for this target so
-				 * that command ordering is preserved.
-				 */
-				ahd_freeze_devq(ahd, scb);
-				ahd_qinfifo_requeue_tail(ahd, scb);
+				if (scb != NULL) {
+					/*
+					 * Remove any SCBs in the waiting
+					 * for selection queue that may
+					 * also be for this target so that
+					 * command ordering is preserved.
+					 */
+					ahd_freeze_devq(ahd, scb);
+					ahd_qinfifo_requeue_tail(ahd, scb);
+				}
 				printerror = 0;
 			}
 		} else if (ahd_sent_msg(ahd, AHDMSG_EXT, MSG_EXT_WDTR, FALSE)
@@ -3194,13 +3197,16 @@
 				      MSG_EXT_WDTR_BUS_8_BIT,
 				      AHD_TRANS_CUR|AHD_TRANS_GOAL,
 				      /*paused*/TRUE);
-			/*
-			 * Remove any SCBs in the waiting for selection
-			 * queue that may also be for this target so that
-			 * command ordering is preserved.
-			 */
-			ahd_freeze_devq(ahd, scb);
-			ahd_qinfifo_requeue_tail(ahd, scb);
+			if (scb != NULL) {
+				/*
+				 * Remove any SCBs in the waiting for
+				 * selection queue that may also be for
+				 * this target so that command ordering
+				 * is preserved.
+				 */
+				ahd_freeze_devq(ahd, scb);
+				ahd_qinfifo_requeue_tail(ahd, scb);
+			}
 			printerror = 0;
 		} else if (ahd_sent_msg(ahd, AHDMSG_EXT, MSG_EXT_SDTR, FALSE)
 			&& ppr_busfree == 0) {
@@ -3217,13 +3223,16 @@
 					/*ppr_options*/0,
 					AHD_TRANS_CUR|AHD_TRANS_GOAL,
 					/*paused*/TRUE);
-			/*
-			 * Remove any SCBs in the waiting for selection
-			 * queue that may also be for this target so that
-			 * command ordering is preserved.
-			 */
-			ahd_freeze_devq(ahd, scb);
-			ahd_qinfifo_requeue_tail(ahd, scb);
+			if (scb != NULL) {
+				/*
+				 * Remove any SCBs in the waiting for
+				 * selection queue that may also be for
+				 * this target so that command ordering
+				 * is preserved.
+				 */
+				ahd_freeze_devq(ahd, scb);
+				ahd_qinfifo_requeue_tail(ahd, scb);
+			}
 			printerror = 0;
 		} else if ((ahd->msg_flags & MSG_FLAG_EXPECT_IDE_BUSFREE) != 0
 			&& ahd_sent_msg(ahd, AHDMSG_1B,
@@ -3251,7 +3260,7 @@
 	 * the message phases.  We check it last in case we
 	 * had to send some other message that caused a busfree.
 	 */
-	if (printerror != 0
+	if (scb != NULL && printerror != 0
 	 && (lastphase == P_MESGIN || lastphase == P_MESGOUT)
 	 && ((ahd->msg_flags & MSG_FLAG_EXPECT_PPR_BUSFREE) != 0)) {
 
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/mpt2sas/mpt2sas_ctl.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/mpt2sas/mpt2sas_ctl.c
@@ -636,6 +636,13 @@
 	data_out_sz = karg.data_out_size;
 	data_in_sz = karg.data_in_size;
 
+	/* Check for overflow and wraparound */
+	if (karg.data_sge_offset * 4 > ioc->request_sz ||
+	    karg.data_sge_offset > (UINT_MAX / 4)) {
+		ret = -EINVAL;
+		goto out;
+	}
+
 	/* copy in request message frame from user */
 	if (copy_from_user(mpi_request, mf, karg.data_sge_offset*4)) {
 		printk(KERN_ERR "failure at %s:%d/%s()!\n", __FILE__, __LINE__,
@@ -1809,7 +1816,7 @@
 	Mpi2DiagBufferPostReply_t *mpi_reply;
 	int rc, i;
 	u8 buffer_type;
-	unsigned long timeleft;
+	unsigned long timeleft, request_size, copy_size;
 	u16 smid;
 	u16 ioc_status;
 	u8 issue_reset = 0;
@@ -1845,6 +1852,8 @@
 		return -ENOMEM;
 	}
 
+	request_size = ioc->diag_buffer_sz[buffer_type];
+
 	if ((karg.starting_offset % 4) || (karg.bytes_to_read % 4)) {
 		printk(MPT2SAS_ERR_FMT "%s: either the starting_offset "
 		    "or bytes_to_read are not 4 byte aligned\n", ioc->name,
@@ -1852,13 +1861,23 @@
 		return -EINVAL;
 	}
 
+	if (karg.starting_offset > request_size)
+		return -EINVAL;
+
 	diag_data = (void *)(request_data + karg.starting_offset);
 	dctlprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: diag_buffer(%p), "
 	    "offset(%d), sz(%d)\n", ioc->name, __func__,
 	    diag_data, karg.starting_offset, karg.bytes_to_read));
 
+	/* Truncate data on requests that are too large */
+	if ((diag_data + karg.bytes_to_read < diag_data) ||
+	    (diag_data + karg.bytes_to_read > request_data + request_size))
+		copy_size = request_size - karg.starting_offset;
+	else
+		copy_size = karg.bytes_to_read;
+
 	if (copy_to_user((void __user *)uarg->diagnostic_data,
-	    diag_data, karg.bytes_to_read)) {
+	    diag_data, copy_size)) {
 		printk(MPT2SAS_ERR_FMT "%s: Unable to write "
 		    "mpt_diag_read_buffer_t data @ %p\n", ioc->name,
 		    __func__, diag_data);
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/mpt2sas/mpt2sas_scsih.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/mpt2sas/mpt2sas_scsih.c
@@ -196,10 +196,28 @@
 		PCI_ANY_ID, PCI_ANY_ID },
 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_3,
 		PCI_ANY_ID, PCI_ANY_ID },
+	/* Meteor ~ 2116 */
 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2116_1,
 		PCI_ANY_ID, PCI_ANY_ID },
 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2116_2,
 		PCI_ANY_ID, PCI_ANY_ID },
+	/* Thunderbolt ~ 2208 */
+	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_1,
+		PCI_ANY_ID, PCI_ANY_ID },
+	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_2,
+		PCI_ANY_ID, PCI_ANY_ID },
+	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_3,
+		PCI_ANY_ID, PCI_ANY_ID },
+	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_4,
+		PCI_ANY_ID, PCI_ANY_ID },
+	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_5,
+		PCI_ANY_ID, PCI_ANY_ID },
+	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_6,
+		PCI_ANY_ID, PCI_ANY_ID },
+	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_7,
+		PCI_ANY_ID, PCI_ANY_ID },
+	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_8,
+		PCI_ANY_ID, PCI_ANY_ID },
 	{0}	/* Terminating entry */
 };
 MODULE_DEVICE_TABLE(pci, scsih_pci_table);
@@ -927,7 +945,7 @@
 	u32 chain_offset;
 	u32 chain_length;
 	u32 chain_flags;
-	u32 sges_left;
+	int sges_left;
 	u32 sges_in_segment;
 	u32 sgl_flags;
 	u32 sgl_flags_last_element;
@@ -948,7 +966,7 @@
 
 	sg_scmd = scsi_sglist(scmd);
 	sges_left = scsi_dma_map(scmd);
-	if (!sges_left) {
+	if (sges_left < 0) {
 		sdev_printk(KERN_ERR, scmd->device, "pci_map_sg"
 		" failed: request for %d bytes!\n", scsi_bufflen(scmd));
 		return -ENOMEM;
@@ -2567,9 +2585,6 @@
 	u16 handle;
 
 	for (i = 0 ; i < event_data->NumEntries; i++) {
-		if (event_data->PHY[i].PhyStatus &
-		    MPI2_EVENT_SAS_TOPO_PHYSTATUS_VACANT)
-			continue;
 		handle = le16_to_cpu(event_data->PHY[i].AttachedDevHandle);
 		if (!handle)
 			continue;
@@ -5703,6 +5718,8 @@
 	struct _sas_port *mpt2sas_port;
 	struct _sas_device *sas_device;
 	struct _sas_node *expander_sibling;
+	struct _raid_device *raid_device, *next;
+	struct MPT2SAS_TARGET *sas_target_priv_data;
 	struct workqueue_struct	*wq;
 	unsigned long flags;
 
@@ -5716,6 +5733,21 @@
 	if (wq)
 		destroy_workqueue(wq);
 
+	/* release all the volumes */
+	list_for_each_entry_safe(raid_device, next, &ioc->raid_device_list,
+	    list) {
+		if (raid_device->starget) {
+			sas_target_priv_data =
+			    raid_device->starget->hostdata;
+			sas_target_priv_data->deleted = 1;
+			scsi_remove_target(&raid_device->starget->dev);
+		}
+		printk(MPT2SAS_INFO_FMT "removing handle(0x%04x), wwid"
+		    "(0x%016llx)\n", ioc->name,  raid_device->handle,
+		    (unsigned long long) raid_device->wwid);
+		_scsih_raid_device_remove(ioc, raid_device);
+	}
+
 	/* free ports attached to the sas_host */
  retry_again:
 	list_for_each_entry(mpt2sas_port,
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/mpt2sas/mpt2sas_base.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/mpt2sas/mpt2sas_base.c
@@ -1947,9 +1947,9 @@
 		/* adjust hba_queue_depth, reply_free_queue_depth,
 		 * and queue_size
 		 */
-		ioc->hba_queue_depth -= queue_diff;
-		ioc->reply_free_queue_depth -= queue_diff;
-		queue_size -= queue_diff;
+		ioc->hba_queue_depth -= (queue_diff / 2);
+		ioc->reply_free_queue_depth -= (queue_diff / 2);
+		queue_size = facts->MaxReplyDescriptorPostQueueDepth;
 	}
 	ioc->reply_post_queue_depth = queue_size;
 
@@ -3595,6 +3595,8 @@
 static void
 _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
 {
+	mpt2sas_scsih_reset_handler(ioc, reset_phase);
+	mpt2sas_ctl_reset_handler(ioc, reset_phase);
 	switch (reset_phase) {
 	case MPT2_IOC_PRE_RESET:
 		dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
@@ -3625,8 +3627,6 @@
 		    "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
 		break;
 	}
-	mpt2sas_scsih_reset_handler(ioc, reset_phase);
-	mpt2sas_ctl_reset_handler(ioc, reset_phase);
 }
 
 /**
@@ -3680,6 +3680,7 @@
 {
 	int r;
 	unsigned long flags;
+	u8 pe_complete = ioc->wait_for_port_enable_to_complete;
 
 	dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: enter\n", ioc->name,
 	    __func__));
@@ -3701,6 +3702,14 @@
 	if (r)
 		goto out;
 	_base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
+
+	/* If this hard reset is called while port enable is active, then
+	 * there is no reason to call make_ioc_operational
+	 */
+	if (pe_complete) {
+		r = -EFAULT;
+		goto out;
+	}
 	r = _base_make_ioc_operational(ioc, sleep_flag);
 	if (!r)
 		_base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/mpt2sas/mpi/mpi2_cnfg.h
+++ linux-mvl-dove-2.6.32/drivers/scsi/mpt2sas/mpi/mpi2_cnfg.h
@@ -348,6 +348,14 @@
 #define MPI2_MFGPAGE_DEVID_SAS2108_3                (0x0077)
 #define MPI2_MFGPAGE_DEVID_SAS2116_1                (0x0064)
 #define MPI2_MFGPAGE_DEVID_SAS2116_2                (0x0065)
+#define MPI2_MFGPAGE_DEVID_SAS2208_1                (0x0080)
+#define MPI2_MFGPAGE_DEVID_SAS2208_2                (0x0081)
+#define MPI2_MFGPAGE_DEVID_SAS2208_3                (0x0082)
+#define MPI2_MFGPAGE_DEVID_SAS2208_4                (0x0083)
+#define MPI2_MFGPAGE_DEVID_SAS2208_5                (0x0084)
+#define MPI2_MFGPAGE_DEVID_SAS2208_6                (0x0085)
+#define MPI2_MFGPAGE_DEVID_SAS2208_7                (0x0086)
+#define MPI2_MFGPAGE_DEVID_SAS2208_8                (0x0087)
 
 
 /* Manufacturing Page 0 */
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/libsas/sas_ata.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/libsas/sas_ata.c
@@ -346,6 +346,7 @@
 static struct ata_port_operations sas_sata_ops = {
 	.phy_reset		= sas_ata_phy_reset,
 	.post_internal_cmd	= sas_ata_post_internal,
+	.qc_defer               = ata_std_qc_defer,
 	.qc_prep		= ata_noop_qc_prep,
 	.qc_issue		= sas_ata_qc_issue,
 	.qc_fill_rtf		= sas_ata_qc_fill_rtf,
@@ -394,11 +395,15 @@
 void sas_ata_task_abort(struct sas_task *task)
 {
 	struct ata_queued_cmd *qc = task->uldd_task;
+	struct request_queue *q = qc->scsicmd->device->request_queue;
 	struct completion *waiting;
+	unsigned long flags;
 
 	/* Bounce SCSI-initiated commands to the SCSI EH */
 	if (qc->scsicmd) {
+		spin_lock_irqsave(q->queue_lock, flags);
 		blk_abort_request(qc->scsicmd->request);
+		spin_unlock_irqrestore(q->queue_lock, flags);
 		scsi_schedule_eh(qc->scsicmd->device->host);
 		return;
 	}
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/libsas/sas_expander.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/libsas/sas_expander.c
@@ -840,6 +840,9 @@
 
 	res = sas_discover_expander(child);
 	if (res) {
+		spin_lock_irq(&parent->port->dev_list_lock);
+		list_del(&child->dev_list_node);
+		spin_unlock_irq(&parent->port->dev_list_lock);
 		kfree(child);
 		return NULL;
 	}
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/libsas/sas_scsi_host.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/libsas/sas_scsi_host.c
@@ -648,6 +648,7 @@
 
 	spin_lock_irqsave(shost->host_lock, flags);
 	list_splice_init(&shost->eh_cmd_q, &eh_work_q);
+	shost->host_eh_scheduled = 0;
 	spin_unlock_irqrestore(shost->host_lock, flags);
 
 	SAS_DPRINTK("Enter %s\n", __func__);
@@ -1025,6 +1026,8 @@
 void sas_task_abort(struct sas_task *task)
 {
 	struct scsi_cmnd *sc = task->uldd_task;
+	struct request_queue *q = sc->device->request_queue;
+	unsigned long flags;
 
 	/* Escape for libsas internal commands */
 	if (!sc) {
@@ -1039,7 +1042,9 @@
 		return;
 	}
 
+	spin_lock_irqsave(q->queue_lock, flags);
 	blk_abort_request(sc->request);
+	spin_unlock_irqrestore(q->queue_lock, flags);
 	scsi_schedule_eh(sc->device->host);
 }
 
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/arm/fas216.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/arm/fas216.c
@@ -2516,7 +2516,7 @@
 		if (info->scsi.phase == PHASE_IDLE)
 			fas216_kick(info);
 
-		mod_timer(&info->eh_timer, 30 * HZ);
+		mod_timer(&info->eh_timer, jiffies + 30 * HZ);
 		spin_unlock_irqrestore(&info->host_lock, flags);
 
 		/*
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/aacraid/commctrl.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/aacraid/commctrl.c
@@ -655,9 +655,9 @@
 				/* Does this really need to be GFP_DMA? */
 				p = kmalloc(usg->sg[i].count,GFP_KERNEL|__GFP_DMA);
 				if(!p) {
-					kfree (usg);
-					dprintk((KERN_DEBUG"aacraid: Could not allocate SG buffer - size = %d buffer number %d of %d\n",
+					dprintk((KERN_DEBUG "aacraid: Could not allocate SG buffer - size = %d buffer number %d of %d\n",
 					  usg->sg[i].count,i,usg->count));
+					kfree(usg);
 					rcode = -ENOMEM;
 					goto cleanup;
 				}
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/qla2xxx/qla_gbl.h
+++ linux-mvl-dove-2.6.32/drivers/scsi/qla2xxx/qla_gbl.h
@@ -453,6 +453,5 @@
 extern void qla25xx_wrt_req_reg(struct qla_hw_data *, uint16_t, uint16_t);
 extern void qla25xx_wrt_rsp_reg(struct qla_hw_data *, uint16_t, uint16_t);
 extern void qla24xx_wrt_rsp_reg(struct qla_hw_data *, uint16_t, uint16_t);
-extern struct scsi_qla_host * qla25xx_get_host(struct rsp_que *);
 
 #endif /* _QLA_GBL_H */
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/qla2xxx/qla_attr.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/qla2xxx/qla_attr.c
@@ -1654,7 +1654,8 @@
 			fc_vport_set_state(fc_vport, FC_VPORT_LINKDOWN);
 	}
 
-	if (scsi_add_host(vha->host, &fc_vport->dev)) {
+	if (scsi_add_host_with_dma(vha->host, &fc_vport->dev,
+				   &ha->pdev->dev)) {
 		DEBUG15(printk("scsi(%ld): scsi_add_host failure for VP[%d].\n",
 			vha->host_no, vha->vp_idx));
 		goto vport_create_failed_2;
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/qla2xxx/qla_mid.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/qla2xxx/qla_mid.c
@@ -638,11 +638,15 @@
 
 static void qla_do_work(struct work_struct *work)
 {
+	unsigned long flags;
 	struct rsp_que *rsp = container_of(work, struct rsp_que, q_work);
 	struct scsi_qla_host *vha;
+	struct qla_hw_data *ha = rsp->hw;
 
-	vha = qla25xx_get_host(rsp);
+	spin_lock_irqsave(&rsp->hw->hardware_lock, flags);
+	vha = pci_get_drvdata(ha->pdev);
 	qla24xx_process_response_queue(vha, rsp);
+	spin_unlock_irqrestore(&rsp->hw->hardware_lock, flags);
 }
 
 /* create response queue */
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/qla2xxx/qla_os.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/qla2xxx/qla_os.c
@@ -2016,13 +2016,13 @@
 	DEBUG2(printk("DEBUG: detect hba %ld at address = %p\n",
 	    base_vha->host_no, ha));
 
-	base_vha->flags.init_done = 1;
-	base_vha->flags.online = 1;
-
 	ret = scsi_add_host(host, &pdev->dev);
 	if (ret)
 		goto probe_failed;
 
+	base_vha->flags.init_done = 1;
+	base_vha->flags.online = 1;
+
 	ha->isp_ops->enable_intrs(ha);
 
 	scsi_scan_host(host);
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/qla2xxx/qla_isr.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/qla2xxx/qla_isr.c
@@ -1347,16 +1347,22 @@
 
 	sense_len = rsp_info_len = resid_len = fw_resid_len = 0;
 	if (IS_FWI2_CAPABLE(ha)) {
-		sense_len = le32_to_cpu(sts24->sense_len);
-		rsp_info_len = le32_to_cpu(sts24->rsp_data_len);
-		resid_len = le32_to_cpu(sts24->rsp_residual_count);
-		fw_resid_len = le32_to_cpu(sts24->residual_len);
+		if (scsi_status & SS_SENSE_LEN_VALID)
+			sense_len = le32_to_cpu(sts24->sense_len);
+		if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
+			rsp_info_len = le32_to_cpu(sts24->rsp_data_len);
+		if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER))
+			resid_len = le32_to_cpu(sts24->rsp_residual_count);
+		if (comp_status == CS_DATA_UNDERRUN)
+			fw_resid_len = le32_to_cpu(sts24->residual_len);
 		rsp_info = sts24->data;
 		sense_data = sts24->data;
 		host_to_fcp_swap(sts24->data, sizeof(sts24->data));
 	} else {
-		sense_len = le16_to_cpu(sts->req_sense_length);
-		rsp_info_len = le16_to_cpu(sts->rsp_info_len);
+		if (scsi_status & SS_SENSE_LEN_VALID)
+			sense_len = le16_to_cpu(sts->req_sense_length);
+		if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
+			rsp_info_len = le16_to_cpu(sts->rsp_info_len);
 		resid_len = le32_to_cpu(sts->residual_length);
 		rsp_info = sts->rsp_info;
 		sense_data = sts->req_sense_data;
@@ -1443,38 +1449,62 @@
 		break;
 
 	case CS_DATA_UNDERRUN:
-		resid = resid_len;
+		DEBUG2(printk(KERN_INFO
+		    "scsi(%ld:%d:%d) UNDERRUN status detected 0x%x-0x%x. "
+		    "resid=0x%x fw_resid=0x%x cdb=0x%x os_underflow=0x%x\n",
+		    vha->host_no, cp->device->id, cp->device->lun, comp_status,
+		    scsi_status, resid_len, fw_resid_len, cp->cmnd[0],
+		    cp->underflow));
+
 		/* Use F/W calculated residual length. */
-		if (IS_FWI2_CAPABLE(ha)) {
-			if (!(scsi_status & SS_RESIDUAL_UNDER)) {
-				lscsi_status = 0;
-			} else if (resid != fw_resid_len) {
-				scsi_status &= ~SS_RESIDUAL_UNDER;
-				lscsi_status = 0;
+		resid = IS_FWI2_CAPABLE(ha) ? fw_resid_len : resid_len;
+		scsi_set_resid(cp, resid);
+		if (scsi_status & SS_RESIDUAL_UNDER) {
+			if (IS_FWI2_CAPABLE(ha) && fw_resid_len != resid_len) {
+				DEBUG2(printk(
+				    "scsi(%ld:%d:%d:%d) Dropped frame(s) "
+				    "detected (%x of %x bytes)...residual "
+				    "length mismatch...retrying command.\n",
+				    vha->host_no, cp->device->channel,
+				    cp->device->id, cp->device->lun, resid,
+				    scsi_bufflen(cp)));
+
+				cp->result = DID_ERROR << 16 | lscsi_status;
+				break;
 			}
-			resid = fw_resid_len;
-		}
 
-		if (scsi_status & SS_RESIDUAL_UNDER) {
-			scsi_set_resid(cp, resid);
-		} else {
-			DEBUG2(printk(KERN_INFO
-			    "scsi(%ld:%d:%d) UNDERRUN status detected "
-			    "0x%x-0x%x. resid=0x%x fw_resid=0x%x cdb=0x%x "
-			    "os_underflow=0x%x\n", vha->host_no,
-			    cp->device->id, cp->device->lun, comp_status,
-			    scsi_status, resid_len, resid, cp->cmnd[0],
-			    cp->underflow));
+			if (!lscsi_status &&
+			    ((unsigned)(scsi_bufflen(cp) - resid) <
+			    cp->underflow)) {
+				qla_printk(KERN_INFO, ha,
+				    "scsi(%ld:%d:%d:%d): Mid-layer underflow "
+				    "detected (%x of %x bytes)...returning "
+				    "error status.\n", vha->host_no,
+				    cp->device->channel, cp->device->id,
+				    cp->device->lun, resid, scsi_bufflen(cp));
+
+				cp->result = DID_ERROR << 16;
+				break;
+			}
+		} else if (!lscsi_status) {
+			DEBUG2(printk(
+			    "scsi(%ld:%d:%d:%d) Dropped frame(s) detected "
+			    "(%x of %x bytes)...firmware reported underrun..."
+			    "retrying command.\n", vha->host_no,
+			    cp->device->channel, cp->device->id,
+			    cp->device->lun, resid, scsi_bufflen(cp)));
 
+			cp->result = DID_ERROR << 16;
+			break;
 		}
 
+		cp->result = DID_OK << 16 | lscsi_status;
+
 		/*
 		 * Check to see if SCSI Status is non zero. If so report SCSI
 		 * Status.
 		 */
 		if (lscsi_status != 0) {
-			cp->result = DID_OK << 16 | lscsi_status;
-
 			if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
 				DEBUG2(printk(KERN_INFO
 				    "scsi(%ld): QUEUE FULL status detected "
@@ -1501,42 +1531,6 @@
 				break;
 
 			qla2x00_handle_sense(sp, sense_data, sense_len, rsp);
-		} else {
-			/*
-			 * If RISC reports underrun and target does not report
-			 * it then we must have a lost frame, so tell upper
-			 * layer to retry it by reporting an error.
-			 */
-			if (!(scsi_status & SS_RESIDUAL_UNDER)) {
-				DEBUG2(printk("scsi(%ld:%d:%d:%d) Dropped "
-					      "frame(s) detected (%x of %x bytes)..."
-					      "retrying command.\n",
-					vha->host_no, cp->device->channel,
-					cp->device->id, cp->device->lun, resid,
-					scsi_bufflen(cp)));
-
-				scsi_set_resid(cp, resid);
-				cp->result = DID_ERROR << 16;
-				break;
-			}
-
-			/* Handle mid-layer underflow */
-			if ((unsigned)(scsi_bufflen(cp) - resid) <
-			    cp->underflow) {
-				qla_printk(KERN_INFO, ha,
-					   "scsi(%ld:%d:%d:%d): Mid-layer underflow "
-					   "detected (%x of %x bytes)...returning "
-					   "error status.\n", vha->host_no,
-					   cp->device->channel, cp->device->id,
-					   cp->device->lun, resid,
-					   scsi_bufflen(cp));
-
-				cp->result = DID_ERROR << 16;
-				break;
-			}
-
-			/* Everybody online, looking good... */
-			cp->result = DID_OK << 16;
 		}
 		break;
 
@@ -2018,7 +2012,7 @@
 
 	spin_lock_irq(&ha->hardware_lock);
 
-	vha = qla25xx_get_host(rsp);
+	vha = pci_get_drvdata(ha->pdev);
 	qla24xx_process_response_queue(vha, rsp);
 	if (!ha->mqenable) {
 		WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
@@ -2246,30 +2240,28 @@
 
 	/* If possible, enable MSI-X. */
 	if (!IS_QLA2432(ha) && !IS_QLA2532(ha) &&
-	    !IS_QLA8432(ha) && !IS_QLA8001(ha))
-		goto skip_msix;
+		!IS_QLA8432(ha) && !IS_QLA8001(ha))
+		goto skip_msi;
+
+	if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
+		(ha->pdev->subsystem_device == 0x7040 ||
+		ha->pdev->subsystem_device == 0x7041 ||
+		ha->pdev->subsystem_device == 0x1705)) {
+		DEBUG2(qla_printk(KERN_WARNING, ha,
+			"MSI-X: Unsupported ISP2432 SSVID/SSDID (0x%X,0x%X).\n",
+			ha->pdev->subsystem_vendor,
+			ha->pdev->subsystem_device));
+		goto skip_msi;
+	}
 
 	if (IS_QLA2432(ha) && (ha->pdev->revision < QLA_MSIX_CHIP_REV_24XX ||
 		!QLA_MSIX_FW_MODE_1(ha->fw_attributes))) {
 		DEBUG2(qla_printk(KERN_WARNING, ha,
 		"MSI-X: Unsupported ISP2432 (0x%X, 0x%X).\n",
 			ha->pdev->revision, ha->fw_attributes));
-
 		goto skip_msix;
 	}
 
-	if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
-	    (ha->pdev->subsystem_device == 0x7040 ||
-		ha->pdev->subsystem_device == 0x7041 ||
-		ha->pdev->subsystem_device == 0x1705)) {
-		DEBUG2(qla_printk(KERN_WARNING, ha,
-		    "MSI-X: Unsupported ISP2432 SSVID/SSDID (0x%X, 0x%X).\n",
-		    ha->pdev->subsystem_vendor,
-		    ha->pdev->subsystem_device));
-
-		goto skip_msi;
-	}
-
 	ret = qla24xx_enable_msix(ha, rsp);
 	if (!ret) {
 		DEBUG2(qla_printk(KERN_INFO, ha,
@@ -2357,30 +2349,3 @@
 	msix->rsp = rsp;
 	return ret;
 }
-
-struct scsi_qla_host *
-qla25xx_get_host(struct rsp_que *rsp)
-{
-	srb_t *sp;
-	struct qla_hw_data *ha = rsp->hw;
-	struct scsi_qla_host *vha = NULL;
-	struct sts_entry_24xx *pkt;
-	struct req_que *req;
-	uint16_t que;
-	uint32_t handle;
-
-	pkt = (struct sts_entry_24xx *) rsp->ring_ptr;
-	que = MSW(pkt->handle);
-	handle = (uint32_t) LSW(pkt->handle);
-	req = ha->req_q_map[que];
-	if (handle < MAX_OUTSTANDING_COMMANDS) {
-		sp = req->outstanding_cmds[handle];
-		if (sp)
-			return  sp->fcport->vha;
-		else
-			goto base_que;
-	}
-base_que:
-	vha = pci_get_drvdata(ha->pdev);
-	return vha;
-}
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/bfa/bfa_core.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/bfa/bfa_core.c
@@ -84,11 +84,32 @@
 	for (i = 0; hal_mods[i]; i++)
 		hal_mods[i]->meminfo(cfg, &km_len, &dm_len);
 
+	dm_len += bfa_port_meminfo();
 
 	meminfo->meminfo[BFA_MEM_TYPE_KVA - 1].mem_len = km_len;
 	meminfo->meminfo[BFA_MEM_TYPE_DMA - 1].mem_len = dm_len;
 }
 
+static void
+bfa_com_port_attach(struct bfa_s *bfa, struct bfa_meminfo_s *mi)
+{
+	struct bfa_port_s       *port = &bfa->modules.port;
+	uint32_t                dm_len;
+	uint8_t                 *dm_kva;
+	uint64_t                dm_pa;
+
+	dm_len = bfa_port_meminfo();
+	dm_kva = bfa_meminfo_dma_virt(mi);
+	dm_pa  = bfa_meminfo_dma_phys(mi);
+
+	memset(port, 0, sizeof(struct bfa_port_s));
+	bfa_port_attach(port, &bfa->ioc, bfa, bfa->trcmod, bfa->logm);
+	bfa_port_mem_claim(port, dm_kva, dm_pa);
+
+	bfa_meminfo_dma_virt(mi) = dm_kva + dm_len;
+	bfa_meminfo_dma_phys(mi) = dm_pa + dm_len;
+}
+
 /**
  * Use this function to do attach the driver instance with the BFA
  * library. This function will not trigger any HW initialization
@@ -140,6 +161,7 @@
 	for (i = 0; hal_mods[i]; i++)
 		hal_mods[i]->attach(bfa, bfad, cfg, meminfo, pcidev);
 
+	bfa_com_port_attach(bfa, meminfo);
 }
 
 /**
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/device_handler/scsi_dh_alua.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/device_handler/scsi_dh_alua.c
@@ -701,6 +701,8 @@
 	{"IBM", "2145" },
 	{"Pillar", "Axiom" },
 	{"Intel", "Multi-Flex"},
+	{"NETAPP", "LUN"},
+	{"AIX", "NVDISK"},
 	{NULL, NULL}
 };
 
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/device_handler/scsi_dh_emc.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/device_handler/scsi_dh_emc.c
@@ -272,7 +272,7 @@
 	int len = 0;
 
 	rq = blk_get_request(sdev->request_queue,
-			(cmd == MODE_SELECT) ? WRITE : READ, GFP_NOIO);
+			(cmd != INQUIRY) ? WRITE : READ, GFP_NOIO);
 	if (!rq) {
 		sdev_printk(KERN_INFO, sdev, "get_req: blk_get_request failed");
 		return NULL;
@@ -284,16 +284,17 @@
 	switch (cmd) {
 	case MODE_SELECT:
 		len = sizeof(short_trespass);
-		rq->cmd_flags |= REQ_RW;
 		rq->cmd[1] = 0x10;
+		rq->cmd[4] = len;
 		break;
 	case MODE_SELECT_10:
 		len = sizeof(long_trespass);
-		rq->cmd_flags |= REQ_RW;
 		rq->cmd[1] = 0x10;
+		rq->cmd[8] = len;
 		break;
 	case INQUIRY:
 		len = CLARIION_BUFFER_SIZE;
+		rq->cmd[4] = len;
 		memset(buffer, 0, len);
 		break;
 	default:
@@ -301,7 +302,6 @@
 		break;
 	}
 
-	rq->cmd[4] = len;
 	rq->cmd_type = REQ_TYPE_BLOCK_PC;
 	rq->cmd_flags |= REQ_FAILFAST_DEV | REQ_FAILFAST_TRANSPORT |
 			 REQ_FAILFAST_DRIVER;
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/device_handler/scsi_dh.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/device_handler/scsi_dh.c
@@ -304,18 +304,15 @@
 	sdev = to_scsi_device(dev);
 
 	if (action == BUS_NOTIFY_ADD_DEVICE) {
+		err = device_create_file(dev, &scsi_dh_state_attr);
+		/* don't care about err */
 		devinfo = device_handler_match(NULL, sdev);
-		if (!devinfo)
-			goto out;
-
-		err = scsi_dh_handler_attach(sdev, devinfo);
-		if (!err)
-			err = device_create_file(dev, &scsi_dh_state_attr);
+		if (devinfo)
+			err = scsi_dh_handler_attach(sdev, devinfo);
 	} else if (action == BUS_NOTIFY_DEL_DEVICE) {
 		device_remove_file(dev, &scsi_dh_state_attr);
 		scsi_dh_handler_detach(sdev, NULL);
 	}
-out:
 	return err;
 }
 
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/libfc/fc_lport.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/libfc/fc_lport.c
@@ -329,7 +329,7 @@
  * @sp: current sequence in the RLIR exchange
  * @fp: RLIR request frame
  *
- * Locking Note: The lport lock is exected to be held before calling
+ * Locking Note: The lport lock is expected to be held before calling
  * this function.
  */
 static void fc_lport_recv_rlir_req(struct fc_seq *sp, struct fc_frame *fp,
@@ -348,7 +348,7 @@
  * @sp: current sequence in the ECHO exchange
  * @fp: ECHO request frame
  *
- * Locking Note: The lport lock is exected to be held before calling
+ * Locking Note: The lport lock is expected to be held before calling
  * this function.
  */
 static void fc_lport_recv_echo_req(struct fc_seq *sp, struct fc_frame *in_fp,
@@ -361,7 +361,7 @@
 	void *dp;
 	u32 f_ctl;
 
-	FC_LPORT_DBG(lport, "Received RLIR request while in state %s\n",
+	FC_LPORT_DBG(lport, "Received ECHO request while in state %s\n",
 		     fc_lport_state(lport));
 
 	len = fr_len(in_fp) - sizeof(struct fc_frame_header);
@@ -374,7 +374,7 @@
 	if (fp) {
 		dp = fc_frame_payload_get(fp, len);
 		memcpy(dp, pp, len);
-		*((u32 *)dp) = htonl(ELS_LS_ACC << 24);
+		*((__be32 *)dp) = htonl(ELS_LS_ACC << 24);
 		sp = lport->tt.seq_start_next(sp);
 		f_ctl = FC_FC_EX_CTX | FC_FC_LAST_SEQ | FC_FC_END_SEQ;
 		fc_fill_fc_hdr(fp, FC_RCTL_ELS_REP, ep->did, ep->sid,
@@ -385,12 +385,12 @@
 }
 
 /**
- * fc_lport_recv_echo_req() - Handle received Request Node ID data request
- * @lport: Fibre Channel local port recieving the RNID
- * @sp: current sequence in the RNID exchange
- * @fp: RNID request frame
+ * fc_lport_recv_rnid_req() - Handle received Request Node ID data request
+ * @sp:	   The sequence in the RNID exchange
+ * @fp:	   The RNID request frame
+ * @lport: The local port recieving the RNID
  *
- * Locking Note: The lport lock is exected to be held before calling
+ * Locking Note: The lport lock is expected to be held before calling
  * this function.
  */
 static void fc_lport_recv_rnid_req(struct fc_seq *sp, struct fc_frame *in_fp,
@@ -667,7 +667,7 @@
  * Accept it with the common service parameters indicating our N port.
  * Set up to do a PLOGI if we have the higher-number WWPN.
  *
- * Locking Note: The lport lock is exected to be held before calling
+ * Locking Note: The lport lock is expected to be held before calling
  * this function.
  */
 static void fc_lport_recv_flogi_req(struct fc_seq *sp_in,
@@ -1115,7 +1115,7 @@
 
 	if (!lport->tt.elsct_send(lport, FC_FID_FCTRL, fp, ELS_SCR,
 				  fc_lport_scr_resp, lport, lport->e_d_tov))
-		fc_lport_error(lport, fp);
+		fc_lport_error(lport, NULL);
 }
 
 /**
@@ -1186,7 +1186,7 @@
 	if (!lport->tt.elsct_send(lport, FC_FID_DIR_SERV, fp, FC_NS_RPN_ID,
 				  fc_lport_rpn_id_resp,
 				  lport, lport->e_d_tov))
-		fc_lport_error(lport, fp);
+		fc_lport_error(lport, NULL);
 }
 
 static struct fc_rport_operations fc_lport_rport_ops = {
@@ -1237,10 +1237,13 @@
 
 	switch (lport->state) {
 	case LPORT_ST_DISABLED:
+		WARN_ON(1);
+		break;
 	case LPORT_ST_READY:
-	case LPORT_ST_RESET:
 		WARN_ON(1);
 		break;
+	case LPORT_ST_RESET:
+		break;
 	case LPORT_ST_FLOGI:
 		fc_lport_enter_flogi(lport);
 		break;
@@ -1337,7 +1340,7 @@
 
 	if (!lport->tt.elsct_send(lport, FC_FID_FLOGI, fp, ELS_LOGO,
 				  fc_lport_logo_resp, lport, lport->e_d_tov))
-		fc_lport_error(lport, fp);
+		fc_lport_error(lport, NULL);
 }
 
 /**
@@ -1453,7 +1456,7 @@
 
 	if (!lport->tt.elsct_send(lport, FC_FID_FLOGI, fp, ELS_FLOGI,
 				  fc_lport_flogi_resp, lport, lport->e_d_tov))
-		fc_lport_error(lport, fp);
+		fc_lport_error(lport, NULL);
 }
 
 /* Configure a fc_lport */
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/libfc/fc_fcp.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/libfc/fc_fcp.c
@@ -302,10 +302,13 @@
 	if (!fsp)
 		return;
 
+	if (fsp->xfer_ddp == FC_XID_UNKNOWN)
+		return;
+
 	lp = fsp->lp;
-	if (fsp->xfer_ddp && lp->tt.ddp_done) {
+	if (lp->tt.ddp_done) {
 		fsp->xfer_len = lp->tt.ddp_done(lp, fsp->xfer_ddp);
-		fsp->xfer_ddp = 0;
+		fsp->xfer_ddp = FC_XID_UNKNOWN;
 	}
 }
 
@@ -572,7 +575,8 @@
 		tlen -= sg_bytes;
 		remaining -= sg_bytes;
 
-		if (tlen)
+		if ((skb_shinfo(fp_skb(fp))->nr_frags < FC_FRAME_SG_LEN) &&
+		    (tlen))
 			continue;
 
 		/*
@@ -1048,7 +1052,6 @@
 
 	seq = lp->tt.exch_seq_send(lp, fp, resp, fc_fcp_pkt_destroy, fsp, 0);
 	if (!seq) {
-		fc_frame_free(fp);
 		rc = -1;
 		goto unlock;
 	}
@@ -1313,7 +1316,6 @@
 		fc_fcp_pkt_hold(fsp);		/* hold while REC outstanding */
 		return;
 	}
-	fc_frame_free(fp);
 retry:
 	if (fsp->recov_retry++ < FC_MAX_RECOV_RETRY)
 		fc_fcp_timer_set(fsp, FC_SCSI_REC_TOV);
@@ -1561,10 +1563,9 @@
 
 	seq = lp->tt.exch_seq_send(lp, fp, fc_fcp_srr_resp, NULL,
 				   fsp, jiffies_to_msecs(FC_SCSI_REC_TOV));
-	if (!seq) {
-		fc_frame_free(fp);
+	if (!seq)
 		goto retry;
-	}
+
 	fsp->recov_seq = seq;
 	fsp->xfer_len = offset;
 	fsp->xfer_contig_end = offset;
@@ -1708,6 +1709,7 @@
 	fsp->cmd = sc_cmd;	/* save the cmd */
 	fsp->lp = lp;		/* save the softc ptr */
 	fsp->rport = rport;	/* set the remote port ptr */
+	fsp->xfer_ddp = FC_XID_UNKNOWN;
 	sc_cmd->scsi_done = done;
 
 	/*
@@ -1846,7 +1848,8 @@
 			 * scsi status is good but transport level
 			 * underrun.
 			 */
-			sc_cmd->result = DID_OK << 16;
+			sc_cmd->result = (fsp->state & FC_SRB_RCV_STATUS ?
+					  DID_OK : DID_ERROR) << 16;
 		} else {
 			/*
 			 * scsi got underrun, this is an error
@@ -2046,18 +2049,16 @@
 int fc_slave_alloc(struct scsi_device *sdev)
 {
 	struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
-	int queue_depth;
 
 	if (!rport || fc_remote_port_chkready(rport))
 		return -ENXIO;
 
-	if (sdev->tagged_supported) {
-		if (sdev->host->hostt->cmd_per_lun)
-			queue_depth = sdev->host->hostt->cmd_per_lun;
-		else
-			queue_depth = FC_FCP_DFLT_QUEUE_DEPTH;
-		scsi_activate_tcq(sdev, queue_depth);
-	}
+	if (sdev->tagged_supported)
+		scsi_activate_tcq(sdev, FC_FCP_DFLT_QUEUE_DEPTH);
+	else
+		scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev),
+					FC_FCP_DFLT_QUEUE_DEPTH);
+
 	return 0;
 }
 EXPORT_SYMBOL(fc_slave_alloc);
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/libfc/fc_rport.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/libfc/fc_rport.c
@@ -86,6 +86,7 @@
 	[RPORT_ST_LOGO] = "LOGO",
 	[RPORT_ST_ADISC] = "ADISC",
 	[RPORT_ST_DELETE] = "Delete",
+	[RPORT_ST_RESTART] = "Restart",
 };
 
 /**
@@ -99,8 +100,7 @@
 	struct fc_rport_priv *rdata;
 
 	list_for_each_entry(rdata, &lport->disc.rports, peers)
-		if (rdata->ids.port_id == port_id &&
-		    rdata->rp_state != RPORT_ST_DELETE)
+		if (rdata->ids.port_id == port_id)
 			return rdata;
 	return NULL;
 }
@@ -235,6 +235,7 @@
 	struct fc_rport_operations *rport_ops;
 	struct fc_rport_identifiers ids;
 	struct fc_rport *rport;
+	int restart = 0;
 
 	mutex_lock(&rdata->rp_mutex);
 	event = rdata->event;
@@ -287,8 +288,20 @@
 		mutex_unlock(&rdata->rp_mutex);
 
 		if (port_id != FC_FID_DIR_SERV) {
+			/*
+			 * We must drop rp_mutex before taking disc_mutex.
+			 * Re-evaluate state to allow for restart.
+			 * A transition to RESTART state must only happen
+			 * while disc_mutex is held and rdata is on the list.
+			 */
 			mutex_lock(&lport->disc.disc_mutex);
-			list_del(&rdata->peers);
+			mutex_lock(&rdata->rp_mutex);
+			if (rdata->rp_state == RPORT_ST_RESTART)
+				restart = 1;
+			else
+				list_del(&rdata->peers);
+			rdata->event = RPORT_EV_NONE;
+			mutex_unlock(&rdata->rp_mutex);
 			mutex_unlock(&lport->disc.disc_mutex);
 		}
 
@@ -312,7 +325,13 @@
 			mutex_unlock(&rdata->rp_mutex);
 			fc_remote_port_delete(rport);
 		}
-		kref_put(&rdata->kref, lport->tt.rport_destroy);
+		if (restart) {
+			mutex_lock(&rdata->rp_mutex);
+			FC_RPORT_DBG(rdata, "work restart\n");
+			fc_rport_enter_plogi(rdata);
+			mutex_unlock(&rdata->rp_mutex);
+		} else
+			kref_put(&rdata->kref, lport->tt.rport_destroy);
 		break;
 
 	default:
@@ -342,6 +361,12 @@
 		FC_RPORT_DBG(rdata, "ADISC port\n");
 		fc_rport_enter_adisc(rdata);
 		break;
+	case RPORT_ST_RESTART:
+		break;
+	case RPORT_ST_DELETE:
+		FC_RPORT_DBG(rdata, "Restart deleted port\n");
+		fc_rport_state_enter(rdata, RPORT_ST_RESTART);
+		break;
 	default:
 		FC_RPORT_DBG(rdata, "Login to port\n");
 		fc_rport_enter_plogi(rdata);
@@ -397,20 +422,21 @@
 
 	if (rdata->rp_state == RPORT_ST_DELETE) {
 		FC_RPORT_DBG(rdata, "Port in Delete state, not removing\n");
-		mutex_unlock(&rdata->rp_mutex);
 		goto out;
 	}
 
-	fc_rport_enter_logo(rdata);
+	if (rdata->rp_state == RPORT_ST_RESTART)
+		FC_RPORT_DBG(rdata, "Port in Restart state, deleting\n");
+	else
+		fc_rport_enter_logo(rdata);
 
 	/*
 	 * Change the state to Delete so that we discard
 	 * the response.
 	 */
 	fc_rport_enter_delete(rdata, RPORT_EV_STOP);
-	mutex_unlock(&rdata->rp_mutex);
-
 out:
+	mutex_unlock(&rdata->rp_mutex);
 	return 0;
 }
 
@@ -466,6 +492,7 @@
 	case RPORT_ST_READY:
 	case RPORT_ST_INIT:
 	case RPORT_ST_DELETE:
+	case RPORT_ST_RESTART:
 		break;
 	}
 
@@ -499,6 +526,7 @@
 		fc_rport_enter_logo(rdata);
 		break;
 	case RPORT_ST_DELETE:
+	case RPORT_ST_RESTART:
 	case RPORT_ST_READY:
 	case RPORT_ST_INIT:
 		break;
@@ -632,7 +660,7 @@
 
 	if (!lport->tt.elsct_send(lport, rdata->ids.port_id, fp, ELS_PLOGI,
 				  fc_rport_plogi_resp, rdata, lport->e_d_tov))
-		fc_rport_error_retry(rdata, fp);
+		fc_rport_error_retry(rdata, NULL);
 	else
 		kref_get(&rdata->kref);
 }
@@ -793,7 +821,7 @@
 
 	if (!lport->tt.elsct_send(lport, rdata->ids.port_id, fp, ELS_PRLI,
 				  fc_rport_prli_resp, rdata, lport->e_d_tov))
-		fc_rport_error_retry(rdata, fp);
+		fc_rport_error_retry(rdata, NULL);
 	else
 		kref_get(&rdata->kref);
 }
@@ -889,7 +917,7 @@
 
 	if (!lport->tt.elsct_send(lport, rdata->ids.port_id, fp, ELS_RTV,
 				     fc_rport_rtv_resp, rdata, lport->e_d_tov))
-		fc_rport_error_retry(rdata, fp);
+		fc_rport_error_retry(rdata, NULL);
 	else
 		kref_get(&rdata->kref);
 }
@@ -919,7 +947,7 @@
 
 	if (!lport->tt.elsct_send(lport, rdata->ids.port_id, fp, ELS_LOGO,
 				  fc_rport_logo_resp, rdata, lport->e_d_tov))
-		fc_rport_error_retry(rdata, fp);
+		fc_rport_error_retry(rdata, NULL);
 	else
 		kref_get(&rdata->kref);
 }
@@ -1006,7 +1034,7 @@
 	}
 	if (!lport->tt.elsct_send(lport, rdata->ids.port_id, fp, ELS_ADISC,
 				  fc_rport_adisc_resp, rdata, lport->e_d_tov))
-		fc_rport_error_retry(rdata, fp);
+		fc_rport_error_retry(rdata, NULL);
 	else
 		kref_get(&rdata->kref);
 }
@@ -1248,6 +1276,7 @@
 		}
 		break;
 	case RPORT_ST_PRLI:
+	case RPORT_ST_RTV:
 	case RPORT_ST_READY:
 	case RPORT_ST_ADISC:
 		FC_RPORT_DBG(rdata, "Received PLOGI in logged-in state %d "
@@ -1255,11 +1284,14 @@
 		/* XXX TBD - should reset */
 		break;
 	case RPORT_ST_DELETE:
-	default:
-		FC_RPORT_DBG(rdata, "Received PLOGI in unexpected state %d\n",
-			     rdata->rp_state);
-		fc_frame_free(rx_fp);
-		goto out;
+	case RPORT_ST_LOGO:
+	case RPORT_ST_RESTART:
+		FC_RPORT_DBG(rdata, "Received PLOGI in state %s - send busy\n",
+			     fc_rport_state(rdata));
+		mutex_unlock(&rdata->rp_mutex);
+		rjt_data.reason = ELS_RJT_BUSY;
+		rjt_data.explan = ELS_EXPL_NONE;
+		goto reject;
 	}
 
 	/*
@@ -1402,7 +1434,7 @@
 				break;
 			case FC_TYPE_FCP:
 				fcp_parm = ntohl(rspp->spp_params);
-				if (fcp_parm * FCP_SPPF_RETRY)
+				if (fcp_parm & FCP_SPPF_RETRY)
 					rdata->flags |= FC_RP_FLAGS_RETRY;
 				rdata->supported_classes = FC_COS_CLASS3;
 				if (fcp_parm & FCP_SPPF_INIT_FCN)
@@ -1510,14 +1542,14 @@
 		FC_RPORT_DBG(rdata, "Received LOGO request while in state %s\n",
 			     fc_rport_state(rdata));
 
+		fc_rport_enter_delete(rdata, RPORT_EV_LOGO);
+
 		/*
-		 * If the remote port was created due to discovery,
-		 * log back in.  It may have seen a stale RSCN about us.
+		 * If the remote port was created due to discovery, set state
+		 * to log back in.  It may have seen a stale RSCN about us.
 		 */
-		if (rdata->rp_state != RPORT_ST_DELETE && rdata->disc_id)
-			fc_rport_enter_plogi(rdata);
-		else
-			fc_rport_enter_delete(rdata, RPORT_EV_LOGO);
+		if (rdata->disc_id)
+			fc_rport_state_enter(rdata, RPORT_ST_RESTART);
 		mutex_unlock(&rdata->rp_mutex);
 	} else
 		FC_RPORT_ID_DBG(lport, sid,
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/libfc/fc_disc.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/libfc/fc_disc.c
@@ -371,7 +371,7 @@
 				 disc, lport->e_d_tov))
 		return;
 err:
-	fc_disc_error(disc, fp);
+	fc_disc_error(disc, NULL);
 }
 
 /**
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/libfc/fc_elsct.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/libfc/fc_elsct.c
@@ -53,8 +53,10 @@
 		did = FC_FID_DIR_SERV;
 	}
 
-	if (rc)
+	if (rc) {
+		fc_frame_free(fp);
 		return NULL;
+	}
 
 	fc_fill_fc_hdr(fp, r_ctl, did, fc_host_port_id(lport->host), fh_type,
 		       FC_FC_FIRST_SEQ | FC_FC_END_SEQ | FC_FC_SEQ_INIT, 0);
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/ibmvscsi/ibmvfc.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/ibmvscsi/ibmvfc.c
@@ -1969,7 +1969,7 @@
 	DECLARE_COMPLETION_ONSTACK(comp);
 	int wait;
 	unsigned long flags;
-	signed long timeout = init_timeout * HZ;
+	signed long timeout = IBMVFC_ABORT_WAIT_TIMEOUT * HZ;
 
 	ENTER;
 	do {
@@ -2720,6 +2720,7 @@
 	if (crq->valid & 0x80) {
 		if (++async_crq->cur == async_crq->size)
 			async_crq->cur = 0;
+		rmb();
 	} else
 		crq = NULL;
 
@@ -2742,6 +2743,7 @@
 	if (crq->valid & 0x80) {
 		if (++queue->cur == queue->size)
 			queue->cur = 0;
+		rmb();
 	} else
 		crq = NULL;
 
@@ -2790,12 +2792,14 @@
 		while ((async = ibmvfc_next_async_crq(vhost)) != NULL) {
 			ibmvfc_handle_async(async, vhost);
 			async->valid = 0;
+			wmb();
 		}
 
 		/* Pull all the valid messages off the CRQ */
 		while ((crq = ibmvfc_next_crq(vhost)) != NULL) {
 			ibmvfc_handle_crq(crq, vhost);
 			crq->valid = 0;
+			wmb();
 		}
 
 		vio_enable_interrupts(vdev);
@@ -2803,10 +2807,12 @@
 			vio_disable_interrupts(vdev);
 			ibmvfc_handle_async(async, vhost);
 			async->valid = 0;
+			wmb();
 		} else if ((crq = ibmvfc_next_crq(vhost)) != NULL) {
 			vio_disable_interrupts(vdev);
 			ibmvfc_handle_crq(crq, vhost);
 			crq->valid = 0;
+			wmb();
 		} else
 			done = 1;
 	}
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/ibmvscsi/ibmvfc.h
+++ linux-mvl-dove-2.6.32/drivers/scsi/ibmvscsi/ibmvfc.h
@@ -38,6 +38,7 @@
 #define IBMVFC_ADISC_PLUS_CANCEL_TIMEOUT	\
 		(IBMVFC_ADISC_TIMEOUT + IBMVFC_ADISC_CANCEL_TIMEOUT)
 #define IBMVFC_INIT_TIMEOUT		120
+#define IBMVFC_ABORT_WAIT_TIMEOUT	40
 #define IBMVFC_MAX_REQUESTS_DEFAULT	100
 
 #define IBMVFC_DEBUG			0
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/mvsas/mv_init.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/mvsas/mv_init.c
@@ -657,6 +657,7 @@
 	{ PCI_VDEVICE(MARVELL, 0x9180), chip_9180 },
 	{ PCI_VDEVICE(ARECA, PCI_DEVICE_ID_ARECA_1300), chip_1300 },
 	{ PCI_VDEVICE(ARECA, PCI_DEVICE_ID_ARECA_1320), chip_1320 },
+	{ PCI_VDEVICE(ADAPTEC2, 0x0450), chip_6440 },
 
 	{ }	/* terminate list */
 };
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/fcoe/fcoe.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/fcoe/fcoe.c
@@ -137,7 +137,7 @@
 	.change_queue_depth = fc_change_queue_depth,
 	.change_queue_type = fc_change_queue_type,
 	.this_id = -1,
-	.cmd_per_lun = 32,
+	.cmd_per_lun = 3,
 	.can_queue = FCOE_MAX_OUTSTANDING_COMMANDS,
 	.use_clustering = ENABLE_CLUSTERING,
 	.sg_tablesize = SG_ALL,
@@ -160,6 +160,7 @@
 {
 	struct fcoe_ctlr *fip = &fcoe->ctlr;
 	struct netdev_hw_addr *ha;
+	struct net_device *real_dev;
 	u8 flogi_maddr[ETH_ALEN];
 
 	fcoe->netdev = netdev;
@@ -173,10 +174,12 @@
 
 	/* look for SAN MAC address, if multiple SAN MACs exist, only
 	 * use the first one for SPMA */
+	real_dev = (netdev->priv_flags & IFF_802_1Q_VLAN) ?
+		vlan_dev_real_dev(netdev) : netdev;
 	rcu_read_lock();
-	for_each_dev_addr(netdev, ha) {
+	for_each_dev_addr(real_dev, ha) {
 		if ((ha->type == NETDEV_HW_ADDR_T_SAN) &&
-		    (is_valid_ether_addr(fip->ctl_src_addr))) {
+		    (is_valid_ether_addr(ha->addr))) {
 			memcpy(fip->ctl_src_addr, ha->addr, ETH_ALEN);
 			fip->spma = 1;
 			break;
@@ -664,7 +667,7 @@
 {
 	struct net_device *n = fcoe_netdev(lp);
 
-	if (n->netdev_ops && n->netdev_ops->ndo_fcoe_ddp_setup)
+	if (n->netdev_ops->ndo_fcoe_ddp_setup)
 		return n->netdev_ops->ndo_fcoe_ddp_setup(n, xid, sgl, sgc);
 
 	return 0;
@@ -681,7 +684,7 @@
 {
 	struct net_device *n = fcoe_netdev(lp);
 
-	if (n->netdev_ops && n->netdev_ops->ndo_fcoe_ddp_done)
+	if (n->netdev_ops->ndo_fcoe_ddp_done)
 		return n->netdev_ops->ndo_fcoe_ddp_done(n, xid);
 	return 0;
 }
@@ -1631,7 +1634,7 @@
 {
 	struct fcoe_interface *fcoe;
 	struct net_device *netdev;
-	int rc;
+	int rc = 0;
 
 	mutex_lock(&fcoe_config_mutex);
 #ifdef CONFIG_FCOE_MODULE
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/mvumi/mvumi.h
+++ linux-mvl-dove-2.6.32/drivers/scsi/mvumi/mvumi.h
@@ -0,0 +1,1429 @@
+/*
+ *
+ *		Linux driver for SAS based RAID controllers
+ *
+ * Copyright (c) 2006-2008  MARVELL SEMICONDUCTOR, LTD.
+ *
+ *		This program is free software; you can redistribute it and/or
+ *		modify it under the terms of the GNU General Public License
+ *		as published by the Free Software Foundation; either version
+ *		2 of the License, or (at your option) any later version.
+ *
+ * FILE		: mvumi.c
+ */
+
+#ifndef MV_RAID_UMI_H
+#define MV_RAID_UMI_H
+#define MV_DEBUG	1
+
+/*
+ * FW reports the maximum of number of commands that it can accept (maximum
+ * commands that can be outstanding) at any time. The driver must report a
+ * lower number to the mid layer because it can issue a few internal commands
+ * itself (E.g, AEN, abort cmd, IOCTLs etc). The number of commands it needs
+ * is shown below
+ */
+#define MVUMI_INT_CMDS			1
+
+/*
+ * ===============================
+ * MV SAS driver definitions
+ * ===============================
+ */
+/* for communication with OS/SCSI mid layer only */
+#define MVUMI_MAX_TARGET_NUMBER			128
+#define MVUMI_MAX_CHANNELS			0
+#define MVUMI_DEFAULT_INIT_ID			(-1)
+#define MVUMI_MAX_LUN				1
+#define MVUMI_MAX_LD				MVUMI_MAX_TARGET_NUMBER
+#define MVUMI_MAX_REQUEST_NUMBER		32
+#define MVUMI_MAX_SG_ENTRY			30
+#define MVUMI_MAX_TRANSFER_SIZE			(128 * 1024)
+#define MVUMI_MAX_REQUEST_PER_LUN		MVUMI_MAX_REQUEST_NUMBER
+#define MVUMI_USE_CLUSTERING			DISABLE_CLUSTERING
+#define MVUMI_EMULATED				0
+
+
+#define SUPPORT_VIRTUAL_DEVICE       1
+#define VIRTUAL_DEVICE_ID            (MVUMI_MAX_LD - 1)
+#define USE_NEW_SGTABLE				1
+
+/* driver capabilities */
+#define SUPPORT_INTERNAL_REQ	1
+#define FW_MAX_DELAY		5
+
+#define SUPPORT_EVENT                1
+#if defined(SUPPORT_EVENT)
+#define MAX_EVENTS                      20
+#define MAX_EVENT_PARAMS                4
+#define MAX_EVENTS_RETURNED             6
+#endif	/* #if defined(SUPPORT_EVENT) */
+
+#define MAX_BASE_ADDRESS                6
+//#define MV_MAX_TRANSFER_SIZE            (32*1024)
+#define MAX_INTERNAL_REQ            2
+
+#define LIST_WORK_AROUND
+//#define DMA_WORK_AROUND
+
+#define MAX_MGMT_ADAPTERS		1024
+#define MAX_IOCTL_SGE			16
+#define SENSE_INFO_BUFFER_SIZE		32
+
+#ifdef MV_DEBUG
+#define mv_printk(format, arg...)		\
+	do {	if(mvumi_dbg_lvl) 	\
+		printk( "%s:" format, MV_DRIVER_NAME, ## arg);	\
+		}while(0)
+#else
+static inline int
+mv_printk(const char * fmt, ...)
+{
+	return 0;
+}
+#endif
+
+
+/*
+ * Marvell SAS Driver meta data
+ */
+//#define MVUMI_VERSION				"2.00.00.00-rc1"
+#define MVUMI_RELDATE				"Jan 22, 2008"
+#define VER_MAJOR       	2
+#define VER_MINOR       	0
+#define VER_OEM		4
+#define VER_BUILD       	9
+#define VER_TEST        ""
+/* call VER_VAR_TO_STRING */
+#define NUM_TO_STRING(num1, num2, num3, num4) #num1"."#num2"."#num3"."#num4
+#define VER_VAR_TO_STRING(major, minor, oem, build) NUM_TO_STRING(major, \
+								  minor, \
+								  oem,   \
+								  build)
+
+#define MVUMI_VERSION   VER_VAR_TO_STRING(VER_MAJOR, VER_MINOR,       \
+					     VER_OEM, VER_BUILD) VER_TEST
+
+#define MV_DRIVER_NAME				"mvumi"
+
+/*
+ * Device IDs
+ */
+#ifndef PCI_VENDOR_ID_MARVELL
+#define PCI_VENDOR_ID_MARVELL		0x11ab
+#endif
+#define PCI_DEVICE_ID_MARVELL_MV8480	0x8480
+#define PCI_DEVICE_ID_MARVELL_MV8180	0x8180
+#define PCI_DEVICE_ID_MARVELL_MV8120	0x8120
+#define PCI_DEVICE_ID_MARVELL_MV8110	0x8110
+
+/*
+ * =====================================
+ * Marvell SAS  firmware definitions
+ * =====================================
+ */
+
+#define SECTOR_LENGTH 512
+/*
+ * Marvell Universal Message Interface (UMI) defines a messaging interface
+ * between host and Marvell IOP RAID or non-RAID products.
+ * Commands are issued using "message frames".
+ */
+
+
+
+#define MVUMI_DBG_LVL				1
+
+#define MVUMI_FW_BUSY				(1U << 0)
+#define MVUMI_FW_ATTACH				(1U << 1)
+#define MVUMI_FW_ALLOC				(1U << 2)
+
+/*
+ * When SCSI mid-layer calls driver's reset routine, driver waits for
+ * MVUMI_RESET_WAIT_TIME seconds for all outstanding IO to complete. Note
+ * that the driver cannot _actually_ abort or reset pending commands. While
+ * it is waiting for the commands to complete, it prints a diagnostic message
+ * every MVUMI_RESET_NOTICE_INTERVAL seconds
+ */
+#define MVUMI_RESET_WAIT_TIME			180
+#define MVUMI_INTERNAL_CMD_WAIT_TIME		45
+#define	MVUMI_RESET_NOTICE_INTERVAL		5
+#define MVUMI_IOCTL_CMD			0
+#define MVUMI_DEFAULT_CMD_TIMEOUT		15
+#define MVUMI_POLL_TIMEOUT_SECS         10
+#define MVUMI_HANDSHAKE_TIMEOUT			40
+
+/*
+ * FW can accept both 32 and 64 bit SGLs. We want to allocate 32/64 bit
+ * SGLs based on the size of dma_addr_t
+ */
+#define IS_DMA64				(sizeof(dma_addr_t) == 8)
+
+#define MV_TRUE                           1
+#define MV_FALSE                          0
+
+#define MV_BIT(x)                         (1U << (x))
+#define ROUNDING_MASK(x, mask)  (((x)+(mask))&~(mask))
+#define ROUNDING(value, align)  ROUNDING_MASK(value,   \
+						 (typeof(value)) (align-1))
+
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+#define mv_scmd_host(cmd)    cmd->device->host
+#define mv_scmd_channel(cmd) cmd->device->channel
+#define mv_scmd_target(cmd)  cmd->device->id
+#define mv_scmd_lun(cmd)     cmd->device->lun
+#else
+#define mv_scmd_host(cmd)    cmd->host
+#define mv_scmd_channel(cmd) cmd->channel
+#define mv_scmd_target(cmd)  cmd->target
+#define mv_scmd_lun(cmd)     cmd->lun
+#endif
+
+#define MAX_CDB_SIZE                           16
+
+#define MV_ASSERT(_x_)  BUG_ON(!(_x_))
+#define LO_BUSADDR(x) ((u32)(x))
+#define HI_BUSADDR(x) (sizeof(dma_addr_t)>4? (u64)(x) >> 32 : 0)
+#ifndef scsi_to_pci_dma_dir
+#define scsi_to_pci_dma_dir(scsi_dir) ((int)(scsi_dir))
+#endif
+
+
+enum MV_QUEUE_COMMAND_RESULT {
+    MV_QUEUE_COMMAND_RESULT_FINISHED    = 0,
+    MV_QUEUE_COMMAND_RESULT_FULL,
+    MV_QUEUE_COMMAND_RESULT_NO_RESOURCE,
+    MV_QUEUE_COMMAND_RESULT_SENT,
+} ;
+
+#define mr32(offset)	readl(regs+offset)
+#define mw32(offset,val)	writel((val),regs+offset)
+#define mw32_f(offset, val) do{	\
+	writel((val), regs + offset);	\
+	readl(regs+offset);	\
+	} while (0)
+
+#define MU_ENTRY_DEPTH              16
+
+// list entry size in DWORDs
+#define CL_LIST_ENTRY_SIZE_DWORDS(p)    (1 << (p))
+
+// list entry size in BYTEs
+#define CL_LIST_ENTRY_SIZE_BYTES(p)	(CL_LIST_ENTRY_SIZE_DWORDS(p) << 2)
+
+/*
+ * ===============================
+ * Marvell SAS driver definitions
+ * ===============================
+ */
+enum {
+UMI_STATE_IDLE			= 0,
+UMI_STATE_STARTING		= 1,
+UMI_STATE_HANDSHAKING		= 2,
+UMI_STATE_STARTED		= 3,
+
+CL_IN_ENTRY_SIZE_SETTING	= 8,
+CL_OUT_ENTRY_SIZE_SETTING	= 4,
+CL_IN_ENTRY_SIZE		= CL_LIST_ENTRY_SIZE_BYTES(CL_IN_ENTRY_SIZE_SETTING),
+CL_OUT_ENTRY_SIZE		= CL_LIST_ENTRY_SIZE_BYTES(CL_OUT_ENTRY_SIZE_SETTING),
+
+MV_OS_TYPE_BIOS			= 1,
+MV_OS_TYPE_WINDOWS		= 2,
+MV_OS_TYPE_LINUX		= 3,
+
+
+/*******************************************/
+
+/* ARM Mbus Registers Map		      	   */
+
+/*******************************************/
+CPU_MAIN_INT_CAUSE_REG  = 0x20200,
+CPU_MAIN_IRQ_MASK_REG   = 0x20204,
+CPU_MAIN_FIQ_MASK_REG   = 0x20208,
+CPU_ENPOINTA_MASK_REG   = 0x2020C,
+CPU_ENPOINTB_MASK_REG   = 0x20210,
+
+INT_MAP_COMBOUT         = MV_BIT(11),
+INT_MAP_COMBIN          = MV_BIT(10),
+INT_MAP_COMBERR         = MV_BIT(9),
+INT_MAP_COMAOUT         = MV_BIT(8),
+INT_MAP_COMAIN          = MV_BIT(7),
+INT_MAP_COMAERR         = MV_BIT(6),
+
+INT_MAP_COMAINT         = (INT_MAP_COMAOUT | INT_MAP_COMAERR),
+INT_MAP_COMBINT         = (INT_MAP_COMBOUT | INT_MAP_COMBIN | INT_MAP_COMBERR),
+INT_MAP_COMINT          = (INT_MAP_COMAINT | INT_MAP_COMBINT),
+
+INT_MAP_DL_CPU2PCIEB    = MV_BIT(3),
+INT_MAP_DL_PCIEB2CPU    = MV_BIT(2),
+INT_MAP_DL_CPU2PCIEA    = MV_BIT(1),
+INT_MAP_DL_PCIEA2CPU    = MV_BIT(0),
+
+/*******************************************/
+
+/* ARM Doorbell Registers Map			   */
+
+/*******************************************/
+CPU_PCIEA_TO_ARM_DRBL_REG   = 0x20400,
+CPU_PCIEA_TO_ARM_MASK_REG   = 0x20404,
+CPU_ARM_TO_PCIEA_DRBL_REG   = 0x20408,
+CPU_ARM_TO_PCIEA_MASK_REG   = 0x2040C,
+CPU_PCIEB_TO_ARM_DRBL_REG   = 0x20410,
+CPU_PCIEB_TO_ARM_MASK_REG   = 0x20414,
+CPU_ARM_TO_PCIEB_DRBL_REG   = 0x20418,
+CPU_ARM_TO_PCIEB_MASK_REG   = 0x2041C,
+
+DRBL_HANDSHAKE              = MV_BIT(0),
+DRBL_SOFT_RESET             = MV_BIT(1),
+DRBL_BUS_CHANGE             = MV_BIT(2),
+DRBL_EVENT_NOTIFY           = MV_BIT(3),
+DRBL_MU_RESET		=	MV_BIT(4),
+DRBL_HANDSHAKE_ISR          = DRBL_HANDSHAKE,
+
+CPU_PCIEA_TO_ARM_MSG0       = 0x20430,
+CPU_PCIEA_TO_ARM_MSG1       = 0x20434,
+CPU_ARM_TO_PCIEA_MSG0       = 0x20438,
+CPU_ARM_TO_PCIEA_MSG1       = 0x2043C,
+CPU_PCIEB_TO_ARM_MSG0       = 0x20440,
+CPU_PCIEB_TO_ARM_MSG1       = 0x20444,
+CPU_ARM_TO_PCIEB_MSG0       = 0x20448,
+CPU_ARM_TO_PCIEB_MSG1       = 0x2044C,
+
+/*******************************************/
+
+/* ARM Communication List Registers Map    */
+
+/*******************************************/
+CLA_INB_LIST_BASEL          = 0x500,
+CLA_INB_LIST_BASEH          = 0x504,
+CLA_INB_AVAL_COUNT_BASEL    = 0x508,
+CLA_INB_AVAL_COUNT_BASEH    = 0x50C,
+CLA_INB_DESTI_LIST_BASEL    = 0x510,
+CLA_INB_DESTI_LIST_BASEH    = 0x514,
+CLA_INB_WRITE_POINTER       = 0x518,
+CLA_INB_READ_POINTER        = 0x51C,
+CLA_INB_AVAL_COUNT          = 0x520,
+CLA_INB_DESTI_UPDATE        = 0x524,
+CLA_INB_INTF_CONF           = 0x528,
+CLA_INB_INTF_CTL            = 0x52C,
+
+CLA_OUTB_LIST_BASEL         = 0x530,
+CLA_OUTB_LIST_BASEH         = 0x534,
+CLA_OUTB_SOURCE_LIST_BASEL  = 0x538,
+CLA_OUTB_SOURCE_LIST_BASEH  = 0x53C,
+CLA_OUTB_WRITE_POINTER      = 0x540,
+CLA_OUTB_COPY_POINTER       = 0x544,
+CLA_OUTB_AVAL_COUNT         = 0x54C,
+CLA_OUTB_READ_POINTER       = 0x548,
+CLA_OUTB_INTF_CONF          = 0x550,
+CLA_OUTB_INTF_CTL           = 0x554,
+
+CLA_ISR_CAUSE               = 0x560,
+CLA_ISR_MASK                = 0x564,
+
+CLA_INTF_SEL0               = 0x570,
+CLA_INTF_SEL1               = 0x574,
+CLA_INTF_SEL2               = 0x578,
+CLA_INTF_SEL3               = 0x57C,
+
+CLA_INB_LIST_ERR_INF        = 0x590,
+CLA_INB_LIST_ERR_ADDRL      = 0x594,
+CLA_INB_LIST_ERR_ADDRH      = 0x598,
+CLA_OUTB_LIST_ERR_INF       = 0x5A0,
+CLA_OUTB_LIST_ERR_ADDRL     = 0x5A4,
+CLA_OUTB_LIST_ERR_ADDRH     = 0x5A8,
+
+INT_MAP_MU                  = (INT_MAP_DL_CPU2PCIEA | INT_MAP_COMAINT),
+
+CL_POINTER_TOGGLE           = MV_BIT(12),
+
+CLIC_IN_IRQ                 = MV_BIT(0),
+CLIC_OUT_IRQ                = MV_BIT(1),
+CLIC_IN_ERR_IRQ             = MV_BIT(8),
+CLIC_OUT_ERR_IRQ            = MV_BIT(12),
+CLIC_ASSERET_IRQ            = (CLIC_IN_IRQ | CLIC_OUT_IRQ | CLIC_IN_ERR_IRQ
+								| CLIC_OUT_ERR_IRQ),
+
+CL_SLOT_NUM_MASK            = 0xFFF,
+
+
+
+/*******************************************/
+/* ARM RESETl Registers Map			   */
+/*******************************************/
+
+CPU_RSTOUTN_EN_REG				= 0xF1400,
+CPU_RSTOUTN_MASK_REG			= 0x20108,
+CPU_SYS_SOFT_RST_REG			= 0x2010C,
+
+
+CRMR_RST_OUT_DISABLE			= MV_BIT(24),
+CRMR_SOFT_RST_OUT_MASK		= MV_BIT(2),
+CSSRR_SYSTEM_SOFT_RST			= MV_BIT(0),
+
+
+/*
+* Command flag is the flag for the CDB command itself
+*/
+/* The first 16 bit can be determined by the initiator. */
+CMD_FLAG_NON_DATA                 = MV_BIT(0),  /* 1-non data;
+						0-data command */
+CMD_FLAG_DMA                      = MV_BIT(1),  /* 1-DMA */
+CMD_FLAG_PIO					  = MV_BIT(2),  /* 1-PIO */
+CMD_FLAG_DATA_IN                  = MV_BIT(3),  /* 1-host read data */
+CMD_FLAG_DATA_OUT                 = MV_BIT(4),	 /* 1-host write data */
+CMD_FLAG_SMART                    = MV_BIT(5),  /* 1-SMART command;
+						0-non SMART command*/
+
+/*
+* The last 16 bit only can be set by the target. Only core driver knows
+* the device characteristic.
+*/
+CMD_FLAG_NCQ                      = MV_BIT(16),
+CMD_FLAG_TCQ                      = MV_BIT(17),
+CMD_FLAG_48BIT                    = MV_BIT(18),
+CMD_FLAG_PACKET                   = MV_BIT(19),  /* ATAPI packet cmd */
+CMD_FLAG_SCSI_PASS_THRU           = MV_BIT(20),
+CMD_FLAG_ATA_PASS_THRU            = MV_BIT(21),
+
+
+SCSI_CMD_MARVELL_SPECIFIC         = 0xE1,
+CDB_CORE_MODULE                   = 0x1,
+CDB_CORE_SOFT_RESET_1			  = 0x1,
+CDB_CORE_SOFT_RESET_0			  = 0x2,
+CDB_CORE_IDENTIFY                 = 0x3,
+CDB_CORE_SET_UDMA_MODE            = 0x4,
+CDB_CORE_SET_PIO_MODE             = 0x5,
+CDB_CORE_ENABLE_WRITE_CACHE       = 0x6,
+CDB_CORE_DISABLE_WRITE_CACHE      = 0x7,
+CDB_CORE_ENABLE_SMART             = 0x8,
+CDB_CORE_DISABLE_SMART            = 0x9,
+CDB_CORE_SMART_RETURN_STATUS      = 0xA,
+CDB_CORE_SHUTDOWN                 = 0xB,
+CDB_CORE_ENABLE_READ_AHEAD        = 0xC,
+CDB_CORE_DISABLE_READ_AHEAD       = 0xD,
+CDB_CORE_READ_LOG_EXT             = 0xE,
+CDB_CORE_TASK_MGMT                = 0xF,
+CDB_CORE_SMP                      = 0x10,
+CDB_CORE_PM_READ_REG			= 0x11,
+CDB_CORE_PM_WRITE_REG			= 0x12,
+CDB_CORE_RESET_DEVICE			= 0x13,
+CDB_CORE_RESET_PORT				= 0x14,
+CDB_CORE_OS_SMART_CMD			= 0x15,
+SMP_CDB_USE_ADDRESS             = 0x01,
+
+
+
+/* CDB definitions */
+APICDB0_ADAPTER                        = 0xF0,
+APICDB0_LD                             = 0xF1,
+APICDB0_BLOCK                          = 0xF2,
+APICDB0_PD                             = 0xF3,
+APICDB0_EVENT                          = 0xF4,
+APICDB0_DBG                            = 0xF5,
+APICDB0_FLASH                          = 0xF6,
+
+/* for Adapter */
+APICDB1_ADAPTER_GETCOUNT               = 0,
+APICDB1_ADAPTER_GETINFO                = (APICDB1_ADAPTER_GETCOUNT + 1),
+APICDB1_ADAPTER_GETCONFIG              = (APICDB1_ADAPTER_GETCOUNT + 2),
+APICDB1_ADAPTER_SETCONFIG              = (APICDB1_ADAPTER_GETCOUNT + 3),
+APICDB1_ADAPTER_POWER_STATE_CHANGE     = (APICDB1_ADAPTER_GETCOUNT + 4),
+APICDB1_ADAPTER_MAX                    = (APICDB1_ADAPTER_GETCOUNT + 5),
+
+/* for LD */
+APICDB1_LD_CREATE                      = 0,
+APICDB1_LD_GETMAXSIZE                  = (APICDB1_LD_CREATE + 1),
+APICDB1_LD_GETINFO                     = (APICDB1_LD_CREATE + 2),
+APICDB1_LD_GETTARGETLDINFO             = (APICDB1_LD_CREATE + 3),
+APICDB1_LD_DELETE                      = (APICDB1_LD_CREATE + 4),
+APICDB1_LD_GETSTATUS                   = (APICDB1_LD_CREATE + 5),
+APICDB1_LD_GETCONFIG                   = (APICDB1_LD_CREATE + 6),
+APICDB1_LD_SETCONFIG                   = (APICDB1_LD_CREATE + 7),
+APICDB1_LD_STARTREBUILD                = (APICDB1_LD_CREATE + 8),
+APICDB1_LD_STARTCONSISTENCYCHECK       = (APICDB1_LD_CREATE + 9),
+APICDB1_LD_STARTINIT                   = (APICDB1_LD_CREATE + 10),
+APICDB1_LD_STARTMIGRATION              = (APICDB1_LD_CREATE + 11),
+APICDB1_LD_BGACONTROL                  = (APICDB1_LD_CREATE + 12),
+APICDB1_LD_WIPEMDD                     = (APICDB1_LD_CREATE + 13),
+APICDB1_LD_GETSPARESTATUS              = (APICDB1_LD_CREATE + 14),
+APICDB1_LD_SETGLOBALSPARE              = (APICDB1_LD_CREATE + 15),
+APICDB1_LD_SETLDSPARE                  = (APICDB1_LD_CREATE + 16),
+APICDB1_LD_REMOVESPARE                 = (APICDB1_LD_CREATE + 17),
+APICDB1_LD_HD_SETSTATUS                = (APICDB1_LD_CREATE + 18),
+APICDB1_LD_SHUTDOWN                    = (APICDB1_LD_CREATE + 19),
+APICDB1_LD_HD_FREE_SPACE_INFO          = (APICDB1_LD_CREATE + 20),
+APICDB1_LD_HD_GETMBRINFO               = (APICDB1_LD_CREATE + 21),
+APICDB1_LD_SIZEOF_MIGRATE_TARGET       = (APICDB1_LD_CREATE + 22),
+APICDB1_LD_TARGET_LUN_TYPE			   = (APICDB1_LD_CREATE + 23),
+APICDB1_LD_HD_MPCHECK                  = (APICDB1_LD_CREATE + 24),
+APICDB1_LD_HD_GETMPSTATUS              = (APICDB1_LD_CREATE + 25),
+APICDB1_LD_HD_GET_RCT_COUNT            = (APICDB1_LD_CREATE + 26),
+APICDB1_LD_HD_RCT_REPORT               = (APICDB1_LD_CREATE + 27),
+APICDB1_LD_HD_START_DATASCRUB          = (APICDB1_LD_CREATE + 28),	// temp
+APICDB1_LD_HD_BGACONTROL	           = (APICDB1_LD_CREATE + 29),	// temp
+APICDB1_LD_HD_GETBGASTATUS             = (APICDB1_LD_CREATE + 30),	// temp
+// Added reserved for future expansion so that MRU/CLI can be backward compatible with drier.
+APICDB1_LD_RESERVED1				   = (APICDB1_LD_CREATE + 31),
+APICDB1_LD_RESERVED2				   = (APICDB1_LD_CREATE + 32),
+APICDB1_LD_RESERVED3				   = (APICDB1_LD_CREATE + 33),
+APICDB1_LD_RESERVED4				   = (APICDB1_LD_CREATE + 34),
+APICDB1_LD_RESERVED5				   = (APICDB1_LD_CREATE + 35),
+
+APICDB1_LD_MAX                         = (APICDB1_LD_CREATE + 36),
+
+/* for PD */
+APICDB1_PD_GETHD_INFO                  = 0,
+APICDB1_PD_GETEXPANDER_INFO            = (APICDB1_PD_GETHD_INFO + 1),
+APICDB1_PD_GETPM_INFO                  = (APICDB1_PD_GETHD_INFO + 2),
+APICDB1_PD_GETSETTING                  = (APICDB1_PD_GETHD_INFO + 3),
+APICDB1_PD_SETSETTING                  = (APICDB1_PD_GETHD_INFO + 4),
+APICDB1_PD_BSL_DUMP                    = (APICDB1_PD_GETHD_INFO + 5),
+APICDB1_PD_RESERVED1				   = (APICDB1_PD_GETHD_INFO + 6),	// not used
+APICDB1_PD_RESERVED2				   = (APICDB1_PD_GETHD_INFO + 7),	// not used
+APICDB1_PD_GETSTATUS                   = (APICDB1_PD_GETHD_INFO + 8),
+APICDB1_PD_GETHD_INFO_EXT              = (APICDB1_PD_GETHD_INFO + 9),	// APICDB1_PD_GETHD_INFO extension
+APICDB1_PD_MAX                         = (APICDB1_PD_GETHD_INFO + 10),
+
+/* Sub command for APICDB1_PD_SETSETTING */
+APICDB4_PD_SET_WRITE_CACHE_OFF         = 0,
+APICDB4_PD_SET_WRITE_CACHE_ON          = 1,
+APICDB4_PD_SET_SMART_OFF               = 2,
+APICDB4_PD_SET_SMART_ON                = 3,
+APICDB4_PD_SMART_RETURN_STATUS         = 4,
+APICDB4_PD_SET_SPEED_3G				   = 5,
+APICDB4_PD_SET_SPEED_1_5G			   = 6,
+
+/* for Block */
+APICDB1_BLOCK_GETINFO                  = 0,
+APICDB1_BLOCK_HD_BLOCKIDS              = (APICDB1_BLOCK_GETINFO + 1),
+APICDB1_BLOCK_MAX                      = (APICDB1_BLOCK_GETINFO + 2),
+
+/* for event */
+APICDB1_HOST_GETEVENT                  = 1,
+APICDB1_EVENT_GETEVENT                 = 0,
+APICDB1_EVENT_MAX                      = (APICDB1_EVENT_GETEVENT + 1),
+
+/* for DBG */
+APICDB1_DBG_PDWR                       = 0,
+APICDB1_DBG_MAP                        = (APICDB1_DBG_PDWR + 1),
+APICDB1_DBG_MAX                        = (APICDB1_DBG_PDWR + 2),
+
+/* for FLASH */
+APICDB1_FLASH_BIN                      = 0,
+
+/* for passthru commands
+Cdb[0]: APICDB0_PASS_THRU_CMD_SCSI or APICDB0_PASS_THRU_CMD_ATA
+Cdb[1]: APICDB1 (Data flow)
+Cdb[2]: TargetID MSB
+Cdb[3]: TargetID LSB
+Cdb[4]-Cdb[15]: SCSI/ATA command is embedded here
+	SCSI command: SCSI command Cdb bytes is in the same order as the spec
+	ATA Command:
+		Features = pReq->Cdb[0];
+		Sector_Count = pReq->Cdb[1];
+		LBA_Low = pReq->Cdb[2];
+		LBA_Mid = pReq->Cdb[3];
+		LBA_High = pReq->Cdb[4];
+		Device = pReq->Cdb[5];
+		Command = pReq->Cdb[6];
+
+		if necessary:
+		Feature_Exp = pReq->Cdb[7];
+		Sector_Count_Exp = pReq->Cdb[8];
+		LBA_Low_Exp = pReq->Cdb[9];
+		LBA_Mid_Exp = pReq->Cdb[10];
+		LBA_High_Exp = pReq->Cdb[11];
+*/
+APICDB0_PASS_THRU_CMD_SCSI			      = 0xFA,
+APICDB0_PASS_THRU_CMD_ATA				  = 0xFB,
+
+APICDB1_SCSI_NON_DATA					  = 0x00,
+APICDB1_SCSI_PIO_IN						  = 0x01, /* goes with Read Long */
+APICDB1_SCSI_PIO_OUT					  = 0x02, /* goes with Write Long */
+
+APICDB1_ATA_NON_DATA					  = 0x00,
+APICDB1_ATA_PIO_IN						  = 0x01,
+APICDB1_ATA_PIO_OUT						  = 0x02,
+};
+
+
+#define SGD_DOMAIN_MASK	0xF0000000L
+
+#define SGD_EOT			(1L<<27)	/* End of table */
+#define SGD_COMPACT		(1L<<26)	/* Compact (12 bytes) SG format, not verified yet */
+#define SGD_WIDE		(1L<<25)	/* 32 byte SG format */
+#define SGD_X64			(1L<<24)	/* the 2nd part of SGD_WIDE */
+#define SGD_NEXT_TBL	(1L<<23)	/* Next SG table format */
+#define SGD_VIRTUAL		(1L<<22)	/* Virtual SG format, either 32 or 64 bit is determined during compile time. */
+#define SGD_REFTBL		(1L<<21)	/* sg table reference format, either 32 or 64 bit is determined during compile time. */
+#define SGD_REFSGD		(1L<<20)	/* sg item reference format */
+#define SGD_VP			(1L<<19)	/* virtual and physical, not verified yet */
+#define SGD_VWOXCTX		(1L<<18)	/* virtual without translation context */
+#define SGD_PCTX		(1L<<17)	/* sgd_pctx_t, 64 bit only */
+
+
+struct mv_sgl {
+	u32	baseaddr_l;
+	u32 baseaddr_h;
+	u32 flags;
+	u32	size;
+};
+
+#define SIZEOF_COMPACT_SGD	12
+
+struct mv_compact_sgl {
+	u32	baseaddr_l;
+	u32 baseaddr_h;
+	u32	flags;
+};
+
+#define GET_COMPACT_SGD_SIZE(sgd)	\
+	((((struct mv_compact_sgl*)(sgd))->flags) & 0x3FFFFFL)
+
+#define SET_COMPACT_SGD_SIZE(sgd,sz) do {			\
+	(((struct mv_compact_sgl*)(sgd))->flags) &= ~0x3FFFFFL;	\
+	(((struct mv_compact_sgl*)(sgd))->flags) |= (sz);		\
+} while(0)
+
+#define sgd_getsz(sgd,sz) do {				\
+	if( (sgd)->flags & SGD_COMPACT )		\
+		(sz) = GET_COMPACT_SGD_SIZE(sgd);	\
+	else (sz) = (sgd)->size;				\
+} while(0)
+
+#define sgd_setsz(sgd,sz) do {				\
+	if( (sgd)->flags & SGD_COMPACT )		\
+		SET_COMPACT_SGD_SIZE(sgd,sz);		\
+	else (sgd)->size = (sz);				\
+} while(0)
+
+
+#define sgd_inc(sgd) do {	\
+	if( (sgd)->flags & SGD_COMPACT )					\
+		sgd = (struct mv_sgl *)(((unsigned char*) (sgd)) + 12);	\
+	else if( (sgd)->flags & SGD_WIDE )					\
+		sgd = (struct mv_sgl *)(((unsigned char*) (sgd)) + 32);	\
+	else sgd = (struct mv_sgl *)(((unsigned char*) (sgd)) + 16);	\
+} while(0)
+
+
+struct mv_sgl_t {
+	u8 max_entry;
+	u8 valid_entry;
+	u8 flag;
+	u8 reserved0;
+	u32 byte_count;
+	struct mv_sgl* entry_ptr;
+};
+
+
+struct mvumi_res_mgnt {
+	struct list_head res_entry;
+	dma_addr_t bus_addr;
+	void *virt_addr;
+	u32 size;
+	u16 type;          /* enum Resource_Type */
+	u16 align;
+};
+
+/* Resource type */
+enum resource_type {
+	RESOURCE_CACHED_MEMORY = 0,
+	RESOURCE_PCI_DMA_MEMORY,
+	RESOURCE_UNCACHED_MEMORY
+};
+
+struct mvumi_hs_msg {
+	void *data;
+	u32 *msg;
+	u32 *param;
+	struct  list_head msg_list;
+};
+
+#define MSG_QUEUE_DEPTH	20
+struct mvumi_msg_queue {
+	spinlock_t lock;
+	struct list_head free;
+	struct list_head tasks;
+	struct mvumi_hs_msg msgs[MSG_QUEUE_DEPTH];
+};
+
+
+
+/*
+ * SCSI status
+ */
+#define SCSI_STATUS_GOOD                        0x00
+#define SCSI_STATUS_CHECK_CONDITION             0x02
+#define SCSI_STATUS_CONDITION_MET               0x04
+#define SCSI_STATUS_BUSY                        0x08
+#define SCSI_STATUS_INTERMEDIATE                0x10
+#define SCSI_STATUS_INTERMEDIATE_MET            0x14
+#define SCSI_STATUS_RESERVATION_CONFLICT        0x18
+#define SCSI_STATUS_FULL                        0x28
+#define SCSI_STATUS_ACA_ACTIVE                  0x30
+#define SCSI_STATUS_ABORTED                     0x40
+
+
+/*
+ * SCSI sense key
+ */
+#define SCSI_SK_NO_SENSE                        0x00
+#define SCSI_SK_RECOVERED_ERROR                 0x01
+#define SCSI_SK_NOT_READY                       0x02
+#define SCSI_SK_MEDIUM_ERROR                    0x03
+#define SCSI_SK_HARDWARE_ERROR                  0x04
+#define SCSI_SK_ILLEGAL_REQUEST                 0x05
+#define SCSI_SK_UNIT_ATTENTION                  0x06
+#define SCSI_SK_DATA_PROTECT                    0x07
+#define SCSI_SK_BLANK_CHECK                     0x08
+#define SCSI_SK_VENDOR_SPECIFIC                 0x09
+#define SCSI_SK_COPY_ABORTED                    0x0A
+#define SCSI_SK_ABORTED_COMMAND                 0x0B
+#define SCSI_SK_VOLUME_OVERFLOW                 0x0D
+#define SCSI_SK_MISCOMPARE                      0x0E
+#ifdef _XOR_DMA
+#define SCSI_SK_DMA					0x0F
+#endif
+
+/*
+ * SCSI additional sense code
+ */
+#define SCSI_ASC_NO_ASC                         0x00
+#define SCSI_ASC_LUN_NOT_READY                  0x04
+#define SCSI_ASC_ECC_ERROR                      0x10
+#define SCSI_ASC_ID_ADDR_MARK_NOT_FOUND         0x12
+#define SCSI_ASC_INVALID_OPCODE                 0x20
+#define SCSI_ASC_LBA_OUT_OF_RANGE               0x21
+#define SCSI_ASC_INVALID_FEILD_IN_CDB           0x24
+#define SCSI_ASC_LOGICAL_UNIT_NOT_SUPPORTED     0x25
+#define SCSI_ASC_LOGICAL_UNIT_NOT_RESP_TO_SEL	0x05
+#define SCSI_ASC_INVALID_FIELD_IN_PARAMETER     0x26
+#define SCSI_ASC_INTERNAL_TARGET_FAILURE        0x44
+#define SCSI_ASC_FAILURE_PREDICTION_THRESHOLD_EXCEEDED	0x5D
+
+
+/*
+ * SCSI additional sense code qualifier
+ */
+#define SCSI_ASCQ_NO_ASCQ                       0x00
+#define SCSI_ASCQ_INTERVENTION_REQUIRED         0x03
+#define SCSI_ASCQ_MAINTENANCE_IN_PROGRESS       0x80
+#define SCSI_ASCQ_HIF_GENERAL_HD_FAILURE		0x10
+
+struct mvumi_sense_data {
+	u8 error_eode:7;
+	u8 valid:1;
+	u8 segment_number;
+	u8 sense_key:4;
+	u8 reserved:1;
+	u8 incorrect_length:1;
+	u8 end_of_media:1;
+	u8 file_mark:1;
+	u8 information[4];
+	u8 additional_sense_length;
+	u8 command_specific_information[4];
+	u8 additional_sense_code;
+	u8 additional_sense_code_qualifier;
+	u8 field_replaceable_unit_code;
+	u8 sense_key_specific[3];
+};
+
+
+
+#define REQ_STATUS_SUCCESS                      0x0
+#define REQ_STATUS_NOT_READY                    0x1
+#define REQ_STATUS_MEDIA_ERROR                  0x2
+#define REQ_STATUS_BUSY                         0x3
+#define REQ_STATUS_INVALID_REQUEST              0x4
+#define REQ_STATUS_INVALID_PARAMETER            0x5
+#define REQ_STATUS_NO_DEVICE                    0x6
+/* Sense data structure is the SCSI "Fixed format sense datat" format. */
+#define REQ_STATUS_HAS_SENSE                    0x7
+#define REQ_STATUS_ERROR                        0x8
+#define REQ_STATUS_ERROR_WITH_SENSE             0x10
+/* Request initiator must set the status to REQ_STATUS_PENDING. */
+#define REQ_STATUS_PENDING                      0x80
+#define REQ_STATUS_RETRY                        0x81
+#define REQ_STATUS_REQUEST_SENSE                0x82
+
+
+struct mvumi_cmd {
+	struct list_head queue_pointer;
+	struct mvumi_msg_frame *frame;
+	//struct mvumi_rsp_frame *rsp_frame;
+	//dma_addr_t frame_phys_addr;
+	//u8 *sense;
+	//dma_addr_t sense_phys_addr;
+
+	u32 index;
+	u8 sync_cmd;
+	u8 cmd_status;
+	u16 abort_aen;
+	struct timer_list eh_timer;
+	struct scsi_cmnd *scmd;
+	struct mv_hba *mhba;
+	//u32 frame_count;
+#if defined(DMA_WORK_AROUND)
+	void *d_buf;
+#endif
+	//u8 os_cmd;
+	void *data_buf;
+};
+
+#define MVUMI_IOC_FIRMWARE	_IOWR('M', 1, struct mvumi_iocpacket)
+#define MVUMI_IOC_GET_AEN	_IOW('M', 3, struct mvumi_aen)
+
+
+struct mvumi_pass_thru_direct {
+	u16 length;
+	u8 scsi_status;
+	u8 path_id;
+	u8 target_id;
+	u8 lun;
+	u8 cdb_length;
+	u8 sense_info_length;
+	u8 dataIn;
+	u32 data_transfer_length;
+	u32 timeout_value;
+	void *data_buffer;
+	u32 sense_info_offset;
+	u8  cdb[16];
+};
+
+
+struct mvumi_pass_thru_direct_with_buff {
+	struct mvumi_pass_thru_direct sptd;
+	unsigned long filler;
+	u8  sense_buffer[SENSE_INFO_BUFFER_SIZE];
+};
+
+#define MVUMI_IOCTL_DEFAULT_FUN		0x00
+#define	MVUMI_IOCTL_GET_VIRTURL_ID	(MVUMI_IOCTL_DEFAULT_FUN + 1)
+#define	MVUMI_IOCTL_GET_HBA_COUNT	(MVUMI_IOCTL_DEFAULT_FUN + 2)
+#define	MVUMI_IOCTL_LOOKUP_DEV		(MVUMI_IOCTL_DEFAULT_FUN + 3)
+#define MVUMI_IOCTL_MAX			(MVUMI_IOCTL_DEFAULT_FUN + 4)
+
+#if 0
+#define MVUMI_IOCTL_API		_IOWR('M', 1, struct mvumi_pass_thru_direct_with_buff)
+#define	MVUMI_IOCTL_LOOKUP_DEV	_IOW('M', 2, struct scsi_idlun)
+#define	MVUMI_IOCTL_GET_INFO	_IOW('M', 3, struct mv_hba)
+#endif
+
+struct sas_mgmt_info {
+
+	u16 count;
+	struct mv_hba *mhba[MAX_MGMT_ADAPTERS];
+	int max_index;
+};
+
+
+/*
+ * the function type of the in bound frame
+ */
+#define CL_FUN_SCSI_CMD    0x1
+#define CL_FUN_BIOS_CMD    0x2
+#define CL_FUN_API_CMD    0x3
+
+#define MVUMI_IOCTL_DATA_OUT          0
+#define MVUMI_IOCTL_DATA_IN           1
+#define MVUMI_IOCTL_DATA_UNSPECIFIED  2
+
+struct mvumi_msg_frame
+{
+	u16 device_id;
+	u16 tag;
+
+	u8 cmd_flag;
+	u8 req_function;
+	u8 cdb_length;
+	u8 sg_counts;
+
+	u32 data_transfer_length;
+	u32 reserved_1;
+
+	u8 cdb[MAX_CDB_SIZE];
+
+	u32 payload[1];
+	//u32 reserved_2[119];
+
+};
+
+/*
+ * the respond flag for data_payload of the out bound frame
+ */
+#define CL_RSP_FLAG_NODATA    0x0
+#define CL_RSP_FLAG_SENSEDATA    0x1
+
+struct mvumi_rsp_frame
+{
+	u16 device_id;
+	u16 tag;
+
+
+	u8 req_status; 	/* driver shall translate it into OS specific */
+	u8 rsp_flag; /* Indicates the type of Data_Payload.*/
+	u8 reserved[2];
+	u32 payload[1];
+
+};
+
+/*
+ * State is the state of the MU
+ */
+#define FW_STATE_IDLE           0
+#define FW_STATE_STARTING       1
+#define FW_STATE_HANDSHAKING    2
+#define FW_STATE_STARTED        3
+#define FW_STATE_ABORT          4
+
+/*
+ * State is the work around status of the CL
+ */
+#if defined(LIST_WORK_AROUND)
+#define MU_WA_IB_LIST   1           /* work around for InBound List */
+#define MU_WA_OB_LIST   2           /* work around for OutBound List */
+#endif
+
+struct mv_ob_data_pool {
+	struct list_head 		queue_pointer;
+	u8 ob_data[CL_OUT_ENTRY_SIZE];
+} ;
+
+struct version_info {
+	u32 ver_major;
+	u32 ver_minor;
+	u32 ver_oem;
+	u32 ver_build;
+};
+
+
+struct mv_handshake_frame {
+	u16 size; /* size of myself, could be used for version control */
+
+	/* host information */
+	u8 host_type; 	/* BIOS, Windows, Linux, Endianess etc */
+	u8 reserved_1[1];
+	struct version_info host_ver; /* bios or driver version */
+
+	/* controller information */
+	u32 system_io_bus;
+	u32 slot_number;
+	u32 intr_level;
+	u32 intr_vector;
+
+	/* communication list configuration */
+	u32 ib_baseaddr_l;
+	u32 ib_baseaddr_h;
+	u32 ob_baseaddr_l;
+	u32 ob_baseaddr_h;
+
+	u8 ib_entry_size; /* refer to SPEC, 0=1DW, 1=2DW, 7=128DW */
+	u8 ob_entry_size;/* refer to SPEC, 0=1DW, 1=2DW, 7=128DW */
+	u8 ob_depth;
+	u8 ib_depth;
+
+	/* system date/time */
+	u64 seconds_since1970;
+};
+
+struct mv_handshake_header {
+	u8 page_code;
+	u8 checksum;
+	u16	frame_length;
+	u32	frame_content[1];
+};
+
+/*
+ * the page code type of the handshake header
+ */
+#define HS_PAGE_FIRM_CAP    0x1
+#define HS_PAGE_HOST_INFO   0x2
+#define HS_PAGE_FIRM_CTL    0x3
+#define HS_PAGE_CL_INFO     0x4
+#define HS_PAGE_TOTAL       0x5
+
+/* code for hs_capability */
+#define HS_CAPABILITY_CACHE_SUPPORTED		MV_BIT(0)
+#define HS_CAPABILITY_EVENT_NOTIFICATION	MV_BIT(1)
+#define HS_CAPABILITY_HOST_MEM_REQUIRED		MV_BIT(2)
+#define HS_CAPABILITY_LIST_WORKAROUND		MV_BIT(3)
+#define HS_CAPABILITY_SUPPORT_COMPACT_SG	MV_BIT(4)
+
+#define HSP_SIZE(i)					\
+		sizeof(struct mv_handshake_page##i)
+
+#define HSP_MAX_SIZE ({					\
+	int size, m1, m2;				\
+	m1 = max(HSP_SIZE(1), HSP_SIZE(3));		\
+	m2 = max(HSP_SIZE(2), HSP_SIZE(4));		\
+	size = max(m1, m2);				\
+	size;						\
+})
+
+/* The format of the page code for Firmware capability */
+struct mv_handshake_page1 {
+	u8 pagecode;
+	u8 checksum;
+	u16	frame_length;
+
+	u16	number_of_ports;
+	u16	max_devices_support;
+	u16	max_io_support;
+	u16	umi_ver;
+	u32	max_transfer_size;
+	struct version_info fw_ver;
+	u8	cl_in_max_entry_size;
+	u8	cl_out_max_entry_size;
+	u8	cl_inout_list_depth;
+	u8	total_pages;
+	u16	capability;
+	u16	reserved1;
+};
+
+
+/* The format of the page code for Host information */
+struct mv_handshake_page2 {
+	u8 pagecode;
+	u8 checksum;
+	u16	frame_length;
+
+	u8 host_type;
+	u8 reserved[3];
+	struct version_info	host_ver;
+	u32	system_io_bus;
+	u32	slot_number;
+	u32	intr_level;
+	u32	intr_vector;
+	u64	seconds_since1970;
+};
+
+/*
+ * define the OS type of the Host side
+ */
+#define MV_OS_TYPE_BIOS     1
+#define MV_OS_TYPE_WINDOWS  2
+#define MV_OS_TYPE_LINUX    3
+
+
+/* The format of the page code for firmware control  */
+struct mv_handshake_page3 {
+	u8 pagecode;
+	u8 checksum;
+	u16	frame_length;
+	u16	control;
+	u8 reserved[2];
+	u32	host_bufferaddr_l;
+	u32	host_bufferaddr_h;
+	u32	host_eventaddr_l;
+	u32	host_eventaddr_h;
+};
+
+
+struct mv_handshake_page4 {
+	u8 pagecode;
+	u8 checksum;
+	u16 frame_length;
+	u32	ib_baseaddr_l;
+	u32	ib_baseaddr_h;
+	u32	ob_baseaddr_l;
+	u32	ob_baseaddr_h;
+	u8 ib_entry_size;
+	u8 ob_entry_size;
+	u8 ob_depth;
+	u8 ib_depth;
+};
+
+#define HANDSHAKE_SIGNATURE     0x5A5A5A5AL
+#define HANDSHAKE_READYSTATE    0x55AA5AA5L
+#define HANDSHAKE_DONESTATE     0x55AAA55AL
+
+/* HandShake Status definition */
+#define HS_STATUS_OK        1       /* Indicates communication OK. */
+#define HS_STATUS_ERR       2       /* Indicates communication with error. */
+#define HS_STATUS_INVALID   3       /* Indicates received a invalid data. */
+
+/* HandShake State/Cmd definition */
+#define HS_S_ABORT              7
+#define HS_S_END                6   /* Indicates request with data in Msg1. */
+#define HS_S_SEND_PAGE          5   /* Notifies the other side to finish handshake procedure. */
+#define HS_S_QUERY_PAGE         4
+#define HS_S_PAGE_ADDR          3   /* Notifies the other side to finish handshake procedure. */
+#define HS_S_RESET              2   /* Notifies the other side to restart handshake procedure. */
+#define HS_S_START              1   /* Starts the handshake procedure. */
+#define HS_PAGE_VERIFY_SIZE     128
+
+#define HS_GET_STATE(a)         (a & 0xFFFF)
+#define HS_GET_STATUS(a)        ((a & 0xFFFF0000) >> 16)
+#define HS_SET_STATE(a, b)      (a |= (b & 0xFFFF))
+#define HS_SET_STATUS(a, b)     (a |= ((b & 0xFFFF) << 16))
+#define HS_SET_CHECKSUM(a, b)   mvumi_calculate_checksum(a, b)
+
+/****************************************
+ *         Perceived Severity
+ ****************************************/
+
+#define SEVERITY_UNKNOWN    0
+#define SEVERITY_OTHER      1
+#define SEVERITY_INFO       2
+#define SEVERITY_WARNING    3  /* used when its appropriate to let the
+				  user decide if action is needed */
+#define SEVERITY_MINOR      4  /* indicate action is needed, but the
+				  situation is not serious at this time */
+#define SEVERITY_MAJOR      5  /* indicate action is needed NOW */
+#define SEVERITY_CRITICAL   6  /* indicate action is needed NOW and the
+				  scope is broad */
+#define SEVERITY_FATAL      7  /* indicate an error occurred, but it's too
+				  late to take remedial action */
+
+#define DEVICE_OFFLINE	0
+#define DEVICE_ONLINE	1
+
+/* Module event type */
+enum mvumi_module_event {
+	EVENT_MODULE_ALL_STARTED = 0,
+	EVENT_DEVICE_CACHE_MODE_CHANGED,
+	EVENT_DEVICE_ARRIVAL,
+	EVENT_DEVICE_REMOVAL,
+	EVENT_LOG_GENERATED,
+};
+
+struct mvumi_hotplug_event
+{
+	u16	size;
+	u8	dummy[2];
+	u8	bitmap[0];
+};
+
+struct mvumi_notif_param {
+    void *p_param;
+    u16    hi;
+    u16    lo;
+
+    /* for event processing */
+    u32    event_id;
+    u16    dev_id;
+    u8     severity_lvl;
+    u8     param_count;
+};
+
+
+struct mvumi_driver_event {
+	u32 time_stamp;
+	u32 sequence_no; /* (contiguous in a single adapter) */
+	u32 event_id;    /* 1st 16 bits - Event class */
+                            /* last 16 bits - Event code of this particular
+			       Event class */
+	u8 severity;
+	u8 adapter_id;
+	u16 device_id;   /* Device ID relate to the event
+			       class (HD ID, LD ID etc) */
+	u32 params[MAX_EVENT_PARAMS]; /* Additional information if
+					     ABSOLUTELY necessary. */
+};
+
+// Event support sense code
+struct mvumi_driver_event_v2
+{
+    struct mvumi_driver_event  event_v1;                /* same as the current one */
+    u8        sense_data_length;      /* actual length of SenseData.  Driver set it to 0 if no SenseData */
+    u8        Reserved1;
+    u8        sense_data[30];        /* (24+6) just for making this structure on 64-bits boundary */
+};
+
+struct mvumi_event_req {
+	u8 count; /* [OUT] # of actual events returned */
+	u8 reserved[3];
+	struct mvumi_driver_event_v2  events[MAX_EVENTS_RETURNED];
+};
+
+struct mvumi_event_entry {
+	struct list_head queue_pointer;
+	struct mvumi_driver_event_v2 event;
+};
+
+struct mvumi_events_wq {
+	struct work_struct work_q;
+	struct mv_hba *mhba;
+	enum mvumi_module_event event;
+	void *param;
+};
+
+#define MVUMI_DEV_INDEX(id, lun)	(((u16)(id)) | (((u16)(lun)) << 8))
+#define DEV_ID_TO_TARGET_ID(_dev_id)	((u8)((_dev_id) & 0x00FF))
+#define DEV_ID_TO_LUN(_dev_id)		((u8) (((_dev_id) & 0xFF00) >> 8))
+
+static inline struct list_head *List_GetFirst(struct list_head *head)
+{
+    struct list_head * one = NULL;
+    if (list_empty(head))
+	return NULL;
+
+    one = head->next;
+    list_del(one);
+    return one;
+}
+
+static inline struct list_head *list_getlast(struct list_head *head)
+{
+    struct list_head * one = NULL;
+    if (list_empty(head))
+	return NULL;
+
+    one = head->prev;
+    list_del(one);
+    return one;
+}
+
+#define list_get_first_entry(head, type, member)	\
+	list_entry(List_GetFirst(head), type, member)
+
+#define list_get_last_entry(head, type, member)	\
+	list_entry(list_getlast(head), type, member)
+
+struct mv_hba;
+struct mvumi_instance_template {
+	void (*fire_cmd)(struct mv_hba *, struct mvumi_cmd *);
+	void (*enable_intr)(void *) ;
+	void (*disable_intr)(void *);
+	int (*clear_intr)(void *);
+	u32 (*read_fw_status_reg)(void *);
+};
+
+struct tag_stack {
+	u16 *stack;
+	u16 top;
+	u16 size;
+	u16 ptr_out;
+	u8 tag_stack_type;
+	u8 reserved[1];
+};
+
+
+#define MAX_HS_SIZE	(512 * 1024)
+struct mv_hba {
+	u32 *reply_queue;
+	dma_addr_t reply_queue_h;
+
+	void *base_addr[MAX_BASE_ADDRESS];	/* Internal register memory base address */
+	void *mmio;
+	s8 init_id;
+	u8 host_id;
+	dev_t dev_num;
+	struct cdev mv_cdev;
+
+	struct mvumi_cmd **cmd_list;
+	struct list_head cmd_pool;
+	spinlock_t cmd_pool_lock;
+	struct semaphore ioctl_sem;
+
+	struct Scsi_Host *shost;
+
+	wait_queue_head_t int_cmd_wait_q;
+	wait_queue_head_t abort_cmd_wait_q;
+	wait_queue_head_t handshake_wait_q;
+	struct completion handshake_cmpl;
+	struct pci_dev *pdev;
+	u32 unique_id;
+
+	atomic_t fw_outstanding;
+	u32 hw_crit_error;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 11)
+	atomic_t  hba_sync;
+#endif /* LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 11) */
+
+	struct mvumi_instance_template *instancet;
+#ifdef  SUPPORT_TASKLET
+	struct tasklet_struct isr_tasklet;
+#endif
+	u8 flag;
+	unsigned long last_time;
+
+	u8 adapter_number;
+
+	void *ib_list;
+	dma_addr_t ib_list_phys;
+
+	void *ob_list;
+	dma_addr_t ob_list_phys;
+
+	void *ib_shadow;
+	dma_addr_t ib_shadow_phys;
+
+	void *ob_shadow;
+	dma_addr_t ob_shadow_phys;
+
+	void *handshake_page_base;
+	dma_addr_t handshake_page_phys_base;
+	void *handshake_page;
+	dma_addr_t handshake_page_phys;
+
+	spinlock_t mv_isr_lock;
+	u32 global_isr;
+	u32 mv_isr_status;
+
+#if defined(DMA_WORK_AROUND)
+	void *dma_pool;
+	dma_addr_t dma_pool_phys;
+#endif
+#if LINUX_VERSION_CODE <=KERNEL_VERSION(2, 6, 9)
+	u32 pmstate[16];
+#endif
+	u32 ib_cur_count;
+
+#if defined(SUPPORT_INTERNAL_REQ)
+	u32 max_int_io;
+	struct mvumi_cmd **int_cmd_list;
+	struct list_head int_cmd_pool;
+	spinlock_t int_cmd_pool_lock;
+	struct dma_pool *int_frame_dma_pool;
+	struct dma_pool *int_sense_dma_pool;
+	void *int_req_buf;
+	dma_addr_t int_req_phys;
+	void *event_int_req_buf;
+	dma_addr_t event_int_req_phys;
+	u32	int_req_size;
+	spinlock_t event_list_lock;
+	void *event_pool_start;
+	void *event_pool_end;
+#endif
+
+	/* firmware capacity */
+	u16 max_num_sge;
+	u32 max_io;
+	u32 list_num_io;
+	u16	max_target_id;
+	u32 ib_max_entry_size_bytes;
+	u32 ob_max_entry_size_bytes;
+	u32 ib_max_entry_size_setting;
+	u32 ob_max_entry_size_setting;
+	u32 max_transfer_size;
+	u8 hba_total_pages;
+	u16	hba_capability;		/* see HS_CAPABILITY_XXX */
+
+
+	/* firmware setting */
+	u32 ib_cur_slot;
+	u32 ob_cur_slot;
+	u32 fw_state;
+
+
+	struct list_head ob_data_pool_list;
+	struct list_head free_ob_list;
+#if defined(LIST_WORK_AROUND)
+	u32	list_workaround_flag;
+#endif
+	struct list_head res_list;
+	struct timer_list hs_timer;
+
+	struct list_head waiting_req_list;	/* Waiting queue */
+	struct list_head complete_req_list;		/* Free queue */
+	spinlock_t  mv_timer_lock;
+
+	/* event */
+	struct list_head stored_events;
+	struct list_head free_events;
+	struct list_head events_pool;
+	u8 num_stored_events;
+	u16 num_pool_events;
+	u8 reserved_2[3];	/* make the structure 8 byte aligned */
+	/* struct work_struct work_q; */	/* polling all events */
+	struct mvumi_msg_queue msg_q;
+	unsigned short	chip_device_id;
+
+	struct tag_stack tag_pool;
+	u16 tag_num[MVUMI_MAX_REQUEST_NUMBER + MAX_INTERNAL_REQ];
+	struct mvumi_cmd *tag_cmd[MVUMI_MAX_REQUEST_NUMBER + MAX_INTERNAL_REQ];
+	struct mutex	sas_discovery_mutex;
+	spinlock_t mv_tag_lock;
+	spinlock_t mv_waiting_req_lock;
+};
+
+#define is_workround_dev(h)	\
+	(h->hba_capability & HS_CAPABILITY_LIST_WORKAROUND)
+#define IS_CHIP_8180(h)	((h->pdev->device == PCI_DEVICE_ID_MARVELL_MV8180)||\
+			(h->pdev->device == PCI_DEVICE_ID_MARVELL_MV8120) ||\
+			(h->pdev->device == PCI_DEVICE_ID_MARVELL_MV8110))
+#define _IS_CHIP_8180(h)	(h->pdev->device == PCI_DEVICE_ID_MARVELL_MV8180)
+#define IS_CHIP_VILI(h)	((h->pdev->device == PCI_DEVICE_ID_MARVELL_MV8120) ||(h->pdev->device == PCI_DEVICE_ID_MARVELL_MV8110))
+
+struct mvumi_direct {
+	unsigned short length;
+	unsigned char  scsi_status;
+	unsigned char  path_id;
+	unsigned char  target_id;
+	unsigned char  lun;
+	unsigned char  cdb_length;
+	unsigned char  sense_info_length;
+	unsigned char  datain;
+	unsigned long  data_transfer_length;
+	unsigned long  timeout_value;
+	void           *data_buffer;
+	unsigned long  sense_info_offset;
+	unsigned char  cdb[16];
+};
+
+struct mvumi_scsi_buffer{
+	struct mvumi_direct	sptd;
+	unsigned long		filler;
+	unsigned char		sense_buffer[SENSE_INFO_BUFFER_SIZE];
+};
+
+#ifdef MV_SIMLATION
+typedef struct _Link_Endpoint
+{
+	u16      DevID;
+	u8       DevType;         /* Refer to DEVICE_TYPE_xxx, (additional
+					type like EDGE_EXPANDER and
+					FANOUT_EXPANDER might be added). */
+	u8       PhyCnt;          /* Number of PHYs for this endpoint.
+					Greater than 1 if it is wide port. */
+	u8       PhyID[8];    /* Assuming wide port has
+						    max of 8 PHYs. */
+	u8       SAS_Address[8];  /* Filled with 0 if not SAS device. */
+	u8       Reserved1[8];
+} Link_Endpoint, * PLink_Endpoint;
+
+typedef struct _Link_Entity
+{
+	Link_Endpoint    Parent;
+	u8            Reserved[8];
+	Link_Endpoint    Self;
+} Link_Entity,  *PLink_Entity;
+
+
+typedef struct _HD_Info
+{
+	Link_Entity     Link;             /* Including self DevID & DevType */
+	u8           AdapterID;
+	u8           Status;           /* Refer to HD_STATUS_XXX */
+	u8           HDType;           /* HD_Type_xxx, replaced by new driver with ConnectionType & DeviceType */
+	u8           PIOMode;		  /* Max PIO mode */
+	u8           MDMAMode;		  /* Max MDMA mode */
+	u8           UDMAMode;		  /* Max UDMA mode */
+	u8           ConnectionType;	  /* DC_XXX, ConnectionType & DeviceType in new driver to replace HDType above */
+	u8           DeviceType;	      /* DT_XXX */
+
+	u32          FeatureSupport;   /* Support 1.5G, 3G, TCQ, NCQ, and
+					     etc, MV_BIT related */
+	u8           Model[40];
+	u8           SerialNo[20];
+	u8           FWVersion[8];
+	u64          Size;             /* unit: 1KB */
+	u8           WWN[8];          /* ATA/ATAPI-8 has such definitions
+					     for the identify Buffer */
+	u8           CurrentPIOMode;		/* Current PIO mode */
+	u8           CurrentMDMAMode;	/* Current MDMA mode */
+	u8           CurrentUDMAMode;	/* Current UDMA mode */
+	u8			Reserved3[5];
+//	u32			FeatureEnable;
+
+	u8           Reserved4[80];
+}HD_Info, *PHD_Info;
+
+#endif
+
+
+#endif				/*MV_RAID_UMI_H */
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/mvumi/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/scsi/mvumi/Kconfig
@@ -0,0 +1,8 @@
+config MVUMI_SAS
+        tristate "Marvell SAS RAID Module"
+        depends on PCI && SCSI
+        help
+        Module for Marvell RAID based on SAS controllers.
+        To compile this driver as a module, choose 'm' here.
+        Module will be called mvraid_sas
+
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/mvumi/Makefile
+++ linux-mvl-dove-2.6.32/drivers/scsi/mvumi/Makefile
@@ -0,0 +1,2 @@
+
+obj-$(CONFIG_MVUMI_SAS)         += mvumi.o
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/mvumi/mvumi.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/mvumi/mvumi.c
@@ -0,0 +1,3623 @@
+/*
+ *
+ *		Marvell Linux driver for SAS based RAID controllers
+ *
+ * Copyright (c) 2006-2008  MARVELL SEMICONDUCTOR, LTD.
+ *
+ *	   This program is free software; you can redistribute it and/or
+ *	   modify it under the terms of the GNU General Public License
+ *	   as published by the Free Software Foundation; either version
+ *	   2 of the License, or (at your option) any later version.
+ *
+ * FILE		: mvumi.c
+ * Version	: 01.00.00.01-rc1
+ *
+ * Authors:
+ *
+ * List of supported controllers
+ *
+ * OEM	Product Name			VID	DID	SSVID	SSID
+ * ---	------------			---	---	----	----
+ */
+#ifndef LINUX_VERSION_CODE
+#	include <linux/version.h>
+#endif
+
+#ifndef AUTOCONF_INCLUDED
+#	include <linux/config.h>
+#endif /* AUTOCONF_INCLUDED */
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/list.h>
+#include <linux/moduleparam.h>
+#include <linux/module.h>
+#include <linux/spinlock.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <linux/uio.h>
+#include <linux/fs.h>
+#include <linux/compat.h>
+#include <linux/blkdev.h>
+#include <linux/mutex.h>
+#include <linux/cdev.h>
+#include <linux/nmi.h>
+#include <linux/vmalloc.h>
+
+#include <asm/uaccess.h>
+#include <asm/io.h>
+#include <asm/div64.h>
+
+#include <scsi/scsi.h>
+#include <scsi/scsi_cmnd.h>
+#include <scsi/scsi_device.h>
+#include <scsi/scsi_host.h>
+#include <scsi/scsi_transport.h>
+#include <scsi/scsi_ioctl.h>
+
+#include <linux/idr.h>
+#include "mvumi.h"
+
+MODULE_LICENSE("GPL");
+MODULE_VERSION(MVUMI_VERSION);
+MODULE_AUTHOR("linux@marvell.com");
+MODULE_DESCRIPTION("Marvell RAID On Controller SAS Driver");
+
+#define _MVUMI_DUMP 0
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 25)
+#define mv_use_sg(cmd)	cmd->use_sg
+#define mv_rq_bf(cmd)	cmd->request_buffer
+#define mv_rq_bf_l(cmd)	cmd->request_bufflen
+#else
+#define mv_use_sg(cmd)	scsi_sg_count(cmd)
+#define mv_rq_bf(cmd)	scsi_sglist(cmd)
+#define mv_rq_bf_l(cmd)	scsi_bufflen(cmd)
+#endif
+
+static DEFINE_MUTEX(sysfs_lock);
+/*
+ * PCI ID table for all supported controllers
+ */
+static struct pci_device_id mvumi_pci_table[] = {
+	/* Flash Controller */
+	{PCI_DEVICE(PCI_VENDOR_ID_MARVELL, PCI_DEVICE_ID_MARVELL_MV8120)},
+	{PCI_DEVICE(PCI_VENDOR_ID_MARVELL, PCI_DEVICE_ID_MARVELL_MV8110)},
+	{0}
+};
+
+MODULE_DEVICE_TABLE(pci, mvumi_pci_table);
+
+
+static struct sas_mgmt_info mvumi_mgmt_info;
+
+
+static u32 mvumi_dbg_lvl=1;
+/* ----------------------------------------------------------------- */
+/* ----------------------------------------------------------------- */
+/* ----------------------------------------------------------------- */
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 11)
+/* will wait for atomic value atomic to become zero until timed out */
+/* return how much 'timeout' is left or 0 if already timed out */
+int mvumi_wait_for_atomic_timeout(atomic_t * atomic, unsigned long timeout)
+{
+	unsigned intv = HZ / 20;
+
+	while (timeout) {
+		if (0 == atomic_read(atomic))
+			break;
+
+		if (timeout < intv)
+			intv = timeout;
+		set_current_state(TASK_INTERRUPTIBLE);
+		timeout -= (intv - schedule_timeout(intv));
+	}
+	return timeout;
+}
+#endif /* LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 11) */
+#ifdef MV_DEBUG
+static const char *mvumi_dump_sense_key(u8 sense)
+{
+	switch (sense) {
+	case SCSI_SK_NO_SENSE:
+		return "SCSI_SK_NO_SENSE";
+	case SCSI_SK_RECOVERED_ERROR:
+		return "SCSI_SK_RECOVERED_ERROR";
+	case SCSI_SK_NOT_READY:
+		return "SCSI_SK_NOT_READY";
+	case SCSI_SK_MEDIUM_ERROR:
+		return "SCSI_SK_MEDIUM_ERROR";
+	case SCSI_SK_HARDWARE_ERROR:
+		return "SCSI_SK_HARDWARE_ERROR";
+	case SCSI_SK_ILLEGAL_REQUEST:
+		return "SCSI_SK_ILLEGAL_REQUEST";
+	case SCSI_SK_UNIT_ATTENTION:
+		return "SCSI_SK_UNIT_ATTENTION";
+	case SCSI_SK_DATA_PROTECT:
+		return "SCSI_SK_DATA_PROTECT";
+	case SCSI_SK_BLANK_CHECK:
+		return "SCSI_SK_BLANK_CHECK";
+	case SCSI_SK_VENDOR_SPECIFIC:
+		return "SCSI_SK_VENDOR_SPECIFIC";
+	case SCSI_SK_COPY_ABORTED:
+		return "SCSI_SK_COPY_ABORTED";
+	case SCSI_SK_ABORTED_COMMAND:
+		return "SCSI_SK_ABORTED_COMMAND";
+	case SCSI_SK_VOLUME_OVERFLOW:
+		return "SCSI_SK_VOLUME_OVERFLOW";
+	case SCSI_SK_MISCOMPARE:
+		return "SCSI_SK_MISCOMPARE";
+	default:
+		mv_printk( "Unknown sense key 0x%x.\n", sense);
+		return "Unknown sense key";
+	}
+}
+
+static void mvumi_dump_cmd_info(struct mvumi_msg_frame *frame, u8 detail)
+{
+	u8 i;
+	struct mv_sgl *m_sg = (struct mv_sgl *)&frame->payload[0];
+
+	mv_printk("Device %d,Cdb[%2x,%2x,%2x,%2x, %2x,%2x,%2x,%2x,%2x,%2x,%2x,"
+		  "%2x,%2x,%2x,%2x,%2x].\n", frame->device_id,
+		  frame->cdb[0], frame->cdb[1], frame->cdb[2], frame->cdb[3],
+		  frame->cdb[4], frame->cdb[5], frame->cdb[6], frame->cdb[7],
+		  frame->cdb[8], frame->cdb[9], frame->cdb[10], frame->cdb[11],
+		  frame->cdb[12], frame->cdb[13], frame->cdb[14],
+		  frame->cdb[15]);
+
+		mv_printk("tag=0x%x, flag=0x%x, fun=0x%x, cdb_len=0x%x,"
+			"sg_cnts=0x%x, transfer_len=0x%x.\n",
+			frame->tag,
+			frame->cmd_flag, frame->req_function,
+			frame->cdb_length, frame->sg_counts,
+			frame->data_transfer_length);
+
+	if (detail) {
+		for (i = 0; i < frame->sg_counts; i++) {
+			mv_printk("sg[%d][0x%p] baseh[0x%x],basel[0x%x],"
+				"size[0x%x],flag[0x%x].\n\n",
+				i, m_sg, m_sg->baseaddr_h, m_sg->baseaddr_l,
+				m_sg->size, m_sg->flags);
+			sgd_inc(m_sg);
+		}
+	}
+}
+
+static void mvumi_dump_ob_info(struct mvumi_rsp_frame *frame)
+{
+	mv_printk("Device %d:ob frame tag=0x%x,flag=0x%x, status=0x%x.\n",
+		  frame->device_id, frame->tag,
+		  frame->rsp_flag, frame->req_status);
+}
+#endif
+
+/* if tag_stack_type!=FIFO_TAG, use FILO,
+*  if tag_stack_type==FIFO_TAG, use FIFO, ptr_out is the next
+*  tag to get and top is the number of available tags in the
+*  stack when use FIFO, get tag from ptr_out and free tag to
+* (ptr_out+top)%size
+*/
+
+#define FILO_TAG 0x00
+#define FIFO_TAG 0x01
+
+static void tag_init(struct tag_stack *st, u16 size)
+{
+	u16 i;
+	MV_ASSERT(size == st->size);
+	st->top = size;
+	st->tag_stack_type = FILO_TAG;
+	st->ptr_out = 0;
+	for (i = 0; i < size; i++) {
+		st->stack[i] = size - 1 - i;
+	}
+}
+
+static u16 tag_get_one(struct mv_hba *mhba, struct tag_stack *st)
+{
+	u16 n_tag, tag;
+	unsigned long flags;
+	spin_lock_irqsave(&mhba->mv_tag_lock, flags);
+	MV_ASSERT(st->top > 0);
+	if (st->tag_stack_type == FIFO_TAG) {
+		n_tag = st->stack[st->ptr_out++];
+		if (st->ptr_out >= st->size)
+			st->ptr_out = 0;
+		st->top--;
+		tag = n_tag;
+	} else
+		tag = st->stack[--st->top];
+	spin_unlock_irqrestore(&mhba->mv_tag_lock, flags);
+	return tag;
+}
+
+static void tag_release_one(struct mv_hba *mhba, struct tag_stack *st, u16 tag)
+{
+	unsigned long flags;
+	spin_lock_irqsave(&mhba->mv_tag_lock, flags);
+	MV_ASSERT(st->top < st->size);
+	if (st->tag_stack_type == FIFO_TAG) {
+		st->stack[(st->ptr_out + st->top) % st->size] = tag;
+		st->top++;
+	} else
+		st->stack[st->top++] = tag;
+	spin_unlock_irqrestore(&mhba->mv_tag_lock, flags);
+}
+
+static u8 tag_is_empty(struct tag_stack *st)
+{
+	if (st->top == 0) {
+		return 1;
+	}
+	return 0;
+}
+
+#if 0
+static void *mvumi_sgd_kmap(struct scatterlist *ksg, struct mvumi_cmd *cmd)
+{
+	void *kvaddr = NULL;
+	MV_ASSERT(cmd->scmd);	/* must OS command */
+	//kvaddr = page_address(ksg->page);
+	//if (!kvaddr)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24)
+	kvaddr = kmap_atomic(ksg->page, KM_IRQ0);
+#else
+	kvaddr = kmap_atomic(sg_page(ksg), KM_IRQ0);
+#endif
+	kvaddr += ksg->offset;
+	return kvaddr;
+}
+
+static void
+mvumi_sgd_kunmap(struct scatterlist *ksg,
+		 struct mvumi_cmd *cmd, void *mapped_addr)
+{
+	//void *kvaddr = NULL;
+	MV_ASSERT(cmd->scmd);	/* must OS command */
+	//kvaddr = page_address(ksg->page);
+	//if (!kvaddr)
+	kunmap_atomic(mapped_addr - ksg->offset, KM_IRQ0);
+}
+#endif
+
+static int mvumi_map_pci_addr(struct pci_dev *dev, void **addr_array)
+{
+	int i;
+	unsigned long addr;
+	unsigned long range;
+
+	for (i = 0; i < MAX_BASE_ADDRESS; i++) {
+		addr = pci_resource_start(dev, i);
+		range = pci_resource_len(dev, i);
+
+		if (pci_resource_flags(dev, i) & IORESOURCE_MEM) {
+			addr_array[i] = (void *)ioremap_nocache(addr, range);
+			if (!addr_array[i]) {
+				mv_printk(" Failed to map IO mem\n");
+				return -1;
+			}
+		} else {
+			addr_array[i] = (void *)addr;
+		}
+		mv_printk("BAR %d : %p.\n", i, addr_array[i]);
+	}
+	return 0;
+}
+
+static void mvumi_unmap_pci_addr(struct pci_dev *dev, void **addr_array)
+{
+	int i;
+
+	for (i = 0; i < MAX_BASE_ADDRESS; i++)
+		if (pci_resource_flags(dev, i) & IORESOURCE_MEM)
+			iounmap(addr_array[i]);
+}
+
+static struct mvumi_res_mgnt *mvumi_alloc_mem_resource(struct mv_hba *mhba,
+						       enum resource_type type,
+						       u32 size)
+{
+	struct mvumi_res_mgnt *res_mgnt =
+			vmalloc(sizeof(struct mvumi_res_mgnt));
+	if (NULL == res_mgnt) {
+		mv_printk(" Failed to allocate memory for mod_res.\n");
+		return NULL;
+	}
+	memset(res_mgnt, 0, sizeof(sizeof(struct mvumi_res_mgnt)));
+
+	switch (type) {
+	case RESOURCE_CACHED_MEMORY:
+		res_mgnt->virt_addr = vmalloc(size);
+		if (NULL == res_mgnt->virt_addr) {
+			mv_printk("unable to alloc 0x%x mem.\n", size);
+			vfree(res_mgnt);
+			return NULL;
+		}
+		break;
+
+	case RESOURCE_UNCACHED_MEMORY:
+		size = ROUNDING(size, 8);
+		res_mgnt->virt_addr = (void *)pci_alloc_consistent(mhba->pdev,
+								   size,
+								   &res_mgnt->
+								   bus_addr);
+		if (NULL == res_mgnt->virt_addr) {
+			mv_printk("unable to alloc 0x%x consistent mem.\n",
+				  size);
+			vfree(res_mgnt);
+			return NULL;
+		}
+		break;
+
+	default:
+		mv_printk("res type %d unknown.\n", type);
+		vfree(res_mgnt);
+		return NULL;
+	}
+
+	memset(res_mgnt->virt_addr, 0, size);
+	res_mgnt->type = type;
+	res_mgnt->size = size;
+	list_add_tail(&res_mgnt->res_entry, &mhba->res_list);
+
+	return res_mgnt;
+}
+
+static void mvumi_release_mem_resource(struct mv_hba *mhba)
+{
+	struct mvumi_res_mgnt *res_mgnt, *tmp;
+
+	list_for_each_entry_safe(res_mgnt, tmp, &mhba->res_list, res_entry) {
+		switch (res_mgnt->type) {
+		case RESOURCE_UNCACHED_MEMORY:
+			pci_free_consistent(mhba->pdev,
+					    res_mgnt->size,
+					    res_mgnt->virt_addr,
+					    res_mgnt->bus_addr);
+			break;
+		case RESOURCE_CACHED_MEMORY:
+			vfree(res_mgnt->virt_addr);
+			break;
+		default:
+			mv_printk("res type %d unknown.\n", res_mgnt->type);
+			break;
+		}
+		list_del(&res_mgnt->res_entry);
+		vfree(res_mgnt);
+	}
+	mhba->flag &= ~MVUMI_FW_ALLOC;
+}
+
+/**
+ * mvumi_make_sgl -	Prepares  SGL
+ * @lhba:		Adapter soft state
+ * @scmd:		SCSI command from the mid-layer
+ * @m_sg:		SGL to be filled in
+ *
+ * If successful, this function returns the number of SG elements. Otherwise,
+ * it returnes -1.
+ */
+static int
+mvumi_make_sgl(struct mv_hba *mhba, struct scsi_cmnd *scmd, void *sgl_p)
+{
+	struct scatterlist *sg;
+	struct mv_sgl *m_sg;
+	int sg_count = 0;
+	unsigned int len;
+	dma_addr_t busaddr = 0;
+	int i;
+
+	if (mv_rq_bf_l(scmd) > (mv_scmd_host(scmd)->max_sectors << 9))
+		mv_printk( " request length exceeds "
+		       "the maximum alowed value.\n");
+
+	if (0 == mv_rq_bf_l(scmd))
+		return 0;
+
+	m_sg = (struct mv_sgl *)sgl_p;
+	if (mv_use_sg(scmd)) {
+		sg = (struct scatterlist *)mv_rq_bf(scmd);
+		sg_count = pci_map_sg(mhba->pdev,
+				      sg,
+				      mv_use_sg(scmd),
+				      scsi_to_pci_dma_dir(scmd->
+							  sc_data_direction));
+
+		if (sg_count != mv_use_sg(scmd)) {
+			mv_printk(" sg_count(%d) != scmd->use_sg(%d)\n",
+			       (unsigned int)sg_count, mv_use_sg(scmd));
+		}
+		for (i = 0; i < sg_count; i++) {
+			busaddr = sg_dma_address(&sg[i]);
+			len = sg_dma_len(&sg[i]);
+			m_sg->baseaddr_l = cpu_to_le32((u32) busaddr);
+			m_sg->baseaddr_h =
+			    cpu_to_le32((u32) ((busaddr >> 16) >> 16));
+			m_sg->flags = 0;
+#if defined(USE_NEW_SGTABLE)
+			if ((i + 1) == sg_count)
+				m_sg->flags |= SGD_EOT;
+			if (mhba->hba_capability & HS_CAPABILITY_SUPPORT_COMPACT_SG)
+				m_sg->flags |= SGD_COMPACT;
+			sgd_setsz(m_sg, cpu_to_le32(len));
+#else
+			m_sg->size = cpu_to_le32(len);
+#endif
+			sgd_inc(m_sg);
+		}
+	} else {
+		mv_printk( " map kernel addr into bus addr.\n");
+		scmd->SCp.dma_handle = mv_rq_bf_l(scmd) ?
+		    pci_map_single(mhba->pdev, mv_rq_bf(scmd),
+				   mv_rq_bf_l(scmd),
+				   scsi_to_pci_dma_dir(scmd->sc_data_direction))
+		    : 0;
+		busaddr = scmd->SCp.dma_handle;
+		m_sg->baseaddr_l = cpu_to_le32((u32) busaddr);
+		m_sg->baseaddr_h = cpu_to_le32((u32) ((busaddr >> 16) >> 16));
+		m_sg->flags = 0;
+#if defined(USE_NEW_SGTABLE)
+		m_sg->flags |= SGD_EOT;
+		if (mhba->hba_capability & HS_CAPABILITY_SUPPORT_COMPACT_SG)
+			m_sg->flags |= SGD_COMPACT;
+		sgd_setsz(m_sg, cpu_to_le32(mv_rq_bf_l(scmd)));
+#else
+		m_sg->size = cpu_to_le32(mv_rq_bf_l(scmd));
+#endif
+		sg_count=1;
+	}
+	return sg_count;
+}
+
+u8 mvumi_add_timer(struct timer_list * timer,
+		   u32 sec,
+		   void (*function) (unsigned long), unsigned long data)
+{
+	u64 jif;
+
+	WARN_ON(timer_pending(timer));
+	init_timer(timer);
+	timer->function = function;
+	timer->data = data;
+
+	jif = (u64) (sec * HZ);
+	//do_div(jif, 1000);         /* wait in unit of second */
+	timer->expires = jiffies + 1 + jif;
+
+	add_timer(timer);
+	return 0;
+}
+
+void mvumi_del_timer(struct timer_list *timer)
+{
+	if (timer->function)
+		del_timer(timer);
+	timer->function = NULL;
+}
+
+u64 mvumi_get_time_in_sec(void)
+{
+	struct timeval tv;
+
+	do_gettimeofday(&tv);
+	return (u64) tv.tv_sec;
+}
+
+u32 mvumi_get_msec_of_time(void)
+{
+	struct timeval tv;
+
+	do_gettimeofday(&tv);
+	return (u32) tv.tv_usec * 1000 * 1000;
+}
+
+//reset nmi watchdog before delay
+static void mvumi_touch_nmi_watchdog(void)
+{
+#ifdef CONFIG_X86_64
+	touch_nmi_watchdog();
+#endif /* CONFIG_X86_64 */
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 10)
+	touch_softlockup_watchdog();
+#endif /* LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 10) */
+}
+
+void mvumi_sleep_millisecond(void *ext, u32 msec)
+{
+	u32 tmp = 0;
+	u32 mod_msec = 2000;
+	mvumi_touch_nmi_watchdog();
+	if (msec <= mod_msec)
+		mdelay(msec);
+
+	else {
+		for (tmp = 0; tmp < msec / mod_msec; tmp++) {
+			mdelay(mod_msec);
+			mvumi_touch_nmi_watchdog();
+		}
+		if (msec % mod_msec)
+			mdelay(msec % mod_msec);
+	}
+	mvumi_touch_nmi_watchdog();
+
+}
+
+/* ----------------------------------------------------------------- */
+/* ----------------------------------------------------------------- */
+/* ----------------------------------------------------------------- */
+
+#if defined(SUPPORT_INTERNAL_REQ)
+/**
+ * mvumi_get_int_cmd -	Get a command from the free pool
+ * @lhba:		Adapter soft state
+ *
+ * Returns a free command from the pool
+ */
+static struct mvumi_cmd *mvumi_get_int_cmd(struct mv_hba *mhba, int in_irq)
+{
+	unsigned long flags;
+	struct mvumi_cmd *cmd = NULL;
+
+	spin_lock_irqsave(&mhba->int_cmd_pool_lock, flags);
+
+	if (!list_empty(&mhba->int_cmd_pool)) {
+		struct mv_sgl *m_sg;
+		cmd = list_entry((&mhba->int_cmd_pool)->next,
+				 struct mvumi_cmd, queue_pointer);
+		list_del_init(&cmd->queue_pointer);
+		m_sg = (struct mv_sgl *)&cmd->frame->payload[0];
+		if (!in_irq) {
+			cmd->data_buf = mhba->int_req_buf;
+			m_sg->baseaddr_l = cpu_to_le32(mhba->int_req_phys);
+			m_sg->baseaddr_h = cpu_to_le32(
+					(mhba->int_req_phys >> 16) >> 16);
+		} else {
+			cmd->data_buf = mhba->event_int_req_buf;
+			m_sg->baseaddr_l = cpu_to_le32(
+					mhba->event_int_req_phys);
+			m_sg->baseaddr_h = cpu_to_le32(
+					(mhba->event_int_req_phys >> 16) >> 16);
+		}
+	} else
+		mv_printk(" Int command pool empty!\n");
+
+	spin_unlock_irqrestore(&mhba->int_cmd_pool_lock, flags);
+	return cmd;
+}
+
+/**
+ * mvumi_return_cmd -	Return a cmd to free command pool
+ * @lhba:		Adapter soft state
+ * @cmd:		Command packet to be returned to free command pool
+ */
+static inline void
+mvumi_return_int_cmd(struct mv_hba *mhba, struct mvumi_cmd *cmd)
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&mhba->int_cmd_pool_lock, flags);
+
+	cmd->scmd = NULL;
+	list_add_tail(&cmd->queue_pointer, &mhba->int_cmd_pool);
+
+	spin_unlock_irqrestore(&mhba->int_cmd_pool_lock, flags);
+}
+
+/**
+ * mvumi_teardown_frame_pool -	Destroy the cmd frame DMA pool
+ * @lhba:				Adapter soft state
+ */
+static void mvumi_teardown_int_frame_pool(struct mv_hba *mhba)
+{
+	int i;
+	struct mvumi_cmd *cmd;
+	/*
+	 * Return all frames to pool
+	 */
+	for (i = 0; i < mhba->max_int_io; i++) {
+		cmd = mhba->int_cmd_list[i];
+		if (cmd->frame)
+			kfree(cmd->frame);
+	}
+}
+
+/**
+ * mvumi_create_int_frame_pool -	Creates DMA pool for cmd frames
+ * @lhba:			Adapter soft state
+ *
+ * Each command packet has an embedded DMA memory buffer that is used for
+ * filling FW frame and the SG list that immediately follows the frame. This
+ * function creates those DMA memory buffers for each command packet by using
+ * PCI pool facility.
+ */
+static int mvumi_create_int_frame_pool(struct mv_hba *mhba)
+{
+	int i;
+	void *int_req_buf;
+	dma_addr_t int_req_phys;
+	struct mvumi_cmd *cmd;
+	struct mv_sgl *m_sg;
+
+	int_req_buf = mhba->int_req_buf;
+	int_req_phys = mhba->int_req_phys;
+
+	/*
+	 * Allocate and attach a frame to each of the commands in cmd_list.
+	 * By making cmd->index as the context instead of the &cmd, we can
+	 * always use 32bit context regardless of the architecture
+	 */
+	for (i = 0; i < mhba->max_int_io; i++) {
+
+		cmd = mhba->int_cmd_list[i];
+		cmd->frame = kmalloc(mhba->ib_max_entry_size_bytes,
+					GFP_KERNEL);
+		/*
+		 * mvumi_teardown_frame_pool() takes care of freeing
+		 * whatever has been allocated
+		 */
+		if (!cmd->frame) {
+			mv_printk(" pci_pool_alloc failed \n");
+			mvumi_teardown_int_frame_pool(mhba);
+			return -ENOMEM;
+		}
+		memset(cmd->frame, 0, mhba->ib_max_entry_size_bytes);
+		m_sg = (struct mv_sgl *)&cmd->frame->payload[0];
+		cmd->frame->sg_counts = 1;
+		cmd->data_buf = int_req_buf;
+		m_sg->baseaddr_l = cpu_to_le32(int_req_phys);
+		m_sg->baseaddr_h = cpu_to_le32((int_req_phys >> 16) >> 16);
+		m_sg->flags = 0;
+#if defined(USE_NEW_SGTABLE)
+		m_sg->flags |= SGD_EOT;
+		if (mhba->hba_capability & HS_CAPABILITY_SUPPORT_COMPACT_SG)
+			m_sg->flags |= SGD_COMPACT;
+		sgd_setsz(m_sg, cpu_to_le32(mhba->int_req_size));
+#else
+		m_sg->size = cpu_to_le32(mhba->int_req_size);
+#endif
+	}
+	return 0;
+}
+
+/**
+ * mvumi_free_cmds -	Free all the cmds in the free cmd pool
+ * @lhba:		Adapter soft state
+ */
+static void mvumi_free_int_cmds(struct mv_hba *mhba)
+{
+	int i;
+	/* First free the inter frame pool */
+	mvumi_teardown_int_frame_pool(mhba);
+
+	/* Free all the commands in the cmd_list */
+	for (i = 0; i < mhba->max_int_io; i++)
+		kfree(mhba->int_cmd_list[i]);
+
+	/* Free the int cmd_list buffer itself */
+	kfree(mhba->int_cmd_list);
+	mhba->int_cmd_list = NULL;
+
+}
+
+/**
+ * mvumi_alloc_int_cmds -	Allocates the command packets
+ * @lhba:		Adapter soft state
+ *
+ * Each command that is issued to the FW, whether IO commands from the OS or
+ * internal commands like IOCTLs, are wrapped in local data structure called
+ * mvumi_cmd. The frame embedded in this mvumi_cmd is actually issued to
+ * the FW.
+ *
+ * Each frame has a 32-bit field called context (tag). This context is used
+ * to get back the mvumi_cmd from the frame when a frame gets completed in
+ * the ISR. Typically the address of the mvumi_cmd itself would be used as
+ * the context. But we wanted to keep the differences between 32 and 64 bit
+ * systems to the mininum. We always use 32 bit integers for the context. In
+ * this driver, the 32 bit values are the indices into an array cmd_list.
+ * This array is used only to look up the mvumi_cmd given the context. The
+ * free commands themselves are maintained in a linked list called cmd_pool.
+ */
+static int mvumi_alloc_int_cmds(struct mv_hba *mhba)
+{
+	int i;
+	int j;
+	u32 max_cmd;
+	struct mvumi_cmd *cmd;
+	max_cmd = mhba->max_int_io;
+
+	/*
+	 * lhba->cmd_list is an array of struct mvumi_cmd pointers.
+	 * Allocate the dynamic array first and then allocate individual
+	 * commands.
+	 */
+	mhba->int_cmd_list =
+	    kcalloc(max_cmd, sizeof(struct mvumi_cmd *), GFP_KERNEL);
+
+	if (!mhba->int_cmd_list) {
+		mv_printk(" out of memory for inter cmd\n");
+		return -ENOMEM;
+	}
+
+	for (i = 0; i < max_cmd; i++) {
+		mhba->int_cmd_list[i] = kmalloc(sizeof(struct mvumi_cmd),
+						GFP_KERNEL);
+
+		if (!mhba->int_cmd_list[i]) {
+
+			for (j = 0; j < i; j++)
+				kfree(mhba->int_cmd_list[j]);
+
+			kfree(mhba->int_cmd_list);
+			mhba->int_cmd_list = NULL;
+
+			return -ENOMEM;
+		}
+	}
+
+	/*
+	 * Add all the commands to command pool (lhba->cmd_pool)
+	 */
+	for (i = 0; i < max_cmd; i++) {
+		cmd = mhba->int_cmd_list[i];
+		memset(cmd, 0, sizeof(struct mvumi_cmd));
+		cmd->index = i;
+		cmd->mhba = mhba;
+
+		list_add_tail(&cmd->queue_pointer, &mhba->int_cmd_pool);
+	}
+
+	/*
+	 * Create a frame pool and assign one frame to each cmd
+	 */
+	if (mvumi_create_int_frame_pool(mhba)) {
+		mv_printk(" Error creating frame DMA pool\n");
+		mvumi_free_int_cmds(mhba);
+		return -ENOMEM;
+	}
+
+	return 0;
+}
+
+#endif /* #if defined(SUPPORT_INTERNAL_REQ) */
+
+/**
+ * mvumi_get_cmd -	Get a command from the free pool
+ * @lhba:		Adapter soft state
+ *
+ * Returns a free command from the pool
+ */
+static struct mvumi_cmd *mvumi_get_cmd(struct mv_hba *mhba)
+{
+	unsigned long flags;
+	struct mvumi_cmd *cmd = NULL;
+
+	spin_lock_irqsave(&mhba->cmd_pool_lock, flags);
+
+	if (!list_empty(&mhba->cmd_pool)) {
+		cmd = list_entry((&mhba->cmd_pool)->next,
+				 struct mvumi_cmd, queue_pointer);
+		list_del_init(&cmd->queue_pointer);
+	} else
+		mv_printk(KERN_ERR " Command pool empty!\n");
+
+	spin_unlock_irqrestore(&mhba->cmd_pool_lock, flags);
+	return cmd;
+}
+
+/**
+ * mvumi_return_cmd -	Return a cmd to free command pool
+ * @lhba:		Adapter soft state
+ * @cmd:		Command packet to be returned to free command pool
+ */
+static inline void mvumi_return_cmd(struct mv_hba *mhba, struct mvumi_cmd *cmd)
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&mhba->cmd_pool_lock, flags);
+
+	cmd->scmd = NULL;
+	list_add_tail(&cmd->queue_pointer, &mhba->cmd_pool);
+	//list_add(&cmd->queue_pointer, &mhba->cmd_pool);
+	spin_unlock_irqrestore(&mhba->cmd_pool_lock, flags);
+}
+
+/**
+ * mvumi_teardown_frame_pool -	Destroy the cmd frame DMA pool
+ * @lhba:				Adapter soft state
+ */
+static void mvumi_teardown_frame_pool(struct mv_hba *mhba)
+{
+	int i;
+	struct mvumi_cmd *cmd;
+	/*
+	 * Return all frames to pool
+	 */
+	for (i = 0; i < mhba->max_io; i++) {
+
+		cmd = mhba->cmd_list[i];
+		if (cmd->frame)
+			kfree(cmd->frame);
+
+	}
+}
+
+/**
+ * mvumi_create_frame_pool -	Creates DMA pool for cmd frames
+ * @lhba:			Adapter soft state
+ *
+ * Each command packet has an embedded DMA memory buffer that is used for
+ * filling FW frame and the SG list that immediately follows the frame. This
+ * function creates those DMA memory buffers for each command packet by using
+ * PCI pool facility.
+ */
+static int mvumi_create_frame_pool(struct mv_hba *mhba)
+{
+	int i;
+	struct mvumi_cmd *cmd;
+	/*
+	 * Allocate and attach a frame to each of the commands in cmd_list.
+	 * By making cmd->index as the context instead of the &cmd, we can
+	 * always use 32bit context regardless of the architecture
+	 */
+	for (i = 0; i < mhba->max_io; i++) {
+		cmd = mhba->cmd_list[i];
+		cmd->index = i;
+		cmd->frame = kmalloc(mhba->ib_max_entry_size_bytes,
+					GFP_KERNEL);
+		/*
+		 * mvumi_teardown_frame_pool() takes care of freeing
+		 * whatever has been allocated
+		 */
+		if (!cmd->frame) {
+			mv_printk("failed alloc cmd[0x%x] frame.\n.", i);
+			mvumi_teardown_frame_pool(mhba);
+			return -ENOMEM;
+		}
+		memset(cmd->frame, 0, mhba->ib_max_entry_size_bytes);
+	}
+
+	return 0;
+}
+
+/**
+ * mvumi_free_cmds -	Free all the cmds in the free cmd pool
+ * @lhba:		Adapter soft state
+ */
+static void mvumi_free_cmds(struct mv_hba *mhba)
+{
+	int i;
+	/* First free the FW frame pool */
+	mvumi_teardown_frame_pool(mhba);
+
+	/* Free all the commands in the cmd_list */
+	for (i = 0; i < mhba->max_io; i++)
+		kfree(mhba->cmd_list[i]);
+
+	/* Free the cmd_list buffer itself */
+	kfree(mhba->cmd_list);
+	mhba->cmd_list = NULL;
+
+	INIT_LIST_HEAD(&mhba->cmd_pool);
+}
+
+/**
+ * mvumi_alloc_cmds -	Allocates the command packets
+ * @lhba:		Adapter soft state
+ *
+ * Each command that is issued to the FW, whether IO commands from the OS or
+ * internal commands like IOCTLs, are wrapped in local data structure called
+ * mvumi_cmd. The frame embedded in this mvumi_cmd is actually issued to
+ * the FW.
+ *
+ * Each frame has a 32-bit field called context (tag). This context is used
+ * to get back the mvumi_cmd from the frame when a frame gets completed in
+ * the ISR. Typically the address of the mvumi_cmd itself would be used as
+ * the context. But we wanted to keep the differences between 32 and 64 bit
+ * systems to the mininum. We always use 32 bit integers for the context. In
+ * this driver, the 32 bit values are the indices into an array cmd_list.
+ * This array is used only to look up the mvumi_cmd given the context. The
+ * free commands themselves are maintained in a linked list called cmd_pool.
+ */
+static int mvumi_alloc_cmds(struct mv_hba *mhba)
+{
+	int i;
+	int j;
+	u32 max_cmd;
+	struct mvumi_cmd *cmd;
+
+	max_cmd = mhba->max_io;
+
+	/*
+	 * lhba->cmd_list is an array of struct mvumi_cmd pointers.
+	 * Allocate the dynamic array first and then allocate individual
+	 * commands.
+	 */
+	mhba->cmd_list =
+	    kcalloc(max_cmd, sizeof(struct mvumi_cmd *), GFP_KERNEL);
+
+	if (!mhba->cmd_list) {
+		mv_printk(" out of memory\n");
+		return -ENOMEM;
+	}
+
+	for (i = 0; i < max_cmd; i++) {
+		mhba->cmd_list[i] = kmalloc(sizeof(struct mvumi_cmd),
+					    GFP_KERNEL);
+
+		if (!mhba->cmd_list[i]) {
+
+			for (j = 0; j < i; j++)
+				kfree(mhba->cmd_list[j]);
+
+			kfree(mhba->cmd_list);
+			mhba->cmd_list = NULL;
+			mv_printk(" out of memory for alloc cmd list\n");
+
+			return -ENOMEM;
+		}
+	}
+
+	/*
+	 * Add all the commands to command pool (lhba->cmd_pool)
+	 */
+	for (i = 0; i < max_cmd; i++) {
+		cmd = mhba->cmd_list[i];
+		memset(cmd, 0, sizeof(struct mvumi_cmd));
+		cmd->index = i;
+		cmd->mhba = mhba;
+		list_add_tail(&cmd->queue_pointer, &mhba->cmd_pool);
+	}
+
+	/*
+	 * Create a frame pool and assign one frame to each cmd
+	 */
+	if (mvumi_create_frame_pool(mhba)) {
+		mv_printk(" Error creating frame DMA pool\n");
+		mvumi_free_cmds(mhba);
+		return -ENOMEM;
+	}
+
+	return 0;
+}
+EXPORT_SYMBOL(mvumi_alloc_cmds);
+
+/* ----------------------------------------------------------------- */
+/* ----------------------------------------------------------------- */
+/* ----------------------------------------------------------------- */
+static int mvumi_get_ib_list_entry(struct mv_hba *mhba, void **ib_entry)
+{
+	void *regs = mhba->mmio;
+	u32 ib_rp_reg;
+	u32 cur_tag;
+	u32 inb_available_count=0;
+
+	if(_IS_CHIP_8180(mhba)){
+		if (atomic_read(&mhba->fw_outstanding) >= mhba->max_io - 1) {
+			mv_printk("firmware io overflow.\n");
+			return -1;
+		}
+		inb_available_count=readl(mhba->ib_shadow);
+		if(inb_available_count !=mhba->list_num_io){
+			return -1;
+			}
+		if(inb_available_count<=mhba->ib_cur_count++){
+			return -1;
+			}
+	}else
+	{
+		if (atomic_read(&mhba->fw_outstanding) >= mhba->max_io ) {
+			mv_printk("firmware io overflow.\n");
+			return -1;
+		}
+	ib_rp_reg = mr32(CLA_INB_READ_POINTER);
+
+	/* no free slot to use */
+	if (((ib_rp_reg & CL_SLOT_NUM_MASK) ==
+	     (mhba->ib_cur_slot & CL_SLOT_NUM_MASK)) &&
+	    ((ib_rp_reg & CL_POINTER_TOGGLE) !=
+	     (mhba->ib_cur_slot & CL_POINTER_TOGGLE))) {
+		mv_printk("no free slot to use.\n");
+		return -1;
+	}
+	}
+	cur_tag = mhba->ib_cur_slot & CL_SLOT_NUM_MASK;
+	cur_tag++;
+	if (cur_tag >= mhba->list_num_io) {
+		cur_tag -= mhba->list_num_io;
+		mhba->ib_cur_slot ^= CL_POINTER_TOGGLE;
+	}
+
+	/* modify current slot value */
+	mhba->ib_cur_slot &= ~CL_SLOT_NUM_MASK;
+	mhba->ib_cur_slot |= (cur_tag & CL_SLOT_NUM_MASK);
+	*ib_entry = (void *)((u8 *) mhba->ib_list +
+			cur_tag * mhba->ib_max_entry_size_bytes);
+	atomic_inc(&mhba->fw_outstanding);
+
+	if(is_workround_dev(mhba)) {
+		/* !!! work around for slot 0, can not work */
+		if ((cur_tag == 0) && (mhba->list_workaround_flag & MU_WA_IB_LIST)) {
+			*ib_entry = (void *)((u8 *) mhba->ib_list +
+				mhba->list_num_io * mhba->ib_max_entry_size_bytes);
+		}
+		mhba->list_workaround_flag |= MU_WA_IB_LIST;
+	}
+
+	return 0;
+}
+
+static u8 mvumi_send_ib_list_entry(struct mv_hba *mhba)
+{
+	void *regs = mhba->mmio;
+#if 1
+	writel((u32)0xfff,mhba->ib_shadow);
+	mhba->ib_cur_count=0;
+	mw32(CLA_INB_WRITE_POINTER, mhba->ib_cur_slot);
+#else
+	/* work wround for M-bus */
+	mw32(CLA_INB_WRITE_POINTER, mhba->ib_current_slot);
+	mw32(CPU_PCIEA_TO_ARM_DRBL_REG, MV_BIT(7));
+#endif
+
+	return 0;
+}
+
+static u8 mvumi_receive_ob_list_entry(struct mv_hba *mhba)
+{
+	u32 ob_read_reg, ob_write_req;
+	u32 cur_tag, assign_tag_end;
+	u32 i;
+	struct mv_ob_data_pool *free_ob_pool;
+	void *p_outb_frame, *regs;
+	struct mvumi_rsp_frame *ob_frame;
+
+	regs = mhba->mmio;
+	ob_read_reg = mr32(CLA_OUTB_READ_POINTER);
+	if(_IS_CHIP_8180(mhba))
+		ob_write_req=readl(mhba->ob_shadow);
+	else
+	ob_write_req = mr32(CLA_OUTB_COPY_POINTER);
+	cur_tag = mhba->ob_cur_slot & CL_SLOT_NUM_MASK;	/* bit (0~11) indicate the number */
+	assign_tag_end = ob_write_req & CL_SLOT_NUM_MASK;
+
+	/* check if wrap around */
+	if(_IS_CHIP_8180(mhba)){
+		if(assign_tag_end<cur_tag){
+			assign_tag_end+=mhba->list_num_io;
+			} else if(assign_tag_end==cur_tag)
+				return MV_TRUE;
+		}else{
+	if ((ob_write_req & CL_POINTER_TOGGLE) !=
+	    (mhba->ob_cur_slot & CL_POINTER_TOGGLE)) {
+		assign_tag_end += mhba->list_num_io;
+
+	}
+	}
+
+	for (i = (assign_tag_end - cur_tag); i != 0; i--) {
+		cur_tag++;
+		if (cur_tag >= mhba->list_num_io) {
+			cur_tag -= mhba->list_num_io;
+			mhba->ob_cur_slot ^= CL_POINTER_TOGGLE;	/* set toggle for current slot */
+		}
+
+		free_ob_pool = (struct mv_ob_data_pool *)list_get_first_entry(
+		    		&mhba->ob_data_pool_list,
+				struct mv_ob_data_pool,
+				queue_pointer);
+
+		if (!free_ob_pool) {
+			if (cur_tag == 0) {
+				cur_tag = mhba->list_num_io - 1;
+				mhba->ob_cur_slot ^= CL_POINTER_TOGGLE;	/* set toggle for current slot */
+			} else {
+				cur_tag -= 1;
+			}
+
+			break;
+		}
+
+		/* Get Outbound List and copy to free pool */
+		p_outb_frame = (void *)((u8 *) mhba->ob_list +
+			     cur_tag * mhba->ob_max_entry_size_bytes);
+		memcpy(free_ob_pool->ob_data, p_outb_frame,
+			mhba->ob_max_entry_size_bytes);
+
+		if(is_workround_dev(mhba)) {
+			/* !!! work around for slot 0, can not work */
+			if ((cur_tag == 0)
+			    && (mhba->list_workaround_flag & MU_WA_OB_LIST)) {
+
+				/* Get Outbound List and copy to free pool */
+				p_outb_frame =
+				    (void *)((u8 *) mhba->ob_list +
+					     mhba->list_num_io *
+					     mhba->ob_max_entry_size_bytes);
+				memcpy(free_ob_pool->ob_data, p_outb_frame,
+				       mhba->ob_max_entry_size_bytes);
+			}
+
+			mhba->list_workaround_flag |= MU_WA_OB_LIST;
+		}
+
+		ob_frame = (struct mvumi_rsp_frame *)p_outb_frame;
+		//mvumi_dump_ob_info(ob_frame);
+		/* Queue OutB frame to g_outb_list */
+		list_add_tail(&free_ob_pool->queue_pointer,
+			      &mhba->free_ob_list);
+	}
+
+	/* modify current slot value         */
+	mhba->ob_cur_slot &= ~CL_SLOT_NUM_MASK;
+	mhba->ob_cur_slot |= (cur_tag & CL_SLOT_NUM_MASK);
+	mw32(CLA_OUTB_READ_POINTER, mhba->ob_cur_slot);
+
+	return 1;
+}
+
+/* ----------------------------------------------------------------- */
+/* ----------------------------------------------------------------- */
+/* ----------------------------------------------------------------- */
+static void mvumi_reset(void *regs)
+{
+	/* disable all isr */
+	mw32(CPU_ENPOINTA_MASK_REG, 0);
+	if (mr32(CPU_ARM_TO_PCIEA_MSG1) != HANDSHAKE_DONESTATE)
+		return;
+
+	/* perform soft-reset */
+	mw32(CPU_ARM_TO_PCIEA_MSG1,0);
+	mw32(CPU_PCIEA_TO_ARM_DRBL_REG, DRBL_SOFT_RESET);
+	return;
+}
+
+static u8 mvumi_start(struct mv_hba *mhba);
+
+/**
+ * mvumi_wait_for_outstanding -	Wait for all outstanding cmds
+ * @lhba:				Adapter soft state
+ *
+ * This function waits for upto MVUMI_RESET_WAIT_TIME seconds for FW to
+ * complete all its outstanding commands. Returns error if one or more IOs
+ * are pending after this time period. It also marks the controller dead.
+ */
+static int mvumi_wait_for_outstanding(struct mv_hba *mhba)
+{
+	mhba->fw_state = FW_STATE_ABORT;
+	mvumi_reset(mhba->mmio);
+	msleep(10000);
+	if(mvumi_start(mhba))
+		return FAILED;
+	else
+		return SUCCESS;
+}
+
+/**
+ * mvumi_generic_reset -	Generic reset routine
+ * @scmd:			Mid-layer SCSI command
+ *
+ * This routine implements a generic reset handler for device, bus and host
+ * reset requests. Device, bus and host specific reset handlers can use this
+ * function after they do their specific tasks.
+ */
+static int mvumi_generic_reset(struct scsi_cmnd *scmd)
+{
+	int ret_val;
+	struct mv_hba *mhba;
+
+	mhba = (struct mv_hba *)scmd->device->host->hostdata;
+
+	#if LINUX_VERSION_CODE >=KERNEL_VERSION(2, 6, 18)
+	scmd_printk(KERN_NOTICE, scmd, " RESET -%ld cmd=%x retries=%x\n",
+		    scmd->serial_number, scmd->cmnd[0], scmd->retries);
+	#else
+	mv_printk(KERN_NOTICE, scmd, " RESET -%ld cmd=%x retries=%x\n",
+		    scmd->serial_number, scmd->cmnd[0], scmd->retries);
+	#endif
+
+	if (mhba->hw_crit_error) {
+		mv_printk( " cannot recover from previous reset "
+		       "failures\n");
+		return FAILED;
+	}
+
+	ret_val = mvumi_wait_for_outstanding(mhba);
+	if (ret_val == SUCCESS)
+		mv_printk( " reset successful\n");
+	else
+		mv_printk( " failed to do reset\n");
+
+	return ret_val;
+}
+
+/* ----------------------------------------------------------------- */
+/* ----------------------------------------------------------------- */
+/**
+ * mvumi_complete_int_cmd -	Completes an internal command
+ * @lhba:			Adapter soft state
+ * @cmd:			Command to be completed
+ *
+ * The mvumi_issue_blocked_cmd() function waits for a command to complete
+ * after it issues a command. This function wakes up that waiting routine by
+ * calling wake_up() on the wait queue.
+ */
+static void mvumi_complete_int_cmd(struct mv_hba *mhba, struct mvumi_cmd *cmd)
+{
+	mvumi_del_timer(&cmd->eh_timer);
+	mvumi_return_int_cmd(mhba, cmd);
+	/* FIXED ME */
+}
+
+static int mvumi_issue_blocked_cmd(struct mv_hba *mhba, struct mvumi_cmd *cmd)
+{
+	u8 ret = 0;
+	unsigned long flags;
+	cmd->cmd_status = REQ_STATUS_PENDING;
+	if (cmd->sync_cmd){
+		mv_printk("last blocked cmd not finished.\n");
+		MV_ASSERT(0);
+		return 0;
+	}
+	cmd->sync_cmd = 1;
+
+	mhba->instancet->fire_cmd(mhba, cmd);
+
+	/* MVUMI_INTERNAL_CMD_WAIT_TIME second timeout */
+	ret=wait_event_timeout(mhba->int_cmd_wait_q,
+			(cmd->cmd_status != REQ_STATUS_PENDING),
+			MVUMI_INTERNAL_CMD_WAIT_TIME * HZ);
+	
+	if (cmd->sync_cmd) {
+		spin_lock_irqsave(&mhba->mv_timer_lock, flags);
+		if(cmd->sync_cmd){
+		cmd->sync_cmd = 0;
+		if(mhba->tag_cmd[cmd->frame->tag]){
+			mhba->tag_cmd[cmd->frame->tag] = 0;
+			mv_printk("TIMEOUT:release tag [%d]\n",cmd->frame->tag);
+			tag_release_one(mhba, &mhba->tag_pool, cmd->frame->tag);
+		}
+		mv_printk("TIMEOUT:release a internal command\n");
+		spin_lock_irqsave(&mhba->mv_waiting_req_lock,flags);
+		if(cmd->queue_pointer.next!=LIST_POISON1 && cmd->queue_pointer.prev!=LIST_POISON2			
+			&&cmd->queue_pointer.next!=&cmd->queue_pointer && cmd->queue_pointer.prev!=&cmd->queue_pointer
+				&&cmd->queue_pointer.prev!=NULL && cmd->queue_pointer.next!=NULL)
+			{
+				mv_printk("TIMEOUT:A internal command doesn't send!\n");
+				list_del_init(&cmd->queue_pointer);
+			} else
+				atomic_dec(&mhba->fw_outstanding);
+		spin_unlock_irqrestore(&mhba->mv_waiting_req_lock,flags);
+		mvumi_complete_int_cmd(mhba, cmd);
+		
+		}
+		spin_unlock_irqrestore(&mhba->mv_timer_lock, flags);
+	}
+
+	return ret;
+}
+/* ----------------------------------------------------------------- */
+
+/**
+ * mvumi_release_fw -	Reverses the FW initialization
+ * @intance:			Adapter soft state
+ */
+static void mvumi_release_fw(struct mv_hba *mhba)
+{
+	mvumi_free_cmds(mhba);
+	mvumi_release_mem_resource(mhba);
+#if defined(SUPPORT_INTERNAL_REQ)
+	mvumi_free_int_cmds(mhba);
+#endif
+	mvumi_unmap_pci_addr(mhba->pdev, mhba->base_addr);
+	pci_release_regions(mhba->pdev);
+}
+
+/**
+ * mvumi_flush_cache -	Requests FW to flush all its caches
+ * @lhba:			Adapter soft state
+ */
+static u8 mvumi_flush_cache(struct mv_hba *mhba)
+{
+	struct mvumi_cmd *cmd;
+	struct mvumi_msg_frame *frame;
+	u8 device_id;
+	mv_printk("start mvumi_flush_cache.\n");
+
+	for(device_id=0;device_id<mhba->max_target_id;device_id++){
+	cmd = mvumi_get_int_cmd(mhba, 0);
+	if (!cmd)
+		return -1;
+	cmd->scmd = 0;
+	cmd->mhba = mhba;
+	cmd->cmd_status = REQ_STATUS_PENDING;
+	frame = cmd->frame;
+
+	frame->req_function = CL_FUN_SCSI_CMD;
+	frame->device_id = device_id;//VIRTUAL_DEVICE_ID;
+	frame->cmd_flag = CMD_FLAG_NON_DATA;
+	frame->sg_counts = 0;
+	frame->data_transfer_length = 0;
+	frame->cdb_length = MAX_CDB_SIZE;
+	memset(frame->cdb, 0, MAX_CDB_SIZE);
+	frame->cdb[0] = SCSI_CMD_MARVELL_SPECIFIC;
+	//frame->cdb[1] = CDB_CORE_MODULE;
+	frame->cdb[2] = CDB_CORE_SHUTDOWN;
+	/*
+	 * Issue the command to the FW
+	 */
+	mvumi_issue_blocked_cmd(mhba, cmd);
+	if (cmd->cmd_status != REQ_STATUS_SUCCESS) {
+		mv_printk("device %d mvumi_flush_cache failed, status=0x%x.\n",
+			  device_id, cmd->cmd_status);
+		break;
+	}
+	}
+	return 0;
+}
+static u8 mvumi_inquiry(struct mv_hba *mhba, unsigned int id, unsigned int lun)
+{
+	struct mvumi_cmd *cmd;
+	struct mvumi_msg_frame *frame;
+	cmd = mvumi_get_int_cmd(mhba, 0);
+	if (!cmd)
+		return -1;
+
+	cmd->scmd = 0;
+	cmd->mhba = mhba;
+
+	frame = cmd->frame;
+	frame->req_function = CL_FUN_SCSI_CMD;
+	frame->device_id = MVUMI_DEV_INDEX(id, lun);
+	frame->cmd_flag = CMD_FLAG_DATA_IN;
+	frame->sg_counts = 1;
+	frame->data_transfer_length = 0x24;
+	frame->cdb_length = 6;
+	memset(frame->cdb, 0, MAX_CDB_SIZE);
+	frame->cdb[0] = INQUIRY;
+	frame->cdb[4] = frame->data_transfer_length;
+
+	mvumi_issue_blocked_cmd(mhba, cmd);
+	return cmd->cmd_status;
+}
+
+static void mvumi_rescan(struct mv_hba *mhba, unsigned int event)
+{
+	struct scsi_device *sdev;
+	if (event == EVENT_DEVICE_REMOVAL) {
+		shost_for_each_device(sdev, mhba->shost) {
+			if (mvumi_inquiry(mhba, sdev->id, sdev->lun)) {
+				sdev = scsi_device_lookup(mhba->shost, 0,
+							sdev->id, 0);
+				if (sdev) {
+					mv_printk(" remove disk %d-%d-%d.\n",
+							0, sdev->id, 0);
+					scsi_remove_device(sdev);
+					scsi_device_put(sdev);
+				} else
+					mv_printk(" no disk to remove\n");
+			}
+		}
+	} else if (event == EVENT_DEVICE_ARRIVAL) {
+		unsigned int id;
+		unsigned int lun;
+		for(id = 0; id < mhba->shost->max_id; id++)
+			for(lun = 0; lun < mhba->shost->max_lun; lun++) {
+				sdev = scsi_device_lookup(mhba->shost,
+								0, id, lun);
+				if (!mvumi_inquiry(mhba, id, lun)) {
+					if (!sdev) {
+						scsi_add_device(mhba->shost, 0,
+							id, lun);
+						mv_printk(" add disk "
+							"%d-%d-%d.\n",
+							0, id, lun);
+					}
+				} else {
+					if (sdev) {
+						mv_printk(" remove disk"
+							"%d-%d-%d.\n",
+							0, sdev->id, sdev->lun);
+						scsi_remove_device(sdev);
+						scsi_device_put(sdev);
+					}
+				}
+			}
+	}
+}
+
+static int mvumi_handle_hotplug(struct mv_hba *mhba, u16 devid, int status)
+{
+	struct scsi_device *sdev;
+	if (status == DEVICE_OFFLINE) {
+		sdev = scsi_device_lookup(mhba->shost, 0,
+				devid, 0);
+		if (sdev) {
+			mv_printk(" remove disk %d-%d-%d.\n",
+					0, sdev->id, 0);
+			scsi_remove_device(sdev);
+			scsi_device_put(sdev);
+		} else
+			mv_printk(" no disk[%d] to remove\n", devid);
+		return 1;
+	} else if (status == DEVICE_ONLINE) {
+		sdev = scsi_device_lookup(mhba->shost,
+				0, devid, 0);
+		if (!sdev) {
+			scsi_add_device(mhba->shost, 0,
+				devid, 0);
+			mv_printk(" add disk "
+				"%d-%d-%d.\n",
+				0, devid, 0);
+		} else {
+			mv_printk(" don't add disk"
+				"%d-%d-%d.\n",
+				0, devid, 0);
+		}
+		return 1;
+	}
+	return 0;
+}
+
+/**
+ * mvumi_shutdown_controller -	Instructs FW to shutdown the controller
+ * @lhba:				Adapter soft state
+ */
+static void mvumi_shutdown_controller(struct mv_hba *mhba)
+{
+	/* FIXED ME */
+	return;
+}
+
+static u8
+mvumi_calculate_checksum(struct mv_handshake_header *p_header, u16 len)
+{
+	u8 *ptr_U8;
+	u8 ret = 0, i;
+
+	ptr_U8 = (u8 *) p_header->frame_content;
+	for (i = 0; i < len; i++) {
+		ret ^= *ptr_U8;
+		ptr_U8++;
+	}
+
+	return ret;
+}
+
+void mvumi_hs_build_page(struct mv_hba *mhba,
+			 struct mv_handshake_header *hs_header)
+{
+	struct mv_handshake_page2 *hs_page2;
+	struct mv_handshake_page4 *hs_page4;
+	struct mv_handshake_page3 *hs_page3;
+
+	switch (hs_header->page_code) {
+	case HS_PAGE_HOST_INFO:
+		hs_page2 = (struct mv_handshake_page2 *)hs_header;
+		hs_header->frame_length = sizeof(struct mv_handshake_page2) - 4;
+		memset(hs_header->frame_content, 0, hs_header->frame_length);
+		hs_page2->host_type = MV_OS_TYPE_LINUX;
+		hs_page2->host_ver.ver_major = VER_MAJOR;
+		hs_page2->host_ver.ver_minor = VER_MINOR;
+		hs_page2->host_ver.ver_oem = VER_OEM;
+		hs_page2->host_ver.ver_build = VER_BUILD;
+		hs_page2->system_io_bus = 0;
+		hs_page2->slot_number = 0;
+		hs_page2->intr_level = 0;
+		hs_page2->intr_vector = 0;
+		hs_page2->seconds_since1970 = mvumi_get_time_in_sec();
+		hs_header->checksum =
+		    HS_SET_CHECKSUM(hs_header, hs_header->frame_length);
+		break;
+
+	case HS_PAGE_FIRM_CTL:
+		hs_page3 = (struct mv_handshake_page3 *)hs_header;
+		hs_header->frame_length = sizeof(struct mv_handshake_page3) - 4;
+		memset(hs_header->frame_content, 0, hs_header->frame_length);
+		hs_header->checksum =
+		    HS_SET_CHECKSUM(hs_header, hs_header->frame_length);
+		break;
+
+	case HS_PAGE_CL_INFO:
+		hs_page4 = (struct mv_handshake_page4 *)hs_header;
+		hs_header->frame_length = sizeof(struct mv_handshake_page4) - 4;
+		memset(hs_header->frame_content, 0, hs_header->frame_length);
+		hs_page4->ib_baseaddr_l = mhba->ib_list_phys;
+		if (!IS_CHIP_8180(mhba))
+			hs_page4->ob_baseaddr_l = mhba->ob_list_phys-4;
+		else
+			hs_page4->ob_baseaddr_l = mhba->ob_list_phys;
+
+		hs_page4->ib_baseaddr_h = (mhba->ib_list_phys >> 16) >> 16;
+		hs_page4->ob_baseaddr_h = (mhba->ob_list_phys >> 16) >> 16;
+		hs_page4->ib_entry_size = mhba->ib_max_entry_size_setting;
+		hs_page4->ob_entry_size = mhba->ob_max_entry_size_setting;
+		hs_page4->ob_depth = mhba->list_num_io;
+		hs_page4->ib_depth = mhba->list_num_io;
+		hs_header->checksum =
+		    HS_SET_CHECKSUM(hs_header, hs_header->frame_length);
+		
+		mv_printk("****ib max size=%d\n",mhba->ib_max_entry_size_bytes);
+		
+		mv_printk("****ob max size=%d \n",mhba->ob_max_entry_size_bytes);
+#if 0
+		mv_printk("ib_baseaddr_l=0x%x,"
+			"ib_baseaddr_h=0x%x,"
+			"ob_baseaddr_h=0x%x,"
+			"ob_baseaddr_h=0x%x.\n",
+			hs_page4->ib_baseaddr_l,
+			hs_page4->ib_baseaddr_h ,
+			hs_page4->ob_baseaddr_l ,
+			hs_page4->ob_baseaddr_h);
+
+		mv_printk("ib_list=0x%p,ob_list=0x%p.\n",mhba->ib_list,
+			mhba->ob_list);
+#endif
+
+		break;
+
+	default:
+		break;
+	}
+	return;
+}
+
+static int mvumi_init_data(struct mv_hba *mhba);
+
+static int mvumi_hs_process_page(struct mv_hba *mhba,
+				struct mv_handshake_header *hs_header)
+{
+	struct mv_handshake_page1 *hs_page1;
+	u8 page_checksum;
+	int ret = 0;
+
+	page_checksum =
+		HS_SET_CHECKSUM(hs_header, hs_header->frame_length);
+	if (page_checksum != hs_header->checksum) {
+		//Page Error by checksum
+		return -1;
+	}
+
+	switch (hs_header->page_code) {
+	case HS_PAGE_FIRM_CAP:
+		hs_page1 = (struct mv_handshake_page1 *)hs_header;
+		if (mhba->list_num_io > hs_page1->cl_inout_list_depth)
+		    mhba->list_num_io = hs_page1->cl_inout_list_depth;
+		if (hs_page1->cl_in_max_entry_size < CL_IN_ENTRY_SIZE_SETTING) {
+			mhba->ib_max_entry_size_setting =
+				hs_page1->cl_in_max_entry_size;
+			mhba->ib_max_entry_size_bytes =
+				CL_LIST_ENTRY_SIZE_BYTES(hs_page1->cl_in_max_entry_size);
+			mv_printk("****ib max size=%d set=%d\n",mhba->ib_max_entry_size_bytes,hs_page1->cl_in_max_entry_size);
+		}
+		if (hs_page1->cl_out_max_entry_size < CL_OUT_ENTRY_SIZE_SETTING) {
+			mhba->ob_max_entry_size_setting =
+				hs_page1->cl_out_max_entry_size;
+			mhba->ob_max_entry_size_bytes =
+				CL_LIST_ENTRY_SIZE_BYTES(hs_page1->cl_out_max_entry_size);
+			mv_printk("****ob max size=%d,set=%d\n",mhba->ob_max_entry_size_bytes,hs_page1->cl_out_max_entry_size);
+		}
+		/* TBD: transfer_size could be more flexible in the future.
+		 *	driver may need to split request or consolidate before
+		 *	sending to firmware */
+		if (hs_page1->max_transfer_size < MVUMI_MAX_TRANSFER_SIZE)
+			mhba->max_transfer_size = hs_page1->max_transfer_size;
+		if (hs_page1->max_devices_support<MVUMI_MAX_TARGET_NUMBER)
+			mhba->max_target_id = hs_page1->max_devices_support;
+		if (hs_page1->max_io_support < mhba->max_io)
+			mhba->max_io = hs_page1->max_io_support;
+
+		mhba->hba_capability = hs_page1->capability;
+
+		// work around for Vili A0 - can only support one IO at a time
+		if (IS_CHIP_VILI(mhba)) {
+				mhba->max_io = 1;
+		}
+#if 0
+		mv_printk("ob_max_entry_size_setting=0x%x,"
+			"ib_max_entry_size_bytes =0x%x,"
+			"ob_max_entry_size_setting=0x%x,"
+			"ob_max_entry_size_bytes=0x%x.\n",
+			mhba->ib_max_entry_size_setting,
+			mhba->ib_max_entry_size_bytes ,
+			mhba->ob_max_entry_size_setting,
+			mhba->ob_max_entry_size_bytes);
+
+		mv_printk("fw capacity=0x%x,"
+			"max_transfer_size=0x%x,"
+			"list_num_io=%d,"
+			"max_target_id=%d,"
+			"max_io=%d.\n",
+			mhba->hba_capability,
+			mhba->max_transfer_size,
+			mhba->list_num_io,
+			mhba->max_target_id,
+			mhba->max_io);
+#endif
+		break;
+	default:
+		break;
+	}
+	return ret;
+}
+
+static void mvumi_alloc_hs_page(struct mv_hba *mhba)
+{
+	mhba->handshake_page = mhba->handshake_page_base;
+	mhba->handshake_page_phys = mhba->handshake_page_phys_base;
+}
+
+/**
+ * mvumi_handshake -	Move the FW to READY state
+ * @lhba:				Adapter soft state
+ *
+ * During the initialization, FW passes can potentially be in any one of
+ * several possible states. If the FW in operational, waiting-for-handshake
+ * states, driver must take steps to bring it to ready state. Otherwise, it
+ * has to wait for the ready state.
+ */
+static int mvumi_handshake(struct mv_hba *mhba)
+{
+	u32 hs_state, tmp, hs_fun;
+	struct mv_handshake_header *hs_header;
+	void *regs = mhba->mmio;
+
+	if (mhba->fw_state == FW_STATE_STARTING)
+		hs_state = HS_S_START;
+	else {
+		tmp = mr32(CPU_ARM_TO_PCIEA_MSG0);
+		hs_state = HS_GET_STATE(tmp);
+		mv_printk("handshake host state = 0x%x.\n",   hs_state);
+		if (HS_GET_STATUS(tmp) != HS_STATUS_OK) {
+			mhba->fw_state = FW_STATE_STARTING;
+			return -1;
+		}
+	}
+
+	hs_fun = 0;
+	switch (hs_state) {
+	case HS_S_START:
+		mhba->fw_state = FW_STATE_HANDSHAKING;
+		HS_SET_STATUS(hs_fun, HS_STATUS_OK);
+		HS_SET_STATE(hs_fun, HS_S_RESET);
+		mw32(CPU_PCIEA_TO_ARM_MSG1, HANDSHAKE_SIGNATURE);
+		mw32(CPU_PCIEA_TO_ARM_MSG0, hs_fun);
+		mw32(CPU_PCIEA_TO_ARM_DRBL_REG, DRBL_HANDSHAKE);
+		break;
+
+	case HS_S_RESET:
+		mvumi_alloc_hs_page(mhba);
+		mw32(CPU_PCIEA_TO_ARM_MSG1, (u32) mhba->handshake_page_phys);
+		mw32(CPU_ARM_TO_PCIEA_MSG1,
+				(mhba->handshake_page_phys >> 16) >> 16);
+		HS_SET_STATUS(hs_fun, HS_STATUS_OK);
+		HS_SET_STATE(hs_fun, HS_S_PAGE_ADDR);
+		mw32(CPU_PCIEA_TO_ARM_MSG0, hs_fun);
+		mw32(CPU_PCIEA_TO_ARM_DRBL_REG, DRBL_HANDSHAKE);
+
+		break;
+
+	case HS_S_PAGE_ADDR:
+	case HS_S_QUERY_PAGE:
+	case HS_S_SEND_PAGE:
+		hs_header = (struct mv_handshake_header *) mhba->handshake_page;
+		if (hs_header->page_code == HS_PAGE_FIRM_CAP) {
+			mhba->hba_total_pages =
+				((struct mv_handshake_page1 *)hs_header)->total_pages;
+
+			// for backward compatibility
+			if (mhba->hba_total_pages == 0)
+				mhba->hba_total_pages = HS_PAGE_TOTAL-1;
+
+		}
+
+		if (hs_state == HS_S_QUERY_PAGE) {
+			if (mvumi_hs_process_page(mhba, hs_header)) {
+				HS_SET_STATE(hs_fun, HS_S_ABORT);
+				return -1;
+			}
+		} else if (hs_state == HS_S_PAGE_ADDR){
+			hs_header->page_code = 0;
+			/* initial value - will be set by firmware after the first handshaking
+			 * page */
+			mhba->hba_total_pages = HS_PAGE_TOTAL-1;
+
+		}
+
+		//verify next fw_state
+		if ((hs_header->page_code + 1) <= mhba->hba_total_pages) {
+			hs_header->page_code++;
+			if (hs_header->page_code != HS_PAGE_FIRM_CAP) {
+				mvumi_hs_build_page(mhba, hs_header);
+				HS_SET_STATE(hs_fun, HS_S_SEND_PAGE);
+			} else {
+				HS_SET_STATE(hs_fun, HS_S_QUERY_PAGE);
+			}
+		} else {
+			HS_SET_STATE(hs_fun, HS_S_END);
+		}
+		HS_SET_STATUS(hs_fun, HS_STATUS_OK);
+		mw32(CPU_PCIEA_TO_ARM_MSG0, hs_fun);
+		mw32(CPU_PCIEA_TO_ARM_DRBL_REG, DRBL_HANDSHAKE);
+		break;
+
+	case HS_S_END:
+
+		/* Set communication list ISR */
+		tmp = mr32(CPU_ENPOINTA_MASK_REG);
+		tmp |= INT_MAP_COMAOUT | INT_MAP_COMAERR;
+		mw32(CPU_ENPOINTA_MASK_REG, tmp);
+		writel(mhba->list_num_io,mhba->ib_shadow);
+		/* Set InBound List Avaliable count shadow */
+		mw32(CLA_INB_AVAL_COUNT_BASEL, mhba->ib_shadow_phys);
+		mw32(CLA_INB_AVAL_COUNT_BASEH,
+		     (mhba->ib_shadow_phys >> 16) >> 16);
+
+		if (IS_CHIP_8180(mhba)) {
+			/* Set OutBound List Avaliable count shadow */
+			writel((u32)((mhba->list_num_io-1)|CL_POINTER_TOGGLE ),mhba->ob_shadow);
+			mw32(0x5B0, mhba->ob_shadow_phys);
+			mw32(0x5B4, (mhba->ob_shadow_phys >> 16) >> 16);
+		}
+		#ifdef MU_OB_COALESCING
+				mw32(0x568,(u32)0x10040);
+		#endif
+
+		mhba->ib_cur_slot = (mhba->list_num_io - 1) | CL_POINTER_TOGGLE;
+		mhba->ob_cur_slot = (mhba->list_num_io - 1) | CL_POINTER_TOGGLE;
+
+		if(is_workround_dev(mhba))
+			mhba->list_workaround_flag = 0;
+
+		mhba->fw_state = FW_STATE_STARTED;
+
+		break;
+	default:
+		return -1;
+	}
+	return 0;
+}
+
+static u8 mvumi_handshake_event(struct mv_hba *mhba)
+{
+	void *regs = mhba->mmio;
+	u32 isr_status;		// isr_bits;
+	unsigned long before;
+	before = jiffies;
+	mvumi_handshake(mhba);
+	do {
+    	isr_status = mr32(CPU_MAIN_INT_CAUSE_REG);
+		isr_status = mhba->instancet->read_fw_status_reg(mhba->mmio);
+
+		if (mhba->fw_state == FW_STATE_STARTED)
+			return 0;	/* handshake finished */
+		if (time_after(jiffies, before + FW_MAX_DELAY * HZ)) {
+			mv_printk("no handshake response at 0x%x.\n",
+				  mhba->fw_state);
+			mv_printk("falied global_isr=0x%x,isr_status=0x%x.\n",
+				  mhba->global_isr, isr_status);
+			return -1;
+		}
+		rmb();
+		msleep(1);
+	} while (!(isr_status & DRBL_HANDSHAKE_ISR));
+
+	return 0;
+}
+
+static u8 mvumi_check_handshake(struct mv_hba *mhba)
+{
+	void *regs = mhba->mmio;
+	u32 tmp;
+#if 0
+	if (mr32(CPU_ARM_TO_PCIEA_MSG1) != HANDSHAKE_READYSTATE) {
+		mvumi_add_timer(&mhba->hs_timer, 1, mvumi_check_handshake,
+				mhba);
+		return 0;
+	}
+#else
+
+	unsigned long before;
+	before = jiffies;
+
+	/* Check handshake signature */
+
+	tmp = mr32(CPU_ARM_TO_PCIEA_MSG1);
+	while ((tmp != HANDSHAKE_READYSTATE) && (tmp != HANDSHAKE_DONESTATE)) {
+		if (tmp != HANDSHAKE_READYSTATE) {
+			mw32(CPU_PCIEA_TO_ARM_DRBL_REG,   DRBL_MU_RESET);
+		}
+		if (time_after(jiffies, before + FW_MAX_DELAY * HZ)) {
+			mv_printk(" invalid handshake signature 0x%x.\n",
+			       tmp);
+			return -1;
+		}
+		msleep(1);
+		rmb();
+		tmp = mr32(CPU_ARM_TO_PCIEA_MSG1);
+	}
+
+#endif
+	mv_printk("Handshake signature = 0x%x.\n", mr32(CPU_ARM_TO_PCIEA_MSG1));
+
+	/* Start firmware handshake */
+	mhba->fw_state = FW_STATE_STARTING;
+	mv_printk("start firmware handshake.\n");
+	while (1) {
+		if (mvumi_handshake_event(mhba)) {
+			mv_printk("start firmware failed at state 0x%x.\n",
+				  mhba->fw_state);
+			return -1;
+		}
+
+		if (mhba->fw_state == FW_STATE_STARTED)
+			break;
+	}
+	mv_printk("mhba->fw_state at  0x%x.\n",   mhba->fw_state);
+	return 0;
+}
+
+static int mvumi_request_irq(struct mv_hba *mhba);
+
+static u8 mvumi_start(struct mv_hba *mhba)
+{
+	void *regs = mhba->mmio;
+	u32 tmp;
+	/* clear Door bell */
+	tmp = mr32(CPU_ARM_TO_PCIEA_DRBL_REG);
+	mw32(CPU_ARM_TO_PCIEA_DRBL_REG, tmp);
+
+	mw32(CPU_ARM_TO_PCIEA_MASK_REG, 0x3FFFFFFF);
+	tmp=mr32(CPU_ENPOINTA_MASK_REG)|INT_MAP_DL_CPU2PCIEA;
+	mw32(CPU_ENPOINTA_MASK_REG,tmp);
+	if (mvumi_check_handshake(mhba)) {
+		goto err_wait_cmpl;
+	}
+
+	mv_printk("CLA_INB_LIST_BASEL=0x%x.\n",mr32(CLA_INB_LIST_BASEL));
+	mv_printk("CLA_INB_LIST_BASEH=0x%x.\n",mr32(CLA_INB_LIST_BASEH));
+	mv_printk("CLA_OUTB_LIST_BASEL=0x%x.\n",mr32(CLA_OUTB_LIST_BASEL));
+	mv_printk("CLA_OUTB_LIST_BASEH=0x%x.\n",mr32(CLA_OUTB_LIST_BASEH));
+	mv_printk("firmware handshake ok.\n");
+	return 0;
+
+err_wait_cmpl:
+	mv_printk( "firmware handshake failed.\n");
+	return -1;
+}
+
+#if defined(SUPPORT_EVENT)
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 20)
+#define MV_INIT_WORK(w, f, d)	INIT_WORK(w, f)
+#else
+#define MV_INIT_WORK(w, f, d)	INIT_WORK(w, f, (void *) d)
+#endif
+
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 20)
+static void mvumi_proc_msg(struct work_struct *work)
+{
+	struct mvumi_events_wq *mu_ev =
+		container_of(work, struct mvumi_events_wq, work_q);
+#else
+static void mvumi_proc_msg(void *arg)
+{
+	struct mvumi_events_wq *mu_ev = arg;
+#endif
+	struct mv_hba *mhba = mu_ev->mhba;
+	struct mvumi_hotplug_event *param = mu_ev->param;
+	u16 size = param->size;
+	const unsigned long *ar_bitmap;
+	const unsigned long *re_bitmap;
+	int index;
+
+	if (mhba->flag & MVUMI_FW_ATTACH) {
+		index = -1;
+		ar_bitmap = (const unsigned long *) param->bitmap;
+		re_bitmap = (const unsigned long *) &param->bitmap[size >> 3];
+
+		mutex_lock(&mhba->sas_discovery_mutex);
+		do {
+			index = find_next_zero_bit(ar_bitmap, size, index + 1);
+			if (index >= size)
+				break;
+			mvumi_handle_hotplug(mhba, index, DEVICE_ONLINE);
+		} while (1);
+
+		index = -1;
+		do {
+			index = find_next_zero_bit(re_bitmap, size, index + 1);
+			if (index >= size)
+				break;
+			mvumi_handle_hotplug(mhba, index, DEVICE_OFFLINE);
+		} while (1);
+		mutex_unlock(&mhba->sas_discovery_mutex);
+	}
+	kfree(mu_ev);
+}
+
+static void mvumi_launch_mesg(struct mv_hba *mhba,
+				struct mvumi_hotplug_event *param)
+{
+	struct mvumi_events_wq *mu_ev;
+	int size = (param->size >> 2) + sizeof(struct mvumi_hotplug_event);
+	mu_ev = kzalloc(sizeof(*mu_ev), GFP_ATOMIC);
+	if (!mu_ev)
+		goto launch_abort;
+	mu_ev->param = kzalloc(size, GFP_ATOMIC);
+	if (!mu_ev->param) {
+		kfree(mu_ev);
+		goto launch_abort;
+	}
+	MV_INIT_WORK(&mu_ev->work_q, mvumi_proc_msg, mu_ev);
+	mu_ev->mhba = mhba;
+	mu_ev->event = EVENT_LOG_GENERATED;
+	memcpy(mu_ev->param, param, size);
+	schedule_work(&mu_ev->work_q);
+	return;
+launch_abort:
+	mv_printk("Failed to allocate memory for operation!");
+	return;
+}
+
+static void mvumi_notification(struct mv_hba *mhba,
+			u8 msg,
+			void *buffer)
+{
+	if (msg == APICDB1_HOST_GETEVENT) {
+		struct mvumi_hotplug_event *param = buffer;
+#if 0//_MVUMI_DUMP
+		print_hex_dump("", "", DUMP_PREFIX_NONE, 16, 1,
+			(void *) param,
+			(param->size >> 2) + sizeof(struct mvumi_hotplug_event),
+			1);
+#endif
+		mvumi_launch_mesg(mhba, param);
+	}
+}
+
+static int mvumi_get_event(struct mv_hba *mhba, u8 msg)
+{
+	struct mvumi_cmd *cmd;
+	struct mvumi_msg_frame *frame;
+	cmd = mvumi_get_int_cmd(mhba, 1);
+	if (!cmd)
+		return -1;
+	cmd->scmd = NULL;
+	cmd->mhba = mhba;
+	frame = cmd->frame;
+
+	frame->device_id = VIRTUAL_DEVICE_ID;
+	frame->cmd_flag = CMD_FLAG_DATA_IN;
+	frame->req_function = CL_FUN_SCSI_CMD;
+	frame->cdb_length = MAX_CDB_SIZE;
+	frame->sg_counts = 1;
+	frame->data_transfer_length = sizeof(struct mvumi_event_req);
+	memset(frame->cdb, 0, MAX_CDB_SIZE);
+	frame->cdb[0] = APICDB0_EVENT;
+	frame->cdb[1] = msg;
+	mvumi_issue_blocked_cmd(mhba, cmd);
+	return cmd->cmd_status;
+
+}
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 20)
+static void mvumi_scan_events(struct work_struct *work)
+{
+	struct mvumi_events_wq *mu_ev =
+		container_of(work, struct mvumi_events_wq, work_q);
+#else
+static void mvumi_scan_events(void *arg)
+{
+	struct mvumi_events_wq *mu_ev = arg;
+#endif
+	struct mv_hba *mhba = mu_ev->mhba;
+	u8 msg = mu_ev->event;
+
+	mutex_lock(&mhba->sas_discovery_mutex);
+	mvumi_get_event(mhba, msg);
+	mutex_unlock(&mhba->sas_discovery_mutex);
+	kfree(mu_ev);
+}
+
+static void mvumi_launch_events(struct mv_hba *mhba, u8 msg)
+{
+	struct mvumi_events_wq *mu_ev;
+	mu_ev = kzalloc(sizeof(*mu_ev), GFP_ATOMIC);
+	if (mu_ev) {
+		MV_INIT_WORK(&mu_ev->work_q, mvumi_scan_events, mu_ev);
+		mu_ev->mhba = mhba;
+		mu_ev->event = msg;
+		mu_ev->param = NULL;
+		schedule_work(&mu_ev->work_q);
+	} else
+		mv_printk( "can't get all events.\n");
+}
+
+#endif /* #if defined(SUPPORT_EVENT) */
+
+/**
+ * mvumi_complete_cmd -	Completes a command
+ * @lhba:			Adapter soft state
+ * @cmd:			Command to be completed
+ */
+static void mvumi_complete_cmd(struct mv_hba *mhba, struct mvumi_cmd *cmd)
+{
+	struct scsi_cmnd *scmd = cmd->scmd;
+	struct mvumi_sense_data *sense_buf =
+	    (struct mvumi_sense_data *)scmd->sense_buffer;
+	mvumi_del_timer(&cmd->eh_timer);
+	if (cmd->scmd)
+		cmd->scmd->SCp.ptr = NULL;
+	if ((cmd->cmd_status != REQ_STATUS_SUCCESS)
+	    && (cmd->frame->cdb[0] != INQUIRY))
+		mv_printk("device %d:cmd=0x%x,cmd->cmd_status=0x%x.\n",
+			  cmd->frame->device_id, cmd->frame->cdb[0],
+			  cmd->cmd_status);
+
+	switch (cmd->cmd_status) {
+	case REQ_STATUS_SUCCESS:
+		scmd->result = (DID_OK << 16);
+		break;
+	case REQ_STATUS_MEDIA_ERROR:
+		scmd->result = (DID_BAD_TARGET << 16);
+		break;
+	case REQ_STATUS_BUSY:
+		scmd->result = (DID_BUS_BUSY << 16);
+		break;
+	case REQ_STATUS_NO_DEVICE:
+		scmd->result = (DID_NO_CONNECT << 16);
+		break;
+	case REQ_STATUS_HAS_SENSE:
+		/* Sense buffer data is valid already. */
+		scmd->result = (DRIVER_SENSE << 24) | (DID_OK << 16);
+		sense_buf->valid = 1;
+
+#ifdef MV_DEBUG
+		mv_printk(" sense response %x SK %s length %x "
+			  "ASC %x ASCQ %x.\n", ((u8 *) sense_buf)[0],
+			  mvumi_dump_sense_key(((u8 *) sense_buf)[2]),
+			  ((u8 *) sense_buf)[7],
+			  ((u8 *) sense_buf)[12], ((u8 *) sense_buf)[13]);
+#endif
+		break;
+	default:
+		scmd->result = DRIVER_INVALID << 24;
+		scmd->result |= DID_ABORT << 16;
+		break;
+	}
+
+	if (mv_rq_bf_l(scmd)) {
+		if (mv_use_sg(scmd)) {
+			pci_unmap_sg(mhba->pdev,
+				     mv_rq_bf(scmd),
+				     mv_use_sg(scmd),
+				     scsi_to_pci_dma_dir(scmd->
+							 sc_data_direction));
+		} else {
+			pci_unmap_single(mhba->pdev,
+					 scmd->SCp.dma_handle,
+					 mv_rq_bf_l(scmd),
+					 scsi_to_pci_dma_dir(scmd->
+							     sc_data_direction));
+
+			scmd->SCp.dma_handle = 0;
+		}
+	}
+	cmd->scmd->scsi_done(scmd);
+	mvumi_return_cmd(mhba, cmd);
+}
+
+void
+mvumi_translate_status(struct mvumi_rsp_frame *ob_frame, struct mvumi_cmd *cmd)
+{
+	struct mvumi_sense_data *sense_buf;
+	if (ob_frame->req_status == SCSI_STATUS_GOOD)
+		cmd->cmd_status = REQ_STATUS_SUCCESS;
+	else if (ob_frame->req_status == SCSI_STATUS_BUSY)
+		cmd->cmd_status = REQ_STATUS_BUSY;
+	else if (ob_frame->req_status == SCSI_STATUS_CHECK_CONDITION) {
+		sense_buf = (struct mvumi_sense_data *)ob_frame->payload;
+
+		if ((sense_buf->sense_key == SCSI_SK_HARDWARE_ERROR) &&
+		    (sense_buf->additional_sense_code ==
+		     			SCSI_ASC_LOGICAL_UNIT_NOT_RESP_TO_SEL))
+			cmd->cmd_status = REQ_STATUS_NO_DEVICE;
+		else if (sense_buf->sense_key == SCSI_SK_ILLEGAL_REQUEST)
+			cmd->cmd_status = REQ_STATUS_INVALID_REQUEST;
+		else if (sense_buf->sense_key == SCSI_SK_VENDOR_SPECIFIC)
+			cmd->cmd_status = REQ_STATUS_ERROR;
+		else {
+			//mv_printk("get sense key = %X\n",
+			//	sense_buf->sense_key);
+			cmd->cmd_status = REQ_STATUS_ERROR_WITH_SENSE;
+			if ((cmd->scmd) /* os command */ &&
+			    ob_frame->rsp_flag & CL_RSP_FLAG_SENSEDATA)
+				memcpy(cmd->scmd->sense_buffer,
+				       ob_frame->payload,
+				       sizeof(struct mvumi_sense_data));
+		}
+	}
+	else
+		cmd->cmd_status = REQ_STATUS_ERROR;
+
+	if ((cmd->scmd) /* os command */ &&
+	    (ob_frame->rsp_flag & CL_RSP_FLAG_SENSEDATA) &&
+	    (ob_frame->req_status == SCSI_STATUS_CHECK_CONDITION)) {
+		memcpy(cmd->scmd->sense_buffer,
+		       ob_frame->payload, sizeof(struct mvumi_sense_data));
+	}
+	return;
+}
+static void mvumi_fire_cmd(struct mv_hba *mhba, struct mvumi_cmd *mvcmd);
+
+static u8 mvumi_handle_clob(struct mv_hba *mhba)
+{
+	struct mvumi_rsp_frame *ob_frame;
+	struct mvumi_cmd *cmd;
+	struct mv_ob_data_pool *pool;
+	while (!list_empty(&mhba->free_ob_list)) {
+		pool = list_get_first_entry(&mhba->free_ob_list,
+					  struct mv_ob_data_pool,
+					  queue_pointer);
+		
+		list_add_tail(&pool->queue_pointer, &mhba->ob_data_pool_list);
+
+		ob_frame = (struct mvumi_rsp_frame *)&pool->ob_data[0];
+		cmd = mhba->tag_cmd[ob_frame->tag];
+
+	    	//MV_ASSERT(cmd != 0);
+	    	if(cmd==NULL){
+			mv_printk(" got a TAG [%d] with NO command\n",ob_frame->tag);
+			return 0;
+	    		} else
+	    		atomic_dec(&mhba->fw_outstanding);
+		mhba->tag_cmd[ob_frame->tag] = 0;
+		tag_release_one(mhba, &mhba->tag_pool, ob_frame->tag);
+		mvumi_translate_status(ob_frame, cmd);
+		if ((cmd->cmd_status != REQ_STATUS_SUCCESS)
+		    && (cmd->frame->cdb[0] != INQUIRY)) {
+			//mvumi_dump_cmd_info(cmd->frame, MV_FALSE);
+			//mvumi_dump_ob_info(ob_frame);
+		}
+		/* Check is OS command or internal command */
+		if (cmd->scmd) {
+			if ((cmd->cmd_status == REQ_STATUS_SUCCESS)
+			    && (cmd->frame->cdb[0] == INQUIRY)) {
+			}
+
+#if 0
+			if (cmd->frame->cdb[0] == READ_CAPACITY) {
+				u32 *buffer;
+				struct scatterlist *sg =
+				    (struct scatterlist *)mv_rq_bf(cmd->scmd);
+				buffer = (u32 *) mvumi_sgd_kmap(sg, cmd);
+
+				mv_printk
+				    ("device %d read capacity size=0x%x,sector=0x%x.\n",
+				     cmd->frame->device_id, buffer[0],
+				     buffer[1]);
+				mvumi_sgd_kunmap(sg, cmd, buffer);
+			}
+#endif
+			mvumi_complete_cmd(mhba, cmd);
+		} else {
+			if (cmd->frame->cdb[0] == APICDB0_EVENT)
+				mvumi_notification(mhba, cmd->frame->cdb[1],
+						cmd->data_buf);
+			if (cmd->sync_cmd) {
+				cmd->sync_cmd = 0;
+				wake_up(&mhba->int_cmd_wait_q);
+			}
+			mvumi_complete_int_cmd(mhba, cmd);
+		}
+	}
+	mvumi_fire_cmd(mhba,NULL);
+	return 0;
+}
+
+EXPORT_SYMBOL(mvumi_handle_clob);
+
+/**
+ * mvumi_complete_cmd_dpc	 -	Returns FW's controller structure
+ * @instance_addr:			Address of adapter soft state
+ *
+ * Tasklet to complete cmds
+ */
+static void mvumi_complete_cmd_dpc(unsigned long instance_addr)
+{
+	u32 isr_bit, isr_status;
+	struct mv_hba *mhba = (struct mv_hba *)instance_addr;
+	unsigned long flags;
+	//void *regs = mhba->mmio;
+	/* If we have already declared adapter dead, donot complete cmds */
+	if (mhba->hw_crit_error)
+		return;
+
+	spin_lock_irqsave(&mhba->mv_isr_lock, flags);
+	isr_bit = mhba->global_isr;
+	isr_status = mhba->mv_isr_status;
+	mhba->global_isr = 0;
+	mhba->mv_isr_status = 0;
+	spin_unlock_irqrestore(&mhba->mv_isr_lock, flags);
+	if (!isr_bit){
+		return;
+	}
+	if (isr_bit & INT_MAP_DL_CPU2PCIEA) {
+		if (isr_status & DRBL_HANDSHAKE_ISR) {
+			mv_printk("Enter handler shake again!.\n");
+			mvumi_handshake(mhba);
+		}
+
+#ifdef SUPPORT_INTERNAL_REQ
+		if (isr_status & DRBL_BUS_CHANGE) {
+			mv_printk("DRBL_BUS_CHANGE isr\n");
+			/* reenumerate the bus by issuing INQUIRY commands
+			 * Need to get device id */
+			mvumi_launch_events(mhba, APICDB1_HOST_GETEVENT);
+		}
+		if (isr_status & DRBL_EVENT_NOTIFY)
+			mvumi_launch_events(mhba, APICDB1_EVENT_GETEVENT);
+#endif
+	}
+
+	if (isr_bit & INT_MAP_COMAERR) {
+		mv_printk( "firmware error.\n");
+	}
+	spin_lock_irqsave(&mhba->mv_timer_lock, flags);
+	if (isr_bit & INT_MAP_COMAOUT) {
+		mvumi_receive_ob_list_entry(mhba);
+	}
+	if (mhba->fw_state == FW_STATE_STARTED) {
+		mvumi_handle_clob(mhba);
+	}
+	spin_unlock_irqrestore(&mhba->mv_timer_lock, flags);
+	
+}
+
+static int mvumi_isr_handler(void *devp)
+{
+	struct mv_hba *mhba = (struct mv_hba *)devp;
+	/*
+	 * Check if it is our interrupt
+	 * Clear the interrupt
+	 */
+	if (mhba->instancet->clear_intr(mhba))
+		return IRQ_NONE;
+
+	if (mhba->hw_crit_error)
+		goto out_done;
+	#ifndef  SUPPORT_TASKLET
+	mvumi_complete_cmd_dpc((long)mhba);
+	#else
+	/*
+	 * Schedule the tasklet for cmd completion
+	 */
+	tasklet_schedule(&mhba->isr_tasklet);
+	#endif
+out_done:
+	return IRQ_HANDLED;
+
+}
+
+/**
+ * mvumi_isr_entry -	Processes all completed commands
+ * @devp:				Adapter soft state
+ */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19)
+static irqreturn_t mvumi_isr_entry(int irq, void *devp, struct pt_regs *regs)
+{
+	return mvumi_isr_handler(devp);
+}
+
+#else
+static irqreturn_t mvumi_isr_entry(int irq, void *devp)
+{
+	return mvumi_isr_handler(devp);
+}
+#endif /* #if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19) */
+
+static int mvumi_request_irq(struct mv_hba *mhba)
+{
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 19)
+	return request_irq(mhba->pdev->irq, mvumi_isr_entry, IRQF_SHARED,
+			   "mvumi", mhba);
+#else
+	return request_irq(mhba->pdev->irq, mvumi_isr_entry, SA_SHIRQ, "mvumi",
+			   mhba);
+#endif
+}
+
+static int mvumi_pre_init(struct mv_hba *mhba)
+{
+	mhba->handshake_page_base =
+			(void *)pci_alloc_consistent(mhba->pdev,
+				HSP_MAX_SIZE,
+				&mhba->handshake_page_phys_base);
+	if (!mhba->handshake_page_base) {
+		mv_printk(" Failed to allocate memory for handshake\n");
+		return -1;
+	}
+	return 0;
+}
+
+static int mvumi_set_hs_page(struct mv_hba *mhba)
+{
+	/*
+	* borrow InBound List memory for hand shake temporarily
+	* promise the page at same 512K rounding area.
+	*/
+	if (mhba->handshake_page_base)
+		pci_free_consistent(mhba->pdev,
+				    HSP_MAX_SIZE,
+				    mhba->handshake_page_base,
+				    mhba->handshake_page_phys_base);
+	mhba->handshake_page_base = mhba->ib_list;
+	mhba->handshake_page_phys_base = mhba->ib_list_phys;
+	return 0;
+}
+
+/**
+ * mvumi_init_data -	Initialize requested date for FW
+ */
+static int mvumi_init_data(struct mv_hba *mhba)
+{
+	struct mv_ob_data_pool *ob_pool;
+	struct mvumi_res_mgnt *res_mgnt;
+	struct mvumi_event_entry *event_pool;
+	u32 i;
+	u32 tmp_size, offset;
+	void *virmem;
+	dma_addr_t p;
+	void *v;
+	if (mhba->flag & MVUMI_FW_ALLOC)
+		return 0;
+	tmp_size=128+mhba->ib_max_entry_size_bytes * mhba->max_io +16 + sizeof(u32) ;
+	tmp_size+=8+mhba->ob_max_entry_size_bytes * mhba->max_io+4;
+	if(is_workround_dev(mhba)) {
+		tmp_size+=8+mhba->ib_max_entry_size_bytes *1;
+		tmp_size+=8+mhba->ob_max_entry_size_bytes *1;
+	}
+	res_mgnt = mvumi_alloc_mem_resource(mhba,
+			RESOURCE_UNCACHED_MEMORY, tmp_size);
+	if (!res_mgnt) {
+		mv_printk(" Failed to allocate memory for inbound list\n");
+		goto fail_alloc_dma_buf;
+	}
+
+	//ib_list
+	p=res_mgnt->bus_addr;
+	v=res_mgnt->virt_addr;
+	offset = ROUNDING(res_mgnt->bus_addr, 128) - res_mgnt->bus_addr;
+	p+=offset;
+	v=(u8 *)v+offset;
+ 	mhba->ib_list = (u8 *)v;
+ 	mhba->ib_list_phys = p;
+	//ib_shadow
+	v=(u8 *)v+mhba->ib_max_entry_size_bytes * mhba->max_io;
+	p=p+mhba->ib_max_entry_size_bytes * mhba->max_io;
+	if(is_workround_dev(mhba)) {
+		v=(u8 *)v+mhba->ib_max_entry_size_bytes * 1;
+		p=p+mhba->ib_max_entry_size_bytes * 1;
+	}
+
+	offset = ROUNDING(p, 8) - p;
+	p+=offset;
+	v=(u8 *)v+offset;
+	mhba->ib_shadow =(u8 *)v;
+	mhba->ib_shadow_phys =p;
+	//ob_shadow
+	p+=sizeof(u32);
+	v=(u8 *)v+sizeof(u32);
+	if(!IS_CHIP_8180(mhba)){
+		offset = ROUNDING(p, 4) - p;
+		p+=offset;
+		v=(u8 *)v+offset;
+		mhba->ob_shadow=v;
+		mhba->ob_shadow_phys=p;
+		p+=4;
+		v=(u8 *)v+4;
+		} else{
+		offset = ROUNDING(p,8) - p;
+		p+=offset;
+		v=(u8 *)v+offset;
+		mhba->ob_shadow=v;
+		mhba->ob_shadow_phys=p;
+		p+=8;
+		v=(u8 *)v+8;
+			}
+	mhba->ob_list=v;
+	mhba->ob_list_phys=p;
+	tmp_size = sizeof(struct mv_ob_data_pool) * mhba->max_io + 8;
+	res_mgnt = mvumi_alloc_mem_resource(mhba,
+			RESOURCE_CACHED_MEMORY, tmp_size);
+	if (!res_mgnt) {
+		mv_printk(" Failed to allocate memory for"
+			  " outbound data buffer\n");
+		goto fail_alloc_dma_buf;
+	}
+	virmem = res_mgnt->virt_addr;
+	for (i = mhba->max_io; i != 0; i--) {
+		ob_pool = (struct mv_ob_data_pool *)virmem;
+		list_add_tail(&ob_pool->queue_pointer,
+			      &mhba->ob_data_pool_list);
+		virmem = (u8 *) virmem + sizeof(struct mv_ob_data_pool);
+	}
+
+#ifdef SUPPORT_EVENT
+	/* event buffer */
+	tmp_size = sizeof(struct mvumi_event_entry) * MAX_EVENTS;
+	res_mgnt = mvumi_alloc_mem_resource(mhba,
+			RESOURCE_CACHED_MEMORY, tmp_size);
+	if (!res_mgnt) {
+		mv_printk(" Failed to allocate memory for "
+			  "mvumi_event_entry.\n");
+		goto fail_alloc_dma_buf;
+	}
+	virmem = res_mgnt->virt_addr;
+	mhba->num_stored_events = 0;
+	mhba->num_pool_events = 0;
+	for (i = 0; i < MAX_EVENTS; i++) {
+		event_pool = (struct mvumi_event_entry *)virmem;
+		list_add_tail(&event_pool->queue_pointer, &mhba->free_events);
+		virmem = (u8 *) virmem + sizeof(struct mvumi_event_entry);
+	}
+#endif /* #ifdef SUPPORT_EVENT */
+
+#ifdef SUPPORT_INTERNAL_REQ
+	/* Internal Request DataBuffer */
+	mhba->int_req_size = SECTOR_LENGTH * MAX_INTERNAL_REQ;
+	tmp_size = mhba->int_req_size * 2 + 8;
+
+	res_mgnt = mvumi_alloc_mem_resource(mhba,
+				RESOURCE_UNCACHED_MEMORY, tmp_size);
+	if (!res_mgnt) {
+		mv_printk(" Failed to allocate memory for "
+			  "internal request buffer\n");
+		mhba->int_req_size = 0;
+		goto fail_alloc_dma_buf;
+	}
+	offset = ROUNDING(res_mgnt->bus_addr, 8) - res_mgnt->bus_addr;
+	mhba->int_req_buf = (u8 *) res_mgnt->virt_addr + offset;
+	mhba->int_req_phys = res_mgnt->bus_addr + offset;
+	mhba->event_int_req_buf = mhba->int_req_buf + mhba->int_req_size;
+	mhba->event_int_req_phys = res_mgnt->bus_addr + mhba->int_req_size;
+#endif
+
+	/* initialize tag stack */
+	mhba->tag_pool.stack = (u16 *) mhba->tag_num;
+	mhba->tag_pool.size = (mhba->max_io + MAX_INTERNAL_REQ);
+	tag_init(&mhba->tag_pool, (mhba->max_io + MAX_INTERNAL_REQ));
+	mhba->flag |= MVUMI_FW_ALLOC;
+	
+	return 0;
+
+fail_alloc_dma_buf:
+	mvumi_release_mem_resource(mhba);
+	return -1;
+
+}
+#if 0
+static void dwordcpy(void * to, const void * from, size_t n)
+{
+        u32 *p_dst=(u32*)to;
+        u32 *p_src=(u32*)from;
+        n/=sizeof(u32);
+        while(n--)
+                *p_dst++=*p_src++;
+}
+#endif
+static void mvumi_handle_timer(struct mvumi_cmd *cmd)
+	{
+        struct mv_hba *mhba=cmd->mhba;
+        unsigned long flags;
+        if((mhba->fw_state==FW_STATE_STARTED)&&(atomic_read( &mhba->fw_outstanding)))
+        {
+        	    mv_printk("%s:%d outstanding=%d\n",__FUNCTION__,__LINE__,atomic_read( &mhba->fw_outstanding));
+                spin_lock_irqsave(&mhba->mv_timer_lock, flags);
+                mvumi_receive_ob_list_entry(mhba);
+                mvumi_handle_clob(mhba);
+                spin_unlock_irqrestore(&mhba->mv_timer_lock, flags);
+         }
+        return ;
+}
+
+/**
+ * mvumi_fire_cmd -	Sends command to the FW
+ */
+static enum MV_QUEUE_COMMAND_RESULT
+mvumi_send_command(struct mv_hba *mhba, struct mvumi_cmd *cmd)
+{
+	void *ib_entry;
+	struct mvumi_msg_frame *ib_frame;
+	ib_frame = cmd->frame;
+	if (mhba->fw_state != FW_STATE_STARTED) {
+		mv_printk("firmware not ready.\n");
+		//MV_ASSERT(0);
+		return MV_QUEUE_COMMAND_RESULT_NO_RESOURCE;
+	}
+
+	if (tag_is_empty(&mhba->tag_pool)){
+		mv_printk("no free tag.\n");
+		return MV_QUEUE_COMMAND_RESULT_NO_RESOURCE;
+	}
+	if (mvumi_get_ib_list_entry(mhba, &ib_entry)){
+		//mv_printk("mvumi_get_ib_list_entry failed.\n");
+		return MV_QUEUE_COMMAND_RESULT_NO_RESOURCE;
+	}
+
+	cmd->frame->tag = tag_get_one(mhba, &mhba->tag_pool);
+//	mvumi_dump_cmd_info(cmd->frame, MV_FALSE);
+	mvumi_add_timer(&cmd->eh_timer,5,(void *)mvumi_handle_timer,(long)cmd);
+	mhba->tag_cmd[cmd->frame->tag] = cmd;
+	memcpy(ib_entry, ib_frame, mhba->ib_max_entry_size_bytes);
+	//dwordcpy(ib_entry, ib_frame, mhba->ib_max_entry_size_bytes);
+	//tmp=(struct mvumi_msg_frame *)(ib_entry);
+	//tmp->tag=ib_frame->tag;
+	/* Request is sent to the hardware and not finished yet. */
+	return MV_QUEUE_COMMAND_RESULT_SENT;
+
+}
+
+static void mvumi_fire_cmd(struct mv_hba *mhba, struct mvumi_cmd *mvcmd)
+{
+	u16 num_of_cl_sent = 0;
+	struct mvumi_cmd *cmd=mvcmd;
+	unsigned long flags;
+	enum MV_QUEUE_COMMAND_RESULT result;
+	
+	spin_lock_irqsave(&mhba->mv_waiting_req_lock,flags);
+	if(cmd){
+		list_add_tail(&cmd->queue_pointer, &mhba->waiting_req_list);
+		}
+
+
+	while (!list_empty(&mhba->waiting_req_list)) {
+		cmd = list_get_first_entry(&mhba->waiting_req_list,
+					 struct mvumi_cmd, queue_pointer);
+		result = mvumi_send_command(mhba, cmd);
+		switch (result) {
+		case MV_QUEUE_COMMAND_RESULT_SENT:
+			num_of_cl_sent++;
+			break;
+		case MV_QUEUE_COMMAND_RESULT_FINISHED:
+			mvumi_complete_cmd(mhba, cmd);
+			break;
+		case MV_QUEUE_COMMAND_RESULT_FULL:
+		case MV_QUEUE_COMMAND_RESULT_NO_RESOURCE:
+			list_add(&cmd->queue_pointer, &mhba->waiting_req_list);
+			if (num_of_cl_sent > 0) {
+				mvumi_send_ib_list_entry(mhba);
+			}
+			spin_unlock_irqrestore(&mhba->mv_waiting_req_lock,flags);
+			return;
+		}
+	}
+	if (num_of_cl_sent > 0) {
+		mvumi_send_ib_list_entry(mhba);
+	}
+	spin_unlock_irqrestore(&mhba->mv_waiting_req_lock,flags);
+}
+
+/**
+ * mvumi_enable_intr -	Enables interrupts
+ * @regs:			FW register set
+ */
+static void mvumi_enable_intr(void *regs)
+{
+	u32 mask;
+	mw32(CPU_ARM_TO_PCIEA_MASK_REG, 0x3FFFFFFF);
+
+	mask = mr32(CPU_ENPOINTA_MASK_REG);
+	mask |= INT_MAP_DL_CPU2PCIEA | INT_MAP_COMAOUT | INT_MAP_COMAERR;
+	mw32(CPU_ENPOINTA_MASK_REG, mask);
+
+}
+
+/**
+ * mvumi_disable_intr -Disables interrupt
+ * @regs:			FW register set
+ */
+static void mvumi_disable_intr(void *regs)
+{
+	u32 mask;
+	mw32(CPU_ARM_TO_PCIEA_MASK_REG, 0);
+
+	mask = mr32(CPU_ENPOINTA_MASK_REG);
+	mask &= ~(INT_MAP_DL_CPU2PCIEA | INT_MAP_COMAOUT | INT_MAP_COMAERR);
+	mw32(CPU_ENPOINTA_MASK_REG, mask);
+}
+
+/**
+ * mvumi_clear_intr -	Check & clear interrupt
+ * @regs:				FW register set
+ */
+static int mvumi_clear_intr(void *extend)
+{
+	struct mv_hba *mhba = (struct mv_hba *)extend;
+	u32 status, isr_status = 0,tmp=0;
+	unsigned long flags;
+
+	void *regs = mhba->mmio;
+	/*
+	 * Check if it is our interrupt
+	 */
+	status = mr32(CPU_MAIN_INT_CAUSE_REG);
+
+	if (!(status & INT_MAP_MU)) {
+		return 1;
+	}
+
+	if (status & INT_MAP_COMAERR) {
+		/* Clear ISR */
+		tmp = mr32(CLA_ISR_CAUSE);
+		if (tmp & (CLIC_IN_ERR_IRQ | CLIC_OUT_ERR_IRQ)) {
+			mw32(CLA_ISR_CAUSE,
+			     (tmp &
+			      (CLIC_IN_ERR_IRQ | CLIC_OUT_ERR_IRQ)));
+		}
+	} 
+	if (status & INT_MAP_COMAOUT) {
+		/* Clear ISR */
+		tmp = mr32(CLA_ISR_CAUSE);
+		if (tmp & CLIC_OUT_IRQ) {
+			mw32(CLA_ISR_CAUSE, (tmp & CLIC_OUT_IRQ));
+		}
+	} 
+	if (status & INT_MAP_DL_CPU2PCIEA) {
+		/* Clear ISR */
+		isr_status = mr32(CPU_ARM_TO_PCIEA_DRBL_REG);
+		if (isr_status) {
+			mw32(CPU_ARM_TO_PCIEA_DRBL_REG, isr_status);
+		}
+	} 
+
+	spin_lock_irqsave(&mhba->mv_isr_lock, flags);
+	mhba->global_isr = status;
+	mhba->mv_isr_status = isr_status;
+	spin_unlock_irqrestore(&mhba->mv_isr_lock, flags);
+
+	/*
+	 * Clear the interrupt by writing back the same value
+	 */
+	//mw32(CPU_MAIN_INT_CAUSE_REG, status);
+
+	return 0;
+}
+
+/**
+ * mvumi_read_fw_status_reg - returns the current FW status value
+ * @regs:			FW register set
+ */
+static u32 mvumi_read_fw_status_reg(void *regs)
+{
+	u32 status;
+	status = mr32(CPU_ARM_TO_PCIEA_DRBL_REG);
+	if (status)
+		mw32(CPU_ARM_TO_PCIEA_DRBL_REG, status);
+
+	return status;
+}
+
+static struct mvumi_instance_template mvumi_instance_template = {
+	.fire_cmd = mvumi_fire_cmd,
+	.enable_intr = mvumi_enable_intr,
+	.disable_intr = mvumi_disable_intr,
+	.clear_intr = mvumi_clear_intr,
+	.read_fw_status_reg = mvumi_read_fw_status_reg,
+};
+
+static int mvumi_slave_configure(struct scsi_device *sdev)
+{
+	/* FIXED ME */
+	return 0;
+}
+
+/**
+ * mvumi_build_frame -	Prepares a direct cdb (DCDB) command
+ * @lhba:		Adapter soft state
+ * @scmd:		SCSI command
+ * @cmd:		Command to be prepared in
+ *
+ * This function prepares CDB commands. These are typcially pass-through
+ * commands to the devices.
+ */
+static u8
+mvumi_build_frame(struct mv_hba *mhba, struct scsi_cmnd *scmd,
+		  struct mvumi_cmd *cmd)
+{
+	struct mvumi_msg_frame *pframe;
+	u32 max_sg_len = mhba->ib_max_entry_size_bytes -
+				sizeof(struct mvumi_msg_frame) + 4;
+	cmd->scmd = scmd;
+	cmd->mhba = mhba;
+	cmd->cmd_status = REQ_STATUS_PENDING;
+	pframe = cmd->frame;
+	pframe->device_id = MVUMI_DEV_INDEX(mv_scmd_target(scmd),
+					    mv_scmd_lun(scmd));
+
+	/*
+	 * Set three flags: CMD_FLAG_NON_DATA
+	 *                  CMD_FLAG_DATA_IN
+	 *                  CMD_FLAG_DMA
+	 * currently data in/out all go thru DMA
+	 */
+	pframe->cmd_flag = 0;
+	switch (scmd->sc_data_direction) {
+	case DMA_NONE:
+		pframe->cmd_flag |= CMD_FLAG_NON_DATA;
+		break;
+	case DMA_FROM_DEVICE:
+		pframe->cmd_flag |= CMD_FLAG_DATA_IN;
+		break;
+	case DMA_TO_DEVICE:
+		pframe->cmd_flag |= CMD_FLAG_DATA_OUT;
+		break;
+	case DMA_BIDIRECTIONAL:
+		mv_printk( "mvumi : unexpected DMA_BIDIRECTIONAL.\n");
+		break;
+	default:
+		break;
+	}
+
+	pframe->cdb_length = scmd->cmd_len;
+	memcpy(pframe->cdb, scmd->cmnd, pframe->cdb_length);
+	pframe->req_function = CL_FUN_SCSI_CMD;
+
+	/*
+	 * Construct SGL
+	 */
+	pframe->sg_counts =
+			(u8) mvumi_make_sgl(mhba, scmd, &pframe->payload[0]);
+	pframe->data_transfer_length = mv_rq_bf_l(scmd);
+	if ((u32) pframe->sg_counts * sizeof(struct mv_sgl) > max_sg_len) {
+		mv_printk("SG counts %d is too large, max_sg_len is %d.\n",
+			  pframe->sg_counts, max_sg_len);
+		return 0;
+	}
+
+	return -1;
+}
+
+/**
+ * mvumi_queue_command -	Queue entry point
+ * @scmd:			SCSI command to be queued
+ * @done:			Callback entry point
+ */
+static int
+mvumi_queue_command(struct scsi_cmnd *scmd, void (*done) (struct scsi_cmnd *))
+{
+	struct mvumi_cmd *cmd;
+	struct mv_hba *mhba;
+	mhba = (struct mv_hba *)
+	    scmd->device->host->hostdata;
+	/* Don't process if we have already declared adapter dead */
+	if (mhba->hw_crit_error)
+		return SCSI_MLQUEUE_HOST_BUSY;
+
+
+	scmd->scsi_done = done;
+	scmd->result = 0;
+
+	if (MVUMI_DEV_INDEX(mv_scmd_target(scmd), mv_scmd_lun(scmd))
+				> mhba->max_target_id ||
+				mv_scmd_channel(scmd)) {
+		scmd->result = DID_BAD_TARGET << 16;
+		goto out_done;
+	}
+
+#if 1
+/* workround for VILI : not support REPORT_LUNS */
+	if((scmd->cmnd[0] == REPORT_LUNS) && (IS_CHIP_VILI(mhba))){
+		scmd->result = DID_BAD_TARGET << 16;
+		goto out_done;
+	}
+#endif
+
+
+	cmd = mvumi_get_cmd(mhba);
+	if (!cmd)
+		return SCSI_MLQUEUE_HOST_BUSY;
+
+	/* build firmware frame */
+	if (!mvumi_build_frame(mhba, scmd, cmd))
+		goto out_return_cmd;
+
+	cmd->scmd = scmd;
+	scmd->SCp.ptr = (char *)cmd;
+
+	/*
+	 * Issue the command to the FW
+	 */
+	mhba->instancet->fire_cmd(mhba, cmd);
+	return 0;
+
+out_return_cmd:
+	mvumi_return_cmd(mhba, cmd);
+out_done:
+	done(scmd);
+	return 0;
+}
+
+/**
+ * mvumi_reset_device -	Device reset handler entry point
+ */
+static int mvumi_reset_device(struct scsi_cmnd *scmd)
+{
+	int ret;
+	mv_printk("line %d: %s.\n", __LINE__, __FUNCTION__);
+	/*
+	 * First wait for all commands to complete
+	 */
+	ret = mvumi_generic_reset(scmd);
+
+	return ret;
+}
+
+/**
+ * mvumi_reset_bus_host -	Bus & host reset handler entry point
+ */
+static int mvumi_reset_bus_host(struct scsi_cmnd *scmd)
+{
+	int ret;
+	mv_printk("line %d: %s.\n", __LINE__, __FUNCTION__);
+
+	/*
+	 * First wait for all commands to complete
+	 */
+	ret = mvumi_generic_reset(scmd);
+
+	return ret;
+}
+
+/**
+ * mvumi_reset_timer - quiesce the adapter if required
+ * @scmd:		scsi cmnd
+ *
+ * Sets the FW busy flag and reduces the host->can_queue if the
+ * cmd has not been completed within the timeout period.
+ */
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28)
+static enum scsi_eh_timer_return mvumi_reset_timer(struct scsi_cmnd *scmd)
+#else
+static enum blk_eh_timer_return mvumi_reset_timer(struct scsi_cmnd* scmd)
+#endif
+{
+	struct mvumi_cmd *cmd = (struct mvumi_cmd *)scmd->SCp.ptr;
+	struct mv_hba *mhba;
+	unsigned long flags;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 10)
+	if (time_after(jiffies, jiffies +
+		       (MVUMI_DEFAULT_CMD_TIMEOUT * 2) * HZ)) {
+		return EH_NOT_HANDLED;
+	}
+#else
+	if (time_after(jiffies, scmd->jiffies_at_alloc +
+		       (MVUMI_DEFAULT_CMD_TIMEOUT * 2) * HZ)) {
+		#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28)
+			return BLK_EH_NOT_HANDLED;
+		#else
+			return EH_NOT_HANDLED;
+		#endif
+	}
+#endif
+	mhba = cmd->mhba;
+	spin_lock_irqsave(&mhba->mv_timer_lock, flags);
+	if (cmd->cmd_status == REQ_STATUS_PENDING){
+               
+		if(mhba->tag_cmd[cmd->frame->tag]){
+			mhba->tag_cmd[cmd->frame->tag] = 0;
+			tag_release_one(mhba, &mhba->tag_pool, cmd->frame->tag);
+		}
+		mv_printk("reset timer :a command faild\n");
+		spin_lock(&mhba->mv_waiting_req_lock);
+		if(cmd->queue_pointer.next!=LIST_POISON1 && cmd->queue_pointer.prev!=LIST_POISON2			
+			&&cmd->queue_pointer.next!=&cmd->queue_pointer && cmd->queue_pointer.prev!=&cmd->queue_pointer
+				&&cmd->queue_pointer.prev!=NULL && cmd->queue_pointer.next!=NULL)
+			{
+				mv_printk("TIMEOUT:A command doesn't send!\n");
+				list_del_init(&cmd->queue_pointer);
+			} else
+				atomic_dec(&mhba->fw_outstanding);		
+		spin_unlock(&mhba->mv_waiting_req_lock);
+		mvumi_complete_cmd(mhba, cmd);      
+	}
+	spin_unlock_irqrestore(&mhba->mv_timer_lock, flags);
+	if (!(mhba->flag & MVUMI_FW_BUSY)) {
+		/* FW is busy, throttle IO */
+		spin_lock_irqsave(mhba->shost->host_lock, flags);
+
+		mhba->last_time = jiffies;
+		mhba->flag |= MVUMI_FW_BUSY;
+
+		spin_unlock_irqrestore(mhba->shost->host_lock, flags);
+	}
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28)
+	return EH_RESET_TIMER;
+#else
+	return BLK_EH_RESET_TIMER;
+#endif
+}
+
+/**
+ * mvumi_bios_param - Returns disk geometry for a disk
+ * @sdev: 		device handle
+ * @bdev:		block device
+ * @capacity:		drive capacity
+ * @geom:		geometry parameters
+ */
+static int
+mvumi_bios_param(struct scsi_device *sdev, struct block_device *bdev,
+		 sector_t capacity, int geom[])
+{
+	int heads;
+	int sectors;
+	sector_t cylinders;
+	unsigned long tmp;
+	/* Default heads (64) & sectors (32) */
+	heads = 64;
+	sectors = 32;
+
+	tmp = heads * sectors;
+	cylinders = capacity;
+
+	sector_div(cylinders, tmp);
+
+	/*
+	 * Handle extended translation size for logical drives > 1Gb
+	 */
+
+	if (capacity >= 0x200000) {
+		heads = 255;
+		sectors = 63;
+		tmp = heads * sectors;
+		cylinders = capacity;
+		sector_div(cylinders, tmp);
+	}
+
+	geom[0] = heads;
+	geom[1] = sectors;
+	geom[2] = cylinders;
+
+	return 0;
+}
+
+/*
+ * Scsi host template for marvell raid sas driver
+ */
+static struct scsi_host_template mvumi_template = {
+
+	.module = THIS_MODULE,
+	.name = "Marvell Storage Controller",
+	.slave_configure = mvumi_slave_configure,
+	.queuecommand = mvumi_queue_command,
+	.eh_device_reset_handler = mvumi_reset_device,
+	.eh_bus_reset_handler = mvumi_reset_bus_host,
+	.eh_host_reset_handler = mvumi_reset_bus_host,
+#if  LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 7) && \
+     LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 16)
+	.eh_timed_out = mvumi_reset_timer,
+#endif
+	.bios_param = mvumi_bios_param,
+	//.can_queue                   =  MVUMI_MAX_REQUEST_NUMBER,
+	//.this_id                     =  MVUMI_DEFAULT_INIT_ID,
+	//.max_sectors                 =  (MVUMI_MAX_REQUEST_NUMBER * PAGE_SIZE)/SECTOR_LENGTH,
+	//.sg_tablesize                =  MVUMI_MAX_SG_ENTRY,
+	//.cmd_per_lun                 =  MVUMI_MAX_REQUEST_PER_LUN,
+	// .use_clustering              =  MVUMI_USE_CLUSTERING,
+	//.emulated                    =  MVUMI_EMULATED,
+};
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 15)
+static struct scsi_transport_template mvumi_transport_template = {
+	.eh_timed_out = mvumi_reset_timer,
+};
+#endif /* LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 16) */
+
+/**
+ * mvumi_init_fw -	Initializes the FW
+ * @lhba:		Adapter soft state
+ *
+ * This is the main function for initializing firmware.
+ */
+static int mvumi_init_fw(struct mv_hba *mhba)
+{
+	/*
+	 * Map the message registers
+	 */
+	if (pci_request_regions(mhba->pdev, MV_DRIVER_NAME)) {
+		mv_printk(" IO memory region busy!\n");
+		return -EBUSY;
+	}
+	if (mvumi_map_pci_addr(mhba->pdev, mhba->base_addr))
+		goto fail_ioremap;
+
+	mhba->mmio = mhba->base_addr[0];
+	mhba->chip_device_id = mhba->pdev->device;	/* check device id for different product */
+	switch (mhba->pdev->device) {
+	case PCI_DEVICE_ID_MARVELL_MV8120:
+	case PCI_DEVICE_ID_MARVELL_MV8110:
+		mhba->hba_capability = 0;
+		mhba->instancet = &mvumi_instance_template;
+		mhba->max_num_sge = MVUMI_MAX_SG_ENTRY;
+		mhba->max_transfer_size = MVUMI_MAX_TRANSFER_SIZE;
+		mhba->max_target_id = 1;
+		mhba->max_io = 1;
+		mhba->list_num_io = 1;
+		mhba->max_int_io = 1;
+
+		break;
+	default:
+		mv_printk(" device 0x%x not supported !\n",
+		       mhba->pdev->device);
+		mhba->instancet = NULL;
+		goto	fail_device_id;
+	}
+	mv_printk("DEVICE_ID_%04X is found.\n", mhba->pdev->device);
+	mhba->ib_max_entry_size_bytes = CL_IN_ENTRY_SIZE;
+	mhba->ob_max_entry_size_bytes = CL_OUT_ENTRY_SIZE;
+	mhba->ib_max_entry_size_setting = CL_IN_ENTRY_SIZE_SETTING;
+	mhba->ob_max_entry_size_setting = CL_OUT_ENTRY_SIZE_SETTING;
+	mv_printk("ib max=%d ob max=%d\n",CL_IN_ENTRY_SIZE,CL_OUT_ENTRY_SIZE);
+	mv_printk("ib max seting=%d ob max seting=%d\n",CL_IN_ENTRY_SIZE_SETTING,CL_OUT_ENTRY_SIZE_SETTING);
+	if (mvumi_pre_init(mhba))
+		goto fail_init_data;
+
+	/*
+	* Get sizes, so initialize FW data
+	*/
+	if(mvumi_init_data(mhba))
+		goto fail_init_data;
+	/*
+	 * We expect the FW state to be READY
+	 */
+	if (mvumi_start(mhba))
+		goto fail_ready_state;
+
+	mvumi_set_hs_page(mhba);
+
+	/*
+	 * Create a pool of commands
+	 */
+	if (mvumi_alloc_cmds(mhba))
+		goto fail_alloc_cmds;
+
+#if defined(SUPPORT_INTERNAL_REQ)
+	/*
+	 * Create a pool of int commands
+	 */
+	if (mvumi_alloc_int_cmds(mhba))
+		goto fail_alloc_int_cmds;
+#endif
+#ifdef  SUPPORT_TASKLET
+
+	/*
+	 * Setup tasklet for cmd completion
+	 */
+
+	tasklet_init(&mhba->isr_tasklet, mvumi_complete_cmd_dpc,
+		     (unsigned long)mhba);
+#endif
+
+	return 0;
+
+fail_alloc_int_cmds:
+	mvumi_free_cmds(mhba);
+
+fail_alloc_cmds:
+fail_ready_state:
+	mvumi_release_mem_resource(mhba);
+fail_init_data:
+fail_device_id:
+	mvumi_unmap_pci_addr(mhba->pdev, mhba->base_addr);
+fail_ioremap:
+	pci_release_regions(mhba->pdev);
+
+	return -EINVAL;
+}
+
+/**
+ * mvumi_io_attach -	Attaches this driver to SCSI mid-layer
+ * @lhba:		Adapter soft state
+ */
+static int mvumi_io_attach(struct mv_hba *mhba)
+{
+	struct Scsi_Host *host = mhba->shost;
+
+	/*
+	 * Export parameters required by SCSI mid-layer
+	 */
+	host->irq = mhba->pdev->irq;
+	host->unique_id = mhba->unique_id;
+	host->can_queue = (mhba->max_io - 1) ? (mhba->max_io - 1) : 1;
+	host->this_id = mhba->init_id;
+	host->sg_tablesize = mhba->max_num_sge;
+	host->max_sectors = mhba->max_transfer_size / SECTOR_LENGTH;
+	host->cmd_per_lun =  (mhba->max_io - 1) ? (mhba->max_io - 1) : 1;
+	host->max_channel = MVUMI_MAX_CHANNELS;
+	host->max_id = mhba->max_target_id;
+	host->max_lun = MVUMI_MAX_LUN;
+	host->max_cmd_len = 16;
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 15)
+	host->transportt = &mvumi_transport_template;
+#endif /* LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 16) */
+
+	/*
+	 * Notify the mid-layer about the new controller
+	 */
+	if (scsi_add_host(host, &mhba->pdev->dev)) {
+		mv_printk(" scsi_add_host failed\n");
+		return -ENODEV;
+	}
+
+	/*
+	 * Trigger SCSI to scan our drives
+	 */
+	scsi_scan_host(host);
+	mhba->flag |= MVUMI_FW_ATTACH;
+	return 0;
+}
+/**
+ * mvumi_probe_one -	PCI hotplug entry point
+ * @pdev:		PCI device structure
+ * @id:			PCI ids of supported hotplugged adapter
+ */
+static int __devinit
+mvumi_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
+{
+	int rval;
+	struct Scsi_Host *host;
+	struct mv_hba *mhba;
+
+	/*
+	 * Announce PCI information
+	 */
+	mv_printk(" %#4.04x:%#4.04x:%#4.04x:%#4.04x: ",
+		  pdev->vendor, pdev->device, pdev->subsystem_vendor,
+		  pdev->subsystem_device);
+
+	mv_printk("bus %d:slot %d:func %d\n",
+		  pdev->bus->number, PCI_SLOT(pdev->devfn),
+		  PCI_FUNC(pdev->devfn));
+
+	/*
+	 * PCI prepping: enable device set bus mastering and dma mask
+	 */
+	rval = pci_enable_device(pdev);
+
+	if (rval) {
+		return rval;
+	}
+
+	pci_set_master(pdev);
+
+	/*
+	 * All our contollers are capable of performing 64-bit DMA
+	 */
+	if (IS_DMA64) {
+		if (pci_set_dma_mask(pdev, DMA_64BIT_MASK) != 0) {
+
+			if (pci_set_dma_mask(pdev, DMA_32BIT_MASK) != 0)
+				goto fail_set_dma_mask;
+		}
+	} else {
+		if (pci_set_dma_mask(pdev, DMA_32BIT_MASK) != 0)
+			goto fail_set_dma_mask;
+	}
+
+	host = scsi_host_alloc(&mvumi_template, sizeof(struct mv_hba));
+
+	if (!host) {
+		mv_printk(" scsi_host_alloc failed\n");
+		goto fail_alloc_instance;
+	}
+
+	mhba = (struct mv_hba *)host->hostdata;
+	memset(mhba, 0, sizeof(*mhba));
+	/*
+	 * Initialize locks and queues
+	 */
+	INIT_LIST_HEAD(&mhba->cmd_pool);
+#if defined(SUPPORT_INTERNAL_REQ)
+	INIT_LIST_HEAD(&mhba->int_cmd_pool);
+#endif
+
+	INIT_LIST_HEAD(&mhba->ob_data_pool_list);
+	INIT_LIST_HEAD(&mhba->free_ob_list);
+	INIT_LIST_HEAD(&mhba->res_list);
+	INIT_LIST_HEAD(&mhba->waiting_req_list);
+	INIT_LIST_HEAD(&mhba->complete_req_list);
+	INIT_LIST_HEAD(&mhba->stored_events);
+	INIT_LIST_HEAD(&mhba->free_events);
+	INIT_LIST_HEAD(&mhba->events_pool);
+	atomic_set(&mhba->fw_outstanding, 0);
+
+#if defined(SUPPORT_INTERNAL_REQ)
+	init_waitqueue_head(&mhba->int_cmd_wait_q);
+#endif
+	init_waitqueue_head(&mhba->abort_cmd_wait_q);
+	init_waitqueue_head(&mhba->handshake_wait_q);
+
+	init_completion(&mhba->handshake_cmpl);
+	init_timer(&mhba->hs_timer);
+
+	spin_lock_init(&mhba->cmd_pool_lock);
+#if defined(SUPPORT_INTERNAL_REQ)
+	spin_lock_init(&mhba->int_cmd_pool_lock);
+	spin_lock_init(&mhba->event_list_lock);
+#endif
+	spin_lock_init(&mhba->mv_isr_lock);
+	spin_lock_init(&mhba->mv_tag_lock);
+	spin_lock_init(&mhba->mv_timer_lock);
+	sema_init(&mhba->ioctl_sem, MVUMI_INT_CMDS);
+	mutex_init(&mhba->sas_discovery_mutex);
+	spin_lock_init(&mhba->mv_waiting_req_lock);
+	/*
+	 * Initialize PCI related and misc parameters
+	 */
+	mhba->pdev = pdev;
+	mhba->shost = host;
+	mhba->unique_id = pdev->bus->number << 8 | pdev->devfn;
+	mhba->init_id = MVUMI_DEFAULT_INIT_ID;
+
+	mhba->flag = 0;
+	mhba->last_time = 0;
+	mhba->adapter_number = 0;
+
+	/*
+	 * Initialize Firmware
+	 */
+	if (mvumi_init_fw(mhba))
+		goto fail_init_fw;
+	/*
+	 * Register IRQ
+	 */
+	if (mvumi_request_irq(mhba)) {
+		mv_printk(" Failed to register IRQ\n");
+		goto fail_irq;
+	}
+	/* Enable hba interrupt */
+	mhba->instancet->enable_intr(mhba->mmio);
+
+	/*
+	 * Store mhba in PCI softstate
+	 */
+	pci_set_drvdata(pdev, mhba);
+
+	/*
+	 * Add this controller to mvumi_mgmt_info structure so that it
+	 * can be exported to management applications
+	 */
+	mvumi_mgmt_info.count++;
+	mvumi_mgmt_info.mhba[mvumi_mgmt_info.max_index] = mhba;
+	mvumi_mgmt_info.max_index++;
+
+#ifdef SUPPORT_INTERNAL_REQ
+	/*
+	 * get & clearup original hotplug events.
+	 */
+	mvumi_get_event(mhba, APICDB1_HOST_GETEVENT);
+#endif
+	/*
+	 * Register with SCSI mid-layer
+	 */
+	if (mvumi_io_attach(mhba))
+		goto fail_io_attach;
+	mv_printk("probe mvumi driver successfully.\n");
+	return 0;
+	
+fail_io_attach:
+	mvumi_mgmt_info.count--;
+	mvumi_mgmt_info.mhba[mvumi_mgmt_info.max_index] = NULL;
+	mvumi_mgmt_info.max_index--;
+
+	pci_set_drvdata(pdev, NULL);
+	mhba->instancet->disable_intr(mhba->mmio);
+	free_irq(mhba->pdev->irq, mhba);
+
+	mvumi_release_fw(mhba);
+
+fail_irq:
+fail_init_fw:
+	scsi_host_put(host);
+
+fail_alloc_instance:
+fail_set_dma_mask:
+	pci_disable_device(pdev);
+
+	return -ENODEV;
+}
+
+/**
+ * mvumi_detach_one -	PCI hot"un"plug entry point
+ * @pdev:		PCI device structure
+ */
+static void mvumi_detach_one(struct pci_dev *pdev)
+{
+	int i;
+	struct Scsi_Host *host;
+	struct mv_hba *mhba;
+	mhba = pci_get_drvdata(pdev);
+	host = mhba->shost;
+	scsi_remove_host(mhba->shost);
+	mvumi_flush_cache(mhba);
+	mvumi_shutdown_controller(mhba);
+	#ifdef  SUPPORT_TASKLET
+	tasklet_kill(&mhba->isr_tasklet);
+	#endif
+
+	/*
+	 * Take the lhba off the lhba array. Note that we will not
+	 * decrement the max_index. We let this array be sparse array
+	 */
+	for (i = 0; i < mvumi_mgmt_info.max_index; i++) {
+		if (mvumi_mgmt_info.mhba[i] == mhba) {
+			mvumi_mgmt_info.count--;
+			mvumi_mgmt_info.mhba[i] = NULL;
+
+			break;
+		}
+	}
+
+	mhba->instancet->disable_intr(mhba->mmio);
+
+	free_irq(mhba->pdev->irq, mhba);
+
+	mvumi_release_fw(mhba);
+
+	scsi_host_put(host);
+
+	pci_set_drvdata(pdev, NULL);
+
+	pci_disable_device(pdev);
+	mv_printk("driver is removed!.\n");
+
+	return;
+}
+
+/**
+ * mvumi_shutdown -	Shutdown entry point
+ * @device:		Generic device structure
+ */
+static void mvumi_shutdown(struct pci_dev *pdev)
+{
+	struct mv_hba *mhba = pci_get_drvdata(pdev);
+	mvumi_flush_cache(mhba);
+}
+#if LINUX_VERSION_CODE <=KERNEL_VERSION(2, 6, 9)
+static int mvumi_suspend(struct pci_dev *pdev,u32 state)
+
+#else
+static int mvumi_suspend(struct pci_dev *pdev,pm_message_t state)
+#endif
+{
+
+	struct mv_hba *mhba=NULL;
+	mv_printk("%s\n",__FUNCTION__);
+
+	mhba=pci_get_drvdata(pdev);
+	mvumi_flush_cache(mhba);
+	mvumi_shutdown_controller(mhba);
+	#ifdef  SUPPORT_TASKLET
+	tasklet_kill(&mhba->isr_tasklet);
+	#endif
+	pci_set_drvdata(pdev, mhba);
+	mhba->instancet->disable_intr(mhba->mmio);
+	free_irq(mhba->pdev->irq, mhba);
+#if LINUX_VERSION_CODE <=KERNEL_VERSION(2, 6, 9)
+	pci_save_state(pdev,mhba->pmstate);
+#else
+	pci_save_state(pdev);
+#endif
+	pci_disable_device(pdev);
+#if LINUX_VERSION_CODE <=KERNEL_VERSION(2, 6, 9)
+	pci_set_power_state(pdev, state);
+#else
+	pci_set_power_state(pdev, pci_choose_state(pdev, state));
+#endif
+
+	return 0;
+}
+static int mvumi_resume(struct pci_dev *pdev)
+{
+
+	int rval;
+	struct mv_hba *mhba=NULL;
+	mv_printk("%s\n",__FUNCTION__);
+	mhba = pci_get_drvdata(pdev);
+#if LINUX_VERSION_CODE <=KERNEL_VERSION(2, 6, 9)
+	pci_set_power_state(pdev, 0);
+	pci_enable_wake(pdev, 0, 0);
+	pci_restore_state(pdev,mhba->pmstate);
+#else
+	pci_set_power_state(pdev, PCI_D0);
+	pci_enable_wake(pdev, PCI_D0, 0);
+	pci_restore_state(pdev);
+#endif
+	/*
+	 * PCI prepping: enable device set bus mastering and dma mask
+	 */
+	rval = pci_enable_device(pdev);
+
+	if (rval) {
+		mv_printk(" Enable device failed\n");
+		return rval;
+	}
+
+	pci_set_master(pdev);
+
+	if (IS_DMA64) {
+		if (pci_set_dma_mask(pdev, DMA_64BIT_MASK) != 0) {
+
+			if (pci_set_dma_mask(pdev, DMA_32BIT_MASK) != 0)
+				goto fail_set_dma_mask;
+		}
+	} else {
+		if (pci_set_dma_mask(pdev, DMA_32BIT_MASK) != 0)
+			goto fail_set_dma_mask;
+	}
+
+	/*
+	 * We expect the FW state to be READY
+	 */
+	if (mvumi_start(mhba))
+		goto fail_set_dma_mask;
+	#ifdef  SUPPORT_TASKLET
+	/*
+	 * Setup tasklet for cmd completion
+	 */
+	tasklet_init(&mhba->isr_tasklet, mvumi_complete_cmd_dpc,
+		     (unsigned long)mhba);
+	#endif
+	/*
+	 * Register IRQ
+	 */
+		if (mvumi_request_irq(mhba)) {
+			mv_printk(" Failed to register IRQ\n");
+			goto fail_set_dma_mask;
+		}
+	/* Enable hba interrupt */
+	mhba->instancet->enable_intr(mhba->mmio);
+	/*
+	 * Initiate AEN (Asynchronous Event Notification)
+	 */
+#ifdef SUPPORT_INTERNAL_REQ
+			/*
+			 * get & clearup original hotplug events.
+			 */
+			mvumi_get_event(mhba, APICDB1_HOST_GETEVENT);
+#endif
+
+	return 0;
+
+fail_set_dma_mask:
+	pci_disable_device(pdev);
+
+	return -ENODEV;
+}
+/*
+ * PCI hotplug support registration structure
+ */
+static struct pci_driver mvumi_pci_driver = {
+
+	.name = "mv_" MV_DRIVER_NAME,
+	.id_table = mvumi_pci_table,
+	.probe = mvumi_probe_one,
+	.remove = __devexit_p(mvumi_detach_one),
+	#if LINUX_VERSION_CODE >KERNEL_VERSION(2, 6, 9)
+	.shutdown = mvumi_shutdown,
+	#endif
+	.suspend=mvumi_suspend,
+	.resume=mvumi_resume,
+};
+
+/*
+ * Sysfs driver attributes
+ */
+static ssize_t mvumi_sysfs_show_version(struct device_driver *dd, char *buf)
+{
+	return snprintf(buf, strlen(MVUMI_VERSION) + 2, "%s\n", MVUMI_VERSION);
+}
+
+static DRIVER_ATTR(version, S_IRUGO, mvumi_sysfs_show_version, NULL);
+
+static ssize_t
+mvumi_sysfs_show_release_date(struct device_driver *dd, char *buf)
+{
+	return snprintf(buf, strlen(MVUMI_RELDATE) + 2, "%s\n", MVUMI_RELDATE);
+}
+
+static DRIVER_ATTR(release_date, S_IRUGO, mvumi_sysfs_show_release_date, NULL);
+
+static ssize_t mvumi_sysfs_show_dbg_lvl(struct device_driver *dd, char *buf)
+{
+	return sprintf(buf, "%u", mvumi_dbg_lvl);
+}
+
+static ssize_t
+mvumi_sysfs_set_dbg_lvl(struct device_driver *dd, const char *buf, size_t count)
+{
+	int retval = count;
+	sscanf(buf, "%u", &mvumi_dbg_lvl);
+	if(mvumi_dbg_lvl== 0){
+		printk(KERN_DEBUG " disable dbg_lvl\n");
+	}else{
+		printk(KERN_DEBUG " enable dbg_lvl\n");
+	}
+
+	return retval;
+}
+
+static DRIVER_ATTR(dbg_lvl, S_IRUGO | S_IWUGO, mvumi_sysfs_show_dbg_lvl,
+		   mvumi_sysfs_set_dbg_lvl);
+
+/**
+ * mvumi_init - Driver load entry point
+ */
+static int __init mvumi_init(void)
+{
+	int rval;
+	/*
+	 * Announce driver version and other information
+	 */
+	mv_printk("%s %s\n", MVUMI_VERSION, MVUMI_RELDATE);
+
+	memset(&mvumi_mgmt_info, 0, sizeof(mvumi_mgmt_info));
+
+	/*
+	 * Register ourselves as PCI hotplug module
+	 */
+	rval = pci_register_driver(&mvumi_pci_driver);
+
+	if (rval) {
+		mv_printk(" PCI hotplug regisration failed \n");
+		goto err_pcidrv;
+	}
+	rval = driver_create_file(&mvumi_pci_driver.driver,
+				  &driver_attr_version);
+	if (rval)
+		goto err_dcf_attr_ver;
+	rval = driver_create_file(&mvumi_pci_driver.driver,
+				  &driver_attr_release_date);
+	if (rval)
+		goto err_dcf_rel_date;
+	rval = driver_create_file(&mvumi_pci_driver.driver,
+				  &driver_attr_dbg_lvl);
+	if (rval)
+		goto err_dcf_dbg_lvl;
+
+	return rval;
+
+err_dcf_dbg_lvl:
+	driver_remove_file(&mvumi_pci_driver.driver, &driver_attr_release_date);
+err_dcf_rel_date:
+	driver_remove_file(&mvumi_pci_driver.driver, &driver_attr_version);
+
+err_dcf_attr_ver:
+	//pci_unregister_driver(&mvumi_pci_driver);
+
+err_pcidrv:
+	//unregister_chrdev(mvumi_mgmt_majorno, MV_DRIVER_NAME);
+	return rval;
+}
+
+/**
+ * mvumi_exit - Driver unload entry point
+ */
+static void __exit mvumi_exit(void)
+{
+	driver_remove_file(&mvumi_pci_driver.driver, &driver_attr_dbg_lvl);
+	driver_remove_file(&mvumi_pci_driver.driver, &driver_attr_release_date);
+	driver_remove_file(&mvumi_pci_driver.driver, &driver_attr_version);
+
+	pci_unregister_driver(&mvumi_pci_driver);
+}
+
+module_init(mvumi_init);
+module_exit(mvumi_exit);
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/megaraid/megaraid_sas.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/megaraid/megaraid_sas.c
@@ -75,6 +75,10 @@
 	/* gen2*/
 	{PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0079GEN2)},
 	/* gen2*/
+	{PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0073SKINNY)},
+	/* skinny*/
+	{PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0071SKINNY)},
+	/* skinny*/
 	{PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_VERDE_ZCR)},
 	/* xscale IOP, vega */
 	{PCI_DEVICE(PCI_VENDOR_ID_DELL, PCI_DEVICE_ID_DELL_PERC5)},
@@ -328,6 +332,99 @@
 };
 
 /**
+ * megasas_enable_intr_skinny -	Enables interrupts
+ * @regs:			MFI register set
+ */
+static inline void
+megasas_enable_intr_skinny(struct megasas_register_set __iomem *regs)
+{
+	writel(0xFFFFFFFF, &(regs)->outbound_intr_mask);
+
+	writel(~MFI_SKINNY_ENABLE_INTERRUPT_MASK, &(regs)->outbound_intr_mask);
+
+	/* Dummy readl to force pci flush */
+	readl(&regs->outbound_intr_mask);
+}
+
+/**
+ * megasas_disable_intr_skinny -	Disables interrupt
+ * @regs:			MFI register set
+ */
+static inline void
+megasas_disable_intr_skinny(struct megasas_register_set __iomem *regs)
+{
+	u32 mask = 0xFFFFFFFF;
+	writel(mask, &regs->outbound_intr_mask);
+	/* Dummy readl to force pci flush */
+	readl(&regs->outbound_intr_mask);
+}
+
+/**
+ * megasas_read_fw_status_reg_skinny - returns the current FW status value
+ * @regs:			MFI register set
+ */
+static u32
+megasas_read_fw_status_reg_skinny(struct megasas_register_set __iomem *regs)
+{
+	return readl(&(regs)->outbound_scratch_pad);
+}
+
+/**
+ * megasas_clear_interrupt_skinny -	Check & clear interrupt
+ * @regs:				MFI register set
+ */
+static int
+megasas_clear_intr_skinny(struct megasas_register_set __iomem *regs)
+{
+	u32 status;
+	/*
+	 * Check if it is our interrupt
+	 */
+	status = readl(&regs->outbound_intr_status);
+
+	if (!(status & MFI_SKINNY_ENABLE_INTERRUPT_MASK)) {
+		return 1;
+	}
+
+	/*
+	 * Clear the interrupt by writing back the same value
+	 */
+	writel(status, &regs->outbound_intr_status);
+
+	/*
+	* dummy read to flush PCI
+	*/
+	readl(&regs->outbound_intr_status);
+
+	return 0;
+}
+
+/**
+ * megasas_fire_cmd_skinny -	Sends command to the FW
+ * @frame_phys_addr :		Physical address of cmd
+ * @frame_count :		Number of frames for the command
+ * @regs :			MFI register set
+ */
+static inline void
+megasas_fire_cmd_skinny(dma_addr_t frame_phys_addr, u32 frame_count,
+			struct megasas_register_set __iomem *regs)
+{
+	writel(0, &(regs)->inbound_high_queue_port);
+	writel((frame_phys_addr | (frame_count<<1))|1,
+		&(regs)->inbound_low_queue_port);
+}
+
+static struct megasas_instance_template megasas_instance_template_skinny = {
+
+	.fire_cmd = megasas_fire_cmd_skinny,
+	.enable_intr = megasas_enable_intr_skinny,
+	.disable_intr = megasas_disable_intr_skinny,
+	.clear_intr = megasas_clear_intr_skinny,
+	.read_fw_status_reg = megasas_read_fw_status_reg_skinny,
+};
+
+
+/**
 *	The following functions are defined for gen2 (deviceid : 0x78 0x79)
 *	controllers
 */
@@ -1072,7 +1169,14 @@
 
 		spin_lock_irqsave(instance->host->host_lock, flags);
 		instance->flag &= ~MEGASAS_FW_BUSY;
-		instance->host->can_queue =
+		if ((instance->pdev->device ==
+			PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
+			(instance->pdev->device ==
+			PCI_DEVICE_ID_LSI_SAS0071SKINNY)) {
+			instance->host->can_queue =
+				instance->max_fw_cmds - MEGASAS_SKINNY_INT_CMDS;
+		} else
+			instance->host->can_queue =
 				instance->max_fw_cmds - MEGASAS_INT_CMDS;
 
 		spin_unlock_irqrestore(instance->host->host_lock, flags);
@@ -1556,16 +1660,34 @@
 			/*
 			 * Set the CLR bit in inbound doorbell
 			 */
-			writel(MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG,
-				&instance->reg_set->inbound_doorbell);
+			if ((instance->pdev->device == \
+				PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
+				(instance->pdev->device ==
+				PCI_DEVICE_ID_LSI_SAS0071SKINNY)) {
+
+				writel(
+				  MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG,
+				  &instance->reg_set->reserved_0[0]);
+			} else {
+				writel(
+				    MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG,
+					&instance->reg_set->inbound_doorbell);
+			}
 
 			max_wait = 2;
 			cur_state = MFI_STATE_WAIT_HANDSHAKE;
 			break;
 
 		case MFI_STATE_BOOT_MESSAGE_PENDING:
-			writel(MFI_INIT_HOTPLUG,
-				&instance->reg_set->inbound_doorbell);
+			if ((instance->pdev->device ==
+				PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
+			(instance->pdev->device ==
+				PCI_DEVICE_ID_LSI_SAS0071SKINNY)) {
+				writel(MFI_INIT_HOTPLUG,
+				&instance->reg_set->reserved_0[0]);
+			} else
+				writel(MFI_INIT_HOTPLUG,
+					&instance->reg_set->inbound_doorbell);
 
 			max_wait = 10;
 			cur_state = MFI_STATE_BOOT_MESSAGE_PENDING;
@@ -1576,7 +1698,15 @@
 			 * Bring it to READY state; assuming max wait 10 secs
 			 */
 			instance->instancet->disable_intr(instance->reg_set);
-			writel(MFI_RESET_FLAGS, &instance->reg_set->inbound_doorbell);
+			if ((instance->pdev->device ==
+				PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
+				(instance->pdev->device ==
+				PCI_DEVICE_ID_LSI_SAS0071SKINNY)) {
+				writel(MFI_RESET_FLAGS,
+					&instance->reg_set->reserved_0[0]);
+			} else
+				writel(MFI_RESET_FLAGS,
+					&instance->reg_set->inbound_doorbell);
 
 			max_wait = 60;
 			cur_state = MFI_STATE_OPERATIONAL;
@@ -2081,6 +2211,8 @@
 	 * Map the message registers
 	 */
 	if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS1078GEN2) ||
+		(instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
+		(instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
 		(instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0079GEN2)) {
 		instance->base_addr = pci_resource_start(instance->pdev, 1);
 	} else {
@@ -2111,6 +2243,10 @@
 		case PCI_DEVICE_ID_LSI_SAS0079GEN2:
 			instance->instancet = &megasas_instance_template_gen2;
 			break;
+		case PCI_DEVICE_ID_LSI_SAS0073SKINNY:
+		case PCI_DEVICE_ID_LSI_SAS0071SKINNY:
+			instance->instancet = &megasas_instance_template_skinny;
+			break;
 		case PCI_DEVICE_ID_LSI_SAS1064R:
 		case PCI_DEVICE_ID_DELL_PERC5:
 		default:
@@ -2465,7 +2601,13 @@
 	 */
 	host->irq = instance->pdev->irq;
 	host->unique_id = instance->unique_id;
-	host->can_queue = instance->max_fw_cmds - MEGASAS_INT_CMDS;
+	if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
+		(instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY)) {
+		host->can_queue =
+			instance->max_fw_cmds - MEGASAS_SKINNY_INT_CMDS;
+	} else
+		host->can_queue =
+			instance->max_fw_cmds - MEGASAS_INT_CMDS;
 	host->this_id = instance->init_id;
 	host->sg_tablesize = instance->max_num_sge;
 	host->max_sectors = instance->max_sectors_per_req;
@@ -2598,7 +2740,6 @@
 	spin_lock_init(&instance->completion_lock);
 
 	mutex_init(&instance->aen_mutex);
-	sema_init(&instance->ioctl_sem, MEGASAS_INT_CMDS);
 
 	/*
 	 * Initialize PCI related and misc parameters
@@ -2608,6 +2749,12 @@
 	instance->unique_id = pdev->bus->number << 8 | pdev->devfn;
 	instance->init_id = MEGASAS_DEFAULT_INIT_ID;
 
+	if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
+		(instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY)) {
+		sema_init(&instance->ioctl_sem, MEGASAS_SKINNY_INT_CMDS);
+	} else
+		sema_init(&instance->ioctl_sem, MEGASAS_INT_CMDS);
+
 	megasas_dbg_lvl = 0;
 	instance->flag = 0;
 	instance->last_time = 0;
@@ -3032,7 +3179,7 @@
 	int error = 0, i;
 	void *sense = NULL;
 	dma_addr_t sense_handle;
-	u32 *sense_ptr;
+	unsigned long *sense_ptr;
 
 	memset(kbuff_arr, 0, sizeof(kbuff_arr));
 
@@ -3072,6 +3219,9 @@
 	 * For each user buffer, create a mirror buffer and copy in
 	 */
 	for (i = 0; i < ioc->sge_count; i++) {
+		if (!ioc->sgl[i].iov_len)
+			continue;
+
 		kbuff_arr[i] = dma_alloc_coherent(&instance->pdev->dev,
 						    ioc->sgl[i].iov_len,
 						    &buf_handle, GFP_KERNEL);
@@ -3109,7 +3259,7 @@
 		}
 
 		sense_ptr =
-		    (u32 *) ((unsigned long)cmd->frame + ioc->sense_off);
+		(unsigned long *) ((unsigned long)cmd->frame + ioc->sense_off);
 		*sense_ptr = sense_handle;
 	}
 
@@ -3140,8 +3290,8 @@
 		 * sense_ptr points to the location that has the user
 		 * sense buffer address
 		 */
-		sense_ptr = (u32 *) ((unsigned long)ioc->frame.raw +
-				     ioc->sense_off);
+		sense_ptr = (unsigned long *) ((unsigned long)ioc->frame.raw +
+				ioc->sense_off);
 
 		if (copy_to_user((void __user *)((unsigned long)(*sense_ptr)),
 				 sense, ioc->sense_len)) {
@@ -3282,6 +3432,7 @@
 	    compat_alloc_user_space(sizeof(struct megasas_iocpacket));
 	int i;
 	int error = 0;
+	compat_uptr_t ptr;
 
 	if (clear_user(ioc, sizeof(*ioc)))
 		return -EFAULT;
@@ -3294,9 +3445,22 @@
 	    copy_in_user(&ioc->sge_count, &cioc->sge_count, sizeof(u32)))
 		return -EFAULT;
 
-	for (i = 0; i < MAX_IOCTL_SGE; i++) {
-		compat_uptr_t ptr;
+	/*
+	 * The sense_ptr is used in megasas_mgmt_fw_ioctl only when
+	 * sense_len is not null, so prepare the 64bit value under
+	 * the same condition.
+	 */
+	if (ioc->sense_len) {
+		void __user **sense_ioc_ptr =
+			(void __user **)(ioc->frame.raw + ioc->sense_off);
+		compat_uptr_t *sense_cioc_ptr =
+			(compat_uptr_t *)(cioc->frame.raw + cioc->sense_off);
+		if (get_user(ptr, sense_cioc_ptr) ||
+		    put_user(compat_ptr(ptr), sense_ioc_ptr))
+			return -EFAULT;
+	}
 
+	for (i = 0; i < MAX_IOCTL_SGE; i++) {
 		if (get_user(ptr, &cioc->sgl[i].iov_base) ||
 		    put_user(compat_ptr(ptr), &ioc->sgl[i].iov_base) ||
 		    copy_in_user(&ioc->sgl[i].iov_len,
@@ -3451,7 +3615,7 @@
 	return retval;
 }
 
-static DRIVER_ATTR(poll_mode_io, S_IRUGO|S_IWUGO,
+static DRIVER_ATTR(poll_mode_io, S_IRUGO|S_IWUSR,
 		megasas_sysfs_show_poll_mode_io,
 		megasas_sysfs_set_poll_mode_io);
 
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/megaraid/megaraid_sas.h
+++ linux-mvl-dove-2.6.32/drivers/scsi/megaraid/megaraid_sas.h
@@ -30,6 +30,8 @@
 #define	PCI_DEVICE_ID_LSI_VERDE_ZCR		0x0413
 #define	PCI_DEVICE_ID_LSI_SAS1078GEN2		0x0078
 #define	PCI_DEVICE_ID_LSI_SAS0079GEN2		0x0079
+#define	PCI_DEVICE_ID_LSI_SAS0073SKINNY		0x0073
+#define	PCI_DEVICE_ID_LSI_SAS0071SKINNY		0x0071
 
 /*
  * =====================================
@@ -570,6 +572,7 @@
  * is shown below
  */
 #define MEGASAS_INT_CMDS			32
+#define MEGASAS_SKINNY_INT_CMDS			5
 
 /*
  * FW can accept both 32 and 64 bit SGLs. We want to allocate 32/64 bit
@@ -584,6 +587,8 @@
 #define MFI_REPLY_1078_MESSAGE_INTERRUPT	0x80000000
 #define MFI_REPLY_GEN2_MESSAGE_INTERRUPT	0x00000001
 #define MFI_GEN2_ENABLE_INTERRUPT_MASK		(0x00000001 | 0x00000004)
+#define MFI_REPLY_SKINNY_MESSAGE_INTERRUPT	0x40000000
+#define MFI_SKINNY_ENABLE_INTERRUPT_MASK	(0x00000001)
 
 /*
 * register set for both 1068 and 1078 controllers
--- linux-mvl-dove-2.6.32.orig/drivers/scsi/lpfc/lpfc_init.c
+++ linux-mvl-dove-2.6.32/drivers/scsi/lpfc/lpfc_init.c
@@ -2408,7 +2408,7 @@
 	vport->els_tmofunc.function = lpfc_els_timeout;
 	vport->els_tmofunc.data = (unsigned long)vport;
 
-	error = scsi_add_host(shost, dev);
+	error = scsi_add_host_with_dma(shost, dev, &phba->pcidev->dev);
 	if (error)
 		goto out_put_shost;
 
@@ -4384,9 +4384,13 @@
 		pdev = phba->pcidev;
 
 	/* Set the device DMA mask size */
-	if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0)
-		if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)
+	if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0
+	 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(64)) != 0) {
+		if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0
+		 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(32)) != 0) {
 			return error;
+		}
+	}
 
 	/* Get the bus address of Bar0 and Bar2 and the number of bytes
 	 * required by each mapping.
@@ -5940,9 +5944,13 @@
 		pdev = phba->pcidev;
 
 	/* Set the device DMA mask size */
-	if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0)
-		if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)
+	if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0
+	 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(64)) != 0) {
+		if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0
+		 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(32)) != 0) {
 			return error;
+		}
+	}
 
 	/* Get the bus address of SLI4 device Bar0, Bar1, and Bar2 and the
 	 * number of bytes required by each mapping. They are actually
--- linux-mvl-dove-2.6.32.orig/drivers/connector/connector.c
+++ linux-mvl-dove-2.6.32/drivers/connector/connector.c
@@ -36,17 +36,6 @@
 MODULE_AUTHOR("Evgeniy Polyakov <zbr@ioremap.net>");
 MODULE_DESCRIPTION("Generic userspace <-> kernelspace connector.");
 
-static u32 cn_idx = CN_IDX_CONNECTOR;
-static u32 cn_val = CN_VAL_CONNECTOR;
-
-module_param(cn_idx, uint, 0);
-module_param(cn_val, uint, 0);
-MODULE_PARM_DESC(cn_idx, "Connector's main device idx.");
-MODULE_PARM_DESC(cn_val, "Connector's main device val.");
-
-static DEFINE_MUTEX(notify_lock);
-static LIST_HEAD(notify_list);
-
 static struct cn_dev cdev;
 
 static int cn_already_initialized;
@@ -210,54 +199,6 @@
 }
 
 /*
- * Notification routing.
- *
- * Gets id and checks if there are notification request for it's idx
- * and val.  If there are such requests notify the listeners with the
- * given notify event.
- *
- */
-static void cn_notify(struct cb_id *id, u32 notify_event)
-{
-	struct cn_ctl_entry *ent;
-
-	mutex_lock(&notify_lock);
-	list_for_each_entry(ent, &notify_list, notify_entry) {
-		int i;
-		struct cn_notify_req *req;
-		struct cn_ctl_msg *ctl = ent->msg;
-		int idx_found, val_found;
-
-		idx_found = val_found = 0;
-
-		req = (struct cn_notify_req *)ctl->data;
-		for (i = 0; i < ctl->idx_notify_num; ++i, ++req) {
-			if (id->idx >= req->first &&
-					id->idx < req->first + req->range) {
-				idx_found = 1;
-				break;
-			}
-		}
-
-		for (i = 0; i < ctl->val_notify_num; ++i, ++req) {
-			if (id->val >= req->first &&
-					id->val < req->first + req->range) {
-				val_found = 1;
-				break;
-			}
-		}
-
-		if (idx_found && val_found) {
-			struct cn_msg m = { .ack = notify_event, };
-
-			memcpy(&m.id, id, sizeof(m.id));
-			cn_netlink_send(&m, ctl->group, GFP_KERNEL);
-		}
-	}
-	mutex_unlock(&notify_lock);
-}
-
-/*
  * Callback add routing - adds callback with given ID and name.
  * If there is registered callback with the same ID it will not be added.
  *
@@ -276,8 +217,6 @@
 	if (err)
 		return err;
 
-	cn_notify(id, 0);
-
 	return 0;
 }
 EXPORT_SYMBOL_GPL(cn_add_callback);
@@ -295,111 +234,9 @@
 	struct cn_dev *dev = &cdev;
 
 	cn_queue_del_callback(dev->cbdev, id);
-	cn_notify(id, 1);
 }
 EXPORT_SYMBOL_GPL(cn_del_callback);
 
-/*
- * Checks two connector's control messages to be the same.
- * Returns 1 if they are the same or if the first one is corrupted.
- */
-static int cn_ctl_msg_equals(struct cn_ctl_msg *m1, struct cn_ctl_msg *m2)
-{
-	int i;
-	struct cn_notify_req *req1, *req2;
-
-	if (m1->idx_notify_num != m2->idx_notify_num)
-		return 0;
-
-	if (m1->val_notify_num != m2->val_notify_num)
-		return 0;
-
-	if (m1->len != m2->len)
-		return 0;
-
-	if ((m1->idx_notify_num + m1->val_notify_num) * sizeof(*req1) !=
-	    m1->len)
-		return 1;
-
-	req1 = (struct cn_notify_req *)m1->data;
-	req2 = (struct cn_notify_req *)m2->data;
-
-	for (i = 0; i < m1->idx_notify_num; ++i) {
-		if (req1->first != req2->first || req1->range != req2->range)
-			return 0;
-		req1++;
-		req2++;
-	}
-
-	for (i = 0; i < m1->val_notify_num; ++i) {
-		if (req1->first != req2->first || req1->range != req2->range)
-			return 0;
-		req1++;
-		req2++;
-	}
-
-	return 1;
-}
-
-/*
- * Main connector device's callback.
- *
- * Used for notification of a request's processing.
- */
-static void cn_callback(struct cn_msg *msg, struct netlink_skb_parms *nsp)
-{
-	struct cn_ctl_msg *ctl;
-	struct cn_ctl_entry *ent;
-	u32 size;
-
-	if (msg->len < sizeof(*ctl))
-		return;
-
-	ctl = (struct cn_ctl_msg *)msg->data;
-
-	size = (sizeof(*ctl) + ((ctl->idx_notify_num +
-				 ctl->val_notify_num) *
-				sizeof(struct cn_notify_req)));
-
-	if (msg->len != size)
-		return;
-
-	if (ctl->len + sizeof(*ctl) != msg->len)
-		return;
-
-	/*
-	 * Remove notification.
-	 */
-	if (ctl->group == 0) {
-		struct cn_ctl_entry *n;
-
-		mutex_lock(&notify_lock);
-		list_for_each_entry_safe(ent, n, &notify_list, notify_entry) {
-			if (cn_ctl_msg_equals(ent->msg, ctl)) {
-				list_del(&ent->notify_entry);
-				kfree(ent);
-			}
-		}
-		mutex_unlock(&notify_lock);
-
-		return;
-	}
-
-	size += sizeof(*ent);
-
-	ent = kzalloc(size, GFP_KERNEL);
-	if (!ent)
-		return;
-
-	ent->msg = (struct cn_ctl_msg *)(ent + 1);
-
-	memcpy(ent->msg, ctl, size - sizeof(*ent));
-
-	mutex_lock(&notify_lock);
-	list_add(&ent->notify_entry, &notify_list);
-	mutex_unlock(&notify_lock);
-}
-
 static int cn_proc_show(struct seq_file *m, void *v)
 {
 	struct cn_queue_dev *dev = cdev.cbdev;
@@ -437,11 +274,8 @@
 static int __devinit cn_init(void)
 {
 	struct cn_dev *dev = &cdev;
-	int err;
 
 	dev->input = cn_rx_skb;
-	dev->id.idx = cn_idx;
-	dev->id.val = cn_val;
 
 	dev->nls = netlink_kernel_create(&init_net, NETLINK_CONNECTOR,
 					 CN_NETLINK_USERS + 0xf,
@@ -457,14 +291,6 @@
 
 	cn_already_initialized = 1;
 
-	err = cn_add_callback(&dev->id, "connector", &cn_callback);
-	if (err) {
-		cn_already_initialized = 0;
-		cn_queue_free_dev(dev->cbdev);
-		netlink_kernel_release(dev->nls);
-		return -EINVAL;
-	}
-
 	proc_net_fops_create(&init_net, "connector", S_IRUGO, &cn_file_ops);
 
 	return 0;
@@ -478,7 +304,6 @@
 
 	proc_net_remove(&init_net, "connector");
 
-	cn_del_callback(&dev->id);
 	cn_queue_free_dev(dev->cbdev);
 	netlink_kernel_release(dev->nls);
 }
--- linux-mvl-dove-2.6.32.orig/drivers/usb/misc/uss720.c
+++ linux-mvl-dove-2.6.32/drivers/usb/misc/uss720.c
@@ -3,7 +3,7 @@
 /*
  *	uss720.c  --  USS720 USB Parport Cable.
  *
- *	Copyright (C) 1999, 2005
+ *	Copyright (C) 1999, 2005, 2010
  *	    Thomas Sailer (t.sailer@alumni.ethz.ch)
  *
  *	This program is free software; you can redistribute it and/or modify
@@ -176,12 +176,11 @@
 	spin_lock_irqsave(&priv->asynclock, flags);
 	list_add_tail(&rq->asynclist, &priv->asynclist);
 	spin_unlock_irqrestore(&priv->asynclock, flags);
+	kref_get(&rq->ref_count);
 	ret = usb_submit_urb(rq->urb, mem_flags);
-	if (!ret) {
-		kref_get(&rq->ref_count);
+	if (!ret)
 		return rq;
-	}
-	kref_put(&rq->ref_count, destroy_async);
+	destroy_async(&rq->ref_count);
 	err("submit_async_request submit_urb failed with %d", ret);
 	return NULL;
 }
@@ -775,6 +774,8 @@
 	{ USB_DEVICE(0x0557, 0x2001) },
 	{ USB_DEVICE(0x0729, 0x1284) },
 	{ USB_DEVICE(0x1293, 0x0002) },
+	{ USB_DEVICE(0x1293, 0x0002) },
+	{ USB_DEVICE(0x050d, 0x0002) },
 	{ }						/* Terminating entry */
 };
 
--- linux-mvl-dove-2.6.32.orig/drivers/usb/misc/usbsevseg.c
+++ linux-mvl-dove-2.6.32/drivers/usb/misc/usbsevseg.c
@@ -185,7 +185,7 @@
 								\
 	return count;						\
 }								\
-static DEVICE_ATTR(name, S_IWUGO | S_IRUGO, show_attr_##name, set_attr_##name);
+static DEVICE_ATTR(name, S_IRUGO | S_IWUSR, show_attr_##name, set_attr_##name);
 
 static ssize_t show_attr_text(struct device *dev,
 	struct device_attribute *attr, char *buf)
@@ -216,7 +216,7 @@
 	return count;
 }
 
-static DEVICE_ATTR(text, S_IWUGO | S_IRUGO, show_attr_text, set_attr_text);
+static DEVICE_ATTR(text, S_IRUGO | S_IWUSR, show_attr_text, set_attr_text);
 
 static ssize_t show_attr_decimals(struct device *dev,
 	struct device_attribute *attr, char *buf)
@@ -265,8 +265,7 @@
 	return count;
 }
 
-static DEVICE_ATTR(decimals, S_IWUGO | S_IRUGO,
-	show_attr_decimals, set_attr_decimals);
+static DEVICE_ATTR(decimals, S_IRUGO | S_IWUSR, show_attr_decimals, set_attr_decimals);
 
 static ssize_t show_attr_textmode(struct device *dev,
 	struct device_attribute *attr, char *buf)
@@ -312,8 +311,7 @@
 	return -EINVAL;
 }
 
-static DEVICE_ATTR(textmode, S_IWUGO | S_IRUGO,
-	show_attr_textmode, set_attr_textmode);
+static DEVICE_ATTR(textmode, S_IRUGO | S_IWUSR, show_attr_textmode, set_attr_textmode);
 
 
 MYDEV_ATTR_SIMPLE_UNSIGNED(powered, update_display_powered);
--- linux-mvl-dove-2.6.32.orig/drivers/usb/misc/usbtest.c
+++ linux-mvl-dove-2.6.32/drivers/usb/misc/usbtest.c
@@ -62,6 +62,7 @@
 	struct usbtest_info	*info;
 	int			in_pipe;
 	int			out_pipe;
+	struct usb_endpoint_descriptor	*in_desc, *out_desc;
 	int			in_iso_pipe;
 	int			out_iso_pipe;
 	struct usb_endpoint_descriptor	*iso_in, *iso_out;
@@ -77,7 +78,7 @@
 }
 
 /* set up all urbs so they can be used with either bulk or interrupt */
-#define	INTERRUPT_RATE		1	/* msec/transfer */
+#define UNLINK_RATE     1   /* msec */
 
 #define ERROR(tdev, fmt, args...) \
 	dev_err(&(tdev)->intf->dev , fmt , ## args)
@@ -111,6 +112,7 @@
 			e = alt->endpoint + ep;
 			switch (e->desc.bmAttributes) {
 			case USB_ENDPOINT_XFER_BULK:
+			case USB_ENDPOINT_XFER_INT:
 				break;
 			case USB_ENDPOINT_XFER_ISOC:
 				if (dev->info->iso)
@@ -152,10 +154,22 @@
 	}
 
 	if (in) {
-		dev->in_pipe = usb_rcvbulkpipe (udev,
-			in->desc.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK);
-		dev->out_pipe = usb_sndbulkpipe (udev,
-			out->desc.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK);
+        if(in->desc.bmAttributes == USB_ENDPOINT_XFER_INT) {
+            dev->in_pipe = usb_rcvintpipe (udev, 
+                        in->desc.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK);
+            if(out)         
+                dev->out_pipe = usb_sndintpipe (udev, 
+                        out->desc.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK);
+        }
+        else {
+			dev->in_pipe = usb_rcvbulkpipe (udev,
+				in->desc.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK);
+			if(out)
+				dev->out_pipe = usb_sndbulkpipe (udev,
+					out->desc.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK);
+        }
+        dev->in_desc = &in->desc;
+        dev->out_desc = &out->desc;
 	}
 	if (iso_in) {
 		dev->iso_in = &iso_in->desc;
@@ -186,7 +200,8 @@
 
 static struct urb *simple_alloc_urb (
 	struct usb_device	*udev,
-	int			pipe,
+	int					pipe,
+	struct usb_endpoint_descriptor *desc,
 	unsigned long		bytes
 )
 {
@@ -195,10 +210,16 @@
 	urb = usb_alloc_urb (0, GFP_KERNEL);
 	if (!urb)
 		return urb;
+
 	usb_fill_bulk_urb (urb, udev, pipe, NULL, bytes, simple_callback, NULL);
-	urb->interval = (udev->speed == USB_SPEED_HIGH)
-			? (INTERRUPT_RATE << 3)
-			: INTERRUPT_RATE;
+
+    if(desc != NULL) {
+        if( (udev->speed == USB_SPEED_HIGH) || 
+            ((desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_ISOC) )
+            urb->interval = (1 << (desc->bInterval - 1));
+        else
+            urb->interval = desc->bInterval;
+    }
 	urb->transfer_flags = URB_NO_TRANSFER_DMA_MAP;
 	if (usb_pipein (pipe))
 		urb->transfer_flags |= URB_SHORT_NOT_OK;
@@ -248,12 +269,12 @@
 		case 0:
 			expected = 0;
 			break;
-		/* mod63 stays in sync with short-terminated transfers,
-		 * or otherwise when host and gadget agree on how large
-		 * each usb transfer request should be.  resync is done
-		 * with set_interface or set_config.
-		 */
-		case 1:			/* mod63 */
+		/* mod255 stays in sync with short-terminated transfers,
+         * or otherwise when host and gadget agree on how large
+         * each usb transfer request should be.  resync is done
+         * with set_interface or set_config.
+         */
+        case 1:         /* mod 255 */
 			expected = i % 63;
 			break;
 		/* always fail unsupported patterns */
@@ -271,9 +292,12 @@
 
 static void simple_free_urb (struct urb *urb)
 {
-	usb_buffer_free (urb->dev, urb->transfer_buffer_length,
-			urb->transfer_buffer, urb->transfer_dma);
-	usb_free_urb (urb);
+	if(urb != NULL)
+	{	
+		if((urb->transfer_buffer != NULL) && (urb->transfer_buffer_length > 0))
+    		usb_buffer_free (urb->dev, urb->transfer_buffer_length, urb->transfer_buffer, urb->transfer_dma);
+    	usb_free_urb (urb);
+	}
 }
 
 static int simple_io (
@@ -357,6 +381,7 @@
 	sg = kmalloc (nents * sizeof *sg, GFP_KERNEL);
 	if (!sg)
 		return NULL;
+	memset(sg, 0, nents * sizeof *sg);
 	sg_init_table(sg, nents);
 
 	for (i = 0; i < nents; i++) {
@@ -395,25 +420,32 @@
 
 static int perform_sglist (
 	struct usbtest_dev	*tdev,
-	unsigned		iterations,
-	int			pipe,
+	unsigned			iterations,
+	int					pipe,
+	struct usb_endpoint_descriptor *desc,
 	struct usb_sg_request	*req,
 	struct scatterlist	*sg,
-	int			nents
+	int					nents
 )
 {
 	struct usb_device	*udev = testdev_to_usbdev(tdev);
 	int			retval = 0;
+	int         interval = 0;
 
 	while (retval == 0 && iterations-- > 0) {
-		retval = usb_sg_init (req, udev, pipe,
-				(udev->speed == USB_SPEED_HIGH)
-					? (INTERRUPT_RATE << 3)
-					: INTERRUPT_RATE,
-				sg, nents, 0, GFP_KERNEL);
+        if(desc != NULL) {
+            if( (udev->speed == USB_SPEED_HIGH) || 
+                ( (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_ISOC) )
+                interval = (1 << (desc->bInterval - 1));
+            else
+                interval = desc->bInterval;
+        }
 
+		retval = usb_sg_init (req, udev, pipe, interval,
+				                sg, nents, 0, GFP_KERNEL);		
 		if (retval)
 			break;
+
 		usb_sg_wait (req);
 		retval = req->status;
 
@@ -972,7 +1004,7 @@
 			goto cleanup;
 		}
 		req.wLength = cpu_to_le16 (len);
-		urb [i] = u = simple_alloc_urb (udev, pipe, len);
+		urb [i] = u = simple_alloc_urb (udev, pipe, NULL, len);
 		if (!u)
 			goto cleanup;
 
@@ -1043,14 +1075,15 @@
 	}
 }
 
-static int unlink1 (struct usbtest_dev *dev, int pipe, int size, int async)
+static int unlink1 (struct usbtest_dev *dev, int pipe, 
+                    struct usb_endpoint_descriptor *desc, int size, int async)
 {
 	struct urb		*urb;
 	struct completion	completion;
 	int			retval = 0;
 
 	init_completion (&completion);
-	urb = simple_alloc_urb (testdev_to_usbdev (dev), pipe, size);
+	urb = simple_alloc_urb (testdev_to_usbdev (dev), pipe, desc, size);
 	if (!urb)
 		return -ENOMEM;
 	urb->context = &completion;
@@ -1070,7 +1103,7 @@
 	/* unlinking that should always work.  variable delay tests more
 	 * hcd states and code paths, even with little other system load.
 	 */
-	msleep (jiffies % (2 * INTERRUPT_RATE));
+	msleep (jiffies % (2 * UNLINK_RATE));
 	if (async) {
 		while (!completion_done(&completion)) {
 			retval = usb_unlink_urb(urb);
@@ -1112,14 +1145,15 @@
 				0 : retval - 2000;
 }
 
-static int unlink_simple (struct usbtest_dev *dev, int pipe, int len)
+static int unlink_simple (struct usbtest_dev *dev, int pipe, 
+                          struct usb_endpoint_descriptor *desc, int len)
 {
 	int			retval = 0;
 
 	/* test sync and async paths */
-	retval = unlink1 (dev, pipe, len, 1);
+	retval = unlink1 (dev, pipe, desc, len, 1);
 	if (!retval)
-		retval = unlink1 (dev, pipe, len, 0);
+		retval = unlink1 (dev, pipe, desc, len, 0);
 	return retval;
 }
 
@@ -1216,7 +1250,7 @@
 	int		retval = 0;
 	struct urb	*urb;
 
-	urb = simple_alloc_urb (testdev_to_usbdev (dev), 0, 512);
+	urb = simple_alloc_urb (testdev_to_usbdev (dev), 0, NULL, 512);
 	if (urb == NULL)
 		return -ENOMEM;
 
@@ -1382,7 +1416,6 @@
 			break;
 		}
 	}
-	simple_free_urb (urb);
 
 	ctx->pending--;
 	if (ctx->pending == 0) {
@@ -1408,6 +1441,7 @@
 
 	if (bytes < 0 || !desc)
 		return NULL;
+
 	maxp = 0x7ff & le16_to_cpu(desc->wMaxPacketSize);
 	maxp *= 1 + (0x3 & (le16_to_cpu(desc->wMaxPacketSize) >> 11));
 	packets = DIV_ROUND_UP(bytes, maxp);
@@ -1448,12 +1482,12 @@
 {
 	struct iso_context	context;
 	struct usb_device	*udev;
-	unsigned		i;
+	unsigned			i;
 	unsigned long		packets = 0;
-	int			status = 0;
-	struct urb		*urbs[10];	/* FIXME no limit */
+	int					status = 0;
+	struct urb			*urbs[50];  /* FIXME no limit */
 
-	if (param->sglen > 10)
+	if (param->sglen > 50)
 		return -EDOM;
 
 	memset(&context, 0, sizeof context);
@@ -1489,6 +1523,10 @@
 
 	spin_lock_irq (&context.lock);
 	for (i = 0; i < param->sglen; i++) {
+		/*
+        if (usb_pipeout (urbs [i]->pipe))
+            simple_fill_buf (urbs [i]);
+		*/
 		++context.pending;
 		status = usb_submit_urb (urbs [i], GFP_ATOMIC);
 		if (status < 0) {
@@ -1499,6 +1537,7 @@
 			}
 
 			simple_free_urb (urbs [i]);
+			urbs[i] = NULL;
 			context.pending--;
 			context.submit_error = 1;
 			break;
@@ -1508,6 +1547,10 @@
 
 	wait_for_completion (&context.done);
 
+	for (i = 0; i < param->sglen; i++) {
+		if (urbs[i])
+			simple_free_urb(urbs[i]);
+	}
 	/*
 	 * Isochronous transfers are expected to fail sometimes.  As an
 	 * arbitrary limit, we will report an error if any submissions
@@ -1519,12 +1562,11 @@
 		status = -EACCES;
 	else if (context.errors > context.packet_count / 10)
 		status = -EIO;
-	return status;
 
 fail:
 	for (i = 0; i < param->sglen; i++) {
 		if (urbs [i])
-			simple_free_urb (urbs [i]);
+			simple_free_urb (urbs [i]);	
 	}
 	return status;
 }
@@ -1627,7 +1669,7 @@
 		dev_info(&intf->dev,
 				"TEST 1:  write %d bytes %u times\n",
 				param->length, param->iterations);
-		urb = simple_alloc_urb (udev, dev->out_pipe, param->length);
+		urb = simple_alloc_urb (udev, dev->out_pipe, dev->out_desc, param->length);
 		if (!urb) {
 			retval = -ENOMEM;
 			break;
@@ -1642,7 +1684,7 @@
 		dev_info(&intf->dev,
 				"TEST 2:  read %d bytes %u times\n",
 				param->length, param->iterations);
-		urb = simple_alloc_urb (udev, dev->in_pipe, param->length);
+		urb = simple_alloc_urb (udev, dev->out_pipe, dev->out_desc, param->length);
 		if (!urb) {
 			retval = -ENOMEM;
 			break;
@@ -1657,7 +1699,7 @@
 		dev_info(&intf->dev,
 				"TEST 3:  write/%d 0..%d bytes %u times\n",
 				param->vary, param->length, param->iterations);
-		urb = simple_alloc_urb (udev, dev->out_pipe, param->length);
+		urb = simple_alloc_urb (udev, dev->out_pipe, dev->out_desc, param->length);
 		if (!urb) {
 			retval = -ENOMEM;
 			break;
@@ -1673,7 +1715,7 @@
 		dev_info(&intf->dev,
 				"TEST 4:  read/%d 0..%d bytes %u times\n",
 				param->vary, param->length, param->iterations);
-		urb = simple_alloc_urb (udev, dev->in_pipe, param->length);
+		urb = simple_alloc_urb (udev, dev->in_pipe, dev->in_desc, param->length);
 		if (!urb) {
 			retval = -ENOMEM;
 			break;
@@ -1699,7 +1741,7 @@
 		}
 		// FIRMWARE:  bulk sink (maybe accepts short writes)
 		retval = perform_sglist(dev, param->iterations, dev->out_pipe,
-				&req, sg, param->sglen);
+				dev->out_desc, &req, sg, param->sglen);
 		free_sglist (sg, param->sglen);
 		break;
 
@@ -1717,7 +1759,7 @@
 		}
 		// FIRMWARE:  bulk source (maybe generates short writes)
 		retval = perform_sglist(dev, param->iterations, dev->in_pipe,
-				&req, sg, param->sglen);
+				dev->in_desc, &req, sg, param->sglen);
 		free_sglist (sg, param->sglen);
 		break;
 	case 7:
@@ -1734,7 +1776,7 @@
 		}
 		// FIRMWARE:  bulk sink (maybe accepts short writes)
 		retval = perform_sglist(dev, param->iterations, dev->out_pipe,
-				&req, sg, param->sglen);
+				dev->out_desc, &req, sg, param->sglen);
 		free_sglist (sg, param->sglen);
 		break;
 	case 8:
@@ -1751,7 +1793,7 @@
 		}
 		// FIRMWARE:  bulk source (maybe generates short writes)
 		retval = perform_sglist(dev, param->iterations, dev->in_pipe,
-				&req, sg, param->sglen);
+				dev->in_desc, &req, sg, param->sglen);
 		free_sglist (sg, param->sglen);
 		break;
 
@@ -1788,7 +1830,7 @@
 		dev_info(&intf->dev, "TEST 11:  unlink %d reads of %d\n",
 				param->iterations, param->length);
 		for (i = param->iterations; retval == 0 && i--; /* NOP */)
-			retval = unlink_simple (dev, dev->in_pipe,
+			retval = unlink_simple (dev, dev->in_pipe, dev->in_desc,
 						param->length);
 		if (retval)
 			dev_err(&intf->dev, "unlink reads failed %d, "
@@ -1801,7 +1843,7 @@
 		dev_info(&intf->dev, "TEST 12:  unlink %d writes of %d\n",
 				param->iterations, param->length);
 		for (i = param->iterations; retval == 0 && i--; /* NOP */)
-			retval = unlink_simple (dev, dev->out_pipe,
+			retval = unlink_simple (dev, dev->out_pipe, dev->out_desc,
 						param->length);
 		if (retval)
 			dev_err(&intf->dev, "unlink writes failed %d, "
@@ -1967,10 +2009,22 @@
 				dev->out_pipe = usb_sndbulkpipe (udev,
 							info->ep_out);
 		}
-		if (dev->in_pipe)
-			rtest = " bulk-in";
-		if (dev->out_pipe)
-			wtest = " bulk-out";
+        if (dev->in_pipe) {
+            if(usb_pipeint(dev->in_pipe)) {
+                rtest = " intr-in";
+            }
+            else {
+                rtest = " bulk-in";
+            }
+        }           
+        if (dev->out_pipe){
+            if(usb_pipeint(dev->out_pipe)) {
+                wtest = " intr-out";
+            }
+            else {
+                wtest = " bulk-out";
+            }
+        }           
 		if (dev->in_iso_pipe)
 			irtest = " iso-in";
 		if (dev->out_iso_pipe)
--- linux-mvl-dove-2.6.32.orig/drivers/usb/misc/trancevibrator.c
+++ linux-mvl-dove-2.6.32/drivers/usb/misc/trancevibrator.c
@@ -85,7 +85,7 @@
 	return count;
 }
 
-static DEVICE_ATTR(speed, S_IWUGO | S_IRUGO, show_speed, set_speed);
+static DEVICE_ATTR(speed, S_IRUGO | S_IWUSR, show_speed, set_speed);
 
 static int tv_probe(struct usb_interface *interface,
 		    const struct usb_device_id *id)
--- linux-mvl-dove-2.6.32.orig/drivers/usb/misc/emi62.c
+++ linux-mvl-dove-2.6.32/drivers/usb/misc/emi62.c
@@ -167,7 +167,7 @@
 			err("%s - error loading firmware: error = %d", __func__, err);
 			goto wraperr;
 		}
-	} while (i > 0);
+	} while (rec);
 
 	/* Assert reset (stop the CPU in the EMI) */
 	err = emi62_set_reset(dev,1);
--- linux-mvl-dove-2.6.32.orig/drivers/usb/misc/appledisplay.c
+++ linux-mvl-dove-2.6.32/drivers/usb/misc/appledisplay.c
@@ -72,8 +72,8 @@
 	struct usb_device *udev;	/* usb device */
 	struct urb *urb;		/* usb request block */
 	struct backlight_device *bd;	/* backlight device */
-	char *urbdata;			/* interrupt URB data buffer */
-	char *msgdata;			/* control message data buffer */
+	u8 *urbdata;			/* interrupt URB data buffer */
+	u8 *msgdata;			/* control message data buffer */
 
 	struct delayed_work work;
 	int button_pressed;
--- linux-mvl-dove-2.6.32.orig/drivers/usb/misc/usbled.c
+++ linux-mvl-dove-2.6.32/drivers/usb/misc/usbled.c
@@ -94,7 +94,7 @@
 	change_color(led);						\
 	return count;							\
 }									\
-static DEVICE_ATTR(value, S_IWUGO | S_IRUGO, show_##value, set_##value);
+static DEVICE_ATTR(value, S_IRUGO | S_IWUSR, show_##value, set_##value);
 show_set(blue);
 show_set(red);
 show_set(green);
--- linux-mvl-dove-2.6.32.orig/drivers/usb/misc/iowarrior.c
+++ linux-mvl-dove-2.6.32/drivers/usb/misc/iowarrior.c
@@ -373,7 +373,7 @@
 	case USB_DEVICE_ID_CODEMERCS_IOWPV2:
 	case USB_DEVICE_ID_CODEMERCS_IOW40:
 		/* IOW24 and IOW40 use a synchronous call */
-		buf = kmalloc(8, GFP_KERNEL);	/* 8 bytes are enough for both products */
+		buf = kmalloc(count, GFP_KERNEL);
 		if (!buf) {
 			retval = -ENOMEM;
 			goto exit;
@@ -552,6 +552,7 @@
 			/* needed for power consumption */
 			struct usb_config_descriptor *cfg_descriptor = &dev->udev->actconfig->desc;
 
+			memset(&info, 0, sizeof(info));
 			/* directly from the descriptor */
 			info.vendor = le16_to_cpu(dev->udev->descriptor.idVendor);
 			info.product = dev->product_id;
--- linux-mvl-dove-2.6.32.orig/drivers/usb/misc/cypress_cy7c63.c
+++ linux-mvl-dove-2.6.32/drivers/usb/misc/cypress_cy7c63.c
@@ -195,11 +195,9 @@
 	return read_port(dev, attr, buf, 1, CYPRESS_READ_PORT_ID1);
 }
 
-static DEVICE_ATTR(port0, S_IWUGO | S_IRUGO,
-		   get_port0_handler, set_port0_handler);
+static DEVICE_ATTR(port0, S_IRUGO | S_IWUSR, get_port0_handler, set_port0_handler);
 
-static DEVICE_ATTR(port1, S_IWUGO | S_IRUGO,
-		   get_port1_handler, set_port1_handler);
+static DEVICE_ATTR(port1, S_IRUGO | S_IWUSR, get_port1_handler, set_port1_handler);
 
 
 static int cypress_probe(struct usb_interface *interface,
--- linux-mvl-dove-2.6.32.orig/drivers/usb/misc/sisusbvga/sisusb.c
+++ linux-mvl-dove-2.6.32/drivers/usb/misc/sisusbvga/sisusb.c
@@ -2435,7 +2435,8 @@
 	}
 
 	if (!sisusb->devinit) {
-		if (sisusb->sisusb_dev->speed == USB_SPEED_HIGH) {
+		if (sisusb->sisusb_dev->speed == USB_SPEED_HIGH ||
+		    sisusb->sisusb_dev->speed == USB_SPEED_SUPER) {
 			if (sisusb_init_gfxdevice(sisusb, 0)) {
 				mutex_unlock(&sisusb->lock);
 				dev_err(&sisusb->sisusb_dev->dev, "Failed to initialize device\n");
@@ -3007,6 +3008,7 @@
 #else
 			x.sisusb_conactive  = 0;
 #endif
+			memset(x.sisusb_reserved, 0, sizeof(x.sisusb_reserved));
 
 			if (copy_to_user((void __user *)arg, &x, sizeof(x)))
 				retval = -EFAULT;
@@ -3167,7 +3169,7 @@
 
 	sisusb->present = 1;
 
-	if (dev->speed == USB_SPEED_HIGH) {
+	if (dev->speed == USB_SPEED_HIGH || dev->speed == USB_SPEED_SUPER) {
 		int initscreen = 1;
 #ifdef INCL_SISUSB_CON
 		if (sisusb_first_vc > 0 &&
@@ -3245,6 +3247,7 @@
 	{ USB_DEVICE(0x0711, 0x0902) },
 	{ USB_DEVICE(0x0711, 0x0903) },
 	{ USB_DEVICE(0x0711, 0x0918) },
+	{ USB_DEVICE(0x0711, 0x0920) },
 	{ USB_DEVICE(0x182d, 0x021c) },
 	{ USB_DEVICE(0x182d, 0x0269) },
 	{ }
--- linux-mvl-dove-2.6.32.orig/drivers/usb/serial/cp210x.c
+++ linux-mvl-dove-2.6.32/drivers/usb/serial/cp210x.c
@@ -51,16 +51,18 @@
 static int cp210x_startup(struct usb_serial *);
 static void cp210x_disconnect(struct usb_serial *);
 static void cp210x_dtr_rts(struct usb_serial_port *p, int on);
-static int cp210x_carrier_raised(struct usb_serial_port *p);
 
 static int debug;
 
 static struct usb_device_id id_table [] = {
+	{ USB_DEVICE(0x045B, 0x0053) }, /* Renesas RX610 RX-Stick */
 	{ USB_DEVICE(0x0471, 0x066A) }, /* AKTAKOM ACE-1001 cable */
 	{ USB_DEVICE(0x0489, 0xE000) }, /* Pirelli Broadband S.p.A, DP-L10 SIP/GSM Mobile */
 	{ USB_DEVICE(0x0745, 0x1000) }, /* CipherLab USB CCD Barcode Scanner 1000 */
 	{ USB_DEVICE(0x08e6, 0x5501) }, /* Gemalto Prox-PU/CU contactless smartcard reader */
 	{ USB_DEVICE(0x08FD, 0x000A) }, /* Digianswer A/S , ZigBee/802.15.4 MAC Device */
+	{ USB_DEVICE(0x0BED, 0x1100) }, /* MEI (TM) Cashflow-SC Bill/Voucher Acceptor */
+	{ USB_DEVICE(0x0BED, 0x1101) }, /* MEI series 2000 Combo Acceptor */
 	{ USB_DEVICE(0x0FCF, 0x1003) }, /* Dynastream ANT development board */
 	{ USB_DEVICE(0x0FCF, 0x1004) }, /* Dynastream ANT2USB */
 	{ USB_DEVICE(0x0FCF, 0x1006) }, /* Dynastream ANT development board */
@@ -72,9 +74,12 @@
 	{ USB_DEVICE(0x10C4, 0x1601) }, /* Arkham Technology DS101 Adapter */
 	{ USB_DEVICE(0x10C4, 0x800A) }, /* SPORTident BSM7-D-USB main station */
 	{ USB_DEVICE(0x10C4, 0x803B) }, /* Pololu USB-serial converter */
+	{ USB_DEVICE(0x10C4, 0x8044) }, /* Cygnal Debug Adapter */
+	{ USB_DEVICE(0x10C4, 0x804E) }, /* Software Bisque Paramount ME build-in converter */
 	{ USB_DEVICE(0x10C4, 0x8053) }, /* Enfora EDG1228 */
 	{ USB_DEVICE(0x10C4, 0x8054) }, /* Enfora GSM2228 */
 	{ USB_DEVICE(0x10C4, 0x8066) }, /* Argussoft In-System Programmer */
+	{ USB_DEVICE(0x10C4, 0x806F) }, /* IMS USB to RS422 Converter Cable */
 	{ USB_DEVICE(0x10C4, 0x807A) }, /* Crumb128 board */
 	{ USB_DEVICE(0x10C4, 0x80CA) }, /* Degree Controls Inc */
 	{ USB_DEVICE(0x10C4, 0x80DD) }, /* Tracient RFID */
@@ -84,26 +89,38 @@
 	{ USB_DEVICE(0x10C4, 0x813F) }, /* Tams Master Easy Control */
 	{ USB_DEVICE(0x10C4, 0x814A) }, /* West Mountain Radio RIGblaster P&P */
 	{ USB_DEVICE(0x10C4, 0x814B) }, /* West Mountain Radio RIGtalk */
+	{ USB_DEVICE(0x10C4, 0x8156) }, /* B&G H3000 link cable */
 	{ USB_DEVICE(0x10C4, 0x815E) }, /* Helicomm IP-Link 1220-DVM */
+	{ USB_DEVICE(0x10C4, 0x818B) }, /* AVIT Research USB to TTL */
 	{ USB_DEVICE(0x10C4, 0x819F) }, /* MJS USB Toslink Switcher */
 	{ USB_DEVICE(0x10C4, 0x81A6) }, /* ThinkOptics WavIt */
 	{ USB_DEVICE(0x10C4, 0x81AC) }, /* MSD Dash Hawk */
+	{ USB_DEVICE(0x10C4, 0x81AD) }, /* INSYS USB Modem */
 	{ USB_DEVICE(0x10C4, 0x81C8) }, /* Lipowsky Industrie Elektronik GmbH, Baby-JTAG */
 	{ USB_DEVICE(0x10C4, 0x81E2) }, /* Lipowsky Industrie Elektronik GmbH, Baby-LIN */
 	{ USB_DEVICE(0x10C4, 0x81E7) }, /* Aerocomm Radio */
+	{ USB_DEVICE(0x10C4, 0x81E8) }, /* Zephyr Bioharness */
 	{ USB_DEVICE(0x10C4, 0x81F2) }, /* C1007 HF band RFID controller */
 	{ USB_DEVICE(0x10C4, 0x8218) }, /* Lipowsky Industrie Elektronik GmbH, HARP-1 */
 	{ USB_DEVICE(0x10C4, 0x822B) }, /* Modem EDGE(GSM) Comander 2 */
 	{ USB_DEVICE(0x10C4, 0x826B) }, /* Cygnal Integrated Products, Inc., Fasttrax GPS demostration module */
-	{ USB_DEVICE(0x10c4, 0x8293) }, /* Telegesys ETRX2USB */
+	{ USB_DEVICE(0x10C4, 0x8293) }, /* Telegesys ETRX2USB */
 	{ USB_DEVICE(0x10C4, 0x82F9) }, /* Procyon AVS */
 	{ USB_DEVICE(0x10C4, 0x8341) }, /* Siemens MC35PU GPRS Modem */
 	{ USB_DEVICE(0x10C4, 0x8382) }, /* Cygnal Integrated Products, Inc. */
 	{ USB_DEVICE(0x10C4, 0x83A8) }, /* Amber Wireless AMB2560 */
+	{ USB_DEVICE(0x10C4, 0x83D8) }, /* DekTec DTA Plus VHF/UHF Booster/Attenuator */
 	{ USB_DEVICE(0x10C4, 0x8411) }, /* Kyocera GPS Module */
+	{ USB_DEVICE(0x10C4, 0x8418) }, /* IRZ Automation Teleport SG-10 GSM/GPRS Modem */
 	{ USB_DEVICE(0x10C4, 0x846E) }, /* BEI USB Sensor Interface (VCP) */
+	{ USB_DEVICE(0x10C4, 0x8477) }, /* Balluff RFID */
+	{ USB_DEVICE(0x10C4, 0x85EA) }, /* AC-Services IBUS-IF */
+	{ USB_DEVICE(0x10C4, 0x85EB) }, /* AC-Services CIS-IBUS */
+	{ USB_DEVICE(0x10C4, 0x8664) }, /* AC-Services CAN-IF */
+	{ USB_DEVICE(0x10C4, 0x8665) }, /* AC-Services OBD-IF */
 	{ USB_DEVICE(0x10C4, 0xEA60) }, /* Silicon Labs factory default */
 	{ USB_DEVICE(0x10C4, 0xEA61) }, /* Silicon Labs factory default */
+	{ USB_DEVICE(0x10C4, 0xEA71) }, /* Infinity GPS-MIC-1 Radio Monophone */
 	{ USB_DEVICE(0x10C4, 0xF001) }, /* Elan Digital Systems USBscope50 */
 	{ USB_DEVICE(0x10C4, 0xF002) }, /* Elan Digital Systems USBwave12 */
 	{ USB_DEVICE(0x10C4, 0xF003) }, /* Elan Digital Systems USBpulse100 */
@@ -114,7 +131,14 @@
 	{ USB_DEVICE(0x1555, 0x0004) }, /* Owen AC4 USB-RS485 Converter */
 	{ USB_DEVICE(0x166A, 0x0303) }, /* Clipsal 5500PCU C-Bus USB interface */
 	{ USB_DEVICE(0x16D6, 0x0001) }, /* Jablotron serial interface */
+	{ USB_DEVICE(0x16DC, 0x0010) }, /* W-IE-NE-R Plein & Baus GmbH PL512 Power Supply */
+	{ USB_DEVICE(0x16DC, 0x0011) }, /* W-IE-NE-R Plein & Baus GmbH RCM Remote Control for MARATON Power Supply */
+	{ USB_DEVICE(0x16DC, 0x0012) }, /* W-IE-NE-R Plein & Baus GmbH MPOD Multi Channel Power Supply */
+	{ USB_DEVICE(0x16DC, 0x0015) }, /* W-IE-NE-R Plein & Baus GmbH CML Control, Monitoring and Data Logger */
+	{ USB_DEVICE(0x17F4, 0xAAAA) }, /* Wavesense Jazz blood glucose meter */
+	{ USB_DEVICE(0x1843, 0x0200) }, /* Vaisala USB Instrument Cable */
 	{ USB_DEVICE(0x18EF, 0xE00F) }, /* ELV USB-I2C-Interface */
+	{ USB_DEVICE(0x1BE3, 0x07A6) }, /* WAGO 750-923 USB Service Cable */
 	{ USB_DEVICE(0x413C, 0x9500) }, /* DW700 GPS USB interface */
 	{ } /* Terminating Entry */
 };
@@ -145,8 +169,7 @@
 	.tiocmset		= cp210x_tiocmset,
 	.attach			= cp210x_startup,
 	.disconnect		= cp210x_disconnect,
-	.dtr_rts		= cp210x_dtr_rts,
-	.carrier_raised		= cp210x_carrier_raised
+	.dtr_rts		= cp210x_dtr_rts
 };
 
 /* Config request types */
@@ -207,8 +230,8 @@
 #define BITS_STOP_2		0x0002
 
 /* CP210X_SET_BREAK */
-#define BREAK_ON		0x0000
-#define BREAK_OFF		0x0001
+#define BREAK_ON		0x0001
+#define BREAK_OFF		0x0000
 
 /* CP210X_(SET_MHS|GET_MDMSTS) */
 #define CONTROL_DTR		0x0001
@@ -780,15 +803,6 @@
 	return result;
 }
 
-static int cp210x_carrier_raised(struct usb_serial_port *p)
-{
-	unsigned int control;
-	cp210x_get_config(p, CP210X_GET_MDMSTS, &control, 1);
-	if (control & CONTROL_DCD)
-		return 1;
-	return 0;
-}
-
 static void cp210x_break_ctl (struct tty_struct *tty, int break_state)
 {
 	struct usb_serial_port *port = tty->driver_data;
--- linux-mvl-dove-2.6.32.orig/drivers/usb/serial/mos7720.c
+++ linux-mvl-dove-2.6.32/drivers/usb/serial/mos7720.c
@@ -1466,6 +1466,9 @@
 
 	case TIOCGICOUNT:
 		cnow = mos7720_port->icount;
+
+		memset(&icount, 0, sizeof(struct serial_icounter_struct));
+
 		icount.cts = cnow.cts;
 		icount.dsr = cnow.dsr;
 		icount.rng = cnow.rng;
--- linux-mvl-dove-2.6.32.orig/drivers/usb/serial/ch341.c
+++ linux-mvl-dove-2.6.32/drivers/usb/serial/ch341.c
@@ -73,6 +73,7 @@
 static struct usb_device_id id_table [] = {
 	{ USB_DEVICE(0x4348, 0x5523) },
 	{ USB_DEVICE(0x1a86, 0x7523) },
+	{ USB_DEVICE(0x1a86, 0x5523) },
 	{ },
 };
 MODULE_DEVICE_TABLE(usb, id_table);
@@ -479,12 +480,22 @@
 	if (actual_length >= 4) {
 		struct ch341_private *priv = usb_get_serial_port_data(port);
 		unsigned long flags;
+		u8 prev_line_status = priv->line_status;
 
 		spin_lock_irqsave(&priv->lock, flags);
 		priv->line_status = (~(data[2])) & CH341_BITS_MODEM_STAT;
 		if ((data[1] & CH341_MULT_STAT))
 			priv->multi_status_change = 1;
 		spin_unlock_irqrestore(&priv->lock, flags);
+
+		if ((priv->line_status ^ prev_line_status) & CH341_BIT_DCD) {
+			struct tty_struct *tty = tty_port_tty_get(&port->port);
+			if (tty)
+				usb_serial_handle_dcd_change(port, tty,
+					    priv->line_status & CH341_BIT_DCD);
+			tty_kref_put(tty);
+		}
+
 		wake_up_interruptible(&priv->delta_msr_wait);
 	}
 
--- linux-mvl-dove-2.6.32.orig/drivers/usb/serial/ftdi_sio.c
+++ linux-mvl-dove-2.6.32/drivers/usb/serial/ftdi_sio.c
@@ -44,12 +44,13 @@
 #include <linux/serial.h>
 #include <linux/usb/serial.h>
 #include "ftdi_sio.h"
+#include "ftdi_sio_ids.h"
 
 /*
  * Version Information
  */
 #define DRIVER_VERSION "v1.5.0"
-#define DRIVER_AUTHOR "Greg Kroah-Hartman <greg@kroah.com>, Bill Ryder <bryder@sgi.com>, Kuba Ober <kuba@mareimbrium.org>"
+#define DRIVER_AUTHOR "Greg Kroah-Hartman <greg@kroah.com>, Bill Ryder <bryder@sgi.com>, Kuba Ober <kuba@mareimbrium.org>, Andreas Mohr"
 #define DRIVER_DESC "USB FTDI Serial Converters Driver"
 
 static int debug;
@@ -103,6 +104,7 @@
 static int   ftdi_jtag_probe(struct usb_serial *serial);
 static int   ftdi_mtxorb_hack_setup(struct usb_serial *serial);
 static int   ftdi_NDI_device_setup(struct usb_serial *serial);
+static int   ftdi_stmclite_probe(struct usb_serial *serial);
 static void  ftdi_USB_UIRT_setup(struct ftdi_private *priv);
 static void  ftdi_HE_TIRA1_setup(struct ftdi_private *priv);
 
@@ -126,6 +128,10 @@
 	.port_probe = ftdi_HE_TIRA1_setup,
 };
 
+static struct ftdi_sio_quirk ftdi_stmclite_quirk = {
+	.probe	= ftdi_stmclite_probe,
+};
+
 /*
  * The 8U232AM has the same API as the sio except for:
  * - it can support MUCH higher baudrates; up to:
@@ -144,10 +150,17 @@
 
 
 
+/*
+ * Device ID not listed? Test via module params product/vendor or
+ * /sys/bus/usb/ftdi_sio/new_id, then send patch/report!
+ */
 static struct usb_device_id id_table_combined [] = {
+	{ USB_DEVICE(FTDI_VID, FTDI_CTI_MINI_PID) },
+	{ USB_DEVICE(FTDI_VID, FTDI_CTI_NANO_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_AMC232_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_CANUSB_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_CANDAPTER_PID) },
+	{ USB_DEVICE(FTDI_VID, FTDI_NXTCAM_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_SCS_DEVICE_0_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_SCS_DEVICE_1_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_SCS_DEVICE_2_PID) },
@@ -156,6 +169,9 @@
 	{ USB_DEVICE(FTDI_VID, FTDI_SCS_DEVICE_5_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_SCS_DEVICE_6_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_SCS_DEVICE_7_PID) },
+	{ USB_DEVICE(FTDI_VID, FTDI_USINT_CAT_PID) },
+	{ USB_DEVICE(FTDI_VID, FTDI_USINT_WKEY_PID) },
+	{ USB_DEVICE(FTDI_VID, FTDI_USINT_RS232_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_ACTZWAVE_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_IRTRANS_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_IPLUS_PID) },
@@ -173,9 +189,11 @@
 	{ USB_DEVICE(FTDI_VID, FTDI_OPENDCC_SNIFFER_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_OPENDCC_THROTTLE_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_OPENDCC_GATEWAY_PID) },
+	{ USB_DEVICE(FTDI_VID, FTDI_OPENDCC_GBM_PID) },
 	{ USB_DEVICE(INTERBIOMETRICS_VID, INTERBIOMETRICS_IOBOARD_PID) },
 	{ USB_DEVICE(INTERBIOMETRICS_VID, INTERBIOMETRICS_MINI_IOBOARD_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_SPROG_II) },
+	{ USB_DEVICE(FTDI_VID, FTDI_LENZ_LIUSB_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_XF_632_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_XF_634_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_XF_547_PID) },
@@ -195,6 +213,7 @@
 	{ USB_DEVICE(FTDI_VID, FTDI_MTXORB_5_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_MTXORB_6_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_R2000KU_TRUE_RNG) },
+	{ USB_DEVICE(FTDI_VID, FTDI_VARDAAN_PID) },
 	{ USB_DEVICE(MTXORB_VID, MTXORB_FTDI_RANGE_0100_PID) },
 	{ USB_DEVICE(MTXORB_VID, MTXORB_FTDI_RANGE_0101_PID) },
 	{ USB_DEVICE(MTXORB_VID, MTXORB_FTDI_RANGE_0102_PID) },
@@ -512,6 +531,7 @@
 	{ USB_DEVICE(SEALEVEL_VID, SEALEVEL_2803_8_PID) },
 	{ USB_DEVICE(IDTECH_VID, IDTECH_IDT1221U_PID) },
 	{ USB_DEVICE(OCT_VID, OCT_US101_PID) },
+	{ USB_DEVICE(OCT_VID, OCT_DK201_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_HE_TIRA1_PID),
 		.driver_info = (kernel_ulong_t)&ftdi_HE_TIRA1_quirk },
 	{ USB_DEVICE(FTDI_VID, FTDI_USB_UIRT_PID),
@@ -550,10 +570,18 @@
 	{ USB_DEVICE(FTDI_VID, FTDI_IBS_APP70_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_IBS_PEDO_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_IBS_PROD_PID) },
+	{ USB_DEVICE(FTDI_VID, FTDI_TAVIR_STK500_PID) },
 	/*
-	 * Due to many user requests for multiple ELV devices we enable
-	 * them by default.
+	 * ELV devices:
 	 */
+	{ USB_DEVICE(FTDI_VID, FTDI_ELV_USR_PID) },
+	{ USB_DEVICE(FTDI_VID, FTDI_ELV_MSM1_PID) },
+	{ USB_DEVICE(FTDI_VID, FTDI_ELV_KL100_PID) },
+	{ USB_DEVICE(FTDI_VID, FTDI_ELV_WS550_PID) },
+	{ USB_DEVICE(FTDI_VID, FTDI_ELV_EC3000_PID) },
+	{ USB_DEVICE(FTDI_VID, FTDI_ELV_WS888_PID) },
+	{ USB_DEVICE(FTDI_VID, FTDI_ELV_TWS550_PID) },
+	{ USB_DEVICE(FTDI_VID, FTDI_ELV_FEM_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_ELV_CLI7000_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_ELV_PPS7330_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_ELV_TFM100_PID) },
@@ -570,11 +598,17 @@
 	{ USB_DEVICE(FTDI_VID, FTDI_ELV_PCK100_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_ELV_RFP500_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_ELV_FS20SIG_PID) },
+	{ USB_DEVICE(FTDI_VID, FTDI_ELV_UTP8_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_ELV_WS300PC_PID) },
+	{ USB_DEVICE(FTDI_VID, FTDI_ELV_WS444PC_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_ELV_FHZ1300PC_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_ELV_EM1010PC_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_ELV_WS500_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_ELV_HS485_PID) },
+	{ USB_DEVICE(FTDI_VID, FTDI_ELV_UMS100_PID) },
+	{ USB_DEVICE(FTDI_VID, FTDI_ELV_TFD128_PID) },
+	{ USB_DEVICE(FTDI_VID, FTDI_ELV_FM3RX_PID) },
+	{ USB_DEVICE(FTDI_VID, FTDI_ELV_WS777_PID) },
 	{ USB_DEVICE(FTDI_VID, LINX_SDMUSBQSS_PID) },
 	{ USB_DEVICE(FTDI_VID, LINX_MASTERDEVEL2_PID) },
 	{ USB_DEVICE(FTDI_VID, LINX_FUTURE_0_PID) },
@@ -595,12 +629,29 @@
 	{ USB_DEVICE(FTDI_VID, FTDI_OCEANIC_PID) },
 	{ USB_DEVICE(TTI_VID, TTI_QL355P_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_RM_CANVIEW_PID) },
+	{ USB_DEVICE(ACTON_VID, ACTON_SPECTRAPRO_PID) },
+	{ USB_DEVICE(CONTEC_VID, CONTEC_COM1USBH_PID) },
 	{ USB_DEVICE(BANDB_VID, BANDB_USOTL4_PID) },
 	{ USB_DEVICE(BANDB_VID, BANDB_USTL4_PID) },
 	{ USB_DEVICE(BANDB_VID, BANDB_USO9ML2_PID) },
+	{ USB_DEVICE(BANDB_VID, BANDB_USOPTL4_PID) },
+	{ USB_DEVICE(BANDB_VID, BANDB_USPTL4_PID) },
+	{ USB_DEVICE(BANDB_VID, BANDB_USO9ML2DR_2_PID) },
+	{ USB_DEVICE(BANDB_VID, BANDB_USO9ML2DR_PID) },
+	{ USB_DEVICE(BANDB_VID, BANDB_USOPTL4DR2_PID) },
+	{ USB_DEVICE(BANDB_VID, BANDB_USOPTL4DR_PID) },
+	{ USB_DEVICE(BANDB_VID, BANDB_485USB9F_2W_PID) },
+	{ USB_DEVICE(BANDB_VID, BANDB_485USB9F_4W_PID) },
+	{ USB_DEVICE(BANDB_VID, BANDB_232USB9M_PID) },
+	{ USB_DEVICE(BANDB_VID, BANDB_485USBTB_2W_PID) },
+	{ USB_DEVICE(BANDB_VID, BANDB_485USBTB_4W_PID) },
+	{ USB_DEVICE(BANDB_VID, BANDB_TTL5USB9M_PID) },
+	{ USB_DEVICE(BANDB_VID, BANDB_TTL3USB9M_PID) },
+	{ USB_DEVICE(BANDB_VID, BANDB_ZZ_PROG1_USB_PID) },
 	{ USB_DEVICE(FTDI_VID, EVER_ECO_PRO_CDS) },
 	{ USB_DEVICE(FTDI_VID, FTDI_4N_GALAXY_DE_1_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_4N_GALAXY_DE_2_PID) },
+	{ USB_DEVICE(FTDI_VID, FTDI_4N_GALAXY_DE_3_PID) },
 	{ USB_DEVICE(FTDI_VID, XSENS_CONVERTER_0_PID) },
 	{ USB_DEVICE(FTDI_VID, XSENS_CONVERTER_1_PID) },
 	{ USB_DEVICE(FTDI_VID, XSENS_CONVERTER_2_PID) },
@@ -624,6 +675,7 @@
 	{ USB_DEVICE(EVOLUTION_VID, EVOLUTION_ER1_PID) },
 	{ USB_DEVICE(EVOLUTION_VID, EVO_HYBRID_PID) },
 	{ USB_DEVICE(EVOLUTION_VID, EVO_RCM4_PID) },
+	{ USB_DEVICE(CONTEC_VID, CONTEC_COM1USBH_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_ARTEMIS_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_ATIK_ATK16_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_ATIK_ATK16C_PID) },
@@ -640,8 +692,17 @@
 	{ USB_DEVICE(FTDI_VID, FTDI_PCDJ_DAC2_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_RRCIRKITS_LOCOBUFFER_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_ASK_RDR400_PID) },
-	{ USB_DEVICE(ICOM_ID1_VID, ICOM_ID1_PID) },
-	{ USB_DEVICE(PAPOUCH_VID, PAPOUCH_TMU_PID) },
+	{ USB_DEVICE(ICOM_VID, ICOM_ID_1_PID) },
+	{ USB_DEVICE(ICOM_VID, ICOM_OPC_U_UC_PID) },
+	{ USB_DEVICE(ICOM_VID, ICOM_ID_RP2C1_PID) },
+	{ USB_DEVICE(ICOM_VID, ICOM_ID_RP2C2_PID) },
+	{ USB_DEVICE(ICOM_VID, ICOM_ID_RP2D_PID) },
+	{ USB_DEVICE(ICOM_VID, ICOM_ID_RP2VT_PID) },
+	{ USB_DEVICE(ICOM_VID, ICOM_ID_RP2VR_PID) },
+	{ USB_DEVICE(ICOM_VID, ICOM_ID_RP4KVT_PID) },
+	{ USB_DEVICE(ICOM_VID, ICOM_ID_RP4KVR_PID) },
+	{ USB_DEVICE(ICOM_VID, ICOM_ID_RP2KVT_PID) },
+	{ USB_DEVICE(ICOM_VID, ICOM_ID_RP2KVR_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_ACG_HFDUAL_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_YEI_SERVOCENTER31_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_THORLABS_PID) },
@@ -662,6 +723,8 @@
 	{ USB_DEVICE(FTDI_VID, FTDI_NDI_AURORA_SCU_PID),
 		.driver_info = (kernel_ulong_t)&ftdi_NDI_device_quirk },
 	{ USB_DEVICE(TELLDUS_VID, TELLDUS_TELLSTICK_PID) },
+	{ USB_DEVICE(RTSYSTEMS_VID, RTSYSTEMS_SERIAL_VX7_PID) },
+	{ USB_DEVICE(RTSYSTEMS_VID, RTSYSTEMS_CT29B_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_MAXSTREAM_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_PHI_FISCO_PID) },
 	{ USB_DEVICE(TML_VID, TML_USB_SERIAL_PID) },
@@ -681,7 +744,37 @@
 		.driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
 	{ USB_DEVICE(RATOC_VENDOR_ID, RATOC_PRODUCT_ID_USB60F) },
 	{ USB_DEVICE(FTDI_VID, FTDI_REU_TINY_PID) },
+
+	/* Papouch devices based on FTDI chip */
+	{ USB_DEVICE(PAPOUCH_VID, PAPOUCH_SB485_PID) },
+	{ USB_DEVICE(PAPOUCH_VID, PAPOUCH_AP485_PID) },
+	{ USB_DEVICE(PAPOUCH_VID, PAPOUCH_SB422_PID) },
+	{ USB_DEVICE(PAPOUCH_VID, PAPOUCH_SB485_2_PID) },
+	{ USB_DEVICE(PAPOUCH_VID, PAPOUCH_AP485_2_PID) },
+	{ USB_DEVICE(PAPOUCH_VID, PAPOUCH_SB422_2_PID) },
+	{ USB_DEVICE(PAPOUCH_VID, PAPOUCH_SB485S_PID) },
+	{ USB_DEVICE(PAPOUCH_VID, PAPOUCH_SB485C_PID) },
+	{ USB_DEVICE(PAPOUCH_VID, PAPOUCH_LEC_PID) },
+	{ USB_DEVICE(PAPOUCH_VID, PAPOUCH_SB232_PID) },
+	{ USB_DEVICE(PAPOUCH_VID, PAPOUCH_TMU_PID) },
+	{ USB_DEVICE(PAPOUCH_VID, PAPOUCH_IRAMP_PID) },
+	{ USB_DEVICE(PAPOUCH_VID, PAPOUCH_DRAK5_PID) },
+	{ USB_DEVICE(PAPOUCH_VID, PAPOUCH_QUIDO8x8_PID) },
 	{ USB_DEVICE(PAPOUCH_VID, PAPOUCH_QUIDO4x4_PID) },
+	{ USB_DEVICE(PAPOUCH_VID, PAPOUCH_QUIDO2x2_PID) },
+	{ USB_DEVICE(PAPOUCH_VID, PAPOUCH_QUIDO10x1_PID) },
+	{ USB_DEVICE(PAPOUCH_VID, PAPOUCH_QUIDO30x3_PID) },
+	{ USB_DEVICE(PAPOUCH_VID, PAPOUCH_QUIDO60x3_PID) },
+	{ USB_DEVICE(PAPOUCH_VID, PAPOUCH_QUIDO2x16_PID) },
+	{ USB_DEVICE(PAPOUCH_VID, PAPOUCH_QUIDO3x32_PID) },
+	{ USB_DEVICE(PAPOUCH_VID, PAPOUCH_DRAK6_PID) },
+	{ USB_DEVICE(PAPOUCH_VID, PAPOUCH_UPSUSB_PID) },
+	{ USB_DEVICE(PAPOUCH_VID, PAPOUCH_MU_PID) },
+	{ USB_DEVICE(PAPOUCH_VID, PAPOUCH_SIMUKEY_PID) },
+	{ USB_DEVICE(PAPOUCH_VID, PAPOUCH_AD4USB_PID) },
+	{ USB_DEVICE(PAPOUCH_VID, PAPOUCH_GMUX_PID) },
+	{ USB_DEVICE(PAPOUCH_VID, PAPOUCH_GMSR_PID) },
+
 	{ USB_DEVICE(FTDI_VID, FTDI_DOMINTELL_DGQG_PID) },
 	{ USB_DEVICE(FTDI_VID, FTDI_DOMINTELL_DUSB_PID) },
 	{ USB_DEVICE(ALTI2_VID, ALTI2_N3_PID) },
@@ -702,7 +795,41 @@
 	{ USB_DEVICE(FTDI_VID, MARVELL_OPENRD_PID),
 		.driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
 	{ USB_DEVICE(FTDI_VID, HAMEG_HO820_PID) },
+	{ USB_DEVICE(FTDI_VID, HAMEG_HO720_PID) },
+	{ USB_DEVICE(FTDI_VID, HAMEG_HO730_PID) },
 	{ USB_DEVICE(FTDI_VID, HAMEG_HO870_PID) },
+	{ USB_DEVICE(FTDI_VID, MJSG_GENERIC_PID) },
+	{ USB_DEVICE(FTDI_VID, MJSG_SR_RADIO_PID) },
+	{ USB_DEVICE(FTDI_VID, MJSG_HD_RADIO_PID) },
+	{ USB_DEVICE(FTDI_VID, MJSG_XM_RADIO_PID) },
+	{ USB_DEVICE(FTDI_VID, XVERVE_SIGNALYZER_ST_PID),
+		.driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
+	{ USB_DEVICE(FTDI_VID, XVERVE_SIGNALYZER_SLITE_PID),
+		.driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
+	{ USB_DEVICE(FTDI_VID, XVERVE_SIGNALYZER_SH2_PID),
+		.driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
+	{ USB_DEVICE(FTDI_VID, XVERVE_SIGNALYZER_SH4_PID),
+		.driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
+	{ USB_DEVICE(FTDI_VID, SEGWAY_RMP200_PID) },
+	{ USB_DEVICE(FTDI_VID, ACCESIO_COM4SM_PID) },
+	{ USB_DEVICE(IONICS_VID, IONICS_PLUGCOMPUTER_PID),
+		.driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
+	{ USB_DEVICE(FTDI_VID, FTDI_CHAMSYS_24_MASTER_WING_PID) },
+	{ USB_DEVICE(FTDI_VID, FTDI_CHAMSYS_PC_WING_PID) },
+	{ USB_DEVICE(FTDI_VID, FTDI_CHAMSYS_USB_DMX_PID) },
+	{ USB_DEVICE(FTDI_VID, FTDI_CHAMSYS_MIDI_TIMECODE_PID) },
+	{ USB_DEVICE(FTDI_VID, FTDI_CHAMSYS_MINI_WING_PID) },
+	{ USB_DEVICE(FTDI_VID, FTDI_CHAMSYS_MAXI_WING_PID) },
+	{ USB_DEVICE(FTDI_VID, FTDI_CHAMSYS_MEDIA_WING_PID) },
+	{ USB_DEVICE(FTDI_VID, FTDI_CHAMSYS_WING_PID) },
+	{ USB_DEVICE(FTDI_VID, FTDI_SCIENCESCOPE_LOGBOOKML_PID) },
+	{ USB_DEVICE(FTDI_VID, FTDI_SCIENCESCOPE_LS_LOGBOOK_PID) },
+	{ USB_DEVICE(FTDI_VID, FTDI_SCIENCESCOPE_HS_LOGBOOK_PID) },
+	{ USB_DEVICE(FTDI_VID, FTDI_DOTEC_PID) },
+	{ USB_DEVICE(QIHARDWARE_VID, MILKYMISTONE_JTAGSERIAL_PID),
+		.driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
+	{ USB_DEVICE(ST_VID, ST_STMCLT1030_PID),
+		.driver_info = (kernel_ulong_t)&ftdi_stmclite_quirk },
 	{ },					/* Optional parameter entry */
 	{ }					/* Terminating entry */
 };
@@ -1357,7 +1484,7 @@
 	}
 
 	/* set max packet size based on descriptor */
-	priv->max_packet_size = ep_desc->wMaxPacketSize;
+	priv->max_packet_size = le16_to_cpu(ep_desc->wMaxPacketSize);
 
 	dev_info(&udev->dev, "Setting MaxPacketSize %d\n", priv->max_packet_size);
 }
@@ -1636,6 +1763,25 @@
 }
 
 /*
+ * First and second port on STMCLiteadaptors is reserved for JTAG interface
+ * and the forth port for pio
+ */
+static int ftdi_stmclite_probe(struct usb_serial *serial)
+{
+	struct usb_device *udev = serial->dev;
+	struct usb_interface *interface = serial->interface;
+
+	dbg("%s", __func__);
+
+	if (interface == udev->actconfig->interface[2])
+		return 0;
+
+	dev_info(&udev->dev, "Ignoring serial port reserved for JTAG\n");
+
+	return -ENODEV;
+}
+
+/*
  * The Matrix Orbital VK204-25-USB has an invalid IN endpoint.
  * We have to correct it if we want to read from it.
  */
--- linux-mvl-dove-2.6.32.orig/drivers/usb/serial/pl2303.c
+++ linux-mvl-dove-2.6.32/drivers/usb/serial/pl2303.c
@@ -59,6 +59,8 @@
 	{ USB_DEVICE(PL2303_VENDOR_ID, PL2303_PRODUCT_ID_ALDIGA) },
 	{ USB_DEVICE(PL2303_VENDOR_ID, PL2303_PRODUCT_ID_MMX) },
 	{ USB_DEVICE(PL2303_VENDOR_ID, PL2303_PRODUCT_ID_GPRS) },
+	{ USB_DEVICE(PL2303_VENDOR_ID, PL2303_PRODUCT_ID_HCR331) },
+	{ USB_DEVICE(PL2303_VENDOR_ID, PL2303_PRODUCT_ID_MOTOROLA) },
 	{ USB_DEVICE(IODATA_VENDOR_ID, IODATA_PRODUCT_ID) },
 	{ USB_DEVICE(IODATA_VENDOR_ID, IODATA_PRODUCT_ID_RSAQ5) },
 	{ USB_DEVICE(ATEN_VENDOR_ID, ATEN_PRODUCT_ID) },
@@ -95,8 +97,11 @@
 	{ USB_DEVICE(SUPERIAL_VENDOR_ID, SUPERIAL_PRODUCT_ID) },
 	{ USB_DEVICE(HP_VENDOR_ID, HP_LD220_PRODUCT_ID) },
 	{ USB_DEVICE(CRESSI_VENDOR_ID, CRESSI_EDY_PRODUCT_ID) },
+	{ USB_DEVICE(ZEAGLE_VENDOR_ID, ZEAGLE_N2ITION3_PRODUCT_ID) },
 	{ USB_DEVICE(SONY_VENDOR_ID, SONY_QN3USB_PRODUCT_ID) },
 	{ USB_DEVICE(SANWA_VENDOR_ID, SANWA_PRODUCT_ID) },
+	{ USB_DEVICE(ADLINK_VENDOR_ID, ADLINK_ND6530_PRODUCT_ID) },
+	{ USB_DEVICE(WINCHIPHEAD_VENDOR_ID, WINCHIPHEAD_USBSER_PRODUCT_ID) },
 	{ }					/* Terminating entry */
 };
 
@@ -954,9 +959,11 @@
 {
 
 	struct pl2303_private *priv = usb_get_serial_port_data(port);
+	struct tty_struct *tty;
 	unsigned long flags;
 	u8 status_idx = UART_STATE;
 	u8 length = UART_STATE + 1;
+	u8 prev_line_status;
 	u16 idv, idp;
 
 	idv = le16_to_cpu(port->serial->dev->descriptor.idVendor);
@@ -978,11 +985,20 @@
 
 	/* Save off the uart status for others to look at */
 	spin_lock_irqsave(&priv->lock, flags);
+	prev_line_status = priv->line_status;
 	priv->line_status = data[status_idx];
 	spin_unlock_irqrestore(&priv->lock, flags);
 	if (priv->line_status & UART_BREAK_ERROR)
 		usb_serial_handle_break(port);
 	wake_up_interruptible(&priv->delta_msr_wait);
+
+	tty = tty_port_tty_get(&port->port);
+	if (!tty)
+		return;
+	if ((priv->line_status ^ prev_line_status) & UART_DCD)
+		usb_serial_handle_dcd_change(port, tty,
+				priv->line_status & UART_DCD);
+	tty_kref_put(tty);
 }
 
 static void pl2303_read_int_callback(struct urb *urb)
--- linux-mvl-dove-2.6.32.orig/drivers/usb/serial/digi_acceleport.c
+++ linux-mvl-dove-2.6.32/drivers/usb/serial/digi_acceleport.c
@@ -455,7 +455,6 @@
 static int digi_chars_in_buffer(struct tty_struct *tty);
 static int digi_open(struct tty_struct *tty, struct usb_serial_port *port);
 static void digi_close(struct usb_serial_port *port);
-static int digi_carrier_raised(struct usb_serial_port *port);
 static void digi_dtr_rts(struct usb_serial_port *port, int on);
 static int digi_startup_device(struct usb_serial *serial);
 static int digi_startup(struct usb_serial *serial);
@@ -511,7 +510,6 @@
 	.open =				digi_open,
 	.close =			digi_close,
 	.dtr_rts =			digi_dtr_rts,
-	.carrier_raised =		digi_carrier_raised,
 	.write =			digi_write,
 	.write_room =			digi_write_room,
 	.write_bulk_callback = 		digi_write_bulk_callback,
@@ -1338,14 +1336,6 @@
 	digi_set_modem_signals(port, on * (TIOCM_DTR|TIOCM_RTS), 1);
 }
 
-static int digi_carrier_raised(struct usb_serial_port *port)
-{
-	struct digi_port *priv = usb_get_serial_port_data(port);
-	if (priv->dp_modem_signals & TIOCM_CD)
-		return 1;
-	return 0;
-}
-
 static int digi_open(struct tty_struct *tty, struct usb_serial_port *port)
 {
 	int ret;
--- linux-mvl-dove-2.6.32.orig/drivers/usb/serial/ir-usb.c
+++ linux-mvl-dove-2.6.32/drivers/usb/serial/ir-usb.c
@@ -312,6 +312,7 @@
 		kfree(port->read_urb->transfer_buffer);
 		port->read_urb->transfer_buffer = buffer;
 		port->read_urb->transfer_buffer_length = buffer_size;
+		port->bulk_in_buffer = buffer;
 
 		buffer = kmalloc(buffer_size, GFP_KERNEL);
 		if (!buffer) {
@@ -321,6 +322,7 @@
 		kfree(port->write_urb->transfer_buffer);
 		port->write_urb->transfer_buffer = buffer;
 		port->write_urb->transfer_buffer_length = buffer_size;
+		port->bulk_out_buffer = buffer;
 		port->bulk_out_size = buffer_size;
 	}
 
--- linux-mvl-dove-2.6.32.orig/drivers/usb/serial/pl2303.h
+++ linux-mvl-dove-2.6.32/drivers/usb/serial/pl2303.h
@@ -5,7 +5,7 @@
  *	it under the terms of the GNU General Public License as published by
  *	the Free Software Foundation; either version 2 of the License, or
  *	(at your option) any later version.
- * 
+ *
  */
 
 #define BENQ_VENDOR_ID			0x04a5
@@ -20,6 +20,8 @@
 #define PL2303_PRODUCT_ID_ALDIGA	0x0611
 #define PL2303_PRODUCT_ID_MMX		0x0612
 #define PL2303_PRODUCT_ID_GPRS		0x0609
+#define PL2303_PRODUCT_ID_HCR331	0x331a
+#define PL2303_PRODUCT_ID_MOTOROLA	0x0307
 
 #define ATEN_VENDOR_ID		0x0557
 #define ATEN_VENDOR_ID2		0x0547
@@ -127,6 +129,10 @@
 #define CRESSI_VENDOR_ID	0x04b8
 #define CRESSI_EDY_PRODUCT_ID	0x0521
 
+/* Zeagle dive computer interface */
+#define ZEAGLE_VENDOR_ID	0x04b8
+#define ZEAGLE_N2ITION3_PRODUCT_ID	0x0522
+
 /* Sony, USB data cable for CMD-Jxx mobile phones */
 #define SONY_VENDOR_ID		0x054c
 #define SONY_QN3USB_PRODUCT_ID	0x0437
@@ -134,3 +140,11 @@
 /* Sanwa KB-USB2 multimeter cable (ID: 11ad:0001) */
 #define SANWA_VENDOR_ID		0x11ad
 #define SANWA_PRODUCT_ID	0x0001
+
+/* ADLINK ND-6530 RS232,RS485 and RS422 adapter */
+#define ADLINK_VENDOR_ID		0x0b63
+#define ADLINK_ND6530_PRODUCT_ID	0x6530
+
+/* WinChipHead USB->RS 232 adapter */
+#define WINCHIPHEAD_VENDOR_ID		0x4348
+#define WINCHIPHEAD_USBSER_PRODUCT_ID	0x5523
--- linux-mvl-dove-2.6.32.orig/drivers/usb/serial/spcp8x5.c
+++ linux-mvl-dove-2.6.32/drivers/usb/serial/spcp8x5.c
@@ -137,7 +137,7 @@
 
 /* how come ??? */
 #define UART_STATE			0x08
-#define UART_STATE_TRANSIENT_MASK	0x74
+#define UART_STATE_TRANSIENT_MASK	0x75
 #define UART_DCD			0x01
 #define UART_DSR			0x02
 #define UART_BREAK_ERROR		0x04
@@ -734,6 +734,10 @@
 			tty_insert_flip_char(tty, data[i], tty_flag);
 		tty_flip_buffer_push(tty);
 	}
+
+	if (status & UART_DCD)
+		usb_serial_handle_dcd_change(port, tty,
+			   priv->line_status & MSR_STATUS_LINE_DCD);
 	tty_kref_put(tty);
 
 	/* Schedule the next read _if_ we are still open */
--- linux-mvl-dove-2.6.32.orig/drivers/usb/serial/opticon.c
+++ linux-mvl-dove-2.6.32/drivers/usb/serial/opticon.c
@@ -99,8 +99,8 @@
 				available_room = tty_buffer_request_room(tty,
 								data_length);
 				if (available_room) {
-					tty_insert_flip_string(tty, data,
-							       available_room);
+					tty_insert_flip_string(tty, data + 2,
+							       data_length);
 					tty_flip_buffer_push(tty);
 				}
 				tty_kref_put(tty);
@@ -134,7 +134,7 @@
 						  priv->bulk_address),
 				  priv->bulk_in_buffer, priv->buffer_size,
 				  opticon_bulk_callback, priv);
-		result = usb_submit_urb(port->read_urb, GFP_ATOMIC);
+		result = usb_submit_urb(priv->bulk_read_urb, GFP_ATOMIC);
 		if (result)
 			dev_err(&port->dev,
 			    "%s - failed resubmitting read urb, error %d\n",
--- linux-mvl-dove-2.6.32.orig/drivers/usb/serial/io_edgeport.c
+++ linux-mvl-dove-2.6.32/drivers/usb/serial/io_edgeport.c
@@ -2935,8 +2935,8 @@
 
 	dbg("%s %d.%d.%d", fw_info, rec->data[0], rec->data[1], build);
 
-	edge_serial->product_info.FirmwareMajorVersion = fw->data[0];
-	edge_serial->product_info.FirmwareMinorVersion = fw->data[1];
+	edge_serial->product_info.FirmwareMajorVersion = rec->data[0];
+	edge_serial->product_info.FirmwareMinorVersion = rec->data[1];
 	edge_serial->product_info.FirmwareBuildNumber = cpu_to_le16(build);
 
 	for (rec = ihex_next_binrec(rec); rec;
--- linux-mvl-dove-2.6.32.orig/drivers/usb/serial/ti_usb_3410_5052.c
+++ linux-mvl-dove-2.6.32/drivers/usb/serial/ti_usb_3410_5052.c
@@ -366,9 +366,9 @@
 
 static void __exit ti_exit(void)
 {
+	usb_deregister(&ti_usb_driver);
 	usb_serial_deregister(&ti_1port_device);
 	usb_serial_deregister(&ti_2port_device);
-	usb_deregister(&ti_usb_driver);
 }
 
 
--- linux-mvl-dove-2.6.32.orig/drivers/usb/serial/ipaq.c
+++ linux-mvl-dove-2.6.32/drivers/usb/serial/ipaq.c
@@ -547,7 +547,6 @@
 	{ USB_DEVICE(0x413C, 0x4009) }, /* Dell Axim USB Sync */
 	{ USB_DEVICE(0x4505, 0x0010) }, /* Smartphone */
 	{ USB_DEVICE(0x5E04, 0xCE00) }, /* SAGEM Wireless Assistant */
-	{ USB_DEVICE(0x0BB4, 0x00CF) }, /* HTC smartphone modems */
 	{ }                             /* Terminating entry */
 };
 
--- linux-mvl-dove-2.6.32.orig/drivers/usb/serial/ftdi_sio_ids.h
+++ linux-mvl-dove-2.6.32/drivers/usb/serial/ftdi_sio_ids.h
@@ -0,0 +1,1167 @@
+/*
+ * vendor/product IDs (VID/PID) of devices using FTDI USB serial converters.
+ * Please keep numerically sorted within individual areas, thanks!
+ *
+ * Philipp Gühring - pg@futureware.at - added the Device ID of the USB relais
+ * from Rudolf Gugler
+ *
+ */
+
+
+/**********************************/
+/***** devices using FTDI VID *****/
+/**********************************/
+
+
+#define FTDI_VID	0x0403	/* Vendor Id */
+
+
+/*** "original" FTDI device PIDs ***/
+
+#define FTDI_8U232AM_PID 0x6001 /* Similar device to SIO above */
+#define FTDI_8U232AM_ALT_PID 0x6006 /* FTDI's alternate PID for above */
+#define FTDI_8U2232C_PID 0x6010 /* Dual channel device */
+#define FTDI_4232H_PID 0x6011 /* Quad channel hi-speed device */
+#define FTDI_SIO_PID	0x8372	/* Product Id SIO application of 8U100AX  */
+#define FTDI_232RL_PID  0xFBFA  /* Product ID for FT232RL */
+
+
+/*** third-party PIDs (using FTDI_VID) ***/
+
+/*
+ * Marvell OpenRD Base, Client
+ * http://www.open-rd.org
+ * OpenRD Base, Client use VID 0x0403
+ */
+#define MARVELL_OPENRD_PID	0x9e90
+
+/* www.candapter.com Ewert Energy Systems CANdapter device */
+#define FTDI_CANDAPTER_PID 0x9F80 /* Product Id */
+
+#define FTDI_NXTCAM_PID		0xABB8 /* NXTCam for Mindstorms NXT */
+
+/* US Interface Navigator (http://www.usinterface.com/) */
+#define FTDI_USINT_CAT_PID	0xb810	/* Navigator CAT and 2nd PTT lines */
+#define FTDI_USINT_WKEY_PID	0xb811	/* Navigator WKEY and FSK lines */
+#define FTDI_USINT_RS232_PID	0xb812	/* Navigator RS232 and CONFIG lines */
+
+/* OOCDlink by Joern Kaipf <joernk@web.de>
+ * (http://www.joernonline.de/dw/doku.php?id=start&idx=projects:oocdlink) */
+#define FTDI_OOCDLINK_PID	0xbaf8	/* Amontec JTAGkey */
+
+/* Luminary Micro Stellaris Boards, VID = FTDI_VID */
+/* FTDI 2332C Dual channel device, side A=245 FIFO (JTAG), Side B=RS232 UART */
+#define LMI_LM3S_DEVEL_BOARD_PID	0xbcd8
+#define LMI_LM3S_EVAL_BOARD_PID		0xbcd9
+
+#define FTDI_TURTELIZER_PID	0xBDC8 /* JTAG/RS-232 adapter by egnite GmBH */
+
+/* OpenDCC (www.opendcc.de) product id */
+#define FTDI_OPENDCC_PID	0xBFD8
+#define FTDI_OPENDCC_SNIFFER_PID	0xBFD9
+#define FTDI_OPENDCC_THROTTLE_PID	0xBFDA
+#define FTDI_OPENDCC_GATEWAY_PID	0xBFDB
+#define FTDI_OPENDCC_GBM_PID	0xBFDC
+
+/*
+ * RR-CirKits LocoBuffer USB (http://www.rr-cirkits.com)
+ */
+#define FTDI_RRCIRKITS_LOCOBUFFER_PID	0xc7d0	/* LocoBuffer USB */
+
+/* DMX4ALL DMX Interfaces */
+#define FTDI_DMX4ALL 0xC850
+
+/*
+ * ASK.fr devices
+ */
+#define FTDI_ASK_RDR400_PID	0xC991	/* ASK RDR 400 series card reader */
+
+/* www.starting-point-systems.com µChameleon device */
+#define FTDI_MICRO_CHAMELEON_PID	0xCAA0	/* Product Id */
+
+/*
+ * Tactrix OpenPort (ECU) devices.
+ * OpenPort 1.3M submitted by Donour Sizemore.
+ * OpenPort 1.3S and 1.3U submitted by Ian Abbott.
+ */
+#define FTDI_TACTRIX_OPENPORT_13M_PID	0xCC48	/* OpenPort 1.3 Mitsubishi */
+#define FTDI_TACTRIX_OPENPORT_13S_PID	0xCC49	/* OpenPort 1.3 Subaru */
+#define FTDI_TACTRIX_OPENPORT_13U_PID	0xCC4A	/* OpenPort 1.3 Universal */
+
+/* SCS HF Radio Modems PID's (http://www.scs-ptc.com) */
+/* the VID is the standard ftdi vid (FTDI_VID) */
+#define FTDI_SCS_DEVICE_0_PID 0xD010    /* SCS PTC-IIusb */
+#define FTDI_SCS_DEVICE_1_PID 0xD011    /* SCS Tracker / DSP TNC */
+#define FTDI_SCS_DEVICE_2_PID 0xD012
+#define FTDI_SCS_DEVICE_3_PID 0xD013
+#define FTDI_SCS_DEVICE_4_PID 0xD014
+#define FTDI_SCS_DEVICE_5_PID 0xD015
+#define FTDI_SCS_DEVICE_6_PID 0xD016
+#define FTDI_SCS_DEVICE_7_PID 0xD017
+
+/* iPlus device */
+#define FTDI_IPLUS_PID 0xD070 /* Product Id */
+#define FTDI_IPLUS2_PID 0xD071 /* Product Id */
+
+/*
+ * Gamma Scout (http://gamma-scout.com/). Submitted by rsc@runtux.com.
+ */
+#define FTDI_GAMMA_SCOUT_PID		0xD678	/* Gamma Scout online */
+
+/* Propox devices */
+#define FTDI_PROPOX_JTAGCABLEII_PID	0xD738
+
+/* Lenz LI-USB Computer Interface. */
+#define FTDI_LENZ_LIUSB_PID	0xD780
+
+/* Vardaan Enterprises Serial Interface VEUSB422R3 */
+#define FTDI_VARDAAN_PID	0xF070
+
+/*
+ * Xsens Technologies BV products (http://www.xsens.com).
+ */
+#define XSENS_CONVERTER_0_PID	0xD388
+#define XSENS_CONVERTER_1_PID	0xD389
+#define XSENS_CONVERTER_2_PID	0xD38A
+#define XSENS_CONVERTER_3_PID	0xD38B
+#define XSENS_CONVERTER_4_PID	0xD38C
+#define XSENS_CONVERTER_5_PID	0xD38D
+#define XSENS_CONVERTER_6_PID	0xD38E
+#define XSENS_CONVERTER_7_PID	0xD38F
+
+/*
+ * NDI (www.ndigital.com) product ids
+ */
+#define FTDI_NDI_HUC_PID		0xDA70	/* NDI Host USB Converter */
+#define FTDI_NDI_SPECTRA_SCU_PID	0xDA71	/* NDI Spectra SCU */
+#define FTDI_NDI_FUTURE_2_PID		0xDA72	/* NDI future device #2 */
+#define FTDI_NDI_FUTURE_3_PID		0xDA73	/* NDI future device #3 */
+#define FTDI_NDI_AURORA_SCU_PID		0xDA74	/* NDI Aurora SCU */
+
+/*
+ * ChamSys Limited (www.chamsys.co.uk) USB wing/interface product IDs
+ */
+#define FTDI_CHAMSYS_24_MASTER_WING_PID        0xDAF8
+#define FTDI_CHAMSYS_PC_WING_PID       0xDAF9
+#define FTDI_CHAMSYS_USB_DMX_PID       0xDAFA
+#define FTDI_CHAMSYS_MIDI_TIMECODE_PID 0xDAFB
+#define FTDI_CHAMSYS_MINI_WING_PID     0xDAFC
+#define FTDI_CHAMSYS_MAXI_WING_PID     0xDAFD
+#define FTDI_CHAMSYS_MEDIA_WING_PID    0xDAFE
+#define FTDI_CHAMSYS_WING_PID  0xDAFF
+
+/*
+ * Westrex International devices submitted by Cory Lee
+ */
+#define FTDI_WESTREX_MODEL_777_PID	0xDC00	/* Model 777 */
+#define FTDI_WESTREX_MODEL_8900F_PID	0xDC01	/* Model 8900F */
+
+/*
+ * ACG Identification Technologies GmbH products (http://www.acg.de/).
+ * Submitted by anton -at- goto10 -dot- org.
+ */
+#define FTDI_ACG_HFDUAL_PID		0xDD20	/* HF Dual ISO Reader (RFID) */
+
+/*
+ * Definitions for Artemis astronomical USB based cameras
+ * Check it at http://www.artemisccd.co.uk/
+ */
+#define FTDI_ARTEMIS_PID	0xDF28	/* All Artemis Cameras */
+
+/*
+ * Definitions for ATIK Instruments astronomical USB based cameras
+ * Check it at http://www.atik-instruments.com/
+ */
+#define FTDI_ATIK_ATK16_PID	0xDF30	/* ATIK ATK-16 Grayscale Camera */
+#define FTDI_ATIK_ATK16C_PID	0xDF32	/* ATIK ATK-16C Colour Camera */
+#define FTDI_ATIK_ATK16HR_PID	0xDF31	/* ATIK ATK-16HR Grayscale Camera */
+#define FTDI_ATIK_ATK16HRC_PID	0xDF33	/* ATIK ATK-16HRC Colour Camera */
+#define FTDI_ATIK_ATK16IC_PID   0xDF35  /* ATIK ATK-16IC Grayscale Camera */
+
+/*
+ * Yost Engineering, Inc. products (www.yostengineering.com).
+ * PID 0xE050 submitted by Aaron Prose.
+ */
+#define FTDI_YEI_SERVOCENTER31_PID	0xE050	/* YEI ServoCenter3.1 USB */
+
+/*
+ * ELV USB devices submitted by Christian Abt of ELV (www.elv.de).
+ * All of these devices use FTDI's vendor ID (0x0403).
+ * Further IDs taken from ELV Windows .inf file.
+ *
+ * The previously included PID for the UO 100 module was incorrect.
+ * In fact, that PID was for ELV's UR 100 USB-RS232 converter (0xFB58).
+ *
+ * Armin Laeuger originally sent the PID for the UM 100 module.
+ */
+#define FTDI_ELV_USR_PID	0xE000	/* ELV Universal-Sound-Recorder */
+#define FTDI_ELV_MSM1_PID	0xE001	/* ELV Mini-Sound-Modul */
+#define FTDI_ELV_KL100_PID	0xE002	/* ELV Kfz-Leistungsmesser KL 100 */
+#define FTDI_ELV_WS550_PID	0xE004	/* WS 550 */
+#define FTDI_ELV_EC3000_PID	0xE006	/* ENERGY CONTROL 3000 USB */
+#define FTDI_ELV_WS888_PID	0xE008	/* WS 888 */
+#define FTDI_ELV_TWS550_PID	0xE009	/* Technoline WS 550 */
+#define FTDI_ELV_FEM_PID	0xE00A	/* Funk Energie Monitor */
+#define FTDI_ELV_FHZ1300PC_PID	0xE0E8	/* FHZ 1300 PC */
+#define FTDI_ELV_WS500_PID	0xE0E9	/* PC-Wetterstation (WS 500) */
+#define FTDI_ELV_HS485_PID	0xE0EA	/* USB to RS-485 adapter */
+#define FTDI_ELV_UMS100_PID	0xE0EB	/* ELV USB Master-Slave Schaltsteckdose UMS 100 */
+#define FTDI_ELV_TFD128_PID	0xE0EC	/* ELV Temperatur-Feuchte-Datenlogger TFD 128 */
+#define FTDI_ELV_FM3RX_PID	0xE0ED	/* ELV Messwertuebertragung FM3 RX */
+#define FTDI_ELV_WS777_PID	0xE0EE	/* Conrad WS 777 */
+#define FTDI_ELV_EM1010PC_PID	0xE0EF	/* Engery monitor EM 1010 PC */
+#define FTDI_ELV_CSI8_PID	0xE0F0	/* Computer-Schalt-Interface (CSI 8) */
+#define FTDI_ELV_EM1000DL_PID	0xE0F1	/* PC-Datenlogger fuer Energiemonitor (EM 1000 DL) */
+#define FTDI_ELV_PCK100_PID	0xE0F2	/* PC-Kabeltester (PCK 100) */
+#define FTDI_ELV_RFP500_PID	0xE0F3	/* HF-Leistungsmesser (RFP 500) */
+#define FTDI_ELV_FS20SIG_PID	0xE0F4	/* Signalgeber (FS 20 SIG) */
+#define FTDI_ELV_UTP8_PID	0xE0F5	/* ELV UTP 8 */
+#define FTDI_ELV_WS300PC_PID	0xE0F6	/* PC-Wetterstation (WS 300 PC) */
+#define FTDI_ELV_WS444PC_PID	0xE0F7	/* Conrad WS 444 PC */
+#define FTDI_PHI_FISCO_PID      0xE40B  /* PHI Fisco USB to Serial cable */
+#define FTDI_ELV_UAD8_PID	0xF068	/* USB-AD-Wandler (UAD 8) */
+#define FTDI_ELV_UDA7_PID	0xF069	/* USB-DA-Wandler (UDA 7) */
+#define FTDI_ELV_USI2_PID	0xF06A	/* USB-Schrittmotoren-Interface (USI 2) */
+#define FTDI_ELV_T1100_PID	0xF06B	/* Thermometer (T 1100) */
+#define FTDI_ELV_PCD200_PID	0xF06C	/* PC-Datenlogger (PCD 200) */
+#define FTDI_ELV_ULA200_PID	0xF06D	/* USB-LCD-Ansteuerung (ULA 200) */
+#define FTDI_ELV_ALC8500_PID	0xF06E	/* ALC 8500 Expert */
+#define FTDI_ELV_FHZ1000PC_PID	0xF06F	/* FHZ 1000 PC */
+#define FTDI_ELV_UR100_PID	0xFB58	/* USB-RS232-Umsetzer (UR 100) */
+#define FTDI_ELV_UM100_PID	0xFB5A	/* USB-Modul UM 100 */
+#define FTDI_ELV_UO100_PID	0xFB5B	/* USB-Modul UO 100 */
+/* Additional ELV PIDs that default to using the FTDI D2XX drivers on
+ * MS Windows, rather than the FTDI Virtual Com Port drivers.
+ * Maybe these will be easier to use with the libftdi/libusb user-space
+ * drivers, or possibly the Comedi drivers in some cases. */
+#define FTDI_ELV_CLI7000_PID	0xFB59	/* Computer-Light-Interface (CLI 7000) */
+#define FTDI_ELV_PPS7330_PID	0xFB5C	/* Processor-Power-Supply (PPS 7330) */
+#define FTDI_ELV_TFM100_PID	0xFB5D	/* Temperartur-Feuchte Messgeraet (TFM 100) */
+#define FTDI_ELV_UDF77_PID	0xFB5E	/* USB DCF Funkurh (UDF 77) */
+#define FTDI_ELV_UIO88_PID	0xFB5F	/* USB-I/O Interface (UIO 88) */
+
+/*
+ * EVER Eco Pro UPS (http://www.ever.com.pl/)
+ */
+
+#define	EVER_ECO_PRO_CDS	0xe520	/* RS-232 converter */
+
+/*
+ * Active Robots product ids.
+ */
+#define FTDI_ACTIVE_ROBOTS_PID	0xE548	/* USB comms board */
+
+/* Pyramid Computer GmbH */
+#define FTDI_PYRAMID_PID	0xE6C8	/* Pyramid Appliance Display */
+
+/* www.elsterelectricity.com Elster Unicom III Optical Probe */
+#define FTDI_ELSTER_UNICOM_PID		0xE700 /* Product Id */
+
+/*
+ * Gude Analog- und Digitalsysteme GmbH
+ */
+#define FTDI_GUDEADS_E808_PID    0xE808
+#define FTDI_GUDEADS_E809_PID    0xE809
+#define FTDI_GUDEADS_E80A_PID    0xE80A
+#define FTDI_GUDEADS_E80B_PID    0xE80B
+#define FTDI_GUDEADS_E80C_PID    0xE80C
+#define FTDI_GUDEADS_E80D_PID    0xE80D
+#define FTDI_GUDEADS_E80E_PID    0xE80E
+#define FTDI_GUDEADS_E80F_PID    0xE80F
+#define FTDI_GUDEADS_E888_PID    0xE888  /* Expert ISDN Control USB */
+#define FTDI_GUDEADS_E889_PID    0xE889  /* USB RS-232 OptoBridge */
+#define FTDI_GUDEADS_E88A_PID    0xE88A
+#define FTDI_GUDEADS_E88B_PID    0xE88B
+#define FTDI_GUDEADS_E88C_PID    0xE88C
+#define FTDI_GUDEADS_E88D_PID    0xE88D
+#define FTDI_GUDEADS_E88E_PID    0xE88E
+#define FTDI_GUDEADS_E88F_PID    0xE88F
+
+/*
+ * Eclo (http://www.eclo.pt/) product IDs.
+ * PID 0xEA90 submitted by Martin Grill.
+ */
+#define FTDI_ECLO_COM_1WIRE_PID	0xEA90	/* COM to 1-Wire USB adaptor */
+
+/* TNC-X USB-to-packet-radio adapter, versions prior to 3.0 (DLP module) */
+#define FTDI_TNC_X_PID		0xEBE0
+
+/*
+ * Teratronik product ids.
+ * Submitted by O. Wölfelschneider.
+ */
+#define FTDI_TERATRONIK_VCP_PID	 0xEC88	/* Teratronik device (preferring VCP driver on windows) */
+#define FTDI_TERATRONIK_D2XX_PID 0xEC89	/* Teratronik device (preferring D2XX driver on windows) */
+
+/* Rig Expert Ukraine devices */
+#define FTDI_REU_TINY_PID		0xED22	/* RigExpert Tiny */
+
+/*
+ * Hameg HO820 and HO870 interface (using VID 0x0403)
+ */
+#define        HAMEG_HO820_PID         0xed74
+#define HAMEG_HO730_PID			0xed73
+#define HAMEG_HO720_PID			0xed72
+#define        HAMEG_HO870_PID         0xed71
+
+/*
+ *  MaxStream devices	www.maxstream.net
+ */
+#define FTDI_MAXSTREAM_PID	0xEE18	/* Xbee PKG-U Module */
+
+/*
+ * microHAM product IDs (http://www.microham.com).
+ * Submitted by Justin Burket (KL1RL) <zorton@jtan.com>
+ * and Mike Studer (K6EEP) <k6eep@hamsoftware.org>.
+ * Ian Abbott <abbotti@mev.co.uk> added a few more from the driver INF file.
+ */
+#define FTDI_MHAM_KW_PID 0xEEE8		/* USB-KW interface */
+#define FTDI_MHAM_YS_PID 0xEEE9		/* USB-YS interface */
+#define FTDI_MHAM_Y6_PID 0xEEEA		/* USB-Y6 interface */
+#define FTDI_MHAM_Y8_PID 0xEEEB		/* USB-Y8 interface */
+#define FTDI_MHAM_IC_PID 0xEEEC		/* USB-IC interface */
+#define FTDI_MHAM_DB9_PID 0xEEED	/* USB-DB9 interface */
+#define FTDI_MHAM_RS232_PID 0xEEEE	/* USB-RS232 interface */
+#define FTDI_MHAM_Y9_PID 0xEEEF		/* USB-Y9 interface */
+
+/* Domintell products  http://www.domintell.com */
+#define FTDI_DOMINTELL_DGQG_PID	0xEF50	/* Master */
+#define FTDI_DOMINTELL_DUSB_PID	0xEF51	/* DUSB01 module */
+
+/*
+ * The following are the values for the Perle Systems
+ * UltraPort USB serial converters
+ */
+#define FTDI_PERLE_ULTRAPORT_PID 0xF0C0	/* Perle UltraPort Product Id */
+
+/* Sprog II (Andrew Crosland's SprogII DCC interface) */
+#define FTDI_SPROG_II		0xF0C8
+
+/* an infrared receiver for user access control with IR tags */
+#define FTDI_PIEGROUP_PID	0xF208	/* Product Id */
+
+/* ACT Solutions HomePro ZWave interface
+   (http://www.act-solutions.com/HomePro.htm) */
+#define FTDI_ACTZWAVE_PID	0xF2D0
+
+/*
+ * 4N-GALAXY.DE PIDs for CAN-USB, USB-RS232, USB-RS422, USB-RS485,
+ * USB-TTY activ, USB-TTY passiv.  Some PIDs are used by several devices
+ * and I'm not entirely sure which are used by which.
+ */
+#define FTDI_4N_GALAXY_DE_1_PID	0xF3C0
+#define FTDI_4N_GALAXY_DE_2_PID	0xF3C1
+#define FTDI_4N_GALAXY_DE_3_PID	0xF3C2
+
+/*
+ * Linx Technologies product ids
+ */
+#define LINX_SDMUSBQSS_PID	0xF448	/* Linx SDM-USB-QS-S */
+#define LINX_MASTERDEVEL2_PID   0xF449   /* Linx Master Development 2.0 */
+#define LINX_FUTURE_0_PID   0xF44A   /* Linx future device */
+#define LINX_FUTURE_1_PID   0xF44B   /* Linx future device */
+#define LINX_FUTURE_2_PID   0xF44C   /* Linx future device */
+
+/*
+ * Oceanic product ids
+ */
+#define FTDI_OCEANIC_PID	0xF460  /* Oceanic dive instrument */
+
+/*
+ * SUUNTO product ids
+ */
+#define FTDI_SUUNTO_SPORTS_PID	0xF680	/* Suunto Sports instrument */
+
+/* USB-UIRT - An infrared receiver and transmitter using the 8U232AM chip */
+/* http://home.earthlink.net/~jrhees/USBUIRT/index.htm */
+#define FTDI_USB_UIRT_PID	0xF850	/* Product Id */
+
+/* CCS Inc. ICDU/ICDU40 product ID -
+ * the FT232BM is used in an in-circuit-debugger unit for PIC16's/PIC18's */
+#define FTDI_CCSICDU20_0_PID    0xF9D0
+#define FTDI_CCSICDU40_1_PID    0xF9D1
+#define FTDI_CCSMACHX_2_PID     0xF9D2
+#define FTDI_CCSLOAD_N_GO_3_PID 0xF9D3
+#define FTDI_CCSICDU64_4_PID    0xF9D4
+#define FTDI_CCSPRIME8_5_PID    0xF9D5
+
+/*
+ * The following are the values for the Matrix Orbital LCD displays,
+ * which are the FT232BM ( similar to the 8U232AM )
+ */
+#define FTDI_MTXORB_0_PID      0xFA00  /* Matrix Orbital Product Id */
+#define FTDI_MTXORB_1_PID      0xFA01  /* Matrix Orbital Product Id */
+#define FTDI_MTXORB_2_PID      0xFA02  /* Matrix Orbital Product Id */
+#define FTDI_MTXORB_3_PID      0xFA03  /* Matrix Orbital Product Id */
+#define FTDI_MTXORB_4_PID      0xFA04  /* Matrix Orbital Product Id */
+#define FTDI_MTXORB_5_PID      0xFA05  /* Matrix Orbital Product Id */
+#define FTDI_MTXORB_6_PID      0xFA06  /* Matrix Orbital Product Id */
+
+/*
+ * Home Electronics (www.home-electro.com) USB gadgets
+ */
+#define FTDI_HE_TIRA1_PID	0xFA78	/* Tira-1 IR transceiver */
+
+/* Inside Accesso contactless reader (http://www.insidefr.com) */
+#define INSIDE_ACCESSO		0xFAD0
+
+/*
+ * ThorLabs USB motor drivers
+ */
+#define FTDI_THORLABS_PID		0xfaf0 /* ThorLabs USB motor drivers */
+
+/*
+ * Protego product ids
+ */
+#define PROTEGO_SPECIAL_1	0xFC70	/* special/unknown device */
+#define PROTEGO_R2X0		0xFC71	/* R200-USB TRNG unit (R210, R220, and R230) */
+#define PROTEGO_SPECIAL_3	0xFC72	/* special/unknown device */
+#define PROTEGO_SPECIAL_4	0xFC73	/* special/unknown device */
+
+/*
+ * DSS-20 Sync Station for Sony Ericsson P800
+ */
+#define FTDI_DSS20_PID          0xFC82
+
+/* www.irtrans.de device */
+#define FTDI_IRTRANS_PID 0xFC60 /* Product Id */
+
+/*
+ * RM Michaelides CANview USB (http://www.rmcan.com) (FTDI_VID)
+ * CAN fieldbus interface adapter, added by port GmbH www.port.de)
+ * Ian Abbott changed the macro names for consistency.
+ */
+#define FTDI_RM_CANVIEW_PID	0xfd60	/* Product Id */
+/* www.thoughttechnology.com/ TT-USB provide with procomp use ftdi_sio */
+#define FTDI_TTUSB_PID 0xFF20 /* Product Id */
+
+#define FTDI_USBX_707_PID 0xF857	/* ADSTech IR Blaster USBX-707 (FTDI_VID) */
+
+#define FTDI_RELAIS_PID	0xFA10  /* Relais device from Rudolf Gugler */
+
+/*
+ * PCDJ use ftdi based dj-controllers. The following PID is
+ * for their DAC-2 device http://www.pcdjhardware.com/DAC2.asp
+ * (the VID is the standard ftdi vid (FTDI_VID), PID sent by Wouter Paesen)
+ */
+#define FTDI_PCDJ_DAC2_PID 0xFA88
+
+#define FTDI_R2000KU_TRUE_RNG	0xFB80  /* R2000KU TRUE RNG (FTDI_VID) */
+
+/*
+ * DIEBOLD BCS SE923 (FTDI_VID)
+ */
+#define DIEBOLD_BCS_SE923_PID	0xfb99
+
+/* www.crystalfontz.com devices
+ * - thanx for providing free devices for evaluation !
+ * they use the ftdi chipset for the USB interface
+ * and the vendor id is the same
+ */
+#define FTDI_XF_632_PID 0xFC08	/* 632: 16x2 Character Display */
+#define FTDI_XF_634_PID 0xFC09	/* 634: 20x4 Character Display */
+#define FTDI_XF_547_PID 0xFC0A	/* 547: Two line Display */
+#define FTDI_XF_633_PID 0xFC0B	/* 633: 16x2 Character Display with Keys */
+#define FTDI_XF_631_PID 0xFC0C	/* 631: 20x2 Character Display */
+#define FTDI_XF_635_PID 0xFC0D	/* 635: 20x4 Character Display */
+#define FTDI_XF_640_PID 0xFC0E	/* 640: Two line Display */
+#define FTDI_XF_642_PID 0xFC0F	/* 642: Two line Display */
+
+/*
+ * Video Networks Limited / Homechoice in the UK use an ftdi-based device
+ * for their 1Mb broadband internet service.  The following PID is exhibited
+ * by the usb device supplied (the VID is the standard ftdi vid (FTDI_VID)
+ */
+#define FTDI_VNHCPCUSB_D_PID 0xfe38 /* Product Id */
+
+/* AlphaMicro Components AMC-232USB01 device (FTDI_VID) */
+#define FTDI_AMC232_PID 0xFF00 /* Product Id */
+
+/*
+ * IBS elektronik product ids (FTDI_VID)
+ * Submitted by Thomas Schleusener
+ */
+#define FTDI_IBS_US485_PID	0xff38  /* IBS US485 (USB<-->RS422/485 interface) */
+#define FTDI_IBS_PICPRO_PID	0xff39  /* IBS PIC-Programmer */
+#define FTDI_IBS_PCMCIA_PID	0xff3a  /* IBS Card reader for PCMCIA SRAM-cards */
+#define FTDI_IBS_PK1_PID	0xff3b  /* IBS PK1 - Particel counter */
+#define FTDI_IBS_RS232MON_PID	0xff3c  /* IBS RS232 - Monitor */
+#define FTDI_IBS_APP70_PID	0xff3d  /* APP 70 (dust monitoring system) */
+#define FTDI_IBS_PEDO_PID	0xff3e  /* IBS PEDO-Modem (RF modem 868.35 MHz) */
+#define FTDI_IBS_PROD_PID	0xff3f  /* future device */
+/* www.canusb.com Lawicel CANUSB device (FTDI_VID) */
+#define FTDI_CANUSB_PID 0xFFA8 /* Product Id */
+
+/*
+ * TavIR AVR product ids (FTDI_VID)
+ */
+#define FTDI_TAVIR_STK500_PID	0xFA33	/* STK500 AVR programmer */
+
+
+
+/********************************/
+/** third-party VID/PID combos **/
+/********************************/
+
+
+
+/*
+ * Atmel STK541
+ */
+#define ATMEL_VID		0x03eb /* Vendor ID */
+#define STK541_PID		0x2109 /* Zigbee Controller */
+
+/*
+ * Blackfin gnICE JTAG
+ * http://docs.blackfin.uclinux.org/doku.php?id=hw:jtag:gnice
+ */
+#define ADI_VID 		0x0456
+#define ADI_GNICE_PID 		0xF000
+#define ADI_GNICEPLUS_PID 	0xF001
+
+/*
+ * RATOC REX-USB60F
+ */
+#define RATOC_VENDOR_ID		0x0584
+#define RATOC_PRODUCT_ID_USB60F	0xb020
+
+/*
+ * Acton Research Corp.
+ */
+#define ACTON_VID		0x0647	/* Vendor ID */
+#define ACTON_SPECTRAPRO_PID	0x0100
+
+/*
+ * Contec products (http://www.contec.com)
+ * Submitted by Daniel Sangorrin
+ */
+#define CONTEC_VID		0x06CE	/* Vendor ID */
+#define CONTEC_COM1USBH_PID	0x8311	/* COM-1(USB)H */
+
+/*
+ * Contec products (http://www.contec.com)
+ * Submitted by Daniel Sangorrin
+ */
+#define CONTEC_VID		0x06CE	/* Vendor ID */
+#define CONTEC_COM1USBH_PID	0x8311	/* COM-1(USB)H */
+
+/*
+ * Definitions for B&B Electronics products.
+ */
+#define BANDB_VID		0x0856	/* B&B Electronics Vendor ID */
+#define BANDB_USOTL4_PID	0xAC01	/* USOTL4 Isolated RS-485 Converter */
+#define BANDB_USTL4_PID		0xAC02	/* USTL4 RS-485 Converter */
+#define BANDB_USO9ML2_PID	0xAC03	/* USO9ML2 Isolated RS-232 Converter */
+#define BANDB_USOPTL4_PID	0xAC11
+#define BANDB_USPTL4_PID	0xAC12
+#define BANDB_USO9ML2DR_2_PID	0xAC16
+#define BANDB_USO9ML2DR_PID	0xAC17
+#define BANDB_USOPTL4DR2_PID	0xAC18	/* USOPTL4R-2 2-port Isolated RS-232 Converter */
+#define BANDB_USOPTL4DR_PID	0xAC19
+#define BANDB_485USB9F_2W_PID	0xAC25
+#define BANDB_485USB9F_4W_PID	0xAC26
+#define BANDB_232USB9M_PID	0xAC27
+#define BANDB_485USBTB_2W_PID	0xAC33
+#define BANDB_485USBTB_4W_PID	0xAC34
+#define BANDB_TTL5USB9M_PID	0xAC49
+#define BANDB_TTL3USB9M_PID	0xAC50
+#define BANDB_ZZ_PROG1_USB_PID	0xBA02
+
+/*
+ * Intrepid Control Systems (http://www.intrepidcs.com/) ValueCAN and NeoVI
+ */
+#define INTREPID_VID		0x093C
+#define INTREPID_VALUECAN_PID	0x0601
+#define INTREPID_NEOVI_PID	0x0701
+
+/*
+ * Definitions for ID TECH (www.idt-net.com) devices
+ */
+#define IDTECH_VID		0x0ACD	/* ID TECH Vendor ID */
+#define IDTECH_IDT1221U_PID	0x0300	/* IDT1221U USB to RS-232 adapter */
+
+/*
+ * Definitions for Omnidirectional Control Technology, Inc. devices
+ */
+#define OCT_VID			0x0B39	/* OCT vendor ID */
+/* Note: OCT US101 is also rebadged as Dick Smith Electronics (NZ) XH6381 */
+/* Also rebadged as Dick Smith Electronics (Aus) XH6451 */
+/* Also rebadged as SIIG Inc. model US2308 hardware version 1 */
+#define OCT_DK201_PID		0x0103	/* OCT DK201 USB docking station */
+#define OCT_US101_PID		0x0421	/* OCT US101 USB to RS-232 */
+
+/*
+ * Definitions for Icom Inc. devices
+ */
+#define ICOM_VID		0x0C26 /* Icom vendor ID */
+/* Note: ID-1 is a communications tranceiver for HAM-radio operators */
+#define ICOM_ID_1_PID		0x0004 /* ID-1 USB to RS-232 */
+/* Note: OPC is an Optional cable to connect an Icom Tranceiver */
+#define ICOM_OPC_U_UC_PID	0x0018 /* OPC-478UC, OPC-1122U cloning cable */
+/* Note: ID-RP* devices are Icom Repeater Devices for HAM-radio */
+#define ICOM_ID_RP2C1_PID	0x0009 /* ID-RP2C Asset 1 to RS-232 */
+#define ICOM_ID_RP2C2_PID	0x000A /* ID-RP2C Asset 2 to RS-232 */
+#define ICOM_ID_RP2D_PID	0x000B /* ID-RP2D configuration port*/
+#define ICOM_ID_RP2VT_PID	0x000C /* ID-RP2V Transmit config port */
+#define ICOM_ID_RP2VR_PID	0x000D /* ID-RP2V Receive config port */
+#define ICOM_ID_RP4KVT_PID	0x0010 /* ID-RP4000V Transmit config port */
+#define ICOM_ID_RP4KVR_PID	0x0011 /* ID-RP4000V Receive config port */
+#define ICOM_ID_RP2KVT_PID	0x0012 /* ID-RP2000V Transmit config port */
+#define ICOM_ID_RP2KVR_PID	0x0013 /* ID-RP2000V Receive config port */
+
+/*
+ * GN Otometrics (http://www.otometrics.com)
+ * Submitted by Ville Sundberg.
+ */
+#define GN_OTOMETRICS_VID	0x0c33	/* Vendor ID */
+#define AURICAL_USB_PID		0x0010	/* Aurical USB Audiometer */
+
+/*
+ * The following are the values for the Sealevel SeaLINK+ adapters.
+ * (Original list sent by Tuan Hoang.  Ian Abbott renamed the macros and
+ * removed some PIDs that don't seem to match any existing products.)
+ */
+#define SEALEVEL_VID		0x0c52	/* Sealevel Vendor ID */
+#define SEALEVEL_2101_PID	0x2101	/* SeaLINK+232 (2101/2105) */
+#define SEALEVEL_2102_PID	0x2102	/* SeaLINK+485 (2102) */
+#define SEALEVEL_2103_PID	0x2103	/* SeaLINK+232I (2103) */
+#define SEALEVEL_2104_PID	0x2104	/* SeaLINK+485I (2104) */
+#define SEALEVEL_2106_PID	0x9020	/* SeaLINK+422 (2106) */
+#define SEALEVEL_2201_1_PID	0x2211	/* SeaPORT+2/232 (2201) Port 1 */
+#define SEALEVEL_2201_2_PID	0x2221	/* SeaPORT+2/232 (2201) Port 2 */
+#define SEALEVEL_2202_1_PID	0x2212	/* SeaPORT+2/485 (2202) Port 1 */
+#define SEALEVEL_2202_2_PID	0x2222	/* SeaPORT+2/485 (2202) Port 2 */
+#define SEALEVEL_2203_1_PID	0x2213	/* SeaPORT+2 (2203) Port 1 */
+#define SEALEVEL_2203_2_PID	0x2223	/* SeaPORT+2 (2203) Port 2 */
+#define SEALEVEL_2401_1_PID	0x2411	/* SeaPORT+4/232 (2401) Port 1 */
+#define SEALEVEL_2401_2_PID	0x2421	/* SeaPORT+4/232 (2401) Port 2 */
+#define SEALEVEL_2401_3_PID	0x2431	/* SeaPORT+4/232 (2401) Port 3 */
+#define SEALEVEL_2401_4_PID	0x2441	/* SeaPORT+4/232 (2401) Port 4 */
+#define SEALEVEL_2402_1_PID	0x2412	/* SeaPORT+4/485 (2402) Port 1 */
+#define SEALEVEL_2402_2_PID	0x2422	/* SeaPORT+4/485 (2402) Port 2 */
+#define SEALEVEL_2402_3_PID	0x2432	/* SeaPORT+4/485 (2402) Port 3 */
+#define SEALEVEL_2402_4_PID	0x2442	/* SeaPORT+4/485 (2402) Port 4 */
+#define SEALEVEL_2403_1_PID	0x2413	/* SeaPORT+4 (2403) Port 1 */
+#define SEALEVEL_2403_2_PID	0x2423	/* SeaPORT+4 (2403) Port 2 */
+#define SEALEVEL_2403_3_PID	0x2433	/* SeaPORT+4 (2403) Port 3 */
+#define SEALEVEL_2403_4_PID	0x2443	/* SeaPORT+4 (2403) Port 4 */
+#define SEALEVEL_2801_1_PID	0X2811	/* SeaLINK+8/232 (2801) Port 1 */
+#define SEALEVEL_2801_2_PID	0X2821	/* SeaLINK+8/232 (2801) Port 2 */
+#define SEALEVEL_2801_3_PID	0X2831	/* SeaLINK+8/232 (2801) Port 3 */
+#define SEALEVEL_2801_4_PID	0X2841	/* SeaLINK+8/232 (2801) Port 4 */
+#define SEALEVEL_2801_5_PID	0X2851	/* SeaLINK+8/232 (2801) Port 5 */
+#define SEALEVEL_2801_6_PID	0X2861	/* SeaLINK+8/232 (2801) Port 6 */
+#define SEALEVEL_2801_7_PID	0X2871	/* SeaLINK+8/232 (2801) Port 7 */
+#define SEALEVEL_2801_8_PID	0X2881	/* SeaLINK+8/232 (2801) Port 8 */
+#define SEALEVEL_2802_1_PID	0X2812	/* SeaLINK+8/485 (2802) Port 1 */
+#define SEALEVEL_2802_2_PID	0X2822	/* SeaLINK+8/485 (2802) Port 2 */
+#define SEALEVEL_2802_3_PID	0X2832	/* SeaLINK+8/485 (2802) Port 3 */
+#define SEALEVEL_2802_4_PID	0X2842	/* SeaLINK+8/485 (2802) Port 4 */
+#define SEALEVEL_2802_5_PID	0X2852	/* SeaLINK+8/485 (2802) Port 5 */
+#define SEALEVEL_2802_6_PID	0X2862	/* SeaLINK+8/485 (2802) Port 6 */
+#define SEALEVEL_2802_7_PID	0X2872	/* SeaLINK+8/485 (2802) Port 7 */
+#define SEALEVEL_2802_8_PID	0X2882	/* SeaLINK+8/485 (2802) Port 8 */
+#define SEALEVEL_2803_1_PID	0X2813	/* SeaLINK+8 (2803) Port 1 */
+#define SEALEVEL_2803_2_PID	0X2823 	/* SeaLINK+8 (2803) Port 2 */
+#define SEALEVEL_2803_3_PID	0X2833 	/* SeaLINK+8 (2803) Port 3 */
+#define SEALEVEL_2803_4_PID	0X2843 	/* SeaLINK+8 (2803) Port 4 */
+#define SEALEVEL_2803_5_PID	0X2853 	/* SeaLINK+8 (2803) Port 5 */
+#define SEALEVEL_2803_6_PID	0X2863 	/* SeaLINK+8 (2803) Port 6 */
+#define SEALEVEL_2803_7_PID	0X2873 	/* SeaLINK+8 (2803) Port 7 */
+#define SEALEVEL_2803_8_PID	0X2883 	/* SeaLINK+8 (2803) Port 8 */
+
+/*
+ * JETI SPECTROMETER SPECBOS 1201
+ * http://www.jeti.com/products/sys/scb/scb1201.php
+ */
+#define JETI_VID		0x0c6c
+#define JETI_SPC1201_PID	0x04b2
+
+/*
+ * FTDI USB UART chips used in construction projects from the
+ * Elektor Electronics magazine (http://elektor-electronics.co.uk)
+ */
+#define ELEKTOR_VID		0x0C7D
+#define ELEKTOR_FT323R_PID	0x0005	/* RFID-Reader, issue 09-2006 */
+
+/*
+ * Posiflex inc retail equipment (http://www.posiflex.com.tw)
+ */
+#define POSIFLEX_VID		0x0d3a  /* Vendor ID */
+#define POSIFLEX_PP7000_PID	0x0300  /* PP-7000II thermal printer */
+
+/*
+ * The following are the values for two KOBIL chipcard terminals.
+ */
+#define KOBIL_VID		0x0d46	/* KOBIL Vendor ID */
+#define KOBIL_CONV_B1_PID	0x2020	/* KOBIL Konverter for B1 */
+#define KOBIL_CONV_KAAN_PID	0x2021	/* KOBIL_Konverter for KAAN */
+
+#define FTDI_NF_RIC_VID	0x0DCD	/* Vendor Id */
+#define FTDI_NF_RIC_PID	0x0001	/* Product Id */
+
+/*
+ * Falcom Wireless Communications GmbH
+ */
+#define FALCOM_VID		0x0F94	/* Vendor Id */
+#define FALCOM_TWIST_PID	0x0001	/* Falcom Twist USB GPRS modem */
+#define FALCOM_SAMBA_PID	0x0005	/* Falcom Samba USB GPRS modem */
+
+/* Larsen and Brusgaard AltiTrack/USBtrack  */
+#define LARSENBRUSGAARD_VID		0x0FD8
+#define LB_ALTITRACK_PID		0x0001
+
+/*
+ * TTi (Thurlby Thandar Instruments)
+ */
+#define TTI_VID			0x103E	/* Vendor Id */
+#define TTI_QL355P_PID		0x03E8	/* TTi QL355P power supply */
+
+/* Interbiometrics USB I/O Board */
+/* Developed for Interbiometrics by Rudolf Gugler */
+#define INTERBIOMETRICS_VID              0x1209
+#define INTERBIOMETRICS_IOBOARD_PID      0x1002
+#define INTERBIOMETRICS_MINI_IOBOARD_PID 0x1006
+
+/*
+ * Testo products (http://www.testo.com/)
+ * Submitted by Colin Leroy
+ */
+#define TESTO_VID			0x128D
+#define TESTO_USB_INTERFACE_PID		0x0001
+
+/*
+ * Mobility Electronics products.
+ */
+#define MOBILITY_VID			0x1342
+#define MOBILITY_USB_SERIAL_PID		0x0202	/* EasiDock USB 200 serial */
+
+/*
+ * FIC / OpenMoko, Inc. http://wiki.openmoko.org/wiki/Neo1973_Debug_Board_v3
+ * Submitted by Harald Welte <laforge@openmoko.org>
+ */
+#define	FIC_VID			0x1457
+#define	FIC_NEO1973_DEBUG_PID	0x5118
+
+/* Olimex */
+#define OLIMEX_VID			0x15BA
+#define OLIMEX_ARM_USB_OCD_PID		0x0003
+
+/*
+ * Telldus Technologies
+ */
+#define TELLDUS_VID			0x1781	/* Vendor ID */
+#define TELLDUS_TELLSTICK_PID		0x0C30	/* RF control dongle 433 MHz using FT232RL */
+
+/*
+ * RT Systems programming cables for various ham radios
+ */
+#define RTSYSTEMS_VID			0x2100	/* Vendor ID */
+#define RTSYSTEMS_SERIAL_VX7_PID	0x9e52	/* Serial converter for VX-7 Radios using FT232RL */
+#define RTSYSTEMS_CT29B_PID		0x9e54	/* CT29B Radio Cable */
+
+/*
+ * Bayer Ascensia Contour blood glucose meter USB-converter cable.
+ * http://winglucofacts.com/cables/
+ */
+#define BAYER_VID                      0x1A79
+#define BAYER_CONTOUR_CABLE_PID        0x6001
+
+/*
+ * The following are the values for the Matrix Orbital FTDI Range
+ * Anything in this range will use an FT232RL.
+ */
+#define MTXORB_VID			0x1B3D
+#define MTXORB_FTDI_RANGE_0100_PID	0x0100
+#define MTXORB_FTDI_RANGE_0101_PID	0x0101
+#define MTXORB_FTDI_RANGE_0102_PID	0x0102
+#define MTXORB_FTDI_RANGE_0103_PID	0x0103
+#define MTXORB_FTDI_RANGE_0104_PID	0x0104
+#define MTXORB_FTDI_RANGE_0105_PID	0x0105
+#define MTXORB_FTDI_RANGE_0106_PID	0x0106
+#define MTXORB_FTDI_RANGE_0107_PID	0x0107
+#define MTXORB_FTDI_RANGE_0108_PID	0x0108
+#define MTXORB_FTDI_RANGE_0109_PID	0x0109
+#define MTXORB_FTDI_RANGE_010A_PID	0x010A
+#define MTXORB_FTDI_RANGE_010B_PID	0x010B
+#define MTXORB_FTDI_RANGE_010C_PID	0x010C
+#define MTXORB_FTDI_RANGE_010D_PID	0x010D
+#define MTXORB_FTDI_RANGE_010E_PID	0x010E
+#define MTXORB_FTDI_RANGE_010F_PID	0x010F
+#define MTXORB_FTDI_RANGE_0110_PID	0x0110
+#define MTXORB_FTDI_RANGE_0111_PID	0x0111
+#define MTXORB_FTDI_RANGE_0112_PID	0x0112
+#define MTXORB_FTDI_RANGE_0113_PID	0x0113
+#define MTXORB_FTDI_RANGE_0114_PID	0x0114
+#define MTXORB_FTDI_RANGE_0115_PID	0x0115
+#define MTXORB_FTDI_RANGE_0116_PID	0x0116
+#define MTXORB_FTDI_RANGE_0117_PID	0x0117
+#define MTXORB_FTDI_RANGE_0118_PID	0x0118
+#define MTXORB_FTDI_RANGE_0119_PID	0x0119
+#define MTXORB_FTDI_RANGE_011A_PID	0x011A
+#define MTXORB_FTDI_RANGE_011B_PID	0x011B
+#define MTXORB_FTDI_RANGE_011C_PID	0x011C
+#define MTXORB_FTDI_RANGE_011D_PID	0x011D
+#define MTXORB_FTDI_RANGE_011E_PID	0x011E
+#define MTXORB_FTDI_RANGE_011F_PID	0x011F
+#define MTXORB_FTDI_RANGE_0120_PID	0x0120
+#define MTXORB_FTDI_RANGE_0121_PID	0x0121
+#define MTXORB_FTDI_RANGE_0122_PID	0x0122
+#define MTXORB_FTDI_RANGE_0123_PID	0x0123
+#define MTXORB_FTDI_RANGE_0124_PID	0x0124
+#define MTXORB_FTDI_RANGE_0125_PID	0x0125
+#define MTXORB_FTDI_RANGE_0126_PID	0x0126
+#define MTXORB_FTDI_RANGE_0127_PID	0x0127
+#define MTXORB_FTDI_RANGE_0128_PID	0x0128
+#define MTXORB_FTDI_RANGE_0129_PID	0x0129
+#define MTXORB_FTDI_RANGE_012A_PID	0x012A
+#define MTXORB_FTDI_RANGE_012B_PID	0x012B
+#define MTXORB_FTDI_RANGE_012C_PID	0x012C
+#define MTXORB_FTDI_RANGE_012D_PID	0x012D
+#define MTXORB_FTDI_RANGE_012E_PID	0x012E
+#define MTXORB_FTDI_RANGE_012F_PID	0x012F
+#define MTXORB_FTDI_RANGE_0130_PID	0x0130
+#define MTXORB_FTDI_RANGE_0131_PID	0x0131
+#define MTXORB_FTDI_RANGE_0132_PID	0x0132
+#define MTXORB_FTDI_RANGE_0133_PID	0x0133
+#define MTXORB_FTDI_RANGE_0134_PID	0x0134
+#define MTXORB_FTDI_RANGE_0135_PID	0x0135
+#define MTXORB_FTDI_RANGE_0136_PID	0x0136
+#define MTXORB_FTDI_RANGE_0137_PID	0x0137
+#define MTXORB_FTDI_RANGE_0138_PID	0x0138
+#define MTXORB_FTDI_RANGE_0139_PID	0x0139
+#define MTXORB_FTDI_RANGE_013A_PID	0x013A
+#define MTXORB_FTDI_RANGE_013B_PID	0x013B
+#define MTXORB_FTDI_RANGE_013C_PID	0x013C
+#define MTXORB_FTDI_RANGE_013D_PID	0x013D
+#define MTXORB_FTDI_RANGE_013E_PID	0x013E
+#define MTXORB_FTDI_RANGE_013F_PID	0x013F
+#define MTXORB_FTDI_RANGE_0140_PID	0x0140
+#define MTXORB_FTDI_RANGE_0141_PID	0x0141
+#define MTXORB_FTDI_RANGE_0142_PID	0x0142
+#define MTXORB_FTDI_RANGE_0143_PID	0x0143
+#define MTXORB_FTDI_RANGE_0144_PID	0x0144
+#define MTXORB_FTDI_RANGE_0145_PID	0x0145
+#define MTXORB_FTDI_RANGE_0146_PID	0x0146
+#define MTXORB_FTDI_RANGE_0147_PID	0x0147
+#define MTXORB_FTDI_RANGE_0148_PID	0x0148
+#define MTXORB_FTDI_RANGE_0149_PID	0x0149
+#define MTXORB_FTDI_RANGE_014A_PID	0x014A
+#define MTXORB_FTDI_RANGE_014B_PID	0x014B
+#define MTXORB_FTDI_RANGE_014C_PID	0x014C
+#define MTXORB_FTDI_RANGE_014D_PID	0x014D
+#define MTXORB_FTDI_RANGE_014E_PID	0x014E
+#define MTXORB_FTDI_RANGE_014F_PID	0x014F
+#define MTXORB_FTDI_RANGE_0150_PID	0x0150
+#define MTXORB_FTDI_RANGE_0151_PID	0x0151
+#define MTXORB_FTDI_RANGE_0152_PID	0x0152
+#define MTXORB_FTDI_RANGE_0153_PID	0x0153
+#define MTXORB_FTDI_RANGE_0154_PID	0x0154
+#define MTXORB_FTDI_RANGE_0155_PID	0x0155
+#define MTXORB_FTDI_RANGE_0156_PID	0x0156
+#define MTXORB_FTDI_RANGE_0157_PID	0x0157
+#define MTXORB_FTDI_RANGE_0158_PID	0x0158
+#define MTXORB_FTDI_RANGE_0159_PID	0x0159
+#define MTXORB_FTDI_RANGE_015A_PID	0x015A
+#define MTXORB_FTDI_RANGE_015B_PID	0x015B
+#define MTXORB_FTDI_RANGE_015C_PID	0x015C
+#define MTXORB_FTDI_RANGE_015D_PID	0x015D
+#define MTXORB_FTDI_RANGE_015E_PID	0x015E
+#define MTXORB_FTDI_RANGE_015F_PID	0x015F
+#define MTXORB_FTDI_RANGE_0160_PID	0x0160
+#define MTXORB_FTDI_RANGE_0161_PID	0x0161
+#define MTXORB_FTDI_RANGE_0162_PID	0x0162
+#define MTXORB_FTDI_RANGE_0163_PID	0x0163
+#define MTXORB_FTDI_RANGE_0164_PID	0x0164
+#define MTXORB_FTDI_RANGE_0165_PID	0x0165
+#define MTXORB_FTDI_RANGE_0166_PID	0x0166
+#define MTXORB_FTDI_RANGE_0167_PID	0x0167
+#define MTXORB_FTDI_RANGE_0168_PID	0x0168
+#define MTXORB_FTDI_RANGE_0169_PID	0x0169
+#define MTXORB_FTDI_RANGE_016A_PID	0x016A
+#define MTXORB_FTDI_RANGE_016B_PID	0x016B
+#define MTXORB_FTDI_RANGE_016C_PID	0x016C
+#define MTXORB_FTDI_RANGE_016D_PID	0x016D
+#define MTXORB_FTDI_RANGE_016E_PID	0x016E
+#define MTXORB_FTDI_RANGE_016F_PID	0x016F
+#define MTXORB_FTDI_RANGE_0170_PID	0x0170
+#define MTXORB_FTDI_RANGE_0171_PID	0x0171
+#define MTXORB_FTDI_RANGE_0172_PID	0x0172
+#define MTXORB_FTDI_RANGE_0173_PID	0x0173
+#define MTXORB_FTDI_RANGE_0174_PID	0x0174
+#define MTXORB_FTDI_RANGE_0175_PID	0x0175
+#define MTXORB_FTDI_RANGE_0176_PID	0x0176
+#define MTXORB_FTDI_RANGE_0177_PID	0x0177
+#define MTXORB_FTDI_RANGE_0178_PID	0x0178
+#define MTXORB_FTDI_RANGE_0179_PID	0x0179
+#define MTXORB_FTDI_RANGE_017A_PID	0x017A
+#define MTXORB_FTDI_RANGE_017B_PID	0x017B
+#define MTXORB_FTDI_RANGE_017C_PID	0x017C
+#define MTXORB_FTDI_RANGE_017D_PID	0x017D
+#define MTXORB_FTDI_RANGE_017E_PID	0x017E
+#define MTXORB_FTDI_RANGE_017F_PID	0x017F
+#define MTXORB_FTDI_RANGE_0180_PID	0x0180
+#define MTXORB_FTDI_RANGE_0181_PID	0x0181
+#define MTXORB_FTDI_RANGE_0182_PID	0x0182
+#define MTXORB_FTDI_RANGE_0183_PID	0x0183
+#define MTXORB_FTDI_RANGE_0184_PID	0x0184
+#define MTXORB_FTDI_RANGE_0185_PID	0x0185
+#define MTXORB_FTDI_RANGE_0186_PID	0x0186
+#define MTXORB_FTDI_RANGE_0187_PID	0x0187
+#define MTXORB_FTDI_RANGE_0188_PID	0x0188
+#define MTXORB_FTDI_RANGE_0189_PID	0x0189
+#define MTXORB_FTDI_RANGE_018A_PID	0x018A
+#define MTXORB_FTDI_RANGE_018B_PID	0x018B
+#define MTXORB_FTDI_RANGE_018C_PID	0x018C
+#define MTXORB_FTDI_RANGE_018D_PID	0x018D
+#define MTXORB_FTDI_RANGE_018E_PID	0x018E
+#define MTXORB_FTDI_RANGE_018F_PID	0x018F
+#define MTXORB_FTDI_RANGE_0190_PID	0x0190
+#define MTXORB_FTDI_RANGE_0191_PID	0x0191
+#define MTXORB_FTDI_RANGE_0192_PID	0x0192
+#define MTXORB_FTDI_RANGE_0193_PID	0x0193
+#define MTXORB_FTDI_RANGE_0194_PID	0x0194
+#define MTXORB_FTDI_RANGE_0195_PID	0x0195
+#define MTXORB_FTDI_RANGE_0196_PID	0x0196
+#define MTXORB_FTDI_RANGE_0197_PID	0x0197
+#define MTXORB_FTDI_RANGE_0198_PID	0x0198
+#define MTXORB_FTDI_RANGE_0199_PID	0x0199
+#define MTXORB_FTDI_RANGE_019A_PID	0x019A
+#define MTXORB_FTDI_RANGE_019B_PID	0x019B
+#define MTXORB_FTDI_RANGE_019C_PID	0x019C
+#define MTXORB_FTDI_RANGE_019D_PID	0x019D
+#define MTXORB_FTDI_RANGE_019E_PID	0x019E
+#define MTXORB_FTDI_RANGE_019F_PID	0x019F
+#define MTXORB_FTDI_RANGE_01A0_PID	0x01A0
+#define MTXORB_FTDI_RANGE_01A1_PID	0x01A1
+#define MTXORB_FTDI_RANGE_01A2_PID	0x01A2
+#define MTXORB_FTDI_RANGE_01A3_PID	0x01A3
+#define MTXORB_FTDI_RANGE_01A4_PID	0x01A4
+#define MTXORB_FTDI_RANGE_01A5_PID	0x01A5
+#define MTXORB_FTDI_RANGE_01A6_PID	0x01A6
+#define MTXORB_FTDI_RANGE_01A7_PID	0x01A7
+#define MTXORB_FTDI_RANGE_01A8_PID	0x01A8
+#define MTXORB_FTDI_RANGE_01A9_PID	0x01A9
+#define MTXORB_FTDI_RANGE_01AA_PID	0x01AA
+#define MTXORB_FTDI_RANGE_01AB_PID	0x01AB
+#define MTXORB_FTDI_RANGE_01AC_PID	0x01AC
+#define MTXORB_FTDI_RANGE_01AD_PID	0x01AD
+#define MTXORB_FTDI_RANGE_01AE_PID	0x01AE
+#define MTXORB_FTDI_RANGE_01AF_PID	0x01AF
+#define MTXORB_FTDI_RANGE_01B0_PID	0x01B0
+#define MTXORB_FTDI_RANGE_01B1_PID	0x01B1
+#define MTXORB_FTDI_RANGE_01B2_PID	0x01B2
+#define MTXORB_FTDI_RANGE_01B3_PID	0x01B3
+#define MTXORB_FTDI_RANGE_01B4_PID	0x01B4
+#define MTXORB_FTDI_RANGE_01B5_PID	0x01B5
+#define MTXORB_FTDI_RANGE_01B6_PID	0x01B6
+#define MTXORB_FTDI_RANGE_01B7_PID	0x01B7
+#define MTXORB_FTDI_RANGE_01B8_PID	0x01B8
+#define MTXORB_FTDI_RANGE_01B9_PID	0x01B9
+#define MTXORB_FTDI_RANGE_01BA_PID	0x01BA
+#define MTXORB_FTDI_RANGE_01BB_PID	0x01BB
+#define MTXORB_FTDI_RANGE_01BC_PID	0x01BC
+#define MTXORB_FTDI_RANGE_01BD_PID	0x01BD
+#define MTXORB_FTDI_RANGE_01BE_PID	0x01BE
+#define MTXORB_FTDI_RANGE_01BF_PID	0x01BF
+#define MTXORB_FTDI_RANGE_01C0_PID	0x01C0
+#define MTXORB_FTDI_RANGE_01C1_PID	0x01C1
+#define MTXORB_FTDI_RANGE_01C2_PID	0x01C2
+#define MTXORB_FTDI_RANGE_01C3_PID	0x01C3
+#define MTXORB_FTDI_RANGE_01C4_PID	0x01C4
+#define MTXORB_FTDI_RANGE_01C5_PID	0x01C5
+#define MTXORB_FTDI_RANGE_01C6_PID	0x01C6
+#define MTXORB_FTDI_RANGE_01C7_PID	0x01C7
+#define MTXORB_FTDI_RANGE_01C8_PID	0x01C8
+#define MTXORB_FTDI_RANGE_01C9_PID	0x01C9
+#define MTXORB_FTDI_RANGE_01CA_PID	0x01CA
+#define MTXORB_FTDI_RANGE_01CB_PID	0x01CB
+#define MTXORB_FTDI_RANGE_01CC_PID	0x01CC
+#define MTXORB_FTDI_RANGE_01CD_PID	0x01CD
+#define MTXORB_FTDI_RANGE_01CE_PID	0x01CE
+#define MTXORB_FTDI_RANGE_01CF_PID	0x01CF
+#define MTXORB_FTDI_RANGE_01D0_PID	0x01D0
+#define MTXORB_FTDI_RANGE_01D1_PID	0x01D1
+#define MTXORB_FTDI_RANGE_01D2_PID	0x01D2
+#define MTXORB_FTDI_RANGE_01D3_PID	0x01D3
+#define MTXORB_FTDI_RANGE_01D4_PID	0x01D4
+#define MTXORB_FTDI_RANGE_01D5_PID	0x01D5
+#define MTXORB_FTDI_RANGE_01D6_PID	0x01D6
+#define MTXORB_FTDI_RANGE_01D7_PID	0x01D7
+#define MTXORB_FTDI_RANGE_01D8_PID	0x01D8
+#define MTXORB_FTDI_RANGE_01D9_PID	0x01D9
+#define MTXORB_FTDI_RANGE_01DA_PID	0x01DA
+#define MTXORB_FTDI_RANGE_01DB_PID	0x01DB
+#define MTXORB_FTDI_RANGE_01DC_PID	0x01DC
+#define MTXORB_FTDI_RANGE_01DD_PID	0x01DD
+#define MTXORB_FTDI_RANGE_01DE_PID	0x01DE
+#define MTXORB_FTDI_RANGE_01DF_PID	0x01DF
+#define MTXORB_FTDI_RANGE_01E0_PID	0x01E0
+#define MTXORB_FTDI_RANGE_01E1_PID	0x01E1
+#define MTXORB_FTDI_RANGE_01E2_PID	0x01E2
+#define MTXORB_FTDI_RANGE_01E3_PID	0x01E3
+#define MTXORB_FTDI_RANGE_01E4_PID	0x01E4
+#define MTXORB_FTDI_RANGE_01E5_PID	0x01E5
+#define MTXORB_FTDI_RANGE_01E6_PID	0x01E6
+#define MTXORB_FTDI_RANGE_01E7_PID	0x01E7
+#define MTXORB_FTDI_RANGE_01E8_PID	0x01E8
+#define MTXORB_FTDI_RANGE_01E9_PID	0x01E9
+#define MTXORB_FTDI_RANGE_01EA_PID	0x01EA
+#define MTXORB_FTDI_RANGE_01EB_PID	0x01EB
+#define MTXORB_FTDI_RANGE_01EC_PID	0x01EC
+#define MTXORB_FTDI_RANGE_01ED_PID	0x01ED
+#define MTXORB_FTDI_RANGE_01EE_PID	0x01EE
+#define MTXORB_FTDI_RANGE_01EF_PID	0x01EF
+#define MTXORB_FTDI_RANGE_01F0_PID	0x01F0
+#define MTXORB_FTDI_RANGE_01F1_PID	0x01F1
+#define MTXORB_FTDI_RANGE_01F2_PID	0x01F2
+#define MTXORB_FTDI_RANGE_01F3_PID	0x01F3
+#define MTXORB_FTDI_RANGE_01F4_PID	0x01F4
+#define MTXORB_FTDI_RANGE_01F5_PID	0x01F5
+#define MTXORB_FTDI_RANGE_01F6_PID	0x01F6
+#define MTXORB_FTDI_RANGE_01F7_PID	0x01F7
+#define MTXORB_FTDI_RANGE_01F8_PID	0x01F8
+#define MTXORB_FTDI_RANGE_01F9_PID	0x01F9
+#define MTXORB_FTDI_RANGE_01FA_PID	0x01FA
+#define MTXORB_FTDI_RANGE_01FB_PID	0x01FB
+#define MTXORB_FTDI_RANGE_01FC_PID	0x01FC
+#define MTXORB_FTDI_RANGE_01FD_PID	0x01FD
+#define MTXORB_FTDI_RANGE_01FE_PID	0x01FE
+#define MTXORB_FTDI_RANGE_01FF_PID	0x01FF
+
+
+
+/*
+ * The Mobility Lab (TML)
+ * Submitted by Pierre Castella
+ */
+#define TML_VID			0x1B91	/* Vendor ID */
+#define TML_USB_SERIAL_PID	0x0064	/* USB - Serial Converter */
+
+/* Alti-2 products  http://www.alti-2.com */
+#define ALTI2_VID	0x1BC9
+#define ALTI2_N3_PID	0x6001	/* Neptune 3 */
+
+/*
+ * Ionics PlugComputer
+ */
+#define IONICS_VID			0x1c0c
+#define IONICS_PLUGCOMPUTER_PID		0x0102
+
+/*
+ * Dresden Elektronic Sensor Terminal Board
+ */
+#define DE_VID			0x1cf1 /* Vendor ID */
+#define STB_PID			0x0001 /* Sensor Terminal Board */
+#define WHT_PID			0x0004 /* Wireless Handheld Terminal */
+
+/*
+ * STMicroelectonics
+ */
+#define ST_VID			0x0483
+#define ST_STMCLT1030_PID	0x3747 /* ST Micro Connect Lite STMCLT1030 */
+
+/*
+ * Papouch products (http://www.papouch.com/)
+ * Submitted by Folkert van Heusden
+ */
+
+#define PAPOUCH_VID			0x5050	/* Vendor ID */
+#define PAPOUCH_SB485_PID		0x0100	/* Papouch SB485 USB-485/422 Converter */
+#define PAPOUCH_AP485_PID		0x0101	/* AP485 USB-RS485 Converter */
+#define PAPOUCH_SB422_PID		0x0102	/* Papouch SB422 USB-RS422 Converter  */
+#define PAPOUCH_SB485_2_PID		0x0103	/* Papouch SB485 USB-485/422 Converter */
+#define PAPOUCH_AP485_2_PID		0x0104	/* AP485 USB-RS485 Converter */
+#define PAPOUCH_SB422_2_PID		0x0105	/* Papouch SB422 USB-RS422 Converter  */
+#define PAPOUCH_SB485S_PID		0x0106	/* Papouch SB485S USB-485/422 Converter */
+#define PAPOUCH_SB485C_PID		0x0107	/* Papouch SB485C USB-485/422 Converter */
+#define PAPOUCH_LEC_PID			0x0300	/* LEC USB Converter */
+#define PAPOUCH_SB232_PID		0x0301	/* Papouch SB232 USB-RS232 Converter */
+#define PAPOUCH_TMU_PID			0x0400	/* TMU USB Thermometer */
+#define PAPOUCH_IRAMP_PID		0x0500	/* Papouch IRAmp Duplex */
+#define PAPOUCH_DRAK5_PID		0x0700	/* Papouch DRAK5 */
+#define PAPOUCH_QUIDO8x8_PID		0x0800	/* Papouch Quido 8/8 Module */
+#define PAPOUCH_QUIDO4x4_PID		0x0900	/* Papouch Quido 4/4 Module */
+#define PAPOUCH_QUIDO2x2_PID		0x0a00	/* Papouch Quido 2/2 Module */
+#define PAPOUCH_QUIDO10x1_PID		0x0b00	/* Papouch Quido 10/1 Module */
+#define PAPOUCH_QUIDO30x3_PID		0x0c00	/* Papouch Quido 30/3 Module */
+#define PAPOUCH_QUIDO60x3_PID		0x0d00	/* Papouch Quido 60(100)/3 Module */
+#define PAPOUCH_QUIDO2x16_PID		0x0e00	/* Papouch Quido 2/16 Module */
+#define PAPOUCH_QUIDO3x32_PID		0x0f00	/* Papouch Quido 3/32 Module */
+#define PAPOUCH_DRAK6_PID		0x1000	/* Papouch DRAK6 */
+#define PAPOUCH_UPSUSB_PID		0x8000	/* Papouch UPS-USB adapter */
+#define PAPOUCH_MU_PID			0x8001	/* MU controller */
+#define PAPOUCH_SIMUKEY_PID		0x8002	/* Papouch SimuKey */
+#define PAPOUCH_AD4USB_PID		0x8003	/* AD4USB Measurement Module */
+#define PAPOUCH_GMUX_PID		0x8004	/* Papouch GOLIATH MUX */
+#define PAPOUCH_GMSR_PID		0x8005	/* Papouch GOLIATH MSR */
+
+/*
+ * Marvell SheevaPlug
+ */
+#define MARVELL_VID		0x9e88
+#define MARVELL_SHEEVAPLUG_PID	0x9e8f
+
+/*
+ * Evolution Robotics products (http://www.evolution.com/).
+ * Submitted by Shawn M. Lavelle.
+ */
+#define EVOLUTION_VID		0xDEEE	/* Vendor ID */
+#define EVOLUTION_ER1_PID	0x0300	/* ER1 Control Module */
+#define EVO_8U232AM_PID	0x02FF	/* Evolution robotics RCM2 (FT232AM)*/
+#define EVO_HYBRID_PID		0x0302	/* Evolution robotics RCM4 PID (FT232BM)*/
+#define EVO_RCM4_PID		0x0303	/* Evolution robotics RCM4 PID */
+
+/*
+ * MJS Gadgets HD Radio / XM Radio / Sirius Radio interfaces (using VID 0x0403)
+ */
+#define MJSG_GENERIC_PID	0x9378
+#define MJSG_SR_RADIO_PID	0x9379
+#define MJSG_XM_RADIO_PID	0x937A
+#define MJSG_HD_RADIO_PID	0x937C
+
+/*
+ * D.O.Tec products (http://www.directout.eu)
+ */
+#define FTDI_DOTEC_PID 0x9868
+
+/*
+ * Xverve Signalyzer tools (http://www.signalyzer.com/)
+ */
+#define XVERVE_SIGNALYZER_ST_PID	0xBCA0
+#define XVERVE_SIGNALYZER_SLITE_PID	0xBCA1
+#define XVERVE_SIGNALYZER_SH2_PID	0xBCA2
+#define XVERVE_SIGNALYZER_SH4_PID	0xBCA4
+
+/*
+ * Segway Robotic Mobility Platform USB interface (using VID 0x0403)
+ * Submitted by John G. Rogers
+ */
+#define SEGWAY_RMP200_PID	0xe729
+
+
+/*
+ * Accesio USB Data Acquisition products (http://www.accesio.com/)
+ */
+#define ACCESIO_COM4SM_PID 	0xD578
+
+/* www.sciencescope.co.uk educational dataloggers */
+#define FTDI_SCIENCESCOPE_LOGBOOKML_PID		0xFF18
+#define FTDI_SCIENCESCOPE_LS_LOGBOOK_PID	0xFF1C
+#define FTDI_SCIENCESCOPE_HS_LOGBOOK_PID	0xFF1D
+
+/*
+ * Milkymist One JTAG/Serial
+ */
+#define QIHARDWARE_VID			0x20B7
+#define MILKYMISTONE_JTAGSERIAL_PID	0x0713
+
+/*
+ * CTI GmbH RS485 Converter http://www.cti-lean.com/
+ */
+/* USB-485-Mini*/
+#define FTDI_CTI_MINI_PID	0xF608
+/* USB-Nano-485*/
+#define FTDI_CTI_NANO_PID	0xF60B
+
+
--- linux-mvl-dove-2.6.32.orig/drivers/usb/serial/keyspan_pda.c
+++ linux-mvl-dove-2.6.32/drivers/usb/serial/keyspan_pda.c
@@ -663,22 +663,6 @@
 	}
 }
 
-static int keyspan_pda_carrier_raised(struct usb_serial_port *port)
-{
-	struct usb_serial *serial = port->serial;
-	unsigned char modembits;
-
-	/* If we can read the modem status and the DCD is low then
-	   carrier is not raised yet */
-	if (keyspan_pda_get_modem_info(serial, &modembits) >= 0) {
-		if (!(modembits & (1>>6)))
-			return 0;
-	}
-	/* Carrier raised, or we failed (eg disconnected) so
-	   progress accordingly */
-	return 1;
-}
-
 
 static int keyspan_pda_open(struct tty_struct *tty,
 					struct usb_serial_port *port)
@@ -854,7 +838,6 @@
 	.id_table =		id_table_std,
 	.num_ports =		1,
 	.dtr_rts =		keyspan_pda_dtr_rts,
-	.carrier_raised	=	keyspan_pda_carrier_raised,
 	.open =			keyspan_pda_open,
 	.close =		keyspan_pda_close,
 	.write =		keyspan_pda_write,
--- linux-mvl-dove-2.6.32.orig/drivers/usb/serial/visor.c
+++ linux-mvl-dove-2.6.32/drivers/usb/serial/visor.c
@@ -27,6 +27,7 @@
 #include <linux/uaccess.h>
 #include <linux/usb.h>
 #include <linux/usb/serial.h>
+#include <linux/usb/cdc.h>
 #include "visor.h"
 
 /*
@@ -249,6 +250,7 @@
 	.throttle =		visor_throttle,
 	.unthrottle =		visor_unthrottle,
 	.attach =		clie_3_5_startup,
+	.release =		visor_release,
 	.write =		visor_write,
 	.write_room =		visor_write_room,
 	.write_bulk_callback =	visor_write_bulk_callback,
@@ -757,6 +759,17 @@
 
 	dbg("%s", __func__);
 
+	/*
+	 * some Samsung Android phones in modem mode have the same ID
+	 * as SPH-I500, but they are ACM devices, so dont bind to them
+	 */
+	if (id->idVendor == SAMSUNG_VENDOR_ID &&
+		id->idProduct == SAMSUNG_SPH_I500_ID &&
+		serial->dev->descriptor.bDeviceClass == USB_CLASS_COMM &&
+		serial->dev->descriptor.bDeviceSubClass ==
+			USB_CDC_SUBCLASS_ACM)
+		return -ENODEV;
+
 	if (serial->dev->actconfig->desc.bConfigurationValue != 1) {
 		dev_err(&serial->dev->dev, "active config #%d != 1 ??\n",
 			serial->dev->actconfig->desc.bConfigurationValue);
--- linux-mvl-dove-2.6.32.orig/drivers/usb/serial/io_ti.c
+++ linux-mvl-dove-2.6.32/drivers/usb/serial/io_ti.c
@@ -1157,7 +1157,7 @@
 
 			/* Check if we have an old version in the I2C and
 			   update if necessary */
-			if (download_cur_ver != download_new_ver) {
+			if (download_cur_ver < download_new_ver) {
 				dbg("%s - Update I2C dld from %d.%d to %d.%d",
 				    __func__,
 				    firmware_version->Ver_Major,
--- linux-mvl-dove-2.6.32.orig/drivers/usb/serial/sierra.c
+++ linux-mvl-dove-2.6.32/drivers/usb/serial/sierra.c
@@ -195,6 +195,7 @@
 static struct usb_device_id id_table [] = {
 	{ USB_DEVICE(0x0F3D, 0x0112) }, /* Airprime/Sierra PC 5220 */
 	{ USB_DEVICE(0x03F0, 0x1B1D) },	/* HP ev2200 a.k.a MC5720 */
+	{ USB_DEVICE(0x03F0, 0x211D) }, /* HP ev2210 a.k.a MC5725 */
 	{ USB_DEVICE(0x03F0, 0x1E1D) },	/* HP hs2300 a.k.a MC8775 */
 
 	{ USB_DEVICE(0x1199, 0x0017) },	/* Sierra Wireless EM5625 */
@@ -209,6 +210,7 @@
 	{ USB_DEVICE(0x1199, 0x0021) },	/* Sierra Wireless AirCard 597E */
 	{ USB_DEVICE(0x1199, 0x0112) }, /* Sierra Wireless AirCard 580 */
 	{ USB_DEVICE(0x1199, 0x0120) },	/* Sierra Wireless USB Dongle 595U */
+	{ USB_DEVICE(0x1199, 0x0301) },	/* Sierra Wireless USB Dongle 250U */
 	/* Sierra Wireless C597 */
 	{ USB_DEVICE_AND_INTERFACE_INFO(0x1199, 0x0023, 0xFF, 0xFF, 0xFF) },
 	/* Sierra Wireless T598 */
@@ -264,6 +266,9 @@
 	{ USB_DEVICE(0x1199, 0x68A3), 	/* Sierra Wireless Direct IP modems */
 	  .driver_info = (kernel_ulong_t)&direct_ip_interface_blacklist
 	},
+	{ USB_DEVICE(0x0f3d, 0x68A3), 	/* Airprime/Sierra Wireless Direct IP modems */
+	  .driver_info = (kernel_ulong_t)&direct_ip_interface_blacklist
+	},
 
 	{ }
 };
@@ -567,14 +572,17 @@
 	} else {
 		if (urb->actual_length) {
 			tty = tty_port_tty_get(&port->port);
-
-			tty_buffer_request_room(tty, urb->actual_length);
-			tty_insert_flip_string(tty, data, urb->actual_length);
-			tty_flip_buffer_push(tty);
-
-			tty_kref_put(tty);
-			usb_serial_debug_data(debug, &port->dev, __func__,
-				urb->actual_length, data);
+			if (tty) {
+				tty_buffer_request_room(tty,
+					urb->actual_length);
+				tty_insert_flip_string(tty, data,
+					urb->actual_length);
+				tty_flip_buffer_push(tty);
+
+				tty_kref_put(tty);
+				usb_serial_debug_data(debug, &port->dev,
+					__func__, urb->actual_length, data);
+			}
 		} else {
 			dev_dbg(&port->dev, "%s: empty read urb"
 				" received\n", __func__);
--- linux-mvl-dove-2.6.32.orig/drivers/usb/serial/usb-serial.c
+++ linux-mvl-dove-2.6.32/drivers/usb/serial/usb-serial.c
@@ -562,6 +562,18 @@
 	return -EINVAL;
 }
 
+static int serial_get_icount(struct tty_struct *tty,
+				struct serial_icounter_struct *icount)
+{
+	struct usb_serial_port *port = tty->driver_data;
+
+	dbg("%s - port %d", __func__, port->number);
+
+	if (port->serial->type->get_icount)
+		return port->serial->type->get_icount(tty, icount);
+	return -EINVAL;
+}
+
 /*
  * We would be calling tty_wakeup here, but unfortunately some line
  * disciplines have an annoying habit of calling tty->write from
@@ -1214,6 +1226,7 @@
 	.chars_in_buffer =	serial_chars_in_buffer,
 	.tiocmget =		serial_tiocmget,
 	.tiocmset =		serial_tiocmset,
+	.get_icount = 		serial_get_icount,
 	.cleanup = 		serial_cleanup,
 	.install = 		serial_install,
 	.proc_fops =		&serial_proc_fops,
--- linux-mvl-dove-2.6.32.orig/drivers/usb/serial/generic.c
+++ linux-mvl-dove-2.6.32/drivers/usb/serial/generic.c
@@ -489,6 +489,8 @@
 	dbg("%s - port %d", __func__, port->number);
 
 	if (port->serial->type->max_in_flight_urbs) {
+		kfree(urb->transfer_buffer);
+
 		spin_lock_irqsave(&port->lock, flags);
 		--port->urbs_in_flight;
 		port->tx_bytes_flight -= urb->transfer_buffer_length;
@@ -576,6 +578,26 @@
 }
 EXPORT_SYMBOL_GPL(usb_serial_handle_break);
 
+/**
+ *	usb_serial_handle_dcd_change - handle a change of carrier detect state
+ *	@port: usb_serial_port structure for the open port
+ *	@tty: tty_struct structure for the port
+ *	@status: new carrier detect status, nonzero if active
+ */
+void usb_serial_handle_dcd_change(struct usb_serial_port *usb_port,
+				struct tty_struct *tty, unsigned int status)
+{
+	struct tty_port *port = &usb_port->port;
+
+	dbg("%s - port %d, status %d", __func__, usb_port->number, status);
+
+	if (status)
+		wake_up_interruptible(&port->open_wait);
+	else if (tty && !C_CLOCAL(tty))
+		tty_hangup(tty);
+}
+EXPORT_SYMBOL_GPL(usb_serial_handle_dcd_change);
+
 int usb_serial_generic_resume(struct usb_serial *serial)
 {
 	struct usb_serial_port *port;
--- linux-mvl-dove-2.6.32.orig/drivers/usb/serial/kl5kusb105.c
+++ linux-mvl-dove-2.6.32/drivers/usb/serial/kl5kusb105.c
@@ -310,6 +310,7 @@
 				usb_free_urb(priv->write_urb_pool[j]);
 			}
 		}
+		kfree(priv);
 		usb_set_serial_port_data(serial->port[i], NULL);
 	}
 	return -ENOMEM;
--- linux-mvl-dove-2.6.32.orig/drivers/usb/serial/moto_modem.c
+++ linux-mvl-dove-2.6.32/drivers/usb/serial/moto_modem.c
@@ -25,6 +25,7 @@
 	{ USB_DEVICE(0x05c6, 0x3197) },	/* unknown Motorola phone */
 	{ USB_DEVICE(0x0c44, 0x0022) },	/* unknown Mororola phone */
 	{ USB_DEVICE(0x22b8, 0x2a64) },	/* Motorola KRZR K1m */
+	{ USB_DEVICE(0x22b8, 0x2c84) }, /* Motorola VE240 phone */
 	{ USB_DEVICE(0x22b8, 0x2c64) }, /* Motorola V950 phone */
 	{ },
 };
--- linux-mvl-dove-2.6.32.orig/drivers/usb/serial/mos7840.c
+++ linux-mvl-dove-2.6.32/drivers/usb/serial/mos7840.c
@@ -120,9 +120,20 @@
  * by making a change here, in moschip_port_id_table, and in
  * moschip_id_table_combined
  */
-#define USB_VENDOR_ID_BANDB             0x0856
-#define BANDB_DEVICE_ID_USOPTL4_4       0xAC44
-#define BANDB_DEVICE_ID_USOPTL4_2       0xAC42
+#define USB_VENDOR_ID_BANDB              0x0856
+#define BANDB_DEVICE_ID_USO9ML2_2        0xAC22
+#define BANDB_DEVICE_ID_USO9ML2_2P       0xBC00
+#define BANDB_DEVICE_ID_USO9ML2_4        0xAC24
+#define BANDB_DEVICE_ID_USO9ML2_4P       0xBC01
+#define BANDB_DEVICE_ID_US9ML2_2         0xAC29
+#define BANDB_DEVICE_ID_US9ML2_4         0xAC30
+#define BANDB_DEVICE_ID_USPTL4_2         0xAC31
+#define BANDB_DEVICE_ID_USPTL4_4         0xAC32
+#define BANDB_DEVICE_ID_USOPTL4_2        0xAC42
+#define BANDB_DEVICE_ID_USOPTL4_2P       0xBC02
+#define BANDB_DEVICE_ID_USOPTL4_4        0xAC44
+#define BANDB_DEVICE_ID_USOPTL4_4P       0xBC03
+#define BANDB_DEVICE_ID_USOPTL2_4        0xAC24
 
 /* This driver also supports
  * ATEN UC2324 device using Moschip MCS7840
@@ -177,8 +188,19 @@
 static struct usb_device_id moschip_port_id_table[] = {
 	{USB_DEVICE(USB_VENDOR_ID_MOSCHIP, MOSCHIP_DEVICE_ID_7840)},
 	{USB_DEVICE(USB_VENDOR_ID_MOSCHIP, MOSCHIP_DEVICE_ID_7820)},
-	{USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USOPTL4_4)},
+	{USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USO9ML2_2)},
+	{USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USO9ML2_2P)},
+	{USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USO9ML2_4)},
+	{USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USO9ML2_4P)},
+	{USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_US9ML2_2)},
+	{USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_US9ML2_4)},
+	{USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USPTL4_2)},
+	{USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USPTL4_4)},
 	{USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USOPTL4_2)},
+	{USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USOPTL4_2P)},
+	{USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USOPTL4_4)},
+	{USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USOPTL4_4P)},
+	{USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USOPTL2_4)},
 	{USB_DEVICE(USB_VENDOR_ID_ATENINTL, ATENINTL_DEVICE_ID_UC2324)},
 	{USB_DEVICE(USB_VENDOR_ID_ATENINTL, ATENINTL_DEVICE_ID_UC2322)},
 	{}			/* terminating entry */
@@ -187,8 +209,19 @@
 static __devinitdata struct usb_device_id moschip_id_table_combined[] = {
 	{USB_DEVICE(USB_VENDOR_ID_MOSCHIP, MOSCHIP_DEVICE_ID_7840)},
 	{USB_DEVICE(USB_VENDOR_ID_MOSCHIP, MOSCHIP_DEVICE_ID_7820)},
-	{USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USOPTL4_4)},
+	{USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USO9ML2_2)},
+	{USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USO9ML2_2P)},
+	{USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USO9ML2_4)},
+	{USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USO9ML2_4P)},
+	{USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_US9ML2_2)},
+	{USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_US9ML2_4)},
+	{USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USPTL4_2)},
+	{USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USPTL4_4)},
 	{USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USOPTL4_2)},
+	{USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USOPTL4_2P)},
+	{USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USOPTL4_4)},
+	{USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USOPTL4_4P)},
+	{USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USOPTL2_4)},
 	{USB_DEVICE(USB_VENDOR_ID_ATENINTL, ATENINTL_DEVICE_ID_UC2324)},
 	{USB_DEVICE(USB_VENDOR_ID_ATENINTL, ATENINTL_DEVICE_ID_UC2322)},
 	{}			/* terminating entry */
@@ -262,12 +295,19 @@
 {
 	struct usb_device *dev = port->serial->dev;
 	int ret = 0;
+	u8 *buf;
+
+	buf = kmalloc(VENDOR_READ_LENGTH, GFP_KERNEL);
+	if (!buf)
+		return -ENOMEM;
 
 	ret = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), MCS_RDREQ,
-			      MCS_RD_RTYPE, 0, reg, val, VENDOR_READ_LENGTH,
+			      MCS_RD_RTYPE, 0, reg, buf, VENDOR_READ_LENGTH,
 			      MOS_WDR_TIMEOUT);
+	*val = buf[0];
 	dbg("mos7840_get_reg_sync offset is %x, return val %x", reg, *val);
-	*val = (*val) & 0x00ff;
+
+	kfree(buf);
 	return ret;
 }
 
@@ -320,6 +360,11 @@
 	struct usb_device *dev = port->serial->dev;
 	int ret = 0;
 	__u16 Wval;
+	u8 *buf;
+
+	buf = kmalloc(VENDOR_READ_LENGTH, GFP_KERNEL);
+	if (!buf)
+		return -ENOMEM;
 
 	/* dbg("application number is %4x",
 	    (((__u16)port->number - (__u16)(port->serial->minor))+1)<<8); */
@@ -343,9 +388,11 @@
 		}
 	}
 	ret = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), MCS_RDREQ,
-			      MCS_RD_RTYPE, Wval, reg, val, VENDOR_READ_LENGTH,
+			      MCS_RD_RTYPE, Wval, reg, buf, VENDOR_READ_LENGTH,
 			      MOS_WDR_TIMEOUT);
-	*val = (*val) & 0x00ff;
+	*val = buf[0];
+
+	kfree(buf);
 	return ret;
 }
 
@@ -696,7 +743,6 @@
 	mos7840_port = urb->context;
 	if (!mos7840_port) {
 		dbg("%s", "NULL mos7840_port pointer");
-		mos7840_port->read_urb_busy = false;
 		return;
 	}
 
@@ -2241,6 +2287,9 @@
 	case TIOCGICOUNT:
 		cnow = mos7840_port->icount;
 		smp_rmb();
+
+		memset(&icount, 0, sizeof(struct serial_icounter_struct));
+
 		icount.cts = cnow.cts;
 		icount.dsr = cnow.dsr;
 		icount.rng = cnow.rng;
--- linux-mvl-dove-2.6.32.orig/drivers/usb/serial/qcserial.c
+++ linux-mvl-dove-2.6.32/drivers/usb/serial/qcserial.c
@@ -47,6 +47,35 @@
 	{USB_DEVICE(0x05c6, 0x9221)},	/* Generic Gobi QDL device */
 	{USB_DEVICE(0x05c6, 0x9231)},	/* Generic Gobi QDL device */
 	{USB_DEVICE(0x1f45, 0x0001)},	/* Unknown Gobi QDL device */
+	{USB_DEVICE(0x413c, 0x8185)},	/* Dell Gobi 2000 QDL device (N0218, VU936) */
+	{USB_DEVICE(0x413c, 0x8186)},	/* Dell Gobi 2000 Modem device (N0218, VU936) */
+	{USB_DEVICE(0x05c6, 0x9224)},	/* Sony Gobi 2000 QDL device (N0279, VU730) */
+	{USB_DEVICE(0x05c6, 0x9225)},	/* Sony Gobi 2000 Modem device (N0279, VU730) */
+	{USB_DEVICE(0x05c6, 0x9244)},	/* Samsung Gobi 2000 QDL device (VL176) */
+	{USB_DEVICE(0x05c6, 0x9245)},	/* Samsung Gobi 2000 Modem device (VL176) */
+	{USB_DEVICE(0x03f0, 0x241d)},	/* HP Gobi 2000 QDL device (VP412) */
+	{USB_DEVICE(0x03f0, 0x251d)},	/* HP Gobi 2000 Modem device (VP412) */
+	{USB_DEVICE(0x05c6, 0x9214)},	/* Acer Gobi 2000 QDL device (VP413) */
+	{USB_DEVICE(0x05c6, 0x9215)},	/* Acer Gobi 2000 Modem device (VP413) */
+	{USB_DEVICE(0x05c6, 0x9264)},	/* Asus Gobi 2000 QDL device (VR305) */
+	{USB_DEVICE(0x05c6, 0x9265)},	/* Asus Gobi 2000 Modem device (VR305) */
+	{USB_DEVICE(0x05c6, 0x9234)},	/* Top Global Gobi 2000 QDL device (VR306) */
+	{USB_DEVICE(0x05c6, 0x9235)},	/* Top Global Gobi 2000 Modem device (VR306) */
+	{USB_DEVICE(0x05c6, 0x9274)},	/* iRex Technologies Gobi 2000 QDL device (VR307) */
+	{USB_DEVICE(0x05c6, 0x9275)},	/* iRex Technologies Gobi 2000 Modem device (VR307) */
+	{USB_DEVICE(0x1199, 0x9000)},	/* Sierra Wireless Gobi 2000 QDL device (VT773) */
+	{USB_DEVICE(0x1199, 0x9001)},	/* Sierra Wireless Gobi 2000 Modem device (VT773) */
+	{USB_DEVICE(0x1199, 0x9002)},	/* Sierra Wireless Gobi 2000 Modem device (VT773) */
+	{USB_DEVICE(0x1199, 0x9003)},	/* Sierra Wireless Gobi 2000 Modem device (VT773) */
+	{USB_DEVICE(0x1199, 0x9004)},	/* Sierra Wireless Gobi 2000 Modem device (VT773) */
+	{USB_DEVICE(0x1199, 0x9005)},	/* Sierra Wireless Gobi 2000 Modem device (VT773) */
+	{USB_DEVICE(0x1199, 0x9006)},	/* Sierra Wireless Gobi 2000 Modem device (VT773) */
+	{USB_DEVICE(0x1199, 0x9007)},	/* Sierra Wireless Gobi 2000 Modem device (VT773) */
+	{USB_DEVICE(0x1199, 0x9008)},	/* Sierra Wireless Gobi 2000 Modem device (VT773) */
+	{USB_DEVICE(0x1199, 0x9009)},	/* Sierra Wireless Gobi 2000 Modem device (VT773) */
+	{USB_DEVICE(0x1199, 0x900a)},	/* Sierra Wireless Gobi 2000 Modem device (VT773) */
+	{USB_DEVICE(0x16d8, 0x8001)},	/* CMDTech Gobi 2000 QDL device (VU922) */
+	{USB_DEVICE(0x16d8, 0x8002)},	/* CMDTech Gobi 2000 Modem device (VU922) */
 	{ }				/* Terminating entry */
 };
 MODULE_DEVICE_TABLE(usb, id_table);
--- linux-mvl-dove-2.6.32.orig/drivers/usb/serial/option.c
+++ linux-mvl-dove-2.6.32/drivers/usb/serial/option.c
@@ -165,7 +165,10 @@
 #define HUAWEI_PRODUCT_E143D			0x143D
 #define HUAWEI_PRODUCT_E143E			0x143E
 #define HUAWEI_PRODUCT_E143F			0x143F
+#define HUAWEI_PRODUCT_K4505			0x1464
+#define HUAWEI_PRODUCT_K3765			0x1465
 #define HUAWEI_PRODUCT_E14AC			0x14AC
+#define HUAWEI_PRODUCT_ETS1220			0x1803
 
 #define QUANTA_VENDOR_ID			0x0408
 #define QUANTA_PRODUCT_Q101			0xEA02
@@ -225,7 +228,9 @@
 #define AMOI_VENDOR_ID				0x1614
 #define AMOI_PRODUCT_H01			0x0800
 #define AMOI_PRODUCT_H01A			0x7002
+#define AMOI_PRODUCT_9508			0x0800
 #define AMOI_PRODUCT_H02			0x0802
+#define AMOI_PRODUCT_SKYPEPHONE_S2		0x0407
 
 #define DELL_VENDOR_ID				0x413C
 
@@ -283,12 +288,11 @@
 #define BANDRICH_PRODUCT_1011			0x1011
 #define BANDRICH_PRODUCT_1012			0x1012
 
-#define AMOI_VENDOR_ID			0x1614
-#define AMOI_PRODUCT_9508			0x0800
-
 #define QUALCOMM_VENDOR_ID			0x05C6
 
-#define MAXON_VENDOR_ID				0x16d8
+#define CMOTECH_VENDOR_ID			0x16d8
+#define CMOTECH_PRODUCT_6008			0x6008
+#define CMOTECH_PRODUCT_6280			0x6280
 
 #define TELIT_VENDOR_ID				0x1bc7
 #define TELIT_PRODUCT_UC864E			0x1003
@@ -314,6 +318,7 @@
 #define QISDA_PRODUCT_H21_4512			0x4512
 #define QISDA_PRODUCT_H21_4523			0x4523
 #define QISDA_PRODUCT_H20_4515			0x4515
+#define QISDA_PRODUCT_H20_4518			0x4518
 #define QISDA_PRODUCT_H20_4519			0x4519
 
 /* TLAYTECH PRODUCTS */
@@ -332,6 +337,24 @@
 #define ALCATEL_VENDOR_ID			0x1bbb
 #define ALCATEL_PRODUCT_X060S			0x0000
 
+#define PIRELLI_VENDOR_ID			0x1266
+#define PIRELLI_PRODUCT_C100_1			0x1002
+#define PIRELLI_PRODUCT_C100_2			0x1003
+#define PIRELLI_PRODUCT_1004			0x1004
+#define PIRELLI_PRODUCT_1005			0x1005
+#define PIRELLI_PRODUCT_1006			0x1006
+#define PIRELLI_PRODUCT_1007			0x1007
+#define PIRELLI_PRODUCT_1008			0x1008
+#define PIRELLI_PRODUCT_1009			0x1009
+#define PIRELLI_PRODUCT_100A			0x100a
+#define PIRELLI_PRODUCT_100B			0x100b
+#define PIRELLI_PRODUCT_100C			0x100c
+#define PIRELLI_PRODUCT_100D			0x100d
+#define PIRELLI_PRODUCT_100E			0x100e
+#define PIRELLI_PRODUCT_100F			0x100f
+#define PIRELLI_PRODUCT_1011			0x1011
+#define PIRELLI_PRODUCT_1012			0x1012
+
 /* Airplus products */
 #define AIRPLUS_VENDOR_ID			0x1011
 #define AIRPLUS_PRODUCT_MCD650			0x3198
@@ -340,6 +363,39 @@
 #define FOUR_G_SYSTEMS_VENDOR_ID		0x1c9e
 #define FOUR_G_SYSTEMS_PRODUCT_W14		0x9603
 
+/* Haier products */
+#define HAIER_VENDOR_ID				0x201e
+#define HAIER_PRODUCT_CE100			0x2009
+
+/* Cinterion (formerly Siemens) products */
+#define SIEMENS_VENDOR_ID				0x0681
+#define CINTERION_VENDOR_ID				0x1e2d
+#define CINTERION_PRODUCT_HC25_MDM		0x0047
+#define CINTERION_PRODUCT_HC25_MDMNET	0x0040
+#define CINTERION_PRODUCT_HC28_MDM		0x004C
+#define CINTERION_PRODUCT_HC28_MDMNET	0x004A /* same for HC28J */
+#define CINTERION_PRODUCT_EU3_E			0x0051
+#define CINTERION_PRODUCT_EU3_P			0x0052
+#define CINTERION_PRODUCT_PH8			0x0053
+
+/* Olivetti products */
+#define OLIVETTI_VENDOR_ID			0x0b3c
+#define OLIVETTI_PRODUCT_OLICARD100		0xc000
+
+/* Celot products */
+#define CELOT_VENDOR_ID				0x211f
+#define CELOT_PRODUCT_CT680M			0x6801
+
+/* ONDA Communication vendor id */
+#define ONDA_VENDOR_ID       0x1ee8
+
+/* ONDA MT825UP HSDPA 14.2 modem */
+#define ONDA_MT825UP         0x000b
+
+/* Samsung products */
+#define SAMSUNG_VENDOR_ID                       0x04e8
+#define SAMSUNG_PRODUCT_GT_B3730                0x6889
+
 static struct usb_device_id option_ids[] = {
 	{ USB_DEVICE(OPTION_VENDOR_ID, OPTION_PRODUCT_COLT) },
 	{ USB_DEVICE(OPTION_VENDOR_ID, OPTION_PRODUCT_RICOLA) },
@@ -437,7 +493,10 @@
 	{ USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E143D, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E143E, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E143F, 0xff, 0xff, 0xff) },
-	{ USB_DEVICE(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E14AC) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_K4505, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_K3765, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_ETS1220, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E14AC, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE(AMOI_VENDOR_ID, AMOI_PRODUCT_9508) },
 	{ USB_DEVICE(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_V640) }, /* Novatel Merlin V640/XV620 */
 	{ USB_DEVICE(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_V620) }, /* Novatel Merlin V620/S620 */
@@ -473,6 +532,7 @@
 	{ USB_DEVICE(AMOI_VENDOR_ID, AMOI_PRODUCT_H01) },
 	{ USB_DEVICE(AMOI_VENDOR_ID, AMOI_PRODUCT_H01A) },
 	{ USB_DEVICE(AMOI_VENDOR_ID, AMOI_PRODUCT_H02) },
+	{ USB_DEVICE(AMOI_VENDOR_ID, AMOI_PRODUCT_SKYPEPHONE_S2) },
 
 	{ USB_DEVICE(DELL_VENDOR_ID, DELL_PRODUCT_5700_MINICARD) },		/* Dell Wireless 5700 Mobile Broadband CDMA/EVDO Mini-Card == Novatel Expedite EV620 CDMA/EV-DO */
 	{ USB_DEVICE(DELL_VENDOR_ID, DELL_PRODUCT_5500_MINICARD) },		/* Dell Wireless 5500 Mobile Broadband HSDPA Mini-Card == Novatel Expedite EU740 HSDPA/3G */
@@ -516,7 +576,8 @@
 	{ USB_DEVICE(KYOCERA_VENDOR_ID, KYOCERA_PRODUCT_KPC680) },
 	{ USB_DEVICE(QUALCOMM_VENDOR_ID, 0x6000)}, /* ZTE AC8700 */
 	{ USB_DEVICE(QUALCOMM_VENDOR_ID, 0x6613)}, /* Onda H600/ZTE MF330 */
-	{ USB_DEVICE(MAXON_VENDOR_ID, 0x6280) }, /* BP3-USB & BP3-EXT HSDPA */
+	{ USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_6280) }, /* BP3-USB & BP3-EXT HSDPA */
+	{ USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_6008) },
 	{ USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_UC864E) },
 	{ USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_UC864G) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_MF622, 0xff, 0xff, 0xff) }, /* ZTE WCDMA products */
@@ -538,6 +599,7 @@
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0011, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0012, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0013, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0014, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_MF628, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0016, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0017, 0xff, 0xff, 0xff) },
@@ -549,43 +611,269 @@
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0023, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0024, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0025, 0xff, 0xff, 0xff) },
-	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0026, 0xff, 0xff, 0xff) },
+	/* { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0026, 0xff, 0xff, 0xff) }, */
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0028, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0029, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0030, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_MF626, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0032, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0033, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0034, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0037, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0038, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0039, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0040, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0042, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0043, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0044, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0048, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0049, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0050, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0051, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0052, 0xff, 0xff, 0xff) },
+	/* { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0053, 0xff, 0xff, 0xff) }, */
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0054, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0055, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0056, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0057, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0058, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0059, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0061, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0062, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0063, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0064, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0065, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0066, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0067, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0069, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0070, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0076, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0077, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0078, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0079, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0082, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0083, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0086, 0xff, 0xff, 0xff) },
-	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x2002, 0xff, 0xff, 0xff) },
-	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x2003, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0087, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0104, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0105, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0106, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0108, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0113, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0117, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0118, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0121, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0122, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0123, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0124, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0125, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0126, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0128, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0142, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0143, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0144, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0145, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0146, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0147, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0148, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0149, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0150, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0151, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0152, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0153, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0154, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0155, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0156, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0157, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0158, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0159, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0160, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0161, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0162, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1008, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1010, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1012, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1057, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1058, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1059, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1060, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1061, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1062, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1063, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1064, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1065, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1066, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1067, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1068, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1069, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1070, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1071, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1072, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1073, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1074, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1075, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1076, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1077, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1078, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1079, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1080, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1081, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1082, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1083, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1084, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1085, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1086, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1087, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1088, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1089, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1090, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1091, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1092, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1093, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1094, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1095, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1096, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1097, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1098, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1099, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1100, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1101, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1102, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1103, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1104, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1105, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1106, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1107, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1108, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1109, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1110, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1111, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1112, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1113, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1114, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1115, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1116, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1117, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1118, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1119, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1120, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1121, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1122, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1123, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1124, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1125, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1126, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1127, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1128, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1129, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1130, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1131, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1132, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1133, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1134, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1135, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1136, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1137, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1138, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1139, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1140, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1141, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1142, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1143, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1144, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1145, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1146, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1147, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1148, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1149, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1150, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1151, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1152, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1153, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1154, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1155, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1156, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1157, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1158, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1159, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1160, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1161, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1162, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1163, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1164, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1165, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1166, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1167, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1168, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1169, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1170, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1244, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1245, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1246, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1247, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1248, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1249, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1250, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1251, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1252, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1253, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1254, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1255, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1256, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1257, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1258, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1259, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1260, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1261, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1262, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1263, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1264, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1265, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1266, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1267, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1268, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1269, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1270, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1271, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1272, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1273, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1274, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1275, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1276, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1277, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1278, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1279, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1280, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1281, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1282, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1283, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1284, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1285, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1286, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1287, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1288, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1289, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1290, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1291, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1292, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1293, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1294, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1295, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1296, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1297, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1298, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1299, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x1300, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0014, 0xff, 0xff, 0xff) }, /* ZTE CDMA products */
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0027, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0059, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0060, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0070, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0073, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0130, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0141, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x2002, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x2003, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_CDMA_TECH, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_AC8710, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_AC2726, 0xff, 0xff, 0xff) },
@@ -595,15 +883,50 @@
 	{ USB_DEVICE(QISDA_VENDOR_ID, QISDA_PRODUCT_H21_4512) },
 	{ USB_DEVICE(QISDA_VENDOR_ID, QISDA_PRODUCT_H21_4523) },
 	{ USB_DEVICE(QISDA_VENDOR_ID, QISDA_PRODUCT_H20_4515) },
+	{ USB_DEVICE(QISDA_VENDOR_ID, QISDA_PRODUCT_H20_4518) },
 	{ USB_DEVICE(QISDA_VENDOR_ID, QISDA_PRODUCT_H20_4519) },
 	{ USB_DEVICE(TOSHIBA_VENDOR_ID, TOSHIBA_PRODUCT_G450) },
 	{ USB_DEVICE(TOSHIBA_VENDOR_ID, TOSHIBA_PRODUCT_HSDPA_MINICARD ) }, /* Toshiba 3G HSDPA == Novatel Expedite EU870D MiniCard */
 	{ USB_DEVICE(ALINK_VENDOR_ID, 0x9000) },
+	{ USB_DEVICE(ALINK_VENDOR_ID, 0xce16) },
 	{ USB_DEVICE_AND_INTERFACE_INFO(ALINK_VENDOR_ID, ALINK_PRODUCT_3GU, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE(ALCATEL_VENDOR_ID, ALCATEL_PRODUCT_X060S) },
 	{ USB_DEVICE(AIRPLUS_VENDOR_ID, AIRPLUS_PRODUCT_MCD650) },
 	{ USB_DEVICE(TLAYTECH_VENDOR_ID, TLAYTECH_PRODUCT_TEU800) },
 	{ USB_DEVICE(FOUR_G_SYSTEMS_VENDOR_ID, FOUR_G_SYSTEMS_PRODUCT_W14) },
+	{ USB_DEVICE(HAIER_VENDOR_ID, HAIER_PRODUCT_CE100) },
+	/* Pirelli  */
+	{ USB_DEVICE(PIRELLI_VENDOR_ID, PIRELLI_PRODUCT_C100_1)},
+	{ USB_DEVICE(PIRELLI_VENDOR_ID, PIRELLI_PRODUCT_C100_2)},
+	{ USB_DEVICE(PIRELLI_VENDOR_ID, PIRELLI_PRODUCT_1004)},
+	{ USB_DEVICE(PIRELLI_VENDOR_ID, PIRELLI_PRODUCT_1005)},
+	{ USB_DEVICE(PIRELLI_VENDOR_ID, PIRELLI_PRODUCT_1006)},
+	{ USB_DEVICE(PIRELLI_VENDOR_ID, PIRELLI_PRODUCT_1007)},
+	{ USB_DEVICE(PIRELLI_VENDOR_ID, PIRELLI_PRODUCT_1008)},
+	{ USB_DEVICE(PIRELLI_VENDOR_ID, PIRELLI_PRODUCT_1009)},
+	{ USB_DEVICE(PIRELLI_VENDOR_ID, PIRELLI_PRODUCT_100A)},
+	{ USB_DEVICE(PIRELLI_VENDOR_ID, PIRELLI_PRODUCT_100B) },
+	{ USB_DEVICE(PIRELLI_VENDOR_ID, PIRELLI_PRODUCT_100C) },
+	{ USB_DEVICE(PIRELLI_VENDOR_ID, PIRELLI_PRODUCT_100D) },
+	{ USB_DEVICE(PIRELLI_VENDOR_ID, PIRELLI_PRODUCT_100E) },
+	{ USB_DEVICE(PIRELLI_VENDOR_ID, PIRELLI_PRODUCT_100F) },
+	{ USB_DEVICE(PIRELLI_VENDOR_ID, PIRELLI_PRODUCT_1011)},
+	{ USB_DEVICE(PIRELLI_VENDOR_ID, PIRELLI_PRODUCT_1012)},
+	/* Cinterion */
+	{ USB_DEVICE(CINTERION_VENDOR_ID, CINTERION_PRODUCT_EU3_E) },
+	{ USB_DEVICE(CINTERION_VENDOR_ID, CINTERION_PRODUCT_EU3_P) },
+	{ USB_DEVICE(CINTERION_VENDOR_ID, CINTERION_PRODUCT_PH8) },
+	{ USB_DEVICE(CINTERION_VENDOR_ID, CINTERION_PRODUCT_HC28_MDM) },
+	{ USB_DEVICE(CINTERION_VENDOR_ID, CINTERION_PRODUCT_HC28_MDMNET) },
+	{ USB_DEVICE(SIEMENS_VENDOR_ID, CINTERION_PRODUCT_HC25_MDM) },
+	{ USB_DEVICE(SIEMENS_VENDOR_ID, CINTERION_PRODUCT_HC25_MDMNET) },
+	{ USB_DEVICE(SIEMENS_VENDOR_ID, CINTERION_PRODUCT_HC28_MDM) }, /* HC28 enumerates with Siemens or Cinterion VID depending on FW revision */
+	{ USB_DEVICE(SIEMENS_VENDOR_ID, CINTERION_PRODUCT_HC28_MDMNET) },
+
+	{ USB_DEVICE(OLIVETTI_VENDOR_ID, OLIVETTI_PRODUCT_OLICARD100) },
+	{ USB_DEVICE(CELOT_VENDOR_ID, CELOT_PRODUCT_CT680M) }, /* CT-650 CDMA 450 1xEVDO modem */
+	{ USB_DEVICE(ONDA_VENDOR_ID, ONDA_MT825UP) }, /* ONDA MT825UP modem */
+	{ USB_DEVICE_AND_INTERFACE_INFO(SAMSUNG_VENDOR_ID, SAMSUNG_PRODUCT_GT_B3730, USB_CLASS_CDC_DATA, 0x00, 0x00) }, /* Samsung GT-B3730/GT-B3710 LTE USB modem.*/
 	{ } /* Terminating entry */
 };
 MODULE_DEVICE_TABLE(usb, option_ids);
@@ -726,12 +1049,26 @@
 			const struct usb_device_id *id)
 {
 	struct option_intf_private *data;
+
 	/* D-Link DWM 652 still exposes CD-Rom emulation interface in modem mode */
 	if (serial->dev->descriptor.idVendor == DLINK_VENDOR_ID &&
 		serial->dev->descriptor.idProduct == DLINK_PRODUCT_DWM_652 &&
 		serial->interface->cur_altsetting->desc.bInterfaceClass == 0x8)
 		return -ENODEV;
 
+	/* Bandrich modem and AT command interface is 0xff */
+	if ((serial->dev->descriptor.idVendor == BANDRICH_VENDOR_ID ||
+		serial->dev->descriptor.idVendor == PIRELLI_VENDOR_ID) &&
+		serial->interface->cur_altsetting->desc.bInterfaceClass != 0xff)
+		return -ENODEV;
+
+	/* Don't bind network interfaces on Huawei K3765 & K4505 */
+	if (serial->dev->descriptor.idVendor == HUAWEI_VENDOR_ID &&
+		(serial->dev->descriptor.idProduct == HUAWEI_PRODUCT_K3765 ||
+			serial->dev->descriptor.idProduct == HUAWEI_PRODUCT_K4505) &&
+		serial->interface->cur_altsetting->desc.bInterfaceNumber == 1)
+		return -ENODEV;
+
 	data = serial->private = kzalloc(sizeof(struct option_intf_private), GFP_KERNEL);
 	if (!data)
 		return -ENOMEM;
--- linux-mvl-dove-2.6.32.orig/drivers/usb/serial/kobil_sct.c
+++ linux-mvl-dove-2.6.32/drivers/usb/serial/kobil_sct.c
@@ -345,7 +345,8 @@
 
 	/* FIXME: Add rts/dtr methods */
 	if (port->write_urb) {
-		usb_kill_urb(port->write_urb);
+		usb_poison_urb(port->write_urb);
+		kfree(port->write_urb->transfer_buffer);
 		usb_free_urb(port->write_urb);
 		port->write_urb = NULL;
 	}
@@ -371,7 +372,7 @@
 	}
 
 	tty = tty_port_tty_get(&port->port);
-	if (urb->actual_length) {
+	if (tty && urb->actual_length) {
 
 		/* BEGIN DEBUG */
 		/*
--- linux-mvl-dove-2.6.32.orig/drivers/usb/serial/ftdi_sio.h
+++ linux-mvl-dove-2.6.32/drivers/usb/serial/ftdi_sio.h
@@ -1,7 +1,10 @@
 /*
- * Definitions for the FTDI USB Single Port Serial Converter -
+ * Driver definitions for the FTDI USB Single Port Serial Converter -
  * known as FTDI_SIO (Serial Input/Output application of the chipset)
  *
+ * For USB vendor/product IDs (VID/PID), please see ftdi_sio_ids.h
+ *
+ *
  * The example I have is known as the USC-1000 which is available from
  * http://www.dse.co.nz - cat no XH4214 It looks similar to this:
  * http://www.dansdata.com/usbser.htm but I can't be sure There are other
@@ -17,866 +20,7 @@
  * Bill Ryder - bryder@sgi.com formerly of Silicon Graphics, Inc.- wrote the
  * FTDI_SIO implementation.
  *
- * Philipp Gühring - pg@futureware.at - added the Device ID of the USB relais
- * from Rudolf Gugler
- *
- */
-
-#define FTDI_VID	0x0403	/* Vendor Id */
-#define FTDI_SIO_PID	0x8372	/* Product Id SIO application of 8U100AX  */
-#define FTDI_8U232AM_PID 0x6001 /* Similar device to SIO above */
-#define FTDI_8U232AM_ALT_PID 0x6006 /* FTDI's alternate PID for above */
-#define FTDI_8U2232C_PID 0x6010 /* Dual channel device */
-#define FTDI_232RL_PID  0xFBFA  /* Product ID for FT232RL */
-#define FTDI_4232H_PID 0x6011 /* Quad channel hi-speed device */
-#define FTDI_RELAIS_PID	0xFA10  /* Relais device from Rudolf Gugler */
-#define FTDI_NF_RIC_VID	0x0DCD	/* Vendor Id */
-#define FTDI_NF_RIC_PID	0x0001	/* Product Id */
-#define FTDI_USBX_707_PID 0xF857	/* ADSTech IR Blaster USBX-707 */
-
-/* Larsen and Brusgaard AltiTrack/USBtrack  */
-#define LARSENBRUSGAARD_VID		0x0FD8
-#define LB_ALTITRACK_PID		0x0001
-
-/* www.canusb.com Lawicel CANUSB device */
-#define FTDI_CANUSB_PID 0xFFA8 /* Product Id */
-
-/* AlphaMicro Components AMC-232USB01 device */
-#define FTDI_AMC232_PID 0xFF00 /* Product Id */
-
-/* www.candapter.com Ewert Energy Systems CANdapter device */
-#define FTDI_CANDAPTER_PID 0x9F80 /* Product Id */
-
-/* SCS HF Radio Modems PID's (http://www.scs-ptc.com) */
-/* the VID is the standard ftdi vid (FTDI_VID) */
-#define FTDI_SCS_DEVICE_0_PID 0xD010    /* SCS PTC-IIusb */
-#define FTDI_SCS_DEVICE_1_PID 0xD011    /* SCS Tracker / DSP TNC */
-#define FTDI_SCS_DEVICE_2_PID 0xD012
-#define FTDI_SCS_DEVICE_3_PID 0xD013
-#define FTDI_SCS_DEVICE_4_PID 0xD014
-#define FTDI_SCS_DEVICE_5_PID 0xD015
-#define FTDI_SCS_DEVICE_6_PID 0xD016
-#define FTDI_SCS_DEVICE_7_PID 0xD017
-
-/* ACT Solutions HomePro ZWave interface (http://www.act-solutions.com/HomePro.htm) */
-#define FTDI_ACTZWAVE_PID	0xF2D0
-
-
-/* www.starting-point-systems.com µChameleon device */
-#define FTDI_MICRO_CHAMELEON_PID	0xCAA0	/* Product Id */
-
-/* www.irtrans.de device */
-#define FTDI_IRTRANS_PID 0xFC60 /* Product Id */
-
-
-/* www.thoughttechnology.com/ TT-USB provide with procomp use ftdi_sio */
-#define FTDI_TTUSB_PID 0xFF20 /* Product Id */
-
-/* iPlus device */
-#define FTDI_IPLUS_PID 0xD070 /* Product Id */
-#define FTDI_IPLUS2_PID 0xD071 /* Product Id */
-
-/* DMX4ALL DMX Interfaces */
-#define FTDI_DMX4ALL 0xC850
-
-/* OpenDCC (www.opendcc.de) product id */
-#define FTDI_OPENDCC_PID	0xBFD8
-#define FTDI_OPENDCC_SNIFFER_PID	0xBFD9
-#define FTDI_OPENDCC_THROTTLE_PID	0xBFDA
-#define FTDI_OPENDCC_GATEWAY_PID	0xBFDB
-
-/* Sprog II (Andrew Crosland's SprogII DCC interface) */
-#define FTDI_SPROG_II		0xF0C8
-
-/* www.crystalfontz.com devices - thanx for providing free devices for evaluation ! */
-/* they use the ftdi chipset for the USB interface and the vendor id is the same */
-#define FTDI_XF_632_PID 0xFC08	/* 632: 16x2 Character Display */
-#define FTDI_XF_634_PID 0xFC09	/* 634: 20x4 Character Display */
-#define FTDI_XF_547_PID 0xFC0A	/* 547: Two line Display */
-#define FTDI_XF_633_PID 0xFC0B	/* 633: 16x2 Character Display with Keys */
-#define FTDI_XF_631_PID 0xFC0C	/* 631: 20x2 Character Display */
-#define FTDI_XF_635_PID 0xFC0D	/* 635: 20x4 Character Display */
-#define FTDI_XF_640_PID 0xFC0E	/* 640: Two line Display */
-#define FTDI_XF_642_PID 0xFC0F	/* 642: Two line Display */
-
-/* Video Networks Limited / Homechoice in the UK use an ftdi-based device for their 1Mb */
-/* broadband internet service.  The following PID is exhibited by the usb device supplied */
-/* (the VID is the standard ftdi vid (FTDI_VID) */
-#define FTDI_VNHCPCUSB_D_PID 0xfe38 /* Product Id */
-
-/*
- * PCDJ use ftdi based dj-controllers.  The following PID is for their DAC-2 device
- * http://www.pcdjhardware.com/DAC2.asp (PID sent by Wouter Paesen)
- * (the VID is the standard ftdi vid (FTDI_VID) */
-#define FTDI_PCDJ_DAC2_PID 0xFA88
-
-/*
- * The following are the values for the Matrix Orbital LCD displays,
- * which are the FT232BM ( similar to the 8U232AM )
- */
-#define FTDI_MTXORB_0_PID      0xFA00  /* Matrix Orbital Product Id */
-#define FTDI_MTXORB_1_PID      0xFA01  /* Matrix Orbital Product Id */
-#define FTDI_MTXORB_2_PID      0xFA02  /* Matrix Orbital Product Id */
-#define FTDI_MTXORB_3_PID      0xFA03  /* Matrix Orbital Product Id */
-#define FTDI_MTXORB_4_PID      0xFA04  /* Matrix Orbital Product Id */
-#define FTDI_MTXORB_5_PID      0xFA05  /* Matrix Orbital Product Id */
-#define FTDI_MTXORB_6_PID      0xFA06  /* Matrix Orbital Product Id */
-
-/* OOCDlink by Joern Kaipf <joernk@web.de>
- * (http://www.joernonline.de/dw/doku.php?id=start&idx=projects:oocdlink) */
-#define FTDI_OOCDLINK_PID	0xbaf8	/* Amontec JTAGkey */
-
-/*
- * The following are the values for the Matrix Orbital FTDI Range
- * Anything in this range will use an FT232RL.
- */
-#define MTXORB_VID			0x1B3D
-#define MTXORB_FTDI_RANGE_0100_PID	0x0100
-#define MTXORB_FTDI_RANGE_0101_PID	0x0101
-#define MTXORB_FTDI_RANGE_0102_PID	0x0102
-#define MTXORB_FTDI_RANGE_0103_PID	0x0103
-#define MTXORB_FTDI_RANGE_0104_PID	0x0104
-#define MTXORB_FTDI_RANGE_0105_PID	0x0105
-#define MTXORB_FTDI_RANGE_0106_PID	0x0106
-#define MTXORB_FTDI_RANGE_0107_PID	0x0107
-#define MTXORB_FTDI_RANGE_0108_PID	0x0108
-#define MTXORB_FTDI_RANGE_0109_PID	0x0109
-#define MTXORB_FTDI_RANGE_010A_PID	0x010A
-#define MTXORB_FTDI_RANGE_010B_PID	0x010B
-#define MTXORB_FTDI_RANGE_010C_PID	0x010C
-#define MTXORB_FTDI_RANGE_010D_PID	0x010D
-#define MTXORB_FTDI_RANGE_010E_PID	0x010E
-#define MTXORB_FTDI_RANGE_010F_PID	0x010F
-#define MTXORB_FTDI_RANGE_0110_PID	0x0110
-#define MTXORB_FTDI_RANGE_0111_PID	0x0111
-#define MTXORB_FTDI_RANGE_0112_PID	0x0112
-#define MTXORB_FTDI_RANGE_0113_PID	0x0113
-#define MTXORB_FTDI_RANGE_0114_PID	0x0114
-#define MTXORB_FTDI_RANGE_0115_PID	0x0115
-#define MTXORB_FTDI_RANGE_0116_PID	0x0116
-#define MTXORB_FTDI_RANGE_0117_PID	0x0117
-#define MTXORB_FTDI_RANGE_0118_PID	0x0118
-#define MTXORB_FTDI_RANGE_0119_PID	0x0119
-#define MTXORB_FTDI_RANGE_011A_PID	0x011A
-#define MTXORB_FTDI_RANGE_011B_PID	0x011B
-#define MTXORB_FTDI_RANGE_011C_PID	0x011C
-#define MTXORB_FTDI_RANGE_011D_PID	0x011D
-#define MTXORB_FTDI_RANGE_011E_PID	0x011E
-#define MTXORB_FTDI_RANGE_011F_PID	0x011F
-#define MTXORB_FTDI_RANGE_0120_PID	0x0120
-#define MTXORB_FTDI_RANGE_0121_PID	0x0121
-#define MTXORB_FTDI_RANGE_0122_PID	0x0122
-#define MTXORB_FTDI_RANGE_0123_PID	0x0123
-#define MTXORB_FTDI_RANGE_0124_PID	0x0124
-#define MTXORB_FTDI_RANGE_0125_PID	0x0125
-#define MTXORB_FTDI_RANGE_0126_PID	0x0126
-#define MTXORB_FTDI_RANGE_0127_PID	0x0127
-#define MTXORB_FTDI_RANGE_0128_PID	0x0128
-#define MTXORB_FTDI_RANGE_0129_PID	0x0129
-#define MTXORB_FTDI_RANGE_012A_PID	0x012A
-#define MTXORB_FTDI_RANGE_012B_PID	0x012B
-#define MTXORB_FTDI_RANGE_012C_PID	0x012C
-#define MTXORB_FTDI_RANGE_012D_PID	0x012D
-#define MTXORB_FTDI_RANGE_012E_PID	0x012E
-#define MTXORB_FTDI_RANGE_012F_PID	0x012F
-#define MTXORB_FTDI_RANGE_0130_PID	0x0130
-#define MTXORB_FTDI_RANGE_0131_PID	0x0131
-#define MTXORB_FTDI_RANGE_0132_PID	0x0132
-#define MTXORB_FTDI_RANGE_0133_PID	0x0133
-#define MTXORB_FTDI_RANGE_0134_PID	0x0134
-#define MTXORB_FTDI_RANGE_0135_PID	0x0135
-#define MTXORB_FTDI_RANGE_0136_PID	0x0136
-#define MTXORB_FTDI_RANGE_0137_PID	0x0137
-#define MTXORB_FTDI_RANGE_0138_PID	0x0138
-#define MTXORB_FTDI_RANGE_0139_PID	0x0139
-#define MTXORB_FTDI_RANGE_013A_PID	0x013A
-#define MTXORB_FTDI_RANGE_013B_PID	0x013B
-#define MTXORB_FTDI_RANGE_013C_PID	0x013C
-#define MTXORB_FTDI_RANGE_013D_PID	0x013D
-#define MTXORB_FTDI_RANGE_013E_PID	0x013E
-#define MTXORB_FTDI_RANGE_013F_PID	0x013F
-#define MTXORB_FTDI_RANGE_0140_PID	0x0140
-#define MTXORB_FTDI_RANGE_0141_PID	0x0141
-#define MTXORB_FTDI_RANGE_0142_PID	0x0142
-#define MTXORB_FTDI_RANGE_0143_PID	0x0143
-#define MTXORB_FTDI_RANGE_0144_PID	0x0144
-#define MTXORB_FTDI_RANGE_0145_PID	0x0145
-#define MTXORB_FTDI_RANGE_0146_PID	0x0146
-#define MTXORB_FTDI_RANGE_0147_PID	0x0147
-#define MTXORB_FTDI_RANGE_0148_PID	0x0148
-#define MTXORB_FTDI_RANGE_0149_PID	0x0149
-#define MTXORB_FTDI_RANGE_014A_PID	0x014A
-#define MTXORB_FTDI_RANGE_014B_PID	0x014B
-#define MTXORB_FTDI_RANGE_014C_PID	0x014C
-#define MTXORB_FTDI_RANGE_014D_PID	0x014D
-#define MTXORB_FTDI_RANGE_014E_PID	0x014E
-#define MTXORB_FTDI_RANGE_014F_PID	0x014F
-#define MTXORB_FTDI_RANGE_0150_PID	0x0150
-#define MTXORB_FTDI_RANGE_0151_PID	0x0151
-#define MTXORB_FTDI_RANGE_0152_PID	0x0152
-#define MTXORB_FTDI_RANGE_0153_PID	0x0153
-#define MTXORB_FTDI_RANGE_0154_PID	0x0154
-#define MTXORB_FTDI_RANGE_0155_PID	0x0155
-#define MTXORB_FTDI_RANGE_0156_PID	0x0156
-#define MTXORB_FTDI_RANGE_0157_PID	0x0157
-#define MTXORB_FTDI_RANGE_0158_PID	0x0158
-#define MTXORB_FTDI_RANGE_0159_PID	0x0159
-#define MTXORB_FTDI_RANGE_015A_PID	0x015A
-#define MTXORB_FTDI_RANGE_015B_PID	0x015B
-#define MTXORB_FTDI_RANGE_015C_PID	0x015C
-#define MTXORB_FTDI_RANGE_015D_PID	0x015D
-#define MTXORB_FTDI_RANGE_015E_PID	0x015E
-#define MTXORB_FTDI_RANGE_015F_PID	0x015F
-#define MTXORB_FTDI_RANGE_0160_PID	0x0160
-#define MTXORB_FTDI_RANGE_0161_PID	0x0161
-#define MTXORB_FTDI_RANGE_0162_PID	0x0162
-#define MTXORB_FTDI_RANGE_0163_PID	0x0163
-#define MTXORB_FTDI_RANGE_0164_PID	0x0164
-#define MTXORB_FTDI_RANGE_0165_PID	0x0165
-#define MTXORB_FTDI_RANGE_0166_PID	0x0166
-#define MTXORB_FTDI_RANGE_0167_PID	0x0167
-#define MTXORB_FTDI_RANGE_0168_PID	0x0168
-#define MTXORB_FTDI_RANGE_0169_PID	0x0169
-#define MTXORB_FTDI_RANGE_016A_PID	0x016A
-#define MTXORB_FTDI_RANGE_016B_PID	0x016B
-#define MTXORB_FTDI_RANGE_016C_PID	0x016C
-#define MTXORB_FTDI_RANGE_016D_PID	0x016D
-#define MTXORB_FTDI_RANGE_016E_PID	0x016E
-#define MTXORB_FTDI_RANGE_016F_PID	0x016F
-#define MTXORB_FTDI_RANGE_0170_PID	0x0170
-#define MTXORB_FTDI_RANGE_0171_PID	0x0171
-#define MTXORB_FTDI_RANGE_0172_PID	0x0172
-#define MTXORB_FTDI_RANGE_0173_PID	0x0173
-#define MTXORB_FTDI_RANGE_0174_PID	0x0174
-#define MTXORB_FTDI_RANGE_0175_PID	0x0175
-#define MTXORB_FTDI_RANGE_0176_PID	0x0176
-#define MTXORB_FTDI_RANGE_0177_PID	0x0177
-#define MTXORB_FTDI_RANGE_0178_PID	0x0178
-#define MTXORB_FTDI_RANGE_0179_PID	0x0179
-#define MTXORB_FTDI_RANGE_017A_PID	0x017A
-#define MTXORB_FTDI_RANGE_017B_PID	0x017B
-#define MTXORB_FTDI_RANGE_017C_PID	0x017C
-#define MTXORB_FTDI_RANGE_017D_PID	0x017D
-#define MTXORB_FTDI_RANGE_017E_PID	0x017E
-#define MTXORB_FTDI_RANGE_017F_PID	0x017F
-#define MTXORB_FTDI_RANGE_0180_PID	0x0180
-#define MTXORB_FTDI_RANGE_0181_PID	0x0181
-#define MTXORB_FTDI_RANGE_0182_PID	0x0182
-#define MTXORB_FTDI_RANGE_0183_PID	0x0183
-#define MTXORB_FTDI_RANGE_0184_PID	0x0184
-#define MTXORB_FTDI_RANGE_0185_PID	0x0185
-#define MTXORB_FTDI_RANGE_0186_PID	0x0186
-#define MTXORB_FTDI_RANGE_0187_PID	0x0187
-#define MTXORB_FTDI_RANGE_0188_PID	0x0188
-#define MTXORB_FTDI_RANGE_0189_PID	0x0189
-#define MTXORB_FTDI_RANGE_018A_PID	0x018A
-#define MTXORB_FTDI_RANGE_018B_PID	0x018B
-#define MTXORB_FTDI_RANGE_018C_PID	0x018C
-#define MTXORB_FTDI_RANGE_018D_PID	0x018D
-#define MTXORB_FTDI_RANGE_018E_PID	0x018E
-#define MTXORB_FTDI_RANGE_018F_PID	0x018F
-#define MTXORB_FTDI_RANGE_0190_PID	0x0190
-#define MTXORB_FTDI_RANGE_0191_PID	0x0191
-#define MTXORB_FTDI_RANGE_0192_PID	0x0192
-#define MTXORB_FTDI_RANGE_0193_PID	0x0193
-#define MTXORB_FTDI_RANGE_0194_PID	0x0194
-#define MTXORB_FTDI_RANGE_0195_PID	0x0195
-#define MTXORB_FTDI_RANGE_0196_PID	0x0196
-#define MTXORB_FTDI_RANGE_0197_PID	0x0197
-#define MTXORB_FTDI_RANGE_0198_PID	0x0198
-#define MTXORB_FTDI_RANGE_0199_PID	0x0199
-#define MTXORB_FTDI_RANGE_019A_PID	0x019A
-#define MTXORB_FTDI_RANGE_019B_PID	0x019B
-#define MTXORB_FTDI_RANGE_019C_PID	0x019C
-#define MTXORB_FTDI_RANGE_019D_PID	0x019D
-#define MTXORB_FTDI_RANGE_019E_PID	0x019E
-#define MTXORB_FTDI_RANGE_019F_PID	0x019F
-#define MTXORB_FTDI_RANGE_01A0_PID	0x01A0
-#define MTXORB_FTDI_RANGE_01A1_PID	0x01A1
-#define MTXORB_FTDI_RANGE_01A2_PID	0x01A2
-#define MTXORB_FTDI_RANGE_01A3_PID	0x01A3
-#define MTXORB_FTDI_RANGE_01A4_PID	0x01A4
-#define MTXORB_FTDI_RANGE_01A5_PID	0x01A5
-#define MTXORB_FTDI_RANGE_01A6_PID	0x01A6
-#define MTXORB_FTDI_RANGE_01A7_PID	0x01A7
-#define MTXORB_FTDI_RANGE_01A8_PID	0x01A8
-#define MTXORB_FTDI_RANGE_01A9_PID	0x01A9
-#define MTXORB_FTDI_RANGE_01AA_PID	0x01AA
-#define MTXORB_FTDI_RANGE_01AB_PID	0x01AB
-#define MTXORB_FTDI_RANGE_01AC_PID	0x01AC
-#define MTXORB_FTDI_RANGE_01AD_PID	0x01AD
-#define MTXORB_FTDI_RANGE_01AE_PID	0x01AE
-#define MTXORB_FTDI_RANGE_01AF_PID	0x01AF
-#define MTXORB_FTDI_RANGE_01B0_PID	0x01B0
-#define MTXORB_FTDI_RANGE_01B1_PID	0x01B1
-#define MTXORB_FTDI_RANGE_01B2_PID	0x01B2
-#define MTXORB_FTDI_RANGE_01B3_PID	0x01B3
-#define MTXORB_FTDI_RANGE_01B4_PID	0x01B4
-#define MTXORB_FTDI_RANGE_01B5_PID	0x01B5
-#define MTXORB_FTDI_RANGE_01B6_PID	0x01B6
-#define MTXORB_FTDI_RANGE_01B7_PID	0x01B7
-#define MTXORB_FTDI_RANGE_01B8_PID	0x01B8
-#define MTXORB_FTDI_RANGE_01B9_PID	0x01B9
-#define MTXORB_FTDI_RANGE_01BA_PID	0x01BA
-#define MTXORB_FTDI_RANGE_01BB_PID	0x01BB
-#define MTXORB_FTDI_RANGE_01BC_PID	0x01BC
-#define MTXORB_FTDI_RANGE_01BD_PID	0x01BD
-#define MTXORB_FTDI_RANGE_01BE_PID	0x01BE
-#define MTXORB_FTDI_RANGE_01BF_PID	0x01BF
-#define MTXORB_FTDI_RANGE_01C0_PID	0x01C0
-#define MTXORB_FTDI_RANGE_01C1_PID	0x01C1
-#define MTXORB_FTDI_RANGE_01C2_PID	0x01C2
-#define MTXORB_FTDI_RANGE_01C3_PID	0x01C3
-#define MTXORB_FTDI_RANGE_01C4_PID	0x01C4
-#define MTXORB_FTDI_RANGE_01C5_PID	0x01C5
-#define MTXORB_FTDI_RANGE_01C6_PID	0x01C6
-#define MTXORB_FTDI_RANGE_01C7_PID	0x01C7
-#define MTXORB_FTDI_RANGE_01C8_PID	0x01C8
-#define MTXORB_FTDI_RANGE_01C9_PID	0x01C9
-#define MTXORB_FTDI_RANGE_01CA_PID	0x01CA
-#define MTXORB_FTDI_RANGE_01CB_PID	0x01CB
-#define MTXORB_FTDI_RANGE_01CC_PID	0x01CC
-#define MTXORB_FTDI_RANGE_01CD_PID	0x01CD
-#define MTXORB_FTDI_RANGE_01CE_PID	0x01CE
-#define MTXORB_FTDI_RANGE_01CF_PID	0x01CF
-#define MTXORB_FTDI_RANGE_01D0_PID	0x01D0
-#define MTXORB_FTDI_RANGE_01D1_PID	0x01D1
-#define MTXORB_FTDI_RANGE_01D2_PID	0x01D2
-#define MTXORB_FTDI_RANGE_01D3_PID	0x01D3
-#define MTXORB_FTDI_RANGE_01D4_PID	0x01D4
-#define MTXORB_FTDI_RANGE_01D5_PID	0x01D5
-#define MTXORB_FTDI_RANGE_01D6_PID	0x01D6
-#define MTXORB_FTDI_RANGE_01D7_PID	0x01D7
-#define MTXORB_FTDI_RANGE_01D8_PID	0x01D8
-#define MTXORB_FTDI_RANGE_01D9_PID	0x01D9
-#define MTXORB_FTDI_RANGE_01DA_PID	0x01DA
-#define MTXORB_FTDI_RANGE_01DB_PID	0x01DB
-#define MTXORB_FTDI_RANGE_01DC_PID	0x01DC
-#define MTXORB_FTDI_RANGE_01DD_PID	0x01DD
-#define MTXORB_FTDI_RANGE_01DE_PID	0x01DE
-#define MTXORB_FTDI_RANGE_01DF_PID	0x01DF
-#define MTXORB_FTDI_RANGE_01E0_PID	0x01E0
-#define MTXORB_FTDI_RANGE_01E1_PID	0x01E1
-#define MTXORB_FTDI_RANGE_01E2_PID	0x01E2
-#define MTXORB_FTDI_RANGE_01E3_PID	0x01E3
-#define MTXORB_FTDI_RANGE_01E4_PID	0x01E4
-#define MTXORB_FTDI_RANGE_01E5_PID	0x01E5
-#define MTXORB_FTDI_RANGE_01E6_PID	0x01E6
-#define MTXORB_FTDI_RANGE_01E7_PID	0x01E7
-#define MTXORB_FTDI_RANGE_01E8_PID	0x01E8
-#define MTXORB_FTDI_RANGE_01E9_PID	0x01E9
-#define MTXORB_FTDI_RANGE_01EA_PID	0x01EA
-#define MTXORB_FTDI_RANGE_01EB_PID	0x01EB
-#define MTXORB_FTDI_RANGE_01EC_PID	0x01EC
-#define MTXORB_FTDI_RANGE_01ED_PID	0x01ED
-#define MTXORB_FTDI_RANGE_01EE_PID	0x01EE
-#define MTXORB_FTDI_RANGE_01EF_PID	0x01EF
-#define MTXORB_FTDI_RANGE_01F0_PID	0x01F0
-#define MTXORB_FTDI_RANGE_01F1_PID	0x01F1
-#define MTXORB_FTDI_RANGE_01F2_PID	0x01F2
-#define MTXORB_FTDI_RANGE_01F3_PID	0x01F3
-#define MTXORB_FTDI_RANGE_01F4_PID	0x01F4
-#define MTXORB_FTDI_RANGE_01F5_PID	0x01F5
-#define MTXORB_FTDI_RANGE_01F6_PID	0x01F6
-#define MTXORB_FTDI_RANGE_01F7_PID	0x01F7
-#define MTXORB_FTDI_RANGE_01F8_PID	0x01F8
-#define MTXORB_FTDI_RANGE_01F9_PID	0x01F9
-#define MTXORB_FTDI_RANGE_01FA_PID	0x01FA
-#define MTXORB_FTDI_RANGE_01FB_PID	0x01FB
-#define MTXORB_FTDI_RANGE_01FC_PID	0x01FC
-#define MTXORB_FTDI_RANGE_01FD_PID	0x01FD
-#define MTXORB_FTDI_RANGE_01FE_PID	0x01FE
-#define MTXORB_FTDI_RANGE_01FF_PID	0x01FF
-
-
-
-/* Interbiometrics USB I/O Board */
-/* Developed for Interbiometrics by Rudolf Gugler */
-#define INTERBIOMETRICS_VID              0x1209
-#define INTERBIOMETRICS_IOBOARD_PID      0x1002
-#define INTERBIOMETRICS_MINI_IOBOARD_PID 0x1006
-
-/*
- * The following are the values for the Perle Systems
- * UltraPort USB serial converters
- */
-#define FTDI_PERLE_ULTRAPORT_PID 0xF0C0	/* Perle UltraPort Product Id */
-
-/*
- * The following are the values for the Sealevel SeaLINK+ adapters.
- * (Original list sent by Tuan Hoang.  Ian Abbott renamed the macros and
- * removed some PIDs that don't seem to match any existing products.)
- */
-#define SEALEVEL_VID		0x0c52	/* Sealevel Vendor ID */
-#define SEALEVEL_2101_PID	0x2101	/* SeaLINK+232 (2101/2105) */
-#define SEALEVEL_2102_PID	0x2102	/* SeaLINK+485 (2102) */
-#define SEALEVEL_2103_PID	0x2103	/* SeaLINK+232I (2103) */
-#define SEALEVEL_2104_PID	0x2104	/* SeaLINK+485I (2104) */
-#define SEALEVEL_2106_PID	0x9020	/* SeaLINK+422 (2106) */
-#define SEALEVEL_2201_1_PID	0x2211	/* SeaPORT+2/232 (2201) Port 1 */
-#define SEALEVEL_2201_2_PID	0x2221	/* SeaPORT+2/232 (2201) Port 2 */
-#define SEALEVEL_2202_1_PID	0x2212	/* SeaPORT+2/485 (2202) Port 1 */
-#define SEALEVEL_2202_2_PID	0x2222	/* SeaPORT+2/485 (2202) Port 2 */
-#define SEALEVEL_2203_1_PID	0x2213	/* SeaPORT+2 (2203) Port 1 */
-#define SEALEVEL_2203_2_PID	0x2223	/* SeaPORT+2 (2203) Port 2 */
-#define SEALEVEL_2401_1_PID	0x2411	/* SeaPORT+4/232 (2401) Port 1 */
-#define SEALEVEL_2401_2_PID	0x2421	/* SeaPORT+4/232 (2401) Port 2 */
-#define SEALEVEL_2401_3_PID	0x2431	/* SeaPORT+4/232 (2401) Port 3 */
-#define SEALEVEL_2401_4_PID	0x2441	/* SeaPORT+4/232 (2401) Port 4 */
-#define SEALEVEL_2402_1_PID	0x2412	/* SeaPORT+4/485 (2402) Port 1 */
-#define SEALEVEL_2402_2_PID	0x2422	/* SeaPORT+4/485 (2402) Port 2 */
-#define SEALEVEL_2402_3_PID	0x2432	/* SeaPORT+4/485 (2402) Port 3 */
-#define SEALEVEL_2402_4_PID	0x2442	/* SeaPORT+4/485 (2402) Port 4 */
-#define SEALEVEL_2403_1_PID	0x2413	/* SeaPORT+4 (2403) Port 1 */
-#define SEALEVEL_2403_2_PID	0x2423	/* SeaPORT+4 (2403) Port 2 */
-#define SEALEVEL_2403_3_PID	0x2433	/* SeaPORT+4 (2403) Port 3 */
-#define SEALEVEL_2403_4_PID	0x2443	/* SeaPORT+4 (2403) Port 4 */
-#define SEALEVEL_2801_1_PID	0X2811	/* SeaLINK+8/232 (2801) Port 1 */
-#define SEALEVEL_2801_2_PID	0X2821	/* SeaLINK+8/232 (2801) Port 2 */
-#define SEALEVEL_2801_3_PID	0X2831	/* SeaLINK+8/232 (2801) Port 3 */
-#define SEALEVEL_2801_4_PID	0X2841	/* SeaLINK+8/232 (2801) Port 4 */
-#define SEALEVEL_2801_5_PID	0X2851	/* SeaLINK+8/232 (2801) Port 5 */
-#define SEALEVEL_2801_6_PID	0X2861	/* SeaLINK+8/232 (2801) Port 6 */
-#define SEALEVEL_2801_7_PID	0X2871	/* SeaLINK+8/232 (2801) Port 7 */
-#define SEALEVEL_2801_8_PID	0X2881	/* SeaLINK+8/232 (2801) Port 8 */
-#define SEALEVEL_2802_1_PID	0X2812	/* SeaLINK+8/485 (2802) Port 1 */
-#define SEALEVEL_2802_2_PID	0X2822	/* SeaLINK+8/485 (2802) Port 2 */
-#define SEALEVEL_2802_3_PID	0X2832	/* SeaLINK+8/485 (2802) Port 3 */
-#define SEALEVEL_2802_4_PID	0X2842	/* SeaLINK+8/485 (2802) Port 4 */
-#define SEALEVEL_2802_5_PID	0X2852	/* SeaLINK+8/485 (2802) Port 5 */
-#define SEALEVEL_2802_6_PID	0X2862	/* SeaLINK+8/485 (2802) Port 6 */
-#define SEALEVEL_2802_7_PID	0X2872	/* SeaLINK+8/485 (2802) Port 7 */
-#define SEALEVEL_2802_8_PID	0X2882	/* SeaLINK+8/485 (2802) Port 8 */
-#define SEALEVEL_2803_1_PID	0X2813	/* SeaLINK+8 (2803) Port 1 */
-#define SEALEVEL_2803_2_PID	0X2823 	/* SeaLINK+8 (2803) Port 2 */
-#define SEALEVEL_2803_3_PID	0X2833 	/* SeaLINK+8 (2803) Port 3 */
-#define SEALEVEL_2803_4_PID	0X2843 	/* SeaLINK+8 (2803) Port 4 */
-#define SEALEVEL_2803_5_PID	0X2853 	/* SeaLINK+8 (2803) Port 5 */
-#define SEALEVEL_2803_6_PID	0X2863 	/* SeaLINK+8 (2803) Port 6 */
-#define SEALEVEL_2803_7_PID	0X2873 	/* SeaLINK+8 (2803) Port 7 */
-#define SEALEVEL_2803_8_PID	0X2883 	/* SeaLINK+8 (2803) Port 8 */
-
-/*
- * The following are the values for two KOBIL chipcard terminals.
- */
-#define KOBIL_VID		0x0d46	/* KOBIL Vendor ID */
-#define KOBIL_CONV_B1_PID	0x2020	/* KOBIL Konverter for B1 */
-#define KOBIL_CONV_KAAN_PID	0x2021	/* KOBIL_Konverter for KAAN */
-
-/*
- * Icom ID-1 digital transceiver
- */
-
-#define ICOM_ID1_VID            0x0C26
-#define ICOM_ID1_PID            0x0004
-
-/*
- * ASK.fr devices
- */
-#define FTDI_ASK_RDR400_PID	0xC991	/* ASK RDR 400 series card reader */
-
-/*
- * FTDI USB UART chips used in construction projects from the
- * Elektor Electronics magazine (http://elektor-electronics.co.uk)
- */
-#define ELEKTOR_VID		0x0C7D
-#define ELEKTOR_FT323R_PID	0x0005	/* RFID-Reader, issue 09-2006 */
-
-/*
- * DSS-20 Sync Station for Sony Ericsson P800
- */
-#define FTDI_DSS20_PID          0xFC82
-
-/*
- * Home Electronics (www.home-electro.com) USB gadgets
- */
-#define FTDI_HE_TIRA1_PID	0xFA78	/* Tira-1 IR transceiver */
-
-/* USB-UIRT - An infrared receiver and transmitter using the 8U232AM chip */
-/* http://home.earthlink.net/~jrhees/USBUIRT/index.htm */
-#define FTDI_USB_UIRT_PID	0xF850	/* Product Id */
-
-/* TNC-X USB-to-packet-radio adapter, versions prior to 3.0 (DLP module) */
-
-#define FTDI_TNC_X_PID		0xEBE0
-
-/*
- * ELV USB devices submitted by Christian Abt of ELV (www.elv.de).
- * All of these devices use FTDI's vendor ID (0x0403).
- *
- * The previously included PID for the UO 100 module was incorrect.
- * In fact, that PID was for ELV's UR 100 USB-RS232 converter (0xFB58).
- *
- * Armin Laeuger originally sent the PID for the UM 100 module.
- */
-#define FTDI_R2000KU_TRUE_RNG	0xFB80  /* R2000KU TRUE RNG */
-#define FTDI_ELV_UR100_PID	0xFB58	/* USB-RS232-Umsetzer (UR 100) */
-#define FTDI_ELV_UM100_PID	0xFB5A	/* USB-Modul UM 100 */
-#define FTDI_ELV_UO100_PID	0xFB5B	/* USB-Modul UO 100 */
-#define FTDI_ELV_ALC8500_PID	0xF06E	/* ALC 8500 Expert */
-/* Additional ELV PIDs that default to using the FTDI D2XX drivers on
- * MS Windows, rather than the FTDI Virtual Com Port drivers.
- * Maybe these will be easier to use with the libftdi/libusb user-space
- * drivers, or possibly the Comedi drivers in some cases. */
-#define FTDI_ELV_CLI7000_PID	0xFB59	/* Computer-Light-Interface (CLI 7000) */
-#define FTDI_ELV_PPS7330_PID	0xFB5C	/* Processor-Power-Supply (PPS 7330) */
-#define FTDI_ELV_TFM100_PID	0xFB5D	/* Temperartur-Feuchte Messgeraet (TFM 100) */
-#define FTDI_ELV_UDF77_PID	0xFB5E	/* USB DCF Funkurh (UDF 77) */
-#define FTDI_ELV_UIO88_PID	0xFB5F	/* USB-I/O Interface (UIO 88) */
-#define FTDI_ELV_UAD8_PID	0xF068	/* USB-AD-Wandler (UAD 8) */
-#define FTDI_ELV_UDA7_PID	0xF069	/* USB-DA-Wandler (UDA 7) */
-#define FTDI_ELV_USI2_PID	0xF06A	/* USB-Schrittmotoren-Interface (USI 2) */
-#define FTDI_ELV_T1100_PID	0xF06B	/* Thermometer (T 1100) */
-#define FTDI_ELV_PCD200_PID	0xF06C	/* PC-Datenlogger (PCD 200) */
-#define FTDI_ELV_ULA200_PID	0xF06D	/* USB-LCD-Ansteuerung (ULA 200) */
-#define FTDI_ELV_FHZ1000PC_PID	0xF06F	/* FHZ 1000 PC */
-#define FTDI_ELV_CSI8_PID	0xE0F0	/* Computer-Schalt-Interface (CSI 8) */
-#define FTDI_ELV_EM1000DL_PID	0xE0F1	/* PC-Datenlogger fuer Energiemonitor (EM 1000 DL) */
-#define FTDI_ELV_PCK100_PID	0xE0F2	/* PC-Kabeltester (PCK 100) */
-#define FTDI_ELV_RFP500_PID	0xE0F3	/* HF-Leistungsmesser (RFP 500) */
-#define FTDI_ELV_FS20SIG_PID	0xE0F4	/* Signalgeber (FS 20 SIG) */
-#define FTDI_ELV_WS300PC_PID	0xE0F6	/* PC-Wetterstation (WS 300 PC) */
-#define FTDI_ELV_FHZ1300PC_PID	0xE0E8	/* FHZ 1300 PC */
-#define FTDI_ELV_WS500_PID	0xE0E9	/* PC-Wetterstation (WS 500) */
-#define FTDI_ELV_HS485_PID	0xE0EA	/* USB to RS-485 adapter */
-#define FTDI_ELV_EM1010PC_PID	0xE0EF	/* Engery monitor EM 1010 PC */
-#define FTDI_PHI_FISCO_PID      0xE40B  /* PHI Fisco USB to Serial cable */
-
-/*
- * Definitions for ID TECH (www.idt-net.com) devices
- */
-#define IDTECH_VID		0x0ACD	/* ID TECH Vendor ID */
-#define IDTECH_IDT1221U_PID	0x0300	/* IDT1221U USB to RS-232 adapter */
-
-/*
- * Definitions for Omnidirectional Control Technology, Inc. devices
- */
-#define OCT_VID			0x0B39	/* OCT vendor ID */
-/* Note: OCT US101 is also rebadged as Dick Smith Electronics (NZ) XH6381 */
-/* Also rebadged as Dick Smith Electronics (Aus) XH6451 */
-/* Also rebadged as SIIG Inc. model US2308 hardware version 1 */
-#define OCT_US101_PID		0x0421	/* OCT US101 USB to RS-232 */
-
-/* an infrared receiver for user access control with IR tags */
-#define FTDI_PIEGROUP_PID	0xF208	/* Product Id */
-
-/*
- * Definitions for Artemis astronomical USB based cameras
- * Check it at http://www.artemisccd.co.uk/
- */
-#define FTDI_ARTEMIS_PID	0xDF28	/* All Artemis Cameras */
-
-/*
- * Definitions for ATIK Instruments astronomical USB based cameras
- * Check it at http://www.atik-instruments.com/
- */
-#define FTDI_ATIK_ATK16_PID	0xDF30	/* ATIK ATK-16 Grayscale Camera */
-#define FTDI_ATIK_ATK16C_PID	0xDF32	/* ATIK ATK-16C Colour Camera */
-#define FTDI_ATIK_ATK16HR_PID	0xDF31	/* ATIK ATK-16HR Grayscale Camera */
-#define FTDI_ATIK_ATK16HRC_PID	0xDF33	/* ATIK ATK-16HRC Colour Camera */
-#define FTDI_ATIK_ATK16IC_PID   0xDF35  /* ATIK ATK-16IC Grayscale Camera */
-
-/*
- * Protego product ids
- */
-#define PROTEGO_SPECIAL_1	0xFC70	/* special/unknown device */
-#define PROTEGO_R2X0		0xFC71	/* R200-USB TRNG unit (R210, R220, and R230) */
-#define PROTEGO_SPECIAL_3	0xFC72	/* special/unknown device */
-#define PROTEGO_SPECIAL_4	0xFC73	/* special/unknown device */
-
-/*
- * Gude Analog- und Digitalsysteme GmbH
- */
-#define FTDI_GUDEADS_E808_PID    0xE808
-#define FTDI_GUDEADS_E809_PID    0xE809
-#define FTDI_GUDEADS_E80A_PID    0xE80A
-#define FTDI_GUDEADS_E80B_PID    0xE80B
-#define FTDI_GUDEADS_E80C_PID    0xE80C
-#define FTDI_GUDEADS_E80D_PID    0xE80D
-#define FTDI_GUDEADS_E80E_PID    0xE80E
-#define FTDI_GUDEADS_E80F_PID    0xE80F
-#define FTDI_GUDEADS_E888_PID    0xE888  /* Expert ISDN Control USB */
-#define FTDI_GUDEADS_E889_PID    0xE889  /* USB RS-232 OptoBridge */
-#define FTDI_GUDEADS_E88A_PID    0xE88A
-#define FTDI_GUDEADS_E88B_PID    0xE88B
-#define FTDI_GUDEADS_E88C_PID    0xE88C
-#define FTDI_GUDEADS_E88D_PID    0xE88D
-#define FTDI_GUDEADS_E88E_PID    0xE88E
-#define FTDI_GUDEADS_E88F_PID    0xE88F
-
-/*
- * Linx Technologies product ids
- */
-#define LINX_SDMUSBQSS_PID	0xF448	/* Linx SDM-USB-QS-S */
-#define LINX_MASTERDEVEL2_PID   0xF449   /* Linx Master Development 2.0 */
-#define LINX_FUTURE_0_PID   0xF44A   /* Linx future device */
-#define LINX_FUTURE_1_PID   0xF44B   /* Linx future device */
-#define LINX_FUTURE_2_PID   0xF44C   /* Linx future device */
-
-/* CCS Inc. ICDU/ICDU40 product ID - the FT232BM is used in an in-circuit-debugger */
-/* unit for PIC16's/PIC18's */
-#define FTDI_CCSICDU20_0_PID    0xF9D0
-#define FTDI_CCSICDU40_1_PID    0xF9D1
-#define FTDI_CCSMACHX_2_PID     0xF9D2
-#define FTDI_CCSLOAD_N_GO_3_PID 0xF9D3
-#define FTDI_CCSICDU64_4_PID    0xF9D4
-#define FTDI_CCSPRIME8_5_PID    0xF9D5
-
-/* Inside Accesso contactless reader (http://www.insidefr.com) */
-#define INSIDE_ACCESSO		0xFAD0
-
-/*
- * Intrepid Control Systems (http://www.intrepidcs.com/) ValueCAN and NeoVI
- */
-#define INTREPID_VID		0x093C
-#define INTREPID_VALUECAN_PID	0x0601
-#define INTREPID_NEOVI_PID	0x0701
-
-/*
- * Falcom Wireless Communications GmbH
- */
-#define FALCOM_VID		0x0F94	/* Vendor Id */
-#define FALCOM_TWIST_PID	0x0001	/* Falcom Twist USB GPRS modem */
-#define FALCOM_SAMBA_PID	0x0005	/* Falcom Samba USB GPRS modem */
-
-/*
- * SUUNTO product ids
- */
-#define FTDI_SUUNTO_SPORTS_PID	0xF680	/* Suunto Sports instrument */
-
-/*
- * Oceanic product ids
- */
-#define FTDI_OCEANIC_PID	0xF460  /* Oceanic dive instrument */
-
-/*
- * TTi (Thurlby Thandar Instruments)
- */
-#define TTI_VID			0x103E	/* Vendor Id */
-#define TTI_QL355P_PID		0x03E8	/* TTi QL355P power supply */
-
-/*
- * Definitions for B&B Electronics products.
- */
-#define BANDB_VID		0x0856	/* B&B Electronics Vendor ID */
-#define BANDB_USOTL4_PID	0xAC01	/* USOTL4 Isolated RS-485 Converter */
-#define BANDB_USTL4_PID		0xAC02	/* USTL4 RS-485 Converter */
-#define BANDB_USO9ML2_PID	0xAC03	/* USO9ML2 Isolated RS-232 Converter */
-
-/*
- * RM Michaelides CANview USB (http://www.rmcan.com)
- * CAN fieldbus interface adapter, added by port GmbH www.port.de)
- * Ian Abbott changed the macro names for consistency.
- */
-#define FTDI_RM_CANVIEW_PID	0xfd60	/* Product Id */
-
-/*
- * EVER Eco Pro UPS (http://www.ever.com.pl/)
- */
-
-#define	EVER_ECO_PRO_CDS	0xe520	/* RS-232 converter */
-
-/*
- * 4N-GALAXY.DE PIDs for CAN-USB, USB-RS232, USB-RS422, USB-RS485,
- * USB-TTY activ, USB-TTY passiv.  Some PIDs are used by several devices
- * and I'm not entirely sure which are used by which.
- */
-#define FTDI_4N_GALAXY_DE_1_PID	0xF3C0
-#define FTDI_4N_GALAXY_DE_2_PID	0xF3C1
-
-/*
- * Mobility Electronics products.
- */
-#define MOBILITY_VID			0x1342
-#define MOBILITY_USB_SERIAL_PID		0x0202	/* EasiDock USB 200 serial */
-
-/*
- * microHAM product IDs (http://www.microham.com).
- * Submitted by Justin Burket (KL1RL) <zorton@jtan.com>
- * and Mike Studer (K6EEP) <k6eep@hamsoftware.org>.
- * Ian Abbott <abbotti@mev.co.uk> added a few more from the driver INF file.
- */
-#define FTDI_MHAM_KW_PID 0xEEE8		/* USB-KW interface */
-#define FTDI_MHAM_YS_PID 0xEEE9		/* USB-YS interface */
-#define FTDI_MHAM_Y6_PID 0xEEEA		/* USB-Y6 interface */
-#define FTDI_MHAM_Y8_PID 0xEEEB		/* USB-Y8 interface */
-#define FTDI_MHAM_IC_PID 0xEEEC		/* USB-IC interface */
-#define FTDI_MHAM_DB9_PID 0xEEED	/* USB-DB9 interface */
-#define FTDI_MHAM_RS232_PID 0xEEEE	/* USB-RS232 interface */
-#define FTDI_MHAM_Y9_PID 0xEEEF		/* USB-Y9 interface */
-
-/*
- * Active Robots product ids.
- */
-#define FTDI_ACTIVE_ROBOTS_PID	0xE548	/* USB comms board */
-
-/*
- * Xsens Technologies BV products (http://www.xsens.com).
- */
-#define XSENS_CONVERTER_0_PID	0xD388
-#define XSENS_CONVERTER_1_PID	0xD389
-#define XSENS_CONVERTER_2_PID	0xD38A
-#define XSENS_CONVERTER_3_PID	0xD38B
-#define XSENS_CONVERTER_4_PID	0xD38C
-#define XSENS_CONVERTER_5_PID	0xD38D
-#define XSENS_CONVERTER_6_PID	0xD38E
-#define XSENS_CONVERTER_7_PID	0xD38F
-
-/*
- * Teratronik product ids.
- * Submitted by O. Wölfelschneider.
- */
-#define FTDI_TERATRONIK_VCP_PID	 0xEC88	/* Teratronik device (preferring VCP driver on windows) */
-#define FTDI_TERATRONIK_D2XX_PID 0xEC89	/* Teratronik device (preferring D2XX driver on windows) */
-
-/*
- * Evolution Robotics products (http://www.evolution.com/).
- * Submitted by Shawn M. Lavelle.
- */
-#define EVOLUTION_VID		0xDEEE	/* Vendor ID */
-#define EVOLUTION_ER1_PID	0x0300	/* ER1 Control Module */
-#define EVO_8U232AM_PID	0x02FF	/* Evolution robotics RCM2 (FT232AM)*/
-#define EVO_HYBRID_PID		0x0302	/* Evolution robotics RCM4 PID (FT232BM)*/
-#define EVO_RCM4_PID		0x0303	/* Evolution robotics RCM4 PID */
-
-/* Pyramid Computer GmbH */
-#define FTDI_PYRAMID_PID	0xE6C8	/* Pyramid Appliance Display */
-
-/*
- * NDI (www.ndigital.com) product ids
- */
-#define FTDI_NDI_HUC_PID		0xDA70	/* NDI Host USB Converter */
-#define FTDI_NDI_SPECTRA_SCU_PID	0xDA71	/* NDI Spectra SCU */
-#define FTDI_NDI_FUTURE_2_PID		0xDA72	/* NDI future device #2 */
-#define FTDI_NDI_FUTURE_3_PID		0xDA73	/* NDI future device #3 */
-#define FTDI_NDI_AURORA_SCU_PID		0xDA74	/* NDI Aurora SCU */
-
-/*
- * Posiflex inc retail equipment (http://www.posiflex.com.tw)
- */
-#define POSIFLEX_VID		0x0d3a  /* Vendor ID */
-#define POSIFLEX_PP7000_PID	0x0300  /* PP-7000II thermal printer */
-
-/*
- * Westrex International devices submitted by Cory Lee
- */
-#define FTDI_WESTREX_MODEL_777_PID	0xDC00	/* Model 777 */
-#define FTDI_WESTREX_MODEL_8900F_PID	0xDC01	/* Model 8900F */
-
-/*
- * RR-CirKits LocoBuffer USB (http://www.rr-cirkits.com)
- */
-#define FTDI_RRCIRKITS_LOCOBUFFER_PID	0xc7d0	/* LocoBuffer USB */
-
-/*
- * Eclo (http://www.eclo.pt/) product IDs.
- * PID 0xEA90 submitted by Martin Grill.
- */
-#define FTDI_ECLO_COM_1WIRE_PID	0xEA90	/* COM to 1-Wire USB adaptor */
-
-/*
- * Papouch products (http://www.papouch.com/)
- * Submitted by Folkert van Heusden
- */
-
-#define PAPOUCH_VID			0x5050	/* Vendor ID */
-#define PAPOUCH_TMU_PID			0x0400	/* TMU USB Thermometer */
-#define PAPOUCH_QUIDO4x4_PID		0x0900	/* Quido 4/4 Module */
-
-/*
- * ACG Identification Technologies GmbH products (http://www.acg.de/).
- * Submitted by anton -at- goto10 -dot- org.
- */
-#define FTDI_ACG_HFDUAL_PID		0xDD20	/* HF Dual ISO Reader (RFID) */
-
-/*
- * Yost Engineering, Inc. products (www.yostengineering.com).
- * PID 0xE050 submitted by Aaron Prose.
- */
-#define FTDI_YEI_SERVOCENTER31_PID	0xE050	/* YEI ServoCenter3.1 USB */
-
-/*
- * ThorLabs USB motor drivers
- */
-#define FTDI_THORLABS_PID		0xfaf0 /* ThorLabs USB motor drivers */
-
-/*
- * Testo products (http://www.testo.com/)
- * Submitted by Colin Leroy
- */
-#define TESTO_VID			0x128D
-#define TESTO_USB_INTERFACE_PID		0x0001
-
-/*
- * Gamma Scout (http://gamma-scout.com/). Submitted by rsc@runtux.com.
- */
-#define FTDI_GAMMA_SCOUT_PID		0xD678	/* Gamma Scout online */
-
-/*
- * Tactrix OpenPort (ECU) devices.
- * OpenPort 1.3M submitted by Donour Sizemore.
- * OpenPort 1.3S and 1.3U submitted by Ian Abbott.
- */
-#define FTDI_TACTRIX_OPENPORT_13M_PID	0xCC48	/* OpenPort 1.3 Mitsubishi */
-#define FTDI_TACTRIX_OPENPORT_13S_PID	0xCC49	/* OpenPort 1.3 Subaru */
-#define FTDI_TACTRIX_OPENPORT_13U_PID	0xCC4A	/* OpenPort 1.3 Universal */
-
-/*
- * Telldus Technologies
  */
-#define TELLDUS_VID			0x1781	/* Vendor ID */
-#define TELLDUS_TELLSTICK_PID		0x0C30	/* RF control dongle 433 MHz using FT232RL */
-
-/*
- * IBS elektronik product ids
- * Submitted by Thomas Schleusener
- */
-#define FTDI_IBS_US485_PID	0xff38  /* IBS US485 (USB<-->RS422/485 interface) */
-#define FTDI_IBS_PICPRO_PID	0xff39  /* IBS PIC-Programmer */
-#define FTDI_IBS_PCMCIA_PID	0xff3a  /* IBS Card reader for PCMCIA SRAM-cards */
-#define FTDI_IBS_PK1_PID	0xff3b  /* IBS PK1 - Particel counter */
-#define FTDI_IBS_RS232MON_PID	0xff3c  /* IBS RS232 - Monitor */
-#define FTDI_IBS_APP70_PID	0xff3d  /* APP 70 (dust monitoring system) */
-#define FTDI_IBS_PEDO_PID	0xff3e  /* IBS PEDO-Modem (RF modem 868.35 MHz) */
-#define FTDI_IBS_PROD_PID	0xff3f  /* future device */
-
-/*
- *  MaxStream devices	www.maxstream.net
- */
-#define FTDI_MAXSTREAM_PID	0xEE18	/* Xbee PKG-U Module */
-
-/* Olimex */
-#define OLIMEX_VID			0x15BA
-#define OLIMEX_ARM_USB_OCD_PID		0x0003
-
-/* Luminary Micro Stellaris Boards, VID = FTDI_VID */
-/* FTDI 2332C Dual channel device, side A=245 FIFO (JTAG), Side B=RS232 UART */
-#define LMI_LM3S_DEVEL_BOARD_PID	0xbcd8
-#define LMI_LM3S_EVAL_BOARD_PID		0xbcd9
-
-/* www.elsterelectricity.com Elster Unicom III Optical Probe */
-#define FTDI_ELSTER_UNICOM_PID		0xE700 /* Product Id */
-
-/*
- * The Mobility Lab (TML)
- * Submitted by Pierre Castella
- */
-#define TML_VID			0x1B91	/* Vendor ID */
-#define TML_USB_SERIAL_PID	0x0064	/* USB - Serial Converter */
-
-/* Propox devices */
-#define FTDI_PROPOX_JTAGCABLEII_PID	0xD738
-
-/* Rig Expert Ukraine devices */
-#define FTDI_REU_TINY_PID		0xED22	/* RigExpert Tiny */
-
-/* Domintell products  http://www.domintell.com */
-#define FTDI_DOMINTELL_DGQG_PID	0xEF50	/* Master */
-#define FTDI_DOMINTELL_DUSB_PID	0xEF51	/* DUSB01 module */
-
-/* Alti-2 products  http://www.alti-2.com */
-#define ALTI2_VID	0x1BC9
-#define ALTI2_N3_PID	0x6001	/* Neptune 3 */
 
 /* Commands */
 #define FTDI_SIO_RESET 		0 /* Reset the port */
@@ -896,86 +40,6 @@
 #define INTERFACE_C		3
 #define INTERFACE_D		4
 
-/*
- * FIC / OpenMoko, Inc. http://wiki.openmoko.org/wiki/Neo1973_Debug_Board_v3
- * Submitted by Harald Welte <laforge@openmoko.org>
- */
-#define	FIC_VID			0x1457
-#define	FIC_NEO1973_DEBUG_PID	0x5118
-
-/*
- * RATOC REX-USB60F
- */
-#define RATOC_VENDOR_ID		0x0584
-#define RATOC_PRODUCT_ID_USB60F	0xb020
-
-/*
- * DIEBOLD BCS SE923
- */
-#define DIEBOLD_BCS_SE923_PID	0xfb99
-
-/*
- * Atmel STK541
- */
-#define ATMEL_VID		0x03eb /* Vendor ID */
-#define STK541_PID		0x2109 /* Zigbee Controller */
-
-/*
- * Dresden Elektronic Sensor Terminal Board
- */
-#define DE_VID			0x1cf1 /* Vendor ID */
-#define STB_PID			0x0001 /* Sensor Terminal Board */
-#define WHT_PID			0x0004 /* Wireless Handheld Terminal */
-
-/*
- * Blackfin gnICE JTAG
- * http://docs.blackfin.uclinux.org/doku.php?id=hw:jtag:gnice
- */
-#define ADI_VID 		0x0456
-#define ADI_GNICE_PID 		0xF000
-#define ADI_GNICEPLUS_PID 	0xF001
-
-/*
- * JETI SPECTROMETER SPECBOS 1201
- * http://www.jeti.com/products/sys/scb/scb1201.php
- */
-#define JETI_VID		0x0c6c
-#define JETI_SPC1201_PID	0x04b2
-
-/*
- * Marvell SheevaPlug
- */
-#define MARVELL_VID		0x9e88
-#define MARVELL_SHEEVAPLUG_PID	0x9e8f
-
-#define FTDI_TURTELIZER_PID	0xBDC8 /* JTAG/RS-232 adapter by egnite GmBH */
-
-/*
- * GN Otometrics (http://www.otometrics.com)
- * Submitted by Ville Sundberg.
- */
-#define GN_OTOMETRICS_VID	0x0c33	/* Vendor ID */
-#define AURICAL_USB_PID		0x0010	/* Aurical USB Audiometer */
-
-/*
- * Bayer Ascensia Contour blood glucose meter USB-converter cable.
- * http://winglucofacts.com/cables/
- */
-#define BAYER_VID                      0x1A79
-#define BAYER_CONTOUR_CABLE_PID        0x6001
-
-/*
- * Marvell OpenRD Base, Client
- * http://www.open-rd.org
- * OpenRD Base, Client use VID 0x0403
- */
-#define MARVELL_OPENRD_PID	0x9e90
-
-/*
- * Hameg HO820 and HO870 interface (using VID 0x0403)
- */
-#define        HAMEG_HO820_PID         0xed74
-#define        HAMEG_HO870_PID         0xed71
 
 /*
  *   BmRequestType:  1100 0000b
@@ -1490,4 +554,3 @@
  * B2..7	Length of message - (not including Byte 0)
  *
  */
-
--- linux-mvl-dove-2.6.32.orig/drivers/usb/serial/navman.c
+++ linux-mvl-dove-2.6.32/drivers/usb/serial/navman.c
@@ -24,6 +24,7 @@
 
 static struct usb_device_id id_table [] = {
 	{ USB_DEVICE(0x0a99, 0x0001) },	/* Talon Technology device */
+	{ USB_DEVICE(0x0df7, 0x0900) },	/* Mobile Action i-gotU */
 	{ },
 };
 MODULE_DEVICE_TABLE(usb, id_table);
--- linux-mvl-dove-2.6.32.orig/drivers/usb/serial/garmin_gps.c
+++ linux-mvl-dove-2.6.32/drivers/usb/serial/garmin_gps.c
@@ -1,7 +1,7 @@
 /*
  * Garmin GPS driver
  *
- * Copyright (C) 2006-2009 Hermann Kneissel herkne@users.sourceforge.net
+ * Copyright (C) 2006-2011 Hermann Kneissel herkne@gmx.de
  *
  * The latest version of the driver can be found at
  * http://sourceforge.net/projects/garmin-gps/
@@ -51,7 +51,7 @@
  */
 
 #define VERSION_MAJOR	0
-#define VERSION_MINOR	33
+#define VERSION_MINOR	36
 
 #define _STR(s) #s
 #define _DRIVER_VERSION(a, b) "v" _STR(a) "." _STR(b)
@@ -411,6 +411,7 @@
  */
 static int gsp_rec_packet(struct garmin_data *garmin_data_p, int count)
 {
+	unsigned long flags;
 	const __u8 *recpkt = garmin_data_p->inbuffer+GSP_INITIAL_OFFSET;
 	__le32 *usbdata = (__le32 *) garmin_data_p->inbuffer;
 
@@ -459,7 +460,9 @@
 	/* if this was an abort-transfer command, flush all
 	   queued data. */
 	if (isAbortTrfCmnd(garmin_data_p->inbuffer)) {
+		spin_lock_irqsave(&garmin_data_p->lock, flags);
 		garmin_data_p->flags |= FLAGS_DROP_DATA;
+		spin_unlock_irqrestore(&garmin_data_p->lock, flags);
 		pkt_clear(garmin_data_p);
 	}
 
@@ -944,7 +947,7 @@
 	spin_lock_irqsave(&garmin_data_p->lock, flags);
 	garmin_data_p->mode  = initial_mode;
 	garmin_data_p->count = 0;
-	garmin_data_p->flags = 0;
+	garmin_data_p->flags &= FLAGS_SESSION_REPLY1_SEEN;
 	spin_unlock_irqrestore(&garmin_data_p->lock, flags);
 
 	/* shutdown any bulk reads that might be going on */
@@ -1179,7 +1182,8 @@
 
 
 static void garmin_read_process(struct garmin_data *garmin_data_p,
-				 unsigned char *data, unsigned data_length)
+				 unsigned char *data, unsigned data_length,
+				 int bulk_data)
 {
 	unsigned long flags;
 
@@ -1194,7 +1198,8 @@
 		   send it directly to the tty port */
 		if (garmin_data_p->flags & FLAGS_QUEUING) {
 			pkt_add(garmin_data_p, data, data_length);
-		} else if (getLayerId(data) == GARMIN_LAYERID_APPL) {
+		} else if (bulk_data ||
+			   getLayerId(data) == GARMIN_LAYERID_APPL) {
 
 			spin_lock_irqsave(&garmin_data_p->lock, flags);
 			garmin_data_p->flags |= APP_RESP_SEEN;
@@ -1238,7 +1243,7 @@
 	usb_serial_debug_data(debug, &port->dev,
 				__func__, urb->actual_length, data);
 
-	garmin_read_process(garmin_data_p, data, urb->actual_length);
+	garmin_read_process(garmin_data_p, data, urb->actual_length, 1);
 
 	if (urb->actual_length == 0 &&
 			0 != (garmin_data_p->flags & FLAGS_BULK_IN_RESTART)) {
@@ -1348,7 +1353,7 @@
 			__func__, garmin_data_p->serial_num);
 	}
 
-	garmin_read_process(garmin_data_p, data, urb->actual_length);
+	garmin_read_process(garmin_data_p, data, urb->actual_length, 0);
 
 	port->interrupt_in_urb->dev = port->serial->dev;
 	retval = usb_submit_urb(urb, GFP_ATOMIC);
@@ -1463,6 +1468,7 @@
 	garmin_data_p->timer.function = timeout_handler;
 	garmin_data_p->port = port;
 	garmin_data_p->state = 0;
+	garmin_data_p->flags = 0;
 	garmin_data_p->count = 0;
 	usb_set_serial_port_data(port, garmin_data_p);
 
--- linux-mvl-dove-2.6.32.orig/drivers/usb/storage/transport.c
+++ linux-mvl-dove-2.6.32/drivers/usb/storage/transport.c
@@ -666,10 +666,11 @@
 	 * to wait for at least one CHECK_CONDITION to determine
 	 * SANE_SENSE support
 	 */
-	if ((srb->cmnd[0] == ATA_16 || srb->cmnd[0] == ATA_12) &&
+	if (unlikely((srb->cmnd[0] == ATA_16 || srb->cmnd[0] == ATA_12) &&
 	    result == USB_STOR_TRANSPORT_GOOD &&
 	    !(us->fflags & US_FL_SANE_SENSE) &&
-	    !(srb->cmnd[2] & 0x20)) {
+	    !(us->fflags & US_FL_BAD_SENSE) &&
+	    !(srb->cmnd[2] & 0x20))) {
 		US_DEBUGP("-- SAT supported, increasing auto-sense\n");
 		us->fflags |= US_FL_SANE_SENSE;
 	}
@@ -718,6 +719,12 @@
 		if (test_bit(US_FLIDX_TIMED_OUT, &us->dflags)) {
 			US_DEBUGP("-- auto-sense aborted\n");
 			srb->result = DID_ABORT << 16;
+
+			/* If SANE_SENSE caused this problem, disable it */
+			if (sense_size != US_SENSE_SIZE) {
+				us->fflags &= ~US_FL_SANE_SENSE;
+				us->fflags |= US_FL_BAD_SENSE;
+			}
 			goto Handle_Errors;
 		}
 
@@ -727,10 +734,11 @@
 		 * (small) sense request. This fixes some USB GSM modems
 		 */
 		if (temp_result == USB_STOR_TRANSPORT_FAILED &&
-		    (us->fflags & US_FL_SANE_SENSE) &&
-		    sense_size != US_SENSE_SIZE) {
+				sense_size != US_SENSE_SIZE) {
 			US_DEBUGP("-- auto-sense failure, retry small sense\n");
 			sense_size = US_SENSE_SIZE;
+			us->fflags &= ~US_FL_SANE_SENSE;
+			us->fflags |= US_FL_BAD_SENSE;
 			goto Retry_Sense;
 		}
 
@@ -754,6 +762,7 @@
 		 */
 		if (srb->sense_buffer[7] > (US_SENSE_SIZE - 8) &&
 		    !(us->fflags & US_FL_SANE_SENSE) &&
+		    !(us->fflags & US_FL_BAD_SENSE) &&
 		    (srb->sense_buffer[0] & 0x7C) == 0x70) {
 			US_DEBUGP("-- SANE_SENSE support enabled\n");
 			us->fflags |= US_FL_SANE_SENSE;
--- linux-mvl-dove-2.6.32.orig/drivers/usb/storage/unusual_devs.h
+++ linux-mvl-dove-2.6.32/drivers/usb/storage/unusual_devs.h
@@ -481,6 +481,13 @@
 		US_SC_DEVICE, US_PR_DEVICE, NULL,
 		US_FL_MAX_SECTORS_64),
 
+/* Reported by Vitaly Kuznetsov <vitty@altlinux.ru> */
+UNUSUAL_DEV(  0x04e8, 0x5122, 0x0000, 0x9999,
+		"Samsung",
+		"YP-CP3",
+		US_SC_DEVICE, US_PR_DEVICE, NULL,
+		US_FL_MAX_SECTORS_64 | US_FL_BULK_IGNORE_TAG),
+
 /* Entry and supporting patch by Theodore Kilgore <kilgota@auburn.edu>.
  * Device uses standards-violating 32-byte Bulk Command Block Wrappers and
  * reports itself as "Proprietary SCSI Bulk." Cf. device entry 0x084d:0x0011.
@@ -818,6 +825,13 @@
 		US_SC_DEVICE, US_PR_DEVICE, NULL,
 		US_FL_FIX_CAPACITY ),
 
+/* Reported by Daniel Kukula <daniel.kuku@gmail.com> */
+UNUSUAL_DEV( 0x067b, 0x1063, 0x0100, 0x0100,
+		"Prolific Technology, Inc.",
+		"Prolific Storage Gadget",
+		US_SC_DEVICE, US_PR_DEVICE, NULL,
+		US_FL_BAD_SENSE ),
+
 /* Reported by Rogerio Brito <rbrito@ime.usp.br> */
 UNUSUAL_DEV( 0x067b, 0x2317, 0x0001, 0x001,
 		"Prolific Technology, Inc.",
@@ -1029,6 +1043,15 @@
 		US_SC_DEVICE, US_PR_DEVICE, NULL,
 		US_FL_BULK32),
 
+/* Reported by <ttkspam@free.fr>
+ * The device reports a vendor-specific device class, requiring an
+ * explicit vendor/product match.
+ */
+UNUSUAL_DEV(  0x0851, 0x1542, 0x0002, 0x0002,
+		"MagicPixel",
+		"FW_Omega2",
+		US_SC_DEVICE, US_PR_DEVICE, NULL, 0),
+
 /* Andrew Lunn <andrew@lunn.ch>
  * PanDigital Digital Picture Frame. Does not like ALLOW_MEDIUM_REMOVAL
  * on LUN 4.
@@ -1129,6 +1152,13 @@
 		US_SC_DEVICE, US_PR_DEVICE, option_ms_init,
 		0),
 
+/* Reported by Timo Aaltonen <tjaalton@ubuntu.com> */
+UNUSUAL_DEV( 0x0af0, 0x7011, 0x0000, 0x9999,
+		"Option",
+		"Mass Storage",
+		US_SC_DEVICE, US_PR_DEVICE, option_ms_init,
+		0 ),
+
 /* Reported by F. Aben <f.aben@option.com>
  * This device (wrongly) has a vendor-specific device descriptor.
  * The entry is needed so usb-storage can bind to it's mass-storage
@@ -1140,8 +1170,8 @@
 		0 ),
 
 /* Reported by Jan Dumon <j.dumon@option.com>
- * This device (wrongly) has a vendor-specific device descriptor.
- * The entry is needed so usb-storage can bind to it's mass-storage
+ * These devices (wrongly) have a vendor-specific device descriptor.
+ * These entries are needed so usb-storage can bind to their mass-storage
  * interface as an interface driver */
 UNUSUAL_DEV( 0x0af0, 0x7501, 0x0000, 0x0000,
 		"Option",
@@ -1149,6 +1179,90 @@
 		US_SC_DEVICE, US_PR_DEVICE, NULL,
 		0 ),
 
+UNUSUAL_DEV( 0x0af0, 0x7701, 0x0000, 0x0000,
+		"Option",
+		"GI 0451 SD-Card",
+		US_SC_DEVICE, US_PR_DEVICE, NULL,
+		0 ),
+
+UNUSUAL_DEV( 0x0af0, 0x7706, 0x0000, 0x0000,
+		"Option",
+		"GI 0451 SD-Card",
+		US_SC_DEVICE, US_PR_DEVICE, NULL,
+		0 ),
+
+UNUSUAL_DEV( 0x0af0, 0x7901, 0x0000, 0x0000,
+		"Option",
+		"GI 0452 SD-Card",
+		US_SC_DEVICE, US_PR_DEVICE, NULL,
+		0 ),
+
+UNUSUAL_DEV( 0x0af0, 0x7A01, 0x0000, 0x0000,
+		"Option",
+		"GI 0461 SD-Card",
+		US_SC_DEVICE, US_PR_DEVICE, NULL,
+		0 ),
+
+UNUSUAL_DEV( 0x0af0, 0x7A05, 0x0000, 0x0000,
+		"Option",
+		"GI 0461 SD-Card",
+		US_SC_DEVICE, US_PR_DEVICE, NULL,
+		0 ),
+
+UNUSUAL_DEV( 0x0af0, 0x8300, 0x0000, 0x0000,
+		"Option",
+		"GI 033x SD-Card",
+		US_SC_DEVICE, US_PR_DEVICE, NULL,
+		0 ),
+
+UNUSUAL_DEV( 0x0af0, 0x8302, 0x0000, 0x0000,
+		"Option",
+		"GI 033x SD-Card",
+		US_SC_DEVICE, US_PR_DEVICE, NULL,
+		0 ),
+
+UNUSUAL_DEV( 0x0af0, 0x8304, 0x0000, 0x0000,
+		"Option",
+		"GI 033x SD-Card",
+		US_SC_DEVICE, US_PR_DEVICE, NULL,
+		0 ),
+
+UNUSUAL_DEV( 0x0af0, 0xc100, 0x0000, 0x0000,
+		"Option",
+		"GI 070x SD-Card",
+		US_SC_DEVICE, US_PR_DEVICE, NULL,
+		0 ),
+
+UNUSUAL_DEV( 0x0af0, 0xd057, 0x0000, 0x0000,
+		"Option",
+		"GI 1505 SD-Card",
+		US_SC_DEVICE, US_PR_DEVICE, NULL,
+		0 ),
+
+UNUSUAL_DEV( 0x0af0, 0xd058, 0x0000, 0x0000,
+		"Option",
+		"GI 1509 SD-Card",
+		US_SC_DEVICE, US_PR_DEVICE, NULL,
+		0 ),
+
+UNUSUAL_DEV( 0x0af0, 0xd157, 0x0000, 0x0000,
+		"Option",
+		"GI 1515 SD-Card",
+		US_SC_DEVICE, US_PR_DEVICE, NULL,
+		0 ),
+
+UNUSUAL_DEV( 0x0af0, 0xd257, 0x0000, 0x0000,
+		"Option",
+		"GI 1215 SD-Card",
+		US_SC_DEVICE, US_PR_DEVICE, NULL,
+		0 ),
+
+UNUSUAL_DEV( 0x0af0, 0xd357, 0x0000, 0x0000,
+		"Option",
+		"GI 1505 SD-Card",
+		US_SC_DEVICE, US_PR_DEVICE, NULL,
+		0 ),
+
 /* Reported by Ben Efros <ben@pc-doctor.com> */
 UNUSUAL_DEV( 0x0bc2, 0x3010, 0x0000, 0x0000,
 		"Seagate",
@@ -1303,6 +1417,13 @@
 		US_FL_IGNORE_DEVICE ),
 #endif
 
+/* Submitted by Nick Holloway */
+UNUSUAL_DEV( 0x0f88, 0x042e, 0x0100, 0x0100,
+		"VTech",
+		"Kidizoom",
+		US_SC_DEVICE, US_PR_DEVICE, NULL,
+		US_FL_FIX_CAPACITY ),
+
 /* Reported by Michael Stattmann <michael@stattmann.com> */
 UNUSUAL_DEV(  0x0fce, 0xd008, 0x0000, 0x0000,
 		"Sony Ericsson",
@@ -1767,6 +1888,37 @@
 		US_SC_DEVICE, US_PR_DEVICE, NULL,
 		US_FL_IGNORE_RESIDUE ),
 
+/* Reported by Hans de Goede <hdegoede@redhat.com>
+ * These Appotech controllers are found in Picture Frames, they provide a
+ * (buggy) emulation of a cdrom drive which contains the windows software
+ * Uploading of pictures happens over the corresponding /dev/sg device. */
+UNUSUAL_DEV( 0x1908, 0x1315, 0x0000, 0x0000,
+		"BUILDWIN",
+		"Photo Frame",
+		US_SC_DEVICE, US_PR_DEVICE, NULL,
+		US_FL_BAD_SENSE ),
+UNUSUAL_DEV( 0x1908, 0x1320, 0x0000, 0x0000,
+		"BUILDWIN",
+		"Photo Frame",
+		US_SC_DEVICE, US_PR_DEVICE, NULL,
+		US_FL_BAD_SENSE ),
+
+/* Patch by Richard Schütz <r.schtz@t-online.de>
+ * This external hard drive enclosure uses a JMicron chip which
+ * needs the US_FL_IGNORE_RESIDUE flag to work properly. */
+UNUSUAL_DEV(  0x1e68, 0x001b, 0x0000, 0x0000,
+		"TrekStor GmbH & Co. KG",
+		"DataStation maxi g.u",
+		US_SC_DEVICE, US_PR_DEVICE, NULL,
+		US_FL_IGNORE_RESIDUE | US_FL_SANE_SENSE ),
+
+/* Reported by Jasper Mackenzie <scarletpimpernal@hotmail.com> */
+UNUSUAL_DEV( 0x1e74, 0x4621, 0x0000, 0x0000,
+		"Coby Electronics",
+		"MP3 Player",
+		US_SC_DEVICE, US_PR_DEVICE, NULL,
+		US_FL_BULK_IGNORE_TAG | US_FL_MAX_SECTORS_64 ),
+
 UNUSUAL_DEV( 0x2116, 0x0320, 0x0001, 0x0001,
 		"ST",
 		"2A",
@@ -1800,13 +1952,6 @@
 		US_SC_DEVICE, US_PR_DEVICE, NULL,
 		US_FL_GO_SLOW ),
 
-/* Reported by Rohan Hart <rohan.hart17@gmail.com> */
-UNUSUAL_DEV(  0x2770, 0x915d, 0x0010, 0x0010,
-		"INTOVA",
-		"Pixtreme",
-		US_SC_DEVICE, US_PR_DEVICE, NULL,
-		US_FL_FIX_CAPACITY ),
-
 /* Reported by Frederic Marchal <frederic.marchal@wowcompany.com>
  * Mio Moov 330
  */
--- linux-mvl-dove-2.6.32.orig/drivers/usb/storage/usb.c
+++ linux-mvl-dove-2.6.32/drivers/usb/storage/usb.c
@@ -228,6 +228,7 @@
 	if (data_len<36) // You lose.
 		return;
 
+	memset(data+8, ' ', 28);
 	if(data[0]&0x20) { /* USB device currently not connected. Return
 			      peripheral qualifier 001b ("...however, the
 			      physical device is not currently connected
@@ -237,15 +238,15 @@
 			      device, it may return zeros or ASCII spaces 
 			      (20h) in those fields until the data is
 			      available from the device."). */
-		memset(data+8,0,28);
 	} else {
 		u16 bcdDevice = le16_to_cpu(us->pusb_dev->descriptor.bcdDevice);
-		memcpy(data+8, us->unusual_dev->vendorName, 
-			strlen(us->unusual_dev->vendorName) > 8 ? 8 :
-			strlen(us->unusual_dev->vendorName));
-		memcpy(data+16, us->unusual_dev->productName, 
-			strlen(us->unusual_dev->productName) > 16 ? 16 :
-			strlen(us->unusual_dev->productName));
+		int n;
+
+		n = strlen(us->unusual_dev->vendorName);
+		memcpy(data+8, us->unusual_dev->vendorName, min(8, n));
+		n = strlen(us->unusual_dev->productName);
+		memcpy(data+16, us->unusual_dev->productName, min(16, n));
+
 		data[32] = 0x30 + ((bcdDevice>>12) & 0x0F);
 		data[33] = 0x30 + ((bcdDevice>>8) & 0x0F);
 		data[34] = 0x30 + ((bcdDevice>>4) & 0x0F);
@@ -429,7 +430,8 @@
 	u16 vid = le16_to_cpu(us->pusb_dev->descriptor.idVendor);
 	u16 pid = le16_to_cpu(us->pusb_dev->descriptor.idProduct);
 	unsigned f = 0;
-	unsigned int mask = (US_FL_SANE_SENSE | US_FL_FIX_CAPACITY |
+	unsigned int mask = (US_FL_SANE_SENSE | US_FL_BAD_SENSE |
+			US_FL_FIX_CAPACITY |
 			US_FL_CAPACITY_HEURISTICS | US_FL_IGNORE_DEVICE |
 			US_FL_NOT_LOCKABLE | US_FL_MAX_SECTORS_64 |
 			US_FL_CAPACITY_OK | US_FL_IGNORE_RESIDUE |
@@ -459,6 +461,9 @@
 		case 'a':
 			f |= US_FL_SANE_SENSE;
 			break;
+		case 'b':
+			f |= US_FL_BAD_SENSE;
+			break;
 		case 'c':
 			f |= US_FL_FIX_CAPACITY;
 			break;
--- linux-mvl-dove-2.6.32.orig/drivers/usb/storage/sierra_ms.c
+++ linux-mvl-dove-2.6.32/drivers/usb/storage/sierra_ms.c
@@ -120,7 +120,7 @@
 	}
 	return result;
 }
-static DEVICE_ATTR(truinst, S_IWUGO | S_IRUGO, show_truinst, NULL);
+static DEVICE_ATTR(truinst, S_IRUGO, show_truinst, NULL);
 
 int sierra_ms_init(struct us_data *us)
 {
--- linux-mvl-dove-2.6.32.orig/drivers/usb/storage/unusual_cypress.h
+++ linux-mvl-dove-2.6.32/drivers/usb/storage/unusual_cypress.h
@@ -31,4 +31,9 @@
 		"Cypress ISD-300LP",
 		US_SC_CYP_ATACB, US_PR_DEVICE, NULL, 0),
 
+UNUSUAL_DEV( 0x14cd, 0x6116, 0x0000, 0x9999,
+		"Super Top",
+		"USB 2.0  SATA BRIDGE",
+		US_SC_CYP_ATACB, US_PR_DEVICE, NULL, 0),
+
 #endif /* defined(CONFIG_USB_STORAGE_CYPRESS_ATACB) || ... */
--- linux-mvl-dove-2.6.32.orig/drivers/usb/mon/mon_bin.c
+++ linux-mvl-dove-2.6.32/drivers/usb/mon/mon_bin.c
@@ -971,7 +971,7 @@
 
 		mutex_lock(&rp->fetch_lock);
 		spin_lock_irqsave(&rp->b_lock, flags);
-		mon_free_buff(rp->b_vec, size/CHUNK_SIZE);
+		mon_free_buff(rp->b_vec, rp->b_size/CHUNK_SIZE);
 		kfree(rp->b_vec);
 		rp->b_vec  = vec;
 		rp->b_size = size;
--- linux-mvl-dove-2.6.32.orig/drivers/usb/class/cdc-acm.h
+++ linux-mvl-dove-2.6.32/drivers/usb/class/cdc-acm.h
@@ -112,7 +112,6 @@
 	struct mutex mutex;
 	struct usb_cdc_line_coding line;		/* bits, stop, parity */
 	struct work_struct work;			/* work queue entry for line discipline waking up */
-	struct work_struct waker;
 	wait_queue_head_t drain_wait;			/* close processing */
 	struct tasklet_struct urb_task;                 /* rx processing */
 	spinlock_t throttle_lock;			/* synchronize throtteling and read callback */
--- linux-mvl-dove-2.6.32.orig/drivers/usb/class/cdc-acm.c
+++ linux-mvl-dove-2.6.32/drivers/usb/class/cdc-acm.c
@@ -170,6 +170,7 @@
 {
 	wb->use = 0;
 	acm->transmitting--;
+	usb_autopm_put_interface_async(acm->control);
 }
 
 /*
@@ -211,9 +212,12 @@
 	}
 
 	dbg("%s susp_count: %d", __func__, acm->susp_count);
+	usb_autopm_get_interface_async(acm->control);
 	if (acm->susp_count) {
-		acm->delayed_wb = wb;
-		schedule_work(&acm->waker);
+		if (!acm->delayed_wb)
+			acm->delayed_wb = wb;
+		else
+			usb_autopm_put_interface_async(acm->control);
 		spin_unlock_irqrestore(&acm->write_lock, flags);
 		return 0;	/* A white lie */
 	}
@@ -293,6 +297,8 @@
 	if (!ACM_READY(acm))
 		goto exit;
 
+	usb_mark_last_busy(acm->dev);
+
 	data = (unsigned char *)(dr + 1);
 	switch (dr->bNotificationType) {
 	case USB_CDC_NOTIFY_NETWORK_CONNECTION:
@@ -332,7 +338,6 @@
 		break;
 	}
 exit:
-	usb_mark_last_busy(acm->dev);
 	retval = usb_submit_urb(urb, GFP_ATOMIC);
 	if (retval)
 		dev_err(&urb->dev->dev, "%s - usb_submit_urb failed with "
@@ -530,27 +535,12 @@
 	if (!ACM_READY(acm))
 		return;
 	tty = tty_port_tty_get(&acm->port);
+	if (!tty)
+		return;
 	tty_wakeup(tty);
 	tty_kref_put(tty);
 }
 
-static void acm_waker(struct work_struct *waker)
-{
-	struct acm *acm = container_of(waker, struct acm, waker);
-	int rv;
-
-	rv = usb_autopm_get_interface(acm->control);
-	if (rv < 0) {
-		dev_err(&acm->dev->dev, "Autopm failure in %s\n", __func__);
-		return;
-	}
-	if (acm->delayed_wb) {
-		acm_start_wb(acm, acm->delayed_wb);
-		acm->delayed_wb = NULL;
-	}
-	usb_autopm_put_interface(acm->control);
-}
-
 /*
  * TTY handlers
  */
@@ -665,8 +655,10 @@
 		usb_kill_urb(acm->ctrlurb);
 		for (i = 0; i < ACM_NW; i++)
 			usb_kill_urb(acm->wb[i].urb);
+		tasklet_disable(&acm->urb_task);
 		for (i = 0; i < nr; i++)
 			usb_kill_urb(acm->ru[i].urb);
+		tasklet_enable(&acm->urb_task);
 		acm->control->needs_remote_wakeup = 0;
 		usb_autopm_put_interface(acm->control);
 	}
@@ -984,7 +976,8 @@
 	}
 
 	if (!buflen) {
-		if (intf->cur_altsetting->endpoint->extralen &&
+		if (intf->cur_altsetting->endpoint &&
+				intf->cur_altsetting->endpoint->extralen &&
 				intf->cur_altsetting->endpoint->extra) {
 			dev_dbg(&intf->dev,
 				"Seeking extra descriptors on endpoint\n");
@@ -1178,7 +1171,6 @@
 	acm->urb_task.func = acm_rx_tasklet;
 	acm->urb_task.data = (unsigned long) acm;
 	INIT_WORK(&acm->work, acm_softint);
-	INIT_WORK(&acm->waker, acm_waker);
 	init_waitqueue_head(&acm->drain_wait);
 	spin_lock_init(&acm->throttle_lock);
 	spin_lock_init(&acm->write_lock);
@@ -1215,7 +1207,7 @@
 		if (rcv->urb == NULL) {
 			dev_dbg(&intf->dev,
 				"out of memory (read urbs usb_alloc_urb)\n");
-			goto alloc_fail7;
+			goto alloc_fail6;
 		}
 
 		rcv->urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;
@@ -1239,7 +1231,7 @@
 		if (snd->urb == NULL) {
 			dev_dbg(&intf->dev,
 				"out of memory (write urbs usb_alloc_urb)");
-			goto alloc_fail7;
+			goto alloc_fail8;
 		}
 
 		if (usb_endpoint_xfer_int(epwrite))
@@ -1278,6 +1270,7 @@
 		i = device_create_file(&intf->dev,
 						&dev_attr_iCountryCodeRelDate);
 		if (i < 0) {
+			device_remove_file(&intf->dev, &dev_attr_wCountryCodes);
 			kfree(acm->country_codes);
 			goto skip_countries;
 		}
@@ -1314,6 +1307,7 @@
 		usb_free_urb(acm->wb[i].urb);
 alloc_fail7:
 	acm_read_buffers_free(acm);
+alloc_fail6:
 	for (i = 0; i < num_rx_buf; i++)
 		usb_free_urb(acm->ru[i].urb);
 	usb_free_urb(acm->ctrlurb);
@@ -1343,7 +1337,6 @@
 	tasklet_enable(&acm->urb_task);
 
 	cancel_work_sync(&acm->work);
-	cancel_work_sync(&acm->waker);
 }
 
 static void acm_disconnect(struct usb_interface *intf)
@@ -1435,6 +1428,7 @@
 static int acm_resume(struct usb_interface *intf)
 {
 	struct acm *acm = usb_get_intfdata(intf);
+	struct acm_wb *wb;
 	int rv = 0;
 	int cnt;
 
@@ -1449,6 +1443,21 @@
 	mutex_lock(&acm->mutex);
 	if (acm->port.count) {
 		rv = usb_submit_urb(acm->ctrlurb, GFP_NOIO);
+
+		spin_lock_irq(&acm->write_lock);
+		if (acm->delayed_wb) {
+			wb = acm->delayed_wb;
+			acm->delayed_wb = NULL;
+			spin_unlock_irq(&acm->write_lock);
+			acm_start_wb(acm, wb);
+		} else {
+			spin_unlock_irq(&acm->write_lock);
+		}
+
+		/*
+		 * delayed error checking because we must
+		 * do the write path at all cost
+		 */
 		if (rv < 0)
 			goto err_out;
 
@@ -1461,6 +1470,17 @@
 }
 
 #endif /* CONFIG_PM */
+
+#define NOKIA_PCSUITE_ACM_INFO(x) \
+		USB_DEVICE_AND_INTERFACE_INFO(0x0421, x, \
+		USB_CLASS_COMM, USB_CDC_SUBCLASS_ACM, \
+		USB_CDC_ACM_PROTO_VENDOR)
+
+#define SAMSUNG_PCSUITE_ACM_INFO(x) \
+		USB_DEVICE_AND_INTERFACE_INFO(0x04e7, x, \
+		USB_CLASS_COMM, USB_CDC_SUBCLASS_ACM, \
+		USB_CDC_ACM_PROTO_VENDOR)
+
 /*
  * USB driver structure.
  */
@@ -1518,6 +1538,79 @@
 	{ USB_DEVICE(0x1bbb, 0x0003), /* Alcatel OT-I650 */
 	.driver_info = NO_UNION_NORMAL, /* reports zero length descriptor */
 	},
+	{ USB_DEVICE(0x1576, 0x03b1), /* Maretron USB100 */
+	.driver_info = NO_UNION_NORMAL, /* reports zero length descriptor */
+	},
+
+	/* Nokia S60 phones expose two ACM channels. The first is
+	 * a modem and is picked up by the standard AT-command
+	 * information below. The second is 'vendor-specific' but
+	 * is treated as a serial device at the S60 end, so we want
+	 * to expose it on Linux too. */
+	{ NOKIA_PCSUITE_ACM_INFO(0x042D), }, /* Nokia 3250 */
+	{ NOKIA_PCSUITE_ACM_INFO(0x04D8), }, /* Nokia 5500 Sport */
+	{ NOKIA_PCSUITE_ACM_INFO(0x04C9), }, /* Nokia E50 */
+	{ NOKIA_PCSUITE_ACM_INFO(0x0419), }, /* Nokia E60 */
+	{ NOKIA_PCSUITE_ACM_INFO(0x044D), }, /* Nokia E61 */
+	{ NOKIA_PCSUITE_ACM_INFO(0x0001), }, /* Nokia E61i */
+	{ NOKIA_PCSUITE_ACM_INFO(0x0475), }, /* Nokia E62 */
+	{ NOKIA_PCSUITE_ACM_INFO(0x0508), }, /* Nokia E65 */
+	{ NOKIA_PCSUITE_ACM_INFO(0x0418), }, /* Nokia E70 */
+	{ NOKIA_PCSUITE_ACM_INFO(0x0425), }, /* Nokia N71 */
+	{ NOKIA_PCSUITE_ACM_INFO(0x0486), }, /* Nokia N73 */
+	{ NOKIA_PCSUITE_ACM_INFO(0x04DF), }, /* Nokia N75 */
+	{ NOKIA_PCSUITE_ACM_INFO(0x000e), }, /* Nokia N77 */
+	{ NOKIA_PCSUITE_ACM_INFO(0x0445), }, /* Nokia N80 */
+	{ NOKIA_PCSUITE_ACM_INFO(0x042F), }, /* Nokia N91 & N91 8GB */
+	{ NOKIA_PCSUITE_ACM_INFO(0x048E), }, /* Nokia N92 */
+	{ NOKIA_PCSUITE_ACM_INFO(0x0420), }, /* Nokia N93 */
+	{ NOKIA_PCSUITE_ACM_INFO(0x04E6), }, /* Nokia N93i  */
+	{ NOKIA_PCSUITE_ACM_INFO(0x04B2), }, /* Nokia 5700 XpressMusic */
+	{ NOKIA_PCSUITE_ACM_INFO(0x0134), }, /* Nokia 6110 Navigator (China) */
+	{ NOKIA_PCSUITE_ACM_INFO(0x046E), }, /* Nokia 6110 Navigator */
+	{ NOKIA_PCSUITE_ACM_INFO(0x002f), }, /* Nokia 6120 classic &  */
+	{ NOKIA_PCSUITE_ACM_INFO(0x0088), }, /* Nokia 6121 classic */
+	{ NOKIA_PCSUITE_ACM_INFO(0x00fc), }, /* Nokia 6124 classic */
+	{ NOKIA_PCSUITE_ACM_INFO(0x0042), }, /* Nokia E51 */
+	{ NOKIA_PCSUITE_ACM_INFO(0x00b0), }, /* Nokia E66 */
+	{ NOKIA_PCSUITE_ACM_INFO(0x00ab), }, /* Nokia E71 */
+	{ NOKIA_PCSUITE_ACM_INFO(0x0481), }, /* Nokia N76 */
+	{ NOKIA_PCSUITE_ACM_INFO(0x0007), }, /* Nokia N81 & N81 8GB */
+	{ NOKIA_PCSUITE_ACM_INFO(0x0071), }, /* Nokia N82 */
+	{ NOKIA_PCSUITE_ACM_INFO(0x04F0), }, /* Nokia N95 & N95-3 NAM */
+	{ NOKIA_PCSUITE_ACM_INFO(0x0070), }, /* Nokia N95 8GB  */
+	{ NOKIA_PCSUITE_ACM_INFO(0x00e9), }, /* Nokia 5320 XpressMusic */
+	{ NOKIA_PCSUITE_ACM_INFO(0x0099), }, /* Nokia 6210 Navigator, RM-367 */
+	{ NOKIA_PCSUITE_ACM_INFO(0x0128), }, /* Nokia 6210 Navigator, RM-419 */
+	{ NOKIA_PCSUITE_ACM_INFO(0x008f), }, /* Nokia 6220 Classic */
+	{ NOKIA_PCSUITE_ACM_INFO(0x00a0), }, /* Nokia 6650 */
+	{ NOKIA_PCSUITE_ACM_INFO(0x007b), }, /* Nokia N78 */
+	{ NOKIA_PCSUITE_ACM_INFO(0x0094), }, /* Nokia N85 */
+	{ NOKIA_PCSUITE_ACM_INFO(0x003a), }, /* Nokia N96 & N96-3  */
+	{ NOKIA_PCSUITE_ACM_INFO(0x00e9), }, /* Nokia 5320 XpressMusic */
+	{ NOKIA_PCSUITE_ACM_INFO(0x0108), }, /* Nokia 5320 XpressMusic 2G */
+	{ NOKIA_PCSUITE_ACM_INFO(0x01f5), }, /* Nokia N97, RM-505 */
+	{ NOKIA_PCSUITE_ACM_INFO(0x02e3), }, /* Nokia 5230, RM-588 */
+	{ NOKIA_PCSUITE_ACM_INFO(0x0178), }, /* Nokia E63 */
+	{ NOKIA_PCSUITE_ACM_INFO(0x010e), }, /* Nokia E75 */
+	{ NOKIA_PCSUITE_ACM_INFO(0x02d9), }, /* Nokia 6760 Slide */
+	{ NOKIA_PCSUITE_ACM_INFO(0x01d0), }, /* Nokia E52 */
+	{ NOKIA_PCSUITE_ACM_INFO(0x0223), }, /* Nokia E72 */
+	{ NOKIA_PCSUITE_ACM_INFO(0x0275), }, /* Nokia X6 */
+	{ NOKIA_PCSUITE_ACM_INFO(0x026c), }, /* Nokia N97 Mini */
+	{ NOKIA_PCSUITE_ACM_INFO(0x0154), }, /* Nokia 5800 XpressMusic */
+	{ NOKIA_PCSUITE_ACM_INFO(0x04ce), }, /* Nokia E90 */
+	{ NOKIA_PCSUITE_ACM_INFO(0x01d4), }, /* Nokia E55 */
+	{ NOKIA_PCSUITE_ACM_INFO(0x0302), }, /* Nokia N8 */
+	{ NOKIA_PCSUITE_ACM_INFO(0x0335), }, /* Nokia E7 */
+	{ NOKIA_PCSUITE_ACM_INFO(0x03cd), }, /* Nokia C7 */
+	{ SAMSUNG_PCSUITE_ACM_INFO(0x6651), }, /* Samsung GTi8510 (INNOV8) */
+
+	/* NOTE: non-Nokia COMM/ACM/0xff is likely MSFT RNDIS... NOT a modem! */
+
+	/* control interfaces without any protocol set */
+	{ USB_INTERFACE_INFO(USB_CLASS_COMM, USB_CDC_SUBCLASS_ACM,
+		USB_CDC_PROTO_NONE) },
 
 	/* control interfaces with various AT-command sets */
 	{ USB_INTERFACE_INFO(USB_CLASS_COMM, USB_CDC_SUBCLASS_ACM,
@@ -1533,7 +1626,6 @@
 	{ USB_INTERFACE_INFO(USB_CLASS_COMM, USB_CDC_SUBCLASS_ACM,
 		USB_CDC_ACM_PROTO_AT_CDMA) },
 
-	/* NOTE:  COMM/ACM/0xff is likely MSFT RNDIS ... NOT a modem!! */
 	{ }
 };
 
--- linux-mvl-dove-2.6.32.orig/drivers/usb/class/usbtmc.c
+++ linux-mvl-dove-2.6.32/drivers/usb/class/usbtmc.c
@@ -562,10 +562,16 @@
 		n_bytes = roundup(12 + this_part, 4);
 		memset(buffer + 12 + this_part, 0, n_bytes - (12 + this_part));
 
-		retval = usb_bulk_msg(data->usb_dev,
-				      usb_sndbulkpipe(data->usb_dev,
-						      data->bulk_out),
-				      buffer, n_bytes, &actual, USBTMC_TIMEOUT);
+		do {
+			retval = usb_bulk_msg(data->usb_dev,
+					      usb_sndbulkpipe(data->usb_dev,
+							      data->bulk_out),
+					      buffer, n_bytes,
+					      &actual, USBTMC_TIMEOUT);
+			if (retval != 0)
+				break;
+			n_bytes -= actual;
+		} while (n_bytes);
 
 		data->bTag_last_write = data->bTag;
 		data->bTag++;
--- linux-mvl-dove-2.6.32.orig/drivers/usb/atm/ueagle-atm.c
+++ linux-mvl-dove-2.6.32/drivers/usb/atm/ueagle-atm.c
@@ -2259,7 +2259,7 @@
 	return ret;
 }
 
-static DEVICE_ATTR(stat_status, S_IWUGO | S_IRUGO, read_status, reboot);
+static DEVICE_ATTR(stat_status, S_IWUSR | S_IRUGO, read_status, reboot);
 
 static ssize_t read_human_status(struct device *dev, struct device_attribute *attr,
 		char *buf)
@@ -2322,7 +2322,7 @@
 	return ret;
 }
 
-static DEVICE_ATTR(stat_human_status, S_IWUGO | S_IRUGO, read_human_status, NULL);
+static DEVICE_ATTR(stat_human_status, S_IRUGO, read_human_status, NULL);
 
 static ssize_t read_delin(struct device *dev, struct device_attribute *attr,
 		char *buf)
@@ -2354,7 +2354,7 @@
 	return ret;
 }
 
-static DEVICE_ATTR(stat_delin, S_IWUGO | S_IRUGO, read_delin, NULL);
+static DEVICE_ATTR(stat_delin, S_IRUGO, read_delin, NULL);
 
 #define UEA_ATTR(name, reset) 					\
 								\
--- linux-mvl-dove-2.6.32.orig/drivers/usb/gadget/u_serial.c
+++ linux-mvl-dove-2.6.32/drivers/usb/gadget/u_serial.c
@@ -535,17 +535,11 @@
 		list_move(&req->list, &port->read_pool);
 	}
 
-	/* Push from tty to ldisc; this is immediate with low_latency, and
-	 * may trigger callbacks to this driver ... so drop the spinlock.
+	/* Push from tty to ldisc; without low_latency set this is handled by
+	 * a workqueue, so we won't get callbacks and can hold port_lock
 	 */
 	if (tty && do_push) {
-		spin_unlock_irq(&port->port_lock);
 		tty_flip_buffer_push(tty);
-		wake_up_interruptible(&tty->read_wait);
-		spin_lock_irq(&port->port_lock);
-
-		/* tty may have been closed */
-		tty = port->port_tty;
 	}
 
 
@@ -783,11 +777,6 @@
 	port->open_count = 1;
 	port->openclose = false;
 
-	/* low_latency means ldiscs work in tasklet context, without
-	 * needing a workqueue schedule ... easier to keep up.
-	 */
-	tty->low_latency = 1;
-
 	/* if connected, start the I/O stream */
 	if (port->port_usb) {
 		struct gserial	*gser = port->port_usb;
@@ -1194,6 +1183,7 @@
 	n_ports = 0;
 
 	tty_unregister_driver(gs_tty_driver);
+	put_tty_driver(gs_tty_driver);
 	gs_tty_driver = NULL;
 
 	pr_debug("%s: cleaned up ttyGS* support\n", __func__);
--- linux-mvl-dove-2.6.32.orig/drivers/usb/gadget/fsl_udc_core.c
+++ linux-mvl-dove-2.6.32/drivers/usb/gadget/fsl_udc_core.c
@@ -489,7 +489,7 @@
 	case USB_ENDPOINT_XFER_ISOC:
 		/* Calculate transactions needed for high bandwidth iso */
 		mult = (unsigned char)(1 + ((max >> 11) & 0x03));
-		max = max & 0x8ff;	/* bit 0~10 */
+		max = max & 0x7ff;	/* bit 0~10 */
 		/* 3 transactions at most */
 		if (mult > 3)
 			goto en_done;
--- linux-mvl-dove-2.6.32.orig/drivers/usb/gadget/f_mass_storage.c
+++ linux-mvl-dove-2.6.32/drivers/usb/gadget/f_mass_storage.c
@@ -0,0 +1,2984 @@
+/*
+ * drivers/usb/gadget/f_mass_storage.c
+ *
+ * Function Driver for USB Mass Storage
+ *
+ * Copyright (C) 2008 Google, Inc.
+ * Author: Mike Lockwood <lockwood@android.com>
+ *
+ * Based heavily on the file_storage gadget driver in
+ * drivers/usb/gadget/file_storage.c and licensed under the same terms:
+ *
+ * Copyright (C) 2003-2007 Alan Stern
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions, and the following disclaimer,
+ *    without modification.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The names of the above-listed copyright holders may not be used
+ *    to endorse or promote products derived from this software without
+ *    specific prior written permission.
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/* #define DEBUG */
+/* #define VERBOSE_DEBUG */
+/* #define DUMP_MSGS */
+
+
+#include <linux/blkdev.h>
+#include <linux/completion.h>
+#include <linux/dcache.h>
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/fcntl.h>
+#include <linux/file.h>
+#include <linux/fs.h>
+#include <linux/kref.h>
+#include <linux/kthread.h>
+#include <linux/limits.h>
+#include <linux/rwsem.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+#include <linux/string.h>
+#include <linux/switch.h>
+#include <linux/freezer.h>
+#include <linux/utsname.h>
+#include <linux/wakelock.h>
+#include <linux/platform_device.h>
+
+#include <linux/usb.h>
+#include <linux/usb_usual.h>
+#include <linux/usb/ch9.h>
+#include <linux/usb/android_composite.h>
+
+#include "gadget_chips.h"
+
+
+#define BULK_BUFFER_SIZE           4096
+
+/*-------------------------------------------------------------------------*/
+
+#define DRIVER_NAME		"usb_mass_storage"
+#define MAX_LUNS		8
+
+static const char shortname[] = DRIVER_NAME;
+
+#ifdef DEBUG
+#define LDBG(lun, fmt, args...) \
+	dev_dbg(&(lun)->dev , fmt , ## args)
+#define MDBG(fmt,args...) \
+	printk(KERN_DEBUG DRIVER_NAME ": " fmt , ## args)
+#else
+#define LDBG(lun, fmt, args...) \
+	do { } while (0)
+#define MDBG(fmt,args...) \
+	do { } while (0)
+#undef VERBOSE_DEBUG
+#undef DUMP_MSGS
+#endif /* DEBUG */
+
+#ifdef VERBOSE_DEBUG
+#define VLDBG	LDBG
+#else
+#define VLDBG(lun, fmt, args...) \
+	do { } while (0)
+#endif /* VERBOSE_DEBUG */
+
+#define LERROR(lun, fmt, args...) \
+	dev_err(&(lun)->dev , fmt , ## args)
+#define LWARN(lun, fmt, args...) \
+	dev_warn(&(lun)->dev , fmt , ## args)
+#define LINFO(lun, fmt, args...) \
+	dev_info(&(lun)->dev , fmt , ## args)
+
+#define MINFO(fmt,args...) \
+	printk(KERN_INFO DRIVER_NAME ": " fmt , ## args)
+
+#undef DBG
+#undef VDBG
+#undef ERROR
+#undef WARNING
+#undef INFO
+#define DBG(d, fmt, args...) \
+	dev_dbg(&(d)->cdev->gadget->dev , fmt , ## args)
+#define VDBG(d, fmt, args...) \
+	dev_vdbg(&(d)->cdev->gadget->dev , fmt , ## args)
+#define ERROR(d, fmt, args...) \
+	dev_err(&(d)->cdev->gadget->dev , fmt , ## args)
+#define WARNING(d, fmt, args...) \
+	dev_warn(&(d)->cdev->gadget->dev , fmt , ## args)
+#define INFO(d, fmt, args...) \
+	dev_info(&(d)->cdev->gadget->dev , fmt , ## args)
+
+
+/*-------------------------------------------------------------------------*/
+
+/* Bulk-only data structures */
+
+/* Command Block Wrapper */
+struct bulk_cb_wrap {
+	__le32	Signature;		/* Contains 'USBC' */
+	u32	Tag;			/* Unique per command id */
+	__le32	DataTransferLength;	/* Size of the data */
+	u8	Flags;			/* Direction in bit 7 */
+	u8	Lun;			/* LUN (normally 0) */
+	u8	Length;			/* Of the CDB, <= MAX_COMMAND_SIZE */
+	u8	CDB[16];		/* Command Data Block */
+};
+
+#define USB_BULK_CB_WRAP_LEN	31
+#define USB_BULK_CB_SIG		0x43425355	/* Spells out USBC */
+#define USB_BULK_IN_FLAG	0x80
+
+/* Command Status Wrapper */
+struct bulk_cs_wrap {
+	__le32	Signature;		/* Should = 'USBS' */
+	u32	Tag;			/* Same as original command */
+	__le32	Residue;		/* Amount not transferred */
+	u8	Status;			/* See below */
+};
+
+#define USB_BULK_CS_WRAP_LEN	13
+#define USB_BULK_CS_SIG		0x53425355	/* Spells out 'USBS' */
+#define USB_STATUS_PASS		0
+#define USB_STATUS_FAIL		1
+#define USB_STATUS_PHASE_ERROR	2
+
+/* Bulk-only class specific requests */
+#define USB_BULK_RESET_REQUEST		0xff
+#define USB_BULK_GET_MAX_LUN_REQUEST	0xfe
+
+/* Length of a SCSI Command Data Block */
+#define MAX_COMMAND_SIZE	16
+
+/* SCSI commands that we recognize */
+#define SC_FORMAT_UNIT			0x04
+#define SC_INQUIRY			0x12
+#define SC_MODE_SELECT_6		0x15
+#define SC_MODE_SELECT_10		0x55
+#define SC_MODE_SENSE_6			0x1a
+#define SC_MODE_SENSE_10		0x5a
+#define SC_PREVENT_ALLOW_MEDIUM_REMOVAL	0x1e
+#define SC_READ_6			0x08
+#define SC_READ_10			0x28
+#define SC_READ_12			0xa8
+#define SC_READ_CAPACITY		0x25
+#define SC_READ_FORMAT_CAPACITIES	0x23
+#define SC_RELEASE			0x17
+#define SC_REQUEST_SENSE		0x03
+#define SC_RESERVE			0x16
+#define SC_SEND_DIAGNOSTIC		0x1d
+#define SC_START_STOP_UNIT		0x1b
+#define SC_SYNCHRONIZE_CACHE		0x35
+#define SC_TEST_UNIT_READY		0x00
+#define SC_VERIFY			0x2f
+#define SC_WRITE_6			0x0a
+#define SC_WRITE_10			0x2a
+#define SC_WRITE_12			0xaa
+
+/* SCSI Sense Key/Additional Sense Code/ASC Qualifier values */
+#define SS_NO_SENSE				0
+#define SS_COMMUNICATION_FAILURE		0x040800
+#define SS_INVALID_COMMAND			0x052000
+#define SS_INVALID_FIELD_IN_CDB			0x052400
+#define SS_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE	0x052100
+#define SS_LOGICAL_UNIT_NOT_SUPPORTED		0x052500
+#define SS_MEDIUM_NOT_PRESENT			0x023a00
+#define SS_MEDIUM_REMOVAL_PREVENTED		0x055302
+#define SS_NOT_READY_TO_READY_TRANSITION	0x062800
+#define SS_RESET_OCCURRED			0x062900
+#define SS_SAVING_PARAMETERS_NOT_SUPPORTED	0x053900
+#define SS_UNRECOVERED_READ_ERROR		0x031100
+#define SS_WRITE_ERROR				0x030c02
+#define SS_WRITE_PROTECTED			0x072700
+
+#define SK(x)		((u8) ((x) >> 16))	/* Sense Key byte, etc. */
+#define ASC(x)		((u8) ((x) >> 8))
+#define ASCQ(x)		((u8) (x))
+
+
+/*-------------------------------------------------------------------------*/
+
+struct lun {
+	struct file	*filp;
+	loff_t		file_length;
+	loff_t		num_sectors;
+
+	unsigned int	ro : 1;
+	unsigned int	prevent_medium_removal : 1;
+	unsigned int	registered : 1;
+	unsigned int	info_valid : 1;
+
+	u32		sense_data;
+	u32		sense_data_info;
+	u32		unit_attention_data;
+
+	struct device	dev;
+};
+
+#define backing_file_is_open(curlun)	((curlun)->filp != NULL)
+
+
+static struct lun *dev_to_lun(struct device *dev)
+{
+	return container_of(dev, struct lun, dev);
+}
+
+/* Big enough to hold our biggest descriptor */
+#define EP0_BUFSIZE	256
+
+/* Number of buffers we will use.  2 is enough for double-buffering */
+#define NUM_BUFFERS	2
+
+enum fsg_buffer_state {
+	BUF_STATE_EMPTY = 0,
+	BUF_STATE_FULL,
+	BUF_STATE_BUSY
+};
+
+struct fsg_buffhd {
+	void				*buf;
+	enum fsg_buffer_state		state;
+	struct fsg_buffhd		*next;
+
+	/* The NetChip 2280 is faster, and handles some protocol faults
+	 * better, if we don't submit any short bulk-out read requests.
+	 * So we will record the intended request length here. */
+	unsigned int			bulk_out_intended_length;
+
+	struct usb_request		*inreq;
+	int				inreq_busy;
+	struct usb_request		*outreq;
+	int				outreq_busy;
+};
+
+enum fsg_state {
+	/* This one isn't used anywhere */
+	FSG_STATE_COMMAND_PHASE = -10,
+
+	FSG_STATE_DATA_PHASE,
+	FSG_STATE_STATUS_PHASE,
+
+	FSG_STATE_IDLE = 0,
+	FSG_STATE_ABORT_BULK_OUT,
+	FSG_STATE_RESET,
+	FSG_STATE_CONFIG_CHANGE,
+	FSG_STATE_EXIT,
+	FSG_STATE_TERMINATED
+};
+
+enum data_direction {
+	DATA_DIR_UNKNOWN = 0,
+	DATA_DIR_FROM_HOST,
+	DATA_DIR_TO_HOST,
+	DATA_DIR_NONE
+};
+
+struct fsg_dev {
+	struct usb_function function;
+	struct usb_composite_dev *cdev;
+
+	/* optional "usb_mass_storage" platform device */
+	struct platform_device *pdev;
+
+	/* lock protects: state and all the req_busy's */
+	spinlock_t		lock;
+
+	/* filesem protects: backing files in use */
+	struct rw_semaphore	filesem;
+
+	/* reference counting: wait until all LUNs are released */
+	struct kref		ref;
+
+	unsigned int		bulk_out_maxpacket;
+	enum fsg_state		state;		/* For exception handling */
+
+	u8			config, new_config;
+
+	unsigned int		running : 1;
+	unsigned int		bulk_in_enabled : 1;
+	unsigned int		bulk_out_enabled : 1;
+	unsigned int		phase_error : 1;
+	unsigned int		short_packet_received : 1;
+	unsigned int		bad_lun_okay : 1;
+
+	unsigned long		atomic_bitflags;
+#define REGISTERED		0
+#define CLEAR_BULK_HALTS	1
+#define SUSPENDED		2
+
+	struct usb_ep		*bulk_in;
+	struct usb_ep		*bulk_out;
+
+	struct fsg_buffhd	*next_buffhd_to_fill;
+	struct fsg_buffhd	*next_buffhd_to_drain;
+	struct fsg_buffhd	buffhds[NUM_BUFFERS];
+
+	int			thread_wakeup_needed;
+	struct completion	thread_notifier;
+	struct task_struct	*thread_task;
+
+	int			cmnd_size;
+	u8			cmnd[MAX_COMMAND_SIZE];
+	enum data_direction	data_dir;
+	u32			data_size;
+	u32			data_size_from_cmnd;
+	u32			tag;
+	unsigned int		lun;
+	u32			residue;
+	u32			usb_amount_left;
+
+	unsigned int		nluns;
+	struct lun		*luns;
+	struct lun		*curlun;
+
+	u32				buf_size;
+	const char		*vendor;
+	const char		*product;
+	int				release;
+
+	struct switch_dev sdev;
+
+	struct wake_lock wake_lock;
+};
+
+static inline struct fsg_dev *func_to_dev(struct usb_function *f)
+{
+	return container_of(f, struct fsg_dev, function);
+}
+
+static int exception_in_progress(struct fsg_dev *fsg)
+{
+	return (fsg->state > FSG_STATE_IDLE);
+}
+
+/* Make bulk-out requests be divisible by the maxpacket size */
+static void set_bulk_out_req_length(struct fsg_dev *fsg,
+		struct fsg_buffhd *bh, unsigned int length)
+{
+	unsigned int	rem;
+
+	bh->bulk_out_intended_length = length;
+	rem = length % fsg->bulk_out_maxpacket;
+	if (rem > 0)
+		length += fsg->bulk_out_maxpacket - rem;
+	bh->outreq->length = length;
+}
+
+static struct fsg_dev			*the_fsg;
+
+static void	close_backing_file(struct fsg_dev *fsg, struct lun *curlun);
+static void	close_all_backing_files(struct fsg_dev *fsg);
+
+
+/*-------------------------------------------------------------------------*/
+
+#ifdef DUMP_MSGS
+
+static void dump_msg(struct fsg_dev *fsg, const char *label,
+		const u8 *buf, unsigned int length)
+{
+	if (length < 512) {
+		DBG(fsg, "%s, length %u:\n", label, length);
+		print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET,
+				16, 1, buf, length, 0);
+	}
+}
+
+static void dump_cdb(struct fsg_dev *fsg)
+{}
+
+#else
+
+static void dump_msg(struct fsg_dev *fsg, const char *label,
+		const u8 *buf, unsigned int length)
+{}
+
+#ifdef VERBOSE_DEBUG
+
+static void dump_cdb(struct fsg_dev *fsg)
+{
+	print_hex_dump(KERN_DEBUG, "SCSI CDB: ", DUMP_PREFIX_NONE,
+			16, 1, fsg->cmnd, fsg->cmnd_size, 0);
+}
+
+#else
+
+static void dump_cdb(struct fsg_dev *fsg)
+{}
+
+#endif /* VERBOSE_DEBUG */
+#endif /* DUMP_MSGS */
+
+
+/*-------------------------------------------------------------------------*/
+
+/* Routines for unaligned data access */
+
+static u16 get_be16(u8 *buf)
+{
+	return ((u16) buf[0] << 8) | ((u16) buf[1]);
+}
+
+static u32 get_be32(u8 *buf)
+{
+	return ((u32) buf[0] << 24) | ((u32) buf[1] << 16) |
+			((u32) buf[2] << 8) | ((u32) buf[3]);
+}
+
+static void put_be16(u8 *buf, u16 val)
+{
+	buf[0] = val >> 8;
+	buf[1] = val;
+}
+
+static void put_be32(u8 *buf, u32 val)
+{
+	buf[0] = val >> 24;
+	buf[1] = val >> 16;
+	buf[2] = val >> 8;
+	buf[3] = val & 0xff;
+}
+
+/*-------------------------------------------------------------------------*/
+
+/*
+ * DESCRIPTORS ... most are static, but strings and (full) configuration
+ * descriptors are built on demand.  Also the (static) config and interface
+ * descriptors are adjusted during fsg_bind().
+ */
+
+/* There is only one interface. */
+
+static struct usb_interface_descriptor
+intf_desc = {
+	.bLength =		sizeof intf_desc,
+	.bDescriptorType =	USB_DT_INTERFACE,
+
+	.bNumEndpoints =	2,		/* Adjusted during fsg_bind() */
+	.bInterfaceClass =	USB_CLASS_MASS_STORAGE,
+	.bInterfaceSubClass =	US_SC_SCSI,
+	.bInterfaceProtocol =	US_PR_BULK,
+};
+
+/* Three full-speed endpoint descriptors: bulk-in, bulk-out,
+ * and interrupt-in. */
+
+static struct usb_endpoint_descriptor
+fs_bulk_in_desc = {
+	.bLength =		USB_DT_ENDPOINT_SIZE,
+	.bDescriptorType =	USB_DT_ENDPOINT,
+
+	.bEndpointAddress =	USB_DIR_IN,
+	.bmAttributes =		USB_ENDPOINT_XFER_BULK,
+	/* wMaxPacketSize set by autoconfiguration */
+};
+
+static struct usb_endpoint_descriptor
+fs_bulk_out_desc = {
+	.bLength =		USB_DT_ENDPOINT_SIZE,
+	.bDescriptorType =	USB_DT_ENDPOINT,
+
+	.bEndpointAddress =	USB_DIR_OUT,
+	.bmAttributes =		USB_ENDPOINT_XFER_BULK,
+	/* wMaxPacketSize set by autoconfiguration */
+};
+
+static struct usb_descriptor_header *fs_function[] = {
+	(struct usb_descriptor_header *) &intf_desc,
+	(struct usb_descriptor_header *) &fs_bulk_in_desc,
+	(struct usb_descriptor_header *) &fs_bulk_out_desc,
+	NULL,
+};
+#define FS_FUNCTION_PRE_EP_ENTRIES	2
+
+
+static struct usb_endpoint_descriptor
+hs_bulk_in_desc = {
+	.bLength =		USB_DT_ENDPOINT_SIZE,
+	.bDescriptorType =	USB_DT_ENDPOINT,
+
+	/* bEndpointAddress copied from fs_bulk_in_desc during fsg_bind() */
+	.bmAttributes =		USB_ENDPOINT_XFER_BULK,
+	.wMaxPacketSize =	__constant_cpu_to_le16(512),
+};
+
+static struct usb_endpoint_descriptor
+hs_bulk_out_desc = {
+	.bLength =		USB_DT_ENDPOINT_SIZE,
+	.bDescriptorType =	USB_DT_ENDPOINT,
+
+	/* bEndpointAddress copied from fs_bulk_out_desc during fsg_bind() */
+	.bmAttributes =		USB_ENDPOINT_XFER_BULK,
+	.wMaxPacketSize =	__constant_cpu_to_le16(512),
+	.bInterval =		1,	/* NAK every 1 uframe */
+};
+
+
+static struct usb_descriptor_header *hs_function[] = {
+	(struct usb_descriptor_header *) &intf_desc,
+	(struct usb_descriptor_header *) &hs_bulk_in_desc,
+	(struct usb_descriptor_header *) &hs_bulk_out_desc,
+	NULL,
+};
+
+/* Maxpacket and other transfer characteristics vary by speed. */
+static struct usb_endpoint_descriptor *
+ep_desc(struct usb_gadget *g, struct usb_endpoint_descriptor *fs,
+		struct usb_endpoint_descriptor *hs)
+{
+	if (gadget_is_dualspeed(g) && g->speed == USB_SPEED_HIGH)
+		return hs;
+	return fs;
+}
+
+/*-------------------------------------------------------------------------*/
+
+/* These routines may be called in process context or in_irq */
+
+/* Caller must hold fsg->lock */
+static void wakeup_thread(struct fsg_dev *fsg)
+{
+	/* Tell the main thread that something has happened */
+	fsg->thread_wakeup_needed = 1;
+	if (fsg->thread_task)
+		wake_up_process(fsg->thread_task);
+}
+
+
+static void raise_exception(struct fsg_dev *fsg, enum fsg_state new_state)
+{
+	unsigned long		flags;
+
+	DBG(fsg, "raise_exception %d\n", (int)new_state);
+	/* Do nothing if a higher-priority exception is already in progress.
+	 * If a lower-or-equal priority exception is in progress, preempt it
+	 * and notify the main thread by sending it a signal. */
+	spin_lock_irqsave(&fsg->lock, flags);
+	if (fsg->state <= new_state) {
+		fsg->state = new_state;
+		if (fsg->thread_task)
+			send_sig_info(SIGUSR1, SEND_SIG_FORCED,
+					fsg->thread_task);
+	}
+	spin_unlock_irqrestore(&fsg->lock, flags);
+}
+
+
+/*-------------------------------------------------------------------------*/
+
+/* Bulk and interrupt endpoint completion handlers.
+ * These always run in_irq. */
+
+static void bulk_in_complete(struct usb_ep *ep, struct usb_request *req)
+{
+	struct fsg_dev		*fsg = ep->driver_data;
+	struct fsg_buffhd	*bh = req->context;
+
+	if (req->status || req->actual != req->length)
+		DBG(fsg, "%s --> %d, %u/%u\n", __func__,
+				req->status, req->actual, req->length);
+
+	/* Hold the lock while we update the request and buffer states */
+	smp_wmb();
+	spin_lock(&fsg->lock);
+	bh->inreq_busy = 0;
+	bh->state = BUF_STATE_EMPTY;
+	wakeup_thread(fsg);
+	spin_unlock(&fsg->lock);
+}
+
+static void bulk_out_complete(struct usb_ep *ep, struct usb_request *req)
+{
+	struct fsg_dev		*fsg = ep->driver_data;
+	struct fsg_buffhd	*bh = req->context;
+
+	dump_msg(fsg, "bulk-out", req->buf, req->actual);
+	if (req->status || req->actual != bh->bulk_out_intended_length)
+		DBG(fsg, "%s --> %d, %u/%u\n", __func__,
+				req->status, req->actual,
+				bh->bulk_out_intended_length);
+
+	/* Hold the lock while we update the request and buffer states */
+	smp_wmb();
+	spin_lock(&fsg->lock);
+	bh->outreq_busy = 0;
+	bh->state = BUF_STATE_FULL;
+	wakeup_thread(fsg);
+	spin_unlock(&fsg->lock);
+}
+
+static int fsg_function_setup(struct usb_function *f,
+					const struct usb_ctrlrequest *ctrl)
+{
+	struct fsg_dev	*fsg = func_to_dev(f);
+	struct usb_composite_dev *cdev = fsg->cdev;
+	int			value = -EOPNOTSUPP;
+	u16			w_index = le16_to_cpu(ctrl->wIndex);
+	u16			w_value = le16_to_cpu(ctrl->wValue);
+	u16			w_length = le16_to_cpu(ctrl->wLength);
+
+	DBG(fsg, "fsg_function_setup\n");
+	/* Handle Bulk-only class-specific requests */
+	if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_CLASS) {
+	DBG(fsg, "USB_TYPE_CLASS\n");
+		switch (ctrl->bRequest) {
+		case USB_BULK_RESET_REQUEST:
+			if (ctrl->bRequestType != (USB_DIR_OUT |
+					USB_TYPE_CLASS | USB_RECIP_INTERFACE))
+				break;
+			if (w_index != 0 || w_value != 0) {
+				value = -EDOM;
+				break;
+			}
+
+			/* Raise an exception to stop the current operation
+			 * and reinitialize our state. */
+			DBG(fsg, "bulk reset request\n");
+			raise_exception(fsg, FSG_STATE_RESET);
+			value = 0;
+			break;
+
+		case USB_BULK_GET_MAX_LUN_REQUEST:
+			if (ctrl->bRequestType != (USB_DIR_IN |
+					USB_TYPE_CLASS | USB_RECIP_INTERFACE))
+				break;
+			if (w_index != 0 || w_value != 0) {
+				value = -EDOM;
+				break;
+			}
+			VDBG(fsg, "get max LUN\n");
+			*(u8 *)cdev->req->buf = fsg->nluns - 1;
+			value = 1;
+			break;
+		}
+	}
+
+		/* respond with data transfer or status phase? */
+		if (value >= 0) {
+			int rc;
+			cdev->req->zero = value < w_length;
+			cdev->req->length = value;
+			rc = usb_ep_queue(cdev->gadget->ep0, cdev->req, GFP_ATOMIC);
+			if (rc < 0)
+				printk("%s setup response queue error\n", __func__);
+		}
+
+	if (value == -EOPNOTSUPP)
+		VDBG(fsg,
+			"unknown class-specific control req "
+			"%02x.%02x v%04x i%04x l%u\n",
+			ctrl->bRequestType, ctrl->bRequest,
+			le16_to_cpu(ctrl->wValue), w_index, w_length);
+	return value;
+}
+
+/*-------------------------------------------------------------------------*/
+
+/* All the following routines run in process context */
+
+
+/* Use this for bulk or interrupt transfers, not ep0 */
+static void start_transfer(struct fsg_dev *fsg, struct usb_ep *ep,
+		struct usb_request *req, int *pbusy,
+		enum fsg_buffer_state *state)
+{
+	int	rc;
+
+	DBG(fsg, "start_transfer req: %p, req->buf: %p\n", req, req->buf);
+	if (ep == fsg->bulk_in)
+		dump_msg(fsg, "bulk-in", req->buf, req->length);
+
+	spin_lock_irq(&fsg->lock);
+	*pbusy = 1;
+	*state = BUF_STATE_BUSY;
+	spin_unlock_irq(&fsg->lock);
+	rc = usb_ep_queue(ep, req, GFP_KERNEL);
+	if (rc != 0) {
+		*pbusy = 0;
+		*state = BUF_STATE_EMPTY;
+
+		/* We can't do much more than wait for a reset */
+
+		/* Note: currently the net2280 driver fails zero-length
+		 * submissions if DMA is enabled. */
+		if (rc != -ESHUTDOWN && !(rc == -EOPNOTSUPP &&
+						req->length == 0))
+			WARN(fsg, "error in submission: %s --> %d\n",
+				(ep == fsg->bulk_in ? "bulk-in" : "bulk-out"),
+				rc);
+	}
+}
+
+
+static int sleep_thread(struct fsg_dev *fsg)
+{
+	int	rc = 0;
+
+	/* Wait until a signal arrives or we are woken up */
+	for (;;) {
+		try_to_freeze();
+		set_current_state(TASK_INTERRUPTIBLE);
+		if (signal_pending(current)) {
+			rc = -EINTR;
+			break;
+		}
+		if (fsg->thread_wakeup_needed)
+			break;
+		schedule();
+	}
+	__set_current_state(TASK_RUNNING);
+	fsg->thread_wakeup_needed = 0;
+	return rc;
+}
+
+
+/*-------------------------------------------------------------------------*/
+
+static int do_read(struct fsg_dev *fsg)
+{
+	struct lun		*curlun = fsg->curlun;
+	u32			lba;
+	struct fsg_buffhd	*bh;
+	int			rc;
+	u32			amount_left;
+	loff_t			file_offset, file_offset_tmp;
+	unsigned int		amount;
+	unsigned int		partial_page;
+	ssize_t			nread;
+
+	/* Get the starting Logical Block Address and check that it's
+	 * not too big */
+	if (fsg->cmnd[0] == SC_READ_6)
+		lba = (fsg->cmnd[1] << 16) | get_be16(&fsg->cmnd[2]);
+	else {
+		lba = get_be32(&fsg->cmnd[2]);
+
+		/* We allow DPO (Disable Page Out = don't save data in the
+		 * cache) and FUA (Force Unit Access = don't read from the
+		 * cache), but we don't implement them. */
+		if ((fsg->cmnd[1] & ~0x18) != 0) {
+			curlun->sense_data = SS_INVALID_FIELD_IN_CDB;
+			return -EINVAL;
+		}
+	}
+	if (lba >= curlun->num_sectors) {
+		curlun->sense_data = SS_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE;
+		return -EINVAL;
+	}
+	file_offset = ((loff_t) lba) << 9;
+
+	/* Carry out the file reads */
+	amount_left = fsg->data_size_from_cmnd;
+	if (unlikely(amount_left == 0))
+		return -EIO;		/* No default reply */
+
+	for (;;) {
+
+		/* Figure out how much we need to read:
+		 * Try to read the remaining amount.
+		 * But don't read more than the buffer size.
+		 * And don't try to read past the end of the file.
+		 * Finally, if we're not at a page boundary, don't read past
+		 *	the next page.
+		 * If this means reading 0 then we were asked to read past
+		 *	the end of file. */
+		amount = min((unsigned int) amount_left,
+				(unsigned int)fsg->buf_size);
+		amount = min((loff_t) amount,
+				curlun->file_length - file_offset);
+		partial_page = file_offset & (PAGE_CACHE_SIZE - 1);
+		if (partial_page > 0)
+			amount = min(amount, (unsigned int) PAGE_CACHE_SIZE -
+					partial_page);
+
+		/* Wait for the next buffer to become available */
+		bh = fsg->next_buffhd_to_fill;
+		while (bh->state != BUF_STATE_EMPTY) {
+			rc = sleep_thread(fsg);
+			if (rc)
+				return rc;
+		}
+
+		/* If we were asked to read past the end of file,
+		 * end with an empty buffer. */
+		if (amount == 0) {
+			curlun->sense_data =
+					SS_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE;
+			curlun->sense_data_info = file_offset >> 9;
+			curlun->info_valid = 1;
+			bh->inreq->length = 0;
+			bh->state = BUF_STATE_FULL;
+			break;
+		}
+
+		/* Perform the read */
+		file_offset_tmp = file_offset;
+		nread = vfs_read(curlun->filp,
+				(char __user *) bh->buf,
+				amount, &file_offset_tmp);
+		VLDBG(curlun, "file read %u @ %llu -> %d\n", amount,
+				(unsigned long long) file_offset,
+				(int) nread);
+		if (signal_pending(current))
+			return -EINTR;
+
+		if (nread < 0) {
+			LDBG(curlun, "error in file read: %d\n",
+					(int) nread);
+			nread = 0;
+		} else if (nread < amount) {
+			LDBG(curlun, "partial file read: %d/%u\n",
+					(int) nread, amount);
+			nread -= (nread & 511);	/* Round down to a block */
+		}
+		file_offset  += nread;
+		amount_left  -= nread;
+		fsg->residue -= nread;
+		bh->inreq->length = nread;
+		bh->state = BUF_STATE_FULL;
+
+		/* If an error occurred, report it and its position */
+		if (nread < amount) {
+			curlun->sense_data = SS_UNRECOVERED_READ_ERROR;
+			curlun->sense_data_info = file_offset >> 9;
+			curlun->info_valid = 1;
+			break;
+		}
+
+		if (amount_left == 0)
+			break;		/* No more left to read */
+
+		/* Send this buffer and go read some more */
+		start_transfer(fsg, fsg->bulk_in, bh->inreq,
+				&bh->inreq_busy, &bh->state);
+		fsg->next_buffhd_to_fill = bh->next;
+	}
+
+	return -EIO;		/* No default reply */
+}
+
+
+/*-------------------------------------------------------------------------*/
+
+static int do_write(struct fsg_dev *fsg)
+{
+	struct lun		*curlun = fsg->curlun;
+	u32			lba;
+	struct fsg_buffhd	*bh;
+	int			get_some_more;
+	u32			amount_left_to_req, amount_left_to_write;
+	loff_t			usb_offset, file_offset, file_offset_tmp;
+	unsigned int		amount;
+	unsigned int		partial_page;
+	ssize_t			nwritten;
+	int			rc;
+
+	if (curlun->ro) {
+		curlun->sense_data = SS_WRITE_PROTECTED;
+		return -EINVAL;
+	}
+	curlun->filp->f_flags &= ~O_SYNC;	/* Default is not to wait */
+
+	/* Get the starting Logical Block Address and check that it's
+	 * not too big */
+	if (fsg->cmnd[0] == SC_WRITE_6)
+		lba = (fsg->cmnd[1] << 16) | get_be16(&fsg->cmnd[2]);
+	else {
+		lba = get_be32(&fsg->cmnd[2]);
+
+		/* We allow DPO (Disable Page Out = don't save data in the
+		 * cache) and FUA (Force Unit Access = write directly to the
+		 * medium).  We don't implement DPO; we implement FUA by
+		 * performing synchronous output. */
+		if ((fsg->cmnd[1] & ~0x18) != 0) {
+			curlun->sense_data = SS_INVALID_FIELD_IN_CDB;
+			return -EINVAL;
+		}
+		if (fsg->cmnd[1] & 0x08)	/* FUA */
+			curlun->filp->f_flags |= O_SYNC;
+	}
+	if (lba >= curlun->num_sectors) {
+		curlun->sense_data = SS_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE;
+		return -EINVAL;
+	}
+
+	/* Carry out the file writes */
+	get_some_more = 1;
+	file_offset = usb_offset = ((loff_t) lba) << 9;
+	amount_left_to_req = amount_left_to_write = fsg->data_size_from_cmnd;
+
+	while (amount_left_to_write > 0) {
+
+		/* Queue a request for more data from the host */
+		bh = fsg->next_buffhd_to_fill;
+		if (bh->state == BUF_STATE_EMPTY && get_some_more) {
+
+			/* Figure out how much we want to get:
+			 * Try to get the remaining amount.
+			 * But don't get more than the buffer size.
+			 * And don't try to go past the end of the file.
+			 * If we're not at a page boundary,
+			 *	don't go past the next page.
+			 * If this means getting 0, then we were asked
+			 *	to write past the end of file.
+			 * Finally, round down to a block boundary. */
+			amount = min(amount_left_to_req, (u32)fsg->buf_size);
+			amount = min((loff_t) amount, curlun->file_length -
+					usb_offset);
+			partial_page = usb_offset & (PAGE_CACHE_SIZE - 1);
+			if (partial_page > 0)
+				amount = min(amount,
+	(unsigned int) PAGE_CACHE_SIZE - partial_page);
+
+			if (amount == 0) {
+				get_some_more = 0;
+				curlun->sense_data =
+					SS_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE;
+				curlun->sense_data_info = usb_offset >> 9;
+				curlun->info_valid = 1;
+				continue;
+			}
+			amount -= (amount & 511);
+			if (amount == 0) {
+
+				/* Why were we were asked to transfer a
+				 * partial block? */
+				get_some_more = 0;
+				continue;
+			}
+
+			/* Get the next buffer */
+			usb_offset += amount;
+			fsg->usb_amount_left -= amount;
+			amount_left_to_req -= amount;
+			if (amount_left_to_req == 0)
+				get_some_more = 0;
+
+			/* amount is always divisible by 512, hence by
+			 * the bulk-out maxpacket size */
+			bh->outreq->length = bh->bulk_out_intended_length =
+					amount;
+			start_transfer(fsg, fsg->bulk_out, bh->outreq,
+					&bh->outreq_busy, &bh->state);
+			fsg->next_buffhd_to_fill = bh->next;
+			continue;
+		}
+
+		/* Write the received data to the backing file */
+		bh = fsg->next_buffhd_to_drain;
+		if (bh->state == BUF_STATE_EMPTY && !get_some_more)
+			break;			/* We stopped early */
+		if (bh->state == BUF_STATE_FULL) {
+			smp_rmb();
+			fsg->next_buffhd_to_drain = bh->next;
+			bh->state = BUF_STATE_EMPTY;
+
+			/* Did something go wrong with the transfer? */
+			if (bh->outreq->status != 0) {
+				curlun->sense_data = SS_COMMUNICATION_FAILURE;
+				curlun->sense_data_info = file_offset >> 9;
+				curlun->info_valid = 1;
+				break;
+			}
+
+			amount = bh->outreq->actual;
+			if (curlun->file_length - file_offset < amount) {
+				LERROR(curlun,
+	"write %u @ %llu beyond end %llu\n",
+	amount, (unsigned long long) file_offset,
+	(unsigned long long) curlun->file_length);
+				amount = curlun->file_length - file_offset;
+			}
+
+			/* Perform the write */
+			file_offset_tmp = file_offset;
+			nwritten = vfs_write(curlun->filp,
+					(char __user *) bh->buf,
+					amount, &file_offset_tmp);
+			VLDBG(curlun, "file write %u @ %llu -> %d\n", amount,
+					(unsigned long long) file_offset,
+					(int) nwritten);
+			if (signal_pending(current))
+				return -EINTR;		/* Interrupted! */
+
+			if (nwritten < 0) {
+				LDBG(curlun, "error in file write: %d\n",
+						(int) nwritten);
+				nwritten = 0;
+			} else if (nwritten < amount) {
+				LDBG(curlun, "partial file write: %d/%u\n",
+						(int) nwritten, amount);
+				nwritten -= (nwritten & 511);
+						/* Round down to a block */
+			}
+			file_offset += nwritten;
+			amount_left_to_write -= nwritten;
+			fsg->residue -= nwritten;
+
+			/* If an error occurred, report it and its position */
+			if (nwritten < amount) {
+				curlun->sense_data = SS_WRITE_ERROR;
+				curlun->sense_data_info = file_offset >> 9;
+				curlun->info_valid = 1;
+				break;
+			}
+
+			/* Did the host decide to stop early? */
+			if (bh->outreq->actual != bh->outreq->length) {
+				fsg->short_packet_received = 1;
+				break;
+			}
+			continue;
+		}
+
+		/* Wait for something to happen */
+		rc = sleep_thread(fsg);
+		if (rc)
+			return rc;
+	}
+
+	return -EIO;		/* No default reply */
+}
+
+
+/*-------------------------------------------------------------------------*/
+
+/* Sync the file data, don't bother with the metadata.
+ * The caller must own fsg->filesem.
+ * This code was copied from fs/buffer.c:sys_fdatasync(). */
+static int fsync_sub(struct lun *curlun)
+{
+	struct file	*filp = curlun->filp;
+	struct inode	*inode;
+	int		rc, err;
+
+	if (curlun->ro || !filp)
+		return 0;
+	if (!filp->f_op->fsync)
+		return -EINVAL;
+
+	inode = filp->f_path.dentry->d_inode;
+	mutex_lock(&inode->i_mutex);
+	rc = filemap_fdatawrite(inode->i_mapping);
+	err = filp->f_op->fsync(filp, filp->f_path.dentry, 1);
+	if (!rc)
+		rc = err;
+	err = filemap_fdatawait(inode->i_mapping);
+	if (!rc)
+		rc = err;
+	mutex_unlock(&inode->i_mutex);
+	VLDBG(curlun, "fdatasync -> %d\n", rc);
+	return rc;
+}
+
+static void fsync_all(struct fsg_dev *fsg)
+{
+	int	i;
+
+	for (i = 0; i < fsg->nluns; ++i)
+		fsync_sub(&fsg->luns[i]);
+}
+
+static int do_synchronize_cache(struct fsg_dev *fsg)
+{
+	struct lun	*curlun = fsg->curlun;
+	int		rc;
+
+	/* We ignore the requested LBA and write out all file's
+	 * dirty data buffers. */
+	rc = fsync_sub(curlun);
+	if (rc)
+		curlun->sense_data = SS_WRITE_ERROR;
+	return 0;
+}
+
+
+/*-------------------------------------------------------------------------*/
+
+static void invalidate_sub(struct lun *curlun)
+{
+	struct file	*filp = curlun->filp;
+	struct inode	*inode = filp->f_path.dentry->d_inode;
+	unsigned long	rc;
+
+	rc = invalidate_mapping_pages(inode->i_mapping, 0, -1);
+	VLDBG(curlun, "invalidate_inode_pages -> %ld\n", rc);
+}
+
+static int do_verify(struct fsg_dev *fsg)
+{
+	struct lun		*curlun = fsg->curlun;
+	u32			lba;
+	u32			verification_length;
+	struct fsg_buffhd	*bh = fsg->next_buffhd_to_fill;
+	loff_t			file_offset, file_offset_tmp;
+	u32			amount_left;
+	unsigned int		amount;
+	ssize_t			nread;
+
+	/* Get the starting Logical Block Address and check that it's
+	 * not too big */
+	lba = get_be32(&fsg->cmnd[2]);
+	if (lba >= curlun->num_sectors) {
+		curlun->sense_data = SS_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE;
+		return -EINVAL;
+	}
+
+	/* We allow DPO (Disable Page Out = don't save data in the
+	 * cache) but we don't implement it. */
+	if ((fsg->cmnd[1] & ~0x10) != 0) {
+		curlun->sense_data = SS_INVALID_FIELD_IN_CDB;
+		return -EINVAL;
+	}
+
+	verification_length = get_be16(&fsg->cmnd[7]);
+	if (unlikely(verification_length == 0))
+		return -EIO;		/* No default reply */
+
+	/* Prepare to carry out the file verify */
+	amount_left = verification_length << 9;
+	file_offset = ((loff_t) lba) << 9;
+
+	/* Write out all the dirty buffers before invalidating them */
+	fsync_sub(curlun);
+	if (signal_pending(current))
+		return -EINTR;
+
+	invalidate_sub(curlun);
+	if (signal_pending(current))
+		return -EINTR;
+
+	/* Just try to read the requested blocks */
+	while (amount_left > 0) {
+
+		/* Figure out how much we need to read:
+		 * Try to read the remaining amount, but not more than
+		 * the buffer size.
+		 * And don't try to read past the end of the file.
+		 * If this means reading 0 then we were asked to read
+		 * past the end of file. */
+		amount = min((unsigned int) amount_left,
+				(unsigned int)fsg->buf_size);
+		amount = min((loff_t) amount,
+				curlun->file_length - file_offset);
+		if (amount == 0) {
+			curlun->sense_data =
+					SS_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE;
+			curlun->sense_data_info = file_offset >> 9;
+			curlun->info_valid = 1;
+			break;
+		}
+
+		/* Perform the read */
+		file_offset_tmp = file_offset;
+		nread = vfs_read(curlun->filp,
+				(char __user *) bh->buf,
+				amount, &file_offset_tmp);
+		VLDBG(curlun, "file read %u @ %llu -> %d\n", amount,
+				(unsigned long long) file_offset,
+				(int) nread);
+		if (signal_pending(current))
+			return -EINTR;
+
+		if (nread < 0) {
+			LDBG(curlun, "error in file verify: %d\n",
+					(int) nread);
+			nread = 0;
+		} else if (nread < amount) {
+			LDBG(curlun, "partial file verify: %d/%u\n",
+					(int) nread, amount);
+			nread -= (nread & 511);	/* Round down to a sector */
+		}
+		if (nread == 0) {
+			curlun->sense_data = SS_UNRECOVERED_READ_ERROR;
+			curlun->sense_data_info = file_offset >> 9;
+			curlun->info_valid = 1;
+			break;
+		}
+		file_offset += nread;
+		amount_left -= nread;
+	}
+	return 0;
+}
+
+
+/*-------------------------------------------------------------------------*/
+
+static int do_inquiry(struct fsg_dev *fsg, struct fsg_buffhd *bh)
+{
+	u8	*buf = (u8 *) bh->buf;
+
+	if (!fsg->curlun) {		/* Unsupported LUNs are okay */
+		fsg->bad_lun_okay = 1;
+		memset(buf, 0, 36);
+		buf[0] = 0x7f;		/* Unsupported, no device-type */
+		return 36;
+	}
+
+	memset(buf, 0, 8);	/* Non-removable, direct-access device */
+
+	buf[1] = 0x80;	/* set removable bit */
+	buf[2] = 2;		/* ANSI SCSI level 2 */
+	buf[3] = 2;		/* SCSI-2 INQUIRY data format */
+	buf[4] = 31;		/* Additional length */
+				/* No special options */
+	sprintf(buf + 8, "%-8s%-16s%04x", fsg->vendor,
+			fsg->product, fsg->release);
+	return 36;
+}
+
+
+static int do_request_sense(struct fsg_dev *fsg, struct fsg_buffhd *bh)
+{
+	struct lun	*curlun = fsg->curlun;
+	u8		*buf = (u8 *) bh->buf;
+	u32		sd, sdinfo;
+	int		valid;
+
+	/*
+	 * From the SCSI-2 spec., section 7.9 (Unit attention condition):
+	 *
+	 * If a REQUEST SENSE command is received from an initiator
+	 * with a pending unit attention condition (before the target
+	 * generates the contingent allegiance condition), then the
+	 * target shall either:
+	 *   a) report any pending sense data and preserve the unit
+	 *	attention condition on the logical unit, or,
+	 *   b) report the unit attention condition, may discard any
+	 *	pending sense data, and clear the unit attention
+	 *	condition on the logical unit for that initiator.
+	 *
+	 * FSG normally uses option a); enable this code to use option b).
+	 */
+#if 0
+	if (curlun && curlun->unit_attention_data != SS_NO_SENSE) {
+		curlun->sense_data = curlun->unit_attention_data;
+		curlun->unit_attention_data = SS_NO_SENSE;
+	}
+#endif
+
+	if (!curlun) {		/* Unsupported LUNs are okay */
+		fsg->bad_lun_okay = 1;
+		sd = SS_LOGICAL_UNIT_NOT_SUPPORTED;
+		sdinfo = 0;
+		valid = 0;
+	} else {
+		sd = curlun->sense_data;
+		sdinfo = curlun->sense_data_info;
+		valid = curlun->info_valid << 7;
+		curlun->sense_data = SS_NO_SENSE;
+		curlun->sense_data_info = 0;
+		curlun->info_valid = 0;
+	}
+
+	memset(buf, 0, 18);
+	buf[0] = valid | 0x70;			/* Valid, current error */
+	buf[2] = SK(sd);
+	put_be32(&buf[3], sdinfo);		/* Sense information */
+	buf[7] = 18 - 8;			/* Additional sense length */
+	buf[12] = ASC(sd);
+	buf[13] = ASCQ(sd);
+	return 18;
+}
+
+
+static int do_read_capacity(struct fsg_dev *fsg, struct fsg_buffhd *bh)
+{
+	struct lun	*curlun = fsg->curlun;
+	u32		lba = get_be32(&fsg->cmnd[2]);
+	int		pmi = fsg->cmnd[8];
+	u8		*buf = (u8 *) bh->buf;
+
+	/* Check the PMI and LBA fields */
+	if (pmi > 1 || (pmi == 0 && lba != 0)) {
+		curlun->sense_data = SS_INVALID_FIELD_IN_CDB;
+		return -EINVAL;
+	}
+
+	put_be32(&buf[0], curlun->num_sectors - 1);	/* Max logical block */
+	put_be32(&buf[4], 512);				/* Block length */
+	return 8;
+}
+
+
+static int do_mode_sense(struct fsg_dev *fsg, struct fsg_buffhd *bh)
+{
+	struct lun	*curlun = fsg->curlun;
+	int		mscmnd = fsg->cmnd[0];
+	u8		*buf = (u8 *) bh->buf;
+	u8		*buf0 = buf;
+	int		pc, page_code;
+	int		changeable_values, all_pages;
+	int		valid_page = 0;
+	int		len, limit;
+
+	if ((fsg->cmnd[1] & ~0x08) != 0) {		/* Mask away DBD */
+		curlun->sense_data = SS_INVALID_FIELD_IN_CDB;
+		return -EINVAL;
+	}
+	pc = fsg->cmnd[2] >> 6;
+	page_code = fsg->cmnd[2] & 0x3f;
+	if (pc == 3) {
+		curlun->sense_data = SS_SAVING_PARAMETERS_NOT_SUPPORTED;
+		return -EINVAL;
+	}
+	changeable_values = (pc == 1);
+	all_pages = (page_code == 0x3f);
+
+	/* Write the mode parameter header.  Fixed values are: default
+	 * medium type, no cache control (DPOFUA), and no block descriptors.
+	 * The only variable value is the WriteProtect bit.  We will fill in
+	 * the mode data length later. */
+	memset(buf, 0, 8);
+	if (mscmnd == SC_MODE_SENSE_6) {
+		buf[2] = (curlun->ro ? 0x80 : 0x00);		/* WP, DPOFUA */
+		buf += 4;
+		limit = 255;
+	} else {			/* SC_MODE_SENSE_10 */
+		buf[3] = (curlun->ro ? 0x80 : 0x00);		/* WP, DPOFUA */
+		buf += 8;
+		limit = 65535;
+	}
+
+	/* No block descriptors */
+
+	/* Disabled to workaround USB reset problems with a Vista host.
+	 */
+#if 0
+	/* The mode pages, in numerical order.  The only page we support
+	 * is the Caching page. */
+	if (page_code == 0x08 || all_pages) {
+		valid_page = 1;
+		buf[0] = 0x08;		/* Page code */
+		buf[1] = 10;		/* Page length */
+		memset(buf+2, 0, 10);	/* None of the fields are changeable */
+
+		if (!changeable_values) {
+			buf[2] = 0x04;	/* Write cache enable, */
+					/* Read cache not disabled */
+					/* No cache retention priorities */
+			put_be16(&buf[4], 0xffff);  /* Don't disable prefetch */
+					/* Minimum prefetch = 0 */
+			put_be16(&buf[8], 0xffff);  /* Maximum prefetch */
+			/* Maximum prefetch ceiling */
+			put_be16(&buf[10], 0xffff);
+		}
+		buf += 12;
+	}
+#else
+	valid_page = 1;
+#endif
+
+	/* Check that a valid page was requested and the mode data length
+	 * isn't too long. */
+	len = buf - buf0;
+	if (!valid_page || len > limit) {
+		curlun->sense_data = SS_INVALID_FIELD_IN_CDB;
+		return -EINVAL;
+	}
+
+	/*  Store the mode data length */
+	if (mscmnd == SC_MODE_SENSE_6)
+		buf0[0] = len - 1;
+	else
+		put_be16(buf0, len - 2);
+	return len;
+}
+
+static int do_start_stop(struct fsg_dev *fsg)
+{
+	struct lun	*curlun = fsg->curlun;
+	int		loej, start;
+
+	/* int immed = fsg->cmnd[1] & 0x01; */
+	loej = fsg->cmnd[4] & 0x02;
+	start = fsg->cmnd[4] & 0x01;
+
+	if (loej) {
+		/* eject request from the host */
+		if (backing_file_is_open(curlun)) {
+			close_backing_file(fsg, curlun);
+			curlun->unit_attention_data = SS_MEDIUM_NOT_PRESENT;
+		}
+	}
+
+	return 0;
+}
+
+static int do_prevent_allow(struct fsg_dev *fsg)
+{
+	struct lun	*curlun = fsg->curlun;
+	int		prevent;
+
+	prevent = fsg->cmnd[4] & 0x01;
+	if ((fsg->cmnd[4] & ~0x01) != 0) {		/* Mask away Prevent */
+		curlun->sense_data = SS_INVALID_FIELD_IN_CDB;
+		return -EINVAL;
+	}
+
+	if (curlun->prevent_medium_removal && !prevent)
+		fsync_sub(curlun);
+	curlun->prevent_medium_removal = prevent;
+	return 0;
+}
+
+
+static int do_read_format_capacities(struct fsg_dev *fsg,
+			struct fsg_buffhd *bh)
+{
+	struct lun	*curlun = fsg->curlun;
+	u8		*buf = (u8 *) bh->buf;
+
+	buf[0] = buf[1] = buf[2] = 0;
+	buf[3] = 8;	/* Only the Current/Maximum Capacity Descriptor */
+	buf += 4;
+
+	put_be32(&buf[0], curlun->num_sectors);	/* Number of blocks */
+	put_be32(&buf[4], 512);				/* Block length */
+	buf[4] = 0x02;					/* Current capacity */
+	return 12;
+}
+
+
+static int do_mode_select(struct fsg_dev *fsg, struct fsg_buffhd *bh)
+{
+	struct lun	*curlun = fsg->curlun;
+
+	/* We don't support MODE SELECT */
+	curlun->sense_data = SS_INVALID_COMMAND;
+	return -EINVAL;
+}
+
+
+/*-------------------------------------------------------------------------*/
+#if 0
+static int write_zero(struct fsg_dev *fsg)
+{
+	struct fsg_buffhd	*bh;
+	int			rc;
+
+	DBG(fsg, "write_zero\n");
+	/* Wait for the next buffer to become available */
+	bh = fsg->next_buffhd_to_fill;
+	while (bh->state != BUF_STATE_EMPTY) {
+		rc = sleep_thread(fsg);
+		if (rc)
+			return rc;
+	}
+
+	bh->inreq->length = 0;
+	start_transfer(fsg, fsg->bulk_in, bh->inreq,
+			&bh->inreq_busy, &bh->state);
+
+	fsg->next_buffhd_to_fill = bh->next;
+	return 0;
+}
+#endif
+
+static int throw_away_data(struct fsg_dev *fsg)
+{
+	struct fsg_buffhd	*bh;
+	u32			amount;
+	int			rc;
+
+	DBG(fsg, "throw_away_data\n");
+	while ((bh = fsg->next_buffhd_to_drain)->state != BUF_STATE_EMPTY ||
+			fsg->usb_amount_left > 0) {
+
+		/* Throw away the data in a filled buffer */
+		if (bh->state == BUF_STATE_FULL) {
+			smp_rmb();
+			bh->state = BUF_STATE_EMPTY;
+			fsg->next_buffhd_to_drain = bh->next;
+
+			/* A short packet or an error ends everything */
+			if (bh->outreq->actual != bh->outreq->length ||
+					bh->outreq->status != 0) {
+				raise_exception(fsg, FSG_STATE_ABORT_BULK_OUT);
+				return -EINTR;
+			}
+			continue;
+		}
+
+		/* Try to submit another request if we need one */
+		bh = fsg->next_buffhd_to_fill;
+		if (bh->state == BUF_STATE_EMPTY && fsg->usb_amount_left > 0) {
+			amount = min(fsg->usb_amount_left, (u32) fsg->buf_size);
+
+			/* amount is always divisible by 512, hence by
+			 * the bulk-out maxpacket size */
+			bh->outreq->length = bh->bulk_out_intended_length =
+					amount;
+			start_transfer(fsg, fsg->bulk_out, bh->outreq,
+					&bh->outreq_busy, &bh->state);
+			fsg->next_buffhd_to_fill = bh->next;
+			fsg->usb_amount_left -= amount;
+			continue;
+		}
+
+		/* Otherwise wait for something to happen */
+		rc = sleep_thread(fsg);
+		if (rc)
+			return rc;
+	}
+	return 0;
+}
+
+
+static int finish_reply(struct fsg_dev *fsg)
+{
+	struct fsg_buffhd	*bh = fsg->next_buffhd_to_fill;
+	int			rc = 0;
+
+	switch (fsg->data_dir) {
+	case DATA_DIR_NONE:
+		break;			/* Nothing to send */
+
+	case DATA_DIR_UNKNOWN:
+		rc = -EINVAL;
+		break;
+
+	/* All but the last buffer of data must have already been sent */
+	case DATA_DIR_TO_HOST:
+		if (fsg->data_size == 0)
+			;		/* Nothing to send */
+
+		/* If there's no residue, simply send the last buffer */
+		else if (fsg->residue == 0) {
+			start_transfer(fsg, fsg->bulk_in, bh->inreq,
+					&bh->inreq_busy, &bh->state);
+			fsg->next_buffhd_to_fill = bh->next;
+		} else {
+			start_transfer(fsg, fsg->bulk_in, bh->inreq,
+					&bh->inreq_busy, &bh->state);
+			fsg->next_buffhd_to_fill = bh->next;
+#if 0
+			/* this is unnecessary, and was causing problems with MacOS */
+			if (bh->inreq->length > 0)
+				write_zero(fsg);
+#endif
+		}
+		break;
+
+	/* We have processed all we want from the data the host has sent.
+	 * There may still be outstanding bulk-out requests. */
+	case DATA_DIR_FROM_HOST:
+		if (fsg->residue == 0)
+			;		/* Nothing to receive */
+
+		/* Did the host stop sending unexpectedly early? */
+		else if (fsg->short_packet_received) {
+			raise_exception(fsg, FSG_STATE_ABORT_BULK_OUT);
+			rc = -EINTR;
+		}
+
+		/* We haven't processed all the incoming data.  Even though
+		 * we may be allowed to stall, doing so would cause a race.
+		 * The controller may already have ACK'ed all the remaining
+		 * bulk-out packets, in which case the host wouldn't see a
+		 * STALL.  Not realizing the endpoint was halted, it wouldn't
+		 * clear the halt -- leading to problems later on. */
+#if 0
+		fsg_set_halt(fsg, fsg->bulk_out);
+		raise_exception(fsg, FSG_STATE_ABORT_BULK_OUT);
+		rc = -EINTR;
+#endif
+
+		/* We can't stall.  Read in the excess data and throw it
+		 * all away. */
+		else
+			rc = throw_away_data(fsg);
+		break;
+	}
+	return rc;
+}
+
+
+static int send_status(struct fsg_dev *fsg)
+{
+	struct lun		*curlun = fsg->curlun;
+	struct fsg_buffhd	*bh;
+	int			rc;
+	u8			status = USB_STATUS_PASS;
+	u32			sd, sdinfo = 0;
+	struct bulk_cs_wrap	*csw;
+
+	DBG(fsg, "send_status\n");
+	/* Wait for the next buffer to become available */
+	bh = fsg->next_buffhd_to_fill;
+	while (bh->state != BUF_STATE_EMPTY) {
+		rc = sleep_thread(fsg);
+		if (rc)
+			return rc;
+	}
+
+	if (curlun) {
+		sd = curlun->sense_data;
+		sdinfo = curlun->sense_data_info;
+	} else if (fsg->bad_lun_okay)
+		sd = SS_NO_SENSE;
+	else
+		sd = SS_LOGICAL_UNIT_NOT_SUPPORTED;
+
+	if (fsg->phase_error) {
+		DBG(fsg, "sending phase-error status\n");
+		status = USB_STATUS_PHASE_ERROR;
+		sd = SS_INVALID_COMMAND;
+	} else if (sd != SS_NO_SENSE) {
+		DBG(fsg, "sending command-failure status\n");
+		status = USB_STATUS_FAIL;
+		VDBG(fsg, "  sense data: SK x%02x, ASC x%02x, ASCQ x%02x;"
+				"  info x%x\n",
+				SK(sd), ASC(sd), ASCQ(sd), sdinfo);
+	}
+
+	csw = bh->buf;
+
+	/* Store and send the Bulk-only CSW */
+	csw->Signature = __constant_cpu_to_le32(USB_BULK_CS_SIG);
+	csw->Tag = fsg->tag;
+	csw->Residue = cpu_to_le32(fsg->residue);
+	csw->Status = status;
+
+	bh->inreq->length = USB_BULK_CS_WRAP_LEN;
+	start_transfer(fsg, fsg->bulk_in, bh->inreq,
+			&bh->inreq_busy, &bh->state);
+
+	fsg->next_buffhd_to_fill = bh->next;
+	return 0;
+}
+
+
+/*-------------------------------------------------------------------------*/
+
+/* Check whether the command is properly formed and whether its data size
+ * and direction agree with the values we already have. */
+static int check_command(struct fsg_dev *fsg, int cmnd_size,
+		enum data_direction data_dir, unsigned int mask,
+		int needs_medium, const char *name)
+{
+	int			i;
+	int			lun = fsg->cmnd[1] >> 5;
+	static const char	dirletter[4] = {'u', 'o', 'i', 'n'};
+	char			hdlen[20];
+	struct lun		*curlun;
+
+	hdlen[0] = 0;
+	if (fsg->data_dir != DATA_DIR_UNKNOWN)
+		sprintf(hdlen, ", H%c=%u", dirletter[(int) fsg->data_dir],
+				fsg->data_size);
+	VDBG(fsg, "SCSI command: %s;  Dc=%d, D%c=%u;  Hc=%d%s\n",
+			name, cmnd_size, dirletter[(int) data_dir],
+			fsg->data_size_from_cmnd, fsg->cmnd_size, hdlen);
+
+	/* We can't reply at all until we know the correct data direction
+	 * and size. */
+	if (fsg->data_size_from_cmnd == 0)
+		data_dir = DATA_DIR_NONE;
+	if (fsg->data_dir == DATA_DIR_UNKNOWN) {	/* CB or CBI */
+		fsg->data_dir = data_dir;
+		fsg->data_size = fsg->data_size_from_cmnd;
+
+	} else {					/* Bulk-only */
+		if (fsg->data_size < fsg->data_size_from_cmnd) {
+
+			/* Host data size < Device data size is a phase error.
+			 * Carry out the command, but only transfer as much
+			 * as we are allowed. */
+			DBG(fsg, "phase error 1\n");
+			fsg->data_size_from_cmnd = fsg->data_size;
+			fsg->phase_error = 1;
+		}
+	}
+	fsg->residue = fsg->usb_amount_left = fsg->data_size;
+
+	/* Conflicting data directions is a phase error */
+	if (fsg->data_dir != data_dir && fsg->data_size_from_cmnd > 0) {
+		fsg->phase_error = 1;
+		DBG(fsg, "phase error 2\n");
+		return -EINVAL;
+	}
+
+	/* Verify the length of the command itself */
+	if (cmnd_size != fsg->cmnd_size) {
+
+		/* Special case workaround: MS-Windows issues REQUEST_SENSE
+		 * and INQUIRY commands with cbw->Length == 12 (it should be 6). */
+		if ((fsg->cmnd[0] == SC_REQUEST_SENSE && fsg->cmnd_size == 12)
+		 || (fsg->cmnd[0] == SC_INQUIRY && fsg->cmnd_size == 12))
+			cmnd_size = fsg->cmnd_size;
+		else {
+			fsg->phase_error = 1;
+			return -EINVAL;
+		}
+	}
+
+	/* Check that the LUN values are consistent */
+	if (fsg->lun != lun)
+		DBG(fsg, "using LUN %d from CBW, "
+				"not LUN %d from CDB\n",
+				fsg->lun, lun);
+
+	/* Check the LUN */
+	if (fsg->lun >= 0 && fsg->lun < fsg->nluns) {
+		fsg->curlun = curlun = &fsg->luns[fsg->lun];
+		if (fsg->cmnd[0] != SC_REQUEST_SENSE) {
+			curlun->sense_data = SS_NO_SENSE;
+			curlun->sense_data_info = 0;
+			curlun->info_valid = 0;
+		}
+	} else {
+		fsg->curlun = curlun = NULL;
+		fsg->bad_lun_okay = 0;
+
+		/* INQUIRY and REQUEST SENSE commands are explicitly allowed
+		 * to use unsupported LUNs; all others may not. */
+		if (fsg->cmnd[0] != SC_INQUIRY &&
+				fsg->cmnd[0] != SC_REQUEST_SENSE) {
+			DBG(fsg, "unsupported LUN %d\n", fsg->lun);
+			return -EINVAL;
+		}
+	}
+
+	/* If a unit attention condition exists, only INQUIRY and
+	 * REQUEST SENSE commands are allowed; anything else must fail. */
+	if (curlun && curlun->unit_attention_data != SS_NO_SENSE &&
+			fsg->cmnd[0] != SC_INQUIRY &&
+			fsg->cmnd[0] != SC_REQUEST_SENSE) {
+		curlun->sense_data = curlun->unit_attention_data;
+		curlun->unit_attention_data = SS_NO_SENSE;
+		return -EINVAL;
+	}
+
+	/* Check that only command bytes listed in the mask are non-zero */
+	fsg->cmnd[1] &= 0x1f;			/* Mask away the LUN */
+	for (i = 1; i < cmnd_size; ++i) {
+		if (fsg->cmnd[i] && !(mask & (1 << i))) {
+			if (curlun)
+				curlun->sense_data = SS_INVALID_FIELD_IN_CDB;
+			DBG(fsg, "SS_INVALID_FIELD_IN_CDB\n");
+			return -EINVAL;
+		}
+	}
+
+	/* If the medium isn't mounted and the command needs to access
+	 * it, return an error. */
+	if (curlun && !backing_file_is_open(curlun) && needs_medium) {
+		curlun->sense_data = SS_MEDIUM_NOT_PRESENT;
+		DBG(fsg, "SS_MEDIUM_NOT_PRESENT\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+
+static int do_scsi_command(struct fsg_dev *fsg)
+{
+	struct fsg_buffhd	*bh;
+	int			rc;
+	int			reply = -EINVAL;
+	int			i;
+	static char		unknown[16];
+
+	dump_cdb(fsg);
+
+	/* Wait for the next buffer to become available for data or status */
+	bh = fsg->next_buffhd_to_drain = fsg->next_buffhd_to_fill;
+	while (bh->state != BUF_STATE_EMPTY) {
+		rc = sleep_thread(fsg);
+		if (rc)
+			return rc;
+	}
+	fsg->phase_error = 0;
+	fsg->short_packet_received = 0;
+
+	down_read(&fsg->filesem);	/* We're using the backing file */
+	switch (fsg->cmnd[0]) {
+
+	case SC_INQUIRY:
+		fsg->data_size_from_cmnd = fsg->cmnd[4];
+		if ((reply = check_command(fsg, 6, DATA_DIR_TO_HOST,
+				(1<<4), 0,
+				"INQUIRY")) == 0)
+			reply = do_inquiry(fsg, bh);
+		break;
+
+	case SC_MODE_SELECT_6:
+		fsg->data_size_from_cmnd = fsg->cmnd[4];
+		if ((reply = check_command(fsg, 6, DATA_DIR_FROM_HOST,
+				(1<<1) | (1<<4), 0,
+				"MODE SELECT(6)")) == 0)
+			reply = do_mode_select(fsg, bh);
+		break;
+
+	case SC_MODE_SELECT_10:
+		fsg->data_size_from_cmnd = get_be16(&fsg->cmnd[7]);
+		if ((reply = check_command(fsg, 10, DATA_DIR_FROM_HOST,
+				(1<<1) | (3<<7), 0,
+				"MODE SELECT(10)")) == 0)
+			reply = do_mode_select(fsg, bh);
+		break;
+
+	case SC_MODE_SENSE_6:
+		fsg->data_size_from_cmnd = fsg->cmnd[4];
+		if ((reply = check_command(fsg, 6, DATA_DIR_TO_HOST,
+				(1<<1) | (1<<2) | (1<<4), 0,
+				"MODE SENSE(6)")) == 0)
+			reply = do_mode_sense(fsg, bh);
+		break;
+
+	case SC_MODE_SENSE_10:
+		fsg->data_size_from_cmnd = get_be16(&fsg->cmnd[7]);
+		if ((reply = check_command(fsg, 10, DATA_DIR_TO_HOST,
+				(1<<1) | (1<<2) | (3<<7), 0,
+				"MODE SENSE(10)")) == 0)
+			reply = do_mode_sense(fsg, bh);
+		break;
+
+	case SC_PREVENT_ALLOW_MEDIUM_REMOVAL:
+		fsg->data_size_from_cmnd = 0;
+		if ((reply = check_command(fsg, 6, DATA_DIR_NONE,
+				(1<<4), 0,
+				"PREVENT-ALLOW MEDIUM REMOVAL")) == 0)
+			reply = do_prevent_allow(fsg);
+		break;
+
+	case SC_READ_6:
+		i = fsg->cmnd[4];
+		fsg->data_size_from_cmnd = (i == 0 ? 256 : i) << 9;
+		if ((reply = check_command(fsg, 6, DATA_DIR_TO_HOST,
+				(7<<1) | (1<<4), 1,
+				"READ(6)")) == 0)
+			reply = do_read(fsg);
+		break;
+
+	case SC_READ_10:
+		fsg->data_size_from_cmnd = get_be16(&fsg->cmnd[7]) << 9;
+		if ((reply = check_command(fsg, 10, DATA_DIR_TO_HOST,
+				(1<<1) | (0xf<<2) | (3<<7), 1,
+				"READ(10)")) == 0)
+			reply = do_read(fsg);
+		break;
+
+	case SC_READ_12:
+		fsg->data_size_from_cmnd = get_be32(&fsg->cmnd[6]) << 9;
+		if ((reply = check_command(fsg, 12, DATA_DIR_TO_HOST,
+				(1<<1) | (0xf<<2) | (0xf<<6), 1,
+				"READ(12)")) == 0)
+			reply = do_read(fsg);
+		break;
+
+	case SC_READ_CAPACITY:
+		fsg->data_size_from_cmnd = 8;
+		if ((reply = check_command(fsg, 10, DATA_DIR_TO_HOST,
+				(0xf<<2) | (1<<8), 1,
+				"READ CAPACITY")) == 0)
+			reply = do_read_capacity(fsg, bh);
+		break;
+
+	case SC_READ_FORMAT_CAPACITIES:
+		fsg->data_size_from_cmnd = get_be16(&fsg->cmnd[7]);
+		if ((reply = check_command(fsg, 10, DATA_DIR_TO_HOST,
+				(3<<7), 1,
+				"READ FORMAT CAPACITIES")) == 0)
+			reply = do_read_format_capacities(fsg, bh);
+		break;
+
+	case SC_REQUEST_SENSE:
+		fsg->data_size_from_cmnd = fsg->cmnd[4];
+		if ((reply = check_command(fsg, 6, DATA_DIR_TO_HOST,
+				(1<<4), 0,
+				"REQUEST SENSE")) == 0)
+			reply = do_request_sense(fsg, bh);
+		break;
+
+	case SC_START_STOP_UNIT:
+		fsg->data_size_from_cmnd = 0;
+		if ((reply = check_command(fsg, 6, DATA_DIR_NONE,
+				(1<<1) | (1<<4), 0,
+				"START-STOP UNIT")) == 0)
+			reply = do_start_stop(fsg);
+		break;
+
+	case SC_SYNCHRONIZE_CACHE:
+		fsg->data_size_from_cmnd = 0;
+		if ((reply = check_command(fsg, 10, DATA_DIR_NONE,
+				(0xf<<2) | (3<<7), 1,
+				"SYNCHRONIZE CACHE")) == 0)
+			reply = do_synchronize_cache(fsg);
+		break;
+
+	case SC_TEST_UNIT_READY:
+		fsg->data_size_from_cmnd = 0;
+		reply = check_command(fsg, 6, DATA_DIR_NONE,
+				0, 1,
+				"TEST UNIT READY");
+		break;
+
+	/* Although optional, this command is used by MS-Windows.  We
+	 * support a minimal version: BytChk must be 0. */
+	case SC_VERIFY:
+		fsg->data_size_from_cmnd = 0;
+		if ((reply = check_command(fsg, 10, DATA_DIR_NONE,
+				(1<<1) | (0xf<<2) | (3<<7), 1,
+				"VERIFY")) == 0)
+			reply = do_verify(fsg);
+		break;
+
+	case SC_WRITE_6:
+		i = fsg->cmnd[4];
+		fsg->data_size_from_cmnd = (i == 0 ? 256 : i) << 9;
+		if ((reply = check_command(fsg, 6, DATA_DIR_FROM_HOST,
+				(7<<1) | (1<<4), 1,
+				"WRITE(6)")) == 0)
+			reply = do_write(fsg);
+		break;
+
+	case SC_WRITE_10:
+		fsg->data_size_from_cmnd = get_be16(&fsg->cmnd[7]) << 9;
+		if ((reply = check_command(fsg, 10, DATA_DIR_FROM_HOST,
+				(1<<1) | (0xf<<2) | (3<<7), 1,
+				"WRITE(10)")) == 0)
+			reply = do_write(fsg);
+		break;
+
+	case SC_WRITE_12:
+		fsg->data_size_from_cmnd = get_be32(&fsg->cmnd[6]) << 9;
+		if ((reply = check_command(fsg, 12, DATA_DIR_FROM_HOST,
+				(1<<1) | (0xf<<2) | (0xf<<6), 1,
+				"WRITE(12)")) == 0)
+			reply = do_write(fsg);
+		break;
+
+	/* Some mandatory commands that we recognize but don't implement.
+	 * They don't mean much in this setting.  It's left as an exercise
+	 * for anyone interested to implement RESERVE and RELEASE in terms
+	 * of Posix locks. */
+	case SC_FORMAT_UNIT:
+	case SC_RELEASE:
+	case SC_RESERVE:
+	case SC_SEND_DIAGNOSTIC:
+		/* Fall through */
+
+	default:
+		fsg->data_size_from_cmnd = 0;
+		sprintf(unknown, "Unknown x%02x", fsg->cmnd[0]);
+		if ((reply = check_command(fsg, fsg->cmnd_size,
+				DATA_DIR_UNKNOWN, 0xff, 0, unknown)) == 0) {
+			fsg->curlun->sense_data = SS_INVALID_COMMAND;
+			reply = -EINVAL;
+		}
+		break;
+	}
+	up_read(&fsg->filesem);
+
+	VDBG(fsg, "reply: %d, fsg->data_size_from_cmnd: %d\n",
+			reply, fsg->data_size_from_cmnd);
+	if (reply == -EINTR || signal_pending(current))
+		return -EINTR;
+
+	/* Set up the single reply buffer for finish_reply() */
+	if (reply == -EINVAL)
+		reply = 0;		/* Error reply length */
+	if (reply >= 0 && fsg->data_dir == DATA_DIR_TO_HOST) {
+		reply = min((u32) reply, fsg->data_size_from_cmnd);
+		bh->inreq->length = reply;
+		bh->state = BUF_STATE_FULL;
+		fsg->residue -= reply;
+	}				/* Otherwise it's already set */
+
+	return 0;
+}
+
+
+/*-------------------------------------------------------------------------*/
+
+static int received_cbw(struct fsg_dev *fsg, struct fsg_buffhd *bh)
+{
+	struct usb_request	*req = bh->outreq;
+	struct bulk_cb_wrap	*cbw = req->buf;
+
+	/* Was this a real packet? */
+	if (req->status)
+		return -EINVAL;
+
+	/* Is the CBW valid? */
+	if (req->actual != USB_BULK_CB_WRAP_LEN ||
+			cbw->Signature != __constant_cpu_to_le32(
+				USB_BULK_CB_SIG)) {
+		DBG(fsg, "invalid CBW: len %u sig 0x%x\n",
+				req->actual,
+				le32_to_cpu(cbw->Signature));
+		return -EINVAL;
+	}
+
+	/* Is the CBW meaningful? */
+	if (cbw->Lun >= MAX_LUNS || cbw->Flags & ~USB_BULK_IN_FLAG ||
+			cbw->Length <= 0 || cbw->Length > MAX_COMMAND_SIZE) {
+		DBG(fsg, "non-meaningful CBW: lun = %u, flags = 0x%x, "
+				"cmdlen %u\n",
+				cbw->Lun, cbw->Flags, cbw->Length);
+		return -EINVAL;
+	}
+
+	/* Save the command for later */
+	fsg->cmnd_size = cbw->Length;
+	memcpy(fsg->cmnd, cbw->CDB, fsg->cmnd_size);
+	if (cbw->Flags & USB_BULK_IN_FLAG)
+		fsg->data_dir = DATA_DIR_TO_HOST;
+	else
+		fsg->data_dir = DATA_DIR_FROM_HOST;
+	fsg->data_size = le32_to_cpu(cbw->DataTransferLength);
+	if (fsg->data_size == 0)
+		fsg->data_dir = DATA_DIR_NONE;
+	fsg->lun = cbw->Lun;
+	fsg->tag = cbw->Tag;
+	return 0;
+}
+
+
+static int get_next_command(struct fsg_dev *fsg)
+{
+	struct fsg_buffhd	*bh;
+	int			rc = 0;
+
+	/* Wait for the next buffer to become available */
+	bh = fsg->next_buffhd_to_fill;
+	while (bh->state != BUF_STATE_EMPTY) {
+		rc = sleep_thread(fsg);
+		if (rc) {
+			usb_ep_dequeue(fsg->bulk_out, bh->outreq);
+			bh->outreq_busy = 0;
+			bh->state = BUF_STATE_EMPTY;
+			return rc;
+		}
+	}
+
+	/* Queue a request to read a Bulk-only CBW */
+	set_bulk_out_req_length(fsg, bh, USB_BULK_CB_WRAP_LEN);
+	start_transfer(fsg, fsg->bulk_out, bh->outreq,
+			&bh->outreq_busy, &bh->state);
+
+	/* We will drain the buffer in software, which means we
+	 * can reuse it for the next filling.  No need to advance
+	 * next_buffhd_to_fill. */
+
+	/* Wait for the CBW to arrive */
+	while (bh->state != BUF_STATE_FULL) {
+		rc = sleep_thread(fsg);
+		if (rc) {
+			usb_ep_dequeue(fsg->bulk_out, bh->outreq);
+			bh->outreq_busy = 0;
+			bh->state = BUF_STATE_EMPTY;
+			return rc;
+		}
+	}
+	smp_rmb();
+	rc = received_cbw(fsg, bh);
+	bh->state = BUF_STATE_EMPTY;
+
+	return rc;
+}
+
+
+/*-------------------------------------------------------------------------*/
+
+static int enable_endpoint(struct fsg_dev *fsg, struct usb_ep *ep,
+		const struct usb_endpoint_descriptor *d)
+{
+	int	rc;
+
+	DBG(fsg, "usb_ep_enable %s\n", ep->name);
+	ep->driver_data = fsg;
+	rc = usb_ep_enable(ep, d);
+	if (rc)
+		ERROR(fsg, "can't enable %s, result %d\n", ep->name, rc);
+	return rc;
+}
+
+static int alloc_request(struct fsg_dev *fsg, struct usb_ep *ep,
+		struct usb_request **preq)
+{
+	*preq = usb_ep_alloc_request(ep, GFP_ATOMIC);
+	if (*preq)
+		return 0;
+	ERROR(fsg, "can't allocate request for %s\n", ep->name);
+	return -ENOMEM;
+}
+
+/*
+ * Reset interface setting and re-init endpoint state (toggle etc).
+ * Call with altsetting < 0 to disable the interface.  The only other
+ * available altsetting is 0, which enables the interface.
+ */
+static int do_set_interface(struct fsg_dev *fsg, int altsetting)
+{
+	struct usb_composite_dev *cdev = fsg->cdev;
+	int	rc = 0;
+	int	i;
+	const struct usb_endpoint_descriptor	*d;
+
+	if (fsg->running)
+		DBG(fsg, "reset interface\n");
+reset:
+	 /* Disable the endpoints */
+	if (fsg->bulk_in_enabled) {
+		DBG(fsg, "usb_ep_disable %s\n", fsg->bulk_in->name);
+		usb_ep_disable(fsg->bulk_in);
+		fsg->bulk_in_enabled = 0;
+	}
+	if (fsg->bulk_out_enabled) {
+		DBG(fsg, "usb_ep_disable %s\n", fsg->bulk_out->name);
+		usb_ep_disable(fsg->bulk_out);
+		fsg->bulk_out_enabled = 0;
+	}
+
+	/* Deallocate the requests */
+	for (i = 0; i < NUM_BUFFERS; ++i) {
+		struct fsg_buffhd *bh = &fsg->buffhds[i];
+		if (bh->inreq) {
+			usb_ep_free_request(fsg->bulk_in, bh->inreq);
+			bh->inreq = NULL;
+		}
+		if (bh->outreq) {
+			usb_ep_free_request(fsg->bulk_out, bh->outreq);
+			bh->outreq = NULL;
+		}
+	}
+
+
+	fsg->running = 0;
+	if (altsetting < 0 || rc != 0)
+		return rc;
+
+	DBG(fsg, "set interface %d\n", altsetting);
+
+	/* Enable the endpoints */
+	d = ep_desc(cdev->gadget, &fs_bulk_in_desc, &hs_bulk_in_desc);
+	if ((rc = enable_endpoint(fsg, fsg->bulk_in, d)) != 0)
+		goto reset;
+	fsg->bulk_in_enabled = 1;
+
+	d = ep_desc(cdev->gadget, &fs_bulk_out_desc, &hs_bulk_out_desc);
+	if ((rc = enable_endpoint(fsg, fsg->bulk_out, d)) != 0)
+		goto reset;
+	fsg->bulk_out_enabled = 1;
+	fsg->bulk_out_maxpacket = le16_to_cpu(d->wMaxPacketSize);
+
+	/* Allocate the requests */
+	for (i = 0; i < NUM_BUFFERS; ++i) {
+		struct fsg_buffhd	*bh = &fsg->buffhds[i];
+
+		rc = alloc_request(fsg, fsg->bulk_in, &bh->inreq);
+		if (rc != 0)
+			goto reset;
+		rc = alloc_request(fsg, fsg->bulk_out, &bh->outreq);
+		if (rc != 0)
+			goto reset;
+		bh->inreq->buf = bh->outreq->buf = bh->buf;
+		bh->inreq->context = bh->outreq->context = bh;
+		bh->inreq->complete = bulk_in_complete;
+		bh->outreq->complete = bulk_out_complete;
+	}
+
+	fsg->running = 1;
+	for (i = 0; i < fsg->nluns; ++i)
+		fsg->luns[i].unit_attention_data = SS_RESET_OCCURRED;
+
+	return rc;
+}
+
+static void adjust_wake_lock(struct fsg_dev *fsg)
+{
+	int ums_active = 0;
+	int i;
+
+	spin_lock_irq(&fsg->lock);
+
+	if (fsg->config) {
+		for (i = 0; i < fsg->nluns; ++i) {
+			if (backing_file_is_open(&fsg->luns[i]))
+				ums_active = 1;
+		}
+	}
+
+	if (ums_active)
+		wake_lock(&fsg->wake_lock);
+	else
+		wake_unlock(&fsg->wake_lock);
+
+	spin_unlock_irq(&fsg->lock);
+}
+
+/*
+ * Change our operational configuration.  This code must agree with the code
+ * that returns config descriptors, and with interface altsetting code.
+ *
+ * It's also responsible for power management interactions.  Some
+ * configurations might not work with our current power sources.
+ * For now we just assume the gadget is always self-powered.
+ */
+static int do_set_config(struct fsg_dev *fsg, u8 new_config)
+{
+	int	rc = 0;
+
+	if (new_config == fsg->config)
+		return rc;
+
+	/* Disable the single interface */
+	if (fsg->config != 0) {
+		DBG(fsg, "reset config\n");
+		fsg->config = 0;
+	}
+
+	/* Enable the interface */
+	if (new_config != 0)
+		fsg->config = new_config;
+
+	switch_set_state(&fsg->sdev, new_config);
+	adjust_wake_lock(fsg);
+	return rc;
+}
+
+
+/*-------------------------------------------------------------------------*/
+
+static void handle_exception(struct fsg_dev *fsg)
+{
+	siginfo_t		info;
+	int			sig;
+	int			i;
+	struct fsg_buffhd	*bh;
+	enum fsg_state		old_state;
+	u8			new_config;
+	struct lun		*curlun;
+	int			rc;
+
+	DBG(fsg, "handle_exception state: %d\n", (int)fsg->state);
+	/* Clear the existing signals.  Anything but SIGUSR1 is converted
+	 * into a high-priority EXIT exception. */
+	for (;;) {
+		sig = dequeue_signal_lock(current, &current->blocked, &info);
+		if (!sig)
+			break;
+		if (sig != SIGUSR1) {
+			if (fsg->state < FSG_STATE_EXIT)
+				DBG(fsg, "Main thread exiting on signal\n");
+			raise_exception(fsg, FSG_STATE_EXIT);
+		}
+	}
+
+	/*
+	* Do NOT flush the fifo after set_interface()
+	* Otherwise, it results in some data being lost
+	*/
+	if ((fsg->state != FSG_STATE_CONFIG_CHANGE) ||
+		(fsg->new_config != 1))   {
+		/* Clear out the controller's fifos */
+		if (fsg->bulk_in_enabled)
+			usb_ep_fifo_flush(fsg->bulk_in);
+		if (fsg->bulk_out_enabled)
+			usb_ep_fifo_flush(fsg->bulk_out);
+	}
+	/* Reset the I/O buffer states and pointers, the SCSI
+	 * state, and the exception.  Then invoke the handler. */
+	spin_lock_irq(&fsg->lock);
+
+	for (i = 0; i < NUM_BUFFERS; ++i) {
+		bh = &fsg->buffhds[i];
+		bh->state = BUF_STATE_EMPTY;
+	}
+	fsg->next_buffhd_to_fill = fsg->next_buffhd_to_drain =
+			&fsg->buffhds[0];
+
+	new_config = fsg->new_config;
+	old_state = fsg->state;
+
+	if (old_state == FSG_STATE_ABORT_BULK_OUT)
+		fsg->state = FSG_STATE_STATUS_PHASE;
+	else {
+		for (i = 0; i < fsg->nluns; ++i) {
+			curlun = &fsg->luns[i];
+			curlun->prevent_medium_removal = 0;
+			curlun->sense_data = curlun->unit_attention_data =
+					SS_NO_SENSE;
+			curlun->sense_data_info = 0;
+			curlun->info_valid = 0;
+		}
+		fsg->state = FSG_STATE_IDLE;
+	}
+	spin_unlock_irq(&fsg->lock);
+
+	/* Carry out any extra actions required for the exception */
+	switch (old_state) {
+	default:
+		break;
+
+	case FSG_STATE_ABORT_BULK_OUT:
+		DBG(fsg, "FSG_STATE_ABORT_BULK_OUT\n");
+		spin_lock_irq(&fsg->lock);
+		if (fsg->state == FSG_STATE_STATUS_PHASE)
+			fsg->state = FSG_STATE_IDLE;
+		spin_unlock_irq(&fsg->lock);
+		break;
+
+	case FSG_STATE_RESET:
+		/* really not much to do here */
+		break;
+
+	case FSG_STATE_CONFIG_CHANGE:
+		rc = do_set_config(fsg, new_config);
+		if (new_config == 0) {
+			/* We're using the backing file */
+			down_read(&fsg->filesem);
+			fsync_all(fsg);
+			up_read(&fsg->filesem);
+		}
+		break;
+
+	case FSG_STATE_EXIT:
+	case FSG_STATE_TERMINATED:
+		if (new_config)  {
+			fsg->new_config = 0;
+			do_set_interface(fsg, -1);
+		}
+		do_set_config(fsg, 0);			/* Free resources */
+		spin_lock_irq(&fsg->lock);
+		fsg->state = FSG_STATE_TERMINATED;	/* Stop the thread */
+		spin_unlock_irq(&fsg->lock);
+		break;
+	}
+}
+
+
+/*-------------------------------------------------------------------------*/
+
+static int fsg_main_thread(void *fsg_)
+{
+	struct fsg_dev		*fsg = fsg_;
+
+	/* Allow the thread to be killed by a signal, but set the signal mask
+	 * to block everything but INT, TERM, KILL, and USR1. */
+	allow_signal(SIGINT);
+	allow_signal(SIGTERM);
+	allow_signal(SIGKILL);
+	allow_signal(SIGUSR1);
+
+	/* Allow the thread to be frozen */
+	set_freezable();
+
+	/* Arrange for userspace references to be interpreted as kernel
+	 * pointers.  That way we can pass a kernel pointer to a routine
+	 * that expects a __user pointer and it will work okay. */
+	set_fs(get_ds());
+
+	/* The main loop */
+	while (fsg->state != FSG_STATE_TERMINATED) {
+		if (exception_in_progress(fsg) || signal_pending(current)) {
+			handle_exception(fsg);
+			continue;
+		}
+
+		if (!fsg->running) {
+			sleep_thread(fsg);
+			continue;
+		}
+
+		if (get_next_command(fsg))
+			continue;
+
+		spin_lock_irq(&fsg->lock);
+		if (!exception_in_progress(fsg))
+			fsg->state = FSG_STATE_DATA_PHASE;
+		spin_unlock_irq(&fsg->lock);
+
+		if (do_scsi_command(fsg) || finish_reply(fsg))
+			continue;
+
+		spin_lock_irq(&fsg->lock);
+		if (!exception_in_progress(fsg))
+			fsg->state = FSG_STATE_STATUS_PHASE;
+		spin_unlock_irq(&fsg->lock);
+
+		if (send_status(fsg))
+			continue;
+
+		spin_lock_irq(&fsg->lock);
+		if (!exception_in_progress(fsg))
+			fsg->state = FSG_STATE_IDLE;
+		spin_unlock_irq(&fsg->lock);
+		}
+
+	spin_lock_irq(&fsg->lock);
+	fsg->thread_task = NULL;
+	spin_unlock_irq(&fsg->lock);
+
+	/* In case we are exiting because of a signal, unregister the
+	 * gadget driver and close the backing file. */
+	if (test_and_clear_bit(REGISTERED, &fsg->atomic_bitflags))
+		close_all_backing_files(fsg);
+
+	/* Let the unbind and cleanup routines know the thread has exited */
+	complete_and_exit(&fsg->thread_notifier, 0);
+}
+
+
+/*-------------------------------------------------------------------------*/
+
+/* If the next two routines are called while the gadget is registered,
+ * the caller must own fsg->filesem for writing. */
+
+static int open_backing_file(struct fsg_dev *fsg, struct lun *curlun,
+	const char *filename)
+{
+	int				ro;
+	struct file			*filp = NULL;
+	int				rc = -EINVAL;
+	struct inode			*inode = NULL;
+	loff_t				size;
+	loff_t				num_sectors;
+
+	/* R/W if we can, R/O if we must */
+	ro = curlun->ro;
+	if (!ro) {
+		filp = filp_open(filename, O_RDWR | O_LARGEFILE, 0);
+		if (-EROFS == PTR_ERR(filp))
+			ro = 1;
+	}
+	if (ro)
+		filp = filp_open(filename, O_RDONLY | O_LARGEFILE, 0);
+	if (IS_ERR(filp)) {
+		LINFO(curlun, "unable to open backing file: %s\n", filename);
+		return PTR_ERR(filp);
+	}
+
+	if (!(filp->f_mode & FMODE_WRITE))
+		ro = 1;
+
+	if (filp->f_path.dentry)
+		inode = filp->f_path.dentry->d_inode;
+	if (inode && S_ISBLK(inode->i_mode)) {
+		if (bdev_read_only(inode->i_bdev))
+			ro = 1;
+	} else if (!inode || !S_ISREG(inode->i_mode)) {
+		LINFO(curlun, "invalid file type: %s\n", filename);
+		goto out;
+	}
+
+	/* If we can't read the file, it's no good.
+	 * If we can't write the file, use it read-only. */
+	if (!filp->f_op || !(filp->f_op->read || filp->f_op->aio_read)) {
+		LINFO(curlun, "file not readable: %s\n", filename);
+		goto out;
+	}
+	if (!(filp->f_op->write || filp->f_op->aio_write))
+		ro = 1;
+
+	size = i_size_read(inode->i_mapping->host);
+	if (size < 0) {
+		LINFO(curlun, "unable to find file size: %s\n", filename);
+		rc = (int) size;
+		goto out;
+	}
+	num_sectors = size >> 9;	/* File size in 512-byte sectors */
+	if (num_sectors == 0) {
+		LINFO(curlun, "file too small: %s\n", filename);
+		rc = -ETOOSMALL;
+		goto out;
+	}
+
+	get_file(filp);
+	curlun->ro = ro;
+	curlun->filp = filp;
+	curlun->file_length = size;
+	curlun->num_sectors = num_sectors;
+	LDBG(curlun, "open backing file: %s size: %lld num_sectors: %lld\n",
+			filename, size, num_sectors);
+	rc = 0;
+	adjust_wake_lock(fsg);
+
+out:
+	filp_close(filp, current->files);
+	return rc;
+}
+
+
+static void close_backing_file(struct fsg_dev *fsg, struct lun *curlun)
+{
+	if (curlun->filp) {
+		int rc;
+
+		/*
+		 * XXX: San: Ugly hack here added to ensure that
+		 * our pages get synced to disk.
+		 * Also drop caches here just to be extra-safe
+		 */
+		rc = vfs_fsync(curlun->filp, curlun->filp->f_path.dentry, 1);
+		if (rc < 0)
+			printk(KERN_ERR "ums: Error syncing data (%d)\n", rc);
+		/* drop_pagecache and drop_slab are no longer available */
+		/* drop_pagecache(); */
+		/* drop_slab(); */
+
+		LDBG(curlun, "close backing file\n");
+		fput(curlun->filp);
+		curlun->filp = NULL;
+		adjust_wake_lock(fsg);
+	}
+}
+
+static void close_all_backing_files(struct fsg_dev *fsg)
+{
+	int	i;
+
+	for (i = 0; i < fsg->nluns; ++i)
+		close_backing_file(fsg, &fsg->luns[i]);
+}
+
+static ssize_t show_file(struct device *dev, struct device_attribute *attr,
+		char *buf)
+{
+	struct lun	*curlun = dev_to_lun(dev);
+	struct fsg_dev	*fsg = dev_get_drvdata(dev);
+	char		*p;
+	ssize_t		rc;
+
+	down_read(&fsg->filesem);
+	if (backing_file_is_open(curlun)) {	/* Get the complete pathname */
+		p = d_path(&curlun->filp->f_path, buf, PAGE_SIZE - 1);
+		if (IS_ERR(p))
+			rc = PTR_ERR(p);
+		else {
+			rc = strlen(p);
+			memmove(buf, p, rc);
+			buf[rc] = '\n';		/* Add a newline */
+			buf[++rc] = 0;
+		}
+	} else {				/* No file, return 0 bytes */
+		*buf = 0;
+		rc = 0;
+	}
+	up_read(&fsg->filesem);
+	return rc;
+}
+
+static ssize_t store_file(struct device *dev, struct device_attribute *attr,
+		const char *buf, size_t count)
+{
+	struct lun	*curlun = dev_to_lun(dev);
+	struct fsg_dev	*fsg = dev_get_drvdata(dev);
+	int		rc = 0;
+
+	DBG(fsg, "store_file: \"%s\"\n", buf);
+#if 0
+	/* disabled because we need to allow closing the backing file if the media was removed */
+	if (curlun->prevent_medium_removal && backing_file_is_open(curlun)) {
+		LDBG(curlun, "eject attempt prevented\n");
+		return -EBUSY;				/* "Door is locked" */
+	}
+#endif
+
+	/* Remove a trailing newline */
+	if (count > 0 && buf[count-1] == '\n')
+		((char *) buf)[count-1] = 0;
+
+	/* Eject current medium */
+	down_write(&fsg->filesem);
+	if (backing_file_is_open(curlun)) {
+		close_backing_file(fsg, curlun);
+		curlun->unit_attention_data = SS_MEDIUM_NOT_PRESENT;
+	}
+
+	/* Load new medium */
+	if (count > 0 && buf[0]) {
+		rc = open_backing_file(fsg, curlun, buf);
+		if (rc == 0)
+			curlun->unit_attention_data =
+					SS_NOT_READY_TO_READY_TRANSITION;
+	}
+	up_write(&fsg->filesem);
+	return (rc < 0 ? rc : count);
+}
+
+
+static DEVICE_ATTR(file, 0444, show_file, store_file);
+
+/*-------------------------------------------------------------------------*/
+
+static void fsg_release(struct kref *ref)
+{
+	struct fsg_dev	*fsg = container_of(ref, struct fsg_dev, ref);
+
+	kfree(fsg->luns);
+	kfree(fsg);
+}
+
+static void lun_release(struct device *dev)
+{
+	struct fsg_dev	*fsg = dev_get_drvdata(dev);
+
+	kref_put(&fsg->ref, fsg_release);
+}
+
+
+/*-------------------------------------------------------------------------*/
+
+static int __init fsg_alloc(void)
+{
+	struct fsg_dev		*fsg;
+
+	fsg = kzalloc(sizeof *fsg, GFP_KERNEL);
+	if (!fsg)
+		return -ENOMEM;
+	spin_lock_init(&fsg->lock);
+	init_rwsem(&fsg->filesem);
+	kref_init(&fsg->ref);
+	init_completion(&fsg->thread_notifier);
+
+	the_fsg = fsg;
+	return 0;
+}
+
+static ssize_t print_switch_name(struct switch_dev *sdev, char *buf)
+{
+	return sprintf(buf, "%s\n", DRIVER_NAME);
+}
+
+static ssize_t print_switch_state(struct switch_dev *sdev, char *buf)
+{
+	struct fsg_dev	*fsg = container_of(sdev, struct fsg_dev, sdev);
+	return sprintf(buf, "%s\n", (fsg->config ? "online" : "offline"));
+}
+
+static void
+fsg_function_unbind(struct usb_configuration *c, struct usb_function *f)
+{
+	struct fsg_dev	*fsg = func_to_dev(f);
+	int			i;
+	struct lun		*curlun;
+
+	DBG(fsg, "fsg_function_unbind\n");
+	clear_bit(REGISTERED, &fsg->atomic_bitflags);
+
+	/* Unregister the sysfs attribute files and the LUNs */
+	for (i = 0; i < fsg->nluns; ++i) {
+		curlun = &fsg->luns[i];
+		if (curlun->registered) {
+			device_remove_file(&curlun->dev, &dev_attr_file);
+			device_unregister(&curlun->dev);
+			curlun->registered = 0;
+		}
+	}
+
+	/* If the thread isn't already dead, tell it to exit now */
+	if (fsg->state != FSG_STATE_TERMINATED) {
+		raise_exception(fsg, FSG_STATE_EXIT);
+		wait_for_completion(&fsg->thread_notifier);
+
+		/* The cleanup routine waits for this completion also */
+		complete(&fsg->thread_notifier);
+	}
+
+	/* Free the data buffers */
+	for (i = 0; i < NUM_BUFFERS; ++i)
+		kfree(fsg->buffhds[i].buf);
+	switch_dev_unregister(&fsg->sdev);
+}
+
+static int
+fsg_function_bind(struct usb_configuration *c, struct usb_function *f)
+{
+	struct usb_composite_dev *cdev = c->cdev;
+	struct fsg_dev	*fsg = func_to_dev(f);
+	int			rc;
+	int			i;
+	int			id;
+	struct lun		*curlun;
+	struct usb_ep		*ep;
+	char			*pathbuf, *p;
+
+	fsg->cdev = cdev;
+	DBG(fsg, "fsg_function_bind\n");
+
+	dev_attr_file.attr.mode = 0644;
+
+	/* Find out how many LUNs there should be */
+	i = fsg->nluns;
+	if (i == 0)
+		i = 1;
+	if (i > MAX_LUNS) {
+		ERROR(fsg, "invalid number of LUNs: %d\n", i);
+		rc = -EINVAL;
+		goto out;
+	}
+
+	/* Create the LUNs, open their backing files, and register the
+	 * LUN devices in sysfs. */
+	fsg->luns = kzalloc(i * sizeof(struct lun), GFP_KERNEL);
+	if (!fsg->luns) {
+		rc = -ENOMEM;
+		goto out;
+	}
+	fsg->nluns = i;
+
+	for (i = 0; i < fsg->nluns; ++i) {
+		curlun = &fsg->luns[i];
+		curlun->ro = 0;
+		curlun->dev.release = lun_release;
+		/* use "usb_mass_storage" platform device as parent if available */
+		if (fsg->pdev)
+			curlun->dev.parent = &fsg->pdev->dev;
+		else
+			curlun->dev.parent = &cdev->gadget->dev;
+		dev_set_drvdata(&curlun->dev, fsg);
+		dev_set_name(&curlun->dev,"lun%d", i);
+
+		rc = device_register(&curlun->dev);
+		if (rc != 0) {
+			INFO(fsg, "failed to register LUN%d: %d\n", i, rc);
+			goto out;
+		}
+		rc = device_create_file(&curlun->dev, &dev_attr_file);
+		if (rc != 0) {
+			ERROR(fsg, "device_create_file failed: %d\n", rc);
+			device_unregister(&curlun->dev);
+			goto out;
+		}
+		curlun->registered = 1;
+		kref_get(&fsg->ref);
+	}
+
+	/* allocate interface ID(s) */
+	id = usb_interface_id(c, f);
+	if (id < 0)
+		return id;
+	intf_desc.bInterfaceNumber = id;
+
+	ep = usb_ep_autoconfig(cdev->gadget, &fs_bulk_in_desc);
+	if (!ep)
+		goto autoconf_fail;
+	ep->driver_data = fsg;		/* claim the endpoint */
+	fsg->bulk_in = ep;
+
+	ep = usb_ep_autoconfig(cdev->gadget, &fs_bulk_out_desc);
+	if (!ep)
+		goto autoconf_fail;
+	ep->driver_data = fsg;		/* claim the endpoint */
+	fsg->bulk_out = ep;
+
+	rc = -ENOMEM;
+
+	if (gadget_is_dualspeed(cdev->gadget)) {
+		/* Assume endpoint addresses are the same for both speeds */
+		hs_bulk_in_desc.bEndpointAddress =
+				fs_bulk_in_desc.bEndpointAddress;
+		hs_bulk_out_desc.bEndpointAddress =
+				fs_bulk_out_desc.bEndpointAddress;
+
+		f->hs_descriptors = hs_function;
+	}
+
+	/* Allocate the data buffers */
+	for (i = 0; i < NUM_BUFFERS; ++i) {
+		struct fsg_buffhd	*bh = &fsg->buffhds[i];
+
+		/* Allocate for the bulk-in endpoint.  We assume that
+		 * the buffer will also work with the bulk-out (and
+		 * interrupt-in) endpoint. */
+		bh->buf = kmalloc(fsg->buf_size, GFP_KERNEL);
+		if (!bh->buf)
+			goto out;
+		bh->next = bh + 1;
+	}
+	fsg->buffhds[NUM_BUFFERS - 1].next = &fsg->buffhds[0];
+
+	fsg->thread_task = kthread_create(fsg_main_thread, fsg,
+			shortname);
+	if (IS_ERR(fsg->thread_task)) {
+		rc = PTR_ERR(fsg->thread_task);
+		ERROR(fsg, "kthread_create failed: %d\n", rc);
+		goto out;
+	}
+
+	INFO(fsg, "Number of LUNs=%d\n", fsg->nluns);
+
+	pathbuf = kmalloc(PATH_MAX, GFP_KERNEL);
+	for (i = 0; i < fsg->nluns; ++i) {
+		curlun = &fsg->luns[i];
+		if (backing_file_is_open(curlun)) {
+			p = NULL;
+			if (pathbuf) {
+				p = d_path(&curlun->filp->f_path,
+					   pathbuf, PATH_MAX);
+				if (IS_ERR(p))
+					p = NULL;
+			}
+			LINFO(curlun, "ro=%d, file: %s\n",
+					curlun->ro, (p ? p : "(error)"));
+		}
+	}
+	kfree(pathbuf);
+
+	set_bit(REGISTERED, &fsg->atomic_bitflags);
+
+	/* Tell the thread to start working */
+	wake_up_process(fsg->thread_task);
+	return 0;
+
+autoconf_fail:
+	ERROR(fsg, "unable to autoconfigure all endpoints\n");
+	rc = -ENOTSUPP;
+
+out:
+	DBG(fsg, "fsg_function_bind failed: %d\n", rc);
+	fsg->state = FSG_STATE_TERMINATED;	/* The thread is dead */
+	fsg_function_unbind(c, f);
+	close_all_backing_files(fsg);
+	return rc;
+}
+
+static int fsg_function_set_alt(struct usb_function *f,
+		unsigned intf, unsigned alt)
+{
+	struct fsg_dev	*fsg = func_to_dev(f);
+	DBG(fsg, "fsg_function_set_alt intf: %d alt: %d\n", intf, alt);
+	fsg->new_config = 1;
+	do_set_interface(fsg, 0);
+	raise_exception(fsg, FSG_STATE_CONFIG_CHANGE);
+	return 0;
+}
+
+static void fsg_function_disable(struct usb_function *f)
+{
+	struct fsg_dev	*fsg = func_to_dev(f);
+	DBG(fsg, "fsg_function_disable\n");
+	if (fsg->new_config)
+		do_set_interface(fsg, -1);
+	fsg->new_config = 0;
+	raise_exception(fsg, FSG_STATE_CONFIG_CHANGE);
+}
+
+static int __init fsg_probe(struct platform_device *pdev)
+{
+	struct usb_mass_storage_platform_data *pdata = pdev->dev.platform_data;
+	struct fsg_dev *fsg = the_fsg;
+
+	fsg->pdev = pdev;
+	printk(KERN_INFO "fsg_probe pdata: %p\n", pdata);
+
+	if (pdata) {
+		if (pdata->vendor)
+			fsg->vendor = pdata->vendor;
+
+		if (pdata->product)
+			fsg->product = pdata->product;
+
+		if (pdata->release)
+			fsg->release = pdata->release;
+		fsg->nluns = pdata->nluns;
+	}
+
+	return 0;
+}
+
+static struct platform_driver fsg_platform_driver = {
+	.driver = { .name = "usb_mass_storage", },
+	.probe = fsg_probe,
+};
+
+int mass_storage_bind_config(struct usb_configuration *c)
+{
+	int		rc;
+	struct fsg_dev	*fsg;
+
+	printk(KERN_INFO "mass_storage_bind_config\n");
+	rc = fsg_alloc();
+	if (rc)
+		return rc;
+	fsg = the_fsg;
+
+	spin_lock_init(&fsg->lock);
+	init_rwsem(&fsg->filesem);
+	kref_init(&fsg->ref);
+	init_completion(&fsg->thread_notifier);
+
+	the_fsg->buf_size = BULK_BUFFER_SIZE;
+	the_fsg->sdev.name = DRIVER_NAME;
+	the_fsg->sdev.print_name = print_switch_name;
+	the_fsg->sdev.print_state = print_switch_state;
+	rc = switch_dev_register(&the_fsg->sdev);
+	if (rc < 0)
+		goto err_switch_dev_register;
+
+	rc = platform_driver_register(&fsg_platform_driver);
+	if (rc != 0)
+		goto err_platform_driver_register;
+
+	wake_lock_init(&the_fsg->wake_lock, WAKE_LOCK_SUSPEND,
+			   "usb_mass_storage");
+
+	fsg->cdev = c->cdev;
+	fsg->function.name = shortname;
+	fsg->function.descriptors = fs_function;
+	fsg->function.bind = fsg_function_bind;
+	fsg->function.unbind = fsg_function_unbind;
+	fsg->function.setup = fsg_function_setup;
+	fsg->function.set_alt = fsg_function_set_alt;
+	fsg->function.disable = fsg_function_disable;
+
+	rc = usb_add_function(c, &fsg->function);
+	if (rc != 0)
+		goto err_usb_add_function;
+
+
+	return 0;
+
+err_usb_add_function:
+	wake_lock_destroy(&the_fsg->wake_lock);
+	platform_driver_unregister(&fsg_platform_driver);
+err_platform_driver_register:
+	switch_dev_unregister(&the_fsg->sdev);
+err_switch_dev_register:
+	kref_put(&the_fsg->ref, fsg_release);
+
+	return rc;
+}
+
+static struct android_usb_function mass_storage_function = {
+	.name = "usb_mass_storage",
+	.bind_config = mass_storage_bind_config,
+};
+
+static int __init init(void)
+{
+	printk(KERN_INFO "f_mass_storage init\n");
+	android_register_function(&mass_storage_function);
+	return 0;
+}
+module_init(init);
+
--- linux-mvl-dove-2.6.32.orig/drivers/usb/gadget/f_rndis.c
+++ linux-mvl-dove-2.6.32/drivers/usb/gadget/f_rndis.c
@@ -25,6 +25,7 @@
 #include <linux/kernel.h>
 #include <linux/device.h>
 #include <linux/etherdevice.h>
+#include <linux/usb/android_composite.h>
 
 #include <asm/atomic.h>
 
@@ -126,9 +127,16 @@
 	/* .bInterfaceNumber = DYNAMIC */
 	/* status endpoint is optional; this could be patched later */
 	.bNumEndpoints =	1,
+#ifdef CONFIG_USB_ANDROID_RNDIS_WCEIS
+	/* "Wireless" RNDIS; auto-detected by Windows */
+	.bInterfaceClass =	USB_CLASS_WIRELESS_CONTROLLER,
+	.bInterfaceSubClass = 1,
+	.bInterfaceProtocol =	3,
+#else
 	.bInterfaceClass =	USB_CLASS_COMM,
 	.bInterfaceSubClass =   USB_CDC_SUBCLASS_ACM,
 	.bInterfaceProtocol =   USB_CDC_ACM_PROTO_VENDOR,
+#endif
 	/* .iInterface = DYNAMIC */
 };
 
@@ -400,8 +408,7 @@
 	 */
 	case ((USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_INTERFACE) << 8)
 			| USB_CDC_SEND_ENCAPSULATED_COMMAND:
-		if (w_length > req->length || w_value
-				|| w_index != rndis->ctrl_id)
+		if (w_value || w_index != rndis->ctrl_id)
 			goto invalid;
 		/* read the request; process it later */
 		value = w_length;
@@ -467,10 +474,10 @@
 			usb_ep_disable(rndis->notify);
 		} else {
 			VDBG(cdev, "init rndis ctrl %d\n", intf);
-			rndis->notify_desc = ep_choose(cdev->gadget,
-					rndis->hs.notify,
-					rndis->fs.notify);
 		}
+		rndis->notify_desc = ep_choose(cdev->gadget,
+				rndis->hs.notify,
+				rndis->fs.notify);
 		usb_ep_enable(rndis->notify, rndis->notify_desc);
 		rndis->notify->driver_data = rndis;
 
@@ -484,11 +491,11 @@
 
 		if (!rndis->port.in) {
 			DBG(cdev, "init rndis\n");
-			rndis->port.in = ep_choose(cdev->gadget,
-					rndis->hs.in, rndis->fs.in);
-			rndis->port.out = ep_choose(cdev->gadget,
-					rndis->hs.out, rndis->fs.out);
 		}
+		rndis->port.in = ep_choose(cdev->gadget,
+				rndis->hs.in, rndis->fs.in);
+		rndis->port.out = ep_choose(cdev->gadget,
+				rndis->hs.out, rndis->fs.out);
 
 		/* Avoid ZLPs; they can be troublesome. */
 		rndis->port.is_zlp_ok = false;
@@ -825,6 +832,11 @@
 	rndis->port.func.setup = rndis_setup;
 	rndis->port.func.disable = rndis_disable;
 
+#ifdef CONFIG_USB_ANDROID_RNDIS
+	/* start disabled */
+	rndis->port.func.disabled = 1;
+#endif
+
 	status = usb_add_function(c, &rndis->port.func);
 	if (status) {
 		kfree(rndis);
@@ -833,3 +845,33 @@
 	}
 	return status;
 }
+
+#ifdef CONFIG_USB_ANDROID_RNDIS
+#include "rndis.c"
+
+// FIXME - using bogus MAC address for now
+
+static u8 ethaddr[ETH_ALEN] = { 11, 22, 33, 44, 55, 66 };
+
+int rndis_function_bind_config(struct usb_configuration *c)
+{
+	int ret = gether_setup(c->cdev->gadget, ethaddr);
+	if (ret == 0)
+		ret = rndis_bind_config(c, ethaddr);
+	return ret;
+}
+
+static struct android_usb_function rndis_function = {
+	.name = "rndis",
+	.bind_config = rndis_function_bind_config,
+};
+
+static int __init init(void)
+{
+	printk(KERN_INFO "f_rndis init\n");
+	android_register_function(&rndis_function);
+	return 0;
+}
+module_init(init);
+
+#endif /* CONFIG_USB_ANDROID_RNDIS */
--- linux-mvl-dove-2.6.32.orig/drivers/usb/gadget/u_ether.h
+++ linux-mvl-dove-2.6.32/drivers/usb/gadget/u_ether.h
@@ -112,7 +112,7 @@
 int ecm_bind_config(struct usb_configuration *c, u8 ethaddr[ETH_ALEN]);
 int eem_bind_config(struct usb_configuration *c);
 
-#ifdef CONFIG_USB_ETH_RNDIS
+#if defined(CONFIG_USB_ETH_RNDIS) || defined(CONFIG_USB_ANDROID_RNDIS)
 
 int rndis_bind_config(struct usb_configuration *c, u8 ethaddr[ETH_ALEN]);
 
--- linux-mvl-dove-2.6.32.orig/drivers/usb/gadget/Kconfig
+++ linux-mvl-dove-2.6.32/drivers/usb/gadget/Kconfig
@@ -81,7 +81,8 @@
 
 config USB_GADGET_VBUS_DRAW
 	int "Maximum VBUS Power usage (2-500 mA)"
-	range 2 500
+	range 0 500 if PLAT_ORION
+	range 2 500 if !PLAT_ORION
 	default 2
 	help
 	   Some devices need to draw power from USB when they are
@@ -508,6 +509,36 @@
 #
 # LAST -- dummy/emulated controller
 #
+config USB_GADGET_AT91
+	boolean "AT91 USB Device Port"
+	depends on ARCH_AT91 && !ARCH_AT91SAM9RL && !ARCH_AT91CAP9
+	select USB_GADGET_SELECTED
+	help
+	   Many Atmel AT91 processors (such as the AT91RM2000) have a
+	   full speed USB Device Port with support for five configurable
+	   endpoints (plus endpoint zero).
+
+	   Say "y" to link the driver statically, or "m" to build a
+	   dynamically linked module called "at91_udc" and force all
+	   gadget drivers to also be dynamically linked.
+
+config USB_AT91
+	tristate
+	depends on USB_GADGET_AT91
+	default USB_GADGET
+
+config USB_GADGET_MRVL
+        boolean "Marvell USB Device Port"
+        depends on (USB=y || (USB=m && USB_GADGET=m)) && EXPERIMENTAL
+	select USB_GADGET_DUALSPEED
+        help
+	  ...
+
+config USB_MRVL
+        tristate
+        depends on USB_GADGET_MRVL
+        default USB_GADGET
+        select USB_GADGET_SELECTED
 
 config USB_GADGET_DUMMY_HCD
 	boolean "Dummy HCD (DEVELOPMENT)"
@@ -780,6 +811,48 @@
 	  For more information, see Documentation/usb/gadget_printer.txt
 	  which includes sample code for accessing the device file.
 
+config USB_ANDROID
+	boolean "Android Gadget"
+	depends on SWITCH
+	help
+	  The Android gadget driver supports multiple USB functions.
+	  The functions can be configured via a board file and may be
+	  enabled and disabled dynamically.
+
+config USB_ANDROID_ACM
+	boolean "Android gadget ACM serial function"
+	depends on USB_ANDROID
+	help
+	  Provides ACM serial function for android gadget driver.
+
+config USB_ANDROID_ADB
+	boolean "Android gadget adb function"
+	depends on USB_ANDROID
+	help
+	  Provides adb function for android gadget driver.
+
+config USB_ANDROID_MASS_STORAGE
+	boolean "Android gadget mass storage function"
+	depends on USB_ANDROID && SWITCH
+	help
+	  Provides USB mass storage function for android gadget driver.
+
+config USB_ANDROID_RNDIS
+	boolean "Android gadget RNDIS ethernet function"
+	depends on USB_ANDROID
+	help
+	  Provides RNDIS ethernet function for android gadget driver.
+
+config USB_ANDROID_RNDIS_WCEIS
+        boolean "Use Windows Internet Sharing Class/SubClass/Protocol"
+        depends on USB_ANDROID_RNDIS
+        help
+         Causes the driver to look like a Windows-compatible Internet
+         Sharing device, so Windows auto-detects it.
+
+         If you enable this option, the device is no longer CDC ethernet
+         compatible.
+
 config USB_CDC_COMPOSITE
 	tristate "CDC Composite Device (Ethernet and ACM)"
 	depends on NET
--- linux-mvl-dove-2.6.32.orig/drivers/usb/gadget/android.c
+++ linux-mvl-dove-2.6.32/drivers/usb/gadget/android.c
@@ -0,0 +1,429 @@
+/*
+ * Gadget Driver for Android
+ *
+ * Copyright (C) 2008 Google, Inc.
+ * Author: Mike Lockwood <lockwood@android.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+/* #define DEBUG */
+/* #define VERBOSE_DEBUG */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/fs.h>
+
+#include <linux/delay.h>
+#include <linux/kernel.h>
+#include <linux/utsname.h>
+#include <linux/platform_device.h>
+
+#include <linux/usb/android_composite.h>
+#include <linux/usb/ch9.h>
+#include <linux/usb/composite.h>
+#include <linux/usb/gadget.h>
+
+#include "gadget_chips.h"
+
+/*
+ * Kbuild is not very cooperative with respect to linking separately
+ * compiled library objects into one module.  So for now we won't use
+ * separate compilation ... ensuring init/exit sections work to shrink
+ * the runtime footprint, and giving us at least some parts of what
+ * a "gcc --combine ... part1.c part2.c part3.c ... " build would.
+ */
+#include "usbstring.c"
+#include "config.c"
+#include "epautoconf.c"
+#include "composite.c"
+
+MODULE_AUTHOR("Mike Lockwood");
+MODULE_DESCRIPTION("Android Composite USB Driver");
+MODULE_LICENSE("GPL");
+MODULE_VERSION("1.0");
+
+static const char longname[] = "Gadget Android";
+
+/* Default vendor and product IDs, overridden by platform data */
+#define VENDOR_ID		0x18D1
+#define PRODUCT_ID		0x0001
+
+struct android_dev {
+	struct usb_composite_dev *cdev;
+	struct usb_configuration *config;
+	int num_products;
+	struct android_usb_product *products;
+	int num_functions;
+	char **functions;
+
+	int product_id;
+	int version;
+};
+
+static struct android_dev *_android_dev;
+
+/* string IDs are assigned dynamically */
+
+#define STRING_MANUFACTURER_IDX		0
+#define STRING_PRODUCT_IDX		1
+#define STRING_SERIAL_IDX		2
+
+/* String Table */
+static struct usb_string strings_dev[] = {
+	/* These dummy values should be overridden by platform data */
+	[STRING_MANUFACTURER_IDX].s = "Android",
+	[STRING_PRODUCT_IDX].s = "Android",
+	[STRING_SERIAL_IDX].s = "0123456789ABCDEF",
+	{  }			/* end of list */
+};
+
+static struct usb_gadget_strings stringtab_dev = {
+	.language	= 0x0409,	/* en-us */
+	.strings	= strings_dev,
+};
+
+static struct usb_gadget_strings *dev_strings[] = {
+	&stringtab_dev,
+	NULL,
+};
+
+static struct usb_device_descriptor device_desc = {
+	.bLength              = sizeof(device_desc),
+	.bDescriptorType      = USB_DT_DEVICE,
+	.bcdUSB               = __constant_cpu_to_le16(0x0200),
+	.bDeviceClass         = USB_CLASS_PER_INTERFACE,
+	.idVendor             = __constant_cpu_to_le16(VENDOR_ID),
+	.idProduct            = __constant_cpu_to_le16(PRODUCT_ID),
+	.bcdDevice            = __constant_cpu_to_le16(0xffff),
+	.bNumConfigurations   = 1,
+};
+
+static struct list_head _functions = LIST_HEAD_INIT(_functions);
+static int _registered_function_count = 0;
+
+void android_usb_set_connected(int connected)
+{
+	if (_android_dev && _android_dev->cdev && _android_dev->cdev->gadget) {
+		if (connected)
+			usb_gadget_connect(_android_dev->cdev->gadget);
+		else
+			usb_gadget_disconnect(_android_dev->cdev->gadget);
+	}
+}
+
+static struct android_usb_function *get_function(const char *name)
+{
+	struct android_usb_function	*f;
+	list_for_each_entry(f, &_functions, list) {
+		if (!strcmp(name, f->name))
+			return f;
+	}
+	return 0;
+}
+
+static void bind_functions(struct android_dev *dev)
+{
+	struct android_usb_function	*f;
+	char **functions = dev->functions;
+	int i;
+
+	for (i = 0; i < dev->num_functions; i++) {
+		char *name = *functions++;
+		f = get_function(name);
+		if (f)
+			f->bind_config(dev->config);
+		else
+			printk(KERN_ERR "function %s not found in bind_functions\n", name);
+	}
+}
+
+static int __init android_bind_config(struct usb_configuration *c)
+{
+	struct android_dev *dev = _android_dev;
+
+	printk(KERN_DEBUG "android_bind_config\n");
+	dev->config = c;
+
+	/* bind our functions if they have all registered */
+	if (_registered_function_count == dev->num_functions)
+		bind_functions(dev);
+
+	return 0;
+}
+
+static int android_setup_config(struct usb_configuration *c,
+		const struct usb_ctrlrequest *ctrl);
+
+static struct usb_configuration android_config_driver = {
+	.label		= "android",
+	.bind		= android_bind_config,
+	.setup		= android_setup_config,
+	.bConfigurationValue = 1,
+	.bmAttributes	= USB_CONFIG_ATT_ONE | USB_CONFIG_ATT_SELFPOWER,
+	.bMaxPower	= 0xFA, /* 500ma */
+};
+
+static int android_setup_config(struct usb_configuration *c,
+		const struct usb_ctrlrequest *ctrl)
+{
+	int i;
+	int ret = -EOPNOTSUPP;
+
+	for (i = 0; i < android_config_driver.next_interface_id; i++) {
+		if (android_config_driver.interface[i]->setup) {
+			ret = android_config_driver.interface[i]->setup(
+				android_config_driver.interface[i], ctrl);
+			if (ret >= 0)
+				return ret;
+		}
+	}
+	return ret;
+}
+
+static int product_has_function(struct android_usb_product *p,
+		struct usb_function *f)
+{
+	char **functions = p->functions;
+	int count = p->num_functions;
+	const char *name = f->name;
+	int i;
+
+	for (i = 0; i < count; i++) {
+		if (!strcmp(name, *functions++))
+			return 1;
+	}
+	return 0;
+}
+
+static int product_matches_functions(struct android_usb_product *p)
+{
+	struct usb_function		*f;
+	list_for_each_entry(f, &android_config_driver.functions, list) {
+		if (product_has_function(p, f) == !!f->disabled)
+			return 0;
+	}
+	return 1;
+}
+
+static int get_product_id(struct android_dev *dev)
+{
+	struct android_usb_product *p = dev->products;
+	int count = dev->num_products;
+	int i;
+
+	if (p) {
+		for (i = 0; i < count; i++, p++) {
+			if (product_matches_functions(p))
+				return p->product_id;
+		}
+	}
+	/* use default product ID */
+	return dev->product_id;
+}
+
+static int __init android_bind(struct usb_composite_dev *cdev)
+{
+	struct android_dev *dev = _android_dev;
+	struct usb_gadget	*gadget = cdev->gadget;
+	int			gcnum, id, product_id, ret;
+
+	printk(KERN_INFO "android_bind\n");
+
+	/* Allocate string descriptor numbers ... note that string
+	 * contents can be overridden by the composite_dev glue.
+	 */
+	id = usb_string_id(cdev);
+	if (id < 0)
+		return id;
+	strings_dev[STRING_MANUFACTURER_IDX].id = id;
+	device_desc.iManufacturer = id;
+
+	id = usb_string_id(cdev);
+	if (id < 0)
+		return id;
+	strings_dev[STRING_PRODUCT_IDX].id = id;
+	device_desc.iProduct = id;
+
+	id = usb_string_id(cdev);
+	if (id < 0)
+		return id;
+	strings_dev[STRING_SERIAL_IDX].id = id;
+	device_desc.iSerialNumber = id;
+
+	if (gadget->ops->wakeup)
+		android_config_driver.bmAttributes |= USB_CONFIG_ATT_WAKEUP;
+
+	/* register our configuration */
+	ret = usb_add_config(cdev, &android_config_driver);
+	if (ret) {
+		printk(KERN_ERR "usb_add_config failed\n");
+		return ret;
+	}
+
+	gcnum = usb_gadget_controller_number(gadget);
+	if (gcnum >= 0)
+		device_desc.bcdDevice = cpu_to_le16(0x0200 + gcnum);
+	else {
+		/* gadget zero is so simple (for now, no altsettings) that
+		 * it SHOULD NOT have problems with bulk-capable hardware.
+		 * so just warn about unrcognized controllers -- don't panic.
+		 *
+		 * things like configuration and altsetting numbering
+		 * can need hardware-specific attention though.
+		 */
+		pr_warning("%s: controller '%s' not recognized\n",
+			longname, gadget->name);
+		device_desc.bcdDevice = __constant_cpu_to_le16(0x9999);
+	}
+
+	usb_gadget_set_selfpowered(gadget);
+	dev->cdev = cdev;
+	product_id = get_product_id(dev);
+	device_desc.idProduct = __constant_cpu_to_le16(product_id);
+	cdev->desc.idProduct = device_desc.idProduct;
+
+	return 0;
+}
+
+static struct usb_composite_driver android_usb_driver = {
+	.name		= "android_usb",
+	.dev		= &device_desc,
+	.strings	= dev_strings,
+	.bind		= android_bind,
+};
+
+void android_register_function(struct android_usb_function *f)
+{
+	struct android_dev *dev = _android_dev;
+
+	printk(KERN_INFO "android_register_function %s\n", f->name);
+	list_add_tail(&f->list, &_functions);
+	_registered_function_count++;
+
+	/* bind our functions if they have all registered
+	 * and the main driver has bound.
+	 */
+	if (dev && dev->config && _registered_function_count == dev->num_functions)
+		bind_functions(dev);
+}
+
+void android_enable_function(struct usb_function *f, int enable)
+{
+	struct android_dev *dev = _android_dev;
+	int disable = !enable;
+	int product_id;
+
+	if (!!f->disabled != disable) {
+		usb_function_set_enabled(f, !disable);
+
+#ifdef CONFIG_USB_ANDROID_RNDIS
+		if (!strcmp(f->name, "rndis")) {
+			struct usb_function		*func;
+
+			/* We need to specify the COMM class in the device descriptor
+			 * if we are using RNDIS.
+			 */
+			if (enable)
+#ifdef CONFIG_USB_ANDROID_RNDIS_WCEIS
+				dev->cdev->desc.bDeviceClass = USB_CLASS_WIRELESS_CONTROLLER;
+#else
+				dev->cdev->desc.bDeviceClass = USB_CLASS_COMM;
+#endif
+			else
+				dev->cdev->desc.bDeviceClass = USB_CLASS_PER_INTERFACE;
+
+			/* Windows does not support other interfaces when RNDIS is enabled,
+			 * so we disable UMS when RNDIS is on.
+			 */
+			list_for_each_entry(func, &android_config_driver.functions, list) {
+				if (!strcmp(func->name, "usb_mass_storage")) {
+					usb_function_set_enabled(func, !enable);
+					break;
+				}
+			}
+		}
+#endif
+
+		product_id = get_product_id(dev);
+		device_desc.idProduct = __constant_cpu_to_le16(product_id);
+		if (dev->cdev)
+			dev->cdev->desc.idProduct = device_desc.idProduct;
+		usb_composite_force_reset(dev->cdev);
+	}
+}
+
+static int __init android_probe(struct platform_device *pdev)
+{
+	struct android_usb_platform_data *pdata = pdev->dev.platform_data;
+	struct android_dev *dev = _android_dev;
+
+	printk(KERN_INFO "android_probe pdata: %p\n", pdata);
+
+	if (pdata) {
+		dev->products = pdata->products;
+		dev->num_products = pdata->num_products;
+		dev->functions = pdata->functions;
+		dev->num_functions = pdata->num_functions;
+		if (pdata->vendor_id)
+			device_desc.idVendor =
+				__constant_cpu_to_le16(pdata->vendor_id);
+		if (pdata->product_id) {
+			dev->product_id = pdata->product_id;
+			device_desc.idProduct =
+				__constant_cpu_to_le16(pdata->product_id);
+		}
+		if (pdata->version)
+			dev->version = pdata->version;
+
+		if (pdata->product_name)
+			strings_dev[STRING_PRODUCT_IDX].s = pdata->product_name;
+		if (pdata->manufacturer_name)
+			strings_dev[STRING_MANUFACTURER_IDX].s =
+					pdata->manufacturer_name;
+		if (pdata->serial_number)
+			strings_dev[STRING_SERIAL_IDX].s = pdata->serial_number;
+	}
+
+	return usb_composite_register(&android_usb_driver);
+}
+
+static struct platform_driver android_platform_driver = {
+	.driver = { .name = "android_usb", },
+	.probe = android_probe,
+};
+
+static int __init init(void)
+{
+	struct android_dev *dev;
+
+	printk(KERN_INFO "android init\n");
+
+	dev = kzalloc(sizeof(*dev), GFP_KERNEL);
+	if (!dev)
+		return -ENOMEM;
+
+	/* set default values, which should be overridden by platform data */
+	dev->product_id = PRODUCT_ID;
+	_android_dev = dev;
+
+	return platform_driver_register(&android_platform_driver);
+}
+module_init(init);
+
+static void __exit cleanup(void)
+{
+	usb_composite_unregister(&android_usb_driver);
+	platform_driver_unregister(&android_platform_driver);
+	kfree(_android_dev);
+	_android_dev = NULL;
+}
+module_exit(cleanup);
--- linux-mvl-dove-2.6.32.orig/drivers/usb/gadget/printer.c
+++ linux-mvl-dove-2.6.32/drivers/usb/gadget/printer.c
@@ -130,31 +130,31 @@
  * parameters are in UTF-8 (superset of ASCII's 7 bit characters).
  */
 
-static ushort __initdata idVendor;
+static ushort idVendor;
 module_param(idVendor, ushort, S_IRUGO);
 MODULE_PARM_DESC(idVendor, "USB Vendor ID");
 
-static ushort __initdata idProduct;
+static ushort idProduct;
 module_param(idProduct, ushort, S_IRUGO);
 MODULE_PARM_DESC(idProduct, "USB Product ID");
 
-static ushort __initdata bcdDevice;
+static ushort bcdDevice;
 module_param(bcdDevice, ushort, S_IRUGO);
 MODULE_PARM_DESC(bcdDevice, "USB Device version (BCD)");
 
-static char *__initdata iManufacturer;
+static char *iManufacturer;
 module_param(iManufacturer, charp, S_IRUGO);
 MODULE_PARM_DESC(iManufacturer, "USB Manufacturer string");
 
-static char *__initdata iProduct;
+static char *iProduct;
 module_param(iProduct, charp, S_IRUGO);
 MODULE_PARM_DESC(iProduct, "USB Product string");
 
-static char *__initdata iSerialNum;
+static char *iSerialNum;
 module_param(iSerialNum, charp, S_IRUGO);
 MODULE_PARM_DESC(iSerialNum, "1");
 
-static char *__initdata iPNPstring;
+static char *iPNPstring;
 module_param(iPNPstring, charp, S_IRUGO);
 MODULE_PARM_DESC(iPNPstring, "MFG:linux;MDL:g_printer;CLS:PRINTER;SN:1;");
 
--- linux-mvl-dove-2.6.32.orig/drivers/usb/gadget/gadget_chips.h
+++ linux-mvl-dove-2.6.32/drivers/usb/gadget/gadget_chips.h
@@ -169,6 +169,12 @@
 #define gadget_is_ci13xxx(g)	0
 #endif
 
+#ifdef CONFIG_USB_GADGET_MRVL
+#define gadget_is_mrvl(g)    !strcmp("mv_udc", (g)->name)
+#else
+#define gadget_is_mrvl(g)    0
+#endif
+
 // CONFIG_USB_GADGET_SX2
 // CONFIG_USB_GADGET_AU1X00
 // ...
@@ -234,7 +240,9 @@
 	else if (gadget_is_atmel_usba(gadget))
 		return 0x18;
 	else if (gadget_is_fsl_usb2(gadget))
-		return 0x19;
+		return 0x19;
+	else if (gadget_is_mrvl(gadget))
+		return 0x1a;
 	else if (gadget_is_amd5536udc(gadget))
 		return 0x20;
 	else if (gadget_is_m66592(gadget))
--- linux-mvl-dove-2.6.32.orig/drivers/usb/gadget/rndis.c
+++ linux-mvl-dove-2.6.32/drivers/usb/gadget/rndis.c
@@ -291,9 +291,13 @@
 	/* mandatory */
 	case OID_GEN_VENDOR_DESCRIPTION:
 		pr_debug("%s: OID_GEN_VENDOR_DESCRIPTION\n", __func__);
-		length = strlen (rndis_per_dev_params [configNr].vendorDescr);
-		memcpy (outbuf,
-			rndis_per_dev_params [configNr].vendorDescr, length);
+		if ( rndis_per_dev_params [configNr].vendorDescr ) {
+			length = strlen (rndis_per_dev_params [configNr].vendorDescr);
+			memcpy (outbuf,
+				rndis_per_dev_params [configNr].vendorDescr, length);
+		} else {
+			outbuf[0] = 0;
+		}
 		retval = 0;
 		break;
 
--- linux-mvl-dove-2.6.32.orig/drivers/usb/gadget/at91_udc.c
+++ linux-mvl-dove-2.6.32/drivers/usb/gadget/at91_udc.c
@@ -1687,7 +1687,7 @@
 	}
 
 	/* newer chips have more FIFO memory than rm9200 */
-	if (cpu_is_at91sam9260()) {
+	if (cpu_is_at91sam9260() || cpu_is_at91sam9g20()) {
 		udc->ep[0].maxpacket = 64;
 		udc->ep[3].maxpacket = 64;
 		udc->ep[4].maxpacket = 512;
--- linux-mvl-dove-2.6.32.orig/drivers/usb/gadget/Makefile
+++ linux-mvl-dove-2.6.32/drivers/usb/gadget/Makefile
@@ -28,6 +28,7 @@
 obj-$(CONFIG_USB_CI13XXX)	+= ci13xxx_udc.o
 obj-$(CONFIG_USB_S3C_HSOTG)	+= s3c-hsotg.o
 obj-$(CONFIG_USB_LANGWELL)	+= langwell_udc.o
+obj-$(CONFIG_USB_MRVL)       	+= ../../../arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_udc/
 
 #
 # USB gadget drivers
@@ -51,4 +52,9 @@
 obj-$(CONFIG_USB_G_PRINTER)	+= g_printer.o
 obj-$(CONFIG_USB_MIDI_GADGET)	+= g_midi.o
 obj-$(CONFIG_USB_CDC_COMPOSITE) += g_cdc.o
+obj-$(CONFIG_USB_ANDROID)	+= android.o
+obj-$(CONFIG_USB_ANDROID_ACM)	+= f_acm.o u_serial.o
+obj-$(CONFIG_USB_ANDROID_ADB)	+= f_adb.o
+obj-$(CONFIG_USB_ANDROID_MASS_STORAGE)	+= f_mass_storage.o
+obj-$(CONFIG_USB_ANDROID_RNDIS)	+= f_rndis.o u_ether.o
 
--- linux-mvl-dove-2.6.32.orig/drivers/usb/gadget/atmel_usba_udc.c
+++ linux-mvl-dove-2.6.32/drivers/usb/gadget/atmel_usba_udc.c
@@ -2013,6 +2013,9 @@
 			} else {
 				disable_irq(gpio_to_irq(udc->vbus_pin));
 			}
+		} else {
+			/* gpio_request fail so use -EINVAL for gpio_is_valid */
+			udc->vbus_pin = -EINVAL;
 		}
 	}
 
--- linux-mvl-dove-2.6.32.orig/drivers/usb/gadget/dummy_hcd.c
+++ linux-mvl-dove-2.6.32/drivers/usb/gadget/dummy_hcd.c
@@ -1886,6 +1886,7 @@
 	if (!hcd)
 		return -ENOMEM;
 	the_controller = hcd_to_dummy (hcd);
+	hcd->has_tt = 1;
 
 	retval = usb_add_hcd(hcd, 0, 0);
 	if (retval != 0) {
--- linux-mvl-dove-2.6.32.orig/drivers/usb/gadget/composite.c
+++ linux-mvl-dove-2.6.32/drivers/usb/gadget/composite.c
@@ -24,6 +24,8 @@
 #include <linux/kernel.h>
 #include <linux/slab.h>
 #include <linux/device.h>
+#include <linux/kdev_t.h>
+#include <linux/delay.h>
 
 #include <linux/usb/composite.h>
 
@@ -71,6 +73,59 @@
 
 /*-------------------------------------------------------------------------*/
 
+static ssize_t enable_show(struct device *dev, struct device_attribute *attr,
+		char *buf)
+{
+	struct usb_function *f = dev_get_drvdata(dev);
+	return sprintf(buf, "%d\n", !f->disabled);
+}
+
+static ssize_t enable_store(
+		struct device *dev, struct device_attribute *attr,
+		const char *buf, size_t size)
+{
+	struct usb_function *f = dev_get_drvdata(dev);
+	struct usb_composite_driver	*driver = f->config->cdev->driver;
+	int value;
+
+	sscanf(buf, "%d", &value);
+	if (driver->enable_function)
+		driver->enable_function(f, value);
+	else
+		usb_function_set_enabled(f, value);
+
+	return size;
+}
+
+static DEVICE_ATTR(enable, S_IRUGO | S_IWUSR, enable_show, enable_store);
+
+void usb_function_set_enabled(struct usb_function *f, int enabled)
+{
+	f->disabled = !enabled;
+	kobject_uevent(&f->dev->kobj, KOBJ_CHANGE);
+}
+
+
+void usb_composite_force_reset(struct usb_composite_dev *cdev)
+{
+	unsigned long			flags;
+
+	spin_lock_irqsave(&cdev->lock, flags);
+	/* force reenumeration */
+	if (cdev && cdev->gadget &&
+			cdev->gadget->speed != USB_SPEED_UNKNOWN) {
+		/* avoid sending a disconnect switch event until after we disconnect */
+		cdev->mute_switch = 1;
+		spin_unlock_irqrestore(&cdev->lock, flags);
+
+		usb_gadget_disconnect(cdev->gadget);
+		msleep(10);
+		usb_gadget_connect(cdev->gadget);
+	} else {
+		spin_unlock_irqrestore(&cdev->lock, flags);
+	}
+}
+
 /**
  * usb_add_function() - add a function to a configuration
  * @config: the configuration
@@ -88,15 +143,30 @@
 int __init usb_add_function(struct usb_configuration *config,
 		struct usb_function *function)
 {
+	struct usb_composite_dev	*cdev = config->cdev;
 	int	value = -EINVAL;
+	int index;
 
-	DBG(config->cdev, "adding '%s'/%p to config '%s'/%p\n",
+	DBG(cdev, "adding '%s'/%p to config '%s'/%p\n",
 			function->name, function,
 			config->label, config);
 
 	if (!function->set_alt || !function->disable)
 		goto done;
 
+	index = atomic_inc_return(&cdev->driver->function_count);
+	function->dev = device_create(cdev->driver->class, NULL,
+		MKDEV(0, index), NULL, function->name);
+	if (IS_ERR(function->dev))
+		return PTR_ERR(function->dev);
+
+	value = device_create_file(function->dev, &dev_attr_enable);
+	if (value < 0) {
+		device_destroy(cdev->driver->class, MKDEV(0, index));
+		return value;
+	}
+	dev_set_drvdata(function->dev, function);
+
 	function->config = config;
 	list_add_tail(&function->list, &config->functions);
 
@@ -122,7 +192,7 @@
 
 done:
 	if (value)
-		DBG(config->cdev, "adding '%s'/%p --> %d\n",
+		DBG(cdev, "adding '%s'/%p --> %d\n",
 				function->name, function, value);
 	return value;
 }
@@ -232,17 +302,19 @@
 		enum usb_device_speed speed, void *buf, u8 type)
 {
 	struct usb_config_descriptor	*c = buf;
+	struct usb_interface_descriptor *intf;
 	void				*next = buf + USB_DT_CONFIG_SIZE;
 	int				len = USB_BUFSIZ - USB_DT_CONFIG_SIZE;
 	struct usb_function		*f;
 	int				status;
+	int				interfaceCount = 0;
+	u8 *dest;
 
 	/* write the config descriptor */
 	c = buf;
 	c->bLength = USB_DT_CONFIG_SIZE;
 	c->bDescriptorType = type;
-	/* wTotalLength is written later */
-	c->bNumInterfaces = config->next_interface_id;
+	/* wTotalLength and bNumInterfaces are written later */
 	c->bConfigurationValue = config->bConfigurationValue;
 	c->iConfiguration = config->iConfiguration;
 	c->bmAttributes = USB_CONFIG_ATT_ONE | config->bmAttributes;
@@ -261,23 +333,40 @@
 	/* add each function's descriptors */
 	list_for_each_entry(f, &config->functions, list) {
 		struct usb_descriptor_header **descriptors;
+		struct usb_descriptor_header *descriptor;
 
 		if (speed == USB_SPEED_HIGH)
 			descriptors = f->hs_descriptors;
 		else
 			descriptors = f->descriptors;
-		if (!descriptors)
+		if (f->disabled || !descriptors || descriptors[0] == NULL)
 			continue;
 		status = usb_descriptor_fillbuf(next, len,
 			(const struct usb_descriptor_header **) descriptors);
 		if (status < 0)
 			return status;
+
+		/* set interface numbers dynamically */
+		dest = next;
+		while ((descriptor = *descriptors++) != NULL) {
+			intf = (struct usb_interface_descriptor *)dest;
+			if (intf->bDescriptorType == USB_DT_INTERFACE) {
+				/* don't increment bInterfaceNumber for alternate settings */
+				if (intf->bAlternateSetting == 0)
+					intf->bInterfaceNumber = interfaceCount++;
+				else
+					intf->bInterfaceNumber = interfaceCount - 1;
+			}
+			dest += intf->bLength;
+		}
+
 		len -= status;
 		next += status;
 	}
 
 	len = next - buf;
 	c->wTotalLength = cpu_to_le16(len);
+	c->bNumInterfaces = interfaceCount;
 	return len;
 }
 
@@ -421,6 +510,8 @@
 
 		if (!f)
 			break;
+		if (f->disabled)
+			continue;
 
 		result = f->set_alt(f, tmp, 0);
 		if (result < 0) {
@@ -436,6 +527,8 @@
 	power = c->bMaxPower ? (2 * c->bMaxPower) : CONFIG_USB_GADGET_VBUS_DRAW;
 done:
 	usb_gadget_vbus_draw(gadget, power);
+
+	schedule_work(&cdev->switch_work);
 	return result;
 }
 
@@ -756,11 +849,11 @@
 	case USB_REQ_GET_CONFIGURATION:
 		if (ctrl->bRequestType != USB_DIR_IN)
 			goto unknown;
-		if (cdev->config)
+		if (cdev->config) {
 			*(u8 *)req->buf = cdev->config->bConfigurationValue;
-		else
+			value = min(w_length, (u16) 1);
+		} else
 			*(u8 *)req->buf = 0;
-		value = min(w_length, (u16) 1);
 		break;
 
 	/* function drivers must handle get/set altsetting; if there's
@@ -810,6 +903,9 @@
 		 */
 		if ((ctrl->bRequestType & USB_RECIP_MASK)
 				== USB_RECIP_INTERFACE) {
+			if (cdev->config == NULL)
+				return value;
+
 			f = cdev->config->interface[intf];
 			if (f && f->setup)
 				value = f->setup(f, ctrl);
@@ -824,6 +920,25 @@
 				value = c->setup(c, ctrl);
 		}
 
+		/* If the vendor request is not processed (value < 0),
+		 * call all device registered configure setup callbacks
+		 * to process it.
+		 * This is used to handle the following cases:
+		 * - vendor request is for the device and arrives before
+		 * setconfiguration.
+		 * - Some devices are required to handle vendor request before
+		 * setconfiguration such as MTP, USBNET.
+		 */
+
+		if (value < 0) {
+			struct usb_configuration        *cfg;
+
+			list_for_each_entry(cfg, &cdev->configs, list) {
+			if (cfg && cfg->setup)
+				value = cfg->setup(cfg, ctrl);
+			}
+		}
+
 		goto done;
 	}
 
@@ -855,6 +970,11 @@
 	spin_lock_irqsave(&cdev->lock, flags);
 	if (cdev->config)
 		reset_config(cdev);
+
+	if (cdev->mute_switch)
+		cdev->mute_switch = 0;
+	else
+		schedule_work(&cdev->switch_work);
 	spin_unlock_irqrestore(&cdev->lock, flags);
 }
 
@@ -904,6 +1024,8 @@
 		kfree(cdev->req->buf);
 		usb_ep_free_request(gadget->ep0, cdev->req);
 	}
+
+	switch_dev_unregister(&cdev->sdev);
 	kfree(cdev);
 	set_gadget_data(gadget, NULL);
 	composite = NULL;
@@ -931,6 +1053,19 @@
 	}
 }
 
+static void
+composite_switch_work(struct work_struct *data)
+{
+	struct usb_composite_dev	*cdev =
+		container_of(data, struct usb_composite_dev, switch_work);
+	struct usb_configuration *config = cdev->config;
+
+	if (config)
+		switch_set_state(&cdev->sdev, config->bConfigurationValue);
+	else
+		switch_set_state(&cdev->sdev, 0);
+}
+
 static int __init composite_bind(struct usb_gadget *gadget)
 {
 	struct usb_composite_dev	*cdev;
@@ -974,6 +1109,12 @@
 	if (status < 0)
 		goto fail;
 
+	cdev->sdev.name = "usb_configuration";
+	status = switch_dev_register(&cdev->sdev);
+	if (status < 0)
+		goto fail;
+	INIT_WORK(&cdev->switch_work, composite_switch_work);
+
 	cdev->desc = *composite->dev;
 	cdev->desc.bMaxPacketSize0 = gadget->ep0->maxpacket;
 
@@ -1048,6 +1189,23 @@
 	}
 }
 
+static int
+composite_uevent(struct device *dev, struct kobj_uevent_env *env)
+{
+	struct usb_function *f = dev_get_drvdata(dev);
+
+	if (!f) {
+		/* this happens when the device is first created */
+		return 0;
+	}
+
+	if (add_uevent_var(env, "FUNCTION=%s", f->name))
+		return -ENOMEM;
+	if (add_uevent_var(env, "ENABLED=%d", !f->disabled))
+		return -ENOMEM;
+	return 0;
+}
+
 /*-------------------------------------------------------------------------*/
 
 static struct usb_gadget_driver composite_driver = {
@@ -1093,6 +1251,11 @@
 	composite_driver.driver.name = driver->name;
 	composite = driver;
 
+	driver->class = class_create(THIS_MODULE, "usb_composite");
+	if (IS_ERR(driver->class))
+		return PTR_ERR(driver->class);
+	driver->class->dev_uevent = composite_uevent;
+
 	return usb_gadget_register_driver(&composite_driver);
 }
 
--- linux-mvl-dove-2.6.32.orig/drivers/usb/gadget/f_acm.c
+++ linux-mvl-dove-2.6.32/drivers/usb/gadget/f_acm.c
@@ -14,6 +14,7 @@
 
 #include <linux/kernel.h>
 #include <linux/device.h>
+#include <linux/usb/android_composite.h>
 
 #include "u_serial.h"
 #include "gadget_chips.h"
@@ -384,10 +385,10 @@
 			usb_ep_disable(acm->notify);
 		} else {
 			VDBG(cdev, "init acm ctrl interface %d\n", intf);
-			acm->notify_desc = ep_choose(cdev->gadget,
-					acm->hs.notify,
-					acm->fs.notify);
 		}
+		acm->notify_desc = ep_choose(cdev->gadget,
+				acm->hs.notify,
+				acm->fs.notify);
 		usb_ep_enable(acm->notify, acm->notify_desc);
 		acm->notify->driver_data = acm;
 
@@ -397,11 +398,11 @@
 			gserial_disconnect(&acm->port);
 		} else {
 			DBG(cdev, "activate acm ttyGS%d\n", acm->port_num);
-			acm->port.in_desc = ep_choose(cdev->gadget,
-					acm->hs.in, acm->fs.in);
-			acm->port.out_desc = ep_choose(cdev->gadget,
-					acm->hs.out, acm->fs.out);
 		}
+		acm->port.in_desc = ep_choose(cdev->gadget,
+				acm->hs.in, acm->fs.in);
+		acm->port.out_desc = ep_choose(cdev->gadget,
+				acm->hs.out, acm->fs.out);
 		gserial_connect(&acm->port, acm->port_num);
 
 	} else
@@ -761,3 +762,28 @@
 		kfree(acm);
 	return status;
 }
+
+#ifdef CONFIG_USB_ANDROID_ACM
+
+int acm_function_bind_config(struct usb_configuration *c)
+{
+	int ret = acm_bind_config(c, 0);
+	if (ret == 0)
+		gserial_setup(c->cdev->gadget, 1);
+	return ret;
+}
+
+static struct android_usb_function acm_function = {
+	.name = "acm",
+	.bind_config = acm_function_bind_config,
+};
+
+static int __init init(void)
+{
+	printk(KERN_INFO "f_acm init\n");
+	android_register_function(&acm_function);
+	return 0;
+}
+module_init(init);
+
+#endif /* CONFIG_USB_ANDROID_ACM */
--- linux-mvl-dove-2.6.32.orig/drivers/usb/gadget/f_adb.c
+++ linux-mvl-dove-2.6.32/drivers/usb/gadget/f_adb.c
@@ -0,0 +1,699 @@
+/*
+ * Gadget Driver for Android ADB
+ *
+ * Copyright (C) 2008 Google, Inc.
+ * Author: Mike Lockwood <lockwood@android.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+/* #define DEBUG */
+/* #define VERBOSE_DEBUG */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/poll.h>
+#include <linux/delay.h>
+#include <linux/wait.h>
+#include <linux/err.h>
+#include <linux/interrupt.h>
+
+#include <linux/types.h>
+#include <linux/device.h>
+#include <linux/miscdevice.h>
+
+#include <linux/usb/android_composite.h>
+
+#define BULK_BUFFER_SIZE           4096
+
+/* number of rx and tx requests to allocate */
+#define RX_REQ_MAX 4
+#define TX_REQ_MAX 4
+
+static const char shortname[] = "android_adb";
+
+struct adb_dev {
+	struct usb_function function;
+	struct usb_composite_dev *cdev;
+	spinlock_t lock;
+
+	struct usb_ep *ep_in;
+	struct usb_ep *ep_out;
+
+	int online;
+	int error;
+
+	atomic_t read_excl;
+	atomic_t write_excl;
+	atomic_t open_excl;
+
+	struct list_head tx_idle;
+	struct list_head rx_idle;
+	struct list_head rx_done;
+
+	wait_queue_head_t read_wq;
+	wait_queue_head_t write_wq;
+
+	/* the request we're currently reading from */
+	struct usb_request *read_req;
+	unsigned char *read_buf;
+	unsigned read_count;
+};
+
+static struct usb_interface_descriptor adb_interface_desc = {
+	.bLength                = USB_DT_INTERFACE_SIZE,
+	.bDescriptorType        = USB_DT_INTERFACE,
+	.bInterfaceNumber       = 0,
+	.bNumEndpoints          = 2,
+	.bInterfaceClass        = 0xFF,
+	.bInterfaceSubClass     = 0x42,
+	.bInterfaceProtocol     = 1,
+};
+
+static struct usb_endpoint_descriptor adb_highspeed_in_desc = {
+	.bLength                = USB_DT_ENDPOINT_SIZE,
+	.bDescriptorType        = USB_DT_ENDPOINT,
+	.bEndpointAddress       = USB_DIR_IN,
+	.bmAttributes           = USB_ENDPOINT_XFER_BULK,
+	.wMaxPacketSize         = __constant_cpu_to_le16(512),
+};
+
+static struct usb_endpoint_descriptor adb_highspeed_out_desc = {
+	.bLength                = USB_DT_ENDPOINT_SIZE,
+	.bDescriptorType        = USB_DT_ENDPOINT,
+	.bEndpointAddress       = USB_DIR_OUT,
+	.bmAttributes           = USB_ENDPOINT_XFER_BULK,
+	.wMaxPacketSize         = __constant_cpu_to_le16(512),
+};
+
+static struct usb_endpoint_descriptor adb_fullspeed_in_desc = {
+	.bLength                = USB_DT_ENDPOINT_SIZE,
+	.bDescriptorType        = USB_DT_ENDPOINT,
+	.bEndpointAddress       = USB_DIR_IN,
+	.bmAttributes           = USB_ENDPOINT_XFER_BULK,
+};
+
+static struct usb_endpoint_descriptor adb_fullspeed_out_desc = {
+	.bLength                = USB_DT_ENDPOINT_SIZE,
+	.bDescriptorType        = USB_DT_ENDPOINT,
+	.bEndpointAddress       = USB_DIR_OUT,
+	.bmAttributes           = USB_ENDPOINT_XFER_BULK,
+};
+
+static struct usb_descriptor_header *fs_adb_descs[] = {
+	(struct usb_descriptor_header *) &adb_interface_desc,
+	(struct usb_descriptor_header *) &adb_fullspeed_in_desc,
+	(struct usb_descriptor_header *) &adb_fullspeed_out_desc,
+	NULL,
+};
+
+static struct usb_descriptor_header *hs_adb_descs[] = {
+	(struct usb_descriptor_header *) &adb_interface_desc,
+	(struct usb_descriptor_header *) &adb_highspeed_in_desc,
+	(struct usb_descriptor_header *) &adb_highspeed_out_desc,
+	NULL,
+};
+
+
+/* temporary variable used between adb_open() and adb_gadget_bind() */
+static struct adb_dev *_adb_dev;
+
+static atomic_t adb_enable_excl;
+
+static inline struct adb_dev *func_to_dev(struct usb_function *f)
+{
+	return container_of(f, struct adb_dev, function);
+}
+
+
+static struct usb_request *adb_request_new(struct usb_ep *ep, int buffer_size)
+{
+	struct usb_request *req = usb_ep_alloc_request(ep, GFP_KERNEL);
+	if (!req)
+		return NULL;
+
+	/* now allocate buffers for the requests */
+	req->buf = kmalloc(buffer_size, GFP_KERNEL);
+	if (!req->buf) {
+		usb_ep_free_request(ep, req);
+		return NULL;
+	}
+
+	return req;
+}
+
+static void adb_request_free(struct usb_request *req, struct usb_ep *ep)
+{
+	if (req) {
+		kfree(req->buf);
+		usb_ep_free_request(ep, req);
+	}
+}
+
+static inline int _lock(atomic_t *excl)
+{
+	if (atomic_inc_return(excl) == 1) {
+		return 0;
+	} else {
+		atomic_dec(excl);
+		return -1;
+	}
+}
+
+static inline void _unlock(atomic_t *excl)
+{
+	atomic_dec(excl);
+}
+
+/* add a request to the tail of a list */
+void req_put(struct adb_dev *dev, struct list_head *head,
+		struct usb_request *req)
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&dev->lock, flags);
+	list_add_tail(&req->list, head);
+	spin_unlock_irqrestore(&dev->lock, flags);
+}
+
+/* remove a request from the head of a list */
+struct usb_request *req_get(struct adb_dev *dev, struct list_head *head)
+{
+	unsigned long flags;
+	struct usb_request *req;
+
+	spin_lock_irqsave(&dev->lock, flags);
+	if (list_empty(head)) {
+		req = 0;
+	} else {
+		req = list_first_entry(head, struct usb_request, list);
+		list_del(&req->list);
+	}
+	spin_unlock_irqrestore(&dev->lock, flags);
+	return req;
+}
+
+static void adb_complete_in(struct usb_ep *ep, struct usb_request *req)
+{
+	struct adb_dev *dev = _adb_dev;
+
+	if (req->status != 0)
+		dev->error = 1;
+
+	req_put(dev, &dev->tx_idle, req);
+
+	wake_up(&dev->write_wq);
+}
+
+static void adb_complete_out(struct usb_ep *ep, struct usb_request *req)
+{
+	struct adb_dev *dev = _adb_dev;
+
+	if (req->status != 0) {
+		dev->error = 1;
+		req_put(dev, &dev->rx_idle, req);
+	} else {
+		req_put(dev, &dev->rx_done, req);
+	}
+
+	wake_up(&dev->read_wq);
+}
+
+static int __init create_bulk_endpoints(struct adb_dev *dev,
+				struct usb_endpoint_descriptor *in_desc,
+				struct usb_endpoint_descriptor *out_desc)
+{
+	struct usb_composite_dev *cdev = dev->cdev;
+	struct usb_request *req;
+	struct usb_ep *ep;
+	int i;
+
+	DBG(cdev, "create_bulk_endpoints dev: %p\n", dev);
+
+	ep = usb_ep_autoconfig(cdev->gadget, in_desc);
+	if (!ep) {
+		DBG(cdev, "usb_ep_autoconfig for ep_in failed\n");
+		return -ENODEV;
+	}
+	DBG(cdev, "usb_ep_autoconfig for ep_in got %s\n", ep->name);
+	ep->driver_data = dev;		/* claim the endpoint */
+	dev->ep_in = ep;
+
+	ep = usb_ep_autoconfig(cdev->gadget, out_desc);
+	if (!ep) {
+		DBG(cdev, "usb_ep_autoconfig for ep_out failed\n");
+		return -ENODEV;
+	}
+	DBG(cdev, "usb_ep_autoconfig for adb ep_out got %s\n", ep->name);
+	ep->driver_data = dev;		/* claim the endpoint */
+	dev->ep_out = ep;
+
+	/* now allocate requests for our endpoints */
+	for (i = 0; i < RX_REQ_MAX; i++) {
+		req = adb_request_new(dev->ep_out, BULK_BUFFER_SIZE);
+		if (!req)
+			goto fail;
+		req->complete = adb_complete_out;
+		req_put(dev, &dev->rx_idle, req);
+	}
+
+	for (i = 0; i < TX_REQ_MAX; i++) {
+		req = adb_request_new(dev->ep_in, BULK_BUFFER_SIZE);
+		if (!req)
+			goto fail;
+		req->complete = adb_complete_in;
+		req_put(dev, &dev->tx_idle, req);
+	}
+
+	return 0;
+
+fail:
+	printk(KERN_ERR "adb_bind() could not allocate requests\n");
+	return -1;
+}
+
+static ssize_t adb_read(struct file *fp, char __user *buf,
+				size_t count, loff_t *pos)
+{
+	struct adb_dev *dev = fp->private_data;
+	struct usb_composite_dev *cdev = dev->cdev;
+	struct usb_request *req;
+	int r = count, xfer;
+	int ret;
+
+	DBG(cdev, "adb_read(%d)\n", count);
+
+	if (_lock(&dev->read_excl))
+		return -EBUSY;
+
+	/* we will block until we're online */
+	while (!(dev->online || dev->error)) {
+		DBG(cdev, "adb_read: waiting for online state\n");
+		ret = wait_event_interruptible(dev->read_wq,
+				(dev->online || dev->error));
+		if (ret < 0) {
+			_unlock(&dev->read_excl);
+			return ret;
+		}
+	}
+
+	while (count > 0) {
+		if (dev->error) {
+			DBG(cdev, "adb_read dev->error\n");
+			r = -EIO;
+			break;
+		}
+
+		/* if we have idle read requests, get them queued */
+		while ((req = req_get(dev, &dev->rx_idle))) {
+requeue_req:
+			req->length = BULK_BUFFER_SIZE;
+			ret = usb_ep_queue(dev->ep_out, req, GFP_ATOMIC);
+
+			if (ret < 0) {
+				r = -EIO;
+				dev->error = 1;
+				req_put(dev, &dev->rx_idle, req);
+				goto fail;
+			} else {
+				DBG(cdev, "rx %p queue\n", req);
+			}
+		}
+
+		/* if we have data pending, give it to userspace */
+		if (dev->read_count > 0) {
+			if (dev->read_count < count)
+				xfer = dev->read_count;
+			else
+				xfer = count;
+
+			if (copy_to_user(buf, dev->read_buf, xfer)) {
+				r = -EFAULT;
+				break;
+			}
+			dev->read_buf += xfer;
+			dev->read_count -= xfer;
+			buf += xfer;
+			count -= xfer;
+
+			/* if we've emptied the buffer, release the request */
+			if (dev->read_count == 0) {
+				req_put(dev, &dev->rx_idle, dev->read_req);
+				dev->read_req = 0;
+			}
+			continue;
+		}
+
+		/* wait for a request to complete */
+		req = 0;
+		ret = wait_event_interruptible(dev->read_wq,
+			((req = req_get(dev, &dev->rx_done)) || dev->error));
+		if (req != 0) {
+			/* if we got a 0-len one we need to put it back into
+			** service.  if we made it the current read req we'd
+			** be stuck forever
+			*/
+			if (req->actual == 0)
+				goto requeue_req;
+
+			dev->read_req = req;
+			dev->read_count = req->actual;
+			dev->read_buf = req->buf;
+			DBG(cdev, "rx %p %d\n", req, req->actual);
+		}
+
+		if (ret < 0) {
+			r = ret;
+			break;
+		}
+	}
+
+fail:
+	_unlock(&dev->read_excl);
+	DBG(cdev, "adb_read returning %d\n", r);
+	return r;
+}
+
+static ssize_t adb_write(struct file *fp, const char __user *buf,
+				 size_t count, loff_t *pos)
+{
+	struct adb_dev *dev = fp->private_data;
+	struct usb_composite_dev *cdev = dev->cdev;
+	struct usb_request *req = 0;
+	int r = count, xfer;
+	int ret;
+
+	DBG(cdev, "adb_write(%d)\n", count);
+
+	if (_lock(&dev->write_excl))
+		return -EBUSY;
+
+	while (count > 0) {
+		if (dev->error) {
+			DBG(cdev, "adb_write dev->error\n");
+			r = -EIO;
+			break;
+		}
+
+		/* get an idle tx request to use */
+		req = 0;
+		ret = wait_event_interruptible(dev->write_wq,
+			((req = req_get(dev, &dev->tx_idle)) || dev->error));
+
+		if (ret < 0) {
+			r = ret;
+			break;
+		}
+
+		if (req != 0) {
+			if (count > BULK_BUFFER_SIZE)
+				xfer = BULK_BUFFER_SIZE;
+			else
+				xfer = count;
+			if (copy_from_user(req->buf, buf, xfer)) {
+				r = -EFAULT;
+				break;
+			}
+
+			req->length = xfer;
+			ret = usb_ep_queue(dev->ep_in, req, GFP_ATOMIC);
+			if (ret < 0) {
+				DBG(cdev, "adb_write: xfer error %d\n", ret);
+				dev->error = 1;
+				r = -EIO;
+				break;
+			}
+
+			buf += xfer;
+			count -= xfer;
+
+			/* zero this so we don't try to free it on error exit */
+			req = 0;
+		}
+	}
+
+	if (req)
+		req_put(dev, &dev->tx_idle, req);
+
+	_unlock(&dev->write_excl);
+	DBG(cdev, "adb_write returning %d\n", r);
+	return r;
+}
+
+static int adb_open(struct inode *ip, struct file *fp)
+{
+	printk(KERN_INFO "adb_open\n");
+	if (_lock(&_adb_dev->open_excl))
+		return -EBUSY;
+
+	fp->private_data = _adb_dev;
+
+	/* clear the error latch */
+	_adb_dev->error = 0;
+
+	return 0;
+}
+
+static int adb_release(struct inode *ip, struct file *fp)
+{
+	printk(KERN_INFO "adb_release\n");
+	_unlock(&_adb_dev->open_excl);
+	return 0;
+}
+
+/* file operations for ADB device /dev/android_adb */
+static struct file_operations adb_fops = {
+	.owner = THIS_MODULE,
+	.read = adb_read,
+	.write = adb_write,
+	.open = adb_open,
+	.release = adb_release,
+};
+
+static struct miscdevice adb_device = {
+	.minor = MISC_DYNAMIC_MINOR,
+	.name = shortname,
+	.fops = &adb_fops,
+};
+
+static int adb_enable_open(struct inode *ip, struct file *fp)
+{
+	if (atomic_inc_return(&adb_enable_excl) != 1) {
+		atomic_dec(&adb_enable_excl);
+		return -EBUSY;
+	}
+
+	printk(KERN_INFO "enabling adb\n");
+	android_enable_function(&_adb_dev->function, 1);
+
+	return 0;
+}
+
+static int adb_enable_release(struct inode *ip, struct file *fp)
+{
+	printk(KERN_INFO "disabling adb\n");
+	android_enable_function(&_adb_dev->function, 0);
+	atomic_dec(&adb_enable_excl);
+	return 0;
+}
+
+static const struct file_operations adb_enable_fops = {
+	.owner =   THIS_MODULE,
+	.open =    adb_enable_open,
+	.release = adb_enable_release,
+};
+
+static struct miscdevice adb_enable_device = {
+	.minor = MISC_DYNAMIC_MINOR,
+	.name = "android_adb_enable",
+	.fops = &adb_enable_fops,
+};
+
+static int
+adb_function_bind(struct usb_configuration *c, struct usb_function *f)
+{
+	struct usb_composite_dev *cdev = c->cdev;
+	struct adb_dev	*dev = func_to_dev(f);
+	int			id;
+	int			ret;
+
+	dev->cdev = cdev;
+	DBG(cdev, "adb_function_bind dev: %p\n", dev);
+
+	/* allocate interface ID(s) */
+	id = usb_interface_id(c, f);
+	if (id < 0)
+		return id;
+	adb_interface_desc.bInterfaceNumber = id;
+
+	/* allocate endpoints */
+	ret = create_bulk_endpoints(dev, &adb_fullspeed_in_desc,
+			&adb_fullspeed_out_desc);
+	if (ret)
+		return ret;
+
+	/* support high speed hardware */
+	if (gadget_is_dualspeed(c->cdev->gadget)) {
+		adb_highspeed_in_desc.bEndpointAddress =
+			adb_fullspeed_in_desc.bEndpointAddress;
+		adb_highspeed_out_desc.bEndpointAddress =
+			adb_fullspeed_out_desc.bEndpointAddress;
+	}
+
+	DBG(cdev, "%s speed %s: IN/%s, OUT/%s\n",
+			gadget_is_dualspeed(c->cdev->gadget) ? "dual" : "full",
+			f->name, dev->ep_in->name, dev->ep_out->name);
+	return 0;
+}
+
+static void
+adb_function_unbind(struct usb_configuration *c, struct usb_function *f)
+{
+	struct adb_dev	*dev = func_to_dev(f);
+	struct usb_request *req;
+
+	spin_lock_irq(&dev->lock);
+
+	while ((req = req_get(dev, &dev->rx_idle)))
+		adb_request_free(req, dev->ep_out);
+	while ((req = req_get(dev, &dev->tx_idle)))
+		adb_request_free(req, dev->ep_in);
+
+	dev->online = 0;
+	dev->error = 1;
+	spin_unlock_irq(&dev->lock);
+
+	misc_deregister(&adb_device);
+	misc_deregister(&adb_enable_device);
+	kfree(_adb_dev);
+	_adb_dev = NULL;
+}
+
+static int adb_function_set_alt(struct usb_function *f,
+		unsigned intf, unsigned alt)
+{
+	struct adb_dev	*dev = func_to_dev(f);
+	struct usb_composite_dev *cdev = f->config->cdev;
+	int ret;
+
+	DBG(cdev, "adb_function_set_alt intf: %d alt: %d\n", intf, alt);
+	ret = usb_ep_enable(dev->ep_in,
+			ep_choose(cdev->gadget,
+				&adb_highspeed_in_desc,
+				&adb_fullspeed_in_desc));
+	if (ret)
+		return ret;
+	ret = usb_ep_enable(dev->ep_out,
+			ep_choose(cdev->gadget,
+				&adb_highspeed_out_desc,
+				&adb_fullspeed_out_desc));
+	if (ret) {
+		usb_ep_disable(dev->ep_in);
+		return ret;
+	}
+	dev->online = 1;
+
+	/* readers may be blocked waiting for us to go online */
+	wake_up(&dev->read_wq);
+	return 0;
+}
+
+static void adb_function_disable(struct usb_function *f)
+{
+	struct adb_dev	*dev = func_to_dev(f);
+	struct usb_composite_dev	*cdev = dev->cdev;
+
+	DBG(cdev, "adb_function_disable\n");
+	dev->online = 0;
+	dev->error = 1;
+	usb_ep_disable(dev->ep_in);
+	usb_ep_disable(dev->ep_out);
+
+	/* readers may be blocked waiting for us to go online */
+	wake_up(&dev->read_wq);
+
+	VDBG(cdev, "%s disabled\n", dev->function.name);
+}
+
+static int adb_bind_config(struct usb_configuration *c)
+{
+	struct adb_dev *dev;
+	int ret;
+
+	printk(KERN_INFO "adb_bind_config\n");
+
+	dev = kzalloc(sizeof(*dev), GFP_KERNEL);
+	if (!dev)
+		return -ENOMEM;
+
+	spin_lock_init(&dev->lock);
+
+	init_waitqueue_head(&dev->read_wq);
+	init_waitqueue_head(&dev->write_wq);
+
+	atomic_set(&dev->open_excl, 0);
+	atomic_set(&dev->read_excl, 0);
+	atomic_set(&dev->write_excl, 0);
+
+	INIT_LIST_HEAD(&dev->rx_idle);
+	INIT_LIST_HEAD(&dev->rx_done);
+	INIT_LIST_HEAD(&dev->tx_idle);
+
+	dev->cdev = c->cdev;
+	dev->function.name = "adb";
+	dev->function.descriptors = fs_adb_descs;
+	dev->function.hs_descriptors = hs_adb_descs;
+	dev->function.bind = adb_function_bind;
+	dev->function.unbind = adb_function_unbind;
+	dev->function.set_alt = adb_function_set_alt;
+	dev->function.disable = adb_function_disable;
+
+	/* start disabled */
+	dev->function.disabled = 1;
+
+	/* _adb_dev must be set before calling usb_gadget_register_driver */
+	_adb_dev = dev;
+
+	ret = misc_register(&adb_device);
+	if (ret)
+		goto err1;
+	ret = misc_register(&adb_enable_device);
+	if (ret)
+		goto err2;
+
+	ret = usb_add_function(c, &dev->function);
+	if (ret)
+		goto err3;
+
+	return 0;
+
+err3:
+	misc_deregister(&adb_enable_device);
+err2:
+	misc_deregister(&adb_device);
+err1:
+	kfree(dev);
+	printk(KERN_ERR "adb gadget driver failed to initialize\n");
+	return ret;
+}
+
+static struct android_usb_function adb_function = {
+	.name = "adb",
+	.bind_config = adb_bind_config,
+};
+
+static int __init init(void)
+{
+	printk(KERN_INFO "f_adb init\n");
+	android_register_function(&adb_function);
+	return 0;
+}
+module_init(init);
--- linux-mvl-dove-2.6.32.orig/drivers/usb/host/r8a66597-hcd.c
+++ linux-mvl-dove-2.6.32/drivers/usb/host/r8a66597-hcd.c
@@ -35,7 +35,9 @@
 #include <linux/usb.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/mm.h>
 #include <linux/irq.h>
+#include <asm/cacheflush.h>
 
 #include "../core/hcd.h"
 #include "r8a66597.h"
@@ -216,8 +218,17 @@
 {
 	int port;
 
+	/* disable interrupts */
 	r8a66597_write(r8a66597, 0, INTENB0);
-	r8a66597_write(r8a66597, 0, INTSTS0);
+	r8a66597_write(r8a66597, 0, INTENB1);
+	r8a66597_write(r8a66597, 0, BRDYENB);
+	r8a66597_write(r8a66597, 0, BEMPENB);
+	r8a66597_write(r8a66597, 0, NRDYENB);
+
+	/* clear status */
+	r8a66597_write(r8a66597, 0, BRDYSTS);
+	r8a66597_write(r8a66597, 0, NRDYSTS);
+	r8a66597_write(r8a66597, 0, BEMPSTS);
 
 	for (port = 0; port < r8a66597->max_root_hub; port++)
 		r8a66597_disable_port(r8a66597, port);
@@ -407,7 +418,7 @@
 
 /* this function must be called with interrupt disabled */
 static void free_usb_address(struct r8a66597 *r8a66597,
-			     struct r8a66597_device *dev)
+			     struct r8a66597_device *dev, int reset)
 {
 	int port;
 
@@ -419,7 +430,13 @@
 	dev->state = USB_STATE_DEFAULT;
 	r8a66597->address_map &= ~(1 << dev->address);
 	dev->address = 0;
-	dev_set_drvdata(&dev->udev->dev, NULL);
+	/*
+	 * Only when resetting USB, it is necessary to erase drvdata. When
+	 * a usb device with usb hub is disconnect, "dev->udev" is already
+	 * freed on usb_desconnect(). So we cannot access the data.
+	 */
+	if (reset)
+		dev_set_drvdata(&dev->udev->dev, NULL);
 	list_del(&dev->device_list);
 	kfree(dev);
 
@@ -811,6 +828,26 @@
 	enable_r8a66597_pipe_dma(r8a66597, dev, pipe, urb);
 }
 
+static void r8a66597_urb_done(struct r8a66597 *r8a66597, struct urb *urb,
+			      int status)
+__releases(r8a66597->lock)
+__acquires(r8a66597->lock)
+{
+	if (usb_pipein(urb->pipe) && usb_pipetype(urb->pipe) != PIPE_CONTROL) {
+		void *ptr;
+
+		for (ptr = urb->transfer_buffer;
+		     ptr < urb->transfer_buffer + urb->transfer_buffer_length;
+		     ptr += PAGE_SIZE)
+			flush_dcache_page(virt_to_page(ptr));
+	}
+
+	usb_hcd_unlink_urb_from_ep(r8a66597_to_hcd(r8a66597), urb);
+	spin_unlock(&r8a66597->lock);
+	usb_hcd_giveback_urb(r8a66597_to_hcd(r8a66597), urb, status);
+	spin_lock(&r8a66597->lock);
+}
+
 /* this function must be called with interrupt disabled */
 static void force_dequeue(struct r8a66597 *r8a66597, u16 pipenum, u16 address)
 {
@@ -831,15 +868,9 @@
 		list_del(&td->queue);
 		kfree(td);
 
-		if (urb) {
-			usb_hcd_unlink_urb_from_ep(r8a66597_to_hcd(r8a66597),
-					urb);
-
-			spin_unlock(&r8a66597->lock);
-			usb_hcd_giveback_urb(r8a66597_to_hcd(r8a66597), urb,
-					-ENODEV);
-			spin_lock(&r8a66597->lock);
-		}
+		if (urb)
+			r8a66597_urb_done(r8a66597, urb, -ENODEV);
+
 		break;
 	}
 }
@@ -1042,7 +1073,7 @@
 	struct r8a66597_device *dev = r8a66597->root_hub[port].dev;
 
 	disable_r8a66597_pipe_all(r8a66597, dev);
-	free_usb_address(r8a66597, dev);
+	free_usb_address(r8a66597, dev, 0);
 
 	start_root_hub_sampling(r8a66597, port, 0);
 }
@@ -1276,10 +1307,7 @@
 		if (usb_pipeisoc(urb->pipe))
 			urb->start_frame = r8a66597_get_frame(hcd);
 
-		usb_hcd_unlink_urb_from_ep(r8a66597_to_hcd(r8a66597), urb);
-		spin_unlock(&r8a66597->lock);
-		usb_hcd_giveback_urb(hcd, urb, status);
-		spin_lock(&r8a66597->lock);
+		r8a66597_urb_done(r8a66597, urb, status);
 	}
 
 	if (restart) {
@@ -2063,7 +2091,7 @@
 				spin_lock_irqsave(&r8a66597->lock, flags);
 				dev = get_r8a66597_device(r8a66597, addr);
 				disable_r8a66597_pipe_all(r8a66597, dev);
-				free_usb_address(r8a66597, dev);
+				free_usb_address(r8a66597, dev, 0);
 				put_child_connect_map(r8a66597, addr);
 				spin_unlock_irqrestore(&r8a66597->lock, flags);
 			}
@@ -2206,7 +2234,7 @@
 			rh->port |= (1 << USB_PORT_FEAT_RESET);
 
 			disable_r8a66597_pipe_all(r8a66597, dev);
-			free_usb_address(r8a66597, dev);
+			free_usb_address(r8a66597, dev, 1);
 
 			r8a66597_mdfy(r8a66597, USBRST, USBRST | UACT,
 				      get_dvstctr_reg(port));
@@ -2470,6 +2498,12 @@
 	r8a66597->rh_timer.data = (unsigned long)r8a66597;
 	r8a66597->reg = (unsigned long)reg;
 
+	/* make sure no interrupts are pending */
+	ret = r8a66597_clock_enable(r8a66597);
+	if (ret < 0)
+		goto clean_up3;
+	disable_controller(r8a66597);
+
 	for (i = 0; i < R8A66597_MAX_NUM_PIPE; i++) {
 		INIT_LIST_HEAD(&r8a66597->pipe_queue[i]);
 		init_timer(&r8a66597->td_timer[i]);
--- linux-mvl-dove-2.6.32.orig/drivers/usb/host/pci-quirks.c
+++ linux-mvl-dove-2.6.32/drivers/usb/host/pci-quirks.c
@@ -34,6 +34,8 @@
 #define OHCI_INTRSTATUS		0x0c
 #define OHCI_INTRENABLE		0x10
 #define OHCI_INTRDISABLE	0x14
+#define OHCI_FMINTERVAL		0x34
+#define OHCI_HCR		(1 << 0)	/* host controller reset */
 #define OHCI_OCR		(1 << 3)	/* ownership change request */
 #define OHCI_CTRL_RWC		(1 << 9)	/* remote wakeup connected */
 #define OHCI_CTRL_IR		(1 << 8)	/* interrupt routing */
@@ -169,6 +171,7 @@
 static void __devinit quirk_usb_handoff_ohci(struct pci_dev *pdev)
 {
 	void __iomem *base;
+	u32 control;
 
 	if (!mmio_resource_enabled(pdev, 0))
 		return;
@@ -177,10 +180,14 @@
 	if (base == NULL)
 		return;
 
+	control = readl(base + OHCI_CONTROL);
+
 /* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */
-#ifndef __hppa__
-{
-	u32 control = readl(base + OHCI_CONTROL);
+#ifdef __hppa__
+#define	OHCI_CTRL_MASK		(OHCI_CTRL_RWC | OHCI_CTRL_IR)
+#else
+#define	OHCI_CTRL_MASK		OHCI_CTRL_RWC
+
 	if (control & OHCI_CTRL_IR) {
 		int wait_time = 500; /* arbitrary; 5 seconds */
 		writel(OHCI_INTR_OC, base + OHCI_INTRENABLE);
@@ -194,13 +201,38 @@
 			dev_warn(&pdev->dev, "OHCI: BIOS handoff failed"
 					" (BIOS bug?) %08x\n",
 					readl(base + OHCI_CONTROL));
-
-		/* reset controller, preserving RWC */
-		writel(control & OHCI_CTRL_RWC, base + OHCI_CONTROL);
 	}
-}
 #endif
 
+	/* reset controller, preserving RWC (and possibly IR) */
+	writel(control & OHCI_CTRL_MASK, base + OHCI_CONTROL);
+	readl(base + OHCI_CONTROL);
+
+	/* Some NVIDIA controllers stop working if kept in RESET for too long */
+	if (pdev->vendor == PCI_VENDOR_ID_NVIDIA) {
+		u32 fminterval;
+		int cnt;
+
+		/* drive reset for at least 50 ms (7.1.7.5) */
+		msleep(50);
+
+		/* software reset of the controller, preserving HcFmInterval */
+		fminterval = readl(base + OHCI_FMINTERVAL);
+		writel(OHCI_HCR, base + OHCI_CMDSTATUS);
+
+		/* reset requires max 10 us delay */
+		for (cnt = 30; cnt > 0; --cnt) {	/* ... allow extra time */
+			if ((readl(base + OHCI_CMDSTATUS) & OHCI_HCR) == 0)
+				break;
+			udelay(1);
+		}
+		writel(fminterval, base + OHCI_FMINTERVAL);
+
+		/* Now we're in the SUSPEND state with all devices reset
+		 * and wakeups and interrupts disabled
+		 */
+	}
+
 	/*
 	 * disable interrupts
 	 */
--- linux-mvl-dove-2.6.32.orig/drivers/usb/host/uhci-hub.c
+++ linux-mvl-dove-2.6.32/drivers/usb/host/uhci-hub.c
@@ -167,7 +167,7 @@
 				/* Port received a wakeup request */
 				set_bit(port, &uhci->resuming_ports);
 				uhci->ports_timeout = jiffies +
-						msecs_to_jiffies(20);
+						msecs_to_jiffies(25);
 
 				/* Make sure we see the port again
 				 * after the resuming period is over. */
--- linux-mvl-dove-2.6.32.orig/drivers/usb/host/ohci.h
+++ linux-mvl-dove-2.6.32/drivers/usb/host/ohci.h
@@ -403,6 +403,7 @@
 #define	OHCI_QUIRK_HUB_POWER	0x100			/* distrust firmware power/oc setup */
 #define	OHCI_QUIRK_AMD_ISO	0x200			/* ISO transfers*/
 #define	OHCI_QUIRK_AMD_PREFETCH	0x400			/* pre-fetch for ISO transfer */
+#define	OHCI_QUIRK_SHUTDOWN	0x800			/* nVidia power bug */
 	// there are also chip quirks/bugs in init logic
 
 	struct work_struct	nec_work;	/* Worker for NEC quirk */
--- linux-mvl-dove-2.6.32.orig/drivers/usb/host/ehci-orion.c
+++ linux-mvl-dove-2.6.32/drivers/usb/host/ehci-orion.c
@@ -12,6 +12,7 @@
 #include <linux/module.h>
 #include <linux/platform_device.h>
 #include <linux/mbus.h>
+#include <linux/clk.h>
 #include <plat/ehci-orion.h>
 
 #define rdl(off)	__raw_readl(hcd->regs + (off))
@@ -25,6 +26,7 @@
 #define USB_WINDOW_BASE(i)	(0x324 + ((i) << 4))
 #define USB_IPG			0x360
 #define USB_PHY_PWR_CTRL	0x400
+#define USB_PHY_PLL_CTRL	0x410
 #define USB_PHY_TX_CTRL		0x420
 #define USB_PHY_RX_CTRL		0x430
 #define USB_PHY_IVREF_CTRL	0x440
@@ -42,6 +44,7 @@
 	wrl(USB_CAUSE, 0);
 	wrl(USB_MASK, 0);
 
+#if 0
 	/*
 	 * Reset controller
 	 */
@@ -98,6 +101,94 @@
 	 * GL# USB-4 Setup USB Host mode
 	 */
 	wrl(USB_MODE, 0x13);
+#endif
+}
+
+static void orion_usb_phy_v2_setup(struct usb_hcd *hcd)
+{
+	u32 reg;
+
+	/* The below GLs are according to the Orion Errata document */
+	/*
+	 * Clear interrupt cause and mask
+	 */
+	wrl(USB_CAUSE, 0);
+	wrl(USB_MASK, 0);
+
+	/*
+	 * Reset controller
+	 */
+	wrl(USB_CMD, rdl(USB_CMD) | 0x2);
+	while (rdl(USB_CMD) & 0x2);
+
+
+	/* Clear bits 30 and 31.
+         */
+	reg = rdl(USB_IPG);
+	reg &= ~(0x3 << 30);
+	/* Change bits[14:8] - IPG for non Start of Frame Packets
+	 * from 0x9(default) to 0xD
+	 */
+	reg &= ~(0x7f << 8);
+	reg |= 0xd << 8;
+	wrl(USB_IPG, reg);
+
+	/* VCO recalibrate */
+	wrl(USB_PHY_PLL_CTRL, rdl(USB_PHY_PLL_CTRL) | (1 << 21));
+	udelay(100);
+	wrl(USB_PHY_PLL_CTRL, rdl(USB_PHY_PLL_CTRL) & ~(1 << 21));
+	
+	reg = rdl(USB_PHY_TX_CTRL);
+	reg |= 1 << 11; /* LOWVDD_EN */
+	reg |= 1 << 12; /* REG_RCAL_START */
+	/* bits[16:14]     (IMPCAL_VTH[2:0] = 101) */
+	reg &= ~(0x7 << 14);
+	reg |= (0x5 << 14);
+	reg &= ~(1 << 21); /* TX_BLOCK_EN */
+	reg &= ~(1 << 31); /* HS_STRESS_CTRL */
+	wrl(USB_PHY_TX_CTRL, reg);
+	udelay(100);
+	reg = rdl(USB_PHY_TX_CTRL);
+	reg &= ~(1 << 12); /* REG_RCAL_START */
+	wrl(USB_PHY_TX_CTRL, reg);
+
+	reg = rdl(USB_PHY_RX_CTRL);
+	reg &= ~(3 << 2); /* LPL_COEF */
+	reg |= 1 << 2;
+
+	reg &= ~(0xf << 4);
+	reg |= 0xc << 4; /* SQ_THRESH */ 
+	reg &= ~(3 << 15); /* REG_SQ_LENGTH */
+	reg |= 1 << 15;
+	reg &= ~(1 << 21); /* CDR_FASTLOCK_EN */
+	reg &= ~(3 << 26); /* EDGE_DET */
+	wrl(USB_PHY_RX_CTRL, reg);
+
+
+	/*
+	 * USB PHY IVREF Control
+	 * TXVDD12[9:8]=0x3
+	 */
+	wrl(USB_PHY_IVREF_CTRL, rdl(USB_PHY_IVREF_CTRL) | (0x3 << 8));
+
+
+	/*
+	 * GL# USB-3 GL# USB-9: USB PHY Test Group Control
+	 * REG_FIFO_SQ_RST[15]=0
+	 */
+	wrl(USB_PHY_TST_GRP_CTRL, rdl(USB_PHY_TST_GRP_CTRL) & ~0x8000);
+
+	/*
+	 * Stop and reset controller
+	 */
+	wrl(USB_CMD, rdl(USB_CMD) & ~0x1);
+	wrl(USB_CMD, rdl(USB_CMD) | 0x2);
+	while (rdl(USB_CMD) & 0x2);
+
+	/*
+	 * GL# USB-4 Setup USB Host mode
+	 */
+	wrl(USB_MODE, 0x3);
 }
 
 static int ehci_orion_setup(struct usb_hcd *hcd)
@@ -190,6 +281,35 @@
 	}
 }
 
+static void __devinit
+ehci_orion_hw_init(struct usb_hcd *hcd,  struct orion_ehci_data *pd)
+{
+	/*
+	 * (Re-)program MBUS remapping windows if we are asked to.
+	 */
+	if (pd != NULL && pd->dram != NULL)
+		ehci_orion_conf_mbus_windows(hcd, pd->dram);
+
+
+	/*
+	 * setup Orion USB controller.
+	 */
+	switch (pd->phy_version) {
+	case EHCI_PHY_NA:	/* dont change USB phy settings */
+		break;
+	case EHCI_PHY_ORION:
+		orion_usb_phy_v1_setup(hcd);
+		break;
+	case EHCI_PHY_DOVE:
+		orion_usb_phy_v2_setup(hcd);
+		break;
+	case EHCI_PHY_DD:
+	case EHCI_PHY_KW:
+	default:
+		printk(KERN_WARNING "Orion ehci -USB phy version isn't supported.\n");
+	}
+
+}
 static int __devinit ehci_orion_drv_probe(struct platform_device *pdev)
 {
 	struct orion_ehci_data *pd = pdev->dev.platform_data;
@@ -243,6 +363,14 @@
 		goto err3;
 	}
 
+#if defined(CONFIG_HAVE_CLK)
+	hcd->clk = clk_get(&pdev->dev, NULL);
+	if (IS_ERR(hcd->clk))
+		dev_notice(&pdev->dev, "cannot get clkdev\n");
+	else
+		clk_enable(hcd->clk);
+#endif
+
 	hcd->rsrc_start = res->start;
 	hcd->rsrc_len = res->end - res->start + 1;
 	hcd->regs = regs;
@@ -255,26 +383,7 @@
 	hcd->has_tt = 1;
 	ehci->sbrn = 0x20;
 
-	/*
-	 * (Re-)program MBUS remapping windows if we are asked to.
-	 */
-	if (pd != NULL && pd->dram != NULL)
-		ehci_orion_conf_mbus_windows(hcd, pd->dram);
-
-	/*
-	 * setup Orion USB controller.
-	 */
-	switch (pd->phy_version) {
-	case EHCI_PHY_NA:	/* dont change USB phy settings */
-		break;
-	case EHCI_PHY_ORION:
-		orion_usb_phy_v1_setup(hcd);
-		break;
-	case EHCI_PHY_DD:
-	case EHCI_PHY_KW:
-	default:
-		printk(KERN_WARNING "Orion ehci -USB phy version isn't supported.\n");
-	}
+	ehci_orion_hw_init(hcd, pd);
 
 	err = usb_add_hcd(hcd, irq, IRQF_SHARED | IRQF_DISABLED);
 	if (err)
@@ -283,6 +392,13 @@
 	return 0;
 
 err4:
+#if defined(CONFIG_HAVE_CLK)
+	if (!IS_ERR(hcd->clk)) {
+		clk_disable(hcd->clk);
+		clk_put(hcd->clk);
+	}
+#endif
+
 	usb_put_hcd(hcd);
 err3:
 	iounmap(regs);
@@ -303,15 +419,114 @@
 	iounmap(hcd->regs);
 	release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
 	usb_put_hcd(hcd);
+#if defined(CONFIG_HAVE_CLK)
+	if (!IS_ERR(hcd->clk)) {
+		clk_disable(hcd->clk);
+		clk_put(hcd->clk);
+	}
+#endif
+
+	return 0;
+}
+
+#ifdef CONFIG_PM
+static int ehci_orion_suspend(struct platform_device *pdev,
+			      pm_message_t state)
+{
+	struct usb_hcd *hcd = platform_get_drvdata(pdev);
+	struct ehci_hcd		*ehci = hcd_to_ehci(hcd);
+	unsigned long		flags;
+	int			rc = 0;
+
+	if (time_before(jiffies, ehci->next_statechange))
+		msleep(10);
+
+	/* Root hub was already suspended. Disable irq emission and
+	 * mark HW unaccessible, bail out if RH has been resumed. Use
+	 * the spinlock to properly synchronize with possible pending
+	 * RH suspend or resume activity.
+	 *
+	 * This is still racy as hcd->state is manipulated outside of
+	 * any locks =P But that will be a different fix.
+	 */
+	spin_lock_irqsave (&ehci->lock, flags);
+	if (hcd->state != HC_STATE_SUSPENDED) {
+		rc = -EINVAL;
+		goto bail;
+	}
+	ehci_writel(ehci, 0, &ehci->regs->intr_enable);
+	(void)ehci_readl(ehci, &ehci->regs->intr_enable);
+
+	/* make sure snapshot being resumed re-enumerates everything */
+	if (state.event == PM_EVENT_PRETHAW) {
+		ehci_halt(ehci);
+		ehci_reset(ehci);
+	}
+
+	clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
+ bail:
+	spin_unlock_irqrestore (&ehci->lock, flags);
+
+	// could save FLADJ in case of Vaux power loss
+	// ... we'd only use it to handle clock skew
+
+	return rc;
+}
+static int ehci_orion_resume(struct platform_device *pdev)
+{
+	struct orion_ehci_data *pd = pdev->dev.platform_data;
+	struct usb_hcd *hcd = platform_get_drvdata(pdev);
+	struct ehci_hcd		*ehci = hcd_to_ehci(hcd);
+	
+	// maybe restore FLADJ
+
+	if (time_before(jiffies, ehci->next_statechange))
+		msleep(100);
+
+	/* Mark hardware accessible again as we are out of D3 state by now */
+	set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
+
+	ehci_dbg(ehci, "lost power, restarting\n");
+	usb_root_hub_lost_power(hcd->self.root_hub);
 
+	/* Else reset, to cope with power loss or flush-to-storage
+	 * style "resume" having let BIOS kick in during reboot.
+	 */
+	(void) ehci_halt(ehci);
+	(void) ehci_reset(ehci);
+	ehci_orion_hw_init(hcd, pd);
+
+	/* emptying the schedule aborts any urbs */
+	spin_lock_irq(&ehci->lock);
+	if (ehci->reclaim)
+		end_unlink_async(ehci);
+	ehci_work(ehci);
+	spin_unlock_irq(&ehci->lock);
+
+	ehci_writel(ehci, ehci->command, &ehci->regs->command);
+	ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
+	ehci_readl(ehci, &ehci->regs->command);	/* unblock posted writes */
+
+	/* here we "know" root ports should always stay powered */
+	ehci_port_power(ehci, 1);
+
+	hcd->state = HC_STATE_SUSPENDED;
 	return 0;
+
 }
 
+#else
+#define ehci_orion_suspend	NULL
+#define ehci_orion_resume	NULL
+#endif
+
 MODULE_ALIAS("platform:orion-ehci");
 
 static struct platform_driver ehci_orion_driver = {
 	.probe		= ehci_orion_drv_probe,
 	.remove		= __exit_p(ehci_orion_drv_remove),
+	.suspend	= ehci_orion_suspend,
+	.resume		= ehci_orion_resume,
 	.shutdown	= usb_hcd_platform_shutdown,
 	.driver.name	= "orion-ehci",
 };
--- linux-mvl-dove-2.6.32.orig/drivers/usb/host/ehci-mem.c
+++ linux-mvl-dove-2.6.32/drivers/usb/host/ehci-mem.c
@@ -136,7 +136,7 @@
 
 static void ehci_mem_cleanup (struct ehci_hcd *ehci)
 {
-	free_cached_itd_list(ehci);
+	free_cached_lists(ehci);
 	if (ehci->async)
 		qh_put (ehci->async);
 	ehci->async = NULL;
--- linux-mvl-dove-2.6.32.orig/drivers/usb/host/xhci-ring.c
+++ linux-mvl-dove-2.6.32/drivers/usb/host/xhci-ring.c
@@ -124,7 +124,7 @@
 		*seg = (*seg)->next;
 		*trb = ((*seg)->trbs);
 	} else {
-		*trb = (*trb)++;
+		(*trb)++;
 	}
 }
 
@@ -241,10 +241,27 @@
 	int i;
 	union xhci_trb *enq = ring->enqueue;
 	struct xhci_segment *enq_seg = ring->enq_seg;
+	struct xhci_segment *cur_seg;
+	unsigned int left_on_ring;
 
 	/* Check if ring is empty */
-	if (enq == ring->dequeue)
+	if (enq == ring->dequeue) {
+		/* Can't use link trbs */
+		left_on_ring = TRBS_PER_SEGMENT - 1;
+		for (cur_seg = enq_seg->next; cur_seg != enq_seg;
+				cur_seg = cur_seg->next)
+			left_on_ring += TRBS_PER_SEGMENT - 1;
+
+		/* Always need one TRB free in the ring. */
+		left_on_ring -= 1;
+		if (num_trbs > left_on_ring) {
+			xhci_warn(xhci, "Not enough room on ring; "
+					"need %u TRBs, %u TRBs left\n",
+					num_trbs, left_on_ring);
+			return 0;
+		}
 		return 1;
+	}
 	/* Make sure there's an extra empty TRB available */
 	for (i = 0; i <= num_trbs; ++i) {
 		if (enq == ring->dequeue)
@@ -333,7 +350,8 @@
 	while (cur_seg->trbs > trb ||
 			&cur_seg->trbs[TRBS_PER_SEGMENT - 1] < trb) {
 		generic_trb = &cur_seg->trbs[TRBS_PER_SEGMENT - 1].generic;
-		if (TRB_TYPE(generic_trb->field[3]) == TRB_LINK &&
+		if ((generic_trb->field[3] & TRB_TYPE_BITMASK) ==
+				TRB_TYPE(TRB_LINK) &&
 				(generic_trb->field[3] & LINK_TOGGLE))
 			*cycle_state = ~(*cycle_state) & 0x1;
 		cur_seg = cur_seg->next;
@@ -373,8 +391,11 @@
 	state->new_deq_seg = find_trb_seg(cur_td->start_seg,
 			dev->eps[ep_index].stopped_trb,
 			&state->new_cycle_state);
-	if (!state->new_deq_seg)
-		BUG();
+	if (!state->new_deq_seg) {
+		WARN_ON(1);
+		return;
+	}
+
 	/* Dig out the cycle state saved by the xHC during the stop ep cmd */
 	xhci_dbg(xhci, "Finding endpoint context\n");
 	ep_ctx = xhci_get_ep_ctx(xhci, dev->out_ctx, ep_index);
@@ -385,15 +406,31 @@
 	state->new_deq_seg = find_trb_seg(state->new_deq_seg,
 			state->new_deq_ptr,
 			&state->new_cycle_state);
-	if (!state->new_deq_seg)
-		BUG();
+	if (!state->new_deq_seg) {
+		WARN_ON(1);
+		return;
+	}
 
 	trb = &state->new_deq_ptr->generic;
-	if (TRB_TYPE(trb->field[3]) == TRB_LINK &&
+	if ((trb->field[3] & TRB_TYPE_BITMASK) == TRB_TYPE(TRB_LINK) &&
 				(trb->field[3] & LINK_TOGGLE))
 		state->new_cycle_state = ~(state->new_cycle_state) & 0x1;
 	next_trb(xhci, ep_ring, &state->new_deq_seg, &state->new_deq_ptr);
 
+	/*
+	 * If there is only one segment in a ring, find_trb_seg()'s while loop
+	 * will not run, and it will return before it has a chance to see if it
+	 * needs to toggle the cycle bit.  It can't tell if the stalled transfer
+	 * ended just before the link TRB on a one-segment ring, or if the TD
+	 * wrapped around the top of the ring, because it doesn't have the TD in
+	 * question.  Look for the one-segment case where stalled TRB's address
+	 * is greater than the new dequeue pointer address.
+	 */
+	if (ep_ring->first_seg == ep_ring->first_seg->next &&
+			state->new_deq_ptr < dev->eps[ep_index].stopped_trb)
+		state->new_cycle_state ^= 0x1;
+	xhci_dbg(xhci, "Cycle state = 0x%x\n", state->new_cycle_state);
+
 	/* Don't update the ring cycle state for the producer (us). */
 	xhci_dbg(xhci, "New dequeue segment = %p (virtual)\n",
 			state->new_deq_seg);
@@ -548,6 +585,8 @@
 		/* Otherwise just ring the doorbell to restart the ring */
 		ring_ep_doorbell(xhci, slot_id, ep_index);
 	}
+	ep->stopped_td = NULL;
+	ep->stopped_trb = NULL;
 
 	/*
 	 * Drop the lock and complete the URBs in the cancelled TD list.
@@ -1065,8 +1104,13 @@
 
 			ep->stopped_td = td;
 			ep->stopped_trb = event_trb;
+
 			xhci_queue_reset_ep(xhci, slot_id, ep_index);
 			xhci_cleanup_stalled_ring(xhci, td->urb->dev, ep_index);
+
+			ep->stopped_td = NULL;
+			ep->stopped_trb = NULL;
+
 			xhci_ring_cmd_db(xhci);
 			goto td_cleanup;
 		default:
@@ -1186,8 +1230,10 @@
 			for (cur_trb = ep_ring->dequeue, cur_seg = ep_ring->deq_seg;
 					cur_trb != event_trb;
 					next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) {
-				if (TRB_TYPE(cur_trb->generic.field[3]) != TRB_TR_NOOP &&
-						TRB_TYPE(cur_trb->generic.field[3]) != TRB_LINK)
+				if ((cur_trb->generic.field[3] &
+				 TRB_TYPE_BITMASK) != TRB_TYPE(TRB_TR_NOOP) &&
+				    (cur_trb->generic.field[3] &
+				 TRB_TYPE_BITMASK) != TRB_TYPE(TRB_LINK))
 					td->urb->actual_length +=
 						TRB_LEN(cur_trb->generic.field[2]);
 			}
@@ -1458,12 +1504,13 @@
 
 		/* Scatter gather list entries may cross 64KB boundaries */
 		running_total = TRB_MAX_BUFF_SIZE -
-			(sg_dma_address(sg) & ((1 << TRB_MAX_BUFF_SHIFT) - 1));
+			(sg_dma_address(sg) & (TRB_MAX_BUFF_SIZE - 1));
+		running_total &= TRB_MAX_BUFF_SIZE - 1;
 		if (running_total != 0)
 			num_trbs++;
 
 		/* How many more 64KB chunks to transfer, how many more TRBs? */
-		while (running_total < sg_dma_len(sg)) {
+		while (running_total < sg_dma_len(sg) && running_total < temp) {
 			num_trbs++;
 			running_total += TRB_MAX_BUFF_SIZE;
 		}
@@ -1488,11 +1535,11 @@
 static void check_trb_math(struct urb *urb, int num_trbs, int running_total)
 {
 	if (num_trbs != 0)
-		dev_dbg(&urb->dev->dev, "%s - ep %#x - Miscalculated number of "
+		dev_err(&urb->dev->dev, "%s - ep %#x - Miscalculated number of "
 				"TRBs, %d left\n", __func__,
 				urb->ep->desc.bEndpointAddress, num_trbs);
 	if (running_total != urb->transfer_buffer_length)
-		dev_dbg(&urb->dev->dev, "%s - ep %#x - Miscalculated tx length, "
+		dev_err(&urb->dev->dev, "%s - ep %#x - Miscalculated tx length, "
 				"queued %#x (%d), asked for %#x (%d)\n",
 				__func__,
 				urb->ep->desc.bEndpointAddress,
@@ -1599,8 +1646,7 @@
 	sg = urb->sg->sg;
 	addr = (u64) sg_dma_address(sg);
 	this_sg_len = sg_dma_len(sg);
-	trb_buff_len = TRB_MAX_BUFF_SIZE -
-		(addr & ((1 << TRB_MAX_BUFF_SHIFT) - 1));
+	trb_buff_len = TRB_MAX_BUFF_SIZE - (addr & (TRB_MAX_BUFF_SIZE - 1));
 	trb_buff_len = min_t(int, trb_buff_len, this_sg_len);
 	if (trb_buff_len > urb->transfer_buffer_length)
 		trb_buff_len = urb->transfer_buffer_length;
@@ -1635,7 +1681,7 @@
 				(unsigned int) (addr + TRB_MAX_BUFF_SIZE) & ~(TRB_MAX_BUFF_SIZE - 1),
 				(unsigned int) addr + trb_buff_len);
 		if (TRB_MAX_BUFF_SIZE -
-				(addr & ((1 << TRB_MAX_BUFF_SHIFT) - 1)) < trb_buff_len) {
+				(addr & (TRB_MAX_BUFF_SIZE - 1)) < trb_buff_len) {
 			xhci_warn(xhci, "WARN: sg dma xfer crosses 64KB boundaries!\n");
 			xhci_dbg(xhci, "Next boundary at %#x, end dma = %#x\n",
 					(unsigned int) (addr + TRB_MAX_BUFF_SIZE) & ~(TRB_MAX_BUFF_SIZE - 1),
@@ -1673,7 +1719,7 @@
 		}
 
 		trb_buff_len = TRB_MAX_BUFF_SIZE -
-			(addr & ((1 << TRB_MAX_BUFF_SHIFT) - 1));
+			(addr & (TRB_MAX_BUFF_SIZE - 1));
 		trb_buff_len = min_t(int, trb_buff_len, this_sg_len);
 		if (running_total + trb_buff_len > urb->transfer_buffer_length)
 			trb_buff_len =
@@ -1708,7 +1754,8 @@
 	num_trbs = 0;
 	/* How much data is (potentially) left before the 64KB boundary? */
 	running_total = TRB_MAX_BUFF_SIZE -
-		(urb->transfer_dma & ((1 << TRB_MAX_BUFF_SHIFT) - 1));
+		(urb->transfer_dma & (TRB_MAX_BUFF_SIZE - 1));
+	running_total &= TRB_MAX_BUFF_SIZE - 1;
 
 	/* If there's some data on this 64KB chunk, or we have to send a
 	 * zero-length transfer, we need at least one TRB
@@ -1747,8 +1794,8 @@
 	/* How much data is in the first TRB? */
 	addr = (u64) urb->transfer_dma;
 	trb_buff_len = TRB_MAX_BUFF_SIZE -
-		(urb->transfer_dma & ((1 << TRB_MAX_BUFF_SHIFT) - 1));
-	if (urb->transfer_buffer_length < trb_buff_len)
+		(urb->transfer_dma & (TRB_MAX_BUFF_SIZE - 1));
+	if (trb_buff_len > urb->transfer_buffer_length)
 		trb_buff_len = urb->transfer_buffer_length;
 
 	first_trb = true;
--- linux-mvl-dove-2.6.32.orig/drivers/usb/host/xhci-mem.c
+++ linux-mvl-dove-2.6.32/drivers/usb/host/xhci-mem.c
@@ -496,6 +496,19 @@
 	return EP_INTERVAL(interval);
 }
 
+/* The "Mult" field in the endpoint context is only set for SuperSpeed devices.
+ * High speed endpoint descriptors can define "the number of additional
+ * transaction opportunities per microframe", but that goes in the Max Burst
+ * endpoint context field.
+ */
+static inline u32 xhci_get_endpoint_mult(struct usb_device *udev,
+		struct usb_host_endpoint *ep)
+{
+	if (udev->speed != USB_SPEED_SUPER || !ep->ss_ep_comp)
+		return 0;
+	return ep->ss_ep_comp->desc.bmAttributes;
+}
+
 static inline u32 xhci_get_endpoint_type(struct usb_device *udev,
 		struct usb_host_endpoint *ep)
 {
@@ -526,6 +539,36 @@
 	return type;
 }
 
+/* Return the maximum endpoint service interval time (ESIT) payload.
+ * Basically, this is the maxpacket size, multiplied by the burst size
+ * and mult size.
+ */
+static inline u32 xhci_get_max_esit_payload(struct xhci_hcd *xhci,
+		struct usb_device *udev,
+		struct usb_host_endpoint *ep)
+{
+	int max_burst;
+	int max_packet;
+
+	/* Only applies for interrupt or isochronous endpoints */
+	if (usb_endpoint_xfer_control(&ep->desc) ||
+			usb_endpoint_xfer_bulk(&ep->desc))
+		return 0;
+
+	if (udev->speed == USB_SPEED_SUPER) {
+		if (ep->ss_ep_comp)
+			return ep->ss_ep_comp->desc.wBytesPerInterval;
+		xhci_warn(xhci, "WARN no SS endpoint companion descriptor.\n");
+		/* Assume no bursts, no multiple opportunities to send. */
+		return ep->desc.wMaxPacketSize;
+	}
+
+	max_packet = ep->desc.wMaxPacketSize & 0x3ff;
+	max_burst = (ep->desc.wMaxPacketSize & 0x1800) >> 11;
+	/* A 0 in max burst means 1 transfer per ESIT */
+	return max_packet * (max_burst + 1);
+}
+
 int xhci_endpoint_init(struct xhci_hcd *xhci,
 		struct xhci_virt_device *virt_dev,
 		struct usb_device *udev,
@@ -537,6 +580,7 @@
 	struct xhci_ring *ep_ring;
 	unsigned int max_packet;
 	unsigned int max_burst;
+	u32 max_esit_payload;
 
 	ep_index = xhci_get_endpoint_index(&ep->desc);
 	ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index);
@@ -550,6 +594,7 @@
 	ep_ctx->deq = ep_ring->first_seg->dma | ep_ring->cycle_state;
 
 	ep_ctx->ep_info = xhci_get_endpoint_interval(udev, ep);
+	ep_ctx->ep_info |= EP_MULT(xhci_get_endpoint_mult(udev, ep));
 
 	/* FIXME dig Mult and streams info out of ep companion desc */
 
@@ -595,6 +640,26 @@
 	default:
 		BUG();
 	}
+	max_esit_payload = xhci_get_max_esit_payload(xhci, udev, ep);
+	ep_ctx->tx_info = MAX_ESIT_PAYLOAD_FOR_EP(max_esit_payload);
+
+	/*
+	 * XXX no idea how to calculate the average TRB buffer length for bulk
+	 * endpoints, as the driver gives us no clue how big each scatter gather
+	 * list entry (or buffer) is going to be.
+	 *
+	 * For isochronous and interrupt endpoints, we set it to the max
+	 * available, until we have new API in the USB core to allow drivers to
+	 * declare how much bandwidth they actually need.
+	 *
+	 * Normally, it would be calculated by taking the total of the buffer
+	 * lengths in the TD and then dividing by the number of TRBs in a TD,
+	 * including link TRBs, No-op TRBs, and Event data TRBs.  Since we don't
+	 * use Event Data TRBs, and we don't chain in a link TRB on short
+	 * transfers, we're basically dividing by 1.
+	 */
+	ep_ctx->tx_info |= AVG_TRB_LENGTH_FOR_EP(max_esit_payload);
+
 	/* FIXME Debug endpoint context */
 	return 0;
 }
--- linux-mvl-dove-2.6.32.orig/drivers/usb/host/ohci-pci.c
+++ linux-mvl-dove-2.6.32/drivers/usb/host/ohci-pci.c
@@ -201,6 +201,28 @@
 	return 0;
 }
 
+/* nVidia controllers continue to drive Reset signalling on the bus
+ * even after system shutdown, wasting power.  This flag tells the
+ * shutdown routine to leave the controller OPERATIONAL instead of RESET.
+ */
+static int ohci_quirk_nvidia_shutdown(struct usb_hcd *hcd)
+{
+	struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
+	struct ohci_hcd	*ohci = hcd_to_ohci(hcd);
+
+	/* Evidently nVidia fixed their later hardware; this is a guess at
+	 * the changeover point.
+	 */
+#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_USB		0x026d
+
+	if (pdev->device < PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_USB) {
+		ohci->flags |= OHCI_QUIRK_SHUTDOWN;
+		ohci_dbg(ohci, "enabled nVidia shutdown quirk\n");
+	}
+
+	return 0;
+}
+
 /*
  * The hardware normally enables the A-link power management feature, which
  * lets the system lower the power consumption in idle states.
@@ -332,6 +354,10 @@
 		PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4399),
 		.driver_data = (unsigned long)ohci_quirk_amd700,
 	},
+	{
+		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
+		.driver_data = (unsigned long) ohci_quirk_nvidia_shutdown,
+	},
 
 	/* FIXME for some of the early AMD 760 southbridges, OHCI
 	 * won't work at all.  blacklist them.
--- linux-mvl-dove-2.6.32.orig/drivers/usb/host/xhci.h
+++ linux-mvl-dove-2.6.32/drivers/usb/host/xhci.h
@@ -609,6 +609,10 @@
 #define MAX_PACKET_MASK		(0xffff << 16)
 #define MAX_PACKET_DECODED(p)	(((p) >> 16) & 0xffff)
 
+/* tx_info bitmasks */
+#define AVG_TRB_LENGTH_FOR_EP(p)	((p) & 0xffff)
+#define MAX_ESIT_PAYLOAD_FOR_EP(p)	(((p) & 0xffff) << 16)
+
 
 /**
  * struct xhci_input_control_context
--- linux-mvl-dove-2.6.32.orig/drivers/usb/host/ehci-pci.c
+++ linux-mvl-dove-2.6.32/drivers/usb/host/ehci-pci.c
@@ -41,6 +41,42 @@
 	return 0;
 }
 
+static int ehci_quirk_amd_hudson(struct ehci_hcd *ehci)
+{
+	struct pci_dev *amd_smbus_dev;
+	u8 rev = 0;
+
+	amd_smbus_dev = pci_get_device(PCI_VENDOR_ID_ATI, 0x4385, NULL);
+	if (amd_smbus_dev) {
+		pci_read_config_byte(amd_smbus_dev, PCI_REVISION_ID, &rev);
+		if (rev < 0x40) {
+			pci_dev_put(amd_smbus_dev);
+			amd_smbus_dev = NULL;
+			return 0;
+		}
+	} else {
+		amd_smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD, 0x780b, NULL);
+		if (!amd_smbus_dev)
+			return 0;
+		pci_read_config_byte(amd_smbus_dev, PCI_REVISION_ID, &rev);
+		if (rev < 0x11 || rev > 0x18) {
+			pci_dev_put(amd_smbus_dev);
+			amd_smbus_dev = NULL;
+			return 0;
+		}
+	}
+
+	if (!amd_nb_dev)
+		amd_nb_dev = pci_get_device(PCI_VENDOR_ID_AMD, 0x1510, NULL);
+
+	ehci_info(ehci, "QUIRK: Enable exception for AMD Hudson ASPM\n");
+
+	pci_dev_put(amd_smbus_dev);
+	amd_smbus_dev = NULL;
+
+	return 1;
+}
+
 /* called during probe() after chip reset completes */
 static int ehci_pci_setup(struct usb_hcd *hcd)
 {
@@ -99,6 +135,9 @@
 	/* cache this readonly data; minimize chip reads */
 	ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
 
+	if (ehci_quirk_amd_hudson(ehci))
+		ehci->amd_l1_fix = 1;
+
 	retval = ehci_halt(ehci);
 	if (retval)
 		return retval;
--- linux-mvl-dove-2.6.32.orig/drivers/usb/host/xhci-ext-caps.h
+++ linux-mvl-dove-2.6.32/drivers/usb/host/xhci-ext-caps.h
@@ -101,12 +101,15 @@
 
 	next = readl(base + ext_offset);
 
-	if (ext_offset == XHCI_HCC_PARAMS_OFFSET)
+	if (ext_offset == XHCI_HCC_PARAMS_OFFSET) {
 		/* Find the first extended capability */
 		next = XHCI_HCC_EXT_CAPS(next);
-	else
+		ext_offset = 0;
+	} else {
 		/* Find the next extended capability */
 		next = XHCI_EXT_CAPS_NEXT(next);
+	}
+
 	if (!next)
 		return 0;
 	/*
--- linux-mvl-dove-2.6.32.orig/drivers/usb/host/ehci-hub.c
+++ linux-mvl-dove-2.6.32/drivers/usb/host/ehci-hub.c
@@ -120,9 +120,26 @@
 	del_timer_sync(&ehci->watchdog);
 	del_timer_sync(&ehci->iaa_watchdog);
 
-	port = HCS_N_PORTS (ehci->hcs_params);
 	spin_lock_irq (&ehci->lock);
 
+	/* Once the controller is stopped, port resumes that are already
+	 * in progress won't complete.  Hence if remote wakeup is enabled
+	 * for the root hub and any ports are in the middle of a resume or
+	 * remote wakeup, we must fail the suspend.
+	 */
+	if (hcd->self.root_hub->do_remote_wakeup) {
+		port = HCS_N_PORTS(ehci->hcs_params);
+		while (port--) {
+			if (ehci->reset_done[port] != 0) {
+				spin_unlock_irq(&ehci->lock);
+				ehci_dbg(ehci, "suspend failed because "
+						"port %d is resuming\n",
+						port + 1);
+				return -EBUSY;
+			}
+		}
+	}
+
 	/* stop schedules, clean any completed work */
 	if (HC_IS_RUNNING(hcd->state)) {
 		ehci_quiesce (ehci);
@@ -138,6 +155,7 @@
 	 */
 	ehci->bus_suspended = 0;
 	ehci->owned_ports = 0;
+	port = HCS_N_PORTS(ehci->hcs_params);
 	while (port--) {
 		u32 __iomem	*reg = &ehci->regs->port_status [port];
 		u32		t1 = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
@@ -274,6 +292,16 @@
 	/* manually resume the ports we suspended during bus_suspend() */
 	i = HCS_N_PORTS (ehci->hcs_params);
 	while (i--) {
+		/* clear phy low power mode before resume */
+		if (ehci->has_hostpc) {
+			u32 __iomem	*hostpc_reg =
+				(u32 __iomem *)((u8 *)ehci->regs
+				+ HOSTPC0 + 4 * (i & 0xff));
+			temp = ehci_readl(ehci, hostpc_reg);
+			ehci_writel(ehci, temp & ~HOSTPC_PHCD,
+				hostpc_reg);
+			mdelay(5);
+		}
 		temp = ehci_readl(ehci, &ehci->regs->port_status [i]);
 		temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
 		if (test_bit(i, &ehci->bus_suspended) &&
@@ -658,6 +686,13 @@
 			if (temp & PORT_SUSPEND) {
 				if ((temp & PORT_PE) == 0)
 					goto error;
+				/* clear phy low power mode before resume */
+				if (hostpc_reg) {
+					temp1 = ehci_readl(ehci, hostpc_reg);
+					ehci_writel(ehci, temp1 & ~HOSTPC_PHCD,
+						hostpc_reg);
+					mdelay(5);
+				}
 				/* resume signaling for 20 msec */
 				temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
 				ehci_writel(ehci, temp | PORT_RESUME,
@@ -723,10 +758,11 @@
 			 * power switching; they're allowed to just limit the
 			 * current.  khubd will turn the power back on.
 			 */
-			if (HCS_PPC (ehci->hcs_params)){
+			if ((temp & PORT_OC) && HCS_PPC(ehci->hcs_params)) {
 				ehci_writel(ehci,
 					temp & ~(PORT_RWC_BITS | PORT_POWER),
 					status_reg);
+				temp = ehci_readl(ehci, status_reg);
 			}
 		}
 
--- linux-mvl-dove-2.6.32.orig/drivers/usb/host/ehci-sched.c
+++ linux-mvl-dove-2.6.32/drivers/usb/host/ehci-sched.c
@@ -208,7 +208,7 @@
 }
 
 static const unsigned char
-max_tt_usecs[] = { 125, 125, 125, 125, 125, 125, 30, 0 };
+max_tt_usecs[] = { 125, 125, 125, 125, 125, 125, 125, 100 };
 
 /* carryover low/fullspeed bandwidth that crosses uframe boundries */
 static inline void carryover_tt_bandwidth(unsigned short tt_usecs[8])
@@ -278,10 +278,6 @@
 	}
 
 	carryover_tt_bandwidth(tt_usecs);
-
-	if (max_tt_usecs[7] < tt_usecs[7])
-		ehci_err(ehci, "frame %d tt sched overrun: %d usecs\n",
-			frame, tt_usecs[7] - max_tt_usecs[7]);
 }
 
 /*
@@ -464,7 +460,7 @@
 	 */
 	status = handshake_on_error_set_halt(ehci, &ehci->regs->status,
 					     STS_PSS, 0, 9 * 125);
-	if (status)
+	if (status) 
 		return status;
 
 	cmd = ehci_readl(ehci, &ehci->regs->command) | CMD_PSE;
@@ -503,13 +499,15 @@
 	 */
 	status = handshake_on_error_set_halt(ehci, &ehci->regs->status,
 					     STS_PSS, STS_PSS, 9 * 125);
-	if (status)
+	if (status) 
 		return status;
 
 	cmd = ehci_readl(ehci, &ehci->regs->command) & ~CMD_PSE;
 	ehci_writel(ehci, cmd, &ehci->regs->command);
 	/* posted write ... */
 
+	free_cached_lists(ehci);
+
 	ehci->next_uframe = -1;
 	return 0;
 }
@@ -718,8 +716,11 @@
 	} else {
 		do {
 			claimed = periodic_usecs (ehci, frame, uframe);
-			if (claimed > usecs)
+			if (claimed > usecs) {
+				ehci_dbg(ehci, "check_period FAILED: claimed=%d"
+					 ", usecs=%d\n", claimed, usecs);
 				return 0;
+			}
 		} while ((frame += period) < ehci->periodic_size);
 	}
 
@@ -741,8 +742,11 @@
 	if (qh->c_usecs && uframe >= 6)		/* FSTN territory? */
 		goto done;
 
-	if (!check_period (ehci, frame, uframe, qh->period, qh->usecs))
+	if (!check_period(ehci, frame, uframe, qh->period, qh->usecs)) {
+		ehci_dbg(ehci, "check_intr_schedule: usecs=%d FAILED\n",
+			 qh->usecs);
 		goto done;
+	}
 	if (!qh->c_usecs) {
 		retval = 0;
 		*c_maskp = 0;
@@ -750,22 +754,26 @@
 	}
 
 #ifdef CONFIG_USB_EHCI_TT_NEWSCHED
-	if (tt_available (ehci, qh->period, qh->dev, frame, uframe,
+	if (tt_available(ehci, qh->period, qh->dev, frame, uframe+2,
 				qh->tt_usecs)) {
 		unsigned i;
 
 		/* TODO : this may need FSTN for SSPLIT in uframe 5. */
-		for (i=uframe+1; i<8 && i<uframe+4; i++)
+		for (i = uframe+2; i < 8 && i < uframe+5; i++)
 			if (!check_period (ehci, frame, i,
-						qh->period, qh->c_usecs))
+					   qh->period, qh->c_usecs)){
+				ehci_dbg(ehci, "check_intr_schedule: FAILED - "
+					 "frame=%d, uframe=%d, i=%d\n",
+					 frame, uframe, i);
 				goto done;
-			else
+			} else
 				mask |= 1 << i;
 
 		retval = 0;
 
 		*c_maskp = cpu_to_hc32(ehci, mask << 8);
-	}
+	} else
+		ehci_dbg(ehci, "check_intr_schedule: tt_available FAILED\n");
 #else
 	/* Make sure this tt's buffer is also available for CSPLITs.
 	 * We pessimize a bit; probably the typical full speed case
@@ -799,7 +807,7 @@
 {
 	int		status;
 	unsigned	uframe;
-	__hc32		c_mask;
+	__hc32		c_mask, s_mask = 0;
 	unsigned	frame;		/* 0..(qh->period - 1), or NO_FRAME */
 	struct ehci_qh_hw	*hw = qh->hw;
 
@@ -837,10 +845,19 @@
 				}
 			}
 
+			s_mask = (1 << uframe);
+
 		/* qh->period == 0 means every uframe */
 		} else {
+			uframe = 0;
 			frame = 0;
 			status = check_intr_schedule (ehci, 0, 0, qh, &c_mask);
+
+			/* set s_mask */
+			while(uframe < 8) {
+				s_mask |= (1 << uframe);
+				uframe += qh->u_period;
+			}	
 		}
 		if (status)
 			goto done;
@@ -848,12 +865,10 @@
 
 		/* reset S-frame and (maybe) C-frame masks */
 		hw->hw_info2 &= cpu_to_hc32(ehci, ~(QH_CMASK | QH_SMASK));
-		hw->hw_info2 |= qh->period
-			? cpu_to_hc32(ehci, 1 << uframe)
-			: cpu_to_hc32(ehci, QH_SMASK);
+		hw->hw_info2 |= cpu_to_hc32(ehci, s_mask);
 		hw->hw_info2 |= c_mask;
 	} else
-		ehci_dbg (ehci, "reused qh %p schedule\n", qh);
+		ehci_dbg(ehci, "reused qh %p schedule\n", qh);
 
 	/* stuff into the periodic schedule */
 	status = qh_link_periodic (ehci, qh);
@@ -895,8 +910,11 @@
 		goto done;
 	}
 	if (qh->qh_state == QH_STATE_IDLE) {
-		if ((status = qh_schedule (ehci, qh)) != 0)
+		if ((status = qh_schedule(ehci, qh)) != 0) {
+			ehci_err(ehci, "intr_submit - qh_schedule FAILED: "
+				 "status=%d\n", status);
 			goto done;
+		}
 	}
 
 	/* then queue the urb's tds to the qh */
@@ -1121,9 +1139,9 @@
 					urb->interval);
 		}
 
-	/* if dev->ep [epnum] is a QH, info1.maxpacket is nonzero */
-	} else if (unlikely (stream->hw_info1 != 0)) {
-		ehci_dbg (ehci, "dev %s ep%d%s, not iso??\n",
+	/* if dev->ep [epnum] is a QH, hw is set */
+	} else if (unlikely (stream->hw != NULL)) {
+		ehci_dbg(ehci, "dev %s ep%d%s, not iso??\n",
 			urb->dev->devpath, epnum,
 			usb_pipein(urb->pipe) ? "in" : "out");
 		stream = NULL;
@@ -1247,8 +1265,8 @@
 		if (likely (!list_empty(&stream->free_list))) {
 			itd = list_entry (stream->free_list.prev,
 					struct ehci_itd, itd_list);
-			list_del (&itd->itd_list);
-			itd_dma = itd->itd_dma;
+				list_del (&itd->itd_list);
+				itd_dma = itd->itd_dma;
 		} else {
 			spin_unlock_irqrestore (&ehci->lock, flags);
 			itd = dma_pool_alloc (ehci->itd_pool, mem_flags,
@@ -1367,7 +1385,7 @@
 		}
 
 		/* we know urb->interval is 2^N uframes */
-		uframe += period_uframes;
+	uframe += period_uframes;
 	} while (uframe < mod);
 
 	stream->splits = cpu_to_hc32(ehci, stream->raw_mask << (uframe & 7));
@@ -1400,13 +1418,14 @@
 	struct ehci_iso_sched	*sched = urb->hcpriv;
 
 	if (sched->span > (mod - 8 * SCHEDULE_SLOP)) {
-		ehci_dbg (ehci, "iso request %p too long\n", urb);
+		ehci_dbg(ehci, "iso request %p too long: (%d > (%d - 80))\n",
+			 urb, sched->span, mod);
 		status = -EFBIG;
 		goto fail;
 	}
 
 	if ((stream->depth + sched->span) > mod) {
-		ehci_dbg (ehci, "request %p would overflow (%d+%d>%d)\n",
+		ehci_dbg(ehci, "request %p would overflow ((%d + %d) > %d)\n",
 			urb, stream->depth, sched->span, mod);
 		status = -EFBIG;
 		goto fail;
@@ -1438,6 +1457,9 @@
 
 		/* Tried to schedule too far into the future? */
 		if (unlikely((start + sched->span) >= max)) {
+			ehci_dbg(ehci, "iso request %p too far into the future"
+				 " (%d + %d >= %d)\n",
+				 urb, start, sched->span, max);
 			status = -EFBIG;
 			goto fail;
 		}
@@ -1480,7 +1502,7 @@
 	}
 
 	/* no room in the schedule */
-	ehci_dbg (ehci, "iso %ssched full %p (now %d max %d)\n",
+	ehci_dbg(ehci, "iso %ssched full %p (now %d max %d)\n",
 		list_empty (&stream->td_list) ? "" : "re",
 		urb, now, max);
 	status = -ENOSPC;
@@ -1553,13 +1575,84 @@
 static inline void
 itd_link (struct ehci_hcd *ehci, unsigned frame, struct ehci_itd *itd)
 {
-	/* always prepend ITD/SITD ... only QH tree is order-sensitive */
-	itd->itd_next = ehci->pshadow [frame];
-	itd->hw_next = ehci->periodic [frame];
-	ehci->pshadow [frame].itd = itd;
+	union ehci_shadow	*prev = &ehci->pshadow[frame];
+	__hc32			*hw_p = &ehci->periodic[frame];
+	union ehci_shadow	here = *prev;
+	__hc32			type = 0;
+
+	/* skip any iso nodes which might belong to previous microframes */
+	while (here.ptr) {
+		type = Q_NEXT_TYPE(ehci, *hw_p);
+		if (type == cpu_to_hc32(ehci, Q_TYPE_QH))
+			break;
+		prev = periodic_next_shadow(ehci, prev, type);
+		hw_p = shadow_next_periodic(ehci, &here, type);
+		here = *prev;
+	}
+
+	itd->itd_next = here;
+	itd->hw_next = *hw_p;
+	prev->itd = itd;
 	itd->frame = frame;
 	wmb ();
-	ehci->periodic[frame] = cpu_to_hc32(ehci, itd->itd_dma | Q_TYPE_ITD);
+	*hw_p = cpu_to_hc32(ehci, itd->itd_dma | Q_TYPE_ITD);
+}
+
+#define AB_REG_BAR_LOW 0xe0
+#define AB_REG_BAR_HIGH 0xe1
+#define AB_INDX(addr) ((addr) + 0x00)
+#define AB_DATA(addr) ((addr) + 0x04)
+#define NB_PCIE_INDX_ADDR 0xe0
+#define NB_PCIE_INDX_DATA 0xe4
+#define NB_PIF0_PWRDOWN_0 0x01100012
+#define NB_PIF0_PWRDOWN_1 0x01100013
+
+static void ehci_quirk_amd_L1(struct ehci_hcd *ehci, int disable)
+{
+	u32 addr, addr_low, addr_high, val;
+
+	outb_p(AB_REG_BAR_LOW, 0xcd6);
+	addr_low = inb_p(0xcd7);
+	outb_p(AB_REG_BAR_HIGH, 0xcd6);
+	addr_high = inb_p(0xcd7);
+	addr = addr_high << 8 | addr_low;
+	outl_p(0x30, AB_INDX(addr));
+	outl_p(0x40, AB_DATA(addr));
+	outl_p(0x34, AB_INDX(addr));
+	val = inl_p(AB_DATA(addr));
+
+	if (disable) {
+		val &= ~0x8;
+		val |= (1 << 4) | (1 << 9);
+	} else {
+		val |= 0x8;
+		val &= ~((1 << 4) | (1 << 9));
+	}
+	outl_p(val, AB_DATA(addr));
+
+	if (amd_nb_dev) {
+		addr = NB_PIF0_PWRDOWN_0;
+		pci_write_config_dword(amd_nb_dev, NB_PCIE_INDX_ADDR, addr);
+		pci_read_config_dword(amd_nb_dev, NB_PCIE_INDX_DATA, &val);
+		if (disable)
+			val &= ~(0x3f << 7);
+		else
+			val |= 0x3f << 7;
+
+		pci_write_config_dword(amd_nb_dev, NB_PCIE_INDX_DATA, val);
+
+		addr = NB_PIF0_PWRDOWN_1;
+		pci_write_config_dword(amd_nb_dev, NB_PCIE_INDX_ADDR, addr);
+		pci_read_config_dword(amd_nb_dev, NB_PCIE_INDX_DATA, &val);
+		if (disable)
+			val &= ~(0x3f << 7);
+		else
+			val |= 0x3f << 7;
+
+		pci_write_config_dword(amd_nb_dev, NB_PCIE_INDX_DATA, val);
+	}
+
+	return;
 }
 
 /* fit urb's itds into the selected schedule slot; activate as needed */
@@ -1589,6 +1682,12 @@
 			next_uframe >> 3, next_uframe & 0x7);
 		stream->start = jiffies;
 	}
+
+	if (ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs == 0) {
+		if (ehci->amd_l1_fix == 1)
+			ehci_quirk_amd_L1(ehci, 1);
+	}
+
 	ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs++;
 
 	/* fill iTDs uframe by uframe */
@@ -1712,9 +1811,16 @@
 	ehci_urb_done(ehci, urb, 0);
 	retval = true;
 	urb = NULL;
+
 	(void) disable_periodic(ehci);
+
 	ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs--;
 
+	if (ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs == 0) {
+		if (ehci->amd_l1_fix == 1)
+			ehci_quirk_amd_L1(ehci, 0);
+	}
+
 	if (unlikely(list_is_singular(&stream->td_list))) {
 		ehci_to_hcd(ehci)->self.bandwidth_allocated
 				-= stream->bandwidth;
@@ -1760,17 +1866,17 @@
 	/* Get iso_stream head */
 	stream = iso_stream_find (ehci, urb);
 	if (unlikely (stream == NULL)) {
-		ehci_dbg (ehci, "can't get iso stream\n");
+		ehci_err(ehci, "can't get iso stream\n");
 		return -ENOMEM;
 	}
 	if (unlikely (urb->interval != stream->interval)) {
-		ehci_dbg (ehci, "can't change iso interval %d --> %d\n",
+		ehci_err(ehci, "can't change iso interval %d --> %d\n",
 			stream->interval, urb->interval);
 		goto done;
 	}
 
 #ifdef EHCI_URB_TRACE
-	ehci_dbg (ehci,
+	ehci_dbg(ehci,
 		"%s %s urb %p ep%d%s len %d, %d pkts %d uframes [%p]\n",
 		__func__, urb->dev->devpath, urb,
 		usb_pipeendpoint (urb->pipe),
@@ -1783,7 +1889,7 @@
 	/* allocate ITDs w/o locking anything */
 	status = itd_urb_transaction (stream, ehci, urb, mem_flags);
 	if (unlikely (status < 0)) {
-		ehci_dbg (ehci, "can't init itds\n");
+		ehci_err(ehci, "can't init itds\n");
 		goto done;
 	}
 
@@ -1800,8 +1906,10 @@
 	status = iso_stream_schedule(ehci, urb, stream);
 	if (likely (status == 0))
 		itd_link_urb (ehci, urb, ehci->periodic_size << 3, stream);
-	else
-		usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
+    else {
+	    ehci_err(ehci, "itd_submit: can't schedule iso stream\n");
+	    usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
+    }
 done_not_linked:
 	spin_unlock_irqrestore (&ehci->lock, flags);
 
@@ -2002,6 +2110,12 @@
 			stream->interval, hc32_to_cpu(ehci, stream->splits));
 		stream->start = jiffies;
 	}
+
+	if (ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs == 0) {
+		if (ehci->amd_l1_fix == 1)
+			ehci_quirk_amd_L1(ehci, 1);
+	}
+
 	ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs++;
 
 	/* fill sITDs frame by frame */
@@ -2101,8 +2215,15 @@
 	ehci_urb_done(ehci, urb, 0);
 	retval = true;
 	urb = NULL;
+
 	(void) disable_periodic(ehci);
-	ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs--;
+	
+    	ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs--;
+
+	if (ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs == 0) {
+		if (ehci->amd_l1_fix == 1)
+			ehci_quirk_amd_L1(ehci, 0);
+	}
 
 	if (list_is_singular(&stream->td_list)) {
 		ehci_to_hcd(ehci)->self.bandwidth_allocated
@@ -2113,13 +2234,27 @@
 			(stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out");
 	}
 	iso_stream_put (ehci, stream);
-	/* OK to recycle this SITD now that its completion callback ran. */
+
 done:
 	sitd->urb = NULL;
-	sitd->stream = NULL;
-	list_move(&sitd->sitd_list, &stream->free_list);
-	iso_stream_put(ehci, stream);
-
+	if (ehci->clock_frame != sitd->frame) {
+		/* OK to recycle this SITD now. */
+		sitd->stream = NULL;
+		list_move(&sitd->sitd_list, &stream->free_list);
+		iso_stream_put(ehci, stream);
+	} else {
+		/* HW might remember this SITD, so we can't recycle it yet.
+		 * Move it to a safe place until a new frame starts.
+		 */
+		list_move(&sitd->sitd_list, &ehci->cached_sitd_list);
+		if (stream->refcount == 2) {
+			/* If iso_stream_put() were called here, stream
+			 * would be freed.  Instead, just prevent reuse.
+			 */
+			stream->ep->hcpriv = NULL;
+			stream->ep = NULL;
+		}
+	}
 	return retval;
 }
 
@@ -2134,28 +2269,28 @@
 	/* Get iso_stream head */
 	stream = iso_stream_find (ehci, urb);
 	if (stream == NULL) {
-		ehci_dbg (ehci, "can't get iso stream\n");
+		ehci_err(ehci, "can't get iso stream\n");
 		return -ENOMEM;
 	}
 	if (urb->interval != stream->interval) {
-		ehci_dbg (ehci, "can't change iso interval %d --> %d\n",
+		ehci_err(ehci, "can't change iso interval %d --> %d\n",
 			stream->interval, urb->interval);
 		goto done;
 	}
 
 #ifdef EHCI_URB_TRACE
-	ehci_dbg (ehci,
-		"submit %p dev%s ep%d%s-iso len %d\n",
-		urb, urb->dev->devpath,
-		usb_pipeendpoint (urb->pipe),
-		usb_pipein (urb->pipe) ? "in" : "out",
-		urb->transfer_buffer_length);
+	ehci_dbg(ehci,
+		 "submit %p dev%s ep%d%s-iso len %d\n",
+		 urb, urb->dev->devpath,
+		 usb_pipeendpoint (urb->pipe),
+		 usb_pipein(urb->pipe) ? "in" : "out",
+		 urb->transfer_buffer_length);
 #endif
 
 	/* allocate SITDs */
 	status = sitd_urb_transaction (stream, ehci, urb, mem_flags);
 	if (status < 0) {
-		ehci_dbg (ehci, "can't init sitds\n");
+		ehci_err(ehci, "can't init sitds\n");
 		goto done;
 	}
 
@@ -2172,8 +2307,10 @@
 	status = iso_stream_schedule(ehci, urb, stream);
 	if (status == 0)
 		sitd_link_urb (ehci, urb, ehci->periodic_size << 3, stream);
-	else
+    else {
+	    ehci_err(ehci, "sitd_submit: can't schedule iso stream\n");
 		usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
+    }
 done_not_linked:
 	spin_unlock_irqrestore (&ehci->lock, flags);
 
@@ -2185,9 +2322,10 @@
 
 /*-------------------------------------------------------------------------*/
 
-static void free_cached_itd_list(struct ehci_hcd *ehci)
+static void free_cached_lists(struct ehci_hcd *ehci)
 {
 	struct ehci_itd *itd, *n;
+	struct ehci_sitd *sitd, *sn;
 
 	list_for_each_entry_safe(itd, n, &ehci->cached_itd_list, itd_list) {
 		struct ehci_iso_stream	*stream = itd->stream;
@@ -2195,6 +2333,13 @@
 		list_move(&itd->itd_list, &stream->free_list);
 		iso_stream_put(ehci, stream);
 	}
+
+	list_for_each_entry_safe(sitd, sn, &ehci->cached_sitd_list, sitd_list) {
+		struct ehci_iso_stream	*stream = sitd->stream;
+		sitd->stream = NULL;
+		list_move(&sitd->sitd_list, &stream->free_list);
+		iso_stream_put(ehci, stream);
+	}
 }
 
 /*-------------------------------------------------------------------------*/
@@ -2221,7 +2366,7 @@
 		clock_frame = -1;
 	}
 	if (ehci->clock_frame != clock_frame) {
-		free_cached_itd_list(ehci);
+		free_cached_lists(ehci);
 		ehci->clock_frame = clock_frame;
 	}
 	clock %= mod;
@@ -2276,7 +2421,7 @@
 				 * No need to check for activity unless the
 				 * frame is current.
 				 */
-				if (frame == clock_frame && live) {
+				if ((frame == clock_frame) && live) {
 					rmb();
 					for (uf = 0; uf < 8; uf++) {
 						if (q.itd->hw_transaction[uf] &
@@ -2312,9 +2457,13 @@
 				 * No need to check for activity unless the
 				 * frame is current.
 				 */
-				if (frame == clock_frame && live &&
-						(q.sitd->hw_results &
-							SITD_ACTIVE(ehci))) {
+				if (((frame == clock_frame) ||
+				     (((frame + 1) % ehci->periodic_size)
+				      == clock_frame))
+				    && live
+				    && (q.sitd->hw_results &
+					SITD_ACTIVE(ehci))) {
+
 					incomplete = true;
 					q_p = &q.sitd->sitd_next;
 					hw_p = &q.sitd->hw_next;
@@ -2336,17 +2485,21 @@
 				q = *q_p;
 				break;
 			default:
-				dbg ("corrupt type %d frame %d shadow %p",
-					type, frame, q.ptr);
+				ehci_dbg(ehci, "corrupt type %d frame %d shadow"
+					 " %p\n",
+					 type, frame, q.ptr);
 				// BUG ();
 				q.ptr = NULL;
 			}
 
 			/* assume completion callbacks modify the queue */
 			if (unlikely (modified)) {
-				if (likely(ehci->periodic_sched > 0))
+				if (likely(ehci->periodic_sched > 0)) {
+//					restarted = 1;
 					goto restart;
-				/* short-circuit this scan */
+				}
+				/* maybe we can short-circuit this scan! */
+				/*disable_periodic(ehci);*/
 				now_uframe = clock;
 				break;
 			}
@@ -2384,7 +2537,7 @@
 			clock = now;
 			clock_frame = clock >> 3;
 			if (ehci->clock_frame != clock_frame) {
-				free_cached_itd_list(ehci);
+				free_cached_lists(ehci);
 				ehci->clock_frame = clock_frame;
 			}
 		} else {
--- linux-mvl-dove-2.6.32.orig/drivers/usb/host/ohci-pnx4008.c
+++ linux-mvl-dove-2.6.32/drivers/usb/host/ohci-pnx4008.c
@@ -327,7 +327,7 @@
 	}
 	i2c_adap = i2c_get_adapter(2);
 	memset(&i2c_info, 0, sizeof(struct i2c_board_info));
-	strlcpy(i2c_info.name, "isp1301_pnx", I2C_NAME_SIZE);
+	strlcpy(i2c_info.type, "isp1301_pnx", I2C_NAME_SIZE);
 	isp1301_i2c_client = i2c_new_probed_device(i2c_adap, &i2c_info,
 						   normal_i2c);
 	i2c_put_adapter(i2c_adap);
@@ -411,7 +411,7 @@
 out2:
 	clk_put(usb_clk);
 out1:
-	i2c_unregister_client(isp1301_i2c_client);
+	i2c_unregister_device(isp1301_i2c_client);
 	isp1301_i2c_client = NULL;
 out_i2c_driver:
 	i2c_del_driver(&isp1301_driver);
@@ -430,7 +430,7 @@
 	pnx4008_unset_usb_bits();
 	clk_disable(usb_clk);
 	clk_put(usb_clk);
-	i2c_unregister_client(isp1301_i2c_client);
+	i2c_unregister_device(isp1301_i2c_client);
 	isp1301_i2c_client = NULL;
 	i2c_del_driver(&isp1301_driver);
 
--- linux-mvl-dove-2.6.32.orig/drivers/usb/host/uhci-hcd.c
+++ linux-mvl-dove-2.6.32/drivers/usb/host/uhci-hcd.c
@@ -735,6 +735,7 @@
 		uhci_hc_died(uhci);
 	uhci_scan_schedule(uhci);
 	spin_unlock_irq(&uhci->lock);
+	synchronize_irq(hcd->irq);
 
 	del_timer_sync(&uhci->fsbr_timer);
 	release_uhci(uhci);
@@ -749,7 +750,20 @@
 	spin_lock_irq(&uhci->lock);
 	if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags))
 		rc = -ESHUTDOWN;
-	else if (!uhci->dead)
+	else if (uhci->dead)
+		;		/* Dead controllers tell no tales */
+
+	/* Once the controller is stopped, port resumes that are already
+	 * in progress won't complete.  Hence if remote wakeup is enabled
+	 * for the root hub and any ports are in the middle of a resume or
+	 * remote wakeup, we must fail the suspend.
+	 */
+	else if (hcd->self.root_hub->do_remote_wakeup &&
+			uhci->resuming_ports) {
+		dev_dbg(uhci_dev(uhci), "suspend failed because a port "
+				"is resuming\n");
+		rc = -EBUSY;
+	} else
 		suspend_rh(uhci, UHCI_RH_SUSPENDED);
 	spin_unlock_irq(&uhci->lock);
 	return rc;
--- linux-mvl-dove-2.6.32.orig/drivers/usb/host/ehci-hcd.c
+++ linux-mvl-dove-2.6.32/drivers/usb/host/ehci-hcd.c
@@ -103,6 +103,9 @@
 
 #define	INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
 
+/* for ASPM quirk of ISOC on AMD SB800 */
+static struct pci_dev *amd_nb_dev;
+
 /*-------------------------------------------------------------------------*/
 
 #include "ehci.h"
@@ -502,6 +505,11 @@
 	spin_unlock_irq (&ehci->lock);
 	ehci_mem_cleanup (ehci);
 
+	if (amd_nb_dev) {
+		pci_dev_put(amd_nb_dev);
+		amd_nb_dev = NULL;
+	}
+
 #ifdef	EHCI_STATS
 	ehci_dbg (ehci, "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
 		ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim,
@@ -537,17 +545,29 @@
 	ehci->iaa_watchdog.function = ehci_iaa_watchdog;
 	ehci->iaa_watchdog.data = (unsigned long) ehci;
 
+	hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
+
 	/*
 	 * hw default: 1K periodic list heads, one per frame.
 	 * periodic_size can shrink by USBCMD update if hcc_params allows.
 	 */
 	ehci->periodic_size = DEFAULT_I_TDPS;
 	INIT_LIST_HEAD(&ehci->cached_itd_list);
+	INIT_LIST_HEAD(&ehci->cached_sitd_list);
+
+	if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
+		/* periodic schedule size can be smaller than default */
+		switch (EHCI_TUNE_FLS) {
+		case 0: ehci->periodic_size = 1024; break;
+		case 1: ehci->periodic_size = 512; break;
+		case 2: ehci->periodic_size = 256; break;
+		default:	BUG();
+		}
+	}
 	if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
 		return retval;
 
 	/* controllers may cache some of the periodic schedule ... */
-	hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 	if (HCC_ISOC_CACHE(hcc_params))		// full frame cache
 		ehci->i_thresh = 8;
 	else					// N microframes cached
@@ -596,12 +616,6 @@
 		/* periodic schedule size can be smaller than default */
 		temp &= ~(3 << 2);
 		temp |= (EHCI_TUNE_FLS << 2);
-		switch (EHCI_TUNE_FLS) {
-		case 0: ehci->periodic_size = 1024; break;
-		case 1: ehci->periodic_size = 512; break;
-		case 2: ehci->periodic_size = 256; break;
-		default:	BUG();
-		}
 	}
 	ehci->command = temp;
 
@@ -785,9 +799,10 @@
 
 			/* start 20 msec resume signaling from this port,
 			 * and make khubd collect PORT_STAT_C_SUSPEND to
-			 * stop that signaling.
+			 * stop that signaling.  Use 5 ms extra for safety,
+			 * like usb_port_resume() does.
 			 */
-			ehci->reset_done [i] = jiffies + msecs_to_jiffies (20);
+			ehci->reset_done[i] = jiffies + msecs_to_jiffies(25);
 			ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
 			mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
 		}
@@ -992,7 +1007,7 @@
 	/* endpoints can be iso streams.  for now, we don't
 	 * accelerate iso completions ... so spin a while.
 	 */
-	if (qh->hw->hw_info1 == 0) {
+	if (qh->hw == NULL) {
 		ehci_vdbg (ehci, "iso delay\n");
 		goto idle_timeout;
 	}
@@ -1006,10 +1021,11 @@
 				tmp && tmp != qh;
 				tmp = tmp->qh_next.qh)
 			continue;
-		/* periodic qh self-unlinks on empty */
-		if (!tmp)
-			goto nogood;
-		unlink_async (ehci, qh);
+		/* periodic qh self-unlinks on empty, and a COMPLETING qh
+		 * may already be unlinked.
+		 */
+		if (tmp)
+			unlink_async(ehci, qh);
 		/* FALL THROUGH */
 	case QH_STATE_UNLINK:		/* wait for hw to finish? */
 	case QH_STATE_UNLINK_WAIT:
@@ -1026,7 +1042,6 @@
 		}
 		/* else FALL THROUGH */
 	default:
-nogood:
 		/* caller was supposed to have unlinked any requests;
 		 * that's not our job.  just leak this memory.
 		 */
--- linux-mvl-dove-2.6.32.orig/drivers/usb/host/ehci-ppc-of.c
+++ linux-mvl-dove-2.6.32/drivers/usb/host/ehci-ppc-of.c
@@ -192,17 +192,19 @@
 	}
 
 	rv = usb_add_hcd(hcd, irq, 0);
-	if (rv == 0)
-		return 0;
+	if (rv)
+		goto err_ehci;
 
+	return 0;
+
+err_ehci:
+	if (ehci->has_amcc_usb23)
+		iounmap(ehci->ohci_hcctrl_reg);
 	iounmap(hcd->regs);
 err_ioremap:
 	irq_dispose_mapping(irq);
 err_irq:
 	release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
-
-	if (ehci->has_amcc_usb23)
-		iounmap(ehci->ohci_hcctrl_reg);
 err_rmr:
 	usb_put_hcd(hcd);
 
--- linux-mvl-dove-2.6.32.orig/drivers/usb/host/ohci-hcd.c
+++ linux-mvl-dove-2.6.32/drivers/usb/host/ohci-hcd.c
@@ -398,7 +398,14 @@
 
 	ohci = hcd_to_ohci (hcd);
 	ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
-	ohci_usb_reset (ohci);
+	ohci->hc_control = ohci_readl(ohci, &ohci->regs->control);
+
+	/* If the SHUTDOWN quirk is set, don't put the controller in RESET */
+	ohci->hc_control &= (ohci->flags & OHCI_QUIRK_SHUTDOWN ?
+			OHCI_CTRL_RWC | OHCI_CTRL_HCFS :
+			OHCI_CTRL_RWC);
+	ohci_writel(ohci, ohci->hc_control, &ohci->regs->control);
+
 	/* flush the writes */
 	(void) ohci_readl (ohci, &ohci->regs->control);
 }
--- linux-mvl-dove-2.6.32.orig/drivers/usb/host/ohci-hub.c
+++ linux-mvl-dove-2.6.32/drivers/usb/host/ohci-hub.c
@@ -697,7 +697,7 @@
 	u16		wLength
 ) {
 	struct ohci_hcd	*ohci = hcd_to_ohci (hcd);
-	int		ports = hcd_to_bus (hcd)->root_hub->maxchild;
+	int		ports = ohci->num_ports;
 	u32		temp;
 	int		retval = 0;
 
--- linux-mvl-dove-2.6.32.orig/drivers/usb/host/xhci-hcd.c
+++ linux-mvl-dove-2.6.32/drivers/usb/host/xhci-hcd.c
@@ -97,6 +97,33 @@
 }
 
 /*
+ * Set the run bit and wait for the host to be running.
+ */
+int xhci_start(struct xhci_hcd *xhci)
+{
+	u32 temp;
+	int ret;
+
+	temp = xhci_readl(xhci, &xhci->op_regs->command);
+	temp |= (CMD_RUN);
+	xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
+			temp);
+	xhci_writel(xhci, temp, &xhci->op_regs->command);
+
+	/*
+	 * Wait for the HCHalted Status bit to be 0 to indicate the host is
+	 * running.
+	 */
+	ret = handshake(xhci, &xhci->op_regs->status,
+			STS_HALT, 0, XHCI_MAX_HALT_USEC);
+	if (ret == -ETIMEDOUT)
+		xhci_err(xhci, "Host took too long to start, "
+				"waited %u microseconds.\n",
+				XHCI_MAX_HALT_USEC);
+	return ret;
+}
+
+/*
  * Reset a halted HC, and set the internal HC state to HC_STATE_HALT.
  *
  * This resets pipelines, timers, counters, state machines, etc.
@@ -107,6 +134,7 @@
 {
 	u32 command;
 	u32 state;
+	int ret;
 
 	state = xhci_readl(xhci, &xhci->op_regs->status);
 	if ((state & STS_HALT) == 0) {
@@ -121,7 +149,17 @@
 	/* XXX: Why does EHCI set this here?  Shouldn't other code do this? */
 	xhci_to_hcd(xhci)->state = HC_STATE_HALT;
 
-	return handshake(xhci, &xhci->op_regs->command, CMD_RESET, 0, 250 * 1000);
+	ret = handshake(xhci, &xhci->op_regs->command,
+			CMD_RESET, 0, 250 * 1000);
+	if (ret)
+		return ret;
+
+	xhci_dbg(xhci, "Wait for controller to be ready for doorbell rings\n");
+	/*
+	 * xHCI cannot write to any doorbells or operational registers other
+	 * than status until the "Controller Not Ready" flag is cleared.
+	 */
+	return handshake(xhci, &xhci->op_regs->status, STS_CNR, 0, 250 * 1000);
 }
 
 /*
@@ -460,13 +498,11 @@
 	if (NUM_TEST_NOOPS > 0)
 		doorbell = xhci_setup_one_noop(xhci);
 
-	temp = xhci_readl(xhci, &xhci->op_regs->command);
-	temp |= (CMD_RUN);
-	xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
-			temp);
-	xhci_writel(xhci, temp, &xhci->op_regs->command);
-	/* Flush PCI posted writes */
-	temp = xhci_readl(xhci, &xhci->op_regs->command);
+	if (xhci_start(xhci)) {
+		xhci_halt(xhci);
+		return -ENODEV;
+	}
+
 	xhci_dbg(xhci, "// @%p = 0x%x\n", &xhci->op_regs->command, temp);
 	if (doorbell)
 		(*doorbell)(xhci);
@@ -943,6 +979,7 @@
 	u32 added_ctxs;
 	unsigned int last_ctx;
 	u32 new_add_flags, new_drop_flags, new_slot_info;
+	struct xhci_virt_device *virt_dev;
 	int ret = 0;
 
 	ret = xhci_check_args(hcd, udev, ep, 1, __func__);
@@ -971,11 +1008,25 @@
 		return -EINVAL;
 	}
 
-	in_ctx = xhci->devs[udev->slot_id]->in_ctx;
-	out_ctx = xhci->devs[udev->slot_id]->out_ctx;
+	virt_dev = xhci->devs[udev->slot_id];
+	in_ctx = virt_dev->in_ctx;
+	out_ctx = virt_dev->out_ctx;
 	ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
 	ep_index = xhci_get_endpoint_index(&ep->desc);
 	ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
+
+	/* If this endpoint is already in use, and the upper layers are trying
+	 * to add it again without dropping it, reject the addition.
+	 */
+	if (virt_dev->eps[ep_index].ring &&
+			!(le32_to_cpu(ctrl_ctx->drop_flags) &
+				xhci_get_endpoint_flag(&ep->desc))) {
+		xhci_warn(xhci, "Trying to add endpoint 0x%x "
+				"without dropping it.\n",
+				(unsigned int) ep->desc.bEndpointAddress);
+		return -EINVAL;
+	}
+
 	/* If the HCD has already noted the endpoint is enabled,
 	 * ignore this request.
 	 */
@@ -990,8 +1041,7 @@
 	 * process context, not interrupt context (or so documenation
 	 * for usb_set_interface() and usb_set_configuration() claim).
 	 */
-	if (xhci_endpoint_init(xhci, xhci->devs[udev->slot_id],
-				udev, ep, GFP_KERNEL) < 0) {
+	if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
 		dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
 				__func__, ep->desc.bEndpointAddress);
 		return -ENOMEM;
@@ -1157,6 +1207,7 @@
 		cmd_completion = &virt_dev->cmd_completion;
 		cmd_status = &virt_dev->cmd_status;
 	}
+	init_completion(cmd_completion);
 
 	if (!ctx_change)
 		ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma,
@@ -1413,6 +1464,8 @@
 		kfree(virt_ep->stopped_td);
 		xhci_ring_cmd_db(xhci);
 	}
+	virt_ep->stopped_td = NULL;
+	virt_ep->stopped_trb = NULL;
 	spin_unlock_irqrestore(&xhci->lock, flags);
 
 	if (ret)
--- linux-mvl-dove-2.6.32.orig/drivers/usb/host/ehci.h
+++ linux-mvl-dove-2.6.32/drivers/usb/host/ehci.h
@@ -87,8 +87,9 @@
 	int			next_uframe;	/* scan periodic, start here */
 	unsigned		periodic_sched;	/* periodic activity count */
 
-	/* list of itds completed while clock_frame was still active */
+	/* list of itds & sitds completed while clock_frame was still active */
 	struct list_head	cached_itd_list;
+	struct list_head	cached_sitd_list;
 	unsigned		clock_frame;
 
 	/* per root hub port */
@@ -129,6 +130,7 @@
 	unsigned		has_amcc_usb23:1;
 	unsigned		need_io_watchdog:1;
 	unsigned		broken_periodic:1;
+	unsigned		amd_l1_fix:1;
 
 	/* required for usb32 quirk */
 	#define OHCI_CTRL_HCFS          (3 << 6)
@@ -195,7 +197,7 @@
 	clear_bit (action, &ehci->actions);
 }
 
-static void free_cached_itd_list(struct ehci_hcd *ehci);
+static void free_cached_lists(struct ehci_hcd *ehci);
 
 /*-------------------------------------------------------------------------*/
 
@@ -360,10 +362,12 @@
 	u8			c_usecs;	/* ... split completion bw */
 	u16			tt_usecs;	/* tt downstream bandwidth */
 	unsigned short		period;		/* polling interval */
-	unsigned short		start;		/* where polling starts */
+	unsigned short		start;		/* where polling starts */
+	unsigned short		u_period;	/* polling interval in uframes */
 #define NO_FRAME ((unsigned short)~0)			/* pick new start */
 
 	struct usb_device	*dev;		/* access to TT */
+	unsigned		is_out:1;	/* bulk or intr OUT */
 	unsigned		clearing_tt:1;	/* Clear-TT-Buf in progress */
 };
 
@@ -394,9 +398,8 @@
  * acts like a qh would, if EHCI had them for ISO.
  */
 struct ehci_iso_stream {
-	/* first two fields match QH, but info1 == 0 */
-	__hc32			hw_next;
-	__hc32			hw_info1;
+	/* first field matches ehci_hq, but is NULL */
+	struct ehci_qh_hw	*hw;
 
 	u32			refcount;
 	u8			bEndpointAddress;
--- linux-mvl-dove-2.6.32.orig/drivers/usb/host/ehci-q.c
+++ linux-mvl-dove-2.6.32/drivers/usb/host/ehci-q.c
@@ -103,7 +103,7 @@
 	if (!(hw->hw_info1 & cpu_to_hc32(ehci, 1 << 14))) {
 		unsigned	is_out, epnum;
 
-		is_out = !(qtd->hw_token & cpu_to_hc32(ehci, 1 << 8));
+		is_out = qh->is_out;
 		epnum = (hc32_to_cpup(ehci, &hw->hw_info1) >> 8) & 0x0f;
 		if (unlikely (!usb_gettoggle (qh->dev, epnum, is_out))) {
 			hw->hw_token &= ~cpu_to_hc32(ehci, QTD_TOGGLE);
@@ -315,7 +315,6 @@
 	int			stopped;
 	unsigned		count = 0;
 	u8			state;
-	const __le32		halt = HALT_BIT(ehci);
 	struct ehci_qh_hw	*hw = qh->hw;
 
 	if (unlikely (list_empty (&qh->qtd_list)))
@@ -422,7 +421,6 @@
 					&& !(qtd->hw_alt_next
 						& EHCI_LIST_END(ehci))) {
 				stopped = 1;
-				goto halt;
 			}
 
 		/* stop scanning when we reach qtds the hc is using */
@@ -456,16 +454,6 @@
 				 */
 				ehci_clear_tt_buffer(ehci, qh, urb, token);
 			}
-
-			/* force halt for unlinked or blocked qh, so we'll
-			 * patch the qh later and so that completions can't
-			 * activate it while we "know" it's stopped.
-			 */
-			if ((halt & hw->hw_token) == 0) {
-halt:
-				hw->hw_token |= halt;
-				wmb ();
-			}
 		}
 
 		/* unless we already know the urb's status, collect qtd status
@@ -822,15 +810,7 @@
 			qh->gap_uf = 0;
 
 			qh->period = urb->interval >> 3;
-			if (qh->period == 0 && urb->interval != 1) {
-				/* NOTE interval 2 or 4 uframes could work.
-				 * But interval 1 scheduling is simpler, and
-				 * includes high bandwidth.
-				 */
-				dbg ("intr period %d uframes, NYET!",
-						urb->interval);
-				goto done;
-			}
+			qh->u_period = urb->interval;
 		} else {
 			int		think_time;
 
@@ -852,6 +832,7 @@
 					usb_calc_bus_time (urb->dev->speed,
 					is_input, 0, max_packet (maxp)));
 			qh->period = urb->interval;
+			qh->u_period = (unsigned short)~0;
 		}
 	}
 
@@ -930,6 +911,7 @@
 	hw = qh->hw;
 	hw->hw_info1 = cpu_to_hc32(ehci, info1);
 	hw->hw_info2 = cpu_to_hc32(ehci, info2);
+	qh->is_out = !is_input;
 	usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
 	qh_refresh (ehci, qh);
 	return qh;
@@ -1231,24 +1213,27 @@
 
 static void scan_async (struct ehci_hcd *ehci)
 {
+	bool			stopped;
 	struct ehci_qh		*qh;
 	enum ehci_timer_action	action = TIMER_IO_WATCHDOG;
 
 	ehci->stamp = ehci_readl(ehci, &ehci->regs->frame_index);
 	timer_action_done (ehci, TIMER_ASYNC_SHRINK);
 rescan:
+	stopped = !HC_IS_RUNNING(ehci_to_hcd(ehci)->state);
 	qh = ehci->async->qh_next.qh;
 	if (likely (qh != NULL)) {
 		do {
 			/* clean any finished work for this qh */
-			if (!list_empty (&qh->qtd_list)
-					&& qh->stamp != ehci->stamp) {
+			if (!list_empty(&qh->qtd_list) && (stopped ||
+					qh->stamp != ehci->stamp)) {
 				int temp;
 
 				/* unlinks could happen here; completion
 				 * reporting drops the lock.  rescan using
 				 * the latest schedule, but don't rescan
-				 * qhs we already finished (no looping).
+				 * qhs we already finished (no looping)
+				 * unless the controller is stopped.
 				 */
 				qh = qh_get (qh);
 				qh->stamp = ehci->stamp;
@@ -1269,9 +1254,9 @@
 			 */
 			if (list_empty(&qh->qtd_list)
 					&& qh->qh_state == QH_STATE_LINKED) {
-				if (!ehci->reclaim
-					&& ((ehci->stamp - qh->stamp) & 0x1fff)
-						>= (EHCI_SHRINK_FRAMES * 8))
+				if (!ehci->reclaim && (stopped ||
+					((ehci->stamp - qh->stamp) & 0x1fff)
+						>= EHCI_SHRINK_FRAMES * 8))
 					start_unlink_async(ehci, qh);
 				else
 					action = TIMER_ASYNC_SHRINK;
--- linux-mvl-dove-2.6.32.orig/drivers/usb/core/devices.c
+++ linux-mvl-dove-2.6.32/drivers/usb/core/devices.c
@@ -65,8 +65,8 @@
 #define ALLOW_SERIAL_NUMBER
 
 static const char *format_topo =
-/* T:  Bus=dd Lev=dd Prnt=dd Port=dd Cnt=dd Dev#=ddd Spd=ddd MxCh=dd */
-"\nT:  Bus=%2.2d Lev=%2.2d Prnt=%2.2d Port=%2.2d Cnt=%2.2d Dev#=%3d Spd=%3s MxCh=%2d\n";
+/* T:  Bus=dd Lev=dd Prnt=dd Port=dd Cnt=dd Dev#=ddd Spd=dddd MxCh=dd */
+"\nT:  Bus=%2.2d Lev=%2.2d Prnt=%2.2d Port=%2.2d Cnt=%2.2d Dev#=%3d Spd=%-4s MxCh=%2d\n";
 
 static const char *format_string_manufacturer =
 /* S:  Manufacturer=xxxx */
@@ -211,7 +211,7 @@
 		break;
 	case USB_ENDPOINT_XFER_INT:
 		type = "Int.";
-		if (speed == USB_SPEED_HIGH)
+		if (speed == USB_SPEED_HIGH || speed == USB_SPEED_SUPER)
 			interval = 1 << (desc->bInterval - 1);
 		else
 			interval = desc->bInterval;
@@ -219,7 +219,8 @@
 	default:	/* "can't happen" */
 		return start;
 	}
-	interval *= (speed == USB_SPEED_HIGH) ? 125 : 1000;
+	interval *= (speed == USB_SPEED_HIGH ||
+		     speed == USB_SPEED_SUPER) ? 125 : 1000;
 	if (interval % 1000)
 		unit = 'u';
 	else {
@@ -494,7 +495,7 @@
 		return 0;
 	/* allocate 2^1 pages = 8K (on i386);
 	 * should be more than enough for one device */
-	pages_start = (char *)__get_free_pages(GFP_KERNEL, 1);
+	pages_start = (char *)__get_free_pages(GFP_NOIO, 1);
 	if (!pages_start)
 		return -ENOMEM;
 
@@ -509,11 +510,13 @@
 		speed = "1.5"; break;
 	case USB_SPEED_UNKNOWN:		/* usb 1.1 root hub code */
 	case USB_SPEED_FULL:
-		speed = "12 "; break;
+		speed = "12"; break;
 	case USB_SPEED_HIGH:
 		speed = "480"; break;
+	case USB_SPEED_SUPER:
+		speed = "5000"; break;
 	default:
-		speed = "?? ";
+		speed = "??";
 	}
 	data_end = pages_start + sprintf(pages_start, format_topo,
 			bus->busnum, level, parent_devnum,
@@ -529,8 +532,9 @@
 	if (level == 0) {
 		int	max;
 
-		/* high speed reserves 80%, full/low reserves 90% */
-		if (usbdev->speed == USB_SPEED_HIGH)
+		/* super/high speed reserves 80%, full/low reserves 90% */
+		if (usbdev->speed == USB_SPEED_HIGH ||
+		    usbdev->speed == USB_SPEED_SUPER)
 			max = 800;
 		else
 			max = FRAME_TIME_MAX_USECS_ALLOC;
--- linux-mvl-dove-2.6.32.orig/drivers/usb/core/driver.c
+++ linux-mvl-dove-2.6.32/drivers/usb/core/driver.c
@@ -625,9 +625,6 @@
 {
 	struct usb_device *usb_dev;
 
-	/* driver is often null here; dev_dbg() would oops */
-	pr_debug("usb %s: uevent\n", dev_name(dev));
-
 	if (is_usb_device(dev)) {
 		usb_dev = to_usb_device(dev);
 	} else if (is_usb_interface(dev)) {
@@ -639,6 +636,7 @@
 	}
 
 	if (usb_dev->devnum < 0) {
+		/* driver is often null here; dev_dbg() would oops */
 		pr_debug("usb %s: already deleted?\n", dev_name(dev));
 		return -ENODEV;
 	}
@@ -1177,9 +1175,8 @@
 			udev->state == USB_STATE_SUSPENDED)
 		goto done;
 
-	udev->do_remote_wakeup = device_may_wakeup(&udev->dev);
-
 	if (msg.event & PM_EVENT_AUTO) {
+		udev->do_remote_wakeup = device_may_wakeup(&udev->dev);
 		status = autosuspend_check(udev, 0);
 		if (status < 0)
 			goto done;
@@ -1190,13 +1187,22 @@
 		for (; i < udev->actconfig->desc.bNumInterfaces; i++) {
 			intf = udev->actconfig->interface[i];
 			status = usb_suspend_interface(udev, intf, msg);
+
+			/* Ignore errors during system sleep transitions */
+			if (!(msg.event & PM_EVENT_AUTO))
+				status = 0;
 			if (status != 0)
 				break;
 		}
 	}
-	if (status == 0)
+	if (status == 0) {
 		status = usb_suspend_device(udev, msg);
 
+		/* Again, ignore errors during system sleep transitions */
+		if (!(msg.event & PM_EVENT_AUTO))
+			status = 0;
+	}
+
 	/* If the suspend failed, resume interfaces that did get suspended */
 	if (status != 0) {
 		pm_message_t msg2;
@@ -1744,6 +1750,23 @@
 	return status;
 }
 
+static void choose_wakeup(struct usb_device *udev, pm_message_t msg)
+{
+	/* Remote wakeup is needed only when we actually go to sleep.
+	 * For things like FREEZE and QUIESCE, if the device is already
+	 * autosuspended then its current wakeup setting is okay.
+	 */
+	if (msg.event == PM_EVENT_FREEZE || msg.event == PM_EVENT_QUIESCE) {
+		udev->do_remote_wakeup = 0;
+		return;
+	}
+
+	/* Allow remote wakeup if it is enabled, even if no interface drivers
+	 * actually want it.
+	 */
+	udev->do_remote_wakeup = device_may_wakeup(&udev->dev);
+}
+
 int usb_suspend(struct device *dev, pm_message_t msg)
 {
 	struct usb_device	*udev;
@@ -1763,6 +1786,7 @@
 	}
 
 	udev->skip_sys_resume = 0;
+	choose_wakeup(udev, msg);
 	return usb_external_suspend_device(udev, msg);
 }
 
--- linux-mvl-dove-2.6.32.orig/drivers/usb/core/sysfs.c
+++ linux-mvl-dove-2.6.32/drivers/usb/core/sysfs.c
@@ -82,9 +82,13 @@
 		struct device_attribute *attr, char *buf)		\
 {									\
 	struct usb_device *udev;					\
+	int retval;							\
 									\
 	udev = to_usb_device(dev);					\
-	return sprintf(buf, "%s\n", udev->name);			\
+	rcu_read_lock();						\
+	retval = sprintf(buf, "%s\n", rcu_dereference(udev->name));	\
+	rcu_read_unlock();						\
+	return retval;							\
 }									\
 static DEVICE_ATTR(name, S_IRUGO, show_##name, NULL);
 
@@ -111,6 +115,12 @@
 	case USB_SPEED_HIGH:
 		speed = "480";
 		break;
+	case USB_SPEED_VARIABLE:
+		speed = "480";
+		break;
+	case USB_SPEED_SUPER:
+		speed = "5000";
+		break;
 	default:
 		speed = "unknown";
 	}
--- linux-mvl-dove-2.6.32.orig/drivers/usb/core/hcd.c
+++ linux-mvl-dove-2.6.32/drivers/usb/core/hcd.c
@@ -140,7 +140,7 @@
 	0x09,       /*  __u8  bMaxPacketSize0; 2^9 = 512 Bytes */
 
 	0x6b, 0x1d, /*  __le16 idVendor; Linux Foundation */
-	0x02, 0x00, /*  __le16 idProduct; device 0x0002 */
+	0x03, 0x00, /*  __le16 idProduct; device 0x0003 */
 	KERNEL_VER, KERNEL_REL, /*  __le16 bcdDevice */
 
 	0x03,       /*  __u8  iManufacturer; */
--- linux-mvl-dove-2.6.32.orig/drivers/usb/core/message.c
+++ linux-mvl-dove-2.6.32/drivers/usb/core/message.c
@@ -911,11 +911,11 @@
 	if (index <= 0)
 		return NULL;
 
-	buf = kmalloc(MAX_USB_STRING_SIZE, GFP_KERNEL);
+	buf = kmalloc(MAX_USB_STRING_SIZE, GFP_NOIO);
 	if (buf) {
 		len = usb_string(udev, index, buf, MAX_USB_STRING_SIZE);
 		if (len > 0) {
-			smallbuf = kmalloc(++len, GFP_KERNEL);
+			smallbuf = kmalloc(++len, GFP_NOIO);
 			if (!smallbuf)
 				return buf;
 			memcpy(smallbuf, buf, len);
@@ -1185,13 +1185,6 @@
 {
 	int i;
 
-	dev_dbg(&dev->dev, "%s nuking %s URBs\n", __func__,
-		skip_ep0 ? "non-ep0" : "all");
-	for (i = skip_ep0; i < 16; ++i) {
-		usb_disable_endpoint(dev, i, true);
-		usb_disable_endpoint(dev, i + USB_DIR_IN, true);
-	}
-
 	/* getting rid of interfaces will disconnect
 	 * any drivers bound to them (a key side effect)
 	 */
@@ -1221,6 +1214,13 @@
 		if (dev->state == USB_STATE_CONFIGURED)
 			usb_set_device_state(dev, USB_STATE_ADDRESS);
 	}
+
+	dev_dbg(&dev->dev, "%s nuking %s URBs\n", __func__,
+		skip_ep0 ? "non-ep0" : "all");
+	for (i = skip_ep0; i < 16; ++i) {
+		usb_disable_endpoint(dev, i, true);
+		usb_disable_endpoint(dev, i + USB_DIR_IN, true);
+	}
 }
 
 /**
@@ -1682,7 +1682,7 @@
 	if (cp) {
 		nintf = cp->desc.bNumInterfaces;
 		new_interfaces = kmalloc(nintf * sizeof(*new_interfaces),
-				GFP_KERNEL);
+				GFP_NOIO);
 		if (!new_interfaces) {
 			dev_err(&dev->dev, "Out of memory\n");
 			return -ENOMEM;
@@ -1691,7 +1691,7 @@
 		for (; n < nintf; ++n) {
 			new_interfaces[n] = kzalloc(
 					sizeof(struct usb_interface),
-					GFP_KERNEL);
+					GFP_NOIO);
 			if (!new_interfaces[n]) {
 				dev_err(&dev->dev, "Out of memory\n");
 				ret = -ENOMEM;
@@ -1792,6 +1792,7 @@
 		intf->dev.groups = usb_interface_groups;
 		intf->dev.dma_mask = dev->dev.dma_mask;
 		INIT_WORK(&intf->reset_ws, __usb_queue_reset_device);
+		intf->minor = -1;
 		device_initialize(&intf->dev);
 		mark_quiesced(intf);
 		dev_set_name(&intf->dev, "%d-%s:%d.%d",
--- linux-mvl-dove-2.6.32.orig/drivers/usb/core/hcd.h
+++ linux-mvl-dove-2.6.32/drivers/usb/core/hcd.h
@@ -111,6 +111,10 @@
 	u64			rsrc_len;	/* memory/io resource length */
 	unsigned		power_budget;	/* in mA, 0 = no limit */
 
+#if defined(CONFIG_HAVE_CLK)
+	struct clk		*clk;
+#endif
+
 #define HCD_BUFFER_POOLS	4
 	struct dma_pool		*pool [HCD_BUFFER_POOLS];
 
@@ -234,7 +238,7 @@
 	/* xHCI specific functions */
 		/* Called by usb_alloc_dev to alloc HC device structures */
 	int	(*alloc_dev)(struct usb_hcd *, struct usb_device *);
-		/* Called by usb_release_dev to free HC device structures */
+		/* Called by usb_disconnect to free HC device structures */
 	void	(*free_dev)(struct usb_hcd *, struct usb_device *);
 
 	/* Bandwidth computation functions */
@@ -391,7 +395,7 @@
  * Generic bandwidth allocation constants/support
  */
 #define FRAME_TIME_USECS	1000L
-#define BitTime(bytecount) (7 * 8 * bytecount / 6) /* with integer truncation */
+#define BitTime(bytecount) (9 * 8 * bytecount / 8) /* with integer truncation */
 		/* Trying not to use worst-case bit-stuffing
 		 * of (7/6 * 8 * bytecount) = 9.33 * bytecount */
 		/* bytecount = data payload byte count */
--- linux-mvl-dove-2.6.32.orig/drivers/usb/core/inode.c
+++ linux-mvl-dove-2.6.32/drivers/usb/core/inode.c
@@ -515,13 +515,13 @@
 	*dentry = NULL;
 	mutex_lock(&parent->d_inode->i_mutex);
 	*dentry = lookup_one_len(name, parent, strlen(name));
-	if (!IS_ERR(dentry)) {
+	if (!IS_ERR(*dentry)) {
 		if ((mode & S_IFMT) == S_IFDIR)
 			error = usbfs_mkdir (parent->d_inode, *dentry, mode);
 		else 
 			error = usbfs_create (parent->d_inode, *dentry, mode);
 	} else
-		error = PTR_ERR(dentry);
+		error = PTR_ERR(*dentry);
 	mutex_unlock(&parent->d_inode->i_mutex);
 
 	return error;
--- linux-mvl-dove-2.6.32.orig/drivers/usb/core/file.c
+++ linux-mvl-dove-2.6.32/drivers/usb/core/file.c
@@ -159,9 +159,9 @@
 int usb_register_dev(struct usb_interface *intf,
 		     struct usb_class_driver *class_driver)
 {
-	int retval = -EINVAL;
+	int retval;
 	int minor_base = class_driver->minor_base;
-	int minor = 0;
+	int minor;
 	char name[20];
 	char *temp;
 
@@ -173,12 +173,17 @@
 	 */
 	minor_base = 0;
 #endif
-	intf->minor = -1;
-
-	dbg ("looking for a minor, starting at %d", minor_base);
 
 	if (class_driver->fops == NULL)
-		goto exit;
+		return -EINVAL;
+	if (intf->minor >= 0)
+		return -EADDRINUSE;
+
+	retval = init_usb_class();
+	if (retval)
+		return retval;
+
+	dev_dbg(&intf->dev, "looking for a minor, starting at %d", minor_base);
 
 	down_write(&minor_rwsem);
 	for (minor = minor_base; minor < MAX_USB_MINORS; ++minor) {
@@ -186,20 +191,12 @@
 			continue;
 
 		usb_minors[minor] = class_driver->fops;
-
-		retval = 0;
+		intf->minor = minor;
 		break;
 	}
 	up_write(&minor_rwsem);
-
-	if (retval)
-		goto exit;
-
-	retval = init_usb_class();
-	if (retval)
-		goto exit;
-
-	intf->minor = minor;
+	if (intf->minor < 0)
+		return -EXFULL;
 
 	/* create a usb class device for this usb interface */
 	snprintf(name, sizeof(name), class_driver->name, minor - minor_base);
@@ -213,11 +210,11 @@
 				      "%s", temp);
 	if (IS_ERR(intf->usb_dev)) {
 		down_write(&minor_rwsem);
-		usb_minors[intf->minor] = NULL;
+		usb_minors[minor] = NULL;
+		intf->minor = -1;
 		up_write(&minor_rwsem);
 		retval = PTR_ERR(intf->usb_dev);
 	}
-exit:
 	return retval;
 }
 EXPORT_SYMBOL_GPL(usb_register_dev);
--- linux-mvl-dove-2.6.32.orig/drivers/usb/core/hub.c
+++ linux-mvl-dove-2.6.32/drivers/usb/core/hub.c
@@ -22,6 +22,8 @@
 #include <linux/kthread.h>
 #include <linux/mutex.h>
 #include <linux/freezer.h>
+#include <linux/usb/quirks.h>
+#include <linux/rcupdate.h>
 
 #include <asm/uaccess.h>
 #include <asm/byteorder.h>
@@ -325,7 +327,8 @@
 {
 	int i, status = -ETIMEDOUT;
 
-	for (i = 0; i < USB_STS_RETRIES && status == -ETIMEDOUT; i++) {
+	for (i = 0; i < USB_STS_RETRIES &&
+			(status == -ETIMEDOUT || status == -EPIPE); i++) {
 		status = usb_control_msg(hdev, usb_rcvctrlpipe(hdev, 0),
 			USB_REQ_GET_STATUS, USB_DIR_IN | USB_RT_HUB, 0, 0,
 			data, sizeof(*data), USB_STS_TIMEOUT);
@@ -341,7 +344,8 @@
 {
 	int i, status = -ETIMEDOUT;
 
-	for (i = 0; i < USB_STS_RETRIES && status == -ETIMEDOUT; i++) {
+	for (i = 0; i < USB_STS_RETRIES &&
+			(status == -ETIMEDOUT || status == -EPIPE); i++) {
 		status = usb_control_msg(hdev, usb_rcvctrlpipe(hdev, 0),
 			USB_REQ_GET_STATUS, USB_DIR_IN | USB_RT_PORT, 0, port1,
 			data, sizeof(*data), USB_STS_TIMEOUT);
@@ -647,6 +651,8 @@
 static void hub_activate(struct usb_hub *hub, enum hub_activation_type type)
 {
 	struct usb_device *hdev = hub->hdev;
+	struct usb_hcd *hcd;
+	int ret;
 	int port1;
 	int status;
 	bool need_debounce_delay = false;
@@ -685,6 +691,25 @@
 			atomic_set(&to_usb_interface(hub->intfdev)->
 					pm_usage_cnt, 1);
 			return;		/* Continues at init2: below */
+		} else if (type == HUB_RESET_RESUME) {
+			/* The internal host controller state for the hub device
+			 * may be gone after a host power loss on system resume.
+			 * Update the device's info so the HW knows it's a hub.
+			 */
+			hcd = bus_to_hcd(hdev->bus);
+			if (hcd->driver->update_hub_device) {
+				ret = hcd->driver->update_hub_device(hcd, hdev,
+						&hub->tt, GFP_NOIO);
+				if (ret < 0) {
+					dev_err(hub->intfdev, "Host not "
+							"accepting hub info "
+							"update.\n");
+					dev_err(hub->intfdev, "LS/FS devices "
+							"and hubs may not work "
+							"under this hub\n.");
+				}
+			}
+			hub_power_on(hub, true);
 		} else {
 			hub_power_on(hub, true);
 		}
@@ -1402,11 +1427,11 @@
 					|| new_state == USB_STATE_SUSPENDED)
 				;	/* No change to wakeup settings */
 			else if (new_state == USB_STATE_CONFIGURED)
-				device_init_wakeup(&udev->dev,
+				device_set_wakeup_capable(&udev->dev,
 					(udev->actconfig->desc.bmAttributes
 					 & USB_CONFIG_ATT_WAKEUP));
 			else
-				device_init_wakeup(&udev->dev, 0);
+				device_set_wakeup_capable(&udev->dev, 0);
 		}
 		if (udev->state == USB_STATE_SUSPENDED &&
 			new_state != USB_STATE_SUSPENDED)
@@ -1508,6 +1533,15 @@
 
 #endif
 
+static void hub_free_dev(struct usb_device *udev)
+{
+	struct usb_hcd *hcd = bus_to_hcd(udev->bus);
+
+	/* Root hubs aren't real devices, so don't free HCD resources */
+	if (hcd->driver->free_dev && udev->parent)
+		hcd->driver->free_dev(hcd, udev);
+}
+
 /**
  * usb_disconnect - disconnect a device (usbcore-internal)
  * @pdev: pointer to device being disconnected
@@ -1578,6 +1612,8 @@
 
 	usb_stop_pm(udev);
 
+	hub_free_dev(udev);
+
 	put_device(&udev->dev);
 }
 
@@ -1612,12 +1648,12 @@
 #endif
 
 /**
- * usb_configure_device_otg - FIXME (usbcore-internal)
+ * usb_enumerate_device_otg - FIXME (usbcore-internal)
  * @udev: newly addressed device (in ADDRESS state)
  *
- * Do configuration for On-The-Go devices
+ * Finish enumeration for On-The-Go devices
  */
-static int usb_configure_device_otg(struct usb_device *udev)
+static int usb_enumerate_device_otg(struct usb_device *udev)
 {
 	int err = 0;
 
@@ -1688,7 +1724,7 @@
 
 
 /**
- * usb_configure_device - Detect and probe device intfs/otg (usbcore-internal)
+ * usb_enumerate_device - Read device configs/intfs/otg (usbcore-internal)
  * @udev: newly addressed device (in ADDRESS state)
  *
  * This is only called by usb_new_device() and usb_authorize_device()
@@ -1699,7 +1735,7 @@
  * the string descriptors, as they will be errored out by the device
  * until it has been authorized.
  */
-static int usb_configure_device(struct usb_device *udev)
+static int usb_enumerate_device(struct usb_device *udev)
 {
 	int err;
 
@@ -1723,7 +1759,7 @@
 						      udev->descriptor.iManufacturer);
 		udev->serial = usb_cache_string(udev, udev->descriptor.iSerialNumber);
 	}
-	err = usb_configure_device_otg(udev);
+	err = usb_enumerate_device_otg(udev);
 fail:
 	return err;
 }
@@ -1733,8 +1769,8 @@
  * usb_new_device - perform initial device setup (usbcore-internal)
  * @udev: newly addressed device (in ADDRESS state)
  *
- * This is called with devices which have been enumerated, but not yet
- * configured.  The device descriptor is available, but not descriptors
+ * This is called with devices which have been detected but not fully
+ * enumerated.  The device descriptor is available, but not descriptors
  * for any device configuration.  The caller must have locked either
  * the parent hub (if udev is a normal device) or else the
  * usb_bus_list_lock (if udev is a root hub).  The parent's pointer to
@@ -1753,12 +1789,18 @@
 {
 	int err;
 
-	/* Increment the parent's count of unsuspended children */
-	if (udev->parent)
+	if (udev->parent) {
+		/* Increment the parent's count of unsuspended children */
 		usb_autoresume_device(udev->parent);
 
-	usb_detect_quirks(udev);		/* Determine quirks */
-	err = usb_configure_device(udev);	/* detect & probe dev/intfs */
+		/* Initialize non-root-hub device wakeup to disabled;
+		 * device (un)configuration controls wakeup capable
+		 * sysfs power/wakeup controls wakeup enabled/disabled
+		 */
+		device_init_wakeup(&udev->dev, 0);
+	}
+
+	err = usb_enumerate_device(udev);	/* Read descriptors */
 	if (err < 0)
 		goto fail;
 	dev_dbg(&udev->dev, "udev %d, busnum %d, minor = %d\n",
@@ -1803,23 +1845,36 @@
  */
 int usb_deauthorize_device(struct usb_device *usb_dev)
 {
-	unsigned cnt;
+	char *product = NULL;
+	char *manufacturer = NULL;
+	char *serial = NULL;
+
 	usb_lock_device(usb_dev);
 	if (usb_dev->authorized == 0)
 		goto out_unauthorized;
+
 	usb_dev->authorized = 0;
 	usb_set_configuration(usb_dev, -1);
+
+	product = usb_dev->product;
+	manufacturer = usb_dev->manufacturer;
+	serial = usb_dev->serial;
+
 	usb_dev->product = kstrdup("n/a (unauthorized)", GFP_KERNEL);
 	usb_dev->manufacturer = kstrdup("n/a (unauthorized)", GFP_KERNEL);
 	usb_dev->serial = kstrdup("n/a (unauthorized)", GFP_KERNEL);
-	kfree(usb_dev->config);
-	usb_dev->config = NULL;
-	for (cnt = 0; cnt < usb_dev->descriptor.bNumConfigurations; cnt++)
-		kfree(usb_dev->rawdescriptors[cnt]);
+
+	usb_destroy_configuration(usb_dev);
 	usb_dev->descriptor.bNumConfigurations = 0;
-	kfree(usb_dev->rawdescriptors);
+
 out_unauthorized:
 	usb_unlock_device(usb_dev);
+	if (product || manufacturer || serial) {
+		synchronize_rcu();
+		kfree(product);
+		kfree(manufacturer);
+		kfree(serial);
+	}
 	return 0;
 }
 
@@ -1827,15 +1882,14 @@
 int usb_authorize_device(struct usb_device *usb_dev)
 {
 	int result = 0, c;
+	char *product = NULL;
+	char *manufacturer = NULL;
+	char *serial = NULL;
+
 	usb_lock_device(usb_dev);
 	if (usb_dev->authorized == 1)
 		goto out_authorized;
-	kfree(usb_dev->product);
-	usb_dev->product = NULL;
-	kfree(usb_dev->manufacturer);
-	usb_dev->manufacturer = NULL;
-	kfree(usb_dev->serial);
-	usb_dev->serial = NULL;
+
 	result = usb_autoresume_device(usb_dev);
 	if (result < 0) {
 		dev_err(&usb_dev->dev,
@@ -1848,10 +1902,19 @@
 			"authorization: %d\n", result);
 		goto error_device_descriptor;
 	}
+
+	product = usb_dev->product;
+	manufacturer = usb_dev->manufacturer;
+	serial = usb_dev->serial;
+	
+	usb_dev->product = NULL;
+	usb_dev->manufacturer = NULL;
+	usb_dev->serial = NULL;
+
 	usb_dev->authorized = 1;
-	result = usb_configure_device(usb_dev);
+	result = usb_enumerate_device(usb_dev);
 	if (result < 0)
-		goto error_configure;
+		goto error_enumerate;
 	/* Choose and set the configuration.  This registers the interfaces
 	 * with the driver core and lets interface drivers bind to them.
 	 */
@@ -1866,11 +1929,19 @@
 		}
 	}
 	dev_info(&usb_dev->dev, "authorized to connect\n");
-error_configure:
+
+error_enumerate:
 error_device_descriptor:
+	usb_autosuspend_device(usb_dev);
 error_autoresume:
 out_authorized:
 	usb_unlock_device(usb_dev);	// complements locktree
+	if (product || manufacturer || serial) {
+		synchronize_rcu();
+		kfree(product);
+		kfree(manufacturer);
+		kfree(serial);
+	}
 	return result;
 }
 
@@ -2139,6 +2210,10 @@
 				USB_DEVICE_REMOTE_WAKEUP, 0,
 				NULL, 0,
 				USB_CTRL_SET_TIMEOUT);
+
+		/* System sleep transitions should never fail */
+		if (!(msg.event & PM_EVENT_AUTO))
+			status = 0;
 	} else {
 		/* device has up to 10 msec to fully suspend */
 		dev_dbg(&udev->dev, "usb %ssuspend\n",
@@ -2378,16 +2453,15 @@
 	struct usb_device	*hdev = hub->hdev;
 	unsigned		port1;
 
-	/* fail if children aren't already suspended */
+	/* Warn if children aren't already suspended */
 	for (port1 = 1; port1 <= hdev->maxchild; port1++) {
 		struct usb_device	*udev;
 
 		udev = hdev->children [port1-1];
 		if (udev && udev->can_submit) {
-			if (!(msg.event & PM_EVENT_AUTO))
-				dev_dbg(&intf->dev, "port %d nyet suspended\n",
-						port1);
-			return -EBUSY;
+			dev_warn(&intf->dev, "port %d nyet suspended\n", port1);
+			if (msg.event & PM_EVENT_AUTO)
+				return -EBUSY;
 		}
 	}
 
@@ -2664,6 +2738,11 @@
 		udev->ttport = hdev->ttport;
 	} else if (udev->speed != USB_SPEED_HIGH
 			&& hdev->speed == USB_SPEED_HIGH) {
+		if (!hub->tt.hub) {
+			dev_err(&udev->dev, "parent hub has no TT\n");
+			retval = -EINVAL;
+			goto fail;
+		}
 		udev->tt = &hub->tt;
 		udev->ttport = port1;
 	}
@@ -2802,13 +2881,16 @@
 	else
 		i = udev->descriptor.bMaxPacketSize0;
 	if (le16_to_cpu(udev->ep0.desc.wMaxPacketSize) != i) {
-		if (udev->speed != USB_SPEED_FULL ||
+		if (udev->speed == USB_SPEED_LOW ||
 				!(i == 8 || i == 16 || i == 32 || i == 64)) {
-			dev_err(&udev->dev, "ep0 maxpacket = %d\n", i);
+			dev_err(&udev->dev, "Invalid ep0 maxpacket: %d\n", i);
 			retval = -EMSGSIZE;
 			goto fail;
 		}
-		dev_dbg(&udev->dev, "ep0 maxpacket = %d\n", i);
+		if (udev->speed == USB_SPEED_FULL)
+			dev_dbg(&udev->dev, "ep0 maxpacket = %d\n", i);
+		else
+			dev_warn(&udev->dev, "Using ep0 maxpacket: %d\n", i);
 		udev->ep0.desc.wMaxPacketSize = cpu_to_le16(i);
 		usb_ep0_reinit(udev);
 	}
@@ -3044,6 +3126,10 @@
 		if (status < 0)
 			goto loop;
 
+		usb_detect_quirks(udev);
+		if (udev->quirks & USB_QUIRK_DELAY_INIT)
+			msleep(1000);
+
 		/* consecutive bus-powered hubs aren't reliable; they can
 		 * violate the voltage drop budget.  if the new child has
 		 * a "powered" LED, users should notice we didn't enable it
@@ -3122,6 +3208,7 @@
 loop:
 		usb_ep0_reinit(udev);
 		release_address(udev);
+		hub_free_dev(udev);
 		usb_put_dev(udev);
 		if ((status == -ENOTCONN) || (status == -ENOTSUPP))
 			break;
@@ -3278,6 +3365,9 @@
 					USB_PORT_FEAT_C_SUSPEND);
 				udev = hdev->children[i-1];
 				if (udev) {
+					/* TRSMRCY = 10 msec */
+					msleep(10);
+
 					usb_lock_device(udev);
 					ret = remote_wakeup(hdev->
 							children[i-1]);
--- linux-mvl-dove-2.6.32.orig/drivers/usb/core/usb.c
+++ linux-mvl-dove-2.6.32/drivers/usb/core/usb.c
@@ -132,7 +132,7 @@
 
 struct find_interface_arg {
 	int minor;
-	struct usb_interface *interface;
+	struct device_driver *drv;
 };
 
 static int __find_interface(struct device *dev, void *data)
@@ -143,12 +143,10 @@
 	if (!is_usb_interface(dev))
 		return 0;
 
+	if (dev->driver != arg->drv)
+		return 0;
 	intf = to_usb_interface(dev);
-	if (intf->minor != -1 && intf->minor == arg->minor) {
-		arg->interface = intf;
-		return 1;
-	}
-	return 0;
+	return intf->minor == arg->minor;
 }
 
 /**
@@ -156,21 +154,24 @@
  * @drv: the driver whose current configuration is considered
  * @minor: the minor number of the desired device
  *
- * This walks the driver device list and returns a pointer to the interface
- * with the matching minor.  Note, this only works for devices that share the
- * USB major number.
+ * This walks the bus device list and returns a pointer to the interface
+ * with the matching minor and driver.  Note, this only works for devices
+ * that share the USB major number.
  */
 struct usb_interface *usb_find_interface(struct usb_driver *drv, int minor)
 {
 	struct find_interface_arg argb;
-	int retval;
+	struct device *dev;
 
 	argb.minor = minor;
-	argb.interface = NULL;
-	/* eat the error, it will be in argb.interface */
-	retval = driver_for_each_device(&drv->drvwrap.driver, NULL, &argb,
-					__find_interface);
-	return argb.interface;
+	argb.drv = &drv->drvwrap.driver;
+
+	dev = bus_find_device(&usb_bus_type, NULL, &argb, __find_interface);
+
+	/* Drop reference count from bus_find_device */
+	put_device(dev);
+
+	return dev ? to_usb_interface(dev) : NULL;
 }
 EXPORT_SYMBOL_GPL(usb_find_interface);
 
@@ -190,9 +191,6 @@
 	hcd = bus_to_hcd(udev->bus);
 
 	usb_destroy_configuration(udev);
-	/* Root hubs aren't real devices, so don't free HCD resources */
-	if (hcd->driver->free_dev && udev->parent)
-		hcd->driver->free_dev(hcd, udev);
 	usb_put_hcd(hcd);
 	kfree(udev->product);
 	kfree(udev->manufacturer);
--- linux-mvl-dove-2.6.32.orig/drivers/usb/core/quirks.c
+++ linux-mvl-dove-2.6.32/drivers/usb/core/quirks.c
@@ -38,9 +38,20 @@
 	/* Creative SB Audigy 2 NX */
 	{ USB_DEVICE(0x041e, 0x3020), .driver_info = USB_QUIRK_RESET_RESUME },
 
+	/* Logitech Harmony 700-series */
+	{ USB_DEVICE(0x046d, 0xc122), .driver_info = USB_QUIRK_DELAY_INIT },
+
 	/* Philips PSC805 audio device */
 	{ USB_DEVICE(0x0471, 0x0155), .driver_info = USB_QUIRK_RESET_RESUME },
 
+	/* Artisman Watchdog Dongle */
+	{ USB_DEVICE(0x04b4, 0x0526), .driver_info =
+			USB_QUIRK_CONFIG_INTF_STRINGS },
+
+	/* Samsung Android phone modem - ID conflict with SPH-I500 */
+	{ USB_DEVICE(0x04e8, 0x6601), .driver_info =
+			USB_QUIRK_CONFIG_INTF_STRINGS },
+
 	/* Roland SC-8820 */
 	{ USB_DEVICE(0x0582, 0x0007), .driver_info = USB_QUIRK_RESET_RESUME },
 
@@ -61,9 +72,16 @@
 	/* M-Systems Flash Disk Pioneers */
 	{ USB_DEVICE(0x08ec, 0x1000), .driver_info = USB_QUIRK_RESET_RESUME },
 
+	/* Keytouch QWERTY Panel keyboard */
+	{ USB_DEVICE(0x0926, 0x3333), .driver_info =
+			USB_QUIRK_CONFIG_INTF_STRINGS },
+
 	/* X-Rite/Gretag-Macbeth Eye-One Pro display colorimeter */
 	{ USB_DEVICE(0x0971, 0x2000), .driver_info = USB_QUIRK_NO_SET_INTF },
 
+	/* Broadcom BCM92035DGROM BT dongle */
+	{ USB_DEVICE(0x0a5c, 0x2021), .driver_info = USB_QUIRK_RESET_RESUME },
+
 	/* Action Semiconductor flash disk */
 	{ USB_DEVICE(0x10d6, 0x2200), .driver_info =
 			USB_QUIRK_STRING_FETCH_255 },
@@ -96,6 +114,11 @@
 {
 	const struct usb_device_id *id = usb_quirk_list;
 
+#if defined(CONFIG_ARCH_FEROCEON) || defined(CONFIG_MARVELL) || defined(CONFIG_PLAT_ORION)
+	/* By default set USB_QUIRK_STRING_FETCH_255 for all unknown devices */
+	udev->quirks = USB_QUIRK_STRING_FETCH_255;
+#endif /* CONFIG_ARCH_FEROCEON || CONFIG_ARCH_FEROCEON */
+
 	id = find_id(udev);
 	if (id)
 		udev->quirks = (u32)(id->driver_info);
--- linux-mvl-dove-2.6.32.orig/drivers/usb/core/generic.c
+++ linux-mvl-dove-2.6.32/drivers/usb/core/generic.c
@@ -120,7 +120,7 @@
 		 * than a vendor-specific driver. */
 		else if (udev->descriptor.bDeviceClass !=
 						USB_CLASS_VENDOR_SPEC &&
-				(!desc || desc->bInterfaceClass !=
+				(desc && desc->bInterfaceClass !=
 						USB_CLASS_VENDOR_SPEC)) {
 			best = c;
 			break;
--- linux-mvl-dove-2.6.32.orig/drivers/usb/core/devio.c
+++ linux-mvl-dove-2.6.32/drivers/usb/core/devio.c
@@ -946,10 +946,11 @@
 
 static int proc_connectinfo(struct dev_state *ps, void __user *arg)
 {
-	struct usbdevfs_connectinfo ci;
+	struct usbdevfs_connectinfo ci = {
+		.devnum = ps->dev->devnum,
+		.slow = ps->dev->speed == USB_SPEED_LOW
+	};
 
-	ci.devnum = ps->dev->devnum;
-	ci.slow = ps->dev->speed == USB_SPEED_LOW;
 	if (copy_to_user(arg, &ci, sizeof(ci)))
 		return -EFAULT;
 	return 0;
@@ -1176,6 +1177,13 @@
 			free_async(as);
 			return -ENOMEM;
 		}
+		/* Isochronous input data may end up being discontiguous
+		 * if some of the packets are short.  Clear the buffer so
+		 * that the gaps don't leak kernel data to userspace.
+		 */
+		if (is_in && uurb->type == USBDEVFS_URB_TYPE_ISO)
+			memset(as->urb->transfer_buffer, 0,
+					uurb->buffer_length);
 	}
 	as->urb->dev = ps->dev;
 	as->urb->pipe = (uurb->type << 30) |
@@ -1312,10 +1320,14 @@
 	void __user *addr = as->userurb;
 	unsigned int i;
 
-	if (as->userbuffer)
-		if (copy_to_user(as->userbuffer, urb->transfer_buffer,
-				 urb->transfer_buffer_length))
+	if (as->userbuffer && urb->actual_length) {
+		if (urb->number_of_packets > 0)		/* Isochronous */
+			i = urb->transfer_buffer_length;
+		else					/* Non-Isoc */
+			i = urb->actual_length;
+		if (copy_to_user(as->userbuffer, urb->transfer_buffer, i))
 			goto err_out;
+	}
 	if (put_user(as->status, &userurb->status))
 		goto err_out;
 	if (put_user(urb->actual_length, &userurb->actual_length))
@@ -1334,14 +1346,11 @@
 		}
 	}
 
-	free_async(as);
-
 	if (put_user(addr, (void __user * __user *)arg))
 		return -EFAULT;
 	return 0;
 
 err_out:
-	free_async(as);
 	return -EFAULT;
 }
 
@@ -1371,8 +1380,11 @@
 static int proc_reapurb(struct dev_state *ps, void __user *arg)
 {
 	struct async *as = reap_as(ps);
-	if (as)
-		return processcompl(as, (void __user * __user *)arg);
+	if (as) {
+		int retval = processcompl(as, (void __user * __user *)arg);
+		free_async(as);
+		return retval;
+	}
 	if (signal_pending(current))
 		return -EINTR;
 	return -EIO;
@@ -1380,11 +1392,16 @@
 
 static int proc_reapurbnonblock(struct dev_state *ps, void __user *arg)
 {
+	int retval;
 	struct async *as;
 
-	if (!(as = async_getcompleted(ps)))
-		return -EAGAIN;
-	return processcompl(as, (void __user * __user *)arg);
+	as = async_getcompleted(ps);
+	retval = -EAGAIN;
+	if (as) {
+		retval = processcompl(as, (void __user * __user *)arg);
+		free_async(as);
+	}
+	return retval;
 }
 
 #ifdef CONFIG_COMPAT
@@ -1435,9 +1452,9 @@
 	void __user *addr = as->userurb;
 	unsigned int i;
 
-	if (as->userbuffer)
+	if (as->userbuffer && urb->actual_length)
 		if (copy_to_user(as->userbuffer, urb->transfer_buffer,
-				 urb->transfer_buffer_length))
+				 urb->actual_length))
 			return -EFAULT;
 	if (put_user(as->status, &userurb->status))
 		return -EFAULT;
@@ -1457,7 +1474,6 @@
 		}
 	}
 
-	free_async(as);
 	if (put_user(ptr_to_compat(addr), (u32 __user *)arg))
 		return -EFAULT;
 	return 0;
@@ -1466,8 +1482,11 @@
 static int proc_reapurb_compat(struct dev_state *ps, void __user *arg)
 {
 	struct async *as = reap_as(ps);
-	if (as)
-		return processcompl_compat(as, (void __user * __user *)arg);
+	if (as) {
+		int retval = processcompl_compat(as, (void __user * __user *)arg);
+		free_async(as);
+		return retval;
+	}
 	if (signal_pending(current))
 		return -EINTR;
 	return -EIO;
@@ -1475,11 +1494,16 @@
 
 static int proc_reapurbnonblock_compat(struct dev_state *ps, void __user *arg)
 {
+	int retval;
 	struct async *as;
 
-	if (!(as = async_getcompleted(ps)))
-		return -EAGAIN;
-	return processcompl_compat(as, (void __user * __user *)arg);
+	retval = -EAGAIN;
+	as = async_getcompleted(ps);
+	if (as) {
+		retval = processcompl_compat(as, (void __user * __user *)arg);
+		free_async(as);
+	}
+	return retval;
 }
 
 #endif
--- linux-mvl-dove-2.6.32.orig/drivers/usb/core/hcd-pci.c
+++ linux-mvl-dove-2.6.32/drivers/usb/core/hcd-pci.c
@@ -197,8 +197,10 @@
 	if (!hcd)
 		return;
 
-	if (hcd->driver->shutdown)
+	if (hcd->driver->shutdown) {
 		hcd->driver->shutdown(hcd);
+		pci_disable_device(dev);
+	}
 }
 EXPORT_SYMBOL_GPL(usb_hcd_pci_shutdown);
 
--- linux-mvl-dove-2.6.32.orig/drivers/usb/core/urb.c
+++ linux-mvl-dove-2.6.32/drivers/usb/core/urb.c
@@ -137,6 +137,16 @@
 }
 EXPORT_SYMBOL_GPL(usb_anchor_urb);
 
+/* Callers must hold anchor->lock */
+static void __usb_unanchor_urb(struct urb *urb, struct usb_anchor *anchor)
+{
+	urb->anchor = NULL;
+	list_del(&urb->anchor_list);
+	usb_put_urb(urb);
+	if (list_empty(&anchor->urb_list))
+		wake_up(&anchor->wait);
+}
+
 /**
  * usb_unanchor_urb - unanchors an URB
  * @urb: pointer to the urb to anchor
@@ -156,17 +166,14 @@
 		return;
 
 	spin_lock_irqsave(&anchor->lock, flags);
-	if (unlikely(anchor != urb->anchor)) {
-		/* we've lost the race to another thread */
-		spin_unlock_irqrestore(&anchor->lock, flags);
-		return;
-	}
-	urb->anchor = NULL;
-	list_del(&urb->anchor_list);
+	/*
+	 * At this point, we could be competing with another thread which
+	 * has the same intention. To protect the urb from being unanchored
+	 * twice, only the winner of the race gets the job.
+	 */
+	if (likely(anchor == urb->anchor))
+		__usb_unanchor_urb(urb, anchor);
 	spin_unlock_irqrestore(&anchor->lock, flags);
-	usb_put_urb(urb);
-	if (list_empty(&anchor->urb_list))
-		wake_up(&anchor->wait);
 }
 EXPORT_SYMBOL_GPL(usb_unanchor_urb);
 
@@ -725,20 +732,11 @@
 void usb_unlink_anchored_urbs(struct usb_anchor *anchor)
 {
 	struct urb *victim;
-	unsigned long flags;
 
-	spin_lock_irqsave(&anchor->lock, flags);
-	while (!list_empty(&anchor->urb_list)) {
-		victim = list_entry(anchor->urb_list.prev, struct urb,
-				    anchor_list);
-		usb_get_urb(victim);
-		spin_unlock_irqrestore(&anchor->lock, flags);
-		/* this will unanchor the URB */
+	while ((victim = usb_get_from_anchor(anchor)) != NULL) {
 		usb_unlink_urb(victim);
 		usb_put_urb(victim);
-		spin_lock_irqsave(&anchor->lock, flags);
 	}
-	spin_unlock_irqrestore(&anchor->lock, flags);
 }
 EXPORT_SYMBOL_GPL(usb_unlink_anchored_urbs);
 
@@ -775,12 +773,11 @@
 		victim = list_entry(anchor->urb_list.next, struct urb,
 				    anchor_list);
 		usb_get_urb(victim);
-		spin_unlock_irqrestore(&anchor->lock, flags);
-		usb_unanchor_urb(victim);
+		__usb_unanchor_urb(victim, anchor);
 	} else {
-		spin_unlock_irqrestore(&anchor->lock, flags);
 		victim = NULL;
 	}
+	spin_unlock_irqrestore(&anchor->lock, flags);
 
 	return victim;
 }
@@ -802,12 +799,7 @@
 	while (!list_empty(&anchor->urb_list)) {
 		victim = list_entry(anchor->urb_list.prev, struct urb,
 				    anchor_list);
-		usb_get_urb(victim);
-		spin_unlock_irqrestore(&anchor->lock, flags);
-		/* this may free the URB */
-		usb_unanchor_urb(victim);
-		usb_put_urb(victim);
-		spin_lock_irqsave(&anchor->lock, flags);
+		__usb_unanchor_urb(victim, anchor);
 	}
 	spin_unlock_irqrestore(&anchor->lock, flags);
 }
--- linux-mvl-dove-2.6.32.orig/drivers/usb/musb/omap2430.c
+++ linux-mvl-dove-2.6.32/drivers/usb/musb/omap2430.c
@@ -309,6 +309,7 @@
 
 int musb_platform_exit(struct musb *musb)
 {
+	del_timer_sync(&musb_idle_timer);
 
 	omap_vbus_power(musb, 0 /*off*/, 1);
 
--- linux-mvl-dove-2.6.32.orig/drivers/usb/musb/musb_core.c
+++ linux-mvl-dove-2.6.32/drivers/usb/musb/musb_core.c
@@ -1634,6 +1634,7 @@
 			}
 		}
 	}
+	musb_writeb(musb_base, MUSB_INDEX, musb->context.index);
 }
 
 #else
@@ -1792,6 +1793,7 @@
 	INIT_LIST_HEAD(&musb->out_bulk);
 
 	hcd->uses_new_polling = 1;
+	hcd->has_tt = 1;
 
 	musb->vbuserr_retry = VBUSERR_RETRY_COUNT;
 	musb->a_wait_bcon = OTG_TIME_A_WAIT_BCON;
--- linux-mvl-dove-2.6.32.orig/drivers/usb/musb/musb_gadget_ep0.c
+++ linux-mvl-dove-2.6.32/drivers/usb/musb/musb_gadget_ep0.c
@@ -199,7 +199,6 @@
 static void musb_g_ep0_giveback(struct musb *musb, struct usb_request *req)
 {
 	musb_g_giveback(&musb->endpoints[0].ep_in, req, 0);
-	musb->ep0_state = MUSB_EP0_STAGE_SETUP;
 }
 
 /*
@@ -370,6 +369,7 @@
 					ctrlrequest->wIndex & 0x0f;
 				struct musb_ep		*musb_ep;
 				struct musb_hw_ep	*ep;
+				struct musb_request	*request;
 				void __iomem		*regs;
 				int			is_in;
 				u16			csr;
@@ -412,6 +412,14 @@
 							csr);
 				}
 
+				/* Maybe start the first request in the queue */
+				request = to_musb_request(
+						next_request(musb_ep));
+				if (!musb_ep->busy && request) {
+					DBG(3, "restarting the request\n");
+					musb_ep_restart(musb, request);
+				}
+
 				/* select ep0 again */
 				musb_ep_select(mbase, 0);
 				handled = 1;
@@ -648,7 +656,7 @@
 			musb->ep0_state = MUSB_EP0_STAGE_STATUSIN;
 			break;
 		default:
-			ERR("SetupEnd came in a wrong ep0stage %s",
+			ERR("SetupEnd came in a wrong ep0stage %s\n",
 			    decode_ep0stage(musb->ep0_state));
 		}
 		csr = musb_readw(regs, MUSB_CSR0);
@@ -771,12 +779,18 @@
 				handled = service_zero_data_request(
 						musb, &setup);
 
+				/*
+				 * We're expecting no data in any case, so
+				 * always set the DATAEND bit -- doing this
+				 * here helps avoid SetupEnd interrupt coming
+				 * in the idle stage when we're stalling...
+				 */
+				musb->ackpend |= MUSB_CSR0_P_DATAEND;
+
 				/* status stage might be immediate */
-				if (handled > 0) {
-					musb->ackpend |= MUSB_CSR0_P_DATAEND;
+				if (handled > 0)
 					musb->ep0_state =
 						MUSB_EP0_STAGE_STATUSIN;
-				}
 				break;
 
 			/* sequence #1 (IN to host), includes GET_STATUS
--- linux-mvl-dove-2.6.32.orig/drivers/usb/musb/musb_gadget.c
+++ linux-mvl-dove-2.6.32/drivers/usb/musb/musb_gadget.c
@@ -577,11 +577,19 @@
 {
 	const u8		epnum = req->epnum;
 	struct usb_request	*request = &req->request;
-	struct musb_ep		*musb_ep = &musb->endpoints[epnum].ep_out;
+	struct musb_ep		*musb_ep;
 	void __iomem		*epio = musb->endpoints[epnum].regs;
 	unsigned		fifo_count = 0;
-	u16			len = musb_ep->packet_sz;
+	u16			len;
 	u16			csr = musb_readw(epio, MUSB_RXCSR);
+	struct musb_hw_ep	*hw_ep = &musb->endpoints[epnum];
+
+	if (hw_ep->is_shared_fifo)
+		musb_ep = &hw_ep->ep_in;
+	else
+		musb_ep = &hw_ep->ep_out;
+
+	len = musb_ep->packet_sz;
 
 	/* We shouldn't get here while DMA is active, but we do... */
 	if (dma_channel_status(musb_ep->dma) == MUSB_DMA_STATUS_BUSY) {
@@ -749,9 +757,15 @@
 	u16			csr;
 	struct usb_request	*request;
 	void __iomem		*mbase = musb->mregs;
-	struct musb_ep		*musb_ep = &musb->endpoints[epnum].ep_out;
+	struct musb_ep		*musb_ep;
 	void __iomem		*epio = musb->endpoints[epnum].regs;
 	struct dma_channel	*dma;
+	struct musb_hw_ep	*hw_ep = &musb->endpoints[epnum];
+
+	if (hw_ep->is_shared_fifo)
+		musb_ep = &hw_ep->ep_in;
+	else
+		musb_ep = &hw_ep->ep_out;
 
 	musb_ep_select(mbase, epnum);
 
@@ -1074,7 +1088,7 @@
 /*
  * Context: controller locked, IRQs blocked.
  */
-static void musb_ep_restart(struct musb *musb, struct musb_request *req)
+void musb_ep_restart(struct musb *musb, struct musb_request *req)
 {
 	DBG(3, "<== %s request %p len %u on hw_ep%d\n",
 		req->tx ? "TX/IN" : "RX/OUT",
--- linux-mvl-dove-2.6.32.orig/drivers/usb/musb/musb_gadget.h
+++ linux-mvl-dove-2.6.32/drivers/usb/musb/musb_gadget.h
@@ -105,4 +105,6 @@
 
 extern int musb_gadget_set_halt(struct usb_ep *ep, int value);
 
+extern void musb_ep_restart(struct musb *, struct musb_request *);
+
 #endif		/* __MUSB_GADGET_H */
--- linux-mvl-dove-2.6.32.orig/drivers/usb/musb/blackfin.c
+++ linux-mvl-dove-2.6.32/drivers/usb/musb/blackfin.c
@@ -248,8 +248,10 @@
 
 	usb_nop_xceiv_register();
 	musb->xceiv = otg_get_transceiver();
-	if (!musb->xceiv)
+	if (!musb->xceiv) {
+		gpio_free(musb->config->gpio_vrsel);
 		return -ENODEV;
+	}
 
 	if (ANOMALY_05000346) {
 		bfin_write_USB_APHY_CALIB(ANOMALY_05000346_value);
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/control.stub.in
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/control.stub.in
@@ -0,0 +1,21 @@
+Source: SRCPKGNAME
+Section: devel
+Priority: optional
+Maintainer: Ubuntu Kernel Team <kernel-team@lists.ubuntu.com>
+Standards-Version: 3.8.4.0
+Build-Depends: debhelper (>= 5), cpio, module-init-tools, kernel-wedge (>= 2.24ubuntu1), rsync
+Build-Depends-Indep: xmlto, docbook-utils, ghostscript, transfig, bzip2, sharutils
+Build-Conflicts: findutils (= 4.4.1-1ubuntu1)
+Vcs-Git: http://kernel.ubuntu.com/git-repos/ubuntu/ubuntu-lucid.git
+
+Package: linux-headers-PKGVER-ABINUM
+Architecture: armel
+Section: devel
+Priority: optional
+Depends: ${misc:Depends}, coreutils | fileutils (>= 4.0)
+#Provides: linux-headers, linux-headers-2.6
+Description: Header files related to SRCPKGNAME kernel version PKGVER
+ This package provides kernel header files for version PKGVER, for sites
+ that want the latest kernel headers. Please read
+ /usr/share/doc/linux-headers-PKGVER-ABINUM/debian.README.gz for details
+
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/control.stub
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/control.stub
@@ -0,0 +1,75 @@
+Source: linux-mvl-dove
+Section: devel
+Priority: optional
+Maintainer: Ubuntu Kernel Team <kernel-team@lists.ubuntu.com>
+Standards-Version: 3.8.4.0
+Build-Depends: debhelper (>= 5), cpio, module-init-tools, kernel-wedge (>= 2.24ubuntu1), rsync
+Build-Depends-Indep: xmlto, docbook-utils, ghostscript, transfig, bzip2, sharutils
+Build-Conflicts: findutils (= 4.4.1-1ubuntu1)
+Vcs-Git: http://kernel.ubuntu.com/git-repos/ubuntu/ubuntu-lucid.git
+
+Package: linux-headers-2.6.32-218
+Architecture: armel
+Section: devel
+Priority: optional
+Depends: ${misc:Depends}, coreutils | fileutils (>= 4.0)
+#Provides: linux-headers, linux-headers-2.6
+Description: Header files related to linux-mvl-dove kernel version 2.6.32
+ This package provides kernel header files for version 2.6.32, for sites
+ that want the latest kernel headers. Please read
+ /usr/share/doc/linux-headers-2.6.32-218/debian.README.gz for details
+
+
+Package: linux-image-2.6.32-218-dove
+Architecture: armel
+Section: admin
+Priority: optional
+Pre-Depends: dpkg (>= 1.10.24)
+Depends: ${misc:Depends}, initramfs-tools (>= 0.36ubuntu6), coreutils | fileutils (>= 4.0), module-init-tools (>= 3.3-pre11-4ubuntu3), wireless-crda
+Conflicts: hotplug (<< 0.0.20040105-1)
+Recommends: 
+Suggests: fdutils, linux-mvl-dove-doc-2.6.32 | linux-mvl-dove-source-2.6.32
+Description: Linux kernel image for version 2.6.32 on dove-based systems
+ This package contains the Linux kernel image for version 2.6.32 on
+ dove-based systems.
+ .
+ Also includes the corresponding System.map file, the modules built by the
+ packager, and scripts that try to ensure that the system is not left in an
+ unbootable state after an update.
+ .
+ Supports dove processors.
+ .
+ Marvell, dove, y0 boards
+ .
+ You likely do not want to install this package directly. Instead, install
+ the linux-dove meta-package, which will ensure that upgrades work
+ correctly, and that supporting packages are also installed.
+
+Package: linux-headers-2.6.32-218-dove
+Architecture: armel
+Section: devel
+Priority: optional
+Depends: ${misc:Depends}, coreutils | fileutils (>= 4.0), linux-headers-2.6.32-218, ${shlibs:Depends}
+Description: Linux kernel headers for version 2.6.32 on dove-based systems
+ This package provides kernel header files for version 2.6.32 on
+ dove-based systems.
+ .
+ This is for sites that want the latest kernel headers.  Please read
+ /usr/share/doc/linux-headers-2.6.32-218/debian.README.gz for details.
+
+Package: linux-image-2.6.32-218-dove-dbgsym
+Architecture: armel
+Section: devel
+Priority: optional
+Depends: ${misc:Depends}
+Provides: linux-debug
+Description: Linux kernel debug image for version 2.6.32 on dove-based systems
+ This package provides a kernel debug image for version 2.6.32 on
+ dove-based systems.
+ .
+ This is for sites that wish to debug the kernel.
+ .
+ The kernel image contained in this package is NOT meant to boot from. It
+ is uncompressed, and unstripped. This package also includes the
+ unstripped modules.
+
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/copyright
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/copyright
@@ -0,0 +1,30 @@
+This is the Ubuntu prepackaged version of the Linux kernel.
+Linux was written by Linus Torvalds <Linus.Torvalds@cs.Helsinki.FI>
+and others.
+
+This package was put together by the Ubuntu Kernel Team, from
+sources retrieved from upstream linux git.
+The sources may be found at most Linux ftp sites, including 
+ftp://ftp.kernel.org/pub/linux/kernel/
+
+This package is currently maintained by the
+Ubuntu Kernel Team <ubuntu-kernel@lists.ubuntu.com>
+
+Linux is copyrighted by Linus Torvalds and others.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 dated June, 1991.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+   02111-1307, USA.
+
+On Ubuntu Linux systems, the complete text of the GNU General
+Public License v2 can be found in `/usr/share/common-licenses/GPL-2'.
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/NOTES
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/NOTES
@@ -0,0 +1,4 @@
+eSCO patch removed. Replaced upstream with a disable_esco module parm.
+airprime: Module gone, use option driver instead
+AppArmor: Patch is all there and ported. Ooops when enabled, so default
+	off (still can be enabled apparmor=1)
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/changelog
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/changelog
@@ -0,0 +1,10264 @@
+linux-mvl-dove (2.6.32-218.35) lucid-proposed; urgency=low
+
+  [ Paolo Pisati ]
+
+  * Release Tracking Bug
+    - LP: #829161
+  * Rebased to 2.6.32-34.74
+
+  [ Ubuntu: 2.6.32-34.74 ]
+
+  * Release Tracking Bug
+    - LP: #828375
+  * proc: fix oops on invalid /proc/<pid>/maps access, CVE-2011-1020
+    - LP: #813026
+    - CVE-2011-1020
+
+  [ Ubuntu: 2.6.32-34.73 ]
+
+  * Release Tracking Bug
+    - LP: #824148
+  * SAUCE: rtl8192se: Force a build for a 2.6/3.0 kernel
+    - LP: #805494
+  * [Config] Add enic/fnic to udebs
+    - LP: #801610
+  * tty: icount changeover for other main devices, CVE-2010-4076,
+    CVE-2010-4077
+    - LP: #720189
+    - CVE-2010-4077
+  * fs/partitions/efi.c: corrupted GUID partition tables can cause kernel
+    oops
+    - LP: #795418
+    - CVE-2011-1577
+  * ftrace: Only update the function code on write to filter files
+    - LP: #802383
+  * kmemleak: Do not return a pointer to an object that kmemleak did not
+    get
+    - LP: #802383
+  * CPU hotplug, re-create sysfs directory and symlinks
+    - LP: #802383
+  * Fix memory leak in cpufreq_stat
+    - LP: #802383
+  * powerpc/kexec: Fix memory corruption from unallocated slaves
+    - LP: #802383
+  * powerpc/oprofile: Handle events that raise an exception without
+    overflowing
+    - LP: #802383
+  * mtd: mtdconcat: fix NAND OOB write
+    - LP: #802383
+  * x86, 64-bit: Fix copy_[to/from]_user() checks for the userspace address
+    limit
+    - LP: #802383
+  * ext3: Fix fs corruption when make_indexed_dir() fails
+    - LP: #802383
+  * jbd: Fix forever sleeping process in do_get_write_access()
+    - LP: #802383
+  * jbd: fix fsync() tid wraparound bug
+    - LP: #802383
+  * ext4: release page cache in ext4_mb_load_buddy error path
+    - LP: #802383
+  * Fix Ultrastor asm snippet
+    - LP: #802383
+  * x86, amd: Do not enable ARAT feature on AMD processors below family
+    0x12
+    - LP: #802383
+  * x86, amd: Use _safe() msr access for GartTlbWlk disable code
+    - LP: #802383
+  * rcu: Fix unpaired rcu_irq_enter() from locking selftests
+    - LP: #802383
+  * staging: usbip: fix wrong endian conversion
+    - LP: #802383
+  * Fix for buffer overflow in ldm_frag_add not sufficient
+    - LP: #802383
+  * seqlock: Don't smp_rmb in seqlock reader spin loop
+    - LP: #802383
+  * ALSA: HDA: Use one dmic only for Dell Studio 1558
+    - LP: #731706, #802383
+  * ASoC: Ensure output PGA is enabled for line outputs in wm_hubs
+    - LP: #802383
+  * ASoC: Add some missing volume update bit sets for wm_hubs devices
+    - LP: #802383
+  * mm/page_alloc.c: prevent unending loop in __alloc_pages_slowpath()
+    - LP: #802383
+  * loop: limit 'max_part' module param to DISK_MAX_PARTS
+    - LP: #802383
+  * loop: handle on-demand devices correctly
+    - LP: #802383
+  * USB: CP210x Add 4 Device IDs for AC-Services Devices
+    - LP: #802383
+  * USB: moto_modem: Add USB identifier for the Motorola VE240.
+    - LP: #802383
+  * USB: serial: ftdi_sio: adding support for TavIR STK500
+    - LP: #802383
+  * USB: gamin_gps: Fix for data transfer problems in native mode
+    - LP: #802383
+  * usb/gadget: at91sam9g20 fix end point max packet size
+    - LP: #802383
+  * usb: gadget: rndis: don't test against req->length
+    - LP: #802383
+  * OHCI: fix regression caused by nVidia shutdown workaround
+    - LP: #802383
+  * p54usb: add zoom 4410 usbid
+    - LP: #802383
+  * eCryptfs: Allow 2 scatterlist entries for encrypted filenames
+    - LP: #802383
+  * UBIFS: fix a rare memory leak in ro to rw remounting path
+    - LP: #802383
+  * i8k: Avoid lahf in 64-bit code
+    - LP: #802383
+  * cpuidle: menu: fixed wrapping timers at 4.294 seconds
+    - LP: #802383
+  * dm table: reject devices without request fns
+    - LP: #802383
+  * atm: expose ATM device index in sysfs
+    - LP: #802383
+  * brd: limit 'max_part' module param to DISK_MAX_PARTS
+    - LP: #802383
+  * brd: handle on-demand devices correctly
+    - LP: #802383
+  * SUNRPC: Deal with the lack of a SYN_SENT sk->sk_state_change
+    callback...
+    - LP: #802383
+  * PCI: Add quirk for setting valid class for TI816X Endpoint
+    - LP: #802383
+  * xen mmu: fix a race window causing leave_mm BUG()
+    - LP: #802383
+  * netfilter: nf_conntrack_reasm: properly handle packets fragmented into
+    a single fragment
+    - LP: #802383
+  * fix memory leak in scsi_report_lun_scan
+    - LP: #802383
+  * fix refcounting bug in scsi_get_host_dev
+    - LP: #802383
+  * fix duplicate removal on error path in scsi_sysfs_add_sdev
+    - LP: #802383
+  * UBIFS: fix shrinker object count reports
+    - LP: #802383
+  * UBIFS: fix memory leak on error path
+    - LP: #802383
+  * nbd: limit module parameters to a sane value
+    - LP: #802383
+  * mm: fix ENOSPC returned by handle_mm_fault()
+    - LP: #802383
+  * PCI: Set PCIE maxpayload for card during hotplug insertion
+    - LP: #802383
+  * nl80211: fix check for valid SSID size in scan operations
+    - LP: #802383
+  * lockdep: Fix lock_is_held() on recursion
+    - LP: #802383
+  * drm/i915: Add a no lvds quirk for the Asus EeeBox PC EB1007
+    - LP: #802383
+  * drm/radeon/kms: fix for radeon on systems >4GB without hardware iommu
+    - LP: #802383
+  * fat: Fix corrupt inode flags when remove ATTR_SYS flag
+    - LP: #802383
+  * xen: off by one errors in multicalls.c
+    - LP: #802383
+  * x86/amd-iommu: Fix 3 possible endless loops
+    - LP: #802383
+  * USB: cdc-acm: Adding second ACM channel support for Nokia E7 and C7
+    - LP: #802383
+  * USB: core: Tolerate protocol stall during hub and port status read
+    - LP: #802383
+  * USB: serial: add another 4N-GALAXY.DE PID to ftdi_sio driver
+    - LP: #802383
+  * ALSA: hda: Fix quirk for Dell Inspiron 910
+    - LP: #792712, #802383
+  * oprofile, dcookies: Fix possible circular locking dependency
+    - LP: #802383
+  * CPUFREQ: Remove cpufreq_stats sysfs entries on module unload.
+    - LP: #802383
+  * md: check ->hot_remove_disk when removing disk
+    - LP: #802383
+  * md/raid5: fix raid5_set_bi_hw_segments
+    - LP: #802383
+  * md/raid5: fix FUA request handling in ops_run_io()
+    - LP: #802383
+  * ata: use pci_dev->revision
+    - LP: #802383
+  * pata_cmd64x: fix PIO setup
+    - LP: #802383
+  * pata_cmd64x: cmd648_bmdma_stop() fix
+    - LP: #802383
+  * pata_cmd64x: remove unused definitions
+    - LP: #802383
+  * pata_cm64x: fix boot crash on parisc
+    - LP: #802383
+  * ACPI: use _HID when supplied by root-level devices
+    - LP: #802383
+  * xfs: properly account for reclaimed inodes
+    - LP: #802383
+  * exec: delay address limit change until point of no return
+    - LP: #802383
+  * netfilter: IPv6: initialize TOS field in REJECT target module
+    - LP: #802383
+  * netfilter: IPv6: fix DSCP mangle code
+    - LP: #802383
+  * genirq: Add IRQF_FORCE_RESUME
+    - LP: #802383
+  * xen: Use IRQF_FORCE_RESUME
+    - LP: #802383
+  * time: Compensate for rounding on odd-frequency clocksources
+    - LP: #802383
+  * Linux 2.6.32.42
+    - LP: #802383
+  * taskstats: don't allow duplicate entries in listener mode,
+    CVE-2011-2484
+    - LP: #806390
+    - CVE-2011-2484
+  * drm_mm: extract check_free_mm_node
+    - LP: #599017, #807508
+  * drm: implement helper functions for scanning lru list
+    - LP: #599017, #807508
+  * drm/i915: prepare for fair lru eviction
+    - LP: #599017, #807508
+  * drm/i915: Move the eviction logic to its own file.
+    - LP: #599017, #807508
+  * drm/i915: Implement fair lru eviction across both rings. (v2)
+    - LP: #599017, #807508
+  * drm/i915: Maintain LRU order of inactive objects upon access by CPU
+    (v2)
+    - LP: #599017, #807508
+  * drm/i915/evict: Ensure we completely cleanup on failure
+    - LP: #599017, #807508
+  * drm/i915: Periodically flush the active lists and requests
+    - LP: #599017, #807508
+  * Linux 2.6.32.42+drm33.19
+    - LP: #807508
+  * net: add limit for socket backlog CVE-2010-4251
+    - LP: #807462
+  * tcp: use limited socket backlog CVE-2010-4251
+    - LP: #807462
+  * ipv6: udp: Optimise multicast reception
+    - LP: #807462
+  * ipv4: udp: Optimise multicast reception
+    - LP: #807462
+  * udp: multicast RX should increment SNMP/sk_drops counter in allocation
+    failures CVE-2010-4251
+    - LP: #807462
+  * udp: use limited socket backlog CVE-2010-4251
+    - LP: #807462
+  * llc: use limited socket backlog CVE-2010-4251
+    - LP: #807462
+  * sctp: use limited socket backlog CVE-2010-4251
+    - LP: #807462
+  * tipc: use limited socket backlog CVE-2010-4251
+    - LP: #807462
+  * x25: use limited socket backlog CVE-2010-4251
+    - LP: #807462
+  * net: backlog functions rename CVE-2010-4251
+    - LP: #807462
+  * net: sk_add_backlog() take rmem_alloc into account CVE-2010-4805
+    - LP: #809318
+  * ksm: fix NULL pointer dereference in scan_get_next_rmap_item()
+    - LP: #810425
+  * migrate: don't account swapcache as shmem
+    - LP: #810425
+  * clocksource: Make watchdog robust vs. interruption
+    - LP: #810425
+  * TTY: ldisc, do not close until there are readers
+    - LP: #810425
+  * xhci: Reject double add of active endpoints.
+    - LP: #810425
+  * PM: Free memory bitmaps if opening /dev/snapshot fails
+    - LP: #810425
+  * ath5k: fix memory leak when fewer than N_PD_CURVES are in use
+    - LP: #810425
+  * mm: fix negative commitlimit when gigantic hugepages are allocated
+    - LP: #810425
+  * uvcvideo: Remove buffers from the queues when freeing
+    - LP: #810425
+  * watchdog: mtx1-wdt: request gpio before using it
+    - LP: #810425
+  * debugobjects: Fix boot crash when kmemleak and debugobjects enabled
+    - LP: #810425
+  * cfq-iosched: fix locking around ioc->ioc_data assignment
+    - LP: #810425
+  * cfq-iosched: fix a rcu warning
+    - LP: #810425
+  * i2c-taos-evm: Fix log messages
+    - LP: #810425
+  * md: avoid endless recovery loop when waiting for fail device to
+    complete.
+    - LP: #810425
+  * SUNRPC: Ensure the RPC client only quits on fatal signals
+    - LP: #810425
+  * 6pack,mkiss: fix lock inconsistency
+    - LP: #810425
+  * USB: don't let errors prevent system sleep
+    - LP: #810425
+  * USB: don't let the hub driver prevent system sleep
+    - LP: #810425
+  * uml: fix CONFIG_STATIC_LINK=y build failure with newer glibc
+    - LP: #810425
+  * um: os-linux/mem.c needs sys/stat.h
+    - LP: #810425
+  * inet_diag: fix inet_diag_bc_audit()
+    - LP: #810425
+  * PM / Hibernate: Avoid hitting OOM during preallocation of memory
+    - LP: #810425
+  * PM / Hibernate: Fix free_unnecessary_pages()
+    - LP: #810425
+  * bug.h: Add WARN_RATELIMIT
+    - LP: #810425
+  * net: filter: Use WARN_RATELIMIT
+    - LP: #810425
+  * af_packet: prevent information leak
+    - LP: #810425
+  * net/ipv4: Check for mistakenly passed in non-IPv4 address
+    - LP: #810425
+  * ipv6/udp: Use the correct variable to determine non-blocking condition
+    - LP: #810425
+  * udp/recvmsg: Clear MSG_TRUNC flag when starting over for a new packet
+    - LP: #810425
+  * mm: prevent concurrent unmap_mapping_range() on the same inode
+    - LP: #810425
+  * xen: set max_pfn_mapped to the last pfn mapped
+    - LP: #810425
+  * xen: partially revert "xen: set max_pfn_mapped to the last pfn mapped"
+    - LP: #810425
+  * Linux 2.6.32.43
+    - LP: #810425
+  * eCryptfs: Handle failed metadata read in lookup
+    - LP: #509180
+  * pagemap: close races with suid execve, CVE-2011-1020
+    - LP: #813026
+    - CVE-2011-1020
+  * report errors in /proc/*/*map* sanely, CVE-2011-1020
+    - LP: #813026
+    - CVE-2011-1020
+  * close race in /proc/*/environ, CVE-2011-1020
+    - LP: #813026
+    - CVE-2011-1020
+  * auxv: require the target to be tracable (or yourself), CVE-2011-1020
+    - LP: #813026
+    - CVE-2011-1020
+  * deal with races in /proc/*/{syscall, stack, personality}, CVE-2011-1020
+    - LP: #813026
+    - CVE-2011-1020
+  * rose_loopback_timer sets VC number <= ROSE_DEFAULT_MAXVC, CVE-2011-1493
+    - LP: #816550
+    - CVE-2011-1493
+  * rose: Add length checks to CALL_REQUEST parsing, CVE-2011-1493
+    - LP: #816550
+    - CVE-2011-1493
+  * Bluetooth: l2cap and rfcomm: fix 1 byte infoleak to userspace.
+    - LP: #819569
+    - CVE-2011-2492
+  * drm/nv50-nvc0: work around an evo channel hang that some people see
+    - LP: #583760
+  * ASoC: Fix Blackfin I2S _pointer() implementation return in bounds
+    values
+    - LP: #823296
+  * v4l2-ioctl.c: prefill tuner type for g_frequency and g/s_tuner
+    - LP: #823296
+  * pvrusb2: fix g/s_tuner support
+    - LP: #823296
+  * bttv: fix s_tuner for radio
+    - LP: #823296
+  * gro: Only reset frag0 when skb can be pulled
+    - LP: #823296
+  * NFSv4.1: update nfs4_fattr_bitmap_maxsz
+    - LP: #823296
+  * SUNRPC: Fix a race between work-queue and rpc_killall_tasks
+    - LP: #823296
+  * SUNRPC: Fix use of static variable in rpcb_getport_async
+    - LP: #823296
+  * si4713-i2c: avoid potential buffer overflow on si4713
+    - LP: #823296
+  * hwmon: (max1111) Fix race condition causing NULL pointer exception
+    - LP: #823296
+  * bridge: send proper message_age in config BPDU
+    - LP: #823296
+  * davinci: DM365 EVM: fix video input mux bits
+    - LP: #823296
+  * libata: fix unexpectedly frozen port after ata_eh_reset()
+    - LP: #823296
+  * x86: Make Dell Latitude E5420 use reboot=pci
+    - LP: #823296
+  * USB: pl2303: add AdLink ND-6530 USB IDs
+    - LP: #823296
+  * USB: pl2303.h: checkpatch cleanups
+    - LP: #823296
+  * USB: serial: add IDs for WinChipHead USB->RS232 adapter
+    - LP: #823296
+  * staging: comedi: fix infoleak to userspace
+    - LP: #823296
+  * USB: OHCI: fix another regression for NVIDIA controllers
+    - LP: #823296
+  * usb: musb: restore INDEX register in resume path
+    - LP: #823296
+  * USB: dummy-hcd needs the has_tt flag
+    - LP: #823296
+  * ARM: pxa/cm-x300: fix V3020 RTC functionality
+    - LP: #823296
+  * jme: Fix unmap error (Causing system freeze)
+    - LP: #823296
+  * libsas: remove expander from dev list on error
+    - LP: #823296
+  * mac80211: Restart STA timers only on associated state
+    - LP: #823296
+  * Blacklist Traxdata CDR4120 and IOMEGA Zip drive to avoid lock ups.
+    - LP: #823296
+  * ses: requesting a fault indication
+    - LP: #823296
+  * pmcraid: reject negative request size
+    - LP: #823296
+  * kexec, x86: Fix incorrect jump back address if not preserving context
+    - LP: #823296
+  * powerpc/kdump: Fix timeout in crash_kexec_wait_realmode
+    - LP: #823296
+  * PCI: ARI is a PCIe v2 feature
+    - LP: #823296
+  * cciss: do not attempt to read from a write-only register
+    - LP: #823296
+  * xtensa: prevent arbitrary read in ptrace
+    - LP: #823296
+  * ext3: Fix oops in ext3_try_to_allocate_with_rsv()
+    - LP: #823296
+  * svcrpc: fix list-corrupting race on nfsd shutdown
+    - LP: #823296
+  * EHCI: only power off port if over-current is active
+    - LP: #823296
+  * EHCI: fix direction handling for interrupt data toggles
+    - LP: #823296
+  * powerpc/pseries/hvconsole: Fix dropped console output
+    - LP: #823296
+  * x86: Hpet: Avoid the comparator readback penalty
+    - LP: #823296
+  * x86: HPET: Chose a paranoid safe value for the ETIME check
+    - LP: #823296
+  * cifs: clean up cifs_find_smb_ses (try #2)
+    - LP: #823296
+  * cifs: fix NULL pointer dereference in cifs_find_smb_ses
+    - LP: #823296
+  * cifs: check for NULL session password
+    - LP: #823296
+  * gre: fix netns vs proto registration ordering
+    - LP: #823296
+  * netns xfrm: fixup xfrm6_tunnel error propagation
+    - LP: #823296
+  * tunnels: fix netns vs proto registration ordering
+    - LP: #823296
+  * alpha: fix several security issues
+    - LP: #823296
+  * proc: restrict access to /proc/PID/io
+    - LP: #823296
+  * ALSA: sound/core/pcm_compat.c: adjust array index
+    - LP: #823296
+  * dm mpath: fix potential NULL pointer in feature arg processing
+    - LP: #823296
+  * dm: fix idr leak on module removal
+    - LP: #823296
+  * perf: overflow/perf_count_sw_cpu_clock crashes recent kernels
+    - LP: #823296
+  * atm: [br2684] allow routed mode operation again
+    - LP: #823296
+  * Linux 2.6.32.44
+    - LP: #823296
+
+  [ Ubuntu: 2.6.32-33.72 ]
+
+  * Release Tracking Bug
+    - LP: #818196
+  * Revert "fix oops in scsi_run_queue()"
+    - LP: #811745
+  * Revert "put stricter guards on queue dead checks"
+    - LP: #811745
+
+  [ Ubuntu: 2.6.32-33.71 ]
+
+  * Release Tracking Bug
+    - LP: #813507
+  * splice: direct_splice_actor() should not use pos in sd
+    - LP: #588861
+
+  [ Ubuntu: 2.6.32-33.70 ]
+
+  * Release Tracking Bug
+    - LP: #807175
+  * Revert "x86: Flush TLB if PGD entry is changed in i386 PAE mode"
+    - LP: #805209
+
+  [ Ubuntu: 2.6.32-33.69 ]
+
+  * Release Tracking Bug
+    - LP: #802554
+  * Revert "af_unix: Only allow recv on connected seqpacket sockets."
+
+  [ Ubuntu: 2.6.32-33.68 ]
+
+  * Release Tracking Bug
+    - LP: #798305
+  * Fix abi directory
+
+  [ Ubuntu: 2.6.32-33.67 ]
+
+  * Revert "iwlagn: Support new 5000 microcode."
+
+ -- Paolo Pisati <paolo.pisati@canonical.com>  Fri, 19 Aug 2011 17:58:25 +0200
+
+linux-mvl-dove (2.6.32-217.34) lucid-proposed; urgency=low
+
+  [ Herton R. Krzesinski ]
+
+  * Release Tracking Bug
+    - LP: #794695
+
+  [ Paolo Pisati ]
+
+  * Rebased to 2.6.32-33.66
+
+  [ Ubuntu: 2.6.32-33.66 ]
+
+  * Release Tracking Bug
+    - LP: #794098
+  * Revert "xhci: Fix full speed bInterval encoding."
+  * Revert "USB: xhci - fix math in xhci_get_endpoint_interval()"
+  * Revert "USB: xhci - fix unsafe macro definitions"
+
+  [ Ubuntu: 2.6.32-33.65 ]
+
+  * xhci: Fix full speed bInterval encoding.
+    - LP: #792959
+
+  [ Ubuntu: 2.6.32-33.64 ]
+
+   * Release Tracking Bug
+     - LP: #789325
+  * SAUCE: (no-up) Fix up KVM: VMX: Fix host userspace gsbase corruption
+    - LP: #787675
+  * SAUCE: vesafb: mtrr module parameter is uint, not bool
+    - LP: #778043
+  * Revert "(pre-stable): input: Support Clickpad devices in ClickZone
+    mode"
+    - LP: #780588
+  * Revert "GFS2: Fix writing to non-page aligned gfs2_quota structures"
+    - LP: #780588
+  * Revert "mmc: build fix: mmc_pm_notify is only available with
+    CONFIG_PM=y"
+    - LP: #780588
+  * Revert "mmc: fix all hangs related to mmc/sd card insert/removal during
+    suspend/resume"
+    - LP: #780588
+  * Revert "econet: fix CVE-2010-3848"
+    - LP: #780588
+  * Revert "dell-laptop: Add another Dell laptop family to the DMI
+    whitelist"
+    - LP: #780588
+  * Revert "dell-laptop: Add another Dell laptop family to the DMI
+    whitelist"
+    - LP: #780588
+  * Revert "xen: set max_pfn_mapped to the last pfn mapped"
+  * cifs: always do is_path_accessible check in cifs_mount
+    - LP: #770050
+  * video: sn9c102: world-wirtable sysfs files
+    - LP: #770050
+  * UBIFS: restrict world-writable debugfs files
+    - LP: #770050
+  * NET: cdc-phonet, handle empty phonet header
+    - LP: #770050
+  * x86: Fix a bogus unwind annotation in lib/semaphore_32.S
+    - LP: #770050
+  * tioca: Fix assignment from incompatible pointer warnings
+    - LP: #770050
+  * mca.c: Fix cast from integer to pointer warning
+    - LP: #770050
+  * ramfs: fix memleak on no-mmu arch
+    - LP: #770050
+  * MAINTAINERS: update STABLE BRANCH info
+    - LP: #770050
+  * UBIFS: fix oops when R/O file-system is fsync'ed
+    - LP: #770050
+  * x86, cpu: AMD errata checking framework
+    - LP: #770050
+  * x86, cpu: Clean up AMD erratum 400 workaround
+    - LP: #770050
+  * x86, AMD: Set ARAT feature on AMD processors
+    - LP: #770050
+  * x86, amd: Disable GartTlbWlkErr when BIOS forgets it
+    - LP: #770050
+  * USB: ftdi_sio: Added IDs for CTI USB Serial Devices
+    - LP: #770050
+  * USB: ftdi_sio: add PID for OCT DK201 docking station
+    - LP: #770050
+  * USB: ftdi_sio: add ids for Hameg HO720 and HO730
+    - LP: #770050
+  * USB: option: Add new ONDA vendor id and product id for ONDA MT825UP
+    - LP: #770050
+  * USB: option: Added support for Samsung GT-B3730/GT-B3710 LTE USB modem.
+    - LP: #770050
+  * next_pidmap: fix overflow condition
+    - LP: #770050
+  * proc: do proper range check on readdir offset
+    - LP: #770050
+  * USB: EHCI: unlink unused QHs when the controller is stopped
+    - LP: #770050
+  * USB: fix formatting of SuperSpeed endpoints in /proc/bus/usb/devices
+    - LP: #770050
+  * USB: xhci - fix unsafe macro definitions
+    - LP: #770050
+  * USB: xhci - fix math in xhci_get_endpoint_interval()
+    - LP: #770050
+  * x86, cpu: Fix regression in AMD errata checking code
+    - LP: #770050
+  * Linux 2.6.32.39
+    - LP: #770050
+  * fs/partitions/ldm.c: fix oops caused by corrupted partition table,
+    CVE-2011-1017
+    - LP: #771382
+    - CVE-2011-1017
+  * drm/i915: set DIDL using the ACPI video output device _ADR method
+    return.
+    - LP: #775547
+  * drm/radeon/kms: MC vram map needs to be >= pci aperture size
+    - LP: #775547
+  * drm/radeon/kms: make sure blit addr masks are 64 bit
+    - LP: #775547
+  * drm/radeon/kms: fix handling of tex lookup disable in cs checker on
+    r2xx
+    - LP: #775547
+  * drm/i915: Free hardware status page on unload when physically mapped
+    - LP: #775547
+  * drm/i915/overlay: Ensure that the reg_bo is in the GTT prior to
+    writing.
+    - LP: #775547
+  * drm/radeon/kms/atom: set sane defaults in atombios_get_encoder_mode()
+    - LP: #775547
+  * drm/radeon/kms: fix typos in disabled vbios code
+    - LP: #775547
+  * drm/radeon/kms: add workaround for dce3 ddc line vbios bug
+    - LP: #775547
+  * drm/radeon/kms: fix interlaced and doublescan handling
+    - LP: #775547
+  * drm/i915/sdvo: Always add a 30ms delay to make SDVO TV detection
+    reliable
+    - LP: #775547
+  * drm/radeon/kms: don't apply 7xx HDP flush workaround on AGP
+    - LP: #775547
+  * drm/ttm: Fix two race conditions + fix busy codepaths
+    - LP: #775547
+  * drm/i915: overlay on gen2 can't address above 1G
+    - LP: #775547
+  * drm/i915: fix memory corruption with GM965 and >4GB RAM
+    - LP: #775547
+  * drm/radeon: add quirk to make HP nx6125 laptop resume.
+    - LP: #775547
+  * drm/radeon/kms: add quirk to make HP DV5000 laptop resume
+    - LP: #775547
+  * ath: add missing regdomain pair 0x5c mapping
+    - LP: #780588
+  * block, blk-sysfs: Fix an err return path in blk_register_queue()
+    - LP: #780588
+  * p54: Initialize extra_len in p54_tx_80211
+    - LP: #780588
+  * intel-iommu: Unlink domain from iommu
+    - LP: #780588
+  * intel-iommu: Fix get_domain_for_dev() error path
+    - LP: #780588
+  * NFS: nfs_wcc_update_inode() should set nfsi->attr_gencount
+    - LP: #780588
+  * serial/imx: read cts state only after acking cts change irq
+    - LP: #780588
+  * ASoC: Fix output PGA enabling in wm_hubs CODECs
+    - LP: #780588
+  * kconfig: Avoid buffer underrun in choice input
+    - LP: #780588
+  * UBIFS: fix master node recovery
+    - LP: #780588
+  * Remove extra struct page member from the buffer info structure
+    - LP: #780588
+  * dasd: correct device table
+    - LP: #780588
+  * iwlagn: Support new 5000 microcode.
+    - LP: #780588
+  * atl1c: duplicate atl1c_get_tpd
+    - LP: #780588
+  * udp: Fix bogus UFO packet generation
+    - LP: #780588
+  * slub: fix panic with DISCONTIGMEM
+    - LP: #780588
+  * set memory ranges in N_NORMAL_MEMORY when onlined
+    - LP: #780588
+  * FLEXCOP-PCI: fix __xlate_proc_name-warning for flexcop-pci
+    - LP: #780588
+  * m68k/mm: Set all online nodes in N_NORMAL_MEMORY
+    - LP: #780588
+  * nfs: don't lose MS_SYNCHRONOUS on remount of noac mount
+    - LP: #780588
+  * NFSv4.1: Ensure state manager thread dies on last umount
+    - LP: #780588
+  * agp: fix arbitrary kernel memory writes
+    - LP: #780588
+  * agp: fix OOM and buffer overflow
+    - LP: #780588
+  * Input: xen-kbdfront - fix mouse getting stuck after save/restore
+    - LP: #780588
+  * pmcraid: reject negative request size
+    - LP: #780588
+  * mpt2sas: prevent heap overflows and unchecked reads
+    - LP: #780588
+  * put stricter guards on queue dead checks
+    - LP: #780588
+  * mmc: sdhci-pci: Fix error case in sdhci_pci_probe_slot()
+    - LP: #780588
+  * mmc: sdhci: Check mrq->cmd in sdhci_tasklet_finish
+    - LP: #780588
+  * mmc: sdhci: Check mrq != NULL in sdhci_tasklet_finish
+    - LP: #780588
+  * USB: fix regression in usbip by setting has_tt flag
+    - LP: #780588
+  * af_unix: Only allow recv on connected seqpacket sockets.
+    - LP: #780588
+  * ARM: 6891/1: prevent heap corruption in OABI semtimedop
+    - LP: #780588
+  * i8k: Tell gcc that *regs gets clobbered
+    - LP: #780588
+  * Fix gcc 4.5.1 miscompiling drivers/char/i8k.c (again)
+    - LP: #780588
+  * Open with O_CREAT flag set fails to open existing files on non writable
+    directories
+    - LP: #780588
+  * can: Add missing socket check in can/bcm release.
+    - LP: #780588
+  * netxen: module firmware hints
+    - LP: #780588
+  * bnx2x: declare MODULE_FIRMWARE
+    - LP: #780588
+  * cxgb3: declare MODULE_FIRMWARE
+    - LP: #780588
+  * myri10ge: declare MODULE_FIRMWARE
+    - LP: #780588
+  * netx: declare MODULE_FIRMWARE
+    - LP: #780588
+  * pcnet-cs: declare MODULE_FIRMWARE
+    - LP: #780588
+  * spider-net: declare MODULE_FIRMWARE
+    - LP: #780588
+  * tms380tr: declare MODULE_FIRMWARE
+    - LP: #780588
+  * Input: Add support of Synaptics Clickpad device
+    - LP: #780588
+  * Input: elantech - do not advertise relative events
+    - LP: #780588
+  * Input: elantech - fix firmware version check
+    - LP: #780588
+  * Input: elantech - allow forcing Elantech protocol
+    - LP: #780588
+  * Input: elantech - ignore high bits in the position coordinates
+    - LP: #780588
+  * Input: elantech - use all 3 bytes when checking version
+    - LP: #780588
+  * Input: elantech - relax signature checks
+    - LP: #780588
+  * Input: elantech - discard the first 2 positions on some firmwares
+    - LP: #780588
+  * Staging: rtl8192su: check for skb == NULL
+    - LP: #780588
+  * Staging: rtl8192su: Clean up in case of an error in module
+    initialisation
+    - LP: #780588
+  * Staging: rtl8192su: Fix procfs code for interfaces not named wlan0
+    - LP: #780588
+  * Staging: rtl8192su: remove device ids
+    - LP: #780588
+  * Staging: rtl8192su: add device ids
+    - LP: #780588
+  * USB: retain USB device power/wakeup setting across reconfiguration
+    - LP: #780588
+  * USB: don't enable remote wakeup by default
+    - LP: #780588
+  * USB: teach "devices" file about Wireless and SuperSpeed USB
+    - LP: #780588
+  * GFS2: Clean up gfs2_adjust_quota() and do_glock()
+    - LP: #780588
+  * GFS2: Fix writing to non-page aligned gfs2_quota structures
+    - LP: #780588
+  * GFS2: BUG in gfs2_adjust_quota
+    - LP: #780588
+  * SUNRPC: fix NFS client over TCP hangs due to packet loss (Bug 16494)
+    - LP: #780588
+  * nfs4: Ensure that ACL pages sent over NFS were not allocated from the
+    slab (v3)
+    - LP: #780588
+  * nfs: fix compilation warning
+    - LP: #780588
+  * Fix corrupted OSF partition table parsing
+    - LP: #780588
+  * Increase OSF partition limit from 8 to 18
+    - LP: #780588
+  * Please add support for Microsoft MN-120 PCMCIA network card
+    - LP: #780588
+  * hwmon: (applesmc) Add iMac9,1 and MacBookPro2,2 support
+    - LP: #780588
+  * hwmon: (applesmc) Add support for MacBook Pro 5,3 and 5,4
+    - LP: #780588
+  * hwmon: (applesmc) Add generic support for MacBook Pro 6
+    - LP: #780588
+  * hwmon: (applesmc) Add generic support for MacBook Pro 7
+    - LP: #780588
+  * hwmon: (applesmc) Add MacBookAir3,1(3,2) support
+    - LP: #780588
+  * ALSA: emux: Add trivial compat ioctl handler
+    - LP: #780588
+  * ALSA: powermac - Reverse HP detection on G4 DA
+    - LP: #780588
+  * ALSA: powermac - Lineout detection on G4 DA
+    - LP: #780588
+  * ALSA: hda - Add support for the new 27 inch IMacs
+    - LP: #780588
+  * ALSA: hda - MacBookPro 5,3 line-in support
+    - LP: #780588
+  * ALSA: hda - Add model=mbp55 entry for MacBookPro 7,1
+    - LP: #780588
+  * ALSA: hda - MacBookAir3,1(3,2) alsa support
+    - LP: #780588
+  * virtio_net: fix oom handling on tx
+    - LP: #780588
+  * mac80211: Add define for TX headroom reserved by mac80211 itself.
+    - LP: #780588
+  * rt2x00: Centralize setting of extra TX headroom requested by rt2x00.
+    - LP: #780588
+  * rt2x00: Properly request tx headroom for alignment operations.
+    - LP: #780588
+  * rt2x00: use correct headroom for transmission
+    - LP: #780588
+  * Bluetooth: Add support Bluetooth controller of MacbookPro 6,2
+    - LP: #780588
+  * Bluetooth: Add support Bluetooth controller of MacbookPro 7,1
+    - LP: #780588
+  * Bluetooth: Add MacBookAir3,1(2) support
+    - LP: #780588
+  * perf tools: Display better error messages on missing packages
+    - LP: #780588
+  * perf tools: Add 'make DEBUG=1' to remove the -O6 cflag
+    - LP: #780588
+  * perf tools: Test -fstack-protector-all compiler option for inclusion in
+    CFLAGS
+    - LP: #780588
+  * perf tools: Support static build
+    - LP: #780588
+  * perf tools: Add V=2 option to help debug config issues
+    - LP: #780588
+  * perf tools: Suggest static libraries as well
+    - LP: #780588
+  * perf: Use default compiler mode by default
+    - LP: #780588
+  * perf tools: Move QUIET_STDERR def to before first use
+    - LP: #780588
+  * perf tools: Check if /dev/null can be used as the -o gcc argument
+    - LP: #780588
+  * perf symbols: allow forcing use of cplus_demangle
+    - LP: #780588
+  * V4L/DVB: Add Elgato EyeTV Diversity to dibcom driver
+    - LP: #780588
+  * mmc: fix all hangs related to mmc/sd card insert/removal during
+    suspend/resume
+    - LP: #780588
+  * mmc: build fix: mmc_pm_notify is only available with CONFIG_PM=y
+    - LP: #780588
+  * b43: Fix warning at drivers/mmc/core/core.c:237 in mmc_wait_for_cmd
+    - LP: #780588
+  * econet: Fix redeclaration of symbol len
+    - LP: #780588
+  * econet: fix CVE-2010-3848
+    - LP: #780588
+  * dell-laptop: Add another Dell laptop to the DMI whitelist
+    - LP: #780588
+  * dell-laptop: Add another Dell laptop family to the DMI whitelist
+    - LP: #780588
+  * scsi_dh_emc: fix mode select request setup
+    - LP: #780588
+  * scsi_dh_emc: request flag cleanup
+    - LP: #780588
+  * cifs: fix another memleak, in cifs_root_iget
+    - LP: #780588
+  * e1000e: Reset 82577/82578 PHY before first PHY register read
+    - LP: #780588
+  * e1000: fix Tx hangs by disabling 64-bit DMA
+    - LP: #780588
+  * btrfs: Require CAP_SYS_ADMIN for filesystem rebalance
+    - LP: #780588
+  * af_unix: limit recursion level
+    - LP: #780588
+  * init, sched: Fix race between init and kthreadd
+    - LP: #780588
+  * backlight: MacBookAir3,1(3,2) mbp-nvidia-bl support
+    - LP: #780588
+  * bonding: Ensure that we unshare skbs prior to calling pskb_may_pull
+    - LP: #780588
+  * HID: add MacBookAir 3,1 and 3,2 support
+    - LP: #780588
+  * intel-iommu: Force-disable IOMMU for iGFX on broken Cantiga revisions.
+    - LP: #780588
+  * ipg: Remove device claimed by dl2k from pci id table
+    - LP: #780588
+  * ipv6: Silence privacy extensions initialization
+    - LP: #780588
+  * l2tp: Fix UDP socket reference count bugs in the pppol2tp driver
+    - LP: #780588
+  * MIPS: DMA: Fix computation of DMA flags from device's
+    coherent_dma_mask.
+    - LP: #780588
+  * mpt2sas: fix the incorrect scsi_dma_map error checking
+    - LP: #780588
+  * Phonet: device notifier only runs on initial namespace
+    - LP: #780588
+  * powerpc/boot/dts: Install dts from the right directory
+    - LP: #780588
+  * rt2500usb: fallback to SW encryption for TKIP+AES
+    - LP: #780588
+  * sata_via: Delay on vt6420 when starting ATAPI DMA write
+    - LP: #780588
+  * tehuti: Firmware filename is tehuti/bdx.bin
+    - LP: #780588
+  * wireless: b43: fix error path in SDIO
+    - LP: #780588
+  * libata: set queue DMA alignment to sector size for ATAPI too
+    - LP: #780588
+  * usb: musb: core: set has_tt flag
+    - LP: #780588
+  * iwlwifi: fix skb usage after free
+    - LP: #780588
+  * can: add missing socket check in can/raw release
+    - LP: #780588
+  * fix oops in scsi_run_queue()
+    - LP: #780588
+  * Linux 2.6.32.40
+    - LP: #780588
+  * PCI: allow matching of prefetchable resources to non-prefetchable
+    windows
+    - LP: #424142
+  * cifs: check for bytes_remaining going to zero in CIFS_SessSetup
+    - LP: #788602
+  * Validate size of EFI GUID partition entries.
+    - LP: #788602
+  * dccp: handle invalid feature options length
+    - LP: #788602
+  * CIFS: Fix memory over bound bug in cifs_parse_mount_options
+    - LP: #788602
+  * Fix time() inconsistencies caused by intermediate xtime_cache values
+    being read
+    - LP: #788602
+  * ehea: fix wrongly reported speed and port
+    - LP: #788602
+  * NET: slip, fix ldisc->open retval
+    - LP: #788602
+  * ne-h8300: Fix regression caused during net_device_ops conversion
+    - LP: #788602
+  * hydra: Fix regression caused during net_device_ops conversion
+    - LP: #788602
+  * libertas: fix cmdpendingq locking
+    - LP: #788602
+  * zorro8390: Fix regression caused during net_device_ops conversion
+    - LP: #788602
+  * cifs: add fallback in is_path_accessible for old servers
+    - LP: #788602
+  * x86, AMD: Fix ARAT feature setting again
+    - LP: #788602
+  * clocksource: Install completely before selecting
+    - LP: #788602
+  * tick: Clear broadcast active bit when switching to oneshot
+    - LP: #788602
+  * x86, apic: Fix spurious error interrupts triggering on all non-boot APs
+    - LP: #788602
+  * x86, mce, AMD: Fix leaving freed data in a list
+    - LP: #788602
+  * megaraid_sas: Sanity check user supplied length before passing it to
+    dma_alloc_coherent()
+    - LP: #788602
+  * vmxnet3: Fix inconsistent LRO state after initialization
+    - LP: #788602
+  * netxen: Remove references to unified firmware file
+    - LP: #788602
+  * Linux 2.6.32.41
+    - LP: #788602
+  * drm/radeon/kms: fix bad shift in atom iio table parser
+    - LP: #788602
+  * Linux 2.6.32.41+drm33.18
+    - LP: #788602
+
+  [ Ubuntu: 2.6.32-32.62 ]
+
+  * Release Tracking Bug
+    - LP: #767370
+  * (config) Disable CONFIG_NET_NS
+    - LP: #720095
+  * Revert "drm/radeon/kms: Fix retrying ttm_bo_init() after it failed
+    once."
+    - LP: #736234
+  * Revert "drm/radeon: fall back to GTT if bo creation/validation in VRAM
+    fails."
+    - LP: #736234
+  * x86: pvclock: Move scale_delta into common header
+  * KVM: x86: Fix a possible backwards warp of kvmclock
+  * KVM: x86: Fix kvmclock bug
+  * cpuset: add a missing unlock in cpuset_write_resmask()
+    - LP: #736234
+  * keyboard: integer underflow bug
+    - LP: #736234
+  * RxRPC: Fix v1 keys
+    - LP: #736234
+  * ixgbe: fix for 82599 erratum on Header Splitting
+    - LP: #736234
+  * mm: fix possible cause of a page_mapped BUG
+    - LP: #736234
+  * powerpc/kdump: CPUs assume the context of the oopsing CPU
+    - LP: #736234
+  * powerpc/kdump: Use chip->shutdown to disable IRQs
+    - LP: #736234
+  * powerpc: Use more accurate limit for first segment memory allocations
+    - LP: #736234
+  * powerpc/pseries: Add hcall to read 4 ptes at a time in real mode
+    - LP: #736234
+  * powerpc/kexec: Speedup kexec hash PTE tear down
+    - LP: #736234
+  * powerpc/crashdump: Do not fail on NULL pointer dereferencing
+    - LP: #736234
+  * powerpc/kexec: Fix orphaned offline CPUs across kexec
+    - LP: #736234
+  * netfilter: nf_log: avoid oops in (un)bind with invalid nfproto values
+    - LP: #736234
+  * nfsd: wrong index used in inner loop
+    - LP: #736234
+  * r8169: use RxFIFO overflow workaround for 8168c chipset.
+    - LP: #736234
+  * Staging: comedi: jr3_pci: Don't ioremap too much space. Check result.
+    - LP: #736234
+  * net: don't allow CAP_NET_ADMIN to load non-netdev kernel modules,
+    CVE-2011-1019
+    - LP: #736234
+    - CVE-2011-1019
+  * ip6ip6: autoload ip6 tunnel
+    - LP: #736234
+  * Linux 2.6.32.33
+    - LP: #736234
+  * drm/radeon: fall back to GTT if bo creation/validation in VRAM fails.
+    - LP: #652934, #736234
+  * drm/radeon/kms: Fix retrying ttm_bo_init() after it failed once.
+    - LP: #652934, #736234
+  * drm: fix unsigned vs signed comparison issue in modeset ctl ioctl,
+    CVE-2011-1013
+    - LP: #736234
+    - CVE-2011-1013
+  * Linux 2.6.32.33+drm33.15
+    - LP: #736234
+  * econet: Fix crash in aun_incoming(). CVE-2010-4342
+    - LP: #736394
+    - CVE-2010-4342
+  * igb: only use vlan_gro_receive if vlans are registered, CVE-2010-4263
+    - LP: #737024
+    - CVE-2010-4263
+  * irda: prevent integer underflow in IRLMP_ENUMDEVICES, CVE-2010-4529
+    - LP: #737823
+    - CVE-2010-4529
+  * hwmon/f71882fg: Set platform drvdata to NULL later
+    - LP: #742056
+  * mtd: add "platform:" prefix for platform modalias
+    - LP: #742056
+  * libata: no special completion processing for EH commands
+    - LP: #742056
+  * MIPS: MTX-1: Make au1000_eth probe all PHY addresses
+    - LP: #742056
+  * x86/mm: Handle mm_fault_error() in kernel space
+    - LP: #742056
+  * ftrace: Fix memory leak with function graph and cpu hotplug
+    - LP: #742056
+  * x86: Fix panic when handling "mem={invalid}" param
+    - LP: #553464, #742056
+  * x86: Emit "mem=nopentium ignored" warning when not supported
+    - LP: #553464, #742056
+  * ahci: AHCI and RAID mode SATA patch for Intel Patsburg DeviceIDs
+    - LP: #742056
+  * ahci: AHCI mode SATA patch for Intel DH89xxCC DeviceIDs
+    - LP: #742056
+  * ahci: AHCI mode SATA patch for Intel Patsburg SATA RAID controller
+    - LP: #742056
+  * RDMA/cma: Fix crash in request handlers
+    - LP: #742056
+  * IB/cm: Bump reference count on cm_id before invoking callback
+    - LP: #742056
+  * ath9k_hw: Fix incorrect macversion and macrev checks
+    - LP: #742056
+  * USB: serial/kobil_sct, fix potential tty NULL dereference
+    - LP: #742056
+  * USB: serial: ch341: add new id
+    - LP: #742056
+  * xhci: Fix cycle bit calculation during stall handling.
+    - LP: #742056
+  * ALSA: hda - fix digital mic selection in mixer on 92HD8X codecs
+    - LP: #742056
+  * PCI: remove quirk for pre-production systems
+    - LP: #742056
+  * PCI: add more checking to ICH region quirks
+    - LP: #742056
+  * PCI: do not create quirk I/O regions below PCIBIOS_MIN_IO for ICH
+    - LP: #742056
+  * PCI: sysfs: Fix failure path for addition of "vpd" attribute
+    - LP: #742056
+  * ALSA: ctxfi - Fix incorrect SPDIF status bit mask
+    - LP: #742056
+  * ALSA: ctxfi - Fix SPDIF status retrieval
+    - LP: #742056
+  * ALSA: ctxfi - Clear input settings before initialization
+    - LP: #742056
+  * SUNRPC: Ensure we always run the tk_callback before tk_action
+    - LP: #742056
+  * perf, powerpc: Handle events that raise an exception without
+    overflowing
+    - LP: #742056
+  * ext3: Always set dx_node's fake_dirent explicitly.
+    - LP: #742056
+  * call_function_many: fix list delete vs add race
+    - LP: #742056
+  * call_function_many: add missing ordering
+    - LP: #742056
+  * x86: Flush TLB if PGD entry is changed in i386 PAE mode
+    - LP: #742056
+  * isdn: avoid calling tty_ldisc_flush() in atomic context
+    - LP: #742056
+  * smp_call_function_many: handle concurrent clearing of mask
+    - LP: #742056
+  * fix per-cpu flag problem in the cpu affinity checkers
+    - LP: #742056
+  * i2c: Fix typo in instantiating-devices document
+    - LP: #742056
+  * mmc: sdio: remember new card RCA when redetecting card
+    - LP: #742056
+  * powerpc/kexec: Fix race in kexec shutdown
+    - LP: #742056
+  * powerpc/kdump: Fix race in kdump shutdown
+    - LP: #742056
+  * powerpc: rtas_flash needs to use rtas_data_buf
+    - LP: #742056
+  * x86, binutils, xen: Fix another wrong size directive
+    - LP: #742056
+  * hwmon: (sht15) Fix integer overflow in humidity calculation
+    - LP: #742056
+  * Linux 2.6.32.34
+    - LP: #742056
+  * Linux 2.6.32.35
+    - LP: #742056
+  * aio: wake all waiters when destroying ctx
+    - LP: #744921
+  * shmem: let shared anonymous be nonlinear again
+    - LP: #744921
+  * PCI hotplug: acpiphp: set current_state to D0 in register_slot
+    - LP: #744921
+  * xen: set max_pfn_mapped to the last pfn mapped
+    - LP: #744921
+  * PCI: return correct value when writing to the "reset" attribute
+    - LP: #744921
+  * Prevent rt_sigqueueinfo and rt_tgsigqueueinfo from spoofing the signal
+    code
+    - LP: #744921
+  * ext3: skip orphan cleanup on rocompat fs
+    - LP: #744921
+  * procfs: fix /proc/<pid>/maps heap check
+    - LP: #744921
+  * proc: protect mm start_code/end_code in /proc/pid/stat, CVE-2011-0726
+    - LP: #744921
+    - CVE-2011-0726
+  * fbcon: Bugfix soft cursor detection in Tile Blitting
+    - LP: #744921
+  * nfsd41: modify the members value of nfsd4_op_flags
+    - LP: #744921
+  * nfsd: wrong index used in inner loop
+    - LP: #744921
+  * uvcvideo: Fix uvc_fixup_video_ctrl() format search
+    - LP: #744921
+  * ehci-hcd: Bug fix: don't set a QH's Halt bit
+    - LP: #744921
+  * USB: uss720 fixup refcount position
+    - LP: #744921
+  * USB: cdc-acm: fix memory corruption / panic
+    - LP: #744921
+  * USB: cdc-acm: fix potential null-pointer dereference
+    - LP: #744921
+  * USB: cdc-acm: fix potential null-pointer dereference on disconnect
+    - LP: #744921
+  * Input: xen-kbdfront - advertise either absolute or relative coordinates
+    - LP: #744921
+  * SUNRPC: Never reuse the socket port after an xs_close()
+    - LP: #744921
+  * fs: call security_d_instantiate in d_obtain_alias V2
+    - LP: #744921
+  * dcdbas: force SMI to happen when expected
+    - LP: #744921
+  * Linux 2.6.32.36
+    - LP: #744921
+  * drm/radeon/kms: check AA resolve registers on r300, CVE-2011-1016
+    - LP: #745686
+    - CVE-2011-1016
+  * drm/radeon: fix regression with AA resolve checking, CVE-2011-1016
+    - LP: #745686
+    - CVE-2011-1016
+  * xen: events: do not unmask event channels on resume
+    - LP: #681083
+  * drm/radeon/kms: check AA resolve registers on r300
+    - LP: #754584
+  * drm/radeon: fix regression with AA resolve checking
+    - LP: #754584
+  * Linux 2.6.32.36+drm33.16
+    - LP: #754584
+  * ALSA: hda - Fix SPDIF out regression on ALC889
+    - LP: #764685
+  * ALSA: Fix yet another race in disconnection
+    - LP: #764685
+  * perf: Better fit max unprivileged mlock pages for tools needs
+    - LP: #764685
+  * myri10ge: fix rmmod crash
+    - LP: #764685
+  * cciss: fix lost command issue
+    - LP: #764685
+  * sound/oss/opl3: validate voice and channel indexes
+    - LP: #764685
+  * mac80211: initialize sta->last_rx in sta_info_alloc
+    - LP: #764685
+  * ses: show devices for enclosures with no page 7
+    - LP: #764685
+  * ses: Avoid kernel panic when lun 0 is not mapped
+    - LP: #764685
+  * eCryptfs: Unlock page in write_begin error path
+    - LP: #764685
+  * eCryptfs: ecryptfs_keyring_auth_tok_for_sig() bug fix
+    - LP: #764685
+  * staging: usbip: bugfixes related to kthread conversion
+    - LP: #764685
+  * staging: usbip: bugfix add number of packets for isochronous frames
+    - LP: #764685
+  * staging: usbip: bugfix for isochronous packets and optimization
+    - LP: #764685
+  * staging: hv: Fix GARP not sent after Quick Migration
+    - LP: #764685
+  * staging: hv: use sync_bitops when interacting with the hypervisor
+    - LP: #764685
+  * Relax si_code check in rt_sigqueueinfo and rt_tgsigqueueinfo
+    - LP: #764685
+  * xfs: prevent leaking uninitialized stack memory in FSGEOMETRY_V1
+    - LP: #764685
+  * irda: validate peer name and attribute lengths
+    - LP: #764685
+  * irda: prevent heap corruption on invalid nickname
+    - LP: #764685
+  * nilfs2: fix data loss in mmap page write for hole blocks
+    - LP: #764685
+  * ASoC: Explicitly say registerless widgets have no register
+    - LP: #764685
+  * ALSA: ens1371: fix Creative Ectiva support
+    - LP: #764685
+  * ROSE: prevent heap corruption with bad facilities
+    - LP: #764685
+  * Btrfs: Fix uninitialized root flags for subvolumes
+    - LP: #764685
+  * x86, mtrr, pat: Fix one cpu getting out of sync during resume
+    - LP: #764685
+  * ath9k: fix a chip wakeup related crash in ath9k_start
+    - LP: #764685
+  * UBIFS: do not read flash unnecessarily
+    - LP: #764685
+  * UBIFS: fix oops on error path in read_pnode
+    - LP: #764685
+  * UBIFS: fix debugging failure in dbg_check_space_info
+    - LP: #764685
+  * quota: Don't write quota info in dquot_commit()
+    - LP: #764685
+  * mm: avoid wrapping vm_pgoff in mremap()
+    - LP: #764685
+  * p54usb: IDs for two new devices
+    - LP: #764685
+  * b43: allocate receive buffers big enough for max frame len + offset
+    - LP: #764685
+  * Bluetooth: sco: fix information leak to userspace
+    - LP: #764685
+  * bridge: netfilter: fix information leak
+    - LP: #764685
+  * Bluetooth: bnep: fix buffer overflow
+    - LP: #764685
+  * Bluetooth: add support for Apple MacBook Pro 8,2
+    - LP: #764685
+  * Treat writes as new when holes span across page boundaries
+    - LP: #764685
+  * char/tpm: Fix unitialized usage of data buffer
+    - LP: #764685
+  * netfilter: ip_tables: fix infoleak to userspace
+    - LP: #764685
+  * netfilter: arp_tables: fix infoleak to userspace
+    - LP: #764685
+  * netfilter: ipt_CLUSTERIP: fix buffer overflow
+    - LP: #764685
+  * ipv6: netfilter: ip6_tables: fix infoleak to userspace
+    - LP: #764685
+  * mfd: ab3100: world-writable debugfs *_priv files
+    - LP: #764685
+  * drivers/rtc/rtc-ds1511.c: world-writable sysfs nvram file
+    - LP: #764685
+  * drivers/misc/ep93xx_pwm.c: world-writable sysfs files
+    - LP: #764685
+  * econet: 4 byte infoleak to the network
+    - LP: #764685
+  * sound/oss: remove offset from load_patch callbacks
+    - LP: #764685
+  * sound: oss: midi_synth: check get_user() return value
+    - LP: #764685
+  * repair gdbstub to match the gdbserial protocol specification
+    - LP: #764685
+  * gro: Reset dev pointer on reuse
+    - LP: #764685
+  * gro: reset skb_iif on reuse
+    - LP: #764685
+  * x86, amd-ucode: Remove needless log messages
+    - LP: #764685
+  * x86, microcode, AMD: Extend ucode size verification
+    - LP: #764685
+  * powerpc/kexec: Add ifdef CONFIG_PPC_STD_MMU_64 to PPC64 code
+    - LP: #764685
+  * powerpc: Fix default_machine_crash_shutdown #ifdef botch
+    - LP: #764685
+  * Squashfs: handle corruption of directory structure
+    - LP: #764685
+  * sctp: fix to calc the INIT/INIT-ACK chunk length correctly is set
+    - LP: #764685
+  * atm/solos-pci: Don't include frame pseudo-header on transmit hex-dump
+    - LP: #764685
+  * ext4: fix credits computing for indirect mapped files
+    - LP: #764685
+  * nfsd: fix auth_domain reference leak on nlm operations
+    - LP: #764685
+  * CAN: Use inode instead of kernel address for /proc file
+    - LP: #764685
+  * exec: make argv/envp memory visible to oom-killer
+    - LP: #764685
+  * exec: copy-and-paste the fixes into compat_do_execve() paths
+    - LP: #764685
+  * xfs: zero proper structure size for geometry calls
+    - LP: #764685
+  * Linux 2.6.32.37
+    - LP: #764685
+  * Linux 2.6.32.38
+    - LP: #764685
+
+  [ Ubuntu: 2.6.32-31.61 ]
+
+  * Release Tracking Bug
+    - LP: #754842
+  * x86, quirk: Fix SB600 revision check
+    - LP: #742056
+
+ -- Herton Ronaldo Krzesinski <herton.krzesinski@canonical.com>  Wed, 08 Jun 2011 15:37:30 -0300
+
+linux-mvl-dove (2.6.32-216.33) lucid-proposed; urgency=low
+
+
+  [ Ubuntu: 2.6.32-31.60 ]
+
+  * Release Tracking Bug
+    - LP: #734950
+  * SAUCE: Clear new_profile in error path
+    - LP: #732700
+  * [Config] CONFIG_BOOT_PRINTK_DELAY=y
+    - LP: #733191
+  * Revert "drm/radeon/bo: add some fallback placements for VRAM only
+    objects."
+    - LP: #652934
+  * drm/radeon: fall back to GTT if bo creation/validation in VRAM fails.
+    - LP: #652934
+  * drm/radeon/kms: Fix retrying ttm_bo_init() after it failed once.
+    - LP: #652934
+  * xfs: always use iget in bulkstat
+    - LP: #692848
+  * drm/radeon/kms: make the mac rv630 quirk generic
+    - LP: #728687
+  * drm/radeon/kms: add pll debugging output
+    - LP: #728687
+  * drm/radeon: remove 0x4243 pci id
+    - LP: #728687
+  * drm/radeon/kms: fix s/r issues with bios scratch regs
+    - LP: #728687
+  * drm/i915/lvds: Add AOpen i915GMm-HFS to the list of false-positive LVDS
+    - LP: #728687
+  * drm/i915: Add dependency on CONFIG_TMPFS
+    - LP: #728687
+  * Linux 2.6.32.29+drm33.14
+    - LP: #728687
+  * NFSD: memory corruption due to writing beyond the stat array
+    - LP: #728687
+  * mptfusion: mptctl_release is required in mptctl.c
+    - LP: #728687
+  * mptfusion: Fix Incorrect return value in mptscsih_dev_reset
+    - LP: #728687
+  * ocfs2_connection_find() returns pointer to bad structure
+    - LP: #728687
+  * x25: decrement netdev reference counts on unload
+    - LP: #728687
+  * x86, hpet: Disable per-cpu hpet timer if ARAT is supported
+    - LP: #728687
+  * OHCI: work around for nVidia shutdown problem
+    - LP: #728687
+  * x86/pvclock: Zero last_value on resume
+    - LP: #728687
+  * av7110: check for negative array offset
+    - LP: #728687
+  * CRED: Fix get_task_cred() and task_state() to not resurrect dead
+    credentials
+    - LP: #728687
+  * bonding/vlan: Avoid mangled NAs on slaves without VLAN tag insertion
+    - LP: #728687
+  * CRED: Fix kernel panic upon security_file_alloc() failure.
+    - LP: #728687
+  * CRED: Fix BUG() upon security_cred_alloc_blank() failure
+    - LP: #728687
+  * CRED: Fix memory and refcount leaks upon security_prepare_creds()
+    failure
+    - LP: #728687
+  * sendfile(): check f_op.splice_write() rather than f_op.sendpage()
+    - LP: #728687
+  * isdn: hisax: Replace the bogus access to irq stats
+    - LP: #728687
+  * ixgbe: add support for 82599 based Express Module X520-P2
+    - LP: #728687
+  * ixgbe: prevent speculative processing of descriptors before ready
+    - LP: #728687
+  * scsi_dh_alua: add netapp to dev list
+    - LP: #728687
+  * scsi_dh_alua: Add IBM Power Virtual SCSI ALUA device to dev list
+    - LP: #728687
+  * dm raid1: fail writes if errors are not handled and log fails
+    - LP: #728687
+  * GFS2: Fix bmap allocation corner-case bug
+    - LP: #728687
+  * dm raid1: fix null pointer dereference in suspend
+    - LP: #728687
+  * sunrpc/cache: fix module refcnt leak in a failure path
+    - LP: #728687
+  * be2net: Maintain tx and rx counters in driver
+    - LP: #728687
+  * tcp: Make TCP_MAXSEG minimum more correct.
+    - LP: #728687
+  * nfsd: correctly handle return value from nfsd_map_name_to_*
+    - LP: #728687
+  * s390: remove task_show_regs
+    - LP: #728687
+  * PM / Hibernate: Return error code when alloc_image_page() fails
+    - LP: #728687
+  * fs/partitions: Validate map_count in Mac partition tables
+    - LP: #728687
+  * ALSA: HDA: Add position_fix quirk for an Asus device
+    - LP: #718402, #728687
+  * ALSA: caiaq - Fix possible string-buffer overflow
+    - LP: #728687
+  * radio-aimslab.c needs #include <linux/delay.h>
+    - LP: #728687
+  * ARM: Ensure predictable endian state on signal handler entry
+    - LP: #728687
+  * acer-wmi: Fix capitalisation of GUID
+    - LP: #728687
+  * eCryptfs: Copy up lower inode attrs in getattr
+    - LP: #728687
+  * platform: x86: acer-wmi: world-writable sysfs threeg file
+    - LP: #728687
+  * platform: x86: asus_acpi: world-writable procfs files
+    - LP: #728687
+  * platform: x86: tc1100-wmi: world-writable sysfs wireless and jogdial
+    files
+    - LP: #728687
+  * genirq: Disable the SHIRQ_DEBUG call in request_threaded_irq for now
+    - LP: #728687
+  * usb: musb: omap2430: fix kernel panic on reboot
+    - LP: #728687
+  * USB: add quirks entry for Keytouch QWERTY Panel
+    - LP: #728687
+  * USB: Add Samsung SGH-I500/Android modem ID switch to visor driver
+    - LP: #728687
+  * USB: Add quirk for Samsung Android phone modem
+    - LP: #728687
+  * p54pci: update receive dma buffers before and after processing
+    - LP: #728687
+  * sierra: add new ID for Airprime/Sierra USB IP modem
+    - LP: #728687
+  * staging: usbip: vhci: update reference count for usb_device
+    - LP: #728687
+  * staging: usbip: vhci: give back URBs from in-flight unlink requests
+    - LP: #728687
+  * staging: usbip: vhci: refuse to enqueue for dead connections
+    - LP: #728687
+  * staging: usbip: vhci: use urb->dev->portnum to find port
+    - LP: #728687
+  * epoll: prevent creating circular epoll structures
+    - LP: #728687
+  * ldm: corrupted partition table can cause kernel oops
+    - LP: #728687
+  * md: correctly handle probe of an 'mdp' device.
+    - LP: #728687
+  * x86 quirk: Fix polarity for IRQ0 pin2 override on SB800 systems
+    - LP: #728687
+  * xhci: Avoid BUG() in interrupt context
+    - LP: #728687
+  * xhci: Clarify some expressions in the TRB math
+    - LP: #728687
+  * xhci: Fix errors in the running total calculations in the TRB math
+    - LP: #728687
+  * xhci: Fix an error in count_sg_trbs_needed()
+    - LP: #728687
+  * x25: Do not reference freed memory.
+    - LP: #728687
+  * Linux 2.6.32.30
+    - LP: #728687
+  * Linux 2.6.32.31
+    - LP: #728687
+  * Ocfs2/refcounttree: Fix a bug for refcounttree to writeback clusters in
+    a right number.
+    - LP: #731226
+  * mfd: Fix NULL pointer due to non-initialized ucb1x00-ts absinfo
+    - LP: #731226
+  * x86: Use u32 instead of long to set reset vector back to 0
+    - LP: #731226
+  * fuse: fix hang of single threaded fuseblk filesystem
+    - LP: #731226
+  * clockevents: Prevent oneshot mode when broadcast device is periodic
+    - LP: #731226
+  * ext2: Fix link count corruption under heavy link+rename load
+    - LP: #731226
+  * sctp: Fix oops when sending queued ASCONF chunks
+    - LP: #731226
+  * virtio: set pci bus master enable bit
+    - LP: #731226
+  * netxen: fix set mac addr
+    - LP: #731226
+  * HID: add support for Acan FG-8100 barcode reader
+    - LP: #731226
+  * p54usb: add Senao NUB-350 usbid
+    - LP: #731226
+  * dccp: fix oops on Reset after close
+    - LP: #731226
+  * e1000e: disable broken PHY wakeup for ICH10 LOMs, use MAC wakeup
+    instead
+    - LP: #731226
+  * r8169: disable ASPM
+    - LP: #731226
+  * usb: iowarrior: don't trust report_size for buffer size
+    - LP: #731226
+  * arp_notify: unconditionally send gratuitous ARP for
+    NETDEV_NOTIFY_PEERS.
+    - LP: #731226
+  * CIFS: Fix oplock break handling (try #2)
+    - LP: #731226
+  * Linux 2.6.32.32
+    - LP: #731226
+
+  [ Ubuntu: 2.6.32-30.59 ]
+
+  * Release Tracking Bug
+    - LP: #727336
+  * [Config] CONFIG_IRQ_TIME_ACCOUNTING=n
+    - LP: #723819
+  * virtio_net: Add schedule check to napi_enable call
+    - LP: #579276
+  * NFS: fix the return value of nfs_file_fsync()
+    - LP: #585657
+  * block: check for proper length of iov entries earlier in
+    blk_rq_map_user_iov(), CVE-2010-4163
+    - LP: #721504
+    - CVE-2010-4163
+  * filter: make sure filters dont read uninitialized memory
+    - LP: #721282
+    - CVE-2010-4158
+  * tty: Make tiocgicount a handler, CVE-2010-4076, CVE-2010-4077
+    - LP: #720189
+    - CVE-2010-4077
+  * staging: usbip: remove double giveback of URB
+    - LP: #723819
+  * USB: EHCI: ASPM quirk of ISOC on AMD SB800
+    - LP: #723819
+  * rt2x00: add device id for windy31 usb device
+    - LP: #723819
+  * ALSA: snd-usb-us122l: Fix missing NULL checks
+    - LP: #723819
+  * hwmon: (via686a) Initialize fan_div values
+    - LP: #723819
+  * USB: serial: handle Data Carrier Detect changes
+    - LP: #723819
+  * USB: CP210x Add two device IDs
+    - LP: #723819
+  * USB: CP210x Removed incorrect device ID
+    - LP: #723819
+  * USB: usb-storage: unusual_devs update for Cypress ATACB
+    - LP: #723819
+  * USB: usb-storage: unusual_devs update for TrekStor DataStation maxi g.u
+    external hard drive enclosure
+    - LP: #723819
+  * USB: usb-storage: unusual_devs entry for CamSport Evo
+    - LP: #723819
+  * USB: usb-storage: unusual_devs entry for Coby MP3 player
+    - LP: #723819
+  * USB: serial: Updated support for ICOM devices
+    - LP: #723819
+  * USB: adding USB support for Cinterion's HC2x, EU3 and PH8 products
+    - LP: #723819
+  * USB: EHCI: ASPM quirk of ISOC on AMD Hudson
+    - LP: #723819
+  * USB: EHCI: fix DMA deallocation bug
+    - LP: #723819
+  * USB: g_printer: fix bug in module parameter definitions
+    - LP: #723819
+  * USB: io_edgeport: fix the reported firmware major and minor
+    - LP: #723819
+  * USB: ti_usb: fix module removal
+    - LP: #723819
+  * USB: Storage: Add unusual_devs entry for VTech Kidizoom
+    - LP: #723819
+  * USB: ftdi_sio: add ST Micro Connect Lite uart support
+    - LP: #723819
+  * USB: cdc-acm: Adding second ACM channel support for Nokia N8
+    - LP: #723819
+  * USB: ftdi_sio: Add VID=0x0647, PID=0x0100 for Acton Research
+    spectrograph
+    - LP: #723819
+  * USB: prevent buggy hubs from crashing the USB stack
+    - LP: #723819
+  * staging: comedi: add support for newer jr3 1-channel pci board
+    - LP: #723819
+  * staging: comedi: ni_labpc: Use shared IRQ for PCMCIA card
+    - LP: #723819
+  * Staging: hv: fix sysfs symlink on hv block device
+    - LP: #723819
+  * staging: hv: Enable sending GARP packet after live migration
+    - LP: #723819
+  * hvc_iucv: allocate memory buffers for IUCV in zone DMA
+    - LP: #723819
+  * iwlagn: enable only rfkill interrupt when device is down
+    - LP: #723819
+  * ath9k: Fix bug in delimiter padding computation
+    - LP: #723819
+  * correct vdso version string
+    - LP: #723819
+  * fix medium error problems with some arrays which can cause data
+    corruption
+    - LP: #723819
+  * libsas: fix runaway error handler problem
+    - LP: #723819
+  * mpt2sas: Fix device removal handshake for zoned devices
+    - LP: #723819
+  * mpt2sas: Correct resizing calculation for max_queue_depth
+    - LP: #723819
+  * mpt2sas: Kernel Panic during Large Topology discovery
+    - LP: #723819
+  * radio-aimslab.c: Fix gcc 4.5+ bug
+    - LP: #723819
+  * em28xx: Fix audio input for Terratec Grabby
+    - LP: #723819
+  * ALSA : au88x0 - Limit number of channels to fix Oops via OSS emu
+    - LP: #723819
+  * ALSA: HDA: Fix dmesg output of HDMI supported bits
+    - LP: #723819
+  * ALSA: hda - Fix memory leaks in conexant jack arrays
+    - LP: #723819
+  * input: bcm5974: Add support for MacBookAir3
+    - LP: #723819
+  * ALSA: hrtimer: handle delayed timer interrupts
+    - LP: #723819
+  * ASoC: WM8990: msleep() takes milliseconds not jiffies
+    - LP: #723819
+  * ASoC: Blackfin AC97: fix build error after multi-component update
+    - LP: #723819
+  * NFS: Fix "kernel BUG at fs/aio.c:554!"
+    - LP: #723819
+  * rtc-cmos: fix suspend/resume
+    - LP: #723819
+  * iwlagn: Re-enable RF_KILL interrupt when down
+    - LP: #723819
+  * rapidio: fix hang on RapidIO doorbell queue full condition
+    - LP: #723819
+  * PCI: pci-stub: ignore zero-length id parameters
+    - LP: #723819
+  * virtio: remove virtio-pci root device
+    - LP: #723819
+  * ds2760_battery: Fix calculation of time_to_empty_now
+    - LP: #723819
+  * p54: fix sequence no. accounting off-by-one error
+    - LP: #723819
+  * i2c: Unregister dummy devices last on adapter removal
+    - LP: #723819
+  * serial: unbreak billionton CF card
+    - LP: #723819
+  * ptrace: use safer wake up on ptrace_detach()
+    - LP: #723819
+  * x86, mtrr: Avoid MTRR reprogramming on BP during boot on UP platforms
+    - LP: #723819
+  * fix jiffy calculations in calibrate_delay_direct to handle overflow
+    - LP: #723819
+  * USB: serial: pl2303: Hybrid reader Uniform HCR331
+    - LP: #723819
+  * drivers: update to pl2303 usb-serial to support Motorola cables
+    - LP: #723819
+  * klist: Fix object alignment on 64-bit.
+    - LP: #723819
+  * powerpc: Fix some 6xx/7xxx CPU setup functions
+    - LP: #723819
+  * parisc : Remove broken line wrapping handling pdc_iodc_print()
+    - LP: #723819
+  * kernel/smp.c: fix smp_call_function_many() SMP race
+    - LP: #723819
+  * hostap_cs: fix sleeping function called from invalid context
+    - LP: #723819
+  * md: fix regression with re-adding devices to arrays with no metadata
+    - LP: #723819
+  * pata_mpc52xx: inherit from ata_bmdma_port_ops
+    - LP: #723819
+  * TPM: Long default timeout fix
+    - LP: #723819
+  * tpm_tis: Use timeouts returned from TPM
+    - LP: #723819
+  * SELinux: define permissions for DCB netlink messages
+    - LP: #723819
+  * SELinux: do not compute transition labels on mountpoint labeled
+    filesystems
+    - LP: #723819
+  * ieee80211: correct IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK macro
+    - LP: #723819
+  * dm: dont take i_mutex to change device size
+    - LP: #723819
+  * dm mpath: disable blk_abort_queue
+    - LP: #723819
+  * x86, mm: avoid possible bogus tlb entries by clearing prev mm_cpumask
+    after switching mm
+    - LP: #723819
+  * usb: Realloc xHCI structures after a hub is verified.
+    - LP: #723819
+  * sched: Remove USER_SCHED
+    - LP: #723819
+  * sched: Remove remaining USER_SCHED code
+    - LP: #723819
+  * sched: Move sched_avg_update() to update_cpu_load()
+    - LP: #723819
+  * sched: Increment cache_nice_tries only on periodic lb
+    - LP: #723819
+  * sched: Try not to migrate higher priority RT tasks
+    - LP: #723819
+  * sched: Give CPU bound RT tasks preference
+    - LP: #723819
+  * sched: suppress RCU lockdep splat in task_fork_fair
+    - LP: #723819
+  * sched: fix RCU lockdep splat from task_group()
+    - LP: #723819
+  * sched: Do not consider SCHED_IDLE tasks to be cache hot
+    - LP: #723819
+  * sched: Set group_imb only a task can be pulled from the busiest cpu
+    - LP: #723819
+  * sched: Force balancing on newidle balance if local group has capacity
+    - LP: #723819
+  * sched: Drop group_capacity to 1 only if local group has extra capacity
+    - LP: #723819
+  * sched: Fix softirq time accounting
+    - LP: #723819
+  * sched: Consolidate account_system_vtime extern declaration
+    - LP: #723819
+  * sched: Remove unused PF_ALIGNWARN flag
+    - LP: #723819
+  * sched: Add a PF flag for ksoftirqd identification
+    - LP: #723819
+  * sched: Add IRQ_TIME_ACCOUNTING, finer accounting of irq time
+    - LP: #723819
+  * x86: Add IRQ_TIME_ACCOUNTING
+    - LP: #723819
+  * sched: Do not account irq time to current task
+    - LP: #723819
+  * sched: Remove irq time from available CPU power
+    - LP: #723819
+  * sched: Call tick_check_idle before __irq_enter
+    - LP: #723819
+  * sched: Export account_system_vtime()
+    - LP: #723819
+  * sched, cgroup: Fixup broken cgroup movement
+    - LP: #723819
+  * sched: Use group weight, idle cpu metrics to fix imbalances during idle
+    - LP: #723819
+  * sched: Fix cross-sched-class wakeup preemption
+    - LP: #723819
+  * sched: Fix volanomark performance regression
+    - LP: #723819
+  * sched: Fix idle balancing
+    - LP: #723819
+  * sched: Fix wake_affine() vs RT tasks
+    - LP: #723819
+  * sched: Remove some dead code
+    - LP: #723819
+  * kernel/user.c: add lock release annotation on free_user()
+    - LP: #723819
+  * Linux 2.6.32.29
+    - LP: #723819
+  * rds: Integer overflow in RDS cmsg handling, CVE-2010-4175
+    - LP: #721455
+    - CVE-2010-4175
+
+  [ Ubuntu: 2.6.32-29.58 ]
+
+  * Release Tracking Bug
+    - LP: #716551
+  * net: fix rds_iovec page count overflow, CVE-2010-3865
+    - LP: #709153
+    - CVE-2010-3865
+  * net: ax25: fix information leak to userland, CVE-2010-3875
+    - LP: #710714
+    - CVE-2010-3875
+  * net: ax25: fix information leak to userland harder, CVE-2010-3875
+    - LP: #710714
+    - CVE-2010-3875
+  * net: packet: fix information leak to userland, CVE-2010-3876
+    - LP: #710714
+    - CVE-2010-3876
+  * net: tipc: fix information leak to userland, CVE-2010-3877
+    - LP: #711291
+    - CVE-2010-3877
+  * inet_diag: Make sure we actually run the same bytecode we audited,
+    CVE-2010-3880
+    - LP: #711865
+    - CVE-2010-3880
+
+  [ Ubuntu: 2.6.32-29.57 ]
+
+  * Tracking Bug
+    - LP: #708864
+  * [Config] Set CONFIG_NR_CPUS=256 for amd64 server
+    - LP: #706058
+  * Input: i8042 - introduce 'notimeout' blacklist for Dell Vostro V13
+    - LP: #380126
+  * tun: avoid BUG, dump packet on GSO errors
+    - LP: #698883
+  * TTY: Fix error return from tty_ldisc_open()
+    - LP: #705045
+  * x86, hotplug: Use mwait to offline a processor, fix the legacy case
+    - LP: #705045
+  * fuse: verify ioctl retries
+    - LP: #705045
+  * fuse: fix ioctl when server is 32bit
+    - LP: #705045
+  * ALSA: hda: Use model=lg quirk for LG P1 Express to enable playback and
+    capture
+    - LP: #595482, #705045
+  * nohz: Fix printk_needs_cpu() return value on offline cpus
+    - LP: #705045
+  * nohz: Fix get_next_timer_interrupt() vs cpu hotplug
+    - LP: #705045
+  * nfsd: Fix possible BUG_ON firing in set_change_info
+    - LP: #705045
+  * NFS: Fix fcntl F_GETLK not reporting some conflicts
+    - LP: #705045
+  * sunrpc: prevent use-after-free on clearing XPT_BUSY
+    - LP: #705045
+  * hwmon: (adm1026) Allow 1 as a valid divider value
+    - LP: #705045
+  * hwmon: (adm1026) Fix setting fan_div
+    - LP: #705045
+  * amd64_edac: Fix interleaving check
+    - LP: #705045
+  * IB/uverbs: Handle large number of entries in poll CQ
+    - LP: #705045
+  * PM / Hibernate: Fix PM_POST_* notification with user-space suspend
+    - LP: #705045
+  * ACPICA: Fix Scope() op in module level code
+    - LP: #705045
+  * ACPI: EC: Add another dmi match entry for MSI hardware
+    - LP: #705045
+  * orinoco: fix TKIP countermeasure behaviour
+    - LP: #705045
+  * orinoco: clear countermeasure setting on commit
+    - LP: #705045
+  * x86, amd: Fix panic on AMD CPU family 0x15
+    - LP: #705045
+  * md: fix bug with re-adding of partially recovered device.
+    - LP: #705045
+  * tracing: Fix panic when lseek() called on "trace" opened for writing
+    - LP: #705045
+  * x86, gcc-4.6: Use gcc -m options when building vdso
+    - LP: #705045
+  * x86: Enable the intr-remap fault handling after local APIC setup
+    - LP: #705045
+  * x86, vt-d: Handle previous faults after enabling fault handling
+    - LP: #705045
+  * x86, vt-d: Fix the vt-d fault handling irq migration in the x2apic mode
+    - LP: #705045
+  * x86, vt-d: Quirk for masking vtd spec errors to platform error handling
+    logic
+    - LP: #705045
+  * hvc_console: Fix race between hvc_close and hvc_remove
+    - LP: #705045
+  * hvc_console: Fix race between hvc_close and hvc_remove, again
+    - LP: #705045
+  * HID: hidraw: fix window in hidraw_release
+    - LP: #705045
+  * bfa: fix system crash when reading sysfs fc_host statistics
+    - LP: #705045
+  * net: release dst entry while cache-hot for GSO case too
+    - LP: #705045
+  * install_special_mapping skips security_file_mmap check.
+    - LP: #705045
+  * USB: misc: uss720.c: add another vendor/product ID
+    - LP: #705045
+  * USB: ftdi_sio: Add D.O.Tec PID
+    - LP: #705045
+  * USB: usb-storage: unusual_devs entry for the Samsung YP-CP3
+    - LP: #705045
+  * p54usb: add 5 more USBIDs
+    - LP: #705045
+  * p54usb: New USB ID for Gemtek WUBI-100GW
+    - LP: #705045
+  * sound: Prevent buffer overflow in OSS load_mixer_volumes
+    - LP: #705045
+  * mv_xor: fix race in tasklet function
+    - LP: #705045
+  * ima: fix add LSM rule bug
+    - LP: #705045
+  * ALSA: hda: Use LPIB for Dell Latitude 131L
+    - LP: #530346, #705045
+  * ALSA: hda: Use LPIB quirk for Dell Inspiron m101z/1120
+    - LP: #705045
+  * block: Deprecate QUEUE_FLAG_CLUSTER and use queue_limits instead
+    - LP: #705045
+  * sctp: Fix a race between ICMP protocol unreachable and connect()
+    - LP: #705045
+  * posix-cpu-timers: workaround to suppress the problems with mt exec
+    - LP: #705045
+  * Linux 2.6.32.28
+    - LP: #705045
+  * dell-laptop: Add another Dell laptop family to the DMI whitelist
+    - LP: #693078
+  * dell-laptop: Add another Dell laptop family to the DMI whitelist
+    - LP: #693078
+  * drm/ttm: Clear the ghost cpu_writers flag on
+    ttm_buffer_object_transfer.
+    - LP: #708769
+  * drm/kms: remove spaces from connector names (v2)
+    - LP: #708769
+  * Linux 2.6.32.28+drm33.13
+    - LP: #708769
+
+  [ Ubuntu: 2.6.32-28.56 ]
+
+  * Tracking Bug
+    - LP: #705565
+  * Just a build number increment for a new upload. There was an issue
+    in the previous upload that prevented ARMEL from building. The
+    issue has been resolved in the PPA and a new upload should produce
+    the requisite images.
+
+  [ Ubuntu: 2.6.32-28.55 ]
+
+  * Another version bump because of abi check failure
+  * Tracking Bug
+    - LP: #699885
+
+  [ Ubuntu: 2.6.32-28.54 ]
+
+  * Another version bump because of upload failure
+
+  [ Ubuntu: 2.6.32-28.53 ]
+
+  * Another version bump because of upload failure
+
+  [ Ubuntu: 2.6.32-28.52 ]
+
+  * (removed old tracking bug link)
+
+  [ Ubuntu: 2.6.32-28.51 ]
+
+  * bumped version due to build fail
+
+  [ Ubuntu: 2.6.32-28.50 ]
+
+  * SAUCE: Change nodelayacct boot parameter polarity.
+    - LP: #493156
+  * [Config] CONFIG_TASK_DELAY_ACCT=y
+    - LP: #493156
+  * ipc: initialize structure memory to zero for compat functions
+  * tcp: Increase TCP_MAXSEG socket option minimum.
+    - CVE-2010-4165
+  * perf_events: Fix perf_counter_mmap() hook in mprotect()
+    - CVE-2010-4169
+  * af_unix: limit unix_tot_inflight
+    - CVE-2010-4249
+  * AppArmor: fix the upper bound check for the next/check table
+    - LP: #581525
+  * NFS: Fix panic after nfs_umount()
+    - LP: #683938
+  * block: Ensure physical block size is unsigned int
+    - LP: #688669
+  * block: limit vec count in bio_kmalloc() and bio_alloc_map_data()
+    - LP: #688669
+  * block: take care not to overflow when calculating total iov length
+    - LP: #688669
+  * block: check for proper length of iov entries in blk_rq_map_user_iov()
+    - LP: #688669
+  * jme: Fix PHY power-off error
+    - LP: #688669
+  * irda: Fix parameter extraction stack overflow
+    - LP: #688669
+  * irda: Fix heap memory corruption in iriap.c
+    - LP: #688669
+  * i2c-pca-platform: Change device name of request_irq
+    - LP: #688669
+  * microblaze: Fix build with make 3.82
+    - LP: #688669
+  * Staging: asus_oled: fix up some sysfs attribute permissions
+    - LP: #688669
+  * Staging: asus_oled: fix up my fixup for some sysfs attribute
+    permissions
+    - LP: #688669
+  * Staging: line6: fix up some sysfs attribute permissions
+    - LP: #688669
+  * hpet: fix unwanted interrupt due to stale irq status bit
+    - LP: #688669
+  * hpet: unmap unused I/O space
+    - LP: #688669
+  * olpc_battery: Fix endian neutral breakage for s16 values
+    - LP: #688669
+  * percpu: fix list_head init bug in __percpu_counter_init()
+    - LP: #688669
+  * um: remove PAGE_SIZE alignment in linker script causing kernel
+    segfault.
+    - LP: #688669
+  * um: fix global timer issue when using CONFIG_NO_HZ
+    - LP: #688669
+  * numa: fix slab_node(MPOL_BIND)
+    - LP: #688669
+  * hwmon: (lm85) Fix ADT7468 frequency table
+    - LP: #688669
+  * mm: fix return value of scan_lru_pages in memory unplug
+    - LP: #688669
+  * mm: fix is_mem_section_removable() page_order BUG_ON check
+    - LP: #688669
+  * ssb: b43-pci-bridge: Add new vendor for BCM4318
+    - LP: #688669
+  * sgi-xpc: XPC fails to discover partitions with all nasids above 128
+    - LP: #688669
+  * xen: ensure that all event channels start off bound to VCPU 0
+    - LP: #688669
+  * xen: don't bother to stop other cpus on shutdown/reboot
+    - LP: #688669
+  * sys_semctl: fix kernel stack leakage
+    - LP: #688669
+  * net: NETIF_F_HW_CSUM does not imply FCoE CRC offload
+    - LP: #688669
+  * drivers/char/vt_ioctl.c: fix VT_OPENQRY error value
+    - LP: #688669
+  * viafb: use proper register for colour when doing fill ops
+    - LP: #688669
+  * eCryptfs: Clear LOOKUP_OPEN flag when creating lower file
+    - LP: #688669
+  * md/raid1: really fix recovery looping when single good device fails.
+    - LP: #688669
+  * md: fix return value of rdev_size_change()
+    - LP: #688669
+  * x86: AMD Northbridge: Verify NB's node is online
+    - LP: #688669
+  * tty: prevent DOS in the flush_to_ldisc
+    - LP: #688669
+  * TTY: restore tty_ldisc_wait_idle
+    - LP: #688669
+  * tty_ldisc: Fix BUG() on hangup
+    - LP: #688669
+  * TTY: ldisc, fix open flag handling
+    - LP: #688669
+  * KVM: VMX: fix vmx null pointer dereference on debug register access
+    - LP: #688669
+    - CVE-2010-0435
+  * KVM: x86: fix information leak to userland
+    - LP: #688669
+  * firewire: cdev: fix information leak
+    - LP: #688669
+  * firewire: core: fix an information leak
+    - LP: #688669
+  * firewire: ohci: fix buffer overflow in AR split packet handling
+    - LP: #688669
+  * firewire: ohci: fix race in AR split packet handling
+    - LP: #688669
+  * ALSA: ac97: Apply quirk for Dell Latitude D610 binding Master and
+    Headphone controls
+    - LP: #669279, #688669
+  * ALSA: HDA: Add an extra DAC for Realtek ALC887-VD
+    - LP: #688669
+  * ALSA: hda: Use "alienware" model quirk for another SSID
+    - LP: #683695, #688669
+  * netfilter: nf_conntrack: allow nf_ct_alloc_hashtable() to get highmem
+    pages
+    - LP: #688669
+  * latencytop: fix per task accumulator
+    - LP: #688669
+  * mm/vfs: revalidate page->mapping in do_generic_file_read()
+    - LP: #688669
+  * bio: take care not overflow page count when mapping/copying user data
+    - LP: #688669
+  * libata-scsi passthru: fix bug which truncated LBA48 return values
+    - LP: #688669
+  * libata: fix NULL sdev dereference race in atapi_qc_complete()
+    - LP: #688669
+  * PCI: fix size checks for mmap() on /proc/bus/pci files
+    - LP: #688669
+  * PCI: fix offset check for sysfs mmapped files
+    - LP: #688669
+  * efifb: check that the base address is plausible on pci systems
+    - LP: #688669
+  * USB: gadget: AT91: fix typo in atmel_usba_udc driver
+    - LP: #688669
+  * USB: ftdi_sio: add device IDs for Milkymist One JTAG/serial
+    - LP: #688669
+  * USB: option: fix when the driver is loaded incorrectly for some Huawei
+    devices.
+    - LP: #688669
+  * usb: misc: sisusbvga: fix information leak to userland
+    - LP: #688669
+  * usb: misc: iowarrior: fix information leak to userland
+    - LP: #688669
+  * usb: core: fix information leak to userland
+    - LP: #688669
+  * USB: EHCI: fix obscure race in ehci_endpoint_disable
+    - LP: #688669
+  * USB: storage: sierra_ms: fix sysfs file attribute
+    - LP: #688669
+  * USB: atm: ueagle-atm: fix up some permissions on the sysfs files
+    - LP: #688669
+  * USB: misc: cypress_cy7c63: fix up some sysfs attribute permissions
+    - LP: #688669
+  * USB: misc: usbled: fix up some sysfs attribute permissions
+    - LP: #688669
+  * USB: ftdi_sio: revert "USB: ftdi_sio: fix DTR/RTS line modes"
+    - LP: #688669
+  * USB: misc: trancevibrator: fix up a sysfs attribute permission
+    - LP: #688669
+  * USB: misc: usbsevseg: fix up some sysfs attribute permissions
+    - LP: #688669
+  * USB: ftdi_sio: Add ID for RT Systems USB-29B radio cable
+    - LP: #688669
+  * USB: serial: ftdi_sio: Vardaan USB RS422/485 converter PID added
+    - LP: #688669
+  * acpi-cpufreq: fix a memleak when unloading driver
+    - LP: #688669
+  * ACPI: EC: add Vista incompatibility DMI entry for Toshiba Satellite
+    L355
+    - LP: #688669
+  * fuse: fix attributes after open(O_TRUNC)
+    - LP: #688669
+  * do_exit(): make sure that we run with get_fs() == USER_DS
+    - LP: #688669
+  * uml: disable winch irq before freeing handler data
+    - LP: #688669
+  * backlight: grab ops_lock before testing bd->ops
+    - LP: #688669
+  * nommu: yield CPU while disposing VM
+    - LP: #688669
+  * DECnet: don't leak uninitialized stack byte
+    - LP: #688669
+  * ARM: 6489/1: thumb2: fix incorrect optimisation in usracc
+    - LP: #688669
+  * ARM: 6482/2: Fix find_next_zero_bit and related assembly
+    - LP: #688669
+  * Staging: frontier: fix up some sysfs attribute permissions
+    - LP: #688669
+  * staging: rtl8187se: Change panic to warn when RF switch turned off
+    - LP: #688669
+  * HID: hidraw, fix a NULL pointer dereference in hidraw_ioctl
+    - LP: #688669
+  * HID: hidraw, fix a NULL pointer dereference in hidraw_write
+    - LP: #688669
+  * gianfar: Fix crashes on RX path (Was Re: [Bugme-new] [Bug 19692] New:
+    linux-2.6.36-rc5 crash with gianfar ethernet at full line rate traffic)
+    - LP: #688669
+  * Limit sysctl_tcp_mem and sysctl_udp_mem initializers to prevent integer
+    overflows.
+    - LP: #688669
+  * sparc64: Fix race in signal instruction flushing.
+    - LP: #688669
+  * sparc: Don't mask signal when we can't setup signal frame.
+    - LP: #688669
+  * sparc: Prevent no-handler signal syscall restart recursion.
+    - LP: #688669
+  * x86, UV: Delete unneeded boot messages
+    - LP: #688669
+  * x86, UV: Fix initialization of max_pnode
+    - LP: #688669
+  * drivers/video/efifb.c: support framebuffer for NVIDIA 9400M in MacBook
+    Pro 5,1
+    - LP: #688669
+  * efifb: support the EFI framebuffer on more Apple hardware
+    - LP: #688669
+  * V4L/DVB (13154): uvcvideo: Handle garbage at the end of streaming
+    interface descriptors
+    - LP: #688669
+  * Input: i8042 - add Sony VAIO VPCZ122GX to nomux list
+    - LP: #688669
+  * x25: Patch to fix bug 15678 - x25 accesses fields beyond end of packet.
+    - LP: #688669
+  * memory corruption in X.25 facilities parsing
+    - LP: #688669
+  * can-bcm: fix minor heap overflow
+    - LP: #688669
+  * V4L/DVB: ivtvfb: prevent reading uninitialized stack memory
+    - LP: #688669
+  * x25: Prevent crashing when parsing bad X.25 facilities
+    - LP: #688669
+  * crypto: padlock - Fix AES-CBC handling on odd-block-sized input
+    - LP: #688669
+  * x86-32: Separate 1:1 pagetables from swapper_pg_dir
+    - LP: #688669
+  * x86, mm: Fix CONFIG_VMSPLIT_1G and 2G_OPT trampoline
+    - LP: #688669
+  * x86-32: Fix dummy trampoline-related inline stubs
+    - LP: #688669
+  * rds: Integer overflow in RDS cmsg handling
+    - LP: #688669
+  * net: Truncate recvfrom and sendto length to INT_MAX.
+    - LP: #688669
+  * net: Limit socket I/O iovec total length to INT_MAX.
+    - LP: #688669
+  * nmi: fix clock comparator revalidation
+    - LP: #688669
+  * UV - XPC: pass nasid instead of nid to gru_create_message_queue
+    - LP: #688669
+  * x86: uv: XPC receive message reuse triggers invalid BUG_ON()
+    - LP: #688669
+  * X86: uv: xpc_make_first_contact hang due to not accepting ACTIVE state
+    - LP: #688669
+  * x86: uv: xpc NULL deref when mesq becomes empty
+    - LP: #688669
+  * Linux 2.6.32.27
+    - LP: #688669
+
+ -- Paolo Pisati <paolo.pisati@canonical.com>  Thu, 17 Mar 2011 12:53:35 +0100
+
+linux-mvl-dove (2.6.32-215.32) lucid; urgency=low
+
+  [ Tim Gardner ]
+
+  * Tracking Bug
+    -LP: #712610
+
+  [Paolo Pisati]
+
+  * UBUNTU: SAUCE: Clear new_profile in error path
+    Fixes kernel oops.
+    -LP: #732700
+
+  * Revert "dove: enable lcd0 by default"
+    Fixes screen corruption regression.
+    -LP: #732721
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Mon, 14 Mar 2011 11:29:35 -0600
+
+linux-mvl-dove (2.6.32-215.31) lucid; urgency=low
+
+  [ Tim Gardner ]
+
+  * Tracking Bug
+    - LP: #712610
+
+  * rebasing to 2.6.32-29.57 was a really bad idea.
+    lets forget it ever happened, start afresh
+    from Ubuntu-2.6.32-213.29, and just apply CVE patches.
+
+  * inet_diag: Make sure we actually run the same bytecode we audited, CVE-2010-3880
+    -LP: #711341
+    CVE-2010-3880
+  * net: tipc: fix information leak to userland, CVE-2010-3877
+    -LP: #711291
+    CVE-2010-3877
+  * net: packet: fix information leak to userland, CVE-2010-3876
+    -LP: #711045
+    CVE-2010-3876
+  * net: ax25: fix information leak to userland harder, CVE-2010-3875
+    -LP: #710714
+    CVE-2010-3875
+  * net: ax25: fix information leak to userland, CVE-2010-3875
+    -LP: #710714
+    CVE-2010-3875
+  * net: fix rds_iovec page count overflow, CVE-2010-3865
+    -LP: #709153
+    CVE-2010-3865
+  * KVM: VMX: fix vmx null pointer dereference on debug register access, CVE-2010-0435
+    -LP: #712615
+    CVE-2010-0435
+  * af_unix: limit unix_tot_inflight, CVE-2010-4249
+    -LP: #720959
+    CVE-2010-4249
+  * perf_events: Fix perf_counter_mmap() hook in mprotect(), CVE-2010-4169
+    -LP: #720966
+    CVE-2010-4169
+  * tcp: Increase TCP_MAXSEG socket option minimum., CVE-2010-4165
+    -LP: #720967
+    CVE-2010-4165
+  * ipc: initialize structure memory to zero for compat functions, CVE-2010-4073
+    -LP: #720968
+    CVE-2010-4073
+
+ -- Tim Gardner <tim.gardner@canonical.com>  Thu, 17 Feb 2011 13:05:01 -0700
+
+linux-mvl-dove (2.6.32-214.30) lucid; urgency=low
+
+  * This version was really bad. Pretend it never happened.
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Thu, 03 Feb 2011 09:13:11 -0700
+
+linux-mvl-dove (2.6.32-213.29) lucid-proposed; urgency=low
+
+  [ Brad Figg ]
+
+  * Rebased to 2.6.32-27.49
+
+  [ Ubuntu: 2.6.32-27.49 ]
+
+  * Revert "SAUCE: AF_ECONET prevent kernel stack overflow"
+  * Revert "SAUCE: AF_ECONET SIOCSIFADDR ioctl does not check privileges"
+  * Revert "SAUCE: AF_ECONET saddr->cookie prevent NULL pointer
+    dereference"
+  * [Config] Added be2net, be2scsi to udebs
+    - LP: #628776
+  * [Config] Use correct be2iscsi module name in d-i/modules/scsi-modules
+    - LP: #628776
+  * Revert "(pre-stable) ACPI: enable repeated PCIEXP wakeup by clearing
+    PCIEXP_WAKE_STS on resume"
+  * Revert "mm: (pre-stable) Move vma_stack_continue into mm.h"
+  * x86, cpu: After uncapping CPUID, re-run CPU feature detection
+    - LP: #668380
+  * ALSA: sound/pci/rme9652: prevent reading uninitialized stack memory
+    - LP: #668380
+  * ALSA: oxygen: fix analog capture on Claro halo cards
+    - LP: #668380
+  * ALSA: hda - Add Dell Latitude E6400 model quirk
+    - LP: #643891, #668380
+  * ALSA: rawmidi: fix oops (use after free) when unloading a driver module
+    - LP: #668380
+  * USB: fix bug in initialization of interface minor numbers
+    - LP: #668380
+  * usb: musb: gadget: fix kernel panic if using out ep with FIFO_TXRX
+    style
+    - LP: #668380
+  * usb: musb: gadget: restart request on clearing endpoint halt
+    - LP: #668380
+  * oprofile: Add Support for Intel CPU Family 6 / Model 29
+    - LP: #668380
+  * RDMA/cxgb3: Turn off RX coalescing for iWARP connections
+    - LP: #668380
+  * mmc: sdhci-s3c: fix NULL ptr access in sdhci_s3c_remove
+    - LP: #668380
+  * x86/amd-iommu: Set iommu configuration flags in enable-loop
+    - LP: #668380
+  * x86/amd-iommu: Fix rounding-bug in __unmap_single
+    - LP: #668380
+  * x86/amd-iommu: Work around S3 BIOS bug
+    - LP: #668380
+  * tracing/x86: Don't use mcount in pvclock.c
+    - LP: #668380
+  * tracing/x86: Don't use mcount in kvmclock.c
+    - LP: #668380
+  * v4l1: fix 32-bit compat microcode loading translation
+    - LP: #668380
+  * V4L/DVB: cx231xx: Avoid an OOPS when card is unknown (card=0)
+    - LP: #668380
+  * V4L/DVB (13966): DVB-T regression fix for saa7134 cards
+    - LP: #668380
+  * Input: joydev - fix JSIOCSAXMAP ioctl
+    - LP: #668380
+  * x86, hpet: Fix bogus error check in hpet_assign_irq()
+    - LP: #668380
+  * x86, irq: Plug memory leak in sparse irq
+    - LP: #668380
+  * ubd: fix incorrect sector handling during request restart
+    - LP: #668380
+  * ring-buffer: Fix typo of time extends per page
+    - LP: #668380
+  * dmaengine: fix interrupt clearing for mv_xor
+    - LP: #668380
+  * hrtimer: Preserve timer state in remove_hrtimer()
+    - LP: #668380
+  * i2c-pca: Fix waitforcompletion() return value
+    - LP: #668380
+  * wext: fix potential private ioctl memory content leak
+    - LP: #668380
+  * atl1: fix resume
+    - LP: #668380
+  * x86, AMD, MCE thresholding: Fix the MCi_MISCj iteration order
+    - LP: #668380
+  * De-pessimize rds_page_copy_user
+    - LP: #668380
+  * xfrm4: strip ECN and IP Precedence bits in policy lookup
+    - LP: #668380
+  * tcp: Fix >4GB writes on 64-bit.
+    - LP: #668380
+  * net: Fix the condition passed to sk_wait_event()
+    - LP: #668380
+  * Phonet: Correct header retrieval after pskb_may_pull
+    - LP: #668380
+  * net: Fix IPv6 PMTU disc. w/ asymmetric routes
+    - LP: #668380
+  * ip: fix truesize mismatch in ip fragmentation
+    - LP: #668380
+  * net: clear heap allocations for privileged ethtool actions
+    - LP: #668380
+  * tcp: Fix race in tcp_poll
+    - LP: #668380
+  * netxen: dont set skb->truesize
+    - LP: #668380
+  * net: blackhole route should always be recalculated
+    - LP: #668380
+  * skge: add quirk to limit DMA
+    - LP: #668380
+  * r8169: allocate with GFP_KERNEL flag when able to sleep
+    - LP: #668380
+  * bsg: fix incorrect device_status value
+    - LP: #668380
+  * r6040: fix r6040_multicast_list
+    - LP: #668380
+  * r6040: Fix multicast list iteration when hash filter is used
+    - LP: #668380
+  * powerpc: Initialise paca->kstack before early_setup_secondary
+    - LP: #668380
+  * powerpc: Don't use kernel stack with translation off
+    - LP: #668380
+  * b44: fix carrier detection on bind
+    - LP: #668380
+  * ACPI: enable repeated PCIEXP wakeup by clearing PCIEXP_WAKE_STS on
+    resume
+    - LP: #613381, #668380
+  * intel_idle: PCI quirk to prevent Lenovo Ideapad s10-3 boot hang
+    - LP: #668380
+  * ACPI: EC: add Vista incompatibility DMI entry for Toshiba Satellite
+    L355
+    - LP: #668380
+  * ACPI: delete ZEPTO idle=nomwait DMI quirk
+    - LP: #668380
+  * ACPI: Disable Windows Vista compatibility for Toshiba P305D
+    - LP: #668380
+  * x86: detect scattered cpuid features earlier
+    - LP: #668380
+  * fix 2.6.32.23 suspend regression caused by commit 6f6198a
+    - LP: #668380
+  * setup_arg_pages: diagnose excessive argument size
+    - LP: #668380
+  * execve: improve interactivity with large arguments
+    - LP: #668380
+  * execve: make responsive to SIGKILL with large arguments
+    - LP: #668380
+  * Phonet: disable network namespace support
+    - LP: #668380
+  * mm: Move vma_stack_continue into mm.h
+    - LP: #668380
+  * Linux 2.6.32.25
+    - LP: #668380
+  * xfs: validate untrusted inode numbers during lookup
+    - CVE-2010-2943
+  * xfs: rename XFS_IGET_BULKSTAT to XFS_IGET_UNTRUSTED
+    - CVE-2010-2943
+  * xfs: remove block number from inode lookup code
+    - CVE-2010-2943
+  * xfs: fix untrusted inode number lookup
+    - CVE-2010-2943
+  * drm/i915: Sanity check pread/pwrite
+    - CVE-2010-2962
+  * drm/i915: Rephrase pwrite bounds checking to avoid any potential
+    overflow
+    - CVE-2010-2962
+  * net: clear heap allocation for ETHTOOL_GRXCLSRLALL
+    - CVE-2010-3861
+  * ipc: shm: fix information leak to userland
+    - CVE-2010-4072
+  * staging: usbip: Notify usb core of port status changes
+    - LP: #681132
+  * staging: usbip: Process event flags without delay
+    - LP: #681132
+  * powerpc/perf: Fix sampling enable for PPC970
+    - LP: #681132
+  * pcmcia: synclink_cs: fix information leak to userland
+    - LP: #681132
+  * sched: Fix string comparison in /proc/sched_features
+    - LP: #681132
+  * bluetooth: Fix missing NULL check
+    - LP: #681132
+  * futex: Fix errors in nested key ref-counting
+    - LP: #681132
+  * mm, x86: Saving vmcore with non-lazy freeing of vmas
+    - LP: #681132
+  * x86, cpu: Fix renamed, not-yet-shipping AMD CPUID feature bit
+    - LP: #681132
+  * x86, kexec: Make sure to stop all CPUs before exiting the kernel
+    - LP: #681132
+  * x86, olpc: Don't retry EC commands forever
+    - LP: #681132
+  * x86, mtrr: Assume SYS_CFG[Tom2ForceMemTypeWB] exists on all future AMD
+    CPUs
+    - LP: #681132
+  * x86, intr-remap: Set redirection hint in the IRTE
+    - LP: #681132
+  * x86, kdump: Change copy_oldmem_page() to use cached addressing
+    - LP: #681132
+  * KVM: SVM: Fix wrong intercept masks on 32 bit
+    - LP: #681132
+  * KVM: MMU: fix direct sps access corrupted
+    - LP: #681132
+  * KVM: MMU: fix conflict access permissions in direct sp
+    - LP: #681132
+  * KVM: VMX: Fix host GDT.LIMIT corruption
+    - LP: #681132
+  * KVM: SVM: Adjust tsc_offset only if tsc_unstable
+    - LP: #681132
+  * KVM: x86: Fix SVM VMCB reset
+    - LP: #681132
+  * KVM: x86: Move TSC reset out of vmcb_init
+    - LP: #681132
+  * KVM: Fix fs/gs reload oops with invalid ldt
+    - LP: #681132
+  * KVM: Correct ordering of ldt reload wrt fs/gs reload
+  * KVM: VMX: Fix host userspace gsbase corruption
+  * pipe: fix failure to return error code on ->confirm()
+    - LP: #681132
+  * p54usb: fix off-by-one on !CONFIG_PM
+    - LP: #681132
+  * p54usb: add five more USBIDs
+    - LP: #681132
+  * drivers/net/wireless/p54/eeprom.c: Return -ENOMEM on memory allocation
+    failure
+    - LP: #681132
+  * USB: ftdi_sio: Add PID for accesio products
+    - LP: #681132
+  * USB: add PID for FTDI based OpenDCC hardware
+    - LP: #681132
+  * USB: ftdi_sio: new VID/PIDs for various Papouch devices
+    - LP: #681132
+  * USB: ftdi_sio: add device ids for ScienceScope
+    - LP: #681132
+  * usb: musb: blackfin: call gpio_free() on error path in
+    musb_platform_init()
+    - LP: #681132
+  * USB: option: Add more ZTE modem USB id's
+    - LP: #681132
+  * USB: cp210x: Add Renesas RX-Stick device ID
+    - LP: #681132
+  * USB: cp210x: Add WAGO 750-923 Service Cable device ID
+    - LP: #681132
+  * USB: atmel_usba_udc: force vbus_pin at -EINVAL when gpio_request
+    failled
+    - LP: #681132
+  * USB: disable endpoints after unbinding interfaces, not before
+    - LP: #681132
+  * USB: opticon: Fix long-standing bugs in opticon driver
+    - LP: #681132
+  * USB: accept some invalid ep0-maxpacket values
+    - LP: #681132
+  * sd name space exhaustion causes system hang
+    - LP: #681132
+  * libsas: fix NCQ mixing with non-NCQ
+    - LP: #681132
+  * gdth: integer overflow in ioctl
+    - LP: #681132
+  * Fix race when removing SCSI devices
+    - LP: #681132
+  * Fix regressions in scsi_internal_device_block
+    - LP: #681132
+  * sgi-xp: incoming XPC channel messages can come in after the channel's
+    partition structures have been torn down
+    - LP: #681132
+  * Linux 2.6.32.26
+    - LP: #681132
+  * drm/radeon: fix PCI ID 5657 to be an RV410
+    - LP: #683257
+  * Linux 2.6.32.26+drm33.12
+    - LP: #683257
+  * econet: disallow NULL remote addr for sendmsg(), fixes CVE-2010-3849
+    - CVE-2010-3849
+  * econet: fix CVE-2010-3850
+    - CVE-2010-3850
+  * econet: fix CVE-2010-3848
+    - CVE-2010-3848
+
+  [ Ubuntu: 2.6.32-26.48 ]
+
+  * SAUCE: AF_ECONET prevent kernel stack overflow
+    - CVE-2010-3848
+  * SAUCE: AF_ECONET SIOCSIFADDR ioctl does not check privileges
+    - CVE-2010-3850
+  * SAUCE: AF_ECONET saddr->cookie prevent NULL pointer dereference
+    - CVE-2010-3849
+
+  [ Ubuntu: 2.6.32-26.47 ]
+
+  * Revert "SAUCE: ALSA: HDA: Enable internal mic on Dell E6410 and Dell
+    E6510"
+  * Revert "[Config] Added be2net, be2scsi to udebs"
+  * Revert "(ore-stable) ALSA: hda - Apply ALC269 VAIO fix-up to all Sony
+    laptops with ALC269"
+  * Revert "(pre-stable) ALSA: HDA: Correctly apply position_fix quirks for
+    ATI and VIA controllers"
+  * Revert "ALSA: hda: Use LPIB for another mainboard"
+  * Revert "ALSA: hda: Use LPIB for ASUS M2V"
+  * Revert "ALSA: hda: Use LPIB for an ASUS device"
+  * Buglink Fixup for reverted unverified fixes
+
+  [ Ubuntu: 2.6.32-26.46 ]
+
+  * SAUCE: ALSA: HDA: Enable internal mic on Dell E6410 and Dell E6510
+    - See: #605047, #628961
+  * [Config] Added be2net, be2scsi to udebs
+    - See: #628776
+  * Revert "(pre-stable) drm/i915: add PANEL_UNLOCK_REGS definition"
+    - LP: #645444
+  * Revert "(pre-stable) drm/i915: make sure we shut off the panel in eDP
+    configs"
+    - LP: #645444
+  * Revert "(pre-stable) drm/i915: make sure eDP panel is turned on"
+    - LP: #645444
+  * Revert "(pre-stable) drm/radeon/kms: initialize set_surface_reg reg for
+    rs600 asic"
+    - LP: #645371
+  * Revert "drm/nouveau: Fix fbcon corruption with font width not divisible
+    by 8"
+    - LP: #663176
+  * mmc: fix all hangs related to mmc/sd card insert/removal during
+    suspend/resume
+    - LP: #477106
+  * mmc: build fix: mmc_pm_notify is only available with CONFIG_PM=y
+    - LP: #477106
+  * hwmon: (k8temp) Differentiate between AM2 and ASB1
+    - LP: #644694
+  * xen: handle events as edge-triggered
+    - LP: #644694
+  * xen: use percpu interrupts for IPIs and VIRQs
+    - LP: #644694
+  * ALSA: hda - Rename iMic to Int Mic on Lenovo NB0763
+    - LP: #605101, #644694
+  * sata_mv: fix broken DSM/TRIM support (v2)
+    - LP: #644694
+  * x86, tsc, sched: Recompute cyc2ns_offset's during resume from sleep
+    states
+    - LP: #644694
+  * PCI: MSI: Remove unsafe and unnecessary hardware access
+    - LP: #644694
+  * PCI: MSI: Restore read_msi_msg_desc(); add get_cached_msi_msg_desc()
+    - LP: #644694
+  * sched: kill migration thread in CPU_POST_DEAD instead of CPU_DEAD
+    - LP: #644694
+  * sched: revert stable c6fc81a sched: Fix a race between ttwu() and
+    migrate_task()
+    - LP: #644694
+  * staging: hv: Fix missing functions for net_device_ops
+    - LP: #644694
+  * staging: hv: Fixed bounce kmap problem by using correct index
+    - LP: #644694
+  * staging: hv: Fixed the value of the 64bit-hole inside ring buffer
+    - LP: #644694
+  * staging: hv: Increased storvsc ringbuffer and max_io_requests
+    - LP: #644694
+  * staging: hv: Fixed lockup problem with bounce_buffer scatter list
+    - LP: #644694
+  * fuse: flush background queue on connection close
+    - LP: #644694
+  * ath9k_hw: fix parsing of HT40 5 GHz CTLs
+    - LP: #644694
+  * ocfs2: Fix incorrect checksum validation error
+    - LP: #644694
+  * USB: ehci-ppc-of: problems in unwind
+    - LP: #644694
+  * USB: Fix kernel oops with g_ether and Windows
+    - LP: #644694
+  * USB: CP210x Add new device ID
+    - LP: #644694
+  * USB: cp210x: Add B&G H3000 link cable ID
+    - LP: #644694
+  * USB: ftdi_sio: Added custom PIDs for ChamSys products
+    - LP: #644694
+  * USB: serial: Extra device/vendor ID for mos7840 driver
+    - LP: #644694
+  * usb: serial: mos7840: Add USB ID to support the B&B Electronics
+    USOPTL4-2P.
+    - LP: #644694
+  * USB: mos7840: fix DMA buffers on stack and endianess bugs
+    - LP: #644694
+  * usb: serial: mos7840: Add USB IDs to support more B&B USB/RS485
+    converters.
+    - LP: #644694
+  * USB: Exposing second ACM channel as tty for Nokia S60 phones.
+    - LP: #644694
+  * USB: cdc-acm: add another device quirk
+    - LP: #644694
+  * USB: Expose vendor-specific ACM channel on Nokia 5230
+    - LP: #644694
+  * USB: cdc-acm: Adding second ACM channel support for various Nokia and
+    one Samsung phones
+    - LP: #644694
+  * USB: cdc-acm: Add pseudo modem without AT command capabilities
+    - LP: #644694
+  * USB: cdc-acm: Fixing crash when ACM probing interfaces with no endpoint
+    descriptors.
+    - LP: #644694
+  * ALSA: hda - Fix auto-parser of ALC269vb for HP pin NID 0x21
+    - LP: #644694
+  * ALSA: seq/oss - Fix double-free at error path of snd_seq_oss_open()
+    - LP: #644694
+  * sysfs: checking for NULL instead of ERR_PTR
+    - LP: #644694
+  * tun: Don't add sysfs attributes to devices without sysfs directories
+    - LP: #644694
+  * oprofile: fix crash when accessing freed task structs
+    - LP: #644694
+  * oprofile, x86: fix init_sysfs error handling
+    - LP: #644694
+  * oprofile, x86: fix init_sysfs() function stub
+    - LP: #644694
+  * HID: usbhid: initialize interface pointers early enough
+    - LP: #644694
+  * HID: fix suspend crash by moving initializations earlier
+    - LP: #644694
+  * libata: skip EH autopsy and recovery during suspend
+    - LP: #644694
+  * tracing: Fix a race in function profile
+    - LP: #644694
+  * tracing: Do not allow llseek to set_ftrace_filter
+    - LP: #644694
+  * tracing: t_start: reset FTRACE_ITER_HASH in case of seek/pread
+    - LP: #644694
+  * irda: off by one
+    - LP: #644694
+  * gcov: fix null-pointer dereference for certain module types
+    - LP: #644694
+  * tmio_mmc: don't clear unhandled pending interrupts
+    - LP: #644694
+  * mmc: fix the use of kunmap_atomic() in tmio_mmc.h
+    - LP: #644694
+  * bounce: call flush_dcache_page() after bounce_copy_vec()
+    - LP: #644694
+  * kernel/groups.c: fix integer overflow in groups_search
+    - LP: #644694
+  * binfmt_misc: fix binfmt_misc priority
+    - LP: #644694
+  * Input: i8042 - fix device removal on unload
+    - LP: #644694
+  * memory hotplug: fix next block calculation in is_removable
+    - LP: #644694
+  * perf: Initialize callchains roots's childen hits
+    - LP: #644694
+  * p54: fix tx feedback status flag check
+    - LP: #644694
+  * ath5k: check return value of ieee80211_get_tx_rate
+    - LP: #644694
+  * wireless extensions: fix kernel heap content leak
+    - LP: #644694
+  * x86, tsc: Fix a preemption leak in restore_sched_clock_state()
+    - LP: #644694
+  * sched: Protect task->cpus_allowed access in sched_getaffinity()
+    - LP: #644694
+  * sched: Protect sched_rr_get_param() access to task->sched_class
+    - LP: #644694
+  * sched: Consolidate select_task_rq() callers
+    - LP: #644694
+  * sched: Remove unused cpu_nr_migrations()
+    - LP: #644694
+  * sched: Remove rq->clock coupling from set_task_cpu()
+    - LP: #644694
+  * sched: Clean up ttwu() rq locking
+    - LP: #644694
+  * sched: Sanitize fork() handling
+    - LP: #644694
+  * sched: Remove forced2_migrations stats
+    - LP: #644694
+  * sched: Make wakeup side and atomic variants of completion API irq safe
+    - LP: #644694
+  * sched: Use rcu in sys_sched_getscheduler/sys_sched_getparam()
+    - LP: #644694
+  * sched: Use rcu in sched_get/set_affinity()
+    - LP: #644694
+  * sched: Use rcu in sched_get_rr_param()
+    - LP: #644694
+  * sched: Fix set_cpu_active() in cpu_down()
+    - LP: #644694
+  * sched: Use TASK_WAKING for fork wakups
+    - LP: #644694
+  * sched: Ensure set_task_cpu() is never called on blocked tasks
+    - LP: #644694
+  * sched: Make warning less noisy
+    - LP: #644694
+  * sched: Fix broken assertion
+    - LP: #644694
+  * sched: Fix sched_exec() balancing
+    - LP: #644694
+  * sched: Fix select_task_rq() vs hotplug issues
+    - LP: #644694
+  * sched: Add pre and post wakeup hooks
+    - LP: #644694
+  * sched: Remove the cfs_rq dependency from set_task_cpu()
+    - LP: #644694
+  * sched: Fix hotplug hang
+    - LP: #644694
+  * sched: Fix fork vs hotplug vs cpuset namespaces
+    - LP: #644694
+  * sched: Fix incorrect sanity check
+    - LP: #644694
+  * sched: Fix race between ttwu() and task_rq_lock()
+    - LP: #644694
+  * sched: Extend enqueue_task to allow head queueing
+    - LP: #644694
+  * sched: Implement head queueing for sched_rt
+    - LP: #644694
+  * sched: Queue a deboosted task to the head of the RT prio queue
+    - LP: #644694
+  * sched: set_cpus_allowed_ptr(): Don't use rq->migration_thread after
+    unlock
+    - LP: #644694
+  * sched: Kill the broken and deadlockable
+    cpuset_lock/cpuset_cpus_allowed_locked code
+    - LP: #644694
+  * sched: move_task_off_dead_cpu(): Take rq->lock around
+    select_fallback_rq()
+    - LP: #644694
+  * sched: move_task_off_dead_cpu(): Remove retry logic
+    - LP: #644694
+  * sched: sched_exec(): Remove the select_fallback_rq() logic
+    - LP: #644694
+  * sched: _cpu_down(): Don't play with current->cpus_allowed
+    - LP: #644694
+  * sched: Make select_fallback_rq() cpuset friendly
+    - LP: #644694
+  * sched: Fix TASK_WAKING vs fork deadlock
+    - LP: #644694
+  * sched: Optimize task_rq_lock()
+    - LP: #644694
+  * sched: Fix nr_uninterruptible count
+    - LP: #644694
+  * sched: Fix rq->clock synchronization when migrating tasks
+    - LP: #644694
+  * sched: Remove unnecessary RCU exclusion
+    - LP: #644694
+  * sched: apply RCU protection to wake_affine()
+    - LP: #644694
+  * sched: Cleanup select_task_rq_fair()
+    - LP: #644694
+  * sched: More generic WAKE_AFFINE vs select_idle_sibling()
+    - LP: #644694
+  * sched: Fix vmark regression on big machines
+    - LP: #644694
+  * sched: Fix select_idle_sibling()
+    - LP: #644694
+  * sched: Pre-compute cpumask_weight(sched_domain_span(sd))
+    - LP: #644694
+  * sched: Fix select_idle_sibling() logic in select_task_rq_fair()
+    - LP: #644694
+  * sched: cpuacct: Use bigger percpu counter batch values for stats
+    counters
+    - LP: #644694
+  * ALSA: hda - Handle missing NID 0x1b on ALC259 codec
+    - LP: #644694
+  * ALSA: hda - Handle pin NID 0x1a on ALC259/269
+    - LP: #644694
+  * arm: fix really nasty sigreturn bug
+    - LP: #644694
+  * hwmon: (f75375s) Shift control mode to the correct bit position
+    - LP: #644694
+  * hwmon: (f75375s) Do not overwrite values read from registers
+    - LP: #644694
+  * apm_power: Add missing break statement
+    - LP: #644694
+  * NFS: Fix a typo in nfs_sockaddr_match_ipaddr6
+    - LP: #644694
+  * SUNRPC: Fix race corrupting rpc upcall
+    - LP: #644694
+  * Linux 2.6.32.22
+    - LP: #644694
+  * drm/i915: don't access FW_BLC_SELF on 965G
+    - LP: #645444
+  * drm/i915: gen3 page flipping fixes
+    - LP: #645444
+  * drm/i915: don't queue flips during a flip pending event
+    - LP: #645444
+  * drm/i915: Hold the spinlock whilst resetting unpin_work along error
+    path
+    - LP: #645444
+  * drm/i915: handle shared framebuffers when flipping
+    - LP: #645444
+  * drm/i915: add PANEL_UNLOCK_REGS definition
+    - LP: #645444
+  * drm/i915: make sure eDP panel is turned on
+    - LP: #645444
+  * drm/i915: make sure we shut off the panel in eDP configs
+    - LP: #645444
+  * Linux 2.6.32.22+drm33.9
+    - LP: #645444
+  * drm/radeon/kms/igp: sideport is AMD only
+    - LP: #645371
+  * drm/radeon/kms: flush HDP cache on GART table updates.
+    - LP: #645371
+  * drm/radeon/kms/r7xx: add workaround for hw issue with HDP flush
+    - LP: #645371
+  * drm/i915: Check overlay stride errata for i830 and i845
+    - LP: #645371
+  * i915: fix ironlake edp panel setup (v4)
+    - LP: #645371
+  * drm/radeon/kms: add additional quirk for Acer rv620 laptop
+    - LP: #645371
+  * drm/i915: fixup pageflip ringbuffer commands for i8xx
+    - LP: #645371
+  * drm/i915: i8xx also doesn't like multiple oustanding pageflips
+    - LP: #645371
+  * drm/i915/edp: Flush the write before waiting for PLLs
+    - LP: #645371
+  * drm/radeon/kms: disable MSI on IGP chips
+    - LP: #645371
+  * drm/radeon/kms: don't enable MSIs on AGP boards
+    - LP: #645371
+  * drm/radeon/kms: fix typo in radeon_compute_pll_gain
+    - LP: #645371
+  * drm/radeon/kms/DCE3+: switch pads to ddc mode when going i2c
+    - LP: #645371
+  * drm/radeon/kms: fix sideport detection on newer rs880 boards
+    - LP: #645371
+  * drm/i915: Don't touch PORT_HOTPLUG_EN in intel_dp_detect()
+    - LP: #645371
+  * drm/i915: Kill dangerous pending-flip debugging
+    - LP: #645371
+  * drm/radeon/kms: release AGP bridge at suspend
+    - LP: #645371
+  * drm/radeon/kms: initialize set_surface_reg reg for rs600 asic
+    - LP: #645371
+  * drm/radeon/kms: fix a regression on r7xx AGP due to the HDP flush fix
+    - LP: #645371
+  * Linux 2.6.32.22+drm33.10
+    - LP: #645371
+  * USB: serial/mos*: prevent reading uninitialized stack memory
+    - LP: #649483
+  * sparc: Provide io{read,write}{16,32}be().
+    - LP: #649483
+  * gro: fix different skb headrooms
+    - LP: #649483
+  * gro: Re-fix different skb headrooms
+    - LP: #649483
+  * irda: Correctly clean up self->ias_obj on irda_bind() failure.
+    - LP: #649483
+  * tcp: select(writefds) don't hang up when a peer close connection
+    - LP: #649483
+  * tcp: Combat per-cpu skew in orphan tests.
+    - LP: #649483
+  * tcp: fix three tcp sysctls tuning
+    - LP: #649483
+  * bridge: Clear IPCB before possible entry into IP stack
+    - LP: #649483
+  * bridge: Clear INET control block of SKBs passed into ip_fragment().
+    - LP: #649483
+  * net: Fix oops from tcp_collapse() when using splice()
+    - LP: #649483
+  * rds: fix a leak of kernel memory
+    - LP: #649483
+  * tcp: Prevent overzealous packetization by SWS logic.
+    - LP: #649483
+  * UNIX: Do not loop forever at unix_autobind().
+    - LP: #649483
+  * r8169: fix random mdio_write failures
+    - LP: #649483
+  * r8169: fix mdio_read and update mdio_write according to hw specs
+    - LP: #649483
+  * sparc64: Get rid of indirect p1275 PROM call buffer.
+    - LP: #649483
+  * drivers/net/usb/hso.c: prevent reading uninitialized memory
+    - LP: #649483
+  * drivers/net/cxgb3/cxgb3_main.c: prevent reading uninitialized stack
+    memory
+    - LP: #649483
+  * drivers/net/eql.c: prevent reading uninitialized stack memory
+    - LP: #649483
+  * bonding: correctly process non-linear skbs
+    - LP: #649483
+  * Staging: vt6655: fix buffer overflow
+    - LP: #649483
+  * net/llc: make opt unsigned in llc_ui_setsockopt()
+    - LP: #649483
+  * pid: make setpgid() system call use RCU read-side critical section
+    - LP: #649483
+  * sched: Fix user time incorrectly accounted as system time on 32-bit
+    - LP: #649483
+  * oprofile: Add Support for Intel CPU Family 6 / Model 22 (Intel Celeron
+    540)
+    - LP: #649483
+  * char: Mark /dev/zero and /dev/kmem as not capable of writeback
+    - LP: #649483
+  * drivers/pci/intel-iommu.c: fix build with older gcc's
+    - LP: #649483
+  * drivers/video/sis/sis_main.c: prevent reading uninitialized stack
+    memory
+    - LP: #649483
+  * percpu: fix pcpu_last_unit_cpu
+    - LP: #649483
+  * aio: check for multiplication overflow in do_io_submit
+    - LP: #649483
+  * inotify: send IN_UNMOUNT events
+    - LP: #649483
+  * SCSI: mptsas: fix hangs caused by ATA pass-through
+    - LP: #649483
+  * ext4: Fix remaining racy updates of EXT4_I(inode)->i_flags
+    - LP: #649483
+  * IA64: fix siglock
+    - LP: #649483
+  * IA64: Optimize ticket spinlocks in fsys_rt_sigprocmask
+    - LP: #649483
+  * KEYS: Fix RCU no-lock warning in keyctl_session_to_parent()
+    - LP: #649483
+  * KEYS: Fix bug in keyctl_session_to_parent() if parent has no session
+    keyring
+    - LP: #649483
+  * xfs: prevent reading uninitialized stack memory
+    - LP: #649483
+  * drivers/video/via/ioctl.c: prevent reading uninitialized stack memory
+    - LP: #649483
+  * ACPI: disable _OSI(Windows 2009) on Asus K50IJ
+    - LP: #649483
+  * bnx2: Fix netpoll crash.
+    - LP: #649483
+  * bnx2: Fix hang during rmmod bnx2.
+    - LP: #649483
+  * AT91: change dma resource index
+    - LP: #649483
+  * cxgb3: fix hot plug removal crash
+    - LP: #649483
+  * mm: page allocator: drain per-cpu lists after direct reclaim allocation
+    fails
+    - LP: #649483
+  * mm: page allocator: calculate a better estimate of NR_FREE_PAGES when
+    memory is low and kswapd is awake
+    - LP: #649483
+  * mm: page allocator: update free page counters after pages are placed on
+    the free list
+    - LP: #649483
+  * guard page for stacks that grow upwards
+    - LP: #649483
+  * Fix unprotected access to task credentials in waitid()
+    - LP: #649483
+  * sctp: Do not reset the packet during sctp_packet_config().
+    - LP: #649483
+  * 3c503: Fix IRQ probing
+    - LP: #649483
+  * asix: fix setting mac address for AX88772
+    - LP: #649483
+  * dasd: use correct label location for diag fba disks
+    - LP: #649483
+  * clocksource: sh_tmu: compute mult and shift before registration
+    - LP: #649483
+  * gro: Fix bogus gso_size on the first fraglist entry
+    - LP: #649483
+  * hostap_pci: set dev->base_addr during probe
+    - LP: #649483
+  * inotify: fix inotify oneshot support
+    - LP: #649483
+  * Input: add compat support for sysfs and /proc capabilities output
+    - LP: #649483
+  * MIPS: Quit using undefined behavior of ADDU in 64-bit atomic
+    operations.
+    - LP: #649483
+  * MIPS: Set io_map_base for several PCI bridges lacking it
+    - LP: #649483
+  * MIPS: uasm: Add OR instruction.
+    - LP: #649483
+  * pata_pdc202xx_old: fix UDMA mode for Promise UDMA33 cards
+    - LP: #649483
+  * pata_pdc202xx_old: fix UDMA mode for PDC2026x chipsets
+    - LP: #649483
+  * MIPS: Sibyte: Fix M3 TLB exception handler workaround.
+    - LP: #649483
+  * sis-agp: Remove SIS 760, handled by amd64-agp
+    - LP: #649483
+  * alpha: Fix printk format errors
+    - LP: #649483
+  * x86: Add memory modify constraints to xchg() and cmpxchg()
+    - LP: #649483
+  * Linux 2.6.32.23
+    - LP: #649483
+  * (pre-stable) [SCSI] megaraid_sas: Add new megaraid SAS 2 controller
+    support to the driver
+    - LP: #546091
+  * (pre-stable) [SCSI] megaraid_sas: allocate the application cmds to sas2
+    controller
+    - LP: #546091
+  * Xen: fix typo in previous patch
+    - LP: #655456
+  * Linux 2.6.32.24
+    - LP: #655456
+  * (ore-stable) ALSA: hda - Apply ALC269 VAIO fix-up to all Sony laptops
+    with ALC269
+    - See: #546769, #598938, #637291, #642892, #648871, #655386
+  * (pre-stable) ALSA: HDA: Correctly apply position_fix quirks for ATI and
+    VIA controllers
+    - See: #465942, #580749, #587546
+  * (pre-stable) ACPI: enable repeated PCIEXP wakeup by clearing
+    PCIEXP_WAKE_STS on resume
+    - LP: #613381
+  * i915: return -EFAULT if copy_to_user fails
+    - LP: #663176
+  * i915_gem: return -EFAULT if copy_to_user fails
+    - LP: #663176
+  * drm/i915: Prevent double dpms on
+    - LP: #663176
+  * drm: Only decouple the old_fb from the crtc is we call mode_set*
+    - LP: #663176
+  * drm/radeon/kms: fix potential segfault in r600_ioctl_wait_idle
+    - LP: #663176
+  * drm/i915: Unset cursor if out-of-bounds upon mode change (v4)
+    - LP: #586325, #663176
+  * drm/i915: disable FBC when more than one pipe is active
+    - LP: #663176
+  * drm/radeon/kms: fix macbookpro connector quirk
+    - LP: #663176
+  * drm/nouveau: use ALIGN instead of open coding it
+    - LP: #663176
+  * drm/nouveau: Fix fbcon corruption with font width not divisible by 8
+    - LP: #663176
+  * drm/i915,agp/intel: Add second set of PCI-IDs for B43
+    - LP: #640214, #663176
+  * Linux 2.6.32.24+drm33.11
+    - LP: #663176
+
+  [ Ubuntu: 2.6.32-25.45 ]
+
+  * v4l: disable dangerous buggy compat function
+    - CVE-2010-2963
+  * Local privilege escalation vulnerability in RDS sockets
+    - CVE-2010-3904
+  * mm: (pre-stable) Move vma_stack_continue into mm.h
+    - LP: #646114
+  * net sched: fix some kernel memory leaks
+    - CVE-2010-2942
+  * irda: Correctly clean up self->ias_obj on irda_bind() failure.
+    - CVE-2010-2954
+  * wireless extensions: fix kernel heap content leak
+    - CVE-2010-2955
+  * KEYS: Fix RCU no-lock warning in keyctl_session_to_parent()
+    - CVE-2010-2960
+  * KEYS: Fix bug in keyctl_session_to_parent() if parent has no session
+    keyring
+    - CVE-2010-2960
+  * aio: check for multiplication overflow in do_io_submit
+    - CVE-2010-3067
+  * xfs: prevent reading uninitialized stack memory
+    - CVE-2010-3078
+  * ALSA: seq/oss - Fix double-free at error path of snd_seq_oss_open()
+    - CVE-2010-3080
+  * niu: Fix kernel buffer overflow for ETHTOOL_GRXCLSRLALL
+    - CVE-2010-3084
+  * rose: Fix signedness issues wrt. digi count.
+    - CVE-2010-3310
+  * sctp: Do not reset the packet during sctp_packet_config().
+    - CVE-2010-3432
+  * Fix pktcdvd ioctl dev_minor range check
+    - CVE-2010-3437
+  * ALSA: prevent heap corruption in snd_ctl_new()
+    - CVE-2010-3442
+  * net sched: fix kernel leak in act_police
+    - CVE-2010-3477
+  * Fix out-of-bounds reading in sctp_asoc_get_hmac()
+    - CVE-2010-3705
+  * ocfs2: Don't walk off the end of fast symlinks.
+    - CVE-2010-NNN2
+
+ -- Brad Figg <brad.figg@canonical.com>  Wed, 01 Dec 2010 10:41:52 -0800
+
+linux-mvl-dove (2.6.32-212.28) lucid-proposed; urgency=low
+
+  [ Eric Miao ]
+
+  * Sync config with LSP 5.3.6
+    - LP: #677498
+
+  [ Upstream Kernel Changes ]
+
+  * IDT clock: Clear all output in default
+  * idt clock: add sysfs files for accessing registers
+  * cs42l51 codec: provide back the set_bias_level
+  * Force return stack off
+  * bmm: export bmm alloc memory to kernel
+  * bmm: fix module reinset get physical address 0 issue
+  * bmm: support highmem
+  * fix potential bug in coverity report
+  * bmm: mutex replace spin_lock
+  * NAND: add support for Samsung 2G devices
+  * sdio: rework cis tuple parsing
+  * sdio: fix reference counting in sdio_remove_func()
+  * sdio: initialise SDIO functions and update card->sdio_funcs in lockstep
+  * mmc: allow for MMC v4.4
+  * sdio: add quirk to clamp byte mode transfer
+  * sdio: introduce API for special power management features
+  * sdio: don't use CMD[357] as part of a powered SDIO resume
+  * sdio: kick the interrupt thread upon a resume
+  * sdio: put active devices into 1-bit mode during suspend
+  * sdio: recognize io card without powercycle
+  * mmc: fix incorrect interpretation of card type bits
+  * mmc: sd: clean up redundant memset
+  * mmc: remove the "state" argument to mmc_suspend_host()
+  * sdio: add new function for RAW (Read after Write) operation
+  * mmc: fix all hangs related to mmc/sd card insert/removal during
+    suspend/resume
+  * mmc: build fix: mmc_pm_notify is only available with CONFIG_PM=y
+  * pmem: Add cache flush ioctl for pmem buffers
+  * dove: enable lcd0 by default
+  * Dove: detect 1GHz clocks
+  * Fix rt5611_ts touch screen driver to solve touch insenstive issue, that
+    occur in a special timing condition, driver will not be easy to sample
+    X or Y but Busy instead.
+  * remove rt5611_ts.c debug message
+  * update dove_android_defconfig based on dove_defconfig
+  * vmeta uio driver support multi-instance decoding
+  * update vmeta uio driver version to build-004
+  * vmeta uio driver add suspend unset control func
+  * update dove_android_defconfig
+  * usb gadget: Fix mismatch on commit
+    2c7c4829ac40fd18852a0c8bf0521a30a2ef2098 Author: Mike Lockwood
+    <lockwood@android.com> Date: Tue Dec 2 22:01:33 2008 -0500
+  * drivers: usb: gadget: Add helper function for installing ACM gadget
+    function.
+  * USB: gadget: android: android USB gadget improvements:
+  * drivers: usb: gadget: handle NULL descriptors in composite config_buf
+  * USB: composite: Fix USB WHQL Certification Issues
+  * USB: android gadget: mass storage: Fix format issue for Vista Host
+  * USB: composite: Add flag to usb_function to hide its interface during
+    enumeration
+  * USB: composite: Allow configurations to handle unhandled setup requests
+  * USB: gadget: android: android USB gadget improvements:
+  * USB: composite: Add class driver for enabling and disabling USB
+    functions.
+  * USB: gadget: Disable RNDIS function by default if
+    CONFIG_USB_ANDROID_RNDIS is set
+  * USB: composite: Compute interface numbers correctly when functions are
+    hidden.
+  * USB: gadget: android: Fix special case for RNDIS ethernet function
+  * Add USB_ANDROID_RNDIS_WCEIS option.
+  * USB: gadget: android: Disable UMS when RNDIS ethernet is active.
+  * USB: gadget: composite: Don't call set_alt() on functions that are
+    hidden.
+  * USB: gadget: composite: Don't increment interface number for alt
+    settings.
+  * USB: gadget: android: check for null _android_dev in
+    android_register_function()
+  * USB: gadget: composite: Add userspace notifications for USB state
+    changes
+  * USB: gadget: composite: Move switch_set_state calls to a work queue
+  * USB: composite: Add usb_composite_force_reset utility to force
+    enumeration
+  * dove android : support adb function
+  * dove: disable write coalescing
+
+ -- Eric Miao <eric.miao@canonical.com>  Wed, 10 Nov 2010 00:39:56 +0800
+
+linux-mvl-dove (2.6.32-211.27) lucid-proposed; urgency=low
+
+  [ Brad Figg ]
+
+  * Rebased to 2.6.32-25.44
+
+  [ Eric Miao ]
+
+  * Sync config with LSP 5.3.4
+    - LP: #633862
+
+  [ Upstream Kernel Changes ]
+
+  * idt: add platform data to set the clocks configuration
+  * dove: provide idt platform data to set the clock's configuration
+    - LP: #633862
+  * dove lcd: make lcd's clock setting via cmdline to be applicable for all
+    boards.
+    - LP: #633862
+  * sound: update the RT655 codec kcontrols
+    - LP: #633862
+  * dove: disable the KG2 display driver
+    - LP: #633862
+  * dovefb: add board option for disabling the edid polling
+    - LP: #633862
+  * Update new dummy EDID data to support more VESA standard timings.
+    - LP: #633862
+  * giga hal: set phy address to 1
+    - LP: #633862
+  * dove: tune pcei phy to pass electrical testing
+    - LP: #633862
+  * i2c-mv64xxx: fix I2C wait event timeout issue
+    - LP: #622214
+  * dove: enable USB gadget file storage testing option
+    - LP: #633862
+  * dove: support using gpio-i2c driver for the i2c bus of the VGA
+    - LP: #633862
+  * LCD dovefb: Support extension dummy EDID. 2. Add more video mode into
+    extension EDID.
+    - LP: #633862
+  * LCD dovefb: move the clock setting part in dovefb_gfx.c to clock.c
+    - LP: #633862
+  * LCD dovefb: refine configure ref clk and lcd internal divider flow and
+    give detailed comments.
+    - LP: #633862
+  * LCD dovefb: Refine data structure for reference clock selection
+    - LP: #633862
+  * LCD dovefb: Separate accurate and inaccurate mode clock by add a new
+    clk structure.
+    - LP: #633862
+  * 1. default set lcd0 uses ext refclk0 and lcd1 uses internal refclk. 2.
+    auto turn on accurate mode.
+    - LP: #633862
+  * Refine LCD refclk bootargs comments and update dove_defconfig.
+    - LP: #633862
+  * Refine the bootargs usage mechanism and update all board setup files.
+    - LP: #633862
+  * dove: update the LCD internal clock accurate mode setting
+    - LP: #633862
+  * sound: add Record Gain Capture Switch to the rt655 codec
+    - LP: #633862
+  * fix lcd backward compatibility for clk source selection
+    - LP: #633862
+  * Fix invalidate I$ all
+    - LP: #633862
+  * Add CPU errata 4574 and 4731 SWFIX
+    - LP: #633862
+  * Add missed isb and dsb
+    - LP: #633862
+  * Marvell CPU errata 4315 S/W FIX
+    - LP: #633862
+  * dove: enable CPU (PJ4) work arounds 4574,4731,4315
+    - LP: #633862
+  * Fix code logic of function, is_clksrc_pll()
+    - LP: #633862
+  * CS42l51 codec: unmute codec on system resume
+    - LP: #633862
+  * LCD dovefb: set edid data when edid paramete disabled.
+    - LP: #633862
+  * dove: use DOVE_PCIE0/1_IO_BUS_BASE for PCI bus addresses
+    - LP: #633862
+  * dove: provide phy address for old dove db boards
+    - LP: #633862
+  * sound orion i2s: clear pause, spdif and i2s mute fields on playback
+    - LP: #633862
+  * dove: sync dove_defconfig file with ac97 codec changes
+    - LP: #633862
+  * USB gadget: allow the USB_GADGET_VBUS_DRAW range to be 0
+  * dove: set the USB_GADGET_VBUS_DRAW to 0
+  * usb dove: update usb phy registers
+  * dove: use '-1' as initial value for the previously used I2C port ID
+    - LP: #618493
+  * mvl-dove: statically generate mv_hal_drivers makefiles
+    - LP: #572701
+  * dove-rd-avng: LCD0 should use extclk#1, and LCD1 uses internal refclk.
+    - LP: #643505
+  * dove-rd-avng: Add IDT support if chip is Dove A0 or above
+  * dove: fix mv hal pmu Makefile include paths
+    - LP: #572701
+  * cmd line partitions: use 64 bit variables to detect partitions/offsets
+    larger than 4G.
+  * USB dove: enable USB voltage fix in device mode
+  * v4l cafe_ccic: configure the sensor on resume when doing steaming
+  * cafe camera: fix data type of saturation field in the ov7670 sensor
+    driver
+  * ov7670: fix bug in resolving brightness value
+  * ov7670: tune QVGA paramters to eliminate green line on left side
+  * GC600: sync driver to commit 0badbab7e3f62df72a27bf8d8f1b04976ab1c299
+    - LP: #643505
+
+  [ Ubuntu: 2.6.32-25.44 ]
+
+  * SAUCE: (no-up) Modularize vesafb -- fix initialization
+    - LP: #611471
+  * Revert "SAUCE: sync before umount to reduce time taken by ext4 umount"
+    - LP: #543617, #585092
+  * Revert "SAUCE: tulip: Let dmfe handle davicom on non-sparc"
+    - LP: #607824
+  * [Config] Added ums-cypress to udeb
+    - LP: #576066
+  * Revert "PCI quirk: Disable MSI on VIA K8T890 systems"
+    - LP: #607824
+  * Revert "PCI quirks: disable msi on AMD rs4xx internal gfx bridges"
+    - LP: #607824
+  * Revert "(pre-stable) Input: psmouse - reset all types of mice before
+    reconnecting"
+    - LP: #607824
+  * Revert "jbd: jbd-debug and jbd2-debug should be writable"
+    - LP: #607824
+  * Revert "ext4: Make fsync sync new parent directories in no-journal
+    mode"
+    - LP: #615548
+  * Revert "ext4: Fix compat EXT4_IOC_ADD_GROUP"
+    - LP: #615548
+  * Revert "ext4: Conditionally define compat ioctl numbers"
+    - LP: #615548
+  * Revert "ext4: restart ext4_ext_remove_space() after transaction
+    restart"
+    - LP: #615548
+  * Revert "ext4: Clear the EXT4_EOFBLOCKS_FL flag only when warranted"
+    - LP: #615548
+  * Revert "ext4: Avoid crashing on NULL ptr dereference on a filesystem
+    error"
+    - LP: #615548
+  * Revert "ext4: Use bitops to read/modify i_flags in struct
+    ext4_inode_info"
+    - LP: #615548
+  * Revert "ext4: Show journal_checksum option"
+    - LP: #615548
+  * Revert "ext4: check for a good block group before loading buddy pages"
+    - LP: #615548
+  * Revert "ext4: Prevent creation of files larger than RLIMIT_FSIZE using
+    fallocate"
+    - LP: #615548
+  * Revert "ext4: Remove extraneous newlines in ext4_msg() calls"
+    - LP: #615548
+  * Revert "ext4: init statistics after journal recovery"
+    - LP: #615548
+  * Revert "ext4: clean up inode bitmaps manipulation in ext4_free_inode"
+    - LP: #615548
+  * Revert "ext4: Do not zero out uninitialized extents beyond i_size"
+    - LP: #615548
+  * Revert "ext4: don't scan/accumulate more pages than mballoc will
+    allocate"
+    - LP: #615548
+  * Revert "ext4: stop issuing discards if not supported by device"
+    - LP: #615548
+  * Revert "ext4: check s_log_groups_per_flex in online resize code"
+    - LP: #615548
+  * Revert "ext4: fix quota accounting in case of fallocate"
+    - LP: #615548
+  * Revert "ext4: allow defrag (EXT4_IOC_MOVE_EXT) in 32bit compat mode"
+    - LP: #615548
+  * Revert "ext4: rename ext4_mb_release_desc() to ext4_mb_unload_buddy()"
+    - LP: #615548
+  * Revert "ext4: Remove unnecessary call to ext4_get_group_desc() in
+    mballoc"
+    - LP: #615548
+  * Revert "ext4: fix memory leaks in error path handling of
+    ext4_ext_zeroout()"
+    - LP: #615548
+  * Revert "ext4: check missed return value in ext4_sync_file()"
+    - LP: #615548
+  * Revert "ext4: Issue the discard operation *before* releasing the blocks
+    to be reused"
+    - LP: #615548
+  * Revert "ext4: Fix buffer head leaks after calls to
+    ext4_get_inode_loc()"
+    - LP: #615548
+  * Revert "ext4: Fix possible lost inode write in no journal mode"
+    - LP: #615548
+  * Revert "ext4: Fixed inode allocator to correctly track a flex_bg's
+    used_dirs"
+    - LP: #615548
+  * Revert "ext4: Fix estimate of # of blocks needed to write
+    indirect-mapped files"
+    - LP: #615548
+  * Revert "ext4: Code cleanup for EXT4_IOC_MOVE_EXT ioctl"
+    - LP: #615548
+  * Revert "ext4: Fix the NULL reference in double_down_write_data_sem()"
+    - LP: #615548
+  * Revert "ext4: Fix insertion point of extent in
+    mext_insert_across_blocks()"
+    - LP: #615548
+  * Revert "ext4: make "offset" consistent in ext4_check_dir_entry()"
+    - LP: #615548
+  * Revert "ext4: Handle non empty on-disk orphan link"
+    - LP: #615548
+  * Revert "ext4: explicitly remove inode from orphan list after failed
+    direct io"
+    - LP: #615548
+  * Revert "ext4: fix error handling in migrate"
+    - LP: #615548
+  * Revert "ext4: Fix fencepost error in chosing choosing group vs file
+    preallocation."
+    - LP: #615548
+  * Revert "ext4: Add flag to files with blocks intentionally past EOF"
+    - LP: #615548
+  * Revert "ext4: Fix BUG_ON at fs/buffer.c:652 in no journal mode"
+    - LP: #615548
+  * Revert "ext4: Use bitops to read/modify EXT4_I(inode)->i_state"
+    - LP: #615548
+  * Revert "ext4: Drop EXT4_GET_BLOCKS_UPDATE_RESERVE_SPACE flag"
+    - LP: #615548
+  * Revert "ext4: Fix quota accounting error with fallocate"
+    - LP: #615548
+  * Revert "ext4: Handle -EDQUOT error on write"
+    - LP: #615548
+  * Revert "ext4: Calculate metadata requirements more accurately"
+    - LP: #615548
+  * Revert "ext4: Fix accounting of reserved metadata blocks"
+    - LP: #615548
+  * Revert "ext4: Patch up how we claim metadata blocks for quota purposes"
+    - LP: #615548
+  * Revert "ext4: Ensure zeroout blocks have no dirty metadata"
+    - LP: #615548
+  * Revert "ext4: return correct wbc.nr_to_write in ext4_da_writepages"
+    - LP: #615548
+  * Revert "ext4: Eliminate potential double free on error path"
+    - LP: #615548
+  * Revert "ext4, jbd2: Add barriers for file systems with exernal
+    journals"
+    - LP: #615548
+  * Revert "ext4: replace BUG() with return -EIO in ext4_ext_get_blocks"
+    - LP: #615548
+  * Revert "ext4: Fix potential quota deadlock"
+    - LP: #615548
+  * Revert "ext4: don't return to userspace after freezing the fs with a
+    mutex held"
+    - LP: #615548
+  * ixgbe: Fix return of invalid txq
+    - LP: #607824
+  * oprofile/x86: fix uninitialized counter usage during cpu hotplug
+    - LP: #607824
+  * oprofile: remove double ring buffering
+    - LP: #607824
+  * cpumask: fix compat getaffinity
+    - LP: #607824
+  * NFSD: don't report compiled-out versions as present
+    - LP: #607824
+  * sata_nv: use ata_pci_sff_activate_host() instead of ata_host_activate()
+    - LP: #607824
+  * ARCNET: Limit com20020 PCI ID matches for SOHARD cards
+    - LP: #607824
+  * rtl8180: fix tx status reporting
+    - LP: #607824
+  * Staging: add Add Sitecom WL-349 to rtl8192su
+    - LP: #607824
+  * staging: vt6655: Fix kernel BUG on driver wpa initialization
+    - LP: #607824
+  * Fix racy use of anon_inode_getfd() in perf_event.c
+    - LP: #607824
+  * posix_timer: Fix error path in timer_create
+    - LP: #607824
+  * libata: disable ATAPI AN by default
+    - LP: #607824
+  * libata: don't flush dcache on slab pages
+    - LP: #607824
+  * mutex: Fix optimistic spinning vs. BKL
+    - LP: #607824
+  * ALSA: hda: Fix model quirk for Dell M1730
+    - LP: #576160, #607824
+  * ALSA: hda: Use LPIB for Toshiba A100-259
+    - LP: #549560, #607824
+  * ALSA: hda: Use LPIB for Acer Aspire 5110
+    - LP: #583983, #607824
+  * ALSA: hda: Use LPIB for Sony VPCS11V9E
+    - LP: #586347, #607824
+  * ALSA: hda: Use LPIB for a Shuttle device
+    - LP: #551949, #607824
+  * ACPI: video: fix acpi_backlight=video
+    - LP: #573120, #607824
+  * V4L/DVB: gspca - stv06xx: Remove the 046d:08da from the stv06xx driver
+    - LP: #607824
+  * HID: Add the GYR4101US USB ID to hid-gyration
+    - LP: #607824
+  * ar9170usb: add a couple more USB IDs
+    - LP: #607824
+  * ar9170usb: fix panic triggered by undersized rxstream buffer
+    - LP: #607824
+  * USB: visor: fix memory leak
+    - LP: #607824
+  * USB: CP210x New Device IDs 11 New device IDs
+    - LP: #607824
+  * USB: kobil: fix memory leak
+    - LP: #607824
+  * USB: option: add PID for ZTE product
+    - LP: #607824
+  * USB: option.c: Add Pirelli VID/PID and indicate Pirelli's modem
+    interface is 0xff
+    - LP: #607824
+  * USB: serial: option: add cinterion device id
+    - LP: #607824
+  * USB: option.c: OLIVETTI OLICARD100 support
+    - LP: #607824
+  * USB: ir-usb: fix double free
+    - LP: #607824
+  * USB: kl5usb105: fix memory leak
+    - LP: #607824
+  * USB: mxc: gadget: Fix bitfield for calculating maximum packet size
+    - LP: #607824
+  * USB: unusual-dev: Add bad sense flag for Appotech ax203 based picture
+    frames
+    - LP: #607824
+  * USB: EHCI: clear PHCD before resuming
+    - LP: #607824
+  * USB: xhci: Fix issue with set interface after stall.
+    - LP: #607824
+  * USB: xhci: Fix check for room on the ring.
+    - LP: #607824
+  * USB: xHCI: Fix wrong usage of macro TRB_TYPE
+    - LP: #607824
+  * mac80211: give warning if building w/out rate ctrl algorithm
+    - LP: #607824
+  * mac80211: Fix robust management frame handling (MFP)
+    - LP: #607824
+  * mac80211: fix rts threshold check
+    - LP: #607824
+  * drivers/base/cpu.c: fix the output from /sys/devices/system/cpu/offline
+    - LP: #607824
+  * can: Fix SJA1000 command register writes on SMP systems
+    - LP: #607824
+  * PCI quirk: Disable MSI on VIA K8T890 systems
+    - LP: #607824
+  * PCI quirks: disable msi on AMD rs4xx internal gfx bridges
+    - LP: #607824
+  * PCI: Disable MSI for MCP55 on P5N32-E SLI
+    - LP: #607824
+  * virtio_net: Make delayed refill more reliable
+    - LP: #607824
+  * mm: hugetlb: fix clear_huge_page()
+    - LP: #607824
+  * powerpc: Fix handling of strncmp with zero len
+    - LP: #607824
+  * powerpc/pseries: Only call start-cpu when a CPU is stopped
+    - LP: #607824
+  * powerpc/pseries: Make query_cpu_stopped callable outside hotplug cpu
+    - LP: #607824
+  * powerpc/oprofile: fix potential buffer overrun in op_model_cell.c
+    - LP: #607824
+  * writeback: disable periodic old data writeback for
+    !dirty_writeback_centisecs
+    - LP: #607824
+  * md/raid1: fix counting of write targets.
+    - LP: #607824
+  * md: Fix read balancing in RAID1 and RAID10 on drives > 2TB
+    - LP: #607824
+  * md: set mddev readonly flag on blkdev BLKROSET ioctl
+    - LP: #607824
+  * x86/amd-iommu: Fix suspend/resume with IOMMU
+    - LP: #607824
+  * exofs: confusion between kmap() and kmap_atomic() api
+    - LP: #607824
+  * mn10300: set ARCH_KMALLOC_MINALIGN
+    - LP: #607824
+  * m68k: set ARCH_KMALLOC_MINALIGN
+    - LP: #607824
+  * rtc-cmos: do dev_set_drvdata() earlier in the initialization
+    - LP: #607824
+  * rtc: s3c: initialize driver data before using it
+    - LP: #607824
+  * frv: set ARCH_KMALLOC_MINALIGN
+    - LP: #607824
+  * xtensa: set ARCH_KMALLOC_MINALIGN
+    - LP: #607824
+  * Blackfin: set ARCH_KMALLOC_MINALIGN
+    - LP: #607824
+  * tmpfs: insert tmpfs cache pages to inactive list at first
+    - LP: #607824
+  * mlx4_core: Fix possible chunk sg list overflow in mlx4_alloc_icm()
+    - LP: #607824
+  * ARM: 6166/1: Proper prefetch abort handling on pre-ARMv6
+    - LP: #607824
+  * ARM: 6164/1: Add kto and kfrom to input operands list.
+    - LP: #607824
+  * ARM: 6146/1: sa1111: Prevent deadlock in resume path
+    - LP: #607824
+  * ARM: 6144/1: TCM memory bug freeing bug
+    - LP: #607824
+  * ARM: VFP: Fix vfp_put_double() for d16-d31
+    - LP: #607824
+  * ASoC: Fix dB scales for WM835x
+    - LP: #607824
+  * ASoC: Fix dB scales for WM8400
+    - LP: #607824
+  * ASoC: Fix dB scales for WM8990
+    - LP: #607824
+  * hwmon: (ltc4245) Read only one GPIO pin
+    - LP: #607824
+  * signals: check_kill_permission(): don't check creds if
+    same_thread_group()
+    - LP: #607824
+  * do_generic_file_read: clear page errors when issuing a fresh read of
+    the page
+    - LP: #607824
+  * ipmi: handle run_to_completion properly in deliver_recv_msg()
+    - LP: #607824
+  * x86, setup: Phoenix BIOS fixup is needed on Dell Inspiron Mini 1012
+    - LP: #607824
+  * xen: ensure timer tick is resumed even on CPU driving the resume
+    - LP: #607824
+  * xen: avoid allocation causing potential swap activity on the resume
+    path
+    - LP: #607824
+  * ALSA: hda: Use LPIB for an ASUS device
+    - LP: #465942, #607824
+  * ALSA: hda: Use mb31 quirk for an iMac model
+    - LP: #542550, #607824
+  * ALSA: hda: Use LPIB for another mainboard
+    - LP: #580749, #607824
+  * ALSA: hda: Use LPIB for ASUS M2V
+    - LP: #587546, #607824
+  * Staging: comedi - correct parameter gainlkup for DAQCard-6024E in
+    driver ni_mio_cs.c
+    - LP: #607824
+  * clocksource: sh_cmt: compute mult and shift before registration
+    - LP: #607824
+  * ath5k: retain promiscuous setting
+    - LP: #607824
+  * ahci: add pci quirk for JMB362
+    - LP: #607824
+  * firewire: core: check for 1394a compliant IRM, fix inaccessibility of
+    Sony camcorder
+    - LP: #607824
+  * perf_events: Fix resource leak in x86 __hw_perf_event_init()
+    - LP: #607824
+  * sata_nv: don't diddle with nIEN on mcp55
+    - LP: #607824
+  * sata_via: magic vt6421 fix for transmission problems w/ WD drives
+    - LP: #422994, #607824
+  * USB: mos7840: fix null-pointer dereference
+    - LP: #607824
+  * USB: xhci: Wait for host to start running.
+    - LP: #607824
+  * USB: xhci: Wait for controller to be ready after reset.
+    - LP: #607824
+  * USB: ftdi_sio: fix DTR/RTS line modes
+    - LP: #607824
+  * USB: cdc-acm: fix resource reclaim in error path of acm_probe
+    - LP: #607824
+  * p54usb: Add device ID for Dell WLA3310 USB
+    - LP: #607824
+  * atl1e: Allow TX checksum offload and TSO to be disabled and reenabled
+    - LP: #607824
+  * via-velocity: Give RX descriptors to the NIC later on open or MTU
+    change
+    - LP: #607824
+  * dmfe/tulip: Let dmfe handle DM910x except for SPARC on-board chips
+    - LP: #607824
+  * Documentation/3c509: document ethtool support
+    - LP: #607824
+  * wireless: report reasonable bitrate for MCS rates through wext
+    - LP: #607824
+  * ath9k: add support for 802.11n bonded out AR2427
+    - LP: #607824
+  * wrong type for 'magic' argument in simple_fill_super()
+    - LP: #607824
+  * iwlwifi: check for aggregation frame and queue
+    - LP: #607824
+  * iwlwifi: recalculate average tpt if not current
+    - LP: #607824
+  * iwlwifi: update supported PCI_ID list for 5xx0 series
+    - LP: #607824
+  * wl1251: fix a memory leak in probe
+    - LP: #607824
+  * vfs: add NOFOLLOW flag to umount(2)
+    - LP: #607824
+  * l2tp: Fix oops in pppol2tp_xmit
+    - LP: #607824
+  * ucc_geth: Fix empty TX queue processing
+    - LP: #607824
+  * ucc_geth: Fix netdev watchdog triggering on link changes
+    - LP: #607824
+  * ucc_geth: Fix full TX queue processing
+    - LP: #607824
+  * Input: psmouse - reset all types of mice before reconnecting
+    - LP: #607824
+  * KVM: s390: Fix possible memory leak of in kvm_arch_vcpu_create()
+    - LP: #607824
+  * KVM: PPC: Do not create debugfs if fail to create vcpu
+    - LP: #607824
+  * x86, paravirt: Add a global synchronization point for pvclock
+    - LP: #607824
+  * KVM: Don't allow lmsw to clear cr0.pe
+    - LP: #607824
+  * KVM: x86: Check LMA bit before set_efer
+    - LP: #607824
+  * KVM: MMU: Segregate shadow pages with different cr0.wp
+    - LP: #607824
+  * KVM: VMX: enable VMXON check with SMX enabled (Intel TXT)
+    - LP: #607824
+  * KVM: MMU: Don't read pdptrs with mmu spinlock held in mmu_alloc_roots
+    - LP: #607824
+  * KVM: Fix wallclock version writing race
+    - LP: #607824
+  * KVM: x86: Add missing locking to arch specific vcpu ioctls
+    - LP: #607824
+  * KVM: x86: Inject #GP with the right rip on efer writes
+    - LP: #607824
+  * jbd: jbd-debug and jbd2-debug should be writable
+    - LP: #607824
+  * parisc: clear floating point exception flag on SIGFPE signal
+    - LP: #607824
+  * dm snapshot: simplify sector_to_chunk expression
+    - LP: #607824
+  * KEYS: Return more accurate error codes
+    - LP: #607824
+  * qla2xxx: Disable MSI on qla24xx chips other than QLA2432.
+    - LP: #607824
+  * Linux 2.6.32.16
+    - LP: #607824
+  * drm/i915: Fix 82854 PCI ID, and treat it like other 85X
+    - LP: #607824
+  * drm/i915: Reject bind_to_gtt() early if object > aperture
+    - LP: #607824
+  * drm/edid: Fix 1024x768@85Hz
+    - LP: #607824
+  * drm/radeon/kms: reset ddc_bus in object header parsing
+    - LP: #607824
+  * drm/radeon/kms/atom: fix typo in LVDS panel info parsing
+    - LP: #607824
+  * drm/radeon: r100/r200 ums: block ability for userspace app to trash 0
+    page and beyond
+    - LP: #607824
+  * drm/radeon: fix the r100/r200 ums block 0 page fix
+    - LP: #607824
+  * drm/i915: Rebind bo if currently bound with incorrect alignment.
+    - LP: #607824
+  * Linux 2.6.32.16+drm33.6
+    - LP: #607824
+  * virtio-pci: disable msi at startup
+    - LP: #615548
+  * hwmon: (k8temp) Bypass core swapping on single-core processors
+    - LP: #615548
+  * hwmon: (k8temp) Fix temperature reporting for ASB1 processor revisions
+    - LP: #615548
+  * hwmon: (coretemp) Properly label the sensors
+    - LP: #615548
+  * hwmon: (coretemp) Skip duplicate CPU entries
+    - LP: #615548
+  * hwmon: (it87) Fix in7 on IT8720F
+    - LP: #615548
+  * cifs: remove bogus first_time check in NTLMv2 session setup code
+    - LP: #615548
+  * cifs: don't attempt busy-file rename unless it's in same directory
+    - LP: #615548
+  * CIFS: Fix a malicious redirect problem in the DNS lookup code
+    - LP: #615548
+  * ALSA: hda - Add Macbook 5,2 quirk
+    - LP: #463178, #615548
+  * cpmac: do not leak struct net_device on phy_connect errors
+    - LP: #615548
+  * sky2: enable rx/tx in sky2_phy_reinit()
+    - LP: #615548
+  * sparc: Fix use of uid16_t and gid16_t in asm/stat.h
+    - LP: #615548
+  * math-emu: correct test for downshifting fraction in _FP_FROM_INT()
+    - LP: #615548
+  * NFSv4: Fix an embarassing typo in encode_attrs()
+    - LP: #615548
+  * NFSv4: Ensure that /proc/self/mountinfo displays the minor version
+    number
+    - LP: #615548
+  * SUNRPC: Fix a re-entrancy bug in xs_tcp_read_calldir()
+    - LP: #615548
+  * ath5k: drop warning on jumbo frames
+    - LP: #615548
+  * ath9k: re-enable ps by default for new single chip families
+    - LP: #615548
+  * ath9k: Avoid corrupt frames being forwarded to mac80211.
+    - LP: #615548
+  * hostap: Protect against initialization interrupt
+    - LP: #615548
+  * TPM: ReadPubEK output struct fix
+    - LP: #615548
+  * fb: fix colliding defines for fb flags.
+    - LP: #615548
+  * iwlwifi: cancel scan watchdog in iwl_bg_abort_scan
+    - LP: #615548
+  * mac80211: do not wip out old supported rates
+    - LP: #615548
+  * mac80211: Handle mesh action frames in ieee80211_rx_h_action
+    - LP: #615548
+  * Btrfs: fix checks in BTRFS_IOC_CLONE_RANGE
+    - LP: #615548
+  * p54pci: add Symbol AP-300 minipci adapters pciid
+    - LP: #615548
+  * dynamic debug: move ddebug_remove_module() down into free_module()
+    - LP: #615548
+  * tpm_tis: fix subsequent suspend failures
+    - LP: #615548
+  * ipvs: Add missing locking during connection table hashing and unhashing
+    - LP: #615548
+  * netfilter: ip6t_REJECT: fix a dst leak in ipv6 REJECT
+    - LP: #615548
+  * SCSI: aacraid: Eliminate use after free
+    - LP: #615548
+  * amd64-agp: Probe unknown AGP devices the right way
+    - LP: #615548
+  * perf: Resurrect flat callchains
+    - LP: #615548
+  * x86: Fix vsyscall on gcc 4.5 with -Os
+    - LP: #615548
+  * x86, Calgary: Increase max PHB number
+    - LP: #615548
+  * x86, Calgary: Limit the max PHB number to 256
+    - LP: #615548
+  * sched: Prevent compiler from optimising the sched_avg_update() loop
+    - LP: #615548
+  * sched: Fix over-scheduling bug
+    - LP: #615548
+  * genirq: Deal with desc->set_type() changing desc->chip
+    - LP: #615548
+  * serial: cpm_uart: implement the cpm_uart_early_write() function for
+    console poll
+    - LP: #615548
+  * cmd640: fix kernel oops in test_irq() method
+    - LP: #615548
+  * ide: Fix IDE taskfile with cfq scheduler
+    - LP: #615548
+  * net/core: neighbour update Oops
+    - LP: #615548
+  * tcp: fix crash in tcp_xmit_retransmit_queue
+    - LP: #615548
+  * rtc: fix ds1388 time corruption
+    - LP: #615548
+  * ethtool: Fix potential kernel buffer overflow in ETHTOOL_GRXCLSRLALL
+    - LP: #615548
+  * sdhci-s3c: add missing remove function
+    - LP: #615548
+  * ASoC: Remove duplicate AUX definition from WM8776
+    - LP: #615548
+  * x86: Fix x2apic preenabled system with kexec
+    - LP: #615548
+  * IPoIB: Fix world-writable child interface control sysfs attributes
+    - LP: #615548
+  * Input: i8042 - add Gigabyte Spring Peak to dmi_noloop_table
+    - LP: #580664, #615548
+  * Input: twl40300-keypad - fix handling of "all ground" rows
+    - LP: #615548
+  * ARM: 6201/1: RealView: Do not use outer_sync() on ARM11MPCore boards
+    with L220
+    - LP: #615548
+  * ARM: 6226/1: fix kprobe bug in ldr instruction emulation
+    - LP: #615548
+  * x86: Do not try to disable hpet if it hasn't been initialized before
+    - LP: #615548
+  * staging: rtl8192su: add USB VID/PID for HWNUm-300
+    - LP: #615548
+  * Staging: rtl8192su: add USB ID for 0bda:8171
+    - LP: #615548
+  * USB: obey the sysfs power/wakeup setting
+    - LP: #615548
+  * USB: g_serial: don't set low_latency flag
+    - LP: #615548
+  * USB: g_serial: fix tty cleanup on unload
+    - LP: #615548
+  * USB: option: add support for 1da5:4518
+    - LP: #615548
+  * USB: Add PID for Sierra 250U to drivers/usb/serial/sierra.c
+    - LP: #599569, #615548
+  * USB: ftdi_sio: support for Signalyzer tools based on FTDI chips
+    - LP: #615548
+  * USB: option: Add support for AMOI Skypephone S2
+    - LP: #615548
+  * USB: adds Artisman USB dongle to list of quirky devices
+    - LP: #615548
+  * USB: sisusbvga: Fix for USB 3.0
+    - LP: #615548
+  * USB: add quirk for Broadcom BT dongle
+    - LP: #615548
+  * USB: FTDI: Add support for the RT System VX-7 radio programming cable
+    - LP: #615548
+  * ethtool: Fix potential user buffer overflow for ETHTOOL_{G, S}RXFH
+    - LP: #615548
+  * ext4: Fix potential quota deadlock
+    - LP: #615548
+  * ext4: replace BUG() with return -EIO in ext4_ext_get_blocks
+    - LP: #615548
+  * ext4, jbd2: Add barriers for file systems with exernal journals
+    - LP: #615548
+  * ext4: Eliminate potential double free on error path
+    - LP: #615548
+  * ext4: return correct wbc.nr_to_write in ext4_da_writepages
+    - LP: #615548
+  * ext4: Ensure zeroout blocks have no dirty metadata
+    - LP: #615548
+  * ext4: Patch up how we claim metadata blocks for quota purposes
+    - LP: #615548
+  * ext4: Fix accounting of reserved metadata blocks
+    - LP: #615548
+  * ext4: Calculate metadata requirements more accurately
+    - LP: #615548
+  * ext4: Handle -EDQUOT error on write
+    - LP: #615548
+  * ext4: Fix quota accounting error with fallocate
+    - LP: #615548
+  * ext4: Drop EXT4_GET_BLOCKS_UPDATE_RESERVE_SPACE flag
+    - LP: #615548
+  * ext4: Use bitops to read/modify EXT4_I(inode)->i_state
+    - LP: #615548
+  * ext4: Fix BUG_ON at fs/buffer.c:652 in no journal mode
+    - LP: #615548
+  * ext4: Add flag to files with blocks intentionally past EOF
+    - LP: #615548
+  * ext4: Fix fencepost error in chosing choosing group vs file
+    preallocation.
+    - LP: #615548
+  * ext4: fix error handling in migrate
+    - LP: #615548
+  * ext4: explicitly remove inode from orphan list after failed direct io
+    - LP: #615548
+  * ext4: Handle non empty on-disk orphan link
+    - LP: #615548
+  * ext4: make "offset" consistent in ext4_check_dir_entry()
+    - LP: #615548
+  * ext4: Fix insertion point of extent in mext_insert_across_blocks()
+    - LP: #615548
+  * ext4: Fix the NULL reference in double_down_write_data_sem()
+    - LP: #615548
+  * ext4: Code cleanup for EXT4_IOC_MOVE_EXT ioctl
+    - LP: #615548
+  * ext4: Fix estimate of # of blocks needed to write indirect-mapped files
+    - LP: #615548
+  * ext4: Fixed inode allocator to correctly track a flex_bg's used_dirs
+    - LP: #615548
+  * ext4: Fix possible lost inode write in no journal mode
+    - LP: #615548
+  * ext4: Fix buffer head leaks after calls to ext4_get_inode_loc()
+    - LP: #615548
+  * ext4: Issue the discard operation *before* releasing the blocks to be
+    reused
+    - LP: #615548
+  * ext4: check missed return value in ext4_sync_file()
+    - LP: #615548
+  * ext4: fix memory leaks in error path handling of ext4_ext_zeroout()
+    - LP: #615548
+  * ext4: Remove unnecessary call to ext4_get_group_desc() in mballoc
+    - LP: #615548
+  * ext4: rename ext4_mb_release_desc() to ext4_mb_unload_buddy()
+    - LP: #615548
+  * ext4: allow defrag (EXT4_IOC_MOVE_EXT) in 32bit compat mode
+    - LP: #615548
+  * ext4: fix quota accounting in case of fallocate
+    - LP: #615548
+  * ext4: check s_log_groups_per_flex in online resize code
+    - LP: #615548
+  * ext4: don't return to userspace after freezing the fs with a mutex held
+    - LP: #615548
+  * ext4: stop issuing discards if not supported by device
+    - LP: #615548
+  * ext4: don't scan/accumulate more pages than mballoc will allocate
+    - LP: #615548
+  * ext4: Do not zero out uninitialized extents beyond i_size
+    - LP: #615548
+  * ext4: clean up inode bitmaps manipulation in ext4_free_inode
+    - LP: #615548
+  * ext4: init statistics after journal recovery
+    - LP: #615548
+  * ext4: Remove extraneous newlines in ext4_msg() calls
+    - LP: #615548
+  * ext4: Prevent creation of files larger than RLIMIT_FSIZE using
+    fallocate
+    - LP: #615548
+  * ext4: check for a good block group before loading buddy pages
+    - LP: #615548
+  * ext4: Show journal_checksum option
+    - LP: #615548
+  * ext4: Use bitops to read/modify i_flags in struct ext4_inode_info
+    - LP: #615548
+  * ext4: Avoid crashing on NULL ptr dereference on a filesystem error
+    - LP: #615548
+  * ext4: Clear the EXT4_EOFBLOCKS_FL flag only when warranted
+    - LP: #615548
+  * ext4: restart ext4_ext_remove_space() after transaction restart
+    - LP: #615548
+  * ext4: Conditionally define compat ioctl numbers
+    - LP: #615548
+  * ext4: Fix compat EXT4_IOC_ADD_GROUP
+    - LP: #615548
+  * ext4: Make fsync sync new parent directories in no-journal mode
+    - LP: #615548
+  * KVM: MMU: Remove user access when allowing kernel access to gpte.w=0
+    page
+    - LP: #615548
+  * KVM: SVM: Handle MCEs early in the vmexit process
+    - LP: #615548
+  * KVM: SVM: Implement workaround for Erratum 383
+    - LP: #615548
+  * KVM: MMU: invalidate and flush on spte small->large page size change
+    - LP: #615548
+  * futex: futex_find_get_task remove credentails check
+    - LP: #615548
+  * GFS2: Fix up system xattrs
+    - LP: #615548
+  * PM / x86: Save/restore MISC_ENABLE register
+    - LP: #615548
+  * ACPI: skip checking BM_STS if the BIOS doesn't ask for it
+    - LP: #615548
+  * ACPI: Unconditionally set SCI_EN on resume
+    - LP: #615548
+  * libertas/sdio: 8686: set ECSI bit for 1-bit transfers
+    - LP: #615548
+  * dm9000: fix "BUG: spinlock recursion"
+    - LP: #615548
+  * firmware_class: fix memory leak - free allocated pages
+    - LP: #615548
+  * revert "[CPUFREQ] remove rwsem lock from CPUFREQ_GOV_STOP call (second
+    call site)"
+    - LP: #615548
+  * ALSA: Echoaudio, fix Guru Meditation #00000005.48454C50
+    - LP: #615548
+  * V4L/DVB: dvb-core: Fix ULE decapsulation bug
+    - LP: #615548
+  * V4L/DVB: FusionHDTV: Use quick reads for I2C IR device probing
+    - LP: #615548
+  * forcedeth: fix tx limit2 flag check
+    - LP: #615548
+  * staging: rtl8192su: add Support for Belkin F5D8053 v6
+    - LP: #615548
+  * MIPS FPU emulator: allow Cause bits of FCSR to be writeable by ctc1
+    - LP: #615548
+  * V4L/DVB: budget: Select correct frontends
+    - LP: #615548
+  * cxgb3: fix linkup issue
+    - LP: #615548
+  * mac80211: fix supported rates IE if AP doesn't give us it's rates
+    - LP: #615548
+  * V4L/DVB: uvcvideo: Add support for unbranded Arkmicro 18ec:3290 webcams
+    - LP: #615548
+  * V4L/DVB: uvcvideo: Add support for Packard Bell EasyNote MX52
+    integrated webcam
+    - LP: #615548
+  * V4L/DVB: uvcvideo: Add support for V4L2_PIX_FMT_Y16
+    - LP: #615548
+  * iwlagn: verify flow id in compressed BA packet
+    - LP: #615548
+  * kbuild: Fix modpost segfault
+    - LP: #615548
+  * eeepc-laptop: check wireless hotplug events
+    - LP: #615548
+  * Fix spinaphore down_spin()
+    - LP: #615548
+  * ath5k: initialize ah->ah_current_channel
+    - LP: #615548
+  * Input: RX51 keymap - fix recent compile breakage
+    - LP: #615548
+  * V4L/DVB (13830): uvcvideo: add another YUYV format GUID for iSight
+    cameras
+    - LP: #615548
+  * Linux 2.6.32.17
+    - LP: #615548
+  * drm/i915: fix hibernation since i915 self-reclaim fixes
+    - LP: #615548
+  * drm/i915: add 'reclaimable' to i915 self-reclaimable page allocations
+    - LP: #615548
+  * i915: fix lock imbalance on error path...
+    - LP: #615548
+  * drm/i915: Define MI_ARB_STATE bits
+    - LP: #615548
+  * drm/i915: enable low power render writes on GEN3 hardware.
+    - LP: #615548
+  * drm/i915: Make G4X-style PLL search more permissive
+    - LP: #615548
+  * drm/radeon/r200: handle more hw tex coord types
+    - LP: #615548
+  * drm/radeon/r100/r200: fix calculation of compressed cube maps
+    - LP: #615548
+  * drm/radeon/kms: CS checker texture fixes for r1xx/r2xx/r3xx
+    - LP: #615548
+  * drm/radeon/kms: fix shared ddc handling
+    - LP: #615548
+  * drm/radeon/kms: fix shared ddc harder
+    - LP: #615548
+  * drm/radeon/kms: add quirk for ASUS HD 3600 board
+    - LP: #615548
+  * drm/radeon/kms: fix possible mis-detection of sideport on rs690/rs740
+    - LP: #615548
+  * drm/radeon/kms: fix legacy LVDS dpms sequence
+    - LP: #615548
+  * drm/radeon/kms: fix legacy tv-out pal mode
+    - LP: #615548
+  * Linux 2.6.32.17+drm33.7
+    - LP: #615548
+  * (pre-stable) writeback: remove the always false
+    bdi_cap_writeback_dirty() test
+    - LP: #543617, #585092
+  * (pre-stable) writeback: remove unused nonblocking and congestion checks
+    - LP: #543617, #585092
+  * (pre-stable) vfs: improve writeback_inodes_wb()
+    - LP: #543617, #585092
+  * (pre-stable) writeback: add missing kernel-doc notation
+    - LP: #543617, #585092
+  * (pre-stable) writeback: fix writeback completion notifications
+    - LP: #543617, #585092
+  * (pre-stable) writeback: queue work on stack in writeback_inodes_sb
+    - LP: #543617, #585092
+  * (pre-stable) writeback: enforce s_umount locking in writeback_inodes_sb
+    - LP: #543617, #585092
+  * (pre-stable) writeback: fix writeback_inodes_wb from
+    writeback_inodes_sb
+    - LP: #543617, #585092
+  * (pre-stable) writeback: simplify wakeup_flusher_threads
+    - LP: #543617, #585092
+  * (pre-stable) writeback: simplify and split bdi_start_writeback
+    - LP: #543617, #585092
+  * (pre-stable) writeback: add missing requeue_io in writeback_inodes_wb
+    - LP: #543617, #585092
+  * (pre-stable) writeback: fix pin_sb_for_writeback
+    - LP: #543617, #585092
+  * (pre-stable) writeback: remove writeback_inodes_wbc
+    - LP: #543617, #585092
+  * (pre-stable) writeback: split writeback_inodes_wb
+    - LP: #543617, #585092
+  * (pre-stable) writeback: simplify the write back thread queue
+    - LP: #543617, #585092
+  * (pre-stable) Fix compiling NFS when backporting writeback
+    - LP: #543617, #585092
+  * sched: cgroup: Implement different treatment for idle shares
+    - LP: #620755
+  * mm: fix ia64 crash when gcore reads gate area
+    - LP: #620755
+  * acl trouble after upgrading ubuntu
+    - LP: #620755
+  * comedi: Uncripple 8255-based DIO subdevices
+    - LP: #620755
+  * NFS: kswapd must not block in nfs_release_page
+    - LP: #620755
+  * PARISC: led.c - fix potential stack overflow in led_proc_write()
+    - LP: #620755
+  * arm/imx/gpio: add spinlock protection
+    - LP: #620755
+  * parisc: pass through '\t' to early (iodc) console
+    - LP: #620755
+  * amd64_edac: Fix DCT base address selector
+    - LP: #620755
+  * amd64_edac: Correct scrub rate setting
+    - LP: #620755
+  * e1000e: don't inadvertently re-set INTX_DISABLE
+    - LP: #620755
+  * e1000e: 82577/82578 PHY register access issues
+    - LP: #620755
+  * 9p: strlen() doesn't count the terminator
+    - LP: #620755
+  * ath9k: enable serialize_regmode for non-PCIE AR9160
+    - LP: #620755
+  * ath9k_hw: fix an off-by-one error in the PDADC boundaries calculation
+    - LP: #620755
+  * ath9k: fix TSF after reset on AR913x
+    - LP: #620755
+  * ath9k: fix yet another buffer leak in the tx aggregation code
+    - LP: #620755
+  * iwlwifi: fix scan abort
+    - LP: #620755
+  * cfg80211: ignore spurious deauth
+    - LP: #620755
+  * cfg80211: don't get expired BSSes
+    - LP: #620755
+  * xfs: prevent swapext from operating on write-only files
+    - LP: #620755
+  * SCSI: enclosure: fix error path - actually return ERR_PTR() on error
+    - LP: #620755
+  * GFS2: rename causes kernel Oops
+    - LP: #620755
+  * slow-work: use get_ref wrapper instead of directly calling get_ref
+    - LP: #620755
+  * CIFS: Remove __exit mark from cifs_exit_dns_resolver()
+    - LP: #620755
+  * CIFS: Fix compile error with __init in cifs_init_dns_resolver()
+    definition
+    - LP: #620755
+  * xen: drop xen_sched_clock in favour of using plain wallclock time
+    - LP: #620755
+  * ssb: do not read SPROM if it does not exist
+    - LP: #620755
+  * ssb: Look for SPROM at different offset on higher rev CC
+    - LP: #620755
+  * ssb: fix NULL ptr deref when pcihost_wrapper is used
+    - LP: #620755
+  * ssb: Handle alternate SSPROM location
+    - LP: #620755
+  * Linux 2.6.32.18
+    - LP: #620755
+  * ata_piix: fix locking around SIDPR access
+    - LP: #622877
+  * powerpc: fix build with make 3.82
+    - LP: #622877
+  * nvram: Fix write beyond end condition; prove to gcc copy is safe
+    - LP: #622877
+  * x86: Add memory modify constraints to xchg() and cmpxchg()
+    - LP: #622877
+  * x86, vmware: Preset lpj values when on VMware.
+    - LP: #622877
+  * Staging: line6: needs to select SND_PCM
+    - LP: #622877
+  * Staging: panel: Prevent double-calling of parport_release - fix oops.
+    - LP: #622877
+  * PCI: Do not run NVidia quirks related to MSI with MSI disabled
+    - LP: #622877
+  * PCI: disable MSI on VIA K8M800
+    - LP: #622877
+  * solos-pci: Fix race condition in tasklet RX handling
+    - LP: #622877
+  * splice: fix misuse of SPLICE_F_NONBLOCK
+    - LP: #622877
+  * drivers/video/w100fb.c: ignore void return value / fix build failure
+    - LP: #622877
+  * ide-cd: Do not access completed requests in the irq handler
+    - LP: #622877
+  * md/raid10: fix deadlock with unaligned read during resync
+    - LP: #622877
+  * blkdev: cgroup whitelist permission fix
+    - LP: #622877
+  * eCryptfs: Handle ioctl calls with unlocked and compat functions
+    - LP: #622877
+  * ecryptfs: release reference to lower mount if interpose fails
+    - LP: #622877
+  * fs/ecryptfs/file.c: introduce missing free
+    - LP: #622877
+  * bio, fs: update RWA_MASK, READA and SWRITE to match the corresponding
+    BIO_RW_* bits
+    - LP: #622877
+  * signalfd: fill in ssi_int for posix timers and message queues
+    - LP: #622877
+  * smsc911x: Add spinlocks around registers access
+    - LP: #622877
+  * ARM: 6299/1: errata: TLBIASIDIS and TLBIMVAIS operations can broadcast
+    a faulty ASID
+    - LP: #622877
+  * ARM: 6280/1: imx: Fix build failure when including <mach/gpio.h>
+    without <linux/spinlock.h>
+    - LP: #622877
+  * USB: resizing usbmon binary interface buffer causes protection faults
+    - LP: #622877
+  * USB delay init quirk for logitech Harmony 700-series devices
+    - LP: #622877
+  * USB: serial: enabling support for Segway RMP in ftdi_sio
+    - LP: #622877
+  * USB: option: Huawei ETS 1220 support added
+    - LP: #622877
+  * USB: option: add huawei k3765 k4505 devices to work properly
+    - LP: #622877
+  * USB: ftdi_sio: device id for Navitator
+    - LP: #622877
+  * USB: cp210x: Add four new device IDs
+    - LP: #622877
+  * USB: usbtest: avoid to free coherent buffer in atomic context
+    - LP: #622877
+  * USB: fix thread-unsafe anchor utiliy routines
+    - LP: #622877
+  * drm/edid: Fix the HDTV hack sync adjustment
+    - LP: #622877
+  * Bluetooth: Added support for controller shipped with iMac i5
+    - LP: #622877
+  * jfs: don't allow os2 xattr namespace overlap with others
+    - LP: #622877
+  * arp_notify: allow drivers to explicitly request a notification event.
+    - LP: #622877
+  * xen: netfront: explicitly generate arp_notify event after migration.
+    - LP: #622877
+  * net: Fix NETDEV_NOTIFY_PEERS to not conflict with
+    NETDEV_BONDING_DESLAVE.
+    - LP: #622877
+  * irq: Add new IRQ flag IRQF_NO_SUSPEND
+    - LP: #622877
+  * xen: Do not suspend IPI IRQs.
+    - LP: #622877
+  * drm/i915: Use RSEN instead of HTPLG for tfp410 monitor detection.
+    - LP: #622877
+  * Btrfs: Avoid superfluous tree-log writeout
+    - LP: #622877
+  * Btrfs: Add btrfs_duplicate_item
+    - LP: #622877
+  * Btrfs: Rewrite btrfs_drop_extents
+    - LP: #622877
+  * Btrfs: Fix disk_i_size update corner case
+    - LP: #622877
+  * Btrfs: Avoid orphan inodes cleanup while replaying log
+    - LP: #622877
+  * Btrfs: Avoid orphan inodes cleanup during committing transaction
+    - LP: #622877
+  * Btrfs: Make fallocate(2) more ENOSPC friendly
+    - LP: #622877
+  * Btrfs: Make truncate(2) more ENOSPC friendly
+    - LP: #622877
+  * Btrfs: Pass transaction handle to security and ACL initialization
+    functions
+    - LP: #622877
+  * Btrfs: Add delayed iput
+    - LP: #622877
+  * Btrfs: Fix btrfs_drop_extent_cache for skip pinned case
+    - LP: #622877
+  * Btrfs: Fix per root used space accounting
+    - LP: #622877
+  * Btrfs: don't add extent 0 to the free space cache v2
+    - LP: #622877
+  * Btrfs: fail mount on bad mount options
+    - LP: #622877
+  * Btrfs: deny sys_link across subvolumes.
+    - LP: #622877
+  * Btrfs: Show discard option in /proc/mounts
+    - LP: #622877
+  * Btrfs: make metadata chunks smaller
+    - LP: #622877
+  * Btrfs: make sure fallocate properly starts a transaction
+    - LP: #622877
+  * btrfs: fix missing last-entry in readdir(3)
+    - LP: #622877
+  * Btrfs: align offsets for btrfs_ordered_update_i_size
+    - LP: #622877
+  * Btrfs, fix memory leaks in error paths
+    - LP: #622877
+  * Btrfs: Fix race in btrfs_mark_extent_written
+    - LP: #622877
+  * Btrfs: fix regression in orphan cleanup
+    - LP: #622877
+  * Btrfs: deal with NULL acl sent to btrfs_set_acl
+    - LP: #622877
+  * Btrfs: fix possible panic on unmount
+    - LP: #622877
+  * Btrfs: Use correct values when updating inode i_size on fallocate
+    - LP: #622877
+  * Btrfs: fix a memory leak in btrfs_init_acl
+    - LP: #622877
+  * Btrfs: run orphan cleanup on default fs root
+    - LP: #622877
+  * Btrfs: do not mark the chunk as readonly if in degraded mode
+    - LP: #622877
+  * Btrfs: check return value of open_bdev_exclusive properly
+    - LP: #622877
+  * Btrfs: check total number of devices when removing missing
+    - LP: #622877
+  * Btrfs: fix race between allocate and release extent buffer.
+    - LP: #622877
+  * Btrfs: make error return negative in btrfs_sync_file()
+    - LP: #622877
+  * Btrfs: remove BUG_ON() due to mounting bad filesystem
+    - LP: #622877
+  * Btrfs: Fix oopsen when dropping empty tree.
+    - LP: #622877
+  * Btrfs: do not try and lookup the file extent when finishing ordered io
+    - LP: #622877
+  * Btrfs: apply updated fallocate i_size fix
+    - LP: #622877
+  * Btrfs: btrfs_mark_extent_written uses the wrong slot
+    - LP: #622877
+  * Btrfs: kfree correct pointer during mount option parsing
+    - LP: #622877
+  * nohz: Introduce arch_needs_cpu
+    - LP: #622877
+  * nohz: Reuse ktime in sub-functions of tick_check_idle.
+    - LP: #622877
+  * timekeeping: Fix clock_gettime vsyscall time warp
+    - LP: #622877
+  * sched: Fix granularity of task_u/stime()
+    - LP: #622877
+  * sched, cputime: Introduce thread_group_times()
+    - LP: #622877
+  * mutex: Don't spin when the owner CPU is offline or other weird cases
+    - LP: #622877
+  * fix SBA IOMMU to handle allocation failure properly
+    - LP: #622877
+  * crypto: testmgr - Fix complain about lack test for internal used
+    algorithm
+    - LP: #622877
+  * memory hotplug: fix a bug on /dev/mem for 64-bit kernels
+    - LP: #622877
+  * x86: Fix out of order of gsi
+    - LP: #622877
+  * HWPOISON: remove the anonymous entry
+    - LP: #622877
+  * HWPOISON: abort on failed unmap
+    - LP: #622877
+  * powerpc/eeh: Fix a bug when pci structure is null
+    - LP: #622877
+  * ACPI: Fix regression where _PPC is not read at boot even when
+    ignore_ppc=0
+    - LP: #622877
+  * ext4: Make sure the MOVE_EXT ioctl can't overwrite append-only files
+    - LP: #622877
+  * ext4: Fix optional-arg mount options
+    - LP: #622877
+  * reiserfs: properly honor read-only devices
+    - LP: #622877
+  * reiserfs: fix oops while creating privroot with selinux enabled
+    - LP: #622877
+  * dlm: always use GFP_NOFS
+    - LP: #622877
+  * dlm: fix ordering of bast and cast
+    - LP: #622877
+  * dlm: send reply before bast
+    - LP: #622877
+  * ocfs2: Find proper end cpos for a leaf refcount block.
+    - LP: #622877
+  * ocfs2: Set MS_POSIXACL on remount
+    - LP: #622877
+  * Skip check for mandatory locks when unlocking
+    - LP: #622877
+  * loop: Update mtime when writing using aops
+    - LP: #622877
+  * aic79xx: check for non-NULL scb in ahd_handle_nonpkt_busfree
+    - LP: #622877
+  * ibmvfc: Fix command completion handling
+    - LP: #622877
+  * ibmvfc: Reduce error recovery timeout
+    - LP: #622877
+  * md/raid1: delay reads that could overtake behind-writes.
+    - LP: #622877
+  * mm: fix corruption of hibernation caused by reusing swap during image
+    saving
+    - LP: #622877
+  * Linux 2.6.32.19
+    - LP: #622877
+  * Linux 2.6.32.20
+    - LP: #622882
+  * memstick: fix hangs on unexpected device removal in mspro_blk
+    - LP: #625392
+  * ASoC: Fix inverted mute controls for WM8580
+    - LP: #625392
+  * ASoC: Remove DSP mode support for WM8776
+    - LP: #625392
+  * ALSA: riptide - Fix detection / load of firmware files
+    - LP: #625392
+  * ALSA: emu10k1 - delay the PCM interrupts (add pcm_irq_delay parameter)
+    - LP: #625392
+  * ALSA: hda - Fix missing stream for second ADC on Realtek ALC260 HDA
+    codec
+    - LP: #625392
+  * ocfs2: do not overwrite error codes in ocfs2_init_acl
+    - LP: #625392
+  * ocfs2/dlm: fix a dead lock
+    - LP: #625392
+  * ocfs2 fix o2dlm dlm run purgelist (rev 3)
+    - LP: #625392
+  * ocfs2: Count more refcount records in file system fragmentation.
+    - LP: #625392
+  * ocfs2/dlm: avoid incorrect bit set in refmap on recovery master
+    - LP: #625392
+  * ocfs2/dlm: remove potential deadlock -V3
+    - LP: #625392
+  * x86, hotplug: Serialize CPU hotplug to avoid bringup concurrency issues
+    - LP: #625392
+  * x86, apic: Fix apic=debug boot crash
+    - LP: #625392
+  * Fix the nested PR lock calling issue in ACL
+    - LP: #625392
+  * hwmon: (pc87360) Fix device resource declaration
+    - LP: #625392
+  * ARM: Tighten check for allowable CPSR values
+    - LP: #625392
+  * nfs: Add "lookupcache" to displayed mount options
+    - LP: #625392
+  * ath5k: disable ASPM L0s for all cards
+    - LP: #625392
+  * pxa3xx: fix ns2cycle equation
+    - LP: #625392
+  * dm mpath: fix NULL pointer dereference when path parameters missing
+    - LP: #625392
+  * dm ioctl: release _hash_lock between devices in remove_all
+    - LP: #625392
+  * mm: make the vma list be doubly linked
+    - LP: #625392
+  * mm: make the mlock() stack guard page checks stricter
+    - LP: #625392
+  * mm: make stack guard page logic use vm_prev pointer
+    - LP: #625392
+  * slab: fix object alignment
+    - LP: #625392
+  * sunxvr500: Ignore secondary output PCI devices.
+    - LP: #625392
+  * sparc64: Add missing ID to parport probing code.
+    - LP: #625392
+  * sparc64: Fix rwsem constant bug leading to hangs.
+    - LP: #625392
+  * sparc64: Fix atomic64_t routine return values.
+    - LP: #625392
+  * net: Fix a memmove bug in dev_gro_receive()
+    - LP: #625392
+  * isdn: fix information leak
+    - LP: #625392
+  * act_nat: the checksum of ICMP doesn't have pseudo header
+    - LP: #625392
+  * vmscan: raise the bar to PAGEOUT_IO_SYNC stalls
+    - LP: #625392
+  * pcmcia: avoid buffer overflow in pcmcia_setup_isa_irq
+    - LP: #625392
+  * ext4: consolidate in_range() definitions
+    - LP: #625392
+  * Oprofile: Change CPUIDS from decimal to hex, and add some comments
+    - LP: #625392
+  * oprofile: add support for Intel processor model 30
+    - LP: #625392
+  * fixes for using make 3.82
+    - LP: #625392
+  * ALSA: intel8x0: Mute External Amplifier by default for ThinkPad X31
+    - LP: #619439, #625392
+  * netlink: fix compat recvmsg
+    - LP: #625392
+  * powerpc: Fix typo in uImage target
+    - LP: #625392
+  * USB: option: add Celot CT-650
+    - LP: #625392
+  * USB: add device IDs for igotu to navman
+    - LP: #625392
+  * USB: pl2303: New vendor and product id
+    - LP: #625392
+  * USB: CP210x Fix Break On/Off
+    - LP: #625392
+  * USB: ftdi_sio: fix endianess of max packet size
+    - LP: #625392
+  * USB: io_ti: check firmware version before updating
+    - LP: #625392
+  * USB: xhci: Remove buggy assignment in next_trb()
+    - LP: #625392
+  * USB: ftdi_sio: Add ID for Ionics PlugComputer
+    - LP: #625392
+  * USB: ftdi_sio: add product ID for Lenz LI-USB
+    - LP: #625392
+  * x86, apic: ack all pending irqs when crashed/on kexec
+    - LP: #625392
+  * Linux 2.6.32.21
+    - LP: #625392
+
+ -- Brad Figg <brad.figg@canonical.com>  Mon, 27 Sep 2010 11:51:28 -0700
+
+linux-mvl-dove (2.6.32-210.26) lucid-proposed; urgency=low
+
+  [ Stefan Bader ]
+
+  * Rebased to 2.6.32-25.43
+
+  [ Upstream Kernel Changes ]
+
+  * dove: make galcore built-in
+    - LP: #625090
+  * dove: make BMM driver built-in
+    - LP: #625090
+  * dove: fix incorrect bus base of macro __io()
+    - LP: #601226
+  * dove: use LCD external clock for videoplug board
+    - LP: #625132
+  * dove: fix crash issue when lcd1 enabled and the board setup doesn't
+    provide mach board info
+    - LP: #625132
+  * dove: fix bug when clearing the needed bit when handling PMU interrupt
+    - LP: #625132
+  * fix VGA calibration initial value.
+    - LP: #625132
+  * dove: fix bug when setting the pcie port control register
+    - LP: #625132
+  * fix jiggling issue for high resolution in dual display.
+    - LP: #625132
+  * orion eth: always call the phy_scan from the resume function
+    - LP: #625132
+  * Enable L2WA only and remove L1WA
+    - LP: #625132
+  * Enable L2C way 4-7
+    - LP: #625132
+  * Disable Dual issue of VFP WMMX for stability
+    - LP: #625132
+  * dove: set the giga phy address for dove db board
+    - LP: #625132
+  * fix HWC32 enable make system hang while use LCD external clock.
+    - LP: #625132
+  * dove: use AC97 RT655 codec instead of ASoC version
+    - LP: #625132
+
+  [ Ubuntu: 2.6.32-25.43 ]
+
+  * SAUCE: (no-up) Modularize vesafb -- fix initialization
+    - LP: #611471
+  * Revert "SAUCE: sync before umount to reduce time taken by ext4 umount"
+    - LP: #543617, #585092
+  * Revert "SAUCE: tulip: Let dmfe handle davicom on non-sparc"
+    - LP: #607824
+  * [Config] Added ums-cypress to udeb
+    - LP: #576066
+  * Revert "PCI quirk: Disable MSI on VIA K8T890 systems"
+    - LP: #607824
+  * Revert "PCI quirks: disable msi on AMD rs4xx internal gfx bridges"
+    - LP: #607824
+  * Revert "(pre-stable) Input: psmouse - reset all types of mice before
+    reconnecting"
+    - LP: #607824
+  * Revert "jbd: jbd-debug and jbd2-debug should be writable"
+    - LP: #607824
+  * Revert "ext4: Make fsync sync new parent directories in no-journal
+    mode"
+    - LP: #615548
+  * Revert "ext4: Fix compat EXT4_IOC_ADD_GROUP"
+    - LP: #615548
+  * Revert "ext4: Conditionally define compat ioctl numbers"
+    - LP: #615548
+  * Revert "ext4: restart ext4_ext_remove_space() after transaction
+    restart"
+    - LP: #615548
+  * Revert "ext4: Clear the EXT4_EOFBLOCKS_FL flag only when warranted"
+    - LP: #615548
+  * Revert "ext4: Avoid crashing on NULL ptr dereference on a filesystem
+    error"
+    - LP: #615548
+  * Revert "ext4: Use bitops to read/modify i_flags in struct
+    ext4_inode_info"
+    - LP: #615548
+  * Revert "ext4: Show journal_checksum option"
+    - LP: #615548
+  * Revert "ext4: check for a good block group before loading buddy pages"
+    - LP: #615548
+  * Revert "ext4: Prevent creation of files larger than RLIMIT_FSIZE using
+    fallocate"
+    - LP: #615548
+  * Revert "ext4: Remove extraneous newlines in ext4_msg() calls"
+    - LP: #615548
+  * Revert "ext4: init statistics after journal recovery"
+    - LP: #615548
+  * Revert "ext4: clean up inode bitmaps manipulation in ext4_free_inode"
+    - LP: #615548
+  * Revert "ext4: Do not zero out uninitialized extents beyond i_size"
+    - LP: #615548
+  * Revert "ext4: don't scan/accumulate more pages than mballoc will
+    allocate"
+    - LP: #615548
+  * Revert "ext4: stop issuing discards if not supported by device"
+    - LP: #615548
+  * Revert "ext4: check s_log_groups_per_flex in online resize code"
+    - LP: #615548
+  * Revert "ext4: fix quota accounting in case of fallocate"
+    - LP: #615548
+  * Revert "ext4: allow defrag (EXT4_IOC_MOVE_EXT) in 32bit compat mode"
+    - LP: #615548
+  * Revert "ext4: rename ext4_mb_release_desc() to ext4_mb_unload_buddy()"
+    - LP: #615548
+  * Revert "ext4: Remove unnecessary call to ext4_get_group_desc() in
+    mballoc"
+    - LP: #615548
+  * Revert "ext4: fix memory leaks in error path handling of
+    ext4_ext_zeroout()"
+    - LP: #615548
+  * Revert "ext4: check missed return value in ext4_sync_file()"
+    - LP: #615548
+  * Revert "ext4: Issue the discard operation *before* releasing the blocks
+    to be reused"
+    - LP: #615548
+  * Revert "ext4: Fix buffer head leaks after calls to
+    ext4_get_inode_loc()"
+    - LP: #615548
+  * Revert "ext4: Fix possible lost inode write in no journal mode"
+    - LP: #615548
+  * Revert "ext4: Fixed inode allocator to correctly track a flex_bg's
+    used_dirs"
+    - LP: #615548
+  * Revert "ext4: Fix estimate of # of blocks needed to write
+    indirect-mapped files"
+    - LP: #615548
+  * Revert "ext4: Code cleanup for EXT4_IOC_MOVE_EXT ioctl"
+    - LP: #615548
+  * Revert "ext4: Fix the NULL reference in double_down_write_data_sem()"
+    - LP: #615548
+  * Revert "ext4: Fix insertion point of extent in
+    mext_insert_across_blocks()"
+    - LP: #615548
+  * Revert "ext4: make "offset" consistent in ext4_check_dir_entry()"
+    - LP: #615548
+  * Revert "ext4: Handle non empty on-disk orphan link"
+    - LP: #615548
+  * Revert "ext4: explicitly remove inode from orphan list after failed
+    direct io"
+    - LP: #615548
+  * Revert "ext4: fix error handling in migrate"
+    - LP: #615548
+  * Revert "ext4: Fix fencepost error in chosing choosing group vs file
+    preallocation."
+    - LP: #615548
+  * Revert "ext4: Add flag to files with blocks intentionally past EOF"
+    - LP: #615548
+  * Revert "ext4: Fix BUG_ON at fs/buffer.c:652 in no journal mode"
+    - LP: #615548
+  * Revert "ext4: Use bitops to read/modify EXT4_I(inode)->i_state"
+    - LP: #615548
+  * Revert "ext4: Drop EXT4_GET_BLOCKS_UPDATE_RESERVE_SPACE flag"
+    - LP: #615548
+  * Revert "ext4: Fix quota accounting error with fallocate"
+    - LP: #615548
+  * Revert "ext4: Handle -EDQUOT error on write"
+    - LP: #615548
+  * Revert "ext4: Calculate metadata requirements more accurately"
+    - LP: #615548
+  * Revert "ext4: Fix accounting of reserved metadata blocks"
+    - LP: #615548
+  * Revert "ext4: Patch up how we claim metadata blocks for quota purposes"
+    - LP: #615548
+  * Revert "ext4: Ensure zeroout blocks have no dirty metadata"
+    - LP: #615548
+  * Revert "ext4: return correct wbc.nr_to_write in ext4_da_writepages"
+    - LP: #615548
+  * Revert "ext4: Eliminate potential double free on error path"
+    - LP: #615548
+  * Revert "ext4, jbd2: Add barriers for file systems with exernal
+    journals"
+    - LP: #615548
+  * Revert "ext4: replace BUG() with return -EIO in ext4_ext_get_blocks"
+    - LP: #615548
+  * Revert "ext4: Fix potential quota deadlock"
+    - LP: #615548
+  * Revert "ext4: don't return to userspace after freezing the fs with a
+    mutex held"
+    - LP: #615548
+  * ixgbe: Fix return of invalid txq
+    - LP: #607824
+  * oprofile/x86: fix uninitialized counter usage during cpu hotplug
+    - LP: #607824
+  * oprofile: remove double ring buffering
+    - LP: #607824
+  * cpumask: fix compat getaffinity
+    - LP: #607824
+  * NFSD: don't report compiled-out versions as present
+    - LP: #607824
+  * sata_nv: use ata_pci_sff_activate_host() instead of ata_host_activate()
+    - LP: #607824
+  * ARCNET: Limit com20020 PCI ID matches for SOHARD cards
+    - LP: #607824
+  * rtl8180: fix tx status reporting
+    - LP: #607824
+  * Staging: add Add Sitecom WL-349 to rtl8192su
+    - LP: #607824
+  * staging: vt6655: Fix kernel BUG on driver wpa initialization
+    - LP: #607824
+  * Fix racy use of anon_inode_getfd() in perf_event.c
+    - LP: #607824
+  * posix_timer: Fix error path in timer_create
+    - LP: #607824
+  * libata: disable ATAPI AN by default
+    - LP: #607824
+  * libata: don't flush dcache on slab pages
+    - LP: #607824
+  * mutex: Fix optimistic spinning vs. BKL
+    - LP: #607824
+  * ALSA: hda: Fix model quirk for Dell M1730
+    - LP: #576160, #607824
+  * ALSA: hda: Use LPIB for Toshiba A100-259
+    - LP: #549560, #607824
+  * ALSA: hda: Use LPIB for Acer Aspire 5110
+    - LP: #583983, #607824
+  * ALSA: hda: Use LPIB for Sony VPCS11V9E
+    - LP: #586347, #607824
+  * ALSA: hda: Use LPIB for a Shuttle device
+    - LP: #551949, #607824
+  * ACPI: video: fix acpi_backlight=video
+    - LP: #573120, #607824
+  * V4L/DVB: gspca - stv06xx: Remove the 046d:08da from the stv06xx driver
+    - LP: #607824
+  * HID: Add the GYR4101US USB ID to hid-gyration
+    - LP: #607824
+  * ar9170usb: add a couple more USB IDs
+    - LP: #607824
+  * ar9170usb: fix panic triggered by undersized rxstream buffer
+    - LP: #607824
+  * USB: visor: fix memory leak
+    - LP: #607824
+  * USB: CP210x New Device IDs 11 New device IDs
+    - LP: #607824
+  * USB: kobil: fix memory leak
+    - LP: #607824
+  * USB: option: add PID for ZTE product
+    - LP: #607824
+  * USB: option.c: Add Pirelli VID/PID and indicate Pirelli's modem
+    interface is 0xff
+    - LP: #607824
+  * USB: serial: option: add cinterion device id
+    - LP: #607824
+  * USB: option.c: OLIVETTI OLICARD100 support
+    - LP: #607824
+  * USB: ir-usb: fix double free
+    - LP: #607824
+  * USB: kl5usb105: fix memory leak
+    - LP: #607824
+  * USB: mxc: gadget: Fix bitfield for calculating maximum packet size
+    - LP: #607824
+  * USB: unusual-dev: Add bad sense flag for Appotech ax203 based picture
+    frames
+    - LP: #607824
+  * USB: EHCI: clear PHCD before resuming
+    - LP: #607824
+  * USB: xhci: Fix issue with set interface after stall.
+    - LP: #607824
+  * USB: xhci: Fix check for room on the ring.
+    - LP: #607824
+  * USB: xHCI: Fix wrong usage of macro TRB_TYPE
+    - LP: #607824
+  * mac80211: give warning if building w/out rate ctrl algorithm
+    - LP: #607824
+  * mac80211: Fix robust management frame handling (MFP)
+    - LP: #607824
+  * mac80211: fix rts threshold check
+    - LP: #607824
+  * drivers/base/cpu.c: fix the output from /sys/devices/system/cpu/offline
+    - LP: #607824
+  * can: Fix SJA1000 command register writes on SMP systems
+    - LP: #607824
+  * PCI quirk: Disable MSI on VIA K8T890 systems
+    - LP: #607824
+  * PCI quirks: disable msi on AMD rs4xx internal gfx bridges
+    - LP: #607824
+  * PCI: Disable MSI for MCP55 on P5N32-E SLI
+    - LP: #607824
+  * virtio_net: Make delayed refill more reliable
+    - LP: #607824
+  * mm: hugetlb: fix clear_huge_page()
+    - LP: #607824
+  * powerpc: Fix handling of strncmp with zero len
+    - LP: #607824
+  * powerpc/pseries: Only call start-cpu when a CPU is stopped
+    - LP: #607824
+  * powerpc/pseries: Make query_cpu_stopped callable outside hotplug cpu
+    - LP: #607824
+  * powerpc/oprofile: fix potential buffer overrun in op_model_cell.c
+    - LP: #607824
+  * writeback: disable periodic old data writeback for
+    !dirty_writeback_centisecs
+    - LP: #607824
+  * md/raid1: fix counting of write targets.
+    - LP: #607824
+  * md: Fix read balancing in RAID1 and RAID10 on drives > 2TB
+    - LP: #607824
+  * md: set mddev readonly flag on blkdev BLKROSET ioctl
+    - LP: #607824
+  * x86/amd-iommu: Fix suspend/resume with IOMMU
+    - LP: #607824
+  * exofs: confusion between kmap() and kmap_atomic() api
+    - LP: #607824
+  * mn10300: set ARCH_KMALLOC_MINALIGN
+    - LP: #607824
+  * m68k: set ARCH_KMALLOC_MINALIGN
+    - LP: #607824
+  * rtc-cmos: do dev_set_drvdata() earlier in the initialization
+    - LP: #607824
+  * rtc: s3c: initialize driver data before using it
+    - LP: #607824
+  * frv: set ARCH_KMALLOC_MINALIGN
+    - LP: #607824
+  * xtensa: set ARCH_KMALLOC_MINALIGN
+    - LP: #607824
+  * Blackfin: set ARCH_KMALLOC_MINALIGN
+    - LP: #607824
+  * tmpfs: insert tmpfs cache pages to inactive list at first
+    - LP: #607824
+  * mlx4_core: Fix possible chunk sg list overflow in mlx4_alloc_icm()
+    - LP: #607824
+  * ARM: 6166/1: Proper prefetch abort handling on pre-ARMv6
+    - LP: #607824
+  * ARM: 6164/1: Add kto and kfrom to input operands list.
+    - LP: #607824
+  * ARM: 6146/1: sa1111: Prevent deadlock in resume path
+    - LP: #607824
+  * ARM: 6144/1: TCM memory bug freeing bug
+    - LP: #607824
+  * ARM: VFP: Fix vfp_put_double() for d16-d31
+    - LP: #607824
+  * ASoC: Fix dB scales for WM835x
+    - LP: #607824
+  * ASoC: Fix dB scales for WM8400
+    - LP: #607824
+  * ASoC: Fix dB scales for WM8990
+    - LP: #607824
+  * hwmon: (ltc4245) Read only one GPIO pin
+    - LP: #607824
+  * signals: check_kill_permission(): don't check creds if
+    same_thread_group()
+    - LP: #607824
+  * do_generic_file_read: clear page errors when issuing a fresh read of
+    the page
+    - LP: #607824
+  * ipmi: handle run_to_completion properly in deliver_recv_msg()
+    - LP: #607824
+  * x86, setup: Phoenix BIOS fixup is needed on Dell Inspiron Mini 1012
+    - LP: #607824
+  * xen: ensure timer tick is resumed even on CPU driving the resume
+    - LP: #607824
+  * xen: avoid allocation causing potential swap activity on the resume
+    path
+    - LP: #607824
+  * ALSA: hda: Use LPIB for an ASUS device
+    - LP: #465942, #607824
+  * ALSA: hda: Use mb31 quirk for an iMac model
+    - LP: #542550, #607824
+  * ALSA: hda: Use LPIB for another mainboard
+    - LP: #580749, #607824
+  * ALSA: hda: Use LPIB for ASUS M2V
+    - LP: #587546, #607824
+  * Staging: comedi - correct parameter gainlkup for DAQCard-6024E in
+    driver ni_mio_cs.c
+    - LP: #607824
+  * clocksource: sh_cmt: compute mult and shift before registration
+    - LP: #607824
+  * ath5k: retain promiscuous setting
+    - LP: #607824
+  * ahci: add pci quirk for JMB362
+    - LP: #607824
+  * firewire: core: check for 1394a compliant IRM, fix inaccessibility of
+    Sony camcorder
+    - LP: #607824
+  * perf_events: Fix resource leak in x86 __hw_perf_event_init()
+    - LP: #607824
+  * sata_nv: don't diddle with nIEN on mcp55
+    - LP: #607824
+  * sata_via: magic vt6421 fix for transmission problems w/ WD drives
+    - LP: #422994, #607824
+  * USB: mos7840: fix null-pointer dereference
+    - LP: #607824
+  * USB: xhci: Wait for host to start running.
+    - LP: #607824
+  * USB: xhci: Wait for controller to be ready after reset.
+    - LP: #607824
+  * USB: ftdi_sio: fix DTR/RTS line modes
+    - LP: #607824
+  * USB: cdc-acm: fix resource reclaim in error path of acm_probe
+    - LP: #607824
+  * p54usb: Add device ID for Dell WLA3310 USB
+    - LP: #607824
+  * atl1e: Allow TX checksum offload and TSO to be disabled and reenabled
+    - LP: #607824
+  * via-velocity: Give RX descriptors to the NIC later on open or MTU
+    change
+    - LP: #607824
+  * dmfe/tulip: Let dmfe handle DM910x except for SPARC on-board chips
+    - LP: #607824
+  * Documentation/3c509: document ethtool support
+    - LP: #607824
+  * wireless: report reasonable bitrate for MCS rates through wext
+    - LP: #607824
+  * ath9k: add support for 802.11n bonded out AR2427
+    - LP: #607824
+  * wrong type for 'magic' argument in simple_fill_super()
+    - LP: #607824
+  * iwlwifi: check for aggregation frame and queue
+    - LP: #607824
+  * iwlwifi: recalculate average tpt if not current
+    - LP: #607824
+  * iwlwifi: update supported PCI_ID list for 5xx0 series
+    - LP: #607824
+  * wl1251: fix a memory leak in probe
+    - LP: #607824
+  * vfs: add NOFOLLOW flag to umount(2)
+    - LP: #607824
+  * l2tp: Fix oops in pppol2tp_xmit
+    - LP: #607824
+  * ucc_geth: Fix empty TX queue processing
+    - LP: #607824
+  * ucc_geth: Fix netdev watchdog triggering on link changes
+    - LP: #607824
+  * ucc_geth: Fix full TX queue processing
+    - LP: #607824
+  * Input: psmouse - reset all types of mice before reconnecting
+    - LP: #607824
+  * KVM: s390: Fix possible memory leak of in kvm_arch_vcpu_create()
+    - LP: #607824
+  * KVM: PPC: Do not create debugfs if fail to create vcpu
+    - LP: #607824
+  * x86, paravirt: Add a global synchronization point for pvclock
+    - LP: #607824
+  * KVM: Don't allow lmsw to clear cr0.pe
+    - LP: #607824
+  * KVM: x86: Check LMA bit before set_efer
+    - LP: #607824
+  * KVM: MMU: Segregate shadow pages with different cr0.wp
+    - LP: #607824
+  * KVM: VMX: enable VMXON check with SMX enabled (Intel TXT)
+    - LP: #607824
+  * KVM: MMU: Don't read pdptrs with mmu spinlock held in mmu_alloc_roots
+    - LP: #607824
+  * KVM: Fix wallclock version writing race
+    - LP: #607824
+  * KVM: x86: Add missing locking to arch specific vcpu ioctls
+    - LP: #607824
+  * KVM: x86: Inject #GP with the right rip on efer writes
+    - LP: #607824
+  * jbd: jbd-debug and jbd2-debug should be writable
+    - LP: #607824
+  * parisc: clear floating point exception flag on SIGFPE signal
+    - LP: #607824
+  * dm snapshot: simplify sector_to_chunk expression
+    - LP: #607824
+  * KEYS: Return more accurate error codes
+    - LP: #607824
+  * qla2xxx: Disable MSI on qla24xx chips other than QLA2432.
+    - LP: #607824
+  * Linux 2.6.32.16
+    - LP: #607824
+  * drm/i915: Fix 82854 PCI ID, and treat it like other 85X
+    - LP: #607824
+  * drm/i915: Reject bind_to_gtt() early if object > aperture
+    - LP: #607824
+  * drm/edid: Fix 1024x768@85Hz
+    - LP: #607824
+  * drm/radeon/kms: reset ddc_bus in object header parsing
+    - LP: #607824
+  * drm/radeon/kms/atom: fix typo in LVDS panel info parsing
+    - LP: #607824
+  * drm/radeon: r100/r200 ums: block ability for userspace app to trash 0
+    page and beyond
+    - LP: #607824
+  * drm/radeon: fix the r100/r200 ums block 0 page fix
+    - LP: #607824
+  * drm/i915: Rebind bo if currently bound with incorrect alignment.
+    - LP: #607824
+  * Linux 2.6.32.16+drm33.6
+    - LP: #607824
+  * virtio-pci: disable msi at startup
+    - LP: #615548
+  * hwmon: (k8temp) Bypass core swapping on single-core processors
+    - LP: #615548
+  * hwmon: (k8temp) Fix temperature reporting for ASB1 processor revisions
+    - LP: #615548
+  * hwmon: (coretemp) Properly label the sensors
+    - LP: #615548
+  * hwmon: (coretemp) Skip duplicate CPU entries
+    - LP: #615548
+  * hwmon: (it87) Fix in7 on IT8720F
+    - LP: #615548
+  * cifs: remove bogus first_time check in NTLMv2 session setup code
+    - LP: #615548
+  * cifs: don't attempt busy-file rename unless it's in same directory
+    - LP: #615548
+  * CIFS: Fix a malicious redirect problem in the DNS lookup code
+    - LP: #615548
+  * ALSA: hda - Add Macbook 5,2 quirk
+    - LP: #463178, #615548
+  * cpmac: do not leak struct net_device on phy_connect errors
+    - LP: #615548
+  * sky2: enable rx/tx in sky2_phy_reinit()
+    - LP: #615548
+  * sparc: Fix use of uid16_t and gid16_t in asm/stat.h
+    - LP: #615548
+  * math-emu: correct test for downshifting fraction in _FP_FROM_INT()
+    - LP: #615548
+  * NFSv4: Fix an embarassing typo in encode_attrs()
+    - LP: #615548
+  * NFSv4: Ensure that /proc/self/mountinfo displays the minor version
+    number
+    - LP: #615548
+  * SUNRPC: Fix a re-entrancy bug in xs_tcp_read_calldir()
+    - LP: #615548
+  * ath5k: drop warning on jumbo frames
+    - LP: #615548
+  * ath9k: re-enable ps by default for new single chip families
+    - LP: #615548
+  * ath9k: Avoid corrupt frames being forwarded to mac80211.
+    - LP: #615548
+  * hostap: Protect against initialization interrupt
+    - LP: #615548
+  * TPM: ReadPubEK output struct fix
+    - LP: #615548
+  * fb: fix colliding defines for fb flags.
+    - LP: #615548
+  * iwlwifi: cancel scan watchdog in iwl_bg_abort_scan
+    - LP: #615548
+  * mac80211: do not wip out old supported rates
+    - LP: #615548
+  * mac80211: Handle mesh action frames in ieee80211_rx_h_action
+    - LP: #615548
+  * Btrfs: fix checks in BTRFS_IOC_CLONE_RANGE
+    - LP: #615548
+  * p54pci: add Symbol AP-300 minipci adapters pciid
+    - LP: #615548
+  * dynamic debug: move ddebug_remove_module() down into free_module()
+    - LP: #615548
+  * tpm_tis: fix subsequent suspend failures
+    - LP: #615548
+  * ipvs: Add missing locking during connection table hashing and unhashing
+    - LP: #615548
+  * netfilter: ip6t_REJECT: fix a dst leak in ipv6 REJECT
+    - LP: #615548
+  * SCSI: aacraid: Eliminate use after free
+    - LP: #615548
+  * amd64-agp: Probe unknown AGP devices the right way
+    - LP: #615548
+  * perf: Resurrect flat callchains
+    - LP: #615548
+  * x86: Fix vsyscall on gcc 4.5 with -Os
+    - LP: #615548
+  * x86, Calgary: Increase max PHB number
+    - LP: #615548
+  * x86, Calgary: Limit the max PHB number to 256
+    - LP: #615548
+  * sched: Prevent compiler from optimising the sched_avg_update() loop
+    - LP: #615548
+  * sched: Fix over-scheduling bug
+    - LP: #615548
+  * genirq: Deal with desc->set_type() changing desc->chip
+    - LP: #615548
+  * serial: cpm_uart: implement the cpm_uart_early_write() function for
+    console poll
+    - LP: #615548
+  * cmd640: fix kernel oops in test_irq() method
+    - LP: #615548
+  * ide: Fix IDE taskfile with cfq scheduler
+    - LP: #615548
+  * net/core: neighbour update Oops
+    - LP: #615548
+  * tcp: fix crash in tcp_xmit_retransmit_queue
+    - LP: #615548
+  * rtc: fix ds1388 time corruption
+    - LP: #615548
+  * ethtool: Fix potential kernel buffer overflow in ETHTOOL_GRXCLSRLALL
+    - LP: #615548
+  * sdhci-s3c: add missing remove function
+    - LP: #615548
+  * ASoC: Remove duplicate AUX definition from WM8776
+    - LP: #615548
+  * x86: Fix x2apic preenabled system with kexec
+    - LP: #615548
+  * IPoIB: Fix world-writable child interface control sysfs attributes
+    - LP: #615548
+  * Input: i8042 - add Gigabyte Spring Peak to dmi_noloop_table
+    - LP: #580664, #615548
+  * Input: twl40300-keypad - fix handling of "all ground" rows
+    - LP: #615548
+  * ARM: 6201/1: RealView: Do not use outer_sync() on ARM11MPCore boards
+    with L220
+    - LP: #615548
+  * ARM: 6226/1: fix kprobe bug in ldr instruction emulation
+    - LP: #615548
+  * x86: Do not try to disable hpet if it hasn't been initialized before
+    - LP: #615548
+  * staging: rtl8192su: add USB VID/PID for HWNUm-300
+    - LP: #615548
+  * Staging: rtl8192su: add USB ID for 0bda:8171
+    - LP: #615548
+  * USB: obey the sysfs power/wakeup setting
+    - LP: #615548
+  * USB: g_serial: don't set low_latency flag
+    - LP: #615548
+  * USB: g_serial: fix tty cleanup on unload
+    - LP: #615548
+  * USB: option: add support for 1da5:4518
+    - LP: #615548
+  * USB: Add PID for Sierra 250U to drivers/usb/serial/sierra.c
+    - LP: #599569, #615548
+  * USB: ftdi_sio: support for Signalyzer tools based on FTDI chips
+    - LP: #615548
+  * USB: option: Add support for AMOI Skypephone S2
+    - LP: #615548
+  * USB: adds Artisman USB dongle to list of quirky devices
+    - LP: #615548
+  * USB: sisusbvga: Fix for USB 3.0
+    - LP: #615548
+  * USB: add quirk for Broadcom BT dongle
+    - LP: #615548
+  * USB: FTDI: Add support for the RT System VX-7 radio programming cable
+    - LP: #615548
+  * ethtool: Fix potential user buffer overflow for ETHTOOL_{G, S}RXFH
+    - LP: #615548
+  * ext4: Fix potential quota deadlock
+    - LP: #615548
+  * ext4: replace BUG() with return -EIO in ext4_ext_get_blocks
+    - LP: #615548
+  * ext4, jbd2: Add barriers for file systems with exernal journals
+    - LP: #615548
+  * ext4: Eliminate potential double free on error path
+    - LP: #615548
+  * ext4: return correct wbc.nr_to_write in ext4_da_writepages
+    - LP: #615548
+  * ext4: Ensure zeroout blocks have no dirty metadata
+    - LP: #615548
+  * ext4: Patch up how we claim metadata blocks for quota purposes
+    - LP: #615548
+  * ext4: Fix accounting of reserved metadata blocks
+    - LP: #615548
+  * ext4: Calculate metadata requirements more accurately
+    - LP: #615548
+  * ext4: Handle -EDQUOT error on write
+    - LP: #615548
+  * ext4: Fix quota accounting error with fallocate
+    - LP: #615548
+  * ext4: Drop EXT4_GET_BLOCKS_UPDATE_RESERVE_SPACE flag
+    - LP: #615548
+  * ext4: Use bitops to read/modify EXT4_I(inode)->i_state
+    - LP: #615548
+  * ext4: Fix BUG_ON at fs/buffer.c:652 in no journal mode
+    - LP: #615548
+  * ext4: Add flag to files with blocks intentionally past EOF
+    - LP: #615548
+  * ext4: Fix fencepost error in chosing choosing group vs file
+    preallocation.
+    - LP: #615548
+  * ext4: fix error handling in migrate
+    - LP: #615548
+  * ext4: explicitly remove inode from orphan list after failed direct io
+    - LP: #615548
+  * ext4: Handle non empty on-disk orphan link
+    - LP: #615548
+  * ext4: make "offset" consistent in ext4_check_dir_entry()
+    - LP: #615548
+  * ext4: Fix insertion point of extent in mext_insert_across_blocks()
+    - LP: #615548
+  * ext4: Fix the NULL reference in double_down_write_data_sem()
+    - LP: #615548
+  * ext4: Code cleanup for EXT4_IOC_MOVE_EXT ioctl
+    - LP: #615548
+  * ext4: Fix estimate of # of blocks needed to write indirect-mapped files
+    - LP: #615548
+  * ext4: Fixed inode allocator to correctly track a flex_bg's used_dirs
+    - LP: #615548
+  * ext4: Fix possible lost inode write in no journal mode
+    - LP: #615548
+  * ext4: Fix buffer head leaks after calls to ext4_get_inode_loc()
+    - LP: #615548
+  * ext4: Issue the discard operation *before* releasing the blocks to be
+    reused
+    - LP: #615548
+  * ext4: check missed return value in ext4_sync_file()
+    - LP: #615548
+  * ext4: fix memory leaks in error path handling of ext4_ext_zeroout()
+    - LP: #615548
+  * ext4: Remove unnecessary call to ext4_get_group_desc() in mballoc
+    - LP: #615548
+  * ext4: rename ext4_mb_release_desc() to ext4_mb_unload_buddy()
+    - LP: #615548
+  * ext4: allow defrag (EXT4_IOC_MOVE_EXT) in 32bit compat mode
+    - LP: #615548
+  * ext4: fix quota accounting in case of fallocate
+    - LP: #615548
+  * ext4: check s_log_groups_per_flex in online resize code
+    - LP: #615548
+  * ext4: don't return to userspace after freezing the fs with a mutex held
+    - LP: #615548
+  * ext4: stop issuing discards if not supported by device
+    - LP: #615548
+  * ext4: don't scan/accumulate more pages than mballoc will allocate
+    - LP: #615548
+  * ext4: Do not zero out uninitialized extents beyond i_size
+    - LP: #615548
+  * ext4: clean up inode bitmaps manipulation in ext4_free_inode
+    - LP: #615548
+  * ext4: init statistics after journal recovery
+    - LP: #615548
+  * ext4: Remove extraneous newlines in ext4_msg() calls
+    - LP: #615548
+  * ext4: Prevent creation of files larger than RLIMIT_FSIZE using
+    fallocate
+    - LP: #615548
+  * ext4: check for a good block group before loading buddy pages
+    - LP: #615548
+  * ext4: Show journal_checksum option
+    - LP: #615548
+  * ext4: Use bitops to read/modify i_flags in struct ext4_inode_info
+    - LP: #615548
+  * ext4: Avoid crashing on NULL ptr dereference on a filesystem error
+    - LP: #615548
+  * ext4: Clear the EXT4_EOFBLOCKS_FL flag only when warranted
+    - LP: #615548
+  * ext4: restart ext4_ext_remove_space() after transaction restart
+    - LP: #615548
+  * ext4: Conditionally define compat ioctl numbers
+    - LP: #615548
+  * ext4: Fix compat EXT4_IOC_ADD_GROUP
+    - LP: #615548
+  * ext4: Make fsync sync new parent directories in no-journal mode
+    - LP: #615548
+  * KVM: MMU: Remove user access when allowing kernel access to gpte.w=0
+    page
+    - LP: #615548
+  * KVM: SVM: Handle MCEs early in the vmexit process
+    - LP: #615548
+  * KVM: SVM: Implement workaround for Erratum 383
+    - LP: #615548
+  * KVM: MMU: invalidate and flush on spte small->large page size change
+    - LP: #615548
+  * futex: futex_find_get_task remove credentails check
+    - LP: #615548
+  * GFS2: Fix up system xattrs
+    - LP: #615548
+  * PM / x86: Save/restore MISC_ENABLE register
+    - LP: #615548
+  * ACPI: skip checking BM_STS if the BIOS doesn't ask for it
+    - LP: #615548
+  * ACPI: Unconditionally set SCI_EN on resume
+    - LP: #615548
+  * libertas/sdio: 8686: set ECSI bit for 1-bit transfers
+    - LP: #615548
+  * dm9000: fix "BUG: spinlock recursion"
+    - LP: #615548
+  * firmware_class: fix memory leak - free allocated pages
+    - LP: #615548
+  * revert "[CPUFREQ] remove rwsem lock from CPUFREQ_GOV_STOP call (second
+    call site)"
+    - LP: #615548
+  * ALSA: Echoaudio, fix Guru Meditation #00000005.48454C50
+    - LP: #615548
+  * V4L/DVB: dvb-core: Fix ULE decapsulation bug
+    - LP: #615548
+  * V4L/DVB: FusionHDTV: Use quick reads for I2C IR device probing
+    - LP: #615548
+  * forcedeth: fix tx limit2 flag check
+    - LP: #615548
+  * staging: rtl8192su: add Support for Belkin F5D8053 v6
+    - LP: #615548
+  * MIPS FPU emulator: allow Cause bits of FCSR to be writeable by ctc1
+    - LP: #615548
+  * V4L/DVB: budget: Select correct frontends
+    - LP: #615548
+  * cxgb3: fix linkup issue
+    - LP: #615548
+  * mac80211: fix supported rates IE if AP doesn't give us it's rates
+    - LP: #615548
+  * V4L/DVB: uvcvideo: Add support for unbranded Arkmicro 18ec:3290 webcams
+    - LP: #615548
+  * V4L/DVB: uvcvideo: Add support for Packard Bell EasyNote MX52
+    integrated webcam
+    - LP: #615548
+  * V4L/DVB: uvcvideo: Add support for V4L2_PIX_FMT_Y16
+    - LP: #615548
+  * iwlagn: verify flow id in compressed BA packet
+    - LP: #615548
+  * kbuild: Fix modpost segfault
+    - LP: #615548
+  * eeepc-laptop: check wireless hotplug events
+    - LP: #615548
+  * Fix spinaphore down_spin()
+    - LP: #615548
+  * ath5k: initialize ah->ah_current_channel
+    - LP: #615548
+  * Input: RX51 keymap - fix recent compile breakage
+    - LP: #615548
+  * V4L/DVB (13830): uvcvideo: add another YUYV format GUID for iSight
+    cameras
+    - LP: #615548
+  * Linux 2.6.32.17
+    - LP: #615548
+  * drm/i915: fix hibernation since i915 self-reclaim fixes
+    - LP: #615548
+  * drm/i915: add 'reclaimable' to i915 self-reclaimable page allocations
+    - LP: #615548
+  * i915: fix lock imbalance on error path...
+    - LP: #615548
+  * drm/i915: Define MI_ARB_STATE bits
+    - LP: #615548
+  * drm/i915: enable low power render writes on GEN3 hardware.
+    - LP: #615548
+  * drm/i915: Make G4X-style PLL search more permissive
+    - LP: #615548
+  * drm/radeon/r200: handle more hw tex coord types
+    - LP: #615548
+  * drm/radeon/r100/r200: fix calculation of compressed cube maps
+    - LP: #615548
+  * drm/radeon/kms: CS checker texture fixes for r1xx/r2xx/r3xx
+    - LP: #615548
+  * drm/radeon/kms: fix shared ddc handling
+    - LP: #615548
+  * drm/radeon/kms: fix shared ddc harder
+    - LP: #615548
+  * drm/radeon/kms: add quirk for ASUS HD 3600 board
+    - LP: #615548
+  * drm/radeon/kms: fix possible mis-detection of sideport on rs690/rs740
+    - LP: #615548
+  * drm/radeon/kms: fix legacy LVDS dpms sequence
+    - LP: #615548
+  * drm/radeon/kms: fix legacy tv-out pal mode
+    - LP: #615548
+  * Linux 2.6.32.17+drm33.7
+    - LP: #615548
+  * (pre-stable) writeback: remove the always false
+    bdi_cap_writeback_dirty() test
+    - LP: #543617, #585092
+  * (pre-stable) writeback: remove unused nonblocking and congestion checks
+    - LP: #543617, #585092
+  * (pre-stable) vfs: improve writeback_inodes_wb()
+    - LP: #543617, #585092
+  * (pre-stable) writeback: add missing kernel-doc notation
+    - LP: #543617, #585092
+  * (pre-stable) writeback: fix writeback completion notifications
+    - LP: #543617, #585092
+  * (pre-stable) writeback: queue work on stack in writeback_inodes_sb
+    - LP: #543617, #585092
+  * (pre-stable) writeback: enforce s_umount locking in writeback_inodes_sb
+    - LP: #543617, #585092
+  * (pre-stable) writeback: fix writeback_inodes_wb from
+    writeback_inodes_sb
+    - LP: #543617, #585092
+  * (pre-stable) writeback: simplify wakeup_flusher_threads
+    - LP: #543617, #585092
+  * (pre-stable) writeback: simplify and split bdi_start_writeback
+    - LP: #543617, #585092
+  * (pre-stable) writeback: add missing requeue_io in writeback_inodes_wb
+    - LP: #543617, #585092
+  * (pre-stable) writeback: fix pin_sb_for_writeback
+    - LP: #543617, #585092
+  * (pre-stable) writeback: remove writeback_inodes_wbc
+    - LP: #543617, #585092
+  * (pre-stable) writeback: split writeback_inodes_wb
+    - LP: #543617, #585092
+  * (pre-stable) writeback: simplify the write back thread queue
+    - LP: #543617, #585092
+  * (pre-stable) Fix compiling NFS when backporting writeback
+    - LP: #543617, #585092
+  * sched: cgroup: Implement different treatment for idle shares
+    - LP: #620755
+  * mm: fix ia64 crash when gcore reads gate area
+    - LP: #620755
+  * acl trouble after upgrading ubuntu
+    - LP: #620755
+  * comedi: Uncripple 8255-based DIO subdevices
+    - LP: #620755
+  * NFS: kswapd must not block in nfs_release_page
+    - LP: #620755
+  * PARISC: led.c - fix potential stack overflow in led_proc_write()
+    - LP: #620755
+  * arm/imx/gpio: add spinlock protection
+    - LP: #620755
+  * parisc: pass through '\t' to early (iodc) console
+    - LP: #620755
+  * amd64_edac: Fix DCT base address selector
+    - LP: #620755
+  * amd64_edac: Correct scrub rate setting
+    - LP: #620755
+  * e1000e: don't inadvertently re-set INTX_DISABLE
+    - LP: #620755
+  * e1000e: 82577/82578 PHY register access issues
+    - LP: #620755
+  * 9p: strlen() doesn't count the terminator
+    - LP: #620755
+  * ath9k: enable serialize_regmode for non-PCIE AR9160
+    - LP: #620755
+  * ath9k_hw: fix an off-by-one error in the PDADC boundaries calculation
+    - LP: #620755
+  * ath9k: fix TSF after reset on AR913x
+    - LP: #620755
+  * ath9k: fix yet another buffer leak in the tx aggregation code
+    - LP: #620755
+  * iwlwifi: fix scan abort
+    - LP: #620755
+  * cfg80211: ignore spurious deauth
+    - LP: #620755
+  * cfg80211: don't get expired BSSes
+    - LP: #620755
+  * xfs: prevent swapext from operating on write-only files
+    - LP: #620755
+  * SCSI: enclosure: fix error path - actually return ERR_PTR() on error
+    - LP: #620755
+  * GFS2: rename causes kernel Oops
+    - LP: #620755
+  * slow-work: use get_ref wrapper instead of directly calling get_ref
+    - LP: #620755
+  * CIFS: Remove __exit mark from cifs_exit_dns_resolver()
+    - LP: #620755
+  * CIFS: Fix compile error with __init in cifs_init_dns_resolver()
+    definition
+    - LP: #620755
+  * xen: drop xen_sched_clock in favour of using plain wallclock time
+    - LP: #620755
+  * ssb: do not read SPROM if it does not exist
+    - LP: #620755
+  * ssb: Look for SPROM at different offset on higher rev CC
+    - LP: #620755
+  * ssb: fix NULL ptr deref when pcihost_wrapper is used
+    - LP: #620755
+  * ssb: Handle alternate SSPROM location
+    - LP: #620755
+  * Linux 2.6.32.18
+    - LP: #620755
+  * ata_piix: fix locking around SIDPR access
+    - LP: #622877
+  * powerpc: fix build with make 3.82
+    - LP: #622877
+  * nvram: Fix write beyond end condition; prove to gcc copy is safe
+    - LP: #622877
+  * x86: Add memory modify constraints to xchg() and cmpxchg()
+    - LP: #622877
+  * x86, vmware: Preset lpj values when on VMware.
+    - LP: #622877
+  * Staging: line6: needs to select SND_PCM
+    - LP: #622877
+  * Staging: panel: Prevent double-calling of parport_release - fix oops.
+    - LP: #622877
+  * PCI: Do not run NVidia quirks related to MSI with MSI disabled
+    - LP: #622877
+  * PCI: disable MSI on VIA K8M800
+    - LP: #622877
+  * solos-pci: Fix race condition in tasklet RX handling
+    - LP: #622877
+  * splice: fix misuse of SPLICE_F_NONBLOCK
+    - LP: #622877
+  * drivers/video/w100fb.c: ignore void return value / fix build failure
+    - LP: #622877
+  * ide-cd: Do not access completed requests in the irq handler
+    - LP: #622877
+  * md/raid10: fix deadlock with unaligned read during resync
+    - LP: #622877
+  * blkdev: cgroup whitelist permission fix
+    - LP: #622877
+  * eCryptfs: Handle ioctl calls with unlocked and compat functions
+    - LP: #622877
+  * ecryptfs: release reference to lower mount if interpose fails
+    - LP: #622877
+  * fs/ecryptfs/file.c: introduce missing free
+    - LP: #622877
+  * bio, fs: update RWA_MASK, READA and SWRITE to match the corresponding
+    BIO_RW_* bits
+    - LP: #622877
+  * signalfd: fill in ssi_int for posix timers and message queues
+    - LP: #622877
+  * smsc911x: Add spinlocks around registers access
+    - LP: #622877
+  * ARM: 6299/1: errata: TLBIASIDIS and TLBIMVAIS operations can broadcast
+    a faulty ASID
+    - LP: #622877
+  * ARM: 6280/1: imx: Fix build failure when including <mach/gpio.h>
+    without <linux/spinlock.h>
+    - LP: #622877
+  * USB: resizing usbmon binary interface buffer causes protection faults
+    - LP: #622877
+  * USB delay init quirk for logitech Harmony 700-series devices
+    - LP: #622877
+  * USB: serial: enabling support for Segway RMP in ftdi_sio
+    - LP: #622877
+  * USB: option: Huawei ETS 1220 support added
+    - LP: #622877
+  * USB: option: add huawei k3765 k4505 devices to work properly
+    - LP: #622877
+  * USB: ftdi_sio: device id for Navitator
+    - LP: #622877
+  * USB: cp210x: Add four new device IDs
+    - LP: #622877
+  * USB: usbtest: avoid to free coherent buffer in atomic context
+    - LP: #622877
+  * USB: fix thread-unsafe anchor utiliy routines
+    - LP: #622877
+  * drm/edid: Fix the HDTV hack sync adjustment
+    - LP: #622877
+  * Bluetooth: Added support for controller shipped with iMac i5
+    - LP: #622877
+  * jfs: don't allow os2 xattr namespace overlap with others
+    - LP: #622877
+  * arp_notify: allow drivers to explicitly request a notification event.
+    - LP: #622877
+  * xen: netfront: explicitly generate arp_notify event after migration.
+    - LP: #622877
+  * net: Fix NETDEV_NOTIFY_PEERS to not conflict with
+    NETDEV_BONDING_DESLAVE.
+    - LP: #622877
+  * irq: Add new IRQ flag IRQF_NO_SUSPEND
+    - LP: #622877
+  * xen: Do not suspend IPI IRQs.
+    - LP: #622877
+  * drm/i915: Use RSEN instead of HTPLG for tfp410 monitor detection.
+    - LP: #622877
+  * Btrfs: Avoid superfluous tree-log writeout
+    - LP: #622877
+  * Btrfs: Add btrfs_duplicate_item
+    - LP: #622877
+  * Btrfs: Rewrite btrfs_drop_extents
+    - LP: #622877
+  * Btrfs: Fix disk_i_size update corner case
+    - LP: #622877
+  * Btrfs: Avoid orphan inodes cleanup while replaying log
+    - LP: #622877
+  * Btrfs: Avoid orphan inodes cleanup during committing transaction
+    - LP: #622877
+  * Btrfs: Make fallocate(2) more ENOSPC friendly
+    - LP: #622877
+  * Btrfs: Make truncate(2) more ENOSPC friendly
+    - LP: #622877
+  * Btrfs: Pass transaction handle to security and ACL initialization
+    functions
+    - LP: #622877
+  * Btrfs: Add delayed iput
+    - LP: #622877
+  * Btrfs: Fix btrfs_drop_extent_cache for skip pinned case
+    - LP: #622877
+  * Btrfs: Fix per root used space accounting
+    - LP: #622877
+  * Btrfs: don't add extent 0 to the free space cache v2
+    - LP: #622877
+  * Btrfs: fail mount on bad mount options
+    - LP: #622877
+  * Btrfs: deny sys_link across subvolumes.
+    - LP: #622877
+  * Btrfs: Show discard option in /proc/mounts
+    - LP: #622877
+  * Btrfs: make metadata chunks smaller
+    - LP: #622877
+  * Btrfs: make sure fallocate properly starts a transaction
+    - LP: #622877
+  * btrfs: fix missing last-entry in readdir(3)
+    - LP: #622877
+  * Btrfs: align offsets for btrfs_ordered_update_i_size
+    - LP: #622877
+  * Btrfs, fix memory leaks in error paths
+    - LP: #622877
+  * Btrfs: Fix race in btrfs_mark_extent_written
+    - LP: #622877
+  * Btrfs: fix regression in orphan cleanup
+    - LP: #622877
+  * Btrfs: deal with NULL acl sent to btrfs_set_acl
+    - LP: #622877
+  * Btrfs: fix possible panic on unmount
+    - LP: #622877
+  * Btrfs: Use correct values when updating inode i_size on fallocate
+    - LP: #622877
+  * Btrfs: fix a memory leak in btrfs_init_acl
+    - LP: #622877
+  * Btrfs: run orphan cleanup on default fs root
+    - LP: #622877
+  * Btrfs: do not mark the chunk as readonly if in degraded mode
+    - LP: #622877
+  * Btrfs: check return value of open_bdev_exclusive properly
+    - LP: #622877
+  * Btrfs: check total number of devices when removing missing
+    - LP: #622877
+  * Btrfs: fix race between allocate and release extent buffer.
+    - LP: #622877
+  * Btrfs: make error return negative in btrfs_sync_file()
+    - LP: #622877
+  * Btrfs: remove BUG_ON() due to mounting bad filesystem
+    - LP: #622877
+  * Btrfs: Fix oopsen when dropping empty tree.
+    - LP: #622877
+  * Btrfs: do not try and lookup the file extent when finishing ordered io
+    - LP: #622877
+  * Btrfs: apply updated fallocate i_size fix
+    - LP: #622877
+  * Btrfs: btrfs_mark_extent_written uses the wrong slot
+    - LP: #622877
+  * Btrfs: kfree correct pointer during mount option parsing
+    - LP: #622877
+  * nohz: Introduce arch_needs_cpu
+    - LP: #622877
+  * nohz: Reuse ktime in sub-functions of tick_check_idle.
+    - LP: #622877
+  * timekeeping: Fix clock_gettime vsyscall time warp
+    - LP: #622877
+  * sched: Fix granularity of task_u/stime()
+    - LP: #622877
+  * sched, cputime: Introduce thread_group_times()
+    - LP: #622877
+  * mutex: Don't spin when the owner CPU is offline or other weird cases
+    - LP: #622877
+  * fix SBA IOMMU to handle allocation failure properly
+    - LP: #622877
+  * crypto: testmgr - Fix complain about lack test for internal used
+    algorithm
+    - LP: #622877
+  * memory hotplug: fix a bug on /dev/mem for 64-bit kernels
+    - LP: #622877
+  * x86: Fix out of order of gsi
+    - LP: #622877
+  * HWPOISON: remove the anonymous entry
+    - LP: #622877
+  * HWPOISON: abort on failed unmap
+    - LP: #622877
+  * powerpc/eeh: Fix a bug when pci structure is null
+    - LP: #622877
+  * ACPI: Fix regression where _PPC is not read at boot even when
+    ignore_ppc=0
+    - LP: #622877
+  * ext4: Make sure the MOVE_EXT ioctl can't overwrite append-only files
+    - LP: #622877
+  * ext4: Fix optional-arg mount options
+    - LP: #622877
+  * reiserfs: properly honor read-only devices
+    - LP: #622877
+  * reiserfs: fix oops while creating privroot with selinux enabled
+    - LP: #622877
+  * dlm: always use GFP_NOFS
+    - LP: #622877
+  * dlm: fix ordering of bast and cast
+    - LP: #622877
+  * dlm: send reply before bast
+    - LP: #622877
+  * ocfs2: Find proper end cpos for a leaf refcount block.
+    - LP: #622877
+  * ocfs2: Set MS_POSIXACL on remount
+    - LP: #622877
+  * Skip check for mandatory locks when unlocking
+    - LP: #622877
+  * loop: Update mtime when writing using aops
+    - LP: #622877
+  * aic79xx: check for non-NULL scb in ahd_handle_nonpkt_busfree
+    - LP: #622877
+  * ibmvfc: Fix command completion handling
+    - LP: #622877
+  * ibmvfc: Reduce error recovery timeout
+    - LP: #622877
+  * md/raid1: delay reads that could overtake behind-writes.
+    - LP: #622877
+  * mm: fix corruption of hibernation caused by reusing swap during image
+    saving
+    - LP: #622877
+  * Linux 2.6.32.19
+    - LP: #622877
+  * Linux 2.6.32.20
+    - LP: #622882
+  * memstick: fix hangs on unexpected device removal in mspro_blk
+    - LP: #625392
+  * ASoC: Fix inverted mute controls for WM8580
+    - LP: #625392
+  * ASoC: Remove DSP mode support for WM8776
+    - LP: #625392
+  * ALSA: riptide - Fix detection / load of firmware files
+    - LP: #625392
+  * ALSA: emu10k1 - delay the PCM interrupts (add pcm_irq_delay parameter)
+    - LP: #625392
+  * ALSA: hda - Fix missing stream for second ADC on Realtek ALC260 HDA
+    codec
+    - LP: #625392
+  * ocfs2: do not overwrite error codes in ocfs2_init_acl
+    - LP: #625392
+  * ocfs2/dlm: fix a dead lock
+    - LP: #625392
+  * ocfs2 fix o2dlm dlm run purgelist (rev 3)
+    - LP: #625392
+  * ocfs2: Count more refcount records in file system fragmentation.
+    - LP: #625392
+  * ocfs2/dlm: avoid incorrect bit set in refmap on recovery master
+    - LP: #625392
+  * ocfs2/dlm: remove potential deadlock -V3
+    - LP: #625392
+  * x86, hotplug: Serialize CPU hotplug to avoid bringup concurrency issues
+    - LP: #625392
+  * x86, apic: Fix apic=debug boot crash
+    - LP: #625392
+  * Fix the nested PR lock calling issue in ACL
+    - LP: #625392
+  * hwmon: (pc87360) Fix device resource declaration
+    - LP: #625392
+  * ARM: Tighten check for allowable CPSR values
+    - LP: #625392
+  * nfs: Add "lookupcache" to displayed mount options
+    - LP: #625392
+  * ath5k: disable ASPM L0s for all cards
+    - LP: #625392
+  * pxa3xx: fix ns2cycle equation
+    - LP: #625392
+  * dm mpath: fix NULL pointer dereference when path parameters missing
+    - LP: #625392
+  * dm ioctl: release _hash_lock between devices in remove_all
+    - LP: #625392
+  * mm: make the vma list be doubly linked
+    - LP: #625392
+  * mm: make the mlock() stack guard page checks stricter
+    - LP: #625392
+  * mm: make stack guard page logic use vm_prev pointer
+    - LP: #625392
+  * slab: fix object alignment
+    - LP: #625392
+  * sunxvr500: Ignore secondary output PCI devices.
+    - LP: #625392
+  * sparc64: Add missing ID to parport probing code.
+    - LP: #625392
+  * sparc64: Fix rwsem constant bug leading to hangs.
+    - LP: #625392
+  * sparc64: Fix atomic64_t routine return values.
+    - LP: #625392
+  * net: Fix a memmove bug in dev_gro_receive()
+    - LP: #625392
+  * isdn: fix information leak
+    - LP: #625392
+  * act_nat: the checksum of ICMP doesn't have pseudo header
+    - LP: #625392
+  * vmscan: raise the bar to PAGEOUT_IO_SYNC stalls
+    - LP: #625392
+  * pcmcia: avoid buffer overflow in pcmcia_setup_isa_irq
+    - LP: #625392
+  * ext4: consolidate in_range() definitions
+    - LP: #625392
+  * Oprofile: Change CPUIDS from decimal to hex, and add some comments
+    - LP: #625392
+  * oprofile: add support for Intel processor model 30
+    - LP: #625392
+  * fixes for using make 3.82
+    - LP: #625392
+  * ALSA: intel8x0: Mute External Amplifier by default for ThinkPad X31
+    - LP: #619439, #625392
+  * netlink: fix compat recvmsg
+    - LP: #625392
+  * powerpc: Fix typo in uImage target
+    - LP: #625392
+  * USB: option: add Celot CT-650
+    - LP: #625392
+  * USB: add device IDs for igotu to navman
+    - LP: #625392
+  * USB: pl2303: New vendor and product id
+    - LP: #625392
+  * USB: CP210x Fix Break On/Off
+    - LP: #625392
+  * USB: ftdi_sio: fix endianess of max packet size
+    - LP: #625392
+  * USB: io_ti: check firmware version before updating
+    - LP: #625392
+  * USB: xhci: Remove buggy assignment in next_trb()
+    - LP: #625392
+  * USB: ftdi_sio: Add ID for Ionics PlugComputer
+    - LP: #625392
+  * USB: ftdi_sio: add product ID for Lenz LI-USB
+    - LP: #625392
+  * x86, apic: ack all pending irqs when crashed/on kexec
+    - LP: #625392
+  * Linux 2.6.32.21
+    - LP: #625392
+
+ -- Brad Figg <brad.figg@canonical.com>  Thu, 09 Sep 2010 10:24:41 -0700
+
+linux-mvl-dove (2.6.32-209.25) lucid-proposed; urgency=low
+
+  [ Stefan Bader ]
+
+  * Rebased to 2.6.32-24.42
+
+  [ Eric Miao ]
+
+  * Sync config with Dove LSP 5.3.2
+    - LP: #611634
+
+  [ Upstream Kernel Changes ]
+
+  * Revert "erratum of VLDR instruction bug in Thumb-2 mode"
+    - LP: #611634
+  * KG2: Add input/output timing auto-configuration functions (daemon
+    required)
+    - LP: #611634
+  * AV-D1 X0 EC key driver
+    - LP: #611634
+  * move VGA EDID to i2c bus 1 (avd1r2 ECN6)
+    - LP: #611634
+  * dove: add some drivers and code dependency on MV_HAL_DRIVERS_SUPPORT
+    - LP: #611634
+  * Hwmon: Add support for setting the Overheat and Overcool temperature
+    thresholds.
+    - LP: #611634
+  * chromium : enable CONFIG_SECURITY_FILE_CAPABILITIES in dove_defconfig
+    - LP: #611634
+  * chromium : enable CONFIG_BLK_DEV_DM and CONFIG_DM_CRYPT to let
+    cryptohome work
+    - LP: #611634
+  * pmu: reduce code to make it fit into sram
+    - LP: #611634
+  * refine the mechanism for multiple lcd controller to store color key
+    related registers when suspending.
+    - LP: #611634
+  * Support for command-line tool: kg2cfg
+    - LP: #611634
+  * ANX7150: Fix screen displays on and off several times for some HDMI TVs
+    - LP: #611634
+  * Hide AD9889 debug message
+    - LP: #611634
+  * usb: fix issue when USB host ask for string descriptor and USB device
+    answer with exact 128 bytes.
+    - LP: #611634
+  * dove: add support for the temporary DB-88AP510-BP-B board
+    - LP: #611634
+  * dove: add support for mpp modes used by DB-88AP510-BP-B board
+    - LP: #611634
+  * sound: added codec driver for ALC655
+    - LP: #611634
+  * sound: cleaned compilation warning in dove avengers ac97
+    - LP: #611634
+  * sound: add board support for AC97 driver for dove-db-b board
+    - LP: #611634
+  * mv_sata: fix bug in the scsi translation layer
+    - LP: #611634
+  * mvSata: add support for KW2 sata
+    - LP: #611634
+  * Exernal VGA clock for Dove DB
+    - LP: #611634
+  * NAND: Driver reorganization and support for new 24bit ECC devices
+    - LP: #611634
+  * NAND: change read delay from absolut to RnB based
+    - LP: #611634
+  * VMETA PM function: add a wait queue for syncing the vmeta
+    suspend/resume
+    - LP: #611634
+  * dove: enable the new nand driver
+    - LP: #611634
+  * dove: fix power management support for new db board
+    - LP: #611634
+  * galcore: sync with gc600_driver
+    - LP: #611634
+  * dove: add LFE and Surround dai to dove db-b
+    - LP: #611634
+  * convert idt clock generator to i2c platform driver
+    - LP: #611634
+  * dove giga: add wake on lan support
+    - LP: #611634
+  * dove: set gpio #1 to 1 to driver the giga phy reset
+    - LP: #611634
+  * dove: fix build issue in clock.h
+    - LP: #611634
+  * dove: add clk_dev insterface to the idt clock generator
+    - LP: #611634
+  * dove: enable the idt clock generator driver
+    - LP: #611634
+  * dove LCD: add support for using external clk reference for A0
+    - LP: #611634
+  * remove unused code
+    - LP: #611634
+  * avoid phy reset on resume when wol enabled
+    - LP: #611634
+  * dove: fix SPI flash model and size found on db board
+    - LP: #611634
+  * dove: fix typo in dove-db mpp's description
+    - LP: #611634
+  * dove: fix sdio workaround to config all sd gpio's as input
+    - LP: #611634
+  * sdhci-mv: fix bug when that caused to toggle the wrong bit in the
+    function select register
+    - LP: #611634
+  * NAND: PIO support for naked symantics
+    - LP: #611634
+  * NAND: changes to adapt to Uboot driver
+    - LP: #611634
+  * NAND: Bus timing optimizations for the Samsung K9HBG08U1A
+    - LP: #611634
+  * dove sound: enable surround and center outputs on Realtek 655 codec for
+    any channels number
+    - LP: #611634
+  * fix out of memory problem when playing moives and enter display blank
+    mode.
+    - LP: #611634
+  * fix EDID issue: LCD0 get edid from I2C 0x3f, LCD1 from I2C 0x50.
+    (support E-EDID feature)
+    - LP: #611634
+  * remove unwanted space.
+    - LP: #611634
+  * Add dynamic detect monitor connection and get EDID information.
+    - LP: #611634
+  * add fake EDID for LCD panel on LCD0
+    - LP: #611634
+  * dove: update debugger reset/unreset code in deepidle code for Dove-A0
+    - LP: #611634
+  * dove sound: disble debug mode in RealTek 655 codec
+    - LP: #611634
+  * video: enable building the adi9889 display driver as module
+    - LP: #611634
+  * video: make the adi9889 detect i2c client (edid or ) using driver_data
+    instead of i2c address
+    - LP: #611634
+  * dove: add the adi9889 i2c device to dove db board
+    - LP: #611634
+  * dove db: support for adi9889 HDMI to DVI module
+    - LP: #611634
+  * video: add ths display driver
+    - LP: #611634
+  * dove db: add ths8200 and board parameter for the LCD2DVI module
+    - LP: #611634
+  * galcore: sync Makefile
+    - LP: #611634
+  * bmm : sync with bmm-lib
+    - LP: #611634
+  * idt clock: add error messages
+    - LP: #611634
+  * idt clock: add sysfs file for each output clock
+    - LP: #611634
+  * adi9889 display: enable 1080i mode
+    - LP: #611634
+  * dove: add support for 88AP510 rev A0
+    - LP: #611634
+  * idt clock: use i2c messages for reading
+    - LP: #611634
+  * idt clock: configure the Loop filter
+    - LP: #611634
+  * dove pm: fix build error when mv6xxx i2c expander disabled
+    - LP: #611634
+  * idt clock: disable pll's by default
+    - LP: #611634
+  * dovefb: disable external clock when entering blank mode
+    - LP: #611634
+  * dove: support using external lcd clocks for dove db
+    - LP: #611634
+  * mtd nand: fix bug in orion_nfs_hal when addressing orion_nfc_info
+    structure
+    - LP: #611634
+  * dove: fix bug in clk setting from command line
+    - LP: #611634
+  * dove: enable co-processor dual issue mode for Dove rev. A0
+    - LP: #611634
+  * tools: add tool for reading/writing ethernet phy registers
+    - LP: #611634
+  * erratum of VLDR instruction bug in Thumb-2 mode. The workaround should
+    not affect by the setting of ai_usermode.
+    - LP: #611634
+  * Staging: android: binder: Create dedicated workqueue for binder
+    deferred work
+    - LP: #611634
+  * dove: skip VLDR Thumb errara workaround for the cpu revisions where
+    that bug is fixed
+    - LP: #611634
+  * DOVE PM: Deep-Idle debugger reset fix in A0
+    - LP: #611634
+  * dove: enable DeepIdle feature by default
+    - LP: #611634
+  * dove: make the LCD clk settings depend on A0 revision of the chip
+    - LP: #611634
+  * dove: the DB revision B board have the same ID is DB rev A boards
+    - LP: #611634
+  * dove: fixed bug in the PMU interrupts handler when clearing the cause
+    register
+    - LP: #611634
+  * adi display: keep the default edid address
+    - LP: #611634
+  * dove: set the edid information for all machines
+    - LP: #611634
+  * GC600: Fix bug that cause to crash when doing hibernate Driver tries to
+    enable clock gating during GPU hardware initialization. CPU needs to
+    stall a little time to wait for GPU ready
+    - LP: #611634
+  * Dove PM: invalidate L2 entry that get filled due to temporary mapping
+    - LP: #611634
+  * dove: use read modify write when updating the Auxiliary Funcion modes
+    register
+    - LP: #611634
+  * dove: print the value of Auxiliary Functional Modes Control
+    - LP: #611634
+  * dove: use marvell toolchain for building the tools
+    - LP: #611634
+  * dove: update support for the SB videoplug board
+    - LP: #611634
+
+  [ Ubuntu: 2.6.32-24.42 ]
+
+  * (pre-stable) drm/i915: add PANEL_UNLOCK_REGS definition
+    - LP: #561802, #578673
+  * (pre-stable) drm/i915: make sure eDP panel is turned on
+    - LP: #578673
+  * (pre-stable) drm/i915: make sure we shut off the panel in eDP configs
+    - LP: #578673
+
+ -- Stefan Bader <stefan.bader@canonical.com>  Fri, 20 Aug 2010 16:16:39 +0200
+
+linux-mvl-dove (2.6.32-208.24) lucid-security; urgency=low
+
+  [ Stefan Bader ]
+
+  * Rebased to 2.6.32-24.41
+
+  [ Ubuntu: 2.6.32-24.41 ]
+
+  * (pre-stable) ext4: fix freeze deadlock under IO
+    - LP: #595489
+  * drm: Initialize ioctl struct when no user data is present
+    - CVE-2010-2803
+  * can: add limit for nframes and clean up signed/unsigned variables
+    - CVE-2010-2959
+  * mm: keep a guard page below a grow-down stack segment
+    - CVE-2010-2240
+  * mm: fix missing page table unmap for stack guard page failure case
+    - CVE-2010-2240
+  * mm: fix page table unmap for stack guard page properly
+    - CVE-2010-2240
+  * mm: fix up some user-visible effects of the stack guard page
+    - CVE-2010-2240
+  * x86: don't send SIGBUS for kernel page faults
+    - CVE-2010-2240
+
+ -- Stefan Bader <stefan.bader@canonical.com>  Wed, 18 Aug 2010 15:03:41 +0200
+
+linux-mvl-dove (2.6.32-207.21) lucid-security; urgency=low
+
+  [ Stefan Bader ]
+
+  * Rebased to 2.6.32-24.39
+
+  [ Ubuntu: 2.6.32-24.39 ]
+
+  * sctp: Fix skb_over_panic resulting from multiple invalid parameter
+    errors (CVE-2010-1173) (v4)
+    - CVE-2010-1173
+  * sctp: fix append error cause to ERROR chunk correctly
+    - CVE-2010-1173
+  * GFS2: Fix writing to non-page aligned gfs2_quota structures
+    - CVE-2010-1436
+  * KEYS: find_keyring_by_name() can gain access to a freed keyring
+    - CVE-2010-1437
+  * GFS2: Fix permissions checking for setflags ioctl()
+    - CVE-2010-1641
+  * Btrfs: should add a permission check for setfacl
+    - CVE-2010-2071
+  * ecryptfs: Bugfix for error related to ecryptfs_hash_buckets
+    - CVE-2010-2492
+
+ -- Stefan Bader <stefan.bader@canonical.com>  Wed, 21 Jul 2010 11:36:28 +0200
+
+linux-mvl-dove (2.6.32-207.20) lucid-proposed; urgency=low
+
+  [ Brad Figg ]
+
+  * Rebased to 2.6.32-24.38
+
+  [ Ubuntu: 2.6.32-24.38 ]
+
+  * SAUCE: dell-laptop: fire SMI when toggling hardware killswitch
+    (revised)
+    - LP: #590607
+  * sfc: Wait at most 10ms for the MC to finish reading out MAC statistics
+    - LP: #590783
+  * sfc: Always close net device at the end of a disabling reset
+    - LP: #590783
+  * sfc: Change falcon_probe_board() to fail for unsupported boards
+    - LP: #590783
+  * ext4: Fix potential quota deadlock
+    - LP: #588069
+  * jbd: jbd-debug and jbd2-debug should be writable
+    - LP: #588069
+  * ext4: replace BUG() with return -EIO in ext4_ext_get_blocks
+    - LP: #588069
+  * ext4, jbd2: Add barriers for file systems with exernal journals
+    - LP: #588069
+  * ext4: Eliminate potential double free on error path
+    - LP: #588069
+  * ext4: return correct wbc.nr_to_write in ext4_da_writepages
+    - LP: #588069
+  * ext4: Ensure zeroout blocks have no dirty metadata
+    - LP: #588069
+  * ext4: Patch up how we claim metadata blocks for quota purposes
+    - LP: #588069
+  * ext4: Fix accounting of reserved metadata blocks
+    - LP: #588069
+  * ext4: Calculate metadata requirements more accurately
+    - LP: #588069
+  * ext4: Handle -EDQUOT error on write
+    - LP: #588069
+  * ext4: Fix quota accounting error with fallocate
+    - LP: #588069
+  * ext4: Drop EXT4_GET_BLOCKS_UPDATE_RESERVE_SPACE flag
+    - LP: #588069
+  * ext4: Use bitops to read/modify EXT4_I(inode)->i_state
+    - LP: #588069
+  * ext4: Fix BUG_ON at fs/buffer.c:652 in no journal mode
+    - LP: #588069
+  * ext4: Add flag to files with blocks intentionally past EOF
+    - LP: #588069
+  * ext4: Fix fencepost error in chosing choosing group vs file
+    preallocation.
+    - LP: #588069
+  * ext4: fix error handling in migrate
+    - LP: #588069
+  * ext4: explicitly remove inode from orphan list after failed direct io
+    - LP: #588069
+  * ext4: Handle non empty on-disk orphan link
+    - LP: #588069
+  * ext4: make "offset" consistent in ext4_check_dir_entry()
+    - LP: #588069
+  * ext4: Fix insertion point of extent in mext_insert_across_blocks()
+    - LP: #588069
+  * ext4: Fix the NULL reference in double_down_write_data_sem()
+    - LP: #588069
+  * ext4: Code cleanup for EXT4_IOC_MOVE_EXT ioctl
+    - LP: #588069
+  * ext4: Fix estimate of # of blocks needed to write indirect-mapped files
+    - LP: #588069
+  * ext4: Fixed inode allocator to correctly track a flex_bg's used_dirs
+    - LP: #588069
+  * ext4: Fix possible lost inode write in no journal mode
+    - LP: #588069
+  * ext4: Fix buffer head leaks after calls to ext4_get_inode_loc()
+    - LP: #588069
+  * ext4: Issue the discard operation *before* releasing the blocks to be
+    reused
+    - LP: #588069
+  * ext4: check missed return value in ext4_sync_file()
+    - LP: #588069
+  * ext4: fix memory leaks in error path handling of ext4_ext_zeroout()
+    - LP: #588069
+  * ext4: Remove unnecessary call to ext4_get_group_desc() in mballoc
+    - LP: #588069
+  * ext4: rename ext4_mb_release_desc() to ext4_mb_unload_buddy()
+    - LP: #588069
+  * ext4: allow defrag (EXT4_IOC_MOVE_EXT) in 32bit compat mode
+    - LP: #588069
+  * ext4: fix quota accounting in case of fallocate
+    - LP: #588069
+  * ext4: check s_log_groups_per_flex in online resize code
+    - LP: #588069
+  * ext4: don't return to userspace after freezing the fs with a mutex held
+    - LP: #588069
+  * ext4: stop issuing discards if not supported by device
+    - LP: #588069
+  * ext4: don't scan/accumulate more pages than mballoc will allocate
+    - LP: #588069
+  * ext4: Do not zero out uninitialized extents beyond i_size
+    - LP: #588069
+  * ext4: clean up inode bitmaps manipulation in ext4_free_inode
+    - LP: #588069
+  * ext4: init statistics after journal recovery
+    - LP: #588069
+  * ext4: Remove extraneous newlines in ext4_msg() calls
+    - LP: #588069
+  * ext4: Prevent creation of files larger than RLIMIT_FSIZE using
+    fallocate
+    - LP: #588069
+  * ext4: check for a good block group before loading buddy pages
+    - LP: #588069
+  * ext4: Show journal_checksum option
+    - LP: #588069
+  * ext4: Use bitops to read/modify i_flags in struct ext4_inode_info
+    - LP: #588069
+  * ext4: Avoid crashing on NULL ptr dereference on a filesystem error
+    - LP: #588069
+  * ext4: Clear the EXT4_EOFBLOCKS_FL flag only when warranted
+    - LP: #588069
+  * ext4: restart ext4_ext_remove_space() after transaction restart
+    - LP: #588069
+  * ext4: Conditionally define compat ioctl numbers
+    - LP: #588069
+  * ext4: Fix compat EXT4_IOC_ADD_GROUP
+    - LP: #588069
+  * ext4: Make fsync sync new parent directories in no-journal mode
+    - LP: #588069
+  * (pre-stable) ahci,ata_generic: let ata_generic handle new MBP w/ MCP89
+    - LP: #576601
+  * (pre-stable) ata_generic: implement ATA_GEN_* flags and force enable
+    DMA on MBP 7,1
+    - LP: #576601
+
+ -- Brad Figg <brad.figg@canonical.com>  Wed, 07 Jul 2010 08:47:28 -0700
+
+linux-mvl-dove (2.6.32-206.19) lucid-proposed; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * rebase to Ubuntu-2.6.32-23.37
+  * ehci: follow changes to echi cache handling
+    - LP: #583414
+
+  [ Eric Miao ]
+
+  * [Config]: sync with Dove LSP 5.1.1
+    - LP: #576257
+  * SAUCE: dove: avoid page table overwrite when resuming from hibernation
+    - LP: #509006
+
+  [ Upstream Kernel Changes ]
+
+  * ARM: fix highmem with VIPT cache and DMA
+    - LP: #576257
+  * dove: disable the 2G user/kernel space split and enable HIGHMEM as the
+    highmem issue fixed
+    - LP: #576257
+  * ubifs: fix hang bug when doing suspend to disk and rootfs is over ubifs
+    - LP: #576257
+  * Fix issue:suspend/resume,TSC cannot work
+    - LP: #576257
+  * (1) Fix fail to display after resume. (2) Prepare works for KG2
+    Application mode
+    - LP: #576257
+  * Fix bug: Not clear color key enable bit in configure process
+    - LP: #576257
+  * Fix bug: read wrong register. This might cause problem in A0 chip. No
+    effect for Y0/Y1/X0.
+    - LP: #576257
+  * Fix X0 L2 way 7-4 been turned off and X0 WCO setting Wrong
+    - LP: #576257
+  * Revise for X0 WCO setting
+    - LP: #576257
+  * Fix suspend/resume issues with GC600
+    - LP: #576257
+  * Fix: gpio driver can't use mpp0 as interrupt pin
+    - LP: #576257
+  * Fix hardware cursor issue with suspend/resume
+    - LP: #576257
+  * Fixed audio recording failed after suspend/resume
+    - LP: #576257
+  * Fix Power Button event reverse error
+    - LP: #576257
+  * Fix GC600 driver crash when entering hibernation
+    - LP: #576257
+  * dove pm: restore cp15 Marvell Auxiliary Function and PMC register
+    - LP: #591249
+  * dove: fix build issues when MV_HAL_DRIVERS_SUPPORT disabled
+    - LP: #591249
+  * dove: register the usb as host mode when HAL drivers disabled
+    - LP: #591249
+  * Fix wrong stride issue for RGB565 on overlay
+    - LP: #591249
+  * Refine alogrithm of filling yuv pitch length and do correction when
+    input pitch value <= 0.
+    - LP: #591249
+  * Nand: fix PIO support for 8bit devices.
+    - LP: #591249
+  * MRVL BMM module update
+    - LP: #591249
+  * BMM module: remove ioremap_xxx for kernel space VA mapping
+    - LP: #591249
+  * fix spi flash type to mx2513205d for AVD1 rev2
+    - LP: #591249
+  * Fix colorkey issue with PM
+    - LP: #591249
+
+  [ Ubuntu: 2.6.32-23.37 ]
+
+  * SAUCE: drm/radeon/kms/atom: fix dual-link DVI on DCE3.2/4.0
+    - LP: #564559
+  * [Config] ports -- build in dm-mod to enable LVM boot
+    - LP: #560717
+  * tools -- fix perf version extraction for multi-part flavours
+    - LP: #555130
+  * [Config] enforce -- ensure dm_mod is built-in for LVM
+    - LP: #560717
+  * update to ubuntu-debian:7e708d33054c373faf41da23b73e8b48c342d958
+    - LP: #570500, #576274
+  * Revert "(pre-stable): input: ALPS - Add signature for HP Pavilion dm3
+    laptops"
+    - LP: #550625
+  * Enable ftrace function profiler
+    - LP: #570389
+  * enforce CONFIG_TMPFS_POSIX_ACL=y
+    - LP: #575940
+  * Revert "staging/comdi -- disable"
+    - LP: #563436
+  * [Config] Enable multicast routing for sparc
+    - LP: #416266
+  * [Config] Add ahci.ko to virtual sub-flavour
+    - LP: #570542
+  * Revert "SAUCE: drm/i915: Disable FBC on 915GM and 945GM"
+    - LP: #588832
+  * [Config] Add atl1c to nic-modules udeb
+    - LP: #557130
+  * Revert "(pre-stable) iwlwifi: fix nfreed--"
+    - LP: #575853
+  * Revert "backlight: mbp_nvidia_bl - add five more MacBook variants"
+    - LP: #575853
+  * Revert "(pre-stable) pata_via: Add VIA VX900 support"
+    - LP: #575853
+  * Revert "(pre-stable) x86-32, resume: do a global tlb flush in S4
+    resume"
+    - LP: #575853
+  * Revert "x86: disable IOMMUs on kernel crash"
+    - LP: #575853
+  * Revert "sunrpc: fix peername failed on closed listener"
+    - LP: #575853
+  * Revert "sunrpc: move the close processing after do recvfrom method"
+    - LP: #575853
+  * Revert "(pre-stable) drm/edid: allow certain bogus edids to hit a fixup
+    path rather than fail"
+    - LP: #575853
+  * Revert "drm/radeon/kms: don't print error on -ERESTARTSYS."
+    - LP: #575853
+  * Revert "ath9k: fix lockdep warning when unloading module" on stable
+    kernels
+    - LP: #588832
+  * Staging: comedi: removed "depricated" from COMEDI_CB_BLOCK
+    - LP: #483343
+  * fat: fix buffer overflow in vfat_create_shortname()
+    - LP: #575853
+  * xfs: simplify inode teardown
+    - LP: #575853
+  * xfs: fix mmap_sem/iolock inversion in xfs_free_eofblocks
+    - LP: #575853
+  * xfs: I/O completion handlers must use NOFS allocations
+    - LP: #575853
+  * xfs: Wrapped journal record corruption on read at recovery
+    - LP: #575853
+  * xfs: Fix error return for fallocate() on XFS
+    - LP: #575853
+  * xfs: check for not fully initialized inodes in xfs_ireclaim
+    - LP: #575853
+  * xfs: fix timestamp handling in xfs_setattr
+    - LP: #575853
+  * xfs: Don't flush stale inodes
+    - LP: #575853
+  * xfs: Ensure we force all busy extents in range to disk
+    - LP: #575853
+  * xfs: reclaim inodes under a write lock
+    - LP: #575853
+  * xfs: Avoid inodes in reclaim when flushing from inode cache
+    - LP: #575853
+  * xfs: reclaim all inodes by background tree walks
+    - LP: #575853
+  * xfs: fix stale inode flush avoidance
+    - LP: #575853
+  * xfs: xfs_swap_extents needs to handle dynamic fork offsets
+    - LP: #575853
+  * xfs: quota limit statvfs available blocks
+    - LP: #575853
+  * xfs: don't hold onto reserved blocks on remount, ro
+    - LP: #575853
+  * xfs: remove invalid barrier optimization from xfs_fsync
+    - LP: #575853
+  * xfs: Non-blocking inode locking in IO completion
+    - LP: #575853
+  * xfs: fix locking for inode cache radix tree tag updates
+    - LP: #575853
+  * sh: Enable the mmu in start_secondary()
+    - LP: #575853
+  * sh: Fix FDPIC binary loader
+    - LP: #575853
+  * libiscsi: Fix recovery slowdown regression
+    - LP: #575853
+  * Freezer: Fix buggy resume test for tasks frozen with cgroup freezer
+    - LP: #575853
+  * iwlwifi: counting number of tfds can be free for 4965
+    - LP: #575853
+  * iwlwifi: fix nfreed--
+    - LP: #575853
+  * iwlwifi: range checking issue
+    - LP: #575853
+  * setup correct int pipe type in ar9170_usb_exec_cmd
+    - LP: #575853
+  * mac80211: move netdev queue enabling to correct spot
+    - LP: #575853
+  * mac80211: tear down all agg queues when restart/reconfig hw
+    - LP: #575853
+  * WATCHDOG: hpwdt - fix lower timeout limit
+    - LP: #575853
+  * WATCHDOG: iTCO_wdt: TCO Watchdog patch for additional Intel Cougar
+    Point DeviceIDs
+    - LP: #575853
+  * genirq: Force MSI irq handlers to run with interrupts disabled
+    - LP: #575853
+  * lis3: fix show rate for 8 bits chips
+    - LP: #575853
+  * pata_ali: Fix regression with old devices
+    - LP: #575853
+  * HID: fix oops in gyration_event()
+    - LP: #575853
+  * raw: fsync method is now required
+    - LP: #575853
+  * readahead: fix NULL filp dereference
+    - LP: #575853
+  * ALSA: mixart: range checking proc file
+    - LP: #575853
+  * ALSA: hda: Fix 0 dB offset for Lenovo Thinkpad models using AD1981
+    - LP: #551606, #575853
+  * x86, amd: Get multi-node CPU info from NodeId MSR instead of PCI config
+    space
+    - LP: #575853
+  * resource: move kernel function inside __KERNEL__
+    - LP: #575853
+  * backlight: mbp_nvidia_bl - add five more MacBook variants
+    - LP: #575853
+  * pata_via: Add VIA VX900 support
+    - LP: #575853
+  * ext3: Don't update the superblock in ext3_statfs()
+    - LP: #575853
+  * ext3: journal all modifications in ext3_xattr_set_handle
+    - LP: #575853
+  * eeepc-laptop: disable cpu speed control on EeePC 701
+    - LP: #575853
+  * eeepc-laptop: dmi blacklist to disable pci hotplug code
+    - LP: #575853
+  * eeepc-laptop: add hotplug_disable parameter
+    - LP: #575853
+  * eeepc-laptop: disable wireless hotplug for 1201N
+    - LP: #575853
+  * eeepc-laptop: disable wireless hotplug for 1005PE
+    - LP: #575853
+  * libata: disable NCQ on Crucial C300 SSD
+    - LP: #575853
+  * cifs: Fix a kernel BUG with remote OS/2 server (try #3)
+    - LP: #575853
+  * CIFS: initialize nbytes at the beginning of CIFSSMBWrite()
+    - LP: #575853
+  * iwlwifi: need check for valid qos packet before free
+    - LP: #575853
+  * ARM: 6031/1: fix Thumb-2 decompressor
+    - LP: #575853
+  * x86-32, resume: do a global tlb flush in S4 resume
+    - LP: #575853
+  * x86: hpet: Make WARN_ON understandable
+    - LP: #575853
+  * x86, hpet: Erratum workaround for read after write of HPET comparator
+    - LP: #575853
+  * x86: Fix double enable_IR_x2apic() call on SMP kernel on !SMP boards
+    - LP: #575853
+  * sched: sched_getaffinity(): Allow less than NR_CPUS length
+    - LP: #575853
+  * sched: Fix sched_getaffinity()
+    - LP: #575853
+  * NFSv4: Fall back to ordinary lookup if nfs4_atomic_open() returns
+    EISDIR
+    - LP: #575853
+  * NFSv4: fix delegated locking
+    - LP: #575853
+  * ALSA: hda - add a quirk for Clevo M570U laptop
+    - LP: #575853
+  * ALSA: usb - Fix Oops after usb-midi disconnection
+    - LP: #575853
+  * hwmon: (sht15) Fix sht15_calc_temp interpolation function
+    - LP: #575853
+  * hwmon: (sht15) Properly handle the case CONFIG_REGULATOR=n
+    - LP: #575853
+  * x86/amd-iommu: Use helper function to destroy domain
+    - LP: #575853
+  * x86/amd-iommu: enable iommu before attaching devices
+    - LP: #575853
+  * x86, lib: Add wbinvd smp helpers
+    - LP: #575853
+  * x86, cacheinfo: Fix disabling of L3 cache indices
+    - LP: #575853
+  * intel-agp: Switch to wbinvd_on_all_cpus
+    - LP: #575853
+  * x86, cacheinfo: Add cache index disable sysfs attrs only to L3 caches
+    - LP: #575853
+  * x86, cacheinfo: Calculate L3 indices
+    - LP: #575853
+  * x86, cacheinfo: Remove NUMA dependency, fix for AMD Fam10h rev D1
+    - LP: #575853
+  * x86, cacheinfo: Enable L3 CID only on AMD
+    - LP: #575853
+  * vgaarb: fix "target=default" passing
+    - LP: #575853
+  * x86-32: clean up rwsem inline asm statements
+    - LP: #575853
+  * x86: clean up rwsem type system
+    - LP: #575853
+  * x86-64, rwsem: 64-bit xadd rwsem implementation
+    - LP: #575853
+  * x86-64: support native xadd rwsem implementation
+    - LP: #575853
+  * x86: Fix breakage of UML from the changes in the rwsem system
+    - LP: #575853
+  * x86-64, rwsem: Avoid store forwarding hazard in __downgrade_write
+    - LP: #575853
+  * fix NFS4 handling of mountpoint stat
+    - LP: #575853
+  * dm mpath: fix stall when requeueing io
+    - LP: #575853
+  * quota: Fix possible dq_flags corruption
+    - LP: #575853
+  * Staging: comedi: fix usbdux timeout bug
+    - LP: #483343, #575853
+  * Staging: comedi: usbdux.c: fix locking up of the driver when the comedi
+    ringbuffer runs empty
+    - LP: #483343, #575853
+  * ocfs2: set i_mode on disk during acl operations
+    - LP: #575853
+  * ocfs2: Change bg_chain check for ocfs2_validate_gd_parent.
+    - LP: #575853
+  * 9p: Skip check for mandatory locks when unlocking
+    - LP: #575853
+  * fc class: fail fast bsg requests
+    - LP: #575853
+  * SCSI: add scsi target reset support to scsi ioctl
+    - LP: #575853
+  * PCIe AER: prevent AER injection if hardware masks error reporting
+    - LP: #575853
+  * vgaarb: Fix VGA arbiter to accept PCI domains other than 0
+    - LP: #575853
+  * SCSI: fc-transport: Use packed modifier for fc_bsg_request structure.
+    - LP: #575853
+  * pci: Update pci_set_vga_state() to call arch functions
+    - LP: #575853
+  * PCI: kill off pci_register_set_vga_state() symbol export.
+    - LP: #575853
+  * PCI: fix nested spinlock hang in aer_inject
+    - LP: #575853
+  * IPoIB: Fix TX queue lockup with mixed UD/CM traffic
+    - LP: #575853
+  * x86/PCI: irq and pci_ids patch for Intel Cougar Point DeviceIDs
+    - LP: #575853
+  * ALSA: hda_intel: ALSA HD Audio patch for Intel Cougar Point DeviceIDs
+    - LP: #575853
+  * ALSA: hda - enable snoop for Intel Cougar Point
+    - LP: #575853
+  * ata_piix: IDE Mode SATA patch for Intel Cougar Point DeviceIDs
+    - LP: #575853
+  * ahci: AHCI and RAID mode SATA patch for Intel Cougar Point DeviceIDs
+    - LP: #575853
+  * i2c-i801: Add Intel Cougar Point device IDs
+    - LP: #575853
+  * b43: Remove reset after fatal DMA error
+    - LP: #575853
+  * b43: Allow PIO mode to be selected at module load
+    - LP: #575853
+  * b43: fall back gracefully to PIO mode after fatal DMA errors
+    - LP: #575853
+  * ALSA: hda - Add position_fix quirk for Biostar mobo
+    - LP: #575853
+  * agp/hp: fixup hp agp after ACPI changes
+    - LP: #575853
+  * b43: Optimize PIO scratchbuffer usage
+    - LP: #575853
+  * ecryptfs: fix use with tmpfs by removing d_drop from
+    ecryptfs_destroy_inode
+    - LP: #575853
+  * eCryptfs: Decrypt symlink target for stat size
+    - LP: #575853
+  * ecryptfs: fix error code for missing xattrs in lower fs
+    - LP: #575853
+  * sched: Fix a race between ttwu() and migrate_task()
+    - LP: #575853
+  * USB: cdc-acm: Update to new autopm API
+    - LP: #575853
+  * USB: cdc-acm: Fix stupid NULL pointer in resume()
+    - LP: #575853
+  * iwlwifi: clear all tx queues when firmware ready
+    - LP: #575853
+  * iwlwifi: fix scan race
+    - LP: #575853
+  * e1000e: stop cleaning when we reach tx_ring->next_to_use
+    - LP: #575853
+  * tcp: fix ICMP-RTO war
+    - LP: #575853
+  * perf_events, x86: Implement Intel Westmere/Nehalem-EX support
+    - LP: #575853
+  * Input: wacom - switch mode upon system resume
+    - LP: #575853
+  * md: deal with merge_bvec_fn in component devices better.
+    - LP: #575853
+  * nfsd4: don't try to map gid's in generic rpc code
+    - LP: #575853
+  * nfsd: ensure sockets are closed on error
+    - LP: #575853
+  * ALSA: hda: Set Front Mic to input vref 50% for Lenovo 3000 Y410
+    - LP: #479373, #575853
+  * mac80211: fix deferred hardware scan requests
+    - LP: #575853
+  * fs-writeback: Add helper function to start writeback if idle
+    - LP: #575853
+  * ext4: flush delalloc blocks when space is low
+    - LP: #575853
+  * ext4: fix async i/o writes beyond 4GB to a sparse file
+    - LP: #575853
+  * tpm: autoload tpm_tis based on system PnP IDs
+    - LP: #575853
+  * IB/iser: Rewrite SG handling for RDMA logic
+    - LP: #575853
+  * mptctl : Remove printk which floods unnecessary messages to
+    var/log/message
+    - LP: #575853
+  * mptspi: Fix for incorrect data underrun errata
+    - LP: #575853
+  * sched: Use proper type in sched_getaffinity()
+    - LP: #575853
+  * KVM: SVM: Fix memory leaks that happen when svm_create_vcpu() fails
+    - LP: #575853
+  * KVM: Don't spam kernel log when injecting exceptions due to bad cr
+    writes
+    - LP: #575853
+  * KVM: allow bit 10 to be cleared in MSR_IA32_MC4_CTL
+    - LP: #575853
+  * KVM: VMX: Save/restore rflags.vm correctly in real mode
+    - LP: #575853
+  * KVM: MMU: fix kvm_mmu_zap_page() and its calling path
+    - LP: #575853
+  * KVM: fix the handling of dirty bitmaps to avoid overflows
+    - LP: #575853
+  * KVM: Increase NR_IOBUS_DEVS limit to 200
+    - LP: #575853
+  * KVM: x86: Fix TSS size check for 16-bit tasks
+    - LP: #575853
+  * x86/gart: Disable GART explicitly before initialization
+    - LP: #575853
+  * r8169: clean up my printk uglyness
+    - LP: #562742, #575853
+  * Linux 2.6.32.12
+    - LP: #575853
+  * drm/edid: allow certain bogus edids to hit a fixup path rather than
+    fail
+    - LP: #575853
+  * drm/radeon: add new RS880 pci id
+    - LP: #575853
+  * drm: remove the EDID blob stored in the EDID property when it is
+    disconnected
+    - LP: #575853
+  * drm/radeon/kms: never treat rs4xx as AGP
+    - LP: #575853
+  * drm/radeon/kms: Fix NULL pointer dereference if memory allocation
+    failed in a simple way
+    - LP: #575853
+  * drm/radeon/kms: don't print error on -ERESTARTSYS.
+    - LP: #575853
+  * drm/radeon/kms: fix pal tv-out support on legacy IGP chips
+    - LP: #575853
+  * drm: Return ENODEV if the inode mapping changes
+    - LP: #575853
+  * drm/edid/quirks: Envision EN2028
+    - LP: #575853
+  * drm/radeon: R300 AD only has one quad pipe.
+    - LP: #575853
+  * drm/radeon/kms: fix washed out image on legacy tv dac
+    - LP: #575853
+  * drm/radeon/kms/combios: verify dac_adj values are valid
+    - LP: #575853
+  * drm/i915: Add no_lvds entry for the Clientron U800
+    - LP: #544671, #575853
+  * drm/radeon/kms: more atom parser fixes (v2)
+    - LP: #575853
+  * drm/radeon/kms: disable the tv encoder when tv/cv is not in use
+    - LP: #575853
+  * drm/radeon/kms: fix tv dac conflict resolver
+    - LP: #575853
+  * drm/radeon/kms: fix rs600 tlb flush
+    - LP: #575853
+  * drm/radeon/kms: add FireMV 2400 PCI ID.
+    - LP: #575853
+  * Linux 2.6.32.12+drm33.3
+    - LP: #575853
+  * USB: EHCI: defer reclamation of siTDs
+    - LP: #583414
+  * p54usb: Add usbid for Corega CG-WLUSB2GT.
+    - LP: #583414
+  * md/raid5: allow for more than 2^31 chunks.
+    - LP: #583414
+  * md/raid5: fix previous patch.
+    - LP: #583414
+  * libata: fix locking around blk_abort_request()
+    - LP: #583414
+  * libata: ensure NCQ error result taskfile is fully initialized before
+    returning it via qc->result_tf.
+    - LP: #583414
+  * w1: w1 temp: fix negative termperature calculation
+    - LP: #583414
+  * memcg: fix prepare migration
+    - LP: #583414
+  * mac80211: remove bogus TX agg state assignment
+    - LP: #583414
+  * flex_array: fix the panic when calling flex_array_alloc() without
+    __GFP_ZERO
+    - LP: #583414
+  * core, x86: make LIST_POISON less deadly
+    - LP: #583414
+  * hugetlb: fix infinite loop in get_futex_key() when backed by huge pages
+    - LP: #583414
+  * reiserfs: fix corruption during shrinking of xattrs
+    - LP: #583414
+  * nfsd4: bug in read_buf
+    - LP: #583414
+  * keys: the request_key() syscall should link an existing key to the dest
+    keyring
+    - LP: #583414
+  * staging: usbip: Fix deadlock
+    - LP: #583414
+  * USB: fix remote wakeup settings during system sleep
+    - LP: #583414
+  * USB: Add id for HP ev2210 a.k.a Sierra MC5725 miniPCI-e Cell Modem.
+    - LP: #511066, #583414
+  * USB: fix testing the wrong variable in fs_create_by_name()
+    - LP: #583414
+  * USB: don't choose configs with no interfaces
+    - LP: #583414
+  * USB: OHCI: don't look at the root hub to get the number of ports
+    - LP: #583414
+  * USB: xhci: properly set the "Mult" field of the endpoint context.
+    - LP: #583414
+  * USB: xhci: properly set endpoint context fields for periodic eps.
+    - LP: #583414
+  * procfs: fix tid fdinfo
+    - LP: #583414
+  * ocfs2: Update VFS inode's id info after reflink.
+    - LP: #583414
+  * ocfs2: potential ERR_PTR dereference on error paths
+    - LP: #583414
+  * ocfs2: Compute metaecc for superblocks during online resize.
+    - LP: #583414
+  * ocfs2_dlmfs: Fix math error when reading LVB.
+    - LP: #583414
+  * powernow-k8: Fix frequency reporting
+    - LP: #572348, #583414
+  * nfs d_revalidate() is too trigger-happy with d_drop()
+    - LP: #583414
+  * NFS: rsize and wsize settings ignored on v4 mounts
+    - LP: #583414
+  * Staging: hv: Fix a bug affecting IPv6
+    - LP: #583414
+  * Staging: hv: Fix up memory leak on HvCleanup
+    - LP: #583414
+  * Staging: hv: name network device ethX rather than sethX
+    - LP: #583414
+  * i2c: Fix probing of FSC hardware monitoring chips
+    - LP: #583414
+  * perf: Fix resource leak in failure path of perf_event_open()
+    - LP: #583414
+  * raid6: fix recovery performance regression
+    - LP: #583414
+  * serial: 8250_pnp - add Fujitsu Wacom device
+    - LP: #583414
+  * block: ensure jiffies wrap is handled correctly in
+    blk_rq_timed_out_timer
+    - LP: #583414
+  * dm9601: fix phy/eeprom write routine
+    - LP: #583414
+  * p54pci: fix bugs in p54p_check_tx_ring
+    - LP: #583414
+  * edac, mce: Fix wrong mask and macro usage
+    - LP: #583414
+  * x86-64: Clear a 64-bit FS/GS base on fork if selector is nonzero
+    - LP: #583414
+  * x86: Disable large pages on CPUs with Atom erratum AAE44
+    - LP: #583414
+  * x86, k8 nb: Fix boot crash: enable k8_northbridges unconditionally on
+    AMD systems
+    - LP: #583414
+  * x86, AMD: Fix stale cpuid4_info shared_map data in shared_cpu_map
+    cpumasks
+    - LP: #583414
+  * ALSA: hda: Use LPIB quirk for DG965OT board version AAD63733-203
+    - LP: #459083, #583414
+  * ALSA: hda - Add PCI quirk for HP dv6-1110ax.
+    - LP: #583414
+  * ALSA: hda: Use STAC_DELL_M6_BOTH quirk for Dell Studio XPS 1645
+    - LP: #553002, #583414
+  * ALSA: hda: Use STAC_DELL_M6_BOTH quirk for Dell Studio 1558
+    - LP: #568600, #583414
+  * ALSA: hda: Use ALC880_F1734 quirk for Fujitsu Siemens AMILO Xi 1526
+    - LP: #567494, #583414
+  * ALSA: snd-meastro3: Add amp_gpio quirk for Compaq EVO N600C
+    - LP: #583414
+  * ALSA: snd-meastro3: Ignore spurious HV interrupts during suspend /
+    resume
+    - LP: #583414
+  * ALSA: hda: Fix max PCM level to 0 dB for Fujitsu-Siemens laptops using
+    CX20549 (Venice)
+    - LP: #583414
+  * ALSA: hda: Fix 0 dB for Packard Bell models using Conexant CX20549
+    (Venice)
+    - LP: #541802, #583414
+  * ALSA: hda: Use olpc-xo-1_5 quirk for Toshiba Satellite Pro T130-15F
+    - LP: #573284, #583414
+  * ALSA: hda: Use olpc-xo-1_5 quirk for Toshiba Satellite
+    P500-PSPGSC-01800T
+    - LP: #549267, #583414
+  * libata: Fix accesses at LBA28 boundary (old bug, but nasty) (v2)
+    - LP: #583414
+  * ext4: correctly calculate number of blocks for fiemap
+    - LP: #474597, #583414
+  * initramfs: handle unrecognised decompressor when unpacking
+    - LP: #583414
+  * CRED: Fix a race in creds_are_invalid() in credentials debugging
+    - LP: #583414
+  * jfs: fix diAllocExt error in resizing filesystem
+    - LP: #583414
+  * ACPI: introduce kernel parameter acpi_sleep=sci_force_enable
+    - LP: #553498, #583414
+  * p54pci: rx frame length check
+    - LP: #583414
+  * drivers/net/wireless/p54/txrx.c Fix off by one error
+    - LP: #583414
+  * dccp_probe: Fix module load dependencies between dccp and dccp_probe
+    - LP: #583414
+  * KVM: remove unused load_segment_descriptor_to_kvm_desct
+    - LP: #583414
+  * kgdb: don't needlessly skip PAGE_USER test for Fsl booke
+    - LP: #583414
+  * r8169: use correct barrier between cacheable and non-cacheable memory
+    - LP: #562742, #583414
+  * r8169: fix broken register writes
+    - LP: #562742, #583414
+  * r8169: more broken register writes workaround
+    - LP: #562742, #583414
+  * PCI: Ensure we re-enable devices on resume
+    - LP: #566149, #583414
+  * skip sense logging for some ATA PASS-THROUGH cdbs
+    - LP: #583128, #583414
+  * tg3: Fix INTx fallback when MSI fails
+    - LP: #583414
+  * xfs: add a shrinker to background inode reclaim
+    - LP: #583414
+  * qla2xxx: Properly handle UNDERRUN completion statuses.
+    - LP: #583414
+  * bnx2: Fix lost MSI-X problem on 5709 NICs.
+    - LP: #583414
+  * tracing: Fix ftrace_event_call alignment for use with gcc 4.5
+    - LP: #583414
+  * security: testing the wrong variable in create_by_name()
+    - LP: #583414
+  * md: restore ability of spare drives to spin down.
+    - LP: #583414
+  * virtio: initialize earlier
+    - LP: #583414
+  * md/raid6: Fix raid-6 read-error correction in degraded state
+    - LP: #583414
+  * V4L/DVB: budget: Oops: "BUG: unable to handle kernel NULL pointer
+    dereference"
+    - LP: #583414
+  * ACPI: DMI init_set_sci_en_on_resume for multiple Lenovo ThinkPads
+    - LP: #583414
+  * power_meter: acpi_device_class "power_meter_resource" too long
+    - LP: #583414
+  * ACPI: sleep: init_set_sci_en_on_resume for Dell Studio 155x
+    - LP: #553498, #583414
+  * cpuidle: Fix incorrect optimization
+    - LP: #583414
+  * pxa/colibri: fix missing #include <mach/mfp.h> in colibri.h
+    - LP: #583414
+  * SCSI: fix locking around blk_abort_request()
+    - LP: #583414
+  * SCSI: libiscsi: regression: fix header digest errors
+    - LP: #583414
+  * scsi_debug: virtual_gb ignores sector_size
+    - LP: #583414
+  * Enable retries for SYNCRONIZE_CACHE commands to fix I/O error
+    - LP: #583414
+  * SCSI: Retry commands with UNIT_ATTENTION sense codes to fix ext3/ext4
+    I/O error
+    - LP: #583414
+  * MIPS: Sibyte: Apply M3 workaround only on affected chip types and
+    versions.
+    - LP: #583414
+  * Linux 2.6.32.13
+    - LP: #583414
+  * drm/i915: Add initial bits for VGA modesetting bringup on Sandybridge.
+    - LP: #583414
+  * drm/i915: fix tiling limits for i915 class hw v2
+    - LP: #583414
+  * Linux 2.6.32.13+drm33.4
+    - LP: #583414
+  * (pre-stable) Input: psmouse - reset all types of mice before
+    reconnecting
+    - LP: #551234
+  * ipv4: udp: fix short packet and bad checksum logging
+    - LP: #588832
+  * hp_accel: fix race in device removal
+    - LP: #588832
+  * fbdev: bfin-t350mcqb-fb: fix fbmem allocation with blanking lines
+    - LP: #588832
+  * hugetlbfs: kill applications that use MAP_NORESERVE with SIGBUS instead
+    of OOM-killer
+    - LP: #588832
+  * dma-mapping: fix dma_sync_single_range_*
+    - LP: #588832
+  * ACPI: sleep: eliminate duplicate entries in acpisleep_dmi_table[]
+    - LP: #588832
+  * mmc: atmel-mci: fix two parameters swapped
+    - LP: #588832
+  * mmc: atmel-mci: prevent kernel oops while removing card
+    - LP: #588832
+  * mmc: atmel-mci: remove data error interrupt after xfer
+    - LP: #588832
+  * ptrace: fix return value of do_syscall_trace_enter()
+    - LP: #588832
+  * powerpc/perf_event: Fix oops due to perf_event_do_pending call
+    - LP: #588832
+  * cifs: guard against hardlinking directories
+    - LP: #588832
+  * serial: imx.c: fix CTS trigger level lower to avoid lost chars
+    - LP: #588832
+  * ALSA: ice1724 - Fix ESI Maya44 capture source control
+    - LP: #588832
+  * ALSA: hda: Fix 0 dB for Lenovo models using Conexant CX20549 (Venice)
+    - LP: #588832
+  * inotify: race use after free/double free in inotify inode marks
+    - LP: #588832
+  * inotify: don't leak user struct on inotify release
+    - LP: #588832
+  * profile: fix stats and data leakage
+    - LP: #588832
+  * x86, k8: Fix build error when K8_NB is disabled
+    - LP: #588832
+  * x86, cacheinfo: Turn off L3 cache index disable feature in virtualized
+    environments
+    - LP: #588832
+  * x86, amd: Check X86_FEATURE_OSVW bit before accessing OSVW MSRs
+    - LP: #588832
+  * Btrfs: check for read permission on src file in the clone ioctl
+    - LP: #588832
+  * ALSA: hda - New Intel HDA controller
+    - LP: #588832
+  * proc: partially revert "procfs: provide stack information for threads"
+    - LP: #588832
+  * revert "procfs: provide stack information for threads" and its fixup
+    commits
+    - LP: #588832
+  * iwlwifi: clear all the stop_queue flag after load firmware
+    - LP: #588832
+  * p54: disable channels with incomplete calibration data sets
+    - LP: #588832
+  * CacheFiles: Fix error handling in cachefiles_determine_cache_security()
+    - LP: #588832
+  * megaraid_sas: fix for 32bit apps
+    - LP: #588832
+  * mmap_min_addr check CAP_SYS_RAWIO only for write
+    - LP: #588832
+  * nilfs2: fix sync silent failure
+    - LP: #588832
+  * crypto: authenc - Add EINPROGRESS check
+    - LP: #588832
+  * Linux 2.6.32.14
+    - LP: #588832
+  * drm/i915: use PIPE_CONTROL instruction on Ironlake and Sandy Bridge
+    - LP: #588832
+  * drm/i915: fix non-Ironlake 965 class crashes
+    - LP: #588832
+  * drm/i915: Disable FBC on 915GM and 945GM.
+    - LP: #492392, #588832
+  * Linux 2.6.32.14+drm33.5
+    - LP: #588832
+  * Linux 2.6.32.15+drm33.5
+    - LP: #588832
+  * HID: remove MODULE_VERSION from new drivers
+    - LP: #583531
+  * HID: fix N-trig touch panel with recent firmware
+    - LP: #583531
+  * HID: ntrig: explain firmware quirk
+    - LP: #583531
+  * HID: ntrig: Emit TOUCH with DOUBLETAP for single touch
+    - LP: #583531
+  * HID: ntrig: TipSwitch for single touch mode touch.
+    - LP: #583531
+  * HID: ntrig: Remove unused macro, TripleTap and QuadTap
+    - LP: #583531
+  * (pre-stable) drm/radeon/kms: initialize set_surface_reg reg for rs600
+    asic
+    - LP: #544590
+
+  [ Ubuntu: 2.6.32-22.36 ]
+
+  * Revert "kvm: restrict writing of segment selectors to segment
+    registers"
+    - LP: #589223
+
+ -- Stefan Bader <stefan.bader@canonical.com>  Tue, 01 Jun 2010 16:59:44 +0200
+
+linux-mvl-dove (2.6.32-205.18) lucid-security; urgency=low
+
+  [ Eric Miao ]
+
+  * [Config] increase CONFIG_BLK_DEV_RAM_SIZE to 65536
+    - LP: #563679
+
+  [ Stefan Bader ]
+
+  * Rebase to 2.6.32-22.35
+  * [Config] Change CONFIG_BLK_DEV_DM to y
+    - LP: #560717
+
+  [ Ubuntu: 2.6.32-22.35 ]
+
+  * kvm: restrict writing of segment selectors to segment registers
+    - CVE-2010-0419
+  * tty: release_one_tty() forgets to put pids
+    - CVE-2010-1162
+  * oom: fix the unsafe usage of badness() in proc_oom_score()
+    - CVE-2010-1488
+  * Attempt #2 to handle null nameidata
+    - CVE-2010-1148
+  * reiserfs: fix permissions on .reiserfs_priv
+    - CVE-2010-1146
+  * r8169: offical fix for CVE-2009-4537 (overlength frame DMAs)
+    - CVE-2009-4537
+
+  [ Ubuntu: 2.6.32-22.33 ]
+
+  * SAUCE: ACPI: EC: Allow multibyte access to EC (v3)
+    - LP: #526354
+  * ubuntu: rtl8192se -- update to version 0015.0127.2010
+    - LP: #567016
+
+  [ Ubuntu: 2.6.32-21.32 ]
+
+  * SAUCE: i915 KMS -- support disabling KMS for known broken devices
+    - LP: #563277
+  * SAUCE: i915 KMS -- blacklist i830
+    - LP: #542208, #563277
+  * SAUCE: i915 KMS -- blacklist i845g
+    - LP: #541492, #563277
+  * SAUCE: i915 KMS -- blacklist i855
+    - LP: #511001, #541511, #563277
+  * SAUCE: radeon KMS -- support disabling KMS for known broken devices
+    - LP: #546743
+  * SAUCE: radeon KMS -- blacklist ES1000
+    - LP: #546743
+
+ -- Stefan Bader <stefan.bader@canonical.com>  Tue, 25 May 2010 20:25:15 +0000
+
+linux-mvl-dove (2.6.32-204.16) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * rebase to Ubuntu-2.6.32-21.31
+
+  [ Ubuntu: 2.6.32-21.31 ]
+
+  * allow modules.builtin to be optional
+  * d-i: add mpt2sas to the message-modules udeb
+    - LP: #530361
+  * SAUCE: Nouveau: Add quirk framework to disable acceleration
+    - LP: #544088, #546393
+  * SAUCE: Nouveau: Disable acceleration on MacBook Pros
+    - LP: #546393
+  * SAUCE: Nouveau: Disable acceleration on GeForce3 cards
+    - LP: #544088
+  * SAUCE: Nouveau: Disable acceleration on 6100 cards
+    - LP: #542950
+  * SAUCE: dma-mapping: Remove WARN_ON in dma_free_coherent
+    - LP: #458201
+  * SAUCE: sync before umount to reduce time taken by ext4 umount
+    - LP: #543617
+  * tipc: Fix oops on send prior to entering networked mode (v3)
+    - CVE-2010-1187
+  * KVM: x86 emulator: Add Virtual-8086 mode of emulation
+    - LP: #561425
+  * KVM: x86 emulator: fix memory access during x86 emulation
+    - LP: #561425
+  * KVM: x86 emulator: Check IOPL level during io instruction emulation
+    - LP: #561425
+  * KVM: x86 emulator: Fix popf emulation
+    - LP: #561425
+  * KVM: Fix segment descriptor loading
+    - LP: #561425
+  * KVM: VMX: Update instruction length on intercepted BP
+    - LP: #561425
+  * KVM: VMX: Use macros instead of hex value on cr0 initialization
+    - LP: #561425
+  * KVM: SVM: Reset cr0 properly on vcpu reset
+    - LP: #561425
+  * KVM: VMX: Disable unrestricted guest when EPT disabled
+    - LP: #561425
+  * KVM: x86: disable paravirt mmu reporting
+    - LP: #561425
+  * AppArmor: Fix put of unassigned ns if aa_unpack fails
+  * AppArmor: Fix refcount bug when exec fails
+    - LP: #562063
+  * AppArmor: Take refcount on cxt->profile to ensure it remains a valid
+    reference
+    - LP: #367499
+  * AppArmor: fix typo in scrubbing environment variable warning
+    - LP: #562060
+  * AppArmor: fix regression by setting default to mediate deleted files
+    - LP: #562056
+  * AppArmor: fix refcount order bug that can trigger during replacement
+    - LP: #367499
+  * AppArmor: Make sure to unmap aliases for vmalloced dfas before they are
+    live
+    - LP: #529288
+  * AppArmor: address performance regression of replaced profile
+    - LP: #549428
+  * AppArmor: make the global side the correct type
+    - LP: #562047
+  * AppArmor: use the kernel shared workqueue to free vmalloc'ed dfas
+  * sky2: add register definitions for new chips
+    - LP: #537168
+  * sky2: 88E8059 support
+    - LP: #537168
+  * net: Fix Yukon-2 Optima TCP offload setup
+    - LP: #537168
+  * net: Add missing TST_CFG_WRITE bits around sky2_pci_write
+    - LP: #537168
+  * sky2: print Optima chip name
+    - LP: #537168
+  * (Upstream) dell-laptop: defer dell_rfkill_update to worker thread
+    - LP: #555261
+  * drm/nv40: add LVDS table quirk for Dell Latitude D620
+    - LP: #539730
+
+  [ Ubuntu: 2.6.32-20.30 ]
+
+  * Revert "(pre-stable) ACPI: EC: Allow multibyte access to EC"
+    - LP: #561151
+
+  [ Ubuntu: 2.6.32-20.29 ]
+
+  * Revert "SAUCE: Use MODULE_IMPORT macro to tie intel_agp to i915"
+    - LP: #542251
+  * add Breaks: against hardy lvm2
+    - LP: #528155
+  * d-i -- enable udebs for generic-pae
+    - LP: #160366
+  * [Config] Add xen netboot support
+    - LP: #160366
+  * (pre-stable): input: Support Clickpad devices in ClickZone mode
+    - LP: #516329
+  * Revert "(pre-stable) Bluetooth: Fix sleeping function in RFCOMM within
+    invalid context"
+    - LP: #553837
+  * Revert "(pre-stable) USB: fix usbfs regression"
+    - LP: #553837
+  * Revert "(pre-stable) softlockup: Stop spurious softlockup messages due
+    to overflow"
+    - LP: #553837
+  * Revert "(pre-stable) drm/nouveau: report unknown connector state if lid
+    closed"
+    - LP: #553837
+  * drivers/scsi/ses.c: eliminate double free
+    - LP: #553837
+  * decompress: fix new decompressor for PIC
+    - LP: #553837
+  * ARM: Fix decompressor's kernel size estimation for ROM=y
+    - LP: #553837
+  * MIPS: Cleanup forgotten label_module_alloc in tlbex.c
+    - LP: #553837
+  * tg3: Fix tg3_poll_controller() passing wrong pointer to tg3_interrupt()
+    - LP: #553837
+  * tg3: Fix 5906 transmit hangs
+    - LP: #553837
+  * ALSA: hda - Fix input source elements of secondary ADCs on Realtek
+    - LP: #553837
+  * ALSA: hda: enable MSI for Gateway M-6866
+    - LP: #538918, #553837
+  * timekeeping: Prevent oops when GENERIC_TIME=n
+    - LP: #553837
+  * Input: alps - add support for the touchpad on Toshiba Tecra A11-11L
+    - LP: #553837
+  * Input: i8042 - add ALDI/MEDION netbook E1222 to qurik reset table
+    - LP: #553837
+  * i2c-i801: Don't use the block buffer for I2C block writes
+    - LP: #553837
+  * ath5k: dont use external sleep clock in AP mode
+    - LP: #553837
+  * ath5k: fix setup for CAB queue
+    - LP: #553837
+  * ring-buffer: Move disabled check into preempt disable section
+    - LP: #553837
+  * function-graph: Init curr_ret_stack with ret_stack
+    - LP: #553837
+  * Bluetooth: Fix sleeping function in RFCOMM within invalid context
+    - LP: #553837
+  * tracing: Use same local variable when resetting the ring buffer
+    - LP: #553837
+  * tracing: Disable buffer switching when starting or stopping trace
+    - LP: #553837
+  * tracing: Do not record user stack trace from NMI context
+    - LP: #553837
+  * PCI: unconditionally clear AER uncorr status register during cleanup
+    - LP: #553837
+  * efifb: fix framebuffer handoff
+    - LP: #553837
+  * coredump: suppress uid comparison test if core output files are pipes
+    - LP: #553837
+  * V4L/DVB (13961): em28xx-dvb: fix memleak in dvb_fini()
+    - LP: #553837
+  * hrtimer: Tune hrtimer_interrupt hang logic
+    - LP: #553837
+  * x86, apic: Don't use logical-flat mode when CPU hotplug may exceed 8
+    CPUs
+    - LP: #553837
+  * mvsas: add support for Adaptec ASC-1045/1405 SAS/SATA HBA
+    - LP: #553837
+  * pci: add support for 82576NS serdes to existing SR-IOV quirk
+    - LP: #553837
+  * sched: Mark boot-cpu active before smp_init()
+    - LP: #553837
+  * sparc64: Make prom entry spinlock NMI safe.
+    - LP: #553837
+  * sysctl: require CAP_SYS_RAWIO to set mmap_min_addr
+    - LP: #553837
+  * e1000e: enable new 82567V-3 device
+    - LP: #553837
+  * ixgbe: add support for 82599 KR device 0x1517
+    - LP: #553837
+  * ath9k: fix lockdep warning when unloading module
+    - LP: #553837
+  * mqueue: fix mq_open() file descriptor leak on user-space processes
+    - LP: #553837
+  * virtio: fix out of range array access
+    - LP: #553837
+  * sched: Fix SCHED_MC regression caused by change in sched cpu_power
+    - LP: #553837
+  * readahead: add blk_run_backing_dev
+    - LP: #553837
+  * ALSA: hda: Use LPIB and 6stack-dig for eMachines T5212
+    - LP: #538895, #553837
+  * ALSA: hda - Disable MSI for Nvidia controller
+    - LP: #553837
+  * ALSA: hda - Fix secondary ADC of ALC260 basic model
+    - LP: #553837
+  * ALSA: hda: Fix 0 dB offset for HP laptops using CX20551 (Waikiki)
+    - LP: #420578, #553837
+  * ALSA: cmipci: work around invalid PCM pointer
+    - LP: #553837
+  * gigaset: correct clearing of at_state strings on RING
+    - LP: #553837
+  * gigaset: prune use of tty_buffer_request_room
+    - LP: #553837
+  * perf: Make the install relative to DESTDIR if specified
+    - LP: #553837
+  * perf_event: Fix oops triggered by cpu offline/online
+    - LP: #553837
+  * tmpfs: fix oops on mounts with mpol=default
+    - LP: #553837
+  * tmpfs: mpol=bind:0 don't cause mount error.
+    - LP: #553837
+  * tmpfs: handle MPOL_LOCAL mount option properly
+    - LP: #553837
+  * tmpfs: cleanup mpol_parse_str()
+    - LP: #553837
+  * doc: add the documentation for mpol=local
+    - LP: #553837
+  * SCSI: scsi_transport_fc: Fix synchronization issue while deleting vport
+    - LP: #553837
+  * NFSv4: Don't ignore the NFS_INO_REVAL_FORCED flag in
+    nfs_revalidate_inode()
+    - LP: #553837
+  * NFS: Avoid a deadlock in nfs_release_page
+    - LP: #553837
+  * NFS: Prevent another deadlock in nfs_release_page()
+    - LP: #553837
+  * tty: Keep the default buffering to sub-page units
+    - LP: #553837
+  * tty: Take a 256 byte padding into account when buffering below sub-page
+    units
+    - LP: #553837
+  * USB: fix usbfs regression
+    - LP: #553837
+  * USB: EHCI: fix ITD list order
+    - LP: #553837
+  * USB: EHCI: adjust ehci_iso_stream for changes in ehci_qh
+    - LP: #553837
+  * USB: qcserial: add new device ids
+    - LP: #553837
+  * USB: xHCI: re-initialize cmd_completion
+    - LP: #553837
+  * USB: serial: ftdi: add CONTEC vendor and product id
+    - LP: #553837
+  * USB: option: fix incorrect manufacturer name in usb/serial/option:
+    MAXON->CMOTECH
+    - LP: #553837
+  * USB: option: move hardcoded PID to a macro in usb/serial/option
+    - LP: #553837
+  * USB: option: add support for a new CMOTECH device to usb/serial/option
+    - LP: #553837
+  * usb: r8a66597-hcd: fix removed from an attached hub
+    - LP: #553837
+  * wl1251: fix potential crash
+    - LP: #553837
+  * jme: Fix VLAN memory leak
+    - LP: #553837
+  * jme: Protect vlgrp structure by pause RX actions.
+    - LP: #553837
+  * edac, mce: Filter out invalid values
+    - LP: #553837
+  * iwlwifi: use dma_alloc_coherent
+    - LP: #553837
+  * iwlwifi: Silence tfds_in_queue message
+    - LP: #553837
+  * SUNRPC: Fix a potential memory leak in auth_gss
+    - LP: #553837
+  * sunrpc: handle allocation errors from __rpc_lookup_create()
+    - LP: #553837
+  * if_tunnel.h: add missing ams/byteorder.h include
+    - LP: #553837
+  * fs/partitions/msdos: add support for large disks
+    - LP: #553837
+  * fs/partition/msdos: fix unusable extended partition for > 512B sector
+    - LP: #553837
+  * PCI: fix return value from pcix_get_max_mmrbc()
+    - LP: #553837
+  * PCI: fix access of PCI_X_CMD by pcix get and set mmrbc functions
+    - LP: #553837
+  * PCI: cleanup error return for pcix get and set mmrbc functions
+    - LP: #553837
+  * rt2860sta: Fix argument to linux_pci_unmap_single()
+    - LP: #553837
+  * ath9k: fix BUG_ON triggered by PAE frames
+    - LP: #553837
+  * cpuset: fix the problem that cpuset_mem_spread_node() returns an
+    offline node
+    - LP: #553837
+  * softlockup: Stop spurious softlockup messages due to overflow
+    - LP: #553837
+  * netfilter: xt_recent: fix regression in rules using a zero hit_count
+    - LP: #553837
+  * x86: Fix placement of FIX_OHCI1394_BASE
+    - LP: #553837
+  * x86, amd: Restrict usage of c1e_idle()
+    - LP: #553837
+  * hwmon: (coretemp) Add missing newline to dev_warn() message
+    - LP: #553837
+  * ALSA: hda: Use LPIB for ga-ma770-ud3 board
+    - LP: #553837
+  * ALSA: ac97: Add Toshiba P500 to ac97 jack sense blacklist
+    - LP: #481058, #553837
+  * ALSA: ac97: Add IBM ThinkPad R40e to Headphone/Line Jack Sense
+    blacklist
+    - LP: #303789, #553837
+  * ALSA: hda: Use ALC260_WILL quirk for another Acer model (0x1025007f)
+    - LP: #418627, #553837
+  * ath9k: Enable TIM timer interrupt only when needed.
+    - LP: #553837
+  * mac80211: Retry null data frame for power save
+    - LP: #553837
+  * ath9k: Enable IEEE80211_HW_REPORTS_TX_ACK_STATUS flag for ath9k
+    - LP: #553837
+  * mac80211: Reset dynamic ps timer in Rx path.
+    - LP: #553837
+  * leds-gpio: fix default state handling on OF platforms
+    - LP: #553837
+  * quota: manage reserved space when quota is not active [v2]
+    - LP: #553837
+  * quota: Fix warning when a delayed write happens before quota is enabled
+    - LP: #553837
+  * ahci: use BIOS date in broken_suspend list
+    - LP: #553837
+  * Bluetooth: Fix potential bad memory access with sysfs files
+    - LP: #553837
+  * Bluetooth: Fix kernel crash on L2CAP stress tests
+    - LP: #553837
+  * sh: Fix zImage boot using fixed PMB.
+    - LP: #553837
+  * b43: Workaround circular locking in hw-tkip key update callback
+    - LP: #553837
+  * block: Backport of various I/O topology fixes from 2.6.33 and 2.6.34
+    - LP: #553837
+  * s3cmci: initialize default platform data no_wprotect and no_detect with
+    1
+    - LP: #553837
+  * x86: Fix sched_clock_cpu for systems with unsynchronized TSC
+    - LP: #553837
+  * GFS2: Skip check for mandatory locks when unlocking
+    - LP: #553837
+  * Linux 2.6.32.11
+    - LP: #553837
+  * drm/i915: fix small leak on overlay error path
+    - LP: #553837
+  * drm/i915: Avoid NULL deref in get_pages() unwind after error.
+    - LP: #553837
+  * drm/nouveau: report unknown connector state if lid closed
+    - LP: #553837
+  * Linux-2.6.32.11+drm33.2
+    - LP: #553837
+  * mmc: add module parameter to set whether cards are assumed removable
+    - LP: #477106
+  * (pre-stable) ACPI: EC: Allow multibyte access to EC
+    - LP: #526354
+  * PCI quirks: disable msi on AMD rs4xx internal gfx bridges
+    - LP: #509273
+  * drm/i915: Add dependency on the intel agp module
+    - LP: #542251
+  * (pre-stable) drm/edid: allow certain bogus edids to hit a fixup path
+    rather than fail
+    - LP: #540632
+  * drm/radeon/kms: rework pll algo selection
+    - LP: #538377
+  * drm/radeon/kms: update new pll algo
+    - LP: #538377
+  * PCI quirk: Disable MSI on VIA K8T890 systems
+    - LP: #544741
+  * sched: update load count only once per cpu in 10 tick update window
+    - LP: #513848
+
+ -- Andy Whitcroft <apw@canonical.com>  Wed, 14 Apr 2010 12:12:31 +0100
+
+linux-mvl-dove (2.6.32-203.15) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * rebase to Ubuntu-2.6.32-19.28
+  * update configs following rebase to Ubuntu-2.6.32-19.28
+  * [Config] lgs8gl5 and mimio are no longer built
+
+  [ Eric Miao ]
+
+  * [Config]: sync with Dove LSP 5.1.0
+
+  [ Upstream Kernel Changes ]
+
+  * add option to reserve memory for PVT tests
+  * update missed mcu-ds2782 battery driver
+  * config: small change to align with Ubuntu kernel configuration
+  * Update standby mode support for AV-D1 X0 board.
+  * Disable ADI9889 by default to remove this error during kernel booting:
+    "ERROR at adi9889_error_callback - error code 14"
+  * Fix compiling error on Android caused by the patch
+    d4cc16c82748d07258b3808d1f572d69640526bc
+  * Fix EDID parsing error in ADI9889 device driver
+  * Disabled some annonying debug information of KG2 due to it flashs
+    console output
+  * Decrease ALSA soc period_size min and max parameter to fix video not
+    fluent on Android issue.
+  * Enable two Android PMEM device files: /dev/pmem --> 24M, for Graphics
+    /dev/pmem_adsp --> 64M, for Video
+  * Fix various settings for new AV-D1 X0 boards
+  * add back rt5630 i2c device in dove-rd-avng-setup.c
+  * dvs: make changes to dove_rd_avng_setup.c
+  * DVS: Fix compilation error and disable DVS by default for AVD1 board
+  * Modify dove_gpu's name to galcore for Android to keep align with other
+    Android platform.
+  * dove: build dmatest as module
+  * dove: disable MTD_VERIFY_WRITE and enable MTD test support
+  * dove: alway use the galcore name for the gpu driver
+  * update dove_avng_x0_defconfig and dove_avng_y1_defconfig
+  * fix ADI9889/9389 HDMI audio no sound (SPDIF) issue
+  * Added Headset detection feature.
+  * Fix wrong bit operation
+  * Fix warning message when compiling
+  * Lower debug message's level and mark it
+  * Lower wait for vsync's debug message level and double confirm isr
+    before printing the message.
+  * Remove unused function.
+  * refine the comments
+  * Fix ADI9889 PM suspend/resume issue
+  * rt5611: only swap touchscreen Y-axis for ANDROID
+  * enable bmm driver as module in dove_avng_x0_defconfig
+  * remove dove_avng_x0_defconfig and dove_avng_y1_defconfig
+  * dove: disable CH7025_COMPOSITE
+  * eth643: fix suspend/resume by deatach/attach phy
+
+  [ Ubuntu: 2.6.32-19.28 ]
+
+  * [Config] enable various multitouch devices
+    - LP: #541453
+  * (pre-stable): input: ALPS - Add signature for HP Pavilion dm3 laptops
+    - LP: #545307
+  * SAUCE: Disable function tracing after hitting __schedule_bug
+  * SAUCE: Reduce ACPI resource conflict message to KERN_INFO, printf
+    cleanup
+    - LP: #440470
+  * SAUCE: drm/i915: don't change DRM configuration when releasing load
+    detect pipe
+    - LP: #488328
+  * SAUCE: AppArmor: Remove null_profile's use of PFLAG_NO_LIST_REF
+    - LP: #539437
+  * SAUCE: AppArmor: Stop page allocation warnings that can occur on policy
+    load
+    - LP: #458299
+  * SAUCE: AppArmor: Return string len rather than the allocation size
+    - LP: #551844
+  * SAUCE: AppArmor: Fix oops in profile verification if profile unpack
+    fails.
+  * [Config] Enable Nouveau DRM module on powerpc
+  * SAUCE: Pull in thinkpad-acpi from v2.6.34-rc1
+    - LP: #357673
+  * [Config] Enable thinkpad-acpi ALSA volume control
+    - LP: #357673
+  * SAUCE: drm/i915: Disable FBC on 915GM and 945GM
+    - LP: #492392, #539609
+  * Revert "(pre-stable) drm/i915: blacklist lid status: Sony VGN-BX196VP,
+    Dell Inspiron 700m"
+    - LP: #515246
+  * (pre-stable) softlockup: Stop spurious softlockup messages due to
+    overflow
+    - LP: #551068
+  * backlight: mbp_nvidia_bl - add five more MacBook variants
+    - LP: #511965
+  * drm/nv04-nv40: Fix up the programmed horizontal sync pulse delay.
+    - LP: #529130
+  * drm/nouveau: Fix fbcon corruption with font width not divisible by 8
+    - LP: #544739
+  * (pre-stable) USB: fix usbfs regression
+  * drm/radeon/bo: add some fallback placements for VRAM only objects.
+    - LP: #507148
+  * drm/radeon/kms: don't print error on -ERESTARTSYS.
+    - LP: #507148
+  * Input: add the ABS_MT_PRESSURE event
+    - LP: #541453
+  * HID: Support for 3M multitouch panel
+    - LP: #541453
+  * HID: make 3M PCT touchscreen driver standalone config option
+    - LP: #541453
+  * HID: add support for Stantum multitouch panel
+    - LP: #541453
+  * HID: make Stantum driver standalone config option
+    - LP: #541453
+  * HID: add support for Acer T230H multitouch
+    - LP: #541453
+  * HID: add support for Pixart Imaging Optical Touch Screen
+    - LP: #541453
+  * HID: fixed bug in single-touch emulation on the stantum panel
+    - LP: #541453
+  * HID: add pressure support for the Stantum multitouch panel
+    - LP: #541453
+  * HID: Support for MosArt multitouch panel
+    - LP: #541453
+  * HID: hid-ntrig add multi input quirk and clean up
+    - LP: #541453
+  * HID: n-trig: remove unnecessary tool switching
+    - LP: #541453
+  * HID: hid-ntrig: multitouch cleanup and fix
+    - LP: #541453
+  * HID: hid-ntrig: Single touch mode tap
+    - LP: #541453
+  * hid: ntrig touch events
+    - LP: #541453
+  * (pre-stable) x86-32, resume: do a global tlb flush in S4 resume
+    - LP: #531309
+  * drm/i915: Part of: Add initial bits for VGA modesetting bringup on
+    Sandybridge.
+    - LP: #515246
+  * drm/i915: Stop trying to use ACPI lid status to determine LVDS
+    connection.
+    - LP: #515246
+
+  [ Ubuntu: 2.6.32-18.27 ]
+
+  * SAUCE: Don't register vga16fb framebuffer if other framebuffers are
+    present
+    - LP: #527369
+  * [Config] armel/versatile: Set CRAMFS=m
+    - LP: #524893
+  * [Config] armel: Reset default command-line
+    - LP: #524893
+  * build/modules: Update d-i to reflect recent config changes
+    - LP: #546929
+  * (pre-stable) drm/nouveau: report unknown connector state if lid closed
+    - LP: #523072
+  * (pre-stable) Staging: rt2870: Add USB ID for Buffalo Airstation
+    WLI-UC-GN
+    - LP: #441990
+  * (pre-stable) iwlwifi: fix nfreed--
+    - LP: #545585
+  * (pre-stable) pata_via: Add VIA VX900 support
+    - LP: #548675
+
+  [ Ubuntu: 2.6.32-17.26 ]
+
+  * [Config] SECURITY_FILE_CAPABILITIES dissapeared in 2.6.33
+  * rules -- allow architecture configurations to be missing
+  * SAUCE: cdrom -- default to not locking the tray when in use
+    - LP: #397734
+  * expose the kernel EXTRAVERSION in dmesg and /proc/version_signature
+  * record the drm version in EXTRAVERSION
+  * linux-tools -- pull out the perf binary into a binary package
+  * [Config] enable MMIOTRACE for graphics debugging
+  * [Config] enable BLK_DEV_BSG
+  * debian -- fix builds when tools are disabled
+  * allow us to build default configs for automated builds
+  * config -- allow locally specified configuration overrides
+  * [Config] de-modularise PATA disk controllers
+  * [Config] de-modularise SATA disk controllers
+  * Revert "SAUCE: (pre-stable) netfilter: xt_recent: fix buffer overflow"
+    - LP: #540231
+  * Revert "SAUCE: (pre-stable) netfilter: xt_recent: fix false match"
+    - LP: #540231
+  * [Config] Update configs for 2.6.32.10
+    - LP: #540231
+  * [Config] Add vmw_pvscsi and vmxnet3 to -virtual flavour
+    - LP: #531017
+  * SAUCE: igb: Supress an upstream compiler complaint
+  * [Config] Fix sub-flavours package conflicts
+    - LP: #454827
+  * Revert "tpm_tis: TPM_STS_DATA_EXPECT workaround"
+    - LP: #540231
+  * Revert "(pre-stable) sched: Fix SMT scheduler regression in
+    find_busiest_queue()"
+    - LP: #540231
+  * (pre-stable) Bluetooth: Fix sleeping function in RFCOMM within invalid
+    context
+    - LP: #534549
+  * igb: remove unused temp variable from stats clearing path
+  * igb: update comments for serdes config and update to handle duplex
+  * igb: update the approach taken to acquiring and releasing the phy lock
+  * igb: add locking to reads of the i2c interface
+  * igb: add combined function for setting rar and pool bits
+  * igb: make use of the uta to allow for promiscous mode filter
+  * igb: add support for 82576NS SerDes adapter
+  * igb: add function to handle mailbox lock
+  * igb: fix a few items where weren't correctly setup for mbx timeout
+  * igb: change how we handle alternate mac addresses
+  * igb: remove microwire support from igb
+  * igb: move the generic copper link setup code into e1000_phy.c
+  * igb: add code to retry a phy read in the event of failure on link check
+  * igb: add additional error handling to the phy code
+  * igb: add flushes between RAR writes when setting mac address
+  * igb: Use the instance of net_device_stats from net_device.
+  * igb: Fix erroneous display of stats by ethtool -S
+  * igb: add new data structure for handling interrupts and NAPI
+  * igb: remove rx checksum good counter
+  * igb: increase minimum rx buffer size to 1K
+  * igb: move the tx and rx ring specific config into seperate functions
+  * igb: remove rx_ps_hdr_len
+  * igb: move SRRCTL register configuration into ring specific config
+  * igb: change the head and tail offsets into pointers
+  * igb: add pci device pointer to ring structure
+  * igb: move rx_buffer_len into the ring structure
+  * igb: move alloc_failed and csum_err stats into per rx-ring stat
+  * igb: add a flags value to the ring
+  * igb: place a pointer to the netdev struct in the ring itself
+  * igb: move the multiple receive queue configuration into seperate
+    function
+  * igb: delay VF reset notification until after interrupts are enabed
+  * igb: setup vlan tag replication stripping in igb_vmm_control
+  * igb: re-use ring configuration code in ethtool testing
+  * igb: make tx ring map and free functionality non-static
+  * igb: make ethtool use core xmit map and free functionality
+  * igb: add single vector msi-x testing to interrupt test
+  * igb: cleanup "todo" code found in igb_ethtool.c
+  * igb: add support for seperate tx-usecs setting in ethtool
+  * igb: cleanup some of the code related to hw timestamping
+  * igb: misc cleanups within igb_ethtool.c
+  * igb: use packet buffer sizes from RXPBS register
+  * igb: replace the VF clear_to_send with a flags value
+  * igb: rework use of VMOLR in regards to PF and VFs
+  * igb: rework handling of the vfta and vlvf registers in relation to
+    mng_vlan
+  * igb: move vf init into a seperate function
+  * igb: only process global stats in igb_update_stats
+  * igb: move global_quad_port_a from global into local static define
+  * igb: make tx hang check multiqueue, check eop descriptor
+  * igb: cleanup code related to ring resource allocation and free
+  * igb: change queue ordering for 82576 based adapters
+  * igb: cleanup interrupt enablement in regards to msix_other
+  * igb: Remove invalid stats counters
+  * igb: cleanup igb.h header whitespace and some structure formatting
+  * igb: cleanup igb xmit frame path
+  * igb: cleanup clean_rx_irq_adv and alloc_rx_buffers_adv
+  * igb: replace unecessary &adapter->hw with just hw where applicable
+  * igb: add pci_dev in few spots to clean up use of dev_err/info/warn
+  * igb: limit minimum mtu to 68 to keep ip bound to interface
+  * igb: open up SCTP checksum offloads to all MACs 82576 and newer
+  * igb: cleanup whitespace issues in igb_main.c
+  * igb: Fix warnings in igb_set_ringparam()
+  * igb: change type for ring sizes to u16 in igb_set_ring_param
+  * igb: move timesync init into a seperate function
+  * igb: when number of CPUs > 4 combine tx/rx queues to allow more queues
+  * igb: Rework how netdev->stats is handled
+  * igb: removed unused tx/rx total bytes/packets from adapter struct
+  * igb: check for packets on all tx rings when link is down
+  * igb: only recycle page if it is on our numa node
+  * igb: add support for the 82580 phy
+  * igb: add support for 82580 MAC
+  * igb: Add full support for 82580 devices
+  * igb: remove use of skb_dma_map from driver
+  * igb: fix handling of mailbox collisions between PF/VF
+  * igb: do not force pcs link when in KX mode
+  * igb: do not force retry count to 1 on 82580 phy
+  * igb: correctly offset 82575 flow control watermarks by 16 bytes
+  * igb: check both function bits in status register in wol exception
+  * igb: make certain to reassign legacy interrupt vectors after reset
+  * igb/igbvf: cleanup exception handling in tx_map_adv
+  * fix LOOKUP_FOLLOW on automount "symlinks"
+    - LP: #540231
+  * ARM: 5944/1: scsi: fix timer setup in fas216.c
+    - LP: #540231
+  * V4L/DVB: dvb: l64781.ko broken with gcc 4.5
+    - LP: #540231
+  * bfin: fix max timeout calculation
+    - LP: #540231
+  * V4L/DVB: Video : pwc : Fix regression in pwc_set_shutter_speed caused
+    by bad constant => sizeof conversion.
+    - LP: #540231
+  * V4L/DVB: bttv: Move I2C IR initialization
+    - LP: #540231
+  * V4L/DVB: cxusb: Select all required frontend and tuner modules
+    - LP: #540231
+  * memcg: fix oom killing a child process in an other cgroup
+    - LP: #540231
+  * fs/exec.c: fix initial stack reservation
+    - LP: #540231
+  * iwlwifi: error checking for number of tfds in queue
+    - LP: #540231
+  * iwlwifi: set HT flags after channel in rxon
+    - LP: #540231
+  * iwlwifi: sanity check before counting number of tfds can be free
+    - LP: #540231
+  * netlabel: fix export of SELinux categories > 127
+    - LP: #540231
+  * ahci: disable FPDMA auto-activate optimization on NVIDIA AHCI
+    - LP: #540231
+  * PCI hotplug: ibmphp: read the length of ebda and map entire ebda region
+    - LP: #540231
+  * PCI hotplug: check ioremap() return value in ibmphp_ebda.c
+    - LP: #540231
+  * ACPI: remove Asus P2B-DS from acpi=ht blacklist
+    - LP: #540231
+  * ACPI: fix "acpi=ht" boot option
+    - LP: #540231
+  * thinkpad-acpi: wrong thermal attribute_group removed in thermal_exit()
+    - LP: #540231
+  * ACPI: Be in TS_POLLING state during mwait based C-state entry
+    - LP: #540231
+  * mpt2sas: Delete volume before HBA detach.
+    - LP: #540231
+  * slab: initialize unused alien cache entry as NULL at
+    alloc_alien_cache().
+    - LP: #540231
+  * mac80211: quit addba_resp_timer if Tx BA session is torn down
+    - LP: #540231
+  * V4L/DVB (13991): gspca_mr973010a: Fix cif type 1 cameras not streaming
+    on UHCI controllers
+    - LP: #540231
+  * vfs: take f_lock on modifying f_mode after open time
+    - LP: #540231
+  * readahead: introduce FMODE_RANDOM for POSIX_FADV_RANDOM
+    - LP: #540231
+  * HID: remove TENX iBuddy from blacklist
+    - LP: #540231
+  * HID: add multi-input quirk for NextWindow Touchscreen.
+    - LP: #540231
+  * HID: usbhid: introduce timeout for stuck ctrl/out URBs
+    - LP: #540231
+  * airo: fix setting zero length WEP key
+    - LP: #540231
+  * idr: fix a critical misallocation bug, take#2
+    - LP: #540231
+  * Switch proc/self to nd_set_link()
+    - LP: #540231
+  * sparc: Align clone and signal stacks to 16 bytes.
+    - LP: #540231
+  * sparc32: Fix page_to_phys().
+    - LP: #540231
+  * sparc32: Fix struct stat uid/gid types.
+    - LP: #540231
+  * sparc: leds_resource.end assigned to itself in clock_board_probe()
+    - LP: #540231
+  * sparc64: Fix sun4u execute bit check in TSB I-TLB load.
+    - LP: #540231
+  * net: Fix sysctl restarts...
+    - LP: #540231
+  * net-sysfs: Use rtnl_trylock in wireless sysfs methods.
+    - LP: #540231
+  * net: bug fix for vlan + gro issue
+    - LP: #540231
+  * inet: Remove bogus IGMPv3 report handling
+    - LP: #540231
+  * ipv6: conntrack: Add member of user to nf_ct_frag6_queue structure
+    - LP: #540231
+  * drivers/net: ks8851_mll ethernet network driver
+    - LP: #540231
+  * sky2: fix transmit DMA map leakage
+    - LP: #540231
+  * SCSI: qla2xxx: Obtain proper host structure during response-queue
+    processing.
+    - LP: #540231
+  * rtc-core: fix memory leak
+    - LP: #540231
+  * offb: Add support for framebuffer handoff to offb.
+    - LP: #540231
+  * tpm_tis: TPM_STS_DATA_EXPECT workaround
+    - LP: #540231
+  * rndis_wlan: handle NL80211_AUTHTYPE_AUTOMATIC
+    - LP: #540231
+  * rndis_wlan: fix buffer overflow in rndis_query_oid
+    - LP: #540231
+  * rndis_wlan: disable stall workaround
+    - LP: #540231
+  * net/via-rhine: Fix scheduling while atomic bugs
+    - LP: #540231
+  * clocksource: Fix up a registration/IRQ race in the sh drivers.
+    - LP: #540231
+  * SCSI: qla1280: Drop host_lock while requesting firmware
+    - LP: #540231
+  * Staging: hv: add a pci device table
+    - LP: #540231
+  * Staging: hv: match on DMI values to know if we should run.
+    - LP: #540231
+  * Staging: mimio: remove the mimio driver
+    - LP: #540231
+  * dvb-core: Fix DoS bug in ULE decapsulation code that can be triggered
+    by an invalid Payload Pointer
+    - LP: #540231
+  * V4L/DVB (13148): uvcvideo: Handle V4L2_CTRL_TYPE_BUTTON control type in
+    VIDIOC_QUERYCTRL
+    - LP: #540231
+  * PM / Hibernate: Fix preallocating of memory
+    - LP: #540231
+  * macintosh/therm_adt746x: Fix sysfs attributes lifetime
+    - LP: #540231
+  * macintosh/hwmon/ams: Fix device removal sequence
+    - LP: #540231
+  * oprofile/x86: fix perfctr nmi reservation for mulitplexing
+    - LP: #540231
+  * oprofile: remove tracing build dependency
+    - LP: #540231
+  * oprofile/x86: remove node check in AMD IBS initialization
+    - LP: #540231
+  * oprofile/x86: use kzalloc() instead of kmalloc()
+    - LP: #540231
+  * oprofile/x86: fix msr access to reserved counters
+    - LP: #540231
+  * ALSA: hda: Use 3stack quirk for Toshiba Satellite L40-10Q
+    - LP: #524948, #540231
+  * ALSA: via82xx: add quirk for D1289 motherboard
+    - LP: #540231
+  * ALSA: pcm core - fix fifo_size channels interval check
+    - LP: #540231
+  * ALSA: USB MIDI support for Access Music VirusTI
+    - LP: #540231
+  * ALSA: hda: Use LPIB for Dell Latitude 131L
+    - LP: #530346, #540231
+  * ALSA: hda: Use LPIB for a Biostar Microtech board
+    - LP: #523953, #540231
+  * ALSA: hda - Add a position_fix quirk for MSI Wind U115
+    - LP: #540231
+  * ALSA: hda - Add position_fix quirk for HP dv3
+    - LP: #540231
+  * ALSA: hda-intel: Add position_fix quirk for ASUS M2V-MX SE.
+    - LP: #540231
+  * ASoC: fix ak4104 register array access
+    - LP: #540231
+  * driver-core: fix race condition in get_device_parent()
+    - LP: #540231
+  * Driver-Core: devtmpfs - reset inode permissions before unlinking
+    - LP: #540231
+  * tty: Fix the ldisc hangup race
+    - LP: #540231
+  * serial: imx: fix NULL dereference Oops when pdata == NULL
+    - LP: #540231
+  * USB: serial: sierra driver indat_callback fix
+    - LP: #511157, #540231
+  * USB: SIS USB2VGA DRIVER: support KAIREN's USB VGA adaptor
+    USB20SVGA-MB-PLUS
+    - LP: #540231
+  * USB: fix I2C API usage in ohci-pnx4008.
+    - LP: #540231
+  * p54usb: Add the USB ID for Belkin (Accton) FD7050E ver 1010ec
+    - LP: #540231
+  * p54pci: handle dma mapping errors
+    - LP: #540231
+  * gpiolib: Actually set output state in wm831x_gpio_direction_output()
+    - LP: #540231
+  * hwmon: (tmp421) Fix temperature conversions
+    - LP: #540231
+  * hwmon: (tmp421) Restore missing inputs
+    - LP: #540231
+  * pata_hpt3x2n: always stretch UltraDMA timing
+    - LP: #540231
+  * scm: Only support SCM_RIGHTS on unix domain sockets.
+    - LP: #540231
+  * ath9k: fix beacon timer restart after a card reset
+    - LP: #540231
+  * ath9k: fix rate control fallback rate selection
+    - LP: #540231
+  * ath9k: disable RIFS search for AR91xx based chips
+    - LP: #540231
+  * ath5k: use correct packet type when transmitting
+    - LP: #540231
+  * b43/b43legacy: Wake queues in wireless_core_start
+    - LP: #540231
+  * netfilter: xt_recent: fix buffer overflow
+    - LP: #540231
+  * netfilter: xt_recent: fix false match
+    - LP: #540231
+  * sunxvr500: Additional PCI id for sunxvr500 driver
+    - LP: #540231
+  * thinkpad-acpi: fix poll thread auto-start
+    - LP: #540231
+  * thinkpad-acpi: R52 brightness_mode has been confirmed
+    - LP: #540231
+  * thinkpad-acpi: document HKEY event 3006
+    - LP: #540231
+  * thinkpad-acpi: make driver events work in NVRAM poll mode
+    - LP: #540231
+  * thinkpad-acpi: fix bluetooth/wwan resume
+    - LP: #540231
+  * ocfs2: Only bug out in direct io write for reflinked extent.
+    - LP: #540231
+  * x86, ia32_aout: do not kill argument mapping
+    - LP: #540231
+  * x86: Add iMac9,1 to pci_reboot_dmi_table
+    - LP: #540231
+  * x86, xen: Disable highmem PTE allocation even when CONFIG_HIGHPTE=y
+    - LP: #540231
+  * x86: Avoid race condition in pci_enable_msix()
+    - LP: #540231
+  * x86: Fix SCI on IOAPIC != 0
+    - LP: #540231
+  * USB: xhci: Fix finding extended capabilities registers
+    - LP: #540231
+  * USB: fix the idProduct value for USB-3.0 root hubs
+    - LP: #540231
+  * USB: fix crash in uhci_scan_schedule
+    - LP: #540231
+  * USB: remove debugging message for uevent constructions
+    - LP: #540231
+  * USB: Move hcd free_dev call into usb_disconnect to fix oops
+    - LP: #540231
+  * USB: ftdi_sio: isolate all device IDs to new ftdi_sio_ids.h header
+    - LP: #540231
+  * USB: ftdi_sio: sort PID/VID entries in new ftdi_sio_ids.h header
+    - LP: #540231
+  * USB: ftdi_sio: new device id for papouch AD4USB
+    - LP: #540231
+  * USB: ftdi_sio: add device IDs (several ELV, one Mindstorms NXT)
+    - LP: #540231
+  * USB: add new ftdi_sio device ids
+    - LP: #540231
+  * USB: serial: ftdi: add CONTEC vendor and product id
+    - LP: #540231
+  * USB: cp210x: Add 81E8 (Zephyr Bioharness)
+    - LP: #540231
+  * USB: unusual_devs: Add support for multiple Option 3G sticks
+    - LP: #540231
+  * sunrpc: remove unnecessary svc_xprt_put
+    - LP: #540231
+  * SUNRPC: Handle EINVAL error returns from the TCP connect operation
+    - LP: #540231
+  * s3cmci: s3cmci_card_present: Use no_detect to decide whether there is a
+    card detect pin
+    - LP: #540231
+  * rtc-coh901331: fix braces in resume code
+    - LP: #540231
+  * NFS: Fix an allocation-under-spinlock bug
+    - LP: #540231
+  * dm: free dm_io before bio_endio not after
+    - LP: #540231
+  * KVM: x86 emulator: Add group8 instruction decoding
+    - LP: #540231
+  * KVM: x86 emulator: Forbid modifying CS segment register by mov
+    instruction
+    - LP: #540231
+  * KVM: x86 emulator: Add group9 instruction decoding
+    - LP: #540231
+  * KVM: x86 emulator: Check CPL level during privilege instruction
+    emulation
+    - LP: #540231
+  * sched: Fix sched_mv_power_savings for !SMT
+    - LP: #540231
+  * sched: Fix SMT scheduler regression in find_busiest_queue()
+    - LP: #540231
+  * sched: Don't use possibly stale sched_class
+    - LP: #540231
+  * x86, mm: Allow highmem user page tables to be disabled at boot time
+    - LP: #540231
+  * Linux 2.6.32.10
+    - LP: #540231
+  * drm/i915: give up on 8xx lid status
+    - LP: #540231
+  * drm/i915: Use a dmi quirk to skip a broken SDVO TV output.
+    - LP: #540231
+  * drm/ttm: handle OOM in ttm_tt_swapout
+    - LP: #540231
+  * drm/radeon/kms/atom: fix shr/shl ops
+    - LP: #540231
+  * Linux 2.6.32.10+drm33.1
+    - LP: #540231
+
+  [ Ubuntu: 2.6.32-16.25 ]
+
+  * linux-tools -- move to Suggests: with explicit seeding
+    - LP: #534635
+  * [Config] CONFIG_HID=m
+  * (pre-stable) sched: Fix SMT scheduler regression in
+    find_busiest_queue()
+  * KVM: introduce kvm_vcpu_on_spin
+  * KVM: VMX: Add support for Pause-Loop Exiting
+
+ -- Andy Whitcroft <apw@canonical.com>  Wed, 31 Mar 2010 16:22:59 +0100
+
+linux-mvl-dove (2.6.32-202.14) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * rules -- allow architecture configurations to be missing
+
+  [ Eric Miao ]
+
+  * [Config]: Make UIO_DOVE_VMETA driver builtin
+    - LP: #541921
+
+  [ Upstream Kernel Changes ]
+
+  * sound: skip error handling inside soc_pcm_open
+    - LP: #530404
+  * DVS: Fixed a potential conflict of defining dvs_enable as global for
+    two diffrent baords
+    - LP: #537311
+  * rt5611_ts: swap touchscreen Y axis
+    - LP: #537311
+  * dove: fix section mismatch error
+    - LP: #537311
+
+ -- Stefan Bader <stefan.bader@canonical.com>  Fri, 26 Mar 2010 22:53:03 +0100
+
+linux-mvl-dove (2.6.32-202.13) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * armel -- disable linux-tools
+
+ -- Andy Whitcroft <apw@canonical.com>  Tue, 09 Mar 2010 21:39:29 +0000
+
+linux-mvl-dove (2.6.32-202.12) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * rebase to Ubuntu-2.6.32-16.24
+  * [Config] updateconfigs following rebase to Ubuntu-2.6.32-16.24
+  * [Config] updateconfigs following rebase to Ubuntu-2.6.32-16.24
+  * lintian -- update debhelper package version dependancy
+  * lintian -- fix ghostscript dependancy
+  * lintian -- add required misc:Depends
+  * rename the debug packages to match archive standard
+    - LP: #527837
+
+  [ Eric Miao ]
+
+  * SAUCE: dove: disable conflicting v6 cache fns in zImage head.S
+  * [Config]: CONFIG_KEXEC=y and CONFIG_ATAGS_PROC=y
+  * [Config]: update configs for latest Marvell patchset
+  * [Config]: disable OABI_COMPAT
+    - LP: #534277
+
+  [ Saeed Bishara ]
+
+  * SAUCE: arm: invalidate TLBs when enabling mmu
+  * SAUCE: arm: disable L2 cache in the v7 finish function
+
+  [ Tony Lindgren ]
+
+  * SAUCE: arm: Fix init_atags_procfs() to check tag->hdr.size
+
+  [ Upstream Kernel Changes ]
+
+  * Revert "printk: remove unused code from kernel/printk.c"
+  * Revert "Save thread registers in coredumps" Because this patch is
+    already in the kernel.
+  * Revert "dove: enable cpu mode (v6/v7) in run-time detection"
+  * Revert "ARM: provide the cpu_match function to PJ4"
+  * Revert "ARM: introduce the cpu_match function to the proc_info"
+  * ARM: 5884/1: arm: Fix DCC console for v7
+  * ARM: 5885/1: arm: Flush TLB entries in setup_mm_for_reboot()
+  * ARM: 5886/1: arm: Fix cpu_proc_fin() for proc-v7.S and make kexec work
+  * ARM: 5888/1: arm: Update comments in cacheflush.h and remove
+    unnecessary V6 and V7 comments
+  * rt5630: fix codec->hw_read function
+  * mm: Check if any page in a pageblock is reserved before marking it
+    MIGRATE_RESERVE
+  * Add build option to to set the default panic timeout.
+  * sched: Enable might_sleep before initializing drivers.
+  * Add code to prevent system calls from being restarted muliple times
+    before returning from the kernel.
+  * Save thread registers in coredumps
+  * armv6 dcc tty driver
+  * PM: Add wake lock api.
+  * PM: Add early suspend api.
+  * PM: Implement wakelock api.
+  * PM: Implement early suspend api
+  * PM: Add user-space wake lock api.
+  * PM: wakelock: Abort task freezing if a wake lock is held.
+  * PM: earlysuspend: Add console switch when user requested sleep state
+    changes.
+  * PM: earlysuspend: Removing dependence on console.
+  * rtc: Add android alarm driver.
+  * rtc: Try to prevent RTC errors from accumulating.
+  * switch: switch class and GPIO drivers.
+  * pmem: Add pmem driver
+  * Add android_aid.h
+  * ashmem for 2.6.27.
+  * Add missing conflict codes for 0079-ashmem-for-2.6.27.patch
+  * Paranoid network.
+  * net: socket ioctl to reset connections matching local address
+  * sysfs_net_ipv4: Add sysfs-based knobs for controlling TCP window size
+  * uidstat: Adding uid stat driver to collect network statistics.
+  * adding conflict patch codes for
+    0083-uidstat-Adding-uid-stat-driver-to-collect-network-s.patch
+  * FAT: Add new ioctl VFAT_IOCTL_GET_VOLUME_ID for reading the volume ID.
+  * Grants system server access to /proc/<pid>/oom_adj for Android
+    applications.
+  * Input: Generic GPIO Input device.
+  * add missing conflict code for
+    0086-Input-Generic-GPIO-Input-device.patch
+  * Input: Hold wake lock while event queue is not empty.
+  * Input: Use monotonic time for event time stamps.
+  * Input: synaptics_i2c_rmi: Driver for Synaptics Touchscreens using RMI
+    over I2C.
+  * input: Add keyreset driver.
+  * mmc: Add status IRQ and status callback function to mmc platform data
+  * mmc: sd: Add new CONFIG_MMC_PARANOID_SD_INIT for enabling retries
+    during SD detection
+  * mmc: Add concept of an 'embedded' SDIO device.
+  * trout: Add functions for WiFi
+  * mmc: Add new API call 'sdio_reset_comm' for resetting communication
+    with an SDIO device
+  * mmc: sd: When resuming, try a little harder to init the card
+  * mmc: mmcblk: Add new feature 'CONFIG_MMC_BLOCK_PARANOID_RESUME'
+  * mmc: sd: Add retries in re-detection
+  * android_usb: Composite USB gadget driver for android.
+  * rfkill: Introduce CONFIG_RFKILL_PM and use instead of CONFIG_PM to
+    power down
+  * tiwlan: Add abstract wifi control functions support
+  * android: Add android config documentation to boot framework.
+  * block: block_dump: Add number of sectors to debug output
+  * fs: block_dump: Don't display inode changes if block_dump < 2
+  * regenerated code for
+    0107-mmc-core-Hold-a-wake-lock-accross-delayed-work-m.patch
+  * mmc: sd: Remove debugging printk
+  * printk: Fix log_buf_copy termination.
+  * kernel_debugger_core: add interrupt-context debugger core
+  * kernel_debugger_core: Add sysrq command.
+  * pmem: Add include sched.h to fix compile errors
+  * net: Fix compilation of the IPv6 module
+  * ashmem: Don't install fault handler for private mmaps.
+  * ashmem: Add common prefix to name reported in /proc/pid/maps
+  * net: add PPP on L2TP Access Concentrator (PPPoLAC) driver.
+  * cgroup: Add generic cgroup subsystem permission checks.
+  * add missing conflict codes for
+    0124-cgroup-Add-generic-cgroup-subsystem-permission-chec.patch
+  * nohz: Fix ondemand governor not always ramping up on 100% load.
+  * usb: gadget: android: Allow usb charging to draw up to 500mA instead of
+    250.
+  * regnerate patch for
+    0127-futex-Restore-one-of-the-fast-paths-eliminated-by-3.patch
+  * Optionally flush entire dcache from v6_dma_flush_range
+  * net: add PPP on PPTP Network Server (PPPoPNS) driver.
+  * sdio: fix sdio_reset_comm() error path
+  * net: Fix a bitmask in PPPoPNS and rename constants in PPPoPNS and
+    PPPoLAC.
+  * net: Fix a potential deadlock while releasing PPPoLAC/PPPoPNS socket.
+  * ashmem: don't require a page aligned size
+  * security: Add AID_NET_RAW and AID_NET_ADMIN capability check in
+    cap_capable().
+  * net: Replace AID_NET_RAW checks with capable(CAP_NET_RAW).
+  * net: Force PPPoLAC and PPPoPNS to bind an interface before creating PPP
+    channel.
+  * Add default configuration for Android
+  * Sync with the newest dove_defconfig
+  * Turn off TLS feature for android in v7
+  * Fix compiling error for lowmemorykiller
+  * Fix Compiling error for shmem
+  * Temporary disable pm_suspend call.
+  * Fix crash error for shmem
+  * Fix met compiling errors from 2.6.31 kernel to 2.6.32 kernel.
+  * Sync up with 2.6.32.2's dove_defconfig
+  * cesa: add address decoding windows initialization code
+  * Refine comments and algorithm for easier to understand LCD's HW RGB
+    format.
+  * PM: runtime support for V6 or V7 mode
+  * Remove all Z0 specific code
+  * dove: remove remaning Z0 stuff
+  * Add auto-calibration
+  * fix compilation error (kernel/power/Makefile)
+  * update dove_avng_y1_defconfig
+  * dovefb: clean up CONFIG_DOVEFB_SINGLE_DISPLAY_ACCURATE_PCLK
+  * 1. fill initial data for dcon. 2. refine backlight driver interface.
+  * 1. add clock disable and enable interface 2. refine changing LCD source
+    clock implementation.
+  * Fill backlight driver platform data
+  * 1. apply Tawfik's patch to hook fb_blank event. 2. add LCD power on and
+    off interface.
+  * Refine backlight interface more portable
+  * 1. Refine dcon power management feature 2. Implement sysfs interfaces.
+  * 1. Fix blank function setting to wrong mode when suspend. 2. Add SRAM
+    power down interface.
+  * remove compiling warning.
+  * dove: remove another DOVE_REV_Z0 stuff
+  * dove: sync dove_defconfig with latest patches
+  * dove: fix compilation warning in pm.c
+  * Adds ADI9889 HDMI transmitter support
+  * Dove: Add Video Plug support
+  * MPP changes for Dove -
+  * Swap R&B for Video plug on video overlay Unclear why this is required,
+    but it solves color bitmapping. Keep now for Video plug but requires
+    more research
+  * 1. Remove testing code. 2. disable dumb interface as well when receives
+    FB_BLANK.
+  * Dove nand: add support for Two CS for the DB board
+  * Dove nand: Add support for "cmdlinepart" option Add support for
+    "cmdlinepart" option in kernel command line dove-nand should be used as
+    the NAND HAL device name. example: mtdparts=dove-nand:1g(swap),-(root)
+  * dove: use dove_cesa_addr_dec_data instead of dove_eth_addr_dec_data for
+    cesa driver
+  * dovefb: fix compilation error when mv_spi is disabled
+  * Dove: remove gpu_size, vmeta_size and pvt_size kernel command line
+    parameters from code as they have no effect because fixup function is
+    called before parse_cmdline function ( see arch/arm/kernel/setup.c )
+  * VMeta PM func: 1. Power on the VMeta only when VMeta was been used 2.
+    Support suspend/resume when VMeta was been used (also need user space
+    player support)
+  * Add a watch dog timer for Vmeta suspend/resume func
+  * Dove NAND: fix double byte command on writing small pages
+  * Change Vmeta PM clock control to using Linux clock framework
+  * Disable the Vmtea clock/power as default
+  * Fix MMC/SD cannot be detected issue due to merge upgraded from .31 to
+    .32 Signed-off-by: Steve Guo <steve.guo@marvell.com>
+  * dove: disable some andriod features
+  * dove: fix crash in shmem
+  * PM: Debugger Reset Workaround in Deep-Idle
+  * dove: increase BOOT_PARAMS_SIZE for dram params
+  * Add support for AV-D1 X0 board and modify ADI9889 driver to fit Linux
+    coding style
+  * remove android config from dove_defconfig
+  * update dove_avng_y1_defconfig
+  * Fixed AC97 read error issue. Modified SOC sound control items.
+  * update dove_avng_x0_defconfig : Disable CONFIG_DOVE_DEBUGGER_MODE_V6
+  * dove: enable UBIFS extended features and advanced compression
+  * crypt: update ocf to latest release
+  * dove: enable kexec support
+  * sound: rt5623 codec: deprecate hw_read and fix driver name
+  * dove: use updated i2s codec name
+  * dove: fix dai structure for avengers boards.
+  * dove: delete the i2c-dummy.c driver which is not used by any system
+  * sound: rename cs42l51 codec i2c driver from i2s_i2c to cs42l51
+  * sound: change rt5630 name from i2s_i2c to rt5630
+  * dove: configure pm mpps for new revision of avengers board
+  * dove: change power button code to KEY_SLEEP
+  * Add more resolution support in kernel driver according VGA timing spec
+  * LCD: disabled CONFIG_DOVEFB_SINGLE_DISPLAY_ACCURATE_PCLK and instead
+    disabled accurate clock option in runtime if both LCD units are
+    enabled; this will enable using the same uImage for dual and non-dual
+    mode.
+  * 1. fill initial data for dcon. 2. refine backlight driver interface.
+  * dove: cleanup gpu_size kernel parameter
+  * pcie - add option to disable scan by command line parameter
+  * PM: add FB notifier to manage Book/Deep-Idle toggeling
+  * ARM: Ensure ARMv6/7 mm files are built using appropriate assembler
+    options
+  * kirkwood: fix compilation errors
+  * dove: disable highmem and enable CONFIG_VMSPLIT_2G
+  * dove: set SKB_HEADROOM to 32 instead of 16
+  * bmm: export outer_cache
+  * dove: add missing pj4 name entries
+  * Fix thread stack overflow caused by Dove NAND HAL driver
+  * Remove unused include file and declaration
+  * Roll back wait for vsync mechanism to wait_event_interruptable_timeout
+    and give timeout delay from 40ms to 4ms.
+  * dovefb: remove another DOVE_REV_Z0 stuff
+  * mv643xx_eth: don't include cache padding in rx desc buffer size
+  * fix build error introduced by add missing conflict codes for
+    0124-cgroup-Add-generic-cgroup-subsystem-permission-chec.patch
+  * crypto: add openssl patch for user space to utilize the cesa engine
+  * crypto: update openswan patch for version 2.6.24
+  * dove: add device driver for the GPU gc600 engine
+  * Marvell Buffer Management Module for VPU & GPU memory buffer maintain
+  * BMM: split VPU & GPU to choice use BMM or not
+  * dove: enable building the bmm driver as module
+  * cesa: remove patch for openswan version 2.6.18
+  * Configure new LCD register for upcoming DOVE A0 Chip
+  * fix pixclk when under interlaced mode
+  * Not to power off LCD SRAM when system blanks screen.
+  * dvs: make dvs_enable variable depend on board, and change the default
+    to enable instead of disable on Dove DB board.
+
+  [ Ubuntu: 2.6.32-16.24 ]
+
+  * armel -- perf userspace does not support arm
+  * ia64 -- libelf-dev/binutils-dev to not provide necessary libraries
+
+  [ Ubuntu: 2.6.32-16.23 ]
+
+  * SAUCE: PM report driver and device suspend/resume times -- move config
+  * update to standards version 3.8.4.0
+  * printenv -- expose all of the package selectors
+  * source package -- cleanup source content control
+  * doc package -- ensure we do build package content on buildd
+  * lintian -- correct the address in the debian/copyright
+  * lintian -- update debhelper package version dependancy
+  * lintian -- fix ghostscript dependancy
+  * lintian -- add required misc:Depends
+  * lintian -- move our debhelper compat level to debian/compat
+  * perf -- build the kernel carried tools
+  * perf -- add linux-tools carrying the version switches and manuals
+  * SAUCE: fix up Kconfig for staging drivers
+  * [Config] enable NOUVEAU etc following drm backport
+  * update DRM to mainline v2.6.33
+  * [Config] Remove AppArmor config options that no longer exist (ports)
+  * [Config] updateportsconfigs following drm update
+  * ubuntu: AppArmor -- update to mainline 2010-03-04
+  * SAUCE: AppArmor: Reintroduce AppArmor 2.4 compatibility
+  * SAUCE: AppArmor: replace strim with strstrip for 2.6.32 kernels
+  * [Config] Remove AppArmor config options that no longer exist
+  * ubuntu: rtl8192se -- version 2010-0115,0014
+    - LP: #530275
+  * [Config] added CONFIG_RTL8192SE module.
+    - LP: #530275
+  * [Config] Added vmw_pvscsi to d-i/scsi-modules
+    - LP: #531017
+  * [Upstream] netfilter: xt_recent: Add an entry reaper
+  * Revert "KVM: x86 emulator: Check CPL level during privilege instruction
+    emulation"
+  * Revert "KVM: x86 emulator: Fix popf emulation"
+  * Revert "KVM: x86 emulator: Check IOPL level during io instruction
+    emulation"
+  * Revert "KVM: x86 emulator: Add Virtual-8086 mode of emulation"
+  * Revert "KVM: fix memory access during x86 emulation."
+  * Add vlan (8021.Q) module package for d-i.
+  * (pre-stable) drm/i915: blacklist lid status: Sony VGN-BX196VP, Dell
+    Inspiron 700m
+    - LP: #515246
+  * [Upstream] docbook: need xmldoclinks for all doc types
+  * x86: set_personality_ia32() misses force_personality32
+  * lib: Introduce generic list_sort function
+  * drm/nv50: Implement ctxprog/state generation.
+  * drm/nv50: Remove redundant/incorrect ctxvals initialisation.
+  * (pre-stable) drm/i915: blacklist lid status: Sony VGN-BX196VP, Dell
+    Inspiron 700m
+    - LP: #515246
+
+  [ Ubuntu: 2.6.32-15.22 ]
+
+  * Revert "[Config] added new config option CONFIG_SR_REPORT_TIME_LIMIT"
+  * Revert "SAUCE: PM report driver and device suspend/resume times."
+  * [Config] set CONFIG_SR_REPORT_TIME_LIMIT
+  * SAUCE: PM report driver and device suspend/resume times.
+
+  [ Ubuntu: 2.6.32-15.21 ]
+
+  * Revert "(pre-stable) drm/i915: Increase fb alignment to 64k"
+  * Revert "[Config] lenovo-sl-laptop -- enable"
+  * Revert "ubuntu: lenovo-sl-laptop -- git tip (b19a08f81f)"
+  * armel -- cramfs module will no longer be built
+  * d-i -- make all modules optional
+  * rename the debug packages to match archive standard
+    - LP: #527837
+  * lenovo-sl-laptop is no longer built
+  * Disable 4MB page tables for Atom, work around errata AAE44
+    - LP: #523112
+  * ubuntu: dm-raid4-5: Depend on XOR_BLOCKS
+  * ubuntu: fsam7400: Depend on CHECK_SIGNATURE
+  * SAUCE: drm/i915: don't change DRM configuration when releasing load
+    detect pipe
+    - LP: #488328
+  * [Config] armel Update versatile initrd configs
+    - LP: #524893
+  * SAUCE: [um] Don't use nx_enabled under UML
+    - LP: #524849
+  * [Config] added new config option CONFIG_SR_REPORT_TIME_LIMIT
+  * SAUCE: v3 - Add Dell Business Class Netbook LED driver
+  * SAUCE: PM report driver and device suspend/resume times.
+  * Revert "[Upstream] e1000e: enhance frame fragment detection"
+    - CVE-2009-4538
+  * Revert "[Upstream] e1000: enhance frame fragment detection"
+    - CVE-2009-4536
+  * [Config] Enabled CONFIG_LEDS_DELL_NETBOOKS=m
+  * SAUCE: (pre-stable) netfilter: xt_recent: fix buffer overflow
+  * SAUCE: (pre-stable) netfilter: xt_recent: fix false match
+  * Revert "(pre-stable) eCryptfs: Add getattr function"
+  * Fix potential crash with sys_move_pages
+  * futex_lock_pi() key refcnt fix
+  * futex: Handle user space corruption gracefully
+  * futex: Handle futex value corruption gracefully
+  * Fix race in tty_fasync() properly
+  * hwmon: (w83781d) Request I/O ports individually for probing
+  * hwmon: (lm78) Request I/O ports individually for probing
+  * hwmon: (adt7462) Wrong ADT7462_VOLT_COUNT
+  * ALSA: ctxfi - fix PTP address initialization
+  * drm/i915: disable hotplug detect before Ironlake CRT detect
+  * drm/i915: enable self-refresh on 965
+  * drm/i915: Disable SR when more than one pipe is enabled
+  * drm/i915: Fix DDC on some systems by clearing BIOS GMBUS setup.
+  * drm/i915: Add HP nx9020/SamsungSX20S to ACPI LID quirk list
+  * drm/i915: Fix the incorrect DMI string for Samsung SX20S laptop
+  * drm/i915: Add MALATA PC-81005 to ACPI LID quirk list
+  * usb: r8a66597-hcd: Flush the D-cache for the pipe-in transfer buffers.
+  * i2c-tiny-usb: Fix on big-endian systems
+  * drm/i915: handle FBC and self-refresh better
+  * drm/i915: Increase fb alignment to 64k
+  * drm/i915: Update write_domains on active list after flush.
+  * regulator: Fix display of null constraints for regulators
+  * ALSA: hda-intel: Avoid divide by zero crash
+  * CPUFREQ: Fix use after free of struct powernow_k8_data
+  * freeze_bdev: don't deactivate successfully frozen MS_RDONLY sb
+  * cciss: Make cciss_seq_show handle holes in the h->drv[] array
+  * ioat: fix infinite timeout checking in ioat2_quiesce
+  * resource: add helpers for fetching rlimits
+  * fs/exec.c: restrict initial stack space expansion to rlimit
+  * cifs: fix length calculation for converted unicode readdir names
+  * NFS: Fix a reference leak in nfs_wb_cancel_page()
+  * NFS: Try to commit unstable writes in nfs_release_page()
+  * NFSv4: Don't allow posix locking against servers that don't support it
+  * NFSv4: Ensure that the NFSv4 locking can recover from stateid errors
+  * NFS: Fix an Oops when truncating a file
+  * NFS: Fix a umount race
+  * NFS: Fix a bug in nfs_fscache_release_page()
+  * NFS: Fix the mapping of the NFSERR_SERVERFAULT error
+  * md: fix 'degraded' calculation when starting a reshape.
+  * V4L/DVB: dvb-core: fix initialization of feeds list in demux filter
+  * Export the symbol of getboottime and mmonotonic_to_bootbased
+  * kvmclock: count total_sleep_time when updating guest clock
+  * KVM: PIT: control word is write-only
+  * tpm_infineon: fix suspend/resume handler for pnp_driver
+  * amd64_edac: Do not falsely trigger kerneloops
+  * netfilter: nf_conntrack: fix memory corruption with multiple namespaces
+  * netfilter: nf_conntrack: per netns nf_conntrack_cachep
+  * netfilter: nf_conntrack: restrict runtime expect hashsize modifications
+  * netfilter: xtables: compat out of scope fix
+  * netfilter: nf_conntrack: fix hash resizing with namespaces
+  * drm/i915: remove full registers dump debug
+  * drm/i915: add i915_lp_ring_sync helper
+  * drm/i915: Don't wait interruptible for possible plane buffer flush
+  * dasd: remove strings from s390dbf
+  * crypto: padlock-sha - Add import/export support
+  * wmi: Free the allocated acpi objects through wmi_get_event_data
+  * dell-wmi, hp-wmi, msi-wmi: check wmi_get_event_data() return value
+  * /dev/mem: introduce size_inside_page()
+  * devmem: check vmalloc address on kmem read/write
+  * devmem: fix kmem write bug on memory holes
+  * SCSI: mptfusion : mptscsih_abort return value should be SUCCESS instead
+    of value 0.
+  * sh: Couple kernel and user write page perm bits for CONFIG_X2TLB
+  * ALSA: hda - use WARN_ON_ONCE() for zero-division detection
+  * dst: call cond_resched() in dst_gc_task()
+  * ALSA: hda - Improved MacBook (Pro) 5,1 / 5,2 support
+  * befs: fix leak
+  * rtc-fm3130: add missing braces
+  * Call flush_dcache_page after PIO data transfers in libata-sff.c
+  * ahci: add Acer G725 to broken suspend list
+  * pktgen: Fix freezing problem
+  * x86/amd-iommu: Fix IOMMU-API initialization for iommu=pt
+  * x86/amd-iommu: Fix deassignment of a device from the pt_domain
+  * x86: Re-get cfg_new in case reuse/move irq_desc
+  * Staging: fix rtl8187se compilation errors with mac80211
+  * ALSA: usb-audio - Avoid Oops after disconnect
+  * serial: 8250: add serial transmitter fully empty test
+  * sysfs: sysfs_sd_setattr set iattrs unconditionally
+  * class: Free the class private data in class_release
+  * USB: usbfs: only copy the actual data received
+  * USB: usbfs: properly clean up the as structure on error paths
+  * rtl8187: Add new device ID
+  * ACPI: Add NULL pointer check in acpi_bus_start
+  * ACPI: fix High cpu temperature with 2.6.32
+  * drm/radeon/kms: use udelay for short delays
+  * NFS: Too many GETATTR and ACCESS calls after direct I/O
+  * eCryptfs: Add getattr function
+  * b43: Fix throughput regression
+  * ath9k: Fix sequence numbers for PAE frames
+  * mac80211: Fix probe request filtering in IBSS mode
+  * iwlwifi: Fix to set correct ht configuration
+  * dm stripe: avoid divide by zero with invalid stripe count
+  * dm log: userspace fix overhead_size calcuations
+  * Linux 2.6.32.9
+  * sfc: Fix SFE4002 initialisation
+  * sfc: Fix sign of efx_mcdi_poll_reboot() error in efx_mcdi_poll()
+  * sfc: SFE4002/SFN4112F: Widen temperature and voltage tolerances
+  * (pre-stable) HID: handle joysticks with large number of buttons
+    - LP: #492056
+  * (pre-stable) HID: extend mask for BUTTON usage page
+    - LP: #492056
+  * PM: Measure device suspend and resume times
+  * e1000: enhance frame fragment detection
+    - CVE-2009-4536
+  * e1000e: enhance frame fragment detection
+    - CVE-2009-4538
+  * KVM: fix memory access during x86 emulation.
+    - CVE-2010-0306
+  * KVM: x86 emulator: Add Virtual-8086 mode of emulation
+    - CVE-2010-0306
+  * KVM: x86 emulator: Check IOPL level during io instruction emulation
+    - CVE-2010-0306
+  * KVM: x86 emulator: Fix popf emulation
+    - CVE-2010-0306
+  * KVM: x86 emulator: Check CPL level during privilege instruction
+    emulation
+    - CVE-2010-0306
+  * Input: wacom - ensure the device is initialized properly upon resume
+  * Input: wacom - add defines for packet lengths of various devices
+  * Input: wacom - add support for new LCD tablets
+    - LP: #516777
+
+  [ Ubuntu: 2.6.32-14.20 ]
+
+  * rebuild following the GCC update to match compiler for out of tree modules
+  * Revert "[Config] drbd -- enable"
+  * Revert "ubuntu: drbd -- version 8.3.1"
+  * SAUCE: khubd -- switch USB product/manufacturer/serial handling to RCU
+    - LP: #510937
+
+ -- Andy Whitcroft <apw@canonical.com>  Mon, 08 Mar 2010 15:26:14 +0000
+
+linux-mvl-dove (2.6.32-201.11) lucid; urgency=low
+
+  [ Upstream Kernel Changes ]
+
+  * ARM: VFP: add support to sync the VFP state of the current thread
+    - LP: #507503
+  * ARM: VFP: preserve the HW context when calling signal handlers
+    - LP: #507503
+
+ -- Andy Whitcroft <apw@canonical.com>  Tue, 23 Feb 2010 11:01:14 +0000
+
+linux-mvl-dove (2.6.32-201.10) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * rebase to Ubuntu-2.6.32-14.19
+
+  [ Vendor Kernel Changes ]
+
+  * PM: Workaround for M_RESET and CKE using 2 PMU MPPs
+  * PM: Enhance ASM code sharing in PMU SRAM to be optimized for size
+  * dove: configure pm mpps for new revision of db board
+  * Dove PM: Change deepIdle default to disable and add new command line
+    kernel parameter "pmu_enable" that can be passed to enable deepIdle if
+    needed
+  * pm: restrict the new standby fix on the board only to DB boards with
+    Dove X0 chip and enable the possibility of using the old mode for
+    boards without the ECO passing "standby_fix=0" through the kernel
+    command line ( In U-Boot) .
+
+  [ Ubuntu: 2.6.32-14.19 ]
+
+  * ensure we build the source package contents when enabled
+    - LP: #522308
+  * [Config] enable CONFIG_X86_MCE_XEON75XX
+  * SAUCE: AppArmor -- add linux/kref.h for struct kref
+  * [Config] enable CONFIG_HID_ORTEK
+  * enable udeb generation for arm versatile flavour
+    - LP: #522515
+  * ubuntu: AppArmor -- update to mainline 2010-02-18
+    - LP: #439560, #496110, #507069
+  * SAUCE: HID: add support for Ortek WKB-2000
+    - LP: #405390
+  * tpm_tis: TPM_STS_DATA_EXPECT workaround
+    - LP: #490487
+  * x86, mce: Xeon75xx specific interface to get corrected memory error
+    information
+  * x86, mce: Rename cpu_specific_poll to mce_cpu_specific_poll
+  * x86, mce: Make xeon75xx memory driver dependent on PCI
+  * drm/edid: Unify detailed block parsing between base and extension
+    blocks
+    - LP: #500999
+  * (pre-stable) eCryptfs: Add getattr function
+    - LP: #390833
+
+ -- Andy Whitcroft <apw@canonical.com>  Thu, 18 Feb 2010 19:35:34 +0000
+
+linux-mvl-dove (2.6.32-201.9) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * sub-makefile builder invocation should use $SHELL
+
+ -- Andy Whitcroft <apw@canonical.com>  Thu, 11 Feb 2010 19:44:43 +0000
+
+linux-mvl-dove (2.6.32-201.8) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * rebase to Ubuntu-2.6.32-13.18
+
+  [ Eric Miao ]
+
+  * [Config]: CONFIG_UIO_DOVE_VMETA_MEM_SIZE=96 for 1080p playback
+    - LP: #452558
+
+  [ Ubuntu: 2.6.32-13.18 ]
+
+  * Revert "enforcer -- make the enforcement configuration common"
+  * Revert "(pre-stable) Input: ALPS - add interleaved protocol support
+    (Dell E6x00 series)"
+  * Revert "(pre-stable) driver-core: fix devtmpfs crash on s390"
+  * Revert "(pre-stable) Driver-Core: devtmpfs - set root directory mode to
+    0755"
+  * Revert "SAUCE: Adds support for COMPAL JHL90 webcam"
+  * Revert "SAUCE: fix kernel oops in VirtualBox during paravirt patching"
+  * Revert "SAUCE: make fc transport removal of target configurable"
+  * enforcer -- make the enforcement configuration common
+  * getabis -- add preempt flavour to the list
+  * [Config] enforce DEVTMPFS options
+  * [Config] armel -- cleanup to-be builtin modules
+  * [Config] cleanup ports configs
+  * [Config] enable CRYPTO_GHASH_CLMUL_NI_INTEL
+    - LP: #485536
+  * add printdebian target to find branch target
+  * distclean -- do not remove debian.env
+  * [Config] generic-pae switch to M586TSC
+    - LP: #519448
+  * git-ubuntu-log -- commonise duplicated log handling
+  * git-ubuntu-log -- tighten up Bug: NNNN matching
+  * git-ubuntu-log -- sort the bug numbers
+  * (pre-stable) drm/i915: Increase fb alignment to 64k
+    - LP: #404064
+  * arm -- enable ubuntu/ directory
+  * SAUCE: crypto: ghash - Add PCLMULQDQ accelerated implementation
+  * SAUCE: crypto: ghash-intel - Fix building failure on x86_32
+  * [Config] cleanup preempt configuration
+  * [Config] versatile: Fix video output
+    - LP: #517594
+  * [Config] armel DEFAULT_MMAP_MIN_ADDR=32768
+  * [Config] Large update to armel/versatile
+  * [Config] versatile: Add RTC support
+  * [Config] armel: Enable NEON
+  * [Config] versatile: Builtin MMC support
+  * [Config] versatile Builtin SCSI controller
+  * [Config] armel Disable dma_cache_sync callers
+  * [Config] armel Disable asm/time.h users
+  * [Config] armel Disable out of range udelay()
+  * [Config] armel Disable flush_cache_range() users
+  * [Config] armel -- Enable ubuntu/ drivers
+  * SAUCE: drm/i915: Add display hotplug event on Ironlake
+  * SAUCE: drm/i915: Add ACPI OpRegion support for Ironlake
+  * Revert "[Upstream]: oprofile/x86: add Xeon 7500 series support"
+  * Revert "Revert "[Bluetooth] Eliminate checks for impossible conditions
+    in IRQ handler""
+  * clockevent: Don't remove broadcast device when cpu is dead
+  * clockevents: Add missing include to pacify sparse
+  * ACPI: don't cond_resched if irq is disabled
+  * be2net: Add support for next generation of BladeEngine device.
+  * be2net: Add the new PCI IDs to PCI_DEVICE_TABLE.
+  * mpt2sas: New device SAS2208 support is added
+  * ar9170: Add support for D-Link DWA 160 A2
+  * powerpc/fsl: Add PCI device ids for new QoirQ chips
+  * davinci: dm646x: Add support for 3.x silicon revision
+  * Input: ALPS - add interleaved protocol support (Dell E6x00 series)
+  * Driver-Core: devtmpfs - set root directory mode to 0755
+  * driver-core: fix devtmpfs crash on s390
+  * vfs: get_sb_single() - do not pass options twice
+  * ALSA: hda - Add PCI IDs for Nvidia G2xx-series
+  * V4L/DVB (13569): smsusb: add autodetection support for five additional
+    Hauppauge USB IDs
+  * USB: mos7840: add device IDs for B&B electronics devices
+  * USB: ftdi_sio: add USB device ID's for B&B Electronics line
+  * V4L/DVB (13168): Add support for Asus Europa Hybrid DVB-T card (SAA7134
+    SubVendor ID: 0x1043 Device ID: 0x4847)
+  * iTCO_wdt: Add support for Intel Ibex Peak
+  * atl1c:use common_task instead of reset_task and link_chg_task
+  * atl1e:disable NETIF_F_TSO6 for hardware limit
+  * V4L/DVB (13680a): DocBook/media: copy images after building HTML
+  * V4L/DVB (13680b): DocBook/media: create links for included sources
+  * netfilter: xtables: fix conntrack match v1 ipt-save output
+  * partitions: read whole sector with EFI GPT header
+  * partitions: use sector size for EFI GPT
+  * ALSA: ice1724 - Patch for suspend/resume for ESI Juli@
+  * sched: Fix isolcpus boot option
+  * sched: Fix missing sched tunable recalculation on cpu add/remove
+  * nohz: Prevent clocksource wrapping during idle
+  * nfsd: Fix sort_pacl in fs/nfsd/nf4acl.c to actually sort groups
+  * timers, init: Limit the number of per cpu calibration bootup messages
+  * PCI: Always set prefetchable base/limit upper32 registers
+  * iscsi class: modify handling of replacement timeout
+  * NFS: Revert default r/wsize behavior
+  * HID: fixup quirk for NCR devices
+  * scsi_devinfo: update Hitachi entries (v2)
+  * scsi_dh: create sysfs file, dh_state for all SCSI disk devices
+  * scsi_transport_fc: remove invalid BUG_ON
+  * lpfc: fix hang on SGI ia64 platform
+  * libfc: fix typo in retry check on received PRLI
+  * libfc: fix ddp in fc_fcp for 0 xid
+  * fcoe: remove redundant checking of netdev->netdev_ops
+  * libfc: Fix wrong scsi return status under FC_DATA_UNDRUN
+  * libfc: lport: fix minor documentation errors
+  * libfc: don't WARN_ON in lport_timeout for RESET state
+  * fcoe: initialize return value in fcoe_destroy
+  * libfc: Fix frags in frame exceeding SKB_MAX_FRAGS in fc_fcp_send_data
+  * libfc: fix memory corruption caused by double frees and bad error
+    handling
+  * libfc: fix free of fc_rport_priv with timer pending
+  * libfc: remote port gets stuck in restart state without really
+    restarting
+  * fcoe, libfc: fix an libfc issue with queue ramp down in libfc
+  * fcoe: Fix checking san mac address
+  * fcoe: Fix getting san mac for VLAN interface
+  * qlge: Remove explicit setting of PCI Dev CTL reg.
+  * qlge: Set PCIE max read request size.
+  * qlge: Don't fail open when port is not initialized.
+  * qlge: Add handler for DCBX firmware event.
+  * qlge: Bonding fix for mode 6.
+  * PCI: AER: fix aer inject result in kernel oops
+  * DMI: allow omitting ident strings in DMI tables
+  * Input: i8042 - remove identification strings from DMI tables
+  * Input: i8042 - add Gigabyte M1022M to the noloop list
+  * Input: i8042 - add Dritek quirk for Acer Aspire 5610.
+  * ALSA: hda - select IbexPeak handler for Calpella
+  * ALSA: hda - Fix quirk for Maxdata obook4-1
+  * ALSA: hda - Add missing Line-Out and PCM switches as slave
+  * iTCO_wdt.c - cleanup chipset documentation
+  * iTCO_wdt: add PCI ID for the Intel EP80579 (Tolapai) SoC
+  * iTCO_wdt: Add Intel Cougar Point and PCH DeviceIDs
+  * ahci: disable SNotification capability for ich8
+  * ata_piix: fix MWDMA handling on PIIX3
+  * md: fix small irregularity with start_ro module parameter
+  * V4L/DVB (13826): uvcvideo: Fix controls blacklisting
+  * cio: fix double free in case of probe failure
+  * cio: dont panic in non-fatal conditions
+  * netiucv: displayed TX bytes value much too high
+  * ipc ns: fix memory leak (idr)
+  * ALSA: hda - Fix HP T5735 automute
+  * hwmon: (fschmd) Fix a memleak on multiple opens of /dev/watchdog
+  * UBI: fix memory leak in update path
+  * UBI: initialise update marker
+  * ASoC: fix a memory-leak in wm8903
+  * mac80211: check that ieee80211_set_power_mgmt only handles STA
+    interfaces.
+  * cfg80211: fix channel setting for wext
+  * KVM: S390: fix potential array overrun in intercept handling
+  * KVM: only allow one gsi per fd
+  * KVM: Fix race between APIC TMR and IRR
+  * KVM: MMU: bail out pagewalk on kvm_read_guest error
+  * KVM: x86: Fix host_mapping_level()
+  * KVM: x86: Fix probable memory leak of vcpu->arch.mce_banks
+  * KVM: x86: Fix leak of free lapic date in kvm_arch_vcpu_init()
+  * KVM: fix lock imbalance in kvm_*_irq_source_id()
+  * KVM: only clear irq_source_id if irqchip is present
+  * IPoIB: Clear ipoib_neigh.dgid in ipoib_neigh_alloc()
+  * x86: Reenable TSC sync check at boot, even with NONSTOP_TSC
+  * ACPI: enable C2 and Turbo-mode on Nehalem notebooks on A/C
+    - LP: #516325
+  * iwlwifi: Fix throughput stall issue in HT mode for 5000
+  * fnctl: f_modown should call write_lock_irqsave/restore
+  * x86, msr/cpuid: Pass the number of minors when unregistering MSR and
+    CPUID drivers.
+  * Linux 2.6.32.7
+  * scsi_lib: Fix bug in completion of bidi commands
+  * mptsas: Fix issue with chain pools allocation on katmai
+  * mm: add new 'read_cache_page_gfp()' helper function
+  * drm/i915: Selectively enable self-reclaim
+  * firewire: ohci: fix crashes with TSB43AB23 on 64bit systems
+  * S390: fix single stepped svcs with TRACE_IRQFLAGS=y
+  * x86: Set hotpluggable nodes in nodes_possible_map
+  * x86: Remove "x86 CPU features in debugfs" (CONFIG_X86_CPU_DEBUG)
+  * libata: retry FS IOs even if it has failed with AC_ERR_INVALID
+  * zcrypt: Do not remove coprocessor for error 8/72
+  * dasd: fix possible NULL pointer errors
+  * ACPI: Add a generic API for _OSC -v2
+  * ACPI: Add platform-wide _OSC support.
+  * ACPI: fix OSC regression that caused aer and pciehp not to load
+  * ACPI: Advertise to BIOS in _OSC: _OST on _PPC changes
+  * UBI: fix volume creation input checking
+  * e1000/e1000e: don't use small hardware rx buffers
+  * drm/i915: Reload hangcheck timer too for Ironlake
+  * Fix a leak in affs_fill_super()
+  * Fix failure exits in bfs_fill_super()
+  * fix oops in fs/9p late mount failure
+  * fix leak in romfs_fill_super()
+  * Fix remount races with symlink handling in affs
+  * fix affs parse_options()
+  * Fix failure exit in ipathfs
+  * mm: fix migratetype bug which slowed swapping
+  * FDPIC: Respect PT_GNU_STACK exec protection markings when creating
+    NOMMU stack
+  * Split 'flush_old_exec' into two functions
+  * sparc: TIF_ABI_PENDING bit removal
+  * x86: get rid of the insane TIF_ABI_PENDING bit
+  * Input: winbond-cir - remove dmesg spam
+  * x86: Disable HPET MSI on ATI SB700/SB800
+  * iwlwifi: set default aggregation frame count limit to 31
+  * drm/i915: only enable hotplug for detected outputs
+  * firewire: core: add_descriptor size check
+  * SECURITY: selinux, fix update_rlimit_cpu parameter
+  * regulator: Specify REGULATOR_CHANGE_STATUS for WM835x LED constraints
+  * x86: Add Dell OptiPlex 760 reboot quirk
+    - LP: #488319
+  * x86: Add quirk for Intel DG45FC board to avoid low memory corruption
+  * x86/amd-iommu: Fix possible integer overflow
+  * clocksource: fix compilation if no GENERIC_TIME
+  * tcp: update the netstamp_needed counter when cloning sockets
+  * sky2: Fix oops in sky2_xmit_frame() after TX timeout
+  * net: restore ip source validation
+  * af_packet: Don't use skb after dev_queue_xmit()
+  * ax25: netrom: rose: Fix timer oopses
+  * KVM: allow userspace to adjust kvmclock offset
+  * oprofile/x86: add Xeon 7500 series support
+  * oprofile/x86: fix crash when profiling more than 28 events
+  * libata: retry link resume if necessary
+  * mm: percpu-vmap fix RCU list walking
+  * mm: purge fragmented percpu vmap blocks
+  * block: fix bio_add_page for non trivial merge_bvec_fn case
+  * Fix 'flush_old_exec()/setup_new_exec()' split
+  * random: drop weird m_time/a_time manipulation
+  * random: Remove unused inode variable
+  * block: fix bugs in bio-integrity mempool usage
+  * usb: r8a66597-hdc disable interrupts fix
+  * connector: Delete buggy notification code.
+  * be2net: Bug fix to support newer generation of BE ASIC
+  * be2net: Fix memset() arg ordering.
+  * mm: flush dcache before writing into page to avoid alias
+  * mac80211: fix NULL pointer dereference when ftrace is enabled
+  * imxfb: correct location of callbacks in suspend and resume
+  * mx3fb: some debug and initialisation fixes
+  * starfire: clean up properly if firmware loading fails
+  * kernel/cred.c: use kmem_cache_free
+  * uartlite: fix crash when using as console
+  * pktcdvd: removing device does not remove its sysfs dir
+  * ath9k: fix eeprom INI values override for 2GHz-only cards
+  * ath9k: fix beacon slot/buffer leak
+  * powerpc: TIF_ABI_PENDING bit removal
+  * NET: fix oops at bootime in sysctl code
+  * Linux 2.6.32.8
+
+  [ Ubuntu: 2.6.32-12.17 ]
+
+  * restore linux-image prefix -- master
+  * enforce -- we require SELINUX enabled -- master
+  * enforce -- ensure APPARMOR is our default LSM -- master
+  * make doc package completely optional -- master
+  * make source package completely optional -- master
+  * make linux-libc-dev completly optional -- master
+  * convert package disable to a deps list -- master
+  * allow common headers to switch from indep to arch -- master
+  * convert binary package disable to a deps list -- master
+  * add configuration option for a full source build tree -- master
+  * add support for uImage kernels in package control scripts
+  * getabis -- cleanup and parameterise repository list -- master
+  * getabis -- move configuration to etc/getabi -- master
+  * kernelconfig -- move configuration to etc -- master
+  * rules -- make debian/debian.env master for branch name
+  * set the current branch name -- master
+  * pull back common debian.master files into debian -- master
+  * enforcer -- make the enforcement configuration common
+  * insert-changes -- correctly link to debian/rules in DROOT
+  * future-proof ddeb handling against buildd changes
+  * SAUCE: Make CONFIG_{OMNIBOOK, AVERATEC_5100P, PACKARDBELL_E5} depend on
+    X86
+  * Add modules.builtin.bin to prerm rm list
+    - LP: #516584
+  * [Config] Implement the amd64 preempt flavour
+  * syslog: distinguish between /proc/kmsg and syscalls
+    - LP: #515623
+  * sfc: Fix polling for slow MCDI operations
+  * sfc: Fix conditions for MDIO self-test
+  * sfc: QT202x: Remove unreliable MMD check at initialisation
+  * sfc: Add workspace for GMAC bug workaround to MCDI MAC_STATS buffer
+  * sfc: Use fixed-size buffers for MCDI NVRAM requests
+
+  [ Ubuntu: 2.6.32-12.16 ]
+
+  * Revert "SAUCE: acpi battery -- delay first lookup of the battery until
+    first use"
+  * SAUCE: acpi battery -- move first lookup asynchronous
+    - LP: #507211
+  * [Config] update configs to cleanup generic configs
+  * [Config] disable CONFIG_X86_CPU_DEBUG for amd64
+  * [Config] enable USER_NS
+    - LP: #480739, #509808
+  * (pre-stable) driver-core: fix devtmpfs crash on s390
+    - LP: #512370
+  * [Config] for server and virtual flavours make CONFIG_SCSI_SYM53C8XX_2=y
+    - LP: #494565
+  * [Config] VIRTIO=y for server/virtual flavours
+    - LP: #494565
+  * (pre-stable) Driver-Core: devtmpfs - set root directory mode to 0755
+    - LP: #512370
+  * SAUCE: x86: brk away from exec rand area
+    - LP: #452175
+  * [Upstream] e1000: enhance frame fragment detection
+    - CVE-2009-4536
+  * [Upstream] e1000e: enhance frame fragment detection
+    - CVE-2009-4538
+  * (pre-stable) Input: ALPS - add interleaved protocol support (Dell E6x00
+    series)
+    - LP: #296610
+  * inotify: do not reuse watch descriptors
+    - LP: #485556
+  * inotify: only warn once for inotify problems
+  * revert "drivers/video/s3c-fb.c: fix clock setting for Samsung SoC
+    Framebuffer"
+  * memcg: ensure list is empty at rmdir
+  * drm/i915: remove loop in Ironlake interrupt handler
+  * block: Fix incorrect reporting of partition alignment
+  * x86, mce: Thermal monitoring depends on APIC being enabled
+  * futexes: Remove rw parameter from get_futex_key()
+  * page allocator: update NR_FREE_PAGES only when necessary
+  * x86, apic: use physical mode for IBM summit platforms
+  * edac: i5000_edac critical fix panic out of bounds
+  * x86: SGI UV: Fix mapping of MMIO registers
+  * mfd: WM835x GPIO direction register is not locked
+  * mfd: Correct WM835x ISINK ramp time defines
+  * ALSA: hda - Fix missing capture mixer for ALC861/660 codecs
+  * V4L/DVB (13868): gspca - sn9c20x: Fix test of unsigned.
+  * reiserfs: truncate blocks not used by a write
+  * HID: add device IDs for new model of Apple Wireless Keyboard
+  * PCI/cardbus: Add a fixup hook and fix powerpc
+  * Input: pmouse - move Sentelic probe down the list
+  * asus-laptop: add Lenovo SL hotkey support
+  * sched: Fix cpu_clock() in NMIs, on !CONFIG_HAVE_UNSTABLE_SCHED_CLOCK
+  * sparc64: Fix NMI programming when perf events are active.
+  * sparc64: Fix Niagara2 perf event handling.
+  * i2c: Do not use device name after device_unregister
+  * i2c/pca: Don't use *_interruptible
+  * serial/8250_pnp: add a new Fujitsu Wacom Tablet PC device
+  * sched: Fix task priority bug
+  * vfs: Fix vmtruncate() regression
+  * Linux 2.6.32.5
+  * x86, msr/cpuid: Register enough minors for the MSR and CPUID drivers
+  * V4L/DVB (13900): gspca - sunplus: Fix bridge exchanges.
+  * Staging: asus_oled: fix oops in 2.6.32.2
+  * Staging: hv: fix smp problems in the hyperv core code
+  * tty: fix race in tty_fasync
+  * ecryptfs: use after free
+  * ecryptfs: initialize private persistent file before dereferencing
+    pointer
+  * nozomi: quick fix for the close/close bug
+  * serial: 8250_pnp: use wildcard for serial Wacom tablets
+  * usb: serial: fix memory leak in generic driver
+  * USB: fix bitmask merge error
+  * USB: Don't use GFP_KERNEL while we cannot reset a storage device
+  * USB: EHCI: fix handling of unusual interrupt intervals
+  * USB: EHCI & UHCI: fix race between root-hub suspend and port resume
+  * USB: add missing delay during remote wakeup
+  * USB: add speed values for USB 3.0 and wireless controllers
+  * ACPI: EC: Accelerate query execution
+  * ACPI: EC: Add wait for irq storm
+  * SCSI: enclosure: fix oops while iterating enclosure_status array
+  * drm/i915: Read the response after issuing DDC bus switch command
+  * drm/i915: try another possible DDC bus for the SDVO device with
+    multiple outputs
+  * block: bdev_stack_limits wrapper
+  * DM: Fix device mapper topology stacking
+  * x86/PCI/PAT: return EINVAL for pci mmap WC request for !pat_enabled
+  * USB: fix usbstorage for 2770:915d delivers no FAT
+  * vmalloc: remove BUG_ON due to racy counting of VM_LAZY_FREE
+  * perf timechart: Use tid not pid for COMM change
+  * perf events: Dont report side-band events on each cpu for
+    per-task-per-cpu events
+  * perf: Honour event state for aux stream data
+  * Linux 2.6.32.6
+
+ -- Andy Whitcroft <apw@canonical.com>  Thu, 11 Feb 2010 13:24:09 +0000
+
+linux-mvl-dove (2.6.32-200.7) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * [Config] fix SECURITY and LSM configuration -- mvl-dove
+  * (buildenv) Add a distclean target to remove temporary files -- mvl-dove
+  * update remaining references from karmic to lucid -- mvl-dove
+  * undo slamming architecture to armel -- mvl-dove
+  * restore linux-image prefix -- mvl-dove
+  * include modules.builtin in the binary debs -- mvl-dove
+  * resync kernelconfig with lucid -- mvl-dove
+  * config-check -- add a configuration enforcer -- mvl-dove
+  * config-check -- add a unit-test suite to the checker -- mvl-dove
+  * config-check -- ensure the checks get run at build time -- mvl-dove
+  * config-check -- check the processed config during updateconfigs --
+    mvl-dove
+  * enforcer -- resync configuration with master -- mvl-dove
+  * clean up whitespace differences -- mvl-dove
+  * copy over minor modification -- mvl-dove
+  * make doc package completely optional -- mvl-dove
+  * install the full changelog with the binary package -- mvl-dove
+  * make source package completely optional -- mvl-dove
+  * make linux-libc-dev completly optional -- mvl-dove
+  * convert package disable to a deps list -- mvl-dove
+  * move back to common headers in arch mode -- mvl-dove
+  * convert binary package disable to a deps list -- mvl-dove
+  * disable linux-libc-dev -- mvl-dove
+  * add configuration option for a full source build tree -- mvl-dove
+  * getabis -- cleanup and parameterise repository list -- mvl-dove
+  * kernelconfig -- fix minor whitespace damage -- mvl-dove
+  * getabis -- move configuration to etc/getabis -- mvl-dove
+  * kernelconfig -- move configuration to etc -- mvl-dove
+  * set the current branch name -- mvl-dove
+  * remove common files -- mvl-dove
+  * remove generated files
+  * insert-changes -- correctly link to debian/rules in DROOT
+
+  [ Bryan Wu ]
+
+  * Add 3 missing files to prerm remove file list -- mvl-dove
+    - LP: #345623, #415832
+
+  [ Eric Miao ]
+
+  * [Config]: Enable devtmpfs for mvl-dove kernel
+    - LP: #512321
+  * SAUCE: Enable CPUFREQ by default
+    - LP: #513254
+  * [Config]: Turn on CONFIG_HIBERNATE
+    - LP: #502983
+  * [Config]: Turn on CONFIG_ARM_THUMBEE
+  * [Config]: Disable V6 debugger mode and use V7
+
+  [ Tim Gardner ]
+
+  * [Config] DH_COMPAT=5 -- mvl-dove
+
+  [ Upstream Kernel Changes ]
+
+  * ARM VFP supprot code bug: If any of the status flags are set, update
+    the FPSCR
+  * Marvell Dove VFP errata
+
+ -- Andy Whitcroft <apw@canonical.com>  Thu, 04 Feb 2010 20:49:42 +0000
+
+linux-mvl-dove (2.6.32-200.6) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * [Config] drop ecb from crypto udeb for arm
+
+ -- Andy Whitcroft <apw@canonical.com>  Wed, 27 Jan 2010 09:40:42 +0000
+
+linux-mvl-dove (2.6.32-200.5) lucid; urgency=low
+
+  [ Eric Miao ]
+
+  * Integrate new v2.6.32 based BSP from Marvell
+  * SAUCE: kbuild: include only necessary in scripts/Makefile.modbuiltin
+  * Drop Z0 flavor completely
+  * [Config]: Enable ubuntu/ directory
+  * [Config]: Update config files for dove from .31 to .32
+  * [Config]: Enable some of the debug options
+
+  [ Upstream changes ]
+
+  * Integrate new v2.6.32 based BSP from Marvell; this is a fully native
+    v2.6.32 based version.
+
+ -- Andy Whitcroft <apw@canonical.com>  Tue, 26 Jan 2010 14:06:49 +0000
+
+linux-mvl-dove (2.6.31-701.4) lucid; urgency=low
+
+  [ Raymond Huang ]
+
+  * SAUCE: dove: erratum of VLDR instruction bug in Thumb-2 mode
+    - LP: #494831
+
+ -- Andy Whitcroft <apw@canonical.com>  Thu, 17 Dec 2009 08:56:58 +0000
+
+linux-mvl-dove (2.6.31-701.3) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * rebase to Ubuntu-2.6.31-17.54
+
+  [ Upstream Kernel Changes ]
+
+  * ARM: Fix signal restart issues with NX and OABI compat
+    - LP: #453682
+
+  [ Ubuntu: 2.6.31-17.54 ]
+
+  * security merge of Ubuntu-2.6.31-16.53
+
+  [ Ubuntu: 2.6.31-16.53 ]
+
+  * ext4: Fix insufficient checks in EXT4_IOC_MOVE_EXT
+    - LP: #492659
+    - CVE-2009-4131
+
+ -- Andy Whitcroft <apw@canonical.com>  Wed, 16 Dec 2009 10:14:58 +0000
+
+linux-mvl-dove (2.6.31-701.2) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * rebase to Ubuntu-2.6.31-17.53
+
+  [ Ubuntu: 2.6.31-17.53 ]
+
+  * SAUCE: AppArmor: Fix oops after profile removal
+    - LP: #475619
+  * SAUCE: AppArmor: Fix Oops when in apparmor_bprm_set_creds
+    - LP: #437258
+  * SAUCE: AppArmor: Fix cap audit_caching preemption disabling
+    - LP: #479102
+  * SAUCE: AppArmor: Fix refcounting bug causing leak of creds
+    - LP: #479115
+  * SAUCE: AppArmor: Fix oops there is no tracer and doing unsafe
+    transition.
+    - LP: #480112
+  * Revert "[Upstream] (drop after 2.6.31) usb-storage: Workaround devices
+    with bogus sense size"
+    - LP: #461556
+  * Revert "[Upstream] (drop after 2.6.31) Input: synaptics - add another
+    Protege M300 to rate blacklist"
+    - LP: #480144
+  * [Config] udeb: Add squashfs to fs-core-modules
+    - LP: #352615
+  * Revert "e1000e: swap max hw supported frame size between 82574 and
+    82583"
+    - LP: #461556
+  * Revert "drm/i915: Fix FDI M/N setting according with correct color
+    depth"
+    - LP: #480144
+  * Revert "agp/intel: Add B43 chipset support"
+    - LP: #480144
+  * Revert "drm/i915: add B43 chipset support"
+    - LP: #480144
+  * Revert "ACPI: Attach the ACPI device to the ACPI handle as early as
+    possible"
+    - LP: #327499, #480144
+  * SCSI: Retry ADD_TO_MLQUEUE return value for EH commands
+    - LP: #461556
+  * SCSI: Fix protection scsi_data_buffer leak
+    - LP: #461556
+  * SCSI: sg: Free data buffers after calling blk_rq_unmap_user
+    - LP: #461556
+  * ARM: pxa: workaround errata #37 by not using half turbo switching
+    - LP: #461556
+  * tracing/filters: Fix memory leak when setting a filter
+    - LP: #461556
+  * x86/paravirt: Use normal calling sequences for irq enable/disable
+    - LP: #461556
+  * USB: ftdi_sio: remove tty->low_latency
+    - LP: #461556
+  * USB: ftdi_sio: remove unused rx_byte counter
+    - LP: #461556
+  * USB: ftdi_sio: clean up read completion handler
+    - LP: #461556
+  * USB: ftdi_sio: re-implement read processing
+    - LP: #461556
+  * USB: pl2303: fix error characters not being reported to ldisc
+    - LP: #461556
+  * USB: digi_acceleport: Fix broken unthrottle.
+    - LP: #461556
+  * USB: serial: don't call release without attach
+    - LP: #461556
+  * USB: option: Toshiba G450 device id
+    - LP: #461556
+  * USB: ipaq: fix oops when device is plugged in
+    - LP: #461556
+  * USB: cp210x: Add support for the DW700 UART
+    - LP: #461556
+  * USB: Fix throttling in generic usbserial driver
+    - LP: #461556
+  * USB: storage: When a device returns no sense data, call it a Hardware
+    Error
+    - LP: #400652, #461556
+  * arm, cris, mips, sparc, powerpc, um, xtensa: fix build with bash 4.0
+    - LP: #461556
+  * intel-iommu: Cope with broken HP DC7900 BIOS
+    - LP: #461556
+  * futex: Detect mismatched requeue targets
+    - LP: #461556
+  * futex: Fix wakeup race by setting TASK_INTERRUPTIBLE before queue_me()
+    - LP: #461556
+  * tpm-fixup-pcrs-sysfs-file-update
+    - LP: #461556
+  * TPM: fix pcrread
+    - LP: #461556
+  * Bluetooth: Disconnect HIDRAW devices on disconnect
+    - LP: #461556
+  * Bluetooth: Add extra device reference counting for connections
+    - LP: #461556
+  * Bluetooth: Let HIDP grab the device reference for connections
+    - LP: #461556
+  * connector: Keep the skb in cn_callback_data
+    - LP: #461556
+  * connector: Provide the sender's credentials to the callback
+    - LP: #461556
+  * connector: Removed the destruct_data callback since it is always
+    kfree_skb()
+    - LP: #461556
+  * dm/connector: Only process connector packages from privileged processes
+    - LP: #461556
+  * dst/connector: Disallow unpliviged users to configure dst
+    - LP: #461556
+  * pohmelfs/connector: Disallow unpliviged users to configure pohmelfs
+    - LP: #461556
+  * uvesafb/connector: Disallow unpliviged users to send netlink packets
+    - LP: #461556
+  * e1000e: swap max hw supported frame size between 82574 and 82583
+    - LP: #461556, #445572
+  * MAINTAINERS: Fix Riku Voipio's address
+    - LP: #461556
+  * macintosh: Don't assume i2c device probing always succeeds
+    - LP: #461556
+  * i2c: Hide probe errors caused by ACPI resource conflicts
+    - LP: #461556
+  * ALSA: Don't assume i2c device probing always succeeds
+    - LP: #461556
+  * bsdacct: switch credentials for writing to the accounting file
+    - LP: #461556
+  * sysfs: Allow sysfs_notify_dirent to be called from interrupt context.
+    - LP: #461556
+  * Staging: rt2860sta: prevent a panic when disabling when associated
+    - LP: #461556, #404626
+  * usb-storage: Workaround devices with bogus sense size
+    - LP: #461556, #446146
+  * iwlwifi: incorrect method used for finding valid OTP blocks
+    - LP: #461556
+  * mac80211: fix vlan and optimise RX
+    - LP: #461556
+  * tty: Make flush_to_ldisc() locking more robust
+    - LP: #461556
+  * Linux 2.6.31.5
+    - LP: #461556
+  * fs: pipe.c null pointer dereference
+    - LP: #480144
+  * pci: increase alignment to make more space for hidden code
+    - LP: #407824, #480144, #474577
+  * libata: fix internal command failure handling
+    - LP: #480144
+  * libata: fix PMP initialization
+    - LP: #480144
+  * sata_nv: make sure link is brough up online when skipping hardreset
+    - LP: #480144
+  * nfs: Fix nfs_parse_mount_options() kfree() leak
+    - LP: #480144
+  * KVM: use proper hrtimer function to retrieve expiration time
+    - LP: #480144
+  * KVM: ignore reads from AMDs C1E enabled MSR
+    - LP: #480144
+  * futex: Handle spurious wake up
+    - LP: #480144
+  * futex: Check for NULL keys in match_futex
+    - LP: #480144
+  * futex: Move drop_futex_key_refs out of spinlock'ed region
+    - LP: #480144
+  * futex: Fix spurious wakeup for requeue_pi really
+    - LP: #480144
+  * ahci: revert "Restore SB600 sata controller 64 bit DMA"
+    - LP: #480144
+  * sparc64: Set IRQF_DISABLED on LDC channel IRQs.
+    - LP: #480144
+  * watchdog: Fix rio watchdog probe function
+    - LP: #480144
+  * Input: synaptics - add another Protege M300 to rate blacklist
+    - LP: #480144
+  * dm snapshot: free exception store on init failure
+    - LP: #480144
+  * dm snapshot: sort by chunk size to fix race
+    - LP: #480144
+  * dm log: userspace fix incorrect luid cast in userspace_ctr
+    - LP: #480144
+  * dm: add missing del_gendisk to alloc_dev error path
+    - LP: #480144
+  * dm: dec_pending needs locking to save error value
+    - LP: #480144
+  * dm exception store: fix failed set_chunk_size error path
+    - LP: #480144
+  * dm snapshot: lock snapshot while supplying status
+    - LP: #480144
+  * dm snapshot: require non zero chunk size by end of ctr
+    - LP: #480144
+  * dm snapshot: use unsigned integer chunk size
+    - LP: #480144
+  * ray_cs: Fix copy_from_user handling
+    - LP: #480144
+  * mbind(): fix leak of never putback pages
+    - LP: #480144
+  * do_mbind(): fix memory leak
+    - LP: #480144
+  * 8250_pci: add IBM Saturn serial card
+    - LP: #480144
+  * dpt_i2o: Fix up copy*user
+    - LP: #480144
+  * dpt_i2o: Fix typo of EINVAL
+    - LP: #480144
+  * hfsplus: refuse to mount volumes larger than 2TB
+    - LP: #480144
+  * Driver core: fix driver_register() return value
+    - LP: #480144
+  * param: fix lots of bugs with writing charp params from sysfs, by
+    leaking mem.
+    - LP: #480144
+  * param: fix NULL comparison on oom
+    - LP: #480144
+  * param: fix setting arrays of bool
+    - LP: #480144
+  * USB: serial: sierra driver send_setup() autopm fix
+    - LP: #480144
+  * USB: option: Patch for Huawei Mobile Broadband E270+ Modem
+    - LP: #480144
+  * USB: option: Support for AIRPLUS MCD650 Datacard
+    - LP: #480144
+  * USB: option: TLAYTECH TUE800 support
+    - LP: #456264, #480144
+  * libertas if_usb: Fix crash on 64-bit machines
+    - LP: #480144
+  * cpuidle: always return with interrupts enabled
+    - LP: #480144
+  * virtio: order used ring after used index read
+    - LP: #480144
+  * CIFS: Fixing to avoid invalid kfree() in cifs_get_tcp_session()
+    - LP: #480144
+  * mac80211: fix for incorrect sequence number on hostapd injected frames
+    - LP: #480144
+  * mac80211: check interface is down before type change
+    - LP: #480144
+  * x86, UV: Fix information in __uv_hub_info structure
+    - LP: #480144
+  * x86, UV: Set DELIVERY_MODE=4 for vector=NMI_VECTOR in uv_hub_send_ipi()
+    - LP: #480144
+  * NOMMU: Don't pass NULL pointers to fput() in do_mmap_pgoff()
+    - LP: #480144
+  * mm: remove incorrect swap_count() from try_to_unuse()
+    - LP: #480144
+  * x86-64: Fix register leak in 32-bit syscall audting
+    - LP: #480144
+  * nilfs2: fix dirty page accounting leak causing hang at write
+    - LP: #480144
+  * drm/i915: Fix FDI M/N setting according with correct color depth
+    - LP: #480144
+  * drm/i915: fix to setup display reference clock control on Ironlake
+    - LP: #480144
+  * drm/i915: fix panel fitting filter coefficient select for Ironlake
+    - LP: #480144
+  * agp/intel: Add B43 chipset support
+    - LP: #480144
+  * drm/i915: add B43 chipset support
+    - LP: #480144
+  * xen/hvc: make sure console output is always emitted, with explicit
+    polling
+    - LP: #480144
+  * xen: mask extended topology info in cpuid
+    - LP: #480144
+  * sgi-gru: decrapfiy options_write() function
+    - LP: #480144
+  * KVM: get_tss_base_addr() should return a gpa_t
+    - LP: #480144
+  * fuse: prevent fuse_put_request on invalid pointer
+    - LP: #480144
+  * fuse: fix kunmap in fuse_ioctl_copy_user
+    - LP: #480144
+  * x86/amd-iommu: Workaround for erratum 63
+    - LP: #480144
+  * fsnotify: do not set group for a mark before it is on the i_list
+    - LP: #480144
+  * mips: fix build of vmlinux.lds
+    - LP: #480144
+  * alpha: fix build after vmlinux.lds.S cleanup
+    - LP: #480144
+  * ACPI / PCI: Fix NULL pointer dereference in acpi_get_pci_dev() (rev. 2)
+    - LP: #480144
+  * KEYS: get_instantiation_keyring() should inc the keyring refcount in
+    all cases
+    - LP: #480144
+  * b43: Fix Bugzilla #14181 and the bug from the previous 'fix'
+    - LP: #476154, #480144
+  * pata_sc1200: Fix crash on boot
+    - LP: #480144
+  * AF_UNIX: Fix deadlock on connecting to shutdown socket (CVE-2009-3621)
+    - LP: #480144
+  * ALSA: ice1724 - Make call to set hw params succeed on ESI Juli@
+    - LP: #480144
+  * bonding: fix a race condition in calls to slave MII ioctls
+    - LP: #480144
+  * hwmon: (it87) Fix VID reading on IT8718F/IT8720F
+    - LP: #480144
+  * netlink: fix typo in initialization (CVE-2009-3612)
+    - LP: #480144
+  * nfs: Avoid overrun when copying client IP address string
+    - LP: #480144
+  * nfs: Panic when commit fails
+    - LP: #480144
+  * NFSv4: Fix a bug when the server returns NFS4ERR_RESOURCE
+    - LP: #480144
+  * NFSv4: Fix two unbalanced put_rpccred() issues.
+    - LP: #459265, #480144
+  * NFSv4: Kill nfs4_renewd_prepare_shutdown()
+    - LP: #480144
+  * NFSv4: The link() operation should return any delegation on the file
+    - LP: #480144
+  * powerpc: Remove SMP warning from PowerMac cpufreq
+    - LP: #480144
+  * vmscan: limit VM_EXEC protection to file pages
+    - LP: #480144
+  * x86: mce: Clean up thermal throttling state tracking code
+    - LP: #480144
+  * x86: mce: Fix thermal throttling message storm
+    - LP: #453444, #480144
+  * iwlwifi: fix potential rx buffer loss
+    - LP: #480144
+  * iwlwifi: reduce noise when skb allocation fails
+    - LP: #480144
+  * x86/amd-iommu: Un__init function required on shutdown
+    - LP: #480144
+  * KVM: Prevent kvm_init from corrupting debugfs structures
+    - LP: #480144
+  * powerpc/pmac: Fix PowerSurge SMP IPI allocation
+    - LP: #480144
+  * powerpc/pmac: Fix issues with sleep on some powerbooks
+    - LP: #480144
+  * powerpc/pci: Fix regression in powerpc MSI-X
+    - LP: #480144
+  * powerpc: Fix some late PowerMac G5 with PCIe ATI graphics
+    - LP: #480144
+  * sata_via: Remove redundant device ID for VIA VT8261
+    - LP: #480144
+  * pata_via: extend the rev_max for VT6330
+    - LP: #480144
+  * PM / yenta: Split resume into early and late parts (rev. 4)
+    - LP: #480144
+  * Linux 2.6.31.6
+    - LP: #480144
+
+  [ Ubuntu: 2.6.31-16.52 ]
+
+  * [SCSI] megaraid_sas: remove sysfs poll_mode_io world writeable
+    permissions
+    - CVE-2009-3939
+  * fs: pipe.c null pointer dereference
+    - CVE-2009-3547
+  * netlink: fix typo in initialization
+    - CVE-2009-3612
+  * drm/r128: Add test for initialisation to all ioctls that require it
+    - CVE-2009-3620
+  * AF_UNIX: Fix deadlock on connecting to shutdown socket
+    - CVE-2009-3621
+  * nfsd4: use common rpc_cred for all callbacks
+    - CVE-2009-3623
+  * KEYS: get_instantiation_keyring() should inc the keyring refcount in
+    all cases
+    - CVE-2009-3624
+  * connector: Keep the skb in cn_callback_data
+    - CVE-2009-3725
+  * connector: Provide the sender's credentials to the callback
+    - CVE-2009-3725
+  * connector: Fix incompatible pointer type warning
+    - CVE-2009-3725
+  * uvesafb/connector: Disallow unpliviged users to send netlink packets
+    - CVE-2009-3725
+  * pohmelfs/connector: Disallow unpliviged users to configure pohmelfs
+    - CVE-2009-3725
+  * dst/connector: Disallow unpliviged users to configure dst
+    - CVE-2009-3725
+  * dm/connector: Only process connector packages from privileged processes
+    - CVE-2009-3725
+  * NOMMU: Don't pass NULL pointers to fput() in do_mmap_pgoff()
+    - CVE-2009-3888
+  * isdn: hfc_usb: Fix read buffer overflow
+    - CVE-2009-4005
+  * gdth: Prevent negative offsets in ioctl CVE-2009-3080
+    - CVE-2009-3080
+  * mac80211: fix spurious delBA handling
+    - LP: #491301
+  * mac80211: fix two remote exploits
+    - LP: #491301
+  * ipv4: additional update of dev_net(dev) to struct *net in ip_fragment.c
+    - LP: #491301
+
+  [ Ubuntu: 2.6.31-15.50 ]
+
+  * SAUCE: Fix nx_enable reporting
+    - LP: #454285
+
+ -- Andy Whitcroft <apw@canonical.com>  Fri, 04 Dec 2009 21:23:15 +0000
+
+linux-mvl-dove (2.6.31-700.1) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * rebase to Ubuntu-2.6.31-15.49
+
+  [ Ubuntu: 2.6.31-15.49 ]
+
+  * [Upstream] (drop after 2.6.31) usb-storage: Workaround devices with
+    bogus sense size
+    - LP: #446146
+  * SAUCE: AppArmor: AppArmor wrongly reports allow perms as denied
+    - LP: #453335
+  * SAUCE: AppArmor: Policy load and replacement can fail to alloc mem
+    - LP: #458299
+  * SAUCE: AppArmor: AppArmor fails to audit change_hat correctly
+    - LP: #462824
+  * SAUCE: AppArmor: AppArmor disallows truncate of deleted files.
+    - LP: #451375
+  * SAUCE: [x86] fix report of cs-limit nx-emulation
+    - LP: #454285
+  * Revert "SAUCE: trace: add trace_event for the open() syscall"
+  * SAUCE: trace: add trace events for open(), exec() and uselib()
+    - LP: #462111
+  * SAUCE: Fix sub-flavour script to not stop on missing directories
+    - LP: #453073
+  * [Upstream] (drop after 2.6.31) Input: synaptics - add another Protege
+    M300 to rate blacklist
+    - LP: #433801
+  * PM: Make warning in suspend_test_finish() less likely to happen
+    - LP: #464552
+
+  [ Ubuntu: 2.6.31-14.48 ]
+
+  * Add more e100 firmware to nic-modules
+    - LP: #451872
+  * Add qla1280 firmware to scsi-modules
+    - LP: #381037
+
+  [ Ubuntu: 2.6.31-14.47 ]
+
+  * SAUCE: dell-laptop: Store the HW switch status internally rather than
+    requerying every time
+    - LP: #430809
+  * SAUCE: dell-laptop: Blacklist machines not supporting dell-laptop
+    - LP: #430809
+
+ -- Andy Whitcroft <apw@canonical.com>  Tue, 03 Nov 2009 11:41:05 +0000
+
+linux-mvl-dove (2.6.31-208.16) karmic; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * drop dove-z0 from the d-i udeb generation
+  * rebase to Ubuntu-2.6.31-14.46
+  * [Config] update configs following rebase to Ubuntu-2.6.31-14.46
+  * lirc update dropped module lirc_mceusb2
+
+  [ Brad Figg ]
+
+  * [Config] Dove: Added CONFIG_BINFMT_AOUT=m and CONFIG_BINFMT_MISC=m
+    - LP: #450363
+
+  [ Ubuntu: 2.6.31-14.46 ]
+
+  * reinstate armel.mk with no flavours
+    - LP: #449637
+  * [Upstream] elevator: fix fastfail checks to allow merge of readahead
+    requests
+    - LP: #444915
+  * [Upstream] block: silently error unsupported empty barriers too
+    - LP: #420423
+  * SAUCE: AppArmor: Fix mediation of "deleted" paths
+    - LP: #415632
+  * [Config] CONFIG_X86_MCE
+    https://lists.ubuntu.com/archives/kernel-team/2009-October/007584.html
+  * Revert "appletalk: Fix skb leak when ipddp interface is not loaded,
+    CVE-2009-2903" - Use patch from 2.6.31.4 which is slightly different.
+  * x86: fix csum_ipv6_magic asm memory clobber
+  * tty: Avoid dropping ldisc_mutex over hangup tty re-initialization
+  * x86: Don't leak 64-bit kernel register values to 32-bit processes
+  * tracing: correct module boundaries for ftrace_release
+  * ftrace: check for failure for all conversions
+  * futex: fix requeue_pi key imbalance
+  * futex: Move exit_pi_state() call to release_mm()
+  * futex: Nullify robust lists after cleanup
+  * futex: Fix locking imbalance
+  * NOHZ: update idle state also when NOHZ is inactive
+  * ima: ecryptfs fix imbalance message
+  * libata: fix incorrect link online check during probe
+  * sound: via82xx: move DXS volume controls to PCM interface
+  * ASoC: WM8350 capture PGA mutes are inverted
+  * KVM: Prevent overflow in KVM_GET_SUPPORTED_CPUID
+  * KVM: VMX: flush TLB with INVEPT on cpu migration
+  * KVM: fix LAPIC timer period overflow
+  * KVM: SVM: Fix tsc offset adjustment when running nested
+  * KVM: SVM: Handle tsc in svm_get_msr/svm_set_msr correctly
+  * net: Fix wrong sizeof
+  * mm: add_to_swap_cache() must not sleep
+  * sis5513: fix PIO setup for ATAPI devices
+  * PIT fixes to unbreak suspend/resume (bug #14222)
+  * IMA: open new file for read
+  * ACPI: Clarify resource conflict message
+  * ACPI: fix Compaq Evo N800c (Pentium 4m) boot hang regression
+  * net: restore tx timestamping for accelerated vlans
+  * net: unix: fix sending fds in multiple buffers
+  * tun: Return -EINVAL if neither IFF_TUN nor IFF_TAP is set.
+  * tcp: fix CONFIG_TCP_MD5SIG + CONFIG_PREEMPT timer BUG()
+  * net: Fix sock_wfree() race
+  * smsc95xx: fix transmission where ZLP is expected
+  * sky2: Set SKY2_HW_RAM_BUFFER in sky2_init
+  * appletalk: Fix skb leak when ipddp interface is not loaded
+  * ax25: Fix possible oops in ax25_make_new
+  * ax25: Fix SIOCAX25GETINFO ioctl
+  * sit: fix off-by-one in ipip6_tunnel_get_prl
+  * Linux 2.6.31.4
+  * drm/i915: Fix FDI M/N setting according with correct color depth
+    - LP: #416792
+
+  [ Ubuntu: 2.6.31-13.45 ]
+
+  * [Config] Add sd_mod to scsi-modules udeb for powerpc
+  * SAUCE: Update to LIRC 0.8.6
+    - LP: #432678
+  * [Config] CONFIG_X86_PAT=y
+    https://lists.ubuntu.com/archives/kernel-team/2009-October/007477.html
+    https://lists.ubuntu.com/archives/kernel-team/2009-October/007534.html
+  * [Config] Add armel arch to linux-libc-dev arches.
+    - LP: #449637
+  * e1000e: swap max hw supported frame size between 82574 and 82583
+  * drm/i915: Initialize HDMI outputs as HDMI connectors, not DVI.
+    - LP: #392017
+  * ALSA: hda - Add quirks for some HP laptops
+    - LP: #449742
+  * ALSA: hda - Add support for HP dv6
+    - LP: #449742
+
+  [ Ubuntu: 2.6.31-13.44 ]
+
+  * sgi-gru: Fix kernel stack buffer overrun, CVE-2009-2584
+  * appletalk: Fix skb leak when ipddp interface is not loaded,
+    CVE-2009-2903
+    Note - This patch causes an ABI change in the symbol aarp_send_ddp
+    which I'm ignoring.
+
+ -- Andy Whitcroft <apw@canonical.com>  Tue, 13 Oct 2009 15:52:13 +0100
+
+linux-mvl-dove (2.6.31-207.15) karmic; urgency=low
+
+  [ Amit Kucheria ]
+
+  * Disable CONFIG_UEVENT_HELPER_PATH
+
+  [ Andy Whitcroft ]
+
+  * rebase to Ubuntu-2.6.31-13.42
+  * rebase to Ubuntu-2.6.31-13.43
+
+  [ Colin Watson ]
+
+  * Use section 'admin' rather than 'base'
+
+  [ Tim Gardner ]
+
+  * [Config] CONFIG_GFS2_FS_LOCKING_DLM=y
+    - LP: #416325
+
+  [ Ubuntu: 2.6.31-13.43 ]
+
+  * Revert "[Upstream] acerhdf: Limit modalias matching to supported
+    boards"
+  * Use section 'admin' rather than 'base'
+  * SAUCE: AppArmor: Set error code after structure initialization.
+    - LP: #427948
+  * SAUCE: AppArmor: Fix off by 2 error in getprocattr mem allocation
+    - LP: #446595
+  * SAUCE: Add sr_mod to the scsi-modules udeb for powerpc
+  * [Upstream] acerhdf: Limit modalias matching to supported boards
+    (supersedes previous revert made by Andy Whitcroft)
+    - LP: #435958
+
+  [ Ubuntu: 2.6.31-13.42 ]
+
+  * SAUCE: (drop after 2.6.31) input: Add support for filtering input
+    events
+    - LP: #430809
+  * SAUCE: (drop after 2.6.31) dell-laptop: Trigger rfkill updates on wifi
+    toggle switch press
+    - LP: #430809
+  * SAUCE: Raise the default console 'quiet' level to 2
+    This supresses all but critical and emergency level messages.
+    https://lists.ubuntu.com/archives/kernel-team/2009-October/007476.html
+  * TTY: fix typos
+  * Linux 2.6.31.3
+  * V4L/DVB (12439): cx88: add support for WinFast DTV2000H rev. J
+    - LP: #433904
+
+  [ Ubuntu: 2.6.31-12.41 ]
+
+  * [Config] CONFIG_GFS2_FS_LOCKING_DLM=y
+    - LP: #416325
+  * SAUCE: Fix MODULE_IMPORT/MODULE_EXPORT
+    The original patch failed to work for amd64.
+    - LP: #430694
+  * ALSA: hda - Add a white-list for MSI option
+    Upstream cherry-pick: Infrastructure support for #445580
+  * ALSA: hda - Add HP Pavilion dv4t-1300 to MSI whitelist
+    - LP: #445580
+  * ALSA: intel8x0 - Mute External Amplifier by default for Sony VAIO
+    VGN-T350P
+    - LP: #410933
+  * ALSA: intel8x0 - Mute External Amplifier by default for Sony VAIO
+    VGN-B1VP
+    - LP: #410933
+
+  [ Ubuntu: 2.6.31-12.40 ]
+
+  * SAUCE: Created MODULE_EXPORT/MODULE_IMPORT macros
+    - LP: #430694
+  * SAUCE: Use MODULE_IMPORT macro to tie intel_agp to i915
+    - LP: #430694
+  * V4L/DVB (12352): gspca - vc032x: Fix mi1310_soc preview and LED
+    - LP: #310760
+
+ -- Andy Whitcroft <apw@canonical.com>  Fri, 09 Oct 2009 14:41:22 +0100
+
+linux-mvl-dove (2.6.31-206.14) karmic; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * SAUCE: ubuntu-insert-changes -- follow abstracted debian
+  * rebase to Ubuntu-2.6.31-12.39
+
+  [ Tim Gardner ]
+
+  * [Config] Added cpio as a build dependency.
+
+  [ Ubuntu: 2.6.31-12.39 ]
+
+  * install the full changelog with the binary package
+  * changelog -- explicitly note rebases and clean history
+  * Revert "SAUCE: (drop after 2.6.31) Disable iwl-1000 series wireless
+    adapters"
+  * Revert "SAUCE: (drop after 2.6.31) eCryptfs: Prevent lower dentry from
+    going negative during unlink"
+  * Revert "SAUCE: (drop after 2.6.31) em28xx: ir-kbd-i2c init data needs a
+    persistent object"
+  * Revert "SAUCE: (drop after 2.6.31) saa7134: ir-kbd-i2c init data needs
+    a persistent object"
+  * Revert "drm/i915: Check that the relocation points to within the
+    target"
+  * Revert "drm/i915: fix tiling on IGDNG"
+  * Revert "Driver core: add new device to bus's list before probing"
+  * Revert "HID: completely remove apple mightymouse from blacklist"
+  * Revert "KVM: x86: check for cr3 validity in ioctl_set_sregs"
+    All reverts superseded by corresponding v2.6.31.2 patches
+  * [Config] Add d101m_ucode.bin to d-i/firmware/nic-modules
+    - LP: #439456
+  * [Config] Enabled CONFIG_SND_HDA_HWDEP
+    - LP: #443117
+  * [Config] Add cpio as a build dependency.
+  * [Config] Set default I/O scheduler back to CFQ for desktop flavours
+    - LP: #381300
+  * KVM: VMX: Fix EPT with WP bit change during paging
+  * pata_amd: do not filter out valid modes in nv_mode_filter
+  * p54usb: add Zcomax XG-705A usbid
+  * x86: Increase MIN_GAP to include randomized stack
+  * serial: bfin_5xx: fix building as module when early printk is enabled
+  * USB: option.c Add support for ZTE AC2726 EVDO modem
+  * USB: option: TELIT UC864G support
+  * video: s3c_fb.c: fix build with CONFIG_HOTPLUG=n
+  * kbuild: fix cc1 options check to ensure we do not use -fPIC when
+    compiling
+  * drivers/mfd/ab3100-core.c: fix powerpc build error
+  * thinkpad-acpi: don't ask about brightness_mode for fw. 1V and 1R
+  * ACPI: pci_slot.ko wants a 64-bit _SUN
+  * fbcon: only unbind from console if successfully registered
+  * kallsyms: fix segfault in prefix_underscores_count()
+  * sisfb: change SiS_DDC_Port type to SISIOADDRESS
+  * mmc_spi: fail gracefully if host or card do not support the switch
+    command
+  * alpha: AGP update (fixes compile failure)
+  * fs: make sure data stored into inode is properly seen before unlocking
+    new inode
+  * eCryptfs: Handle unrecognized tag 3 cipher codes
+  * eCryptfs: Check for O_RDONLY lower inodes when opening lower files
+  * eCryptfs: Filename encryption only supports password auth tokens
+  * eCryptfs: Validate global auth tok keys
+  * eCryptfs: Prevent lower dentry from going negative during unlink
+  * Re-enable Lanman security
+  * xen: make -fstack-protector work under Xen
+  * xen: only enable interrupts while actually blocking for spinlock
+  * xen: use stronger barrier after unlocking lock
+  * xen: check EFER for NX before setting up GDT mapping
+  * perf_counter: Fix perf_copy_attr() pointer arithmetic
+  * perf tools: Fix buffer allocation
+  * tty: serial/pcmcia: add ID for Advantech card
+  * PM / PCMCIA: Drop second argument of pcmcia_socket_dev_suspend()
+  * PM / yenta: Fix cardbus suspend/resume regression
+  * sony-laptop: check for rfkill hard block at load time
+  * nilfs2: fix missing zero-fill initialization of btree node cache
+  * ar9170usb: add usbid for TP-Link TL-WN821N v2
+  * mtd: nand: fix ECC Correction bug for SMC ordering for NDFC driver
+  * mtd: ofpart: Check availability of reg property instead of name
+    property
+  * mtd: cfi_cmdset_0002: add 0xFF intolerance for M29W128G
+  * USB: serial: ftdi_sio: new hardware support - hameg power supply
+  * USB: add PIDs for FTDI based OpenDCC hardware
+  * USB: serial: ftdi: handle gnICE+ JTAG adaptors
+  * USB: CDC WDM driver doesn't support non-blocking reads
+  * USB: fix cdc-acm regression in open
+  * cdc_acm: Fix to use modern speed interfaces
+  * tty: remove dtr/rts use from the driver open methods
+  * tty: gigaset: really fix chars_in_buffer
+  * kaweth: Fix memory leak in kaweth_control()
+  * x86: SGI UV: Fix IPI macros
+  * USB: serial: pl2303: new hardware support - sanwa multimeter
+  * USB: storage: fix a resume path GFP_NOIO must be used
+  * USB: usb-storage fails to attach to Huawei Datacard cdrom device
+  * USB: usbtmc: sanity checks for DEV_DEP_MSG_IN urbs
+  * USB: sl811-hcd: Fix device disconnect:
+  * drm/i915: remove restore in resume
+  * drm/i915: Only destroy a constructed mmap offset
+  * drm/i915: prevent FIFO calculation overflows on 32 bits with high
+    dotclocks
+  * drm/i915: Add buffer to inactive list immediately during fault
+  * drm/i915: Check that the relocation points to within the target
+  * drm/i915: Fix typo for wrong LVDS clock setting on IGDNG
+  * drm/i915: Fix SSC frequence for IGDNG
+  * drm/i915: Remove DAC disable in CRT force detect on IGDNG
+  * drm/i915: Fix LVDS panel fitting on Arrandale
+  * drm/I915: Use the CRT DDC to get the EDID for DVI-connector on Mac
+  * drm/i915: fix tiling on IGDNG
+  * agp/intel: Fix the pre-9xx chipset flush.
+  * nfsd4: fix null dereference creating nfsv4 callback client
+  * can: fix NOHZ local_softirq_pending 08 warning
+  * ahci: restore pci_intx() handling
+  * pxa/sharpsl_pm: zaurus c3000 aka spitz: fix resume
+  * net ax25: Fix signed comparison in the sockopt handler
+  * net: Make the copy length in af_packet sockopt handler unsigned
+  * pty_write: don't do a tty_wakeup() when the buffers are full
+  * KVM: fix cpuid E2BIG handling for extended request types
+  * KVM: MMU: fix missing locking in alloc_mmu_pages
+  * KVM: MMU: fix bogus alloc_mmu_pages assignment
+  * KVM: Protect update_cr8_intercept() when running without an apic
+  * Fix NULL ptr regression in powernow-k8
+  * perf tools: do not complain if root is owning perf.data
+  * netfilter: nf_nat: fix inverted logic for persistent NAT mappings
+  * netfilter: nf_conntrack: netns fix re reliable conntrack event delivery
+  * netfilter: bridge: refcount fix
+  * netfilter: ebt_ulog: fix checkentry return value
+  * ath5k: Wakeup fixes
+  * ath5k: do not release irq across suspend/resume
+  * Driver core: add new device to bus's list before probing
+  * tty: Add a full port_close function
+  * tty: USB hangup is racy
+  * tty: USB can now use the shutdown method for kref based freeing of
+    ports
+  * hwmon: (asus_atk0110) Add maintainer information
+  * tty: USB serial termios bits
+  * usb-serial: change referencing of port and serial structures
+  * usb-serial: put subroutines in logical order
+  * usb-serial: change logic of serial lookups
+  * usb-serial: acquire references when a new tty is installed
+  * usb-serial: fix termios initialization logic
+  * usb-serial: rename subroutines
+  * usb-serial: add missing tests and debug lines
+  * usb-serial: straighten out serial_open
+  * USB serial: update the console driver
+  * USB: xhci: Work around for chain bit in link TRBs.
+  * USB: xhci: Fix slot and endpoint context debugging.
+  * USB: xhci: Configure endpoint code refactoring.
+  * USB: xhci: Set correct max packet size for HS/FS control endpoints.
+  * USB: xhci: Support full speed devices.
+  * USB: xhci: Handle stalled control endpoints.
+  * USB: xhci: Add quirk for Fresco Logic xHCI hardware.
+  * USB: xhci: Make TRB completion code comparison readable.
+  * USB: xhci: Handle babbling endpoints correctly.
+  * USB: xhci: Don't touch xhci_td after it's freed.
+  * USB: xhci: Check URB's actual transfer buffer size.
+  * USB: xhci: Check URB_SHORT_NOT_OK before setting short packet status.
+  * USB: xhci: Set -EREMOTEIO when xHC gives bad transfer length.
+  * USB: xhci: Support interrupt transfers.
+  * USB: Fix SS endpoint companion descriptor parsing.
+  * /proc/kcore: work around a BUG()
+  * hugetlb: restore interleaving of bootmem huge pages (2.6.31)
+  * page-allocator: limit the number of MIGRATE_RESERVE pageblocks per zone
+  * mm: munlock use follow_page
+  * mm: fix anonymous dirtying
+  * mmap: avoid unnecessary anon_vma lock acquisition in vma_adjust()
+  * Fix idle time field in /proc/uptime
+  * drm/i915: Handle ERESTARTSYS during page fault
+  * em28xx: ir-kbd-i2c init data needs a persistent object
+  * saa7134: ir-kbd-i2c init data needs a persistent object
+  * powerpc/8xx: Fix regression introduced by cache coherency rewrite
+  * powerpc: Fix incorrect setting of __HAVE_ARCH_PTE_SPECIAL
+  * HID: completely remove apple mightymouse from blacklist
+  * mptsas : PAE Kernel more than 4 GB kernel panic
+  * NOMMU: Fix MAP_PRIVATE mmap() of objects where the data can be mapped
+    directly
+  * iwlwifi: Handle new firmware file with ucode build number in header
+  * iwlwifi: update 1000 series API version to match firmware
+  * iwlagn: modify digital SVR for 1000
+  * iwlwifi: traverse linklist to find the valid OTP block
+  * iwlwifi: fix unloading driver while scanning
+  * Linux 2.6.31.2
+
+  [ Ubuntu: 2.6.31-11.38 ]
+
+  * [Upstream] acerhdf: Limit modalias matching to supported boards
+    - LP: #435958
+  * [Config] Added sata_via to d-i/modules/sata-modules
+    - LP: #434827
+  * SAUCE: (drop after 2.6.31) Disable iwl-1000 series wireless adapters
+    - LP: #439285
+  * [Upstream] i915: Fix i2c init message
+    - LP: #409361
+  * [Config] Add sym53c8xx.ko to virtual sub-flavour
+    - LP: #439415
+  * sched: Disable NEW_FAIR_SLEEPERS for now
+    - LP: #436342
+  * ACPI video: ignore buggy _BQC
+  * ACPI video: work-around BIOS AML bug in _BQC
+    - LP: #428910
+  * ALSA: hda - Added quirk to enable sound on Toshiba NB200
+    - LP: #438318
+
+ -- Andy Whitcroft <apw@canonical.com>  Tue, 06 Oct 2009 18:41:58 +0100
+
+linux-mvl-dove (2.6.31-205.13) karmic; urgency=low
+
+  [ rebased against Ubuntu-2.6.31-11.37 ]
+
+  [ Tim Gardner ]
+
+  * [Config] Increase kernel log buffer to 256K for amd64 flavours
+    - LP: #424810
+  * [Config] Set HZ=100 for amd64 flavours
+    - LP: #438234
+  * [Upstream] e1000e: Emit notice instead of an error when
+    pci_enable_pcie_error_reporting() fails
+    - LP: #436370
+
+  [ Upstream Kernel Changes ]
+
+  * n_tty: honor opost flag for echoes
+  * n_tty: move echoctl check and clean up logic
+    - LP: #438310
+
+  * Revert "[Upstream] drm/i915: Check that the relocation points to within
+    the target" - Use upstream cherry-pick.
+  * drm/i915: Check that the relocation points to within the target
+    - LP: #429241
+
+  * drm/i915: fix tiling on IGDNG
+  * drm/i915: add B43 chipset support
+  * agp/intel: Add B43 chipset support
+    Intel request from kernel team mailing list.
+
+  * HID: completely remove apple mightymouse from blacklist
+    - LP: #428111
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Tue, 29 Sep 2009 12:02:59 -0600
+
+linux-mvl-dove (2.6.31-205.12) karmic; urgency=low
+
+  [ Brad Figg ]
+
+  * Removed the dove-z0 flavour
+  * [Config] Changes due to new dove changes.
+  * rebase to Ubuntu-2.6.31-11.36
+
+  [ Ubuntu: 2.6.31-11.36 ]
+
+  * SAUCE: (drop after 2.6.31) em28xx: ir-kbd-i2c init data needs a
+    persistent object
+  * SAUCE: (drop after 2.6.31) saa7134: ir-kbd-i2c init data needs a
+    persistent object
+  * [Upstream] ALSA: hda - Add another entry for Nvidia HDMI device
+    - LP: #416482
+  * SAUCE: (drop after 2.6.31) eCryptfs: Prevent lower dentry from going
+    negative during unlink
+  * sg: fix oops in the error path in sg_build_indirect()
+  * mpt2sas : Rescan topology from Interrupt context instead of work thread
+  * mpt2sas: Prevent sending command to FW while Host Reset
+  * mpt2sas: setting SDEV into RUNNING state from Interrupt context
+  * mpt2sas: Raid 10 Volume is showing as Raid 1E in dmesg
+  * SCSI: fix oops during scsi scanning
+  * SCSI: libsrp: fix memory leak in srp_ring_free()
+  * cfg80211: fix looping soft lockup in find_ie()
+  * ath5k: write PCU registers on initial reset
+  * binfmt_elf: fix PT_INTERP bss handling
+  * TPM: Fixup boot probe timeout for tpm_tis driver
+  * md: Fix "strchr" [drivers/md/dm-log-userspace.ko] undefined!
+  * x86/amd-iommu: fix broken check in amd_iommu_flush_all_devices
+  * fix undefined reference to user_shm_unlock
+  * perf_counter: Fix buffer overflow in perf_copy_attr()
+  * perf_counter: Start counting time enabled when group leader gets
+    enabled
+  * powerpc/perf_counters: Reduce stack usage of power_check_constraints
+  * powerpc: Fix bug where perf_counters breaks oprofile
+  * powerpc/ps3: Workaround for flash memory I/O error
+  * block: don't assume device has a request list backing in nr_requests
+    store
+  * agp/intel: remove restore in resume
+  * ALSA: cs46xx - Fix minimum period size
+  * ASoC: Fix WM835x Out4 capture enumeration
+  * sound: oxygen: work around MCE when changing volume
+  * mlx4_core: Allocate and map sufficient ICM memory for EQ context
+  * perf stat: Change noise calculation to use stddev
+  * x86: Fix x86_model test in es7000_apic_is_cluster()
+  * x86/i386: Make sure stack-protector segment base is cache aligned
+  * PCI: apply nv_msi_ht_cap_quirk on resume too
+  * x86, pat: Fix cacheflush address in change_page_attr_set_clr()
+  * ARM: 5691/1: fix cache aliasing issues between kmap() and kmap_atomic()
+    with highmem
+  * KVM guest: do not batch pte updates from interrupt context
+  * KVM: Fix coalesced interrupt reporting in IOAPIC
+  * KVM: VMX: Check cpl before emulating debug register access
+  * KVM guest: fix bogus wallclock physical address calculation
+  * KVM: x86: Disallow hypercalls for guest callers in rings > 0
+  * KVM: VMX: Fix cr8 exiting control clobbering by EPT
+  * KVM: x86 emulator: Implement zero-extended immediate decoding
+  * KVM: MMU: make __kvm_mmu_free_some_pages handle empty list
+  * KVM: x86 emulator: fix jmp far decoding (opcode 0xea)
+  * KVM: limit lapic periodic timer frequency
+  * libata: fix off-by-one error in ata_tf_read_block()
+  * PCI quirk: update 82576 device ids in SR-IOV quirks list
+  * PCI: Unhide the SMBus on the Compaq Evo D510 USDT
+  * powerpc/pseries: Fix to handle slb resize across migration
+  * Linux 2.6.31.1
+
+  [ Ubuntu: 2.6.31-10.35 ]
+
+  * Disable CONFIG_UEVENT_HELPER_PATH
+  * [Config] Enable CONFIG_USB_GADGET_DUMMY_HCD
+  * remove the tlsup driver
+  * remove lmpcm logitech driver support
+  * Add 3 missing files to prerm remove file list
+    - LP: #345623, #415832
+  * [Upstream] drm/i915: Check that the relocation points to within the
+    target
+    - LP: #429241
+  * [Config] Set CONFIG_EXT4_FS=y on ports architectures
+  * SAUCE: Added quirk to recognize GE0301 3G modem as an interface.
+    - LP: #348861
+  * Revert "[Upstream] ACPI: Add Thinkpad W500, W700, & W700ds to OSI(Linux) white-list"
+  * Revert "[Upstream] ACPI: Add Thinkpad R400 & Thinkpad R500 to OSI(Linux) white-list"
+  * Revert "[Upstream] ACPI: Add Thinkpad X300 & Thinkpad X301 to OSI(Linux) white-list"
+  * Revert "[Upstream] ACPI: Add Thinkpad X200, X200s, X200t to OSI(Linux) white-list"
+  * Revert "[Upstream] ACPI: Add Thinkpad T400 & Thinkpad T500 to OSI(Linux) white-list"
+    Upstream suggests that this is not the right approach.
+  * [Config] Set default I/O scheduler to DEADLINE
+    CFQ seems to have some load related problems which are often exacerbated by sreadahead.
+    - LP: #381300
+  * SAUCE: ipw2200: Enable LED by default
+    - LP: #21367
+  * ALSA: hda - Add support for new AMD HD audio devices
+    - LP: #430564
+
+  [ Ubuntu: 2.6.31-10.34 ]
+
+  * [Upstream] ext3: Don't update superblock write time when filesystem is
+    read-only
+    - LP: #427822
+
+  [ Ubuntu: 2.6.31-10.33 ]
+
+  * [Upstream] dvb-usb: fix tuning with Cinergy T2
+    - LP: #421258
+  * [Config] Unconditionally copy files from sub-flavours lists.
+    (really, really fix it this time)
+    - LP: #423426
+  * [Config] Set CONFIG_CACHEFILES=m for all flavours
+  * ext4: Don't update superblock write time when filesystem is read-only
+    - LP: #427822
+
+ -- Andy Whitcroft <apw@canonical.com>  Fri, 25 Sep 2009 10:32:08 -0700
+
+linux-mvl-dove (2.6.31-204.11) karmic; urgency=low
+
+  [ Brad Figg ]
+
+  * [Config] Adding modules for d-i support to help with netboot and
+    alternate images support
+    - LP: #431945
+
+  [ Tim Gardner ]
+
+  * [Config] De-macro SRCPKGNAME-headers
+  * [Config] More SRCPKGNAME demacro-ization.
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Mon, 14 Sep 2009 11:40:48 -0600
+
+linux-mvl-dove (2.6.31-204.10) karmic; urgency=low
+
+  [ Tim Gardner ]
+
+  * [Config] Don't include ABI or version in vmlinuz name in kernel-image
+    - LP: #359049
+
+  [ Brad Figg ]
+
+  * Rebase against master 878e32db158b972b443c5cd8370b2d52068bcaaf, v2.6.31 final
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Thu, 10 Sep 2009 16:29:38 -0600
+
+linux-mvl-dove (2.6.31-204.9) karmic; urgency=low
+
+  [ Brad Figg ]
+
+  * [Config] Dove Configuration: set lcd external clock to a fixed speed,
+    1000MHz.
+    - LP: #423675
+  * [Config] updateconfigs due to new -rc9 option
+  * [Config] Marvell Dove, lcd sclk value different for Z0 and Y0 boards
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Wed, 09 Sep 2009 11:02:38 -0600
+
+linux-mvl-dove (2.6.31-203.8) karmic; urgency=low
+
+  [ Brad Figg ]
+
+  * [Config] Generate zImages instead of uImages per Mobile request
+  * Rebased against master Ubuntu-2.6.31-9.29 (2.6.31-rc8)
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Tue, 01 Sep 2009 10:02:07 -0600
+
+linux-mvl-dove (2.6.31-203.7) karmic; urgency=low
+
+  [ Brad Figg ]
+
+  * [Config] Dove configuration, fixup DOVEFB_DISPLAY_MODE=y
+  * SAUCE: Correct undefined dove_pm_register which prevented Z0 flavour
+    from building.
+
+  [ Upstream Kernel Changes ]
+
+  * rebased against marvell-dove-2.6.31-rc7
+  * Revert "dove: fix build error when builing modules This patch builds
+    the hal sub-dirs only when builing the kernel"
+  * Revert "fixes to the Makefile system to enable out-of-tree compilation"
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Sun, 30 Aug 2009 17:27:30 -0600
+
+linux-mvl-dove (2.6.31-202.6) karmic; urgency=low
+
+  [ Brad Figg ]
+
+  * [Config] Common network options
+  * [Config] Common filesystem options
+  * [Config] Common library routines
+  * [Config] Common cryptographic API options.
+  * [Config] Common security and kernel hacking options.
+  * [Config] Common device driver options enabled for Marvell dove
+  * [Config] Dove Configuration, AppArmor
+  * [Config] Dove Configuration, Staging
+  * [Config] Dove Configuration, Userspace I/O drivers
+  * [Config] Dove Configuration, Voltage & Regulator, Auxiliary Display
+  * [Config] Dove Configuration, LED and RTC
+  * [Config] Dove Configuration, USB
+  * [Config] Dove Configuration, General setup (initramfs/initrd)
+  * [Config] Dove Configuration, HID, USB networking, Multimedia, Android,
+    Input, etc.
+
+  [ Tim Gardner ]
+
+  * [Config] Dropped KSM
+  * Rebased against 2.6.31-8.28 which brings the Dove branch up to
+    2.6.31-rc7
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Thu, 27 Aug 2009 09:29:45 -0600
+
+linux-mvl-dove (2.6.31-201.5) karmic; urgency=low
+
+  [ Tim Gardner ]
+
+  * [Config] Do not generate a doc package
+  * [Config] Do not produce a source package
+  * [Config] Common headers package is arch (armel) dependent
+  * [Config] Create common headers file for armel only.
+    - LP: #417266
+  * Rebased to master Ubuntu-2.6.31-6.26  which brings the Dove branch up to
+    2.6.31-rc6.
+  * Dropped 'fixes to the Makefile system to enable out-of-tree compilation'
+    from the Dove repo in order to make in-tree builds work.
+  * Enabled the ubuntu directory drivers (aufs, compcache, etc).
+
+  [ Brad Figg ]
+
+  * Add dove-z0 flavour
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Fri, 21 Aug 2009 12:50:08 -0600
+
+linux-mvl-dove (2.6.31-200.4) karmic; urgency=low
+
+  [ Tim Gardner ]
+
+  * [Config] Added rsync to build dependencies
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Fri, 21 Aug 2009 09:11:26 -0600
+
+linux-mvl-dove (2.6.31-200.3) karmic; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * abstracted debian -- kernel-wedge needs to work in debian/
+  * abstracted debian -- ensure we install the copyright file
+  * abstracted-debian -- drop the debian directories from headers
+  * abstracted-debian -- drop the debian directories from headers part 2
+
+  [ Tim Gardner ]
+
+  * SAUCE: Improve error reporting in postinst
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Thu, 20 Aug 2009 11:10:40 -0600
+
+linux-mvl-dove (2.6.31-200.2) karmic; urgency=low
+
+  * Marvell ARM dove marvell-dove-2.6.31-rc5
+  * Abstracted debian build infrastructure.
+  * Bump ABI to 200 to avoid conflictas with other kernel packages.
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Thu, 13 Aug 2009 08:45:29 -0600
+
+linux-mvl-dove (2.6.31-200.1) UNRELEASED; urgency=low
+
+  * Marvell ARM dove marvell-dove-2.6.31-rc4
+
+ -- Brad Figg <brad.figg@canonical.com>  Fri, 07 Aug 2009 07:23:35 -0700
+
+linux-mvl-dove (2.6.31-0.0) UNRELEASED; urgency=low
+
+  * Initial release
+
+ -- Brad Figg <brad.figg@canonical.com>  Fri, 07 Aug 2009 04:56:51 -0700
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/control
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/control
@@ -0,0 +1,75 @@
+Source: linux-mvl-dove
+Section: devel
+Priority: optional
+Maintainer: Ubuntu Kernel Team <kernel-team@lists.ubuntu.com>
+Standards-Version: 3.8.4.0
+Build-Depends: debhelper (>= 5), cpio, module-init-tools, kernel-wedge (>= 2.24ubuntu1), rsync
+Build-Depends-Indep: xmlto, docbook-utils, ghostscript, transfig, bzip2, sharutils
+Build-Conflicts: findutils (= 4.4.1-1ubuntu1)
+Vcs-Git: http://kernel.ubuntu.com/git-repos/ubuntu/ubuntu-lucid.git
+
+Package: linux-headers-2.6.32-218
+Architecture: armel
+Section: devel
+Priority: optional
+Depends: ${misc:Depends}, coreutils | fileutils (>= 4.0)
+#Provides: linux-headers, linux-headers-2.6
+Description: Header files related to linux-mvl-dove kernel version 2.6.32
+ This package provides kernel header files for version 2.6.32, for sites
+ that want the latest kernel headers. Please read
+ /usr/share/doc/linux-headers-2.6.32-218/debian.README.gz for details
+
+
+Package: linux-image-2.6.32-218-dove
+Architecture: armel
+Section: admin
+Priority: optional
+Pre-Depends: dpkg (>= 1.10.24)
+Depends: ${misc:Depends}, initramfs-tools (>= 0.36ubuntu6), coreutils | fileutils (>= 4.0), module-init-tools (>= 3.3-pre11-4ubuntu3), wireless-crda
+Conflicts: hotplug (<< 0.0.20040105-1)
+Recommends: 
+Suggests: fdutils, linux-mvl-dove-doc-2.6.32 | linux-mvl-dove-source-2.6.32
+Description: Linux kernel image for version 2.6.32 on dove-based systems
+ This package contains the Linux kernel image for version 2.6.32 on
+ dove-based systems.
+ .
+ Also includes the corresponding System.map file, the modules built by the
+ packager, and scripts that try to ensure that the system is not left in an
+ unbootable state after an update.
+ .
+ Supports dove processors.
+ .
+ Marvell, dove, y0 boards
+ .
+ You likely do not want to install this package directly. Instead, install
+ the linux-dove meta-package, which will ensure that upgrades work
+ correctly, and that supporting packages are also installed.
+
+Package: linux-headers-2.6.32-218-dove
+Architecture: armel
+Section: devel
+Priority: optional
+Depends: ${misc:Depends}, coreutils | fileutils (>= 4.0), linux-headers-2.6.32-218, ${shlibs:Depends}
+Description: Linux kernel headers for version 2.6.32 on dove-based systems
+ This package provides kernel header files for version 2.6.32 on
+ dove-based systems.
+ .
+ This is for sites that want the latest kernel headers.  Please read
+ /usr/share/doc/linux-headers-2.6.32-218/debian.README.gz for details.
+
+Package: linux-image-2.6.32-218-dove-dbgsym
+Architecture: armel
+Section: devel
+Priority: optional
+Depends: ${misc:Depends}
+Provides: linux-debug
+Description: Linux kernel debug image for version 2.6.32 on dove-based systems
+ This package provides a kernel debug image for version 2.6.32 on
+ dove-based systems.
+ .
+ This is for sites that wish to debug the kernel.
+ .
+ The kernel image contained in this package is NOT meant to boot from. It
+ is uncompressed, and unstripped. This package also includes the
+ unstripped modules.
+
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/etc/getabis
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/etc/getabis
@@ -0,0 +1,3 @@
+repo_list=("http://ports.ubuntu.com/pool/main/l/linux-mvl-dove")
+
+getall armel dove
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/etc/kernelconfig
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/etc/kernelconfig
@@ -0,0 +1,2 @@
+archs="armel"
+family='ubuntu'
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/d-i/package-list
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/d-i/package-list
@@ -0,0 +1,119 @@
+Package: kernel-image
+
+Package: fat-modules
+Depends: kernel-image
+Priority: standard
+Description: FAT filesystem support
+ This includes Windows FAT and VFAT support.
+
+Package: fs-core-modules
+Depends: kernel-image
+Priority: standard
+Provides: jfs-modules, reiserfs-modules, xfs-modules
+Description: Base filesystem modules
+ This includes jfs, reiserfs and xfs.
+
+Package: fs-secondary-modules
+Depends: kernel-image, fat-modules
+Priority: standard
+Provides: ntfs-modules, hfs-modules
+Description: Extra filesystem modules
+ This includes support for Windows NTFS and MacOS HFS/HFSPlus
+
+Package: input-modules
+Depends: kernel-image, usb-modules
+Priority: standard
+Description: Support for various input methods
+
+Package: irda-modules
+Depends: kernel-image, nic-shared-modules
+Priority: standard
+Description: Support for Infrared protocols
+
+Package: md-modules
+Depends: kernel-image
+Priority: standard
+Description: Multi-device support (raid, device-mapper, lvm)
+
+Package: nic-modules
+Depends: kernel-image, nic-shared-modules
+Priority: standard
+Description: Network interface support
+
+Package: nic-usb-modules
+Depends: kernel-image, nic-shared-modules, usb-modules
+Priority: standard
+Description: USB network interface support
+
+Package: parport-modules
+Depends: kernel-image
+Priority: standard
+Description: Parallel port support
+
+Package: plip-modules
+Depends: kernel-image, nic-shared-modules, parport-modules
+Priority: standard
+Description: PLIP (parallel port) networking support
+
+Package: ppp-modules
+Depends: kernel-image, nic-shared-modules, serial-modules
+Priority: standard
+Description: PPP (serial port) networking support
+
+Package: sata-modules
+Depends: kernel-image, storage-core-modules
+Priority: standard
+Description: SATA storage support
+
+Package: scsi-modules
+Depends: kernel-image, storage-core-modules
+Priority: standard
+Description: SCSI storage support
+
+Package: serial-modules
+Depends: kernel-image
+Priority: standard
+Description: Serial port support
+
+Package: storage-core-modules
+Depends: kernel-image
+Priority: standard
+Provides: loop-modules
+Description: Core storage support
+ Includes core SCSI, LibATA, USB-Storage. Also includes related block
+ devices for CD, Disk and Tape medium (and IDE Floppy).
+
+Package: usb-modules
+Depends: kernel-image, storage-core-modules
+Priority: standard
+Description: Core USB support
+
+Package: nfs-modules
+Priority: standard
+Depends: kernel-image
+Description: NFS filesystem drivers
+ Includes the NFS client driver, and supporting modules.
+
+Package: block-modules
+Priority: standard
+Depends: kernel-image, storage-core-modules, parport-modules
+Description: Block storage devices
+ This package contains the block storage devices, including DAC960 and
+ paraide.
+
+Package: crypto-modules
+Priority: extra
+Depends: kernel-image
+Description: crypto modules
+ This package contains crypto modules.
+
+Package: socket-modules
+Depends: kernel-image
+Priority: standard
+Description: Unix socket support
+
+Package: mouse-modules
+Depends: kernel-image, input-modules, usb-modules
+Priority: extra
+Description: Mouse support
+ This package contains mouse drivers for the Linux kernel.
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/d-i/kernel-versions.in
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/d-i/kernel-versions.in
@@ -0,0 +1,2 @@
+# arch	version		flavour		installedname			suffix	bdep
+armel	PKGVER-ABINUM	dove		PKGVER-ABINUM-dove			n
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/d-i/kernel-versions
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/d-i/kernel-versions
@@ -0,0 +1,2 @@
+# arch	version		flavour		installedname			suffix	bdep
+armel	2.6.32-218	dove		2.6.32-218-dove			n
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/d-i/modules/usb-modules
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/d-i/modules/usb-modules
@@ -0,0 +1,7 @@
+ehci-hcd ?
+isp116x-hcd
+isp1760
+ohci-hcd ?
+r8a66597-hcd
+sl811-hcd
+uhci-hcd ?
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/d-i/modules/crypto-modules
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/d-i/modules/crypto-modules
@@ -0,0 +1,7 @@
+aes_generic
+blowfish
+twofish
+serpent
+sha256_generic
+ecb ?
+crc32c
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/d-i/modules/scsi-modules
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/d-i/modules/scsi-modules
@@ -0,0 +1,114 @@
+# SCSI
+raid_class ?
+scsi_transport_spi ?
+scsi_transport_fc ?
+scsi_transport_iscsi ?
+scsi_transport_sas ?
+iscsi_tcp ?
+libiscsi ?
+amiga7xx ?
+a3000 ?
+a2091 ?
+gvp11 ?
+mvme147 ?
+sgiwd93 ?
+cyberstorm ?
+cyberstormII ?
+blz2060 ?
+blz1230 ?
+fastlane ?
+oktagon_esp_mod ?
+atari_scsi ?
+mac_scsi ?
+mac_esp ?
+sun3_scsi ?
+mvme16x ?
+bvme6000 ?
+sim710 ?
+advansys ?
+psi240i ?
+BusLogic ?
+dpt_i2o ?
+u14-34f ?
+ultrastor ?
+aha152x ?
+aha1542 ?
+aha1740 ?
+aic7xxx_old ?
+ips ?
+fd_mcs ?
+fdomain ?
+in2000 ?
+g_NCR5380 ?
+g_NCR5380_mmio ?
+NCR53c406a ?
+NCR_D700 ?
+NCR_Q720_mod ?
+sym53c416 ?
+qlogicfas408 ?
+qla1280 ?
+pas16 ?
+seagate ?
+seagate ?
+t128 ?
+dmx3191d ?
+dtc ?
+zalon7xx ?
+eata_pio ?
+wd7000 ?
+mca_53c9x ?
+ibmmca ?
+eata ?
+dc395x ?
+tmscsim ?
+megaraid ?
+atp870u ?
+esp ?
+gdth ?
+initio ?
+a100u2w ?
+qlogicpti ?
+ide-scsi ?
+mesh ?
+mac53c94 ?
+pluto ?
+dec_esp ?
+3w-xxxx ?
+3w-9xxx ?
+ppa ?
+imm ?
+jazz_esp ?
+sun3x_esp ?
+fcal ?
+lasi700 ?
+nsp32 ?
+ipr ?
+hptiop ?
+stex ?
+osst ?
+sg ?
+ch ?
+scsi_debug ?
+aacraid ?
+aic7xxx ?
+aic79xx ?
+aic94xx ?
+arcmsr ?
+acornscsi_mod ?
+arxescsi ?
+cumana_1 ?
+cumana_2 ?
+ecoscsi ?
+oak ?
+powertec ?
+eesox ?
+ibmvscsic ?
+libsas ?
+lpfc ?
+megaraid_mm ?
+megaraid_mbox ?
+megaraid_sas ?
+qla2xxx ?
+sym53c8xx ?
+qla4xxx ?
+mvsas ?
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/d-i/modules/fat-modules
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/d-i/modules/fat-modules
@@ -0,0 +1,7 @@
+fat ?
+vfat ?
+
+# Supporting modules ?
+nls_cp437 ?
+nls_iso8859-1 ?
+nls_utf8 ?
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/d-i/modules/firewire-core-modules
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/d-i/modules/firewire-core-modules
@@ -0,0 +1,4 @@
+ieee1394
+ohci1394
+sbp2
+eth1394
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/d-i/modules/block-modules
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/d-i/modules/block-modules
@@ -0,0 +1,29 @@
+aoe
+aten
+bpck
+bpck6 ?
+cciss
+comm
+cpqarray
+DAC960
+dstr
+epat
+epia
+fit2
+fit3
+friq
+frpw
+kbic
+ktti
+nbd
+on20
+on26
+paride
+pcd
+pd
+pf
+pg
+pt
+sx8
+umem
+virtio_blk ?
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/d-i/modules/mouse-modules
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/d-i/modules/mouse-modules
@@ -0,0 +1,2 @@
+psmouse
+usbmouse ?
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/d-i/modules/plip-modules
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/d-i/modules/plip-modules
@@ -0,0 +1 @@
+plip
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/d-i/modules/ppp-modules
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/d-i/modules/ppp-modules
@@ -0,0 +1,6 @@
+ppp_async
+ppp_deflate
+ppp_mppe
+pppoe
+pppox
+ppp_synctty
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/d-i/modules/fs-core-modules
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/d-i/modules/fs-core-modules
@@ -0,0 +1,3 @@
+jfs
+reiserfs
+xfs
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/d-i/modules/input-modules
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/d-i/modules/input-modules
@@ -0,0 +1,21 @@
+hid-a4tech ?
+hid-apple ?
+hid-belkin ?
+hid-bright ?
+hid-cherry ?
+hid-chicony ?
+hid-cypress ?
+hid-dell ?
+hid-ezkey ?
+hid-gyration ?
+hid-logitech ?
+hid-microsoft ?
+hid-monterey ?
+hid-petalynx ?
+hid-pl ?
+hid-samsung ?
+hid-sony ?
+hid-sunplus ?
+hid-tmff ?
+hid-zpff ?
+usbhid ?
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/d-i/modules/message-modules
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/d-i/modules/message-modules
@@ -0,0 +1,6 @@
+i2o_block
+i2o_bus
+i2o_config
+i2o_core
+i2o_proc
+i2o_scsi
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/d-i/modules/nic-usb-modules
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/d-i/modules/nic-usb-modules
@@ -0,0 +1,11 @@
+catc ?
+kaweth ?
+pegasus ?
+prism2_usb ?
+rtl8150 ?
+usbnet ?
+zd1211rw ?
+zd1201 ?
+rt2500usb ?
+rt73usb ?
+rt2570 ?
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/d-i/modules/nfs-modules
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/d-i/modules/nfs-modules
@@ -0,0 +1,4 @@
+nfs
+nfs_acl ?
+lockd
+sunrpc
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/d-i/modules/md-modules
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/d-i/modules/md-modules
@@ -0,0 +1,13 @@
+dm-crypt ?
+dm-zero
+faulty
+linear
+multipath
+raid0
+raid1
+raid10
+raid456
+
+# Extras
+dm-raid4-5 ?
+dm-loop ?
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/d-i/modules/nic-shared-modules
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/d-i/modules/nic-shared-modules
@@ -0,0 +1,22 @@
+# PHY
+8390
+mii ?
+
+# CRC modules
+crc-ccitt
+crc-itu-t
+libcrc32c
+
+# mac80211 stuff
+mac80211
+cfg80211
+
+# rt2x00 lib (since rt2x00 is split across usb/pci/cb
+rt2x00lib
+
+# Wireless 802.11 modules
+lib80211
+cfg80211
+lib80211_crypt_ccmp
+lib80211_crypt_tkip
+lib80211_crypt_wep
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/d-i/modules/nic-modules
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/d-i/modules/nic-modules
@@ -0,0 +1,152 @@
+3c359 ?
+3c501 ?
+3c503 ?
+3c505 ?
+3c507 ?
+3c509 ?
+3c515 ?
+3c523 ?
+3c527 ?
+3c59x ?
+8139cp ?
+8139too ?
+82596 ?
+abyss ?
+ac3200 ?
+adm8211 ?
+airo ?
+airport ?
+amd8111e ?
+arc4 ?
+arcnet ?
+arc-rawmode ?
+arc-rimi ?
+arlan ?
+at1700 ?
+atl1 ?
+atl1e ?
+atl2 ?
+atmel ?
+atmel_pci ?
+b44 ?
+bcm43xx ?
+bcm43xx-mac80211 ?
+bmac ?
+bnx2 ?
+bnx2x ?
+bonding ?
+cassini ?
+com20020 ?
+com20020-pci ?
+com90io ?
+com90xx ?
+cs89x0 ?
+de2104x ?
+de4x5 ?
+de600 ?
+de620 ?
+defxx ?
+depca ?
+dl2k ?
+dmfe ?
+dummy ?
+e100 ?
+e1000 ?
+e1000e ?
+e2100 ?
+eepro ?
+eepro100 ?
+eexpress ?
+epic100 ?
+eql ?
+es3210 ?
+eth16i ?
+ewrk3 ?
+fealnx ?
+forcedeth ?
+igb ?
+ps3_gelic ?
+hamachi ?
+hermes ?
+hp ?
+hp100 ?
+hp-plus ?
+ibmtr ?
+ipddp ?
+ipw2100 ?
+ipw2200 ?
+ipw3945 ?
+ixgb ?
+lance ?
+lanstreamer ?
+lasi_82596 ?
+lne390 ?
+lp486e ?
+mace ?
+mv643xx_eth ?
+myri_sbus ?
+natsemi ?
+ne ?
+ne2 ?
+ne2k-pci ?
+ne3210 ?
+netconsole ?
+netxen_nic ?
+ni5010 ?
+ni52 ?
+ni65 ?
+niu ?
+ns83820 ?
+olympic ?
+orinoco ?
+orinoco_pci ?
+orinoco_plx ?
+orinoco_tmd ?
+pcnet32 ?
+prism54 ?
+r8169 ?
+rate_control ?
+rfc1051 ?
+rfc1201 ?
+rrunner ?
+rt2400 ?
+rt2500 ?
+rt61pci ?
+s2io ?
+shaper ?
+sis190 ?
+sis900 ?
+spidernet ?
+skfp ?
+skge ?
+sk98lin ?
+sky2 ?
+smc9194 ?
+smc-ultra ?
+smc-ultra32 ?
+starfire ?
+strip ?
+sunbmac ?
+sundance ?
+sungem ?
+sungem_phy ?
+sunhme ?
+sunlance ?
+sunqe ?
+sunvnet ?
+tg3 ?
+tlan ?
+tms380tr ?
+tmspci ?
+tulip ?
+tun ?
+typhoon ?
+uli526x ?
+via-rhine ?
+via-velocity ?
+virtio_net ?
+wavelan ?
+wd ?
+winbond-840 ?
+yellowfin ?
+znet ?
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/d-i/modules/parport-modules
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/d-i/modules/parport-modules
@@ -0,0 +1,2 @@
+parport
+parport_pc
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/d-i/modules/fs-secondary-modules
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/d-i/modules/fs-secondary-modules
@@ -0,0 +1,4 @@
+fuse ?
+ntfs ?
+hfs ?
+hfsplus ?
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/d-i/firmware/README.txt
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/d-i/firmware/README.txt
@@ -0,0 +1,4 @@
+#
+# Place the names of udeb modules into this directory that require
+# runtime firmware.
+#
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/d-i/firmware/nic-modules
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/d-i/firmware/nic-modules
@@ -0,0 +1,6 @@
+bnx2/bnx2-mips-06-4.6.16.fw ?
+bnx2/bnx2-mips-09-4.6.17.fw ?
+bnx2/bnx2-rv2p-06-4.6.16.fw ?
+bnx2/bnx2-rv2p-09-4.6.15.fw ?
+bnx2x-e1-4.8.53.0.fw ?
+bnx2x-e1h-4.8.53.0.fw ?
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/rules.d/armel.mk
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/rules.d/armel.mk
@@ -0,0 +1,17 @@
+build_arch	= arm
+header_arch	= arm
+asm_link	= arm
+defconfig	= defconfig
+flavours	= dove
+build_image	= zImage
+kernel_file	= arch/$(build_arch)/boot/zImage
+install_file	= vmlinuz
+no_dumpfile     = true
+loader		= grub
+
+do_doc_package		= false
+do_source_package	= false
+do_common_headers_indep = false
+do_libc_dev_package	= false
+do_full_source		= true
+do_tools		= false
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/config/config.common.ubuntu
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/config/config.common.ubuntu
@@ -0,0 +1,3488 @@
+#
+# Common config options automatically generated by splitconfig.pl
+#
+CONFIG_6PACK=m
+CONFIG_8139CP=m
+CONFIG_8139TOO=m
+# CONFIG_8139TOO_8129 is not set
+CONFIG_8139TOO_PIO=y
+# CONFIG_8139TOO_TUNE_TWISTER is not set
+# CONFIG_8139_OLD_RX_RESET is not set
+CONFIG_9P_FS=m
+# CONFIG_9P_FSCACHE is not set
+CONFIG_AB3100_CORE=m
+CONFIG_AB3100_OTP=m
+CONFIG_AC97_BUS=y
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_ACENIC is not set
+CONFIG_ACORN_PARTITION=y
+# CONFIG_ACORN_PARTITION_ADFS is not set
+# CONFIG_ACORN_PARTITION_CUMANA is not set
+# CONFIG_ACORN_PARTITION_EESOX is not set
+CONFIG_ACORN_PARTITION_ICS=y
+# CONFIG_ACORN_PARTITION_POWERTEC is not set
+CONFIG_ACORN_PARTITION_RISCIX=y
+CONFIG_ACT200L_DONGLE=m
+CONFIG_ACTISYS_DONGLE=m
+CONFIG_ADAPTEC_STARFIRE=m
+CONFIG_ADFS_FS=m
+# CONFIG_ADFS_FS_RW is not set
+CONFIG_ADI9889=y
+CONFIG_THS8200=y
+CONFIG_ADM8211=m
+CONFIG_AEABI=y
+CONFIG_AFFS_FS=m
+# CONFIG_AFS_DEBUG is not set
+CONFIG_AFS_FS=m
+# CONFIG_AFS_FSCACHE is not set
+CONFIG_AF_RXRPC=m
+# CONFIG_AF_RXRPC_DEBUG is not set
+CONFIG_AIO=y
+CONFIG_ALIGNMENT_TRAP=y
+CONFIG_ALIM7101_WDT=m
+# CONFIG_ALTERA_PCIE_CHDMA is not set
+CONFIG_AMD8111_ETH=m
+CONFIG_AMIGA_PARTITION=y
+# CONFIG_ANDROID is not set
+# CONFIG_ANDROID_PARANOID_NETWORK is not set
+# CONFIG_ANDROID_PMEM is not set
+CONFIG_ANON_INODES=y
+CONFIG_APM_EMULATION=y
+CONFIG_APM_EMU_DS2782=y
+CONFIG_APM_POWER=m
+# CONFIG_APPLICOM is not set
+CONFIG_AR9170_LEDS=y
+CONFIG_AR9170_USB=m
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_DAVINCI is not set
+CONFIG_ARCH_DOVE=y
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_H720X is not set
+CONFIG_ARCH_HAS_CPUFREQ=y
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_REALVIEW is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5PC1XX is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_STMP3XXX is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_W90X900 is not set
+CONFIG_ARCNET=m
+# CONFIG_ARCNET_1051 is not set
+# CONFIG_ARCNET_1201 is not set
+# CONFIG_ARCNET_CAP is not set
+# CONFIG_ARCNET_COM20020 is not set
+# CONFIG_ARCNET_COM90xx is not set
+# CONFIG_ARCNET_COM90xxIO is not set
+# CONFIG_ARCNET_RAW is not set
+# CONFIG_ARCNET_RIM_I is not set
+CONFIG_ARM=y
+# CONFIG_ARM_ERRATA_430973 is not set
+# CONFIG_ARM_ERRATA_458693 is not set
+# CONFIG_ARM_ERRATA_460075 is not set
+CONFIG_ARM_L1_CACHE_SHIFT=5
+CONFIG_ARM_THUMB=y
+CONFIG_ARM_THUMBEE=y
+CONFIG_ARM_UNWIND=y
+# CONFIG_ARPD is not set
+# CONFIG_ASHMEM is not set
+CONFIG_ASK_IP_FIB_HASH=y
+CONFIG_ASUS_OLED=m
+CONFIG_ASYNC_CORE=m
+CONFIG_ASYNC_MEMCPY=m
+CONFIG_ASYNC_PQ=m
+CONFIG_ASYNC_RAID6_RECOV=m
+# CONFIG_ASYNC_RAID6_TEST is not set
+# CONFIG_ASYNC_TX_DMA is not set
+CONFIG_ASYNC_XOR=m
+CONFIG_AT76C50X_USB=m
+CONFIG_ATA=y
+CONFIG_ATAGS_PROC=y
+CONFIG_ATALK=m
+CONFIG_ATARI_PARTITION=y
+# CONFIG_ATA_GENERIC is not set
+# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_ATA_OVER_ETH=m
+# CONFIG_ATA_PIIX is not set
+CONFIG_ATA_SFF=y
+CONFIG_ATA_VERBOSE_ERROR=y
+CONFIG_ATH5K=m
+# CONFIG_ATH5K_DEBUG is not set
+CONFIG_ATH9K=m
+# CONFIG_ATH9K_DEBUG is not set
+CONFIG_ATH_COMMON=m
+# CONFIG_ATL1 is not set
+# CONFIG_ATL1C is not set
+# CONFIG_ATL1E is not set
+CONFIG_ATL2=m
+CONFIG_ATM=m
+CONFIG_ATMEL=m
+# CONFIG_ATM_AMBASSADOR is not set
+CONFIG_ATM_BR2684=m
+CONFIG_ATM_BR2684_IPFILTER=y
+CONFIG_ATM_CLIP=m
+# CONFIG_ATM_CLIP_NO_ICMP is not set
+CONFIG_ATM_DRIVERS=y
+# CONFIG_ATM_DUMMY is not set
+# CONFIG_ATM_ENI is not set
+# CONFIG_ATM_FIRESTREAM is not set
+# CONFIG_ATM_FORE200E is not set
+# CONFIG_ATM_HE is not set
+# CONFIG_ATM_HORIZON is not set
+# CONFIG_ATM_IA is not set
+# CONFIG_ATM_IDT77252 is not set
+# CONFIG_ATM_LANAI is not set
+CONFIG_ATM_LANE=m
+CONFIG_ATM_MPOA=m
+# CONFIG_ATM_NICSTAR is not set
+# CONFIG_ATM_SOLOS is not set
+CONFIG_ATM_TCP=m
+# CONFIG_ATM_ZATM is not set
+CONFIG_AUDIT=y
+CONFIG_AUDIT_GENERIC=y
+CONFIG_AUFS_BDEV_LOOP=y
+# CONFIG_AUFS_BRANCH_MAX_1023 is not set
+CONFIG_AUFS_BRANCH_MAX_127=y
+# CONFIG_AUFS_BRANCH_MAX_32767 is not set
+# CONFIG_AUFS_BRANCH_MAX_511 is not set
+# CONFIG_AUFS_BR_FUSE is not set
+CONFIG_AUFS_BR_RAMFS=y
+# CONFIG_AUFS_DEBUG is not set
+# CONFIG_AUFS_EXPORT is not set
+CONFIG_AUFS_FS=m
+CONFIG_AUFS_HINOTIFY=y
+# CONFIG_AUFS_RDU is not set
+# CONFIG_AUFS_SHWH is not set
+CONFIG_AUTOFS4_FS=m
+CONFIG_AUTOFS_FS=m
+CONFIG_AUXDISPLAY=y
+CONFIG_AX25=m
+CONFIG_AX25_DAMA_SLAVE=y
+CONFIG_AX88796=m
+CONFIG_AX88796_93CX6=y
+# CONFIG_B3DFG is not set
+CONFIG_B43=m
+CONFIG_B43LEGACY=m
+# CONFIG_B43LEGACY_DEBUG is not set
+CONFIG_B43LEGACY_DMA=y
+CONFIG_B43LEGACY_DMA_AND_PIO_MODE=y
+# CONFIG_B43LEGACY_DMA_MODE is not set
+CONFIG_B43LEGACY_LEDS=y
+CONFIG_B43LEGACY_PCICORE_AUTOSELECT=y
+CONFIG_B43LEGACY_PCI_AUTOSELECT=y
+CONFIG_B43LEGACY_PIO=y
+# CONFIG_B43LEGACY_PIO_MODE is not set
+# CONFIG_B43_DEBUG is not set
+CONFIG_B43_LEDS=y
+CONFIG_B43_PCICORE_AUTOSELECT=y
+CONFIG_B43_PCI_AUTOSELECT=y
+CONFIG_B43_PHY_LP=y
+# CONFIG_B43_SDIO is not set
+CONFIG_B44=m
+CONFIG_B44_PCI=y
+CONFIG_B44_PCICORE_AUTOSELECT=y
+CONFIG_B44_PCI_AUTOSELECT=y
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+# CONFIG_BACKLIGHT_DA903X is not set
+CONFIG_BACKLIGHT_DOVE=y
+CONFIG_BACKLIGHT_GENERIC=y
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+# CONFIG_BACKTRACE_SELF_TEST is not set
+CONFIG_BASE_FULL=y
+CONFIG_BASE_SMALL=0
+# CONFIG_BATTERY_BQ2084 is not set
+CONFIG_BATTERY_BQ27x00=m
+# CONFIG_BATTERY_DA9030 is not set
+CONFIG_BATTERY_DS2760=m
+CONFIG_BATTERY_DS2782=m
+CONFIG_BATTERY_MAX17040=m
+# CONFIG_BATTERY_MCU is not set
+# CONFIG_BAYCOM_EPP is not set
+# CONFIG_BAYCOM_PAR is not set
+CONFIG_BAYCOM_SER_FDX=m
+CONFIG_BAYCOM_SER_HDX=m
+# CONFIG_BE2ISCSI is not set
+# CONFIG_BE2NET is not set
+# CONFIG_BEFS_DEBUG is not set
+CONFIG_BEFS_FS=m
+CONFIG_BFS_FS=m
+# CONFIG_BINARY_PRINTF is not set
+CONFIG_BINFMT_AOUT=m
+CONFIG_BINFMT_ELF=y
+CONFIG_BINFMT_MISC=m
+CONFIG_BITREVERSE=y
+CONFIG_BLK_CPQ_CISS_DA=m
+CONFIG_BLK_CPQ_DA=m
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_COMPCACHE is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_CRYPTOLOOP=m
+CONFIG_BLK_DEV_DAC960=m
+CONFIG_BLK_DEV_DM=y
+CONFIG_BLK_DEV_INITRD=y
+# CONFIG_BLK_DEV_INTEGRITY is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_MD=m
+CONFIG_BLK_DEV_NBD=m
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=65536
+CONFIG_BLK_DEV_SD=y
+CONFIG_BLK_DEV_SR=m
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+CONFIG_BLK_DEV_SX8=m
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_UMEM=m
+# CONFIG_BLK_DEV_XIP is not set
+CONFIG_BLOCK=y
+# CONFIG_BMA020 is not set
+# CONFIG_BNX2 is not set
+# CONFIG_BNX2X is not set
+CONFIG_BONDING=m
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_BOOT_TRACER is not set
+CONFIG_BOUNCE=y
+CONFIG_BPQETHER=m
+CONFIG_BRANCH_PROFILE_NONE=y
+CONFIG_BRIDGE=m
+CONFIG_BRIDGE_EBT_802_3=m
+CONFIG_BRIDGE_EBT_AMONG=m
+CONFIG_BRIDGE_EBT_ARP=m
+CONFIG_BRIDGE_EBT_ARPREPLY=m
+CONFIG_BRIDGE_EBT_BROUTE=m
+CONFIG_BRIDGE_EBT_DNAT=m
+CONFIG_BRIDGE_EBT_IP=m
+CONFIG_BRIDGE_EBT_IP6=m
+CONFIG_BRIDGE_EBT_LIMIT=m
+CONFIG_BRIDGE_EBT_LOG=m
+CONFIG_BRIDGE_EBT_MARK=m
+CONFIG_BRIDGE_EBT_MARK_T=m
+CONFIG_BRIDGE_EBT_NFLOG=m
+CONFIG_BRIDGE_EBT_PKTTYPE=m
+CONFIG_BRIDGE_EBT_REDIRECT=m
+CONFIG_BRIDGE_EBT_SNAT=m
+CONFIG_BRIDGE_EBT_STP=m
+CONFIG_BRIDGE_EBT_T_FILTER=m
+CONFIG_BRIDGE_EBT_T_NAT=m
+CONFIG_BRIDGE_EBT_ULOG=m
+CONFIG_BRIDGE_EBT_VLAN=m
+CONFIG_BRIDGE_NETFILTER=y
+CONFIG_BRIDGE_NF_EBTABLES=m
+# CONFIG_BROADCOM_PHY is not set
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_BSD_DISKLABEL=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+CONFIG_BT=m
+CONFIG_BTRFS_FS=m
+CONFIG_BTRFS_FS_POSIX_ACL=y
+CONFIG_BT_BNEP=m
+CONFIG_BT_BNEP_MC_FILTER=y
+CONFIG_BT_BNEP_PROTO_FILTER=y
+# CONFIG_BT_CMTP is not set
+CONFIG_BT_HCIBCM203X=m
+CONFIG_BT_HCIBFUSB=m
+CONFIG_BT_HCIBPA10X=m
+CONFIG_BT_HCIBTSDIO=m
+CONFIG_BT_HCIBTUSB=m
+CONFIG_BT_HCIUART=m
+CONFIG_BT_HCIUART_BCSP=y
+CONFIG_BT_HCIUART_H4=y
+CONFIG_BT_HCIUART_LL=y
+CONFIG_BT_HCIVHCI=m
+CONFIG_BT_HIDP=m
+CONFIG_BT_L2CAP=m
+# CONFIG_BT_MRVL is not set
+CONFIG_BT_RFCOMM=m
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_SCO=m
+CONFIG_BUG=y
+CONFIG_C2PORT=m
+CONFIG_CACHEFILES=m
+# CONFIG_CACHEFILES_DEBUG is not set
+# CONFIG_CACHEFILES_HISTOGRAM is not set
+CONFIG_CACHE_TAUROS2=y
+CONFIG_CAN=m
+CONFIG_CAN_BCM=m
+# CONFIG_CAN_CALC_BITTIMING is not set
+# CONFIG_CAN_DEBUG_DEVICES is not set
+CONFIG_CAN_DEV=m
+CONFIG_CAN_EMS_PCI=m
+# CONFIG_CAN_EMS_USB is not set
+CONFIG_CAN_KVASER_PCI=m
+CONFIG_CAN_RAW=m
+CONFIG_CAN_SJA1000=m
+CONFIG_CAN_SJA1000_PLATFORM=m
+CONFIG_CAN_VCAN=m
+# CONFIG_CAPI_AVM is not set
+# CONFIG_CAPI_EICON is not set
+CONFIG_CAPI_TRACE=y
+CONFIG_CASSINI=m
+CONFIG_CB710_CORE=m
+# CONFIG_CB710_DEBUG is not set
+CONFIG_CB710_DEBUG_ASSUMPTIONS=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+CONFIG_CFG80211=m
+CONFIG_CFG80211_DEBUGFS=y
+CONFIG_CFG80211_DEFAULT_PS=y
+CONFIG_CFG80211_DEFAULT_PS_VALUE=1
+# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
+CONFIG_CFG80211_REG_DEBUG=y
+CONFIG_CGROUPS=y
+CONFIG_CGROUP_CPUACCT=y
+# CONFIG_CGROUP_DEBUG is not set
+# CONFIG_CGROUP_DEVICE is not set
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CGROUP_MEM_RES_CTLR=y
+# CONFIG_CGROUP_MEM_RES_CTLR_SWAP is not set
+CONFIG_CGROUP_NS=y
+CONFIG_CGROUP_SCHED=y
+# CONFIG_CH7025_COMPOSITE is not set
+# CONFIG_CHARGER_PCF50633 is not set
+# CONFIG_CHELSIO_T1 is not set
+# CONFIG_CHELSIO_T3 is not set
+CONFIG_CHELSIO_T3_DEPENDS=y
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_CHR_DEV_SCH is not set
+CONFIG_CHR_DEV_SG=m
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CICADA_PHY is not set
+CONFIG_CIFS=m
+# CONFIG_CIFS_DEBUG2 is not set
+CONFIG_CIFS_DFS_UPCALL=y
+CONFIG_CIFS_EXPERIMENTAL=y
+CONFIG_CIFS_POSIX=y
+# CONFIG_CIFS_STATS is not set
+CONFIG_CIFS_UPCALL=y
+CONFIG_CIFS_WEAK_PW_HASH=y
+CONFIG_CIFS_XATTR=y
+# CONFIG_CISS_SCSI_TAPE is not set
+CONFIG_CMDLINE=""
+# CONFIG_CNIC is not set
+CONFIG_CODA_FS=m
+CONFIG_CODEC_CS42L51=y
+# CONFIG_CODEC_RT5623 is not set
+CONFIG_CODEC_RT5630=y
+# CONFIG_COMEDI is not set
+CONFIG_COMMON_CLKDEV=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_CONFIGFS_FS=m
+CONFIG_CONNECTOR=y
+CONFIG_CONSOLE_POLL=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_CONSTRUCTORS=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_CPUSETS=y
+CONFIG_CPU_32=y
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_32v7=y
+CONFIG_CPU_ABRT_EV7=y
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_CPU_CACHE_V7=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_ENABLE_WRITECO is not set
+CONFIG_CPU_FREQ=y
+# CONFIG_CPU_FREQ_DEBUG is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
+CONFIG_CPU_FREQ_DOVE=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_STAT=y
+CONFIG_CPU_FREQ_STAT_DETAILS=y
+CONFIG_CPU_FREQ_TABLE=y
+CONFIG_CPU_HAS_ASID=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+CONFIG_CPU_IDLE=y
+CONFIG_CPU_IDLE_GOV_LADDER=y
+CONFIG_CPU_IDLE_GOV_MENU=y
+CONFIG_CPU_IDLE_GOV_USER=y
+CONFIG_CPU_PABRT_V7=y
+CONFIG_CPU_PJ4=y
+CONFIG_CPU_PJ4_ERRATA_4574_4731=y
+CONFIG_CPU_PJ4_ERRATA_4315=y
+CONFIG_CPU_PJ4_PMC_ACCESS_IN_USERMODE=y
+CONFIG_CPU_TLB_V7=y
+# CONFIG_CPU_V6 is not set
+CONFIG_CPU_V7=y
+CONFIG_CRAMFS=y
+CONFIG_CRC16=y
+CONFIG_CRC32=y
+CONFIG_CRC7=m
+CONFIG_CRC_CCITT=m
+CONFIG_CRC_ITU_T=m
+CONFIG_CRC_T10DIF=y
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_AEAD=m
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_AES=m
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_ANSI_CPRNG=m
+CONFIG_CRYPTO_ANUBIS=m
+CONFIG_CRYPTO_ARC4=m
+CONFIG_CRYPTO_AUTHENC=m
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_BLOWFISH=m
+CONFIG_CRYPTO_CAMELLIA=m
+CONFIG_CRYPTO_CAST5=m
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_CCM=m
+CONFIG_CRYPTO_CRC32C=m
+CONFIG_CRYPTO_CRYPTD=m
+CONFIG_CRYPTO_CTR=m
+CONFIG_CRYPTO_CTS=m
+CONFIG_CRYPTO_DEFLATE=m
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_DEV_HIFN_795X is not set
+CONFIG_CRYPTO_DEV_MV_CESA=m
+CONFIG_CRYPTO_ECB=y
+CONFIG_CRYPTO_FCRYPT=m
+CONFIG_CRYPTO_FIPS=y
+CONFIG_CRYPTO_GCM=m
+CONFIG_CRYPTO_GF128MUL=m
+CONFIG_CRYPTO_GHASH=m
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_HW=y
+CONFIG_CRYPTO_KHAZAD=m
+CONFIG_CRYPTO_LRW=m
+CONFIG_CRYPTO_LZO=m
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+CONFIG_CRYPTO_MD4=m
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_MICHAEL_MIC=m
+CONFIG_CRYPTO_NULL=m
+CONFIG_CRYPTO_PCBC=m
+CONFIG_CRYPTO_PCOMP=y
+CONFIG_CRYPTO_RMD128=m
+CONFIG_CRYPTO_RMD160=m
+CONFIG_CRYPTO_RMD256=m
+CONFIG_CRYPTO_RMD320=m
+CONFIG_CRYPTO_RNG=m
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_SALSA20=m
+CONFIG_CRYPTO_SEED=m
+CONFIG_CRYPTO_SEQIV=m
+CONFIG_CRYPTO_SERPENT=m
+CONFIG_CRYPTO_SHA1=m
+CONFIG_CRYPTO_SHA256=m
+CONFIG_CRYPTO_SHA512=m
+CONFIG_CRYPTO_TEA=m
+CONFIG_CRYPTO_TEST=m
+CONFIG_CRYPTO_TGR192=m
+CONFIG_CRYPTO_TWOFISH=m
+CONFIG_CRYPTO_TWOFISH_COMMON=m
+# CONFIG_CRYPTO_VMAC is not set
+CONFIG_CRYPTO_WORKQUEUE=y
+CONFIG_CRYPTO_WP512=m
+CONFIG_CRYPTO_XCBC=m
+CONFIG_CRYPTO_XTS=m
+CONFIG_CRYPTO_ZLIB=m
+CONFIG_CUSE=m
+# CONFIG_DAB is not set
+# CONFIG_DAVICOM_PHY is not set
+CONFIG_DCB=y
+# CONFIG_DCC_TTY is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_CREDENTIALS is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_DEBUG_DRIVER is not set
+CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_HIGHMEM is not set
+# CONFIG_DEBUG_ICEDCC is not set
+# CONFIG_DEBUG_INFO is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_LIST is not set
+CONFIG_DEBUG_LL=y
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_SHIRQ is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+CONFIG_DEBUG_USER=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DECNET=m
+CONFIG_DECNET_NF_GRABULATOR=m
+# CONFIG_DECNET_ROUTER is not set
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_LZMA=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_BIC is not set
+CONFIG_DEFAULT_CFQ=y
+CONFIG_DEFAULT_CUBIC=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_HTCP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
+# CONFIG_DEFAULT_NOOP is not set
+# CONFIG_DEFAULT_RENO is not set
+CONFIG_DEFAULT_SECURITY="apparmor"
+CONFIG_DEFAULT_SECURITY_APPARMOR=y
+# CONFIG_DEFAULT_SECURITY_DAC is not set
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_DEFAULT_VEGAS is not set
+# CONFIG_DEFAULT_WESTWOOD is not set
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_DETECT_HUNG_TASK=y
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_DEVKMEM is not set
+CONFIG_DEVPORT=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_DEV_APPLETALK=m
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_DISPLAY_SUPPORT is not set
+# CONFIG_DL2K is not set
+# CONFIG_DLCI is not set
+CONFIG_DLM=m
+# CONFIG_DLM_DEBUG is not set
+# CONFIG_DM9000 is not set
+CONFIG_DMADEVICES=y
+CONFIG_DMATEST=m
+CONFIG_DMA_ENGINE=y
+CONFIG_DM_CRYPT=y
+# CONFIG_DM_DEBUG is not set
+CONFIG_DM_DELAY=m
+CONFIG_DM_LOG_USERSPACE=m
+CONFIG_DM_MIRROR=m
+CONFIG_DM_MULTIPATH=m
+CONFIG_DM_MULTIPATH_QL=m
+CONFIG_DM_MULTIPATH_ST=m
+CONFIG_DM_RAID45=m
+CONFIG_DM_SNAPSHOT=m
+CONFIG_DM_UEVENT=y
+CONFIG_DM_ZERO=m
+CONFIG_DNET=m
+CONFIG_DNOTIFY=y
+CONFIG_DONGLE=y
+CONFIG_DOVEFB_DISPLAY_MODE=y
+# CONFIG_DOVE_DEBUGGER_MODE_V6 is not set
+CONFIG_DOVE_GC600=y
+CONFIG_DOVE_GPU=y
+CONFIG_DOVE_GPU_MEM_SIZE=128
+# CONFIG_DOVE_GPU_USE_BMM is not set
+CONFIG_DOVE_MRVL_BMM=y
+CONFIG_DOVE_PM_SUPPORT=y
+CONFIG_DOVE_REV_Y0=y
+CONFIG_DOVE_VPU_USE_BMM=y
+CONFIG_DRAGONRISE_FF=y
+# CONFIG_DRM is not set
+CONFIG_DS1682=m
+CONFIG_DST=m
+# CONFIG_DST_DEBUG is not set
+CONFIG_DUMMY=m
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_DVB_AF9013=m
+CONFIG_DVB_AU8522=m
+CONFIG_DVB_AV7110=m
+CONFIG_DVB_AV7110_OSD=y
+CONFIG_DVB_B2C2_FLEXCOP=m
+# CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set
+CONFIG_DVB_B2C2_FLEXCOP_PCI=m
+CONFIG_DVB_B2C2_FLEXCOP_USB=m
+CONFIG_DVB_BCM3510=m
+CONFIG_DVB_BT8XX=m
+CONFIG_DVB_BUDGET=m
+CONFIG_DVB_BUDGET_AV=m
+CONFIG_DVB_BUDGET_CI=m
+CONFIG_DVB_BUDGET_CORE=m
+CONFIG_DVB_BUDGET_PATCH=m
+CONFIG_DVB_CAPTURE_DRIVERS=y
+CONFIG_DVB_CORE=m
+CONFIG_DVB_CX22700=m
+CONFIG_DVB_CX22702=m
+CONFIG_DVB_CX24110=m
+CONFIG_DVB_CX24116=m
+CONFIG_DVB_CX24123=m
+CONFIG_DVB_DIB3000MB=m
+CONFIG_DVB_DIB3000MC=m
+CONFIG_DVB_DIB7000M=m
+CONFIG_DVB_DIB7000P=m
+CONFIG_DVB_DIB8000=m
+CONFIG_DVB_DM1105=m
+CONFIG_DVB_DYNAMIC_MINORS=y
+# CONFIG_DVB_FE_CUSTOMISE is not set
+# CONFIG_DVB_FIREDTV is not set
+CONFIG_DVB_ISL6405=m
+CONFIG_DVB_ISL6421=m
+CONFIG_DVB_L64781=m
+CONFIG_DVB_LGDT3305=m
+CONFIG_DVB_LGDT330X=m
+CONFIG_DVB_LGS8GXX=m
+CONFIG_DVB_LNBP21=m
+CONFIG_DVB_MAX_ADAPTERS=8
+CONFIG_DVB_MT312=m
+CONFIG_DVB_MT352=m
+CONFIG_DVB_NXT200X=m
+CONFIG_DVB_NXT6000=m
+CONFIG_DVB_OR51132=m
+CONFIG_DVB_OR51211=m
+CONFIG_DVB_PLL=m
+CONFIG_DVB_PLUTO2=m
+# CONFIG_DVB_PT1 is not set
+CONFIG_DVB_S5H1409=m
+CONFIG_DVB_S5H1411=m
+CONFIG_DVB_S5H1420=m
+CONFIG_DVB_SI21XX=m
+CONFIG_DVB_SP8870=m
+CONFIG_DVB_SP887X=m
+CONFIG_DVB_STB0899=m
+CONFIG_DVB_STB6000=m
+CONFIG_DVB_STB6100=m
+CONFIG_DVB_STV0288=m
+CONFIG_DVB_STV0297=m
+CONFIG_DVB_STV0299=m
+CONFIG_DVB_STV0900=m
+CONFIG_DVB_STV6110=m
+CONFIG_DVB_TDA10021=m
+CONFIG_DVB_TDA10023=m
+CONFIG_DVB_TDA10048=m
+CONFIG_DVB_TDA1004X=m
+CONFIG_DVB_TDA10086=m
+CONFIG_DVB_TDA8083=m
+CONFIG_DVB_TDA8261=m
+CONFIG_DVB_TDA826X=m
+CONFIG_DVB_TTUSB_BUDGET=m
+CONFIG_DVB_TTUSB_DEC=m
+CONFIG_DVB_TUA6100=m
+CONFIG_DVB_TUNER_CX24113=m
+CONFIG_DVB_TUNER_DIB0070=m
+CONFIG_DVB_TUNER_ITD1000=m
+CONFIG_DVB_USB=m
+CONFIG_DVB_USB_A800=m
+CONFIG_DVB_USB_AF9005=m
+CONFIG_DVB_USB_AF9005_REMOTE=m
+CONFIG_DVB_USB_AF9015=m
+CONFIG_DVB_USB_ANYSEE=m
+CONFIG_DVB_USB_AU6610=m
+CONFIG_DVB_USB_CE6230=m
+CONFIG_DVB_USB_CINERGY_T2=m
+CONFIG_DVB_USB_CXUSB=m
+# CONFIG_DVB_USB_DEBUG is not set
+CONFIG_DVB_USB_DIB0700=m
+CONFIG_DVB_USB_DIBUSB_MB=m
+# CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set
+CONFIG_DVB_USB_DIBUSB_MC=m
+CONFIG_DVB_USB_DIGITV=m
+CONFIG_DVB_USB_DTT200U=m
+CONFIG_DVB_USB_DTV5100=m
+CONFIG_DVB_USB_DW2102=m
+# CONFIG_DVB_USB_FRIIO is not set
+CONFIG_DVB_USB_GL861=m
+CONFIG_DVB_USB_GP8PSK=m
+CONFIG_DVB_USB_M920X=m
+CONFIG_DVB_USB_NOVA_T_USB2=m
+CONFIG_DVB_USB_OPERA1=m
+CONFIG_DVB_USB_TTUSB2=m
+CONFIG_DVB_USB_UMT_010=m
+CONFIG_DVB_USB_VP702X=m
+CONFIG_DVB_USB_VP7045=m
+CONFIG_DVB_VES1820=m
+CONFIG_DVB_VES1X93=m
+CONFIG_DVB_ZL10036=m
+CONFIG_DVB_ZL10039=m
+CONFIG_DVB_ZL10353=m
+# CONFIG_DYNAMIC_DEBUG is not set
+CONFIG_E100=m
+CONFIG_E1000=y
+CONFIG_E1000E=y
+CONFIG_ECHO=m
+CONFIG_ECONET=m
+CONFIG_ECONET_AUNUDP=y
+CONFIG_ECONET_NATIVE=y
+CONFIG_ECRYPT_FS=y
+CONFIG_EEPROM_93CX6=m
+CONFIG_EEPROM_AT24=m
+CONFIG_EEPROM_AT25=m
+CONFIG_EEPROM_LEGACY=m
+CONFIG_EEPROM_MAX6875=m
+CONFIG_EFI_PARTITION=y
+CONFIG_EFS_FS=m
+CONFIG_ELF_CORE=y
+# CONFIG_EMBEDDED is not set
+# CONFIG_ENABLE_DEFAULT_TRACERS is not set
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENC28J60=m
+# CONFIG_ENC28J60_WRITEVERIFY is not set
+CONFIG_ENCLOSURE_SERVICES=m
+# CONFIG_ENIC is not set
+CONFIG_EPIC100=m
+CONFIG_EPOLL=y
+CONFIG_EQUALIZER=m
+CONFIG_ESI_DONGLE=m
+# CONFIG_ET131X is not set
+CONFIG_ETHOC=m
+CONFIG_EVENTFD=y
+CONFIG_EXPERIMENTAL=y
+CONFIG_EXPORTFS=m
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+CONFIG_EXT2_FS_SECURITY=y
+CONFIG_EXT2_FS_XATTR=y
+# CONFIG_EXT2_FS_XIP is not set
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT4_DEBUG is not set
+CONFIG_EXT4_FS=y
+CONFIG_EXT4_FS_POSIX_ACL=y
+CONFIG_EXT4_FS_SECURITY=y
+CONFIG_EXT4_FS_XATTR=y
+CONFIG_EXTRA_FIRMWARE=""
+CONFIG_EZX_PCAP=y
+CONFIG_FAIR_GROUP_SCHED=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+CONFIG_FAT_FS=y
+# CONFIG_FAULT_INJECTION is not set
+CONFIG_FB=y
+# CONFIG_FB_3DFX is not set
+# CONFIG_FB_ARK is not set
+# CONFIG_FB_ASILIANT is not set
+# CONFIG_FB_ATY is not set
+# CONFIG_FB_ATY128 is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+# CONFIG_FB_BROADSHEET is not set
+# CONFIG_FB_CARMINE is not set
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_CIRRUS is not set
+# CONFIG_FB_CYBER2000 is not set
+CONFIG_FB_DDC=y
+CONFIG_FB_DOVE=y
+CONFIG_FB_DOVE_CLCD=y
+CONFIG_FB_DOVE_CLCD0_I2C_DEFAULT_SETTING=y
+CONFIG_FB_DOVE_CLCD1=y
+CONFIG_FB_DOVE_CLCD1_I2C_DEFAULT_SETTING=y
+CONFIG_FB_DOVE_CLCD_DCONA_BYPASS=y
+# CONFIG_FB_DOVE_CLCD_DCONA_DUALVIEW is not set
+# CONFIG_FB_DOVE_CLCD_DCONA_MODE is not set
+# CONFIG_FB_DOVE_CLCD_DCONA_OLPC is not set
+# CONFIG_FB_DOVE_CLCD_DCONB_BYPASS0 is not set
+CONFIG_FB_DOVE_CLCD_DCONB_BYPASS1=y
+CONFIG_FB_DOVE_CLCD_DEFAULT_OPTION="lcd0:1280x768-24@60,lcd1:1024x768-16@60"
+CONFIG_FB_DOVE_CLCD_EDID=y
+# CONFIG_FB_DOVE_CLCD_FLAREON_GV is not set
+CONFIG_FB_DOVE_CLCD_SCLK_VALUE=1000
+CONFIG_FB_DOVE_CONSISTENT_DMA_SIZE=14
+CONFIG_FB_DOVE_DCON=y
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_IMSTT is not set
+# CONFIG_FB_KYRO is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_MATROX is not set
+# CONFIG_FB_MB862XX is not set
+# CONFIG_FB_METRONOME is not set
+CONFIG_FB_MODE_HELPERS=y
+# CONFIG_FB_MUSTANG_CLCD is not set
+# CONFIG_FB_NEOMAGIC is not set
+# CONFIG_FB_NVIDIA is not set
+# CONFIG_FB_PM2 is not set
+# CONFIG_FB_PM3 is not set
+# CONFIG_FB_RADEON is not set
+# CONFIG_FB_RIVA is not set
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_S3 is not set
+# CONFIG_FB_SAVAGE is not set
+# CONFIG_FB_SIS is not set
+# CONFIG_FB_SM501 is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_TILEBLITTING is not set
+# CONFIG_FB_TMIO is not set
+# CONFIG_FB_TRIDENT is not set
+CONFIG_FB_UDL=m
+# CONFIG_FB_UVESA is not set
+# CONFIG_FB_VIA is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_VOODOO1 is not set
+# CONFIG_FB_VT8623 is not set
+# CONFIG_FCOE is not set
+# CONFIG_FDDI is not set
+CONFIG_FEALNX=m
+CONFIG_FIB_RULES=y
+CONFIG_FILE_LOCKING=y
+CONFIG_FIREWIRE=m
+CONFIG_FIREWIRE_NET=m
+CONFIG_FIREWIRE_OHCI=m
+CONFIG_FIREWIRE_OHCI_DEBUG=y
+# CONFIG_FIREWIRE_OHCI_REMOTE_DMA is not set
+CONFIG_FIREWIRE_SBP2=m
+# CONFIG_FIRMWARE_EDID is not set
+CONFIG_FIRMWARE_IN_KERNEL=y
+# CONFIG_FIXED_PHY is not set
+CONFIG_FLATMEM=y
+CONFIG_FLATMEM_MANUAL=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x16=y
+CONFIG_FONT_8x8=y
+CONFIG_FORCEDETH=m
+# CONFIG_FORCEDETH_NAPI is not set
+CONFIG_FORCE_MAX_ZONEORDER=19
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+CONFIG_FRAME_WARN=1024
+CONFIG_FREEZER=y
+CONFIG_FSCACHE=m
+# CONFIG_FSCACHE_DEBUG is not set
+# CONFIG_FSCACHE_HISTOGRAM is not set
+# CONFIG_FSCACHE_OBJECT_LIST is not set
+# CONFIG_FSCACHE_STATS is not set
+CONFIG_FSNOTIFY=y
+CONFIG_FS_MBCACHE=y
+CONFIG_FS_POSIX_ACL=y
+CONFIG_FTL=m
+CONFIG_FTRACE=y
+# CONFIG_FUNCTION_TRACER is not set
+CONFIG_FUSE_FS=y
+# CONFIG_FUSION is not set
+CONFIG_FUTEX=y
+CONFIG_FW_LOADER=y
+CONFIG_GACT_PROB=y
+CONFIG_GAMEPORT=m
+CONFIG_GAMEPORT_EMU10K1=m
+CONFIG_GAMEPORT_FM801=m
+CONFIG_GAMEPORT_L4=m
+CONFIG_GAMEPORT_NS558=m
+CONFIG_GARP=m
+# CONFIG_GCOV_KERNEL is not set
+CONFIG_GENERIC_ACL=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GFS2_FS=m
+CONFIG_GFS2_FS_LOCKING_DLM=y
+# CONFIG_GIGASET_BASE is not set
+# CONFIG_GIGASET_DEBUG is not set
+# CONFIG_GIGASET_M101 is not set
+# CONFIG_GIGASET_M105 is not set
+CONFIG_GIRBIL_DONGLE=m
+CONFIG_GPIOLIB=y
+# CONFIG_GPIO_LANGWELL is not set
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_MC33880 is not set
+# CONFIG_GPIO_MCP23S08 is not set
+CONFIG_GPIO_PCA953X=y
+# CONFIG_GPIO_PCF857X is not set
+CONFIG_GPIO_SYSFS=y
+# CONFIG_GPIO_TWL4030 is not set
+# CONFIG_GPIO_UCB1400 is not set
+CONFIG_GREENASIA_FF=y
+CONFIG_GROUP_SCHED=y
+# CONFIG_HAMACHI is not set
+CONFIG_HAMRADIO=y
+CONFIG_HAPPYMEAL=m
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_HAS_DMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_TLS_REG=y
+CONFIG_HAVE_AOUT=y
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_HAVE_IDE=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_HAVE_MLOCK=y
+CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_HDLC is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_HERMES=m
+CONFIG_HERMES_CACHE_FW_ON_INIT=y
+CONFIG_HFSPLUS_FS=m
+CONFIG_HFS_FS=m
+CONFIG_HIBERNATION=y
+CONFIG_HIBERNATION_NVS=y
+CONFIG_HID=y
+CONFIG_HIDRAW=y
+CONFIG_HID_3M_PCT=m
+CONFIG_HID_A4TECH=m
+CONFIG_HID_APPLE=m
+CONFIG_HID_BELKIN=m
+CONFIG_HID_CHERRY=m
+CONFIG_HID_CHICONY=m
+CONFIG_HID_CYPRESS=m
+CONFIG_HID_DRAGONRISE=m
+CONFIG_HID_EZKEY=m
+CONFIG_HID_GREENASIA=m
+CONFIG_HID_GYRATION=m
+CONFIG_HID_KENSINGTON=m
+CONFIG_HID_KYE=m
+CONFIG_HID_LOGITECH=m
+CONFIG_HID_MICROSOFT=m
+CONFIG_HID_MONTEREY=m
+CONFIG_HID_MOSART=m
+CONFIG_HID_NTRIG=m
+CONFIG_HID_ORTEK=m
+CONFIG_HID_PANTHERLORD=m
+CONFIG_HID_PETALYNX=m
+CONFIG_HID_PID=y
+CONFIG_HID_QUANTA=m
+CONFIG_HID_SAMSUNG=m
+CONFIG_HID_SMARTJOYPLUS=m
+CONFIG_HID_SONY=m
+CONFIG_HID_STANTUM=m
+CONFIG_HID_SUNPLUS=m
+CONFIG_HID_SUPPORT=y
+CONFIG_HID_THRUSTMASTER=m
+CONFIG_HID_TOPSEED=m
+CONFIG_HID_TWINHAN=m
+CONFIG_HID_WACOM=m
+CONFIG_HID_ZEROPLUS=m
+CONFIG_HIGHMEM=y
+CONFIG_HIGH_RES_TIMERS=y
+# CONFIG_HIPPI is not set
+CONFIG_HOSTAP=m
+# CONFIG_HOSTAP_FIRMWARE is not set
+CONFIG_HOSTAP_PCI=m
+CONFIG_HOSTAP_PLX=m
+CONFIG_HOTPLUG=y
+CONFIG_HP100=m
+CONFIG_HPFS_FS=m
+# CONFIG_HP_ILO is not set
+CONFIG_HTC_EGPIO=y
+CONFIG_HTC_PASIC3=m
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_HWMON=y
+# CONFIG_HWMON_DEBUG_CHIP is not set
+CONFIG_HWMON_VID=m
+CONFIG_HW_CONSOLE=y
+# CONFIG_HW_RANDOM is not set
+# CONFIG_HYSDN is not set
+CONFIG_HZ=100
+CONFIG_I2C=y
+CONFIG_I2C_ALGOBIT=y
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_COMPAT=y
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DESIGNWARE is not set
+# CONFIG_I2C_GPIO is not set
+CONFIG_I2C_HELPER_AUTO=y
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_ISCH is not set
+CONFIG_I2C_MV64XXX=y
+CONFIG_I2C_MV64XXX_PORT_EXPANDER=y
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PARPORT is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_PIIX4 is not set
+# CONFIG_I2C_SI4713 is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+# CONFIG_I2C_VOODOO3 is not set
+CONFIG_I2O=m
+CONFIG_I2O_BLOCK=m
+CONFIG_I2O_BUS=m
+CONFIG_I2O_CONFIG=m
+CONFIG_I2O_CONFIG_OLD_IOCTL=y
+CONFIG_I2O_EXT_ADAPTEC=y
+CONFIG_I2O_LCT_NOTIFY_ON_CHANGES=y
+CONFIG_I2O_PROC=m
+CONFIG_I2O_SCSI=m
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_ICPLUS_PHY is not set
+CONFIG_ICS932S401=m
+# CONFIG_IDE is not set
+# CONFIG_IDE_PHISON is not set
+CONFIG_IEEE1394=m
+CONFIG_IEEE1394_DV1394=m
+CONFIG_IEEE1394_ETH1394=m
+CONFIG_IEEE1394_ETH1394_ROM_ENTRY=y
+CONFIG_IEEE1394_OHCI1394=m
+CONFIG_IEEE1394_PCILYNX=m
+CONFIG_IEEE1394_RAWIO=m
+CONFIG_IEEE1394_SBP2=m
+# CONFIG_IEEE1394_SBP2_PHYS_DMA is not set
+# CONFIG_IEEE1394_VERBOSEDEBUG is not set
+CONFIG_IEEE1394_VIDEO1394=m
+CONFIG_IEEE802154=m
+CONFIG_IEEE802154_DRIVERS=m
+# CONFIG_IEEE802154_FAKEHARD is not set
+CONFIG_IFB=m
+# CONFIG_IGB is not set
+# CONFIG_IGBVF is not set
+# CONFIG_IIO is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_INET=y
+CONFIG_INET6_AH=m
+CONFIG_INET6_ESP=m
+CONFIG_INET6_IPCOMP=m
+CONFIG_INET6_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_BEET=m
+CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
+CONFIG_INET6_XFRM_MODE_TRANSPORT=m
+CONFIG_INET6_XFRM_MODE_TUNNEL=m
+CONFIG_INET6_XFRM_TUNNEL=m
+CONFIG_INET_AH=m
+CONFIG_INET_DCCP_DIAG=m
+CONFIG_INET_DIAG=y
+CONFIG_INET_ESP=m
+CONFIG_INET_IPCOMP=m
+CONFIG_INET_LRO=y
+CONFIG_INET_TCP_DIAG=y
+CONFIG_INET_TUNNEL=m
+CONFIG_INET_XFRM_MODE_BEET=m
+CONFIG_INET_XFRM_MODE_TRANSPORT=m
+CONFIG_INET_XFRM_MODE_TUNNEL=m
+CONFIG_INET_XFRM_TUNNEL=m
+# CONFIG_INFINIBAND is not set
+CONFIG_INFTL=m
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+CONFIG_INPUT=y
+CONFIG_INPUT_ATI_REMOTE=m
+CONFIG_INPUT_ATI_REMOTE2=m
+CONFIG_INPUT_CM109=m
+CONFIG_INPUT_EVBUG=m
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_FF_MEMLESS=y
+# CONFIG_INPUT_GPIO is not set
+CONFIG_INPUT_GPIO_ROTARY_ENCODER=m
+CONFIG_INPUT_JOYDEV=m
+CONFIG_INPUT_JOYSTICK=y
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_INPUT_KEYRESET is not set
+CONFIG_INPUT_KEYSPAN_REMOTE=m
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_MOUSE=y
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_PCAP is not set
+# CONFIG_INPUT_PCF50633_PMU is not set
+CONFIG_INPUT_POLLDEV=y
+CONFIG_INPUT_POWERMATE=m
+CONFIG_INPUT_TABLET=y
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_INPUT_TWL4030_PWRBUTTON is not set
+CONFIG_INPUT_UINPUT=m
+CONFIG_INPUT_YEALINK=m
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IP1000 is not set
+CONFIG_IP6_NF_FILTER=m
+CONFIG_IP6_NF_IPTABLES=m
+CONFIG_IP6_NF_MANGLE=m
+CONFIG_IP6_NF_MATCH_AH=m
+CONFIG_IP6_NF_MATCH_EUI64=m
+CONFIG_IP6_NF_MATCH_FRAG=m
+CONFIG_IP6_NF_MATCH_HL=m
+CONFIG_IP6_NF_MATCH_IPV6HEADER=m
+CONFIG_IP6_NF_MATCH_MH=m
+CONFIG_IP6_NF_MATCH_OPTS=m
+CONFIG_IP6_NF_MATCH_RT=m
+CONFIG_IP6_NF_QUEUE=m
+CONFIG_IP6_NF_RAW=m
+# CONFIG_IP6_NF_SECURITY is not set
+CONFIG_IP6_NF_TARGET_HL=m
+CONFIG_IP6_NF_TARGET_LOG=m
+CONFIG_IP6_NF_TARGET_REJECT=m
+CONFIG_IPC_NS=y
+CONFIG_IPDDP=m
+CONFIG_IPDDP_DECAP=y
+CONFIG_IPDDP_ENCAP=y
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_IPV6=y
+# CONFIG_IPV6_MIP6 is not set
+# CONFIG_IPV6_MROUTE is not set
+CONFIG_IPV6_MULTIPLE_TABLES=y
+CONFIG_IPV6_NDISC_NODETYPE=y
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+CONFIG_IPV6_PRIVACY=y
+# CONFIG_IPV6_ROUTER_PREF is not set
+CONFIG_IPV6_SIT=m
+# CONFIG_IPV6_SUBTREES is not set
+CONFIG_IPV6_TUNNEL=m
+CONFIG_IPW2100=m
+# CONFIG_IPW2100_DEBUG is not set
+CONFIG_IPW2100_MONITOR=y
+CONFIG_IPW2200=m
+# CONFIG_IPW2200_DEBUG is not set
+CONFIG_IPW2200_MONITOR=y
+CONFIG_IPW2200_PROMISCUOUS=y
+CONFIG_IPW2200_QOS=y
+CONFIG_IPW2200_RADIOTAP=y
+CONFIG_IPX=m
+# CONFIG_IPX_INTERN is not set
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_DCCP=m
+# CONFIG_IP_DCCP_CCID2_DEBUG is not set
+CONFIG_IP_DCCP_CCID3=y
+# CONFIG_IP_DCCP_CCID3_DEBUG is not set
+CONFIG_IP_DCCP_CCID3_RTO=100
+# CONFIG_IP_DCCP_DEBUG is not set
+CONFIG_IP_DCCP_TFRC_LIB=y
+CONFIG_IP_FIB_HASH=y
+# CONFIG_IP_FIB_TRIE is not set
+CONFIG_IP_MROUTE=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_IP_NF_ARPFILTER=m
+CONFIG_IP_NF_ARPTABLES=m
+CONFIG_IP_NF_ARP_MANGLE=m
+CONFIG_IP_NF_FILTER=m
+CONFIG_IP_NF_IPTABLES=m
+CONFIG_IP_NF_MANGLE=m
+CONFIG_IP_NF_MATCH_ADDRTYPE=m
+CONFIG_IP_NF_MATCH_AH=m
+CONFIG_IP_NF_MATCH_ECN=m
+CONFIG_IP_NF_MATCH_TTL=m
+CONFIG_IP_NF_QUEUE=m
+CONFIG_IP_NF_RAW=m
+# CONFIG_IP_NF_SECURITY is not set
+CONFIG_IP_NF_TARGET_CLUSTERIP=m
+CONFIG_IP_NF_TARGET_ECN=m
+CONFIG_IP_NF_TARGET_LOG=m
+CONFIG_IP_NF_TARGET_MASQUERADE=m
+CONFIG_IP_NF_TARGET_NETMAP=m
+CONFIG_IP_NF_TARGET_REDIRECT=m
+CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_NF_TARGET_TTL=m
+CONFIG_IP_NF_TARGET_ULOG=m
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_RARP is not set
+CONFIG_IP_ROUTE_MULTIPATH=y
+CONFIG_IP_ROUTE_VERBOSE=y
+CONFIG_IP_SCTP=m
+CONFIG_IP_VS=m
+# CONFIG_IP_VS_DEBUG is not set
+CONFIG_IP_VS_DH=m
+CONFIG_IP_VS_FTP=m
+CONFIG_IP_VS_IPV6=y
+CONFIG_IP_VS_LBLC=m
+CONFIG_IP_VS_LBLCR=m
+CONFIG_IP_VS_LC=m
+CONFIG_IP_VS_NQ=m
+CONFIG_IP_VS_PROTO_AH=y
+CONFIG_IP_VS_PROTO_AH_ESP=y
+CONFIG_IP_VS_PROTO_ESP=y
+CONFIG_IP_VS_PROTO_TCP=y
+CONFIG_IP_VS_PROTO_UDP=y
+CONFIG_IP_VS_RR=m
+CONFIG_IP_VS_SED=m
+CONFIG_IP_VS_SH=m
+CONFIG_IP_VS_TAB_BITS=12
+CONFIG_IP_VS_WLC=m
+CONFIG_IP_VS_WRR=m
+CONFIG_IRCOMM=m
+CONFIG_IRDA=m
+CONFIG_IRDA_CACHE_LAST_LSAP=y
+CONFIG_IRDA_DEBUG=y
+CONFIG_IRDA_FAST_RR=y
+CONFIG_IRDA_ULTRA=y
+CONFIG_IRLAN=m
+# CONFIG_IRNET is not set
+# CONFIG_IRQSOFF_TRACER is not set
+CONFIG_IRTTY_SIR=m
+# CONFIG_ISCSI_TCP is not set
+CONFIG_ISDN=y
+# CONFIG_ISDN_AUDIO is not set
+CONFIG_ISDN_CAPI=m
+# CONFIG_ISDN_CAPI_CAPI20 is not set
+# CONFIG_ISDN_CAPI_CAPIDRV is not set
+# CONFIG_ISDN_CAPI_MIDDLEWARE is not set
+# CONFIG_ISDN_DIVERSION is not set
+CONFIG_ISDN_DRV_AVMB1_VERBOSE_REASON=y
+CONFIG_ISDN_DRV_GIGASET=m
+# CONFIG_ISDN_DRV_HISAX is not set
+# CONFIG_ISDN_DRV_LOOP is not set
+CONFIG_ISDN_I4L=m
+# CONFIG_ISDN_PPP is not set
+# CONFIG_ISDN_X25 is not set
+CONFIG_ISL29003=m
+CONFIG_ISO9660_FS=y
+CONFIG_IWL3945=m
+# CONFIG_IWL3945_SPECTRUM_MEASUREMENT is not set
+# CONFIG_IWL4965 is not set
+# CONFIG_IWL5000 is not set
+CONFIG_IWLAGN=m
+CONFIG_IWLWIFI=m
+# CONFIG_IWLWIFI_DEBUG is not set
+CONFIG_IWLWIFI_LEDS=y
+# CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT is not set
+CONFIG_IWM=m
+CONFIG_IWMMXT=y
+# CONFIG_IWM_DEBUG is not set
+# CONFIG_IXGB is not set
+# CONFIG_IXGBE is not set
+CONFIG_JBD=y
+CONFIG_JBD2=y
+# CONFIG_JBD2_DEBUG is not set
+# CONFIG_JBD_DEBUG is not set
+CONFIG_JFFS2_CMODE_FAVOURLZO=y
+# CONFIG_JFFS2_CMODE_NONE is not set
+# CONFIG_JFFS2_CMODE_PRIORITY is not set
+# CONFIG_JFFS2_CMODE_SIZE is not set
+CONFIG_JFFS2_COMPRESSION_OPTIONS=y
+CONFIG_JFFS2_FS=m
+CONFIG_JFFS2_FS_DEBUG=0
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_XATTR is not set
+CONFIG_JFFS2_LZO=y
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_JFFS2_SUMMARY is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFS_DEBUG is not set
+CONFIG_JFS_FS=m
+CONFIG_JFS_POSIX_ACL=y
+CONFIG_JFS_SECURITY=y
+CONFIG_JFS_STATISTICS=y
+# CONFIG_JME is not set
+CONFIG_JOLIET=y
+CONFIG_JOYSTICK_A3D=m
+CONFIG_JOYSTICK_ADI=m
+CONFIG_JOYSTICK_ANALOG=m
+CONFIG_JOYSTICK_COBRA=m
+CONFIG_JOYSTICK_DB9=m
+CONFIG_JOYSTICK_GAMECON=m
+CONFIG_JOYSTICK_GF2K=m
+CONFIG_JOYSTICK_GRIP=m
+CONFIG_JOYSTICK_GRIP_MP=m
+CONFIG_JOYSTICK_GUILLEMOT=m
+CONFIG_JOYSTICK_IFORCE=m
+CONFIG_JOYSTICK_IFORCE_232=y
+CONFIG_JOYSTICK_IFORCE_USB=y
+CONFIG_JOYSTICK_INTERACT=m
+CONFIG_JOYSTICK_JOYDUMP=m
+CONFIG_JOYSTICK_MAGELLAN=m
+CONFIG_JOYSTICK_SIDEWINDER=m
+CONFIG_JOYSTICK_SPACEBALL=m
+CONFIG_JOYSTICK_SPACEORB=m
+CONFIG_JOYSTICK_STINGER=m
+CONFIG_JOYSTICK_TMDC=m
+CONFIG_JOYSTICK_TURBOGRAFX=m
+CONFIG_JOYSTICK_TWIDJOY=m
+CONFIG_JOYSTICK_WALKERA0701=m
+CONFIG_JOYSTICK_WARRIOR=m
+CONFIG_JOYSTICK_XPAD=m
+CONFIG_JOYSTICK_XPAD_FF=y
+CONFIG_JOYSTICK_XPAD_LEDS=y
+CONFIG_JOYSTICK_ZHENHUA=m
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_KARMA_PARTITION=y
+# CONFIG_KERNEL_DEBUGGER_CORE is not set
+CONFIG_KEXEC=y
+# CONFIG_KEYBOARD_ADP5588 is not set
+CONFIG_KEYBOARD_ATKBD=m
+CONFIG_KEYBOARD_GPIO=y
+CONFIG_KEYBOARD_LKKBD=m
+CONFIG_KEYBOARD_LM8323=m
+CONFIG_KEYBOARD_MATRIX=m
+# CONFIG_KEYBOARD_MAX7359 is not set
+CONFIG_KEYBOARD_NEWTON=m
+# CONFIG_KEYBOARD_OPENCORES is not set
+CONFIG_KEYBOARD_STOWAWAY=m
+CONFIG_KEYBOARD_SUNKBD=m
+# CONFIG_KEYBOARD_TWL4030 is not set
+CONFIG_KEYBOARD_XTKBD=m
+CONFIG_KEYS=y
+# CONFIG_KEYS_DEBUG_PROC_KEYS is not set
+# CONFIG_KG2_ANX7150 is not set
+CONFIG_KGDB=y
+CONFIG_KGDB_SERIAL_CONSOLE=y
+# CONFIG_KGDB_TESTS is not set
+CONFIG_KINGSUN_DONGLE=m
+# CONFIG_KMEMTRACE is not set
+CONFIG_KPROBES=y
+# CONFIG_KPROBES_SANITY_TEST is not set
+CONFIG_KRETPROBES=y
+CONFIG_KS0108=m
+CONFIG_KS0108_DELAY=2
+CONFIG_KS0108_PORT=0x378
+CONFIG_KS8842=m
+CONFIG_KS8851=m
+# CONFIG_KS8851_MLL is not set
+CONFIG_KS959_DONGLE=m
+CONFIG_KSDAZZLE_DONGLE=m
+# CONFIG_KSM is not set
+CONFIG_LAPB=m
+# CONFIG_LAPBETHER is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_LBDAF=y
+CONFIG_LCD_CLASS_DEVICE=y
+# CONFIG_LCD_ILI9320 is not set
+# CONFIG_LCD_LMS283GF05 is not set
+# CONFIG_LCD_LTV350QV is not set
+# CONFIG_LCD_PLATFORM is not set
+# CONFIG_LCD_TDO24M is not set
+# CONFIG_LCD_VGG2432A4 is not set
+# CONFIG_LDM_DEBUG is not set
+CONFIG_LDM_PARTITION=y
+CONFIG_LEDS_BD2802=m
+CONFIG_LEDS_CLASS=y
+# CONFIG_LEDS_DA903X is not set
+CONFIG_LEDS_DAC124S085=m
+CONFIG_LEDS_GPIO=m
+CONFIG_LEDS_GPIO_PLATFORM=y
+CONFIG_LEDS_LP3944=m
+CONFIG_LEDS_PCA9532=m
+CONFIG_LEDS_PCA955X=m
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_BACKLIGHT=m
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=m
+CONFIG_LEDS_TRIGGER_GPIO=m
+CONFIG_LEDS_TRIGGER_HEARTBEAT=m
+CONFIG_LEDS_TRIGGER_TIMER=m
+# CONFIG_LEDS_WM8350 is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=16
+CONFIG_LIB80211=m
+CONFIG_LIB80211_CRYPT_CCMP=m
+CONFIG_LIB80211_CRYPT_TKIP=m
+CONFIG_LIB80211_CRYPT_WEP=m
+# CONFIG_LIB80211_DEBUG is not set
+CONFIG_LIBCRC32C=m
+CONFIG_LIBERTAS=m
+# CONFIG_LIBERTAS_DEBUG is not set
+CONFIG_LIBERTAS_SDIO=m
+CONFIG_LIBERTAS_SPI=m
+CONFIG_LIBERTAS_THINFIRM=m
+CONFIG_LIBERTAS_THINFIRM_USB=m
+CONFIG_LIBERTAS_USB=m
+# CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
+CONFIG_LIBIPW=m
+# CONFIG_LIBIPW_DEBUG is not set
+CONFIG_LINE6_USB=m
+CONFIG_LIRC_ATIUSB=m
+CONFIG_LIRC_BT829=m
+CONFIG_LIRC_CONFIG_LIRC_WPC8769L=m
+CONFIG_LIRC_DEV=m
+CONFIG_LIRC_ENE0100=m
+# CONFIG_LIRC_GPIO is not set
+CONFIG_LIRC_I2C=m
+CONFIG_LIRC_IGORPLUGUSB=m
+CONFIG_LIRC_IMON=m
+CONFIG_LIRC_IT87=m
+CONFIG_LIRC_ITE8709=m
+CONFIG_LIRC_MCEUSB=m
+# CONFIG_LIRC_PARALLEL is not set
+CONFIG_LIRC_SASEM=m
+CONFIG_LIRC_SERIAL=m
+CONFIG_LIRC_SIR=m
+CONFIG_LIRC_STREAMZAP=m
+CONFIG_LIRC_TTUSBIR=m
+CONFIG_LITELINK_DONGLE=m
+# CONFIG_LKDTM is not set
+CONFIG_LLC=m
+CONFIG_LLC2=m
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_LOCKD=m
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_LOCKD_V4=y
+# CONFIG_LOCK_STAT is not set
+CONFIG_LOGIRUMBLEPAD2_FF=y
+CONFIG_LOGITECH_FF=y
+# CONFIG_LOGO is not set
+CONFIG_LOG_BUF_SHIFT=17
+# CONFIG_LSI_ET1011C_PHY is not set
+CONFIG_LSM_MMAP_MIN_ADDR=0
+# CONFIG_LXT_PHY is not set
+CONFIG_LZO_COMPRESS=m
+CONFIG_LZO_DECOMPRESS=m
+CONFIG_M25PXX_USE_FAST_READ=y
+CONFIG_MA600_DONGLE=m
+CONFIG_MAC80211=m
+CONFIG_MAC80211_DEBUGFS=y
+# CONFIG_MAC80211_DEBUG_MENU is not set
+CONFIG_MAC80211_HWSIM=m
+CONFIG_MAC80211_LEDS=y
+# CONFIG_MAC80211_MESH is not set
+CONFIG_MAC80211_RC_DEFAULT="minstrel"
+CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
+# CONFIG_MAC80211_RC_DEFAULT_PID is not set
+CONFIG_MAC80211_RC_MINSTREL=y
+CONFIG_MACH_DOVE_DB=y
+CONFIG_MACH_DOVE_DB_B=y
+# CONFIG_DOVE_DB_USE_GPIO_I2C is not set
+# CONFIG_MACH_DOVE_RD is not set
+CONFIG_MACH_DOVE_RD_AVNG=y
+CONFIG_MACH_DOVE_VIDEOPLUG=y
+CONFIG_MACVLAN=m
+CONFIG_MAC_PARTITION=y
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_MARVELL_PHY is not set
+CONFIG_MAX1535=y
+CONFIG_MCP2120_DONGLE=m
+CONFIG_MCS_FIR=m
+CONFIG_MD=y
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_MD_FAULTY=m
+CONFIG_MD_LINEAR=m
+CONFIG_MD_MULTIPATH=m
+CONFIG_MD_RAID0=m
+CONFIG_MD_RAID1=m
+CONFIG_MD_RAID10=m
+CONFIG_MD_RAID456=m
+CONFIG_MD_RAID6_PQ=m
+CONFIG_MEDIA_ATTACH=y
+CONFIG_MEDIA_SUPPORT=m
+CONFIG_MEDIA_TUNER=m
+# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
+CONFIG_MEDIA_TUNER_MC44S803=m
+CONFIG_MEDIA_TUNER_MT2060=m
+CONFIG_MEDIA_TUNER_MT20XX=m
+CONFIG_MEDIA_TUNER_MT2131=m
+CONFIG_MEDIA_TUNER_MT2266=m
+CONFIG_MEDIA_TUNER_MXL5005S=m
+CONFIG_MEDIA_TUNER_MXL5007T=m
+CONFIG_MEDIA_TUNER_QT1010=m
+CONFIG_MEDIA_TUNER_SIMPLE=m
+CONFIG_MEDIA_TUNER_TDA18271=m
+CONFIG_MEDIA_TUNER_TDA827X=m
+CONFIG_MEDIA_TUNER_TDA8290=m
+CONFIG_MEDIA_TUNER_TDA9887=m
+CONFIG_MEDIA_TUNER_TEA5761=m
+CONFIG_MEDIA_TUNER_TEA5767=m
+CONFIG_MEDIA_TUNER_XC2028=m
+CONFIG_MEDIA_TUNER_XC5000=m
+# CONFIG_MEGARAID_LEGACY is not set
+# CONFIG_MEGARAID_NEWGEN is not set
+# CONFIG_MEGARAID_SAS is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_MEM_FOR_MULTIPROCESS is not set
+CONFIG_MFD_ASIC3=y
+CONFIG_MFD_CORE=y
+# CONFIG_MFD_MC13783 is not set
+CONFIG_MFD_PCF50633=m
+CONFIG_MFD_SM501=m
+# CONFIG_MFD_SM501_GPIO is not set
+CONFIG_MFD_T7L66XB=y
+CONFIG_MFD_TC6387XB=y
+CONFIG_MFD_TC6393XB=y
+CONFIG_MFD_TMIO=y
+# CONFIG_MFD_WM831X is not set
+CONFIG_MFD_WM8350=m
+CONFIG_MFD_WM8350_I2C=m
+CONFIG_MFD_WM8400=m
+CONFIG_MG_DISK=m
+CONFIG_MG_DISK_RES=0
+CONFIG_MII=y
+CONFIG_MINIX_FS=m
+CONFIG_MINIX_SUBPARTITION=y
+CONFIG_MISC_DEVICES=y
+CONFIG_MISC_FILESYSTEMS=y
+CONFIG_MISDN=m
+# CONFIG_MISDN_AVMFRITZ is not set
+# CONFIG_MISDN_DSP is not set
+# CONFIG_MISDN_HFCMULTI is not set
+# CONFIG_MISDN_HFCPCI is not set
+# CONFIG_MISDN_HFCUSB is not set
+# CONFIG_MISDN_INFINEON is not set
+# CONFIG_MISDN_L1OIP is not set
+# CONFIG_MISDN_NETJET is not set
+# CONFIG_MISDN_SPEEDFAX is not set
+# CONFIG_MISDN_W6692 is not set
+CONFIG_MKISS=m
+# CONFIG_MLX4_CORE is not set
+# CONFIG_MLX4_EN is not set
+CONFIG_MMC=y
+# CONFIG_MMC_AT91 is not set
+# CONFIG_MMC_ATMELMCI is not set
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_MMC_BLOCK_PARANOID_RESUME is not set
+# CONFIG_MMC_CB710 is not set
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_EMBEDDED_SDIO is not set
+# CONFIG_MMC_MVSDIO is not set
+# CONFIG_MMC_PARANOID_SD_INIT is not set
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_MV=y
+# CONFIG_MMC_SDHCI_PCI is not set
+# CONFIG_MMC_SDHCI_PLTFM is not set
+# CONFIG_MMC_SPI is not set
+# CONFIG_MMC_TEST is not set
+# CONFIG_MMC_TIFM_SD is not set
+# CONFIG_MMC_TMIO is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+# CONFIG_MMC_VIA_SDMMC is not set
+CONFIG_MMU=y
+CONFIG_MM_OWNER=y
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_MODULE_SRCVERSION_ALL=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+CONFIG_MOUSE_APPLETOUCH=m
+CONFIG_MOUSE_BCM5974=m
+# CONFIG_MOUSE_GPIO is not set
+CONFIG_MOUSE_PS2=m
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_ELANTECH=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+# CONFIG_MOUSE_PS2_SENTELIC is not set
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+CONFIG_MOUSE_SERIAL=m
+CONFIG_MOUSE_SYNAPTICS_I2C=m
+CONFIG_MOUSE_VSXXXAA=m
+CONFIG_MRVL_ERRATA_THUMB_VLDR=y
+CONFIG_MRV_PTE_IN_L2=y
+CONFIG_MSDOS_FS=y
+CONFIG_MSDOS_PARTITION=y
+CONFIG_MTD=y
+CONFIG_MTDRAM_ERASE_SIZE=128
+CONFIG_MTDRAM_TOTAL_SIZE=4096
+CONFIG_MTD_ABSENT=m
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_ALAUDA is not set
+# CONFIG_MTD_AR7_PARTS is not set
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_BLOCK2MTD=m
+CONFIG_MTD_CFI=m
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_CFI_AMDSTD=m
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CFI_INTELEXT=m
+CONFIG_MTD_CFI_STAA=m
+CONFIG_MTD_CFI_UTIL=m
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_COMPLEX_MAPPINGS=y
+CONFIG_MTD_CONCAT=m
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_DOC2000=m
+CONFIG_MTD_DOC2001=m
+CONFIG_MTD_DOC2001PLUS=m
+CONFIG_MTD_DOCECC=m
+CONFIG_MTD_DOCPROBE=m
+CONFIG_MTD_DOCPROBE_ADDRESS=0
+# CONFIG_MTD_DOCPROBE_ADVANCED is not set
+CONFIG_MTD_GEN_PROBE=m
+# CONFIG_MTD_GPIO_ADDR is not set
+# CONFIG_MTD_IMPA7 is not set
+# CONFIG_MTD_INTEL_VR_NOR is not set
+CONFIG_MTD_JEDECPROBE=m
+CONFIG_MTD_LPDDR=m
+CONFIG_MTD_M25P80=y
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+CONFIG_MTD_MTDRAM=m
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_CAFE is not set
+CONFIG_MTD_NAND_DISKONCHIP=m
+# CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE is not set
+CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0
+# CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED is not set
+# CONFIG_MTD_NAND_DOVE is not set
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_GPIO is not set
+# CONFIG_MTD_NAND_HAL_DOVE is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_ORION is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_NAND_TMIO is not set
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NFC_ORION is not set
+CONFIG_MTD_NFC_HAL_ORION=y
+CONFIG_MTD_ONENAND=m
+CONFIG_MTD_ONENAND_2X_PROGRAM=y
+CONFIG_MTD_ONENAND_GENERIC=m
+# CONFIG_MTD_ONENAND_OTP is not set
+CONFIG_MTD_ONENAND_SIM=m
+CONFIG_MTD_ONENAND_VERIFY_WRITE=y
+CONFIG_MTD_OOPS=m
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_PCI is not set
+CONFIG_MTD_PHRAM=m
+CONFIG_MTD_PHYSMAP=m
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+CONFIG_MTD_PLATRAM=m
+CONFIG_MTD_PMC551=m
+# CONFIG_MTD_PMC551_BUGFIX is not set
+# CONFIG_MTD_PMC551_DEBUG is not set
+CONFIG_MTD_QINFO_PROBE=m
+CONFIG_MTD_RAM=m
+CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
+CONFIG_MTD_REDBOOT_PARTS=m
+# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
+# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
+CONFIG_MTD_ROM=m
+CONFIG_MTD_SLRAM=m
+# CONFIG_MTD_SST25L is not set
+CONFIG_MTD_TESTS=m
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_BEB_RESERVE=1
+# CONFIG_MTD_UBI_DEBUG is not set
+CONFIG_MTD_UBI_GLUEBI=m
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_MV643XX_ETH=y
+# CONFIG_MVUMI_SAS is not set
+CONFIG_MV_CESA=y
+CONFIG_MV_CESA_OCF=y
+CONFIG_MV_CESA_TOOL=y
+# CONFIG_MV_DBG_TRACE is not set
+CONFIG_MV_DDRMMC=y
+CONFIG_MV_EC_KEY=y
+CONFIG_MV_ETHERNET=y
+CONFIG_MV_ETH_0_MACADDR=""
+CONFIG_MV_ETH_0_MTU=1500
+# CONFIG_MV_ETH_INET_LRO is not set
+# CONFIG_MV_ETH_NFP is not set
+CONFIG_MV_ETH_NUM_OF_RX_DESCR=128
+CONFIG_MV_ETH_NUM_OF_TX_DESCR=532
+CONFIG_MV_ETH_PORTS_NUM=1
+CONFIG_MV_ETH_PROC=y
+CONFIG_MV_ETH_RX_Q_NUM=1
+# CONFIG_MV_ETH_STATS_DEBUG is not set
+CONFIG_MV_ETH_STATS_ERROR=y
+CONFIG_MV_ETH_STATS_INFO=y
+CONFIG_MV_ETH_TIMER_PERIOD=1000
+CONFIG_MV_ETH_TSO=y
+CONFIG_MV_ETH_TX_Q_NUM=1
+# CONFIG_MV_ETH_UFO is not set
+CONFIG_MV_EXT_VGA_CLOCK=y
+# CONFIG_MV_GATEWAY is not set
+CONFIG_MV_GPIO_KEY=y
+CONFIG_MV_HAL_DRIVERS_SUPPORT=y
+CONFIG_MV_HAL_RULES_PATH="arch/arm/mach-dove/mv_hal_support/mvRules.mk"
+CONFIG_MV_INCLUDE_AUDIO=y
+CONFIG_MV_INCLUDE_CESA=y
+CONFIG_MV_INCLUDE_GIG_ETH=y
+# CONFIG_MV_INCLUDE_IDMA is not set
+CONFIG_MV_INCLUDE_INTEG_SATA=y
+CONFIG_MV_INCLUDE_MPP_SYSFS=y
+CONFIG_MV_INCLUDE_NFC=y
+CONFIG_MV_INCLUDE_PMU=y
+CONFIG_MV_INCLUDE_USB=y
+# CONFIG_MV_INCLUDE_XOR is not set
+CONFIG_MV_L2_PREFETCH_OFF=y
+# CONFIG_MV_L2_WA_ON is not set
+# CONFIG_MV_LINUX_COUNTERS_DISABLE is not set
+CONFIG_MV_MTD_MLC_NAND_SUPPORT=y
+CONFIG_MV_MTD_GANG_SUPPORT=y
+CONFIG_MV_SATA_ENABLE_1MB_IOS=y
+CONFIG_MV_SATA_SUPPORT_ATAPI=y
+CONFIG_MV_SKB_HEADROOM=32
+CONFIG_MV_SKB_REUSE=y
+CONFIG_MV_TOUCH_KEY=y
+CONFIG_MV_TOUCH_SLIDER=y
+CONFIG_MV_XOR=y
+CONFIG_MWL8K=m
+# CONFIG_MYRI10GE is not set
+CONFIG_NAMESPACES=y
+# CONFIG_NATIONAL_PHY is not set
+CONFIG_NATSEMI=m
+CONFIG_NCPFS_EXTRAS=y
+CONFIG_NCPFS_IOCTL_LOCKING=y
+CONFIG_NCPFS_NFS_NS=y
+CONFIG_NCPFS_NLS=y
+CONFIG_NCPFS_OS2_NS=y
+CONFIG_NCPFS_PACKET_SIGNING=y
+# CONFIG_NCPFS_SMALLDOS is not set
+CONFIG_NCPFS_STRONG=y
+CONFIG_NCP_FS=m
+# CONFIG_NDISWRAPPER is not set
+CONFIG_NE2K_PCI=m
+# CONFIG_NEON is not set
+CONFIG_NET=y
+CONFIG_NETCONSOLE=m
+CONFIG_NETCONSOLE_DYNAMIC=y
+CONFIG_NETDEVICES=y
+CONFIG_NETDEV_1000=y
+CONFIG_NETDEV_10000=y
+CONFIG_NETFILTER=y
+CONFIG_NETFILTER_ADVANCED=y
+# CONFIG_NETFILTER_DEBUG is not set
+CONFIG_NETFILTER_NETLINK=m
+CONFIG_NETFILTER_NETLINK_LOG=m
+CONFIG_NETFILTER_NETLINK_QUEUE=m
+# CONFIG_NETFILTER_TPROXY is not set
+CONFIG_NETFILTER_XTABLES=m
+CONFIG_NETFILTER_XT_MATCH_CLUSTER=m
+CONFIG_NETFILTER_XT_MATCH_COMMENT=m
+CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
+CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
+CONFIG_NETFILTER_XT_MATCH_DCCP=m
+CONFIG_NETFILTER_XT_MATCH_DSCP=m
+CONFIG_NETFILTER_XT_MATCH_ESP=m
+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
+CONFIG_NETFILTER_XT_MATCH_HELPER=m
+CONFIG_NETFILTER_XT_MATCH_HL=m
+CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
+CONFIG_NETFILTER_XT_MATCH_LENGTH=m
+CONFIG_NETFILTER_XT_MATCH_LIMIT=m
+CONFIG_NETFILTER_XT_MATCH_MAC=m
+CONFIG_NETFILTER_XT_MATCH_MARK=m
+CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
+CONFIG_NETFILTER_XT_MATCH_OSF=m
+CONFIG_NETFILTER_XT_MATCH_OWNER=m
+CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
+CONFIG_NETFILTER_XT_MATCH_POLICY=m
+CONFIG_NETFILTER_XT_MATCH_QUOTA=m
+CONFIG_NETFILTER_XT_MATCH_RATEEST=m
+CONFIG_NETFILTER_XT_MATCH_REALM=m
+CONFIG_NETFILTER_XT_MATCH_RECENT=m
+# CONFIG_NETFILTER_XT_MATCH_RECENT_PROC_COMPAT is not set
+CONFIG_NETFILTER_XT_MATCH_SCTP=m
+CONFIG_NETFILTER_XT_MATCH_STATE=m
+CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
+CONFIG_NETFILTER_XT_MATCH_STRING=m
+CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
+CONFIG_NETFILTER_XT_MATCH_TIME=m
+CONFIG_NETFILTER_XT_MATCH_U32=m
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
+CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
+CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m
+# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
+CONFIG_NETFILTER_XT_TARGET_HL=m
+# CONFIG_NETFILTER_XT_TARGET_LED is not set
+CONFIG_NETFILTER_XT_TARGET_MARK=m
+CONFIG_NETFILTER_XT_TARGET_NFLOG=m
+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
+# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set
+CONFIG_NETFILTER_XT_TARGET_RATEEST=m
+CONFIG_NETFILTER_XT_TARGET_SECMARK=m
+CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
+# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
+# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
+CONFIG_NETLABEL=y
+CONFIG_NETPOLL=y
+# CONFIG_NETPOLL_TRAP is not set
+CONFIG_NETROM=m
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NETWORK_SECMARK=y
+# CONFIG_NETXEN_NIC is not set
+CONFIG_NET_9P=m
+# CONFIG_NET_9P_DEBUG is not set
+CONFIG_NET_ACT_GACT=m
+CONFIG_NET_ACT_IPT=m
+CONFIG_NET_ACT_MIRRED=m
+CONFIG_NET_ACT_NAT=m
+CONFIG_NET_ACT_PEDIT=m
+CONFIG_NET_ACT_POLICE=m
+CONFIG_NET_ACT_SIMP=m
+CONFIG_NET_ACT_SKBEDIT=m
+CONFIG_NET_CLS=y
+CONFIG_NET_CLS_ACT=y
+CONFIG_NET_CLS_BASIC=m
+# CONFIG_NET_CLS_CGROUP is not set
+# CONFIG_NET_CLS_FLOW is not set
+CONFIG_NET_CLS_FW=m
+# CONFIG_NET_CLS_IND is not set
+CONFIG_NET_CLS_ROUTE=y
+CONFIG_NET_CLS_ROUTE4=m
+CONFIG_NET_CLS_RSVP=m
+CONFIG_NET_CLS_RSVP6=m
+CONFIG_NET_CLS_TCINDEX=m
+# CONFIG_NET_CLS_U32 is not set
+# CONFIG_NET_DCCPPROBE is not set
+# CONFIG_NET_DMA is not set
+CONFIG_NET_DSA=y
+CONFIG_NET_DSA_MV88E6060=y
+CONFIG_NET_DSA_MV88E6123_61_65=y
+CONFIG_NET_DSA_MV88E6131=y
+CONFIG_NET_DSA_MV88E6XXX=y
+CONFIG_NET_DSA_MV88E6XXX_NEED_PPU=y
+CONFIG_NET_DSA_TAG_DSA=y
+CONFIG_NET_DSA_TAG_EDSA=y
+CONFIG_NET_DSA_TAG_TRAILER=y
+CONFIG_NET_EMATCH=y
+CONFIG_NET_EMATCH_CMP=m
+CONFIG_NET_EMATCH_META=m
+CONFIG_NET_EMATCH_NBYTE=m
+CONFIG_NET_EMATCH_STACK=32
+CONFIG_NET_EMATCH_TEXT=m
+CONFIG_NET_EMATCH_U32=m
+CONFIG_NET_ETHERNET=y
+CONFIG_NET_FC=y
+CONFIG_NET_IPGRE=m
+CONFIG_NET_IPGRE_BROADCAST=y
+CONFIG_NET_IPIP=m
+CONFIG_NET_KEY=m
+# CONFIG_NET_KEY_MIGRATE is not set
+CONFIG_NET_NS=y
+CONFIG_NET_PCI=y
+CONFIG_NET_PKTGEN=m
+# CONFIG_NET_POCKET is not set
+CONFIG_NET_POLL_CONTROLLER=y
+CONFIG_NET_SCHED=y
+CONFIG_NET_SCH_ATM=m
+CONFIG_NET_SCH_CBQ=m
+CONFIG_NET_SCH_DRR=m
+CONFIG_NET_SCH_DSMARK=m
+CONFIG_NET_SCH_FIFO=y
+CONFIG_NET_SCH_GRED=m
+CONFIG_NET_SCH_HFSC=m
+CONFIG_NET_SCH_HTB=m
+# CONFIG_NET_SCH_INGRESS is not set
+CONFIG_NET_SCH_MULTIQ=m
+CONFIG_NET_SCH_NETEM=m
+CONFIG_NET_SCH_PRIO=m
+CONFIG_NET_SCH_RED=m
+CONFIG_NET_SCH_SFQ=m
+CONFIG_NET_SCH_TBF=m
+CONFIG_NET_SCH_TEQL=m
+# CONFIG_NET_TCPPROBE is not set
+# CONFIG_NET_TULIP is not set
+CONFIG_NET_VENDOR_3COM=y
+CONFIG_NEW_LEDS=y
+CONFIG_NFSD=m
+CONFIG_NFSD_V2_ACL=y
+CONFIG_NFSD_V3=y
+CONFIG_NFSD_V3_ACL=y
+CONFIG_NFSD_V4=y
+CONFIG_NFS_ACL_SUPPORT=m
+CONFIG_NFS_COMMON=y
+CONFIG_NFS_FS=m
+# CONFIG_NFS_FSCACHE is not set
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+# CONFIG_NFS_V4_1 is not set
+CONFIG_NFTL=m
+CONFIG_NFTL_RW=y
+CONFIG_NF_CONNTRACK=m
+CONFIG_NF_CONNTRACK_AMANDA=m
+CONFIG_NF_CONNTRACK_EVENTS=y
+CONFIG_NF_CONNTRACK_FTP=m
+CONFIG_NF_CONNTRACK_H323=m
+CONFIG_NF_CONNTRACK_IPV4=m
+CONFIG_NF_CONNTRACK_IPV6=m
+CONFIG_NF_CONNTRACK_IRC=m
+CONFIG_NF_CONNTRACK_MARK=y
+CONFIG_NF_CONNTRACK_NETBIOS_NS=m
+CONFIG_NF_CONNTRACK_PPTP=m
+CONFIG_NF_CONNTRACK_PROC_COMPAT=y
+# CONFIG_NF_CONNTRACK_SANE is not set
+CONFIG_NF_CONNTRACK_SECMARK=y
+CONFIG_NF_CONNTRACK_SIP=m
+CONFIG_NF_CONNTRACK_TFTP=m
+CONFIG_NF_CT_ACCT=y
+CONFIG_NF_CT_NETLINK=m
+CONFIG_NF_CT_PROTO_DCCP=m
+CONFIG_NF_CT_PROTO_GRE=m
+CONFIG_NF_CT_PROTO_SCTP=m
+CONFIG_NF_CT_PROTO_UDPLITE=m
+CONFIG_NF_DEFRAG_IPV4=m
+CONFIG_NF_NAT=m
+CONFIG_NF_NAT_AMANDA=m
+CONFIG_NF_NAT_FTP=m
+CONFIG_NF_NAT_H323=m
+CONFIG_NF_NAT_IRC=m
+CONFIG_NF_NAT_NEEDED=y
+CONFIG_NF_NAT_PPTP=m
+CONFIG_NF_NAT_PROTO_DCCP=m
+CONFIG_NF_NAT_PROTO_GRE=m
+CONFIG_NF_NAT_PROTO_SCTP=m
+CONFIG_NF_NAT_PROTO_UDPLITE=m
+CONFIG_NF_NAT_SIP=m
+CONFIG_NF_NAT_SNMP_BASIC=m
+CONFIG_NF_NAT_TFTP=m
+CONFIG_NILFS2_FS=m
+# CONFIG_NIU is not set
+# CONFIG_NL80211_TESTMODE is not set
+CONFIG_NLATTR=y
+CONFIG_NLS=y
+CONFIG_NLS_ASCII=m
+CONFIG_NLS_CODEPAGE_1250=m
+CONFIG_NLS_CODEPAGE_1251=m
+CONFIG_NLS_CODEPAGE_437=m
+CONFIG_NLS_CODEPAGE_737=m
+CONFIG_NLS_CODEPAGE_775=m
+CONFIG_NLS_CODEPAGE_850=m
+CONFIG_NLS_CODEPAGE_852=m
+CONFIG_NLS_CODEPAGE_855=m
+CONFIG_NLS_CODEPAGE_857=m
+CONFIG_NLS_CODEPAGE_860=m
+CONFIG_NLS_CODEPAGE_861=m
+CONFIG_NLS_CODEPAGE_862=m
+CONFIG_NLS_CODEPAGE_863=m
+CONFIG_NLS_CODEPAGE_864=m
+CONFIG_NLS_CODEPAGE_865=m
+CONFIG_NLS_CODEPAGE_866=m
+CONFIG_NLS_CODEPAGE_869=m
+CONFIG_NLS_CODEPAGE_874=m
+CONFIG_NLS_CODEPAGE_932=m
+CONFIG_NLS_CODEPAGE_936=m
+CONFIG_NLS_CODEPAGE_949=m
+CONFIG_NLS_CODEPAGE_950=m
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_ISO8859_1=m
+CONFIG_NLS_ISO8859_13=m
+CONFIG_NLS_ISO8859_14=m
+CONFIG_NLS_ISO8859_15=m
+CONFIG_NLS_ISO8859_2=m
+CONFIG_NLS_ISO8859_3=m
+CONFIG_NLS_ISO8859_4=m
+CONFIG_NLS_ISO8859_5=m
+CONFIG_NLS_ISO8859_6=m
+CONFIG_NLS_ISO8859_7=m
+CONFIG_NLS_ISO8859_8=m
+CONFIG_NLS_ISO8859_9=m
+CONFIG_NLS_KOI8_R=m
+CONFIG_NLS_KOI8_U=m
+CONFIG_NLS_UTF8=m
+CONFIG_NOP_USB_XCEIV=m
+# CONFIG_NORTEL_HERMES is not set
+# CONFIG_NOZOMI is not set
+CONFIG_NO_HZ=y
+# CONFIG_NS83820 is not set
+# CONFIG_NTFS_DEBUG is not set
+CONFIG_NTFS_FS=m
+# CONFIG_NTFS_RW is not set
+# CONFIG_NVRAM is not set
+# CONFIG_OABI_COMPAT is not set
+# CONFIG_OCFS2_DEBUG_FS is not set
+CONFIG_OCFS2_DEBUG_MASKLOG=y
+CONFIG_OCFS2_FS=m
+CONFIG_OCFS2_FS_O2CB=m
+CONFIG_OCFS2_FS_POSIX_ACL=y
+CONFIG_OCFS2_FS_STATS=y
+CONFIG_OCFS2_FS_USERSPACE_CLUSTER=m
+CONFIG_OCF_BENCH=m
+# CONFIG_OCF_CRYPTOCTEON is not set
+# CONFIG_OCF_CRYPTODEV is not set
+CONFIG_OCF_CRYPTOSOFT=m
+CONFIG_OCF_EP80579=m
+CONFIG_OCF_HIFN=m
+# CONFIG_OCF_HIFNHIPP is not set
+# CONFIG_OCF_IXP4XX is not set
+CONFIG_OCF_OCF=y
+CONFIG_OCF_OCFNULL=m
+# CONFIG_OCF_RANDOMHARVEST is not set
+CONFIG_OCF_SAFE=m
+# CONFIG_OCF_TALITOS is not set
+CONFIG_OLD_BELKIN_DONGLE=m
+CONFIG_OMFS_FS=m
+CONFIG_OPROFILE=y
+CONFIG_OPROFILE_MRVL_PJ4=y
+CONFIG_OSF_PARTITION=y
+# CONFIG_OTUS is not set
+CONFIG_OUTER_CACHE=y
+CONFIG_P54_COMMON=m
+CONFIG_P54_LEDS=y
+CONFIG_P54_PCI=m
+CONFIG_P54_SPI=m
+CONFIG_P54_USB=m
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_PAGE_OFFSET=0xC0000000
+CONFIG_PANEL=m
+# CONFIG_PANEL_CHANGE_MESSAGE is not set
+CONFIG_PANEL_PARPORT=0
+CONFIG_PANEL_PROFILE=5
+CONFIG_PANIC_TIMEOUT=0
+CONFIG_PANTHERLORD_FF=y
+CONFIG_PARIDE=m
+CONFIG_PARIDE_ATEN=m
+CONFIG_PARIDE_BPCK=m
+CONFIG_PARIDE_BPCK6=m
+CONFIG_PARIDE_COMM=m
+CONFIG_PARIDE_DSTR=m
+CONFIG_PARIDE_EPAT=m
+# CONFIG_PARIDE_EPATC8 is not set
+CONFIG_PARIDE_EPIA=m
+CONFIG_PARIDE_FIT2=m
+CONFIG_PARIDE_FIT3=m
+CONFIG_PARIDE_FRIQ=m
+CONFIG_PARIDE_FRPW=m
+CONFIG_PARIDE_KBIC=m
+CONFIG_PARIDE_KTTI=m
+CONFIG_PARIDE_ON20=m
+CONFIG_PARIDE_ON26=m
+CONFIG_PARIDE_PCD=m
+CONFIG_PARIDE_PD=m
+CONFIG_PARIDE_PF=m
+CONFIG_PARIDE_PG=m
+CONFIG_PARIDE_PT=m
+CONFIG_PARPORT=m
+CONFIG_PARPORT_1284=y
+CONFIG_PARPORT_AX88796=m
+# CONFIG_PARPORT_GSC is not set
+CONFIG_PARPORT_NOT_PC=y
+CONFIG_PARPORT_PC=m
+CONFIG_PARPORT_PC_FIFO=y
+# CONFIG_PARPORT_PC_SUPERIO is not set
+# CONFIG_PARPORT_SERIAL is not set
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_PATA_ALI is not set
+# CONFIG_PATA_AMD is not set
+# CONFIG_PATA_ARTOP is not set
+# CONFIG_PATA_ATIIXP is not set
+# CONFIG_PATA_ATP867X is not set
+# CONFIG_PATA_CMD640_PCI is not set
+# CONFIG_PATA_CMD64X is not set
+# CONFIG_PATA_CS5520 is not set
+# CONFIG_PATA_CS5530 is not set
+# CONFIG_PATA_CYPRESS is not set
+# CONFIG_PATA_EFAR is not set
+# CONFIG_PATA_HPT366 is not set
+# CONFIG_PATA_HPT37X is not set
+# CONFIG_PATA_HPT3X2N is not set
+# CONFIG_PATA_HPT3X3 is not set
+# CONFIG_PATA_IT8213 is not set
+# CONFIG_PATA_IT821X is not set
+# CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_MARVELL is not set
+# CONFIG_PATA_MPIIX is not set
+# CONFIG_PATA_NETCELL is not set
+# CONFIG_PATA_NINJA32 is not set
+# CONFIG_PATA_NS87410 is not set
+# CONFIG_PATA_NS87415 is not set
+# CONFIG_PATA_OLDPIIX is not set
+# CONFIG_PATA_OPTI is not set
+# CONFIG_PATA_OPTIDMA is not set
+# CONFIG_PATA_PDC2027X is not set
+# CONFIG_PATA_PDC_OLD is not set
+# CONFIG_PATA_RADISYS is not set
+# CONFIG_PATA_RDC is not set
+# CONFIG_PATA_RZ1000 is not set
+# CONFIG_PATA_SC1200 is not set
+# CONFIG_PATA_SCH is not set
+# CONFIG_PATA_SERVERWORKS is not set
+# CONFIG_PATA_SIL680 is not set
+# CONFIG_PATA_SIS is not set
+# CONFIG_PATA_TRIFLEX is not set
+# CONFIG_PATA_VIA is not set
+# CONFIG_PATA_WINBOND is not set
+# CONFIG_PCCARD is not set
+CONFIG_PCF50633_ADC=m
+CONFIG_PCF50633_GPIO=m
+CONFIG_PCI=y
+CONFIG_PCIPCWATCHDOG=m
+CONFIG_PCI_ATMEL=m
+# CONFIG_PCI_DEBUG is not set
+# CONFIG_PCI_HERMES is not set
+# CONFIG_PCI_IOV is not set
+CONFIG_PCI_LEGACY=y
+CONFIG_PCI_QUIRKS=y
+# CONFIG_PCI_STUB is not set
+CONFIG_PCI_SYSCALL=y
+CONFIG_PCNET32=m
+CONFIG_PDA_POWER=m
+# CONFIG_PDC_ADMA is not set
+CONFIG_PHANTOM=m
+# CONFIG_PHONE is not set
+CONFIG_PHONET=m
+CONFIG_PHYLIB=y
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_PID_NS=y
+CONFIG_PLAN9AUTH=m
+CONFIG_PLAT_ORION=y
+CONFIG_PLIP=m
+# CONFIG_PLX_HERMES is not set
+CONFIG_PM=y
+CONFIG_PMIC_DA903X=y
+# CONFIG_PM_DEBUG is not set
+# CONFIG_PM_DISABLE_CONSOLE is not set
+# CONFIG_PM_RUNTIME is not set
+CONFIG_PM_SLEEP=y
+CONFIG_PM_STD_PARTITION=""
+# CONFIG_POCH is not set
+CONFIG_POHMELFS=m
+CONFIG_POHMELFS_CRYPTO=y
+# CONFIG_POHMELFS_DEBUG is not set
+CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
+CONFIG_POWER_SUPPLY=y
+# CONFIG_POWER_SUPPLY_DEBUG is not set
+# CONFIG_PPDEV is not set
+CONFIG_PPP=m
+CONFIG_PPPOATM=m
+CONFIG_PPPOE=m
+CONFIG_PPPOL2TP=m
+# CONFIG_PPPOLAC is not set
+# CONFIG_PPPOPNS is not set
+CONFIG_PPP_ASYNC=m
+CONFIG_PPP_BSDCOMP=m
+CONFIG_PPP_DEFLATE=m
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_MPPE=m
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPP_SYNC_TTY=m
+# CONFIG_PPS is not set
+# CONFIG_PREEMPT is not set
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_PRINTER is not set
+CONFIG_PRINTK=y
+CONFIG_PRINTK_TIME=y
+CONFIG_PRINT_QUOTA_WARNING=y
+# CONFIG_PRISM2_USB is not set
+CONFIG_PRISM54=m
+CONFIG_PROC_EVENTS=y
+CONFIG_PROC_FS=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_PROC_PID_CPUSET=y
+CONFIG_PROC_SYSCTL=y
+# CONFIG_PROFILE_ALL_BRANCHES is not set
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+CONFIG_PROFILING=y
+# CONFIG_PROVE_LOCKING is not set
+CONFIG_QFMT_V1=m
+CONFIG_QFMT_V2=m
+# CONFIG_QLA3XXX is not set
+# CONFIG_QLGE is not set
+CONFIG_QNX4FS_FS=m
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_QT2160 is not set
+CONFIG_QUOTA=y
+CONFIG_QUOTACTL=y
+CONFIG_QUOTA_NETLINK_INTERFACE=y
+CONFIG_QUOTA_TREE=m
+# CONFIG_R3964 is not set
+CONFIG_R6040=m
+# CONFIG_R8169 is not set
+CONFIG_RADIO_ADAPTERS=y
+CONFIG_RADIO_GEMTEK_PCI=m
+CONFIG_RADIO_MAESTRO=m
+CONFIG_RADIO_MAXIRADIO=m
+# CONFIG_RADIO_SI470X is not set
+# CONFIG_RADIO_SI4713 is not set
+CONFIG_RADIO_TEA5764=m
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_RAR_REGISTER is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_TRACE is not set
+# CONFIG_RDS is not set
+CONFIG_RD_BZIP2=y
+CONFIG_RD_GZIP=y
+CONFIG_RD_LZMA=y
+# CONFIG_REALTEK_PHY is not set
+CONFIG_REED_SOLOMON=m
+CONFIG_REED_SOLOMON_DEC16=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_AB3100=m
+CONFIG_REGULATOR_BQ24022=m
+# CONFIG_REGULATOR_DA903X is not set
+# CONFIG_REGULATOR_DEBUG is not set
+# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
+CONFIG_REGULATOR_LP3971=m
+CONFIG_REGULATOR_MAX1586=m
+# CONFIG_REGULATOR_PCAP is not set
+# CONFIG_REGULATOR_PCF50633 is not set
+# CONFIG_REGULATOR_TPS65023 is not set
+# CONFIG_REGULATOR_TPS6507X is not set
+# CONFIG_REGULATOR_TWL4030 is not set
+CONFIG_REGULATOR_USERSPACE_CONSUMER=m
+CONFIG_REGULATOR_VIRTUAL_CONSUMER=m
+# CONFIG_REGULATOR_WM8350 is not set
+# CONFIG_REGULATOR_WM8400 is not set
+# CONFIG_REISERFS_CHECK is not set
+CONFIG_REISERFS_FS=m
+CONFIG_REISERFS_FS_POSIX_ACL=y
+CONFIG_REISERFS_FS_SECURITY=y
+CONFIG_REISERFS_FS_XATTR=y
+# CONFIG_REISERFS_PROC_INFO is not set
+CONFIG_RELAY=y
+CONFIG_RESOURCE_COUNTERS=y
+CONFIG_RFD_FTL=m
+CONFIG_RFKILL=m
+CONFIG_RFKILL_INPUT=m
+CONFIG_RFKILL_LEDS=y
+# CONFIG_RFKILL_PM is not set
+CONFIG_RING_BUFFER=y
+CONFIG_RING_BUFFER_ALLOW_SWAP=y
+# CONFIG_RING_BUFFER_BENCHMARK is not set
+CONFIG_ROMFS_BACKED_BY_BLOCK=y
+# CONFIG_ROMFS_BACKED_BY_BOTH is not set
+# CONFIG_ROMFS_BACKED_BY_MTD is not set
+CONFIG_ROMFS_FS=m
+CONFIG_ROMFS_ON_BLOCK=y
+CONFIG_ROSE=m
+CONFIG_RPCSEC_GSS_KRB5=m
+CONFIG_RPCSEC_GSS_SPKM3=m
+CONFIG_RT2400PCI=m
+CONFIG_RT2500PCI=m
+CONFIG_RT2500USB=m
+CONFIG_RT2800USB=m
+CONFIG_RT2X00=m
+# CONFIG_RT2X00_DEBUG is not set
+CONFIG_RT2X00_LIB=m
+CONFIG_RT2X00_LIB_CRYPTO=y
+CONFIG_RT2X00_LIB_DEBUGFS=y
+CONFIG_RT2X00_LIB_FIRMWARE=y
+CONFIG_RT2X00_LIB_HT=y
+CONFIG_RT2X00_LIB_LEDS=y
+CONFIG_RT2X00_LIB_PCI=m
+CONFIG_RT2X00_LIB_USB=m
+CONFIG_RT61PCI=m
+CONFIG_RT73USB=m
+CONFIG_RTC_CLASS=y
+# CONFIG_RTC_DEBUG is not set
+CONFIG_RTC_DRV_AB3100=m
+CONFIG_RTC_DRV_BQ4802=m
+CONFIG_RTC_DRV_CMOS=m
+CONFIG_RTC_DRV_DS1286=m
+CONFIG_RTC_DRV_DS1305=m
+CONFIG_RTC_DRV_DS1307=m
+CONFIG_RTC_DRV_DS1374=m
+CONFIG_RTC_DRV_DS1390=m
+CONFIG_RTC_DRV_DS1511=m
+CONFIG_RTC_DRV_DS1553=m
+CONFIG_RTC_DRV_DS1672=m
+CONFIG_RTC_DRV_DS1742=m
+CONFIG_RTC_DRV_DS3234=m
+CONFIG_RTC_DRV_FM3130=m
+CONFIG_RTC_DRV_ISL1208=m
+CONFIG_RTC_DRV_M41T80=m
+CONFIG_RTC_DRV_M41T80_WDT=y
+CONFIG_RTC_DRV_M41T94=m
+CONFIG_RTC_DRV_M48T35=m
+CONFIG_RTC_DRV_M48T59=m
+CONFIG_RTC_DRV_M48T86=m
+CONFIG_RTC_DRV_MAX6900=m
+CONFIG_RTC_DRV_MAX6902=m
+CONFIG_RTC_DRV_MV=y
+# CONFIG_RTC_DRV_PCAP is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
+# CONFIG_RTC_DRV_PCF50633 is not set
+CONFIG_RTC_DRV_PCF8563=m
+CONFIG_RTC_DRV_PCF8583=m
+CONFIG_RTC_DRV_R9701=m
+CONFIG_RTC_DRV_RS5C348=m
+CONFIG_RTC_DRV_RS5C372=m
+CONFIG_RTC_DRV_RX8025=m
+CONFIG_RTC_DRV_RX8581=m
+CONFIG_RTC_DRV_S35390A=m
+CONFIG_RTC_DRV_STK17TA8=m
+# CONFIG_RTC_DRV_TEST is not set
+# CONFIG_RTC_DRV_TWL4030 is not set
+CONFIG_RTC_DRV_V3020=m
+# CONFIG_RTC_DRV_WM8350 is not set
+CONFIG_RTC_DRV_X1205=m
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_INTF_ALARM is not set
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_LIB=y
+CONFIG_RTL8180=m
+CONFIG_RTL8187=m
+# CONFIG_RTL8187SE is not set
+CONFIG_RTL8187_LEDS=y
+# CONFIG_RTL8192E is not set
+# CONFIG_RTL8192SU is not set
+CONFIG_RT_GROUP_SCHED=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_RT_MUTEX_TESTER is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_RXKAD=m
+# CONFIG_S2IO is not set
+# CONFIG_SAMPLES is not set
+CONFIG_SATA_AHCI=m
+CONFIG_SATA_DEBUG_ON_ERROR=y
+# CONFIG_SATA_FULL_DEBUG is not set
+# CONFIG_SATA_INIC162X is not set
+CONFIG_SATA_MV=y
+# CONFIG_SATA_NO_DEBUG is not set
+# CONFIG_SATA_NV is not set
+CONFIG_SATA_PMP=y
+# CONFIG_SATA_PROMISE is not set
+# CONFIG_SATA_QSTOR is not set
+# CONFIG_SATA_SIL is not set
+# CONFIG_SATA_SIL24 is not set
+# CONFIG_SATA_SIS is not set
+# CONFIG_SATA_SVW is not set
+# CONFIG_SATA_SX4 is not set
+# CONFIG_SATA_ULI is not set
+# CONFIG_SATA_VIA is not set
+# CONFIG_SATA_VITESSE is not set
+CONFIG_SC92031=m
+CONFIG_SCHEDSTATS=y
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHED_TRACER is not set
+CONFIG_SCSI=y
+# CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_AIC94XX is not set
+# CONFIG_SCSI_ARCMSR is not set
+# CONFIG_SCSI_BFA_FC is not set
+# CONFIG_SCSI_BNX2_ISCSI is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_CXGB3_ISCSI is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_DH is not set
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_ENCLOSURE is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_HPTIOP is not set
+# CONFIG_SCSI_IMM is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_IPR is not set
+# CONFIG_SCSI_IPS is not set
+CONFIG_SCSI_ISCSITARGET=m
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_LOGGING is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_SCSI_LPFC is not set
+# CONFIG_SCSI_MPT2SAS is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_MVSAS is not set
+CONFIG_SCSI_MVSATA=y
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_SCSI_NSP32 is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+# CONFIG_SCSI_PMCRAID is not set
+# CONFIG_SCSI_PPA is not set
+# CONFIG_SCSI_PROC_FS is not set
+# CONFIG_SCSI_QLA_FC is not set
+# CONFIG_SCSI_QLA_ISCSI is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_SRP is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+# CONFIG_SCSI_STEX is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
+# CONFIG_SCSI_TGT is not set
+CONFIG_SCSI_WAIT_SCAN=m
+# CONFIG_SCTP_DBG_MSG is not set
+# CONFIG_SCTP_DBG_OBJCNT is not set
+CONFIG_SCTP_HMAC_MD5=y
+# CONFIG_SCTP_HMAC_NONE is not set
+# CONFIG_SCTP_HMAC_SHA1 is not set
+# CONFIG_SDIO_UART is not set
+CONFIG_SECURITY=y
+CONFIG_SECURITYFS=y
+CONFIG_SECURITY_APPARMOR=y
+CONFIG_SECURITY_APPARMOR_BOOTPARAM_VALUE=1
+CONFIG_SECURITY_APPARMOR_COMPAT_24=y
+CONFIG_SECURITY_FILE_CAPABILITIES=y
+CONFIG_SECURITY_NETWORK=y
+# CONFIG_SECURITY_NETWORK_XFRM is not set
+CONFIG_SECURITY_PATH=y
+# CONFIG_SECURITY_ROOTPLUG is not set
+CONFIG_SECURITY_SELINUX=y
+CONFIG_SECURITY_SELINUX_AVC_STATS=y
+# CONFIG_SECURITY_SELINUX_BOOTPARAM is not set
+CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1
+CONFIG_SECURITY_SELINUX_DEVELOP=y
+# CONFIG_SECURITY_SELINUX_DISABLE is not set
+# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set
+CONFIG_SECURITY_SMACK=y
+CONFIG_SECURITY_TOMOYO=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_SENSORS_AD7414=m
+CONFIG_SENSORS_AD7418=m
+CONFIG_SENSORS_ADCXX=m
+CONFIG_SENSORS_ADM1021=m
+CONFIG_SENSORS_ADM1025=m
+CONFIG_SENSORS_ADM1026=m
+CONFIG_SENSORS_ADM1029=m
+CONFIG_SENSORS_ADM1031=m
+CONFIG_SENSORS_ADM9240=m
+CONFIG_SENSORS_ADS7828=m
+CONFIG_SENSORS_ADT7462=m
+CONFIG_SENSORS_ADT7470=m
+CONFIG_SENSORS_ADT7473=m
+CONFIG_SENSORS_ADT7475=m
+CONFIG_SENSORS_ATXP1=m
+CONFIG_SENSORS_DME1737=m
+CONFIG_SENSORS_DOVE=y
+CONFIG_SENSORS_DS1621=m
+CONFIG_SENSORS_F71805F=m
+CONFIG_SENSORS_F71882FG=m
+CONFIG_SENSORS_F75375S=m
+CONFIG_SENSORS_G760A=m
+CONFIG_SENSORS_GL518SM=m
+CONFIG_SENSORS_GL520SM=m
+CONFIG_SENSORS_I5K_AMB=m
+CONFIG_SENSORS_IT87=m
+CONFIG_SENSORS_LIS3_SPI=m
+CONFIG_SENSORS_LM63=m
+CONFIG_SENSORS_LM70=m
+CONFIG_SENSORS_LM75=m
+CONFIG_SENSORS_LM77=m
+CONFIG_SENSORS_LM78=m
+CONFIG_SENSORS_LM80=m
+CONFIG_SENSORS_LM83=m
+CONFIG_SENSORS_LM85=m
+CONFIG_SENSORS_LM87=m
+CONFIG_SENSORS_LM90=m
+CONFIG_SENSORS_LM92=m
+CONFIG_SENSORS_LM93=m
+CONFIG_SENSORS_LM95241=m
+CONFIG_SENSORS_LTC4215=m
+CONFIG_SENSORS_LTC4245=m
+CONFIG_SENSORS_MAX1111=m
+CONFIG_SENSORS_MAX1619=m
+CONFIG_SENSORS_MAX6650=m
+CONFIG_SENSORS_PC87360=m
+CONFIG_SENSORS_PC87427=m
+CONFIG_SENSORS_PCF8591=m
+CONFIG_SENSORS_SHT15=m
+CONFIG_SENSORS_SIS5595=m
+CONFIG_SENSORS_SMSC47B397=m
+CONFIG_SENSORS_SMSC47M1=m
+CONFIG_SENSORS_SMSC47M192=m
+CONFIG_SENSORS_THMC50=m
+CONFIG_SENSORS_TMP401=m
+# CONFIG_SENSORS_TMP421 is not set
+CONFIG_SENSORS_TSL2550=m
+CONFIG_SENSORS_VIA686A=m
+CONFIG_SENSORS_VT1211=m
+CONFIG_SENSORS_VT8231=m
+CONFIG_SENSORS_W83627EHF=m
+CONFIG_SENSORS_W83627HF=m
+CONFIG_SENSORS_W83781D=m
+CONFIG_SENSORS_W83791D=m
+CONFIG_SENSORS_W83792D=m
+CONFIG_SENSORS_W83793=m
+CONFIG_SENSORS_W83L785TS=m
+CONFIG_SENSORS_W83L786NG=m
+# CONFIG_SENSORS_WM8350 is not set
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+# CONFIG_SERIAL_8250_EXTENDED is not set
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_PCI=y
+CONFIG_SERIAL_8250_RUNTIME_UARTS=2
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+# CONFIG_SERIAL_MAX3100 is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+CONFIG_SERIO=m
+CONFIG_SERIO_LIBPS2=m
+CONFIG_SERIO_PARKBD=m
+CONFIG_SERIO_PCIPS2=m
+CONFIG_SERIO_RAW=m
+CONFIG_SERIO_SERPORT=m
+# CONFIG_SFC is not set
+CONFIG_SGI_IOC4=m
+CONFIG_SGI_PARTITION=y
+CONFIG_SHMEM=y
+CONFIG_SIGMATEL_FIR=m
+CONFIG_SIGNALFD=y
+# CONFIG_SIS190 is not set
+CONFIG_SIS900=m
+# CONFIG_SKGE is not set
+CONFIG_SKY2=y
+# CONFIG_SKY2_DEBUG is not set
+CONFIG_SLAB=y
+CONFIG_SLABINFO=y
+CONFIG_SLHC=m
+CONFIG_SLIP=m
+CONFIG_SLIP_COMPRESSED=y
+CONFIG_SLIP_MODE_SLIP6=y
+CONFIG_SLIP_SMART=y
+# CONFIG_SLOB is not set
+CONFIG_SLOW_WORK=y
+# CONFIG_SLOW_WORK_DEBUG is not set
+# CONFIG_SLUB is not set
+CONFIG_SMARTJOYPLUS_FF=y
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+# CONFIG_SMC911X is not set
+# CONFIG_SMC91X is not set
+# CONFIG_SMSC911X is not set
+CONFIG_SMSC9420=m
+CONFIG_SMSC_PHY=m
+# CONFIG_SMS_SIANO_MDTV is not set
+CONFIG_SND=y
+CONFIG_SND_AC97_CODEC=y
+# CONFIG_SND_AC97_POWER_SAVE is not set
+# CONFIG_SND_AD1889 is not set
+# CONFIG_SND_ALI5451 is not set
+# CONFIG_SND_ALS300 is not set
+CONFIG_SND_ARM=y
+# CONFIG_SND_ATIIXP is not set
+# CONFIG_SND_ATIIXP_MODEM is not set
+# CONFIG_SND_AU8810 is not set
+# CONFIG_SND_AU8820 is not set
+# CONFIG_SND_AU8830 is not set
+# CONFIG_SND_AW2 is not set
+# CONFIG_SND_AZT3328 is not set
+# CONFIG_SND_BT87X is not set
+# CONFIG_SND_CA0106 is not set
+# CONFIG_SND_CMIPCI is not set
+# CONFIG_SND_CS4281 is not set
+# CONFIG_SND_CS46XX is not set
+# CONFIG_SND_CS5535AUDIO is not set
+# CONFIG_SND_CTXFI is not set
+# CONFIG_SND_DARLA20 is not set
+# CONFIG_SND_DARLA24 is not set
+# CONFIG_SND_DEBUG is not set
+CONFIG_SND_DOVE_AC97=y
+CONFIG_SND_DOVE_SOC_AC97_AVD1=y
+CONFIG_SND_DOVE_SOC_DB=y
+CONFIG_SND_DOVE_SOC_DB_B=y
+CONFIG_SND_DOVE_SOC_MRVL_AUDIO=y
+CONFIG_SND_DRIVERS=y
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_DYNAMIC_MINORS is not set
+# CONFIG_SND_ECHO3G is not set
+# CONFIG_SND_EMU10K1 is not set
+# CONFIG_SND_EMU10K1X is not set
+# CONFIG_SND_EMU10K1_SEQ is not set
+# CONFIG_SND_ENS1370 is not set
+# CONFIG_SND_ENS1371 is not set
+# CONFIG_SND_ES1938 is not set
+# CONFIG_SND_ES1968 is not set
+# CONFIG_SND_FM801 is not set
+# CONFIG_SND_GINA20 is not set
+# CONFIG_SND_GINA24 is not set
+# CONFIG_SND_HDA_INTEL is not set
+# CONFIG_SND_HDSP is not set
+# CONFIG_SND_HDSPM is not set
+# CONFIG_SND_HIFIER is not set
+# CONFIG_SND_HRTIMER is not set
+CONFIG_SND_HWDEP=m
+# CONFIG_SND_ICE1712 is not set
+# CONFIG_SND_ICE1724 is not set
+# CONFIG_SND_INDIGO is not set
+# CONFIG_SND_INDIGODJ is not set
+# CONFIG_SND_INDIGODJX is not set
+# CONFIG_SND_INDIGOIO is not set
+# CONFIG_SND_INDIGOIOX is not set
+# CONFIG_SND_INTEL8X0 is not set
+# CONFIG_SND_INTEL8X0M is not set
+CONFIG_SND_JACK=y
+# CONFIG_SND_KORG1212 is not set
+# CONFIG_SND_LAYLA20 is not set
+# CONFIG_SND_LAYLA24 is not set
+# CONFIG_SND_LX6464ES is not set
+# CONFIG_SND_MAESTRO3 is not set
+# CONFIG_SND_MIA is not set
+# CONFIG_SND_MIXART is not set
+CONFIG_SND_MIXER_OSS=m
+# CONFIG_SND_MONA is not set
+# CONFIG_SND_MPU401 is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_MTS64 is not set
+# CONFIG_SND_NM256 is not set
+# CONFIG_SND_OPL3_LIB_SEQ is not set
+# CONFIG_SND_OPL4_LIB_SEQ is not set
+CONFIG_SND_OSSEMUL=y
+# CONFIG_SND_OXYGEN is not set
+CONFIG_SND_PCI=y
+CONFIG_SND_PCM=y
+CONFIG_SND_PCM_OSS=m
+CONFIG_SND_PCM_OSS_PLUGINS=y
+# CONFIG_SND_PCXHR is not set
+# CONFIG_SND_PORTMAN2X4 is not set
+CONFIG_SND_PXA2XX_LIB=y
+CONFIG_SND_PXA2XX_LIB_AC97=y
+CONFIG_SND_PXA2XX_SOC=y
+CONFIG_SND_PXA2XX_SOC_AC97=y
+CONFIG_SND_PXA2XX_SOC_AC97_SURROUND=y
+CONFIG_SND_RAWMIDI=m
+# CONFIG_SND_RAWMIDI_SEQ is not set
+# CONFIG_SND_RIPTIDE is not set
+# CONFIG_SND_RME32 is not set
+# CONFIG_SND_RME96 is not set
+# CONFIG_SND_RME9652 is not set
+# CONFIG_SND_SBAWE_SEQ is not set
+# CONFIG_SND_SEQUENCER is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+CONFIG_SND_SOC=y
+CONFIG_SND_SOC_AC97_BUS=y
+CONFIG_SND_SOC_AD1980=y
+# CONFIG_SND_SOC_ALL_CODECS is not set
+CONFIG_SND_SOC_AC97_CODEC=y
+CONFIG_SND_SOC_CS42L51=y
+CONFIG_SND_SOC_I2C_AND_SPI=y
+CONFIG_SND_SOC_RT5610=y
+CONFIG_SND_SOC_RT5630=y
+# CONFIG_SND_SONICVIBES is not set
+CONFIG_SND_SPI=y
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_TIMER=y
+# CONFIG_SND_TRIDENT is not set
+CONFIG_SND_USB=y
+CONFIG_SND_USB_AUDIO=m
+CONFIG_SND_USB_CAIAQ=m
+CONFIG_SND_USB_CAIAQ_INPUT=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VIA82XX is not set
+# CONFIG_SND_VIA82XX_MODEM is not set
+# CONFIG_SND_VIRTUOSO is not set
+CONFIG_SND_VMASTER=y
+# CONFIG_SND_VX222 is not set
+# CONFIG_SND_YMFPCI is not set
+CONFIG_SOC_CAMERA=m
+CONFIG_SOC_CAMERA_MT9M001=m
+CONFIG_SOC_CAMERA_MT9M111=m
+CONFIG_SOC_CAMERA_MT9T031=m
+CONFIG_SOC_CAMERA_MT9V022=m
+CONFIG_SOC_CAMERA_OV772X=m
+CONFIG_SOC_CAMERA_PLATFORM=m
+CONFIG_SOC_CAMERA_TW9910=m
+CONFIG_SOFT_WATCHDOG=m
+CONFIG_SOLARIS_X86_PARTITION=y
+CONFIG_SOUND=y
+CONFIG_SOUND_OSS_CORE=y
+CONFIG_SOUND_OSS_CORE_PRECLAIM=y
+CONFIG_SOUND_PRIME=y
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_SPI=y
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_BUTTERFLY is not set
+# CONFIG_SPI_DEBUG is not set
+# CONFIG_SPI_GPIO is not set
+# CONFIG_SPI_LM70_LLP is not set
+CONFIG_SPI_MASTER=y
+CONFIG_SPI_MV=y
+CONFIG_SPI_ORION=y
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_SQUASHFS=m
+# CONFIG_SQUASHFS_EMBEDDED is not set
+CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
+CONFIG_SR_REPORT_TIME_LIMIT=100
+CONFIG_SSB=m
+CONFIG_SSB_B43_PCI_BRIDGE=y
+# CONFIG_SSB_DEBUG is not set
+CONFIG_SSB_DRIVER_PCICORE=y
+CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
+CONFIG_SSB_PCIHOST=y
+CONFIG_SSB_PCIHOST_POSSIBLE=y
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB_SDIOHOST is not set
+CONFIG_SSB_SDIOHOST_POSSIBLE=y
+CONFIG_SSB_SPROM=y
+CONFIG_SSFDC=m
+CONFIG_STACKTRACE_SUPPORT=y
+# CONFIG_STACK_TRACER is not set
+CONFIG_STAGING=y
+# CONFIG_STAGING_EXCLUDE_BUILD is not set
+CONFIG_STANDALONE=y
+# CONFIG_STE10XP is not set
+CONFIG_STP=m
+# CONFIG_STRIP_ASM_SYMS is not set
+CONFIG_SUNDANCE=m
+# CONFIG_SUNDANCE_MMIO is not set
+# CONFIG_SUNGEM is not set
+CONFIG_SUNRPC=m
+CONFIG_SUNRPC_GSS=m
+CONFIG_SUN_PARTITION=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+CONFIG_SWAP=y
+CONFIG_SWITCH=y
+CONFIG_SWITCH_GPIO=y
+CONFIG_SYN_COOKIES=y
+CONFIG_SYSCTL=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_SYSFS=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+CONFIG_SYSV68_PARTITION=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_SYSV_FS=m
+# CONFIG_SYS_HYPERVISOR is not set
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_TABLET_USB_ACECAD=m
+CONFIG_TABLET_USB_AIPTEK=m
+CONFIG_TABLET_USB_GTCO=m
+CONFIG_TABLET_USB_KBTAB=m
+CONFIG_TABLET_USB_WACOM=m
+CONFIG_TASKSTATS=y
+# CONFIG_TASK_DELAY_ACCT is not set
+# CONFIG_TASK_XACCT is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_TCP_CONG_ADVANCED=y
+CONFIG_TCP_CONG_BIC=m
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_TCP_CONG_HSTCP=m
+CONFIG_TCP_CONG_HTCP=m
+CONFIG_TCP_CONG_HYBLA=m
+CONFIG_TCP_CONG_ILLINOIS=m
+CONFIG_TCP_CONG_LP=m
+CONFIG_TCP_CONG_SCALABLE=m
+CONFIG_TCP_CONG_VEGAS=m
+CONFIG_TCP_CONG_VENO=m
+CONFIG_TCP_CONG_WESTWOOD=m
+CONFIG_TCP_CONG_YEAH=m
+CONFIG_TCP_MD5SIG=y
+# CONFIG_TEHUTI is not set
+CONFIG_TEKRAM_DONGLE=m
+CONFIG_TEXTSEARCH=y
+CONFIG_TEXTSEARCH_BM=m
+CONFIG_TEXTSEARCH_FSM=m
+CONFIG_TEXTSEARCH_KMP=m
+CONFIG_THERMAL=m
+CONFIG_THERMAL_HWMON=y
+CONFIG_THRUSTMASTER_FF=y
+# CONFIG_THUMB2_KERNEL is not set
+CONFIG_TICK_ONESHOT=y
+# CONFIG_TIFM_CORE is not set
+# CONFIG_TIGON3 is not set
+CONFIG_TIMERFD=y
+CONFIG_TIMER_STATS=y
+CONFIG_TIPC=m
+# CONFIG_TIPC_ADVANCED is not set
+# CONFIG_TIPC_DEBUG is not set
+CONFIG_TLAN=m
+# CONFIG_TMD_HERMES is not set
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+# CONFIG_TOIM3232_DONGLE is not set
+# CONFIG_TOSHIBA_FIR is not set
+CONFIG_TOUCHSCREEN_AD7877=m
+CONFIG_TOUCHSCREEN_AD7879=m
+CONFIG_TOUCHSCREEN_AD7879_I2C=m
+CONFIG_TOUCHSCREEN_ADS7846=y
+CONFIG_TOUCHSCREEN_DA9034=y
+CONFIG_TOUCHSCREEN_EETI=m
+CONFIG_TOUCHSCREEN_ELO=m
+CONFIG_TOUCHSCREEN_FUJITSU=m
+CONFIG_TOUCHSCREEN_GUNZE=m
+CONFIG_TOUCHSCREEN_INEXIO=m
+# CONFIG_TOUCHSCREEN_MCS5000 is not set
+CONFIG_TOUCHSCREEN_MK712=m
+CONFIG_TOUCHSCREEN_MTOUCH=m
+# CONFIG_TOUCHSCREEN_PCAP is not set
+CONFIG_TOUCHSCREEN_PENMOUNT=m
+CONFIG_TOUCHSCREEN_RT5611=y
+# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI is not set
+CONFIG_TOUCHSCREEN_TOUCHIT213=m
+CONFIG_TOUCHSCREEN_TOUCHRIGHT=m
+CONFIG_TOUCHSCREEN_TOUCHWIN=m
+CONFIG_TOUCHSCREEN_TSC2005=y
+CONFIG_TOUCHSCREEN_TSC2007=m
+# CONFIG_TOUCHSCREEN_UCB1400 is not set
+CONFIG_TOUCHSCREEN_USB_3M=y
+CONFIG_TOUCHSCREEN_USB_COMPOSITE=m
+CONFIG_TOUCHSCREEN_USB_DMC_TSC10=y
+CONFIG_TOUCHSCREEN_USB_E2I=y
+CONFIG_TOUCHSCREEN_USB_EGALAX=y
+CONFIG_TOUCHSCREEN_USB_ETURBO=y
+CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH=y
+CONFIG_TOUCHSCREEN_USB_GOTOP=y
+CONFIG_TOUCHSCREEN_USB_GUNZE=y
+CONFIG_TOUCHSCREEN_USB_IDEALTEK=y
+CONFIG_TOUCHSCREEN_USB_IRTOUCH=y
+CONFIG_TOUCHSCREEN_USB_ITM=y
+CONFIG_TOUCHSCREEN_USB_JASTEC=y
+CONFIG_TOUCHSCREEN_USB_PANJIT=y
+CONFIG_TOUCHSCREEN_W90X900=m
+CONFIG_TOUCHSCREEN_WACOM_W8001=m
+CONFIG_TOUCHSCREEN_WM9705=y
+CONFIG_TOUCHSCREEN_WM9712=y
+CONFIG_TOUCHSCREEN_WM9713=y
+CONFIG_TOUCHSCREEN_WM97XX=m
+CONFIG_TPS65010=m
+# CONFIG_TR is not set
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_TRACING_SUPPORT=y
+CONFIG_TRANZPORT=m
+# CONFIG_TREE_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_RCU_TRACE is not set
+CONFIG_TTPCI_EEPROM=m
+CONFIG_TUN=m
+CONFIG_TWL4030_CORE=y
+# CONFIG_TWL4030_POWER is not set
+# CONFIG_TWL4030_WATCHDOG is not set
+CONFIG_TYPHOON=m
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+CONFIG_UBIFS_FS=m
+CONFIG_UBIFS_FS_ADVANCED_COMPR=y
+# CONFIG_UBIFS_FS_DEBUG is not set
+CONFIG_UBIFS_FS_LZO=y
+CONFIG_UBIFS_FS_XATTR=y
+CONFIG_UBIFS_FS_ZLIB=y
+CONFIG_UCB1400_CORE=m
+CONFIG_UDF_FS=m
+CONFIG_UDF_NLS=y
+CONFIG_UEVENT_HELPER_PATH=""
+# CONFIG_UFS_DEBUG is not set
+CONFIG_UFS_FS=m
+# CONFIG_UFS_FS_WRITE is not set
+CONFIG_UID16=y
+# CONFIG_UID_STAT is not set
+CONFIG_UIO=y
+# CONFIG_UIO_AEC is not set
+# CONFIG_UIO_CIF is not set
+CONFIG_UIO_VMETA=y
+# CONFIG_UIO_VMETA_POLLING_MODE is not set
+CONFIG_UIO_DOVE_VMETA_MEM_SIZE=96
+# CONFIG_UIO_PCI_GENERIC is not set
+CONFIG_UIO_PDRV=y
+CONFIG_UIO_PDRV_GENIRQ=m
+CONFIG_UIO_SERCOS3=m
+CONFIG_UIO_SMX=m
+CONFIG_ULTRIX_PARTITION=y
+CONFIG_UNIX=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIXWARE_DISKLABEL=y
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_USB=y
+CONFIG_USBPCWATCHDOG=m
+CONFIG_USB_ACM=m
+CONFIG_USB_ADUTUX=m
+CONFIG_USB_ALI_M5632=y
+CONFIG_USB_AN2720=y
+# CONFIG_USB_ANDROID is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+CONFIG_USB_APPLEDISPLAY=m
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARMLINUX=y
+CONFIG_USB_ATM=m
+CONFIG_USB_AUDIO=m
+CONFIG_USB_BELKIN=y
+CONFIG_USB_BERRY_CHARGE=m
+CONFIG_USB_C67X00_HCD=m
+CONFIG_USB_CATC=m
+CONFIG_USB_CDC_COMPOSITE=m
+CONFIG_USB_CDC_PHONET=m
+CONFIG_USB_CXACRU=m
+CONFIG_USB_CYPRESS_CY7C63=m
+CONFIG_USB_CYTHERM=m
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_DEVICEFS is not set
+# CONFIG_USB_DEVICE_CLASS is not set
+CONFIG_USB_DSBR=m
+# CONFIG_USB_DYNAMIC_MINORS is not set
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+CONFIG_USB_EHCI_TT_NEWSCHED=y
+CONFIG_USB_EMI26=m
+CONFIG_USB_EMI62=m
+CONFIG_USB_EPSON2888=y
+CONFIG_USB_ET61X251=m
+CONFIG_USB_ETH=m
+# CONFIG_USB_ETH_EEM is not set
+CONFIG_USB_ETH_RNDIS=y
+CONFIG_USB_EZUSB=y
+CONFIG_USB_FILE_STORAGE=m
+CONFIG_USB_FILE_STORAGE_TEST=y
+CONFIG_USB_FTDI_ELAN=m
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGETFS=m
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_CI13XXX is not set
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+# CONFIG_USB_GADGET_DEBUG_FS is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+# CONFIG_USB_GADGET_FSL_QE is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_IMX is not set
+# CONFIG_USB_GADGET_LANGWELL is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_M66592 is not set
+CONFIG_USB_GADGET_MRVL=y
+# CONFIG_USB_GADGET_MUSB_HDRC is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_PXA25X is not set
+# CONFIG_USB_GADGET_PXA27X is not set
+# CONFIG_USB_GADGET_R8A66597 is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_S3C_HSOTG is not set
+CONFIG_USB_GADGET_SELECTED=y
+CONFIG_USB_GADGET_VBUS_DRAW=2
+# CONFIG_USB_GL860 is not set
+# CONFIG_USB_GPIO_VBUS is not set
+CONFIG_USB_GSPCA=m
+CONFIG_USB_GSPCA_CONEX=m
+CONFIG_USB_GSPCA_ETOMS=m
+CONFIG_USB_GSPCA_FINEPIX=m
+# CONFIG_USB_GSPCA_JEILINJ is not set
+CONFIG_USB_GSPCA_MARS=m
+CONFIG_USB_GSPCA_MR97310A=m
+CONFIG_USB_GSPCA_OV519=m
+CONFIG_USB_GSPCA_OV534=m
+CONFIG_USB_GSPCA_PAC207=m
+CONFIG_USB_GSPCA_PAC7311=m
+CONFIG_USB_GSPCA_SN9C20X=m
+CONFIG_USB_GSPCA_SN9C20X_EVDEV=y
+CONFIG_USB_GSPCA_SONIXB=m
+CONFIG_USB_GSPCA_SONIXJ=m
+CONFIG_USB_GSPCA_SPCA500=m
+CONFIG_USB_GSPCA_SPCA501=m
+CONFIG_USB_GSPCA_SPCA505=m
+CONFIG_USB_GSPCA_SPCA506=m
+CONFIG_USB_GSPCA_SPCA508=m
+CONFIG_USB_GSPCA_SPCA561=m
+CONFIG_USB_GSPCA_SQ905=m
+CONFIG_USB_GSPCA_SQ905C=m
+CONFIG_USB_GSPCA_STK014=m
+CONFIG_USB_GSPCA_SUNPLUS=m
+CONFIG_USB_GSPCA_T613=m
+CONFIG_USB_GSPCA_TV8532=m
+CONFIG_USB_GSPCA_VC032X=m
+CONFIG_USB_GSPCA_ZC3XX=m
+# CONFIG_USB_G_PRINTER is not set
+CONFIG_USB_G_SERIAL=m
+CONFIG_USB_HID=m
+CONFIG_USB_HIDDEV=y
+CONFIG_USB_HSO=m
+CONFIG_USB_HWA_HCD=m
+# CONFIG_USB_IBMCAM is not set
+CONFIG_USB_IDMOUSE=m
+CONFIG_USB_IOWARRIOR=m
+CONFIG_USB_IP_COMMON=m
+CONFIG_USB_IP_HOST=m
+CONFIG_USB_IP_VHCI_HCD=m
+CONFIG_USB_IRDA=m
+CONFIG_USB_ISIGHTFW=m
+CONFIG_USB_ISP116X_HCD=m
+# CONFIG_USB_ISP1362_HCD is not set
+CONFIG_USB_ISP1760_HCD=m
+CONFIG_USB_KAWETH=m
+CONFIG_USB_KC2190=y
+# CONFIG_USB_KONICAWC is not set
+CONFIG_USB_LCD=m
+CONFIG_USB_LD=m
+CONFIG_USB_LED=m
+CONFIG_USB_LEGOTOWER=m
+# CONFIG_USB_LIBUSUAL is not set
+CONFIG_USB_M5602=m
+CONFIG_USB_MDC800=m
+CONFIG_USB_MICROTEK=m
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_MON is not set
+CONFIG_USB_MR800=m
+CONFIG_USB_MRVL=y
+# CONFIG_USB_MUSB_HDRC is not set
+CONFIG_USB_NET_AX8817X=m
+CONFIG_USB_NET_CDCETHER=m
+CONFIG_USB_NET_CDC_EEM=m
+CONFIG_USB_NET_CDC_SUBSET=m
+CONFIG_USB_NET_DM9601=m
+CONFIG_USB_NET_GL620A=m
+CONFIG_USB_NET_INT51X1=m
+CONFIG_USB_NET_MCS7830=m
+CONFIG_USB_NET_NET1080=m
+CONFIG_USB_NET_PLUSB=m
+CONFIG_USB_NET_RNDIS_HOST=m
+CONFIG_USB_NET_RNDIS_WLAN=m
+CONFIG_USB_NET_SMSC95XX=m
+CONFIG_USB_NET_ZAURUS=m
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_HCD=m
+# CONFIG_USB_OHCI_HCD_SSB is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_OTG is not set
+CONFIG_USB_OTG_UTILS=y
+# CONFIG_USB_OV511 is not set
+CONFIG_USB_OXU210HP_HCD=m
+CONFIG_USB_PEGASUS=m
+CONFIG_USB_PRINTER=m
+# CONFIG_USB_PWC is not set
+CONFIG_USB_PWC_INPUT_EVDEV=y
+# CONFIG_USB_QUICKCAM_MESSENGER is not set
+CONFIG_USB_R8A66597_HCD=m
+CONFIG_USB_RIO500=m
+CONFIG_USB_RTL8150=m
+CONFIG_USB_S2255=m
+# CONFIG_USB_SE401 is not set
+CONFIG_USB_SERIAL=m
+CONFIG_USB_SERIAL_AIRCABLE=m
+CONFIG_USB_SERIAL_ARK3116=m
+CONFIG_USB_SERIAL_BELKIN=m
+CONFIG_USB_SERIAL_CH341=m
+CONFIG_USB_SERIAL_CP210X=m
+CONFIG_USB_SERIAL_CYBERJACK=m
+CONFIG_USB_SERIAL_CYPRESS_M8=m
+# CONFIG_USB_SERIAL_DEBUG is not set
+CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
+CONFIG_USB_SERIAL_EDGEPORT=m
+CONFIG_USB_SERIAL_EDGEPORT_TI=m
+CONFIG_USB_SERIAL_EMPEG=m
+CONFIG_USB_SERIAL_FTDI_SIO=m
+CONFIG_USB_SERIAL_FUNSOFT=m
+CONFIG_USB_SERIAL_GARMIN=m
+CONFIG_USB_SERIAL_GENERIC=y
+CONFIG_USB_SERIAL_HP4X=m
+CONFIG_USB_SERIAL_IPAQ=m
+CONFIG_USB_SERIAL_IPW=m
+# CONFIG_USB_SERIAL_IR is not set
+CONFIG_USB_SERIAL_IUU=m
+CONFIG_USB_SERIAL_KEYSPAN=m
+CONFIG_USB_SERIAL_KEYSPAN_MPR=y
+CONFIG_USB_SERIAL_KEYSPAN_PDA=m
+CONFIG_USB_SERIAL_KEYSPAN_USA18X=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19W=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28X=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y
+CONFIG_USB_SERIAL_KEYSPAN_USA49W=y
+CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y
+CONFIG_USB_SERIAL_KLSI=m
+CONFIG_USB_SERIAL_KOBIL_SCT=m
+CONFIG_USB_SERIAL_MCT_U232=m
+CONFIG_USB_SERIAL_MOS7720=m
+CONFIG_USB_SERIAL_MOS7840=m
+CONFIG_USB_SERIAL_MOTOROLA=m
+CONFIG_USB_SERIAL_NAVMAN=m
+CONFIG_USB_SERIAL_OMNINET=m
+CONFIG_USB_SERIAL_OPTICON=m
+CONFIG_USB_SERIAL_OPTION=m
+CONFIG_USB_SERIAL_OTI6858=m
+CONFIG_USB_SERIAL_PL2303=m
+CONFIG_USB_SERIAL_QUALCOMM=m
+# CONFIG_USB_SERIAL_QUATECH2 is not set
+# CONFIG_USB_SERIAL_QUATECH_USB2 is not set
+CONFIG_USB_SERIAL_SAFE=m
+# CONFIG_USB_SERIAL_SAFE_PADDED is not set
+CONFIG_USB_SERIAL_SIEMENS_MPI=m
+CONFIG_USB_SERIAL_SIERRAWIRELESS=m
+CONFIG_USB_SERIAL_SPCP8X5=m
+CONFIG_USB_SERIAL_SYMBOL=m
+CONFIG_USB_SERIAL_TI=m
+CONFIG_USB_SERIAL_VISOR=m
+CONFIG_USB_SERIAL_WHITEHEAT=m
+CONFIG_USB_SERIAL_XIRCOM=m
+CONFIG_USB_SEVSEG=m
+CONFIG_USB_SISUSBVGA=m
+# CONFIG_USB_SISUSBVGA_CON is not set
+CONFIG_USB_SL811_HCD=m
+CONFIG_USB_SN9C102=m
+CONFIG_USB_SPEEDTOUCH=m
+CONFIG_USB_STKWEBCAM=m
+CONFIG_USB_STORAGE=y
+CONFIG_USB_STORAGE_ALAUDA=m
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+CONFIG_USB_STORAGE_DATAFAB=m
+# CONFIG_USB_STORAGE_DEBUG is not set
+CONFIG_USB_STORAGE_FREECOM=m
+CONFIG_USB_STORAGE_ISD200=m
+CONFIG_USB_STORAGE_JUMPSHOT=m
+CONFIG_USB_STORAGE_KARMA=m
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+CONFIG_USB_STORAGE_SDDR09=m
+CONFIG_USB_STORAGE_SDDR55=m
+CONFIG_USB_STORAGE_USBAT=m
+CONFIG_USB_STV06XX=m
+# CONFIG_USB_STV680 is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_SUSPEND=y
+CONFIG_USB_TEST=m
+CONFIG_USB_TMC=m
+CONFIG_USB_TRANCEVIBRATOR=m
+# CONFIG_USB_U132_HCD is not set
+CONFIG_USB_UEAGLEATM=m
+CONFIG_USB_UHCI_HCD=m
+CONFIG_USB_USBNET=m
+CONFIG_USB_USS720=m
+# CONFIG_USB_VICAM is not set
+CONFIG_USB_VIDEO_CLASS=m
+CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
+CONFIG_USB_VST=m
+CONFIG_USB_WDM=m
+# CONFIG_USB_WHCI_HCD is not set
+CONFIG_USB_WUSB=m
+CONFIG_USB_WUSB_CBAF=m
+# CONFIG_USB_WUSB_CBAF_DEBUG is not set
+# CONFIG_USB_XHCI_HCD is not set
+CONFIG_USB_XUSBATM=m
+CONFIG_USB_ZC0301=m
+CONFIG_USB_ZD1201=m
+# CONFIG_USB_ZERO is not set
+CONFIG_USB_ZR364XX=m
+# CONFIG_USER_NS is not set
+# CONFIG_USER_SCHED is not set
+CONFIG_UTS_NS=y
+CONFIG_UWB=m
+CONFIG_UWB_HWA=m
+CONFIG_UWB_I1480U=m
+CONFIG_UWB_I1480U_WLP=m
+CONFIG_UWB_WHCI=m
+CONFIG_UWB_WLP=m
+CONFIG_V4L_USB_DRIVERS=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_VERSION_SIGNATURE=""
+CONFIG_VETH=m
+CONFIG_VFAT_FS=y
+CONFIG_VFP=y
+CONFIG_VFPv3=y
+# CONFIG_VGASTATE is not set
+CONFIG_VGA_ARB=y
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_VIA_RHINE=m
+# CONFIG_VIA_RHINE_MMIO is not set
+# CONFIG_VIA_VELOCITY is not set
+CONFIG_VIDEOBUF_DMA_CONTIG=m
+CONFIG_VIDEOBUF_DMA_SG=m
+CONFIG_VIDEOBUF_DVB=m
+CONFIG_VIDEOBUF_GEN=m
+CONFIG_VIDEOBUF_VMALLOC=m
+# CONFIG_VIDEO_ADV7170 is not set
+# CONFIG_VIDEO_ADV7175 is not set
+# CONFIG_VIDEO_ADV7180 is not set
+# CONFIG_VIDEO_ADV7343 is not set
+# CONFIG_VIDEO_ADV_DEBUG is not set
+CONFIG_VIDEO_ALLOW_V4L1=y
+CONFIG_VIDEO_AU0828=m
+# CONFIG_VIDEO_BT819 is not set
+CONFIG_VIDEO_BT848=m
+# CONFIG_VIDEO_BT848_DVB is not set
+# CONFIG_VIDEO_BT856 is not set
+# CONFIG_VIDEO_BT866 is not set
+CONFIG_VIDEO_BTCX=m
+CONFIG_VIDEO_BWQCAM=m
+CONFIG_VIDEO_CAFE_CCIC=m
+CONFIG_VIDEO_CAPTURE_DRIVERS=y
+# CONFIG_VIDEO_CPIA is not set
+# CONFIG_VIDEO_CPIA2 is not set
+CONFIG_VIDEO_CQCAM=m
+CONFIG_VIDEO_CS5345=m
+CONFIG_VIDEO_CS53L32A=m
+CONFIG_VIDEO_CX18=m
+CONFIG_VIDEO_CX231XX=m
+CONFIG_VIDEO_CX231XX_ALSA=m
+CONFIG_VIDEO_CX231XX_DVB=m
+CONFIG_VIDEO_CX2341X=m
+CONFIG_VIDEO_CX23885=m
+# CONFIG_VIDEO_CX25821 is not set
+CONFIG_VIDEO_CX25840=m
+CONFIG_VIDEO_CX88=m
+CONFIG_VIDEO_CX88_ALSA=m
+CONFIG_VIDEO_CX88_BLACKBIRD=m
+CONFIG_VIDEO_CX88_DVB=m
+CONFIG_VIDEO_CX88_MPEG=m
+CONFIG_VIDEO_CX88_VP3054=m
+CONFIG_VIDEO_DEV=m
+CONFIG_VIDEO_EM28XX=m
+CONFIG_VIDEO_EM28XX_ALSA=m
+CONFIG_VIDEO_EM28XX_DVB=m
+CONFIG_VIDEO_FB_IVTV=m
+# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
+# CONFIG_VIDEO_GO7007 is not set
+CONFIG_VIDEO_HDPVR=m
+# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set
+CONFIG_VIDEO_HEXIUM_GEMINI=m
+CONFIG_VIDEO_HEXIUM_ORION=m
+CONFIG_VIDEO_IR=m
+CONFIG_VIDEO_IR_I2C=m
+CONFIG_VIDEO_IVTV=m
+# CONFIG_VIDEO_KS0127 is not set
+CONFIG_VIDEO_M52790=m
+CONFIG_VIDEO_MEDIA=m
+CONFIG_VIDEO_MSP3400=m
+# CONFIG_VIDEO_MT9V011 is not set
+CONFIG_VIDEO_MXB=m
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_VIDEO_OV7670=m
+CONFIG_VIDEO_OV7680=m
+# CONFIG_VIDEO_OVCAMCHIP is not set
+CONFIG_VIDEO_PVRUSB2=m
+# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set
+CONFIG_VIDEO_PVRUSB2_DVB=y
+CONFIG_VIDEO_PVRUSB2_SYSFS=y
+CONFIG_VIDEO_SAA5246A=m
+CONFIG_VIDEO_SAA5249=m
+# CONFIG_VIDEO_SAA6588 is not set
+# CONFIG_VIDEO_SAA7110 is not set
+CONFIG_VIDEO_SAA711X=m
+CONFIG_VIDEO_SAA7127=m
+CONFIG_VIDEO_SAA7134=m
+CONFIG_VIDEO_SAA7134_ALSA=m
+CONFIG_VIDEO_SAA7134_DVB=m
+CONFIG_VIDEO_SAA7146=m
+CONFIG_VIDEO_SAA7146_VV=m
+# CONFIG_VIDEO_SAA7164 is not set
+CONFIG_VIDEO_SAA717X=m
+# CONFIG_VIDEO_SAA7185 is not set
+# CONFIG_VIDEO_SAA7191 is not set
+CONFIG_VIDEO_SH_MOBILE_CEU=m
+CONFIG_VIDEO_STRADIS=m
+# CONFIG_VIDEO_TCM825X is not set
+# CONFIG_VIDEO_TDA7432 is not set
+# CONFIG_VIDEO_TDA9840 is not set
+# CONFIG_VIDEO_TDA9875 is not set
+# CONFIG_VIDEO_TEA6415C is not set
+# CONFIG_VIDEO_TEA6420 is not set
+# CONFIG_VIDEO_THS7303 is not set
+# CONFIG_VIDEO_TLV320AIC23B is not set
+CONFIG_VIDEO_TUNER=m
+# CONFIG_VIDEO_TVAUDIO is not set
+CONFIG_VIDEO_TVEEPROM=m
+# CONFIG_VIDEO_TVP514X is not set
+# CONFIG_VIDEO_TVP5150 is not set
+CONFIG_VIDEO_UPD64031A=m
+CONFIG_VIDEO_UPD64083=m
+CONFIG_VIDEO_USBVISION=m
+CONFIG_VIDEO_V4L1=m
+CONFIG_VIDEO_V4L1_COMPAT=y
+CONFIG_VIDEO_V4L2=m
+CONFIG_VIDEO_V4L2_COMMON=m
+# CONFIG_VIDEO_VIVI is not set
+CONFIG_VIDEO_VP27SMPX=m
+# CONFIG_VIDEO_VPX3220 is not set
+CONFIG_VIDEO_W9966=m
+CONFIG_VIDEO_WM8739=m
+CONFIG_VIDEO_WM8775=m
+CONFIG_VIDEO_ZORAN=m
+CONFIG_VIDEO_ZORAN_AVS6EYES=m
+CONFIG_VIDEO_ZORAN_BUZ=m
+CONFIG_VIDEO_ZORAN_DC10=m
+CONFIG_VIDEO_ZORAN_DC30=m
+CONFIG_VIDEO_ZORAN_LML33=m
+CONFIG_VIDEO_ZORAN_LML33R10=m
+CONFIG_VIDEO_ZORAN_ZR36060=m
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_VITESSE_PHY is not set
+CONFIG_VLAN_8021Q=m
+CONFIG_VLAN_8021Q_GVRP=y
+CONFIG_VLSI_FIR=m
+# CONFIG_VME_BUS is not set
+# CONFIG_VMSPLIT_1G is not set
+# CONFIG_VMSPLIT_2G is not set
+CONFIG_VMSPLIT_3G=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_VORTEX=m
+CONFIG_VT=y
+# CONFIG_VT6655 is not set
+# CONFIG_VT6656 is not set
+CONFIG_VT_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_VXFS_FS=m
+# CONFIG_VXGE is not set
+CONFIG_W1=y
+CONFIG_W1_CON=y
+CONFIG_W1_MASTER_DS1WM=m
+CONFIG_W1_MASTER_DS2482=m
+CONFIG_W1_MASTER_DS2490=m
+CONFIG_W1_MASTER_GPIO=m
+CONFIG_W1_MASTER_MATROX=m
+CONFIG_W1_SLAVE_BQ27000=m
+CONFIG_W1_SLAVE_DS2431=m
+CONFIG_W1_SLAVE_DS2433=m
+# CONFIG_W1_SLAVE_DS2433_CRC is not set
+CONFIG_W1_SLAVE_DS2760=y
+CONFIG_W1_SLAVE_SMEM=m
+CONFIG_W1_SLAVE_THERM=m
+CONFIG_W35UND=m
+# CONFIG_WAKELOCK is not set
+CONFIG_WAN=y
+CONFIG_WAN_ROUTER=m
+# CONFIG_WAN_ROUTER_DRIVERS is not set
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_NOWAYOUT=y
+CONFIG_WDTPCI=m
+CONFIG_WIMAX=m
+CONFIG_WIMAX_DEBUG_LEVEL=8
+# CONFIG_WIMAX_I2400M_SDIO is not set
+# CONFIG_WIMAX_I2400M_USB is not set
+CONFIG_WIRELESS=y
+CONFIG_WIRELESS_EXT=y
+CONFIG_WIRELESS_EXT_SYSFS=y
+# CONFIG_WIRELESS_OLD_REGULATORY is not set
+# CONFIG_WL1251 is not set
+# CONFIG_WL1271 is not set
+CONFIG_WL12XX=m
+CONFIG_WLAN=y
+CONFIG_WLAN_80211=y
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WM8350_POWER is not set
+# CONFIG_WM8350_WATCHDOG is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+CONFIG_X25=m
+# CONFIG_X25_ASY is not set
+CONFIG_XFRM=y
+CONFIG_XFRM_IPCOMP=m
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+CONFIG_XFRM_USER=m
+# CONFIG_XFS_DEBUG is not set
+CONFIG_XFS_FS=m
+CONFIG_XFS_POSIX_ACL=y
+CONFIG_XFS_QUOTA=y
+CONFIG_XFS_RT=y
+# CONFIG_XIP_KERNEL is not set
+CONFIG_XOR_BLOCKS=m
+CONFIG_YAM=m
+# CONFIG_YELLOWFIN is not set
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZD1211RW=m
+# CONFIG_ZD1211RW_DEBUG is not set
+CONFIG_ZEROPLUS_FF=y
+CONFIG_ZISOFS=y
+CONFIG_ZLIB_DEFLATE=m
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZONE_DMA_FLAG=0
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/config/enforce
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/config/enforce
@@ -0,0 +1,27 @@
+#
+# SECURITY items
+#
+# Ensure this option is enabled.
+value CONFIG_COMPAT_BRK n
+value CONFIG_DEVKMEM n
+value CONFIG_LSM_MMAP_MIN_ADDR 0
+value CONFIG_SECURITY y
+value CONFIG_SECURITY_FILE_CAPABILITIES y
+value CONFIG_SECURITY_SELINUX y
+value CONFIG_SECURITY_SMACK y
+value CONFIG_SYN_COOKIES y
+value CONFIG_DEFAULT_SECURITY_APPARMOR y
+# For architectures which support this option ensure it is enabled.
+!exists CONFIG_SECCOMP | value CONFIG_SECCOMP y
+!exists CONFIG_CC_STACKPROTECTOR | value CONFIG_CC_STACKPROTECTOR y
+!exists CONFIG_DEBUG_RODATA | value CONFIG_DEBUG_RODATA y
+!exists CONFIG_STRICT_DEVMEM | value CONFIG_STRICT_DEVMEM y
+# For architectures which support this option ensure it is disabled.
+!exists CONFIG_COMPAT_VDSO | value CONFIG_COMPAT_VDSO n
+# Default to 32768 for armel, 65536 for everything else.
+(( arch armel | arch sparc ) & value CONFIG_DEFAULT_MMAP_MIN_ADDR 32768 ) | \
+	( value CONFIG_DEFAULT_MMAP_MIN_ADDR 65536)
+
+# CONFIG_USB_DEVICE_FS breaks udev USB firmware loading and is deprecated
+# ensure it is disabled.
+value CONFIG_USB_DEVICEFS n
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/config/armel/config.common.armel
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/config/armel/config.common.armel
@@ -0,0 +1,3 @@
+#
+# Config options for config.common.armel automatically generated by splitconfig.pl
+#
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/config/armel/config.flavour.dove
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/config/armel/config.flavour.dove
@@ -0,0 +1,3 @@
+#
+# Config options for config.flavour.dove automatically generated by splitconfig.pl
+#
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/control.d/flavour-control.stub
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/control.d/flavour-control.stub
@@ -0,0 +1,68 @@
+# Items that get replaced:
+# FLAVOUR
+# DESC
+# ARCH
+# SUPPORTED
+# TARGET
+# BOOTLOADER
+# =PROVIDES=
+#
+# Items marked with =FOO= are optional
+#
+# XXX: Leave the blank line before the first package!!
+
+Package: linux-image-PKGVER-ABINUM-FLAVOUR
+Architecture: ARCH
+Section: admin
+Priority: optional
+Pre-Depends: dpkg (>= 1.10.24)
+#Provides: linux-image, linux-image-2.6, fuse-module, =PROVIDES=
+Depends: ${misc:Depends}, initramfs-tools (>= 0.36ubuntu6), coreutils | fileutils (>= 4.0), module-init-tools (>= 3.3-pre11-4ubuntu3), wireless-crda
+Conflicts: hotplug (<< 0.0.20040105-1)
+Recommends: BOOTLOADER
+Suggests: fdutils, SRCPKGNAME-doc-PKGVER | SRCPKGNAME-source-PKGVER
+Description: Linux kernel image for version PKGVER on DESC
+ This package contains the Linux kernel image for version PKGVER on
+ DESC.
+ .
+ Also includes the corresponding System.map file, the modules built by the
+ packager, and scripts that try to ensure that the system is not left in an
+ unbootable state after an update.
+ .
+ Supports SUPPORTED processors.
+ .
+ TARGET
+ .
+ You likely do not want to install this package directly. Instead, install
+ the linux-FLAVOUR meta-package, which will ensure that upgrades work
+ correctly, and that supporting packages are also installed.
+
+Package: linux-headers-PKGVER-ABINUM-FLAVOUR
+Architecture: ARCH
+Section: devel
+Priority: optional
+Depends: ${misc:Depends}, coreutils | fileutils (>= 4.0), linux-headers-PKGVER-ABINUM, ${shlibs:Depends}
+#Provides: linux-headers, linux-headers-2.6
+Description: Linux kernel headers for version PKGVER on DESC
+ This package provides kernel header files for version PKGVER on
+ DESC.
+ .
+ This is for sites that want the latest kernel headers.  Please read
+ /usr/share/doc/linux-headers-PKGVER-ABINUM/debian.README.gz for details.
+
+Package: linux-image-PKGVER-ABINUM-FLAVOUR-dbgsym
+Architecture: ARCH
+Section: devel
+Priority: optional
+Depends: ${misc:Depends}
+Provides: linux-debug
+Description: Linux kernel debug image for version PKGVER on DESC
+ This package provides a kernel debug image for version PKGVER on
+ DESC.
+ .
+ This is for sites that wish to debug the kernel.
+ .
+ The kernel image contained in this package is NOT meant to boot from. It
+ is uncompressed, and unstripped. This package also includes the
+ unstripped modules.
+
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/control.d/vars.dove
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/control.d/vars.dove
@@ -0,0 +1,9 @@
+arch="armel"
+supported="dove"
+desc="dove-based systems"
+target="Marvell, dove, y0 boards"
+bootloader=""
+provides=""
+section_image="universe/admin"
+do_debug="Yes"
+
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/sub-flavours/control.stub
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/sub-flavours/control.stub
@@ -0,0 +1,39 @@
+# Items that get replaced:
+# FLAVOUR
+# DESC
+# ARCH
+# SUPPORTED
+# TARGET
+# BOOTLOADER
+# =PROVIDES=
+# =CONFLICTS=
+#
+# Items marked with =FOO= are optional
+#
+# XXX: Leave the blank line before the first package!!
+
+Package: linux-image-PKGVER-ABINUM-FLAVOUR
+Architecture: ARCH
+Section: admin
+Priority: optional
+Pre-Depends: dpkg (>= 1.10.24)
+Provides: linux-image, linux-image-2.6, fuse-module, =PROVIDES=
+Depends: initramfs-tools (>= 0.36ubuntu6), coreutils | fileutils (>= 4.0), module-init-tools (>= 3.3-pre11-4ubuntu3)
+Conflicts: hotplug (<< 0.0.20040105-1), =CONFLICTS=
+Recommends: BOOTLOADER
+Suggests: fdutils, linux-doc-PKGVER | linux-source-PKGVER
+Description: Linux kernel image for version PKGVER on DESC
+ This package contains the Linux kernel image for version PKGVER on
+ DESC.
+ .
+ Also includes the corresponding System.map file, the modules built by the
+ packager, and scripts that try to ensure that the system is not left in an
+ unbootable state after an update.
+ .
+ Supports SUPPORTED processors.
+ .
+ TARGET
+ .
+ You likely do not want to install this package directly. Instead, install
+ the linux-FLAVOUR meta-package, which will ensure that upgrades work
+ correctly, and that supporting packages are also installed.
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/sub-flavours/README
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/sub-flavours/README
@@ -0,0 +1,12 @@
+Sub flavours are flavours that are built based on other builds. IOW, they
+are usually a subset of something else.
+
+Requirements:
+
+debian/sub-flavours/<sub>.list	: The file list, uses glob syntax
+debian/sub-flavours/<sub>.vars	: The make vars, similar to normal flavours
+debian/rules.d/<arch>.mk	: Add <base>_sub var listing the <sub>, e.g.
+				  server_sub = virtual would mean virtual is
+				  based on the server flavour.
+
+Note, the vars must include a conflicts with the flavour it was built on.
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/abi/2.6.32-217.34/abiname
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/abi/2.6.32-217.34/abiname
@@ -0,0 +1 @@
+217
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/abi/2.6.32-217.34/armel/dove.modules
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/abi/2.6.32-217.34/armel/dove.modules
@@ -0,0 +1,1421 @@
+3c59x
+6pack
+8021q
+8139cp
+8139too
+8390
+9p
+9pnet
+a3d
+ab3100
+ab3100-core
+ab3100-otp
+acecad
+act200l-sir
+act_gact
+act_ipt
+actisys-sir
+act_mirred
+act_nat
+act_pedit
+act_police
+act_simple
+act_skbedit
+ad7414
+ad7418
+ad7877
+ad7879
+adcxx
+adfs
+adi
+adm1021
+adm1025
+adm1026
+adm1029
+adm1031
+adm8211
+adm9240
+ads7828
+adt7462
+adt7470
+adt7473
+adt7475
+adutux
+aes_generic
+af_802154
+af9013
+affs
+af_key
+af-rxrpc
+ah4
+ah6
+ahci
+aiptek
+aircable
+alim7101_wdt
+alphatrack
+amd8111e
+analog
+ansi_cprng
+anubis
+aoe
+apm_power
+appledisplay
+appletalk
+appletouch
+ar9170usb
+arc4
+arcnet
+ark3116
+arptable_filter
+arp_tables
+arpt_mangle
+asix
+asus_oled
+async_memcpy
+async_pq
+async_raid6_recov
+async_tx
+async_xor
+at24
+at25
+at76c50x-usb
+aten
+ath
+ath5k
+ath9k
+ati_remote
+ati_remote2
+atkbd
+atl2
+atm
+atmel
+atmel_pci
+atmtcp
+atxp1
+au0828
+au8522
+aufs
+authenc
+auth_rpcgss
+autofs
+autofs4
+ax25
+ax88796
+b2c2-flexcop
+b2c2-flexcop-pci
+b2c2-flexcop-usb
+b43
+b43legacy
+b44
+baycom_ser_fdx
+baycom_ser_hdx
+bcm203x
+bcm3510
+bcm5974
+befs
+belkin_sa
+berry_charge
+bfs
+bfusb
+binfmt_aout
+binfmt_misc
+block2mtd
+blowfish
+bluetooth
+bnep
+bonding
+bpa10x
+bpck
+bpck6
+bpqether
+bq24022
+bq27x00_battery
+br2684
+bridge
+bsd_comp
+bt878
+btcx-risc
+btrfs
+btsdio
+bttv
+btusb
+budget
+budget-av
+budget-ci
+budget-core
+budget-patch
+bw-qcam
+c67x00
+cachefiles
+cafe_ccic
+camellia
+can
+can-bcm
+can-dev
+can-raw
+cassini
+cast5
+catc
+cb710
+cciss
+ccm
+cdc-acm
+cdc_eem
+cdc_ether
+cdc-phonet
+cdc_subset
+cdc-wdm
+cdrom
+cfg80211
+cfi_cmdset_0001
+cfi_cmdset_0002
+cfi_cmdset_0020
+cfi_probe
+cfi_util
+ch341
+cifs
+clip
+cls_basic
+cls_fw
+cls_route
+cls_rsvp
+cls_rsvp6
+cls_tcindex
+cm109
+cobra
+coda
+comm
+configfs
+core
+cp210x
+cpqarray
+c-qcam
+crc32c
+crc7
+crc-ccitt
+crc-itu-t
+cryptd
+cryptoloop
+crypto_null
+cryptosoft
+cs5345
+cs53l32a
+ctr
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+cuse
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+cx22700
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+cx231xx
+cx231xx-alsa
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+cx2341x
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+cx88-dvb
+cx88-vp3054-i2c
+cx88xx
+cxacru
+cyberjack
+cypress_cy7c63
+cypress_m8
+cytherm
+DAC960
+db9
+dccp
+dccp_diag
+dccp_ipv4
+dccp_ipv6
+decnet
+deflate
+dib0070
+dib3000mb
+dib3000mc
+dib7000m
+dib7000p
+dib8000
+dibx000_common
+digi_acceleport
+diskonchip
+dlm
+dm1105
+dm9601
+dmatest
+dm-delay
+dme1737
+dm-log
+dm-log-userspace
+dm-mirror
+dm-multipath
+dm-queue-length
+dm-raid45
+dm-region-hash
+dm-round-robin
+dm-service-time
+dm-snapshot
+dm-zero
+dnet
+dn_rtmsg
+doc2000
+doc2001
+doc2001plus
+docecc
+docprobe
+ds1621
+ds1682
+ds1wm
+ds2482
+ds2490
+ds2760_battery
+ds2782_battery
+dsbr100
+dst
+dst_ca
+dstr
+dummy
+dv1394
+dvb-bt8xx
+dvb-core
+dvb-pll
+dvb-ttpci
+dvb-ttusb-budget
+dvb-usb
+dvb-usb-a800
+dvb-usb-af9005
+dvb-usb-af9005-remote
+dvb-usb-af9015
+dvb-usb-anysee
+dvb-usb-au6610
+dvb-usb-ce6230
+dvb-usb-cinergyT2
+dvb-usb-cxusb
+dvb-usb-dib0700
+dvb-usb-dibusb-common
+dvb-usb-dibusb-mb
+dvb-usb-dibusb-mc
+dvb-usb-digitv
+dvb-usb-dtt200u
+dvb-usb-dtv5100
+dvb-usb-dw2102
+dvb-usb-gl861
+dvb-usb-gp8psk
+dvb-usb-m920x
+dvb-usb-nova-t-usb2
+dvb-usb-opera
+dvb-usb-ttusb2
+dvb-usb-umt-010
+dvb-usb-vp702x
+dvb-usb-vp7045
+e100
+ebt_802_3
+ebtable_broute
+ebtable_filter
+ebtable_nat
+ebtables
+ebt_among
+ebt_arp
+ebt_arpreply
+ebt_dnat
+ebt_ip
+ebt_ip6
+ebt_limit
+ebt_log
+ebt_mark
+ebt_mark_m
+ebt_nflog
+ebt_pkttype
+ebt_redirect
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+echo
+econet
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+eeti_ts
+efs
+elo
+em28xx
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+em_cmp
+emi26
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+enc28j60
+enclosure
+epat
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+eql
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+esp4
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+ethoc
+evbug
+exportfs
+f71805f
+f71882fg
+f75375s
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+fcrypt
+fealnx
+firewire-core
+firewire-net
+firewire-ohci
+firewire-sbp2
+fit2
+fit3
+fm801-gp
+forcedeth
+freevxfs
+friq
+frpw
+fscache
+ftdi-elan
+ftdi_sio
+ftl
+fujitsu_ts
+funsoft
+g760a
+gadgetfs
+gamecon
+gameport
+garmin_gps
+garp
+g_audio
+g_cdc
+gcm
+generic
+gen_probe
+g_ether
+gf128mul
+gf2k
+g_file_storage
+gfs2
+ghash-generic
+gigaset
+girbil-sir
+gl518sm
+gl520sm
+gl620a
+gluebi
+grip
+grip_mp
+g_serial
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+gspca_etoms
+gspca_finepix
+gspca_m5602
+gspca_main
+gspca_mars
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+gspca_ov519
+gspca_ov534
+gspca_pac207
+gspca_pac7311
+gspca_sn9c20x
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+guillemot
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+hdlcdrv
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+htc-pasic3
+hwa-hc
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+hwmon-vid
+i1480-dfu-usb
+i1480-est
+i1480u-wlp
+i2o_block
+i2o_bus
+i2o_config
+i2o_core
+i2o_proc
+i2o_scsi
+i5k_amb
+ics932s401
+idmouse
+ieee1394
+ifb
+iforce
+inexio
+inftl
+int51x1
+interact
+ioc4
+io_edgeport
+io_ti
+iowarrior
+ip6_queue
+ip6table_filter
+ip6table_mangle
+ip6table_raw
+ip6_tables
+ip6t_ah
+ip6t_eui64
+ip6t_frag
+ip6t_hbh
+ip6t_ipv6header
+ip6t_LOG
+ip6t_mh
+ip6t_REJECT
+ip6t_rt
+ip6_tunnel
+ipaq
+ipcomp
+ipcomp6
+ipddp
+ip_gre
+ipip
+ip_queue
+iptable_filter
+iptable_mangle
+iptable_nat
+iptable_raw
+ip_tables
+ipt_addrtype
+ipt_ah
+ipt_CLUSTERIP
+ipt_ecn
+ipt_ECN
+ipt_LOG
+ipt_MASQUERADE
+ipt_NETMAP
+ipt_REDIRECT
+ipt_REJECT
+ipt_ULOG
+ip_vs
+ip_vs_dh
+ip_vs_ftp
+ip_vs_lblc
+ip_vs_lblcr
+ip_vs_lc
+ip_vs_nq
+ip_vs_rr
+ip_vs_sed
+ip_vs_sh
+ip_vs_wlc
+ip_vs_wrr
+ipw
+ipw2100
+ipw2200
+ipx
+ircomm
+ir-common
+ircomm-tty
+irda
+irda-usb
+ir-kbd-i2c
+irlan
+irtty-sir
+iscsi_trgt
+isdn
+isight_firmware
+isl29003
+isl6405
+isl6421
+isl6423
+isp116x-hcd
+isp1760
+it87
+itd1000
+iuu_phoenix
+ivtv
+ivtvfb
+iwl3945
+iwlagn
+iwlcore
+iwmc3200wifi
+jedec_probe
+jffs2
+jfs
+joydev
+joydump
+kafs
+kaweth
+kbic
+kbtab
+kernelcapi
+keyspan
+keyspan_pda
+keyspan_remote
+khazad
+kingsun-sir
+kl5kusb105
+kobil_sct
+ks0108
+ks8842
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+ktti
+kvaser_pci
+l2cap
+l64781
+lapb
+ldusb
+lec
+leds-bd2802
+leds-dac124s085
+leds-gpio
+leds-lp3944
+leds-pca9532
+leds-pca955x
+ledtrig-backlight
+ledtrig-default-on
+ledtrig-gpio
+ledtrig-heartbeat
+ledtrig-timer
+legousbtower
+lgdt3305
+lgdt330x
+lgs8gxx
+lib80211
+lib80211_crypt_ccmp
+lib80211_crypt_tkip
+lib80211_crypt_wep
+libcrc32c
+libertas
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+libertas_tf
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+libipw
+libps2
+lightning
+line6usb
+linear
+lirc_atiusb
+lirc_bt829
+lirc_dev
+lirc_ene0100
+lirc_i2c
+lirc_igorplugusb
+lirc_imon
+lirc_it87
+lirc_ite8709
+lirc_mceusb
+lirc_sasem
+lirc_serial
+lirc_sir
+lirc_streamzap
+lirc_ttusbir
+lis3lv02d
+lis3lv02d_spi
+litelink-sir
+lkkbd
+llc
+llc2
+lm63
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+lm75
+lm77
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+lm8323
+lm85
+lm87
+lm90
+lm92
+lm93
+lm95241
+lnbp21
+lockd
+lp3971
+lpddr_cmds
+lrw
+ltc4215
+ltc4245
+lzo
+lzo_compress
+lzo_decompress
+m52790
+ma600-sir
+mac80211
+mac80211_hwsim
+macvlan
+magellan
+map_absent
+map_ram
+map_rom
+matrix_keypad
+matrox_w1
+max1111
+max1586
+max1619
+max17040_battery
+max6650
+max6875
+mc44s803
+mcp2120-sir
+mcs7780
+mcs7830
+mct_u232
+md4
+mdc800
+md-mod
+mg_disk
+michael_mic
+microtek
+minix
+mISDN_core
+mk712
+mkiss
+mos7720
+mos7840
+moto_modem
+mpoa
+msp3400
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+mt2131
+mt2266
+mt312
+mt352
+mt9m001
+mt9m111
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+mtdconcat
+mtd_oobtest
+mtdoops
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+mtdram
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+mtd_speedtest
+mtd_stresstest
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+mtd_torturetest
+mtouch
+multipath
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+nbd
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+net1080
+netconsole
+netrom
+newtonkbd
+nf_conntrack
+nf_conntrack_amanda
+nf_conntrack_ftp
+nf_conntrack_h323
+nf_conntrack_ipv4
+nf_conntrack_ipv6
+nf_conntrack_irc
+nf_conntrack_netbios_ns
+nf_conntrack_netlink
+nf_conntrack_pptp
+nf_conntrack_proto_dccp
+nf_conntrack_proto_gre
+nf_conntrack_proto_sctp
+nf_conntrack_proto_udplite
+nf_conntrack_sip
+nf_conntrack_tftp
+nf_defrag_ipv4
+nf_nat
+nf_nat_amanda
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+nf_nat_proto_dccp
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+nf_nat_snmp_basic
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+nfs
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+p9auth
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+parport
+parport_ax88796
+parport_pc
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+pcbc
+pcd
+pcf50633-adc
+pcf50633-core
+pcf50633-gpio
+pcf8591
+pcilynx
+pcips2
+pcnet32
+pcwd_pci
+pcwd_usb
+pd
+pda_power
+pegasus
+penmount
+pf
+pg
+phantom
+phonet
+phram
+physmap
+pktcdvd
+pktgen
+pl2303
+plat-ram
+plip
+plusb
+pluto2
+pmc551
+pn_pep
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+ppp_async
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+prism54
+psmouse
+psnap
+pt
+pvrusb2
+qcserial
+qinfo_probe
+qnx4
+qt1010
+quota_tree
+quota_v1
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+r6040
+r8a66597-hcd
+radio-gemtek-pci
+radio-maestro
+radio-maxiradio
+radio-mr800
+radio-tea5764
+raid0
+raid1
+raid10
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+raid6_pq
+raw1394
+redboot
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+reiserfs
+rfcomm
+rfd_ftl
+rfkill
+rio500
+rmd128
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+rndis_host
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+romfs
+rose
+rotary_encoder
+rpcsec_gss_krb5
+rpcsec_gss_spkm3
+rt2400pci
+rt2500pci
+rt2500usb
+rt2800usb
+rt2x00lib
+rt2x00pci
+rt2x00usb
+rt61pci
+rt73usb
+rtc-ab3100
+rtc-bq4802
+rtc-cmos
+rtc-ds1286
+rtc-ds1305
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+safe
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+salsa20_generic
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+sc92031
+sch_atm
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+sch_dsmark
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+sch_hfsc
+sch_htb
+sch_multiq
+sch_netem
+sch_prio
+sch_red
+sch_sfq
+sch_tbf
+sch_teql
+sco
+scsi_wait_scan
+sctp
+seed
+seqiv
+serio
+serio_raw
+sermouse
+serpent
+serport
+sg
+sha1_generic
+sha256_generic
+sha512_generic
+sh_mobile_ceu_camera
+sht15
+si21xx
+sidewinder
+siemens_mpi
+sierra
+sir-dev
+sis5595
+sis900
+sisusbvga
+sit
+sja1000
+sja1000_platform
+sl811-hcd
+slhc
+slip
+slram
+sm501
+smbfs
+smsc
+smsc47b397
+smsc47m1
+smsc47m192
+smsc9420
+smsc95xx
+sn9c102
+snd-hwdep
+snd-mixer-oss
+snd-pcm-oss
+snd-rawmidi
+snd-usb-audio
+snd-usb-caiaq
+snd-usb-lib
+soc_camera
+soc_camera_platform
+softdog
+sp8870
+sp887x
+spaceball
+spaceorb
+spcp8x5
+speedtch
+squashfs
+sr_mod
+ssb
+ssfdc
+starfire
+stb0899
+stb6000
+stb6100
+stinger
+stir4200
+stkwebcam
+stowaway
+stp
+stradis
+stv0288
+stv0297
+stv0299
+stv0900
+stv090x
+stv6110
+stv6110x
+sundance
+sunhme
+sunkbd
+sunrpc
+sx8
+symbolserial
+synaptics_i2c
+sysv
+tcp_bic
+tcp_highspeed
+tcp_htcp
+tcp_hybla
+tcp_illinois
+tcp_lp
+tcp_scalable
+tcp_vegas
+tcp_veno
+tcp_westwood
+tcp_yeah
+tcrypt
+tda10021
+tda10023
+tda10048
+tda1004x
+tda10086
+tda18271
+tda8083
+tda8261
+tda826x
+tda827x
+tda8290
+tda9887
+tea
+tea5761
+tea5767
+tekram-sir
+tgr192
+thermal_sys
+thmc50
+tipc
+ti_usb_3410_5052
+tlan
+tmdc
+tmp401
+touchit213
+touchright
+touchwin
+tps65010
+trancevibrator
+tranzport
+ts_bm
+tsc2007
+ts_fsm
+ts_kmp
+tsl2550
+ttpci-eeprom
+ttusb_dec
+ttusbdecfe
+tua6100
+tun
+tuner
+tuner-simple
+tuner-types
+tuner-xc2028
+tunnel4
+tunnel6
+turbografx
+tveeprom
+tw9910
+twidjoy
+twofish
+twofish_common
+typhoon
+ubifs
+ucb1400_core
+udf
+udlfb
+ueagle-atm
+ufs
+uhci-hcd
+uinput
+uio_pdrv_genirq
+uio_sercos3
+uio_smx
+umc
+umem
+ums-alauda
+ums-datafab
+ums-freecom
+ums-isd200
+ums-jumpshot
+ums-karma
+ums-sddr09
+ums-sddr55
+ums-usbat
+upd64031a
+upd64083
+usb8xxx
+usbatm
+usbhid
+usbip
+usbip_common_mod
+usblcd
+usbled
+usblp
+usbnet
+usbserial
+usbsevseg
+usbtest
+usbtmc
+usbtouchscreen
+usbvision
+userspace-consumer
+uss720
+uvcvideo
+uwb
+v4l1-compat
+v4l2-common
+v4l2-int-device
+vcan
+ves1820
+ves1x93
+veth
+vhci-hcd
+via686a
+via-rhine
+video1394
+videobuf-core
+videobuf-dma-contig
+videobuf-dma-sg
+videobuf-dvb
+videobuf-vmalloc
+videocodec
+videodev
+virtual
+visor
+vlsi_ir
+vp27smpx
+vstusb
+vsxxxaa
+vt1211
+vt8231
+w1_bq27000
+w1_ds2431
+w1_ds2433
+w1-gpio
+w1_smem
+w1_therm
+w83627ehf
+w83627hf
+w83781d
+w83791d
+w83792d
+w83793
+w83l785ts
+w83l786ng
+w90p910_ts
+w9966
+wacom
+wacom_w8001
+walkera0701
+wanrouter
+warrior
+wdt_pci
+whci
+whc-rc
+whiteheat
+wimax
+wlp
+wm8350
+wm8350-i2c
+wm8400-core
+wm8739
+wm8775
+wm97xx-ts
+wp512
+wpan-class
+wusb-cbaf
+wusbcore
+wusb-wa
+x25
+xc5000
+xcbc
+xfrm4_mode_beet
+xfrm4_mode_transport
+xfrm4_mode_tunnel
+xfrm4_tunnel
+xfrm6_mode_beet
+xfrm6_mode_ro
+xfrm6_mode_transport
+xfrm6_mode_tunnel
+xfrm6_tunnel
+xfrm_ipcomp
+xfrm_user
+xfs
+xor
+xpad
+x_tables
+xt_CLASSIFY
+xt_cluster
+xt_comment
+xt_connbytes
+xt_connlimit
+xt_connmark
+xt_CONNMARK
+xt_CONNSECMARK
+xt_conntrack
+xt_dccp
+xt_dscp
+xt_esp
+xt_hashlimit
+xt_helper
+xt_hl
+xt_HL
+xt_iprange
+xtkbd
+xt_length
+xt_limit
+xt_mac
+xt_mark
+xt_MARK
+xt_multiport
+xt_NFLOG
+xt_NFQUEUE
+xt_osf
+xt_owner
+xt_physdev
+xt_pkttype
+xt_policy
+xt_quota
+xt_rateest
+xt_RATEEST
+xt_realm
+xt_recent
+xts
+xt_sctp
+xt_SECMARK
+xt_state
+xt_statistic
+xt_string
+xt_tcpmss
+xt_TCPMSS
+xt_tcpudp
+xt_time
+xt_u32
+xusbatm
+yam
+yealink
+zaurus
+zc0301
+zd1201
+zd1211rw
+zhenhua
+zl10036
+zl10039
+zl10353
+zlib
+zlib_deflate
+zr36016
+zr36050
+zr36060
+zr36067
+zr364xx
--- linux-mvl-dove-2.6.32.orig/debian.mvl-dove/abi/2.6.32-217.34/armel/dove
+++ linux-mvl-dove-2.6.32/debian.mvl-dove/abi/2.6.32-217.34/armel/dove
@@ -0,0 +1,7701 @@
+EXPORT_SYMBOL crypto/gf128mul 0x0c2f123f	gf128mul_4k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x1068004b	gf128mul_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x2f2889a0	gf128mul_init_64k_lle
+EXPORT_SYMBOL crypto/gf128mul 0x3755f990	gf128mul_init_64k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x384ef9ce	gf128mul_64k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x56af0dbd	gf128mul_x_ble
+EXPORT_SYMBOL crypto/gf128mul 0x83581089	gf128mul_init_4k_lle
+EXPORT_SYMBOL crypto/gf128mul 0x9b2560b9	gf128mul_init_4k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x9e13f6f6	gf128mul_lle
+EXPORT_SYMBOL crypto/gf128mul 0xbd17a0df	gf128mul_4k_lle
+EXPORT_SYMBOL crypto/gf128mul 0xc0890413	gf128mul_64k_lle
+EXPORT_SYMBOL crypto/gf128mul 0xd60736ec	gf128mul_free_64k
+EXPORT_SYMBOL crypto/xor 0x5b6c00e6	xor_blocks
+EXPORT_SYMBOL drivers/block/paride/paride 0x02ff217d	paride_register
+EXPORT_SYMBOL drivers/block/paride/paride 0x0f7225f7	pi_read_block
+EXPORT_SYMBOL drivers/block/paride/paride 0x4b217ccf	pi_init
+EXPORT_SYMBOL drivers/block/paride/paride 0x5b20d32d	pi_schedule_claimed
+EXPORT_SYMBOL drivers/block/paride/paride 0x67968750	paride_unregister
+EXPORT_SYMBOL drivers/block/paride/paride 0x68194686	pi_read_regr
+EXPORT_SYMBOL drivers/block/paride/paride 0x8b6057fb	pi_write_block
+EXPORT_SYMBOL drivers/block/paride/paride 0x8b95fd63	pi_write_regr
+EXPORT_SYMBOL drivers/block/paride/paride 0x96d4213e	pi_connect
+EXPORT_SYMBOL drivers/block/paride/paride 0xa3f774e0	pi_do_claimed
+EXPORT_SYMBOL drivers/block/paride/paride 0xa53105ea	pi_disconnect
+EXPORT_SYMBOL drivers/block/paride/paride 0xd3e75de1	pi_release
+EXPORT_SYMBOL drivers/cdrom/cdrom 0x058569cc	cdrom_release
+EXPORT_SYMBOL drivers/cdrom/cdrom 0x05aac705	cdrom_mode_sense
+EXPORT_SYMBOL drivers/cdrom/cdrom 0x09f795c4	cdrom_number_of_slots
+EXPORT_SYMBOL drivers/cdrom/cdrom 0x22a87fc7	cdrom_mode_select
+EXPORT_SYMBOL drivers/cdrom/cdrom 0x2c11db6c	register_cdrom
+EXPORT_SYMBOL drivers/cdrom/cdrom 0x4f476e96	init_cdrom_command
+EXPORT_SYMBOL drivers/cdrom/cdrom 0x72eeb780	cdrom_open
+EXPORT_SYMBOL drivers/cdrom/cdrom 0x84b70136	cdrom_ioctl
+EXPORT_SYMBOL drivers/cdrom/cdrom 0x88c6b4d7	cdrom_media_changed
+EXPORT_SYMBOL drivers/cdrom/cdrom 0xa14081b1	cdrom_get_last_written
+EXPORT_SYMBOL drivers/cdrom/cdrom 0xb0fe5b40	unregister_cdrom
+EXPORT_SYMBOL drivers/cdrom/cdrom 0xd025a5f9	cdrom_get_media_event
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x04dd92ce	fw_core_add_descriptor
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x069faf35	fw_iso_context_create
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x08aefdbf	fw_iso_context_stop
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x0ba600b0	fw_core_remove_address_handler
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x11639fe7	fw_iso_buffer_destroy
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x1c60c7b3	fw_send_request
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x225f6f1e	fw_core_handle_response
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x338ac38c	fw_send_response
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x3ec6ee69	fw_core_handle_request
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x483a287a	fw_device_enable_phys_dma
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x4d5d4eca	fw_core_remove_descriptor
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x5f52168d	fw_core_remove_card
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x766b58ba	fw_iso_context_destroy
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x76eba533	fw_core_initiate_bus_reset
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x7f18ba60	fw_core_handle_bus_reset
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x8a976c16	fw_bus_type
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x90863005	fw_high_memory_region
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x9592ebdb	fw_run_transaction
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xa91963de	fw_card_initialize
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xafc1c793	fw_csr_iterator_next
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xb047a2c6	fw_csr_iterator_init
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xd4b68008	fw_iso_buffer_init
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xef6656cf	fw_iso_context_start
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xf65bbb39	fw_iso_context_queue
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xf775a6a9	fw_cancel_transaction
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xf89e7945	fw_core_add_address_handler
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xfc0d2809	fw_card_add
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xff53619c	fw_fill_response
+EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0x0903c239	vid_from_reg
+EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0xef1c781c	vid_which_vrm
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x020b478e	hpsb_read_cycle_timer
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x029f62e5	hpsb_create_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0334eaa8	hpsb_set_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x07bf6242	hpsb_make_phypacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x08ee1542	hpsb_get_hostinfo_bykey
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0ec000d1	hpsb_unregister_highlevel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x10a92332	hpsb_node_write
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x186638f5	hpsb_get_tlabel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1a200e5a	csr1212_release_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1a4100ab	hpsb_update_config_rom_image
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x219cbabe	dma_region_offset_to_bus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x22ce0ebd	hpsb_alloc_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x23a6cb1c	hpsb_node_fill_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2600272b	hpsb_set_packet_complete_task
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2a4cc36b	csr1212_attach_keyval_to_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2c2a3b67	hpsb_make_lock64packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2f127ec6	hpsb_free_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2f23445a	hpsb_iso_recv_flush
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x31623f53	hpsb_make_writepacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x340c0f50	hpsb_bus_reset
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3599356a	hpsb_destroy_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x377e3716	hpsb_register_highlevel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3988b13c	hpsb_protocol_class
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3dad41ec	dma_region_mmap
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3dd0eda7	hpsb_iso_recv_start
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x41c0eb31	hpsb_alloc_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x454c9cd0	hpsb_add_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4aa919c1	hpsb_iso_shutdown
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4d15f165	hpsb_packet_sent
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x504bdad4	hpsb_iso_recv_unlisten_channel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5b21fe31	hpsb_make_lockpacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5b7859d6	hpsb_make_streampacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5f5fdd2f	csr1212_new_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x672ad148	dma_region_sync_for_device
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6c9d4f7b	hpsb_resume_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x72e74d0a	hpsb_iso_recv_listen_channel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x76bc1a5c	dma_region_free
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7cf383e2	hpsb_allocate_and_register_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7d3aa076	hpsb_packet_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x83c84c84	hpsb_get_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x86b84b76	hpsb_selfid_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x86ceb393	hpsb_iso_recv_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8879f8f0	dma_region_sync_for_cpu
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8ec2b312	dma_region_alloc
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8fa47cd5	hpsb_send_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x94bce230	csr1212_get_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x979b3052	dma_prog_region_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9923f343	hpsb_write
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9f6db424	hpsb_iso_recv_set_channel_mask
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa365ee1c	hpsb_iso_packet_sent
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa83c394e	__hpsb_register_protocol
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa924dac6	dma_prog_region_alloc
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaed0cc3e	hpsb_iso_xmit_start
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaef57bb5	csr1212_detach_keyval_from_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaefbd374	csr1212_parse_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb0254dc8	hpsb_iso_packet_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb06d6b43	hpsb_iso_n_ready
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbba70620	dma_prog_region_free
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbd2ef0c8	hpsb_selfid_complete
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbfeeae32	hpsb_iso_xmit_queue_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc10aaf46	hpsb_packet_success
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xcaa5f2ff	hpsb_iso_wake
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd3527ca7	hpsb_update_config_rom
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd48f8796	hpsb_iso_recv_release_packets
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd7bc6777	hpsb_lock
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xdefc23bc	hpsb_unregister_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe4ee98d4	hpsb_set_hostinfo_key
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe7f5a0cd	hpsb_iso_xmit_sync
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xea4152ff	dma_region_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf11a9c81	hpsb_iso_xmit_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf3ca8d24	hpsb_make_readpacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf903b0c6	hpsb_remove_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfab27536	csr1212_read
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfb334e75	hpsb_read
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfba57f51	hpsb_speedto_str
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfc71dab2	hpsb_free_tlabel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfd43a401	hpsb_iso_stop
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfd73e55a	hpsb_register_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfd99edb2	hpsb_reset_bus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfe7c25fb	hpsb_unregister_protocol
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x1d5aeebc	ohci1394_init_iso_tasklet
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x678530de	ohci1394_stop_context
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x980f1118	ohci1394_register_iso_tasklet
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0xd742072f	ohci1394_unregister_iso_tasklet
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x1557572c	gameport_unregister_port
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x1b3d1f5d	__gameport_register_driver
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x33081293	gameport_unregister_driver
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x4f0f8bb2	gameport_close
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x58667f38	gameport_start_polling
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x87d84119	__gameport_register_port
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x89266e9a	gameport_stop_polling
+EXPORT_SYMBOL drivers/input/gameport/gameport 0xa9cda190	gameport_set_phys
+EXPORT_SYMBOL drivers/input/gameport/gameport 0xab324664	gameport_open
+EXPORT_SYMBOL drivers/input/serio/libps2 0x1a1c1593	ps2_command
+EXPORT_SYMBOL drivers/input/serio/libps2 0x54a824d5	ps2_cmd_aborted
+EXPORT_SYMBOL drivers/input/serio/libps2 0x5b564c99	ps2_handle_ack
+EXPORT_SYMBOL drivers/input/serio/libps2 0x77ff094b	ps2_handle_response
+EXPORT_SYMBOL drivers/input/serio/libps2 0x7f2204bd	ps2_begin_command
+EXPORT_SYMBOL drivers/input/serio/libps2 0x9994c0ca	ps2_is_keyboard_id
+EXPORT_SYMBOL drivers/input/serio/libps2 0xa4d75252	__ps2_command
+EXPORT_SYMBOL drivers/input/serio/libps2 0xbaa988a1	ps2_end_command
+EXPORT_SYMBOL drivers/input/serio/libps2 0xbcfa8d67	ps2_init
+EXPORT_SYMBOL drivers/input/serio/libps2 0xd182d99a	ps2_drain
+EXPORT_SYMBOL drivers/input/serio/libps2 0xd66eba62	ps2_sendbyte
+EXPORT_SYMBOL drivers/input/serio/serio 0x4b3534f0	serio_unregister_child_port
+EXPORT_SYMBOL drivers/input/serio/serio 0x888d5845	serio_open
+EXPORT_SYMBOL drivers/input/serio/serio 0x8d3edd4a	__serio_register_port
+EXPORT_SYMBOL drivers/input/serio/serio 0xa6a5225d	serio_reconnect
+EXPORT_SYMBOL drivers/input/serio/serio 0xb6723241	serio_rescan
+EXPORT_SYMBOL drivers/input/serio/serio 0xb9b15758	serio_interrupt
+EXPORT_SYMBOL drivers/input/serio/serio 0xe444ab4f	serio_unregister_port
+EXPORT_SYMBOL drivers/input/serio/serio 0xe7cebd23	serio_close
+EXPORT_SYMBOL drivers/input/serio/serio 0xec69d669	__serio_register_driver
+EXPORT_SYMBOL drivers/input/serio/serio 0xf8ea2df2	serio_unregister_driver
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x0145e593	capi20_set_callback
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x04403fcf	unregister_capi_driver
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x0d644388	capi20_release
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x14f2aa5a	capi20_get_version
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2b8eab1f	capilib_free_ncci
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2baa6586	capilib_new_ncci
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x31c24aa4	capi20_isinstalled
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x47d3fc51	capi_info2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x50b33ca4	capi_cmsg2message
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x56a285d0	capi_ctr_handle_message
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x5b590d14	capi_ctr_suspend_output
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x6057c6f3	capi_message2cmsg
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x60ad9c86	capi20_register
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x62e32d43	capilib_data_b3_conf
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x71e8d5ba	capilib_data_b3_req
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7a33596c	capi20_get_serial
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7e6f1307	capi20_get_manufacturer
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x8d7d5630	capi20_put_message
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x8f699913	capilib_release
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x94674b0f	capi_ctr_ready
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x9f823278	register_capi_driver
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xa7c4fd6c	capi_message2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xaa165d27	capilib_release_appl
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb19fda8d	capi_cmd2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb60e5e5f	capi_cmsg_header
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xc1006449	detach_capi_ctr
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xc10fe128	cdebbuf_free
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xca98f5b2	capi_ctr_resume_output
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe19a11ac	capi20_get_profile
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe8ad9bd1	capi_cmsg2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xed061606	capi20_manufacturer
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xf59c2f0d	attach_capi_ctr
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xf6e28ee7	capi_ctr_down
+EXPORT_SYMBOL drivers/isdn/i4l/isdn 0xe06c5547	register_isdn
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x16f54603	bchannel_senddata
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x2348cc3c	mISDN_FsmFree
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x301a8686	mISDN_initdchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x34f8f3de	mISDN_clear_bchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3ea336fd	mISDN_FsmAddTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x429129f2	mISDN_FsmRestartTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x50c2230c	mISDN_FsmChangeState
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x545ef4b6	mISDN_register_Bprotocol
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x5dc7400a	mISDN_clock_update
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x5e7008fd	recv_Bchannel_skb
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x60f86bda	get_next_bframe
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x687656d6	get_next_dframe
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x6e2a011b	recv_Echannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x6f682684	mISDN_register_device
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x7266d2b9	mISDN_initbchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x8be60b68	queue_ch_frame
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x8e791cbe	l1_event
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xace35cae	mISDN_FsmDelTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xaf177869	mISDN_freedchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xb0e831b3	mISDN_unregister_device
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xb17339ca	confirm_Bsend
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xb89f4cd1	dchannel_senddata
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xb9b3b1fc	mISDN_freebchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xbc7d6344	mISDN_unregister_Bprotocol
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xbfc4b963	create_l1
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc3401729	mISDN_register_clock
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd0ea68c6	recv_Bchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd285995f	mISDN_clock_get
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd5145151	mISDN_FsmEvent
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd9a7fbfd	mISDN_FsmInitTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xdc2399dd	recv_Dchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe8f617eb	mISDN_unregister_clock
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf41f4d79	recv_Dchannel_skb
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf9e7832f	mISDN_FsmNew
+EXPORT_SYMBOL drivers/md/dm-log 0x457999f4	dm_dirty_log_type_unregister
+EXPORT_SYMBOL drivers/md/dm-log 0x66b6d700	dm_dirty_log_create
+EXPORT_SYMBOL drivers/md/dm-log 0xbb44ecec	dm_dirty_log_destroy
+EXPORT_SYMBOL drivers/md/dm-log 0xd4c3e10e	dm_dirty_log_type_register
+EXPORT_SYMBOL drivers/md/dm-snapshot 0x70760f05	dm_exception_store_type_unregister
+EXPORT_SYMBOL drivers/md/dm-snapshot 0x77a0ce5d	dm_exception_store_destroy
+EXPORT_SYMBOL drivers/md/dm-snapshot 0xbc86550b	dm_exception_store_type_register
+EXPORT_SYMBOL drivers/md/dm-snapshot 0xc83ecfdc	dm_exception_store_create
+EXPORT_SYMBOL drivers/md/md-mod 0x0a60e0cf	bitmap_unplug
+EXPORT_SYMBOL drivers/md/md-mod 0x12e41b28	bitmap_endwrite
+EXPORT_SYMBOL drivers/md/md-mod 0x17db9b9c	md_wakeup_thread
+EXPORT_SYMBOL drivers/md/md-mod 0x1cce6daa	md_write_end
+EXPORT_SYMBOL drivers/md/md-mod 0x2664509a	md_wait_for_blocked_rdev
+EXPORT_SYMBOL drivers/md/md-mod 0x2c17ea8c	mddev_congested
+EXPORT_SYMBOL drivers/md/md-mod 0x34a39b9d	unregister_md_personality
+EXPORT_SYMBOL drivers/md/md-mod 0x3b9a80fa	md_register_thread
+EXPORT_SYMBOL drivers/md/md-mod 0x45c26940	md_unregister_thread
+EXPORT_SYMBOL drivers/md/md-mod 0x5653a1cd	md_done_sync
+EXPORT_SYMBOL drivers/md/md-mod 0x7191acc2	md_integrity_add_rdev
+EXPORT_SYMBOL drivers/md/md-mod 0x92fa57d7	bitmap_close_sync
+EXPORT_SYMBOL drivers/md/md-mod 0x99521afb	md_integrity_register
+EXPORT_SYMBOL drivers/md/md-mod 0x9f490f45	md_error
+EXPORT_SYMBOL drivers/md/md-mod 0xa59e2a67	md_check_no_bitmap
+EXPORT_SYMBOL drivers/md/md-mod 0xab203b4b	register_md_personality
+EXPORT_SYMBOL drivers/md/md-mod 0xacbffcbe	bitmap_startwrite
+EXPORT_SYMBOL drivers/md/md-mod 0xb394d5e2	md_check_recovery
+EXPORT_SYMBOL drivers/md/md-mod 0xbe8a55fe	bitmap_start_sync
+EXPORT_SYMBOL drivers/md/md-mod 0xc13dff27	md_set_array_sectors
+EXPORT_SYMBOL drivers/md/md-mod 0xe7ecf1fd	md_write_start
+EXPORT_SYMBOL drivers/md/md-mod 0xeb7ea484	bitmap_cond_end_sync
+EXPORT_SYMBOL drivers/md/md-mod 0xf06ae90c	bitmap_end_sync
+EXPORT_SYMBOL drivers/md/raid6_pq 0x0bd662f6	raid6_gfmul
+EXPORT_SYMBOL drivers/md/raid6_pq 0x15fe0cd3	raid6_gfexp
+EXPORT_SYMBOL drivers/md/raid6_pq 0x5ba93f9d	raid6_gfinv
+EXPORT_SYMBOL drivers/md/raid6_pq 0xb0d904b7	raid6_empty_zero_page
+EXPORT_SYMBOL drivers/md/raid6_pq 0xce45a6f1	raid6_gfexi
+EXPORT_SYMBOL drivers/media/common/tuners/mc44s803 0xfe27374f	mc44s803_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mt2060 0xef69de69	mt2060_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mt2131 0xf4e1b389	mt2131_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mt2266 0xa01f7b62	mt2266_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mxl5005s 0xe3dbd950	mxl5005s_attach
+EXPORT_SYMBOL drivers/media/common/tuners/qt1010 0xe93e918b	qt1010_attach
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0x0cb4b189	tuners
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0xc2821775	tuner_count
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-xc2028 0xe32f5306	xc2028_attach
+EXPORT_SYMBOL drivers/media/common/tuners/xc5000 0xf8086c27	xc5000_attach
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x08dfd997	flexcop_pid_feed_control
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x0bd10136	flexcop_dma_control_size_irq
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x1303a39a	flexcop_i2c_request
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x2231ad69	flexcop_sram_set_dest
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x405432cb	flexcop_eeprom_check_mac_addr
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x5243afe5	flexcop_pass_dmx_data
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x560df613	flexcop_device_kmalloc
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x6efcb980	flexcop_wan_set_speed
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x72656ebc	flexcop_dma_control_timer_irq
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x7577614d	flexcop_device_initialize
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x79fb5cfb	flexcop_dma_config
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x80130d14	flexcop_sram_ctrl
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x87d02f9e	flexcop_dma_allocate
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x9db234ef	flexcop_pass_dmx_packets
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x9e2e5d25	flexcop_device_exit
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xa82c1cda	flexcop_device_kfree
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xe0b2dfef	flexcop_dump_reg
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xe8cf5595	flexcop_dma_xfer_control
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xe9cd9d76	flexcop_dma_free
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xf1bd1f2d	flexcop_dma_config_timer
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x227e90fe	bt878
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x5134da66	bt878_stop
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xcd8ac376	bt878_start
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xd5d0bdef	bt878_num
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xf2d40819	bt878_device_control
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x4320214d	dst_error_bailout
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x52baf3d6	rdc_reset_state
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x74889673	write_dst
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x8102a8d4	dst_wait_dst_ready
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x8e4b93fe	dst_pio_disable
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x9e1fc702	read_dst
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xd46bec13	dst_comm_init
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xe7efad00	dst_attach
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xe94b8c9c	dst_check_sum
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xf200e9d0	dst_error_recovery
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst_ca 0x3bc0b8c6	dst_ca_attach
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x00cbdc37	dvb_ringbuffer_flush_spinlock_wakeup
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0c4d4a14	dvb_frontend_sleep_until
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x10bf3463	dvb_ca_en50221_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x13ee8494	dvb_ringbuffer_free
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x14c136db	dvb_ringbuffer_empty
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x19891930	dvb_unregister_frontend
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x1e60b7a1	dvb_dmx_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x3ae1c278	dvb_frontend_reinitialise
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x401af322	dvb_frontend_detach
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x463544e4	dvb_generic_open
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x46ad5d39	dvb_net_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x4a5ad2b0	dvb_ringbuffer_read_user
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x4b10938b	dvb_dmxdev_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x57758934	dvb_ca_en50221_frda_irq
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x5908fe37	dvb_dmx_swfilter
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x5b00432c	dvb_generic_ioctl
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x5f46252a	dvb_ca_en50221_camchange_irq
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6847baa3	dvb_ca_en50221_camready_irq
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6b00c62c	dvb_ringbuffer_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x74a5a698	dvb_filter_pes2ts_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x7752de0d	dvb_unregister_adapter
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x80e3832d	dvb_filter_get_ac3info
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x84813a02	dvb_dmx_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x8f6a608d	dvb_net_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xa91f1771	dvb_register_adapter
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xac4ca1b0	intlog2
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xbc0d91e1	timeval_usec_diff
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xbf5fa134	dvb_register_device
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xbf693839	dvb_ca_en50221_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xcc41083f	dvb_ringbuffer_write
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe20c965c	dvb_dmx_swfilter_204
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe232a600	dvb_generic_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe4fecb03	dvb_unregister_device
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe54b83ca	dvb_ringbuffer_read
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe5ae8707	intlog10
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe8074fa5	dvb_ringbuffer_avail
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xed9062b8	dvb_register_frontend
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf2031ad9	dvb_dmx_swfilter_packets
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf5ae8c7a	dvb_dmxdev_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf826deb0	dvb_filter_pes2ts
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x060a3a49	dvb_usb_device_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x381960ab	dvb_usb_generic_write
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x82a2b6ec	dvb_usb_get_hexline
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x939e1d73	dvb_usb_generic_rw
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xb3d6f5b3	dvb_usb_nec_rc_key_to_event
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xe26e86fb	usb_cypress_load_firmware
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xeae2012e	dvb_usb_device_exit
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x3693500b	af9005_rc_keys
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x641773d1	af9005_rc_decode
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0xd3383957	af9005_rc_keys_size
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x34538caf	dibusb_rc_query
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x377413a7	dibusb_dib3000mc_frontend_attach
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x3e5dab75	dibusb2_0_power_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x419fa08d	dibusb_streaming_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x7a6a3360	dibusb_i2c_algo
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x7e9b2c88	dibusb2_0_streaming_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x829435a4	dibusb_power_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x8912b39e	dibusb_read_eeprom_byte
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x9da2fa87	dibusb_pid_filter
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xb3c8adae	dibusb_pid_filter_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xcc9ccaff	dibusb_rc_keys
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xe95ccd2b	dibusb_dib3000mc_tuner_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/af9013 0x48c2894d	af9013_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/au8522 0x748abb72	au8522_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/bcm3510 0x82aa1c77	bcm3510_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx22700 0xd6a5d8a7	cx22700_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx22702 0x8be3af45	cx22702_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24110 0x24140a68	cx24110_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0x0e7ba0c0	cx24113_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0xfa98fd04	cx24113_agc_callback
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24116 0xc809659a	cx24116_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0x3fb88b23	cx24123_get_tuner_i2c_adapter
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0x5fff53da	cx24123_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0x29b57135	dib0070_ctrl_agc_filter
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0xcffdb384	dib0070_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0xf203fc7f	dib0070_wbd_offset
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mb 0x0f8730a0	dib3000mb_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x38d97c79	dib3000mc_pid_parse
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x3deccc93	dib3000mc_set_config
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x65c26287	dib3000mc_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x9ea598bf	dib3000mc_i2c_enumeration
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xa992ffdb	dib3000mc_pid_control
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xea3c0b23	dib3000mc_get_tuner_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0x3d3937c7	dib7000m_get_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0x46f301fa	dib7000m_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x27760831	dib7000pc_detection
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x3b186e1f	dib7000p_i2c_enumeration
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x51842acd	dib7000p_set_gpio
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x671a695f	dib7000p_get_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xa7e965a5	dib7000p_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xf977dccd	dib7000p_set_wbd_ref
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x129834f3	dib8000_i2c_enumeration
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x2b2fcc11	dib8000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x475a89a1	dib8000_get_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0xd0af5923	dib8000_set_gpio
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0xf68e30e9	dib8000_set_wbd_ref
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x15888652	dibx000_get_i2c_adapter
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x1792efbb	dibx000_reset_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x61d5e326	dibx000_init_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x99ce73fb	dibx000_exit_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dvb-pll 0x4745422f	dvb_pll_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/isl6405 0xe35d94bb	isl6405_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/isl6421 0x6a4438d8	isl6421_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/isl6423 0x44aebae7	isl6423_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/itd1000 0xd036dcd5	itd1000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/l64781 0x9ace7217	l64781_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt3305 0x9625fbce	lgdt3305_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt330x 0x3d32cdfe	lgdt330x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lgs8gxx 0x01ee60b6	lgs8gxx_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0x2d831181	lnbh24_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0x83556c82	lnbp21_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/mt312 0xd24e3e50	mt312_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/mt352 0x85ea0f8c	mt352_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/nxt200x 0x53458038	nxt200x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/nxt6000 0x05dfdf15	nxt6000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/or51132 0x430c2b79	or51132_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/or51211 0x4fe8e389	or51211_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1409 0x983609c9	s5h1409_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1411 0xfbc85ce8	s5h1411_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0xec21729e	s5h1420_get_tuner_i2c_adapter
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0xf4fad5e6	s5h1420_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/si21xx 0x853f02ee	si21xx_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/sp8870 0x4a1fa89f	sp8870_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/sp887x 0xde238b2d	sp887x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stb0899 0xba2ba14a	stb0899_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stb6000 0x2ebf8f20	stb6000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stb6100 0x36179934	stb6100_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0288 0x31c75ddf	stv0288_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0297 0xa759b425	stv0297_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0299 0xa4d5f994	stv0299_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0900 0xf9a1df58	stv0900_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv090x 0xc0adee93	stv090x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv6110 0x46349e93	stv6110_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv6110x 0x58592211	stv6110x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10021 0xc42017e9	tda10021_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10023 0xadae7ce1	tda10023_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10048 0xbefce3ae	tda10048_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x15e3b46e	tda10045_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x74874064	tda10046_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10086 0xc1a17e09	tda10086_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda8083 0xf963d192	tda8083_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda8261 0xa4b22d6c	tda8261_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda826x 0x18c1a005	tda826x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tua6100 0xf5b3ac5e	tua6100_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/ves1820 0xa7514391	ves1820_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/ves1x93 0x7ac3c991	ves1x93_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/zl10036 0x6c3d1dda	zl10036_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/zl10039 0xb5dc0a7f	zl10039_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/zl10353 0x8b0cbfd1	zl10353_attach
+EXPORT_SYMBOL drivers/media/dvb/ttpci/ttpci-eeprom 0x9b719d7d	ttpci_eeprom_parse_mac
+EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0x8a1c0cb2	ttusbdecfe_dvbs_attach
+EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0xa1db0d78	ttusbdecfe_dvbt_attach
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x11dc4b6d	bttv_gpio_enable
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x882ee448	bttv_sub_unregister
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x8ecf4acc	bttv_write_gpio
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xbcf2d2fb	bttv_read_gpio
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xcedae7da	bttv_sub_register
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xf82f82fa	bttv_get_pcidev
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0x495e4b0c	btcx_calc_skips
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0x5e519e47	btcx_riscmem_free
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0x62953db6	btcx_riscmem_alloc
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xad2fe38b	btcx_sort_clips
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xc368f8e6	btcx_align
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xcda0ded2	btcx_screen_clips
+EXPORT_SYMBOL drivers/media/video/cx18/cx18 0x2cdea06d	cx18_reset_ir_gpio
+EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0xd9957b6c	cx231xx_register_extension
+EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0xf9be9f96	cx231xx_unregister_extension
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x155650f3	cx2341x_ctrl_get_menu
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x1ca0c084	cx2341x_log_status
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x2f25eee2	cx2341x_update
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x5b88faf6	cx2341x_ext_ctrls
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf76ce95	cx2341x_fill_defaults
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf8b77a4	cx2341x_mpeg_ctrls
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xe2c2b5eb	cx2341x_ctrl_query
+EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0x3233dde5	vp3054_i2c_probe
+EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0xb189976c	vp3054_i2c_remove
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x47fdd369	cx8800_ctrl_query
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x5c4fda96	cx88_set_control
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x7feff1b4	cx88_set_freq
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x947e71f3	cx88_video_mux
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xa72f3ec2	cx88_get_control
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xac4e53b9	cx88_user_ctrls
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xd9807c63	cx88_enum_input
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x00cc0a3e	cx8802_buf_prepare
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x3acafe23	cx8802_cancel_buffers
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x6d12bb12	cx8802_get_driver
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x7296cbe4	cx8802_unregister_driver
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x7acb6ea3	cx8802_buf_queue
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xed0240d4	cx8802_register_driver
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xf21941e6	cx8802_get_device
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x02bafc6c	cx88_set_tvaudio
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x334e0885	cx88_free_buffer
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x33e00dff	cx88_ir_stop
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x501f88d3	cx88_core_put
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x55e2b8cd	cx88_ir_start
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x5b356262	cx88_risc_stopper
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x6141c8c5	cx88_tuner_callback
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x6baa1766	cx88_core_irq
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x6d6698d9	cx88_set_stereo
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x7303465b	cx88_risc_buffer
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x7a65b477	cx88_wakeup
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x83432abb	cx88_newstation
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x83c99eef	cx88_set_scale
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x8863e7d9	cx88_sram_channel_setup
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x904b8696	cx88_audio_thread
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x9b140fff	cx88_sram_channels
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xae2dce89	cx88_reset
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb47f6cda	cx88_print_irqbits
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xbcb4a47a	cx88_dsp_detect_stereo_sap
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xbd5c85f3	cx88_set_tvnorm
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xc5341d8f	cx88_shutdown
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xcb5c96ed	cx88_core_get
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xdfbe0393	cx88_sram_channel_dump
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xf52679e0	cx88_get_stereo
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xf6104114	cx88_vdev_init
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xf8ff4618	cx88_risc_databuffer
+EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0x6d814f35	em28xx_unregister_extension
+EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0x9d2e2f2a	em28xx_register_extension
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x04aecebd	gspca_get_i_frame
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x21e39d7d	gspca_dev_probe
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x2413bddf	gspca_suspend
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x9670af2c	gspca_debug
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x97c55b62	gspca_auto_gain_n_exposure
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xe618608d	gspca_frame_add
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xe6e3ddb2	gspca_disconnect
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xea8942b9	gspca_resume
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x14895cd5	ivtv_api
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x14f67530	ivtv_debug
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x5be95301	ivtv_init_on_first_open
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x64dad215	ivtv_clear_irq_mask
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xac8ee917	ivtv_udma_prepare
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xc3f5925a	ivtv_reset_ir_gpio
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xcc3eb920	ivtv_vapi_result
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xd84a4997	ivtv_set_irq_mask
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xe08b720c	ivtv_udma_setup
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xe28c292f	ivtv_udma_alloc
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xe40abfe6	ivtv_udma_unmap
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xf066d68c	ivtv_vapi
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x04e83446	saa7134_tuner_callback
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x0564620c	saa7134_dmasound_init
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x05ddde39	saa7134_tvaudio_setmute
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x0830d053	saa7134_pgtable_build
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x1211df5d	saa7134_devlist
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x14dfecc6	saa7134_boards
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x27fd8a0a	saa7134_devlist_lock
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x39b3fb8f	saa7134_dmasound_exit
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x3cc4a58f	saa7134_pgtable_alloc
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x490e4f66	saa7134_pgtable_free
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xc90330ee	saa7134_ts_unregister
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xdb94a54c	saa_dsp_writel
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xe2c66f45	saa7134_ts_register
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xeca94645	saa7134_set_dmabits
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xee7a3b38	saa7134_set_gpio
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x2992a72d	soc_camera_xlate_by_fourcc
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x734105fa	soc_camera_apply_sensor_flags
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x94da902c	soc_camera_host_register
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x9c81855e	soc_camera_host_unregister
+EXPORT_SYMBOL drivers/media/video/soc_camera 0xd59ddee0	soc_camera_format_by_fourcc
+EXPORT_SYMBOL drivers/media/video/tveeprom 0x03c170e6	tveeprom_read
+EXPORT_SYMBOL drivers/media/video/tveeprom 0x4ff4fbae	tveeprom_hauppauge_analog
+EXPORT_SYMBOL drivers/media/video/v4l1-compat 0x531d29cb	v4l_compat_translate_ioctl
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x03165a85	v4l2_ctrl_get_menu
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1dcaa0c8	v4l2_prio_max
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1e326b97	v4l2_ctrl_query_fill
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x2f639468	v4l2_prio_check
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x42c8e001	v4l2_ctrl_next
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x495426ee	v4l2_ctrl_get_name
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x4b31f872	v4l2_chip_ident_i2c_client
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x4ed5e0d7	v4l2_chip_match_host
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x50766d69	v4l2_ctrl_query_menu_valid_items
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x76ba9a9a	v4l2_prio_open
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x95284709	v4l2_prio_close
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9c7de443	v4l2_prio_change
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9eb43ee2	v4l2_ctrl_check
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0xbecd2858	v4l2_prio_init
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0xc715ecb5	v4l2_chip_match_i2c_client
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0xd9ee1e3f	v4l2_ctrl_query_menu
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x11b6b472	videobuf_dvb_get_frontend
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x5581f453	videobuf_dvb_find_frontend
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x79ae2e93	videobuf_dvb_dealloc_frontends
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xb7412252	videobuf_dvb_register_bus
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xc0d546f1	videobuf_dvb_alloc_frontend
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xf85e5130	videobuf_dvb_unregister_bus
+EXPORT_SYMBOL drivers/media/video/videodev 0x0614dd5a	v4l2_video_std_frame_period
+EXPORT_SYMBOL drivers/media/video/videodev 0x11f7f60e	video_unregister_device
+EXPORT_SYMBOL drivers/media/video/videodev 0x123959a1	v4l2_type_names
+EXPORT_SYMBOL drivers/media/video/videodev 0x29e61cd4	video_ioctl2
+EXPORT_SYMBOL drivers/media/video/videodev 0x2bccaad1	video_device_release_empty
+EXPORT_SYMBOL drivers/media/video/videodev 0x354eb4b6	video_register_device
+EXPORT_SYMBOL drivers/media/video/videodev 0x3adbd595	v4l2_field_names
+EXPORT_SYMBOL drivers/media/video/videodev 0x3d544f08	video_register_device_no_warn
+EXPORT_SYMBOL drivers/media/video/videodev 0x3f673473	video_device_alloc
+EXPORT_SYMBOL drivers/media/video/videodev 0x52647bc7	video_usercopy
+EXPORT_SYMBOL drivers/media/video/videodev 0x5ebefe4b	v4l_printk_ioctl
+EXPORT_SYMBOL drivers/media/video/videodev 0x67c50352	video_device_release
+EXPORT_SYMBOL drivers/media/video/videodev 0xbbaacd57	video_devdata
+EXPORT_SYMBOL drivers/media/video/videodev 0xe2b92059	v4l2_video_std_construct
+EXPORT_SYMBOL drivers/media/video/videodev 0xf3251e7b	v4l2_norm_to_name
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x4ff05e30	videocodec_unregister
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x6492eeed	videocodec_detach
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0xb00409ba	videocodec_register
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0xd8cfaf70	videocodec_attach
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x00473d34	i2o_device_claim
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x172af21c	i2o_driver_unregister
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x1acf7995	i2o_driver_notify_device_remove_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x1ae8bf29	i2o_parm_table_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x1c71f7b8	i2o_msg_post_wait_mem
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2a843bef	i2o_dump_message
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x32fdffca	i2o_iop_find_device
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x4068a9ee	i2o_driver_notify_controller_add_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x4cf637ae	i2o_find_iop
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x55ee28bf	i2o_driver_register
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x6216905d	i2o_parm_field_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x74ed4c2a	i2o_parm_issue
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x897f3f58	i2o_device_claim_release
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x9853c1fe	i2o_driver_notify_controller_remove_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xade0c2b2	i2o_status_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb4c00dcf	i2o_controllers
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb8d55565	i2o_msg_get_wait
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xd0ef56af	i2o_driver_notify_device_add_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xe6336d11	i2o_event_register
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xfb42f5a4	i2o_exec_lct_get
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x1c64b390	ab3100_event_registers_startup_state_get
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x45388a81	ab3100_get_register_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x7c9c8450	ab3100_set_register_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x9629ee6a	ab3100_get_chip_type
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xc43ab32c	ab3100_event_register
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xcbd21237	ab3100_mask_and_set_register_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xcddd9f78	ab3100_event_unregister
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xdc9b8273	ab3100_get_register_page_interruptible
+EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x6bb2106d	pasic3_read_register
+EXPORT_SYMBOL drivers/mfd/htc-pasic3 0xc99d54bc	pasic3_write_register
+EXPORT_SYMBOL drivers/mfd/tps65010 0x02d4ad0f	tps65013_set_low_pwr
+EXPORT_SYMBOL drivers/mfd/tps65010 0x28485130	tps65010_config_vregs1
+EXPORT_SYMBOL drivers/mfd/tps65010 0x33739de7	tps65010_set_vib
+EXPORT_SYMBOL drivers/mfd/tps65010 0x9fd44c69	tps65010_set_led
+EXPORT_SYMBOL drivers/mfd/tps65010 0xb14080cc	tps65010_set_low_pwr
+EXPORT_SYMBOL drivers/mfd/tps65010 0xd5bb106d	tps65010_set_vbus_draw
+EXPORT_SYMBOL drivers/mfd/tps65010 0xe99b3f36	tps65010_set_gpio_out_value
+EXPORT_SYMBOL drivers/misc/c2port/core 0x3265929c	c2port_device_register
+EXPORT_SYMBOL drivers/misc/c2port/core 0xe7071dc4	c2port_device_unregister
+EXPORT_SYMBOL drivers/misc/ioc4 0x6d02374b	ioc4_unregister_submodule
+EXPORT_SYMBOL drivers/misc/ioc4 0x7db690ba	ioc4_register_submodule
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x3022a4f7	cfi_varsize_frob
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x74dee29c	cfi_fixup
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0xa8ad8c6f	cfi_read_pri
+EXPORT_SYMBOL drivers/mtd/chips/gen_probe 0xc836803e	mtd_do_chip_probe
+EXPORT_SYMBOL drivers/mtd/lpddr/lpddr_cmds 0xce974fc9	lpddr_cmdset
+EXPORT_SYMBOL drivers/mtd/mtdconcat 0x9b430c4c	mtd_concat_destroy
+EXPORT_SYMBOL drivers/mtd/mtdconcat 0xa8b45d3f	mtd_concat_create
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x3a092ec4	flexonenand_region
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x3cab836e	onenand_addr
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x61e4ebcd	onenand_default_bbt
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0xdfd23d62	onenand_scan_bbt
+EXPORT_SYMBOL drivers/net/8390 0x04abdb7d	NS8390_init
+EXPORT_SYMBOL drivers/net/8390 0x1a789065	ei_start_xmit
+EXPORT_SYMBOL drivers/net/8390 0x2f3162f7	ei_close
+EXPORT_SYMBOL drivers/net/8390 0x4c4764d3	ei_poll
+EXPORT_SYMBOL drivers/net/8390 0x57270510	ei_tx_timeout
+EXPORT_SYMBOL drivers/net/8390 0x6dd41a35	ei_open
+EXPORT_SYMBOL drivers/net/8390 0x7c420746	ei_set_multicast_list
+EXPORT_SYMBOL drivers/net/8390 0xbe91f5a4	__alloc_ei_netdev
+EXPORT_SYMBOL drivers/net/8390 0xc7c56a10	ei_get_stats
+EXPORT_SYMBOL drivers/net/8390 0xdd365790	ei_interrupt
+EXPORT_SYMBOL drivers/net/8390 0xf63e125e	ei_netdev_ops
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x019bb525	arcnet_unregister_proto
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x23f86078	arcnet_interrupt
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x33df39a5	alloc_arcdev
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x6534792a	arcnet_debug
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x6f488fbc	arcnet_close
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x720c7806	arcnet_open
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x788f9164	arcnet_send_packet
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x89a25f4c	arc_bcast_proto
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xce6716b0	arcnet_timeout
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xd96a975b	arc_raw_proto
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xf45667e3	arc_proto_default
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xf72ef3e6	arc_proto_map
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x1a65e884	hdlcdrv_unregister
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x5e108d9d	hdlcdrv_arbitrate
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x754b85c4	hdlcdrv_transmitter
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xa2bea749	hdlcdrv_register
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xca7e70da	hdlcdrv_receiver
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x02f7a593	sirdev_set_dtr_rts
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x0a3aa63c	sirdev_set_dongle
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x2467cecb	sirdev_raw_write
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x3e274564	sirdev_receive
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x69a7a094	sirdev_raw_read
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x72706e27	sirdev_get_instance
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xad2fa114	irda_register_dongle
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xd392a54e	irda_unregister_dongle
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xe429e2d5	sirdev_write_complete
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xea5f38d2	sirdev_put_instance
+EXPORT_SYMBOL drivers/net/ppp_generic 0x09f9e578	ppp_channel_index
+EXPORT_SYMBOL drivers/net/ppp_generic 0x35d832d9	ppp_register_compressor
+EXPORT_SYMBOL drivers/net/ppp_generic 0x5957cc4e	ppp_register_channel
+EXPORT_SYMBOL drivers/net/ppp_generic 0x5fa012f6	ppp_input_error
+EXPORT_SYMBOL drivers/net/ppp_generic 0x686121ee	ppp_unit_number
+EXPORT_SYMBOL drivers/net/ppp_generic 0x71334f1e	ppp_register_net_channel
+EXPORT_SYMBOL drivers/net/ppp_generic 0xb3f50c72	ppp_output_wakeup
+EXPORT_SYMBOL drivers/net/ppp_generic 0xcdc1a2c9	ppp_unregister_compressor
+EXPORT_SYMBOL drivers/net/ppp_generic 0xe7b57d55	ppp_input
+EXPORT_SYMBOL drivers/net/ppp_generic 0xfe2b99ee	ppp_unregister_channel
+EXPORT_SYMBOL drivers/net/pppox 0x4688278b	pppox_ioctl
+EXPORT_SYMBOL drivers/net/pppox 0x8da8c45f	register_pppox_proto
+EXPORT_SYMBOL drivers/net/pppox 0xbed54298	pppox_unbind_sock
+EXPORT_SYMBOL drivers/net/pppox 0xe0ff7a18	unregister_pppox_proto
+EXPORT_SYMBOL drivers/net/slhc 0x0ff2b602	slhc_compress
+EXPORT_SYMBOL drivers/net/slhc 0x23c8f257	slhc_uncompress
+EXPORT_SYMBOL drivers/net/slhc 0xa63d85ab	slhc_remember
+EXPORT_SYMBOL drivers/net/slhc 0xb5ca1c46	slhc_free
+EXPORT_SYMBOL drivers/net/slhc 0xdfc5169b	slhc_init
+EXPORT_SYMBOL drivers/net/slhc 0xe8794ce1	slhc_toss
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x296dae59	ath_rxbuf_alloc
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x31219afb	ath_is_world_regd
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x4e101d0f	ath_reg_notifier_apply
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x58dd3b31	ath_regd_init
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xbe25b39d	ath_regd_get_band_ctl
+EXPORT_SYMBOL drivers/net/wireless/atmel 0x8f73779e	init_atmel_card
+EXPORT_SYMBOL drivers/net/wireless/atmel 0x96f6766a	stop_atmel_card
+EXPORT_SYMBOL drivers/net/wireless/atmel 0xa482a077	atmel_open
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x25fccdb1	hostap_info_init
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x3373b8fb	hostap_info_process
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x36b416b7	hostap_set_string
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x38e3a0b2	hostap_check_sta_fw_version
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x3bc38e20	hostap_init_data
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x49344ce7	hostap_80211_rx
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x58fdb6ac	prism2_update_comms_qual
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x59bd3151	hostap_set_encryption
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x5fc4ac0a	hostap_master_start_xmit
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x6e067560	hostap_80211_ops
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x6e880974	hostap_set_word
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x6fab6ece	hostap_set_roaming
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x7f55a924	hostap_set_multicast_list_queue
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x8d5d21b7	hostap_set_hostapd
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x986403d8	hostap_set_auth_algs
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x9a7376bb	hostap_set_hostapd_sta
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa12ad27f	hostap_dump_tx_header
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa7ddfdf9	hostap_setup_dev
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa8840b99	hostap_add_interface
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xac055a83	hostap_free_data
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb2a945e0	hostap_dump_rx_header
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb4b77c8b	hostap_80211_get_hdrlen
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb8c12667	hostap_init_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xbc023c3d	hostap_handle_sta_tx_exc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xc3b770dc	hostap_set_antsel
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xc3c9f607	hostap_init_ap_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xdaa89211	hostap_remove_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xe512e7bc	hostap_get_porttype
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf45cdb46	hostap_remove_interface
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x1b293e1e	free_ieee80211
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x2eed28a5	libipw_is_valid_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x48d7f123	libipw_get_geo
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x4caeb069	libipw_txb_free
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x58f84844	libipw_rx_mgt
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x5dff80b3	libipw_wx_get_encode
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x6d6dd411	libipw_wx_set_encode
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x75f6fd32	libipw_wx_get_scan
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x80e49681	libipw_get_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x8252b519	libipw_wx_set_encodeext
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x93c03e7b	libipw_networks_age
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x9878561f	libipw_wx_get_encodeext
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x9ad9d88c	libipw_change_mtu
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x9cda4d51	alloc_ieee80211
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x9e7c4478	libipw_channel_to_index
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xa5a12491	libipw_set_geo
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xb08e1060	libipw_freq_to_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xde6bf192	libipw_xmit
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xed135633	libipw_get_channel_flags
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xf4635863	libipw_rx
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xfaab14c3	libipw_channel_to_freq
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x00566273	iwl_set_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x00bf0154	iwl_tt_handler
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x02ac731b	iwl_send_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x09c25450	iwlcore_eeprom_verify_signature
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x09c74c60	iwl_mac_get_tx_stats
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0ae9b303	iwl_send_static_wepkey_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0b2a7e1d	iwl_rx_reply_error
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0c2cf556	iwl_send_cmd_pdu_async
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x10014f77	iwl_hwrate_to_tx_control
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x11492c90	iwl_clear_stations_table
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x11d75447	iwl_sensitivity_calibration
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1468b527	iwl_set_tx_power
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x146a336d	iwl_update_tkip_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x153c106c	iwl_rx_queue_space
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x164a6915	iwl_sta_rx_agg_start
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x19f0e900	iwl_debug_level
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1b6eeb53	iwl_send_cmd_pdu
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d4978a6	iwl_eeprom_query16
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d77b399	iwl_bcast_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1e9a22bb	iwl_get_passive_dwell_time
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x226f51fd	iwl_rxq_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x25201650	iwl_pci_suspend
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x275ec892	iwl_set_hw_params
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2939ea12	iwl_sta_rx_agg_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2d42ee07	iwl_cmd_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2d8f11a6	iwlcore_eeprom_release_semaphore
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2dd255ea	iwl_send_cmd_sync
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x337af347	iwl_reset_qos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x342a4e19	iwl_pci_resume
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x362bf253	iwl_eeprom_get_mac
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x385d70a8	iwl_activate_qos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x393d26ef	iwl_tt_initialize
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3b71b6d4	iwl_get_sta_id
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3f4c0d72	iwl_chain_noise_calibration
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x41418918	iwl_send_statistics_request
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4172e47f	iwl_add_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x41bc54d6	iwl_set_dynamic_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x41e13554	iwl_find_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x41f6a3a9	iwl_hw_nic_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4233c1ad	iwlcore_eeprom_query_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x42cb1fbd	iwl_send_bt_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4330b89d	iwl_mac_beacon_update
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x43601a94	iwl_txq_update_write_ptr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x47e57c74	iwl_eeprom_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x496b90da	iwl_tx_queue_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4bdb1155	iwl_bss_info_changed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4eec9385	iwl_eeprom_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4f2a42de	iwlcore_free_geos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x51505699	iwl_rx_reply_compressed_ba
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x55b9c9f0	iwl_remove_default_wep_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x57b82018	iwl_mac_conf_tx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x57cbf908	iwl_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x583c30dd	iwl_get_channel_info
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x58fe09ef	iwl_free_tfds_in_queue
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x596f9724	iwl_mac_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x59c1364a	iwl_remove_dynamic_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5ef9fd8e	iwl_tx_agg_start
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5f952485	iwl_power_update_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6048efc2	iwl_set_rxon_hwcrypto
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x61cbeee8	iwl_verify_ucode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x62727d56	iwl_calib_set
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x62859d17	iwl_eeprom_check_version
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x63b70c88	iwl_get_active_dwell_time
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x63b82c0e	iwl_reset_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x65be11a3	iwl_set_decrypted_flag
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x691b4e5d	iwl_tt_exit
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6afc410c	iwl_tx_ant_restriction
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6cef52d7	iwl_connection_init_rx_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6d245008	iwl_rx_replenish_now
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x76b86ab5	iwl_scan_cancel_timeout
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x77083434	iwl_power_initialize
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x78976e61	iwl_isr_legacy
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x78eca435	iwl_rx_pm_debug_statistics_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x79502c96	iwl_get_free_ucode_key_index
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x795adc29	iwl_is_monitor_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7a3a5f0f	iwl_send_calib_results
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7cc87a80	iwl_setup_mac
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7e0bda83	iwl_irq_handle_error
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x80171dba	iwl_send_add_sta
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8670273d	iwl_hwrate_to_plcp_idx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x86a47e60	iwl_rx_statistics
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8768e99a	iwlcore_eeprom_enhanced_txpower
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x891ad7b6	iwl_tx_cmd_complete
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8cc3f305	iwl_leds_unregister
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8e423c58	iwl_disable_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8e8f8921	iwl_tx_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8f37f04f	iwl_scan_cancel
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x91e398a8	iwl_free_channel_map
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x92b4c9de	iwl_mac_hw_scan
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x940a1973	iwl_rxon_add_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x98b53c34	iwl_alloc_all
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9998a0d1	iwl_send_lq_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9a60af0b	iwl_bg_scan_check
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9af0fbd9	iwl_txq_ctx_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9c98ed18	iwl_set_rxon_ht
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9cddf180	iwl_rf_kill_ct_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9cde1f24	iwl_queue_space
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9e86e8e0	iwl_bg_abort_scan
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9f9c2227	iwl_set_default_wep_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa08512be	iwl_init_sensitivity
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa22f3c05	iwl_rx_csa
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa2ef5180	iwl_setup_rxon_timing
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa3307415	iwl_free_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa33fd535	iwl_ht_enabled
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa8afc76e	iwl_rx_reply_rx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa9596b8e	iwl_set_rxon_channel
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa9f94e97	iwl_rx_missed_beacon_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaad0846e	iwl_bg_scan_completed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaea2a8c1	iwl_full_rxon_required
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb248486d	iwl_get_ra_sta_id
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb26d0184	iwl_mac_remove_interface
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb4b970da	iwl_mac_reset_tsf
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb99a9a1e	iwl_mac_add_interface
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbd0f9480	iwl_configure_filter
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc076a9e5	iwl_tt_exit_ct_kill
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc52281ca	iwl_check_rxon_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc9a3ea21	iwl_uninit_drv
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xca8bfda2	iwl_init_drv
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcbaf4931	get_cmd_string
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcbaf7d09	iwlcore_eeprom_acquire_semaphore
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcf156a0f	iwl_hw_txq_ctx_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcf61fc30	iwl_reset_run_time_calib
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd386b01d	iwl_hw_detect
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd40e8eee	iwl_init_channel_map
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd675c02e	iwl_setup_scan_deferred_work
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd67b105c	iwl_tx_agg_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdc58563b	iwl_fill_probe_req
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe04ab893	iwl_leds_register
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe0813b6f	iwl_sta_tx_modify_enable_tid
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe1615356	iwl_rx_queue_update_write_ptr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe3fb8042	iwl_rx_queue_restock
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe5c7e00f	iwl_rate_get_lowest_plcp
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe7ce5d70	iwl_rates
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xea100995	iwl_set_rxon_chain
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xea597930	iwl_tx_queue_reclaim
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xebca4520	iwl_tt_enter_ct_kill
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xec7108ac	iwl_rx_pm_sleep_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xed0b2a2c	iwl_alloc_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf15a9637	iwl_rx_replenish
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf3fc23f4	iwlcore_init_geos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf6305110	iwl_rx_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfa79d8a7	iwl_is_ht40_tx_allowed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfb2a5e32	iwl_tx_skb
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfb9c8500	iwl_eeprom_query_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfc2538d7	iwl_rx_reply_rx_phy
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfd8709b6	iwl_setup_rx_scan_handlers
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfe1cb02e	iwl_rx_queue_alloc
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xff381f95	iwl_txq_check_empty
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x4196c38b	hermes_write_ltv
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x42f2e124	orinoco_if_add
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x6a927e18	orinoco_interrupt
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xa031d8e4	hermes_doicmd_wait
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xa3265d9c	orinoco_init
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xb20835fb	orinoco_if_del
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc60b5e9e	hermes_bap_pwrite
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc6d635e3	alloc_orinocodev
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xcfa4684d	orinoco_up
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd38d8ae2	hermes_read_ltv
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd3f714e5	hermes_bap_pread
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5168829	hermes_allocate
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5336e5d	hermes_init
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd54e219d	hermes_docmd_wait
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xed47b224	hermes_struct_init
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xf1e2180b	free_orinocodev
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xfd9f1113	orinoco_down
+EXPORT_SYMBOL drivers/parport/parport 0x0d1e2398	parport_register_driver
+EXPORT_SYMBOL drivers/parport/parport 0x216ae941	parport_ieee1284_ecp_write_data
+EXPORT_SYMBOL drivers/parport/parport 0x3e888916	parport_unregister_device
+EXPORT_SYMBOL drivers/parport/parport 0x40e2608a	parport_negotiate
+EXPORT_SYMBOL drivers/parport/parport 0x45c8af8a	parport_ieee1284_epp_write_addr
+EXPORT_SYMBOL drivers/parport/parport 0x484808cc	parport_wait_peripheral
+EXPORT_SYMBOL drivers/parport/parport 0x4d2a941b	parport_ieee1284_interrupt
+EXPORT_SYMBOL drivers/parport/parport 0x52f06a41	parport_release
+EXPORT_SYMBOL drivers/parport/parport 0x67bcd2c4	parport_write
+EXPORT_SYMBOL drivers/parport/parport 0x6d45022b	parport_read
+EXPORT_SYMBOL drivers/parport/parport 0x72d9b8b9	parport_ieee1284_epp_read_addr
+EXPORT_SYMBOL drivers/parport/parport 0x7d515d85	parport_find_number
+EXPORT_SYMBOL drivers/parport/parport 0x8175baea	parport_register_port
+EXPORT_SYMBOL drivers/parport/parport 0x8aae49b8	parport_put_port
+EXPORT_SYMBOL drivers/parport/parport 0x8f00fdc3	parport_unregister_driver
+EXPORT_SYMBOL drivers/parport/parport 0x9d5eff70	parport_irq_handler
+EXPORT_SYMBOL drivers/parport/parport 0xa0b4a56f	parport_ieee1284_epp_write_data
+EXPORT_SYMBOL drivers/parport/parport 0xa4f49530	parport_register_device
+EXPORT_SYMBOL drivers/parport/parport 0xb15cc097	parport_ieee1284_write_compat
+EXPORT_SYMBOL drivers/parport/parport 0xb94a9603	parport_ieee1284_read_nibble
+EXPORT_SYMBOL drivers/parport/parport 0xbf3998c6	parport_claim
+EXPORT_SYMBOL drivers/parport/parport 0xc416e3a4	parport_ieee1284_ecp_write_addr
+EXPORT_SYMBOL drivers/parport/parport 0xcabead07	parport_ieee1284_epp_read_data
+EXPORT_SYMBOL drivers/parport/parport 0xd5c497a8	parport_get_port
+EXPORT_SYMBOL drivers/parport/parport 0xdfe79f95	parport_find_base
+EXPORT_SYMBOL drivers/parport/parport 0xe0311d31	parport_claim_or_block
+EXPORT_SYMBOL drivers/parport/parport 0xe6f167a1	parport_ieee1284_read_byte
+EXPORT_SYMBOL drivers/parport/parport 0xee1fe898	parport_wait_event
+EXPORT_SYMBOL drivers/parport/parport 0xf0cdc6f6	parport_ieee1284_ecp_read_data
+EXPORT_SYMBOL drivers/parport/parport 0xf854f394	parport_announce_port
+EXPORT_SYMBOL drivers/parport/parport 0xf911e1c6	parport_set_timeout
+EXPORT_SYMBOL drivers/parport/parport 0xfd08bee3	parport_remove_port
+EXPORT_SYMBOL drivers/parport/parport_pc 0x4340e37d	parport_pc_probe_port
+EXPORT_SYMBOL drivers/parport/parport_pc 0xdcb30e12	parport_pc_unregister_port
+EXPORT_SYMBOL drivers/ssb/ssb 0x00d1a392	ssb_bus_resume
+EXPORT_SYMBOL drivers/ssb/ssb 0x16bbda72	ssb_device_is_enabled
+EXPORT_SYMBOL drivers/ssb/ssb 0x1d08a131	ssb_dma_alloc_consistent
+EXPORT_SYMBOL drivers/ssb/ssb 0x1d6c06f0	ssb_pmu_set_ldo_paref
+EXPORT_SYMBOL drivers/ssb/ssb 0x1fcd5acf	ssb_bus_may_powerdown
+EXPORT_SYMBOL drivers/ssb/ssb 0x249ea90d	ssb_pcihost_register
+EXPORT_SYMBOL drivers/ssb/ssb 0x2f74aa40	ssb_bus_pcibus_register
+EXPORT_SYMBOL drivers/ssb/ssb 0x47b254c7	ssb_set_devtypedata
+EXPORT_SYMBOL drivers/ssb/ssb 0x4909be03	ssb_dma_set_mask
+EXPORT_SYMBOL drivers/ssb/ssb 0x5ca01e35	ssb_device_disable
+EXPORT_SYMBOL drivers/ssb/ssb 0x5f3f6db0	ssb_dma_free_consistent
+EXPORT_SYMBOL drivers/ssb/ssb 0x7719976f	ssb_device_enable
+EXPORT_SYMBOL drivers/ssb/ssb 0x7a55e290	ssb_bus_unregister
+EXPORT_SYMBOL drivers/ssb/ssb 0x980730ba	ssb_bus_powerup
+EXPORT_SYMBOL drivers/ssb/ssb 0xaed1fa27	__ssb_driver_register
+EXPORT_SYMBOL drivers/ssb/ssb 0xb40f67d3	ssb_clockspeed
+EXPORT_SYMBOL drivers/ssb/ssb 0xc0512e0f	ssb_admatch_base
+EXPORT_SYMBOL drivers/ssb/ssb 0xc09fc660	ssb_dma_translation
+EXPORT_SYMBOL drivers/ssb/ssb 0xccabbe79	ssb_pmu_set_ldo_voltage
+EXPORT_SYMBOL drivers/ssb/ssb 0xd481192b	ssb_admatch_size
+EXPORT_SYMBOL drivers/ssb/ssb 0xe173a546	ssb_driver_unregister
+EXPORT_SYMBOL drivers/ssb/ssb 0xeb2fa0c7	ssb_bus_suspend
+EXPORT_SYMBOL drivers/ssb/ssb 0xfa5cc18c	ssb_pcicore_dev_irqvecs_enable
+EXPORT_SYMBOL drivers/staging/line6/line6usb 0x7239895e	variax_create_files
+EXPORT_SYMBOL drivers/staging/line6/line6usb 0xb5e07479	pod_remove_files
+EXPORT_SYMBOL drivers/staging/line6/line6usb 0xe2eb2a85	pod_create_files
+EXPORT_SYMBOL drivers/staging/line6/line6usb 0xf36428b1	variax_remove_files
+EXPORT_SYMBOL drivers/thermal/thermal_sys 0x202f680a	thermal_zone_device_register
+EXPORT_SYMBOL drivers/thermal/thermal_sys 0x44917eae	thermal_cooling_device_register
+EXPORT_SYMBOL drivers/thermal/thermal_sys 0x6ee83db8	thermal_zone_bind_cooling_device
+EXPORT_SYMBOL drivers/thermal/thermal_sys 0x717ba1fc	thermal_zone_device_unregister
+EXPORT_SYMBOL drivers/thermal/thermal_sys 0x7dfc5378	thermal_cooling_device_unregister
+EXPORT_SYMBOL drivers/thermal/thermal_sys 0x80a04e7f	thermal_zone_unbind_cooling_device
+EXPORT_SYMBOL drivers/thermal/thermal_sys 0xceb44fe4	thermal_zone_device_update
+EXPORT_SYMBOL drivers/usb/host/sl811-hcd 0x03fd2a2c	sl811h_driver
+EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xa64a4cea	usb_nop_xceiv_unregister
+EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xd0e43207	usb_nop_xceiv_register
+EXPORT_SYMBOL drivers/usb/serial/usbserial 0x87013cb7	usb_serial_resume
+EXPORT_SYMBOL drivers/usb/serial/usbserial 0x88bfd9ec	usb_serial_suspend
+EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x3be2414b	w1_bq27000_read
+EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x7e8ad321	w1_bq27000_write
+EXPORT_SYMBOL fs/configfs/configfs 0x104175d1	config_group_find_item
+EXPORT_SYMBOL fs/configfs/configfs 0x1aa7fc8b	config_item_init
+EXPORT_SYMBOL fs/configfs/configfs 0x4ce57a62	config_group_init_type_name
+EXPORT_SYMBOL fs/configfs/configfs 0x4f2d1073	config_item_put
+EXPORT_SYMBOL fs/configfs/configfs 0x8dfe2c75	configfs_register_subsystem
+EXPORT_SYMBOL fs/configfs/configfs 0x9bba1c77	configfs_unregister_subsystem
+EXPORT_SYMBOL fs/configfs/configfs 0xa57d2549	config_group_init
+EXPORT_SYMBOL fs/configfs/configfs 0xc04f4593	configfs_depend_item
+EXPORT_SYMBOL fs/configfs/configfs 0xc7bfc0cc	configfs_undepend_item
+EXPORT_SYMBOL fs/configfs/configfs 0xc8d86dad	config_item_set_name
+EXPORT_SYMBOL fs/configfs/configfs 0xcc442c69	config_item_init_type_name
+EXPORT_SYMBOL fs/configfs/configfs 0xfa3c00ff	config_item_get
+EXPORT_SYMBOL fs/fscache/fscache 0x00c2bcc1	__fscache_read_or_alloc_pages
+EXPORT_SYMBOL fs/fscache/fscache 0x0231a893	__fscache_read_or_alloc_page
+EXPORT_SYMBOL fs/fscache/fscache 0x07d9b576	fscache_wait_bit_interruptible
+EXPORT_SYMBOL fs/fscache/fscache 0x1f10c4aa	__fscache_relinquish_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0x23b66abc	fscache_enqueue_operation
+EXPORT_SYMBOL fs/fscache/fscache 0x3052617f	__fscache_attr_changed
+EXPORT_SYMBOL fs/fscache/fscache 0x38f98e44	__fscache_uncache_page
+EXPORT_SYMBOL fs/fscache/fscache 0x3c6d53fd	fscache_add_cache
+EXPORT_SYMBOL fs/fscache/fscache 0x3fc23318	fscache_wait_bit
+EXPORT_SYMBOL fs/fscache/fscache 0x43a59086	__fscache_register_netfs
+EXPORT_SYMBOL fs/fscache/fscache 0x496932b9	fscache_op_debug_id
+EXPORT_SYMBOL fs/fscache/fscache 0x5649bc2a	fscache_fsdef_index
+EXPORT_SYMBOL fs/fscache/fscache 0x56585697	fscache_put_operation
+EXPORT_SYMBOL fs/fscache/fscache 0x5ebc544f	__fscache_acquire_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0x647d9914	fscache_init_cache
+EXPORT_SYMBOL fs/fscache/fscache 0x781de6b9	fscache_object_lookup_negative
+EXPORT_SYMBOL fs/fscache/fscache 0x7cd25c39	__fscache_write_page
+EXPORT_SYMBOL fs/fscache/fscache 0x86f8894f	fscache_object_states
+EXPORT_SYMBOL fs/fscache/fscache 0x88651418	fscache_object_slow_work_ops
+EXPORT_SYMBOL fs/fscache/fscache 0x9472783b	__fscache_alloc_page
+EXPORT_SYMBOL fs/fscache/fscache 0x9631e342	fscache_withdraw_cache
+EXPORT_SYMBOL fs/fscache/fscache 0x975f3af3	__fscache_update_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0xa0db2c9e	__fscache_wait_on_page_write
+EXPORT_SYMBOL fs/fscache/fscache 0xba5c5e9b	fscache_check_aux
+EXPORT_SYMBOL fs/fscache/fscache 0xc432ac66	__fscache_unregister_netfs
+EXPORT_SYMBOL fs/fscache/fscache 0xc93c7738	__fscache_check_page_write
+EXPORT_SYMBOL fs/fscache/fscache 0xccd81e3b	fscache_io_error
+EXPORT_SYMBOL fs/fscache/fscache 0xdd9284e8	__fscache_maybe_release_page
+EXPORT_SYMBOL fs/fscache/fscache 0xebd812a8	fscache_cache_cleared_wq
+EXPORT_SYMBOL fs/fscache/fscache 0xf8d35b32	fscache_obtained_object
+EXPORT_SYMBOL fs/fscache/fscache 0xfe37123f	fscache_mark_pages_cached
+EXPORT_SYMBOL fs/nfsd/nfsd 0x0e195c1c	nfs4_acl_nfsv4_to_posix
+EXPORT_SYMBOL fs/nfsd/nfsd 0x2095976a	nfs4_acl_new
+EXPORT_SYMBOL fs/nfsd/nfsd 0x28fb929b	nfs4_acl_posix_to_nfsv4
+EXPORT_SYMBOL fs/nfsd/nfsd 0x35e33c1e	nfs4_acl_write_who
+EXPORT_SYMBOL fs/nfsd/nfsd 0x5a157ae4	nfs4_acl_get_whotype
+EXPORT_SYMBOL fs/quota/quota_tree 0x1e626ebc	qtree_read_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0x320efe89	qtree_entry_unused
+EXPORT_SYMBOL fs/quota/quota_tree 0x510e256f	qtree_release_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0x5ee3af14	qtree_delete_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0xf541c3b2	qtree_write_dquot
+EXPORT_SYMBOL lib/crc-ccitt 0x3771b461	crc_ccitt
+EXPORT_SYMBOL lib/crc-ccitt 0x75811312	crc_ccitt_table
+EXPORT_SYMBOL lib/crc-itu-t 0xd29b009f	crc_itu_t_table
+EXPORT_SYMBOL lib/crc-itu-t 0xf5b4a948	crc_itu_t
+EXPORT_SYMBOL lib/crc7 0xa7587646	crc7
+EXPORT_SYMBOL lib/crc7 0xd80c3603	crc7_syndrome_table
+EXPORT_SYMBOL lib/libcrc32c 0x27000b29	crc32c
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x315c65fd	zlib_deflateInit2
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x48034724	zlib_deflateReset
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xaf64ad0d	zlib_deflate
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf0caf44b	zlib_deflate_workspacesize
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf741c793	zlib_deflateEnd
+EXPORT_SYMBOL net/802/p8022 0xbf64d8e6	unregister_8022_client
+EXPORT_SYMBOL net/802/p8022 0xd2a79979	register_8022_client
+EXPORT_SYMBOL net/802/p8023 0x852f1738	make_8023_client
+EXPORT_SYMBOL net/802/p8023 0xaa07d1d8	destroy_8023_client
+EXPORT_SYMBOL net/802/psnap 0x8b868eb8	unregister_snap_client
+EXPORT_SYMBOL net/802/psnap 0xfc1de9d2	register_snap_client
+EXPORT_SYMBOL net/9p/9pnet 0x02cafa5c	p9_client_fcreate
+EXPORT_SYMBOL net/9p/9pnet 0x046a9daa	p9_client_walk
+EXPORT_SYMBOL net/9p/9pnet 0x0b11ff5a	p9_idpool_put
+EXPORT_SYMBOL net/9p/9pnet 0x0c5f01c8	v9fs_get_trans_by_name
+EXPORT_SYMBOL net/9p/9pnet 0x165af677	p9_client_disconnect
+EXPORT_SYMBOL net/9p/9pnet 0x2a47c630	p9_client_clunk
+EXPORT_SYMBOL net/9p/9pnet 0x2a5fe258	p9_client_destroy
+EXPORT_SYMBOL net/9p/9pnet 0x31e817e0	p9_client_auth
+EXPORT_SYMBOL net/9p/9pnet 0x3d73a797	p9_errstr2errno
+EXPORT_SYMBOL net/9p/9pnet 0x56af74f2	p9_client_create
+EXPORT_SYMBOL net/9p/9pnet 0x6b754e6f	p9_parse_header
+EXPORT_SYMBOL net/9p/9pnet 0x7310a66f	p9_idpool_create
+EXPORT_SYMBOL net/9p/9pnet 0x76b79bf1	p9stat_read
+EXPORT_SYMBOL net/9p/9pnet 0x7d72070a	p9_client_stat
+EXPORT_SYMBOL net/9p/9pnet 0x8f34fe15	p9_idpool_check
+EXPORT_SYMBOL net/9p/9pnet 0x99a7f30f	p9_idpool_destroy
+EXPORT_SYMBOL net/9p/9pnet 0x99aa7841	p9_idpool_get
+EXPORT_SYMBOL net/9p/9pnet 0x9bb205a6	v9fs_register_trans
+EXPORT_SYMBOL net/9p/9pnet 0x9c964743	p9stat_free
+EXPORT_SYMBOL net/9p/9pnet 0xa099b2b7	v9fs_unregister_trans
+EXPORT_SYMBOL net/9p/9pnet 0xa263147b	p9_client_read
+EXPORT_SYMBOL net/9p/9pnet 0xbf74c834	p9_client_remove
+EXPORT_SYMBOL net/9p/9pnet 0xc2a2ab0e	p9_client_version
+EXPORT_SYMBOL net/9p/9pnet 0xc88ba436	p9_client_wstat
+EXPORT_SYMBOL net/9p/9pnet 0xcca504ad	p9_client_cb
+EXPORT_SYMBOL net/9p/9pnet 0xd331fc1d	p9pdu_dump
+EXPORT_SYMBOL net/9p/9pnet 0xe4009ae0	p9_client_open
+EXPORT_SYMBOL net/9p/9pnet 0xe58a3360	p9_error_init
+EXPORT_SYMBOL net/9p/9pnet 0xe81fb52b	p9_client_write
+EXPORT_SYMBOL net/9p/9pnet 0xf6bc9492	p9_client_attach
+EXPORT_SYMBOL net/9p/9pnet 0xf96f7993	p9_tag_lookup
+EXPORT_SYMBOL net/9p/9pnet 0xfa154754	v9fs_get_default_trans
+EXPORT_SYMBOL net/appletalk/appletalk 0x3ecc9e82	atrtr_get_dev
+EXPORT_SYMBOL net/appletalk/appletalk 0x55ba0f09	alloc_ltalkdev
+EXPORT_SYMBOL net/appletalk/appletalk 0xa3da04e0	atalk_find_dev_addr
+EXPORT_SYMBOL net/appletalk/appletalk 0xfd70e163	aarp_send_ddp
+EXPORT_SYMBOL net/atm/atm 0x00758286	atm_alloc_charge
+EXPORT_SYMBOL net/atm/atm 0x1a24e5e2	sonet_subtract_stats
+EXPORT_SYMBOL net/atm/atm 0x1e735961	atm_dev_lookup
+EXPORT_SYMBOL net/atm/atm 0x2cc2d52d	vcc_hash
+EXPORT_SYMBOL net/atm/atm 0x2fa57afe	atm_dev_deregister
+EXPORT_SYMBOL net/atm/atm 0x31eb46b9	vcc_sklist_lock
+EXPORT_SYMBOL net/atm/atm 0x39fc66ea	vcc_insert_socket
+EXPORT_SYMBOL net/atm/atm 0x5d7150c5	register_atm_ioctl
+EXPORT_SYMBOL net/atm/atm 0x65592eed	atm_proc_root
+EXPORT_SYMBOL net/atm/atm 0x7982ea53	atm_dev_register
+EXPORT_SYMBOL net/atm/atm 0x7face752	vcc_release_async
+EXPORT_SYMBOL net/atm/atm 0x89195dc3	sonet_copy_stats
+EXPORT_SYMBOL net/atm/atm 0x9a4e3b2e	deregister_atm_ioctl
+EXPORT_SYMBOL net/atm/atm 0xbb66ab4a	atm_init_aal5
+EXPORT_SYMBOL net/atm/atm 0xc50fe1db	atm_charge
+EXPORT_SYMBOL net/atm/atm 0xf49bc67a	atm_pcr_goal
+EXPORT_SYMBOL net/ax25/ax25 0x07915288	ax25_find_cb
+EXPORT_SYMBOL net/ax25/ax25 0x242852b9	ax25_uid_policy
+EXPORT_SYMBOL net/ax25/ax25 0x3d2d82ec	ax25_display_timer
+EXPORT_SYMBOL net/ax25/ax25 0x4502c65a	asc2ax
+EXPORT_SYMBOL net/ax25/ax25 0x478e77f7	ax25_listen_register
+EXPORT_SYMBOL net/ax25/ax25 0x53dea1ff	ax2asc
+EXPORT_SYMBOL net/ax25/ax25 0x564d9f14	ax25_findbyuid
+EXPORT_SYMBOL net/ax25/ax25 0x8ede9e26	ax25_protocol_release
+EXPORT_SYMBOL net/ax25/ax25 0x946fb633	ax25_rebuild_header
+EXPORT_SYMBOL net/ax25/ax25 0x9739b490	ax25_listen_release
+EXPORT_SYMBOL net/ax25/ax25 0x9d6ff238	ax25_linkfail_register
+EXPORT_SYMBOL net/ax25/ax25 0xbeb45ec2	ax25_linkfail_release
+EXPORT_SYMBOL net/ax25/ax25 0xc06db56e	ax25_send_frame
+EXPORT_SYMBOL net/ax25/ax25 0xc1444946	ax25cmp
+EXPORT_SYMBOL net/ax25/ax25 0xd43ecbf1	null_ax25_address
+EXPORT_SYMBOL net/ax25/ax25 0xe42abb72	ax25_header_ops
+EXPORT_SYMBOL net/ax25/ax25 0xec975fb5	ax25_hard_header
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x0dda81db	hci_alloc_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x12d6c3d5	bt_sock_link
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x17280e79	bt_sock_recvmsg
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x2323f8f6	bt_accept_unlink
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x28452970	bt_accept_enqueue
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x2b817162	hci_unregister_cb
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x2bed255d	hci_free_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x31026977	hci_register_cb
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x3f12e96f	hci_conn_hold_device
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x47bc9e78	hci_conn_check_link_mode
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x4c41988f	hci_conn_put_device
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x5f2e1db0	bt_sock_unlink
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x62adcc8d	bt_sock_register
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x62e5197e	bt_accept_dequeue
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x646cc60d	hci_send_acl
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x6faa3b12	hci_conn_change_link_key
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x7094f8ae	bt_err
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x7ca045c1	hci_register_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x82277f5b	hci_recv_fragment
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x97667559	hci_get_route
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x97f9e0fb	bt_sock_ioctl
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xa2af7182	hci_unregister_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xa340e3b1	hci_register_proto
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xb35038ef	hci_connect
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xc2066af0	batostr
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xcad7fb10	hci_conn_security
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xcc1fb551	baswap
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xdee2c0ec	bt_sock_poll
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xe32bc749	hci_send_sco
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xe438a682	hci_resume_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xe6ed08d7	hci_unregister_proto
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xe99c04f3	bt_sock_wait_state
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xf0dc3aee	hci_conn_switch_role
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xf19294db	bt_sock_unregister
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xf3dd5597	hci_suspend_dev
+EXPORT_SYMBOL net/bluetooth/l2cap 0xfc31fe88	l2cap_load
+EXPORT_SYMBOL net/bridge/bridge 0x3d7cc010	br_should_route_hook
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x4a488f98	ebt_unregister_table
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0xbf24f9e5	ebt_register_table
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0xe344b7da	ebt_do_table
+EXPORT_SYMBOL net/can/can 0x017c2094	can_send
+EXPORT_SYMBOL net/can/can 0x30b54e9b	can_rx_unregister
+EXPORT_SYMBOL net/can/can 0x31b920b9	can_proto_unregister
+EXPORT_SYMBOL net/can/can 0x3ee9545e	can_proto_register
+EXPORT_SYMBOL net/can/can 0xe1f393f0	can_rx_register
+EXPORT_SYMBOL net/ieee802154/nl802154 0x56485758	ieee802154_nl_assoc_indic
+EXPORT_SYMBOL net/ieee802154/nl802154 0x7285de9f	ieee802154_nl_scan_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0xa9c116b9	ieee802154_nl_disassoc_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0xc8d53140	ieee802154_nl_disassoc_indic
+EXPORT_SYMBOL net/ieee802154/nl802154 0xd46805fc	ieee802154_nl_assoc_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0xe491b897	ieee802154_nl_beacon_indic
+EXPORT_SYMBOL net/ieee802154/nl802154 0xf22c79d1	ieee802154_nl_start_confirm
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x3d4b36d5	wpan_phy_alloc
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x5bea1bcd	wpan_phy_find
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x6f09a9e8	wpan_phy_register
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x769e78c0	wpan_phy_unregister
+EXPORT_SYMBOL net/ieee802154/wpan-class 0xff52b44c	wpan_phy_free
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xb0efc4e8	arpt_unregister_table
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xcdeccd58	arpt_register_table
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xf570713a	arpt_do_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x074b3c0e	ipt_register_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x9c68c62c	ipt_unregister_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0xe8b0782c	ipt_do_table
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x029dcf10	nf_nat_used_tuple
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x14c16774	nf_nat_protocol_register
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x1606e28c	nf_nat_mangle_tcp_packet
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x26d74a00	nf_nat_mangle_udp_packet
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x47a2d227	nf_nat_protocol_unregister
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x69783767	nf_nat_follow_master
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x814e6dc2	nf_nat_setup_info
+EXPORT_SYMBOL net/ipv4/tunnel4 0x698a3ce9	xfrm4_tunnel_deregister
+EXPORT_SYMBOL net/ipv4/tunnel4 0x96d08fe9	xfrm4_tunnel_register
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x27c71f67	ip6t_unregister_table
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xb8bddf33	ip6t_ext_hdr
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xc26dd715	ipv6_find_hdr
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xcd2ce538	ip6t_register_table
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xde77234f	ip6t_do_table
+EXPORT_SYMBOL net/ipv6/tunnel6 0x2bef20db	xfrm6_tunnel_register
+EXPORT_SYMBOL net/ipv6/tunnel6 0x42412ec5	xfrm6_tunnel_deregister
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0x9cd013f2	xfrm6_tunnel_alloc_spi
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xab14e193	xfrm6_tunnel_free_spi
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xdb1b42d1	xfrm6_tunnel_spi_lookup
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x10d4d0ed	ircomm_connect_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x1aa42c1c	ircomm_data_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x339a8a48	ircomm_disconnect_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x36bb44b7	ircomm_flow_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x3c3a2401	ircomm_control_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x5bfb342c	ircomm_open
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x98b83337	ircomm_close
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0xc6355bb8	ircomm_connect_response
+EXPORT_SYMBOL net/irda/irda 0x05d7cfe5	irias_add_octseq_attrib
+EXPORT_SYMBOL net/irda/irda 0x06a3ee58	irias_new_integer_value
+EXPORT_SYMBOL net/irda/irda 0x07d3647c	irlmp_register_service
+EXPORT_SYMBOL net/irda/irda 0x15a898e4	irttp_open_tsap
+EXPORT_SYMBOL net/irda/irda 0x19d79c82	hashbin_lock_find
+EXPORT_SYMBOL net/irda/irda 0x1c51e992	hashbin_delete
+EXPORT_SYMBOL net/irda/irda 0x1cceb2a4	async_wrap_skb
+EXPORT_SYMBOL net/irda/irda 0x2036ad06	irda_param_insert
+EXPORT_SYMBOL net/irda/irda 0x22b0f52d	hashbin_insert
+EXPORT_SYMBOL net/irda/irda 0x30827e1c	irias_insert_object
+EXPORT_SYMBOL net/irda/irda 0x311e1a5e	irlmp_close_lsap
+EXPORT_SYMBOL net/irda/irda 0x38a20e5b	irda_debug
+EXPORT_SYMBOL net/irda/irda 0x3b2e9df9	hashbin_remove
+EXPORT_SYMBOL net/irda/irda 0x3dd67c68	irttp_connect_request
+EXPORT_SYMBOL net/irda/irda 0x4117fe0b	irlmp_connect_request
+EXPORT_SYMBOL net/irda/irda 0x42c7c5ce	irias_find_object
+EXPORT_SYMBOL net/irda/irda 0x448b8aaa	irda_qos_bits_to_value
+EXPORT_SYMBOL net/irda/irda 0x46c1c4a2	irlmp_unregister_service
+EXPORT_SYMBOL net/irda/irda 0x519118cc	irias_add_integer_attrib
+EXPORT_SYMBOL net/irda/irda 0x538fe1e0	hashbin_get_first
+EXPORT_SYMBOL net/irda/irda 0x54318a4d	alloc_irdadev
+EXPORT_SYMBOL net/irda/irda 0x5504cf7c	hashbin_new
+EXPORT_SYMBOL net/irda/irda 0x57fb1ed2	hashbin_remove_this
+EXPORT_SYMBOL net/irda/irda 0x5aad87aa	irias_delete_object
+EXPORT_SYMBOL net/irda/irda 0x5ae71560	irlap_close
+EXPORT_SYMBOL net/irda/irda 0x5d609063	irias_new_object
+EXPORT_SYMBOL net/irda/irda 0x6621aa8a	hashbin_find
+EXPORT_SYMBOL net/irda/irda 0x6b043eba	irda_init_max_qos_capabilies
+EXPORT_SYMBOL net/irda/irda 0x701e028e	irias_add_string_attrib
+EXPORT_SYMBOL net/irda/irda 0x7042bc54	irlmp_register_client
+EXPORT_SYMBOL net/irda/irda 0x70538827	irttp_disconnect_request
+EXPORT_SYMBOL net/irda/irda 0x71117408	irlmp_disconnect_request
+EXPORT_SYMBOL net/irda/irda 0x763e54a4	irlmp_unregister_client
+EXPORT_SYMBOL net/irda/irda 0x7957f728	irlmp_update_client
+EXPORT_SYMBOL net/irda/irda 0x88eacdc3	irda_notify_init
+EXPORT_SYMBOL net/irda/irda 0x8a138470	iriap_getvaluebyclass_request
+EXPORT_SYMBOL net/irda/irda 0x8eef067e	iriap_open
+EXPORT_SYMBOL net/irda/irda 0x91815586	irda_param_pack
+EXPORT_SYMBOL net/irda/irda 0x92a28cbf	irttp_close_tsap
+EXPORT_SYMBOL net/irda/irda 0x993ad14b	irda_param_extract_all
+EXPORT_SYMBOL net/irda/irda 0xa3d0bbe3	irda_device_set_media_busy
+EXPORT_SYMBOL net/irda/irda 0xa3efcc45	irttp_udata_request
+EXPORT_SYMBOL net/irda/irda 0xab394a27	irlmp_connect_response
+EXPORT_SYMBOL net/irda/irda 0xb924b345	irttp_flow_request
+EXPORT_SYMBOL net/irda/irda 0xb9394173	irias_delete_value
+EXPORT_SYMBOL net/irda/irda 0xbcd3ef13	irias_object_change_attribute
+EXPORT_SYMBOL net/irda/irda 0xbcfc9845	async_unwrap_char
+EXPORT_SYMBOL net/irda/irda 0xbdabc2ec	proc_irda
+EXPORT_SYMBOL net/irda/irda 0xbe40ace9	irlmp_discovery_request
+EXPORT_SYMBOL net/irda/irda 0xc8d0b2a8	irlmp_open_lsap
+EXPORT_SYMBOL net/irda/irda 0xc97df7e7	irlmp_data_request
+EXPORT_SYMBOL net/irda/irda 0xd4f555b0	irttp_connect_response
+EXPORT_SYMBOL net/irda/irda 0xde4c6b3c	irlmp_service_to_hint
+EXPORT_SYMBOL net/irda/irda 0xe2f84c82	hashbin_get_next
+EXPORT_SYMBOL net/irda/irda 0xe51bebc0	irttp_dup
+EXPORT_SYMBOL net/irda/irda 0xe55543ee	irttp_data_request
+EXPORT_SYMBOL net/irda/irda 0xe6c7aae3	irlap_open
+EXPORT_SYMBOL net/irda/irda 0xedd521c2	irlmp_get_discoveries
+EXPORT_SYMBOL net/irda/irda 0xef2fee80	iriap_close
+EXPORT_SYMBOL net/lapb/lapb 0x2e79493e	lapb_data_received
+EXPORT_SYMBOL net/lapb/lapb 0x37c2ba82	lapb_data_request
+EXPORT_SYMBOL net/lapb/lapb 0x7fcdee4c	lapb_getparms
+EXPORT_SYMBOL net/lapb/lapb 0x9cd93d51	lapb_unregister
+EXPORT_SYMBOL net/lapb/lapb 0xa11865ea	lapb_register
+EXPORT_SYMBOL net/lapb/lapb 0xa2456c74	lapb_setparms
+EXPORT_SYMBOL net/lapb/lapb 0xc3dc8328	lapb_disconnect_request
+EXPORT_SYMBOL net/lapb/lapb 0xc567aac5	lapb_connect_request
+EXPORT_SYMBOL net/llc/llc 0x117d137c	llc_sap_find
+EXPORT_SYMBOL net/llc/llc 0x38b92846	llc_remove_pack
+EXPORT_SYMBOL net/llc/llc 0x52d7b2fd	llc_sap_list
+EXPORT_SYMBOL net/llc/llc 0x556643e3	llc_sap_list_lock
+EXPORT_SYMBOL net/llc/llc 0x87846094	llc_sap_close
+EXPORT_SYMBOL net/llc/llc 0x9e0fc768	llc_set_station_handler
+EXPORT_SYMBOL net/llc/llc 0xab8b8a83	llc_sap_open
+EXPORT_SYMBOL net/llc/llc 0xc1597dcf	llc_build_and_send_ui_pkt
+EXPORT_SYMBOL net/llc/llc 0xe057b9a7	llc_mac_hdr_init
+EXPORT_SYMBOL net/llc/llc 0xec16f6ae	llc_add_pack
+EXPORT_SYMBOL net/mac80211/mac80211 0x035f9b42	ieee80211_start_tx_ba_cb_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0x0d7a0aeb	ieee80211_tx_status_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0x16a414cd	ieee80211_register_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x2041e68e	ieee80211_start_tx_ba_cb
+EXPORT_SYMBOL net/mac80211/mac80211 0x23ec153a	ieee80211_ctstoself_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0x38c5e820	__ieee80211_get_radio_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0x38dfc6ae	ieee80211_start_tx_ba_session
+EXPORT_SYMBOL net/mac80211/mac80211 0x48fc7b91	__ieee80211_get_tx_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0x4c3a41b2	ieee80211_rate_control_register
+EXPORT_SYMBOL net/mac80211/mac80211 0x51439e72	ieee80211_get_buffered_bc
+EXPORT_SYMBOL net/mac80211/mac80211 0x51ddda02	ieee80211_stop_tx_ba_session
+EXPORT_SYMBOL net/mac80211/mac80211 0x5bc5aed8	wiphy_to_ieee80211_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x5c9830f3	ieee80211_ctstoself_get
+EXPORT_SYMBOL net/mac80211/mac80211 0x5f7a0720	ieee80211_queue_stopped
+EXPORT_SYMBOL net/mac80211/mac80211 0x5f98ce59	ieee80211_tx_status
+EXPORT_SYMBOL net/mac80211/mac80211 0x63e8f86f	ieee80211_restart_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x68cac42e	ieee80211_stop_queue
+EXPORT_SYMBOL net/mac80211/mac80211 0x6f05c3d2	ieee80211_find_sta
+EXPORT_SYMBOL net/mac80211/mac80211 0x71e5bb8f	rate_control_send_low
+EXPORT_SYMBOL net/mac80211/mac80211 0x75bf3c91	ieee80211_beacon_get
+EXPORT_SYMBOL net/mac80211/mac80211 0x7abf3fc5	ieee80211_rts_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0x7eb6445a	__ieee80211_get_assoc_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0x80f33c7a	ieee80211_rx
+EXPORT_SYMBOL net/mac80211/mac80211 0x81e7b918	ieee80211_free_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x862a466b	__ieee80211_get_rx_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0x991f5d7d	ieee80211_rate_control_unregister
+EXPORT_SYMBOL net/mac80211/mac80211 0xb7f3c4c0	ieee80211_scan_completed
+EXPORT_SYMBOL net/mac80211/mac80211 0xbe0d0474	ieee80211_stop_queues
+EXPORT_SYMBOL net/mac80211/mac80211 0xc4c9f726	ieee80211_wake_queues
+EXPORT_SYMBOL net/mac80211/mac80211 0xd1e9d7d9	ieee80211_alloc_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xdfccd88d	ieee80211_get_tkip_key
+EXPORT_SYMBOL net/mac80211/mac80211 0xe0f453bf	ieee80211_rx_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0xe8abe42d	ieee80211_beacon_loss
+EXPORT_SYMBOL net/mac80211/mac80211 0xeec9e934	ieee80211_stop_tx_ba_cb_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0xf4ce5c4a	ieee80211_queue_delayed_work
+EXPORT_SYMBOL net/mac80211/mac80211 0xf672533d	ieee80211_unregister_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xf7218d8b	ieee80211_queue_work
+EXPORT_SYMBOL net/mac80211/mac80211 0xfbcbea1e	ieee80211_rts_get
+EXPORT_SYMBOL net/mac80211/mac80211 0xfdbc4e2c	ieee80211_wake_queue
+EXPORT_SYMBOL net/mac80211/mac80211 0xff0c09fd	ieee80211_generic_frame_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0xff6c1590	ieee80211_stop_tx_ba_cb
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x226c3e00	ip_vs_tcp_conn_listen
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x282605ea	ip_vs_conn_new
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x4996ad72	ip_vs_skb_replace
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x5d68c5ab	ip_vs_conn_in_get
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x6a80077f	ip_vs_conn_put
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x777a9659	register_ip_vs_scheduler
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x78f29111	register_ip_vs_app
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xa1dbc2d8	ip_vs_proto_name
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xb07fa44b	unregister_ip_vs_app
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xc63837f3	register_ip_vs_app_inc
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xc64ba0bb	ip_vs_conn_out_get
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xdd8b02cc	unregister_ip_vs_scheduler
+EXPORT_SYMBOL net/netfilter/nf_conntrack 0x8f27b214	__nf_ct_ext_destroy
+EXPORT_SYMBOL net/netfilter/nf_conntrack 0xbe2c3235	__nf_ct_ext_add
+EXPORT_SYMBOL net/netfilter/nf_conntrack_proto_gre 0xe1c08051	nf_ct_gre_keymap_flush
+EXPORT_SYMBOL net/netfilter/x_tables 0x0c247a21	xt_register_targets
+EXPORT_SYMBOL net/netfilter/x_tables 0x16a5e826	xt_free_table_info
+EXPORT_SYMBOL net/netfilter/x_tables 0x4050a40a	xt_find_match
+EXPORT_SYMBOL net/netfilter/x_tables 0x458d59a7	xt_register_target
+EXPORT_SYMBOL net/netfilter/x_tables 0x554467a9	xt_register_match
+EXPORT_SYMBOL net/netfilter/x_tables 0x9bfe1b3d	xt_unregister_targets
+EXPORT_SYMBOL net/netfilter/x_tables 0xb0aba007	xt_unregister_matches
+EXPORT_SYMBOL net/netfilter/x_tables 0xc3970836	xt_unregister_target
+EXPORT_SYMBOL net/netfilter/x_tables 0xc3ff5dff	xt_alloc_table_info
+EXPORT_SYMBOL net/netfilter/x_tables 0xc5908dc3	xt_unregister_match
+EXPORT_SYMBOL net/netfilter/x_tables 0xcfce506b	xt_register_matches
+EXPORT_SYMBOL net/netfilter/x_tables 0xfae8b5be	xt_find_target
+EXPORT_SYMBOL net/phonet/phonet 0x1e82df3f	phonet_header_ops
+EXPORT_SYMBOL net/phonet/phonet 0x36836430	pn_sock_unhash
+EXPORT_SYMBOL net/phonet/phonet 0x3993a109	phonet_proto_unregister
+EXPORT_SYMBOL net/phonet/phonet 0x65319698	phonet_stream_ops
+EXPORT_SYMBOL net/phonet/phonet 0x8c521c19	phonet_proto_register
+EXPORT_SYMBOL net/phonet/phonet 0xc3fdb9b5	pn_skb_send
+EXPORT_SYMBOL net/phonet/phonet 0xd9f3d4ad	pn_sock_get_port
+EXPORT_SYMBOL net/phonet/phonet 0xfb488dcd	pn_sock_hash
+EXPORT_SYMBOL net/rfkill/rfkill 0x01b7be45	rfkill_alloc
+EXPORT_SYMBOL net/rfkill/rfkill 0x13e4c4d1	rfkill_register
+EXPORT_SYMBOL net/rfkill/rfkill 0x288012ad	rfkill_get_led_trigger_name
+EXPORT_SYMBOL net/rfkill/rfkill 0x28ebadd7	rfkill_pause_polling
+EXPORT_SYMBOL net/rfkill/rfkill 0x2ca08d80	rfkill_set_states
+EXPORT_SYMBOL net/rfkill/rfkill 0x39a6b245	rfkill_unregister
+EXPORT_SYMBOL net/rfkill/rfkill 0x49d9e634	rfkill_destroy
+EXPORT_SYMBOL net/rfkill/rfkill 0x6548e1e6	rfkill_set_hw_state
+EXPORT_SYMBOL net/rfkill/rfkill 0x711bdf04	rfkill_set_led_trigger_name
+EXPORT_SYMBOL net/rfkill/rfkill 0x76f3b856	rfkill_set_sw_state
+EXPORT_SYMBOL net/rfkill/rfkill 0x8a90a251	rfkill_resume_polling
+EXPORT_SYMBOL net/rfkill/rfkill 0x93c60d62	rfkill_init_sw_state
+EXPORT_SYMBOL net/rfkill/rfkill 0x99aab167	rfkill_blocked
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x064372c8	rxrpc_kernel_is_data_last
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x147ca879	rxrpc_get_null_key
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x247c9fbb	rxrpc_kernel_send_data
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x28e61225	rxrpc_kernel_reject_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x3d1ef502	rxrpc_kernel_intercept_rx_messages
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x55a9b6c5	rxrpc_kernel_accept_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x7b027f88	key_type_rxrpc
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x8e179715	rxrpc_kernel_free_skb
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x9c644016	rxrpc_kernel_begin_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xb558395e	rxrpc_kernel_end_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xbcf51418	rxrpc_kernel_get_error_number
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xbd6ddf3b	rxrpc_kernel_data_delivered
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xced296c8	rxrpc_kernel_get_abort_code
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xd680d2aa	rxrpc_get_server_data_key
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xd782c188	rxrpc_kernel_abort_call
+EXPORT_SYMBOL net/sunrpc/sunrpc 0xffa6c08a	svc_pool_stats_open
+EXPORT_SYMBOL net/tipc/tipc 0x08acf310	tipc_available_nodes
+EXPORT_SYMBOL net/tipc/tipc 0x10d40fcd	tipc_isconnected
+EXPORT_SYMBOL net/tipc/tipc 0x1472b270	tipc_disconnect
+EXPORT_SYMBOL net/tipc/tipc 0x1479cb03	tipc_deleteport
+EXPORT_SYMBOL net/tipc/tipc 0x15b5ecde	tipc_set_portunreliable
+EXPORT_SYMBOL net/tipc/tipc 0x16b91d41	tipc_recv_msg
+EXPORT_SYMBOL net/tipc/tipc 0x16f27683	tipc_block_bearer
+EXPORT_SYMBOL net/tipc/tipc 0x259b74f9	tipc_acknowledge
+EXPORT_SYMBOL net/tipc/tipc 0x27d8bb58	tipc_send2port
+EXPORT_SYMBOL net/tipc/tipc 0x2978256d	tipc_send_buf
+EXPORT_SYMBOL net/tipc/tipc 0x2fa3bb90	tipc_send_buf2name
+EXPORT_SYMBOL net/tipc/tipc 0x310d1bc9	tipc_detach
+EXPORT_SYMBOL net/tipc/tipc 0x3455c282	tipc_forward_buf2port
+EXPORT_SYMBOL net/tipc/tipc 0x3712e340	tipc_portunreliable
+EXPORT_SYMBOL net/tipc/tipc 0x3976041f	tipc_set_portimportance
+EXPORT_SYMBOL net/tipc/tipc 0x3e93b677	tipc_continue
+EXPORT_SYMBOL net/tipc/tipc 0x3f5f1af0	tipc_createport
+EXPORT_SYMBOL net/tipc/tipc 0x4b2243c6	tipc_portimportance
+EXPORT_SYMBOL net/tipc/tipc 0x4ba3cfc8	tipc_send2name
+EXPORT_SYMBOL net/tipc/tipc 0x4e796163	tipc_get_port
+EXPORT_SYMBOL net/tipc/tipc 0x538b228a	tipc_withdraw
+EXPORT_SYMBOL net/tipc/tipc 0x5637ed44	tipc_get_mode
+EXPORT_SYMBOL net/tipc/tipc 0x5c0d4b5c	tipc_ref_valid
+EXPORT_SYMBOL net/tipc/tipc 0x60c99a2c	tipc_forward_buf2name
+EXPORT_SYMBOL net/tipc/tipc 0x62a681a3	tipc_portunreturnable
+EXPORT_SYMBOL net/tipc/tipc 0x64357d3c	tipc_multicast
+EXPORT_SYMBOL net/tipc/tipc 0x659357c9	tipc_register_media
+EXPORT_SYMBOL net/tipc/tipc 0x8001e3d7	tipc_forward2port
+EXPORT_SYMBOL net/tipc/tipc 0x84a0cfc3	tipc_send_buf2port
+EXPORT_SYMBOL net/tipc/tipc 0x88b73627	tipc_get_addr
+EXPORT_SYMBOL net/tipc/tipc 0x8c4af9b4	tipc_send_buf_fast
+EXPORT_SYMBOL net/tipc/tipc 0x97a88c02	tipc_createport_raw
+EXPORT_SYMBOL net/tipc/tipc 0x9c45558e	tipc_enable_bearer
+EXPORT_SYMBOL net/tipc/tipc 0xadd203d0	tipc_connect2port
+EXPORT_SYMBOL net/tipc/tipc 0xae0103c3	tipc_shutdown
+EXPORT_SYMBOL net/tipc/tipc 0xb01ffc2c	tipc_forward2name
+EXPORT_SYMBOL net/tipc/tipc 0xb35b672c	tipc_publish
+EXPORT_SYMBOL net/tipc/tipc 0xbb2b2504	tipc_send
+EXPORT_SYMBOL net/tipc/tipc 0xcec8514a	tipc_set_portunreturnable
+EXPORT_SYMBOL net/tipc/tipc 0xd44731e5	tipc_ownidentity
+EXPORT_SYMBOL net/tipc/tipc 0xd9e3322e	tipc_reject_msg
+EXPORT_SYMBOL net/tipc/tipc 0xda7f9d3f	tipc_attach
+EXPORT_SYMBOL net/tipc/tipc 0xdf5008fc	tipc_peer
+EXPORT_SYMBOL net/tipc/tipc 0xe7aece47	tipc_ispublished
+EXPORT_SYMBOL net/tipc/tipc 0xeefd49b3	tipc_get_handle
+EXPORT_SYMBOL net/tipc/tipc 0xef50a1ef	tipc_disable_bearer
+EXPORT_SYMBOL net/wanrouter/wanrouter 0x0ebe03d1	unregister_wan_device
+EXPORT_SYMBOL net/wanrouter/wanrouter 0x470519bc	register_wan_device
+EXPORT_SYMBOL net/wimax/wimax 0x5803c8b3	wimax_reset
+EXPORT_SYMBOL net/wimax/wimax 0x6122e4f3	wimax_rfkill
+EXPORT_SYMBOL net/wireless/cfg80211 0x0226b505	cfg80211_get_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0x07e7ac5a	ieee80211_radiotap_iterator_init
+EXPORT_SYMBOL net/wireless/cfg80211 0x08d912e4	cfg80211_inform_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0x09c64fbd	ieee80211_frequency_to_channel
+EXPORT_SYMBOL net/wireless/cfg80211 0x181dbc7d	wiphy_unregister
+EXPORT_SYMBOL net/wireless/cfg80211 0x1879fcbd	bridge_tunnel_header
+EXPORT_SYMBOL net/wireless/cfg80211 0x1be80007	wiphy_rfkill_set_hw_state
+EXPORT_SYMBOL net/wireless/cfg80211 0x1d371152	cfg80211_send_disassoc
+EXPORT_SYMBOL net/wireless/cfg80211 0x24d22ea4	ieee80211_data_from_8023
+EXPORT_SYMBOL net/wireless/cfg80211 0x29c8b91a	cfg80211_scan_done
+EXPORT_SYMBOL net/wireless/cfg80211 0x2d63d64a	cfg80211_send_deauth
+EXPORT_SYMBOL net/wireless/cfg80211 0x37ac8d05	ieee80211_get_response_rate
+EXPORT_SYMBOL net/wireless/cfg80211 0x3ace8655	cfg80211_send_rx_auth
+EXPORT_SYMBOL net/wireless/cfg80211 0x3e47bff0	freq_reg_info
+EXPORT_SYMBOL net/wireless/cfg80211 0x3e996ba6	wiphy_rfkill_stop_polling
+EXPORT_SYMBOL net/wireless/cfg80211 0x4658af1e	regulatory_hint
+EXPORT_SYMBOL net/wireless/cfg80211 0x46ae024c	wiphy_apply_custom_regulatory
+EXPORT_SYMBOL net/wireless/cfg80211 0x48432cd9	wiphy_new
+EXPORT_SYMBOL net/wireless/cfg80211 0x5374b60f	cfg80211_send_assoc_timeout
+EXPORT_SYMBOL net/wireless/cfg80211 0x6660252d	wiphy_register
+EXPORT_SYMBOL net/wireless/cfg80211 0x66bdf6b3	cfg80211_classify8021d
+EXPORT_SYMBOL net/wireless/cfg80211 0x69b18f43	rfc1042_header
+EXPORT_SYMBOL net/wireless/cfg80211 0x69ef1fb0	wiphy_free
+EXPORT_SYMBOL net/wireless/cfg80211 0x70dfc439	ieee80211_get_hdrlen_from_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0x74548cd3	cfg80211_disconnected
+EXPORT_SYMBOL net/wireless/cfg80211 0x83286185	ieee80211_data_to_8023
+EXPORT_SYMBOL net/wireless/cfg80211 0x89401a9d	cfg80211_ibss_joined
+EXPORT_SYMBOL net/wireless/cfg80211 0x8c35d732	ieee80211_hdrlen
+EXPORT_SYMBOL net/wireless/cfg80211 0x90eb5e02	cfg80211_put_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0xa6d08256	cfg80211_roamed
+EXPORT_SYMBOL net/wireless/cfg80211 0xad8a8687	cfg80211_connect_result
+EXPORT_SYMBOL net/wireless/cfg80211 0xc1ee0a59	cfg80211_unlink_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0xc4e85ec5	ieee80211_radiotap_iterator_next
+EXPORT_SYMBOL net/wireless/cfg80211 0xc931a03d	ieee80211_bss_get_ie
+EXPORT_SYMBOL net/wireless/cfg80211 0xccc291b3	ieee80211_channel_to_frequency
+EXPORT_SYMBOL net/wireless/cfg80211 0xcfe38d8a	cfg80211_send_rx_assoc
+EXPORT_SYMBOL net/wireless/cfg80211 0xd084927a	cfg80211_send_auth_timeout
+EXPORT_SYMBOL net/wireless/cfg80211 0xd6545884	cfg80211_michael_mic_failure
+EXPORT_SYMBOL net/wireless/cfg80211 0xd871ed31	__ieee80211_get_channel
+EXPORT_SYMBOL net/wireless/cfg80211 0xeb1f5d1e	wiphy_rfkill_start_polling
+EXPORT_SYMBOL net/wireless/cfg80211 0xf57fdedf	cfg80211_get_mesh
+EXPORT_SYMBOL net/wireless/cfg80211 0xf81434a4	cfg80211_inform_bss_frame
+EXPORT_SYMBOL net/wireless/lib80211 0x230f3ffb	lib80211_crypt_deinit_handler
+EXPORT_SYMBOL net/wireless/lib80211 0x2d0f99e5	print_ssid
+EXPORT_SYMBOL net/wireless/lib80211 0x5c585456	lib80211_get_crypto_ops
+EXPORT_SYMBOL net/wireless/lib80211 0x9405702b	lib80211_crypt_info_free
+EXPORT_SYMBOL net/wireless/lib80211 0x9ca7dedb	lib80211_register_crypto_ops
+EXPORT_SYMBOL net/wireless/lib80211 0xb82f5858	lib80211_crypt_info_init
+EXPORT_SYMBOL net/wireless/lib80211 0xbbca315e	lib80211_unregister_crypto_ops
+EXPORT_SYMBOL net/wireless/lib80211 0xde028b7c	lib80211_crypt_delayed_deinit
+EXPORT_SYMBOL net/wireless/lib80211 0xf475543a	lib80211_crypt_deinit_entries
+EXPORT_SYMBOL net/wireless/lib80211 0xf6eb2396	lib80211_crypt_quiescing
+EXPORT_SYMBOL sound/core/oss/snd-mixer-oss 0x0347c386	snd_mixer_oss_ioctl_card
+EXPORT_SYMBOL sound/core/snd-hwdep 0x63e6ee67	snd_hwdep_new
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x1e871fac	snd_rawmidi_set_ops
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x250f0406	snd_rawmidi_drop_output
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x2e7bbe5d	snd_rawmidi_transmit_empty
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x3bb43931	snd_rawmidi_kernel_open
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x4ba275aa	snd_rawmidi_receive
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x67e5377e	snd_rawmidi_input_params
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x69f14717	snd_rawmidi_new
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x7eb95348	snd_rawmidi_kernel_release
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xa5902f3e	snd_rawmidi_transmit_ack
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xae8e7e3a	snd_rawmidi_kernel_write
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xb9efbb51	snd_rawmidi_transmit_peek
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xbad41a6f	snd_rawmidi_drain_output
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xc638fbb9	snd_rawmidi_output_params
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xda600e13	snd_rawmidi_info_select
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xe2ee2338	snd_rawmidi_drain_input
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xe6101f69	snd_rawmidi_kernel_read
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xf01b6691	snd_rawmidi_transmit
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0x16756dc0	snd_usbmidi_input_start
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0x45c29a4c	snd_usb_create_midi_interface
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0x63343b1d	snd_usbmidi_input_stop
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0xd9d2bb03	snd_usbmidi_disconnect
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x1a999dd5	dm_mem_cache_alloc
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x4d930d11	dm_mem_cache_free
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x7af51992	dm_mem_cache_shrink
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x920a7a41	dm_message_parse
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0xb7174158	dm_mem_cache_grow
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0xbe8abb15	dm_mem_cache_client_destroy
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0xc47b0c8c	dm_mem_cache_client_create
+EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x04dca738	lirc_unregister_driver
+EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x4e5b25ec	lirc_register_driver
+EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x5a05bd6b	lirc_get_pdata
+EXPORT_SYMBOL vmlinux 0x00000000	fp_printk
+EXPORT_SYMBOL vmlinux 0x00000000	fp_send_sig
+EXPORT_SYMBOL vmlinux 0x00000000	kern_fp_enter
+EXPORT_SYMBOL vmlinux 0x00000000	per_cpu__softirq_work_list
+EXPORT_SYMBOL vmlinux 0x000d8387	napi_reuse_skb
+EXPORT_SYMBOL vmlinux 0x0013edee	dm_io_client_create
+EXPORT_SYMBOL vmlinux 0x0033331e	__lock_page
+EXPORT_SYMBOL vmlinux 0x004fc786	page_address
+EXPORT_SYMBOL vmlinux 0x0053158d	sk_release_kernel
+EXPORT_SYMBOL vmlinux 0x005e81df	mvUsbGppInit
+EXPORT_SYMBOL vmlinux 0x007a18d0	rtnl_set_sk_err
+EXPORT_SYMBOL vmlinux 0x00801678	flush_scheduled_work
+EXPORT_SYMBOL vmlinux 0x00b8f30b	security_path_symlink
+EXPORT_SYMBOL vmlinux 0x00c4dc87	timecounter_init
+EXPORT_SYMBOL vmlinux 0x00e22718	sock_no_poll
+EXPORT_SYMBOL vmlinux 0x00e8097b	csum_partial_copy_fromiovecend
+EXPORT_SYMBOL vmlinux 0x01000e51	schedule
+EXPORT_SYMBOL vmlinux 0x01139ffc	max_mapnr
+EXPORT_SYMBOL vmlinux 0x01219db9	blk_peek_request
+EXPORT_SYMBOL vmlinux 0x01293578	alloc_etherdev_mq
+EXPORT_SYMBOL vmlinux 0x013688d1	alloc_fcdev
+EXPORT_SYMBOL vmlinux 0x014a1a53	touch_atime
+EXPORT_SYMBOL vmlinux 0x014bf66c	jbd2_journal_release_jbd_inode
+EXPORT_SYMBOL vmlinux 0x0167a07c	vc_resize
+EXPORT_SYMBOL vmlinux 0x016c99a3	fb_class
+EXPORT_SYMBOL vmlinux 0x01902adf	netpoll_trap
+EXPORT_SYMBOL vmlinux 0x01a4aab6	set_irq_chip_data
+EXPORT_SYMBOL vmlinux 0x01c08bdc	module_put
+EXPORT_SYMBOL vmlinux 0x01cc1f2b	scsi_eh_finish_cmd
+EXPORT_SYMBOL vmlinux 0x01ef84ca	mmc_power_restore_host
+EXPORT_SYMBOL vmlinux 0x01f7250d	scsi_unregister
+EXPORT_SYMBOL vmlinux 0x01f81dff	vlan_gro_receive
+EXPORT_SYMBOL vmlinux 0x02008776	snd_ac97_pcm_close
+EXPORT_SYMBOL vmlinux 0x02124474	ip_send_check
+EXPORT_SYMBOL vmlinux 0x02196324	__aeabi_idiv
+EXPORT_SYMBOL vmlinux 0x023655dd	__starget_for_each_device
+EXPORT_SYMBOL vmlinux 0x02649054	security_sock_rcv_skb
+EXPORT_SYMBOL vmlinux 0x026592a7	tcp_poll
+EXPORT_SYMBOL vmlinux 0x02728ab3	dentry_open
+EXPORT_SYMBOL vmlinux 0x0278681f	lro_flush_all
+EXPORT_SYMBOL vmlinux 0x027f27ea	tty_port_close
+EXPORT_SYMBOL vmlinux 0x0283dfe3	_snd_pcm_hw_params_any
+EXPORT_SYMBOL vmlinux 0x02886ca6	pci_choose_state
+EXPORT_SYMBOL vmlinux 0x02a6ce5a	crc16_table
+EXPORT_SYMBOL vmlinux 0x02dc6e8c	jbd2_journal_release_buffer
+EXPORT_SYMBOL vmlinux 0x02e3564d	udp_lib_setsockopt
+EXPORT_SYMBOL vmlinux 0x02ee26c1	free_pages_exact
+EXPORT_SYMBOL vmlinux 0x0334da4e	scsi_command_size_tbl
+EXPORT_SYMBOL vmlinux 0x0350e2f4	up_read
+EXPORT_SYMBOL vmlinux 0x0362a99a	blk_queue_max_sectors
+EXPORT_SYMBOL vmlinux 0x036db18b	dev_getbyhwaddr
+EXPORT_SYMBOL vmlinux 0x037a0cba	kfree
+EXPORT_SYMBOL vmlinux 0x038eff0b	crypto_unregister
+EXPORT_SYMBOL vmlinux 0x03b3f0c9	tcp_check_req
+EXPORT_SYMBOL vmlinux 0x03b775cf	otg_set_transceiver
+EXPORT_SYMBOL vmlinux 0x03c06156	bitmap_fold
+EXPORT_SYMBOL vmlinux 0x03c4aeab	uart_update_timeout
+EXPORT_SYMBOL vmlinux 0x03c7b995	invalidate_mapping_pages
+EXPORT_SYMBOL vmlinux 0x03d60a22	generic_write_end
+EXPORT_SYMBOL vmlinux 0x03d9f470	seq_open
+EXPORT_SYMBOL vmlinux 0x03e5d59b	dcache_dir_close
+EXPORT_SYMBOL vmlinux 0x03fd2571	vm_unmap_ram
+EXPORT_SYMBOL vmlinux 0x0400429e	set_irq_chip
+EXPORT_SYMBOL vmlinux 0x040f6099	tcp_md5_hash_header
+EXPORT_SYMBOL vmlinux 0x0421b170	tcp_getsockopt
+EXPORT_SYMBOL vmlinux 0x0422fe4a	inet_csk_timer_bug_msg
+EXPORT_SYMBOL vmlinux 0x043b8483	__kfifo_get
+EXPORT_SYMBOL vmlinux 0x0487f831	fb_find_best_display
+EXPORT_SYMBOL vmlinux 0x048d9576	tcp_proc_unregister
+EXPORT_SYMBOL vmlinux 0x049cdfc6	give_up_console
+EXPORT_SYMBOL vmlinux 0x04cda566	snd_interval_refine
+EXPORT_SYMBOL vmlinux 0x04d02ac0	find_inode_number
+EXPORT_SYMBOL vmlinux 0x05046704	__sk_mem_reclaim
+EXPORT_SYMBOL vmlinux 0x0504e990	inode_add_rsv_space
+EXPORT_SYMBOL vmlinux 0x05128727	dma_map_sg
+EXPORT_SYMBOL vmlinux 0x053f2ab7	tcp_v4_md5_do_del
+EXPORT_SYMBOL vmlinux 0x05431f25	xfrm_lookup
+EXPORT_SYMBOL vmlinux 0x0548b232	crypto_apply
+EXPORT_SYMBOL vmlinux 0x05559c7a	phy_disable_interrupts
+EXPORT_SYMBOL vmlinux 0x0555a81a	qdisc_create_dflt
+EXPORT_SYMBOL vmlinux 0x057ce975	hex_dump_to_buffer
+EXPORT_SYMBOL vmlinux 0x05982d25	pci_pme_active
+EXPORT_SYMBOL vmlinux 0x05a570a0	dev_load
+EXPORT_SYMBOL vmlinux 0x05ffa32d	pagecache_write_end
+EXPORT_SYMBOL vmlinux 0x06090de7	__sg_free_table
+EXPORT_SYMBOL vmlinux 0x061651be	strcat
+EXPORT_SYMBOL vmlinux 0x061745f5	proc_symlink
+EXPORT_SYMBOL vmlinux 0x0618e633	dump_fpu
+EXPORT_SYMBOL vmlinux 0x062aba95	mempool_free
+EXPORT_SYMBOL vmlinux 0x063931f8	tcp_v4_conn_request
+EXPORT_SYMBOL vmlinux 0x064aa9a5	sock_no_sendpage
+EXPORT_SYMBOL vmlinux 0x0651b9b4	replace_mount_options
+EXPORT_SYMBOL vmlinux 0x066396c7	grab_cache_page_nowait
+EXPORT_SYMBOL vmlinux 0x06666f14	serial8250_register_port
+EXPORT_SYMBOL vmlinux 0x067d8d35	security_release_secctx
+EXPORT_SYMBOL vmlinux 0x06972c89	dm_get_mapinfo
+EXPORT_SYMBOL vmlinux 0x06c38c6b	proc_mkdir
+EXPORT_SYMBOL vmlinux 0x06d728b1	tcp_parse_md5sig_option
+EXPORT_SYMBOL vmlinux 0x06d8bae1	idr_get_new
+EXPORT_SYMBOL vmlinux 0x06f8ac77	inet_listen
+EXPORT_SYMBOL vmlinux 0x06fe3b14	default_grn
+EXPORT_SYMBOL vmlinux 0x0711fc64	simple_link
+EXPORT_SYMBOL vmlinux 0x072574eb	submit_bio
+EXPORT_SYMBOL vmlinux 0x07511ab8	scsi_remove_host
+EXPORT_SYMBOL vmlinux 0x07665b8a	submit_bh
+EXPORT_SYMBOL vmlinux 0x077db613	snd_pcm_notify
+EXPORT_SYMBOL vmlinux 0x0784ca63	genl_register_family_with_ops
+EXPORT_SYMBOL vmlinux 0x0786fef8	ipv6_skip_exthdr
+EXPORT_SYMBOL vmlinux 0x079125a0	sock_create_kern
+EXPORT_SYMBOL vmlinux 0x0799aca4	local_bh_enable
+EXPORT_SYMBOL vmlinux 0x0799c50a	param_set_ulong
+EXPORT_SYMBOL vmlinux 0x07a890c8	fb_alloc_cmap
+EXPORT_SYMBOL vmlinux 0x07c7bb41	security_path_mknod
+EXPORT_SYMBOL vmlinux 0x07cc4a5d	printk_timed_ratelimit
+EXPORT_SYMBOL vmlinux 0x07d4deef	security_sb_set_mnt_opts
+EXPORT_SYMBOL vmlinux 0x07d6f728	dm_table_get_size
+EXPORT_SYMBOL vmlinux 0x07e388ba	ethtool_op_set_tx_hw_csum
+EXPORT_SYMBOL vmlinux 0x08008384	i2c_add_adapter
+EXPORT_SYMBOL vmlinux 0x080b8da2	put_disk
+EXPORT_SYMBOL vmlinux 0x082c3213	pci_root_buses
+EXPORT_SYMBOL vmlinux 0x08433b04	tcf_exts_validate
+EXPORT_SYMBOL vmlinux 0x08728140	malloc_sizes
+EXPORT_SYMBOL vmlinux 0x08728838	clk_disable
+EXPORT_SYMBOL vmlinux 0x08737baa	xfrm_state_insert
+EXPORT_SYMBOL vmlinux 0x08b8a0e1	simple_readpage
+EXPORT_SYMBOL vmlinux 0x08d66a3a	warn_slowpath_fmt
+EXPORT_SYMBOL vmlinux 0x08d88526	ipv6_chk_prefix
+EXPORT_SYMBOL vmlinux 0x08eae444	mmc_wait_for_cmd
+EXPORT_SYMBOL vmlinux 0x08fe5eef	bio_uncopy_user
+EXPORT_SYMBOL vmlinux 0x09144253	sysctl_string
+EXPORT_SYMBOL vmlinux 0x091dc7d6	ioctl_by_bdev
+EXPORT_SYMBOL vmlinux 0x092b007a	sleep_on_timeout
+EXPORT_SYMBOL vmlinux 0x093c5763	genl_unregister_ops
+EXPORT_SYMBOL vmlinux 0x0948cde9	num_physpages
+EXPORT_SYMBOL vmlinux 0x0966bafc	elevator_init
+EXPORT_SYMBOL vmlinux 0x097712a1	scsi_host_alloc
+EXPORT_SYMBOL vmlinux 0x097b72ef	mii_nway_restart
+EXPORT_SYMBOL vmlinux 0x098b71c6	fb_dealloc_cmap
+EXPORT_SYMBOL vmlinux 0x09c04ea2	udp_flush_pending_frames
+EXPORT_SYMBOL vmlinux 0x09c55cec	schedule_timeout_interruptible
+EXPORT_SYMBOL vmlinux 0x09c8eb55	font_vga_8x16
+EXPORT_SYMBOL vmlinux 0x09cc5841	journal_check_available_features
+EXPORT_SYMBOL vmlinux 0x09d45c21	down_timeout
+EXPORT_SYMBOL vmlinux 0x0a1bebc5	kernel_execve
+EXPORT_SYMBOL vmlinux 0x0a2487e0	unblock_all_signals
+EXPORT_SYMBOL vmlinux 0x0a2b2098	xfrm4_rcv_encap
+EXPORT_SYMBOL vmlinux 0x0a3131f6	strnchr
+EXPORT_SYMBOL vmlinux 0x0a4747ff	allocate_resource
+EXPORT_SYMBOL vmlinux 0x0a74c653	inet_csk_destroy_sock
+EXPORT_SYMBOL vmlinux 0x0a767be2	skb_copy_datagram_const_iovec
+EXPORT_SYMBOL vmlinux 0x0aa13d05	__raw_readsw
+EXPORT_SYMBOL vmlinux 0x0aa3e24c	skb_add_rx_frag
+EXPORT_SYMBOL vmlinux 0x0ab405d8	sync_dirty_buffer
+EXPORT_SYMBOL vmlinux 0x0abb539d	tcp_connect
+EXPORT_SYMBOL vmlinux 0x0ac032d9	register_exec_domain
+EXPORT_SYMBOL vmlinux 0x0acb1a3c	__bitmap_shift_right
+EXPORT_SYMBOL vmlinux 0x0acf0631	ip_generic_getfrag
+EXPORT_SYMBOL vmlinux 0x0acf7679	dma_issue_pending_all
+EXPORT_SYMBOL vmlinux 0x0b0d888b	icmpv6_err_convert
+EXPORT_SYMBOL vmlinux 0x0b107a75	i2c_verify_client
+EXPORT_SYMBOL vmlinux 0x0b1a16a0	blk_fetch_request
+EXPORT_SYMBOL vmlinux 0x0b1beb31	vmalloc_32_user
+EXPORT_SYMBOL vmlinux 0x0b56bdec	security_d_instantiate
+EXPORT_SYMBOL vmlinux 0x0b5f2d2c	sg_next
+EXPORT_SYMBOL vmlinux 0x0b742fd7	simple_strtol
+EXPORT_SYMBOL vmlinux 0x0b785d24	jbd2_journal_wipe
+EXPORT_SYMBOL vmlinux 0x0b7ac1b4	udp_lib_getsockopt
+EXPORT_SYMBOL vmlinux 0x0c4d5278	install_exec_creds
+EXPORT_SYMBOL vmlinux 0x0c5cf2b4	qdisc_watchdog_init
+EXPORT_SYMBOL vmlinux 0x0c6315f7	deactivate_locked_super
+EXPORT_SYMBOL vmlinux 0x0c65e73c	scsi_normalize_sense
+EXPORT_SYMBOL vmlinux 0x0c8c9e99	scsi_show_extd_sense
+EXPORT_SYMBOL vmlinux 0x0c8d5c88	scsi_get_host_dev
+EXPORT_SYMBOL vmlinux 0x0ca1ce70	splice_from_pipe_feed
+EXPORT_SYMBOL vmlinux 0x0cae232b	utf16s_to_utf8s
+EXPORT_SYMBOL vmlinux 0x0cdfd1a6	kernel_sock_ioctl
+EXPORT_SYMBOL vmlinux 0x0ce83991	tty_port_carrier_raised
+EXPORT_SYMBOL vmlinux 0x0d2f43f0	mem_map
+EXPORT_SYMBOL vmlinux 0x0d3def21	idr_pre_get
+EXPORT_SYMBOL vmlinux 0x0d3ed8d6	tcf_generic_walker
+EXPORT_SYMBOL vmlinux 0x0d3f57a2	_find_next_bit_le
+EXPORT_SYMBOL vmlinux 0x0d542439	__ipv6_addr_type
+EXPORT_SYMBOL vmlinux 0x0d738e3d	scsi_put_command
+EXPORT_SYMBOL vmlinux 0x0d79061f	pci_dev_put
+EXPORT_SYMBOL vmlinux 0x0da10ec3	security_sock_graft
+EXPORT_SYMBOL vmlinux 0x0da2bd09	kthread_create
+EXPORT_SYMBOL vmlinux 0x0dc7c76b	bdevname
+EXPORT_SYMBOL vmlinux 0x0df48a44	ethtool_op_set_tso
+EXPORT_SYMBOL vmlinux 0x0e061d67	slow_work_sleep_till_thread_needed
+EXPORT_SYMBOL vmlinux 0x0e15dcd6	snd_pcm_hw_constraint_ratdens
+EXPORT_SYMBOL vmlinux 0x0e2cde27	proc_dostring
+EXPORT_SYMBOL vmlinux 0x0e43c213	tcp_v4_remember_stamp
+EXPORT_SYMBOL vmlinux 0x0e4984fe	eth_validate_addr
+EXPORT_SYMBOL vmlinux 0x0e52592a	panic
+EXPORT_SYMBOL vmlinux 0x0e6429f2	scsicam_bios_param
+EXPORT_SYMBOL vmlinux 0x0ea23dc6	d_alloc_root
+EXPORT_SYMBOL vmlinux 0x0eb85b80	nonseekable_open
+EXPORT_SYMBOL vmlinux 0x0ebc9885	proc_doulongvec_ms_jiffies_minmax
+EXPORT_SYMBOL vmlinux 0x0edf498e	simple_transaction_get
+EXPORT_SYMBOL vmlinux 0x0eff7267	km_new_mapping
+EXPORT_SYMBOL vmlinux 0x0f1ef871	posix_acl_alloc
+EXPORT_SYMBOL vmlinux 0x0f3524bf	phy_register_fixup_for_id
+EXPORT_SYMBOL vmlinux 0x0f446b10	request_key_async
+EXPORT_SYMBOL vmlinux 0x0f5a94d8	inode_claim_rsv_space
+EXPORT_SYMBOL vmlinux 0x0f74ef05	slow_work_unregister_user
+EXPORT_SYMBOL vmlinux 0x0f9f6fd4	d_instantiate
+EXPORT_SYMBOL vmlinux 0x0fa2a45e	__memzero
+EXPORT_SYMBOL vmlinux 0x0fae8b34	inet_select_addr
+EXPORT_SYMBOL vmlinux 0x0fc586ba	down_trylock
+EXPORT_SYMBOL vmlinux 0x0fddbcba	skb_realloc_headroom
+EXPORT_SYMBOL vmlinux 0x0ff178f6	__aeabi_idivmod
+EXPORT_SYMBOL vmlinux 0x101e606e	tty_wait_until_sent
+EXPORT_SYMBOL vmlinux 0x1024a119	elv_rq_merge_ok
+EXPORT_SYMBOL vmlinux 0x103d91c6	pci_bus_write_config_byte
+EXPORT_SYMBOL vmlinux 0x10579454	sg_copy_from_buffer
+EXPORT_SYMBOL vmlinux 0x1072a394	csum_partial_copy_from_user
+EXPORT_SYMBOL vmlinux 0x107594d8	phy_scan_fixups
+EXPORT_SYMBOL vmlinux 0x1086ab18	genphy_config_advert
+EXPORT_SYMBOL vmlinux 0x108b39fc	pipe_lock
+EXPORT_SYMBOL vmlinux 0x108e8985	param_get_uint
+EXPORT_SYMBOL vmlinux 0x1094c1a9	dmam_alloc_coherent
+EXPORT_SYMBOL vmlinux 0x10e25c72	mmc_set_data_timeout
+EXPORT_SYMBOL vmlinux 0x10ed129d	sock_rfree
+EXPORT_SYMBOL vmlinux 0x10ee20bb	default_blu
+EXPORT_SYMBOL vmlinux 0x111470b3	keyring_search
+EXPORT_SYMBOL vmlinux 0x11152e13	pcim_enable_device
+EXPORT_SYMBOL vmlinux 0x11267875	scsi_extd_sense_format
+EXPORT_SYMBOL vmlinux 0x11329f63	tty_chars_in_buffer
+EXPORT_SYMBOL vmlinux 0x115b31d9	bfifo_qdisc_ops
+EXPORT_SYMBOL vmlinux 0x1163f0a7	blk_max_low_pfn
+EXPORT_SYMBOL vmlinux 0x117093be	qdisc_class_hash_init
+EXPORT_SYMBOL vmlinux 0x1174055e	pci_unregister_driver
+EXPORT_SYMBOL vmlinux 0x117632ec	xfrm6_prepare_output
+EXPORT_SYMBOL vmlinux 0x118f9918	mb_cache_entry_release
+EXPORT_SYMBOL vmlinux 0x119b50e7	elf_check_arch
+EXPORT_SYMBOL vmlinux 0x119e05a5	kernel_setsockopt
+EXPORT_SYMBOL vmlinux 0x11b5aacb	posix_test_lock
+EXPORT_SYMBOL vmlinux 0x11f68562	dev_mc_delete
+EXPORT_SYMBOL vmlinux 0x11f9e667	kernel_listen
+EXPORT_SYMBOL vmlinux 0x1208cca4	backlight_device_register
+EXPORT_SYMBOL vmlinux 0x12234b4b	napi_get_frags
+EXPORT_SYMBOL vmlinux 0x123bef33	jbd2_journal_ack_err
+EXPORT_SYMBOL vmlinux 0x123bf422	lease_get_mtime
+EXPORT_SYMBOL vmlinux 0x1278415e	scsi_is_sdev_device
+EXPORT_SYMBOL vmlinux 0x129e74f2	apm_get_power_status
+EXPORT_SYMBOL vmlinux 0x12a6dd48	inet_sendmsg
+EXPORT_SYMBOL vmlinux 0x12d0734c	dcache_dir_lseek
+EXPORT_SYMBOL vmlinux 0x12da5bb2	__kmalloc
+EXPORT_SYMBOL vmlinux 0x12f076e2	dqget
+EXPORT_SYMBOL vmlinux 0x1300e83a	input_free_polled_device
+EXPORT_SYMBOL vmlinux 0x1322eb49	inode_init_always
+EXPORT_SYMBOL vmlinux 0x132918d4	dm_unregister_target
+EXPORT_SYMBOL vmlinux 0x1337f877	kernel_bind
+EXPORT_SYMBOL vmlinux 0x133c09b5	blk_rq_map_user
+EXPORT_SYMBOL vmlinux 0x13c9d440	snd_pcm_lib_preallocate_free_for_all
+EXPORT_SYMBOL vmlinux 0x13f42152	system_entering_hibernation
+EXPORT_SYMBOL vmlinux 0x14003a72	add_disk
+EXPORT_SYMBOL vmlinux 0x1412eb2a	scsi_dma_unmap
+EXPORT_SYMBOL vmlinux 0x1437cd21	scsi_is_target_device
+EXPORT_SYMBOL vmlinux 0x144ed3a1	dev_base_lock
+EXPORT_SYMBOL vmlinux 0x1450254a	lock_fb_info
+EXPORT_SYMBOL vmlinux 0x14725ba8	register_sound_dsp
+EXPORT_SYMBOL vmlinux 0x14778cad	proc_dointvec
+EXPORT_SYMBOL vmlinux 0x149a4805	lro_receive_frags
+EXPORT_SYMBOL vmlinux 0x14b2176c	__neigh_event_send
+EXPORT_SYMBOL vmlinux 0x14bd218d	crypto_get_driverid
+EXPORT_SYMBOL vmlinux 0x14e181df	netdev_class_create_file
+EXPORT_SYMBOL vmlinux 0x14f4aba4	pci_bus_write_config_word
+EXPORT_SYMBOL vmlinux 0x15118444	do_mmap_pgoff
+EXPORT_SYMBOL vmlinux 0x15495166	tty_port_free_xmit_buf
+EXPORT_SYMBOL vmlinux 0x1551dc51	bitmap_find_free_region
+EXPORT_SYMBOL vmlinux 0x158aa5e3	crypto_userasymcrypto
+EXPORT_SYMBOL vmlinux 0x1599d95b	mvCesaDebugSram
+EXPORT_SYMBOL vmlinux 0x15ca1d3d	cpu_sysdev_class
+EXPORT_SYMBOL vmlinux 0x15ea3961	blk_queue_io_min
+EXPORT_SYMBOL vmlinux 0x15f20c73	ioremap_page
+EXPORT_SYMBOL vmlinux 0x160d3b87	generic_cont_expand_simple
+EXPORT_SYMBOL vmlinux 0x1610ea3f	phy_register_fixup
+EXPORT_SYMBOL vmlinux 0x16305289	warn_slowpath_null
+EXPORT_SYMBOL vmlinux 0x163c5e39	twl4030_i2c_read
+EXPORT_SYMBOL vmlinux 0x16479e8f	panic_notifier_list
+EXPORT_SYMBOL vmlinux 0x166496b4	dev_open
+EXPORT_SYMBOL vmlinux 0x1668ca72	journal_invalidatepage
+EXPORT_SYMBOL vmlinux 0x166e74a2	cpu_v7_set_pte_ext
+EXPORT_SYMBOL vmlinux 0x1688adff	tcp_gro_complete
+EXPORT_SYMBOL vmlinux 0x16c59d80	__sk_mem_schedule
+EXPORT_SYMBOL vmlinux 0x1715e4ac	iget_locked
+EXPORT_SYMBOL vmlinux 0x172b0153	key_unlink
+EXPORT_SYMBOL vmlinux 0x1735b18e	pci_enable_device_io
+EXPORT_SYMBOL vmlinux 0x174723ef	blk_queue_init_tags
+EXPORT_SYMBOL vmlinux 0x1755958e	mmc_detect_change
+EXPORT_SYMBOL vmlinux 0x176befe1	pci_get_class
+EXPORT_SYMBOL vmlinux 0x178c691c	tty_port_tty_set
+EXPORT_SYMBOL vmlinux 0x17b5b6f3	clear_bdi_congested
+EXPORT_SYMBOL vmlinux 0x17df17bc	sysctl_tcp_ecn
+EXPORT_SYMBOL vmlinux 0x1812d2cb	pci_prepare_to_sleep
+EXPORT_SYMBOL vmlinux 0x1814460d	dma_alloc_writecombine
+EXPORT_SYMBOL vmlinux 0x181640b5	fd_install
+EXPORT_SYMBOL vmlinux 0x18229c30	dev_driver_string
+EXPORT_SYMBOL vmlinux 0x182521ea	journal_load
+EXPORT_SYMBOL vmlinux 0x182c177e	uart_add_one_port
+EXPORT_SYMBOL vmlinux 0x182e779f	inet6_del_protocol
+EXPORT_SYMBOL vmlinux 0x183fa88b	mempool_alloc_slab
+EXPORT_SYMBOL vmlinux 0x184b82fb	mmc_vddrange_to_ocrmask
+EXPORT_SYMBOL vmlinux 0x184f17b9	__blk_end_request
+EXPORT_SYMBOL vmlinux 0x18679f01	snd_ctl_unregister_ioctl
+EXPORT_SYMBOL vmlinux 0x1883058e	netlink_rcv_skb
+EXPORT_SYMBOL vmlinux 0x18b57702	elv_rb_del
+EXPORT_SYMBOL vmlinux 0x18f3f226	elv_rb_latter_request
+EXPORT_SYMBOL vmlinux 0x18fd889a	xfrm_state_check_expire
+EXPORT_SYMBOL vmlinux 0x19159b3e	locks_copy_lock
+EXPORT_SYMBOL vmlinux 0x1935f410	blk_end_request_all
+EXPORT_SYMBOL vmlinux 0x19372978	mii_check_media
+EXPORT_SYMBOL vmlinux 0x196cb3c8	arp_create
+EXPORT_SYMBOL vmlinux 0x19760a67	locks_init_lock
+EXPORT_SYMBOL vmlinux 0x198788b4	snd_lookup_oss_minor_data
+EXPORT_SYMBOL vmlinux 0x1988a4a8	inet_dgram_connect
+EXPORT_SYMBOL vmlinux 0x1993fe9f	set_page_dirty
+EXPORT_SYMBOL vmlinux 0x199ed0cd	net_disable_timestamp
+EXPORT_SYMBOL vmlinux 0x19e9f816	__dev_get_by_name
+EXPORT_SYMBOL vmlinux 0x19f07db5	crypto_kdispatch
+EXPORT_SYMBOL vmlinux 0x1a037201	kfree_skb
+EXPORT_SYMBOL vmlinux 0x1a232a2f	load_nls
+EXPORT_SYMBOL vmlinux 0x1a24f597	vga_get
+EXPORT_SYMBOL vmlinux 0x1a2d1728	journal_release_buffer
+EXPORT_SYMBOL vmlinux 0x1a65f4ad	__arm_ioremap_pfn
+EXPORT_SYMBOL vmlinux 0x1aa440e2	page_put_link
+EXPORT_SYMBOL vmlinux 0x1abb5050	cdev_add
+EXPORT_SYMBOL vmlinux 0x1ace138d	bitmap_allocate_region
+EXPORT_SYMBOL vmlinux 0x1ad1f2e7	_memcpy_fromio
+EXPORT_SYMBOL vmlinux 0x1ad94fed	seq_release_private
+EXPORT_SYMBOL vmlinux 0x1ae83c99	bio_copy_user
+EXPORT_SYMBOL vmlinux 0x1b015d25	bitmap_parselist
+EXPORT_SYMBOL vmlinux 0x1b0278f6	xfrm_state_unregister_afinfo
+EXPORT_SYMBOL vmlinux 0x1b0efcaa	vga_tryget
+EXPORT_SYMBOL vmlinux 0x1b2527aa	crypto_getreq
+EXPORT_SYMBOL vmlinux 0x1b2d3822	tcp_alloc_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x1b3f570a	fsync_bdev
+EXPORT_SYMBOL vmlinux 0x1b3f65cc	eth_rebuild_header
+EXPORT_SYMBOL vmlinux 0x1b47a3cc	skb_copy_and_csum_datagram_iovec
+EXPORT_SYMBOL vmlinux 0x1b6314fd	in_aton
+EXPORT_SYMBOL vmlinux 0x1b9981cc	set_irq_wake
+EXPORT_SYMBOL vmlinux 0x1b9e0ff1	scsilun_to_int
+EXPORT_SYMBOL vmlinux 0x1bc3f287	request_firmware_nowait
+EXPORT_SYMBOL vmlinux 0x1be61a5f	snd_jack_set_parent
+EXPORT_SYMBOL vmlinux 0x1be6d238	init_timer_deferrable_key
+EXPORT_SYMBOL vmlinux 0x1beddc02	get_empty_filp
+EXPORT_SYMBOL vmlinux 0x1c1af916	set_normalized_timespec
+EXPORT_SYMBOL vmlinux 0x1c324357	idr_replace
+EXPORT_SYMBOL vmlinux 0x1c51bfc8	call_usermodehelper_setcleanup
+EXPORT_SYMBOL vmlinux 0x1c8bbe32	kick_iocb
+EXPORT_SYMBOL vmlinux 0x1c9e6a4a	mvUsbBackVoltageUpdate
+EXPORT_SYMBOL vmlinux 0x1ca27fe6	simple_transaction_read
+EXPORT_SYMBOL vmlinux 0x1cc6719a	register_reboot_notifier
+EXPORT_SYMBOL vmlinux 0x1d027e4b	snd_pcm_format_signed
+EXPORT_SYMBOL vmlinux 0x1d0aaf41	scsi_kmap_atomic_sg
+EXPORT_SYMBOL vmlinux 0x1d20873c	dma_cache_maint_page
+EXPORT_SYMBOL vmlinux 0x1d2e87c6	do_gettimeofday
+EXPORT_SYMBOL vmlinux 0x1d3cf8b4	clear_inode
+EXPORT_SYMBOL vmlinux 0x1d535f26	tcp_parse_options
+EXPORT_SYMBOL vmlinux 0x1d6680d1	splice_from_pipe_begin
+EXPORT_SYMBOL vmlinux 0x1d9817ae	take_over_console
+EXPORT_SYMBOL vmlinux 0x1d9d7dfa	in6_dev_finish_destroy
+EXPORT_SYMBOL vmlinux 0x1dc36131	fb_destroy_modedb
+EXPORT_SYMBOL vmlinux 0x1dd571e6	fb_copy_cmap
+EXPORT_SYMBOL vmlinux 0x1de4dda4	pci_remove_bus
+EXPORT_SYMBOL vmlinux 0x1e2630bd	i2c_use_client
+EXPORT_SYMBOL vmlinux 0x1e438361	ethtool_op_get_link
+EXPORT_SYMBOL vmlinux 0x1e49daa8	sg_init_one
+EXPORT_SYMBOL vmlinux 0x1e5fcb8e	snd_ac97_get_short_name
+EXPORT_SYMBOL vmlinux 0x1e6d26a8	strstr
+EXPORT_SYMBOL vmlinux 0x1ecb9943	posix_acl_to_xattr
+EXPORT_SYMBOL vmlinux 0x1edc9598	_atomic_dec_and_lock
+EXPORT_SYMBOL vmlinux 0x1ee0ee39	scsi_block_requests
+EXPORT_SYMBOL vmlinux 0x1ee4a6b0	register_mtd_chip_driver
+EXPORT_SYMBOL vmlinux 0x1ef0b7a7	input_event
+EXPORT_SYMBOL vmlinux 0x1efe283f	__cap_full_set
+EXPORT_SYMBOL vmlinux 0x1f10fcc3	neigh_table_clear
+EXPORT_SYMBOL vmlinux 0x1f4ca499	kobject_add
+EXPORT_SYMBOL vmlinux 0x1f70d32d	dma_cache_maint
+EXPORT_SYMBOL vmlinux 0x1f7ac5da	dquot_free_inode
+EXPORT_SYMBOL vmlinux 0x1f7cc628	mempool_create
+EXPORT_SYMBOL vmlinux 0x1fae7a0b	wait_for_completion_timeout
+EXPORT_SYMBOL vmlinux 0x1fb59baf	___pskb_trim
+EXPORT_SYMBOL vmlinux 0x1fe33c23	scsi_host_lookup
+EXPORT_SYMBOL vmlinux 0x1ff69dd8	vfs_fstatat
+EXPORT_SYMBOL vmlinux 0x20000329	simple_strtoul
+EXPORT_SYMBOL vmlinux 0x2014fad2	add_timer
+EXPORT_SYMBOL vmlinux 0x20152729	mvEthHalInit
+EXPORT_SYMBOL vmlinux 0x202a55ea	tcp_read_sock
+EXPORT_SYMBOL vmlinux 0x20319c78	unmap_mapping_range
+EXPORT_SYMBOL vmlinux 0x20385c58	genl_register_mc_group
+EXPORT_SYMBOL vmlinux 0x206347ae	skb_dma_unmap
+EXPORT_SYMBOL vmlinux 0x206eaa95	neigh_destroy
+EXPORT_SYMBOL vmlinux 0x2075d636	blk_run_queue
+EXPORT_SYMBOL vmlinux 0x20c607d2	jbd2_journal_restart
+EXPORT_SYMBOL vmlinux 0x20dcab30	generic_ro_fops
+EXPORT_SYMBOL vmlinux 0x20dec4b9	tc_classify
+EXPORT_SYMBOL vmlinux 0x20f71ade	mb_cache_entry_insert
+EXPORT_SYMBOL vmlinux 0x20f76b57	journal_init_dev
+EXPORT_SYMBOL vmlinux 0x20f8f433	lro_flush_pkt
+EXPORT_SYMBOL vmlinux 0x2101e1d5	mvBoardTclkGet
+EXPORT_SYMBOL vmlinux 0x210dab97	bio_put
+EXPORT_SYMBOL vmlinux 0x2111842a	__nla_reserve
+EXPORT_SYMBOL vmlinux 0x211331fa	__divsi3
+EXPORT_SYMBOL vmlinux 0x2122d27c	snd_pcm_hw_param_last
+EXPORT_SYMBOL vmlinux 0x2137f9c8	disk_stack_limits
+EXPORT_SYMBOL vmlinux 0x214d5e84	sg_miter_stop
+EXPORT_SYMBOL vmlinux 0x215ebd78	bitrev16
+EXPORT_SYMBOL vmlinux 0x216dafd1	cpufreq_global_kobject
+EXPORT_SYMBOL vmlinux 0x21c0da29	dst_alloc
+EXPORT_SYMBOL vmlinux 0x21cd1d02	tty_hung_up_p
+EXPORT_SYMBOL vmlinux 0x21d6d576	mvOsIoUncachedFree
+EXPORT_SYMBOL vmlinux 0x21ed9a1b	dev_mc_sync
+EXPORT_SYMBOL vmlinux 0x21f8327f	_snd_ctl_add_slave
+EXPORT_SYMBOL vmlinux 0x2208b5dd	mvBoardPhyAddrGet
+EXPORT_SYMBOL vmlinux 0x222e7ce2	sysfs_streq
+EXPORT_SYMBOL vmlinux 0x222f9ee5	do_SAK
+EXPORT_SYMBOL vmlinux 0x2233197b	journal_forget
+EXPORT_SYMBOL vmlinux 0x224c1f4c	otg_put_transceiver
+EXPORT_SYMBOL vmlinux 0x2251c4e7	elv_rb_former_request
+EXPORT_SYMBOL vmlinux 0x226e86a9	audit_log
+EXPORT_SYMBOL vmlinux 0x22754461	mvAudioHalInit
+EXPORT_SYMBOL vmlinux 0x22850c7b	netdev_boot_setup_check
+EXPORT_SYMBOL vmlinux 0x2288378f	system_state
+EXPORT_SYMBOL vmlinux 0x22904676	nf_register_hooks
+EXPORT_SYMBOL vmlinux 0x22a73912	__tcp_put_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x22b325d5	kd_mksound
+EXPORT_SYMBOL vmlinux 0x22b6533b	xfrm_sad_getinfo
+EXPORT_SYMBOL vmlinux 0x22b6e5ea	blk_queue_prep_rq
+EXPORT_SYMBOL vmlinux 0x22c4635f	tcp_prot
+EXPORT_SYMBOL vmlinux 0x22e1df80	mnt_pin
+EXPORT_SYMBOL vmlinux 0x22e84aa0	ip6_route_output
+EXPORT_SYMBOL vmlinux 0x231cf494	up_write
+EXPORT_SYMBOL vmlinux 0x2324f1ab	sound_class
+EXPORT_SYMBOL vmlinux 0x23269a13	strict_strtoul
+EXPORT_SYMBOL vmlinux 0x234592ab	snd_card_file_add
+EXPORT_SYMBOL vmlinux 0x234a7f64	iput
+EXPORT_SYMBOL vmlinux 0x23838107	__down_write
+EXPORT_SYMBOL vmlinux 0x23a13e3d	__pskb_pull_tail
+EXPORT_SYMBOL vmlinux 0x23be8800	d_prune_aliases
+EXPORT_SYMBOL vmlinux 0x23ef61a4	jbd2_journal_get_undo_access
+EXPORT_SYMBOL vmlinux 0x23fd3028	vmalloc_node
+EXPORT_SYMBOL vmlinux 0x2431299f	vfs_create
+EXPORT_SYMBOL vmlinux 0x244d5249	pcim_iomap
+EXPORT_SYMBOL vmlinux 0x244fe985	block_invalidatepage
+EXPORT_SYMBOL vmlinux 0x2455c156	__clear_user
+EXPORT_SYMBOL vmlinux 0x2459bbcc	console_set_on_cmdline
+EXPORT_SYMBOL vmlinux 0x2466c976	jbd2_journal_get_write_access
+EXPORT_SYMBOL vmlinux 0x24748fe6	xfrm_policy_register_afinfo
+EXPORT_SYMBOL vmlinux 0x247dfdf1	call_usermodehelper_stdinpipe
+EXPORT_SYMBOL vmlinux 0x24a94b26	snd_info_get_line
+EXPORT_SYMBOL vmlinux 0x24bad7c9	alloc_disk
+EXPORT_SYMBOL vmlinux 0x24c4e456	tty_register_device
+EXPORT_SYMBOL vmlinux 0x24dfb7e4	crypto_dispatch
+EXPORT_SYMBOL vmlinux 0x24f41b85	kobject_init
+EXPORT_SYMBOL vmlinux 0x24fdac79	wake_bit_function
+EXPORT_SYMBOL vmlinux 0x250113b4	memory_read_from_buffer
+EXPORT_SYMBOL vmlinux 0x25188747	splice_from_pipe_end
+EXPORT_SYMBOL vmlinux 0x25820c64	fs_overflowuid
+EXPORT_SYMBOL vmlinux 0x258355b4	fb_find_best_mode
+EXPORT_SYMBOL vmlinux 0x25948688	kernel_sock_shutdown
+EXPORT_SYMBOL vmlinux 0x25b87751	sock_alloc_send_skb
+EXPORT_SYMBOL vmlinux 0x25ba121c	mempool_resize
+EXPORT_SYMBOL vmlinux 0x25d08411	netdev_class_remove_file
+EXPORT_SYMBOL vmlinux 0x25fa6f17	wait_for_completion
+EXPORT_SYMBOL vmlinux 0x261c1766	__backtrace
+EXPORT_SYMBOL vmlinux 0x263e5bd0	dm_kcopyd_copy
+EXPORT_SYMBOL vmlinux 0x26477c07	__vmalloc
+EXPORT_SYMBOL vmlinux 0x26508893	netdev_rx_csum_fault
+EXPORT_SYMBOL vmlinux 0x26740d52	scsi_setup_blk_pc_cmnd
+EXPORT_SYMBOL vmlinux 0x267721a9	pci_lost_interrupt
+EXPORT_SYMBOL vmlinux 0x267fc65b	__tasklet_hi_schedule
+EXPORT_SYMBOL vmlinux 0x26b9b4ac	pci_get_device
+EXPORT_SYMBOL vmlinux 0x26e76fb8	sysctl_udp_wmem_min
+EXPORT_SYMBOL vmlinux 0x271dfa35	jbd2_journal_force_commit
+EXPORT_SYMBOL vmlinux 0x27493af9	unlock_page
+EXPORT_SYMBOL vmlinux 0x27567216	dove_vmeta_get_memory_size
+EXPORT_SYMBOL vmlinux 0x27598c6f	pci_set_master
+EXPORT_SYMBOL vmlinux 0x2765b034	neigh_seq_stop
+EXPORT_SYMBOL vmlinux 0x277b7a84	sock_tx_timestamp
+EXPORT_SYMBOL vmlinux 0x27864d57	memparse
+EXPORT_SYMBOL vmlinux 0x2795b351	tty_register_ldisc
+EXPORT_SYMBOL vmlinux 0x27b0d0db	pagecache_write_begin
+EXPORT_SYMBOL vmlinux 0x27b55c5b	ndisc_mc_map
+EXPORT_SYMBOL vmlinux 0x27bbf221	disable_irq_nosync
+EXPORT_SYMBOL vmlinux 0x27c02593	udp_sendmsg
+EXPORT_SYMBOL vmlinux 0x27c61ece	qdisc_put_stab
+EXPORT_SYMBOL vmlinux 0x28009e77	unregister_console
+EXPORT_SYMBOL vmlinux 0x28118cb6	__get_user_1
+EXPORT_SYMBOL vmlinux 0x2827ceca	kunmap_atomic
+EXPORT_SYMBOL vmlinux 0x2827debf	kobject_get
+EXPORT_SYMBOL vmlinux 0x285ac517	strict_strtoll
+EXPORT_SYMBOL vmlinux 0x286cb66a	block_sync_page
+EXPORT_SYMBOL vmlinux 0x289592df	scsi_unblock_requests
+EXPORT_SYMBOL vmlinux 0x28a2ed02	scsi_build_sense_buffer
+EXPORT_SYMBOL vmlinux 0x28a5fc2d	vfs_quota_on
+EXPORT_SYMBOL vmlinux 0x28c33e54	pci_set_consistent_dma_mask
+EXPORT_SYMBOL vmlinux 0x28e4ae7f	w1_unregister_family
+EXPORT_SYMBOL vmlinux 0x28eb68cb	snd_ac97_pcm_open
+EXPORT_SYMBOL vmlinux 0x28f1e72e	snd_pcm_lib_ioctl
+EXPORT_SYMBOL vmlinux 0x29537c9e	alloc_chrdev_region
+EXPORT_SYMBOL vmlinux 0x295a38e2	crypto_find_device_byhid
+EXPORT_SYMBOL vmlinux 0x29773f50	xfrm_state_alloc
+EXPORT_SYMBOL vmlinux 0x297a42f0	nf_register_sockopt
+EXPORT_SYMBOL vmlinux 0x297abd16	bio_sector_offset
+EXPORT_SYMBOL vmlinux 0x2983bd04	blk_queue_dma_pad
+EXPORT_SYMBOL vmlinux 0x2999a1c7	unlock_new_inode
+EXPORT_SYMBOL vmlinux 0x29bd4c46	__cap_init_eff_set
+EXPORT_SYMBOL vmlinux 0x29be7845	page_zero_new_buffers
+EXPORT_SYMBOL vmlinux 0x29cf3244	journal_check_used_features
+EXPORT_SYMBOL vmlinux 0x29e779f4	snd_ac97_mixer
+EXPORT_SYMBOL vmlinux 0x29f7df12	bio_alloc_bioset
+EXPORT_SYMBOL vmlinux 0x29fa8f2e	vlan_dev_vlan_id
+EXPORT_SYMBOL vmlinux 0x2a079972	vfs_rmdir
+EXPORT_SYMBOL vmlinux 0x2a137793	fb_find_mode
+EXPORT_SYMBOL vmlinux 0x2a1f8e3a	snd_ctl_boolean_stereo_info
+EXPORT_SYMBOL vmlinux 0x2a2d71ec	dev_set_promiscuity
+EXPORT_SYMBOL vmlinux 0x2a3f9d3f	iov_iter_copy_from_user_atomic
+EXPORT_SYMBOL vmlinux 0x2a479c0a	task_nice
+EXPORT_SYMBOL vmlinux 0x2a55a929	km_policy_expired
+EXPORT_SYMBOL vmlinux 0x2a7001ae	simple_sync_file
+EXPORT_SYMBOL vmlinux 0x2a79ac13	clkdev_add
+EXPORT_SYMBOL vmlinux 0x2a893316	blkdev_put
+EXPORT_SYMBOL vmlinux 0x2a9554d5	may_umount_tree
+EXPORT_SYMBOL vmlinux 0x2aa0e4fc	strncasecmp
+EXPORT_SYMBOL vmlinux 0x2aa1d408	cfb_copyarea
+EXPORT_SYMBOL vmlinux 0x2aa37717	sock_i_ino
+EXPORT_SYMBOL vmlinux 0x2ac7cabc	mvCesaCopyToMbuf
+EXPORT_SYMBOL vmlinux 0x2adda9a8	snd_unregister_oss_device
+EXPORT_SYMBOL vmlinux 0x2ae5f6a6	pcim_iomap_regions_request_all
+EXPORT_SYMBOL vmlinux 0x2b0ba2b0	scsi_sense_desc_find
+EXPORT_SYMBOL vmlinux 0x2b37263e	mmc_register_driver
+EXPORT_SYMBOL vmlinux 0x2b40baff	__down_write_nested
+EXPORT_SYMBOL vmlinux 0x2b54d40a	bio_add_page
+EXPORT_SYMBOL vmlinux 0x2b570dc0	ida_pre_get
+EXPORT_SYMBOL vmlinux 0x2b62b6e9	cap_netlink_recv
+EXPORT_SYMBOL vmlinux 0x2b6b6d33	i2c_del_driver
+EXPORT_SYMBOL vmlinux 0x2b70880b	snd_device_free
+EXPORT_SYMBOL vmlinux 0x2b7dd661	key_payload_reserve
+EXPORT_SYMBOL vmlinux 0x2b98a4c9	mmc_host_lazy_disable
+EXPORT_SYMBOL vmlinux 0x2ba707a8	sysctl_tcp_low_latency
+EXPORT_SYMBOL vmlinux 0x2bb09795	sock_common_recvmsg
+EXPORT_SYMBOL vmlinux 0x2bd349c4	pskb_expand_head
+EXPORT_SYMBOL vmlinux 0x2c6817c1	blk_start_request
+EXPORT_SYMBOL vmlinux 0x2c9323bb	pci_clear_mwi
+EXPORT_SYMBOL vmlinux 0x2ca6baea	snd_pcm_kernel_ioctl
+EXPORT_SYMBOL vmlinux 0x2ca9c1a7	snd_ctl_find_id
+EXPORT_SYMBOL vmlinux 0x2cae2b60	scsi_execute_req
+EXPORT_SYMBOL vmlinux 0x2d08c64a	generic_getxattr
+EXPORT_SYMBOL vmlinux 0x2d265451	ll_rw_block
+EXPORT_SYMBOL vmlinux 0x2d2f6e2c	key_task_permission
+EXPORT_SYMBOL vmlinux 0x2d6507b5	_find_next_zero_bit_le
+EXPORT_SYMBOL vmlinux 0x2d89342a	scsi_show_sense_hdr
+EXPORT_SYMBOL vmlinux 0x2d8e6aee	skb_prepare_seq_read
+EXPORT_SYMBOL vmlinux 0x2d9b8b77	set_page_dirty_lock
+EXPORT_SYMBOL vmlinux 0x2daa2a22	i2c_smbus_read_i2c_block_data
+EXPORT_SYMBOL vmlinux 0x2dcb0123	schedule_delayed_work_on
+EXPORT_SYMBOL vmlinux 0x2e1974c4	bio_get_nr_vecs
+EXPORT_SYMBOL vmlinux 0x2e19ce59	blk_init_queue
+EXPORT_SYMBOL vmlinux 0x2e1ca751	clk_put
+EXPORT_SYMBOL vmlinux 0x2e1fb410	snd_pcm_lib_free_pages
+EXPORT_SYMBOL vmlinux 0x2e2621ff	task_tgid_nr_ns
+EXPORT_SYMBOL vmlinux 0x2e2ce9e0	sysctl_tcp_syncookies
+EXPORT_SYMBOL vmlinux 0x2e42fecf	add_mtd_partitions
+EXPORT_SYMBOL vmlinux 0x2e4a39f8	sysctl_udp_mem
+EXPORT_SYMBOL vmlinux 0x2e5810c6	__aeabi_unwind_cpp_pr1
+EXPORT_SYMBOL vmlinux 0x2e79a6ce	tcp_v4_md5_do_add
+EXPORT_SYMBOL vmlinux 0x2e7c8b7d	pci_scan_bus_parented
+EXPORT_SYMBOL vmlinux 0x2e7ce199	get_io_context
+EXPORT_SYMBOL vmlinux 0x2ec078eb	open_by_devnum
+EXPORT_SYMBOL vmlinux 0x2ec76930	cfb_imageblit
+EXPORT_SYMBOL vmlinux 0x2f38224a	pci_bus_read_config_dword
+EXPORT_SYMBOL vmlinux 0x2f51e428	xfrm_policy_delete
+EXPORT_SYMBOL vmlinux 0x2f65df70	strstrip
+EXPORT_SYMBOL vmlinux 0x2f731d65	n_tty_ioctl_helper
+EXPORT_SYMBOL vmlinux 0x2f997229	mvSizePrint
+EXPORT_SYMBOL vmlinux 0x2fac2d18	pci_assign_resource
+EXPORT_SYMBOL vmlinux 0x2fade7b8	snd_pcm_stop
+EXPORT_SYMBOL vmlinux 0x2fd63deb	bd_release
+EXPORT_SYMBOL vmlinux 0x2fde6ea3	snd_card_disconnect
+EXPORT_SYMBOL vmlinux 0x30048d32	dmam_free_coherent
+EXPORT_SYMBOL vmlinux 0x30072410	eth_type_trans
+EXPORT_SYMBOL vmlinux 0x300c4374	release_sock
+EXPORT_SYMBOL vmlinux 0x30123eb5	icmpv6_statistics
+EXPORT_SYMBOL vmlinux 0x30405a14	kernel_getpeername
+EXPORT_SYMBOL vmlinux 0x30433461	bmm_malloc_kernel
+EXPORT_SYMBOL vmlinux 0x30581d6f	block_prepare_write
+EXPORT_SYMBOL vmlinux 0x30695dd0	neigh_parms_release
+EXPORT_SYMBOL vmlinux 0x309e17d3	pci_release_region
+EXPORT_SYMBOL vmlinux 0x30a06b9c	key_negate_and_link
+EXPORT_SYMBOL vmlinux 0x30b57e00	snd_ac97_pcm_assign
+EXPORT_SYMBOL vmlinux 0x30c0a55e	snd_device_register
+EXPORT_SYMBOL vmlinux 0x30d46788	tcp_splice_read
+EXPORT_SYMBOL vmlinux 0x30d66de3	orion_gpio_set_blink
+EXPORT_SYMBOL vmlinux 0x30e74134	tty_termios_copy_hw
+EXPORT_SYMBOL vmlinux 0x30ecf7f5	netif_carrier_on
+EXPORT_SYMBOL vmlinux 0x310917fe	sort
+EXPORT_SYMBOL vmlinux 0x31121fe1	genl_unregister_mc_group
+EXPORT_SYMBOL vmlinux 0x313341a3	_set_bit_le
+EXPORT_SYMBOL vmlinux 0x313ba7bc	skb_tx_hash
+EXPORT_SYMBOL vmlinux 0x3145216f	pci_dev_present
+EXPORT_SYMBOL vmlinux 0x3147857d	default_red
+EXPORT_SYMBOL vmlinux 0x314a47e6	phy_start
+EXPORT_SYMBOL vmlinux 0x3158ae19	filp_open
+EXPORT_SYMBOL vmlinux 0x3168ab79	snd_pcm_lib_writev
+EXPORT_SYMBOL vmlinux 0x31822093	mb_cache_entry_alloc
+EXPORT_SYMBOL vmlinux 0x318d14f6	sock_setsockopt
+EXPORT_SYMBOL vmlinux 0x31b31f5c	csum_partial_copy_nocheck
+EXPORT_SYMBOL vmlinux 0x31b352d1	journal_set_features
+EXPORT_SYMBOL vmlinux 0x31f9776e	xfrm_policy_byid
+EXPORT_SYMBOL vmlinux 0x3217280e	__blk_end_request_cur
+EXPORT_SYMBOL vmlinux 0x3217c823	jbd2_journal_set_triggers
+EXPORT_SYMBOL vmlinux 0x3219cfbd	dquot_alloc_inode
+EXPORT_SYMBOL vmlinux 0x322390a9	pci_read_vpd
+EXPORT_SYMBOL vmlinux 0x322627cf	generic_block_fiemap
+EXPORT_SYMBOL vmlinux 0x322b1edd	scsi_set_medium_removal
+EXPORT_SYMBOL vmlinux 0x323222ba	mutex_unlock
+EXPORT_SYMBOL vmlinux 0x323c03fc	sock_create
+EXPORT_SYMBOL vmlinux 0x32492110	input_register_device
+EXPORT_SYMBOL vmlinux 0x326df9e1	vfs_stat
+EXPORT_SYMBOL vmlinux 0x3285cc48	param_set_uint
+EXPORT_SYMBOL vmlinux 0x328a05f1	strncpy
+EXPORT_SYMBOL vmlinux 0x328f3cbf	snd_pcm_lib_readv
+EXPORT_SYMBOL vmlinux 0x32942c79	mmc_wait_for_app_cmd
+EXPORT_SYMBOL vmlinux 0x329b349c	journal_extend
+EXPORT_SYMBOL vmlinux 0x32a20309	do_splice_to
+EXPORT_SYMBOL vmlinux 0x32b3c2d3	dquot_mark_dquot_dirty
+EXPORT_SYMBOL vmlinux 0x32b4555b	tty_get_baud_rate
+EXPORT_SYMBOL vmlinux 0x32bf66b2	__kill_fasync
+EXPORT_SYMBOL vmlinux 0x32ce623a	sg_last
+EXPORT_SYMBOL vmlinux 0x32e73977	jbd2_journal_invalidatepage
+EXPORT_SYMBOL vmlinux 0x3300a525	unregister_filesystem
+EXPORT_SYMBOL vmlinux 0x333cefa9	d_genocide
+EXPORT_SYMBOL vmlinux 0x333ffc9e	inet_getname
+EXPORT_SYMBOL vmlinux 0x334b0867	pci_add_new_bus
+EXPORT_SYMBOL vmlinux 0x336609ea	d_alloc
+EXPORT_SYMBOL vmlinux 0x3383ff39	napi_frags_finish
+EXPORT_SYMBOL vmlinux 0x33a85152	skb_trim
+EXPORT_SYMBOL vmlinux 0x33c5e80c	sock_no_connect
+EXPORT_SYMBOL vmlinux 0x33d98030	dev_close
+EXPORT_SYMBOL vmlinux 0x33f89ff1	abort_creds
+EXPORT_SYMBOL vmlinux 0x340c7d1f	register_sysctl_paths
+EXPORT_SYMBOL vmlinux 0x3430b5ef	tty_name
+EXPORT_SYMBOL vmlinux 0x3436a3d7	filemap_fdatawrite
+EXPORT_SYMBOL vmlinux 0x343a0759	gnet_stats_start_copy
+EXPORT_SYMBOL vmlinux 0x3457cb68	param_set_long
+EXPORT_SYMBOL vmlinux 0x34729a4e	vfs_set_dqblk
+EXPORT_SYMBOL vmlinux 0x347d4753	mmc_suspend_host
+EXPORT_SYMBOL vmlinux 0x34908c14	print_hex_dump_bytes
+EXPORT_SYMBOL vmlinux 0x3491614d	tty_vhangup
+EXPORT_SYMBOL vmlinux 0x349cba85	strchr
+EXPORT_SYMBOL vmlinux 0x34bb5e4d	journal_blocks_per_page
+EXPORT_SYMBOL vmlinux 0x34bee024	phy_enable_interrupts
+EXPORT_SYMBOL vmlinux 0x34ca4624	d_invalidate
+EXPORT_SYMBOL vmlinux 0x34f30d14	neigh_event_ns
+EXPORT_SYMBOL vmlinux 0x34f33733	qdisc_calculate_pkt_len
+EXPORT_SYMBOL vmlinux 0x351d92c7	datagram_poll
+EXPORT_SYMBOL vmlinux 0x3520a8d0	register_sound_special_device
+EXPORT_SYMBOL vmlinux 0x352ef384	sock_create_lite
+EXPORT_SYMBOL vmlinux 0x353e3fa5	__get_user_4
+EXPORT_SYMBOL vmlinux 0x3564ed84	xrlim_allow
+EXPORT_SYMBOL vmlinux 0x3565225b	map_destroy
+EXPORT_SYMBOL vmlinux 0x35810aa8	iw_handler_get_thrspy
+EXPORT_SYMBOL vmlinux 0x35b3e00d	pci_select_bars
+EXPORT_SYMBOL vmlinux 0x35c2ba9e	refrigerator
+EXPORT_SYMBOL vmlinux 0x35d34088	uart_get_divisor
+EXPORT_SYMBOL vmlinux 0x35da2e61	radix_tree_tag_get
+EXPORT_SYMBOL vmlinux 0x35ee1b1d	netlink_broadcast
+EXPORT_SYMBOL vmlinux 0x360b1afe	probe_irq_mask
+EXPORT_SYMBOL vmlinux 0x361e06b0	inet_twsk_deschedule
+EXPORT_SYMBOL vmlinux 0x36c071c4	__scsi_put_command
+EXPORT_SYMBOL vmlinux 0x36c267c1	scsi_remove_target
+EXPORT_SYMBOL vmlinux 0x36cbccf4	read_cache_page_gfp
+EXPORT_SYMBOL vmlinux 0x36e47222	remove_wait_queue
+EXPORT_SYMBOL vmlinux 0x36e62aa3	vga_put
+EXPORT_SYMBOL vmlinux 0x36ebe42d	kmem_cache_free
+EXPORT_SYMBOL vmlinux 0x36fc1ab9	proc_net_netfilter
+EXPORT_SYMBOL vmlinux 0x36fc96b0	__kfree_skb
+EXPORT_SYMBOL vmlinux 0x37173a46	sync_inodes_sb
+EXPORT_SYMBOL vmlinux 0x371781a5	con_is_bound
+EXPORT_SYMBOL vmlinux 0x37210c6c	generic_setlease
+EXPORT_SYMBOL vmlinux 0x37432145	blk_queue_update_dma_alignment
+EXPORT_SYMBOL vmlinux 0x3744cf36	vmalloc_to_pfn
+EXPORT_SYMBOL vmlinux 0x374ed073	scnprintf
+EXPORT_SYMBOL vmlinux 0x3796bdcc	snd_pcm_format_little_endian
+EXPORT_SYMBOL vmlinux 0x37af6a0a	abort_exclusive_wait
+EXPORT_SYMBOL vmlinux 0x37b694d3	simple_rename
+EXPORT_SYMBOL vmlinux 0x37befc70	jiffies_to_msecs
+EXPORT_SYMBOL vmlinux 0x37e74642	get_jiffies_64
+EXPORT_SYMBOL vmlinux 0x37e81aee	vfs_path_lookup
+EXPORT_SYMBOL vmlinux 0x381c4bb1	cancel_delayed_work_sync
+EXPORT_SYMBOL vmlinux 0x38384ad0	ether_setup
+EXPORT_SYMBOL vmlinux 0x383a6b14	revalidate_disk
+EXPORT_SYMBOL vmlinux 0x38724d82	filemap_fdatawait
+EXPORT_SYMBOL vmlinux 0x3873c8ee	ip_cmsg_recv
+EXPORT_SYMBOL vmlinux 0x388cddf0	tty_pair_get_tty
+EXPORT_SYMBOL vmlinux 0x388f9128	xfrm_state_walk_done
+EXPORT_SYMBOL vmlinux 0x38aaf9b5	nf_reinject
+EXPORT_SYMBOL vmlinux 0x38c4a4da	poll_schedule_timeout
+EXPORT_SYMBOL vmlinux 0x38e8378d	pgprot_kernel
+EXPORT_SYMBOL vmlinux 0x39221463	inet_accept
+EXPORT_SYMBOL vmlinux 0x39343573	mark_buffer_async_write
+EXPORT_SYMBOL vmlinux 0x393839af	xfrm4_rcv
+EXPORT_SYMBOL vmlinux 0x395e287f	snd_pcm_link_rwlock
+EXPORT_SYMBOL vmlinux 0x3971b4df	snd_ecards_limit
+EXPORT_SYMBOL vmlinux 0x3980aac1	unregister_reboot_notifier
+EXPORT_SYMBOL vmlinux 0x39a66eed	blk_plug_device
+EXPORT_SYMBOL vmlinux 0x39bf9301	_snd_pcm_hw_param_setempty
+EXPORT_SYMBOL vmlinux 0x39c08933	vfs_dq_transfer
+EXPORT_SYMBOL vmlinux 0x39ca9a7b	mvDebugPrintMacAddr
+EXPORT_SYMBOL vmlinux 0x39e3dd23	mod_firmware_load
+EXPORT_SYMBOL vmlinux 0x39e7af5a	block_truncate_page
+EXPORT_SYMBOL vmlinux 0x39f3a0d5	gnet_stats_finish_copy
+EXPORT_SYMBOL vmlinux 0x3a1e3dc7	input_open_device
+EXPORT_SYMBOL vmlinux 0x3a2204c6	security_netlink_recv
+EXPORT_SYMBOL vmlinux 0x3a4e64b8	ipv6_setsockopt
+EXPORT_SYMBOL vmlinux 0x3a6333c4	dma_pool_create
+EXPORT_SYMBOL vmlinux 0x3a71875a	tty_insert_flip_string
+EXPORT_SYMBOL vmlinux 0x3a81300d	dev_trans_start
+EXPORT_SYMBOL vmlinux 0x3a8d66e8	d_obtain_alias
+EXPORT_SYMBOL vmlinux 0x3a8f76aa	vfs_quota_enable
+EXPORT_SYMBOL vmlinux 0x3a9b6fb9	blk_unregister_region
+EXPORT_SYMBOL vmlinux 0x3ab2d174	down_killable
+EXPORT_SYMBOL vmlinux 0x3ab80cef	sock_kmalloc
+EXPORT_SYMBOL vmlinux 0x3ac1e5c8	security_path_link
+EXPORT_SYMBOL vmlinux 0x3ad56ec0	skb_store_bits
+EXPORT_SYMBOL vmlinux 0x3adc15b9	posix_acl_from_mode
+EXPORT_SYMBOL vmlinux 0x3adf2014	filemap_flush
+EXPORT_SYMBOL vmlinux 0x3ae831b6	kref_init
+EXPORT_SYMBOL vmlinux 0x3b2f4b27	vfs_statfs
+EXPORT_SYMBOL vmlinux 0x3b3016d3	cpufreq_unregister_notifier
+EXPORT_SYMBOL vmlinux 0x3b30c6ff	dev_kfree_skb_any
+EXPORT_SYMBOL vmlinux 0x3b3defc9	truncate_inode_pages
+EXPORT_SYMBOL vmlinux 0x3b5ff5d0	arm_shut_down
+EXPORT_SYMBOL vmlinux 0x3b62d5cc	usb_gadget_unregister_driver
+EXPORT_SYMBOL vmlinux 0x3b7b26a3	skb_dma_map
+EXPORT_SYMBOL vmlinux 0x3b8c12a7	netif_receive_skb
+EXPORT_SYMBOL vmlinux 0x3b91f3af	snd_free_pages
+EXPORT_SYMBOL vmlinux 0x3bb78130	set_current_groups
+EXPORT_SYMBOL vmlinux 0x3bbcf505	mmc_card_can_sleep
+EXPORT_SYMBOL vmlinux 0x3bd0979f	tcf_hash_check
+EXPORT_SYMBOL vmlinux 0x3bd0d488	cdev_index
+EXPORT_SYMBOL vmlinux 0x3bd1b1f6	msecs_to_jiffies
+EXPORT_SYMBOL vmlinux 0x3bdabd4a	kset_unregister
+EXPORT_SYMBOL vmlinux 0x3be9fa84	nf_unregister_hooks
+EXPORT_SYMBOL vmlinux 0x3bf3fd33	dove_vmeta_get_memory_start
+EXPORT_SYMBOL vmlinux 0x3c01015c	pneigh_enqueue
+EXPORT_SYMBOL vmlinux 0x3c035e71	__nla_put
+EXPORT_SYMBOL vmlinux 0x3c0f20c9	xfrm6_rcv_spi
+EXPORT_SYMBOL vmlinux 0x3c2c5af5	sprintf
+EXPORT_SYMBOL vmlinux 0x3c356f1e	atomic_dec_and_mutex_lock
+EXPORT_SYMBOL vmlinux 0x3c3ec334	block_fsync
+EXPORT_SYMBOL vmlinux 0x3c7d0fb8	udp_poll
+EXPORT_SYMBOL vmlinux 0x3c9d1211	string_get_size
+EXPORT_SYMBOL vmlinux 0x3ca1e418	stop_tty
+EXPORT_SYMBOL vmlinux 0x3ca401dd	simple_empty
+EXPORT_SYMBOL vmlinux 0x3ca7ffbc	bio_unmap_user
+EXPORT_SYMBOL vmlinux 0x3ca9e47c	blk_dump_rq_flags
+EXPORT_SYMBOL vmlinux 0x3cc0a3bb	xfrm_spd_getinfo
+EXPORT_SYMBOL vmlinux 0x3ce12edd	cpu_user
+EXPORT_SYMBOL vmlinux 0x3ce4ca6f	disable_irq
+EXPORT_SYMBOL vmlinux 0x3cf6404c	w1_add_master_device
+EXPORT_SYMBOL vmlinux 0x3cfab4ca	udp_ioctl
+EXPORT_SYMBOL vmlinux 0x3cfeebc3	nand_correct_data
+EXPORT_SYMBOL vmlinux 0x3d0f73de	get_super
+EXPORT_SYMBOL vmlinux 0x3d1910c4	genphy_read_status
+EXPORT_SYMBOL vmlinux 0x3d1f80d6	dma_declare_coherent_memory
+EXPORT_SYMBOL vmlinux 0x3d20bec9	scsi_test_unit_ready
+EXPORT_SYMBOL vmlinux 0x3d3c540f	elf_hwcap
+EXPORT_SYMBOL vmlinux 0x3d5ced8e	tcp_rcv_established
+EXPORT_SYMBOL vmlinux 0x3d68bd4b	flow_cache_genid
+EXPORT_SYMBOL vmlinux 0x3d71a8ff	i2c_master_recv
+EXPORT_SYMBOL vmlinux 0x3d821f1f	rtnl_unicast
+EXPORT_SYMBOL vmlinux 0x3d8da52b	dm_io_client_destroy
+EXPORT_SYMBOL vmlinux 0x3d90bdbc	generic_file_aio_write
+EXPORT_SYMBOL vmlinux 0x3d978ba6	crypto_kregister
+EXPORT_SYMBOL vmlinux 0x3d9be6b7	wait_on_page_bit
+EXPORT_SYMBOL vmlinux 0x3daa69da	vfs_lstat
+EXPORT_SYMBOL vmlinux 0x3dbad2e6	do_sync_write
+EXPORT_SYMBOL vmlinux 0x3dced27a	register_quota_format
+EXPORT_SYMBOL vmlinux 0x3dd10a8c	d_add_ci
+EXPORT_SYMBOL vmlinux 0x3dd3f80f	journal_update_format
+EXPORT_SYMBOL vmlinux 0x3dd6956a	i2c_smbus_read_block_data
+EXPORT_SYMBOL vmlinux 0x3ddb9af8	tty_check_change
+EXPORT_SYMBOL vmlinux 0x3ddfc56c	tcp_recvmsg
+EXPORT_SYMBOL vmlinux 0x3df5ef7c	ip_mc_dec_group
+EXPORT_SYMBOL vmlinux 0x3e044104	dget_locked
+EXPORT_SYMBOL vmlinux 0x3e2ef602	pcibios_resource_to_bus
+EXPORT_SYMBOL vmlinux 0x3e383385	nf_hooks
+EXPORT_SYMBOL vmlinux 0x3e3b0b9f	phy_print_status
+EXPORT_SYMBOL vmlinux 0x3e45e9ff	register_inetaddr_notifier
+EXPORT_SYMBOL vmlinux 0x3e5b2984	tty_pair_get_pty
+EXPORT_SYMBOL vmlinux 0x3e61b6e3	pci_enable_wake
+EXPORT_SYMBOL vmlinux 0x3e6caebd	add_wait_queue_exclusive
+EXPORT_SYMBOL vmlinux 0x3e7c8b02	dove_io_core_lost_power
+EXPORT_SYMBOL vmlinux 0x3e899c9d	blk_limits_io_min
+EXPORT_SYMBOL vmlinux 0x3ed63055	zlib_inflateReset
+EXPORT_SYMBOL vmlinux 0x3ef860b1	__breadahead
+EXPORT_SYMBOL vmlinux 0x3f0a945a	pci_release_regions
+EXPORT_SYMBOL vmlinux 0x3f2142b7	mvCesaDebugStatus
+EXPORT_SYMBOL vmlinux 0x3f4547a7	put_unused_fd
+EXPORT_SYMBOL vmlinux 0x3f6533ca	tcp_hashinfo
+EXPORT_SYMBOL vmlinux 0x3f66bdd5	napi_gro_flush
+EXPORT_SYMBOL vmlinux 0x3f7321e6	kern_path
+EXPORT_SYMBOL vmlinux 0x3f924ae4	snd_pcm_hw_constraint_minmax
+EXPORT_SYMBOL vmlinux 0x3f991760	netdev_set_master
+EXPORT_SYMBOL vmlinux 0x3fa1c989	d_lookup
+EXPORT_SYMBOL vmlinux 0x3fb4c96e	i2c_put_adapter
+EXPORT_SYMBOL vmlinux 0x3fcac73b	tty_port_alloc_xmit_buf
+EXPORT_SYMBOL vmlinux 0x3fdd6eb7	snd_add_device_sysfs_file
+EXPORT_SYMBOL vmlinux 0x3fe78302	udp_disconnect
+EXPORT_SYMBOL vmlinux 0x3ff62317	local_bh_disable
+EXPORT_SYMBOL vmlinux 0x40123aeb	idr_for_each
+EXPORT_SYMBOL vmlinux 0x403b6d7d	d_splice_alias
+EXPORT_SYMBOL vmlinux 0x4054e6e9	blk_queue_softirq_done
+EXPORT_SYMBOL vmlinux 0x4059792f	print_hex_dump
+EXPORT_SYMBOL vmlinux 0x405a24fe	__getblk
+EXPORT_SYMBOL vmlinux 0x405c1144	get_seconds
+EXPORT_SYMBOL vmlinux 0x405c992f	simple_write_begin
+EXPORT_SYMBOL vmlinux 0x40668e48	snd_ctl_remove
+EXPORT_SYMBOL vmlinux 0x407136b1	__put_user_8
+EXPORT_SYMBOL vmlinux 0x408bd304	i2c_smbus_write_byte_data
+EXPORT_SYMBOL vmlinux 0x409873e3	tty_termios_baud_rate
+EXPORT_SYMBOL vmlinux 0x40a27c37	scsi_dev_info_remove_list
+EXPORT_SYMBOL vmlinux 0x40a6f522	__arm_ioremap
+EXPORT_SYMBOL vmlinux 0x40cb8cc6	kunmap
+EXPORT_SYMBOL vmlinux 0x40d1118e	inet_sk_rebuild_header
+EXPORT_SYMBOL vmlinux 0x40d41a07	snd_card_proc_new
+EXPORT_SYMBOL vmlinux 0x40e46210	sk_stream_wait_connect
+EXPORT_SYMBOL vmlinux 0x40f07981	__ashldi3
+EXPORT_SYMBOL vmlinux 0x40f2e3b4	dma_alloc_from_coherent
+EXPORT_SYMBOL vmlinux 0x40f54fb4	vfs_dq_quota_on_remount
+EXPORT_SYMBOL vmlinux 0x40fb5a37	scsi_register_driver
+EXPORT_SYMBOL vmlinux 0x4101bbde	param_set_copystring
+EXPORT_SYMBOL vmlinux 0x410503a8	dma_async_device_register
+EXPORT_SYMBOL vmlinux 0x4108e69a	fb_match_mode
+EXPORT_SYMBOL vmlinux 0x4114996d	pci_get_bus_and_slot
+EXPORT_SYMBOL vmlinux 0x41153b85	get_user_pages
+EXPORT_SYMBOL vmlinux 0x41166725	inet_frags_init_net
+EXPORT_SYMBOL vmlinux 0x411a0c19	pci_scan_slot
+EXPORT_SYMBOL vmlinux 0x412c8d82	__page_symlink
+EXPORT_SYMBOL vmlinux 0x412ddc0c	dcache_lock
+EXPORT_SYMBOL vmlinux 0x41344088	param_get_charp
+EXPORT_SYMBOL vmlinux 0x4141b9b5	brioctl_set
+EXPORT_SYMBOL vmlinux 0x41482d8b	strndup_user
+EXPORT_SYMBOL vmlinux 0x414fdd98	snd_info_register
+EXPORT_SYMBOL vmlinux 0x415a0731	netdev_state_change
+EXPORT_SYMBOL vmlinux 0x416983d9	netdev_fix_features
+EXPORT_SYMBOL vmlinux 0x4173d13a	phy_device_free
+EXPORT_SYMBOL vmlinux 0x41749c89	xfrm_register_km
+EXPORT_SYMBOL vmlinux 0x4185cf4b	radix_tree_lookup_slot
+EXPORT_SYMBOL vmlinux 0x4188d439	neigh_rand_reach_time
+EXPORT_SYMBOL vmlinux 0x41f3cae1	seq_release
+EXPORT_SYMBOL vmlinux 0x4204dcef	scsi_register_interface
+EXPORT_SYMBOL vmlinux 0x4211c3c1	zlib_inflateInit2
+EXPORT_SYMBOL vmlinux 0x42224298	sscanf
+EXPORT_SYMBOL vmlinux 0x4228f492	write_inode_now
+EXPORT_SYMBOL vmlinux 0x422a1a2c	dmam_declare_coherent_memory
+EXPORT_SYMBOL vmlinux 0x4232a7bf	sock_init_data
+EXPORT_SYMBOL vmlinux 0x425142e9	scsi_reset_provider
+EXPORT_SYMBOL vmlinux 0x4289e79d	bio_clone
+EXPORT_SYMBOL vmlinux 0x42a7e865	snd_ac97_read
+EXPORT_SYMBOL vmlinux 0x42acf03c	blk_queue_max_segment_size
+EXPORT_SYMBOL vmlinux 0x42bf0f98	sock_common_getsockopt
+EXPORT_SYMBOL vmlinux 0x42c48410	alloc_pci_dev
+EXPORT_SYMBOL vmlinux 0x42ceb973	d_alloc_name
+EXPORT_SYMBOL vmlinux 0x430205aa	__sg_alloc_table
+EXPORT_SYMBOL vmlinux 0x4302d0eb	free_pages
+EXPORT_SYMBOL vmlinux 0x43258911	locks_remove_posix
+EXPORT_SYMBOL vmlinux 0x432c36ce	jbd2_journal_lock_updates
+EXPORT_SYMBOL vmlinux 0x4333eadb	param_set_short
+EXPORT_SYMBOL vmlinux 0x433b87c5	snd_timer_stop
+EXPORT_SYMBOL vmlinux 0x4340b191	slow_work_enqueue
+EXPORT_SYMBOL vmlinux 0x434fa55c	release_console_sem
+EXPORT_SYMBOL vmlinux 0x436b29f8	console_start
+EXPORT_SYMBOL vmlinux 0x4379f547	uart_resume_port
+EXPORT_SYMBOL vmlinux 0x4388c72e	elv_dispatch_add_tail
+EXPORT_SYMBOL vmlinux 0x438f9d6f	pci_dev_get
+EXPORT_SYMBOL vmlinux 0x43ab66c3	param_array_get
+EXPORT_SYMBOL vmlinux 0x43b24b75	dev_kfree_skb_irq
+EXPORT_SYMBOL vmlinux 0x43c9b592	lease_modify
+EXPORT_SYMBOL vmlinux 0x43c9c5e1	inetdev_by_index
+EXPORT_SYMBOL vmlinux 0x43ddf32b	netpoll_setup
+EXPORT_SYMBOL vmlinux 0x440af32b	cuio_getptr
+EXPORT_SYMBOL vmlinux 0x44161c19	unregister_shrinker
+EXPORT_SYMBOL vmlinux 0x441e00ef	snd_ctl_rename_id
+EXPORT_SYMBOL vmlinux 0x442eaeb7	fb_set_cmap
+EXPORT_SYMBOL vmlinux 0x44314efb	radix_tree_gang_lookup_tag_slot
+EXPORT_SYMBOL vmlinux 0x444779c4	nla_find
+EXPORT_SYMBOL vmlinux 0x44643b93	__aeabi_lmul
+EXPORT_SYMBOL vmlinux 0x446610e4	__bforget
+EXPORT_SYMBOL vmlinux 0x4474e2a1	netlink_dump_start
+EXPORT_SYMBOL vmlinux 0x447e53ee	fput
+EXPORT_SYMBOL vmlinux 0x44b911c3	rb_replace_node
+EXPORT_SYMBOL vmlinux 0x44bb5cd1	xfrm6_input_addr
+EXPORT_SYMBOL vmlinux 0x44c214d1	__wake_up_bit
+EXPORT_SYMBOL vmlinux 0x44da5d0f	__csum_ipv6_magic
+EXPORT_SYMBOL vmlinux 0x44e9a829	match_token
+EXPORT_SYMBOL vmlinux 0x4575315d	utf8s_to_utf16s
+EXPORT_SYMBOL vmlinux 0x4582d656	mapping_tagged
+EXPORT_SYMBOL vmlinux 0x45947727	param_array_set
+EXPORT_SYMBOL vmlinux 0x45a55ec8	__iounmap
+EXPORT_SYMBOL vmlinux 0x45bda0d5	system_serial_low
+EXPORT_SYMBOL vmlinux 0x45be100b	call_usermodehelper_freeinfo
+EXPORT_SYMBOL vmlinux 0x45cae8d3	mvCesaHalInit
+EXPORT_SYMBOL vmlinux 0x45d90115	bio_split
+EXPORT_SYMBOL vmlinux 0x45e1bdb6	scsi_host_put
+EXPORT_SYMBOL vmlinux 0x45e909d9	nla_reserve_nohdr
+EXPORT_SYMBOL vmlinux 0x462a2e75	match_strlcpy
+EXPORT_SYMBOL vmlinux 0x464ba03f	sync_mapping_buffers
+EXPORT_SYMBOL vmlinux 0x4661d3c8	tcp_md5_hash_skb_data
+EXPORT_SYMBOL vmlinux 0x46814b5a	blk_queue_logical_block_size
+EXPORT_SYMBOL vmlinux 0x4694c794	kobject_del
+EXPORT_SYMBOL vmlinux 0x4698bebd	scsi_prep_fn
+EXPORT_SYMBOL vmlinux 0x46a314a1	clip_tbl_hook
+EXPORT_SYMBOL vmlinux 0x46a6a2e8	journal_destroy
+EXPORT_SYMBOL vmlinux 0x46bd4df7	vfs_rename
+EXPORT_SYMBOL vmlinux 0x46d3b28c	__div0
+EXPORT_SYMBOL vmlinux 0x46d4e835	snd_pcm_hw_constraint_step
+EXPORT_SYMBOL vmlinux 0x46dcf4be	scsi_adjust_queue_depth
+EXPORT_SYMBOL vmlinux 0x470601c6	tcp_proc_register
+EXPORT_SYMBOL vmlinux 0x4719ba4e	kfifo_free
+EXPORT_SYMBOL vmlinux 0x47283843	tcp_sendmsg
+EXPORT_SYMBOL vmlinux 0x472baaef	ilookup
+EXPORT_SYMBOL vmlinux 0x472d2a9a	radix_tree_lookup
+EXPORT_SYMBOL vmlinux 0x475100c2	inet_get_local_port_range
+EXPORT_SYMBOL vmlinux 0x476f4bcd	in_dev_finish_destroy
+EXPORT_SYMBOL vmlinux 0x47906377	ethtool_op_set_tx_csum
+EXPORT_SYMBOL vmlinux 0x479496c9	netif_notify_peers
+EXPORT_SYMBOL vmlinux 0x47cb8340	__rta_fill
+EXPORT_SYMBOL vmlinux 0x47ce816b	pci_bus_set_ops
+EXPORT_SYMBOL vmlinux 0x47eddb14	tc6393xb_lcd_set_power
+EXPORT_SYMBOL vmlinux 0x47f757de	elf_platform
+EXPORT_SYMBOL vmlinux 0x4806a51a	inet_csk_reset_keepalive_timer
+EXPORT_SYMBOL vmlinux 0x4818be0b	skb_recycle_check
+EXPORT_SYMBOL vmlinux 0x4859b8bb	rtc_year_days
+EXPORT_SYMBOL vmlinux 0x486b6407	hweight64
+EXPORT_SYMBOL vmlinux 0x487baa11	phy_device_register
+EXPORT_SYMBOL vmlinux 0x487e2c96	snd_dma_get_reserved_buf
+EXPORT_SYMBOL vmlinux 0x4880c48f	ip_fragment
+EXPORT_SYMBOL vmlinux 0x488c6c93	mmc_card_sleep
+EXPORT_SYMBOL vmlinux 0x489c3b71	mod_timer_pinned
+EXPORT_SYMBOL vmlinux 0x48a5b067	__machine_arch_type
+EXPORT_SYMBOL vmlinux 0x48bc5813	directly_mappable_cdev_bdi
+EXPORT_SYMBOL vmlinux 0x48c3208e	ipv6_push_nfrag_opts
+EXPORT_SYMBOL vmlinux 0x48ea1376	scsi_eh_restore_cmnd
+EXPORT_SYMBOL vmlinux 0x48f9f12d	complete_all
+EXPORT_SYMBOL vmlinux 0x4905ab49	snd_pcm_open_substream
+EXPORT_SYMBOL vmlinux 0x491fe903	input_get_keycode
+EXPORT_SYMBOL vmlinux 0x4920c359	__scsi_iterate_devices
+EXPORT_SYMBOL vmlinux 0x4927915b	clk_round_rate
+EXPORT_SYMBOL vmlinux 0x492ab7d5	lock_may_write
+EXPORT_SYMBOL vmlinux 0x49439411	genl_unregister_family
+EXPORT_SYMBOL vmlinux 0x4946112c	elv_add_request
+EXPORT_SYMBOL vmlinux 0x494e8f1f	pci_enable_device
+EXPORT_SYMBOL vmlinux 0x49603fb8	security_sb_copy_data
+EXPORT_SYMBOL vmlinux 0x4981923c	phy_stop_interrupts
+EXPORT_SYMBOL vmlinux 0x4985d4b2	dev_gro_receive
+EXPORT_SYMBOL vmlinux 0x499673cc	bdev_read_only
+EXPORT_SYMBOL vmlinux 0x499af87b	jbd2_journal_blocks_per_page
+EXPORT_SYMBOL vmlinux 0x49d45e22	ethtool_op_set_sg
+EXPORT_SYMBOL vmlinux 0x49e182c0	param_get_string
+EXPORT_SYMBOL vmlinux 0x49e94444	xfrm_policy_alloc
+EXPORT_SYMBOL vmlinux 0x49feeeec	qdisc_watchdog_schedule
+EXPORT_SYMBOL vmlinux 0x4a358252	__bitmap_subset
+EXPORT_SYMBOL vmlinux 0x4a3ea5c0	snd_request_card
+EXPORT_SYMBOL vmlinux 0x4a501c23	sk_receive_skb
+EXPORT_SYMBOL vmlinux 0x4a971ec7	radix_tree_delete
+EXPORT_SYMBOL vmlinux 0x4a9db087	pcim_pin_device
+EXPORT_SYMBOL vmlinux 0x4acfd8ad	down_interruptible
+EXPORT_SYMBOL vmlinux 0x4add3c85	unload_nls
+EXPORT_SYMBOL vmlinux 0x4ae1b45d	register_nls
+EXPORT_SYMBOL vmlinux 0x4aea4791	__strncpy_from_user
+EXPORT_SYMBOL vmlinux 0x4aee7140	tty_unregister_driver
+EXPORT_SYMBOL vmlinux 0x4af35d37	tty_port_close_end
+EXPORT_SYMBOL vmlinux 0x4afe9a77	scsi_partsize
+EXPORT_SYMBOL vmlinux 0x4b062074	cpufreq_get_policy
+EXPORT_SYMBOL vmlinux 0x4b34fbf5	block_all_signals
+EXPORT_SYMBOL vmlinux 0x4b63d7cd	end_page_writeback
+EXPORT_SYMBOL vmlinux 0x4b79975a	save_time_delta
+EXPORT_SYMBOL vmlinux 0x4b8edde9	complete_and_exit
+EXPORT_SYMBOL vmlinux 0x4b8fb1e8	mvCesaCryptoIvSet
+EXPORT_SYMBOL vmlinux 0x4b9294b3	dmam_pool_create
+EXPORT_SYMBOL vmlinux 0x4b9f3684	kfifo_init
+EXPORT_SYMBOL vmlinux 0x4ba1d5fb	vfs_mknod
+EXPORT_SYMBOL vmlinux 0x4ba4ad78	ip_nat_decode_session
+EXPORT_SYMBOL vmlinux 0x4bbc3e5f	pm_flags
+EXPORT_SYMBOL vmlinux 0x4c1182cb	bitmap_scnprintf
+EXPORT_SYMBOL vmlinux 0x4c20bd1a	xfrm_policy_walk
+EXPORT_SYMBOL vmlinux 0x4c3e6bef	blk_queue_max_discard_sectors
+EXPORT_SYMBOL vmlinux 0x4c62be67	inode_init_once
+EXPORT_SYMBOL vmlinux 0x4c7a9c80	mdiobus_register
+EXPORT_SYMBOL vmlinux 0x4cb18ffb	audit_log_start
+EXPORT_SYMBOL vmlinux 0x4cb51791	ip_mc_rejoin_group
+EXPORT_SYMBOL vmlinux 0x4cbbd171	__bitmap_weight
+EXPORT_SYMBOL vmlinux 0x4cbd47a7	tcf_unregister_action
+EXPORT_SYMBOL vmlinux 0x4d0d163d	copy_page
+EXPORT_SYMBOL vmlinux 0x4d16eee6	deny_write_access
+EXPORT_SYMBOL vmlinux 0x4d30c807	unregister_tcf_proto_ops
+EXPORT_SYMBOL vmlinux 0x4d32da90	nlmsg_notify
+EXPORT_SYMBOL vmlinux 0x4d3c153f	sigprocmask
+EXPORT_SYMBOL vmlinux 0x4d592c1d	netif_device_detach
+EXPORT_SYMBOL vmlinux 0x4d90b6dc	consume_skb
+EXPORT_SYMBOL vmlinux 0x4d9b6d35	snd_pcm_format_size
+EXPORT_SYMBOL vmlinux 0x4db70ab6	mv_usb_show
+EXPORT_SYMBOL vmlinux 0x4dc45be9	nf_log_unbind_pf
+EXPORT_SYMBOL vmlinux 0x4dd17896	vfs_writev
+EXPORT_SYMBOL vmlinux 0x4de46877	inet_proto_csum_replace4
+EXPORT_SYMBOL vmlinux 0x4de73f2b	mb_cache_entry_free
+EXPORT_SYMBOL vmlinux 0x4dec6038	memscan
+EXPORT_SYMBOL vmlinux 0x4dec8100	zero_fill_bio
+EXPORT_SYMBOL vmlinux 0x4df119fa	__bitmap_parse
+EXPORT_SYMBOL vmlinux 0x4e0009da	idr_get_new_above
+EXPORT_SYMBOL vmlinux 0x4e069249	security_tun_dev_post_create
+EXPORT_SYMBOL vmlinux 0x4e23ce6b	blk_make_request
+EXPORT_SYMBOL vmlinux 0x4e2a915b	napi_gro_frags
+EXPORT_SYMBOL vmlinux 0x4e3567f7	match_int
+EXPORT_SYMBOL vmlinux 0x4e3bf2bd	tcf_exts_dump
+EXPORT_SYMBOL vmlinux 0x4e4f5402	inet_register_protosw
+EXPORT_SYMBOL vmlinux 0x4e6e8ea7	fg_console
+EXPORT_SYMBOL vmlinux 0x4e7f6865	simple_dir_inode_operations
+EXPORT_SYMBOL vmlinux 0x4e830a3e	strnicmp
+EXPORT_SYMBOL vmlinux 0x4e8ae4ef	vfs_quota_disable
+EXPORT_SYMBOL vmlinux 0x4eb1f921	dmam_pool_destroy
+EXPORT_SYMBOL vmlinux 0x4ee4f9d7	seq_bitmap
+EXPORT_SYMBOL vmlinux 0x4efe19c0	do_map_probe
+EXPORT_SYMBOL vmlinux 0x4f0ea0c0	up
+EXPORT_SYMBOL vmlinux 0x4f17f952	inet6_ioctl
+EXPORT_SYMBOL vmlinux 0x4f1cd128	security_tun_dev_create
+EXPORT_SYMBOL vmlinux 0x4f7a317e	dma_sync_sg_for_device
+EXPORT_SYMBOL vmlinux 0x4f816e9b	snd_pcm_format_big_endian
+EXPORT_SYMBOL vmlinux 0x4f86f1bc	blk_rq_map_sg
+EXPORT_SYMBOL vmlinux 0x4fa1457c	htc_egpio_get_wakeup_irq
+EXPORT_SYMBOL vmlinux 0x4fbd7d9b	skb_clone
+EXPORT_SYMBOL vmlinux 0x4fbdf10b	simple_release_fs
+EXPORT_SYMBOL vmlinux 0x4ff01526	dev_unicast_sync
+EXPORT_SYMBOL vmlinux 0x4ff7bfc5	netdev_features_change
+EXPORT_SYMBOL vmlinux 0x5008fe0d	textsearch_destroy
+EXPORT_SYMBOL vmlinux 0x501ec0c8	devm_ioremap
+EXPORT_SYMBOL vmlinux 0x50211ee3	tcp_free_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x50334566	posix_unblock_lock
+EXPORT_SYMBOL vmlinux 0x5047dbb8	vfs_quota_sync
+EXPORT_SYMBOL vmlinux 0x506746b6	getrawmonotonic
+EXPORT_SYMBOL vmlinux 0x506b1e8f	bdev_stack_limits
+EXPORT_SYMBOL vmlinux 0x507142ba	dquot_initialize
+EXPORT_SYMBOL vmlinux 0x50936563	dquot_destroy
+EXPORT_SYMBOL vmlinux 0x5093fa82	_clear_bit_le
+EXPORT_SYMBOL vmlinux 0x50a5704e	get_sb_pseudo
+EXPORT_SYMBOL vmlinux 0x50ad6316	mb_cache_create
+EXPORT_SYMBOL vmlinux 0x50cee8a8	dma_pool_free
+EXPORT_SYMBOL vmlinux 0x5100d6b0	w1_remove_master_device
+EXPORT_SYMBOL vmlinux 0x5107a5c4	seq_write
+EXPORT_SYMBOL vmlinux 0x511510ca	wait_for_key_construction
+EXPORT_SYMBOL vmlinux 0x5118c382	secure_dccp_sequence_number
+EXPORT_SYMBOL vmlinux 0x511e4ded	dm_kcopyd_client_destroy
+EXPORT_SYMBOL vmlinux 0x51271a05	generic_file_buffered_write
+EXPORT_SYMBOL vmlinux 0x512f3d37	xfrm_unregister_type
+EXPORT_SYMBOL vmlinux 0x514426c5	__dev_getfirstbyhwtype
+EXPORT_SYMBOL vmlinux 0x51493d94	finish_wait
+EXPORT_SYMBOL vmlinux 0x515fd48c	phy_disconnect
+EXPORT_SYMBOL vmlinux 0x5188c6e8	__scsi_alloc_queue
+EXPORT_SYMBOL vmlinux 0x518da76d	xfrm_stateonly_find
+EXPORT_SYMBOL vmlinux 0x51903b61	inet_stream_connect
+EXPORT_SYMBOL vmlinux 0x51908eb8	__raw_writesl
+EXPORT_SYMBOL vmlinux 0x51b43674	free_task
+EXPORT_SYMBOL vmlinux 0x51cf10db	ip6_route_me_harder
+EXPORT_SYMBOL vmlinux 0x51d963f0	block_is_partially_uptodate
+EXPORT_SYMBOL vmlinux 0x51dce73b	xfrm_state_walk_init
+EXPORT_SYMBOL vmlinux 0x51e2fe90	sock_no_ioctl
+EXPORT_SYMBOL vmlinux 0x51e77c97	pfn_valid
+EXPORT_SYMBOL vmlinux 0x51ed4071	snd_pcm_hw_param_first
+EXPORT_SYMBOL vmlinux 0x51ef33b8	kstrndup
+EXPORT_SYMBOL vmlinux 0x52026cdf	security_sb_parse_opts_str
+EXPORT_SYMBOL vmlinux 0x521ccd50	genphy_restart_aneg
+EXPORT_SYMBOL vmlinux 0x52354a0b	mutex_trylock
+EXPORT_SYMBOL vmlinux 0x523804ad	pci_disable_device
+EXPORT_SYMBOL vmlinux 0x523d5c02	blk_queue_dma_alignment
+EXPORT_SYMBOL vmlinux 0x52760ca9	getnstimeofday
+EXPORT_SYMBOL vmlinux 0x52871091	pci_find_bus
+EXPORT_SYMBOL vmlinux 0x528a25c1	tty_insert_flip_string_flags
+EXPORT_SYMBOL vmlinux 0x528c709d	simple_read_from_buffer
+EXPORT_SYMBOL vmlinux 0x528c911c	del_timer
+EXPORT_SYMBOL vmlinux 0x52a58c24	ifla_policy
+EXPORT_SYMBOL vmlinux 0x52b0021d	generic_file_llseek_unlocked
+EXPORT_SYMBOL vmlinux 0x52ceef96	__netif_schedule
+EXPORT_SYMBOL vmlinux 0x52ddd503	security_inode_readlink
+EXPORT_SYMBOL vmlinux 0x52e3e4a5	snd_pcm_hw_param_value
+EXPORT_SYMBOL vmlinux 0x52eb6a56	crypto_getcaps
+EXPORT_SYMBOL vmlinux 0x52ebb126	param_get_ushort
+EXPORT_SYMBOL vmlinux 0x530676a9	pci_bus_alloc_resource
+EXPORT_SYMBOL vmlinux 0x530b1e98	pm_suspend
+EXPORT_SYMBOL vmlinux 0x53152730	set_disk_ro
+EXPORT_SYMBOL vmlinux 0x53196135	ip_mc_inc_group
+EXPORT_SYMBOL vmlinux 0x532162cb	__xfrm_decode_session
+EXPORT_SYMBOL vmlinux 0x53326531	mempool_alloc_pages
+EXPORT_SYMBOL vmlinux 0x533d384f	__lock_buffer
+EXPORT_SYMBOL vmlinux 0x53405b36	mmc_request_done
+EXPORT_SYMBOL vmlinux 0x537e1a45	neigh_parms_alloc
+EXPORT_SYMBOL vmlinux 0x5381c34d	pci_fixup_cardbus
+EXPORT_SYMBOL vmlinux 0x538383c0	unregister_inet6addr_notifier
+EXPORT_SYMBOL vmlinux 0x53a7db7d	snd_timer_new
+EXPORT_SYMBOL vmlinux 0x53b82520	write_cache_pages
+EXPORT_SYMBOL vmlinux 0x53c0767c	sk_chk_filter
+EXPORT_SYMBOL vmlinux 0x53d7963e	scsi_report_device_reset
+EXPORT_SYMBOL vmlinux 0x53de7eb8	dev_set_mtu
+EXPORT_SYMBOL vmlinux 0x53e01f9d	mntput_no_expire
+EXPORT_SYMBOL vmlinux 0x53ec4a69	inode_permission
+EXPORT_SYMBOL vmlinux 0x53f6d53e	sock_queue_rcv_skb
+EXPORT_SYMBOL vmlinux 0x5402f4e4	elevator_exit
+EXPORT_SYMBOL vmlinux 0x541df515	pagevec_lookup
+EXPORT_SYMBOL vmlinux 0x54290dc9	nla_validate
+EXPORT_SYMBOL vmlinux 0x543ff68d	tcf_em_register
+EXPORT_SYMBOL vmlinux 0x545b67e8	xfrm_state_register_afinfo
+EXPORT_SYMBOL vmlinux 0x54864c88	nf_unregister_queue_handler
+EXPORT_SYMBOL vmlinux 0x548b4835	____pagevec_lru_add
+EXPORT_SYMBOL vmlinux 0x54d42936	seq_printf
+EXPORT_SYMBOL vmlinux 0x54e6fcdd	net_enable_timestamp
+EXPORT_SYMBOL vmlinux 0x54e9a3a5	netpoll_print_options
+EXPORT_SYMBOL vmlinux 0x54f0f66e	scsi_target_resume
+EXPORT_SYMBOL vmlinux 0x54fff7c9	dev_addr_del
+EXPORT_SYMBOL vmlinux 0x550ccc64	journal_errno
+EXPORT_SYMBOL vmlinux 0x551af55a	xfrm_prepare_input
+EXPORT_SYMBOL vmlinux 0x551c7c48	ip_xfrm_me_harder
+EXPORT_SYMBOL vmlinux 0x5574c2cf	filemap_fdatawait_range
+EXPORT_SYMBOL vmlinux 0x5576c87f	user_path_at
+EXPORT_SYMBOL vmlinux 0x5594be03	bitmap_remap
+EXPORT_SYMBOL vmlinux 0x55a4f163	pci_request_selected_regions
+EXPORT_SYMBOL vmlinux 0x55d0d6f9	init_task
+EXPORT_SYMBOL vmlinux 0x5600904f	fb_get_color_depth
+EXPORT_SYMBOL vmlinux 0x5603cf43	do_settimeofday
+EXPORT_SYMBOL vmlinux 0x5614b010	xfrm_policy_walk_done
+EXPORT_SYMBOL vmlinux 0x56152014	snd_pcm_hw_constraint_msbits
+EXPORT_SYMBOL vmlinux 0x5630e6d0	pci_dev_driver
+EXPORT_SYMBOL vmlinux 0x56330703	kobject_set_name
+EXPORT_SYMBOL vmlinux 0x56356764	ethtool_op_set_tx_ipv6_csum
+EXPORT_SYMBOL vmlinux 0x5635a60a	vmalloc_user
+EXPORT_SYMBOL vmlinux 0x564585e4	w1_ds2760_read
+EXPORT_SYMBOL vmlinux 0x564c9b8a	scsi_execute
+EXPORT_SYMBOL vmlinux 0x5653d06f	i2c_smbus_write_word_data
+EXPORT_SYMBOL vmlinux 0x567152d2	snd_seq_root
+EXPORT_SYMBOL vmlinux 0x56932dda	mvAudioDCOCtrlSet
+EXPORT_SYMBOL vmlinux 0x56a6e41f	i2c_smbus_xfer
+EXPORT_SYMBOL vmlinux 0x56bb43a5	locks_mandatory_area
+EXPORT_SYMBOL vmlinux 0x56bff288	jbd2_journal_extend
+EXPORT_SYMBOL vmlinux 0x56c7f102	mmc_wait_for_req
+EXPORT_SYMBOL vmlinux 0x56c8799d	scsi_kunmap_atomic_sg
+EXPORT_SYMBOL vmlinux 0x56df5a59	mmc_regulator_set_ocr
+EXPORT_SYMBOL vmlinux 0x56ff54be	inet_frag_find
+EXPORT_SYMBOL vmlinux 0x570ea7a0	__xfrm_state_delete
+EXPORT_SYMBOL vmlinux 0x572683d4	journal_create
+EXPORT_SYMBOL vmlinux 0x572e85d4	blk_lookup_devt
+EXPORT_SYMBOL vmlinux 0x57394dfe	pxa2xx_pcm_dma_irq
+EXPORT_SYMBOL vmlinux 0x573faae1	ethtool_op_get_ufo
+EXPORT_SYMBOL vmlinux 0x5747b751	nobh_writepage
+EXPORT_SYMBOL vmlinux 0x57575f08	dmaengine_put
+EXPORT_SYMBOL vmlinux 0x576e6081	mvOsIoCachedFree
+EXPORT_SYMBOL vmlinux 0x577f2351	scsi_print_result
+EXPORT_SYMBOL vmlinux 0x578bd3f4	simple_write_end
+EXPORT_SYMBOL vmlinux 0x578e2290	netlink_ack
+EXPORT_SYMBOL vmlinux 0x57a57fed	ilookup5
+EXPORT_SYMBOL vmlinux 0x57a6504e	vsnprintf
+EXPORT_SYMBOL vmlinux 0x57b57ebe	jiffies_to_timespec
+EXPORT_SYMBOL vmlinux 0x57b65a4d	mii_ethtool_gset
+EXPORT_SYMBOL vmlinux 0x57b7d506	inet_shutdown
+EXPORT_SYMBOL vmlinux 0x57c26fc1	snd_pcm_suspend_all
+EXPORT_SYMBOL vmlinux 0x57db7242	mangle_path
+EXPORT_SYMBOL vmlinux 0x57f4cc7d	deactivate_super
+EXPORT_SYMBOL vmlinux 0x580ef6c5	blk_queue_bounce_limit
+EXPORT_SYMBOL vmlinux 0x5838f6c9	rtc_valid_tm
+EXPORT_SYMBOL vmlinux 0x5847c4ad	init_buffer
+EXPORT_SYMBOL vmlinux 0x5851cac4	mpage_writepages
+EXPORT_SYMBOL vmlinux 0x5857e434	groups_free
+EXPORT_SYMBOL vmlinux 0x5883a7b0	cdev_init
+EXPORT_SYMBOL vmlinux 0x5898c3a7	inet_csk_clear_xmit_timers
+EXPORT_SYMBOL vmlinux 0x591c5b4f	dmam_release_declared_memory
+EXPORT_SYMBOL vmlinux 0x591f3593	dquot_reserve_space
+EXPORT_SYMBOL vmlinux 0x5934392b	fb_register_client
+EXPORT_SYMBOL vmlinux 0x59370937	generic_file_splice_read
+EXPORT_SYMBOL vmlinux 0x594b783a	tty_port_tty_get
+EXPORT_SYMBOL vmlinux 0x594bf15b	ioport_map
+EXPORT_SYMBOL vmlinux 0x594e1317	__modsi3
+EXPORT_SYMBOL vmlinux 0x5975b9be	simple_getattr
+EXPORT_SYMBOL vmlinux 0x59d696b6	register_module_notifier
+EXPORT_SYMBOL vmlinux 0x59d8223a	ioport_resource
+EXPORT_SYMBOL vmlinux 0x59e5070d	__do_div64
+EXPORT_SYMBOL vmlinux 0x59f25f85	scsi_setup_fs_cmnd
+EXPORT_SYMBOL vmlinux 0x5a6235b0	vmtruncate
+EXPORT_SYMBOL vmlinux 0x5a6f8d42	xfrm_unregister_km
+EXPORT_SYMBOL vmlinux 0x5a744b86	netlink_set_nonroot
+EXPORT_SYMBOL vmlinux 0x5a837101	d_find_alias
+EXPORT_SYMBOL vmlinux 0x5ab0428b	splice_direct_to_actor
+EXPORT_SYMBOL vmlinux 0x5ae0850d	crypto_getfeat
+EXPORT_SYMBOL vmlinux 0x5b09717f	check_disk_size_change
+EXPORT_SYMBOL vmlinux 0x5b19634d	div_s64_rem
+EXPORT_SYMBOL vmlinux 0x5b257ff2	read_cache_page
+EXPORT_SYMBOL vmlinux 0x5b26364e	netpoll_cleanup
+EXPORT_SYMBOL vmlinux 0x5b3e0442	xfrm_unregister_mode
+EXPORT_SYMBOL vmlinux 0x5b47bebd	pci_get_slot
+EXPORT_SYMBOL vmlinux 0x5b9b3d53	journal_dirty_metadata
+EXPORT_SYMBOL vmlinux 0x5bba1d13	proc_create_data
+EXPORT_SYMBOL vmlinux 0x5c5e4647	fb_get_buffer_offset
+EXPORT_SYMBOL vmlinux 0x5c62180c	mvCesaMbufCopy
+EXPORT_SYMBOL vmlinux 0x5c673bc8	tty_mutex
+EXPORT_SYMBOL vmlinux 0x5c7c31b0	__devm_request_region
+EXPORT_SYMBOL vmlinux 0x5c9284a0	processor_id
+EXPORT_SYMBOL vmlinux 0x5c98abe2	mii_link_ok
+EXPORT_SYMBOL vmlinux 0x5cad13c2	elv_dispatch_sort
+EXPORT_SYMBOL vmlinux 0x5d12b3fc	twl4030_i2c_write_u8
+EXPORT_SYMBOL vmlinux 0x5d1d3274	__nla_put_nohdr
+EXPORT_SYMBOL vmlinux 0x5d247513	fb_get_mode
+EXPORT_SYMBOL vmlinux 0x5d2d7c87	devm_request_threaded_irq
+EXPORT_SYMBOL vmlinux 0x5d3f039d	gnet_stats_copy_basic
+EXPORT_SYMBOL vmlinux 0x5d4f23ef	free_buffer_head
+EXPORT_SYMBOL vmlinux 0x5d5ae54c	register_qdisc
+EXPORT_SYMBOL vmlinux 0x5d5b8422	notify_change
+EXPORT_SYMBOL vmlinux 0x5d6e921e	do_munmap
+EXPORT_SYMBOL vmlinux 0x5d7897b3	scsi_device_lookup_by_target
+EXPORT_SYMBOL vmlinux 0x5e215c6a	tcp_v4_md5_lookup
+EXPORT_SYMBOL vmlinux 0x5e2e17fe	dma_alloc_coherent
+EXPORT_SYMBOL vmlinux 0x5e5104f5	tty_driver_flush_buffer
+EXPORT_SYMBOL vmlinux 0x5e5990bf	pci_set_dma_seg_boundary
+EXPORT_SYMBOL vmlinux 0x5e667398	invalidate_inode_buffers
+EXPORT_SYMBOL vmlinux 0x5e7f4920	snd_pcm_format_set_silence
+EXPORT_SYMBOL vmlinux 0x5e8a5015	write_one_page
+EXPORT_SYMBOL vmlinux 0x5e95b1cd	current_umask
+EXPORT_SYMBOL vmlinux 0x5ea320aa	clk_set_rate
+EXPORT_SYMBOL vmlinux 0x5ea520c5	tcp_select_initial_window
+EXPORT_SYMBOL vmlinux 0x5eb17b2e	freeze_bdev
+EXPORT_SYMBOL vmlinux 0x5ebb56fb	down_read
+EXPORT_SYMBOL vmlinux 0x5ec7d45b	single_release
+EXPORT_SYMBOL vmlinux 0x5ed040b0	pm_set_vt_switch
+EXPORT_SYMBOL vmlinux 0x5ed71d5f	__tcp_get_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x5edd0762	bin2bcd
+EXPORT_SYMBOL vmlinux 0x5edf053a	fifo_set_limit
+EXPORT_SYMBOL vmlinux 0x5f0bd47f	pcie_get_readrq
+EXPORT_SYMBOL vmlinux 0x5f13ea64	get_sb_single
+EXPORT_SYMBOL vmlinux 0x5f1c09fd	key_validate
+EXPORT_SYMBOL vmlinux 0x5f56b0a7	mvI2SPlaybackCtrlSet
+EXPORT_SYMBOL vmlinux 0x5f57bafc	pci_reenable_device
+EXPORT_SYMBOL vmlinux 0x5f754e5a	memset
+EXPORT_SYMBOL vmlinux 0x5f880467	dst_discard
+EXPORT_SYMBOL vmlinux 0x5f8e321c	generic_shutdown_super
+EXPORT_SYMBOL vmlinux 0x5f8ff338	blk_queue_find_tag
+EXPORT_SYMBOL vmlinux 0x5fa7537b	igrab
+EXPORT_SYMBOL vmlinux 0x5fd36577	w1_ds2760_store_eeprom
+EXPORT_SYMBOL vmlinux 0x5ff09d72	set_device_ro
+EXPORT_SYMBOL vmlinux 0x600683d3	do_unblank_screen
+EXPORT_SYMBOL vmlinux 0x602b4a63	prepare_kernel_cred
+EXPORT_SYMBOL vmlinux 0x602c96f0	copy_to_user_fromio
+EXPORT_SYMBOL vmlinux 0x605817cb	block_write_full_page_endio
+EXPORT_SYMBOL vmlinux 0x6060c605	journal_get_write_access
+EXPORT_SYMBOL vmlinux 0x60706c24	pskb_copy
+EXPORT_SYMBOL vmlinux 0x609f1c7e	synchronize_net
+EXPORT_SYMBOL vmlinux 0x60a32ea9	pm_power_off
+EXPORT_SYMBOL vmlinux 0x60a4efe2	ida_get_new
+EXPORT_SYMBOL vmlinux 0x60bc412f	file_permission
+EXPORT_SYMBOL vmlinux 0x60e01104	restore_time_delta
+EXPORT_SYMBOL vmlinux 0x6114bafd	prepare_binprm
+EXPORT_SYMBOL vmlinux 0x612390ad	netpoll_set_trap
+EXPORT_SYMBOL vmlinux 0x612ec6df	key_put
+EXPORT_SYMBOL vmlinux 0x6147e782	pci_request_region_exclusive
+EXPORT_SYMBOL vmlinux 0x6153e26b	alloc_buffer_head
+EXPORT_SYMBOL vmlinux 0x615fed93	d_instantiate_unique
+EXPORT_SYMBOL vmlinux 0x616b720e	fb_set_suspend
+EXPORT_SYMBOL vmlinux 0x617d02fe	blkdev_issue_flush
+EXPORT_SYMBOL vmlinux 0x6185c205	scsi_host_set_state
+EXPORT_SYMBOL vmlinux 0x618a3450	inet6_unregister_protosw
+EXPORT_SYMBOL vmlinux 0x618d127e	setup_arg_pages
+EXPORT_SYMBOL vmlinux 0x618d8299	set_notify_swap_entry_free
+EXPORT_SYMBOL vmlinux 0x61b3b6c7	tty_unregister_device
+EXPORT_SYMBOL vmlinux 0x61b7b126	simple_strtoull
+EXPORT_SYMBOL vmlinux 0x61c7c1d9	vlan_ioctl_set
+EXPORT_SYMBOL vmlinux 0x61e8f788	cdev_alloc
+EXPORT_SYMBOL vmlinux 0x61f5d351	misc_deregister
+EXPORT_SYMBOL vmlinux 0x61ff2633	crypto_freereq
+EXPORT_SYMBOL vmlinux 0x621a7066	flush_old_exec
+EXPORT_SYMBOL vmlinux 0x6247cf6c	ds2782_reg_get
+EXPORT_SYMBOL vmlinux 0x625b8921	unregister_sysrq_key
+EXPORT_SYMBOL vmlinux 0x626a666f	scsi_free_command
+EXPORT_SYMBOL vmlinux 0x627194a1	alloc_disk_node
+EXPORT_SYMBOL vmlinux 0x62737e1d	sock_unregister
+EXPORT_SYMBOL vmlinux 0x62827bec	security_secctx_to_secid
+EXPORT_SYMBOL vmlinux 0x628ef97b	tty_free_termios
+EXPORT_SYMBOL vmlinux 0x62a6536d	mvCesaCopyFromMbuf
+EXPORT_SYMBOL vmlinux 0x62b01c14	kmap_high
+EXPORT_SYMBOL vmlinux 0x62b37737	key_link
+EXPORT_SYMBOL vmlinux 0x62cc569e	cpu_present_mask
+EXPORT_SYMBOL vmlinux 0x62d62672	unregister_netdev
+EXPORT_SYMBOL vmlinux 0x62efd665	uart_write_wakeup
+EXPORT_SYMBOL vmlinux 0x631b82d1	ethtool_op_set_flags
+EXPORT_SYMBOL vmlinux 0x632361f8	bio_copy_kern
+EXPORT_SYMBOL vmlinux 0x632acc33	__find_get_block
+EXPORT_SYMBOL vmlinux 0x636c00a5	get_sb_nodev
+EXPORT_SYMBOL vmlinux 0x636e70c5	truncate_pagecache
+EXPORT_SYMBOL vmlinux 0x63b49903	tty_devnum
+EXPORT_SYMBOL vmlinux 0x63b77377	__lookup_one_len
+EXPORT_SYMBOL vmlinux 0x63e8a779	simple_set_mnt
+EXPORT_SYMBOL vmlinux 0x63ecad53	register_netdevice_notifier
+EXPORT_SYMBOL vmlinux 0x63ef8a8a	block_read_full_page
+EXPORT_SYMBOL vmlinux 0x63efc536	radix_tree_prev_hole
+EXPORT_SYMBOL vmlinux 0x6403e338	tcp_memory_pressure
+EXPORT_SYMBOL vmlinux 0x640a7078	posix_acl_create_masq
+EXPORT_SYMBOL vmlinux 0x643d930f	scsi_track_queue_full
+EXPORT_SYMBOL vmlinux 0x6443e426	pipe_to_file
+EXPORT_SYMBOL vmlinux 0x6452354c	request_key
+EXPORT_SYMBOL vmlinux 0x6454f779	__pxa2xx_pcm_open
+EXPORT_SYMBOL vmlinux 0x6457112f	inet_frag_destroy
+EXPORT_SYMBOL vmlinux 0x64681a7c	nf_register_queue_handler
+EXPORT_SYMBOL vmlinux 0x646fe6d7	lro_vlan_hwaccel_receive_skb
+EXPORT_SYMBOL vmlinux 0x6485aad0	blk_stop_queue
+EXPORT_SYMBOL vmlinux 0x64999478	congestion_wait
+EXPORT_SYMBOL vmlinux 0x64c14672	blk_queue_bounce
+EXPORT_SYMBOL vmlinux 0x64c5de7c	vfs_follow_link
+EXPORT_SYMBOL vmlinux 0x64d57fb8	skb_checksum_help
+EXPORT_SYMBOL vmlinux 0x64e2b98e	snd_card_file_remove
+EXPORT_SYMBOL vmlinux 0x64f5d92a	unmap_underlying_metadata
+EXPORT_SYMBOL vmlinux 0x64fd19aa	security_path_mkdir
+EXPORT_SYMBOL vmlinux 0x650f8603	snd_pcm_format_silence_64
+EXPORT_SYMBOL vmlinux 0x651a4139	test_taint
+EXPORT_SYMBOL vmlinux 0x651b1a44	ip6_xmit
+EXPORT_SYMBOL vmlinux 0x6521c86a	load_nls_default
+EXPORT_SYMBOL vmlinux 0x6525a902	inet_del_protocol
+EXPORT_SYMBOL vmlinux 0x652da413	__skb_checksum_complete_head
+EXPORT_SYMBOL vmlinux 0x65311a44	xfrm6_find_1stfragopt
+EXPORT_SYMBOL vmlinux 0x65325731	simple_transaction_set
+EXPORT_SYMBOL vmlinux 0x65364d6b	kill_block_super
+EXPORT_SYMBOL vmlinux 0x65408378	zlib_inflate_blob
+EXPORT_SYMBOL vmlinux 0x65414e67	dev_valid_name
+EXPORT_SYMBOL vmlinux 0x659ad638	phy_register_fixup_for_uid
+EXPORT_SYMBOL vmlinux 0x65ad510f	d_validate
+EXPORT_SYMBOL vmlinux 0x65bb404b	w1_register_family
+EXPORT_SYMBOL vmlinux 0x65c01383	xfrm_state_update
+EXPORT_SYMBOL vmlinux 0x65ddd7b9	pcim_iomap_regions
+EXPORT_SYMBOL vmlinux 0x661cfae0	scsi_nonblockable_ioctl
+EXPORT_SYMBOL vmlinux 0x6651526a	mark_buffer_dirty
+EXPORT_SYMBOL vmlinux 0x666a586d	inet_frag_evictor
+EXPORT_SYMBOL vmlinux 0x667414e3	mvDebugMemDump
+EXPORT_SYMBOL vmlinux 0x6682d8d2	log_wait_commit
+EXPORT_SYMBOL vmlinux 0x668da8d5	zlib_inflateIncomp
+EXPORT_SYMBOL vmlinux 0x66a10ac1	pci_set_dma_mask
+EXPORT_SYMBOL vmlinux 0x66ee1e77	input_unregister_polled_device
+EXPORT_SYMBOL vmlinux 0x67053080	current_kernel_time
+EXPORT_SYMBOL vmlinux 0x672c5229	dev_getfirstbyhwtype
+EXPORT_SYMBOL vmlinux 0x675d3504	jbd2_journal_clear_err
+EXPORT_SYMBOL vmlinux 0x67a0cffe	per_cpu____irq_regs
+EXPORT_SYMBOL vmlinux 0x67a9583c	skb_push
+EXPORT_SYMBOL vmlinux 0x67b27ec1	tty_std_termios
+EXPORT_SYMBOL vmlinux 0x67be1d3d	cpu_active_mask
+EXPORT_SYMBOL vmlinux 0x67c2fa54	__copy_to_user
+EXPORT_SYMBOL vmlinux 0x67c8553e	posix_lock_file
+EXPORT_SYMBOL vmlinux 0x67cffe5e	snd_timer_interrupt
+EXPORT_SYMBOL vmlinux 0x67f2cee5	udp_table
+EXPORT_SYMBOL vmlinux 0x681cddab	clk_enable
+EXPORT_SYMBOL vmlinux 0x6835935f	loop_register_transfer
+EXPORT_SYMBOL vmlinux 0x68476b99	pci_request_region
+EXPORT_SYMBOL vmlinux 0x685d469d	tcf_em_tree_validate
+EXPORT_SYMBOL vmlinux 0x6865bbc7	jbd2_journal_init_dev
+EXPORT_SYMBOL vmlinux 0x689605bf	__register_binfmt
+EXPORT_SYMBOL vmlinux 0x6898a756	sg_init_table
+EXPORT_SYMBOL vmlinux 0x68a24153	snd_pcm_format_physical_width
+EXPORT_SYMBOL vmlinux 0x68b42bca	tty_port_raise_dtr_rts
+EXPORT_SYMBOL vmlinux 0x690198e6	clocksource_unregister
+EXPORT_SYMBOL vmlinux 0x690402c2	snd_ctl_make_virtual_master
+EXPORT_SYMBOL vmlinux 0x6907b6bb	tty_shutdown
+EXPORT_SYMBOL vmlinux 0x693bd3bd	copy_strings_kernel
+EXPORT_SYMBOL vmlinux 0x6947b890	i2c_smbus_read_byte
+EXPORT_SYMBOL vmlinux 0x6971447a	rtc_month_days
+EXPORT_SYMBOL vmlinux 0x6980fe91	param_get_int
+EXPORT_SYMBOL vmlinux 0x69927dff	try_acquire_console_sem
+EXPORT_SYMBOL vmlinux 0x69af2327	idr_init
+EXPORT_SYMBOL vmlinux 0x69b258ed	simple_unlink
+EXPORT_SYMBOL vmlinux 0x69c8c1d5	security_req_classify_flow
+EXPORT_SYMBOL vmlinux 0x69cfbb1f	force_sig
+EXPORT_SYMBOL vmlinux 0x69d38ed9	__scsi_print_sense
+EXPORT_SYMBOL vmlinux 0x69e27c7a	bitmap_copy_le
+EXPORT_SYMBOL vmlinux 0x69f29dd4	security_inode_getsecctx
+EXPORT_SYMBOL vmlinux 0x6a037cf1	mempool_kfree
+EXPORT_SYMBOL vmlinux 0x6a03f5d0	may_umount
+EXPORT_SYMBOL vmlinux 0x6a47571d	__set_personality
+EXPORT_SYMBOL vmlinux 0x6a4ca15b	inet_release
+EXPORT_SYMBOL vmlinux 0x6a730b5f	ip_ct_attach
+EXPORT_SYMBOL vmlinux 0x6a76f3ac	blk_iopoll_enable
+EXPORT_SYMBOL vmlinux 0x6a9d8ddf	dm_kcopyd_client_create
+EXPORT_SYMBOL vmlinux 0x6ac45c28	__up_write
+EXPORT_SYMBOL vmlinux 0x6ac5241d	blk_queue_ordered
+EXPORT_SYMBOL vmlinux 0x6ac79ef2	vmalloc_to_page
+EXPORT_SYMBOL vmlinux 0x6ad065f4	param_set_charp
+EXPORT_SYMBOL vmlinux 0x6b1b67d3	__bdevname
+EXPORT_SYMBOL vmlinux 0x6b28395b	sysctl_jiffies
+EXPORT_SYMBOL vmlinux 0x6b2dc060	dump_stack
+EXPORT_SYMBOL vmlinux 0x6b72ae3e	__netdev_alloc_page
+EXPORT_SYMBOL vmlinux 0x6b7efa1e	pci_bus_type
+EXPORT_SYMBOL vmlinux 0x6b9e1a03	inet_sock_destruct
+EXPORT_SYMBOL vmlinux 0x6bb74d45	find_or_create_page
+EXPORT_SYMBOL vmlinux 0x6bc3fbc0	__unregister_chrdev
+EXPORT_SYMBOL vmlinux 0x6bdcfd99	qdisc_class_hash_remove
+EXPORT_SYMBOL vmlinux 0x6be5ee14	mdio_bus_type
+EXPORT_SYMBOL vmlinux 0x6c1ce5ce	strcspn
+EXPORT_SYMBOL vmlinux 0x6c1fd9c8	iget5_locked
+EXPORT_SYMBOL vmlinux 0x6c21f777	mvSysEthInit
+EXPORT_SYMBOL vmlinux 0x6c28d7a1	blk_insert_request
+EXPORT_SYMBOL vmlinux 0x6c2e1707	keyring_clear
+EXPORT_SYMBOL vmlinux 0x6c36a5c1	__mutex_init
+EXPORT_SYMBOL vmlinux 0x6c48fd6d	get_write_access
+EXPORT_SYMBOL vmlinux 0x6c4d56ea	snd_ctl_add
+EXPORT_SYMBOL vmlinux 0x6c61ce70	num_registered_fb
+EXPORT_SYMBOL vmlinux 0x6c6222e6	__destroy_inode
+EXPORT_SYMBOL vmlinux 0x6c67b1e6	bmm_free_kernel
+EXPORT_SYMBOL vmlinux 0x6c702af7	sysctl_udp_rmem_min
+EXPORT_SYMBOL vmlinux 0x6c930c20	tcf_hash_lookup
+EXPORT_SYMBOL vmlinux 0x6cb90136	generic_removexattr
+EXPORT_SYMBOL vmlinux 0x6cdc5c6b	nla_strlcpy
+EXPORT_SYMBOL vmlinux 0x6ce45adb	register_sound_mixer
+EXPORT_SYMBOL vmlinux 0x6cef247f	__strnlen_user
+EXPORT_SYMBOL vmlinux 0x6d0c0ffd	sk_wait_data
+EXPORT_SYMBOL vmlinux 0x6d27ef64	__bitmap_empty
+EXPORT_SYMBOL vmlinux 0x6d288375	radix_tree_next_hole
+EXPORT_SYMBOL vmlinux 0x6d294e43	clock_t_to_jiffies
+EXPORT_SYMBOL vmlinux 0x6d340f64	tty_termios_input_baud_rate
+EXPORT_SYMBOL vmlinux 0x6d662533	_find_first_bit_le
+EXPORT_SYMBOL vmlinux 0x6d6cbadc	rb_last
+EXPORT_SYMBOL vmlinux 0x6d829e83	mb_cache_shrink
+EXPORT_SYMBOL vmlinux 0x6dc4d3e9	scsi_device_lookup
+EXPORT_SYMBOL vmlinux 0x6de5c93a	snd_pcm_set_sync
+EXPORT_SYMBOL vmlinux 0x6def2db2	half_md4_transform
+EXPORT_SYMBOL vmlinux 0x6e1178f9	ipv6_getsockopt
+EXPORT_SYMBOL vmlinux 0x6e14ce6c	kernel_getsockopt
+EXPORT_SYMBOL vmlinux 0x6e3efe5d	skb_gro_reset_offset
+EXPORT_SYMBOL vmlinux 0x6e5b30de	__pagevec_release
+EXPORT_SYMBOL vmlinux 0x6e720ff2	rtnl_unlock
+EXPORT_SYMBOL vmlinux 0x6e9dd606	__symbol_put
+EXPORT_SYMBOL vmlinux 0x6eb8ffbc	get_disk
+EXPORT_SYMBOL vmlinux 0x6ebb1226	input_release_device
+EXPORT_SYMBOL vmlinux 0x6ef8fcd8	snd_pcm_format_linear
+EXPORT_SYMBOL vmlinux 0x6efb29da	__blk_end_request_all
+EXPORT_SYMBOL vmlinux 0x6f1a7eec	do_sync_read
+EXPORT_SYMBOL vmlinux 0x6f1d8269	dev_get_drvdata
+EXPORT_SYMBOL vmlinux 0x6f5d8739	km_state_notify
+EXPORT_SYMBOL vmlinux 0x6f793d32	tcp_md5_hash_key
+EXPORT_SYMBOL vmlinux 0x6fcb87a1	touch_softlockup_watchdog
+EXPORT_SYMBOL vmlinux 0x6fda3d7f	blkdev_issue_discard
+EXPORT_SYMBOL vmlinux 0x6fe51e46	mvI2SRecordCntrlSet
+EXPORT_SYMBOL vmlinux 0x6fff393f	time_to_tm
+EXPORT_SYMBOL vmlinux 0x7007bf92	input_unregister_device
+EXPORT_SYMBOL vmlinux 0x700c781f	snd_ac97_set_rate
+EXPORT_SYMBOL vmlinux 0x70159ea1	get_sb_bdev
+EXPORT_SYMBOL vmlinux 0x701d0ebd	snprintf
+EXPORT_SYMBOL vmlinux 0x704a7768	mdiobus_read
+EXPORT_SYMBOL vmlinux 0x704e4abb	random_input_wait
+EXPORT_SYMBOL vmlinux 0x7051e5b7	mvSHA1
+EXPORT_SYMBOL vmlinux 0x70523a7a	__cond_resched_softirq
+EXPORT_SYMBOL vmlinux 0x7062fe69	vfs_quota_off
+EXPORT_SYMBOL vmlinux 0x706701ea	snd_ac97_tune_hardware
+EXPORT_SYMBOL vmlinux 0x706fa49f	skb_queue_tail
+EXPORT_SYMBOL vmlinux 0x7085fddb	vlan_dev_real_dev
+EXPORT_SYMBOL vmlinux 0x708c31ce	icmp_send
+EXPORT_SYMBOL vmlinux 0x70974dc3	posix_lock_file_wait
+EXPORT_SYMBOL vmlinux 0x70ab8451	pcix_get_mmrbc
+EXPORT_SYMBOL vmlinux 0x70bc17d7	inode_wait
+EXPORT_SYMBOL vmlinux 0x70c3cd6a	__secpath_destroy
+EXPORT_SYMBOL vmlinux 0x70ce8805	f_setown
+EXPORT_SYMBOL vmlinux 0x70d9aaad	napi_frags_skb
+EXPORT_SYMBOL vmlinux 0x70dc2a24	pfifo_qdisc_ops
+EXPORT_SYMBOL vmlinux 0x70ead10e	fb_pan_display
+EXPORT_SYMBOL vmlinux 0x7129e5f8	hex_asc
+EXPORT_SYMBOL vmlinux 0x71650894	tty_port_close_start
+EXPORT_SYMBOL vmlinux 0x7171121c	overflowgid
+EXPORT_SYMBOL vmlinux 0x717a7da4	blk_queue_update_dma_pad
+EXPORT_SYMBOL vmlinux 0x71a50dbc	register_blkdev
+EXPORT_SYMBOL vmlinux 0x71c5a9f9	xfrm_state_flush
+EXPORT_SYMBOL vmlinux 0x71c90087	memcmp
+EXPORT_SYMBOL vmlinux 0x71e2c598	key_type_keyring
+EXPORT_SYMBOL vmlinux 0x72055d21	put_mnt_ns
+EXPORT_SYMBOL vmlinux 0x720a4c20	dev_change_flags
+EXPORT_SYMBOL vmlinux 0x722e984c	i2c_smbus_write_block_data
+EXPORT_SYMBOL vmlinux 0x72366737	vfs_unlink
+EXPORT_SYMBOL vmlinux 0x7248e681	journal_get_undo_access
+EXPORT_SYMBOL vmlinux 0x724c606c	generic_permission
+EXPORT_SYMBOL vmlinux 0x725ba826	crypto_freesession
+EXPORT_SYMBOL vmlinux 0x7279101a	jbd2_journal_errno
+EXPORT_SYMBOL vmlinux 0x729ea6d8	sk_stream_wait_memory
+EXPORT_SYMBOL vmlinux 0x72bb7bab	cdev_del
+EXPORT_SYMBOL vmlinux 0x72c3be87	param_set_byte
+EXPORT_SYMBOL vmlinux 0x72d42893	scsi_dma_map
+EXPORT_SYMBOL vmlinux 0x72d5af61	try_wait_for_completion
+EXPORT_SYMBOL vmlinux 0x72dd6018	eth_change_mtu
+EXPORT_SYMBOL vmlinux 0x72e230ad	snd_pcm_new_stream
+EXPORT_SYMBOL vmlinux 0x72ea7b2d	scsi_device_type
+EXPORT_SYMBOL vmlinux 0x72f23d58	default_llseek
+EXPORT_SYMBOL vmlinux 0x72f664e6	pci_find_capability
+EXPORT_SYMBOL vmlinux 0x730bf292	ipv4_specific
+EXPORT_SYMBOL vmlinux 0x7311909c	sk_common_release
+EXPORT_SYMBOL vmlinux 0x7348a3d9	mpage_readpages
+EXPORT_SYMBOL vmlinux 0x7362dd1e	vfs_fstat
+EXPORT_SYMBOL vmlinux 0x736bccd1	xfrm_state_lookup
+EXPORT_SYMBOL vmlinux 0x73802237	qdisc_tree_decrease_qlen
+EXPORT_SYMBOL vmlinux 0x7388057a	commit_creds
+EXPORT_SYMBOL vmlinux 0x73bd2c14	vfs_set_dqinfo
+EXPORT_SYMBOL vmlinux 0x73c3542d	fb_show_logo
+EXPORT_SYMBOL vmlinux 0x73caba67	__dst_free
+EXPORT_SYMBOL vmlinux 0x73e20c1c	strlcpy
+EXPORT_SYMBOL vmlinux 0x73e6ddc2	init_net
+EXPORT_SYMBOL vmlinux 0x74013403	snd_ctl_new1
+EXPORT_SYMBOL vmlinux 0x7429d9c2	snd_timer_pause
+EXPORT_SYMBOL vmlinux 0x7445e7e9	usb_gadget_register_driver
+EXPORT_SYMBOL vmlinux 0x744c0c68	param_get_byte
+EXPORT_SYMBOL vmlinux 0x745a473e	vmap
+EXPORT_SYMBOL vmlinux 0x7485e15e	unregister_chrdev_region
+EXPORT_SYMBOL vmlinux 0x7493fecf	blkdev_get
+EXPORT_SYMBOL vmlinux 0x74954462	timecounter_read
+EXPORT_SYMBOL vmlinux 0x74d62462	__bio_clone
+EXPORT_SYMBOL vmlinux 0x7514dacb	snd_jack_new
+EXPORT_SYMBOL vmlinux 0x75271716	save_processor_state
+EXPORT_SYMBOL vmlinux 0x75291982	elv_rb_add
+EXPORT_SYMBOL vmlinux 0x75901dbd	pcibios_fixup_bus
+EXPORT_SYMBOL vmlinux 0x759f2a17	inet_bind
+EXPORT_SYMBOL vmlinux 0x75c73fc1	lcd_device_register
+EXPORT_SYMBOL vmlinux 0x75da2297	ip6_frag_match
+EXPORT_SYMBOL vmlinux 0x75faabe3	blk_plug_device_unlocked
+EXPORT_SYMBOL vmlinux 0x75fee7fd	__raw_writesb
+EXPORT_SYMBOL vmlinux 0x75ff3713	qdisc_class_hash_grow
+EXPORT_SYMBOL vmlinux 0x760a0f4f	yield
+EXPORT_SYMBOL vmlinux 0x760b437a	unregister_inetaddr_notifier
+EXPORT_SYMBOL vmlinux 0x765f75fb	pgprot_user
+EXPORT_SYMBOL vmlinux 0x7661c421	mmc_host_disable
+EXPORT_SYMBOL vmlinux 0x76700b1c	gnet_stats_copy_rate_est
+EXPORT_SYMBOL vmlinux 0x7670745c	splice_from_pipe_next
+EXPORT_SYMBOL vmlinux 0x7685e27b	snd_timer_start
+EXPORT_SYMBOL vmlinux 0x76bf656d	__bitmap_shift_left
+EXPORT_SYMBOL vmlinux 0x76c4363b	filp_close
+EXPORT_SYMBOL vmlinux 0x76ca8927	sock_no_getname
+EXPORT_SYMBOL vmlinux 0x76cf47f6	__aeabi_llsl
+EXPORT_SYMBOL vmlinux 0x76d3cd60	laptop_mode
+EXPORT_SYMBOL vmlinux 0x76f0e55c	save_mount_options
+EXPORT_SYMBOL vmlinux 0x76f24ba4	dev_set_mac_address
+EXPORT_SYMBOL vmlinux 0x773a9c94	blk_iopoll_enabled
+EXPORT_SYMBOL vmlinux 0x775614c1	__skb_checksum_complete
+EXPORT_SYMBOL vmlinux 0x777ef384	__mark_inode_dirty
+EXPORT_SYMBOL vmlinux 0x7798d905	pci_remove_behind_bridge
+EXPORT_SYMBOL vmlinux 0x77ae2b23	fb_set_var
+EXPORT_SYMBOL vmlinux 0x77b188fa	sock_no_shutdown
+EXPORT_SYMBOL vmlinux 0x77b3e97f	mvSPDIFPlaybackCtrlSet
+EXPORT_SYMBOL vmlinux 0x77b98bda	dev_queue_xmit
+EXPORT_SYMBOL vmlinux 0x77c888ff	make_EII_client
+EXPORT_SYMBOL vmlinux 0x77d3dc32	pci_bus_find_capability
+EXPORT_SYMBOL vmlinux 0x77ecac9f	zlib_inflateEnd
+EXPORT_SYMBOL vmlinux 0x77fa5d1f	ns_to_timespec
+EXPORT_SYMBOL vmlinux 0x780de958	tcp_v4_connect
+EXPORT_SYMBOL vmlinux 0x780ea445	jbd2_journal_stop
+EXPORT_SYMBOL vmlinux 0x7824631b	pci_save_state
+EXPORT_SYMBOL vmlinux 0x78285356	dev_alloc_name
+EXPORT_SYMBOL vmlinux 0x786d2d8e	create_mnt_ns
+EXPORT_SYMBOL vmlinux 0x788fe103	iomem_resource
+EXPORT_SYMBOL vmlinux 0x78921db6	journal_abort
+EXPORT_SYMBOL vmlinux 0x78a72bec	sb_min_blocksize
+EXPORT_SYMBOL vmlinux 0x78ab6825	blk_queue_max_phys_segments
+EXPORT_SYMBOL vmlinux 0x78ad17f1	inet6_register_protosw
+EXPORT_SYMBOL vmlinux 0x78b70fa6	nf_log_register
+EXPORT_SYMBOL vmlinux 0x78d3d842	snd_ac97_write_cache
+EXPORT_SYMBOL vmlinux 0x78d457b2	is_bad_inode
+EXPORT_SYMBOL vmlinux 0x78df6bd7	no_pci_devices
+EXPORT_SYMBOL vmlinux 0x790a8bc1	dev_addr_add
+EXPORT_SYMBOL vmlinux 0x79274a6e	security_path_rename
+EXPORT_SYMBOL vmlinux 0x794487ee	disable_hlt
+EXPORT_SYMBOL vmlinux 0x79600d4a	wait_for_completion_killable
+EXPORT_SYMBOL vmlinux 0x796dddd0	xfrm_user_policy
+EXPORT_SYMBOL vmlinux 0x796fc5ce	scsi_get_sense_info_fld
+EXPORT_SYMBOL vmlinux 0x797e3df5	sock_no_socketpair
+EXPORT_SYMBOL vmlinux 0x79aa04a2	get_random_bytes
+EXPORT_SYMBOL vmlinux 0x79ad224b	tasklet_kill
+EXPORT_SYMBOL vmlinux 0x79b2633f	scsi_device_get
+EXPORT_SYMBOL vmlinux 0x7a2a837d	strict_strtol
+EXPORT_SYMBOL vmlinux 0x7a4497db	kzfree
+EXPORT_SYMBOL vmlinux 0x7a6e71ad	bd_set_size
+EXPORT_SYMBOL vmlinux 0x7a73e3c7	pci_bus_assign_resources
+EXPORT_SYMBOL vmlinux 0x7a91726b	clkdev_alloc
+EXPORT_SYMBOL vmlinux 0x7ac8fd7b	snd_card_free_when_closed
+EXPORT_SYMBOL vmlinux 0x7acbc02b	dma_async_memcpy_pg_to_pg
+EXPORT_SYMBOL vmlinux 0x7aee4975	snd_pci_quirk_lookup
+EXPORT_SYMBOL vmlinux 0x7afc9d8a	unregister_sound_mixer
+EXPORT_SYMBOL vmlinux 0x7b293231	mb_cache_entry_get
+EXPORT_SYMBOL vmlinux 0x7b367440	snd_ac97_update_bits
+EXPORT_SYMBOL vmlinux 0x7b68ef35	scsi_cmd_ioctl
+EXPORT_SYMBOL vmlinux 0x7b9e01f9	blk_get_backing_dev_info
+EXPORT_SYMBOL vmlinux 0x7bc0f61e	snd_device_new
+EXPORT_SYMBOL vmlinux 0x7bc52f05	pci_request_regions_exclusive
+EXPORT_SYMBOL vmlinux 0x7bc771e2	tty_port_hangup
+EXPORT_SYMBOL vmlinux 0x7beceb43	scsi_report_bus_reset
+EXPORT_SYMBOL vmlinux 0x7bf5040b	snd_ac97_resume
+EXPORT_SYMBOL vmlinux 0x7bf9a856	vfs_read
+EXPORT_SYMBOL vmlinux 0x7c0651a7	crypto_copyback
+EXPORT_SYMBOL vmlinux 0x7c19110d	log_start_commit
+EXPORT_SYMBOL vmlinux 0x7c230e0e	mvEthPhyRegWrite
+EXPORT_SYMBOL vmlinux 0x7c2e21b5	iw_handler_set_thrspy
+EXPORT_SYMBOL vmlinux 0x7c42d6c7	__free_pages
+EXPORT_SYMBOL vmlinux 0x7c46233a	cpufreq_quick_get
+EXPORT_SYMBOL vmlinux 0x7c53719b	ethtool_op_set_ufo
+EXPORT_SYMBOL vmlinux 0x7c5fdfde	journal_force_commit
+EXPORT_SYMBOL vmlinux 0x7c60d66e	getname
+EXPORT_SYMBOL vmlinux 0x7c735361	dst_release
+EXPORT_SYMBOL vmlinux 0x7c904ded	unregister_module_notifier
+EXPORT_SYMBOL vmlinux 0x7cc035a7	__ucmpdi2
+EXPORT_SYMBOL vmlinux 0x7cc5138a	qdisc_list_del
+EXPORT_SYMBOL vmlinux 0x7ccbbdd2	scsi_print_sense
+EXPORT_SYMBOL vmlinux 0x7cd5e4e5	sock_no_getsockopt
+EXPORT_SYMBOL vmlinux 0x7cdc166c	file_remove_suid
+EXPORT_SYMBOL vmlinux 0x7ce16b3f	__pci_register_driver
+EXPORT_SYMBOL vmlinux 0x7d11c268	jiffies
+EXPORT_SYMBOL vmlinux 0x7d454b49	rtnetlink_put_metrics
+EXPORT_SYMBOL vmlinux 0x7d5c28f2	phy_start_aneg
+EXPORT_SYMBOL vmlinux 0x7d7bd50f	netif_rx_ni
+EXPORT_SYMBOL vmlinux 0x7da6d0f1	snd_timer_continue
+EXPORT_SYMBOL vmlinux 0x7dceceac	capable
+EXPORT_SYMBOL vmlinux 0x7e04f2f4	dqput
+EXPORT_SYMBOL vmlinux 0x7e1ae9bc	key_alloc
+EXPORT_SYMBOL vmlinux 0x7e1e615e	pxa_request_dma
+EXPORT_SYMBOL vmlinux 0x7e924004	sock_no_listen
+EXPORT_SYMBOL vmlinux 0x7e9ebb05	kernel_thread
+EXPORT_SYMBOL vmlinux 0x7ea76fe3	bh_submit_read
+EXPORT_SYMBOL vmlinux 0x7ebf5b8e	key_instantiate_and_link
+EXPORT_SYMBOL vmlinux 0x7ee6b79e	clk_get
+EXPORT_SYMBOL vmlinux 0x7ee7ba7c	dev_get_flags
+EXPORT_SYMBOL vmlinux 0x7ef25923	remap_vmalloc_range
+EXPORT_SYMBOL vmlinux 0x7f24de73	jiffies_to_usecs
+EXPORT_SYMBOL vmlinux 0x7f33d99f	rt6_lookup
+EXPORT_SYMBOL vmlinux 0x7f47047b	skb_copy_bits
+EXPORT_SYMBOL vmlinux 0x7f63b31e	_memcpy_toio
+EXPORT_SYMBOL vmlinux 0x7f8c9163	simple_dir_operations
+EXPORT_SYMBOL vmlinux 0x7fa4a9c1	get_sb_ns
+EXPORT_SYMBOL vmlinux 0x7faa46aa	blk_execute_rq
+EXPORT_SYMBOL vmlinux 0x7fd7170e	netdev_bonding_change
+EXPORT_SYMBOL vmlinux 0x7ff39211	mii_check_gmii_support
+EXPORT_SYMBOL vmlinux 0x7ff438c4	genlmsg_multicast_allns
+EXPORT_SYMBOL vmlinux 0x800e4ffa	__muldi3
+EXPORT_SYMBOL vmlinux 0x8020a526	pci_wake_from_d3
+EXPORT_SYMBOL vmlinux 0x8025d329	xfrm_policy_insert
+EXPORT_SYMBOL vmlinux 0x80450297	generic_file_llseek
+EXPORT_SYMBOL vmlinux 0x80527e27	snd_pcm_lib_preallocate_pages
+EXPORT_SYMBOL vmlinux 0x8063f83d	radix_tree_gang_lookup
+EXPORT_SYMBOL vmlinux 0x807aeb47	nf_log_unregister
+EXPORT_SYMBOL vmlinux 0x8085c7b1	prepare_to_wait
+EXPORT_SYMBOL vmlinux 0x808c2baa	blk_rq_map_user_iov
+EXPORT_SYMBOL vmlinux 0x80bd4407	sb_set_blocksize
+EXPORT_SYMBOL vmlinux 0x80e98aed	i2c_smbus_write_i2c_block_data
+EXPORT_SYMBOL vmlinux 0x810b1ad1	dma_sync_sg_for_cpu
+EXPORT_SYMBOL vmlinux 0x810bb9dc	sk_stream_wait_close
+EXPORT_SYMBOL vmlinux 0x8114680c	xfrm_policy_bysel_ctx
+EXPORT_SYMBOL vmlinux 0x815b5dd4	match_octal
+EXPORT_SYMBOL vmlinux 0x81799cee	vscnprintf
+EXPORT_SYMBOL vmlinux 0x8184c3b6	vfs_get_dqinfo
+EXPORT_SYMBOL vmlinux 0x81b2b8ec	noop_qdisc
+EXPORT_SYMBOL vmlinux 0x81b6cac5	sock_no_recvmsg
+EXPORT_SYMBOL vmlinux 0x81d44244	pci_map_rom
+EXPORT_SYMBOL vmlinux 0x81f183a3	dma_find_channel
+EXPORT_SYMBOL vmlinux 0x820d225f	print_mac
+EXPORT_SYMBOL vmlinux 0x821fb5ed	vga_set_legacy_decoding
+EXPORT_SYMBOL vmlinux 0x82260795	mvCesaSessionClose
+EXPORT_SYMBOL vmlinux 0x8251bcc3	bitmap_release_region
+EXPORT_SYMBOL vmlinux 0x8262f64b	tcp_sockets_allocated
+EXPORT_SYMBOL vmlinux 0x8266784c	skb_queue_purge
+EXPORT_SYMBOL vmlinux 0x82692209	kref_set
+EXPORT_SYMBOL vmlinux 0x8269a5a9	dma_free_coherent
+EXPORT_SYMBOL vmlinux 0x827ceeac	proto_register
+EXPORT_SYMBOL vmlinux 0x82acd201	bdi_destroy
+EXPORT_SYMBOL vmlinux 0x82acfb70	blk_iopoll_sched
+EXPORT_SYMBOL vmlinux 0x82d3e26f	balance_dirty_pages_ratelimited_nr
+EXPORT_SYMBOL vmlinux 0x82d6b637	xfrm6_rcv
+EXPORT_SYMBOL vmlinux 0x82e5a238	vm_get_page_prot
+EXPORT_SYMBOL vmlinux 0x83038534	set_create_files_as
+EXPORT_SYMBOL vmlinux 0x8308a393	__scm_send
+EXPORT_SYMBOL vmlinux 0x8320bea8	__umodsi3
+EXPORT_SYMBOL vmlinux 0x8334aae9	__wait_on_buffer
+EXPORT_SYMBOL vmlinux 0x833fa342	mmc_host_enable
+EXPORT_SYMBOL vmlinux 0x834ef93d	default_unplug_io_fn
+EXPORT_SYMBOL vmlinux 0x8358f29c	pci_scan_single_device
+EXPORT_SYMBOL vmlinux 0x836bdb72	nand_flash_ids
+EXPORT_SYMBOL vmlinux 0x837c9d08	napi_gro_receive
+EXPORT_SYMBOL vmlinux 0x83a476ce	bitmap_scnlistprintf
+EXPORT_SYMBOL vmlinux 0x83b32069	ilookup5_nowait
+EXPORT_SYMBOL vmlinux 0x83bdee80	scsi_device_put
+EXPORT_SYMBOL vmlinux 0x83c7338a	blk_requeue_request
+EXPORT_SYMBOL vmlinux 0x83c7ec2b	inet_csk_init_xmit_timers
+EXPORT_SYMBOL vmlinux 0x83cae260	xfrm_state_delete_tunnel
+EXPORT_SYMBOL vmlinux 0x83e8bc2f	vfs_symlink
+EXPORT_SYMBOL vmlinux 0x83e9d50e	inet6_release
+EXPORT_SYMBOL vmlinux 0x83ea6778	tcp_create_openreq_child
+EXPORT_SYMBOL vmlinux 0x83f0feff	sock_kfree_s
+EXPORT_SYMBOL vmlinux 0x847ec66f	register_sysrq_key
+EXPORT_SYMBOL vmlinux 0x848e1399	pci_request_regions
+EXPORT_SYMBOL vmlinux 0x84a85550	gnet_stats_start_copy_compat
+EXPORT_SYMBOL vmlinux 0x84b183ae	strncmp
+EXPORT_SYMBOL vmlinux 0x84b51186	mark_page_accessed
+EXPORT_SYMBOL vmlinux 0x84b8581b	jbd2_journal_start
+EXPORT_SYMBOL vmlinux 0x84c098de	snd_info_free_entry
+EXPORT_SYMBOL vmlinux 0x84c81c72	eth_header_parse
+EXPORT_SYMBOL vmlinux 0x84e45f38	__break_lease
+EXPORT_SYMBOL vmlinux 0x851699b5	__sk_dst_check
+EXPORT_SYMBOL vmlinux 0x851e86d1	skb_gso_segment
+EXPORT_SYMBOL vmlinux 0x8531b5c0	skb_kill_datagram
+EXPORT_SYMBOL vmlinux 0x854a08c8	blk_queue_physical_block_size
+EXPORT_SYMBOL vmlinux 0x8565ca4a	pci_release_selected_regions
+EXPORT_SYMBOL vmlinux 0x85670f1d	rtnl_is_locked
+EXPORT_SYMBOL vmlinux 0x85847e42	snd_register_oss_device
+EXPORT_SYMBOL vmlinux 0x85882a1d	crypto_copydata
+EXPORT_SYMBOL vmlinux 0x859c6dc7	request_threaded_irq
+EXPORT_SYMBOL vmlinux 0x85ac7f10	posix_acl_from_xattr
+EXPORT_SYMBOL vmlinux 0x85d6d305	inet_dgram_ops
+EXPORT_SYMBOL vmlinux 0x85df9b6c	strsep
+EXPORT_SYMBOL vmlinux 0x85e37347	snd_ctl_find_numid
+EXPORT_SYMBOL vmlinux 0x85e7deb2	iov_iter_fault_in_readable
+EXPORT_SYMBOL vmlinux 0x85f6a2c2	journal_flush
+EXPORT_SYMBOL vmlinux 0x85f7b2fd	crypto_find_driver
+EXPORT_SYMBOL vmlinux 0x8632fcdd	ip6_frag_init
+EXPORT_SYMBOL vmlinux 0x864e96ad	unlock_super
+EXPORT_SYMBOL vmlinux 0x8664f62e	cpufreq_update_policy
+EXPORT_SYMBOL vmlinux 0x866ad5d3	contig_page_data
+EXPORT_SYMBOL vmlinux 0x868235f1	snd_dma_alloc_pages_fallback
+EXPORT_SYMBOL vmlinux 0x868a7125	scm_detach_fds
+EXPORT_SYMBOL vmlinux 0x868acba5	get_options
+EXPORT_SYMBOL vmlinux 0x868e404f	end_buffer_async_write
+EXPORT_SYMBOL vmlinux 0x86a18b1e	vfs_dq_drop
+EXPORT_SYMBOL vmlinux 0x86de2c13	pci_bus_size_bridges
+EXPORT_SYMBOL vmlinux 0x86fb9b05	bitmap_parse_user
+EXPORT_SYMBOL vmlinux 0x87198f96	tcf_hash_new_index
+EXPORT_SYMBOL vmlinux 0x871c0a7e	fiemap_check_flags
+EXPORT_SYMBOL vmlinux 0x873fc614	unregister_nls
+EXPORT_SYMBOL vmlinux 0x878ab3ce	sysctl_tcp_adv_win_scale
+EXPORT_SYMBOL vmlinux 0x87d3a94c	thaw_process
+EXPORT_SYMBOL vmlinux 0x87d88362	mb_cache_entry_find_next
+EXPORT_SYMBOL vmlinux 0x87e4649f	nobh_truncate_page
+EXPORT_SYMBOL vmlinux 0x87e9fdec	mvCesaDebugMbuf
+EXPORT_SYMBOL vmlinux 0x87f438a2	sysctl_intvec
+EXPORT_SYMBOL vmlinux 0x880c5297	blk_end_request
+EXPORT_SYMBOL vmlinux 0x881039d0	zlib_inflate
+EXPORT_SYMBOL vmlinux 0x88128192	__netdev_alloc_skb
+EXPORT_SYMBOL vmlinux 0x884270c1	d_delete
+EXPORT_SYMBOL vmlinux 0x8892fbe4	__bread
+EXPORT_SYMBOL vmlinux 0x8893d4ac	generic_writepages
+EXPORT_SYMBOL vmlinux 0x88a0b530	set_security_override_from_ctx
+EXPORT_SYMBOL vmlinux 0x88d4779a	snd_ac97_update
+EXPORT_SYMBOL vmlinux 0x891e32b8	wait_for_completion_interruptible
+EXPORT_SYMBOL vmlinux 0x89298c36	seq_read
+EXPORT_SYMBOL vmlinux 0x892cadb0	generic_file_readonly_mmap
+EXPORT_SYMBOL vmlinux 0x8931cb8a	pci_pme_capable
+EXPORT_SYMBOL vmlinux 0x895816b0	devm_ioport_unmap
+EXPORT_SYMBOL vmlinux 0x897473df	mktime
+EXPORT_SYMBOL vmlinux 0x899cce16	dm_table_unplug_all
+EXPORT_SYMBOL vmlinux 0x89a172f4	phy_attach_direct
+EXPORT_SYMBOL vmlinux 0x89d5538d	fb_pad_aligned_buffer
+EXPORT_SYMBOL vmlinux 0x89d66811	build_ehash_secret
+EXPORT_SYMBOL vmlinux 0x89e02e4e	pxa2xx_pcm_pointer
+EXPORT_SYMBOL vmlinux 0x89e353a5	dquot_commit
+EXPORT_SYMBOL vmlinux 0x89f2b391	tcp_sync_mss
+EXPORT_SYMBOL vmlinux 0x8a09160b	wake_up_process
+EXPORT_SYMBOL vmlinux 0x8a0dd861	pcie_set_readrq
+EXPORT_SYMBOL vmlinux 0x8a1203a9	kref_get
+EXPORT_SYMBOL vmlinux 0x8a13dc07	journal_get_create_access
+EXPORT_SYMBOL vmlinux 0x8a373fd7	twl4030_i2c_write
+EXPORT_SYMBOL vmlinux 0x8a4fa83b	__aeabi_llsr
+EXPORT_SYMBOL vmlinux 0x8a55ae06	km_report
+EXPORT_SYMBOL vmlinux 0x8a7d1c31	high_memory
+EXPORT_SYMBOL vmlinux 0x8a99a016	mempool_free_slab
+EXPORT_SYMBOL vmlinux 0x8ac0e26d	sock_wmalloc
+EXPORT_SYMBOL vmlinux 0x8ae77528	proc_dointvec_minmax
+EXPORT_SYMBOL vmlinux 0x8b1600be	nf_ip_checksum
+EXPORT_SYMBOL vmlinux 0x8b2269f9	cuio_copyback
+EXPORT_SYMBOL vmlinux 0x8b339bce	inet_frags_init
+EXPORT_SYMBOL vmlinux 0x8b35d16c	sock_no_mmap
+EXPORT_SYMBOL vmlinux 0x8b419ee1	netif_napi_del
+EXPORT_SYMBOL vmlinux 0x8b49863f	inet_frag_kill
+EXPORT_SYMBOL vmlinux 0x8b499d18	snd_card_create
+EXPORT_SYMBOL vmlinux 0x8b618d08	overflowuid
+EXPORT_SYMBOL vmlinux 0x8b9a4149	ida_destroy
+EXPORT_SYMBOL vmlinux 0x8bd5b603	param_get_long
+EXPORT_SYMBOL vmlinux 0x8bfb492e	kernel_read
+EXPORT_SYMBOL vmlinux 0x8c1d0733	blk_rq_unmap_user
+EXPORT_SYMBOL vmlinux 0x8c212134	framebuffer_alloc
+EXPORT_SYMBOL vmlinux 0x8c24dfe9	skb_insert
+EXPORT_SYMBOL vmlinux 0x8c37cffb	aio_put_req
+EXPORT_SYMBOL vmlinux 0x8c393985	icmpv6_send
+EXPORT_SYMBOL vmlinux 0x8c3a4835	pci_unmap_rom
+EXPORT_SYMBOL vmlinux 0x8c562e6c	blk_start_queue
+EXPORT_SYMBOL vmlinux 0x8c6c5385	nf_register_hook
+EXPORT_SYMBOL vmlinux 0x8c7bc348	ida_remove
+EXPORT_SYMBOL vmlinux 0x8c88b446	unregister_qdisc
+EXPORT_SYMBOL vmlinux 0x8c8a788c	invalidate_bdev
+EXPORT_SYMBOL vmlinux 0x8c9b5241	jbd2_journal_start_commit
+EXPORT_SYMBOL vmlinux 0x8cd85e52	proto_unregister
+EXPORT_SYMBOL vmlinux 0x8cfacbfa	snd_ac97_bus
+EXPORT_SYMBOL vmlinux 0x8cffd89a	netpoll_poll
+EXPORT_SYMBOL vmlinux 0x8d2519b9	clk_get_rate
+EXPORT_SYMBOL vmlinux 0x8d3894f2	_ctype
+EXPORT_SYMBOL vmlinux 0x8d446462	iget_failed
+EXPORT_SYMBOL vmlinux 0x8d4ec431	security_sb_clone_mnt_opts
+EXPORT_SYMBOL vmlinux 0x8d54f047	snd_timer_close
+EXPORT_SYMBOL vmlinux 0x8d551bef	sysctl_tcp_rmem
+EXPORT_SYMBOL vmlinux 0x8d5642fc	wait_for_completion_interruptible_timeout
+EXPORT_SYMBOL vmlinux 0x8d6f81b4	__div64_32
+EXPORT_SYMBOL vmlinux 0x8d8cf1dc	tcf_hash_search
+EXPORT_SYMBOL vmlinux 0x8d9debd4	sock_common_setsockopt
+EXPORT_SYMBOL vmlinux 0x8da48f34	__mmc_claim_host
+EXPORT_SYMBOL vmlinux 0x8dbe4f7b	jbd2_log_wait_commit
+EXPORT_SYMBOL vmlinux 0x8dc32eb3	try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0x8dc6e564	restore_processor_state
+EXPORT_SYMBOL vmlinux 0x8dcb5c27	idr_remove
+EXPORT_SYMBOL vmlinux 0x8dde1960	setup_new_exec
+EXPORT_SYMBOL vmlinux 0x8df3789f	snd_oss_info_register
+EXPORT_SYMBOL vmlinux 0x8e0b7743	ipv6_ext_hdr
+EXPORT_SYMBOL vmlinux 0x8e3c9cc3	vprintk
+EXPORT_SYMBOL vmlinux 0x8e426a7f	mod_timer_pending
+EXPORT_SYMBOL vmlinux 0x8e763ae1	send_remote_softirq
+EXPORT_SYMBOL vmlinux 0x8e783da4	open_bdev_exclusive
+EXPORT_SYMBOL vmlinux 0x8e83e943	pci_find_parent_resource
+EXPORT_SYMBOL vmlinux 0x8ee69235	timeval_to_jiffies
+EXPORT_SYMBOL vmlinux 0x8ef0c8a7	input_register_polled_device
+EXPORT_SYMBOL vmlinux 0x8f07d8ca	__wait_on_bit
+EXPORT_SYMBOL vmlinux 0x8f376409	tty_schedule_flip
+EXPORT_SYMBOL vmlinux 0x8f3b28cf	neigh_lookup_nodev
+EXPORT_SYMBOL vmlinux 0x8f40ca95	snd_timer_notify
+EXPORT_SYMBOL vmlinux 0x8f48679a	rb_prev
+EXPORT_SYMBOL vmlinux 0x8f4a6758	lookup_bdev
+EXPORT_SYMBOL vmlinux 0x8f595b11	snd_major
+EXPORT_SYMBOL vmlinux 0x8f69a242	__timecompare_update
+EXPORT_SYMBOL vmlinux 0x8f6b7950	set_irq_data
+EXPORT_SYMBOL vmlinux 0x8f848be1	skb_under_panic
+EXPORT_SYMBOL vmlinux 0x8f9a51c0	chip_dev
+EXPORT_SYMBOL vmlinux 0x8f9b86b2	kfifo_alloc
+EXPORT_SYMBOL vmlinux 0x8fc89c7c	xfrm_policy_flush
+EXPORT_SYMBOL vmlinux 0x8fc99d52	mvOsIoUncachedMalloc
+EXPORT_SYMBOL vmlinux 0x8fd446a3	snd_info_create_card_entry
+EXPORT_SYMBOL vmlinux 0x8ff41bfd	dma_unmap_sg
+EXPORT_SYMBOL vmlinux 0x8ffdb3b8	crc16
+EXPORT_SYMBOL vmlinux 0x90035333	secure_tcpv6_sequence_number
+EXPORT_SYMBOL vmlinux 0x9004335b	__pxa2xx_pcm_prepare
+EXPORT_SYMBOL vmlinux 0x9026cd66	poll_freewait
+EXPORT_SYMBOL vmlinux 0x9033d871	scsi_rescan_device
+EXPORT_SYMBOL vmlinux 0x905b2287	pci_clear_master
+EXPORT_SYMBOL vmlinux 0x9060e0ca	xfrm_input_resume
+EXPORT_SYMBOL vmlinux 0x908b06ac	__napi_complete
+EXPORT_SYMBOL vmlinux 0x908cf5db	journal_ack_err
+EXPORT_SYMBOL vmlinux 0x90d647c4	shrink_dcache_parent
+EXPORT_SYMBOL vmlinux 0x90e18d6a	skb_seq_read
+EXPORT_SYMBOL vmlinux 0x91009452	schedule_delayed_work
+EXPORT_SYMBOL vmlinux 0x910a0d05	journal_clear_err
+EXPORT_SYMBOL vmlinux 0x911b93e7	pcix_get_max_mmrbc
+EXPORT_SYMBOL vmlinux 0x91259840	udp_prot
+EXPORT_SYMBOL vmlinux 0x912dacc9	rtnl_notify
+EXPORT_SYMBOL vmlinux 0x912e6f5a	blk_alloc_queue_node
+EXPORT_SYMBOL vmlinux 0x91481982	__ratelimit
+EXPORT_SYMBOL vmlinux 0x914a6c11	poll_initwait
+EXPORT_SYMBOL vmlinux 0x91598b69	unregister_key_type
+EXPORT_SYMBOL vmlinux 0x915e4a12	complete_request_key
+EXPORT_SYMBOL vmlinux 0x9161d694	tc6393xb_lcd_mode
+EXPORT_SYMBOL vmlinux 0x91766c09	param_get_ulong
+EXPORT_SYMBOL vmlinux 0x917701c4	arp_find
+EXPORT_SYMBOL vmlinux 0x9185e9d3	tty_flip_buffer_push
+EXPORT_SYMBOL vmlinux 0x919029aa	__readwrite_bug
+EXPORT_SYMBOL vmlinux 0x9192452b	arp_tbl
+EXPORT_SYMBOL vmlinux 0x91d890c7	tty_driver_kref_put
+EXPORT_SYMBOL vmlinux 0x91fc4997	neigh_compat_output
+EXPORT_SYMBOL vmlinux 0x9214ed8a	param_get_bool
+EXPORT_SYMBOL vmlinux 0x923b1276	dmaengine_get
+EXPORT_SYMBOL vmlinux 0x925d37d5	insert_inode_locked4
+EXPORT_SYMBOL vmlinux 0x926401f2	sg_copy_to_buffer
+EXPORT_SYMBOL vmlinux 0x9285c3df	blk_get_request
+EXPORT_SYMBOL vmlinux 0x92aa3323	napi_complete
+EXPORT_SYMBOL vmlinux 0x9305f8e6	cpufreq_get
+EXPORT_SYMBOL vmlinux 0x930e0660	scsi_scan_host
+EXPORT_SYMBOL vmlinux 0x931ca87b	ip_route_output_key
+EXPORT_SYMBOL vmlinux 0x93a6e0b2	io_schedule
+EXPORT_SYMBOL vmlinux 0x93ce2f7e	journal_restart
+EXPORT_SYMBOL vmlinux 0x93ce9c93	pci_set_dma_max_seg_size
+EXPORT_SYMBOL vmlinux 0x93e15849	vm_insert_mixed
+EXPORT_SYMBOL vmlinux 0x93fca811	__get_free_pages
+EXPORT_SYMBOL vmlinux 0x940bd1af	jbd2_journal_begin_ordered_truncate
+EXPORT_SYMBOL vmlinux 0x94383567	skb_recv_datagram
+EXPORT_SYMBOL vmlinux 0x944efc13	dquot_drop
+EXPORT_SYMBOL vmlinux 0x945c642f	dm_io_client_resize
+EXPORT_SYMBOL vmlinux 0x946bc190	destroy_EII_client
+EXPORT_SYMBOL vmlinux 0x94847b23	nf_ct_destroy
+EXPORT_SYMBOL vmlinux 0x94961283	vunmap
+EXPORT_SYMBOL vmlinux 0x949e22a4	generic_setxattr
+EXPORT_SYMBOL vmlinux 0x94b107b1	simple_rmdir
+EXPORT_SYMBOL vmlinux 0x94d729f0	dma_async_memcpy_buf_to_buf
+EXPORT_SYMBOL vmlinux 0x94e18396	textsearch_unregister
+EXPORT_SYMBOL vmlinux 0x94e1c98d	snd_pcm_release_substream
+EXPORT_SYMBOL vmlinux 0x94e8d1e2	mvUsbGetCapRegAddr
+EXPORT_SYMBOL vmlinux 0x9501d078	__wait_on_bit_lock
+EXPORT_SYMBOL vmlinux 0x952eb59c	cancel_dirty_page
+EXPORT_SYMBOL vmlinux 0x953b6598	i2c_release_client
+EXPORT_SYMBOL vmlinux 0x954488a4	syncookie_secret
+EXPORT_SYMBOL vmlinux 0x954cbb26	vsprintf
+EXPORT_SYMBOL vmlinux 0x9576d474	find_get_pages_contig
+EXPORT_SYMBOL vmlinux 0x95904450	xfrm_policy_destroy
+EXPORT_SYMBOL vmlinux 0x9599e81c	sget
+EXPORT_SYMBOL vmlinux 0x95dbe078	__get_user_2
+EXPORT_SYMBOL vmlinux 0x96032f1b	generic_make_request
+EXPORT_SYMBOL vmlinux 0x960db26f	__splice_from_pipe
+EXPORT_SYMBOL vmlinux 0x960f97cf	dquot_claim_space
+EXPORT_SYMBOL vmlinux 0x962851b7	pci_bus_read_config_byte
+EXPORT_SYMBOL vmlinux 0x96387819	generic_unplug_device
+EXPORT_SYMBOL vmlinux 0x9670b6c9	neigh_lookup
+EXPORT_SYMBOL vmlinux 0x9688c545	mmc_unregister_driver
+EXPORT_SYMBOL vmlinux 0x96898769	sysfs_format_mac
+EXPORT_SYMBOL vmlinux 0x969f3818	mvBinToHex
+EXPORT_SYMBOL vmlinux 0x96a7a4b0	block_page_mkwrite
+EXPORT_SYMBOL vmlinux 0x96b36701	bio_map_user
+EXPORT_SYMBOL vmlinux 0x96b62ce9	tcp_gro_receive
+EXPORT_SYMBOL vmlinux 0x96bb07dc	mvMacStrToHex
+EXPORT_SYMBOL vmlinux 0x96cd2b04	scsi_sense_key_string
+EXPORT_SYMBOL vmlinux 0x96d05cc0	unregister_exec_domain
+EXPORT_SYMBOL vmlinux 0x971ff080	tcp_v4_destroy_sock
+EXPORT_SYMBOL vmlinux 0x97255bdf	strlen
+EXPORT_SYMBOL vmlinux 0x974078d3	inode_needs_sync
+EXPORT_SYMBOL vmlinux 0x9754ec10	radix_tree_preload
+EXPORT_SYMBOL vmlinux 0x9790ec35	snd_register_device_for_dev
+EXPORT_SYMBOL vmlinux 0x97a04163	set_groups
+EXPORT_SYMBOL vmlinux 0x97b393d9	dm_table_get
+EXPORT_SYMBOL vmlinux 0x97b44549	kblockd_schedule_work
+EXPORT_SYMBOL vmlinux 0x97b6aec0	w1_ds2760_write
+EXPORT_SYMBOL vmlinux 0x97d866ec	sk_filter
+EXPORT_SYMBOL vmlinux 0x97e888bf	textsearch_find_continuous
+EXPORT_SYMBOL vmlinux 0x983a8ba1	netif_device_attach
+EXPORT_SYMBOL vmlinux 0x986e6135	fb_pad_unaligned_buffer
+EXPORT_SYMBOL vmlinux 0x98a4cbaf	__devm_release_region
+EXPORT_SYMBOL vmlinux 0x98bebae5	lock_may_read
+EXPORT_SYMBOL vmlinux 0x98c9593c	flock_lock_file_wait
+EXPORT_SYMBOL vmlinux 0x98eae691	phy_connect_direct
+EXPORT_SYMBOL vmlinux 0x98f84855	call_usermodehelper_setup
+EXPORT_SYMBOL vmlinux 0x99030c34	i2c_del_adapter
+EXPORT_SYMBOL vmlinux 0x992af88c	__scsi_device_lookup_by_target
+EXPORT_SYMBOL vmlinux 0x994f3d5b	scsi_calculate_bounce_limit
+EXPORT_SYMBOL vmlinux 0x99655fe2	nla_reserve
+EXPORT_SYMBOL vmlinux 0x999c3148	__raw_readsb
+EXPORT_SYMBOL vmlinux 0x999e8297	vfree
+EXPORT_SYMBOL vmlinux 0x99a62396	mii_check_link
+EXPORT_SYMBOL vmlinux 0x99bb8806	memmove
+EXPORT_SYMBOL vmlinux 0x99bd88f6	tty_throttle
+EXPORT_SYMBOL vmlinux 0x99bfbe39	get_unused_fd
+EXPORT_SYMBOL vmlinux 0x99c4b7ff	snd_timer_global_free
+EXPORT_SYMBOL vmlinux 0x99c7a8b8	jbd2_dev_to_name
+EXPORT_SYMBOL vmlinux 0x99c95fa5	unregister_sound_special
+EXPORT_SYMBOL vmlinux 0x99cdc86b	sysctl_tcp_reordering
+EXPORT_SYMBOL vmlinux 0x99ea12ce	panic_blink
+EXPORT_SYMBOL vmlinux 0x99f3b12b	dma_mark_declared_memory_occupied
+EXPORT_SYMBOL vmlinux 0x9a103e6b	scsi_add_host_with_dma
+EXPORT_SYMBOL vmlinux 0x9a11e68d	drop_super
+EXPORT_SYMBOL vmlinux 0x9a1dfd65	strpbrk
+EXPORT_SYMBOL vmlinux 0x9ab59756	ipv6_dev_get_saddr
+EXPORT_SYMBOL vmlinux 0x9adf1496	jbd2_journal_revoke
+EXPORT_SYMBOL vmlinux 0x9b11fd60	vfs_fsync
+EXPORT_SYMBOL vmlinux 0x9b21cb88	netif_napi_add
+EXPORT_SYMBOL vmlinux 0x9b388444	get_zeroed_page
+EXPORT_SYMBOL vmlinux 0x9b65f354	i2c_bit_add_bus
+EXPORT_SYMBOL vmlinux 0x9b6eb137	ksize
+EXPORT_SYMBOL vmlinux 0x9b808bc6	__scm_destroy
+EXPORT_SYMBOL vmlinux 0x9b9fc974	jbd2_journal_abort
+EXPORT_SYMBOL vmlinux 0x9ba7089d	argv_split
+EXPORT_SYMBOL vmlinux 0x9bb82f10	blk_end_request_cur
+EXPORT_SYMBOL vmlinux 0x9bbb6a2f	journal_start_commit
+EXPORT_SYMBOL vmlinux 0x9bc40288	blk_free_tags
+EXPORT_SYMBOL vmlinux 0x9bc68986	mvSysCesaInit
+EXPORT_SYMBOL vmlinux 0x9bce482f	__release_region
+EXPORT_SYMBOL vmlinux 0x9bd98b18	timecompare_offset
+EXPORT_SYMBOL vmlinux 0x9bdd8b97	sk_stream_error
+EXPORT_SYMBOL vmlinux 0x9bdf3128	snd_timer_global_register
+EXPORT_SYMBOL vmlinux 0x9c012508	fb_parse_edid
+EXPORT_SYMBOL vmlinux 0x9c043eea	phy_mii_ioctl
+EXPORT_SYMBOL vmlinux 0x9c0a7711	ip_queue_xmit
+EXPORT_SYMBOL vmlinux 0x9c16235c	inode_set_bytes
+EXPORT_SYMBOL vmlinux 0x9c2571f4	__down_read
+EXPORT_SYMBOL vmlinux 0x9c2fe39f	phy_device_create
+EXPORT_SYMBOL vmlinux 0x9c36c200	thaw_bdev
+EXPORT_SYMBOL vmlinux 0x9c4b8d56	simple_map_init
+EXPORT_SYMBOL vmlinux 0x9c690603	tcp_simple_retransmit
+EXPORT_SYMBOL vmlinux 0x9c7077bd	enable_hlt
+EXPORT_SYMBOL vmlinux 0x9c9ae8a7	gnet_stats_copy_app
+EXPORT_SYMBOL vmlinux 0x9cb96e92	qdisc_put_rtab
+EXPORT_SYMBOL vmlinux 0x9ccff102	dmam_alloc_noncoherent
+EXPORT_SYMBOL vmlinux 0x9ceb163c	memcpy_toiovec
+EXPORT_SYMBOL vmlinux 0x9cfd56c5	scsi_print_status
+EXPORT_SYMBOL vmlinux 0x9cfd606e	tcp_shutdown
+EXPORT_SYMBOL vmlinux 0x9d03b366	names_cachep
+EXPORT_SYMBOL vmlinux 0x9d1a4e77	blk_queue_stack_limits
+EXPORT_SYMBOL vmlinux 0x9d3aa376	blk_iopoll_init
+EXPORT_SYMBOL vmlinux 0x9d3c3c77	dm_put_device
+EXPORT_SYMBOL vmlinux 0x9d41c6dc	sock_get_timestampns
+EXPORT_SYMBOL vmlinux 0x9d62fdf6	blk_queue_free_tags
+EXPORT_SYMBOL vmlinux 0x9d669763	memcpy
+EXPORT_SYMBOL vmlinux 0x9d7b62e5	vfs_link
+EXPORT_SYMBOL vmlinux 0x9da5defe	__nla_reserve_nohdr
+EXPORT_SYMBOL vmlinux 0x9db374d0	single_open
+EXPORT_SYMBOL vmlinux 0x9dbe12c9	audit_log_format
+EXPORT_SYMBOL vmlinux 0x9dbefb7e	pxa2xx_pcm_free_dma_buffers
+EXPORT_SYMBOL vmlinux 0x9df3a167	tcf_em_tree_destroy
+EXPORT_SYMBOL vmlinux 0x9dfb17af	override_creds
+EXPORT_SYMBOL vmlinux 0x9e0d3c62	aio_complete
+EXPORT_SYMBOL vmlinux 0x9e120414	ida_get_new_above
+EXPORT_SYMBOL vmlinux 0x9e1fd62e	dm_table_event
+EXPORT_SYMBOL vmlinux 0x9e2000a7	memcpy_toiovecend
+EXPORT_SYMBOL vmlinux 0x9e22807a	bioset_free
+EXPORT_SYMBOL vmlinux 0x9e27f85c	pcibios_bus_to_resource
+EXPORT_SYMBOL vmlinux 0x9e2de120	snd_pcm_hw_constraint_list
+EXPORT_SYMBOL vmlinux 0x9e376930	pci_fixup_device
+EXPORT_SYMBOL vmlinux 0x9e4b8571	__xfrm_route_forward
+EXPORT_SYMBOL vmlinux 0x9e5c2dbc	send_sig
+EXPORT_SYMBOL vmlinux 0x9e6d79f8	snd_info_get_str
+EXPORT_SYMBOL vmlinux 0x9e7d6bd0	__udelay
+EXPORT_SYMBOL vmlinux 0x9e82cfba	open_exec
+EXPORT_SYMBOL vmlinux 0x9e9f1714	__bitmap_andnot
+EXPORT_SYMBOL vmlinux 0x9eaa7795	blk_remove_plug
+EXPORT_SYMBOL vmlinux 0x9eb1751c	read_cache_pages
+EXPORT_SYMBOL vmlinux 0x9ed685ee	iov_iter_advance
+EXPORT_SYMBOL vmlinux 0x9eea3903	__xfrm_policy_check
+EXPORT_SYMBOL vmlinux 0x9eecde16	do_brk
+EXPORT_SYMBOL vmlinux 0x9f100139	jiffies_to_clock_t
+EXPORT_SYMBOL vmlinux 0x9f1533b6	pci_set_mwi
+EXPORT_SYMBOL vmlinux 0x9f24173e	neigh_ifdown
+EXPORT_SYMBOL vmlinux 0x9f26558a	register_netdev
+EXPORT_SYMBOL vmlinux 0x9f2bdaac	__bitmap_or
+EXPORT_SYMBOL vmlinux 0x9f2d613e	param_set_bool
+EXPORT_SYMBOL vmlinux 0x9f47c476	mmc_card_awake
+EXPORT_SYMBOL vmlinux 0x9f53131f	pci_bus_read_config_word
+EXPORT_SYMBOL vmlinux 0x9f72c2eb	init_timer_key
+EXPORT_SYMBOL vmlinux 0x9f984513	strrchr
+EXPORT_SYMBOL vmlinux 0x9f9e6d8c	neigh_create
+EXPORT_SYMBOL vmlinux 0x9fa325c0	tcf_hash_insert
+EXPORT_SYMBOL vmlinux 0x9fb3cb72	tc_classify_compat
+EXPORT_SYMBOL vmlinux 0x9fb3dd30	memcpy_fromiovec
+EXPORT_SYMBOL vmlinux 0x9fb9766a	mmc_power_save_host
+EXPORT_SYMBOL vmlinux 0x9fbf9928	jbd2_journal_load
+EXPORT_SYMBOL vmlinux 0x9fd6bd23	scsi_command_normalize_sense
+EXPORT_SYMBOL vmlinux 0xa0041d2f	mvSysAudioInit
+EXPORT_SYMBOL vmlinux 0xa017bdbe	pxa_free_dma
+EXPORT_SYMBOL vmlinux 0xa0209153	neigh_table_init_no_netlink
+EXPORT_SYMBOL vmlinux 0xa03523d5	security_unix_stream_connect
+EXPORT_SYMBOL vmlinux 0xa03e5a8f	generic_readlink
+EXPORT_SYMBOL vmlinux 0xa04a01bd	qdisc_class_hash_insert
+EXPORT_SYMBOL vmlinux 0xa05c03df	mempool_kmalloc
+EXPORT_SYMBOL vmlinux 0xa078307d	tcp_setsockopt
+EXPORT_SYMBOL vmlinux 0xa07a8d22	sleep_on
+EXPORT_SYMBOL vmlinux 0xa07ac24b	irq_stat
+EXPORT_SYMBOL vmlinux 0xa07bd925	dmam_free_noncoherent
+EXPORT_SYMBOL vmlinux 0xa0b04675	vmalloc_32
+EXPORT_SYMBOL vmlinux 0xa0ceef51	out_of_line_wait_on_bit
+EXPORT_SYMBOL vmlinux 0xa0eada71	jbd2_journal_destroy
+EXPORT_SYMBOL vmlinux 0xa0ee3050	unregister_sysctl_table
+EXPORT_SYMBOL vmlinux 0xa0fbac79	wake_up_bit
+EXPORT_SYMBOL vmlinux 0xa108eb4d	sysctl_optmem_max
+EXPORT_SYMBOL vmlinux 0xa120d33c	tty_unregister_ldisc
+EXPORT_SYMBOL vmlinux 0xa13798f8	printk_ratelimit
+EXPORT_SYMBOL vmlinux 0xa14a588c	input_close_device
+EXPORT_SYMBOL vmlinux 0xa19ca792	__kfifo_put
+EXPORT_SYMBOL vmlinux 0xa1a006f7	bdget_disk
+EXPORT_SYMBOL vmlinux 0xa1a4062a	devm_ioremap_nocache
+EXPORT_SYMBOL vmlinux 0xa1b759ce	fb_add_videomode
+EXPORT_SYMBOL vmlinux 0xa1c76e0a	_cond_resched
+EXPORT_SYMBOL vmlinux 0xa208f9f7	update_region
+EXPORT_SYMBOL vmlinux 0xa20ce1b8	net_msg_warn
+EXPORT_SYMBOL vmlinux 0xa218bf61	complete
+EXPORT_SYMBOL vmlinux 0xa2199004	ip_dev_find
+EXPORT_SYMBOL vmlinux 0xa24f8270	inet_csk_accept
+EXPORT_SYMBOL vmlinux 0xa26b2759	arp_xmit
+EXPORT_SYMBOL vmlinux 0xa27d1663	bdget
+EXPORT_SYMBOL vmlinux 0xa2830283	__blk_run_queue
+EXPORT_SYMBOL vmlinux 0xa287a12f	follow_up
+EXPORT_SYMBOL vmlinux 0xa29b1708	tcp_memory_allocated
+EXPORT_SYMBOL vmlinux 0xa2a5fd77	inet_ehash_secret
+EXPORT_SYMBOL vmlinux 0xa2c5953a	udp_lib_get_port
+EXPORT_SYMBOL vmlinux 0xa2e690d7	xfrm_state_walk
+EXPORT_SYMBOL vmlinux 0xa30190d1	mvHexToBin
+EXPORT_SYMBOL vmlinux 0xa30cd69f	call_usermodehelper_exec
+EXPORT_SYMBOL vmlinux 0xa31cf46e	should_remove_suid
+EXPORT_SYMBOL vmlinux 0xa329f07e	register_shrinker
+EXPORT_SYMBOL vmlinux 0xa332cdd1	security_tun_dev_attach
+EXPORT_SYMBOL vmlinux 0xa336feb7	nand_manuf_ids
+EXPORT_SYMBOL vmlinux 0xa34f1ef5	crc32_le
+EXPORT_SYMBOL vmlinux 0xa35de80f	ipv4_config
+EXPORT_SYMBOL vmlinux 0xa36b2b50	sockfd_lookup
+EXPORT_SYMBOL vmlinux 0xa3ba4638	backlight_force_update
+EXPORT_SYMBOL vmlinux 0xa3e093cd	register_gifconf
+EXPORT_SYMBOL vmlinux 0xa40a725c	set_bh_page
+EXPORT_SYMBOL vmlinux 0xa41860a5	netlink_unicast
+EXPORT_SYMBOL vmlinux 0xa43b9539	memcpy_fromiovecend
+EXPORT_SYMBOL vmlinux 0xa442fdf6	sk_stream_kill_queues
+EXPORT_SYMBOL vmlinux 0xa46fb7e4	tcp_mtup_init
+EXPORT_SYMBOL vmlinux 0xa49a7369	skb_find_text
+EXPORT_SYMBOL vmlinux 0xa4cc17a1	filemap_fdatawrite_range
+EXPORT_SYMBOL vmlinux 0xa4ce072f	make_bad_inode
+EXPORT_SYMBOL vmlinux 0xa4f63026	release_firmware
+EXPORT_SYMBOL vmlinux 0xa514363f	i2c_smbus_read_word_data
+EXPORT_SYMBOL vmlinux 0xa5169eda	d_move
+EXPORT_SYMBOL vmlinux 0xa542f44d	seq_path
+EXPORT_SYMBOL vmlinux 0xa56e2011	tcf_hash_create
+EXPORT_SYMBOL vmlinux 0xa573e84b	iunique
+EXPORT_SYMBOL vmlinux 0xa5797a83	unlock_buffer
+EXPORT_SYMBOL vmlinux 0xa5808bbf	tasklet_init
+EXPORT_SYMBOL vmlinux 0xa58b6804	nla_parse
+EXPORT_SYMBOL vmlinux 0xa598e29c	vesa_modes
+EXPORT_SYMBOL vmlinux 0xa5a7987c	snd_pcm_hw_constraint_ratnums
+EXPORT_SYMBOL vmlinux 0xa5bbb17e	proc_dointvec_userhz_jiffies
+EXPORT_SYMBOL vmlinux 0xa5c60beb	d_rehash
+EXPORT_SYMBOL vmlinux 0xa5cef8ad	release_resource
+EXPORT_SYMBOL vmlinux 0xa5d087b6	scsi_prep_return
+EXPORT_SYMBOL vmlinux 0xa5dcd174	dev_mc_add
+EXPORT_SYMBOL vmlinux 0xa5fd3037	create_empty_buffers
+EXPORT_SYMBOL vmlinux 0xa608bc7f	nand_calculate_ecc
+EXPORT_SYMBOL vmlinux 0xa61aa028	snd_pcm_format_unsigned
+EXPORT_SYMBOL vmlinux 0xa6210c97	tcp_timewait_state_process
+EXPORT_SYMBOL vmlinux 0xa64345c9	eth_header_cache
+EXPORT_SYMBOL vmlinux 0xa64e6cf5	unregister_quota_format
+EXPORT_SYMBOL vmlinux 0xa6511c34	inet_dev_addr_type
+EXPORT_SYMBOL vmlinux 0xa660bc1d	scsi_is_host_device
+EXPORT_SYMBOL vmlinux 0xa6613a11	dma_sync_wait
+EXPORT_SYMBOL vmlinux 0xa67dccb2	textsearch_prepare
+EXPORT_SYMBOL vmlinux 0xa68124fa	hweight8
+EXPORT_SYMBOL vmlinux 0xa681fe88	generate_random_uuid
+EXPORT_SYMBOL vmlinux 0xa689a33b	fb_blank
+EXPORT_SYMBOL vmlinux 0xa68ec41a	mvCtrlEthMaxPortGet
+EXPORT_SYMBOL vmlinux 0xa68f92a5	snd_info_create_module_entry
+EXPORT_SYMBOL vmlinux 0xa6a46bcf	skb_over_panic
+EXPORT_SYMBOL vmlinux 0xa6b2c22a	generic_show_options
+EXPORT_SYMBOL vmlinux 0xa6b7cb3a	jbd2_journal_clear_features
+EXPORT_SYMBOL vmlinux 0xa6cc77a2	tcf_em_tree_dump
+EXPORT_SYMBOL vmlinux 0xa6dcc773	rb_insert_color
+EXPORT_SYMBOL vmlinux 0xa6f565e4	scsi_host_get
+EXPORT_SYMBOL vmlinux 0xa6fec16f	arp_send
+EXPORT_SYMBOL vmlinux 0xa726c895	path_put
+EXPORT_SYMBOL vmlinux 0xa750db42	jbd2_journal_get_create_access
+EXPORT_SYMBOL vmlinux 0xa755d7b9	fib_default_rule_add
+EXPORT_SYMBOL vmlinux 0xa75aa1bd	skb_append_datato_frags
+EXPORT_SYMBOL vmlinux 0xa76430e5	dev_unicast_add
+EXPORT_SYMBOL vmlinux 0xa7ba8944	block_write_full_page
+EXPORT_SYMBOL vmlinux 0xa7c42a25	dev_unicast_unsync
+EXPORT_SYMBOL vmlinux 0xa834daf9	generic_read_dir
+EXPORT_SYMBOL vmlinux 0xa8541abb	sk_send_sigurg
+EXPORT_SYMBOL vmlinux 0xa8600b80	nand_scan_bbt
+EXPORT_SYMBOL vmlinux 0xa8660ac2	sock_no_accept
+EXPORT_SYMBOL vmlinux 0xa877e305	boot_tvec_bases
+EXPORT_SYMBOL vmlinux 0xa897a7ad	input_set_keycode
+EXPORT_SYMBOL vmlinux 0xa89e3289	vfs_quota_on_path
+EXPORT_SYMBOL vmlinux 0xa8a2ddf5	jbd2_journal_try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0xa8ac4d52	copy_io_context
+EXPORT_SYMBOL vmlinux 0xa8b62240	tcp_v4_do_rcv
+EXPORT_SYMBOL vmlinux 0xa8c26c94	jbd2_journal_unlock_updates
+EXPORT_SYMBOL vmlinux 0xa8dee945	page_readlink
+EXPORT_SYMBOL vmlinux 0xa8fef7bb	security_unix_may_send
+EXPORT_SYMBOL vmlinux 0xa92daa83	con_set_default_unimap
+EXPORT_SYMBOL vmlinux 0xa933dfee	dquot_acquire
+EXPORT_SYMBOL vmlinux 0xa99b50a7	input_register_handle
+EXPORT_SYMBOL vmlinux 0xa99b52e9	revert_creds
+EXPORT_SYMBOL vmlinux 0xa99cd3a1	nand_default_bbt
+EXPORT_SYMBOL vmlinux 0xa9ca293f	inode_setattr
+EXPORT_SYMBOL vmlinux 0xa9d3d38d	vm_insert_page
+EXPORT_SYMBOL vmlinux 0xa9dfa1a0	dev_add_pack
+EXPORT_SYMBOL vmlinux 0xa9f1ed23	bit_waitqueue
+EXPORT_SYMBOL vmlinux 0xa9f81147	pci_enable_device_mem
+EXPORT_SYMBOL vmlinux 0xaa181d1a	snd_pcm_lib_write
+EXPORT_SYMBOL vmlinux 0xaa68fb0b	scsi_finish_command
+EXPORT_SYMBOL vmlinux 0xaa754b9e	snd_pcm_hw_constraint_pow2
+EXPORT_SYMBOL vmlinux 0xaa963913	dev_get_stats
+EXPORT_SYMBOL vmlinux 0xaab024d2	fb_firmware_edid
+EXPORT_SYMBOL vmlinux 0xaaf10d0e	scsi_cmd_print_sense_hdr
+EXPORT_SYMBOL vmlinux 0xaafdc258	strcasecmp
+EXPORT_SYMBOL vmlinux 0xab07f417	mmc_release_host
+EXPORT_SYMBOL vmlinux 0xab0e4588	generic_file_aio_read
+EXPORT_SYMBOL vmlinux 0xab1447e5	scsi_eh_prep_cmnd
+EXPORT_SYMBOL vmlinux 0xab2f11ed	kill_pid
+EXPORT_SYMBOL vmlinux 0xab310e1e	snd_pcm_period_elapsed
+EXPORT_SYMBOL vmlinux 0xab3ce597	tcp_make_synack
+EXPORT_SYMBOL vmlinux 0xab41de0b	request_firmware
+EXPORT_SYMBOL vmlinux 0xab4bdba7	tcp_v4_md5_hash_skb
+EXPORT_SYMBOL vmlinux 0xab53b0a8	mempool_alloc
+EXPORT_SYMBOL vmlinux 0xab5a31a6	netpoll_send_udp
+EXPORT_SYMBOL vmlinux 0xab600421	probe_irq_off
+EXPORT_SYMBOL vmlinux 0xab64527d	mutex_lock_interruptible
+EXPORT_SYMBOL vmlinux 0xab680c96	__down_read_trylock
+EXPORT_SYMBOL vmlinux 0xab7b7193	journal_start
+EXPORT_SYMBOL vmlinux 0xab852671	jbd2_journal_set_features
+EXPORT_SYMBOL vmlinux 0xab90c121	__skb_recv_datagram
+EXPORT_SYMBOL vmlinux 0xab9bed99	audit_log_end
+EXPORT_SYMBOL vmlinux 0xaba732d1	call_usermodehelper_setkeys
+EXPORT_SYMBOL vmlinux 0xabd0c91c	rtc_time_to_tm
+EXPORT_SYMBOL vmlinux 0xac0ba8c1	blk_iopoll_disable
+EXPORT_SYMBOL vmlinux 0xac150fc8	set_bdi_congested
+EXPORT_SYMBOL vmlinux 0xac1b8db4	phy_ethtool_sset
+EXPORT_SYMBOL vmlinux 0xac34ea0b	jbd2_journal_check_available_features
+EXPORT_SYMBOL vmlinux 0xac3dd64d	scsi_device_set_state
+EXPORT_SYMBOL vmlinux 0xac457c80	vfs_readv
+EXPORT_SYMBOL vmlinux 0xac54fc9f	mempool_destroy
+EXPORT_SYMBOL vmlinux 0xac56da92	scsi_register
+EXPORT_SYMBOL vmlinux 0xac573233	pneigh_lookup
+EXPORT_SYMBOL vmlinux 0xac5da09f	kmem_cache_create
+EXPORT_SYMBOL vmlinux 0xac5f113d	cpu_all_bits
+EXPORT_SYMBOL vmlinux 0xac6855b0	gen_kill_estimator
+EXPORT_SYMBOL vmlinux 0xac6b0e7d	pci_vpd_truncate
+EXPORT_SYMBOL vmlinux 0xac7c54f8	ndisc_build_skb
+EXPORT_SYMBOL vmlinux 0xaca69346	dcache_dir_open
+EXPORT_SYMBOL vmlinux 0xacca9176	seq_bitmap_list
+EXPORT_SYMBOL vmlinux 0xaccabc6a	in4_pton
+EXPORT_SYMBOL vmlinux 0xace0630c	bio_endio
+EXPORT_SYMBOL vmlinux 0xacf4d843	match_strdup
+EXPORT_SYMBOL vmlinux 0xad0413d4	match_hex
+EXPORT_SYMBOL vmlinux 0xad32619f	__napi_schedule
+EXPORT_SYMBOL vmlinux 0xad492d73	snd_ac97_pcm_double_rate_rules
+EXPORT_SYMBOL vmlinux 0xad59d00b	skb_copy_datagram_from_iovec
+EXPORT_SYMBOL vmlinux 0xad7e7789	mdiobus_write
+EXPORT_SYMBOL vmlinux 0xad84abbc	tcf_exts_dump_stats
+EXPORT_SYMBOL vmlinux 0xad86091f	neigh_for_each
+EXPORT_SYMBOL vmlinux 0xad94d0b1	nf_unregister_sockopt
+EXPORT_SYMBOL vmlinux 0xadaa2657	cpufreq_register_notifier
+EXPORT_SYMBOL vmlinux 0xadb792c2	prepare_to_wait_exclusive
+EXPORT_SYMBOL vmlinux 0xade5b323	blk_queue_max_hw_sectors
+EXPORT_SYMBOL vmlinux 0xade88e76	snd_malloc_pages
+EXPORT_SYMBOL vmlinux 0xadf42bd5	__request_region
+EXPORT_SYMBOL vmlinux 0xae03d681	neigh_connected_output
+EXPORT_SYMBOL vmlinux 0xae107192	__vlan_hwaccel_rx
+EXPORT_SYMBOL vmlinux 0xae1074c9	inet_frags_exit_net
+EXPORT_SYMBOL vmlinux 0xae395308	per_cpu__vm_event_states
+EXPORT_SYMBOL vmlinux 0xae5e2078	dquot_release
+EXPORT_SYMBOL vmlinux 0xae9544b0	snd_pcm_mmap_data
+EXPORT_SYMBOL vmlinux 0xaea8bed0	kunmap_high
+EXPORT_SYMBOL vmlinux 0xaec655c7	alloc_pages_exact
+EXPORT_SYMBOL vmlinux 0xaed013b9	posix_acl_valid
+EXPORT_SYMBOL vmlinux 0xaed50477	udplite_prot
+EXPORT_SYMBOL vmlinux 0xaefaebbd	security_path_truncate
+EXPORT_SYMBOL vmlinux 0xaf172e6e	test_set_page_writeback
+EXPORT_SYMBOL vmlinux 0xaf2dd08a	nf_hook_slow
+EXPORT_SYMBOL vmlinux 0xaf2eba32	blk_rq_map_kern
+EXPORT_SYMBOL vmlinux 0xaf3e006c	mmc_cleanup_queue
+EXPORT_SYMBOL vmlinux 0xaf42129a	ds2782_reg_set
+EXPORT_SYMBOL vmlinux 0xaf500315	pci_restore_state
+EXPORT_SYMBOL vmlinux 0xaf50e76d	elf_set_personality
+EXPORT_SYMBOL vmlinux 0xaf7134e1	iov_iter_copy_from_user
+EXPORT_SYMBOL vmlinux 0xaf81c8ef	lock_sock_nested
+EXPORT_SYMBOL vmlinux 0xaf8aa518	system_rev
+EXPORT_SYMBOL vmlinux 0xaf9d24fa	lookup_hash
+EXPORT_SYMBOL vmlinux 0xafaca9ad	sk_run_filter
+EXPORT_SYMBOL vmlinux 0xafbacadb	tcf_hash_release
+EXPORT_SYMBOL vmlinux 0xb0523f2a	dput
+EXPORT_SYMBOL vmlinux 0xb0b847ac	__bitmap_full
+EXPORT_SYMBOL vmlinux 0xb0da4f79	ethtool_op_get_sg
+EXPORT_SYMBOL vmlinux 0xb0dc92ed	follow_pfn
+EXPORT_SYMBOL vmlinux 0xb0e10781	get_option
+EXPORT_SYMBOL vmlinux 0xb0ebf7ca	fget
+EXPORT_SYMBOL vmlinux 0xb0ee1cd7	fb_validate_mode
+EXPORT_SYMBOL vmlinux 0xb121390a	probe_irq_on
+EXPORT_SYMBOL vmlinux 0xb1415e42	security_inode_setsecctx
+EXPORT_SYMBOL vmlinux 0xb150a973	redraw_screen
+EXPORT_SYMBOL vmlinux 0xb1752259	mvAudioRecordControlSet
+EXPORT_SYMBOL vmlinux 0xb19760c3	bitmap_onto
+EXPORT_SYMBOL vmlinux 0xb1b9701a	sock_wake_async
+EXPORT_SYMBOL vmlinux 0xb1c39493	pci_iomap
+EXPORT_SYMBOL vmlinux 0xb1c3a01a	oops_in_progress
+EXPORT_SYMBOL vmlinux 0xb1dc07b7	blk_queue_io_opt
+EXPORT_SYMBOL vmlinux 0xb1ff7069	blk_cleanup_queue
+EXPORT_SYMBOL vmlinux 0xb222f228	no_llseek
+EXPORT_SYMBOL vmlinux 0xb224fbe2	param_get_short
+EXPORT_SYMBOL vmlinux 0xb22fe6a3	netdev_increment_features
+EXPORT_SYMBOL vmlinux 0xb2668bcd	seq_puts
+EXPORT_SYMBOL vmlinux 0xb2682405	utf8_to_utf32
+EXPORT_SYMBOL vmlinux 0xb272fd2a	proc_dointvec_jiffies
+EXPORT_SYMBOL vmlinux 0xb28a7bbe	request_key_async_with_auxdata
+EXPORT_SYMBOL vmlinux 0xb2a1f427	snd_pcm_lib_malloc_pages
+EXPORT_SYMBOL vmlinux 0xb2bf1312	__up_read
+EXPORT_SYMBOL vmlinux 0xb2d72cc7	gen_replace_estimator
+EXPORT_SYMBOL vmlinux 0xb2e5ae4a	snd_lookup_minor_data
+EXPORT_SYMBOL vmlinux 0xb2e81232	tcf_destroy_chain
+EXPORT_SYMBOL vmlinux 0xb32632bd	tcf_action_dump_1
+EXPORT_SYMBOL vmlinux 0xb376d79d	radix_tree_tagged
+EXPORT_SYMBOL vmlinux 0xb37f7a18	kill_fasync
+EXPORT_SYMBOL vmlinux 0xb38fca0e	bdput
+EXPORT_SYMBOL vmlinux 0xb3a307c6	si_meminfo
+EXPORT_SYMBOL vmlinux 0xb3b2ef5b	security_inode_notifysecctx
+EXPORT_SYMBOL vmlinux 0xb3fe02b1	down_write
+EXPORT_SYMBOL vmlinux 0xb400d8ea	scsi_release_buffers
+EXPORT_SYMBOL vmlinux 0xb4086dd0	vfs_readdir
+EXPORT_SYMBOL vmlinux 0xb41a1d18	snd_ctl_boolean_mono_info
+EXPORT_SYMBOL vmlinux 0xb423dba1	console_blanked
+EXPORT_SYMBOL vmlinux 0xb42453d3	param_get_invbool
+EXPORT_SYMBOL vmlinux 0xb4247f3b	journal_init_inode
+EXPORT_SYMBOL vmlinux 0xb4306c63	console_stop
+EXPORT_SYMBOL vmlinux 0xb436ffa3	__cond_resched_lock
+EXPORT_SYMBOL vmlinux 0xb43f70f2	pci_match_id
+EXPORT_SYMBOL vmlinux 0xb452926a	__scsi_add_device
+EXPORT_SYMBOL vmlinux 0xb45b421c	inode_add_bytes
+EXPORT_SYMBOL vmlinux 0xb464458f	tcf_action_exec
+EXPORT_SYMBOL vmlinux 0xb4709322	scsi_dev_info_add_list
+EXPORT_SYMBOL vmlinux 0xb47d1f8d	dev_disable_lro
+EXPORT_SYMBOL vmlinux 0xb4a7b8a8	start_tty
+EXPORT_SYMBOL vmlinux 0xb4b94377	__nand_correct_data
+EXPORT_SYMBOL vmlinux 0xb502cfc9	__pxa2xx_pcm_hw_params
+EXPORT_SYMBOL vmlinux 0xb5044271	vsscanf
+EXPORT_SYMBOL vmlinux 0xb50bb31d	module_layout
+EXPORT_SYMBOL vmlinux 0xb534763c	sg_free_table
+EXPORT_SYMBOL vmlinux 0xb53b6cba	skb_unlink
+EXPORT_SYMBOL vmlinux 0xb54533f7	usecs_to_jiffies
+EXPORT_SYMBOL vmlinux 0xb56165bd	mvCtrlUsbMaxGet
+EXPORT_SYMBOL vmlinux 0xb5750eeb	journal_dirty_data
+EXPORT_SYMBOL vmlinux 0xb57da3ae	xfrm_register_type
+EXPORT_SYMBOL vmlinux 0xb5a459dc	unregister_blkdev
+EXPORT_SYMBOL vmlinux 0xb5d6dee7	dm_register_target
+EXPORT_SYMBOL vmlinux 0xb5d8b79e	xfrm_find_acq_byseq
+EXPORT_SYMBOL vmlinux 0xb635b9ed	tcf_exts_change
+EXPORT_SYMBOL vmlinux 0xb6380301	generic_file_direct_write
+EXPORT_SYMBOL vmlinux 0xb678366f	int_sqrt
+EXPORT_SYMBOL vmlinux 0xb6896671	crc_t10dif
+EXPORT_SYMBOL vmlinux 0xb69dc145	neigh_seq_start
+EXPORT_SYMBOL vmlinux 0xb69e25fd	journal_force_commit_nested
+EXPORT_SYMBOL vmlinux 0xb6a61a86	qdisc_get_rtab
+EXPORT_SYMBOL vmlinux 0xb6a68816	find_last_bit
+EXPORT_SYMBOL vmlinux 0xb6a83883	init_file
+EXPORT_SYMBOL vmlinux 0xb6b1a593	mfd_remove_devices
+EXPORT_SYMBOL vmlinux 0xb6bffb99	kstat_irqs_cpu
+EXPORT_SYMBOL vmlinux 0xb6c5a973	scsi_show_result
+EXPORT_SYMBOL vmlinux 0xb6c70a7d	__wake_up
+EXPORT_SYMBOL vmlinux 0xb726d05d	inet_frags_fini
+EXPORT_SYMBOL vmlinux 0xb733794f	phy_stop
+EXPORT_SYMBOL vmlinux 0xb774a77b	nla_put_nohdr
+EXPORT_SYMBOL vmlinux 0xb7873539	jbd2_journal_force_commit_nested
+EXPORT_SYMBOL vmlinux 0xb798b8e4	flow_cache_lookup
+EXPORT_SYMBOL vmlinux 0xb7a55a93	pci_set_power_state
+EXPORT_SYMBOL vmlinux 0xb7ad3321	ida_init
+EXPORT_SYMBOL vmlinux 0xb7b61546	crc32_be
+EXPORT_SYMBOL vmlinux 0xb7ba76c7	__aeabi_unwind_cpp_pr2
+EXPORT_SYMBOL vmlinux 0xb7ccb3c7	twl4030_i2c_read_u8
+EXPORT_SYMBOL vmlinux 0xb7d1646b	sync_inode
+EXPORT_SYMBOL vmlinux 0xb7de3573	neigh_sysctl_unregister
+EXPORT_SYMBOL vmlinux 0xb80318d8	unregister_framebuffer
+EXPORT_SYMBOL vmlinux 0xb81e5096	mpage_writepage
+EXPORT_SYMBOL vmlinux 0xb8222193	mvCesaDebugSA
+EXPORT_SYMBOL vmlinux 0xb848c2d9	eth_header_cache_update
+EXPORT_SYMBOL vmlinux 0xb84ed32f	proc_doulongvec_minmax
+EXPORT_SYMBOL vmlinux 0xb859f38b	krealloc
+EXPORT_SYMBOL vmlinux 0xb86aad90	dma_pool_destroy
+EXPORT_SYMBOL vmlinux 0xb86e4ab9	random32
+EXPORT_SYMBOL vmlinux 0xb87b43db	bmap
+EXPORT_SYMBOL vmlinux 0xb88ce153	sk_dst_check
+EXPORT_SYMBOL vmlinux 0xb88ead18	create_proc_entry
+EXPORT_SYMBOL vmlinux 0xb8992e20	pci_back_from_sleep
+EXPORT_SYMBOL vmlinux 0xb89af9bf	srandom32
+EXPORT_SYMBOL vmlinux 0xb8aa2342	__check_region
+EXPORT_SYMBOL vmlinux 0xb8d4b84a	snd_ac97_write
+EXPORT_SYMBOL vmlinux 0xb8d6354a	ip4_datagram_connect
+EXPORT_SYMBOL vmlinux 0xb8eb3046	__invalidate_device
+EXPORT_SYMBOL vmlinux 0xb8ed26c7	mdiobus_unregister
+EXPORT_SYMBOL vmlinux 0xb8f84837	block_write_begin
+EXPORT_SYMBOL vmlinux 0xb93cff24	__tcf_em_tree_match
+EXPORT_SYMBOL vmlinux 0xb95f98d6	_memset_io
+EXPORT_SYMBOL vmlinux 0xb96274fd	jbd2_journal_dirty_metadata
+EXPORT_SYMBOL vmlinux 0xb9638db4	snd_pcm_rate_to_rate_bit
+EXPORT_SYMBOL vmlinux 0xb97d4c9c	mutex_lock
+EXPORT_SYMBOL vmlinux 0xb98a0185	rtc_tm_to_time
+EXPORT_SYMBOL vmlinux 0xb98ef804	vm_stat
+EXPORT_SYMBOL vmlinux 0xb9a855ee	input_set_capability
+EXPORT_SYMBOL vmlinux 0xb9acd3d9	__put_user_2
+EXPORT_SYMBOL vmlinux 0xb9b533b5	snd_pcm_set_ops
+EXPORT_SYMBOL vmlinux 0xb9ddc65e	scsi_mode_sense
+EXPORT_SYMBOL vmlinux 0xba293a85	__xfrm_state_destroy
+EXPORT_SYMBOL vmlinux 0xba3bda2a	__downgrade_write
+EXPORT_SYMBOL vmlinux 0xba48f299	set_security_override
+EXPORT_SYMBOL vmlinux 0xba497f13	loops_per_jiffy
+EXPORT_SYMBOL vmlinux 0xba82399f	sock_sendmsg
+EXPORT_SYMBOL vmlinux 0xba865707	generic_write_checks
+EXPORT_SYMBOL vmlinux 0xba8f8b68	completion_done
+EXPORT_SYMBOL vmlinux 0xbaaab8ae	timespec_to_jiffies
+EXPORT_SYMBOL vmlinux 0xbab681d5	vfs_fsync_range
+EXPORT_SYMBOL vmlinux 0xbac60198	skb_make_writable
+EXPORT_SYMBOL vmlinux 0xbadc13d2	new_inode
+EXPORT_SYMBOL vmlinux 0xbb065ee6	cad_pid
+EXPORT_SYMBOL vmlinux 0xbb07423d	ip_setsockopt
+EXPORT_SYMBOL vmlinux 0xbb167766	fb_var_to_videomode
+EXPORT_SYMBOL vmlinux 0xbb189cad	disallow_signal
+EXPORT_SYMBOL vmlinux 0xbb3dc6a1	snd_card_register
+EXPORT_SYMBOL vmlinux 0xbb55505b	dquot_release_reserved_space
+EXPORT_SYMBOL vmlinux 0xbb5576ec	skb_abort_seq_read
+EXPORT_SYMBOL vmlinux 0xbb575508	sk_alloc
+EXPORT_SYMBOL vmlinux 0xbb5d343d	xfrm_get_acqseq
+EXPORT_SYMBOL vmlinux 0xbb72d4fe	__put_user_1
+EXPORT_SYMBOL vmlinux 0xbb7752bd	__inet6_lookup_established
+EXPORT_SYMBOL vmlinux 0xbb85a92b	remove_arg_zero
+EXPORT_SYMBOL vmlinux 0xbb99125c	get_default_font
+EXPORT_SYMBOL vmlinux 0xbbcc19aa	tcp_v4_syn_recv_sock
+EXPORT_SYMBOL vmlinux 0xbbf5c750	mvBoardMacSpeedGet
+EXPORT_SYMBOL vmlinux 0xbc0ea1b1	request_key_with_auxdata
+EXPORT_SYMBOL vmlinux 0xbc10dd97	__put_user_4
+EXPORT_SYMBOL vmlinux 0xbc2008f6	pcim_iounmap
+EXPORT_SYMBOL vmlinux 0xbc3c760f	input_filter_device
+EXPORT_SYMBOL vmlinux 0xbc714b19	xfrm_init_state
+EXPORT_SYMBOL vmlinux 0xbc73b4b8	__seq_open_private
+EXPORT_SYMBOL vmlinux 0xbcc4c619	generic_error_remove_page
+EXPORT_SYMBOL vmlinux 0xbd25bd0b	input_unfilter_device
+EXPORT_SYMBOL vmlinux 0xbd6aec93	journal_lock_updates
+EXPORT_SYMBOL vmlinux 0xbd6f2125	inode_change_ok
+EXPORT_SYMBOL vmlinux 0xbd8a20f7	is_container_init
+EXPORT_SYMBOL vmlinux 0xbdf2580d	__raw_readsl
+EXPORT_SYMBOL vmlinux 0xbdf5c25c	rb_next
+EXPORT_SYMBOL vmlinux 0xbe06d024	lock_super
+EXPORT_SYMBOL vmlinux 0xbe0e5118	nla_memcmp
+EXPORT_SYMBOL vmlinux 0xbe146835	input_allocate_device
+EXPORT_SYMBOL vmlinux 0xbe1a5c11	tcf_register_action
+EXPORT_SYMBOL vmlinux 0xbe349410	snd_ctl_notify
+EXPORT_SYMBOL vmlinux 0xbe63ee40	request_resource
+EXPORT_SYMBOL vmlinux 0xbe74b1ae	pci_try_set_mwi
+EXPORT_SYMBOL vmlinux 0xbe7871f5	inet6_add_protocol
+EXPORT_SYMBOL vmlinux 0xbe7da867	mfd_add_devices
+EXPORT_SYMBOL vmlinux 0xbe8aa5a5	nobh_write_end
+EXPORT_SYMBOL vmlinux 0xbed76670	elv_rb_find
+EXPORT_SYMBOL vmlinux 0xbeeb1716	mvCtrlPwrClckGet
+EXPORT_SYMBOL vmlinux 0xbef43296	console_conditional_schedule
+EXPORT_SYMBOL vmlinux 0xbf2af460	__dev_get_by_index
+EXPORT_SYMBOL vmlinux 0xbf7fd2f5	schedule_timeout_killable
+EXPORT_SYMBOL vmlinux 0xbf9006b1	phy_ethtool_gset
+EXPORT_SYMBOL vmlinux 0xbf9bcc8d	__cap_empty_set
+EXPORT_SYMBOL vmlinux 0xbf9dc5f7	sys_dup
+EXPORT_SYMBOL vmlinux 0xbfb1da6f	da903x_query_status
+EXPORT_SYMBOL vmlinux 0xbfb513e9	pci_scan_bridge
+EXPORT_SYMBOL vmlinux 0xbfd75100	sock_no_setsockopt
+EXPORT_SYMBOL vmlinux 0xbfdeec8c	mark_buffer_dirty_inode
+EXPORT_SYMBOL vmlinux 0xbfee3ad5	loop_unregister_transfer
+EXPORT_SYMBOL vmlinux 0xbff1da88	scsi_free_host_dev
+EXPORT_SYMBOL vmlinux 0xbff22490	snd_pcm_lib_preallocate_pages_for_all
+EXPORT_SYMBOL vmlinux 0xc0008dec	unregister_netdevice
+EXPORT_SYMBOL vmlinux 0xc0044724	blk_set_default_limits
+EXPORT_SYMBOL vmlinux 0xc0134520	bio_phys_segments
+EXPORT_SYMBOL vmlinux 0xc02235f1	rtc_lock
+EXPORT_SYMBOL vmlinux 0xc02cf69b	clkdev_drop
+EXPORT_SYMBOL vmlinux 0xc036745d	dma_release_from_coherent
+EXPORT_SYMBOL vmlinux 0xc05622d1	check_disk_change
+EXPORT_SYMBOL vmlinux 0xc0580937	rb_erase
+EXPORT_SYMBOL vmlinux 0xc058732e	mvOsIoCachedMalloc
+EXPORT_SYMBOL vmlinux 0xc07d7f66	kill_litter_super
+EXPORT_SYMBOL vmlinux 0xc09d0bc3	jbd2_journal_flush
+EXPORT_SYMBOL vmlinux 0xc0a69460	dev_addr_del_multiple
+EXPORT_SYMBOL vmlinux 0xc0bf6ead	timecounter_cyc2time
+EXPORT_SYMBOL vmlinux 0xc0ccef30	blk_sync_queue
+EXPORT_SYMBOL vmlinux 0xc0d06cc0	scsi_add_device
+EXPORT_SYMBOL vmlinux 0xc1133474	__blockdev_direct_IO
+EXPORT_SYMBOL vmlinux 0xc1174aa0	inet_ioctl
+EXPORT_SYMBOL vmlinux 0xc11d8093	iov_shorten
+EXPORT_SYMBOL vmlinux 0xc129d613	skb_split
+EXPORT_SYMBOL vmlinux 0xc13cddb6	snd_dma_reserve_buf
+EXPORT_SYMBOL vmlinux 0xc1418f82	input_unregister_handle
+EXPORT_SYMBOL vmlinux 0xc1601a4f	_change_bit_le
+EXPORT_SYMBOL vmlinux 0xc171ff5c	netlink_set_err
+EXPORT_SYMBOL vmlinux 0xc18f89cf	unregister_mtd_chip_driver
+EXPORT_SYMBOL vmlinux 0xc1954781	i2c_bit_add_numbered_bus
+EXPORT_SYMBOL vmlinux 0xc1cf3b6a	skb_pad
+EXPORT_SYMBOL vmlinux 0xc1fc4511	_test_and_change_bit_le
+EXPORT_SYMBOL vmlinux 0xc21557ec	find_lock_page
+EXPORT_SYMBOL vmlinux 0xc22616f1	__init_rwsem
+EXPORT_SYMBOL vmlinux 0xc2348fd3	__neigh_for_each_release
+EXPORT_SYMBOL vmlinux 0xc236040e	dma_mmap_writecombine
+EXPORT_SYMBOL vmlinux 0xc24adb3b	bioset_create
+EXPORT_SYMBOL vmlinux 0xc256e762	__bitmap_equal
+EXPORT_SYMBOL vmlinux 0xc262d2d5	__inet6_hash
+EXPORT_SYMBOL vmlinux 0xc264d49c	cuio_copydata
+EXPORT_SYMBOL vmlinux 0xc2651f0c	ac97_bus_type
+EXPORT_SYMBOL vmlinux 0xc27487dd	__bug
+EXPORT_SYMBOL vmlinux 0xc2787750	register_netdevice
+EXPORT_SYMBOL vmlinux 0xc2e587d1	reset_devices
+EXPORT_SYMBOL vmlinux 0xc311df61	framebuffer_release
+EXPORT_SYMBOL vmlinux 0xc34957db	jbd2_journal_check_used_features
+EXPORT_SYMBOL vmlinux 0xc359fb65	abort
+EXPORT_SYMBOL vmlinux 0xc3642326	iw_handler_set_spy
+EXPORT_SYMBOL vmlinux 0xc381f207	dm_table_put
+EXPORT_SYMBOL vmlinux 0xc38fa20f	kernel_getsockname
+EXPORT_SYMBOL vmlinux 0xc3b88a62	xfrm_find_acq
+EXPORT_SYMBOL vmlinux 0xc3bd1523	snd_ctl_free_one
+EXPORT_SYMBOL vmlinux 0xc3c19d02	seq_putc
+EXPORT_SYMBOL vmlinux 0xc3c80fd4	inode_sub_rsv_space
+EXPORT_SYMBOL vmlinux 0xc3cf1128	in_group_p
+EXPORT_SYMBOL vmlinux 0xc3fec867	ethtool_op_get_rx_csum
+EXPORT_SYMBOL vmlinux 0xc43d57ee	clk_add_alias
+EXPORT_SYMBOL vmlinux 0xc440c451	sg_alloc_table
+EXPORT_SYMBOL vmlinux 0xc44965b2	snd_pcm_hw_constraint_integer
+EXPORT_SYMBOL vmlinux 0xc450e98f	mvSPDIFRecordTclockSet
+EXPORT_SYMBOL vmlinux 0xc4645c98	sock_no_sendmsg
+EXPORT_SYMBOL vmlinux 0xc46be4a4	i2c_smbus_write_byte
+EXPORT_SYMBOL vmlinux 0xc499ae1e	kstrdup
+EXPORT_SYMBOL vmlinux 0xc4d0b745	get_fs_type
+EXPORT_SYMBOL vmlinux 0xc4d6488c	register_con_driver
+EXPORT_SYMBOL vmlinux 0xc4e091e0	file_update_time
+EXPORT_SYMBOL vmlinux 0xc4f392bc	mmc_align_data_size
+EXPORT_SYMBOL vmlinux 0xc50c124c	xfrm_dst_ifdown
+EXPORT_SYMBOL vmlinux 0xc51d8c7c	blk_queue_invalidate_tags
+EXPORT_SYMBOL vmlinux 0xc524c9bc	dm_table_get_mode
+EXPORT_SYMBOL vmlinux 0xc52f5714	fb_videomode_to_var
+EXPORT_SYMBOL vmlinux 0xc5456d6d	mdiobus_scan
+EXPORT_SYMBOL vmlinux 0xc5554b03	get_phy_id
+EXPORT_SYMBOL vmlinux 0xc57af666	pcix_set_mmrbc
+EXPORT_SYMBOL vmlinux 0xc57ff24e	qdisc_reset
+EXPORT_SYMBOL vmlinux 0xc58c50f0	jbd2_journal_update_format
+EXPORT_SYMBOL vmlinux 0xc5945ab2	seq_lseek
+EXPORT_SYMBOL vmlinux 0xc5a85527	sg_miter_start
+EXPORT_SYMBOL vmlinux 0xc5c850f0	generic_write_sync
+EXPORT_SYMBOL vmlinux 0xc5fffce4	random_input_words
+EXPORT_SYMBOL vmlinux 0xc6057610	remap_pfn_range
+EXPORT_SYMBOL vmlinux 0xc6144a0f	kmem_cache_size
+EXPORT_SYMBOL vmlinux 0xc6184045	cpu_possible_mask
+EXPORT_SYMBOL vmlinux 0xc633495b	schedule_work
+EXPORT_SYMBOL vmlinux 0xc68aedb2	km_policy_notify
+EXPORT_SYMBOL vmlinux 0xc6e0e167	clocksource_change_rating
+EXPORT_SYMBOL vmlinux 0xc6e36e5b	pagevec_lookup_tag
+EXPORT_SYMBOL vmlinux 0xc7208c3a	serial8250_resume_port
+EXPORT_SYMBOL vmlinux 0xc722227e	posix_acl_clone
+EXPORT_SYMBOL vmlinux 0xc7283f65	skb_copy_expand
+EXPORT_SYMBOL vmlinux 0xc7464ff0	sock_release
+EXPORT_SYMBOL vmlinux 0xc74a7e9a	xfrm_state_delete
+EXPORT_SYMBOL vmlinux 0xc74d3827	tty_register_driver
+EXPORT_SYMBOL vmlinux 0xc75aabfd	blk_rq_init
+EXPORT_SYMBOL vmlinux 0xc7602240	security_task_getsecid
+EXPORT_SYMBOL vmlinux 0xc7621621	register_filesystem
+EXPORT_SYMBOL vmlinux 0xc79bcd36	dm_vcalloc
+EXPORT_SYMBOL vmlinux 0xc7a4fbed	rtnl_lock
+EXPORT_SYMBOL vmlinux 0xc7d5be22	snd_ac97_suspend
+EXPORT_SYMBOL vmlinux 0xc7dc07b7	snd_timer_open
+EXPORT_SYMBOL vmlinux 0xc7e733e6	snd_mixer_oss_notify_callback
+EXPORT_SYMBOL vmlinux 0xc7ec6c27	strspn
+EXPORT_SYMBOL vmlinux 0xc7eee87e	get_mem_type
+EXPORT_SYMBOL vmlinux 0xc7f8874b	seq_escape
+EXPORT_SYMBOL vmlinux 0xc80262e4	scsi_scan_target
+EXPORT_SYMBOL vmlinux 0xc80de694	down_write_trylock
+EXPORT_SYMBOL vmlinux 0xc8197711	page_symlink
+EXPORT_SYMBOL vmlinux 0xc86baa7c	corgibl_limit_intensity
+EXPORT_SYMBOL vmlinux 0xc872f727	kset_register
+EXPORT_SYMBOL vmlinux 0xc88cadca	sock_no_bind
+EXPORT_SYMBOL vmlinux 0xc896407d	nf_getsockopt
+EXPORT_SYMBOL vmlinux 0xc8b57c27	autoremove_wake_function
+EXPORT_SYMBOL vmlinux 0xc8daf51f	mpage_readpage
+EXPORT_SYMBOL vmlinux 0xc915d683	lookup_one_len
+EXPORT_SYMBOL vmlinux 0xc9242666	mod_timer
+EXPORT_SYMBOL vmlinux 0xc92a856d	tty_hangup
+EXPORT_SYMBOL vmlinux 0xc9308812	lock_rename
+EXPORT_SYMBOL vmlinux 0xc9491e45	con_copy_unimap
+EXPORT_SYMBOL vmlinux 0xc9597ff4	snd_pcm_hw_refine
+EXPORT_SYMBOL vmlinux 0xc9752824	snd_jack_report
+EXPORT_SYMBOL vmlinux 0xc97e0c66	filemap_write_and_wait_range
+EXPORT_SYMBOL vmlinux 0xc983d658	kernel_accept
+EXPORT_SYMBOL vmlinux 0xc9848606	blk_complete_request
+EXPORT_SYMBOL vmlinux 0xc998d641	icmp_err_convert
+EXPORT_SYMBOL vmlinux 0xc9c6a05e	scsi_print_command
+EXPORT_SYMBOL vmlinux 0xc9d3a0ed	skb_pull
+EXPORT_SYMBOL vmlinux 0xc9d52d62	vc_cons
+EXPORT_SYMBOL vmlinux 0xc9e4a1e3	__put_cred
+EXPORT_SYMBOL vmlinux 0xc9ee305c	tty_unthrottle
+EXPORT_SYMBOL vmlinux 0xc9f6e479	w1_ds2760_recall_eeprom
+EXPORT_SYMBOL vmlinux 0xc9f9cbcc	sk_free
+EXPORT_SYMBOL vmlinux 0xca1233fa	bio_add_pc_page
+EXPORT_SYMBOL vmlinux 0xca24dc42	bh_uptodate_or_lock
+EXPORT_SYMBOL vmlinux 0xca259664	qdisc_watchdog_cancel
+EXPORT_SYMBOL vmlinux 0xca4daf7e	blk_queue_start_tag
+EXPORT_SYMBOL vmlinux 0xca5dbc50	scsi_print_sense_hdr
+EXPORT_SYMBOL vmlinux 0xca672dbc	blk_unplug
+EXPORT_SYMBOL vmlinux 0xca700a8b	napi_skb_finish
+EXPORT_SYMBOL vmlinux 0xca7deebc	nf_ip6_checksum
+EXPORT_SYMBOL vmlinux 0xcada8f98	skb_free_datagram
+EXPORT_SYMBOL vmlinux 0xcaee31d6	sock_alloc_send_pskb
+EXPORT_SYMBOL vmlinux 0xcb1f7667	vm_insert_pfn
+EXPORT_SYMBOL vmlinux 0xcb20e4dc	__ip_select_ident
+EXPORT_SYMBOL vmlinux 0xcb2a423d	security_inode_init_security
+EXPORT_SYMBOL vmlinux 0xcb2c1d6d	mvEthPhyRegRead
+EXPORT_SYMBOL vmlinux 0xcb51246e	tcp_initialize_rcv_mss
+EXPORT_SYMBOL vmlinux 0xcb6beb40	hweight32
+EXPORT_SYMBOL vmlinux 0xcb6d5488	sock_recvmsg
+EXPORT_SYMBOL vmlinux 0xcb7131fb	fb_get_options
+EXPORT_SYMBOL vmlinux 0xcb87b9eb	udp_proc_register
+EXPORT_SYMBOL vmlinux 0xcb9b730e	generic_mii_ioctl
+EXPORT_SYMBOL vmlinux 0xcbc29f4e	gen_new_estimator
+EXPORT_SYMBOL vmlinux 0xcbc4a941	__skb_warn_lro_forwarding
+EXPORT_SYMBOL vmlinux 0xcbcd77e7	netpoll_parse_options
+EXPORT_SYMBOL vmlinux 0xcbea0dc3	filemap_write_and_wait
+EXPORT_SYMBOL vmlinux 0xcbeb96c8	simple_fsync
+EXPORT_SYMBOL vmlinux 0xcc060dd7	timecompare_transform
+EXPORT_SYMBOL vmlinux 0xcc0b6268	snd_timer_global_new
+EXPORT_SYMBOL vmlinux 0xcc1b3e00	snd_pcm_limit_hw_rates
+EXPORT_SYMBOL vmlinux 0xcc248d26	serial8250_suspend_port
+EXPORT_SYMBOL vmlinux 0xcc2b61d7	fbcon_set_bitops
+EXPORT_SYMBOL vmlinux 0xcc36f32e	fb_unregister_client
+EXPORT_SYMBOL vmlinux 0xcc5005fe	msleep_interruptible
+EXPORT_SYMBOL vmlinux 0xcc53be6b	vfs_getattr
+EXPORT_SYMBOL vmlinux 0xcc56b449	phy_driver_unregister
+EXPORT_SYMBOL vmlinux 0xcc577606	unregister_con_driver
+EXPORT_SYMBOL vmlinux 0xcc7fa952	local_bh_enable_ip
+EXPORT_SYMBOL vmlinux 0xcc8bb261	vlan_gro_frags
+EXPORT_SYMBOL vmlinux 0xcca2bafe	tty_kref_put
+EXPORT_SYMBOL vmlinux 0xcccca482	_test_and_clear_bit_le
+EXPORT_SYMBOL vmlinux 0xccfccc3e	register_console
+EXPORT_SYMBOL vmlinux 0xcd083b10	unregister_sound_dsp
+EXPORT_SYMBOL vmlinux 0xcd20083a	snd_pcm_new
+EXPORT_SYMBOL vmlinux 0xcd53865b	find_get_page
+EXPORT_SYMBOL vmlinux 0xcd63c845	__aeabi_lasr
+EXPORT_SYMBOL vmlinux 0xcd74d364	nf_log_bind_pf
+EXPORT_SYMBOL vmlinux 0xcda5b2e9	generic_listxattr
+EXPORT_SYMBOL vmlinux 0xcdb199e9	__brelse
+EXPORT_SYMBOL vmlinux 0xcdb65012	call_usermodehelper_pipe
+EXPORT_SYMBOL vmlinux 0xcdd740fd	vfs_write
+EXPORT_SYMBOL vmlinux 0xcde0a954	scsi_prep_state_check
+EXPORT_SYMBOL vmlinux 0xcdee5e8e	seq_open_private
+EXPORT_SYMBOL vmlinux 0xcdfe3056	blk_queue_merge_bvec
+EXPORT_SYMBOL vmlinux 0xce19bac5	register_inet6addr_notifier
+EXPORT_SYMBOL vmlinux 0xce2dd867	bd_claim
+EXPORT_SYMBOL vmlinux 0xce2e0579	snd_dma_free_pages
+EXPORT_SYMBOL vmlinux 0xce2e4788	kmem_cache_shrink
+EXPORT_SYMBOL vmlinux 0xce36ded6	sysctl_tcp_mem
+EXPORT_SYMBOL vmlinux 0xce3af977	ndisc_send_skb
+EXPORT_SYMBOL vmlinux 0xce3ca308	copy_from_user_toio
+EXPORT_SYMBOL vmlinux 0xce5601e9	snd_card_set_id
+EXPORT_SYMBOL vmlinux 0xce5ac24f	zlib_inflate_workspacesize
+EXPORT_SYMBOL vmlinux 0xce9520f4	misc_register
+EXPORT_SYMBOL vmlinux 0xce9c8888	wait_on_sync_kiocb
+EXPORT_SYMBOL vmlinux 0xcec49571	vga_client_register
+EXPORT_SYMBOL vmlinux 0xcee6bed4	__set_page_dirty_nobuffers
+EXPORT_SYMBOL vmlinux 0xcef37537	crypto_kdone
+EXPORT_SYMBOL vmlinux 0xcef3fe67	pci_claim_resource
+EXPORT_SYMBOL vmlinux 0xcefcd99a	serial8250_unregister_port
+EXPORT_SYMBOL vmlinux 0xcf04379c	blk_recount_segments
+EXPORT_SYMBOL vmlinux 0xcf2dea1c	uart_match_port
+EXPORT_SYMBOL vmlinux 0xcf2ff60d	devm_iounmap
+EXPORT_SYMBOL vmlinux 0xcf3ab7df	uart_unregister_driver
+EXPORT_SYMBOL vmlinux 0xcf6a2b6a	xfrm_input
+EXPORT_SYMBOL vmlinux 0xcf84c0e0	i2c_master_send
+EXPORT_SYMBOL vmlinux 0xcf8e3350	d_path
+EXPORT_SYMBOL vmlinux 0xcfac0a27	skb_dequeue_tail
+EXPORT_SYMBOL vmlinux 0xcfac796e	skb_queue_head
+EXPORT_SYMBOL vmlinux 0xcfb9006e	jiffies_to_timeval
+EXPORT_SYMBOL vmlinux 0xcfe5ed56	uart_register_driver
+EXPORT_SYMBOL vmlinux 0xcff53400	kref_put
+EXPORT_SYMBOL vmlinux 0xcff79668	security_file_permission
+EXPORT_SYMBOL vmlinux 0xcff8540b	dev_get_by_name
+EXPORT_SYMBOL vmlinux 0xd0181f4f	__bitmap_xor
+EXPORT_SYMBOL vmlinux 0xd03a4950	dev_get_by_flags
+EXPORT_SYMBOL vmlinux 0xd04e731e	per_cpu__kstat
+EXPORT_SYMBOL vmlinux 0xd051a9e6	dquot_scan_active
+EXPORT_SYMBOL vmlinux 0xd0b9b8b8	snd_interval_list
+EXPORT_SYMBOL vmlinux 0xd0bace9d	dev_mc_unsync
+EXPORT_SYMBOL vmlinux 0xd0d5bad9	register_sound_midi
+EXPORT_SYMBOL vmlinux 0xd0ee38b8	schedule_timeout_uninterruptible
+EXPORT_SYMBOL vmlinux 0xd1157735	release_and_free_resource
+EXPORT_SYMBOL vmlinux 0xd1159dac	skb_copy_and_csum_bits
+EXPORT_SYMBOL vmlinux 0xd11d2319	send_sig_info
+EXPORT_SYMBOL vmlinux 0xd13ef9d3	snd_pcm_lib_read
+EXPORT_SYMBOL vmlinux 0xd14aee55	cont_write_begin
+EXPORT_SYMBOL vmlinux 0xd160754d	km_state_expired
+EXPORT_SYMBOL vmlinux 0xd16b5b75	inode_newsize_ok
+EXPORT_SYMBOL vmlinux 0xd171e62d	fifo_create_dflt
+EXPORT_SYMBOL vmlinux 0xd1fb24d1	sysctl_ms_jiffies
+EXPORT_SYMBOL vmlinux 0xd251d7b0	security_socket_getpeersec_dgram
+EXPORT_SYMBOL vmlinux 0xd2532bb7	scsi_init_io
+EXPORT_SYMBOL vmlinux 0xd2555f19	jiffies_64_to_clock_t
+EXPORT_SYMBOL vmlinux 0xd25d4f74	console_blank_hook
+EXPORT_SYMBOL vmlinux 0xd27dd8ee	blk_alloc_queue
+EXPORT_SYMBOL vmlinux 0xd2965f6f	kthread_should_stop
+EXPORT_SYMBOL vmlinux 0xd2a222a6	nla_append
+EXPORT_SYMBOL vmlinux 0xd2a68761	proc_dointvec_ms_jiffies
+EXPORT_SYMBOL vmlinux 0xd2b5a93b	clear_page_dirty_for_io
+EXPORT_SYMBOL vmlinux 0xd2da7f10	lro_vlan_hwaccel_receive_frags
+EXPORT_SYMBOL vmlinux 0xd30a3619	simple_statfs
+EXPORT_SYMBOL vmlinux 0xd31c8875	scsi_bios_ptable
+EXPORT_SYMBOL vmlinux 0xd32e52c7	posix_acl_chmod_masq
+EXPORT_SYMBOL vmlinux 0xd3314f9a	pipe_unlock
+EXPORT_SYMBOL vmlinux 0xd3427f73	mempool_create_node
+EXPORT_SYMBOL vmlinux 0xd35ce19a	backlight_device_unregister
+EXPORT_SYMBOL vmlinux 0xd3859ee8	snd_unregister_device
+EXPORT_SYMBOL vmlinux 0xd3babc6b	mvCesaReadyGet
+EXPORT_SYMBOL vmlinux 0xd3dbfbc4	_find_first_zero_bit_le
+EXPORT_SYMBOL vmlinux 0xd418e1c0	adjust_resource
+EXPORT_SYMBOL vmlinux 0xd443fc7c	__locks_copy_lock
+EXPORT_SYMBOL vmlinux 0xd45a95ab	tcp_sendpage
+EXPORT_SYMBOL vmlinux 0xd45c563c	register_framebuffer
+EXPORT_SYMBOL vmlinux 0xd487536c	uart_suspend_port
+EXPORT_SYMBOL vmlinux 0xd487af2b	dma_async_device_unregister
+EXPORT_SYMBOL vmlinux 0xd4a80f59	grab_cache_page_write_begin
+EXPORT_SYMBOL vmlinux 0xd4d9c609	pci_setup_cardbus
+EXPORT_SYMBOL vmlinux 0xd4dcef12	end_buffer_read_sync
+EXPORT_SYMBOL vmlinux 0xd4e3b1af	add_to_page_cache_locked
+EXPORT_SYMBOL vmlinux 0xd4f57cbe	ip_route_input
+EXPORT_SYMBOL vmlinux 0xd4fe6089	xfrm_bundle_ok
+EXPORT_SYMBOL vmlinux 0xd5263820	mb_cache_destroy
+EXPORT_SYMBOL vmlinux 0xd546726d	snd_card_free
+EXPORT_SYMBOL vmlinux 0xd55abfbf	module_refcount
+EXPORT_SYMBOL vmlinux 0xd5688a7a	radix_tree_insert
+EXPORT_SYMBOL vmlinux 0xd5994695	genphy_resume
+EXPORT_SYMBOL vmlinux 0xd5a6e632	put_io_context
+EXPORT_SYMBOL vmlinux 0xd5bc11e3	elv_queue_empty
+EXPORT_SYMBOL vmlinux 0xd5f352e4	generic_delete_inode
+EXPORT_SYMBOL vmlinux 0xd5fea490	mmc_free_host
+EXPORT_SYMBOL vmlinux 0xd60b82b9	scsi_device_quiesce
+EXPORT_SYMBOL vmlinux 0xd627480b	strncat
+EXPORT_SYMBOL vmlinux 0xd62c833f	schedule_timeout
+EXPORT_SYMBOL vmlinux 0xd63dbaba	pci_bus_add_devices
+EXPORT_SYMBOL vmlinux 0xd640cfd9	inet_add_protocol
+EXPORT_SYMBOL vmlinux 0xd662e107	blk_put_request
+EXPORT_SYMBOL vmlinux 0xd669bacd	qdisc_warn_nonwc
+EXPORT_SYMBOL vmlinux 0xd66acb7e	nla_put
+EXPORT_SYMBOL vmlinux 0xd66c6228	down_read_trylock
+EXPORT_SYMBOL vmlinux 0xd68408ea	dev_get_by_index
+EXPORT_SYMBOL vmlinux 0xd6868ffb	crypto_unblock
+EXPORT_SYMBOL vmlinux 0xd693607c	input_free_device
+EXPORT_SYMBOL vmlinux 0xd6a78d08	smp_call_function_single
+EXPORT_SYMBOL vmlinux 0xd6ab97ce	do_truncate
+EXPORT_SYMBOL vmlinux 0xd6b53b7c	phy_attach
+EXPORT_SYMBOL vmlinux 0xd6cd2970	vm_map_ram
+EXPORT_SYMBOL vmlinux 0xd6dac2e0	posix_acl_permission
+EXPORT_SYMBOL vmlinux 0xd6e6f132	kmap_atomic
+EXPORT_SYMBOL vmlinux 0xd6ee688f	vmalloc
+EXPORT_SYMBOL vmlinux 0xd7194481	pcim_iounmap_regions
+EXPORT_SYMBOL vmlinux 0xd7210ae6	slow_work_cancel
+EXPORT_SYMBOL vmlinux 0xd7232b15	pci_iounmap
+EXPORT_SYMBOL vmlinux 0xd7504279	redirty_page_for_writepage
+EXPORT_SYMBOL vmlinux 0xd755052c	dev_alloc_skb
+EXPORT_SYMBOL vmlinux 0xd75cd74a	mark_info_dirty
+EXPORT_SYMBOL vmlinux 0xd76308f8	end_buffer_write_sync
+EXPORT_SYMBOL vmlinux 0xd7739dfe	page_symlink_inode_operations
+EXPORT_SYMBOL vmlinux 0xd77a5aa5	__bitmap_and
+EXPORT_SYMBOL vmlinux 0xd78ccf8b	neigh_seq_next
+EXPORT_SYMBOL vmlinux 0xd78e5ab6	inet_csk_delete_keepalive_timer
+EXPORT_SYMBOL vmlinux 0xd79b5a02	allow_signal
+EXPORT_SYMBOL vmlinux 0xd7b69fae	idr_find
+EXPORT_SYMBOL vmlinux 0xd7edbdc7	search_binary_handler
+EXPORT_SYMBOL vmlinux 0xd806c61d	skb_put
+EXPORT_SYMBOL vmlinux 0xd8282ff0	posix_acl_equiv_mode
+EXPORT_SYMBOL vmlinux 0xd82d9fe8	km_query
+EXPORT_SYMBOL vmlinux 0xd83791bc	nf_conntrack_destroy
+EXPORT_SYMBOL vmlinux 0xd8729853	pci_bus_write_config_dword
+EXPORT_SYMBOL vmlinux 0xd8a2ab95	in_egroup_p
+EXPORT_SYMBOL vmlinux 0xd8b5265e	bio_alloc
+EXPORT_SYMBOL vmlinux 0xd8b6c97b	phy_connect
+EXPORT_SYMBOL vmlinux 0xd8b765ad	crypto_done
+EXPORT_SYMBOL vmlinux 0xd8c840d7	inet_unregister_protosw
+EXPORT_SYMBOL vmlinux 0xd8cdd05e	user_revoke
+EXPORT_SYMBOL vmlinux 0xd8e484f0	register_chrdev_region
+EXPORT_SYMBOL vmlinux 0xd8f87269	I_BDEV
+EXPORT_SYMBOL vmlinux 0xd90a8682	input_register_handler
+EXPORT_SYMBOL vmlinux 0xd936c11f	ipv6_chk_addr
+EXPORT_SYMBOL vmlinux 0xd963a74a	flush_delayed_work
+EXPORT_SYMBOL vmlinux 0xd985dc99	mempool_free_pages
+EXPORT_SYMBOL vmlinux 0xd9ce8f0c	strnlen
+EXPORT_SYMBOL vmlinux 0xd9d53633	bdi_register_dev
+EXPORT_SYMBOL vmlinux 0xd9fa4ef0	__pxa2xx_pcm_hw_free
+EXPORT_SYMBOL vmlinux 0xd9fd6304	mii_ethtool_sset
+EXPORT_SYMBOL vmlinux 0xda1a7335	kasprintf
+EXPORT_SYMBOL vmlinux 0xda1fc224	cpu_cache
+EXPORT_SYMBOL vmlinux 0xda3cb8b1	tcf_hash_destroy
+EXPORT_SYMBOL vmlinux 0xda473a69	dev_remove_pack
+EXPORT_SYMBOL vmlinux 0xda5ea696	_test_and_set_bit_le
+EXPORT_SYMBOL vmlinux 0xda611919	tcf_em_unregister
+EXPORT_SYMBOL vmlinux 0xda77494a	snd_pcm_hw_rule_add
+EXPORT_SYMBOL vmlinux 0xda7ca6cb	fb_mode_is_equal
+EXPORT_SYMBOL vmlinux 0xda8af7ad	fb_find_nearest_mode
+EXPORT_SYMBOL vmlinux 0xda8b5096	xfrm_cfg_mutex
+EXPORT_SYMBOL vmlinux 0xdaa57ec3	totalhigh_pages
+EXPORT_SYMBOL vmlinux 0xdabe94fc	mnt_unpin
+EXPORT_SYMBOL vmlinux 0xdad66470	__f_setown
+EXPORT_SYMBOL vmlinux 0xdb046b60	mvCesaSessionOpen
+EXPORT_SYMBOL vmlinux 0xdb052700	bdi_set_max_ratio
+EXPORT_SYMBOL vmlinux 0xdb2ba74a	dm_table_get_md
+EXPORT_SYMBOL vmlinux 0xdb373bd3	ip_getsockopt
+EXPORT_SYMBOL vmlinux 0xdb4c88b4	groups_alloc
+EXPORT_SYMBOL vmlinux 0xdb4fd55d	dquot_alloc_space
+EXPORT_SYMBOL vmlinux 0xdb509500	jbd2_log_start_commit
+EXPORT_SYMBOL vmlinux 0xdb520ec2	dev_set_allmulti
+EXPORT_SYMBOL vmlinux 0xdb5b069a	scsi_allocate_command
+EXPORT_SYMBOL vmlinux 0xdb5b5ddf	neigh_resolve_output
+EXPORT_SYMBOL vmlinux 0xdb5ca792	pci_write_vpd
+EXPORT_SYMBOL vmlinux 0xdb864d65	iov_iter_single_seg_count
+EXPORT_SYMBOL vmlinux 0xdb8b2b92	snd_power_wait
+EXPORT_SYMBOL vmlinux 0xdb908dcc	skb_checksum
+EXPORT_SYMBOL vmlinux 0xdbcd416e	sysctl_ip_nonlocal_bind
+EXPORT_SYMBOL vmlinux 0xdbcef37e	dquot_alloc
+EXPORT_SYMBOL vmlinux 0xdbe0413e	sk_stop_timer
+EXPORT_SYMBOL vmlinux 0xdbe96835	bio_free
+EXPORT_SYMBOL vmlinux 0xdc047fc4	scsi_dev_info_list_add_keyed
+EXPORT_SYMBOL vmlinux 0xdc053205	udp_memory_allocated
+EXPORT_SYMBOL vmlinux 0xdc0f6e20	ethtool_op_get_flags
+EXPORT_SYMBOL vmlinux 0xdc14eda7	pci_pci_problems
+EXPORT_SYMBOL vmlinux 0xdc2adb35	add_taint
+EXPORT_SYMBOL vmlinux 0xdc3d15aa	neigh_table_init
+EXPORT_SYMBOL vmlinux 0xdc3ff1b0	path_lookup
+EXPORT_SYMBOL vmlinux 0xdc43200f	vfs_quota_on_mount
+EXPORT_SYMBOL vmlinux 0xdc43a9c8	daemonize
+EXPORT_SYMBOL vmlinux 0xdc50ad89	linkwatch_fire_event
+EXPORT_SYMBOL vmlinux 0xdc50c939	neigh_update
+EXPORT_SYMBOL vmlinux 0xdc53ee1b	tcp_tso_segment
+EXPORT_SYMBOL vmlinux 0xdc738a44	pci_target_state
+EXPORT_SYMBOL vmlinux 0xdc74cc24	kmem_cache_alloc
+EXPORT_SYMBOL vmlinux 0xdc7ccf0b	kernel_sendpage
+EXPORT_SYMBOL vmlinux 0xdca0e950	genl_register_family
+EXPORT_SYMBOL vmlinux 0xdcb0349b	sys_close
+EXPORT_SYMBOL vmlinux 0xdcb88db9	follow_down
+EXPORT_SYMBOL vmlinux 0xdcd9c860	udp_proc_unregister
+EXPORT_SYMBOL vmlinux 0xdce4975d	xfrm_state_add
+EXPORT_SYMBOL vmlinux 0xdcfa18f3	mdiobus_alloc
+EXPORT_SYMBOL vmlinux 0xdd0a2ba2	strlcat
+EXPORT_SYMBOL vmlinux 0xdd27fa87	memchr
+EXPORT_SYMBOL vmlinux 0xdd5349e1	ethtool_op_get_tso
+EXPORT_SYMBOL vmlinux 0xdd557ccb	dentry_unhash
+EXPORT_SYMBOL vmlinux 0xdd56b1d9	devm_ioport_map
+EXPORT_SYMBOL vmlinux 0xdd6bfccd	radix_tree_tag_set
+EXPORT_SYMBOL vmlinux 0xdd7d9c25	sk_reset_timer
+EXPORT_SYMBOL vmlinux 0xdd88b733	__insert_inode_hash
+EXPORT_SYMBOL vmlinux 0xdd8b7cbb	dcache_readdir
+EXPORT_SYMBOL vmlinux 0xdd8c206b	blk_queue_max_hw_segments
+EXPORT_SYMBOL vmlinux 0xddac1a27	do_splice_from
+EXPORT_SYMBOL vmlinux 0xddaf968e	scsi_get_command
+EXPORT_SYMBOL vmlinux 0xddb38418	uart_get_baud_rate
+EXPORT_SYMBOL vmlinux 0xddc4460c	skb_dequeue
+EXPORT_SYMBOL vmlinux 0xdde16b25	have_submounts
+EXPORT_SYMBOL vmlinux 0xdde740e3	file_fsync
+EXPORT_SYMBOL vmlinux 0xddef0337	jbd2_journal_forget
+EXPORT_SYMBOL vmlinux 0xde09a616	sock_wfree
+EXPORT_SYMBOL vmlinux 0xde0a2261	bio_pair_release
+EXPORT_SYMBOL vmlinux 0xde31b902	blk_limits_io_opt
+EXPORT_SYMBOL vmlinux 0xde3c68a6	cpu_online_mask
+EXPORT_SYMBOL vmlinux 0xde75b689	set_irq_type
+EXPORT_SYMBOL vmlinux 0xde7be600	input_allocate_polled_device
+EXPORT_SYMBOL vmlinux 0xde9360ba	totalram_pages
+EXPORT_SYMBOL vmlinux 0xdf16efc2	vfsmount_lock
+EXPORT_SYMBOL vmlinux 0xdf3329b8	apm_queue_event
+EXPORT_SYMBOL vmlinux 0xdf3f491f	snd_ctl_register_ioctl
+EXPORT_SYMBOL vmlinux 0xdf4c8767	ns_to_timeval
+EXPORT_SYMBOL vmlinux 0xdf60cc27	__print_symbol
+EXPORT_SYMBOL vmlinux 0xdf6820fc	dev_unicast_delete
+EXPORT_SYMBOL vmlinux 0xdf8bf08d	input_grab_device
+EXPORT_SYMBOL vmlinux 0xdf929370	fs_overflowgid
+EXPORT_SYMBOL vmlinux 0xdf9a0c15	pcim_iomap_table
+EXPORT_SYMBOL vmlinux 0xdf9ffa3f	elv_abort_queue
+EXPORT_SYMBOL vmlinux 0xdfac4058	phy_start_interrupts
+EXPORT_SYMBOL vmlinux 0xdfb01a80	cpu_v7_dcache_clean_area
+EXPORT_SYMBOL vmlinux 0xdfb30c4f	__alloc_skb
+EXPORT_SYMBOL vmlinux 0xdff99c1a	inode_get_bytes
+EXPORT_SYMBOL vmlinux 0xe02372be	tcp_enter_memory_pressure
+EXPORT_SYMBOL vmlinux 0xe04ce095	truncate_inode_pages_range
+EXPORT_SYMBOL vmlinux 0xe06518aa	unregister_binfmt
+EXPORT_SYMBOL vmlinux 0xe075d6eb	iter_div_u64_rem
+EXPORT_SYMBOL vmlinux 0xe0878bfe	__krealloc
+EXPORT_SYMBOL vmlinux 0xe096c272	sock_i_uid
+EXPORT_SYMBOL vmlinux 0xe0b13336	argv_free
+EXPORT_SYMBOL vmlinux 0xe0bc24a1	param_set_ushort
+EXPORT_SYMBOL vmlinux 0xe0c00aa8	scsi_device_resume
+EXPORT_SYMBOL vmlinux 0xe0d53cf1	simple_fill_super
+EXPORT_SYMBOL vmlinux 0xe0da9f3f	dev_set_drvdata
+EXPORT_SYMBOL vmlinux 0xe0e3cbf1	gnet_stats_copy_queue
+EXPORT_SYMBOL vmlinux 0xe0e42933	generic_block_bmap
+EXPORT_SYMBOL vmlinux 0xe113bbbc	csum_partial
+EXPORT_SYMBOL vmlinux 0xe11c9343	__module_put_and_exit
+EXPORT_SYMBOL vmlinux 0xe128c078	generic_file_open
+EXPORT_SYMBOL vmlinux 0xe147dc8e	kobject_put
+EXPORT_SYMBOL vmlinux 0xe1761617	security_inet_conn_request
+EXPORT_SYMBOL vmlinux 0xe1761bd4	simple_pin_fs
+EXPORT_SYMBOL vmlinux 0xe186edac	dm_get_device
+EXPORT_SYMBOL vmlinux 0xe18e1967	blk_queue_segment_boundary
+EXPORT_SYMBOL vmlinux 0xe1a81c3a	icmpv6msg_statistics
+EXPORT_SYMBOL vmlinux 0xe1a84c3f	__set_page_dirty_buffers
+EXPORT_SYMBOL vmlinux 0xe1b79358	xfrm_policy_unregister_afinfo
+EXPORT_SYMBOL vmlinux 0xe1e0c90b	generic_splice_sendpage
+EXPORT_SYMBOL vmlinux 0xe2048b13	inet_stream_ops
+EXPORT_SYMBOL vmlinux 0xe20c9214	snd_iprintf
+EXPORT_SYMBOL vmlinux 0xe2277465	alloc_file
+EXPORT_SYMBOL vmlinux 0xe23ae481	blk_iopoll_complete
+EXPORT_SYMBOL vmlinux 0xe24d3a97	jiffies_64
+EXPORT_SYMBOL vmlinux 0xe2538a2a	neigh_changeaddr
+EXPORT_SYMBOL vmlinux 0xe281d64d	wireless_send_event
+EXPORT_SYMBOL vmlinux 0xe291c16b	kmap
+EXPORT_SYMBOL vmlinux 0xe2a33584	unlock_rename
+EXPORT_SYMBOL vmlinux 0xe2d43faa	mmc_alloc_host
+EXPORT_SYMBOL vmlinux 0xe2d5255a	strcmp
+EXPORT_SYMBOL vmlinux 0xe2d8361c	init_special_inode
+EXPORT_SYMBOL vmlinux 0xe2e1d933	jbd2_journal_init_jbd_inode
+EXPORT_SYMBOL vmlinux 0xe2e8065e	memdup_user
+EXPORT_SYMBOL vmlinux 0xe2fae716	kmemdup
+EXPORT_SYMBOL vmlinux 0xe3365f43	jbd2_journal_file_inode
+EXPORT_SYMBOL vmlinux 0xe358080f	put_page
+EXPORT_SYMBOL vmlinux 0xe38f67d7	mvCtrlModelGet
+EXPORT_SYMBOL vmlinux 0xe3b708ff	ip_route_me_harder
+EXPORT_SYMBOL vmlinux 0xe3f08c1d	tcp_child_process
+EXPORT_SYMBOL vmlinux 0xe446c44c	i2c_get_adapter
+EXPORT_SYMBOL vmlinux 0xe4479cae	flush_dcache_page
+EXPORT_SYMBOL vmlinux 0xe452f2dc	journal_unlock_updates
+EXPORT_SYMBOL vmlinux 0xe49b1da6	invalidate_inodes
+EXPORT_SYMBOL vmlinux 0xe4a97c71	__down_write_trylock
+EXPORT_SYMBOL vmlinux 0xe4b896bb	fasync_helper
+EXPORT_SYMBOL vmlinux 0xe4c80097	cacheid
+EXPORT_SYMBOL vmlinux 0xe4dd4a39	sysctl_data
+EXPORT_SYMBOL vmlinux 0xe4f1695e	cookie_check_timestamp
+EXPORT_SYMBOL vmlinux 0xe4f9c9ae	prepare_creds
+EXPORT_SYMBOL vmlinux 0xe4ff1cee	input_inject_event
+EXPORT_SYMBOL vmlinux 0xe523ad75	synchronize_irq
+EXPORT_SYMBOL vmlinux 0xe52dd2f7	get_unmapped_area_prot
+EXPORT_SYMBOL vmlinux 0xe5343aed	tty_port_init
+EXPORT_SYMBOL vmlinux 0xe53f2303	inode_sub_bytes
+EXPORT_SYMBOL vmlinux 0xe541c623	genl_register_ops
+EXPORT_SYMBOL vmlinux 0xe56a9336	snd_pcm_format_width
+EXPORT_SYMBOL vmlinux 0xe57878a1	in6_pton
+EXPORT_SYMBOL vmlinux 0xe5867808	dlci_ioctl_set
+EXPORT_SYMBOL vmlinux 0xe58a2fe2	bdi_init
+EXPORT_SYMBOL vmlinux 0xe5903626	rtnl_create_link
+EXPORT_SYMBOL vmlinux 0xe599bace	inet_put_port
+EXPORT_SYMBOL vmlinux 0xe5c78a99	do_blank_screen
+EXPORT_SYMBOL vmlinux 0xe5ed5467	xfrm_policy_walk_init
+EXPORT_SYMBOL vmlinux 0xe5ee8cf0	default_file_splice_read
+EXPORT_SYMBOL vmlinux 0xe5f037ba	sock_register
+EXPORT_SYMBOL vmlinux 0xe6562614	udplite_table
+EXPORT_SYMBOL vmlinux 0xe67b3b7f	del_gendisk
+EXPORT_SYMBOL vmlinux 0xe6837e00	writeback_inodes_sb
+EXPORT_SYMBOL vmlinux 0xe68f1eb7	set_blocksize
+EXPORT_SYMBOL vmlinux 0xe690b8fd	__ipv6_isatap_ifid
+EXPORT_SYMBOL vmlinux 0xe697d108	__blk_iopoll_complete
+EXPORT_SYMBOL vmlinux 0xe6b42ec7	starget_for_each_device
+EXPORT_SYMBOL vmlinux 0xe6b59580	generic_fillattr
+EXPORT_SYMBOL vmlinux 0xe6c3ebb0	__raw_writesw
+EXPORT_SYMBOL vmlinux 0xe6cb966d	read_dev_sector
+EXPORT_SYMBOL vmlinux 0xe6ebc016	key_create_or_update
+EXPORT_SYMBOL vmlinux 0xe6ed2c8b	get_phy_device
+EXPORT_SYMBOL vmlinux 0xe6edec1e	tcp4_gro_complete
+EXPORT_SYMBOL vmlinux 0xe6fbe430	can_do_mlock
+EXPORT_SYMBOL vmlinux 0xe7020657	put_tty_driver
+EXPORT_SYMBOL vmlinux 0xe707d823	__aeabi_uidiv
+EXPORT_SYMBOL vmlinux 0xe714375c	__tasklet_hi_schedule_first
+EXPORT_SYMBOL vmlinux 0xe71649b4	tty_port_lower_dtr_rts
+EXPORT_SYMBOL vmlinux 0xe767467d	remove_proc_entry
+EXPORT_SYMBOL vmlinux 0xe78c0038	__task_pid_nr_ns
+EXPORT_SYMBOL vmlinux 0xe79d4c54	nf_log_packet
+EXPORT_SYMBOL vmlinux 0xe7aafefc	mvMD5
+EXPORT_SYMBOL vmlinux 0xe7afe944	inet6_getname
+EXPORT_SYMBOL vmlinux 0xe7c5fd11	kthread_bind
+EXPORT_SYMBOL vmlinux 0xe7d2aca1	security_sk_classify_flow
+EXPORT_SYMBOL vmlinux 0xe7d4daac	seq_list_next
+EXPORT_SYMBOL vmlinux 0xe7dae90e	register_key_type
+EXPORT_SYMBOL vmlinux 0xe808537d	__register_chrdev
+EXPORT_SYMBOL vmlinux 0xe817414e	__scsi_device_lookup
+EXPORT_SYMBOL vmlinux 0xe82e0716	per_cpu__softnet_data
+EXPORT_SYMBOL vmlinux 0xe871f59f	vfs_readlink
+EXPORT_SYMBOL vmlinux 0xe8767f1c	journal_revoke
+EXPORT_SYMBOL vmlinux 0xe8992803	key_revoke
+EXPORT_SYMBOL vmlinux 0xe89e1220	vfs_llseek
+EXPORT_SYMBOL vmlinux 0xe8a8d4da	dma_async_memcpy_buf_to_pg
+EXPORT_SYMBOL vmlinux 0xe8cd902e	hweight16
+EXPORT_SYMBOL vmlinux 0xe8f44cf6	generic_file_mmap
+EXPORT_SYMBOL vmlinux 0xe90dcae0	__request_module
+EXPORT_SYMBOL vmlinux 0xe914e41e	strcpy
+EXPORT_SYMBOL vmlinux 0xe9219340	inet6_bind
+EXPORT_SYMBOL vmlinux 0xe9229d6a	tcp_ioctl
+EXPORT_SYMBOL vmlinux 0xe9304415	dma_pool_alloc
+EXPORT_SYMBOL vmlinux 0xe935b082	pxa2xx_pcm_mmap
+EXPORT_SYMBOL vmlinux 0xe9571e87	textsearch_register
+EXPORT_SYMBOL vmlinux 0xe96bb67a	snd_dma_alloc_pages
+EXPORT_SYMBOL vmlinux 0xe98a93b6	skb_copy
+EXPORT_SYMBOL vmlinux 0xe9950fbb	blk_queue_resize_tags
+EXPORT_SYMBOL vmlinux 0xe9debcf0	mvAudioPlaybackControlSet
+EXPORT_SYMBOL vmlinux 0xe9e3d18d	tcp_rcv_state_process
+EXPORT_SYMBOL vmlinux 0xe9e653b1	uart_remove_one_port
+EXPORT_SYMBOL vmlinux 0xea054b22	nla_policy_len
+EXPORT_SYMBOL vmlinux 0xea063926	try_to_release_page
+EXPORT_SYMBOL vmlinux 0xea10212a	int_to_scsilun
+EXPORT_SYMBOL vmlinux 0xea10655a	__bitmap_intersects
+EXPORT_SYMBOL vmlinux 0xea147363	printk
+EXPORT_SYMBOL vmlinux 0xea266873	jbd2_journal_init_inode
+EXPORT_SYMBOL vmlinux 0xea2d33a2	radix_tree_gang_lookup_slot
+EXPORT_SYMBOL vmlinux 0xea3c9a3a	crypto_debug
+EXPORT_SYMBOL vmlinux 0xea7987f1	key_update
+EXPORT_SYMBOL vmlinux 0xea7cb62d	find_get_pages_tag
+EXPORT_SYMBOL vmlinux 0xea858cb5	radix_tree_gang_lookup_tag
+EXPORT_SYMBOL vmlinux 0xeaa247d2	snd_pcm_suspend
+EXPORT_SYMBOL vmlinux 0xeac3141a	dma_release_declared_memory
+EXPORT_SYMBOL vmlinux 0xeae3dfd6	__const_udelay
+EXPORT_SYMBOL vmlinux 0xeb2cb4ed	outer_cache
+EXPORT_SYMBOL vmlinux 0xeb60cac8	bio_init
+EXPORT_SYMBOL vmlinux 0xeb691c5e	wireless_spy_update
+EXPORT_SYMBOL vmlinux 0xebaa563e	otg_get_transceiver
+EXPORT_SYMBOL vmlinux 0xebd273a6	strict_strtoull
+EXPORT_SYMBOL vmlinux 0xebdd693c	security_path_rmdir
+EXPORT_SYMBOL vmlinux 0xebfdcbdf	system_serial_high
+EXPORT_SYMBOL vmlinux 0xec0837b2	blk_queue_make_request
+EXPORT_SYMBOL vmlinux 0xec0dea8a	__alloc_pages_nodemask
+EXPORT_SYMBOL vmlinux 0xec44f397	inet_addr_type
+EXPORT_SYMBOL vmlinux 0xec4d9e3a	clk_get_sys
+EXPORT_SYMBOL vmlinux 0xec794ba0	__send_remote_softirq
+EXPORT_SYMBOL vmlinux 0xecd70702	nf_setsockopt
+EXPORT_SYMBOL vmlinux 0xecf1956a	neigh_sysctl_register
+EXPORT_SYMBOL vmlinux 0xed34421d	netlink_kernel_release
+EXPORT_SYMBOL vmlinux 0xed9488ba	blk_init_queue_node
+EXPORT_SYMBOL vmlinux 0xeda0d76e	gen_estimator_active
+EXPORT_SYMBOL vmlinux 0xedbaee5e	nla_strcmp
+EXPORT_SYMBOL vmlinux 0xedd82c20	secpath_dup
+EXPORT_SYMBOL vmlinux 0xedd9106d	__ashrdi3
+EXPORT_SYMBOL vmlinux 0xedff0c93	pci_find_device
+EXPORT_SYMBOL vmlinux 0xee1c240d	clocksource_register
+EXPORT_SYMBOL vmlinux 0xee2d0fc7	_local_bh_enable
+EXPORT_SYMBOL vmlinux 0xee334a21	close_bdev_exclusive
+EXPORT_SYMBOL vmlinux 0xee39f6d8	skb_copy_and_csum_dev
+EXPORT_SYMBOL vmlinux 0xee90884e	dq_data_lock
+EXPORT_SYMBOL vmlinux 0xeea9dbaf	bitmap_bitremap
+EXPORT_SYMBOL vmlinux 0xeeb974db	crypto_unregister_all
+EXPORT_SYMBOL vmlinux 0xeebb994e	free_netdev
+EXPORT_SYMBOL vmlinux 0xeec864b0	bdi_unregister
+EXPORT_SYMBOL vmlinux 0xeed47bcd	i2c_clients_command
+EXPORT_SYMBOL vmlinux 0xeede16fe	dquot_free_space
+EXPORT_SYMBOL vmlinux 0xeef1aa3f	crypto_register
+EXPORT_SYMBOL vmlinux 0xef2c0904	kthread_stop
+EXPORT_SYMBOL vmlinux 0xef2ca657	mmc_try_claim_host
+EXPORT_SYMBOL vmlinux 0xef325204	crypto_newsession
+EXPORT_SYMBOL vmlinux 0xef437daf	tcp_v4_send_check
+EXPORT_SYMBOL vmlinux 0xef4ce5cb	journal_wipe
+EXPORT_SYMBOL vmlinux 0xef6ed1ba	param_set_invbool
+EXPORT_SYMBOL vmlinux 0xef765c3e	sync_blockdev
+EXPORT_SYMBOL vmlinux 0xefcda2f4	ip_defrag
+EXPORT_SYMBOL vmlinux 0xefd09bbf	phy_detach
+EXPORT_SYMBOL vmlinux 0xefd6cf06	__aeabi_unwind_cpp_pr0
+EXPORT_SYMBOL vmlinux 0xefdd70ce	security_secid_to_secctx
+EXPORT_SYMBOL vmlinux 0xf0009fee	put_pages_list
+EXPORT_SYMBOL vmlinux 0xf00f6df9	mdiobus_free
+EXPORT_SYMBOL vmlinux 0xf0128b06	mb_cache_entry_find_first
+EXPORT_SYMBOL vmlinux 0xf024d2d5	kill_pgrp
+EXPORT_SYMBOL vmlinux 0xf02e8b46	xfrm_register_mode
+EXPORT_SYMBOL vmlinux 0xf04504a7	i2c_smbus_process_call
+EXPORT_SYMBOL vmlinux 0xf067ed9e	tcp4_gro_receive
+EXPORT_SYMBOL vmlinux 0xf0691549	tcp_disconnect
+EXPORT_SYMBOL vmlinux 0xf0ef15b4	list_sort
+EXPORT_SYMBOL vmlinux 0xf0f1246c	kvasprintf
+EXPORT_SYMBOL vmlinux 0xf0f4561d	dma_mmap_coherent
+EXPORT_SYMBOL vmlinux 0xf116f9bd	register_tcf_proto_ops
+EXPORT_SYMBOL vmlinux 0xf1416a30	vfs_get_dqblk
+EXPORT_SYMBOL vmlinux 0xf149b129	phy_sanitize_settings
+EXPORT_SYMBOL vmlinux 0xf173f4ec	empty_zero_page
+EXPORT_SYMBOL vmlinux 0xf174ed48	acquire_console_sem
+EXPORT_SYMBOL vmlinux 0xf1895167	security_path_unlink
+EXPORT_SYMBOL vmlinux 0xf195c682	fb_invert_cmaps
+EXPORT_SYMBOL vmlinux 0xf1b550cf	eth_header
+EXPORT_SYMBOL vmlinux 0xf1db1704	nla_memcpy
+EXPORT_SYMBOL vmlinux 0xf1de168c	set_binfmt
+EXPORT_SYMBOL vmlinux 0xf1deabf2	div64_u64
+EXPORT_SYMBOL vmlinux 0xf1e33390	flush_signals
+EXPORT_SYMBOL vmlinux 0xf1e98c74	avenrun
+EXPORT_SYMBOL vmlinux 0xf205913c	blk_init_tags
+EXPORT_SYMBOL vmlinux 0xf20dabd8	free_irq
+EXPORT_SYMBOL vmlinux 0xf213201e	scsi_remove_device
+EXPORT_SYMBOL vmlinux 0xf221295e	dma_async_tx_descriptor_init
+EXPORT_SYMBOL vmlinux 0xf231c670	blk_register_region
+EXPORT_SYMBOL vmlinux 0xf23d23cb	genphy_update_link
+EXPORT_SYMBOL vmlinux 0xf23d945f	phy_driver_register
+EXPORT_SYMBOL vmlinux 0xf261d1e9	__dev_remove_pack
+EXPORT_SYMBOL vmlinux 0xf27bcb45	netif_carrier_off
+EXPORT_SYMBOL vmlinux 0xf2906e08	skb_copy_datagram_iovec
+EXPORT_SYMBOL vmlinux 0xf2997713	tty_termios_hw_change
+EXPORT_SYMBOL vmlinux 0xf2a32535	input_flush_device
+EXPORT_SYMBOL vmlinux 0xf2b31583	skb_append
+EXPORT_SYMBOL vmlinux 0xf2d32b0f	i2c_smbus_read_byte_data
+EXPORT_SYMBOL vmlinux 0xf2f841fc	kill_anon_super
+EXPORT_SYMBOL vmlinux 0xf2fae0af	mvCesaDebugQueue
+EXPORT_SYMBOL vmlinux 0xf30833d7	scsi_ioctl
+EXPORT_SYMBOL vmlinux 0xf313da4e	sha_transform
+EXPORT_SYMBOL vmlinux 0xf315d703	sock_get_timestamp
+EXPORT_SYMBOL vmlinux 0xf3389bc8	kernel_recvmsg
+EXPORT_SYMBOL vmlinux 0xf338d4c3	netlink_unregister_notifier
+EXPORT_SYMBOL vmlinux 0xf346231f	seq_list_start_head
+EXPORT_SYMBOL vmlinux 0xf3797152	snd_interval_ratnum
+EXPORT_SYMBOL vmlinux 0xf3866060	current_fs_time
+EXPORT_SYMBOL vmlinux 0xf397b9aa	__tasklet_schedule
+EXPORT_SYMBOL vmlinux 0xf39bf4d9	put_cmsg
+EXPORT_SYMBOL vmlinux 0xf3aea3eb	handle_sysrq
+EXPORT_SYMBOL vmlinux 0xf3bf0bce	__bitmap_complement
+EXPORT_SYMBOL vmlinux 0xf3ea7d9b	bio_map_kern
+EXPORT_SYMBOL vmlinux 0xf3ef15b3	pci_enable_bridges
+EXPORT_SYMBOL vmlinux 0xf407182e	tcp_init_xmit_timers
+EXPORT_SYMBOL vmlinux 0xf43639f5	alloc_netdev_mq
+EXPORT_SYMBOL vmlinux 0xf4374acb	tty_set_operations
+EXPORT_SYMBOL vmlinux 0xf4376caa	simple_lookup
+EXPORT_SYMBOL vmlinux 0xf44c0826	kernel_sendmsg
+EXPORT_SYMBOL vmlinux 0xf44ee5da	__generic_block_fiemap
+EXPORT_SYMBOL vmlinux 0xf48f7177	pci_remove_bus_device
+EXPORT_SYMBOL vmlinux 0xf494f618	mmc_regulator_get_ocrmask
+EXPORT_SYMBOL vmlinux 0xf4ad9b6a	bdi_register
+EXPORT_SYMBOL vmlinux 0xf4d0dd40	mmc_resume_host
+EXPORT_SYMBOL vmlinux 0xf4f14de6	rtnl_trylock
+EXPORT_SYMBOL vmlinux 0xf4f52f93	dqstats
+EXPORT_SYMBOL vmlinux 0xf5050529	dquot_transfer
+EXPORT_SYMBOL vmlinux 0xf5062f62	invalidate_partition
+EXPORT_SYMBOL vmlinux 0xf51c639f	interruptible_sleep_on_timeout
+EXPORT_SYMBOL vmlinux 0xf53aa0ab	simple_transaction_release
+EXPORT_SYMBOL vmlinux 0xf53d4c26	qdisc_class_hash_destroy
+EXPORT_SYMBOL vmlinux 0xf5431d5a	filemap_fault
+EXPORT_SYMBOL vmlinux 0xf564412a	__aeabi_ulcmp
+EXPORT_SYMBOL vmlinux 0xf5a7d4f0	__elv_add_request
+EXPORT_SYMBOL vmlinux 0xf5c040fa	blk_queue_end_tag
+EXPORT_SYMBOL vmlinux 0xf5c05914	generic_segment_checks
+EXPORT_SYMBOL vmlinux 0xf5c9012e	timespec_trunc
+EXPORT_SYMBOL vmlinux 0xf5ccdffd	blk_stack_limits
+EXPORT_SYMBOL vmlinux 0xf5eb86ea	blk_verify_command
+EXPORT_SYMBOL vmlinux 0xf600ab4a	mmc_remove_host
+EXPORT_SYMBOL vmlinux 0xf60ebd5e	mvCesaAction
+EXPORT_SYMBOL vmlinux 0xf6148033	writeback_inodes_sb_if_idle
+EXPORT_SYMBOL vmlinux 0xf63a1dfa	scsi_target_quiesce
+EXPORT_SYMBOL vmlinux 0xf643752f	eth_mac_addr
+EXPORT_SYMBOL vmlinux 0xf6472e37	block_write_end
+EXPORT_SYMBOL vmlinux 0xf64d0349	xfrm_alloc_spi
+EXPORT_SYMBOL vmlinux 0xf654111f	xfrm4_prepare_output
+EXPORT_SYMBOL vmlinux 0xf6b301b2	snd_timer_resolution
+EXPORT_SYMBOL vmlinux 0xf6bb4729	color_table
+EXPORT_SYMBOL vmlinux 0xf6dd5c08	register_sound_special
+EXPORT_SYMBOL vmlinux 0xf6ebc03b	net_ratelimit
+EXPORT_SYMBOL vmlinux 0xf7143a18	sock_map_fd
+EXPORT_SYMBOL vmlinux 0xf72d0adb	i2c_transfer
+EXPORT_SYMBOL vmlinux 0xf7384f52	downgrade_write
+EXPORT_SYMBOL vmlinux 0xf7478d9f	snd_component_add
+EXPORT_SYMBOL vmlinux 0xf7584a9c	find_font
+EXPORT_SYMBOL vmlinux 0xf7623914	radix_tree_tag_clear
+EXPORT_SYMBOL vmlinux 0xf77fbb46	idr_remove_all
+EXPORT_SYMBOL vmlinux 0xf7802486	__aeabi_uidivmod
+EXPORT_SYMBOL vmlinux 0xf780d52e	pxa2xx_pcm_trigger
+EXPORT_SYMBOL vmlinux 0xf78cc7af	scsi_get_device_flags_keyed
+EXPORT_SYMBOL vmlinux 0xf78d04ab	netlink_register_notifier
+EXPORT_SYMBOL vmlinux 0xf7ab29c0	lcd_device_unregister
+EXPORT_SYMBOL vmlinux 0xf7f87eaa	input_unregister_handler
+EXPORT_SYMBOL vmlinux 0xf80a6516	blk_queue_alignment_offset
+EXPORT_SYMBOL vmlinux 0xf811e69d	scsi_eh_flush_done_q
+EXPORT_SYMBOL vmlinux 0xf817dc13	udp_lib_unhash
+EXPORT_SYMBOL vmlinux 0xf823b1fb	find_vma
+EXPORT_SYMBOL vmlinux 0xf82abc1d	isa_dma_bridge_buggy
+EXPORT_SYMBOL vmlinux 0xf86421b2	pxa2xx_pcm_preallocate_dma_buffer
+EXPORT_SYMBOL vmlinux 0xf88550d0	del_mtd_partitions
+EXPORT_SYMBOL vmlinux 0xf88d91b8	snd_cards
+EXPORT_SYMBOL vmlinux 0xf890fe7f	pm_idle
+EXPORT_SYMBOL vmlinux 0xf8a3f877	xfrm_state_lookup_byaddr
+EXPORT_SYMBOL vmlinux 0xf8a488b2	nobh_write_begin
+EXPORT_SYMBOL vmlinux 0xf8c9cc1e	path_get
+EXPORT_SYMBOL vmlinux 0xf8cc62d4	dquot_commit_info
+EXPORT_SYMBOL vmlinux 0xf8e35eba	__pxa2xx_pcm_close
+EXPORT_SYMBOL vmlinux 0xf8e94781	set_user_nice
+EXPORT_SYMBOL vmlinux 0xf8ed6197	genphy_config_aneg
+EXPORT_SYMBOL vmlinux 0xf8fbb4f0	__bad_xchg
+EXPORT_SYMBOL vmlinux 0xf9077d15	i2c_register_driver
+EXPORT_SYMBOL vmlinux 0xf95993a5	ip_mc_join_group
+EXPORT_SYMBOL vmlinux 0xf9a482f9	msleep
+EXPORT_SYMBOL vmlinux 0xf9b28bac	interruptible_sleep_on
+EXPORT_SYMBOL vmlinux 0xf9d2c836	dev_addr_add_multiple
+EXPORT_SYMBOL vmlinux 0xf9e52ac8	tcf_exts_destroy
+EXPORT_SYMBOL vmlinux 0xf9ff58b1	tty_write_room
+EXPORT_SYMBOL vmlinux 0xfa00ba3f	snd_ctl_remove_id
+EXPORT_SYMBOL vmlinux 0xfa4b6042	nf_afinfo
+EXPORT_SYMBOL vmlinux 0xfa743bed	__xfrm_lookup
+EXPORT_SYMBOL vmlinux 0xfa797d5d	scsi_block_when_processing_errors
+EXPORT_SYMBOL vmlinux 0xfaad21b0	journal_try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0xfabeccb9	iw_handler_get_spy
+EXPORT_SYMBOL vmlinux 0xfac68eba	arm_elf_read_implies_exec
+EXPORT_SYMBOL vmlinux 0xfadea1df	slow_work_register_user
+EXPORT_SYMBOL vmlinux 0xfae85983	chip_rev
+EXPORT_SYMBOL vmlinux 0xfaf98462	bitrev32
+EXPORT_SYMBOL vmlinux 0xfb0cf2e9	touch_all_softlockup_watchdogs
+EXPORT_SYMBOL vmlinux 0xfb26e0cc	security_inode_permission
+EXPORT_SYMBOL vmlinux 0xfb326a5d	down
+EXPORT_SYMBOL vmlinux 0xfb363ed3	mmc_add_host
+EXPORT_SYMBOL vmlinux 0xfb56443e	set_anon_super
+EXPORT_SYMBOL vmlinux 0xfb58121b	__init_waitqueue_head
+EXPORT_SYMBOL vmlinux 0xfb6af58d	recalc_sigpending
+EXPORT_SYMBOL vmlinux 0xfb6ba5bd	alloc_tty_driver
+EXPORT_SYMBOL vmlinux 0xfb7d9c45	__udivsi3
+EXPORT_SYMBOL vmlinux 0xfb83a167	scm_fp_dup
+EXPORT_SYMBOL vmlinux 0xfb9ed2bc	pid_task
+EXPORT_SYMBOL vmlinux 0xfbb7099b	tty_port_block_til_ready
+EXPORT_SYMBOL vmlinux 0xfbc73684	nf_unregister_hook
+EXPORT_SYMBOL vmlinux 0xfbc74f64	__copy_from_user
+EXPORT_SYMBOL vmlinux 0xfbcd5479	dm_io
+EXPORT_SYMBOL vmlinux 0xfbdf07c0	kmem_cache_destroy
+EXPORT_SYMBOL vmlinux 0xfbe27a1c	rb_first
+EXPORT_SYMBOL vmlinux 0xfbfbdced	arp_broken_ops
+EXPORT_SYMBOL vmlinux 0xfc02b7ad	sysctl_tcp_wmem
+EXPORT_SYMBOL vmlinux 0xfc1ccbdf	pci_find_next_bus
+EXPORT_SYMBOL vmlinux 0xfc39e32f	ioport_unmap
+EXPORT_SYMBOL vmlinux 0xfc46f789	journal_stop
+EXPORT_SYMBOL vmlinux 0xfc5034a3	read_cache_page_async
+EXPORT_SYMBOL vmlinux 0xfc533f85	schedule_work_on
+EXPORT_SYMBOL vmlinux 0xfc68b992	sk_stream_write_space
+EXPORT_SYMBOL vmlinux 0xfc79de60	dst_destroy
+EXPORT_SYMBOL vmlinux 0xfca9ba33	page_follow_link_light
+EXPORT_SYMBOL vmlinux 0xfcaa04a0	out_of_line_wait_on_bit_lock
+EXPORT_SYMBOL vmlinux 0xfcc2a43c	utf32_to_utf8
+EXPORT_SYMBOL vmlinux 0xfcda63a3	node_states
+EXPORT_SYMBOL vmlinux 0xfcec0987	enable_irq
+EXPORT_SYMBOL vmlinux 0xfcef6b53	vfs_mkdir
+EXPORT_SYMBOL vmlinux 0xfcfa03ff	fb_videomode_to_modelist
+EXPORT_SYMBOL vmlinux 0xfd183d58	sg_miter_next
+EXPORT_SYMBOL vmlinux 0xfd305341	walk_stackframe
+EXPORT_SYMBOL vmlinux 0xfd3ac401	remove_inode_hash
+EXPORT_SYMBOL vmlinux 0xfd6a0942	qdisc_destroy
+EXPORT_SYMBOL vmlinux 0xfd6bbc84	nf_ct_attach
+EXPORT_SYMBOL vmlinux 0xfd79d562	pci_request_selected_regions_exclusive
+EXPORT_SYMBOL vmlinux 0xfd8dba4c	add_wait_queue
+EXPORT_SYMBOL vmlinux 0xfd96bdc5	tcp_close
+EXPORT_SYMBOL vmlinux 0xfdab6de3	unregister_sound_midi
+EXPORT_SYMBOL vmlinux 0xfdb6eb0f	devm_free_irq
+EXPORT_SYMBOL vmlinux 0xfdcd839e	mvCesaDebugSAD
+EXPORT_SYMBOL vmlinux 0xfdfc0b3b	fiemap_fill_next_extent
+EXPORT_SYMBOL vmlinux 0xfe16775f	idr_destroy
+EXPORT_SYMBOL vmlinux 0xfe222caa	skb_free_datagram_locked
+EXPORT_SYMBOL vmlinux 0xfe271510	mutex_lock_killable
+EXPORT_SYMBOL vmlinux 0xfe3d5bf0	pci_get_subsys
+EXPORT_SYMBOL vmlinux 0xfe4fc258	netif_rx
+EXPORT_SYMBOL vmlinux 0xfe5d4bb2	sys_tz
+EXPORT_SYMBOL vmlinux 0xfe769456	unregister_netdevice_notifier
+EXPORT_SYMBOL vmlinux 0xfe83eef4	insert_inode_locked
+EXPORT_SYMBOL vmlinux 0xfea4878a	soft_cursor
+EXPORT_SYMBOL vmlinux 0xfeb9cb6d	lro_receive_skb
+EXPORT_SYMBOL vmlinux 0xfec3c2f2	bcd2bin
+EXPORT_SYMBOL vmlinux 0xfecf0511	block_commit_write
+EXPORT_SYMBOL vmlinux 0xfedd35fc	console_suspend_enabled
+EXPORT_SYMBOL vmlinux 0xfee648ee	registered_fb
+EXPORT_SYMBOL vmlinux 0xfef96e23	__scsi_print_command
+EXPORT_SYMBOL vmlinux 0xff0552d8	delayed_slow_work_enqueue
+EXPORT_SYMBOL vmlinux 0xff1e9dd8	seq_list_start
+EXPORT_SYMBOL vmlinux 0xff1fdb93	netlink_kernel_create
+EXPORT_SYMBOL vmlinux 0xff297a75	generic_file_splice_write
+EXPORT_SYMBOL vmlinux 0xff3fe6c6	sdio_reset_comm
+EXPORT_SYMBOL vmlinux 0xff67b37f	__lshrdi3
+EXPORT_SYMBOL vmlinux 0xff6878cf	fb_default_cmap
+EXPORT_SYMBOL vmlinux 0xff7d60c8	shrink_dcache_sb
+EXPORT_SYMBOL vmlinux 0xff964b25	param_set_int
+EXPORT_SYMBOL vmlinux 0xff9ca065	fb_edid_to_monspecs
+EXPORT_SYMBOL vmlinux 0xff9dbcbe	ethtool_op_get_tx_csum
+EXPORT_SYMBOL vmlinux 0xffbb36ac	bio_kmalloc
+EXPORT_SYMBOL vmlinux 0xffc000bb	__generic_file_aio_write
+EXPORT_SYMBOL vmlinux 0xffca8ed5	register_sysctl_table
+EXPORT_SYMBOL vmlinux 0xffd5723c	cfb_fillrect
+EXPORT_SYMBOL vmlinux 0xffd5a395	default_wake_function
+EXPORT_SYMBOL vmlinux 0xfff5cf7e	genphy_suspend
+EXPORT_SYMBOL vmlinux 0xfff60be4	kernel_connect
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x0cc1e40f	crypto_it_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x24aac4d9	crypto_aes_expand_key
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x3dc916b6	crypto_fl_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x40d46b21	crypto_ft_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x71dc9998	crypto_il_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0xb506fd1e	crypto_aes_set_key
+EXPORT_SYMBOL_GPL crypto/async_tx/async_memcpy 0x02f04aad	async_memcpy
+EXPORT_SYMBOL_GPL crypto/async_tx/async_pq 0x074b2d28	async_gen_syndrome
+EXPORT_SYMBOL_GPL crypto/async_tx/async_pq 0xd50aa415	async_syndrome_val
+EXPORT_SYMBOL_GPL crypto/async_tx/async_raid6_recov 0x05170458	async_raid6_datap_recov
+EXPORT_SYMBOL_GPL crypto/async_tx/async_raid6_recov 0x1291d0a8	async_raid6_2data_recov
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x4762e5c4	async_tx_quiesce
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x85b9f330	async_tx_submit
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0xbf00a091	async_trigger_callback
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0xf9db20e4	__async_tx_find_channel
+EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0x9ad3b4ca	async_xor
+EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0xea359777	async_xor_val
+EXPORT_SYMBOL_GPL crypto/cryptd 0x13ce8088	cryptd_free_ablkcipher
+EXPORT_SYMBOL_GPL crypto/cryptd 0x2b61da2d	cryptd_shash_desc
+EXPORT_SYMBOL_GPL crypto/cryptd 0x7d13df23	cryptd_alloc_ablkcipher
+EXPORT_SYMBOL_GPL crypto/cryptd 0x85bdb958	cryptd_ablkcipher_child
+EXPORT_SYMBOL_GPL crypto/cryptd 0xb06b7d7c	cryptd_ahash_child
+EXPORT_SYMBOL_GPL crypto/cryptd 0xc968b328	cryptd_alloc_ahash
+EXPORT_SYMBOL_GPL crypto/cryptd 0xe0a3f479	cryptd_free_ahash
+EXPORT_SYMBOL_GPL crypto/twofish_common 0x67c5ab89	twofish_setkey
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x14102f23	ks0108_displaystate
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x48a70518	ks0108_writedata
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x4f506333	ks0108_startline
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x6edae968	ks0108_isinited
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xbf4774db	ks0108_writecontrol
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xedde6df2	ks0108_page
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xfee8ef7b	ks0108_address
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x01fd453e	usbhid_lookup_quirk
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x4f19d7c6	usbhid_set_leds
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x6430ebf7	hiddev_hid_event
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0xdd4563ba	usbhid_submit_report
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x15e3dc10	lis3lv02d_poweron
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x43b064c5	lis3lv02d_remove_fs
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x5b8c3843	lis3lv02d_poweroff
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x6c33e494	lis3lv02d_joystick_disable
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xbf9ab432	lis3lv02d_init_device
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xd7a55832	lis3_dev
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xe6af28c8	lis3lv02d_joystick_enable
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0x2a258967	hpsb_config_rom_ip1394_remove
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0xbf5b02f1	hpsb_config_rom_ip1394_add
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0xec8d18cf	hpsb_disable_irm
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x03109f6b	wm97xx_reg_read
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x032f4628	wm97xx_config_gpio
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x0ee9323d	wm97xx_get_gpio
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x1b24299e	wm97xx_unregister_mach_ops
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x38635d3e	wm97xx_register_mach_ops
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x40767d4d	wm9713_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x6a05f9cd	wm97xx_read_aux_adc
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x6af27739	wm97xx_set_suspend_mode
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x8cdc7dd3	wm9712_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x91626089	wm9705_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xc7db1cdc	wm97xx_reg_write
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xece855a3	wm97xx_set_gpio
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x204e5510	gigaset_shutdown
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x31ac5a95	gigaset_handle_modem_response
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x35420d2b	gigaset_blockdriver
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x4432c5e2	gigaset_m10x_send_skb
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x454aa44f	gigaset_debuglevel
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x4b482222	gigaset_skb_sent
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x4e792275	gigaset_dbg_buffer
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x5af909a1	gigaset_m10x_input
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x6dd8a0f3	gigaset_freecs
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x6e26387c	gigaset_stop
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x6f5c4260	gigaset_if_receive
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x896fbc9b	gigaset_initdriver
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x9327c05f	gigaset_add_event
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xc074e11e	gigaset_freedriver
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xcebeaab3	gigaset_start
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xeeeba7ac	gigaset_initcs
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xf6dbf31a	gigaset_fill_inbuf
+EXPORT_SYMBOL_GPL drivers/md/dm-multipath 0x26f90b9c	dm_unregister_path_selector
+EXPORT_SYMBOL_GPL drivers/md/dm-multipath 0x5a425b20	dm_register_path_selector
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x082d174b	dm_rh_get_region_key
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x0a5fecad	dm_rh_region_to_sector
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x1700aefe	dm_rh_recovery_end
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x20fec95d	dm_rh_stop_recovery
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x2ab274b6	dm_rh_get_state
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x3219853a	dm_rh_start_recovery
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x3415ff2d	dm_rh_recovery_start
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x48bcdf36	dm_region_hash_destroy
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x69a67163	dm_rh_flush
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x7199a542	dm_rh_dec
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x724cbd21	dm_rh_delay
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x957426f9	dm_rh_recovery_in_flight
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x98be6a54	dm_rh_bio_to_region
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x9e6b8919	dm_region_hash_create
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xa422a819	dm_rh_inc_pending
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xb774f4bd	dm_rh_dirty_log
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xbc545f4a	dm_rh_update_states
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xd7418f1e	dm_rh_mark_nosync
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xe46c7683	dm_rh_recovery_prepare
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xf66089c5	dm_rh_region_context
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xfd9434a2	dm_rh_get_region_size
+EXPORT_SYMBOL_GPL drivers/md/md-mod 0x4b5a4a83	md_new_event
+EXPORT_SYMBOL_GPL drivers/md/md-mod 0x9744a5e2	md_allow_write
+EXPORT_SYMBOL_GPL drivers/md/md-mod 0xa3ac25b7	sync_page_io
+EXPORT_SYMBOL_GPL drivers/md/md-mod 0xf7b262ff	md_do_sync
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0x05513b71	raid6_call
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0x0b8ef590	raid6_2data_recov
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0x4a48d81c	raid6_datap_recov
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x0349c9bd	ir_codes_proteus_2309_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x0366dcdf	ir_codes_videomate_s350_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x110b053a	ir_codes_pixelview_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x124cb753	ir_codes_encore_enltv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x183fdfdd	ir_codes_gotview7135_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x19b4d61c	ir_codes_nebula_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x19cd2826	ir_codes_behold_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x1a9009d6	ir_codes_dm1105_nec_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x1c11e692	ir_input_nokey
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x1cb148f5	ir_extract_bits
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2456e513	ir_decode_pulsedistance
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2cc459b5	ir_codes_flydvb_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2d0e9a49	ir_codes_em_terratec_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3136d8ff	ir_codes_dntv_live_dvbt_pro_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x32b9033b	ir_codes_apac_viewcomp_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3909f4ad	ir_codes_terratec_cinergy_xs_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3a84be27	ir_codes_avermedia_a16d_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x4267d749	ir_codes_budget_ci_old_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x43c89ef4	ir_decode_biphase
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x4c1442c1	ir_codes_real_audio_220_32_keys_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x51ba1643	ir_codes_kworld_plus_tv_analog_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x543db4ff	ir_codes_avermedia_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x5c9cd44b	ir_input_init
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x5e95da31	ir_codes_tt_1500_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x5fbe6515	ir_codes_pinnacle_color_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x61d039d7	ir_codes_behold_columbus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6427a3fb	ir_codes_pinnacle_grey_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x64b02fed	ir_codes_avermedia_dvbt_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6606596a	ir_rc5_timer_keyup
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6809de82	ir_codes_pctv_sedna_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6d6511e7	ir_dump_samples
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x703fc738	ir_codes_avertv_303_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x7283f81d	ir_codes_purpletv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x72c2992e	ir_codes_powercolor_real_angel_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x74015da9	ir_input_keydown
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x76d71b8e	ir_codes_dntv_live_dvb_t_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x784e176d	ir_codes_asus_pc39_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x828b3ce5	ir_codes_encore_enltv_fm53_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x8acae3dd	ir_codes_pinnacle_pctv_hd_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x92d1d181	ir_codes_flyvideo_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x94651dab	ir_codes_ati_tv_wonder_hd_600_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x97c35dab	ir_codes_msi_tvanywhere_plus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x9944e2e5	ir_codes_hauppauge_new_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xa69aa6ad	ir_codes_pv951_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xa95157c5	ir_codes_cinergy_1400_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xac15f6c8	ir_codes_kaiomy_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xaff22e87	ir_codes_pixelview_new_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb01a1998	ir_codes_manli_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb0a8ef38	ir_codes_rc5_tv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb57445f7	ir_codes_eztv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb5adb754	ir_codes_cinergy_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xbd3ce6f0	ir_codes_avermedia_cardbus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xbeaccbdc	ir_codes_gadmei_rm008z_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xcba36c62	ir_codes_videomate_tv_pvr_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xd30c491f	ir_codes_norwood_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xdc23fec4	ir_codes_fusionhdtv_mce_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xdd4c0a07	ir_codes_evga_indtube_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xe1101f4d	ir_codes_avermedia_m135a_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xe4140c60	ir_codes_genius_tvgo_a11mce_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xeb9bb08f	ir_codes_npgtech_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xebf345b4	ir_codes_encore_enltv2_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xeec89db8	ir_codes_empty_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xef29c40d	ir_codes_adstech_dvb_t_pci_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf33c155d	ir_codes_msi_tvanywhere_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf3d619ec	ir_codes_iodata_bctv7e_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf4f7a4d6	ir_rc5_timer_end
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf5e15e65	ir_codes_winfast_table
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x02a00c8b	saa7146_wait_for_debi_done
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x2eedbb51	saa7146_pgtable_free
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x5a6d9685	saa7146_pgtable_alloc
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x6e108411	saa7146_pgtable_build_single
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x7ef68416	saa7146_devices_lock
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x8db03722	saa7146_vfree_destroy_pgtable
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xc30e8408	saa7146_unregister_extension
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xcf683cf2	saa7146_devices
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xd1010eef	saa7146_i2c_adapter_prepare
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xd3c11ace	saa7146_register_extension
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xe3cd9b5c	saa7146_debug
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xf1dc78af	saa7146_setgpio
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xfe9a7335	saa7146_vmalloc_build_pgtable
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x25973697	saa7146_register_device
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x93984a46	saa7146_vv_init
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xb94cd57f	saa7146_start_preview
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xd279ff1a	saa7146_set_hps_source_and_sync
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xd364c963	saa7146_vv_release
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xdb5a5532	saa7146_stop_preview
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xef2cbf2f	saa7146_unregister_device
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/mt20xx 0xb61bdd38	microtune_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/mxl5007t 0xa4bc6118	mxl5007t_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda18271 0xb5e630af	tda18271_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda827x 0xb40bdd36	tda827x_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda8290 0x69e5130c	tda829x_probe
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda8290 0xf3a8b0bd	tda829x_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda9887 0xc0f17a28	tda9887_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5761 0x9424bff5	tea5761_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5761 0xa85a7968	tea5761_autodetection
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5767 0x2d5fa49b	tea5767_autodetection
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5767 0xae6c415f	tea5767_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tuner-simple 0xa9781e38	simple_tuner_attach
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x5b68e5fa	ttpci_budget_set_video_port
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x6b5c3271	ttpci_budget_debiread
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x7948c222	budget_debug
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0xaab0a843	ttpci_budget_debiwrite
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0xb5ba454f	ttpci_budget_deinit
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0xe38c85ea	ttpci_budget_init
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0xe4afab9c	ttpci_budget_init_hooks
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0xf2b3250f	ttpci_budget_irq10_handler
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x017ea7c7	cx231xx_tuner_callback
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x03f48743	cx231xx_uninit_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x0cee18f1	cx231xx_send_usb_command
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x1d323a51	cx231xx_send_gpio_cmd
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x36f277a6	cx231xx_capture_start
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x4e10eee9	cx231xx_init_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x69cebbcf	cx231xx_init_vbi_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x6d4a98eb	cx231xx_set_mode
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x81cf91be	cx231xx_dev_init
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xb185b370	cx231xx_dev_uninit
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xb83013d8	cx231xx_set_alt_setting
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xbf38544f	cx231xx_uninit_vbi_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx88/cx88xx 0x451dc435	cx88_setup_xc3028
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x267db715	em28xx_audio_analog_set
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x3b56f77d	em28xx_isoc_dvb_max_packetsize
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x7fc8652c	em28xx_tuner_callback
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x8c6d6c01	em28xx_init_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0xa621903f	em28xx_audio_setup
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0xc1cf58f8	em28xx_uninit_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0xf98aa82c	em28xx_set_mode
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x296b0321	saa7134_ts_qops
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x54f842de	saa7134_s_std_internal
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x63d905cd	saa7134_s_ctrl_internal
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x884face0	saa7134_g_ctrl_internal
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0xb989e660	saa7134_queryctrl
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x0c6229b3	v4l2_i2c_new_subdev_cfg
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x19d574b6	v4l2_i2c_subdev_init
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xd1d8a567	v4l2_i2c_subdev_addr
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xe961d652	v4l2_i2c_new_subdev_board
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xf2a353ac	v4l2_i2c_tuner_addrs
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xf5ef842e	v4l_bound_align_image
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x0788dac9	v4l2_int_device_unregister
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x47ce36fc	v4l2_int_ioctl_0
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x4b687a59	v4l2_int_ioctl_1
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xa5228b24	v4l2_int_device_try_attach_all
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xba0b44c4	v4l2_int_device_register
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x08df7547	videobuf_querybuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x0d692e53	videobuf_alloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x11b06e0d	videobuf_next_field
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x13386f4a	videobuf_queue_cancel
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x139d0fda	videobuf_stop
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x16f28996	videobuf_mmap_free
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x22f587df	videobuf_queue_core_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x2ab610a2	__videobuf_mmap_setup
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x3501d241	videobuf_queue_to_vmalloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x37eec827	videobuf_streamon
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x3d9efe95	videobuf_read_start
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x42f70d82	videobuf_reqbufs
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x6d51866d	videobuf_waiton
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x729ce438	videobuf_poll_stream
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x810aeeb9	videobuf_read_one
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x82a172a9	videobuf_mmap_mapper
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x82b8265c	videobuf_iolock
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x88ffb7e9	videobuf_read_stop
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x89b35e83	videobuf_queue_is_busy
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x9380790f	videobuf_streamoff
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x9eef6220	videobuf_mmap_setup
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xa25a611f	videobuf_cgmbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xb4d17c21	videobuf_read_stream
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xb855cb05	videobuf_dqbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xce8d3f40	videobuf_qbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-contig 0x10fbbcd2	videobuf_dma_contig_free
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-contig 0x288eeb1d	videobuf_queue_dma_contig_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-contig 0x36cba40e	videobuf_to_dma_contig
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x0981137f	videobuf_dma_init_user
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x14f8f01e	videobuf_dma_unmap
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x31e6b42f	videobuf_sg_dma_map
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x4c86f3d7	videobuf_dma_init_overlay
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x86376a61	videobuf_to_dma
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x97a70b37	videobuf_dma_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x9c84f9fd	videobuf_vmalloc_to_sg
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xa825c75b	videobuf_sg_alloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xc9890d2b	videobuf_dma_map
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xd099fc5b	videobuf_dma_free
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xd56ac3e4	videobuf_sg_dma_unmap
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xe2681591	videobuf_dma_sync
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xe9f0ca98	videobuf_queue_sg_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xecda773d	videobuf_dma_init_kernel
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0x06cd844b	videobuf_vmalloc_free
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0xc3a075f4	videobuf_queue_vmalloc_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0xf8ef1682	videobuf_to_vmalloc
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x0ea94062	v4l2_device_unregister_subdev
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x0fbe8c7e	v4l2_device_unregister
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x3ff1b261	v4l2_device_register_subdev
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x52616501	v4l2_device_set_name
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x8cc0d3c1	v4l2_device_disconnect
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0xc2613084	v4l2_device_register
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x2e11c9d9	i2o_dma_realloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x311c8768	i2o_pool_free
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x67321413	i2o_sg_tablesize
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x6ae6c510	i2o_dma_map_single
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x820d6f70	i2o_dma_alloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xb0d76d72	i2o_dma_free
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xd9d330c8	i2o_dma_map_sg
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xfd629517	i2o_pool_alloc
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-adc 0x7f5cf02d	pcf50633_adc_sync_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-adc 0xcc33eb4f	pcf50633_adc_async_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x0f3da5c8	pcf50633_write_block
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x1d25564c	pcf50633_read_block
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x24a1f8aa	pcf50633_reg_set_bit_mask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x43fe42bc	pcf50633_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x8604fb2e	pcf50633_reg_clear_bits
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xa2540cb3	pcf50633_irq_mask_get
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xa3a86d74	pcf50633_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xcc73272b	pcf50633_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xeeaa3c7b	pcf50633_irq_mask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xefa6645c	pcf50633_irq_unmask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xf73ce148	pcf50633_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x60e30542	pcf50633_gpio_invert_get
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x93cb4d0a	pcf50633_gpio_invert_set
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0xa25ee3cd	pcf50633_gpio_power_supply_set
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0xb85dd2af	pcf50633_gpio_set
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0xe4cd6edd	pcf50633_gpio_get
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x5e93686f	sm501_find_clock
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x61882199	sm501_set_clock
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x77284d4b	sm501_modify_reg
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0xdaf85e82	sm501_misc_control
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0xfc2a608b	sm501_unit_power
+EXPORT_SYMBOL_GPL drivers/mfd/ucb1400_core 0xb924c867	ucb1400_adc_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x0d05dc53	wm8350_block_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x0d382c84	wm8350_gpio_config
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x13088706	wm8350_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x26005b8b	wm8350_reg_lock
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x3d3586a2	wm8350_block_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x3ff251c5	wm8350_mask_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x5a90708b	wm8350_read_auxadc
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x8abd70c4	wm8350_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x92499c3a	wm8350_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x95ebb167	wm8350_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x9a252ba8	wm8350_clear_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x9e6eada2	wm8350_device_init
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xd000bf86	wm8350_unmask_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xe18b6e8f	wm8350_device_exit
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xe2d0d263	wm8350_reg_unlock
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xea68a0bb	wm8350_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x4c4e16de	wm8400_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x4dadf290	wm8400_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x561584f4	wm8400_reset_codec_reg_cache
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0xa3d1663e	wm8400_block_read
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x2cf40278	cb710_set_irq_handler
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x6390c782	cb710_pci_update_config_reg
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0xdb9ce568	cb710_sg_dwiter_write_next_block
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0xddd733da	cb710_sg_dwiter_read_next_block
+EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x2df115d4	eeprom_93cx6_multiread
+EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x63d14d2f	eeprom_93cx6_read
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x52882c08	enclosure_find
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x6a01bebf	enclosure_remove_device
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x830ccdac	enclosure_unregister
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0xa5aace4c	enclosure_add_device
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0xab37b956	enclosure_component_register
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0xcee97025	enclosure_register
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0xd82e2cfd	enclosure_for_each_device
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x0490e278	cfi_cmdset_0003
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x2d8a19db	cfi_cmdset_0001
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x7bfa0a8e	cfi_cmdset_0200
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0002 0xfda51c89	cfi_cmdset_0002
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0020 0x9b490f83	cfi_cmdset_0020
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x69b3845c	cfi_qry_mode_on
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x6ebb71c3	cfi_qry_present
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0xa48fb042	cfi_qry_mode_off
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2000 0x385cd65e	DoC2k_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001 0x8910f5d1	DoCMil_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001plus 0x9ade7e25	DoCMilPlus_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/docecc 0x45937659	doc_decode_ecc
+EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0x785b764e	onenand_release
+EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0xd561c00e	onenand_scan
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x07362593	can_get_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x2dc38fcd	can_bus_off
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x2e76d9c8	close_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x5f894f8b	open_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xb60729d9	alloc_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xbaa31f01	unregister_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xbdbee928	can_free_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xc1d67004	can_put_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xd5f7d072	register_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xfc1fbe97	free_candev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x766c5029	unregister_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x7f4ecd9b	alloc_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x813a99b3	free_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xdc9bd500	sja1000_interrupt
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xfc940db2	register_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0x184ca9fd	usbnet_generic_cdc_bind
+EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0xe35b70dd	usbnet_cdc_unbind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x0c3d08d0	rndis_status
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x75d1431f	generic_rndis_bind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x7e0d9d5d	rndis_rx_fixup
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xad1d5c56	rndis_unbind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xc028e49a	rndis_tx_fixup
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xc9bef747	rndis_command
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x090ad9c5	usbnet_pause_rx
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x0e73eaca	usbnet_get_msglevel
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x1d4096fb	usbnet_get_drvinfo
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x20e48e76	usbnet_start_xmit
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x2182ffe8	usbnet_probe
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x21c262e2	usbnet_change_mtu
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x26a93a5e	usbnet_set_settings
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x2ec325fe	usbnet_get_ethernet_addr
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x3e2a1cf4	usbnet_resume_rx
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x4f45666f	usbnet_disconnect
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x61f789c9	usbnet_resume
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x723b3919	usbnet_unlink_rx_urbs
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x84ab3637	usbnet_set_msglevel
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x8775e0c7	usbnet_tx_timeout
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x98935ea6	usbnet_nway_reset
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xa45593f6	usbnet_purge_paused_rxq
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xa8357433	usbnet_open
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xbc55e846	usbnet_defer_kevent
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xc57ee100	usbnet_get_endpoints
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xc8d4a1e7	usbnet_suspend
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xc99c7432	usbnet_get_link
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xd4a93e33	usbnet_skb_return
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xd7a024f1	usbnet_get_settings
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xfbece9e6	usbnet_stop
+EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0xefa89a7d	libipw_rx_any
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x13ac0d52	lbs_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x13ac4239	lbs_host_to_card_done
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x1c2a6e50	lbs_remove_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x22842179	lbs_send_tx_feedback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x24de0f56	lbs_start_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x2ed4f921	lbs_notify_command_response
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x3671b779	lbs_add_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x46222cbe	lbs_host_sleep_cfg
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x5d13d5d1	lbs_process_rxed_packet
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x625cceb4	lbs_cmd_copyback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x63216df0	lbs_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x9dc10f87	__lbs_cmd
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xa87c36ec	lbs_queue_event
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xbdb0e686	lbs_stop_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xee963a74	lbs_cmd_802_11_rate_adapt_rateset
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf64277de	lbs_debug
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x0b3d8d81	lbtf_send_tx_feedback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x23961705	lbtf_remove_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x3f4640e8	lbtf_bcn_sent
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x4554d888	lbtf_cmd_copyback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x6f321c03	lbtf_add_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x9909c6b0	__lbtf_cmd
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xa856df3a	lbtf_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xd782cc3d	lbtf_cmd_response_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0x255d480c	if_usb_reset_device
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0x971cb0ad	if_usb_prog_firmware
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x0bb59518	p54_init_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x1abb9791	p54_register_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x1d15eddc	p54_free_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x425eb80e	p54_read_eeprom
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x4d7ac538	p54_parse_firmware
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x85fe8d8d	p54_unregister_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xb6d45f94	p54_free_skb
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xc987d1f0	p54_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xf188a5b3	p54_parse_eeprom
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x03a1b9a9	rt2x00mac_config
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x099d9983	rt2x00lib_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x0eb415fc	rt2x00mac_get_stats
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x108f713d	rt2x00mac_stop
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x1453a7b8	rt2x00mac_conf_tx
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x1977f4bc	rt2x00mac_rfkill_poll
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x1e3c7cbf	rt2x00queue_get_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x1ef9c25c	rt2x00mac_configure_filter
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x58cea40c	rt2x00lib_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x58f9a56d	rt2x00lib_remove_dev
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x5934d570	rt2x00queue_map_txskb
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x69ad9139	rt2x00lib_probe_dev
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x76d4158e	rt2x00queue_get_entry
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x76e212c5	rt2x00mac_add_interface
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x85ce2cd5	rt2x00mac_set_tim
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x8766723c	rt2x00mac_remove_interface
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xa320e690	rt2x00lib_beacondone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xaaeb81a1	rt2x00lib_rxdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xbdd65d3b	rt2x00mac_bss_info_changed
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xcc069879	rt2x00mac_tx
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xccc46e2e	rt2x00mac_set_key
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xe5a53ced	rt2x00mac_get_tx_stats
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xecf49555	rt2x00mac_start
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xee0b8c44	rt2x00lib_txdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x22e63638	rt2x00pci_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x4d22e4d9	rt2x00pci_write_tx_data
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x52bbf9e5	rt2x00pci_remove
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x54f279f1	rt2x00pci_probe
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x8523da79	rt2x00pci_rxdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xb5f38c8e	rt2x00pci_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xbe4d2ad6	rt2x00pci_regbusy_read
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xccbfdc5c	rt2x00pci_initialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xe574c42b	rt2x00pci_uninitialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x00aa113a	rt2x00usb_vendor_req_buff_lock
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x052fd7ba	rt2x00usb_write_tx_data
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x1eeeec87	rt2x00usb_vendor_request_large_buff
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x2e3c55d7	rt2x00usb_probe
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x387cf26e	rt2x00usb_initialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x426ad0df	rt2x00usb_disconnect
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x5d1613be	rt2x00usb_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x88c32d00	rt2x00usb_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x8da5b894	rt2x00usb_clear_entry
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x9147b328	rt2x00usb_kick_tx_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xc296cdab	rt2x00usb_kill_tx_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xc68130d4	rt2x00usb_uninitialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xc88a5453	rt2x00usb_vendor_request
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xcb3d3e50	rt2x00usb_disable_radio
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xd9a7896b	rt2x00usb_regbusy_read
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xf72479ac	rt2x00usb_vendor_request_buff
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x2468ed34	oslec_hpf_tx
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x579d2806	oslec_snapshot
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x587711de	oslec_create
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x882d5f27	oslec_adaption_mode
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xf828c15b	oslec_flush
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xf923a5b1	oslec_free
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xfabc3747	oslec_update
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x050fa43c	usbip_dump_urb
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x1091583f	usbip_start_threads
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x34a3752f	usbip_pad_iso
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x72ddb189	usbip_stop_eh
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x78b72f44	usbip_debug_flag
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x79d91bbe	usbip_alloc_iso_desc_pdu
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x7dabbefe	usbip_recv_xbuff
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x90a77ba6	usbip_pack_pdu
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xc956e361	usbip_xmit
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xc9ace171	usbip_event_happened
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xd02753dc	usbip_header_correct_endian
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xe1ea0586	usbip_dump_header
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xe3ddefe3	usbip_start_eh
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xebdb9712	sockfd_to_socket
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xec901003	usbip_event_add
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xf1d7bd14	usbip_recv_iso
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xf490bd20	usbip_stop_threads
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xfa5a843f	dev_attr_usbip_debug
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xfeaa841f	usbip_task_init
+EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0x406392cf	usbatm_usb_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0x8fd57522	usbatm_usb_probe
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x0ada948d	ftdi_elan_gone_away
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x47151ce9	usb_ftdi_elan_edset_input
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x8074b013	usb_ftdi_elan_edset_single
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x8d5a413d	usb_ftdi_elan_edset_flush
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x954d17c0	usb_ftdi_elan_write_pcimem
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x9971b1e8	usb_ftdi_elan_edset_setup
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xcf7b05d1	usb_ftdi_elan_edset_output
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xdaada14d	usb_ftdi_elan_read_pcimem
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xdd115001	usb_ftdi_elan_edset_empty
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x1f33d266	usb_serial_handle_sysrq_char
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x38ea28fd	usb_serial_generic_open
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x4fd3b41b	usb_serial_generic_read_bulk_callback
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x50307bcd	usb_serial_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x8d60fcd3	usb_serial_register
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x9c880eb1	usb_serial_port_softint
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xa3037da4	usb_serial_generic_write
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xa4565de1	usb_serial_generic_resume
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xa4ff5531	ezusb_writememory
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xb7b8a18c	usb_serial_handle_break
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xc988ae58	usb_serial_generic_write_bulk_callback
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xdcbef5b0	usb_serial_generic_resubmit_read_urb
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xe41d42a4	usb_serial_probe
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xe8a0faee	usb_serial_deregister
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xf3451553	usb_serial_handle_dcd_change
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xfe7e23c9	ezusb_set_reset
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x09f3c921	wa_urb_enqueue_run
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x1f527624	wa_urb_enqueue
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x29b83b70	rpipe_ep_disable
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x2a5bc428	__wa_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x8668d134	rpipe_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xc2db4666	wa_urb_dequeue
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xc618680c	wa_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x0bb6bf5e	wusb_cluster_id_get
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x0d660ce8	wusbhc_mmcie_rm
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x1184afb1	wusbhc_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x20519a40	wusbhc_b_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x25f88dbc	wusbhc_rh_start_port_reset
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x2e62c245	wusbhc_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x3f6ea4fe	wusbhc_handle_dn
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x66b460f4	wusbhc_chid_set
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x6d86545a	wusbhc_rh_control
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x73f7b536	wusbhc_b_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x7c068a89	wusbhc_rh_suspend
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x86b7547d	wusbhc_giveback_urb
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xacf67582	wusbhc_rh_resume
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb308cc6c	wusbhc_reset_all
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb725d128	wusb_cluster_id_put
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xbe0aee30	wusbhc_mmcie_set
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xdb300098	__wusb_dev_get_by_usb_dev
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xdf6e4f08	wusb_dev_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xe86e9b61	wusbhc_rh_status_data
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf770a6b4	wusbd
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xfe2e17d7	wusb_et_name
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0xae515701	i1480_fw_upload
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0xe39f3b5e	i1480_rceb_check
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0xf00bb044	i1480_cmd
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x1885a194	uwb_phy_rate_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x268be260	uwb_pca_base_priority_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x943bec09	uwb_ack_policy_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x96f9997a	uwb_rts_cts_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xa768d07f	uwb_rts_cts_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xb3aa3381	uwb_phy_rate_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xd001a229	uwb_pca_base_priority_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xefde0736	uwb_ack_policy_store
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x1b5bd58d	umc_device_register
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x270ade8c	umc_driver_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x346e2360	umc_bus_type
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x3f66316d	umc_match_pci_id
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x61597cea	umc_controller_reset
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x8f7115e2	umc_device_create
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x9b152f68	__umc_driver_register
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xd787c523	umc_device_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x018b76b9	uwb_rc_vcmd
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0b8aad57	uwb_est_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0cbfab9a	uwb_pal_init
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x126026b4	uwb_notifs_deregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x1d0d76b8	uwb_rsv_establish
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x22563723	uwb_rsv_create
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x24788eb8	uwb_rc_rm
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2a0ed7fe	uwb_rc_ie_rm
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x30e2d79a	uwb_pal_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x3228f76f	uwb_rsv_modify
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x35dcac1e	uwb_rc_reset_all
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x360aec0e	uwb_rc_post_reset
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x43d149a7	uwb_radio_stop
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x452713d3	uwb_rc_init
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4bd17ffa	uwb_rsv_terminate
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4d57ae3c	uwb_rsv_type_str
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x50c35450	uwb_rsv_destroy
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x51f85c44	uwb_dev_try_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x590c7469	uwb_notifs_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5e495881	uwb_rc_ie_add
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5e4bc088	__uwb_addr_print
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x663ddabb	uwb_rsv_get_usable_mas
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6ad59a57	uwb_rc_cmd
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x73c256a3	uwb_rc_get_by_grandpa
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x7dcfcd23	uwb_ie_next
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x87fa1920	uwb_rc_neh_error
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x98413234	uwb_rsv_state_str
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x9c17e311	uwb_radio_start
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa116ed9c	__uwb_rc_try_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa5ca06ab	uwb_est_find_size
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa6cc8b4c	uwb_rc_put
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb5aee182	uwb_rc_alloc
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb6035afc	uwb_rc_add
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb772a2db	uwb_rc_get_by_dev
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe1716f06	uwb_est_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe282e016	uwb_rc_mac_addr_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe2b7fd0d	uwb_rc_cmd_async
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe4b19be3	uwb_pal_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe5b09fb8	uwb_rsv_accept
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xea52bbf3	uwb_rc_pre_reset
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xeb332a7a	uwb_rc_neh_grok
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xfb85eba4	uwb_rc_dev_addr_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xfc99f724	uwb_dev_for_each
+EXPORT_SYMBOL_GPL drivers/uwb/whci 0xc0a42958	whci_wait_for
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x097d6e54	wlp_wss_activate_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x0c98442b	wlp_dev_prim_OUI_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x1d257eee	wlp_eda_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x2162ffed	wlp_uuid_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x227c0ef3	wlp_dev_model_name_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x24e43648	wlp_dev_model_nr_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x332f5807	wlp_prepare_tx_frame
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x37f8c41d	wlp_dev_prim_subcat_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x3ce5df9c	wlp_dev_model_name_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x42fd34e1	wlp_neighborhood_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x51707451	wlp_dev_serial_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x533c67da	wlp_wss_setup
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x5db33150	wlp_reset_all
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x67adcd74	wlp_setup
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x69be38bc	wlp_dev_serial_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x6b128de6	wlp_receive_frame
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x6b295112	wlp_dev_model_nr_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x72265731	wlp_dev_prim_category_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x7515ecdd	wlp_dev_manufacturer_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x7cfeb8b3	wlp_dev_prim_subcat_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x849c2e3a	wlp_dev_prim_category_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xa53ab25f	wlp_dev_name_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xa6138f4c	wlp_dev_name_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xa9210727	wlp_eda_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xcb259c9f	wlp_dev_manufacturer_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xce229163	wlp_uuid_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xcfa4da6f	wlp_dev_prim_OUI_sub_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xdb354422	wlp_dev_prim_OUI_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xe1d9d096	wlp_wss_activate_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xebda0705	wlp_wss_remove
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xf9c64692	wlp_dev_prim_OUI_sub_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xfd095995	wlp_remove
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x0864c4a4	dlm_new_lockspace
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x186c34bc	dlm_posix_lock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x449573d8	dlm_posix_unlock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x67eb31d6	dlm_posix_get
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x9321df95	dlm_lock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xcf9f3328	dlm_release_lockspace
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xdc583c08	dlm_unlock
+EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0x2d706272	exportfs_decode_fh
+EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0x6ef19b39	exportfs_encode_fh
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x17ce645d	locks_end_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x1a618932	nlmsvc_unlock_all_by_ip
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x6f959b35	locks_in_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x7a828a7c	nlmclnt_done
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x7f8153c9	nlmclnt_proc
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x96877ac4	locks_start_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x9df3b111	nlmsvc_ops
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xa7b91a7b	lockd_down
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xb533d6d7	nlmclnt_init
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xc7d61fe1	nlmsvc_unlock_all_by_sb
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xf6933c48	lockd_up
+EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0x247482e2	nfsacl_encode
+EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0xb3583423	nfsacl_decode
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x0eed163d	o2hb_setup_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1b89c6ee	o2hb_fill_node_map
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1cb231d0	mlog_not_bits
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1d747ce3	o2hb_check_node_heartbeating
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x2be0678e	o2nm_node_put
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x36418553	o2net_send_message
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x4900035b	o2hb_stop_all_regions
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x547bd031	o2nm_get_node_by_num
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x64e6810e	o2nm_get_node_by_ip
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x687f6251	mlog_and_bits
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x6edeb6bb	o2hb_register_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x8613cd9a	o2hb_unregister_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa82a8645	o2nm_this_node
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa87bc9e7	o2nm_configured_node_map
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa9f5379a	o2net_send_message_vec
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xae808bac	o2net_register_handler
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xbaeb4700	o2hb_check_node_heartbeating_from_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xd60f2c6c	o2hb_check_local_node_heartbeating
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf1a5611d	o2net_unregister_handler_list
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xfe85a25f	o2nm_node_get
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x57f6c1d7	dlmlock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x6b2b1138	dlm_unregister_domain
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x7a1211f8	dlm_setup_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x84b7fb2c	dlmunlock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xb8f05154	dlm_print_one_lock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xb9544bd9	dlm_register_domain
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xc24fab00	dlm_register_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd7ba575e	dlm_errmsg
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd8fa57a6	dlm_unregister_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xfb86b96f	dlm_errname
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0562c415	ocfs2_cluster_this_node
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x06379db6	ocfs2_dlm_lvb_valid
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0e27f909	ocfs2_dlm_lock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x21db5b88	ocfs2_cluster_disconnect
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4a1f6fe9	ocfs2_cluster_connect
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4d3af7fa	ocfs2_cluster_hangup
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x6fc97007	ocfs2_plock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x81c85a68	ocfs2_dlm_lock_status
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x91fab465	ocfs2_dlm_lvb
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x963932a3	ocfs2_stack_glue_set_locking_protocol
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xa7d5c1c0	ocfs2_dlm_unlock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xb6a3cda8	ocfs2_stack_glue_register
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xbbc4ef97	ocfs2_stack_supports_plocks
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xd066711e	ocfs2_dlm_dump_lksb
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xe9a2fe55	ocfs2_stack_glue_unregister
+EXPORT_SYMBOL_GPL lib/lzo/lzo_compress 0x56b63670	lzo1x_1_compress
+EXPORT_SYMBOL_GPL lib/lzo/lzo_decompress 0xf30fda27	lzo1x_decompress_safe
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x300d7e57	free_rs
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x6fbb3bd9	init_rs_non_canonical
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xabda1e2e	decode_rs16
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xb050f329	init_rs
+EXPORT_SYMBOL_GPL net/802/garp 0x085531d8	garp_register_application
+EXPORT_SYMBOL_GPL net/802/garp 0x239ebd1b	garp_uninit_applicant
+EXPORT_SYMBOL_GPL net/802/garp 0x62da412a	garp_unregister_application
+EXPORT_SYMBOL_GPL net/802/garp 0xb45342bb	garp_request_join
+EXPORT_SYMBOL_GPL net/802/garp 0xc0b2fb55	garp_init_applicant
+EXPORT_SYMBOL_GPL net/802/garp 0xd5be6764	garp_request_leave
+EXPORT_SYMBOL_GPL net/802/stp 0x4d1478cc	stp_proto_unregister
+EXPORT_SYMBOL_GPL net/802/stp 0xd623320c	stp_proto_register
+EXPORT_SYMBOL_GPL net/ax25/ax25 0x91ec87aa	ax25_register_pid
+EXPORT_SYMBOL_GPL net/ax25/ax25 0xac93ae05	ax25_bcast
+EXPORT_SYMBOL_GPL net/ax25/ax25 0xaeb7451e	ax25_defaddr
+EXPORT_SYMBOL_GPL net/bluetooth/bluetooth 0x66268977	bt_class
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x00f80a30	dccp_rcv_state_process
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x09b92517	dccp_ioctl
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x0ed68530	dccp_reqsk_send_ack
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x1a864672	dccp_init_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x1d99d49a	dccp_timestamp
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x1db4ec24	dccp_reqsk_init
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x2069ac20	dccp_destroy_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x238167ce	dccp_hashinfo
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x26a005b7	dccp_parse_options
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x293b0958	dccp_insert_option_elapsed_time
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x2a202b95	dccp_send_ack
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x2dad3f92	dccp_close
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x33208dd8	dccp_create_openreq_child
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x38fd9083	dccp_sendmsg
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x3ba25970	dccp_getsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x433441f4	dccp_orphan_count
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x44a125ee	dccp_make_response
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x48363549	dccp_recvmsg
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x4cdd391d	dccp_feat_list_purge
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x502c0f68	dccp_setsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x50f961fc	dccp_ctl_make_reset
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x557c8216	dccp_child_process
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x56ea266a	dccp_state_name
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x603e2973	dccp_death_row
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x655b5016	dccp_insert_option_timestamp
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x6ad09afc	dccp_sync_mss
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x7132b012	dccp_shutdown
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x77e019d1	dccp_insert_option
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x82127730	dccp_set_state
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x86a909ef	dccp_done
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x86be7924	dccp_packet_name
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x87a83bee	dccp_disconnect
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x8b7d8caf	dccp_statistics
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xae8e9691	inet_dccp_listen
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xbdd9cfc4	dccp_check_req
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xc2ecdb51	dccp_poll
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xc40361fc	dccp_send_sync
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xf15561ae	dccp_rcv_established
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xf19fc1b1	dccp_connect
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x73af2b6f	dccp_v4_connect
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x9d2d9e57	dccp_invalid_packet
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xa4bb9ca4	dccp_v4_send_check
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xc7975af1	dccp_v4_conn_request
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xccdcb698	dccp_v4_do_rcv
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xecb88208	dccp_v4_request_recv_sock
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0x1585da54	nf_nat_seq_adjust_hook
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0x6d40a921	need_ipv4_conntrack
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_defrag_ipv4 0x6b6c3d10	nf_defrag_ipv4_enable
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x067ab82a	nf_nat_proto_unique_tuple
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x07ae60b6	nf_nat_proto_in_range
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x5a0b01db	nf_nat_proto_put
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x5a5b7a42	nf_nat_icmp_reply_translation
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x94a08134	nf_nat_proto_nlattr_to_range
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xbbf72d65	nf_nat_packet
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xc4357c99	nf_nat_proto_range_to_nlattr
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xd813ef7f	nf_nat_proto_find_get
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xfdc9a112	nf_nat_get_offset
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat_proto_gre 0x636b12c8	nf_nat_need_gre
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x250c192c	tcp_vegas_state
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x4ba0ede2	tcp_vegas_cwnd_event
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xc6382951	tcp_vegas_pkts_acked
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xd69818f3	tcp_vegas_init
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xfd4f978e	tcp_vegas_get_info
+EXPORT_SYMBOL_GPL net/mac80211/mac80211 0x96c8765e	ieee80211_iterate_active_interfaces
+EXPORT_SYMBOL_GPL net/mac80211/mac80211 0xac1a6cd0	ieee80211_iterate_active_interfaces_atomic
+EXPORT_SYMBOL_GPL net/netfilter/ipvs/ip_vs 0xe6476b4a	net_vs_ctl_path
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x01744d53	nf_ct_invert_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x045072cd	nf_ct_port_nla_policy
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x06a5b840	nf_ct_expect_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x0822c82c	nf_ct_extend_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x11afd1e0	nf_ct_l3proto_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x1784b509	nf_ct_unlink_expect
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x18bbfb6a	nf_conntrack_in
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x1dfe7176	__nf_ct_kill_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x255b3a22	nf_ct_l3proto_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x293b4d27	__nf_ct_try_assign_helper
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x29cea898	nf_ct_iterate_cleanup
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x2c96a1a8	__nf_ct_refresh_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x2d960a2e	nf_conntrack_register_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x2f3235e4	nf_ct_get_tuplepr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x31d44386	__nf_conntrack_helper_find_byname
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x36e16bd0	nf_conntrack_helper_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x39d3a37e	nf_conntrack_event_cb
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3bd75864	nf_conntrack_l3proto_generic
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3f5b1415	nf_ct_port_nlattr_to_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x46f7ae0e	nf_conntrack_alloc
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4b9065a9	nf_ct_alloc_hashtable
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4c5c5d4c	nf_conntrack_flush_report
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4caf28fd	nf_ct_l3protos
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4e943d98	nf_ct_helper_ext_add
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x512974b6	nf_conntrack_helper_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x583585fd	nf_conntrack_untracked
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5882ba33	nf_conntrack_set_hashsize
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x59c6c7ae	nf_ct_expect_register_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x59d253ce	nf_ct_expect_init
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5a4b790c	nf_conntrack_l4proto_udp6
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5e89308d	__nf_conntrack_confirm
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5f9871e5	nf_conntrack_free
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x62813e5c	nf_ct_port_nlattr_tuple_size
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x63ad8a34	nf_ct_nat_offset
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x676e1198	nfnetlink_parse_nat_setup_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x687d1b8e	nf_conntrack_l4proto_udp4
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6cee29f0	nf_ct_extend_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6e224a7a	need_conntrack
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6fe0e86d	nf_ct_expect_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x78bd2faf	nf_ct_port_tuple_to_nlattr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x78f9b710	nf_ct_l3proto_try_module_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8106de93	nf_ct_expect_unregister_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x81223a68	nf_conntrack_l3proto_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x83676f8d	nf_conntrack_l4proto_tcp6
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x84784401	print_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8e39f0ae	nf_conntrack_hash_insert
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8ea584a8	nf_expect_event_cb
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8ffe7e89	nf_conntrack_htable_size
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x90ff6c9f	nf_ct_invert_tuplepr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9154a228	nf_ct_remove_expectations
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x93ea200f	nf_ct_expect_related_report
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9af3f6c1	nf_ct_free_hashtable
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xa101fe1d	nf_ct_insert_dying_list
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xa18b2fe0	nf_ct_deliver_cached_events
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xa7e4fa94	__nf_ct_expect_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb1510d0f	nf_conntrack_l4proto_tcp4
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb2308217	nf_conntrack_l3proto_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb602c57e	nf_ct_l3proto_module_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb731bf84	nf_ct_get_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb7f409e0	nf_ct_expect_alloc
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xbe9af6f3	nf_conntrack_unregister_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc08d4a20	nf_conntrack_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc18ac88d	nf_ct_expect_hsize
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xcf6a3d89	nf_conntrack_l4proto_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xd28bf86b	nf_conntrack_alter_reply
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xd9a62fd6	nf_conntrack_tuple_taken
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xdbef8b57	nf_conntrack_lock
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xddb15fc2	nf_conntrack_l4proto_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xde8f7e84	nf_ct_unexpect_related
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xe2fb0944	__nf_conntrack_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf0ba975d	nf_ct_delete_from_lists
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf38bcdf3	nf_conntrack_max
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xfb8fa229	__nf_ct_l4proto_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xfdaec89a	seq_print_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_amanda 0xb8762721	nf_nat_amanda_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_ftp 0x57c9195e	nf_nat_ftp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x2c4cfb1b	set_sig_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x6629efbb	nat_callforwarding_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x743498ee	set_h245_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x7f50c2f7	nat_t120_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x7fa0d4c4	nat_q931_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x830ecd40	nat_h245_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x90959d01	set_ras_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x9c3e1762	nat_rtp_rtcp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xe48ffce4	get_h225_addr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xe9c54d11	set_h225_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_irc 0x0bf93c94	nf_nat_irc_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x56f465bf	nf_nat_pptp_hook_outbound
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x82299f58	nf_nat_pptp_hook_expectfn
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x9a83de5b	nf_nat_pptp_hook_exp_gre
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0xe3bc2c4e	nf_nat_pptp_hook_inbound
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_proto_gre 0x0de3a11b	nf_ct_gre_keymap_add
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_proto_gre 0xd70b3a6c	nf_ct_gre_keymap_destroy
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x20006de8	nf_nat_sdp_session_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x214fb06e	nf_nat_sdp_port_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x2c646bd6	ct_sip_get_header
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x344f86bb	nf_nat_sip_expect_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x3caa5698	ct_sip_parse_address_param
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x5ece2c2b	nf_nat_sip_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xb3426af9	ct_sip_parse_request
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xb62e4915	nf_nat_sdp_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xc8bb729b	ct_sip_parse_numerical_param
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xc9637133	ct_sip_parse_header_uri
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xde207b5a	ct_sip_get_sdp_header
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xf5fdc55c	nf_nat_sdp_media_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_tftp 0x5d85f895	nf_nat_tftp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x1f58e71b	nfnl_lock
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x3895cd7a	nfnl_unlock
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x778a3043	nfnetlink_unicast
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xa7351026	nfnetlink_subsys_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xe1b6df4e	nfnetlink_send
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xeca95329	nfnetlink_has_listeners
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xef9b4bbd	nfnetlink_set_err
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xf7dd8f3d	nfnetlink_subsys_register
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink_log 0xde9d40b3	nfulnl_log_packet
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x0dd9afd4	xt_proto_fini
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x0e45c6e7	xt_check_target
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x3beea8d7	xt_unregister_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x40728a63	xt_find_revision
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x5d5ea7b0	xt_check_match
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x78f83185	xt_table_unlock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x78fc99e5	xt_request_find_target
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xa1cce8f9	per_cpu__xt_info_locks
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xbb9cb16c	xt_register_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xdc3da1e2	xt_replace_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xe8ab98ea	xt_proto_init
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xf27a71fc	xt_find_table_lock
+EXPORT_SYMBOL_GPL net/netfilter/xt_RATEEST 0x3d225a19	xt_rateest_put
+EXPORT_SYMBOL_GPL net/netfilter/xt_RATEEST 0xa8ac8b53	xt_rateest_lookup
+EXPORT_SYMBOL_GPL net/rxrpc/af-rxrpc 0x1b94d512	rxrpc_register_security
+EXPORT_SYMBOL_GPL net/rxrpc/af-rxrpc 0x8e316baf	rxrpc_unregister_security
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x00c52ef5	g_make_token_header
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x14a88972	svc_gss_principal
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x1bc1774f	gss_mech_get_by_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x1be08310	gss_mech_get
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x37e2b35e	gss_mech_get_by_name
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x41b7f563	gss_mech_put
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x5d6fc703	gss_svc_to_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x5de6b3c2	gss_pseudoflavor_to_service
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x6257a5c7	gss_mech_register
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x8d1a827e	svcauth_gss_register_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xaa650ed0	gss_mech_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xb21105ac	svcauth_gss_flavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xb5dea7ef	g_token_size
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xf8b2ff6e	g_verify_token_header
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xfd0fec62	gss_service_to_auth_domain_name
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x000d7999	rpc_destroy_wait_queue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x05e807a9	xdr_encode_string
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x065994f1	xdr_encode_opaque_fixed
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x06b29246	svc_set_num_threads
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x095fdaf2	rpc_exit_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0a0908dd	auth_domain_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0b624bde	svc_xprt_enqueue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0f668ba9	svc_auth_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0f9fd9c0	rpc_ntop
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x12e280e3	svc_proc_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x171a89de	sunrpc_cache_pipe_upcall
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x18834685	cache_purge
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1a503479	svc_unreg_xprt_class
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1a734be5	svc_wake_up
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1ab4d194	xdr_partial_copy_from_skb
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1b8fb975	xdr_init_decode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1bdfd85e	rpc_call_null
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1d9deb87	__rpc_wait_for_completion_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1e8830e5	rpc_peeraddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1ed69d8a	xprt_wait_for_buffer_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x21afeb5c	rpcauth_init_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2659309c	svc_sock_destroy
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x26cd7fd3	rpc_restart_call
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2919b156	xdr_decode_string_inplace
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x29a9a533	rpc_restart_call_prepare
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2aa17774	rpc_free_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2bb21a3f	rpc_max_payload
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2eec63c9	xdr_encode_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2f487f98	rpc_bind_new_program
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x31a89d59	rpc_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3312dc01	auth_unix_add_addr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x33b97b9a	svc_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x34fbc93d	xdr_inline_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x39718aaa	xdr_init_encode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3b756999	svc_reg_xprt_class
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3c191309	rpc_put_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3d95bf81	svc_sock_names
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4130746c	sunrpc_cache_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x44d42655	svcauth_unix_set_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x45f9361c	rpc_wake_up_next
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x46d58062	xdr_encode_array2
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x46ea3e21	svc_authenticate
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x48a9fc93	xdr_buf_read_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4a14a68e	rpc_alloc_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4afb0656	rpc_proc_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4afdf9d7	svc_xprt_copy_addrs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4b9de6de	rpc_wake_up
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4cd73d74	svc_set_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4eda607e	rpc_queue_upcall
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x53445f68	nlm_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x534da23c	cache_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x54f4295c	rpcauth_generic_bind_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x557651f0	rpc_clone_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x55836b87	rpc_sleep_on
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x55dd66e3	rpcauth_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x55fbca4d	rpc_print_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x593602b6	xprt_lookup_rqst
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x59d8e02b	svc_find_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5a33b782	svc_recv
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5ae4de36	xdr_buf_subsegment
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5b14ec1a	rpc_put_mount
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5b32de0b	rpc_wake_up_queued_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5b65703a	cache_check
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5bd26000	rpc_proc_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5c235dbf	put_rpccred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5e6fd34d	svc_xprt_init
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x631299df	rpc_call_sync
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x671860a7	xdr_buf_from_iov
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x675524ec	rpc_sockaddr2uaddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x678dc059	rpc_setbufsize
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x68f70ca7	svc_sock_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6c5304c5	rpcb_getport_sync
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6ce49d9e	svc_sock_update_bufs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6d7ebfc2	rpc_malloc
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6dc55ec1	rpcauth_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6e3e6a1b	xprt_release_xprt_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6e75f371	svc_drop
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6eea229d	svcauth_unix_purge
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x71fa908a	cache_flush
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x72f13faa	rpc_force_rebind
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x763fbb5d	rpcauth_destroy_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x78ccaf3c	xprt_set_retrans_timeout_def
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7b036ef2	svc_proc_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7cbd9a2c	auth_domain_find
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7de53067	rpc_init_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x801d5812	xprt_complete_rqst
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x83fda62c	svc_exit_thread
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x86ed282a	rpc_uaddr2sockaddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x88d00509	xprt_write_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8a31130a	xdr_process_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8a667b35	svc_reserve
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8a7cb9a2	xdr_read_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8b32f010	rpc_run_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8be5f328	rpc_peeraddr2str
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8c9f7f0b	rpc_init_wait_queue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8cde292e	cache_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x903ba5f7	svc_seq_show
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x929fb7d4	xprt_release_rqst_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x92f76bad	rpcauth_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9355d5af	auth_domain_put
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9801e202	svc_auth_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x983a8386	svc_process
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x98699cf3	rpc_lookup_machine_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x99cf4a34	svc_max_payload
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa538a8ce	rpcauth_init_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa689bcd8	rpc_call_async
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa6ac1f93	xprt_unregister_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xaa98ba74	svc_addsock
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xaccce246	xprt_release_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xad048f19	sunrpc_cache_register_pipefs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xad7ac4dc	rpc_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xae891a3e	sunrpc_cache_unregister_pipefs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xaf3a7576	rpc_call_start
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xaf5bf6ef	nfs_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb2eeb0b9	rpc_mkpipe
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb88dc3b0	rpc_wake_up_status
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb9df35d0	rpc_delay
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xba180470	svc_xprt_names
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbb361e5e	xdr_decode_array2
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbb839c60	unix_domain_find
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbccd5c24	sunrpc_cache_update
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbd3119c3	csum_partial_copy_to_xdr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbf9d1b96	nfsd_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc12435e3	rpc_calc_rto
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc195dbc7	xprt_register_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc293c44e	svc_prepare_thread
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc31081c6	xdr_inline_decode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc34a7d6f	xprt_reserve_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc3880471	xdr_decode_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc39ca12f	svc_print_addr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc4b3a331	auth_unix_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc83feb14	read_bytes_from_xdr_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc87c8768	xprt_disconnect_done
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc8e96dea	qword_addhex
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xca594be6	xdr_shift_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xca61e3d0	svc_xprt_put
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcb7c4050	xdr_enter_page
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xccc2372e	rpc_pton
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcdf92a6d	auth_unix_forget_old
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcee467f3	xprt_load_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd24c8f2c	rpc_lookup_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd59dc019	xprt_set_retrans_timeout_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd651b610	rpc_unlink
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xda054902	rpc_shutdown_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xda0f2610	rpcb_getport_async
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdaeb9bc8	rpcauth_lookup_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdbfb0823	xdr_encode_word
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdc01cc83	xprt_wake_pending_tasks
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdfe760c4	xdr_skb_read_bits
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe20adb76	xdr_reserve_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe22893a4	xdr_write_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe3d20fe3	svc_create_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe3e49ff0	svc_create_pooled
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe41b2077	xdr_encode_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe5919cb1	xdr_encode_opaque
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe7277ee8	xprt_update_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe97f4ce5	qword_get
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe9c8bcef	rpc_get_mount
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xedcf6be4	qword_add
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xee3404c5	svc_destroy
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xeeacab69	rpc_update_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf77c2159	svc_xprt_received
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf9b0e59f	xdr_decode_word
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf9d1164c	rpc_free
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfa5d2354	xprt_reserve_xprt_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfd014ce1	xprt_adjust_cwnd
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfe8e8a4b	rpc_killall_tasks
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xff1d3f55	svc_close_xprt
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x0e592271	wimax_msg_data
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x270a6c33	wimax_dev_add
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x2b1520d7	wimax_msg_send
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x41c1700e	wimax_dev_init
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x4500c99c	wimax_state_change
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x7d71e11b	wimax_report_rfkill_sw
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xa35a09d3	wimax_report_rfkill_hw
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xa441c317	wimax_msg_len
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xa8c3a697	wimax_state_get
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xd167a222	wimax_msg_data_len
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xd248b450	wimax_msg
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xde00a4b0	wimax_msg_alloc
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xe32caf55	wimax_dev_rm
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x0035212c	cfg80211_wext_siwrts
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x008b00a7	cfg80211_wext_giwfrag
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x07e7b5ca	cfg80211_wext_giwretry
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x28e5b912	cfg80211_wext_siwfreq
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x2cf1e550	cfg80211_wext_siwessid
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x3190c967	cfg80211_wext_siwmode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x336c2b1f	cfg80211_wext_siwpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x35764366	cfg80211_wext_siwauth
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x40b2151b	cfg80211_wext_giwmode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x458742a5	cfg80211_wext_siwmlme
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x550d2dca	cfg80211_wext_giwfreq
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x6932929d	cfg80211_wext_giwrate
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x6b07f1df	cfg80211_wext_giwscan
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x6ce71f02	cfg80211_wext_giwap
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x6da6708b	cfg80211_wext_siwtxpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x7dddb5f4	cfg80211_wext_giwrts
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x83ed768d	cfg80211_wext_siwap
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x8540a0bd	cfg80211_wext_giwencode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x864e7199	cfg80211_wext_giwname
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x88feb2d5	cfg80211_wext_siwfrag
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x8926c387	cfg80211_wext_siwgenie
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x8def4ebd	cfg80211_wext_giwpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x927280f2	cfg80211_wext_giwessid
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xb4a6008a	cfg80211_wext_giwrange
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xb58e299f	cfg80211_wext_siwencodeext
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xb964d068	cfg80211_wext_siwretry
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xbce8a17e	cfg80211_wext_siwscan
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xbd03f114	cfg80211_wext_giwauth
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xbd26e11c	cfg80211_wext_siwencode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xcfc00afd	cfg80211_wireless_stats
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xdb61b443	cfg80211_wext_giwtxpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xe14720ef	cfg80211_wext_siwrate
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x0acbb100	ipcomp_init_state
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x0e850e5c	ipcomp_output
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x263e57db	ipcomp_input
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0xab28f2b9	ipcomp_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x00301d52	device_move
+EXPORT_SYMBOL_GPL vmlinux 0x00566d8f	inotify_get_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x0067df75	ata_tf_from_fis
+EXPORT_SYMBOL_GPL vmlinux 0x00b4384e	get_user_pages_fast
+EXPORT_SYMBOL_GPL vmlinux 0x00ebcb5d	ata_id_string
+EXPORT_SYMBOL_GPL vmlinux 0x00f3d300	regulator_set_optimum_mode
+EXPORT_SYMBOL_GPL vmlinux 0x0125424f	snd_soc_put_value_enum_double
+EXPORT_SYMBOL_GPL vmlinux 0x016b9869	xfrm_calg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0x0184ab96	set_task_ioprio
+EXPORT_SYMBOL_GPL vmlinux 0x01a4ea6d	unregister_die_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x01b40c3d	__fsnotify_parent
+EXPORT_SYMBOL_GPL vmlinux 0x01d9ce23	hid_set_field
+EXPORT_SYMBOL_GPL vmlinux 0x01e1a8de	kgdb_breakpoint
+EXPORT_SYMBOL_GPL vmlinux 0x0203fe2d	blk_rq_prep_clone
+EXPORT_SYMBOL_GPL vmlinux 0x0279f983	usb_autopm_put_interface
+EXPORT_SYMBOL_GPL vmlinux 0x02c9df3a	fuse_do_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x02ccea56	lock_policy_rwsem_write
+EXPORT_SYMBOL_GPL vmlinux 0x02fef4c4	hidinput_connect
+EXPORT_SYMBOL_GPL vmlinux 0x031a1684	mm_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x031deed8	usb_autopm_get_interface
+EXPORT_SYMBOL_GPL vmlinux 0x0343bdf1	__i2c_board_list
+EXPORT_SYMBOL_GPL vmlinux 0x03e3686c	ata_timing_cycle2mode
+EXPORT_SYMBOL_GPL vmlinux 0x04069b1d	set_irq_nested_thread
+EXPORT_SYMBOL_GPL vmlinux 0x0437b02f	ezx_pcap_read
+EXPORT_SYMBOL_GPL vmlinux 0x04486e88	rcu_batches_completed
+EXPORT_SYMBOL_GPL vmlinux 0x04ee1af0	usb_remove_hcd
+EXPORT_SYMBOL_GPL vmlinux 0x052f7ab3	klist_add_tail
+EXPORT_SYMBOL_GPL vmlinux 0x0531dcb8	ata_dev_classify
+EXPORT_SYMBOL_GPL vmlinux 0x05495392	hid_debug
+EXPORT_SYMBOL_GPL vmlinux 0x054e550b	kernel_halt
+EXPORT_SYMBOL_GPL vmlinux 0x055b678e	devres_release_group
+EXPORT_SYMBOL_GPL vmlinux 0x05895ab9	snd_soc_jack_add_gpios
+EXPORT_SYMBOL_GPL vmlinux 0x05b49b16	cpuidle_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0x0611f826	uhci_reset_hc
+EXPORT_SYMBOL_GPL vmlinux 0x0619ca8a	getboottime
+EXPORT_SYMBOL_GPL vmlinux 0x062becd9	sysfs_add_file_to_group
+EXPORT_SYMBOL_GPL vmlinux 0x064db9a5	mark_mounts_for_expiry
+EXPORT_SYMBOL_GPL vmlinux 0x06d13f1f	ring_buffer_entries_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x06effa18	sysfs_get_dirent
+EXPORT_SYMBOL_GPL vmlinux 0x06ffcdbf	regulator_count_voltages
+EXPORT_SYMBOL_GPL vmlinux 0x0720d190	sata_link_hardreset
+EXPORT_SYMBOL_GPL vmlinux 0x07399462	ata_qc_complete_multiple
+EXPORT_SYMBOL_GPL vmlinux 0x077c2277	transport_add_device
+EXPORT_SYMBOL_GPL vmlinux 0x07b52e38	rtnl_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x07d5a1cc	snd_soc_dapm_get_value_enum_double
+EXPORT_SYMBOL_GPL vmlinux 0x07f74407	eventfd_ctx_put
+EXPORT_SYMBOL_GPL vmlinux 0x07f7bd87	ata_dummy_port_info
+EXPORT_SYMBOL_GPL vmlinux 0x085a7133	snd_soc_cnew
+EXPORT_SYMBOL_GPL vmlinux 0x087bf1d8	ring_buffer_empty
+EXPORT_SYMBOL_GPL vmlinux 0x08a3e5d1	net_ipv6_ctl_path
+EXPORT_SYMBOL_GPL vmlinux 0x08a6c287	__cpufreq_driver_target
+EXPORT_SYMBOL_GPL vmlinux 0x08ba6be6	spi_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0x08ec5936	crypto_larval_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x08fd5824	ata_sff_tf_load
+EXPORT_SYMBOL_GPL vmlinux 0x091eb9b4	round_jiffies
+EXPORT_SYMBOL_GPL vmlinux 0x09733378	attribute_container_classdev_to_container
+EXPORT_SYMBOL_GPL vmlinux 0x097c9c54	register_mtd_user
+EXPORT_SYMBOL_GPL vmlinux 0x09851506	ata_sff_data_xfer
+EXPORT_SYMBOL_GPL vmlinux 0x09bdfae0	nand_wait_ready
+EXPORT_SYMBOL_GPL vmlinux 0x09fff467	crypto_blkcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0x0a358767	spi_unregister_master
+EXPORT_SYMBOL_GPL vmlinux 0x0a5c02f0	sdio_readw
+EXPORT_SYMBOL_GPL vmlinux 0x0aa56573	skb_icv_walk
+EXPORT_SYMBOL_GPL vmlinux 0x0ae21e00	ata_sas_port_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x0b07abe2	unshare_fs_struct
+EXPORT_SYMBOL_GPL vmlinux 0x0b1f3605	hidinput_find_field
+EXPORT_SYMBOL_GPL vmlinux 0x0b7866c6	regulator_get_voltage
+EXPORT_SYMBOL_GPL vmlinux 0x0b87bfe5	register_jprobe
+EXPORT_SYMBOL_GPL vmlinux 0x0bd1206f	__inet_lookup_established
+EXPORT_SYMBOL_GPL vmlinux 0x0be13004	usb_storage_usb_ids
+EXPORT_SYMBOL_GPL vmlinux 0x0c0c41a5	ring_buffer_read_finish
+EXPORT_SYMBOL_GPL vmlinux 0x0c2cdbf1	synchronize_sched
+EXPORT_SYMBOL_GPL vmlinux 0x0c461ace	nand_scan_ident
+EXPORT_SYMBOL_GPL vmlinux 0x0c6f7345	snd_soc_dapm_get_enum_double
+EXPORT_SYMBOL_GPL vmlinux 0x0cd2b184	sdhci_add_host
+EXPORT_SYMBOL_GPL vmlinux 0x0cde2d8f	ata_pci_device_do_resume
+EXPORT_SYMBOL_GPL vmlinux 0x0cf8cf15	find_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0x0d02c3aa	sata_pmp_qc_defer_cmd_switch
+EXPORT_SYMBOL_GPL vmlinux 0x0d0453a3	kset_create_and_add
+EXPORT_SYMBOL_GPL vmlinux 0x0d1aac66	i2c_new_device
+EXPORT_SYMBOL_GPL vmlinux 0x0d1c6158	devres_close_group
+EXPORT_SYMBOL_GPL vmlinux 0x0ddbf07c	fat_add_entries
+EXPORT_SYMBOL_GPL vmlinux 0x0e0f838f	fat_scan
+EXPORT_SYMBOL_GPL vmlinux 0x0e3dc66c	pxa_ac97_dai
+EXPORT_SYMBOL_GPL vmlinux 0x0e7ee11f	usb_stor_pre_reset
+EXPORT_SYMBOL_GPL vmlinux 0x0e84b514	inet6_destroy_sock
+EXPORT_SYMBOL_GPL vmlinux 0x0eaff2fd	find_vpid
+EXPORT_SYMBOL_GPL vmlinux 0x0f0c0893	ata_bus_reset
+EXPORT_SYMBOL_GPL vmlinux 0x0f2959d4	sync_filesystem
+EXPORT_SYMBOL_GPL vmlinux 0x0f2ae9a1	aead_geniv_exit
+EXPORT_SYMBOL_GPL vmlinux 0x0f454e1b	ubi_open_volume_nm
+EXPORT_SYMBOL_GPL vmlinux 0x0f482a61	security_inode_setattr
+EXPORT_SYMBOL_GPL vmlinux 0x0f8035aa	scsi_target_block
+EXPORT_SYMBOL_GPL vmlinux 0x0f966703	usb_hcd_pci_remove
+EXPORT_SYMBOL_GPL vmlinux 0x0f9b6e9b	register_net_sysctl_rotable
+EXPORT_SYMBOL_GPL vmlinux 0x0fe49f65	register_jprobes
+EXPORT_SYMBOL_GPL vmlinux 0x0febfdff	cpuidle_unregister_device
+EXPORT_SYMBOL_GPL vmlinux 0x10138352	tracing_on
+EXPORT_SYMBOL_GPL vmlinux 0x1032cef9	put_driver
+EXPORT_SYMBOL_GPL vmlinux 0x10587178	usb_get_descriptor
+EXPORT_SYMBOL_GPL vmlinux 0x1105b4ff	dm_requeue_unmapped_request
+EXPORT_SYMBOL_GPL vmlinux 0x112f75c5	input_ff_upload
+EXPORT_SYMBOL_GPL vmlinux 0x113d84be	find_module
+EXPORT_SYMBOL_GPL vmlinux 0x11793834	mv88fx_soc_platform
+EXPORT_SYMBOL_GPL vmlinux 0x11a7c1f0	hidraw_report_event
+EXPORT_SYMBOL_GPL vmlinux 0x11f447ce	__gpio_to_irq
+EXPORT_SYMBOL_GPL vmlinux 0x124f2056	crypto_get_attr_type
+EXPORT_SYMBOL_GPL vmlinux 0x1251d30f	call_rcu
+EXPORT_SYMBOL_GPL vmlinux 0x1261c7a9	usb_root_hub_lost_power
+EXPORT_SYMBOL_GPL vmlinux 0x1268f357	resume_device_irqs
+EXPORT_SYMBOL_GPL vmlinux 0x12956d95	dovefb_save_regbase
+EXPORT_SYMBOL_GPL vmlinux 0x12e5f726	simple_attr_read
+EXPORT_SYMBOL_GPL vmlinux 0x131e4abc	usb_get_current_frame_number
+EXPORT_SYMBOL_GPL vmlinux 0x133a1885	put_pid
+EXPORT_SYMBOL_GPL vmlinux 0x13b2a946	register_keyboard_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x13d32cef	snd_soc_dai_set_clkdiv
+EXPORT_SYMBOL_GPL vmlinux 0x1405828e	shash_ahash_update
+EXPORT_SYMBOL_GPL vmlinux 0x14101ff7	cpufreq_freq_attr_scaling_available_freqs
+EXPORT_SYMBOL_GPL vmlinux 0x1417c433	inet_csk_listen_stop
+EXPORT_SYMBOL_GPL vmlinux 0x1444c1fa	crypto_init_ahash_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x14485194	ring_buffer_iter_peek
+EXPORT_SYMBOL_GPL vmlinux 0x144ca71b	klist_iter_init_node
+EXPORT_SYMBOL_GPL vmlinux 0x14570de9	kobject_create_and_add
+EXPORT_SYMBOL_GPL vmlinux 0x1463b576	ata_port_schedule_eh
+EXPORT_SYMBOL_GPL vmlinux 0x147bb838	skb_cow_data
+EXPORT_SYMBOL_GPL vmlinux 0x14814fac	br_fdb_test_addr_hook
+EXPORT_SYMBOL_GPL vmlinux 0x148febb0	input_ff_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x149db923	selinux_string_to_sid
+EXPORT_SYMBOL_GPL vmlinux 0x14a0784b	sata_async_notification
+EXPORT_SYMBOL_GPL vmlinux 0x14e636cc	ring_buffer_lock_reserve
+EXPORT_SYMBOL_GPL vmlinux 0x14ebe8e1	free_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0x14f8f52a	__class_create
+EXPORT_SYMBOL_GPL vmlinux 0x155e526e	default_mtd_writev
+EXPORT_SYMBOL_GPL vmlinux 0x15641822	pci_find_next_capability
+EXPORT_SYMBOL_GPL vmlinux 0x15892417	async_synchronize_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x15986d42	cs42l51_dai
+EXPORT_SYMBOL_GPL vmlinux 0x1598dc9d	unregister_netevent_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x16008694	fs_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x167768a3	usb_get_status
+EXPORT_SYMBOL_GPL vmlinux 0x167b3cf1	ata_sff_port_start32
+EXPORT_SYMBOL_GPL vmlinux 0x16b65262	use_module
+EXPORT_SYMBOL_GPL vmlinux 0x16bef42f	crypto_shash_setkey
+EXPORT_SYMBOL_GPL vmlinux 0x16f76869	probe_kernel_read
+EXPORT_SYMBOL_GPL vmlinux 0x17806e2d	class_dev_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0x1783b255	ata_std_postreset
+EXPORT_SYMBOL_GPL vmlinux 0x17881904	unregister_mtd_user
+EXPORT_SYMBOL_GPL vmlinux 0x1792b994	attribute_container_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x1876c0c7	usb_stor_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x1883750e	da903x_write
+EXPORT_SYMBOL_GPL vmlinux 0x188ff0f7	ata_dev_disable
+EXPORT_SYMBOL_GPL vmlinux 0x1895df16	pxa2xx_ac97_write
+EXPORT_SYMBOL_GPL vmlinux 0x18bd4b22	uart_set_options
+EXPORT_SYMBOL_GPL vmlinux 0x18d53420	kgdb_register_io_module
+EXPORT_SYMBOL_GPL vmlinux 0x1916091c	usb_deregister_device_driver
+EXPORT_SYMBOL_GPL vmlinux 0x191742c6	device_release_driver
+EXPORT_SYMBOL_GPL vmlinux 0x191fb096	srcu_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x198ac96f	uio_unregister_device
+EXPORT_SYMBOL_GPL vmlinux 0x19a304ba	usb_disabled
+EXPORT_SYMBOL_GPL vmlinux 0x1a399f32	ring_buffer_overruns
+EXPORT_SYMBOL_GPL vmlinux 0x1a48984a	crypto_ahash_setkey
+EXPORT_SYMBOL_GPL vmlinux 0x1a66f551	ata_eh_analyze_ncq_error
+EXPORT_SYMBOL_GPL vmlinux 0x1afa8636	da903x_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x1b2027f4	sysfs_schedule_callback
+EXPORT_SYMBOL_GPL vmlinux 0x1b36a0d1	rtnl_link_register
+EXPORT_SYMBOL_GPL vmlinux 0x1b7f9f8a	klist_add_head
+EXPORT_SYMBOL_GPL vmlinux 0x1b9aca3f	jprobe_return
+EXPORT_SYMBOL_GPL vmlinux 0x1bb152eb	crypto_unregister_shash
+EXPORT_SYMBOL_GPL vmlinux 0x1bc3edc2	usb_stor_sense_invalidCDB
+EXPORT_SYMBOL_GPL vmlinux 0x1bc914c5	debugfs_create_x8
+EXPORT_SYMBOL_GPL vmlinux 0x1bd7a209	find_get_pid
+EXPORT_SYMBOL_GPL vmlinux 0x1bf57085	fib_rules_register
+EXPORT_SYMBOL_GPL vmlinux 0x1c054870	tasklet_hrtimer_init
+EXPORT_SYMBOL_GPL vmlinux 0x1c1502af	debugfs_create_u16
+EXPORT_SYMBOL_GPL vmlinux 0x1c233c02	__put_net
+EXPORT_SYMBOL_GPL vmlinux 0x1c25df02	pcap_to_irq
+EXPORT_SYMBOL_GPL vmlinux 0x1c617af0	inet_hash_connect
+EXPORT_SYMBOL_GPL vmlinux 0x1c7d47c3	ata_sff_drain_fifo
+EXPORT_SYMBOL_GPL vmlinux 0x1c852e7c	xfrm_calg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x1c87a811	__round_jiffies_up
+EXPORT_SYMBOL_GPL vmlinux 0x1c90688e	blk_queue_rq_timed_out
+EXPORT_SYMBOL_GPL vmlinux 0x1ccdc7f9	sysfs_remove_link
+EXPORT_SYMBOL_GPL vmlinux 0x1ce2ccaa	ata_host_alloc_pinfo
+EXPORT_SYMBOL_GPL vmlinux 0x1cff0594	shash_ahash_digest
+EXPORT_SYMBOL_GPL vmlinux 0x1d21a09c	bus_rescan_devices
+EXPORT_SYMBOL_GPL vmlinux 0x1d917739	get_task_mm
+EXPORT_SYMBOL_GPL vmlinux 0x1e47c53b	usb_deregister_dev
+EXPORT_SYMBOL_GPL vmlinux 0x1e58e2f2	cpuidle_enable_device
+EXPORT_SYMBOL_GPL vmlinux 0x1e7bbcb3	kernel_restart
+EXPORT_SYMBOL_GPL vmlinux 0x1eb9516e	round_jiffies_relative
+EXPORT_SYMBOL_GPL vmlinux 0x1ebf6c2a	pci_power_names
+EXPORT_SYMBOL_GPL vmlinux 0x1f30008e	soc_codec_dev_ad1980
+EXPORT_SYMBOL_GPL vmlinux 0x1f5492f5	crypto_dequeue_request
+EXPORT_SYMBOL_GPL vmlinux 0x1fbe3fda	usb_match_id
+EXPORT_SYMBOL_GPL vmlinux 0x1fca9523	snd_soc_jack_report
+EXPORT_SYMBOL_GPL vmlinux 0x1fcece42	inet_twdr_twcal_tick
+EXPORT_SYMBOL_GPL vmlinux 0x1fd28aef	sdio_memcpy_toio
+EXPORT_SYMBOL_GPL vmlinux 0x1fd4ef3e	ip_route_output_flow
+EXPORT_SYMBOL_GPL vmlinux 0x1fef48f6	sata_scr_write
+EXPORT_SYMBOL_GPL vmlinux 0x1fefdae5	ring_buffer_commit_overrun_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x1ffde40f	usb_stor_CB_reset
+EXPORT_SYMBOL_GPL vmlinux 0x2031b6b6	__create_workqueue_key
+EXPORT_SYMBOL_GPL vmlinux 0x20577b70	ata_do_set_mode
+EXPORT_SYMBOL_GPL vmlinux 0x20596565	usb_wait_anchor_empty_timeout
+EXPORT_SYMBOL_GPL vmlinux 0x205a177e	simple_attr_release
+EXPORT_SYMBOL_GPL vmlinux 0x20bc3470	orderly_poweroff
+EXPORT_SYMBOL_GPL vmlinux 0x215bcbe0	klist_next
+EXPORT_SYMBOL_GPL vmlinux 0x217678d3	ata_sas_slave_configure
+EXPORT_SYMBOL_GPL vmlinux 0x21a52c46	inet_csk_clone
+EXPORT_SYMBOL_GPL vmlinux 0x21c52d88	snd_soc_update_bits
+EXPORT_SYMBOL_GPL vmlinux 0x21ffe8d1	hid_dump_field
+EXPORT_SYMBOL_GPL vmlinux 0x2207b942	sata_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x22361e0b	rtc_class_close
+EXPORT_SYMBOL_GPL vmlinux 0x2270554c	fuse_conn_get
+EXPORT_SYMBOL_GPL vmlinux 0x228e36c7	attribute_container_find_class_device
+EXPORT_SYMBOL_GPL vmlinux 0x2296c00d	crypto_attr_u32
+EXPORT_SYMBOL_GPL vmlinux 0x22afc351	rt655_dai
+EXPORT_SYMBOL_GPL vmlinux 0x22b91319	usb_bulk_msg
+EXPORT_SYMBOL_GPL vmlinux 0x22daf6d6	spi_get_device_id
+EXPORT_SYMBOL_GPL vmlinux 0x22e2c20b	atomic_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x22e2ccea	sock_prot_inuse_add
+EXPORT_SYMBOL_GPL vmlinux 0x22ea8f79	page_mkclean
+EXPORT_SYMBOL_GPL vmlinux 0x230f24b9	page_cache_sync_readahead
+EXPORT_SYMBOL_GPL vmlinux 0x23327353	ata_port_probe
+EXPORT_SYMBOL_GPL vmlinux 0x233b3455	crypto_alloc_ahash
+EXPORT_SYMBOL_GPL vmlinux 0x235120ff	ata_sas_port_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x23679939	__iowrite32_copy
+EXPORT_SYMBOL_GPL vmlinux 0x23864ce7	cpuset_mem_spread_node
+EXPORT_SYMBOL_GPL vmlinux 0x23869dc7	cancel_work_sync
+EXPORT_SYMBOL_GPL vmlinux 0x23a35e49	rtnl_link_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x23b97252	fsstack_copy_inode_size
+EXPORT_SYMBOL_GPL vmlinux 0x23c525be	driver_register
+EXPORT_SYMBOL_GPL vmlinux 0x241db1df	user_update
+EXPORT_SYMBOL_GPL vmlinux 0x2434f898	class_dev_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0x246cae3b	snd_soc_set_runtime_hwparams
+EXPORT_SYMBOL_GPL vmlinux 0x247b3bd7	seq_open_net
+EXPORT_SYMBOL_GPL vmlinux 0x248162a1	register_mtd_blktrans
+EXPORT_SYMBOL_GPL vmlinux 0x249234db	sysfs_put
+EXPORT_SYMBOL_GPL vmlinux 0x2493924a	ring_buffer_resize
+EXPORT_SYMBOL_GPL vmlinux 0x24976acb	ata_eh_qc_retry
+EXPORT_SYMBOL_GPL vmlinux 0x24c1add3	__rtnl_link_register
+EXPORT_SYMBOL_GPL vmlinux 0x24d537fd	dev_attr_link_power_management_policy
+EXPORT_SYMBOL_GPL vmlinux 0x24eb7e32	leds_list
+EXPORT_SYMBOL_GPL vmlinux 0x2506b512	__rtnl_link_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x2553107f	__get_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0x256c6d38	mnt_clone_write
+EXPORT_SYMBOL_GPL vmlinux 0x258e520d	sdhci_remove_host
+EXPORT_SYMBOL_GPL vmlinux 0x25ef0265	tty_encode_baud_rate
+EXPORT_SYMBOL_GPL vmlinux 0x263db9e7	devres_find
+EXPORT_SYMBOL_GPL vmlinux 0x265be460	usb_register_device_driver
+EXPORT_SYMBOL_GPL vmlinux 0x26626544	rtc_set_time
+EXPORT_SYMBOL_GPL vmlinux 0x269ec330	usb_stor_CB_transport
+EXPORT_SYMBOL_GPL vmlinux 0x26c90ea4	scsi_eh_get_sense
+EXPORT_SYMBOL_GPL vmlinux 0x26d80797	ata_host_activate
+EXPORT_SYMBOL_GPL vmlinux 0x26fff80d	ata_host_init
+EXPORT_SYMBOL_GPL vmlinux 0x27353195	usb_stor_probe1
+EXPORT_SYMBOL_GPL vmlinux 0x27596902	get_dcookie
+EXPORT_SYMBOL_GPL vmlinux 0x27713ec1	platform_get_irq
+EXPORT_SYMBOL_GPL vmlinux 0x277e13c9	transport_remove_device
+EXPORT_SYMBOL_GPL vmlinux 0x2781fa97	sysfs_remove_file_from_group
+EXPORT_SYMBOL_GPL vmlinux 0x27d4aced	rt_mutex_lock_interruptible
+EXPORT_SYMBOL_GPL vmlinux 0x27f9112d	regulator_get_exclusive
+EXPORT_SYMBOL_GPL vmlinux 0x283b0c78	ata_pci_bmdma_init
+EXPORT_SYMBOL_GPL vmlinux 0x2853500b	ata_wait_after_reset
+EXPORT_SYMBOL_GPL vmlinux 0x289ad3af	blk_abort_request
+EXPORT_SYMBOL_GPL vmlinux 0x28b059b7	skcipher_geniv_exit
+EXPORT_SYMBOL_GPL vmlinux 0x28b2cc80	atomic_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x28d664ff	__raw_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x28e23139	xfrm_probe_algs
+EXPORT_SYMBOL_GPL vmlinux 0x295273d8	dma_run_dependencies
+EXPORT_SYMBOL_GPL vmlinux 0x298ab2b8	blk_rq_check_limits
+EXPORT_SYMBOL_GPL vmlinux 0x298f37b1	pci_slots_kset
+EXPORT_SYMBOL_GPL vmlinux 0x29b88bb2	sdev_evt_send_simple
+EXPORT_SYMBOL_GPL vmlinux 0x2a085b94	i2c_add_numbered_adapter
+EXPORT_SYMBOL_GPL vmlinux 0x2a0f43a8	clockevent_delta2ns
+EXPORT_SYMBOL_GPL vmlinux 0x2a3731a8	crypto_alloc_shash
+EXPORT_SYMBOL_GPL vmlinux 0x2a379641	snd_soc_get_volsw
+EXPORT_SYMBOL_GPL vmlinux 0x2a678a13	__suspend_report_result
+EXPORT_SYMBOL_GPL vmlinux 0x2a7d5a65	rt5630_codec_set_pll1
+EXPORT_SYMBOL_GPL vmlinux 0x2b1622cd	usb_set_device_state
+EXPORT_SYMBOL_GPL vmlinux 0x2b9f8e23	nf_net_ipv4_netfilter_sysctl_path
+EXPORT_SYMBOL_GPL vmlinux 0x2c1afb77	pci_enable_rom
+EXPORT_SYMBOL_GPL vmlinux 0x2c208607	power_supply_is_system_supplied
+EXPORT_SYMBOL_GPL vmlinux 0x2c210d56	alloc_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0x2c4f2f34	proc_net_remove
+EXPORT_SYMBOL_GPL vmlinux 0x2c6ca3ed	raw_seq_open
+EXPORT_SYMBOL_GPL vmlinux 0x2cababed	ata_port_desc
+EXPORT_SYMBOL_GPL vmlinux 0x2cc2f7da	firmware_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x2ce46fb9	fuse_conn_kill
+EXPORT_SYMBOL_GPL vmlinux 0x2ce98559	kcrypto_wq
+EXPORT_SYMBOL_GPL vmlinux 0x2cf20e94	inet_twsk_schedule
+EXPORT_SYMBOL_GPL vmlinux 0x2d10e5db	snd_soc_put_volsw_2r
+EXPORT_SYMBOL_GPL vmlinux 0x2d2b2a89	ubi_do_get_device_info
+EXPORT_SYMBOL_GPL vmlinux 0x2d4f7630	ata_sff_check_status
+EXPORT_SYMBOL_GPL vmlinux 0x2d6d3154	bus_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x2d6f7402	soc_codec_dev_ac97
+EXPORT_SYMBOL_GPL vmlinux 0x2d7a50f5	init_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0x2e3d08b9	crypto_chain
+EXPORT_SYMBOL_GPL vmlinux 0x2e47f677	xfrm_aalg_get_byidx
+EXPORT_SYMBOL_GPL vmlinux 0x2e611142	ring_buffer_record_enable_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x2e6298bc	snd_soc_info_volsw
+EXPORT_SYMBOL_GPL vmlinux 0x2e810cf9	snd_soc_dapm_new_controls
+EXPORT_SYMBOL_GPL vmlinux 0x2e93bfe7	add_mtd_blktrans_dev
+EXPORT_SYMBOL_GPL vmlinux 0x2eec013e	crypto_alloc_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x2f2e3b0d	ata_cable_80wire
+EXPORT_SYMBOL_GPL vmlinux 0x2f3ccb1a	fat_fs_error
+EXPORT_SYMBOL_GPL vmlinux 0x2f47d8c7	cpufreq_frequency_get_table
+EXPORT_SYMBOL_GPL vmlinux 0x2f5b4c04	fat_fill_super
+EXPORT_SYMBOL_GPL vmlinux 0x2f5ebc85	ata_std_prereset
+EXPORT_SYMBOL_GPL vmlinux 0x2f91d9d4	ata_sff_qc_issue
+EXPORT_SYMBOL_GPL vmlinux 0x2fbe1df5	ata_port_start
+EXPORT_SYMBOL_GPL vmlinux 0x2fcd9e17	dpm_resume_noirq
+EXPORT_SYMBOL_GPL vmlinux 0x2fe1dee8	usb_reset_configuration
+EXPORT_SYMBOL_GPL vmlinux 0x300c5e34	ata_sff_thaw
+EXPORT_SYMBOL_GPL vmlinux 0x3030ea7f	platform_driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x303ffde7	sata_link_debounce
+EXPORT_SYMBOL_GPL vmlinux 0x3042d76f	ata_do_dev_read_id
+EXPORT_SYMBOL_GPL vmlinux 0x3052e6ad	usb_anchor_urb
+EXPORT_SYMBOL_GPL vmlinux 0x3054c7a9	ata_sff_pause
+EXPORT_SYMBOL_GPL vmlinux 0x30666991	regulator_register
+EXPORT_SYMBOL_GPL vmlinux 0x310ae656	dequeue_signal
+EXPORT_SYMBOL_GPL vmlinux 0x3112d9a3	dm_put
+EXPORT_SYMBOL_GPL vmlinux 0x311b53e4	pci_stop_bus_device
+EXPORT_SYMBOL_GPL vmlinux 0x312a6227	kill_mtd_super
+EXPORT_SYMBOL_GPL vmlinux 0x315e2f1c	sdio_readb
+EXPORT_SYMBOL_GPL vmlinux 0x31d42173	crypto_alloc_instance
+EXPORT_SYMBOL_GPL vmlinux 0x31e16000	usb_control_msg
+EXPORT_SYMBOL_GPL vmlinux 0x32110665	do_kern_mount
+EXPORT_SYMBOL_GPL vmlinux 0x321c7439	blkcipher_walk_virt_block
+EXPORT_SYMBOL_GPL vmlinux 0x32d5e7fc	xfrm_aalg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x32f17454	ring_buffer_event_data
+EXPORT_SYMBOL_GPL vmlinux 0x32f2222d	usb_stor_bulk_srb
+EXPORT_SYMBOL_GPL vmlinux 0x3374900e	ata_dev_next
+EXPORT_SYMBOL_GPL vmlinux 0x3399e5f8	ring_buffer_entries
+EXPORT_SYMBOL_GPL vmlinux 0x339b2bc7	scsi_internal_device_block
+EXPORT_SYMBOL_GPL vmlinux 0x340aebb3	__inet_lookup_listener
+EXPORT_SYMBOL_GPL vmlinux 0x342bd88e	rt_mutex_lock
+EXPORT_SYMBOL_GPL vmlinux 0x34365110	driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x3441c3d6	gpio_set_value_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x344fc9e9	usb_get_urb
+EXPORT_SYMBOL_GPL vmlinux 0x3450bed8	device_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x34819c66	snd_soc_register_codec
+EXPORT_SYMBOL_GPL vmlinux 0x34f81ffe	register_kretprobes
+EXPORT_SYMBOL_GPL vmlinux 0x354f2df3	soc_codec_dev_cs42l51
+EXPORT_SYMBOL_GPL vmlinux 0x35510f3d	ata_pci_device_do_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x35a551e7	ip6_sk_dst_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x35bcc019	platform_device_add
+EXPORT_SYMBOL_GPL vmlinux 0x35bf8545	power_supply_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x35d8c94a	sdev_evt_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x362e23ec	call_rcu_bh
+EXPORT_SYMBOL_GPL vmlinux 0x364b0d46	debugfs_create_bool
+EXPORT_SYMBOL_GPL vmlinux 0x36946282	fat_alloc_new_dir
+EXPORT_SYMBOL_GPL vmlinux 0x36fa6459	pci_add_dynid
+EXPORT_SYMBOL_GPL vmlinux 0x371a79ad	sdio_readb_ext
+EXPORT_SYMBOL_GPL vmlinux 0x375d5656	blk_end_request_err
+EXPORT_SYMBOL_GPL vmlinux 0x379b3253	device_rename
+EXPORT_SYMBOL_GPL vmlinux 0x37b9cc33	ata_cable_ignore
+EXPORT_SYMBOL_GPL vmlinux 0x37d05d3c	usb_stor_access_xfer_buf
+EXPORT_SYMBOL_GPL vmlinux 0x37d7d89a	shash_attr_alg
+EXPORT_SYMBOL_GPL vmlinux 0x37ea277d	power_supply_changed
+EXPORT_SYMBOL_GPL vmlinux 0x3827f887	usb_stor_set_xfer_buf
+EXPORT_SYMBOL_GPL vmlinux 0x38a9c2c7	input_ff_effect_from_user
+EXPORT_SYMBOL_GPL vmlinux 0x38d2458c	snd_soc_dai_set_tdm_slot
+EXPORT_SYMBOL_GPL vmlinux 0x38dd6865	regulator_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x392e6f24	sata_pmp_error_handler
+EXPORT_SYMBOL_GPL vmlinux 0x393e6e9a	eventfd_signal
+EXPORT_SYMBOL_GPL vmlinux 0x3943af6e	platform_device_put
+EXPORT_SYMBOL_GPL vmlinux 0x394e54f9	register_pernet_device
+EXPORT_SYMBOL_GPL vmlinux 0x39819646	atomic_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x39ada1a7	driver_find_device
+EXPORT_SYMBOL_GPL vmlinux 0x3a02213f	snd_soc_dai_set_tristate
+EXPORT_SYMBOL_GPL vmlinux 0x3a815b25	input_ff_create
+EXPORT_SYMBOL_GPL vmlinux 0x3a8bc654	debugfs_remove
+EXPORT_SYMBOL_GPL vmlinux 0x3adb362c	eventfd_ctx_fdget
+EXPORT_SYMBOL_GPL vmlinux 0x3b7f2d65	skcipher_geniv_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x3b8d72e0	sdio_f0_readb
+EXPORT_SYMBOL_GPL vmlinux 0x3bc33f65	cleanup_srcu_struct
+EXPORT_SYMBOL_GPL vmlinux 0x3be7af02	get_max_files
+EXPORT_SYMBOL_GPL vmlinux 0x3be89d3c	usb_register_notify
+EXPORT_SYMBOL_GPL vmlinux 0x3bf75ea7	debugfs_create_blob
+EXPORT_SYMBOL_GPL vmlinux 0x3c209840	switch_dev_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x3c24e1f0	crypto_shash_update
+EXPORT_SYMBOL_GPL vmlinux 0x3c4ca177	__i2c_board_lock
+EXPORT_SYMBOL_GPL vmlinux 0x3c620029	__pci_reset_function
+EXPORT_SYMBOL_GPL vmlinux 0x3c8e8ece	relay_flush
+EXPORT_SYMBOL_GPL vmlinux 0x3c942368	profile_event_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x3c9fd896	soc_codec_dev_rt655
+EXPORT_SYMBOL_GPL vmlinux 0x3cd06035	add_input_randomness
+EXPORT_SYMBOL_GPL vmlinux 0x3cfedb3f	register_pm_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x3d388324	dpm_resume_end
+EXPORT_SYMBOL_GPL vmlinux 0x3d6c8839	cpuidle_disable_device
+EXPORT_SYMBOL_GPL vmlinux 0x3d7187c4	ring_buffer_iter_reset
+EXPORT_SYMBOL_GPL vmlinux 0x3daf1153	fuse_file_poll
+EXPORT_SYMBOL_GPL vmlinux 0x3e69b481	dev_attr_sw_activity
+EXPORT_SYMBOL_GPL vmlinux 0x3e77a4d5	devm_kzalloc
+EXPORT_SYMBOL_GPL vmlinux 0x3f01570a	probe_kernel_write
+EXPORT_SYMBOL_GPL vmlinux 0x3f07e7f0	cpufreq_frequency_table_cpuinfo
+EXPORT_SYMBOL_GPL vmlinux 0x3f238101	dcookie_register
+EXPORT_SYMBOL_GPL vmlinux 0x3f401ada	blk_queue_dma_drain
+EXPORT_SYMBOL_GPL vmlinux 0x3f9e341e	pxa2xx_ac97_finish_reset
+EXPORT_SYMBOL_GPL vmlinux 0x40015824	ata_scsi_queuecmd
+EXPORT_SYMBOL_GPL vmlinux 0x4036d101	usb_altnum_to_altsetting
+EXPORT_SYMBOL_GPL vmlinux 0x4055d929	usb_put_dev
+EXPORT_SYMBOL_GPL vmlinux 0x4072631b	add_page_wait_queue
+EXPORT_SYMBOL_GPL vmlinux 0x40af0dec	ata_xfer_mode2mask
+EXPORT_SYMBOL_GPL vmlinux 0x40d05200	ata_sff_wait_after_reset
+EXPORT_SYMBOL_GPL vmlinux 0x41191203	mtd_table
+EXPORT_SYMBOL_GPL vmlinux 0x4123f445	usb_stor_clear_halt
+EXPORT_SYMBOL_GPL vmlinux 0x41308c16	hrtimer_start_range_ns
+EXPORT_SYMBOL_GPL vmlinux 0x414848e5	usb_ep0_reinit
+EXPORT_SYMBOL_GPL vmlinux 0x414a1bd7	snd_soc_unregister_codec
+EXPORT_SYMBOL_GPL vmlinux 0x41df969d	user_match
+EXPORT_SYMBOL_GPL vmlinux 0x423694e7	ata_link_online
+EXPORT_SYMBOL_GPL vmlinux 0x42494cea	ring_buffer_event_length
+EXPORT_SYMBOL_GPL vmlinux 0x42801d20	ubi_sync
+EXPORT_SYMBOL_GPL vmlinux 0x42922835	scsi_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x429b0dc5	crypto_unregister_template
+EXPORT_SYMBOL_GPL vmlinux 0x42abfdb7	ata_sas_queuecmd
+EXPORT_SYMBOL_GPL vmlinux 0x42b16fe5	usb_autopm_get_interface_async
+EXPORT_SYMBOL_GPL vmlinux 0x43018e43	register_posix_clock
+EXPORT_SYMBOL_GPL vmlinux 0x43108ddb	disable_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0x432fd7f6	__gpio_set_value
+EXPORT_SYMBOL_GPL vmlinux 0x4374c9c6	ata_port_freeze
+EXPORT_SYMBOL_GPL vmlinux 0x43bed620	usb_autopm_put_interface_async
+EXPORT_SYMBOL_GPL vmlinux 0x43f56e82	ata_xfer_mode2shift
+EXPORT_SYMBOL_GPL vmlinux 0x4405c75d	snd_soc_dapm_get_volsw
+EXPORT_SYMBOL_GPL vmlinux 0x441a0236	ata_link_offline
+EXPORT_SYMBOL_GPL vmlinux 0x442c13bd	ata_sff_dma_pause
+EXPORT_SYMBOL_GPL vmlinux 0x4441adc0	ata_sas_scsi_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x44822bde	fat_sync_inode
+EXPORT_SYMBOL_GPL vmlinux 0x4484a5a4	wait_for_device_probe
+EXPORT_SYMBOL_GPL vmlinux 0x4484fbd5	sg_scsi_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x449be4de	input_class
+EXPORT_SYMBOL_GPL vmlinux 0x44a65d5c	lock_policy_rwsem_read
+EXPORT_SYMBOL_GPL vmlinux 0x453dbef2	snd_soc_unregister_dais
+EXPORT_SYMBOL_GPL vmlinux 0x45515109	device_remove_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0x457594fa	crypto_alg_list
+EXPORT_SYMBOL_GPL vmlinux 0x45ab153f	devres_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x45b185ae	inotify_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x45b299c6	input_ff_erase
+EXPORT_SYMBOL_GPL vmlinux 0x45bf1ff3	crypto_inc
+EXPORT_SYMBOL_GPL vmlinux 0x45c098a5	hrtimer_get_remaining
+EXPORT_SYMBOL_GPL vmlinux 0x45f843f6	usb_driver_release_interface
+EXPORT_SYMBOL_GPL vmlinux 0x460cb4d3	screen_glyph
+EXPORT_SYMBOL_GPL vmlinux 0x461b9715	power_supply_class
+EXPORT_SYMBOL_GPL vmlinux 0x46352b25	cpufreq_frequency_table_target
+EXPORT_SYMBOL_GPL vmlinux 0x464a2bf7	ata_bmdma_status
+EXPORT_SYMBOL_GPL vmlinux 0x466364ba	pxa2xx_ac97_hw_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x4672e88b	__crypto_dequeue_request
+EXPORT_SYMBOL_GPL vmlinux 0x46a57624	pciserial_suspend_ports
+EXPORT_SYMBOL_GPL vmlinux 0x46c72860	usb_bus_list_lock
+EXPORT_SYMBOL_GPL vmlinux 0x46eb45e5	sdhci_resume_host
+EXPORT_SYMBOL_GPL vmlinux 0x470831d2	usb_init_urb
+EXPORT_SYMBOL_GPL vmlinux 0x47138204	ata_pci_device_resume
+EXPORT_SYMBOL_GPL vmlinux 0x47229b5c	gpio_request
+EXPORT_SYMBOL_GPL vmlinux 0x47710cee	pci_ioremap_bar
+EXPORT_SYMBOL_GPL vmlinux 0x479a6067	fat_time_unix2fat
+EXPORT_SYMBOL_GPL vmlinux 0x47a24c52	ata_sff_irq_on
+EXPORT_SYMBOL_GPL vmlinux 0x47c6d11d	sdio_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0x4839f6e6	ata_host_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x48753cd8	dev_set_name
+EXPORT_SYMBOL_GPL vmlinux 0x48bf5dac	sysfs_create_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0x48c02fb6	do_add_mount
+EXPORT_SYMBOL_GPL vmlinux 0x48cd4a54	__lock_page_killable
+EXPORT_SYMBOL_GPL vmlinux 0x48ced0ab	platform_device_del
+EXPORT_SYMBOL_GPL vmlinux 0x48e50714	pcap_set_ts_bits
+EXPORT_SYMBOL_GPL vmlinux 0x48e7a34c	uhci_check_and_reset_hc
+EXPORT_SYMBOL_GPL vmlinux 0x48fc30c4	unregister_kretprobes
+EXPORT_SYMBOL_GPL vmlinux 0x49365915	snd_soc_codec_set_cache_io
+EXPORT_SYMBOL_GPL vmlinux 0x49653d16	sdio_f0_writeb
+EXPORT_SYMBOL_GPL vmlinux 0x499043d3	crypto_init_queue
+EXPORT_SYMBOL_GPL vmlinux 0x499e7250	ata_port_abort
+EXPORT_SYMBOL_GPL vmlinux 0x49a0e8e5	snd_soc_dapm_put_value_enum_double
+EXPORT_SYMBOL_GPL vmlinux 0x4a27ff8f	sdio_claim_host
+EXPORT_SYMBOL_GPL vmlinux 0x4a595941	snd_soc_free_pcms
+EXPORT_SYMBOL_GPL vmlinux 0x4a9b8754	switch_dev_register
+EXPORT_SYMBOL_GPL vmlinux 0x4ab571cd	ahash_attr_alg
+EXPORT_SYMBOL_GPL vmlinux 0x4ac5a0ab	ata_sff_softreset
+EXPORT_SYMBOL_GPL vmlinux 0x4afd5af9	snd_soc_new_ac97_codec
+EXPORT_SYMBOL_GPL vmlinux 0x4b314c75	ata_sff_error_handler
+EXPORT_SYMBOL_GPL vmlinux 0x4b37a0d3	pxa2xx_soc_platform
+EXPORT_SYMBOL_GPL vmlinux 0x4b6ba196	skb_tstamp_tx
+EXPORT_SYMBOL_GPL vmlinux 0x4b91d213	nf_unregister_queue_handlers
+EXPORT_SYMBOL_GPL vmlinux 0x4b9a032b	rtc_class_open
+EXPORT_SYMBOL_GPL vmlinux 0x4bcd0d56	usb_match_one_id
+EXPORT_SYMBOL_GPL vmlinux 0x4c2c0975	fib_rules_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x4c3cb51a	usb_stor_post_reset
+EXPORT_SYMBOL_GPL vmlinux 0x4c3e2ccd	power_supply_get_by_name
+EXPORT_SYMBOL_GPL vmlinux 0x4c46f0e9	fat_dir_empty
+EXPORT_SYMBOL_GPL vmlinux 0x4c5ec710	usb_free_urb
+EXPORT_SYMBOL_GPL vmlinux 0x4c665418	usb_driver_claim_interface
+EXPORT_SYMBOL_GPL vmlinux 0x4c759827	byte_rev_table
+EXPORT_SYMBOL_GPL vmlinux 0x4c848371	tcp_orphan_count
+EXPORT_SYMBOL_GPL vmlinux 0x4ca516d8	sysfs_create_group
+EXPORT_SYMBOL_GPL vmlinux 0x4d088a16	securityfs_remove
+EXPORT_SYMBOL_GPL vmlinux 0x4d0f90cf	ahash_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0x4d1424c3	generic_drop_inode
+EXPORT_SYMBOL_GPL vmlinux 0x4d260a5a	fib_rules_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x4d48e811	nand_scan
+EXPORT_SYMBOL_GPL vmlinux 0x4d5284ac	bus_for_each_dev
+EXPORT_SYMBOL_GPL vmlinux 0x4d5b4d13	drop_file_write_access
+EXPORT_SYMBOL_GPL vmlinux 0x4d8f4c15	klist_add_before
+EXPORT_SYMBOL_GPL vmlinux 0x4d95d1c8	usb_reset_endpoint
+EXPORT_SYMBOL_GPL vmlinux 0x4dc75183	fsnotify
+EXPORT_SYMBOL_GPL vmlinux 0x4df0e225	crypto_givcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0x4df5587e	ata_timing_compute
+EXPORT_SYMBOL_GPL vmlinux 0x4e64ea28	tty_prepare_flip_string_flags
+EXPORT_SYMBOL_GPL vmlinux 0x4eb48637	lookup_create
+EXPORT_SYMBOL_GPL vmlinux 0x4ebf359d	rtc_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x4ec95390	regulator_set_mode
+EXPORT_SYMBOL_GPL vmlinux 0x4eeb6e9a	tcp_unregister_congestion_control
+EXPORT_SYMBOL_GPL vmlinux 0x4f500b66	snd_soc_get_value_enum_double
+EXPORT_SYMBOL_GPL vmlinux 0x4f6ab79e	ring_buffer_reset_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x4f743bdb	hrtimer_try_to_cancel
+EXPORT_SYMBOL_GPL vmlinux 0x4fd9bade	hidraw_connect
+EXPORT_SYMBOL_GPL vmlinux 0x4fdc945d	sata_deb_timing_normal
+EXPORT_SYMBOL_GPL vmlinux 0x4fe0db6b	pci_renumber_slot
+EXPORT_SYMBOL_GPL vmlinux 0x50276e01	sdio_get_host_pm_caps
+EXPORT_SYMBOL_GPL vmlinux 0x5063a313	sysfs_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x5086ac3a	alg_test
+EXPORT_SYMBOL_GPL vmlinux 0x5096c8a7	fuse_abort_conn
+EXPORT_SYMBOL_GPL vmlinux 0x50a08240	ata_host_detach
+EXPORT_SYMBOL_GPL vmlinux 0x50c84b4e	sdio_set_block_size
+EXPORT_SYMBOL_GPL vmlinux 0x50de4258	blk_queue_rq_timeout
+EXPORT_SYMBOL_GPL vmlinux 0x50e7193a	__i2c_first_dynamic_bus_num
+EXPORT_SYMBOL_GPL vmlinux 0x50f5e532	call_rcu_sched
+EXPORT_SYMBOL_GPL vmlinux 0x50fad434	round_jiffies_up
+EXPORT_SYMBOL_GPL vmlinux 0x516e2739	usb_get_intf
+EXPORT_SYMBOL_GPL vmlinux 0x51847396	scsi_internal_device_unblock
+EXPORT_SYMBOL_GPL vmlinux 0x51a112fe	ubi_leb_change
+EXPORT_SYMBOL_GPL vmlinux 0x51a1317e	console_drivers
+EXPORT_SYMBOL_GPL vmlinux 0x523ab537	securityfs_create_dir
+EXPORT_SYMBOL_GPL vmlinux 0x523fe2ef	snd_soc_suspend_device
+EXPORT_SYMBOL_GPL vmlinux 0x528a9168	debugfs_create_u32
+EXPORT_SYMBOL_GPL vmlinux 0x52d0361e	bus_register
+EXPORT_SYMBOL_GPL vmlinux 0x52d111ea	pm_qos_update_requirement
+EXPORT_SYMBOL_GPL vmlinux 0x53614269	get_cpu_idle_time_us
+EXPORT_SYMBOL_GPL vmlinux 0x5365130f	snd_soc_dapm_free
+EXPORT_SYMBOL_GPL vmlinux 0x536df2f8	ata_pci_sff_init_one
+EXPORT_SYMBOL_GPL vmlinux 0x53986488	register_die_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x53a39341	crypto_unregister_alg
+EXPORT_SYMBOL_GPL vmlinux 0x53bbc522	sysdev_show_int
+EXPORT_SYMBOL_GPL vmlinux 0x53c1d06d	hidinput_disconnect
+EXPORT_SYMBOL_GPL vmlinux 0x53c97b60	regulator_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x53d7e4d9	regulator_get_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0x540a8b24	ubi_get_volume_info
+EXPORT_SYMBOL_GPL vmlinux 0x543350de	usb_hcd_pci_pm_ops
+EXPORT_SYMBOL_GPL vmlinux 0x5460c8d8	fsnotify_get_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x546cb4f3	pci_bus_max_busnr
+EXPORT_SYMBOL_GPL vmlinux 0x546e0c97	sdev_evt_send
+EXPORT_SYMBOL_GPL vmlinux 0x54776bc1	crypto_shash_final
+EXPORT_SYMBOL_GPL vmlinux 0x5478e857	inotify_dentry_parent_queue_event
+EXPORT_SYMBOL_GPL vmlinux 0x547cbcf0	disk_part_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0x549525ef	handle_nested_irq
+EXPORT_SYMBOL_GPL vmlinux 0x54a56621	__inet_twsk_hashdance
+EXPORT_SYMBOL_GPL vmlinux 0x5542b913	cpu_bit_bitmap
+EXPORT_SYMBOL_GPL vmlinux 0x557db11d	ata_pci_remove_one
+EXPORT_SYMBOL_GPL vmlinux 0x55b1e7e1	synchronize_srcu
+EXPORT_SYMBOL_GPL vmlinux 0x560670fe	fuse_sync_release
+EXPORT_SYMBOL_GPL vmlinux 0x561daa90	led_trigger_remove
+EXPORT_SYMBOL_GPL vmlinux 0x5630c57e	usb_poison_urb
+EXPORT_SYMBOL_GPL vmlinux 0x56310925	regulator_mode_to_status
+EXPORT_SYMBOL_GPL vmlinux 0x5641485b	tty_termios_encode_baud_rate
+EXPORT_SYMBOL_GPL vmlinux 0x5685fbbc	da903x_reads
+EXPORT_SYMBOL_GPL vmlinux 0x569a41a2	class_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x56a349fa	usb_alloc_urb
+EXPORT_SYMBOL_GPL vmlinux 0x56a4d329	sdhci_alloc_host
+EXPORT_SYMBOL_GPL vmlinux 0x56b175c4	invalidate_inode_pages2
+EXPORT_SYMBOL_GPL vmlinux 0x56bce3e6	usb_buffer_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x56d42418	thread_notify_head
+EXPORT_SYMBOL_GPL vmlinux 0x56d69369	hrtimer_cancel
+EXPORT_SYMBOL_GPL vmlinux 0x56db7602	shash_free_instance
+EXPORT_SYMBOL_GPL vmlinux 0x56f8b828	sdio_writesb
+EXPORT_SYMBOL_GPL vmlinux 0x570a6fa2	lookup_instantiate_filp
+EXPORT_SYMBOL_GPL vmlinux 0x57152048	sdio_disable_func
+EXPORT_SYMBOL_GPL vmlinux 0x5731d1e4	input_ff_create_memless
+EXPORT_SYMBOL_GPL vmlinux 0x57520aac	rdev_get_dev
+EXPORT_SYMBOL_GPL vmlinux 0x575ad58d	crypto_nivaead_type
+EXPORT_SYMBOL_GPL vmlinux 0x5767a5b3	inotify_rm_wd
+EXPORT_SYMBOL_GPL vmlinux 0x5787efac	usb_add_hcd
+EXPORT_SYMBOL_GPL vmlinux 0x579e0bf5	rtnl_unregister_all
+EXPORT_SYMBOL_GPL vmlinux 0x57ad261f	crypto_init_spawn2
+EXPORT_SYMBOL_GPL vmlinux 0x58157640	scatterwalk_map
+EXPORT_SYMBOL_GPL vmlinux 0x58321401	macvlan_handle_frame_hook
+EXPORT_SYMBOL_GPL vmlinux 0x588525ed	dev_attr_em_message_type
+EXPORT_SYMBOL_GPL vmlinux 0x588e6129	usb_find_interface
+EXPORT_SYMBOL_GPL vmlinux 0x589c3e80	register_pernet_subsys
+EXPORT_SYMBOL_GPL vmlinux 0x58ca4dcb	snd_soc_new_pcms
+EXPORT_SYMBOL_GPL vmlinux 0x58e8f778	usb_unlink_urb
+EXPORT_SYMBOL_GPL vmlinux 0x597d3ebc	rt_mutex_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x59862110	pcap_adc_async
+EXPORT_SYMBOL_GPL vmlinux 0x5993eb69	crypto_shash_finup
+EXPORT_SYMBOL_GPL vmlinux 0x59c71e2e	led_classdev_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x59ca3224	inet_twdr_twkill_work
+EXPORT_SYMBOL_GPL vmlinux 0x5a3da643	scsi_get_vpd_page
+EXPORT_SYMBOL_GPL vmlinux 0x5a43578d	file_ra_state_init
+EXPORT_SYMBOL_GPL vmlinux 0x5a48f457	ring_buffer_free_read_page
+EXPORT_SYMBOL_GPL vmlinux 0x5a543d32	inet_hashinfo_init
+EXPORT_SYMBOL_GPL vmlinux 0x5a7bfe41	crypto_probing_notify
+EXPORT_SYMBOL_GPL vmlinux 0x5a86bae0	dovefb_set_gpio
+EXPORT_SYMBOL_GPL vmlinux 0x5ab2dcc7	hid_add_device
+EXPORT_SYMBOL_GPL vmlinux 0x5abecf4a	usb_create_hcd
+EXPORT_SYMBOL_GPL vmlinux 0x5ac40aad	platform_get_irq_byname
+EXPORT_SYMBOL_GPL vmlinux 0x5ae80cb0	cpufreq_cpu_get
+EXPORT_SYMBOL_GPL vmlinux 0x5b47cb01	usb_unpoison_urb
+EXPORT_SYMBOL_GPL vmlinux 0x5b5513e0	inet_diag_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x5b7dae12	ehci_cf_port_reset_rwsem
+EXPORT_SYMBOL_GPL vmlinux 0x5bfc03c3	unregister_keyboard_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5c06abff	inet_unhash
+EXPORT_SYMBOL_GPL vmlinux 0x5c38dddd	crypto_alloc_ablkcipher
+EXPORT_SYMBOL_GPL vmlinux 0x5c3d5b2e	blk_rq_unprep_clone
+EXPORT_SYMBOL_GPL vmlinux 0x5c477d2a	fat_setattr
+EXPORT_SYMBOL_GPL vmlinux 0x5c5f17e2	ring_buffer_reset
+EXPORT_SYMBOL_GPL vmlinux 0x5c9a2595	deregister_mtd_parser
+EXPORT_SYMBOL_GPL vmlinux 0x5cb14675	dovefb_get_current_setting
+EXPORT_SYMBOL_GPL vmlinux 0x5cccf89b	get_sb_mtd
+EXPORT_SYMBOL_GPL vmlinux 0x5cecb559	__rtnl_register
+EXPORT_SYMBOL_GPL vmlinux 0x5cf5b745	crypto_mod_get
+EXPORT_SYMBOL_GPL vmlinux 0x5d0f6f57	kbd_table
+EXPORT_SYMBOL_GPL vmlinux 0x5d31f4b7	dm_device_name
+EXPORT_SYMBOL_GPL vmlinux 0x5d4a4572	ktime_sub_ns
+EXPORT_SYMBOL_GPL vmlinux 0x5d6080f0	sata_scr_write_flush
+EXPORT_SYMBOL_GPL vmlinux 0x5d6a81ee	crypto_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x5d730e7b	raw_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x5d97ccab	da903x_update
+EXPORT_SYMBOL_GPL vmlinux 0x5d9d51e9	crypto_rng_type
+EXPORT_SYMBOL_GPL vmlinux 0x5db02f45	pci_test_config_bits
+EXPORT_SYMBOL_GPL vmlinux 0x5db0b8db	anon_transport_class_register
+EXPORT_SYMBOL_GPL vmlinux 0x5dd67618	register_netevent_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5ddd1a9c	fuse_put_request
+EXPORT_SYMBOL_GPL vmlinux 0x5e1d3d95	usb_deregister
+EXPORT_SYMBOL_GPL vmlinux 0x5e2d1db3	irq_to_pcap
+EXPORT_SYMBOL_GPL vmlinux 0x5e34f1bf	skb_morph
+EXPORT_SYMBOL_GPL vmlinux 0x5e63b8b5	__module_text_address
+EXPORT_SYMBOL_GPL vmlinux 0x5e791f27	snd_soc_dapm_new_control
+EXPORT_SYMBOL_GPL vmlinux 0x5f0af3eb	sdio_claim_irq
+EXPORT_SYMBOL_GPL vmlinux 0x5f124176	ubi_close_volume
+EXPORT_SYMBOL_GPL vmlinux 0x5f14c9dc	rdev_get_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0x5f1cced5	scatterwalk_start
+EXPORT_SYMBOL_GPL vmlinux 0x5f6af078	regulator_set_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0x5fb98e1c	cpufreq_cpu_put
+EXPORT_SYMBOL_GPL vmlinux 0x5fbcb4eb	usb_reset_device
+EXPORT_SYMBOL_GPL vmlinux 0x5fcdec5d	xfrm_ealg_get_byidx
+EXPORT_SYMBOL_GPL vmlinux 0x5fe49ca1	ata_sff_wait_ready
+EXPORT_SYMBOL_GPL vmlinux 0x6049314a	sata_scr_read
+EXPORT_SYMBOL_GPL vmlinux 0x60a07844	__mmdrop
+EXPORT_SYMBOL_GPL vmlinux 0x60a13e90	rcu_barrier
+EXPORT_SYMBOL_GPL vmlinux 0x60d47a41	ata_bmdma_stop
+EXPORT_SYMBOL_GPL vmlinux 0x60d6cf56	__scsi_get_command
+EXPORT_SYMBOL_GPL vmlinux 0x61652fed	regulator_set_current_limit
+EXPORT_SYMBOL_GPL vmlinux 0x619b4391	put_device
+EXPORT_SYMBOL_GPL vmlinux 0x61b79b7a	cpufreq_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0x61c8ea20	raw_seq_start
+EXPORT_SYMBOL_GPL vmlinux 0x61e5f852	ip6_local_out
+EXPORT_SYMBOL_GPL vmlinux 0x622b3e2c	srcu_read_lock
+EXPORT_SYMBOL_GPL vmlinux 0x629a7f6e	do_posix_clock_nonanosleep
+EXPORT_SYMBOL_GPL vmlinux 0x62b5aaac	spi_alloc_device
+EXPORT_SYMBOL_GPL vmlinux 0x63240f4d	bus_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x633a4c73	snd_soc_dapm_get_pin_switch
+EXPORT_SYMBOL_GPL vmlinux 0x640993b4	platform_device_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x641bd11c	snd_soc_register_dais
+EXPORT_SYMBOL_GPL vmlinux 0x6460d7a8	anon_inode_getfile
+EXPORT_SYMBOL_GPL vmlinux 0x649e9592	klist_init
+EXPORT_SYMBOL_GPL vmlinux 0x64e9c6e2	sdio_readsb
+EXPORT_SYMBOL_GPL vmlinux 0x650900ee	platform_add_devices
+EXPORT_SYMBOL_GPL vmlinux 0x652de132	k_handler
+EXPORT_SYMBOL_GPL vmlinux 0x65310641	dapm_reg_event
+EXPORT_SYMBOL_GPL vmlinux 0x6555b820	rt_mutex_trylock
+EXPORT_SYMBOL_GPL vmlinux 0x656381de	snd_soc_get_enum_double
+EXPORT_SYMBOL_GPL vmlinux 0x65ccb6f0	call_netevent_notifiers
+EXPORT_SYMBOL_GPL vmlinux 0x65cd7928	proc_net_fops_create
+EXPORT_SYMBOL_GPL vmlinux 0x65d6d0f0	gpio_direction_input
+EXPORT_SYMBOL_GPL vmlinux 0x65e59f44	usb_set_interface
+EXPORT_SYMBOL_GPL vmlinux 0x661601de	sprint_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x668402aa	crypto_put_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x6690f0c0	sysdev_store_int
+EXPORT_SYMBOL_GPL vmlinux 0x66adb313	platform_device_add_data
+EXPORT_SYMBOL_GPL vmlinux 0x66b2a859	nr_free_buffer_pages
+EXPORT_SYMBOL_GPL vmlinux 0x66d87d38	symbol_put_addr
+EXPORT_SYMBOL_GPL vmlinux 0x66ead7f5	queue_delayed_work
+EXPORT_SYMBOL_GPL vmlinux 0x6744c764	usb_ifnum_to_if
+EXPORT_SYMBOL_GPL vmlinux 0x6780df8d	inet6_csk_reqsk_queue_hash_add
+EXPORT_SYMBOL_GPL vmlinux 0x67955ce6	profile_hits
+EXPORT_SYMBOL_GPL vmlinux 0x679a8805	sata_pmp_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x67b5814f	sysdev_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x67d83200	inotify_init
+EXPORT_SYMBOL_GPL vmlinux 0x68103b2d	usb_usual_ignore_device
+EXPORT_SYMBOL_GPL vmlinux 0x681dddc6	get_net_ns_by_pid
+EXPORT_SYMBOL_GPL vmlinux 0x6821f7b6	debugfs_create_u8
+EXPORT_SYMBOL_GPL vmlinux 0x6829375a	__inet_inherit_port
+EXPORT_SYMBOL_GPL vmlinux 0x683b9094	__blk_put_request
+EXPORT_SYMBOL_GPL vmlinux 0x683d21f0	uart_console_write
+EXPORT_SYMBOL_GPL vmlinux 0x6841918a	crypto_register_alg
+EXPORT_SYMBOL_GPL vmlinux 0x686c703f	xfrm_count_auth_supported
+EXPORT_SYMBOL_GPL vmlinux 0x687c7ff7	w1_next_pullup
+EXPORT_SYMBOL_GPL vmlinux 0x6892088c	unregister_pm_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x68a6d293	pci_find_next_ht_capability
+EXPORT_SYMBOL_GPL vmlinux 0x68ff57d6	ata_ehi_clear_desc
+EXPORT_SYMBOL_GPL vmlinux 0x6900104c	tty_buffer_request_room
+EXPORT_SYMBOL_GPL vmlinux 0x690f2a0c	crypto_alg_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x6911bdbc	user_instantiate
+EXPORT_SYMBOL_GPL vmlinux 0x693e66fb	gpio_export_link
+EXPORT_SYMBOL_GPL vmlinux 0x6948230b	rtc_update_irq
+EXPORT_SYMBOL_GPL vmlinux 0x69750caa	usb_stor_bulk_transfer_sg
+EXPORT_SYMBOL_GPL vmlinux 0x69d8ae91	crypto_grab_aead
+EXPORT_SYMBOL_GPL vmlinux 0x69db9e57	get_cpu_sysdev
+EXPORT_SYMBOL_GPL vmlinux 0x69df849e	ubi_leb_erase
+EXPORT_SYMBOL_GPL vmlinux 0x69e9a2cb	ata_scsi_slave_config
+EXPORT_SYMBOL_GPL vmlinux 0x6a3dd5ba	usb_submit_urb
+EXPORT_SYMBOL_GPL vmlinux 0x6a60db87	inotify_rm_watch
+EXPORT_SYMBOL_GPL vmlinux 0x6a859e6f	dev_attr_unload_heads
+EXPORT_SYMBOL_GPL vmlinux 0x6a88e627	unregister_net_sysctl_table
+EXPORT_SYMBOL_GPL vmlinux 0x6a96f6d2	bus_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x6abfa560	fat_getattr
+EXPORT_SYMBOL_GPL vmlinux 0x6ae69792	class_compat_create_link
+EXPORT_SYMBOL_GPL vmlinux 0x6b157df3	snd_soc_get_volsw_2r
+EXPORT_SYMBOL_GPL vmlinux 0x6b1c704d	relay_buf_full
+EXPORT_SYMBOL_GPL vmlinux 0x6b21af2d	regulator_bulk_enable
+EXPORT_SYMBOL_GPL vmlinux 0x6bca2457	fuse_direct_io
+EXPORT_SYMBOL_GPL vmlinux 0x6bcb183a	tty_ldisc_flush
+EXPORT_SYMBOL_GPL vmlinux 0x6c27d9d3	fat_flush_inodes
+EXPORT_SYMBOL_GPL vmlinux 0x6c388fcc	device_add
+EXPORT_SYMBOL_GPL vmlinux 0x6c49c4f2	clockevents_notify
+EXPORT_SYMBOL_GPL vmlinux 0x6c773350	usb_get_dev
+EXPORT_SYMBOL_GPL vmlinux 0x6c783250	sched_setscheduler
+EXPORT_SYMBOL_GPL vmlinux 0x6c7f6bf4	devres_add
+EXPORT_SYMBOL_GPL vmlinux 0x6c8d5ae8	__gpio_get_value
+EXPORT_SYMBOL_GPL vmlinux 0x6c8eb98f	xfrm_aalg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0x6ce88eb3	usb_autopm_set_interface
+EXPORT_SYMBOL_GPL vmlinux 0x6d1f090b	regulator_get_mode
+EXPORT_SYMBOL_GPL vmlinux 0x6d2fc5a6	net_namespace_list
+EXPORT_SYMBOL_GPL vmlinux 0x6d50e282	ring_buffer_iter_empty
+EXPORT_SYMBOL_GPL vmlinux 0x6d7786e8	snd_soc_info_volsw_s8
+EXPORT_SYMBOL_GPL vmlinux 0x6d7c1d6d	snd_soc_dapm_enable_pin
+EXPORT_SYMBOL_GPL vmlinux 0x6dcfd189	cpufreq_driver_target
+EXPORT_SYMBOL_GPL vmlinux 0x6e50c4f2	gpiochip_add
+EXPORT_SYMBOL_GPL vmlinux 0x6e56e2e8	generic_fh_to_parent
+EXPORT_SYMBOL_GPL vmlinux 0x6e5ff68a	inet_csk_get_port
+EXPORT_SYMBOL_GPL vmlinux 0x6e7474fc	xfrm_ealg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x6ef286a9	cpufreq_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0x6f09ba8a	ubi_register_volume_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x6f55ede3	soc_codec_dev_ad1888
+EXPORT_SYMBOL_GPL vmlinux 0x6f583c7c	ata_bmdma_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x6f5c80fd	crypto_drop_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x6f6cc76a	pxa_ac97_surround_dai
+EXPORT_SYMBOL_GPL vmlinux 0x6f7d1e21	snd_soc_test_bits
+EXPORT_SYMBOL_GPL vmlinux 0x6ff607b6	crypto_get_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x70235026	locks_release_private
+EXPORT_SYMBOL_GPL vmlinux 0x7033a466	ring_buffer_normalize_time_stamp
+EXPORT_SYMBOL_GPL vmlinux 0x706a0dc2	transport_configure_device
+EXPORT_SYMBOL_GPL vmlinux 0x706b3a33	cpufreq_frequency_table_get_attr
+EXPORT_SYMBOL_GPL vmlinux 0x7078feb9	cpuidle_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0x707ff1bb	ata_xfer_mask2mode
+EXPORT_SYMBOL_GPL vmlinux 0x70d60cf0	user_describe
+EXPORT_SYMBOL_GPL vmlinux 0x71085307	power_supply_set_battery_charged
+EXPORT_SYMBOL_GPL vmlinux 0x710ff323	inet_ctl_sock_create
+EXPORT_SYMBOL_GPL vmlinux 0x71590781	fuse_dev_operations
+EXPORT_SYMBOL_GPL vmlinux 0x716265c7	debugfs_initialized
+EXPORT_SYMBOL_GPL vmlinux 0x7196534c	device_create_vargs
+EXPORT_SYMBOL_GPL vmlinux 0x71bd413d	bus_for_each_drv
+EXPORT_SYMBOL_GPL vmlinux 0x71c8bc95	kgdb_unregister_io_module
+EXPORT_SYMBOL_GPL vmlinux 0x71f9246a	leds_list_lock
+EXPORT_SYMBOL_GPL vmlinux 0x723a19d9	regulator_put
+EXPORT_SYMBOL_GPL vmlinux 0x7278d328	all_vm_events
+EXPORT_SYMBOL_GPL vmlinux 0x72aa965a	ata_pci_sff_init_host
+EXPORT_SYMBOL_GPL vmlinux 0x73161c6f	pciserial_resume_ports
+EXPORT_SYMBOL_GPL vmlinux 0x738cee6d	blkcipher_walk_phys
+EXPORT_SYMBOL_GPL vmlinux 0x73912618	scsi_schedule_eh
+EXPORT_SYMBOL_GPL vmlinux 0x73a48b4a	ata_sff_std_ports
+EXPORT_SYMBOL_GPL vmlinux 0x7418dc29	w1_write_8
+EXPORT_SYMBOL_GPL vmlinux 0x743a165e	ata_pack_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0x746d1fe1	led_trigger_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x747ccecb	usb_stor_resume
+EXPORT_SYMBOL_GPL vmlinux 0x748917bc	da903x_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x749e6786	switch_set_state
+EXPORT_SYMBOL_GPL vmlinux 0x74abdafa	task_handoff_register
+EXPORT_SYMBOL_GPL vmlinux 0x74baf17a	tracing_is_on
+EXPORT_SYMBOL_GPL vmlinux 0x7559c689	pci_bus_add_device
+EXPORT_SYMBOL_GPL vmlinux 0x75e8f3c3	crypto_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x761188fd	dpm_suspend_noirq
+EXPORT_SYMBOL_GPL vmlinux 0x77036f55	snd_soc_dapm_add_routes
+EXPORT_SYMBOL_GPL vmlinux 0x773ca527	init_uts_ns
+EXPORT_SYMBOL_GPL vmlinux 0x77467f56	inet6_lookup_listener
+EXPORT_SYMBOL_GPL vmlinux 0x77d15959	sdio_release_irq
+EXPORT_SYMBOL_GPL vmlinux 0x781acb7a	__ring_buffer_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x781e41af	kobject_uevent_env
+EXPORT_SYMBOL_GPL vmlinux 0x78363af2	vfs_kern_mount
+EXPORT_SYMBOL_GPL vmlinux 0x786cb334	pxa2xx_ac97_hw_remove
+EXPORT_SYMBOL_GPL vmlinux 0x7891de24	sysdev_class_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x78af7c8f	init_srcu_struct
+EXPORT_SYMBOL_GPL vmlinux 0x78e4a4ee	klist_add_after
+EXPORT_SYMBOL_GPL vmlinux 0x78f86b1f	crypto_ahash_finup
+EXPORT_SYMBOL_GPL vmlinux 0x7923a20f	get_inotify_watch
+EXPORT_SYMBOL_GPL vmlinux 0x7933019a	inet_csk_listen_start
+EXPORT_SYMBOL_GPL vmlinux 0x793bd736	debugfs_create_u64
+EXPORT_SYMBOL_GPL vmlinux 0x7944e0fc	tracing_off
+EXPORT_SYMBOL_GPL vmlinux 0x7948d109	srcu_read_unlock
+EXPORT_SYMBOL_GPL vmlinux 0x7952b531	bus_find_device_by_name
+EXPORT_SYMBOL_GPL vmlinux 0x7976abde	tty_put_char
+EXPORT_SYMBOL_GPL vmlinux 0x797814d9	sata_link_resume
+EXPORT_SYMBOL_GPL vmlinux 0x798bf3b3	generic_detach_inode
+EXPORT_SYMBOL_GPL vmlinux 0x799e78ab	regulator_set_voltage
+EXPORT_SYMBOL_GPL vmlinux 0x79d2f8a1	usb_anchor_empty
+EXPORT_SYMBOL_GPL vmlinux 0x79dd5ec0	ring_buffer_peek
+EXPORT_SYMBOL_GPL vmlinux 0x79ec1852	ata_sas_port_stop
+EXPORT_SYMBOL_GPL vmlinux 0x7a39dfd2	blk_insert_cloned_request
+EXPORT_SYMBOL_GPL vmlinux 0x7a4d4af1	ata_port_pbar_desc
+EXPORT_SYMBOL_GPL vmlinux 0x7a7f47af	ata_sff_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x7a8485dc	led_trigger_set_default
+EXPORT_SYMBOL_GPL vmlinux 0x7ab40cd8	dm_disk
+EXPORT_SYMBOL_GPL vmlinux 0x7abdda52	snd_soc_codec_volatile_register
+EXPORT_SYMBOL_GPL vmlinux 0x7adcd8f1	device_create_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0x7ae1ae8e	cpufreq_frequency_table_put_attr
+EXPORT_SYMBOL_GPL vmlinux 0x7b25e506	snd_soc_jack_add_pins
+EXPORT_SYMBOL_GPL vmlinux 0x7b3d39f9	raw_seq_stop
+EXPORT_SYMBOL_GPL vmlinux 0x7b7528c5	fuse_request_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x7bf15c64	inotify_remove_watch_locked
+EXPORT_SYMBOL_GPL vmlinux 0x7c26609f	attribute_container_register
+EXPORT_SYMBOL_GPL vmlinux 0x7c2eb9f7	ring_buffer_free
+EXPORT_SYMBOL_GPL vmlinux 0x7c2f2afb	w1_calc_crc8
+EXPORT_SYMBOL_GPL vmlinux 0x7c538b77	hid_connect
+EXPORT_SYMBOL_GPL vmlinux 0x7c595934	ring_buffer_alloc_read_page
+EXPORT_SYMBOL_GPL vmlinux 0x7c62ff61	ata_pci_device_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x7c6784ef	ktime_get_real
+EXPORT_SYMBOL_GPL vmlinux 0x7c97abfe	driver_for_each_device
+EXPORT_SYMBOL_GPL vmlinux 0x7d4ce279	nf_unregister_afinfo
+EXPORT_SYMBOL_GPL vmlinux 0x7d5159a0	sock_prot_inuse_get
+EXPORT_SYMBOL_GPL vmlinux 0x7d700462	tcp_init_congestion_ops
+EXPORT_SYMBOL_GPL vmlinux 0x7d720e26	scsi_flush_work
+EXPORT_SYMBOL_GPL vmlinux 0x7d86888f	tcp_twsk_unique
+EXPORT_SYMBOL_GPL vmlinux 0x7d935d4f	seq_release_net
+EXPORT_SYMBOL_GPL vmlinux 0x7dc5d0b6	crypto_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x7dc91306	ezx_pcap_write
+EXPORT_SYMBOL_GPL vmlinux 0x7dccd851	__dma_request_channel
+EXPORT_SYMBOL_GPL vmlinux 0x7e0045ac	ata_eh_freeze_port
+EXPORT_SYMBOL_GPL vmlinux 0x7e1183c9	async_schedule
+EXPORT_SYMBOL_GPL vmlinux 0x7e275ea8	scsi_complete_async_scans
+EXPORT_SYMBOL_GPL vmlinux 0x7e64181d	usb_calc_bus_time
+EXPORT_SYMBOL_GPL vmlinux 0x7ea3f03f	simple_attr_open
+EXPORT_SYMBOL_GPL vmlinux 0x7ee8b47b	ata_pci_sff_activate_host
+EXPORT_SYMBOL_GPL vmlinux 0x7f19c836	unlock_policy_rwsem_write
+EXPORT_SYMBOL_GPL vmlinux 0x7f421057	usb_hcd_pci_probe
+EXPORT_SYMBOL_GPL vmlinux 0x7fc762d0	vfs_cancel_lock
+EXPORT_SYMBOL_GPL vmlinux 0x7ff10ccf	raw_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x8014b6af	input_event_from_user
+EXPORT_SYMBOL_GPL vmlinux 0x8039d043	selinux_secmark_relabel_packet_permission
+EXPORT_SYMBOL_GPL vmlinux 0x8050cfce	platform_get_resource_byname
+EXPORT_SYMBOL_GPL vmlinux 0x8058e71e	fat_detach
+EXPORT_SYMBOL_GPL vmlinux 0x808ec1a3	crypto_alg_tested
+EXPORT_SYMBOL_GPL vmlinux 0x80993553	usb_unanchor_urb
+EXPORT_SYMBOL_GPL vmlinux 0x80a45a5e	ad1980_dai
+EXPORT_SYMBOL_GPL vmlinux 0x80ad62b7	sysdev_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x80ee55c3	selinux_secmark_refcount_inc
+EXPORT_SYMBOL_GPL vmlinux 0x8116b7a3	ata_dummy_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x81183278	devm_kfree
+EXPORT_SYMBOL_GPL vmlinux 0x81280cf7	ahash_free_instance
+EXPORT_SYMBOL_GPL vmlinux 0x8128984c	regulator_get_current_limit
+EXPORT_SYMBOL_GPL vmlinux 0x813f4467	hid_destroy_device
+EXPORT_SYMBOL_GPL vmlinux 0x8149ea54	ata_timing_find_mode
+EXPORT_SYMBOL_GPL vmlinux 0x81a2c40c	sk_clone
+EXPORT_SYMBOL_GPL vmlinux 0x81b93756	ata_cable_40wire
+EXPORT_SYMBOL_GPL vmlinux 0x81dded66	register_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0x81ee58f5	usb_hcd_platform_shutdown
+EXPORT_SYMBOL_GPL vmlinux 0x81f07134	snd_soc_put_volsw
+EXPORT_SYMBOL_GPL vmlinux 0x8226642f	__gpio_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x82466531	ata_sff_dumb_qc_prep
+EXPORT_SYMBOL_GPL vmlinux 0x828ae6d1	ubi_is_mapped
+EXPORT_SYMBOL_GPL vmlinux 0x82939ebd	rcu_batches_completed_sched
+EXPORT_SYMBOL_GPL vmlinux 0x82cbf3a2	pxa2xx_ac97_read
+EXPORT_SYMBOL_GPL vmlinux 0x82cc105f	crypto_attr_alg2
+EXPORT_SYMBOL_GPL vmlinux 0x82d79b51	sysctl_vfs_cache_pressure
+EXPORT_SYMBOL_GPL vmlinux 0x82eeed1f	disk_get_part
+EXPORT_SYMBOL_GPL vmlinux 0x82f776b7	gpio_export
+EXPORT_SYMBOL_GPL vmlinux 0x830eac70	snd_soc_free_ac97_codec
+EXPORT_SYMBOL_GPL vmlinux 0x83553786	scatterwalk_copychunks
+EXPORT_SYMBOL_GPL vmlinux 0x8362e798	security_inode_create
+EXPORT_SYMBOL_GPL vmlinux 0x836d2cc9	__blocking_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x83b6014a	ring_buffer_size
+EXPORT_SYMBOL_GPL vmlinux 0x83c85940	sk_setup_caps
+EXPORT_SYMBOL_GPL vmlinux 0x83e8e082	del_mtd_blktrans_dev
+EXPORT_SYMBOL_GPL vmlinux 0x83f06480	usb_kill_urb
+EXPORT_SYMBOL_GPL vmlinux 0x8412e3c5	srcu_batches_completed
+EXPORT_SYMBOL_GPL vmlinux 0x8437fd5f	rtc_read_alarm
+EXPORT_SYMBOL_GPL vmlinux 0x844da749	unregister_pernet_subsys
+EXPORT_SYMBOL_GPL vmlinux 0x8458bb54	dma_wait_for_async_tx
+EXPORT_SYMBOL_GPL vmlinux 0x84618f7a	usb_hcd_giveback_urb
+EXPORT_SYMBOL_GPL vmlinux 0x846ebb37	default_backing_dev_info
+EXPORT_SYMBOL_GPL vmlinux 0x84e61d6b	fl6_sock_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x8536c8c1	snd_soc_register_platform
+EXPORT_SYMBOL_GPL vmlinux 0x85384597	crypto_spawn_tfm2
+EXPORT_SYMBOL_GPL vmlinux 0x85478a0b	inet6_hash_frag
+EXPORT_SYMBOL_GPL vmlinux 0x8561cbe9	usb_poison_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0x856ecb51	ata_sff_hsm_move
+EXPORT_SYMBOL_GPL vmlinux 0x85c10896	rcu_batches_completed_bh
+EXPORT_SYMBOL_GPL vmlinux 0x85c94d40	ata_sff_exec_command
+EXPORT_SYMBOL_GPL vmlinux 0x85dd3d3c	hrtimer_forward
+EXPORT_SYMBOL_GPL vmlinux 0x85eabd44	udp4_lib_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x860b9b02	handle_level_irq
+EXPORT_SYMBOL_GPL vmlinux 0x8613fa03	sysdev_driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x86405cb8	snd_soc_dapm_disable_pin
+EXPORT_SYMBOL_GPL vmlinux 0x865ddb2f	ring_buffer_swap_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x868784cb	__symbol_get
+EXPORT_SYMBOL_GPL vmlinux 0x86a598ae	inet6_csk_xmit
+EXPORT_SYMBOL_GPL vmlinux 0x86c959a8	pci_unblock_user_cfg_access
+EXPORT_SYMBOL_GPL vmlinux 0x86ed3d00	driver_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x86f6b99d	synchronize_rcu_expedited
+EXPORT_SYMBOL_GPL vmlinux 0x870428ea	power_supply_am_i_supplied
+EXPORT_SYMBOL_GPL vmlinux 0x8774daba	sdhci_free_host
+EXPORT_SYMBOL_GPL vmlinux 0x87754115	raw_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x87ab2396	fat_free_clusters
+EXPORT_SYMBOL_GPL vmlinux 0x87ac1bc6	klist_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0x87f878d2	crypto_alloc_instance2
+EXPORT_SYMBOL_GPL vmlinux 0x8810ad5e	crypto_xor
+EXPORT_SYMBOL_GPL vmlinux 0x8823a7a6	usb_stor_Bulk_reset
+EXPORT_SYMBOL_GPL vmlinux 0x885142a6	nf_net_netfilter_sysctl_path
+EXPORT_SYMBOL_GPL vmlinux 0x8861c4f1	blk_lld_busy
+EXPORT_SYMBOL_GPL vmlinux 0x888b6784	hidraw_disconnect
+EXPORT_SYMBOL_GPL vmlinux 0x88c65cd9	hrtimer_init
+EXPORT_SYMBOL_GPL vmlinux 0x88c8b251	find_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x88da0e9a	crypto_grab_skcipher
+EXPORT_SYMBOL_GPL vmlinux 0x89006fc2	usb_clear_halt
+EXPORT_SYMBOL_GPL vmlinux 0x8920280a	hid_report_raw_event
+EXPORT_SYMBOL_GPL vmlinux 0x8935816f	user_read
+EXPORT_SYMBOL_GPL vmlinux 0x8966589c	aead_geniv_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x89d1c1b1	gpiochip_is_requested
+EXPORT_SYMBOL_GPL vmlinux 0x89e830d2	sdio_writel
+EXPORT_SYMBOL_GPL vmlinux 0x8a7c3315	class_dev_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0x8a95326a	kmem_cache_name
+EXPORT_SYMBOL_GPL vmlinux 0x8aa194cd	sysdev_register
+EXPORT_SYMBOL_GPL vmlinux 0x8ac61c0a	sdio_readl
+EXPORT_SYMBOL_GPL vmlinux 0x8ae71dc6	class_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x8af69c02	crypto_unregister_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0x8b33a8f8	spi_register_master
+EXPORT_SYMBOL_GPL vmlinux 0x8b57a798	__root_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x8b752ac1	ata_tf_to_fis
+EXPORT_SYMBOL_GPL vmlinux 0x8c161509	rt_mutex_unlock
+EXPORT_SYMBOL_GPL vmlinux 0x8c1c7525	raw_unhash_sk
+EXPORT_SYMBOL_GPL vmlinux 0x8c1dd796	ipv6_dup_options
+EXPORT_SYMBOL_GPL vmlinux 0x8c8cac8b	driver_attach
+EXPORT_SYMBOL_GPL vmlinux 0x8c9ac5a9	soc_ac97_ops
+EXPORT_SYMBOL_GPL vmlinux 0x8ca3a1aa	disk_map_sector_rcu
+EXPORT_SYMBOL_GPL vmlinux 0x8ca4d7e4	ata_sff_data_xfer_noirq
+EXPORT_SYMBOL_GPL vmlinux 0x8cae1fb6	blk_rq_err_bytes
+EXPORT_SYMBOL_GPL vmlinux 0x8d033df4	klist_node_attached
+EXPORT_SYMBOL_GPL vmlinux 0x8d2831ad	usb_unlink_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0x8d54ffb8	ata_sff_tf_read
+EXPORT_SYMBOL_GPL vmlinux 0x8d7e4528	hid_debug_event
+EXPORT_SYMBOL_GPL vmlinux 0x8e2ba733	xfrm_output_resume
+EXPORT_SYMBOL_GPL vmlinux 0x8ea811e5	unregister_kretprobe
+EXPORT_SYMBOL_GPL vmlinux 0x8ec015e7	dovefb_set_pin_state
+EXPORT_SYMBOL_GPL vmlinux 0x8ee600bc	w1_reset_bus
+EXPORT_SYMBOL_GPL vmlinux 0x8f0499ad	ata_sff_qc_fill_rtf
+EXPORT_SYMBOL_GPL vmlinux 0x8f4c2fee	ata_host_start
+EXPORT_SYMBOL_GPL vmlinux 0x8f6cee77	__round_jiffies_relative
+EXPORT_SYMBOL_GPL vmlinux 0x8fa74514	sysdev_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x8fb3b935	fat_get_dotdot_entry
+EXPORT_SYMBOL_GPL vmlinux 0x8fea79dc	blkdev_aio_write
+EXPORT_SYMBOL_GPL vmlinux 0x8ffbc06c	rt5610_reset
+EXPORT_SYMBOL_GPL vmlinux 0x9017ae95	unregister_pernet_gen_subsys
+EXPORT_SYMBOL_GPL vmlinux 0x90280868	crypto_register_template
+EXPORT_SYMBOL_GPL vmlinux 0x909dd6eb	ata_sff_postreset
+EXPORT_SYMBOL_GPL vmlinux 0x90a08b95	sata_scr_valid
+EXPORT_SYMBOL_GPL vmlinux 0x90a1004a	crypto_has_alg
+EXPORT_SYMBOL_GPL vmlinux 0x90df68d6	tcp_get_info
+EXPORT_SYMBOL_GPL vmlinux 0x910359fc	usb_buffer_map_sg
+EXPORT_SYMBOL_GPL vmlinux 0x912f7fb7	i2c_unregister_device
+EXPORT_SYMBOL_GPL vmlinux 0x9155600e	__module_address
+EXPORT_SYMBOL_GPL vmlinux 0x9159b9d6	profile_event_register
+EXPORT_SYMBOL_GPL vmlinux 0x915e0931	inet6_hash_connect
+EXPORT_SYMBOL_GPL vmlinux 0x919a0484	fib_rules_cleanup_ops
+EXPORT_SYMBOL_GPL vmlinux 0x919ceca0	inet_csk_addr2sockaddr
+EXPORT_SYMBOL_GPL vmlinux 0x91f884ca	tcp_twsk_destructor
+EXPORT_SYMBOL_GPL vmlinux 0x92193324	mnt_want_write_file
+EXPORT_SYMBOL_GPL vmlinux 0x92275928	proc_net_mkdir
+EXPORT_SYMBOL_GPL vmlinux 0x92297c6d	__set_irq_handler
+EXPORT_SYMBOL_GPL vmlinux 0x9268c0b1	ata_scsi_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x9272889d	uio_event_notify
+EXPORT_SYMBOL_GPL vmlinux 0x92f3dc2f	enable_vodsp_ve_func
+EXPORT_SYMBOL_GPL vmlinux 0x92fb217b	dcookie_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x93121f76	snd_soc_dapm_new_widgets
+EXPORT_SYMBOL_GPL vmlinux 0x936ace35	register_pernet_gen_device
+EXPORT_SYMBOL_GPL vmlinux 0x93ad3062	led_classdev_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x93ae016a	skb_gro_receive
+EXPORT_SYMBOL_GPL vmlinux 0x93c102f8	inet_csk_bind_conflict
+EXPORT_SYMBOL_GPL vmlinux 0x93d2422d	snmp_mib_free
+EXPORT_SYMBOL_GPL vmlinux 0x93fb42fc	pci_rescan_bus
+EXPORT_SYMBOL_GPL vmlinux 0x942bf33c	inverse_translate
+EXPORT_SYMBOL_GPL vmlinux 0x946f9e07	tty_wakeup
+EXPORT_SYMBOL_GPL vmlinux 0x94920b79	sysfs_update_group
+EXPORT_SYMBOL_GPL vmlinux 0x94a68723	ata_scsi_slave_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x94cd3072	posix_timer_event
+EXPORT_SYMBOL_GPL vmlinux 0x94da0393	regulator_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x94e294a7	usb_hcd_poll_rh_status
+EXPORT_SYMBOL_GPL vmlinux 0x94f9fc78	devres_open_group
+EXPORT_SYMBOL_GPL vmlinux 0x951b46b6	tty_get_pgrp
+EXPORT_SYMBOL_GPL vmlinux 0x952664c5	do_exit
+EXPORT_SYMBOL_GPL vmlinux 0x953611ea	class_compat_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x954290c8	inotify_inode_queue_event
+EXPORT_SYMBOL_GPL vmlinux 0x954530d2	rtc_irq_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x9547ab67	fb_ddc_read
+EXPORT_SYMBOL_GPL vmlinux 0x956a91ba	gpio_get_value_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x95ab4f30	remove_irq
+EXPORT_SYMBOL_GPL vmlinux 0x95c7299e	usb_buffer_free
+EXPORT_SYMBOL_GPL vmlinux 0x961a8cd3	unlock_policy_rwsem_read
+EXPORT_SYMBOL_GPL vmlinux 0x965cad91	crypto_init_shash_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x9692ba48	ip_local_out
+EXPORT_SYMBOL_GPL vmlinux 0x96c7e71d	task_active_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0x96cbcf31	pm_qos_add_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x96d0568e	usb_put_hcd
+EXPORT_SYMBOL_GPL vmlinux 0x96d55781	spi_busnum_to_master
+EXPORT_SYMBOL_GPL vmlinux 0x972ca1b2	blkcipher_walk_virt
+EXPORT_SYMBOL_GPL vmlinux 0x9744c0d8	platform_device_register_simple
+EXPORT_SYMBOL_GPL vmlinux 0x974804ed	tty_ldisc_ref
+EXPORT_SYMBOL_GPL vmlinux 0x974d064a	sata_sff_hardreset
+EXPORT_SYMBOL_GPL vmlinux 0x977389e9	unregister_kprobes
+EXPORT_SYMBOL_GPL vmlinux 0x97d601a7	device_for_each_child
+EXPORT_SYMBOL_GPL vmlinux 0x9818cddb	clockevents_register_device
+EXPORT_SYMBOL_GPL vmlinux 0x98196f5b	blocking_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x9845494d	inet6_sk_rebuild_header
+EXPORT_SYMBOL_GPL vmlinux 0x9848cb5c	eventfd_ctx_fileget
+EXPORT_SYMBOL_GPL vmlinux 0x98cb7a27	blk_update_request
+EXPORT_SYMBOL_GPL vmlinux 0x98deb6ba	module_mutex
+EXPORT_SYMBOL_GPL vmlinux 0x9905328f	ring_buffer_write
+EXPORT_SYMBOL_GPL vmlinux 0x990bb065	each_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x9924c496	__usb_get_extra_descriptor
+EXPORT_SYMBOL_GPL vmlinux 0x995d1071	prof_on
+EXPORT_SYMBOL_GPL vmlinux 0x995f3b5d	map_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0x997b2075	deregister_mtd_blktrans
+EXPORT_SYMBOL_GPL vmlinux 0x998dd0d2	ata_sff_data_xfer32
+EXPORT_SYMBOL_GPL vmlinux 0x99c03355	da903x_clr_bits
+EXPORT_SYMBOL_GPL vmlinux 0x9a0b189b	rtc_read_time
+EXPORT_SYMBOL_GPL vmlinux 0x9a11a0fc	crypto_attr_alg_name
+EXPORT_SYMBOL_GPL vmlinux 0x9a2463f2	fat_remove_entries
+EXPORT_SYMBOL_GPL vmlinux 0x9a247a6d	do_sync_mapping_range
+EXPORT_SYMBOL_GPL vmlinux 0x9a7ed637	invalidate_inode_pages2_range
+EXPORT_SYMBOL_GPL vmlinux 0x9a806992	dm_send_uevents
+EXPORT_SYMBOL_GPL vmlinux 0x9aa422b6	usb_hcd_unlink_urb_from_ep
+EXPORT_SYMBOL_GPL vmlinux 0x9acf625d	snd_soc_put_enum_double
+EXPORT_SYMBOL_GPL vmlinux 0x9b683b45	scatterwalk_done
+EXPORT_SYMBOL_GPL vmlinux 0x9b6a3994	ata_sff_qc_prep
+EXPORT_SYMBOL_GPL vmlinux 0x9b7cc09c	debugfs_create_x16
+EXPORT_SYMBOL_GPL vmlinux 0x9ba0501e	unregister_vt_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x9bb76f68	crypto_ahash_final
+EXPORT_SYMBOL_GPL vmlinux 0x9bc3dedc	sdio_release_host
+EXPORT_SYMBOL_GPL vmlinux 0x9bce606a	crypto_register_ahash
+EXPORT_SYMBOL_GPL vmlinux 0x9bd07f0c	w1_read_block
+EXPORT_SYMBOL_GPL vmlinux 0x9bf7aaea	blk_abort_queue
+EXPORT_SYMBOL_GPL vmlinux 0x9c102b42	root_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x9c11db7d	unregister_jprobes
+EXPORT_SYMBOL_GPL vmlinux 0x9c2ce603	inet_csk_reqsk_queue_hash_add
+EXPORT_SYMBOL_GPL vmlinux 0x9c78e17f	crypto_ablkcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0x9cb8037b	xfrm_count_enc_supported
+EXPORT_SYMBOL_GPL vmlinux 0x9cc36736	regulator_disable
+EXPORT_SYMBOL_GPL vmlinux 0x9cde24cd	platform_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x9d05ffbd	crypto_alg_sem
+EXPORT_SYMBOL_GPL vmlinux 0x9d382a91	crypto_register_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0x9dc7fa97	usb_stor_bulk_transfer_buf
+EXPORT_SYMBOL_GPL vmlinux 0x9dec9778	mtd_erase_callback
+EXPORT_SYMBOL_GPL vmlinux 0x9e3ec9de	nand_release
+EXPORT_SYMBOL_GPL vmlinux 0x9e5c9354	spk_amplifier_enable
+EXPORT_SYMBOL_GPL vmlinux 0x9e711ad2	pm_qos_requirement
+EXPORT_SYMBOL_GPL vmlinux 0x9ec26e8b	hwmon_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x9ed211c9	pci_disable_rom
+EXPORT_SYMBOL_GPL vmlinux 0x9ef25148	__blk_end_request_err
+EXPORT_SYMBOL_GPL vmlinux 0x9f045d98	xfrm_output
+EXPORT_SYMBOL_GPL vmlinux 0x9f40a6d6	async_synchronize_full_domain
+EXPORT_SYMBOL_GPL vmlinux 0x9f54b0bc	driver_find
+EXPORT_SYMBOL_GPL vmlinux 0x9f80a111	led_trigger_show
+EXPORT_SYMBOL_GPL vmlinux 0x9f85ed90	klist_remove
+EXPORT_SYMBOL_GPL vmlinux 0x9fce80db	fb_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x9ff9c5d2	ata_std_error_handler
+EXPORT_SYMBOL_GPL vmlinux 0xa0255440	net_ipv4_ctl_path
+EXPORT_SYMBOL_GPL vmlinux 0xa02f5da6	sysdev_store_ulong
+EXPORT_SYMBOL_GPL vmlinux 0xa043a831	blk_queue_lld_busy
+EXPORT_SYMBOL_GPL vmlinux 0xa09b6fd4	snd_soc_add_controls
+EXPORT_SYMBOL_GPL vmlinux 0xa11af6bc	pci_find_ht_capability
+EXPORT_SYMBOL_GPL vmlinux 0xa1254c44	ata_common_sdev_attrs
+EXPORT_SYMBOL_GPL vmlinux 0xa1f690bb	bus_find_device
+EXPORT_SYMBOL_GPL vmlinux 0xa22c3e70	setup_irq
+EXPORT_SYMBOL_GPL vmlinux 0xa24cf2ee	inotify_find_update_watch
+EXPORT_SYMBOL_GPL vmlinux 0xa286a234	snd_pcm_format_name
+EXPORT_SYMBOL_GPL vmlinux 0xa29a1214	usb_scuttle_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0xa2eee87b	kernel_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xa3178d41	crypto_aead_setauthsize
+EXPORT_SYMBOL_GPL vmlinux 0xa334a2c5	debugfs_create_symlink
+EXPORT_SYMBOL_GPL vmlinux 0xa356ec46	ezx_pcap_set_bits
+EXPORT_SYMBOL_GPL vmlinux 0xa3747e4d	bus_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xa38751d2	regulator_force_disable
+EXPORT_SYMBOL_GPL vmlinux 0xa38d819a	device_initialize
+EXPORT_SYMBOL_GPL vmlinux 0xa40a8590	input_event_to_user
+EXPORT_SYMBOL_GPL vmlinux 0xa410a72f	snd_soc_unregister_platform
+EXPORT_SYMBOL_GPL vmlinux 0xa49e10d5	scsi_target_unblock
+EXPORT_SYMBOL_GPL vmlinux 0xa57624a5	hidinput_report_event
+EXPORT_SYMBOL_GPL vmlinux 0xa57afc74	ktime_get
+EXPORT_SYMBOL_GPL vmlinux 0xa5803be8	scsi_eh_ready_devs
+EXPORT_SYMBOL_GPL vmlinux 0xa582360a	rtc_irq_set_freq
+EXPORT_SYMBOL_GPL vmlinux 0xa5bf5c3e	pm_qos_add_requirement
+EXPORT_SYMBOL_GPL vmlinux 0xa5c36cec	inotify_unmount_inodes
+EXPORT_SYMBOL_GPL vmlinux 0xa5dd6fae	arm_pm_restart
+EXPORT_SYMBOL_GPL vmlinux 0xa5e4816f	ata_cable_sata
+EXPORT_SYMBOL_GPL vmlinux 0xa5efbf4c	async_synchronize_full
+EXPORT_SYMBOL_GPL vmlinux 0xa65f9329	raw_seq_next
+EXPORT_SYMBOL_GPL vmlinux 0xa6719878	tcp_register_congestion_control
+EXPORT_SYMBOL_GPL vmlinux 0xa6c50de8	xfrm_inner_extract_output
+EXPORT_SYMBOL_GPL vmlinux 0xa6ee1016	hid_disconnect
+EXPORT_SYMBOL_GPL vmlinux 0xa6fc5332	gpiochip_remove
+EXPORT_SYMBOL_GPL vmlinux 0xa72f885c	enable_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0xa74dad68	regulator_get_init_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0xa84fff78	led_trigger_unregister_simple
+EXPORT_SYMBOL_GPL vmlinux 0xa8de26d9	driver_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0xa8ed3b7c	inet_twsk_put
+EXPORT_SYMBOL_GPL vmlinux 0xa8f59416	gpio_direction_output
+EXPORT_SYMBOL_GPL vmlinux 0xa8fa03ab	crypto_larval_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xa95479e8	unregister_timer_hook
+EXPORT_SYMBOL_GPL vmlinux 0xa96b5c19	dm_get_rq_mapinfo
+EXPORT_SYMBOL_GPL vmlinux 0xa975cacb	add_to_page_cache_lru
+EXPORT_SYMBOL_GPL vmlinux 0xa9952479	ata_std_qc_defer
+EXPORT_SYMBOL_GPL vmlinux 0xa9c530b8	unregister_oom_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xaa25d320	sdio_writeb_readb
+EXPORT_SYMBOL_GPL vmlinux 0xaa2a72bf	__iowrite64_copy
+EXPORT_SYMBOL_GPL vmlinux 0xaa2a7e50	pxa2xx_ac97_try_cold_reset
+EXPORT_SYMBOL_GPL vmlinux 0xaa2dc261	crypto_create_tfm
+EXPORT_SYMBOL_GPL vmlinux 0xaa8c4696	cpu_clock
+EXPORT_SYMBOL_GPL vmlinux 0xaaa579e6	inet_twsk_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xaaec1b94	spi_sync
+EXPORT_SYMBOL_GPL vmlinux 0xaaf04d75	unregister_pernet_gen_device
+EXPORT_SYMBOL_GPL vmlinux 0xaafd0a6f	skb_segment
+EXPORT_SYMBOL_GPL vmlinux 0xab295822	fuse_request_send_background
+EXPORT_SYMBOL_GPL vmlinux 0xab7e007f	vfs_lock_file
+EXPORT_SYMBOL_GPL vmlinux 0xabf21c3d	usb_hcd_pci_shutdown
+EXPORT_SYMBOL_GPL vmlinux 0xac05bbc8	enable_vodsp_aec_func
+EXPORT_SYMBOL_GPL vmlinux 0xac15c3a4	bus_get_kset
+EXPORT_SYMBOL_GPL vmlinux 0xac1d51a9	rtc_set_alarm
+EXPORT_SYMBOL_GPL vmlinux 0xac2d911c	usb_stor_transparent_scsi_command
+EXPORT_SYMBOL_GPL vmlinux 0xac36f0b0	sysdev_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xac5ac1fa	elv_register
+EXPORT_SYMBOL_GPL vmlinux 0xac9a2298	key_type_user
+EXPORT_SYMBOL_GPL vmlinux 0xace126eb	led_trigger_event
+EXPORT_SYMBOL_GPL vmlinux 0xace5c0fc	usb_bus_list
+EXPORT_SYMBOL_GPL vmlinux 0xad03a8cd	ring_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0xad0b238e	scsi_queue_work
+EXPORT_SYMBOL_GPL vmlinux 0xad1eff06	device_attach
+EXPORT_SYMBOL_GPL vmlinux 0xad4445f5	usb_stor_Bulk_transport
+EXPORT_SYMBOL_GPL vmlinux 0xae0c87ee	pm_qos_remove_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xae2fef6e	ata_sas_port_init
+EXPORT_SYMBOL_GPL vmlinux 0xaea63d2b	spi_setup
+EXPORT_SYMBOL_GPL vmlinux 0xaf0d6dea	inotify_init_watch
+EXPORT_SYMBOL_GPL vmlinux 0xaf0dcc02	led_trigger_set
+EXPORT_SYMBOL_GPL vmlinux 0xaf1fabcd	w1_touch_block
+EXPORT_SYMBOL_GPL vmlinux 0xaf3f6fe0	ata_sff_interrupt
+EXPORT_SYMBOL_GPL vmlinux 0xafd5b0dd	dm_set_device_limits
+EXPORT_SYMBOL_GPL vmlinux 0xafe0af7d	__wake_up_sync_key
+EXPORT_SYMBOL_GPL vmlinux 0xb00750b7	dev_change_net_namespace
+EXPORT_SYMBOL_GPL vmlinux 0xb038fef2	net_assign_generic
+EXPORT_SYMBOL_GPL vmlinux 0xb0439c90	part_round_stats
+EXPORT_SYMBOL_GPL vmlinux 0xb0497d58	queue_delayed_work_on
+EXPORT_SYMBOL_GPL vmlinux 0xb0aa812e	fips_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xb0ced348	ata_sff_host_intr
+EXPORT_SYMBOL_GPL vmlinux 0xb0d49929	class_interface_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xb0f395ae	snd_soc_init_card
+EXPORT_SYMBOL_GPL vmlinux 0xb0fd128c	regulator_bulk_disable
+EXPORT_SYMBOL_GPL vmlinux 0xb10d55bc	cn_netlink_send
+EXPORT_SYMBOL_GPL vmlinux 0xb130961a	w1_write_block
+EXPORT_SYMBOL_GPL vmlinux 0xb18429eb	suspend_device_irqs
+EXPORT_SYMBOL_GPL vmlinux 0xb1acbcce	rcu_barrier_sched
+EXPORT_SYMBOL_GPL vmlinux 0xb1dc8745	ata_eh_thaw_port
+EXPORT_SYMBOL_GPL vmlinux 0xb20c59ef	inotify_inode_is_dead
+EXPORT_SYMBOL_GPL vmlinux 0xb23b3191	__blkdev_driver_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xb269e051	ata_sg_init
+EXPORT_SYMBOL_GPL vmlinux 0xb276b393	ata_sff_irq_clear
+EXPORT_SYMBOL_GPL vmlinux 0xb28c57aa	ring_buffer_consume
+EXPORT_SYMBOL_GPL vmlinux 0xb28caaaf	__rt_mutex_init
+EXPORT_SYMBOL_GPL vmlinux 0xb2be59f1	platform_driver_probe
+EXPORT_SYMBOL_GPL vmlinux 0xb2d30f88	ring_buffer_read
+EXPORT_SYMBOL_GPL vmlinux 0xb2d62bb2	skb_partial_csum_set
+EXPORT_SYMBOL_GPL vmlinux 0xb2fb8500	snd_soc_dapm_sync
+EXPORT_SYMBOL_GPL vmlinux 0xb30da3dc	hid_dump_input
+EXPORT_SYMBOL_GPL vmlinux 0xb33113da	bus_get_device_klist
+EXPORT_SYMBOL_GPL vmlinux 0xb3a08d9d	dm_dispatch_request
+EXPORT_SYMBOL_GPL vmlinux 0xb449ed11	mtd_table_mutex
+EXPORT_SYMBOL_GPL vmlinux 0xb462fb6b	get_mtd_device_nm
+EXPORT_SYMBOL_GPL vmlinux 0xb4898842	skcipher_geniv_init
+EXPORT_SYMBOL_GPL vmlinux 0xb4a4b9fb	blocking_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xb4b25286	get_device
+EXPORT_SYMBOL_GPL vmlinux 0xb4df7dec	devres_get
+EXPORT_SYMBOL_GPL vmlinux 0xb4ea7cf7	kgdb_connected
+EXPORT_SYMBOL_GPL vmlinux 0xb4f21bba	cpufreq_register_governor
+EXPORT_SYMBOL_GPL vmlinux 0xb4f72af8	fuse_request_send
+EXPORT_SYMBOL_GPL vmlinux 0xb50ca928	unregister_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0xb51cb452	hid_allocate_device
+EXPORT_SYMBOL_GPL vmlinux 0xb528c8bf	sata_set_spd
+EXPORT_SYMBOL_GPL vmlinux 0xb52e4b3a	__fsnotify_inode_delete
+EXPORT_SYMBOL_GPL vmlinux 0xb5420edb	crypto_lookup_template
+EXPORT_SYMBOL_GPL vmlinux 0xb583cb37	tcp_set_state
+EXPORT_SYMBOL_GPL vmlinux 0xb58c149e	__mnt_is_readonly
+EXPORT_SYMBOL_GPL vmlinux 0xb58dcfa2	synchronize_sched_expedited
+EXPORT_SYMBOL_GPL vmlinux 0xb5e1ecd7	platform_driver_register
+EXPORT_SYMBOL_GPL vmlinux 0xb5fc80b3	led_classdev_register
+EXPORT_SYMBOL_GPL vmlinux 0xb6270d64	regulator_is_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xb62a0f2f	tty_mode_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xb65091b3	selinux_secmark_refcount_dec
+EXPORT_SYMBOL_GPL vmlinux 0xb679f0e0	kobject_get_path
+EXPORT_SYMBOL_GPL vmlinux 0xb683ecc2	mv88fx_pcm_snd_chip
+EXPORT_SYMBOL_GPL vmlinux 0xb6aeb661	ata_id_c_string
+EXPORT_SYMBOL_GPL vmlinux 0xb6c5a8d7	destroy_workqueue
+EXPORT_SYMBOL_GPL vmlinux 0xb6dc608f	led_trigger_register_simple
+EXPORT_SYMBOL_GPL vmlinux 0xb6f1ebc4	usb_sg_init
+EXPORT_SYMBOL_GPL vmlinux 0xb72ae51c	inet6_csk_addr2sockaddr
+EXPORT_SYMBOL_GPL vmlinux 0xb744ae05	crypto_alloc_aead
+EXPORT_SYMBOL_GPL vmlinux 0xb744fa43	xfrm_ealg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0xb8245325	del_mtd_device
+EXPORT_SYMBOL_GPL vmlinux 0xb848e34a	ata_host_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xb86f59ae	aead_geniv_free
+EXPORT_SYMBOL_GPL vmlinux 0xb8759c2c	srcu_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0xb878914d	inotify_add_watch
+EXPORT_SYMBOL_GPL vmlinux 0xb887d67d	d_materialise_unique
+EXPORT_SYMBOL_GPL vmlinux 0xb898261c	pci_scan_child_bus
+EXPORT_SYMBOL_GPL vmlinux 0xb8c288eb	sysfs_remove_group
+EXPORT_SYMBOL_GPL vmlinux 0xb8ca6764	bd_release_from_disk
+EXPORT_SYMBOL_GPL vmlinux 0xb8fee532	blocking_notifier_chain_cond_register
+EXPORT_SYMBOL_GPL vmlinux 0xb906080a	tty_ldisc_deref
+EXPORT_SYMBOL_GPL vmlinux 0xb917b6d7	return_address
+EXPORT_SYMBOL_GPL vmlinux 0xb98cbeb2	class_interface_register
+EXPORT_SYMBOL_GPL vmlinux 0xb9a0225d	pid_vnr
+EXPORT_SYMBOL_GPL vmlinux 0xb9d32232	sdio_enable_func
+EXPORT_SYMBOL_GPL vmlinux 0xb9eb3aa9	add_uevent_var
+EXPORT_SYMBOL_GPL vmlinux 0xba235210	add_mtd_device
+EXPORT_SYMBOL_GPL vmlinux 0xba4e443e	tcp_is_cwnd_limited
+EXPORT_SYMBOL_GPL vmlinux 0xba4f5443	sdio_align_size
+EXPORT_SYMBOL_GPL vmlinux 0xba51f1ed	pxa2xx_ac97_hw_probe
+EXPORT_SYMBOL_GPL vmlinux 0xbabc27e4	ata_port_disable
+EXPORT_SYMBOL_GPL vmlinux 0xbaf3fbc7	class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xbafeec5f	__ip_route_output_key
+EXPORT_SYMBOL_GPL vmlinux 0xbb0d9a1d	ubi_open_volume
+EXPORT_SYMBOL_GPL vmlinux 0xbb17534a	tcp_done
+EXPORT_SYMBOL_GPL vmlinux 0xbb272763	register_kretprobe
+EXPORT_SYMBOL_GPL vmlinux 0xbb2945e4	tcp_slow_start
+EXPORT_SYMBOL_GPL vmlinux 0xbb38392d	security_inode_mkdir
+EXPORT_SYMBOL_GPL vmlinux 0xbb9a2c75	ktime_add_ns
+EXPORT_SYMBOL_GPL vmlinux 0xbbdc61b6	shash_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0xbc3f9d58	put_mtd_device
+EXPORT_SYMBOL_GPL vmlinux 0xbc505df4	ubi_get_device_info
+EXPORT_SYMBOL_GPL vmlinux 0xbc5abbcb	ata_ehi_push_desc
+EXPORT_SYMBOL_GPL vmlinux 0xbc6d2571	snd_soc_register_dai
+EXPORT_SYMBOL_GPL vmlinux 0xbcd0e917	netlink_has_listeners
+EXPORT_SYMBOL_GPL vmlinux 0xbcd47034	crypto_alloc_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0xbcdac049	pci_block_user_cfg_access
+EXPORT_SYMBOL_GPL vmlinux 0xbced5129	hid_input_report
+EXPORT_SYMBOL_GPL vmlinux 0xbd2db2dc	xattr_getsecurity
+EXPORT_SYMBOL_GPL vmlinux 0xbd45f8ba	ata_sff_lost_interrupt
+EXPORT_SYMBOL_GPL vmlinux 0xbd9059bd	dma_release_channel
+EXPORT_SYMBOL_GPL vmlinux 0xbe116723	do_posix_clock_nosettime
+EXPORT_SYMBOL_GPL vmlinux 0xbe1887e4	ata_unpack_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0xbe3a8b53	ata_slave_link_init
+EXPORT_SYMBOL_GPL vmlinux 0xbe45bd50	device_schedule_callback_owner
+EXPORT_SYMBOL_GPL vmlinux 0xbe5e71d4	sysdev_driver_register
+EXPORT_SYMBOL_GPL vmlinux 0xbe88bae6	rt5630_dai
+EXPORT_SYMBOL_GPL vmlinux 0xbe8d478b	hwmon_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xbeabd021	register_kprobes
+EXPORT_SYMBOL_GPL vmlinux 0xbedc62da	schedule_hrtimeout_range
+EXPORT_SYMBOL_GPL vmlinux 0xbeea7a2b	srcu_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xbf0c5c44	ata_sff_dev_select
+EXPORT_SYMBOL_GPL vmlinux 0xbf33b21b	snd_soc_get_volsw_s8
+EXPORT_SYMBOL_GPL vmlinux 0xbf58981f	crypto_mod_put
+EXPORT_SYMBOL_GPL vmlinux 0xbfc94c9c	crypto_shoot_alg
+EXPORT_SYMBOL_GPL vmlinux 0xbfe1d3a0	kobject_init_and_add
+EXPORT_SYMBOL_GPL vmlinux 0xbfe7385b	usb_kill_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0xc00558f6	ubi_leb_read
+EXPORT_SYMBOL_GPL vmlinux 0xc00a213a	ata_link_next
+EXPORT_SYMBOL_GPL vmlinux 0xc00c4ffc	tcp_reno_cong_avoid
+EXPORT_SYMBOL_GPL vmlinux 0xc01a306f	pciserial_init_ports
+EXPORT_SYMBOL_GPL vmlinux 0xc0286a0b	disk_part_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0xc0667a31	__pci_complete_power_transition
+EXPORT_SYMBOL_GPL vmlinux 0xc0767789	parse_mtd_partitions
+EXPORT_SYMBOL_GPL vmlinux 0xc079d180	regulator_enable
+EXPORT_SYMBOL_GPL vmlinux 0xc0a27d69	class_compat_register
+EXPORT_SYMBOL_GPL vmlinux 0xc0aaff90	pcap_adc_sync
+EXPORT_SYMBOL_GPL vmlinux 0xc0b3bfaa	snd_soc_dapm_put_pin_switch
+EXPORT_SYMBOL_GPL vmlinux 0xc0c6bf5b	ata_sff_post_internal_cmd
+EXPORT_SYMBOL_GPL vmlinux 0xc1180285	class_compat_remove_link
+EXPORT_SYMBOL_GPL vmlinux 0xc1184a49	snd_soc_info_volsw_ext
+EXPORT_SYMBOL_GPL vmlinux 0xc118b411	crypto_unregister_ahash
+EXPORT_SYMBOL_GPL vmlinux 0xc1267daf	single_open_net
+EXPORT_SYMBOL_GPL vmlinux 0xc126e890	klist_del
+EXPORT_SYMBOL_GPL vmlinux 0xc140a40d	device_find_child
+EXPORT_SYMBOL_GPL vmlinux 0xc16c83ac	inet_csk_route_req
+EXPORT_SYMBOL_GPL vmlinux 0xc17515d7	usb_hcds_loaded
+EXPORT_SYMBOL_GPL vmlinux 0xc1a07feb	hrtimer_init_sleeper
+EXPORT_SYMBOL_GPL vmlinux 0xc1fe1c52	usb_debug_root
+EXPORT_SYMBOL_GPL vmlinux 0xc2157f5f	get_current_tty
+EXPORT_SYMBOL_GPL vmlinux 0xc21be8d7	debugfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xc22a3091	vm_unmap_aliases
+EXPORT_SYMBOL_GPL vmlinux 0xc29ca623	platform_bus
+EXPORT_SYMBOL_GPL vmlinux 0xc2b9444d	inotify_find_watch
+EXPORT_SYMBOL_GPL vmlinux 0xc2c37ac2	device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xc30fd7ee	fuse_dev_release
+EXPORT_SYMBOL_GPL vmlinux 0xc310614f	usb_sg_cancel
+EXPORT_SYMBOL_GPL vmlinux 0xc31d3776	usb_stor_probe2
+EXPORT_SYMBOL_GPL vmlinux 0xc327eadd	platform_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xc3301f02	rcu_expedited_torture_stats
+EXPORT_SYMBOL_GPL vmlinux 0xc34efe27	snmp_fold_field
+EXPORT_SYMBOL_GPL vmlinux 0xc3527505	schedule_hrtimeout
+EXPORT_SYMBOL_GPL vmlinux 0xc38fc193	ring_buffer_record_enable
+EXPORT_SYMBOL_GPL vmlinux 0xc3a3888c	transport_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xc4154c40	device_create
+EXPORT_SYMBOL_GPL vmlinux 0xc428068d	sata_deb_timing_long
+EXPORT_SYMBOL_GPL vmlinux 0xc4337d8f	inet6_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xc43b5d2b	usb_stor_disconnect
+EXPORT_SYMBOL_GPL vmlinux 0xc45c13be	usb_register_dev
+EXPORT_SYMBOL_GPL vmlinux 0xc47444bf	usb_put_intf
+EXPORT_SYMBOL_GPL vmlinux 0xc477f07a	inet_hash
+EXPORT_SYMBOL_GPL vmlinux 0xc48b7ccf	ata_mode_string
+EXPORT_SYMBOL_GPL vmlinux 0xc4a03838	spi_add_device
+EXPORT_SYMBOL_GPL vmlinux 0xc502e405	debugfs_remove_recursive
+EXPORT_SYMBOL_GPL vmlinux 0xc511f475	crypto_hash_walk_first
+EXPORT_SYMBOL_GPL vmlinux 0xc51e4852	i2c_new_dummy
+EXPORT_SYMBOL_GPL vmlinux 0xc52f9810	usb_stor_reset_resume
+EXPORT_SYMBOL_GPL vmlinux 0xc540417b	queue_work
+EXPORT_SYMBOL_GPL vmlinux 0xc554dcbb	sdio_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0xc5944680	led_trigger_store
+EXPORT_SYMBOL_GPL vmlinux 0xc5b56e52	regulator_bulk_free
+EXPORT_SYMBOL_GPL vmlinux 0xc5dbd7b0	init_dummy_netdev
+EXPORT_SYMBOL_GPL vmlinux 0xc5ec883b	sysfs_create_link
+EXPORT_SYMBOL_GPL vmlinux 0xc600ee09	get_driver
+EXPORT_SYMBOL_GPL vmlinux 0xc64b01bb	tcp_reno_min_cwnd
+EXPORT_SYMBOL_GPL vmlinux 0xc64d7796	fat_attach
+EXPORT_SYMBOL_GPL vmlinux 0xc673e23e	ata_scsi_change_queue_depth
+EXPORT_SYMBOL_GPL vmlinux 0xc6dcedb8	device_reprobe
+EXPORT_SYMBOL_GPL vmlinux 0xc6ffcb2d	init_user_ns
+EXPORT_SYMBOL_GPL vmlinux 0xc76885ac	ata_sff_freeze
+EXPORT_SYMBOL_GPL vmlinux 0xc7848914	anon_inode_getfd
+EXPORT_SYMBOL_GPL vmlinux 0xc78a53ae	platform_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0xc7a55735	mv88fx_i2s_dai1
+EXPORT_SYMBOL_GPL vmlinux 0xc84fffbf	ata_eh_qc_complete
+EXPORT_SYMBOL_GPL vmlinux 0xc85030f3	inet_csk_search_req
+EXPORT_SYMBOL_GPL vmlinux 0xc851f09b	fuse_get_req
+EXPORT_SYMBOL_GPL vmlinux 0xc8a6a181	crypto_ahash_digest
+EXPORT_SYMBOL_GPL vmlinux 0xc8f48656	relay_open
+EXPORT_SYMBOL_GPL vmlinux 0xc93f40ed	fuse_do_open
+EXPORT_SYMBOL_GPL vmlinux 0xc9561772	fb_destroy_modelist
+EXPORT_SYMBOL_GPL vmlinux 0xc9672a9d	inet_diag_register
+EXPORT_SYMBOL_GPL vmlinux 0xca092537	__cpufreq_driver_getavg
+EXPORT_SYMBOL_GPL vmlinux 0xca15d651	spi_new_device
+EXPORT_SYMBOL_GPL vmlinux 0xca6739c4	ata_noop_qc_prep
+EXPORT_SYMBOL_GPL vmlinux 0xca8962ed	usb_hc_died
+EXPORT_SYMBOL_GPL vmlinux 0xcabe04de	cpuidle_resume_and_unlock
+EXPORT_SYMBOL_GPL vmlinux 0xcb0c2ebf	__srcu_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xcb2034cb	nand_scan_tail
+EXPORT_SYMBOL_GPL vmlinux 0xcb301f10	relay_switch_subbuf
+EXPORT_SYMBOL_GPL vmlinux 0xcb51cabe	klist_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0xcb5758d3	crypto_aead_type
+EXPORT_SYMBOL_GPL vmlinux 0xcb777e38	rtc_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xcb814211	usb_stor_control_msg
+EXPORT_SYMBOL_GPL vmlinux 0xcba326a5	vfs_removexattr
+EXPORT_SYMBOL_GPL vmlinux 0xcbe699c1	sdio_writew
+EXPORT_SYMBOL_GPL vmlinux 0xcc1f1c3d	inet_twdr_hangman
+EXPORT_SYMBOL_GPL vmlinux 0xcc299ae3	ata_sff_prereset
+EXPORT_SYMBOL_GPL vmlinux 0xccbcb64b	rt_mutex_timed_lock
+EXPORT_SYMBOL_GPL vmlinux 0xcccfb2fa	sata_deb_timing_hotplug
+EXPORT_SYMBOL_GPL vmlinux 0xcd1333f7	usb_string
+EXPORT_SYMBOL_GPL vmlinux 0xcd58bd1b	kobject_rename
+EXPORT_SYMBOL_GPL vmlinux 0xcd811601	ata_sas_port_start
+EXPORT_SYMBOL_GPL vmlinux 0xcdaf33d3	sysfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xcdbacbe8	sdio_writeb
+EXPORT_SYMBOL_GPL vmlinux 0xcdca3691	nr_irqs
+EXPORT_SYMBOL_GPL vmlinux 0xcdfbea99	sysdev_class_register
+EXPORT_SYMBOL_GPL vmlinux 0xce15e4ad	snd_soc_resume_device
+EXPORT_SYMBOL_GPL vmlinux 0xce309ad1	generic_fh_to_dentry
+EXPORT_SYMBOL_GPL vmlinux 0xce9561b5	fuse_conn_put
+EXPORT_SYMBOL_GPL vmlinux 0xcea08880	blkdev_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xcebcc402	device_bind_driver
+EXPORT_SYMBOL_GPL vmlinux 0xcec4a881	dm_kill_unmapped_request
+EXPORT_SYMBOL_GPL vmlinux 0xceed422c	bus_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xcf0e9fe6	devres_remove
+EXPORT_SYMBOL_GPL vmlinux 0xcf72564a	snd_soc_unregister_dai
+EXPORT_SYMBOL_GPL vmlinux 0xcf7a962e	cn_add_callback
+EXPORT_SYMBOL_GPL vmlinux 0xcfb6ae4f	ac97_dai
+EXPORT_SYMBOL_GPL vmlinux 0xcfc68341	synchronize_rcu_bh
+EXPORT_SYMBOL_GPL vmlinux 0xcfcaeab4	usb_unpoison_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0xcfcc83ad	register_vt_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xcfd9a2c0	des_ekey
+EXPORT_SYMBOL_GPL vmlinux 0xd032d354	eventfd_fget
+EXPORT_SYMBOL_GPL vmlinux 0xd03c7700	secure_ipv4_port_ephemeral
+EXPORT_SYMBOL_GPL vmlinux 0xd05fe85b	ata_sff_busy_sleep
+EXPORT_SYMBOL_GPL vmlinux 0xd0b00fb0	ata_bmdma_mode_filter
+EXPORT_SYMBOL_GPL vmlinux 0xd0c05159	emergency_restart
+EXPORT_SYMBOL_GPL vmlinux 0xd0dc8793	ata_do_eh
+EXPORT_SYMBOL_GPL vmlinux 0xd0e6ce7f	anon_transport_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xd1275d5c	fat_build_inode
+EXPORT_SYMBOL_GPL vmlinux 0xd12f79b9	__hid_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0xd1518995	kern_mount_data
+EXPORT_SYMBOL_GPL vmlinux 0xd152096b	ata_dev_pair
+EXPORT_SYMBOL_GPL vmlinux 0xd16712f3	crypto_check_attr_type
+EXPORT_SYMBOL_GPL vmlinux 0xd1ddbafe	class_for_each_device
+EXPORT_SYMBOL_GPL vmlinux 0xd1eccb25	snd_soc_dai_set_fmt
+EXPORT_SYMBOL_GPL vmlinux 0xd22e6595	ata_pio_need_iordy
+EXPORT_SYMBOL_GPL vmlinux 0xd261f035	ring_buffer_record_disable
+EXPORT_SYMBOL_GPL vmlinux 0xd26b5907	__inet_hash_nolisten
+EXPORT_SYMBOL_GPL vmlinux 0xd273b1b1	__round_jiffies_up_relative
+EXPORT_SYMBOL_GPL vmlinux 0xd29c3b77	kill_pid_info_as_uid
+EXPORT_SYMBOL_GPL vmlinux 0xd2c17732	sdio_memcpy_fromio
+EXPORT_SYMBOL_GPL vmlinux 0xd331fc06	ring_buffer_empty_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xd33dc4fa	regulator_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xd3763874	elv_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xd38a975a	pci_create_slot
+EXPORT_SYMBOL_GPL vmlinux 0xd3a2bfa0	usb_hcd_check_unlink_urb
+EXPORT_SYMBOL_GPL vmlinux 0xd3b4e13b	device_register
+EXPORT_SYMBOL_GPL vmlinux 0xd3f005d8	ata_pio_queue_task
+EXPORT_SYMBOL_GPL vmlinux 0xd4219573	securityfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xd42fcea7	rtc_irq_register
+EXPORT_SYMBOL_GPL vmlinux 0xd4600f7d	regulator_bulk_get
+EXPORT_SYMBOL_GPL vmlinux 0xd47afa88	usb_hcd_resume_root_hub
+EXPORT_SYMBOL_GPL vmlinux 0xd4920605	ip6_dst_blackhole
+EXPORT_SYMBOL_GPL vmlinux 0xd4fec2da	snd_soc_dai_set_pll
+EXPORT_SYMBOL_GPL vmlinux 0xd517df80	ring_buffer_read_page
+EXPORT_SYMBOL_GPL vmlinux 0xd58fd615	__class_register
+EXPORT_SYMBOL_GPL vmlinux 0xd5be91f4	crypto_spawn_tfm
+EXPORT_SYMBOL_GPL vmlinux 0xd5e3535b	debugfs_create_x32
+EXPORT_SYMBOL_GPL vmlinux 0xd600aa10	crypto_register_shash
+EXPORT_SYMBOL_GPL vmlinux 0xd653912d	vfs_setxattr
+EXPORT_SYMBOL_GPL vmlinux 0xd6d03942	relay_reset
+EXPORT_SYMBOL_GPL vmlinux 0xd73ef534	sysdev_resume
+EXPORT_SYMBOL_GPL vmlinux 0xd741cfcf	blocking_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xd768e985	regulator_has_full_constraints
+EXPORT_SYMBOL_GPL vmlinux 0xd821964e	add_timer_on
+EXPORT_SYMBOL_GPL vmlinux 0xd8e7da0a	ring_buffer_overrun_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xd8e8d4e4	aead_geniv_init
+EXPORT_SYMBOL_GPL vmlinux 0xd9300760	unregister_jprobe
+EXPORT_SYMBOL_GPL vmlinux 0xd98d8c9f	tcp_cong_avoid_ai
+EXPORT_SYMBOL_GPL vmlinux 0xd99ac0f6	simple_attr_write
+EXPORT_SYMBOL_GPL vmlinux 0xd9ef6144	dma_get_required_mask
+EXPORT_SYMBOL_GPL vmlinux 0xda1be8e1	async_synchronize_cookie_domain
+EXPORT_SYMBOL_GPL vmlinux 0xda9a9336	snd_soc_dapm_info_pin_switch
+EXPORT_SYMBOL_GPL vmlinux 0xdac1e3cd	pci_set_pcie_reset_state
+EXPORT_SYMBOL_GPL vmlinux 0xdae78fe5	bd_claim_by_disk
+EXPORT_SYMBOL_GPL vmlinux 0xdaf3f25a	crypto_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0xdaf4dfb3	fb_mode_option
+EXPORT_SYMBOL_GPL vmlinux 0xdb274e52	monotonic_to_bootbased
+EXPORT_SYMBOL_GPL vmlinux 0xdb47427c	rtnl_put_cacheinfo
+EXPORT_SYMBOL_GPL vmlinux 0xdbcf0d7c	transport_destroy_device
+EXPORT_SYMBOL_GPL vmlinux 0xdbdbe878	usb_stor_ctrl_transfer
+EXPORT_SYMBOL_GPL vmlinux 0xdc843650	shash_ahash_finup
+EXPORT_SYMBOL_GPL vmlinux 0xdcd7f572	usb_lock_device_for_reset
+EXPORT_SYMBOL_GPL vmlinux 0xdcdb061c	crypto_destroy_tfm
+EXPORT_SYMBOL_GPL vmlinux 0xdcf4e6a4	pci_destroy_slot
+EXPORT_SYMBOL_GPL vmlinux 0xdd0d7608	device_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xdd2dfdb1	hid_check_keys_pressed
+EXPORT_SYMBOL_GPL vmlinux 0xdd8b4915	w1_read_8
+EXPORT_SYMBOL_GPL vmlinux 0xdd9219f7	ata_base_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0xdd991bd6	inet6_csk_bind_conflict
+EXPORT_SYMBOL_GPL vmlinux 0xdde9aaee	cpufreq_frequency_table_verify
+EXPORT_SYMBOL_GPL vmlinux 0xde269fed	crypto_shash_digest
+EXPORT_SYMBOL_GPL vmlinux 0xde3c086d	crypto_find_alg
+EXPORT_SYMBOL_GPL vmlinux 0xde417b81	async_schedule_domain
+EXPORT_SYMBOL_GPL vmlinux 0xde77094e	vfs_getxattr
+EXPORT_SYMBOL_GPL vmlinux 0xde9eaf05	scsi_mode_select
+EXPORT_SYMBOL_GPL vmlinux 0xdebe6674	mv88fx_i2s_dai0
+EXPORT_SYMBOL_GPL vmlinux 0xdebf0be8	pci_find_ext_capability
+EXPORT_SYMBOL_GPL vmlinux 0xded40fad	rt5610_dai
+EXPORT_SYMBOL_GPL vmlinux 0xdeecd751	sysfs_get
+EXPORT_SYMBOL_GPL vmlinux 0xdef779e3	mnt_want_write
+EXPORT_SYMBOL_GPL vmlinux 0xdf05a961	class_find_device
+EXPORT_SYMBOL_GPL vmlinux 0xdf071bea	regulator_get
+EXPORT_SYMBOL_GPL vmlinux 0xdf3418c3	pci_intx
+EXPORT_SYMBOL_GPL vmlinux 0xdf6fdcc9	cpufreq_unregister_governor
+EXPORT_SYMBOL_GPL vmlinux 0xdfbbca23	crypto_enqueue_request
+EXPORT_SYMBOL_GPL vmlinux 0xdfdedd51	usb_hcd_link_urb_to_ep
+EXPORT_SYMBOL_GPL vmlinux 0xdfe969e7	ata_host_resume
+EXPORT_SYMBOL_GPL vmlinux 0xdfee57ec	ata_scsi_simulate
+EXPORT_SYMBOL_GPL vmlinux 0xe00a7b73	sysfs_remove_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0xe0187abc	crypto_larval_kill
+EXPORT_SYMBOL_GPL vmlinux 0xe05230bd	ata_bmdma_setup
+EXPORT_SYMBOL_GPL vmlinux 0xe098b04e	snd_soc_dai_set_sysclk
+EXPORT_SYMBOL_GPL vmlinux 0xe0cca33e	xfrm_aead_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0xe0d90785	power_supply_register
+EXPORT_SYMBOL_GPL vmlinux 0xe1787fad	crypto_init_spawn
+EXPORT_SYMBOL_GPL vmlinux 0xe17b63bb	tcp_reno_ssthresh
+EXPORT_SYMBOL_GPL vmlinux 0xe1822936	vfs_setlease
+EXPORT_SYMBOL_GPL vmlinux 0xe1f32237	br_handle_frame_hook
+EXPORT_SYMBOL_GPL vmlinux 0xe27f0402	__uio_register_device
+EXPORT_SYMBOL_GPL vmlinux 0xe2870c19	skcipher_geniv_free
+EXPORT_SYMBOL_GPL vmlinux 0xe2c736c7	tty_ldisc_ref_wait
+EXPORT_SYMBOL_GPL vmlinux 0xe31d7eb4	register_net_sysctl_table
+EXPORT_SYMBOL_GPL vmlinux 0xe36f839e	pxa2xx_ac97_try_warm_reset
+EXPORT_SYMBOL_GPL vmlinux 0xe3e927cd	inet6_csk_search_req
+EXPORT_SYMBOL_GPL vmlinux 0xe471ef05	ata_bmdma32_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0xe493482b	spi_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0xe49e1f6c	ring_buffer_record_disable_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xe49ff3b0	ata_wait_register
+EXPORT_SYMBOL_GPL vmlinux 0xe4a800ec	snd_soc_jack_free_gpios
+EXPORT_SYMBOL_GPL vmlinux 0xe4bc8e7d	blk_execute_rq_nowait
+EXPORT_SYMBOL_GPL vmlinux 0xe530071c	pm_qos_remove_requirement
+EXPORT_SYMBOL_GPL vmlinux 0xe5923561	ring_buffer_time_stamp
+EXPORT_SYMBOL_GPL vmlinux 0xe59fcd30	unregister_pernet_device
+EXPORT_SYMBOL_GPL vmlinux 0xe5b77acf	usb_get_hcd
+EXPORT_SYMBOL_GPL vmlinux 0xe5b9e099	debugfs_create_dir
+EXPORT_SYMBOL_GPL vmlinux 0xe5eb24b5	inet_twsk_purge
+EXPORT_SYMBOL_GPL vmlinux 0xe612ede1	sysdev_class_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0xe61a6d2f	gpio_unexport
+EXPORT_SYMBOL_GPL vmlinux 0xe61e60b7	ata_bmdma_start
+EXPORT_SYMBOL_GPL vmlinux 0xe62a1fb2	dm_noflush_suspending
+EXPORT_SYMBOL_GPL vmlinux 0xe63d9aed	crypto_alg_mod_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xe6488b47	cpufreq_notify_transition
+EXPORT_SYMBOL_GPL vmlinux 0xe651f76e	selinux_is_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xe667d22d	rtc_update_irq_enable
+EXPORT_SYMBOL_GPL vmlinux 0xe698ae09	usb_interrupt_msg
+EXPORT_SYMBOL_GPL vmlinux 0xe6a1ebbe	pskb_put
+EXPORT_SYMBOL_GPL vmlinux 0xe6c12872	hid_resolv_usage
+EXPORT_SYMBOL_GPL vmlinux 0xe71c0294	devres_remove_group
+EXPORT_SYMBOL_GPL vmlinux 0xe73214f7	ubi_leb_write
+EXPORT_SYMBOL_GPL vmlinux 0xe73562d9	snd_soc_dapm_get_pin_status
+EXPORT_SYMBOL_GPL vmlinux 0xe7359aa1	sdhci_suspend_host
+EXPORT_SYMBOL_GPL vmlinux 0xe752518c	sysdev_show_ulong
+EXPORT_SYMBOL_GPL vmlinux 0xe75c865d	hid_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0xe770e9e3	ata_qc_complete
+EXPORT_SYMBOL_GPL vmlinux 0xe7fb2045	page_cache_async_readahead
+EXPORT_SYMBOL_GPL vmlinux 0xe8628d73	input_ff_event
+EXPORT_SYMBOL_GPL vmlinux 0xe862c4b7	dpm_suspend_start
+EXPORT_SYMBOL_GPL vmlinux 0xe8789a12	eventfd_ctx_get
+EXPORT_SYMBOL_GPL vmlinux 0xe88574dd	device_del
+EXPORT_SYMBOL_GPL vmlinux 0xe8877ca5	__sock_recv_timestamp
+EXPORT_SYMBOL_GPL vmlinux 0xe88d7d26	relay_close
+EXPORT_SYMBOL_GPL vmlinux 0xe899aa51	da903x_read
+EXPORT_SYMBOL_GPL vmlinux 0xe8b3ac7d	i2c_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0xe8e2095f	soc_codec_dev_rt5610
+EXPORT_SYMBOL_GPL vmlinux 0xe901175f	__dev_addr_unsync
+EXPORT_SYMBOL_GPL vmlinux 0xe917e733	ktime_add_safe
+EXPORT_SYMBOL_GPL vmlinux 0xe93e49c3	devres_free
+EXPORT_SYMBOL_GPL vmlinux 0xe9587909	usb_unregister_notify
+EXPORT_SYMBOL_GPL vmlinux 0xe969590d	platform_device_add_resources
+EXPORT_SYMBOL_GPL vmlinux 0xe9d64137	queue_work_on
+EXPORT_SYMBOL_GPL vmlinux 0xe9fec34f	tcp_death_row
+EXPORT_SYMBOL_GPL vmlinux 0xea065e01	task_handoff_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xea124bd1	gcd
+EXPORT_SYMBOL_GPL vmlinux 0xea12764f	led_classdev_resume
+EXPORT_SYMBOL_GPL vmlinux 0xea3a76a6	snd_soc_dapm_stream_event
+EXPORT_SYMBOL_GPL vmlinux 0xea3dbc3c	mnt_drop_write
+EXPORT_SYMBOL_GPL vmlinux 0xea3fffb0	register_timer_hook
+EXPORT_SYMBOL_GPL vmlinux 0xea418e0f	atapi_cmd_type
+EXPORT_SYMBOL_GPL vmlinux 0xea6d15f2	get_mtd_device
+EXPORT_SYMBOL_GPL vmlinux 0xeae6b87a	rtnl_register
+EXPORT_SYMBOL_GPL vmlinux 0xeaff2af6	tty_find_polling_driver
+EXPORT_SYMBOL_GPL vmlinux 0xeb2c71ab	inet_csk_reqsk_queue_prune
+EXPORT_SYMBOL_GPL vmlinux 0xeb49f207	da903x_set_bits
+EXPORT_SYMBOL_GPL vmlinux 0xeb66dd31	soc_codec_dev_rt5630
+EXPORT_SYMBOL_GPL vmlinux 0xeb9b3f52	inode_add_to_lists
+EXPORT_SYMBOL_GPL vmlinux 0xebb499f0	tty_prepare_flip_string
+EXPORT_SYMBOL_GPL vmlinux 0xebd7c801	da903x_writes
+EXPORT_SYMBOL_GPL vmlinux 0xec1a75a9	__dev_addr_sync
+EXPORT_SYMBOL_GPL vmlinux 0xec1b043e	regulator_suspend_prepare
+EXPORT_SYMBOL_GPL vmlinux 0xeca9a02a	nf_register_afinfo
+EXPORT_SYMBOL_GPL vmlinux 0xecd5e4ba	devres_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xece2c8c6	ip6_dst_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xece3382f	pciserial_remove_ports
+EXPORT_SYMBOL_GPL vmlinux 0xed1ccf99	usb_store_new_id
+EXPORT_SYMBOL_GPL vmlinux 0xed4b714e	fsstack_copy_attr_all
+EXPORT_SYMBOL_GPL vmlinux 0xed55a080	sysdev_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xed6fc8eb	ata_std_bios_param
+EXPORT_SYMBOL_GPL vmlinux 0xed75b8c3	alloc_page_buffers
+EXPORT_SYMBOL_GPL vmlinux 0xee8d7a82	i2c_new_probed_device
+EXPORT_SYMBOL_GPL vmlinux 0xeeaf65fb	pxa2xx_ac97_hw_resume
+EXPORT_SYMBOL_GPL vmlinux 0xeeca6f89	rtc_alarm_irq_enable
+EXPORT_SYMBOL_GPL vmlinux 0xeef408a4	sata_std_hardreset
+EXPORT_SYMBOL_GPL vmlinux 0xef403c41	sdio_set_host_pm_flags
+EXPORT_SYMBOL_GPL vmlinux 0xef4e963e	__atomic_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xef50235a	usb_get_from_anchor
+EXPORT_SYMBOL_GPL vmlinux 0xef6c3f70	round_jiffies_up_relative
+EXPORT_SYMBOL_GPL vmlinux 0xef82fdba	srcu_init_notifier_head
+EXPORT_SYMBOL_GPL vmlinux 0xefb8d971	device_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xefc22028	snd_soc_dapm_put_volsw
+EXPORT_SYMBOL_GPL vmlinux 0xefdd5a63	ktime_get_ts
+EXPORT_SYMBOL_GPL vmlinux 0xefe21106	snmp_mib_init
+EXPORT_SYMBOL_GPL vmlinux 0xf01029bc	find_task_by_vpid
+EXPORT_SYMBOL_GPL vmlinux 0xf010c6ac	tty_init_termios
+EXPORT_SYMBOL_GPL vmlinux 0xf02e9d89	relay_file_operations
+EXPORT_SYMBOL_GPL vmlinux 0xf0438697	usb_sg_wait
+EXPORT_SYMBOL_GPL vmlinux 0xf048d35e	crypto_ahash_type
+EXPORT_SYMBOL_GPL vmlinux 0xf0756fb7	snd_soc_dapm_nc_pin
+EXPORT_SYMBOL_GPL vmlinux 0xf0888c8b	snd_soc_info_volsw_2r
+EXPORT_SYMBOL_GPL vmlinux 0xf0c10b1b	sysfs_chmod_file
+EXPORT_SYMBOL_GPL vmlinux 0xf108e95c	fat_search_long
+EXPORT_SYMBOL_GPL vmlinux 0xf115ca3b	vfs_listxattr
+EXPORT_SYMBOL_GPL vmlinux 0xf1463412	execute_in_process_context
+EXPORT_SYMBOL_GPL vmlinux 0xf147e8fe	ata_pci_sff_prepare_host
+EXPORT_SYMBOL_GPL vmlinux 0xf184d189	kernel_power_off
+EXPORT_SYMBOL_GPL vmlinux 0xf1ec2db5	driver_add_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xf1fdfc6d	vfs_test_lock
+EXPORT_SYMBOL_GPL vmlinux 0xf20a0563	hrtimer_start
+EXPORT_SYMBOL_GPL vmlinux 0xf2482800	single_release_net
+EXPORT_SYMBOL_GPL vmlinux 0xf24fb90f	spi_async
+EXPORT_SYMBOL_GPL vmlinux 0xf282bf44	sysfs_notify
+EXPORT_SYMBOL_GPL vmlinux 0xf2ad33f6	hid_parse_report
+EXPORT_SYMBOL_GPL vmlinux 0xf2ec41ce	flush_workqueue
+EXPORT_SYMBOL_GPL vmlinux 0xf2fca922	uart_parse_options
+EXPORT_SYMBOL_GPL vmlinux 0xf2fde419	ubi_leb_unmap
+EXPORT_SYMBOL_GPL vmlinux 0xf31e793b	usb_hub_clear_tt_buffer
+EXPORT_SYMBOL_GPL vmlinux 0xf32cf606	ubi_leb_map
+EXPORT_SYMBOL_GPL vmlinux 0xf34806ec	hrtimer_get_res
+EXPORT_SYMBOL_GPL vmlinux 0xf3820a93	snd_soc_info_enum_double
+EXPORT_SYMBOL_GPL vmlinux 0xf38ba5a5	relay_subbufs_consumed
+EXPORT_SYMBOL_GPL vmlinux 0xf38d291d	tty_perform_flush
+EXPORT_SYMBOL_GPL vmlinux 0xf3a41758	skb_pull_rcsum
+EXPORT_SYMBOL_GPL vmlinux 0xf3c390c6	snd_soc_dapm_put_enum_double
+EXPORT_SYMBOL_GPL vmlinux 0xf3e086d5	w1_reset_select_slave
+EXPORT_SYMBOL_GPL vmlinux 0xf3e19027	ipv6_find_tlv
+EXPORT_SYMBOL_GPL vmlinux 0xf417b4fc	register_pernet_gen_subsys
+EXPORT_SYMBOL_GPL vmlinux 0xf421d2ad	pci_msi_off
+EXPORT_SYMBOL_GPL vmlinux 0xf47c99da	crypto_hash_walk_done
+EXPORT_SYMBOL_GPL vmlinux 0xf499fdb2	rcu_barrier_bh
+EXPORT_SYMBOL_GPL vmlinux 0xf4a46f4d	user_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xf4e3684b	shmem_file_setup
+EXPORT_SYMBOL_GPL vmlinux 0xf4fac879	crypto_tfm_in_queue
+EXPORT_SYMBOL_GPL vmlinux 0xf507b40b	cpuidle_register_device
+EXPORT_SYMBOL_GPL vmlinux 0xf544d31a	rt655_reset
+EXPORT_SYMBOL_GPL vmlinux 0xf54bd49b	lcm
+EXPORT_SYMBOL_GPL vmlinux 0xf553318d	cpuidle_pause_and_lock
+EXPORT_SYMBOL_GPL vmlinux 0xf57df59c	register_mtd_parser
+EXPORT_SYMBOL_GPL vmlinux 0xf58ee7c5	ipv6_opt_accepted
+EXPORT_SYMBOL_GPL vmlinux 0xf5a06497	crypto_alloc_base
+EXPORT_SYMBOL_GPL vmlinux 0xf5a691cd	invalidate_bh_lrus
+EXPORT_SYMBOL_GPL vmlinux 0xf5ab0301	snd_soc_dai_digital_mute
+EXPORT_SYMBOL_GPL vmlinux 0xf5bad13f	mmput
+EXPORT_SYMBOL_GPL vmlinux 0xf6b5938e	class_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xf6e874f5	ata_timing_merge
+EXPORT_SYMBOL_GPL vmlinux 0xf70ef9ff	dm_path_uevent
+EXPORT_SYMBOL_GPL vmlinux 0xf71afbd1	disk_part_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0xf728957c	skb_to_sgvec
+EXPORT_SYMBOL_GPL vmlinux 0xf73960ca	fill_inquiry_response
+EXPORT_SYMBOL_GPL vmlinux 0xf759492b	usb_queue_reset_device
+EXPORT_SYMBOL_GPL vmlinux 0xf7883171	apply_to_page_range
+EXPORT_SYMBOL_GPL vmlinux 0xf78e2e0e	kobject_uevent
+EXPORT_SYMBOL_GPL vmlinux 0xf7a898ec	ata_sff_port_start
+EXPORT_SYMBOL_GPL vmlinux 0xf7fbc574	ring_buffer_read_start
+EXPORT_SYMBOL_GPL vmlinux 0xf807fd65	scatterwalk_map_and_copy
+EXPORT_SYMBOL_GPL vmlinux 0xf80ff97a	__pneigh_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xf82b44a6	pci_reset_function
+EXPORT_SYMBOL_GPL vmlinux 0xf84f68d0	bdi_writeout_inc
+EXPORT_SYMBOL_GPL vmlinux 0xf863e82a	flush_work
+EXPORT_SYMBOL_GPL vmlinux 0xf8d8789d	ata_sff_dev_classify
+EXPORT_SYMBOL_GPL vmlinux 0xf8f2cd36	rtc_irq_set_state
+EXPORT_SYMBOL_GPL vmlinux 0xf8f3a0fb	ata_ratelimit
+EXPORT_SYMBOL_GPL vmlinux 0xf9362a33	snd_soc_put_volsw_s8
+EXPORT_SYMBOL_GPL vmlinux 0xf95fb7ac	usb_buffer_unmap_sg
+EXPORT_SYMBOL_GPL vmlinux 0xf9a054b5	__round_jiffies
+EXPORT_SYMBOL_GPL vmlinux 0xf9b91a85	hid_output_report
+EXPORT_SYMBOL_GPL vmlinux 0xf9ca3160	ata_id_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0xfa03f3fa	ring_buffer_discard_commit
+EXPORT_SYMBOL_GPL vmlinux 0xfa056491	led_trigger_register
+EXPORT_SYMBOL_GPL vmlinux 0xfa08663f	ata_link_abort
+EXPORT_SYMBOL_GPL vmlinux 0xfa3a9190	transport_class_register
+EXPORT_SYMBOL_GPL vmlinux 0xfa6ea60b	rtnl_kill_links
+EXPORT_SYMBOL_GPL vmlinux 0xfa98e3ce	rdev_get_id
+EXPORT_SYMBOL_GPL vmlinux 0xfacb0885	usb_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0xfb7222ca	dev_attr_em_message
+EXPORT_SYMBOL_GPL vmlinux 0xfb77e51a	ata_pci_bmdma_clear_simplex
+EXPORT_SYMBOL_GPL vmlinux 0xfbb34857	__crypto_alloc_tfm
+EXPORT_SYMBOL_GPL vmlinux 0xfbb3c355	fuse_conn_init
+EXPORT_SYMBOL_GPL vmlinux 0xfbbc4d41	dm_underlying_device_busy
+EXPORT_SYMBOL_GPL vmlinux 0xfbbd272f	hid_dump_device
+EXPORT_SYMBOL_GPL vmlinux 0xfbdb8e73	transport_setup_device
+EXPORT_SYMBOL_GPL vmlinux 0xfbf9be5d	register_oom_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xfc0a0cc9	zap_vma_ptes
+EXPORT_SYMBOL_GPL vmlinux 0xfc119062	sysfs_notify_dirent
+EXPORT_SYMBOL_GPL vmlinux 0xfc359169	raw_hash_sk
+EXPORT_SYMBOL_GPL vmlinux 0xfca22fee	rtc_set_mmss
+EXPORT_SYMBOL_GPL vmlinux 0xfcf46db2	snd_soc_jack_new
+EXPORT_SYMBOL_GPL vmlinux 0xfcf7daeb	snd_soc_info_enum_ext
+EXPORT_SYMBOL_GPL vmlinux 0xfd2bf42e	regulator_list_voltage
+EXPORT_SYMBOL_GPL vmlinux 0xfd6b22cd	kallsyms_on_each_symbol
+EXPORT_SYMBOL_GPL vmlinux 0xfd6f0ef9	ubi_unregister_volume_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xfdb6ec43	put_inotify_watch
+EXPORT_SYMBOL_GPL vmlinux 0xfdbcb061	blkcipher_walk_done
+EXPORT_SYMBOL_GPL vmlinux 0xfdcc9ce4	debugfs_rename
+EXPORT_SYMBOL_GPL vmlinux 0xfde0b92c	crypto_larval_error
+EXPORT_SYMBOL_GPL vmlinux 0xfde58e63	spi_alloc_master
+EXPORT_SYMBOL_GPL vmlinux 0xfde615dd	usb_driver_set_configuration
+EXPORT_SYMBOL_GPL vmlinux 0xfe990052	gpio_free
+EXPORT_SYMBOL_GPL vmlinux 0xfe9eabd3	platform_get_resource
+EXPORT_SYMBOL_GPL vmlinux 0xfea55f1e	__ata_ehi_push_desc
+EXPORT_SYMBOL_GPL vmlinux 0xfeabe647	ip_build_and_send_pkt
+EXPORT_SYMBOL_GPL vmlinux 0xfeb1b181	spi_write_then_read
+EXPORT_SYMBOL_GPL vmlinux 0xfeea90ee	bus_sort_breadthfirst
+EXPORT_SYMBOL_GPL vmlinux 0xff0f71b3	ata_cable_unknown
+EXPORT_SYMBOL_GPL vmlinux 0xff1bcd47	debugfs_create_size_t
+EXPORT_SYMBOL_GPL vmlinux 0xff5a8cfe	cn_del_callback
+EXPORT_SYMBOL_GPL vmlinux 0xff6b5c4d	ata_host_register
+EXPORT_SYMBOL_GPL vmlinux 0xffaf7bbb	__wake_up_sync
--- linux-mvl-dove-2.6.32.orig/debian/control.stub
+++ linux-mvl-dove-2.6.32/debian/control.stub
@@ -0,0 +1,75 @@
+Source: linux-mvl-dove
+Section: devel
+Priority: optional
+Maintainer: Ubuntu Kernel Team <kernel-team@lists.ubuntu.com>
+Standards-Version: 3.8.4.0
+Build-Depends: debhelper (>= 5), cpio, module-init-tools, kernel-wedge (>= 2.24ubuntu1), rsync
+Build-Depends-Indep: xmlto, docbook-utils, ghostscript, transfig, bzip2, sharutils
+Build-Conflicts: findutils (= 4.4.1-1ubuntu1)
+Vcs-Git: http://kernel.ubuntu.com/git-repos/ubuntu/ubuntu-lucid.git
+
+Package: linux-headers-2.6.32-218
+Architecture: armel
+Section: devel
+Priority: optional
+Depends: ${misc:Depends}, coreutils | fileutils (>= 4.0)
+#Provides: linux-headers, linux-headers-2.6
+Description: Header files related to linux-mvl-dove kernel version 2.6.32
+ This package provides kernel header files for version 2.6.32, for sites
+ that want the latest kernel headers. Please read
+ /usr/share/doc/linux-headers-2.6.32-218/debian.README.gz for details
+
+
+Package: linux-image-2.6.32-218-dove
+Architecture: armel
+Section: admin
+Priority: optional
+Pre-Depends: dpkg (>= 1.10.24)
+Depends: ${misc:Depends}, initramfs-tools (>= 0.36ubuntu6), coreutils | fileutils (>= 4.0), module-init-tools (>= 3.3-pre11-4ubuntu3), wireless-crda
+Conflicts: hotplug (<< 0.0.20040105-1)
+Recommends: 
+Suggests: fdutils, linux-mvl-dove-doc-2.6.32 | linux-mvl-dove-source-2.6.32
+Description: Linux kernel image for version 2.6.32 on dove-based systems
+ This package contains the Linux kernel image for version 2.6.32 on
+ dove-based systems.
+ .
+ Also includes the corresponding System.map file, the modules built by the
+ packager, and scripts that try to ensure that the system is not left in an
+ unbootable state after an update.
+ .
+ Supports dove processors.
+ .
+ Marvell, dove, y0 boards
+ .
+ You likely do not want to install this package directly. Instead, install
+ the linux-dove meta-package, which will ensure that upgrades work
+ correctly, and that supporting packages are also installed.
+
+Package: linux-headers-2.6.32-218-dove
+Architecture: armel
+Section: devel
+Priority: optional
+Depends: ${misc:Depends}, coreutils | fileutils (>= 4.0), linux-headers-2.6.32-218, ${shlibs:Depends}
+Description: Linux kernel headers for version 2.6.32 on dove-based systems
+ This package provides kernel header files for version 2.6.32 on
+ dove-based systems.
+ .
+ This is for sites that want the latest kernel headers.  Please read
+ /usr/share/doc/linux-headers-2.6.32-218/debian.README.gz for details.
+
+Package: linux-image-2.6.32-218-dove-dbgsym
+Architecture: armel
+Section: devel
+Priority: optional
+Depends: ${misc:Depends}
+Provides: linux-debug
+Description: Linux kernel debug image for version 2.6.32 on dove-based systems
+ This package provides a kernel debug image for version 2.6.32 on
+ dove-based systems.
+ .
+ This is for sites that wish to debug the kernel.
+ .
+ The kernel image contained in this package is NOT meant to boot from. It
+ is uncompressed, and unstripped. This package also includes the
+ unstripped modules.
+
--- linux-mvl-dove-2.6.32.orig/debian/copyright
+++ linux-mvl-dove-2.6.32/debian/copyright
@@ -0,0 +1,30 @@
+This is the Ubuntu prepackaged version of the Linux kernel.
+Linux was written by Linus Torvalds <Linus.Torvalds@cs.Helsinki.FI>
+and others.
+
+This package was put together by the Ubuntu Kernel Team, from
+sources retrieved from upstream linux git.
+The sources may be found at most Linux ftp sites, including 
+ftp://ftp.kernel.org/pub/linux/kernel/
+
+This package is currently maintained by the
+Ubuntu Kernel Team <ubuntu-kernel@lists.ubuntu.com>
+
+Linux is copyrighted by Linus Torvalds and others.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 dated June, 1991.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+   02111-1307, USA.
+
+On Ubuntu Linux systems, the complete text of the GNU General
+Public License v2 can be found in `/usr/share/common-licenses/GPL-2'.
--- linux-mvl-dove-2.6.32.orig/debian/changelog
+++ linux-mvl-dove-2.6.32/debian/changelog
@@ -0,0 +1,10264 @@
+linux-mvl-dove (2.6.32-218.35) lucid-proposed; urgency=low
+
+  [ Paolo Pisati ]
+
+  * Release Tracking Bug
+    - LP: #829161
+  * Rebased to 2.6.32-34.74
+
+  [ Ubuntu: 2.6.32-34.74 ]
+
+  * Release Tracking Bug
+    - LP: #828375
+  * proc: fix oops on invalid /proc/<pid>/maps access, CVE-2011-1020
+    - LP: #813026
+    - CVE-2011-1020
+
+  [ Ubuntu: 2.6.32-34.73 ]
+
+  * Release Tracking Bug
+    - LP: #824148
+  * SAUCE: rtl8192se: Force a build for a 2.6/3.0 kernel
+    - LP: #805494
+  * [Config] Add enic/fnic to udebs
+    - LP: #801610
+  * tty: icount changeover for other main devices, CVE-2010-4076,
+    CVE-2010-4077
+    - LP: #720189
+    - CVE-2010-4077
+  * fs/partitions/efi.c: corrupted GUID partition tables can cause kernel
+    oops
+    - LP: #795418
+    - CVE-2011-1577
+  * ftrace: Only update the function code on write to filter files
+    - LP: #802383
+  * kmemleak: Do not return a pointer to an object that kmemleak did not
+    get
+    - LP: #802383
+  * CPU hotplug, re-create sysfs directory and symlinks
+    - LP: #802383
+  * Fix memory leak in cpufreq_stat
+    - LP: #802383
+  * powerpc/kexec: Fix memory corruption from unallocated slaves
+    - LP: #802383
+  * powerpc/oprofile: Handle events that raise an exception without
+    overflowing
+    - LP: #802383
+  * mtd: mtdconcat: fix NAND OOB write
+    - LP: #802383
+  * x86, 64-bit: Fix copy_[to/from]_user() checks for the userspace address
+    limit
+    - LP: #802383
+  * ext3: Fix fs corruption when make_indexed_dir() fails
+    - LP: #802383
+  * jbd: Fix forever sleeping process in do_get_write_access()
+    - LP: #802383
+  * jbd: fix fsync() tid wraparound bug
+    - LP: #802383
+  * ext4: release page cache in ext4_mb_load_buddy error path
+    - LP: #802383
+  * Fix Ultrastor asm snippet
+    - LP: #802383
+  * x86, amd: Do not enable ARAT feature on AMD processors below family
+    0x12
+    - LP: #802383
+  * x86, amd: Use _safe() msr access for GartTlbWlk disable code
+    - LP: #802383
+  * rcu: Fix unpaired rcu_irq_enter() from locking selftests
+    - LP: #802383
+  * staging: usbip: fix wrong endian conversion
+    - LP: #802383
+  * Fix for buffer overflow in ldm_frag_add not sufficient
+    - LP: #802383
+  * seqlock: Don't smp_rmb in seqlock reader spin loop
+    - LP: #802383
+  * ALSA: HDA: Use one dmic only for Dell Studio 1558
+    - LP: #731706, #802383
+  * ASoC: Ensure output PGA is enabled for line outputs in wm_hubs
+    - LP: #802383
+  * ASoC: Add some missing volume update bit sets for wm_hubs devices
+    - LP: #802383
+  * mm/page_alloc.c: prevent unending loop in __alloc_pages_slowpath()
+    - LP: #802383
+  * loop: limit 'max_part' module param to DISK_MAX_PARTS
+    - LP: #802383
+  * loop: handle on-demand devices correctly
+    - LP: #802383
+  * USB: CP210x Add 4 Device IDs for AC-Services Devices
+    - LP: #802383
+  * USB: moto_modem: Add USB identifier for the Motorola VE240.
+    - LP: #802383
+  * USB: serial: ftdi_sio: adding support for TavIR STK500
+    - LP: #802383
+  * USB: gamin_gps: Fix for data transfer problems in native mode
+    - LP: #802383
+  * usb/gadget: at91sam9g20 fix end point max packet size
+    - LP: #802383
+  * usb: gadget: rndis: don't test against req->length
+    - LP: #802383
+  * OHCI: fix regression caused by nVidia shutdown workaround
+    - LP: #802383
+  * p54usb: add zoom 4410 usbid
+    - LP: #802383
+  * eCryptfs: Allow 2 scatterlist entries for encrypted filenames
+    - LP: #802383
+  * UBIFS: fix a rare memory leak in ro to rw remounting path
+    - LP: #802383
+  * i8k: Avoid lahf in 64-bit code
+    - LP: #802383
+  * cpuidle: menu: fixed wrapping timers at 4.294 seconds
+    - LP: #802383
+  * dm table: reject devices without request fns
+    - LP: #802383
+  * atm: expose ATM device index in sysfs
+    - LP: #802383
+  * brd: limit 'max_part' module param to DISK_MAX_PARTS
+    - LP: #802383
+  * brd: handle on-demand devices correctly
+    - LP: #802383
+  * SUNRPC: Deal with the lack of a SYN_SENT sk->sk_state_change
+    callback...
+    - LP: #802383
+  * PCI: Add quirk for setting valid class for TI816X Endpoint
+    - LP: #802383
+  * xen mmu: fix a race window causing leave_mm BUG()
+    - LP: #802383
+  * netfilter: nf_conntrack_reasm: properly handle packets fragmented into
+    a single fragment
+    - LP: #802383
+  * fix memory leak in scsi_report_lun_scan
+    - LP: #802383
+  * fix refcounting bug in scsi_get_host_dev
+    - LP: #802383
+  * fix duplicate removal on error path in scsi_sysfs_add_sdev
+    - LP: #802383
+  * UBIFS: fix shrinker object count reports
+    - LP: #802383
+  * UBIFS: fix memory leak on error path
+    - LP: #802383
+  * nbd: limit module parameters to a sane value
+    - LP: #802383
+  * mm: fix ENOSPC returned by handle_mm_fault()
+    - LP: #802383
+  * PCI: Set PCIE maxpayload for card during hotplug insertion
+    - LP: #802383
+  * nl80211: fix check for valid SSID size in scan operations
+    - LP: #802383
+  * lockdep: Fix lock_is_held() on recursion
+    - LP: #802383
+  * drm/i915: Add a no lvds quirk for the Asus EeeBox PC EB1007
+    - LP: #802383
+  * drm/radeon/kms: fix for radeon on systems >4GB without hardware iommu
+    - LP: #802383
+  * fat: Fix corrupt inode flags when remove ATTR_SYS flag
+    - LP: #802383
+  * xen: off by one errors in multicalls.c
+    - LP: #802383
+  * x86/amd-iommu: Fix 3 possible endless loops
+    - LP: #802383
+  * USB: cdc-acm: Adding second ACM channel support for Nokia E7 and C7
+    - LP: #802383
+  * USB: core: Tolerate protocol stall during hub and port status read
+    - LP: #802383
+  * USB: serial: add another 4N-GALAXY.DE PID to ftdi_sio driver
+    - LP: #802383
+  * ALSA: hda: Fix quirk for Dell Inspiron 910
+    - LP: #792712, #802383
+  * oprofile, dcookies: Fix possible circular locking dependency
+    - LP: #802383
+  * CPUFREQ: Remove cpufreq_stats sysfs entries on module unload.
+    - LP: #802383
+  * md: check ->hot_remove_disk when removing disk
+    - LP: #802383
+  * md/raid5: fix raid5_set_bi_hw_segments
+    - LP: #802383
+  * md/raid5: fix FUA request handling in ops_run_io()
+    - LP: #802383
+  * ata: use pci_dev->revision
+    - LP: #802383
+  * pata_cmd64x: fix PIO setup
+    - LP: #802383
+  * pata_cmd64x: cmd648_bmdma_stop() fix
+    - LP: #802383
+  * pata_cmd64x: remove unused definitions
+    - LP: #802383
+  * pata_cm64x: fix boot crash on parisc
+    - LP: #802383
+  * ACPI: use _HID when supplied by root-level devices
+    - LP: #802383
+  * xfs: properly account for reclaimed inodes
+    - LP: #802383
+  * exec: delay address limit change until point of no return
+    - LP: #802383
+  * netfilter: IPv6: initialize TOS field in REJECT target module
+    - LP: #802383
+  * netfilter: IPv6: fix DSCP mangle code
+    - LP: #802383
+  * genirq: Add IRQF_FORCE_RESUME
+    - LP: #802383
+  * xen: Use IRQF_FORCE_RESUME
+    - LP: #802383
+  * time: Compensate for rounding on odd-frequency clocksources
+    - LP: #802383
+  * Linux 2.6.32.42
+    - LP: #802383
+  * taskstats: don't allow duplicate entries in listener mode,
+    CVE-2011-2484
+    - LP: #806390
+    - CVE-2011-2484
+  * drm_mm: extract check_free_mm_node
+    - LP: #599017, #807508
+  * drm: implement helper functions for scanning lru list
+    - LP: #599017, #807508
+  * drm/i915: prepare for fair lru eviction
+    - LP: #599017, #807508
+  * drm/i915: Move the eviction logic to its own file.
+    - LP: #599017, #807508
+  * drm/i915: Implement fair lru eviction across both rings. (v2)
+    - LP: #599017, #807508
+  * drm/i915: Maintain LRU order of inactive objects upon access by CPU
+    (v2)
+    - LP: #599017, #807508
+  * drm/i915/evict: Ensure we completely cleanup on failure
+    - LP: #599017, #807508
+  * drm/i915: Periodically flush the active lists and requests
+    - LP: #599017, #807508
+  * Linux 2.6.32.42+drm33.19
+    - LP: #807508
+  * net: add limit for socket backlog CVE-2010-4251
+    - LP: #807462
+  * tcp: use limited socket backlog CVE-2010-4251
+    - LP: #807462
+  * ipv6: udp: Optimise multicast reception
+    - LP: #807462
+  * ipv4: udp: Optimise multicast reception
+    - LP: #807462
+  * udp: multicast RX should increment SNMP/sk_drops counter in allocation
+    failures CVE-2010-4251
+    - LP: #807462
+  * udp: use limited socket backlog CVE-2010-4251
+    - LP: #807462
+  * llc: use limited socket backlog CVE-2010-4251
+    - LP: #807462
+  * sctp: use limited socket backlog CVE-2010-4251
+    - LP: #807462
+  * tipc: use limited socket backlog CVE-2010-4251
+    - LP: #807462
+  * x25: use limited socket backlog CVE-2010-4251
+    - LP: #807462
+  * net: backlog functions rename CVE-2010-4251
+    - LP: #807462
+  * net: sk_add_backlog() take rmem_alloc into account CVE-2010-4805
+    - LP: #809318
+  * ksm: fix NULL pointer dereference in scan_get_next_rmap_item()
+    - LP: #810425
+  * migrate: don't account swapcache as shmem
+    - LP: #810425
+  * clocksource: Make watchdog robust vs. interruption
+    - LP: #810425
+  * TTY: ldisc, do not close until there are readers
+    - LP: #810425
+  * xhci: Reject double add of active endpoints.
+    - LP: #810425
+  * PM: Free memory bitmaps if opening /dev/snapshot fails
+    - LP: #810425
+  * ath5k: fix memory leak when fewer than N_PD_CURVES are in use
+    - LP: #810425
+  * mm: fix negative commitlimit when gigantic hugepages are allocated
+    - LP: #810425
+  * uvcvideo: Remove buffers from the queues when freeing
+    - LP: #810425
+  * watchdog: mtx1-wdt: request gpio before using it
+    - LP: #810425
+  * debugobjects: Fix boot crash when kmemleak and debugobjects enabled
+    - LP: #810425
+  * cfq-iosched: fix locking around ioc->ioc_data assignment
+    - LP: #810425
+  * cfq-iosched: fix a rcu warning
+    - LP: #810425
+  * i2c-taos-evm: Fix log messages
+    - LP: #810425
+  * md: avoid endless recovery loop when waiting for fail device to
+    complete.
+    - LP: #810425
+  * SUNRPC: Ensure the RPC client only quits on fatal signals
+    - LP: #810425
+  * 6pack,mkiss: fix lock inconsistency
+    - LP: #810425
+  * USB: don't let errors prevent system sleep
+    - LP: #810425
+  * USB: don't let the hub driver prevent system sleep
+    - LP: #810425
+  * uml: fix CONFIG_STATIC_LINK=y build failure with newer glibc
+    - LP: #810425
+  * um: os-linux/mem.c needs sys/stat.h
+    - LP: #810425
+  * inet_diag: fix inet_diag_bc_audit()
+    - LP: #810425
+  * PM / Hibernate: Avoid hitting OOM during preallocation of memory
+    - LP: #810425
+  * PM / Hibernate: Fix free_unnecessary_pages()
+    - LP: #810425
+  * bug.h: Add WARN_RATELIMIT
+    - LP: #810425
+  * net: filter: Use WARN_RATELIMIT
+    - LP: #810425
+  * af_packet: prevent information leak
+    - LP: #810425
+  * net/ipv4: Check for mistakenly passed in non-IPv4 address
+    - LP: #810425
+  * ipv6/udp: Use the correct variable to determine non-blocking condition
+    - LP: #810425
+  * udp/recvmsg: Clear MSG_TRUNC flag when starting over for a new packet
+    - LP: #810425
+  * mm: prevent concurrent unmap_mapping_range() on the same inode
+    - LP: #810425
+  * xen: set max_pfn_mapped to the last pfn mapped
+    - LP: #810425
+  * xen: partially revert "xen: set max_pfn_mapped to the last pfn mapped"
+    - LP: #810425
+  * Linux 2.6.32.43
+    - LP: #810425
+  * eCryptfs: Handle failed metadata read in lookup
+    - LP: #509180
+  * pagemap: close races with suid execve, CVE-2011-1020
+    - LP: #813026
+    - CVE-2011-1020
+  * report errors in /proc/*/*map* sanely, CVE-2011-1020
+    - LP: #813026
+    - CVE-2011-1020
+  * close race in /proc/*/environ, CVE-2011-1020
+    - LP: #813026
+    - CVE-2011-1020
+  * auxv: require the target to be tracable (or yourself), CVE-2011-1020
+    - LP: #813026
+    - CVE-2011-1020
+  * deal with races in /proc/*/{syscall, stack, personality}, CVE-2011-1020
+    - LP: #813026
+    - CVE-2011-1020
+  * rose_loopback_timer sets VC number <= ROSE_DEFAULT_MAXVC, CVE-2011-1493
+    - LP: #816550
+    - CVE-2011-1493
+  * rose: Add length checks to CALL_REQUEST parsing, CVE-2011-1493
+    - LP: #816550
+    - CVE-2011-1493
+  * Bluetooth: l2cap and rfcomm: fix 1 byte infoleak to userspace.
+    - LP: #819569
+    - CVE-2011-2492
+  * drm/nv50-nvc0: work around an evo channel hang that some people see
+    - LP: #583760
+  * ASoC: Fix Blackfin I2S _pointer() implementation return in bounds
+    values
+    - LP: #823296
+  * v4l2-ioctl.c: prefill tuner type for g_frequency and g/s_tuner
+    - LP: #823296
+  * pvrusb2: fix g/s_tuner support
+    - LP: #823296
+  * bttv: fix s_tuner for radio
+    - LP: #823296
+  * gro: Only reset frag0 when skb can be pulled
+    - LP: #823296
+  * NFSv4.1: update nfs4_fattr_bitmap_maxsz
+    - LP: #823296
+  * SUNRPC: Fix a race between work-queue and rpc_killall_tasks
+    - LP: #823296
+  * SUNRPC: Fix use of static variable in rpcb_getport_async
+    - LP: #823296
+  * si4713-i2c: avoid potential buffer overflow on si4713
+    - LP: #823296
+  * hwmon: (max1111) Fix race condition causing NULL pointer exception
+    - LP: #823296
+  * bridge: send proper message_age in config BPDU
+    - LP: #823296
+  * davinci: DM365 EVM: fix video input mux bits
+    - LP: #823296
+  * libata: fix unexpectedly frozen port after ata_eh_reset()
+    - LP: #823296
+  * x86: Make Dell Latitude E5420 use reboot=pci
+    - LP: #823296
+  * USB: pl2303: add AdLink ND-6530 USB IDs
+    - LP: #823296
+  * USB: pl2303.h: checkpatch cleanups
+    - LP: #823296
+  * USB: serial: add IDs for WinChipHead USB->RS232 adapter
+    - LP: #823296
+  * staging: comedi: fix infoleak to userspace
+    - LP: #823296
+  * USB: OHCI: fix another regression for NVIDIA controllers
+    - LP: #823296
+  * usb: musb: restore INDEX register in resume path
+    - LP: #823296
+  * USB: dummy-hcd needs the has_tt flag
+    - LP: #823296
+  * ARM: pxa/cm-x300: fix V3020 RTC functionality
+    - LP: #823296
+  * jme: Fix unmap error (Causing system freeze)
+    - LP: #823296
+  * libsas: remove expander from dev list on error
+    - LP: #823296
+  * mac80211: Restart STA timers only on associated state
+    - LP: #823296
+  * Blacklist Traxdata CDR4120 and IOMEGA Zip drive to avoid lock ups.
+    - LP: #823296
+  * ses: requesting a fault indication
+    - LP: #823296
+  * pmcraid: reject negative request size
+    - LP: #823296
+  * kexec, x86: Fix incorrect jump back address if not preserving context
+    - LP: #823296
+  * powerpc/kdump: Fix timeout in crash_kexec_wait_realmode
+    - LP: #823296
+  * PCI: ARI is a PCIe v2 feature
+    - LP: #823296
+  * cciss: do not attempt to read from a write-only register
+    - LP: #823296
+  * xtensa: prevent arbitrary read in ptrace
+    - LP: #823296
+  * ext3: Fix oops in ext3_try_to_allocate_with_rsv()
+    - LP: #823296
+  * svcrpc: fix list-corrupting race on nfsd shutdown
+    - LP: #823296
+  * EHCI: only power off port if over-current is active
+    - LP: #823296
+  * EHCI: fix direction handling for interrupt data toggles
+    - LP: #823296
+  * powerpc/pseries/hvconsole: Fix dropped console output
+    - LP: #823296
+  * x86: Hpet: Avoid the comparator readback penalty
+    - LP: #823296
+  * x86: HPET: Chose a paranoid safe value for the ETIME check
+    - LP: #823296
+  * cifs: clean up cifs_find_smb_ses (try #2)
+    - LP: #823296
+  * cifs: fix NULL pointer dereference in cifs_find_smb_ses
+    - LP: #823296
+  * cifs: check for NULL session password
+    - LP: #823296
+  * gre: fix netns vs proto registration ordering
+    - LP: #823296
+  * netns xfrm: fixup xfrm6_tunnel error propagation
+    - LP: #823296
+  * tunnels: fix netns vs proto registration ordering
+    - LP: #823296
+  * alpha: fix several security issues
+    - LP: #823296
+  * proc: restrict access to /proc/PID/io
+    - LP: #823296
+  * ALSA: sound/core/pcm_compat.c: adjust array index
+    - LP: #823296
+  * dm mpath: fix potential NULL pointer in feature arg processing
+    - LP: #823296
+  * dm: fix idr leak on module removal
+    - LP: #823296
+  * perf: overflow/perf_count_sw_cpu_clock crashes recent kernels
+    - LP: #823296
+  * atm: [br2684] allow routed mode operation again
+    - LP: #823296
+  * Linux 2.6.32.44
+    - LP: #823296
+
+  [ Ubuntu: 2.6.32-33.72 ]
+
+  * Release Tracking Bug
+    - LP: #818196
+  * Revert "fix oops in scsi_run_queue()"
+    - LP: #811745
+  * Revert "put stricter guards on queue dead checks"
+    - LP: #811745
+
+  [ Ubuntu: 2.6.32-33.71 ]
+
+  * Release Tracking Bug
+    - LP: #813507
+  * splice: direct_splice_actor() should not use pos in sd
+    - LP: #588861
+
+  [ Ubuntu: 2.6.32-33.70 ]
+
+  * Release Tracking Bug
+    - LP: #807175
+  * Revert "x86: Flush TLB if PGD entry is changed in i386 PAE mode"
+    - LP: #805209
+
+  [ Ubuntu: 2.6.32-33.69 ]
+
+  * Release Tracking Bug
+    - LP: #802554
+  * Revert "af_unix: Only allow recv on connected seqpacket sockets."
+
+  [ Ubuntu: 2.6.32-33.68 ]
+
+  * Release Tracking Bug
+    - LP: #798305
+  * Fix abi directory
+
+  [ Ubuntu: 2.6.32-33.67 ]
+
+  * Revert "iwlagn: Support new 5000 microcode."
+
+ -- Paolo Pisati <paolo.pisati@canonical.com>  Fri, 19 Aug 2011 17:58:25 +0200
+
+linux-mvl-dove (2.6.32-217.34) lucid-proposed; urgency=low
+
+  [ Herton R. Krzesinski ]
+
+  * Release Tracking Bug
+    - LP: #794695
+
+  [ Paolo Pisati ]
+
+  * Rebased to 2.6.32-33.66
+
+  [ Ubuntu: 2.6.32-33.66 ]
+
+  * Release Tracking Bug
+    - LP: #794098
+  * Revert "xhci: Fix full speed bInterval encoding."
+  * Revert "USB: xhci - fix math in xhci_get_endpoint_interval()"
+  * Revert "USB: xhci - fix unsafe macro definitions"
+
+  [ Ubuntu: 2.6.32-33.65 ]
+
+  * xhci: Fix full speed bInterval encoding.
+    - LP: #792959
+
+  [ Ubuntu: 2.6.32-33.64 ]
+
+   * Release Tracking Bug
+     - LP: #789325
+  * SAUCE: (no-up) Fix up KVM: VMX: Fix host userspace gsbase corruption
+    - LP: #787675
+  * SAUCE: vesafb: mtrr module parameter is uint, not bool
+    - LP: #778043
+  * Revert "(pre-stable): input: Support Clickpad devices in ClickZone
+    mode"
+    - LP: #780588
+  * Revert "GFS2: Fix writing to non-page aligned gfs2_quota structures"
+    - LP: #780588
+  * Revert "mmc: build fix: mmc_pm_notify is only available with
+    CONFIG_PM=y"
+    - LP: #780588
+  * Revert "mmc: fix all hangs related to mmc/sd card insert/removal during
+    suspend/resume"
+    - LP: #780588
+  * Revert "econet: fix CVE-2010-3848"
+    - LP: #780588
+  * Revert "dell-laptop: Add another Dell laptop family to the DMI
+    whitelist"
+    - LP: #780588
+  * Revert "dell-laptop: Add another Dell laptop family to the DMI
+    whitelist"
+    - LP: #780588
+  * Revert "xen: set max_pfn_mapped to the last pfn mapped"
+  * cifs: always do is_path_accessible check in cifs_mount
+    - LP: #770050
+  * video: sn9c102: world-wirtable sysfs files
+    - LP: #770050
+  * UBIFS: restrict world-writable debugfs files
+    - LP: #770050
+  * NET: cdc-phonet, handle empty phonet header
+    - LP: #770050
+  * x86: Fix a bogus unwind annotation in lib/semaphore_32.S
+    - LP: #770050
+  * tioca: Fix assignment from incompatible pointer warnings
+    - LP: #770050
+  * mca.c: Fix cast from integer to pointer warning
+    - LP: #770050
+  * ramfs: fix memleak on no-mmu arch
+    - LP: #770050
+  * MAINTAINERS: update STABLE BRANCH info
+    - LP: #770050
+  * UBIFS: fix oops when R/O file-system is fsync'ed
+    - LP: #770050
+  * x86, cpu: AMD errata checking framework
+    - LP: #770050
+  * x86, cpu: Clean up AMD erratum 400 workaround
+    - LP: #770050
+  * x86, AMD: Set ARAT feature on AMD processors
+    - LP: #770050
+  * x86, amd: Disable GartTlbWlkErr when BIOS forgets it
+    - LP: #770050
+  * USB: ftdi_sio: Added IDs for CTI USB Serial Devices
+    - LP: #770050
+  * USB: ftdi_sio: add PID for OCT DK201 docking station
+    - LP: #770050
+  * USB: ftdi_sio: add ids for Hameg HO720 and HO730
+    - LP: #770050
+  * USB: option: Add new ONDA vendor id and product id for ONDA MT825UP
+    - LP: #770050
+  * USB: option: Added support for Samsung GT-B3730/GT-B3710 LTE USB modem.
+    - LP: #770050
+  * next_pidmap: fix overflow condition
+    - LP: #770050
+  * proc: do proper range check on readdir offset
+    - LP: #770050
+  * USB: EHCI: unlink unused QHs when the controller is stopped
+    - LP: #770050
+  * USB: fix formatting of SuperSpeed endpoints in /proc/bus/usb/devices
+    - LP: #770050
+  * USB: xhci - fix unsafe macro definitions
+    - LP: #770050
+  * USB: xhci - fix math in xhci_get_endpoint_interval()
+    - LP: #770050
+  * x86, cpu: Fix regression in AMD errata checking code
+    - LP: #770050
+  * Linux 2.6.32.39
+    - LP: #770050
+  * fs/partitions/ldm.c: fix oops caused by corrupted partition table,
+    CVE-2011-1017
+    - LP: #771382
+    - CVE-2011-1017
+  * drm/i915: set DIDL using the ACPI video output device _ADR method
+    return.
+    - LP: #775547
+  * drm/radeon/kms: MC vram map needs to be >= pci aperture size
+    - LP: #775547
+  * drm/radeon/kms: make sure blit addr masks are 64 bit
+    - LP: #775547
+  * drm/radeon/kms: fix handling of tex lookup disable in cs checker on
+    r2xx
+    - LP: #775547
+  * drm/i915: Free hardware status page on unload when physically mapped
+    - LP: #775547
+  * drm/i915/overlay: Ensure that the reg_bo is in the GTT prior to
+    writing.
+    - LP: #775547
+  * drm/radeon/kms/atom: set sane defaults in atombios_get_encoder_mode()
+    - LP: #775547
+  * drm/radeon/kms: fix typos in disabled vbios code
+    - LP: #775547
+  * drm/radeon/kms: add workaround for dce3 ddc line vbios bug
+    - LP: #775547
+  * drm/radeon/kms: fix interlaced and doublescan handling
+    - LP: #775547
+  * drm/i915/sdvo: Always add a 30ms delay to make SDVO TV detection
+    reliable
+    - LP: #775547
+  * drm/radeon/kms: don't apply 7xx HDP flush workaround on AGP
+    - LP: #775547
+  * drm/ttm: Fix two race conditions + fix busy codepaths
+    - LP: #775547
+  * drm/i915: overlay on gen2 can't address above 1G
+    - LP: #775547
+  * drm/i915: fix memory corruption with GM965 and >4GB RAM
+    - LP: #775547
+  * drm/radeon: add quirk to make HP nx6125 laptop resume.
+    - LP: #775547
+  * drm/radeon/kms: add quirk to make HP DV5000 laptop resume
+    - LP: #775547
+  * ath: add missing regdomain pair 0x5c mapping
+    - LP: #780588
+  * block, blk-sysfs: Fix an err return path in blk_register_queue()
+    - LP: #780588
+  * p54: Initialize extra_len in p54_tx_80211
+    - LP: #780588
+  * intel-iommu: Unlink domain from iommu
+    - LP: #780588
+  * intel-iommu: Fix get_domain_for_dev() error path
+    - LP: #780588
+  * NFS: nfs_wcc_update_inode() should set nfsi->attr_gencount
+    - LP: #780588
+  * serial/imx: read cts state only after acking cts change irq
+    - LP: #780588
+  * ASoC: Fix output PGA enabling in wm_hubs CODECs
+    - LP: #780588
+  * kconfig: Avoid buffer underrun in choice input
+    - LP: #780588
+  * UBIFS: fix master node recovery
+    - LP: #780588
+  * Remove extra struct page member from the buffer info structure
+    - LP: #780588
+  * dasd: correct device table
+    - LP: #780588
+  * iwlagn: Support new 5000 microcode.
+    - LP: #780588
+  * atl1c: duplicate atl1c_get_tpd
+    - LP: #780588
+  * udp: Fix bogus UFO packet generation
+    - LP: #780588
+  * slub: fix panic with DISCONTIGMEM
+    - LP: #780588
+  * set memory ranges in N_NORMAL_MEMORY when onlined
+    - LP: #780588
+  * FLEXCOP-PCI: fix __xlate_proc_name-warning for flexcop-pci
+    - LP: #780588
+  * m68k/mm: Set all online nodes in N_NORMAL_MEMORY
+    - LP: #780588
+  * nfs: don't lose MS_SYNCHRONOUS on remount of noac mount
+    - LP: #780588
+  * NFSv4.1: Ensure state manager thread dies on last umount
+    - LP: #780588
+  * agp: fix arbitrary kernel memory writes
+    - LP: #780588
+  * agp: fix OOM and buffer overflow
+    - LP: #780588
+  * Input: xen-kbdfront - fix mouse getting stuck after save/restore
+    - LP: #780588
+  * pmcraid: reject negative request size
+    - LP: #780588
+  * mpt2sas: prevent heap overflows and unchecked reads
+    - LP: #780588
+  * put stricter guards on queue dead checks
+    - LP: #780588
+  * mmc: sdhci-pci: Fix error case in sdhci_pci_probe_slot()
+    - LP: #780588
+  * mmc: sdhci: Check mrq->cmd in sdhci_tasklet_finish
+    - LP: #780588
+  * mmc: sdhci: Check mrq != NULL in sdhci_tasklet_finish
+    - LP: #780588
+  * USB: fix regression in usbip by setting has_tt flag
+    - LP: #780588
+  * af_unix: Only allow recv on connected seqpacket sockets.
+    - LP: #780588
+  * ARM: 6891/1: prevent heap corruption in OABI semtimedop
+    - LP: #780588
+  * i8k: Tell gcc that *regs gets clobbered
+    - LP: #780588
+  * Fix gcc 4.5.1 miscompiling drivers/char/i8k.c (again)
+    - LP: #780588
+  * Open with O_CREAT flag set fails to open existing files on non writable
+    directories
+    - LP: #780588
+  * can: Add missing socket check in can/bcm release.
+    - LP: #780588
+  * netxen: module firmware hints
+    - LP: #780588
+  * bnx2x: declare MODULE_FIRMWARE
+    - LP: #780588
+  * cxgb3: declare MODULE_FIRMWARE
+    - LP: #780588
+  * myri10ge: declare MODULE_FIRMWARE
+    - LP: #780588
+  * netx: declare MODULE_FIRMWARE
+    - LP: #780588
+  * pcnet-cs: declare MODULE_FIRMWARE
+    - LP: #780588
+  * spider-net: declare MODULE_FIRMWARE
+    - LP: #780588
+  * tms380tr: declare MODULE_FIRMWARE
+    - LP: #780588
+  * Input: Add support of Synaptics Clickpad device
+    - LP: #780588
+  * Input: elantech - do not advertise relative events
+    - LP: #780588
+  * Input: elantech - fix firmware version check
+    - LP: #780588
+  * Input: elantech - allow forcing Elantech protocol
+    - LP: #780588
+  * Input: elantech - ignore high bits in the position coordinates
+    - LP: #780588
+  * Input: elantech - use all 3 bytes when checking version
+    - LP: #780588
+  * Input: elantech - relax signature checks
+    - LP: #780588
+  * Input: elantech - discard the first 2 positions on some firmwares
+    - LP: #780588
+  * Staging: rtl8192su: check for skb == NULL
+    - LP: #780588
+  * Staging: rtl8192su: Clean up in case of an error in module
+    initialisation
+    - LP: #780588
+  * Staging: rtl8192su: Fix procfs code for interfaces not named wlan0
+    - LP: #780588
+  * Staging: rtl8192su: remove device ids
+    - LP: #780588
+  * Staging: rtl8192su: add device ids
+    - LP: #780588
+  * USB: retain USB device power/wakeup setting across reconfiguration
+    - LP: #780588
+  * USB: don't enable remote wakeup by default
+    - LP: #780588
+  * USB: teach "devices" file about Wireless and SuperSpeed USB
+    - LP: #780588
+  * GFS2: Clean up gfs2_adjust_quota() and do_glock()
+    - LP: #780588
+  * GFS2: Fix writing to non-page aligned gfs2_quota structures
+    - LP: #780588
+  * GFS2: BUG in gfs2_adjust_quota
+    - LP: #780588
+  * SUNRPC: fix NFS client over TCP hangs due to packet loss (Bug 16494)
+    - LP: #780588
+  * nfs4: Ensure that ACL pages sent over NFS were not allocated from the
+    slab (v3)
+    - LP: #780588
+  * nfs: fix compilation warning
+    - LP: #780588
+  * Fix corrupted OSF partition table parsing
+    - LP: #780588
+  * Increase OSF partition limit from 8 to 18
+    - LP: #780588
+  * Please add support for Microsoft MN-120 PCMCIA network card
+    - LP: #780588
+  * hwmon: (applesmc) Add iMac9,1 and MacBookPro2,2 support
+    - LP: #780588
+  * hwmon: (applesmc) Add support for MacBook Pro 5,3 and 5,4
+    - LP: #780588
+  * hwmon: (applesmc) Add generic support for MacBook Pro 6
+    - LP: #780588
+  * hwmon: (applesmc) Add generic support for MacBook Pro 7
+    - LP: #780588
+  * hwmon: (applesmc) Add MacBookAir3,1(3,2) support
+    - LP: #780588
+  * ALSA: emux: Add trivial compat ioctl handler
+    - LP: #780588
+  * ALSA: powermac - Reverse HP detection on G4 DA
+    - LP: #780588
+  * ALSA: powermac - Lineout detection on G4 DA
+    - LP: #780588
+  * ALSA: hda - Add support for the new 27 inch IMacs
+    - LP: #780588
+  * ALSA: hda - MacBookPro 5,3 line-in support
+    - LP: #780588
+  * ALSA: hda - Add model=mbp55 entry for MacBookPro 7,1
+    - LP: #780588
+  * ALSA: hda - MacBookAir3,1(3,2) alsa support
+    - LP: #780588
+  * virtio_net: fix oom handling on tx
+    - LP: #780588
+  * mac80211: Add define for TX headroom reserved by mac80211 itself.
+    - LP: #780588
+  * rt2x00: Centralize setting of extra TX headroom requested by rt2x00.
+    - LP: #780588
+  * rt2x00: Properly request tx headroom for alignment operations.
+    - LP: #780588
+  * rt2x00: use correct headroom for transmission
+    - LP: #780588
+  * Bluetooth: Add support Bluetooth controller of MacbookPro 6,2
+    - LP: #780588
+  * Bluetooth: Add support Bluetooth controller of MacbookPro 7,1
+    - LP: #780588
+  * Bluetooth: Add MacBookAir3,1(2) support
+    - LP: #780588
+  * perf tools: Display better error messages on missing packages
+    - LP: #780588
+  * perf tools: Add 'make DEBUG=1' to remove the -O6 cflag
+    - LP: #780588
+  * perf tools: Test -fstack-protector-all compiler option for inclusion in
+    CFLAGS
+    - LP: #780588
+  * perf tools: Support static build
+    - LP: #780588
+  * perf tools: Add V=2 option to help debug config issues
+    - LP: #780588
+  * perf tools: Suggest static libraries as well
+    - LP: #780588
+  * perf: Use default compiler mode by default
+    - LP: #780588
+  * perf tools: Move QUIET_STDERR def to before first use
+    - LP: #780588
+  * perf tools: Check if /dev/null can be used as the -o gcc argument
+    - LP: #780588
+  * perf symbols: allow forcing use of cplus_demangle
+    - LP: #780588
+  * V4L/DVB: Add Elgato EyeTV Diversity to dibcom driver
+    - LP: #780588
+  * mmc: fix all hangs related to mmc/sd card insert/removal during
+    suspend/resume
+    - LP: #780588
+  * mmc: build fix: mmc_pm_notify is only available with CONFIG_PM=y
+    - LP: #780588
+  * b43: Fix warning at drivers/mmc/core/core.c:237 in mmc_wait_for_cmd
+    - LP: #780588
+  * econet: Fix redeclaration of symbol len
+    - LP: #780588
+  * econet: fix CVE-2010-3848
+    - LP: #780588
+  * dell-laptop: Add another Dell laptop to the DMI whitelist
+    - LP: #780588
+  * dell-laptop: Add another Dell laptop family to the DMI whitelist
+    - LP: #780588
+  * scsi_dh_emc: fix mode select request setup
+    - LP: #780588
+  * scsi_dh_emc: request flag cleanup
+    - LP: #780588
+  * cifs: fix another memleak, in cifs_root_iget
+    - LP: #780588
+  * e1000e: Reset 82577/82578 PHY before first PHY register read
+    - LP: #780588
+  * e1000: fix Tx hangs by disabling 64-bit DMA
+    - LP: #780588
+  * btrfs: Require CAP_SYS_ADMIN for filesystem rebalance
+    - LP: #780588
+  * af_unix: limit recursion level
+    - LP: #780588
+  * init, sched: Fix race between init and kthreadd
+    - LP: #780588
+  * backlight: MacBookAir3,1(3,2) mbp-nvidia-bl support
+    - LP: #780588
+  * bonding: Ensure that we unshare skbs prior to calling pskb_may_pull
+    - LP: #780588
+  * HID: add MacBookAir 3,1 and 3,2 support
+    - LP: #780588
+  * intel-iommu: Force-disable IOMMU for iGFX on broken Cantiga revisions.
+    - LP: #780588
+  * ipg: Remove device claimed by dl2k from pci id table
+    - LP: #780588
+  * ipv6: Silence privacy extensions initialization
+    - LP: #780588
+  * l2tp: Fix UDP socket reference count bugs in the pppol2tp driver
+    - LP: #780588
+  * MIPS: DMA: Fix computation of DMA flags from device's
+    coherent_dma_mask.
+    - LP: #780588
+  * mpt2sas: fix the incorrect scsi_dma_map error checking
+    - LP: #780588
+  * Phonet: device notifier only runs on initial namespace
+    - LP: #780588
+  * powerpc/boot/dts: Install dts from the right directory
+    - LP: #780588
+  * rt2500usb: fallback to SW encryption for TKIP+AES
+    - LP: #780588
+  * sata_via: Delay on vt6420 when starting ATAPI DMA write
+    - LP: #780588
+  * tehuti: Firmware filename is tehuti/bdx.bin
+    - LP: #780588
+  * wireless: b43: fix error path in SDIO
+    - LP: #780588
+  * libata: set queue DMA alignment to sector size for ATAPI too
+    - LP: #780588
+  * usb: musb: core: set has_tt flag
+    - LP: #780588
+  * iwlwifi: fix skb usage after free
+    - LP: #780588
+  * can: add missing socket check in can/raw release
+    - LP: #780588
+  * fix oops in scsi_run_queue()
+    - LP: #780588
+  * Linux 2.6.32.40
+    - LP: #780588
+  * PCI: allow matching of prefetchable resources to non-prefetchable
+    windows
+    - LP: #424142
+  * cifs: check for bytes_remaining going to zero in CIFS_SessSetup
+    - LP: #788602
+  * Validate size of EFI GUID partition entries.
+    - LP: #788602
+  * dccp: handle invalid feature options length
+    - LP: #788602
+  * CIFS: Fix memory over bound bug in cifs_parse_mount_options
+    - LP: #788602
+  * Fix time() inconsistencies caused by intermediate xtime_cache values
+    being read
+    - LP: #788602
+  * ehea: fix wrongly reported speed and port
+    - LP: #788602
+  * NET: slip, fix ldisc->open retval
+    - LP: #788602
+  * ne-h8300: Fix regression caused during net_device_ops conversion
+    - LP: #788602
+  * hydra: Fix regression caused during net_device_ops conversion
+    - LP: #788602
+  * libertas: fix cmdpendingq locking
+    - LP: #788602
+  * zorro8390: Fix regression caused during net_device_ops conversion
+    - LP: #788602
+  * cifs: add fallback in is_path_accessible for old servers
+    - LP: #788602
+  * x86, AMD: Fix ARAT feature setting again
+    - LP: #788602
+  * clocksource: Install completely before selecting
+    - LP: #788602
+  * tick: Clear broadcast active bit when switching to oneshot
+    - LP: #788602
+  * x86, apic: Fix spurious error interrupts triggering on all non-boot APs
+    - LP: #788602
+  * x86, mce, AMD: Fix leaving freed data in a list
+    - LP: #788602
+  * megaraid_sas: Sanity check user supplied length before passing it to
+    dma_alloc_coherent()
+    - LP: #788602
+  * vmxnet3: Fix inconsistent LRO state after initialization
+    - LP: #788602
+  * netxen: Remove references to unified firmware file
+    - LP: #788602
+  * Linux 2.6.32.41
+    - LP: #788602
+  * drm/radeon/kms: fix bad shift in atom iio table parser
+    - LP: #788602
+  * Linux 2.6.32.41+drm33.18
+    - LP: #788602
+
+  [ Ubuntu: 2.6.32-32.62 ]
+
+  * Release Tracking Bug
+    - LP: #767370
+  * (config) Disable CONFIG_NET_NS
+    - LP: #720095
+  * Revert "drm/radeon/kms: Fix retrying ttm_bo_init() after it failed
+    once."
+    - LP: #736234
+  * Revert "drm/radeon: fall back to GTT if bo creation/validation in VRAM
+    fails."
+    - LP: #736234
+  * x86: pvclock: Move scale_delta into common header
+  * KVM: x86: Fix a possible backwards warp of kvmclock
+  * KVM: x86: Fix kvmclock bug
+  * cpuset: add a missing unlock in cpuset_write_resmask()
+    - LP: #736234
+  * keyboard: integer underflow bug
+    - LP: #736234
+  * RxRPC: Fix v1 keys
+    - LP: #736234
+  * ixgbe: fix for 82599 erratum on Header Splitting
+    - LP: #736234
+  * mm: fix possible cause of a page_mapped BUG
+    - LP: #736234
+  * powerpc/kdump: CPUs assume the context of the oopsing CPU
+    - LP: #736234
+  * powerpc/kdump: Use chip->shutdown to disable IRQs
+    - LP: #736234
+  * powerpc: Use more accurate limit for first segment memory allocations
+    - LP: #736234
+  * powerpc/pseries: Add hcall to read 4 ptes at a time in real mode
+    - LP: #736234
+  * powerpc/kexec: Speedup kexec hash PTE tear down
+    - LP: #736234
+  * powerpc/crashdump: Do not fail on NULL pointer dereferencing
+    - LP: #736234
+  * powerpc/kexec: Fix orphaned offline CPUs across kexec
+    - LP: #736234
+  * netfilter: nf_log: avoid oops in (un)bind with invalid nfproto values
+    - LP: #736234
+  * nfsd: wrong index used in inner loop
+    - LP: #736234
+  * r8169: use RxFIFO overflow workaround for 8168c chipset.
+    - LP: #736234
+  * Staging: comedi: jr3_pci: Don't ioremap too much space. Check result.
+    - LP: #736234
+  * net: don't allow CAP_NET_ADMIN to load non-netdev kernel modules,
+    CVE-2011-1019
+    - LP: #736234
+    - CVE-2011-1019
+  * ip6ip6: autoload ip6 tunnel
+    - LP: #736234
+  * Linux 2.6.32.33
+    - LP: #736234
+  * drm/radeon: fall back to GTT if bo creation/validation in VRAM fails.
+    - LP: #652934, #736234
+  * drm/radeon/kms: Fix retrying ttm_bo_init() after it failed once.
+    - LP: #652934, #736234
+  * drm: fix unsigned vs signed comparison issue in modeset ctl ioctl,
+    CVE-2011-1013
+    - LP: #736234
+    - CVE-2011-1013
+  * Linux 2.6.32.33+drm33.15
+    - LP: #736234
+  * econet: Fix crash in aun_incoming(). CVE-2010-4342
+    - LP: #736394
+    - CVE-2010-4342
+  * igb: only use vlan_gro_receive if vlans are registered, CVE-2010-4263
+    - LP: #737024
+    - CVE-2010-4263
+  * irda: prevent integer underflow in IRLMP_ENUMDEVICES, CVE-2010-4529
+    - LP: #737823
+    - CVE-2010-4529
+  * hwmon/f71882fg: Set platform drvdata to NULL later
+    - LP: #742056
+  * mtd: add "platform:" prefix for platform modalias
+    - LP: #742056
+  * libata: no special completion processing for EH commands
+    - LP: #742056
+  * MIPS: MTX-1: Make au1000_eth probe all PHY addresses
+    - LP: #742056
+  * x86/mm: Handle mm_fault_error() in kernel space
+    - LP: #742056
+  * ftrace: Fix memory leak with function graph and cpu hotplug
+    - LP: #742056
+  * x86: Fix panic when handling "mem={invalid}" param
+    - LP: #553464, #742056
+  * x86: Emit "mem=nopentium ignored" warning when not supported
+    - LP: #553464, #742056
+  * ahci: AHCI and RAID mode SATA patch for Intel Patsburg DeviceIDs
+    - LP: #742056
+  * ahci: AHCI mode SATA patch for Intel DH89xxCC DeviceIDs
+    - LP: #742056
+  * ahci: AHCI mode SATA patch for Intel Patsburg SATA RAID controller
+    - LP: #742056
+  * RDMA/cma: Fix crash in request handlers
+    - LP: #742056
+  * IB/cm: Bump reference count on cm_id before invoking callback
+    - LP: #742056
+  * ath9k_hw: Fix incorrect macversion and macrev checks
+    - LP: #742056
+  * USB: serial/kobil_sct, fix potential tty NULL dereference
+    - LP: #742056
+  * USB: serial: ch341: add new id
+    - LP: #742056
+  * xhci: Fix cycle bit calculation during stall handling.
+    - LP: #742056
+  * ALSA: hda - fix digital mic selection in mixer on 92HD8X codecs
+    - LP: #742056
+  * PCI: remove quirk for pre-production systems
+    - LP: #742056
+  * PCI: add more checking to ICH region quirks
+    - LP: #742056
+  * PCI: do not create quirk I/O regions below PCIBIOS_MIN_IO for ICH
+    - LP: #742056
+  * PCI: sysfs: Fix failure path for addition of "vpd" attribute
+    - LP: #742056
+  * ALSA: ctxfi - Fix incorrect SPDIF status bit mask
+    - LP: #742056
+  * ALSA: ctxfi - Fix SPDIF status retrieval
+    - LP: #742056
+  * ALSA: ctxfi - Clear input settings before initialization
+    - LP: #742056
+  * SUNRPC: Ensure we always run the tk_callback before tk_action
+    - LP: #742056
+  * perf, powerpc: Handle events that raise an exception without
+    overflowing
+    - LP: #742056
+  * ext3: Always set dx_node's fake_dirent explicitly.
+    - LP: #742056
+  * call_function_many: fix list delete vs add race
+    - LP: #742056
+  * call_function_many: add missing ordering
+    - LP: #742056
+  * x86: Flush TLB if PGD entry is changed in i386 PAE mode
+    - LP: #742056
+  * isdn: avoid calling tty_ldisc_flush() in atomic context
+    - LP: #742056
+  * smp_call_function_many: handle concurrent clearing of mask
+    - LP: #742056
+  * fix per-cpu flag problem in the cpu affinity checkers
+    - LP: #742056
+  * i2c: Fix typo in instantiating-devices document
+    - LP: #742056
+  * mmc: sdio: remember new card RCA when redetecting card
+    - LP: #742056
+  * powerpc/kexec: Fix race in kexec shutdown
+    - LP: #742056
+  * powerpc/kdump: Fix race in kdump shutdown
+    - LP: #742056
+  * powerpc: rtas_flash needs to use rtas_data_buf
+    - LP: #742056
+  * x86, binutils, xen: Fix another wrong size directive
+    - LP: #742056
+  * hwmon: (sht15) Fix integer overflow in humidity calculation
+    - LP: #742056
+  * Linux 2.6.32.34
+    - LP: #742056
+  * Linux 2.6.32.35
+    - LP: #742056
+  * aio: wake all waiters when destroying ctx
+    - LP: #744921
+  * shmem: let shared anonymous be nonlinear again
+    - LP: #744921
+  * PCI hotplug: acpiphp: set current_state to D0 in register_slot
+    - LP: #744921
+  * xen: set max_pfn_mapped to the last pfn mapped
+    - LP: #744921
+  * PCI: return correct value when writing to the "reset" attribute
+    - LP: #744921
+  * Prevent rt_sigqueueinfo and rt_tgsigqueueinfo from spoofing the signal
+    code
+    - LP: #744921
+  * ext3: skip orphan cleanup on rocompat fs
+    - LP: #744921
+  * procfs: fix /proc/<pid>/maps heap check
+    - LP: #744921
+  * proc: protect mm start_code/end_code in /proc/pid/stat, CVE-2011-0726
+    - LP: #744921
+    - CVE-2011-0726
+  * fbcon: Bugfix soft cursor detection in Tile Blitting
+    - LP: #744921
+  * nfsd41: modify the members value of nfsd4_op_flags
+    - LP: #744921
+  * nfsd: wrong index used in inner loop
+    - LP: #744921
+  * uvcvideo: Fix uvc_fixup_video_ctrl() format search
+    - LP: #744921
+  * ehci-hcd: Bug fix: don't set a QH's Halt bit
+    - LP: #744921
+  * USB: uss720 fixup refcount position
+    - LP: #744921
+  * USB: cdc-acm: fix memory corruption / panic
+    - LP: #744921
+  * USB: cdc-acm: fix potential null-pointer dereference
+    - LP: #744921
+  * USB: cdc-acm: fix potential null-pointer dereference on disconnect
+    - LP: #744921
+  * Input: xen-kbdfront - advertise either absolute or relative coordinates
+    - LP: #744921
+  * SUNRPC: Never reuse the socket port after an xs_close()
+    - LP: #744921
+  * fs: call security_d_instantiate in d_obtain_alias V2
+    - LP: #744921
+  * dcdbas: force SMI to happen when expected
+    - LP: #744921
+  * Linux 2.6.32.36
+    - LP: #744921
+  * drm/radeon/kms: check AA resolve registers on r300, CVE-2011-1016
+    - LP: #745686
+    - CVE-2011-1016
+  * drm/radeon: fix regression with AA resolve checking, CVE-2011-1016
+    - LP: #745686
+    - CVE-2011-1016
+  * xen: events: do not unmask event channels on resume
+    - LP: #681083
+  * drm/radeon/kms: check AA resolve registers on r300
+    - LP: #754584
+  * drm/radeon: fix regression with AA resolve checking
+    - LP: #754584
+  * Linux 2.6.32.36+drm33.16
+    - LP: #754584
+  * ALSA: hda - Fix SPDIF out regression on ALC889
+    - LP: #764685
+  * ALSA: Fix yet another race in disconnection
+    - LP: #764685
+  * perf: Better fit max unprivileged mlock pages for tools needs
+    - LP: #764685
+  * myri10ge: fix rmmod crash
+    - LP: #764685
+  * cciss: fix lost command issue
+    - LP: #764685
+  * sound/oss/opl3: validate voice and channel indexes
+    - LP: #764685
+  * mac80211: initialize sta->last_rx in sta_info_alloc
+    - LP: #764685
+  * ses: show devices for enclosures with no page 7
+    - LP: #764685
+  * ses: Avoid kernel panic when lun 0 is not mapped
+    - LP: #764685
+  * eCryptfs: Unlock page in write_begin error path
+    - LP: #764685
+  * eCryptfs: ecryptfs_keyring_auth_tok_for_sig() bug fix
+    - LP: #764685
+  * staging: usbip: bugfixes related to kthread conversion
+    - LP: #764685
+  * staging: usbip: bugfix add number of packets for isochronous frames
+    - LP: #764685
+  * staging: usbip: bugfix for isochronous packets and optimization
+    - LP: #764685
+  * staging: hv: Fix GARP not sent after Quick Migration
+    - LP: #764685
+  * staging: hv: use sync_bitops when interacting with the hypervisor
+    - LP: #764685
+  * Relax si_code check in rt_sigqueueinfo and rt_tgsigqueueinfo
+    - LP: #764685
+  * xfs: prevent leaking uninitialized stack memory in FSGEOMETRY_V1
+    - LP: #764685
+  * irda: validate peer name and attribute lengths
+    - LP: #764685
+  * irda: prevent heap corruption on invalid nickname
+    - LP: #764685
+  * nilfs2: fix data loss in mmap page write for hole blocks
+    - LP: #764685
+  * ASoC: Explicitly say registerless widgets have no register
+    - LP: #764685
+  * ALSA: ens1371: fix Creative Ectiva support
+    - LP: #764685
+  * ROSE: prevent heap corruption with bad facilities
+    - LP: #764685
+  * Btrfs: Fix uninitialized root flags for subvolumes
+    - LP: #764685
+  * x86, mtrr, pat: Fix one cpu getting out of sync during resume
+    - LP: #764685
+  * ath9k: fix a chip wakeup related crash in ath9k_start
+    - LP: #764685
+  * UBIFS: do not read flash unnecessarily
+    - LP: #764685
+  * UBIFS: fix oops on error path in read_pnode
+    - LP: #764685
+  * UBIFS: fix debugging failure in dbg_check_space_info
+    - LP: #764685
+  * quota: Don't write quota info in dquot_commit()
+    - LP: #764685
+  * mm: avoid wrapping vm_pgoff in mremap()
+    - LP: #764685
+  * p54usb: IDs for two new devices
+    - LP: #764685
+  * b43: allocate receive buffers big enough for max frame len + offset
+    - LP: #764685
+  * Bluetooth: sco: fix information leak to userspace
+    - LP: #764685
+  * bridge: netfilter: fix information leak
+    - LP: #764685
+  * Bluetooth: bnep: fix buffer overflow
+    - LP: #764685
+  * Bluetooth: add support for Apple MacBook Pro 8,2
+    - LP: #764685
+  * Treat writes as new when holes span across page boundaries
+    - LP: #764685
+  * char/tpm: Fix unitialized usage of data buffer
+    - LP: #764685
+  * netfilter: ip_tables: fix infoleak to userspace
+    - LP: #764685
+  * netfilter: arp_tables: fix infoleak to userspace
+    - LP: #764685
+  * netfilter: ipt_CLUSTERIP: fix buffer overflow
+    - LP: #764685
+  * ipv6: netfilter: ip6_tables: fix infoleak to userspace
+    - LP: #764685
+  * mfd: ab3100: world-writable debugfs *_priv files
+    - LP: #764685
+  * drivers/rtc/rtc-ds1511.c: world-writable sysfs nvram file
+    - LP: #764685
+  * drivers/misc/ep93xx_pwm.c: world-writable sysfs files
+    - LP: #764685
+  * econet: 4 byte infoleak to the network
+    - LP: #764685
+  * sound/oss: remove offset from load_patch callbacks
+    - LP: #764685
+  * sound: oss: midi_synth: check get_user() return value
+    - LP: #764685
+  * repair gdbstub to match the gdbserial protocol specification
+    - LP: #764685
+  * gro: Reset dev pointer on reuse
+    - LP: #764685
+  * gro: reset skb_iif on reuse
+    - LP: #764685
+  * x86, amd-ucode: Remove needless log messages
+    - LP: #764685
+  * x86, microcode, AMD: Extend ucode size verification
+    - LP: #764685
+  * powerpc/kexec: Add ifdef CONFIG_PPC_STD_MMU_64 to PPC64 code
+    - LP: #764685
+  * powerpc: Fix default_machine_crash_shutdown #ifdef botch
+    - LP: #764685
+  * Squashfs: handle corruption of directory structure
+    - LP: #764685
+  * sctp: fix to calc the INIT/INIT-ACK chunk length correctly is set
+    - LP: #764685
+  * atm/solos-pci: Don't include frame pseudo-header on transmit hex-dump
+    - LP: #764685
+  * ext4: fix credits computing for indirect mapped files
+    - LP: #764685
+  * nfsd: fix auth_domain reference leak on nlm operations
+    - LP: #764685
+  * CAN: Use inode instead of kernel address for /proc file
+    - LP: #764685
+  * exec: make argv/envp memory visible to oom-killer
+    - LP: #764685
+  * exec: copy-and-paste the fixes into compat_do_execve() paths
+    - LP: #764685
+  * xfs: zero proper structure size for geometry calls
+    - LP: #764685
+  * Linux 2.6.32.37
+    - LP: #764685
+  * Linux 2.6.32.38
+    - LP: #764685
+
+  [ Ubuntu: 2.6.32-31.61 ]
+
+  * Release Tracking Bug
+    - LP: #754842
+  * x86, quirk: Fix SB600 revision check
+    - LP: #742056
+
+ -- Herton Ronaldo Krzesinski <herton.krzesinski@canonical.com>  Wed, 08 Jun 2011 15:37:30 -0300
+
+linux-mvl-dove (2.6.32-216.33) lucid-proposed; urgency=low
+
+
+  [ Ubuntu: 2.6.32-31.60 ]
+
+  * Release Tracking Bug
+    - LP: #734950
+  * SAUCE: Clear new_profile in error path
+    - LP: #732700
+  * [Config] CONFIG_BOOT_PRINTK_DELAY=y
+    - LP: #733191
+  * Revert "drm/radeon/bo: add some fallback placements for VRAM only
+    objects."
+    - LP: #652934
+  * drm/radeon: fall back to GTT if bo creation/validation in VRAM fails.
+    - LP: #652934
+  * drm/radeon/kms: Fix retrying ttm_bo_init() after it failed once.
+    - LP: #652934
+  * xfs: always use iget in bulkstat
+    - LP: #692848
+  * drm/radeon/kms: make the mac rv630 quirk generic
+    - LP: #728687
+  * drm/radeon/kms: add pll debugging output
+    - LP: #728687
+  * drm/radeon: remove 0x4243 pci id
+    - LP: #728687
+  * drm/radeon/kms: fix s/r issues with bios scratch regs
+    - LP: #728687
+  * drm/i915/lvds: Add AOpen i915GMm-HFS to the list of false-positive LVDS
+    - LP: #728687
+  * drm/i915: Add dependency on CONFIG_TMPFS
+    - LP: #728687
+  * Linux 2.6.32.29+drm33.14
+    - LP: #728687
+  * NFSD: memory corruption due to writing beyond the stat array
+    - LP: #728687
+  * mptfusion: mptctl_release is required in mptctl.c
+    - LP: #728687
+  * mptfusion: Fix Incorrect return value in mptscsih_dev_reset
+    - LP: #728687
+  * ocfs2_connection_find() returns pointer to bad structure
+    - LP: #728687
+  * x25: decrement netdev reference counts on unload
+    - LP: #728687
+  * x86, hpet: Disable per-cpu hpet timer if ARAT is supported
+    - LP: #728687
+  * OHCI: work around for nVidia shutdown problem
+    - LP: #728687
+  * x86/pvclock: Zero last_value on resume
+    - LP: #728687
+  * av7110: check for negative array offset
+    - LP: #728687
+  * CRED: Fix get_task_cred() and task_state() to not resurrect dead
+    credentials
+    - LP: #728687
+  * bonding/vlan: Avoid mangled NAs on slaves without VLAN tag insertion
+    - LP: #728687
+  * CRED: Fix kernel panic upon security_file_alloc() failure.
+    - LP: #728687
+  * CRED: Fix BUG() upon security_cred_alloc_blank() failure
+    - LP: #728687
+  * CRED: Fix memory and refcount leaks upon security_prepare_creds()
+    failure
+    - LP: #728687
+  * sendfile(): check f_op.splice_write() rather than f_op.sendpage()
+    - LP: #728687
+  * isdn: hisax: Replace the bogus access to irq stats
+    - LP: #728687
+  * ixgbe: add support for 82599 based Express Module X520-P2
+    - LP: #728687
+  * ixgbe: prevent speculative processing of descriptors before ready
+    - LP: #728687
+  * scsi_dh_alua: add netapp to dev list
+    - LP: #728687
+  * scsi_dh_alua: Add IBM Power Virtual SCSI ALUA device to dev list
+    - LP: #728687
+  * dm raid1: fail writes if errors are not handled and log fails
+    - LP: #728687
+  * GFS2: Fix bmap allocation corner-case bug
+    - LP: #728687
+  * dm raid1: fix null pointer dereference in suspend
+    - LP: #728687
+  * sunrpc/cache: fix module refcnt leak in a failure path
+    - LP: #728687
+  * be2net: Maintain tx and rx counters in driver
+    - LP: #728687
+  * tcp: Make TCP_MAXSEG minimum more correct.
+    - LP: #728687
+  * nfsd: correctly handle return value from nfsd_map_name_to_*
+    - LP: #728687
+  * s390: remove task_show_regs
+    - LP: #728687
+  * PM / Hibernate: Return error code when alloc_image_page() fails
+    - LP: #728687
+  * fs/partitions: Validate map_count in Mac partition tables
+    - LP: #728687
+  * ALSA: HDA: Add position_fix quirk for an Asus device
+    - LP: #718402, #728687
+  * ALSA: caiaq - Fix possible string-buffer overflow
+    - LP: #728687
+  * radio-aimslab.c needs #include <linux/delay.h>
+    - LP: #728687
+  * ARM: Ensure predictable endian state on signal handler entry
+    - LP: #728687
+  * acer-wmi: Fix capitalisation of GUID
+    - LP: #728687
+  * eCryptfs: Copy up lower inode attrs in getattr
+    - LP: #728687
+  * platform: x86: acer-wmi: world-writable sysfs threeg file
+    - LP: #728687
+  * platform: x86: asus_acpi: world-writable procfs files
+    - LP: #728687
+  * platform: x86: tc1100-wmi: world-writable sysfs wireless and jogdial
+    files
+    - LP: #728687
+  * genirq: Disable the SHIRQ_DEBUG call in request_threaded_irq for now
+    - LP: #728687
+  * usb: musb: omap2430: fix kernel panic on reboot
+    - LP: #728687
+  * USB: add quirks entry for Keytouch QWERTY Panel
+    - LP: #728687
+  * USB: Add Samsung SGH-I500/Android modem ID switch to visor driver
+    - LP: #728687
+  * USB: Add quirk for Samsung Android phone modem
+    - LP: #728687
+  * p54pci: update receive dma buffers before and after processing
+    - LP: #728687
+  * sierra: add new ID for Airprime/Sierra USB IP modem
+    - LP: #728687
+  * staging: usbip: vhci: update reference count for usb_device
+    - LP: #728687
+  * staging: usbip: vhci: give back URBs from in-flight unlink requests
+    - LP: #728687
+  * staging: usbip: vhci: refuse to enqueue for dead connections
+    - LP: #728687
+  * staging: usbip: vhci: use urb->dev->portnum to find port
+    - LP: #728687
+  * epoll: prevent creating circular epoll structures
+    - LP: #728687
+  * ldm: corrupted partition table can cause kernel oops
+    - LP: #728687
+  * md: correctly handle probe of an 'mdp' device.
+    - LP: #728687
+  * x86 quirk: Fix polarity for IRQ0 pin2 override on SB800 systems
+    - LP: #728687
+  * xhci: Avoid BUG() in interrupt context
+    - LP: #728687
+  * xhci: Clarify some expressions in the TRB math
+    - LP: #728687
+  * xhci: Fix errors in the running total calculations in the TRB math
+    - LP: #728687
+  * xhci: Fix an error in count_sg_trbs_needed()
+    - LP: #728687
+  * x25: Do not reference freed memory.
+    - LP: #728687
+  * Linux 2.6.32.30
+    - LP: #728687
+  * Linux 2.6.32.31
+    - LP: #728687
+  * Ocfs2/refcounttree: Fix a bug for refcounttree to writeback clusters in
+    a right number.
+    - LP: #731226
+  * mfd: Fix NULL pointer due to non-initialized ucb1x00-ts absinfo
+    - LP: #731226
+  * x86: Use u32 instead of long to set reset vector back to 0
+    - LP: #731226
+  * fuse: fix hang of single threaded fuseblk filesystem
+    - LP: #731226
+  * clockevents: Prevent oneshot mode when broadcast device is periodic
+    - LP: #731226
+  * ext2: Fix link count corruption under heavy link+rename load
+    - LP: #731226
+  * sctp: Fix oops when sending queued ASCONF chunks
+    - LP: #731226
+  * virtio: set pci bus master enable bit
+    - LP: #731226
+  * netxen: fix set mac addr
+    - LP: #731226
+  * HID: add support for Acan FG-8100 barcode reader
+    - LP: #731226
+  * p54usb: add Senao NUB-350 usbid
+    - LP: #731226
+  * dccp: fix oops on Reset after close
+    - LP: #731226
+  * e1000e: disable broken PHY wakeup for ICH10 LOMs, use MAC wakeup
+    instead
+    - LP: #731226
+  * r8169: disable ASPM
+    - LP: #731226
+  * usb: iowarrior: don't trust report_size for buffer size
+    - LP: #731226
+  * arp_notify: unconditionally send gratuitous ARP for
+    NETDEV_NOTIFY_PEERS.
+    - LP: #731226
+  * CIFS: Fix oplock break handling (try #2)
+    - LP: #731226
+  * Linux 2.6.32.32
+    - LP: #731226
+
+  [ Ubuntu: 2.6.32-30.59 ]
+
+  * Release Tracking Bug
+    - LP: #727336
+  * [Config] CONFIG_IRQ_TIME_ACCOUNTING=n
+    - LP: #723819
+  * virtio_net: Add schedule check to napi_enable call
+    - LP: #579276
+  * NFS: fix the return value of nfs_file_fsync()
+    - LP: #585657
+  * block: check for proper length of iov entries earlier in
+    blk_rq_map_user_iov(), CVE-2010-4163
+    - LP: #721504
+    - CVE-2010-4163
+  * filter: make sure filters dont read uninitialized memory
+    - LP: #721282
+    - CVE-2010-4158
+  * tty: Make tiocgicount a handler, CVE-2010-4076, CVE-2010-4077
+    - LP: #720189
+    - CVE-2010-4077
+  * staging: usbip: remove double giveback of URB
+    - LP: #723819
+  * USB: EHCI: ASPM quirk of ISOC on AMD SB800
+    - LP: #723819
+  * rt2x00: add device id for windy31 usb device
+    - LP: #723819
+  * ALSA: snd-usb-us122l: Fix missing NULL checks
+    - LP: #723819
+  * hwmon: (via686a) Initialize fan_div values
+    - LP: #723819
+  * USB: serial: handle Data Carrier Detect changes
+    - LP: #723819
+  * USB: CP210x Add two device IDs
+    - LP: #723819
+  * USB: CP210x Removed incorrect device ID
+    - LP: #723819
+  * USB: usb-storage: unusual_devs update for Cypress ATACB
+    - LP: #723819
+  * USB: usb-storage: unusual_devs update for TrekStor DataStation maxi g.u
+    external hard drive enclosure
+    - LP: #723819
+  * USB: usb-storage: unusual_devs entry for CamSport Evo
+    - LP: #723819
+  * USB: usb-storage: unusual_devs entry for Coby MP3 player
+    - LP: #723819
+  * USB: serial: Updated support for ICOM devices
+    - LP: #723819
+  * USB: adding USB support for Cinterion's HC2x, EU3 and PH8 products
+    - LP: #723819
+  * USB: EHCI: ASPM quirk of ISOC on AMD Hudson
+    - LP: #723819
+  * USB: EHCI: fix DMA deallocation bug
+    - LP: #723819
+  * USB: g_printer: fix bug in module parameter definitions
+    - LP: #723819
+  * USB: io_edgeport: fix the reported firmware major and minor
+    - LP: #723819
+  * USB: ti_usb: fix module removal
+    - LP: #723819
+  * USB: Storage: Add unusual_devs entry for VTech Kidizoom
+    - LP: #723819
+  * USB: ftdi_sio: add ST Micro Connect Lite uart support
+    - LP: #723819
+  * USB: cdc-acm: Adding second ACM channel support for Nokia N8
+    - LP: #723819
+  * USB: ftdi_sio: Add VID=0x0647, PID=0x0100 for Acton Research
+    spectrograph
+    - LP: #723819
+  * USB: prevent buggy hubs from crashing the USB stack
+    - LP: #723819
+  * staging: comedi: add support for newer jr3 1-channel pci board
+    - LP: #723819
+  * staging: comedi: ni_labpc: Use shared IRQ for PCMCIA card
+    - LP: #723819
+  * Staging: hv: fix sysfs symlink on hv block device
+    - LP: #723819
+  * staging: hv: Enable sending GARP packet after live migration
+    - LP: #723819
+  * hvc_iucv: allocate memory buffers for IUCV in zone DMA
+    - LP: #723819
+  * iwlagn: enable only rfkill interrupt when device is down
+    - LP: #723819
+  * ath9k: Fix bug in delimiter padding computation
+    - LP: #723819
+  * correct vdso version string
+    - LP: #723819
+  * fix medium error problems with some arrays which can cause data
+    corruption
+    - LP: #723819
+  * libsas: fix runaway error handler problem
+    - LP: #723819
+  * mpt2sas: Fix device removal handshake for zoned devices
+    - LP: #723819
+  * mpt2sas: Correct resizing calculation for max_queue_depth
+    - LP: #723819
+  * mpt2sas: Kernel Panic during Large Topology discovery
+    - LP: #723819
+  * radio-aimslab.c: Fix gcc 4.5+ bug
+    - LP: #723819
+  * em28xx: Fix audio input for Terratec Grabby
+    - LP: #723819
+  * ALSA : au88x0 - Limit number of channels to fix Oops via OSS emu
+    - LP: #723819
+  * ALSA: HDA: Fix dmesg output of HDMI supported bits
+    - LP: #723819
+  * ALSA: hda - Fix memory leaks in conexant jack arrays
+    - LP: #723819
+  * input: bcm5974: Add support for MacBookAir3
+    - LP: #723819
+  * ALSA: hrtimer: handle delayed timer interrupts
+    - LP: #723819
+  * ASoC: WM8990: msleep() takes milliseconds not jiffies
+    - LP: #723819
+  * ASoC: Blackfin AC97: fix build error after multi-component update
+    - LP: #723819
+  * NFS: Fix "kernel BUG at fs/aio.c:554!"
+    - LP: #723819
+  * rtc-cmos: fix suspend/resume
+    - LP: #723819
+  * iwlagn: Re-enable RF_KILL interrupt when down
+    - LP: #723819
+  * rapidio: fix hang on RapidIO doorbell queue full condition
+    - LP: #723819
+  * PCI: pci-stub: ignore zero-length id parameters
+    - LP: #723819
+  * virtio: remove virtio-pci root device
+    - LP: #723819
+  * ds2760_battery: Fix calculation of time_to_empty_now
+    - LP: #723819
+  * p54: fix sequence no. accounting off-by-one error
+    - LP: #723819
+  * i2c: Unregister dummy devices last on adapter removal
+    - LP: #723819
+  * serial: unbreak billionton CF card
+    - LP: #723819
+  * ptrace: use safer wake up on ptrace_detach()
+    - LP: #723819
+  * x86, mtrr: Avoid MTRR reprogramming on BP during boot on UP platforms
+    - LP: #723819
+  * fix jiffy calculations in calibrate_delay_direct to handle overflow
+    - LP: #723819
+  * USB: serial: pl2303: Hybrid reader Uniform HCR331
+    - LP: #723819
+  * drivers: update to pl2303 usb-serial to support Motorola cables
+    - LP: #723819
+  * klist: Fix object alignment on 64-bit.
+    - LP: #723819
+  * powerpc: Fix some 6xx/7xxx CPU setup functions
+    - LP: #723819
+  * parisc : Remove broken line wrapping handling pdc_iodc_print()
+    - LP: #723819
+  * kernel/smp.c: fix smp_call_function_many() SMP race
+    - LP: #723819
+  * hostap_cs: fix sleeping function called from invalid context
+    - LP: #723819
+  * md: fix regression with re-adding devices to arrays with no metadata
+    - LP: #723819
+  * pata_mpc52xx: inherit from ata_bmdma_port_ops
+    - LP: #723819
+  * TPM: Long default timeout fix
+    - LP: #723819
+  * tpm_tis: Use timeouts returned from TPM
+    - LP: #723819
+  * SELinux: define permissions for DCB netlink messages
+    - LP: #723819
+  * SELinux: do not compute transition labels on mountpoint labeled
+    filesystems
+    - LP: #723819
+  * ieee80211: correct IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK macro
+    - LP: #723819
+  * dm: dont take i_mutex to change device size
+    - LP: #723819
+  * dm mpath: disable blk_abort_queue
+    - LP: #723819
+  * x86, mm: avoid possible bogus tlb entries by clearing prev mm_cpumask
+    after switching mm
+    - LP: #723819
+  * usb: Realloc xHCI structures after a hub is verified.
+    - LP: #723819
+  * sched: Remove USER_SCHED
+    - LP: #723819
+  * sched: Remove remaining USER_SCHED code
+    - LP: #723819
+  * sched: Move sched_avg_update() to update_cpu_load()
+    - LP: #723819
+  * sched: Increment cache_nice_tries only on periodic lb
+    - LP: #723819
+  * sched: Try not to migrate higher priority RT tasks
+    - LP: #723819
+  * sched: Give CPU bound RT tasks preference
+    - LP: #723819
+  * sched: suppress RCU lockdep splat in task_fork_fair
+    - LP: #723819
+  * sched: fix RCU lockdep splat from task_group()
+    - LP: #723819
+  * sched: Do not consider SCHED_IDLE tasks to be cache hot
+    - LP: #723819
+  * sched: Set group_imb only a task can be pulled from the busiest cpu
+    - LP: #723819
+  * sched: Force balancing on newidle balance if local group has capacity
+    - LP: #723819
+  * sched: Drop group_capacity to 1 only if local group has extra capacity
+    - LP: #723819
+  * sched: Fix softirq time accounting
+    - LP: #723819
+  * sched: Consolidate account_system_vtime extern declaration
+    - LP: #723819
+  * sched: Remove unused PF_ALIGNWARN flag
+    - LP: #723819
+  * sched: Add a PF flag for ksoftirqd identification
+    - LP: #723819
+  * sched: Add IRQ_TIME_ACCOUNTING, finer accounting of irq time
+    - LP: #723819
+  * x86: Add IRQ_TIME_ACCOUNTING
+    - LP: #723819
+  * sched: Do not account irq time to current task
+    - LP: #723819
+  * sched: Remove irq time from available CPU power
+    - LP: #723819
+  * sched: Call tick_check_idle before __irq_enter
+    - LP: #723819
+  * sched: Export account_system_vtime()
+    - LP: #723819
+  * sched, cgroup: Fixup broken cgroup movement
+    - LP: #723819
+  * sched: Use group weight, idle cpu metrics to fix imbalances during idle
+    - LP: #723819
+  * sched: Fix cross-sched-class wakeup preemption
+    - LP: #723819
+  * sched: Fix volanomark performance regression
+    - LP: #723819
+  * sched: Fix idle balancing
+    - LP: #723819
+  * sched: Fix wake_affine() vs RT tasks
+    - LP: #723819
+  * sched: Remove some dead code
+    - LP: #723819
+  * kernel/user.c: add lock release annotation on free_user()
+    - LP: #723819
+  * Linux 2.6.32.29
+    - LP: #723819
+  * rds: Integer overflow in RDS cmsg handling, CVE-2010-4175
+    - LP: #721455
+    - CVE-2010-4175
+
+  [ Ubuntu: 2.6.32-29.58 ]
+
+  * Release Tracking Bug
+    - LP: #716551
+  * net: fix rds_iovec page count overflow, CVE-2010-3865
+    - LP: #709153
+    - CVE-2010-3865
+  * net: ax25: fix information leak to userland, CVE-2010-3875
+    - LP: #710714
+    - CVE-2010-3875
+  * net: ax25: fix information leak to userland harder, CVE-2010-3875
+    - LP: #710714
+    - CVE-2010-3875
+  * net: packet: fix information leak to userland, CVE-2010-3876
+    - LP: #710714
+    - CVE-2010-3876
+  * net: tipc: fix information leak to userland, CVE-2010-3877
+    - LP: #711291
+    - CVE-2010-3877
+  * inet_diag: Make sure we actually run the same bytecode we audited,
+    CVE-2010-3880
+    - LP: #711865
+    - CVE-2010-3880
+
+  [ Ubuntu: 2.6.32-29.57 ]
+
+  * Tracking Bug
+    - LP: #708864
+  * [Config] Set CONFIG_NR_CPUS=256 for amd64 server
+    - LP: #706058
+  * Input: i8042 - introduce 'notimeout' blacklist for Dell Vostro V13
+    - LP: #380126
+  * tun: avoid BUG, dump packet on GSO errors
+    - LP: #698883
+  * TTY: Fix error return from tty_ldisc_open()
+    - LP: #705045
+  * x86, hotplug: Use mwait to offline a processor, fix the legacy case
+    - LP: #705045
+  * fuse: verify ioctl retries
+    - LP: #705045
+  * fuse: fix ioctl when server is 32bit
+    - LP: #705045
+  * ALSA: hda: Use model=lg quirk for LG P1 Express to enable playback and
+    capture
+    - LP: #595482, #705045
+  * nohz: Fix printk_needs_cpu() return value on offline cpus
+    - LP: #705045
+  * nohz: Fix get_next_timer_interrupt() vs cpu hotplug
+    - LP: #705045
+  * nfsd: Fix possible BUG_ON firing in set_change_info
+    - LP: #705045
+  * NFS: Fix fcntl F_GETLK not reporting some conflicts
+    - LP: #705045
+  * sunrpc: prevent use-after-free on clearing XPT_BUSY
+    - LP: #705045
+  * hwmon: (adm1026) Allow 1 as a valid divider value
+    - LP: #705045
+  * hwmon: (adm1026) Fix setting fan_div
+    - LP: #705045
+  * amd64_edac: Fix interleaving check
+    - LP: #705045
+  * IB/uverbs: Handle large number of entries in poll CQ
+    - LP: #705045
+  * PM / Hibernate: Fix PM_POST_* notification with user-space suspend
+    - LP: #705045
+  * ACPICA: Fix Scope() op in module level code
+    - LP: #705045
+  * ACPI: EC: Add another dmi match entry for MSI hardware
+    - LP: #705045
+  * orinoco: fix TKIP countermeasure behaviour
+    - LP: #705045
+  * orinoco: clear countermeasure setting on commit
+    - LP: #705045
+  * x86, amd: Fix panic on AMD CPU family 0x15
+    - LP: #705045
+  * md: fix bug with re-adding of partially recovered device.
+    - LP: #705045
+  * tracing: Fix panic when lseek() called on "trace" opened for writing
+    - LP: #705045
+  * x86, gcc-4.6: Use gcc -m options when building vdso
+    - LP: #705045
+  * x86: Enable the intr-remap fault handling after local APIC setup
+    - LP: #705045
+  * x86, vt-d: Handle previous faults after enabling fault handling
+    - LP: #705045
+  * x86, vt-d: Fix the vt-d fault handling irq migration in the x2apic mode
+    - LP: #705045
+  * x86, vt-d: Quirk for masking vtd spec errors to platform error handling
+    logic
+    - LP: #705045
+  * hvc_console: Fix race between hvc_close and hvc_remove
+    - LP: #705045
+  * hvc_console: Fix race between hvc_close and hvc_remove, again
+    - LP: #705045
+  * HID: hidraw: fix window in hidraw_release
+    - LP: #705045
+  * bfa: fix system crash when reading sysfs fc_host statistics
+    - LP: #705045
+  * net: release dst entry while cache-hot for GSO case too
+    - LP: #705045
+  * install_special_mapping skips security_file_mmap check.
+    - LP: #705045
+  * USB: misc: uss720.c: add another vendor/product ID
+    - LP: #705045
+  * USB: ftdi_sio: Add D.O.Tec PID
+    - LP: #705045
+  * USB: usb-storage: unusual_devs entry for the Samsung YP-CP3
+    - LP: #705045
+  * p54usb: add 5 more USBIDs
+    - LP: #705045
+  * p54usb: New USB ID for Gemtek WUBI-100GW
+    - LP: #705045
+  * sound: Prevent buffer overflow in OSS load_mixer_volumes
+    - LP: #705045
+  * mv_xor: fix race in tasklet function
+    - LP: #705045
+  * ima: fix add LSM rule bug
+    - LP: #705045
+  * ALSA: hda: Use LPIB for Dell Latitude 131L
+    - LP: #530346, #705045
+  * ALSA: hda: Use LPIB quirk for Dell Inspiron m101z/1120
+    - LP: #705045
+  * block: Deprecate QUEUE_FLAG_CLUSTER and use queue_limits instead
+    - LP: #705045
+  * sctp: Fix a race between ICMP protocol unreachable and connect()
+    - LP: #705045
+  * posix-cpu-timers: workaround to suppress the problems with mt exec
+    - LP: #705045
+  * Linux 2.6.32.28
+    - LP: #705045
+  * dell-laptop: Add another Dell laptop family to the DMI whitelist
+    - LP: #693078
+  * dell-laptop: Add another Dell laptop family to the DMI whitelist
+    - LP: #693078
+  * drm/ttm: Clear the ghost cpu_writers flag on
+    ttm_buffer_object_transfer.
+    - LP: #708769
+  * drm/kms: remove spaces from connector names (v2)
+    - LP: #708769
+  * Linux 2.6.32.28+drm33.13
+    - LP: #708769
+
+  [ Ubuntu: 2.6.32-28.56 ]
+
+  * Tracking Bug
+    - LP: #705565
+  * Just a build number increment for a new upload. There was an issue
+    in the previous upload that prevented ARMEL from building. The
+    issue has been resolved in the PPA and a new upload should produce
+    the requisite images.
+
+  [ Ubuntu: 2.6.32-28.55 ]
+
+  * Another version bump because of abi check failure
+  * Tracking Bug
+    - LP: #699885
+
+  [ Ubuntu: 2.6.32-28.54 ]
+
+  * Another version bump because of upload failure
+
+  [ Ubuntu: 2.6.32-28.53 ]
+
+  * Another version bump because of upload failure
+
+  [ Ubuntu: 2.6.32-28.52 ]
+
+  * (removed old tracking bug link)
+
+  [ Ubuntu: 2.6.32-28.51 ]
+
+  * bumped version due to build fail
+
+  [ Ubuntu: 2.6.32-28.50 ]
+
+  * SAUCE: Change nodelayacct boot parameter polarity.
+    - LP: #493156
+  * [Config] CONFIG_TASK_DELAY_ACCT=y
+    - LP: #493156
+  * ipc: initialize structure memory to zero for compat functions
+  * tcp: Increase TCP_MAXSEG socket option minimum.
+    - CVE-2010-4165
+  * perf_events: Fix perf_counter_mmap() hook in mprotect()
+    - CVE-2010-4169
+  * af_unix: limit unix_tot_inflight
+    - CVE-2010-4249
+  * AppArmor: fix the upper bound check for the next/check table
+    - LP: #581525
+  * NFS: Fix panic after nfs_umount()
+    - LP: #683938
+  * block: Ensure physical block size is unsigned int
+    - LP: #688669
+  * block: limit vec count in bio_kmalloc() and bio_alloc_map_data()
+    - LP: #688669
+  * block: take care not to overflow when calculating total iov length
+    - LP: #688669
+  * block: check for proper length of iov entries in blk_rq_map_user_iov()
+    - LP: #688669
+  * jme: Fix PHY power-off error
+    - LP: #688669
+  * irda: Fix parameter extraction stack overflow
+    - LP: #688669
+  * irda: Fix heap memory corruption in iriap.c
+    - LP: #688669
+  * i2c-pca-platform: Change device name of request_irq
+    - LP: #688669
+  * microblaze: Fix build with make 3.82
+    - LP: #688669
+  * Staging: asus_oled: fix up some sysfs attribute permissions
+    - LP: #688669
+  * Staging: asus_oled: fix up my fixup for some sysfs attribute
+    permissions
+    - LP: #688669
+  * Staging: line6: fix up some sysfs attribute permissions
+    - LP: #688669
+  * hpet: fix unwanted interrupt due to stale irq status bit
+    - LP: #688669
+  * hpet: unmap unused I/O space
+    - LP: #688669
+  * olpc_battery: Fix endian neutral breakage for s16 values
+    - LP: #688669
+  * percpu: fix list_head init bug in __percpu_counter_init()
+    - LP: #688669
+  * um: remove PAGE_SIZE alignment in linker script causing kernel
+    segfault.
+    - LP: #688669
+  * um: fix global timer issue when using CONFIG_NO_HZ
+    - LP: #688669
+  * numa: fix slab_node(MPOL_BIND)
+    - LP: #688669
+  * hwmon: (lm85) Fix ADT7468 frequency table
+    - LP: #688669
+  * mm: fix return value of scan_lru_pages in memory unplug
+    - LP: #688669
+  * mm: fix is_mem_section_removable() page_order BUG_ON check
+    - LP: #688669
+  * ssb: b43-pci-bridge: Add new vendor for BCM4318
+    - LP: #688669
+  * sgi-xpc: XPC fails to discover partitions with all nasids above 128
+    - LP: #688669
+  * xen: ensure that all event channels start off bound to VCPU 0
+    - LP: #688669
+  * xen: don't bother to stop other cpus on shutdown/reboot
+    - LP: #688669
+  * sys_semctl: fix kernel stack leakage
+    - LP: #688669
+  * net: NETIF_F_HW_CSUM does not imply FCoE CRC offload
+    - LP: #688669
+  * drivers/char/vt_ioctl.c: fix VT_OPENQRY error value
+    - LP: #688669
+  * viafb: use proper register for colour when doing fill ops
+    - LP: #688669
+  * eCryptfs: Clear LOOKUP_OPEN flag when creating lower file
+    - LP: #688669
+  * md/raid1: really fix recovery looping when single good device fails.
+    - LP: #688669
+  * md: fix return value of rdev_size_change()
+    - LP: #688669
+  * x86: AMD Northbridge: Verify NB's node is online
+    - LP: #688669
+  * tty: prevent DOS in the flush_to_ldisc
+    - LP: #688669
+  * TTY: restore tty_ldisc_wait_idle
+    - LP: #688669
+  * tty_ldisc: Fix BUG() on hangup
+    - LP: #688669
+  * TTY: ldisc, fix open flag handling
+    - LP: #688669
+  * KVM: VMX: fix vmx null pointer dereference on debug register access
+    - LP: #688669
+    - CVE-2010-0435
+  * KVM: x86: fix information leak to userland
+    - LP: #688669
+  * firewire: cdev: fix information leak
+    - LP: #688669
+  * firewire: core: fix an information leak
+    - LP: #688669
+  * firewire: ohci: fix buffer overflow in AR split packet handling
+    - LP: #688669
+  * firewire: ohci: fix race in AR split packet handling
+    - LP: #688669
+  * ALSA: ac97: Apply quirk for Dell Latitude D610 binding Master and
+    Headphone controls
+    - LP: #669279, #688669
+  * ALSA: HDA: Add an extra DAC for Realtek ALC887-VD
+    - LP: #688669
+  * ALSA: hda: Use "alienware" model quirk for another SSID
+    - LP: #683695, #688669
+  * netfilter: nf_conntrack: allow nf_ct_alloc_hashtable() to get highmem
+    pages
+    - LP: #688669
+  * latencytop: fix per task accumulator
+    - LP: #688669
+  * mm/vfs: revalidate page->mapping in do_generic_file_read()
+    - LP: #688669
+  * bio: take care not overflow page count when mapping/copying user data
+    - LP: #688669
+  * libata-scsi passthru: fix bug which truncated LBA48 return values
+    - LP: #688669
+  * libata: fix NULL sdev dereference race in atapi_qc_complete()
+    - LP: #688669
+  * PCI: fix size checks for mmap() on /proc/bus/pci files
+    - LP: #688669
+  * PCI: fix offset check for sysfs mmapped files
+    - LP: #688669
+  * efifb: check that the base address is plausible on pci systems
+    - LP: #688669
+  * USB: gadget: AT91: fix typo in atmel_usba_udc driver
+    - LP: #688669
+  * USB: ftdi_sio: add device IDs for Milkymist One JTAG/serial
+    - LP: #688669
+  * USB: option: fix when the driver is loaded incorrectly for some Huawei
+    devices.
+    - LP: #688669
+  * usb: misc: sisusbvga: fix information leak to userland
+    - LP: #688669
+  * usb: misc: iowarrior: fix information leak to userland
+    - LP: #688669
+  * usb: core: fix information leak to userland
+    - LP: #688669
+  * USB: EHCI: fix obscure race in ehci_endpoint_disable
+    - LP: #688669
+  * USB: storage: sierra_ms: fix sysfs file attribute
+    - LP: #688669
+  * USB: atm: ueagle-atm: fix up some permissions on the sysfs files
+    - LP: #688669
+  * USB: misc: cypress_cy7c63: fix up some sysfs attribute permissions
+    - LP: #688669
+  * USB: misc: usbled: fix up some sysfs attribute permissions
+    - LP: #688669
+  * USB: ftdi_sio: revert "USB: ftdi_sio: fix DTR/RTS line modes"
+    - LP: #688669
+  * USB: misc: trancevibrator: fix up a sysfs attribute permission
+    - LP: #688669
+  * USB: misc: usbsevseg: fix up some sysfs attribute permissions
+    - LP: #688669
+  * USB: ftdi_sio: Add ID for RT Systems USB-29B radio cable
+    - LP: #688669
+  * USB: serial: ftdi_sio: Vardaan USB RS422/485 converter PID added
+    - LP: #688669
+  * acpi-cpufreq: fix a memleak when unloading driver
+    - LP: #688669
+  * ACPI: EC: add Vista incompatibility DMI entry for Toshiba Satellite
+    L355
+    - LP: #688669
+  * fuse: fix attributes after open(O_TRUNC)
+    - LP: #688669
+  * do_exit(): make sure that we run with get_fs() == USER_DS
+    - LP: #688669
+  * uml: disable winch irq before freeing handler data
+    - LP: #688669
+  * backlight: grab ops_lock before testing bd->ops
+    - LP: #688669
+  * nommu: yield CPU while disposing VM
+    - LP: #688669
+  * DECnet: don't leak uninitialized stack byte
+    - LP: #688669
+  * ARM: 6489/1: thumb2: fix incorrect optimisation in usracc
+    - LP: #688669
+  * ARM: 6482/2: Fix find_next_zero_bit and related assembly
+    - LP: #688669
+  * Staging: frontier: fix up some sysfs attribute permissions
+    - LP: #688669
+  * staging: rtl8187se: Change panic to warn when RF switch turned off
+    - LP: #688669
+  * HID: hidraw, fix a NULL pointer dereference in hidraw_ioctl
+    - LP: #688669
+  * HID: hidraw, fix a NULL pointer dereference in hidraw_write
+    - LP: #688669
+  * gianfar: Fix crashes on RX path (Was Re: [Bugme-new] [Bug 19692] New:
+    linux-2.6.36-rc5 crash with gianfar ethernet at full line rate traffic)
+    - LP: #688669
+  * Limit sysctl_tcp_mem and sysctl_udp_mem initializers to prevent integer
+    overflows.
+    - LP: #688669
+  * sparc64: Fix race in signal instruction flushing.
+    - LP: #688669
+  * sparc: Don't mask signal when we can't setup signal frame.
+    - LP: #688669
+  * sparc: Prevent no-handler signal syscall restart recursion.
+    - LP: #688669
+  * x86, UV: Delete unneeded boot messages
+    - LP: #688669
+  * x86, UV: Fix initialization of max_pnode
+    - LP: #688669
+  * drivers/video/efifb.c: support framebuffer for NVIDIA 9400M in MacBook
+    Pro 5,1
+    - LP: #688669
+  * efifb: support the EFI framebuffer on more Apple hardware
+    - LP: #688669
+  * V4L/DVB (13154): uvcvideo: Handle garbage at the end of streaming
+    interface descriptors
+    - LP: #688669
+  * Input: i8042 - add Sony VAIO VPCZ122GX to nomux list
+    - LP: #688669
+  * x25: Patch to fix bug 15678 - x25 accesses fields beyond end of packet.
+    - LP: #688669
+  * memory corruption in X.25 facilities parsing
+    - LP: #688669
+  * can-bcm: fix minor heap overflow
+    - LP: #688669
+  * V4L/DVB: ivtvfb: prevent reading uninitialized stack memory
+    - LP: #688669
+  * x25: Prevent crashing when parsing bad X.25 facilities
+    - LP: #688669
+  * crypto: padlock - Fix AES-CBC handling on odd-block-sized input
+    - LP: #688669
+  * x86-32: Separate 1:1 pagetables from swapper_pg_dir
+    - LP: #688669
+  * x86, mm: Fix CONFIG_VMSPLIT_1G and 2G_OPT trampoline
+    - LP: #688669
+  * x86-32: Fix dummy trampoline-related inline stubs
+    - LP: #688669
+  * rds: Integer overflow in RDS cmsg handling
+    - LP: #688669
+  * net: Truncate recvfrom and sendto length to INT_MAX.
+    - LP: #688669
+  * net: Limit socket I/O iovec total length to INT_MAX.
+    - LP: #688669
+  * nmi: fix clock comparator revalidation
+    - LP: #688669
+  * UV - XPC: pass nasid instead of nid to gru_create_message_queue
+    - LP: #688669
+  * x86: uv: XPC receive message reuse triggers invalid BUG_ON()
+    - LP: #688669
+  * X86: uv: xpc_make_first_contact hang due to not accepting ACTIVE state
+    - LP: #688669
+  * x86: uv: xpc NULL deref when mesq becomes empty
+    - LP: #688669
+  * Linux 2.6.32.27
+    - LP: #688669
+
+ -- Paolo Pisati <paolo.pisati@canonical.com>  Thu, 17 Mar 2011 12:53:35 +0100
+
+linux-mvl-dove (2.6.32-215.32) lucid; urgency=low
+
+  [ Tim Gardner ]
+
+  * Tracking Bug
+    -LP: #712610
+
+  [Paolo Pisati]
+
+  * UBUNTU: SAUCE: Clear new_profile in error path
+    Fixes kernel oops.
+    -LP: #732700
+
+  * Revert "dove: enable lcd0 by default"
+    Fixes screen corruption regression.
+    -LP: #732721
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Mon, 14 Mar 2011 11:29:35 -0600
+
+linux-mvl-dove (2.6.32-215.31) lucid; urgency=low
+
+  [ Tim Gardner ]
+
+  * Tracking Bug
+    - LP: #712610
+
+  * rebasing to 2.6.32-29.57 was a really bad idea.
+    lets forget it ever happened, start afresh
+    from Ubuntu-2.6.32-213.29, and just apply CVE patches.
+
+  * inet_diag: Make sure we actually run the same bytecode we audited, CVE-2010-3880
+    -LP: #711341
+    CVE-2010-3880
+  * net: tipc: fix information leak to userland, CVE-2010-3877
+    -LP: #711291
+    CVE-2010-3877
+  * net: packet: fix information leak to userland, CVE-2010-3876
+    -LP: #711045
+    CVE-2010-3876
+  * net: ax25: fix information leak to userland harder, CVE-2010-3875
+    -LP: #710714
+    CVE-2010-3875
+  * net: ax25: fix information leak to userland, CVE-2010-3875
+    -LP: #710714
+    CVE-2010-3875
+  * net: fix rds_iovec page count overflow, CVE-2010-3865
+    -LP: #709153
+    CVE-2010-3865
+  * KVM: VMX: fix vmx null pointer dereference on debug register access, CVE-2010-0435
+    -LP: #712615
+    CVE-2010-0435
+  * af_unix: limit unix_tot_inflight, CVE-2010-4249
+    -LP: #720959
+    CVE-2010-4249
+  * perf_events: Fix perf_counter_mmap() hook in mprotect(), CVE-2010-4169
+    -LP: #720966
+    CVE-2010-4169
+  * tcp: Increase TCP_MAXSEG socket option minimum., CVE-2010-4165
+    -LP: #720967
+    CVE-2010-4165
+  * ipc: initialize structure memory to zero for compat functions, CVE-2010-4073
+    -LP: #720968
+    CVE-2010-4073
+
+ -- Tim Gardner <tim.gardner@canonical.com>  Thu, 17 Feb 2011 13:05:01 -0700
+
+linux-mvl-dove (2.6.32-214.30) lucid; urgency=low
+
+  * This version was really bad. Pretend it never happened.
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Thu, 03 Feb 2011 09:13:11 -0700
+
+linux-mvl-dove (2.6.32-213.29) lucid-proposed; urgency=low
+
+  [ Brad Figg ]
+
+  * Rebased to 2.6.32-27.49
+
+  [ Ubuntu: 2.6.32-27.49 ]
+
+  * Revert "SAUCE: AF_ECONET prevent kernel stack overflow"
+  * Revert "SAUCE: AF_ECONET SIOCSIFADDR ioctl does not check privileges"
+  * Revert "SAUCE: AF_ECONET saddr->cookie prevent NULL pointer
+    dereference"
+  * [Config] Added be2net, be2scsi to udebs
+    - LP: #628776
+  * [Config] Use correct be2iscsi module name in d-i/modules/scsi-modules
+    - LP: #628776
+  * Revert "(pre-stable) ACPI: enable repeated PCIEXP wakeup by clearing
+    PCIEXP_WAKE_STS on resume"
+  * Revert "mm: (pre-stable) Move vma_stack_continue into mm.h"
+  * x86, cpu: After uncapping CPUID, re-run CPU feature detection
+    - LP: #668380
+  * ALSA: sound/pci/rme9652: prevent reading uninitialized stack memory
+    - LP: #668380
+  * ALSA: oxygen: fix analog capture on Claro halo cards
+    - LP: #668380
+  * ALSA: hda - Add Dell Latitude E6400 model quirk
+    - LP: #643891, #668380
+  * ALSA: rawmidi: fix oops (use after free) when unloading a driver module
+    - LP: #668380
+  * USB: fix bug in initialization of interface minor numbers
+    - LP: #668380
+  * usb: musb: gadget: fix kernel panic if using out ep with FIFO_TXRX
+    style
+    - LP: #668380
+  * usb: musb: gadget: restart request on clearing endpoint halt
+    - LP: #668380
+  * oprofile: Add Support for Intel CPU Family 6 / Model 29
+    - LP: #668380
+  * RDMA/cxgb3: Turn off RX coalescing for iWARP connections
+    - LP: #668380
+  * mmc: sdhci-s3c: fix NULL ptr access in sdhci_s3c_remove
+    - LP: #668380
+  * x86/amd-iommu: Set iommu configuration flags in enable-loop
+    - LP: #668380
+  * x86/amd-iommu: Fix rounding-bug in __unmap_single
+    - LP: #668380
+  * x86/amd-iommu: Work around S3 BIOS bug
+    - LP: #668380
+  * tracing/x86: Don't use mcount in pvclock.c
+    - LP: #668380
+  * tracing/x86: Don't use mcount in kvmclock.c
+    - LP: #668380
+  * v4l1: fix 32-bit compat microcode loading translation
+    - LP: #668380
+  * V4L/DVB: cx231xx: Avoid an OOPS when card is unknown (card=0)
+    - LP: #668380
+  * V4L/DVB (13966): DVB-T regression fix for saa7134 cards
+    - LP: #668380
+  * Input: joydev - fix JSIOCSAXMAP ioctl
+    - LP: #668380
+  * x86, hpet: Fix bogus error check in hpet_assign_irq()
+    - LP: #668380
+  * x86, irq: Plug memory leak in sparse irq
+    - LP: #668380
+  * ubd: fix incorrect sector handling during request restart
+    - LP: #668380
+  * ring-buffer: Fix typo of time extends per page
+    - LP: #668380
+  * dmaengine: fix interrupt clearing for mv_xor
+    - LP: #668380
+  * hrtimer: Preserve timer state in remove_hrtimer()
+    - LP: #668380
+  * i2c-pca: Fix waitforcompletion() return value
+    - LP: #668380
+  * wext: fix potential private ioctl memory content leak
+    - LP: #668380
+  * atl1: fix resume
+    - LP: #668380
+  * x86, AMD, MCE thresholding: Fix the MCi_MISCj iteration order
+    - LP: #668380
+  * De-pessimize rds_page_copy_user
+    - LP: #668380
+  * xfrm4: strip ECN and IP Precedence bits in policy lookup
+    - LP: #668380
+  * tcp: Fix >4GB writes on 64-bit.
+    - LP: #668380
+  * net: Fix the condition passed to sk_wait_event()
+    - LP: #668380
+  * Phonet: Correct header retrieval after pskb_may_pull
+    - LP: #668380
+  * net: Fix IPv6 PMTU disc. w/ asymmetric routes
+    - LP: #668380
+  * ip: fix truesize mismatch in ip fragmentation
+    - LP: #668380
+  * net: clear heap allocations for privileged ethtool actions
+    - LP: #668380
+  * tcp: Fix race in tcp_poll
+    - LP: #668380
+  * netxen: dont set skb->truesize
+    - LP: #668380
+  * net: blackhole route should always be recalculated
+    - LP: #668380
+  * skge: add quirk to limit DMA
+    - LP: #668380
+  * r8169: allocate with GFP_KERNEL flag when able to sleep
+    - LP: #668380
+  * bsg: fix incorrect device_status value
+    - LP: #668380
+  * r6040: fix r6040_multicast_list
+    - LP: #668380
+  * r6040: Fix multicast list iteration when hash filter is used
+    - LP: #668380
+  * powerpc: Initialise paca->kstack before early_setup_secondary
+    - LP: #668380
+  * powerpc: Don't use kernel stack with translation off
+    - LP: #668380
+  * b44: fix carrier detection on bind
+    - LP: #668380
+  * ACPI: enable repeated PCIEXP wakeup by clearing PCIEXP_WAKE_STS on
+    resume
+    - LP: #613381, #668380
+  * intel_idle: PCI quirk to prevent Lenovo Ideapad s10-3 boot hang
+    - LP: #668380
+  * ACPI: EC: add Vista incompatibility DMI entry for Toshiba Satellite
+    L355
+    - LP: #668380
+  * ACPI: delete ZEPTO idle=nomwait DMI quirk
+    - LP: #668380
+  * ACPI: Disable Windows Vista compatibility for Toshiba P305D
+    - LP: #668380
+  * x86: detect scattered cpuid features earlier
+    - LP: #668380
+  * fix 2.6.32.23 suspend regression caused by commit 6f6198a
+    - LP: #668380
+  * setup_arg_pages: diagnose excessive argument size
+    - LP: #668380
+  * execve: improve interactivity with large arguments
+    - LP: #668380
+  * execve: make responsive to SIGKILL with large arguments
+    - LP: #668380
+  * Phonet: disable network namespace support
+    - LP: #668380
+  * mm: Move vma_stack_continue into mm.h
+    - LP: #668380
+  * Linux 2.6.32.25
+    - LP: #668380
+  * xfs: validate untrusted inode numbers during lookup
+    - CVE-2010-2943
+  * xfs: rename XFS_IGET_BULKSTAT to XFS_IGET_UNTRUSTED
+    - CVE-2010-2943
+  * xfs: remove block number from inode lookup code
+    - CVE-2010-2943
+  * xfs: fix untrusted inode number lookup
+    - CVE-2010-2943
+  * drm/i915: Sanity check pread/pwrite
+    - CVE-2010-2962
+  * drm/i915: Rephrase pwrite bounds checking to avoid any potential
+    overflow
+    - CVE-2010-2962
+  * net: clear heap allocation for ETHTOOL_GRXCLSRLALL
+    - CVE-2010-3861
+  * ipc: shm: fix information leak to userland
+    - CVE-2010-4072
+  * staging: usbip: Notify usb core of port status changes
+    - LP: #681132
+  * staging: usbip: Process event flags without delay
+    - LP: #681132
+  * powerpc/perf: Fix sampling enable for PPC970
+    - LP: #681132
+  * pcmcia: synclink_cs: fix information leak to userland
+    - LP: #681132
+  * sched: Fix string comparison in /proc/sched_features
+    - LP: #681132
+  * bluetooth: Fix missing NULL check
+    - LP: #681132
+  * futex: Fix errors in nested key ref-counting
+    - LP: #681132
+  * mm, x86: Saving vmcore with non-lazy freeing of vmas
+    - LP: #681132
+  * x86, cpu: Fix renamed, not-yet-shipping AMD CPUID feature bit
+    - LP: #681132
+  * x86, kexec: Make sure to stop all CPUs before exiting the kernel
+    - LP: #681132
+  * x86, olpc: Don't retry EC commands forever
+    - LP: #681132
+  * x86, mtrr: Assume SYS_CFG[Tom2ForceMemTypeWB] exists on all future AMD
+    CPUs
+    - LP: #681132
+  * x86, intr-remap: Set redirection hint in the IRTE
+    - LP: #681132
+  * x86, kdump: Change copy_oldmem_page() to use cached addressing
+    - LP: #681132
+  * KVM: SVM: Fix wrong intercept masks on 32 bit
+    - LP: #681132
+  * KVM: MMU: fix direct sps access corrupted
+    - LP: #681132
+  * KVM: MMU: fix conflict access permissions in direct sp
+    - LP: #681132
+  * KVM: VMX: Fix host GDT.LIMIT corruption
+    - LP: #681132
+  * KVM: SVM: Adjust tsc_offset only if tsc_unstable
+    - LP: #681132
+  * KVM: x86: Fix SVM VMCB reset
+    - LP: #681132
+  * KVM: x86: Move TSC reset out of vmcb_init
+    - LP: #681132
+  * KVM: Fix fs/gs reload oops with invalid ldt
+    - LP: #681132
+  * KVM: Correct ordering of ldt reload wrt fs/gs reload
+  * KVM: VMX: Fix host userspace gsbase corruption
+  * pipe: fix failure to return error code on ->confirm()
+    - LP: #681132
+  * p54usb: fix off-by-one on !CONFIG_PM
+    - LP: #681132
+  * p54usb: add five more USBIDs
+    - LP: #681132
+  * drivers/net/wireless/p54/eeprom.c: Return -ENOMEM on memory allocation
+    failure
+    - LP: #681132
+  * USB: ftdi_sio: Add PID for accesio products
+    - LP: #681132
+  * USB: add PID for FTDI based OpenDCC hardware
+    - LP: #681132
+  * USB: ftdi_sio: new VID/PIDs for various Papouch devices
+    - LP: #681132
+  * USB: ftdi_sio: add device ids for ScienceScope
+    - LP: #681132
+  * usb: musb: blackfin: call gpio_free() on error path in
+    musb_platform_init()
+    - LP: #681132
+  * USB: option: Add more ZTE modem USB id's
+    - LP: #681132
+  * USB: cp210x: Add Renesas RX-Stick device ID
+    - LP: #681132
+  * USB: cp210x: Add WAGO 750-923 Service Cable device ID
+    - LP: #681132
+  * USB: atmel_usba_udc: force vbus_pin at -EINVAL when gpio_request
+    failled
+    - LP: #681132
+  * USB: disable endpoints after unbinding interfaces, not before
+    - LP: #681132
+  * USB: opticon: Fix long-standing bugs in opticon driver
+    - LP: #681132
+  * USB: accept some invalid ep0-maxpacket values
+    - LP: #681132
+  * sd name space exhaustion causes system hang
+    - LP: #681132
+  * libsas: fix NCQ mixing with non-NCQ
+    - LP: #681132
+  * gdth: integer overflow in ioctl
+    - LP: #681132
+  * Fix race when removing SCSI devices
+    - LP: #681132
+  * Fix regressions in scsi_internal_device_block
+    - LP: #681132
+  * sgi-xp: incoming XPC channel messages can come in after the channel's
+    partition structures have been torn down
+    - LP: #681132
+  * Linux 2.6.32.26
+    - LP: #681132
+  * drm/radeon: fix PCI ID 5657 to be an RV410
+    - LP: #683257
+  * Linux 2.6.32.26+drm33.12
+    - LP: #683257
+  * econet: disallow NULL remote addr for sendmsg(), fixes CVE-2010-3849
+    - CVE-2010-3849
+  * econet: fix CVE-2010-3850
+    - CVE-2010-3850
+  * econet: fix CVE-2010-3848
+    - CVE-2010-3848
+
+  [ Ubuntu: 2.6.32-26.48 ]
+
+  * SAUCE: AF_ECONET prevent kernel stack overflow
+    - CVE-2010-3848
+  * SAUCE: AF_ECONET SIOCSIFADDR ioctl does not check privileges
+    - CVE-2010-3850
+  * SAUCE: AF_ECONET saddr->cookie prevent NULL pointer dereference
+    - CVE-2010-3849
+
+  [ Ubuntu: 2.6.32-26.47 ]
+
+  * Revert "SAUCE: ALSA: HDA: Enable internal mic on Dell E6410 and Dell
+    E6510"
+  * Revert "[Config] Added be2net, be2scsi to udebs"
+  * Revert "(ore-stable) ALSA: hda - Apply ALC269 VAIO fix-up to all Sony
+    laptops with ALC269"
+  * Revert "(pre-stable) ALSA: HDA: Correctly apply position_fix quirks for
+    ATI and VIA controllers"
+  * Revert "ALSA: hda: Use LPIB for another mainboard"
+  * Revert "ALSA: hda: Use LPIB for ASUS M2V"
+  * Revert "ALSA: hda: Use LPIB for an ASUS device"
+  * Buglink Fixup for reverted unverified fixes
+
+  [ Ubuntu: 2.6.32-26.46 ]
+
+  * SAUCE: ALSA: HDA: Enable internal mic on Dell E6410 and Dell E6510
+    - See: #605047, #628961
+  * [Config] Added be2net, be2scsi to udebs
+    - See: #628776
+  * Revert "(pre-stable) drm/i915: add PANEL_UNLOCK_REGS definition"
+    - LP: #645444
+  * Revert "(pre-stable) drm/i915: make sure we shut off the panel in eDP
+    configs"
+    - LP: #645444
+  * Revert "(pre-stable) drm/i915: make sure eDP panel is turned on"
+    - LP: #645444
+  * Revert "(pre-stable) drm/radeon/kms: initialize set_surface_reg reg for
+    rs600 asic"
+    - LP: #645371
+  * Revert "drm/nouveau: Fix fbcon corruption with font width not divisible
+    by 8"
+    - LP: #663176
+  * mmc: fix all hangs related to mmc/sd card insert/removal during
+    suspend/resume
+    - LP: #477106
+  * mmc: build fix: mmc_pm_notify is only available with CONFIG_PM=y
+    - LP: #477106
+  * hwmon: (k8temp) Differentiate between AM2 and ASB1
+    - LP: #644694
+  * xen: handle events as edge-triggered
+    - LP: #644694
+  * xen: use percpu interrupts for IPIs and VIRQs
+    - LP: #644694
+  * ALSA: hda - Rename iMic to Int Mic on Lenovo NB0763
+    - LP: #605101, #644694
+  * sata_mv: fix broken DSM/TRIM support (v2)
+    - LP: #644694
+  * x86, tsc, sched: Recompute cyc2ns_offset's during resume from sleep
+    states
+    - LP: #644694
+  * PCI: MSI: Remove unsafe and unnecessary hardware access
+    - LP: #644694
+  * PCI: MSI: Restore read_msi_msg_desc(); add get_cached_msi_msg_desc()
+    - LP: #644694
+  * sched: kill migration thread in CPU_POST_DEAD instead of CPU_DEAD
+    - LP: #644694
+  * sched: revert stable c6fc81a sched: Fix a race between ttwu() and
+    migrate_task()
+    - LP: #644694
+  * staging: hv: Fix missing functions for net_device_ops
+    - LP: #644694
+  * staging: hv: Fixed bounce kmap problem by using correct index
+    - LP: #644694
+  * staging: hv: Fixed the value of the 64bit-hole inside ring buffer
+    - LP: #644694
+  * staging: hv: Increased storvsc ringbuffer and max_io_requests
+    - LP: #644694
+  * staging: hv: Fixed lockup problem with bounce_buffer scatter list
+    - LP: #644694
+  * fuse: flush background queue on connection close
+    - LP: #644694
+  * ath9k_hw: fix parsing of HT40 5 GHz CTLs
+    - LP: #644694
+  * ocfs2: Fix incorrect checksum validation error
+    - LP: #644694
+  * USB: ehci-ppc-of: problems in unwind
+    - LP: #644694
+  * USB: Fix kernel oops with g_ether and Windows
+    - LP: #644694
+  * USB: CP210x Add new device ID
+    - LP: #644694
+  * USB: cp210x: Add B&G H3000 link cable ID
+    - LP: #644694
+  * USB: ftdi_sio: Added custom PIDs for ChamSys products
+    - LP: #644694
+  * USB: serial: Extra device/vendor ID for mos7840 driver
+    - LP: #644694
+  * usb: serial: mos7840: Add USB ID to support the B&B Electronics
+    USOPTL4-2P.
+    - LP: #644694
+  * USB: mos7840: fix DMA buffers on stack and endianess bugs
+    - LP: #644694
+  * usb: serial: mos7840: Add USB IDs to support more B&B USB/RS485
+    converters.
+    - LP: #644694
+  * USB: Exposing second ACM channel as tty for Nokia S60 phones.
+    - LP: #644694
+  * USB: cdc-acm: add another device quirk
+    - LP: #644694
+  * USB: Expose vendor-specific ACM channel on Nokia 5230
+    - LP: #644694
+  * USB: cdc-acm: Adding second ACM channel support for various Nokia and
+    one Samsung phones
+    - LP: #644694
+  * USB: cdc-acm: Add pseudo modem without AT command capabilities
+    - LP: #644694
+  * USB: cdc-acm: Fixing crash when ACM probing interfaces with no endpoint
+    descriptors.
+    - LP: #644694
+  * ALSA: hda - Fix auto-parser of ALC269vb for HP pin NID 0x21
+    - LP: #644694
+  * ALSA: seq/oss - Fix double-free at error path of snd_seq_oss_open()
+    - LP: #644694
+  * sysfs: checking for NULL instead of ERR_PTR
+    - LP: #644694
+  * tun: Don't add sysfs attributes to devices without sysfs directories
+    - LP: #644694
+  * oprofile: fix crash when accessing freed task structs
+    - LP: #644694
+  * oprofile, x86: fix init_sysfs error handling
+    - LP: #644694
+  * oprofile, x86: fix init_sysfs() function stub
+    - LP: #644694
+  * HID: usbhid: initialize interface pointers early enough
+    - LP: #644694
+  * HID: fix suspend crash by moving initializations earlier
+    - LP: #644694
+  * libata: skip EH autopsy and recovery during suspend
+    - LP: #644694
+  * tracing: Fix a race in function profile
+    - LP: #644694
+  * tracing: Do not allow llseek to set_ftrace_filter
+    - LP: #644694
+  * tracing: t_start: reset FTRACE_ITER_HASH in case of seek/pread
+    - LP: #644694
+  * irda: off by one
+    - LP: #644694
+  * gcov: fix null-pointer dereference for certain module types
+    - LP: #644694
+  * tmio_mmc: don't clear unhandled pending interrupts
+    - LP: #644694
+  * mmc: fix the use of kunmap_atomic() in tmio_mmc.h
+    - LP: #644694
+  * bounce: call flush_dcache_page() after bounce_copy_vec()
+    - LP: #644694
+  * kernel/groups.c: fix integer overflow in groups_search
+    - LP: #644694
+  * binfmt_misc: fix binfmt_misc priority
+    - LP: #644694
+  * Input: i8042 - fix device removal on unload
+    - LP: #644694
+  * memory hotplug: fix next block calculation in is_removable
+    - LP: #644694
+  * perf: Initialize callchains roots's childen hits
+    - LP: #644694
+  * p54: fix tx feedback status flag check
+    - LP: #644694
+  * ath5k: check return value of ieee80211_get_tx_rate
+    - LP: #644694
+  * wireless extensions: fix kernel heap content leak
+    - LP: #644694
+  * x86, tsc: Fix a preemption leak in restore_sched_clock_state()
+    - LP: #644694
+  * sched: Protect task->cpus_allowed access in sched_getaffinity()
+    - LP: #644694
+  * sched: Protect sched_rr_get_param() access to task->sched_class
+    - LP: #644694
+  * sched: Consolidate select_task_rq() callers
+    - LP: #644694
+  * sched: Remove unused cpu_nr_migrations()
+    - LP: #644694
+  * sched: Remove rq->clock coupling from set_task_cpu()
+    - LP: #644694
+  * sched: Clean up ttwu() rq locking
+    - LP: #644694
+  * sched: Sanitize fork() handling
+    - LP: #644694
+  * sched: Remove forced2_migrations stats
+    - LP: #644694
+  * sched: Make wakeup side and atomic variants of completion API irq safe
+    - LP: #644694
+  * sched: Use rcu in sys_sched_getscheduler/sys_sched_getparam()
+    - LP: #644694
+  * sched: Use rcu in sched_get/set_affinity()
+    - LP: #644694
+  * sched: Use rcu in sched_get_rr_param()
+    - LP: #644694
+  * sched: Fix set_cpu_active() in cpu_down()
+    - LP: #644694
+  * sched: Use TASK_WAKING for fork wakups
+    - LP: #644694
+  * sched: Ensure set_task_cpu() is never called on blocked tasks
+    - LP: #644694
+  * sched: Make warning less noisy
+    - LP: #644694
+  * sched: Fix broken assertion
+    - LP: #644694
+  * sched: Fix sched_exec() balancing
+    - LP: #644694
+  * sched: Fix select_task_rq() vs hotplug issues
+    - LP: #644694
+  * sched: Add pre and post wakeup hooks
+    - LP: #644694
+  * sched: Remove the cfs_rq dependency from set_task_cpu()
+    - LP: #644694
+  * sched: Fix hotplug hang
+    - LP: #644694
+  * sched: Fix fork vs hotplug vs cpuset namespaces
+    - LP: #644694
+  * sched: Fix incorrect sanity check
+    - LP: #644694
+  * sched: Fix race between ttwu() and task_rq_lock()
+    - LP: #644694
+  * sched: Extend enqueue_task to allow head queueing
+    - LP: #644694
+  * sched: Implement head queueing for sched_rt
+    - LP: #644694
+  * sched: Queue a deboosted task to the head of the RT prio queue
+    - LP: #644694
+  * sched: set_cpus_allowed_ptr(): Don't use rq->migration_thread after
+    unlock
+    - LP: #644694
+  * sched: Kill the broken and deadlockable
+    cpuset_lock/cpuset_cpus_allowed_locked code
+    - LP: #644694
+  * sched: move_task_off_dead_cpu(): Take rq->lock around
+    select_fallback_rq()
+    - LP: #644694
+  * sched: move_task_off_dead_cpu(): Remove retry logic
+    - LP: #644694
+  * sched: sched_exec(): Remove the select_fallback_rq() logic
+    - LP: #644694
+  * sched: _cpu_down(): Don't play with current->cpus_allowed
+    - LP: #644694
+  * sched: Make select_fallback_rq() cpuset friendly
+    - LP: #644694
+  * sched: Fix TASK_WAKING vs fork deadlock
+    - LP: #644694
+  * sched: Optimize task_rq_lock()
+    - LP: #644694
+  * sched: Fix nr_uninterruptible count
+    - LP: #644694
+  * sched: Fix rq->clock synchronization when migrating tasks
+    - LP: #644694
+  * sched: Remove unnecessary RCU exclusion
+    - LP: #644694
+  * sched: apply RCU protection to wake_affine()
+    - LP: #644694
+  * sched: Cleanup select_task_rq_fair()
+    - LP: #644694
+  * sched: More generic WAKE_AFFINE vs select_idle_sibling()
+    - LP: #644694
+  * sched: Fix vmark regression on big machines
+    - LP: #644694
+  * sched: Fix select_idle_sibling()
+    - LP: #644694
+  * sched: Pre-compute cpumask_weight(sched_domain_span(sd))
+    - LP: #644694
+  * sched: Fix select_idle_sibling() logic in select_task_rq_fair()
+    - LP: #644694
+  * sched: cpuacct: Use bigger percpu counter batch values for stats
+    counters
+    - LP: #644694
+  * ALSA: hda - Handle missing NID 0x1b on ALC259 codec
+    - LP: #644694
+  * ALSA: hda - Handle pin NID 0x1a on ALC259/269
+    - LP: #644694
+  * arm: fix really nasty sigreturn bug
+    - LP: #644694
+  * hwmon: (f75375s) Shift control mode to the correct bit position
+    - LP: #644694
+  * hwmon: (f75375s) Do not overwrite values read from registers
+    - LP: #644694
+  * apm_power: Add missing break statement
+    - LP: #644694
+  * NFS: Fix a typo in nfs_sockaddr_match_ipaddr6
+    - LP: #644694
+  * SUNRPC: Fix race corrupting rpc upcall
+    - LP: #644694
+  * Linux 2.6.32.22
+    - LP: #644694
+  * drm/i915: don't access FW_BLC_SELF on 965G
+    - LP: #645444
+  * drm/i915: gen3 page flipping fixes
+    - LP: #645444
+  * drm/i915: don't queue flips during a flip pending event
+    - LP: #645444
+  * drm/i915: Hold the spinlock whilst resetting unpin_work along error
+    path
+    - LP: #645444
+  * drm/i915: handle shared framebuffers when flipping
+    - LP: #645444
+  * drm/i915: add PANEL_UNLOCK_REGS definition
+    - LP: #645444
+  * drm/i915: make sure eDP panel is turned on
+    - LP: #645444
+  * drm/i915: make sure we shut off the panel in eDP configs
+    - LP: #645444
+  * Linux 2.6.32.22+drm33.9
+    - LP: #645444
+  * drm/radeon/kms/igp: sideport is AMD only
+    - LP: #645371
+  * drm/radeon/kms: flush HDP cache on GART table updates.
+    - LP: #645371
+  * drm/radeon/kms/r7xx: add workaround for hw issue with HDP flush
+    - LP: #645371
+  * drm/i915: Check overlay stride errata for i830 and i845
+    - LP: #645371
+  * i915: fix ironlake edp panel setup (v4)
+    - LP: #645371
+  * drm/radeon/kms: add additional quirk for Acer rv620 laptop
+    - LP: #645371
+  * drm/i915: fixup pageflip ringbuffer commands for i8xx
+    - LP: #645371
+  * drm/i915: i8xx also doesn't like multiple oustanding pageflips
+    - LP: #645371
+  * drm/i915/edp: Flush the write before waiting for PLLs
+    - LP: #645371
+  * drm/radeon/kms: disable MSI on IGP chips
+    - LP: #645371
+  * drm/radeon/kms: don't enable MSIs on AGP boards
+    - LP: #645371
+  * drm/radeon/kms: fix typo in radeon_compute_pll_gain
+    - LP: #645371
+  * drm/radeon/kms/DCE3+: switch pads to ddc mode when going i2c
+    - LP: #645371
+  * drm/radeon/kms: fix sideport detection on newer rs880 boards
+    - LP: #645371
+  * drm/i915: Don't touch PORT_HOTPLUG_EN in intel_dp_detect()
+    - LP: #645371
+  * drm/i915: Kill dangerous pending-flip debugging
+    - LP: #645371
+  * drm/radeon/kms: release AGP bridge at suspend
+    - LP: #645371
+  * drm/radeon/kms: initialize set_surface_reg reg for rs600 asic
+    - LP: #645371
+  * drm/radeon/kms: fix a regression on r7xx AGP due to the HDP flush fix
+    - LP: #645371
+  * Linux 2.6.32.22+drm33.10
+    - LP: #645371
+  * USB: serial/mos*: prevent reading uninitialized stack memory
+    - LP: #649483
+  * sparc: Provide io{read,write}{16,32}be().
+    - LP: #649483
+  * gro: fix different skb headrooms
+    - LP: #649483
+  * gro: Re-fix different skb headrooms
+    - LP: #649483
+  * irda: Correctly clean up self->ias_obj on irda_bind() failure.
+    - LP: #649483
+  * tcp: select(writefds) don't hang up when a peer close connection
+    - LP: #649483
+  * tcp: Combat per-cpu skew in orphan tests.
+    - LP: #649483
+  * tcp: fix three tcp sysctls tuning
+    - LP: #649483
+  * bridge: Clear IPCB before possible entry into IP stack
+    - LP: #649483
+  * bridge: Clear INET control block of SKBs passed into ip_fragment().
+    - LP: #649483
+  * net: Fix oops from tcp_collapse() when using splice()
+    - LP: #649483
+  * rds: fix a leak of kernel memory
+    - LP: #649483
+  * tcp: Prevent overzealous packetization by SWS logic.
+    - LP: #649483
+  * UNIX: Do not loop forever at unix_autobind().
+    - LP: #649483
+  * r8169: fix random mdio_write failures
+    - LP: #649483
+  * r8169: fix mdio_read and update mdio_write according to hw specs
+    - LP: #649483
+  * sparc64: Get rid of indirect p1275 PROM call buffer.
+    - LP: #649483
+  * drivers/net/usb/hso.c: prevent reading uninitialized memory
+    - LP: #649483
+  * drivers/net/cxgb3/cxgb3_main.c: prevent reading uninitialized stack
+    memory
+    - LP: #649483
+  * drivers/net/eql.c: prevent reading uninitialized stack memory
+    - LP: #649483
+  * bonding: correctly process non-linear skbs
+    - LP: #649483
+  * Staging: vt6655: fix buffer overflow
+    - LP: #649483
+  * net/llc: make opt unsigned in llc_ui_setsockopt()
+    - LP: #649483
+  * pid: make setpgid() system call use RCU read-side critical section
+    - LP: #649483
+  * sched: Fix user time incorrectly accounted as system time on 32-bit
+    - LP: #649483
+  * oprofile: Add Support for Intel CPU Family 6 / Model 22 (Intel Celeron
+    540)
+    - LP: #649483
+  * char: Mark /dev/zero and /dev/kmem as not capable of writeback
+    - LP: #649483
+  * drivers/pci/intel-iommu.c: fix build with older gcc's
+    - LP: #649483
+  * drivers/video/sis/sis_main.c: prevent reading uninitialized stack
+    memory
+    - LP: #649483
+  * percpu: fix pcpu_last_unit_cpu
+    - LP: #649483
+  * aio: check for multiplication overflow in do_io_submit
+    - LP: #649483
+  * inotify: send IN_UNMOUNT events
+    - LP: #649483
+  * SCSI: mptsas: fix hangs caused by ATA pass-through
+    - LP: #649483
+  * ext4: Fix remaining racy updates of EXT4_I(inode)->i_flags
+    - LP: #649483
+  * IA64: fix siglock
+    - LP: #649483
+  * IA64: Optimize ticket spinlocks in fsys_rt_sigprocmask
+    - LP: #649483
+  * KEYS: Fix RCU no-lock warning in keyctl_session_to_parent()
+    - LP: #649483
+  * KEYS: Fix bug in keyctl_session_to_parent() if parent has no session
+    keyring
+    - LP: #649483
+  * xfs: prevent reading uninitialized stack memory
+    - LP: #649483
+  * drivers/video/via/ioctl.c: prevent reading uninitialized stack memory
+    - LP: #649483
+  * ACPI: disable _OSI(Windows 2009) on Asus K50IJ
+    - LP: #649483
+  * bnx2: Fix netpoll crash.
+    - LP: #649483
+  * bnx2: Fix hang during rmmod bnx2.
+    - LP: #649483
+  * AT91: change dma resource index
+    - LP: #649483
+  * cxgb3: fix hot plug removal crash
+    - LP: #649483
+  * mm: page allocator: drain per-cpu lists after direct reclaim allocation
+    fails
+    - LP: #649483
+  * mm: page allocator: calculate a better estimate of NR_FREE_PAGES when
+    memory is low and kswapd is awake
+    - LP: #649483
+  * mm: page allocator: update free page counters after pages are placed on
+    the free list
+    - LP: #649483
+  * guard page for stacks that grow upwards
+    - LP: #649483
+  * Fix unprotected access to task credentials in waitid()
+    - LP: #649483
+  * sctp: Do not reset the packet during sctp_packet_config().
+    - LP: #649483
+  * 3c503: Fix IRQ probing
+    - LP: #649483
+  * asix: fix setting mac address for AX88772
+    - LP: #649483
+  * dasd: use correct label location for diag fba disks
+    - LP: #649483
+  * clocksource: sh_tmu: compute mult and shift before registration
+    - LP: #649483
+  * gro: Fix bogus gso_size on the first fraglist entry
+    - LP: #649483
+  * hostap_pci: set dev->base_addr during probe
+    - LP: #649483
+  * inotify: fix inotify oneshot support
+    - LP: #649483
+  * Input: add compat support for sysfs and /proc capabilities output
+    - LP: #649483
+  * MIPS: Quit using undefined behavior of ADDU in 64-bit atomic
+    operations.
+    - LP: #649483
+  * MIPS: Set io_map_base for several PCI bridges lacking it
+    - LP: #649483
+  * MIPS: uasm: Add OR instruction.
+    - LP: #649483
+  * pata_pdc202xx_old: fix UDMA mode for Promise UDMA33 cards
+    - LP: #649483
+  * pata_pdc202xx_old: fix UDMA mode for PDC2026x chipsets
+    - LP: #649483
+  * MIPS: Sibyte: Fix M3 TLB exception handler workaround.
+    - LP: #649483
+  * sis-agp: Remove SIS 760, handled by amd64-agp
+    - LP: #649483
+  * alpha: Fix printk format errors
+    - LP: #649483
+  * x86: Add memory modify constraints to xchg() and cmpxchg()
+    - LP: #649483
+  * Linux 2.6.32.23
+    - LP: #649483
+  * (pre-stable) [SCSI] megaraid_sas: Add new megaraid SAS 2 controller
+    support to the driver
+    - LP: #546091
+  * (pre-stable) [SCSI] megaraid_sas: allocate the application cmds to sas2
+    controller
+    - LP: #546091
+  * Xen: fix typo in previous patch
+    - LP: #655456
+  * Linux 2.6.32.24
+    - LP: #655456
+  * (ore-stable) ALSA: hda - Apply ALC269 VAIO fix-up to all Sony laptops
+    with ALC269
+    - See: #546769, #598938, #637291, #642892, #648871, #655386
+  * (pre-stable) ALSA: HDA: Correctly apply position_fix quirks for ATI and
+    VIA controllers
+    - See: #465942, #580749, #587546
+  * (pre-stable) ACPI: enable repeated PCIEXP wakeup by clearing
+    PCIEXP_WAKE_STS on resume
+    - LP: #613381
+  * i915: return -EFAULT if copy_to_user fails
+    - LP: #663176
+  * i915_gem: return -EFAULT if copy_to_user fails
+    - LP: #663176
+  * drm/i915: Prevent double dpms on
+    - LP: #663176
+  * drm: Only decouple the old_fb from the crtc is we call mode_set*
+    - LP: #663176
+  * drm/radeon/kms: fix potential segfault in r600_ioctl_wait_idle
+    - LP: #663176
+  * drm/i915: Unset cursor if out-of-bounds upon mode change (v4)
+    - LP: #586325, #663176
+  * drm/i915: disable FBC when more than one pipe is active
+    - LP: #663176
+  * drm/radeon/kms: fix macbookpro connector quirk
+    - LP: #663176
+  * drm/nouveau: use ALIGN instead of open coding it
+    - LP: #663176
+  * drm/nouveau: Fix fbcon corruption with font width not divisible by 8
+    - LP: #663176
+  * drm/i915,agp/intel: Add second set of PCI-IDs for B43
+    - LP: #640214, #663176
+  * Linux 2.6.32.24+drm33.11
+    - LP: #663176
+
+  [ Ubuntu: 2.6.32-25.45 ]
+
+  * v4l: disable dangerous buggy compat function
+    - CVE-2010-2963
+  * Local privilege escalation vulnerability in RDS sockets
+    - CVE-2010-3904
+  * mm: (pre-stable) Move vma_stack_continue into mm.h
+    - LP: #646114
+  * net sched: fix some kernel memory leaks
+    - CVE-2010-2942
+  * irda: Correctly clean up self->ias_obj on irda_bind() failure.
+    - CVE-2010-2954
+  * wireless extensions: fix kernel heap content leak
+    - CVE-2010-2955
+  * KEYS: Fix RCU no-lock warning in keyctl_session_to_parent()
+    - CVE-2010-2960
+  * KEYS: Fix bug in keyctl_session_to_parent() if parent has no session
+    keyring
+    - CVE-2010-2960
+  * aio: check for multiplication overflow in do_io_submit
+    - CVE-2010-3067
+  * xfs: prevent reading uninitialized stack memory
+    - CVE-2010-3078
+  * ALSA: seq/oss - Fix double-free at error path of snd_seq_oss_open()
+    - CVE-2010-3080
+  * niu: Fix kernel buffer overflow for ETHTOOL_GRXCLSRLALL
+    - CVE-2010-3084
+  * rose: Fix signedness issues wrt. digi count.
+    - CVE-2010-3310
+  * sctp: Do not reset the packet during sctp_packet_config().
+    - CVE-2010-3432
+  * Fix pktcdvd ioctl dev_minor range check
+    - CVE-2010-3437
+  * ALSA: prevent heap corruption in snd_ctl_new()
+    - CVE-2010-3442
+  * net sched: fix kernel leak in act_police
+    - CVE-2010-3477
+  * Fix out-of-bounds reading in sctp_asoc_get_hmac()
+    - CVE-2010-3705
+  * ocfs2: Don't walk off the end of fast symlinks.
+    - CVE-2010-NNN2
+
+ -- Brad Figg <brad.figg@canonical.com>  Wed, 01 Dec 2010 10:41:52 -0800
+
+linux-mvl-dove (2.6.32-212.28) lucid-proposed; urgency=low
+
+  [ Eric Miao ]
+
+  * Sync config with LSP 5.3.6
+    - LP: #677498
+
+  [ Upstream Kernel Changes ]
+
+  * IDT clock: Clear all output in default
+  * idt clock: add sysfs files for accessing registers
+  * cs42l51 codec: provide back the set_bias_level
+  * Force return stack off
+  * bmm: export bmm alloc memory to kernel
+  * bmm: fix module reinset get physical address 0 issue
+  * bmm: support highmem
+  * fix potential bug in coverity report
+  * bmm: mutex replace spin_lock
+  * NAND: add support for Samsung 2G devices
+  * sdio: rework cis tuple parsing
+  * sdio: fix reference counting in sdio_remove_func()
+  * sdio: initialise SDIO functions and update card->sdio_funcs in lockstep
+  * mmc: allow for MMC v4.4
+  * sdio: add quirk to clamp byte mode transfer
+  * sdio: introduce API for special power management features
+  * sdio: don't use CMD[357] as part of a powered SDIO resume
+  * sdio: kick the interrupt thread upon a resume
+  * sdio: put active devices into 1-bit mode during suspend
+  * sdio: recognize io card without powercycle
+  * mmc: fix incorrect interpretation of card type bits
+  * mmc: sd: clean up redundant memset
+  * mmc: remove the "state" argument to mmc_suspend_host()
+  * sdio: add new function for RAW (Read after Write) operation
+  * mmc: fix all hangs related to mmc/sd card insert/removal during
+    suspend/resume
+  * mmc: build fix: mmc_pm_notify is only available with CONFIG_PM=y
+  * pmem: Add cache flush ioctl for pmem buffers
+  * dove: enable lcd0 by default
+  * Dove: detect 1GHz clocks
+  * Fix rt5611_ts touch screen driver to solve touch insenstive issue, that
+    occur in a special timing condition, driver will not be easy to sample
+    X or Y but Busy instead.
+  * remove rt5611_ts.c debug message
+  * update dove_android_defconfig based on dove_defconfig
+  * vmeta uio driver support multi-instance decoding
+  * update vmeta uio driver version to build-004
+  * vmeta uio driver add suspend unset control func
+  * update dove_android_defconfig
+  * usb gadget: Fix mismatch on commit
+    2c7c4829ac40fd18852a0c8bf0521a30a2ef2098 Author: Mike Lockwood
+    <lockwood@android.com> Date: Tue Dec 2 22:01:33 2008 -0500
+  * drivers: usb: gadget: Add helper function for installing ACM gadget
+    function.
+  * USB: gadget: android: android USB gadget improvements:
+  * drivers: usb: gadget: handle NULL descriptors in composite config_buf
+  * USB: composite: Fix USB WHQL Certification Issues
+  * USB: android gadget: mass storage: Fix format issue for Vista Host
+  * USB: composite: Add flag to usb_function to hide its interface during
+    enumeration
+  * USB: composite: Allow configurations to handle unhandled setup requests
+  * USB: gadget: android: android USB gadget improvements:
+  * USB: composite: Add class driver for enabling and disabling USB
+    functions.
+  * USB: gadget: Disable RNDIS function by default if
+    CONFIG_USB_ANDROID_RNDIS is set
+  * USB: composite: Compute interface numbers correctly when functions are
+    hidden.
+  * USB: gadget: android: Fix special case for RNDIS ethernet function
+  * Add USB_ANDROID_RNDIS_WCEIS option.
+  * USB: gadget: android: Disable UMS when RNDIS ethernet is active.
+  * USB: gadget: composite: Don't call set_alt() on functions that are
+    hidden.
+  * USB: gadget: composite: Don't increment interface number for alt
+    settings.
+  * USB: gadget: android: check for null _android_dev in
+    android_register_function()
+  * USB: gadget: composite: Add userspace notifications for USB state
+    changes
+  * USB: gadget: composite: Move switch_set_state calls to a work queue
+  * USB: composite: Add usb_composite_force_reset utility to force
+    enumeration
+  * dove android : support adb function
+  * dove: disable write coalescing
+
+ -- Eric Miao <eric.miao@canonical.com>  Wed, 10 Nov 2010 00:39:56 +0800
+
+linux-mvl-dove (2.6.32-211.27) lucid-proposed; urgency=low
+
+  [ Brad Figg ]
+
+  * Rebased to 2.6.32-25.44
+
+  [ Eric Miao ]
+
+  * Sync config with LSP 5.3.4
+    - LP: #633862
+
+  [ Upstream Kernel Changes ]
+
+  * idt: add platform data to set the clocks configuration
+  * dove: provide idt platform data to set the clock's configuration
+    - LP: #633862
+  * dove lcd: make lcd's clock setting via cmdline to be applicable for all
+    boards.
+    - LP: #633862
+  * sound: update the RT655 codec kcontrols
+    - LP: #633862
+  * dove: disable the KG2 display driver
+    - LP: #633862
+  * dovefb: add board option for disabling the edid polling
+    - LP: #633862
+  * Update new dummy EDID data to support more VESA standard timings.
+    - LP: #633862
+  * giga hal: set phy address to 1
+    - LP: #633862
+  * dove: tune pcei phy to pass electrical testing
+    - LP: #633862
+  * i2c-mv64xxx: fix I2C wait event timeout issue
+    - LP: #622214
+  * dove: enable USB gadget file storage testing option
+    - LP: #633862
+  * dove: support using gpio-i2c driver for the i2c bus of the VGA
+    - LP: #633862
+  * LCD dovefb: Support extension dummy EDID. 2. Add more video mode into
+    extension EDID.
+    - LP: #633862
+  * LCD dovefb: move the clock setting part in dovefb_gfx.c to clock.c
+    - LP: #633862
+  * LCD dovefb: refine configure ref clk and lcd internal divider flow and
+    give detailed comments.
+    - LP: #633862
+  * LCD dovefb: Refine data structure for reference clock selection
+    - LP: #633862
+  * LCD dovefb: Separate accurate and inaccurate mode clock by add a new
+    clk structure.
+    - LP: #633862
+  * 1. default set lcd0 uses ext refclk0 and lcd1 uses internal refclk. 2.
+    auto turn on accurate mode.
+    - LP: #633862
+  * Refine LCD refclk bootargs comments and update dove_defconfig.
+    - LP: #633862
+  * Refine the bootargs usage mechanism and update all board setup files.
+    - LP: #633862
+  * dove: update the LCD internal clock accurate mode setting
+    - LP: #633862
+  * sound: add Record Gain Capture Switch to the rt655 codec
+    - LP: #633862
+  * fix lcd backward compatibility for clk source selection
+    - LP: #633862
+  * Fix invalidate I$ all
+    - LP: #633862
+  * Add CPU errata 4574 and 4731 SWFIX
+    - LP: #633862
+  * Add missed isb and dsb
+    - LP: #633862
+  * Marvell CPU errata 4315 S/W FIX
+    - LP: #633862
+  * dove: enable CPU (PJ4) work arounds 4574,4731,4315
+    - LP: #633862
+  * Fix code logic of function, is_clksrc_pll()
+    - LP: #633862
+  * CS42l51 codec: unmute codec on system resume
+    - LP: #633862
+  * LCD dovefb: set edid data when edid paramete disabled.
+    - LP: #633862
+  * dove: use DOVE_PCIE0/1_IO_BUS_BASE for PCI bus addresses
+    - LP: #633862
+  * dove: provide phy address for old dove db boards
+    - LP: #633862
+  * sound orion i2s: clear pause, spdif and i2s mute fields on playback
+    - LP: #633862
+  * dove: sync dove_defconfig file with ac97 codec changes
+    - LP: #633862
+  * USB gadget: allow the USB_GADGET_VBUS_DRAW range to be 0
+  * dove: set the USB_GADGET_VBUS_DRAW to 0
+  * usb dove: update usb phy registers
+  * dove: use '-1' as initial value for the previously used I2C port ID
+    - LP: #618493
+  * mvl-dove: statically generate mv_hal_drivers makefiles
+    - LP: #572701
+  * dove-rd-avng: LCD0 should use extclk#1, and LCD1 uses internal refclk.
+    - LP: #643505
+  * dove-rd-avng: Add IDT support if chip is Dove A0 or above
+  * dove: fix mv hal pmu Makefile include paths
+    - LP: #572701
+  * cmd line partitions: use 64 bit variables to detect partitions/offsets
+    larger than 4G.
+  * USB dove: enable USB voltage fix in device mode
+  * v4l cafe_ccic: configure the sensor on resume when doing steaming
+  * cafe camera: fix data type of saturation field in the ov7670 sensor
+    driver
+  * ov7670: fix bug in resolving brightness value
+  * ov7670: tune QVGA paramters to eliminate green line on left side
+  * GC600: sync driver to commit 0badbab7e3f62df72a27bf8d8f1b04976ab1c299
+    - LP: #643505
+
+  [ Ubuntu: 2.6.32-25.44 ]
+
+  * SAUCE: (no-up) Modularize vesafb -- fix initialization
+    - LP: #611471
+  * Revert "SAUCE: sync before umount to reduce time taken by ext4 umount"
+    - LP: #543617, #585092
+  * Revert "SAUCE: tulip: Let dmfe handle davicom on non-sparc"
+    - LP: #607824
+  * [Config] Added ums-cypress to udeb
+    - LP: #576066
+  * Revert "PCI quirk: Disable MSI on VIA K8T890 systems"
+    - LP: #607824
+  * Revert "PCI quirks: disable msi on AMD rs4xx internal gfx bridges"
+    - LP: #607824
+  * Revert "(pre-stable) Input: psmouse - reset all types of mice before
+    reconnecting"
+    - LP: #607824
+  * Revert "jbd: jbd-debug and jbd2-debug should be writable"
+    - LP: #607824
+  * Revert "ext4: Make fsync sync new parent directories in no-journal
+    mode"
+    - LP: #615548
+  * Revert "ext4: Fix compat EXT4_IOC_ADD_GROUP"
+    - LP: #615548
+  * Revert "ext4: Conditionally define compat ioctl numbers"
+    - LP: #615548
+  * Revert "ext4: restart ext4_ext_remove_space() after transaction
+    restart"
+    - LP: #615548
+  * Revert "ext4: Clear the EXT4_EOFBLOCKS_FL flag only when warranted"
+    - LP: #615548
+  * Revert "ext4: Avoid crashing on NULL ptr dereference on a filesystem
+    error"
+    - LP: #615548
+  * Revert "ext4: Use bitops to read/modify i_flags in struct
+    ext4_inode_info"
+    - LP: #615548
+  * Revert "ext4: Show journal_checksum option"
+    - LP: #615548
+  * Revert "ext4: check for a good block group before loading buddy pages"
+    - LP: #615548
+  * Revert "ext4: Prevent creation of files larger than RLIMIT_FSIZE using
+    fallocate"
+    - LP: #615548
+  * Revert "ext4: Remove extraneous newlines in ext4_msg() calls"
+    - LP: #615548
+  * Revert "ext4: init statistics after journal recovery"
+    - LP: #615548
+  * Revert "ext4: clean up inode bitmaps manipulation in ext4_free_inode"
+    - LP: #615548
+  * Revert "ext4: Do not zero out uninitialized extents beyond i_size"
+    - LP: #615548
+  * Revert "ext4: don't scan/accumulate more pages than mballoc will
+    allocate"
+    - LP: #615548
+  * Revert "ext4: stop issuing discards if not supported by device"
+    - LP: #615548
+  * Revert "ext4: check s_log_groups_per_flex in online resize code"
+    - LP: #615548
+  * Revert "ext4: fix quota accounting in case of fallocate"
+    - LP: #615548
+  * Revert "ext4: allow defrag (EXT4_IOC_MOVE_EXT) in 32bit compat mode"
+    - LP: #615548
+  * Revert "ext4: rename ext4_mb_release_desc() to ext4_mb_unload_buddy()"
+    - LP: #615548
+  * Revert "ext4: Remove unnecessary call to ext4_get_group_desc() in
+    mballoc"
+    - LP: #615548
+  * Revert "ext4: fix memory leaks in error path handling of
+    ext4_ext_zeroout()"
+    - LP: #615548
+  * Revert "ext4: check missed return value in ext4_sync_file()"
+    - LP: #615548
+  * Revert "ext4: Issue the discard operation *before* releasing the blocks
+    to be reused"
+    - LP: #615548
+  * Revert "ext4: Fix buffer head leaks after calls to
+    ext4_get_inode_loc()"
+    - LP: #615548
+  * Revert "ext4: Fix possible lost inode write in no journal mode"
+    - LP: #615548
+  * Revert "ext4: Fixed inode allocator to correctly track a flex_bg's
+    used_dirs"
+    - LP: #615548
+  * Revert "ext4: Fix estimate of # of blocks needed to write
+    indirect-mapped files"
+    - LP: #615548
+  * Revert "ext4: Code cleanup for EXT4_IOC_MOVE_EXT ioctl"
+    - LP: #615548
+  * Revert "ext4: Fix the NULL reference in double_down_write_data_sem()"
+    - LP: #615548
+  * Revert "ext4: Fix insertion point of extent in
+    mext_insert_across_blocks()"
+    - LP: #615548
+  * Revert "ext4: make "offset" consistent in ext4_check_dir_entry()"
+    - LP: #615548
+  * Revert "ext4: Handle non empty on-disk orphan link"
+    - LP: #615548
+  * Revert "ext4: explicitly remove inode from orphan list after failed
+    direct io"
+    - LP: #615548
+  * Revert "ext4: fix error handling in migrate"
+    - LP: #615548
+  * Revert "ext4: Fix fencepost error in chosing choosing group vs file
+    preallocation."
+    - LP: #615548
+  * Revert "ext4: Add flag to files with blocks intentionally past EOF"
+    - LP: #615548
+  * Revert "ext4: Fix BUG_ON at fs/buffer.c:652 in no journal mode"
+    - LP: #615548
+  * Revert "ext4: Use bitops to read/modify EXT4_I(inode)->i_state"
+    - LP: #615548
+  * Revert "ext4: Drop EXT4_GET_BLOCKS_UPDATE_RESERVE_SPACE flag"
+    - LP: #615548
+  * Revert "ext4: Fix quota accounting error with fallocate"
+    - LP: #615548
+  * Revert "ext4: Handle -EDQUOT error on write"
+    - LP: #615548
+  * Revert "ext4: Calculate metadata requirements more accurately"
+    - LP: #615548
+  * Revert "ext4: Fix accounting of reserved metadata blocks"
+    - LP: #615548
+  * Revert "ext4: Patch up how we claim metadata blocks for quota purposes"
+    - LP: #615548
+  * Revert "ext4: Ensure zeroout blocks have no dirty metadata"
+    - LP: #615548
+  * Revert "ext4: return correct wbc.nr_to_write in ext4_da_writepages"
+    - LP: #615548
+  * Revert "ext4: Eliminate potential double free on error path"
+    - LP: #615548
+  * Revert "ext4, jbd2: Add barriers for file systems with exernal
+    journals"
+    - LP: #615548
+  * Revert "ext4: replace BUG() with return -EIO in ext4_ext_get_blocks"
+    - LP: #615548
+  * Revert "ext4: Fix potential quota deadlock"
+    - LP: #615548
+  * Revert "ext4: don't return to userspace after freezing the fs with a
+    mutex held"
+    - LP: #615548
+  * ixgbe: Fix return of invalid txq
+    - LP: #607824
+  * oprofile/x86: fix uninitialized counter usage during cpu hotplug
+    - LP: #607824
+  * oprofile: remove double ring buffering
+    - LP: #607824
+  * cpumask: fix compat getaffinity
+    - LP: #607824
+  * NFSD: don't report compiled-out versions as present
+    - LP: #607824
+  * sata_nv: use ata_pci_sff_activate_host() instead of ata_host_activate()
+    - LP: #607824
+  * ARCNET: Limit com20020 PCI ID matches for SOHARD cards
+    - LP: #607824
+  * rtl8180: fix tx status reporting
+    - LP: #607824
+  * Staging: add Add Sitecom WL-349 to rtl8192su
+    - LP: #607824
+  * staging: vt6655: Fix kernel BUG on driver wpa initialization
+    - LP: #607824
+  * Fix racy use of anon_inode_getfd() in perf_event.c
+    - LP: #607824
+  * posix_timer: Fix error path in timer_create
+    - LP: #607824
+  * libata: disable ATAPI AN by default
+    - LP: #607824
+  * libata: don't flush dcache on slab pages
+    - LP: #607824
+  * mutex: Fix optimistic spinning vs. BKL
+    - LP: #607824
+  * ALSA: hda: Fix model quirk for Dell M1730
+    - LP: #576160, #607824
+  * ALSA: hda: Use LPIB for Toshiba A100-259
+    - LP: #549560, #607824
+  * ALSA: hda: Use LPIB for Acer Aspire 5110
+    - LP: #583983, #607824
+  * ALSA: hda: Use LPIB for Sony VPCS11V9E
+    - LP: #586347, #607824
+  * ALSA: hda: Use LPIB for a Shuttle device
+    - LP: #551949, #607824
+  * ACPI: video: fix acpi_backlight=video
+    - LP: #573120, #607824
+  * V4L/DVB: gspca - stv06xx: Remove the 046d:08da from the stv06xx driver
+    - LP: #607824
+  * HID: Add the GYR4101US USB ID to hid-gyration
+    - LP: #607824
+  * ar9170usb: add a couple more USB IDs
+    - LP: #607824
+  * ar9170usb: fix panic triggered by undersized rxstream buffer
+    - LP: #607824
+  * USB: visor: fix memory leak
+    - LP: #607824
+  * USB: CP210x New Device IDs 11 New device IDs
+    - LP: #607824
+  * USB: kobil: fix memory leak
+    - LP: #607824
+  * USB: option: add PID for ZTE product
+    - LP: #607824
+  * USB: option.c: Add Pirelli VID/PID and indicate Pirelli's modem
+    interface is 0xff
+    - LP: #607824
+  * USB: serial: option: add cinterion device id
+    - LP: #607824
+  * USB: option.c: OLIVETTI OLICARD100 support
+    - LP: #607824
+  * USB: ir-usb: fix double free
+    - LP: #607824
+  * USB: kl5usb105: fix memory leak
+    - LP: #607824
+  * USB: mxc: gadget: Fix bitfield for calculating maximum packet size
+    - LP: #607824
+  * USB: unusual-dev: Add bad sense flag for Appotech ax203 based picture
+    frames
+    - LP: #607824
+  * USB: EHCI: clear PHCD before resuming
+    - LP: #607824
+  * USB: xhci: Fix issue with set interface after stall.
+    - LP: #607824
+  * USB: xhci: Fix check for room on the ring.
+    - LP: #607824
+  * USB: xHCI: Fix wrong usage of macro TRB_TYPE
+    - LP: #607824
+  * mac80211: give warning if building w/out rate ctrl algorithm
+    - LP: #607824
+  * mac80211: Fix robust management frame handling (MFP)
+    - LP: #607824
+  * mac80211: fix rts threshold check
+    - LP: #607824
+  * drivers/base/cpu.c: fix the output from /sys/devices/system/cpu/offline
+    - LP: #607824
+  * can: Fix SJA1000 command register writes on SMP systems
+    - LP: #607824
+  * PCI quirk: Disable MSI on VIA K8T890 systems
+    - LP: #607824
+  * PCI quirks: disable msi on AMD rs4xx internal gfx bridges
+    - LP: #607824
+  * PCI: Disable MSI for MCP55 on P5N32-E SLI
+    - LP: #607824
+  * virtio_net: Make delayed refill more reliable
+    - LP: #607824
+  * mm: hugetlb: fix clear_huge_page()
+    - LP: #607824
+  * powerpc: Fix handling of strncmp with zero len
+    - LP: #607824
+  * powerpc/pseries: Only call start-cpu when a CPU is stopped
+    - LP: #607824
+  * powerpc/pseries: Make query_cpu_stopped callable outside hotplug cpu
+    - LP: #607824
+  * powerpc/oprofile: fix potential buffer overrun in op_model_cell.c
+    - LP: #607824
+  * writeback: disable periodic old data writeback for
+    !dirty_writeback_centisecs
+    - LP: #607824
+  * md/raid1: fix counting of write targets.
+    - LP: #607824
+  * md: Fix read balancing in RAID1 and RAID10 on drives > 2TB
+    - LP: #607824
+  * md: set mddev readonly flag on blkdev BLKROSET ioctl
+    - LP: #607824
+  * x86/amd-iommu: Fix suspend/resume with IOMMU
+    - LP: #607824
+  * exofs: confusion between kmap() and kmap_atomic() api
+    - LP: #607824
+  * mn10300: set ARCH_KMALLOC_MINALIGN
+    - LP: #607824
+  * m68k: set ARCH_KMALLOC_MINALIGN
+    - LP: #607824
+  * rtc-cmos: do dev_set_drvdata() earlier in the initialization
+    - LP: #607824
+  * rtc: s3c: initialize driver data before using it
+    - LP: #607824
+  * frv: set ARCH_KMALLOC_MINALIGN
+    - LP: #607824
+  * xtensa: set ARCH_KMALLOC_MINALIGN
+    - LP: #607824
+  * Blackfin: set ARCH_KMALLOC_MINALIGN
+    - LP: #607824
+  * tmpfs: insert tmpfs cache pages to inactive list at first
+    - LP: #607824
+  * mlx4_core: Fix possible chunk sg list overflow in mlx4_alloc_icm()
+    - LP: #607824
+  * ARM: 6166/1: Proper prefetch abort handling on pre-ARMv6
+    - LP: #607824
+  * ARM: 6164/1: Add kto and kfrom to input operands list.
+    - LP: #607824
+  * ARM: 6146/1: sa1111: Prevent deadlock in resume path
+    - LP: #607824
+  * ARM: 6144/1: TCM memory bug freeing bug
+    - LP: #607824
+  * ARM: VFP: Fix vfp_put_double() for d16-d31
+    - LP: #607824
+  * ASoC: Fix dB scales for WM835x
+    - LP: #607824
+  * ASoC: Fix dB scales for WM8400
+    - LP: #607824
+  * ASoC: Fix dB scales for WM8990
+    - LP: #607824
+  * hwmon: (ltc4245) Read only one GPIO pin
+    - LP: #607824
+  * signals: check_kill_permission(): don't check creds if
+    same_thread_group()
+    - LP: #607824
+  * do_generic_file_read: clear page errors when issuing a fresh read of
+    the page
+    - LP: #607824
+  * ipmi: handle run_to_completion properly in deliver_recv_msg()
+    - LP: #607824
+  * x86, setup: Phoenix BIOS fixup is needed on Dell Inspiron Mini 1012
+    - LP: #607824
+  * xen: ensure timer tick is resumed even on CPU driving the resume
+    - LP: #607824
+  * xen: avoid allocation causing potential swap activity on the resume
+    path
+    - LP: #607824
+  * ALSA: hda: Use LPIB for an ASUS device
+    - LP: #465942, #607824
+  * ALSA: hda: Use mb31 quirk for an iMac model
+    - LP: #542550, #607824
+  * ALSA: hda: Use LPIB for another mainboard
+    - LP: #580749, #607824
+  * ALSA: hda: Use LPIB for ASUS M2V
+    - LP: #587546, #607824
+  * Staging: comedi - correct parameter gainlkup for DAQCard-6024E in
+    driver ni_mio_cs.c
+    - LP: #607824
+  * clocksource: sh_cmt: compute mult and shift before registration
+    - LP: #607824
+  * ath5k: retain promiscuous setting
+    - LP: #607824
+  * ahci: add pci quirk for JMB362
+    - LP: #607824
+  * firewire: core: check for 1394a compliant IRM, fix inaccessibility of
+    Sony camcorder
+    - LP: #607824
+  * perf_events: Fix resource leak in x86 __hw_perf_event_init()
+    - LP: #607824
+  * sata_nv: don't diddle with nIEN on mcp55
+    - LP: #607824
+  * sata_via: magic vt6421 fix for transmission problems w/ WD drives
+    - LP: #422994, #607824
+  * USB: mos7840: fix null-pointer dereference
+    - LP: #607824
+  * USB: xhci: Wait for host to start running.
+    - LP: #607824
+  * USB: xhci: Wait for controller to be ready after reset.
+    - LP: #607824
+  * USB: ftdi_sio: fix DTR/RTS line modes
+    - LP: #607824
+  * USB: cdc-acm: fix resource reclaim in error path of acm_probe
+    - LP: #607824
+  * p54usb: Add device ID for Dell WLA3310 USB
+    - LP: #607824
+  * atl1e: Allow TX checksum offload and TSO to be disabled and reenabled
+    - LP: #607824
+  * via-velocity: Give RX descriptors to the NIC later on open or MTU
+    change
+    - LP: #607824
+  * dmfe/tulip: Let dmfe handle DM910x except for SPARC on-board chips
+    - LP: #607824
+  * Documentation/3c509: document ethtool support
+    - LP: #607824
+  * wireless: report reasonable bitrate for MCS rates through wext
+    - LP: #607824
+  * ath9k: add support for 802.11n bonded out AR2427
+    - LP: #607824
+  * wrong type for 'magic' argument in simple_fill_super()
+    - LP: #607824
+  * iwlwifi: check for aggregation frame and queue
+    - LP: #607824
+  * iwlwifi: recalculate average tpt if not current
+    - LP: #607824
+  * iwlwifi: update supported PCI_ID list for 5xx0 series
+    - LP: #607824
+  * wl1251: fix a memory leak in probe
+    - LP: #607824
+  * vfs: add NOFOLLOW flag to umount(2)
+    - LP: #607824
+  * l2tp: Fix oops in pppol2tp_xmit
+    - LP: #607824
+  * ucc_geth: Fix empty TX queue processing
+    - LP: #607824
+  * ucc_geth: Fix netdev watchdog triggering on link changes
+    - LP: #607824
+  * ucc_geth: Fix full TX queue processing
+    - LP: #607824
+  * Input: psmouse - reset all types of mice before reconnecting
+    - LP: #607824
+  * KVM: s390: Fix possible memory leak of in kvm_arch_vcpu_create()
+    - LP: #607824
+  * KVM: PPC: Do not create debugfs if fail to create vcpu
+    - LP: #607824
+  * x86, paravirt: Add a global synchronization point for pvclock
+    - LP: #607824
+  * KVM: Don't allow lmsw to clear cr0.pe
+    - LP: #607824
+  * KVM: x86: Check LMA bit before set_efer
+    - LP: #607824
+  * KVM: MMU: Segregate shadow pages with different cr0.wp
+    - LP: #607824
+  * KVM: VMX: enable VMXON check with SMX enabled (Intel TXT)
+    - LP: #607824
+  * KVM: MMU: Don't read pdptrs with mmu spinlock held in mmu_alloc_roots
+    - LP: #607824
+  * KVM: Fix wallclock version writing race
+    - LP: #607824
+  * KVM: x86: Add missing locking to arch specific vcpu ioctls
+    - LP: #607824
+  * KVM: x86: Inject #GP with the right rip on efer writes
+    - LP: #607824
+  * jbd: jbd-debug and jbd2-debug should be writable
+    - LP: #607824
+  * parisc: clear floating point exception flag on SIGFPE signal
+    - LP: #607824
+  * dm snapshot: simplify sector_to_chunk expression
+    - LP: #607824
+  * KEYS: Return more accurate error codes
+    - LP: #607824
+  * qla2xxx: Disable MSI on qla24xx chips other than QLA2432.
+    - LP: #607824
+  * Linux 2.6.32.16
+    - LP: #607824
+  * drm/i915: Fix 82854 PCI ID, and treat it like other 85X
+    - LP: #607824
+  * drm/i915: Reject bind_to_gtt() early if object > aperture
+    - LP: #607824
+  * drm/edid: Fix 1024x768@85Hz
+    - LP: #607824
+  * drm/radeon/kms: reset ddc_bus in object header parsing
+    - LP: #607824
+  * drm/radeon/kms/atom: fix typo in LVDS panel info parsing
+    - LP: #607824
+  * drm/radeon: r100/r200 ums: block ability for userspace app to trash 0
+    page and beyond
+    - LP: #607824
+  * drm/radeon: fix the r100/r200 ums block 0 page fix
+    - LP: #607824
+  * drm/i915: Rebind bo if currently bound with incorrect alignment.
+    - LP: #607824
+  * Linux 2.6.32.16+drm33.6
+    - LP: #607824
+  * virtio-pci: disable msi at startup
+    - LP: #615548
+  * hwmon: (k8temp) Bypass core swapping on single-core processors
+    - LP: #615548
+  * hwmon: (k8temp) Fix temperature reporting for ASB1 processor revisions
+    - LP: #615548
+  * hwmon: (coretemp) Properly label the sensors
+    - LP: #615548
+  * hwmon: (coretemp) Skip duplicate CPU entries
+    - LP: #615548
+  * hwmon: (it87) Fix in7 on IT8720F
+    - LP: #615548
+  * cifs: remove bogus first_time check in NTLMv2 session setup code
+    - LP: #615548
+  * cifs: don't attempt busy-file rename unless it's in same directory
+    - LP: #615548
+  * CIFS: Fix a malicious redirect problem in the DNS lookup code
+    - LP: #615548
+  * ALSA: hda - Add Macbook 5,2 quirk
+    - LP: #463178, #615548
+  * cpmac: do not leak struct net_device on phy_connect errors
+    - LP: #615548
+  * sky2: enable rx/tx in sky2_phy_reinit()
+    - LP: #615548
+  * sparc: Fix use of uid16_t and gid16_t in asm/stat.h
+    - LP: #615548
+  * math-emu: correct test for downshifting fraction in _FP_FROM_INT()
+    - LP: #615548
+  * NFSv4: Fix an embarassing typo in encode_attrs()
+    - LP: #615548
+  * NFSv4: Ensure that /proc/self/mountinfo displays the minor version
+    number
+    - LP: #615548
+  * SUNRPC: Fix a re-entrancy bug in xs_tcp_read_calldir()
+    - LP: #615548
+  * ath5k: drop warning on jumbo frames
+    - LP: #615548
+  * ath9k: re-enable ps by default for new single chip families
+    - LP: #615548
+  * ath9k: Avoid corrupt frames being forwarded to mac80211.
+    - LP: #615548
+  * hostap: Protect against initialization interrupt
+    - LP: #615548
+  * TPM: ReadPubEK output struct fix
+    - LP: #615548
+  * fb: fix colliding defines for fb flags.
+    - LP: #615548
+  * iwlwifi: cancel scan watchdog in iwl_bg_abort_scan
+    - LP: #615548
+  * mac80211: do not wip out old supported rates
+    - LP: #615548
+  * mac80211: Handle mesh action frames in ieee80211_rx_h_action
+    - LP: #615548
+  * Btrfs: fix checks in BTRFS_IOC_CLONE_RANGE
+    - LP: #615548
+  * p54pci: add Symbol AP-300 minipci adapters pciid
+    - LP: #615548
+  * dynamic debug: move ddebug_remove_module() down into free_module()
+    - LP: #615548
+  * tpm_tis: fix subsequent suspend failures
+    - LP: #615548
+  * ipvs: Add missing locking during connection table hashing and unhashing
+    - LP: #615548
+  * netfilter: ip6t_REJECT: fix a dst leak in ipv6 REJECT
+    - LP: #615548
+  * SCSI: aacraid: Eliminate use after free
+    - LP: #615548
+  * amd64-agp: Probe unknown AGP devices the right way
+    - LP: #615548
+  * perf: Resurrect flat callchains
+    - LP: #615548
+  * x86: Fix vsyscall on gcc 4.5 with -Os
+    - LP: #615548
+  * x86, Calgary: Increase max PHB number
+    - LP: #615548
+  * x86, Calgary: Limit the max PHB number to 256
+    - LP: #615548
+  * sched: Prevent compiler from optimising the sched_avg_update() loop
+    - LP: #615548
+  * sched: Fix over-scheduling bug
+    - LP: #615548
+  * genirq: Deal with desc->set_type() changing desc->chip
+    - LP: #615548
+  * serial: cpm_uart: implement the cpm_uart_early_write() function for
+    console poll
+    - LP: #615548
+  * cmd640: fix kernel oops in test_irq() method
+    - LP: #615548
+  * ide: Fix IDE taskfile with cfq scheduler
+    - LP: #615548
+  * net/core: neighbour update Oops
+    - LP: #615548
+  * tcp: fix crash in tcp_xmit_retransmit_queue
+    - LP: #615548
+  * rtc: fix ds1388 time corruption
+    - LP: #615548
+  * ethtool: Fix potential kernel buffer overflow in ETHTOOL_GRXCLSRLALL
+    - LP: #615548
+  * sdhci-s3c: add missing remove function
+    - LP: #615548
+  * ASoC: Remove duplicate AUX definition from WM8776
+    - LP: #615548
+  * x86: Fix x2apic preenabled system with kexec
+    - LP: #615548
+  * IPoIB: Fix world-writable child interface control sysfs attributes
+    - LP: #615548
+  * Input: i8042 - add Gigabyte Spring Peak to dmi_noloop_table
+    - LP: #580664, #615548
+  * Input: twl40300-keypad - fix handling of "all ground" rows
+    - LP: #615548
+  * ARM: 6201/1: RealView: Do not use outer_sync() on ARM11MPCore boards
+    with L220
+    - LP: #615548
+  * ARM: 6226/1: fix kprobe bug in ldr instruction emulation
+    - LP: #615548
+  * x86: Do not try to disable hpet if it hasn't been initialized before
+    - LP: #615548
+  * staging: rtl8192su: add USB VID/PID for HWNUm-300
+    - LP: #615548
+  * Staging: rtl8192su: add USB ID for 0bda:8171
+    - LP: #615548
+  * USB: obey the sysfs power/wakeup setting
+    - LP: #615548
+  * USB: g_serial: don't set low_latency flag
+    - LP: #615548
+  * USB: g_serial: fix tty cleanup on unload
+    - LP: #615548
+  * USB: option: add support for 1da5:4518
+    - LP: #615548
+  * USB: Add PID for Sierra 250U to drivers/usb/serial/sierra.c
+    - LP: #599569, #615548
+  * USB: ftdi_sio: support for Signalyzer tools based on FTDI chips
+    - LP: #615548
+  * USB: option: Add support for AMOI Skypephone S2
+    - LP: #615548
+  * USB: adds Artisman USB dongle to list of quirky devices
+    - LP: #615548
+  * USB: sisusbvga: Fix for USB 3.0
+    - LP: #615548
+  * USB: add quirk for Broadcom BT dongle
+    - LP: #615548
+  * USB: FTDI: Add support for the RT System VX-7 radio programming cable
+    - LP: #615548
+  * ethtool: Fix potential user buffer overflow for ETHTOOL_{G, S}RXFH
+    - LP: #615548
+  * ext4: Fix potential quota deadlock
+    - LP: #615548
+  * ext4: replace BUG() with return -EIO in ext4_ext_get_blocks
+    - LP: #615548
+  * ext4, jbd2: Add barriers for file systems with exernal journals
+    - LP: #615548
+  * ext4: Eliminate potential double free on error path
+    - LP: #615548
+  * ext4: return correct wbc.nr_to_write in ext4_da_writepages
+    - LP: #615548
+  * ext4: Ensure zeroout blocks have no dirty metadata
+    - LP: #615548
+  * ext4: Patch up how we claim metadata blocks for quota purposes
+    - LP: #615548
+  * ext4: Fix accounting of reserved metadata blocks
+    - LP: #615548
+  * ext4: Calculate metadata requirements more accurately
+    - LP: #615548
+  * ext4: Handle -EDQUOT error on write
+    - LP: #615548
+  * ext4: Fix quota accounting error with fallocate
+    - LP: #615548
+  * ext4: Drop EXT4_GET_BLOCKS_UPDATE_RESERVE_SPACE flag
+    - LP: #615548
+  * ext4: Use bitops to read/modify EXT4_I(inode)->i_state
+    - LP: #615548
+  * ext4: Fix BUG_ON at fs/buffer.c:652 in no journal mode
+    - LP: #615548
+  * ext4: Add flag to files with blocks intentionally past EOF
+    - LP: #615548
+  * ext4: Fix fencepost error in chosing choosing group vs file
+    preallocation.
+    - LP: #615548
+  * ext4: fix error handling in migrate
+    - LP: #615548
+  * ext4: explicitly remove inode from orphan list after failed direct io
+    - LP: #615548
+  * ext4: Handle non empty on-disk orphan link
+    - LP: #615548
+  * ext4: make "offset" consistent in ext4_check_dir_entry()
+    - LP: #615548
+  * ext4: Fix insertion point of extent in mext_insert_across_blocks()
+    - LP: #615548
+  * ext4: Fix the NULL reference in double_down_write_data_sem()
+    - LP: #615548
+  * ext4: Code cleanup for EXT4_IOC_MOVE_EXT ioctl
+    - LP: #615548
+  * ext4: Fix estimate of # of blocks needed to write indirect-mapped files
+    - LP: #615548
+  * ext4: Fixed inode allocator to correctly track a flex_bg's used_dirs
+    - LP: #615548
+  * ext4: Fix possible lost inode write in no journal mode
+    - LP: #615548
+  * ext4: Fix buffer head leaks after calls to ext4_get_inode_loc()
+    - LP: #615548
+  * ext4: Issue the discard operation *before* releasing the blocks to be
+    reused
+    - LP: #615548
+  * ext4: check missed return value in ext4_sync_file()
+    - LP: #615548
+  * ext4: fix memory leaks in error path handling of ext4_ext_zeroout()
+    - LP: #615548
+  * ext4: Remove unnecessary call to ext4_get_group_desc() in mballoc
+    - LP: #615548
+  * ext4: rename ext4_mb_release_desc() to ext4_mb_unload_buddy()
+    - LP: #615548
+  * ext4: allow defrag (EXT4_IOC_MOVE_EXT) in 32bit compat mode
+    - LP: #615548
+  * ext4: fix quota accounting in case of fallocate
+    - LP: #615548
+  * ext4: check s_log_groups_per_flex in online resize code
+    - LP: #615548
+  * ext4: don't return to userspace after freezing the fs with a mutex held
+    - LP: #615548
+  * ext4: stop issuing discards if not supported by device
+    - LP: #615548
+  * ext4: don't scan/accumulate more pages than mballoc will allocate
+    - LP: #615548
+  * ext4: Do not zero out uninitialized extents beyond i_size
+    - LP: #615548
+  * ext4: clean up inode bitmaps manipulation in ext4_free_inode
+    - LP: #615548
+  * ext4: init statistics after journal recovery
+    - LP: #615548
+  * ext4: Remove extraneous newlines in ext4_msg() calls
+    - LP: #615548
+  * ext4: Prevent creation of files larger than RLIMIT_FSIZE using
+    fallocate
+    - LP: #615548
+  * ext4: check for a good block group before loading buddy pages
+    - LP: #615548
+  * ext4: Show journal_checksum option
+    - LP: #615548
+  * ext4: Use bitops to read/modify i_flags in struct ext4_inode_info
+    - LP: #615548
+  * ext4: Avoid crashing on NULL ptr dereference on a filesystem error
+    - LP: #615548
+  * ext4: Clear the EXT4_EOFBLOCKS_FL flag only when warranted
+    - LP: #615548
+  * ext4: restart ext4_ext_remove_space() after transaction restart
+    - LP: #615548
+  * ext4: Conditionally define compat ioctl numbers
+    - LP: #615548
+  * ext4: Fix compat EXT4_IOC_ADD_GROUP
+    - LP: #615548
+  * ext4: Make fsync sync new parent directories in no-journal mode
+    - LP: #615548
+  * KVM: MMU: Remove user access when allowing kernel access to gpte.w=0
+    page
+    - LP: #615548
+  * KVM: SVM: Handle MCEs early in the vmexit process
+    - LP: #615548
+  * KVM: SVM: Implement workaround for Erratum 383
+    - LP: #615548
+  * KVM: MMU: invalidate and flush on spte small->large page size change
+    - LP: #615548
+  * futex: futex_find_get_task remove credentails check
+    - LP: #615548
+  * GFS2: Fix up system xattrs
+    - LP: #615548
+  * PM / x86: Save/restore MISC_ENABLE register
+    - LP: #615548
+  * ACPI: skip checking BM_STS if the BIOS doesn't ask for it
+    - LP: #615548
+  * ACPI: Unconditionally set SCI_EN on resume
+    - LP: #615548
+  * libertas/sdio: 8686: set ECSI bit for 1-bit transfers
+    - LP: #615548
+  * dm9000: fix "BUG: spinlock recursion"
+    - LP: #615548
+  * firmware_class: fix memory leak - free allocated pages
+    - LP: #615548
+  * revert "[CPUFREQ] remove rwsem lock from CPUFREQ_GOV_STOP call (second
+    call site)"
+    - LP: #615548
+  * ALSA: Echoaudio, fix Guru Meditation #00000005.48454C50
+    - LP: #615548
+  * V4L/DVB: dvb-core: Fix ULE decapsulation bug
+    - LP: #615548
+  * V4L/DVB: FusionHDTV: Use quick reads for I2C IR device probing
+    - LP: #615548
+  * forcedeth: fix tx limit2 flag check
+    - LP: #615548
+  * staging: rtl8192su: add Support for Belkin F5D8053 v6
+    - LP: #615548
+  * MIPS FPU emulator: allow Cause bits of FCSR to be writeable by ctc1
+    - LP: #615548
+  * V4L/DVB: budget: Select correct frontends
+    - LP: #615548
+  * cxgb3: fix linkup issue
+    - LP: #615548
+  * mac80211: fix supported rates IE if AP doesn't give us it's rates
+    - LP: #615548
+  * V4L/DVB: uvcvideo: Add support for unbranded Arkmicro 18ec:3290 webcams
+    - LP: #615548
+  * V4L/DVB: uvcvideo: Add support for Packard Bell EasyNote MX52
+    integrated webcam
+    - LP: #615548
+  * V4L/DVB: uvcvideo: Add support for V4L2_PIX_FMT_Y16
+    - LP: #615548
+  * iwlagn: verify flow id in compressed BA packet
+    - LP: #615548
+  * kbuild: Fix modpost segfault
+    - LP: #615548
+  * eeepc-laptop: check wireless hotplug events
+    - LP: #615548
+  * Fix spinaphore down_spin()
+    - LP: #615548
+  * ath5k: initialize ah->ah_current_channel
+    - LP: #615548
+  * Input: RX51 keymap - fix recent compile breakage
+    - LP: #615548
+  * V4L/DVB (13830): uvcvideo: add another YUYV format GUID for iSight
+    cameras
+    - LP: #615548
+  * Linux 2.6.32.17
+    - LP: #615548
+  * drm/i915: fix hibernation since i915 self-reclaim fixes
+    - LP: #615548
+  * drm/i915: add 'reclaimable' to i915 self-reclaimable page allocations
+    - LP: #615548
+  * i915: fix lock imbalance on error path...
+    - LP: #615548
+  * drm/i915: Define MI_ARB_STATE bits
+    - LP: #615548
+  * drm/i915: enable low power render writes on GEN3 hardware.
+    - LP: #615548
+  * drm/i915: Make G4X-style PLL search more permissive
+    - LP: #615548
+  * drm/radeon/r200: handle more hw tex coord types
+    - LP: #615548
+  * drm/radeon/r100/r200: fix calculation of compressed cube maps
+    - LP: #615548
+  * drm/radeon/kms: CS checker texture fixes for r1xx/r2xx/r3xx
+    - LP: #615548
+  * drm/radeon/kms: fix shared ddc handling
+    - LP: #615548
+  * drm/radeon/kms: fix shared ddc harder
+    - LP: #615548
+  * drm/radeon/kms: add quirk for ASUS HD 3600 board
+    - LP: #615548
+  * drm/radeon/kms: fix possible mis-detection of sideport on rs690/rs740
+    - LP: #615548
+  * drm/radeon/kms: fix legacy LVDS dpms sequence
+    - LP: #615548
+  * drm/radeon/kms: fix legacy tv-out pal mode
+    - LP: #615548
+  * Linux 2.6.32.17+drm33.7
+    - LP: #615548
+  * (pre-stable) writeback: remove the always false
+    bdi_cap_writeback_dirty() test
+    - LP: #543617, #585092
+  * (pre-stable) writeback: remove unused nonblocking and congestion checks
+    - LP: #543617, #585092
+  * (pre-stable) vfs: improve writeback_inodes_wb()
+    - LP: #543617, #585092
+  * (pre-stable) writeback: add missing kernel-doc notation
+    - LP: #543617, #585092
+  * (pre-stable) writeback: fix writeback completion notifications
+    - LP: #543617, #585092
+  * (pre-stable) writeback: queue work on stack in writeback_inodes_sb
+    - LP: #543617, #585092
+  * (pre-stable) writeback: enforce s_umount locking in writeback_inodes_sb
+    - LP: #543617, #585092
+  * (pre-stable) writeback: fix writeback_inodes_wb from
+    writeback_inodes_sb
+    - LP: #543617, #585092
+  * (pre-stable) writeback: simplify wakeup_flusher_threads
+    - LP: #543617, #585092
+  * (pre-stable) writeback: simplify and split bdi_start_writeback
+    - LP: #543617, #585092
+  * (pre-stable) writeback: add missing requeue_io in writeback_inodes_wb
+    - LP: #543617, #585092
+  * (pre-stable) writeback: fix pin_sb_for_writeback
+    - LP: #543617, #585092
+  * (pre-stable) writeback: remove writeback_inodes_wbc
+    - LP: #543617, #585092
+  * (pre-stable) writeback: split writeback_inodes_wb
+    - LP: #543617, #585092
+  * (pre-stable) writeback: simplify the write back thread queue
+    - LP: #543617, #585092
+  * (pre-stable) Fix compiling NFS when backporting writeback
+    - LP: #543617, #585092
+  * sched: cgroup: Implement different treatment for idle shares
+    - LP: #620755
+  * mm: fix ia64 crash when gcore reads gate area
+    - LP: #620755
+  * acl trouble after upgrading ubuntu
+    - LP: #620755
+  * comedi: Uncripple 8255-based DIO subdevices
+    - LP: #620755
+  * NFS: kswapd must not block in nfs_release_page
+    - LP: #620755
+  * PARISC: led.c - fix potential stack overflow in led_proc_write()
+    - LP: #620755
+  * arm/imx/gpio: add spinlock protection
+    - LP: #620755
+  * parisc: pass through '\t' to early (iodc) console
+    - LP: #620755
+  * amd64_edac: Fix DCT base address selector
+    - LP: #620755
+  * amd64_edac: Correct scrub rate setting
+    - LP: #620755
+  * e1000e: don't inadvertently re-set INTX_DISABLE
+    - LP: #620755
+  * e1000e: 82577/82578 PHY register access issues
+    - LP: #620755
+  * 9p: strlen() doesn't count the terminator
+    - LP: #620755
+  * ath9k: enable serialize_regmode for non-PCIE AR9160
+    - LP: #620755
+  * ath9k_hw: fix an off-by-one error in the PDADC boundaries calculation
+    - LP: #620755
+  * ath9k: fix TSF after reset on AR913x
+    - LP: #620755
+  * ath9k: fix yet another buffer leak in the tx aggregation code
+    - LP: #620755
+  * iwlwifi: fix scan abort
+    - LP: #620755
+  * cfg80211: ignore spurious deauth
+    - LP: #620755
+  * cfg80211: don't get expired BSSes
+    - LP: #620755
+  * xfs: prevent swapext from operating on write-only files
+    - LP: #620755
+  * SCSI: enclosure: fix error path - actually return ERR_PTR() on error
+    - LP: #620755
+  * GFS2: rename causes kernel Oops
+    - LP: #620755
+  * slow-work: use get_ref wrapper instead of directly calling get_ref
+    - LP: #620755
+  * CIFS: Remove __exit mark from cifs_exit_dns_resolver()
+    - LP: #620755
+  * CIFS: Fix compile error with __init in cifs_init_dns_resolver()
+    definition
+    - LP: #620755
+  * xen: drop xen_sched_clock in favour of using plain wallclock time
+    - LP: #620755
+  * ssb: do not read SPROM if it does not exist
+    - LP: #620755
+  * ssb: Look for SPROM at different offset on higher rev CC
+    - LP: #620755
+  * ssb: fix NULL ptr deref when pcihost_wrapper is used
+    - LP: #620755
+  * ssb: Handle alternate SSPROM location
+    - LP: #620755
+  * Linux 2.6.32.18
+    - LP: #620755
+  * ata_piix: fix locking around SIDPR access
+    - LP: #622877
+  * powerpc: fix build with make 3.82
+    - LP: #622877
+  * nvram: Fix write beyond end condition; prove to gcc copy is safe
+    - LP: #622877
+  * x86: Add memory modify constraints to xchg() and cmpxchg()
+    - LP: #622877
+  * x86, vmware: Preset lpj values when on VMware.
+    - LP: #622877
+  * Staging: line6: needs to select SND_PCM
+    - LP: #622877
+  * Staging: panel: Prevent double-calling of parport_release - fix oops.
+    - LP: #622877
+  * PCI: Do not run NVidia quirks related to MSI with MSI disabled
+    - LP: #622877
+  * PCI: disable MSI on VIA K8M800
+    - LP: #622877
+  * solos-pci: Fix race condition in tasklet RX handling
+    - LP: #622877
+  * splice: fix misuse of SPLICE_F_NONBLOCK
+    - LP: #622877
+  * drivers/video/w100fb.c: ignore void return value / fix build failure
+    - LP: #622877
+  * ide-cd: Do not access completed requests in the irq handler
+    - LP: #622877
+  * md/raid10: fix deadlock with unaligned read during resync
+    - LP: #622877
+  * blkdev: cgroup whitelist permission fix
+    - LP: #622877
+  * eCryptfs: Handle ioctl calls with unlocked and compat functions
+    - LP: #622877
+  * ecryptfs: release reference to lower mount if interpose fails
+    - LP: #622877
+  * fs/ecryptfs/file.c: introduce missing free
+    - LP: #622877
+  * bio, fs: update RWA_MASK, READA and SWRITE to match the corresponding
+    BIO_RW_* bits
+    - LP: #622877
+  * signalfd: fill in ssi_int for posix timers and message queues
+    - LP: #622877
+  * smsc911x: Add spinlocks around registers access
+    - LP: #622877
+  * ARM: 6299/1: errata: TLBIASIDIS and TLBIMVAIS operations can broadcast
+    a faulty ASID
+    - LP: #622877
+  * ARM: 6280/1: imx: Fix build failure when including <mach/gpio.h>
+    without <linux/spinlock.h>
+    - LP: #622877
+  * USB: resizing usbmon binary interface buffer causes protection faults
+    - LP: #622877
+  * USB delay init quirk for logitech Harmony 700-series devices
+    - LP: #622877
+  * USB: serial: enabling support for Segway RMP in ftdi_sio
+    - LP: #622877
+  * USB: option: Huawei ETS 1220 support added
+    - LP: #622877
+  * USB: option: add huawei k3765 k4505 devices to work properly
+    - LP: #622877
+  * USB: ftdi_sio: device id for Navitator
+    - LP: #622877
+  * USB: cp210x: Add four new device IDs
+    - LP: #622877
+  * USB: usbtest: avoid to free coherent buffer in atomic context
+    - LP: #622877
+  * USB: fix thread-unsafe anchor utiliy routines
+    - LP: #622877
+  * drm/edid: Fix the HDTV hack sync adjustment
+    - LP: #622877
+  * Bluetooth: Added support for controller shipped with iMac i5
+    - LP: #622877
+  * jfs: don't allow os2 xattr namespace overlap with others
+    - LP: #622877
+  * arp_notify: allow drivers to explicitly request a notification event.
+    - LP: #622877
+  * xen: netfront: explicitly generate arp_notify event after migration.
+    - LP: #622877
+  * net: Fix NETDEV_NOTIFY_PEERS to not conflict with
+    NETDEV_BONDING_DESLAVE.
+    - LP: #622877
+  * irq: Add new IRQ flag IRQF_NO_SUSPEND
+    - LP: #622877
+  * xen: Do not suspend IPI IRQs.
+    - LP: #622877
+  * drm/i915: Use RSEN instead of HTPLG for tfp410 monitor detection.
+    - LP: #622877
+  * Btrfs: Avoid superfluous tree-log writeout
+    - LP: #622877
+  * Btrfs: Add btrfs_duplicate_item
+    - LP: #622877
+  * Btrfs: Rewrite btrfs_drop_extents
+    - LP: #622877
+  * Btrfs: Fix disk_i_size update corner case
+    - LP: #622877
+  * Btrfs: Avoid orphan inodes cleanup while replaying log
+    - LP: #622877
+  * Btrfs: Avoid orphan inodes cleanup during committing transaction
+    - LP: #622877
+  * Btrfs: Make fallocate(2) more ENOSPC friendly
+    - LP: #622877
+  * Btrfs: Make truncate(2) more ENOSPC friendly
+    - LP: #622877
+  * Btrfs: Pass transaction handle to security and ACL initialization
+    functions
+    - LP: #622877
+  * Btrfs: Add delayed iput
+    - LP: #622877
+  * Btrfs: Fix btrfs_drop_extent_cache for skip pinned case
+    - LP: #622877
+  * Btrfs: Fix per root used space accounting
+    - LP: #622877
+  * Btrfs: don't add extent 0 to the free space cache v2
+    - LP: #622877
+  * Btrfs: fail mount on bad mount options
+    - LP: #622877
+  * Btrfs: deny sys_link across subvolumes.
+    - LP: #622877
+  * Btrfs: Show discard option in /proc/mounts
+    - LP: #622877
+  * Btrfs: make metadata chunks smaller
+    - LP: #622877
+  * Btrfs: make sure fallocate properly starts a transaction
+    - LP: #622877
+  * btrfs: fix missing last-entry in readdir(3)
+    - LP: #622877
+  * Btrfs: align offsets for btrfs_ordered_update_i_size
+    - LP: #622877
+  * Btrfs, fix memory leaks in error paths
+    - LP: #622877
+  * Btrfs: Fix race in btrfs_mark_extent_written
+    - LP: #622877
+  * Btrfs: fix regression in orphan cleanup
+    - LP: #622877
+  * Btrfs: deal with NULL acl sent to btrfs_set_acl
+    - LP: #622877
+  * Btrfs: fix possible panic on unmount
+    - LP: #622877
+  * Btrfs: Use correct values when updating inode i_size on fallocate
+    - LP: #622877
+  * Btrfs: fix a memory leak in btrfs_init_acl
+    - LP: #622877
+  * Btrfs: run orphan cleanup on default fs root
+    - LP: #622877
+  * Btrfs: do not mark the chunk as readonly if in degraded mode
+    - LP: #622877
+  * Btrfs: check return value of open_bdev_exclusive properly
+    - LP: #622877
+  * Btrfs: check total number of devices when removing missing
+    - LP: #622877
+  * Btrfs: fix race between allocate and release extent buffer.
+    - LP: #622877
+  * Btrfs: make error return negative in btrfs_sync_file()
+    - LP: #622877
+  * Btrfs: remove BUG_ON() due to mounting bad filesystem
+    - LP: #622877
+  * Btrfs: Fix oopsen when dropping empty tree.
+    - LP: #622877
+  * Btrfs: do not try and lookup the file extent when finishing ordered io
+    - LP: #622877
+  * Btrfs: apply updated fallocate i_size fix
+    - LP: #622877
+  * Btrfs: btrfs_mark_extent_written uses the wrong slot
+    - LP: #622877
+  * Btrfs: kfree correct pointer during mount option parsing
+    - LP: #622877
+  * nohz: Introduce arch_needs_cpu
+    - LP: #622877
+  * nohz: Reuse ktime in sub-functions of tick_check_idle.
+    - LP: #622877
+  * timekeeping: Fix clock_gettime vsyscall time warp
+    - LP: #622877
+  * sched: Fix granularity of task_u/stime()
+    - LP: #622877
+  * sched, cputime: Introduce thread_group_times()
+    - LP: #622877
+  * mutex: Don't spin when the owner CPU is offline or other weird cases
+    - LP: #622877
+  * fix SBA IOMMU to handle allocation failure properly
+    - LP: #622877
+  * crypto: testmgr - Fix complain about lack test for internal used
+    algorithm
+    - LP: #622877
+  * memory hotplug: fix a bug on /dev/mem for 64-bit kernels
+    - LP: #622877
+  * x86: Fix out of order of gsi
+    - LP: #622877
+  * HWPOISON: remove the anonymous entry
+    - LP: #622877
+  * HWPOISON: abort on failed unmap
+    - LP: #622877
+  * powerpc/eeh: Fix a bug when pci structure is null
+    - LP: #622877
+  * ACPI: Fix regression where _PPC is not read at boot even when
+    ignore_ppc=0
+    - LP: #622877
+  * ext4: Make sure the MOVE_EXT ioctl can't overwrite append-only files
+    - LP: #622877
+  * ext4: Fix optional-arg mount options
+    - LP: #622877
+  * reiserfs: properly honor read-only devices
+    - LP: #622877
+  * reiserfs: fix oops while creating privroot with selinux enabled
+    - LP: #622877
+  * dlm: always use GFP_NOFS
+    - LP: #622877
+  * dlm: fix ordering of bast and cast
+    - LP: #622877
+  * dlm: send reply before bast
+    - LP: #622877
+  * ocfs2: Find proper end cpos for a leaf refcount block.
+    - LP: #622877
+  * ocfs2: Set MS_POSIXACL on remount
+    - LP: #622877
+  * Skip check for mandatory locks when unlocking
+    - LP: #622877
+  * loop: Update mtime when writing using aops
+    - LP: #622877
+  * aic79xx: check for non-NULL scb in ahd_handle_nonpkt_busfree
+    - LP: #622877
+  * ibmvfc: Fix command completion handling
+    - LP: #622877
+  * ibmvfc: Reduce error recovery timeout
+    - LP: #622877
+  * md/raid1: delay reads that could overtake behind-writes.
+    - LP: #622877
+  * mm: fix corruption of hibernation caused by reusing swap during image
+    saving
+    - LP: #622877
+  * Linux 2.6.32.19
+    - LP: #622877
+  * Linux 2.6.32.20
+    - LP: #622882
+  * memstick: fix hangs on unexpected device removal in mspro_blk
+    - LP: #625392
+  * ASoC: Fix inverted mute controls for WM8580
+    - LP: #625392
+  * ASoC: Remove DSP mode support for WM8776
+    - LP: #625392
+  * ALSA: riptide - Fix detection / load of firmware files
+    - LP: #625392
+  * ALSA: emu10k1 - delay the PCM interrupts (add pcm_irq_delay parameter)
+    - LP: #625392
+  * ALSA: hda - Fix missing stream for second ADC on Realtek ALC260 HDA
+    codec
+    - LP: #625392
+  * ocfs2: do not overwrite error codes in ocfs2_init_acl
+    - LP: #625392
+  * ocfs2/dlm: fix a dead lock
+    - LP: #625392
+  * ocfs2 fix o2dlm dlm run purgelist (rev 3)
+    - LP: #625392
+  * ocfs2: Count more refcount records in file system fragmentation.
+    - LP: #625392
+  * ocfs2/dlm: avoid incorrect bit set in refmap on recovery master
+    - LP: #625392
+  * ocfs2/dlm: remove potential deadlock -V3
+    - LP: #625392
+  * x86, hotplug: Serialize CPU hotplug to avoid bringup concurrency issues
+    - LP: #625392
+  * x86, apic: Fix apic=debug boot crash
+    - LP: #625392
+  * Fix the nested PR lock calling issue in ACL
+    - LP: #625392
+  * hwmon: (pc87360) Fix device resource declaration
+    - LP: #625392
+  * ARM: Tighten check for allowable CPSR values
+    - LP: #625392
+  * nfs: Add "lookupcache" to displayed mount options
+    - LP: #625392
+  * ath5k: disable ASPM L0s for all cards
+    - LP: #625392
+  * pxa3xx: fix ns2cycle equation
+    - LP: #625392
+  * dm mpath: fix NULL pointer dereference when path parameters missing
+    - LP: #625392
+  * dm ioctl: release _hash_lock between devices in remove_all
+    - LP: #625392
+  * mm: make the vma list be doubly linked
+    - LP: #625392
+  * mm: make the mlock() stack guard page checks stricter
+    - LP: #625392
+  * mm: make stack guard page logic use vm_prev pointer
+    - LP: #625392
+  * slab: fix object alignment
+    - LP: #625392
+  * sunxvr500: Ignore secondary output PCI devices.
+    - LP: #625392
+  * sparc64: Add missing ID to parport probing code.
+    - LP: #625392
+  * sparc64: Fix rwsem constant bug leading to hangs.
+    - LP: #625392
+  * sparc64: Fix atomic64_t routine return values.
+    - LP: #625392
+  * net: Fix a memmove bug in dev_gro_receive()
+    - LP: #625392
+  * isdn: fix information leak
+    - LP: #625392
+  * act_nat: the checksum of ICMP doesn't have pseudo header
+    - LP: #625392
+  * vmscan: raise the bar to PAGEOUT_IO_SYNC stalls
+    - LP: #625392
+  * pcmcia: avoid buffer overflow in pcmcia_setup_isa_irq
+    - LP: #625392
+  * ext4: consolidate in_range() definitions
+    - LP: #625392
+  * Oprofile: Change CPUIDS from decimal to hex, and add some comments
+    - LP: #625392
+  * oprofile: add support for Intel processor model 30
+    - LP: #625392
+  * fixes for using make 3.82
+    - LP: #625392
+  * ALSA: intel8x0: Mute External Amplifier by default for ThinkPad X31
+    - LP: #619439, #625392
+  * netlink: fix compat recvmsg
+    - LP: #625392
+  * powerpc: Fix typo in uImage target
+    - LP: #625392
+  * USB: option: add Celot CT-650
+    - LP: #625392
+  * USB: add device IDs for igotu to navman
+    - LP: #625392
+  * USB: pl2303: New vendor and product id
+    - LP: #625392
+  * USB: CP210x Fix Break On/Off
+    - LP: #625392
+  * USB: ftdi_sio: fix endianess of max packet size
+    - LP: #625392
+  * USB: io_ti: check firmware version before updating
+    - LP: #625392
+  * USB: xhci: Remove buggy assignment in next_trb()
+    - LP: #625392
+  * USB: ftdi_sio: Add ID for Ionics PlugComputer
+    - LP: #625392
+  * USB: ftdi_sio: add product ID for Lenz LI-USB
+    - LP: #625392
+  * x86, apic: ack all pending irqs when crashed/on kexec
+    - LP: #625392
+  * Linux 2.6.32.21
+    - LP: #625392
+
+ -- Brad Figg <brad.figg@canonical.com>  Mon, 27 Sep 2010 11:51:28 -0700
+
+linux-mvl-dove (2.6.32-210.26) lucid-proposed; urgency=low
+
+  [ Stefan Bader ]
+
+  * Rebased to 2.6.32-25.43
+
+  [ Upstream Kernel Changes ]
+
+  * dove: make galcore built-in
+    - LP: #625090
+  * dove: make BMM driver built-in
+    - LP: #625090
+  * dove: fix incorrect bus base of macro __io()
+    - LP: #601226
+  * dove: use LCD external clock for videoplug board
+    - LP: #625132
+  * dove: fix crash issue when lcd1 enabled and the board setup doesn't
+    provide mach board info
+    - LP: #625132
+  * dove: fix bug when clearing the needed bit when handling PMU interrupt
+    - LP: #625132
+  * fix VGA calibration initial value.
+    - LP: #625132
+  * dove: fix bug when setting the pcie port control register
+    - LP: #625132
+  * fix jiggling issue for high resolution in dual display.
+    - LP: #625132
+  * orion eth: always call the phy_scan from the resume function
+    - LP: #625132
+  * Enable L2WA only and remove L1WA
+    - LP: #625132
+  * Enable L2C way 4-7
+    - LP: #625132
+  * Disable Dual issue of VFP WMMX for stability
+    - LP: #625132
+  * dove: set the giga phy address for dove db board
+    - LP: #625132
+  * fix HWC32 enable make system hang while use LCD external clock.
+    - LP: #625132
+  * dove: use AC97 RT655 codec instead of ASoC version
+    - LP: #625132
+
+  [ Ubuntu: 2.6.32-25.43 ]
+
+  * SAUCE: (no-up) Modularize vesafb -- fix initialization
+    - LP: #611471
+  * Revert "SAUCE: sync before umount to reduce time taken by ext4 umount"
+    - LP: #543617, #585092
+  * Revert "SAUCE: tulip: Let dmfe handle davicom on non-sparc"
+    - LP: #607824
+  * [Config] Added ums-cypress to udeb
+    - LP: #576066
+  * Revert "PCI quirk: Disable MSI on VIA K8T890 systems"
+    - LP: #607824
+  * Revert "PCI quirks: disable msi on AMD rs4xx internal gfx bridges"
+    - LP: #607824
+  * Revert "(pre-stable) Input: psmouse - reset all types of mice before
+    reconnecting"
+    - LP: #607824
+  * Revert "jbd: jbd-debug and jbd2-debug should be writable"
+    - LP: #607824
+  * Revert "ext4: Make fsync sync new parent directories in no-journal
+    mode"
+    - LP: #615548
+  * Revert "ext4: Fix compat EXT4_IOC_ADD_GROUP"
+    - LP: #615548
+  * Revert "ext4: Conditionally define compat ioctl numbers"
+    - LP: #615548
+  * Revert "ext4: restart ext4_ext_remove_space() after transaction
+    restart"
+    - LP: #615548
+  * Revert "ext4: Clear the EXT4_EOFBLOCKS_FL flag only when warranted"
+    - LP: #615548
+  * Revert "ext4: Avoid crashing on NULL ptr dereference on a filesystem
+    error"
+    - LP: #615548
+  * Revert "ext4: Use bitops to read/modify i_flags in struct
+    ext4_inode_info"
+    - LP: #615548
+  * Revert "ext4: Show journal_checksum option"
+    - LP: #615548
+  * Revert "ext4: check for a good block group before loading buddy pages"
+    - LP: #615548
+  * Revert "ext4: Prevent creation of files larger than RLIMIT_FSIZE using
+    fallocate"
+    - LP: #615548
+  * Revert "ext4: Remove extraneous newlines in ext4_msg() calls"
+    - LP: #615548
+  * Revert "ext4: init statistics after journal recovery"
+    - LP: #615548
+  * Revert "ext4: clean up inode bitmaps manipulation in ext4_free_inode"
+    - LP: #615548
+  * Revert "ext4: Do not zero out uninitialized extents beyond i_size"
+    - LP: #615548
+  * Revert "ext4: don't scan/accumulate more pages than mballoc will
+    allocate"
+    - LP: #615548
+  * Revert "ext4: stop issuing discards if not supported by device"
+    - LP: #615548
+  * Revert "ext4: check s_log_groups_per_flex in online resize code"
+    - LP: #615548
+  * Revert "ext4: fix quota accounting in case of fallocate"
+    - LP: #615548
+  * Revert "ext4: allow defrag (EXT4_IOC_MOVE_EXT) in 32bit compat mode"
+    - LP: #615548
+  * Revert "ext4: rename ext4_mb_release_desc() to ext4_mb_unload_buddy()"
+    - LP: #615548
+  * Revert "ext4: Remove unnecessary call to ext4_get_group_desc() in
+    mballoc"
+    - LP: #615548
+  * Revert "ext4: fix memory leaks in error path handling of
+    ext4_ext_zeroout()"
+    - LP: #615548
+  * Revert "ext4: check missed return value in ext4_sync_file()"
+    - LP: #615548
+  * Revert "ext4: Issue the discard operation *before* releasing the blocks
+    to be reused"
+    - LP: #615548
+  * Revert "ext4: Fix buffer head leaks after calls to
+    ext4_get_inode_loc()"
+    - LP: #615548
+  * Revert "ext4: Fix possible lost inode write in no journal mode"
+    - LP: #615548
+  * Revert "ext4: Fixed inode allocator to correctly track a flex_bg's
+    used_dirs"
+    - LP: #615548
+  * Revert "ext4: Fix estimate of # of blocks needed to write
+    indirect-mapped files"
+    - LP: #615548
+  * Revert "ext4: Code cleanup for EXT4_IOC_MOVE_EXT ioctl"
+    - LP: #615548
+  * Revert "ext4: Fix the NULL reference in double_down_write_data_sem()"
+    - LP: #615548
+  * Revert "ext4: Fix insertion point of extent in
+    mext_insert_across_blocks()"
+    - LP: #615548
+  * Revert "ext4: make "offset" consistent in ext4_check_dir_entry()"
+    - LP: #615548
+  * Revert "ext4: Handle non empty on-disk orphan link"
+    - LP: #615548
+  * Revert "ext4: explicitly remove inode from orphan list after failed
+    direct io"
+    - LP: #615548
+  * Revert "ext4: fix error handling in migrate"
+    - LP: #615548
+  * Revert "ext4: Fix fencepost error in chosing choosing group vs file
+    preallocation."
+    - LP: #615548
+  * Revert "ext4: Add flag to files with blocks intentionally past EOF"
+    - LP: #615548
+  * Revert "ext4: Fix BUG_ON at fs/buffer.c:652 in no journal mode"
+    - LP: #615548
+  * Revert "ext4: Use bitops to read/modify EXT4_I(inode)->i_state"
+    - LP: #615548
+  * Revert "ext4: Drop EXT4_GET_BLOCKS_UPDATE_RESERVE_SPACE flag"
+    - LP: #615548
+  * Revert "ext4: Fix quota accounting error with fallocate"
+    - LP: #615548
+  * Revert "ext4: Handle -EDQUOT error on write"
+    - LP: #615548
+  * Revert "ext4: Calculate metadata requirements more accurately"
+    - LP: #615548
+  * Revert "ext4: Fix accounting of reserved metadata blocks"
+    - LP: #615548
+  * Revert "ext4: Patch up how we claim metadata blocks for quota purposes"
+    - LP: #615548
+  * Revert "ext4: Ensure zeroout blocks have no dirty metadata"
+    - LP: #615548
+  * Revert "ext4: return correct wbc.nr_to_write in ext4_da_writepages"
+    - LP: #615548
+  * Revert "ext4: Eliminate potential double free on error path"
+    - LP: #615548
+  * Revert "ext4, jbd2: Add barriers for file systems with exernal
+    journals"
+    - LP: #615548
+  * Revert "ext4: replace BUG() with return -EIO in ext4_ext_get_blocks"
+    - LP: #615548
+  * Revert "ext4: Fix potential quota deadlock"
+    - LP: #615548
+  * Revert "ext4: don't return to userspace after freezing the fs with a
+    mutex held"
+    - LP: #615548
+  * ixgbe: Fix return of invalid txq
+    - LP: #607824
+  * oprofile/x86: fix uninitialized counter usage during cpu hotplug
+    - LP: #607824
+  * oprofile: remove double ring buffering
+    - LP: #607824
+  * cpumask: fix compat getaffinity
+    - LP: #607824
+  * NFSD: don't report compiled-out versions as present
+    - LP: #607824
+  * sata_nv: use ata_pci_sff_activate_host() instead of ata_host_activate()
+    - LP: #607824
+  * ARCNET: Limit com20020 PCI ID matches for SOHARD cards
+    - LP: #607824
+  * rtl8180: fix tx status reporting
+    - LP: #607824
+  * Staging: add Add Sitecom WL-349 to rtl8192su
+    - LP: #607824
+  * staging: vt6655: Fix kernel BUG on driver wpa initialization
+    - LP: #607824
+  * Fix racy use of anon_inode_getfd() in perf_event.c
+    - LP: #607824
+  * posix_timer: Fix error path in timer_create
+    - LP: #607824
+  * libata: disable ATAPI AN by default
+    - LP: #607824
+  * libata: don't flush dcache on slab pages
+    - LP: #607824
+  * mutex: Fix optimistic spinning vs. BKL
+    - LP: #607824
+  * ALSA: hda: Fix model quirk for Dell M1730
+    - LP: #576160, #607824
+  * ALSA: hda: Use LPIB for Toshiba A100-259
+    - LP: #549560, #607824
+  * ALSA: hda: Use LPIB for Acer Aspire 5110
+    - LP: #583983, #607824
+  * ALSA: hda: Use LPIB for Sony VPCS11V9E
+    - LP: #586347, #607824
+  * ALSA: hda: Use LPIB for a Shuttle device
+    - LP: #551949, #607824
+  * ACPI: video: fix acpi_backlight=video
+    - LP: #573120, #607824
+  * V4L/DVB: gspca - stv06xx: Remove the 046d:08da from the stv06xx driver
+    - LP: #607824
+  * HID: Add the GYR4101US USB ID to hid-gyration
+    - LP: #607824
+  * ar9170usb: add a couple more USB IDs
+    - LP: #607824
+  * ar9170usb: fix panic triggered by undersized rxstream buffer
+    - LP: #607824
+  * USB: visor: fix memory leak
+    - LP: #607824
+  * USB: CP210x New Device IDs 11 New device IDs
+    - LP: #607824
+  * USB: kobil: fix memory leak
+    - LP: #607824
+  * USB: option: add PID for ZTE product
+    - LP: #607824
+  * USB: option.c: Add Pirelli VID/PID and indicate Pirelli's modem
+    interface is 0xff
+    - LP: #607824
+  * USB: serial: option: add cinterion device id
+    - LP: #607824
+  * USB: option.c: OLIVETTI OLICARD100 support
+    - LP: #607824
+  * USB: ir-usb: fix double free
+    - LP: #607824
+  * USB: kl5usb105: fix memory leak
+    - LP: #607824
+  * USB: mxc: gadget: Fix bitfield for calculating maximum packet size
+    - LP: #607824
+  * USB: unusual-dev: Add bad sense flag for Appotech ax203 based picture
+    frames
+    - LP: #607824
+  * USB: EHCI: clear PHCD before resuming
+    - LP: #607824
+  * USB: xhci: Fix issue with set interface after stall.
+    - LP: #607824
+  * USB: xhci: Fix check for room on the ring.
+    - LP: #607824
+  * USB: xHCI: Fix wrong usage of macro TRB_TYPE
+    - LP: #607824
+  * mac80211: give warning if building w/out rate ctrl algorithm
+    - LP: #607824
+  * mac80211: Fix robust management frame handling (MFP)
+    - LP: #607824
+  * mac80211: fix rts threshold check
+    - LP: #607824
+  * drivers/base/cpu.c: fix the output from /sys/devices/system/cpu/offline
+    - LP: #607824
+  * can: Fix SJA1000 command register writes on SMP systems
+    - LP: #607824
+  * PCI quirk: Disable MSI on VIA K8T890 systems
+    - LP: #607824
+  * PCI quirks: disable msi on AMD rs4xx internal gfx bridges
+    - LP: #607824
+  * PCI: Disable MSI for MCP55 on P5N32-E SLI
+    - LP: #607824
+  * virtio_net: Make delayed refill more reliable
+    - LP: #607824
+  * mm: hugetlb: fix clear_huge_page()
+    - LP: #607824
+  * powerpc: Fix handling of strncmp with zero len
+    - LP: #607824
+  * powerpc/pseries: Only call start-cpu when a CPU is stopped
+    - LP: #607824
+  * powerpc/pseries: Make query_cpu_stopped callable outside hotplug cpu
+    - LP: #607824
+  * powerpc/oprofile: fix potential buffer overrun in op_model_cell.c
+    - LP: #607824
+  * writeback: disable periodic old data writeback for
+    !dirty_writeback_centisecs
+    - LP: #607824
+  * md/raid1: fix counting of write targets.
+    - LP: #607824
+  * md: Fix read balancing in RAID1 and RAID10 on drives > 2TB
+    - LP: #607824
+  * md: set mddev readonly flag on blkdev BLKROSET ioctl
+    - LP: #607824
+  * x86/amd-iommu: Fix suspend/resume with IOMMU
+    - LP: #607824
+  * exofs: confusion between kmap() and kmap_atomic() api
+    - LP: #607824
+  * mn10300: set ARCH_KMALLOC_MINALIGN
+    - LP: #607824
+  * m68k: set ARCH_KMALLOC_MINALIGN
+    - LP: #607824
+  * rtc-cmos: do dev_set_drvdata() earlier in the initialization
+    - LP: #607824
+  * rtc: s3c: initialize driver data before using it
+    - LP: #607824
+  * frv: set ARCH_KMALLOC_MINALIGN
+    - LP: #607824
+  * xtensa: set ARCH_KMALLOC_MINALIGN
+    - LP: #607824
+  * Blackfin: set ARCH_KMALLOC_MINALIGN
+    - LP: #607824
+  * tmpfs: insert tmpfs cache pages to inactive list at first
+    - LP: #607824
+  * mlx4_core: Fix possible chunk sg list overflow in mlx4_alloc_icm()
+    - LP: #607824
+  * ARM: 6166/1: Proper prefetch abort handling on pre-ARMv6
+    - LP: #607824
+  * ARM: 6164/1: Add kto and kfrom to input operands list.
+    - LP: #607824
+  * ARM: 6146/1: sa1111: Prevent deadlock in resume path
+    - LP: #607824
+  * ARM: 6144/1: TCM memory bug freeing bug
+    - LP: #607824
+  * ARM: VFP: Fix vfp_put_double() for d16-d31
+    - LP: #607824
+  * ASoC: Fix dB scales for WM835x
+    - LP: #607824
+  * ASoC: Fix dB scales for WM8400
+    - LP: #607824
+  * ASoC: Fix dB scales for WM8990
+    - LP: #607824
+  * hwmon: (ltc4245) Read only one GPIO pin
+    - LP: #607824
+  * signals: check_kill_permission(): don't check creds if
+    same_thread_group()
+    - LP: #607824
+  * do_generic_file_read: clear page errors when issuing a fresh read of
+    the page
+    - LP: #607824
+  * ipmi: handle run_to_completion properly in deliver_recv_msg()
+    - LP: #607824
+  * x86, setup: Phoenix BIOS fixup is needed on Dell Inspiron Mini 1012
+    - LP: #607824
+  * xen: ensure timer tick is resumed even on CPU driving the resume
+    - LP: #607824
+  * xen: avoid allocation causing potential swap activity on the resume
+    path
+    - LP: #607824
+  * ALSA: hda: Use LPIB for an ASUS device
+    - LP: #465942, #607824
+  * ALSA: hda: Use mb31 quirk for an iMac model
+    - LP: #542550, #607824
+  * ALSA: hda: Use LPIB for another mainboard
+    - LP: #580749, #607824
+  * ALSA: hda: Use LPIB for ASUS M2V
+    - LP: #587546, #607824
+  * Staging: comedi - correct parameter gainlkup for DAQCard-6024E in
+    driver ni_mio_cs.c
+    - LP: #607824
+  * clocksource: sh_cmt: compute mult and shift before registration
+    - LP: #607824
+  * ath5k: retain promiscuous setting
+    - LP: #607824
+  * ahci: add pci quirk for JMB362
+    - LP: #607824
+  * firewire: core: check for 1394a compliant IRM, fix inaccessibility of
+    Sony camcorder
+    - LP: #607824
+  * perf_events: Fix resource leak in x86 __hw_perf_event_init()
+    - LP: #607824
+  * sata_nv: don't diddle with nIEN on mcp55
+    - LP: #607824
+  * sata_via: magic vt6421 fix for transmission problems w/ WD drives
+    - LP: #422994, #607824
+  * USB: mos7840: fix null-pointer dereference
+    - LP: #607824
+  * USB: xhci: Wait for host to start running.
+    - LP: #607824
+  * USB: xhci: Wait for controller to be ready after reset.
+    - LP: #607824
+  * USB: ftdi_sio: fix DTR/RTS line modes
+    - LP: #607824
+  * USB: cdc-acm: fix resource reclaim in error path of acm_probe
+    - LP: #607824
+  * p54usb: Add device ID for Dell WLA3310 USB
+    - LP: #607824
+  * atl1e: Allow TX checksum offload and TSO to be disabled and reenabled
+    - LP: #607824
+  * via-velocity: Give RX descriptors to the NIC later on open or MTU
+    change
+    - LP: #607824
+  * dmfe/tulip: Let dmfe handle DM910x except for SPARC on-board chips
+    - LP: #607824
+  * Documentation/3c509: document ethtool support
+    - LP: #607824
+  * wireless: report reasonable bitrate for MCS rates through wext
+    - LP: #607824
+  * ath9k: add support for 802.11n bonded out AR2427
+    - LP: #607824
+  * wrong type for 'magic' argument in simple_fill_super()
+    - LP: #607824
+  * iwlwifi: check for aggregation frame and queue
+    - LP: #607824
+  * iwlwifi: recalculate average tpt if not current
+    - LP: #607824
+  * iwlwifi: update supported PCI_ID list for 5xx0 series
+    - LP: #607824
+  * wl1251: fix a memory leak in probe
+    - LP: #607824
+  * vfs: add NOFOLLOW flag to umount(2)
+    - LP: #607824
+  * l2tp: Fix oops in pppol2tp_xmit
+    - LP: #607824
+  * ucc_geth: Fix empty TX queue processing
+    - LP: #607824
+  * ucc_geth: Fix netdev watchdog triggering on link changes
+    - LP: #607824
+  * ucc_geth: Fix full TX queue processing
+    - LP: #607824
+  * Input: psmouse - reset all types of mice before reconnecting
+    - LP: #607824
+  * KVM: s390: Fix possible memory leak of in kvm_arch_vcpu_create()
+    - LP: #607824
+  * KVM: PPC: Do not create debugfs if fail to create vcpu
+    - LP: #607824
+  * x86, paravirt: Add a global synchronization point for pvclock
+    - LP: #607824
+  * KVM: Don't allow lmsw to clear cr0.pe
+    - LP: #607824
+  * KVM: x86: Check LMA bit before set_efer
+    - LP: #607824
+  * KVM: MMU: Segregate shadow pages with different cr0.wp
+    - LP: #607824
+  * KVM: VMX: enable VMXON check with SMX enabled (Intel TXT)
+    - LP: #607824
+  * KVM: MMU: Don't read pdptrs with mmu spinlock held in mmu_alloc_roots
+    - LP: #607824
+  * KVM: Fix wallclock version writing race
+    - LP: #607824
+  * KVM: x86: Add missing locking to arch specific vcpu ioctls
+    - LP: #607824
+  * KVM: x86: Inject #GP with the right rip on efer writes
+    - LP: #607824
+  * jbd: jbd-debug and jbd2-debug should be writable
+    - LP: #607824
+  * parisc: clear floating point exception flag on SIGFPE signal
+    - LP: #607824
+  * dm snapshot: simplify sector_to_chunk expression
+    - LP: #607824
+  * KEYS: Return more accurate error codes
+    - LP: #607824
+  * qla2xxx: Disable MSI on qla24xx chips other than QLA2432.
+    - LP: #607824
+  * Linux 2.6.32.16
+    - LP: #607824
+  * drm/i915: Fix 82854 PCI ID, and treat it like other 85X
+    - LP: #607824
+  * drm/i915: Reject bind_to_gtt() early if object > aperture
+    - LP: #607824
+  * drm/edid: Fix 1024x768@85Hz
+    - LP: #607824
+  * drm/radeon/kms: reset ddc_bus in object header parsing
+    - LP: #607824
+  * drm/radeon/kms/atom: fix typo in LVDS panel info parsing
+    - LP: #607824
+  * drm/radeon: r100/r200 ums: block ability for userspace app to trash 0
+    page and beyond
+    - LP: #607824
+  * drm/radeon: fix the r100/r200 ums block 0 page fix
+    - LP: #607824
+  * drm/i915: Rebind bo if currently bound with incorrect alignment.
+    - LP: #607824
+  * Linux 2.6.32.16+drm33.6
+    - LP: #607824
+  * virtio-pci: disable msi at startup
+    - LP: #615548
+  * hwmon: (k8temp) Bypass core swapping on single-core processors
+    - LP: #615548
+  * hwmon: (k8temp) Fix temperature reporting for ASB1 processor revisions
+    - LP: #615548
+  * hwmon: (coretemp) Properly label the sensors
+    - LP: #615548
+  * hwmon: (coretemp) Skip duplicate CPU entries
+    - LP: #615548
+  * hwmon: (it87) Fix in7 on IT8720F
+    - LP: #615548
+  * cifs: remove bogus first_time check in NTLMv2 session setup code
+    - LP: #615548
+  * cifs: don't attempt busy-file rename unless it's in same directory
+    - LP: #615548
+  * CIFS: Fix a malicious redirect problem in the DNS lookup code
+    - LP: #615548
+  * ALSA: hda - Add Macbook 5,2 quirk
+    - LP: #463178, #615548
+  * cpmac: do not leak struct net_device on phy_connect errors
+    - LP: #615548
+  * sky2: enable rx/tx in sky2_phy_reinit()
+    - LP: #615548
+  * sparc: Fix use of uid16_t and gid16_t in asm/stat.h
+    - LP: #615548
+  * math-emu: correct test for downshifting fraction in _FP_FROM_INT()
+    - LP: #615548
+  * NFSv4: Fix an embarassing typo in encode_attrs()
+    - LP: #615548
+  * NFSv4: Ensure that /proc/self/mountinfo displays the minor version
+    number
+    - LP: #615548
+  * SUNRPC: Fix a re-entrancy bug in xs_tcp_read_calldir()
+    - LP: #615548
+  * ath5k: drop warning on jumbo frames
+    - LP: #615548
+  * ath9k: re-enable ps by default for new single chip families
+    - LP: #615548
+  * ath9k: Avoid corrupt frames being forwarded to mac80211.
+    - LP: #615548
+  * hostap: Protect against initialization interrupt
+    - LP: #615548
+  * TPM: ReadPubEK output struct fix
+    - LP: #615548
+  * fb: fix colliding defines for fb flags.
+    - LP: #615548
+  * iwlwifi: cancel scan watchdog in iwl_bg_abort_scan
+    - LP: #615548
+  * mac80211: do not wip out old supported rates
+    - LP: #615548
+  * mac80211: Handle mesh action frames in ieee80211_rx_h_action
+    - LP: #615548
+  * Btrfs: fix checks in BTRFS_IOC_CLONE_RANGE
+    - LP: #615548
+  * p54pci: add Symbol AP-300 minipci adapters pciid
+    - LP: #615548
+  * dynamic debug: move ddebug_remove_module() down into free_module()
+    - LP: #615548
+  * tpm_tis: fix subsequent suspend failures
+    - LP: #615548
+  * ipvs: Add missing locking during connection table hashing and unhashing
+    - LP: #615548
+  * netfilter: ip6t_REJECT: fix a dst leak in ipv6 REJECT
+    - LP: #615548
+  * SCSI: aacraid: Eliminate use after free
+    - LP: #615548
+  * amd64-agp: Probe unknown AGP devices the right way
+    - LP: #615548
+  * perf: Resurrect flat callchains
+    - LP: #615548
+  * x86: Fix vsyscall on gcc 4.5 with -Os
+    - LP: #615548
+  * x86, Calgary: Increase max PHB number
+    - LP: #615548
+  * x86, Calgary: Limit the max PHB number to 256
+    - LP: #615548
+  * sched: Prevent compiler from optimising the sched_avg_update() loop
+    - LP: #615548
+  * sched: Fix over-scheduling bug
+    - LP: #615548
+  * genirq: Deal with desc->set_type() changing desc->chip
+    - LP: #615548
+  * serial: cpm_uart: implement the cpm_uart_early_write() function for
+    console poll
+    - LP: #615548
+  * cmd640: fix kernel oops in test_irq() method
+    - LP: #615548
+  * ide: Fix IDE taskfile with cfq scheduler
+    - LP: #615548
+  * net/core: neighbour update Oops
+    - LP: #615548
+  * tcp: fix crash in tcp_xmit_retransmit_queue
+    - LP: #615548
+  * rtc: fix ds1388 time corruption
+    - LP: #615548
+  * ethtool: Fix potential kernel buffer overflow in ETHTOOL_GRXCLSRLALL
+    - LP: #615548
+  * sdhci-s3c: add missing remove function
+    - LP: #615548
+  * ASoC: Remove duplicate AUX definition from WM8776
+    - LP: #615548
+  * x86: Fix x2apic preenabled system with kexec
+    - LP: #615548
+  * IPoIB: Fix world-writable child interface control sysfs attributes
+    - LP: #615548
+  * Input: i8042 - add Gigabyte Spring Peak to dmi_noloop_table
+    - LP: #580664, #615548
+  * Input: twl40300-keypad - fix handling of "all ground" rows
+    - LP: #615548
+  * ARM: 6201/1: RealView: Do not use outer_sync() on ARM11MPCore boards
+    with L220
+    - LP: #615548
+  * ARM: 6226/1: fix kprobe bug in ldr instruction emulation
+    - LP: #615548
+  * x86: Do not try to disable hpet if it hasn't been initialized before
+    - LP: #615548
+  * staging: rtl8192su: add USB VID/PID for HWNUm-300
+    - LP: #615548
+  * Staging: rtl8192su: add USB ID for 0bda:8171
+    - LP: #615548
+  * USB: obey the sysfs power/wakeup setting
+    - LP: #615548
+  * USB: g_serial: don't set low_latency flag
+    - LP: #615548
+  * USB: g_serial: fix tty cleanup on unload
+    - LP: #615548
+  * USB: option: add support for 1da5:4518
+    - LP: #615548
+  * USB: Add PID for Sierra 250U to drivers/usb/serial/sierra.c
+    - LP: #599569, #615548
+  * USB: ftdi_sio: support for Signalyzer tools based on FTDI chips
+    - LP: #615548
+  * USB: option: Add support for AMOI Skypephone S2
+    - LP: #615548
+  * USB: adds Artisman USB dongle to list of quirky devices
+    - LP: #615548
+  * USB: sisusbvga: Fix for USB 3.0
+    - LP: #615548
+  * USB: add quirk for Broadcom BT dongle
+    - LP: #615548
+  * USB: FTDI: Add support for the RT System VX-7 radio programming cable
+    - LP: #615548
+  * ethtool: Fix potential user buffer overflow for ETHTOOL_{G, S}RXFH
+    - LP: #615548
+  * ext4: Fix potential quota deadlock
+    - LP: #615548
+  * ext4: replace BUG() with return -EIO in ext4_ext_get_blocks
+    - LP: #615548
+  * ext4, jbd2: Add barriers for file systems with exernal journals
+    - LP: #615548
+  * ext4: Eliminate potential double free on error path
+    - LP: #615548
+  * ext4: return correct wbc.nr_to_write in ext4_da_writepages
+    - LP: #615548
+  * ext4: Ensure zeroout blocks have no dirty metadata
+    - LP: #615548
+  * ext4: Patch up how we claim metadata blocks for quota purposes
+    - LP: #615548
+  * ext4: Fix accounting of reserved metadata blocks
+    - LP: #615548
+  * ext4: Calculate metadata requirements more accurately
+    - LP: #615548
+  * ext4: Handle -EDQUOT error on write
+    - LP: #615548
+  * ext4: Fix quota accounting error with fallocate
+    - LP: #615548
+  * ext4: Drop EXT4_GET_BLOCKS_UPDATE_RESERVE_SPACE flag
+    - LP: #615548
+  * ext4: Use bitops to read/modify EXT4_I(inode)->i_state
+    - LP: #615548
+  * ext4: Fix BUG_ON at fs/buffer.c:652 in no journal mode
+    - LP: #615548
+  * ext4: Add flag to files with blocks intentionally past EOF
+    - LP: #615548
+  * ext4: Fix fencepost error in chosing choosing group vs file
+    preallocation.
+    - LP: #615548
+  * ext4: fix error handling in migrate
+    - LP: #615548
+  * ext4: explicitly remove inode from orphan list after failed direct io
+    - LP: #615548
+  * ext4: Handle non empty on-disk orphan link
+    - LP: #615548
+  * ext4: make "offset" consistent in ext4_check_dir_entry()
+    - LP: #615548
+  * ext4: Fix insertion point of extent in mext_insert_across_blocks()
+    - LP: #615548
+  * ext4: Fix the NULL reference in double_down_write_data_sem()
+    - LP: #615548
+  * ext4: Code cleanup for EXT4_IOC_MOVE_EXT ioctl
+    - LP: #615548
+  * ext4: Fix estimate of # of blocks needed to write indirect-mapped files
+    - LP: #615548
+  * ext4: Fixed inode allocator to correctly track a flex_bg's used_dirs
+    - LP: #615548
+  * ext4: Fix possible lost inode write in no journal mode
+    - LP: #615548
+  * ext4: Fix buffer head leaks after calls to ext4_get_inode_loc()
+    - LP: #615548
+  * ext4: Issue the discard operation *before* releasing the blocks to be
+    reused
+    - LP: #615548
+  * ext4: check missed return value in ext4_sync_file()
+    - LP: #615548
+  * ext4: fix memory leaks in error path handling of ext4_ext_zeroout()
+    - LP: #615548
+  * ext4: Remove unnecessary call to ext4_get_group_desc() in mballoc
+    - LP: #615548
+  * ext4: rename ext4_mb_release_desc() to ext4_mb_unload_buddy()
+    - LP: #615548
+  * ext4: allow defrag (EXT4_IOC_MOVE_EXT) in 32bit compat mode
+    - LP: #615548
+  * ext4: fix quota accounting in case of fallocate
+    - LP: #615548
+  * ext4: check s_log_groups_per_flex in online resize code
+    - LP: #615548
+  * ext4: don't return to userspace after freezing the fs with a mutex held
+    - LP: #615548
+  * ext4: stop issuing discards if not supported by device
+    - LP: #615548
+  * ext4: don't scan/accumulate more pages than mballoc will allocate
+    - LP: #615548
+  * ext4: Do not zero out uninitialized extents beyond i_size
+    - LP: #615548
+  * ext4: clean up inode bitmaps manipulation in ext4_free_inode
+    - LP: #615548
+  * ext4: init statistics after journal recovery
+    - LP: #615548
+  * ext4: Remove extraneous newlines in ext4_msg() calls
+    - LP: #615548
+  * ext4: Prevent creation of files larger than RLIMIT_FSIZE using
+    fallocate
+    - LP: #615548
+  * ext4: check for a good block group before loading buddy pages
+    - LP: #615548
+  * ext4: Show journal_checksum option
+    - LP: #615548
+  * ext4: Use bitops to read/modify i_flags in struct ext4_inode_info
+    - LP: #615548
+  * ext4: Avoid crashing on NULL ptr dereference on a filesystem error
+    - LP: #615548
+  * ext4: Clear the EXT4_EOFBLOCKS_FL flag only when warranted
+    - LP: #615548
+  * ext4: restart ext4_ext_remove_space() after transaction restart
+    - LP: #615548
+  * ext4: Conditionally define compat ioctl numbers
+    - LP: #615548
+  * ext4: Fix compat EXT4_IOC_ADD_GROUP
+    - LP: #615548
+  * ext4: Make fsync sync new parent directories in no-journal mode
+    - LP: #615548
+  * KVM: MMU: Remove user access when allowing kernel access to gpte.w=0
+    page
+    - LP: #615548
+  * KVM: SVM: Handle MCEs early in the vmexit process
+    - LP: #615548
+  * KVM: SVM: Implement workaround for Erratum 383
+    - LP: #615548
+  * KVM: MMU: invalidate and flush on spte small->large page size change
+    - LP: #615548
+  * futex: futex_find_get_task remove credentails check
+    - LP: #615548
+  * GFS2: Fix up system xattrs
+    - LP: #615548
+  * PM / x86: Save/restore MISC_ENABLE register
+    - LP: #615548
+  * ACPI: skip checking BM_STS if the BIOS doesn't ask for it
+    - LP: #615548
+  * ACPI: Unconditionally set SCI_EN on resume
+    - LP: #615548
+  * libertas/sdio: 8686: set ECSI bit for 1-bit transfers
+    - LP: #615548
+  * dm9000: fix "BUG: spinlock recursion"
+    - LP: #615548
+  * firmware_class: fix memory leak - free allocated pages
+    - LP: #615548
+  * revert "[CPUFREQ] remove rwsem lock from CPUFREQ_GOV_STOP call (second
+    call site)"
+    - LP: #615548
+  * ALSA: Echoaudio, fix Guru Meditation #00000005.48454C50
+    - LP: #615548
+  * V4L/DVB: dvb-core: Fix ULE decapsulation bug
+    - LP: #615548
+  * V4L/DVB: FusionHDTV: Use quick reads for I2C IR device probing
+    - LP: #615548
+  * forcedeth: fix tx limit2 flag check
+    - LP: #615548
+  * staging: rtl8192su: add Support for Belkin F5D8053 v6
+    - LP: #615548
+  * MIPS FPU emulator: allow Cause bits of FCSR to be writeable by ctc1
+    - LP: #615548
+  * V4L/DVB: budget: Select correct frontends
+    - LP: #615548
+  * cxgb3: fix linkup issue
+    - LP: #615548
+  * mac80211: fix supported rates IE if AP doesn't give us it's rates
+    - LP: #615548
+  * V4L/DVB: uvcvideo: Add support for unbranded Arkmicro 18ec:3290 webcams
+    - LP: #615548
+  * V4L/DVB: uvcvideo: Add support for Packard Bell EasyNote MX52
+    integrated webcam
+    - LP: #615548
+  * V4L/DVB: uvcvideo: Add support for V4L2_PIX_FMT_Y16
+    - LP: #615548
+  * iwlagn: verify flow id in compressed BA packet
+    - LP: #615548
+  * kbuild: Fix modpost segfault
+    - LP: #615548
+  * eeepc-laptop: check wireless hotplug events
+    - LP: #615548
+  * Fix spinaphore down_spin()
+    - LP: #615548
+  * ath5k: initialize ah->ah_current_channel
+    - LP: #615548
+  * Input: RX51 keymap - fix recent compile breakage
+    - LP: #615548
+  * V4L/DVB (13830): uvcvideo: add another YUYV format GUID for iSight
+    cameras
+    - LP: #615548
+  * Linux 2.6.32.17
+    - LP: #615548
+  * drm/i915: fix hibernation since i915 self-reclaim fixes
+    - LP: #615548
+  * drm/i915: add 'reclaimable' to i915 self-reclaimable page allocations
+    - LP: #615548
+  * i915: fix lock imbalance on error path...
+    - LP: #615548
+  * drm/i915: Define MI_ARB_STATE bits
+    - LP: #615548
+  * drm/i915: enable low power render writes on GEN3 hardware.
+    - LP: #615548
+  * drm/i915: Make G4X-style PLL search more permissive
+    - LP: #615548
+  * drm/radeon/r200: handle more hw tex coord types
+    - LP: #615548
+  * drm/radeon/r100/r200: fix calculation of compressed cube maps
+    - LP: #615548
+  * drm/radeon/kms: CS checker texture fixes for r1xx/r2xx/r3xx
+    - LP: #615548
+  * drm/radeon/kms: fix shared ddc handling
+    - LP: #615548
+  * drm/radeon/kms: fix shared ddc harder
+    - LP: #615548
+  * drm/radeon/kms: add quirk for ASUS HD 3600 board
+    - LP: #615548
+  * drm/radeon/kms: fix possible mis-detection of sideport on rs690/rs740
+    - LP: #615548
+  * drm/radeon/kms: fix legacy LVDS dpms sequence
+    - LP: #615548
+  * drm/radeon/kms: fix legacy tv-out pal mode
+    - LP: #615548
+  * Linux 2.6.32.17+drm33.7
+    - LP: #615548
+  * (pre-stable) writeback: remove the always false
+    bdi_cap_writeback_dirty() test
+    - LP: #543617, #585092
+  * (pre-stable) writeback: remove unused nonblocking and congestion checks
+    - LP: #543617, #585092
+  * (pre-stable) vfs: improve writeback_inodes_wb()
+    - LP: #543617, #585092
+  * (pre-stable) writeback: add missing kernel-doc notation
+    - LP: #543617, #585092
+  * (pre-stable) writeback: fix writeback completion notifications
+    - LP: #543617, #585092
+  * (pre-stable) writeback: queue work on stack in writeback_inodes_sb
+    - LP: #543617, #585092
+  * (pre-stable) writeback: enforce s_umount locking in writeback_inodes_sb
+    - LP: #543617, #585092
+  * (pre-stable) writeback: fix writeback_inodes_wb from
+    writeback_inodes_sb
+    - LP: #543617, #585092
+  * (pre-stable) writeback: simplify wakeup_flusher_threads
+    - LP: #543617, #585092
+  * (pre-stable) writeback: simplify and split bdi_start_writeback
+    - LP: #543617, #585092
+  * (pre-stable) writeback: add missing requeue_io in writeback_inodes_wb
+    - LP: #543617, #585092
+  * (pre-stable) writeback: fix pin_sb_for_writeback
+    - LP: #543617, #585092
+  * (pre-stable) writeback: remove writeback_inodes_wbc
+    - LP: #543617, #585092
+  * (pre-stable) writeback: split writeback_inodes_wb
+    - LP: #543617, #585092
+  * (pre-stable) writeback: simplify the write back thread queue
+    - LP: #543617, #585092
+  * (pre-stable) Fix compiling NFS when backporting writeback
+    - LP: #543617, #585092
+  * sched: cgroup: Implement different treatment for idle shares
+    - LP: #620755
+  * mm: fix ia64 crash when gcore reads gate area
+    - LP: #620755
+  * acl trouble after upgrading ubuntu
+    - LP: #620755
+  * comedi: Uncripple 8255-based DIO subdevices
+    - LP: #620755
+  * NFS: kswapd must not block in nfs_release_page
+    - LP: #620755
+  * PARISC: led.c - fix potential stack overflow in led_proc_write()
+    - LP: #620755
+  * arm/imx/gpio: add spinlock protection
+    - LP: #620755
+  * parisc: pass through '\t' to early (iodc) console
+    - LP: #620755
+  * amd64_edac: Fix DCT base address selector
+    - LP: #620755
+  * amd64_edac: Correct scrub rate setting
+    - LP: #620755
+  * e1000e: don't inadvertently re-set INTX_DISABLE
+    - LP: #620755
+  * e1000e: 82577/82578 PHY register access issues
+    - LP: #620755
+  * 9p: strlen() doesn't count the terminator
+    - LP: #620755
+  * ath9k: enable serialize_regmode for non-PCIE AR9160
+    - LP: #620755
+  * ath9k_hw: fix an off-by-one error in the PDADC boundaries calculation
+    - LP: #620755
+  * ath9k: fix TSF after reset on AR913x
+    - LP: #620755
+  * ath9k: fix yet another buffer leak in the tx aggregation code
+    - LP: #620755
+  * iwlwifi: fix scan abort
+    - LP: #620755
+  * cfg80211: ignore spurious deauth
+    - LP: #620755
+  * cfg80211: don't get expired BSSes
+    - LP: #620755
+  * xfs: prevent swapext from operating on write-only files
+    - LP: #620755
+  * SCSI: enclosure: fix error path - actually return ERR_PTR() on error
+    - LP: #620755
+  * GFS2: rename causes kernel Oops
+    - LP: #620755
+  * slow-work: use get_ref wrapper instead of directly calling get_ref
+    - LP: #620755
+  * CIFS: Remove __exit mark from cifs_exit_dns_resolver()
+    - LP: #620755
+  * CIFS: Fix compile error with __init in cifs_init_dns_resolver()
+    definition
+    - LP: #620755
+  * xen: drop xen_sched_clock in favour of using plain wallclock time
+    - LP: #620755
+  * ssb: do not read SPROM if it does not exist
+    - LP: #620755
+  * ssb: Look for SPROM at different offset on higher rev CC
+    - LP: #620755
+  * ssb: fix NULL ptr deref when pcihost_wrapper is used
+    - LP: #620755
+  * ssb: Handle alternate SSPROM location
+    - LP: #620755
+  * Linux 2.6.32.18
+    - LP: #620755
+  * ata_piix: fix locking around SIDPR access
+    - LP: #622877
+  * powerpc: fix build with make 3.82
+    - LP: #622877
+  * nvram: Fix write beyond end condition; prove to gcc copy is safe
+    - LP: #622877
+  * x86: Add memory modify constraints to xchg() and cmpxchg()
+    - LP: #622877
+  * x86, vmware: Preset lpj values when on VMware.
+    - LP: #622877
+  * Staging: line6: needs to select SND_PCM
+    - LP: #622877
+  * Staging: panel: Prevent double-calling of parport_release - fix oops.
+    - LP: #622877
+  * PCI: Do not run NVidia quirks related to MSI with MSI disabled
+    - LP: #622877
+  * PCI: disable MSI on VIA K8M800
+    - LP: #622877
+  * solos-pci: Fix race condition in tasklet RX handling
+    - LP: #622877
+  * splice: fix misuse of SPLICE_F_NONBLOCK
+    - LP: #622877
+  * drivers/video/w100fb.c: ignore void return value / fix build failure
+    - LP: #622877
+  * ide-cd: Do not access completed requests in the irq handler
+    - LP: #622877
+  * md/raid10: fix deadlock with unaligned read during resync
+    - LP: #622877
+  * blkdev: cgroup whitelist permission fix
+    - LP: #622877
+  * eCryptfs: Handle ioctl calls with unlocked and compat functions
+    - LP: #622877
+  * ecryptfs: release reference to lower mount if interpose fails
+    - LP: #622877
+  * fs/ecryptfs/file.c: introduce missing free
+    - LP: #622877
+  * bio, fs: update RWA_MASK, READA and SWRITE to match the corresponding
+    BIO_RW_* bits
+    - LP: #622877
+  * signalfd: fill in ssi_int for posix timers and message queues
+    - LP: #622877
+  * smsc911x: Add spinlocks around registers access
+    - LP: #622877
+  * ARM: 6299/1: errata: TLBIASIDIS and TLBIMVAIS operations can broadcast
+    a faulty ASID
+    - LP: #622877
+  * ARM: 6280/1: imx: Fix build failure when including <mach/gpio.h>
+    without <linux/spinlock.h>
+    - LP: #622877
+  * USB: resizing usbmon binary interface buffer causes protection faults
+    - LP: #622877
+  * USB delay init quirk for logitech Harmony 700-series devices
+    - LP: #622877
+  * USB: serial: enabling support for Segway RMP in ftdi_sio
+    - LP: #622877
+  * USB: option: Huawei ETS 1220 support added
+    - LP: #622877
+  * USB: option: add huawei k3765 k4505 devices to work properly
+    - LP: #622877
+  * USB: ftdi_sio: device id for Navitator
+    - LP: #622877
+  * USB: cp210x: Add four new device IDs
+    - LP: #622877
+  * USB: usbtest: avoid to free coherent buffer in atomic context
+    - LP: #622877
+  * USB: fix thread-unsafe anchor utiliy routines
+    - LP: #622877
+  * drm/edid: Fix the HDTV hack sync adjustment
+    - LP: #622877
+  * Bluetooth: Added support for controller shipped with iMac i5
+    - LP: #622877
+  * jfs: don't allow os2 xattr namespace overlap with others
+    - LP: #622877
+  * arp_notify: allow drivers to explicitly request a notification event.
+    - LP: #622877
+  * xen: netfront: explicitly generate arp_notify event after migration.
+    - LP: #622877
+  * net: Fix NETDEV_NOTIFY_PEERS to not conflict with
+    NETDEV_BONDING_DESLAVE.
+    - LP: #622877
+  * irq: Add new IRQ flag IRQF_NO_SUSPEND
+    - LP: #622877
+  * xen: Do not suspend IPI IRQs.
+    - LP: #622877
+  * drm/i915: Use RSEN instead of HTPLG for tfp410 monitor detection.
+    - LP: #622877
+  * Btrfs: Avoid superfluous tree-log writeout
+    - LP: #622877
+  * Btrfs: Add btrfs_duplicate_item
+    - LP: #622877
+  * Btrfs: Rewrite btrfs_drop_extents
+    - LP: #622877
+  * Btrfs: Fix disk_i_size update corner case
+    - LP: #622877
+  * Btrfs: Avoid orphan inodes cleanup while replaying log
+    - LP: #622877
+  * Btrfs: Avoid orphan inodes cleanup during committing transaction
+    - LP: #622877
+  * Btrfs: Make fallocate(2) more ENOSPC friendly
+    - LP: #622877
+  * Btrfs: Make truncate(2) more ENOSPC friendly
+    - LP: #622877
+  * Btrfs: Pass transaction handle to security and ACL initialization
+    functions
+    - LP: #622877
+  * Btrfs: Add delayed iput
+    - LP: #622877
+  * Btrfs: Fix btrfs_drop_extent_cache for skip pinned case
+    - LP: #622877
+  * Btrfs: Fix per root used space accounting
+    - LP: #622877
+  * Btrfs: don't add extent 0 to the free space cache v2
+    - LP: #622877
+  * Btrfs: fail mount on bad mount options
+    - LP: #622877
+  * Btrfs: deny sys_link across subvolumes.
+    - LP: #622877
+  * Btrfs: Show discard option in /proc/mounts
+    - LP: #622877
+  * Btrfs: make metadata chunks smaller
+    - LP: #622877
+  * Btrfs: make sure fallocate properly starts a transaction
+    - LP: #622877
+  * btrfs: fix missing last-entry in readdir(3)
+    - LP: #622877
+  * Btrfs: align offsets for btrfs_ordered_update_i_size
+    - LP: #622877
+  * Btrfs, fix memory leaks in error paths
+    - LP: #622877
+  * Btrfs: Fix race in btrfs_mark_extent_written
+    - LP: #622877
+  * Btrfs: fix regression in orphan cleanup
+    - LP: #622877
+  * Btrfs: deal with NULL acl sent to btrfs_set_acl
+    - LP: #622877
+  * Btrfs: fix possible panic on unmount
+    - LP: #622877
+  * Btrfs: Use correct values when updating inode i_size on fallocate
+    - LP: #622877
+  * Btrfs: fix a memory leak in btrfs_init_acl
+    - LP: #622877
+  * Btrfs: run orphan cleanup on default fs root
+    - LP: #622877
+  * Btrfs: do not mark the chunk as readonly if in degraded mode
+    - LP: #622877
+  * Btrfs: check return value of open_bdev_exclusive properly
+    - LP: #622877
+  * Btrfs: check total number of devices when removing missing
+    - LP: #622877
+  * Btrfs: fix race between allocate and release extent buffer.
+    - LP: #622877
+  * Btrfs: make error return negative in btrfs_sync_file()
+    - LP: #622877
+  * Btrfs: remove BUG_ON() due to mounting bad filesystem
+    - LP: #622877
+  * Btrfs: Fix oopsen when dropping empty tree.
+    - LP: #622877
+  * Btrfs: do not try and lookup the file extent when finishing ordered io
+    - LP: #622877
+  * Btrfs: apply updated fallocate i_size fix
+    - LP: #622877
+  * Btrfs: btrfs_mark_extent_written uses the wrong slot
+    - LP: #622877
+  * Btrfs: kfree correct pointer during mount option parsing
+    - LP: #622877
+  * nohz: Introduce arch_needs_cpu
+    - LP: #622877
+  * nohz: Reuse ktime in sub-functions of tick_check_idle.
+    - LP: #622877
+  * timekeeping: Fix clock_gettime vsyscall time warp
+    - LP: #622877
+  * sched: Fix granularity of task_u/stime()
+    - LP: #622877
+  * sched, cputime: Introduce thread_group_times()
+    - LP: #622877
+  * mutex: Don't spin when the owner CPU is offline or other weird cases
+    - LP: #622877
+  * fix SBA IOMMU to handle allocation failure properly
+    - LP: #622877
+  * crypto: testmgr - Fix complain about lack test for internal used
+    algorithm
+    - LP: #622877
+  * memory hotplug: fix a bug on /dev/mem for 64-bit kernels
+    - LP: #622877
+  * x86: Fix out of order of gsi
+    - LP: #622877
+  * HWPOISON: remove the anonymous entry
+    - LP: #622877
+  * HWPOISON: abort on failed unmap
+    - LP: #622877
+  * powerpc/eeh: Fix a bug when pci structure is null
+    - LP: #622877
+  * ACPI: Fix regression where _PPC is not read at boot even when
+    ignore_ppc=0
+    - LP: #622877
+  * ext4: Make sure the MOVE_EXT ioctl can't overwrite append-only files
+    - LP: #622877
+  * ext4: Fix optional-arg mount options
+    - LP: #622877
+  * reiserfs: properly honor read-only devices
+    - LP: #622877
+  * reiserfs: fix oops while creating privroot with selinux enabled
+    - LP: #622877
+  * dlm: always use GFP_NOFS
+    - LP: #622877
+  * dlm: fix ordering of bast and cast
+    - LP: #622877
+  * dlm: send reply before bast
+    - LP: #622877
+  * ocfs2: Find proper end cpos for a leaf refcount block.
+    - LP: #622877
+  * ocfs2: Set MS_POSIXACL on remount
+    - LP: #622877
+  * Skip check for mandatory locks when unlocking
+    - LP: #622877
+  * loop: Update mtime when writing using aops
+    - LP: #622877
+  * aic79xx: check for non-NULL scb in ahd_handle_nonpkt_busfree
+    - LP: #622877
+  * ibmvfc: Fix command completion handling
+    - LP: #622877
+  * ibmvfc: Reduce error recovery timeout
+    - LP: #622877
+  * md/raid1: delay reads that could overtake behind-writes.
+    - LP: #622877
+  * mm: fix corruption of hibernation caused by reusing swap during image
+    saving
+    - LP: #622877
+  * Linux 2.6.32.19
+    - LP: #622877
+  * Linux 2.6.32.20
+    - LP: #622882
+  * memstick: fix hangs on unexpected device removal in mspro_blk
+    - LP: #625392
+  * ASoC: Fix inverted mute controls for WM8580
+    - LP: #625392
+  * ASoC: Remove DSP mode support for WM8776
+    - LP: #625392
+  * ALSA: riptide - Fix detection / load of firmware files
+    - LP: #625392
+  * ALSA: emu10k1 - delay the PCM interrupts (add pcm_irq_delay parameter)
+    - LP: #625392
+  * ALSA: hda - Fix missing stream for second ADC on Realtek ALC260 HDA
+    codec
+    - LP: #625392
+  * ocfs2: do not overwrite error codes in ocfs2_init_acl
+    - LP: #625392
+  * ocfs2/dlm: fix a dead lock
+    - LP: #625392
+  * ocfs2 fix o2dlm dlm run purgelist (rev 3)
+    - LP: #625392
+  * ocfs2: Count more refcount records in file system fragmentation.
+    - LP: #625392
+  * ocfs2/dlm: avoid incorrect bit set in refmap on recovery master
+    - LP: #625392
+  * ocfs2/dlm: remove potential deadlock -V3
+    - LP: #625392
+  * x86, hotplug: Serialize CPU hotplug to avoid bringup concurrency issues
+    - LP: #625392
+  * x86, apic: Fix apic=debug boot crash
+    - LP: #625392
+  * Fix the nested PR lock calling issue in ACL
+    - LP: #625392
+  * hwmon: (pc87360) Fix device resource declaration
+    - LP: #625392
+  * ARM: Tighten check for allowable CPSR values
+    - LP: #625392
+  * nfs: Add "lookupcache" to displayed mount options
+    - LP: #625392
+  * ath5k: disable ASPM L0s for all cards
+    - LP: #625392
+  * pxa3xx: fix ns2cycle equation
+    - LP: #625392
+  * dm mpath: fix NULL pointer dereference when path parameters missing
+    - LP: #625392
+  * dm ioctl: release _hash_lock between devices in remove_all
+    - LP: #625392
+  * mm: make the vma list be doubly linked
+    - LP: #625392
+  * mm: make the mlock() stack guard page checks stricter
+    - LP: #625392
+  * mm: make stack guard page logic use vm_prev pointer
+    - LP: #625392
+  * slab: fix object alignment
+    - LP: #625392
+  * sunxvr500: Ignore secondary output PCI devices.
+    - LP: #625392
+  * sparc64: Add missing ID to parport probing code.
+    - LP: #625392
+  * sparc64: Fix rwsem constant bug leading to hangs.
+    - LP: #625392
+  * sparc64: Fix atomic64_t routine return values.
+    - LP: #625392
+  * net: Fix a memmove bug in dev_gro_receive()
+    - LP: #625392
+  * isdn: fix information leak
+    - LP: #625392
+  * act_nat: the checksum of ICMP doesn't have pseudo header
+    - LP: #625392
+  * vmscan: raise the bar to PAGEOUT_IO_SYNC stalls
+    - LP: #625392
+  * pcmcia: avoid buffer overflow in pcmcia_setup_isa_irq
+    - LP: #625392
+  * ext4: consolidate in_range() definitions
+    - LP: #625392
+  * Oprofile: Change CPUIDS from decimal to hex, and add some comments
+    - LP: #625392
+  * oprofile: add support for Intel processor model 30
+    - LP: #625392
+  * fixes for using make 3.82
+    - LP: #625392
+  * ALSA: intel8x0: Mute External Amplifier by default for ThinkPad X31
+    - LP: #619439, #625392
+  * netlink: fix compat recvmsg
+    - LP: #625392
+  * powerpc: Fix typo in uImage target
+    - LP: #625392
+  * USB: option: add Celot CT-650
+    - LP: #625392
+  * USB: add device IDs for igotu to navman
+    - LP: #625392
+  * USB: pl2303: New vendor and product id
+    - LP: #625392
+  * USB: CP210x Fix Break On/Off
+    - LP: #625392
+  * USB: ftdi_sio: fix endianess of max packet size
+    - LP: #625392
+  * USB: io_ti: check firmware version before updating
+    - LP: #625392
+  * USB: xhci: Remove buggy assignment in next_trb()
+    - LP: #625392
+  * USB: ftdi_sio: Add ID for Ionics PlugComputer
+    - LP: #625392
+  * USB: ftdi_sio: add product ID for Lenz LI-USB
+    - LP: #625392
+  * x86, apic: ack all pending irqs when crashed/on kexec
+    - LP: #625392
+  * Linux 2.6.32.21
+    - LP: #625392
+
+ -- Brad Figg <brad.figg@canonical.com>  Thu, 09 Sep 2010 10:24:41 -0700
+
+linux-mvl-dove (2.6.32-209.25) lucid-proposed; urgency=low
+
+  [ Stefan Bader ]
+
+  * Rebased to 2.6.32-24.42
+
+  [ Eric Miao ]
+
+  * Sync config with Dove LSP 5.3.2
+    - LP: #611634
+
+  [ Upstream Kernel Changes ]
+
+  * Revert "erratum of VLDR instruction bug in Thumb-2 mode"
+    - LP: #611634
+  * KG2: Add input/output timing auto-configuration functions (daemon
+    required)
+    - LP: #611634
+  * AV-D1 X0 EC key driver
+    - LP: #611634
+  * move VGA EDID to i2c bus 1 (avd1r2 ECN6)
+    - LP: #611634
+  * dove: add some drivers and code dependency on MV_HAL_DRIVERS_SUPPORT
+    - LP: #611634
+  * Hwmon: Add support for setting the Overheat and Overcool temperature
+    thresholds.
+    - LP: #611634
+  * chromium : enable CONFIG_SECURITY_FILE_CAPABILITIES in dove_defconfig
+    - LP: #611634
+  * chromium : enable CONFIG_BLK_DEV_DM and CONFIG_DM_CRYPT to let
+    cryptohome work
+    - LP: #611634
+  * pmu: reduce code to make it fit into sram
+    - LP: #611634
+  * refine the mechanism for multiple lcd controller to store color key
+    related registers when suspending.
+    - LP: #611634
+  * Support for command-line tool: kg2cfg
+    - LP: #611634
+  * ANX7150: Fix screen displays on and off several times for some HDMI TVs
+    - LP: #611634
+  * Hide AD9889 debug message
+    - LP: #611634
+  * usb: fix issue when USB host ask for string descriptor and USB device
+    answer with exact 128 bytes.
+    - LP: #611634
+  * dove: add support for the temporary DB-88AP510-BP-B board
+    - LP: #611634
+  * dove: add support for mpp modes used by DB-88AP510-BP-B board
+    - LP: #611634
+  * sound: added codec driver for ALC655
+    - LP: #611634
+  * sound: cleaned compilation warning in dove avengers ac97
+    - LP: #611634
+  * sound: add board support for AC97 driver for dove-db-b board
+    - LP: #611634
+  * mv_sata: fix bug in the scsi translation layer
+    - LP: #611634
+  * mvSata: add support for KW2 sata
+    - LP: #611634
+  * Exernal VGA clock for Dove DB
+    - LP: #611634
+  * NAND: Driver reorganization and support for new 24bit ECC devices
+    - LP: #611634
+  * NAND: change read delay from absolut to RnB based
+    - LP: #611634
+  * VMETA PM function: add a wait queue for syncing the vmeta
+    suspend/resume
+    - LP: #611634
+  * dove: enable the new nand driver
+    - LP: #611634
+  * dove: fix power management support for new db board
+    - LP: #611634
+  * galcore: sync with gc600_driver
+    - LP: #611634
+  * dove: add LFE and Surround dai to dove db-b
+    - LP: #611634
+  * convert idt clock generator to i2c platform driver
+    - LP: #611634
+  * dove giga: add wake on lan support
+    - LP: #611634
+  * dove: set gpio #1 to 1 to driver the giga phy reset
+    - LP: #611634
+  * dove: fix build issue in clock.h
+    - LP: #611634
+  * dove: add clk_dev insterface to the idt clock generator
+    - LP: #611634
+  * dove: enable the idt clock generator driver
+    - LP: #611634
+  * dove LCD: add support for using external clk reference for A0
+    - LP: #611634
+  * remove unused code
+    - LP: #611634
+  * avoid phy reset on resume when wol enabled
+    - LP: #611634
+  * dove: fix SPI flash model and size found on db board
+    - LP: #611634
+  * dove: fix typo in dove-db mpp's description
+    - LP: #611634
+  * dove: fix sdio workaround to config all sd gpio's as input
+    - LP: #611634
+  * sdhci-mv: fix bug when that caused to toggle the wrong bit in the
+    function select register
+    - LP: #611634
+  * NAND: PIO support for naked symantics
+    - LP: #611634
+  * NAND: changes to adapt to Uboot driver
+    - LP: #611634
+  * NAND: Bus timing optimizations for the Samsung K9HBG08U1A
+    - LP: #611634
+  * dove sound: enable surround and center outputs on Realtek 655 codec for
+    any channels number
+    - LP: #611634
+  * fix out of memory problem when playing moives and enter display blank
+    mode.
+    - LP: #611634
+  * fix EDID issue: LCD0 get edid from I2C 0x3f, LCD1 from I2C 0x50.
+    (support E-EDID feature)
+    - LP: #611634
+  * remove unwanted space.
+    - LP: #611634
+  * Add dynamic detect monitor connection and get EDID information.
+    - LP: #611634
+  * add fake EDID for LCD panel on LCD0
+    - LP: #611634
+  * dove: update debugger reset/unreset code in deepidle code for Dove-A0
+    - LP: #611634
+  * dove sound: disble debug mode in RealTek 655 codec
+    - LP: #611634
+  * video: enable building the adi9889 display driver as module
+    - LP: #611634
+  * video: make the adi9889 detect i2c client (edid or ) using driver_data
+    instead of i2c address
+    - LP: #611634
+  * dove: add the adi9889 i2c device to dove db board
+    - LP: #611634
+  * dove db: support for adi9889 HDMI to DVI module
+    - LP: #611634
+  * video: add ths display driver
+    - LP: #611634
+  * dove db: add ths8200 and board parameter for the LCD2DVI module
+    - LP: #611634
+  * galcore: sync Makefile
+    - LP: #611634
+  * bmm : sync with bmm-lib
+    - LP: #611634
+  * idt clock: add error messages
+    - LP: #611634
+  * idt clock: add sysfs file for each output clock
+    - LP: #611634
+  * adi9889 display: enable 1080i mode
+    - LP: #611634
+  * dove: add support for 88AP510 rev A0
+    - LP: #611634
+  * idt clock: use i2c messages for reading
+    - LP: #611634
+  * idt clock: configure the Loop filter
+    - LP: #611634
+  * dove pm: fix build error when mv6xxx i2c expander disabled
+    - LP: #611634
+  * idt clock: disable pll's by default
+    - LP: #611634
+  * dovefb: disable external clock when entering blank mode
+    - LP: #611634
+  * dove: support using external lcd clocks for dove db
+    - LP: #611634
+  * mtd nand: fix bug in orion_nfs_hal when addressing orion_nfc_info
+    structure
+    - LP: #611634
+  * dove: fix bug in clk setting from command line
+    - LP: #611634
+  * dove: enable co-processor dual issue mode for Dove rev. A0
+    - LP: #611634
+  * tools: add tool for reading/writing ethernet phy registers
+    - LP: #611634
+  * erratum of VLDR instruction bug in Thumb-2 mode. The workaround should
+    not affect by the setting of ai_usermode.
+    - LP: #611634
+  * Staging: android: binder: Create dedicated workqueue for binder
+    deferred work
+    - LP: #611634
+  * dove: skip VLDR Thumb errara workaround for the cpu revisions where
+    that bug is fixed
+    - LP: #611634
+  * DOVE PM: Deep-Idle debugger reset fix in A0
+    - LP: #611634
+  * dove: enable DeepIdle feature by default
+    - LP: #611634
+  * dove: make the LCD clk settings depend on A0 revision of the chip
+    - LP: #611634
+  * dove: the DB revision B board have the same ID is DB rev A boards
+    - LP: #611634
+  * dove: fixed bug in the PMU interrupts handler when clearing the cause
+    register
+    - LP: #611634
+  * adi display: keep the default edid address
+    - LP: #611634
+  * dove: set the edid information for all machines
+    - LP: #611634
+  * GC600: Fix bug that cause to crash when doing hibernate Driver tries to
+    enable clock gating during GPU hardware initialization. CPU needs to
+    stall a little time to wait for GPU ready
+    - LP: #611634
+  * Dove PM: invalidate L2 entry that get filled due to temporary mapping
+    - LP: #611634
+  * dove: use read modify write when updating the Auxiliary Funcion modes
+    register
+    - LP: #611634
+  * dove: print the value of Auxiliary Functional Modes Control
+    - LP: #611634
+  * dove: use marvell toolchain for building the tools
+    - LP: #611634
+  * dove: update support for the SB videoplug board
+    - LP: #611634
+
+  [ Ubuntu: 2.6.32-24.42 ]
+
+  * (pre-stable) drm/i915: add PANEL_UNLOCK_REGS definition
+    - LP: #561802, #578673
+  * (pre-stable) drm/i915: make sure eDP panel is turned on
+    - LP: #578673
+  * (pre-stable) drm/i915: make sure we shut off the panel in eDP configs
+    - LP: #578673
+
+ -- Stefan Bader <stefan.bader@canonical.com>  Fri, 20 Aug 2010 16:16:39 +0200
+
+linux-mvl-dove (2.6.32-208.24) lucid-security; urgency=low
+
+  [ Stefan Bader ]
+
+  * Rebased to 2.6.32-24.41
+
+  [ Ubuntu: 2.6.32-24.41 ]
+
+  * (pre-stable) ext4: fix freeze deadlock under IO
+    - LP: #595489
+  * drm: Initialize ioctl struct when no user data is present
+    - CVE-2010-2803
+  * can: add limit for nframes and clean up signed/unsigned variables
+    - CVE-2010-2959
+  * mm: keep a guard page below a grow-down stack segment
+    - CVE-2010-2240
+  * mm: fix missing page table unmap for stack guard page failure case
+    - CVE-2010-2240
+  * mm: fix page table unmap for stack guard page properly
+    - CVE-2010-2240
+  * mm: fix up some user-visible effects of the stack guard page
+    - CVE-2010-2240
+  * x86: don't send SIGBUS for kernel page faults
+    - CVE-2010-2240
+
+ -- Stefan Bader <stefan.bader@canonical.com>  Wed, 18 Aug 2010 15:03:41 +0200
+
+linux-mvl-dove (2.6.32-207.21) lucid-security; urgency=low
+
+  [ Stefan Bader ]
+
+  * Rebased to 2.6.32-24.39
+
+  [ Ubuntu: 2.6.32-24.39 ]
+
+  * sctp: Fix skb_over_panic resulting from multiple invalid parameter
+    errors (CVE-2010-1173) (v4)
+    - CVE-2010-1173
+  * sctp: fix append error cause to ERROR chunk correctly
+    - CVE-2010-1173
+  * GFS2: Fix writing to non-page aligned gfs2_quota structures
+    - CVE-2010-1436
+  * KEYS: find_keyring_by_name() can gain access to a freed keyring
+    - CVE-2010-1437
+  * GFS2: Fix permissions checking for setflags ioctl()
+    - CVE-2010-1641
+  * Btrfs: should add a permission check for setfacl
+    - CVE-2010-2071
+  * ecryptfs: Bugfix for error related to ecryptfs_hash_buckets
+    - CVE-2010-2492
+
+ -- Stefan Bader <stefan.bader@canonical.com>  Wed, 21 Jul 2010 11:36:28 +0200
+
+linux-mvl-dove (2.6.32-207.20) lucid-proposed; urgency=low
+
+  [ Brad Figg ]
+
+  * Rebased to 2.6.32-24.38
+
+  [ Ubuntu: 2.6.32-24.38 ]
+
+  * SAUCE: dell-laptop: fire SMI when toggling hardware killswitch
+    (revised)
+    - LP: #590607
+  * sfc: Wait at most 10ms for the MC to finish reading out MAC statistics
+    - LP: #590783
+  * sfc: Always close net device at the end of a disabling reset
+    - LP: #590783
+  * sfc: Change falcon_probe_board() to fail for unsupported boards
+    - LP: #590783
+  * ext4: Fix potential quota deadlock
+    - LP: #588069
+  * jbd: jbd-debug and jbd2-debug should be writable
+    - LP: #588069
+  * ext4: replace BUG() with return -EIO in ext4_ext_get_blocks
+    - LP: #588069
+  * ext4, jbd2: Add barriers for file systems with exernal journals
+    - LP: #588069
+  * ext4: Eliminate potential double free on error path
+    - LP: #588069
+  * ext4: return correct wbc.nr_to_write in ext4_da_writepages
+    - LP: #588069
+  * ext4: Ensure zeroout blocks have no dirty metadata
+    - LP: #588069
+  * ext4: Patch up how we claim metadata blocks for quota purposes
+    - LP: #588069
+  * ext4: Fix accounting of reserved metadata blocks
+    - LP: #588069
+  * ext4: Calculate metadata requirements more accurately
+    - LP: #588069
+  * ext4: Handle -EDQUOT error on write
+    - LP: #588069
+  * ext4: Fix quota accounting error with fallocate
+    - LP: #588069
+  * ext4: Drop EXT4_GET_BLOCKS_UPDATE_RESERVE_SPACE flag
+    - LP: #588069
+  * ext4: Use bitops to read/modify EXT4_I(inode)->i_state
+    - LP: #588069
+  * ext4: Fix BUG_ON at fs/buffer.c:652 in no journal mode
+    - LP: #588069
+  * ext4: Add flag to files with blocks intentionally past EOF
+    - LP: #588069
+  * ext4: Fix fencepost error in chosing choosing group vs file
+    preallocation.
+    - LP: #588069
+  * ext4: fix error handling in migrate
+    - LP: #588069
+  * ext4: explicitly remove inode from orphan list after failed direct io
+    - LP: #588069
+  * ext4: Handle non empty on-disk orphan link
+    - LP: #588069
+  * ext4: make "offset" consistent in ext4_check_dir_entry()
+    - LP: #588069
+  * ext4: Fix insertion point of extent in mext_insert_across_blocks()
+    - LP: #588069
+  * ext4: Fix the NULL reference in double_down_write_data_sem()
+    - LP: #588069
+  * ext4: Code cleanup for EXT4_IOC_MOVE_EXT ioctl
+    - LP: #588069
+  * ext4: Fix estimate of # of blocks needed to write indirect-mapped files
+    - LP: #588069
+  * ext4: Fixed inode allocator to correctly track a flex_bg's used_dirs
+    - LP: #588069
+  * ext4: Fix possible lost inode write in no journal mode
+    - LP: #588069
+  * ext4: Fix buffer head leaks after calls to ext4_get_inode_loc()
+    - LP: #588069
+  * ext4: Issue the discard operation *before* releasing the blocks to be
+    reused
+    - LP: #588069
+  * ext4: check missed return value in ext4_sync_file()
+    - LP: #588069
+  * ext4: fix memory leaks in error path handling of ext4_ext_zeroout()
+    - LP: #588069
+  * ext4: Remove unnecessary call to ext4_get_group_desc() in mballoc
+    - LP: #588069
+  * ext4: rename ext4_mb_release_desc() to ext4_mb_unload_buddy()
+    - LP: #588069
+  * ext4: allow defrag (EXT4_IOC_MOVE_EXT) in 32bit compat mode
+    - LP: #588069
+  * ext4: fix quota accounting in case of fallocate
+    - LP: #588069
+  * ext4: check s_log_groups_per_flex in online resize code
+    - LP: #588069
+  * ext4: don't return to userspace after freezing the fs with a mutex held
+    - LP: #588069
+  * ext4: stop issuing discards if not supported by device
+    - LP: #588069
+  * ext4: don't scan/accumulate more pages than mballoc will allocate
+    - LP: #588069
+  * ext4: Do not zero out uninitialized extents beyond i_size
+    - LP: #588069
+  * ext4: clean up inode bitmaps manipulation in ext4_free_inode
+    - LP: #588069
+  * ext4: init statistics after journal recovery
+    - LP: #588069
+  * ext4: Remove extraneous newlines in ext4_msg() calls
+    - LP: #588069
+  * ext4: Prevent creation of files larger than RLIMIT_FSIZE using
+    fallocate
+    - LP: #588069
+  * ext4: check for a good block group before loading buddy pages
+    - LP: #588069
+  * ext4: Show journal_checksum option
+    - LP: #588069
+  * ext4: Use bitops to read/modify i_flags in struct ext4_inode_info
+    - LP: #588069
+  * ext4: Avoid crashing on NULL ptr dereference on a filesystem error
+    - LP: #588069
+  * ext4: Clear the EXT4_EOFBLOCKS_FL flag only when warranted
+    - LP: #588069
+  * ext4: restart ext4_ext_remove_space() after transaction restart
+    - LP: #588069
+  * ext4: Conditionally define compat ioctl numbers
+    - LP: #588069
+  * ext4: Fix compat EXT4_IOC_ADD_GROUP
+    - LP: #588069
+  * ext4: Make fsync sync new parent directories in no-journal mode
+    - LP: #588069
+  * (pre-stable) ahci,ata_generic: let ata_generic handle new MBP w/ MCP89
+    - LP: #576601
+  * (pre-stable) ata_generic: implement ATA_GEN_* flags and force enable
+    DMA on MBP 7,1
+    - LP: #576601
+
+ -- Brad Figg <brad.figg@canonical.com>  Wed, 07 Jul 2010 08:47:28 -0700
+
+linux-mvl-dove (2.6.32-206.19) lucid-proposed; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * rebase to Ubuntu-2.6.32-23.37
+  * ehci: follow changes to echi cache handling
+    - LP: #583414
+
+  [ Eric Miao ]
+
+  * [Config]: sync with Dove LSP 5.1.1
+    - LP: #576257
+  * SAUCE: dove: avoid page table overwrite when resuming from hibernation
+    - LP: #509006
+
+  [ Upstream Kernel Changes ]
+
+  * ARM: fix highmem with VIPT cache and DMA
+    - LP: #576257
+  * dove: disable the 2G user/kernel space split and enable HIGHMEM as the
+    highmem issue fixed
+    - LP: #576257
+  * ubifs: fix hang bug when doing suspend to disk and rootfs is over ubifs
+    - LP: #576257
+  * Fix issue:suspend/resume,TSC cannot work
+    - LP: #576257
+  * (1) Fix fail to display after resume. (2) Prepare works for KG2
+    Application mode
+    - LP: #576257
+  * Fix bug: Not clear color key enable bit in configure process
+    - LP: #576257
+  * Fix bug: read wrong register. This might cause problem in A0 chip. No
+    effect for Y0/Y1/X0.
+    - LP: #576257
+  * Fix X0 L2 way 7-4 been turned off and X0 WCO setting Wrong
+    - LP: #576257
+  * Revise for X0 WCO setting
+    - LP: #576257
+  * Fix suspend/resume issues with GC600
+    - LP: #576257
+  * Fix: gpio driver can't use mpp0 as interrupt pin
+    - LP: #576257
+  * Fix hardware cursor issue with suspend/resume
+    - LP: #576257
+  * Fixed audio recording failed after suspend/resume
+    - LP: #576257
+  * Fix Power Button event reverse error
+    - LP: #576257
+  * Fix GC600 driver crash when entering hibernation
+    - LP: #576257
+  * dove pm: restore cp15 Marvell Auxiliary Function and PMC register
+    - LP: #591249
+  * dove: fix build issues when MV_HAL_DRIVERS_SUPPORT disabled
+    - LP: #591249
+  * dove: register the usb as host mode when HAL drivers disabled
+    - LP: #591249
+  * Fix wrong stride issue for RGB565 on overlay
+    - LP: #591249
+  * Refine alogrithm of filling yuv pitch length and do correction when
+    input pitch value <= 0.
+    - LP: #591249
+  * Nand: fix PIO support for 8bit devices.
+    - LP: #591249
+  * MRVL BMM module update
+    - LP: #591249
+  * BMM module: remove ioremap_xxx for kernel space VA mapping
+    - LP: #591249
+  * fix spi flash type to mx2513205d for AVD1 rev2
+    - LP: #591249
+  * Fix colorkey issue with PM
+    - LP: #591249
+
+  [ Ubuntu: 2.6.32-23.37 ]
+
+  * SAUCE: drm/radeon/kms/atom: fix dual-link DVI on DCE3.2/4.0
+    - LP: #564559
+  * [Config] ports -- build in dm-mod to enable LVM boot
+    - LP: #560717
+  * tools -- fix perf version extraction for multi-part flavours
+    - LP: #555130
+  * [Config] enforce -- ensure dm_mod is built-in for LVM
+    - LP: #560717
+  * update to ubuntu-debian:7e708d33054c373faf41da23b73e8b48c342d958
+    - LP: #570500, #576274
+  * Revert "(pre-stable): input: ALPS - Add signature for HP Pavilion dm3
+    laptops"
+    - LP: #550625
+  * Enable ftrace function profiler
+    - LP: #570389
+  * enforce CONFIG_TMPFS_POSIX_ACL=y
+    - LP: #575940
+  * Revert "staging/comdi -- disable"
+    - LP: #563436
+  * [Config] Enable multicast routing for sparc
+    - LP: #416266
+  * [Config] Add ahci.ko to virtual sub-flavour
+    - LP: #570542
+  * Revert "SAUCE: drm/i915: Disable FBC on 915GM and 945GM"
+    - LP: #588832
+  * [Config] Add atl1c to nic-modules udeb
+    - LP: #557130
+  * Revert "(pre-stable) iwlwifi: fix nfreed--"
+    - LP: #575853
+  * Revert "backlight: mbp_nvidia_bl - add five more MacBook variants"
+    - LP: #575853
+  * Revert "(pre-stable) pata_via: Add VIA VX900 support"
+    - LP: #575853
+  * Revert "(pre-stable) x86-32, resume: do a global tlb flush in S4
+    resume"
+    - LP: #575853
+  * Revert "x86: disable IOMMUs on kernel crash"
+    - LP: #575853
+  * Revert "sunrpc: fix peername failed on closed listener"
+    - LP: #575853
+  * Revert "sunrpc: move the close processing after do recvfrom method"
+    - LP: #575853
+  * Revert "(pre-stable) drm/edid: allow certain bogus edids to hit a fixup
+    path rather than fail"
+    - LP: #575853
+  * Revert "drm/radeon/kms: don't print error on -ERESTARTSYS."
+    - LP: #575853
+  * Revert "ath9k: fix lockdep warning when unloading module" on stable
+    kernels
+    - LP: #588832
+  * Staging: comedi: removed "depricated" from COMEDI_CB_BLOCK
+    - LP: #483343
+  * fat: fix buffer overflow in vfat_create_shortname()
+    - LP: #575853
+  * xfs: simplify inode teardown
+    - LP: #575853
+  * xfs: fix mmap_sem/iolock inversion in xfs_free_eofblocks
+    - LP: #575853
+  * xfs: I/O completion handlers must use NOFS allocations
+    - LP: #575853
+  * xfs: Wrapped journal record corruption on read at recovery
+    - LP: #575853
+  * xfs: Fix error return for fallocate() on XFS
+    - LP: #575853
+  * xfs: check for not fully initialized inodes in xfs_ireclaim
+    - LP: #575853
+  * xfs: fix timestamp handling in xfs_setattr
+    - LP: #575853
+  * xfs: Don't flush stale inodes
+    - LP: #575853
+  * xfs: Ensure we force all busy extents in range to disk
+    - LP: #575853
+  * xfs: reclaim inodes under a write lock
+    - LP: #575853
+  * xfs: Avoid inodes in reclaim when flushing from inode cache
+    - LP: #575853
+  * xfs: reclaim all inodes by background tree walks
+    - LP: #575853
+  * xfs: fix stale inode flush avoidance
+    - LP: #575853
+  * xfs: xfs_swap_extents needs to handle dynamic fork offsets
+    - LP: #575853
+  * xfs: quota limit statvfs available blocks
+    - LP: #575853
+  * xfs: don't hold onto reserved blocks on remount, ro
+    - LP: #575853
+  * xfs: remove invalid barrier optimization from xfs_fsync
+    - LP: #575853
+  * xfs: Non-blocking inode locking in IO completion
+    - LP: #575853
+  * xfs: fix locking for inode cache radix tree tag updates
+    - LP: #575853
+  * sh: Enable the mmu in start_secondary()
+    - LP: #575853
+  * sh: Fix FDPIC binary loader
+    - LP: #575853
+  * libiscsi: Fix recovery slowdown regression
+    - LP: #575853
+  * Freezer: Fix buggy resume test for tasks frozen with cgroup freezer
+    - LP: #575853
+  * iwlwifi: counting number of tfds can be free for 4965
+    - LP: #575853
+  * iwlwifi: fix nfreed--
+    - LP: #575853
+  * iwlwifi: range checking issue
+    - LP: #575853
+  * setup correct int pipe type in ar9170_usb_exec_cmd
+    - LP: #575853
+  * mac80211: move netdev queue enabling to correct spot
+    - LP: #575853
+  * mac80211: tear down all agg queues when restart/reconfig hw
+    - LP: #575853
+  * WATCHDOG: hpwdt - fix lower timeout limit
+    - LP: #575853
+  * WATCHDOG: iTCO_wdt: TCO Watchdog patch for additional Intel Cougar
+    Point DeviceIDs
+    - LP: #575853
+  * genirq: Force MSI irq handlers to run with interrupts disabled
+    - LP: #575853
+  * lis3: fix show rate for 8 bits chips
+    - LP: #575853
+  * pata_ali: Fix regression with old devices
+    - LP: #575853
+  * HID: fix oops in gyration_event()
+    - LP: #575853
+  * raw: fsync method is now required
+    - LP: #575853
+  * readahead: fix NULL filp dereference
+    - LP: #575853
+  * ALSA: mixart: range checking proc file
+    - LP: #575853
+  * ALSA: hda: Fix 0 dB offset for Lenovo Thinkpad models using AD1981
+    - LP: #551606, #575853
+  * x86, amd: Get multi-node CPU info from NodeId MSR instead of PCI config
+    space
+    - LP: #575853
+  * resource: move kernel function inside __KERNEL__
+    - LP: #575853
+  * backlight: mbp_nvidia_bl - add five more MacBook variants
+    - LP: #575853
+  * pata_via: Add VIA VX900 support
+    - LP: #575853
+  * ext3: Don't update the superblock in ext3_statfs()
+    - LP: #575853
+  * ext3: journal all modifications in ext3_xattr_set_handle
+    - LP: #575853
+  * eeepc-laptop: disable cpu speed control on EeePC 701
+    - LP: #575853
+  * eeepc-laptop: dmi blacklist to disable pci hotplug code
+    - LP: #575853
+  * eeepc-laptop: add hotplug_disable parameter
+    - LP: #575853
+  * eeepc-laptop: disable wireless hotplug for 1201N
+    - LP: #575853
+  * eeepc-laptop: disable wireless hotplug for 1005PE
+    - LP: #575853
+  * libata: disable NCQ on Crucial C300 SSD
+    - LP: #575853
+  * cifs: Fix a kernel BUG with remote OS/2 server (try #3)
+    - LP: #575853
+  * CIFS: initialize nbytes at the beginning of CIFSSMBWrite()
+    - LP: #575853
+  * iwlwifi: need check for valid qos packet before free
+    - LP: #575853
+  * ARM: 6031/1: fix Thumb-2 decompressor
+    - LP: #575853
+  * x86-32, resume: do a global tlb flush in S4 resume
+    - LP: #575853
+  * x86: hpet: Make WARN_ON understandable
+    - LP: #575853
+  * x86, hpet: Erratum workaround for read after write of HPET comparator
+    - LP: #575853
+  * x86: Fix double enable_IR_x2apic() call on SMP kernel on !SMP boards
+    - LP: #575853
+  * sched: sched_getaffinity(): Allow less than NR_CPUS length
+    - LP: #575853
+  * sched: Fix sched_getaffinity()
+    - LP: #575853
+  * NFSv4: Fall back to ordinary lookup if nfs4_atomic_open() returns
+    EISDIR
+    - LP: #575853
+  * NFSv4: fix delegated locking
+    - LP: #575853
+  * ALSA: hda - add a quirk for Clevo M570U laptop
+    - LP: #575853
+  * ALSA: usb - Fix Oops after usb-midi disconnection
+    - LP: #575853
+  * hwmon: (sht15) Fix sht15_calc_temp interpolation function
+    - LP: #575853
+  * hwmon: (sht15) Properly handle the case CONFIG_REGULATOR=n
+    - LP: #575853
+  * x86/amd-iommu: Use helper function to destroy domain
+    - LP: #575853
+  * x86/amd-iommu: enable iommu before attaching devices
+    - LP: #575853
+  * x86, lib: Add wbinvd smp helpers
+    - LP: #575853
+  * x86, cacheinfo: Fix disabling of L3 cache indices
+    - LP: #575853
+  * intel-agp: Switch to wbinvd_on_all_cpus
+    - LP: #575853
+  * x86, cacheinfo: Add cache index disable sysfs attrs only to L3 caches
+    - LP: #575853
+  * x86, cacheinfo: Calculate L3 indices
+    - LP: #575853
+  * x86, cacheinfo: Remove NUMA dependency, fix for AMD Fam10h rev D1
+    - LP: #575853
+  * x86, cacheinfo: Enable L3 CID only on AMD
+    - LP: #575853
+  * vgaarb: fix "target=default" passing
+    - LP: #575853
+  * x86-32: clean up rwsem inline asm statements
+    - LP: #575853
+  * x86: clean up rwsem type system
+    - LP: #575853
+  * x86-64, rwsem: 64-bit xadd rwsem implementation
+    - LP: #575853
+  * x86-64: support native xadd rwsem implementation
+    - LP: #575853
+  * x86: Fix breakage of UML from the changes in the rwsem system
+    - LP: #575853
+  * x86-64, rwsem: Avoid store forwarding hazard in __downgrade_write
+    - LP: #575853
+  * fix NFS4 handling of mountpoint stat
+    - LP: #575853
+  * dm mpath: fix stall when requeueing io
+    - LP: #575853
+  * quota: Fix possible dq_flags corruption
+    - LP: #575853
+  * Staging: comedi: fix usbdux timeout bug
+    - LP: #483343, #575853
+  * Staging: comedi: usbdux.c: fix locking up of the driver when the comedi
+    ringbuffer runs empty
+    - LP: #483343, #575853
+  * ocfs2: set i_mode on disk during acl operations
+    - LP: #575853
+  * ocfs2: Change bg_chain check for ocfs2_validate_gd_parent.
+    - LP: #575853
+  * 9p: Skip check for mandatory locks when unlocking
+    - LP: #575853
+  * fc class: fail fast bsg requests
+    - LP: #575853
+  * SCSI: add scsi target reset support to scsi ioctl
+    - LP: #575853
+  * PCIe AER: prevent AER injection if hardware masks error reporting
+    - LP: #575853
+  * vgaarb: Fix VGA arbiter to accept PCI domains other than 0
+    - LP: #575853
+  * SCSI: fc-transport: Use packed modifier for fc_bsg_request structure.
+    - LP: #575853
+  * pci: Update pci_set_vga_state() to call arch functions
+    - LP: #575853
+  * PCI: kill off pci_register_set_vga_state() symbol export.
+    - LP: #575853
+  * PCI: fix nested spinlock hang in aer_inject
+    - LP: #575853
+  * IPoIB: Fix TX queue lockup with mixed UD/CM traffic
+    - LP: #575853
+  * x86/PCI: irq and pci_ids patch for Intel Cougar Point DeviceIDs
+    - LP: #575853
+  * ALSA: hda_intel: ALSA HD Audio patch for Intel Cougar Point DeviceIDs
+    - LP: #575853
+  * ALSA: hda - enable snoop for Intel Cougar Point
+    - LP: #575853
+  * ata_piix: IDE Mode SATA patch for Intel Cougar Point DeviceIDs
+    - LP: #575853
+  * ahci: AHCI and RAID mode SATA patch for Intel Cougar Point DeviceIDs
+    - LP: #575853
+  * i2c-i801: Add Intel Cougar Point device IDs
+    - LP: #575853
+  * b43: Remove reset after fatal DMA error
+    - LP: #575853
+  * b43: Allow PIO mode to be selected at module load
+    - LP: #575853
+  * b43: fall back gracefully to PIO mode after fatal DMA errors
+    - LP: #575853
+  * ALSA: hda - Add position_fix quirk for Biostar mobo
+    - LP: #575853
+  * agp/hp: fixup hp agp after ACPI changes
+    - LP: #575853
+  * b43: Optimize PIO scratchbuffer usage
+    - LP: #575853
+  * ecryptfs: fix use with tmpfs by removing d_drop from
+    ecryptfs_destroy_inode
+    - LP: #575853
+  * eCryptfs: Decrypt symlink target for stat size
+    - LP: #575853
+  * ecryptfs: fix error code for missing xattrs in lower fs
+    - LP: #575853
+  * sched: Fix a race between ttwu() and migrate_task()
+    - LP: #575853
+  * USB: cdc-acm: Update to new autopm API
+    - LP: #575853
+  * USB: cdc-acm: Fix stupid NULL pointer in resume()
+    - LP: #575853
+  * iwlwifi: clear all tx queues when firmware ready
+    - LP: #575853
+  * iwlwifi: fix scan race
+    - LP: #575853
+  * e1000e: stop cleaning when we reach tx_ring->next_to_use
+    - LP: #575853
+  * tcp: fix ICMP-RTO war
+    - LP: #575853
+  * perf_events, x86: Implement Intel Westmere/Nehalem-EX support
+    - LP: #575853
+  * Input: wacom - switch mode upon system resume
+    - LP: #575853
+  * md: deal with merge_bvec_fn in component devices better.
+    - LP: #575853
+  * nfsd4: don't try to map gid's in generic rpc code
+    - LP: #575853
+  * nfsd: ensure sockets are closed on error
+    - LP: #575853
+  * ALSA: hda: Set Front Mic to input vref 50% for Lenovo 3000 Y410
+    - LP: #479373, #575853
+  * mac80211: fix deferred hardware scan requests
+    - LP: #575853
+  * fs-writeback: Add helper function to start writeback if idle
+    - LP: #575853
+  * ext4: flush delalloc blocks when space is low
+    - LP: #575853
+  * ext4: fix async i/o writes beyond 4GB to a sparse file
+    - LP: #575853
+  * tpm: autoload tpm_tis based on system PnP IDs
+    - LP: #575853
+  * IB/iser: Rewrite SG handling for RDMA logic
+    - LP: #575853
+  * mptctl : Remove printk which floods unnecessary messages to
+    var/log/message
+    - LP: #575853
+  * mptspi: Fix for incorrect data underrun errata
+    - LP: #575853
+  * sched: Use proper type in sched_getaffinity()
+    - LP: #575853
+  * KVM: SVM: Fix memory leaks that happen when svm_create_vcpu() fails
+    - LP: #575853
+  * KVM: Don't spam kernel log when injecting exceptions due to bad cr
+    writes
+    - LP: #575853
+  * KVM: allow bit 10 to be cleared in MSR_IA32_MC4_CTL
+    - LP: #575853
+  * KVM: VMX: Save/restore rflags.vm correctly in real mode
+    - LP: #575853
+  * KVM: MMU: fix kvm_mmu_zap_page() and its calling path
+    - LP: #575853
+  * KVM: fix the handling of dirty bitmaps to avoid overflows
+    - LP: #575853
+  * KVM: Increase NR_IOBUS_DEVS limit to 200
+    - LP: #575853
+  * KVM: x86: Fix TSS size check for 16-bit tasks
+    - LP: #575853
+  * x86/gart: Disable GART explicitly before initialization
+    - LP: #575853
+  * r8169: clean up my printk uglyness
+    - LP: #562742, #575853
+  * Linux 2.6.32.12
+    - LP: #575853
+  * drm/edid: allow certain bogus edids to hit a fixup path rather than
+    fail
+    - LP: #575853
+  * drm/radeon: add new RS880 pci id
+    - LP: #575853
+  * drm: remove the EDID blob stored in the EDID property when it is
+    disconnected
+    - LP: #575853
+  * drm/radeon/kms: never treat rs4xx as AGP
+    - LP: #575853
+  * drm/radeon/kms: Fix NULL pointer dereference if memory allocation
+    failed in a simple way
+    - LP: #575853
+  * drm/radeon/kms: don't print error on -ERESTARTSYS.
+    - LP: #575853
+  * drm/radeon/kms: fix pal tv-out support on legacy IGP chips
+    - LP: #575853
+  * drm: Return ENODEV if the inode mapping changes
+    - LP: #575853
+  * drm/edid/quirks: Envision EN2028
+    - LP: #575853
+  * drm/radeon: R300 AD only has one quad pipe.
+    - LP: #575853
+  * drm/radeon/kms: fix washed out image on legacy tv dac
+    - LP: #575853
+  * drm/radeon/kms/combios: verify dac_adj values are valid
+    - LP: #575853
+  * drm/i915: Add no_lvds entry for the Clientron U800
+    - LP: #544671, #575853
+  * drm/radeon/kms: more atom parser fixes (v2)
+    - LP: #575853
+  * drm/radeon/kms: disable the tv encoder when tv/cv is not in use
+    - LP: #575853
+  * drm/radeon/kms: fix tv dac conflict resolver
+    - LP: #575853
+  * drm/radeon/kms: fix rs600 tlb flush
+    - LP: #575853
+  * drm/radeon/kms: add FireMV 2400 PCI ID.
+    - LP: #575853
+  * Linux 2.6.32.12+drm33.3
+    - LP: #575853
+  * USB: EHCI: defer reclamation of siTDs
+    - LP: #583414
+  * p54usb: Add usbid for Corega CG-WLUSB2GT.
+    - LP: #583414
+  * md/raid5: allow for more than 2^31 chunks.
+    - LP: #583414
+  * md/raid5: fix previous patch.
+    - LP: #583414
+  * libata: fix locking around blk_abort_request()
+    - LP: #583414
+  * libata: ensure NCQ error result taskfile is fully initialized before
+    returning it via qc->result_tf.
+    - LP: #583414
+  * w1: w1 temp: fix negative termperature calculation
+    - LP: #583414
+  * memcg: fix prepare migration
+    - LP: #583414
+  * mac80211: remove bogus TX agg state assignment
+    - LP: #583414
+  * flex_array: fix the panic when calling flex_array_alloc() without
+    __GFP_ZERO
+    - LP: #583414
+  * core, x86: make LIST_POISON less deadly
+    - LP: #583414
+  * hugetlb: fix infinite loop in get_futex_key() when backed by huge pages
+    - LP: #583414
+  * reiserfs: fix corruption during shrinking of xattrs
+    - LP: #583414
+  * nfsd4: bug in read_buf
+    - LP: #583414
+  * keys: the request_key() syscall should link an existing key to the dest
+    keyring
+    - LP: #583414
+  * staging: usbip: Fix deadlock
+    - LP: #583414
+  * USB: fix remote wakeup settings during system sleep
+    - LP: #583414
+  * USB: Add id for HP ev2210 a.k.a Sierra MC5725 miniPCI-e Cell Modem.
+    - LP: #511066, #583414
+  * USB: fix testing the wrong variable in fs_create_by_name()
+    - LP: #583414
+  * USB: don't choose configs with no interfaces
+    - LP: #583414
+  * USB: OHCI: don't look at the root hub to get the number of ports
+    - LP: #583414
+  * USB: xhci: properly set the "Mult" field of the endpoint context.
+    - LP: #583414
+  * USB: xhci: properly set endpoint context fields for periodic eps.
+    - LP: #583414
+  * procfs: fix tid fdinfo
+    - LP: #583414
+  * ocfs2: Update VFS inode's id info after reflink.
+    - LP: #583414
+  * ocfs2: potential ERR_PTR dereference on error paths
+    - LP: #583414
+  * ocfs2: Compute metaecc for superblocks during online resize.
+    - LP: #583414
+  * ocfs2_dlmfs: Fix math error when reading LVB.
+    - LP: #583414
+  * powernow-k8: Fix frequency reporting
+    - LP: #572348, #583414
+  * nfs d_revalidate() is too trigger-happy with d_drop()
+    - LP: #583414
+  * NFS: rsize and wsize settings ignored on v4 mounts
+    - LP: #583414
+  * Staging: hv: Fix a bug affecting IPv6
+    - LP: #583414
+  * Staging: hv: Fix up memory leak on HvCleanup
+    - LP: #583414
+  * Staging: hv: name network device ethX rather than sethX
+    - LP: #583414
+  * i2c: Fix probing of FSC hardware monitoring chips
+    - LP: #583414
+  * perf: Fix resource leak in failure path of perf_event_open()
+    - LP: #583414
+  * raid6: fix recovery performance regression
+    - LP: #583414
+  * serial: 8250_pnp - add Fujitsu Wacom device
+    - LP: #583414
+  * block: ensure jiffies wrap is handled correctly in
+    blk_rq_timed_out_timer
+    - LP: #583414
+  * dm9601: fix phy/eeprom write routine
+    - LP: #583414
+  * p54pci: fix bugs in p54p_check_tx_ring
+    - LP: #583414
+  * edac, mce: Fix wrong mask and macro usage
+    - LP: #583414
+  * x86-64: Clear a 64-bit FS/GS base on fork if selector is nonzero
+    - LP: #583414
+  * x86: Disable large pages on CPUs with Atom erratum AAE44
+    - LP: #583414
+  * x86, k8 nb: Fix boot crash: enable k8_northbridges unconditionally on
+    AMD systems
+    - LP: #583414
+  * x86, AMD: Fix stale cpuid4_info shared_map data in shared_cpu_map
+    cpumasks
+    - LP: #583414
+  * ALSA: hda: Use LPIB quirk for DG965OT board version AAD63733-203
+    - LP: #459083, #583414
+  * ALSA: hda - Add PCI quirk for HP dv6-1110ax.
+    - LP: #583414
+  * ALSA: hda: Use STAC_DELL_M6_BOTH quirk for Dell Studio XPS 1645
+    - LP: #553002, #583414
+  * ALSA: hda: Use STAC_DELL_M6_BOTH quirk for Dell Studio 1558
+    - LP: #568600, #583414
+  * ALSA: hda: Use ALC880_F1734 quirk for Fujitsu Siemens AMILO Xi 1526
+    - LP: #567494, #583414
+  * ALSA: snd-meastro3: Add amp_gpio quirk for Compaq EVO N600C
+    - LP: #583414
+  * ALSA: snd-meastro3: Ignore spurious HV interrupts during suspend /
+    resume
+    - LP: #583414
+  * ALSA: hda: Fix max PCM level to 0 dB for Fujitsu-Siemens laptops using
+    CX20549 (Venice)
+    - LP: #583414
+  * ALSA: hda: Fix 0 dB for Packard Bell models using Conexant CX20549
+    (Venice)
+    - LP: #541802, #583414
+  * ALSA: hda: Use olpc-xo-1_5 quirk for Toshiba Satellite Pro T130-15F
+    - LP: #573284, #583414
+  * ALSA: hda: Use olpc-xo-1_5 quirk for Toshiba Satellite
+    P500-PSPGSC-01800T
+    - LP: #549267, #583414
+  * libata: Fix accesses at LBA28 boundary (old bug, but nasty) (v2)
+    - LP: #583414
+  * ext4: correctly calculate number of blocks for fiemap
+    - LP: #474597, #583414
+  * initramfs: handle unrecognised decompressor when unpacking
+    - LP: #583414
+  * CRED: Fix a race in creds_are_invalid() in credentials debugging
+    - LP: #583414
+  * jfs: fix diAllocExt error in resizing filesystem
+    - LP: #583414
+  * ACPI: introduce kernel parameter acpi_sleep=sci_force_enable
+    - LP: #553498, #583414
+  * p54pci: rx frame length check
+    - LP: #583414
+  * drivers/net/wireless/p54/txrx.c Fix off by one error
+    - LP: #583414
+  * dccp_probe: Fix module load dependencies between dccp and dccp_probe
+    - LP: #583414
+  * KVM: remove unused load_segment_descriptor_to_kvm_desct
+    - LP: #583414
+  * kgdb: don't needlessly skip PAGE_USER test for Fsl booke
+    - LP: #583414
+  * r8169: use correct barrier between cacheable and non-cacheable memory
+    - LP: #562742, #583414
+  * r8169: fix broken register writes
+    - LP: #562742, #583414
+  * r8169: more broken register writes workaround
+    - LP: #562742, #583414
+  * PCI: Ensure we re-enable devices on resume
+    - LP: #566149, #583414
+  * skip sense logging for some ATA PASS-THROUGH cdbs
+    - LP: #583128, #583414
+  * tg3: Fix INTx fallback when MSI fails
+    - LP: #583414
+  * xfs: add a shrinker to background inode reclaim
+    - LP: #583414
+  * qla2xxx: Properly handle UNDERRUN completion statuses.
+    - LP: #583414
+  * bnx2: Fix lost MSI-X problem on 5709 NICs.
+    - LP: #583414
+  * tracing: Fix ftrace_event_call alignment for use with gcc 4.5
+    - LP: #583414
+  * security: testing the wrong variable in create_by_name()
+    - LP: #583414
+  * md: restore ability of spare drives to spin down.
+    - LP: #583414
+  * virtio: initialize earlier
+    - LP: #583414
+  * md/raid6: Fix raid-6 read-error correction in degraded state
+    - LP: #583414
+  * V4L/DVB: budget: Oops: "BUG: unable to handle kernel NULL pointer
+    dereference"
+    - LP: #583414
+  * ACPI: DMI init_set_sci_en_on_resume for multiple Lenovo ThinkPads
+    - LP: #583414
+  * power_meter: acpi_device_class "power_meter_resource" too long
+    - LP: #583414
+  * ACPI: sleep: init_set_sci_en_on_resume for Dell Studio 155x
+    - LP: #553498, #583414
+  * cpuidle: Fix incorrect optimization
+    - LP: #583414
+  * pxa/colibri: fix missing #include <mach/mfp.h> in colibri.h
+    - LP: #583414
+  * SCSI: fix locking around blk_abort_request()
+    - LP: #583414
+  * SCSI: libiscsi: regression: fix header digest errors
+    - LP: #583414
+  * scsi_debug: virtual_gb ignores sector_size
+    - LP: #583414
+  * Enable retries for SYNCRONIZE_CACHE commands to fix I/O error
+    - LP: #583414
+  * SCSI: Retry commands with UNIT_ATTENTION sense codes to fix ext3/ext4
+    I/O error
+    - LP: #583414
+  * MIPS: Sibyte: Apply M3 workaround only on affected chip types and
+    versions.
+    - LP: #583414
+  * Linux 2.6.32.13
+    - LP: #583414
+  * drm/i915: Add initial bits for VGA modesetting bringup on Sandybridge.
+    - LP: #583414
+  * drm/i915: fix tiling limits for i915 class hw v2
+    - LP: #583414
+  * Linux 2.6.32.13+drm33.4
+    - LP: #583414
+  * (pre-stable) Input: psmouse - reset all types of mice before
+    reconnecting
+    - LP: #551234
+  * ipv4: udp: fix short packet and bad checksum logging
+    - LP: #588832
+  * hp_accel: fix race in device removal
+    - LP: #588832
+  * fbdev: bfin-t350mcqb-fb: fix fbmem allocation with blanking lines
+    - LP: #588832
+  * hugetlbfs: kill applications that use MAP_NORESERVE with SIGBUS instead
+    of OOM-killer
+    - LP: #588832
+  * dma-mapping: fix dma_sync_single_range_*
+    - LP: #588832
+  * ACPI: sleep: eliminate duplicate entries in acpisleep_dmi_table[]
+    - LP: #588832
+  * mmc: atmel-mci: fix two parameters swapped
+    - LP: #588832
+  * mmc: atmel-mci: prevent kernel oops while removing card
+    - LP: #588832
+  * mmc: atmel-mci: remove data error interrupt after xfer
+    - LP: #588832
+  * ptrace: fix return value of do_syscall_trace_enter()
+    - LP: #588832
+  * powerpc/perf_event: Fix oops due to perf_event_do_pending call
+    - LP: #588832
+  * cifs: guard against hardlinking directories
+    - LP: #588832
+  * serial: imx.c: fix CTS trigger level lower to avoid lost chars
+    - LP: #588832
+  * ALSA: ice1724 - Fix ESI Maya44 capture source control
+    - LP: #588832
+  * ALSA: hda: Fix 0 dB for Lenovo models using Conexant CX20549 (Venice)
+    - LP: #588832
+  * inotify: race use after free/double free in inotify inode marks
+    - LP: #588832
+  * inotify: don't leak user struct on inotify release
+    - LP: #588832
+  * profile: fix stats and data leakage
+    - LP: #588832
+  * x86, k8: Fix build error when K8_NB is disabled
+    - LP: #588832
+  * x86, cacheinfo: Turn off L3 cache index disable feature in virtualized
+    environments
+    - LP: #588832
+  * x86, amd: Check X86_FEATURE_OSVW bit before accessing OSVW MSRs
+    - LP: #588832
+  * Btrfs: check for read permission on src file in the clone ioctl
+    - LP: #588832
+  * ALSA: hda - New Intel HDA controller
+    - LP: #588832
+  * proc: partially revert "procfs: provide stack information for threads"
+    - LP: #588832
+  * revert "procfs: provide stack information for threads" and its fixup
+    commits
+    - LP: #588832
+  * iwlwifi: clear all the stop_queue flag after load firmware
+    - LP: #588832
+  * p54: disable channels with incomplete calibration data sets
+    - LP: #588832
+  * CacheFiles: Fix error handling in cachefiles_determine_cache_security()
+    - LP: #588832
+  * megaraid_sas: fix for 32bit apps
+    - LP: #588832
+  * mmap_min_addr check CAP_SYS_RAWIO only for write
+    - LP: #588832
+  * nilfs2: fix sync silent failure
+    - LP: #588832
+  * crypto: authenc - Add EINPROGRESS check
+    - LP: #588832
+  * Linux 2.6.32.14
+    - LP: #588832
+  * drm/i915: use PIPE_CONTROL instruction on Ironlake and Sandy Bridge
+    - LP: #588832
+  * drm/i915: fix non-Ironlake 965 class crashes
+    - LP: #588832
+  * drm/i915: Disable FBC on 915GM and 945GM.
+    - LP: #492392, #588832
+  * Linux 2.6.32.14+drm33.5
+    - LP: #588832
+  * Linux 2.6.32.15+drm33.5
+    - LP: #588832
+  * HID: remove MODULE_VERSION from new drivers
+    - LP: #583531
+  * HID: fix N-trig touch panel with recent firmware
+    - LP: #583531
+  * HID: ntrig: explain firmware quirk
+    - LP: #583531
+  * HID: ntrig: Emit TOUCH with DOUBLETAP for single touch
+    - LP: #583531
+  * HID: ntrig: TipSwitch for single touch mode touch.
+    - LP: #583531
+  * HID: ntrig: Remove unused macro, TripleTap and QuadTap
+    - LP: #583531
+  * (pre-stable) drm/radeon/kms: initialize set_surface_reg reg for rs600
+    asic
+    - LP: #544590
+
+  [ Ubuntu: 2.6.32-22.36 ]
+
+  * Revert "kvm: restrict writing of segment selectors to segment
+    registers"
+    - LP: #589223
+
+ -- Stefan Bader <stefan.bader@canonical.com>  Tue, 01 Jun 2010 16:59:44 +0200
+
+linux-mvl-dove (2.6.32-205.18) lucid-security; urgency=low
+
+  [ Eric Miao ]
+
+  * [Config] increase CONFIG_BLK_DEV_RAM_SIZE to 65536
+    - LP: #563679
+
+  [ Stefan Bader ]
+
+  * Rebase to 2.6.32-22.35
+  * [Config] Change CONFIG_BLK_DEV_DM to y
+    - LP: #560717
+
+  [ Ubuntu: 2.6.32-22.35 ]
+
+  * kvm: restrict writing of segment selectors to segment registers
+    - CVE-2010-0419
+  * tty: release_one_tty() forgets to put pids
+    - CVE-2010-1162
+  * oom: fix the unsafe usage of badness() in proc_oom_score()
+    - CVE-2010-1488
+  * Attempt #2 to handle null nameidata
+    - CVE-2010-1148
+  * reiserfs: fix permissions on .reiserfs_priv
+    - CVE-2010-1146
+  * r8169: offical fix for CVE-2009-4537 (overlength frame DMAs)
+    - CVE-2009-4537
+
+  [ Ubuntu: 2.6.32-22.33 ]
+
+  * SAUCE: ACPI: EC: Allow multibyte access to EC (v3)
+    - LP: #526354
+  * ubuntu: rtl8192se -- update to version 0015.0127.2010
+    - LP: #567016
+
+  [ Ubuntu: 2.6.32-21.32 ]
+
+  * SAUCE: i915 KMS -- support disabling KMS for known broken devices
+    - LP: #563277
+  * SAUCE: i915 KMS -- blacklist i830
+    - LP: #542208, #563277
+  * SAUCE: i915 KMS -- blacklist i845g
+    - LP: #541492, #563277
+  * SAUCE: i915 KMS -- blacklist i855
+    - LP: #511001, #541511, #563277
+  * SAUCE: radeon KMS -- support disabling KMS for known broken devices
+    - LP: #546743
+  * SAUCE: radeon KMS -- blacklist ES1000
+    - LP: #546743
+
+ -- Stefan Bader <stefan.bader@canonical.com>  Tue, 25 May 2010 20:25:15 +0000
+
+linux-mvl-dove (2.6.32-204.16) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * rebase to Ubuntu-2.6.32-21.31
+
+  [ Ubuntu: 2.6.32-21.31 ]
+
+  * allow modules.builtin to be optional
+  * d-i: add mpt2sas to the message-modules udeb
+    - LP: #530361
+  * SAUCE: Nouveau: Add quirk framework to disable acceleration
+    - LP: #544088, #546393
+  * SAUCE: Nouveau: Disable acceleration on MacBook Pros
+    - LP: #546393
+  * SAUCE: Nouveau: Disable acceleration on GeForce3 cards
+    - LP: #544088
+  * SAUCE: Nouveau: Disable acceleration on 6100 cards
+    - LP: #542950
+  * SAUCE: dma-mapping: Remove WARN_ON in dma_free_coherent
+    - LP: #458201
+  * SAUCE: sync before umount to reduce time taken by ext4 umount
+    - LP: #543617
+  * tipc: Fix oops on send prior to entering networked mode (v3)
+    - CVE-2010-1187
+  * KVM: x86 emulator: Add Virtual-8086 mode of emulation
+    - LP: #561425
+  * KVM: x86 emulator: fix memory access during x86 emulation
+    - LP: #561425
+  * KVM: x86 emulator: Check IOPL level during io instruction emulation
+    - LP: #561425
+  * KVM: x86 emulator: Fix popf emulation
+    - LP: #561425
+  * KVM: Fix segment descriptor loading
+    - LP: #561425
+  * KVM: VMX: Update instruction length on intercepted BP
+    - LP: #561425
+  * KVM: VMX: Use macros instead of hex value on cr0 initialization
+    - LP: #561425
+  * KVM: SVM: Reset cr0 properly on vcpu reset
+    - LP: #561425
+  * KVM: VMX: Disable unrestricted guest when EPT disabled
+    - LP: #561425
+  * KVM: x86: disable paravirt mmu reporting
+    - LP: #561425
+  * AppArmor: Fix put of unassigned ns if aa_unpack fails
+  * AppArmor: Fix refcount bug when exec fails
+    - LP: #562063
+  * AppArmor: Take refcount on cxt->profile to ensure it remains a valid
+    reference
+    - LP: #367499
+  * AppArmor: fix typo in scrubbing environment variable warning
+    - LP: #562060
+  * AppArmor: fix regression by setting default to mediate deleted files
+    - LP: #562056
+  * AppArmor: fix refcount order bug that can trigger during replacement
+    - LP: #367499
+  * AppArmor: Make sure to unmap aliases for vmalloced dfas before they are
+    live
+    - LP: #529288
+  * AppArmor: address performance regression of replaced profile
+    - LP: #549428
+  * AppArmor: make the global side the correct type
+    - LP: #562047
+  * AppArmor: use the kernel shared workqueue to free vmalloc'ed dfas
+  * sky2: add register definitions for new chips
+    - LP: #537168
+  * sky2: 88E8059 support
+    - LP: #537168
+  * net: Fix Yukon-2 Optima TCP offload setup
+    - LP: #537168
+  * net: Add missing TST_CFG_WRITE bits around sky2_pci_write
+    - LP: #537168
+  * sky2: print Optima chip name
+    - LP: #537168
+  * (Upstream) dell-laptop: defer dell_rfkill_update to worker thread
+    - LP: #555261
+  * drm/nv40: add LVDS table quirk for Dell Latitude D620
+    - LP: #539730
+
+  [ Ubuntu: 2.6.32-20.30 ]
+
+  * Revert "(pre-stable) ACPI: EC: Allow multibyte access to EC"
+    - LP: #561151
+
+  [ Ubuntu: 2.6.32-20.29 ]
+
+  * Revert "SAUCE: Use MODULE_IMPORT macro to tie intel_agp to i915"
+    - LP: #542251
+  * add Breaks: against hardy lvm2
+    - LP: #528155
+  * d-i -- enable udebs for generic-pae
+    - LP: #160366
+  * [Config] Add xen netboot support
+    - LP: #160366
+  * (pre-stable): input: Support Clickpad devices in ClickZone mode
+    - LP: #516329
+  * Revert "(pre-stable) Bluetooth: Fix sleeping function in RFCOMM within
+    invalid context"
+    - LP: #553837
+  * Revert "(pre-stable) USB: fix usbfs regression"
+    - LP: #553837
+  * Revert "(pre-stable) softlockup: Stop spurious softlockup messages due
+    to overflow"
+    - LP: #553837
+  * Revert "(pre-stable) drm/nouveau: report unknown connector state if lid
+    closed"
+    - LP: #553837
+  * drivers/scsi/ses.c: eliminate double free
+    - LP: #553837
+  * decompress: fix new decompressor for PIC
+    - LP: #553837
+  * ARM: Fix decompressor's kernel size estimation for ROM=y
+    - LP: #553837
+  * MIPS: Cleanup forgotten label_module_alloc in tlbex.c
+    - LP: #553837
+  * tg3: Fix tg3_poll_controller() passing wrong pointer to tg3_interrupt()
+    - LP: #553837
+  * tg3: Fix 5906 transmit hangs
+    - LP: #553837
+  * ALSA: hda - Fix input source elements of secondary ADCs on Realtek
+    - LP: #553837
+  * ALSA: hda: enable MSI for Gateway M-6866
+    - LP: #538918, #553837
+  * timekeeping: Prevent oops when GENERIC_TIME=n
+    - LP: #553837
+  * Input: alps - add support for the touchpad on Toshiba Tecra A11-11L
+    - LP: #553837
+  * Input: i8042 - add ALDI/MEDION netbook E1222 to qurik reset table
+    - LP: #553837
+  * i2c-i801: Don't use the block buffer for I2C block writes
+    - LP: #553837
+  * ath5k: dont use external sleep clock in AP mode
+    - LP: #553837
+  * ath5k: fix setup for CAB queue
+    - LP: #553837
+  * ring-buffer: Move disabled check into preempt disable section
+    - LP: #553837
+  * function-graph: Init curr_ret_stack with ret_stack
+    - LP: #553837
+  * Bluetooth: Fix sleeping function in RFCOMM within invalid context
+    - LP: #553837
+  * tracing: Use same local variable when resetting the ring buffer
+    - LP: #553837
+  * tracing: Disable buffer switching when starting or stopping trace
+    - LP: #553837
+  * tracing: Do not record user stack trace from NMI context
+    - LP: #553837
+  * PCI: unconditionally clear AER uncorr status register during cleanup
+    - LP: #553837
+  * efifb: fix framebuffer handoff
+    - LP: #553837
+  * coredump: suppress uid comparison test if core output files are pipes
+    - LP: #553837
+  * V4L/DVB (13961): em28xx-dvb: fix memleak in dvb_fini()
+    - LP: #553837
+  * hrtimer: Tune hrtimer_interrupt hang logic
+    - LP: #553837
+  * x86, apic: Don't use logical-flat mode when CPU hotplug may exceed 8
+    CPUs
+    - LP: #553837
+  * mvsas: add support for Adaptec ASC-1045/1405 SAS/SATA HBA
+    - LP: #553837
+  * pci: add support for 82576NS serdes to existing SR-IOV quirk
+    - LP: #553837
+  * sched: Mark boot-cpu active before smp_init()
+    - LP: #553837
+  * sparc64: Make prom entry spinlock NMI safe.
+    - LP: #553837
+  * sysctl: require CAP_SYS_RAWIO to set mmap_min_addr
+    - LP: #553837
+  * e1000e: enable new 82567V-3 device
+    - LP: #553837
+  * ixgbe: add support for 82599 KR device 0x1517
+    - LP: #553837
+  * ath9k: fix lockdep warning when unloading module
+    - LP: #553837
+  * mqueue: fix mq_open() file descriptor leak on user-space processes
+    - LP: #553837
+  * virtio: fix out of range array access
+    - LP: #553837
+  * sched: Fix SCHED_MC regression caused by change in sched cpu_power
+    - LP: #553837
+  * readahead: add blk_run_backing_dev
+    - LP: #553837
+  * ALSA: hda: Use LPIB and 6stack-dig for eMachines T5212
+    - LP: #538895, #553837
+  * ALSA: hda - Disable MSI for Nvidia controller
+    - LP: #553837
+  * ALSA: hda - Fix secondary ADC of ALC260 basic model
+    - LP: #553837
+  * ALSA: hda: Fix 0 dB offset for HP laptops using CX20551 (Waikiki)
+    - LP: #420578, #553837
+  * ALSA: cmipci: work around invalid PCM pointer
+    - LP: #553837
+  * gigaset: correct clearing of at_state strings on RING
+    - LP: #553837
+  * gigaset: prune use of tty_buffer_request_room
+    - LP: #553837
+  * perf: Make the install relative to DESTDIR if specified
+    - LP: #553837
+  * perf_event: Fix oops triggered by cpu offline/online
+    - LP: #553837
+  * tmpfs: fix oops on mounts with mpol=default
+    - LP: #553837
+  * tmpfs: mpol=bind:0 don't cause mount error.
+    - LP: #553837
+  * tmpfs: handle MPOL_LOCAL mount option properly
+    - LP: #553837
+  * tmpfs: cleanup mpol_parse_str()
+    - LP: #553837
+  * doc: add the documentation for mpol=local
+    - LP: #553837
+  * SCSI: scsi_transport_fc: Fix synchronization issue while deleting vport
+    - LP: #553837
+  * NFSv4: Don't ignore the NFS_INO_REVAL_FORCED flag in
+    nfs_revalidate_inode()
+    - LP: #553837
+  * NFS: Avoid a deadlock in nfs_release_page
+    - LP: #553837
+  * NFS: Prevent another deadlock in nfs_release_page()
+    - LP: #553837
+  * tty: Keep the default buffering to sub-page units
+    - LP: #553837
+  * tty: Take a 256 byte padding into account when buffering below sub-page
+    units
+    - LP: #553837
+  * USB: fix usbfs regression
+    - LP: #553837
+  * USB: EHCI: fix ITD list order
+    - LP: #553837
+  * USB: EHCI: adjust ehci_iso_stream for changes in ehci_qh
+    - LP: #553837
+  * USB: qcserial: add new device ids
+    - LP: #553837
+  * USB: xHCI: re-initialize cmd_completion
+    - LP: #553837
+  * USB: serial: ftdi: add CONTEC vendor and product id
+    - LP: #553837
+  * USB: option: fix incorrect manufacturer name in usb/serial/option:
+    MAXON->CMOTECH
+    - LP: #553837
+  * USB: option: move hardcoded PID to a macro in usb/serial/option
+    - LP: #553837
+  * USB: option: add support for a new CMOTECH device to usb/serial/option
+    - LP: #553837
+  * usb: r8a66597-hcd: fix removed from an attached hub
+    - LP: #553837
+  * wl1251: fix potential crash
+    - LP: #553837
+  * jme: Fix VLAN memory leak
+    - LP: #553837
+  * jme: Protect vlgrp structure by pause RX actions.
+    - LP: #553837
+  * edac, mce: Filter out invalid values
+    - LP: #553837
+  * iwlwifi: use dma_alloc_coherent
+    - LP: #553837
+  * iwlwifi: Silence tfds_in_queue message
+    - LP: #553837
+  * SUNRPC: Fix a potential memory leak in auth_gss
+    - LP: #553837
+  * sunrpc: handle allocation errors from __rpc_lookup_create()
+    - LP: #553837
+  * if_tunnel.h: add missing ams/byteorder.h include
+    - LP: #553837
+  * fs/partitions/msdos: add support for large disks
+    - LP: #553837
+  * fs/partition/msdos: fix unusable extended partition for > 512B sector
+    - LP: #553837
+  * PCI: fix return value from pcix_get_max_mmrbc()
+    - LP: #553837
+  * PCI: fix access of PCI_X_CMD by pcix get and set mmrbc functions
+    - LP: #553837
+  * PCI: cleanup error return for pcix get and set mmrbc functions
+    - LP: #553837
+  * rt2860sta: Fix argument to linux_pci_unmap_single()
+    - LP: #553837
+  * ath9k: fix BUG_ON triggered by PAE frames
+    - LP: #553837
+  * cpuset: fix the problem that cpuset_mem_spread_node() returns an
+    offline node
+    - LP: #553837
+  * softlockup: Stop spurious softlockup messages due to overflow
+    - LP: #553837
+  * netfilter: xt_recent: fix regression in rules using a zero hit_count
+    - LP: #553837
+  * x86: Fix placement of FIX_OHCI1394_BASE
+    - LP: #553837
+  * x86, amd: Restrict usage of c1e_idle()
+    - LP: #553837
+  * hwmon: (coretemp) Add missing newline to dev_warn() message
+    - LP: #553837
+  * ALSA: hda: Use LPIB for ga-ma770-ud3 board
+    - LP: #553837
+  * ALSA: ac97: Add Toshiba P500 to ac97 jack sense blacklist
+    - LP: #481058, #553837
+  * ALSA: ac97: Add IBM ThinkPad R40e to Headphone/Line Jack Sense
+    blacklist
+    - LP: #303789, #553837
+  * ALSA: hda: Use ALC260_WILL quirk for another Acer model (0x1025007f)
+    - LP: #418627, #553837
+  * ath9k: Enable TIM timer interrupt only when needed.
+    - LP: #553837
+  * mac80211: Retry null data frame for power save
+    - LP: #553837
+  * ath9k: Enable IEEE80211_HW_REPORTS_TX_ACK_STATUS flag for ath9k
+    - LP: #553837
+  * mac80211: Reset dynamic ps timer in Rx path.
+    - LP: #553837
+  * leds-gpio: fix default state handling on OF platforms
+    - LP: #553837
+  * quota: manage reserved space when quota is not active [v2]
+    - LP: #553837
+  * quota: Fix warning when a delayed write happens before quota is enabled
+    - LP: #553837
+  * ahci: use BIOS date in broken_suspend list
+    - LP: #553837
+  * Bluetooth: Fix potential bad memory access with sysfs files
+    - LP: #553837
+  * Bluetooth: Fix kernel crash on L2CAP stress tests
+    - LP: #553837
+  * sh: Fix zImage boot using fixed PMB.
+    - LP: #553837
+  * b43: Workaround circular locking in hw-tkip key update callback
+    - LP: #553837
+  * block: Backport of various I/O topology fixes from 2.6.33 and 2.6.34
+    - LP: #553837
+  * s3cmci: initialize default platform data no_wprotect and no_detect with
+    1
+    - LP: #553837
+  * x86: Fix sched_clock_cpu for systems with unsynchronized TSC
+    - LP: #553837
+  * GFS2: Skip check for mandatory locks when unlocking
+    - LP: #553837
+  * Linux 2.6.32.11
+    - LP: #553837
+  * drm/i915: fix small leak on overlay error path
+    - LP: #553837
+  * drm/i915: Avoid NULL deref in get_pages() unwind after error.
+    - LP: #553837
+  * drm/nouveau: report unknown connector state if lid closed
+    - LP: #553837
+  * Linux-2.6.32.11+drm33.2
+    - LP: #553837
+  * mmc: add module parameter to set whether cards are assumed removable
+    - LP: #477106
+  * (pre-stable) ACPI: EC: Allow multibyte access to EC
+    - LP: #526354
+  * PCI quirks: disable msi on AMD rs4xx internal gfx bridges
+    - LP: #509273
+  * drm/i915: Add dependency on the intel agp module
+    - LP: #542251
+  * (pre-stable) drm/edid: allow certain bogus edids to hit a fixup path
+    rather than fail
+    - LP: #540632
+  * drm/radeon/kms: rework pll algo selection
+    - LP: #538377
+  * drm/radeon/kms: update new pll algo
+    - LP: #538377
+  * PCI quirk: Disable MSI on VIA K8T890 systems
+    - LP: #544741
+  * sched: update load count only once per cpu in 10 tick update window
+    - LP: #513848
+
+ -- Andy Whitcroft <apw@canonical.com>  Wed, 14 Apr 2010 12:12:31 +0100
+
+linux-mvl-dove (2.6.32-203.15) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * rebase to Ubuntu-2.6.32-19.28
+  * update configs following rebase to Ubuntu-2.6.32-19.28
+  * [Config] lgs8gl5 and mimio are no longer built
+
+  [ Eric Miao ]
+
+  * [Config]: sync with Dove LSP 5.1.0
+
+  [ Upstream Kernel Changes ]
+
+  * add option to reserve memory for PVT tests
+  * update missed mcu-ds2782 battery driver
+  * config: small change to align with Ubuntu kernel configuration
+  * Update standby mode support for AV-D1 X0 board.
+  * Disable ADI9889 by default to remove this error during kernel booting:
+    "ERROR at adi9889_error_callback - error code 14"
+  * Fix compiling error on Android caused by the patch
+    d4cc16c82748d07258b3808d1f572d69640526bc
+  * Fix EDID parsing error in ADI9889 device driver
+  * Disabled some annonying debug information of KG2 due to it flashs
+    console output
+  * Decrease ALSA soc period_size min and max parameter to fix video not
+    fluent on Android issue.
+  * Enable two Android PMEM device files: /dev/pmem --> 24M, for Graphics
+    /dev/pmem_adsp --> 64M, for Video
+  * Fix various settings for new AV-D1 X0 boards
+  * add back rt5630 i2c device in dove-rd-avng-setup.c
+  * dvs: make changes to dove_rd_avng_setup.c
+  * DVS: Fix compilation error and disable DVS by default for AVD1 board
+  * Modify dove_gpu's name to galcore for Android to keep align with other
+    Android platform.
+  * dove: build dmatest as module
+  * dove: disable MTD_VERIFY_WRITE and enable MTD test support
+  * dove: alway use the galcore name for the gpu driver
+  * update dove_avng_x0_defconfig and dove_avng_y1_defconfig
+  * fix ADI9889/9389 HDMI audio no sound (SPDIF) issue
+  * Added Headset detection feature.
+  * Fix wrong bit operation
+  * Fix warning message when compiling
+  * Lower debug message's level and mark it
+  * Lower wait for vsync's debug message level and double confirm isr
+    before printing the message.
+  * Remove unused function.
+  * refine the comments
+  * Fix ADI9889 PM suspend/resume issue
+  * rt5611: only swap touchscreen Y-axis for ANDROID
+  * enable bmm driver as module in dove_avng_x0_defconfig
+  * remove dove_avng_x0_defconfig and dove_avng_y1_defconfig
+  * dove: disable CH7025_COMPOSITE
+  * eth643: fix suspend/resume by deatach/attach phy
+
+  [ Ubuntu: 2.6.32-19.28 ]
+
+  * [Config] enable various multitouch devices
+    - LP: #541453
+  * (pre-stable): input: ALPS - Add signature for HP Pavilion dm3 laptops
+    - LP: #545307
+  * SAUCE: Disable function tracing after hitting __schedule_bug
+  * SAUCE: Reduce ACPI resource conflict message to KERN_INFO, printf
+    cleanup
+    - LP: #440470
+  * SAUCE: drm/i915: don't change DRM configuration when releasing load
+    detect pipe
+    - LP: #488328
+  * SAUCE: AppArmor: Remove null_profile's use of PFLAG_NO_LIST_REF
+    - LP: #539437
+  * SAUCE: AppArmor: Stop page allocation warnings that can occur on policy
+    load
+    - LP: #458299
+  * SAUCE: AppArmor: Return string len rather than the allocation size
+    - LP: #551844
+  * SAUCE: AppArmor: Fix oops in profile verification if profile unpack
+    fails.
+  * [Config] Enable Nouveau DRM module on powerpc
+  * SAUCE: Pull in thinkpad-acpi from v2.6.34-rc1
+    - LP: #357673
+  * [Config] Enable thinkpad-acpi ALSA volume control
+    - LP: #357673
+  * SAUCE: drm/i915: Disable FBC on 915GM and 945GM
+    - LP: #492392, #539609
+  * Revert "(pre-stable) drm/i915: blacklist lid status: Sony VGN-BX196VP,
+    Dell Inspiron 700m"
+    - LP: #515246
+  * (pre-stable) softlockup: Stop spurious softlockup messages due to
+    overflow
+    - LP: #551068
+  * backlight: mbp_nvidia_bl - add five more MacBook variants
+    - LP: #511965
+  * drm/nv04-nv40: Fix up the programmed horizontal sync pulse delay.
+    - LP: #529130
+  * drm/nouveau: Fix fbcon corruption with font width not divisible by 8
+    - LP: #544739
+  * (pre-stable) USB: fix usbfs regression
+  * drm/radeon/bo: add some fallback placements for VRAM only objects.
+    - LP: #507148
+  * drm/radeon/kms: don't print error on -ERESTARTSYS.
+    - LP: #507148
+  * Input: add the ABS_MT_PRESSURE event
+    - LP: #541453
+  * HID: Support for 3M multitouch panel
+    - LP: #541453
+  * HID: make 3M PCT touchscreen driver standalone config option
+    - LP: #541453
+  * HID: add support for Stantum multitouch panel
+    - LP: #541453
+  * HID: make Stantum driver standalone config option
+    - LP: #541453
+  * HID: add support for Acer T230H multitouch
+    - LP: #541453
+  * HID: add support for Pixart Imaging Optical Touch Screen
+    - LP: #541453
+  * HID: fixed bug in single-touch emulation on the stantum panel
+    - LP: #541453
+  * HID: add pressure support for the Stantum multitouch panel
+    - LP: #541453
+  * HID: Support for MosArt multitouch panel
+    - LP: #541453
+  * HID: hid-ntrig add multi input quirk and clean up
+    - LP: #541453
+  * HID: n-trig: remove unnecessary tool switching
+    - LP: #541453
+  * HID: hid-ntrig: multitouch cleanup and fix
+    - LP: #541453
+  * HID: hid-ntrig: Single touch mode tap
+    - LP: #541453
+  * hid: ntrig touch events
+    - LP: #541453
+  * (pre-stable) x86-32, resume: do a global tlb flush in S4 resume
+    - LP: #531309
+  * drm/i915: Part of: Add initial bits for VGA modesetting bringup on
+    Sandybridge.
+    - LP: #515246
+  * drm/i915: Stop trying to use ACPI lid status to determine LVDS
+    connection.
+    - LP: #515246
+
+  [ Ubuntu: 2.6.32-18.27 ]
+
+  * SAUCE: Don't register vga16fb framebuffer if other framebuffers are
+    present
+    - LP: #527369
+  * [Config] armel/versatile: Set CRAMFS=m
+    - LP: #524893
+  * [Config] armel: Reset default command-line
+    - LP: #524893
+  * build/modules: Update d-i to reflect recent config changes
+    - LP: #546929
+  * (pre-stable) drm/nouveau: report unknown connector state if lid closed
+    - LP: #523072
+  * (pre-stable) Staging: rt2870: Add USB ID for Buffalo Airstation
+    WLI-UC-GN
+    - LP: #441990
+  * (pre-stable) iwlwifi: fix nfreed--
+    - LP: #545585
+  * (pre-stable) pata_via: Add VIA VX900 support
+    - LP: #548675
+
+  [ Ubuntu: 2.6.32-17.26 ]
+
+  * [Config] SECURITY_FILE_CAPABILITIES dissapeared in 2.6.33
+  * rules -- allow architecture configurations to be missing
+  * SAUCE: cdrom -- default to not locking the tray when in use
+    - LP: #397734
+  * expose the kernel EXTRAVERSION in dmesg and /proc/version_signature
+  * record the drm version in EXTRAVERSION
+  * linux-tools -- pull out the perf binary into a binary package
+  * [Config] enable MMIOTRACE for graphics debugging
+  * [Config] enable BLK_DEV_BSG
+  * debian -- fix builds when tools are disabled
+  * allow us to build default configs for automated builds
+  * config -- allow locally specified configuration overrides
+  * [Config] de-modularise PATA disk controllers
+  * [Config] de-modularise SATA disk controllers
+  * Revert "SAUCE: (pre-stable) netfilter: xt_recent: fix buffer overflow"
+    - LP: #540231
+  * Revert "SAUCE: (pre-stable) netfilter: xt_recent: fix false match"
+    - LP: #540231
+  * [Config] Update configs for 2.6.32.10
+    - LP: #540231
+  * [Config] Add vmw_pvscsi and vmxnet3 to -virtual flavour
+    - LP: #531017
+  * SAUCE: igb: Supress an upstream compiler complaint
+  * [Config] Fix sub-flavours package conflicts
+    - LP: #454827
+  * Revert "tpm_tis: TPM_STS_DATA_EXPECT workaround"
+    - LP: #540231
+  * Revert "(pre-stable) sched: Fix SMT scheduler regression in
+    find_busiest_queue()"
+    - LP: #540231
+  * (pre-stable) Bluetooth: Fix sleeping function in RFCOMM within invalid
+    context
+    - LP: #534549
+  * igb: remove unused temp variable from stats clearing path
+  * igb: update comments for serdes config and update to handle duplex
+  * igb: update the approach taken to acquiring and releasing the phy lock
+  * igb: add locking to reads of the i2c interface
+  * igb: add combined function for setting rar and pool bits
+  * igb: make use of the uta to allow for promiscous mode filter
+  * igb: add support for 82576NS SerDes adapter
+  * igb: add function to handle mailbox lock
+  * igb: fix a few items where weren't correctly setup for mbx timeout
+  * igb: change how we handle alternate mac addresses
+  * igb: remove microwire support from igb
+  * igb: move the generic copper link setup code into e1000_phy.c
+  * igb: add code to retry a phy read in the event of failure on link check
+  * igb: add additional error handling to the phy code
+  * igb: add flushes between RAR writes when setting mac address
+  * igb: Use the instance of net_device_stats from net_device.
+  * igb: Fix erroneous display of stats by ethtool -S
+  * igb: add new data structure for handling interrupts and NAPI
+  * igb: remove rx checksum good counter
+  * igb: increase minimum rx buffer size to 1K
+  * igb: move the tx and rx ring specific config into seperate functions
+  * igb: remove rx_ps_hdr_len
+  * igb: move SRRCTL register configuration into ring specific config
+  * igb: change the head and tail offsets into pointers
+  * igb: add pci device pointer to ring structure
+  * igb: move rx_buffer_len into the ring structure
+  * igb: move alloc_failed and csum_err stats into per rx-ring stat
+  * igb: add a flags value to the ring
+  * igb: place a pointer to the netdev struct in the ring itself
+  * igb: move the multiple receive queue configuration into seperate
+    function
+  * igb: delay VF reset notification until after interrupts are enabed
+  * igb: setup vlan tag replication stripping in igb_vmm_control
+  * igb: re-use ring configuration code in ethtool testing
+  * igb: make tx ring map and free functionality non-static
+  * igb: make ethtool use core xmit map and free functionality
+  * igb: add single vector msi-x testing to interrupt test
+  * igb: cleanup "todo" code found in igb_ethtool.c
+  * igb: add support for seperate tx-usecs setting in ethtool
+  * igb: cleanup some of the code related to hw timestamping
+  * igb: misc cleanups within igb_ethtool.c
+  * igb: use packet buffer sizes from RXPBS register
+  * igb: replace the VF clear_to_send with a flags value
+  * igb: rework use of VMOLR in regards to PF and VFs
+  * igb: rework handling of the vfta and vlvf registers in relation to
+    mng_vlan
+  * igb: move vf init into a seperate function
+  * igb: only process global stats in igb_update_stats
+  * igb: move global_quad_port_a from global into local static define
+  * igb: make tx hang check multiqueue, check eop descriptor
+  * igb: cleanup code related to ring resource allocation and free
+  * igb: change queue ordering for 82576 based adapters
+  * igb: cleanup interrupt enablement in regards to msix_other
+  * igb: Remove invalid stats counters
+  * igb: cleanup igb.h header whitespace and some structure formatting
+  * igb: cleanup igb xmit frame path
+  * igb: cleanup clean_rx_irq_adv and alloc_rx_buffers_adv
+  * igb: replace unecessary &adapter->hw with just hw where applicable
+  * igb: add pci_dev in few spots to clean up use of dev_err/info/warn
+  * igb: limit minimum mtu to 68 to keep ip bound to interface
+  * igb: open up SCTP checksum offloads to all MACs 82576 and newer
+  * igb: cleanup whitespace issues in igb_main.c
+  * igb: Fix warnings in igb_set_ringparam()
+  * igb: change type for ring sizes to u16 in igb_set_ring_param
+  * igb: move timesync init into a seperate function
+  * igb: when number of CPUs > 4 combine tx/rx queues to allow more queues
+  * igb: Rework how netdev->stats is handled
+  * igb: removed unused tx/rx total bytes/packets from adapter struct
+  * igb: check for packets on all tx rings when link is down
+  * igb: only recycle page if it is on our numa node
+  * igb: add support for the 82580 phy
+  * igb: add support for 82580 MAC
+  * igb: Add full support for 82580 devices
+  * igb: remove use of skb_dma_map from driver
+  * igb: fix handling of mailbox collisions between PF/VF
+  * igb: do not force pcs link when in KX mode
+  * igb: do not force retry count to 1 on 82580 phy
+  * igb: correctly offset 82575 flow control watermarks by 16 bytes
+  * igb: check both function bits in status register in wol exception
+  * igb: make certain to reassign legacy interrupt vectors after reset
+  * igb/igbvf: cleanup exception handling in tx_map_adv
+  * fix LOOKUP_FOLLOW on automount "symlinks"
+    - LP: #540231
+  * ARM: 5944/1: scsi: fix timer setup in fas216.c
+    - LP: #540231
+  * V4L/DVB: dvb: l64781.ko broken with gcc 4.5
+    - LP: #540231
+  * bfin: fix max timeout calculation
+    - LP: #540231
+  * V4L/DVB: Video : pwc : Fix regression in pwc_set_shutter_speed caused
+    by bad constant => sizeof conversion.
+    - LP: #540231
+  * V4L/DVB: bttv: Move I2C IR initialization
+    - LP: #540231
+  * V4L/DVB: cxusb: Select all required frontend and tuner modules
+    - LP: #540231
+  * memcg: fix oom killing a child process in an other cgroup
+    - LP: #540231
+  * fs/exec.c: fix initial stack reservation
+    - LP: #540231
+  * iwlwifi: error checking for number of tfds in queue
+    - LP: #540231
+  * iwlwifi: set HT flags after channel in rxon
+    - LP: #540231
+  * iwlwifi: sanity check before counting number of tfds can be free
+    - LP: #540231
+  * netlabel: fix export of SELinux categories > 127
+    - LP: #540231
+  * ahci: disable FPDMA auto-activate optimization on NVIDIA AHCI
+    - LP: #540231
+  * PCI hotplug: ibmphp: read the length of ebda and map entire ebda region
+    - LP: #540231
+  * PCI hotplug: check ioremap() return value in ibmphp_ebda.c
+    - LP: #540231
+  * ACPI: remove Asus P2B-DS from acpi=ht blacklist
+    - LP: #540231
+  * ACPI: fix "acpi=ht" boot option
+    - LP: #540231
+  * thinkpad-acpi: wrong thermal attribute_group removed in thermal_exit()
+    - LP: #540231
+  * ACPI: Be in TS_POLLING state during mwait based C-state entry
+    - LP: #540231
+  * mpt2sas: Delete volume before HBA detach.
+    - LP: #540231
+  * slab: initialize unused alien cache entry as NULL at
+    alloc_alien_cache().
+    - LP: #540231
+  * mac80211: quit addba_resp_timer if Tx BA session is torn down
+    - LP: #540231
+  * V4L/DVB (13991): gspca_mr973010a: Fix cif type 1 cameras not streaming
+    on UHCI controllers
+    - LP: #540231
+  * vfs: take f_lock on modifying f_mode after open time
+    - LP: #540231
+  * readahead: introduce FMODE_RANDOM for POSIX_FADV_RANDOM
+    - LP: #540231
+  * HID: remove TENX iBuddy from blacklist
+    - LP: #540231
+  * HID: add multi-input quirk for NextWindow Touchscreen.
+    - LP: #540231
+  * HID: usbhid: introduce timeout for stuck ctrl/out URBs
+    - LP: #540231
+  * airo: fix setting zero length WEP key
+    - LP: #540231
+  * idr: fix a critical misallocation bug, take#2
+    - LP: #540231
+  * Switch proc/self to nd_set_link()
+    - LP: #540231
+  * sparc: Align clone and signal stacks to 16 bytes.
+    - LP: #540231
+  * sparc32: Fix page_to_phys().
+    - LP: #540231
+  * sparc32: Fix struct stat uid/gid types.
+    - LP: #540231
+  * sparc: leds_resource.end assigned to itself in clock_board_probe()
+    - LP: #540231
+  * sparc64: Fix sun4u execute bit check in TSB I-TLB load.
+    - LP: #540231
+  * net: Fix sysctl restarts...
+    - LP: #540231
+  * net-sysfs: Use rtnl_trylock in wireless sysfs methods.
+    - LP: #540231
+  * net: bug fix for vlan + gro issue
+    - LP: #540231
+  * inet: Remove bogus IGMPv3 report handling
+    - LP: #540231
+  * ipv6: conntrack: Add member of user to nf_ct_frag6_queue structure
+    - LP: #540231
+  * drivers/net: ks8851_mll ethernet network driver
+    - LP: #540231
+  * sky2: fix transmit DMA map leakage
+    - LP: #540231
+  * SCSI: qla2xxx: Obtain proper host structure during response-queue
+    processing.
+    - LP: #540231
+  * rtc-core: fix memory leak
+    - LP: #540231
+  * offb: Add support for framebuffer handoff to offb.
+    - LP: #540231
+  * tpm_tis: TPM_STS_DATA_EXPECT workaround
+    - LP: #540231
+  * rndis_wlan: handle NL80211_AUTHTYPE_AUTOMATIC
+    - LP: #540231
+  * rndis_wlan: fix buffer overflow in rndis_query_oid
+    - LP: #540231
+  * rndis_wlan: disable stall workaround
+    - LP: #540231
+  * net/via-rhine: Fix scheduling while atomic bugs
+    - LP: #540231
+  * clocksource: Fix up a registration/IRQ race in the sh drivers.
+    - LP: #540231
+  * SCSI: qla1280: Drop host_lock while requesting firmware
+    - LP: #540231
+  * Staging: hv: add a pci device table
+    - LP: #540231
+  * Staging: hv: match on DMI values to know if we should run.
+    - LP: #540231
+  * Staging: mimio: remove the mimio driver
+    - LP: #540231
+  * dvb-core: Fix DoS bug in ULE decapsulation code that can be triggered
+    by an invalid Payload Pointer
+    - LP: #540231
+  * V4L/DVB (13148): uvcvideo: Handle V4L2_CTRL_TYPE_BUTTON control type in
+    VIDIOC_QUERYCTRL
+    - LP: #540231
+  * PM / Hibernate: Fix preallocating of memory
+    - LP: #540231
+  * macintosh/therm_adt746x: Fix sysfs attributes lifetime
+    - LP: #540231
+  * macintosh/hwmon/ams: Fix device removal sequence
+    - LP: #540231
+  * oprofile/x86: fix perfctr nmi reservation for mulitplexing
+    - LP: #540231
+  * oprofile: remove tracing build dependency
+    - LP: #540231
+  * oprofile/x86: remove node check in AMD IBS initialization
+    - LP: #540231
+  * oprofile/x86: use kzalloc() instead of kmalloc()
+    - LP: #540231
+  * oprofile/x86: fix msr access to reserved counters
+    - LP: #540231
+  * ALSA: hda: Use 3stack quirk for Toshiba Satellite L40-10Q
+    - LP: #524948, #540231
+  * ALSA: via82xx: add quirk for D1289 motherboard
+    - LP: #540231
+  * ALSA: pcm core - fix fifo_size channels interval check
+    - LP: #540231
+  * ALSA: USB MIDI support for Access Music VirusTI
+    - LP: #540231
+  * ALSA: hda: Use LPIB for Dell Latitude 131L
+    - LP: #530346, #540231
+  * ALSA: hda: Use LPIB for a Biostar Microtech board
+    - LP: #523953, #540231
+  * ALSA: hda - Add a position_fix quirk for MSI Wind U115
+    - LP: #540231
+  * ALSA: hda - Add position_fix quirk for HP dv3
+    - LP: #540231
+  * ALSA: hda-intel: Add position_fix quirk for ASUS M2V-MX SE.
+    - LP: #540231
+  * ASoC: fix ak4104 register array access
+    - LP: #540231
+  * driver-core: fix race condition in get_device_parent()
+    - LP: #540231
+  * Driver-Core: devtmpfs - reset inode permissions before unlinking
+    - LP: #540231
+  * tty: Fix the ldisc hangup race
+    - LP: #540231
+  * serial: imx: fix NULL dereference Oops when pdata == NULL
+    - LP: #540231
+  * USB: serial: sierra driver indat_callback fix
+    - LP: #511157, #540231
+  * USB: SIS USB2VGA DRIVER: support KAIREN's USB VGA adaptor
+    USB20SVGA-MB-PLUS
+    - LP: #540231
+  * USB: fix I2C API usage in ohci-pnx4008.
+    - LP: #540231
+  * p54usb: Add the USB ID for Belkin (Accton) FD7050E ver 1010ec
+    - LP: #540231
+  * p54pci: handle dma mapping errors
+    - LP: #540231
+  * gpiolib: Actually set output state in wm831x_gpio_direction_output()
+    - LP: #540231
+  * hwmon: (tmp421) Fix temperature conversions
+    - LP: #540231
+  * hwmon: (tmp421) Restore missing inputs
+    - LP: #540231
+  * pata_hpt3x2n: always stretch UltraDMA timing
+    - LP: #540231
+  * scm: Only support SCM_RIGHTS on unix domain sockets.
+    - LP: #540231
+  * ath9k: fix beacon timer restart after a card reset
+    - LP: #540231
+  * ath9k: fix rate control fallback rate selection
+    - LP: #540231
+  * ath9k: disable RIFS search for AR91xx based chips
+    - LP: #540231
+  * ath5k: use correct packet type when transmitting
+    - LP: #540231
+  * b43/b43legacy: Wake queues in wireless_core_start
+    - LP: #540231
+  * netfilter: xt_recent: fix buffer overflow
+    - LP: #540231
+  * netfilter: xt_recent: fix false match
+    - LP: #540231
+  * sunxvr500: Additional PCI id for sunxvr500 driver
+    - LP: #540231
+  * thinkpad-acpi: fix poll thread auto-start
+    - LP: #540231
+  * thinkpad-acpi: R52 brightness_mode has been confirmed
+    - LP: #540231
+  * thinkpad-acpi: document HKEY event 3006
+    - LP: #540231
+  * thinkpad-acpi: make driver events work in NVRAM poll mode
+    - LP: #540231
+  * thinkpad-acpi: fix bluetooth/wwan resume
+    - LP: #540231
+  * ocfs2: Only bug out in direct io write for reflinked extent.
+    - LP: #540231
+  * x86, ia32_aout: do not kill argument mapping
+    - LP: #540231
+  * x86: Add iMac9,1 to pci_reboot_dmi_table
+    - LP: #540231
+  * x86, xen: Disable highmem PTE allocation even when CONFIG_HIGHPTE=y
+    - LP: #540231
+  * x86: Avoid race condition in pci_enable_msix()
+    - LP: #540231
+  * x86: Fix SCI on IOAPIC != 0
+    - LP: #540231
+  * USB: xhci: Fix finding extended capabilities registers
+    - LP: #540231
+  * USB: fix the idProduct value for USB-3.0 root hubs
+    - LP: #540231
+  * USB: fix crash in uhci_scan_schedule
+    - LP: #540231
+  * USB: remove debugging message for uevent constructions
+    - LP: #540231
+  * USB: Move hcd free_dev call into usb_disconnect to fix oops
+    - LP: #540231
+  * USB: ftdi_sio: isolate all device IDs to new ftdi_sio_ids.h header
+    - LP: #540231
+  * USB: ftdi_sio: sort PID/VID entries in new ftdi_sio_ids.h header
+    - LP: #540231
+  * USB: ftdi_sio: new device id for papouch AD4USB
+    - LP: #540231
+  * USB: ftdi_sio: add device IDs (several ELV, one Mindstorms NXT)
+    - LP: #540231
+  * USB: add new ftdi_sio device ids
+    - LP: #540231
+  * USB: serial: ftdi: add CONTEC vendor and product id
+    - LP: #540231
+  * USB: cp210x: Add 81E8 (Zephyr Bioharness)
+    - LP: #540231
+  * USB: unusual_devs: Add support for multiple Option 3G sticks
+    - LP: #540231
+  * sunrpc: remove unnecessary svc_xprt_put
+    - LP: #540231
+  * SUNRPC: Handle EINVAL error returns from the TCP connect operation
+    - LP: #540231
+  * s3cmci: s3cmci_card_present: Use no_detect to decide whether there is a
+    card detect pin
+    - LP: #540231
+  * rtc-coh901331: fix braces in resume code
+    - LP: #540231
+  * NFS: Fix an allocation-under-spinlock bug
+    - LP: #540231
+  * dm: free dm_io before bio_endio not after
+    - LP: #540231
+  * KVM: x86 emulator: Add group8 instruction decoding
+    - LP: #540231
+  * KVM: x86 emulator: Forbid modifying CS segment register by mov
+    instruction
+    - LP: #540231
+  * KVM: x86 emulator: Add group9 instruction decoding
+    - LP: #540231
+  * KVM: x86 emulator: Check CPL level during privilege instruction
+    emulation
+    - LP: #540231
+  * sched: Fix sched_mv_power_savings for !SMT
+    - LP: #540231
+  * sched: Fix SMT scheduler regression in find_busiest_queue()
+    - LP: #540231
+  * sched: Don't use possibly stale sched_class
+    - LP: #540231
+  * x86, mm: Allow highmem user page tables to be disabled at boot time
+    - LP: #540231
+  * Linux 2.6.32.10
+    - LP: #540231
+  * drm/i915: give up on 8xx lid status
+    - LP: #540231
+  * drm/i915: Use a dmi quirk to skip a broken SDVO TV output.
+    - LP: #540231
+  * drm/ttm: handle OOM in ttm_tt_swapout
+    - LP: #540231
+  * drm/radeon/kms/atom: fix shr/shl ops
+    - LP: #540231
+  * Linux 2.6.32.10+drm33.1
+    - LP: #540231
+
+  [ Ubuntu: 2.6.32-16.25 ]
+
+  * linux-tools -- move to Suggests: with explicit seeding
+    - LP: #534635
+  * [Config] CONFIG_HID=m
+  * (pre-stable) sched: Fix SMT scheduler regression in
+    find_busiest_queue()
+  * KVM: introduce kvm_vcpu_on_spin
+  * KVM: VMX: Add support for Pause-Loop Exiting
+
+ -- Andy Whitcroft <apw@canonical.com>  Wed, 31 Mar 2010 16:22:59 +0100
+
+linux-mvl-dove (2.6.32-202.14) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * rules -- allow architecture configurations to be missing
+
+  [ Eric Miao ]
+
+  * [Config]: Make UIO_DOVE_VMETA driver builtin
+    - LP: #541921
+
+  [ Upstream Kernel Changes ]
+
+  * sound: skip error handling inside soc_pcm_open
+    - LP: #530404
+  * DVS: Fixed a potential conflict of defining dvs_enable as global for
+    two diffrent baords
+    - LP: #537311
+  * rt5611_ts: swap touchscreen Y axis
+    - LP: #537311
+  * dove: fix section mismatch error
+    - LP: #537311
+
+ -- Stefan Bader <stefan.bader@canonical.com>  Fri, 26 Mar 2010 22:53:03 +0100
+
+linux-mvl-dove (2.6.32-202.13) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * armel -- disable linux-tools
+
+ -- Andy Whitcroft <apw@canonical.com>  Tue, 09 Mar 2010 21:39:29 +0000
+
+linux-mvl-dove (2.6.32-202.12) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * rebase to Ubuntu-2.6.32-16.24
+  * [Config] updateconfigs following rebase to Ubuntu-2.6.32-16.24
+  * [Config] updateconfigs following rebase to Ubuntu-2.6.32-16.24
+  * lintian -- update debhelper package version dependancy
+  * lintian -- fix ghostscript dependancy
+  * lintian -- add required misc:Depends
+  * rename the debug packages to match archive standard
+    - LP: #527837
+
+  [ Eric Miao ]
+
+  * SAUCE: dove: disable conflicting v6 cache fns in zImage head.S
+  * [Config]: CONFIG_KEXEC=y and CONFIG_ATAGS_PROC=y
+  * [Config]: update configs for latest Marvell patchset
+  * [Config]: disable OABI_COMPAT
+    - LP: #534277
+
+  [ Saeed Bishara ]
+
+  * SAUCE: arm: invalidate TLBs when enabling mmu
+  * SAUCE: arm: disable L2 cache in the v7 finish function
+
+  [ Tony Lindgren ]
+
+  * SAUCE: arm: Fix init_atags_procfs() to check tag->hdr.size
+
+  [ Upstream Kernel Changes ]
+
+  * Revert "printk: remove unused code from kernel/printk.c"
+  * Revert "Save thread registers in coredumps" Because this patch is
+    already in the kernel.
+  * Revert "dove: enable cpu mode (v6/v7) in run-time detection"
+  * Revert "ARM: provide the cpu_match function to PJ4"
+  * Revert "ARM: introduce the cpu_match function to the proc_info"
+  * ARM: 5884/1: arm: Fix DCC console for v7
+  * ARM: 5885/1: arm: Flush TLB entries in setup_mm_for_reboot()
+  * ARM: 5886/1: arm: Fix cpu_proc_fin() for proc-v7.S and make kexec work
+  * ARM: 5888/1: arm: Update comments in cacheflush.h and remove
+    unnecessary V6 and V7 comments
+  * rt5630: fix codec->hw_read function
+  * mm: Check if any page in a pageblock is reserved before marking it
+    MIGRATE_RESERVE
+  * Add build option to to set the default panic timeout.
+  * sched: Enable might_sleep before initializing drivers.
+  * Add code to prevent system calls from being restarted muliple times
+    before returning from the kernel.
+  * Save thread registers in coredumps
+  * armv6 dcc tty driver
+  * PM: Add wake lock api.
+  * PM: Add early suspend api.
+  * PM: Implement wakelock api.
+  * PM: Implement early suspend api
+  * PM: Add user-space wake lock api.
+  * PM: wakelock: Abort task freezing if a wake lock is held.
+  * PM: earlysuspend: Add console switch when user requested sleep state
+    changes.
+  * PM: earlysuspend: Removing dependence on console.
+  * rtc: Add android alarm driver.
+  * rtc: Try to prevent RTC errors from accumulating.
+  * switch: switch class and GPIO drivers.
+  * pmem: Add pmem driver
+  * Add android_aid.h
+  * ashmem for 2.6.27.
+  * Add missing conflict codes for 0079-ashmem-for-2.6.27.patch
+  * Paranoid network.
+  * net: socket ioctl to reset connections matching local address
+  * sysfs_net_ipv4: Add sysfs-based knobs for controlling TCP window size
+  * uidstat: Adding uid stat driver to collect network statistics.
+  * adding conflict patch codes for
+    0083-uidstat-Adding-uid-stat-driver-to-collect-network-s.patch
+  * FAT: Add new ioctl VFAT_IOCTL_GET_VOLUME_ID for reading the volume ID.
+  * Grants system server access to /proc/<pid>/oom_adj for Android
+    applications.
+  * Input: Generic GPIO Input device.
+  * add missing conflict code for
+    0086-Input-Generic-GPIO-Input-device.patch
+  * Input: Hold wake lock while event queue is not empty.
+  * Input: Use monotonic time for event time stamps.
+  * Input: synaptics_i2c_rmi: Driver for Synaptics Touchscreens using RMI
+    over I2C.
+  * input: Add keyreset driver.
+  * mmc: Add status IRQ and status callback function to mmc platform data
+  * mmc: sd: Add new CONFIG_MMC_PARANOID_SD_INIT for enabling retries
+    during SD detection
+  * mmc: Add concept of an 'embedded' SDIO device.
+  * trout: Add functions for WiFi
+  * mmc: Add new API call 'sdio_reset_comm' for resetting communication
+    with an SDIO device
+  * mmc: sd: When resuming, try a little harder to init the card
+  * mmc: mmcblk: Add new feature 'CONFIG_MMC_BLOCK_PARANOID_RESUME'
+  * mmc: sd: Add retries in re-detection
+  * android_usb: Composite USB gadget driver for android.
+  * rfkill: Introduce CONFIG_RFKILL_PM and use instead of CONFIG_PM to
+    power down
+  * tiwlan: Add abstract wifi control functions support
+  * android: Add android config documentation to boot framework.
+  * block: block_dump: Add number of sectors to debug output
+  * fs: block_dump: Don't display inode changes if block_dump < 2
+  * regenerated code for
+    0107-mmc-core-Hold-a-wake-lock-accross-delayed-work-m.patch
+  * mmc: sd: Remove debugging printk
+  * printk: Fix log_buf_copy termination.
+  * kernel_debugger_core: add interrupt-context debugger core
+  * kernel_debugger_core: Add sysrq command.
+  * pmem: Add include sched.h to fix compile errors
+  * net: Fix compilation of the IPv6 module
+  * ashmem: Don't install fault handler for private mmaps.
+  * ashmem: Add common prefix to name reported in /proc/pid/maps
+  * net: add PPP on L2TP Access Concentrator (PPPoLAC) driver.
+  * cgroup: Add generic cgroup subsystem permission checks.
+  * add missing conflict codes for
+    0124-cgroup-Add-generic-cgroup-subsystem-permission-chec.patch
+  * nohz: Fix ondemand governor not always ramping up on 100% load.
+  * usb: gadget: android: Allow usb charging to draw up to 500mA instead of
+    250.
+  * regnerate patch for
+    0127-futex-Restore-one-of-the-fast-paths-eliminated-by-3.patch
+  * Optionally flush entire dcache from v6_dma_flush_range
+  * net: add PPP on PPTP Network Server (PPPoPNS) driver.
+  * sdio: fix sdio_reset_comm() error path
+  * net: Fix a bitmask in PPPoPNS and rename constants in PPPoPNS and
+    PPPoLAC.
+  * net: Fix a potential deadlock while releasing PPPoLAC/PPPoPNS socket.
+  * ashmem: don't require a page aligned size
+  * security: Add AID_NET_RAW and AID_NET_ADMIN capability check in
+    cap_capable().
+  * net: Replace AID_NET_RAW checks with capable(CAP_NET_RAW).
+  * net: Force PPPoLAC and PPPoPNS to bind an interface before creating PPP
+    channel.
+  * Add default configuration for Android
+  * Sync with the newest dove_defconfig
+  * Turn off TLS feature for android in v7
+  * Fix compiling error for lowmemorykiller
+  * Fix Compiling error for shmem
+  * Temporary disable pm_suspend call.
+  * Fix crash error for shmem
+  * Fix met compiling errors from 2.6.31 kernel to 2.6.32 kernel.
+  * Sync up with 2.6.32.2's dove_defconfig
+  * cesa: add address decoding windows initialization code
+  * Refine comments and algorithm for easier to understand LCD's HW RGB
+    format.
+  * PM: runtime support for V6 or V7 mode
+  * Remove all Z0 specific code
+  * dove: remove remaning Z0 stuff
+  * Add auto-calibration
+  * fix compilation error (kernel/power/Makefile)
+  * update dove_avng_y1_defconfig
+  * dovefb: clean up CONFIG_DOVEFB_SINGLE_DISPLAY_ACCURATE_PCLK
+  * 1. fill initial data for dcon. 2. refine backlight driver interface.
+  * 1. add clock disable and enable interface 2. refine changing LCD source
+    clock implementation.
+  * Fill backlight driver platform data
+  * 1. apply Tawfik's patch to hook fb_blank event. 2. add LCD power on and
+    off interface.
+  * Refine backlight interface more portable
+  * 1. Refine dcon power management feature 2. Implement sysfs interfaces.
+  * 1. Fix blank function setting to wrong mode when suspend. 2. Add SRAM
+    power down interface.
+  * remove compiling warning.
+  * dove: remove another DOVE_REV_Z0 stuff
+  * dove: sync dove_defconfig with latest patches
+  * dove: fix compilation warning in pm.c
+  * Adds ADI9889 HDMI transmitter support
+  * Dove: Add Video Plug support
+  * MPP changes for Dove -
+  * Swap R&B for Video plug on video overlay Unclear why this is required,
+    but it solves color bitmapping. Keep now for Video plug but requires
+    more research
+  * 1. Remove testing code. 2. disable dumb interface as well when receives
+    FB_BLANK.
+  * Dove nand: add support for Two CS for the DB board
+  * Dove nand: Add support for "cmdlinepart" option Add support for
+    "cmdlinepart" option in kernel command line dove-nand should be used as
+    the NAND HAL device name. example: mtdparts=dove-nand:1g(swap),-(root)
+  * dove: use dove_cesa_addr_dec_data instead of dove_eth_addr_dec_data for
+    cesa driver
+  * dovefb: fix compilation error when mv_spi is disabled
+  * Dove: remove gpu_size, vmeta_size and pvt_size kernel command line
+    parameters from code as they have no effect because fixup function is
+    called before parse_cmdline function ( see arch/arm/kernel/setup.c )
+  * VMeta PM func: 1. Power on the VMeta only when VMeta was been used 2.
+    Support suspend/resume when VMeta was been used (also need user space
+    player support)
+  * Add a watch dog timer for Vmeta suspend/resume func
+  * Dove NAND: fix double byte command on writing small pages
+  * Change Vmeta PM clock control to using Linux clock framework
+  * Disable the Vmtea clock/power as default
+  * Fix MMC/SD cannot be detected issue due to merge upgraded from .31 to
+    .32 Signed-off-by: Steve Guo <steve.guo@marvell.com>
+  * dove: disable some andriod features
+  * dove: fix crash in shmem
+  * PM: Debugger Reset Workaround in Deep-Idle
+  * dove: increase BOOT_PARAMS_SIZE for dram params
+  * Add support for AV-D1 X0 board and modify ADI9889 driver to fit Linux
+    coding style
+  * remove android config from dove_defconfig
+  * update dove_avng_y1_defconfig
+  * Fixed AC97 read error issue. Modified SOC sound control items.
+  * update dove_avng_x0_defconfig : Disable CONFIG_DOVE_DEBUGGER_MODE_V6
+  * dove: enable UBIFS extended features and advanced compression
+  * crypt: update ocf to latest release
+  * dove: enable kexec support
+  * sound: rt5623 codec: deprecate hw_read and fix driver name
+  * dove: use updated i2s codec name
+  * dove: fix dai structure for avengers boards.
+  * dove: delete the i2c-dummy.c driver which is not used by any system
+  * sound: rename cs42l51 codec i2c driver from i2s_i2c to cs42l51
+  * sound: change rt5630 name from i2s_i2c to rt5630
+  * dove: configure pm mpps for new revision of avengers board
+  * dove: change power button code to KEY_SLEEP
+  * Add more resolution support in kernel driver according VGA timing spec
+  * LCD: disabled CONFIG_DOVEFB_SINGLE_DISPLAY_ACCURATE_PCLK and instead
+    disabled accurate clock option in runtime if both LCD units are
+    enabled; this will enable using the same uImage for dual and non-dual
+    mode.
+  * 1. fill initial data for dcon. 2. refine backlight driver interface.
+  * dove: cleanup gpu_size kernel parameter
+  * pcie - add option to disable scan by command line parameter
+  * PM: add FB notifier to manage Book/Deep-Idle toggeling
+  * ARM: Ensure ARMv6/7 mm files are built using appropriate assembler
+    options
+  * kirkwood: fix compilation errors
+  * dove: disable highmem and enable CONFIG_VMSPLIT_2G
+  * dove: set SKB_HEADROOM to 32 instead of 16
+  * bmm: export outer_cache
+  * dove: add missing pj4 name entries
+  * Fix thread stack overflow caused by Dove NAND HAL driver
+  * Remove unused include file and declaration
+  * Roll back wait for vsync mechanism to wait_event_interruptable_timeout
+    and give timeout delay from 40ms to 4ms.
+  * dovefb: remove another DOVE_REV_Z0 stuff
+  * mv643xx_eth: don't include cache padding in rx desc buffer size
+  * fix build error introduced by add missing conflict codes for
+    0124-cgroup-Add-generic-cgroup-subsystem-permission-chec.patch
+  * crypto: add openssl patch for user space to utilize the cesa engine
+  * crypto: update openswan patch for version 2.6.24
+  * dove: add device driver for the GPU gc600 engine
+  * Marvell Buffer Management Module for VPU & GPU memory buffer maintain
+  * BMM: split VPU & GPU to choice use BMM or not
+  * dove: enable building the bmm driver as module
+  * cesa: remove patch for openswan version 2.6.18
+  * Configure new LCD register for upcoming DOVE A0 Chip
+  * fix pixclk when under interlaced mode
+  * Not to power off LCD SRAM when system blanks screen.
+  * dvs: make dvs_enable variable depend on board, and change the default
+    to enable instead of disable on Dove DB board.
+
+  [ Ubuntu: 2.6.32-16.24 ]
+
+  * armel -- perf userspace does not support arm
+  * ia64 -- libelf-dev/binutils-dev to not provide necessary libraries
+
+  [ Ubuntu: 2.6.32-16.23 ]
+
+  * SAUCE: PM report driver and device suspend/resume times -- move config
+  * update to standards version 3.8.4.0
+  * printenv -- expose all of the package selectors
+  * source package -- cleanup source content control
+  * doc package -- ensure we do build package content on buildd
+  * lintian -- correct the address in the debian/copyright
+  * lintian -- update debhelper package version dependancy
+  * lintian -- fix ghostscript dependancy
+  * lintian -- add required misc:Depends
+  * lintian -- move our debhelper compat level to debian/compat
+  * perf -- build the kernel carried tools
+  * perf -- add linux-tools carrying the version switches and manuals
+  * SAUCE: fix up Kconfig for staging drivers
+  * [Config] enable NOUVEAU etc following drm backport
+  * update DRM to mainline v2.6.33
+  * [Config] Remove AppArmor config options that no longer exist (ports)
+  * [Config] updateportsconfigs following drm update
+  * ubuntu: AppArmor -- update to mainline 2010-03-04
+  * SAUCE: AppArmor: Reintroduce AppArmor 2.4 compatibility
+  * SAUCE: AppArmor: replace strim with strstrip for 2.6.32 kernels
+  * [Config] Remove AppArmor config options that no longer exist
+  * ubuntu: rtl8192se -- version 2010-0115,0014
+    - LP: #530275
+  * [Config] added CONFIG_RTL8192SE module.
+    - LP: #530275
+  * [Config] Added vmw_pvscsi to d-i/scsi-modules
+    - LP: #531017
+  * [Upstream] netfilter: xt_recent: Add an entry reaper
+  * Revert "KVM: x86 emulator: Check CPL level during privilege instruction
+    emulation"
+  * Revert "KVM: x86 emulator: Fix popf emulation"
+  * Revert "KVM: x86 emulator: Check IOPL level during io instruction
+    emulation"
+  * Revert "KVM: x86 emulator: Add Virtual-8086 mode of emulation"
+  * Revert "KVM: fix memory access during x86 emulation."
+  * Add vlan (8021.Q) module package for d-i.
+  * (pre-stable) drm/i915: blacklist lid status: Sony VGN-BX196VP, Dell
+    Inspiron 700m
+    - LP: #515246
+  * [Upstream] docbook: need xmldoclinks for all doc types
+  * x86: set_personality_ia32() misses force_personality32
+  * lib: Introduce generic list_sort function
+  * drm/nv50: Implement ctxprog/state generation.
+  * drm/nv50: Remove redundant/incorrect ctxvals initialisation.
+  * (pre-stable) drm/i915: blacklist lid status: Sony VGN-BX196VP, Dell
+    Inspiron 700m
+    - LP: #515246
+
+  [ Ubuntu: 2.6.32-15.22 ]
+
+  * Revert "[Config] added new config option CONFIG_SR_REPORT_TIME_LIMIT"
+  * Revert "SAUCE: PM report driver and device suspend/resume times."
+  * [Config] set CONFIG_SR_REPORT_TIME_LIMIT
+  * SAUCE: PM report driver and device suspend/resume times.
+
+  [ Ubuntu: 2.6.32-15.21 ]
+
+  * Revert "(pre-stable) drm/i915: Increase fb alignment to 64k"
+  * Revert "[Config] lenovo-sl-laptop -- enable"
+  * Revert "ubuntu: lenovo-sl-laptop -- git tip (b19a08f81f)"
+  * armel -- cramfs module will no longer be built
+  * d-i -- make all modules optional
+  * rename the debug packages to match archive standard
+    - LP: #527837
+  * lenovo-sl-laptop is no longer built
+  * Disable 4MB page tables for Atom, work around errata AAE44
+    - LP: #523112
+  * ubuntu: dm-raid4-5: Depend on XOR_BLOCKS
+  * ubuntu: fsam7400: Depend on CHECK_SIGNATURE
+  * SAUCE: drm/i915: don't change DRM configuration when releasing load
+    detect pipe
+    - LP: #488328
+  * [Config] armel Update versatile initrd configs
+    - LP: #524893
+  * SAUCE: [um] Don't use nx_enabled under UML
+    - LP: #524849
+  * [Config] added new config option CONFIG_SR_REPORT_TIME_LIMIT
+  * SAUCE: v3 - Add Dell Business Class Netbook LED driver
+  * SAUCE: PM report driver and device suspend/resume times.
+  * Revert "[Upstream] e1000e: enhance frame fragment detection"
+    - CVE-2009-4538
+  * Revert "[Upstream] e1000: enhance frame fragment detection"
+    - CVE-2009-4536
+  * [Config] Enabled CONFIG_LEDS_DELL_NETBOOKS=m
+  * SAUCE: (pre-stable) netfilter: xt_recent: fix buffer overflow
+  * SAUCE: (pre-stable) netfilter: xt_recent: fix false match
+  * Revert "(pre-stable) eCryptfs: Add getattr function"
+  * Fix potential crash with sys_move_pages
+  * futex_lock_pi() key refcnt fix
+  * futex: Handle user space corruption gracefully
+  * futex: Handle futex value corruption gracefully
+  * Fix race in tty_fasync() properly
+  * hwmon: (w83781d) Request I/O ports individually for probing
+  * hwmon: (lm78) Request I/O ports individually for probing
+  * hwmon: (adt7462) Wrong ADT7462_VOLT_COUNT
+  * ALSA: ctxfi - fix PTP address initialization
+  * drm/i915: disable hotplug detect before Ironlake CRT detect
+  * drm/i915: enable self-refresh on 965
+  * drm/i915: Disable SR when more than one pipe is enabled
+  * drm/i915: Fix DDC on some systems by clearing BIOS GMBUS setup.
+  * drm/i915: Add HP nx9020/SamsungSX20S to ACPI LID quirk list
+  * drm/i915: Fix the incorrect DMI string for Samsung SX20S laptop
+  * drm/i915: Add MALATA PC-81005 to ACPI LID quirk list
+  * usb: r8a66597-hcd: Flush the D-cache for the pipe-in transfer buffers.
+  * i2c-tiny-usb: Fix on big-endian systems
+  * drm/i915: handle FBC and self-refresh better
+  * drm/i915: Increase fb alignment to 64k
+  * drm/i915: Update write_domains on active list after flush.
+  * regulator: Fix display of null constraints for regulators
+  * ALSA: hda-intel: Avoid divide by zero crash
+  * CPUFREQ: Fix use after free of struct powernow_k8_data
+  * freeze_bdev: don't deactivate successfully frozen MS_RDONLY sb
+  * cciss: Make cciss_seq_show handle holes in the h->drv[] array
+  * ioat: fix infinite timeout checking in ioat2_quiesce
+  * resource: add helpers for fetching rlimits
+  * fs/exec.c: restrict initial stack space expansion to rlimit
+  * cifs: fix length calculation for converted unicode readdir names
+  * NFS: Fix a reference leak in nfs_wb_cancel_page()
+  * NFS: Try to commit unstable writes in nfs_release_page()
+  * NFSv4: Don't allow posix locking against servers that don't support it
+  * NFSv4: Ensure that the NFSv4 locking can recover from stateid errors
+  * NFS: Fix an Oops when truncating a file
+  * NFS: Fix a umount race
+  * NFS: Fix a bug in nfs_fscache_release_page()
+  * NFS: Fix the mapping of the NFSERR_SERVERFAULT error
+  * md: fix 'degraded' calculation when starting a reshape.
+  * V4L/DVB: dvb-core: fix initialization of feeds list in demux filter
+  * Export the symbol of getboottime and mmonotonic_to_bootbased
+  * kvmclock: count total_sleep_time when updating guest clock
+  * KVM: PIT: control word is write-only
+  * tpm_infineon: fix suspend/resume handler for pnp_driver
+  * amd64_edac: Do not falsely trigger kerneloops
+  * netfilter: nf_conntrack: fix memory corruption with multiple namespaces
+  * netfilter: nf_conntrack: per netns nf_conntrack_cachep
+  * netfilter: nf_conntrack: restrict runtime expect hashsize modifications
+  * netfilter: xtables: compat out of scope fix
+  * netfilter: nf_conntrack: fix hash resizing with namespaces
+  * drm/i915: remove full registers dump debug
+  * drm/i915: add i915_lp_ring_sync helper
+  * drm/i915: Don't wait interruptible for possible plane buffer flush
+  * dasd: remove strings from s390dbf
+  * crypto: padlock-sha - Add import/export support
+  * wmi: Free the allocated acpi objects through wmi_get_event_data
+  * dell-wmi, hp-wmi, msi-wmi: check wmi_get_event_data() return value
+  * /dev/mem: introduce size_inside_page()
+  * devmem: check vmalloc address on kmem read/write
+  * devmem: fix kmem write bug on memory holes
+  * SCSI: mptfusion : mptscsih_abort return value should be SUCCESS instead
+    of value 0.
+  * sh: Couple kernel and user write page perm bits for CONFIG_X2TLB
+  * ALSA: hda - use WARN_ON_ONCE() for zero-division detection
+  * dst: call cond_resched() in dst_gc_task()
+  * ALSA: hda - Improved MacBook (Pro) 5,1 / 5,2 support
+  * befs: fix leak
+  * rtc-fm3130: add missing braces
+  * Call flush_dcache_page after PIO data transfers in libata-sff.c
+  * ahci: add Acer G725 to broken suspend list
+  * pktgen: Fix freezing problem
+  * x86/amd-iommu: Fix IOMMU-API initialization for iommu=pt
+  * x86/amd-iommu: Fix deassignment of a device from the pt_domain
+  * x86: Re-get cfg_new in case reuse/move irq_desc
+  * Staging: fix rtl8187se compilation errors with mac80211
+  * ALSA: usb-audio - Avoid Oops after disconnect
+  * serial: 8250: add serial transmitter fully empty test
+  * sysfs: sysfs_sd_setattr set iattrs unconditionally
+  * class: Free the class private data in class_release
+  * USB: usbfs: only copy the actual data received
+  * USB: usbfs: properly clean up the as structure on error paths
+  * rtl8187: Add new device ID
+  * ACPI: Add NULL pointer check in acpi_bus_start
+  * ACPI: fix High cpu temperature with 2.6.32
+  * drm/radeon/kms: use udelay for short delays
+  * NFS: Too many GETATTR and ACCESS calls after direct I/O
+  * eCryptfs: Add getattr function
+  * b43: Fix throughput regression
+  * ath9k: Fix sequence numbers for PAE frames
+  * mac80211: Fix probe request filtering in IBSS mode
+  * iwlwifi: Fix to set correct ht configuration
+  * dm stripe: avoid divide by zero with invalid stripe count
+  * dm log: userspace fix overhead_size calcuations
+  * Linux 2.6.32.9
+  * sfc: Fix SFE4002 initialisation
+  * sfc: Fix sign of efx_mcdi_poll_reboot() error in efx_mcdi_poll()
+  * sfc: SFE4002/SFN4112F: Widen temperature and voltage tolerances
+  * (pre-stable) HID: handle joysticks with large number of buttons
+    - LP: #492056
+  * (pre-stable) HID: extend mask for BUTTON usage page
+    - LP: #492056
+  * PM: Measure device suspend and resume times
+  * e1000: enhance frame fragment detection
+    - CVE-2009-4536
+  * e1000e: enhance frame fragment detection
+    - CVE-2009-4538
+  * KVM: fix memory access during x86 emulation.
+    - CVE-2010-0306
+  * KVM: x86 emulator: Add Virtual-8086 mode of emulation
+    - CVE-2010-0306
+  * KVM: x86 emulator: Check IOPL level during io instruction emulation
+    - CVE-2010-0306
+  * KVM: x86 emulator: Fix popf emulation
+    - CVE-2010-0306
+  * KVM: x86 emulator: Check CPL level during privilege instruction
+    emulation
+    - CVE-2010-0306
+  * Input: wacom - ensure the device is initialized properly upon resume
+  * Input: wacom - add defines for packet lengths of various devices
+  * Input: wacom - add support for new LCD tablets
+    - LP: #516777
+
+  [ Ubuntu: 2.6.32-14.20 ]
+
+  * rebuild following the GCC update to match compiler for out of tree modules
+  * Revert "[Config] drbd -- enable"
+  * Revert "ubuntu: drbd -- version 8.3.1"
+  * SAUCE: khubd -- switch USB product/manufacturer/serial handling to RCU
+    - LP: #510937
+
+ -- Andy Whitcroft <apw@canonical.com>  Mon, 08 Mar 2010 15:26:14 +0000
+
+linux-mvl-dove (2.6.32-201.11) lucid; urgency=low
+
+  [ Upstream Kernel Changes ]
+
+  * ARM: VFP: add support to sync the VFP state of the current thread
+    - LP: #507503
+  * ARM: VFP: preserve the HW context when calling signal handlers
+    - LP: #507503
+
+ -- Andy Whitcroft <apw@canonical.com>  Tue, 23 Feb 2010 11:01:14 +0000
+
+linux-mvl-dove (2.6.32-201.10) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * rebase to Ubuntu-2.6.32-14.19
+
+  [ Vendor Kernel Changes ]
+
+  * PM: Workaround for M_RESET and CKE using 2 PMU MPPs
+  * PM: Enhance ASM code sharing in PMU SRAM to be optimized for size
+  * dove: configure pm mpps for new revision of db board
+  * Dove PM: Change deepIdle default to disable and add new command line
+    kernel parameter "pmu_enable" that can be passed to enable deepIdle if
+    needed
+  * pm: restrict the new standby fix on the board only to DB boards with
+    Dove X0 chip and enable the possibility of using the old mode for
+    boards without the ECO passing "standby_fix=0" through the kernel
+    command line ( In U-Boot) .
+
+  [ Ubuntu: 2.6.32-14.19 ]
+
+  * ensure we build the source package contents when enabled
+    - LP: #522308
+  * [Config] enable CONFIG_X86_MCE_XEON75XX
+  * SAUCE: AppArmor -- add linux/kref.h for struct kref
+  * [Config] enable CONFIG_HID_ORTEK
+  * enable udeb generation for arm versatile flavour
+    - LP: #522515
+  * ubuntu: AppArmor -- update to mainline 2010-02-18
+    - LP: #439560, #496110, #507069
+  * SAUCE: HID: add support for Ortek WKB-2000
+    - LP: #405390
+  * tpm_tis: TPM_STS_DATA_EXPECT workaround
+    - LP: #490487
+  * x86, mce: Xeon75xx specific interface to get corrected memory error
+    information
+  * x86, mce: Rename cpu_specific_poll to mce_cpu_specific_poll
+  * x86, mce: Make xeon75xx memory driver dependent on PCI
+  * drm/edid: Unify detailed block parsing between base and extension
+    blocks
+    - LP: #500999
+  * (pre-stable) eCryptfs: Add getattr function
+    - LP: #390833
+
+ -- Andy Whitcroft <apw@canonical.com>  Thu, 18 Feb 2010 19:35:34 +0000
+
+linux-mvl-dove (2.6.32-201.9) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * sub-makefile builder invocation should use $SHELL
+
+ -- Andy Whitcroft <apw@canonical.com>  Thu, 11 Feb 2010 19:44:43 +0000
+
+linux-mvl-dove (2.6.32-201.8) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * rebase to Ubuntu-2.6.32-13.18
+
+  [ Eric Miao ]
+
+  * [Config]: CONFIG_UIO_DOVE_VMETA_MEM_SIZE=96 for 1080p playback
+    - LP: #452558
+
+  [ Ubuntu: 2.6.32-13.18 ]
+
+  * Revert "enforcer -- make the enforcement configuration common"
+  * Revert "(pre-stable) Input: ALPS - add interleaved protocol support
+    (Dell E6x00 series)"
+  * Revert "(pre-stable) driver-core: fix devtmpfs crash on s390"
+  * Revert "(pre-stable) Driver-Core: devtmpfs - set root directory mode to
+    0755"
+  * Revert "SAUCE: Adds support for COMPAL JHL90 webcam"
+  * Revert "SAUCE: fix kernel oops in VirtualBox during paravirt patching"
+  * Revert "SAUCE: make fc transport removal of target configurable"
+  * enforcer -- make the enforcement configuration common
+  * getabis -- add preempt flavour to the list
+  * [Config] enforce DEVTMPFS options
+  * [Config] armel -- cleanup to-be builtin modules
+  * [Config] cleanup ports configs
+  * [Config] enable CRYPTO_GHASH_CLMUL_NI_INTEL
+    - LP: #485536
+  * add printdebian target to find branch target
+  * distclean -- do not remove debian.env
+  * [Config] generic-pae switch to M586TSC
+    - LP: #519448
+  * git-ubuntu-log -- commonise duplicated log handling
+  * git-ubuntu-log -- tighten up Bug: NNNN matching
+  * git-ubuntu-log -- sort the bug numbers
+  * (pre-stable) drm/i915: Increase fb alignment to 64k
+    - LP: #404064
+  * arm -- enable ubuntu/ directory
+  * SAUCE: crypto: ghash - Add PCLMULQDQ accelerated implementation
+  * SAUCE: crypto: ghash-intel - Fix building failure on x86_32
+  * [Config] cleanup preempt configuration
+  * [Config] versatile: Fix video output
+    - LP: #517594
+  * [Config] armel DEFAULT_MMAP_MIN_ADDR=32768
+  * [Config] Large update to armel/versatile
+  * [Config] versatile: Add RTC support
+  * [Config] armel: Enable NEON
+  * [Config] versatile: Builtin MMC support
+  * [Config] versatile Builtin SCSI controller
+  * [Config] armel Disable dma_cache_sync callers
+  * [Config] armel Disable asm/time.h users
+  * [Config] armel Disable out of range udelay()
+  * [Config] armel Disable flush_cache_range() users
+  * [Config] armel -- Enable ubuntu/ drivers
+  * SAUCE: drm/i915: Add display hotplug event on Ironlake
+  * SAUCE: drm/i915: Add ACPI OpRegion support for Ironlake
+  * Revert "[Upstream]: oprofile/x86: add Xeon 7500 series support"
+  * Revert "Revert "[Bluetooth] Eliminate checks for impossible conditions
+    in IRQ handler""
+  * clockevent: Don't remove broadcast device when cpu is dead
+  * clockevents: Add missing include to pacify sparse
+  * ACPI: don't cond_resched if irq is disabled
+  * be2net: Add support for next generation of BladeEngine device.
+  * be2net: Add the new PCI IDs to PCI_DEVICE_TABLE.
+  * mpt2sas: New device SAS2208 support is added
+  * ar9170: Add support for D-Link DWA 160 A2
+  * powerpc/fsl: Add PCI device ids for new QoirQ chips
+  * davinci: dm646x: Add support for 3.x silicon revision
+  * Input: ALPS - add interleaved protocol support (Dell E6x00 series)
+  * Driver-Core: devtmpfs - set root directory mode to 0755
+  * driver-core: fix devtmpfs crash on s390
+  * vfs: get_sb_single() - do not pass options twice
+  * ALSA: hda - Add PCI IDs for Nvidia G2xx-series
+  * V4L/DVB (13569): smsusb: add autodetection support for five additional
+    Hauppauge USB IDs
+  * USB: mos7840: add device IDs for B&B electronics devices
+  * USB: ftdi_sio: add USB device ID's for B&B Electronics line
+  * V4L/DVB (13168): Add support for Asus Europa Hybrid DVB-T card (SAA7134
+    SubVendor ID: 0x1043 Device ID: 0x4847)
+  * iTCO_wdt: Add support for Intel Ibex Peak
+  * atl1c:use common_task instead of reset_task and link_chg_task
+  * atl1e:disable NETIF_F_TSO6 for hardware limit
+  * V4L/DVB (13680a): DocBook/media: copy images after building HTML
+  * V4L/DVB (13680b): DocBook/media: create links for included sources
+  * netfilter: xtables: fix conntrack match v1 ipt-save output
+  * partitions: read whole sector with EFI GPT header
+  * partitions: use sector size for EFI GPT
+  * ALSA: ice1724 - Patch for suspend/resume for ESI Juli@
+  * sched: Fix isolcpus boot option
+  * sched: Fix missing sched tunable recalculation on cpu add/remove
+  * nohz: Prevent clocksource wrapping during idle
+  * nfsd: Fix sort_pacl in fs/nfsd/nf4acl.c to actually sort groups
+  * timers, init: Limit the number of per cpu calibration bootup messages
+  * PCI: Always set prefetchable base/limit upper32 registers
+  * iscsi class: modify handling of replacement timeout
+  * NFS: Revert default r/wsize behavior
+  * HID: fixup quirk for NCR devices
+  * scsi_devinfo: update Hitachi entries (v2)
+  * scsi_dh: create sysfs file, dh_state for all SCSI disk devices
+  * scsi_transport_fc: remove invalid BUG_ON
+  * lpfc: fix hang on SGI ia64 platform
+  * libfc: fix typo in retry check on received PRLI
+  * libfc: fix ddp in fc_fcp for 0 xid
+  * fcoe: remove redundant checking of netdev->netdev_ops
+  * libfc: Fix wrong scsi return status under FC_DATA_UNDRUN
+  * libfc: lport: fix minor documentation errors
+  * libfc: don't WARN_ON in lport_timeout for RESET state
+  * fcoe: initialize return value in fcoe_destroy
+  * libfc: Fix frags in frame exceeding SKB_MAX_FRAGS in fc_fcp_send_data
+  * libfc: fix memory corruption caused by double frees and bad error
+    handling
+  * libfc: fix free of fc_rport_priv with timer pending
+  * libfc: remote port gets stuck in restart state without really
+    restarting
+  * fcoe, libfc: fix an libfc issue with queue ramp down in libfc
+  * fcoe: Fix checking san mac address
+  * fcoe: Fix getting san mac for VLAN interface
+  * qlge: Remove explicit setting of PCI Dev CTL reg.
+  * qlge: Set PCIE max read request size.
+  * qlge: Don't fail open when port is not initialized.
+  * qlge: Add handler for DCBX firmware event.
+  * qlge: Bonding fix for mode 6.
+  * PCI: AER: fix aer inject result in kernel oops
+  * DMI: allow omitting ident strings in DMI tables
+  * Input: i8042 - remove identification strings from DMI tables
+  * Input: i8042 - add Gigabyte M1022M to the noloop list
+  * Input: i8042 - add Dritek quirk for Acer Aspire 5610.
+  * ALSA: hda - select IbexPeak handler for Calpella
+  * ALSA: hda - Fix quirk for Maxdata obook4-1
+  * ALSA: hda - Add missing Line-Out and PCM switches as slave
+  * iTCO_wdt.c - cleanup chipset documentation
+  * iTCO_wdt: add PCI ID for the Intel EP80579 (Tolapai) SoC
+  * iTCO_wdt: Add Intel Cougar Point and PCH DeviceIDs
+  * ahci: disable SNotification capability for ich8
+  * ata_piix: fix MWDMA handling on PIIX3
+  * md: fix small irregularity with start_ro module parameter
+  * V4L/DVB (13826): uvcvideo: Fix controls blacklisting
+  * cio: fix double free in case of probe failure
+  * cio: dont panic in non-fatal conditions
+  * netiucv: displayed TX bytes value much too high
+  * ipc ns: fix memory leak (idr)
+  * ALSA: hda - Fix HP T5735 automute
+  * hwmon: (fschmd) Fix a memleak on multiple opens of /dev/watchdog
+  * UBI: fix memory leak in update path
+  * UBI: initialise update marker
+  * ASoC: fix a memory-leak in wm8903
+  * mac80211: check that ieee80211_set_power_mgmt only handles STA
+    interfaces.
+  * cfg80211: fix channel setting for wext
+  * KVM: S390: fix potential array overrun in intercept handling
+  * KVM: only allow one gsi per fd
+  * KVM: Fix race between APIC TMR and IRR
+  * KVM: MMU: bail out pagewalk on kvm_read_guest error
+  * KVM: x86: Fix host_mapping_level()
+  * KVM: x86: Fix probable memory leak of vcpu->arch.mce_banks
+  * KVM: x86: Fix leak of free lapic date in kvm_arch_vcpu_init()
+  * KVM: fix lock imbalance in kvm_*_irq_source_id()
+  * KVM: only clear irq_source_id if irqchip is present
+  * IPoIB: Clear ipoib_neigh.dgid in ipoib_neigh_alloc()
+  * x86: Reenable TSC sync check at boot, even with NONSTOP_TSC
+  * ACPI: enable C2 and Turbo-mode on Nehalem notebooks on A/C
+    - LP: #516325
+  * iwlwifi: Fix throughput stall issue in HT mode for 5000
+  * fnctl: f_modown should call write_lock_irqsave/restore
+  * x86, msr/cpuid: Pass the number of minors when unregistering MSR and
+    CPUID drivers.
+  * Linux 2.6.32.7
+  * scsi_lib: Fix bug in completion of bidi commands
+  * mptsas: Fix issue with chain pools allocation on katmai
+  * mm: add new 'read_cache_page_gfp()' helper function
+  * drm/i915: Selectively enable self-reclaim
+  * firewire: ohci: fix crashes with TSB43AB23 on 64bit systems
+  * S390: fix single stepped svcs with TRACE_IRQFLAGS=y
+  * x86: Set hotpluggable nodes in nodes_possible_map
+  * x86: Remove "x86 CPU features in debugfs" (CONFIG_X86_CPU_DEBUG)
+  * libata: retry FS IOs even if it has failed with AC_ERR_INVALID
+  * zcrypt: Do not remove coprocessor for error 8/72
+  * dasd: fix possible NULL pointer errors
+  * ACPI: Add a generic API for _OSC -v2
+  * ACPI: Add platform-wide _OSC support.
+  * ACPI: fix OSC regression that caused aer and pciehp not to load
+  * ACPI: Advertise to BIOS in _OSC: _OST on _PPC changes
+  * UBI: fix volume creation input checking
+  * e1000/e1000e: don't use small hardware rx buffers
+  * drm/i915: Reload hangcheck timer too for Ironlake
+  * Fix a leak in affs_fill_super()
+  * Fix failure exits in bfs_fill_super()
+  * fix oops in fs/9p late mount failure
+  * fix leak in romfs_fill_super()
+  * Fix remount races with symlink handling in affs
+  * fix affs parse_options()
+  * Fix failure exit in ipathfs
+  * mm: fix migratetype bug which slowed swapping
+  * FDPIC: Respect PT_GNU_STACK exec protection markings when creating
+    NOMMU stack
+  * Split 'flush_old_exec' into two functions
+  * sparc: TIF_ABI_PENDING bit removal
+  * x86: get rid of the insane TIF_ABI_PENDING bit
+  * Input: winbond-cir - remove dmesg spam
+  * x86: Disable HPET MSI on ATI SB700/SB800
+  * iwlwifi: set default aggregation frame count limit to 31
+  * drm/i915: only enable hotplug for detected outputs
+  * firewire: core: add_descriptor size check
+  * SECURITY: selinux, fix update_rlimit_cpu parameter
+  * regulator: Specify REGULATOR_CHANGE_STATUS for WM835x LED constraints
+  * x86: Add Dell OptiPlex 760 reboot quirk
+    - LP: #488319
+  * x86: Add quirk for Intel DG45FC board to avoid low memory corruption
+  * x86/amd-iommu: Fix possible integer overflow
+  * clocksource: fix compilation if no GENERIC_TIME
+  * tcp: update the netstamp_needed counter when cloning sockets
+  * sky2: Fix oops in sky2_xmit_frame() after TX timeout
+  * net: restore ip source validation
+  * af_packet: Don't use skb after dev_queue_xmit()
+  * ax25: netrom: rose: Fix timer oopses
+  * KVM: allow userspace to adjust kvmclock offset
+  * oprofile/x86: add Xeon 7500 series support
+  * oprofile/x86: fix crash when profiling more than 28 events
+  * libata: retry link resume if necessary
+  * mm: percpu-vmap fix RCU list walking
+  * mm: purge fragmented percpu vmap blocks
+  * block: fix bio_add_page for non trivial merge_bvec_fn case
+  * Fix 'flush_old_exec()/setup_new_exec()' split
+  * random: drop weird m_time/a_time manipulation
+  * random: Remove unused inode variable
+  * block: fix bugs in bio-integrity mempool usage
+  * usb: r8a66597-hdc disable interrupts fix
+  * connector: Delete buggy notification code.
+  * be2net: Bug fix to support newer generation of BE ASIC
+  * be2net: Fix memset() arg ordering.
+  * mm: flush dcache before writing into page to avoid alias
+  * mac80211: fix NULL pointer dereference when ftrace is enabled
+  * imxfb: correct location of callbacks in suspend and resume
+  * mx3fb: some debug and initialisation fixes
+  * starfire: clean up properly if firmware loading fails
+  * kernel/cred.c: use kmem_cache_free
+  * uartlite: fix crash when using as console
+  * pktcdvd: removing device does not remove its sysfs dir
+  * ath9k: fix eeprom INI values override for 2GHz-only cards
+  * ath9k: fix beacon slot/buffer leak
+  * powerpc: TIF_ABI_PENDING bit removal
+  * NET: fix oops at bootime in sysctl code
+  * Linux 2.6.32.8
+
+  [ Ubuntu: 2.6.32-12.17 ]
+
+  * restore linux-image prefix -- master
+  * enforce -- we require SELINUX enabled -- master
+  * enforce -- ensure APPARMOR is our default LSM -- master
+  * make doc package completely optional -- master
+  * make source package completely optional -- master
+  * make linux-libc-dev completly optional -- master
+  * convert package disable to a deps list -- master
+  * allow common headers to switch from indep to arch -- master
+  * convert binary package disable to a deps list -- master
+  * add configuration option for a full source build tree -- master
+  * add support for uImage kernels in package control scripts
+  * getabis -- cleanup and parameterise repository list -- master
+  * getabis -- move configuration to etc/getabi -- master
+  * kernelconfig -- move configuration to etc -- master
+  * rules -- make debian/debian.env master for branch name
+  * set the current branch name -- master
+  * pull back common debian.master files into debian -- master
+  * enforcer -- make the enforcement configuration common
+  * insert-changes -- correctly link to debian/rules in DROOT
+  * future-proof ddeb handling against buildd changes
+  * SAUCE: Make CONFIG_{OMNIBOOK, AVERATEC_5100P, PACKARDBELL_E5} depend on
+    X86
+  * Add modules.builtin.bin to prerm rm list
+    - LP: #516584
+  * [Config] Implement the amd64 preempt flavour
+  * syslog: distinguish between /proc/kmsg and syscalls
+    - LP: #515623
+  * sfc: Fix polling for slow MCDI operations
+  * sfc: Fix conditions for MDIO self-test
+  * sfc: QT202x: Remove unreliable MMD check at initialisation
+  * sfc: Add workspace for GMAC bug workaround to MCDI MAC_STATS buffer
+  * sfc: Use fixed-size buffers for MCDI NVRAM requests
+
+  [ Ubuntu: 2.6.32-12.16 ]
+
+  * Revert "SAUCE: acpi battery -- delay first lookup of the battery until
+    first use"
+  * SAUCE: acpi battery -- move first lookup asynchronous
+    - LP: #507211
+  * [Config] update configs to cleanup generic configs
+  * [Config] disable CONFIG_X86_CPU_DEBUG for amd64
+  * [Config] enable USER_NS
+    - LP: #480739, #509808
+  * (pre-stable) driver-core: fix devtmpfs crash on s390
+    - LP: #512370
+  * [Config] for server and virtual flavours make CONFIG_SCSI_SYM53C8XX_2=y
+    - LP: #494565
+  * [Config] VIRTIO=y for server/virtual flavours
+    - LP: #494565
+  * (pre-stable) Driver-Core: devtmpfs - set root directory mode to 0755
+    - LP: #512370
+  * SAUCE: x86: brk away from exec rand area
+    - LP: #452175
+  * [Upstream] e1000: enhance frame fragment detection
+    - CVE-2009-4536
+  * [Upstream] e1000e: enhance frame fragment detection
+    - CVE-2009-4538
+  * (pre-stable) Input: ALPS - add interleaved protocol support (Dell E6x00
+    series)
+    - LP: #296610
+  * inotify: do not reuse watch descriptors
+    - LP: #485556
+  * inotify: only warn once for inotify problems
+  * revert "drivers/video/s3c-fb.c: fix clock setting for Samsung SoC
+    Framebuffer"
+  * memcg: ensure list is empty at rmdir
+  * drm/i915: remove loop in Ironlake interrupt handler
+  * block: Fix incorrect reporting of partition alignment
+  * x86, mce: Thermal monitoring depends on APIC being enabled
+  * futexes: Remove rw parameter from get_futex_key()
+  * page allocator: update NR_FREE_PAGES only when necessary
+  * x86, apic: use physical mode for IBM summit platforms
+  * edac: i5000_edac critical fix panic out of bounds
+  * x86: SGI UV: Fix mapping of MMIO registers
+  * mfd: WM835x GPIO direction register is not locked
+  * mfd: Correct WM835x ISINK ramp time defines
+  * ALSA: hda - Fix missing capture mixer for ALC861/660 codecs
+  * V4L/DVB (13868): gspca - sn9c20x: Fix test of unsigned.
+  * reiserfs: truncate blocks not used by a write
+  * HID: add device IDs for new model of Apple Wireless Keyboard
+  * PCI/cardbus: Add a fixup hook and fix powerpc
+  * Input: pmouse - move Sentelic probe down the list
+  * asus-laptop: add Lenovo SL hotkey support
+  * sched: Fix cpu_clock() in NMIs, on !CONFIG_HAVE_UNSTABLE_SCHED_CLOCK
+  * sparc64: Fix NMI programming when perf events are active.
+  * sparc64: Fix Niagara2 perf event handling.
+  * i2c: Do not use device name after device_unregister
+  * i2c/pca: Don't use *_interruptible
+  * serial/8250_pnp: add a new Fujitsu Wacom Tablet PC device
+  * sched: Fix task priority bug
+  * vfs: Fix vmtruncate() regression
+  * Linux 2.6.32.5
+  * x86, msr/cpuid: Register enough minors for the MSR and CPUID drivers
+  * V4L/DVB (13900): gspca - sunplus: Fix bridge exchanges.
+  * Staging: asus_oled: fix oops in 2.6.32.2
+  * Staging: hv: fix smp problems in the hyperv core code
+  * tty: fix race in tty_fasync
+  * ecryptfs: use after free
+  * ecryptfs: initialize private persistent file before dereferencing
+    pointer
+  * nozomi: quick fix for the close/close bug
+  * serial: 8250_pnp: use wildcard for serial Wacom tablets
+  * usb: serial: fix memory leak in generic driver
+  * USB: fix bitmask merge error
+  * USB: Don't use GFP_KERNEL while we cannot reset a storage device
+  * USB: EHCI: fix handling of unusual interrupt intervals
+  * USB: EHCI & UHCI: fix race between root-hub suspend and port resume
+  * USB: add missing delay during remote wakeup
+  * USB: add speed values for USB 3.0 and wireless controllers
+  * ACPI: EC: Accelerate query execution
+  * ACPI: EC: Add wait for irq storm
+  * SCSI: enclosure: fix oops while iterating enclosure_status array
+  * drm/i915: Read the response after issuing DDC bus switch command
+  * drm/i915: try another possible DDC bus for the SDVO device with
+    multiple outputs
+  * block: bdev_stack_limits wrapper
+  * DM: Fix device mapper topology stacking
+  * x86/PCI/PAT: return EINVAL for pci mmap WC request for !pat_enabled
+  * USB: fix usbstorage for 2770:915d delivers no FAT
+  * vmalloc: remove BUG_ON due to racy counting of VM_LAZY_FREE
+  * perf timechart: Use tid not pid for COMM change
+  * perf events: Dont report side-band events on each cpu for
+    per-task-per-cpu events
+  * perf: Honour event state for aux stream data
+  * Linux 2.6.32.6
+
+ -- Andy Whitcroft <apw@canonical.com>  Thu, 11 Feb 2010 13:24:09 +0000
+
+linux-mvl-dove (2.6.32-200.7) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * [Config] fix SECURITY and LSM configuration -- mvl-dove
+  * (buildenv) Add a distclean target to remove temporary files -- mvl-dove
+  * update remaining references from karmic to lucid -- mvl-dove
+  * undo slamming architecture to armel -- mvl-dove
+  * restore linux-image prefix -- mvl-dove
+  * include modules.builtin in the binary debs -- mvl-dove
+  * resync kernelconfig with lucid -- mvl-dove
+  * config-check -- add a configuration enforcer -- mvl-dove
+  * config-check -- add a unit-test suite to the checker -- mvl-dove
+  * config-check -- ensure the checks get run at build time -- mvl-dove
+  * config-check -- check the processed config during updateconfigs --
+    mvl-dove
+  * enforcer -- resync configuration with master -- mvl-dove
+  * clean up whitespace differences -- mvl-dove
+  * copy over minor modification -- mvl-dove
+  * make doc package completely optional -- mvl-dove
+  * install the full changelog with the binary package -- mvl-dove
+  * make source package completely optional -- mvl-dove
+  * make linux-libc-dev completly optional -- mvl-dove
+  * convert package disable to a deps list -- mvl-dove
+  * move back to common headers in arch mode -- mvl-dove
+  * convert binary package disable to a deps list -- mvl-dove
+  * disable linux-libc-dev -- mvl-dove
+  * add configuration option for a full source build tree -- mvl-dove
+  * getabis -- cleanup and parameterise repository list -- mvl-dove
+  * kernelconfig -- fix minor whitespace damage -- mvl-dove
+  * getabis -- move configuration to etc/getabis -- mvl-dove
+  * kernelconfig -- move configuration to etc -- mvl-dove
+  * set the current branch name -- mvl-dove
+  * remove common files -- mvl-dove
+  * remove generated files
+  * insert-changes -- correctly link to debian/rules in DROOT
+
+  [ Bryan Wu ]
+
+  * Add 3 missing files to prerm remove file list -- mvl-dove
+    - LP: #345623, #415832
+
+  [ Eric Miao ]
+
+  * [Config]: Enable devtmpfs for mvl-dove kernel
+    - LP: #512321
+  * SAUCE: Enable CPUFREQ by default
+    - LP: #513254
+  * [Config]: Turn on CONFIG_HIBERNATE
+    - LP: #502983
+  * [Config]: Turn on CONFIG_ARM_THUMBEE
+  * [Config]: Disable V6 debugger mode and use V7
+
+  [ Tim Gardner ]
+
+  * [Config] DH_COMPAT=5 -- mvl-dove
+
+  [ Upstream Kernel Changes ]
+
+  * ARM VFP supprot code bug: If any of the status flags are set, update
+    the FPSCR
+  * Marvell Dove VFP errata
+
+ -- Andy Whitcroft <apw@canonical.com>  Thu, 04 Feb 2010 20:49:42 +0000
+
+linux-mvl-dove (2.6.32-200.6) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * [Config] drop ecb from crypto udeb for arm
+
+ -- Andy Whitcroft <apw@canonical.com>  Wed, 27 Jan 2010 09:40:42 +0000
+
+linux-mvl-dove (2.6.32-200.5) lucid; urgency=low
+
+  [ Eric Miao ]
+
+  * Integrate new v2.6.32 based BSP from Marvell
+  * SAUCE: kbuild: include only necessary in scripts/Makefile.modbuiltin
+  * Drop Z0 flavor completely
+  * [Config]: Enable ubuntu/ directory
+  * [Config]: Update config files for dove from .31 to .32
+  * [Config]: Enable some of the debug options
+
+  [ Upstream changes ]
+
+  * Integrate new v2.6.32 based BSP from Marvell; this is a fully native
+    v2.6.32 based version.
+
+ -- Andy Whitcroft <apw@canonical.com>  Tue, 26 Jan 2010 14:06:49 +0000
+
+linux-mvl-dove (2.6.31-701.4) lucid; urgency=low
+
+  [ Raymond Huang ]
+
+  * SAUCE: dove: erratum of VLDR instruction bug in Thumb-2 mode
+    - LP: #494831
+
+ -- Andy Whitcroft <apw@canonical.com>  Thu, 17 Dec 2009 08:56:58 +0000
+
+linux-mvl-dove (2.6.31-701.3) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * rebase to Ubuntu-2.6.31-17.54
+
+  [ Upstream Kernel Changes ]
+
+  * ARM: Fix signal restart issues with NX and OABI compat
+    - LP: #453682
+
+  [ Ubuntu: 2.6.31-17.54 ]
+
+  * security merge of Ubuntu-2.6.31-16.53
+
+  [ Ubuntu: 2.6.31-16.53 ]
+
+  * ext4: Fix insufficient checks in EXT4_IOC_MOVE_EXT
+    - LP: #492659
+    - CVE-2009-4131
+
+ -- Andy Whitcroft <apw@canonical.com>  Wed, 16 Dec 2009 10:14:58 +0000
+
+linux-mvl-dove (2.6.31-701.2) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * rebase to Ubuntu-2.6.31-17.53
+
+  [ Ubuntu: 2.6.31-17.53 ]
+
+  * SAUCE: AppArmor: Fix oops after profile removal
+    - LP: #475619
+  * SAUCE: AppArmor: Fix Oops when in apparmor_bprm_set_creds
+    - LP: #437258
+  * SAUCE: AppArmor: Fix cap audit_caching preemption disabling
+    - LP: #479102
+  * SAUCE: AppArmor: Fix refcounting bug causing leak of creds
+    - LP: #479115
+  * SAUCE: AppArmor: Fix oops there is no tracer and doing unsafe
+    transition.
+    - LP: #480112
+  * Revert "[Upstream] (drop after 2.6.31) usb-storage: Workaround devices
+    with bogus sense size"
+    - LP: #461556
+  * Revert "[Upstream] (drop after 2.6.31) Input: synaptics - add another
+    Protege M300 to rate blacklist"
+    - LP: #480144
+  * [Config] udeb: Add squashfs to fs-core-modules
+    - LP: #352615
+  * Revert "e1000e: swap max hw supported frame size between 82574 and
+    82583"
+    - LP: #461556
+  * Revert "drm/i915: Fix FDI M/N setting according with correct color
+    depth"
+    - LP: #480144
+  * Revert "agp/intel: Add B43 chipset support"
+    - LP: #480144
+  * Revert "drm/i915: add B43 chipset support"
+    - LP: #480144
+  * Revert "ACPI: Attach the ACPI device to the ACPI handle as early as
+    possible"
+    - LP: #327499, #480144
+  * SCSI: Retry ADD_TO_MLQUEUE return value for EH commands
+    - LP: #461556
+  * SCSI: Fix protection scsi_data_buffer leak
+    - LP: #461556
+  * SCSI: sg: Free data buffers after calling blk_rq_unmap_user
+    - LP: #461556
+  * ARM: pxa: workaround errata #37 by not using half turbo switching
+    - LP: #461556
+  * tracing/filters: Fix memory leak when setting a filter
+    - LP: #461556
+  * x86/paravirt: Use normal calling sequences for irq enable/disable
+    - LP: #461556
+  * USB: ftdi_sio: remove tty->low_latency
+    - LP: #461556
+  * USB: ftdi_sio: remove unused rx_byte counter
+    - LP: #461556
+  * USB: ftdi_sio: clean up read completion handler
+    - LP: #461556
+  * USB: ftdi_sio: re-implement read processing
+    - LP: #461556
+  * USB: pl2303: fix error characters not being reported to ldisc
+    - LP: #461556
+  * USB: digi_acceleport: Fix broken unthrottle.
+    - LP: #461556
+  * USB: serial: don't call release without attach
+    - LP: #461556
+  * USB: option: Toshiba G450 device id
+    - LP: #461556
+  * USB: ipaq: fix oops when device is plugged in
+    - LP: #461556
+  * USB: cp210x: Add support for the DW700 UART
+    - LP: #461556
+  * USB: Fix throttling in generic usbserial driver
+    - LP: #461556
+  * USB: storage: When a device returns no sense data, call it a Hardware
+    Error
+    - LP: #400652, #461556
+  * arm, cris, mips, sparc, powerpc, um, xtensa: fix build with bash 4.0
+    - LP: #461556
+  * intel-iommu: Cope with broken HP DC7900 BIOS
+    - LP: #461556
+  * futex: Detect mismatched requeue targets
+    - LP: #461556
+  * futex: Fix wakeup race by setting TASK_INTERRUPTIBLE before queue_me()
+    - LP: #461556
+  * tpm-fixup-pcrs-sysfs-file-update
+    - LP: #461556
+  * TPM: fix pcrread
+    - LP: #461556
+  * Bluetooth: Disconnect HIDRAW devices on disconnect
+    - LP: #461556
+  * Bluetooth: Add extra device reference counting for connections
+    - LP: #461556
+  * Bluetooth: Let HIDP grab the device reference for connections
+    - LP: #461556
+  * connector: Keep the skb in cn_callback_data
+    - LP: #461556
+  * connector: Provide the sender's credentials to the callback
+    - LP: #461556
+  * connector: Removed the destruct_data callback since it is always
+    kfree_skb()
+    - LP: #461556
+  * dm/connector: Only process connector packages from privileged processes
+    - LP: #461556
+  * dst/connector: Disallow unpliviged users to configure dst
+    - LP: #461556
+  * pohmelfs/connector: Disallow unpliviged users to configure pohmelfs
+    - LP: #461556
+  * uvesafb/connector: Disallow unpliviged users to send netlink packets
+    - LP: #461556
+  * e1000e: swap max hw supported frame size between 82574 and 82583
+    - LP: #461556, #445572
+  * MAINTAINERS: Fix Riku Voipio's address
+    - LP: #461556
+  * macintosh: Don't assume i2c device probing always succeeds
+    - LP: #461556
+  * i2c: Hide probe errors caused by ACPI resource conflicts
+    - LP: #461556
+  * ALSA: Don't assume i2c device probing always succeeds
+    - LP: #461556
+  * bsdacct: switch credentials for writing to the accounting file
+    - LP: #461556
+  * sysfs: Allow sysfs_notify_dirent to be called from interrupt context.
+    - LP: #461556
+  * Staging: rt2860sta: prevent a panic when disabling when associated
+    - LP: #461556, #404626
+  * usb-storage: Workaround devices with bogus sense size
+    - LP: #461556, #446146
+  * iwlwifi: incorrect method used for finding valid OTP blocks
+    - LP: #461556
+  * mac80211: fix vlan and optimise RX
+    - LP: #461556
+  * tty: Make flush_to_ldisc() locking more robust
+    - LP: #461556
+  * Linux 2.6.31.5
+    - LP: #461556
+  * fs: pipe.c null pointer dereference
+    - LP: #480144
+  * pci: increase alignment to make more space for hidden code
+    - LP: #407824, #480144, #474577
+  * libata: fix internal command failure handling
+    - LP: #480144
+  * libata: fix PMP initialization
+    - LP: #480144
+  * sata_nv: make sure link is brough up online when skipping hardreset
+    - LP: #480144
+  * nfs: Fix nfs_parse_mount_options() kfree() leak
+    - LP: #480144
+  * KVM: use proper hrtimer function to retrieve expiration time
+    - LP: #480144
+  * KVM: ignore reads from AMDs C1E enabled MSR
+    - LP: #480144
+  * futex: Handle spurious wake up
+    - LP: #480144
+  * futex: Check for NULL keys in match_futex
+    - LP: #480144
+  * futex: Move drop_futex_key_refs out of spinlock'ed region
+    - LP: #480144
+  * futex: Fix spurious wakeup for requeue_pi really
+    - LP: #480144
+  * ahci: revert "Restore SB600 sata controller 64 bit DMA"
+    - LP: #480144
+  * sparc64: Set IRQF_DISABLED on LDC channel IRQs.
+    - LP: #480144
+  * watchdog: Fix rio watchdog probe function
+    - LP: #480144
+  * Input: synaptics - add another Protege M300 to rate blacklist
+    - LP: #480144
+  * dm snapshot: free exception store on init failure
+    - LP: #480144
+  * dm snapshot: sort by chunk size to fix race
+    - LP: #480144
+  * dm log: userspace fix incorrect luid cast in userspace_ctr
+    - LP: #480144
+  * dm: add missing del_gendisk to alloc_dev error path
+    - LP: #480144
+  * dm: dec_pending needs locking to save error value
+    - LP: #480144
+  * dm exception store: fix failed set_chunk_size error path
+    - LP: #480144
+  * dm snapshot: lock snapshot while supplying status
+    - LP: #480144
+  * dm snapshot: require non zero chunk size by end of ctr
+    - LP: #480144
+  * dm snapshot: use unsigned integer chunk size
+    - LP: #480144
+  * ray_cs: Fix copy_from_user handling
+    - LP: #480144
+  * mbind(): fix leak of never putback pages
+    - LP: #480144
+  * do_mbind(): fix memory leak
+    - LP: #480144
+  * 8250_pci: add IBM Saturn serial card
+    - LP: #480144
+  * dpt_i2o: Fix up copy*user
+    - LP: #480144
+  * dpt_i2o: Fix typo of EINVAL
+    - LP: #480144
+  * hfsplus: refuse to mount volumes larger than 2TB
+    - LP: #480144
+  * Driver core: fix driver_register() return value
+    - LP: #480144
+  * param: fix lots of bugs with writing charp params from sysfs, by
+    leaking mem.
+    - LP: #480144
+  * param: fix NULL comparison on oom
+    - LP: #480144
+  * param: fix setting arrays of bool
+    - LP: #480144
+  * USB: serial: sierra driver send_setup() autopm fix
+    - LP: #480144
+  * USB: option: Patch for Huawei Mobile Broadband E270+ Modem
+    - LP: #480144
+  * USB: option: Support for AIRPLUS MCD650 Datacard
+    - LP: #480144
+  * USB: option: TLAYTECH TUE800 support
+    - LP: #456264, #480144
+  * libertas if_usb: Fix crash on 64-bit machines
+    - LP: #480144
+  * cpuidle: always return with interrupts enabled
+    - LP: #480144
+  * virtio: order used ring after used index read
+    - LP: #480144
+  * CIFS: Fixing to avoid invalid kfree() in cifs_get_tcp_session()
+    - LP: #480144
+  * mac80211: fix for incorrect sequence number on hostapd injected frames
+    - LP: #480144
+  * mac80211: check interface is down before type change
+    - LP: #480144
+  * x86, UV: Fix information in __uv_hub_info structure
+    - LP: #480144
+  * x86, UV: Set DELIVERY_MODE=4 for vector=NMI_VECTOR in uv_hub_send_ipi()
+    - LP: #480144
+  * NOMMU: Don't pass NULL pointers to fput() in do_mmap_pgoff()
+    - LP: #480144
+  * mm: remove incorrect swap_count() from try_to_unuse()
+    - LP: #480144
+  * x86-64: Fix register leak in 32-bit syscall audting
+    - LP: #480144
+  * nilfs2: fix dirty page accounting leak causing hang at write
+    - LP: #480144
+  * drm/i915: Fix FDI M/N setting according with correct color depth
+    - LP: #480144
+  * drm/i915: fix to setup display reference clock control on Ironlake
+    - LP: #480144
+  * drm/i915: fix panel fitting filter coefficient select for Ironlake
+    - LP: #480144
+  * agp/intel: Add B43 chipset support
+    - LP: #480144
+  * drm/i915: add B43 chipset support
+    - LP: #480144
+  * xen/hvc: make sure console output is always emitted, with explicit
+    polling
+    - LP: #480144
+  * xen: mask extended topology info in cpuid
+    - LP: #480144
+  * sgi-gru: decrapfiy options_write() function
+    - LP: #480144
+  * KVM: get_tss_base_addr() should return a gpa_t
+    - LP: #480144
+  * fuse: prevent fuse_put_request on invalid pointer
+    - LP: #480144
+  * fuse: fix kunmap in fuse_ioctl_copy_user
+    - LP: #480144
+  * x86/amd-iommu: Workaround for erratum 63
+    - LP: #480144
+  * fsnotify: do not set group for a mark before it is on the i_list
+    - LP: #480144
+  * mips: fix build of vmlinux.lds
+    - LP: #480144
+  * alpha: fix build after vmlinux.lds.S cleanup
+    - LP: #480144
+  * ACPI / PCI: Fix NULL pointer dereference in acpi_get_pci_dev() (rev. 2)
+    - LP: #480144
+  * KEYS: get_instantiation_keyring() should inc the keyring refcount in
+    all cases
+    - LP: #480144
+  * b43: Fix Bugzilla #14181 and the bug from the previous 'fix'
+    - LP: #476154, #480144
+  * pata_sc1200: Fix crash on boot
+    - LP: #480144
+  * AF_UNIX: Fix deadlock on connecting to shutdown socket (CVE-2009-3621)
+    - LP: #480144
+  * ALSA: ice1724 - Make call to set hw params succeed on ESI Juli@
+    - LP: #480144
+  * bonding: fix a race condition in calls to slave MII ioctls
+    - LP: #480144
+  * hwmon: (it87) Fix VID reading on IT8718F/IT8720F
+    - LP: #480144
+  * netlink: fix typo in initialization (CVE-2009-3612)
+    - LP: #480144
+  * nfs: Avoid overrun when copying client IP address string
+    - LP: #480144
+  * nfs: Panic when commit fails
+    - LP: #480144
+  * NFSv4: Fix a bug when the server returns NFS4ERR_RESOURCE
+    - LP: #480144
+  * NFSv4: Fix two unbalanced put_rpccred() issues.
+    - LP: #459265, #480144
+  * NFSv4: Kill nfs4_renewd_prepare_shutdown()
+    - LP: #480144
+  * NFSv4: The link() operation should return any delegation on the file
+    - LP: #480144
+  * powerpc: Remove SMP warning from PowerMac cpufreq
+    - LP: #480144
+  * vmscan: limit VM_EXEC protection to file pages
+    - LP: #480144
+  * x86: mce: Clean up thermal throttling state tracking code
+    - LP: #480144
+  * x86: mce: Fix thermal throttling message storm
+    - LP: #453444, #480144
+  * iwlwifi: fix potential rx buffer loss
+    - LP: #480144
+  * iwlwifi: reduce noise when skb allocation fails
+    - LP: #480144
+  * x86/amd-iommu: Un__init function required on shutdown
+    - LP: #480144
+  * KVM: Prevent kvm_init from corrupting debugfs structures
+    - LP: #480144
+  * powerpc/pmac: Fix PowerSurge SMP IPI allocation
+    - LP: #480144
+  * powerpc/pmac: Fix issues with sleep on some powerbooks
+    - LP: #480144
+  * powerpc/pci: Fix regression in powerpc MSI-X
+    - LP: #480144
+  * powerpc: Fix some late PowerMac G5 with PCIe ATI graphics
+    - LP: #480144
+  * sata_via: Remove redundant device ID for VIA VT8261
+    - LP: #480144
+  * pata_via: extend the rev_max for VT6330
+    - LP: #480144
+  * PM / yenta: Split resume into early and late parts (rev. 4)
+    - LP: #480144
+  * Linux 2.6.31.6
+    - LP: #480144
+
+  [ Ubuntu: 2.6.31-16.52 ]
+
+  * [SCSI] megaraid_sas: remove sysfs poll_mode_io world writeable
+    permissions
+    - CVE-2009-3939
+  * fs: pipe.c null pointer dereference
+    - CVE-2009-3547
+  * netlink: fix typo in initialization
+    - CVE-2009-3612
+  * drm/r128: Add test for initialisation to all ioctls that require it
+    - CVE-2009-3620
+  * AF_UNIX: Fix deadlock on connecting to shutdown socket
+    - CVE-2009-3621
+  * nfsd4: use common rpc_cred for all callbacks
+    - CVE-2009-3623
+  * KEYS: get_instantiation_keyring() should inc the keyring refcount in
+    all cases
+    - CVE-2009-3624
+  * connector: Keep the skb in cn_callback_data
+    - CVE-2009-3725
+  * connector: Provide the sender's credentials to the callback
+    - CVE-2009-3725
+  * connector: Fix incompatible pointer type warning
+    - CVE-2009-3725
+  * uvesafb/connector: Disallow unpliviged users to send netlink packets
+    - CVE-2009-3725
+  * pohmelfs/connector: Disallow unpliviged users to configure pohmelfs
+    - CVE-2009-3725
+  * dst/connector: Disallow unpliviged users to configure dst
+    - CVE-2009-3725
+  * dm/connector: Only process connector packages from privileged processes
+    - CVE-2009-3725
+  * NOMMU: Don't pass NULL pointers to fput() in do_mmap_pgoff()
+    - CVE-2009-3888
+  * isdn: hfc_usb: Fix read buffer overflow
+    - CVE-2009-4005
+  * gdth: Prevent negative offsets in ioctl CVE-2009-3080
+    - CVE-2009-3080
+  * mac80211: fix spurious delBA handling
+    - LP: #491301
+  * mac80211: fix two remote exploits
+    - LP: #491301
+  * ipv4: additional update of dev_net(dev) to struct *net in ip_fragment.c
+    - LP: #491301
+
+  [ Ubuntu: 2.6.31-15.50 ]
+
+  * SAUCE: Fix nx_enable reporting
+    - LP: #454285
+
+ -- Andy Whitcroft <apw@canonical.com>  Fri, 04 Dec 2009 21:23:15 +0000
+
+linux-mvl-dove (2.6.31-700.1) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * rebase to Ubuntu-2.6.31-15.49
+
+  [ Ubuntu: 2.6.31-15.49 ]
+
+  * [Upstream] (drop after 2.6.31) usb-storage: Workaround devices with
+    bogus sense size
+    - LP: #446146
+  * SAUCE: AppArmor: AppArmor wrongly reports allow perms as denied
+    - LP: #453335
+  * SAUCE: AppArmor: Policy load and replacement can fail to alloc mem
+    - LP: #458299
+  * SAUCE: AppArmor: AppArmor fails to audit change_hat correctly
+    - LP: #462824
+  * SAUCE: AppArmor: AppArmor disallows truncate of deleted files.
+    - LP: #451375
+  * SAUCE: [x86] fix report of cs-limit nx-emulation
+    - LP: #454285
+  * Revert "SAUCE: trace: add trace_event for the open() syscall"
+  * SAUCE: trace: add trace events for open(), exec() and uselib()
+    - LP: #462111
+  * SAUCE: Fix sub-flavour script to not stop on missing directories
+    - LP: #453073
+  * [Upstream] (drop after 2.6.31) Input: synaptics - add another Protege
+    M300 to rate blacklist
+    - LP: #433801
+  * PM: Make warning in suspend_test_finish() less likely to happen
+    - LP: #464552
+
+  [ Ubuntu: 2.6.31-14.48 ]
+
+  * Add more e100 firmware to nic-modules
+    - LP: #451872
+  * Add qla1280 firmware to scsi-modules
+    - LP: #381037
+
+  [ Ubuntu: 2.6.31-14.47 ]
+
+  * SAUCE: dell-laptop: Store the HW switch status internally rather than
+    requerying every time
+    - LP: #430809
+  * SAUCE: dell-laptop: Blacklist machines not supporting dell-laptop
+    - LP: #430809
+
+ -- Andy Whitcroft <apw@canonical.com>  Tue, 03 Nov 2009 11:41:05 +0000
+
+linux-mvl-dove (2.6.31-208.16) karmic; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * drop dove-z0 from the d-i udeb generation
+  * rebase to Ubuntu-2.6.31-14.46
+  * [Config] update configs following rebase to Ubuntu-2.6.31-14.46
+  * lirc update dropped module lirc_mceusb2
+
+  [ Brad Figg ]
+
+  * [Config] Dove: Added CONFIG_BINFMT_AOUT=m and CONFIG_BINFMT_MISC=m
+    - LP: #450363
+
+  [ Ubuntu: 2.6.31-14.46 ]
+
+  * reinstate armel.mk with no flavours
+    - LP: #449637
+  * [Upstream] elevator: fix fastfail checks to allow merge of readahead
+    requests
+    - LP: #444915
+  * [Upstream] block: silently error unsupported empty barriers too
+    - LP: #420423
+  * SAUCE: AppArmor: Fix mediation of "deleted" paths
+    - LP: #415632
+  * [Config] CONFIG_X86_MCE
+    https://lists.ubuntu.com/archives/kernel-team/2009-October/007584.html
+  * Revert "appletalk: Fix skb leak when ipddp interface is not loaded,
+    CVE-2009-2903" - Use patch from 2.6.31.4 which is slightly different.
+  * x86: fix csum_ipv6_magic asm memory clobber
+  * tty: Avoid dropping ldisc_mutex over hangup tty re-initialization
+  * x86: Don't leak 64-bit kernel register values to 32-bit processes
+  * tracing: correct module boundaries for ftrace_release
+  * ftrace: check for failure for all conversions
+  * futex: fix requeue_pi key imbalance
+  * futex: Move exit_pi_state() call to release_mm()
+  * futex: Nullify robust lists after cleanup
+  * futex: Fix locking imbalance
+  * NOHZ: update idle state also when NOHZ is inactive
+  * ima: ecryptfs fix imbalance message
+  * libata: fix incorrect link online check during probe
+  * sound: via82xx: move DXS volume controls to PCM interface
+  * ASoC: WM8350 capture PGA mutes are inverted
+  * KVM: Prevent overflow in KVM_GET_SUPPORTED_CPUID
+  * KVM: VMX: flush TLB with INVEPT on cpu migration
+  * KVM: fix LAPIC timer period overflow
+  * KVM: SVM: Fix tsc offset adjustment when running nested
+  * KVM: SVM: Handle tsc in svm_get_msr/svm_set_msr correctly
+  * net: Fix wrong sizeof
+  * mm: add_to_swap_cache() must not sleep
+  * sis5513: fix PIO setup for ATAPI devices
+  * PIT fixes to unbreak suspend/resume (bug #14222)
+  * IMA: open new file for read
+  * ACPI: Clarify resource conflict message
+  * ACPI: fix Compaq Evo N800c (Pentium 4m) boot hang regression
+  * net: restore tx timestamping for accelerated vlans
+  * net: unix: fix sending fds in multiple buffers
+  * tun: Return -EINVAL if neither IFF_TUN nor IFF_TAP is set.
+  * tcp: fix CONFIG_TCP_MD5SIG + CONFIG_PREEMPT timer BUG()
+  * net: Fix sock_wfree() race
+  * smsc95xx: fix transmission where ZLP is expected
+  * sky2: Set SKY2_HW_RAM_BUFFER in sky2_init
+  * appletalk: Fix skb leak when ipddp interface is not loaded
+  * ax25: Fix possible oops in ax25_make_new
+  * ax25: Fix SIOCAX25GETINFO ioctl
+  * sit: fix off-by-one in ipip6_tunnel_get_prl
+  * Linux 2.6.31.4
+  * drm/i915: Fix FDI M/N setting according with correct color depth
+    - LP: #416792
+
+  [ Ubuntu: 2.6.31-13.45 ]
+
+  * [Config] Add sd_mod to scsi-modules udeb for powerpc
+  * SAUCE: Update to LIRC 0.8.6
+    - LP: #432678
+  * [Config] CONFIG_X86_PAT=y
+    https://lists.ubuntu.com/archives/kernel-team/2009-October/007477.html
+    https://lists.ubuntu.com/archives/kernel-team/2009-October/007534.html
+  * [Config] Add armel arch to linux-libc-dev arches.
+    - LP: #449637
+  * e1000e: swap max hw supported frame size between 82574 and 82583
+  * drm/i915: Initialize HDMI outputs as HDMI connectors, not DVI.
+    - LP: #392017
+  * ALSA: hda - Add quirks for some HP laptops
+    - LP: #449742
+  * ALSA: hda - Add support for HP dv6
+    - LP: #449742
+
+  [ Ubuntu: 2.6.31-13.44 ]
+
+  * sgi-gru: Fix kernel stack buffer overrun, CVE-2009-2584
+  * appletalk: Fix skb leak when ipddp interface is not loaded,
+    CVE-2009-2903
+    Note - This patch causes an ABI change in the symbol aarp_send_ddp
+    which I'm ignoring.
+
+ -- Andy Whitcroft <apw@canonical.com>  Tue, 13 Oct 2009 15:52:13 +0100
+
+linux-mvl-dove (2.6.31-207.15) karmic; urgency=low
+
+  [ Amit Kucheria ]
+
+  * Disable CONFIG_UEVENT_HELPER_PATH
+
+  [ Andy Whitcroft ]
+
+  * rebase to Ubuntu-2.6.31-13.42
+  * rebase to Ubuntu-2.6.31-13.43
+
+  [ Colin Watson ]
+
+  * Use section 'admin' rather than 'base'
+
+  [ Tim Gardner ]
+
+  * [Config] CONFIG_GFS2_FS_LOCKING_DLM=y
+    - LP: #416325
+
+  [ Ubuntu: 2.6.31-13.43 ]
+
+  * Revert "[Upstream] acerhdf: Limit modalias matching to supported
+    boards"
+  * Use section 'admin' rather than 'base'
+  * SAUCE: AppArmor: Set error code after structure initialization.
+    - LP: #427948
+  * SAUCE: AppArmor: Fix off by 2 error in getprocattr mem allocation
+    - LP: #446595
+  * SAUCE: Add sr_mod to the scsi-modules udeb for powerpc
+  * [Upstream] acerhdf: Limit modalias matching to supported boards
+    (supersedes previous revert made by Andy Whitcroft)
+    - LP: #435958
+
+  [ Ubuntu: 2.6.31-13.42 ]
+
+  * SAUCE: (drop after 2.6.31) input: Add support for filtering input
+    events
+    - LP: #430809
+  * SAUCE: (drop after 2.6.31) dell-laptop: Trigger rfkill updates on wifi
+    toggle switch press
+    - LP: #430809
+  * SAUCE: Raise the default console 'quiet' level to 2
+    This supresses all but critical and emergency level messages.
+    https://lists.ubuntu.com/archives/kernel-team/2009-October/007476.html
+  * TTY: fix typos
+  * Linux 2.6.31.3
+  * V4L/DVB (12439): cx88: add support for WinFast DTV2000H rev. J
+    - LP: #433904
+
+  [ Ubuntu: 2.6.31-12.41 ]
+
+  * [Config] CONFIG_GFS2_FS_LOCKING_DLM=y
+    - LP: #416325
+  * SAUCE: Fix MODULE_IMPORT/MODULE_EXPORT
+    The original patch failed to work for amd64.
+    - LP: #430694
+  * ALSA: hda - Add a white-list for MSI option
+    Upstream cherry-pick: Infrastructure support for #445580
+  * ALSA: hda - Add HP Pavilion dv4t-1300 to MSI whitelist
+    - LP: #445580
+  * ALSA: intel8x0 - Mute External Amplifier by default for Sony VAIO
+    VGN-T350P
+    - LP: #410933
+  * ALSA: intel8x0 - Mute External Amplifier by default for Sony VAIO
+    VGN-B1VP
+    - LP: #410933
+
+  [ Ubuntu: 2.6.31-12.40 ]
+
+  * SAUCE: Created MODULE_EXPORT/MODULE_IMPORT macros
+    - LP: #430694
+  * SAUCE: Use MODULE_IMPORT macro to tie intel_agp to i915
+    - LP: #430694
+  * V4L/DVB (12352): gspca - vc032x: Fix mi1310_soc preview and LED
+    - LP: #310760
+
+ -- Andy Whitcroft <apw@canonical.com>  Fri, 09 Oct 2009 14:41:22 +0100
+
+linux-mvl-dove (2.6.31-206.14) karmic; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * SAUCE: ubuntu-insert-changes -- follow abstracted debian
+  * rebase to Ubuntu-2.6.31-12.39
+
+  [ Tim Gardner ]
+
+  * [Config] Added cpio as a build dependency.
+
+  [ Ubuntu: 2.6.31-12.39 ]
+
+  * install the full changelog with the binary package
+  * changelog -- explicitly note rebases and clean history
+  * Revert "SAUCE: (drop after 2.6.31) Disable iwl-1000 series wireless
+    adapters"
+  * Revert "SAUCE: (drop after 2.6.31) eCryptfs: Prevent lower dentry from
+    going negative during unlink"
+  * Revert "SAUCE: (drop after 2.6.31) em28xx: ir-kbd-i2c init data needs a
+    persistent object"
+  * Revert "SAUCE: (drop after 2.6.31) saa7134: ir-kbd-i2c init data needs
+    a persistent object"
+  * Revert "drm/i915: Check that the relocation points to within the
+    target"
+  * Revert "drm/i915: fix tiling on IGDNG"
+  * Revert "Driver core: add new device to bus's list before probing"
+  * Revert "HID: completely remove apple mightymouse from blacklist"
+  * Revert "KVM: x86: check for cr3 validity in ioctl_set_sregs"
+    All reverts superseded by corresponding v2.6.31.2 patches
+  * [Config] Add d101m_ucode.bin to d-i/firmware/nic-modules
+    - LP: #439456
+  * [Config] Enabled CONFIG_SND_HDA_HWDEP
+    - LP: #443117
+  * [Config] Add cpio as a build dependency.
+  * [Config] Set default I/O scheduler back to CFQ for desktop flavours
+    - LP: #381300
+  * KVM: VMX: Fix EPT with WP bit change during paging
+  * pata_amd: do not filter out valid modes in nv_mode_filter
+  * p54usb: add Zcomax XG-705A usbid
+  * x86: Increase MIN_GAP to include randomized stack
+  * serial: bfin_5xx: fix building as module when early printk is enabled
+  * USB: option.c Add support for ZTE AC2726 EVDO modem
+  * USB: option: TELIT UC864G support
+  * video: s3c_fb.c: fix build with CONFIG_HOTPLUG=n
+  * kbuild: fix cc1 options check to ensure we do not use -fPIC when
+    compiling
+  * drivers/mfd/ab3100-core.c: fix powerpc build error
+  * thinkpad-acpi: don't ask about brightness_mode for fw. 1V and 1R
+  * ACPI: pci_slot.ko wants a 64-bit _SUN
+  * fbcon: only unbind from console if successfully registered
+  * kallsyms: fix segfault in prefix_underscores_count()
+  * sisfb: change SiS_DDC_Port type to SISIOADDRESS
+  * mmc_spi: fail gracefully if host or card do not support the switch
+    command
+  * alpha: AGP update (fixes compile failure)
+  * fs: make sure data stored into inode is properly seen before unlocking
+    new inode
+  * eCryptfs: Handle unrecognized tag 3 cipher codes
+  * eCryptfs: Check for O_RDONLY lower inodes when opening lower files
+  * eCryptfs: Filename encryption only supports password auth tokens
+  * eCryptfs: Validate global auth tok keys
+  * eCryptfs: Prevent lower dentry from going negative during unlink
+  * Re-enable Lanman security
+  * xen: make -fstack-protector work under Xen
+  * xen: only enable interrupts while actually blocking for spinlock
+  * xen: use stronger barrier after unlocking lock
+  * xen: check EFER for NX before setting up GDT mapping
+  * perf_counter: Fix perf_copy_attr() pointer arithmetic
+  * perf tools: Fix buffer allocation
+  * tty: serial/pcmcia: add ID for Advantech card
+  * PM / PCMCIA: Drop second argument of pcmcia_socket_dev_suspend()
+  * PM / yenta: Fix cardbus suspend/resume regression
+  * sony-laptop: check for rfkill hard block at load time
+  * nilfs2: fix missing zero-fill initialization of btree node cache
+  * ar9170usb: add usbid for TP-Link TL-WN821N v2
+  * mtd: nand: fix ECC Correction bug for SMC ordering for NDFC driver
+  * mtd: ofpart: Check availability of reg property instead of name
+    property
+  * mtd: cfi_cmdset_0002: add 0xFF intolerance for M29W128G
+  * USB: serial: ftdi_sio: new hardware support - hameg power supply
+  * USB: add PIDs for FTDI based OpenDCC hardware
+  * USB: serial: ftdi: handle gnICE+ JTAG adaptors
+  * USB: CDC WDM driver doesn't support non-blocking reads
+  * USB: fix cdc-acm regression in open
+  * cdc_acm: Fix to use modern speed interfaces
+  * tty: remove dtr/rts use from the driver open methods
+  * tty: gigaset: really fix chars_in_buffer
+  * kaweth: Fix memory leak in kaweth_control()
+  * x86: SGI UV: Fix IPI macros
+  * USB: serial: pl2303: new hardware support - sanwa multimeter
+  * USB: storage: fix a resume path GFP_NOIO must be used
+  * USB: usb-storage fails to attach to Huawei Datacard cdrom device
+  * USB: usbtmc: sanity checks for DEV_DEP_MSG_IN urbs
+  * USB: sl811-hcd: Fix device disconnect:
+  * drm/i915: remove restore in resume
+  * drm/i915: Only destroy a constructed mmap offset
+  * drm/i915: prevent FIFO calculation overflows on 32 bits with high
+    dotclocks
+  * drm/i915: Add buffer to inactive list immediately during fault
+  * drm/i915: Check that the relocation points to within the target
+  * drm/i915: Fix typo for wrong LVDS clock setting on IGDNG
+  * drm/i915: Fix SSC frequence for IGDNG
+  * drm/i915: Remove DAC disable in CRT force detect on IGDNG
+  * drm/i915: Fix LVDS panel fitting on Arrandale
+  * drm/I915: Use the CRT DDC to get the EDID for DVI-connector on Mac
+  * drm/i915: fix tiling on IGDNG
+  * agp/intel: Fix the pre-9xx chipset flush.
+  * nfsd4: fix null dereference creating nfsv4 callback client
+  * can: fix NOHZ local_softirq_pending 08 warning
+  * ahci: restore pci_intx() handling
+  * pxa/sharpsl_pm: zaurus c3000 aka spitz: fix resume
+  * net ax25: Fix signed comparison in the sockopt handler
+  * net: Make the copy length in af_packet sockopt handler unsigned
+  * pty_write: don't do a tty_wakeup() when the buffers are full
+  * KVM: fix cpuid E2BIG handling for extended request types
+  * KVM: MMU: fix missing locking in alloc_mmu_pages
+  * KVM: MMU: fix bogus alloc_mmu_pages assignment
+  * KVM: Protect update_cr8_intercept() when running without an apic
+  * Fix NULL ptr regression in powernow-k8
+  * perf tools: do not complain if root is owning perf.data
+  * netfilter: nf_nat: fix inverted logic for persistent NAT mappings
+  * netfilter: nf_conntrack: netns fix re reliable conntrack event delivery
+  * netfilter: bridge: refcount fix
+  * netfilter: ebt_ulog: fix checkentry return value
+  * ath5k: Wakeup fixes
+  * ath5k: do not release irq across suspend/resume
+  * Driver core: add new device to bus's list before probing
+  * tty: Add a full port_close function
+  * tty: USB hangup is racy
+  * tty: USB can now use the shutdown method for kref based freeing of
+    ports
+  * hwmon: (asus_atk0110) Add maintainer information
+  * tty: USB serial termios bits
+  * usb-serial: change referencing of port and serial structures
+  * usb-serial: put subroutines in logical order
+  * usb-serial: change logic of serial lookups
+  * usb-serial: acquire references when a new tty is installed
+  * usb-serial: fix termios initialization logic
+  * usb-serial: rename subroutines
+  * usb-serial: add missing tests and debug lines
+  * usb-serial: straighten out serial_open
+  * USB serial: update the console driver
+  * USB: xhci: Work around for chain bit in link TRBs.
+  * USB: xhci: Fix slot and endpoint context debugging.
+  * USB: xhci: Configure endpoint code refactoring.
+  * USB: xhci: Set correct max packet size for HS/FS control endpoints.
+  * USB: xhci: Support full speed devices.
+  * USB: xhci: Handle stalled control endpoints.
+  * USB: xhci: Add quirk for Fresco Logic xHCI hardware.
+  * USB: xhci: Make TRB completion code comparison readable.
+  * USB: xhci: Handle babbling endpoints correctly.
+  * USB: xhci: Don't touch xhci_td after it's freed.
+  * USB: xhci: Check URB's actual transfer buffer size.
+  * USB: xhci: Check URB_SHORT_NOT_OK before setting short packet status.
+  * USB: xhci: Set -EREMOTEIO when xHC gives bad transfer length.
+  * USB: xhci: Support interrupt transfers.
+  * USB: Fix SS endpoint companion descriptor parsing.
+  * /proc/kcore: work around a BUG()
+  * hugetlb: restore interleaving of bootmem huge pages (2.6.31)
+  * page-allocator: limit the number of MIGRATE_RESERVE pageblocks per zone
+  * mm: munlock use follow_page
+  * mm: fix anonymous dirtying
+  * mmap: avoid unnecessary anon_vma lock acquisition in vma_adjust()
+  * Fix idle time field in /proc/uptime
+  * drm/i915: Handle ERESTARTSYS during page fault
+  * em28xx: ir-kbd-i2c init data needs a persistent object
+  * saa7134: ir-kbd-i2c init data needs a persistent object
+  * powerpc/8xx: Fix regression introduced by cache coherency rewrite
+  * powerpc: Fix incorrect setting of __HAVE_ARCH_PTE_SPECIAL
+  * HID: completely remove apple mightymouse from blacklist
+  * mptsas : PAE Kernel more than 4 GB kernel panic
+  * NOMMU: Fix MAP_PRIVATE mmap() of objects where the data can be mapped
+    directly
+  * iwlwifi: Handle new firmware file with ucode build number in header
+  * iwlwifi: update 1000 series API version to match firmware
+  * iwlagn: modify digital SVR for 1000
+  * iwlwifi: traverse linklist to find the valid OTP block
+  * iwlwifi: fix unloading driver while scanning
+  * Linux 2.6.31.2
+
+  [ Ubuntu: 2.6.31-11.38 ]
+
+  * [Upstream] acerhdf: Limit modalias matching to supported boards
+    - LP: #435958
+  * [Config] Added sata_via to d-i/modules/sata-modules
+    - LP: #434827
+  * SAUCE: (drop after 2.6.31) Disable iwl-1000 series wireless adapters
+    - LP: #439285
+  * [Upstream] i915: Fix i2c init message
+    - LP: #409361
+  * [Config] Add sym53c8xx.ko to virtual sub-flavour
+    - LP: #439415
+  * sched: Disable NEW_FAIR_SLEEPERS for now
+    - LP: #436342
+  * ACPI video: ignore buggy _BQC
+  * ACPI video: work-around BIOS AML bug in _BQC
+    - LP: #428910
+  * ALSA: hda - Added quirk to enable sound on Toshiba NB200
+    - LP: #438318
+
+ -- Andy Whitcroft <apw@canonical.com>  Tue, 06 Oct 2009 18:41:58 +0100
+
+linux-mvl-dove (2.6.31-205.13) karmic; urgency=low
+
+  [ rebased against Ubuntu-2.6.31-11.37 ]
+
+  [ Tim Gardner ]
+
+  * [Config] Increase kernel log buffer to 256K for amd64 flavours
+    - LP: #424810
+  * [Config] Set HZ=100 for amd64 flavours
+    - LP: #438234
+  * [Upstream] e1000e: Emit notice instead of an error when
+    pci_enable_pcie_error_reporting() fails
+    - LP: #436370
+
+  [ Upstream Kernel Changes ]
+
+  * n_tty: honor opost flag for echoes
+  * n_tty: move echoctl check and clean up logic
+    - LP: #438310
+
+  * Revert "[Upstream] drm/i915: Check that the relocation points to within
+    the target" - Use upstream cherry-pick.
+  * drm/i915: Check that the relocation points to within the target
+    - LP: #429241
+
+  * drm/i915: fix tiling on IGDNG
+  * drm/i915: add B43 chipset support
+  * agp/intel: Add B43 chipset support
+    Intel request from kernel team mailing list.
+
+  * HID: completely remove apple mightymouse from blacklist
+    - LP: #428111
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Tue, 29 Sep 2009 12:02:59 -0600
+
+linux-mvl-dove (2.6.31-205.12) karmic; urgency=low
+
+  [ Brad Figg ]
+
+  * Removed the dove-z0 flavour
+  * [Config] Changes due to new dove changes.
+  * rebase to Ubuntu-2.6.31-11.36
+
+  [ Ubuntu: 2.6.31-11.36 ]
+
+  * SAUCE: (drop after 2.6.31) em28xx: ir-kbd-i2c init data needs a
+    persistent object
+  * SAUCE: (drop after 2.6.31) saa7134: ir-kbd-i2c init data needs a
+    persistent object
+  * [Upstream] ALSA: hda - Add another entry for Nvidia HDMI device
+    - LP: #416482
+  * SAUCE: (drop after 2.6.31) eCryptfs: Prevent lower dentry from going
+    negative during unlink
+  * sg: fix oops in the error path in sg_build_indirect()
+  * mpt2sas : Rescan topology from Interrupt context instead of work thread
+  * mpt2sas: Prevent sending command to FW while Host Reset
+  * mpt2sas: setting SDEV into RUNNING state from Interrupt context
+  * mpt2sas: Raid 10 Volume is showing as Raid 1E in dmesg
+  * SCSI: fix oops during scsi scanning
+  * SCSI: libsrp: fix memory leak in srp_ring_free()
+  * cfg80211: fix looping soft lockup in find_ie()
+  * ath5k: write PCU registers on initial reset
+  * binfmt_elf: fix PT_INTERP bss handling
+  * TPM: Fixup boot probe timeout for tpm_tis driver
+  * md: Fix "strchr" [drivers/md/dm-log-userspace.ko] undefined!
+  * x86/amd-iommu: fix broken check in amd_iommu_flush_all_devices
+  * fix undefined reference to user_shm_unlock
+  * perf_counter: Fix buffer overflow in perf_copy_attr()
+  * perf_counter: Start counting time enabled when group leader gets
+    enabled
+  * powerpc/perf_counters: Reduce stack usage of power_check_constraints
+  * powerpc: Fix bug where perf_counters breaks oprofile
+  * powerpc/ps3: Workaround for flash memory I/O error
+  * block: don't assume device has a request list backing in nr_requests
+    store
+  * agp/intel: remove restore in resume
+  * ALSA: cs46xx - Fix minimum period size
+  * ASoC: Fix WM835x Out4 capture enumeration
+  * sound: oxygen: work around MCE when changing volume
+  * mlx4_core: Allocate and map sufficient ICM memory for EQ context
+  * perf stat: Change noise calculation to use stddev
+  * x86: Fix x86_model test in es7000_apic_is_cluster()
+  * x86/i386: Make sure stack-protector segment base is cache aligned
+  * PCI: apply nv_msi_ht_cap_quirk on resume too
+  * x86, pat: Fix cacheflush address in change_page_attr_set_clr()
+  * ARM: 5691/1: fix cache aliasing issues between kmap() and kmap_atomic()
+    with highmem
+  * KVM guest: do not batch pte updates from interrupt context
+  * KVM: Fix coalesced interrupt reporting in IOAPIC
+  * KVM: VMX: Check cpl before emulating debug register access
+  * KVM guest: fix bogus wallclock physical address calculation
+  * KVM: x86: Disallow hypercalls for guest callers in rings > 0
+  * KVM: VMX: Fix cr8 exiting control clobbering by EPT
+  * KVM: x86 emulator: Implement zero-extended immediate decoding
+  * KVM: MMU: make __kvm_mmu_free_some_pages handle empty list
+  * KVM: x86 emulator: fix jmp far decoding (opcode 0xea)
+  * KVM: limit lapic periodic timer frequency
+  * libata: fix off-by-one error in ata_tf_read_block()
+  * PCI quirk: update 82576 device ids in SR-IOV quirks list
+  * PCI: Unhide the SMBus on the Compaq Evo D510 USDT
+  * powerpc/pseries: Fix to handle slb resize across migration
+  * Linux 2.6.31.1
+
+  [ Ubuntu: 2.6.31-10.35 ]
+
+  * Disable CONFIG_UEVENT_HELPER_PATH
+  * [Config] Enable CONFIG_USB_GADGET_DUMMY_HCD
+  * remove the tlsup driver
+  * remove lmpcm logitech driver support
+  * Add 3 missing files to prerm remove file list
+    - LP: #345623, #415832
+  * [Upstream] drm/i915: Check that the relocation points to within the
+    target
+    - LP: #429241
+  * [Config] Set CONFIG_EXT4_FS=y on ports architectures
+  * SAUCE: Added quirk to recognize GE0301 3G modem as an interface.
+    - LP: #348861
+  * Revert "[Upstream] ACPI: Add Thinkpad W500, W700, & W700ds to OSI(Linux) white-list"
+  * Revert "[Upstream] ACPI: Add Thinkpad R400 & Thinkpad R500 to OSI(Linux) white-list"
+  * Revert "[Upstream] ACPI: Add Thinkpad X300 & Thinkpad X301 to OSI(Linux) white-list"
+  * Revert "[Upstream] ACPI: Add Thinkpad X200, X200s, X200t to OSI(Linux) white-list"
+  * Revert "[Upstream] ACPI: Add Thinkpad T400 & Thinkpad T500 to OSI(Linux) white-list"
+    Upstream suggests that this is not the right approach.
+  * [Config] Set default I/O scheduler to DEADLINE
+    CFQ seems to have some load related problems which are often exacerbated by sreadahead.
+    - LP: #381300
+  * SAUCE: ipw2200: Enable LED by default
+    - LP: #21367
+  * ALSA: hda - Add support for new AMD HD audio devices
+    - LP: #430564
+
+  [ Ubuntu: 2.6.31-10.34 ]
+
+  * [Upstream] ext3: Don't update superblock write time when filesystem is
+    read-only
+    - LP: #427822
+
+  [ Ubuntu: 2.6.31-10.33 ]
+
+  * [Upstream] dvb-usb: fix tuning with Cinergy T2
+    - LP: #421258
+  * [Config] Unconditionally copy files from sub-flavours lists.
+    (really, really fix it this time)
+    - LP: #423426
+  * [Config] Set CONFIG_CACHEFILES=m for all flavours
+  * ext4: Don't update superblock write time when filesystem is read-only
+    - LP: #427822
+
+ -- Andy Whitcroft <apw@canonical.com>  Fri, 25 Sep 2009 10:32:08 -0700
+
+linux-mvl-dove (2.6.31-204.11) karmic; urgency=low
+
+  [ Brad Figg ]
+
+  * [Config] Adding modules for d-i support to help with netboot and
+    alternate images support
+    - LP: #431945
+
+  [ Tim Gardner ]
+
+  * [Config] De-macro SRCPKGNAME-headers
+  * [Config] More SRCPKGNAME demacro-ization.
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Mon, 14 Sep 2009 11:40:48 -0600
+
+linux-mvl-dove (2.6.31-204.10) karmic; urgency=low
+
+  [ Tim Gardner ]
+
+  * [Config] Don't include ABI or version in vmlinuz name in kernel-image
+    - LP: #359049
+
+  [ Brad Figg ]
+
+  * Rebase against master 878e32db158b972b443c5cd8370b2d52068bcaaf, v2.6.31 final
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Thu, 10 Sep 2009 16:29:38 -0600
+
+linux-mvl-dove (2.6.31-204.9) karmic; urgency=low
+
+  [ Brad Figg ]
+
+  * [Config] Dove Configuration: set lcd external clock to a fixed speed,
+    1000MHz.
+    - LP: #423675
+  * [Config] updateconfigs due to new -rc9 option
+  * [Config] Marvell Dove, lcd sclk value different for Z0 and Y0 boards
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Wed, 09 Sep 2009 11:02:38 -0600
+
+linux-mvl-dove (2.6.31-203.8) karmic; urgency=low
+
+  [ Brad Figg ]
+
+  * [Config] Generate zImages instead of uImages per Mobile request
+  * Rebased against master Ubuntu-2.6.31-9.29 (2.6.31-rc8)
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Tue, 01 Sep 2009 10:02:07 -0600
+
+linux-mvl-dove (2.6.31-203.7) karmic; urgency=low
+
+  [ Brad Figg ]
+
+  * [Config] Dove configuration, fixup DOVEFB_DISPLAY_MODE=y
+  * SAUCE: Correct undefined dove_pm_register which prevented Z0 flavour
+    from building.
+
+  [ Upstream Kernel Changes ]
+
+  * rebased against marvell-dove-2.6.31-rc7
+  * Revert "dove: fix build error when builing modules This patch builds
+    the hal sub-dirs only when builing the kernel"
+  * Revert "fixes to the Makefile system to enable out-of-tree compilation"
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Sun, 30 Aug 2009 17:27:30 -0600
+
+linux-mvl-dove (2.6.31-202.6) karmic; urgency=low
+
+  [ Brad Figg ]
+
+  * [Config] Common network options
+  * [Config] Common filesystem options
+  * [Config] Common library routines
+  * [Config] Common cryptographic API options.
+  * [Config] Common security and kernel hacking options.
+  * [Config] Common device driver options enabled for Marvell dove
+  * [Config] Dove Configuration, AppArmor
+  * [Config] Dove Configuration, Staging
+  * [Config] Dove Configuration, Userspace I/O drivers
+  * [Config] Dove Configuration, Voltage & Regulator, Auxiliary Display
+  * [Config] Dove Configuration, LED and RTC
+  * [Config] Dove Configuration, USB
+  * [Config] Dove Configuration, General setup (initramfs/initrd)
+  * [Config] Dove Configuration, HID, USB networking, Multimedia, Android,
+    Input, etc.
+
+  [ Tim Gardner ]
+
+  * [Config] Dropped KSM
+  * Rebased against 2.6.31-8.28 which brings the Dove branch up to
+    2.6.31-rc7
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Thu, 27 Aug 2009 09:29:45 -0600
+
+linux-mvl-dove (2.6.31-201.5) karmic; urgency=low
+
+  [ Tim Gardner ]
+
+  * [Config] Do not generate a doc package
+  * [Config] Do not produce a source package
+  * [Config] Common headers package is arch (armel) dependent
+  * [Config] Create common headers file for armel only.
+    - LP: #417266
+  * Rebased to master Ubuntu-2.6.31-6.26  which brings the Dove branch up to
+    2.6.31-rc6.
+  * Dropped 'fixes to the Makefile system to enable out-of-tree compilation'
+    from the Dove repo in order to make in-tree builds work.
+  * Enabled the ubuntu directory drivers (aufs, compcache, etc).
+
+  [ Brad Figg ]
+
+  * Add dove-z0 flavour
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Fri, 21 Aug 2009 12:50:08 -0600
+
+linux-mvl-dove (2.6.31-200.4) karmic; urgency=low
+
+  [ Tim Gardner ]
+
+  * [Config] Added rsync to build dependencies
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Fri, 21 Aug 2009 09:11:26 -0600
+
+linux-mvl-dove (2.6.31-200.3) karmic; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * abstracted debian -- kernel-wedge needs to work in debian/
+  * abstracted debian -- ensure we install the copyright file
+  * abstracted-debian -- drop the debian directories from headers
+  * abstracted-debian -- drop the debian directories from headers part 2
+
+  [ Tim Gardner ]
+
+  * SAUCE: Improve error reporting in postinst
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Thu, 20 Aug 2009 11:10:40 -0600
+
+linux-mvl-dove (2.6.31-200.2) karmic; urgency=low
+
+  * Marvell ARM dove marvell-dove-2.6.31-rc5
+  * Abstracted debian build infrastructure.
+  * Bump ABI to 200 to avoid conflictas with other kernel packages.
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Thu, 13 Aug 2009 08:45:29 -0600
+
+linux-mvl-dove (2.6.31-200.1) UNRELEASED; urgency=low
+
+  * Marvell ARM dove marvell-dove-2.6.31-rc4
+
+ -- Brad Figg <brad.figg@canonical.com>  Fri, 07 Aug 2009 07:23:35 -0700
+
+linux-mvl-dove (2.6.31-0.0) UNRELEASED; urgency=low
+
+  * Initial release
+
+ -- Brad Figg <brad.figg@canonical.com>  Fri, 07 Aug 2009 04:56:51 -0700
--- linux-mvl-dove-2.6.32.orig/debian/debian.env
+++ linux-mvl-dove-2.6.32/debian/debian.env
@@ -0,0 +1 @@
+DEBIAN=debian.mvl-dove
--- linux-mvl-dove-2.6.32.orig/debian/rules
+++ linux-mvl-dove-2.6.32/debian/rules
@@ -0,0 +1,226 @@
+#!/usr/bin/make -f
+#
+# $(DEBIAN)/rules for Ubuntu linux
+#
+# Use this however you want, just give credit where credit is due.
+#
+# Copyright (c) 2007 Ben Collins <bcollins@ubuntu.com>
+#
+
+DEBIAN=$(shell awk -F= '($$1 == "DEBIAN") { print $$2 }' <debian/debian.env)
+
+# dpkg-buildpackage passes options that are incomptatible
+# with the kernel build.
+unexport CFLAGS
+unexport LDFLAGS
+
+export LC_ALL=C
+export SHELL=/bin/bash -e
+
+# Where do we find the common configuration.
+export DROOT=debian
+
+# Common variables for all architectures
+include $(DROOT)/rules.d/0-common-vars.mk
+
+# Pull in some arch specific stuff
+-include $(DEBIAN)/rules.d/$(arch).mk
+
+# Maintainer targets
+include $(DROOT)/rules.d/1-maintainer.mk
+
+# Debian Build System targets
+binary: binary-indep binary-arch
+
+build: build-arch build-indep
+
+clean: debian/control
+	dh_testdir
+	dh_testroot
+	dh_clean
+
+	# d-i stuff
+	rm -rf $(DEBIAN)/d-i-$(arch)
+
+	# normal build junk
+	rm -rf $(DEBIAN)/abi/$(release)-$(revision)
+	rm -rf $(builddir)
+	rm -f $(stampdir)/stamp-*
+	rm -rf $(DEBIAN)/linux-*
+
+	# This gets rid of the d-i packages in control
+	cp -f $(DEBIAN)/control.stub $(DEBIAN)/control
+	cp $(DEBIAN)/changelog debian/changelog
+
+	# Install the copyright information.
+	cp $(DEBIAN)/copyright debian/copyright
+
+distclean: clean
+	rm -rf $(DEBIAN)/control $(DEBIAN)/control.stub \
+		$(DEBIAN)/d-i/kernel-versions debian/changelog \
+		debian/control debian/control.stub debian/copyright
+
+# Builds the image, arch headers and debug packages
+include $(DROOT)/rules.d/2-binary-arch.mk
+
+# Rules for building the udebs ($(DEBIAN)-installer)
+include $(DROOT)/rules.d/5-udebs.mk
+
+# Builds the source, doc and linux-headers indep packages
+include $(DROOT)/rules.d/3-binary-indep.mk
+
+# Various checks to be performed on builds
+include $(DROOT)/rules.d/4-checks.mk
+
+# Misc stuff
+$(DEBIAN)/control.stub: $(DEBIAN)/d-i/kernel-versions.in	\
+		$(DROOT)/scripts/control-create		\
+		$(DEBIAN)/control.stub.in			\
+		$(DEBIAN)/changelog			\
+		$(wildcard $(DEBIAN)/control.d/* $(DEBIAN)/sub-flavours/*.vars)
+	for i in $(DEBIAN)/d-i/kernel-versions.in $(DEBIAN)/control.stub.in; do	\
+	  new=`echo $$i | sed 's/\.in$$//'`;					\
+	  cat $$i | sed -e 's/PKGVER/$(release)/g'                              \
+	        -e 's/ABINUM/$(abinum)/g'                                       \
+		-e 's/SRCPKGNAME/$(src_pkg_name)/g'                             \
+	  > $$new;								\
+	done
+	flavours="$(wildcard $(DEBIAN)/control.d/vars.* $(DEBIAN)/sub-flavours/*.vars)";\
+	for i in $$flavours; do							\
+	  $(SHELL) $(DROOT)/scripts/control-create $$i |				\
+		sed -e 's/PKGVER/$(release)/g'                                  \
+		-e 's/ABINUM/$(abinum)/g'                                       \
+		-e 's/SRCPKGNAME/$(src_pkg_name)/g'                             \
+		>> $(DEBIAN)/control.stub;						\
+	done
+	cp $(DEBIAN)/control.stub $(DEBIAN)/control
+
+.PHONY: debian/control
+debian/control: $(DEBIAN)/control.stub
+	rm -rf $(builddir)/modules $(builddir)/firmware			\
+		$(builddir)/kernel-versions $(builddir)/package-list	\
+		$(builddir)/$(DEBIAN)
+	mkdir -p $(builddir)/modules/$(arch)/
+	cp $(DEBIAN)/d-i/modules/* $(builddir)/modules/$(arch)/
+	mkdir -p $(builddir)/firmware/$(arch)/
+	cp $(DEBIAN)/d-i/firmware/* $(builddir)/firmware/$(arch)/
+	cp $(DEBIAN)/d-i/package-list $(DEBIAN)/d-i/kernel-versions $(builddir)/
+	touch $(builddir)/modules/$(arch)/kernel-image
+	# kernel-wedge needs to poke around in $(DEBIAN)/
+	ln -nsf $(CURDIR)/debian $(builddir)/debian
+
+	# Some files may need to differ between architectures
+	if [ -d $(DEBIAN)/d-i/modules-$(arch) ]; then			\
+	    cp $(DEBIAN)/d-i/modules-$(arch)/* \
+		$(builddir)/modules/$(arch)/;				\
+	fi
+	if [ -d $(DEBIAN)/d-i/firmware-$(arch) ]; then			\
+	    cp $(DEBIAN)/d-i/firmware-$(arch)/* \
+		$(builddir)/firmware/$(arch)/;				\
+	fi
+
+	# Remove unwanted stuff for this architecture
+	if [ -r "$(DEBIAN)/d-i/exclude-modules.$(arch)" ]; then		\
+	    (cat $(DEBIAN)/d-i/exclude-modules.$(arch);			\
+	     ls $(builddir)/modules/$(arch)/) | sort | uniq -d |	\
+		(cd $(builddir)/modules/$(arch)/; xargs rm -f);		\
+	fi
+	if [ -r "$(DEBIAN)/d-i/exclude-firmware.$(arch)" ]; then		\
+	    (cat $(DEBIAN)/d-i/exclude-firmware.$(arch);			\
+	     ls $(builddir)/firmware/$(arch)/) | sort | uniq -d |	\
+		(cd $(builddir)/firmware/$(arch)/; xargs rm -f);	\
+	fi
+
+	# Per flavour module lists
+	flavour_modules=`ls $(DEBIAN)/d-i/modules.$(arch)-* 2>/dev/null`	\
+		|| true;						\
+	if [ "$$flavour_modules" != "" ]; then				\
+	    for flav in $$flavour_modules; do				\
+		name=`echo $$flav | sed 's/.*\/modules.$(arch)-//'`;	\
+		mkdir $(builddir)/modules/$(arch)-$$name;		\
+		(cd $(builddir)/modules/; tar cf - `cat ../$$flav`) |	\
+		    (cd $(builddir)/modules/$(arch)-$$name/; tar xf -);	\
+		touch $(builddir)/modules/$(arch)-$$name/kernel-image;	\
+	    done;							\
+	fi
+	flavour_firmware=`ls $(DEBIAN)/d-i/firmware.$(arch)-* 2>/dev/null`	\
+		|| true;						\
+	if [ "$$flavour_firmware" != "" ]; then				\
+	    for flav in $$flavour_firmware; do				\
+		name=`echo $$flav | sed 's/.*\/firmware.$(arch)-//'`;	\
+		mkdir $(builddir)/firmware/$(arch)-$$name;		\
+		(cd $(builddir)/firmware/; tar cf - `cat ../$$flav`) |	\
+		    (cd $(builddir)/firmware/$(arch)-$$name/; tar xf -);\
+		touch $(builddir)/firmware/$(arch)-$$name/kernel-image;	\
+	    done;							\
+	fi
+
+	# Some files may need to differ between flavours
+	flavour_module_dirs=`ls -d $(DEBIAN)/d-i/modules-$(arch)-* 2>/dev/null`\
+		|| true;						\
+	if [ "$$flavour_module_dirs" ]; then				\
+	    for flav in $$flavour_module_dirs; do			\
+		name=`echo $$flav | sed 's/.*\/modules-$(arch)-//'`;	\
+		[ -d $(builddir)/modules/$(arch)-$$name ] ||		\
+		    cp -a $(builddir)/modules/$(arch)			\
+			modules/$(arch)-$$name;				\
+		cp $$flav/* $(builddir)/modules/$(arch)-$$name/;	\
+	    done;							\
+	fi
+	flavour_firmware_dirs=`ls -d $(DEBIAN)/d-i/firmware-$(arch)-* 2>/dev/null`\
+		|| true;						\
+	if [ "$$flavour_firmware_dirs" ]; then				\
+	    for flav in $$flavour_firmware_dirs; do			\
+		name=`echo $$flav | sed 's/.*\/firmware-$(arch)-//'`;	\
+		[ -d $(builddir)/firmware/$(arch)-$$name ] ||		\
+		    cp -a $(builddir)/firmware/$(arch)			\
+			firmware/$(arch)-$$name;			\
+		cp $$flav/* $(builddir)/firmware/$(arch)-$$name/;	\
+	    done;							\
+	fi
+
+	# Remove unwanted stuff for each flavour
+	flavour_exclude=`ls $(DEBIAN)/d-i/exclude-modules.$(arch)-* 2>/dev/null`\
+		|| true;						\
+	if [ "$$flavour_exclude" ]; then				\
+	    for flav in $$flavour_exclude; do				\
+		name=`echo $$flav | sed 's/.*\/exclude-modules.$(arch)-//'`;\
+		[ -d $(builddir)/modules/$(arch)-$$name ] ||		\
+		    cp -a $(builddir)/modules/$(arch) 			\
+			$(builddir)/modules/$(arch)-$$name;		\
+		(cat $$flav;						\
+		 ls $(builddir)/modules/$(arch)-$$name) |		\
+		 sort |	uniq -d |					\
+		    (cd $(builddir)/modules/$(arch)-$$name/;		\
+		     xargs rm -f);					\
+	    done;							\
+	fi
+	flavour_exclude=`ls $(DEBIAN)/d-i/exclude-firmware.$(arch)-* 2>/dev/null`\
+		|| true;						\
+	if [ "$$flavour_exclude" ]; then				\
+	    for flav in $$flavour_exclude; do				\
+		name=`echo $$flav | sed 's/.*\/exclude-firmware.$(arch)-//'`;\
+		[ -d $(builddir)/firmware/$(arch)-$$name ] ||		\
+		    cp -a $(builddir)/firmware/$(arch) 			\
+			$(builddir)/firmware/$(arch)-$$name;		\
+		(cat $$flav;						\
+		 ls $(builddir)/firmware/$(arch)-$$name) |		\
+		 sort |	uniq -d |					\
+		    (cd $(builddir)/firmware/$(arch)-$$name/;		\
+		     xargs rm -f);					\
+	    done;							\
+	fi
+
+	if [ ! -d $(builddir)/modules/$(build_arch) ]; then		\
+		mkdir -p $(builddir)/modules/$(build_arch);		\
+		cp $(builddir)/modules/$(arch)/*			\
+			$(builddir)/modules/$(build_arch);		\
+	fi
+	if [ ! -d $(builddir)/firmware/$(build_arch) ]; then		\
+		mkdir -p $(builddir)/firmware/$(build_arch);		\
+		cp $(builddir)/firmware/$(arch)/*			\
+			$(builddir)/firmware/$(build_arch);		\
+	fi
+
+	cp $(DEBIAN)/control.stub debian/control.stub
+	cd $(builddir) && kernel-wedge gen-control > $(CURDIR)/debian/control
--- linux-mvl-dove-2.6.32.orig/debian/control
+++ linux-mvl-dove-2.6.32/debian/control
@@ -0,0 +1,75 @@
+Source: linux-mvl-dove
+Section: devel
+Priority: optional
+Maintainer: Ubuntu Kernel Team <kernel-team@lists.ubuntu.com>
+Standards-Version: 3.8.4.0
+Build-Depends: debhelper (>= 5), cpio, module-init-tools, kernel-wedge (>= 2.24ubuntu1), rsync
+Build-Depends-Indep: xmlto, docbook-utils, ghostscript, transfig, bzip2, sharutils
+Build-Conflicts: findutils (= 4.4.1-1ubuntu1)
+Vcs-Git: http://kernel.ubuntu.com/git-repos/ubuntu/ubuntu-lucid.git
+
+Package: linux-headers-2.6.32-218
+Architecture: armel
+Section: devel
+Priority: optional
+Depends: ${misc:Depends}, coreutils | fileutils (>= 4.0)
+#Provides: linux-headers, linux-headers-2.6
+Description: Header files related to linux-mvl-dove kernel version 2.6.32
+ This package provides kernel header files for version 2.6.32, for sites
+ that want the latest kernel headers. Please read
+ /usr/share/doc/linux-headers-2.6.32-218/debian.README.gz for details
+
+
+Package: linux-image-2.6.32-218-dove
+Architecture: armel
+Section: admin
+Priority: optional
+Pre-Depends: dpkg (>= 1.10.24)
+Depends: ${misc:Depends}, initramfs-tools (>= 0.36ubuntu6), coreutils | fileutils (>= 4.0), module-init-tools (>= 3.3-pre11-4ubuntu3), wireless-crda
+Conflicts: hotplug (<< 0.0.20040105-1)
+Recommends: 
+Suggests: fdutils, linux-mvl-dove-doc-2.6.32 | linux-mvl-dove-source-2.6.32
+Description: Linux kernel image for version 2.6.32 on dove-based systems
+ This package contains the Linux kernel image for version 2.6.32 on
+ dove-based systems.
+ .
+ Also includes the corresponding System.map file, the modules built by the
+ packager, and scripts that try to ensure that the system is not left in an
+ unbootable state after an update.
+ .
+ Supports dove processors.
+ .
+ Marvell, dove, y0 boards
+ .
+ You likely do not want to install this package directly. Instead, install
+ the linux-dove meta-package, which will ensure that upgrades work
+ correctly, and that supporting packages are also installed.
+
+Package: linux-headers-2.6.32-218-dove
+Architecture: armel
+Section: devel
+Priority: optional
+Depends: ${misc:Depends}, coreutils | fileutils (>= 4.0), linux-headers-2.6.32-218, ${shlibs:Depends}
+Description: Linux kernel headers for version 2.6.32 on dove-based systems
+ This package provides kernel header files for version 2.6.32 on
+ dove-based systems.
+ .
+ This is for sites that want the latest kernel headers.  Please read
+ /usr/share/doc/linux-headers-2.6.32-218/debian.README.gz for details.
+
+Package: linux-image-2.6.32-218-dove-dbgsym
+Architecture: armel
+Section: devel
+Priority: optional
+Depends: ${misc:Depends}
+Provides: linux-debug
+Description: Linux kernel debug image for version 2.6.32 on dove-based systems
+ This package provides a kernel debug image for version 2.6.32 on
+ dove-based systems.
+ .
+ This is for sites that wish to debug the kernel.
+ .
+ The kernel image contained in this package is NOT meant to boot from. It
+ is uncompressed, and unstripped. This package also includes the
+ unstripped modules.
+
--- linux-mvl-dove-2.6.32.orig/debian/compat
+++ linux-mvl-dove-2.6.32/debian/compat
@@ -0,0 +1 @@
+5
--- linux-mvl-dove-2.6.32.orig/debian/commit-templates/external-driver
+++ linux-mvl-dove-2.6.32/debian/commit-templates/external-driver
@@ -0,0 +1,20 @@
+# Ubuntu external driver commit.
+#
+# NOTE: This gets reformatted for README.Ubuntu-External-Drivers and
+# debian/changelog.
+#
+# This is only needed when a driver is added, updated or removed. It is
+# not needed when patches or fixes are applied to the driver. If the
+# driver is being removed, add the line:
+#
+# Removing: yes
+#
+# to the commit, and you can remove all other tags (except UBUNTU:).
+#
+UBUNTU: 
+
+ExternalDriver: 
+Description:
+Url:
+Mask:
+Version:
--- linux-mvl-dove-2.6.32.orig/debian/commit-templates/bumpabi
+++ linux-mvl-dove-2.6.32/debian/commit-templates/bumpabi
@@ -0,0 +1,3 @@
+UBUNTU: Bump ABI
+
+Ignore: yes
--- linux-mvl-dove-2.6.32.orig/debian/commit-templates/upstream-patch
+++ linux-mvl-dove-2.6.32/debian/commit-templates/upstream-patch
@@ -0,0 +1,27 @@
+# Ubuntu commit template.
+#
+# NOTE: This gets reformatted for debian/changelog
+#
+# The initial UBUNTU is a flag that this is an Ubuntu commit. It will be
+# referenced to the Author in the debian/changelog entry.
+#
+# The text following is the short message that will be placed in the
+# changelog. Extra text on the following lines will be ignored, but left
+# in the git commit. Lines with # will be ignored in the commit.
+#
+# OriginalAuthor allows for alternate attribution.
+#
+# OriginalLocation allows for a URL or description of where the patch came
+# from.
+#
+# BugLink is a URL to a Malone bug.
+#
+# Ignore: yes will keep this commit from showing up in the changelog.
+#
+UBUNTU: [Upstream]
+
+# OriginalAuthor: 
+# OriginalLocation: 
+# BugLink: http://bugs.launchpad.net/bugs/<enter bug# here>
+# Ignore: yes
+# Other text below here.
--- linux-mvl-dove-2.6.32.orig/debian/commit-templates/newrelease
+++ linux-mvl-dove-2.6.32/debian/commit-templates/newrelease
@@ -0,0 +1,3 @@
+UBUNTU: Start new release
+
+Ignore: yes
--- linux-mvl-dove-2.6.32.orig/debian/commit-templates/sauce-patch
+++ linux-mvl-dove-2.6.32/debian/commit-templates/sauce-patch
@@ -0,0 +1,40 @@
+# Ubuntu commit template.
+#
+# NOTE: This gets reformatted for debian/changelog
+#
+#
+# SAUCE refers to the fact that this patch might not go upstream, but we need to
+# carry it to successive releases. In most cases you DONOT want to use this
+# template. 
+#
+# An example of a SAUCE patch is the ACPI DSDT-in-initramfs patch which has been
+# refused upstream, but still provides useful functionality to users with broken
+# BIOSes.
+#
+#-------------------------------------------------------------------------
+#
+# The initial UBUNTU is a flag that this is an Ubuntu commit. It will be
+# referenced to the Author in the debian/changelog entry.
+#
+# The text following is the short message that will be placed in the
+# changelog. Extra text on the following lines will be ignored, but left
+# in the git commit. Lines with # will be ignored in the commit.
+#
+# OriginalAuthor allows for alternate attribution.
+#
+# OriginalLocation allows for a URL or description of where the patch came
+# from.
+#
+# BugLink is a URL to a Malone bug.
+#
+# Ignore: yes will keep this commit from showing up in the changelog.
+#
+UBUNTU: SAUCE: 
+
+<Why is this patch not going upstream?>
+
+# OriginalAuthor: 
+# OriginalLocation: 
+# BugLink: http://bugs.launchpad.net/bugs/<enter bug# here>
+# Ignore: yes
+# Other text below here.
--- linux-mvl-dove-2.6.32.orig/debian/commit-templates/config-updates
+++ linux-mvl-dove-2.6.32/debian/commit-templates/config-updates
@@ -0,0 +1,15 @@
+#
+# This template is used for commit messages that don't need to
+# show up in debian/changelog. Administrative stuff like config
+# updates, ABI bumps, etc. Setting 'Ignore: yes' prevents
+# 'debian/rules insertchanges' from inserting this commit meesage
+# as a changelog entry.
+#
+# Please give a one-line description of the config change followed
+# by a detailed explanation if necessary
+
+UBUNTU: [Config] XXXX
+
+# BugLink: http://bugs.launchpad.net/bugs/<enter bug# here>
+# Ignore: yes
+# Other text below here.
--- linux-mvl-dove-2.6.32.orig/debian/commit-templates/missing-modules
+++ linux-mvl-dove-2.6.32/debian/commit-templates/missing-modules
@@ -0,0 +1,3 @@
+UBUNTU: build/modules: Add modules that have intentionally gone missing
+
+Ignore: yes
--- linux-mvl-dove-2.6.32.orig/debian/rules.d/2-binary-arch.mk
+++ linux-mvl-dove-2.6.32/debian/rules.d/2-binary-arch.mk
@@ -0,0 +1,392 @@
+# We don't want make removing intermediary stamps
+.SECONDARY :
+
+# Prepare the out-of-tree build directory
+ifeq ($(do_full_source),true)
+build_cd = cd $(builddir)/build-$*; #
+build_O  =
+else
+build_cd =
+build_O  = O=$(builddir)/build-$*
+endif
+
+prepare-%: $(stampdir)/stamp-prepare-%
+	@# Empty for make to be happy
+$(stampdir)/stamp-prepare-%: $(stampdir)/stamp-prepare-tree-% prepare-checks-%
+	@touch $@
+$(stampdir)/stamp-prepare-tree-%: target_flavour = $*
+$(stampdir)/stamp-prepare-tree-%: $(commonconfdir)/config.common.$(family) $(archconfdir)/config.common.$(arch) $(archconfdir)/config.flavour.%
+	@echo "Preparing $*..."
+	install -d $(builddir)/build-$*
+	touch $(builddir)/build-$*/ubuntu-build
+	[ "$(do_full_source)" != 'true' ] && true || \
+		rsync -a --exclude debian --exclude debian.master --exclude $(DEBIAN) * $(builddir)/build-$*
+	cat $^ | sed -e 's/.*CONFIG_VERSION_SIGNATURE.*/CONFIG_VERSION_SIGNATURE="Ubuntu $(release)-$(revision)-$* $(release)$(extraversion)"/' > $(builddir)/build-$*/.config
+	find $(builddir)/build-$* -name "*.ko" | xargs rm -f
+	$(build_cd) $(kmake) $(build_O) silentoldconfig prepare scripts
+	touch $@
+
+# Do the actual build, including image and modules
+build-%: $(stampdir)/stamp-build-%
+	@# Empty for make to be happy
+$(stampdir)/stamp-build-%: target_flavour = $*
+$(stampdir)/stamp-build-%: prepare-%
+	@echo "Building $*..."
+	$(build_cd) $(kmake) $(build_O) $(conc_level) $(build_image)
+	$(build_cd) $(kmake) $(build_O) $(conc_level) modules
+	@touch $@
+
+# Install the finished build
+install-%: pkgdir = $(CURDIR)/debian/$(bin_pkg_name)-$*
+install-%: bindoc = $(pkgdir)/usr/share/doc/$(bin_pkg_name)-$*
+install-%: dbgpkgdir = $(CURDIR)/debian/$(bin_pkg_name)-$*-dbgsym
+install-%: basepkg = $(hdrs_pkg_name)
+install-%: hdrdir = $(CURDIR)/debian/$(basepkg)-$*/usr/src/$(basepkg)-$*
+install-%: target_flavour = $*
+install-%: $(stampdir)/stamp-build-% checks-%
+	dh_testdir
+	dh_testroot
+	dh_clean -k -p$(bin_pkg_name)-$*
+	dh_clean -k -p$(hdrs_pkg_name)-$*
+	dh_clean -k -p$(dbg_pkg_name)-$*
+
+	# The main image
+	# compress_file logic required because not all architectures
+	# generate a zImage automatically out of the box
+ifeq ($(compress_file),)
+	install -m644 -D $(builddir)/build-$*/$(kernel_file) \
+		$(pkgdir)/boot/$(install_file)-$(abi_release)-$*
+else
+	install -d $(pkgdir)/boot
+	gzip -c9v $(builddir)/build-$*/$(kernel_file) > \
+		$(pkgdir)/boot/$(install_file)-$(abi_release)-$*
+	chmod 644 $(pkgdir)/boot/$(install_file)-$(abi_release)-$*
+endif
+
+	install -m644 $(builddir)/build-$*/.config \
+		$(pkgdir)/boot/config-$(abi_release)-$*
+	install -m644 $(abidir)/$* \
+		$(pkgdir)/boot/abi-$(abi_release)-$*
+	install -m644 $(builddir)/build-$*/System.map \
+		$(pkgdir)/boot/System.map-$(abi_release)-$*
+ifeq ($(no_dumpfile),)
+	makedumpfile -g $(pkgdir)/boot/vmcoreinfo-$(abi_release)-$* \
+		-x $(builddir)/build-$*/vmlinux
+endif
+
+	$(build_cd) $(kmake) $(build_O) modules_install \
+		INSTALL_MOD_STRIP=1 INSTALL_MOD_PATH=$(pkgdir)/ \
+		INSTALL_FW_PATH=$(pkgdir)/lib/firmware/$(abi_release)-$*
+
+	#
+	# Remove all modules not in the inclusion list.
+	#
+	if [ -f $(DEBIAN)/control.d/$(target_flavour).inclusion-list ] ; then \
+		$(DROOT)/scripts/module-inclusion $(pkgdir)/lib/modules/$(abi_release)-$*/kernel \
+			$(DEBIAN)/control.d/$(target_flavour).inclusion-list 2>&1 | \
+				tee $(target_flavour).inclusion-list.log; \
+		/sbin/depmod -b $(pkgdir) -ea -F $(pkgdir)/boot/System.map-$(abi_release)-$* \
+			$(abi_release)-$* 2>&1 |tee $(target_flavour).depmod.log; \
+	fi
+
+ifeq ($(no_dumpfile),)
+	makedumpfile -g $(pkgdir)/boot/vmcoreinfo-$(abi_release)-$* \
+		-x $(builddir)/build-$*/vmlinux
+endif
+	rm -f $(pkgdir)/lib/modules/$(abi_release)-$*/build
+	rm -f $(pkgdir)/lib/modules/$(abi_release)-$*/source
+
+	# Some initramfs-tools specific modules
+	install -d $(pkgdir)/lib/modules/$(abi_release)-$*/initrd
+	if [ -f $(pkgdir)/lib/modules/$(abi_release)-$*/kernel/drivers/video/vesafb.ko ]; then\
+	  ln -f $(pkgdir)/lib/modules/$(abi_release)-$*/kernel/drivers/video/vesafb.ko \
+		$(pkgdir)/lib/modules/$(abi_release)-$*/initrd/; \
+	fi
+
+	# Now the image scripts
+	install -d $(pkgdir)/DEBIAN
+	for script in postinst postrm preinst prerm; do				\
+	  sed -e 's/=V/$(abi_release)-$*/g' -e 's/=K/$(install_file)/g'		\
+	      -e 's/=L/$(loader)/g'         -e 's@=B@$(build_arch)@g'		\
+	       $(DROOT)/control-scripts/$$script > $(pkgdir)/DEBIAN/$$script;	\
+	  chmod 755 $(pkgdir)/DEBIAN/$$script;					\
+	done
+
+	# Install the full changelog.
+ifeq ($(do_doc_package),true)
+	install -d $(bindoc)
+	cat $(DEBIAN)/changelog $(DEBIAN)/changelog.historical | \
+		gzip -9 >$(bindoc)/changelog.Debian.old.gz
+	chmod 644 $(bindoc)/changelog.Debian.old.gz
+endif
+
+ifneq ($(skipsub),true)
+	for sub in $($(*)_sub); do					\
+		if ! (TO=$$sub FROM=$* ABI_RELEASE=$(abi_release) $(SHELL)		\
+			$(DROOT)/scripts/sub-flavour); then exit 1; fi;		\
+		/sbin/depmod -b debian/$(bin_pkg_name)-$$sub		\
+			-ea -F debian/$(bin_pkg_name)-$$sub/boot/System.map-$(abi_release)-$* \
+			$(abi_release)-$*;					\
+		install -d debian/$(bin_pkg_name)-$$sub/DEBIAN;	\
+		for script in postinst postrm preinst prerm; do			\
+			sed -e 's/=V/$(abi_release)-$*/g'			\
+			    -e 's/=K/$(install_file)/g'				\
+			    -e 's/=L/$(loader)/g'				\
+			    -e 's@=B@$(build_arch)@g'				\
+				$(DROOT)/control-scripts/$$script >		\
+				debian/$(bin_pkg_name)-$$sub/DEBIAN/$$script;\
+			chmod 755  debian/$(bin_pkg_name)-$$sub/DEBIAN/$$script;\
+		done;								\
+	done
+endif
+
+ifneq ($(skipdbg),true)
+	# Debug image is simple
+	install -m644 -D $(builddir)/build-$*/vmlinux \
+		$(dbgpkgdir)/usr/lib/debug/boot/vmlinux-$(abi_release)-$*
+	$(build_cd) $(kmake) $(build_O) modules_install \
+		INSTALL_MOD_PATH=$(dbgpkgdir)/usr/lib/debug
+	rm -f $(dbgpkgdir)/usr/lib/debug/lib/modules/$(abi_release)-$*/build
+	rm -f $(dbgpkgdir)/usr/lib/debug/lib/modules/$(abi_release)-$*/source
+	rm -f $(dbgpkgdir)/usr/lib/debug/lib/modules/$(abi_release)-$*/modules.*
+	rm -fr $(dbgpkgdir)/usr/lib/debug/lib/firmware
+endif
+
+	# The flavour specific headers image
+	# TODO: Would be nice if we didn't have to dupe the original builddir
+	install -d -m755 $(hdrdir)
+	cat $(builddir)/build-$*/.config | \
+		sed -e 's/.*CONFIG_DEBUG_INFO=.*/# CONFIG_DEBUG_INFO is not set/g' > \
+		$(hdrdir)/.config
+	chmod 644 $(hdrdir)/.config
+	$(kmake) O=$(hdrdir) silentoldconfig prepare scripts
+	# We'll symlink this stuff
+	rm -f $(hdrdir)/Makefile
+	rm -rf $(hdrdir)/include2
+	# powerpc seems to need some .o files for external module linking. Add them in.
+ifeq ($(arch),powerpc)
+	mkdir -p $(hdrdir)/arch/powerpc/lib
+	cp $(builddir)/build-$*/arch/powerpc/lib/*.o $(hdrdir)/arch/powerpc/lib
+endif
+	# Script to symlink everything up
+	$(SHELL) $(DROOT)/scripts/link-headers "$(hdrdir)" "$(basepkg)" "$*"
+	# Setup the proper asm symlink
+	rm -f $(hdrdir)/include/asm
+	ln -s asm-$(asm_link) $(hdrdir)/include/asm
+	# The build symlink
+	install -d debian/$(basepkg)-$*/lib/modules/$(abi_release)-$*
+	ln -s /usr/src/$(basepkg)-$* \
+		debian/$(basepkg)-$*/lib/modules/$(abi_release)-$*/build
+	# And finally the symvers
+	install -m644 $(builddir)/build-$*/Module.symvers \
+		$(hdrdir)/Module.symvers
+
+	# Now the header scripts
+	install -d $(CURDIR)/debian/$(basepkg)-$*/DEBIAN
+	for script in postinst; do						\
+	  sed -e 's/=V/$(abi_release)-$*/g' -e 's/=K/$(install_file)/g'	\
+		$(DROOT)/control-scripts/headers-$$script > 			\
+			$(CURDIR)/debian/$(basepkg)-$*/DEBIAN/$$script;		\
+	  chmod 755 $(CURDIR)/debian/$(basepkg)-$*/DEBIAN/$$script;		\
+	done
+
+	# At the end of the package prep, call the tests
+	DPKG_ARCH="$(arch)" KERN_ARCH="$(build_arch)" FLAVOUR="$*"	\
+	 VERSION="$(abi_release)" REVISION="$(revision)"		\
+	 PREV_REVISION="$(prev_revision)" ABI_NUM="$(abinum)"		\
+	 PREV_ABI_NUM="$(prev_abinum)" BUILD_DIR="$(builddir)/build-$*"	\
+	 INSTALL_DIR="$(pkgdir)" SOURCE_DIR="$(CURDIR)"			\
+	 run-parts -v $(DROOT)/tests
+
+	#
+	# Remove files which are generated at installation by postinst,
+	# except for modules.order and modules.builtin
+	#
+	mkdir $(pkgdir)/lib/modules/$(abi_release)-$*/_
+	mv $(pkgdir)/lib/modules/$(abi_release)-$*/modules.order \
+		$(pkgdir)/lib/modules/$(abi_release)-$*/_
+	if [ -f $(pkgdir)/lib/modules/$(abi_release)-$*/modules.builtin ] ; then \
+	    mv $(pkgdir)/lib/modules/$(abi_release)-$*/modules.builtin \
+		$(pkgdir)/lib/modules/$(abi_release)-$*/_; \
+	fi
+	rm -f $(pkgdir)/lib/modules/$(abi_release)-$*/modules.*
+	mv $(pkgdir)/lib/modules/$(abi_release)-$*/_/* \
+		$(pkgdir)/lib/modules/$(abi_release)-$*
+	rmdir $(pkgdir)/lib/modules/$(abi_release)-$*/_
+
+headers_tmp := $(CURDIR)/debian/tmp-headers
+headers_dir := $(CURDIR)/debian/linux-libc-dev
+
+hmake := $(MAKE) -C $(CURDIR) O=$(headers_tmp) SUBLEVEL=$(SUBLEVEL) \
+	EXTRAVERSION=-$(abinum) INSTALL_HDR_PATH=$(headers_tmp)/install \
+	SHELL="$(SHELL)" ARCH=$(header_arch)
+
+install-arch-headers:
+	dh_testdir
+	dh_testroot
+	dh_clean -k -plinux-libc-dev
+
+	rm -rf $(headers_tmp)
+	install -d $(headers_tmp) $(headers_dir)/usr/include/
+
+	$(hmake) $(defconfig)
+	mv $(headers_tmp)/.config $(headers_tmp)/.config.old
+	sed -e 's/^# \(CONFIG_MODVERSIONS\) is not set$$/\1=y/' \
+	  -e 's/.*CONFIG_LOCALVERSION_AUTO.*/# CONFIG_LOCALVERSION_AUTO is not set/' \
+	  $(headers_tmp)/.config.old > $(headers_tmp)/.config
+	$(hmake) silentoldconfig
+	$(hmake) headers_install
+
+	( cd $(headers_tmp)/install/include/ && \
+		find . -name '.' -o -name '.*' -prune -o -print | \
+                cpio -pvd --preserve-modification-time \
+			$(headers_dir)/usr/include/ )
+
+	rm -rf $(headers_tmp)
+
+binary-arch-headers: install-arch-headers
+	dh_testdir
+	dh_testroot
+ifeq ($(do_libc_dev_package),true)
+	dh_installchangelogs -plinux-libc-dev
+	dh_installdocs -plinux-libc-dev
+	dh_compress -plinux-libc-dev
+	dh_fixperms -plinux-libc-dev
+	dh_installdeb -plinux-libc-dev
+	dh_gencontrol -plinux-libc-dev
+	dh_md5sums -plinux-libc-dev
+	dh_builddeb -plinux-libc-dev
+endif
+
+binary-%: pkgimg = $(bin_pkg_name)-$*
+binary-%: pkghdr = $(hdrs_pkg_name)-$*
+binary-%: dbgpkg = $(bin_pkg_name)-$*-dbgsym
+binary-%: install-%
+	dh_testdir
+	dh_testroot
+
+	dh_installchangelogs -p$(pkgimg)
+	dh_installdocs -p$(pkgimg)
+	dh_compress -p$(pkgimg)
+	dh_fixperms -p$(pkgimg)
+	dh_installdeb -p$(pkgimg)
+	dh_shlibdeps -p$(pkgimg)
+	dh_gencontrol -p$(pkgimg)
+	dh_md5sums -p$(pkgimg)
+	dh_builddeb -p$(pkgimg) -- -Zbzip2 -z9
+
+	dh_installchangelogs -p$(pkghdr)
+	dh_installdocs -p$(pkghdr)
+	dh_compress -p$(pkghdr)
+	dh_fixperms -p$(pkghdr)
+	dh_shlibdeps -p$(pkghdr)
+	dh_installdeb -p$(pkghdr)
+	dh_gencontrol -p$(pkghdr)
+	dh_md5sums -p$(pkghdr)
+	dh_builddeb -p$(pkghdr)
+
+ifneq ($(skipsub),true)
+	@set -e; for sub in $($(*)_sub); do		\
+		pkg=$(bin_pkg_name)-$$sub;	\
+		dh_installchangelogs -p$$pkg;		\
+		dh_installdocs -p$$pkg;			\
+		dh_compress -p$$pkg;			\
+		dh_fixperms -p$$pkg;			\
+		dh_shlibdeps -p$$pkg;			\
+		dh_installdeb -p$$pkg;			\
+		dh_gencontrol -p$$pkg;			\
+		dh_md5sums -p$$pkg;			\
+		dh_builddeb -p$$pkg;			\
+	done
+endif
+
+ifneq ($(skipdbg),true)
+	dh_installchangelogs -p$(dbgpkg)
+	dh_installdocs -p$(dbgpkg)
+	dh_compress -p$(dbgpkg)
+	dh_fixperms -p$(dbgpkg)
+	dh_installdeb -p$(dbgpkg)
+	dh_gencontrol -p$(dbgpkg)
+	dh_md5sums -p$(dbgpkg)
+	dh_builddeb -p$(dbgpkg)
+
+	# Hokay...here's where we do a little twiddling...
+	# Renaming the debug package prevents it from getting into
+	# the primary archive, and therefore prevents this very large
+	# package from being mirrored. It is instead, through some
+	# archive admin hackery, copied to http://ddebs.ubuntu.com.
+	#
+	mv ../$(dbgpkg)_$(release)-$(revision)_$(arch).deb \
+		../$(dbgpkg)_$(release)-$(revision)_$(arch).ddeb
+	set -e; \
+	if grep -qs '^Build-Debug-Symbols: yes$$' /CurrentlyBuilding; then \
+		sed -i '/^$(dbgpkg)_/s/\.deb /.ddeb /' debian/files; \
+	else \
+		grep -v '^$(dbgpkg)_.*$$' debian/files > debian/files.new; \
+		mv debian/files.new debian/files; \
+	fi
+	# Now, the package wont get into the archive, but it will get put
+	# into the debug system.
+endif
+
+$(stampdir)/stamp-flavours:
+	@echo $(flavours) > $@
+
+#
+# per-architecture packages
+#
+$(stampdir)/stamp-prepare-perarch:
+	@echo "Preparing perarch ..."
+ifeq ($(do_tools),true)
+	install -d $(builddir)/tools-$*
+	for i in *; do ln -s $(CURDIR)/$$i $(builddir)/tools-$*/; done
+	rm $(builddir)/tools-$*/tools
+	rsync -a tools/ $(builddir)/tools-$*/tools/
+endif
+	touch $@
+
+$(stampdir)/stamp-build-perarch: prepare-perarch
+ifeq ($(do_tools),true)
+	cd $(builddir)/tools-$*/tools/perf && make $(CROSS_COMPILE)
+endif
+	@touch $@
+
+install-perarch: toolspkgdir = $(CURDIR)/debian/$(tools_pkg_name)
+install-perarch: $(stampdir)/stamp-build-perarch
+	# Add the tools.
+ifeq ($(do_tools),true)
+	install -d $(toolspkgdir)/usr/bin
+	install -s -m755 $(builddir)/tools-$*/tools/perf/perf \
+		$(toolspkgdir)/usr/bin/perf_$(abi_release)
+endif
+
+binary-perarch: toolspkg = $(tools_pkg_name)
+binary-perarch: install-perarch
+	@# Empty for make to be happy
+ifeq ($(do_tools),true)
+	dh_installchangelogs -p$(toolspkg)
+	dh_installdocs -p$(toolspkg)
+	dh_compress -p$(toolspkg)
+	dh_fixperms -p$(toolspkg)
+	dh_shlibdeps -p$(toolspkg)
+	dh_installdeb -p$(toolspkg)
+	dh_gencontrol -p$(toolspkg)
+	dh_md5sums -p$(toolspkg)
+	dh_builddeb -p$(toolspkg)
+endif
+
+binary-debs: binary-perarch $(stampdir)/stamp-flavours $(addprefix binary-,$(flavours))
+
+build-arch:  $(addprefix build-,$(flavours))
+
+binary-arch-deps = binary-debs
+ifeq ($(AUTOBUILD),)
+binary-arch-deps += binary-udebs
+endif
+ifeq ($(do_libc_dev_package),true)
+binary-arch-deps += binary-arch-headers
+endif
+ifneq ($(do_common_headers_indep),true)
+binary-arch-deps += binary-headers
+endif
+binary-arch: $(binary-arch-deps)
--- linux-mvl-dove-2.6.32.orig/debian/rules.d/0-common-vars.mk
+++ linux-mvl-dove-2.6.32/debian/rules.d/0-common-vars.mk
@@ -0,0 +1,209 @@
+#
+# The source package name will be the first token from $(DEBIAN)/changelog
+#
+src_pkg_name=$(shell sed -n '1s/^\(.*\) (.*).*$$/\1/p' $(DEBIAN)/changelog)
+
+# Get some version info
+series := lucid
+release := $(shell sed -n '1s/^$(src_pkg_name).*(\(.*\)-.*).*$$/\1/p' $(DEBIAN)/changelog)
+revisions := $(shell sed -n 's/^$(src_pkg_name)\ .*($(release)-\(.*\)).*$$/\1/p' $(DEBIAN)/changelog | tac)
+revision ?= $(word $(words $(revisions)),$(revisions))
+prev_revisions := $(filter-out $(revision),0.0 $(revisions))
+prev_revision := $(word $(words $(prev_revisions)),$(prev_revisions))
+
+family=ubuntu
+
+# This is an internally used mechanism for the daily kernel builds. It
+# creates packages whose ABI is suffixed with a minimal representation of
+# the current git HEAD sha. If .git/HEAD is not present, then it uses the
+# uuidgen program,
+#
+# AUTOBUILD can also be used by anyone wanting to build a custom kernel
+# image, or rebuild the entire set of Ubuntu packages using custom patches
+# or configs.
+AUTOBUILD=
+
+#
+# This is a way to support some external variables. A good example is
+# a local setup for ccache and distcc See LOCAL_ENV_CC and
+# LOCAL_ENV_DISTCC_HOSTS in the definition of kmake.
+# For example:
+#      LOCAL_ENV_CC="ccache distcc"
+#      LOCAL_ENV_DISTCC_HOSTS="localhost 10.0.2.5 10.0.2.221"
+#
+-include $(CURDIR)/../.$(series)-env
+
+ifneq ($(AUTOBUILD),)
+skipabi		= true
+skipmodule	= true
+skipdbg		= true
+gitver=$(shell if test -f .git/HEAD; then cat .git/HEAD; else uuidgen; fi)
+gitverpre=$(shell echo $(gitver) | cut -b -3)
+gitverpost=$(shell echo $(gitver) | cut -b 38-40)
+abi_suffix = -$(gitverpre)$(gitverpost)
+endif
+
+ifneq ($(NOKERNLOG),)
+ubuntu_log_opts += --no-kern-log
+endif
+ifneq ($(PRINTSHAS),)
+ubuntu_log_opts += --print-shas
+endif
+
+# Get the kernels own extra version to be added to the release signature.
+extraversion=$(shell awk '/EXTRAVERSION =/ { print $$3 }' <Makefile)
+
+#
+# full_build -- are we doing a full buildd style build
+#
+ifeq ($(wildcard /CurrentlyBuilding),)
+full_build?=false
+else
+full_build?=true
+endif
+
+#
+# The debug packages are ginormous, so you probably want to skip
+# building them (as a developer).
+#
+ifeq ($(full_build),false)
+skipdbg=true
+endif
+
+abinum		:= $(shell echo $(revision) | sed -e 's/\..*//')$(abi_suffix)
+prev_abinum	:= $(shell echo $(prev_revision) | sed -e 's/\..*//')$(abi_suffix)
+abi_release	:= $(release)-$(abinum)
+
+uploadnum	:= $(shell echo $(revision) | sed -e 's/.*\.//')
+ifneq ($(full_build),false)
+  uploadnum	:= $(uploadnum)-Ubuntu
+endif
+
+# We force the sublevel to be exactly what we want. The actual source may
+# be an in development git tree. We want to force it here instead of
+# committing changes to the top level Makefile
+SUBLEVEL	:= $(shell echo $(release) | awk -F. '{print $$3}')
+
+DEB_HOST_GNU_TYPE  = $(shell dpkg-architecture -qDEB_HOST_GNU_TYPE)
+DEB_BUILD_GNU_TYPE = $(shell dpkg-architecture -qDEB_BUILD_GNU_TYPE)
+DEB_HOST_ARCH = $(shell dpkg-architecture -qDEB_HOST_ARCH)
+DEB_BUILD_ARCH = $(shell dpkg-architecture -qDEB_BUILD_ARCH)
+
+#
+# Detect invocations of the form 'fakeroot debian/rules binary arch=armel'
+# within an x86'en schroot. This only gets you part of the way sicne the
+# packaging phase fails, but you can at least compile the kernel quickly.
+#
+arch := $(DEB_HOST_ARCH)
+ifneq ($(arch),$(DEB_HOST_ARCH))
+	ifeq ($(arch),armel)
+		CROSS_COMPILE ?= arm-linux-gnueabi-
+	endif
+endif
+
+#
+# Detect invocations of the form 'dpk-buildpackage -B -aarmel' within
+# an x86'en schroot. This is the only way to build all of the packages
+# (except for tools).
+#
+ifneq ($(DEB_BUILD_GNU_TYPE),$(DEB_HOST_GNU_TYPE))
+	CROSS_COMPILE ?= $(DEB_HOST_GNU_TYPE)-
+endif
+
+abidir		:= $(CURDIR)/$(DEBIAN)/abi/$(release)-$(revision)/$(arch)
+prev_abidir	:= $(CURDIR)/$(DEBIAN)/abi/$(release)-$(prev_revision)/$(arch)
+commonconfdir	:= $(CURDIR)/$(DEBIAN)/config
+archconfdir	:= $(CURDIR)/$(DEBIAN)/config/$(arch)
+sharedconfdir	:= $(CURDIR)/debian.master/config
+builddir	:= $(CURDIR)/debian/build
+stampdir	:= $(CURDIR)/debian/stamps
+
+#
+# The binary package name always starts with linux-image-$KVER-$ABI.$UPLOAD_NUM. There
+# are places that you'll find linux-image hard coded, but I guess thats OK since the
+# assumption that the binary package always starts with linux-image will never change.
+#
+bin_pkg_name=linux-image-$(abi_release)
+hdrs_pkg_name=linux-headers-$(abi_release)
+#
+# The generation of content in the doc package depends on both 'AUTOBUILD=' and
+# 'do_doc_package_content=true'. There are usually build errors during the development
+# cycle, so its OK to leave 'do_doc_package_content=false' until those build
+# failures get sorted out. Finally, the doc package doesn't really need to be built
+# for developer testing (its kind of slow), so only do it if on a buildd.
+do_doc_package=true
+do_doc_package_content=true
+ifeq ($(full_build),false)
+do_doc_package_content=false
+endif
+doc_pkg_name=$(src_pkg_name)-doc
+
+#
+# Similarly with the linux-source package, you need not build it as a developer. Its
+# somewhat I/O intensive and utterly useless.
+#
+do_source_package=true
+do_source_package_content=true
+ifeq ($(full_build),false)
+do_source_package_content=false
+endif
+
+# linux-libc-dev may not be needed, default to building it.
+do_libc_dev_package=true
+
+# common headers normally is built as an indep package, but may be arch
+do_common_headers_indep=true
+
+# add a 'full source' mode
+do_full_source=false
+
+# build tools
+ifneq ($(wildcard $(CURDIR)/tools),)
+do_tools?=true
+else
+do_tools?=false
+endif
+tools_pkg_name=$(src_pkg_name)-tools-$(abi_release)
+tools_common_pkg_name=$(src_pkg_name)-tools-common
+
+# Support parallel=<n> in DEB_BUILD_OPTIONS (see #209008)
+#
+# These 2 environment variables set the -j value of the kernel build. For example,
+# CONCURRENCY_LEVEL=16 fakeroot $(DEBIAN)/rules binary-debs
+# or
+# DEB_BUILD_OPTIONS=parallel=16 fakeroot $(DEBIAN)/rules binary-debs
+#
+# The default is to use the number of CPUs.
+#
+COMMA=,
+DEB_BUILD_OPTIONS_PARA = $(subst parallel=,,$(filter parallel=%,$(subst $(COMMA), ,$(DEB_BUILD_OPTIONS))))
+ifneq (,$(DEB_BUILD_OPTIONS_PARA))
+  CONCURRENCY_LEVEL := $(DEB_BUILD_OPTIONS_PARA)
+endif
+
+ifeq ($(CONCURRENCY_LEVEL),)
+  # Check the environment
+  CONCURRENCY_LEVEL := $(shell echo $$CONCURRENCY_LEVEL)
+  # No? Then build with the number of CPUs on the host.
+  ifeq ($(CONCURRENCY_LEVEL),)
+      CONCURRENCY_LEVEL := $(shell expr `getconf _NPROCESSORS_ONLN` \* 1)
+  endif
+  # Oh hell, give 'em one
+  ifeq ($(CONCURRENCY_LEVEL),)
+    CONCURRENCY_LEVEL := 1
+  endif
+endif
+
+conc_level		= -j$(CONCURRENCY_LEVEL)
+
+# target_flavour is filled in for each step
+kmake = make ARCH=$(build_arch) \
+	CROSS_COMPILE=$(CROSS_COMPILE) \
+	EXTRAVERSION=-$(abinum)-$(target_flavour) \
+	CONFIG_DEBUG_SECTION_MISMATCH=y SUBLEVEL=$(SUBLEVEL) \
+	KBUILD_BUILD_VERSION="$(uploadnum)" \
+	LOCALVERSION=
+ifneq ($(LOCAL_ENV_CC),)
+kmake += CC=$(LOCAL_ENV_CC) DISTCC_HOSTS=$(LOCAL_ENV_DISTCC_HOSTS)
+endif
+
--- linux-mvl-dove-2.6.32.orig/debian/rules.d/1-maintainer.mk
+++ linux-mvl-dove-2.6.32/debian/rules.d/1-maintainer.mk
@@ -0,0 +1,145 @@
+# The following targets are for the maintainer only! do not run if you don't
+# know what they do.
+
+.PHONY: printenv updateconfigs printchanges insertchanges startnewrelease diffupstream help updateportsconfigs editportsconfigs
+
+help:
+	@echo "These are the targets in addition to the normal $(DEBIAN) ones:"
+	@echo
+	@echo "  printenv        : Print some variables used in the build"
+	@echo
+	@echo "  updateconfigs        : Update core arch configs"
+	@echo
+	@echo "  editconfigs          : Update core arch configs interractively"
+	@echo "  genconfigs           : Generate core arch configs in CONFIGS/*"
+	@echo
+	@echo "  updateportsconfigs   : Update ports arch configs"
+	@echo
+	@echo "  editportsconfigs     : Update ports arch configs interactivly"
+	@echo "  genportconfigs       : Generate ports arch configs in CONFIGS/*"
+	@echo
+	@echo "  printchanges    : Print the current changelog entries (from git)"
+	@echo
+	@echo "  insertchanges   : Insert current changelog entries (from git)"
+	@echo
+	@echo "  startnewrelease : Start a new changelog set"
+	@echo
+	@echo "  diffupstream    : Diff stock kernel code against upstream (git)"
+	@echo
+	@echo "  help            : If you are kernel hacking, you need the professional"
+	@echo "                    version of this"
+	@echo
+	@echo "Environment variables:"
+	@echo
+	@echo "  NOKERNLOG       : Do not add upstream kernel commits to changelog"
+	@echo "  CONCURRENCY_LEVEL=X"
+	@echo "                  : Use -jX for kernel compile"
+	@echo "  PRINTSHAS       : Include SHAs for commits in changelog"
+
+printdebian:
+	@echo "$(DEBIAN)"
+
+updateconfigs:
+	dh_testdir;
+	$(SHELL) $(DROOT)/scripts/misc/kernelconfig oldconfig
+	rm -rf build
+
+defaultconfigs:
+	dh_testdir;
+	yes "" | $(SHELL) $(DROOT)/scripts/misc/kernelconfig defaultconfig
+	rm -rf build
+
+editconfigs:
+	dh_testdir
+	$(SHELL) $(DROOT)/scripts/misc/kernelconfig editconfig
+	rm -rf build
+
+genconfigs:
+	dh_testdir
+	$(SHELL) $(DROOT)/scripts/misc/kernelconfig genconfig
+	rm -rf build
+
+updateportsconfigs:
+	dh_testdir;
+	$(SHELL) $(DROOT)/scripts/misc/kernelconfig oldconfig ports
+	rm -rf build
+
+editportsconfigs:
+	dh_testdir
+	$(SHELL) $(DROOT)/scripts/misc/kernelconfig editconfig ports
+	rm -rf build
+
+genportsconfigs:
+	dh_testdir
+	$(SHELL) $(DROOT)/scripts/misc/kernelconfig genconfig ports
+	rm -rf build
+
+printenv:
+	dh_testdir
+	@echo "src package name  = $(src_pkg_name)"
+	@echo "release           = $(release)"
+	@echo "revisions         = $(revisions)"
+	@echo "revision          = $(revision)"
+	@echo "uploadnum         = $(uploadnum)"
+	@echo "prev_revisions    = $(prev_revisions)"
+	@echo "prev_revision     = $(prev_revision)"
+	@echo "abinum            = $(abinum)"
+	@echo "gitver            = $(gitver)"
+	@echo "flavours          = $(flavours)"
+	@echo "skipabi           = $(skipabi)"
+	@echo "skipmodule        = $(skipmodule)"
+	@echo "skipdbg           = $(skipdbg)"
+	@echo "ubuntu_log_opts   = $(ubuntu_log_opts)"
+ifneq ($(SUBLEVEL),)
+	@echo "SUBLEVEL          = $(SUBLEVEL)"
+endif
+	@echo "CONCURRENCY_LEVEL = $(CONCURRENCY_LEVEL)"
+	@echo "bin package name  = $(bin_pkg_name)"
+	@echo "hdr package name  = $(hdrs_pkg_name)"
+	@echo "doc package name  = $(doc_pkg_name)"
+	@echo "do_doc_package            = $(do_doc_package)"
+	@echo "do_doc_package_content    = $(do_doc_package_content)"
+	@echo "do_source_package         = $(do_source_package)"
+	@echo "do_source_package_content = $(do_source_package_content)"
+	@echo "do_libc_dev_package       = $(do_libc_dev_package)"
+	@echo "do_common_headers_indep   = $(do_common_headers_indep)"
+	@echo "do_full_source            = $(do_full_source)"
+	@echo "do_tools                  = $(do_tools)"
+	@echo "full_build                = $(full_build)"
+	@echo "libc_dev_version		 = $(libc_dev_version)"
+	@echo "DEB_HOST_GNU_TYPE         = $(DEB_HOST_GNU_TYPE)"
+	@echo "DEB_BUILD_GNU_TYPE        = $(DEB_BUILD_GNU_TYPE)"
+	@echo "DEB_HOST_ARCH             = $(DEB_HOST_ARCH)"
+	@echo "DEB_BUILD_ARCH            = $(DEB_BUILD_ARCH)"
+	@echo "arch                      = $(arch)"
+	@echo "kmake                     = $(kmake)"
+
+printchanges:
+	@baseCommit=$$(git log --pretty=format:'%H %s' | \
+		awk '/UBUNTU: '".*Ubuntu-$(release)-$(prev_revision)"'$$/ { print $$1; exit }'); \
+		git log "$$baseCommit"..HEAD | \
+		perl -w -f $(DROOT)/scripts/misc/git-ubuntu-log $(ubuntu_log_opts)
+
+insertchanges:
+	@perl -w -f $(DROOT)/scripts/misc/insert-changes.pl $(DROOT) $(DEBIAN) 
+
+diffupstream:
+	@git diff-tree -p refs/remotes/linux-2.6/master..HEAD $(shell ls | grep -vE '^(ubuntu|$(DEBIAN)|\.git.*)')
+
+startnewrelease:
+	dh_testdir
+	@nextminor=$(shell expr `echo $(revision) | awk -F. '{print $$2}'` + 1); \
+	now="$(shell date -R)"; \
+	echo "Creating new changelog set for $(abi_release).$$nextminor..."; \
+	echo -e "$(src_pkg_name) ($(abi_release).$$nextminor) UNRELEASED; urgency=low\n" > $(DEBIAN)/changelog.new; \
+	echo "  CHANGELOG: Do not edit directly. Autogenerated at release." >> \
+		$(DEBIAN)/changelog.new; \
+	echo "  CHANGELOG: Use the printchanges target to see the curent changes." \
+		>> $(DEBIAN)/changelog.new; \
+	echo "  CHANGELOG: Use the insertchanges target to create the final log." \
+		>> $(DEBIAN)/changelog.new; \
+	echo -e "\n -- $$DEBFULLNAME <$$DEBEMAIL>  $$now\n" >> \
+		$(DEBIAN)/changelog.new ; \
+	cat $(DEBIAN)/changelog >> $(DEBIAN)/changelog.new; \
+	mv $(DEBIAN)/changelog.new $(DEBIAN)/changelog
+
--- linux-mvl-dove-2.6.32.orig/debian/rules.d/5-udebs.mk
+++ linux-mvl-dove-2.6.32/debian/rules.d/5-udebs.mk
@@ -0,0 +1,38 @@
+# Do udebs if not disabled in the arch-specific makefile
+binary-udebs: binary-debs debian/control
+ifeq ($(disable_d_i),)
+	@$(MAKE) --no-print-directory -f $(DROOT)/rules DEBIAN=$(DEBIAN) \
+		do-binary-udebs
+endif
+
+do-binary-udebs:
+	dh_testdir
+	dh_testroot
+
+	# unpack the kernels into a temporary directory
+	mkdir -p debian/d-i-${arch}
+
+	imagelist=$$(cat $(builddir)/kernel-versions | grep ^${arch} | awk '{print $$4}') && \
+	for i in $$imagelist; do \
+	  dpkg -x $$(ls ../linux-image-$$i\_$(release)-$(revision)_${arch}.deb) \
+		debian/d-i-${arch}; \
+	  /sbin/depmod -b debian/d-i-${arch} $$i; \
+	done
+
+	# kernel-wedge will error if no modules unless this is touched
+	touch $(CURDIR)/debian/build/no-modules
+
+	touch ignore-dups
+	export SOURCEDIR=$(CURDIR)/debian/d-i-${arch} && \
+	  cd $(builddir) && \
+	  kernel-wedge install-files && \
+	  kernel-wedge check
+
+        # Build just the udebs
+	dilist=$$(dh_listpackages -s | grep "\-di$$") && \
+	[ -z "$dilist" ] || \
+	for i in $$dilist; do \
+	  dh_fixperms -p$$i; \
+	  dh_gencontrol -p$$i; \
+	  dh_builddeb -p$$i; \
+	done
--- linux-mvl-dove-2.6.32.orig/debian/rules.d/3-binary-indep.mk
+++ linux-mvl-dove-2.6.32/debian/rules.d/3-binary-indep.mk
@@ -0,0 +1,127 @@
+build-indep:
+
+docpkg = $(doc_pkg_name)
+docdir = $(CURDIR)/debian/$(docpkg)/usr/share/doc/$(docpkg)
+install-doc:
+	dh_testdir
+	dh_testroot
+	dh_clean -k -p$(docpkg)
+
+	install -d $(docdir)
+ifeq ($(do_doc_package_content),true)
+	# First the html docs. We skip these for autobuilds
+	if [ -z "$(AUTOBUILD)" ]; then \
+		install -d $(docdir)/$(doc_pkg_name)-tmp; \
+		$(kmake) O=$(docdir)/$(doc_pkg_name)-tmp htmldocs; \
+		mv $(docdir)/$(doc_pkg_name)-tmp/Documentation/DocBook \
+			$(docdir)/html; \
+		rm -rf $(docdir)/$(doc_pkg_name)-tmp; \
+	fi
+endif
+	# Copy the rest
+	cp -a Documentation/* $(docdir)
+	rm -rf $(docdir)/DocBook
+	find $(docdir) -name .gitignore | xargs rm -f
+
+indep_hdrpkg = $(hdrs_pkg_name)
+indep_hdrdir = $(CURDIR)/debian/$(indep_hdrpkg)/usr/src/$(indep_hdrpkg)
+install-headers:
+	dh_testdir
+	dh_testroot
+	dh_clean -k -p$(indep_hdrpkg)
+
+	install -d $(indep_hdrdir)
+	find . -path './debian' -prune -o -path './$(DEBIAN)' -prune \
+	  -o -path './include/*' -prune \
+	  -o -path './scripts/*' -prune -o -type f \
+	  \( -name 'Makefile*' -o -name 'Kconfig*' -o -name 'Kbuild*' -o \
+	     -name '*.sh' -o -name '*.pl' -o -name '*.lds' \) \
+	  -print | cpio -pd --preserve-modification-time $(indep_hdrdir)
+	cp -a drivers/media/dvb/dvb-core/*.h $(indep_hdrdir)/drivers/media/dvb/dvb-core
+	cp -a drivers/media/video/*.h $(indep_hdrdir)/drivers/media/video
+	cp -a drivers/media/dvb/frontends/*.h $(indep_hdrdir)/drivers/media/dvb/frontends
+	cp -a scripts include $(indep_hdrdir)
+	(find arch -name include -type d -print | \
+		xargs -n1 -i: find : -type f) | \
+		cpio -pd --preserve-modification-time $(indep_hdrdir)
+
+srcpkg = $(src_pkg_name)-source-$(release)
+srcdir = $(CURDIR)/debian/$(srcpkg)/usr/src/$(srcpkg)
+install-source:
+	dh_testdir
+	dh_testroot
+	dh_clean -k -p$(srcpkg)
+
+	install -d $(srcdir)
+ifeq ($(do_source_package_content),true)
+	find . -path './debian' -prune -o -path './$(DEBIAN)' -prune -o \
+		-path './.*' -prune -o -print | \
+		cpio -pd --preserve-modification-time $(srcdir)
+	(cd $(srcdir)/..; tar cf - $(srcpkg)) | bzip2 -9c > \
+		$(srcdir).tar.bz2
+	rm -rf $(srcdir)
+endif
+
+install-tools: toolspkg = $(tools_common_pkg_name)
+install-tools: toolsbin = $(CURDIR)/debian/$(toolspkg)/usr/bin
+install-tools: toolsman = $(CURDIR)/debian/$(toolspkg)/usr/share/man
+install-tools:
+	dh_testdir
+	dh_testroot
+	dh_clean -k -p$(toolspkg)
+
+	install -d $(toolsbin)
+	install -d $(toolsman)/man1
+
+	install -m755 debian/tools/perf $(toolsbin)/perf
+
+	install -d $(builddir)/tools
+	for i in *; do ln -s $(CURDIR)/$$i $(builddir)/tools/; done
+	rm $(builddir)/tools/tools
+	rsync -a tools/ $(builddir)/tools/tools/
+
+	cd $(builddir)/tools/tools/perf && make man
+	install -m644 $(builddir)/tools/tools/perf/Documentation/*.1 \
+		$(toolsman)/man1
+
+install-indep-deps =
+ifeq ($(do_common_headers_indep),true)
+install-indep-deps += install-headers
+endif
+ifeq ($(do_doc_package),true)
+install-indep-deps += install-doc
+endif
+ifeq ($(do_source_package),true)
+install-indep-deps += install-source
+endif
+ifeq ($(do_tools),true)
+install-indep-deps += install-tools
+endif
+install-indep: $(install-indep-deps)
+
+# This is just to make it easy to call manually. Normally done in
+# binary-indep target during builds.
+binary-headers: install-headers
+	dh_testdir
+	dh_testroot
+	dh_installchangelogs -p$(indep_hdrpkg)
+	dh_installdocs -p$(indep_hdrpkg)
+	dh_compress -p$(indep_hdrpkg)
+	dh_fixperms -p$(indep_hdrpkg)
+	dh_installdeb -p$(indep_hdrpkg)
+	dh_gencontrol -p$(indep_hdrpkg)
+	dh_md5sums -p$(indep_hdrpkg)
+	dh_builddeb -p$(indep_hdrpkg)
+
+binary-indep: install-indep
+	dh_testdir
+	dh_testroot
+
+	dh_installchangelogs -i
+	dh_installdocs -i
+	dh_compress -i
+	dh_fixperms -i
+	dh_installdeb -i
+	dh_gencontrol -i
+	dh_md5sums -i
+	dh_builddeb -i
--- linux-mvl-dove-2.6.32.orig/debian/rules.d/4-checks.mk
+++ linux-mvl-dove-2.6.32/debian/rules.d/4-checks.mk
@@ -0,0 +1,34 @@
+# Check ABI for package against last release (if not same abinum)
+abi-%: $(abidir)/%
+	@# Empty for make to be happy
+$(abidir)/%: $(stampdir)/stamp-build-%
+	install -d $(abidir)
+	sed -e 's/^\(.\+\)[[:space:]]\+\(.\+\)[[:space:]]\(.\+\)$$/\3 \2 \1/'	\
+		$(builddir)/build-$*/Module.symvers | sort > $@
+
+abi-check-%: $(abidir)/%
+	@perl -f $(DROOT)/scripts/abi-check "$*" "$(prev_abinum)" "$(abinum)" \
+		"$(prev_abidir)" "$(abidir)" "$(skipabi)"
+
+# Check the module list against the last release (always)
+module-%: $(abidir)/%.modules
+	@# Empty for make to be happy
+$(abidir)/%.modules: $(stampdir)/stamp-build-%
+	install -d $(abidir)
+	find $(builddir)/build-$*/ -name \*.ko | \
+		sed -e 's/.*\/\([^\/]*\)\.ko/\1/' | sort > $@
+
+module-check-%: $(abidir)/%.modules
+	@perl -f $(DROOT)/scripts/module-check "$*" \
+		"$(prev_abidir)" "$(abidir)" $(skipmodule)
+
+checks-%: abi-check-% module-check-%
+	@# Will be calling more stuff later
+
+# Check the config against the known options list.
+config-prepare-check-%: $(stampdir)/stamp-prepare-tree-%
+	@perl -f $(DROOT)/scripts/config-check \
+		$(builddir)/build-$*/.config "$(arch)" "$*" "$(sharedconfdir)" "$(skipconfig)"
+
+prepare-checks-%: config-prepare-check-%
+	@# Will be calling more stuff later
--- linux-mvl-dove-2.6.32.orig/debian/control-scripts/postrm
+++ linux-mvl-dove-2.6.32/debian/control-scripts/postrm
@@ -0,0 +1,354 @@
+#! /usr/bin/perl
+#                              -*- Mode: Cperl -*- 
+# image.postrm --- 
+# Author           : Manoj Srivastava ( srivasta@glaurung.green-gryphon.com ) 
+# Created On       : Sat May 15 11:05:13 1999
+# Created On Node  : glaurung.green-gryphon.com
+# Last Modified By : Manoj Srivastava
+# Last Modified On : Wed Sep 13 11:26:19 2006
+# Last Machine Used: glaurung.internal.golden-gryphon.com
+# Update Count     : 57
+# Status           : Unknown, Use with caution!
+# HISTORY          : 
+# Description      : 
+# 
+#     $Id: image.postrm,v 1.31 2003/10/07 16:24:20 srivasta Exp $
+#
+
+
+# 
+#use strict; #for debugging
+use Cwd 'abs_path';
+
+$|=1;
+
+# Predefined values:
+my $version           = "=V";
+my $link_in_boot      = "";	# Should be empty, mostly
+my $no_symlink        = "";	# Should be empty, mostly
+my $reverse_symlink   = "";	# Should be empty, mostly
+my $do_symlink        = "Yes";	# target machine defined
+my $do_boot_enable    = "Yes";	# target machine defined
+my $do_bootfloppy     = "Yes";	# target machine defined
+my $do_bootloader     = "Yes";	# target machine defined
+my $move_image        = '';       # target machine defined
+my $kimage            = "=K";	# Should be empty, mostly
+my $loader            = "=L";     # lilo, silo, quik, palo, vmelilo, or nettrom
+my $image_dir         = "/boot";     # where the image is located
+my $clobber_modules   = '';       # target machine defined
+my $initrd            = "YES";     # initrd kernel
+my $do_initrd         = '';       # Normally, we don't
+my $warn_initrd       = 'YES';    # Normally we do
+my $use_hard_links    = '';       # hardlinks do not work across fs boundaries
+my $postinst_hook     = '';       #Normally we do not
+my $postrm_hook       = '';       #Normally we do not
+my $preinst_hook      = '';       #Normally we do not
+my $prerm_hook        = '';       #Normally we do not
+my $minimal_swap      = '';       # Do not swap symlinks
+my $ignore_depmod_err = '';	# normally we do not
+my $relink_build_link = 'YES';	# There is no harm in checking the link
+my $force_build_link  = '';	# we shall not create a dangling link
+my $kernel_arch       = "=B";
+my $ramdisk           = "/usr/sbin/update-initramfs";
+my $package_name    = "linux-image-$version";
+
+my $Loader          = "NoLOADER"; # 
+$Loader             = "LILO"     if $loader =~ /^lilo/io;
+$Loader             = "SILO"     if $loader =~ /^silo/io;
+$Loader             = "QUIK"     if $loader =~ /^quik/io;
+$Loader             = "yaboot"   if $loader =~ /^yaboot/io;
+$Loader             = "PALO"     if $loader =~ /^palo/io;
+$Loader             = "NETTROM"  if $loader =~ /^nettrom/io;
+$Loader             = "VMELILO"  if $loader =~ /^vmelilo/io;
+$Loader             = "ZIPL"     if $loader =~ /^zipl/io;
+$Loader             = "ELILO"    if $loader =~ /^elilo/io;
+
+
+# This should not point to /tmp, because of security risks.
+my $temp_file_name = "/var/log/$loader" . "_log.$$";
+
+#known variables
+my @boilerplate     = ();
+my @silotemplate    = ();
+my @quiktemplate    = ();
+my @palotemplate    = ();
+my @vmelilotemplate = ();
+my $bootdevice      = '';
+my $rootdevice      = '';
+my $rootdisk        = '';
+my $rootpartition   = '';
+my $image_dest      = "/";
+my $realimageloc    = "/$image_dir/";
+my $have_conffile   = "";
+my $CONF_LOC        = '/etc/kernel-img.conf';
+my $relative_links = '';
+my $silent_modules  = '';
+my $silent_loader   = '';
+my $warn_reboot     = 'Yes';     # Warn that we are installing a version of
+                                 # the kernel we are running
+
+chdir('/')           or die "could not chdir to /:$!\n";
+# remove multiple leading slashes; make sure there is at least one.
+$realimageloc  =~ s|^/*|/|o;
+$realimageloc  =~ s|/+|/|o;
+
+
+if (-r "$CONF_LOC" && -f "$CONF_LOC"  ) {
+  if (open(CONF, "$CONF_LOC")) {
+    while (<CONF>) {
+      chomp;
+      s/\#.*$//g;
+      next if /^\s*$/;
+
+      $do_symlink      = "" if /^\s*do_symlinks\s*=\s*(no|false|0)\s*$/ig;
+      $no_symlink      = "" if /^\s*no_symlinks\s*=\s*(no|false|0)\s*$/ig;
+      $reverse_symlink = "" if /^\s*reverse_symlinks\s*=\s*(no|false|0)\s*$/ig;
+      $link_in_boot    = "" if /^\s*image_in_boot\s*=\s*(no|false|0)\s*$/ig;
+      $link_in_boot    = "" if /^\s*link_in_boot\s*=\s*(no|false|0)\s*$/ig;
+      $move_image      = "" if /^\s*move_image\s*=\s*(no|false|0)\s*$/ig;
+      $clobber_modules = '' if /^\s*clobber_modules\s*=\s*(no|false|0)\s*$/ig;
+      $do_boot_enable  = '' if /^\s*do_boot_enable\s*=\s*(no|false|0)\s*$/ig;
+      $do_bootfloppy   = '' if /^\s*do_bootfloppy\s*=\s*(no|false|0)\s*$/ig;
+      $relative_links  = '' if /^\s*relative_links \s*=\s*(no|false|0)\s*$/ig;
+      $do_bootloader   = '' if /^\s*do_bootloader\s*=\s*(no|false|0)\s*$/ig;
+      $do_initrd       = '' if /^\s*do_initrd\s*=\s*(no|false|0)\s*$/ig;
+      $warn_initrd     = '' if /^\s*warn_initrd\s*=\s*(no|false|0)\s*$/ig;
+      $use_hard_links  = '' if /^\s*use_hard_links\s*=\s*(no|false|0)\s*$/ig;
+      $silent_modules  = '' if /^\s*silent_modules\s*=\s*(no|false|0)\s*$/ig;
+      $silent_loader   = '' if /^\s*silent_loader\s*=\s*(no|false|0)\s*$/ig;
+      $warn_reboot     = '' if /^\s*warn_reboot\s*=\s*(no|false|0)\s*$/ig;
+      $minimal_swap    = '' if /^\s*minimal_swap\s*=\s*(no|false|0)\s*$/ig;
+      $ignore_depmod_err = '' if /^\s*ignore_depmod_err\s*=\s*(no|false|0)\s*$/ig;
+      $relink_build_link = '' if /^\s*relink_build_link\s*=\s*(no|false|0)\s*$/ig;
+      $force_build_link = '' if /^\s*force_build_link\s*=\s*(no|false|0)\s*$/ig;
+
+      $do_symlink      = "Yes" if /^\s*do_symlinks\s*=\s*(yes|true|1)\s*$/ig;
+      $no_symlink      = "Yes" if /^\s*no_symlinks\s*=\s*(yes|true|1)\s*$/ig;
+      $reverse_symlink = "Yes" if /^\s*reverse_symlinks\s*=\s*(yes|true|1)\s*$/ig;
+      $link_in_boot    = "Yes" if /^\s*image_in_boot\s*=\s*(yes|true|1)\s*$/ig;
+      $link_in_boot    = "Yes" if /^\s*link_in_boot\s*=\s*(yes|true|1)\s*$/ig;
+      $move_image      = "Yes" if /^\s*move_image\s*=\s*(yes|true|1)\s*$/ig;
+      $clobber_modules = "Yes" if /^\s*clobber_modules\s*=\s*(yes|true|1)\s*$/ig;
+      $do_boot_enable  = "Yes" if /^\s*do_boot_enable\s*=\s*(yes|true|1)\s*$/ig;
+      $do_bootfloppy   = "Yes" if /^\s*do_bootfloppy\s*=\s*(yes|true|1)\s*$/ig;
+      $do_bootloader   = "Yes" if /^\s*do_bootloader\s*=\s*(yes|true|1)\s*$/ig;
+      $relative_links  = "Yes" if /^\s*relative_links\s*=\s*(yes|true|1)\s*$/ig;
+      $do_initrd       = "Yes" if /^\s*do_initrd\s*=\s*(yes|true|1)\s*$/ig;
+      $warn_initrd     = "Yes" if /^\s*warn_initrd\s*=\s*(yes|true|1)\s*$/ig;
+      $use_hard_links  = "Yes" if /^\s*use_hard_links\s*=\s*(yes|true|1)\s*$/ig;
+      $silent_modules  = 'Yes' if /^\s*silent_modules\s*=\s*(yes|true|1)\s*$/ig;
+      $silent_loader   = 'Yes' if /^\s*silent_loader\s*=\s*(yes|true|1)\s*$/ig;
+      $warn_reboot     = 'Yes' if /^\s*warn_reboot\s*=\s*(yes|true|1)\s*$/ig;
+      $minimal_swap    = 'Yes' if /^\s*minimal_swap\s*=\s*(yes|true|1)\s*$/ig;
+      $ignore_depmod_err = 'Yes' if /^\s*ignore_depmod_err\s*=\s*(yes|true|1)\s*$/ig;
+      $relink_build_link = 'Yes' if /^\s*relink_build_link\s*=\s*(yes|true|1)\s*$/ig;
+      $force_build_link = 'Yes' if /^\s*force_build_link\s*=\s*(yes|true|1)\s*$/ig;
+
+      $image_dest      = "$1"  if /^\s*image_dest\s*=\s*(\S+)/ig;
+      $postinst_hook   = "$1"  if /^\s*postinst_hook\s*=\s*(\S+)/ig;
+      $postrm_hook     = "$1"  if /^\s*postrm_hook\s*=\s*(\S+)/ig;
+      $preinst_hook    = "$1"  if /^\s*preinst_hook\s*=\s*(\S+)/ig;
+      $prerm_hook      = "$1"  if /^\s*prerm_hook\s*=\s*(\S+)/ig;
+      $ramdisk         = "$1"  if /^\s*ramdisk\s*=\s*(.+)$/ig;
+    }
+    close CONF;
+    $have_conffile = "Yes";
+  }
+}
+
+if ($link_in_boot) {
+  $image_dest = "/$image_dir/";
+  $image_dest =~ s|^/*|/|o;
+}
+
+$image_dest = "$image_dest/";
+$image_dest =~ s|/+$|/|o;
+
+# The destdir may be gone by now.
+if (-d "$image_dest") {
+  chdir("$image_dest") or die "could not chdir to $image_dest:$!\n";
+}
+
+# Paranoid check to make sure that the correct value is put in there
+if (! $kimage)                    {$kimage = "vmlinuz"} # Hmm. empty
+elsif ($kimage =~ m/^b?uImage$/o) {$kimage = "vmlinuz"} # these produce vmlinuz
+elsif ($kimage =~ m/^b?zImage$/o) {$kimage = "vmlinuz"} # these produce vmlinuz
+elsif ($kimage =~ m/^[iI]mage$/o) { my $nop = $kimage;}
+elsif ($kimage =~ m/^vmlinux$/o)  { my $nop = $kimage;}
+else                              {$kimage = "vmlinuz"} # default
+
+$ENV{KERNEL_ARCH}=$kernel_arch if $kernel_arch;
+
+
+######################################################################
+######################################################################
+############
+######################################################################
+######################################################################
+sub remove_sym_link {
+  my $bad_image = $_[0];
+
+  warn "Removing symbolic link $bad_image \n";
+  if ($loader =~ /lilo/i) 
+    {
+      warn "Unless you used the optional flag in lilo, \n";
+    }
+  warn " you may need to re-run your boot loader" . ($loader ? "[$loader]":"")
+    . "\n";
+  # Remove the dangling link
+  unlink "$bad_image";
+}
+
+######################################################################
+######################################################################
+############
+######################################################################
+######################################################################
+sub CanonicalizePath {
+  my $path = join '/', @_;
+  my @work = split '/', $path;
+  my @out;
+  my $is_absolute;
+
+  if (@work && $work[0] eq "") { $is_absolute = 1; shift @work; }
+
+  while (@work) {
+    my $seg = shift @work;
+    if ($seg eq "." || $seg eq "") {
+    } elsif ($seg eq "..") {
+      if (@out && $out[-1] ne "..") {
+        pop @out;
+      } else {
+        # Leading "..", or "../..", etc.
+        push @out, $seg;
+      }
+    } else {
+      push @out, $seg;
+    }
+  }
+
+  unshift @out, "" if $is_absolute;
+  return join('/', @out);
+}
+
+######################################################################
+######################################################################
+############
+######################################################################
+######################################################################
+# This removes dangling symlinks. What do we do about hard links? Surely a 
+# something with the nane $image_dest . "$kimage" ought not to be left behind? 
+sub image_magic {
+  my $kimage = $_[0];
+  my $image_dest = $_[1];
+
+  if (-l "$kimage") {
+    # There is a symbolic link
+    my $force_move = 0;
+    my $vmlinuz_target = readlink "$kimage";
+    my $real_target = '';
+    $real_target = abs_path($vmlinuz_target) if defined ($vmlinuz_target);
+    if (!defined($vmlinuz_target) || ! -f "$real_target") {
+      # what, a dangling symlink?
+      warn "The link "  . $image_dest . "$kimage is a damaged link\n";
+      # Remove the dangling link
+      &remove_sym_link("$kimage");
+    }
+    else {
+      my $canonical_target = CanonicalizePath("$vmlinuz_target");
+      if (! -e $canonical_target) {
+	warn "The link "  . $image_dest . "$kimage is a dangling link\n";
+	&remove_sym_link("$kimage");
+      }
+    }
+  }
+}
+
+# set the env var stem
+$ENV{'STEM'} = "linux";
+
+sub exec_script {
+  my $type   = shift;
+  my $script = shift;
+  print STDERR "Running $type hook script $script.\n";
+  system ("$script $version $realimageloc$kimage-$version") &&
+    print STDERR "User $type hook script [$script] ";
+  if ($?) {
+    if ($? == -1) {
+      print STDERR "failed to execute: $!\n";
+    }
+    elsif ($? & 127) {
+      printf STDERR "died with signal %d, %s coredump\n",
+        ($? & 127),  ($? & 128) ? 'with' : 'without';
+    }
+    else {
+      printf STDERR "exited with value %d\n", $? >> 8;
+    }
+  }
+}
+sub run_hook {
+  my $type   = shift;
+  my $script = shift;
+  if ($script =~ m,^/,) {
+    # Full path provided for the hook script
+    if (-x "$script") {
+      &exec_script($type,$script);
+    }
+    else {
+      warn "The provided $type hook script [$script] could not be run.\n";
+    }
+  }
+  else {
+    # Look for it in a safe path
+    for my $path ('/bin', '/sbin', '/usr/bin', '/usr/sbin') {
+      if (-x "$path/$script") {
+        &exec_script($type, "$path/$script");
+        return 0;
+      }
+    }
+    # No luck
+    print STDERR "Could not find $type hook script [$script].\n";
+    warn "Looked in: '/bin', '/sbin', '/usr/bin', '/usr/sbin'\n";
+  }
+}
+
+## Run user hook script here, if any
+if ($postrm_hook) {
+  &run_hook("postrm", $postrm_hook);
+}
+if (-d "/etc/kernel/postrm.d") {
+  warn "Examining /etc/kernel/postrm.d .\n";
+  system ("run-parts --verbose --exit-on-error --arg=$version " .
+          "--arg=$realimageloc$kimage-$version " .
+          "/etc/kernel/postrm.d") &&
+            die "Failed to process /etc/kernel/postrm.d";
+}
+if (-d "/etc/kernel/postrm.d/$version") {
+  warn "Examining /etc/kernel/postrm.d/$version .\n";
+  system ("run-parts --verbose --exit-on-error --arg=$version " .
+          "--arg=$realimageloc$kimage-$version " .
+          "/etc/kernel/postrm.d/$version") &&
+            die "Failed to process /etc/kernel/postrm.d/$version";
+}
+
+# check and remove damaged and dangling symlinks
+if ($ARGV[0] !~ /upgrade/) {
+  system("$ramdisk -d -k " . $version . " > /dev/null 2>&1");
+  if (-f $realimageloc . "initrd.img-$version.bak") {
+    unlink $realimageloc . "initrd.img-$version.bak";
+  }
+  image_magic($kimage,          $image_dest);
+  image_magic($kimage . ".old", $image_dest);
+  image_magic("initrd.img",     $image_dest) if $initrd;
+  image_magic("initrd.img.old", $image_dest) if $initrd;
+}
+
+exit 0;
+
+__END__
+
+
+
+
+
+
--- linux-mvl-dove-2.6.32.orig/debian/control-scripts/postinst
+++ linux-mvl-dove-2.6.32/debian/control-scripts/postinst
@@ -0,0 +1,1088 @@
+#! /usr/bin/perl
+# OriginalAuthor : Manoj Srivastava ( srivasta@pilgrim.umass.edu )
+#
+# Customized for Ubuntu by: Ben Collins <bcollins@ubuntu.com>
+
+#use strict; #for debugging
+use Cwd 'abs_path';
+
+$|=1;
+
+# Predefined values:
+my $version           = "=V";
+my $link_in_boot      = "";  # Should be empty, mostly
+my $no_symlink        = "";   # Should be empty, mostly
+my $reverse_symlink   = "";   # Should be empty, mostly
+my $do_symlink        = "Yes";  # target machine defined
+my $do_boot_enable    = "Yes";  # target machine defined
+my $do_bootfloppy     = "Yes";  # target machine defined
+my $do_bootloader     = "Yes";  # target machine defined
+my $move_image        = '';     # target machine defined
+my $kimage            = "=K";   # Should be empty, mostly
+my $loader            = "=L"; # lilo, silo, quik, palo, vmelilo, nettrom, arcboot or delo
+my $image_dir         = "/boot";        # where the image is located
+my $clobber_modules   = '';          # target machine defined
+my $relative_links    = "";          # target machine defined
+my $initrd            = "YES";        # initrd kernel
+my $do_initrd         = '';     # Normally we do not
+my $use_hard_links    = ''; # hardlinks do not work across fs boundaries
+my $postinst_hook     = '';          #Normally we do not
+my $postrm_hook       = '';          #Normally we do not
+my $preinst_hook      = '';          #Normally we do not
+my $prerm_hook        = '';          #Normally we do not
+my $minimal_swap      = '';          # Do not swap symlinks
+my $ignore_depmod_err = '';          # normally we do not
+my $kernel_arch       = "=B";
+my $ramdisk           = "/usr/sbin/update-initramfs";  # List of tools to create initial ram fs.
+my $notifier          = "/usr/share/update-notifier/notify-reboot-required";
+my $package_name      = "linux-image-$version";
+my $explicit_do_loader = 'Yes';
+
+my $Loader          = "NoLOADER"; #
+$Loader             = "LILO"     if $loader =~ /^lilo/io;
+$Loader             = "SILO"     if $loader =~ /^silo/io;
+$Loader             = "QUIK"     if $loader =~ /^quik/io;
+$Loader             = "yaboot"   if $loader =~ /^yaboot/io;
+$Loader             = "PALO"     if $loader =~ /^palo/io;
+$Loader             = "NETTROM"  if $loader =~ /^nettrom/io;
+$Loader             = "VMELILO"  if $loader =~ /^vmelilo/io;
+$Loader             = "ZIPL"     if $loader =~ /^zipl/io;
+$Loader             = "ELILO"    if $loader =~ /^elilo/io;
+$Loader             = "ARCBOOT"  if $loader =~ /^arcboot/io;
+$Loader             = "DELO"     if $loader =~ /^delo/io;
+
+# This should not point to /tmp, because of security risks.
+my $temp_file_name = "/var/log/$loader" . "_log.$$";
+
+#known variables
+my $image_dest      = "/";
+my $realimageloc    = "/$image_dir/";
+my $have_conffile   = "";
+my $silent_modules  = '';
+my $silent_loader   = '';
+my $warn_reboot     = 'Yes';     # Warn that we are installing a version of
+                                 # the kernel we are running
+
+my $modules_base    = '/lib/modules';
+my $CONF_LOC        = '/etc/kernel-img.conf';
+
+# Ignore all invocations except when called on to configure.
+exit 0 unless $ARGV[0] =~ /configure/;
+
+my $DEBUG = 0;
+
+# Do some preliminary sanity checks here to ensure we actually have an
+# valid image dir
+chdir('/')           or die "could not chdir to /:$!\n";
+die "Internal Error: ($image_dir) is not a directory!\n"
+  unless -d $image_dir;
+
+# remove multiple leading slashes; make sure there is at least one.
+$realimageloc  =~ s|^/*|/|o;
+$realimageloc  =~ s|/+|/|o;
+die "Internal Error: ($realimageloc) is not a directory!\n"
+  unless -d $realimageloc;
+
+if (-r "$CONF_LOC" && -f "$CONF_LOC"  ) {
+  if (open(CONF, "$CONF_LOC")) {
+    while (<CONF>) {
+      chomp;
+      s/\#.*$//g;
+      next if /^\s*$/;
+
+      $do_symlink      = "" if /^\s*do_symlinks\s*=\s*(no|false|0)\s*$/ig;
+      $no_symlink      = "" if /^\s*no_symlinks\s*=\s*(no|false|0)\s*$/ig;
+      $reverse_symlink = "" if /^\s*reverse_symlink\s*=\s*(no|false|0)\s*$/ig;
+      $link_in_boot    = "" if /^\s*image_in_boot\s*=\s*(no|false|0)\s*$/ig;
+      $link_in_boot    = "" if /^\s*link_in_boot\s*=\s*(no|false|0)\s*$/ig;
+      $move_image      = "" if /^\s*move_image\s*=\s*(no|false|0)\s*$/ig;
+      $clobber_modules = '' if /^\s*clobber_modules\s*=\s*(no|false|0)\s*$/ig;
+      $do_boot_enable  = '' if /^\s*do_boot_enable\s*=\s*(no|false|0)\s*$/ig;
+      $do_bootfloppy   = '' if /^\s*do_bootfloppy\s*=\s*(no|false|0)\s*$/ig;
+      $relative_links  = '' if /^\s*relative_links \s*=\s*(no|false|0)\s*$/ig;
+      $do_bootloader   = '' if /^\s*do_bootloader\s*=\s*(no|false|0)\s*$/ig;
+      $explicit_do_loader = '' if /^\s*do_bootloader\s*=\s*(no|false|0)\s*$/ig;
+      $do_initrd       = '' if /^\s*do_initrd\s*=\s*(no|false|0)\s*$/ig;
+      $use_hard_links  = '' if /^\s*use_hard_links\s*=\s*(no|false|0)\s*$/ig;
+      $silent_modules  = '' if /^\s*silent_modules\s*=\s*(no|false|0)\s*$/ig;
+      $silent_loader   = '' if /^\s*silent_loader\s*=\s*(no|false|0)\s*$/ig;
+      $warn_reboot     = '' if /^\s*warn_reboot\s*=\s*(no|false|0)\s*$/ig;
+      $minimal_swap    = '' if /^\s*minimal_swap\s*=\s*(no|false|0)\s*$/ig;
+      $ignore_depmod_err = '' if /^\s*ignore_depmod_err\s*=\s*(no|false|0)\s*$/ig;
+
+      $do_symlink      = "Yes" if /^\s*do_symlinks\s*=\s*(yes|true|1)\s*$/ig;
+      $no_symlink      = "Yes" if /^\s*no_symlinks\s*=\s*(yes|true|1)\s*$/ig;
+      $reverse_symlink = "Yes" if /^\s*reverse_symlinks\s*=\s*(yes|true|1)\s*$/ig;
+      $link_in_boot    = "Yes" if /^\s*image_in_boot\s*=\s*(yes|true|1)\s*$/ig;
+      $link_in_boot    = "Yes" if /^\s*link_in_boot\s*=\s*(yes|true|1)\s*$/ig;
+      $move_image      = "Yes" if /^\s*move_image\s*=\s*(yes|true|1)\s*$/ig;
+      $clobber_modules = "Yes" if /^\s*clobber_modules\s*=\s*(yes|true|1)\s*$/ig;
+      $do_boot_enable  = "Yes" if /^\s*do_boot_enable\s*=\s*(yes|true|1)\s*$/ig;
+      $do_bootfloppy   = "Yes" if /^\s*do_bootfloppy\s*=\s*(yes|true|1)\s*$/ig;
+      $do_bootloader   = "Yes" if /^\s*do_bootloader\s*=\s*(yes|true|1)\s*$/ig;
+      $explicit_do_loader = "YES" if /^\s*do_bootloader\s*=\s*(yes|true|1)\s*$/ig;
+      $relative_links  = "Yes" if /^\s*relative_links\s*=\s*(yes|true|1)\s*$/ig;
+      $do_initrd       = "Yes" if /^\s*do_initrd\s*=\s*(yes|true|1)\s*$/ig;
+      $use_hard_links  = "Yes" if /^\s*use_hard_links\s*=\s*(yes|true|1)\s*$/ig;
+      $silent_modules  = 'Yes' if /^\s*silent_modules\s*=\s*(yes|true|1)\s*$/ig;
+      $silent_loader   = 'Yes' if /^\s*silent_loader\s*=\s*(yes|true|1)\s*$/ig;
+      $warn_reboot     = 'Yes' if /^\s*warn_reboot\s*=\s*(yes|true|1)\s*$/ig;
+      $minimal_swap    = 'Yes' if /^\s*minimal_swap\s*=\s*(yes|true|1)\s*$/ig;
+      $ignore_depmod_err = 'Yes' if /^\s*ignore_depmod_err\s*=\s*(yes|true|1)\s*$/ig;
+
+      $image_dest      = "$1"  if /^\s*image_dest\s*=\s*(\S+)/ig;
+      $postinst_hook   = "$1"  if /^\s*postinst_hook\s*=\s*(\S+)/ig;
+      $postrm_hook     = "$1"  if /^\s*postrm_hook\s*=\s*(\S+)/ig;
+      $preinst_hook    = "$1"  if /^\s*preinst_hook\s*=\s*(\S+)/ig;
+      $prerm_hook      = "$1"  if /^\s*prerm_hook\s*=\s*(\S+)/ig;
+      $ramdisk         = "$1"  if /^\s*ramdisk\s*=\s*(.+)$/ig;
+    }
+    close CONF;
+    $have_conffile = "Yes";
+  }
+}
+
+
+
+# For some versions of kernel-package, we had this warning in the
+# postinst, but the rules did not really interpolate the value in.
+# Here is a sanity check.
+my $pattern = "=" . "I";
+$initrd=~ s/^$pattern$//;
+
+if ($link_in_boot) {
+  $image_dest = "/$image_dir/"; # same as realimageloc
+}
+
+# Tack on at least one trainling /
+$image_dest = "$image_dest/";
+$image_dest =~ s|^/*|/|o;
+$image_dest =~ s|/+$|/|o;
+
+if (! -d "$image_dest") {
+  die "Expected Image Destination dir ($image_dest) to be a valid directory!\n";
+}
+
+# sanity
+if (!($do_bootfloppy || $do_bootloader)) {
+  $do_boot_enable = '';
+}
+if ($do_symlink && $no_symlink) {
+  warn "Both do_symlinks and no_symlinks options enabled; disabling no_symlinks\n";
+  $no_symlink = 0;
+}
+
+# most of our work is done in $image_dest (nominally /)
+chdir("$image_dest") or die "could not chdir to $image_dest:$!\n";
+
+# Paranoid check to make sure that the correct value is put in there
+if    (! $kimage)                 { $kimage = "vmlinuz"; } # Hmm. empty
+elsif ($kimage =~ m/^b?uImage$/o) { $kimage = "vmlinuz"; } # these produce vmlinuz
+elsif ($kimage =~ m/^b?zImage$/o) { $kimage = "vmlinuz"; } # these produce vmlinuz
+elsif ($kimage =~ m/^[iI]mage$/o) { my $nop = $kimage;   }
+elsif ($kimage =~ m/^vmlinux$/o)  { my $nop = $kimage;   }
+else                              { $kimage = "vmlinuz"; } # Default
+
+$ENV{KERNEL_ARCH}=$kernel_arch if $kernel_arch;
+
+
+die "Internal Error: Could not find image (" . $realimageloc
+  . "$kimage-$version)\n" unless -e $realimageloc
+  . "$kimage-$version";
+
+# search for the boot loader in the path
+my $loader_exec;
+($loader_exec = $loader)  =~ s|.*/||;
+my ($loaderloc) = grep -x, map "$_/$loader_exec",
+  map { length($_) ? $_ : "." }  split /:/, $ENV{PATH};
+
+
+######################################################################
+######################################################################
+###########        Test whether a relative symlinkwould be OK #######
+######################################################################
+######################################################################
+sub test_relative {
+  my %params = @_;
+  my $cwd;
+
+  die "Internal Error: Missing Required paramater 'Old Dir' "
+    unless $params{'Old Dir'};
+  die "Internal Error: Missing Required paramater New Dir' "
+    unless $params{'New Dir'};
+
+
+  die "Internal Error: No such dir $params{'Old Dir'} "
+    unless -d $params{'Old Dir'};
+  die "Internal Error: No such dir $params{'New Dir'} "
+    unless -d $params{'New Dir'};
+
+  warn "Test relative: testing $params{'Old Dir'} -> $params{'New Dir'}"
+    if $DEBUG;
+  chomp($cwd = `pwd`);
+  chdir ($params{'New Dir'}) or die "Could not chdir to $params{'New Dir'}:$!";
+  my $ok = 0;
+  $params{'Old Dir'}  =~ s|^/*||o;
+  if (-d $params{'Old Dir'} ) {
+    if (defined $params{'Test File'}) {
+      if (-e $params{'Old Dir'} . $params{'Test File'}) {
+        $ok  = 1;
+      }
+    } else {
+      $ok = 1;                  # well, backward compatibility
+    }
+  }
+  chdir ($cwd) or die "Could not chdir to $params{'New Dir'}:$!";
+  return $ok;
+}
+
+######################################################################
+######################################################################
+############
+######################################################################
+######################################################################
+# sub CanonicalizePath {
+#   my $path = join '/', @_;
+#   my @work = split '/', $path;
+#   my @out;
+#   my $is_absolute;
+
+#   if (@work && $work[0] eq "") {
+#     $is_absolute = 1; shift @work;
+#   }
+
+#   while (@work) {
+#     my $seg = shift @work;
+#     if ($seg eq "." || $seg eq "") {
+#     } 
+#     elsif ($seg eq "..") {
+#       if (@out && $out[-1] ne "..") {
+#         pop @out;
+#       } 
+#       else {
+#         # Leading "..", or "../..", etc.
+#         push @out, $seg;
+#       }
+#     } 
+#     else {
+#       push @out, $seg;
+#     }
+#   }
+
+#   unshift @out, "" if $is_absolute;
+#   return join('/', @out);
+# }
+######################################################################
+######################################################################
+############
+######################################################################
+######################################################################
+
+sub spath {
+  my %params = @_;
+
+  die "Missing Required paramater 'Old'" unless $params{'Old'};
+  die "Missing Required paramater 'New'" unless  $params{'New'};
+
+  my @olddir  = split '/', `readlink -q -m $params{'Old'}`;
+  my @newdir  = split '/', `readlink -q -m $params{'New'}`;
+  my @outdir  = @olddir;
+
+  my $out = '';
+  my $i;
+  for ($i = 0; $i <= $#olddir && $i <= $#newdir; $i++) {
+    $out++ if ($olddir[$i] ne $newdir[$i]);
+    shift @outdir unless $out;
+    unshift @outdir, ".." if $out;
+  }
+  if ($#newdir > $#olddir) {
+    for ($i=0; $i < $#newdir; $i++) {
+      unshift @outdir, "..";
+    }
+  }
+  return join ('/', @outdir);
+}
+######################################################################
+######################################################################
+############
+######################################################################
+######################################################################
+
+
+# This routine actually moves the kernel image
+# From: $realimageloc/$kimage-$version (/boot/vmlinuz-2.6.12)
+# To:   $image_dest/$kimage-$version   (/vmlinuz-2.6.12)
+# Note that the image is moved to a versioned destination, but ordinary
+# symlinks we create otherwise are not normally versioned
+sub really_move_image {
+  my $src_dir  = $_[0];
+  my $target   = $_[1];
+  my $dest_dir = $_[2];
+
+  warn "Really move image: src_dir=$src_dir, target=$target,\n destdir=$dest_dir"
+    if $DEBUG;
+  if (-e "$target") {
+    # we should be in dir $dest_dir == $image_dest /, normally
+    rename("$target", "$target.$$") ||
+      die "failed to move " . $dest_dir . "$target:$!";
+    warn "mv $target $target.$$" if $DEBUG;
+  }
+  warn "mv -f $src_dir$target $target" if $DEBUG;
+  my $ret = system("mv -f " . $src_dir . "$target " .
+                   " $target");
+  if ($ret) {
+    die("Failed to move " . $src_dir . "$target to "
+        . $dest_dir . "$target.\n");
+  }
+  # Ok, now we may clobber the previous .old files
+  if (-e "$target.$$") {
+    rename("$target.$$", "$target.old") ||
+      die "failed to move " . $dest_dir . "$target:$!";
+    warn "mv $target.$$ $target " if $DEBUG;
+  }
+}
+
+# Normally called after really_move_image; and only called if we asked for 
+# reversed link this routine reverses the symbolic link that is notmally 
+# created. Since the real kernel image has been moved over to 
+# $image_dest/$kimage-$version. So, this routine links
+# From:   $image_dest/$kimage-$version   (/vmlinuz-2.6.12)
+# To:     $realimageloc/$kimage-$version (/boot/vmlinuz-2.6.12)
+sub really_reverse_link {
+  my $src_dir    = $_[0];
+  my $link_name  = $_[1];
+  my $dest_dir   = $_[2];
+  warn "Really reverse link: src_dir=$src_dir, link name=$link_name\n" .
+    "\tdestdir=$dest_dir" if $DEBUG;
+
+  my $Old = $dest_dir;
+  if (test_relative ('Old Dir' => $Old, 'New Dir' => $src_dir,
+                     'Test File' => "$link_name")) {
+    $Old   =~ s|^/*||o;
+  }
+  # Special case is they are in the same dir
+  my $rel_path = spath('Old' => "$Old", 'New' => "$src_dir" );
+  $Old ="" if $rel_path =~ m/^\s*$/o;
+
+  if ($use_hard_links =~ m/YES/i) {
+    link($Old . "$link_name", $src_dir . "$link_name") ||
+      die("Failed to link " . $dest_dir . "$link_name to " . $src_dir . 
+          "$link_name .\n");
+    warn "ln " . $Old . "$link_name " . $src_dir . "$link_name"  if $DEBUG;
+  }
+  else {
+    symlink($Old . "$link_name", $src_dir . "$link_name") ||
+      die("Failed to symbolic-link " . $dest_dir . "$link_name to " . $src_dir
+          . "$link_name : $!\n");
+    warn "ln -s " . $Old . "$link_name " . $src_dir . "$link_name" if $DEBUG;
+  }
+}
+
+# This routine is invoked if there is a symbolic link in place
+# in $image_dest/$kimage -- so a symlink exists in the destination.
+# What we are trying to determine is if we need to move the symbolic link over
+# to the the .old location
+sub move_p {
+  my $kimage     = $_[0];       # Name of the symbolic link
+  my $image_dest = $_[1];       # The directory the links goes into
+  my $image_name = $_[2]; 
+  my $src_dir    = $_[3]; 
+  my $force_move = 0;
+  warn "Move?: kimage=$kimage, image_dest=$image_dest, \n" .
+    "\timage_name=$image_name, src_dir=$src_dir" if $DEBUG;
+
+  if ($no_symlink || $reverse_symlink) {
+    # we do not want links, yet we have a symbolic link here!
+    warn "found a symbolic link in " . $image_dest . "$kimage \n" .
+      "even though no_symlink is defined\n" if $no_symlink;
+    warn "found a symbolic link in " . $image_dest . "$kimage \n" .
+      "even though reverse_symlink is defined\n" if $reverse_symlink;
+    # make sure we change this state of affairs
+    $force_move = 1;
+    return $force_move;
+  }
+
+  warn "DEBUG: OK. We found symlink, and we should have a symlink here.\n"
+    if $DEBUG;
+  my $vmlinuz_target = readlink "$kimage";
+  my $real_target = '';
+  my $target = `readlink -q -m "${realimageloc}${kimage-$version}"`;
+  $real_target = abs_path($vmlinuz_target) if defined($vmlinuz_target);
+
+  if (!defined($vmlinuz_target) || ! -f "$real_target") {
+    # what, a dangling symlink?
+    warn "The link "  . $image_dest . "$kimage is a dangling link" .
+      "to $real_target\n";
+    $force_move = 1;
+    return $force_move;
+  }
+
+
+  warn "DEBUG: The link $kimage points to ($vmlinuz_target)\n" if $DEBUG;
+  warn "DEBUG: ($vmlinuz_target) is really ($real_target)\n" if $DEBUG;
+  my $cwd;
+  chomp ($cwd=`pwd`);
+  if ($vmlinuz_target !~ m|^/|o) {
+    $vmlinuz_target = $cwd . "/" . $vmlinuz_target;
+    $vmlinuz_target =~ s|/+|/|o;
+  }
+  $vmlinuz_target = `readlink -q -m $vmlinuz_target`;
+
+  if ("$vmlinuz_target" ne "$target") {
+    warn "DEBUG: We need to handle this.\n" if $DEBUG;
+    if ($minimal_swap) {
+      warn "DEBUG: Minimal swap.\n" if $DEBUG;
+      if (-l "$kimage.old") {
+        warn "DEBUG: There is an old link at $kimage.old\n" if $DEBUG;
+        my $old_target = readlink "$kimage.old";
+        my $real_old_target = '';
+        $real_old_target=abs_path($old_target) if defined ($old_target);
+
+        if ($real_old_target  && -f "$real_old_target") {
+          if ($old_target !~ m|^/|o) {
+            $old_target = $cwd . "/" . $old_target;
+            $old_target =~ s|/+|/|o;
+          }
+          $old_target = `readlink -q -m $old_target`;
+          if ("$old_target"  ne "$target") {
+            $force_move = 1;
+            warn "DEBUG: Old link ($old_target) does not point to us ($target)\n"
+              if $DEBUG;
+          } 
+          else {            # The .old points to the current
+            warn "$kimage.old --> $target -- doing nothing";
+            $force_move = 0;
+          }
+        } 
+        else { 
+          warn "DEBUG: Well, the old link does not exist -- so we move\n"
+            if $DEBUG;
+          $force_move = 1;
+        }
+      } 
+      else {
+        warn "DEBUG: No .old link -- OK to move\n"
+          if $DEBUG;
+        $force_move = 1;
+      }
+    } 
+    else {
+      warn "DEBUG: ok, minimal swap is no-- so we move.\n"
+        if $DEBUG;
+      $force_move = 1;
+    }
+  }
+  else {                  # already have proper link
+    warn "$kimage($vmlinuz_target) points to $target ($real_target) -- doing nothing";
+    $force_move = 0;
+  }
+  return $force_move;
+}
+
+
+# This routine moves the symbolic link around (/vmlinuz -> /vmlinuz.old)
+# It pays attention to whether we should the fact whether we should be using
+# hard links or not.
+sub really_move_link {
+  my $kimage     = $_[0];       # Name of the symbolic link
+  my $image_dest = $_[1];       # The directory the links goes into
+  my $image_name = $_[2]; 
+  my $src_dir    = $_[3]; 
+  warn "really_move_link: kimage=$kimage, image_dest=$image_dest\n" .
+    "\t image_name=$image_name, src_dir=$src_dir" if $DEBUG;
+
+  # don't clobber $kimage.old quite yet
+  rename("$kimage", "$kimage.$$") ||
+    die "failed to move " . $image_dest . "$kimage:$!";
+  warn "mv $kimage $kimage.$$" if $DEBUG;
+  my $Old = $src_dir;
+  my $cwd;
+
+  chomp($cwd=`pwd`);
+  if (test_relative ('Old Dir' => $Old, 'New Dir' => $cwd,
+                     'Test File' => "$image_name")) {
+    $Old   =~ s|^/*||o;
+  }
+  # Special case is they are in the same dir
+  my $rel_path = spath('Old' => "$Old", 'New' => "$cwd" );
+  $Old ="" if $rel_path =~ m/^\s*$/o;
+
+  if ($use_hard_links =~ m/YES/i) {
+    warn "ln ${Old}${image_name} $kimage" if $DEBUG;
+    if (! link("${Old}${image_name}", "$kimage")) {
+      rename("$kimage.$$", "$kimage");
+      die("Failed to link ${Old}${image_name} to " .
+          "${image_dest}${kimage}.\n");
+    }
+  } 
+  else {
+    warn "ln -s ${Old}${image_name} $kimage" if $DEBUG;
+    if (! symlink("${Old}${image_name}", "$kimage")) {
+      rename("$kimage.$$", "$kimage");
+      die("Failed to symbolic-link ${Old}${image_name} to " .
+          "${image_dest}${kimage}: $!\n");
+    }
+  }
+
+  # Ok, now we may clobber the previous .old file
+  if (-l "$kimage.old" || ! -e "$kimage.old" ) {
+    rename("$kimage.$$", "$kimage.old");
+    warn "mv $kimage.$$ $kimage.old" if $DEBUG;
+  }
+  else {
+    warn "$kimage.old is not a symlink, not clobbering\n";
+    warn "rm $kimage.$$";
+    unlink "$kimage.$$" if $DEBUG;
+  }
+}
+
+# This routine handles a request to do symlinks, but there is no
+# symlink file already there.  Either we are supposed to use copy, or we are
+# installing on a pristine system, or the user does not want symbolic links at
+# all.  We use a configuration file to tell the last two cases apart, creating
+# a config file if needed.
+sub handle_missing_link {
+  my $kimage     = $_[0];       # Name of the symbolic link
+  my $image_dest = $_[1];       # The directory the links goes into
+  my $image_name = $_[2]; 
+  my $src_dir    = $_[3]; 
+  warn "handle_missing_link: kimage=$kimage, image_dest=$image_dest\n" .
+    "\t image_name=$image_name, src_dir=$src_dir" if $DEBUG;
+
+  if ($no_symlink) {
+    warn "cp -a --backup=t $realimageloc$image_name $kimage" if $DEBUG;
+    my $ret = system("cp -a --backup=t " . $realimageloc .
+                     "$image_name "   . " $kimage");
+    if ($ret) {
+      die("Failed to copy " . $realimageloc . "$image_name to "
+          . $image_dest . "$kimage .\n");
+    }
+  } 
+  elsif ($reverse_symlink) {
+    warn "mv -f $realimageloc$image_name $kimage" if $DEBUG;
+    my $ret = system("mv -f " . $realimageloc . "$image_name "
+                     . "$kimage");
+    if ($ret) {
+      die("Failed to move " . $realimageloc . "$image_name to "
+          . $image_dest . "$kimage .\n");
+    }
+  } 
+  else {
+    if (! $have_conffile) {
+      my $ret;
+      my $answer='';
+      $do_symlink = "Yes";
+
+      if (open(CONF, ">$CONF_LOC")) {
+        print CONF "# Kernel Image management overrides\n";
+        print CONF "# See kernel-img.conf(5) for details\n";
+        if ($loader =~ /palo/i) {
+          print CONF "link_in_boot = Yes\n";
+          print CONF "do_symlinks = Yes\n";
+          print CONF "relative_links = Yes\n";
+          print CONF "do_bootloader = No\n";
+        } else {
+          print CONF "do_symlinks = $do_symlink\n";
+        }
+        close CONF;
+      }
+      $have_conffile = "Yes";
+    }
+  }
+
+  if (! $no_symlink && $do_symlink =~ /Yes/i) {
+    my $Old = $realimageloc;
+    my $New = $image_dest;
+    my $Name = "$image_name";
+    my $Link_Dest = "$kimage";
+
+    if ($reverse_symlink) {
+      $Old = $image_dest;
+      $New = $realimageloc;
+      $Name = "$kimage";
+      $Link_Dest = $realimageloc . "$image_name";
+    }
+    if (test_relative ('Old Dir' => $Old,
+                       'New Dir' => $New,
+                       'Test File' => $Name)) {
+      $Old   =~ s|^/*||o;
+    }
+    # Special case is they are in the same dir
+    my $rel_path = spath('Old' => "$Old", 'New' => "$New" );
+    $Old ="" if $rel_path =~ m/^\s*$/o;
+
+    symlink($Old . "$Name", "$Link_Dest") ||
+      die("Failed to symbolic-link ${Old}$Name to $Link_Dest: $!\n");
+    warn "ln -s ${Old}$Name $Link_Dest" if $DEBUG;
+
+  }
+}
+
+# This routine handles the rest of the cases, where the user has requested 
+# non-traditional handling, like using cp, or reverse symlinks, or hard links.
+sub handle_non_symlinks {
+  my $kimage     = $_[0];       # Name of the symbolic link
+  my $image_dest = $_[1];       # The directory the links goes into
+  my $image_name = $_[2]; 
+  my $src_dir    = $_[3]; 
+  warn "handle_non_link: kimage=$kimage, image_dest=$image_dest\n" .
+    "\t image_name=$image_name, src_dir=$src_dir" if $DEBUG;
+
+  # Save the current image. We do this in all four cases
+  rename("$kimage", "$kimage.$$") || 
+    die "failed to move " . $image_dest . "$kimage:$!";
+  warn "mv $kimage $kimage.$$" if $DEBUG;
+
+  ##,#### 
+  # case One
+  #`####
+  if ($no_symlink) {
+    # Maybe /$image_dest is on a dos system?
+    warn "cp -a --backup=t $realimageloc$image_name $kimage" if $DEBUG;
+    my $ret = system("cp -a --backup=t " . $realimageloc
+                     . "$image_name " . "$kimage");
+    if ($ret) {
+      if (-e "$kimage.$$") {
+        rename("$kimage.$$", "$kimage");
+        warn "mv $kimage.$$ $kimage" if $DEBUG;
+      }
+      die("Failed to copy " . $realimageloc . "$image_name to "
+          . $image_dest . "$kimage .\n");
+    }
+  }
+  ##,#### 
+  # case Two
+  #`####
+  elsif ($reverse_symlink) {  # Maybe /$image_dest is on a dos system?
+    warn "mv -f  $realimageloc$image_name $kimage" if $DEBUG;
+    my $ret = system("mv -f " . $realimageloc . "$image_name "
+                     . $image_dest . "$kimage");
+    if ($ret) {
+      if (-e "$kimage.$$") {
+        rename("$kimage.$$", "$kimage");
+        warn "mv $kimage.$$ $kimage" if $DEBUG;
+      }
+      die("Failed to move " . $realimageloc . "$image_name to "
+          . $image_dest . "$kimage .\n");
+    }
+    my $Old = $image_dest;
+    if (test_relative ('Old Dir' => $Old, 'New Dir' => $realimageloc,
+                       'Test File' => "$kimage")) {
+      $Old   =~ s|^/*||o;
+    }
+    # Special case is they are in the same dir
+    my $rel_path = spath('Old' => "$Old", 'New' => "$realimageloc" );
+    $Old ="" if $rel_path =~ m/^\s*$/o;
+
+    if ($use_hard_links =~ m/YES/i) {
+      warn "ln " . $Old . "$kimage " . $realimageloc . "$image_name" if $DEBUG;
+      if (! link($Old . "$kimage", $realimageloc . "$image_name")) {
+        warn "Could not link " . $image_dest .
+          "$kimage to $image_name :$!";
+      }
+    }
+    else {
+      warn "ln -s " . $Old . "$kimage " . $realimageloc . "$image_name" if $DEBUG;
+      if (! symlink($Old . "$kimage", $realimageloc . "$image_name")) {
+        warn "Could not symlink " . $image_dest .
+          "$kimage to $image_name :$!";
+      }
+    }
+  }
+  ##,####
+  # case Three
+  #`####
+  elsif ($use_hard_links =~ m/YES/i ) {
+    # Ok then. this ought to be a hard link, and hence fair game
+    # don't clobber $kimage.old quite yet
+    my $Old = $realimageloc;
+    my $cwd;
+    chomp($cwd=`pwd`);
+    if (test_relative ('Old Dir' => $Old, 'New Dir' => $cwd,
+                       'Test File' => "$image_name")) {
+      $Old   =~ s|^/*||o;
+    }
+    # Special case is they are in the same dir
+    my $rel_path = spath('Old' => "$Old", 'New' => "$cwd" );
+    $Old ="" if $rel_path =~ m/^\s*$/o;
+
+    warn "ln " . $Old . "$image_name " . "$kimage" if $DEBUG;
+    if (! link($Old . "$image_name", "$kimage")) {
+      warn "mv $kimage.$$ $kimage" if $DEBUG;
+      rename("$kimage.$$", "$kimage");
+      die("Failed to link " . $realimageloc . "$image_name to "
+          . $image_dest . "$kimage .\n");
+    }
+  }
+  ##,####
+  # case Four
+  #`####
+  else {
+    # We just use cp
+    warn "cp -a --backup=t $realimageloc$image_name $kimage" if $DEBUG;
+    my $ret = system("cp -a --backup=t " . $realimageloc
+                     . "$image_name " . "$kimage");
+    if ($ret) {
+      if (-e "$kimage.$$") {
+        warn "mv $kimage.$$ $kimage" if $DEBUG;
+        rename("$kimage.$$", "$kimage");
+      }
+      die("Failed to copy " . $realimageloc . "$image_name to "
+          . $image_dest . "$kimage .\n");
+    }
+  }
+  # Ok, now we may clobber the previous .old file
+  warn "mv $kimage.$$ $kimage.old if -e $kimage.$$" if $DEBUG;
+  rename("$kimage.$$", "$kimage.old") if -e "$kimage.$$";
+}
+
+# This routine is responsible for setting up the symbolic links
+# So, the actual kernel image lives in
+# $realimageloc/$image_name (/boot/vmlinuz-2.6.12).
+# This routine creates symbolic links in $image_dest/$kimage (/vmlinuz)
+sub image_magic {
+  my $kimage     = $_[0];       # Name of the symbolic link
+  my $image_dest = $_[1];       # The directory the links goes into
+  my $image_name = "$kimage-$version";
+  my $src_dir    = $realimageloc;
+  warn "image_magic: kimage=$kimage, image_dest=$image_dest\n" .
+    "\t image_name=$image_name, src_dir=$src_dir" if $DEBUG;
+
+  # Well, in any case, if the destination (the symlink we are trying
+  # to create) is a directory, we should do nothing, except throw a
+  # diagnostic.
+  if (-d "$kimage" ) {
+    die ("Hmm. $kimage is a directory, which I did not expect.  I am\n" .
+         "trying to create a symbolic link with that name linked to \n" .
+         "$image_dest . Since a directory exists here, my assumptions \n" .
+         "are way off, and I am aborting.\n" );
+    exit (3);
+  }
+
+  if ($move_image) {   # Maybe $image_dest is in on dos, or something?
+    #                   source dir,    link name,        dest dir
+    really_move_image(  $realimageloc, $image_name, $image_dest);
+    really_reverse_link($realimageloc, $image_name, $image_dest)
+      if $reverse_symlink;
+    return;
+  }
+
+  if (-l "$kimage") {           # There is a symbolic link
+    warn "DEBUG: There is a symlink for $kimage\n" if $DEBUG;
+    my $force_move = move_p($kimage, $image_dest, $image_name, $src_dir);
+
+    if ($force_move) {
+      really_move_link($kimage, $image_dest, $image_name, $src_dir);
+    }
+  }
+  elsif (! -e "$kimage") {
+    # Hmm. Pristine system? How can that be? Installing from scratch?
+    # Or maybe the user does not want a symbolic link here.
+    # Possibly they do not want a link here. (we should be in /
+    # here[$image_dest, really]
+    handle_missing_link($kimage, $image_dest, $image_name, $src_dir);
+  }
+  elsif (-e "$kimage" ) {
+    # OK, $kimage exists -- but is not a link
+    handle_non_symlinks($kimage, $image_dest, $image_name, $src_dir);
+  }
+}
+
+######################################################################
+######################################################################
+######################################################################
+######################################################################
+
+# We may not have any modules installed
+if ( -d "$modules_base/$version" ) {
+  print STDERR "Running depmod.\n";
+  my $ret = system("depmod -a $version");
+  if ($ret) {
+    print STDERR "Failed to run depmod\n";
+    exit(1);
+  }
+}
+
+
+
+sub find_initrd_tool {
+  my $hostversion = shift;
+  my $version = shift;
+  print STDERR "Finding valid ramdisk creators.\n";
+  my @ramdisks =
+    grep {
+      my $args = 
+        "$_ " .
+          "--supported-host-version=$hostversion " .
+            "--supported-target-version=$version " .
+              "1>/dev/null 2>&1"
+                ;
+      system($args) == 0;
+    }
+      split (/[:,\s]+/, $ramdisk);
+}
+
+# The initrd symlink should probably be in the same dir that the
+# symlinks are in
+if ($initrd) {
+  my $success = 0;
+
+  # Update-initramfs is called slightly different than mkinitrd and
+  # mkinitramfs. XXX It should really be made compatible with this stuff
+  # some how.
+  my $upgrading = 1;
+  if (! defined $ARGV[1] || ! $ARGV[1] || $ARGV[1] =~ m/<unknown>/og) {
+    $upgrading = 0;
+  }
+  my $ret = system("$ramdisk " . ($upgrading ? "-u" : "-c") . " -k " . $version . " >&2");
+  $success = 1 unless $ret;
+  die "Failed to create initrd image.\n" unless $success;
+  if (! defined $ARGV[1] || ! $ARGV[1] || $ARGV[1] =~ m/<unknown>/og) {
+    image_magic("initrd.img", $image_dest);
+  }
+  else {
+    if (! -e "initrd.img") {
+      handle_missing_link("initrd.img", $image_dest, "initrd.img-$version",
+                          $realimageloc);
+    }
+    else {
+      print STDERR
+        "Not updating initrd symbolic links since we are being updated/reinstalled \n";
+      print STDERR
+        "($ARGV[1] was configured last, according to dpkg)\n";
+    }
+  }
+
+  if ($initrd && -l "initrd" ) {
+    unlink "initrd";
+  }
+
+  if ($initrd && -l "$image_dir/initrd" && ! $link_in_boot) {
+    unlink "$image_dir/initrd";
+  }
+}
+else {                        # Not making an initrd emage
+  if (-l "initrd.img") {
+    # Ooh, last image was an initrd image? in any case, we should move it. 
+    my $target = readlink "initrd.img";
+    my $real_target = '';
+    $real_target = abs_path($target) if defined ($target);
+
+    if (!defined($target) || ! -f "$real_target") {
+      # Eh. dangling link. can safely be removed.
+      unlink("initrd.img");
+    } else {
+      if (-l "initrd.img.old" || ! -e "initrd.img.old" ) {
+        rename("initrd.img", "initrd.img.old");
+      } else {
+        warn "initrd.img.old is not a symlink, not clobbering\n";
+        unlink("initrd.img");
+      }
+    }
+  }
+}
+
+# Warn of a reboot
+if (-x $notifier) {
+  system($notifier);
+}
+
+# Let programs know not to hibernate if the kernel that would be used for
+# resume-from-hibernate is likely to differ from the currently running kernel.
+system("mountpoint -q /var/run");
+if ($? eq 0) {
+	system("touch /var/run/do-not-hibernate");
+}
+
+# Only change the symlinks if we are not being upgraded
+if (! defined $ARGV[1] || ! $ARGV[1] || $ARGV[1] =~ m/<unknown>/og) {
+  image_magic($kimage, $image_dest);
+}
+else {
+  if (! -e "$kimage") {
+    handle_missing_link($kimage, $image_dest, "$kimage-$version", 
+                        $realimageloc);
+  }
+  else {
+    print STDERR
+      "Not updating image symbolic links since we are being updated/reinstalled \n";
+    print STDERR
+      "($ARGV[1] was configured last, according to dpkg)\n";
+  }
+}
+
+# We used to have System.* files in /
+if (-e "/System.map" || -e "/System.old") {
+  unlink '/System.map' if -e '/System.map';
+  unlink '/System.old' if -e '/System.old';
+}
+
+# creating some info about kernel and initrd
+if ($DEBUG) {
+  my $ksize=sprintf("%.0f",(stat($realimageloc .
+                                 "$kimage-$version"))[7]/1024)."kB";
+  my $initrdsize='';
+  if ($initrd) {
+    $initrdsize=sprintf("%.0f",(stat($realimageloc .
+                                     "initrd.img-$version"))[7]/1024)."kB";
+  }
+
+  print STDERR <<"EOMSG";
+A new kernel image has been installed at $realimageloc$kimage-$version
+ (Size: $ksize)
+
+Symbolic links, unless otherwise specified, can be found in $image_dest
+
+EOMSG
+  ;
+
+  if ($initrd) {
+    print STDERR <<"EOMSGA";
+
+ Initial rootdisk image: ${realimageloc}initrd.img-$version (Size: $initrdsize)
+EOMSGA
+    ;
+  }
+}
+
+# set the env var stem
+$ENV{'STEM'} = "linux";
+sub exec_script {
+  my $type   = shift;
+  my $script = shift;
+  print STDERR "Running $type hook script $script.\n";
+  system ("$script $version $realimageloc$kimage-$version") &&
+    print STDERR "User $type hook script [$script] ";
+  if ($?) {
+    if ($? == -1) {
+      print STDERR "failed to execute: $!\n";
+    }
+    elsif ($? & 127) {
+      printf STDERR "died with signal %d, %s coredump\n",
+        ($? & 127),  ($? & 128) ? 'with' : 'without';
+    }
+    else {
+      printf STDERR "exited with value %d\n", $? >> 8;
+    }
+    exit $? >> 8;
+  }
+}
+sub run_hook {
+  my $type   = shift;
+  my $script = shift;
+  if ($script =~ m,^/,) {
+    # Full path provided for the hook script
+    if (-x "$script") {
+      &exec_script($type,$script);
+    }
+    else {
+      die "The provided $type hook script [$script] could not be run.\n";
+    }
+  }
+  else {
+    # Look for it in a safe path
+    for my $path ('/bin', '/sbin', '/usr/bin', '/usr/sbin') {
+      if (-x "$path/$script") {
+        &exec_script($type, "$path/$script");
+        return 0;
+      }
+    }
+    # No luck
+    print STDERR "Could not find $type hook script [$script].\n";
+    die "Looked in: '/bin', '/sbin', '/usr/bin', '/usr/sbin'\n";
+  }
+}
+
+## Run user hook script here, if any
+if ($postinst_hook) {
+  &run_hook("postinst", $postinst_hook);
+}
+
+if (-d "/etc/kernel/postinst.d") {
+  print STDERR "Examining /etc/kernel/postinst.d.\n";
+  system ("run-parts --verbose --exit-on-error --arg=$version " .
+          "--arg=$realimageloc$kimage-$version " .
+          "/etc/kernel/postinst.d") &&
+            die "Failed to process /etc/kernel/postinst.d";
+}
+
+if (-d "/etc/kernel/postinst.d/$version") {
+  print STDERR "Examining /etc/kernel/postinst.d/$version.\n";
+  system ("run-parts --verbose --exit-on-error --arg=$version " .
+          "--arg=$realimageloc$kimage-$version " .
+          "/etc/kernel/postinst.d/$version") &&
+            die "Failed to process /etc/kernel/postinst.d/$version";
+}
+
+LOADER: {
+  last unless $do_boot_enable; # Exit if explicitly asked to
+
+  last if $loader =~ /silo/i; # SILO does not have to be executed.
+  last if $loader =~ /yaboot/i; # yaboot does not have to be executed.
+  last if $loader =~ /milo/i; # MILO does not have to be executed.
+  last if $loader =~ /nettrom/i; # NETTROM does not have to be executed.
+  last if $loader =~ /arcboot/i; # ARCBOOT does not have to be executed.
+  last if $loader =~ /delo/i; # DELO does not have to be executed.
+  last if $loader =~ /quik/i; # maintainer asked quik invocation to be ignored
+
+  last unless $loaderloc;
+  last unless -x $loaderloc;
+  last unless $do_bootloader;
+
+  if (-T "/etc/$loader.conf") {
+    # Trust and use the existing lilo.conf.
+    print STDERR "You already have a $Loader configuration in /etc/$loader.conf\n";
+    my $ret = &run_lilo();
+    exit $ret if $ret;
+  }
+}
+
+
+sub run_lilo (){
+  my $ret;
+  # Try and figure out if the user really wants lilo to be run --
+  # since the default is to run the boot laoder, which is ! grub -- but
+  # the user may be using grub now, and not changed the default.
+
+  # So, if the user has explicitly asked for the loader to be run, or
+  # if there is no postinst hook, or if there is no grub installed --
+  # we are OK. Or else, we ask.
+  if ($explicit_do_loader || (! ($postinst_hook && -x '/usr/sbin/grub')))  {
+    print STDERR "Running boot loader as requested\n";
+  } else {
+    print STDERR "Ok, not running $loader\n";
+  }
+  if ($loader =~ /^lilo/io or $loader =~ /vmelilo/io) {
+    print STDERR "Testing $loader.conf ... \n";
+    unlink $temp_file_name;     # security
+    $ret = system("$loaderloc -t >$temp_file_name 2>&1");
+    if ($ret) {
+      print STDERR "Boot loader test failed\n";
+      return $ret;
+    }
+    unlink "$temp_file_name";
+    print STDERR "Testing successful.\n";
+    print STDERR "Installing the ";
+    print STDERR "partition " if $loader =~ /^lilo/io;
+    print STDERR "boot sector... \n";
+  }
+
+  print STDERR "Running $loaderloc  ... \n";
+  if ($loader =~ /^elilo/io) {
+    $ret = system("$loaderloc 2>&1 | tee $temp_file_name");
+  } else {
+    $ret = system("$loaderloc >$temp_file_name 2>&1");
+  }
+  if ($ret) {
+    print STDERR "Boot loader failed to run\n";
+    return $ret;
+  }
+  unlink $temp_file_name;
+  print STDERR "Installation successful.\n";
+  return 0;
+}
+
+exit 0;
+
+__END__
+
--- linux-mvl-dove-2.6.32.orig/debian/control-scripts/prerm
+++ linux-mvl-dove-2.6.32/debian/control-scripts/prerm
@@ -0,0 +1,308 @@
+#! /usr/bin/perl
+#                              -*- Mode: Perl -*- 
+# image.prerm --- 
+# Author           : root ( root@melkor.pilgrim.umass.edu ) 
+# Created On       : Fri May 17 03:28:59 1996
+# Created On Node  : melkor.pilgrim.umass.edu
+# Last Modified By : Manoj Srivastava
+# Last Modified On : Sat Aug  5 13:14:17 2006
+# Last Machine Used: glaurung.internal.golden-gryphon.com
+# Update Count     : 85
+# Status           : Unknown, Use with caution!
+# HISTORY          : 
+# Description      : 
+# 
+#
+#    $Id: image.prerm,v 1.22 2003/10/07 16:24:20 srivasta Exp $
+#
+# 
+#use strict;
+
+$|=1;
+# Predefined values:
+my $version         = "=V";
+my $link_in_boot    = "";	# Should be empty, mostly
+my $no_symlink      = "";	# Should be empty, mostly
+my $reverse_symlink = "";	# Should be empty, mostly
+my $do_symlinks     = "Yes";	# target machine defined
+my $do_boot_enable  = "Yes";	# target machine defined
+my $do_bootfloppy   = "Yes";	# target machine defined
+my $do_bootloader   = "Yes";	# target machine defined
+my $move_image      = '';       # target machine defined
+my $kimage          = "=K";	# Should be empty, mostly
+my $loader          = "=L";     # lilo, silo, quik, palo, vmelilo, or nettrom
+my $image_dir       = "/boot";     # where the image is located
+my $clobber_modules = '';       # target machine defined
+my $initrd          = "YES";     # initrd kernel
+my $use_hard_links  = '';       # hardlinks do not wirk across fs boundaries
+my $postinst_hook   = '';       #Normally we do not
+my $postrm_hook     = '';       #Normally we do not
+my $preinst_hook    = '';       #Normally we do not
+my $prerm_hook      = '';       #Normally we do not
+my $minimal_swap    = '';       # Do not swap symlinks
+my $ignore_depmod_err = '';	# normally we do not
+my $relink_build_link = 'YES';	# There is no harm in checking the link
+my $force_build_link = '';	# There is no harm in checking the link
+my $kernel_arch       = "=B";
+my $ramdisk           = "/usr/sbin/update-initramfs";
+my $package_name    = "linux-image-$version";
+
+my $Loader          = "NoLOADER"; # 
+$Loader             = "LILO"     if $loader =~ /^lilo/io;
+$Loader             = "SILO"     if $loader =~ /^silo/io;
+$Loader             = "QUIK"     if $loader =~ /^quik/io;
+$Loader             = "yaboot"   if $loader =~ /^yaboot/io;
+$Loader             = "PALO"     if $loader =~ /^palo/io;
+$Loader             = "NETTROM"  if $loader =~ /^nettrom/io;
+$Loader             = "VMELILO"  if $loader =~ /^vmelilo/io;
+$Loader             = "ZIPL"     if $loader =~ /^zipl/io;
+$Loader             = "ELILO"    if $loader =~ /^elilo/io;
+
+
+# This should not point to /tmp, because of security risks.
+my $temp_file_name = "/var/log/$loader" . "_log.$$";
+
+#known variables
+my $image_dest      = "/";
+my $realimageloc    = "/$image_dir/";
+my $have_conffile   = "";
+my $CONF_LOC        = '/etc/kernel-img.conf';
+my $relative_links = '';
+my $silent_loader   = '';
+my $warn_reboot     = 'Yes';     # Warn that we are installing a version of
+                                 # the kernel we are running
+
+# remove multiple leading slashes; make sure there is at least one.
+$realimageloc  =~ s|^/*|/|o;
+$realimageloc  =~ s|/+|/|o;
+
+my $DEBUG = 0;
+
+# Variables used
+my $image='';
+my $ret=0;
+my $seen='';
+my $answer='';
+my $running = '';
+my $WouldInvalidate = 0;
+
+if ($ARGV[0] && ($ARGV[0] =~ /remove/ || $ARGV[0] =~ /upgrade/)) {
+  if (-l "/usr/doc/linux-image-$version") {
+    unlink "/usr/doc/linux-image-$version";
+  }
+}
+
+# Ignore all invocations uxcept when called on to remove
+exit 0 unless ($ARGV[0] && $ARGV[0] =~ /remove/) ;
+
+# Paranoid check to make sure that the correct value is put in there
+if (! $kimage)                    { $kimage = "vmlinuz";} # Hmm. empty
+elsif ($kimage =~ m/^b?uImage$/o) { $kimage = "vmlinuz";} # these produce vmlinuz
+elsif ($kimage =~ m/^b?zImage$/o) { $kimage = "vmlinuz";} # these produce vmlinuz
+elsif ($kimage =~ m/^[iI]mage$/o) { my $nop = $kimage;  }
+elsif ($kimage =~ m/^vmlinux$/o)  { my $nop = $kimage;  }
+else                              { $kimage = "vmlinuz";} # Default
+
+if (-r "$CONF_LOC" && -f "$CONF_LOC"  ) {
+  if (open(CONF, "$CONF_LOC")) {
+    while (<CONF>) {
+      chomp;
+      s/\#.*$//g;
+      next if /^\s*$/;
+
+      $do_symlink      = "" if /^\s*do_symlinks\s*=\s*(no|false|0)\s*$/ig;
+      $no_symlink      = "" if /^\s*no_symlinks\s*=\s*(no|false|0)\s*$/ig;
+      $reverse_symlink = "" if /^\s*reverse_symlinks\s*=\s*(no|false|0)\s*$/ig;
+      $link_in_boot    = "" if /^\s*image_in_boot\s*=\s*(no|false|0)\s*$/ig;
+      $link_in_boot    = "" if /^\s*link_in_boot\s*=\s*(no|false|0)\s*$/ig;
+      $move_image      = "" if /^\s*move_image\s*=\s*(no|false|0)\s*$/ig;
+      $clobber_modules = '' if /^\s*clobber_modules\s*=\s*(no|false|0)\s*$/ig;
+      $do_boot_enable  = '' if /^\s*do_boot_enable\s*=\s*(no|false|0)\s*$/ig;
+      $do_bootfloppy   = '' if /^\s*do_bootfloppy\s*=\s*(no|false|0)\s*$/ig;
+      $relative_links  = '' if /^\s*relative_links \s*=\s*(no|false|0)\s*$/ig;
+      $do_bootloader   = '' if /^\s*do_bootloader\s*=\s*(no|false|0)\s*$/ig;
+      $do_initrd       = '' if /^\s*do_initrd\s*=\s*(no|false|0)\s*$/ig;
+      $use_hard_links  = '' if /^\s*use_hard_links\s*=\s*(no|false|0)\s*$/ig;
+      $silent_loader   = '' if /^\s*silent_loader\s*=\s*(no|false|0)\s*$/ig;
+      $warn_reboot     = '' if /^\s*warn_reboot\s*=\s*(no|false|0)\s*$/ig;
+      $minimal_swap    = '' if /^\s*minimal_swap\s*=\s*(no|false|0)\s*$/ig;
+      $ignore_depmod_err = '' if /^\s*ignore_depmod_err\s*=\s*(no|false|0)\s*$/ig;
+      $relink_build_link = '' if /^\s*relink_build_link\s*=\s*(no|false|0)\s*$/ig;
+      $force_build_link = '' if /^\s*force_build_link\s*=\s*(no|false|0)\s*$/ig;
+
+
+      $do_symlink      = "Yes" if /^\s*do_symlinks\s*=\s*(yes|true|1)\s*$/ig;
+      $no_symlink      = "Yes" if /^\s*no_symlinks\s*=\s*(yes|true|1)\s*$/ig;
+      $reverse_symlink = "Yes" if /^\s*reverse_symlinks\s*=\s*(yes|true|1)\s*$/ig;
+      $link_in_boot    = "Yes" if /^\s*image_in_boot\s*=\s*(yes|true|1)\s*$/ig;
+      $link_in_boot    = "Yes" if /^\s*link_in_boot\s*=\s*(yes|true|1)\s*$/ig;
+      $move_image      = "Yes" if /^\s*move_image\s*=\s*(yes|true|1)\s*$/ig;
+      $clobber_modules = "Yes" if /^\s*clobber_modules\s*=\s*(yes|true|1)\s*$/ig;
+      $do_boot_enable  = "Yes" if /^\s*do_boot_enable\s*=\s*(yes|true|1)\s*$/ig;
+      $do_bootfloppy   = "Yes" if /^\s*do_bootfloppy\s*=\s*(yes|true|1)\s*$/ig;
+      $do_bootloader   = "Yes" if /^\s*do_bootloader\s*=\s*(yes|true|1)\s*$/ig;
+      $relative_links  = "Yes" if /^\s*relative_links\s*=\s*(yes|true|1)\s*$/ig;
+      $do_initrd       = "Yes" if /^\s*do_initrd\s*=\s*(yes|true|1)\s*$/ig;
+      $use_hard_links  = "Yes" if /^\s*use_hard_links\s*=\s*(yes|true|1)\s*$/ig;
+      $silent_loader   = 'Yes' if /^\s*silent_loader\s*=\s*(yes|true|1)\s*$/ig;
+      $warn_reboot     = 'Yes' if /^\s*warn_reboot\s*=\s*(yes|true|1)\s*$/ig;
+      $minimal_swap    = 'Yes' if /^\s*minimal_swap\s*=\s*(yes|true|1)\s*$/ig;
+      $ignore_depmod_err = 'Yes' if /^\s*ignore_depmod_err\s*=\s*(yes|true|1)\s*$/ig;
+      $relink_build_link = 'Yes' if /^\s*relink_build_link\s*=\s*(yes|true|1)\s*$/ig;
+      $force_build_link = 'Yes' if /^\s*force_build_link\s*=\s*(yes|true|1)\s*$/ig;
+
+      $image_dest      = "$1"  if /^\s*image_dest\s*=\s*(\S+)/ig;
+      $postinst_hook   = "$1"  if /^\s*postinst_hook\s*=\s*(\S+)/ig;
+      $postrm_hook     = "$1"  if /^\s*postrm_hook\s*=\s*(\S+)/ig;
+      $preinst_hook    = "$1"  if /^\s*preinst_hook\s*=\s*(\S+)/ig;
+      $prerm_hook      = "$1"  if /^\s*prerm_hook\s*=\s*(\S+)/ig;
+      $ramdisk         = "$1"  if /^\s*ramdisk\s*=\s*(.+)$/ig;
+    }
+    close CONF;
+    $have_conffile = "Yes";
+  }
+}
+
+
+$ENV{KERNEL_ARCH}=$kernel_arch if $kernel_arch;
+
+#check to see if we are trying to remove a running kernel
+# if so we abort right now.
+chop($running=`uname -r`);
+if ($running eq $version) {
+  print STDERR "WARN: Proceeding with removing running kernel image.\n";
+}
+
+#Now, they have an alternate kernel which they are currently running
+
+# This is just us being nice to lilo users.
+
+chdir("/") or die "could not chdir to /:$!\n";
+
+if (-f "/etc/$loader.conf") { #I know, could be a link, but ..
+  open (LILO, "/etc/$loader.conf") || &success(); # this is not critical
+  while (<LILO>) {
+    chop;
+    s/\#.*//;			  # nix the comments
+    next unless /^\s*image\s*=\s(\S+)/o;
+    $image = $1;
+    if ($image && -e $image) {
+      while (defined($image) && -l $image) {
+	$image = readlink ($image);
+      }
+      if (defined($image) && -e $image) {
+	$WouldInvalidate |= $image =~ /$kimage-$version/;
+      }
+      else {
+	&success(); # invalid $loader.conf file
+      }
+    }
+    else {
+      &success(); # invalid $loader.conf file
+    }
+  }
+  close (LILO);
+  if ($WouldInvalidate) {
+    print STFERR "WARN: Proceeding with removing running kernel image.\n";
+    &success();
+  }
+}
+
+
+# set the env var stem
+$ENV{'STEM'} = "linux";
+
+sub exec_script {
+  my $type   = shift;
+  my $script = shift;
+  print STDERR "Running $type hook script $script.\n";
+  system ("$script $version $realimageloc$kimage-$version") &&
+    print STDERR "User $type hook script [$script] ";
+  if ($?) {
+    if ($? == -1) {
+      print STDERR "failed to execute: $!\n";
+    }
+    elsif ($? & 127) {
+      printf STDERR "died with signal %d, %s coredump\n",
+        ($? & 127),  ($? & 128) ? 'with' : 'without';
+    }
+    else {
+      printf STDERR "exited with value %d\n", $? >> 8;
+    }
+    exit $? >> 8;
+  }
+}
+sub run_hook {
+  my $type   = shift;
+  my $script = shift;
+  if ($script =~ m,^/,) {
+    # Full path provided for the hook script
+    if (-x "$script") {
+      &exec_script($type,$script);
+    }
+    else {
+      die "The provided $type hook script [$script] could not be run.\n";
+    }
+  }
+  else {
+    # Look for it in a safe path
+    for my $path ('/bin', '/sbin', '/usr/bin', '/usr/sbin') {
+      if (-x "$path/$script") {
+        &exec_script($type, "$path/$script");
+        return 0;
+      }
+    }
+    # No luck
+    print STDERR "Could not find $type hook script [$script].\n";
+    die "Looked in: '/bin', '/sbin', '/usr/bin', '/usr/sbin'\n";
+  }
+}
+
+
+## Run user hook script here, if any
+if (-x "$prerm_hook") {
+  &run_hook("prerm", $prerm_hook);
+}
+if (-d "/etc/kernel/prerm.d") {
+  print STDERR "Examining /etc/kernel/prerm.d.\n";
+  system ("run-parts --verbose --exit-on-error --arg=$version " . 
+          "--arg=$realimageloc$kimage-$version /etc/kernel/prerm.d") &&
+            die "Failed to process /etc/kernel/prerm.d";
+}
+if (-d "/etc/kernel/prerm.d/$version") {
+  print STDERR "Examining /etc/kernel/prerm.d/$version.\n";
+  system ("run-parts --verbose --exit-on-error --arg=$version" .
+          " --arg=$realimageloc$kimage-$version " .
+          "/etc/kernel/prerm.d/$version") &&
+            die "Failed to process /etc/kernel/prerm.d/$version";
+}
+
+sub success () {
+  my @files_to_remove = qw{
+    modules.dep modules.isapnpmap modules.pcimap
+    modules.usbmap modules.parportmap
+    modules.generic_string modules.ieee1394map
+    modules.ieee1394map modules.pnpbiosmap
+    modules.alias modules.ccwmap modules.inputmap
+    modules.symbols modules.ofmap modules.seriomap
+    modules.alias.bin modules.builtin.bin modules.dep.bin modules.symbols.bin
+  };
+
+  foreach my $extra_file (@files_to_remove) {
+    if (-f "/lib/modules/$version/$extra_file") {
+      unlink "/lib/modules/$version/$extra_file";
+    }
+  }
+  exit 0;
+}
+
+
+
+&success();
+exit 0;
+__END__
+
+
+
+
+
--- linux-mvl-dove-2.6.32.orig/debian/control-scripts/headers-postinst
+++ linux-mvl-dove-2.6.32/debian/control-scripts/headers-postinst
@@ -0,0 +1,126 @@
+#!/usr/bin/perl
+#                              -*- Mode: Cperl -*- 
+# debian.postinst ---
+# Author           : Manoj Srivastava ( srivasta@pilgrim.umass.edu )
+# Created On       : Sat Apr 27 05:42:43 1996
+# Created On Node  : melkor.pilgrim.umass.edu
+# Last Modified By : Manoj Srivastava
+# Last Modified On : Sat Aug  5 13:20:22 2006
+# Last Machine Used: glaurung.internal.golden-gryphon.com
+# Update Count     : 45
+# Status           : Unknown, Use with caution!
+# HISTORY          :
+# Description      :
+#
+#
+#
+#  arch-tag: 1c716174-2f0a-476d-a626-a1322e62503a
+#
+
+
+$|=1;
+
+# Predefined values:
+my $version           = "=V";
+my $kimage            = "=K";
+my $package_name    = "linux-image-$version";
+
+
+# Ignore all invocations uxcept when called on to configure.
+exit 0 unless ($ARGV[0] && $ARGV[0] =~ /configure/);
+
+#known variables
+my $image_dest      = "/";
+my $realimageloc    = "/boot/";
+my $silent_modules  = '';
+my $modules_base    = '/lib/modules';
+my $CONF_LOC        = '/etc/kernel-img.conf';
+# remove multiple leading slashes; make sure there is at least one.
+$realimageloc  =~ s|^/*|/|o;
+$realimageloc  =~ s|/+|/|o;
+
+chdir '/usr/src' or die "Could not chdir to /usr/src:$!";
+
+if (-r "$CONF_LOC" && -f "$CONF_LOC"  ) {
+  if (open(CONF, "$CONF_LOC")) {
+    while (<CONF>) {
+      chomp;
+      s/\#.*$//g;
+      next if /^\s*$/;
+
+      $header_postinst_hook   = "$1"  if /^\s*header_postinst_hook\s*=\s*(\S+)/ig;
+    }
+    close CONF;
+  }
+}
+
+sub exec_script {
+  my $type   = shift;
+  my $script = shift;
+  print STDERR "Running $type hook script $script.\n";
+  system ("$script $version $realimageloc$kimage-$version") &&
+    print STDERR "User $type hook script [$script] ";
+  if ($?) {
+    if ($? == -1) {
+      print STDERR "failed to execute: $!\n";
+    }
+    elsif ($? & 127) {
+      printf STDERR "died with signal %d, %s coredump\n",
+        ($? & 127),  ($? & 128) ? 'with' : 'without';
+    }
+    else {
+      printf STDERR "exited with value %d\n", $? >> 8;
+    }
+    exit $? >> 8;
+  }
+}
+sub run_hook {
+  my $type   = shift;
+  my $script = shift;
+  if ($script =~ m,^/,) {
+    # Full path provided for the hook script
+    if (-x "$script") {
+      &exec_script($type,$script);
+    }
+    else {
+      die "The provided $type hook script [$script] could not be run.\n";
+    }
+  }
+  else {
+    # Look for it in a safe path
+    for my $path ('/bin', '/sbin', '/usr/bin', '/usr/sbin') {
+      if (-x "$path/$script") {
+        &exec_script($type, "$path/$script");
+        return 0;
+      }
+    }
+    # No luck
+    print STDERR "Could not find $type hook script [$script].\n";
+    die "Looked in: '/bin', '/sbin', '/usr/bin', '/usr/sbin'\n";
+  }
+}
+
+## Run user hook script here, if any
+if (-x "$header_postinst_hook") {
+  &run_hook("postinst", $header_postinst_hook);
+}
+
+if (-d "/etc/kernel/header_postinst.d") {
+  print STDERR "Examining /etc/kernel/header_postinst.d.\n";
+  system ("run-parts --verbose --exit-on-error --arg=$version " .
+          "--arg=$realimageloc$kimage-$version " .
+          "/etc/kernel/header_postinst.d") &&
+            die "Failed to process /etc/kernel/header_postinst.d";
+}
+
+if (-d "/etc/kernel/header_postinst.d/$version") {
+  print STDERR "Examining /etc/kernel/header_postinst.d/$version.\n";
+  system ("run-parts --verbose --exit-on-error --arg=$version " .
+          "--arg=$realimageloc$kimage-$version " .
+          "/etc/kernel/header_postinst.d/$version") &&
+            die "Failed to process /etc/kernel/header_postinst.d/$version";
+}
+
+exit 0;
+
+__END__
--- linux-mvl-dove-2.6.32.orig/debian/control-scripts/preinst
+++ linux-mvl-dove-2.6.32/debian/control-scripts/preinst
@@ -0,0 +1,299 @@
+#! /usr/bin/perl
+#                              -*- Mode: Cperl -*-
+# image.preinst ---
+# Author           : Manoj Srivastava ( srivasta@tiamat.datasync.com )
+# Created On       : Sun Jun 14 03:38:02 1998
+# Created On Node  : tiamat.datasync.com
+# Last Modified By : Manoj Srivastava
+# Last Modified On : Sun Sep 24 14:04:42 2006
+# Last Machine Used: glaurung.internal.golden-gryphon.com
+# Update Count     : 99
+# Status           : Unknown, Use with caution!
+# HISTORY          :
+# Description      :
+#
+#
+
+#
+#use strict; #for debugging
+
+use Debconf::Client::ConfModule qw(:all);
+version('2.0');
+my $capb=capb("backup");
+
+$|=1;
+
+# Predefined values:
+my $version         = "=V";
+my $link_in_boot    = "";     # Should be empty, mostly
+my $no_symlink      = "";     # Should be empty, mostly
+my $reverse_symlink = "";     # Should be empty, mostly
+my $do_symlink      = "Yes";	# target machine defined
+my $do_boot_enable  = "Yes";	# target machine defined
+my $do_bootfloppy   = "Yes";	# target machine defined
+my $do_bootloader   = "Yes";	# target machine defined
+my $move_image      = '';       # target machine defined
+my $kimage          = "=K";     # Should be empty, mostly
+my $loader          = "=L";     # lilo, silo, quik, palo, vmelilo, nettrom
+                                # or elilo
+my $image_dir       = "/boot";     # where the image is located
+my $initrd          = "YES";     # initrd kernel
+my $use_hard_links  = '';       # hardlinks do not wirk across fs boundaries
+my $postinst_hook   = '';       #Normally we do not
+my $postrm_hook     = '';       #Normally we do not
+my $preinst_hook    = '';       #Normally we do not
+my $prerm_hook      = '';       #Normally we do not
+my $minimal_swap    = '';       # Do not swap symlinks
+my $ignore_depmod_err = '';    # normally we do not
+my $relink_src_link   = 'YES';	# There is no harm in checking the link
+my $relink_build_link = 'YES'; # There is no harm in checking the link
+my $force_build_link  = '';	 # There is no harm in checking the link
+my $kernel_arch       = "=B";
+my $ramdisk           = "/usr/sbin/update-initramfs";  # List of tools to create initial ram fs.
+my $package_name    = "linux-image-$version";
+
+my $Loader          = "NoLOADER"; #
+$Loader             = "LILO"     if $loader =~ /^lilo/io;
+$Loader             = "SILO"     if $loader =~ /^silo/io;
+$Loader             = "QUIK"     if $loader =~ /^quik/io;
+$Loader             = "yaboot"   if $loader =~ /^yaboot/io;
+$Loader             = "PALO"     if $loader =~ /^palo/io;
+$Loader             = "NETTROM"  if $loader =~ /^nettrom/io;
+$Loader             = "VMELILO"  if $loader =~ /^vmelilo/io;
+$Loader             = "ZIPL"     if $loader =~ /^zipl/io;
+$Loader             = "ELILO"    if $loader =~ /^elilo/io;
+
+
+#known variables
+my @boilerplate     = ();
+my @silotemplate    = ();
+my @quiktemplate    = ();
+my @palotemplate    = ();
+my @vmelilotemplate = ();
+my $bootdevice      = '';
+my $rootdevice      = '';
+my $rootdisk        = '';
+my $rootpartition   = '';
+my $image_dest      = "/";
+my $realimageloc    = "/$image_dir/";
+my $have_conffile   = "";
+my $CONF_LOC        = '/etc/kernel-img.conf';
+my $relative_links  = '';
+my $silent_loader   = '';
+my $warn_reboot     = '';        # Warn that we are installing a version of
+                                 # the kernel we are running
+
+my $modules_base    = '/lib/modules';
+
+die "Pre inst Internal error. Aborting." unless $version;
+
+exit 0 if $ARGV[0] =~ /abort-upgrade/;
+exit 1 unless $ARGV[0] =~ /(install|upgrade)/;
+
+# remove multiple leading slashes; make sure there is at least one.
+$realimageloc  =~ s|^/*|/|o;
+$realimageloc  =~ s|/+|/|o;
+
+if (-r "$CONF_LOC" && -f "$CONF_LOC"  ) {
+  if (open(CONF, "$CONF_LOC")) {
+    while (<CONF>) {
+      chomp;
+      s/\#.*$//g;
+      next if /^\s*$/;
+
+      $do_symlink      = "" if /^\s*do_symlinks\s*=\s*(no|false|0)\s*$/ig;
+      $no_symlink      = "" if /^\s*no_symlinks\s*=\s*(no|false|0)\s*$/ig;
+      $reverse_symlink = "" if /^\s*reverse_symlinks\s*=\s*(no|false|0)\s*$/ig;
+      $link_in_boot    = "" if /^\s*image_in_boot\s*=\s*(no|false|0)\s*$/ig;
+      $link_in_boot    = "" if /^\s*link_in_boot\s*=\s*(no|false|0)\s*$/ig;
+      $move_image      = "" if /^\s*move_image\s*=\s*(no|false|0)\s*$/ig;
+      $do_boot_enable  = '' if /^\s*do_boot_enable\s*=\s*(no|false|0)\s*$/ig;
+      $do_bootfloppy   = '' if /^\s*do_bootfloppy\s*=\s*(no|false|0)\s*$/ig;
+      $do_bootloader   = '' if /^\s*do_bootloader\s*=\s*(no|false|0)\s*$/ig;
+      $relative_links  = '' if /^\s*relative_links \s*=\s*(no|false|0)\s*$/ig;
+      $use_hard_links  = '' if /^\s*use_hard_links\s*=\s*(no|false|0)\s*$/ig;
+      $silent_loader   = '' if /^\s*silent_loader\s*=\s*(no|false|0)\s*$/ig;
+      $warn_reboot     = '' if /^\s*warn_reboot\s*=\s*(no|false|0)\s*$/ig;
+      $minimal_swap    = '' if /^\s*minimal_swap\s*=\s*(no|false|0)\s*$/ig;
+      $ignore_depmod_err = '' if /^\s*ignore_depmod_err\s*=\s*(no|false|0)\s*$/ig;
+      $relink_src_link   = '' if /^\s*relink_src_link\s*=\s*(no|false|0)\s*$/ig;
+      $relink_build_link = '' if /^\s*relink_build_link\s*=\s*(no|false|0)\s*$/ig;
+      $force_build_link = '' if /^\s*force_build_link\s*=\s*(no|false|0)\s*$/ig;
+
+      $do_symlink      = "Yes" if /^\s*do_symlinks\s*=\s*(yes|true|1)\s*$/ig;
+      $no_symlink      = "Yes" if /^\s*no_symlinks\s*=\s*(yes|true|1)\s*$/ig;
+      $reverse_symlink = "Yes" if /^\s*reverse_symlinks\s*=\s*(yes|true|1)\s*$/ig;
+      $link_in_boot    = "Yes" if /^\s*image_in_boot\s*=\s*(yes|true|1)\s*$/ig;
+      $link_in_boot    = "Yes" if /^\s*link_in_boot\s*=\s*(yes|true|1)\s*$/ig;
+      $move_image      = "Yes" if /^\s*move_image\s*=\s*(yes|true|1)\s*$/ig;
+      $do_boot_enable  = "Yes" if /^\s*do_boot_enable\s*=\s*(yes|true|1)\s*$/ig;
+      $do_bootfloppy   = "Yes" if /^\s*do_bootfloppy\s*=\s*(yes|true|1)\s*$/ig;
+      $do_bootloader   = "Yes" if /^\s*do_bootloader\s*=\s*(yes|true|1)\s*$/ig;
+      $relative_links  = "Yes" if /^\s*relative_links\s*=\s*(yes|true|1)\s*$/ig;
+      $use_hard_links  = "Yes" if /^\s*use_hard_links\s*=\s*(yes|true|1)\s*$/ig;
+      $silent_loader   = 'Yes' if /^\s*silent_loader\s*=\s*(yes|true|1)\s*$/ig;
+      $warn_reboot     = 'Yes' if /^\s*warn_reboot\s*=\s*(yes|true|1)\s*$/ig;
+      $minimal_swap    = 'Yes' if /^\s*minimal_swap\s*=\s*(yes|true|1)\s*$/ig;
+      $ignore_depmod_err = 'Yes' if /^\s*ignore_depmod_err\s*=\s*(yes|true|1)\s*$/ig;
+      $relink_src_link   = 'Yes' if /^\s*relink_src_link\s*=\s*(yes|true|1)\s*$/ig;
+      $relink_build_link = 'Yes' if /^\s*relink_build_link\s*=\s*(yes|true|1)\s*$/ig;
+      $force_build_link = 'Yes' if /^\s*force_build_link\s*=\s*(yes|true|1)\s*$/ig;
+
+      $image_dest      = "$1"  if /^\s*image_dest\s*=\s*(\S+)/ig;
+      $postinst_hook   = "$1"  if /^\s*postinst_hook\s*=\s*(\S+)/ig;
+      $postrm_hook     = "$1"  if /^\s*postrm_hook\s*=\s*(\S+)/ig;
+      $preinst_hook    = "$1"  if /^\s*preinst_hook\s*=\s*(\S+)/ig;
+      $prerm_hook      = "$1"  if /^\s*prerm_hook\s*=\s*(\S+)/ig;
+      $ramdisk         = "$1"  if /^\s*ramdisk\s*=\s*(.+)$/ig;
+    }
+    close CONF;
+    $have_conffile = "Yes";
+    $have_conffile = "Yes";	# stop perl complaining
+  }
+}
+
+$ENV{KERNEL_ARCH}=$kernel_arch if $kernel_arch;
+
+# About to upgrade this package from version $2 TO THIS VERSION.
+# "prerm upgrade" has already been called for the old version of
+# this package.
+
+sub find_initrd_tool {
+  my $hostversion = shift;
+  my $version = shift;
+  my @ramdisks =
+    grep {
+      my $args = 
+        "$_ " .
+          "--supported-host-version=$hostversion " .
+            "--supported-target-version=$version " .
+              "1>/dev/null 2>&1"
+                ;
+      system($args) == 0;
+    }
+      split (/[:,\s]+/, $ramdisk);
+}
+
+sub check {
+  my $version = shift;
+  my $lib_modules="$modules_base/$version";
+  my $message = '';
+
+  if (-d "$lib_modules") {
+    opendir(DIR, $lib_modules) || die "can’t opendir $lib_modules: $!";
+    my @children = readdir(DIR);
+    if ($#children > 1) {
+      my @dirs  = grep { -d "$lib_modules/$_" } @children;
+      if ($#dirs > 1) { # we have subdirs
+        my $dir_message='';
+        for my $dir (@dirs) {
+          if ($dir =~/kernel$/) {
+            $dir_message="An older install was detected.\n";
+          }
+          else {
+            $dir_message="Module sub-directories were detected.\n"
+              unless $dir_message;
+          }
+        }
+        $message += $dir_message if $dir_message;
+      }
+
+      my @links = grep { -l "$lib_modules/$_" } @children;
+      if ($#links > -1) {
+        my $links_message = '';
+        for my $link (@links) {
+          next if ($link =~ /^build$/);
+          next if ($link =~ /^source$/);
+          $links_message = "Symbolic links were detected in $modules_base/$version.\n";
+        }
+        $message += $links_message if $links_message;
+      }
+      my @files = grep { -f "$lib_modules/$_" } @children;
+      $message += "Additional files also exist in $modules_base/$version.\n"
+        if ($#files > -1);
+    }
+  }
+  else { $message .= "$lib_modules does not exist. ";}
+  return $message;
+}
+
+if (-d "$modules_base/$version") {
+  my $errors=check($version);
+  warn "Info:\n$errors\n" if $errors;
+}
+
+# set the env var stem
+$ENV{'STEM'} = "linux";
+
+sub exec_script {
+  my $type   = shift;
+  my $script = shift;
+  print STDERR "Running $type hook script $script.\n";
+  system ("$script $version $realimageloc$kimage-$version") &&
+    print STDERR "User $type hook script [$script] ";
+  if ($?) {
+    if ($? == -1) {
+      print STDERR "failed to execute: $!\n";
+    }
+    elsif ($? & 127) {
+      printf STDERR "died with signal %d, %s coredump\n",
+        ($? & 127),  ($? & 128) ? 'with' : 'without';
+    }
+    else {
+      printf STDERR "exited with value %d\n", $? >> 8;
+    }
+    exit $? >> 8;
+  }
+}
+sub run_hook {
+  my $type   = shift;
+  my $script = shift;
+  if ($script =~ m,^/,) {
+    # Full path provided for the hook script
+    if (-x "$script") {
+      &exec_script($type,$script);
+    }
+    else {
+      die "The provided $type hook script [$script] could not be run.\n";
+    }
+  }
+  else {
+    # Look for it in a safe path
+    for my $path ('/bin', '/sbin', '/usr/bin', '/usr/sbin') {
+      if (-x "$path/$script") {
+        &exec_script($type, "$path/$script");
+        return 0;
+      }
+    }
+    # No luck
+    print STDERR "Could not find $type hook script [$script].\n";
+    die "Looked in: '/bin', '/sbin', '/usr/bin', '/usr/sbin'\n";
+  }
+}
+
+
+## Run user hook script here, if any
+if (-x "$preinst_hook") {
+  &run_hook("preinst", $preinst_hook);
+}
+if (-d "/etc/kernel/preinst.d") {
+  print STDERR "Examining /etc/kernel/preinst.d/\n";
+  system ("run-parts --verbose --exit-on-error --arg=$version" .
+          " --arg=$realimageloc$kimage-$version" .
+          " /etc/kernel/preinst.d") &&
+            die "Failed to process /etc/kernel/preinst.d";
+}
+if (-d "/etc/kernel/preinst.d/$version") {
+  print STDERR "Examining /etc/kernel/preinst.d/$version.\n";
+  system ("run-parts --verbose --exit-on-error --arg=$version" .
+          " --arg=$realimageloc$kimage-$version" .
+          " /etc/kernel/preinst.d/$version") &&
+            die "Failed to process /etc/kernel/preinst.d/$version";
+}
+print STDERR "Done.\n";
+
+exit 0;
+
+__END__
+
+
--- linux-mvl-dove-2.6.32.orig/debian/tests/check-aliases
+++ linux-mvl-dove-2.6.32/debian/tests/check-aliases
@@ -0,0 +1,24 @@
+#!/usr/bin/perl -w
+
+my %map;
+
+print "Checking for dupe aliases in $ENV{'FLAVOUR'}...\n";
+
+$aliases =
+  "$ENV{'INSTALL_DIR'}/lib/modules/$ENV{'VERSION'}-$ENV{'FLAVOUR'}/modules.alias";
+
+open(ALIASES, "< $aliases") or die "Could not open $aliases";
+
+while (<ALIASES>) {
+	chomp;
+	my ($junk, $alias, $module) = split;
+
+	if (defined($map{$alias})) {
+		printf("%s %20s / %-20s : %s \n", ("$map{$alias}" eq "$module")
+			? "INT" : "   ", $map{$alias}, $module, $alias);
+	} else {
+		$map{$alias} = $module;
+	}
+}
+
+exit(0);
--- linux-mvl-dove-2.6.32.orig/debian/tests/README
+++ linux-mvl-dove-2.6.32/debian/tests/README
@@ -0,0 +1,21 @@
+Scripts placed in this directory get called one at a time by run-parts(8).
+The scripts are expected to perform some sort of sanity checks on the
+finished build. Scripts will be called once for each flavour.
+
+Some environment variables are exported to make life a little easier:
+
+DPKG_ARCH     : The dpkg architecture (e.g. "amd64")
+KERN_ARCH     : The kernel architecture (e.g. "x86_64")
+FLAVOUR       : The specific flavour for this run (e.g. "generic")
+VERSION       : The full version of this build (e.g. 2.6.22-1)
+REVISION      : The exact revision of this build (e.g. 1.3)
+PREV_REVISION : The revision prior to this one
+ABI_NUM       : The specific ABI number for this build (e.g. 2)
+PREV_ABI_NUM  : The previous ABI number. Can be the same as ABI_NUM.
+BUILD_DIR     : The directory where this build took place
+INSTALL_DIR   : The directory where the package is prepared
+SOURCE_DIR    : Where the main kernel source is
+
+Scripts are expected to have a zero exit status when no problems occur,
+and non-zero when an error occurs that should stop the build. Scripts
+should print whatever info they deem needed to deduce the problem.
--- linux-mvl-dove-2.6.32.orig/debian/docs/README.inclusion-list
+++ linux-mvl-dove-2.6.32/debian/docs/README.inclusion-list
@@ -0,0 +1,51 @@
+This README describes the reason for, and the use of, module
+inclusion lists.
+
+The original Hardy release had the notion of sub-flavours,
+e.g., a flavour that was constructed as a subset of an existing flavour.
+For example, the virtual flavour was extracted from the server flavour using
+a subset of the server flavour modules. However, there were some difficult
+mainteneance issues with regard to packaging, make rules, and scripts. This
+re-implementation of the sub-flavours philosophy is hopefully simpler,
+and retrofitable to all releases.
+
+A module inclusion list looks at the problem of of constructing a package
+from the perspective of what modules do we _want_ in the package, as opposed
+to what modules we _don't_ want. As the kernel matures, more and more devices are added
+which makes the problem of configuration maintenance a real pain in the ass.
+If we took the approach of disabling all of the config options that we don't want,
+then the differences between flavours will quickly become quite large, making
+it difficult to quickly compare the individual flavour configs.  Each time a
+new config option is added then we also have to make a decision about disabling in
+order to continue to keep the minimal number of modules.
+
+A module inclusion list is applied on a per-flavour basis. For example,
+debian.<BRANCH>/control.d/${flavour}.inclusion-list. For example, the
+config for virtual is very close to server and generic, but the inclusion list
+causes the virtual package to be constructed with _only_ the modules described 
+in the inclusion list.
+
+The inclusion list format is a simple bash regular expression list of files. For example,
+
+arch/*/{crypto,kernel,oprofile}
+drivers/acpi/*
+drivers/ata/ahci.ko
+
+These 3 regular expression forms are suitable for expansion by bash and as inputs to 'find'.
+See debian/scripts/module-inclusion for details.
+
+There are 2 log files created as a side effect of the application of the module
+inclusion list; $(flavour).inclusion-list.log and $(flavour).depmod.log.
+
+$(flavour).inclusion-list.log : This log is created while the inclusion list
+modules are being copied. If any are missing, then those warnings go in this log.
+While its not considered a fatal error, you should endevour to correct your inclusion
+list such that there are no missing modules.
+
+$(flavour).depmod.log : The log is created as a result of running depmod on the
+resulting set of modules. If there are missing symbols then you'll find that information
+here. Again, you should modify your inclusion list such that there are no missing
+symbols.
+
+Tim Gardner <tim.gardner@canonical.com>
+June 2, 2010
--- linux-mvl-dove-2.6.32.orig/debian/scripts/module-inclusion
+++ linux-mvl-dove-2.6.32/debian/scripts/module-inclusion
@@ -0,0 +1,51 @@
+#!/bin/bash
+
+#
+# Build a new directory of modules based on an inclusion list.
+# The includsion list format must be a bash regular expression.
+#
+# usage: $0 ROOT INCLUSION_LIST
+# example: $0 debian/build/build-virtual debian.master/control.d/virtual.inclusion-list
+ROOT=$1
+ILIST=$2
+
+NROOT=${ROOT}.new
+
+#
+# Prep a destination directory.
+#
+mkdir -p ${NROOT}
+rsync -a --exclude="*.ko" ${ROOT}/ ${NROOT}
+
+cat ${ILIST} |while read i
+do
+	#
+	# 'find' blurts a warning if it cannot find any ko files.
+	#
+	if echo "$i" | grep '\*' > /dev/null
+	then
+		(cd ${ROOT}; eval find "${i}" -name "*.ko") |while read f
+		do
+			mkdir -p ${NROOT}/`dirname $f`
+			cp ${ROOT}/$f ${NROOT}/$f
+		done
+	else
+		if [ -f "${ROOT}/$i" ]
+		then
+			mkdir -p ${NROOT}/`dirname $i`
+			cp ${ROOT}/$i ${NROOT}/$i
+		else
+			echo Warning: Could not find ${ROOT}/$i
+		fi
+	fi
+
+done
+
+#
+# Cleanup
+#
+rm -rf ${ROOT}
+mv ${NROOT} ${ROOT}
+
+exit 0
+
--- linux-mvl-dove-2.6.32.orig/debian/scripts/control-create
+++ linux-mvl-dove-2.6.32/debian/scripts/control-create
@@ -0,0 +1,25 @@
+#!/bin/bash
+
+. debian/debian.env
+
+vars=$1
+
+. $vars
+
+if [ "$is_sub" = "" ]; then
+	flavour=$(basename $vars | sed 's/.*\.//')
+	stub=${DEBIAN}/control.d/flavour-control.stub
+else
+	flavour=$(basename $vars .vars)
+	stub=${DEBIAN}/sub-flavours/control.stub
+fi
+
+cat $stub | grep -v '^#' | sed			\
+	-e "s#FLAVOUR#$flavour#g"		\
+	-e "s#DESC#$desc#g"			\
+	-e "s#ARCH#$arch#g"			\
+	-e "s#SUPPORTED#$supported#g"		\
+	-e "s#TARGET#$target#g"			\
+	-e "s#BOOTLOADER#$bootloader#g" 	\
+	-e "s#=PROVIDES=#$provides#g"		\
+	-e "s#=CONFLICTS=#$conflicts#g"
--- linux-mvl-dove-2.6.32.orig/debian/scripts/config-check
+++ linux-mvl-dove-2.6.32/debian/scripts/config-check
@@ -0,0 +1,389 @@
+#!/usr/bin/perl
+#
+# check-config -- check the current config for issues
+#
+use strict;
+
+my $P = 'check-config';
+
+my $test = -1;
+if ($ARGV[0] eq '--test') {
+	$test = $ARGV[1] + 0;
+} elsif ($#ARGV != 4) {
+	die "Usage: $P <config> <arch> <flavour> <commonconfig> <warn-only>\n";
+}
+
+my ($config, $arch, $flavour, $commonconfig, $warn_only) = @ARGV;
+
+my $checks = "$commonconfig/enforce";
+my %values = ();
+
+# If we are in overridden then still perform the checks and emit the messages
+# but do not return failure.  Those items marked FATAL will alway trigger
+# failure.
+my $fail_exit = 1;
+$fail_exit = 0 if ($warn_only eq 'true' || $warn_only eq '1');
+my $exit_val = 0;
+
+# Predicate execution engine.
+sub pred_first {
+	my ($rest) = @_;
+	my $depth = 0;
+	my $off;
+	my $char;
+	my $pred;
+	
+	for ($off = 0; $off <= length($rest); $off++) {
+		$char = substr($rest, $off, 1);
+		if ($char eq '(') {
+			$depth++;
+		} elsif ($char eq ')') {
+			$depth--;
+		} elsif ($depth == 0 && $char eq '&') {
+			last;
+		} elsif ($depth == 0 && $char eq '|') {
+			last;
+		}
+	}
+	if ($depth > 0) {
+		die "$P: $rest: missing close parenthesis ')'\n";
+	} elsif ($depth < 0) {
+		die "$P: $rest: missing open parenthesis '('\n";
+	}
+
+	($pred, $rest) = (substr($rest, 0, $off), substr($rest, $off + 1));
+
+	$pred =~ s/^\s*//;
+	$pred =~ s/\s*$//;
+
+	#print "pred<$pred> rest<$rest> char<$char>\n";
+	($pred, $rest, $char);
+}
+		
+sub pred_do {
+	my ($pred) = @_;
+	my (@a) = split(' ', $pred);
+
+	if ($a[0] eq 'arch') {
+		die "$P: $pred: malformed -- $pred <arch>\n" if ($#a != 1);
+		#print "    *** ARCH<$arch ?? $a[1]>\n";
+		return ($arch eq $a[1])
+	} elsif ($a[0] eq 'flavour') {
+		die "$P: $pred: malformed -- $pred <flavour>\n" if ($#a != 1);
+		#print "    *** FLAVOUR<$flavour ?? $a[1]>\n";
+		return ($flavour eq $a[1])
+	} elsif ($a[0] eq 'value') {
+		die "$P: $pred: malformed -- $pred <name> <val>\n" if ($#a != 2);
+		#print "    *** CHECK<$a[1] $a[2] ?? " . $values{$a[1]} . ">\n";
+		return ($values{$a[1]} eq $a[2]);
+	} elsif ($a[0] eq 'exists') {
+		die "$P: $pred: malformed -- $pred <name>\n" if ($#a != 1);
+		return (defined $values{$a[1]});
+	} else {
+		die "$P: $pred: unknown predicate\n";
+	}
+	return 1;
+}
+sub pred_exec {
+	my ($rest) = @_;
+	my $pred;
+	my $res;
+	my $sep;
+
+	#print "pred_exec<$rest>\n";
+
+	($pred, $rest, $sep) = pred_first($rest);
+
+	# Leading ! implies inversion.
+	if ($pred =~ /^\s*!\s*(.*)$/) {
+		#print " invert<$1>\n";
+		$res = !pred_exec($1);
+
+	# Recurse left for complex expressions.
+	} elsif ($pred =~ /^\s*\((.*)\)\s*$/) {
+		#print " left<$1>\n";
+		$res = pred_exec($1);
+
+	# Check for common syntax issues.
+	} elsif ($pred eq '') {
+		if ($sep eq '&' || $sep eq '|') {
+			die "$P: $pred$rest: malformed binary operator\n";
+		} else {
+			die "$P: $pred$rest: syntax error\n";
+		}
+		
+	# A predicate, execute it.
+	} else {
+		#print " DO<$pred> sep<$sep>\n";
+		$res = pred_do($pred);
+	}
+
+	#print " pre-return res<$res> sep<$sep>\n";
+	if ($sep eq '') {
+		#
+		
+	# Recurse right for binary operators -- note these are lazy.
+	} elsif ($sep eq '&' || $sep eq '|') {
+		#print " right<$rest> ? sep<$sep> res<$res>\n";
+		if ($rest =~ /^\s*($|\||\&)/) {
+			die "$P: $pred$rest: malformed binary operator\n";
+		}
+		if (($res && $sep eq '&') || (!$res && $sep eq '|')) {
+			#print " right<$rest>\n";
+			$res = pred_exec($rest);
+		}
+
+	} else {
+		die "$P: $pred$rest: malformed predicate\n";
+	}
+	#print " return res<$res> sep<$sep>\n";
+	return $res;
+}
+
+#
+# PREDICATE TESTS
+#
+my $test_total = 1;
+my $test_good = 0;
+sub pred_test {
+	my ($pred, $eres, $eerr) = @_;
+	my ($res, $err, $fail);
+
+	$test_total++;
+	if ($test != 0 && $test != $test_total - 1) {
+		return;
+	}
+
+	eval {
+		$res = pred_exec($pred);
+	};
+	$err = $@;
+	chomp($err);
+
+	$res = !!$res;
+	$eres = !!$eres;
+
+	$fail = '';
+	if (defined $eres && $res != $eres) {
+		$fail = "result missmatch, expected $eres returned $res";
+	}
+	if (defined $eerr && $err eq '') {
+		$fail = "error missmatch, expected '$eerr' returned success";
+	} elsif (defined $eerr && $err !~ /$eerr/) {
+		$fail = "error missmatch, expected '$eerr' returned '$err'";
+	} elsif (!defined $eerr && $err ne '') {
+		$fail = "error missmatch, expected success returned '$err'";
+	}
+	
+	if ($fail eq '') {
+		$test_good++;
+	} else {
+		print "$pred: $test_total: FAIL: $fail\n";
+	}
+	#print "TEST<$pred> eres<$eres> eerr<$eerr> res<$res> err<$err>\n";
+}
+if ($test >= 0) {
+	$arch = 'MYARCH';
+	$flavour = 'MYFLAVOUR';
+	%values = ( 'ENABLED' => 'y', 'DISABLED' => 'n' );
+
+	# Errors.
+	my $eunkn = 'unknown predicate';
+	my $epred = 'malformed';
+	my $eclose = 'missing close parenthesis';
+	my $eopen = 'missing open parenthesis';
+	my $ebinary = 'malformed binary operator';
+
+	# Basic predicate tests.
+	print "TEST: $test_total: basic predicate tests ...\n";
+
+	pred_test('nosuchcommand', undef, $eunkn);
+	pred_test('arch', undef, $epred);
+	pred_test('arch MYARCH MYARCH', undef, $epred);
+	pred_test('arch MYARCH', 1, undef);
+	pred_test('arch NOTMYARCH', 0, undef);
+
+	pred_test('flavour', undef, $epred);
+	pred_test('flavour MYFLAVOUR myflavour', undef, $epred);
+	pred_test('flavour MYFLAVOUR', 1, undef);
+	pred_test('flavour NOTMYFLAVOUR', 0, undef);
+
+	pred_test('value', undef, $epred);
+	pred_test('value ENABLED', undef, $epred);
+	pred_test('value ENABLED ENABLED ENABLED', undef, $epred);
+	pred_test('value ENABLED y', 1, undef);
+	pred_test('value ENABLED n', 0, undef);
+	pred_test('value DISABLED n', 1, undef);
+	pred_test('value DISABLED y', 0, undef);
+
+	pred_test('exists', undef, $epred);
+	pred_test('exists ENABLED ENABLED', undef, $epred);
+	pred_test('exists ENABLED', 1, undef);
+	pred_test('exists DISABLED', 1, undef);
+	pred_test('exists MISSING', 0, undef);
+
+	print "TEST: $test_total: inversion tests ...\n";	
+	pred_test('!exists ENABLED', 0, undef);
+	pred_test('!exists MISSING', 1, undef);
+	pred_test('!!exists ENABLED', 1, undef);
+	pred_test('!!exists MISSING', 0, undef);
+	pred_test('!!!exists ENABLED', 0, undef);
+	pred_test('!!!exists MISSING', 1, undef);
+
+	print "TEST: $test_total: parentheses tests ...\n";	
+	pred_test('(exists ENABLED)', 1, undef);
+	pred_test('((exists ENABLED))', 1, undef);
+	pred_test('(((exists ENABLED)))', 1, undef);
+	pred_test('(exists MISSING)', 0, undef);
+	pred_test('((exists MISSING))', 0, undef);
+	pred_test('(((exists MISSING)))', 0, undef);
+
+	pred_test('(!exists ENABLED)', 0, undef);
+	pred_test('((!exists ENABLED))', 0, undef);
+	pred_test('(((!exists ENABLED)))', 0, undef);
+	pred_test('(!exists MISSING)', 1, undef);
+	pred_test('((!exists MISSING))', 1, undef);
+	pred_test('(((!exists MISSING)))', 1, undef);
+
+	pred_test('((!(exists ENABLED)))', 0, undef);
+	pred_test('((!(exists MISSING)))', 1, undef);
+	pred_test('(!((exists ENABLED)))', 0, undef);
+	pred_test('(!((exists MISSING)))', 1, undef);
+	pred_test('!(((exists ENABLED)))', 0, undef);
+	pred_test('!(((exists MISSING)))', 1, undef);
+	pred_test('!((!(exists ENABLED)))', 1, undef);
+	pred_test('!((!(exists MISSING)))', 0, undef);
+	pred_test('!(!(!(exists ENABLED)))', 0, undef);
+	pred_test('!(!(!(exists MISSING)))', 1, undef);
+
+	pred_test('(', undef, $eclose);
+	pred_test('()(', undef, $eclose);
+	pred_test('(())(', undef, $eclose);
+	pred_test('((()))(', undef, $eclose);
+	pred_test('(()', undef, $eclose);
+	pred_test('((())', undef, $eclose);
+	pred_test('(((()))', undef, $eclose);
+	pred_test('(()()', undef, $eclose);
+	pred_test('((())()', undef, $eclose);
+
+	pred_test(')', undef, $eopen);
+	pred_test('())', undef, $eopen);
+	pred_test('(()))', undef, $eopen);
+	pred_test('((())))', undef, $eopen);
+
+	print "TEST: $test_total: binary and tests ...\n";
+
+	pred_test('exists ENABLED &', undef, $ebinary);
+	pred_test('& exists ENABLED', undef, $ebinary);
+	pred_test('exists ENABLED & & exists ENABLED', undef, $ebinary);
+
+	pred_test('exists MISSING & exists MISSING', 0, undef);
+	pred_test('exists MISSING & exists ENABLED', 0, undef);
+	pred_test('exists ENABLED & exists MISSING', 0, undef);
+	pred_test('exists ENABLED & exists ENABLED', 1, undef);
+
+	pred_test('exists MISSING & exists MISSING & exists MISSING', 0, undef);
+	pred_test('exists MISSING & exists MISSING & exists ENABLED', 0, undef);
+	pred_test('exists MISSING & exists ENABLED & exists MISSING', 0, undef);
+	pred_test('exists MISSING & exists ENABLED & exists ENABLED', 0, undef);
+	pred_test('exists ENABLED & exists MISSING & exists MISSING', 0, undef);
+	pred_test('exists ENABLED & exists MISSING & exists ENABLED', 0, undef);
+	pred_test('exists ENABLED & exists ENABLED & exists MISSING', 0, undef);
+	pred_test('exists ENABLED & exists ENABLED & exists ENABLED', 1, undef);
+
+	print "TEST: $test_total: binary or tests ...\n";
+
+	pred_test('exists ENABLED |', undef, $ebinary);
+	pred_test('| exists ENABLED', undef, $ebinary);
+	pred_test('exists ENABLED | | exists ENABLED', undef, $ebinary);
+
+	pred_test('exists MISSING | exists MISSING', 0, undef);
+	pred_test('exists MISSING | exists ENABLED', 1, undef);
+	pred_test('exists ENABLED | exists MISSING', 1, undef);
+	pred_test('exists ENABLED | exists ENABLED', 1, undef);
+
+	pred_test('exists MISSING | exists MISSING | exists MISSING', 0, undef);
+	pred_test('exists MISSING | exists MISSING | exists ENABLED', 1, undef);
+	pred_test('exists MISSING | exists ENABLED | exists MISSING', 1, undef);
+	pred_test('exists MISSING | exists ENABLED | exists ENABLED', 1, undef);
+	pred_test('exists ENABLED | exists MISSING | exists MISSING', 1, undef);
+	pred_test('exists ENABLED | exists MISSING | exists ENABLED', 1, undef);
+	pred_test('exists ENABLED | exists ENABLED | exists MISSING', 1, undef);
+	pred_test('exists ENABLED | exists ENABLED | exists ENABLED', 1, undef);
+
+	print "TEST: $test_total: binary or/and combination tests ...\n";
+
+	pred_test('exists MISSING | exists MISSING & exists MISSING', 0, undef);
+	pred_test('exists MISSING | exists MISSING & exists ENABLED', 0, undef);
+	pred_test('exists MISSING | exists ENABLED & exists MISSING', 0, undef);
+	pred_test('exists MISSING | exists ENABLED & exists ENABLED', 1, undef);
+	pred_test('exists ENABLED | exists MISSING & exists MISSING', 1, undef);
+	pred_test('exists ENABLED | exists MISSING & exists ENABLED', 1, undef);
+	pred_test('exists ENABLED | exists ENABLED & exists MISSING', 1, undef);
+	pred_test('exists ENABLED | exists ENABLED & exists ENABLED', 1, undef);
+
+	print "TEST: $test_total: binary and/or combination tests ...\n";
+
+	pred_test('exists MISSING & exists MISSING | exists MISSING', 0, undef);
+	pred_test('exists MISSING & exists MISSING | exists ENABLED', 0, undef);
+	pred_test('exists MISSING & exists ENABLED | exists MISSING', 0, undef);
+	pred_test('exists MISSING & exists ENABLED | exists ENABLED', 0, undef);
+	pred_test('exists ENABLED & exists MISSING | exists MISSING', 0, undef);
+	pred_test('exists ENABLED & exists MISSING | exists ENABLED', 1, undef);
+	pred_test('exists ENABLED & exists ENABLED | exists MISSING', 1, undef);
+	pred_test('exists ENABLED & exists ENABLED | exists ENABLED', 1, undef);
+
+	$test_total--;
+	print "TEST: $test_good/$test_total succeeded\n";
+
+	exit $exit_val;
+}
+
+# Load up the current configuration values -- FATAL if this fails
+print "$P: $config: loading config\n";
+open(CONFIG, "<$config") || die "$P: $config: open failed -- $! -- aborting\n";
+while (<CONFIG>) {
+	# Pull out values.
+	/^#*\s*(CONFIG_\w+)[\s=](.*)$/ or next;
+	if ($2 eq 'is not set') {
+		$values{$1} = 'n';
+	} else {
+		$values{$1} = $2;
+	}
+}
+close(CONFIG);
+
+# FATAL: Check if we have an enforcement list.
+my $pass = 0;
+my $total = 0;
+my $line = '';
+print "$P: $checks: loading checks\n";
+open(CHECKS, "<$checks") || die "$P: $checks: open failed -- $! -- aborting\n";
+while (<CHECKS>) {
+	/^#/ && next;
+	chomp;
+
+	$line .= $_;
+	if ($line =~ /\\$/) {
+		chop($line);
+		$line .= " ";
+		next;
+	}
+	$line =~ /^\s*$/ && next;
+
+	#print "CHECK: <$line>\n";
+	$total++;
+	my $result = pred_exec($line);
+	if (!$result) {
+		print "$P: FAIL: $line\n";
+		$exit_val = $fail_exit;
+	} else {
+		$pass++;
+	}
+
+	$line = '';
+}
+close(CHECKS);
+
+print "$P: $pass/$total checks passed -- exit $exit_val\n";
+exit $exit_val;
--- linux-mvl-dove-2.6.32.orig/debian/scripts/abi-check
+++ linux-mvl-dove-2.6.32/debian/scripts/abi-check
@@ -0,0 +1,210 @@
+#!/usr/bin/perl -w
+
+my $flavour = shift;
+my $prev_abinum = shift;
+my $abinum = shift;
+my $prev_abidir = shift;
+my $abidir = shift;
+my $skipabi = shift;
+
+my $fail_exit = 1;
+my $EE = "EE:";
+my $errors = 0;
+my $abiskip = 0;
+
+my $count;
+
+print "II: Checking ABI for $flavour...\n";
+
+if (-f "$prev_abidir/ignore"
+    or -f "$prev_abidir/$flavour.ignore" or "$skipabi" eq "true") {
+	print "WW: Explicitly asked to ignore ABI, running in no-fail mode\n";
+	$fail_exit = 0;
+	$abiskip = 1;
+	$EE = "WW:";
+}
+
+if ($prev_abinum != $abinum) {
+	print "II: Different ABI's, running in no-fail mode\n";
+	$fail_exit = 0;
+	$EE = "WW:";
+}
+
+if (not -f "$abidir/$flavour" or not -f "$prev_abidir/$flavour") {
+	print "EE: Previous or current ABI file missing!\n";
+	print "    $abidir/$flavour\n" if not -f "$abidir/$flavour";
+	print "    $prev_abidir/$flavour\n" if not -f "$prev_abidir/$flavour";
+
+	# Exit if the ABI files are missing, but return status based on whether
+	# skip ABI was indicated.
+	if ("$abiskip" eq "1") {
+		exit(0);
+	} else {
+		exit(1);
+	}
+}
+
+my %symbols;
+my %symbols_ignore;
+my %modules_ignore;
+my %module_syms;
+
+# See if we have any ignores
+my $ignore = 0;
+print "    Reading symbols/modules to ignore...";
+
+for $file ("$prev_abidir/../blacklist", "$prev_abidir/../../perm-blacklist") {
+	if (-f $file) {
+		open(IGNORE, "< $file") or
+			die "Could not open $file";
+		while (<IGNORE>) {
+			chomp;
+			if ($_ =~ m/M: (.*)/) {
+				$modules_ignore{$1} = 1;
+			} else {
+				$symbols_ignore{$_} = 1;
+			}
+			$ignore++;
+		}
+		close(IGNORE);
+	}
+}
+print "read $ignore symbols/modules.\n";
+
+sub is_ignored($$) {
+	my ($mod, $sym) = @_;
+
+	die "Missing module name in is_ignored()" if not defined($mod);
+	die "Missing symbol name in is_ignored()" if not defined($sym);
+
+	if (defined($symbols_ignore{$sym}) or defined($modules_ignore{$mod})) {
+		return 1;
+	}
+	return 0;
+}
+
+# Read new syms first
+print "    Reading new symbols ($abinum)...";
+$count = 0;
+open(NEW, "< $abidir/$flavour") or
+	die "Could not open $abidir/$flavour";
+while (<NEW>) {
+	chomp;
+	m/^(\S+)\s(.+)\s(0x[0-9a-f]+)\s(.+)$/;
+	$symbols{$4}{'type'} = $1;
+	$symbols{$4}{'loc'} = $2;
+	$symbols{$4}{'hash'} = $3;
+	$module_syms{$2} = 0;
+	$count++;
+}
+close(NEW);
+print "read $count symbols.\n";
+
+# Now the old symbols, checking for missing ones
+print "    Reading old symbols ($prev_abinum)...";
+$count = 0;
+open(OLD, "< $prev_abidir/$flavour") or
+	die "Could not open $prev_abidir/$flavour";
+while (<OLD>) {
+	chomp;
+	m/^(\S+)\s(.+)\s(0x[0-9a-f]+)\s(.+)$/;
+	$symbols{$4}{'old_type'} = $1;
+	$symbols{$4}{'old_loc'} = $2;
+	$symbols{$4}{'old_hash'} = $3;
+	$count++;
+}
+close(OLD);
+
+print "read $count symbols.\n";
+
+print "II: Checking for missing symbols in new ABI...";
+$count = 0;
+foreach $sym (keys(%symbols)) {
+	if (!defined($symbols{$sym}{'type'})) {
+		print "\n" if not $count;
+		printf("    MISS : %s%s\n", $sym,
+			is_ignored($symbols{$sym}{'old_loc'}, $sym) ? " (ignored)" : "");
+		$count++ if !is_ignored($symbols{$sym}{'old_loc'}, $sym);
+	}
+}
+print "    " if $count;
+print "found $count missing symbols\n";
+if ($count) {
+	print "$EE Symbols gone missing (what did you do!?!)\n";
+	$errors++;
+}
+
+
+print "II: Checking for new symbols in new ABI...";
+$count = 0;
+foreach $sym (keys(%symbols)) {
+	if (!defined($symbols{$sym}{'old_type'})) {
+		print "\n" if not $count;
+		print "    NEW : $sym\n";
+		$count++;
+	}
+}
+print "    " if $count;
+print "found $count new symbols\n";
+if ($count and $prev_abinum == $abinum) {
+	print "WW: Found new symbols within same ABI. Not recommended\n";
+}
+
+print "II: Checking for changes to ABI...\n";
+$count = 0;
+my $moved = 0;
+my $changed_type = 0;
+my $changed_hash = 0;
+foreach $sym (keys(%symbols)) {
+	if (!defined($symbols{$sym}{'old_type'}) or
+	    !defined($symbols{$sym}{'type'})) {
+		next;
+	}
+
+	# Changes in location don't hurt us, but log it anyway
+	if ($symbols{$sym}{'loc'} ne $symbols{$sym}{'old_loc'}) {
+		printf("    MOVE : %-40s : %s => %s\n", $sym, $symbols{$sym}{'old_loc'},
+			$symbols{$sym}{'loc'});
+		$moved++;
+	}
+
+	# Changes to export type are only bad if new type isn't
+	# EXPORT_SYMBOL. Changing things to GPL are bad.
+	if ($symbols{$sym}{'type'} ne $symbols{$sym}{'old_type'}) {
+		printf("    TYPE : %-40s : %s => %s%s\n", $sym, $symbols{$sym}{'old_type'}.
+			$symbols{$sym}{'type'}, is_ignored($symbols{$sym}{'loc'}, $sym)
+			? " (ignored)" : "");
+		$changed_type++ if $symbols{$sym}{'type'} ne "EXPORT_SYMBOL"
+			and !is_ignored($symbols{$sym}{'loc'}, $sym);
+	}
+
+	# Changes to the hash are always bad
+	if ($symbols{$sym}{'hash'} ne $symbols{$sym}{'old_hash'}) {
+		printf("    HASH : %-40s : %s => %s%s\n", $sym, $symbols{$sym}{'old_hash'},
+			$symbols{$sym}{'hash'}, is_ignored($symbols{$sym}{'loc'}, $sym)
+			? " (ignored)" : "");
+		$changed_hash++ if !is_ignored($symbols{$sym}{'loc'}, $sym);
+		$module_syms{$symbols{$sym}{'loc'}}++;
+	}
+}
+
+print "WW: $moved symbols changed location\n" if $moved;
+print "$EE $changed_type symbols changed export type and weren't ignored\n" if $changed_type;
+print "$EE $changed_hash symbols changed hash and weren't ignored\n" if $changed_hash;
+
+$errors++ if $changed_hash or $changed_type;
+if ($changed_hash) {
+	print "II: Module hash change summary...\n";
+	foreach $mod (sort { $module_syms{$b} <=> $module_syms{$a} } keys %module_syms) {
+		next if ! $module_syms{$mod};
+		printf("    %-40s: %d\n", $mod, $module_syms{$mod});
+	}
+}
+
+print "II: Done\n";
+
+if ($errors) {
+	exit($fail_exit);
+} else {
+	exit(0);
+}
--- linux-mvl-dove-2.6.32.orig/debian/scripts/module-check
+++ linux-mvl-dove-2.6.32/debian/scripts/module-check
@@ -0,0 +1,120 @@
+#!/usr/bin/perl -w
+
+$flavour = shift;
+$prev_abidir = shift;
+$abidir = shift;
+$skipmodule = shift;
+
+print "II: Checking modules for $flavour...";
+
+if (-f "$prev_abidir/ignore.modules"
+    or -f "$prev_abidir/$flavour.ignore.modules") {
+	print "explicitly ignoring modules\n";
+	exit(0);
+}
+
+if (not -f "$abidir/$flavour.modules" or not -f
+    "$prev_abidir/$flavour.modules") {
+	print "previous or current modules file missing!\n";
+	print "   $abidir/$flavour.modules\n";
+	print "   $prev_abidir/$flavour.modules\n";
+	if (defined($skipmodule)) {
+		exit(0);
+	} else {
+		exit(1);
+	}
+}
+
+print "\n";
+
+my %modules;
+my %modules_ignore;
+my $missing = 0;
+my $new = 0;
+my $errors = 0;
+
+# See if we have any ignores
+if (-f "$prev_abidir/../modules.ignore") {
+	my $ignore = 0;
+	open(IGNORE, "< $prev_abidir/../modules.ignore") or
+		die "Could not open $prev_abidir/../modules.ignore";
+	print "   reading modules to ignore...";
+	while (<IGNORE>) {
+		chomp;
+		next if /\s*#/;
+		$modules_ignore{$_} = 1;
+		$ignore++;
+	}
+	close(IGNORE);
+	print "read $ignore modules.\n";
+}
+
+# Read new modules first
+print "   reading new modules...";
+$new_count = 0;
+open(NEW, "< $abidir/$flavour.modules") or
+	die "Could not open $abidir/$flavour.modules";
+while (<NEW>) {
+	chomp;
+	$modules{$_} = 1;
+	$new_count++;
+}
+close(NEW);
+print "read $new_count modules.\n";
+
+# Now the old modules, checking for missing ones
+print "   reading old modules...";
+$old_count = 0;
+open(OLD, "< $prev_abidir/$flavour.modules") or
+	die "Could not open $prev_abidir/$flavour.modules";
+while (<OLD>) {
+	chomp;
+	if (not defined($modules{$_})) {
+		print "\n" if not $missing;
+		$missing++;
+		if (not defined($modules_ignore{$_})) {
+			print "      MISS: $_\n";
+			$errors++;
+		} else {
+			print "      MISS: $_ (ignored)\n";
+		}
+	} else {
+		$modules{$_}++;
+	}
+	$old_count++;
+}
+close(OLD);
+# Check for new modules
+foreach $mod (keys(%modules)) {
+	if ($modules{$mod} < 2) {
+		print "\n" if not $missing and not $new;
+		print "      NEW : $mod\n";
+		$new++;
+	}
+}
+if ($new or $missing) {
+	print "      read $old_count modules : new($new)  missing($missing)\n";
+} else {
+	print "read $old_count modules.\n";
+}
+
+
+# Let's see where we stand...
+if ($errors) {
+	if (defined($skipmodule)) {
+		print "WW: Explicitly asked to ignore failures (probably not good)\n";
+	} else {
+		print "EE: Missing modules (start begging for mercy)\n";
+		exit 1
+	}
+}
+
+if ($new) {
+	print "II: New modules (you've been busy, wipe the poop off your nose)\n";
+} else {
+	print "II: No new modules (hope you're happy, slacker)\n";
+}
+
+print "II: Done\n";
+
+exit(0);
--- linux-mvl-dove-2.6.32.orig/debian/scripts/sub-flavour
+++ linux-mvl-dove-2.6.32/debian/scripts/sub-flavour
@@ -0,0 +1,67 @@
+#!/bin/bash
+
+. debian/debian.env
+
+echo "SUB_PROCESS $FROM => $TO"
+
+export from_pkg="linux-image-$ABI_RELEASE-$FROM"
+export to_pkg="linux-image-$ABI_RELEASE-$TO"
+
+from_moddir="debian/$from_pkg/lib/modules/$ABI_RELEASE-$FROM"
+to_moddir="debian/$to_pkg/lib/modules/$ABI_RELEASE-$FROM"
+
+install -d "debian/$to_pkg/boot"
+install -m644 debian/$from_pkg/boot/{vmlinuz,System.map,config}-$ABI_RELEASE-$FROM \
+	debian/$to_pkg/boot/
+
+#
+# Print some warnings if there are files in the sub-flavours list
+# that do not actually exist.
+#
+cat ${DEBIAN}/sub-flavours/$TO.list | while read line
+do
+(
+	cd debian/$from_pkg/lib/modules/$ABI_RELEASE-$FROM/kernel;
+	#
+	# If its a wildcard, then check that there are files that match.
+	#
+	if echo "$line" | grep '\*' > /dev/null
+	then
+		if [ `eval find "$line" -name '*.ko' 2>/dev/null|wc -l` -lt 1 ]
+		then
+			echo SUB_INST Warning - No files in $line
+		fi
+	#
+	# Else it should be a single file reference.
+	#
+	elif [ ! -f "$line" ]
+	then
+		echo SUB_INST Warning - could not find "$line"
+	fi
+)
+done
+
+cat ${DEBIAN}/sub-flavours/$TO.list | while read line; do
+	(
+	cd debian/$from_pkg/lib/modules/$ABI_RELEASE-$FROM/kernel;
+	if echo "$line" | grep '\*' > /dev/null
+	then
+		eval find "$line" -name '*.ko' 2>/dev/null || true
+	elif [ -f "$line" ]
+	then
+		echo "$line"
+	fi
+	);
+done | while read mod; do
+	echo "SUB_INST checking: $mod"
+	fromdir="/lib/modules/$ABI_RELEASE-$FROM/"
+	egrep "^($fromdir)?kernel/$mod:" \
+		$from_moddir/modules.dep | sed -e "s|^$fromdir||" -e 's/://' -e 's/ /\n/g' | \
+	while read m; do
+		m="${fromdir}$m"
+		test -f debian/$to_pkg/$m && continue
+		echo "SUB_INST installing: $m"
+		install -D -m644 debian/$from_pkg/$m \
+			debian/$to_pkg/$m
+	done
+done
--- linux-mvl-dove-2.6.32.orig/debian/scripts/link-headers
+++ linux-mvl-dove-2.6.32/debian/scripts/link-headers
@@ -0,0 +1,42 @@
+#!/bin/bash -e
+
+. debian/debian.env
+
+hdrdir="$1"
+symdir="$2"
+flavour="$3"
+
+echo "Symlinking and copying headers for $flavour..."
+
+excludes="( -path ./debian -prune -o -path ./${DEBIAN} -prune -o -path ./.git ) -prune -o"
+
+(
+find . $excludes  -type f \
+	\( -name 'Makefile*' -o -name 'Kconfig*' -o -name 'Kbuild*' -o \
+	-name '*.sh' -o -name '*.pl' -o -name '*.lds' \) -print
+find ./include ./scripts -name .gitignore -prune -o -type f -print
+find ./include -mindepth 1 -maxdepth 1 $excludes -type d -print
+) | (
+while read file; do
+	dir=$file
+	lastdir=$file
+
+	if [ -e "$hdrdir/$file" -o -L "$hdrdir/$file" ]; then
+		continue
+	fi
+
+	while [ ! -e "$hdrdir/$dir" -a ! -L "$hdrdir/$dir" ]; do
+		lastdir=$dir
+		dir=`dirname $dir`
+	done
+	# If the last item to exist is a symlink we assume all is good
+	if [ ! -L "$hdrdir/$dir" ]; then
+		# Turns things like "./foo" into "../"
+		deref="`echo -n $lastdir | sed -e 's/^\.//' -e's,/[^/]*,../,g'`"
+		item="`echo -n $lastdir | sed -e 's/^\.\///'`"
+		ln -s $deref$symdir/$item $hdrdir/$item
+	fi
+done
+)
+
+exit
--- linux-mvl-dove-2.6.32.orig/debian/scripts/misc/getabis
+++ linux-mvl-dove-2.6.32/debian/scripts/misc/getabis
@@ -0,0 +1,76 @@
+#!/bin/bash
+
+. debian/debian.env
+
+if [ "$#" != "2" ]; then
+	echo "Usage: $0 <release> <revision>" 1>&2
+	exit 1
+fi
+
+ver=$1
+revision=$2
+abi=$(echo $revision | awk -F. '{print $1}')
+
+verabi=$ver-$abi
+verfull=$ver-$revision
+
+WGET="wget --quiet -c"
+
+abidir="`pwd`/$DEBIAN/abi/$verfull"
+tmpdir="`pwd`/abi-tmp-$verfull"
+origdir="`pwd`"
+
+test -d $tmpdir || mkdir $tmpdir
+
+getall() {
+	arch=$1
+	shift
+
+	mkdir -p $abidir/$arch
+
+	for sub in $@; do
+		if [ -f $abidir/$arch/$sub ]; then
+			echo "Exists: $sub"
+			continue
+		fi
+		echo -n "Fetching $sub..."
+		filename=linux-image-${verabi}-${sub}_${verfull}_${arch}.deb
+		cd $tmpdir
+		for r in "${repo_list[@]}"
+		do
+			if ! [ -f $filename ]; then
+				$WGET $r/$filename
+			fi
+		done
+		if [ "$?" = "0" ]; then
+			echo -n "extracting..."
+			dpkg-deb --extract $filename tmp
+			if [ -f tmp/boot/abi-* ]; then
+				mv tmp/boot/abi-* $abidir/$arch/$sub
+			else
+				echo -n "NO ABI FILE..."
+			fi
+			(cd tmp; find lib/modules/$verabi-$sub/kernel -name '*.ko') | \
+				sed -e 's/.*\/\([^\/]*\)\.ko/\1/' | sort > \
+				$abidir/$arch/$sub.modules
+			rm -rf tmp $filename
+			echo "done."
+		else
+			echo "FAILED."
+		fi
+		cd $origdir
+	done
+}
+
+# MAIN
+
+# Setup abi directory
+mkdir -p $abidir
+echo $abi > $abidir/abiname
+
+# NOTE: The flavours are hardcoded, because they may have changed from the
+# current build.
+
+. $DEBIAN/etc/getabis
+
+rmdir $tmpdir
--- linux-mvl-dove-2.6.32.orig/debian/scripts/misc/insert-ubuntu-changes
+++ linux-mvl-dove-2.6.32/debian/scripts/misc/insert-ubuntu-changes
@@ -0,0 +1,58 @@
+#!/usr/bin/perl
+
+if ($#ARGV != 2) {
+	die "Usage: $0 <changelog> <stop at> <start at>\n";
+}
+my ($changelog, $end, $start) = @ARGV;
+
+$end =~ s/.*\.//;
+$start =~ s/.*\.//;
+
+my @changes = ();
+my $output = 0;
+open(CHG, "<debian.master/changelog") ||
+	open(CHG, "<debian/changelog") ||
+	die "$0: debian/changelog: open failed - $!\n";
+while (<CHG>) {
+	if (/^\S+\s+\((.*\.(\d+))\)/) {
+		if ($2 <= $end) {
+			last;
+		}
+		if ($2 == $start) {
+			$output = 1;
+		}
+		if ($output) {
+			push(@changes, "\n  [ Ubuntu: $1 ]\n\n");
+			next;
+		}
+	}
+	next if ($output == 0);
+
+	next if (/^\s*$/);
+	next if (/^\s--/);
+	next if (/^\s\s[^\*\s]/);
+
+	push(@changes, $_);
+}
+close(CHG);
+
+open(CHANGELOG, "< $changelog") or die "Cannot open changelog";
+open(NEW, "> $changelog.new") or die "Cannot open new changelog";
+
+$printed = 3;
+while (<CHANGELOG>) {
+	if (/^  CHANGELOG: /) {
+		$printed--;
+		print NEW;
+		if ($printed == 0) {
+			print NEW @changes;
+		}
+		next;
+	}
+	print NEW;
+}
+
+close(NEW);
+close(CHANGELOG);
+
+rename("$changelog.new", "$changelog");
--- linux-mvl-dove-2.6.32.orig/debian/scripts/misc/insert-changes.pl
+++ linux-mvl-dove-2.6.32/debian/scripts/misc/insert-changes.pl
@@ -0,0 +1,36 @@
+#!/usr/bin/perl -w
+
+my $debian;
+$droot = $ARGV[0] if (defined $ARGV[0]);
+$droot = 'debian' if (!defined $droot);
+$debian = $ARGV[1] if (defined $ARGV[1]);
+$debian = 'debian.master' if (!defined $debian);
+
+system("make -s -f $droot/rules printchanges > $debian/changes");
+
+open(CHANGELOG, "< $debian/changelog") or die "Cannot open changelog";
+open(CHANGES, "< $debian/changes") or die "Cannot open new changes";
+open(NEW, "> $debian/changelog.new") or die "Cannot open new changelog";
+
+$printed = 0;
+
+while (<CHANGELOG>) {
+	if (/^  CHANGELOG: /) {
+		next if $printed;
+
+		while (<CHANGES>) {
+			print NEW;
+		}
+
+		$printed = 1;
+	} else {
+		print NEW;
+	}
+}
+
+close(NEW);
+close(CHANGES);
+close(CHANGELOG);
+
+rename("$debian/changelog.new", "$debian/changelog");
+unlink("$debian/changes");
--- linux-mvl-dove-2.6.32.orig/debian/scripts/misc/kernelconfig
+++ linux-mvl-dove-2.6.32/debian/scripts/misc/kernelconfig
@@ -0,0 +1,171 @@
+#!/bin/bash
+
+. debian/debian.env
+
+# Script to merge all configs and run 'make silentoldconfig' on it to wade out bad juju.
+# Then split the configs into distro-commmon and flavour-specific parts
+
+# We have to be in the top level kernel source directory
+if [ ! -f MAINTAINERS ] || [ ! -f Makefile ]; then
+	echo "This does not appear to be the kernel source directory." 1>&2
+	exit 1
+fi
+
+mode=${1:?"Usage: $0 [oldconfig|editconfig]"}
+case "$mode" in
+    oldconfig)  ;; # All is good
+    defaultconfig)  ;; # All is good
+    editconfig) ;; # All is good
+    genconfig)  ;; # All is good
+    *) echo "$0 called with invalid mode" 1>&2
+       exit 1 ;;
+esac
+kerneldir="`pwd`"
+confdir="$kerneldir/${DEBIAN}/config"
+sharedconfdir="$kerneldir/debian.master/config"
+variant="$2"
+
+. $DEBIAN/etc/kernelconfig
+
+bindir="`pwd`/${DROOT}/scripts/misc"
+common_conf="$confdir/config.common.$family"
+tmpdir=`mktemp -d`
+mkdir "$tmpdir/CONFIGS"
+
+if [ "$mode" = "genconfig" ]; then
+	keep=1
+	mode="oldconfig"
+	test -d CONFIGS || mkdir CONFIGS
+fi
+
+for arch in $archs; do
+	rm -rf build
+	mkdir build
+
+	# Map debian archs to kernel archs
+	case "$arch" in
+		amd64)	kernarch="x86_64"	;;
+		lpia)   kernarch="x86" 		;;
+		sparc)	kernarch="sparc64"	;;
+		armel)	kernarch="arm"		;;
+		*)	kernarch="$arch"	;;
+	esac
+
+	archconfdir=$confdir/$arch
+	flavourconfigs=$(cd $archconfdir && ls config.flavour.*)
+
+	# Merge configs
+	# We merge config.common.ubuntu + config.common.<arch> +
+	# config.flavour.<flavour>
+
+	for config in $flavourconfigs; do
+		fullconf="$tmpdir/$arch-$config-full"
+		case $config in
+		*)
+			: >"$fullconf"
+			if [ -f $common_conf ]; then
+				cat $common_conf >> "$fullconf"
+			fi
+			if [ -f $archconfdir/config.common.$arch ]; then
+				cat $archconfdir/config.common.$arch >> "$fullconf"
+			fi
+			cat "$archconfdir/$config" >>"$fullconf"
+			if [ -f $confdir/OVERRIDES ]; then
+				cat $confdir/OVERRIDES >> "$fullconf"
+			fi
+			;;
+		esac
+	done
+
+	for config in $flavourconfigs; do
+		if [ -f $archconfdir/$config ]; then
+			fullconf="$tmpdir/$arch-$config-full"
+			cat "$fullconf" > build/.config
+			# Call oldconfig or menuconfig
+			case "$mode" in
+			    oldconfig)
+				# Weed out incorrect config parameters
+				echo "* Run silentoldconfig on $arch/$config ..."
+				make O=`pwd`/build ARCH=$kernarch silentoldconfig ;;
+			    defaultconfig)
+				# Weed out incorrect config parameters
+				echo "* Run oldconfig on $arch/$config ..."
+				make O=`pwd`/build ARCH=$kernarch oldconfig ;;
+			    editconfig)
+				# Interactively edit config parameters
+				while : ; do
+					echo -n "Do you want to edit config: $arch/$config? [Y/n] "
+					read choice
+					
+					case "$choice" in
+					y* | Y* | "" )
+						make O=`pwd`/build ARCH=$kernarch menuconfig
+						break ;;
+					n* | N* )
+						break ;;
+					*)
+						echo "Entry not valid"
+					esac
+				done
+				;;
+			    *)  # Bad!
+				exit 1 ;;
+			esac
+			cat build/.config > $archconfdir/$config
+			cat build/.config > "$tmpdir/CONFIGS/$arch-$config"
+			if [ "$keep" = "1" ]; then
+				cat build/.config > CONFIGS/$arch-$config
+			fi
+		else
+			echo "!! Config not found $archconfdir/$config..."
+		fi
+	done
+
+	echo "Running splitconfig.pl for $arch"
+	echo
+
+	# Can we make this more robust by avoiding $tmpdir completely?
+	# This approach was used for now because I didn't want to change
+	# splitconfig.pl
+	(cd $archconfdir; $bindir/splitconfig.pl; mv config.common \
+	 config.common.$arch; cp config.common.$arch $tmpdir)
+done
+
+rm -f $common_conf
+
+# Now run splitconfig.pl on all the config.common.<arch> copied to
+# $tmpdir
+(cd $tmpdir; $bindir/splitconfig.pl)
+(
+	cd $confdir;
+	rm -f *-full
+	grep -v 'is UNMERGABLE' <$tmpdir/config.common >$common_conf
+	for arch in $archs; do
+		grep -v 'is UNMERGABLE' <$tmpdir/config.common.$arch \
+			>$arch/config.common.$arch
+	done
+)
+
+echo ""
+echo "Running config-check for all configurations ..."
+echo ""
+fail=0
+for arch in $archs; do
+	archconfdir=$confdir/$arch
+	flavourconfigs=$(cd $archconfdir && ls config.flavour.*)
+	for config in $flavourconfigs; do
+		if [ -f $archconfdir/$config ]; then
+			fullconf="$tmpdir/CONFIGS/$arch-$config"
+			"$bindir/../config-check" "$fullconf" "$arch" "$config" "$sharedconfdir" "0" || let "fail=$fail+1"
+		fi
+	done
+done
+
+if [ "$fail" != 0 ]; then
+	echo ""
+	echo "*** ERROR: $fail config-check failures detected"
+	echo ""
+fi
+
+rm -rf build
+
--- linux-mvl-dove-2.6.32.orig/debian/scripts/misc/splitconfig.pl
+++ linux-mvl-dove-2.6.32/debian/scripts/misc/splitconfig.pl
@@ -0,0 +1,111 @@
+#!/usr/bin/perl -w
+
+%allconfigs = ();
+%common = ();
+
+print "Reading config's ...\n";
+
+opendir(DIR, ".");
+
+while (defined($config = readdir(DIR))) {
+	# Only config.*
+	next if $config !~ /^config\..*/;
+	# Nothing that is disabled, or remnant
+	next if $config =~ /.*\.(default|disabled|stub)$/;
+
+	%{$allconfigs{$config}} = ();
+
+	print "  processing $config ... ";
+
+	open(CONFIG, "< $config");
+
+	while (<CONFIG>) {
+		# Skip comments
+		/^#*\s*CONFIG_(\w+)[\s=](.*)$/ or next;
+
+		${$allconfigs{$config}}{$1} = $2;
+
+		$common{$1} = $2;
+	}
+
+	close(CONFIG);
+
+	print "done.\n";
+}
+
+closedir(DIR);
+
+print "\n";
+
+print "Merging lists ... \n";
+
+# %options - pointer to flavour config inside the allconfigs array
+for $config (keys(%allconfigs)) {
+	my %options = %{$allconfigs{$config}};
+
+	print "   processing $config ... ";
+
+	for $key (keys(%common)) {
+		next if not defined $common{$key};
+
+		# If we don't have the common option, then it isn't
+		# common. If we do have that option, it must have the same
+		# value.  EXCEPT where this file does not have a value at all
+		# which may safely be merged with any other value; the value
+		# will be elided during recombination of the parts.
+		if (!defined($options{$key})) {
+			# Its ok really ... let it merge
+		} elsif (not defined($options{$key})) {
+			undef $common{$key};
+		} elsif ($common{$key} ne $options{$key}) {
+			undef $common{$key};
+		}
+	}
+
+	print "done.\n";
+}
+
+print "\n";
+
+print "Creating common config ... ";
+
+open(COMMON, "> config.common");
+print COMMON "#\n# Common config options automatically generated by splitconfig.pl\n#\n";
+
+for $key (sort(keys(%common))) {
+	if (not defined $common{$key}) {
+		print COMMON "# CONFIG_$key is UNMERGABLE\n";
+	} elsif ($common{$key} eq "is not set") {
+		print COMMON "# CONFIG_$key is not set\n";
+	} else {
+		print COMMON "CONFIG_$key=$common{$key}\n";
+	}
+}
+close(COMMON);
+
+print "done.\n\n";
+
+print "Creating stub configs ...\n";
+
+for $config (keys(%allconfigs)) {
+	my %options = %{$allconfigs{$config}};
+
+	print "  processing $config ... ";
+
+	open(STUB, "> $config");
+	print STUB "#\n# Config options for $config automatically generated by splitconfig.pl\n#\n";
+
+	for $key (sort(keys(%options))) {
+		next if defined $common{$key};
+
+		if ($options{$key} =~ /^is /) {
+			print STUB "# CONFIG_$key $options{$key}\n";
+		} else {
+			print STUB "CONFIG_$key=$options{$key}\n";
+		}
+	}
+
+	close(STUB);
+
+	print "done.\n";
+}
--- linux-mvl-dove-2.6.32.orig/debian/scripts/misc/git-ubuntu-log
+++ linux-mvl-dove-2.6.32/debian/scripts/misc/git-ubuntu-log
@@ -0,0 +1,232 @@
+#!/usr/bin/perl -w
+
+use strict;
+use Text::Wrap;
+
+my $kernel_auth = "Upstream Kernel Changes";
+
+my (%map, @reverts);
+my $pstate = 1;
+my $no_kern_log = 0;
+my $print_shas = 0;
+my $first_print = 1;
+
+while (@ARGV) {
+	my $opt = $ARGV[0];
+	shift;
+	if ($opt eq "--no-kern-log") {
+		$no_kern_log = 1;
+	} elsif ($opt eq "--print-shas") {
+		$print_shas = 1;
+	} else {
+		print STDERR "Unknown options: $opt\n";
+		exit(1);
+	}
+}
+
+sub check_reverts($) {
+	my ($entry) = @_;
+	my ($check);
+
+	foreach $check (reverse @reverts) {
+		my $desc = "Revert \"" . $entry->{'desc'} . "\"";
+		if ($check->{'desc'} eq $desc) {
+			@reverts = grep($_->{'desc'} ne $desc, @reverts);
+			return 1;
+		}
+	}
+
+	return 0;
+}
+
+sub add_entry($) {
+	my ($entry) = @_;
+	my $key = $entry->{'author'};
+
+        # store description in array, in email->{desc list} map
+        if (exists $map{$key}) {
+                # grab ref
+                my $obj = $map{$key};
+
+                # add desc to array
+                push(@$obj, $entry);
+        } else {
+                # create new array, containing 1 item
+                my @arr = ($entry);
+
+                # store ref to array
+                $map{$key} = \@arr;
+        }
+}
+
+sub shortlog_entry($$$$$) {
+	my ($name, $desc, $bug, $cve, $commit) = @_;
+	my $entry;
+
+	$desc =~ s#/pub/scm/linux/kernel/git/#/.../#g;
+	$desc =~ s#\[PATCH\] ##g;
+
+	$desc =~ s#^\s*##g;
+	$desc =~ s# *UBUNTU: ##g;
+
+	$entry->{'desc'} = $desc;
+	if ($bug ne '') {
+		$entry->{'bugno'} = $bug;
+	}
+	$entry->{'cve'} = $cve;
+	$entry->{'commit'} = $commit;
+	$entry->{'author'} = $name;
+
+	if ($desc =~ /^Revert "/) {
+		push(@reverts, $entry);
+		return;
+	}
+
+	return if check_reverts($entry);
+
+	add_entry($entry);
+}
+
+# sort comparison function
+sub by_name($$) {
+	my ($a, $b) = @_;
+
+	uc($a) cmp uc($b);
+}
+
+sub shortlog_output {
+	my ($obj, $key, $entry);
+
+	foreach $key (sort by_name keys %map) {
+		next if $key eq $kernel_auth and $no_kern_log;
+
+		print "\n" unless $first_print;
+		$first_print = 0;
+
+		# output author
+		printf "  [ %s ]\n\n", $key;
+
+		# output author's 1-line summaries
+		$obj = $map{$key};
+		foreach $entry (reverse @$obj) {
+			print wrap("  * ", "    ", $entry->{'desc'}) . "\n";
+			# For non upstream changes, add other info.
+			if ($key ne $kernel_auth) {
+				if ($print_shas) {
+					print "    - GIT-SHA " . $entry->{'commit'} .
+						"\n";
+				}
+			}
+			if (defined($entry->{'bugno'})) {
+				print "    - LP: #" .  $entry->{'bugno'} . "\n";
+			}
+			if (defined($entry->{'cve'})) {
+				print "    - " . $entry->{'cve'} . "\n";
+			}
+		}
+	}
+}
+
+sub changelog_input {
+	my ($author, $desc, $commit, $entry, $cve);
+
+	while (<STDIN>) {
+		# get commit
+		if ($pstate == 1) {
+			next unless /^commit (.*)/;
+
+			$commit = $1;
+
+			$pstate++;
+		}
+
+		# get author and email
+		elsif ($pstate == 2) {
+			my ($email);
+
+			next unless /^[Aa]uthor:?\s*(.*?)\s*<(.*)>/;
+
+			$author = $1;
+			$email = $2;
+			$desc = undef;
+			$cve = undef;
+
+			# cset author fixups
+			if (!$author) {
+				$author = $email;
+			}
+			$pstate++;
+		}
+
+		# skip to blank line
+		elsif ($pstate == 3) {
+			next unless /^\s*$/;
+			$pstate++;
+		}
+
+		# skip to non-blank line
+		elsif ($pstate == 4) {
+			next unless /^\s*?(.*)/;
+			my $ignore = 0;
+			my $do_ignore = 0;
+			my $bug = undef;
+			my %bugz = ();
+			my $k;
+
+			# skip lines that are obviously not
+			# a 1-line cset description
+			next if /^\s*From: /;
+
+			chomp;
+			$desc = $1;
+
+			if ($desc =~ /^ *(Revert "|)UBUNTU:/) {
+				$do_ignore = 1;
+			} else {
+				$do_ignore = 0;
+				$author = $kernel_auth;
+				$ignore = 1 if $desc =~ /Merge /;
+			}
+			while (<STDIN>) {
+				$ignore  =  1 if ($do_ignore && /^ *Ignore: yes/i);
+				if    (/^ *Bug: *(#|)([0-9#,\s]*)\s*$/i) {
+					foreach $k (split('(,|\s)\s*(#|)', $2)) {
+						$bugz{$k} = 1 if (($k ne '') and ($k =~ /[0-9]+/));
+					}
+				}
+				elsif (/^ *BugLink: *http.*:\/\/.*\/([0-9]+)/i) {
+					$bugz{$1} = 1;
+				}
+				elsif (/^ *(CVE-.*)/) {
+					$cve = $1
+				}
+				last if /^commit /;
+			}
+
+                        $bug = join(", #", sort keys(%bugz));
+			if (!$ignore) {
+				&shortlog_entry($author, $desc, $bug,
+						$cve, $commit, 0);
+			}
+
+			$pstate = 1;
+			if ($_ && /^commit (.*)/) {
+				$commit = $1;
+				$pstate++;
+			}
+		}
+	
+		else {
+			die "invalid parse state $pstate";
+		}
+	}
+
+	foreach $entry (@reverts) {
+		add_entry($entry);
+	}	
+}
+
+&changelog_input;
+&shortlog_output;
+
+exit(0);
--- linux-mvl-dove-2.6.32.orig/debian/scripts/misc/retag
+++ linux-mvl-dove-2.6.32/debian/scripts/misc/retag
@@ -0,0 +1,34 @@
+#!/usr/bin/perl -w
+
+open(TAGS, "git tag -l |") or die "Could not get list of tags";
+@tags = <TAGS>;
+close(TAGS);
+
+open(LOGS, "git log --pretty=short |") or die "ERROR: Calling git log";
+my $commit = "";
+
+while (<LOGS>) {
+	my $origtag;
+
+	if (m|^commit (.*)$|) {
+		$commit = $1;
+		next;
+	}
+
+	m|\s*UBUNTU: (Ubuntu-2\.6\..*)| or next;
+
+	$tag = $1;
+
+	($origtag) = grep(/^$tag.orig$/, @tags);
+
+	if (!defined($origtag)) {
+		print "I: Adding original tag for $tag\n";
+		system("git tag -m $tag $tag.orig $tag");
+	}
+
+	print "I: Tagging $tag => $commit\n";
+
+	system("git tag -f -m $tag $tag $commit");
+}
+
+close(LOGS);
--- linux-mvl-dove-2.6.32.orig/debian/stamps/keep-dir
+++ linux-mvl-dove-2.6.32/debian/stamps/keep-dir
@@ -0,0 +1 @@
+Place holder
--- linux-mvl-dove-2.6.32.orig/debian/tools/perf
+++ linux-mvl-dove-2.6.32/debian/tools/perf
@@ -0,0 +1,16 @@
+#!/bin/bash
+full_version=`uname -r`
+
+# Removing flavour from version i.e. generic or server.
+flavour_abi=${full_version#*-}
+flavour=${flavour_abi#*-}
+version=${full_version%-$flavour}
+perf="perf_$version"
+
+if ! which "$perf" > /dev/null; then
+    echo "$perf not found" >&2
+    echo "You may need to install linux-tools-$version" >&2
+    exit 2
+fi
+
+exec "$perf" "$@"
--- linux-mvl-dove-2.6.32.orig/Documentation/dontdiff
+++ linux-mvl-dove-2.6.32/Documentation/dontdiff
@@ -121,7 +121,6 @@
 logo_*_clut224.c
 logo_*_mono.c
 lxdialog
-mach-types
 mach-types.h
 machtypes.h
 map
--- linux-mvl-dove-2.6.32.orig/Documentation/Changes
+++ linux-mvl-dove-2.6.32/Documentation/Changes
@@ -49,6 +49,8 @@
 o  udev                   081                     # udevinfo -V
 o  grub                   0.93                    # grub --version
 o  mcelog		  0.6
+o  iptables               1.4.1                   # iptables -V
+
 
 Kernel compilation
 ==================
--- linux-mvl-dove-2.6.32.orig/Documentation/android.txt
+++ linux-mvl-dove-2.6.32/Documentation/android.txt
@@ -0,0 +1,121 @@
+				=============
+				A N D R O I D
+				=============
+
+Copyright (C) 2009 Google, Inc.
+Written by Mike Chan <mike@android.com>
+
+CONTENTS:
+---------
+
+1. Android
+  1.1 Required enabled config options
+  1.2 Required disabled config options
+  1.3 Recommended enabled config options
+2. Contact
+
+
+1. Android
+==========
+
+Android (www.android.com) is an open source operating system for mobile devices.
+This document describes configurations needed to run the Android framework on
+top of the Linux kernel.
+
+To see a working defconfig look at msm_defconfig or goldfish_defconfig
+which can be found at http://android.git.kernel.org in kernel/common.git
+and kernel/msm.git
+
+
+1.1 Required enabled config options
+-----------------------------------
+After building a standard defconfig, ensure that these options are enabled in
+your .config or defconfig if they are not already. Based off the msm_defconfig.
+You should keep the rest of the default options enabled in the defconfig
+unless you know what you are doing.
+
+ANDROID_PARANOID_NETWORK
+ASHMEM
+CONFIG_FB_MODE_HELPERS
+CONFIG_FONT_8x16
+CONFIG_FONT_8x8
+CONFIG_YAFFS_SHORT_NAMES_IN_RAM
+DAB
+EARLYSUSPEND
+FB
+FB_CFB_COPYAREA
+FB_CFB_FILLRECT
+FB_CFB_IMAGEBLIT
+FB_DEFERRED_IO
+FB_TILEBLITTING
+HIGH_RES_TIMERS
+INOTIFY
+INOTIFY_USER
+INPUT_EVDEV
+INPUT_GPIO
+INPUT_MISC
+LEDS_CLASS
+LEDS_GPIO
+LOCK_KERNEL
+LkOGGER
+LOW_MEMORY_KILLER
+MISC_DEVICES
+NEW_LEDS
+NO_HZ
+POWER_SUPPLY
+PREEMPT
+RAMFS
+RTC_CLASS
+RTC_LIB
+SWITCH
+SWITCH_GPIO
+TMPFS
+UID_STAT
+UID16
+USB_FUNCTION
+USB_FUNCTION_ADB
+USER_WAKELOCK
+VIDEO_OUTPUT_CONTROL
+WAKELOCK
+YAFFS_AUTO_YAFFS2
+YAFFS_FS
+YAFFS_YAFFS1
+YAFFS_YAFFS2
+
+
+1.2 Required disabled config options
+------------------------------------
+CONFIG_YAFFS_DISABLE_LAZY_LOAD
+DNOTIFY
+
+
+1.3 Recommended enabled config options
+------------------------------
+ANDROID_PMEM
+ANDROID_RAM_CONSOLE
+ANDROID_RAM_CONSOLE_ERROR_CORRECTION
+SCHEDSTATS
+DEBUG_PREEMPT
+DEBUG_MUTEXES
+DEBUG_SPINLOCK_SLEEP
+DEBUG_INFO
+FRAME_POINTER
+CPU_FREQ
+CPU_FREQ_TABLE
+CPU_FREQ_DEFAULT_GOV_ONDEMAND
+CPU_FREQ_GOV_ONDEMAND
+CRC_CCITT
+EMBEDDED
+INPUT_TOUCHSCREEN
+I2C
+I2C_BOARDINFO
+LOG_BUF_SHIFT=17
+SERIAL_CORE
+SERIAL_CORE_CONSOLE
+
+
+2. Contact
+==========
+website: http://android.git.kernel.org
+
+mailing-lists: android-kernel@googlegroups.com
--- linux-mvl-dove-2.6.32.orig/Documentation/kernel-parameters.txt
+++ linux-mvl-dove-2.6.32/Documentation/kernel-parameters.txt
@@ -241,7 +241,7 @@
 
 	acpi_sleep=	[HW,ACPI] Sleep options
 			Format: { s3_bios, s3_mode, s3_beep, s4_nohwsig,
-				  old_ordering, s4_nonvs }
+				  old_ordering, s4_nonvs, sci_force_enable }
 			See Documentation/power/video.txt for information on
 			s3_bios and s3_mode.
 			s3_beep is for debugging; it makes the PC's speaker beep
@@ -254,6 +254,9 @@
 			of _PTS is used by default).
 			s4_nonvs prevents the kernel from saving/restoring the
 			ACPI NVS memory during hibernation.
+			sci_force_enable causes the kernel to set SCI_EN directly
+			on resume from S1/S3 (which is against the ACPI spec,
+			but some broken systems don't work without it).
 
 	acpi_use_timer_override [HW,ACPI]
 			Use timer override. For some broken Nvidia NF5 boards
@@ -875,6 +878,7 @@
 	i8042.panicblink=
 			[HW] Frequency with which keyboard LEDs should blink
 			     when kernel panics (default is 0.5 sec)
+	i8042.notimeout	[HW] Ignore timeout condition signalled by conroller
 	i8042.reset	[HW] Reset the controller during init and cleanup
 	i8042.unlock	[HW] Unlock (ignore) the keylock
 
@@ -1622,7 +1626,7 @@
 
 	noclflush	[BUGS=X86] Don't use the CLFLUSH instruction
 
-	nodelayacct	[KNL] Disable per-task delay accounting
+	delayacct	[KNL] Enable per-task delay accounting
 
 	nodisconnect	[HW,SCSI,M68K] Disables SCSI disconnects.
 
@@ -2574,6 +2578,10 @@
 			disables clocksource verification at runtime.
 			Used to enable high-resolution timer mode on older
 			hardware, and in virtualized environment.
+			[x86] noirqtime: Do not use TSC to do irq accounting.
+			Used to run time disable IRQ_TIME_ACCOUNTING on any
+			platforms where RDTSC is slow and this accounting
+			can add overhead.
 
 	turbografx.map[2|3]=	[HW,JOY]
 			TurboGraFX parallel port interface
@@ -2645,6 +2653,8 @@
 			to a common usb-storage quirk flag as follows:
 				a = SANE_SENSE (collect more than 18 bytes
 					of sense data);
+				b = BAD_SENSE (don't collect more than 18
+					bytes of sense data);
 				c = FIX_CAPACITY (decrease the reported
 					device capacity by one sector);
 				h = CAPACITY_HEURISTICS (decrease the
@@ -2666,6 +2676,13 @@
 					medium is write-protected).
 			Example: quirks=0419:aaf5:rl,0421:0433:rc
 
+	userpte=
+			[X86] Flags controlling user PTE allocations.
+
+				nohigh = do not allocate PTE pages in
+					HIGHMEM regardless of setting
+					of CONFIG_HIGHPTE.
+
 	vdso=		[X86,SH]
 			vdso=2: enable compat VDSO (default with COMPAT_VDSO)
 			vdso=1: enable VDSO (default)
--- linux-mvl-dove-2.6.32.orig/Documentation/sound/alsa/HD-Audio-Models.txt
+++ linux-mvl-dove-2.6.32/Documentation/sound/alsa/HD-Audio-Models.txt
@@ -401,4 +401,5 @@
 Cirrus Logic CS4206/4207
 ========================
   mbp55		MacBook Pro 5,5
+  imac27	IMac 27 Inch
   auto		BIOS setup (default)
--- linux-mvl-dove-2.6.32.orig/Documentation/video4linux/CARDLIST.saa7134
+++ linux-mvl-dove-2.6.32/Documentation/video4linux/CARDLIST.saa7134
@@ -172,3 +172,4 @@
 171 -> Beholder BeholdTV X7                     [5ace:7595]
 172 -> RoverMedia TV Link Pro FM                [19d1:0138]
 173 -> Zolid Hybrid TV Tuner PCI                [1131:2004]
+174 -> Asus Europa Hybrid OEM                   [1043:4847]
--- linux-mvl-dove-2.6.32.orig/Documentation/video4linux/gspca.txt
+++ linux-mvl-dove-2.6.32/Documentation/video4linux/gspca.txt
@@ -37,6 +37,7 @@
 ov519		041e:4060	Creative Live! VISTA VF0350
 ov519		041e:4061	Creative Live! VISTA VF0400
 ov519		041e:4064	Creative Live! VISTA VF0420
+ov519		041e:4067	Creative Live! Cam Video IM (VF0350)
 ov519		041e:4068	Creative Live! VISTA VF0470
 spca561		0458:7004	Genius VideoCAM Express V2
 sunplus		0458:7006	Genius Dsc 1.3 Smart
--- linux-mvl-dove-2.6.32.orig/Documentation/kbuild/kconfig.txt
+++ linux-mvl-dove-2.6.32/Documentation/kbuild/kconfig.txt
@@ -103,6 +103,11 @@
 This environment variable can be set to specify the path & name of the
 "auto.conf" file.  Its default value is "include/config/auto.conf".
 
+KCONFIG_TRISTATE
+--------------------------------------------------
+This environment variable can be set to specify the path & name of the
+"tristate.conf" file.  Its default value is "include/config/tristate.conf".
+
 KCONFIG_AUTOHEADER
 --------------------------------------------------
 This environment variable can be set to specify the path & name of the
--- linux-mvl-dove-2.6.32.orig/Documentation/kbuild/kbuild.txt
+++ linux-mvl-dove-2.6.32/Documentation/kbuild/kbuild.txt
@@ -1,3 +1,17 @@
+Output files
+
+modules.order
+--------------------------------------------------
+This file records the order in which modules appear in Makefiles. This
+is used by modprobe to deterministically resolve aliases that match
+multiple modules.
+
+modules.builtin
+--------------------------------------------------
+This file lists all modules that are built into the kernel. This is used
+by modprobe to not fail when trying to load something builtin.
+
+
 Environment variables
 
 KCPPFLAGS
--- linux-mvl-dove-2.6.32.orig/Documentation/filesystems/ext4.txt
+++ linux-mvl-dove-2.6.32/Documentation/filesystems/ext4.txt
@@ -153,8 +153,8 @@
 			identified through its new major/minor numbers encoded
 			in devnum.
 
-noload			Don't load the journal on mounting.  Note that
-                     	if the filesystem was not unmounted cleanly,
+norecovery		Don't load the journal on mounting.  Note that
+noload			if the filesystem was not unmounted cleanly,
                      	skipping the journal replay will lead to the
                      	filesystem containing inconsistencies that can
                      	lead to any number of problems.
@@ -196,7 +196,7 @@
 			also be used to enable or disable barriers, for
 			consistency with other ext4 mount options.
 
-inode_readahead=n	This tuning parameter controls the maximum
+inode_readahead_blks=n	This tuning parameter controls the maximum
 			number of inode table blocks that ext4's inode
 			table readahead algorithm will pre-read into
 			the buffer cache.  The default value is 32 blocks.
@@ -353,6 +353,12 @@
 			system crashes before the delayed allocation
 			blocks are forced to disk.
 
+discard		Controls whether ext4 should issue discard/TRIM
+nodiscard(*)		commands to the underlying block device when
+			blocks are freed.  This is useful for SSD devices
+			and sparse/thinly-provisioned LUNs, but it is off
+			by default until sufficient testing has been done.
+
 Data Mode
 =========
 There are 3 different data modes:
--- linux-mvl-dove-2.6.32.orig/Documentation/filesystems/tmpfs.txt
+++ linux-mvl-dove-2.6.32/Documentation/filesystems/tmpfs.txt
@@ -82,11 +82,13 @@
 all files in that instance (if CONFIG_NUMA is enabled) - which can be
 adjusted on the fly via 'mount -o remount ...'
 
-mpol=default             prefers to allocate memory from the local node
+mpol=default             use the process allocation policy
+                         (see set_mempolicy(2))
 mpol=prefer:Node         prefers to allocate memory from the given Node
 mpol=bind:NodeList       allocates memory only from nodes in NodeList
 mpol=interleave          prefers to allocate from each node in turn
 mpol=interleave:NodeList allocates from each node of NodeList in turn
+mpol=local		 prefers to allocate memory from the local node
 
 NodeList format is a comma-separated list of decimal numbers and ranges,
 a range being two hyphen-separated decimal numbers, the smallest and
@@ -134,3 +136,5 @@
    Christoph Rohland <cr@sap.com>, 1.12.01
 Updated:
    Hugh Dickins, 4 June 2007
+Updated:
+   KOSAKI Motohiro, 16 Mar 2010
--- linux-mvl-dove-2.6.32.orig/Documentation/filesystems/proc.txt
+++ linux-mvl-dove-2.6.32/Documentation/filesystems/proc.txt
@@ -176,7 +176,6 @@
   CapBnd: ffffffffffffffff
   voluntary_ctxt_switches:        0
   nonvoluntary_ctxt_switches:     1
-  Stack usage:    12 kB
 
 This shows you nearly the same information you would get if you viewed it with
 the ps  command.  In  fact,  ps  uses  the  proc  file  system  to  obtain its
@@ -230,7 +229,6 @@
  Mems_allowed_list           Same as previous, but in "list format"
  voluntary_ctxt_switches     number of voluntary context switches
  nonvoluntary_ctxt_switches  number of non voluntary context switches
- Stack usage:                stack usage high water mark (round up to page size)
 ..............................................................................
 
 Table 1-3: Contents of the statm files (as of 2.6.8-rc3)
@@ -309,7 +307,7 @@
 08049000-0804a000 rw-p 00001000 03:00 8312       /opt/test
 0804a000-0806b000 rw-p 00000000 00:00 0          [heap]
 a7cb1000-a7cb2000 ---p 00000000 00:00 0
-a7cb2000-a7eb2000 rw-p 00000000 00:00 0          [threadstack:001ff4b4]
+a7cb2000-a7eb2000 rw-p 00000000 00:00 0
 a7eb2000-a7eb3000 ---p 00000000 00:00 0
 a7eb3000-a7ed5000 rw-p 00000000 00:00 0
 a7ed5000-a8008000 r-xp 00000000 03:00 4222       /lib/libc.so.6
@@ -345,7 +343,6 @@
  [stack]                  = the stack of the main process
  [vdso]                   = the "virtual dynamic shared object",
                             the kernel system call handler
- [threadstack:xxxxxxxx]   = the stack of the thread, xxxxxxxx is the stack size
 
  or if empty, the mapping is anonymous.
 
--- linux-mvl-dove-2.6.32.orig/Documentation/kvm/api.txt
+++ linux-mvl-dove-2.6.32/Documentation/kvm/api.txt
@@ -593,6 +593,42 @@
 	} chip;
 };
 
+4.27 KVM_GET_CLOCK
+
+Capability: KVM_CAP_ADJUST_CLOCK
+Architectures: x86
+Type: vm ioctl
+Parameters: struct kvm_clock_data (out)
+Returns: 0 on success, -1 on error
+
+Gets the current timestamp of kvmclock as seen by the current guest. In
+conjunction with KVM_SET_CLOCK, it is used to ensure monotonicity on scenarios
+such as migration.
+
+struct kvm_clock_data {
+	__u64 clock;  /* kvmclock current value */
+	__u32 flags;
+	__u32 pad[9];
+};
+
+4.28 KVM_SET_CLOCK
+
+Capability: KVM_CAP_ADJUST_CLOCK
+Architectures: x86
+Type: vm ioctl
+Parameters: struct kvm_clock_data (in)
+Returns: 0 on success, -1 on error
+
+Sets the current timestamp of kvmclock to the valued specific in its parameter.
+In conjunction with KVM_GET_CLOCK, it is used to ensure monotonicity on scenarios
+such as migration.
+
+struct kvm_clock_data {
+	__u64 clock;  /* kvmclock current value */
+	__u32 flags;
+	__u32 pad[9];
+};
+
 5. The kvm_run structure
 
 Application code obtains a pointer to the kvm_run structure by
--- linux-mvl-dove-2.6.32.orig/Documentation/DocBook/Makefile
+++ linux-mvl-dove-2.6.32/Documentation/DocBook/Makefile
@@ -32,28 +32,37 @@
 
 ###
 # The targets that may be used.
-PHONY += xmldocs sgmldocs psdocs pdfdocs htmldocs mandocs installmandocs cleandocs media
+PHONY += xmldocs sgmldocs psdocs pdfdocs htmldocs mandocs installmandocs cleandocs xmldoclinks
 
 BOOKS := $(addprefix $(obj)/,$(DOCBOOKS))
-xmldocs: $(BOOKS)
+xmldocs: xmldoclinks $(BOOKS)
 sgmldocs: xmldocs
 
 PS := $(patsubst %.xml, %.ps, $(BOOKS))
-psdocs: $(PS)
+psdocs: xmldoclinks $(PS)
 
 PDF := $(patsubst %.xml, %.pdf, $(BOOKS))
-pdfdocs: $(PDF)
+pdfdocs: xmldoclinks $(PDF)
 
 HTML := $(sort $(patsubst %.xml, %.html, $(BOOKS)))
-htmldocs: media $(HTML)
+htmldocs: xmldoclinks $(HTML)
 	$(call build_main_index)
+	$(call build_images)
 
 MAN := $(patsubst %.xml, %.9, $(BOOKS))
 mandocs: $(MAN)
 
-media:
-	mkdir -p $(srctree)/Documentation/DocBook/media/
-	cp $(srctree)/Documentation/DocBook/dvb/*.png $(srctree)/Documentation/DocBook/v4l/*.gif $(srctree)/Documentation/DocBook/media/
+build_images = mkdir -p $(objtree)/Documentation/DocBook/media/ && \
+	       cp $(srctree)/Documentation/DocBook/dvb/*.png $(srctree)/Documentation/DocBook/v4l/*.gif $(objtree)/Documentation/DocBook/media/
+
+xmldoclinks:
+ifneq ($(objtree),$(srctree))
+	for dep in dvb media-entities.tmpl media-indices.tmpl v4l; do \
+		rm -f $(objtree)/Documentation/DocBook/$$dep \
+		&& ln -s $(srctree)/Documentation/DocBook/$$dep $(objtree)/Documentation/DocBook/ \
+		|| exit; \
+	done
+endif
 
 installmandocs: mandocs
 	mkdir -p /usr/local/man/man9/
--- linux-mvl-dove-2.6.32.orig/Documentation/i2c/instantiating-devices
+++ linux-mvl-dove-2.6.32/Documentation/i2c/instantiating-devices
@@ -100,7 +100,7 @@
 	(...)
 	i2c_adap = i2c_get_adapter(2);
 	memset(&i2c_info, 0, sizeof(struct i2c_board_info));
-	strlcpy(i2c_info.name, "isp1301_pnx", I2C_NAME_SIZE);
+	strlcpy(i2c_info.type, "isp1301_pnx", I2C_NAME_SIZE);
 	isp1301_i2c_client = i2c_new_probed_device(i2c_adap, &i2c_info,
 						   normal_i2c);
 	i2c_put_adapter(i2c_adap);
--- linux-mvl-dove-2.6.32.orig/Documentation/i2c/busses/i2c-i801
+++ linux-mvl-dove-2.6.32/Documentation/i2c/busses/i2c-i801
@@ -15,7 +15,8 @@
   * Intel 82801I (ICH9)
   * Intel EP80579 (Tolapai)
   * Intel 82801JI (ICH10)
-  * Intel PCH
+  * Intel 3400/5 Series (PCH)
+  * Intel Cougar Point (PCH)
    Datasheets: Publicly available at the Intel website
 
 Authors: 
--- linux-mvl-dove-2.6.32.orig/Documentation/hwmon/ltc4245
+++ linux-mvl-dove-2.6.32/Documentation/hwmon/ltc4245
@@ -72,9 +72,7 @@
 in7_min_alarm		3v  output undervoltage alarm
 in8_min_alarm		Vee (-12v) output undervoltage alarm
 
-in9_input		GPIO #1 voltage data
-in10_input		GPIO #2 voltage data
-in11_input		GPIO #3 voltage data
+in9_input		GPIO voltage data
 
 power1_input		12v power usage (mW)
 power2_input		5v  power usage (mW)
--- linux-mvl-dove-2.6.32.orig/Documentation/networking/README.ipw2200
+++ linux-mvl-dove-2.6.32/Documentation/networking/README.ipw2200
@@ -171,7 +171,7 @@
   
   led
 	Can be used to turn on experimental LED code.
-	0 = Off, 1 = On.  Default is 0.
+	0 = Off, 1 = On.  Default is 1.
 
   mode
 	Can be used to set the default mode of the adapter.  
--- linux-mvl-dove-2.6.32.orig/Documentation/networking/3c509.txt
+++ linux-mvl-dove-2.6.32/Documentation/networking/3c509.txt
@@ -48,11 +48,11 @@
 This configures the first found 3c509 card for IRQ 10, base I/O 0x310, and
 transceiver type 3 (10base2). The flag "0x3c509" must be set to avoid conflicts
 with other card types when overriding the I/O address. When the driver is
-loaded as a module, only the IRQ and transceiver setting may be overridden.
-For example, setting two cards to 10base2/IRQ10 and AUI/IRQ11 is done by using
-the xcvr and irq module options:
+loaded as a module, only the IRQ may be overridden. For example,
+setting two cards to IRQ10 and IRQ11 is done by using the irq module
+option:
 
-   options 3c509 xcvr=3,1 irq=10,11
+   options 3c509 irq=10,11
 
 
 (2) Full-duplex mode
@@ -77,6 +77,8 @@
 itself full-duplex capable. This is almost certainly one of two things: a full-
 duplex-capable  Ethernet switch (*not* a hub), or a full-duplex-capable NIC on
 another system that's connected directly to the 3c509B via a crossover cable.
+
+Full-duplex mode can be enabled using 'ethtool'.
  
 /////Extremely important caution concerning full-duplex mode/////
 Understand that the 3c509B's hardware's full-duplex support is much more
@@ -113,6 +115,8 @@
 never automatically enable full-duplex mode in an existing installation;
 it must always be explicitly enabled via one of these code in order to be
 activated.
+
+The transceiver type can be changed using 'ethtool'.
   
 
 (4a) Interpretation of error messages and common problems
--- linux-mvl-dove-2.6.32.orig/Documentation/usb/proc_usb_info.txt
+++ linux-mvl-dove-2.6.32/Documentation/usb/proc_usb_info.txt
@@ -1,12 +1,17 @@
 /proc/bus/usb filesystem output
 ===============================
-(version 2003.05.30)
+(version 2010.09.13)
 
 
 The usbfs filesystem for USB devices is traditionally mounted at
 /proc/bus/usb.  It provides the /proc/bus/usb/devices file, as well as
 the /proc/bus/usb/BBB/DDD files.
 
+In many modern systems the usbfs filsystem isn't used at all.  Instead
+USB device nodes are created under /dev/usb/ or someplace similar.  The
+"devices" file is available in debugfs, typically as
+/sys/kernel/debug/usb/devices.
+
 
 **NOTE**: If /proc/bus/usb appears empty, and a host controller
 	  driver has been linked, then you need to mount the
@@ -106,8 +111,8 @@
 
 Topology info:
 
-T:  Bus=dd Lev=dd Prnt=dd Port=dd Cnt=dd Dev#=ddd Spd=ddd MxCh=dd
-|   |      |      |       |       |      |        |       |__MaxChildren
+T:  Bus=dd Lev=dd Prnt=dd Port=dd Cnt=dd Dev#=ddd Spd=dddd MxCh=dd
+|   |      |      |       |       |      |        |        |__MaxChildren
 |   |      |      |       |       |      |        |__Device Speed in Mbps
 |   |      |      |       |       |      |__DeviceNumber
 |   |      |      |       |       |__Count of devices at this level
@@ -120,8 +125,13 @@
     Speed may be:
     	1.5	Mbit/s for low speed USB
 	12	Mbit/s for full speed USB
-	480	Mbit/s for high speed USB (added for USB 2.0)
-
+	480	Mbit/s for high speed USB (added for USB 2.0);
+		  also used for Wireless USB, which has no fixed speed
+	5000	Mbit/s for SuperSpeed USB (added for USB 3.0)
+
+    For reasons lost in the mists of time, the Port number is always
+    too low by 1.  For example, a device plugged into port 4 will
+    show up with "Port=03".
 
 Bandwidth info:
 B:  Alloc=ddd/ddd us (xx%), #Int=ddd, #Iso=ddd
@@ -291,7 +301,7 @@
 an external hub connected to the root hub, and a mouse and
 a serial converter connected to the external hub.
 
-T:  Bus=00 Lev=00 Prnt=00 Port=00 Cnt=00 Dev#=  1 Spd=12  MxCh= 2
+T:  Bus=00 Lev=00 Prnt=00 Port=00 Cnt=00 Dev#=  1 Spd=12   MxCh= 2
 B:  Alloc= 28/900 us ( 3%), #Int=  2, #Iso=  0
 D:  Ver= 1.00 Cls=09(hub  ) Sub=00 Prot=00 MxPS= 8 #Cfgs=  1
 P:  Vendor=0000 ProdID=0000 Rev= 0.00
@@ -301,21 +311,21 @@
 I:  If#= 0 Alt= 0 #EPs= 1 Cls=09(hub  ) Sub=00 Prot=00 Driver=hub
 E:  Ad=81(I) Atr=03(Int.) MxPS=   8 Ivl=255ms
 
-T:  Bus=00 Lev=01 Prnt=01 Port=00 Cnt=01 Dev#=  2 Spd=12  MxCh= 4
+T:  Bus=00 Lev=01 Prnt=01 Port=00 Cnt=01 Dev#=  2 Spd=12   MxCh= 4
 D:  Ver= 1.00 Cls=09(hub  ) Sub=00 Prot=00 MxPS= 8 #Cfgs=  1
 P:  Vendor=0451 ProdID=1446 Rev= 1.00
 C:* #Ifs= 1 Cfg#= 1 Atr=e0 MxPwr=100mA
 I:  If#= 0 Alt= 0 #EPs= 1 Cls=09(hub  ) Sub=00 Prot=00 Driver=hub
 E:  Ad=81(I) Atr=03(Int.) MxPS=   1 Ivl=255ms
 
-T:  Bus=00 Lev=02 Prnt=02 Port=00 Cnt=01 Dev#=  3 Spd=1.5 MxCh= 0
+T:  Bus=00 Lev=02 Prnt=02 Port=00 Cnt=01 Dev#=  3 Spd=1.5  MxCh= 0
 D:  Ver= 1.00 Cls=00(>ifc ) Sub=00 Prot=00 MxPS= 8 #Cfgs=  1
 P:  Vendor=04b4 ProdID=0001 Rev= 0.00
 C:* #Ifs= 1 Cfg#= 1 Atr=80 MxPwr=100mA
 I:  If#= 0 Alt= 0 #EPs= 1 Cls=03(HID  ) Sub=01 Prot=02 Driver=mouse
 E:  Ad=81(I) Atr=03(Int.) MxPS=   3 Ivl= 10ms
 
-T:  Bus=00 Lev=02 Prnt=02 Port=02 Cnt=02 Dev#=  4 Spd=12  MxCh= 0
+T:  Bus=00 Lev=02 Prnt=02 Port=02 Cnt=02 Dev#=  4 Spd=12   MxCh= 0
 D:  Ver= 1.00 Cls=00(>ifc ) Sub=00 Prot=00 MxPS= 8 #Cfgs=  1
 P:  Vendor=0565 ProdID=0001 Rev= 1.08
 S:  Manufacturer=Peracom Networks, Inc.
@@ -330,12 +340,12 @@
 Selecting only the "T:" and "I:" lines from this (for example, by using
 "procusb ti"), we have:
 
-T:  Bus=00 Lev=00 Prnt=00 Port=00 Cnt=00 Dev#=  1 Spd=12  MxCh= 2
-T:  Bus=00 Lev=01 Prnt=01 Port=00 Cnt=01 Dev#=  2 Spd=12  MxCh= 4
+T:  Bus=00 Lev=00 Prnt=00 Port=00 Cnt=00 Dev#=  1 Spd=12   MxCh= 2
+T:  Bus=00 Lev=01 Prnt=01 Port=00 Cnt=01 Dev#=  2 Spd=12   MxCh= 4
 I:  If#= 0 Alt= 0 #EPs= 1 Cls=09(hub  ) Sub=00 Prot=00 Driver=hub
-T:  Bus=00 Lev=02 Prnt=02 Port=00 Cnt=01 Dev#=  3 Spd=1.5 MxCh= 0
+T:  Bus=00 Lev=02 Prnt=02 Port=00 Cnt=01 Dev#=  3 Spd=1.5  MxCh= 0
 I:  If#= 0 Alt= 0 #EPs= 1 Cls=03(HID  ) Sub=01 Prot=02 Driver=mouse
-T:  Bus=00 Lev=02 Prnt=02 Port=02 Cnt=02 Dev#=  4 Spd=12  MxCh= 0
+T:  Bus=00 Lev=02 Prnt=02 Port=02 Cnt=02 Dev#=  4 Spd=12   MxCh= 0
 I:  If#= 0 Alt= 0 #EPs= 3 Cls=00(>ifc ) Sub=00 Prot=00 Driver=serial
 
 
--- linux-mvl-dove-2.6.32.orig/lib/idr.c
+++ linux-mvl-dove-2.6.32/lib/idr.c
@@ -156,10 +156,12 @@
 			id = (id | ((1 << (IDR_BITS * l)) - 1)) + 1;
 
 			/* if already at the top layer, we need to grow */
-			if (!(p = pa[l])) {
+			if (id >= 1 << (idp->layers * IDR_BITS)) {
 				*starting_id = id;
 				return IDR_NEED_TO_GROW;
 			}
+			p = pa[l];
+			BUG_ON(!p);
 
 			/* If we need to go up one layer, continue the
 			 * loop; otherwise, restart from the top.
--- linux-mvl-dove-2.6.32.orig/lib/percpu_counter.c
+++ linux-mvl-dove-2.6.32/lib/percpu_counter.c
@@ -76,6 +76,7 @@
 	if (!fbc->counters)
 		return -ENOMEM;
 #ifdef CONFIG_HOTPLUG_CPU
+	INIT_LIST_HEAD(&fbc->list);
 	mutex_lock(&percpu_counters_lock);
 	list_add(&fbc->list, &percpu_counters);
 	mutex_unlock(&percpu_counters_lock);
--- linux-mvl-dove-2.6.32.orig/lib/lcm.c
+++ linux-mvl-dove-2.6.32/lib/lcm.c
@@ -0,0 +1,15 @@
+#include <linux/kernel.h>
+#include <linux/gcd.h>
+#include <linux/module.h>
+
+/* Lowest common multiple */
+unsigned long lcm(unsigned long a, unsigned long b)
+{
+	if (a && b)
+		return (a * b) / gcd(a, b);
+	else if (b)
+		return b;
+
+	return a;
+}
+EXPORT_SYMBOL_GPL(lcm);
--- linux-mvl-dove-2.6.32.orig/lib/flex_array.c
+++ linux-mvl-dove-2.6.32/lib/flex_array.c
@@ -99,7 +99,7 @@
 	ret->element_size = element_size;
 	ret->total_nr_elements = total;
 	if (elements_fit_in_base(ret) && !(flags & __GFP_ZERO))
-		memset(ret->parts[0], FLEX_ARRAY_FREE,
+		memset(&ret->parts[0], FLEX_ARRAY_FREE,
 						FLEX_ARRAY_BASE_BYTES_LEFT);
 	return ret;
 }
--- linux-mvl-dove-2.6.32.orig/lib/debugobjects.c
+++ linux-mvl-dove-2.6.32/lib/debugobjects.c
@@ -196,7 +196,7 @@
 	 * initialized:
 	 */
 	if (obj_pool_free > ODEBUG_POOL_SIZE && obj_cache)
-		sched = !work_pending(&debug_obj_work);
+		sched = keventd_up() && !work_pending(&debug_obj_work);
 	hlist_add_head(&obj->node, &obj_pool);
 	obj_pool_free++;
 	obj_pool_used--;
--- linux-mvl-dove-2.6.32.orig/lib/Makefile
+++ linux-mvl-dove-2.6.32/lib/Makefile
@@ -21,7 +21,7 @@
 
 obj-y += bcd.o div64.o sort.o parser.o halfmd4.o debug_locks.o random32.o \
 	 bust_spinlocks.o hexdump.o kasprintf.o bitmap.o scatterlist.o \
-	 string_helpers.o gcd.o
+	 string_helpers.o gcd.o list_sort.o lcm.o
 
 ifeq ($(CONFIG_DEBUG_KOBJECT),y)
 CFLAGS_kobject.o += -DDEBUG
--- linux-mvl-dove-2.6.32.orig/lib/locking-selftest.c
+++ linux-mvl-dove-2.6.32/lib/locking-selftest.c
@@ -144,7 +144,7 @@
 
 #define HARDIRQ_ENTER()				\
 	local_irq_disable();			\
-	irq_enter();				\
+	__irq_enter();				\
 	WARN_ON(!in_irq());
 
 #define HARDIRQ_EXIT()				\
--- linux-mvl-dove-2.6.32.orig/lib/list_sort.c
+++ linux-mvl-dove-2.6.32/lib/list_sort.c
@@ -0,0 +1,102 @@
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/list_sort.h>
+#include <linux/slab.h>
+#include <linux/list.h>
+
+/**
+ * list_sort - sort a list.
+ * @priv: private data, passed to @cmp
+ * @head: the list to sort
+ * @cmp: the elements comparison function
+ *
+ * This function has been implemented by Mark J Roberts <mjr@znex.org>. It
+ * implements "merge sort" which has O(nlog(n)) complexity. The list is sorted
+ * in ascending order.
+ *
+ * The comparison function @cmp is supposed to return a negative value if @a is
+ * less than @b, and a positive value if @a is greater than @b. If @a and @b
+ * are equivalent, then it does not matter what this function returns.
+ */
+void list_sort(void *priv, struct list_head *head,
+	       int (*cmp)(void *priv, struct list_head *a,
+			  struct list_head *b))
+{
+	struct list_head *p, *q, *e, *list, *tail, *oldhead;
+	int insize, nmerges, psize, qsize, i;
+
+	if (list_empty(head))
+		return;
+
+	list = head->next;
+	list_del(head);
+	insize = 1;
+	for (;;) {
+		p = oldhead = list;
+		list = tail = NULL;
+		nmerges = 0;
+
+		while (p) {
+			nmerges++;
+			q = p;
+			psize = 0;
+			for (i = 0; i < insize; i++) {
+				psize++;
+				q = q->next == oldhead ? NULL : q->next;
+				if (!q)
+					break;
+			}
+
+			qsize = insize;
+			while (psize > 0 || (qsize > 0 && q)) {
+				if (!psize) {
+					e = q;
+					q = q->next;
+					qsize--;
+					if (q == oldhead)
+						q = NULL;
+				} else if (!qsize || !q) {
+					e = p;
+					p = p->next;
+					psize--;
+					if (p == oldhead)
+						p = NULL;
+				} else if (cmp(priv, p, q) <= 0) {
+					e = p;
+					p = p->next;
+					psize--;
+					if (p == oldhead)
+						p = NULL;
+				} else {
+					e = q;
+					q = q->next;
+					qsize--;
+					if (q == oldhead)
+						q = NULL;
+				}
+				if (tail)
+					tail->next = e;
+				else
+					list = e;
+				e->prev = tail;
+				tail = e;
+			}
+			p = q;
+		}
+
+		tail->next = list;
+		list->prev = tail;
+
+		if (nmerges <= 1)
+			break;
+
+		insize *= 2;
+	}
+
+	head->next = list;
+	head->prev = list->prev;
+	list->prev->next = head;
+	list->prev = head;
+}
+
+EXPORT_SYMBOL(list_sort);
--- linux-mvl-dove-2.6.32.orig/lib/dma-debug.c
+++ linux-mvl-dove-2.6.32/lib/dma-debug.c
@@ -670,12 +670,13 @@
 	return count;
 }
 
-static int dma_debug_device_change(struct notifier_block *nb,
-				    unsigned long action, void *data)
+static int dma_debug_device_change(struct notifier_block *nb, unsigned long action, void *data)
 {
 	struct device *dev = data;
 	int count;
 
+	if (global_disable)
+		return 0;
 
 	switch (action) {
 	case BUS_NOTIFY_UNBOUND_DRIVER:
@@ -697,6 +698,9 @@
 {
 	struct notifier_block *nb;
 
+	if (global_disable)
+		return;
+
 	nb = kzalloc(sizeof(struct notifier_block), GFP_KERNEL);
 	if (nb == NULL) {
 		pr_err("dma_debug_add_bus: out of memory\n");
@@ -909,6 +913,9 @@
 				ref->size);
 	}
 
+	if (entry->direction == DMA_BIDIRECTIONAL)
+		goto out;
+
 	if (ref->direction != entry->direction) {
 		err_printk(dev, entry, "DMA-API: device driver syncs "
 				"DMA memory with different direction "
@@ -919,9 +926,6 @@
 				dir2name[ref->direction]);
 	}
 
-	if (entry->direction == DMA_BIDIRECTIONAL)
-		goto out;
-
 	if (to_cpu && !(entry->direction == DMA_FROM_DEVICE) &&
 		      !(ref->direction == DMA_TO_DEVICE))
 		err_printk(dev, entry, "DMA-API: device driver syncs "
@@ -944,7 +948,6 @@
 
 out:
 	put_hash_bucket(bucket, &flags);
-
 }
 
 void debug_dma_map_page(struct device *dev, struct page *page, size_t offset,
--- linux-mvl-dove-2.6.32.orig/lib/rational.c
+++ linux-mvl-dove-2.6.32/lib/rational.c
@@ -7,6 +7,7 @@
  */
 
 #include <linux/rational.h>
+#include <linux/module.h>
 
 /*
  * calculate best rational approximation for a given fraction
--- linux-mvl-dove-2.6.32.orig/debian.master/control.stub.in
+++ linux-mvl-dove-2.6.32/debian.master/control.stub.in
@@ -0,0 +1,90 @@
+Source: linux
+Section: devel
+Priority: optional
+Maintainer: Ubuntu Kernel Team <kernel-team@lists.ubuntu.com>
+Standards-Version: 3.8.4.0
+Build-Depends: debhelper (>= 5), cpio, module-init-tools, kernel-wedge (>= 2.24ubuntu1), makedumpfile [amd64 i386 lpia], device-tree-compiler [powerpc], libelf-dev, binutils-dev, rsync
+Build-Depends-Indep: xmlto, docbook-utils, ghostscript, transfig, bzip2, sharutils, asciidoc
+Build-Conflicts: findutils (= 4.4.1-1ubuntu1)
+Vcs-Git: http://kernel.ubuntu.com/git-repos/ubuntu/ubuntu-lucid.git
+
+Package: SRCPKGNAME-source-PKGVER
+Architecture: all
+Section: devel
+Priority: optional
+Provides: SRCPKGNAME-source, SRCPKGNAME-source-2.6
+Depends: ${misc:Depends}, binutils, bzip2, coreutils | fileutils (>= 4.0)
+Recommends: libc-dev, gcc, make
+Suggests: libncurses-dev | ncurses-dev, kernel-package, libqt3-dev
+Description: Linux kernel source for version PKGVER with Ubuntu patches
+ This package provides the source code for the Linux kernel version
+ PKGVER.
+ .
+ This package is mainly meant for other packages to use, in order to build
+ custom flavours.
+ .
+ If you wish to use this package to create a custom Linux kernel, then it
+ is suggested that you investigate the package kernel-package, which has
+ been designed to ease the task of creating kernel image packages.
+ .
+ If you are simply trying to build third-party modules for your kernel,
+ you do not want this package. Install the appropriate linux-headers
+ package instead.
+
+Package: SRCPKGNAME-doc
+Architecture: all
+Section: doc
+Priority: optional
+Depends: ${misc:Depends}
+Conflicts: SRCPKGNAME-doc-2.6
+Replaces: SRCPKGNAME-doc-2.6
+Description: Linux kernel specific documentation for version PKGVER
+ This package provides the various documents in the PKGVER kernel
+ Documentation/ subdirectory.  These document kernel subsystems, APIs, device
+ drivers, and so on.  See
+ /usr/share/doc/SRCPKGNAME-doc/00-INDEX for a list of what is
+ contained in each file.
+
+Package: SRCPKGNAME-tools-common
+Architecture: all
+Section: admin
+Priority: optional
+Depends: ${misc:Depends}
+Replaces: SRCPKGNAME-tools (<= 2.6.32-16.25)
+Description: Linux kernel specific tools for version PKGVER
+ This package provides the architecture independent parts for kernel
+ version locked tools in the PKGVER kernel source.
+
+Package: linux-headers-PKGVER-ABINUM
+Architecture: all
+Section: devel
+Priority: optional
+Depends: ${misc:Depends}, coreutils | fileutils (>= 4.0)
+Provides: SRCPKGNAME-headers, SRCPKGNAME-headers-2.6
+Description: Header files related to Linux kernel version PKGVER
+ This package provides kernel header files for version PKGVER, for sites
+ that want the latest kernel headers. Please read
+ /usr/share/doc/SRCPKGNAME-headers-PKGVER-ABINUM/debian.README.gz for details
+
+Package: SRCPKGNAME-libc-dev
+Architecture: i386 amd64 lpia ia64 powerpc sparc armel
+Depends: ${misc:Depends}
+Conflicts: libc6-dev (<< 2.3.2.ds1-6), libc6.1-dev (<< 2.3.2.ds1-6), dvb-dev (<< 1.0.1-6), amd64-libs-dev (<= 1.1), SRCPKGNAME-kernel-headers
+Replaces: libc6-dev (<< 2.3.2.ds1-6), libc6.1-dev (<< 2.3.2.ds1-6), dvb-dev (<< 1.0.1-6), SRCPKGNAME-kernel-headers, libdrm-dev
+Provides: SRCPKGNAME-kernel-headers
+Description: Linux Kernel Headers for development
+ This package provides headers from the Linux kernel.  These headers
+ are used by the installed headers for GNU glibc and other system
+ libraries. They are NOT meant to be used to build third-party modules for
+ your kernel. Use SRCPKGNAME-headers-* packages for that.
+
+Package: linux-tools-PKGVER-ABINUM
+Architecture: i386 amd64 lpia ia64 powerpc sparc armel
+Section: devel
+Priority: optional
+Depends: ${misc:Depends}, ${shlibs:Depends}, linux-tools-common
+Description: Linux kernel tools for version PKGVER-ABINUM
+ This package provides the architecture dependant parts for kernel
+ version locked tools for version PKGVER-ABINUM on
+ DESC.
+
--- linux-mvl-dove-2.6.32.orig/debian.master/deviations.txt
+++ linux-mvl-dove-2.6.32/debian.master/deviations.txt
@@ -0,0 +1,36 @@
+DRM SUBSYSTEM
+L:	kernel-team@lists.ubuntu.com
+T:	git://git.kernel.org/pub/scm/linux/kernel/git/smb/linux-2.6.32.y-drm33.z.git
+F:	drivers/gpu/drm/*
+F:	include/drm/*
+
+	Graphics bugs were claimed to be not fixable in 2.6.32. All upstream
+	had moved to 2.6.33 and abandoned 2.6.32.
+	The combined 2.6.32.y/DRM33.z tree is maintained as an upstream source
+	for Ubuntu and Debian.
+
+SFC DRIVER
+L:	kernel-team@lists.ubuntu.com
+T:	git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-2.6.33.y.git
+F:	drivers/net/sfc/*
+
+	Was requested in order to support newer servers and driver had changed
+	beyond a point to SRU it later.
+
+THINKPAD-ACPI DRIVER
+L:	kernel-team@lists.ubuntu.com
+T:	git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-2.6.34.y.git
+F:	drivers/platform/x86/thinkpad_acpi.c
+
+	Only the selected driver supported the alsa representation of the
+	hardware mixer which would be a requisite to handle volume events
+	correctly. 
+
+HID-NTRIG DRIVER
+L:	kernel-team@lists.ubuntu.com
+T:	git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-2.6.34.y.git
+F:	drivers/hid/hid-ntrig.c
+
+	In order to be a development ground for multi-touch, this driver was
+	needed.
+
--- linux-mvl-dove-2.6.32.orig/debian.master/copyright
+++ linux-mvl-dove-2.6.32/debian.master/copyright
@@ -0,0 +1,29 @@
+This is the Ubuntu prepackaged version of the Linux kernel.
+Linux was written by Linus Torvalds <Linus.Torvalds@cs.Helsinki.FI>
+and others.
+
+This package was put together by the Ubuntu Kernel Team, from
+sources retrieved from upstream linux git.
+The sources may be found at most Linux ftp sites, including 
+ftp://ftp.kernel.org/pub/linux/kernel/
+
+This package is currently maintained by the
+Ubuntu Kernel Team <ubuntu-kernel@lists.ubuntu.com>
+
+Linux is copyrighted by Linus Torvalds and others.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; version 2 dated June, 1991.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+On Ubuntu Linux systems, the complete text of the GNU General
+Public License v2 can be found in `/usr/share/common-licenses/GPL-2'.
--- linux-mvl-dove-2.6.32.orig/debian.master/NOTES
+++ linux-mvl-dove-2.6.32/debian.master/NOTES
@@ -0,0 +1,4 @@
+eSCO patch removed. Replaced upstream with a disable_esco module parm.
+airprime: Module gone, use option driver instead
+AppArmor: Patch is all there and ported. Ooops when enabled, so default
+	off (still can be enabled apparmor=1)
--- linux-mvl-dove-2.6.32.orig/debian.master/changelog
+++ linux-mvl-dove-2.6.32/debian.master/changelog
@@ -0,0 +1,9412 @@
+linux (2.6.32-34.74) lucid-proposed; urgency=low
+
+  [Herton R. Krzesinski]
+
+  * Release Tracking Bug
+    - LP: #828375
+
+  [ Upstream Kernel Changes ]
+
+  * proc: fix oops on invalid /proc/<pid>/maps access, CVE-2011-1020
+    - LP: #813026
+    - CVE-2011-1020
+
+ -- Herton Ronaldo Krzesinski <herton.krzesinski@canonical.com>  Wed, 17 Aug 2011 19:14:22 -0300
+
+linux (2.6.32-34.73) lucid-proposed; urgency=low
+
+  [Herton R. Krzesinski]
+
+  * Release Tracking Bug
+    - LP: #824148
+
+  [ Tim Gardner ]
+
+  * SAUCE: rtl8192se: Force a build for a 2.6/3.0 kernel
+    - LP: #805494
+  * [Config] Add enic/fnic to udebs
+    - LP: #801610
+
+  [ Upstream Kernel Changes ]
+
+  * tty: icount changeover for other main devices, CVE-2010-4076,
+    CVE-2010-4077
+    - LP: #720189
+    - CVE-2010-4077
+  * fs/partitions/efi.c: corrupted GUID partition tables can cause kernel
+    oops
+    - LP: #795418
+    - CVE-2011-1577
+  * ftrace: Only update the function code on write to filter files
+    - LP: #802383
+  * kmemleak: Do not return a pointer to an object that kmemleak did not
+    get
+    - LP: #802383
+  * CPU hotplug, re-create sysfs directory and symlinks
+    - LP: #802383
+  * Fix memory leak in cpufreq_stat
+    - LP: #802383
+  * powerpc/kexec: Fix memory corruption from unallocated slaves
+    - LP: #802383
+  * powerpc/oprofile: Handle events that raise an exception without
+    overflowing
+    - LP: #802383
+  * mtd: mtdconcat: fix NAND OOB write
+    - LP: #802383
+  * x86, 64-bit: Fix copy_[to/from]_user() checks for the userspace address
+    limit
+    - LP: #802383
+  * ext3: Fix fs corruption when make_indexed_dir() fails
+    - LP: #802383
+  * jbd: Fix forever sleeping process in do_get_write_access()
+    - LP: #802383
+  * jbd: fix fsync() tid wraparound bug
+    - LP: #802383
+  * ext4: release page cache in ext4_mb_load_buddy error path
+    - LP: #802383
+  * Fix Ultrastor asm snippet
+    - LP: #802383
+  * x86, amd: Do not enable ARAT feature on AMD processors below family
+    0x12
+    - LP: #802383
+  * x86, amd: Use _safe() msr access for GartTlbWlk disable code
+    - LP: #802383
+  * rcu: Fix unpaired rcu_irq_enter() from locking selftests
+    - LP: #802383
+  * staging: usbip: fix wrong endian conversion
+    - LP: #802383
+  * Fix for buffer overflow in ldm_frag_add not sufficient
+    - LP: #802383
+  * seqlock: Don't smp_rmb in seqlock reader spin loop
+    - LP: #802383
+  * ALSA: HDA: Use one dmic only for Dell Studio 1558
+    - LP: #731706, #802383
+  * ASoC: Ensure output PGA is enabled for line outputs in wm_hubs
+    - LP: #802383
+  * ASoC: Add some missing volume update bit sets for wm_hubs devices
+    - LP: #802383
+  * mm/page_alloc.c: prevent unending loop in __alloc_pages_slowpath()
+    - LP: #802383
+  * loop: limit 'max_part' module param to DISK_MAX_PARTS
+    - LP: #802383
+  * loop: handle on-demand devices correctly
+    - LP: #802383
+  * USB: CP210x Add 4 Device IDs for AC-Services Devices
+    - LP: #802383
+  * USB: moto_modem: Add USB identifier for the Motorola VE240.
+    - LP: #802383
+  * USB: serial: ftdi_sio: adding support for TavIR STK500
+    - LP: #802383
+  * USB: gamin_gps: Fix for data transfer problems in native mode
+    - LP: #802383
+  * usb/gadget: at91sam9g20 fix end point max packet size
+    - LP: #802383
+  * usb: gadget: rndis: don't test against req->length
+    - LP: #802383
+  * OHCI: fix regression caused by nVidia shutdown workaround
+    - LP: #802383
+  * p54usb: add zoom 4410 usbid
+    - LP: #802383
+  * eCryptfs: Allow 2 scatterlist entries for encrypted filenames
+    - LP: #802383
+  * UBIFS: fix a rare memory leak in ro to rw remounting path
+    - LP: #802383
+  * i8k: Avoid lahf in 64-bit code
+    - LP: #802383
+  * cpuidle: menu: fixed wrapping timers at 4.294 seconds
+    - LP: #802383
+  * dm table: reject devices without request fns
+    - LP: #802383
+  * atm: expose ATM device index in sysfs
+    - LP: #802383
+  * brd: limit 'max_part' module param to DISK_MAX_PARTS
+    - LP: #802383
+  * brd: handle on-demand devices correctly
+    - LP: #802383
+  * SUNRPC: Deal with the lack of a SYN_SENT sk->sk_state_change
+    callback...
+    - LP: #802383
+  * PCI: Add quirk for setting valid class for TI816X Endpoint
+    - LP: #802383
+  * xen mmu: fix a race window causing leave_mm BUG()
+    - LP: #802383
+  * netfilter: nf_conntrack_reasm: properly handle packets fragmented into
+    a single fragment
+    - LP: #802383
+  * fix memory leak in scsi_report_lun_scan
+    - LP: #802383
+  * fix refcounting bug in scsi_get_host_dev
+    - LP: #802383
+  * fix duplicate removal on error path in scsi_sysfs_add_sdev
+    - LP: #802383
+  * UBIFS: fix shrinker object count reports
+    - LP: #802383
+  * UBIFS: fix memory leak on error path
+    - LP: #802383
+  * nbd: limit module parameters to a sane value
+    - LP: #802383
+  * mm: fix ENOSPC returned by handle_mm_fault()
+    - LP: #802383
+  * PCI: Set PCIE maxpayload for card during hotplug insertion
+    - LP: #802383
+  * nl80211: fix check for valid SSID size in scan operations
+    - LP: #802383
+  * lockdep: Fix lock_is_held() on recursion
+    - LP: #802383
+  * drm/i915: Add a no lvds quirk for the Asus EeeBox PC EB1007
+    - LP: #802383
+  * drm/radeon/kms: fix for radeon on systems >4GB without hardware iommu
+    - LP: #802383
+  * fat: Fix corrupt inode flags when remove ATTR_SYS flag
+    - LP: #802383
+  * xen: off by one errors in multicalls.c
+    - LP: #802383
+  * x86/amd-iommu: Fix 3 possible endless loops
+    - LP: #802383
+  * USB: cdc-acm: Adding second ACM channel support for Nokia E7 and C7
+    - LP: #802383
+  * USB: core: Tolerate protocol stall during hub and port status read
+    - LP: #802383
+  * USB: serial: add another 4N-GALAXY.DE PID to ftdi_sio driver
+    - LP: #802383
+  * ALSA: hda: Fix quirk for Dell Inspiron 910
+    - LP: #792712, #802383
+  * oprofile, dcookies: Fix possible circular locking dependency
+    - LP: #802383
+  * CPUFREQ: Remove cpufreq_stats sysfs entries on module unload.
+    - LP: #802383
+  * md: check ->hot_remove_disk when removing disk
+    - LP: #802383
+  * md/raid5: fix raid5_set_bi_hw_segments
+    - LP: #802383
+  * md/raid5: fix FUA request handling in ops_run_io()
+    - LP: #802383
+  * ata: use pci_dev->revision
+    - LP: #802383
+  * pata_cmd64x: fix PIO setup
+    - LP: #802383
+  * pata_cmd64x: cmd648_bmdma_stop() fix
+    - LP: #802383
+  * pata_cmd64x: remove unused definitions
+    - LP: #802383
+  * pata_cm64x: fix boot crash on parisc
+    - LP: #802383
+  * ACPI: use _HID when supplied by root-level devices
+    - LP: #802383
+  * xfs: properly account for reclaimed inodes
+    - LP: #802383
+  * exec: delay address limit change until point of no return
+    - LP: #802383
+  * netfilter: IPv6: initialize TOS field in REJECT target module
+    - LP: #802383
+  * netfilter: IPv6: fix DSCP mangle code
+    - LP: #802383
+  * genirq: Add IRQF_FORCE_RESUME
+    - LP: #802383
+  * xen: Use IRQF_FORCE_RESUME
+    - LP: #802383
+  * time: Compensate for rounding on odd-frequency clocksources
+    - LP: #802383
+  * Linux 2.6.32.42
+    - LP: #802383
+  * taskstats: don't allow duplicate entries in listener mode,
+    CVE-2011-2484
+    - LP: #806390
+    - CVE-2011-2484
+  * drm_mm: extract check_free_mm_node
+    - LP: #599017, #807508
+  * drm: implement helper functions for scanning lru list
+    - LP: #599017, #807508
+  * drm/i915: prepare for fair lru eviction
+    - LP: #599017, #807508
+  * drm/i915: Move the eviction logic to its own file.
+    - LP: #599017, #807508
+  * drm/i915: Implement fair lru eviction across both rings. (v2)
+    - LP: #599017, #807508
+  * drm/i915: Maintain LRU order of inactive objects upon access by CPU
+    (v2)
+    - LP: #599017, #807508
+  * drm/i915/evict: Ensure we completely cleanup on failure
+    - LP: #599017, #807508
+  * drm/i915: Periodically flush the active lists and requests
+    - LP: #599017, #807508
+  * Linux 2.6.32.42+drm33.19
+    - LP: #807508
+  * net: add limit for socket backlog CVE-2010-4251
+    - LP: #807462
+  * tcp: use limited socket backlog CVE-2010-4251
+    - LP: #807462
+  * ipv6: udp: Optimise multicast reception
+    - LP: #807462
+  * ipv4: udp: Optimise multicast reception
+    - LP: #807462
+  * udp: multicast RX should increment SNMP/sk_drops counter in allocation
+    failures CVE-2010-4251
+    - LP: #807462
+  * udp: use limited socket backlog CVE-2010-4251
+    - LP: #807462
+  * llc: use limited socket backlog CVE-2010-4251
+    - LP: #807462
+  * sctp: use limited socket backlog CVE-2010-4251
+    - LP: #807462
+  * tipc: use limited socket backlog CVE-2010-4251
+    - LP: #807462
+  * x25: use limited socket backlog CVE-2010-4251
+    - LP: #807462
+  * net: backlog functions rename CVE-2010-4251
+    - LP: #807462
+  * net: sk_add_backlog() take rmem_alloc into account CVE-2010-4805
+    - LP: #809318
+  * ksm: fix NULL pointer dereference in scan_get_next_rmap_item()
+    - LP: #810425
+  * migrate: don't account swapcache as shmem
+    - LP: #810425
+  * clocksource: Make watchdog robust vs. interruption
+    - LP: #810425
+  * TTY: ldisc, do not close until there are readers
+    - LP: #810425
+  * xhci: Reject double add of active endpoints.
+    - LP: #810425
+  * PM: Free memory bitmaps if opening /dev/snapshot fails
+    - LP: #810425
+  * ath5k: fix memory leak when fewer than N_PD_CURVES are in use
+    - LP: #810425
+  * mm: fix negative commitlimit when gigantic hugepages are allocated
+    - LP: #810425
+  * uvcvideo: Remove buffers from the queues when freeing
+    - LP: #810425
+  * watchdog: mtx1-wdt: request gpio before using it
+    - LP: #810425
+  * debugobjects: Fix boot crash when kmemleak and debugobjects enabled
+    - LP: #810425
+  * cfq-iosched: fix locking around ioc->ioc_data assignment
+    - LP: #810425
+  * cfq-iosched: fix a rcu warning
+    - LP: #810425
+  * i2c-taos-evm: Fix log messages
+    - LP: #810425
+  * md: avoid endless recovery loop when waiting for fail device to
+    complete.
+    - LP: #810425
+  * SUNRPC: Ensure the RPC client only quits on fatal signals
+    - LP: #810425
+  * 6pack,mkiss: fix lock inconsistency
+    - LP: #810425
+  * USB: don't let errors prevent system sleep
+    - LP: #810425
+  * USB: don't let the hub driver prevent system sleep
+    - LP: #810425
+  * uml: fix CONFIG_STATIC_LINK=y build failure with newer glibc
+    - LP: #810425
+  * um: os-linux/mem.c needs sys/stat.h
+    - LP: #810425
+  * inet_diag: fix inet_diag_bc_audit()
+    - LP: #810425
+  * PM / Hibernate: Avoid hitting OOM during preallocation of memory
+    - LP: #810425
+  * PM / Hibernate: Fix free_unnecessary_pages()
+    - LP: #810425
+  * bug.h: Add WARN_RATELIMIT
+    - LP: #810425
+  * net: filter: Use WARN_RATELIMIT
+    - LP: #810425
+  * af_packet: prevent information leak
+    - LP: #810425
+  * net/ipv4: Check for mistakenly passed in non-IPv4 address
+    - LP: #810425
+  * ipv6/udp: Use the correct variable to determine non-blocking condition
+    - LP: #810425
+  * udp/recvmsg: Clear MSG_TRUNC flag when starting over for a new packet
+    - LP: #810425
+  * mm: prevent concurrent unmap_mapping_range() on the same inode
+    - LP: #810425
+  * xen: set max_pfn_mapped to the last pfn mapped
+    - LP: #810425
+  * xen: partially revert "xen: set max_pfn_mapped to the last pfn mapped"
+    - LP: #810425
+  * Linux 2.6.32.43
+    - LP: #810425
+  * eCryptfs: Handle failed metadata read in lookup
+    - LP: #509180
+  * pagemap: close races with suid execve, CVE-2011-1020
+    - LP: #813026
+    - CVE-2011-1020
+  * report errors in /proc/*/*map* sanely, CVE-2011-1020
+    - LP: #813026
+    - CVE-2011-1020
+  * close race in /proc/*/environ, CVE-2011-1020
+    - LP: #813026
+    - CVE-2011-1020
+  * auxv: require the target to be tracable (or yourself), CVE-2011-1020
+    - LP: #813026
+    - CVE-2011-1020
+  * deal with races in /proc/*/{syscall, stack, personality}, CVE-2011-1020
+    - LP: #813026
+    - CVE-2011-1020
+  * rose_loopback_timer sets VC number <= ROSE_DEFAULT_MAXVC, CVE-2011-1493
+    - LP: #816550
+    - CVE-2011-1493
+  * rose: Add length checks to CALL_REQUEST parsing, CVE-2011-1493
+    - LP: #816550
+    - CVE-2011-1493
+  * Bluetooth: l2cap and rfcomm: fix 1 byte infoleak to userspace.
+    - LP: #819569
+    - CVE-2011-2492
+  * drm/nv50-nvc0: work around an evo channel hang that some people see
+    - LP: #583760
+  * ASoC: Fix Blackfin I2S _pointer() implementation return in bounds
+    values
+    - LP: #823296
+  * v4l2-ioctl.c: prefill tuner type for g_frequency and g/s_tuner
+    - LP: #823296
+  * pvrusb2: fix g/s_tuner support
+    - LP: #823296
+  * bttv: fix s_tuner for radio
+    - LP: #823296
+  * gro: Only reset frag0 when skb can be pulled
+    - LP: #823296
+  * NFSv4.1: update nfs4_fattr_bitmap_maxsz
+    - LP: #823296
+  * SUNRPC: Fix a race between work-queue and rpc_killall_tasks
+    - LP: #823296
+  * SUNRPC: Fix use of static variable in rpcb_getport_async
+    - LP: #823296
+  * si4713-i2c: avoid potential buffer overflow on si4713
+    - LP: #823296
+  * hwmon: (max1111) Fix race condition causing NULL pointer exception
+    - LP: #823296
+  * bridge: send proper message_age in config BPDU
+    - LP: #823296
+  * davinci: DM365 EVM: fix video input mux bits
+    - LP: #823296
+  * libata: fix unexpectedly frozen port after ata_eh_reset()
+    - LP: #823296
+  * x86: Make Dell Latitude E5420 use reboot=pci
+    - LP: #823296
+  * USB: pl2303: add AdLink ND-6530 USB IDs
+    - LP: #823296
+  * USB: pl2303.h: checkpatch cleanups
+    - LP: #823296
+  * USB: serial: add IDs for WinChipHead USB->RS232 adapter
+    - LP: #823296
+  * staging: comedi: fix infoleak to userspace
+    - LP: #823296
+  * USB: OHCI: fix another regression for NVIDIA controllers
+    - LP: #823296
+  * usb: musb: restore INDEX register in resume path
+    - LP: #823296
+  * USB: dummy-hcd needs the has_tt flag
+    - LP: #823296
+  * ARM: pxa/cm-x300: fix V3020 RTC functionality
+    - LP: #823296
+  * jme: Fix unmap error (Causing system freeze)
+    - LP: #823296
+  * libsas: remove expander from dev list on error
+    - LP: #823296
+  * mac80211: Restart STA timers only on associated state
+    - LP: #823296
+  * Blacklist Traxdata CDR4120 and IOMEGA Zip drive to avoid lock ups.
+    - LP: #823296
+  * ses: requesting a fault indication
+    - LP: #823296
+  * pmcraid: reject negative request size
+    - LP: #823296
+  * kexec, x86: Fix incorrect jump back address if not preserving context
+    - LP: #823296
+  * powerpc/kdump: Fix timeout in crash_kexec_wait_realmode
+    - LP: #823296
+  * PCI: ARI is a PCIe v2 feature
+    - LP: #823296
+  * cciss: do not attempt to read from a write-only register
+    - LP: #823296
+  * xtensa: prevent arbitrary read in ptrace
+    - LP: #823296
+  * ext3: Fix oops in ext3_try_to_allocate_with_rsv()
+    - LP: #823296
+  * svcrpc: fix list-corrupting race on nfsd shutdown
+    - LP: #823296
+  * EHCI: only power off port if over-current is active
+    - LP: #823296
+  * EHCI: fix direction handling for interrupt data toggles
+    - LP: #823296
+  * powerpc/pseries/hvconsole: Fix dropped console output
+    - LP: #823296
+  * x86: Hpet: Avoid the comparator readback penalty
+    - LP: #823296
+  * x86: HPET: Chose a paranoid safe value for the ETIME check
+    - LP: #823296
+  * cifs: clean up cifs_find_smb_ses (try #2)
+    - LP: #823296
+  * cifs: fix NULL pointer dereference in cifs_find_smb_ses
+    - LP: #823296
+  * cifs: check for NULL session password
+    - LP: #823296
+  * gre: fix netns vs proto registration ordering
+    - LP: #823296
+  * netns xfrm: fixup xfrm6_tunnel error propagation
+    - LP: #823296
+  * tunnels: fix netns vs proto registration ordering
+    - LP: #823296
+  * alpha: fix several security issues
+    - LP: #823296
+  * proc: restrict access to /proc/PID/io
+    - LP: #823296
+  * ALSA: sound/core/pcm_compat.c: adjust array index
+    - LP: #823296
+  * dm mpath: fix potential NULL pointer in feature arg processing
+    - LP: #823296
+  * dm: fix idr leak on module removal
+    - LP: #823296
+  * perf: overflow/perf_count_sw_cpu_clock crashes recent kernels
+    - LP: #823296
+  * atm: [br2684] allow routed mode operation again
+    - LP: #823296
+  * Linux 2.6.32.44
+    - LP: #823296
+
+ -- Herton Ronaldo Krzesinski <herton.krzesinski@canonical.com>  Wed, 10 Aug 2011 16:52:10 -0300
+
+linux (2.6.32-33.72) lucid-proposed; urgency=low
+
+  [Steve Conklin]
+
+  * Release Tracking Bug
+    - LP: #818196
+
+  [ Upstream Kernel Changes ]
+
+  * Revert "fix oops in scsi_run_queue()"
+    - LP: #811745
+  * Revert "put stricter guards on queue dead checks"
+    - LP: #811745
+
+ -- Steve Conklin <sconklin@canonical.com>  Fri, 29 Jul 2011 12:33:46 -0500
+
+linux (2.6.32-33.71) lucid-proposed; urgency=low
+
+  [Andy Whitcroft]
+
+  * Release Tracking Bug
+    - LP: #813507
+
+  [ Upstream Kernel Changes ]
+
+  * splice: direct_splice_actor() should not use pos in sd
+    - LP: #588861
+
+ -- Andy Whitcroft <apw@canonical.com>  Wed, 20 Jul 2011 14:31:11 +0100
+
+linux (2.6.32-33.70) lucid-proposed; urgency=low
+
+  [Steve Conklin]
+
+  * Release Tracking Bug
+    - LP: #807175
+
+  [ Upstream Kernel Changes ]
+
+  * Revert "x86: Flush TLB if PGD entry is changed in i386 PAE mode"
+    - LP: #805209
+
+ -- Steve Conklin <sconklin@canonical.com>  Thu, 07 Jul 2011 14:08:13 -0500
+
+linux (2.6.32-33.69) lucid-proposed; urgency=low
+
+  [Steve Conklin]
+
+  * Release Tracking Bug
+    - LP: #802554
+
+  [ Upstream Kernel Changes ]
+
+  * Revert "af_unix: Only allow recv on connected seqpacket sockets."
+
+ -- Steve Conklin <sconklin@canonical.com>  Wed, 22 Jun 2011 10:53:16 -0500
+
+linux (2.6.32-33.68) lucid-proposed; urgency=low
+
+  [ Steve Conklin ]
+
+  * Release Tracking Bug
+    - LP: #798305
+  * Fix abi directory
+
+ -- Steve Conklin <sconklin@canonical.com>  Fri, 17 Jun 2011 09:41:35 -0500
+
+linux (2.6.32-33.67) lucid-proposed; urgency=low
+
+  [ Upstream Kernel Changes ]
+
+  * Revert "iwlagn: Support new 5000 microcode."
+
+ -- Steve Conklin <sconklin@canonical.com>  Thu, 16 Jun 2011 10:51:45 -0500
+
+linux (2.6.32-33.66) lucid-proposed; urgency=low
+
+  [ Brad Figg ]
+
+  * Release Tracking Bug
+    - LP: #794098
+
+  [ Upstream Kernel Changes ]
+
+  * Revert "xhci: Fix full speed bInterval encoding."
+  * Revert "USB: xhci - fix math in xhci_get_endpoint_interval()"
+  * Revert "USB: xhci - fix unsafe macro definitions"
+
+ -- Brad Figg <brad.figg@canonical.com>  Tue, 07 Jun 2011 08:06:27 -0700
+
+linux (2.6.32-33.65) lucid-proposed; urgency=low
+
+  [ Upstream Kernel Changes ]
+
+  * xhci: Fix full speed bInterval encoding.
+    - LP: #792959
+
+ -- Steve Conklin <sconklin@canonical.com>  Sat, 04 Jun 2011 18:41:10 -0500
+
+linux (2.6.32-33.64) lucid-proposed; urgency=low
+
+  [ Herton R. Krzesinski ]
+
+   * Release Tracking Bug
+     - LP: #789325
+
+  [ Leann Ogasawara ]
+
+  * SAUCE: (no-up) Fix up KVM: VMX: Fix host userspace gsbase corruption
+    - LP: #787675
+
+  [ Thomas Schlichter ]
+
+  * SAUCE: vesafb: mtrr module parameter is uint, not bool
+    - LP: #778043
+
+  [ Tim Gardner ]
+
+  * Revert "(pre-stable): input: Support Clickpad devices in ClickZone
+    mode"
+    - LP: #780588
+
+  [ Upstream Kernel Changes ]
+
+  * Revert "GFS2: Fix writing to non-page aligned gfs2_quota structures"
+    - LP: #780588
+  * Revert "mmc: build fix: mmc_pm_notify is only available with
+    CONFIG_PM=y"
+    - LP: #780588
+  * Revert "mmc: fix all hangs related to mmc/sd card insert/removal during
+    suspend/resume"
+    - LP: #780588
+  * Revert "econet: fix CVE-2010-3848"
+    - LP: #780588
+  * Revert "dell-laptop: Add another Dell laptop family to the DMI
+    whitelist"
+    - LP: #780588
+  * Revert "dell-laptop: Add another Dell laptop family to the DMI
+    whitelist"
+    - LP: #780588
+  * Revert "xen: set max_pfn_mapped to the last pfn mapped"
+  * cifs: always do is_path_accessible check in cifs_mount
+    - LP: #770050
+  * video: sn9c102: world-wirtable sysfs files
+    - LP: #770050
+  * UBIFS: restrict world-writable debugfs files
+    - LP: #770050
+  * NET: cdc-phonet, handle empty phonet header
+    - LP: #770050
+  * x86: Fix a bogus unwind annotation in lib/semaphore_32.S
+    - LP: #770050
+  * tioca: Fix assignment from incompatible pointer warnings
+    - LP: #770050
+  * mca.c: Fix cast from integer to pointer warning
+    - LP: #770050
+  * ramfs: fix memleak on no-mmu arch
+    - LP: #770050
+  * MAINTAINERS: update STABLE BRANCH info
+    - LP: #770050
+  * UBIFS: fix oops when R/O file-system is fsync'ed
+    - LP: #770050
+  * x86, cpu: AMD errata checking framework
+    - LP: #770050
+  * x86, cpu: Clean up AMD erratum 400 workaround
+    - LP: #770050
+  * x86, AMD: Set ARAT feature on AMD processors
+    - LP: #770050
+  * x86, amd: Disable GartTlbWlkErr when BIOS forgets it
+    - LP: #770050
+  * USB: ftdi_sio: Added IDs for CTI USB Serial Devices
+    - LP: #770050
+  * USB: ftdi_sio: add PID for OCT DK201 docking station
+    - LP: #770050
+  * USB: ftdi_sio: add ids for Hameg HO720 and HO730
+    - LP: #770050
+  * USB: option: Add new ONDA vendor id and product id for ONDA MT825UP
+    - LP: #770050
+  * USB: option: Added support for Samsung GT-B3730/GT-B3710 LTE USB modem.
+    - LP: #770050
+  * next_pidmap: fix overflow condition
+    - LP: #770050
+  * proc: do proper range check on readdir offset
+    - LP: #770050
+  * USB: EHCI: unlink unused QHs when the controller is stopped
+    - LP: #770050
+  * USB: fix formatting of SuperSpeed endpoints in /proc/bus/usb/devices
+    - LP: #770050
+  * USB: xhci - fix unsafe macro definitions
+    - LP: #770050
+  * USB: xhci - fix math in xhci_get_endpoint_interval()
+    - LP: #770050
+  * x86, cpu: Fix regression in AMD errata checking code
+    - LP: #770050
+  * Linux 2.6.32.39
+    - LP: #770050
+  * fs/partitions/ldm.c: fix oops caused by corrupted partition table,
+    CVE-2011-1017
+    - LP: #771382
+    - CVE-2011-1017
+  * drm/i915: set DIDL using the ACPI video output device _ADR method
+    return.
+    - LP: #775547
+  * drm/radeon/kms: MC vram map needs to be >= pci aperture size
+    - LP: #775547
+  * drm/radeon/kms: make sure blit addr masks are 64 bit
+    - LP: #775547
+  * drm/radeon/kms: fix handling of tex lookup disable in cs checker on
+    r2xx
+    - LP: #775547
+  * drm/i915: Free hardware status page on unload when physically mapped
+    - LP: #775547
+  * drm/i915/overlay: Ensure that the reg_bo is in the GTT prior to
+    writing.
+    - LP: #775547
+  * drm/radeon/kms/atom: set sane defaults in atombios_get_encoder_mode()
+    - LP: #775547
+  * drm/radeon/kms: fix typos in disabled vbios code
+    - LP: #775547
+  * drm/radeon/kms: add workaround for dce3 ddc line vbios bug
+    - LP: #775547
+  * drm/radeon/kms: fix interlaced and doublescan handling
+    - LP: #775547
+  * drm/i915/sdvo: Always add a 30ms delay to make SDVO TV detection
+    reliable
+    - LP: #775547
+  * drm/radeon/kms: don't apply 7xx HDP flush workaround on AGP
+    - LP: #775547
+  * drm/ttm: Fix two race conditions + fix busy codepaths
+    - LP: #775547
+  * drm/i915: overlay on gen2 can't address above 1G
+    - LP: #775547
+  * drm/i915: fix memory corruption with GM965 and >4GB RAM
+    - LP: #775547
+  * drm/radeon: add quirk to make HP nx6125 laptop resume.
+    - LP: #775547
+  * drm/radeon/kms: add quirk to make HP DV5000 laptop resume
+    - LP: #775547
+  * ath: add missing regdomain pair 0x5c mapping
+    - LP: #780588
+  * block, blk-sysfs: Fix an err return path in blk_register_queue()
+    - LP: #780588
+  * p54: Initialize extra_len in p54_tx_80211
+    - LP: #780588
+  * intel-iommu: Unlink domain from iommu
+    - LP: #780588
+  * intel-iommu: Fix get_domain_for_dev() error path
+    - LP: #780588
+  * NFS: nfs_wcc_update_inode() should set nfsi->attr_gencount
+    - LP: #780588
+  * serial/imx: read cts state only after acking cts change irq
+    - LP: #780588
+  * ASoC: Fix output PGA enabling in wm_hubs CODECs
+    - LP: #780588
+  * kconfig: Avoid buffer underrun in choice input
+    - LP: #780588
+  * UBIFS: fix master node recovery
+    - LP: #780588
+  * Remove extra struct page member from the buffer info structure
+    - LP: #780588
+  * dasd: correct device table
+    - LP: #780588
+  * iwlagn: Support new 5000 microcode.
+    - LP: #780588
+  * atl1c: duplicate atl1c_get_tpd
+    - LP: #780588
+  * udp: Fix bogus UFO packet generation
+    - LP: #780588
+  * slub: fix panic with DISCONTIGMEM
+    - LP: #780588
+  * set memory ranges in N_NORMAL_MEMORY when onlined
+    - LP: #780588
+  * FLEXCOP-PCI: fix __xlate_proc_name-warning for flexcop-pci
+    - LP: #780588
+  * m68k/mm: Set all online nodes in N_NORMAL_MEMORY
+    - LP: #780588
+  * nfs: don't lose MS_SYNCHRONOUS on remount of noac mount
+    - LP: #780588
+  * NFSv4.1: Ensure state manager thread dies on last umount
+    - LP: #780588
+  * agp: fix arbitrary kernel memory writes
+    - LP: #780588
+  * agp: fix OOM and buffer overflow
+    - LP: #780588
+  * Input: xen-kbdfront - fix mouse getting stuck after save/restore
+    - LP: #780588
+  * pmcraid: reject negative request size
+    - LP: #780588
+  * mpt2sas: prevent heap overflows and unchecked reads
+    - LP: #780588
+  * put stricter guards on queue dead checks
+    - LP: #780588
+  * mmc: sdhci-pci: Fix error case in sdhci_pci_probe_slot()
+    - LP: #780588
+  * mmc: sdhci: Check mrq->cmd in sdhci_tasklet_finish
+    - LP: #780588
+  * mmc: sdhci: Check mrq != NULL in sdhci_tasklet_finish
+    - LP: #780588
+  * USB: fix regression in usbip by setting has_tt flag
+    - LP: #780588
+  * af_unix: Only allow recv on connected seqpacket sockets.
+    - LP: #780588
+  * ARM: 6891/1: prevent heap corruption in OABI semtimedop
+    - LP: #780588
+  * i8k: Tell gcc that *regs gets clobbered
+    - LP: #780588
+  * Fix gcc 4.5.1 miscompiling drivers/char/i8k.c (again)
+    - LP: #780588
+  * Open with O_CREAT flag set fails to open existing files on non writable
+    directories
+    - LP: #780588
+  * can: Add missing socket check in can/bcm release.
+    - LP: #780588
+  * netxen: module firmware hints
+    - LP: #780588
+  * bnx2x: declare MODULE_FIRMWARE
+    - LP: #780588
+  * cxgb3: declare MODULE_FIRMWARE
+    - LP: #780588
+  * myri10ge: declare MODULE_FIRMWARE
+    - LP: #780588
+  * netx: declare MODULE_FIRMWARE
+    - LP: #780588
+  * pcnet-cs: declare MODULE_FIRMWARE
+    - LP: #780588
+  * spider-net: declare MODULE_FIRMWARE
+    - LP: #780588
+  * tms380tr: declare MODULE_FIRMWARE
+    - LP: #780588
+  * Input: Add support of Synaptics Clickpad device
+    - LP: #780588
+  * Input: elantech - do not advertise relative events
+    - LP: #780588
+  * Input: elantech - fix firmware version check
+    - LP: #780588
+  * Input: elantech - allow forcing Elantech protocol
+    - LP: #780588
+  * Input: elantech - ignore high bits in the position coordinates
+    - LP: #780588
+  * Input: elantech - use all 3 bytes when checking version
+    - LP: #780588
+  * Input: elantech - relax signature checks
+    - LP: #780588
+  * Input: elantech - discard the first 2 positions on some firmwares
+    - LP: #780588
+  * Staging: rtl8192su: check for skb == NULL
+    - LP: #780588
+  * Staging: rtl8192su: Clean up in case of an error in module
+    initialisation
+    - LP: #780588
+  * Staging: rtl8192su: Fix procfs code for interfaces not named wlan0
+    - LP: #780588
+  * Staging: rtl8192su: remove device ids
+    - LP: #780588
+  * Staging: rtl8192su: add device ids
+    - LP: #780588
+  * USB: retain USB device power/wakeup setting across reconfiguration
+    - LP: #780588
+  * USB: don't enable remote wakeup by default
+    - LP: #780588
+  * USB: teach "devices" file about Wireless and SuperSpeed USB
+    - LP: #780588
+  * GFS2: Clean up gfs2_adjust_quota() and do_glock()
+    - LP: #780588
+  * GFS2: Fix writing to non-page aligned gfs2_quota structures
+    - LP: #780588
+  * GFS2: BUG in gfs2_adjust_quota
+    - LP: #780588
+  * SUNRPC: fix NFS client over TCP hangs due to packet loss (Bug 16494)
+    - LP: #780588
+  * nfs4: Ensure that ACL pages sent over NFS were not allocated from the
+    slab (v3)
+    - LP: #780588
+  * nfs: fix compilation warning
+    - LP: #780588
+  * Fix corrupted OSF partition table parsing
+    - LP: #780588
+  * Increase OSF partition limit from 8 to 18
+    - LP: #780588
+  * Please add support for Microsoft MN-120 PCMCIA network card
+    - LP: #780588
+  * hwmon: (applesmc) Add iMac9,1 and MacBookPro2,2 support
+    - LP: #780588
+  * hwmon: (applesmc) Add support for MacBook Pro 5,3 and 5,4
+    - LP: #780588
+  * hwmon: (applesmc) Add generic support for MacBook Pro 6
+    - LP: #780588
+  * hwmon: (applesmc) Add generic support for MacBook Pro 7
+    - LP: #780588
+  * hwmon: (applesmc) Add MacBookAir3,1(3,2) support
+    - LP: #780588
+  * ALSA: emux: Add trivial compat ioctl handler
+    - LP: #780588
+  * ALSA: powermac - Reverse HP detection on G4 DA
+    - LP: #780588
+  * ALSA: powermac - Lineout detection on G4 DA
+    - LP: #780588
+  * ALSA: hda - Add support for the new 27 inch IMacs
+    - LP: #780588
+  * ALSA: hda - MacBookPro 5,3 line-in support
+    - LP: #780588
+  * ALSA: hda - Add model=mbp55 entry for MacBookPro 7,1
+    - LP: #780588
+  * ALSA: hda - MacBookAir3,1(3,2) alsa support
+    - LP: #780588
+  * virtio_net: fix oom handling on tx
+    - LP: #780588
+  * mac80211: Add define for TX headroom reserved by mac80211 itself.
+    - LP: #780588
+  * rt2x00: Centralize setting of extra TX headroom requested by rt2x00.
+    - LP: #780588
+  * rt2x00: Properly request tx headroom for alignment operations.
+    - LP: #780588
+  * rt2x00: use correct headroom for transmission
+    - LP: #780588
+  * Bluetooth: Add support Bluetooth controller of MacbookPro 6,2
+    - LP: #780588
+  * Bluetooth: Add support Bluetooth controller of MacbookPro 7,1
+    - LP: #780588
+  * Bluetooth: Add MacBookAir3,1(2) support
+    - LP: #780588
+  * perf tools: Display better error messages on missing packages
+    - LP: #780588
+  * perf tools: Add 'make DEBUG=1' to remove the -O6 cflag
+    - LP: #780588
+  * perf tools: Test -fstack-protector-all compiler option for inclusion in
+    CFLAGS
+    - LP: #780588
+  * perf tools: Support static build
+    - LP: #780588
+  * perf tools: Add V=2 option to help debug config issues
+    - LP: #780588
+  * perf tools: Suggest static libraries as well
+    - LP: #780588
+  * perf: Use default compiler mode by default
+    - LP: #780588
+  * perf tools: Move QUIET_STDERR def to before first use
+    - LP: #780588
+  * perf tools: Check if /dev/null can be used as the -o gcc argument
+    - LP: #780588
+  * perf symbols: allow forcing use of cplus_demangle
+    - LP: #780588
+  * V4L/DVB: Add Elgato EyeTV Diversity to dibcom driver
+    - LP: #780588
+  * mmc: fix all hangs related to mmc/sd card insert/removal during
+    suspend/resume
+    - LP: #780588
+  * mmc: build fix: mmc_pm_notify is only available with CONFIG_PM=y
+    - LP: #780588
+  * b43: Fix warning at drivers/mmc/core/core.c:237 in mmc_wait_for_cmd
+    - LP: #780588
+  * econet: Fix redeclaration of symbol len
+    - LP: #780588
+  * econet: fix CVE-2010-3848
+    - LP: #780588
+  * dell-laptop: Add another Dell laptop to the DMI whitelist
+    - LP: #780588
+  * dell-laptop: Add another Dell laptop family to the DMI whitelist
+    - LP: #780588
+  * scsi_dh_emc: fix mode select request setup
+    - LP: #780588
+  * scsi_dh_emc: request flag cleanup
+    - LP: #780588
+  * cifs: fix another memleak, in cifs_root_iget
+    - LP: #780588
+  * e1000e: Reset 82577/82578 PHY before first PHY register read
+    - LP: #780588
+  * e1000: fix Tx hangs by disabling 64-bit DMA
+    - LP: #780588
+  * btrfs: Require CAP_SYS_ADMIN for filesystem rebalance
+    - LP: #780588
+  * af_unix: limit recursion level
+    - LP: #780588
+  * init, sched: Fix race between init and kthreadd
+    - LP: #780588
+  * backlight: MacBookAir3,1(3,2) mbp-nvidia-bl support
+    - LP: #780588
+  * bonding: Ensure that we unshare skbs prior to calling pskb_may_pull
+    - LP: #780588
+  * HID: add MacBookAir 3,1 and 3,2 support
+    - LP: #780588
+  * intel-iommu: Force-disable IOMMU for iGFX on broken Cantiga revisions.
+    - LP: #780588
+  * ipg: Remove device claimed by dl2k from pci id table
+    - LP: #780588
+  * ipv6: Silence privacy extensions initialization
+    - LP: #780588
+  * l2tp: Fix UDP socket reference count bugs in the pppol2tp driver
+    - LP: #780588
+  * MIPS: DMA: Fix computation of DMA flags from device's
+    coherent_dma_mask.
+    - LP: #780588
+  * mpt2sas: fix the incorrect scsi_dma_map error checking
+    - LP: #780588
+  * Phonet: device notifier only runs on initial namespace
+    - LP: #780588
+  * powerpc/boot/dts: Install dts from the right directory
+    - LP: #780588
+  * rt2500usb: fallback to SW encryption for TKIP+AES
+    - LP: #780588
+  * sata_via: Delay on vt6420 when starting ATAPI DMA write
+    - LP: #780588
+  * tehuti: Firmware filename is tehuti/bdx.bin
+    - LP: #780588
+  * wireless: b43: fix error path in SDIO
+    - LP: #780588
+  * libata: set queue DMA alignment to sector size for ATAPI too
+    - LP: #780588
+  * usb: musb: core: set has_tt flag
+    - LP: #780588
+  * iwlwifi: fix skb usage after free
+    - LP: #780588
+  * can: add missing socket check in can/raw release
+    - LP: #780588
+  * fix oops in scsi_run_queue()
+    - LP: #780588
+  * Linux 2.6.32.40
+    - LP: #780588
+  * PCI: allow matching of prefetchable resources to non-prefetchable
+    windows
+    - LP: #424142
+  * cifs: check for bytes_remaining going to zero in CIFS_SessSetup
+    - LP: #788602
+  * Validate size of EFI GUID partition entries.
+    - LP: #788602
+  * dccp: handle invalid feature options length
+    - LP: #788602
+  * CIFS: Fix memory over bound bug in cifs_parse_mount_options
+    - LP: #788602
+  * Fix time() inconsistencies caused by intermediate xtime_cache values
+    being read
+    - LP: #788602
+  * ehea: fix wrongly reported speed and port
+    - LP: #788602
+  * NET: slip, fix ldisc->open retval
+    - LP: #788602
+  * ne-h8300: Fix regression caused during net_device_ops conversion
+    - LP: #788602
+  * hydra: Fix regression caused during net_device_ops conversion
+    - LP: #788602
+  * libertas: fix cmdpendingq locking
+    - LP: #788602
+  * zorro8390: Fix regression caused during net_device_ops conversion
+    - LP: #788602
+  * cifs: add fallback in is_path_accessible for old servers
+    - LP: #788602
+  * x86, AMD: Fix ARAT feature setting again
+    - LP: #788602
+  * clocksource: Install completely before selecting
+    - LP: #788602
+  * tick: Clear broadcast active bit when switching to oneshot
+    - LP: #788602
+  * x86, apic: Fix spurious error interrupts triggering on all non-boot APs
+    - LP: #788602
+  * x86, mce, AMD: Fix leaving freed data in a list
+    - LP: #788602
+  * megaraid_sas: Sanity check user supplied length before passing it to
+    dma_alloc_coherent()
+    - LP: #788602
+  * vmxnet3: Fix inconsistent LRO state after initialization
+    - LP: #788602
+  * netxen: Remove references to unified firmware file
+    - LP: #788602
+  * Linux 2.6.32.41
+    - LP: #788602
+  * drm/radeon/kms: fix bad shift in atom iio table parser
+    - LP: #788602
+  * Linux 2.6.32.41+drm33.18
+    - LP: #788602
+
+ -- Steve Conklin <sconklin@canonical.com>  Tue, 31 May 2011 13:22:59 -0500
+
+linux (2.6.32-32.62) lucid-proposed; urgency=low
+
+  [ Brad Figg ]
+
+  * Release Tracking Bug
+    - LP: #767370
+
+  [ Stefan Bader ]
+
+  * (config) Disable CONFIG_NET_NS
+    - LP: #720095
+
+  [ Upstream Kernel Changes ]
+
+  * Revert "drm/radeon/kms: Fix retrying ttm_bo_init() after it failed
+    once."
+    - LP: #736234
+  * Revert "drm/radeon: fall back to GTT if bo creation/validation in VRAM
+    fails."
+    - LP: #736234
+  * x86: pvclock: Move scale_delta into common header
+  * KVM: x86: Fix a possible backwards warp of kvmclock
+  * KVM: x86: Fix kvmclock bug
+  * cpuset: add a missing unlock in cpuset_write_resmask()
+    - LP: #736234
+  * keyboard: integer underflow bug
+    - LP: #736234
+  * RxRPC: Fix v1 keys
+    - LP: #736234
+  * ixgbe: fix for 82599 erratum on Header Splitting
+    - LP: #736234
+  * mm: fix possible cause of a page_mapped BUG
+    - LP: #736234
+  * powerpc/kdump: CPUs assume the context of the oopsing CPU
+    - LP: #736234
+  * powerpc/kdump: Use chip->shutdown to disable IRQs
+    - LP: #736234
+  * powerpc: Use more accurate limit for first segment memory allocations
+    - LP: #736234
+  * powerpc/pseries: Add hcall to read 4 ptes at a time in real mode
+    - LP: #736234
+  * powerpc/kexec: Speedup kexec hash PTE tear down
+    - LP: #736234
+  * powerpc/crashdump: Do not fail on NULL pointer dereferencing
+    - LP: #736234
+  * powerpc/kexec: Fix orphaned offline CPUs across kexec
+    - LP: #736234
+  * netfilter: nf_log: avoid oops in (un)bind with invalid nfproto values
+    - LP: #736234
+  * nfsd: wrong index used in inner loop
+    - LP: #736234
+  * r8169: use RxFIFO overflow workaround for 8168c chipset.
+    - LP: #736234
+  * Staging: comedi: jr3_pci: Don't ioremap too much space. Check result.
+    - LP: #736234
+  * net: don't allow CAP_NET_ADMIN to load non-netdev kernel modules,
+    CVE-2011-1019
+    - LP: #736234
+    - CVE-2011-1019
+  * ip6ip6: autoload ip6 tunnel
+    - LP: #736234
+  * Linux 2.6.32.33
+    - LP: #736234
+  * drm/radeon: fall back to GTT if bo creation/validation in VRAM fails.
+    - LP: #652934, #736234
+  * drm/radeon/kms: Fix retrying ttm_bo_init() after it failed once.
+    - LP: #652934, #736234
+  * drm: fix unsigned vs signed comparison issue in modeset ctl ioctl,
+    CVE-2011-1013
+    - LP: #736234
+    - CVE-2011-1013
+  * Linux 2.6.32.33+drm33.15
+    - LP: #736234
+  * econet: Fix crash in aun_incoming(). CVE-2010-4342
+    - LP: #736394
+    - CVE-2010-4342
+  * igb: only use vlan_gro_receive if vlans are registered, CVE-2010-4263
+    - LP: #737024
+    - CVE-2010-4263
+  * irda: prevent integer underflow in IRLMP_ENUMDEVICES, CVE-2010-4529
+    - LP: #737823
+    - CVE-2010-4529
+  * hwmon/f71882fg: Set platform drvdata to NULL later
+    - LP: #742056
+  * mtd: add "platform:" prefix for platform modalias
+    - LP: #742056
+  * libata: no special completion processing for EH commands
+    - LP: #742056
+  * MIPS: MTX-1: Make au1000_eth probe all PHY addresses
+    - LP: #742056
+  * x86/mm: Handle mm_fault_error() in kernel space
+    - LP: #742056
+  * ftrace: Fix memory leak with function graph and cpu hotplug
+    - LP: #742056
+  * x86: Fix panic when handling "mem={invalid}" param
+    - LP: #553464, #742056
+  * x86: Emit "mem=nopentium ignored" warning when not supported
+    - LP: #553464, #742056
+  * ahci: AHCI and RAID mode SATA patch for Intel Patsburg DeviceIDs
+    - LP: #742056
+  * ahci: AHCI mode SATA patch for Intel DH89xxCC DeviceIDs
+    - LP: #742056
+  * ahci: AHCI mode SATA patch for Intel Patsburg SATA RAID controller
+    - LP: #742056
+  * RDMA/cma: Fix crash in request handlers
+    - LP: #742056
+  * IB/cm: Bump reference count on cm_id before invoking callback
+    - LP: #742056
+  * ath9k_hw: Fix incorrect macversion and macrev checks
+    - LP: #742056
+  * USB: serial/kobil_sct, fix potential tty NULL dereference
+    - LP: #742056
+  * USB: serial: ch341: add new id
+    - LP: #742056
+  * xhci: Fix cycle bit calculation during stall handling.
+    - LP: #742056
+  * ALSA: hda - fix digital mic selection in mixer on 92HD8X codecs
+    - LP: #742056
+  * PCI: remove quirk for pre-production systems
+    - LP: #742056
+  * PCI: add more checking to ICH region quirks
+    - LP: #742056
+  * PCI: do not create quirk I/O regions below PCIBIOS_MIN_IO for ICH
+    - LP: #742056
+  * PCI: sysfs: Fix failure path for addition of "vpd" attribute
+    - LP: #742056
+  * ALSA: ctxfi - Fix incorrect SPDIF status bit mask
+    - LP: #742056
+  * ALSA: ctxfi - Fix SPDIF status retrieval
+    - LP: #742056
+  * ALSA: ctxfi - Clear input settings before initialization
+    - LP: #742056
+  * SUNRPC: Ensure we always run the tk_callback before tk_action
+    - LP: #742056
+  * perf, powerpc: Handle events that raise an exception without
+    overflowing
+    - LP: #742056
+  * ext3: Always set dx_node's fake_dirent explicitly.
+    - LP: #742056
+  * call_function_many: fix list delete vs add race
+    - LP: #742056
+  * call_function_many: add missing ordering
+    - LP: #742056
+  * x86: Flush TLB if PGD entry is changed in i386 PAE mode
+    - LP: #742056
+  * isdn: avoid calling tty_ldisc_flush() in atomic context
+    - LP: #742056
+  * smp_call_function_many: handle concurrent clearing of mask
+    - LP: #742056
+  * fix per-cpu flag problem in the cpu affinity checkers
+    - LP: #742056
+  * i2c: Fix typo in instantiating-devices document
+    - LP: #742056
+  * mmc: sdio: remember new card RCA when redetecting card
+    - LP: #742056
+  * powerpc/kexec: Fix race in kexec shutdown
+    - LP: #742056
+  * powerpc/kdump: Fix race in kdump shutdown
+    - LP: #742056
+  * powerpc: rtas_flash needs to use rtas_data_buf
+    - LP: #742056
+  * x86, binutils, xen: Fix another wrong size directive
+    - LP: #742056
+  * hwmon: (sht15) Fix integer overflow in humidity calculation
+    - LP: #742056
+  * Linux 2.6.32.34
+    - LP: #742056
+  * Linux 2.6.32.35
+    - LP: #742056
+  * aio: wake all waiters when destroying ctx
+    - LP: #744921
+  * shmem: let shared anonymous be nonlinear again
+    - LP: #744921
+  * PCI hotplug: acpiphp: set current_state to D0 in register_slot
+    - LP: #744921
+  * xen: set max_pfn_mapped to the last pfn mapped
+    - LP: #744921
+  * PCI: return correct value when writing to the "reset" attribute
+    - LP: #744921
+  * Prevent rt_sigqueueinfo and rt_tgsigqueueinfo from spoofing the signal
+    code
+    - LP: #744921
+  * ext3: skip orphan cleanup on rocompat fs
+    - LP: #744921
+  * procfs: fix /proc/<pid>/maps heap check
+    - LP: #744921
+  * proc: protect mm start_code/end_code in /proc/pid/stat, CVE-2011-0726
+    - LP: #744921
+    - CVE-2011-0726
+  * fbcon: Bugfix soft cursor detection in Tile Blitting
+    - LP: #744921
+  * nfsd41: modify the members value of nfsd4_op_flags
+    - LP: #744921
+  * nfsd: wrong index used in inner loop
+    - LP: #744921
+  * uvcvideo: Fix uvc_fixup_video_ctrl() format search
+    - LP: #744921
+  * ehci-hcd: Bug fix: don't set a QH's Halt bit
+    - LP: #744921
+  * USB: uss720 fixup refcount position
+    - LP: #744921
+  * USB: cdc-acm: fix memory corruption / panic
+    - LP: #744921
+  * USB: cdc-acm: fix potential null-pointer dereference
+    - LP: #744921
+  * USB: cdc-acm: fix potential null-pointer dereference on disconnect
+    - LP: #744921
+  * Input: xen-kbdfront - advertise either absolute or relative coordinates
+    - LP: #744921
+  * SUNRPC: Never reuse the socket port after an xs_close()
+    - LP: #744921
+  * fs: call security_d_instantiate in d_obtain_alias V2
+    - LP: #744921
+  * dcdbas: force SMI to happen when expected
+    - LP: #744921
+  * Linux 2.6.32.36
+    - LP: #744921
+  * drm/radeon/kms: check AA resolve registers on r300, CVE-2011-1016
+    - LP: #745686
+    - CVE-2011-1016
+  * drm/radeon: fix regression with AA resolve checking, CVE-2011-1016
+    - LP: #745686
+    - CVE-2011-1016
+  * xen: events: do not unmask event channels on resume
+    - LP: #681083
+  * drm/radeon/kms: check AA resolve registers on r300
+    - LP: #754584
+  * drm/radeon: fix regression with AA resolve checking
+    - LP: #754584
+  * Linux 2.6.32.36+drm33.16
+    - LP: #754584
+  * ALSA: hda - Fix SPDIF out regression on ALC889
+    - LP: #764685
+  * ALSA: Fix yet another race in disconnection
+    - LP: #764685
+  * perf: Better fit max unprivileged mlock pages for tools needs
+    - LP: #764685
+  * myri10ge: fix rmmod crash
+    - LP: #764685
+  * cciss: fix lost command issue
+    - LP: #764685
+  * sound/oss/opl3: validate voice and channel indexes
+    - LP: #764685
+  * mac80211: initialize sta->last_rx in sta_info_alloc
+    - LP: #764685
+  * ses: show devices for enclosures with no page 7
+    - LP: #764685
+  * ses: Avoid kernel panic when lun 0 is not mapped
+    - LP: #764685
+  * eCryptfs: Unlock page in write_begin error path
+    - LP: #764685
+  * eCryptfs: ecryptfs_keyring_auth_tok_for_sig() bug fix
+    - LP: #764685
+  * staging: usbip: bugfixes related to kthread conversion
+    - LP: #764685
+  * staging: usbip: bugfix add number of packets for isochronous frames
+    - LP: #764685
+  * staging: usbip: bugfix for isochronous packets and optimization
+    - LP: #764685
+  * staging: hv: Fix GARP not sent after Quick Migration
+    - LP: #764685
+  * staging: hv: use sync_bitops when interacting with the hypervisor
+    - LP: #764685
+  * Relax si_code check in rt_sigqueueinfo and rt_tgsigqueueinfo
+    - LP: #764685
+  * xfs: prevent leaking uninitialized stack memory in FSGEOMETRY_V1
+    - LP: #764685
+  * irda: validate peer name and attribute lengths
+    - LP: #764685
+  * irda: prevent heap corruption on invalid nickname
+    - LP: #764685
+  * nilfs2: fix data loss in mmap page write for hole blocks
+    - LP: #764685
+  * ASoC: Explicitly say registerless widgets have no register
+    - LP: #764685
+  * ALSA: ens1371: fix Creative Ectiva support
+    - LP: #764685
+  * ROSE: prevent heap corruption with bad facilities
+    - LP: #764685
+  * Btrfs: Fix uninitialized root flags for subvolumes
+    - LP: #764685
+  * x86, mtrr, pat: Fix one cpu getting out of sync during resume
+    - LP: #764685
+  * ath9k: fix a chip wakeup related crash in ath9k_start
+    - LP: #764685
+  * UBIFS: do not read flash unnecessarily
+    - LP: #764685
+  * UBIFS: fix oops on error path in read_pnode
+    - LP: #764685
+  * UBIFS: fix debugging failure in dbg_check_space_info
+    - LP: #764685
+  * quota: Don't write quota info in dquot_commit()
+    - LP: #764685
+  * mm: avoid wrapping vm_pgoff in mremap()
+    - LP: #764685
+  * p54usb: IDs for two new devices
+    - LP: #764685
+  * b43: allocate receive buffers big enough for max frame len + offset
+    - LP: #764685
+  * Bluetooth: sco: fix information leak to userspace
+    - LP: #764685
+  * bridge: netfilter: fix information leak
+    - LP: #764685
+  * Bluetooth: bnep: fix buffer overflow
+    - LP: #764685
+  * Bluetooth: add support for Apple MacBook Pro 8,2
+    - LP: #764685
+  * Treat writes as new when holes span across page boundaries
+    - LP: #764685
+  * char/tpm: Fix unitialized usage of data buffer
+    - LP: #764685
+  * netfilter: ip_tables: fix infoleak to userspace
+    - LP: #764685
+  * netfilter: arp_tables: fix infoleak to userspace
+    - LP: #764685
+  * netfilter: ipt_CLUSTERIP: fix buffer overflow
+    - LP: #764685
+  * ipv6: netfilter: ip6_tables: fix infoleak to userspace
+    - LP: #764685
+  * mfd: ab3100: world-writable debugfs *_priv files
+    - LP: #764685
+  * drivers/rtc/rtc-ds1511.c: world-writable sysfs nvram file
+    - LP: #764685
+  * drivers/misc/ep93xx_pwm.c: world-writable sysfs files
+    - LP: #764685
+  * econet: 4 byte infoleak to the network
+    - LP: #764685
+  * sound/oss: remove offset from load_patch callbacks
+    - LP: #764685
+  * sound: oss: midi_synth: check get_user() return value
+    - LP: #764685
+  * repair gdbstub to match the gdbserial protocol specification
+    - LP: #764685
+  * gro: Reset dev pointer on reuse
+    - LP: #764685
+  * gro: reset skb_iif on reuse
+    - LP: #764685
+  * x86, amd-ucode: Remove needless log messages
+    - LP: #764685
+  * x86, microcode, AMD: Extend ucode size verification
+    - LP: #764685
+  * powerpc/kexec: Add ifdef CONFIG_PPC_STD_MMU_64 to PPC64 code
+    - LP: #764685
+  * powerpc: Fix default_machine_crash_shutdown #ifdef botch
+    - LP: #764685
+  * Squashfs: handle corruption of directory structure
+    - LP: #764685
+  * sctp: fix to calc the INIT/INIT-ACK chunk length correctly is set
+    - LP: #764685
+  * atm/solos-pci: Don't include frame pseudo-header on transmit hex-dump
+    - LP: #764685
+  * ext4: fix credits computing for indirect mapped files
+    - LP: #764685
+  * nfsd: fix auth_domain reference leak on nlm operations
+    - LP: #764685
+  * CAN: Use inode instead of kernel address for /proc file
+    - LP: #764685
+  * exec: make argv/envp memory visible to oom-killer
+    - LP: #764685
+  * exec: copy-and-paste the fixes into compat_do_execve() paths
+    - LP: #764685
+  * xfs: zero proper structure size for geometry calls
+    - LP: #764685
+  * Linux 2.6.32.37
+    - LP: #764685
+  * Linux 2.6.32.38
+    - LP: #764685
+
+ -- Brad Figg <brad.figg@canonical.com>  Wed, 20 Apr 2011 08:28:25 -0700
+
+linux (2.6.32-31.61) lucid-proposed; urgency=low
+
+  [ Brad Figg ]
+
+  * Release Tracking Bug
+    - LP: #754842
+
+  [ Upstream Kernel Changes ]
+
+  * x86, quirk: Fix SB600 revision check
+    - LP: #742056
+
+ -- Brad Figg <brad.figg@canonical.com>  Fri, 08 Apr 2011 10:08:30 -0700
+
+linux (2.6.32-31.60) lucid-proposed; urgency=low
+
+  [ Brad Figg ]
+
+  * Release Tracking Bug
+    - LP: #734950
+
+  [ Paolo Pisati ]
+
+  * SAUCE: Clear new_profile in error path
+    - LP: #732700
+
+  [ Tim Gardner ]
+
+  * [Config] CONFIG_BOOT_PRINTK_DELAY=y
+    - LP: #733191
+
+  [ Upstream Kernel Changes ]
+
+  * Revert "drm/radeon/bo: add some fallback placements for VRAM only
+    objects."
+    - LP: #652934
+  * drm/radeon: fall back to GTT if bo creation/validation in VRAM fails.
+    - LP: #652934
+  * drm/radeon/kms: Fix retrying ttm_bo_init() after it failed once.
+    - LP: #652934
+  * xfs: always use iget in bulkstat
+    - LP: #692848
+  * drm/radeon/kms: make the mac rv630 quirk generic
+    - LP: #728687
+  * drm/radeon/kms: add pll debugging output
+    - LP: #728687
+  * drm/radeon: remove 0x4243 pci id
+    - LP: #728687
+  * drm/radeon/kms: fix s/r issues with bios scratch regs
+    - LP: #728687
+  * drm/i915/lvds: Add AOpen i915GMm-HFS to the list of false-positive LVDS
+    - LP: #728687
+  * drm/i915: Add dependency on CONFIG_TMPFS
+    - LP: #728687
+  * Linux 2.6.32.29+drm33.14
+    - LP: #728687
+  * NFSD: memory corruption due to writing beyond the stat array
+    - LP: #728687
+  * mptfusion: mptctl_release is required in mptctl.c
+    - LP: #728687
+  * mptfusion: Fix Incorrect return value in mptscsih_dev_reset
+    - LP: #728687
+  * ocfs2_connection_find() returns pointer to bad structure
+    - LP: #728687
+  * x25: decrement netdev reference counts on unload
+    - LP: #728687
+  * x86, hpet: Disable per-cpu hpet timer if ARAT is supported
+    - LP: #728687
+  * OHCI: work around for nVidia shutdown problem
+    - LP: #728687
+  * x86/pvclock: Zero last_value on resume
+    - LP: #728687
+  * av7110: check for negative array offset
+    - LP: #728687
+  * CRED: Fix get_task_cred() and task_state() to not resurrect dead
+    credentials
+    - LP: #728687
+  * bonding/vlan: Avoid mangled NAs on slaves without VLAN tag insertion
+    - LP: #728687
+  * CRED: Fix kernel panic upon security_file_alloc() failure.
+    - LP: #728687
+  * CRED: Fix BUG() upon security_cred_alloc_blank() failure
+    - LP: #728687
+  * CRED: Fix memory and refcount leaks upon security_prepare_creds()
+    failure
+    - LP: #728687
+  * sendfile(): check f_op.splice_write() rather than f_op.sendpage()
+    - LP: #728687
+  * isdn: hisax: Replace the bogus access to irq stats
+    - LP: #728687
+  * ixgbe: add support for 82599 based Express Module X520-P2
+    - LP: #728687
+  * ixgbe: prevent speculative processing of descriptors before ready
+    - LP: #728687
+  * scsi_dh_alua: add netapp to dev list
+    - LP: #728687
+  * scsi_dh_alua: Add IBM Power Virtual SCSI ALUA device to dev list
+    - LP: #728687
+  * dm raid1: fail writes if errors are not handled and log fails
+    - LP: #728687
+  * GFS2: Fix bmap allocation corner-case bug
+    - LP: #728687
+  * dm raid1: fix null pointer dereference in suspend
+    - LP: #728687
+  * sunrpc/cache: fix module refcnt leak in a failure path
+    - LP: #728687
+  * be2net: Maintain tx and rx counters in driver
+    - LP: #728687
+  * tcp: Make TCP_MAXSEG minimum more correct.
+    - LP: #728687
+  * nfsd: correctly handle return value from nfsd_map_name_to_*
+    - LP: #728687
+  * s390: remove task_show_regs
+    - LP: #728687
+  * PM / Hibernate: Return error code when alloc_image_page() fails
+    - LP: #728687
+  * fs/partitions: Validate map_count in Mac partition tables
+    - LP: #728687
+  * ALSA: HDA: Add position_fix quirk for an Asus device
+    - LP: #718402, #728687
+  * ALSA: caiaq - Fix possible string-buffer overflow
+    - LP: #728687
+  * radio-aimslab.c needs #include <linux/delay.h>
+    - LP: #728687
+  * ARM: Ensure predictable endian state on signal handler entry
+    - LP: #728687
+  * acer-wmi: Fix capitalisation of GUID
+    - LP: #728687
+  * eCryptfs: Copy up lower inode attrs in getattr
+    - LP: #728687
+  * platform: x86: acer-wmi: world-writable sysfs threeg file
+    - LP: #728687
+  * platform: x86: asus_acpi: world-writable procfs files
+    - LP: #728687
+  * platform: x86: tc1100-wmi: world-writable sysfs wireless and jogdial
+    files
+    - LP: #728687
+  * genirq: Disable the SHIRQ_DEBUG call in request_threaded_irq for now
+    - LP: #728687
+  * usb: musb: omap2430: fix kernel panic on reboot
+    - LP: #728687
+  * USB: add quirks entry for Keytouch QWERTY Panel
+    - LP: #728687
+  * USB: Add Samsung SGH-I500/Android modem ID switch to visor driver
+    - LP: #728687
+  * USB: Add quirk for Samsung Android phone modem
+    - LP: #728687
+  * p54pci: update receive dma buffers before and after processing
+    - LP: #728687
+  * sierra: add new ID for Airprime/Sierra USB IP modem
+    - LP: #728687
+  * staging: usbip: vhci: update reference count for usb_device
+    - LP: #728687
+  * staging: usbip: vhci: give back URBs from in-flight unlink requests
+    - LP: #728687
+  * staging: usbip: vhci: refuse to enqueue for dead connections
+    - LP: #728687
+  * staging: usbip: vhci: use urb->dev->portnum to find port
+    - LP: #728687
+  * epoll: prevent creating circular epoll structures
+    - LP: #728687
+  * ldm: corrupted partition table can cause kernel oops
+    - LP: #728687
+  * md: correctly handle probe of an 'mdp' device.
+    - LP: #728687
+  * x86 quirk: Fix polarity for IRQ0 pin2 override on SB800 systems
+    - LP: #728687
+  * xhci: Avoid BUG() in interrupt context
+    - LP: #728687
+  * xhci: Clarify some expressions in the TRB math
+    - LP: #728687
+  * xhci: Fix errors in the running total calculations in the TRB math
+    - LP: #728687
+  * xhci: Fix an error in count_sg_trbs_needed()
+    - LP: #728687
+  * x25: Do not reference freed memory.
+    - LP: #728687
+  * Linux 2.6.32.30
+    - LP: #728687
+  * Linux 2.6.32.31
+    - LP: #728687
+  * Ocfs2/refcounttree: Fix a bug for refcounttree to writeback clusters in
+    a right number.
+    - LP: #731226
+  * mfd: Fix NULL pointer due to non-initialized ucb1x00-ts absinfo
+    - LP: #731226
+  * x86: Use u32 instead of long to set reset vector back to 0
+    - LP: #731226
+  * fuse: fix hang of single threaded fuseblk filesystem
+    - LP: #731226
+  * clockevents: Prevent oneshot mode when broadcast device is periodic
+    - LP: #731226
+  * ext2: Fix link count corruption under heavy link+rename load
+    - LP: #731226
+  * sctp: Fix oops when sending queued ASCONF chunks
+    - LP: #731226
+  * virtio: set pci bus master enable bit
+    - LP: #731226
+  * netxen: fix set mac addr
+    - LP: #731226
+  * HID: add support for Acan FG-8100 barcode reader
+    - LP: #731226
+  * p54usb: add Senao NUB-350 usbid
+    - LP: #731226
+  * dccp: fix oops on Reset after close
+    - LP: #731226
+  * e1000e: disable broken PHY wakeup for ICH10 LOMs, use MAC wakeup
+    instead
+    - LP: #731226
+  * r8169: disable ASPM
+    - LP: #731226
+  * usb: iowarrior: don't trust report_size for buffer size
+    - LP: #731226
+  * arp_notify: unconditionally send gratuitous ARP for
+    NETDEV_NOTIFY_PEERS.
+    - LP: #731226
+  * CIFS: Fix oplock break handling (try #2)
+    - LP: #731226
+  * Linux 2.6.32.32
+    - LP: #731226
+
+ -- Brad Figg <brad.figg@canonical.com>  Mon, 14 Mar 2011 07:24:45 -0700
+
+linux (2.6.32-30.59) lucid-proposed; urgency=low
+
+  [ Steve Conklin ]
+
+  * Release Tracking Bug
+    - LP: #727336
+
+  [ Tim Gardner ]
+
+  * [Config] CONFIG_IRQ_TIME_ACCOUNTING=n
+    - LP: #723819
+
+  [ Upstream Kernel Changes ]
+
+  * virtio_net: Add schedule check to napi_enable call
+    - LP: #579276
+  * NFS: fix the return value of nfs_file_fsync()
+    - LP: #585657
+  * block: check for proper length of iov entries earlier in
+    blk_rq_map_user_iov(), CVE-2010-4163
+    - LP: #721504
+    - CVE-2010-4163
+  * filter: make sure filters dont read uninitialized memory
+    - LP: #721282
+    - CVE-2010-4158
+  * tty: Make tiocgicount a handler, CVE-2010-4076, CVE-2010-4077
+    - LP: #720189
+    - CVE-2010-4077
+  * staging: usbip: remove double giveback of URB
+    - LP: #723819
+  * USB: EHCI: ASPM quirk of ISOC on AMD SB800
+    - LP: #723819
+  * rt2x00: add device id for windy31 usb device
+    - LP: #723819
+  * ALSA: snd-usb-us122l: Fix missing NULL checks
+    - LP: #723819
+  * hwmon: (via686a) Initialize fan_div values
+    - LP: #723819
+  * USB: serial: handle Data Carrier Detect changes
+    - LP: #723819
+  * USB: CP210x Add two device IDs
+    - LP: #723819
+  * USB: CP210x Removed incorrect device ID
+    - LP: #723819
+  * USB: usb-storage: unusual_devs update for Cypress ATACB
+    - LP: #723819
+  * USB: usb-storage: unusual_devs update for TrekStor DataStation maxi g.u
+    external hard drive enclosure
+    - LP: #723819
+  * USB: usb-storage: unusual_devs entry for CamSport Evo
+    - LP: #723819
+  * USB: usb-storage: unusual_devs entry for Coby MP3 player
+    - LP: #723819
+  * USB: serial: Updated support for ICOM devices
+    - LP: #723819
+  * USB: adding USB support for Cinterion's HC2x, EU3 and PH8 products
+    - LP: #723819
+  * USB: EHCI: ASPM quirk of ISOC on AMD Hudson
+    - LP: #723819
+  * USB: EHCI: fix DMA deallocation bug
+    - LP: #723819
+  * USB: g_printer: fix bug in module parameter definitions
+    - LP: #723819
+  * USB: io_edgeport: fix the reported firmware major and minor
+    - LP: #723819
+  * USB: ti_usb: fix module removal
+    - LP: #723819
+  * USB: Storage: Add unusual_devs entry for VTech Kidizoom
+    - LP: #723819
+  * USB: ftdi_sio: add ST Micro Connect Lite uart support
+    - LP: #723819
+  * USB: cdc-acm: Adding second ACM channel support for Nokia N8
+    - LP: #723819
+  * USB: ftdi_sio: Add VID=0x0647, PID=0x0100 for Acton Research
+    spectrograph
+    - LP: #723819
+  * USB: prevent buggy hubs from crashing the USB stack
+    - LP: #723819
+  * staging: comedi: add support for newer jr3 1-channel pci board
+    - LP: #723819
+  * staging: comedi: ni_labpc: Use shared IRQ for PCMCIA card
+    - LP: #723819
+  * Staging: hv: fix sysfs symlink on hv block device
+    - LP: #723819
+  * staging: hv: Enable sending GARP packet after live migration
+    - LP: #723819
+  * hvc_iucv: allocate memory buffers for IUCV in zone DMA
+    - LP: #723819
+  * iwlagn: enable only rfkill interrupt when device is down
+    - LP: #723819
+  * ath9k: Fix bug in delimiter padding computation
+    - LP: #723819
+  * correct vdso version string
+    - LP: #723819
+  * fix medium error problems with some arrays which can cause data
+    corruption
+    - LP: #723819
+  * libsas: fix runaway error handler problem
+    - LP: #723819
+  * mpt2sas: Fix device removal handshake for zoned devices
+    - LP: #723819
+  * mpt2sas: Correct resizing calculation for max_queue_depth
+    - LP: #723819
+  * mpt2sas: Kernel Panic during Large Topology discovery
+    - LP: #723819
+  * radio-aimslab.c: Fix gcc 4.5+ bug
+    - LP: #723819
+  * em28xx: Fix audio input for Terratec Grabby
+    - LP: #723819
+  * ALSA : au88x0 - Limit number of channels to fix Oops via OSS emu
+    - LP: #723819
+  * ALSA: HDA: Fix dmesg output of HDMI supported bits
+    - LP: #723819
+  * ALSA: hda - Fix memory leaks in conexant jack arrays
+    - LP: #723819
+  * input: bcm5974: Add support for MacBookAir3
+    - LP: #723819
+  * ALSA: hrtimer: handle delayed timer interrupts
+    - LP: #723819
+  * ASoC: WM8990: msleep() takes milliseconds not jiffies
+    - LP: #723819
+  * ASoC: Blackfin AC97: fix build error after multi-component update
+    - LP: #723819
+  * NFS: Fix "kernel BUG at fs/aio.c:554!"
+    - LP: #723819
+  * rtc-cmos: fix suspend/resume
+    - LP: #723819
+  * iwlagn: Re-enable RF_KILL interrupt when down
+    - LP: #723819
+  * rapidio: fix hang on RapidIO doorbell queue full condition
+    - LP: #723819
+  * PCI: pci-stub: ignore zero-length id parameters
+    - LP: #723819
+  * virtio: remove virtio-pci root device
+    - LP: #723819
+  * ds2760_battery: Fix calculation of time_to_empty_now
+    - LP: #723819
+  * p54: fix sequence no. accounting off-by-one error
+    - LP: #723819
+  * i2c: Unregister dummy devices last on adapter removal
+    - LP: #723819
+  * serial: unbreak billionton CF card
+    - LP: #723819
+  * ptrace: use safer wake up on ptrace_detach()
+    - LP: #723819
+  * x86, mtrr: Avoid MTRR reprogramming on BP during boot on UP platforms
+    - LP: #723819
+  * fix jiffy calculations in calibrate_delay_direct to handle overflow
+    - LP: #723819
+  * USB: serial: pl2303: Hybrid reader Uniform HCR331
+    - LP: #723819
+  * drivers: update to pl2303 usb-serial to support Motorola cables
+    - LP: #723819
+  * klist: Fix object alignment on 64-bit.
+    - LP: #723819
+  * powerpc: Fix some 6xx/7xxx CPU setup functions
+    - LP: #723819
+  * parisc : Remove broken line wrapping handling pdc_iodc_print()
+    - LP: #723819
+  * kernel/smp.c: fix smp_call_function_many() SMP race
+    - LP: #723819
+  * hostap_cs: fix sleeping function called from invalid context
+    - LP: #723819
+  * md: fix regression with re-adding devices to arrays with no metadata
+    - LP: #723819
+  * pata_mpc52xx: inherit from ata_bmdma_port_ops
+    - LP: #723819
+  * TPM: Long default timeout fix
+    - LP: #723819
+  * tpm_tis: Use timeouts returned from TPM
+    - LP: #723819
+  * SELinux: define permissions for DCB netlink messages
+    - LP: #723819
+  * SELinux: do not compute transition labels on mountpoint labeled
+    filesystems
+    - LP: #723819
+  * ieee80211: correct IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK macro
+    - LP: #723819
+  * dm: dont take i_mutex to change device size
+    - LP: #723819
+  * dm mpath: disable blk_abort_queue
+    - LP: #723819
+  * x86, mm: avoid possible bogus tlb entries by clearing prev mm_cpumask
+    after switching mm
+    - LP: #723819
+  * usb: Realloc xHCI structures after a hub is verified.
+    - LP: #723819
+  * sched: Remove USER_SCHED
+    - LP: #723819
+  * sched: Remove remaining USER_SCHED code
+    - LP: #723819
+  * sched: Move sched_avg_update() to update_cpu_load()
+    - LP: #723819
+  * sched: Increment cache_nice_tries only on periodic lb
+    - LP: #723819
+  * sched: Try not to migrate higher priority RT tasks
+    - LP: #723819
+  * sched: Give CPU bound RT tasks preference
+    - LP: #723819
+  * sched: suppress RCU lockdep splat in task_fork_fair
+    - LP: #723819
+  * sched: fix RCU lockdep splat from task_group()
+    - LP: #723819
+  * sched: Do not consider SCHED_IDLE tasks to be cache hot
+    - LP: #723819
+  * sched: Set group_imb only a task can be pulled from the busiest cpu
+    - LP: #723819
+  * sched: Force balancing on newidle balance if local group has capacity
+    - LP: #723819
+  * sched: Drop group_capacity to 1 only if local group has extra capacity
+    - LP: #723819
+  * sched: Fix softirq time accounting
+    - LP: #723819
+  * sched: Consolidate account_system_vtime extern declaration
+    - LP: #723819
+  * sched: Remove unused PF_ALIGNWARN flag
+    - LP: #723819
+  * sched: Add a PF flag for ksoftirqd identification
+    - LP: #723819
+  * sched: Add IRQ_TIME_ACCOUNTING, finer accounting of irq time
+    - LP: #723819
+  * x86: Add IRQ_TIME_ACCOUNTING
+    - LP: #723819
+  * sched: Do not account irq time to current task
+    - LP: #723819
+  * sched: Remove irq time from available CPU power
+    - LP: #723819
+  * sched: Call tick_check_idle before __irq_enter
+    - LP: #723819
+  * sched: Export account_system_vtime()
+    - LP: #723819
+  * sched, cgroup: Fixup broken cgroup movement
+    - LP: #723819
+  * sched: Use group weight, idle cpu metrics to fix imbalances during idle
+    - LP: #723819
+  * sched: Fix cross-sched-class wakeup preemption
+    - LP: #723819
+  * sched: Fix volanomark performance regression
+    - LP: #723819
+  * sched: Fix idle balancing
+    - LP: #723819
+  * sched: Fix wake_affine() vs RT tasks
+    - LP: #723819
+  * sched: Remove some dead code
+    - LP: #723819
+  * kernel/user.c: add lock release annotation on free_user()
+    - LP: #723819
+  * Linux 2.6.32.29
+    - LP: #723819
+  * rds: Integer overflow in RDS cmsg handling, CVE-2010-4175
+    - LP: #721455
+    - CVE-2010-4175
+
+ -- Steve Conklin <sconklin@canonical.com>  Tue, 01 Mar 2011 12:09:35 -0600
+
+linux (2.6.32-29.58) lucid-proposed; urgency=low
+
+  [ Brad Figg ]
+
+  * Release Tracking Bug
+    - LP: #716551
+
+  [ Upstream Kernel Changes ]
+
+  * net: fix rds_iovec page count overflow, CVE-2010-3865
+    - LP: #709153
+    - CVE-2010-3865
+  * net: ax25: fix information leak to userland, CVE-2010-3875
+    - LP: #710714
+    - CVE-2010-3875
+  * net: ax25: fix information leak to userland harder, CVE-2010-3875
+    - LP: #710714
+    - CVE-2010-3875
+  * net: packet: fix information leak to userland, CVE-2010-3876
+    - LP: #710714
+    - CVE-2010-3876
+  * net: tipc: fix information leak to userland, CVE-2010-3877
+    - LP: #711291
+    - CVE-2010-3877
+  * inet_diag: Make sure we actually run the same bytecode we audited,
+    CVE-2010-3880
+    - LP: #711865
+    - CVE-2010-3880
+
+ -- Brad Figg <brad.figg@canonical.com>  Thu, 10 Feb 2011 09:13:43 -0800
+
+linux (2.6.32-29.57) lucid-proposed; urgency=low
+
+  [ Steve Conklin ]
+
+  * Tracking Bug
+    - LP: #708864
+
+  [ Tim Gardner ]
+
+  * [Config] Set CONFIG_NR_CPUS=256 for amd64 server
+    - LP: #706058
+
+  [ Upstream Kernel Changes ]
+
+  * Input: i8042 - introduce 'notimeout' blacklist for Dell Vostro V13
+    - LP: #380126
+  * tun: avoid BUG, dump packet on GSO errors
+    - LP: #698883
+  * TTY: Fix error return from tty_ldisc_open()
+    - LP: #705045
+  * x86, hotplug: Use mwait to offline a processor, fix the legacy case
+    - LP: #705045
+  * fuse: verify ioctl retries
+    - LP: #705045
+  * fuse: fix ioctl when server is 32bit
+    - LP: #705045
+  * ALSA: hda: Use model=lg quirk for LG P1 Express to enable playback and
+    capture
+    - LP: #595482, #705045
+  * nohz: Fix printk_needs_cpu() return value on offline cpus
+    - LP: #705045
+  * nohz: Fix get_next_timer_interrupt() vs cpu hotplug
+    - LP: #705045
+  * nfsd: Fix possible BUG_ON firing in set_change_info
+    - LP: #705045
+  * NFS: Fix fcntl F_GETLK not reporting some conflicts
+    - LP: #705045
+  * sunrpc: prevent use-after-free on clearing XPT_BUSY
+    - LP: #705045
+  * hwmon: (adm1026) Allow 1 as a valid divider value
+    - LP: #705045
+  * hwmon: (adm1026) Fix setting fan_div
+    - LP: #705045
+  * amd64_edac: Fix interleaving check
+    - LP: #705045
+  * IB/uverbs: Handle large number of entries in poll CQ
+    - LP: #705045
+  * PM / Hibernate: Fix PM_POST_* notification with user-space suspend
+    - LP: #705045
+  * ACPICA: Fix Scope() op in module level code
+    - LP: #705045
+  * ACPI: EC: Add another dmi match entry for MSI hardware
+    - LP: #705045
+  * orinoco: fix TKIP countermeasure behaviour
+    - LP: #705045
+  * orinoco: clear countermeasure setting on commit
+    - LP: #705045
+  * x86, amd: Fix panic on AMD CPU family 0x15
+    - LP: #705045
+  * md: fix bug with re-adding of partially recovered device.
+    - LP: #705045
+  * tracing: Fix panic when lseek() called on "trace" opened for writing
+    - LP: #705045
+  * x86, gcc-4.6: Use gcc -m options when building vdso
+    - LP: #705045
+  * x86: Enable the intr-remap fault handling after local APIC setup
+    - LP: #705045
+  * x86, vt-d: Handle previous faults after enabling fault handling
+    - LP: #705045
+  * x86, vt-d: Fix the vt-d fault handling irq migration in the x2apic mode
+    - LP: #705045
+  * x86, vt-d: Quirk for masking vtd spec errors to platform error handling
+    logic
+    - LP: #705045
+  * hvc_console: Fix race between hvc_close and hvc_remove
+    - LP: #705045
+  * hvc_console: Fix race between hvc_close and hvc_remove, again
+    - LP: #705045
+  * HID: hidraw: fix window in hidraw_release
+    - LP: #705045
+  * bfa: fix system crash when reading sysfs fc_host statistics
+    - LP: #705045
+  * net: release dst entry while cache-hot for GSO case too
+    - LP: #705045
+  * install_special_mapping skips security_file_mmap check.
+    - LP: #705045
+  * USB: misc: uss720.c: add another vendor/product ID
+    - LP: #705045
+  * USB: ftdi_sio: Add D.O.Tec PID
+    - LP: #705045
+  * USB: usb-storage: unusual_devs entry for the Samsung YP-CP3
+    - LP: #705045
+  * p54usb: add 5 more USBIDs
+    - LP: #705045
+  * p54usb: New USB ID for Gemtek WUBI-100GW
+    - LP: #705045
+  * sound: Prevent buffer overflow in OSS load_mixer_volumes
+    - LP: #705045
+  * mv_xor: fix race in tasklet function
+    - LP: #705045
+  * ima: fix add LSM rule bug
+    - LP: #705045
+  * ALSA: hda: Use LPIB for Dell Latitude 131L
+    - LP: #530346, #705045
+  * ALSA: hda: Use LPIB quirk for Dell Inspiron m101z/1120
+    - LP: #705045
+  * block: Deprecate QUEUE_FLAG_CLUSTER and use queue_limits instead
+    - LP: #705045
+  * sctp: Fix a race between ICMP protocol unreachable and connect()
+    - LP: #705045
+  * posix-cpu-timers: workaround to suppress the problems with mt exec
+    - LP: #705045
+  * Linux 2.6.32.28
+    - LP: #705045
+  * dell-laptop: Add another Dell laptop family to the DMI whitelist
+    - LP: #693078
+  * dell-laptop: Add another Dell laptop family to the DMI whitelist
+    - LP: #693078
+  * drm/ttm: Clear the ghost cpu_writers flag on
+    ttm_buffer_object_transfer.
+    - LP: #708769
+  * drm/kms: remove spaces from connector names (v2)
+    - LP: #708769
+  * Linux 2.6.32.28+drm33.13
+    - LP: #708769
+
+ -- Steve Conklin <sconklin@canonical.com>  Fri, 27 Jan 2011 14:56:42 -0600
+
+linux (2.6.32-28.56) lucid-proposed; urgency=low
+
+  [ Brad Figg ]
+
+  * Tracking Bug
+    - LP: #705565
+
+  * Just a build number increment for a new upload. There was an issue
+    in the previous upload that prevented ARMEL from building. The
+    issue has been resolved in the PPA and a new upload should produce
+    the requisite images.
+
+ -- Brad Figg <brad.figg@canonical.com>  Thu, 20 Jan 2011 10:29:06 -0800
+
+linux (2.6.32-28.55) lucid-proposed; urgency=low
+
+  * Another version bump because of abi check failure
+  * Tracking Bug
+    - LP: #699885
+
+ -- Steve Conklin <sconklin@canonical.com>  Mon, 10 Jan 2011 14:51:10 -0600
+
+linux (2.6.32-28.54) lucid-proposed; urgency=low
+
+  * Another version bump because of upload failure
+
+ -- Steve Conklin <sconklin@canonical.com>  Mon, 10 Jan 2011 10:31:00 -0600
+
+linux (2.6.32-28.53) lucid-proposed; urgency=low
+
+  * Another version bump because of upload failure
+
+ -- Steve Conklin <sconklin@canonical.com>  Thu, 06 Jan 2011 21:08:00 -0600
+
+linux (2.6.32-28.52) lucid-proposed; urgency=low
+
+  [ Steve Conklin ]
+
+  * (removed old tracking bug link)
+
+ -- Steve Conklin <sconklin@canonical.com>  Thu, 06 Jan 2011 15:37:00 -0600
+
+linux (2.6.32-28.51) lucid-proposed; urgency=low
+
+  [ Steve Conklin ]
+
+  * bumped version due to build fail
+
+ -- Steve Conklin <sconklin@canonical.com>  Wed, 05 Jan 2011 21:01:00 -0600
+
+linux (2.6.32-28.50) lucid-proposed; urgency=low
+
+  [ Tim Gardner ]
+
+  * SAUCE: Change nodelayacct boot parameter polarity.
+    - LP: #493156
+  * [Config] CONFIG_TASK_DELAY_ACCT=y
+    - LP: #493156
+
+  [ Upstream Kernel Changes ]
+
+  * ipc: initialize structure memory to zero for compat functions
+  * tcp: Increase TCP_MAXSEG socket option minimum.
+    - CVE-2010-4165
+  * perf_events: Fix perf_counter_mmap() hook in mprotect()
+    - CVE-2010-4169
+  * af_unix: limit unix_tot_inflight
+    - CVE-2010-4249
+  * AppArmor: fix the upper bound check for the next/check table
+    - LP: #581525
+  * NFS: Fix panic after nfs_umount()
+    - LP: #683938
+  * block: Ensure physical block size is unsigned int
+    - LP: #688669
+  * block: limit vec count in bio_kmalloc() and bio_alloc_map_data()
+    - LP: #688669
+  * block: take care not to overflow when calculating total iov length
+    - LP: #688669
+  * block: check for proper length of iov entries in blk_rq_map_user_iov()
+    - LP: #688669
+  * jme: Fix PHY power-off error
+    - LP: #688669
+  * irda: Fix parameter extraction stack overflow
+    - LP: #688669
+  * irda: Fix heap memory corruption in iriap.c
+    - LP: #688669
+  * i2c-pca-platform: Change device name of request_irq
+    - LP: #688669
+  * microblaze: Fix build with make 3.82
+    - LP: #688669
+  * Staging: asus_oled: fix up some sysfs attribute permissions
+    - LP: #688669
+  * Staging: asus_oled: fix up my fixup for some sysfs attribute
+    permissions
+    - LP: #688669
+  * Staging: line6: fix up some sysfs attribute permissions
+    - LP: #688669
+  * hpet: fix unwanted interrupt due to stale irq status bit
+    - LP: #688669
+  * hpet: unmap unused I/O space
+    - LP: #688669
+  * olpc_battery: Fix endian neutral breakage for s16 values
+    - LP: #688669
+  * percpu: fix list_head init bug in __percpu_counter_init()
+    - LP: #688669
+  * um: remove PAGE_SIZE alignment in linker script causing kernel
+    segfault.
+    - LP: #688669
+  * um: fix global timer issue when using CONFIG_NO_HZ
+    - LP: #688669
+  * numa: fix slab_node(MPOL_BIND)
+    - LP: #688669
+  * hwmon: (lm85) Fix ADT7468 frequency table
+    - LP: #688669
+  * mm: fix return value of scan_lru_pages in memory unplug
+    - LP: #688669
+  * mm: fix is_mem_section_removable() page_order BUG_ON check
+    - LP: #688669
+  * ssb: b43-pci-bridge: Add new vendor for BCM4318
+    - LP: #688669
+  * sgi-xpc: XPC fails to discover partitions with all nasids above 128
+    - LP: #688669
+  * xen: ensure that all event channels start off bound to VCPU 0
+    - LP: #688669
+  * xen: don't bother to stop other cpus on shutdown/reboot
+    - LP: #688669
+  * sys_semctl: fix kernel stack leakage
+    - LP: #688669
+  * net: NETIF_F_HW_CSUM does not imply FCoE CRC offload
+    - LP: #688669
+  * drivers/char/vt_ioctl.c: fix VT_OPENQRY error value
+    - LP: #688669
+  * viafb: use proper register for colour when doing fill ops
+    - LP: #688669
+  * eCryptfs: Clear LOOKUP_OPEN flag when creating lower file
+    - LP: #688669
+  * md/raid1: really fix recovery looping when single good device fails.
+    - LP: #688669
+  * md: fix return value of rdev_size_change()
+    - LP: #688669
+  * x86: AMD Northbridge: Verify NB's node is online
+    - LP: #688669
+  * tty: prevent DOS in the flush_to_ldisc
+    - LP: #688669
+  * TTY: restore tty_ldisc_wait_idle
+    - LP: #688669
+  * tty_ldisc: Fix BUG() on hangup
+    - LP: #688669
+  * TTY: ldisc, fix open flag handling
+    - LP: #688669
+  * KVM: VMX: fix vmx null pointer dereference on debug register access
+    - LP: #688669
+    - CVE-2010-0435
+  * KVM: x86: fix information leak to userland
+    - LP: #688669
+  * firewire: cdev: fix information leak
+    - LP: #688669
+  * firewire: core: fix an information leak
+    - LP: #688669
+  * firewire: ohci: fix buffer overflow in AR split packet handling
+    - LP: #688669
+  * firewire: ohci: fix race in AR split packet handling
+    - LP: #688669
+  * ALSA: ac97: Apply quirk for Dell Latitude D610 binding Master and
+    Headphone controls
+    - LP: #669279, #688669
+  * ALSA: HDA: Add an extra DAC for Realtek ALC887-VD
+    - LP: #688669
+  * ALSA: hda: Use "alienware" model quirk for another SSID
+    - LP: #683695, #688669
+  * netfilter: nf_conntrack: allow nf_ct_alloc_hashtable() to get highmem
+    pages
+    - LP: #688669
+  * latencytop: fix per task accumulator
+    - LP: #688669
+  * mm/vfs: revalidate page->mapping in do_generic_file_read()
+    - LP: #688669
+  * bio: take care not overflow page count when mapping/copying user data
+    - LP: #688669
+  * libata-scsi passthru: fix bug which truncated LBA48 return values
+    - LP: #688669
+  * libata: fix NULL sdev dereference race in atapi_qc_complete()
+    - LP: #688669
+  * PCI: fix size checks for mmap() on /proc/bus/pci files
+    - LP: #688669
+  * PCI: fix offset check for sysfs mmapped files
+    - LP: #688669
+  * efifb: check that the base address is plausible on pci systems
+    - LP: #688669
+  * USB: gadget: AT91: fix typo in atmel_usba_udc driver
+    - LP: #688669
+  * USB: ftdi_sio: add device IDs for Milkymist One JTAG/serial
+    - LP: #688669
+  * USB: option: fix when the driver is loaded incorrectly for some Huawei
+    devices.
+    - LP: #688669
+  * usb: misc: sisusbvga: fix information leak to userland
+    - LP: #688669
+  * usb: misc: iowarrior: fix information leak to userland
+    - LP: #688669
+  * usb: core: fix information leak to userland
+    - LP: #688669
+  * USB: EHCI: fix obscure race in ehci_endpoint_disable
+    - LP: #688669
+  * USB: storage: sierra_ms: fix sysfs file attribute
+    - LP: #688669
+  * USB: atm: ueagle-atm: fix up some permissions on the sysfs files
+    - LP: #688669
+  * USB: misc: cypress_cy7c63: fix up some sysfs attribute permissions
+    - LP: #688669
+  * USB: misc: usbled: fix up some sysfs attribute permissions
+    - LP: #688669
+  * USB: ftdi_sio: revert "USB: ftdi_sio: fix DTR/RTS line modes"
+    - LP: #688669
+  * USB: misc: trancevibrator: fix up a sysfs attribute permission
+    - LP: #688669
+  * USB: misc: usbsevseg: fix up some sysfs attribute permissions
+    - LP: #688669
+  * USB: ftdi_sio: Add ID for RT Systems USB-29B radio cable
+    - LP: #688669
+  * USB: serial: ftdi_sio: Vardaan USB RS422/485 converter PID added
+    - LP: #688669
+  * acpi-cpufreq: fix a memleak when unloading driver
+    - LP: #688669
+  * ACPI: EC: add Vista incompatibility DMI entry for Toshiba Satellite
+    L355
+    - LP: #688669
+  * fuse: fix attributes after open(O_TRUNC)
+    - LP: #688669
+  * do_exit(): make sure that we run with get_fs() == USER_DS
+    - LP: #688669
+  * uml: disable winch irq before freeing handler data
+    - LP: #688669
+  * backlight: grab ops_lock before testing bd->ops
+    - LP: #688669
+  * nommu: yield CPU while disposing VM
+    - LP: #688669
+  * DECnet: don't leak uninitialized stack byte
+    - LP: #688669
+  * ARM: 6489/1: thumb2: fix incorrect optimisation in usracc
+    - LP: #688669
+  * ARM: 6482/2: Fix find_next_zero_bit and related assembly
+    - LP: #688669
+  * Staging: frontier: fix up some sysfs attribute permissions
+    - LP: #688669
+  * staging: rtl8187se: Change panic to warn when RF switch turned off
+    - LP: #688669
+  * HID: hidraw, fix a NULL pointer dereference in hidraw_ioctl
+    - LP: #688669
+  * HID: hidraw, fix a NULL pointer dereference in hidraw_write
+    - LP: #688669
+  * gianfar: Fix crashes on RX path (Was Re: [Bugme-new] [Bug 19692] New:
+    linux-2.6.36-rc5 crash with gianfar ethernet at full line rate traffic)
+    - LP: #688669
+  * Limit sysctl_tcp_mem and sysctl_udp_mem initializers to prevent integer
+    overflows.
+    - LP: #688669
+  * sparc64: Fix race in signal instruction flushing.
+    - LP: #688669
+  * sparc: Don't mask signal when we can't setup signal frame.
+    - LP: #688669
+  * sparc: Prevent no-handler signal syscall restart recursion.
+    - LP: #688669
+  * x86, UV: Delete unneeded boot messages
+    - LP: #688669
+  * x86, UV: Fix initialization of max_pnode
+    - LP: #688669
+  * drivers/video/efifb.c: support framebuffer for NVIDIA 9400M in MacBook
+    Pro 5,1
+    - LP: #688669
+  * efifb: support the EFI framebuffer on more Apple hardware
+    - LP: #688669
+  * V4L/DVB (13154): uvcvideo: Handle garbage at the end of streaming
+    interface descriptors
+    - LP: #688669
+  * Input: i8042 - add Sony VAIO VPCZ122GX to nomux list
+    - LP: #688669
+  * x25: Patch to fix bug 15678 - x25 accesses fields beyond end of packet.
+    - LP: #688669
+  * memory corruption in X.25 facilities parsing
+    - LP: #688669
+  * can-bcm: fix minor heap overflow
+    - LP: #688669
+  * V4L/DVB: ivtvfb: prevent reading uninitialized stack memory
+    - LP: #688669
+  * x25: Prevent crashing when parsing bad X.25 facilities
+    - LP: #688669
+  * crypto: padlock - Fix AES-CBC handling on odd-block-sized input
+    - LP: #688669
+  * x86-32: Separate 1:1 pagetables from swapper_pg_dir
+    - LP: #688669
+  * x86, mm: Fix CONFIG_VMSPLIT_1G and 2G_OPT trampoline
+    - LP: #688669
+  * x86-32: Fix dummy trampoline-related inline stubs
+    - LP: #688669
+  * rds: Integer overflow in RDS cmsg handling
+    - LP: #688669
+  * net: Truncate recvfrom and sendto length to INT_MAX.
+    - LP: #688669
+  * net: Limit socket I/O iovec total length to INT_MAX.
+    - LP: #688669
+  * nmi: fix clock comparator revalidation
+    - LP: #688669
+  * UV - XPC: pass nasid instead of nid to gru_create_message_queue
+    - LP: #688669
+  * x86: uv: XPC receive message reuse triggers invalid BUG_ON()
+    - LP: #688669
+  * X86: uv: xpc_make_first_contact hang due to not accepting ACTIVE state
+    - LP: #688669
+  * x86: uv: xpc NULL deref when mesq becomes empty
+    - LP: #688669
+  * Linux 2.6.32.27
+    - LP: #688669
+
+ -- Steve Conklin <sconklin@canonical.com>  Wed, 05 Jan 2011 13:42:00 -0600
+
+linux (2.6.32-27.49) lucid-proposed; urgency=low
+
+  [ Leann Ogasawara ]
+
+  - LP: #683425
+  * Revert "SAUCE: AF_ECONET prevent kernel stack overflow"
+  * Revert "SAUCE: AF_ECONET SIOCSIFADDR ioctl does not check privileges"
+  * Revert "SAUCE: AF_ECONET saddr->cookie prevent NULL pointer
+    dereference"
+
+  [ Tim Gardner ]
+
+  * [Config] Added be2net, be2scsi to udebs
+    - LP: #628776
+  * [Config] Use correct be2iscsi module name in d-i/modules/scsi-modules
+    - LP: #628776
+
+  [ Upstream Kernel Changes ]
+
+  * Revert "(pre-stable) ACPI: enable repeated PCIEXP wakeup by clearing
+    PCIEXP_WAKE_STS on resume"
+  * Revert "mm: (pre-stable) Move vma_stack_continue into mm.h"
+  * x86, cpu: After uncapping CPUID, re-run CPU feature detection
+    - LP: #668380
+  * ALSA: sound/pci/rme9652: prevent reading uninitialized stack memory
+    - LP: #668380
+  * ALSA: oxygen: fix analog capture on Claro halo cards
+    - LP: #668380
+  * ALSA: hda - Add Dell Latitude E6400 model quirk
+    - LP: #643891, #668380
+  * ALSA: rawmidi: fix oops (use after free) when unloading a driver module
+    - LP: #668380
+  * USB: fix bug in initialization of interface minor numbers
+    - LP: #668380
+  * usb: musb: gadget: fix kernel panic if using out ep with FIFO_TXRX
+    style
+    - LP: #668380
+  * usb: musb: gadget: restart request on clearing endpoint halt
+    - LP: #668380
+  * oprofile: Add Support for Intel CPU Family 6 / Model 29
+    - LP: #668380
+  * RDMA/cxgb3: Turn off RX coalescing for iWARP connections
+    - LP: #668380
+  * mmc: sdhci-s3c: fix NULL ptr access in sdhci_s3c_remove
+    - LP: #668380
+  * x86/amd-iommu: Set iommu configuration flags in enable-loop
+    - LP: #668380
+  * x86/amd-iommu: Fix rounding-bug in __unmap_single
+    - LP: #668380
+  * x86/amd-iommu: Work around S3 BIOS bug
+    - LP: #668380
+  * tracing/x86: Don't use mcount in pvclock.c
+    - LP: #668380
+  * tracing/x86: Don't use mcount in kvmclock.c
+    - LP: #668380
+  * v4l1: fix 32-bit compat microcode loading translation
+    - LP: #668380
+  * V4L/DVB: cx231xx: Avoid an OOPS when card is unknown (card=0)
+    - LP: #668380
+  * V4L/DVB (13966): DVB-T regression fix for saa7134 cards
+    - LP: #668380
+  * Input: joydev - fix JSIOCSAXMAP ioctl
+    - LP: #668380
+  * x86, hpet: Fix bogus error check in hpet_assign_irq()
+    - LP: #668380
+  * x86, irq: Plug memory leak in sparse irq
+    - LP: #668380
+  * ubd: fix incorrect sector handling during request restart
+    - LP: #668380
+  * ring-buffer: Fix typo of time extends per page
+    - LP: #668380
+  * dmaengine: fix interrupt clearing for mv_xor
+    - LP: #668380
+  * hrtimer: Preserve timer state in remove_hrtimer()
+    - LP: #668380
+  * i2c-pca: Fix waitforcompletion() return value
+    - LP: #668380
+  * wext: fix potential private ioctl memory content leak
+    - LP: #668380
+  * atl1: fix resume
+    - LP: #668380
+  * x86, AMD, MCE thresholding: Fix the MCi_MISCj iteration order
+    - LP: #668380
+  * De-pessimize rds_page_copy_user
+    - LP: #668380
+  * xfrm4: strip ECN and IP Precedence bits in policy lookup
+    - LP: #668380
+  * tcp: Fix >4GB writes on 64-bit.
+    - LP: #668380
+  * net: Fix the condition passed to sk_wait_event()
+    - LP: #668380
+  * Phonet: Correct header retrieval after pskb_may_pull
+    - LP: #668380
+  * net: Fix IPv6 PMTU disc. w/ asymmetric routes
+    - LP: #668380
+  * ip: fix truesize mismatch in ip fragmentation
+    - LP: #668380
+  * net: clear heap allocations for privileged ethtool actions
+    - LP: #668380
+  * tcp: Fix race in tcp_poll
+    - LP: #668380
+  * netxen: dont set skb->truesize
+    - LP: #668380
+  * net: blackhole route should always be recalculated
+    - LP: #668380
+  * skge: add quirk to limit DMA
+    - LP: #668380
+  * r8169: allocate with GFP_KERNEL flag when able to sleep
+    - LP: #668380
+  * bsg: fix incorrect device_status value
+    - LP: #668380
+  * r6040: fix r6040_multicast_list
+    - LP: #668380
+  * r6040: Fix multicast list iteration when hash filter is used
+    - LP: #668380
+  * powerpc: Initialise paca->kstack before early_setup_secondary
+    - LP: #668380
+  * powerpc: Don't use kernel stack with translation off
+    - LP: #668380
+  * b44: fix carrier detection on bind
+    - LP: #668380
+  * ACPI: enable repeated PCIEXP wakeup by clearing PCIEXP_WAKE_STS on
+    resume
+    - LP: #613381, #668380
+  * intel_idle: PCI quirk to prevent Lenovo Ideapad s10-3 boot hang
+    - LP: #668380
+  * ACPI: EC: add Vista incompatibility DMI entry for Toshiba Satellite
+    L355
+    - LP: #668380
+  * ACPI: delete ZEPTO idle=nomwait DMI quirk
+    - LP: #668380
+  * ACPI: Disable Windows Vista compatibility for Toshiba P305D
+    - LP: #668380
+  * x86: detect scattered cpuid features earlier
+    - LP: #668380
+  * fix 2.6.32.23 suspend regression caused by commit 6f6198a
+    - LP: #668380
+  * setup_arg_pages: diagnose excessive argument size
+    - LP: #668380
+  * execve: improve interactivity with large arguments
+    - LP: #668380
+  * execve: make responsive to SIGKILL with large arguments
+    - LP: #668380
+  * Phonet: disable network namespace support
+    - LP: #668380
+  * mm: Move vma_stack_continue into mm.h
+    - LP: #668380
+  * Linux 2.6.32.25
+    - LP: #668380
+  * xfs: validate untrusted inode numbers during lookup
+    - CVE-2010-2943
+  * xfs: rename XFS_IGET_BULKSTAT to XFS_IGET_UNTRUSTED
+    - CVE-2010-2943
+  * xfs: remove block number from inode lookup code
+    - CVE-2010-2943
+  * xfs: fix untrusted inode number lookup
+    - CVE-2010-2943
+  * drm/i915: Sanity check pread/pwrite
+    - CVE-2010-2962
+  * drm/i915: Rephrase pwrite bounds checking to avoid any potential
+    overflow
+    - CVE-2010-2962
+  * net: clear heap allocation for ETHTOOL_GRXCLSRLALL
+    - CVE-2010-3861
+  * ipc: shm: fix information leak to userland
+    - CVE-2010-4072
+  * staging: usbip: Notify usb core of port status changes
+    - LP: #681132
+  * staging: usbip: Process event flags without delay
+    - LP: #681132
+  * powerpc/perf: Fix sampling enable for PPC970
+    - LP: #681132
+  * pcmcia: synclink_cs: fix information leak to userland
+    - LP: #681132
+  * sched: Fix string comparison in /proc/sched_features
+    - LP: #681132
+  * bluetooth: Fix missing NULL check
+    - LP: #681132
+  * futex: Fix errors in nested key ref-counting
+    - LP: #681132
+  * mm, x86: Saving vmcore with non-lazy freeing of vmas
+    - LP: #681132
+  * x86, cpu: Fix renamed, not-yet-shipping AMD CPUID feature bit
+    - LP: #681132
+  * x86, kexec: Make sure to stop all CPUs before exiting the kernel
+    - LP: #681132
+  * x86, olpc: Don't retry EC commands forever
+    - LP: #681132
+  * x86, mtrr: Assume SYS_CFG[Tom2ForceMemTypeWB] exists on all future AMD
+    CPUs
+    - LP: #681132
+  * x86, intr-remap: Set redirection hint in the IRTE
+    - LP: #681132
+  * x86, kdump: Change copy_oldmem_page() to use cached addressing
+    - LP: #681132
+  * KVM: SVM: Fix wrong intercept masks on 32 bit
+    - LP: #681132
+  * KVM: MMU: fix direct sps access corrupted
+    - LP: #681132
+  * KVM: MMU: fix conflict access permissions in direct sp
+    - LP: #681132
+  * KVM: VMX: Fix host GDT.LIMIT corruption
+    - LP: #681132
+  * KVM: SVM: Adjust tsc_offset only if tsc_unstable
+    - LP: #681132
+  * KVM: x86: Fix SVM VMCB reset
+    - LP: #681132
+  * KVM: x86: Move TSC reset out of vmcb_init
+    - LP: #681132
+  * KVM: Fix fs/gs reload oops with invalid ldt
+    - LP: #681132
+  * KVM: Correct ordering of ldt reload wrt fs/gs reload
+  * KVM: VMX: Fix host userspace gsbase corruption
+  * pipe: fix failure to return error code on ->confirm()
+    - LP: #681132
+  * p54usb: fix off-by-one on !CONFIG_PM
+    - LP: #681132
+  * p54usb: add five more USBIDs
+    - LP: #681132
+  * drivers/net/wireless/p54/eeprom.c: Return -ENOMEM on memory allocation
+    failure
+    - LP: #681132
+  * USB: ftdi_sio: Add PID for accesio products
+    - LP: #681132
+  * USB: add PID for FTDI based OpenDCC hardware
+    - LP: #681132
+  * USB: ftdi_sio: new VID/PIDs for various Papouch devices
+    - LP: #681132
+  * USB: ftdi_sio: add device ids for ScienceScope
+    - LP: #681132
+  * usb: musb: blackfin: call gpio_free() on error path in
+    musb_platform_init()
+    - LP: #681132
+  * USB: option: Add more ZTE modem USB id's
+    - LP: #681132
+  * USB: cp210x: Add Renesas RX-Stick device ID
+    - LP: #681132
+  * USB: cp210x: Add WAGO 750-923 Service Cable device ID
+    - LP: #681132
+  * USB: atmel_usba_udc: force vbus_pin at -EINVAL when gpio_request
+    failled
+    - LP: #681132
+  * USB: disable endpoints after unbinding interfaces, not before
+    - LP: #681132
+  * USB: opticon: Fix long-standing bugs in opticon driver
+    - LP: #681132
+  * USB: accept some invalid ep0-maxpacket values
+    - LP: #681132
+  * sd name space exhaustion causes system hang
+    - LP: #681132
+  * libsas: fix NCQ mixing with non-NCQ
+    - LP: #681132
+  * gdth: integer overflow in ioctl
+    - LP: #681132
+  * Fix race when removing SCSI devices
+    - LP: #681132
+  * Fix regressions in scsi_internal_device_block
+    - LP: #681132
+  * sgi-xp: incoming XPC channel messages can come in after the channel's
+    partition structures have been torn down
+    - LP: #681132
+  * Linux 2.6.32.26
+    - LP: #681132
+  * drm/radeon: fix PCI ID 5657 to be an RV410
+    - LP: #683257
+  * Linux 2.6.32.26+drm33.12
+    - LP: #683257
+  * econet: disallow NULL remote addr for sendmsg(), fixes CVE-2010-3849
+    - CVE-2010-3849
+  * econet: fix CVE-2010-3850
+    - CVE-2010-3850
+  * econet: fix CVE-2010-3848
+    - CVE-2010-3848
+
+ -- Leann Ogasawara <leann.ogasawara@canonical.com>  Tue, 30 Nov 2010 11:20:00 -0800
+
+linux (2.6.32-26.48) lucid-security; urgency=low
+
+  [ Leann Ogasawara ]
+
+  * SAUCE: AF_ECONET prevent kernel stack overflow
+    - CVE-2010-3848
+  * SAUCE: AF_ECONET SIOCSIFADDR ioctl does not check privileges
+    - CVE-2010-3850
+  * SAUCE: AF_ECONET saddr->cookie prevent NULL pointer dereference
+    - CVE-2010-3849
+
+ -- Leann Ogasawara <leann.ogasawara@canonical.com>  Fri, 19 Nov 2010 16:10:05 -0800
+
+linux (2.6.32-26.47) lucid-proposed; urgency=low
+
+  [ Steve Conklin ]
+
+  * Revert "SAUCE: ALSA: HDA: Enable internal mic on Dell E6410 and Dell
+    E6510"
+  * Revert "[Config] Added be2net, be2scsi to udebs"
+
+  [ Upstream Kernel Changes ]
+
+  * Revert "(ore-stable) ALSA: hda - Apply ALC269 VAIO fix-up to all Sony
+    laptops with ALC269"
+  * Revert "(pre-stable) ALSA: HDA: Correctly apply position_fix quirks for
+    ATI and VIA controllers"
+  * Revert "ALSA: hda: Use LPIB for another mainboard"
+  * Revert "ALSA: hda: Use LPIB for ASUS M2V"
+  * Revert "ALSA: hda: Use LPIB for an ASUS device"
+  * Buglink Fixup for reverted unverified fixes
+
+ -- Steve Conklin <sconklin@canonical.com>  Mon, 15 Nov 2010 14:59:39 -0500
+
+linux (2.6.32-26.46) lucid-proposed; urgency=low
+
+  [ Brad Figg ]
+
+  * SAUCE: ALSA: HDA: Enable internal mic on Dell E6410 and Dell E6510
+    - See: #605047, #628961
+
+  [ Tim Gardner ]
+
+  * [Config] Added be2net, be2scsi to udebs
+    - See: #628776
+
+  [ Upstream Kernel Changes ]
+
+  * Revert "(pre-stable) drm/i915: add PANEL_UNLOCK_REGS definition"
+    - LP: #645444
+  * Revert "(pre-stable) drm/i915: make sure we shut off the panel in eDP
+    configs"
+    - LP: #645444
+  * Revert "(pre-stable) drm/i915: make sure eDP panel is turned on"
+    - LP: #645444
+  * Revert "(pre-stable) drm/radeon/kms: initialize set_surface_reg reg for
+    rs600 asic"
+    - LP: #645371
+  * Revert "drm/nouveau: Fix fbcon corruption with font width not divisible
+    by 8"
+    - LP: #663176
+  * mmc: fix all hangs related to mmc/sd card insert/removal during
+    suspend/resume
+    - LP: #477106
+  * mmc: build fix: mmc_pm_notify is only available with CONFIG_PM=y
+    - LP: #477106
+  * hwmon: (k8temp) Differentiate between AM2 and ASB1
+    - LP: #644694
+  * xen: handle events as edge-triggered
+    - LP: #644694
+  * xen: use percpu interrupts for IPIs and VIRQs
+    - LP: #644694
+  * ALSA: hda - Rename iMic to Int Mic on Lenovo NB0763
+    - LP: #605101, #644694
+  * sata_mv: fix broken DSM/TRIM support (v2)
+    - LP: #644694
+  * x86, tsc, sched: Recompute cyc2ns_offset's during resume from sleep
+    states
+    - LP: #644694
+  * PCI: MSI: Remove unsafe and unnecessary hardware access
+    - LP: #644694
+  * PCI: MSI: Restore read_msi_msg_desc(); add get_cached_msi_msg_desc()
+    - LP: #644694
+  * sched: kill migration thread in CPU_POST_DEAD instead of CPU_DEAD
+    - LP: #644694
+  * sched: revert stable c6fc81a sched: Fix a race between ttwu() and
+    migrate_task()
+    - LP: #644694
+  * staging: hv: Fix missing functions for net_device_ops
+    - LP: #644694
+  * staging: hv: Fixed bounce kmap problem by using correct index
+    - LP: #644694
+  * staging: hv: Fixed the value of the 64bit-hole inside ring buffer
+    - LP: #644694
+  * staging: hv: Increased storvsc ringbuffer and max_io_requests
+    - LP: #644694
+  * staging: hv: Fixed lockup problem with bounce_buffer scatter list
+    - LP: #644694
+  * fuse: flush background queue on connection close
+    - LP: #644694
+  * ath9k_hw: fix parsing of HT40 5 GHz CTLs
+    - LP: #644694
+  * ocfs2: Fix incorrect checksum validation error
+    - LP: #644694
+  * USB: ehci-ppc-of: problems in unwind
+    - LP: #644694
+  * USB: Fix kernel oops with g_ether and Windows
+    - LP: #644694
+  * USB: CP210x Add new device ID
+    - LP: #644694
+  * USB: cp210x: Add B&G H3000 link cable ID
+    - LP: #644694
+  * USB: ftdi_sio: Added custom PIDs for ChamSys products
+    - LP: #644694
+  * USB: serial: Extra device/vendor ID for mos7840 driver
+    - LP: #644694
+  * usb: serial: mos7840: Add USB ID to support the B&B Electronics
+    USOPTL4-2P.
+    - LP: #644694
+  * USB: mos7840: fix DMA buffers on stack and endianess bugs
+    - LP: #644694
+  * usb: serial: mos7840: Add USB IDs to support more B&B USB/RS485
+    converters.
+    - LP: #644694
+  * USB: Exposing second ACM channel as tty for Nokia S60 phones.
+    - LP: #644694
+  * USB: cdc-acm: add another device quirk
+    - LP: #644694
+  * USB: Expose vendor-specific ACM channel on Nokia 5230
+    - LP: #644694
+  * USB: cdc-acm: Adding second ACM channel support for various Nokia and
+    one Samsung phones
+    - LP: #644694
+  * USB: cdc-acm: Add pseudo modem without AT command capabilities
+    - LP: #644694
+  * USB: cdc-acm: Fixing crash when ACM probing interfaces with no endpoint
+    descriptors.
+    - LP: #644694
+  * ALSA: hda - Fix auto-parser of ALC269vb for HP pin NID 0x21
+    - LP: #644694
+  * ALSA: seq/oss - Fix double-free at error path of snd_seq_oss_open()
+    - LP: #644694
+  * sysfs: checking for NULL instead of ERR_PTR
+    - LP: #644694
+  * tun: Don't add sysfs attributes to devices without sysfs directories
+    - LP: #644694
+  * oprofile: fix crash when accessing freed task structs
+    - LP: #644694
+  * oprofile, x86: fix init_sysfs error handling
+    - LP: #644694
+  * oprofile, x86: fix init_sysfs() function stub
+    - LP: #644694
+  * HID: usbhid: initialize interface pointers early enough
+    - LP: #644694
+  * HID: fix suspend crash by moving initializations earlier
+    - LP: #644694
+  * libata: skip EH autopsy and recovery during suspend
+    - LP: #644694
+  * tracing: Fix a race in function profile
+    - LP: #644694
+  * tracing: Do not allow llseek to set_ftrace_filter
+    - LP: #644694
+  * tracing: t_start: reset FTRACE_ITER_HASH in case of seek/pread
+    - LP: #644694
+  * irda: off by one
+    - LP: #644694
+  * gcov: fix null-pointer dereference for certain module types
+    - LP: #644694
+  * tmio_mmc: don't clear unhandled pending interrupts
+    - LP: #644694
+  * mmc: fix the use of kunmap_atomic() in tmio_mmc.h
+    - LP: #644694
+  * bounce: call flush_dcache_page() after bounce_copy_vec()
+    - LP: #644694
+  * kernel/groups.c: fix integer overflow in groups_search
+    - LP: #644694
+  * binfmt_misc: fix binfmt_misc priority
+    - LP: #644694
+  * Input: i8042 - fix device removal on unload
+    - LP: #644694
+  * memory hotplug: fix next block calculation in is_removable
+    - LP: #644694
+  * perf: Initialize callchains roots's childen hits
+    - LP: #644694
+  * p54: fix tx feedback status flag check
+    - LP: #644694
+  * ath5k: check return value of ieee80211_get_tx_rate
+    - LP: #644694
+  * wireless extensions: fix kernel heap content leak
+    - LP: #644694
+  * x86, tsc: Fix a preemption leak in restore_sched_clock_state()
+    - LP: #644694
+  * sched: Protect task->cpus_allowed access in sched_getaffinity()
+    - LP: #644694
+  * sched: Protect sched_rr_get_param() access to task->sched_class
+    - LP: #644694
+  * sched: Consolidate select_task_rq() callers
+    - LP: #644694
+  * sched: Remove unused cpu_nr_migrations()
+    - LP: #644694
+  * sched: Remove rq->clock coupling from set_task_cpu()
+    - LP: #644694
+  * sched: Clean up ttwu() rq locking
+    - LP: #644694
+  * sched: Sanitize fork() handling
+    - LP: #644694
+  * sched: Remove forced2_migrations stats
+    - LP: #644694
+  * sched: Make wakeup side and atomic variants of completion API irq safe
+    - LP: #644694
+  * sched: Use rcu in sys_sched_getscheduler/sys_sched_getparam()
+    - LP: #644694
+  * sched: Use rcu in sched_get/set_affinity()
+    - LP: #644694
+  * sched: Use rcu in sched_get_rr_param()
+    - LP: #644694
+  * sched: Fix set_cpu_active() in cpu_down()
+    - LP: #644694
+  * sched: Use TASK_WAKING for fork wakups
+    - LP: #644694
+  * sched: Ensure set_task_cpu() is never called on blocked tasks
+    - LP: #644694
+  * sched: Make warning less noisy
+    - LP: #644694
+  * sched: Fix broken assertion
+    - LP: #644694
+  * sched: Fix sched_exec() balancing
+    - LP: #644694
+  * sched: Fix select_task_rq() vs hotplug issues
+    - LP: #644694
+  * sched: Add pre and post wakeup hooks
+    - LP: #644694
+  * sched: Remove the cfs_rq dependency from set_task_cpu()
+    - LP: #644694
+  * sched: Fix hotplug hang
+    - LP: #644694
+  * sched: Fix fork vs hotplug vs cpuset namespaces
+    - LP: #644694
+  * sched: Fix incorrect sanity check
+    - LP: #644694
+  * sched: Fix race between ttwu() and task_rq_lock()
+    - LP: #644694
+  * sched: Extend enqueue_task to allow head queueing
+    - LP: #644694
+  * sched: Implement head queueing for sched_rt
+    - LP: #644694
+  * sched: Queue a deboosted task to the head of the RT prio queue
+    - LP: #644694
+  * sched: set_cpus_allowed_ptr(): Don't use rq->migration_thread after
+    unlock
+    - LP: #644694
+  * sched: Kill the broken and deadlockable
+    cpuset_lock/cpuset_cpus_allowed_locked code
+    - LP: #644694
+  * sched: move_task_off_dead_cpu(): Take rq->lock around
+    select_fallback_rq()
+    - LP: #644694
+  * sched: move_task_off_dead_cpu(): Remove retry logic
+    - LP: #644694
+  * sched: sched_exec(): Remove the select_fallback_rq() logic
+    - LP: #644694
+  * sched: _cpu_down(): Don't play with current->cpus_allowed
+    - LP: #644694
+  * sched: Make select_fallback_rq() cpuset friendly
+    - LP: #644694
+  * sched: Fix TASK_WAKING vs fork deadlock
+    - LP: #644694
+  * sched: Optimize task_rq_lock()
+    - LP: #644694
+  * sched: Fix nr_uninterruptible count
+    - LP: #644694
+  * sched: Fix rq->clock synchronization when migrating tasks
+    - LP: #644694
+  * sched: Remove unnecessary RCU exclusion
+    - LP: #644694
+  * sched: apply RCU protection to wake_affine()
+    - LP: #644694
+  * sched: Cleanup select_task_rq_fair()
+    - LP: #644694
+  * sched: More generic WAKE_AFFINE vs select_idle_sibling()
+    - LP: #644694
+  * sched: Fix vmark regression on big machines
+    - LP: #644694
+  * sched: Fix select_idle_sibling()
+    - LP: #644694
+  * sched: Pre-compute cpumask_weight(sched_domain_span(sd))
+    - LP: #644694
+  * sched: Fix select_idle_sibling() logic in select_task_rq_fair()
+    - LP: #644694
+  * sched: cpuacct: Use bigger percpu counter batch values for stats
+    counters
+    - LP: #644694
+  * ALSA: hda - Handle missing NID 0x1b on ALC259 codec
+    - LP: #644694
+  * ALSA: hda - Handle pin NID 0x1a on ALC259/269
+    - LP: #644694
+  * arm: fix really nasty sigreturn bug
+    - LP: #644694
+  * hwmon: (f75375s) Shift control mode to the correct bit position
+    - LP: #644694
+  * hwmon: (f75375s) Do not overwrite values read from registers
+    - LP: #644694
+  * apm_power: Add missing break statement
+    - LP: #644694
+  * NFS: Fix a typo in nfs_sockaddr_match_ipaddr6
+    - LP: #644694
+  * SUNRPC: Fix race corrupting rpc upcall
+    - LP: #644694
+  * Linux 2.6.32.22
+    - LP: #644694
+  * drm/i915: don't access FW_BLC_SELF on 965G
+    - LP: #645444
+  * drm/i915: gen3 page flipping fixes
+    - LP: #645444
+  * drm/i915: don't queue flips during a flip pending event
+    - LP: #645444
+  * drm/i915: Hold the spinlock whilst resetting unpin_work along error
+    path
+    - LP: #645444
+  * drm/i915: handle shared framebuffers when flipping
+    - LP: #645444
+  * drm/i915: add PANEL_UNLOCK_REGS definition
+    - LP: #645444
+  * drm/i915: make sure eDP panel is turned on
+    - LP: #645444
+  * drm/i915: make sure we shut off the panel in eDP configs
+    - LP: #645444
+  * Linux 2.6.32.22+drm33.9
+    - LP: #645444
+  * drm/radeon/kms/igp: sideport is AMD only
+    - LP: #645371
+  * drm/radeon/kms: flush HDP cache on GART table updates.
+    - LP: #645371
+  * drm/radeon/kms/r7xx: add workaround for hw issue with HDP flush
+    - LP: #645371
+  * drm/i915: Check overlay stride errata for i830 and i845
+    - LP: #645371
+  * i915: fix ironlake edp panel setup (v4)
+    - LP: #645371
+  * drm/radeon/kms: add additional quirk for Acer rv620 laptop
+    - LP: #645371
+  * drm/i915: fixup pageflip ringbuffer commands for i8xx
+    - LP: #645371
+  * drm/i915: i8xx also doesn't like multiple oustanding pageflips
+    - LP: #645371
+  * drm/i915/edp: Flush the write before waiting for PLLs
+    - LP: #645371
+  * drm/radeon/kms: disable MSI on IGP chips
+    - LP: #645371
+  * drm/radeon/kms: don't enable MSIs on AGP boards
+    - LP: #645371
+  * drm/radeon/kms: fix typo in radeon_compute_pll_gain
+    - LP: #645371
+  * drm/radeon/kms/DCE3+: switch pads to ddc mode when going i2c
+    - LP: #645371
+  * drm/radeon/kms: fix sideport detection on newer rs880 boards
+    - LP: #645371
+  * drm/i915: Don't touch PORT_HOTPLUG_EN in intel_dp_detect()
+    - LP: #645371
+  * drm/i915: Kill dangerous pending-flip debugging
+    - LP: #645371
+  * drm/radeon/kms: release AGP bridge at suspend
+    - LP: #645371
+  * drm/radeon/kms: initialize set_surface_reg reg for rs600 asic
+    - LP: #645371
+  * drm/radeon/kms: fix a regression on r7xx AGP due to the HDP flush fix
+    - LP: #645371
+  * Linux 2.6.32.22+drm33.10
+    - LP: #645371
+  * USB: serial/mos*: prevent reading uninitialized stack memory
+    - LP: #649483
+  * sparc: Provide io{read,write}{16,32}be().
+    - LP: #649483
+  * gro: fix different skb headrooms
+    - LP: #649483
+  * gro: Re-fix different skb headrooms
+    - LP: #649483
+  * irda: Correctly clean up self->ias_obj on irda_bind() failure.
+    - LP: #649483
+  * tcp: select(writefds) don't hang up when a peer close connection
+    - LP: #649483
+  * tcp: Combat per-cpu skew in orphan tests.
+    - LP: #649483
+  * tcp: fix three tcp sysctls tuning
+    - LP: #649483
+  * bridge: Clear IPCB before possible entry into IP stack
+    - LP: #649483
+  * bridge: Clear INET control block of SKBs passed into ip_fragment().
+    - LP: #649483
+  * net: Fix oops from tcp_collapse() when using splice()
+    - LP: #649483
+  * rds: fix a leak of kernel memory
+    - LP: #649483
+  * tcp: Prevent overzealous packetization by SWS logic.
+    - LP: #649483
+  * UNIX: Do not loop forever at unix_autobind().
+    - LP: #649483
+  * r8169: fix random mdio_write failures
+    - LP: #649483
+  * r8169: fix mdio_read and update mdio_write according to hw specs
+    - LP: #649483
+  * sparc64: Get rid of indirect p1275 PROM call buffer.
+    - LP: #649483
+  * drivers/net/usb/hso.c: prevent reading uninitialized memory
+    - LP: #649483
+  * drivers/net/cxgb3/cxgb3_main.c: prevent reading uninitialized stack
+    memory
+    - LP: #649483
+  * drivers/net/eql.c: prevent reading uninitialized stack memory
+    - LP: #649483
+  * bonding: correctly process non-linear skbs
+    - LP: #649483
+  * Staging: vt6655: fix buffer overflow
+    - LP: #649483
+  * net/llc: make opt unsigned in llc_ui_setsockopt()
+    - LP: #649483
+  * pid: make setpgid() system call use RCU read-side critical section
+    - LP: #649483
+  * sched: Fix user time incorrectly accounted as system time on 32-bit
+    - LP: #649483
+  * oprofile: Add Support for Intel CPU Family 6 / Model 22 (Intel Celeron
+    540)
+    - LP: #649483
+  * char: Mark /dev/zero and /dev/kmem as not capable of writeback
+    - LP: #649483
+  * drivers/pci/intel-iommu.c: fix build with older gcc's
+    - LP: #649483
+  * drivers/video/sis/sis_main.c: prevent reading uninitialized stack
+    memory
+    - LP: #649483
+  * percpu: fix pcpu_last_unit_cpu
+    - LP: #649483
+  * aio: check for multiplication overflow in do_io_submit
+    - LP: #649483
+  * inotify: send IN_UNMOUNT events
+    - LP: #649483
+  * SCSI: mptsas: fix hangs caused by ATA pass-through
+    - LP: #649483
+  * ext4: Fix remaining racy updates of EXT4_I(inode)->i_flags
+    - LP: #649483
+  * IA64: fix siglock
+    - LP: #649483
+  * IA64: Optimize ticket spinlocks in fsys_rt_sigprocmask
+    - LP: #649483
+  * KEYS: Fix RCU no-lock warning in keyctl_session_to_parent()
+    - LP: #649483
+  * KEYS: Fix bug in keyctl_session_to_parent() if parent has no session
+    keyring
+    - LP: #649483
+  * xfs: prevent reading uninitialized stack memory
+    - LP: #649483
+  * drivers/video/via/ioctl.c: prevent reading uninitialized stack memory
+    - LP: #649483
+  * ACPI: disable _OSI(Windows 2009) on Asus K50IJ
+    - LP: #649483
+  * bnx2: Fix netpoll crash.
+    - LP: #649483
+  * bnx2: Fix hang during rmmod bnx2.
+    - LP: #649483
+  * AT91: change dma resource index
+    - LP: #649483
+  * cxgb3: fix hot plug removal crash
+    - LP: #649483
+  * mm: page allocator: drain per-cpu lists after direct reclaim allocation
+    fails
+    - LP: #649483
+  * mm: page allocator: calculate a better estimate of NR_FREE_PAGES when
+    memory is low and kswapd is awake
+    - LP: #649483
+  * mm: page allocator: update free page counters after pages are placed on
+    the free list
+    - LP: #649483
+  * guard page for stacks that grow upwards
+    - LP: #649483
+  * Fix unprotected access to task credentials in waitid()
+    - LP: #649483
+  * sctp: Do not reset the packet during sctp_packet_config().
+    - LP: #649483
+  * 3c503: Fix IRQ probing
+    - LP: #649483
+  * asix: fix setting mac address for AX88772
+    - LP: #649483
+  * dasd: use correct label location for diag fba disks
+    - LP: #649483
+  * clocksource: sh_tmu: compute mult and shift before registration
+    - LP: #649483
+  * gro: Fix bogus gso_size on the first fraglist entry
+    - LP: #649483
+  * hostap_pci: set dev->base_addr during probe
+    - LP: #649483
+  * inotify: fix inotify oneshot support
+    - LP: #649483
+  * Input: add compat support for sysfs and /proc capabilities output
+    - LP: #649483
+  * MIPS: Quit using undefined behavior of ADDU in 64-bit atomic
+    operations.
+    - LP: #649483
+  * MIPS: Set io_map_base for several PCI bridges lacking it
+    - LP: #649483
+  * MIPS: uasm: Add OR instruction.
+    - LP: #649483
+  * pata_pdc202xx_old: fix UDMA mode for Promise UDMA33 cards
+    - LP: #649483
+  * pata_pdc202xx_old: fix UDMA mode for PDC2026x chipsets
+    - LP: #649483
+  * MIPS: Sibyte: Fix M3 TLB exception handler workaround.
+    - LP: #649483
+  * sis-agp: Remove SIS 760, handled by amd64-agp
+    - LP: #649483
+  * alpha: Fix printk format errors
+    - LP: #649483
+  * x86: Add memory modify constraints to xchg() and cmpxchg()
+    - LP: #649483
+  * Linux 2.6.32.23
+    - LP: #649483
+  * (pre-stable) [SCSI] megaraid_sas: Add new megaraid SAS 2 controller
+    support to the driver
+    - LP: #546091
+  * (pre-stable) [SCSI] megaraid_sas: allocate the application cmds to sas2
+    controller
+    - LP: #546091
+  * Xen: fix typo in previous patch
+    - LP: #655456
+  * Linux 2.6.32.24
+    - LP: #655456
+  * (ore-stable) ALSA: hda - Apply ALC269 VAIO fix-up to all Sony laptops
+    with ALC269
+    - See: #546769, #598938, #637291, #642892, #648871, #655386
+  * (pre-stable) ALSA: HDA: Correctly apply position_fix quirks for ATI and
+    VIA controllers
+    - See: #465942, #580749, #587546
+  * (pre-stable) ACPI: enable repeated PCIEXP wakeup by clearing
+    PCIEXP_WAKE_STS on resume
+    - LP: #613381
+  * i915: return -EFAULT if copy_to_user fails
+    - LP: #663176
+  * i915_gem: return -EFAULT if copy_to_user fails
+    - LP: #663176
+  * drm/i915: Prevent double dpms on
+    - LP: #663176
+  * drm: Only decouple the old_fb from the crtc is we call mode_set*
+    - LP: #663176
+  * drm/radeon/kms: fix potential segfault in r600_ioctl_wait_idle
+    - LP: #663176
+  * drm/i915: Unset cursor if out-of-bounds upon mode change (v4)
+    - LP: #586325, #663176
+  * drm/i915: disable FBC when more than one pipe is active
+    - LP: #663176
+  * drm/radeon/kms: fix macbookpro connector quirk
+    - LP: #663176
+  * drm/nouveau: use ALIGN instead of open coding it
+    - LP: #663176
+  * drm/nouveau: Fix fbcon corruption with font width not divisible by 8
+    - LP: #663176
+  * drm/i915,agp/intel: Add second set of PCI-IDs for B43
+    - LP: #640214, #663176
+  * Linux 2.6.32.24+drm33.11
+    - LP: #663176
+
+ -- Brad Figg <brad.figg@canonical.com>  Fri, 22 Oct 2010 10:41:58 -0700
+
+linux (2.6.32-25.45) lucid-security; urgency=low
+
+  [ Upstream Kernel Changes ]
+
+  * v4l: disable dangerous buggy compat function
+    - CVE-2010-2963
+  * Local privilege escalation vulnerability in RDS sockets
+    - CVE-2010-3904
+  * mm: (pre-stable) Move vma_stack_continue into mm.h
+    - LP: #646114
+  * net sched: fix some kernel memory leaks
+    - CVE-2010-2942
+  * irda: Correctly clean up self->ias_obj on irda_bind() failure.
+    - CVE-2010-2954
+  * wireless extensions: fix kernel heap content leak
+    - CVE-2010-2955
+  * KEYS: Fix RCU no-lock warning in keyctl_session_to_parent()
+    - CVE-2010-2960
+  * KEYS: Fix bug in keyctl_session_to_parent() if parent has no session
+    keyring
+    - CVE-2010-2960
+  * aio: check for multiplication overflow in do_io_submit
+    - CVE-2010-3067
+  * xfs: prevent reading uninitialized stack memory
+    - CVE-2010-3078
+  * ALSA: seq/oss - Fix double-free at error path of snd_seq_oss_open()
+    - CVE-2010-3080
+  * niu: Fix kernel buffer overflow for ETHTOOL_GRXCLSRLALL
+    - CVE-2010-3084
+  * rose: Fix signedness issues wrt. digi count.
+    - CVE-2010-3310
+  * sctp: Do not reset the packet during sctp_packet_config().
+    - CVE-2010-3432
+  * Fix pktcdvd ioctl dev_minor range check
+    - CVE-2010-3437
+  * ALSA: prevent heap corruption in snd_ctl_new()
+    - CVE-2010-3442
+  * net sched: fix kernel leak in act_police
+    - CVE-2010-3477
+  * Fix out-of-bounds reading in sctp_asoc_get_hmac()
+    - CVE-2010-3705
+  * ocfs2: Don't walk off the end of fast symlinks.
+    - CVE-2010-NNN2
+
+ -- Steve Conklin <sconklin@canonical.com>  Wed, 06 Oct 2010 16:16:20 +0100
+
+linux (2.6.32-25.44) lucid-proposed; urgency=low
+
+  [ Brad Figg ]
+
+  * SAUCE: (no-up) Modularize vesafb -- fix initialization
+    - LP: #611471
+
+  [ Stefan Bader ]
+
+  * Revert "SAUCE: sync before umount to reduce time taken by ext4 umount"
+    - LP: #543617, #585092
+
+  [ Steve Conklin ]
+
+  * Revert "SAUCE: tulip: Let dmfe handle davicom on non-sparc"
+    - LP: #607824
+
+  [ Tim Gardner ]
+
+  * [Config] Added ums-cypress to udeb
+    - LP: #576066
+
+  [ Upstream Kernel Changes ]
+
+  * Revert "PCI quirk: Disable MSI on VIA K8T890 systems"
+    - LP: #607824
+  * Revert "PCI quirks: disable msi on AMD rs4xx internal gfx bridges"
+    - LP: #607824
+  * Revert "(pre-stable) Input: psmouse - reset all types of mice before
+    reconnecting"
+    - LP: #607824
+  * Revert "jbd: jbd-debug and jbd2-debug should be writable"
+    - LP: #607824
+  * Revert "ext4: Make fsync sync new parent directories in no-journal
+    mode"
+    - LP: #615548
+  * Revert "ext4: Fix compat EXT4_IOC_ADD_GROUP"
+    - LP: #615548
+  * Revert "ext4: Conditionally define compat ioctl numbers"
+    - LP: #615548
+  * Revert "ext4: restart ext4_ext_remove_space() after transaction
+    restart"
+    - LP: #615548
+  * Revert "ext4: Clear the EXT4_EOFBLOCKS_FL flag only when warranted"
+    - LP: #615548
+  * Revert "ext4: Avoid crashing on NULL ptr dereference on a filesystem
+    error"
+    - LP: #615548
+  * Revert "ext4: Use bitops to read/modify i_flags in struct
+    ext4_inode_info"
+    - LP: #615548
+  * Revert "ext4: Show journal_checksum option"
+    - LP: #615548
+  * Revert "ext4: check for a good block group before loading buddy pages"
+    - LP: #615548
+  * Revert "ext4: Prevent creation of files larger than RLIMIT_FSIZE using
+    fallocate"
+    - LP: #615548
+  * Revert "ext4: Remove extraneous newlines in ext4_msg() calls"
+    - LP: #615548
+  * Revert "ext4: init statistics after journal recovery"
+    - LP: #615548
+  * Revert "ext4: clean up inode bitmaps manipulation in ext4_free_inode"
+    - LP: #615548
+  * Revert "ext4: Do not zero out uninitialized extents beyond i_size"
+    - LP: #615548
+  * Revert "ext4: don't scan/accumulate more pages than mballoc will
+    allocate"
+    - LP: #615548
+  * Revert "ext4: stop issuing discards if not supported by device"
+    - LP: #615548
+  * Revert "ext4: check s_log_groups_per_flex in online resize code"
+    - LP: #615548
+  * Revert "ext4: fix quota accounting in case of fallocate"
+    - LP: #615548
+  * Revert "ext4: allow defrag (EXT4_IOC_MOVE_EXT) in 32bit compat mode"
+    - LP: #615548
+  * Revert "ext4: rename ext4_mb_release_desc() to ext4_mb_unload_buddy()"
+    - LP: #615548
+  * Revert "ext4: Remove unnecessary call to ext4_get_group_desc() in
+    mballoc"
+    - LP: #615548
+  * Revert "ext4: fix memory leaks in error path handling of
+    ext4_ext_zeroout()"
+    - LP: #615548
+  * Revert "ext4: check missed return value in ext4_sync_file()"
+    - LP: #615548
+  * Revert "ext4: Issue the discard operation *before* releasing the blocks
+    to be reused"
+    - LP: #615548
+  * Revert "ext4: Fix buffer head leaks after calls to
+    ext4_get_inode_loc()"
+    - LP: #615548
+  * Revert "ext4: Fix possible lost inode write in no journal mode"
+    - LP: #615548
+  * Revert "ext4: Fixed inode allocator to correctly track a flex_bg's
+    used_dirs"
+    - LP: #615548
+  * Revert "ext4: Fix estimate of # of blocks needed to write
+    indirect-mapped files"
+    - LP: #615548
+  * Revert "ext4: Code cleanup for EXT4_IOC_MOVE_EXT ioctl"
+    - LP: #615548
+  * Revert "ext4: Fix the NULL reference in double_down_write_data_sem()"
+    - LP: #615548
+  * Revert "ext4: Fix insertion point of extent in
+    mext_insert_across_blocks()"
+    - LP: #615548
+  * Revert "ext4: make "offset" consistent in ext4_check_dir_entry()"
+    - LP: #615548
+  * Revert "ext4: Handle non empty on-disk orphan link"
+    - LP: #615548
+  * Revert "ext4: explicitly remove inode from orphan list after failed
+    direct io"
+    - LP: #615548
+  * Revert "ext4: fix error handling in migrate"
+    - LP: #615548
+  * Revert "ext4: Fix fencepost error in chosing choosing group vs file
+    preallocation."
+    - LP: #615548
+  * Revert "ext4: Add flag to files with blocks intentionally past EOF"
+    - LP: #615548
+  * Revert "ext4: Fix BUG_ON at fs/buffer.c:652 in no journal mode"
+    - LP: #615548
+  * Revert "ext4: Use bitops to read/modify EXT4_I(inode)->i_state"
+    - LP: #615548
+  * Revert "ext4: Drop EXT4_GET_BLOCKS_UPDATE_RESERVE_SPACE flag"
+    - LP: #615548
+  * Revert "ext4: Fix quota accounting error with fallocate"
+    - LP: #615548
+  * Revert "ext4: Handle -EDQUOT error on write"
+    - LP: #615548
+  * Revert "ext4: Calculate metadata requirements more accurately"
+    - LP: #615548
+  * Revert "ext4: Fix accounting of reserved metadata blocks"
+    - LP: #615548
+  * Revert "ext4: Patch up how we claim metadata blocks for quota purposes"
+    - LP: #615548
+  * Revert "ext4: Ensure zeroout blocks have no dirty metadata"
+    - LP: #615548
+  * Revert "ext4: return correct wbc.nr_to_write in ext4_da_writepages"
+    - LP: #615548
+  * Revert "ext4: Eliminate potential double free on error path"
+    - LP: #615548
+  * Revert "ext4, jbd2: Add barriers for file systems with exernal
+    journals"
+    - LP: #615548
+  * Revert "ext4: replace BUG() with return -EIO in ext4_ext_get_blocks"
+    - LP: #615548
+  * Revert "ext4: Fix potential quota deadlock"
+    - LP: #615548
+  * Revert "ext4: don't return to userspace after freezing the fs with a
+    mutex held"
+    - LP: #615548
+  * ixgbe: Fix return of invalid txq
+    - LP: #607824
+  * oprofile/x86: fix uninitialized counter usage during cpu hotplug
+    - LP: #607824
+  * oprofile: remove double ring buffering
+    - LP: #607824
+  * cpumask: fix compat getaffinity
+    - LP: #607824
+  * NFSD: don't report compiled-out versions as present
+    - LP: #607824
+  * sata_nv: use ata_pci_sff_activate_host() instead of ata_host_activate()
+    - LP: #607824
+  * ARCNET: Limit com20020 PCI ID matches for SOHARD cards
+    - LP: #607824
+  * rtl8180: fix tx status reporting
+    - LP: #607824
+  * Staging: add Add Sitecom WL-349 to rtl8192su
+    - LP: #607824
+  * staging: vt6655: Fix kernel BUG on driver wpa initialization
+    - LP: #607824
+  * Fix racy use of anon_inode_getfd() in perf_event.c
+    - LP: #607824
+  * posix_timer: Fix error path in timer_create
+    - LP: #607824
+  * libata: disable ATAPI AN by default
+    - LP: #607824
+  * libata: don't flush dcache on slab pages
+    - LP: #607824
+  * mutex: Fix optimistic spinning vs. BKL
+    - LP: #607824
+  * ALSA: hda: Fix model quirk for Dell M1730
+    - LP: #576160, #607824
+  * ALSA: hda: Use LPIB for Toshiba A100-259
+    - LP: #549560, #607824
+  * ALSA: hda: Use LPIB for Acer Aspire 5110
+    - LP: #583983, #607824
+  * ALSA: hda: Use LPIB for Sony VPCS11V9E
+    - LP: #586347, #607824
+  * ALSA: hda: Use LPIB for a Shuttle device
+    - LP: #551949, #607824
+  * ACPI: video: fix acpi_backlight=video
+    - LP: #573120, #607824
+  * V4L/DVB: gspca - stv06xx: Remove the 046d:08da from the stv06xx driver
+    - LP: #607824
+  * HID: Add the GYR4101US USB ID to hid-gyration
+    - LP: #607824
+  * ar9170usb: add a couple more USB IDs
+    - LP: #607824
+  * ar9170usb: fix panic triggered by undersized rxstream buffer
+    - LP: #607824
+  * USB: visor: fix memory leak
+    - LP: #607824
+  * USB: CP210x New Device IDs 11 New device IDs
+    - LP: #607824
+  * USB: kobil: fix memory leak
+    - LP: #607824
+  * USB: option: add PID for ZTE product
+    - LP: #607824
+  * USB: option.c: Add Pirelli VID/PID and indicate Pirelli's modem
+    interface is 0xff
+    - LP: #607824
+  * USB: serial: option: add cinterion device id
+    - LP: #607824
+  * USB: option.c: OLIVETTI OLICARD100 support
+    - LP: #607824
+  * USB: ir-usb: fix double free
+    - LP: #607824
+  * USB: kl5usb105: fix memory leak
+    - LP: #607824
+  * USB: mxc: gadget: Fix bitfield for calculating maximum packet size
+    - LP: #607824
+  * USB: unusual-dev: Add bad sense flag for Appotech ax203 based picture
+    frames
+    - LP: #607824
+  * USB: EHCI: clear PHCD before resuming
+    - LP: #607824
+  * USB: xhci: Fix issue with set interface after stall.
+    - LP: #607824
+  * USB: xhci: Fix check for room on the ring.
+    - LP: #607824
+  * USB: xHCI: Fix wrong usage of macro TRB_TYPE
+    - LP: #607824
+  * mac80211: give warning if building w/out rate ctrl algorithm
+    - LP: #607824
+  * mac80211: Fix robust management frame handling (MFP)
+    - LP: #607824
+  * mac80211: fix rts threshold check
+    - LP: #607824
+  * drivers/base/cpu.c: fix the output from /sys/devices/system/cpu/offline
+    - LP: #607824
+  * can: Fix SJA1000 command register writes on SMP systems
+    - LP: #607824
+  * PCI quirk: Disable MSI on VIA K8T890 systems
+    - LP: #607824
+  * PCI quirks: disable msi on AMD rs4xx internal gfx bridges
+    - LP: #607824
+  * PCI: Disable MSI for MCP55 on P5N32-E SLI
+    - LP: #607824
+  * virtio_net: Make delayed refill more reliable
+    - LP: #607824
+  * mm: hugetlb: fix clear_huge_page()
+    - LP: #607824
+  * powerpc: Fix handling of strncmp with zero len
+    - LP: #607824
+  * powerpc/pseries: Only call start-cpu when a CPU is stopped
+    - LP: #607824
+  * powerpc/pseries: Make query_cpu_stopped callable outside hotplug cpu
+    - LP: #607824
+  * powerpc/oprofile: fix potential buffer overrun in op_model_cell.c
+    - LP: #607824
+  * writeback: disable periodic old data writeback for
+    !dirty_writeback_centisecs
+    - LP: #607824
+  * md/raid1: fix counting of write targets.
+    - LP: #607824
+  * md: Fix read balancing in RAID1 and RAID10 on drives > 2TB
+    - LP: #607824
+  * md: set mddev readonly flag on blkdev BLKROSET ioctl
+    - LP: #607824
+  * x86/amd-iommu: Fix suspend/resume with IOMMU
+    - LP: #607824
+  * exofs: confusion between kmap() and kmap_atomic() api
+    - LP: #607824
+  * mn10300: set ARCH_KMALLOC_MINALIGN
+    - LP: #607824
+  * m68k: set ARCH_KMALLOC_MINALIGN
+    - LP: #607824
+  * rtc-cmos: do dev_set_drvdata() earlier in the initialization
+    - LP: #607824
+  * rtc: s3c: initialize driver data before using it
+    - LP: #607824
+  * frv: set ARCH_KMALLOC_MINALIGN
+    - LP: #607824
+  * xtensa: set ARCH_KMALLOC_MINALIGN
+    - LP: #607824
+  * Blackfin: set ARCH_KMALLOC_MINALIGN
+    - LP: #607824
+  * tmpfs: insert tmpfs cache pages to inactive list at first
+    - LP: #607824
+  * mlx4_core: Fix possible chunk sg list overflow in mlx4_alloc_icm()
+    - LP: #607824
+  * ARM: 6166/1: Proper prefetch abort handling on pre-ARMv6
+    - LP: #607824
+  * ARM: 6164/1: Add kto and kfrom to input operands list.
+    - LP: #607824
+  * ARM: 6146/1: sa1111: Prevent deadlock in resume path
+    - LP: #607824
+  * ARM: 6144/1: TCM memory bug freeing bug
+    - LP: #607824
+  * ARM: VFP: Fix vfp_put_double() for d16-d31
+    - LP: #607824
+  * ASoC: Fix dB scales for WM835x
+    - LP: #607824
+  * ASoC: Fix dB scales for WM8400
+    - LP: #607824
+  * ASoC: Fix dB scales for WM8990
+    - LP: #607824
+  * hwmon: (ltc4245) Read only one GPIO pin
+    - LP: #607824
+  * signals: check_kill_permission(): don't check creds if
+    same_thread_group()
+    - LP: #607824
+  * do_generic_file_read: clear page errors when issuing a fresh read of
+    the page
+    - LP: #607824
+  * ipmi: handle run_to_completion properly in deliver_recv_msg()
+    - LP: #607824
+  * x86, setup: Phoenix BIOS fixup is needed on Dell Inspiron Mini 1012
+    - LP: #607824
+  * xen: ensure timer tick is resumed even on CPU driving the resume
+    - LP: #607824
+  * xen: avoid allocation causing potential swap activity on the resume
+    path
+    - LP: #607824
+  * ALSA: hda: Use LPIB for an ASUS device
+    - See: #465942, #607824
+  * ALSA: hda: Use mb31 quirk for an iMac model
+    - LP: #542550, #607824
+  * ALSA: hda: Use LPIB for another mainboard
+    - See: #580749, #607824
+  * ALSA: hda: Use LPIB for ASUS M2V
+    - LP: #587546, #607824
+  * Staging: comedi - correct parameter gainlkup for DAQCard-6024E in
+    driver ni_mio_cs.c
+    - LP: #607824
+  * clocksource: sh_cmt: compute mult and shift before registration
+    - LP: #607824
+  * ath5k: retain promiscuous setting
+    - LP: #607824
+  * ahci: add pci quirk for JMB362
+    - LP: #607824
+  * firewire: core: check for 1394a compliant IRM, fix inaccessibility of
+    Sony camcorder
+    - LP: #607824
+  * perf_events: Fix resource leak in x86 __hw_perf_event_init()
+    - LP: #607824
+  * sata_nv: don't diddle with nIEN on mcp55
+    - LP: #607824
+  * sata_via: magic vt6421 fix for transmission problems w/ WD drives
+    - LP: #422994, #607824
+  * USB: mos7840: fix null-pointer dereference
+    - LP: #607824
+  * USB: xhci: Wait for host to start running.
+    - LP: #607824
+  * USB: xhci: Wait for controller to be ready after reset.
+    - LP: #607824
+  * USB: ftdi_sio: fix DTR/RTS line modes
+    - LP: #607824
+  * USB: cdc-acm: fix resource reclaim in error path of acm_probe
+    - LP: #607824
+  * p54usb: Add device ID for Dell WLA3310 USB
+    - LP: #607824
+  * atl1e: Allow TX checksum offload and TSO to be disabled and reenabled
+    - LP: #607824
+  * via-velocity: Give RX descriptors to the NIC later on open or MTU
+    change
+    - LP: #607824
+  * dmfe/tulip: Let dmfe handle DM910x except for SPARC on-board chips
+    - LP: #607824
+  * Documentation/3c509: document ethtool support
+    - LP: #607824
+  * wireless: report reasonable bitrate for MCS rates through wext
+    - LP: #607824
+  * ath9k: add support for 802.11n bonded out AR2427
+    - LP: #607824
+  * wrong type for 'magic' argument in simple_fill_super()
+    - LP: #607824
+  * iwlwifi: check for aggregation frame and queue
+    - LP: #607824
+  * iwlwifi: recalculate average tpt if not current
+    - LP: #607824
+  * iwlwifi: update supported PCI_ID list for 5xx0 series
+    - LP: #607824
+  * wl1251: fix a memory leak in probe
+    - LP: #607824
+  * vfs: add NOFOLLOW flag to umount(2)
+    - LP: #607824
+  * l2tp: Fix oops in pppol2tp_xmit
+    - LP: #607824
+  * ucc_geth: Fix empty TX queue processing
+    - LP: #607824
+  * ucc_geth: Fix netdev watchdog triggering on link changes
+    - LP: #607824
+  * ucc_geth: Fix full TX queue processing
+    - LP: #607824
+  * Input: psmouse - reset all types of mice before reconnecting
+    - LP: #607824
+  * KVM: s390: Fix possible memory leak of in kvm_arch_vcpu_create()
+    - LP: #607824
+  * KVM: PPC: Do not create debugfs if fail to create vcpu
+    - LP: #607824
+  * x86, paravirt: Add a global synchronization point for pvclock
+    - LP: #607824
+  * KVM: Don't allow lmsw to clear cr0.pe
+    - LP: #607824
+  * KVM: x86: Check LMA bit before set_efer
+    - LP: #607824
+  * KVM: MMU: Segregate shadow pages with different cr0.wp
+    - LP: #607824
+  * KVM: VMX: enable VMXON check with SMX enabled (Intel TXT)
+    - LP: #607824
+  * KVM: MMU: Don't read pdptrs with mmu spinlock held in mmu_alloc_roots
+    - LP: #607824
+  * KVM: Fix wallclock version writing race
+    - LP: #607824
+  * KVM: x86: Add missing locking to arch specific vcpu ioctls
+    - LP: #607824
+  * KVM: x86: Inject #GP with the right rip on efer writes
+    - LP: #607824
+  * jbd: jbd-debug and jbd2-debug should be writable
+    - LP: #607824
+  * parisc: clear floating point exception flag on SIGFPE signal
+    - LP: #607824
+  * dm snapshot: simplify sector_to_chunk expression
+    - LP: #607824
+  * KEYS: Return more accurate error codes
+    - LP: #607824
+  * qla2xxx: Disable MSI on qla24xx chips other than QLA2432.
+    - LP: #607824
+  * Linux 2.6.32.16
+    - LP: #607824
+  * drm/i915: Fix 82854 PCI ID, and treat it like other 85X
+    - LP: #607824
+  * drm/i915: Reject bind_to_gtt() early if object > aperture
+    - LP: #607824
+  * drm/edid: Fix 1024x768@85Hz
+    - LP: #607824
+  * drm/radeon/kms: reset ddc_bus in object header parsing
+    - LP: #607824
+  * drm/radeon/kms/atom: fix typo in LVDS panel info parsing
+    - LP: #607824
+  * drm/radeon: r100/r200 ums: block ability for userspace app to trash 0
+    page and beyond
+    - LP: #607824
+  * drm/radeon: fix the r100/r200 ums block 0 page fix
+    - LP: #607824
+  * drm/i915: Rebind bo if currently bound with incorrect alignment.
+    - LP: #607824
+  * Linux 2.6.32.16+drm33.6
+    - LP: #607824
+  * virtio-pci: disable msi at startup
+    - LP: #615548
+  * hwmon: (k8temp) Bypass core swapping on single-core processors
+    - LP: #615548
+  * hwmon: (k8temp) Fix temperature reporting for ASB1 processor revisions
+    - LP: #615548
+  * hwmon: (coretemp) Properly label the sensors
+    - LP: #615548
+  * hwmon: (coretemp) Skip duplicate CPU entries
+    - LP: #615548
+  * hwmon: (it87) Fix in7 on IT8720F
+    - LP: #615548
+  * cifs: remove bogus first_time check in NTLMv2 session setup code
+    - LP: #615548
+  * cifs: don't attempt busy-file rename unless it's in same directory
+    - LP: #615548
+  * CIFS: Fix a malicious redirect problem in the DNS lookup code
+    - LP: #615548
+  * ALSA: hda - Add Macbook 5,2 quirk
+    - LP: #463178, #615548
+  * cpmac: do not leak struct net_device on phy_connect errors
+    - LP: #615548
+  * sky2: enable rx/tx in sky2_phy_reinit()
+    - LP: #615548
+  * sparc: Fix use of uid16_t and gid16_t in asm/stat.h
+    - LP: #615548
+  * math-emu: correct test for downshifting fraction in _FP_FROM_INT()
+    - LP: #615548
+  * NFSv4: Fix an embarassing typo in encode_attrs()
+    - LP: #615548
+  * NFSv4: Ensure that /proc/self/mountinfo displays the minor version
+    number
+    - LP: #615548
+  * SUNRPC: Fix a re-entrancy bug in xs_tcp_read_calldir()
+    - LP: #615548
+  * ath5k: drop warning on jumbo frames
+    - LP: #615548
+  * ath9k: re-enable ps by default for new single chip families
+    - LP: #615548
+  * ath9k: Avoid corrupt frames being forwarded to mac80211.
+    - LP: #615548
+  * hostap: Protect against initialization interrupt
+    - LP: #615548
+  * TPM: ReadPubEK output struct fix
+    - LP: #615548
+  * fb: fix colliding defines for fb flags.
+    - LP: #615548
+  * iwlwifi: cancel scan watchdog in iwl_bg_abort_scan
+    - LP: #615548
+  * mac80211: do not wip out old supported rates
+    - LP: #615548
+  * mac80211: Handle mesh action frames in ieee80211_rx_h_action
+    - LP: #615548
+  * Btrfs: fix checks in BTRFS_IOC_CLONE_RANGE
+    - LP: #615548
+  * p54pci: add Symbol AP-300 minipci adapters pciid
+    - LP: #615548
+  * dynamic debug: move ddebug_remove_module() down into free_module()
+    - LP: #615548
+  * tpm_tis: fix subsequent suspend failures
+    - LP: #615548
+  * ipvs: Add missing locking during connection table hashing and unhashing
+    - LP: #615548
+  * netfilter: ip6t_REJECT: fix a dst leak in ipv6 REJECT
+    - LP: #615548
+  * SCSI: aacraid: Eliminate use after free
+    - LP: #615548
+  * amd64-agp: Probe unknown AGP devices the right way
+    - LP: #615548
+  * perf: Resurrect flat callchains
+    - LP: #615548
+  * x86: Fix vsyscall on gcc 4.5 with -Os
+    - LP: #615548
+  * x86, Calgary: Increase max PHB number
+    - LP: #615548
+  * x86, Calgary: Limit the max PHB number to 256
+    - LP: #615548
+  * sched: Prevent compiler from optimising the sched_avg_update() loop
+    - LP: #615548
+  * sched: Fix over-scheduling bug
+    - LP: #615548
+  * genirq: Deal with desc->set_type() changing desc->chip
+    - LP: #615548
+  * serial: cpm_uart: implement the cpm_uart_early_write() function for
+    console poll
+    - LP: #615548
+  * cmd640: fix kernel oops in test_irq() method
+    - LP: #615548
+  * ide: Fix IDE taskfile with cfq scheduler
+    - LP: #615548
+  * net/core: neighbour update Oops
+    - LP: #615548
+  * tcp: fix crash in tcp_xmit_retransmit_queue
+    - LP: #615548
+  * rtc: fix ds1388 time corruption
+    - LP: #615548
+  * ethtool: Fix potential kernel buffer overflow in ETHTOOL_GRXCLSRLALL
+    - LP: #615548
+  * sdhci-s3c: add missing remove function
+    - LP: #615548
+  * ASoC: Remove duplicate AUX definition from WM8776
+    - LP: #615548
+  * x86: Fix x2apic preenabled system with kexec
+    - LP: #615548
+  * IPoIB: Fix world-writable child interface control sysfs attributes
+    - LP: #615548
+  * Input: i8042 - add Gigabyte Spring Peak to dmi_noloop_table
+    - LP: #580664, #615548
+  * Input: twl40300-keypad - fix handling of "all ground" rows
+    - LP: #615548
+  * ARM: 6201/1: RealView: Do not use outer_sync() on ARM11MPCore boards
+    with L220
+    - LP: #615548
+  * ARM: 6226/1: fix kprobe bug in ldr instruction emulation
+    - LP: #615548
+  * x86: Do not try to disable hpet if it hasn't been initialized before
+    - LP: #615548
+  * staging: rtl8192su: add USB VID/PID for HWNUm-300
+    - LP: #615548
+  * Staging: rtl8192su: add USB ID for 0bda:8171
+    - LP: #615548
+  * USB: obey the sysfs power/wakeup setting
+    - LP: #615548
+  * USB: g_serial: don't set low_latency flag
+    - LP: #615548
+  * USB: g_serial: fix tty cleanup on unload
+    - LP: #615548
+  * USB: option: add support for 1da5:4518
+    - LP: #615548
+  * USB: Add PID for Sierra 250U to drivers/usb/serial/sierra.c
+    - LP: #599569, #615548
+  * USB: ftdi_sio: support for Signalyzer tools based on FTDI chips
+    - LP: #615548
+  * USB: option: Add support for AMOI Skypephone S2
+    - LP: #615548
+  * USB: adds Artisman USB dongle to list of quirky devices
+    - LP: #615548
+  * USB: sisusbvga: Fix for USB 3.0
+    - LP: #615548
+  * USB: add quirk for Broadcom BT dongle
+    - LP: #615548
+  * USB: FTDI: Add support for the RT System VX-7 radio programming cable
+    - LP: #615548
+  * ethtool: Fix potential user buffer overflow for ETHTOOL_{G, S}RXFH
+    - LP: #615548
+  * ext4: Fix potential quota deadlock
+    - LP: #615548
+  * ext4: replace BUG() with return -EIO in ext4_ext_get_blocks
+    - LP: #615548
+  * ext4, jbd2: Add barriers for file systems with exernal journals
+    - LP: #615548
+  * ext4: Eliminate potential double free on error path
+    - LP: #615548
+  * ext4: return correct wbc.nr_to_write in ext4_da_writepages
+    - LP: #615548
+  * ext4: Ensure zeroout blocks have no dirty metadata
+    - LP: #615548
+  * ext4: Patch up how we claim metadata blocks for quota purposes
+    - LP: #615548
+  * ext4: Fix accounting of reserved metadata blocks
+    - LP: #615548
+  * ext4: Calculate metadata requirements more accurately
+    - LP: #615548
+  * ext4: Handle -EDQUOT error on write
+    - LP: #615548
+  * ext4: Fix quota accounting error with fallocate
+    - LP: #615548
+  * ext4: Drop EXT4_GET_BLOCKS_UPDATE_RESERVE_SPACE flag
+    - LP: #615548
+  * ext4: Use bitops to read/modify EXT4_I(inode)->i_state
+    - LP: #615548
+  * ext4: Fix BUG_ON at fs/buffer.c:652 in no journal mode
+    - LP: #615548
+  * ext4: Add flag to files with blocks intentionally past EOF
+    - LP: #615548
+  * ext4: Fix fencepost error in chosing choosing group vs file
+    preallocation.
+    - LP: #615548
+  * ext4: fix error handling in migrate
+    - LP: #615548
+  * ext4: explicitly remove inode from orphan list after failed direct io
+    - LP: #615548
+  * ext4: Handle non empty on-disk orphan link
+    - LP: #615548
+  * ext4: make "offset" consistent in ext4_check_dir_entry()
+    - LP: #615548
+  * ext4: Fix insertion point of extent in mext_insert_across_blocks()
+    - LP: #615548
+  * ext4: Fix the NULL reference in double_down_write_data_sem()
+    - LP: #615548
+  * ext4: Code cleanup for EXT4_IOC_MOVE_EXT ioctl
+    - LP: #615548
+  * ext4: Fix estimate of # of blocks needed to write indirect-mapped files
+    - LP: #615548
+  * ext4: Fixed inode allocator to correctly track a flex_bg's used_dirs
+    - LP: #615548
+  * ext4: Fix possible lost inode write in no journal mode
+    - LP: #615548
+  * ext4: Fix buffer head leaks after calls to ext4_get_inode_loc()
+    - LP: #615548
+  * ext4: Issue the discard operation *before* releasing the blocks to be
+    reused
+    - LP: #615548
+  * ext4: check missed return value in ext4_sync_file()
+    - LP: #615548
+  * ext4: fix memory leaks in error path handling of ext4_ext_zeroout()
+    - LP: #615548
+  * ext4: Remove unnecessary call to ext4_get_group_desc() in mballoc
+    - LP: #615548
+  * ext4: rename ext4_mb_release_desc() to ext4_mb_unload_buddy()
+    - LP: #615548
+  * ext4: allow defrag (EXT4_IOC_MOVE_EXT) in 32bit compat mode
+    - LP: #615548
+  * ext4: fix quota accounting in case of fallocate
+    - LP: #615548
+  * ext4: check s_log_groups_per_flex in online resize code
+    - LP: #615548
+  * ext4: don't return to userspace after freezing the fs with a mutex held
+    - LP: #615548
+  * ext4: stop issuing discards if not supported by device
+    - LP: #615548
+  * ext4: don't scan/accumulate more pages than mballoc will allocate
+    - LP: #615548
+  * ext4: Do not zero out uninitialized extents beyond i_size
+    - LP: #615548
+  * ext4: clean up inode bitmaps manipulation in ext4_free_inode
+    - LP: #615548
+  * ext4: init statistics after journal recovery
+    - LP: #615548
+  * ext4: Remove extraneous newlines in ext4_msg() calls
+    - LP: #615548
+  * ext4: Prevent creation of files larger than RLIMIT_FSIZE using
+    fallocate
+    - LP: #615548
+  * ext4: check for a good block group before loading buddy pages
+    - LP: #615548
+  * ext4: Show journal_checksum option
+    - LP: #615548
+  * ext4: Use bitops to read/modify i_flags in struct ext4_inode_info
+    - LP: #615548
+  * ext4: Avoid crashing on NULL ptr dereference on a filesystem error
+    - LP: #615548
+  * ext4: Clear the EXT4_EOFBLOCKS_FL flag only when warranted
+    - LP: #615548
+  * ext4: restart ext4_ext_remove_space() after transaction restart
+    - LP: #615548
+  * ext4: Conditionally define compat ioctl numbers
+    - LP: #615548
+  * ext4: Fix compat EXT4_IOC_ADD_GROUP
+    - LP: #615548
+  * ext4: Make fsync sync new parent directories in no-journal mode
+    - LP: #615548
+  * KVM: MMU: Remove user access when allowing kernel access to gpte.w=0
+    page
+    - LP: #615548
+  * KVM: SVM: Handle MCEs early in the vmexit process
+    - LP: #615548
+  * KVM: SVM: Implement workaround for Erratum 383
+    - LP: #615548
+  * KVM: MMU: invalidate and flush on spte small->large page size change
+    - LP: #615548
+  * futex: futex_find_get_task remove credentails check
+    - LP: #615548
+  * GFS2: Fix up system xattrs
+    - LP: #615548
+  * PM / x86: Save/restore MISC_ENABLE register
+    - LP: #615548
+  * ACPI: skip checking BM_STS if the BIOS doesn't ask for it
+    - LP: #615548
+  * ACPI: Unconditionally set SCI_EN on resume
+    - LP: #615548
+  * libertas/sdio: 8686: set ECSI bit for 1-bit transfers
+    - LP: #615548
+  * dm9000: fix "BUG: spinlock recursion"
+    - LP: #615548
+  * firmware_class: fix memory leak - free allocated pages
+    - LP: #615548
+  * revert "[CPUFREQ] remove rwsem lock from CPUFREQ_GOV_STOP call (second
+    call site)"
+    - LP: #615548
+  * ALSA: Echoaudio, fix Guru Meditation #00000005.48454C50
+    - LP: #615548
+  * V4L/DVB: dvb-core: Fix ULE decapsulation bug
+    - LP: #615548
+  * V4L/DVB: FusionHDTV: Use quick reads for I2C IR device probing
+    - LP: #615548
+  * forcedeth: fix tx limit2 flag check
+    - LP: #615548
+  * staging: rtl8192su: add Support for Belkin F5D8053 v6
+    - LP: #615548
+  * MIPS FPU emulator: allow Cause bits of FCSR to be writeable by ctc1
+    - LP: #615548
+  * V4L/DVB: budget: Select correct frontends
+    - LP: #615548
+  * cxgb3: fix linkup issue
+    - LP: #615548
+  * mac80211: fix supported rates IE if AP doesn't give us it's rates
+    - LP: #615548
+  * V4L/DVB: uvcvideo: Add support for unbranded Arkmicro 18ec:3290 webcams
+    - LP: #615548
+  * V4L/DVB: uvcvideo: Add support for Packard Bell EasyNote MX52
+    integrated webcam
+    - LP: #615548
+  * V4L/DVB: uvcvideo: Add support for V4L2_PIX_FMT_Y16
+    - LP: #615548
+  * iwlagn: verify flow id in compressed BA packet
+    - LP: #615548
+  * kbuild: Fix modpost segfault
+    - LP: #615548
+  * eeepc-laptop: check wireless hotplug events
+    - LP: #615548
+  * Fix spinaphore down_spin()
+    - LP: #615548
+  * ath5k: initialize ah->ah_current_channel
+    - LP: #615548
+  * Input: RX51 keymap - fix recent compile breakage
+    - LP: #615548
+  * V4L/DVB (13830): uvcvideo: add another YUYV format GUID for iSight
+    cameras
+    - LP: #615548
+  * Linux 2.6.32.17
+    - LP: #615548
+  * drm/i915: fix hibernation since i915 self-reclaim fixes
+    - LP: #615548
+  * drm/i915: add 'reclaimable' to i915 self-reclaimable page allocations
+    - LP: #615548
+  * i915: fix lock imbalance on error path...
+    - LP: #615548
+  * drm/i915: Define MI_ARB_STATE bits
+    - LP: #615548
+  * drm/i915: enable low power render writes on GEN3 hardware.
+    - LP: #615548
+  * drm/i915: Make G4X-style PLL search more permissive
+    - LP: #615548
+  * drm/radeon/r200: handle more hw tex coord types
+    - LP: #615548
+  * drm/radeon/r100/r200: fix calculation of compressed cube maps
+    - LP: #615548
+  * drm/radeon/kms: CS checker texture fixes for r1xx/r2xx/r3xx
+    - LP: #615548
+  * drm/radeon/kms: fix shared ddc handling
+    - LP: #615548
+  * drm/radeon/kms: fix shared ddc harder
+    - LP: #615548
+  * drm/radeon/kms: add quirk for ASUS HD 3600 board
+    - LP: #615548
+  * drm/radeon/kms: fix possible mis-detection of sideport on rs690/rs740
+    - LP: #615548
+  * drm/radeon/kms: fix legacy LVDS dpms sequence
+    - LP: #615548
+  * drm/radeon/kms: fix legacy tv-out pal mode
+    - LP: #615548
+  * Linux 2.6.32.17+drm33.7
+    - LP: #615548
+  * (pre-stable) writeback: remove the always false
+    bdi_cap_writeback_dirty() test
+    - LP: #543617, #585092
+  * (pre-stable) writeback: remove unused nonblocking and congestion checks
+    - LP: #543617, #585092
+  * (pre-stable) vfs: improve writeback_inodes_wb()
+    - LP: #543617, #585092
+  * (pre-stable) writeback: add missing kernel-doc notation
+    - LP: #543617, #585092
+  * (pre-stable) writeback: fix writeback completion notifications
+    - LP: #543617, #585092
+  * (pre-stable) writeback: queue work on stack in writeback_inodes_sb
+    - LP: #543617, #585092
+  * (pre-stable) writeback: enforce s_umount locking in writeback_inodes_sb
+    - LP: #543617, #585092
+  * (pre-stable) writeback: fix writeback_inodes_wb from
+    writeback_inodes_sb
+    - LP: #543617, #585092
+  * (pre-stable) writeback: simplify wakeup_flusher_threads
+    - LP: #543617, #585092
+  * (pre-stable) writeback: simplify and split bdi_start_writeback
+    - LP: #543617, #585092
+  * (pre-stable) writeback: add missing requeue_io in writeback_inodes_wb
+    - LP: #543617, #585092
+  * (pre-stable) writeback: fix pin_sb_for_writeback
+    - LP: #543617, #585092
+  * (pre-stable) writeback: remove writeback_inodes_wbc
+    - LP: #543617, #585092
+  * (pre-stable) writeback: split writeback_inodes_wb
+    - LP: #543617, #585092
+  * (pre-stable) writeback: simplify the write back thread queue
+    - LP: #543617, #585092
+  * (pre-stable) Fix compiling NFS when backporting writeback
+    - LP: #543617, #585092
+  * sched: cgroup: Implement different treatment for idle shares
+    - LP: #620755
+  * mm: fix ia64 crash when gcore reads gate area
+    - LP: #620755
+  * acl trouble after upgrading ubuntu
+    - LP: #620755
+  * comedi: Uncripple 8255-based DIO subdevices
+    - LP: #620755
+  * NFS: kswapd must not block in nfs_release_page
+    - LP: #620755
+  * PARISC: led.c - fix potential stack overflow in led_proc_write()
+    - LP: #620755
+  * arm/imx/gpio: add spinlock protection
+    - LP: #620755
+  * parisc: pass through '\t' to early (iodc) console
+    - LP: #620755
+  * amd64_edac: Fix DCT base address selector
+    - LP: #620755
+  * amd64_edac: Correct scrub rate setting
+    - LP: #620755
+  * e1000e: don't inadvertently re-set INTX_DISABLE
+    - LP: #620755
+  * e1000e: 82577/82578 PHY register access issues
+    - LP: #620755
+  * 9p: strlen() doesn't count the terminator
+    - LP: #620755
+  * ath9k: enable serialize_regmode for non-PCIE AR9160
+    - LP: #620755
+  * ath9k_hw: fix an off-by-one error in the PDADC boundaries calculation
+    - LP: #620755
+  * ath9k: fix TSF after reset on AR913x
+    - LP: #620755
+  * ath9k: fix yet another buffer leak in the tx aggregation code
+    - LP: #620755
+  * iwlwifi: fix scan abort
+    - LP: #620755
+  * cfg80211: ignore spurious deauth
+    - LP: #620755
+  * cfg80211: don't get expired BSSes
+    - LP: #620755
+  * xfs: prevent swapext from operating on write-only files
+    - LP: #620755
+  * SCSI: enclosure: fix error path - actually return ERR_PTR() on error
+    - LP: #620755
+  * GFS2: rename causes kernel Oops
+    - LP: #620755
+  * slow-work: use get_ref wrapper instead of directly calling get_ref
+    - LP: #620755
+  * CIFS: Remove __exit mark from cifs_exit_dns_resolver()
+    - LP: #620755
+  * CIFS: Fix compile error with __init in cifs_init_dns_resolver()
+    definition
+    - LP: #620755
+  * xen: drop xen_sched_clock in favour of using plain wallclock time
+    - LP: #620755
+  * ssb: do not read SPROM if it does not exist
+    - LP: #620755
+  * ssb: Look for SPROM at different offset on higher rev CC
+    - LP: #620755
+  * ssb: fix NULL ptr deref when pcihost_wrapper is used
+    - LP: #620755
+  * ssb: Handle alternate SSPROM location
+    - LP: #620755
+  * Linux 2.6.32.18
+    - LP: #620755
+  * ata_piix: fix locking around SIDPR access
+    - LP: #622877
+  * powerpc: fix build with make 3.82
+    - LP: #622877
+  * nvram: Fix write beyond end condition; prove to gcc copy is safe
+    - LP: #622877
+  * x86: Add memory modify constraints to xchg() and cmpxchg()
+    - LP: #622877
+  * x86, vmware: Preset lpj values when on VMware.
+    - LP: #622877
+  * Staging: line6: needs to select SND_PCM
+    - LP: #622877
+  * Staging: panel: Prevent double-calling of parport_release - fix oops.
+    - LP: #622877
+  * PCI: Do not run NVidia quirks related to MSI with MSI disabled
+    - LP: #622877
+  * PCI: disable MSI on VIA K8M800
+    - LP: #622877
+  * solos-pci: Fix race condition in tasklet RX handling
+    - LP: #622877
+  * splice: fix misuse of SPLICE_F_NONBLOCK
+    - LP: #622877
+  * drivers/video/w100fb.c: ignore void return value / fix build failure
+    - LP: #622877
+  * ide-cd: Do not access completed requests in the irq handler
+    - LP: #622877
+  * md/raid10: fix deadlock with unaligned read during resync
+    - LP: #622877
+  * blkdev: cgroup whitelist permission fix
+    - LP: #622877
+  * eCryptfs: Handle ioctl calls with unlocked and compat functions
+    - LP: #622877
+  * ecryptfs: release reference to lower mount if interpose fails
+    - LP: #622877
+  * fs/ecryptfs/file.c: introduce missing free
+    - LP: #622877
+  * bio, fs: update RWA_MASK, READA and SWRITE to match the corresponding
+    BIO_RW_* bits
+    - LP: #622877
+  * signalfd: fill in ssi_int for posix timers and message queues
+    - LP: #622877
+  * smsc911x: Add spinlocks around registers access
+    - LP: #622877
+  * ARM: 6299/1: errata: TLBIASIDIS and TLBIMVAIS operations can broadcast
+    a faulty ASID
+    - LP: #622877
+  * ARM: 6280/1: imx: Fix build failure when including <mach/gpio.h>
+    without <linux/spinlock.h>
+    - LP: #622877
+  * USB: resizing usbmon binary interface buffer causes protection faults
+    - LP: #622877
+  * USB delay init quirk for logitech Harmony 700-series devices
+    - LP: #622877
+  * USB: serial: enabling support for Segway RMP in ftdi_sio
+    - LP: #622877
+  * USB: option: Huawei ETS 1220 support added
+    - LP: #622877
+  * USB: option: add huawei k3765 k4505 devices to work properly
+    - LP: #622877
+  * USB: ftdi_sio: device id for Navitator
+    - LP: #622877
+  * USB: cp210x: Add four new device IDs
+    - LP: #622877
+  * USB: usbtest: avoid to free coherent buffer in atomic context
+    - LP: #622877
+  * USB: fix thread-unsafe anchor utiliy routines
+    - LP: #622877
+  * drm/edid: Fix the HDTV hack sync adjustment
+    - LP: #622877
+  * Bluetooth: Added support for controller shipped with iMac i5
+    - LP: #622877
+  * jfs: don't allow os2 xattr namespace overlap with others
+    - LP: #622877
+  * arp_notify: allow drivers to explicitly request a notification event.
+    - LP: #622877
+  * xen: netfront: explicitly generate arp_notify event after migration.
+    - LP: #622877
+  * net: Fix NETDEV_NOTIFY_PEERS to not conflict with
+    NETDEV_BONDING_DESLAVE.
+    - LP: #622877
+  * irq: Add new IRQ flag IRQF_NO_SUSPEND
+    - LP: #622877
+  * xen: Do not suspend IPI IRQs.
+    - LP: #622877
+  * drm/i915: Use RSEN instead of HTPLG for tfp410 monitor detection.
+    - LP: #622877
+  * Btrfs: Avoid superfluous tree-log writeout
+    - LP: #622877
+  * Btrfs: Add btrfs_duplicate_item
+    - LP: #622877
+  * Btrfs: Rewrite btrfs_drop_extents
+    - LP: #622877
+  * Btrfs: Fix disk_i_size update corner case
+    - LP: #622877
+  * Btrfs: Avoid orphan inodes cleanup while replaying log
+    - LP: #622877
+  * Btrfs: Avoid orphan inodes cleanup during committing transaction
+    - LP: #622877
+  * Btrfs: Make fallocate(2) more ENOSPC friendly
+    - LP: #622877
+  * Btrfs: Make truncate(2) more ENOSPC friendly
+    - LP: #622877
+  * Btrfs: Pass transaction handle to security and ACL initialization
+    functions
+    - LP: #622877
+  * Btrfs: Add delayed iput
+    - LP: #622877
+  * Btrfs: Fix btrfs_drop_extent_cache for skip pinned case
+    - LP: #622877
+  * Btrfs: Fix per root used space accounting
+    - LP: #622877
+  * Btrfs: don't add extent 0 to the free space cache v2
+    - LP: #622877
+  * Btrfs: fail mount on bad mount options
+    - LP: #622877
+  * Btrfs: deny sys_link across subvolumes.
+    - LP: #622877
+  * Btrfs: Show discard option in /proc/mounts
+    - LP: #622877
+  * Btrfs: make metadata chunks smaller
+    - LP: #622877
+  * Btrfs: make sure fallocate properly starts a transaction
+    - LP: #622877
+  * btrfs: fix missing last-entry in readdir(3)
+    - LP: #622877
+  * Btrfs: align offsets for btrfs_ordered_update_i_size
+    - LP: #622877
+  * Btrfs, fix memory leaks in error paths
+    - LP: #622877
+  * Btrfs: Fix race in btrfs_mark_extent_written
+    - LP: #622877
+  * Btrfs: fix regression in orphan cleanup
+    - LP: #622877
+  * Btrfs: deal with NULL acl sent to btrfs_set_acl
+    - LP: #622877
+  * Btrfs: fix possible panic on unmount
+    - LP: #622877
+  * Btrfs: Use correct values when updating inode i_size on fallocate
+    - LP: #622877
+  * Btrfs: fix a memory leak in btrfs_init_acl
+    - LP: #622877
+  * Btrfs: run orphan cleanup on default fs root
+    - LP: #622877
+  * Btrfs: do not mark the chunk as readonly if in degraded mode
+    - LP: #622877
+  * Btrfs: check return value of open_bdev_exclusive properly
+    - LP: #622877
+  * Btrfs: check total number of devices when removing missing
+    - LP: #622877
+  * Btrfs: fix race between allocate and release extent buffer.
+    - LP: #622877
+  * Btrfs: make error return negative in btrfs_sync_file()
+    - LP: #622877
+  * Btrfs: remove BUG_ON() due to mounting bad filesystem
+    - LP: #622877
+  * Btrfs: Fix oopsen when dropping empty tree.
+    - LP: #622877
+  * Btrfs: do not try and lookup the file extent when finishing ordered io
+    - LP: #622877
+  * Btrfs: apply updated fallocate i_size fix
+    - LP: #622877
+  * Btrfs: btrfs_mark_extent_written uses the wrong slot
+    - LP: #622877
+  * Btrfs: kfree correct pointer during mount option parsing
+    - LP: #622877
+  * nohz: Introduce arch_needs_cpu
+    - LP: #622877
+  * nohz: Reuse ktime in sub-functions of tick_check_idle.
+    - LP: #622877
+  * timekeeping: Fix clock_gettime vsyscall time warp
+    - LP: #622877
+  * sched: Fix granularity of task_u/stime()
+    - LP: #622877
+  * sched, cputime: Introduce thread_group_times()
+    - LP: #622877
+  * mutex: Don't spin when the owner CPU is offline or other weird cases
+    - LP: #622877
+  * fix SBA IOMMU to handle allocation failure properly
+    - LP: #622877
+  * crypto: testmgr - Fix complain about lack test for internal used
+    algorithm
+    - LP: #622877
+  * memory hotplug: fix a bug on /dev/mem for 64-bit kernels
+    - LP: #622877
+  * x86: Fix out of order of gsi
+    - LP: #622877
+  * HWPOISON: remove the anonymous entry
+    - LP: #622877
+  * HWPOISON: abort on failed unmap
+    - LP: #622877
+  * powerpc/eeh: Fix a bug when pci structure is null
+    - LP: #622877
+  * ACPI: Fix regression where _PPC is not read at boot even when
+    ignore_ppc=0
+    - LP: #622877
+  * ext4: Make sure the MOVE_EXT ioctl can't overwrite append-only files
+    - LP: #622877
+  * ext4: Fix optional-arg mount options
+    - LP: #622877
+  * reiserfs: properly honor read-only devices
+    - LP: #622877
+  * reiserfs: fix oops while creating privroot with selinux enabled
+    - LP: #622877
+  * dlm: always use GFP_NOFS
+    - LP: #622877
+  * dlm: fix ordering of bast and cast
+    - LP: #622877
+  * dlm: send reply before bast
+    - LP: #622877
+  * ocfs2: Find proper end cpos for a leaf refcount block.
+    - LP: #622877
+  * ocfs2: Set MS_POSIXACL on remount
+    - LP: #622877
+  * Skip check for mandatory locks when unlocking
+    - LP: #622877
+  * loop: Update mtime when writing using aops
+    - LP: #622877
+  * aic79xx: check for non-NULL scb in ahd_handle_nonpkt_busfree
+    - LP: #622877
+  * ibmvfc: Fix command completion handling
+    - LP: #622877
+  * ibmvfc: Reduce error recovery timeout
+    - LP: #622877
+  * md/raid1: delay reads that could overtake behind-writes.
+    - LP: #622877
+  * mm: fix corruption of hibernation caused by reusing swap during image
+    saving
+    - LP: #622877
+  * Linux 2.6.32.19
+    - LP: #622877
+  * Linux 2.6.32.20
+    - LP: #622882
+  * memstick: fix hangs on unexpected device removal in mspro_blk
+    - LP: #625392
+  * ASoC: Fix inverted mute controls for WM8580
+    - LP: #625392
+  * ASoC: Remove DSP mode support for WM8776
+    - LP: #625392
+  * ALSA: riptide - Fix detection / load of firmware files
+    - LP: #625392
+  * ALSA: emu10k1 - delay the PCM interrupts (add pcm_irq_delay parameter)
+    - LP: #625392
+  * ALSA: hda - Fix missing stream for second ADC on Realtek ALC260 HDA
+    codec
+    - LP: #625392
+  * ocfs2: do not overwrite error codes in ocfs2_init_acl
+    - LP: #625392
+  * ocfs2/dlm: fix a dead lock
+    - LP: #625392
+  * ocfs2 fix o2dlm dlm run purgelist (rev 3)
+    - LP: #625392
+  * ocfs2: Count more refcount records in file system fragmentation.
+    - LP: #625392
+  * ocfs2/dlm: avoid incorrect bit set in refmap on recovery master
+    - LP: #625392
+  * ocfs2/dlm: remove potential deadlock -V3
+    - LP: #625392
+  * x86, hotplug: Serialize CPU hotplug to avoid bringup concurrency issues
+    - LP: #625392
+  * x86, apic: Fix apic=debug boot crash
+    - LP: #625392
+  * Fix the nested PR lock calling issue in ACL
+    - LP: #625392
+  * hwmon: (pc87360) Fix device resource declaration
+    - LP: #625392
+  * ARM: Tighten check for allowable CPSR values
+    - LP: #625392
+  * nfs: Add "lookupcache" to displayed mount options
+    - LP: #625392
+  * ath5k: disable ASPM L0s for all cards
+    - LP: #625392
+  * pxa3xx: fix ns2cycle equation
+    - LP: #625392
+  * dm mpath: fix NULL pointer dereference when path parameters missing
+    - LP: #625392
+  * dm ioctl: release _hash_lock between devices in remove_all
+    - LP: #625392
+  * mm: make the vma list be doubly linked
+    - LP: #625392
+  * mm: make the mlock() stack guard page checks stricter
+    - LP: #625392
+  * mm: make stack guard page logic use vm_prev pointer
+    - LP: #625392
+  * slab: fix object alignment
+    - LP: #625392
+  * sunxvr500: Ignore secondary output PCI devices.
+    - LP: #625392
+  * sparc64: Add missing ID to parport probing code.
+    - LP: #625392
+  * sparc64: Fix rwsem constant bug leading to hangs.
+    - LP: #625392
+  * sparc64: Fix atomic64_t routine return values.
+    - LP: #625392
+  * net: Fix a memmove bug in dev_gro_receive()
+    - LP: #625392
+  * isdn: fix information leak
+    - LP: #625392
+  * act_nat: the checksum of ICMP doesn't have pseudo header
+    - LP: #625392
+  * vmscan: raise the bar to PAGEOUT_IO_SYNC stalls
+    - LP: #625392
+  * pcmcia: avoid buffer overflow in pcmcia_setup_isa_irq
+    - LP: #625392
+  * ext4: consolidate in_range() definitions
+    - LP: #625392
+  * Oprofile: Change CPUIDS from decimal to hex, and add some comments
+    - LP: #625392
+  * oprofile: add support for Intel processor model 30
+    - LP: #625392
+  * fixes for using make 3.82
+    - LP: #625392
+  * ALSA: intel8x0: Mute External Amplifier by default for ThinkPad X31
+    - LP: #619439, #625392
+  * netlink: fix compat recvmsg
+    - LP: #625392
+  * powerpc: Fix typo in uImage target
+    - LP: #625392
+  * USB: option: add Celot CT-650
+    - LP: #625392
+  * USB: add device IDs for igotu to navman
+    - LP: #625392
+  * USB: pl2303: New vendor and product id
+    - LP: #625392
+  * USB: CP210x Fix Break On/Off
+    - LP: #625392
+  * USB: ftdi_sio: fix endianess of max packet size
+    - LP: #625392
+  * USB: io_ti: check firmware version before updating
+    - LP: #625392
+  * USB: xhci: Remove buggy assignment in next_trb()
+    - LP: #625392
+  * USB: ftdi_sio: Add ID for Ionics PlugComputer
+    - LP: #625392
+  * USB: ftdi_sio: add product ID for Lenz LI-USB
+    - LP: #625392
+  * x86, apic: ack all pending irqs when crashed/on kexec
+    - LP: #625392
+  * Linux 2.6.32.21
+    - LP: #625392
+
+ -- Stefan Bader <stefan.bader@canonical.com>  Tue, 31 Aug 2010 15:17:31 +0200
+
+linux (2.6.32-24.43) lucid-security; urgency=low
+
+  [ Upstream Kernel Changes ]
+
+  * x86-64, compat: Test %rax for the syscall number, not %eax
+    - CVE-2010-3301
+  * x86-64, compat: Retruncate rax after ia32 syscall entry tracing
+    - CVE-2010-3301
+  * compat: Make compat_alloc_user_space() incorporate the access_ok()
+    - CVE-2010-3081
+
+ -- Stefan Bader <stefan.bader@canonical.com>  Thu, 16 Sep 2010 10:27:21 +0200
+
+linux (2.6.32-24.42) lucid-proposed; urgency=low
+
+  [ Upstream Kernel Changes ]
+
+  * (pre-stable) drm/i915: add PANEL_UNLOCK_REGS definition
+    - LP: #561802, #578673
+  * (pre-stable) drm/i915: make sure eDP panel is turned on
+    - LP: #578673
+  * (pre-stable) drm/i915: make sure we shut off the panel in eDP configs
+    - LP: #578673
+
+ -- Stefan Bader <stefan.bader@canonical.com>  Thu, 19 Aug 2010 15:20:42 +0200
+
+linux (2.6.32-24.41) lucid-security; urgency=low
+
+  [ Upstream Kernel Changes ]
+
+  * (pre-stable) ext4: fix freeze deadlock under IO
+    - LP: #595489
+  * drm: Initialize ioctl struct when no user data is present
+    - CVE-2010-2803
+  * can: add limit for nframes and clean up signed/unsigned variables
+    - CVE-2010-2959
+  * mm: keep a guard page below a grow-down stack segment
+    - CVE-2010-2240
+  * mm: fix missing page table unmap for stack guard page failure case
+    - CVE-2010-2240
+  * mm: fix page table unmap for stack guard page properly
+    - CVE-2010-2240
+  * mm: fix up some user-visible effects of the stack guard page
+    - CVE-2010-2240
+  * x86: don't send SIGBUS for kernel page faults
+    - CVE-2010-2240
+
+ -- Stefan Bader <stefan.bader@canonical.com>  Wed, 18 Aug 2010 14:24:07 +0200
+
+linux (2.6.32-24.39) lucid-security; urgency=low
+
+  [ Upstream Kernel Changes ]
+
+  * sctp: Fix skb_over_panic resulting from multiple invalid parameter
+    errors (CVE-2010-1173) (v4)
+    - CVE-2010-1173
+  * sctp: fix append error cause to ERROR chunk correctly
+    - CVE-2010-1173
+  * GFS2: Fix writing to non-page aligned gfs2_quota structures
+    - CVE-2010-1436
+  * KEYS: find_keyring_by_name() can gain access to a freed keyring
+    - CVE-2010-1437
+  * GFS2: Fix permissions checking for setflags ioctl()
+    - CVE-2010-1641
+  * Btrfs: should add a permission check for setfacl
+    - CVE-2010-2071
+  * ecryptfs: Bugfix for error related to ecryptfs_hash_buckets
+    - CVE-2010-2492
+
+ -- Stefan Bader <stefan.bader@canonical.com>  Wed, 21 Jul 2010 10:48:54 +0200
+
+linux (2.6.32-24.38) lucid-proposed; urgency=low
+
+  [ Keng-Yu Lin ]
+
+  * SAUCE: dell-laptop: fire SMI when toggling hardware killswitch
+    (revised)
+    - LP: #590607
+
+  [ Upstream Kernel Changes ]
+
+  * sfc: Wait at most 10ms for the MC to finish reading out MAC statistics
+    - LP: #590783
+  * sfc: Always close net device at the end of a disabling reset
+    - LP: #590783
+  * sfc: Change falcon_probe_board() to fail for unsupported boards
+    - LP: #590783
+  * ext4: Fix potential quota deadlock
+    - LP: #588069
+  * jbd: jbd-debug and jbd2-debug should be writable
+    - LP: #588069
+  * ext4: replace BUG() with return -EIO in ext4_ext_get_blocks
+    - LP: #588069
+  * ext4, jbd2: Add barriers for file systems with exernal journals
+    - LP: #588069
+  * ext4: Eliminate potential double free on error path
+    - LP: #588069
+  * ext4: return correct wbc.nr_to_write in ext4_da_writepages
+    - LP: #588069
+  * ext4: Ensure zeroout blocks have no dirty metadata
+    - LP: #588069
+  * ext4: Patch up how we claim metadata blocks for quota purposes
+    - LP: #588069
+  * ext4: Fix accounting of reserved metadata blocks
+    - LP: #588069
+  * ext4: Calculate metadata requirements more accurately
+    - LP: #588069
+  * ext4: Handle -EDQUOT error on write
+    - LP: #588069
+  * ext4: Fix quota accounting error with fallocate
+    - LP: #588069
+  * ext4: Drop EXT4_GET_BLOCKS_UPDATE_RESERVE_SPACE flag
+    - LP: #588069
+  * ext4: Use bitops to read/modify EXT4_I(inode)->i_state
+    - LP: #588069
+  * ext4: Fix BUG_ON at fs/buffer.c:652 in no journal mode
+    - LP: #588069
+  * ext4: Add flag to files with blocks intentionally past EOF
+    - LP: #588069
+  * ext4: Fix fencepost error in chosing choosing group vs file
+    preallocation.
+    - LP: #588069
+  * ext4: fix error handling in migrate
+    - LP: #588069
+  * ext4: explicitly remove inode from orphan list after failed direct io
+    - LP: #588069
+  * ext4: Handle non empty on-disk orphan link
+    - LP: #588069
+  * ext4: make "offset" consistent in ext4_check_dir_entry()
+    - LP: #588069
+  * ext4: Fix insertion point of extent in mext_insert_across_blocks()
+    - LP: #588069
+  * ext4: Fix the NULL reference in double_down_write_data_sem()
+    - LP: #588069
+  * ext4: Code cleanup for EXT4_IOC_MOVE_EXT ioctl
+    - LP: #588069
+  * ext4: Fix estimate of # of blocks needed to write indirect-mapped files
+    - LP: #588069
+  * ext4: Fixed inode allocator to correctly track a flex_bg's used_dirs
+    - LP: #588069
+  * ext4: Fix possible lost inode write in no journal mode
+    - LP: #588069
+  * ext4: Fix buffer head leaks after calls to ext4_get_inode_loc()
+    - LP: #588069
+  * ext4: Issue the discard operation *before* releasing the blocks to be
+    reused
+    - LP: #588069
+  * ext4: check missed return value in ext4_sync_file()
+    - LP: #588069
+  * ext4: fix memory leaks in error path handling of ext4_ext_zeroout()
+    - LP: #588069
+  * ext4: Remove unnecessary call to ext4_get_group_desc() in mballoc
+    - LP: #588069
+  * ext4: rename ext4_mb_release_desc() to ext4_mb_unload_buddy()
+    - LP: #588069
+  * ext4: allow defrag (EXT4_IOC_MOVE_EXT) in 32bit compat mode
+    - LP: #588069
+  * ext4: fix quota accounting in case of fallocate
+    - LP: #588069
+  * ext4: check s_log_groups_per_flex in online resize code
+    - LP: #588069
+  * ext4: don't return to userspace after freezing the fs with a mutex held
+    - LP: #588069
+  * ext4: stop issuing discards if not supported by device
+    - LP: #588069
+  * ext4: don't scan/accumulate more pages than mballoc will allocate
+    - LP: #588069
+  * ext4: Do not zero out uninitialized extents beyond i_size
+    - LP: #588069
+  * ext4: clean up inode bitmaps manipulation in ext4_free_inode
+    - LP: #588069
+  * ext4: init statistics after journal recovery
+    - LP: #588069
+  * ext4: Remove extraneous newlines in ext4_msg() calls
+    - LP: #588069
+  * ext4: Prevent creation of files larger than RLIMIT_FSIZE using
+    fallocate
+    - LP: #588069
+  * ext4: check for a good block group before loading buddy pages
+    - LP: #588069
+  * ext4: Show journal_checksum option
+    - LP: #588069
+  * ext4: Use bitops to read/modify i_flags in struct ext4_inode_info
+    - LP: #588069
+  * ext4: Avoid crashing on NULL ptr dereference on a filesystem error
+    - LP: #588069
+  * ext4: Clear the EXT4_EOFBLOCKS_FL flag only when warranted
+    - LP: #588069
+  * ext4: restart ext4_ext_remove_space() after transaction restart
+    - LP: #588069
+  * ext4: Conditionally define compat ioctl numbers
+    - LP: #588069
+  * ext4: Fix compat EXT4_IOC_ADD_GROUP
+    - LP: #588069
+  * ext4: Make fsync sync new parent directories in no-journal mode
+    - LP: #588069
+  * (pre-stable) ahci,ata_generic: let ata_generic handle new MBP w/ MCP89
+    - LP: #576601
+  * (pre-stable) ata_generic: implement ATA_GEN_* flags and force enable
+    DMA on MBP 7,1
+    - LP: #576601
+
+ -- Steve Conklin <sconklin@canonical.com>  Fri, 2 Jul 2010 11:06:32 -0500
+
+linux (2.6.32-23.37) lucid-proposed; urgency=low
+
+  [ Alex Deucher ]
+
+  * SAUCE: drm/radeon/kms/atom: fix dual-link DVI on DCE3.2/4.0
+    - LP: #564559
+
+  [ Andy Whitcroft ]
+
+  * [Config] ports -- build in dm-mod to enable LVM boot
+    - LP: #560717
+  * tools -- fix perf version extraction for multi-part flavours
+    - LP: #555130
+  * SAUCE: ACPI: EC: Allow multibyte access to EC (v3)
+    - LP: #526354
+  * [Config] enforce -- ensure dm_mod is built-in for LVM
+    - LP: #560717
+  * update to ubuntu-debian:7e708d33054c373faf41da23b73e8b48c342d958
+    - LP: #570500, #576274
+
+  [ Chase Douglas ]
+
+  * Revert "(pre-stable): input: ALPS - Add signature for HP Pavilion dm3
+    laptops"
+    - LP: #550625
+  * Enable ftrace function profiler
+    - LP: #570389
+  * enforce CONFIG_TMPFS_POSIX_ACL=y
+    - LP: #575940
+
+  [ Leann Ogasawara ]
+
+  * Revert "staging/comdi -- disable"
+    - LP: #563436
+  * [Config] Enable multicast routing for sparc
+    - LP: #416266
+  * [Config] Add ahci.ko to virtual sub-flavour
+    - LP: #570542
+
+  [ Stefan Bader ]
+
+  * Revert "SAUCE: drm/i915: Disable FBC on 915GM and 945GM"
+    - LP: #588832
+
+  [ Tim Gardner ]
+
+  * ubuntu: rtl8192se -- update to version 0015.0127.2010
+    - LP: #567016
+  * [Config] Add atl1c to nic-modules udeb
+    - LP: #557130
+
+  [ Upstream Kernel Changes ]
+
+  * Revert "(pre-stable) iwlwifi: fix nfreed--"
+    - LP: #575853
+  * Revert "backlight: mbp_nvidia_bl - add five more MacBook variants"
+    - LP: #575853
+  * Revert "(pre-stable) pata_via: Add VIA VX900 support"
+    - LP: #575853
+  * Revert "(pre-stable) x86-32, resume: do a global tlb flush in S4
+    resume"
+    - LP: #575853
+  * Revert "x86: disable IOMMUs on kernel crash"
+    - LP: #575853
+  * Revert "sunrpc: fix peername failed on closed listener"
+    - LP: #575853
+  * Revert "sunrpc: move the close processing after do recvfrom method"
+    - LP: #575853
+  * Revert "(pre-stable) drm/edid: allow certain bogus edids to hit a fixup
+    path rather than fail"
+    - LP: #575853
+  * Revert "drm/radeon/kms: don't print error on -ERESTARTSYS."
+    - LP: #575853
+  * Revert "ath9k: fix lockdep warning when unloading module" on stable
+    kernels
+    - LP: #588832
+  * Staging: comedi: removed "depricated" from COMEDI_CB_BLOCK
+    - LP: #483343
+  * fat: fix buffer overflow in vfat_create_shortname()
+    - LP: #575853
+  * xfs: simplify inode teardown
+    - LP: #575853
+  * xfs: fix mmap_sem/iolock inversion in xfs_free_eofblocks
+    - LP: #575853
+  * xfs: I/O completion handlers must use NOFS allocations
+    - LP: #575853
+  * xfs: Wrapped journal record corruption on read at recovery
+    - LP: #575853
+  * xfs: Fix error return for fallocate() on XFS
+    - LP: #575853
+  * xfs: check for not fully initialized inodes in xfs_ireclaim
+    - LP: #575853
+  * xfs: fix timestamp handling in xfs_setattr
+    - LP: #575853
+  * xfs: Don't flush stale inodes
+    - LP: #575853
+  * xfs: Ensure we force all busy extents in range to disk
+    - LP: #575853
+  * xfs: reclaim inodes under a write lock
+    - LP: #575853
+  * xfs: Avoid inodes in reclaim when flushing from inode cache
+    - LP: #575853
+  * xfs: reclaim all inodes by background tree walks
+    - LP: #575853
+  * xfs: fix stale inode flush avoidance
+    - LP: #575853
+  * xfs: xfs_swap_extents needs to handle dynamic fork offsets
+    - LP: #575853
+  * xfs: quota limit statvfs available blocks
+    - LP: #575853
+  * xfs: don't hold onto reserved blocks on remount, ro
+    - LP: #575853
+  * xfs: remove invalid barrier optimization from xfs_fsync
+    - LP: #575853
+  * xfs: Non-blocking inode locking in IO completion
+    - LP: #575853
+  * xfs: fix locking for inode cache radix tree tag updates
+    - LP: #575853
+  * sh: Enable the mmu in start_secondary()
+    - LP: #575853
+  * sh: Fix FDPIC binary loader
+    - LP: #575853
+  * libiscsi: Fix recovery slowdown regression
+    - LP: #575853
+  * Freezer: Fix buggy resume test for tasks frozen with cgroup freezer
+    - LP: #575853
+  * iwlwifi: counting number of tfds can be free for 4965
+    - LP: #575853
+  * iwlwifi: fix nfreed--
+    - LP: #575853
+  * iwlwifi: range checking issue
+    - LP: #575853
+  * setup correct int pipe type in ar9170_usb_exec_cmd
+    - LP: #575853
+  * mac80211: move netdev queue enabling to correct spot
+    - LP: #575853
+  * mac80211: tear down all agg queues when restart/reconfig hw
+    - LP: #575853
+  * WATCHDOG: hpwdt - fix lower timeout limit
+    - LP: #575853
+  * WATCHDOG: iTCO_wdt: TCO Watchdog patch for additional Intel Cougar
+    Point DeviceIDs
+    - LP: #575853
+  * genirq: Force MSI irq handlers to run with interrupts disabled
+    - LP: #575853
+  * lis3: fix show rate for 8 bits chips
+    - LP: #575853
+  * pata_ali: Fix regression with old devices
+    - LP: #575853
+  * HID: fix oops in gyration_event()
+    - LP: #575853
+  * raw: fsync method is now required
+    - LP: #575853
+  * readahead: fix NULL filp dereference
+    - LP: #575853
+  * ALSA: mixart: range checking proc file
+    - LP: #575853
+  * ALSA: hda: Fix 0 dB offset for Lenovo Thinkpad models using AD1981
+    - LP: #551606, #575853
+  * x86, amd: Get multi-node CPU info from NodeId MSR instead of PCI config
+    space
+    - LP: #575853
+  * resource: move kernel function inside __KERNEL__
+    - LP: #575853
+  * backlight: mbp_nvidia_bl - add five more MacBook variants
+    - LP: #575853
+  * pata_via: Add VIA VX900 support
+    - LP: #575853
+  * ext3: Don't update the superblock in ext3_statfs()
+    - LP: #575853
+  * ext3: journal all modifications in ext3_xattr_set_handle
+    - LP: #575853
+  * eeepc-laptop: disable cpu speed control on EeePC 701
+    - LP: #575853
+  * eeepc-laptop: dmi blacklist to disable pci hotplug code
+    - LP: #575853
+  * eeepc-laptop: add hotplug_disable parameter
+    - LP: #575853
+  * eeepc-laptop: disable wireless hotplug for 1201N
+    - LP: #575853
+  * eeepc-laptop: disable wireless hotplug for 1005PE
+    - LP: #575853
+  * libata: disable NCQ on Crucial C300 SSD
+    - LP: #575853
+  * cifs: Fix a kernel BUG with remote OS/2 server (try #3)
+    - LP: #575853
+  * CIFS: initialize nbytes at the beginning of CIFSSMBWrite()
+    - LP: #575853
+  * iwlwifi: need check for valid qos packet before free
+    - LP: #575853
+  * ARM: 6031/1: fix Thumb-2 decompressor
+    - LP: #575853
+  * x86-32, resume: do a global tlb flush in S4 resume
+    - LP: #575853
+  * x86: hpet: Make WARN_ON understandable
+    - LP: #575853
+  * x86, hpet: Erratum workaround for read after write of HPET comparator
+    - LP: #575853
+  * x86: Fix double enable_IR_x2apic() call on SMP kernel on !SMP boards
+    - LP: #575853
+  * sched: sched_getaffinity(): Allow less than NR_CPUS length
+    - LP: #575853
+  * sched: Fix sched_getaffinity()
+    - LP: #575853
+  * NFSv4: Fall back to ordinary lookup if nfs4_atomic_open() returns
+    EISDIR
+    - LP: #575853
+  * NFSv4: fix delegated locking
+    - LP: #575853
+  * ALSA: hda - add a quirk for Clevo M570U laptop
+    - LP: #575853
+  * ALSA: usb - Fix Oops after usb-midi disconnection
+    - LP: #575853
+  * hwmon: (sht15) Fix sht15_calc_temp interpolation function
+    - LP: #575853
+  * hwmon: (sht15) Properly handle the case CONFIG_REGULATOR=n
+    - LP: #575853
+  * x86/amd-iommu: Use helper function to destroy domain
+    - LP: #575853
+  * x86/amd-iommu: enable iommu before attaching devices
+    - LP: #575853
+  * x86, lib: Add wbinvd smp helpers
+    - LP: #575853
+  * x86, cacheinfo: Fix disabling of L3 cache indices
+    - LP: #575853
+  * intel-agp: Switch to wbinvd_on_all_cpus
+    - LP: #575853
+  * x86, cacheinfo: Add cache index disable sysfs attrs only to L3 caches
+    - LP: #575853
+  * x86, cacheinfo: Calculate L3 indices
+    - LP: #575853
+  * x86, cacheinfo: Remove NUMA dependency, fix for AMD Fam10h rev D1
+    - LP: #575853
+  * x86, cacheinfo: Enable L3 CID only on AMD
+    - LP: #575853
+  * vgaarb: fix "target=default" passing
+    - LP: #575853
+  * x86-32: clean up rwsem inline asm statements
+    - LP: #575853
+  * x86: clean up rwsem type system
+    - LP: #575853
+  * x86-64, rwsem: 64-bit xadd rwsem implementation
+    - LP: #575853
+  * x86-64: support native xadd rwsem implementation
+    - LP: #575853
+  * x86: Fix breakage of UML from the changes in the rwsem system
+    - LP: #575853
+  * x86-64, rwsem: Avoid store forwarding hazard in __downgrade_write
+    - LP: #575853
+  * fix NFS4 handling of mountpoint stat
+    - LP: #575853
+  * dm mpath: fix stall when requeueing io
+    - LP: #575853
+  * quota: Fix possible dq_flags corruption
+    - LP: #575853
+  * Staging: comedi: fix usbdux timeout bug
+    - LP: #483343, #575853
+  * Staging: comedi: usbdux.c: fix locking up of the driver when the comedi
+    ringbuffer runs empty
+    - LP: #483343, #575853
+  * ocfs2: set i_mode on disk during acl operations
+    - LP: #575853
+  * ocfs2: Change bg_chain check for ocfs2_validate_gd_parent.
+    - LP: #575853
+  * 9p: Skip check for mandatory locks when unlocking
+    - LP: #575853
+  * fc class: fail fast bsg requests
+    - LP: #575853
+  * SCSI: add scsi target reset support to scsi ioctl
+    - LP: #575853
+  * PCIe AER: prevent AER injection if hardware masks error reporting
+    - LP: #575853
+  * vgaarb: Fix VGA arbiter to accept PCI domains other than 0
+    - LP: #575853
+  * SCSI: fc-transport: Use packed modifier for fc_bsg_request structure.
+    - LP: #575853
+  * pci: Update pci_set_vga_state() to call arch functions
+    - LP: #575853
+  * PCI: kill off pci_register_set_vga_state() symbol export.
+    - LP: #575853
+  * PCI: fix nested spinlock hang in aer_inject
+    - LP: #575853
+  * IPoIB: Fix TX queue lockup with mixed UD/CM traffic
+    - LP: #575853
+  * x86/PCI: irq and pci_ids patch for Intel Cougar Point DeviceIDs
+    - LP: #575853
+  * ALSA: hda_intel: ALSA HD Audio patch for Intel Cougar Point DeviceIDs
+    - LP: #575853
+  * ALSA: hda - enable snoop for Intel Cougar Point
+    - LP: #575853
+  * ata_piix: IDE Mode SATA patch for Intel Cougar Point DeviceIDs
+    - LP: #575853
+  * ahci: AHCI and RAID mode SATA patch for Intel Cougar Point DeviceIDs
+    - LP: #575853
+  * i2c-i801: Add Intel Cougar Point device IDs
+    - LP: #575853
+  * b43: Remove reset after fatal DMA error
+    - LP: #575853
+  * b43: Allow PIO mode to be selected at module load
+    - LP: #575853
+  * b43: fall back gracefully to PIO mode after fatal DMA errors
+    - LP: #575853
+  * ALSA: hda - Add position_fix quirk for Biostar mobo
+    - LP: #575853
+  * agp/hp: fixup hp agp after ACPI changes
+    - LP: #575853
+  * b43: Optimize PIO scratchbuffer usage
+    - LP: #575853
+  * ecryptfs: fix use with tmpfs by removing d_drop from
+    ecryptfs_destroy_inode
+    - LP: #575853
+  * eCryptfs: Decrypt symlink target for stat size
+    - LP: #575853
+  * ecryptfs: fix error code for missing xattrs in lower fs
+    - LP: #575853
+  * sched: Fix a race between ttwu() and migrate_task()
+    - LP: #575853
+  * USB: cdc-acm: Update to new autopm API
+    - LP: #575853
+  * USB: cdc-acm: Fix stupid NULL pointer in resume()
+    - LP: #575853
+  * iwlwifi: clear all tx queues when firmware ready
+    - LP: #575853
+  * iwlwifi: fix scan race
+    - LP: #575853
+  * e1000e: stop cleaning when we reach tx_ring->next_to_use
+    - LP: #575853
+  * tcp: fix ICMP-RTO war
+    - LP: #575853
+  * perf_events, x86: Implement Intel Westmere/Nehalem-EX support
+    - LP: #575853
+  * Input: wacom - switch mode upon system resume
+    - LP: #575853
+  * md: deal with merge_bvec_fn in component devices better.
+    - LP: #575853
+  * nfsd4: don't try to map gid's in generic rpc code
+    - LP: #575853
+  * nfsd: ensure sockets are closed on error
+    - LP: #575853
+  * ALSA: hda: Set Front Mic to input vref 50% for Lenovo 3000 Y410
+    - LP: #479373, #575853
+  * mac80211: fix deferred hardware scan requests
+    - LP: #575853
+  * fs-writeback: Add helper function to start writeback if idle
+    - LP: #575853
+  * ext4: flush delalloc blocks when space is low
+    - LP: #575853
+  * ext4: fix async i/o writes beyond 4GB to a sparse file
+    - LP: #575853
+  * tpm: autoload tpm_tis based on system PnP IDs
+    - LP: #575853
+  * IB/iser: Rewrite SG handling for RDMA logic
+    - LP: #575853
+  * mptctl : Remove printk which floods unnecessary messages to
+    var/log/message
+    - LP: #575853
+  * mptspi: Fix for incorrect data underrun errata
+    - LP: #575853
+  * sched: Use proper type in sched_getaffinity()
+    - LP: #575853
+  * KVM: SVM: Fix memory leaks that happen when svm_create_vcpu() fails
+    - LP: #575853
+  * KVM: Don't spam kernel log when injecting exceptions due to bad cr
+    writes
+    - LP: #575853
+  * KVM: allow bit 10 to be cleared in MSR_IA32_MC4_CTL
+    - LP: #575853
+  * KVM: VMX: Save/restore rflags.vm correctly in real mode
+    - LP: #575853
+  * KVM: MMU: fix kvm_mmu_zap_page() and its calling path
+    - LP: #575853
+  * KVM: fix the handling of dirty bitmaps to avoid overflows
+    - LP: #575853
+  * KVM: Increase NR_IOBUS_DEVS limit to 200
+    - LP: #575853
+  * KVM: x86: Fix TSS size check for 16-bit tasks
+    - LP: #575853
+  * x86/gart: Disable GART explicitly before initialization
+    - LP: #575853
+  * r8169: clean up my printk uglyness
+    - LP: #562742, #575853
+  * Linux 2.6.32.12
+    - LP: #575853
+  * drm/edid: allow certain bogus edids to hit a fixup path rather than
+    fail
+    - LP: #575853
+  * drm/radeon: add new RS880 pci id
+    - LP: #575853
+  * drm: remove the EDID blob stored in the EDID property when it is
+    disconnected
+    - LP: #575853
+  * drm/radeon/kms: never treat rs4xx as AGP
+    - LP: #575853
+  * drm/radeon/kms: Fix NULL pointer dereference if memory allocation
+    failed in a simple way
+    - LP: #575853
+  * drm/radeon/kms: don't print error on -ERESTARTSYS.
+    - LP: #575853
+  * drm/radeon/kms: fix pal tv-out support on legacy IGP chips
+    - LP: #575853
+  * drm: Return ENODEV if the inode mapping changes
+    - LP: #575853
+  * drm/edid/quirks: Envision EN2028
+    - LP: #575853
+  * drm/radeon: R300 AD only has one quad pipe.
+    - LP: #575853
+  * drm/radeon/kms: fix washed out image on legacy tv dac
+    - LP: #575853
+  * drm/radeon/kms/combios: verify dac_adj values are valid
+    - LP: #575853
+  * drm/i915: Add no_lvds entry for the Clientron U800
+    - LP: #544671, #575853
+  * drm/radeon/kms: more atom parser fixes (v2)
+    - LP: #575853
+  * drm/radeon/kms: disable the tv encoder when tv/cv is not in use
+    - LP: #575853
+  * drm/radeon/kms: fix tv dac conflict resolver
+    - LP: #575853
+  * drm/radeon/kms: fix rs600 tlb flush
+    - LP: #575853
+  * drm/radeon/kms: add FireMV 2400 PCI ID.
+    - LP: #575853
+  * Linux 2.6.32.12+drm33.3
+    - LP: #575853
+  * USB: EHCI: defer reclamation of siTDs
+    - LP: #583414
+  * p54usb: Add usbid for Corega CG-WLUSB2GT.
+    - LP: #583414
+  * md/raid5: allow for more than 2^31 chunks.
+    - LP: #583414
+  * md/raid5: fix previous patch.
+    - LP: #583414
+  * libata: fix locking around blk_abort_request()
+    - LP: #583414
+  * libata: ensure NCQ error result taskfile is fully initialized before
+    returning it via qc->result_tf.
+    - LP: #583414
+  * w1: w1 temp: fix negative termperature calculation
+    - LP: #583414
+  * memcg: fix prepare migration
+    - LP: #583414
+  * mac80211: remove bogus TX agg state assignment
+    - LP: #583414
+  * flex_array: fix the panic when calling flex_array_alloc() without
+    __GFP_ZERO
+    - LP: #583414
+  * core, x86: make LIST_POISON less deadly
+    - LP: #583414
+  * hugetlb: fix infinite loop in get_futex_key() when backed by huge pages
+    - LP: #583414
+  * reiserfs: fix corruption during shrinking of xattrs
+    - LP: #583414
+  * nfsd4: bug in read_buf
+    - LP: #583414
+  * keys: the request_key() syscall should link an existing key to the dest
+    keyring
+    - LP: #583414
+  * staging: usbip: Fix deadlock
+    - LP: #583414
+  * USB: fix remote wakeup settings during system sleep
+    - LP: #583414
+  * USB: Add id for HP ev2210 a.k.a Sierra MC5725 miniPCI-e Cell Modem.
+    - LP: #511066, #583414
+  * USB: fix testing the wrong variable in fs_create_by_name()
+    - LP: #583414
+  * USB: don't choose configs with no interfaces
+    - LP: #583414
+  * USB: OHCI: don't look at the root hub to get the number of ports
+    - LP: #583414
+  * USB: xhci: properly set the "Mult" field of the endpoint context.
+    - LP: #583414
+  * USB: xhci: properly set endpoint context fields for periodic eps.
+    - LP: #583414
+  * procfs: fix tid fdinfo
+    - LP: #583414
+  * ocfs2: Update VFS inode's id info after reflink.
+    - LP: #583414
+  * ocfs2: potential ERR_PTR dereference on error paths
+    - LP: #583414
+  * ocfs2: Compute metaecc for superblocks during online resize.
+    - LP: #583414
+  * ocfs2_dlmfs: Fix math error when reading LVB.
+    - LP: #583414
+  * powernow-k8: Fix frequency reporting
+    - LP: #572348, #583414
+  * nfs d_revalidate() is too trigger-happy with d_drop()
+    - LP: #583414
+  * NFS: rsize and wsize settings ignored on v4 mounts
+    - LP: #583414
+  * Staging: hv: Fix a bug affecting IPv6
+    - LP: #583414
+  * Staging: hv: Fix up memory leak on HvCleanup
+    - LP: #583414
+  * Staging: hv: name network device ethX rather than sethX
+    - LP: #583414
+  * i2c: Fix probing of FSC hardware monitoring chips
+    - LP: #583414
+  * perf: Fix resource leak in failure path of perf_event_open()
+    - LP: #583414
+  * raid6: fix recovery performance regression
+    - LP: #583414
+  * serial: 8250_pnp - add Fujitsu Wacom device
+    - LP: #583414
+  * block: ensure jiffies wrap is handled correctly in
+    blk_rq_timed_out_timer
+    - LP: #583414
+  * dm9601: fix phy/eeprom write routine
+    - LP: #583414
+  * p54pci: fix bugs in p54p_check_tx_ring
+    - LP: #583414
+  * edac, mce: Fix wrong mask and macro usage
+    - LP: #583414
+  * x86-64: Clear a 64-bit FS/GS base on fork if selector is nonzero
+    - LP: #583414
+  * x86: Disable large pages on CPUs with Atom erratum AAE44
+    - LP: #583414
+  * x86, k8 nb: Fix boot crash: enable k8_northbridges unconditionally on
+    AMD systems
+    - LP: #583414
+  * x86, AMD: Fix stale cpuid4_info shared_map data in shared_cpu_map
+    cpumasks
+    - LP: #583414
+  * ALSA: hda: Use LPIB quirk for DG965OT board version AAD63733-203
+    - LP: #459083, #583414
+  * ALSA: hda - Add PCI quirk for HP dv6-1110ax.
+    - LP: #583414
+  * ALSA: hda: Use STAC_DELL_M6_BOTH quirk for Dell Studio XPS 1645
+    - LP: #553002, #583414
+  * ALSA: hda: Use STAC_DELL_M6_BOTH quirk for Dell Studio 1558
+    - LP: #568600, #583414
+  * ALSA: hda: Use ALC880_F1734 quirk for Fujitsu Siemens AMILO Xi 1526
+    - LP: #567494, #583414
+  * ALSA: snd-meastro3: Add amp_gpio quirk for Compaq EVO N600C
+    - LP: #583414
+  * ALSA: snd-meastro3: Ignore spurious HV interrupts during suspend /
+    resume
+    - LP: #583414
+  * ALSA: hda: Fix max PCM level to 0 dB for Fujitsu-Siemens laptops using
+    CX20549 (Venice)
+    - LP: #583414
+  * ALSA: hda: Fix 0 dB for Packard Bell models using Conexant CX20549
+    (Venice)
+    - LP: #541802, #583414
+  * ALSA: hda: Use olpc-xo-1_5 quirk for Toshiba Satellite Pro T130-15F
+    - LP: #573284, #583414
+  * ALSA: hda: Use olpc-xo-1_5 quirk for Toshiba Satellite
+    P500-PSPGSC-01800T
+    - LP: #549267, #583414
+  * libata: Fix accesses at LBA28 boundary (old bug, but nasty) (v2)
+    - LP: #583414
+  * ext4: correctly calculate number of blocks for fiemap
+    - LP: #474597, #583414
+  * initramfs: handle unrecognised decompressor when unpacking
+    - LP: #583414
+  * CRED: Fix a race in creds_are_invalid() in credentials debugging
+    - LP: #583414
+  * jfs: fix diAllocExt error in resizing filesystem
+    - LP: #583414
+  * ACPI: introduce kernel parameter acpi_sleep=sci_force_enable
+    - LP: #553498, #583414
+  * p54pci: rx frame length check
+    - LP: #583414
+  * drivers/net/wireless/p54/txrx.c Fix off by one error
+    - LP: #583414
+  * dccp_probe: Fix module load dependencies between dccp and dccp_probe
+    - LP: #583414
+  * KVM: remove unused load_segment_descriptor_to_kvm_desct
+    - LP: #583414
+  * kgdb: don't needlessly skip PAGE_USER test for Fsl booke
+    - LP: #583414
+  * r8169: use correct barrier between cacheable and non-cacheable memory
+    - LP: #562742, #583414
+  * r8169: fix broken register writes
+    - LP: #562742, #583414
+  * r8169: more broken register writes workaround
+    - LP: #562742, #583414
+  * PCI: Ensure we re-enable devices on resume
+    - LP: #566149, #583414
+  * skip sense logging for some ATA PASS-THROUGH cdbs
+    - LP: #583128, #583414
+  * tg3: Fix INTx fallback when MSI fails
+    - LP: #583414
+  * xfs: add a shrinker to background inode reclaim
+    - LP: #583414
+  * qla2xxx: Properly handle UNDERRUN completion statuses.
+    - LP: #583414
+  * bnx2: Fix lost MSI-X problem on 5709 NICs.
+    - LP: #583414
+  * tracing: Fix ftrace_event_call alignment for use with gcc 4.5
+    - LP: #583414
+  * security: testing the wrong variable in create_by_name()
+    - LP: #583414
+  * md: restore ability of spare drives to spin down.
+    - LP: #583414
+  * virtio: initialize earlier
+    - LP: #583414
+  * md/raid6: Fix raid-6 read-error correction in degraded state
+    - LP: #583414
+  * V4L/DVB: budget: Oops: "BUG: unable to handle kernel NULL pointer
+    dereference"
+    - LP: #583414
+  * ACPI: DMI init_set_sci_en_on_resume for multiple Lenovo ThinkPads
+    - LP: #583414
+  * power_meter: acpi_device_class "power_meter_resource" too long
+    - LP: #583414
+  * ACPI: sleep: init_set_sci_en_on_resume for Dell Studio 155x
+    - LP: #553498, #583414
+  * cpuidle: Fix incorrect optimization
+    - LP: #583414
+  * pxa/colibri: fix missing #include <mach/mfp.h> in colibri.h
+    - LP: #583414
+  * SCSI: fix locking around blk_abort_request()
+    - LP: #583414
+  * SCSI: libiscsi: regression: fix header digest errors
+    - LP: #583414
+  * scsi_debug: virtual_gb ignores sector_size
+    - LP: #583414
+  * Enable retries for SYNCRONIZE_CACHE commands to fix I/O error
+    - LP: #583414
+  * SCSI: Retry commands with UNIT_ATTENTION sense codes to fix ext3/ext4
+    I/O error
+    - LP: #583414
+  * MIPS: Sibyte: Apply M3 workaround only on affected chip types and
+    versions.
+    - LP: #583414
+  * Linux 2.6.32.13
+    - LP: #583414
+  * drm/i915: Add initial bits for VGA modesetting bringup on Sandybridge.
+    - LP: #583414
+  * drm/i915: fix tiling limits for i915 class hw v2
+    - LP: #583414
+  * Linux 2.6.32.13+drm33.4
+    - LP: #583414
+  * (pre-stable) Input: psmouse - reset all types of mice before
+    reconnecting
+    - LP: #551234
+  * ipv4: udp: fix short packet and bad checksum logging
+    - LP: #588832
+  * hp_accel: fix race in device removal
+    - LP: #588832
+  * fbdev: bfin-t350mcqb-fb: fix fbmem allocation with blanking lines
+    - LP: #588832
+  * hugetlbfs: kill applications that use MAP_NORESERVE with SIGBUS instead
+    of OOM-killer
+    - LP: #588832
+  * dma-mapping: fix dma_sync_single_range_*
+    - LP: #588832
+  * ACPI: sleep: eliminate duplicate entries in acpisleep_dmi_table[]
+    - LP: #588832
+  * mmc: atmel-mci: fix two parameters swapped
+    - LP: #588832
+  * mmc: atmel-mci: prevent kernel oops while removing card
+    - LP: #588832
+  * mmc: atmel-mci: remove data error interrupt after xfer
+    - LP: #588832
+  * ptrace: fix return value of do_syscall_trace_enter()
+    - LP: #588832
+  * powerpc/perf_event: Fix oops due to perf_event_do_pending call
+    - LP: #588832
+  * cifs: guard against hardlinking directories
+    - LP: #588832
+  * serial: imx.c: fix CTS trigger level lower to avoid lost chars
+    - LP: #588832
+  * ALSA: ice1724 - Fix ESI Maya44 capture source control
+    - LP: #588832
+  * ALSA: hda: Fix 0 dB for Lenovo models using Conexant CX20549 (Venice)
+    - LP: #588832
+  * inotify: race use after free/double free in inotify inode marks
+    - LP: #588832
+  * inotify: don't leak user struct on inotify release
+    - LP: #588832
+  * profile: fix stats and data leakage
+    - LP: #588832
+  * x86, k8: Fix build error when K8_NB is disabled
+    - LP: #588832
+  * x86, cacheinfo: Turn off L3 cache index disable feature in virtualized
+    environments
+    - LP: #588832
+  * x86, amd: Check X86_FEATURE_OSVW bit before accessing OSVW MSRs
+    - LP: #588832
+  * Btrfs: check for read permission on src file in the clone ioctl
+    - LP: #588832
+  * ALSA: hda - New Intel HDA controller
+    - LP: #588832
+  * proc: partially revert "procfs: provide stack information for threads"
+    - LP: #588832
+  * revert "procfs: provide stack information for threads" and its fixup
+    commits
+    - LP: #588832
+  * iwlwifi: clear all the stop_queue flag after load firmware
+    - LP: #588832
+  * p54: disable channels with incomplete calibration data sets
+    - LP: #588832
+  * CacheFiles: Fix error handling in cachefiles_determine_cache_security()
+    - LP: #588832
+  * megaraid_sas: fix for 32bit apps
+    - LP: #588832
+  * mmap_min_addr check CAP_SYS_RAWIO only for write
+    - LP: #588832
+  * nilfs2: fix sync silent failure
+    - LP: #588832
+  * crypto: authenc - Add EINPROGRESS check
+    - LP: #588832
+  * Linux 2.6.32.14
+    - LP: #588832
+  * drm/i915: use PIPE_CONTROL instruction on Ironlake and Sandy Bridge
+    - LP: #588832
+  * drm/i915: fix non-Ironlake 965 class crashes
+    - LP: #588832
+  * drm/i915: Disable FBC on 915GM and 945GM.
+    - LP: #492392, #588832
+  * Linux 2.6.32.14+drm33.5
+    - LP: #588832
+  * Linux 2.6.32.15+drm33.5
+    - LP: #588832
+  * HID: remove MODULE_VERSION from new drivers
+    - LP: #583531
+  * HID: fix N-trig touch panel with recent firmware
+    - LP: #583531
+  * HID: ntrig: explain firmware quirk
+    - LP: #583531
+  * HID: ntrig: Emit TOUCH with DOUBLETAP for single touch
+    - LP: #583531
+  * HID: ntrig: TipSwitch for single touch mode touch.
+    - LP: #583531
+  * HID: ntrig: Remove unused macro, TripleTap and QuadTap
+    - LP: #583531
+  * (pre-stable) drm/radeon/kms: initialize set_surface_reg reg for rs600
+    asic
+    - LP: #544590
+
+ -- Stefan Bader <stefan.bader@canonical.com>  Wed, 09 Jun 2010 17:01:09 +0200
+
+linux (2.6.32-22.36) lucid-security; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * Revert "kvm: restrict writing of segment selectors to segment
+    registers"
+    - LP: #589223
+
+ -- Andy Whitcroft <apw@canonical.com>  Thu, 03 Jun 2010 17:11:27 +0100
+
+linux (2.6.32-22.35) lucid-security; urgency=low
+
+  [ Leann Ogasawara ]
+
+  * kvm: restrict writing of segment selectors to segment registers
+    - CVE-2010-0419
+
+  [ Upstream Kernel Changes ]
+
+  * tty: release_one_tty() forgets to put pids
+    - CVE-2010-1162
+  * oom: fix the unsafe usage of badness() in proc_oom_score()
+    - CVE-2010-1488
+  * Attempt #2 to handle null nameidata
+    - CVE-2010-1148
+  * reiserfs: fix permissions on .reiserfs_priv
+    - CVE-2010-1146
+  * r8169: offical fix for CVE-2009-4537 (overlength frame DMAs)
+    - CVE-2009-4537
+
+ -- Stefan Bader <stefan.bader@canonical.com>  Tue, 01 Jun 2010 11:44:28 +0200
+
+linux (2.6.32-22.33) lucid-proposed; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * SAUCE: ACPI: EC: Allow multibyte access to EC (v3)
+    - LP: #526354
+
+  [ Tim Gardner ]
+
+  * ubuntu: rtl8192se -- update to version 0015.0127.2010
+    - LP: #567016
+
+ -- Andy Whitcroft <apw@canonical.com>  Mon, 19 Apr 2010 11:06:35 +0100
+
+linux (2.6.32-21.32) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * SAUCE: i915 KMS -- support disabling KMS for known broken devices
+    - LP: #563277
+  * SAUCE: i915 KMS -- blacklist i830
+    - LP: #542208, #563277
+  * SAUCE: i915 KMS -- blacklist i845g
+    - LP: #541492, #563277
+  * SAUCE: i915 KMS -- blacklist i855
+    - LP: #511001, #541511, #563277
+  * SAUCE: radeon KMS -- support disabling KMS for known broken devices
+    - LP: #546743
+  * SAUCE: radeon KMS -- blacklist ES1000
+    - LP: #546743
+
+ -- Andy Whitcroft <apw@canonical.com>  Thu, 15 Apr 2010 17:18:49 +0100
+
+linux (2.6.32-21.31) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * allow modules.builtin to be optional
+  * d-i: add mpt2sas to the message-modules udeb
+    - LP: #530361
+
+  [ Christopher James Halse Rogers ]
+
+  * SAUCE: Nouveau: Add quirk framework to disable acceleration
+    - LP: #544088, #546393
+  * SAUCE: Nouveau: Disable acceleration on MacBook Pros
+    - LP: #546393
+  * SAUCE: Nouveau: Disable acceleration on GeForce3 cards
+    - LP: #544088
+  * SAUCE: Nouveau: Disable acceleration on 6100 cards
+    - LP: #542950
+
+  [ Stefan Bader ]
+
+  * SAUCE: dma-mapping: Remove WARN_ON in dma_free_coherent
+    - LP: #458201
+
+  [ Surbhi Palande ]
+
+  * SAUCE: sync before umount to reduce time taken by ext4 umount
+    - LP: #543617
+
+  [ Upstream Kernel Changes ]
+
+  * tipc: Fix oops on send prior to entering networked mode (v3)
+    - CVE-2010-1187
+  * KVM: x86 emulator: Add Virtual-8086 mode of emulation
+    - LP: #561425
+  * KVM: x86 emulator: fix memory access during x86 emulation
+    - LP: #561425
+  * KVM: x86 emulator: Check IOPL level during io instruction emulation
+    - LP: #561425
+  * KVM: x86 emulator: Fix popf emulation
+    - LP: #561425
+  * KVM: Fix segment descriptor loading
+    - LP: #561425
+  * KVM: VMX: Update instruction length on intercepted BP
+    - LP: #561425
+  * KVM: VMX: Use macros instead of hex value on cr0 initialization
+    - LP: #561425
+  * KVM: SVM: Reset cr0 properly on vcpu reset
+    - LP: #561425
+  * KVM: VMX: Disable unrestricted guest when EPT disabled
+    - LP: #561425
+  * KVM: x86: disable paravirt mmu reporting
+    - LP: #561425
+  * AppArmor: Fix put of unassigned ns if aa_unpack fails
+  * AppArmor: Fix refcount bug when exec fails
+    - LP: #562063
+  * AppArmor: Take refcount on cxt->profile to ensure it remains a valid
+    reference
+    - LP: #367499
+  * AppArmor: fix typo in scrubbing environment variable warning
+    - LP: #562060
+  * AppArmor: fix regression by setting default to mediate deleted files
+    - LP: #562056
+  * AppArmor: fix refcount order bug that can trigger during replacement
+    - LP: #367499
+  * AppArmor: Make sure to unmap aliases for vmalloced dfas before they are
+    live
+    - LP: #529288
+  * AppArmor: address performance regression of replaced profile
+    - LP: #549428
+  * AppArmor: make the global side the correct type
+    - LP: #562047
+  * AppArmor: use the kernel shared workqueue to free vmalloc'ed dfas
+  * sky2: add register definitions for new chips
+    - LP: #537168
+  * sky2: 88E8059 support
+    - LP: #537168
+  * net: Fix Yukon-2 Optima TCP offload setup
+    - LP: #537168
+  * net: Add missing TST_CFG_WRITE bits around sky2_pci_write
+    - LP: #537168
+  * sky2: print Optima chip name
+    - LP: #537168
+  * (Upstream) dell-laptop: defer dell_rfkill_update to worker thread
+    - LP: #555261
+  * drm/nv40: add LVDS table quirk for Dell Latitude D620
+    - LP: #539730
+
+ -- Andy Whitcroft <apw@canonical.com>  Tue, 13 Apr 2010 18:50:58 +0100
+
+linux (2.6.32-20.30) lucid; urgency=low
+
+  [ Upstream Kernel Changes ]
+
+  * Revert "(pre-stable) ACPI: EC: Allow multibyte access to EC"
+    - LP: #561151
+
+ -- Andy Whitcroft <apw@canonical.com>  Mon, 12 Apr 2010 15:46:31 +0100
+
+linux (2.6.32-20.29) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * Revert "SAUCE: Use MODULE_IMPORT macro to tie intel_agp to i915"
+    - LP: #542251
+  * add Breaks: against hardy lvm2
+    - LP: #528155
+
+  [ Colin Watson ]
+
+  * d-i -- enable udebs for generic-pae
+    - LP: #160366
+
+  [ Stefan Bader ]
+
+  * [Config] Add xen netboot support
+    - LP: #160366
+
+  [ Takashi Iwai ]
+
+  * (pre-stable): input: Support Clickpad devices in ClickZone mode
+    - LP: #516329
+
+  [ Upstream Kernel Changes ]
+
+  * Revert "(pre-stable) Bluetooth: Fix sleeping function in RFCOMM within
+    invalid context"
+    - LP: #553837
+  * Revert "(pre-stable) USB: fix usbfs regression"
+    - LP: #553837
+  * Revert "(pre-stable) softlockup: Stop spurious softlockup messages due
+    to overflow"
+    - LP: #553837
+  * Revert "(pre-stable) drm/nouveau: report unknown connector state if lid
+    closed"
+    - LP: #553837
+  * drivers/scsi/ses.c: eliminate double free
+    - LP: #553837
+  * decompress: fix new decompressor for PIC
+    - LP: #553837
+  * ARM: Fix decompressor's kernel size estimation for ROM=y
+    - LP: #553837
+  * MIPS: Cleanup forgotten label_module_alloc in tlbex.c
+    - LP: #553837
+  * tg3: Fix tg3_poll_controller() passing wrong pointer to tg3_interrupt()
+    - LP: #553837
+  * tg3: Fix 5906 transmit hangs
+    - LP: #553837
+  * ALSA: hda - Fix input source elements of secondary ADCs on Realtek
+    - LP: #553837
+  * ALSA: hda: enable MSI for Gateway M-6866
+    - LP: #538918, #553837
+  * timekeeping: Prevent oops when GENERIC_TIME=n
+    - LP: #553837
+  * Input: alps - add support for the touchpad on Toshiba Tecra A11-11L
+    - LP: #553837
+  * Input: i8042 - add ALDI/MEDION netbook E1222 to qurik reset table
+    - LP: #553837
+  * i2c-i801: Don't use the block buffer for I2C block writes
+    - LP: #553837
+  * ath5k: dont use external sleep clock in AP mode
+    - LP: #553837
+  * ath5k: fix setup for CAB queue
+    - LP: #553837
+  * ring-buffer: Move disabled check into preempt disable section
+    - LP: #553837
+  * function-graph: Init curr_ret_stack with ret_stack
+    - LP: #553837
+  * Bluetooth: Fix sleeping function in RFCOMM within invalid context
+    - LP: #553837
+  * tracing: Use same local variable when resetting the ring buffer
+    - LP: #553837
+  * tracing: Disable buffer switching when starting or stopping trace
+    - LP: #553837
+  * tracing: Do not record user stack trace from NMI context
+    - LP: #553837
+  * PCI: unconditionally clear AER uncorr status register during cleanup
+    - LP: #553837
+  * efifb: fix framebuffer handoff
+    - LP: #553837
+  * coredump: suppress uid comparison test if core output files are pipes
+    - LP: #553837
+  * V4L/DVB (13961): em28xx-dvb: fix memleak in dvb_fini()
+    - LP: #553837
+  * hrtimer: Tune hrtimer_interrupt hang logic
+    - LP: #553837
+  * x86, apic: Don't use logical-flat mode when CPU hotplug may exceed 8
+    CPUs
+    - LP: #553837
+  * mvsas: add support for Adaptec ASC-1045/1405 SAS/SATA HBA
+    - LP: #553837
+  * pci: add support for 82576NS serdes to existing SR-IOV quirk
+    - LP: #553837
+  * sched: Mark boot-cpu active before smp_init()
+    - LP: #553837
+  * sparc64: Make prom entry spinlock NMI safe.
+    - LP: #553837
+  * sysctl: require CAP_SYS_RAWIO to set mmap_min_addr
+    - LP: #553837
+  * e1000e: enable new 82567V-3 device
+    - LP: #553837
+  * ixgbe: add support for 82599 KR device 0x1517
+    - LP: #553837
+  * ath9k: fix lockdep warning when unloading module
+    - LP: #553837
+  * mqueue: fix mq_open() file descriptor leak on user-space processes
+    - LP: #553837
+  * virtio: fix out of range array access
+    - LP: #553837
+  * sched: Fix SCHED_MC regression caused by change in sched cpu_power
+    - LP: #553837
+  * readahead: add blk_run_backing_dev
+    - LP: #553837
+  * ALSA: hda: Use LPIB and 6stack-dig for eMachines T5212
+    - LP: #538895, #553837
+  * ALSA: hda - Disable MSI for Nvidia controller
+    - LP: #553837
+  * ALSA: hda - Fix secondary ADC of ALC260 basic model
+    - LP: #553837
+  * ALSA: hda: Fix 0 dB offset for HP laptops using CX20551 (Waikiki)
+    - LP: #420578, #553837
+  * ALSA: cmipci: work around invalid PCM pointer
+    - LP: #553837
+  * gigaset: correct clearing of at_state strings on RING
+    - LP: #553837
+  * gigaset: prune use of tty_buffer_request_room
+    - LP: #553837
+  * perf: Make the install relative to DESTDIR if specified
+    - LP: #553837
+  * perf_event: Fix oops triggered by cpu offline/online
+    - LP: #553837
+  * tmpfs: fix oops on mounts with mpol=default
+    - LP: #553837
+  * tmpfs: mpol=bind:0 don't cause mount error.
+    - LP: #553837
+  * tmpfs: handle MPOL_LOCAL mount option properly
+    - LP: #553837
+  * tmpfs: cleanup mpol_parse_str()
+    - LP: #553837
+  * doc: add the documentation for mpol=local
+    - LP: #553837
+  * SCSI: scsi_transport_fc: Fix synchronization issue while deleting vport
+    - LP: #553837
+  * NFSv4: Don't ignore the NFS_INO_REVAL_FORCED flag in
+    nfs_revalidate_inode()
+    - LP: #553837
+  * NFS: Avoid a deadlock in nfs_release_page
+    - LP: #553837
+  * NFS: Prevent another deadlock in nfs_release_page()
+    - LP: #553837
+  * tty: Keep the default buffering to sub-page units
+    - LP: #553837
+  * tty: Take a 256 byte padding into account when buffering below sub-page
+    units
+    - LP: #553837
+  * USB: fix usbfs regression
+    - LP: #553837
+  * USB: EHCI: fix ITD list order
+    - LP: #553837
+  * USB: EHCI: adjust ehci_iso_stream for changes in ehci_qh
+    - LP: #553837
+  * USB: qcserial: add new device ids
+    - LP: #553837
+  * USB: xHCI: re-initialize cmd_completion
+    - LP: #553837
+  * USB: serial: ftdi: add CONTEC vendor and product id
+    - LP: #553837
+  * USB: option: fix incorrect manufacturer name in usb/serial/option:
+    MAXON->CMOTECH
+    - LP: #553837
+  * USB: option: move hardcoded PID to a macro in usb/serial/option
+    - LP: #553837
+  * USB: option: add support for a new CMOTECH device to usb/serial/option
+    - LP: #553837
+  * usb: r8a66597-hcd: fix removed from an attached hub
+    - LP: #553837
+  * wl1251: fix potential crash
+    - LP: #553837
+  * jme: Fix VLAN memory leak
+    - LP: #553837
+  * jme: Protect vlgrp structure by pause RX actions.
+    - LP: #553837
+  * edac, mce: Filter out invalid values
+    - LP: #553837
+  * iwlwifi: use dma_alloc_coherent
+    - LP: #553837
+  * iwlwifi: Silence tfds_in_queue message
+    - LP: #553837
+  * SUNRPC: Fix a potential memory leak in auth_gss
+    - LP: #553837
+  * sunrpc: handle allocation errors from __rpc_lookup_create()
+    - LP: #553837
+  * if_tunnel.h: add missing ams/byteorder.h include
+    - LP: #553837
+  * fs/partitions/msdos: add support for large disks
+    - LP: #553837
+  * fs/partition/msdos: fix unusable extended partition for > 512B sector
+    - LP: #553837
+  * PCI: fix return value from pcix_get_max_mmrbc()
+    - LP: #553837
+  * PCI: fix access of PCI_X_CMD by pcix get and set mmrbc functions
+    - LP: #553837
+  * PCI: cleanup error return for pcix get and set mmrbc functions
+    - LP: #553837
+  * rt2860sta: Fix argument to linux_pci_unmap_single()
+    - LP: #553837
+  * ath9k: fix BUG_ON triggered by PAE frames
+    - LP: #553837
+  * cpuset: fix the problem that cpuset_mem_spread_node() returns an
+    offline node
+    - LP: #553837
+  * softlockup: Stop spurious softlockup messages due to overflow
+    - LP: #553837
+  * netfilter: xt_recent: fix regression in rules using a zero hit_count
+    - LP: #553837
+  * x86: Fix placement of FIX_OHCI1394_BASE
+    - LP: #553837
+  * x86, amd: Restrict usage of c1e_idle()
+    - LP: #553837
+  * hwmon: (coretemp) Add missing newline to dev_warn() message
+    - LP: #553837
+  * ALSA: hda: Use LPIB for ga-ma770-ud3 board
+    - LP: #553837
+  * ALSA: ac97: Add Toshiba P500 to ac97 jack sense blacklist
+    - LP: #481058, #553837
+  * ALSA: ac97: Add IBM ThinkPad R40e to Headphone/Line Jack Sense
+    blacklist
+    - LP: #303789, #553837
+  * ALSA: hda: Use ALC260_WILL quirk for another Acer model (0x1025007f)
+    - LP: #418627, #553837
+  * ath9k: Enable TIM timer interrupt only when needed.
+    - LP: #553837
+  * mac80211: Retry null data frame for power save
+    - LP: #553837
+  * ath9k: Enable IEEE80211_HW_REPORTS_TX_ACK_STATUS flag for ath9k
+    - LP: #553837
+  * mac80211: Reset dynamic ps timer in Rx path.
+    - LP: #553837
+  * leds-gpio: fix default state handling on OF platforms
+    - LP: #553837
+  * quota: manage reserved space when quota is not active [v2]
+    - LP: #553837
+  * quota: Fix warning when a delayed write happens before quota is enabled
+    - LP: #553837
+  * ahci: use BIOS date in broken_suspend list
+    - LP: #553837
+  * Bluetooth: Fix potential bad memory access with sysfs files
+    - LP: #553837
+  * Bluetooth: Fix kernel crash on L2CAP stress tests
+    - LP: #553837
+  * sh: Fix zImage boot using fixed PMB.
+    - LP: #553837
+  * b43: Workaround circular locking in hw-tkip key update callback
+    - LP: #553837
+  * block: Backport of various I/O topology fixes from 2.6.33 and 2.6.34
+    - LP: #553837
+  * s3cmci: initialize default platform data no_wprotect and no_detect with
+    1
+    - LP: #553837
+  * x86: Fix sched_clock_cpu for systems with unsynchronized TSC
+    - LP: #553837
+  * GFS2: Skip check for mandatory locks when unlocking
+    - LP: #553837
+  * Linux 2.6.32.11
+    - LP: #553837
+  * drm/i915: fix small leak on overlay error path
+    - LP: #553837
+  * drm/i915: Avoid NULL deref in get_pages() unwind after error.
+    - LP: #553837
+  * drm/nouveau: report unknown connector state if lid closed
+    - LP: #553837
+  * Linux-2.6.32.11+drm33.2
+    - LP: #553837
+  * mmc: add module parameter to set whether cards are assumed removable
+    - LP: #477106
+  * (pre-stable) ACPI: EC: Allow multibyte access to EC
+    - LP: #526354
+  * PCI quirks: disable msi on AMD rs4xx internal gfx bridges
+    - LP: #509273
+  * drm/i915: Add dependency on the intel agp module
+    - LP: #542251
+  * (pre-stable) drm/edid: allow certain bogus edids to hit a fixup path
+    rather than fail
+    - LP: #540632
+  * drm/radeon/kms: rework pll algo selection
+    - LP: #538377
+  * drm/radeon/kms: update new pll algo
+    - LP: #538377
+  * PCI quirk: Disable MSI on VIA K8T890 systems
+    - LP: #544741
+  * sched: update load count only once per cpu in 10 tick update window
+    - LP: #513848
+
+ -- Andy Whitcroft <apw@canonical.com>  Fri, 09 Apr 2010 17:44:41 +0100
+
+linux (2.6.32-19.28) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * [Config] enable various multitouch devices
+    - LP: #541453
+
+  [ Chase Douglas ]
+
+  * (pre-stable): input: ALPS - Add signature for HP Pavilion dm3 laptops
+    - LP: #545307
+  * SAUCE: Disable function tracing after hitting __schedule_bug
+  * SAUCE: Reduce ACPI resource conflict message to KERN_INFO, printf
+    cleanup
+    - LP: #440470
+
+  [ Jesse Barnes ]
+
+  * SAUCE: drm/i915: don't change DRM configuration when releasing load
+    detect pipe
+    - LP: #488328
+
+  [ John Johansen ]
+
+  * SAUCE: AppArmor: Remove null_profile's use of PFLAG_NO_LIST_REF
+    - LP: #539437
+  * SAUCE: AppArmor: Stop page allocation warnings that can occur on policy
+    load
+    - LP: #458299
+  * SAUCE: AppArmor: Return string len rather than the allocation size
+    - LP: #551844
+  * SAUCE: AppArmor: Fix oops in profile verification if profile unpack
+    fails.
+
+  [ Luke Yelavich ]
+
+  * [Config] Enable Nouveau DRM module on powerpc
+
+  [ Stefan Bader ]
+
+  * SAUCE: Pull in thinkpad-acpi from v2.6.34-rc1
+    - LP: #357673
+  * [Config] Enable thinkpad-acpi ALSA volume control
+    - LP: #357673
+
+  [ Steve Conklin ]
+
+  * SAUCE: drm/i915: Disable FBC on 915GM and 945GM
+    - LP: #492392, #539609
+
+  [ Upstream Kernel Changes ]
+
+  * Revert "(pre-stable) drm/i915: blacklist lid status: Sony VGN-BX196VP,
+    Dell Inspiron 700m"
+    - LP: #515246
+  * (pre-stable) softlockup: Stop spurious softlockup messages due to
+    overflow
+    - LP: #551068
+  * backlight: mbp_nvidia_bl - add five more MacBook variants
+    - LP: #511965
+  * drm/nv04-nv40: Fix up the programmed horizontal sync pulse delay.
+    - LP: #529130
+  * drm/nouveau: Fix fbcon corruption with font width not divisible by 8
+    - LP: #544739
+  * (pre-stable) USB: fix usbfs regression
+  * drm/radeon/bo: add some fallback placements for VRAM only objects.
+    - LP: #507148
+  * drm/radeon/kms: don't print error on -ERESTARTSYS.
+    - LP: #507148
+  * Input: add the ABS_MT_PRESSURE event
+    - LP: #541453
+  * HID: Support for 3M multitouch panel
+    - LP: #541453
+  * HID: make 3M PCT touchscreen driver standalone config option
+    - LP: #541453
+  * HID: add support for Stantum multitouch panel
+    - LP: #541453
+  * HID: make Stantum driver standalone config option
+    - LP: #541453
+  * HID: add support for Acer T230H multitouch
+    - LP: #541453
+  * HID: add support for Pixart Imaging Optical Touch Screen
+    - LP: #541453
+  * HID: fixed bug in single-touch emulation on the stantum panel
+    - LP: #541453
+  * HID: add pressure support for the Stantum multitouch panel
+    - LP: #541453
+  * HID: Support for MosArt multitouch panel
+    - LP: #541453
+  * HID: hid-ntrig add multi input quirk and clean up
+    - LP: #541453
+  * HID: n-trig: remove unnecessary tool switching
+    - LP: #541453
+  * HID: hid-ntrig: multitouch cleanup and fix
+    - LP: #541453
+  * HID: hid-ntrig: Single touch mode tap
+    - LP: #541453
+  * hid: ntrig touch events
+    - LP: #541453
+  * (pre-stable) x86-32, resume: do a global tlb flush in S4 resume
+    - LP: #531309
+  * drm/i915: Part of: Add initial bits for VGA modesetting bringup on
+    Sandybridge.
+    - LP: #515246
+  * drm/i915: Stop trying to use ACPI lid status to determine LVDS
+    connection.
+    - LP: #515246
+
+ -- Andy Whitcroft <apw@canonical.com>  Wed, 31 Mar 2010 15:14:32 +0100
+
+linux (2.6.32-18.27) lucid; urgency=low
+
+  [ Chase Douglas ]
+
+  * SAUCE: Don't register vga16fb framebuffer if other framebuffers are
+    present
+    - LP: #527369
+
+  [ Loïc Minier ]
+
+  * [Config] armel/versatile: Set CRAMFS=m
+    - LP: #524893
+  * [Config] armel: Reset default command-line
+    - LP: #524893
+
+  [ Stefan Bader ]
+
+  * build/modules: Update d-i to reflect recent config changes
+    - LP: #546929
+
+  [ Upstream Kernel Changes ]
+
+  * (pre-stable) drm/nouveau: report unknown connector state if lid closed
+    - LP: #523072
+  * (pre-stable) Staging: rt2870: Add USB ID for Buffalo Airstation
+    WLI-UC-GN
+    - LP: #441990
+  * (pre-stable) iwlwifi: fix nfreed--
+    - LP: #545585
+  * (pre-stable) pata_via: Add VIA VX900 support
+    - LP: #548675
+
+ -- Stefan Bader <stefan.bader@canonical.com>  Fri, 26 Mar 2010 18:39:42 +0100
+
+linux (2.6.32-17.26) lucid; urgency=low
+
+  [ Amit Kucheria ]
+
+  * [Config] SECURITY_FILE_CAPABILITIES dissapeared in 2.6.33
+
+  [ Andy Whitcroft ]
+
+  * rules -- allow architecture configurations to be missing
+  * SAUCE: cdrom -- default to not locking the tray when in use
+    - LP: #397734
+  * expose the kernel EXTRAVERSION in dmesg and /proc/version_signature
+  * record the drm version in EXTRAVERSION
+  * linux-tools -- pull out the perf binary into a binary package
+  * [Config] enable MMIOTRACE for graphics debugging
+  * [Config] enable BLK_DEV_BSG
+  * debian -- fix builds when tools are disabled
+  * allow us to build default configs for automated builds
+  * config -- allow locally specified configuration overrides
+  * [Config] de-modularise PATA disk controllers
+  * [Config] de-modularise SATA disk controllers
+
+  [ Stefan Bader ]
+
+  * Revert "SAUCE: (pre-stable) netfilter: xt_recent: fix buffer overflow"
+    - LP: #540231
+  * Revert "SAUCE: (pre-stable) netfilter: xt_recent: fix false match"
+    - LP: #540231
+  * [Config] Update configs for 2.6.32.10
+    - LP: #540231
+
+  [ Tim Gardner ]
+
+  * [Config] Add vmw_pvscsi and vmxnet3 to -virtual flavour
+    - LP: #531017
+  * SAUCE: igb: Supress an upstream compiler complaint
+  * [Config] Fix sub-flavours package conflicts
+    - LP: #454827
+
+  [ Upstream Kernel Changes ]
+
+  * Revert "tpm_tis: TPM_STS_DATA_EXPECT workaround"
+    - LP: #540231
+  * Revert "(pre-stable) sched: Fix SMT scheduler regression in
+    find_busiest_queue()"
+    - LP: #540231
+  * (pre-stable) Bluetooth: Fix sleeping function in RFCOMM within invalid
+    context
+    - LP: #534549
+  * igb: remove unused temp variable from stats clearing path
+  * igb: update comments for serdes config and update to handle duplex
+  * igb: update the approach taken to acquiring and releasing the phy lock
+  * igb: add locking to reads of the i2c interface
+  * igb: add combined function for setting rar and pool bits
+  * igb: make use of the uta to allow for promiscous mode filter
+  * igb: add support for 82576NS SerDes adapter
+  * igb: add function to handle mailbox lock
+  * igb: fix a few items where weren't correctly setup for mbx timeout
+  * igb: change how we handle alternate mac addresses
+  * igb: remove microwire support from igb
+  * igb: move the generic copper link setup code into e1000_phy.c
+  * igb: add code to retry a phy read in the event of failure on link check
+  * igb: add additional error handling to the phy code
+  * igb: add flushes between RAR writes when setting mac address
+  * igb: Use the instance of net_device_stats from net_device.
+  * igb: Fix erroneous display of stats by ethtool -S
+  * igb: add new data structure for handling interrupts and NAPI
+  * igb: remove rx checksum good counter
+  * igb: increase minimum rx buffer size to 1K
+  * igb: move the tx and rx ring specific config into seperate functions
+  * igb: remove rx_ps_hdr_len
+  * igb: move SRRCTL register configuration into ring specific config
+  * igb: change the head and tail offsets into pointers
+  * igb: add pci device pointer to ring structure
+  * igb: move rx_buffer_len into the ring structure
+  * igb: move alloc_failed and csum_err stats into per rx-ring stat
+  * igb: add a flags value to the ring
+  * igb: place a pointer to the netdev struct in the ring itself
+  * igb: move the multiple receive queue configuration into seperate
+    function
+  * igb: delay VF reset notification until after interrupts are enabed
+  * igb: setup vlan tag replication stripping in igb_vmm_control
+  * igb: re-use ring configuration code in ethtool testing
+  * igb: make tx ring map and free functionality non-static
+  * igb: make ethtool use core xmit map and free functionality
+  * igb: add single vector msi-x testing to interrupt test
+  * igb: cleanup "todo" code found in igb_ethtool.c
+  * igb: add support for seperate tx-usecs setting in ethtool
+  * igb: cleanup some of the code related to hw timestamping
+  * igb: misc cleanups within igb_ethtool.c
+  * igb: use packet buffer sizes from RXPBS register
+  * igb: replace the VF clear_to_send with a flags value
+  * igb: rework use of VMOLR in regards to PF and VFs
+  * igb: rework handling of the vfta and vlvf registers in relation to
+    mng_vlan
+  * igb: move vf init into a seperate function
+  * igb: only process global stats in igb_update_stats
+  * igb: move global_quad_port_a from global into local static define
+  * igb: make tx hang check multiqueue, check eop descriptor
+  * igb: cleanup code related to ring resource allocation and free
+  * igb: change queue ordering for 82576 based adapters
+  * igb: cleanup interrupt enablement in regards to msix_other
+  * igb: Remove invalid stats counters
+  * igb: cleanup igb.h header whitespace and some structure formatting
+  * igb: cleanup igb xmit frame path
+  * igb: cleanup clean_rx_irq_adv and alloc_rx_buffers_adv
+  * igb: replace unecessary &adapter->hw with just hw where applicable
+  * igb: add pci_dev in few spots to clean up use of dev_err/info/warn
+  * igb: limit minimum mtu to 68 to keep ip bound to interface
+  * igb: open up SCTP checksum offloads to all MACs 82576 and newer
+  * igb: cleanup whitespace issues in igb_main.c
+  * igb: Fix warnings in igb_set_ringparam()
+  * igb: change type for ring sizes to u16 in igb_set_ring_param
+  * igb: move timesync init into a seperate function
+  * igb: when number of CPUs > 4 combine tx/rx queues to allow more queues
+  * igb: Rework how netdev->stats is handled
+  * igb: removed unused tx/rx total bytes/packets from adapter struct
+  * igb: check for packets on all tx rings when link is down
+  * igb: only recycle page if it is on our numa node
+  * igb: add support for the 82580 phy
+  * igb: add support for 82580 MAC
+  * igb: Add full support for 82580 devices
+  * igb: remove use of skb_dma_map from driver
+  * igb: fix handling of mailbox collisions between PF/VF
+  * igb: do not force pcs link when in KX mode
+  * igb: do not force retry count to 1 on 82580 phy
+  * igb: correctly offset 82575 flow control watermarks by 16 bytes
+  * igb: check both function bits in status register in wol exception
+  * igb: make certain to reassign legacy interrupt vectors after reset
+  * igb/igbvf: cleanup exception handling in tx_map_adv
+  * fix LOOKUP_FOLLOW on automount "symlinks"
+    - LP: #540231
+  * ARM: 5944/1: scsi: fix timer setup in fas216.c
+    - LP: #540231
+  * V4L/DVB: dvb: l64781.ko broken with gcc 4.5
+    - LP: #540231
+  * bfin: fix max timeout calculation
+    - LP: #540231
+  * V4L/DVB: Video : pwc : Fix regression in pwc_set_shutter_speed caused
+    by bad constant => sizeof conversion.
+    - LP: #540231
+  * V4L/DVB: bttv: Move I2C IR initialization
+    - LP: #540231
+  * V4L/DVB: cxusb: Select all required frontend and tuner modules
+    - LP: #540231
+  * memcg: fix oom killing a child process in an other cgroup
+    - LP: #540231
+  * fs/exec.c: fix initial stack reservation
+    - LP: #540231
+  * iwlwifi: error checking for number of tfds in queue
+    - LP: #540231
+  * iwlwifi: set HT flags after channel in rxon
+    - LP: #540231
+  * iwlwifi: sanity check before counting number of tfds can be free
+    - LP: #540231
+  * netlabel: fix export of SELinux categories > 127
+    - LP: #540231
+  * ahci: disable FPDMA auto-activate optimization on NVIDIA AHCI
+    - LP: #540231
+  * PCI hotplug: ibmphp: read the length of ebda and map entire ebda region
+    - LP: #540231
+  * PCI hotplug: check ioremap() return value in ibmphp_ebda.c
+    - LP: #540231
+  * ACPI: remove Asus P2B-DS from acpi=ht blacklist
+    - LP: #540231
+  * ACPI: fix "acpi=ht" boot option
+    - LP: #540231
+  * thinkpad-acpi: wrong thermal attribute_group removed in thermal_exit()
+    - LP: #540231
+  * ACPI: Be in TS_POLLING state during mwait based C-state entry
+    - LP: #540231
+  * mpt2sas: Delete volume before HBA detach.
+    - LP: #540231
+  * slab: initialize unused alien cache entry as NULL at
+    alloc_alien_cache().
+    - LP: #540231
+  * mac80211: quit addba_resp_timer if Tx BA session is torn down
+    - LP: #540231
+  * V4L/DVB (13991): gspca_mr973010a: Fix cif type 1 cameras not streaming
+    on UHCI controllers
+    - LP: #540231
+  * vfs: take f_lock on modifying f_mode after open time
+    - LP: #540231
+  * readahead: introduce FMODE_RANDOM for POSIX_FADV_RANDOM
+    - LP: #540231
+  * HID: remove TENX iBuddy from blacklist
+    - LP: #540231
+  * HID: add multi-input quirk for NextWindow Touchscreen.
+    - LP: #540231
+  * HID: usbhid: introduce timeout for stuck ctrl/out URBs
+    - LP: #540231
+  * airo: fix setting zero length WEP key
+    - LP: #540231
+  * idr: fix a critical misallocation bug, take#2
+    - LP: #540231
+  * Switch proc/self to nd_set_link()
+    - LP: #540231
+  * sparc: Align clone and signal stacks to 16 bytes.
+    - LP: #540231
+  * sparc32: Fix page_to_phys().
+    - LP: #540231
+  * sparc32: Fix struct stat uid/gid types.
+    - LP: #540231
+  * sparc: leds_resource.end assigned to itself in clock_board_probe()
+    - LP: #540231
+  * sparc64: Fix sun4u execute bit check in TSB I-TLB load.
+    - LP: #540231
+  * net: Fix sysctl restarts...
+    - LP: #540231
+  * net-sysfs: Use rtnl_trylock in wireless sysfs methods.
+    - LP: #540231
+  * net: bug fix for vlan + gro issue
+    - LP: #540231
+  * inet: Remove bogus IGMPv3 report handling
+    - LP: #540231
+  * ipv6: conntrack: Add member of user to nf_ct_frag6_queue structure
+    - LP: #540231
+  * drivers/net: ks8851_mll ethernet network driver
+    - LP: #540231
+  * sky2: fix transmit DMA map leakage
+    - LP: #540231
+  * SCSI: qla2xxx: Obtain proper host structure during response-queue
+    processing.
+    - LP: #540231
+  * rtc-core: fix memory leak
+    - LP: #540231
+  * offb: Add support for framebuffer handoff to offb.
+    - LP: #540231
+  * tpm_tis: TPM_STS_DATA_EXPECT workaround
+    - LP: #540231
+  * rndis_wlan: handle NL80211_AUTHTYPE_AUTOMATIC
+    - LP: #540231
+  * rndis_wlan: fix buffer overflow in rndis_query_oid
+    - LP: #540231
+  * rndis_wlan: disable stall workaround
+    - LP: #540231
+  * net/via-rhine: Fix scheduling while atomic bugs
+    - LP: #540231
+  * clocksource: Fix up a registration/IRQ race in the sh drivers.
+    - LP: #540231
+  * SCSI: qla1280: Drop host_lock while requesting firmware
+    - LP: #540231
+  * Staging: hv: add a pci device table
+    - LP: #540231
+  * Staging: hv: match on DMI values to know if we should run.
+    - LP: #540231
+  * Staging: mimio: remove the mimio driver
+    - LP: #540231
+  * dvb-core: Fix DoS bug in ULE decapsulation code that can be triggered
+    by an invalid Payload Pointer
+    - LP: #540231
+  * V4L/DVB (13148): uvcvideo: Handle V4L2_CTRL_TYPE_BUTTON control type in
+    VIDIOC_QUERYCTRL
+    - LP: #540231
+  * PM / Hibernate: Fix preallocating of memory
+    - LP: #540231
+  * macintosh/therm_adt746x: Fix sysfs attributes lifetime
+    - LP: #540231
+  * macintosh/hwmon/ams: Fix device removal sequence
+    - LP: #540231
+  * oprofile/x86: fix perfctr nmi reservation for mulitplexing
+    - LP: #540231
+  * oprofile: remove tracing build dependency
+    - LP: #540231
+  * oprofile/x86: remove node check in AMD IBS initialization
+    - LP: #540231
+  * oprofile/x86: use kzalloc() instead of kmalloc()
+    - LP: #540231
+  * oprofile/x86: fix msr access to reserved counters
+    - LP: #540231
+  * ALSA: hda: Use 3stack quirk for Toshiba Satellite L40-10Q
+    - LP: #524948, #540231
+  * ALSA: via82xx: add quirk for D1289 motherboard
+    - LP: #540231
+  * ALSA: pcm core - fix fifo_size channels interval check
+    - LP: #540231
+  * ALSA: USB MIDI support for Access Music VirusTI
+    - LP: #540231
+  * ALSA: hda: Use LPIB for Dell Latitude 131L
+    - LP: #530346, #540231
+  * ALSA: hda: Use LPIB for a Biostar Microtech board
+    - LP: #523953, #540231
+  * ALSA: hda - Add a position_fix quirk for MSI Wind U115
+    - LP: #540231
+  * ALSA: hda - Add position_fix quirk for HP dv3
+    - LP: #540231
+  * ALSA: hda-intel: Add position_fix quirk for ASUS M2V-MX SE.
+    - LP: #540231
+  * ASoC: fix ak4104 register array access
+    - LP: #540231
+  * driver-core: fix race condition in get_device_parent()
+    - LP: #540231
+  * Driver-Core: devtmpfs - reset inode permissions before unlinking
+    - LP: #540231
+  * tty: Fix the ldisc hangup race
+    - LP: #540231
+  * serial: imx: fix NULL dereference Oops when pdata == NULL
+    - LP: #540231
+  * USB: serial: sierra driver indat_callback fix
+    - LP: #511157, #540231
+  * USB: SIS USB2VGA DRIVER: support KAIREN's USB VGA adaptor
+    USB20SVGA-MB-PLUS
+    - LP: #540231
+  * USB: fix I2C API usage in ohci-pnx4008.
+    - LP: #540231
+  * p54usb: Add the USB ID for Belkin (Accton) FD7050E ver 1010ec
+    - LP: #540231
+  * p54pci: handle dma mapping errors
+    - LP: #540231
+  * gpiolib: Actually set output state in wm831x_gpio_direction_output()
+    - LP: #540231
+  * hwmon: (tmp421) Fix temperature conversions
+    - LP: #540231
+  * hwmon: (tmp421) Restore missing inputs
+    - LP: #540231
+  * pata_hpt3x2n: always stretch UltraDMA timing
+    - LP: #540231
+  * scm: Only support SCM_RIGHTS on unix domain sockets.
+    - LP: #540231
+  * ath9k: fix beacon timer restart after a card reset
+    - LP: #540231
+  * ath9k: fix rate control fallback rate selection
+    - LP: #540231
+  * ath9k: disable RIFS search for AR91xx based chips
+    - LP: #540231
+  * ath5k: use correct packet type when transmitting
+    - LP: #540231
+  * b43/b43legacy: Wake queues in wireless_core_start
+    - LP: #540231
+  * netfilter: xt_recent: fix buffer overflow
+    - LP: #540231
+  * netfilter: xt_recent: fix false match
+    - LP: #540231
+  * sunxvr500: Additional PCI id for sunxvr500 driver
+    - LP: #540231
+  * thinkpad-acpi: fix poll thread auto-start
+    - LP: #540231
+  * thinkpad-acpi: R52 brightness_mode has been confirmed
+    - LP: #540231
+  * thinkpad-acpi: document HKEY event 3006
+    - LP: #540231
+  * thinkpad-acpi: make driver events work in NVRAM poll mode
+    - LP: #540231
+  * thinkpad-acpi: fix bluetooth/wwan resume
+    - LP: #540231
+  * ocfs2: Only bug out in direct io write for reflinked extent.
+    - LP: #540231
+  * x86, ia32_aout: do not kill argument mapping
+    - LP: #540231
+  * x86: Add iMac9,1 to pci_reboot_dmi_table
+    - LP: #540231
+  * x86, xen: Disable highmem PTE allocation even when CONFIG_HIGHPTE=y
+    - LP: #540231
+  * x86: Avoid race condition in pci_enable_msix()
+    - LP: #540231
+  * x86: Fix SCI on IOAPIC != 0
+    - LP: #540231
+  * USB: xhci: Fix finding extended capabilities registers
+    - LP: #540231
+  * USB: fix the idProduct value for USB-3.0 root hubs
+    - LP: #540231
+  * USB: fix crash in uhci_scan_schedule
+    - LP: #540231
+  * USB: remove debugging message for uevent constructions
+    - LP: #540231
+  * USB: Move hcd free_dev call into usb_disconnect to fix oops
+    - LP: #540231
+  * USB: ftdi_sio: isolate all device IDs to new ftdi_sio_ids.h header
+    - LP: #540231
+  * USB: ftdi_sio: sort PID/VID entries in new ftdi_sio_ids.h header
+    - LP: #540231
+  * USB: ftdi_sio: new device id for papouch AD4USB
+    - LP: #540231
+  * USB: ftdi_sio: add device IDs (several ELV, one Mindstorms NXT)
+    - LP: #540231
+  * USB: add new ftdi_sio device ids
+    - LP: #540231
+  * USB: serial: ftdi: add CONTEC vendor and product id
+    - LP: #540231
+  * USB: cp210x: Add 81E8 (Zephyr Bioharness)
+    - LP: #540231
+  * USB: unusual_devs: Add support for multiple Option 3G sticks
+    - LP: #540231
+  * sunrpc: remove unnecessary svc_xprt_put
+    - LP: #540231
+  * SUNRPC: Handle EINVAL error returns from the TCP connect operation
+    - LP: #540231
+  * s3cmci: s3cmci_card_present: Use no_detect to decide whether there is a
+    card detect pin
+    - LP: #540231
+  * rtc-coh901331: fix braces in resume code
+    - LP: #540231
+  * NFS: Fix an allocation-under-spinlock bug
+    - LP: #540231
+  * dm: free dm_io before bio_endio not after
+    - LP: #540231
+  * KVM: x86 emulator: Add group8 instruction decoding
+    - LP: #540231
+  * KVM: x86 emulator: Forbid modifying CS segment register by mov
+    instruction
+    - LP: #540231
+  * KVM: x86 emulator: Add group9 instruction decoding
+    - LP: #540231
+  * KVM: x86 emulator: Check CPL level during privilege instruction
+    emulation
+    - LP: #540231
+  * sched: Fix sched_mv_power_savings for !SMT
+    - LP: #540231
+  * sched: Fix SMT scheduler regression in find_busiest_queue()
+    - LP: #540231
+  * sched: Don't use possibly stale sched_class
+    - LP: #540231
+  * x86, mm: Allow highmem user page tables to be disabled at boot time
+    - LP: #540231
+  * Linux 2.6.32.10
+    - LP: #540231
+  * drm/i915: give up on 8xx lid status
+    - LP: #540231
+  * drm/i915: Use a dmi quirk to skip a broken SDVO TV output.
+    - LP: #540231
+  * drm/ttm: handle OOM in ttm_tt_swapout
+    - LP: #540231
+  * drm/radeon/kms/atom: fix shr/shl ops
+    - LP: #540231
+  * Linux 2.6.32.10+drm33.1
+    - LP: #540231
+
+ -- Andy Whitcroft <apw@canonical.com>  Fri, 19 Mar 2010 19:17:09 +0000
+
+linux (2.6.32-16.25) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * linux-tools -- move to Suggests: with explicit seeding
+    - LP: #534635
+
+  [ Tim Gardner ]
+
+  * [Config] CONFIG_HID=m
+
+  [ Upstream Kernel Changes ]
+
+  * (pre-stable) sched: Fix SMT scheduler regression in
+    find_busiest_queue()
+  * KVM: introduce kvm_vcpu_on_spin
+  * KVM: VMX: Add support for Pause-Loop Exiting
+
+ -- Andy Whitcroft <apw@canonical.com>  Tue, 09 Mar 2010 14:13:51 +0000
+
+linux (2.6.32-16.24) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * armel -- perf userspace does not support arm
+  * ia64 -- libelf-dev/binutils-dev to not provide necessary libraries
+
+ -- Andy Whitcroft <apw@canonical.com>  Sat, 06 Mar 2010 11:42:12 +0000
+
+linux (2.6.32-16.23) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * SAUCE: PM report driver and device suspend/resume times -- move config
+  * update to standards version 3.8.4.0
+  * printenv -- expose all of the package selectors
+  * source package -- cleanup source content control
+  * doc package -- ensure we do build package content on buildd
+  * lintian -- correct the address in the debian/copyright
+  * lintian -- update debhelper package version dependancy
+  * lintian -- fix ghostscript dependancy
+  * lintian -- add required misc:Depends
+  * lintian -- move our debhelper compat level to debian/compat
+  * perf -- build the kernel carried tools
+  * perf -- add linux-tools carrying the version switches and manuals
+  * SAUCE: fix up Kconfig for staging drivers
+  * [Config] enable NOUVEAU etc following drm backport
+  * update DRM to mainline v2.6.33
+  * [Config] Remove AppArmor config options that no longer exist (ports)
+  * [Config] updateportsconfigs following drm update
+
+  [ John Johansen ]
+
+  * ubuntu: AppArmor -- update to mainline 2010-03-04
+  * SAUCE: AppArmor: Reintroduce AppArmor 2.4 compatibility
+  * SAUCE: AppArmor: replace strim with strstrip for 2.6.32 kernels
+  * [Config] Remove AppArmor config options that no longer exist
+
+  [ Manoj Iyer ]
+
+  * ubuntu: rtl8192se -- version 2010-0115,0014
+    - LP: #530275
+  * [Config] added CONFIG_RTL8192SE module.
+    - LP: #530275
+
+  [ Tim Gardner ]
+
+  * [Config] Added vmw_pvscsi to d-i/scsi-modules
+    - LP: #531017
+  * [Upstream] netfilter: xt_recent: Add an entry reaper
+
+  [ Upstream Kernel Changes ]
+
+  * Revert "KVM: x86 emulator: Check CPL level during privilege instruction
+    emulation"
+  * Revert "KVM: x86 emulator: Fix popf emulation"
+  * Revert "KVM: x86 emulator: Check IOPL level during io instruction
+    emulation"
+  * Revert "KVM: x86 emulator: Add Virtual-8086 mode of emulation"
+  * Revert "KVM: fix memory access during x86 emulation."
+  * Add vlan (8021.Q) module package for d-i.
+  * (pre-stable) drm/i915: blacklist lid status: Sony VGN-BX196VP, Dell
+    Inspiron 700m
+    - LP: #515246
+  * [Upstream] docbook: need xmldoclinks for all doc types
+  * x86: set_personality_ia32() misses force_personality32
+  * lib: Introduce generic list_sort function
+  * drm/nv50: Implement ctxprog/state generation.
+  * drm/nv50: Remove redundant/incorrect ctxvals initialisation.
+  * (pre-stable) drm/i915: blacklist lid status: Sony VGN-BX196VP, Dell
+    Inspiron 700m
+    - LP: #515246
+
+ -- Andy Whitcroft <apw@canonical.com>  Fri, 05 Mar 2010 15:40:38 +0000
+
+linux (2.6.32-15.22) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * Revert "[Config] added new config option CONFIG_SR_REPORT_TIME_LIMIT"
+  * Revert "SAUCE: PM report driver and device suspend/resume times."
+  * [Config] set CONFIG_SR_REPORT_TIME_LIMIT
+
+  [ Manoj Iyer ]
+
+  * SAUCE: PM report driver and device suspend/resume times.
+
+ -- Andy Whitcroft <apw@canonical.com>  Tue, 02 Mar 2010 01:35:37 +0000
+
+linux (2.6.32-15.21) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * Revert "(pre-stable) drm/i915: Increase fb alignment to 64k"
+  * Revert "[Config] lenovo-sl-laptop -- enable"
+  * Revert "ubuntu: lenovo-sl-laptop -- git tip (b19a08f81f)"
+  * armel -- cramfs module will no longer be built
+  * d-i -- make all modules optional
+  * rename the debug packages to match archive standard
+    - LP: #527837
+  * lenovo-sl-laptop is no longer built
+
+  [ Colin Ian King ]
+
+  * Disable 4MB page tables for Atom, work around errata AAE44
+    - LP: #523112
+
+  [ Colin Watson ]
+
+  * ubuntu: dm-raid4-5: Depend on XOR_BLOCKS
+  * ubuntu: fsam7400: Depend on CHECK_SIGNATURE
+
+  [ Jesse Barnes ]
+
+  * SAUCE: drm/i915: don't change DRM configuration when releasing load
+    detect pipe
+    - LP: #488328
+
+  [ Loïc Minier ]
+
+  * [Config] armel Update versatile initrd configs
+    - LP: #524893
+  * SAUCE: [um] Don't use nx_enabled under UML
+    - LP: #524849
+
+  [ Manoj Iyer ]
+
+  * [Config] added new config option CONFIG_SR_REPORT_TIME_LIMIT
+
+  [ Mario Limonciello ]
+
+  * SAUCE: v3 - Add Dell Business Class Netbook LED driver
+
+  [ Rafael J. Wysocki ]
+
+  * SAUCE: PM report driver and device suspend/resume times.
+
+  [ Surbhi Palande ]
+
+  * Revert "[Upstream] e1000e: enhance frame fragment detection"
+    - CVE-2009-4538
+  * Revert "[Upstream] e1000: enhance frame fragment detection"
+    - CVE-2009-4536
+
+  [ Tim Gardner ]
+
+  * [Config] Enabled CONFIG_LEDS_DELL_NETBOOKS=m
+  * SAUCE: (pre-stable) netfilter: xt_recent: fix buffer overflow
+  * SAUCE: (pre-stable) netfilter: xt_recent: fix false match
+
+  [ Upstream Kernel Changes ]
+
+  * Revert "(pre-stable) eCryptfs: Add getattr function"
+  * Fix potential crash with sys_move_pages
+  * futex_lock_pi() key refcnt fix
+  * futex: Handle user space corruption gracefully
+  * futex: Handle futex value corruption gracefully
+  * Fix race in tty_fasync() properly
+  * hwmon: (w83781d) Request I/O ports individually for probing
+  * hwmon: (lm78) Request I/O ports individually for probing
+  * hwmon: (adt7462) Wrong ADT7462_VOLT_COUNT
+  * ALSA: ctxfi - fix PTP address initialization
+  * drm/i915: disable hotplug detect before Ironlake CRT detect
+  * drm/i915: enable self-refresh on 965
+  * drm/i915: Disable SR when more than one pipe is enabled
+  * drm/i915: Fix DDC on some systems by clearing BIOS GMBUS setup.
+  * drm/i915: Add HP nx9020/SamsungSX20S to ACPI LID quirk list
+  * drm/i915: Fix the incorrect DMI string for Samsung SX20S laptop
+  * drm/i915: Add MALATA PC-81005 to ACPI LID quirk list
+  * usb: r8a66597-hcd: Flush the D-cache for the pipe-in transfer buffers.
+  * i2c-tiny-usb: Fix on big-endian systems
+  * drm/i915: handle FBC and self-refresh better
+  * drm/i915: Increase fb alignment to 64k
+  * drm/i915: Update write_domains on active list after flush.
+  * regulator: Fix display of null constraints for regulators
+  * ALSA: hda-intel: Avoid divide by zero crash
+  * CPUFREQ: Fix use after free of struct powernow_k8_data
+  * freeze_bdev: don't deactivate successfully frozen MS_RDONLY sb
+  * cciss: Make cciss_seq_show handle holes in the h->drv[] array
+  * ioat: fix infinite timeout checking in ioat2_quiesce
+  * resource: add helpers for fetching rlimits
+  * fs/exec.c: restrict initial stack space expansion to rlimit
+  * cifs: fix length calculation for converted unicode readdir names
+  * NFS: Fix a reference leak in nfs_wb_cancel_page()
+  * NFS: Try to commit unstable writes in nfs_release_page()
+  * NFSv4: Don't allow posix locking against servers that don't support it
+  * NFSv4: Ensure that the NFSv4 locking can recover from stateid errors
+  * NFS: Fix an Oops when truncating a file
+  * NFS: Fix a umount race
+  * NFS: Fix a bug in nfs_fscache_release_page()
+  * NFS: Fix the mapping of the NFSERR_SERVERFAULT error
+  * md: fix 'degraded' calculation when starting a reshape.
+  * V4L/DVB: dvb-core: fix initialization of feeds list in demux filter
+  * Export the symbol of getboottime and mmonotonic_to_bootbased
+  * kvmclock: count total_sleep_time when updating guest clock
+  * KVM: PIT: control word is write-only
+  * tpm_infineon: fix suspend/resume handler for pnp_driver
+  * amd64_edac: Do not falsely trigger kerneloops
+  * netfilter: nf_conntrack: fix memory corruption with multiple namespaces
+  * netfilter: nf_conntrack: per netns nf_conntrack_cachep
+  * netfilter: nf_conntrack: restrict runtime expect hashsize modifications
+  * netfilter: xtables: compat out of scope fix
+  * netfilter: nf_conntrack: fix hash resizing with namespaces
+  * drm/i915: remove full registers dump debug
+  * drm/i915: add i915_lp_ring_sync helper
+  * drm/i915: Don't wait interruptible for possible plane buffer flush
+  * dasd: remove strings from s390dbf
+  * crypto: padlock-sha - Add import/export support
+  * wmi: Free the allocated acpi objects through wmi_get_event_data
+  * dell-wmi, hp-wmi, msi-wmi: check wmi_get_event_data() return value
+  * /dev/mem: introduce size_inside_page()
+  * devmem: check vmalloc address on kmem read/write
+  * devmem: fix kmem write bug on memory holes
+  * SCSI: mptfusion : mptscsih_abort return value should be SUCCESS instead
+    of value 0.
+  * sh: Couple kernel and user write page perm bits for CONFIG_X2TLB
+  * ALSA: hda - use WARN_ON_ONCE() for zero-division detection
+  * dst: call cond_resched() in dst_gc_task()
+  * ALSA: hda - Improved MacBook (Pro) 5,1 / 5,2 support
+  * befs: fix leak
+  * rtc-fm3130: add missing braces
+  * Call flush_dcache_page after PIO data transfers in libata-sff.c
+  * ahci: add Acer G725 to broken suspend list
+  * pktgen: Fix freezing problem
+  * x86/amd-iommu: Fix IOMMU-API initialization for iommu=pt
+  * x86/amd-iommu: Fix deassignment of a device from the pt_domain
+  * x86: Re-get cfg_new in case reuse/move irq_desc
+  * Staging: fix rtl8187se compilation errors with mac80211
+  * ALSA: usb-audio - Avoid Oops after disconnect
+  * serial: 8250: add serial transmitter fully empty test
+  * sysfs: sysfs_sd_setattr set iattrs unconditionally
+  * class: Free the class private data in class_release
+  * USB: usbfs: only copy the actual data received
+  * USB: usbfs: properly clean up the as structure on error paths
+  * rtl8187: Add new device ID
+  * ACPI: Add NULL pointer check in acpi_bus_start
+  * ACPI: fix High cpu temperature with 2.6.32
+  * drm/radeon/kms: use udelay for short delays
+  * NFS: Too many GETATTR and ACCESS calls after direct I/O
+  * eCryptfs: Add getattr function
+  * b43: Fix throughput regression
+  * ath9k: Fix sequence numbers for PAE frames
+  * mac80211: Fix probe request filtering in IBSS mode
+  * iwlwifi: Fix to set correct ht configuration
+  * dm stripe: avoid divide by zero with invalid stripe count
+  * dm log: userspace fix overhead_size calcuations
+  * Linux 2.6.32.9
+  * sfc: Fix SFE4002 initialisation
+  * sfc: Fix sign of efx_mcdi_poll_reboot() error in efx_mcdi_poll()
+  * sfc: SFE4002/SFN4112F: Widen temperature and voltage tolerances
+  * (pre-stable) HID: handle joysticks with large number of buttons
+    - LP: #492056
+  * (pre-stable) HID: extend mask for BUTTON usage page
+    - LP: #492056
+  * PM: Measure device suspend and resume times
+  * e1000: enhance frame fragment detection
+    - CVE-2009-4536
+  * e1000e: enhance frame fragment detection
+    - CVE-2009-4538
+  * KVM: fix memory access during x86 emulation.
+    - CVE-2010-0306
+  * KVM: x86 emulator: Add Virtual-8086 mode of emulation
+    - CVE-2010-0306
+  * KVM: x86 emulator: Check IOPL level during io instruction emulation
+    - CVE-2010-0306
+  * KVM: x86 emulator: Fix popf emulation
+    - CVE-2010-0306
+  * KVM: x86 emulator: Check CPL level during privilege instruction
+    emulation
+    - CVE-2010-0306
+  * Input: wacom - ensure the device is initialized properly upon resume
+  * Input: wacom - add defines for packet lengths of various devices
+  * Input: wacom - add support for new LCD tablets
+    - LP: #516777
+
+ -- Andy Whitcroft <apw@canonical.com>  Mon, 01 Mar 2010 22:56:28 +0000
+
+linux (2.6.32-14.20) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * rebuild following the GCC update to match compiler for out of tree modules
+  * Revert "[Config] drbd -- enable"
+  * Revert "ubuntu: drbd -- version 8.3.1"
+  * SAUCE: khubd -- switch USB product/manufacturer/serial handling to RCU
+    - LP: #510937
+
+ -- Andy Whitcroft <apw@canonical.com>  Fri, 19 Feb 2010 18:47:18 +0000
+
+linux (2.6.32-14.19) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * ensure we build the source package contents when enabled
+    - LP: #522308
+  * [Config] enable CONFIG_X86_MCE_XEON75XX
+  * SAUCE: AppArmor -- add linux/kref.h for struct kref
+  * [Config] enable CONFIG_HID_ORTEK
+  * enable udeb generation for arm versatile flavour
+    - LP: #522515
+
+  [ John Johansen ]
+
+  * ubuntu: AppArmor -- update to mainline 2010-02-18
+    - LP: #439560, #496110, #507069
+
+  [ Johnathon Harris ]
+
+  * SAUCE: HID: add support for Ortek WKB-2000
+    - LP: #405390
+
+  [ Upstream Kernel Changes ]
+
+  * tpm_tis: TPM_STS_DATA_EXPECT workaround
+    - LP: #490487
+  * x86, mce: Xeon75xx specific interface to get corrected memory error
+    information
+  * x86, mce: Rename cpu_specific_poll to mce_cpu_specific_poll
+  * x86, mce: Make xeon75xx memory driver dependent on PCI
+  * drm/edid: Unify detailed block parsing between base and extension
+    blocks
+    - LP: #500999
+  * (pre-stable) eCryptfs: Add getattr function
+    - LP: #390833
+
+ -- Andy Whitcroft <apw@canonical.com>  Thu, 18 Feb 2010 19:22:02 +0000
+
+linux (2.6.32-13.18) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * Revert "enforcer -- make the enforcement configuration common"
+  * Revert "(pre-stable) Input: ALPS - add interleaved protocol support
+    (Dell E6x00 series)"
+  * Revert "(pre-stable) driver-core: fix devtmpfs crash on s390"
+  * Revert "(pre-stable) Driver-Core: devtmpfs - set root directory mode to
+    0755"
+  * Revert "SAUCE: Adds support for COMPAL JHL90 webcam"
+  * Revert "SAUCE: fix kernel oops in VirtualBox during paravirt patching"
+  * Revert "SAUCE: make fc transport removal of target configurable"
+  * enforcer -- make the enforcement configuration common
+  * getabis -- add preempt flavour to the list
+  * [Config] enforce DEVTMPFS options
+  * [Config] armel -- cleanup to-be builtin modules
+  * [Config] cleanup ports configs
+  * [Config] enable CRYPTO_GHASH_CLMUL_NI_INTEL
+    - LP: #485536
+  * add printdebian target to find branch target
+  * distclean -- do not remove debian.env
+  * [Config] generic-pae switch to M586TSC
+    - LP: #519448
+  * git-ubuntu-log -- commonise duplicated log handling
+  * git-ubuntu-log -- tighten up Bug: NNNN matching
+  * git-ubuntu-log -- sort the bug numbers
+
+  [ Chris Wilson ]
+
+  * (pre-stable) drm/i915: Increase fb alignment to 64k
+    - LP: #404064
+
+  [ Eric Miao ]
+
+  * arm -- enable ubuntu/ directory
+
+  [ Huang Ying ]
+
+  * SAUCE: crypto: ghash - Add PCLMULQDQ accelerated implementation
+  * SAUCE: crypto: ghash-intel - Fix building failure on x86_32
+
+  [ Loïc Minier ]
+
+  * [Config] cleanup preempt configuration
+  * [Config] versatile: Fix video output
+    - LP: #517594
+  * [Config] armel DEFAULT_MMAP_MIN_ADDR=32768
+  * [Config] Large update to armel/versatile
+  * [Config] versatile: Add RTC support
+  * [Config] armel: Enable NEON
+  * [Config] versatile: Builtin MMC support
+  * [Config] versatile Builtin SCSI controller
+  * [Config] armel Disable dma_cache_sync callers
+  * [Config] armel Disable asm/time.h users
+  * [Config] armel Disable out of range udelay()
+  * [Config] armel Disable flush_cache_range() users
+  * [Config] armel -- Enable ubuntu/ drivers
+
+  [ Steve Conklin ]
+
+  * SAUCE: drm/i915: Add display hotplug event on Ironlake
+  * SAUCE: drm/i915: Add ACPI OpRegion support for Ironlake
+
+  [ Upstream Kernel Changes ]
+
+  * Revert "[Upstream]: oprofile/x86: add Xeon 7500 series support"
+  * Revert "Revert "[Bluetooth] Eliminate checks for impossible conditions
+    in IRQ handler""
+  * clockevent: Don't remove broadcast device when cpu is dead
+  * clockevents: Add missing include to pacify sparse
+  * ACPI: don't cond_resched if irq is disabled
+  * be2net: Add support for next generation of BladeEngine device.
+  * be2net: Add the new PCI IDs to PCI_DEVICE_TABLE.
+  * mpt2sas: New device SAS2208 support is added
+  * ar9170: Add support for D-Link DWA 160 A2
+  * powerpc/fsl: Add PCI device ids for new QoirQ chips
+  * davinci: dm646x: Add support for 3.x silicon revision
+  * Input: ALPS - add interleaved protocol support (Dell E6x00 series)
+  * Driver-Core: devtmpfs - set root directory mode to 0755
+  * driver-core: fix devtmpfs crash on s390
+  * vfs: get_sb_single() - do not pass options twice
+  * ALSA: hda - Add PCI IDs for Nvidia G2xx-series
+  * V4L/DVB (13569): smsusb: add autodetection support for five additional
+    Hauppauge USB IDs
+  * USB: mos7840: add device IDs for B&B electronics devices
+  * USB: ftdi_sio: add USB device ID's for B&B Electronics line
+  * V4L/DVB (13168): Add support for Asus Europa Hybrid DVB-T card (SAA7134
+    SubVendor ID: 0x1043 Device ID: 0x4847)
+  * iTCO_wdt: Add support for Intel Ibex Peak
+  * atl1c:use common_task instead of reset_task and link_chg_task
+  * atl1e:disable NETIF_F_TSO6 for hardware limit
+  * V4L/DVB (13680a): DocBook/media: copy images after building HTML
+  * V4L/DVB (13680b): DocBook/media: create links for included sources
+  * netfilter: xtables: fix conntrack match v1 ipt-save output
+  * partitions: read whole sector with EFI GPT header
+  * partitions: use sector size for EFI GPT
+  * ALSA: ice1724 - Patch for suspend/resume for ESI Juli@
+  * sched: Fix isolcpus boot option
+  * sched: Fix missing sched tunable recalculation on cpu add/remove
+  * nohz: Prevent clocksource wrapping during idle
+  * nfsd: Fix sort_pacl in fs/nfsd/nf4acl.c to actually sort groups
+  * timers, init: Limit the number of per cpu calibration bootup messages
+  * PCI: Always set prefetchable base/limit upper32 registers
+  * iscsi class: modify handling of replacement timeout
+  * NFS: Revert default r/wsize behavior
+  * HID: fixup quirk for NCR devices
+  * scsi_devinfo: update Hitachi entries (v2)
+  * scsi_dh: create sysfs file, dh_state for all SCSI disk devices
+  * scsi_transport_fc: remove invalid BUG_ON
+  * lpfc: fix hang on SGI ia64 platform
+  * libfc: fix typo in retry check on received PRLI
+  * libfc: fix ddp in fc_fcp for 0 xid
+  * fcoe: remove redundant checking of netdev->netdev_ops
+  * libfc: Fix wrong scsi return status under FC_DATA_UNDRUN
+  * libfc: lport: fix minor documentation errors
+  * libfc: don't WARN_ON in lport_timeout for RESET state
+  * fcoe: initialize return value in fcoe_destroy
+  * libfc: Fix frags in frame exceeding SKB_MAX_FRAGS in fc_fcp_send_data
+  * libfc: fix memory corruption caused by double frees and bad error
+    handling
+  * libfc: fix free of fc_rport_priv with timer pending
+  * libfc: remote port gets stuck in restart state without really
+    restarting
+  * fcoe, libfc: fix an libfc issue with queue ramp down in libfc
+  * fcoe: Fix checking san mac address
+  * fcoe: Fix getting san mac for VLAN interface
+  * qlge: Remove explicit setting of PCI Dev CTL reg.
+  * qlge: Set PCIE max read request size.
+  * qlge: Don't fail open when port is not initialized.
+  * qlge: Add handler for DCBX firmware event.
+  * qlge: Bonding fix for mode 6.
+  * PCI: AER: fix aer inject result in kernel oops
+  * DMI: allow omitting ident strings in DMI tables
+  * Input: i8042 - remove identification strings from DMI tables
+  * Input: i8042 - add Gigabyte M1022M to the noloop list
+  * Input: i8042 - add Dritek quirk for Acer Aspire 5610.
+  * ALSA: hda - select IbexPeak handler for Calpella
+  * ALSA: hda - Fix quirk for Maxdata obook4-1
+  * ALSA: hda - Add missing Line-Out and PCM switches as slave
+  * iTCO_wdt.c - cleanup chipset documentation
+  * iTCO_wdt: add PCI ID for the Intel EP80579 (Tolapai) SoC
+  * iTCO_wdt: Add Intel Cougar Point and PCH DeviceIDs
+  * ahci: disable SNotification capability for ich8
+  * ata_piix: fix MWDMA handling on PIIX3
+  * md: fix small irregularity with start_ro module parameter
+  * V4L/DVB (13826): uvcvideo: Fix controls blacklisting
+  * cio: fix double free in case of probe failure
+  * cio: dont panic in non-fatal conditions
+  * netiucv: displayed TX bytes value much too high
+  * ipc ns: fix memory leak (idr)
+  * ALSA: hda - Fix HP T5735 automute
+  * hwmon: (fschmd) Fix a memleak on multiple opens of /dev/watchdog
+  * UBI: fix memory leak in update path
+  * UBI: initialise update marker
+  * ASoC: fix a memory-leak in wm8903
+  * mac80211: check that ieee80211_set_power_mgmt only handles STA
+    interfaces.
+  * cfg80211: fix channel setting for wext
+  * KVM: S390: fix potential array overrun in intercept handling
+  * KVM: only allow one gsi per fd
+  * KVM: Fix race between APIC TMR and IRR
+  * KVM: MMU: bail out pagewalk on kvm_read_guest error
+  * KVM: x86: Fix host_mapping_level()
+  * KVM: x86: Fix probable memory leak of vcpu->arch.mce_banks
+  * KVM: x86: Fix leak of free lapic date in kvm_arch_vcpu_init()
+  * KVM: fix lock imbalance in kvm_*_irq_source_id()
+  * KVM: only clear irq_source_id if irqchip is present
+  * IPoIB: Clear ipoib_neigh.dgid in ipoib_neigh_alloc()
+  * x86: Reenable TSC sync check at boot, even with NONSTOP_TSC
+  * ACPI: enable C2 and Turbo-mode on Nehalem notebooks on A/C
+    - LP: #516325
+  * iwlwifi: Fix throughput stall issue in HT mode for 5000
+  * fnctl: f_modown should call write_lock_irqsave/restore
+  * x86, msr/cpuid: Pass the number of minors when unregistering MSR and
+    CPUID drivers.
+  * Linux 2.6.32.7
+  * scsi_lib: Fix bug in completion of bidi commands
+  * mptsas: Fix issue with chain pools allocation on katmai
+  * mm: add new 'read_cache_page_gfp()' helper function
+  * drm/i915: Selectively enable self-reclaim
+  * firewire: ohci: fix crashes with TSB43AB23 on 64bit systems
+  * S390: fix single stepped svcs with TRACE_IRQFLAGS=y
+  * x86: Set hotpluggable nodes in nodes_possible_map
+  * x86: Remove "x86 CPU features in debugfs" (CONFIG_X86_CPU_DEBUG)
+  * libata: retry FS IOs even if it has failed with AC_ERR_INVALID
+  * zcrypt: Do not remove coprocessor for error 8/72
+  * dasd: fix possible NULL pointer errors
+  * ACPI: Add a generic API for _OSC -v2
+  * ACPI: Add platform-wide _OSC support.
+  * ACPI: fix OSC regression that caused aer and pciehp not to load
+  * ACPI: Advertise to BIOS in _OSC: _OST on _PPC changes
+  * UBI: fix volume creation input checking
+  * e1000/e1000e: don't use small hardware rx buffers
+  * drm/i915: Reload hangcheck timer too for Ironlake
+  * Fix a leak in affs_fill_super()
+  * Fix failure exits in bfs_fill_super()
+  * fix oops in fs/9p late mount failure
+  * fix leak in romfs_fill_super()
+  * Fix remount races with symlink handling in affs
+  * fix affs parse_options()
+  * Fix failure exit in ipathfs
+  * mm: fix migratetype bug which slowed swapping
+  * FDPIC: Respect PT_GNU_STACK exec protection markings when creating
+    NOMMU stack
+  * Split 'flush_old_exec' into two functions
+  * sparc: TIF_ABI_PENDING bit removal
+  * x86: get rid of the insane TIF_ABI_PENDING bit
+  * Input: winbond-cir - remove dmesg spam
+  * x86: Disable HPET MSI on ATI SB700/SB800
+  * iwlwifi: set default aggregation frame count limit to 31
+  * drm/i915: only enable hotplug for detected outputs
+  * firewire: core: add_descriptor size check
+  * SECURITY: selinux, fix update_rlimit_cpu parameter
+  * regulator: Specify REGULATOR_CHANGE_STATUS for WM835x LED constraints
+  * x86: Add Dell OptiPlex 760 reboot quirk
+    - LP: #488319
+  * x86: Add quirk for Intel DG45FC board to avoid low memory corruption
+  * x86/amd-iommu: Fix possible integer overflow
+  * clocksource: fix compilation if no GENERIC_TIME
+  * tcp: update the netstamp_needed counter when cloning sockets
+  * sky2: Fix oops in sky2_xmit_frame() after TX timeout
+  * net: restore ip source validation
+  * af_packet: Don't use skb after dev_queue_xmit()
+  * ax25: netrom: rose: Fix timer oopses
+  * KVM: allow userspace to adjust kvmclock offset
+  * oprofile/x86: add Xeon 7500 series support
+  * oprofile/x86: fix crash when profiling more than 28 events
+  * libata: retry link resume if necessary
+  * mm: percpu-vmap fix RCU list walking
+  * mm: purge fragmented percpu vmap blocks
+  * block: fix bio_add_page for non trivial merge_bvec_fn case
+  * Fix 'flush_old_exec()/setup_new_exec()' split
+  * random: drop weird m_time/a_time manipulation
+  * random: Remove unused inode variable
+  * block: fix bugs in bio-integrity mempool usage
+  * usb: r8a66597-hdc disable interrupts fix
+  * connector: Delete buggy notification code.
+  * be2net: Bug fix to support newer generation of BE ASIC
+  * be2net: Fix memset() arg ordering.
+  * mm: flush dcache before writing into page to avoid alias
+  * mac80211: fix NULL pointer dereference when ftrace is enabled
+  * imxfb: correct location of callbacks in suspend and resume
+  * mx3fb: some debug and initialisation fixes
+  * starfire: clean up properly if firmware loading fails
+  * kernel/cred.c: use kmem_cache_free
+  * uartlite: fix crash when using as console
+  * pktcdvd: removing device does not remove its sysfs dir
+  * ath9k: fix eeprom INI values override for 2GHz-only cards
+  * ath9k: fix beacon slot/buffer leak
+  * powerpc: TIF_ABI_PENDING bit removal
+  * NET: fix oops at bootime in sysctl code
+  * Linux 2.6.32.8
+
+ -- Andy Whitcroft <apw@canonical.com>  Wed, 10 Feb 2010 18:56:52 +0000
+
+linux (2.6.32-12.17) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * restore linux-image prefix -- master
+  * enforce -- we require SELINUX enabled -- master
+  * enforce -- ensure APPARMOR is our default LSM -- master
+  * make doc package completely optional -- master
+  * make source package completely optional -- master
+  * make linux-libc-dev completly optional -- master
+  * convert package disable to a deps list -- master
+  * allow common headers to switch from indep to arch -- master
+  * convert binary package disable to a deps list -- master
+  * add configuration option for a full source build tree -- master
+  * add support for uImage kernels in package control scripts
+  * getabis -- cleanup and parameterise repository list -- master
+  * getabis -- move configuration to etc/getabi -- master
+  * kernelconfig -- move configuration to etc -- master
+  * rules -- make debian/debian.env master for branch name
+  * set the current branch name -- master
+  * pull back common debian.master files into debian -- master
+  * enforcer -- make the enforcement configuration common
+  * insert-changes -- correctly link to debian/rules in DROOT
+
+  [ Colin Watson ]
+
+  * future-proof ddeb handling against buildd changes
+
+  [ Eric Miao ]
+
+  * SAUCE: Make CONFIG_{OMNIBOOK, AVERATEC_5100P, PACKARDBELL_E5} depend on
+    X86
+
+  [ Loïc Minier ]
+
+  * Add modules.builtin.bin to prerm rm list
+    - LP: #516584
+
+  [ Tim Gardner ]
+
+  * [Config] Implement the amd64 preempt flavour
+
+  [ Upstream Kernel Changes ]
+
+  * syslog: distinguish between /proc/kmsg and syscalls
+    - LP: #515623
+  * sfc: Fix polling for slow MCDI operations
+  * sfc: Fix conditions for MDIO self-test
+  * sfc: QT202x: Remove unreliable MMD check at initialisation
+  * sfc: Add workspace for GMAC bug workaround to MCDI MAC_STATS buffer
+  * sfc: Use fixed-size buffers for MCDI NVRAM requests
+
+ -- Andy Whitcroft <apw@canonical.com>  Fri, 05 Feb 2010 07:09:31 +0000
+
+linux (2.6.32-12.16) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * Revert "SAUCE: acpi battery -- delay first lookup of the battery until
+    first use"
+  * SAUCE: acpi battery -- move first lookup asynchronous
+    - LP: #507211
+  * [Config] update configs to cleanup generic configs
+  * [Config] disable CONFIG_X86_CPU_DEBUG for amd64
+  * [Config] enable USER_NS
+    - LP: #480739, #509808
+
+  [ Heiko Carstens ]
+
+  * (pre-stable) driver-core: fix devtmpfs crash on s390
+    - LP: #512370
+
+  [ John Johansen ]
+
+  * [Config] for server and virtual flavours make CONFIG_SCSI_SYM53C8XX_2=y
+    - LP: #494565
+  * [Config] VIRTIO=y for server/virtual flavours
+    - LP: #494565
+
+  [ Kay Sievers ]
+
+  * (pre-stable) Driver-Core: devtmpfs - set root directory mode to 0755
+    - LP: #512370
+
+  [ Kees Cook ]
+
+  * SAUCE: x86: brk away from exec rand area
+    - LP: #452175
+
+  [ Leann Ogasawara ]
+
+  * [Upstream] e1000: enhance frame fragment detection
+    - CVE-2009-4536
+  * [Upstream] e1000e: enhance frame fragment detection
+    - CVE-2009-4538
+
+  [ Sebastian Kapfer ]
+
+  * (pre-stable) Input: ALPS - add interleaved protocol support (Dell E6x00
+    series)
+    - LP: #296610
+
+  [ Upstream Kernel Changes ]
+
+  * inotify: do not reuse watch descriptors
+    - LP: #485556
+  * inotify: only warn once for inotify problems
+  * revert "drivers/video/s3c-fb.c: fix clock setting for Samsung SoC
+    Framebuffer"
+  * memcg: ensure list is empty at rmdir
+  * drm/i915: remove loop in Ironlake interrupt handler
+  * block: Fix incorrect reporting of partition alignment
+  * x86, mce: Thermal monitoring depends on APIC being enabled
+  * futexes: Remove rw parameter from get_futex_key()
+  * page allocator: update NR_FREE_PAGES only when necessary
+  * x86, apic: use physical mode for IBM summit platforms
+  * edac: i5000_edac critical fix panic out of bounds
+  * x86: SGI UV: Fix mapping of MMIO registers
+  * mfd: WM835x GPIO direction register is not locked
+  * mfd: Correct WM835x ISINK ramp time defines
+  * ALSA: hda - Fix missing capture mixer for ALC861/660 codecs
+  * V4L/DVB (13868): gspca - sn9c20x: Fix test of unsigned.
+  * reiserfs: truncate blocks not used by a write
+  * HID: add device IDs for new model of Apple Wireless Keyboard
+  * PCI/cardbus: Add a fixup hook and fix powerpc
+  * Input: pmouse - move Sentelic probe down the list
+  * asus-laptop: add Lenovo SL hotkey support
+  * sched: Fix cpu_clock() in NMIs, on !CONFIG_HAVE_UNSTABLE_SCHED_CLOCK
+  * sparc64: Fix NMI programming when perf events are active.
+  * sparc64: Fix Niagara2 perf event handling.
+  * i2c: Do not use device name after device_unregister
+  * i2c/pca: Don't use *_interruptible
+  * serial/8250_pnp: add a new Fujitsu Wacom Tablet PC device
+  * sched: Fix task priority bug
+  * vfs: Fix vmtruncate() regression
+  * Linux 2.6.32.5
+  * x86, msr/cpuid: Register enough minors for the MSR and CPUID drivers
+  * V4L/DVB (13900): gspca - sunplus: Fix bridge exchanges.
+  * Staging: asus_oled: fix oops in 2.6.32.2
+  * Staging: hv: fix smp problems in the hyperv core code
+  * tty: fix race in tty_fasync
+  * ecryptfs: use after free
+  * ecryptfs: initialize private persistent file before dereferencing
+    pointer
+  * nozomi: quick fix for the close/close bug
+  * serial: 8250_pnp: use wildcard for serial Wacom tablets
+  * usb: serial: fix memory leak in generic driver
+  * USB: fix bitmask merge error
+  * USB: Don't use GFP_KERNEL while we cannot reset a storage device
+  * USB: EHCI: fix handling of unusual interrupt intervals
+  * USB: EHCI & UHCI: fix race between root-hub suspend and port resume
+  * USB: add missing delay during remote wakeup
+  * USB: add speed values for USB 3.0 and wireless controllers
+  * ACPI: EC: Accelerate query execution
+  * ACPI: EC: Add wait for irq storm
+  * SCSI: enclosure: fix oops while iterating enclosure_status array
+  * drm/i915: Read the response after issuing DDC bus switch command
+  * drm/i915: try another possible DDC bus for the SDVO device with
+    multiple outputs
+  * block: bdev_stack_limits wrapper
+  * DM: Fix device mapper topology stacking
+  * x86/PCI/PAT: return EINVAL for pci mmap WC request for !pat_enabled
+  * USB: fix usbstorage for 2770:915d delivers no FAT
+  * vmalloc: remove BUG_ON due to racy counting of VM_LAZY_FREE
+  * perf timechart: Use tid not pid for COMM change
+  * perf events: Dont report side-band events on each cpu for
+    per-task-per-cpu events
+  * perf: Honour event state for aux stream data
+  * Linux 2.6.32.6
+
+ -- Andy Whitcroft <apw@canonical.com>  Wed, 27 Jan 2010 16:40:23 +0000
+
+linux (2.6.32-11.15) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * Revert "(pre-stable) drm/radeon/kms: fix crtc vblank update for r600"
+  * Revert "(pre-stable) sched: Fix balance vs hotplug race"
+  * Revert "[Upstream] acerhdf: Limit modalias matching to supported
+    boards"
+  * Revert "[Upstream] mmc: prevent dangling block device from accessing
+    stale queues"
+  * Revert "SAUCE: Fix nx_enable reporting"
+  * Revert "SAUCE: [x86] fix report of cs-limit nx-emulation"
+  * Revert "SAUCE: [x86] implement cs-limit nx-emulation for ia32"
+  * SAUCE: i915 -- disable powersave by default
+    - LP: #492392
+
+  [ Kees Cook ]
+
+  * SAUCE: [x86] implement cs-limit nx-emulation for ia32
+    - LP: #369978
+  * SAUCE: [x86] fix report of cs-limit nx-emulation
+    - LP: #454285
+  * SAUCE: Fix nx_enable reporting
+    - LP: #454285
+
+  [ Tim Gardner ]
+
+  * [Upstream] b43: Declare all possible firmware files.
+    - LP: #488636
+  * [Config] updateconfigs after adding pvscsi
+    - LP: #497156
+  * [Config] CONFIG_BT=m
+
+  [ Upstream Kernel Changes ]
+
+  * Revert "x86: Side-step lguest problem by only building cmpxchg8b_emu
+    for pre-Pentium"
+  * SCSI: ipr: fix EEH recovery
+  * SCSI: qla2xxx: dpc thread can execute before scsi host has been added
+  * SCSI: st: fix mdata->page_order handling
+  * SCSI: fc class: fix fc_transport_init error handling
+  * sched: Fix task_hot() test order
+  * x86, cpuid: Add "volatile" to asm in native_cpuid()
+  * sched: Select_task_rq_fair() must honour SD_LOAD_BALANCE
+  * clockevents: Prevent clockevent_devices list corruption on cpu hotplug
+  * pata_hpt3x2n: fix clock turnaround
+  * pata_cmd64x: fix overclocking of UDMA0-2 modes
+  * ASoC: wm8974: fix a wrong bit definition
+  * sound: sgio2audio/pdaudiocf/usb-audio: initialize PCM buffer
+  * ALSA: hda - Fix missing capsrc_nids for ALC88x
+  * acerhdf: limit modalias matching to supported
+    - LP: #435958
+  * ACPI: EC: Fix MSI DMI detection
+  * ACPI: Use the return result of ACPI lid notifier chain correctly
+  * powerpc: Handle VSX alignment faults correctly in little-endian mode
+  * ASoC: Do not write to invalid registers on the wm9712.
+  * drm/radeon: fix build on 64-bit with some compilers.
+  * USB: emi62: fix crash when trying to load EMI 6|2 firmware
+  * USB: option: support hi speed for modem Haier CE100
+  * USB: Fix a bug on appledisplay.c regarding signedness
+  * USB: musb: gadget_ep0: avoid SetupEnd interrupt
+  * Bluetooth: Prevent ill-timed autosuspend in USB driver
+  * USB: rename usb_configure_device
+  * USB: fix bugs in usb_(de)authorize_device
+  * drivers/net/usb: Correct code taking the size of a pointer
+  * x86: SGI UV: Fix writes to led registers on remote uv hubs
+  * md: Fix unfortunate interaction with evms
+  * dma: at_hdmac: correct incompatible type for argument 1 of
+    'spin_lock_bh'
+  * dma-debug: Do not add notifier when dma debugging is disabled.
+  * dma-debug: Fix bug causing build warning
+  * cifs: NULL out tcon, pSesInfo, and srvTcp pointers when chasing DFS
+    referrals
+  * x86/amd-iommu: Fix initialization failure panic
+  * ioat3: fix p-disabled q-continuation
+  * ioat2,3: put channel hardware in known state at init
+  * KVM: MMU: remove prefault from invlpg handler
+  * KVM: LAPIC: make sure IRR bitmap is scanned after vm load
+  * Libertas: fix buffer overflow in lbs_get_essid()
+  * iwmc3200wifi: fix array out-of-boundary access
+  * mac80211: fix propagation of failed hardware reconfigurations
+  * mac80211: fix WMM AP settings application
+  * mac80211: Fix IBSS merge
+  * cfg80211: fix race between deauth and assoc response
+  * ath5k: fix SWI calibration interrupt storm
+  * ath9k: wake hardware for interface IBSS/AP/Mesh removal
+  * ath9k: Fix TX queue draining
+  * ath9k: fix missed error codes in the tx status check
+  * ath9k: wake hardware during AMPDU TX actions
+  * ath9k: fix suspend by waking device prior to stop
+  * ath9k_hw: Fix possible OOB array indexing in gen_timer_index[] on
+    64-bit
+  * ath9k_hw: Fix AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB and its shift value
+    in 0x4054
+  * iwl3945: disable power save
+  * iwl3945: fix panic in iwl3945 driver
+  * iwlwifi: fix EEPROM/OTP reading endian annotations and a bug
+  * iwlwifi: fix more eeprom endian bugs
+  * iwlwifi: fix 40MHz operation setting on cards that do not allow it
+  * mac80211: fix race with suspend and dynamic_ps_disable_work
+  * NOMMU: Optimise away the {dac_,}mmap_min_addr tests
+  * 'sysctl_max_map_count' should be non-negative
+  * kernel/sysctl.c: fix the incomplete part of
+    sysctl_max_map_count-should-be-non-negative.patch
+  * V4L/DVB (13596): ov511.c typo: lock => unlock
+  * x86/ptrace: make genregs[32]_get/set more robust
+  * memcg: avoid oom-killing innocent task in case of use_hierarchy
+  * e100: Fix broken cbs accounting due to missing memset.
+  * ipv6: reassembly: use seperate reassembly queues for conntrack and
+    local delivery
+  * netfilter: fix crashes in bridge netfilter caused by fragment jumps
+  * hwmon: (sht15) Off-by-one error in array index + incorrect constants
+  * b43: avoid PPC fault during resume
+  * Keys: KEYCTL_SESSION_TO_PARENT needs TIF_NOTIFY_RESUME architecture
+    support
+  * sched: Fix balance vs hotplug race
+  * drm/radeon/kms: fix crtc vblank update for r600
+  * drm: disable all the possible outputs/crtcs before entering KMS mode
+  * S390: dasd: support DIAG access for read-only devices
+  * xen: fix is_disconnected_device/exists_disconnected_device
+  * xen: improvement to wait_for_devices()
+  * xen: wait up to 5 minutes for device connetion
+  * orinoco: fix GFP_KERNEL in orinoco_set_key with interrupts disabled
+  * udf: Try harder when looking for VAT inode
+  * Add unlocked version of inode_add_bytes() function
+  * quota: decouple fs reserved space from quota reservation
+  * ext4: Convert to generic reserved quota's space management.
+  * ext4: fix sleep inside spinlock issue with quota and dealloc (#14739)
+  * x86, msr: Unify rdmsr_on_cpus/wrmsr_on_cpus
+  * cpumask: use modern cpumask style in drivers/edac/amd64_edac.c
+  * amd64_edac: unify MCGCTL ECC switching
+  * x86, msr: Add support for non-contiguous cpumasks
+  * x86, msr: msrs_alloc/free for CONFIG_SMP=n
+  * amd64_edac: fix driver instance freeing
+  * amd64_edac: make driver loading more robust
+  * amd64_edac: fix forcing module load/unload
+  * sched: Sched_rt_periodic_timer vs cpu hotplug
+  * ext4: Update documentation to correct the inode_readahead_blks option
+    name
+  * lguest: fix bug in setting guest GDT entry
+  * vmscan: do not evict inactive pages when skipping an active list scan
+  * ksm: fix mlockfreed to munlocked
+  * rt2x00: Disable powersaving for rt61pci and rt2800pci.
+  * generic_permission: MAY_OPEN is not write access
+  * Linux 2.6.32.3
+  * untangle the do_mremap() mess
+  * fasync: split 'fasync_helper()' into separate add/remove functions
+  * ASoC: fix params_rate() macro use in several codecs
+  * modules: Skip empty sections when exporting section notes
+  * exofs: simple_write_end does not mark_inode_dirty
+  * nfsd: make sure data is on disk before calling ->fsync
+  * sunrpc: fix peername failed on closed listener
+  * SUNRPC: Fix up an error return value in
+    gss_import_sec_context_kerberos()
+  * SUNRPC: Fix the return value in gss_import_sec_context()
+  * sunrpc: on successful gss error pipe write, don't return error
+  * drm/i915: Update LVDS connector status when receiving ACPI LID event
+  * drm/i915: fix order of fence release wrt flushing
+  * drm/i915: Permit pinning whilst the device is 'suspended'
+  * drm: remove address mask param for drm_pci_alloc()
+  * drm/i915: Enable/disable the dithering for LVDS based on VBT setting
+  * drm/i915: Make the BPC in FDI rx/transcoder be consistent with that in
+    pipeconf on Ironlake
+  * drm/i915: Select the correct BPC for LVDS on Ironlake
+  * drm/i915: fix unused var
+  * rtc_cmos: convert shutdown to new pnp_driver->shutdown
+  * drivers/cpuidle/governors/menu.c: fix undefined reference to
+    `__udivdi3'
+  * cgroups: fix 2.6.32 regression causing BUG_ON() in cgroup_diput()
+  * lib/rational.c needs module.h
+  * dma-debug: allow DMA_BIDIRECTIONAL mappings to be synced with
+    DMA_FROM_DEVICE and
+  * kernel/signal.c: fix kernel information leak with print-fatal-signals=1
+  * mmc_block: add dev_t initialization check
+  * mmc_block: fix probe error cleanup bug
+  * mmc_block: fix queue cleanup
+  * ALSA: hda - Fix ALC861-VD capture source mixer
+  * ALSA: ac97: Add Dell Dimension 2400 to Headphone/Line Jack Sense
+    blacklist
+  * ALSA: atiixp: Specify codec for Foxconn RC4107MA-RS2
+    - LP: #498863
+  * ASoC: Fix WM8350 DSP mode B configuration
+  * netfilter: ebtables: enforce CAP_NET_ADMIN
+  * netfilter: nf_ct_ftp: fix out of bounds read in update_nl_seq()
+  * hwmon: (coretemp) Fix TjMax for Atom N450/D410/D510 CPUs
+  * hwmon: (adt7462) Fix pin 28 monitoring
+  * quota: Fix dquot_transfer for filesystems different from ext4
+  * xen: fix hang on suspend.
+  * iwlwifi: fix iwl_queue_used bug when read_ptr == write_ptr
+  * ath5k: Fix eeprom checksum check for custom sized eeproms
+  * cfg80211: fix syntax error on user regulatory hints
+  * iwl: off by one bug
+  * mac80211: add missing sanity checks for action frames
+  * drm/i915: remove render reclock support
+  * libertas: Remove carrier signaling from the scan code
+  * kernel/sysctl.c: fix stable merge error in NOMMU mmap_min_addr
+  * mac80211: fix skb buffering issue (and fixes to that)
+  * fix braindamage in audit_tree.c untag_chunk()
+  * fix more leaks in audit_tree.c tag_chunk()
+  * module: handle ppc64 relocating kcrctabs when CONFIG_RELOCATABLE=y
+  * ipv6: skb_dst() can be NULL in ipv6_hop_jumbo().
+  * agp/intel-agp: Clear entire GTT on startup
+  * Linux 2.6.32.4
+  * ethtool: Add reset operation
+  * gro: Name the GRO result enumeration type
+  * gro: Change all receive functions to return GRO result codes
+  * sfc: 10Xpress: Initialise pause advertising flags
+  * sfc: 10Xpress: Report support for pause frames
+  * sfc: Remove redundant header gmii.h
+  * sfc: Remove redundant hardware initialisation
+  * sfc: Rename Falcon-specific board code and types
+  * sfc: Remove boards.h, moving last remaining declaration to falcon.h
+  * sfc: Remove versioned bitfield macros
+  * sfc: Move RX data FIFO thresholds out of struct efx_nic_type
+  * sfc: Update hardware definitions for Siena
+  * sfc: Rename register I/O header and functions used by both Falcon and
+    Siena
+  * sfc: Eliminate indirect lookups of queue size constants
+  * sfc: Define DMA address mask explicitly in terms of descriptor field
+    width
+  * sfc: Move all TX DMA length limiting into tx.c
+  * sfc: Change order of device removal to reverse of probe order
+  * sfc: Remove declarations of nonexistent functions
+  * sfc: Move efx_xmit_done() declaration into correct stanza
+  * sfc: Move shared members of struct falcon_nic_data into struct efx_nic
+  * sfc: Maintain interrupt moderation values in ticks, not microseconds
+  * sfc: Removed kernel-doc for nonexistent member of efx_phy_operations
+  * sfc: Remove pointless abstraction of memory BAR number
+  * sfc: Remove incorrect assertion from efx_pci_remove_main()
+  * sfc: Remove unnecessary tests of efx->membase
+  * sfc: Move MTD probe after netdev registration and name allocation
+  * sfc: Remove unused code for non-autoneg speed/duplex switching
+  * sfc: Rename 'xfp' file and functions to reflect reality
+  * sfc: Really allow RX checksum offload to be disabled
+  * sfc: Feed GRO result into RX allocation policy and interrupt moderation
+  * sfc: Enable heuristic selection between page and skb RX buffers
+  * sfc: Remove pointless abstraction of memory BAR number (2)
+  * sfc: Remove redundant gotos from __efx_rx_packet()
+  * sfc: Remove ridiculously paranoid assertions
+  * sfc: Move assertions and buffer cleanup earlier in efx_rx_packet_lro()
+  * sfc: Record RX queue number on GRO path
+  * sfc: SFT9001: Reset LED configuration correctly after blinking
+  * sfc: Use a single blink implementation
+  * sfc: Rename efx_board::init_leds to init_phy and use for SFN4111T
+  * sfc: Make board information explicitly Falcon-specific
+  * sfc: Move definition of struct falcon_nic_data into falcon.h
+  * sfc: Move struct falcon_board into struct falcon_nic_data
+  * sfc: Move all I2C stuff into struct falcon_board
+  * sfc: Gather link state fields in struct efx_nic into new struct
+    efx_link_state
+  * sfc: Remove unnecessary casts to struct sk_buff *
+  * sfc: Remove redundant efx_xmit() function
+  * sfc: Combine high-level header files
+  * sfc: Log interrupt and reset type names, not numbers
+  * sfc: Fix descriptor cache sizes
+  * sfc: Treat all MAC registers as 128-bit
+  * sfc: Strengthen EFX_ASSERT_RESET_SERIALISED
+  * sfc: Comment corrections
+  * sfc: Remove unused constant
+  * sfc: Clean up struct falcon_board and struct falcon_board_data
+  * sfc: Fix bugs in RX queue flushing
+  * sfc: Remove unused function efx_flush_queues()
+  * sfc: Only switch Falcon MAC clocks as necessary
+  * sfc: Hold MAC lock for longer in efx_init_port()
+  * sfc: Split MAC stats DMA initiation and completion
+  * sfc: Move Falcon board/PHY/MAC monitoring code to falcon.c
+  * sfc: Simplify XMAC link polling
+  * sfc: Change MAC promiscuity and multicast hash at the same time
+  * sfc: Move inline comment into kernel-doc
+  * sfc: Do not set net_device::trans_start in self-test
+  * sfc: Simplify PHY polling
+  * sfc: QT202x: Reset before reading PHY id
+  * sfc: Replace MDIO spinlock with mutex
+  * sfc: Always start Falcon using the XMAC
+  * sfc: Limit some hardware workarounds to Falcon
+  * sfc: Remove EFX_WORKAROUND_9141 macro
+  * sfc: Remove another unused workaround macro
+  * sfc: Remove some redundant whitespace
+  * sfc: Decouple NIC revision number from Falcon PCI revision number
+  * sfc: Move descriptor cache base addresses to struct efx_nic_type
+  * sfc: Clean up RX event handling
+  * sfc: Remove redundant writes to INT_ADR_KER
+  * sfc: Remove duplicate hardware structure definitions
+  * sfc: Turn pause frame generation on and off at the MAC, not the RX FIFO
+  * sfc: Move Falcon NIC operations to efx_nic_type
+  * sfc: Refactor link configuration
+  * sfc: Generalise link state monitoring
+  * sfc: Add power-management and wake-on-LAN support
+  * sfc: Implement ethtool reset operation
+  * sfc: Add efx_nic_type operation for register self-test
+  * sfc: Add efx_nic_type operation for NVRAM self-test
+  * sfc: Add efx_nic_type operation for identity LED control
+  * sfc: Separate shared NIC code from Falcon-specific and rename
+    accordingly
+  * sfc: Fold falcon_probe_nic_variant() into falcon_probe_nic()
+  * sfc: Extend loopback mode enumeration
+  * sfc: Remove static PHY data and enumerations
+  * sfc: Extend MTD driver for use with new NICs
+  * sfc: Allow for additional checksum offload features
+  * sfc: Rename falcon.h to nic.h
+  * sfc: Move shared NIC code from falcon.c to new source file nic.c
+  * sfc: Add firmware protocol definitions (MCDI)
+  * sfc: Add support for SFC9000 family (1)
+  * sfc: Add support for SFC9000 family (2)
+  * sfc: Implement TSO for TCP/IPv6
+  * sfc: Update version, copyright dates, authors
+  * drivers/net/sfc: Correct code taking the size of a pointer
+  * sfc: Move PHY software state initialisation from init() into probe()
+  * sfc: Include XGXS in XMAC link status check except in XGMII loopback
+  * sfc: Fix DMA mapping cleanup in case of an error in TSO
+  * sfc: QT2025C: Work around PHY bug
+  * sfc: QT2025C: Switch into self-configure mode when not in loopback
+  * sfc: QT2025C: Work around PHY firmware initialisation bug
+  * sfc: QT2025C: Add error message for suspected bad SFP+ cables
+  * sfc: Disable TX descriptor prefetch watchdog
+  * [SCSI] vmw_pvscsi: SCSI driver for VMware's virtual HBA.
+    - LP: #497156
+
+ -- Andy Whitcroft <apw@canonical.com>  Tue, 19 Jan 2010 16:12:47 +0000
+
+linux (2.6.32-10.14) lucid; urgency=low
+
+  [ Alex Deucher ]
+
+  * SAUCE: drm/radeon/kms: fix LVDS setup on r4xx
+    - LP: #493795
+
+  [ Andy Whitcroft ]
+
+  * Revert "(pre-stable) acpi: Use the ARB_DISABLE for the CPU which model
+    id is less than 0x0f."
+  * config-check -- ensure the checks get run at build time
+  * config-check -- check the processed config during updateconfigs
+  * config-check -- CONFIG_SECCOMP may not be present
+  * TUN is now built in ignore
+  * SAUCE: acpi battery -- delay first lookup of the battery until first
+    use
+  * SAUCE: async_populate_rootfs: move rootfs init earlier
+  * ubuntu: AppArmor -- update to mainline 2010-01-06
+  * SAUCE: move RLIMIT_CORE pipe dumper marker to 1
+    - LP: #498525
+
+  [ Dave Airlie ]
+
+  * (pre-stable) drm/radeon/kms: fix crtc vblank update for r600
+
+  [ Leann Ogasawara ]
+
+  * Add asix to nic-usb-modules file
+    - LP: #499785
+
+  [ Peter Zijlstra ]
+
+  * (pre-stable) sched: Fix balance vs hotplug race
+
+  [ Tim Gardner ]
+
+  * [Config] Enable CONFIG_FUNCTION_TRACER
+    - LP: #497989
+  * [Config] Drop lpia from getabis
+  * [Config] Build in TUN/TAP driver
+    - LP: #499491
+  * [Config] DH_COMPAT=5
+
+  [ Upstream Kernel Changes ]
+
+  * Revert "(pre-stable) drm/i915: Avoid NULL dereference with
+    component_only tv_modes"
+  * Revert "(pre-stable) drm/i915: Fix sync to vblank when VGA output is
+    turned off"
+  * USB: usb-storage: fix bug in fill_inquiry
+  * USB: option: add pid for ZTE
+  * firewire: ohci: handle receive packets with a data length of zero
+  * rcu: Prepare for synchronization fixes: clean up for non-NO_HZ handling
+    of ->completed counter
+  * rcu: Fix synchronization for rcu_process_gp_end() uses of ->completed
+    counter
+  * rcu: Fix note_new_gpnum() uses of ->gpnum
+  * rcu: Remove inline from forward-referenced functions
+  * perf_event: Fix invalid type in ioctl definition
+  * perf_event: Initialize data.period in perf_swevent_hrtimer()
+  * perf: Don't free perf_mmap_data until work has been done
+  * PM / Runtime: Fix lockdep warning in __pm_runtime_set_status()
+  * sched: Check for an idle shared cache in select_task_rq_fair()
+  * sched: Fix affinity logic in select_task_rq_fair()
+  * sched: Rate-limit newidle
+  * sched: Fix and clean up rate-limit newidle code
+  * x86/amd-iommu: attach devices to pre-allocated domains early
+  * x86/amd-iommu: un__init iommu_setup_msi
+  * x86, Calgary IOMMU quirk: Find nearest matching Calgary while walking
+    up the PCI tree
+  * x86: Fix iommu=nodac parameter handling
+  * x86: GART: pci-gart_64.c: Use correct length in strncmp
+  * x86: ASUS P4S800 reboot=bios quirk
+    - LP: #366682
+  * x86, apic: Enable lapic nmi watchdog on AMD Family 11h
+  * ssb: Fix range check in sprom write
+  * ath5k: allow setting txpower to 0
+  * ath5k: enable EEPROM checksum check
+  * hrtimer: Fix /proc/timer_list regression
+  * ALSA: hrtimer - Fix lock-up
+  * ALSA: hda - Terradici HDA controllers does not support 64-bit mode
+  * KVM: x86 emulator: limit instructions to 15 bytes
+  * KVM: s390: Fix prefix register checking in arch/s390/kvm/sigp.c
+  * KVM: s390: Make psw available on all exits, not just a subset
+  * KVM: fix irq_source_id size verification
+  * KVM: x86: include pvclock MSRs in msrs_to_save
+  * x86: Prevent GCC 4.4.x (pentium-mmx et al) function prologue wreckage
+  * x86: Use -maccumulate-outgoing-args for sane mcount prologues
+  * x86, mce: don't restart timer if disabled
+  * x86/mce: Set up timer unconditionally
+  * x86: SGI UV: Fix BAU initialization
+  * x86: Fix duplicated UV BAU interrupt vector
+  * x86: Add new Intel CPU cache size descriptors
+  * x86: Fix typo in Intel CPU cache size descriptor
+  * pata_hpt{37x|3x2n}: fix timing register masks (take 2)
+  * s390: clear high-order bits of registers after sam64
+  * V4L/DVB: Fix test in copy_reg_bits()
+  * bsdacct: fix uid/gid misreporting
+  * UBI: flush wl before clearing update marker
+  * jbd2: don't wipe the journal on a failed journal checksum
+  * USB: xhci: Add correct email and files to MAINTAINERS entry.
+  * USB: musb_gadget_ep0: fix unhandled endpoint 0 IRQs, again
+  * USB: option.c: add support for D-Link DWM-162-U5
+  * USB: usbtmc: repeat usb_bulk_msg until whole message is transfered
+  * USB: usb-storage: add BAD_SENSE flag
+  * USB: Close usb_find_interface race v3
+  * pxa/em-x270: fix usb hub power up/reset sequence
+  * hfs: fix a potential buffer overflow
+  * SUNRPC: IS_ERR/PTR_ERR confusion
+  * NFS: Fix nfs_migrate_page()
+  * md/bitmap: protect against bitmap removal while being updated.
+  * futex: Take mmap_sem for get_user_pages in fault_in_user_writeable
+  * devpts_get_tty() should validate inode
+  * debugfs: fix create mutex racy fops and private data
+  * Driver core: fix race in dev_driver_string
+  * Serial: Do not read IIR in serial8250_start_tx when UART_BUG_TXEN
+  * mac80211: Fix bug in computing crc over dynamic IEs in beacon
+  * mac80211: Fixed bug in mesh portal paths
+  * mac80211: Revert 'Use correct sign for mesh active path refresh'
+  * mac80211: fix scan abort sanity checks
+  * wireless: correctly report signal value for IEEE80211_HW_SIGNAL_UNSPEC
+  * rtl8187: Fix wrong rfkill switch mask for some models
+  * x86: Fix bogus warning in apic_noop.apic_write()
+  * mm: hugetlb: fix hugepage memory leak in mincore()
+  * mm: hugetlb: fix hugepage memory leak in walk_page_range()
+  * powerpc/windfarm: Add detection for second cpu pump
+  * powerpc/therm_adt746x: Record pwm invert bit at module load time]
+  * powerpc: Fix usage of 64-bit instruction in 32-bit altivec code
+  * drm/radeon/kms: Add quirk for HIS X1300 board
+  * drm/radeon/kms: handle vblanks properly with dpms on
+  * drm/radeon/kms: fix legacy crtc2 dpms
+  * drm/radeon/kms: fix vram setup on rs600
+  * drm/radeon/kms: rs6xx/rs740: clamp vram to aperture size
+  * drm/ttm: Fix build failure due to missing struct page
+  * drm/i915: Set the error code after failing to insert new offset into mm
+    ht.
+  * drm/i915: Add the missing clonemask for display port on Ironlake
+  * xen/xenbus: make DEVICE_ATTR()s static
+  * xen: re-register runstate area earlier on resume.
+  * xen: restore runstate_info even if !have_vcpu_info_placement
+  * xen: correctly restore pfn_to_mfn_list_list after resume
+  * xen: register timer interrupt with IRQF_TIMER
+  * xen: register runstate on secondary CPUs
+  * xen: don't call dpm_resume_noirq() with interrupts disabled.
+  * xen: register runstate info for boot CPU early
+  * xen: call clock resume notifier on all CPUs
+  * xen: improve error handling in do_suspend.
+  * xen: don't leak IRQs over suspend/resume.
+  * xen: use iret for return from 64b kernel to 32b usermode
+  * xen: explicitly create/destroy stop_machine workqueues outside
+    suspend/resume region.
+  * Xen balloon: fix totalram_pages counting.
+  * xen: try harder to balloon up under memory pressure.
+  * dm exception store: free tmp_store on persistent flag error
+  * dm snapshot: only take lock for statustype info not table
+  * dm crypt: move private iv fields to structs
+  * dm crypt: restructure essiv error path
+  * dm: avoid _hash_lock deadlock
+  * dm snapshot: cope with chunk size larger than origin
+  * dm crypt: separate essiv allocation from initialisation
+  * dm crypt: make wipe message also wipe essiv key
+  * slc90e66: fix UDMA handling
+  * tcp: Stalling connections: Fix timeout calculation routine
+  * ip_fragment: also adjust skb->truesize for packets not owned by a
+    socket
+  * b44 WOL setup: one-bit-off stack corruption kernel panic fix
+  * sparc64: Don't specify IRQF_SHARED for LDC interrupts.
+  * sparc64: Fix overly strict range type matching for PCI devices.
+  * sparc64: Fix stack debugging IRQ stack regression.
+  * sparc: Set UTS_MACHINE correctly.
+  * b43legacy: avoid PPC fault during resume
+  * tracing: Fix event format export
+  * ath9k: Fix TX hang poll routine
+  * ath9k: fix processing of TX PS null data frames
+  * ath9k: Fix maximum tx fifo settings for single stream devices
+  * ath9k: fix tx status reporting
+  * mac80211: Fix dynamic power save for scanning.
+  * drm/i915: Fix sync to vblank when VGA output is turned off
+  * memcg: fix memory.memsw.usage_in_bytes for root cgroup
+  * thinkpad-acpi: fix default brightness_mode for R50e/R51
+  * thinkpad-acpi: preserve rfkill state across suspend/resume
+  * ipw2100: fix rebooting hang with driver loaded
+  * matroxfb: fix problems with display stability
+  * acerhdf: add new BIOS versions
+  * asus-laptop: change light sens default values.
+  * vmalloc: conditionalize build of pcpu_get_vm_areas()
+  * ACPI: Use the ARB_DISABLE for the CPU which model id is less than 0x0f.
+  * net: Fix userspace RTM_NEWLINK notifications.
+  * ext3: Fix data / filesystem corruption when write fails to copy data
+  * V4L/DVB (13116): gspca - ov519: Webcam 041e:4067 added.
+  * bcm63xx_enet: fix compilation failure after get_stats_count removal
+  * x86: Under BIOS control, restore AP's APIC_LVTTHMR to the BSP value
+  * drm/i915: Avoid NULL dereference with component_only tv_modes
+  * drm/i915: PineView only has LVDS and CRT ports
+  * drm/i915: Fix LVDS stability issue on Ironlake
+  * mm: sigbus instead of abusing oom
+  * ipvs: zero usvc and udest
+  * jffs2: Fix long-standing bug with symlink garbage collection.
+  * intel-iommu: Detect DMAR in hyperspace at probe time.
+  * intel-iommu: Apply BIOS sanity checks for interrupt remapping too.
+  * intel-iommu: Check for an RMRR which ends before it starts.
+  * intel-iommu: Fix oops with intel_iommu=igfx_off
+  * intel-iommu: ignore page table validation in pass through mode
+  * netfilter: xtables: document minimal required version
+  * perf_event: Fix incorrect range check on cpu number
+  * implement early_io{re,un}map for ia64
+  * Linux 2.6.32.2
+
+ -- Andy Whitcroft <apw@canonical.com>  Thu, 07 Jan 2010 15:28:43 +0000
+
+linux (2.6.32-9.13) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * [Config] enable CONFIG_B43_PHY_LP
+    - LP: #493059
+  * include modules.builtin in the binary debs
+  * config-check -- add a configuration enforcer
+  * config-check -- add a unit-test suite to the checker
+  * [Config] Enable CONFIG_SYN_COOKIES for versatile
+  * [Config] Enable CONFIG_SECURITY_SMACK for ports
+  * [Config] Enable CONFIG_SECURITY_FILE_CAPABILITIES for ports
+  * [Config] Disable CONFIG_COMPAT_BRK for ports
+  * getabis -- add armel versatile to the list
+
+  [ Brad Figg ]
+
+  * SAUCE: Increase the default prealloc buffer for HDA audio devices
+    (non-modem)
+
+  [ Manoj Iyer ]
+
+  * ubuntu: onmibook -- Added missing BOM file
+
+  [ Tim Gardner ]
+
+  * ubuntu: fsam7400 -- Cleanup Makefile
+
+  [ Upstream Kernel Changes ]
+
+  * Revert "ext4: Fix insufficient checks in EXT4_IOC_MOVE_EXT"
+  * signal: Fix alternate signal stack check
+  * SCSI: scsi_lib_dma: fix bug with dma maps on nested scsi objects
+  * SCSI: osd_protocol.h: Add missing #include
+  * SCSI: megaraid_sas: fix 64 bit sense pointer truncation
+  * ext4: fix potential buffer head leak when add_dirent_to_buf() returns
+    ENOSPC
+  * ext4: avoid divide by zero when trying to mount a corrupted file system
+  * ext4: fix the returned block count if EXT4_IOC_MOVE_EXT fails
+  * ext4: fix lock order problem in ext4_move_extents()
+  * ext4: fix possible recursive locking warning in EXT4_IOC_MOVE_EXT
+  * ext4: plug a buffer_head leak in an error path of ext4_iget()
+  * ext4: make sure directory and symlink blocks are revoked
+  * ext4: fix i_flags access in ext4_da_writepages_trans_blocks()
+  * ext4: journal all modifications in ext4_xattr_set_handle
+  * ext4: don't update the superblock in ext4_statfs()
+  * ext4: fix uninit block bitmap initialization when s_meta_first_bg is
+    non-zero
+  * ext4: fix block validity checks so they work correctly with meta_bg
+  * ext4: avoid issuing unnecessary barriers
+  * ext4: fix error handling in ext4_ind_get_blocks()
+  * ext4: make trim/discard optional (and off by default)
+  * ext4: make "norecovery" an alias for "noload"
+  * ext4: Fix double-free of blocks with EXT4_IOC_MOVE_EXT
+  * ext4: initialize moved_len before calling ext4_move_extents()
+  * ext4: move_extent_per_page() cleanup
+  * jbd2: Add ENOMEM checking in and for
+    jbd2_journal_write_metadata_buffer()
+  * ext4: Return the PTR_ERR of the correct pointer in
+    setup_new_group_blocks()
+  * ext4: Avoid data / filesystem corruption when write fails to copy data
+  * ext4: wait for log to commit when umounting
+  * ext4: remove blocks from inode prealloc list on failure
+  * ext4: ext4_get_reserved_space() must return bytes instead of blocks
+  * ext4: quota macros cleanup
+  * ext4: fix incorrect block reservation on quota transfer.
+  * ext4: Wait for proper transaction commit on fsync
+  * ext4: Fix insufficient checks in EXT4_IOC_MOVE_EXT
+  * ext4: Fix potential fiemap deadlock (mmap_sem vs. i_data_sem)
+  * Linux 2.6.32.1
+  * kbuild: generate modules.builtin
+  * (pre-stable) drm/i915: Fix sync to vblank when VGA output is turned off
+    - LP: #494461
+  * (pre-stable) drm/i915: Avoid NULL dereference with component_only
+    tv_modes
+    - LP: #494045
+
+  [ Zhao Yakui ]
+
+  * (pre-stable) acpi: Use the ARB_DISABLE for the CPU which model id is
+    less than 0x0f.
+    - LP: #481765
+
+ -- Andy Whitcroft <apw@canonical.com>  Thu, 17 Dec 2009 15:41:21 +0000
+
+linux (2.6.32-8.12) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * SAUCE: AppArmor -- add linux/err.h for ERR_PTR
+
+ -- Andy Whitcroft <apw@canonical.com>  Sat, 12 Dec 2009 10:56:16 +0000
+
+linux (2.6.32-8.11) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * Revert "SAUCE: default ATI Radeon KMS to off until userspace catches
+    up"
+  * Revert "SAUCE: AppArmor: Fix oops there is no tracer and doing unsafe
+    transition."
+  * Revert "SAUCE: AppArmor: Fix refcounting bug causing leak of creds"
+  * Revert "SAUCE: AppArmor: Fix cap audit_caching preemption disabling"
+  * Revert "SAUCE: AppArmor: Fix Oops when in apparmor_bprm_set_creds"
+  * Revert "SAUCE: AppArmor: Fix oops after profile removal"
+  * Revert "SAUCE: AppArmor: AppArmor disallows truncate of deleted files."
+  * Revert "SAUCE: AppArmor: AppArmor fails to audit change_hat correctly"
+  * Revert "SAUCE: AppArmor: Policy load and replacement can fail to alloc
+    mem"
+  * Revert "SAUCE: AppArmor: AppArmor wrongly reports allow perms as
+    denied"
+  * Revert "SAUCE: AppArmor: Fix mediation of "deleted" paths"
+  * Revert "SAUCE: AppArmor: Fix off by 2 error in getprocattr mem
+    allocation"
+  * Revert "SAUCE: AppArmor: Set error code after structure
+    initialization."
+  * Revert "AppArmor -- fix pstrace_may_access rename"
+  * Revert "ubuntu: AppArmor security module"
+  * Revert "SAUCE: Add config option to set a default LSM"
+  * Revert "ubuntu: fsam7400 -- sw kill switch driver"
+  * Revert "[Config] fsam7400 -- enable"
+  * Revert "[Config] AUFS -- enable"
+  * Revert "ubuntu: AUFS -- aufs2-30 20090727"
+  * Revert "ubuntu: AUFS -- export various core functions -- fixes"
+  * Revert "ubuntu: AUFS -- export various core functions"
+  * Revert "[Config] ubuntu/iscsitarget -- disable"
+  * Revert "[Config] iscsitarget -- enable"
+  * Revert "ubuntu: iscsitarget -- SVN revision r214"
+  * update Vcs-Git to point to the correct repository
+    - LP: #493589
+  * update build environment overrides to lucid
+    - LP: #493589
+  * [Config] enable CONFIG_DEVTMPFS
+  * [Config] update all configs following AppArmor 2009-12-08 update
+  * SAUCE: isapnp_init: make isa PNP scans occur async
+  * [Config] fsam7400 -- enable
+  * [Config] omnibook -- enable
+  * [Config] cleanup CONFIG_AUDIT
+  * ubuntu: AUFS -- export various core functions (aufs2-base.patch)
+  * ubuntu: AUFS -- export various core functions (aufs2-standalone.patch)
+  * ubuntu: AUFS -- aufs2 20091209
+  * [Config] AUFS -- enable
+  * [Config] iscsitarget -- enable
+
+  [ Arjan van de Ven ]
+
+  * SAUCE: KMS: cache the EDID information of the LVDS
+
+  [ Colin Watson ]
+
+  * bnx2: update d-i firmware filenames
+    - LP: #494052
+  * add cdc_ether to nic-usb-modules udeb
+    - LP: #495060
+
+  [ John Johansen ]
+
+  * ubuntu: AppArmor -- mainline 2009-10-08
+
+  [ Manoj Iyer ]
+
+  * ubuntu: fsam7400 -- kill switch for Fujitsu Siemens Amilo M 7400
+  * ubuntu: omnibook -- support Toshiba (HP) netbooks
+  * ubuntu: iscsitarget --- version 1.4.19
+    - LP: #494693
+
+  [ Surbhi Palande ]
+
+  * SAUCE: Make populate_rootfs asynchronous
+
+  [ Tim Gardner ]
+
+  * Parallelize flavour builds and packaging
+  * [Config] Enable CONFIG_KSM
+
+  [ Upstream Kernel Changes ]
+
+  * Config option to set a default LSM
+  * LSM: Add security_path_chroot().
+  * LSM: Add security_path_chroot().
+  * LSM: Move security_path_chmod()/security_path_chown() to after
+    mutex_lock().
+  * ext4: Fix insufficient checks in EXT4_IOC_MOVE_EXT
+
+ -- Andy Whitcroft <apw@canonical.com>  Fri, 11 Dec 2009 17:45:19 +0000
+
+linux (2.6.32-7.10) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * [Config] disable CONFIG_THUMB2_KERNEL to fix arm FTBFS
+
+ -- Andy Whitcroft <apw@canonical.com>  Sun, 06 Dec 2009 12:56:48 +0000
+
+linux (2.6.32-7.9) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * SAUCE: set /proc/acpi/video/*/DOS to 4 by default
+    - LP: #458982
+  * SAUCE: ensure vga16fb loads if no other driver claims the VGA device
+  * [Config] update configs following versatile switch to V7
+  * rebased to v2.6.32
+  * [Config] update configs following rebase to v2.6.32
+  * [Config] update ports configs following rebase to v2.6.32
+  * SAUCE: default ATI Radeon KMS to off until userspace catches up
+
+  [ Arjan van de Ven ]
+
+  * SAUCE: vfs: Add a trace point in the mark_inode_dirty function
+
+  [ Leann Ogasawara ]
+
+  * [SCSI] megaraid_sas: remove sysfs poll_mode_io world writeable
+    permissions
+    - CVE-2009-3939
+
+  [ Loic Minier ]
+
+  * SAUCE: select a v7 CPU for versatile
+
+  [ Takashi Iwai ]
+
+  * SAUCE: ALSA: hda - Add power on/off counter
+
+  [ Upstream changes ]
+
+  * rebased to v2.6.32
+
+ -- Andy Whitcroft <apw@canonical.com>  Fri, 04 Dec 2009 10:44:50 +0000
+
+linux (2.6.32-6.8) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * [Config] disable SSB devices for armel
+
+ -- Andy Whitcroft <apw@canonical.com>  Sat, 28 Nov 2009 12:16:40 +0000
+
+linux (2.6.32-6.7) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * Revert "SAUCE: default ATI Radeon KMS to off until userspace catches up"
+  * Revert "SAUCE: Dell XPS710 reboot quirk"
+  * Revert "SAUCE: Link acpi-cpufreq.o first"
+  * Revert "SAUCE: LPIA  Logical reset of USB port on resume"
+  * Revert "SAUCE: LPIA Reboot fix for Intel Crownbeach development boards"
+  * Revert "SAUCE: Enable HDMI audio codec on Studio XPS 1340"
+  * Revert "SAUCE: Dell laptop digital mic does not work, PCI 1028:0271"
+  * Revert "Add Dell Dimension 9200 reboot quirk"
+  * Revert "SAUCE: Correctly blacklist Thinkpad r40e in ACPI"
+  * Revert "SAUCE: tulip: Define ULI PCI ID's"
+  * Revert "SAUCE: Lower warning level of some PCI messages"
+  * Revert "mac80211: fix two issues in debugfs"
+    Drop a number of known redundant commits as identified in the Ubuntu
+    delta review blueprint.
+
+  * reenable armel versatile flavour
+  * [Config] disable CONFIG_USB_DEVICEFS
+
+  [ Tim Gardner ]
+
+  * [Config] udeb: Add squashfs to fs-core-modules
+    - LP: #352615
+  * [Config] Create a real squashfs udeb
+    - LP: #352615
+
+
+ -- Andy Whitcroft <apw@canonical.com>  Fri, 27 Nov 2009 17:31:16 +0000
+
+linux (2.6.32-5.6) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * rebase to v2.6.32-rc8
+  * update configs following rebase to v2.6.32-rc8
+  * update ports configs since rebase to v2.6.32-rc8
+  * [Config] enable cgroup options
+    - LP: #480739
+
+  [ Upstream Kernel Changes ]
+
+  * rebase to v2.6.32-rc8
+
+ -- Andy Whitcroft <apw@canonical.com>  Mon, 23 Nov 2009 11:16:14 +0000
+
+linux (2.6.32-4.5) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * [Config] SERIO_LIBPS2 and SERIO_I8042 must match
+  * rebase to v2.6.32-rc7
+  * resync with Karmic proposed
+
+  [ John Johansen ]
+
+  * SAUCE: AppArmor: Fix oops after profile removal
+    - LP: #475619
+  * SAUCE: AppArmor: Fix Oops when in apparmor_bprm_set_creds
+    - LP: #437258
+  * SAUCE: AppArmor: Fix cap audit_caching preemption disabling
+    - LP: #479102
+  * SAUCE: AppArmor: Fix refcounting bug causing leak of creds
+    - LP: #479115
+  * SAUCE: AppArmor: Fix oops there is no tracer and doing unsafe
+    transition.
+    - LP: #480112
+
+  [ Ubuntu Changes ]
+
+  * resync with Karmic proposed (ddbc670a86a3dee18541a3734149f250ff307adf)
+
+  [ Upstream Kernel Changes ]
+
+  * rebase to v2.6.32-rc7
+
+ -- Andy Whitcroft <apw@canonical.com>  Fri, 13 Nov 2009 11:35:13 +0000
+
+linux (2.6.32-3.4) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * [Config] SERIO_LIBPS2 and SERIO_I8042 must match
+  * [Upstream] add local prefix to oss local change_bits
+
+  [ Upstream Kernel Changes ]
+
+  * mtd/maps: gpio-addr-flash: pull in linux/ headers rather than asm/
+  * mtd/maps: gpio-addr-flash: depend on GPIO arch support
+
+ -- Andy Whitcroft <apw@canonical.com>  Wed, 11 Nov 2009 14:47:04 +0000
+
+linux (2.6.32-3.3) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * rebase to v2.6.32-rc6
+  * [Config] update configs following rebase to v2.6.32-rc6
+  * [Config] update ports configs following rebase to v2.6.32-rc6
+  * resync with Karmic Ubuntu-2.6.31-15.49
+  * [Config] add module ignores for broken drivers
+
+  [ John Johansen ]
+
+  * SAUCE: AppArmor: AppArmor wrongly reports allow perms as denied
+    - LP: #453335
+  * SAUCE: AppArmor: Policy load and replacement can fail to alloc mem
+    - LP: #458299
+  * SAUCE: AppArmor: AppArmor fails to audit change_hat correctly
+    - LP: #462824
+  * SAUCE: AppArmor: AppArmor disallows truncate of deleted files.
+    - LP: #451375
+
+  [ Kees Cook ]
+
+  * SAUCE: Fix nx_enable reporting
+    - LP: #454285
+
+  [ Scott James Remnant ]
+
+  * Revert "SAUCE: trace: add trace_event for the open() syscall"
+  * SAUCE: trace: add trace events for open(), exec() and uselib()
+    - LP: #462111
+
+  [ Stefan Bader ]
+
+  * SAUCE: Fix sub-flavour script to not stop on missing directories
+    - LP: #453073
+
+  [ Ubuntu Changes ]
+
+  * resync with Karmic Ubuntu-2.6.31-15.49
+
+  [ Upstream Kernel Changes ]
+
+  * rebase to v2.6.32-rc6
+    - LP: #464552
+
+ -- Andy Whitcroft <apw@canonical.com>  Tue, 10 Nov 2009 15:00:57 +0000
+
+linux (2.6.32-2.2) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * install the full changelog with the binary package
+  * changelog -- explicitly note rebases and clean history
+  * reinstate armel.mk with no flavours
+    - LP: #449637
+  * [Upstream] block: silently error unsupported empty barriers too
+    - LP: #420423
+  * [Config] udate configs following karmic resync
+  * [Config] update ports configs following karmic resync
+  * [Upstream] lirc -- follow removal of .id element
+
+  [ Colin Watson ]
+
+  * Use section 'admin' rather than 'base'
+  * Add more e100 firmware to nic-modules
+    - LP: #451872
+  * Add qla1280 firmware to scsi-modules
+    - LP: #381037
+
+  [ John Johansen ]
+
+  * SAUCE: AppArmor: Set error code after structure initialization.
+    - LP: #427948
+  * SAUCE: AppArmor: Fix off by 2 error in getprocattr mem allocation
+    - LP: #446595
+  * SAUCE: AppArmor: Fix mediation of "deleted" paths
+
+  [ Kees Cook ]
+
+  * SAUCE: [x86] fix report of cs-limit nx-emulation
+    - LP: #454285
+
+  [ Leann Ogasawara ]
+
+  * SAUCE: (drop after 2.6.31) input: Add support for filtering input
+    events
+    - LP: #430809
+  * SAUCE: (drop after 2.6.31) dell-laptop: Trigger rfkill updates on wifi
+    toggle switch press
+    - LP: #430809
+
+  [ Luke Yelavich ]
+
+  * SAUCE: Add sr_mod to the scsi-modules udeb for powerpc
+  * [Config] Add sd_mod to scsi-modules udeb for powerpc
+
+  [ Mario Limonciello ]
+
+  * SAUCE: Update to LIRC 0.8.6
+    - LP: #432678
+  * SAUCE: dell-laptop: Store the HW switch status internally rather than
+    requerying every time
+    - LP: #430809
+  * SAUCE: dell-laptop: Blacklist machines not supporting dell-laptop
+    - LP: #430809
+
+  [ Stefan Bader ]
+
+  * [Upstream] acerhdf: Limit modalias matching to supported boards
+    - LP: #435958
+
+  [ Tim Gardner ]
+
+  * [Upstream] i915: Fix i2c init message
+    - LP: #409361
+  * [Config] Add sym53c8xx.ko to virtual sub-flavour
+    - LP: #439415
+  * [Config] Add d101m_ucode.bin to d-i/firmware/nic-modules
+    - LP: #439456
+  * [Config] Set default I/O scheduler back to CFQ for desktop flavours
+    - LP: #381300
+  * SAUCE: Created MODULE_EXPORT/MODULE_IMPORT macros
+    - LP: #430694
+  * SAUCE: Use MODULE_IMPORT macro to tie intel_agp to i915
+    - LP: #430694
+  * [Config] CONFIG_GFS2_FS_LOCKING_DLM=y
+    - LP: #416325
+  * SAUCE: Fix MODULE_IMPORT/MODULE_EXPORT
+    - LP: #430694
+  * SAUCE: Raise the default console 'quiet' level to 2
+  * [Config] CONFIG_X86_PAT=y
+  * [Config] Add armel arch to linux-libc-dev arches.
+    - LP: #449637
+  * [Config] CONFIG_X86_MCE
+  * [Upstream] (drop after 2.6.31) Input: synaptics - add another Protege
+    M300 to rate blacklist
+    - LP: #433801
+
+  [ Upstream Kernel Changes ]
+
+  * sgi-gru: Fix kernel stack buffer overrun, CVE-2009-2584
+  * drm/i915: Fix FDI M/N setting according with correct color depth
+    - LP: #416792
+
+ -- Andy Whitcroft <apw@canonical.com>  Thu, 22 Oct 2009 16:53:33 +0100
+
+linux (2.6.32-1.1) lucid; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * rebase to v2.6.32-rc3
+  * [Config] update configs following rebase to 2.6.32-rc3
+  * [Config] update ports configs following rebase to 2.6.32-rc3
+  * AppArmor -- fix pstrace_may_access rename
+  * staging/android -- disable
+  * ubuntu: dm-raid-45 -- update to compile with 2.6.32
+  * ubuntu: drbd -- disable
+  * staging/comdi -- disable
+  * staging/go7007 -- disable
+  * [Config] staging/winbond -- disable
+  * [Config] ubuntu/iscsitarget -- disable
+  * [d-i] cbc and ecb are builtin make them optional in udebs
+  * rebase to v2.6.32-rc5
+  * [Config] update configs following rebase to v2.6.32-rc5
+  * [Config] update ports configs following rebase to v2.6.31-rc5
+
+  [ Tim Gardner ]
+
+  * [Config] Add cpio as a build dependency.
+
+  [ Upstream Kernel Changes ]
+
+  * rebase to v2.6.32-rc3
+  * rebase to v2.6.32-rc5
+
+ -- Andy Whitcroft <apw@canonical.com>  Mon, 05 Oct 2009 15:48:58 +0100
+
+linux (2.6.31-11.37) karmic; urgency=low
+
+  [ Tim Gardner ]
+
+  * [Config] Increase kernel log buffer to 256K for amd64 flavours
+    - LP: #424810
+  * [Config] Set HZ=100 for amd64 flavours
+    - LP: #438234
+  * [Upstream] e1000e: Emit notice instead of an error when
+    pci_enable_pcie_error_reporting() fails
+    - LP: #436370
+
+  [ Upstream Kernel Changes ]
+
+  * n_tty: honor opost flag for echoes
+  * n_tty: move echoctl check and clean up logic
+    - LP: #438310
+
+  * Revert "[Upstream] drm/i915: Check that the relocation points to within
+    the target" - Use upstream cherry-pick.
+  * drm/i915: Check that the relocation points to within the target
+    - LP: #429241
+
+  * drm/i915: fix tiling on IGDNG
+  * drm/i915: add B43 chipset support
+  * agp/intel: Add B43 chipset support
+    Intel request from kernel team mailing list.
+
+  * HID: completely remove apple mightymouse from blacklist
+    - LP: #428111
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Mon, 28 Sep 2009 11:47:29 -0600
+
+linux (2.6.31-11.36) karmic; urgency=low
+
+  [ Brian Rogers ]
+
+  * SAUCE: (drop after 2.6.31) em28xx: ir-kbd-i2c init data needs a
+    persistent object
+  * SAUCE: (drop after 2.6.31) saa7134: ir-kbd-i2c init data needs a
+    persistent object
+
+  [ Takashi Iwai ]
+
+  * [Upstream] ALSA: hda - Add another entry for Nvidia HDMI device
+    - LP: #416482
+
+  [ Tyler Hicks ]
+
+  * SAUCE: (drop after 2.6.31) eCryptfs: Prevent lower dentry from going
+    negative during unlink
+
+  [ Upstream Kernel Changes ]
+
+  * sg: fix oops in the error path in sg_build_indirect()
+  * mpt2sas : Rescan topology from Interrupt context instead of work thread
+  * mpt2sas: Prevent sending command to FW while Host Reset
+  * mpt2sas: setting SDEV into RUNNING state from Interrupt context
+  * mpt2sas: Raid 10 Volume is showing as Raid 1E in dmesg
+  * SCSI: fix oops during scsi scanning
+  * SCSI: libsrp: fix memory leak in srp_ring_free()
+  * cfg80211: fix looping soft lockup in find_ie()
+  * ath5k: write PCU registers on initial reset
+  * binfmt_elf: fix PT_INTERP bss handling
+  * TPM: Fixup boot probe timeout for tpm_tis driver
+  * md: Fix "strchr" [drivers/md/dm-log-userspace.ko] undefined!
+  * x86/amd-iommu: fix broken check in amd_iommu_flush_all_devices
+  * fix undefined reference to user_shm_unlock
+  * perf_counter: Fix buffer overflow in perf_copy_attr()
+  * perf_counter: Start counting time enabled when group leader gets
+    enabled
+  * powerpc/perf_counters: Reduce stack usage of power_check_constraints
+  * powerpc: Fix bug where perf_counters breaks oprofile
+  * powerpc/ps3: Workaround for flash memory I/O error
+  * block: don't assume device has a request list backing in nr_requests
+    store
+  * agp/intel: remove restore in resume
+  * ALSA: cs46xx - Fix minimum period size
+  * ASoC: Fix WM835x Out4 capture enumeration
+  * sound: oxygen: work around MCE when changing volume
+  * mlx4_core: Allocate and map sufficient ICM memory for EQ context
+  * perf stat: Change noise calculation to use stddev
+  * x86: Fix x86_model test in es7000_apic_is_cluster()
+  * x86/i386: Make sure stack-protector segment base is cache aligned
+  * PCI: apply nv_msi_ht_cap_quirk on resume too
+  * x86, pat: Fix cacheflush address in change_page_attr_set_clr()
+  * ARM: 5691/1: fix cache aliasing issues between kmap() and kmap_atomic()
+    with highmem
+  * KVM guest: do not batch pte updates from interrupt context
+  * KVM: Fix coalesced interrupt reporting in IOAPIC
+  * KVM: VMX: Check cpl before emulating debug register access
+  * KVM guest: fix bogus wallclock physical address calculation
+  * KVM: x86: Disallow hypercalls for guest callers in rings > 0
+  * KVM: VMX: Fix cr8 exiting control clobbering by EPT
+  * KVM: x86 emulator: Implement zero-extended immediate decoding
+  * KVM: MMU: make __kvm_mmu_free_some_pages handle empty list
+  * KVM: x86 emulator: fix jmp far decoding (opcode 0xea)
+  * KVM: limit lapic periodic timer frequency
+  * libata: fix off-by-one error in ata_tf_read_block()
+  * PCI quirk: update 82576 device ids in SR-IOV quirks list
+  * PCI: Unhide the SMBus on the Compaq Evo D510 USDT
+  * powerpc/pseries: Fix to handle slb resize across migration
+  * Linux 2.6.31.1
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Thu, 24 Sep 2009 13:04:28 -0600
+
+linux (2.6.31-10.35) karmic; urgency=low
+
+  [ Amit Kucheria ]
+
+  * Disable CONFIG_UEVENT_HELPER_PATH
+
+  [ Andy Whitcroft ]
+
+  * [Config] Enable CONFIG_USB_GADGET_DUMMY_HCD
+  * remove the tlsup driver
+  * remove lmpcm logitech driver support
+
+  [ Bryan Wu ]
+
+  * Add 3 missing files to prerm remove file list
+    - LP: #345623, #415832
+
+  [ Chris Wilson ]
+
+  * [Upstream] drm/i915: Check that the relocation points to within the
+    target
+    - LP: #429241
+
+  [ Luke Yelavich ]
+
+  * [Config] Set CONFIG_EXT4_FS=y on ports architectures
+
+  [ Manoj Iyer ]
+
+  * SAUCE: Added quirk to recognize GE0301 3G modem as an interface.
+    - LP: #348861
+
+  [ Tim Gardner ]
+
+  * Revert "[Upstream] ACPI: Add Thinkpad W500, W700, & W700ds to OSI(Linux) white-list"
+  * Revert "[Upstream] ACPI: Add Thinkpad R400 & Thinkpad R500 to OSI(Linux) white-list"
+  * Revert "[Upstream] ACPI: Add Thinkpad X300 & Thinkpad X301 to OSI(Linux) white-list"
+  * Revert "[Upstream] ACPI: Add Thinkpad X200, X200s, X200t to OSI(Linux) white-list"
+  * Revert "[Upstream] ACPI: Add Thinkpad T400 & Thinkpad T500 to OSI(Linux) white-list"
+    Upstream suggests that this is not the right approach.
+
+  * [Config] Set default I/O scheduler to DEADLINE
+    CFQ seems to have some load related problems which are often exacerbated by sreadahead.
+    - LP: #381300
+
+  [ ubuntu@tjworld.net ]
+
+  * SAUCE: ipw2200: Enable LED by default
+    - LP: #21367
+
+  [ Upstream Kernel Changes ]
+
+  * ALSA: hda - Add support for new AMD HD audio devices
+    - LP: #430564
+
+ -- Andy Whitcroft <apw@canonical.com>  Wed, 16 Sep 2009 15:37:49 +0100
+
+linux (2.6.31-10.34) karmic; urgency=low
+
+  [ Ted Tso ]
+
+  * [Upstream] ext3: Don't update superblock write time when filesystem is
+    read-only
+    - LP: #427822
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Tue, 15 Sep 2009 16:00:45 -0600
+
+linux (2.6.31-10.33) karmic; urgency=low
+
+  [ Leann Ogasawara ]
+
+  * [Upstream] dvb-usb: fix tuning with Cinergy T2
+    - LP: #421258
+
+  [ Tim Gardner ]
+
+  * [Config] Unconditionally copy files from sub-flavours lists.
+    (really, really fix it this time)
+    - LP: #423426
+  * [Config] Set CONFIG_CACHEFILES=m for all flavours
+
+  [ Upstream Kernel Changes ]
+
+  * ext4: Don't update superblock write time when filesystem is read-only
+    - LP: #427822
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Tue, 15 Sep 2009 07:50:21 -0600
+
+linux (2.6.31-10.32) karmic; urgency=low
+
+  [ Eric Miao ]
+
+  * [Config] enable module support for memory stick
+    - LP: #159951
+
+  [ Tim Gardner ]
+
+  * [Config] Unconditionally copy files from sub-flavours lists.
+    - LP: #423426
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Thu, 10 Sep 2009 15:57:55 -0600
+
+linux (2.6.31-10.31) karmic; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * rebase to v2.6.31 final
+
+  [ Colin Watson ]
+
+  * [Config] Recommend grub-pc in linux-image
+    - LP: #385741
+
+  [ Ike Panhc ]
+
+  * [Upstream] Pull latest update of lenovo-sl-laptop
+
+  [ Peter Feuerer ]
+
+  * [Upstream] (drop after 2.6.31) acerhdf: fix fan control for AOA150
+    model
+    - LP: #426691
+
+  [ Tim Gardner ]
+
+  * [Config] De-macro some package names.
+
+  [ Upstream Changes ]
+
+  * rebase to 2.6.31 final.
+
+ -- Andy Whitcroft <apw@canonical.com>  Thu, 10 Sep 2009 09:38:10 +0100
+
+linux (2.6.31-10.30) karmic; urgency=low
+
+  [ Amit Kucheria ]
+
+  * [Config] Enable CONFIG_USB_DEVICEFS
+    - LP: #417748
+  * [Config] Populate the config-update template a bit more
+
+  [ Andy Whitcroft ]
+
+  * rebase to v2.6.31-rc9
+  * [Config] update configs following rebase to v2.6.31-rc9
+  * [Config] update ports configs following rebase to v2.6.31-rc9
+
+  [ Colin Ian King ]
+
+  * SAUCE: wireless: hostap, fix oops due to early probing interrupt
+    - LP: #254837
+
+  [ Jerone Young ]
+
+  * [Upstream] ACPI: Add Thinkpad T400 & Thinkpad T500 to OSI(Linux)
+    white-list
+    - LP: #281732
+  * [Upstream] ACPI: Add Thinkpad X200, X200s, X200t to OSI(Linux)
+    white-list
+    - LP: #281732
+  * [Upstream] ACPI: Add Thinkpad X300 & Thinkpad X301 to OSI(Linux)
+    white-list
+    - LP: #281732
+  * [Upstream] ACPI: Add Thinkpad R400 & Thinkpad R500 to OSI(Linux)
+    white-list
+    - LP: #281732
+  * [Upstream] ACPI: Add Thinkpad W500, W700, & W700ds to OSI(Linux)
+    white-list
+    - LP: #281732
+
+  [ John Johansen ]
+
+  * SAUCE: AppArmor: Fix profile attachment for regexp based profile names
+    - LP: #419308
+  * SAUCE: AppArmor: Return the correct error codes on profile
+    addition/removal
+    - LP: #408473
+  * SAUCE: AppArmor: Fix OOPS in profile listing, and display full list
+    - LP: #408454
+  * SAUCE: AppArmor: Fix mapping of pux to new internal permission format
+    - LP: #419222
+  * SAUCE: AppArmor: Fix change_profile failure
+    - LP: #401931
+  * SAUCE: AppArmor: Tell git to ignore generated include files
+    - LP: #419505
+
+  [ Stefan Bader ]
+
+  * [Upstream] acpi: video: Loosen strictness of video bus detection code
+    - LP: #333386
+  * SAUCE: Remove ov511 driver from ubuntu subdirectory
+
+  [ Tim Gardner ]
+
+  * [Config] Exclude char-modules from non-x86 udeb creation
+  * SAUCE: Notify the ACPI call chain of AC events
+  * [Config] CONFIG_SATA_VIA=m
+    - LP: #403385
+  * [Config] Build in all phylib support modules.
+  * [Config] Don't fail when sub-flavour files are missing
+    - LP: #423426
+  * [Config] Set CONFIG_LSM_MMAP_MIN_ADDR=0
+    - LP: #423513
+
+  [ Upstream ]
+
+  * Rebased against v2.6.31-rc9
+
+ -- Andy Whitcroft <apw@canonical.com>  Mon, 07 Sep 2009 11:33:45 +0100
+
+linux (2.6.31-9.29) karmic; urgency=low
+
+  [ Leann Ogasawara ]
+
+  * [Upstream] agp/intel: support for new chip variant of IGDNG mobile
+    - LP: #419993
+  * [Config] d-i/modules: Add new char-modules file, initialize with
+    intel-agp
+    - LP: #420605
+
+  [ Upstream ]
+
+  * Rebased against 2.6.31-rc8 plus some inotify regression patches:
+    up through git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git
+    adda766193ea1cf3137484a9521972d080d0b7af.
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Fri, 28 Aug 2009 06:31:30 -0600
+
+linux (2.6.31-8.28) karmic; urgency=low
+
+  [ Ike Panhc ]
+
+  * [Config] Let nic-shared-modules depends on crypto-modules
+    - LP: #360966
+
+  [ Leann Ogasawara ]
+
+  * [Upstream] (drop after 2.6.31) drm/i915: increase default latency
+    constant
+    - LP: #412492
+
+  [ Mario Limonciello ]
+
+  * [Upstream]: (drop after 2.6.31) dell-laptop: don't change softblock
+    status if HW switch is disabled
+    - LP: #418721
+  * [Upstream]: (drop after 2.6.31) compal-laptop: Add support for known
+    Compal made Dell laptops
+  * [Upstream]: (drop after 2.6.31) compal-laptop: Replace sysfs support
+    with rfkill support
+
+  [ Tim Gardner ]
+
+  * [Config] Add acpiphp to virtual sub-flavour
+    - LP: #364916
+  * Drop KSM patch set for now because of instabilities with encrypted swap.
+    - LP: #418781
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Wed, 26 Aug 2009 08:14:26 -0600
+
+linux (2.6.31-7.27) karmic; urgency=low
+
+  [ Tim Gardner ]
+
+  * [Config] updateconfigs updateportsconfigs after 2.6.31-rc7 rebase
+  * SAUCE: (drop after 2.6.31) Added KSM from mmotm-2009-08-20-19-18
+    Replaces previous ksm patches from 2.6.31-6.25
+  * [Config] KSM=y
+
+  [ Upstream ]
+
+  * Rebased against v2.6.31-rc7
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Sat, 22 Aug 2009 20:32:11 -0600
+
+linux (2.6.31-6.26) karmic; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * [Config] enable CONFIG_AUFS_BR_RAMFS
+    - LP: #414738
+  * split out debian directory ready for abstraction
+  * add printdebian target to find branch target
+  * abstracted debian -- debian/files is not abstracted
+  * abstracted debian -- packages must be built in debian/<pkg>
+  * abstracted debian -- kernel-wedge needs to work in debian/
+  * abstracted debian -- ensure we install the copyright file
+  * abstracted-debian -- drop the debian directories from headers
+  * abstracted-debian -- drop the debian directories from headers part 2
+  * SAUCE: ubuntu-insert-changes -- follow abstracted debian
+  * [Upstream] aoe: ensure we initialise the request_queue correctly V2
+    - LP: #410198
+
+  [ Luke Yelavich ]
+
+  * [Config] Ports: Disable CONFIG_CPU_FREQ_DEBUG on powerpc-smp
+  * [Config] Ports: Re-enable windfarm modules on powerpc64-smp
+    - LP: #413150
+  * [Config] Ports: Build all cpu frequency scaling governors into ports
+    kernels
+  * [Config] Ports: Build ext2 and ext3 modules into ports kernels
+  * [Config] Ports: CONFIG_PACKET=y for all ports kernels
+  * [Config] Ports: Enable PS3 network driver
+
+  [ Stefan Bader ]
+
+  * abstracted debian -- call $(DEBIAN)/rules using make
+
+  [ Tim Gardner ]
+
+  * [Config] Abstract the debian directory
+  * SAUCE: Improve error reporting in postinst
+    - LP: #358564
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Sun, 16 Aug 2009 20:33:28 -0600
+
+linux (2.6.31-6.25) karmic; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * script to generate Ubuntu changes from changelog
+  * [Config] standardise ANDROID options
+  * [Config] standardise CONFIG_ATM as module
+  * [Config] standardise CONFIG_LIB80211 as module
+  * [Config] disable CONFIG_PRINT_QUOTA_WARNING
+  * [Config] set CONFIG_CRAMFS as module
+  * [Config] enable CONFIG_DAB and modules
+  * [Config] set CONFIG_MAC80211_HWSIM as module
+  * [Config] set CONFIG_NET_CLS_FLOW as module
+  * [Config] set CONFIG_NF_CONNTRACK_SANE as module
+  * [Config] set CONFIG_NF_CT_PROTO_DCCP as module
+  * [Config] set CONFIG_RTC_DRV_DS1511 as module
+  * [Config] set CONFIG_RTC_DRV_R9701 as module
+  * [Config] set CONFIG_RTC_DRV_S35390A as module
+  * [Config] set CONFIG_TOIM3232_DONGLE as module
+  * [Config] standardise CONFIG_USB_MIDI_GADGET as module
+  * [Config] standardise CONFIG_USB_G_PRINTER as module
+  * [Config] standardise CONFIG_USB_SERIAL_IR as module
+  * [Config] set CONFIG_USB_SERIAL_IUU as module
+  * [Config] standardise CONFIG_USB_STORAGE_CYPRESS_ATACB as module
+  * [Config] standardise CONFIG_USB_STORAGE_ONETOUCH as module
+  * cleanup remains of dm-loop
+  * drop thinkpad ec and smapi support
+  * drop appleir
+  * [Config] update configs following rebase to v2.6.31-rc6
+  * rebase to v2.6.31-rc6
+
+  [ Hugh Dickins ]
+
+  * SAUCE: ksm patch 1, drop after 2.6.31
+  * SAUCE: ksm patch 2, drop after 2.6.31
+  * SAUCE: ksm patch 3, drop after 2.6.31
+  * SAUCE: ksm patch 4, drop after 2.6.31
+  * SAUCE: ksm patch 5, drop after 2.6.31
+  * SAUCE: ksm patch 7, drop after 2.6.31
+
+  [ Izik Eidus ]
+
+  * SAUCE: ksm patch 0, drop after 2.6.31
+  * SAUCE: ksm patch 6, drop after 2.6.31
+  * SAUCE: ksm patch 8, drop after 2.6.31
+  * SAUCE: ksm patch 9, drop after 2.6.31
+
+  [ Luke Yelavich ]
+
+  * [Config] Ports: Re-add PS3 modules to udebs
+
+  [ Michael Casadevall ]
+
+  * [Config] Update SPARC config and d-i files to reflect what can be built
+
+  [ Tim Gardner ]
+
+  * [Config] Removed armel package support
+  * [Config] Enabled CONFIG_KSM=y
+
+  [ Upstream Kernel Changes ]
+
+  * Rebased against v2.6.31-rc6
+  * ARM: Cleanup: Revert "ARM: Add more cache memory types macros"
+  * ARM: Cleanup: Revert "Do not use OOB with MLC NAND"
+  * ARM: Cleanup: Revert "ARM: Make ARM arch aware of ubuntu/ drivers"
+  * ARM: Cleanup: Revert "ARM: IMX51: Make video capture drivers compile"
+  * ARM: Cleanup: Revert "ARM: IMX51: Fix isl29003 HWMON driver for i2c
+    changes"
+  * ARM: Cleanup: Revert "ARM: IMX51: IPU irq handler deadlock fix"
+  * ARM: Cleanup: Revert "ARM: IMX51: Babbage 2.5 needs a different system
+    revision"
+  * ARM: Cleanup: Revert "ARM: IMX51: Compile-in the IMX51 cpufreq driver
+    by default"
+  * ARM: Cleanup: Revert "ARM: IMX51: Enable ZONE_DMA for ARCH_MXC"
+  * ARM: Cleanup: Revert "ARM: IMX51: Make ARCH_MXC auto-enable
+    ARCH_MXC_CANONICAL"
+  * ARM: Cleanup: Revert "ARM: IMX51: Unconditionally disable
+    CONFIG_GPIOLIB"
+  * ARM: Cleanup: Revert "ARM: IMX51: Minimal changes for USB to work on
+    2.6.31"
+  * ARM: Cleanup: Revert "ARM: IMX51: Fix plat-mxc/timer.c to handle imx51"
+  * ARM: Cleanup: Revert "ARM: IMX51: Make it compile."
+  * ARM: Cleanup: Revert "ARM: IMX51: Clean-up the craziness of including
+    mxc_uart.h _everywhere_"
+  * ARM: Cleanup: Revert "ARM: IMX51: Move board-mx51* header files to the
+    correct location"
+  * ARM: Cleanup: Revert "ARM: IMX51: Changed from snd_card_new to
+    snd_card_create"
+  * ARM: Cleanup: Revert "ARM: IMX51: Fix up merge error in Kconfig"
+  * ARM: Cleanup: Revert "ARM: IMX51: mxc_timer_init prototype"
+  * ARM: Cleanup: Revert "ARM: IMX51: Removed the mxc_gpio_port structure."
+  * ARM: Cleanup: Revert "ARM: IMX51: Added external declaration for
+    mxc_map_io."
+  * ARM: Cleanup: Revert "ARM: IMX51: Get to bus_id by calling dev_name."
+  * ARM: Cleanup: Revert "ARM: IMX51: Get to bus_id by calling dev_name."
+  * ARM: Cleanup: Revert "ARM: IMX51: snd_soc_machine structure replaced
+    with snd_soc_card."
+  * ARM: Cleanup: Revert "ARM: IMX51: codec structure was moved to the card
+    structure"
+  * ARM: Cleanup: Revert "ARM: IMX51: Hack to add defines for
+    DMA_MODE_READ/WRITE/MASK"
+  * ARM: Cleanup: Revert "ARM: IMX51: Add SoC and board support for
+    Freescale mx51 platform"
+  * Driver core: add new device to bus's list before probing
+  * [Upstream] (drop after 2.6.31) ALSA: hda - Reduce click noise at
+    power-saving
+    - LP: #381693, #399750, #380892
+
+ -- Andy Whitcroft <apw@canonical.com>  Fri, 14 Aug 2009 11:32:23 +0100
+
+linux (2.6.31-5.24) karmic; urgency=low
+
+  [ Amit Kucheria ]
+
+  * ARM: IMX51: Make video capture drivers compile
+  * [Config] IMX51: Config updates
+
+  [ Andy Whitcroft ]
+
+  * remove leftovers of dm-bbr
+
+  [ Leann Ogasawara ]
+
+  * Add pata_cs5535 to pata-modules
+    - LP: #318805
+
+  [ Luke Yelavich ]
+
+  * [Config] CONFIG_PPC64=y for powerpc64-smp
+  * [Config] Set the maximum number of CPUs to 1024 for powerpc64-smp
+  * [Config] CONFIG_PPC_PS3=y for powerpc64-smp
+  * [Config] CONFIG_PPC_MAPLE=y on powerpc64-smp
+  * [Config] CONFIG_PPC_PASEMI=y on powerpc64-smp
+  * [Config] CONFIG_CPU_FREQ_PMAC64=y on powerpc64-smp
+  * [Config] Enable all PS3 drivers in powerpc64-smp
+
+  [ Mario Limonciello ]
+
+  * LIRC -- fix lirc-i2c 2.6.31 compilation
+
+  [ Matthew Garrett ]
+
+  * [Upstream] dell-laptop: Fix rfkill state queries
+
+  [ Tim Gardner ]
+
+  * [Config] Ignore armel ABI and module changes
+  * [Config] Update configs after rebase against 2.6.31-rc5
+
+  [ Upstream ]
+
+  * Rebased to 2.6.31-rc5
+
+ -- Andy Whitcroft <apw@canonical.com>  Tue, 28 Jul 2009 10:10:09 +0100
+
+linux (2.6.31-4.23) karmic; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * AUFS -- update to aufs2-30 20090727
+  * [Config] enable AUFS FUSE support
+
+  [ Luke Yelavich ]
+
+  * [Config] CONFIG_JFS_FS=m on sparc
+
+  [ Tim Gardner ]
+
+  * [Upstream] dell-laptop: Fix rfkill state setting.
+
+ -- Andy Whitcroft <apw@canonical.com>  Mon, 27 Jul 2009 11:11:47 +0100
+
+linux (2.6.31-4.22) karmic; urgency=low
+
+  [ Amit Kucheria ]
+
+  * ARM: IMX51: Add SoC and board support for Freescale mx51 platform
+  * ARM: IMX51: Move board-mx51* header files to the correct location
+  * ARM: IMX51: Clean-up the craziness of including mxc_uart.h _everywhere_
+  * ARM: IMX51: Make it compile.
+  * ARM: IMX51: Unconditionally disable CONFIG_GPIOLIB
+  * ARM: IMX51: Make ARCH_MXC auto-enable ARCH_MXC_CANONICAL
+  * ARM: IMX51: Enable ZONE_DMA for ARCH_MXC
+  * ARM: IMX51: Compile-in the IMX51 cpufreq driver by default
+  * ARM: IMX51: Fix isl29003 HWMON driver for i2c changes
+  * ARM: USB: musb: Refer to musb_otg_timer_func under correct #ifdef
+  * ARM: staging: udlfb: Add vmalloc.h include
+  * UBUNTU [Config]: Bring imx51 config upto date with other flavours
+
+  [ Brad Figg ]
+
+  * ARM: IMX51: Hack to add defines for DMA_MODE_READ/WRITE/MASK
+  * ARM: IMX51: codec structure was moved to the card structure
+  * ARM: IMX51: snd_soc_machine structure replaced with snd_soc_card.
+  * ARM: IMX51: Get to bus_id by calling dev_name.
+  * ARM: IMX51: Get to bus_id by calling dev_name.
+  * ARM: IMX51: Added external declaration for mxc_map_io.
+  * ARM: IMX51: Removed the mxc_gpio_port structure.
+  * ARM: IMX51: mxc_timer_init prototype
+  * ARM: IMX51: Fix up merge error in Kconfig
+  * ARM: IMX51: Changed from snd_card_new to snd_card_create
+
+  [ Dinh Nguyen ]
+
+  * ARM: IMX51: Fix plat-mxc/timer.c to handle imx51
+  * ARM: IMX51: Minimal changes for USB to work on 2.6.31
+  * ARM: IMX51: Babbage 2.5 needs a different system revision
+  * ARM: IMX51: IPU irq handler deadlock fix
+
+  [ Tim Gardner ]
+
+  * [Config] Enabled CONFIG_CAN=m
+    - LP: #327243
+  * [Config] Enabled CONFIG_SERIAL=m
+    - LP: #397189
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Fri, 24 Jul 2009 06:19:10 -0600
+
+linux (2.6.31-4.21) karmic; urgency=low
+
+  [ Amit Kucheria ]
+
+  * dm-raid-4-5: Add missing brackets around test_bit()
+
+  [ John Johansen ]
+
+  * AppArmor: Fix change_profile failing lpn401931
+  * AppArmor: Fix determination of forced AUDIT messages.
+  * AppArmor: Fix oops in auditing of the policy interface offset
+
+ -- Andy Whitcroft <apw@canonical.com>  Thu, 23 Jul 2009 19:18:30 +0100
+
+linux (2.6.31-4.20) karmic; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * SAUCE: iscsitarget -- update to SVN revision r214
+  * SAUCE: iscsitarget -- renable driver
+  * [Config] consolidate lpia/lpia and i386/generic configs
+  * [Config] enable CRYPTO modules for all architectures
+  * [Config] enable cryptoloop
+  * [Config] enable various filesystems for armel
+  * [Config] sync i386 generic and generic-pae
+  * [Config] add the 386 (486 processors and above) flavour
+  * [Config] re-set DEFAULT_MMAP_MIN_ADDR
+    - LP: #399914
+  * add genconfigs/genportsconfigs to extract the built configs
+  * updateconfigs -- alter concatenation order allow easier updates
+  * intelfb -- INTELFB now conflicts with DRM_I915
+  * printchanges -- rebase tree does not have stable tags use changelog
+  * AppArmor: fix argument size missmatch on 64 bit builds
+
+  [ Ike Panhc ]
+
+  * Ship bnx2x firmware in nic-modules udeb
+    - LP: #360966
+
+  [ Jeff Mahoney ]
+
+  * AppArmor: fix build failure on ia64
+
+  [ John Johansen ]
+
+  * AppArmour: ensure apparmor enabled parmater is off if AppArmor fails to
+    initialize.
+  * AppArmour: fix auditing of domain transitions to include target profile
+    information
+  * AppArmor: fix C99 violation
+  * AppArmor: revert reporting of create to write permission.
+  * SAUCE: Add config option to set a default LSM
+  * [Config] enable AppArmor by default
+  * AppArmor: Fix NULL pointer dereference oops in profile attachment.
+
+  [ Keith Packard ]
+
+  * SAUCE: drm/i915: Allow frame buffers up to 4096x4096 on 915/945 class
+    hardware
+    - LP: #351756
+
+  [ Luke Yelavich ]
+
+  * [Config] add .o files found in arch/powerpc/lib to all powerpc kernel
+    header packages
+    - LP: #355344
+
+  [ Michael Casadevall ]
+
+  * [Config] update SPARC config files to allow success build
+
+  [ Scott James Remnant ]
+
+  * SAUCE: trace: add trace_event for the open() syscall
+
+  [ Stefan Bader ]
+
+  * SAUCE: jfs: Fix early release of acl in jfs_get_acl
+    - LP: #396780
+
+  [ Tim Gardner ]
+
+  * [Upstream] Fix Soltech TA12 volume hotkeys not sending key release
+    - LP: #397499
+  * [Upstream] USB Option driver - Add USB ID for Novatel MC727/U727/USB727
+    refresh
+    - LP: #365291
+  * [Config] SSB/B44 are common across all arches/flavours.
+
+  [ Upstream ]
+
+  * Rebased to 2.6.31-rc4
+
+ -- Andy Whitcroft <apw@canonical.com>  Thu, 23 Jul 2009 08:41:39 +0100
+
+linux (2.6.31-3.19) karmic; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * Revert "[Config] Disabled NDISWRAPPER"
+  * ndiswrapper -- fix i386 compilation failures on cmpxchg8b
+  * AUFS -- export various core functions
+  * AUFS -- export various core functions -- fixes
+  * AUFS -- core filesystem
+  * AUFS -- track changes in v2.6.31
+  * [Config] Enable AUFS
+  * droppped 'iwl3945: do not send scan command if channel count zero' as it
+    is already upstream but failed to auto-drop on rebase.
+
+  [ Eric Paris ]
+
+  * SAUCE: fsnotify: use def_bool in kconfig instead of letting the user
+    choose
+  * SAUCE: inotify: check filename before dropping repeat events
+  * SAUCE: fsnotify: fix inotify tail drop check with path entries
+
+ -- Andy Whitcroft <apw@canonical.com>  Tue, 14 Jul 2009 12:52:55 +0100
+
+linux (2.6.31-3.18) karmic; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * Revert "Add splice-2.6.23.patch from AUFS to export a symbol needed by
+    AUFS"
+  * Revert "Add put_filp.patch from AUFS to export a symbol needed by AUFS"
+  * Revert "Add sec_perm-2.6.24.patch from AUFS - export
+    security_inode_permission"
+  * clear out left over AUFS files and modifications
+
+  [ Luke Yelavich ]
+
+  * [Config] Enable CONFIG_USB_ISP116X_HCD on sparc
+  * SAUCE: Explicitly include header files to allow apparmor to build on
+    powerpc
+  * [Config] Enable CONFIG_BLK_DEV_IDECD on powerpc
+
+  [ Tim Gardner ]
+
+  * [Config] Dropped ubuntu/misc/wireless/acx
+  * [Config] Disabled NDISWRAPPER until the compile issues are fixed.
+
+  [ Upstream ]
+
+  * Rebased to 2.6.31-rc3
+
+ -- Andy Whitcroft <apw@canonical.com>  Fri, 10 Jul 2009 18:59:33 +0100
+
+linux (2.6.31-2.17) karmic; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * [Config] CONFIG_BLK_DEV_CRYPTOLOOP=m for sparc
+  * compcache -- remove redundant Kconfig entries part 2
+  * compcache -- clean up CCFLAGS declarations
+  * [Config] enable AppArmor
+  * AppArmor: fix operator precidence issue in as_path_link
+
+  [ John Johansen ]
+
+  * AppArmor security module
+  * AppArmor: Correct mapping of file permissions.
+  * AppArmor: Turn auditing of ptrace on
+
+  [ Luke Yelavich ]
+
+  * [Config] disable CONFIG_DM_RAID45 on powerpc
+
+ -- Andy Whitcroft <apw@canonical.com>  Fri, 10 Jul 2009 15:02:05 +0100
+
+linux (2.6.31-2.16) karmic; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * compcache -- remove redundant Kconfig entries
+    added ignore and ignore.modules for all arches since the compcache update
+    changes the modules names as well as some compcache ABI values.
+
+  [ Manoj Iyer ]
+
+  * SAUCE: updated dm-raid45 module version to 2009.04.24 (2.6.30-rc3)
+  * SAUCE: update compcache version to 0.5.3
+
+  [ Tim Gardner ]
+
+  * [Config]: Fix sparc FTBS by adding ignore.modules
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Mon, 06 Jul 2009 13:35:29 -0600
+
+linux (2.6.31-2.15) karmic; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * SAUCE: default ATI Radeon KMS to off until userspace catches up
+  * [Config] Update configs following rebase to 2.6.31-rc2
+  * [Config] update ports configs following update to 2.6.31-rc2
+
+  [ Luke Yelavich ]
+
+  * [Config] powerpc - Disable CONFIG_RDS
+
+  [ Matt Zimmerman ]
+
+  * Rename linux-doc-PKGVER to linux-doc and clean up its description
+    - LP: #382115
+
+  [ Upstream Kernel Changes ]
+
+  * rebased to mainline 2.6.31-rc2
+
+ -- Andy Whitcroft <apw@canonical.com>  Sat, 04 Jul 2009 17:39:13 +0100
+
+linux (2.6.31-1.14) karmic; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * update ndiswrapper to 1.55
+  * remove leftovers of gfs
+  * [Config] powerpc: enable CONFIG_PPC_DISABLE_WERROR
+
+  [ Luke Yelavich ]
+
+  * [Config] re-enable and build the ide-pmac driver into powerpc kernels
+  * [Config] Build the ServerWorks Frodo / Apple K2 SATA driver into the
+    kernel
+
+  [ Manoj Iyer ]
+
+  * Remove snd-bt-sco ubuntu driver
+
+  [ Michael Casadevall ]
+
+  * [Config] updates ia64 config and d-i folders to allow succesful build
+  * [Config] Update powerpc and sparc for 2.6.31
+
+  [ Upstream Kernel Changes ]
+
+  * intel-iommu: fix Identity Mapping to be arch independent
+    - LP: #384695
+  * ACPI: video: prevent NULL deref in acpi_get_pci_dev()
+
+ -- Andy Whitcroft <apw@canonical.com>  Tue, 30 Jun 2009 17:47:32 +0100
+
+linux (2.6.31-1.13) karmic; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * REBASE: rebased to mainline 2.6.31-rc1
+    - "UBUNTU: SAUCE: UHCI USB quirk for resume"
+      no longer applies, using deprecated interfaces, LPIA only, dropped
+    - "UBUNTU: SAUCE: Mask off garbage in Dell WMI scan code data"
+      changes now upstream, dropped
+  * [Config] Update configs following rebase to 2.6.31-rc1
+  * [Config] update ports configs following update to 2.6.31-rc1
+
+  * [Config] disable broken staging driver CONFIG_STLC45XX
+  * SAUCE: fix compcache to use updates accessors
+  * [Config] disable staging driver CONFIG_VT6655
+  * SAUCE: fix DRDB to use updates accessors
+  * [Disable] ndiswrapper needs update
+  * [Disable] LIRC I2C needs update
+  * [Disable] CONFIG_LENOVO_SL_LAPTOP needs update
+  * [Config] disable I2C_DESIGNWARE does not compile
+  * [Config] disable CONFIG_TLSUP for lpia
+  * [Config] disable CONFIG_FB_UDL for arm
+  * SAUCE: disable adding scsi headers to linux-libc-dev
+
+  [ Mario Limonciello ]
+
+  * SAUCE: Add LIRC drivers
+
+ -- Andy Whitcroft <apw@canonical.com>  Thu, 25 Jun 2009 12:06:22 +0100
+
+linux (2.6.30-10.12) karmic; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * [Config] split out the ports configs into their own family
+  * [Config] update configs following introduction of ports family
+
+  [ Upstream Kernel Changes ]
+
+  * Revert "Rename linux-doc-PKGVER to linux-doc and clean up its
+    description". Fixes linux-doc package name conflicts for now.
+    - LP: #382115
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Mon, 22 Jun 2009 09:17:14 -0600
+
+linux (2.6.30-10.11) karmic; urgency=low
+
+  [ Amit Kucheria ]
+
+  * [Config] Comment splitconfig.pl and misc cleanup
+  * [Config] Rename all configs to the new naming scheme
+  * [Config] Splitconfig rework
+  * [Config] Rename scripts/misc/oldconfig to kernelconfig
+  * [Config] Fix build system for new config split
+  * [Config] Run updateconfigs after the splitconfig rework
+
+  [ Andy Whitcroft ]
+
+  * Revert "SAUCE: Default to i915.modeset=0 if CONFIG_DRM_I915_KMS=y"
+  * [Config] standardise CONFIG_STAGING=y
+  * [Config] standardise CONFIG_RD_LZMA=y
+  * [Config] CONFIG_PCI_IOV=y
+  * [Config] CONFIG_PCI_STUB=m
+  * [Config] merge kernel configs more agressively
+
+  [ Colin Watson ]
+
+  * [Config] Run kernel-wedge in $(builddir) rather than at the top level
+  * [Config] Add support for including firmware in udebs
+  * [Config] Ship bnx2 firmware in nic-modules udeb
+    - LP: #384861
+
+  [ Luke Yelavich ]
+
+  * [Config] ports - Import of ports architectures into kernel packaging
+    infrastructure
+  * [Config] ports - Do not update ports kernel configurations by default
+  * [Config] ports - Disable ABI checking for ports architectures
+  * [Config] ports - Build drivers in ubuntu sub-directory on powerpc
+  * [Config] ports - Add control.d/vars.* files for ports architectures
+  * [Config] ports - Add ports architectures for linux-libc-dev
+  * [Config] ports - Create powerpc specific message-modules and
+    block-modules udebs
+  * [Config] ports - Add configuration files for ports architectures
+
+  [ Manoj Iyer ]
+
+  * [Config] Enable CONFIG_BLK_DEV_AEC62XX=m for amd64 and i386
+    - LP: #329864
+
+  [ Michael Casadevall ]
+
+  * [Config] ports - Fix compression of kernels
+
+  [ Stefan Bader ]
+
+  * [Upstream] mmc: prevent dangling block device from accessing stale
+    queues
+    - LP: #383668
+
+  [ Tim Gardner ]
+
+  * [Config] Recommend grub-pc in linux-image
+    - LP: #385741
+  * [Config] Implement i386 generic and generic-pae flavours
+  * [Config] ports - Add control info after integrating ports arches
+  * [Config] Removed auto-generated files from git
+  * [Config] Added netxen_nic to nic-modules
+    - LP: #389603
+
+  [ Matt Zimmerman ]
+
+  * Rename linux-doc-PKGVER to linux-doc and clean up its description
+    - LP: #382115
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Mon, 15 Jun 2009 14:38:26 -0600
+
+linux (2.6.30-9.10) karmic; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * [Config] CONFIG_SECURITY_TOMOYO=y (amd64, i386, lpia)
+  * [Config] CONFIG_KEXEC_JUMP=y (amd64, lpia)
+  * [Config] CONFIG_LENOVO_SL_LAPTOP=m (amd64, lpia)
+  * [Config] CONFIG_POHMELFS_CRYPTO=y (i386, amd64)
+  * [Config] CONFIG_SERIAL_MAX3100=m (i386, amd64, lpia)
+  * [Config] CONFIG_VIDEO_GO7007=m (amd64, i386)
+
+  [ Upstream Kernel Changes ]
+
+  * rebased to 2.6.30 final
+
+ -- Andy Whitcroft <apw@canonical.com>  Fri, 05 Jun 2009 11:42:53 +0100
+
+linux (2.6.30-8.9) karmic; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * Config update removed the following options:
+        CONFIG_EDAC_AMD8111=m
+        CONFIG_EDAC_AMD8131=m
+
+  [ Upstream Kernel Changes ]
+
+  * rebased to 2.6.30-rc8
+
+ -- Andy Whitcroft <apw@canonical.com>  Wed, 03 Jun 2009 09:21:13 +0100
+
+linux (2.6.30-7.8) karmic; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * Enabled NEW configration options:
+      Paravirtualization layer for spinlocks (PARAVIRT_SPINLOCKS) [N/y/?] Y
+      Cisco FNIC Driver (FCOE_FNIC) [N/m/y/?] M
+
+  [ Upstream Kernel Changes ]
+
+  * rebased to 2.6.30-rc7
+
+ -- Andy Whitcroft <apw@canonical.com>  Sat, 23 May 2009 23:47:24 +0100
+
+linux (2.6.30-6.7) karmic; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * Dropped: UBUNTU: SAUCE: input: Blacklist digitizers from joydev.c (now
+    upstream)
+
+  [ Upstream Kernel Changes ]
+
+  * rebased to 2.6.30-rc6
+
+ -- Andy Whitcroft <apw@canonical.com>  Mon, 18 May 2009 18:05:54 +0100
+
+linux (2.6.30-5.6) karmic; urgency=low
+
+  [ Tim Gardner ]
+
+  * [Config] Enable Keyspan USB serial device firmware in kernel module
+    - LP: #334285
+
+  [ Upstream Kernel Changes ]
+
+  * rebased to 2.6.30-rc5
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Mon, 11 May 2009 12:02:16 -0600
+
+linux (2.6.30-4.5) karmic; urgency=low
+
+  [ Colin Watson ]
+
+  * Build-Conflict with findutils (= 4.4.1-1ubuntu1), to avoid
+    /usr/include/asm/* going missing
+    - LP: #373214
+
+ -- Stefan Bader <stefan.bader@canonical.com>  Fri, 08 May 2009 11:09:08 +0200
+
+linux (2.6.30-3.4) karmic; urgency=low
+
+  [ Kees Cook ]
+
+  * SAUCE: [x86] implement cs-limit nx-emulation for ia32
+    - LP: #369978
+
+  [ Stefan Bader ]
+
+  * SAUCE: input: Blacklist digitizers from joydev.c
+    - LP: #300143
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Fri, 01 May 2009 14:00:42 -0600
+
+linux (2.6.30-2.3) karmic; urgency=low
+
+  [ Tim Gardner ]
+
+  * [Config] Enabled CC_STACKPROTECTOR=y for all x86en
+    - LP: #369152
+  * SAUCE: Default to i915_modeset=0 if CONFIG_DRM_I915_KMS=y
+  * [Config] CONFIG_DRM_I915_KMS=y
+  * [Config] Set CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR to appropriate ARCH
+    minimums
+
+  [ Upstream Kernel Changes ]
+
+  * rebased to 2.6.30-rc4
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Thu, 30 Apr 2009 09:17:05 -0600
+
+linux (2.6.30-1.2) karmic; urgency=low
+
+  [ Tim Gardner ]
+
+  * [Config] armel: disable staging drivers, fixes FTBS
+  * [Config] armel imx51: Disable CONFIG_MTD_NAND_MXC, fixes FTBS
+
+  [ Upstream Kernel Changes ]
+
+  * mpt2sas: Change reset_type enum to avoid namespace collision.
+    Submitted upstream.
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Tue, 28 Apr 2009 16:54:41 -0600
+
+linux (2.6.30-1.1) karmic; urgency=low
+
+  * Initial release after rebasing against v2.6.30-rc3
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Thu, 12 Mar 2009 19:16:07 -0600
--- linux-mvl-dove-2.6.32.orig/debian.master/changelog.historical
+++ linux-mvl-dove-2.6.32/debian.master/changelog.historical
@@ -0,0 +1,4171 @@
+
+linux (2.6.28-9.31) jaunty; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * SAUCE: cpufreq-nforce2: probe failures are not errors
+    - LP: #332170
+  * SAUCE: mmc: add MODALIAS linkage for MMC/SD devices
+    - LP: #30335
+  * remove test-suspend script
+    - LP: #333856
+
+  [ Kees Cook ]
+
+  * handle relative paths in modules.dep
+    Fixes 2.6.28-9.30 FTBS.
+
+  [ Upstream Kernel Changes ]
+
+  * ricoh_mmc: Handle newer models of Ricoh controllers
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Wed, 11 Mar 2009 08:19:24 -0600
+
+linux (2.6.28-9.30) jaunty; urgency=low
+
+  [ Amit Kucheria ]
+
+  * ARM:mx51 Add SoC and board support for mx51 platforms
+  * ARM:mx51 Add CONFIG_ARCH_MXC_CANONICAL to disable parts of Freescale's
+    code
+  * MMC: Add support for 8-bit cards
+  * Add ARM:MX51 SoC support to the build system
+  * ARM: Make ARM arch aware of ubuntu/ drivers
+  * ARM: Add imx51 configuration
+  * Disable d-i modules for imx51 and mv78xx0
+  * Disable Apparmor on boot for ARM
+  * Updating imx51 config
+
+  [ Jason Liu ]
+
+  * Do not use OOB with MLC NAND
+
+  [ Richard Zhu ]
+
+  * Support the eMMC4.3 card
+
+  [ Rob Herring ]
+
+  * ARM: Add more cache memory types macros
+
+  [ Tim Gardner ]
+
+  * Set CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y for i386/amd64/lpia
+
+  [ Manoj Iyer ]
+
+  * Enable CONFIG_RTL8187SE=m
+
+  [ Upstream Kernel Changes ]
+
+  * USB: EHCI: slow down ITD reuse
+    - LP: #329437
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Sun, 08 Mar 2009 14:14:15 -0600
+
+linux (2.6.28-9.29) jaunty; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * link-headers -- only link directories which do not already exist
+    - LP: #315252
+
+  [ Daniel Marjamäki ]
+
+  * SAUCE: (drop after 2.6.28) netxen: fix memory leak in
+    drivers/net/netxen_nic_init.c
+    - LP: #330813
+
+  [ Dhananjay Phadke ]
+
+  * SAUCE: (drop after 2.6.28) netxen: fix endianness in firmware commands
+    - LP: #330813
+  * SAUCE: (drop after 2.6.28) netxen: fix ipv6 offload and tx cleanup
+    - LP: #330813
+  * SAUCE: (drop after 2.6.28) netxen: fix link speed reporting for some
+    boards
+    - LP: #330813
+  * SAUCE: (drop after 2.6.28) netxen: firmware init fix
+    - LP: #330813
+  * SAUCE: (drop after 2.6.28) netxen: cleanup mac list on driver unload
+    - LP: #330813
+  * SAUCE: (drop after 2.6.28) netxen: hold tx lock while sending firmware
+    commands
+    - LP: #330813
+  * SAUCE: (drop after 2.6.28) netxen: handle dma mapping failures
+    - LP: #330813
+  * SAUCE: (drop after 2.6.28) netxen: avoid invalid iounmap
+    - LP: #330813
+  * SAUCE: (drop after 2.6.28) netxen: include ipv6.h (fixes build failure)
+    - LP: #330813
+  * SAUCE: (drop after 2.6.28) netxen: fix vlan tso/checksum offload
+    - LP: #330813
+  * SAUCE: (drop after 2.6.28) netxen: reduce memory footprint
+    - LP: #330813
+  * SAUCE: (drop after 2.6.28) netxen: revert jumbo ringsize
+    - LP: #330813
+  * SAUCE: (drop after 2.6.28) netxen: fix msi-x interrupt handling
+    - LP: #330813
+  * SAUCE: (drop after 2.6.28) netxen: remove pcie workaround
+    - LP: #330813
+
+  [ Hannes Eder ]
+
+  * SAUCE: (drop after 2.6.28) drivers/net/netxen: fix sparse warnings: use
+    NULL pointer instead of plain integer
+    - LP: #330813
+
+  [ Huaxu Wan ]
+
+  * SAUCE: report rfkill changes event if interface is down
+    - LP: #193970
+
+  [ Tim Gardner ]
+
+  * MV78XX0 must specify a target in the vars definition.
+
+  [ Upstream Kernel Changes ]
+
+  * Revert "ext4: wait on all pending commits in ext4_sync_fs()"
+  * jbd2: Fix return value of jbd2_journal_start_commit()
+  * jbd2: Avoid possible NULL dereference in
+    jbd2_journal_begin_ordered_truncate()
+  * ext4: Fix to read empty directory blocks correctly in 64k
+  * ext4: Fix lockdep warning
+  * ext4: Initialize preallocation list_head's properly
+  * ext4: Implement range_cyclic in ext4_da_writepages instead of
+    write_cache_pages
+  * ext4: Fix NULL dereference in ext4_ext_migrate()'s error handling
+  * ext4: Add fallback for find_group_flex
+  * ext4: Fix deadlock in ext4_write_begin() and ext4_da_write_begin()
+  * Added mv78xx0 flavor
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Fri, 06 Mar 2009 06:13:31 -0700
+
+linux (2.6.28-8.28) jaunty; urgency=low
+
+  [ Alexey Starikovskiy ]
+
+  * SAUCE: ACPI: EC: Limit workaround for ASUS notebooks even more
+    - LP: #288385
+
+  [ Scott James Remnant ]
+
+  * SAUCE: Auto-load esp module when device opened.
+  * SAUCE: Auto-load bridge module when socket opened.
+  * SAUCE: Auto-load af_netlink module when socket opened.
+  * SAUCE: Auto-load wanrouter module when socket opened.
+  * SAUCE: Auto-load ip_queue module when socket opened.
+  * SAUCE: Auto-load ip6_queue module when socket opened.
+  * SAUCE: Auto-load cn module when socket opened.
+  * SAUCE: Auto-load scsi_transport_iscsi module when socket opened.
+  * SAUCE: Auto-load ftl module when device opened.
+  * SAUCE: Auto-load pcd module when device opened.
+  * SAUCE: Auto-load pf module when device opened.
+  * SAUCE: Auto-load nftl module when device opened.
+  * SAUCE: Auto-load mousedev module when psaux device opened.
+  * SAUCE: Auto-load mousedev module when /dev/input/mice opened.
+  * SAUCE: Auto-load rng-core module when device opened.
+  * SAUCE: Auto-load openprom module when device opened.
+  * SAUCE: Auto-load applicom module when device opened.
+  * SAUCE: Auto-load toshiba module when device opened.
+  * SAUCE: Auto-load cyclades module when device opened.
+  * SAUCE: Auto-load riscom8 module when device opened.
+  * SAUCE: Auto-load specialix module when device opened.
+  * SAUCE: Auto-load videodev module when device opened.
+  * SAUCE: Auto-load i2c_dev module when device opened.
+  * SAUCE: Auto-load mtdchar module when device opened.
+  * SAUCE: Auto-load pt module when device opened.
+  * SAUCE: Auto-load pg module when device opened.
+  * SAUCE: Auto-load cdc_acm module when device opened.
+  * SAUCE: Auto-load msr module when device opened.
+  * SAUCE: Auto-load cpuid module when device opened.
+  * SAUCE: quickcam: Enable double-buffering by default
+  * SAUCE: libata: Ignore HPA by default.
+  * SAUCE: hostap: Change initial operation mode to managed (infra)
+  * SAUCE: floppy: Provide a PnP device table in the module.
+    - LP: #255651
+  * SAUCE: Auto-load mwave module when device opened.
+  * Build CONFIG_FUSE_FS into kernel, not as module.
+
+  [ Stefan Bader ]
+
+  * Enable build of ext4 as a module on LPIA
+    - LP: #331848
+
+  [ Tim Gardner ]
+
+  * Update configs to fix LPIA FTBS
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Thu, 05 Mar 2009 10:43:24 -0700
+
+linux (2.6.28-8.27) jaunty; urgency=low
+
+  [ Amit Kucheria ]
+
+  * Updating configs (arm:ixp4xx)
+
+  [ Andy Whitcroft ]
+
+  * SAUCE: enable Intel HDMI output
+
+  [ Manoj Iyer ]
+
+  * SAUCE: Added quirk for Linksys WUSB600N USB wifi-n networking adapter
+    - LP: #323473
+
+  [ Steve Beattie ]
+
+  * fix apparmor memory leak on unlinked file ops
+    - LP: #329489
+
+  [ Tim Gardner ]
+
+  * SAUCE: Dell XPS710 reboot quirk
+    - LP: #323592
+  * SAUCE: (drop after 2.6.28) ieee80211: Add infrastructure to obsolete
+    scan results
+    - LP: #336055
+  * Add modules.order to the linux-image package.
+
+  [ Upstream Kernel Changes ]
+
+  * iwlwifi: fix time interval misuse in iwl_poll_{direct_}bit
+  * x86: only scan the root bus in early PCI quirks
+    - LP: #267295
+  * ALSA: hda - Intel HDMI audio support
+  * ALSA: hda - Fix unused function in patch_intelhdmi.c
+  * ALSA: handle SiI1392 HDMI codec in patch_intelhdmi.c
+  * ALSA: hda-intel: reorder HDMI audio enabling sequence
+  * ALSA: introduce snd_print_pcm_rates()
+  * ALSA: create hda_eld.c for ELD routines and proc interface
+  * ALSA: ELD proc interface for HDMI sinks
+  * ALSA: hda: make standalone hdmi_fill_audio_infoframe()
+  * ALSA: hda: make global snd_print_channel_allocation()
+  * ALSA: hda: HDMI channel allocations for audio infoframe
+  * ALSA: hda: HDMI channel mapping cleanups
+  * ALSA: hda: minor code cleanups
+  * ALSA: hda: rename sink_eld to hdmi_eld
+  * ALSA: hda - Release ELD proc file
+  * ALSA: hda - minor HDMI code cleanups
+  * ALSA: hda - report selected CA index for Audio InfoFrame
+  * ALSA: hda - Add Intel vendor id string
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Wed, 25 Feb 2009 14:23:46 -0700
+
+linux (2.6.28-8.26) jaunty; urgency=low
+
+  [ Amit Kucheria ]
+
+  * Updating configs (armel:ixp4xx)
+    - LP: #331510
+
+  [ Tim Gardner ]
+
+  * Add more missing modules
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Tue, 24 Feb 2009 06:58:53 -0700
+
+linux (2.6.28-8.25) jaunty; urgency=low
+
+  [ Scott James Remnant ]
+
+  * SAUCE: Prefer powernow-k8 to acpi-cpufreq
+  * Change CONFIG_X86_P4_CLOCKMOD to be a module again.
+
+  [ Tim Gardner ]
+
+  * Revert "SAUCE: (revert before 2.6.28.y update) ext4: Initialize the new
+    group descriptor when resizing the filesystem"
+  * Revert "SAUCE: (revert before 2.6.28.y update) ext4: Add sanity check
+    to make_indexed_dir"
+  * Revert "SAUCE: (revert before 2.6.28.y update) ext4: only use
+    i_size_high for regular files"
+  * Revert "SAUCE: (revert before 2.6.28.y update) ext4: Add sanity checks
+    for the superblock before mounting the filesystem"
+  * Revert "SAUCE: (revert before 2.6.28.y update) ext4: Fix
+    s_dirty_blocks_counter if block allocation failed with nodelalloc"
+  * Revert "SAUCE: (revert before 2.6.28.y update) ext4: Init the complete
+    page while building buddy cache"
+  * Revert "SAUCE: (revert before 2.6.28.y update) ext4: Don't allow new
+    groups to be added during block allocation"
+  * Revert "SAUCE: (revert before 2.6.28.y update) ext4: mark the
+    blocks/inode bitmap beyond end of group as used"
+  * Revert "SAUCE: (revert before 2.6.28.y update) ext4: Use new
+    buffer_head flag to check uninit group bitmaps initialization"
+  * Revert "SAUCE: (revert before 2.6.28.y update) ext4: Fix the race
+    between read_inode_bitmap() and ext4_new_inode()"
+  * Revert "SAUCE: (revert before 2.6.28.y update) ext4: Fix race between
+    read_block_bitmap() and mark_diskspace_used()"
+  * Revert "SAUCE: (revert before 2.6.28.y update) ext4: don't use blocks
+    freed but not yet committed in buddy cache init"
+  * Revert "SAUCE: (revert before 2.6.28.y update) ext4: cleanup mballoc
+    header files"
+  * Revert "SAUCE: (revert before 2.6.28.y update) ext4: Use
+    EXT4_GROUP_INFO_NEED_INIT_BIT during resize"
+  * Revert "SAUCE: (revert before 2.6.28.y update) ext4: Add blocks added
+    during resize to bitmap"
+  * Revert "SAUCE: (revert before 2.6.28.y update) ext4: Don't overwrite
+    allocation_context ac_status"
+  * Revert "SAUCE: (revert before 2.6.28.y update) jbd2: Add barrier not
+    supported test to journal_wait_on_commit_record"
+  * Revert "SAUCE: (revert before 2.6.28.y update) ext4: Widen type of
+    ext4_sb_info.s_mb_maxs[]"
+  * Revert "SAUCE: (revert before 2.6.28.y update) ext4: avoid ext4_error
+    when mounting a fs with a single bg"
+  * Revert "SAUCE: (revert before 2.6.28.y update) ext4: Fix the delalloc
+    writepages to allocate blocks at the right offset."
+  * Revert "SAUCE: (revert before 2.6.28.y update) ext4: tone down
+    ext4_da_writepages warnings"
+  * Revert "SAUCE: (revert before 2.6.28.y update) ext4: Add support for
+    non-native signed/unsigned htree hash algorithms"
+  * Enabled X86_ACPI_CPUFREQ=y
+
+  [ Upstream Kernel Changes ]
+
+  * ath9k: quiet harmless ForceXPAon messages
+    - LP: #321474
+  * [WATCHDOG] iTCO_wdt: fix SMI_EN regression 2
+    - LP: #314050
+  * pid: implement ns_of_pid
+  * mqueue: fix si_pid value in mqueue do_notify()
+  * powerpc/vsx: Fix VSX alignment handler for regs 32-63
+  * sata_nv: give up hardreset on nf2
+  * Fix Intel IOMMU write-buffer flushing
+  * SCSI: libiscsi: fix iscsi pool leak
+  * x86/cpa: make sure cpa is safe to call in lazy mmu mode
+  * sched: SCHED_OTHER vs SCHED_IDLE isolation
+  * x86, vm86: fix preemption bug
+  * Add support for VT6415 PCIE PATA IDE Host Controller
+  * ext2/xip: refuse to change xip flag during remount with busy inodes
+  * 3c505: do not set pcb->data.raw beyond its size
+  * Bluetooth: Fix TX error path in btsdio driver
+  * ext4: Add support for non-native signed/unsigned htree hash algorithms
+  * ext4: tone down ext4_da_writepages warnings
+  * ext4: Fix the delalloc writepages to allocate blocks at the right
+    offset.
+  * ext4: avoid ext4_error when mounting a fs with a single bg
+  * ext4: Widen type of ext4_sb_info.s_mb_maxs[]
+  * jbd2: Add barrier not supported test to journal_wait_on_commit_record
+  * ext4: Don't overwrite allocation_context ac_status
+  * ext4: Add blocks added during resize to bitmap
+  * ext4: Use EXT4_GROUP_INFO_NEED_INIT_BIT during resize
+  * ext4: cleanup mballoc header files
+  * ext4: don't use blocks freed but not yet committed in buddy cache init
+  * ext4: Fix race between read_block_bitmap() and mark_diskspace_used()
+  * ext4: Fix the race between read_inode_bitmap() and ext4_new_inode()
+  * ext4: Use new buffer_head flag to check uninit group bitmaps
+    initialization
+  * ext4: mark the blocks/inode bitmap beyond end of group as used
+  * ext4: Don't allow new groups to be added during block allocation
+  * ext4: Init the complete page while building buddy cache
+  * ext4: Fix s_dirty_blocks_counter if block allocation failed with
+    nodelalloc
+  * ext4: Add sanity checks for the superblock before mounting the
+    filesystem
+  * ext4: only use i_size_high for regular files
+  * ext4: Add sanity check to make_indexed_dir
+  * ext4: Initialize the new group descriptor when resizing the filesystem
+  * Fix longstanding "error: storage size of '__mod_dmi_device_table' isn't
+    known"
+  * Linux 2.6.28.7
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Thu, 19 Feb 2009 06:45:55 -0700
+
+linux (2.6.28-8.24) jaunty; urgency=low
+
+  [ Scott James Remnant ]
+
+  * Change CPU_FREQ_DEFAULT_GOV_ONDEMAND to y
+  * SAUCE: Link acpi-cpufreq.o first
+
+  [ Tim Gardner ]
+
+  * Build in CPU Frequency scaling drivers
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Wed, 18 Feb 2009 06:12:24 -0700
+
+linux (2.6.28-8.23) jaunty; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * include the kernel configuration in the sub-flavour images
+    - LP: #328859
+
+  [ Tim Gardner ]
+
+  * Revert "SAUCE: (drop after 2.6.28) [eCryptfs] Regression in unencrypted
+    filename symlinks" in favor of upstream commit.
+  * Fix compile issues with qc-usb
+  * SAUCE: (remove after 2.6.28) V4L/DVB (10216): saa7127: fix broken
+    S-Video with saa7129
+    - LP: #329267
+
+  [ Upstream Kernel Changes ]
+
+  * Subject:SAUCE: LP#193970 iwlagn: fix hw-rfkill while the interface is
+    down
+    - LP: #193970
+  * x86, vmi: put a missing paravirt_release_pmd in pgd_dtor
+  * nbd: fix I/O hang on disconnected nbds
+  * mac80211: restrict to AP in outgoing interface heuristic
+  * w1: w1 temp calculation overflow fix
+  * zd1211rw: adding 0ace:0xa211 as a ZD1211 device
+  * zd1211rw: treat MAXIM_NEW_RF(0x08) as UW2453_RF(0x09) for TP-Link
+    WN322/422G
+  * parport: parport_serial, don't bind netmos ibm 0299
+  * syscall define: fix uml compile bug
+  * kernel-doc: fix syscall wrapper processing
+  * Fix page writeback thinko, causing Berkeley DB slowdown
+  * write-back: fix nr_to_write counter
+  * writeback: fix break condition
+  * mm: rearrange exit_mmap() to unlock before arch_exit_mmap
+  * powerpc/fsl-booke: Fix mapping functions to use phys_addr_t
+  * lockd: fix regression in lockd's handling of blocked locks
+  * sctp: Fix crc32c calculations on big-endian arhes.
+  * sctp: Correctly start rtx timer on new packet transmissions.
+  * sctp: Properly timestamp outgoing data chunks for rtx purposes
+  * net: Fix frag_list handling in skb_seq_read
+  * net: Fix OOPS in skb_seq_read().
+  * drivers/net/skfp: if !capable(CAP_NET_ADMIN): inverted logic
+  * ipv4: fix infinite retry loop in IP-Config
+  * net: Fix userland breakage wrt. linux/if_tunnel.h
+  * net: packet socket packet_lookup_frame fix
+  * packet: Avoid lock_sock in mmap handler
+  * sungem: Soft lockup in sungem on Netra AC200 when switching interface
+    up
+  * udp: Fix UDP short packet false positive
+  * udp: increments sk_drops in __udp_queue_rcv_skb()
+  * ipv6: Disallow rediculious flowlabel option sizes.
+  * ipv6: Copy cork options in ip6_append_data
+  * net: 4 bytes kernel memory disclosure in SO_BSDCOMPAT gsopt try #2
+  * sky2: fix hard hang with netconsoling and iface going up
+  * tun: Add some missing TUN compat ioctl translations.
+  * tun: Fix unicast filter overflow
+  * virtio_net: Fix MAX_PACKET_LEN to support 802.1Q VLANs
+  * tcp: splice as many packets as possible at once
+  * tcp: Fix length tcp_splice_data_recv passes to skb_splice_bits.
+  * sparc: Enable syscall wrappers for 64-bit (CVE-2009-0029)
+  * sparc64: Annotate sparc64 specific syscalls with SYSCALL_DEFINEx()
+  * ALSA: hda - Add missing terminator in slave dig-out array
+  * ALSA: mtpav - Fix initial value for input hwport
+  * HID: adjust report descriptor fixup for MS 1028 receiver
+  * ide/libata: fix ata_id_is_cfa() (take 4)
+  * libata: fix EH device failure handling
+  * netfilter: fix tuple inversion for Node information request
+  * netfilter: xt_sctp: sctp chunk mapping doesn't work
+  * x86: microcode_amd: fix wrong handling of equivalent CPU id
+  * ide-cd: fix DMA for non bio-backed requests
+  * net: Fix data corruption when splicing from sockets.
+  * Linux 2.6.28.6
+  * eCryptfs: Regression in unencrypted filename symlinks
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Mon, 16 Feb 2009 06:43:51 -0700
+
+linux (2.6.28-8.22) jaunty; urgency=low
+
+  [ Amit Kucheria ]
+
+  * Remove perm-blacklist
+
+  [ Andy Whitcroft ]
+
+  * SAUCE: psmouse/synaptics: ensure we reset the device on resume
+    - LP: #317270
+
+  [ Tim Gardner ]
+
+  * Add lpia to getabi script
+  * SAUCE: tracer for sreadahead
+
+ -- Amit Kucheria <amit.kucheria@ubuntu.com>  Fri, 13 Feb 2009 15:23:21 +0200
+
+linux (2.6.28-8.21) jaunty; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * SAUCE: switch the Asus Pundit P1-AH2 to old acpi sleep ordering
+    - LP: #327267
+
+  [ Tim Gardner ]
+
+  * Added LPIA arch support
+  * Added libdrm-dev as a 'Replaces' to linux-libc-dev
+  * SAUCE: LPIA support for 9202 HDA Sigmatel codec
+  * SAUCE: Add an X86_LPIA Kconfig option
+  * SAUCE: UHCI USB quirk for resume
+  * SAUCE: LPIA Reboot fix for Intel Crownbeach development boards
+  * SAUCE: LPIA  Logical reset of USB port on resume
+  * Set CONFIG_WIRELESS_OLD_REGULATORY=n, added wireless-crda
+    as an install dependency.
+
+  [ Upstream Kernel Changes ]
+
+  * Revert "Revert "x86, early_ioremap: fix fencepost error""
+    - LP: #312554
+  * drm/i915: capture last_vblank count at IRQ uninstall time too
+    - LP: #320813
+  * drm/i915: add get_vblank_counter function for GM45
+    - LP: #320813
+  * Staging: comedi: fix Kbuild
+  * Staging: meilhaus: fix Kbuild
+  * Staging: android: binder: fix arm build errors
+  * Staging: android: timed_gpio: Fix build to build on kernels after
+    2.6.25.
+  * Staging: android: fix build error on 64bit boxes
+  * Staging: android: Add lowmemorykiller documentation.
+  * Staging: android: task_get_unused_fd_flags: fix the wrong usage of
+    tsk->signal
+  * staging: agnx: drivers/staging/agnx/agnx.h needs <linux/io.h>
+  * Staging: usbip: usbip_start_threads(): handle kernel_thread failure
+  * Staging: poch: fix verification of memory area
+  * Documentation: move DMA-mapping.txt to Doc/PCI/
+  * sgi-xp: fix writing past the end of kzalloc()'d space
+  * do_wp_page: fix regression with execute in place
+  * wait: prevent exclusive waiter starvation
+  * shm: fix shmctl(SHM_INFO) lockup with !CONFIG_SHMEM
+  * revert "rlimit: permit setting RLIMIT_NOFILE to RLIM_INFINITY"
+  * prevent kprobes from catching spurious page faults
+  * sound: usb-audio: handle wMaxPacketSize for FIXED_ENDPOINT devices
+  * md: Ensure an md array never has too many devices.
+  * md: Fix a bug in linear.c causing which_dev() to return the wrong
+    device.
+  * ACPI: Enable bit 11 in _PDC to advertise hw coord
+  * ACPI: dock: Don't eval _STA on every show_docked sysfs read
+  * ieee1394: ohci1394: increase AT req. retries, fix ack_busy_X from
+    Panasonic camcorders and others
+  * firewire: ohci: increase AT req. retries, fix ack_busy_X from Panasonic
+    camcorders and others
+  * firewire: sbp2: fix DMA mapping leak on the failure path
+  * firewire: sbp2: add workarounds for 2nd and 3rd generation iPods
+  * ieee1394: sbp2: add workarounds for 2nd and 3rd generation iPods
+  * module: remove over-zealous check in __module_get()
+  * x86: APIC: enable workaround on AMD Fam10h CPUs
+  * eeepc-laptop: fix oops when changing backlight brightness during
+    eeepc-laptop init
+  * eeepc-laptop: Add support for extended hotkeys
+  * e1000: fix bug with shared interrupt during reset
+  * e1000: Fix PCI enable to honor the need_ioport flag
+  * agp/intel: Fix broken ® symbol in device name.
+  * ALSA: hda - Add quirk for FSC Amilo Xi2550
+  * ALSA: hda - Add missing COEF initialization for ALC887
+  * ALSA: hda - Add missing initialization for ALC272
+  * asus_acpi: Add R1F support
+  * panasonic-laptop: fix X[ ARRAY_SIZE(X) ]
+  * ACPI: Skip the first two elements in the _BCL package
+  * ACPI: proc_dir_entry 'video/VGA' already registered
+  * ACPI: disable ACPI cleanly when bad RSDP found
+  * ACPICA: Fix table entry truncation calculation
+  * PCI: properly clean up ASPM link state on device remove
+  * PCI: return error on failure to read PCI ROMs
+  * seq_file: move traverse so it can be used from seq_read
+  * seq_file: fix big-enough lseek() + read()
+  * serial: set correct baud_base for Oxford Semiconductor Ltd EXSYS
+    EX-41092 Dual 16950 Serial adapter
+  * Add support for '8-port RS-232 MIC-3620 from advantech'
+  * mm: fix error case in mlock downgrade reversion
+  * elf core dump: fix get_user use
+  * ACPI: video: Fix reversed brightness behavior on ThinkPad SL series
+  * ipw2200: fix scanning while associated
+  * XFS: set b_error from bio error in xfs_buf_bio_end_io
+  * Revert USB: option: add Pantech cards
+  * USB: option: New mobile broadband modems to be supported
+  * USB: new id for ti_usb_3410_5052 driver
+  * USB: two more usb ids for ti_usb_3410_5052
+  * USB: usb-storage: add Pentax to the bad-vendor list
+  * sata_via: Add VT8261 support
+  * nbd: do not allow two clients at the same time
+  * sctp: Fix another socket race during accept/peeloff
+  * Linux 2.6.28.5
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Mon, 09 Feb 2009 16:11:28 -0700
+
+linux (2.6.28-7.20) jaunty; urgency=low
+
+  [ Tim Gardner ]
+
+  * SAUCE: Input: atkbd - Samsung NC10 key repeat fix
+
+  [ Upstream Kernel Changes ]
+
+  * Manually revert "mlock: downgrade mmap sem while populating mlocked
+    regions"
+  * xen: make sysfs files behave as their names suggest
+  * sata_mv: fix 8-port timeouts on 508x/6081 chips
+  * m68knommu: set NO_DMA
+  * PCI/MSI: bugfix/utilize for msi_capability_init()
+  * x86: use early clobbers in usercopy*.c
+  * netfilter: ctnetlink: fix scheduling while atomic
+  * orinoco: move kmalloc(..., GFP_KERNEL) outside spinlock in
+    orinoco_ioctl_set_genie
+  * fbdev/atyfb: Fix DSP config on some PowerMacs & PowerBooks
+  * kmalloc: return NULL instead of link failure
+  * sata_nv: rename nv_nf2_hardreset()
+  * sata_nv: fix MCP5x reset
+  * sata_nv: ck804 has borked hardreset too
+  * Fix memory corruption in console selection
+  * Add enable_ms to jsm driver
+  * nfsd: only set file_lock.fl_lmops in nfsd4_lockt if a stateowner is
+    found
+  * nfsd: Ensure nfsv4 calls the underlying filesystem on LOCKT
+  * iwlwifi: fix rs_get_rate WARN_ON()
+  * p54: fix lm87 checksum endianness
+  * p54: fix p54_read_eeprom to cope with tx_hdr_len
+  * p54usb: rewriting rx/tx routines to make use of usb_anchor's facilities
+  * minstrel: fix warning if lowest supported rate index is not 0
+  * PCI: irq and pci_ids patch for Intel Tigerpoint DeviceIDs
+  * cpuidle: Add decaying history logic to menu idle predictor
+  * ACPI: Avoid array address overflow when _CST MWAIT hint bits are set
+  * video: always update the brightness when poking "brightness"
+  * Newly inserted battery might differ from one just removed, so update of
+    battery info fields is required.
+  * ACPI: Do not modify SCI_EN directly
+  * dlm: initialize file_lock struct in GETLK before copying conflicting
+    lock
+  * sata_mv: Fix chip type for Hightpoint RocketRaid 1740/1742
+  * ACPICA: Allow multiple backslash prefix in namepaths
+  * Linux 2.6.28.4
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Sat, 07 Feb 2009 18:53:42 -0700
+
+linux (2.6.28-7.19) jaunty; urgency=low
+
+  * Fix missing modules FTBS
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Thu, 05 Feb 2009 15:28:15 -0700
+
+linux (2.6.28-7.18) jaunty; urgency=low
+
+  [ Alok Kataria ]
+
+  * SAUCE: (drop after 2.6.29) x86: add a synthetic TSC_RELIABLE feature
+    bit
+    - LP: #319945
+  * SAUCE: (drop after 2.6.29) x86: add X86_FEATURE_HYPERVISOR feature bit
+    - LP: #319945
+  * SAUCE: (drop after 2.6.29) x86: Hypervisor detection and get tsc_freq
+    from hypervisor
+    - LP: #319945
+  * SAUCE: (drop after 2.6.29) x86: Add a synthetic TSC_RELIABLE feature
+    bit.
+    - LP: #319945
+  * SAUCE: (drop after 2.6.29) x86: Skip verification by the watchdog for
+    TSC clocksource.
+    - LP: #319945
+  * SAUCE: (drop after 2.6.29) x86: VMware: Fix vmware_get_tsc code
+    - LP: #319945
+  * SAUCE: (drop after 2.6.29) x86: vmware: look for DMI string in the
+    product serial key
+    - LP: #319945
+
+  [ Andy Whitcroft ]
+
+  * SAUCE: toshiba_acpi -- pull in current -dev version of driver
+    - LP: #269831
+  * SAUCE: toshiba_acpi -- add acpi hotkey kernel thread
+    - LP: #269831
+  * move toshiba laptops back from tlsup to toshiba_acpi
+    - LP: #269831
+
+  [ Aneesh Kumar K.V ]
+
+  * SAUCE: (revert before 2.6.28.y update) ext4: Fix the delalloc
+    writepages to allocate blocks at the right offset.
+  * SAUCE: (revert before 2.6.28.y update) ext4: avoid ext4_error when
+    mounting a fs with a single bg
+  * SAUCE: (revert before 2.6.28.y update) ext4: Don't overwrite
+    allocation_context ac_status
+  * SAUCE: (revert before 2.6.28.y update) ext4: Add blocks added during
+    resize to bitmap
+  * SAUCE: (revert before 2.6.28.y update) ext4: Use
+    EXT4_GROUP_INFO_NEED_INIT_BIT during resize
+  * SAUCE: (revert before 2.6.28.y update) ext4: cleanup mballoc header
+    files
+  * SAUCE: (revert before 2.6.28.y update) ext4: don't use blocks freed but
+    not yet committed in buddy cache init
+  * SAUCE: (revert before 2.6.28.y update) ext4: Fix race between
+    read_block_bitmap() and mark_diskspace_used()
+  * SAUCE: (revert before 2.6.28.y update) ext4: Fix the race between
+    read_inode_bitmap() and ext4_new_inode()
+  * SAUCE: (revert before 2.6.28.y update) ext4: Use new buffer_head flag
+    to check uninit group bitmaps initialization
+  * SAUCE: (revert before 2.6.28.y update) ext4: mark the blocks/inode
+    bitmap beyond end of group as used
+  * SAUCE: (revert before 2.6.28.y update) ext4: Don't allow new groups to
+    be added during block allocation
+  * SAUCE: (revert before 2.6.28.y update) ext4: Init the complete page
+    while building buddy cache
+  * SAUCE: (revert before 2.6.28.y update) ext4: Fix s_dirty_blocks_counter
+    if block allocation failed with nodelalloc
+
+  [ Hannes Eder ]
+
+  * SAUCE: (drop after 2.6.29) x86: vmware - fix sparse warnings
+    - LP: #319945
+
+  [ Luke Yelavich ]
+
+  * hid modules have hyphens instead of underscores in their names
+
+  [ Mark Fasheh ]
+
+  * SAUCE: (revert before 2.6.28.y update) jbd2: Add BH_JBDPrivateStart
+
+  [ Theodore Ts'o ]
+
+  * SAUCE: (revert before 2.6.28.y update) ext4: Add support for non-native
+    signed/unsigned htree hash algorithms
+  * SAUCE: (revert before 2.6.28.y update) ext4: tone down
+    ext4_da_writepages warnings
+  * SAUCE: (revert before 2.6.28.y update) jbd2: Add barrier not supported
+    test to journal_wait_on_commit_record
+  * SAUCE: (revert before 2.6.28.y update) ext4: Add sanity checks for the
+    superblock before mounting the filesystem
+  * SAUCE: (revert before 2.6.28.y update) ext4: only use i_size_high for
+    regular files
+  * SAUCE: (revert before 2.6.28.y update) ext4: Add sanity check to
+    make_indexed_dir
+  * SAUCE: (revert before 2.6.28.y update) jbd2: On a __journal_expect()
+    assertion failure printk "JBD2", not "EXT3-fs"
+  * SAUCE: (revert before 2.6.28.y update) ext4: Initialize the new group
+    descriptor when resizing the filesystem
+
+  [ Tyler Hicks ]
+
+  * SAUCE: (drop after 2.6.28) [eCryptfs] Regression in unencrypted
+    filename symlinks
+    - LP: #322532
+
+  [ Upstream Kernel Changes ]
+
+  * Input: atkbd - broaden the Dell DMI signatures
+    - LP: #261721
+  * ti_usb_3410_5052: support alternate firmware
+  * ath5k: fix mesh point operation
+  * mac80211: decrement ref count to netdev after launching mesh discovery
+  * inotify: clean up inotify_read and fix locking problems
+  * fuse: destroy bdi on umount
+  * fuse: fix missing fput on error
+  * fuse: fix NULL deref in fuse_file_alloc()
+  * x86, mm: fix pte_free()
+  * klist.c: bit 0 in pointer can't be used as flag
+  * sysfs: fix problems with binary files
+  * x86: fix page attribute corruption with cpa()
+  * USB: fix toggle mismatch in disable_endpoint paths
+  * sound: virtuoso: enable UART on Xonar HDAV1.3
+  * USB: usbmon: Implement compat_ioctl
+  * USB: fix char-device disconnect handling
+  * USB: storage: add unusual devs entry
+  * alpha: nautilus - fix compile failure with gcc-4.3
+  * alpha: fix vmalloc breakage
+  * resources: skip sanity check of busy resources
+  * rtl8187: Add termination packet to prevent stall
+  * it821x: Add ultra_mask quirk for Vortex86SX
+  * libata: pata_via: support VX855, future chips whose IDE controller use
+    0x0571
+  * serial_8250: support for Sealevel Systems Model 7803 COMM+8
+  * drm: stash AGP include under the do-we-have-AGP ifdef
+  * Fix OOPS in mmap_region() when merging adjacent VM_LOCKED file segments
+  * bnx2x: Block nvram access when the device is inactive
+  * ext3: Add sanity check to make_indexed_dir
+  * rtl8187: Fix error in setting OFDM power settings for RTL8187L
+  * epoll: drop max_user_instances and rely only on max_user_watches
+  * gpiolib: fix request related issue
+  * sgi-xpc: Remove NULL pointer dereference.
+  * sgi-xpc: ensure flags are updated before bte_copy
+  * include/linux: Add bsg.h to the Kernel exported headers
+  * ALSA: hda - Fix PCM reference NID for STAC/IDT analog outputs
+  * ALSA: hda - add another MacBook Pro 4, 1 subsystem ID
+  * ALSA: hda - Add quirk for HP DV6700 laptop
+  * crypto: authenc - Fix zero-length IV crash
+  * crypto: ccm - Fix handling of null assoc data
+  * x86, pat: fix reserve_memtype() for legacy 1MB range
+  * x86, pat: fix PTE corruption issue while mapping RAM using /dev/mem
+  * PCI hotplug: fix lock imbalance in pciehp
+  * dmaengine: fix dependency chaining
+  * NET: net_namespace, fix lock imbalance
+  * relay: fix lock imbalance in relay_late_setup_files
+  * Linux 2.6.28.3
+  * ALSA: Enable SPDIF output on ALC655
+  * ALSA: hda - Add ASUS V1Sn support
+  * ALSA: hda - support detecting HD Audio devices with PCI class code
+  * ALSA: hda: alc883 model for ASUS P5Q-EM boards
+  * ALSA: hda - Add quirk for MSI 7260 mobo
+  * ALSA: hda - Add quirk for Sony VAIO VGN-SR19XN
+  * ALSA: oxygen: add Claro halo support
+  * ALSA: hda - Add a new function to seek for a codec ID
+  * ALSA: patch_sigmatel: Add missing Gateway entries and autodetection
+  * ALSA: hda - More fixes on Gateway entries
+  * ALSA: hda - Add MCP67 HDMI support
+  * ALSA: hda - fix name for ALC1200
+  * LSA: hda - Add HP Acacia detection
+  * ALSA: hda - Add quirk for HP 2230s
+  * ALSA: hda - Add quirk for Dell Inspiron Mini9
+  * ALSA: hda - add support for Intel DX58SO board
+  * ALSA: hda - Fix silent headphone output on Panasonic CF-74
+  * ALSA: USB quirk for Logitech Quickcam Pro 9000 name
+  * ALSA: hda - add quirks for some 82801H variants to use ALC883_MITAC
+
+  [ Yasunori Goto ]
+
+  * SAUCE: (revert before 2.6.28.y update) ext4: Widen type of
+    ext4_sb_info.s_mb_maxs[]
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Mon, 02 Feb 2009 23:07:13 -0700
+
+linux (2.6.28-6.17) jaunty; urgency=low
+
+  [ Amit Kucheria ]
+
+  * Updating configs: ARMEL/versatile
+
+ -- Amit Kucheria <amit.kucheria@ubuntu.com>  Fri, 30 Jan 2009 13:36:59 +0200
+
+linux (2.6.28-6.16) jaunty; urgency=low
+
+  [ Luke Yelavich ]
+
+  * Add hid quirks to input-modules udeb
+
+  [ Tim Gardner ]
+
+  * Revert "[arm] Fix kexec on ARM by properly calling the relocation
+    function". This patch was deemed 'bogus' by Russell King on the
+    ARM mailing list.
+
+  [ Upstream Kernel Changes ]
+
+  * PCI: keep ASPM link state consistent throughout PCIe hierarchy
+  * security: introduce missing kfree
+  * rt2x00: add USB ID for the Linksys WUSB200.
+  * p54usb: Add USB ID for Thomson Speedtouch 121g
+  * lib/idr.c: use kmem_cache_zalloc() for the idr_layer cache
+  * sgi-xp: eliminate false detection of no heartbeat
+  * sched: fix update_min_vruntime
+  * IA64: Turn on CONFIG_HAVE_UNSTABLE_CLOCK
+  * sound: virtuoso: do not overwrite EEPROM on Xonar D2/D2X
+  * ALSA: hda - Add quirk for another HP dv5
+  * ALSA: hda - Fix HP dv5 mic input
+  * ALSA: hda - Don't reset HP pinctl in patch_sigmatel.c
+  * ALSA: hda - make laptop-eapd model back for AD1986A
+  * drivers/net/irda/irda-usb.c: fix buffer overflow
+  * usb-storage: add last-sector hacks
+  * usb-storage: set CAPACITY_HEURISTICS flag for bad vendors
+  * pkt_sched: sch_htb: Fix deadlock in hrtimers triggered by HTB
+  * ipv6: Fix fib6_dump_table walker leak
+  * sctp: Avoid memory overflow while FWD-TSN chunk is received with bad
+    stream ID
+  * pkt_sched: cls_u32: Fix locking in u32_change()
+  * r6040: fix wrong logic in mdio code
+  * r6040: save and restore MIER correctly in the interrupt routine
+  * r6040: bump release number to 0.19
+  * tcp: don't mask EOF and socket errors on nonblocking splice receive
+  * p54usb: fix traffic stalls / packet drop
+  * netfilter: x_tables: fix match/target revision lookup
+  * netfilter: ebtables: fix inversion in match code
+  * netfilter: nf_conntrack: fix ICMP/ICMPv6 timeout sysctls on big-endian
+  * dell_rbu: use scnprintf() instead of less secure sprintf()
+  * powerpc: is_hugepage_only_range() must account for both 4kB and 64kB
+    slices
+  * hwmon: (abituguru3) Fix CONFIG_DMI=n fallback to probe
+  * mm: write_cache_pages cyclic fix
+  * mm: write_cache_pages early loop termination
+  * mm: write_cache_pages writepage error fix
+  * mm: write_cache_pages integrity fix
+  * mm: write_cache_pages cleanups
+  * mm: write_cache_pages optimise page cleaning
+  * mm: write_cache_pages terminate quickly
+  * mm: write_cache_pages more terminate quickly
+  * mm: do_sync_mapping_range integrity fix
+  * mm: direct IO starvation improvement
+  * fs: remove WB_SYNC_HOLD
+  * fs: sync_sb_inodes fix
+  * fs: sys_sync fix
+  * Linux 2.6.28.2
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Sun, 25 Jan 2009 13:36:16 -0700
+
+linux (2.6.28-5.15) jaunty; urgency=low
+
+  [ Tim Gardner ]
+
+  * Revert "Enabled CONFIG_PID_NS=y for i386/amd64"
+    Somehow this commit also reverted the 7 prior commits (which is bad).
+  * Enabled CONFIG_PID_NS=y for i386/amd64 (version 2)
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Thu, 22 Jan 2009 13:48:34 -0700
+
+linux (2.6.28-5.14) jaunty; urgency=low
+
+  [ Ben Collins ]
+
+  * lirc_gpio: Forward ported to current kernel (jaunty)
+  * configs: Enable LIRC_GPIO on 64-bit/32-bit x86
+    - LP: #298791
+
+  [ Jeff Layton ]
+
+  * SAUCE: cifs: make sure we allocate enough storage for socket address
+    - LP: #318565
+
+  [ Tim Gardner ]
+
+  * check-abi: Return success when ABI skip is requested and no ABI files exist.
+    This ought to fix the armel FTBS.
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Thu, 22 Jan 2009 06:42:49 -0700
+
+linux (2.6.28-5.13) jaunty; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * Revert "SAUCE: don't use buggy _BCL/_BCM/_BQC for backlight control"
+
+  [ Tim Gardner ]
+
+  * Fix udeb generation breakage caused by the previous armel versatile
+    flavour config update.
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Wed, 21 Jan 2009 12:38:35 -0700
+
+linux (2.6.28-5.12) jaunty; urgency=low
+
+  [ Ante ]
+
+  * Update drbd to 8.3.0
+
+  [ Dave Airlie ]
+
+  * i915/drm: provide compat defines for userspace for certain struct
+
+  [ Eric Anholt ]
+
+  * drm/i915: Don't double-unpin buffers if we take a signal in
+  * drm/i915: Don't complain when interrupted while pinning in execbuffers.
+  * drm/i915: Don't allow objects to get bound while VT switched.
+
+  [ Jani Monoses ]
+
+  * Fix webcam having USB ID 0ac8:303b
+    - LP: #292086
+
+  [ Jesse Barnes ]
+
+  * drm/i915: set vblank enabled flag correctly across IRQ
+  * drm/i915: don't enable vblanks on disabled pipes
+
+  [ Michael Casadevall ]
+
+  * [arm] Fix kexec on ARM by properly calling the relocation function
+
+  [ Tim Gardner ]
+
+  * Enabled CONFIG_PID_NS=y for i386/amd64
+  * SAUCE: Increase ATA_TMOUT_PMP_SRST_WAIT to 5 seconds.
+    - LP: #318978
+  * Update armel versatile config
+    - LP: #314789
+  * Enabled CONFIG_RT2860=m for i386/amd64
+  * Enabled CONFIG_RT2870=m for i386/amd64
+
+  [ Upstream Kernel Changes ]
+
+  * Input: atkbd - add keyboard quirk for HP Pavilion ZV6100 laptop
+    - LP: #291878
+  * ALSA: hda - Add quirk for another HP dv7
+  * ALSA: hda - Add quirk for HP6730B laptop
+  * ALSA: caiaq - Fix Oops with MIDI
+  * ALSA: hda - Fix typos for AD1882 codecs
+  * x86: fix intel x86_64 llc_shared_map/cpu_llc_id anomolies
+  * x86: default to SWIOTLB=y on x86_64
+  * CIFS: make sure that DFS pathnames are properly formed
+  * ring-buffer: prevent false positive warning
+  * ring-buffer: fix dangling commit race
+  * iwlwifi: use GFP_KERNEL to allocate Rx SKB memory
+  * tx493[89]ide: Fix length for __ide_flush_dcache_range
+  * tx4939ide: Do not use zero count PRD entry
+  * SCSI: eata: fix the data buffer accessors conversion regression
+  * USB: emi26: fix oops on load
+  * x86, UV: remove erroneous BAU initialization
+  * x86: fix incorrect __read_mostly on _boot_cpu_pda
+  * vmalloc.c: fix flushing in vmap_page_range()
+  * fs: symlink write_begin allocation context fix
+  * cgroups: fix a race between cgroup_clone and umount
+  * dm raid1: fix error count
+  * dm log: fix dm_io_client leak on error paths
+  * minix: fix add link's wrong position calculation
+  * md: fix bitmap-on-external-file bug.
+  * sched_clock: prevent scd->clock from moving backwards, take #2
+  * devices cgroup: allow mkfifo
+  * SCSI: aha152x_cs: Fix regression that keeps driver from using shared
+    interrupts
+  * ioat: fix self test for multi-channel case
+  * USB: isp1760: use a specific PLX bridge instead of any bdridge
+  * USB: isp1760: Fix probe in PCI glue code
+  * USB: unusual_devs.h additions for Pentax K10D
+  * inotify: fix type errors in interfaces
+  * Move compat system call declarations to compat header file
+  * Convert all system calls to return a long
+  * Rename old_readdir to sys_old_readdir
+  * Remove __attribute__((weak)) from sys_pipe/sys_pipe2
+  * Make sys_pselect7 static
+  * Make sys_syslog a conditional system call
+  * System call wrapper infrastructure
+  * powerpc: Enable syscall wrappers for 64-bit
+  * s390: enable system call wrappers
+  * System call wrapper special cases
+  * System call wrappers part 01
+  * System call wrappers part 02
+  * System call wrappers part 03
+  * System call wrappers part 04
+  * System call wrappers part 05
+  * System call wrappers part 06
+  * System call wrappers part 07
+  * System call wrappers part 08
+  * System call wrappers part 09
+  * System call wrappers part 10
+  * System call wrappers part 11
+  * System call wrappers part 12
+  * System call wrappers part 13
+  * System call wrappers part 14
+  * System call wrappers part 15
+  * System call wrappers part 16
+  * System call wrappers part 17
+  * System call wrappers part 18
+  * System call wrappers part 19
+  * System call wrappers part 20
+  * System call wrappers part 21
+  * System call wrappers part 22
+  * System call wrappers part 23
+  * System call wrappers part 24
+  * System call wrappers part 25
+  * System call wrappers part 26
+  * System call wrappers part 27
+  * System call wrappers part 28
+  * System call wrappers part 29
+  * System call wrappers part 30
+  * System call wrappers part 31
+  * System call wrappers part 32
+  * System call wrappers part 33
+  * s390 specific system call wrappers
+  * x86: fix RIP printout in early_idt_handler
+  * Fix timeouts in sys_pselect7
+  * USB: another unusual_devs entry for another bad Argosy storage device
+  * USB: storage: extend unusual range for 067b:3507
+  * USB: storage: recognizing and enabling Nokia 5200 cell phoes
+  * HID: fix error condition propagation in hid-sony driver
+  * fix switch_names() breakage in short-to-short case
+  * nfs: remove redundant tests on reading new pages
+  * eCryptfs: check readlink result was not an error before using it
+  * mvsas: increase port type detection delay to suit Seagate's 10k6 drive ST3450856SS 0003
+  * x86: avoid theoretical vmalloc fault loop
+  * ath9k: enable RXing of beacons on STA/IBSS
+  * mm lockless pagecache barrier fix
+  * powerpc: Disable Collaborative Memory Manager for kdump
+  * ibmvfc: Delay NPIV login retry and add retries
+  * ibmvfc: Improve async event handling
+  * getrusage: RUSAGE_THREAD should return ru_utime and ru_stime
+  * ath5k: ignore the return value of ath5k_hw_noise_floor_calibration
+  * mm: fix assertion
+  * XFS: truncate readdir offsets to signed 32 bit values
+  * Linux 2.6.28.1
+  * eCryptfs: Filename Encryption: Tag 70 packets
+  * eCryptfs: Filename Encryption: Header updates
+  * eCryptfs: Filename Encryption: Encoding and encryption functions
+  * eCryptfs: Filename Encryption: filldir, lookup, and readlink
+  * eCryptfs: Filename Encryption: mount option
+  * eCryptfs: Replace %Z with %z
+  * eCryptfs: Fix data types (int/size_t)
+  * eCryptfs: kerneldoc for ecryptfs_parse_tag_70_packet()
+  * eCryptfs: Clean up ecryptfs_decode_from_filename()
+  * fs/ecryptfs/inode.c: cleanup kerneldoc
+  * staging-p80211: Kill directly reference of netdev->priv
+  * staging-slicoss: Kill directly reference of netdev->priv
+  * staging-winbond: Kill directly reference of netdev->priv
+  * Staging: go7007: fixes due to video_usercopy api change
+  * Staging: go7007: fixes due v4l2_file_operations api change
+  * staging: correct dubious use of !x & y
+  * Staging: w35und: make wb35_probe() and wb35_disconnect() funtions static
+  * Staging: w35und: remove unused wb35_open() and wb35_close() functions
+  * Staging: w35und: use msleep() and udelay()
+  * Staging: w35und: remove the no-op pa_stall_execution macro
+  * Staging: w35und: purb typedef removal
+  * Staging: w35und: reg queue struct typedef removal
+  * Staging: w35und: wb35reg struct typedef removal
+  * Staging: w35und: padapter struct typedef removal
+  * Staging: w35und: merge wblinux struct to adapter
+  * Staging: w35und: wb35_probe() cleanup
+  * Staging: w35und: remove usb_submit_urb wrapper function
+  * Staging: w35und: remove usb_alloc_urb wrapper function
+  * w35und: remove dead code from wbusb_f.h
+  * Staging: w35und: remove true/false boolean macros
+  * Staging: w35und: OS_MEMORY_ALLOC wrapper removal
+  * Staging: w35und: usb_put_dev() is missing from wb35_disconnect()
+  * Staging: w35und: remove macro magic from MLME_GetNextPacket()
+  * Staging: w35und: plug memory leak in wbsoft_tx()
+  * Staging: w35und: move supported band initialization out of wb35_probe()
+  * Staging: w35und: remove timer wrappers
+  * Staging: w35und: remove atomic op wrappers
+  * Staging: w35und: remove memcpy/memcmp wrappers
+  * Staging: w35und: remove abs() and BIT() macros
+  * Staging: w35und: remove unused macros from common.h
+  * Staging: w35und: remove unused link status code
+  * Staging: w35und: #include cleanup
+  * Staging: w35und: remove some dead code
+  * Staging: w35und: move source files to one directory
+  * Staging: w35und: move struct wbsoft_priv to core.h and use it
+  * Staging: w35und: remove ->adapter from struct _HW_DATA_T
+  * Staging: w35und: clean up adapter.h a bit
+  * Staging: w35und: merge struct wb35_adapter to struct wbsoft_priv
+  * Staging: w35und: remove global struct ieee80211_hw
+  * Staging: w35und: inline DRIVER_AUTHOR and DRIVER_DESC macros
+  * Staging: w35und: clean up wblinux.c a bit
+  * Staging: w35und: remove unused ->ShutDowned member from struct
+    LOCAL_PARA
+  * Staging: w35und: move global wbsoft_enabled to struct wbsoft_priv
+  * Staging: w35und: move packet_came() to wb35rx.c
+  * Staging: w35und: remove ->skb_array from struct wbsoft_priv
+  * Staging: w35und: remove ->shutdown from struct wbsoft_priv
+  * Staging: w35und: make functions local to mds.c static
+  * Staging: w35und: make functions local to mlmetxrx.c static
+  * Staging: w35und: remove dead code from mto.c
+  * Staging: w35und: make functions local to wb35rx.c static
+  * Staging: w35und: make functions local to wb35tx.c static
+  * Staging: w35und: remove dead code from wbhal.c
+  * Staging: w35und: remove rxisr.c as dead code
+  * Staging: w35und: fix Kconfig
+  * Staging: w35und: fix config build warnings
+  * Staging: wlan-ng: Remove PCI/PLX/PCMCIA files.
+  * Staging: wlan-ng: Update Help text to mention prism3 devices.
+  * Staging: wlan-ng: Delete PCI/PLX/PCMCIA-specific code.
+  * Staging: wlan-ng: Make wlan-ng use WEXT mode by default.
+  * Staging: wlan-ng: Eliminate more <2.6 kernel support.
+  * Staging: wlan-ng: Eliminate all backwards-compatibility for <2.6.13 kernels.
+  * Staging: wlan-ng: Eliminate a boatload of tertiaryAP-only code.
+  * Staging: wlan-ng: Remove AP-only code from MLME functions.
+  * Staging: wlan-ng: Get rid of the MTU tests in the rx conversion path.
+  * Staging: wlan-ng: Eliminate one more rx mtu test.
+  * Staging: wlan-ng: Eliminate local 'version.h'
+  * Staging: wlan-ng: Eliminate usage of procfs.
+  * Staging: wlan-ng: Use standard kernel integer (u32/s32/etc) types.
+  * Staging: wlan-ng: Eliminate all backwards-compatible kernel code.
+  * Staging: wlan-ng: Wireless Extension support is mandatory.
+  * Staging: wlan-ng: use WIRELESS_EXT, not CONFIG_WIRELESS_EXT
+  * Staging: wlan-ng: Delete a large pile of now-unused code.
+  * Staging: wlan-ng: Delete a pile of unused mibs. And fix WEXT SET_TXPOWER.
+  * Staging: wlan-ng: Consolidate wlan-ng into a single module.
+  * Staging: wlan-ng: Purge all MIBs not used internally.
+  * Staging: wlan-ng: p80211netdev.c fix netdev alloc to prevent oops on device start
+  * Staging: wlan-ng: prism2_usb.c always enable the card in probe_usb
+  * Staging: wlan-ng: hfa384x_usb.c use newest version of 384x_drvr_start
+  * Staging: wlan-ng: p80211wext.c add latest changes & remove extra nulls from wext_handlers
+  * Staging: wlan-ng: p80211wext don't set default key id twice
+  * Staging: wlan-ng: hfa384x_usbin_callback: check for hardware removed
+  * Staging: wlan-ng: p80211conv.c copy code from wlan-ng-devel branch to not drop packets
+  * Staging: wlan-ng: remove unused #include <version.h>
+  * Staging: wlan-ng: p80211wext.c: use ARRAY_SIZE
+  * Staging: wlan-ng: fix compiler warnings
+  * Staging: wlan-ng: skb_p80211_to_ether() - payload_length is unsigned, check before subtraction
+  * Staging: at76_usb: update drivers/staging/at76_usb w/ mac80211 port
+  * Staging: at76_usb: fix build breakage
+  * Staging: at76_usb: remove compiler warnings
+  * Staging: at76_usb: fix up all remaining checkpatch.pl warnings
+  * Staging: at76_usb: cleanup dma on stack issues
+  * Staging: poch: Block size bug fix
+  * Staging: poch: Update TODO list
+  * Staging: poch: Correct pages from bytes.
+  * Staging: poch: minor fixes
+  * Staging: poch: Fix build warnings
+  * Staging: poch: Rx control register init
+  * Staging: poch: Fix user space protocol syncing
+  * Staging: poch: Fine grained locking
+  * Staging: sxg: remove typedefs
+  * Staging: sxg: break the build in a cleaner way when !x86
+  * Staging: sxg: update README
+  * staging: struct device - replace bus_id with dev_name(), dev_set_name()
+  * Staging: echo: remove typedefs
+  * Staging: echo: Lindent drivers/staging/echo
+  * Staging: go7007: saa7134 updates
+  * Staging: go7007: add sensoray 2250/2251 support
+  * Staging: go7007: Convert driver to use video_ioctl2
+  * Staging: go7007: annotate code pointers
+  * Staging: go7007: fix minor build warnings
+  * Staging: go7007: small cleanup
+  * Staging: go7007: add some more v4l2 ioctls
+  * Staging: et131x: Cleanup et131x_debug.h defines
+  * Staging: et131x: fix build failure
+  * Staging: et131x: remove unused variable in et1310_tx.c
+  * Staging: usbip: cleanup kerneldoc
+  * Staging: slicoss: use kzalloc
+  * Staging: slicoss: use correct type for memory allcations
+  * Staging: slicoss: use request_firmware
+  * Staging: add agnx wireless driver
+  * Staging: agnx: fix build errors due to ssid removal
+  * Staging: agnx: fix build errors due to rate control API changes
+  * Staging: agnx: fix build warnings
+  * Staging: add otus Atheros wireless network driver
+  * Staging: otus: fix netdev->priv usage
+  * Staging: otus: fix name clash
+  * Staging: otus: fix urb callback function type
+  * Staging: otus: remove dependence on kernel version
+  * Staging: add rt2860 wireless driver
+  * Staging: rt2860: disable root hack for reading files
+  * Staging: rt2860: fix up netdev->priv usage
+  * Staging: rt2860: use standard bit-reverse function
+  * Staging: rt2860: Fix minor compiler warnings
+  * Staging: rt2860: enable WPA_SUPPLICANT support
+  * Staging: Add ServerEngines benet 10Gb ethernet driver
+  * Staging: benet: fix netif api breakage
+  * Staging: benet: fix up netdev->priv change
+  * Staging: benet: build is broken unless CONFIG_NETPOLL is enabled
+  * Staging: benet: patch to remove subdirectories
+  * Staging: benet: fix build errors when CONFIG_NETPOLL is off
+  * Staging: benet: fix build error.
+  * Staging: benet: patch to use offsetof() instead of AMAP_BYTE_OFFSET()
+  * Staging: benet: fix problems reported by checkpatch
+  * Staging: benet: cleanup a check while posting rx buffers
+  * Staging: add comedi core
+  * Staging: comedi: fix up a lot of checkpatch.pl warnings
+  * Staging: comedi: fix checkpatch.pl errors in comedi_fops.c
+  * Staging: comedi: fix build error in comedilib.h
+  * Staging: comedi: add kcomedilib to the tree
+  * Staging: comedi: set up infrastructure for individual drivers
+  * Staging: comedi: add local copy of interrupt.h
+  * Staging: comedi: add pci and usb wrapper header files
+  * Staging: comedi: comedi driver common function module
+  * Staging: comedi: add mite comedi pci driver
+  * Staging: comedi: add usb usbdux driver
+  * Staging: comedi: add usb usbduxfast driver
+  * Staging: comedi: add usb dt9812 driver
+  * Staging: comedi: add comedi_bond driver
+  * Staging: comedi: add comedi_test driver
+  * Staging: comedi: add comedi_parport driver
+  * Staging: comedi: dt9812: fix up a lot of coding style issues
+  * Staging: comedi: dt9812: remove dt9812.h
+  * Staging: comedi: dt9812: remove typedefs
+  * Staging: comedi: dt9812: fix sparse warnings
+  * Staging: comedi: usbdux: remove kernel version checks
+  * Staging: comedi: usbdux: code style cleanups
+  * Staging: comedi: usbdux: remove // comments
+  * Staging: comedi: usbdux: fix up printk calls
+  * Staging: comedi: usbdux: remove checkpatch.pl warnings
+  * Staging: comedi: usbdux: remove typedef
+  * Staging: comedi: usbdux: remove comedi usb wrappers
+  * Staging: comedi: usbduxfast: remove comedi usb wrappers
+  * Staging: comedi: dt9812: remove #ifdef that is not needed
+  * Staging: comedi: remove usb wrappers
+  * Staging: comedi: remove PCI wrappers
+  * Staging: comedi: add icp_multi driver
+  * Staging: comedi: add me4000 driver
+  * Staging: comedi: fix checkpatch.pl issues in comedi_bond.c
+  * Staging: comedi: fix checkpatch.pl issues in comedi_fc.c
+  * Staging: comedi: remove typedefs from comedi_bond.c
+  * Staging: comedi: fix sparse issues in comedi_bond.c
+  * Staging: comedi: fix checkpatch.pl issues in comedi_test.c
+  * Staging: comedi: fix sparse issues in comedi_test.c
+  * Staging: comedi: remove typedefs from comedi_test.c
+  * Staging: comedi: fix comedi_parport.c checkpatch.pl issues.
+  * Staging: comedi: fix comedi_fc.h checkpatch.pl issues.
+  * Staging: comedi: fix comedi_pci.h checkpatch.pl issues.
+  * Staging: comedi: comedi_pci.h: remove unneeded wrapper
+  * Staging: comedi: comedi_pci.h: remove comedi_pci_enable_no_regions
+  * Staging: comedi: comedi_pci.h: remove comedi_pci_disable_no_regions
+  * Staging: comedi: add s626 driver
+  * Staging: comedi: add rtd520 driver
+  * Staging: comedi: add me_daq driver
+  * Staging: comedi: me_daq: fix checkpatch.pl issues
+  * Staging: comedi: me_daq: remove typedefs
+  * Staging: comedi: me_daq: fix sparse issues
+  * Staging: comedi: fix checkpatch.pl warning in interrupt.h
+  * Staging: comedi: fix build if CONFIG_PROC_FS is not set
+  * Staging: add asus_oled driver
+  * Staging: asus_oled: fix build dependancy
+  * Staging: Add the Meilhaus ME-IDS driver package
+  * Staging: meilhaus: fix __symbol_get problems
+  * Staging: add lcd-panel driver
+  * Staging: panel: major checkpatch cleanup
+  * Staging: panel: remove ifdefs and code for pre-2.6 kernels
+  * Staging: panel: remove support for smartcards
+  * Staging: add Driver for Altera PCI Express Chaining DMA reference design
+  * Staging: add rtl8187se driver
+  * Staging: rtl8187se: remove unneeded files
+  * Staging: rtl8187se: make the built module be the proper name
+  * Staging: rtl8187se: remove duplicate pci ids
+  * Staging: me4000: switch to list_for_each*()
+  * Staging: usbip: switch to list_for_each_entry()
+  * Staging: add princeton instruments usb camera driver
+  * Staging: add mimio xi driver
+  * Staging: add rt2870 wireless driver
+  * Staging: rt2870: disable root hack for reading files
+  * Staging: rt2870: fix up netdev->priv usage
+  * Staging: add frontier tranzport and alphatrack drivers
+  * Staging: frontier: remove unused alphatrack_sysfs.c file
+  * Staging: frontier: fix compiler warnings
+  * Staging: add epl stack
+  * Staging: epl: run Lindent on all kernel/*.h files
+  * Staging: epl: run Lindent on all user/*.h files
+  * Staging: epl: run Lindent on *.h files
+  * Staging: epl: run Lindent on *.c files
+  * Staging: epl: hr timers all run in hard irq context now
+  * Staging: epl: fix netdev->priv b0rkage
+  * Staging: add android framework
+  * Staging: android: add binder driver
+  * Staging: android: binder: Fix gcc warnings about improper format specifiers for size_t in printk
+  * staging: android: binder: Fix use of euid
+  * Staging: android: add logging driver
+  * Staging: android: add ram_console driver
+  * Staging: android: add timed_gpio driver
+  * Staging: android: timed_gpio: Rename android_timed_gpio to timed_gpio
+  * Staging: android: remove dummy android.c driver
+  * Staging: android: add lowmemorykiller driver
+  * Staging: android: binder: fix build errors
+  * staging: __FUNCTION__ is gcc-specific, use __func__
+  * V4L/DVB (10176a): Switch remaining clear_user_page users over to
+    clear_user_highpage
+
+  [ Zhenyu Wang ]
+
+  * agp/intel: add support for G41 chipset
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Sun, 18 Jan 2009 20:22:54 -0700
+
+linux (2.6.28-4.11) jaunty; urgency=low
+
+  [ Mario Limonciello ]
+
+  * SAUCE: Enable HDMI audio codec on Studio XPS 1340
+    - LP: #309508
+
+  [ Tim Gardner ]
+
+  * Fix armel d-i FTBSs
+
+  [ Upstream Kernel Changes ]
+
+  * USB: re-enable interface after driver unbinds
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Tue, 13 Jan 2009 16:33:08 -0700
+
+linux (2.6.28-4.10) jaunty; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * update kernel bootloader recommends: to prefer grub
+    - LP: #314004
+  * SAUCE: don't use buggy _BCL/_BCM/_BQC for backlight control
+    - LP: #311716
+  * SAUCE: test-suspend -- add the suspend test scripts
+    - LP: #316419
+
+  [ Colin Watson ]
+
+  * Enable udebs for armel
+
+  [ Tim Gardner ]
+
+  * SAUCE: Dell laptop digital mic does not work, PCI 1028:0271
+    - LP: #309508
+  * Enable CIFS_XATTR=y and CONFIG_CIFS_POSIX=y
+    - LP: #220658
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Thu, 08 Jan 2009 10:38:22 -0700
+
+linux (2.6.28-4.9) jaunty; urgency=low
+
+  [ Tim Gardner ]
+
+  * Restore DM_CRYPT, AES, ECB, and CBC as modules. This fixes
+    some installer issues with encrypted /home and Private directories.
+  * Take one more stab at building armel without module or ABI errors.
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Tue, 06 Jan 2009 08:38:23 -0700
+
+linux (2.6.28-4.8) jaunty; urgency=low
+
+  * Fix i386/amd64 FTBS by ignoring all module and ABI changes,
+    not something you would normally do, but I'm sure the ABI
+    has not changed. This will probably also allow the ARM builds to complete.
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Mon, 05 Jan 2009 14:42:58 -0700
+
+linux (2.6.28-4.7) jaunty; urgency=low
+
+  [ Tim Gardner ]
+
+  * Enable CONFIG_ATH5K=m for i386/amd64
+    - LP: #306719
+  * Build all i386/amd64 AGP/DRM components as modules.
+    - LP: #312721
+  * git commands are now installed outside the default $PATH
+    Use 'git  CMD' instead of 'git-CMD'.
+  * Build in most PATA/SATA drivers. This should allow most i386/amd64 systems to boot
+    without an initramfs, though some support work is still required in initramfs-tools
+    and grub.
+    - LP: #311730
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Fri, 02 Jan 2009 07:33:09 -0700
+
+linux (2.6.28-4.6) jaunty; urgency=low
+
+  [ Tim Gardner ]
+
+  * Enable CONFIG_X86_E_POWERSAVER=m for i386 generic
+    - LP: #237405
+  * Build i386 AGP drivers as modules
+    - LP: #312721
+  * Build i386 DRM as a module
+    - LP: #312721
+
+  [ Upstream Kernel Changes ]
+
+  * drm/i915: Add missing userland definitions for gem init/execbuffer.
+    - LP: #308387
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Mon, 29 Dec 2008 09:16:47 -0700
+
+linux (2.6.28-4.5) jaunty; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * clean up module dependancy information on package removal/purge
+    - LP: #300773
+
+  [ Tim Gardner ]
+
+  * Update iscsitarget to 0.4.17
+  * Build in ext{234}
+  * Build in Crypto modules AES, CBC, ECB
+  * Build in ACPI AC,BATTERY,BUTTON,FAN,PCI_SLOT,PROCESSOR,SBS,THERMAL,WMI
+  * Build in AGP intel,via,sis,ali,amd,amd64,efficeon,nvidia,sworks
+  * Build in ata,dev_dm,dev_loop,dev_md,dev_sd,dev_sr
+  * Build in BT l2cap,rfcomm,sco
+  * Reduce CONFIG_LEGACY_PTY_COUNT to 0
+  * Build in CDROM_PKTCDVD and CHR_DEV_SG
+  * Build in CPU_FREQ
+    GOV_CONSERVATIVE,GOV_ONDEMAND,GOV_POWERSAVE,GOV_USERSPACE,STAT,TABLE
+  * Build in DM CRYPT,MIRROR,MULTIPATH,SNAPSHOT
+  * Build in DRM
+  * Build in HID
+  * Build in HOTPLUG PCI,PCIE
+  * Build in I2C
+  * Build in IEEE1394 OHCI1394
+  * Build in INPUT EVDEV
+  * Build in IPV6
+  * Build in MMC
+  * Build in PACKET
+  * Enable both IEEE1394 (Firewire) stacks as modules
+    - LP: #276463
+  * Disable SUNRPC_REGISTER_V4
+    - LP: #306016
+  * Enable dm-raid4-5
+    - LP: #309378
+  * Build in PPP
+  * Build in RFKILL
+  * Build in USB SERIAL
+
+  [ Upstream Kernel Changes ]
+
+  * Rebased to v2.6.28
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Thu, 18 Dec 2008 21:18:44 -0700
+
+linux (2.6.28-3.4) jaunty; urgency=low
+
+  [ Tim Gardner ]
+
+  * Build ecryptfs into the kernel
+    - LP: #302870
+  * Deprecated gnbd
+
+  [ Upstream Kernel Changes ]
+
+  * Rebased to v2.6.28-rc8
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Wed, 10 Dec 2008 22:45:13 -0700
+
+linux (2.6.28-2.3) jaunty; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * update the templates so that we have spaces following the title line
+
+  [ Tim Gardner ]
+
+  * Add upload number to kernel version signature. This has the side effect
+    of renaming kernel packages back to the original way, e.g., without '-ub'
+    in the name.
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Thu, 04 Dec 2008 12:18:31 -0700
+
+linux (2.6.28-2.2) jaunty; urgency=low
+
+  [ Andy Whitcroft ]
+
+  * Revert "SAUCE: (no-up) version: Implement version_signature proc file."
+  * SAUCE: (no-up) version: Implement version_signature proc file.
+  * SAUCE: serial: RS485 ioctl structure uses __u32 include linux/types.h
+    - LP: #303711
+
+  [ Tim Gardner ]
+
+  * UBUNTU: Removed CONFIG_DRM_VIA_CHROME9 since it is upstream.
+  * UBUNTU: Removed ubuntu/via_chrome9
+
+  [ Upstream Kernel Changes ]
+
+  * Rebased to v2.6.28-rc7
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Tue, 02 Dec 2008 07:33:32 -0700
+
+linux (2.6.28-1.1) jaunty; urgency=low
+
+  [ Amit Kucheria ]
+
+  * SAUCE: make fc transport removal of target configurable
+  * SAUCE: pm: Config option to disable handling of console during
+    suspend/resume
+  * SAUCE: Adds support for COMPAL JHL90 webcam
+  * Map armel to arm to all editconfigs to work correctly
+  * Add armel to getabis for completeness sake
+  * Add -ub to our versioning to allow kerneloops.org to identify us
+
+  [ Andy Whitcroft ]
+
+  * Fix Vcs-Git path for the kernel repository.
+    - LP: #296915
+
+  [ Ben Collins ]
+
+  * SAUCE: Lower warning level of some PCI messages
+    - LP: #159241
+  * SAUCE: input/mouse/alps: Do not call psmouse_reset() for alps
+  * SAUCE: tulip: Let dmfe handle davicom on non-sparc
+  * SAUCE: tulip: Define ULI PCI ID's
+  * SAUCE: (no-up) version: Implement version_signature proc file.
+  * SAUCE: (no-up) connector.h: Add idx/val for drbd
+  * SAUCE: (no-up) swap: Add notify_swap_entry_free callback for compcache
+  * SAUCE: drivers: Remove some duplicate device entries in various modules
+  * SAUCE: (no-up) [AppArmor] merge with upstream subversion r1291
+  * SAUCE: (no-up) Enable ubuntu extra subdirectory
+  * SAUCE: (no-up) ACPI: initramfs DSDT override support
+  * ubuntu: Add drbd module
+  * ubuntu: Add iscsitarget module
+  * ubuntu: Add BOM for iscsitarget
+  * ubuntu: Add squashfs driver
+  * SAUCE: (no-up) Check for squashfs superblock in initramfs mounting.
+  * ubuntu: Add aufs module
+  * ubuntu: Added atl2 driver
+  * ubuntu: Added et131x driver
+  * ubuntu: Add dm-raid4-5 driver
+  * ubuntu: Add ndiswrapper driver
+  * ubuntu: Added ram backed compressed swap module (compcache)
+  * ubuntu: Add misc drivers from hardy lum
+  * ubuntu: Add heci driver 3.2.0.24
+  * ubuntu: Add ov511 and bt-sco drivers
+  * ubuntu: Add acx, prism2_usb wireless drivers
+  * ubuntu: Add at76 driver to build
+  * ubuntu: Add fsam7400 sw kill switch driver
+  * ubuntu: Added qc-usb driver
+  * ubuntu: e1000e: Upgraded module to 0.4.1.7
+  * ubuntu: Added rfkill drivers
+  * ubuntu: VIA - Add VIA DRM Chrome9 3D engine
+  * ubuntu: unionfs: Added v1.4 module from hardy
+  * ubuntu: Add LIRC driver
+  * ubuntu: Add GFS driver
+  * ubuntu: New tlsup driver for toshiba laptops
+  * SAUCE: (no-up) Export lookup_has for aufs
+  * SAUCE: (no-up) Modularize vesafb
+  * ubuntu: Config files
+  * Disable some modules that need porting to 2.6.28
+  * ubuntu: Fixup headers creation to include arch/*/include
+  * ubuntu/module-check: Ignore comment lines
+
+  [ Chuck Short ]
+
+  * SAUCE: ata: blacklist FUJITSU MHW2160BH PL
+
+  [ cking ]
+
+  * SAUCE: Enable speedstep for sonoma processors.
+
+  [ Colin Ian King ]
+
+  * ubuntu: Add dm-loop
+  * SAUCE: cx88: Support Leadtek WinFast DTV2000 H version J.
+  * SAUCE: fix kernel oops in VirtualBox during paravirt patching
+  * SAUCE: qc-usb: Enable Logitech QuickCam Messenger
+  * SAUCE: appleir: Enable driver for new MacBook Pro
+
+  [ Colin Watson ]
+
+  * Enable configfs, fuse, jfs, reiserfs, and xfs for armel
+  * Extend debian/d-i/ modules handling to make armel easier to support
+  * Create udebs for armel
+
+  [ Fabio M. Di Nitto ]
+
+  * ubuntu: update GFS Cluster File System
+
+  [ Kees Cook ]
+
+  * SAUCE: AppArmor: update to upstream subversion r1302
+
+  [ Leann Ogasawara ]
+
+  * Add automatic model setting for Samsung Q45
+  * Add Dell Dimension 9200 reboot quirk
+
+  [ Mackenzie Morgan ]
+
+  * SAUCE: Add quirk for ASUS Z37E to make sound audible after resume
+
+  [ Matthew Garrett ]
+
+  * SAUCE: hostap: send events on data interface as well as master
+    interface
+
+  [ Michael Frey (Senior Manager, MID ]
+
+  * SAUCE: Send HCI_RESET for Broadcomm 2046
+
+  [ Michael Haas ]
+
+  * add proper aufs source tree from 20080922
+  * Fix AUFS compilation in vfsub.c
+  * Add splice-2.6.23.patch from AUFS to export a symbol needed by AUFS
+  * Add put_filp.patch from AUFS to export a symbol needed by AUFS
+  * Add deny_write_access.patch from AUFS - export deny_write_access
+  * Add sec_perm-2.6.24.patch from AUFS - export security_inode_permission
+  * make sure TMPFS_MAGIC is defined in AUFS Makefile
+  * SAUCE: Revert aufs changes from AppArmor merge
+
+  [ Mohamed Abbas ]
+
+  * SAUCE: iwlagn -- fix rfkill when on when driver loaded
+
+  [ Phillip Lougher ]
+
+  * SAUCE: r8169: disable TSO by default for RTL8111/8168B chipsets.
+
+  [ Stefan Bader ]
+
+  * SAUCE: (no-up) Export dm_disk function of device-mapper
+  * SAUCE: Restore VT fonts on switch
+  * SAUCE: mmc: Increase power_up deleay to fix TI readers
+  * gfs1: GFS1 can't create more than 4kb file
+  * uvcvideo: Commit streaming parameters when enabling the video stream.
+
+  [ Tim Gardner ]
+
+  * SAUCE: Add extra headers to linux-libc-dev
+  * SAUCE: Catch nonsense keycodes and silently ignore
+  * SAUCE: Added support for HDAPS on various ThinkPads from Lenovo and IBM
+  * SAUCE: Guest OS does not recognize a lun with non zero target id on
+    Vmware ESX Server
+  * SAUCE: (no-up) Take care of orinoco_cs overlap with hostap_cs
+  * ubuntu: Add GNBD driver
+  * SAUCE: e1000e: Map NV RAM dynamically only when needed.
+  * SAUCE: Correctly blacklist Thinkpad r40e in ACPI
+  * SAUCE: Update Wacom tablet driver to 1.49
+  * SAUCE: Fix Wacom tablet 1.49 porting errors
+  * SAUCE: Enable an e1000e Intel Corporation 82567 Gigabit controller
+  * SAUCE: Fix Oops in wlan_setup
+  * SAUCE: ipw2200: change default policy for auto-associate
+  * Dell Wireless 365 needs BTUSB_RESET quirk.
+  * ndiswrapper remote buffer overflows on long ESSIDs (CVE 2008-4395)
+  * Disabled ubuntu/e1000e config
+
+  [ Upstream Kernel Changes ]
+
+  * Revert "[Bluetooth] Eliminate checks for impossible conditions in IRQ
+    handler"
+  * Revert "x86, early_ioremap: fix fencepost error"
+  * mac80211: fix two issues in debugfs
+  * iwl3945: do not send scan command if channel count zero
+
+ --  Ben Collins <ben.collins@canonical.com>  Fri, 07 Nov 2008 09:37:42 -0700
+
+linux (2.6.27-8.17) intrepid-proposed; urgency=low
+
+  [ John W. Linville ]
+
+  * SAUCE: iwlagn: avoid sleep in softirq context
+    -LP: #286285
+
+  [ Tim Gardner ]
+
+  * Dell Wireless 365 needs BTUSB_RESET quirk.
+    - LP: #293670
+  * SAUCE: ALSA: hda: make a STAC_DELL_EQ option (version 2)
+    - LP: #293271
+
+  [ Upstream Kernel Changes ]
+
+  * iwlagn: downgrade BUG_ON in interrupt
+  * Input: atkbd - expand Latitude's force release quirk to other Dells
+  * fbcon_set_all_vcs: fix kernel crash when switching the rotated consoles
+  * modules: fix module "notes" kobject leak
+  * Driver core: Fix cleanup in device_create_vargs().
+  * Driver core: Clarify device cleanup.
+  * ath9k/mac80211: disallow fragmentation in ath9k, report to userspace
+  * md: Fix rdev_size_store with size == 0
+  * xfs: fix remount rw with unrecognized options
+  * OHCI: Allow broken controllers to auto-stop
+  * USB: OHCI: fix endless polling behavior
+  * USB: Fix s3c2410_udc usb speed handling
+  * USB: EHCI: log a warning if ehci-hcd is not loaded first
+  * usb gadget: cdc ethernet notification bugfix
+  * usb: musb_hdrc build fixes
+  * drm/i915: fix ioremap of a user address for non-root (CVE-2008-3831)
+  * DVB: au0828: add support for another USB id for Hauppauge HVR950Q
+  * DVB: sms1xxx: support two new revisions of the Hauppauge WinTV
+    MiniStick
+  * security: avoid calling a NULL function pointer in
+    drivers/video/tvaudio.c
+  * Linux 2.6.27.3
+    -LP: #294152
+
+  * gpiolib: fix oops in gpio_get_value_cansleep()
+  * edac cell: fix incorrect edac_mode
+  * x86 ACPI: fix breakage of resume on 64-bit UP systems with SMP kernel
+  * sched: fix the wrong mask_len
+  * USB: cdc-wdm: make module autoload work
+  * USB: don't rebind drivers after failed resume or reset
+  * USB: fix memory leak in cdc-acm
+  * USB: Speedtouch: add pre_reset and post_reset routines
+  * dm kcopyd: avoid queue shuffle
+  * dm snapshot: fix primary_pe race
+  * amd_iommu: fix nasty bug that caused ILLEGAL_DEVICE_TABLE_ENTRY errors
+  * CIFS: fix saving of resume key before CIFSFindNext
+  * netfilter: xt_iprange: fix range inversion match
+  * netfilter: snmp nat leaks memory in case of failure
+  * netfilter: restore lost ifdef guarding defrag exception
+  * anon_vma_prepare: properly lock even newly allocated entries
+  * hvc_console: Fix free_irq in spinlocked section
+  * ACPI Suspend: Enable ACPI during resume if SCI_EN is not set
+  * ACPI suspend: Blacklist HP xw4600 Workstation for old code ordering
+  * ACPI suspend: Always use the 32-bit waking vector
+  * proc: fix vma display mismatch between /proc/pid/{maps,smaps}
+  * SCSI: scsi_dh: add Dell product information into rdac device handler
+  * PCI hotplug: cpqphp: fix kernel NULL pointer dereference
+  * V4L/DVB (9300): pvrusb2: Fix deadlock problem
+  * Linux 2.6.27.4
+    -LP: #294155
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Tue, 04 Nov 2008 12:16:07 -0700
+
+linux (2.6.27-7.16) intrepid-security; urgency=low
+
+  [ Tim Gardner ]
+
+  * ndiswrapper remote buffer overflows on long ESSIDs (CVE 2008-4395)
+    - LP: #275860
+
+  [ Upstream Kernel Changes ]
+
+  * ext[234]: Avoid printk floods in the face of directory corruption
+    (CVE-2008-3528)
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Mon, 03 Nov 2008 13:34:42 -0700
+
+linux (2.6.27-7.15) intrepid-security; urgency=low
+
+  [ Upstream Kernel Changes ]
+
+  * tcp: Restore ordering of TCP options for the sake of inter-operability
+    - LP: #264019
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Mon, 27 Oct 2008 19:28:06 -0600
+
+linux (2.6.27-7.14) intrepid; urgency=low
+
+  [ Tim Gardner ]
+
+  * Disable ath5k in 2.6.27
+    - LP: #288148
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Thu, 23 Oct 2008 07:40:43 -0600
+
+linux (2.6.27-7.13) intrepid; urgency=low
+
+  [ Stefan Bader ]
+
+  * gfs1: GFS1 can't create more than 4kb file
+
+  [ Tim Gardner ]
+
+  * Revert "SAUCE: x86: Reserve FIRST_DEVICE_VECTOR in used_vectors
+    bitmap.". Use upstream commit to avoid future conflicts.
+  * Revert "STABLE queue: mac80211: fix two issues in debugfs".
+    Use upstream commit to avoid future conflicts.
+  * Revert "x86, early_ioremap: fix fencepost error"
+    Use upstream commit to avoid future conflicts.
+
+  [ Upstream Kernel Changes ]
+
+  * sched_rt.c: resch needed in rt_rq_enqueue() for the root rt_rq
+  * x86: Reserve FIRST_DEVICE_VECTOR in used_vectors bitmap.
+  * mac80211: fix two issues in debugfs
+  * Fix barrier fail detection in XFS
+  * tty: Termios locking - sort out real_tty confusions and lock reads
+  * CIFS: make sure we have the right resume info before calling
+    CIFSFindNext
+  * rfkill: update LEDs for all state changes
+  * libertas: clear current command on card removal
+  * b43legacy: Fix failure in rate-adjustment mechanism
+  * x86, early_ioremap: fix fencepost error
+  * x86: SB450: skip IRQ0 override if it is not routed to INT2 of IOAPIC
+  * x86: improve UP kernel when CPU-hotplug and SMP is enabled
+  * sky2: Fix WOL regression
+  * netdrvr: atl1e: Don't take the mdio_lock in atl1e_probe
+  * Linux 2.6.27.2
+
+  [ Amit Kucheria ]
+
+  * Ubuntu: agp: Fix stolen memory counting on G4X.
+    -LP: 285572
+
+  [ Scott Remnant ]
+
+  * add MODULE_ALIAS to load ipmi_devintf with ipmi_si
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Sun, 19 Oct 2008 10:06:21 -0600
+
+linux (2.6.27-7.12) intrepid; urgency=low
+
+  [ Chuck Short ]
+
+  * xen: Add xen modules to virtual flavours.
+
+  [ Mario Limonciello ]
+
+  * SAUCE: Add back in lost commit for Apple BT Wireless Keyboard
+    - LP: #162083
+
+  [ Tim Gardner ]
+
+  * Remove depmod created files from packages.
+    - LP: #250511
+  *  Changed default TCP congestion algorithm to 'cubic' (again)
+    - LP: #278801
+  * Update configs for 'disable CONFIG_DYNAMIC_FTRACE'
+    - LP: #263555
+
+  [ Upstream Kernel Changes ]
+
+  * x86: register a platform RTC device if PNP doesn't describe it
+  * disable CONFIG_DYNAMIC_FTRACE due to possible memory corruption on
+    module unload
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Fri, 17 Oct 2008 11:25:39 -0600
+
+linux (2.6.27-7.11) intrepid; urgency=low
+
+  [ Amit Kucheria ]
+
+  * STABLE queue: mac80211: fix two issues in debugfs
+    - LP: #275227
+  * SAUCE: Adds support for COMPAL JHL90 webcam
+
+  [ Ben Collins ]
+
+  * SAUCE: (no-up) x86: Quiet "Kernel alive" messages
+    - LP: #39985
+  * SAUCE: (no-up) Modularize vesafb
+  * build/config: Enable vesafb module
+  * build: Switch to vesafb as preferred.
+
+  [ Leann Ogasawara ]
+
+  * Add Dell Dimension 9200 reboot quirk
+    - LP: #271370
+
+  [ Michael Haas ]
+
+  * SAUCE: Revert aufs changes from AppArmor merge
+
+  [ Tim Gardner ]
+
+  * fix virtio udeb layout
+    - LP: #257739
+  * Enabled CONFIG_EXT4DEV_FS=m
+  * Changed default TCP congestion algorithm to 'cubic'
+    - LP: #278801
+  * SAUCE: ipw2200: change default policy for auto-associate
+    - LP: #264104
+
+  [ Upstream Kernel Changes ]
+
+  * x86, early_ioremap: fix fencepost error
+    - LP: #263543
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Sat, 11 Oct 2008 08:07:42 -0600
+
+linux (2.6.27-7.10) intrepid; urgency=low
+
+  [ Alexey Starikovskiy ]
+
+  * SAUCE: ACPI: EC: do transaction from interrupt context
+    - LP: #277802
+
+  [ Ben Collins ]
+
+  * build/d-i: Change virtio-modules udeb to prio standard
+
+  [ Colin Ian King ]
+
+  * SAUCE: Blacklist IBM 2656 in serio/i8042
+    - LP: #21558
+
+  [ Henrik Rydberg ]
+
+  * Revert "SAUCE: applesmc: Add MacBookAir"
+  * SAUCE: [PATCH 1/5] hwmon: applesmc: Specified number of bytes to read
+    should match actual
+  * SAUCE: [PATCH 2/5] hwmon: applesmc: Fix the 'wait status failed: c !=
+    8' problem
+  * SAUCE: [PATCH 3/5] hwmon: applesmc: Prolong status wait
+  * SAUCE: [PATCH 4/5] hwmon: applesmc: Allow for variable ALV0 and ALV1
+    package length
+  * SAUCE: [PATCH 5/5] hwmon: applesmc: Add support for Macbook Air
+  * SAUCE: hwmon: applesmc: Add support for Macbook Pro 4
+  * SAUCE: hwmon: applesmc: Add support for Macbook Pro 3
+  * SAUCE: hwmon: applesmc: Lighter wait mechanism, drastic improvement
+
+  [ Leann Ogasawara ]
+
+  * Add automatic model setting for Samsung Q45
+    - LP: #200210
+
+  [ Tim Gardner ]
+
+  * SAUCE: Correctly blacklist Thinkpad r40e in ACPI
+    - LP: #278794
+  * SAUCE: Update Wacom tablet driver to 1.49
+    - LP: #260675
+  * SAUCE: ALPS touchpad for Dell Latitude E6500/E6400
+    - LP: #270643
+  * SAUCE: Fix Wacom tablet 1.49 porting errors
+  * SAUCE: Enable an e1000e Intel Corporation 82567 Gigabit controller
+  * SAUCE: Fix Oops in wlan_setup
+    - LP: #263309
+
+  [ Upstream Kernel Changes ]
+
+  * ath9k: fix oops on trying to hold the wrong spinlock
+  * [Bluetooth] Fix double frees on error paths of btusb and bpa10x drivers
+  * [Bluetooth] Add reset quirk for new Targus and Belkin dongles
+  * [Bluetooth] Add reset quirk for A-Link BlueUSB21 dongle
+  * Revert "ax25: Fix std timer socket destroy handling."
+  * ax25: Quick fix for making sure unaccepted sockets get destroyed.
+  * netrom: Fix sock_orphan() use in nr_release
+  * Revert "V4L/DVB (8904): cx88: add missing unlock_kernel"
+  * SLOB: fix bogus ksize calculation
+  * net: only invoke dev->change_rx_flags when device is UP
+  * tcp: Fix possible double-ack w/ user dma
+  * net: Fix netdev_run_todo dead-lock
+  * tcp: Fix tcp_hybla zero congestion window growth with small rho and large cwnd.
+  * [MIPS] Sibyte: Register PIO PATA device only for Swarm and Litte Sur
+  * eeepc-laptop: Fix hwmon interface
+  * hwmon: (it87) Prevent power-off on Shuttle SN68PT
+  * hwmon: Define sysfs interface for energy consumption register
+  * hwmon: (adt7473) Fix some bogosity in documentation file
+  * hwmon: (abituguru3) Enable reading from AUX3 fan on Abit AT8 32X
+  * hwmon: (abituguru3) Enable DMI probing feature on Abit AT8 32X
+  * [CPUFREQ] correct broken links and email addresses
+  * SLOB: fix bogus ksize calculation fix
+  * Don't allow splice() to files opened with O_APPEND
+  * Linux 2.6.27
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Wed, 08 Oct 2008 21:19:34 -0600
+
+linux (2.6.27-6.9) intrepid; urgency=low
+
+  [ Kees Cook ]
+
+  * SAUCE: AppArmor: update to upstream subversion r1302
+    - LP: #269921
+
+  [ Stefan Bader ]
+
+  * Update configuration files to be compliant to desktop specs
+    - LP: #279019
+
+  [ Tim Gardner ]
+
+  * Add support in e1000e for a couple of ICH10 PCI IDs
+  * Enable CONFIG_INPUT_PCSPKR=m
+    - LP: #275453
+
+  [ Upstream Kernel Changes ]
+
+  * V4L/DVB (8559a): Fix a merge conflict at gspca/sonixb
+  * V4L/DVB (8789): wm8739: remove wrong kfree
+  * V4L/DVB (8883): w9968cf: Fix order of usb_alloc_urb validation
+  * V4L/DVB (8884): em28xx-audio: fix memory leak
+  * V4L/DVB (8885): cpia2_usb: fix memory leak
+  * V4L/DVB (8886): ov511: fix memory leak
+  * V4L/DVB (8887): gspca: fix memory leak
+  * V4L/DVB (8892): pvrusb2: Handle USB ID 2040:2950 same as 2040:2900
+  * V4L/DVB (8904): cx88: add missing unlock_kernel
+  * V4L/DVB (8905): ov511: fix exposure sysfs attribute bug
+  * V4L/DVB (8909): gspca: PAC 7302 webcam 093a:262a added.
+  * hrtimer: migrate pending list on cpu offline
+  * hrtimer: fix migration of CB_IRQSAFE_NO_SOFTIRQ hrtimers
+  * hrtimer: mark migration state
+  * hrtimer: prevent migration of per CPU hrtimers
+  * [IA64] Put the space for cpu0 per-cpu area into .data section
+  * powerpc: Fix PCI in Holly device tree
+  * powerpc: Fix failure to shutdown with CPU hotplug
+  * mfd: Fix Kconfig accroding to the new gpiolib symbols
+  * mfd: Fix asic3 compilation
+  * x86: fix typo in enable_mtrr_cleanup early parameter
+  * ipsec: Fix pskb_expand_head corruption in xfrm_state_check_space
+  * iucv: Fix mismerge again.
+  * ALSA: ASoC: Fix cs4270 error path
+  * ALSA: hda - Fix model for Dell Inspiron 1525
+  * sctp: Fix kernel panic while process protocol violation parameter
+  * x86: Fix broken LDT access in VMI
+  * x86, vmi: fix broken LDT access
+  * tcp: Fix NULL dereference in tcp_4_send_ack()
+  * ipv6: NULL pointer dereferrence in tcp_v6_send_ack
+  * XFRM,IPv6: initialize ip6_dst_blackhole_ops.kmem_cachep
+  * af_key: Free dumping state on socket close
+  * dm: always allow one page in dm_merge_bvec
+  * dm: cope with access beyond end of device in dm_merge_bvec
+  * dm mpath: add missing path switching locking
+  * MN10300: Fix IRQ handling
+  * pxa2xx_spi: fix build breakage
+  * e1000e: write protect ICHx NVM to prevent malicious write/erase
+  * powerpc: Fix boot hang regression on MPC8544DS
+  * ASoC: Set correct name for WM8753 rec mixer output
+  * ALSA: snd-powermac: mixers for PowerMac G4 AGP
+  * ALSA: snd-powermac: HP detection for 1st iMac G3 SL
+  * fbcon: fix monochrome color value calculation
+  * inotify: fix lock ordering wrt do_page_fault's mmap_sem
+  * braille_console: only register notifiers when the braille console is used
+  * fix error-path NULL deref in alloc_posix_timer()
+  * memory hotplug: missing zone->lock in test_pages_isolated()
+  * mm: tiny-shmem nommu fix
+  * mm: handle initialising compound pages at orders greater than MAX_ORDER
+  * e1000e: reset swflag after resetting hardware
+  * e1000e: do not ever sleep in interrupt context
+  * e1000e: remove phy read from inside spinlock
+  * e1000e: drop stats lock
+  * e1000e: debug contention on NVM SWFLAG
+  * e1000e: update version from k4 to k6
+  * Check mapped ranges on sysfs resource files
+  * e1000e: Fix incorrect debug warning
+  * [MIPS] Build fix: Fix irq flags type
+  * [MIPS] SMTC: Build fix: Fix filename in Makefile
+  * [MIPS] SMTC: Fix holes in SMTC and FPU affinity support.
+  * [MIPS] SMTC: Close tiny holes in the SMTC IPI replay system.
+  * [MIPS] SMTC: Fix SMTC dyntick support.
+  * [S390] nohz: Fix __udelay.
+  * [S390] qdio: prevent stack clobber
+  * Fix init/main.c to use regular printk with '%pF' for initcall fn
+  * x86 setup: correct segfault in generation of 32-bit reloc kernel
+  * selinux: Fix an uninitialized variable BUG/panic in selinux_secattr_to_sid()
+  * rtc: fix kernel panic on second use of SIGIO nofitication
+  * fbdev: fix recursive notifier and locking when fbdev console is blanked
+  * orion_spi: fix handling of default transfer speed
+  * include/linux/stacktrace.h: declare struct task_struct
+  * cpusets: remove pj from cpuset maintainers
+  * MAINTAINERS: add mailing list for man-pages
+  * SubmitChecklist: interfaces changes should CC linux-api@
+  * Documentation/HOWTO: info about interface changes should CC linux-api@vger
+  * dw_dmac: fix copy/paste bug in tasklet
+  * leds-fsg: change order of initialization and deinitialization
+  * leds-pca955x: add proper error handling and fix bogus memory handling
+  * ACPI: Make /proc/acpi/wakeup interface handle PCI devices (again)
+  * clockevents: check broadcast tick device not the clock events device
+  * V4L/DVB (8919): cx18: Fix tuner audio input for Compro H900 cards
+  * V4L/DVB (8926): gspca: Bad fix of leak memory (changeset 43d2ead315b1).
+  * V4L/DVB (8933): gspca: Disable light frquency for zc3xx cs2102 Kokom.
+  * V4L/DVB (8935): em28xx-cards: Remove duplicate entry (EM2800_BOARD_KWORLD_USB2800)
+  * V4L/DVB (8955): bttv: Prevent NULL pointer dereference in radio_open
+  * V4L/DVB (8957): zr36067: Restore the default pixel format
+  * V4L/DVB (8958): zr36067: Return proper bytes-per-line value
+  * V4L/DVB (8960): drivers/media/video/cafe_ccic.c needs mm.h
+  * V4L/DVB (8961): zr36067: Fix RGBR pixel format
+  * V4L/DVB (8963): s2255drv field count fix
+  * V4L/DVB (8967): Use correct XC3028L firmware for AMD ATI TV Wonder 600
+  * V4L/DVB (8978): sms1xxx: fix product name for Hauppauge WinTV MiniStick
+  * V4L/DVB (8979): sms1xxx: Add new USB product ID for Hauppauge WinTV MiniStick
+  * V4L/DVB (9029): Fix deadlock in demux code
+  * V4L/DVB (9037): Fix support for Hauppauge Nova-S SE
+  * V4L/DVB (9043): S5H1420: Fix size of shadow-array to avoid overflow
+  * V4L/DVB (9053): fix buffer overflow in uvc-video
+  * V4L/DVB (9075): gspca: Bad check of returned status in i2c_read() spca561.
+  * V4L/DVB (9080): gspca: Add a delay after writing to the sonixj sensors.
+  * V4L/DVB (9092): gspca: Bad init values for sonixj ov7660.
+  * V4L/DVB (9099): em28xx: Add detection for K-WORLD DVB-T 310U
+  * V4L/DVB (9103): em28xx: HVR-900 B3C0 - fix audio clicking issue
+  * x86: gart iommu have direct mapping when agp is present too
+  * ide-cd: temporary tray close fix
+  * ide-dma: fix ide_build_dmatable() for TRM290
+  * IDE: Fix platform device registration in Swarm IDE driver (v2)
+  * ide-cd: Optiarc DVD RW AD-7200A does play audio
+  * ide: workaround for bogus gcc warning in ide_sysfs_register_port()
+  * [MIPS] Fix CMP Kconfig configuration and mark as broken.
+  * [MIPS] IP27: Fix build errors if CONFIG_MAPPED_KERNEL=y
+  * x86 ACPI: Blacklist two HP machines with buggy BIOSes
+  * kgdb, x86: Avoid invoking kgdb_nmicallback twice per NMI
+  * kgdb: call touch_softlockup_watchdog on resume
+  * atmel-mci: Initialize BLKR before sending data transfer command
+  * Marker depmod fix core kernel list
+  * Linux 2.6.27-rc9
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Sun, 05 Oct 2008 21:27:49 -0600
+
+linux (2.6.27-5.8) intrepid; urgency=low
+
+  [ Amit Kucheria ]
+
+  * Update AUFS-related Kconfig
+    - LP: #264048
+
+  [ Michael Haas ]
+
+  * add proper aufs source tree from 20080922
+  * Fix AUFS compilation in vfsub.c
+  * Add splice-2.6.23.patch from AUFS to export a symbol needed by AUFS
+  * Add put_filp.patch from AUFS to export a symbol needed by AUFS
+  * apply (modified) lhash.patch from AUFS to export __lookup_hash()
+  * Add deny_write_access.patch from AUFS - export deny_write_access
+  * Add sec_perm-2.6.24.patch from AUFS - export security_inode_permission
+  * make sure TMPFS_MAGIC is defined in AUFS Makefile
+
+  [ Tim Gardner ]
+
+  * Enabled CONFIG_IPWIRELESS
+    - LP: #274748
+  * Enabled CONFIG_E1000E, disabled CONFIG_E1000E_NEW
+    This takes advantage of the upstream NVM protection fix in
+    commit 4a7703582836f55a1cbad0e2c1c6ebbee3f9b3a7.
+
+  [ Upstream Kernel Changes ]
+
+  * Revert "[Bluetooth] Eliminate checks for impossible conditions in IRQ
+    handler"
+  * [SCSI] qla2xxx: Defer enablement of RISC interrupts until ISP
+    initialization completes.
+  * PCI: Fix pcie_aspm=force
+  * PCI: fix compiler warnings in pci_get_subsys()
+  * UBIFS: create the name of the background thread in every case
+  * UBIFS: TNC / GC race fixes
+  * UBIFS: remove incorrect assert
+  * UBIFS: fix printk format warnings
+  * AMD IOMMU: set iommu sunc flag after command queuing
+  * AMD IOMMU: protect completion wait loop with iommu lock
+  * sparc64: Fix disappearing PCI devices on e3500.
+  * x86, oprofile: BUG scheduling while atomic
+  * ALSA: ASoC: Fix at32-pcm build breakage with PM enabled
+  * ath9k: connectivity is lost after Group rekeying is done
+  * wireless: zd1211rw: add device ID fix wifi dongle "trust nw-3100"
+  * [IA64] Ski simulator doesn't need check_sal_cache_flush
+  * [IA64] kexec fails on systems with blocks of uncached memory
+  * ath9k: Fix IRQ nobody cared issue with ath9k
+  * [Bluetooth] Fix I/O errors on MacBooks with Broadcom chips
+  * [Bluetooth] Fix wrong URB handling of btusb driver
+  * [Bluetooth] Fix USB disconnect handling of btusb driver
+  * sparc64: Fix missing devices due to PCI bridge test in
+    of_create_pci_dev().
+  * [WATCHDOG] ibmasr: remove unnecessary spin_unlock()
+  * [WATCHDOG] wdt285: fix sparse warnings
+  * [WATCHDOG] unlocked_ioctl changes
+  * x86: fix 27-rc crash on vsmp due to paravirt during module load
+  * sched: fix init_hrtick() section mismatch warning
+  * clockevents: prevent cpu online to interfere with nohz
+  * x86: prevent stale state of c1e_mask across CPU offline/online
+  * clockevents: prevent stale tick_next_period for onlining CPUs
+  * clockevents: check broadcast device not tick device
+  * clockevents: prevent mode mismatch on cpu online
+  * x86: prevent C-states hang on AMD C1E enabled machines
+  * x86: c1e_idle: don't mark TSC unstable if CPU has invariant TSC
+  * timers: fix build error in !oneshot case
+  * ALSA: ASoC: maintainers - update email address for Liam Girdwood
+  * ibmasr: remove unnecessary spin_unlock()
+  * smb.h: do not include linux/time.h in userspace
+  * kernel-doc: allow structs whose members are all private
+  * kexec: fix segmentation fault in kimage_add_entry
+  * Documentation/DMA-mapping.txt: update for pci_dma_mapping_error()
+    changes
+  * sys_paccept: disable paccept() until API design is resolved
+  * mm: tiny-shmem fix lock ordering: mmap_sem vs i_mutex
+  * Documentation/sysctl/kernel.txt: fix softlockup_thresh description
+  * memcg: check under limit at shrink_usage
+  * atmel_serial: update the powersave handler to match serial core
+  * [SCSI] Fix hang with split requests
+  * USB Storage: Sierra: Non-configurable TRU-Install
+  * USB Serial: Sierra: Device addition & version rev
+  * USB: ehci: fix some ehci hangs and crashes
+  * USB: Fix the Nokia 6300 storage-mode.
+  * USB: Correct Sierra Wireless USB EVDO Modem Device ID
+  * USB: fix hcd interrupt disabling
+  * USB: update of Documentation/usb/anchors.txt
+  * usb gadget: fix omap_udc DMA regression
+  * USB: Fixing Nokia 3310c in storage mode
+  * usb: musb: fix include path
+  * USB: fix EHCI periodic transfers
+  * usb-serial: Add Siemens EF81 to PL-2303 hack triggers
+  * USB: SERIAL CP2101 add device IDs
+  * USB: unusual_devs addition for RockChip MP3 player
+  * USB: fsl_usb2_udc: fix VDBG() format string
+  * usb serial: ti_usb_3410_5052 obviously broken by firmware changes
+  * USB: ftdi_sio: Add 0x5050/0x0900 USB IDs (Papouch Quido USB 4/4)
+  * USB: serial: add ZTE CDMA Tech id to option driver
+  * USB Serial: Sierra: Add MC8785 VID/PID
+  * USB: drivers/usb/musb/: disable it on SuperH
+  * usb: ftdi_sio: add support for Domintell devices
+  * usb: unusual devs patch for Nokia 5310 Music Xpress
+  * USB: revert recovery from transient errors
+  * [MIPS] au1000: Fix gpio direction
+  * [MIPS] Fixe the definition of PTRS_PER_PGD
+  * x86: prevent stale state of c1e_mask across CPU offline/online, fix
+  * x86: disable apm on the olpc
+  * i2c-powermac: Fix section for probe and remove functions
+  * i2c-dev: Return correct error code on class_create() failure
+  * i2c: Fix mailing lists in two MAINTAINERS entries
+  * ath9k: disable MIB interrupts to fix interrupt storm
+  * 9p: implement proper trans module refcounting and unregistration
+  * 9p-trans_fd: fix trans_fd::p9_conn_destroy()
+  * 9p-trans_fd: clean up p9_conn_create()
+  * 9p-trans_fd: don't do fs segment mangling in p9_fd_poll()
+  * 9p-trans_fd: fix and clean up module init/exit paths
+  * 9p: introduce missing kfree
+  * 9p: use an IS_ERR test rather than a NULL test
+  * 9p: fix put_data error handling
+  * netfilter: ip6t_{hbh,dst}: Rejects not-strict mode on rule insertion
+  * MN10300: Move asm-arm/cnt32_to_63.h to include/linux/
+  * MN10300: Make sched_clock() report time since boot
+  * ALSA: fix locking in snd_pcm_open*() and snd_rawmidi_open*()
+  * ALSA: remove unneeded power_mutex lock in snd_pcm_drop
+  * IPoIB: Fix crash when path record fails after path flush
+  * [XFS] Fix extent list corruption in xfs_iext_irec_compact_full().
+  * [XFS] Remove xfs_iext_irec_compact_full()
+  * kgdb: could not write to the last of valid memory with kgdb
+  * kgdb, x86, arm, mips, powerpc: ignore user space single stepping
+  * kgdb, x86_64: gdb serial has BX and DX reversed
+  * kgdb, x86_64: fix PS CS SS registers in gdb serial
+  * kgdboc,tty: Fix tty polling search to use name correctly
+  * ARM: Delete ARM's own cnt32_to_63.h
+  * m32r: remove the unused NOHIGHMEM option
+  * m32r: don't offer CONFIG_ISA
+  * m32r: export empty_zero_page
+  * m32r: export __ndelay
+  * m32r/kernel/: cleanups
+  * [MIPS] au1000: Make sure GPIO value is zero or one
+  * [MIPS] IP27: Switch to dynamic interrupt routing avoding panic on
+    error.
+  * [MIPS] BCM47xx: Fix build error due to missing PCI functions
+  * [SSB] Initialise dma_mask for SSB_BUSTYPE_SSB devices
+  * Swarm: Fix crash due to missing initialization
+  * ide-tape: fix vendor strings
+  * ide: note that IDE generic may prevent other drivers from attaching
+  * cdrom: update ioctl documentation
+  * [SCSI] qlogicpti: fix sg list traversal error in continuation entries
+  * sata_nv: reinstate nv_hardreset() for non generic controllers
+  * scsi: fix fall out of sg-chaining patch in qlogicpti
+  * ALSA: make the CS4270 driver a new-style I2C driver
+  * ALSA: ASoC: Fix another cs4270 error path
+  * Fix NULL pointer dereference in proc_sys_compare
+  * kconfig: fix silentoldconfig
+  * kconfig: readd lost change count
+  * mm owner: fix race between swapoff and exit
+  * Linux 2.6.27-rc8
+  * e1000e: write protect ICHx NVM to prevent malicious write/erase
+
+ -- Amit Kucheria <amit.kucheria@canonical.com>  Tue, 30 Sep 2008 18:22:35 +0300
+
+linux (2.6.27-4.7) intrepid; urgency=low
+
+  [ Ben Collins ]
+
+  * build/abi: Add gfs1 to perm blacklist
+  * build/abi: Ignored changes in gfs2 symbols
+
+  [ Fabio M. Di Nitto ]
+
+  * Revert "SAUCE: Export gfs2 symbols required for gfs1 kernel module"
+  * ubuntu: update GFS Cluster File System
+
+  [ Stefan Bader ]
+
+  * SAUCE: x86: Reserve FIRST_DEVICE_VECTOR in used_vectors bitmap.
+    - LP: #276334
+
+  [ Tim Gardner ]
+
+  * Revert "Disable e1000e until the NVRAM corruption problem is found."
+  * Add atl1e and atl2 to Debian installer bits
+    - LP: #273904
+  * SAUCE: e1000e: Map NV RAM dynamically only when needed.
+    - LP: #263555
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Fri, 26 Sep 2008 20:51:22 -0600
+
+linux (2.6.27-4.6) intrepid; urgency=low
+
+  [ Tim Gardner ]
+
+  * Disable e1000e until the NVRAM corruption problem is found.
+    - LP: #263555
+
+  [ Upstream Kernel Changes ]
+
+  * Revert "[Bluetooth] Eliminate checks for impossible conditions in IRQ
+    handler"
+
+ -- Ben Collins <ben.collins@canonical.com>  Tue, 23 Sep 2008 09:53:57 -0400
+
+linux (2.6.27-4.5) intrepid; urgency=low
+
+  [ Upstream Kernel Changes ]
+
+  * Revert "b43/b43legacy: add RFKILL_STATE_HARD_BLOCKED support"
+  * udf: Fix lock inversion between iprune_mutex and alloc_mutex (v2)
+  * udf: Fix error paths in udf_new_inode()
+  * [SCSI] sd: select CRC_T10DIF only when necessary
+  * [SCSI] zfcp: Fix request queue locking
+  * [SCSI] zfcp: Correctly query end flag in gpn_ft response
+  * [SCSI] zfcp: Simplify ccw notify handler
+  * [SCSI] zfcp: Fix reference counter for remote ports
+  * [SCSI] zfcp: channel cannot be detached due to refcount imbalance
+  * [SCSI] zfcp: Remove duplicated unlikely() macros.
+  * [SCSI] scsi_dh: make check_sense return ADD_TO_MLQUEUE
+  * [SCSI] make scsi_check_sense HARDWARE_ERROR return ADD_TO_MLQUEUE on
+    retry
+  * [SCSI] fix check of PQ and PDT bits for WLUNs
+  * pcm037: add rts/cts support for serial port
+  * i.MX serial: fix init failure
+  * imx serial: set RXD mux bit on i.MX27 and i.MX31
+  * imx serial: fix rts handling for non imx1 based hardware
+  * mlx4_core: Set RAE and init mtt_sz field in FRMR MPT entries
+  * udf: add llseek method
+  * PCI/iommu: blacklist DMAR on Intel G31/G33 chipsets
+  * PCI: Fix printk warnings in probe.c
+  * PCI: Fix printk warnings in setup-bus.c
+  * PCI Hotplug: fakephp: fix deadlock... again
+  * clockevents: remove WARN_ON which was used to gather information
+  * ocfs2: Fix a bug in direct IO read.
+  * arch/x86/kernel/kdebugfs.c: introduce missing kfree
+  * [IA64] fix compile failure with non modular builds
+  * [IA64] fix up bte.h
+  * [IA64] arch/ia64/sn/pci/tioca_provider.c: introduce missing kfree
+  * PCI: fix pciehp_free_irq()
+  * [IA64] prevent ia64 from invoking irq handlers on offline CPUs
+  * ide: Fix pointer arithmetic in hpt3xx driver code (3rd try)
+  * add deprecated ide-scsi to feature-removal-schedule.txt
+  * swiotlb: fix back-off path when memory allocation fails
+  * sparc64: Fix interrupt register calculations on Psycho and Sabre.
+  * VIDEO_SH_MOBILE_CEU should depend on HAS_DMA
+  * m68k: Update defconfigs for 2.6.27-rc6
+  * sparc32: Fix function signature of of_bus_sbus_get_flags().
+  * sched: fix 2.6.27-rc5 couldn't boot on tulsa machine randomly
+  * sched: fix deadlock in setting scheduler parameter to zero
+  * KVM: SVM: fix random segfaults with NPT enabled
+  * KVM: SVM: fix guest global tlb flushes with NPT
+  * KVM: VMX: Always return old for clear_flush_young() when using EPT
+  * clocksource, acpi_pm.c: fix check for monotonicity
+  * [ARM] OMAP: Fix MMC device data
+  * block: disable sysfs parts of the disk command filter
+  * ath9k: Assign seq# when mac80211 requests this
+  * sg: disable interrupts inside sg_copy_buffer
+  * MN10300: Change the fault handler to check in_atomic() not
+    in_interrupt()
+  * [Bluetooth] Fix regression from using default link policy
+  * netlink: fix overrun in attribute iteration
+  * x86: fix possible x86_64 and EFI regression
+  * sparc64: Fix PCI error interrupt registry on PSYCHO.
+  * sparc: Fix user_regset 'n' field values.
+  * niu: panic on reset
+  * PCI: re-add debug prints for unmodified BARs
+  * [ARM] 5245/1: Fix warning about unused return value in drivers/pcmcia
+  * [ARM] 5246/1: tosa: add proper clock alias for tc6393xb clock
+  * [ARM] 5247/1: tosa: SW_EAR_IN support
+  * [ARM] Fix PCI_DMA_BUS_IS_PHYS for ARM
+  * ata: duplicate variable sparse warning
+  * sata_inic162x: enable LED blinking
+  * [libata] LBA28/LBA48 off-by-one bug in ata.h
+  * proc: more debugging for "already registered" case
+  * include/linux/ioport.h: add missing macro argument for devm_release_*
+    family
+  * cpuset: avoid changing cpuset's cpus when -errno returned
+  * cpuset: hotplug documentation fix
+  * coredump_filter: add description of bit 4
+  * bfs: fix Lockdep warning
+  * mm: ifdef Quicklists in /proc/meminfo
+  * spi_mpc83xx: fix clockrate calculation for low speed
+  * spi_mpc83xx: reject invalid transfer sizes
+  * pxa2xx_spi: chipselect bugfixes
+  * pxa2xx_spi: dma bugfixes
+  * mm: mark the correct zone as full when scanning zonelists
+  * Documentation/ABI: /sys/class/gpio
+  * MAINTAINERS: fix USB VIDEO CLASS mail list address
+  * ia64: fix panic during `modprobe -r xpc'
+  * atmel_lcdfb: disable LCD and DMA engines when suspending
+  * spi_s3c24xx: fix section warning
+  * rescan_partitions(): make device capacity errors non-fatal
+  * memstick: fix MSProHG 8-bit interface mode support
+  * Add Uwe Kleine-König to .mailmap
+  * xen: fix for xen guest with mem > 3.7G
+  * x86/paravirt: Remove duplicate paravirt_pagetable_setup_{start, done}()
+  * crypto: talitos - Avoid consecutive packets going out with same IV
+  * slub: fixed uninitialized counter in struct kmem_cache_node
+  * udp: Fix rcv socket locking
+  * IB/mlx4: Fix up fast register page list format
+  * [MIPS] VR41xx: unsigned irq cannot be negative
+  * x86: completely disable NOPL on 32 bits
+  * [S390] cio: Fix driver_data handling for ccwgroup devices.
+  * [S390] cio: fix orb initialization in cio_start_key
+  * sparc64: Fix OOPS in psycho_pcierr_intr_other().
+  * sparc64: Fix SMP bootup with CONFIG_STACK_DEBUG or ftrace.
+  * RDMA/nes: Fix client side QP destroy
+  * IPoIB: Fix deadlock on RTNL between bcast join comp and ipoib_stop()
+  * clockevents: make device shutdown robust
+  * powerpc: Fix interrupt values for DMA2 in MPC8610 HPCD device tree
+  * hpplus: fix build regression
+  * Fix PNP build failure, bugzilla #11276
+  * warn: Turn the netdev timeout WARN_ON() into a WARN()
+  * [XFS] Move memory allocations for log tracing out of the critical path
+  * [XFS] Fix regression introduced by remount fixup
+  * [XFS] Prevent direct I/O from mapping extents beyond eof
+  * [XFS] Fix barrier status change detection.
+  * [XFS] Prevent lockdep false positives when locking two inodes.
+  * [XFS] Fix use-after-free with buffers
+  * [XFS] Don't do I/O beyond eof when unreserving space
+  * powerpc: Holly board needs dtbImage target
+  * Fix compile failure with non modular builds
+  * [ARM] 5249/1: davinci: remove redundant check in davinci_psc_config()
+  * [ARM] omap: back out 'internal_clock' support
+  * sctp: set the skb->ip_summed correctly when sending over loopback.
+  * [ARM] 5255/1: Update jornada ssp to remove build errors/warnings
+  * sctp: do not enable peer features if we can't do them.
+  * sctp: Fix oops when INIT-ACK indicates that peer doesn't support AUTH
+  * bnx2: Promote vector field in bnx2_irq structure from u16 to unsigned
+    int
+  * forcedeth: call restore mac addr in nv_shutdown path
+  * e1000: prevent corruption of EEPROM/NVM
+  * e100: Use pci_pme_active to clear PME_Status and disable PME#
+  * md: Don't wait UNINTERRUPTIBLE for other resync to finish
+  * atstk1000: fix build breakage with BOARD_ATSTK100X_SW2_CUSTOM=y
+  * avr32: add .gitignore files
+  * avr32: add generic_find_next_le_bit bit function
+  * avr32: fix sys_sync_file_range() call convention
+  * avr32: nmi_enter() without nmi_exit()
+  * KVM: ia64: 'struct fdesc' build fix
+  * hwmon: (atxp1) Fix device detection logic
+  * hwmon: (it87) Fix fan tachometer reading in IT8712F rev 0x7 (I)
+  * hwmon: (ad7414) Make ad7414_update_device() static
+  * tmio_mmc: fix compilation with debug enabled
+  * atmel-mci: debugfs: enable clock before dumping regs
+  * atmel-mci: Fix memory leak in atmci_regs_show
+  * atmel-mci: Fix bogus debugfs file size
+  * atmel-mci: Set MMC_CAP_NEEDS_POLL if no detect_pin
+  * mmc_block: handle error from mmc_register_driver()
+  * mmc_test: initialize mmc_test_lock statically
+  * [MIPS] Fix 64-bit IP checksum code
+  * [MIPS] SMTC: Clear TIF_FPUBOUND on clone / fork.
+  * [MIPS] Fix potential latency problem due to non-atomic cpu_wait.
+  * [MIPS] vmlinux.lds.S: handle .text.*
+  * MAINTAINERS: Trivial whitespace cleanups
+  * MAINTAINERS: Various fixes
+  * Linux 2.6.27-rc7
+
+ --  Tim Gardner <tim.gardner@canonical.com>  Sun, 21 Sep 2008 21:49:28 -0600
+
+linux (2.6.27-3.4) intrepid; urgency=low
+
+  [ Colin Ian King ]
+
+  * SAUCE: fix kernel oops in VirtualBox during paravirt patching
+    - LP: #246067
+  * SAUCE: qc-usb: Enable Logitech QuickCam Messenger
+    - LP: #209901
+  * SAUCE: appleir: Enable driver for new MacBook Pro
+    - LP: #157919
+
+  [ Tim Gardner ]
+
+  * Enabled CONFIG_DEBUG_RODATA=y
+
+  [ Upstream Kernel Changes ]
+
+  * Revert "ALSA: hda - Added model selection for iMac 24""
+  * Revert "x86: fix HPET regression in 2.6.26 versus 2.6.25, check hpet
+    against BAR, v3"
+  * Revert "[ARM] use the new byteorder headers"
+  * Revert "mac80211: Use IWEVASSOCREQIE instead of IWEVCUSTOM"
+  * Revert "crypto: camellia - Use kernel-provided bitops, unaligned access
+    helpers"
+  * svcrdma: Fix race between svc_rdma_recvfrom thread and the dto_tasklet
+  * sched, cpuset: rework sched domains and CPU hotplug handling (v4)
+  * ACPI: Fix now signed module parameter.
+  * ACPI: Change package length error to warning
+  * ACPI: Fix now signed module parameter.
+  * ACPI: Fix typo in "Disable MWAIT via DMI on broken Compal board"
+  * acpi: add checking for NULL early param
+  * UBIFS: fix zero-length truncations
+  * Input: bcm5974 - add maintainer entry
+  * sh64: re-add the __strnlen_user() prototype
+  * sh: fix ptrace_64.c:user_disable_single_step()
+  * PNPACPI: ignore the producer/consumer bit for extended IRQ descriptors
+  * UBIFS: always read hashed-key nodes under TNC mutex
+  * UBIFS: allow for racing between GC and TNC
+  * [CIFS] Fix plaintext authentication
+  * sparc32: Implement smp_call_function_single().
+  * sh: crash kernel resource fix
+  * sh: fix kexec entry point for crash kernels
+  * sh: fix platform_resource_setup_memory() section mismatch
+  * sh: update Migo-R defconfig
+  * sh: update AP325RXA defconfig
+  * sh: fix semtimedop syscall
+  * cifs: fix O_APPEND on directio mounts
+  * [CIFS] update cifs change log
+  * [CIFS] Turn off Unicode during session establishment for plaintext
+    authentication
+  * ACPI: thinkpad-acpi: wan radio control is not experimental
+  * sparc: Fix resource flags for PCI children in OF device tree.
+  * remove blk_register_filter and blk_unregister_filter in gendisk
+  * ALSA: oxygen: fix distorted output on AK4396-based cards
+  * ipv6: When we droped a packet, we should return NET_RX_DROP instead of
+    0
+  * pkt_sched: Fix locking of qdisc_root with qdisc_root_sleeping_lock()
+  * net: Unbreak userspace usage of linux/mroute.h
+  * Don't trigger softlockup detector on network fs blocked tasks
+  * Resource handling: add 'insert_resource_expand_to_fit()' function
+  * sparc64: setup_valid_addr_bitmap_from_pavail() should be __init
+  * UBIFS: do not update min_idx_lebs in stafs
+  * UBIFS: push empty flash hack down
+  * UBIFS: remove incorrect index space check
+  * UBIFS: improve statfs reporting
+  * UBIFS: fix assertion
+  * UBIFS: add forgotten gc_idx_lebs component
+  * UBIFS: introduce LEB overhead
+  * UBIFS: improve statfs reporting even more
+  * UBIFS: fill f_fsid
+  * drm/radeon: downgrade debug message from info to debug.
+  * Remove invalidate_partition call from do_md_stop.
+  * Fix problem with waiting while holding rcu read lock in md/bitmap.c
+  * ALSA: hda: Distortion fix for dell_m6_core_init
+  * ALSA: ASoC: fix pxa2xx-i2s clk_get call
+  * block: restore original behavior of /proc/partition when there's no
+    partition
+  * debugobjects: fix lockdep warning
+  * avr32: Fix lockup after Java stack underflow in user mode
+  * avr32: pm_standby low-power ram bug fix
+  * nfsd: fix compound state allocation error handling
+  * sunrpc: fix possible overrun on read of /proc/sys/sunrpc/transports
+  * nfsd: fix buffer overrun decoding NFSv4 acl
+  * audit: Moved variable declaration to beginning of function
+  * Fix modules_install on RO nfs-exported trees.
+  * Remove '#include <stddef.h>' from mm/page_isolation.c
+  * dabusb_fpga_download(): fix a memory leak
+  * [MTD] mtdchar.c: Fix regression in MEMGETREGIONINFO ioctl()
+  * ALSA: hda - Fix ALC663 auto-probe
+  * ALSA: hda - Add mic-boost controls to ALC662/663 auto configuration
+  * Un-break printk strings in x86 PCI probing code
+  * kernel/resource.c: fix new kernel-doc warning
+  * softlockup: minor cleanup, don't check task->state twice
+  * fix typo in arch/parisc/hpux/fs.c
+  * m68k: atari_keyb_init operator precedence fix
+  * ACPI: Fix typo in "Disable MWAIT via DMI on broken Compal board"
+  * don't diff generated firmware files
+  * IDE: compile fix for sff_dma_ops
+  * IDE: palm_bk3710: fix compile warning for unused variable
+  * ide: fix hwif_to_node()
+  * palm_bk3710: improve IDE registration
+  * ide-disk: remove stale init_idedisk_capacity() documentation
+  * ide/Kconfig: mark ide-scsi as deprecated
+  * net/wireless/Kconfig: clarify the description for
+    CONFIG_WIRELESS_EXT_SYSFS
+  * iwlwifi: do not use GFP_DMA in iwl_tx_queue_init
+  * iwlwifi: workaround interrupt handling no some platforms
+  * iwlwifi: fix apm_stop (wrong bit polarity for FLAG_INIT_DONE)
+  * iwlwifi: fix 64bit platform firmware loading
+  * orinoco: Multicast to the specified addresses
+  * wireless/libertas/if_cs.c: fix memory leaks
+  * mac80211: Fix debugfs union misuse and pointer corruption
+  * rt2x00: Compiler warning unmasked by fix of BUILD_BUG_ON
+  * ath9k: Incorrect key used when group and pairwise ciphers are
+    different.
+  * ath9: Fix ath_rx_flush_tid() for IRQs disabled kernel warning message.
+  * net/xfrm: Use an IS_ERR test rather than a NULL test
+  * ipv: Re-enable IP when MTU > 68
+  * NTFS: update homepage
+  * mm: make setup_zone_migrate_reserve() aware of overlapping nodes
+  * VFS: fix dio write returning EIO when try_to_release_page fails
+  * acer-wmi: remove debugfs entries upon unloading
+  * mm/bootmem: silence section mismatch warning -
+    contig_page_data/bootmem_node_data
+  * MAINTAINERS: add a maintainer for the BCM5974 multitouch driver
+  * 8250: improve workaround for UARTs that don't re-assert THRE correctly
+  * mmc: at91_mci: don't use coherent dma buffers
+  * pid_ns: zap_pid_ns_processes: fix the ->child_reaper changing
+  * pid_ns: (BUG 11391) change ->child_reaper when init->group_leader exits
+  * cirrusfb: check_par fixes
+  * devcgroup: fix race against rmdir()
+  * mm: show quicklist usage in /proc/meminfo
+  * mm: size of quicklists shouldn't be proportional to the number of CPUs
+  * ipc: document the new auto_msgmni proc file
+  * hp-wmi: update to match current rfkill semantics
+  * hp-wmi: add proper hotkey support
+  * tdfxfb: fix SDRAM memory size detection
+  * tdfxfb: fix frame buffer name overrun
+  * rtc_time_to_tm: fix signed/unsigned arithmetic
+  * ibft: fix target info parsing in ibft module
+  * sysfs: document files in /sys/firmware/sgi_uv/
+  * rtc-cmos: wake again from S5
+  * pm_qos_requirement might sleep
+  * drivers/char/random.c: fix a race which can lead to a bogus BUG()
+  * ipsec: Fix deadlock in xfrm_state management.
+  * [x86] Fix TSC calibration issues
+  * tipc: Don't use structure names which easily globally conflict.
+  * sparc64: Fix IPI call locking.
+  * [ARM] omap: fix gpio.c build error
+  * sparc64: Prevent sparc64 from invoking irq handlers on offline CPUs
+  * powerpc: Fix uninitialised variable in VSX alignment code
+  * powerpc: Only make kernel text pages of linear mapping executable
+  * powerpc: Make sure _etext is after all kernel text
+  * powerpc: Work around gcc's -fno-omit-frame-pointer bug
+  * powerpc: Fix build error with 64K pages and !hugetlbfs
+  * powerpc: Fix for getting CPU number in power_save_ppc32_restore()
+  * UBIFS: amend f_fsid
+  * net/usb/pegasus: avoid hundreds of diagnostics
+  * ixgbe: initialize interrupt throttle rate
+  * pcnet-cs, axnet_cs: add new IDs, remove dup ID with less info
+  * netxen: Remove workaround for chipset quirk
+  * Split up PIT part of TSC calibration from native_calibrate_tsc
+  * iwlwifi: W/A for the TSF correction in IBSS
+  * iwlwifi: fix hidden ssid discovery in passive channels
+  * iwlwifi: remove false rxon if rx chain changes
+  * iwlwifi: fix station mimo power save values
+  * iwlwifi: fix rx_chain computation
+  * iwlwifi: fix Tx cmd memory allocation failure handling
+  * iwlwifi: call apm stop on exit
+  * iwlwifi: fix STATUS_EXIT_PENDING is not set on pci_remove
+  * ath9k: Fix TX status reporting
+  * ath9k: Fix TX control flag use for no ACK and RTS/CTS
+  * V4L/DVB (8555): au8522: add mechanism to configure IF frequency for vsb
+    and qam
+  * V4L/DVB (8556): au0828: add support for Hauppauge Woodbury
+  * V4L/DVB (8598): au8522: clean up function au8522_set_if
+  * V4L/DVB (8599): au8522: remove if frequency settings from vsb/qam
+    modulation tables
+  * V4L/DVB (8600): au0828: explicitly set 6 MHz IF frequency in
+    hauppauge_hvr950q_config
+  * V4L/DVB (8629): v4l2-ioctl: do not try to handle private V4L1 ioctls
+  * V4L/DVB (8633): ivtv: update ivtv version number
+  * V4L/DVB (8648): ivtv: improve CC support
+  * V4L/DVB (8660): gspca: Simplify the scan of URB packets in pac7311.
+  * V4L/DVB (8661): gspca: Bug in the previous changeset about pac7311.
+  * V4L/DVB (8663): gspca: Webcam 0c45:6128 added in sonixj.
+  * V4L/DVB (8664): gspca: The bridge/sensor of the webcam 093a:2621 is a
+    PAC 7302.
+  * V4L/DVB (8665): gspca: Fix the 640x480 resolution of the webcam
+    093a:2621.
+  * V4L/DVB (8666): gspca: Bad scanning of frames in pac7311.
+  * V4L/DVB (8667): gspca: Bad probe of Z-Star/Vimicro webcams with pas106
+    sensor.
+  * V4L/DVB (8668): gspca: Conflict GSPCA / ET61X251 for the webcam
+    102c:6251.
+  * V4L/DVB (8669): gspca: Add white balance control for spca561 rev 012A.
+  * V4L/DVB (8671): gspca: Remove the unused field 'dev_name' of the device
+    structure.
+  * V4L/DVB (8672): gspca: Big rewrite of spca561.
+  * V4L/DVB (8673): gspca: Bad frame scanning again and bad init in
+    pac7311.
+  * V4L/DVB (8674): gspca: Webcam 0c45:612e added in sonixj.
+  * V4L/DVB (8675): gspca: Pixmap PJPG (Pixart 73xx JPEG) added, generated
+    by pac7311.
+  * V4L/DVB (8678): Remove the dead CONFIG_RADIO_MIROPCM20{,_RDS} code
+  * V4L/DVB (8681): v4l2-ioctl.c: fix warning
+  * V4L/DVB (8682): V4L: fix return value of register video func
+  * V4L/DVB (8701): cx18: Add missing lock for when the irq handler
+    manipulates the queues
+  * V4L/DVB (8703): gspca: Do controls work for spca561 revision 12a.
+  * V4L/DVB (8705): gspca: Adjust some control limits in spca561.
+  * V4L/DVB (8706): Make contrast and brightness work for pac7302.
+  * V4L/DVB (8707): gspca: Colors, hflip and vflip controls added for
+    pac7302.
+  * V4L/DVB (8709): gspca: Fix initialization and controls of sn9x110 -
+    ov7630.
+  * V4L/DVB (8710): gspca: Bad color control in sonixj.
+  * V4L/DVB (8711): gspca: Bad controls and quantization table of pac7311.
+  * V4L/DVB (8712): gspca: Bad start of sonixj webcams since changeset
+    a8779025e7e8.
+  * V4L/DVB (8713): gspca: Bad color control again in sonixj.
+  * V4L/DVB (8714): gspca: Bad start of sn9c110 and sensor om6802.
+  * V4L/DVB (8715): gspca: Change the name of some webcam in the gspca doc.
+  * V4L/DVB (8716): gspca: Bad start of sn9c110 and sensor ov7630.
+  * V4L/DVB (8717): gspca: Frame buffer too small for small resolutions
+    (sonixj and t613).
+  * V4L/DVB (8718): gspca: suspend/resume added.
+  * V4L/DVB (8719): gspca: Have VIDIOC_QUERYCTRL more compliant to the
+    spec.
+  * V4L/DVB (8720): gspca: V4L2_CAP_SENSOR_UPSIDE_DOWN added as a cap for
+    some webcams.
+  * V4L/DVB (8722): sms1xxx: fix typo in license header
+  * V4L/DVB (8726): link tuner before saa7134
+  * V4L/DVB (8727): V4L1: make PMS not autoprobe when builtin.
+  * V4L/DVB (8728): 1-make-pms-not-autoprobe-when-builtin update
+  * V4L/DVB (8749): Fix error code, when camera is not turned on by sonypi
+  * V4L/DVB (8750): V4L: check inval in video_register_device_index()
+  * V4L/DVB (8751): vivi: Fix some issues at vivi register routine
+  * V4L/DVB (8757): v4l-dvb: fix a bunch of sparse warnings
+  * V4L/DVB (8769): cx18: Simplify queue flush logic to prevent oops in
+    cx18_flush_queues()
+  * V4L/DVB (8778): radio: fix incorrect video_register_device result check
+  * V4L/DVB (8779): v4l: fix more incorrect video_register_device result
+    checks
+  * V4L/DVB (8790): saa7115: call i2c_set_clientdata only when state !=
+    NULL
+  * V4L/DVB (8803): s5h1409: Enable QAM_AUTO mode
+  * V4L/DVB (8804): s5h1411: Enable QAM_AUTO mode
+  * V4L/DVB (8805): Steven Toth email address change
+  * V4L/DVB (8809): gspca: Revert commit
+    9a9335776548d01525141c6e8f0c12e86bbde982
+  * V4L/DVB (8810): gspca: Compile error when CONFIG_PM not defined.
+  * V4L/DVB (8812): gspca: Do pac73xx webcams work.
+  * V4L/DVB (8813): gspca: Adjust SOF detection for pac73xx.
+  * V4L/DVB (8814): gspca: Set DISABLED the disabled controls at query
+    control time.
+  * V4L/DVB (8815): gspca: Fix problems with disabled controls.
+  * V4L/DVB (8816): gspca: Set disabled ctrls and fix a register pb with
+    ovxxxx in sonixb.
+  * V4L/DVB (8817): gspca: LED and proble changes in sonixb.
+  * V4L/DVB (8818): gspca: Reinitialize the device on resume.
+  * V4L/DVB (8819): gspca: Initialize the ov519 at open time and source
+    cleanup.
+  * V4L/DVB (8820): gspca: Change initialization and gamma of zc3xx -
+    pas106.
+  * V4L/DVB (8822): gspca: Change some subdriver functions for
+    suspend/resume.
+  * V4L/DVB (8823): gspca: H and V flips work for ov7670 only in ov519.
+  * V4L/DVB (8824): gspca: Too much code removed in the suspend/resume
+    changeset.
+  * V4L/DVB (8825): gspca: More controls for pac73xx and new webcam
+    093a:2624.
+  * V4L/DVB (8826): gspca: Webcam Labtec 2200 (093a:2626) added in pac7311.
+  * V4L/DVB (8827): gspca: Stop pac7302 autogain oscillation.
+  * V4L/DVB (8828): gspca: Set the clock at the end of initialization in
+    sonixj.
+  * V4L/DVB (8829): gspca: Have a clean kmalloc-ated buffer for USB
+    exchanges.
+  * V4L/DVB (8830): gspca: Move some probe code to the new init function.
+  * V4L/DVB (8831): gspca: Resolve webcam conflicts between some drivers.
+  * V4L/DVB (8832): gspca: Bad pixelformat of vc0321 webcams.
+  * V4L/DVB (8833): gspca: Cleanup the sonixb code.
+  * V4L/DVB (8834): gspca: Have a bigger buffer for sn9c10x compressed
+    images.
+  * V4L/DVB (8835): gspca: Same pixfmt as the sn9c102 driver and raw Bayer
+    added in sonixb.
+  * V4L/DVB (8837): dvb: fix I2C adapters name size
+  * V4L/DVB (8839): dib0700: add comment to identify 35th USB id pair
+  * V4L/DVB (8840): dib0700: add basic support for Hauppauge Nova-TD-500
+    (84xxx)
+  * V4L/DVB (8842): vivi_release(): fix use-after-free
+  * V4L/DVB (8843): tda10048_firmware_upload(): fix a memory leak
+  * V4L/DVB (8844): dabusb_fpga_download(): fix a memory leak
+  * bnx2x: Accessing un-mapped page
+  * SELinux: memory leak in security_context_to_sid_core
+  * x86: add io delay quirk for Presario F700
+  * mmap: fix petty bug in anonymous shared mmap offset handling
+  * x86: Change warning message in TSC calibration.
+  * PCI: fix pbus_size_mem() resource alignment for CardBus controllers
+  * [ARM] omap: fix build error in ohci-omap.c
+  * [ARM] remove unused #include <version.h>
+  * ACPI: Make Len Brown the ACPI maintainer again
+  * fujitsu-laptop: fix regression for P8010 in 2.6.27-rc
+  * ACPI: Avoid bogus timeout about SMbus check
+  * acer-wmi: remove debugfs entries upon unloading
+  * forgotten refcount on sysctl root table
+  * V4L/DVB (8868): gspca: Support for vga modes with sif sensors in
+    sonixb.
+  * V4L/DVB (8869): gspca: Move the Sonix webcams with TAS5110C1B from
+    sn9c102 to gspca.
+  * V4L/DVB (8870): gspca: Fix dark room problem with sonixb.
+  * V4L/DVB (8872): gspca: Bad image format and offset with rev072a of
+    spca561.
+  * V4L/DVB (8873): gspca: Bad image offset with rev012a of spca561 and
+    adjust exposure.
+  * V4L/DVB (8874): gspca: Adjust hstart for sn9c103/ov7630 and update
+    usb-id's.
+  * [ARM] omap: fix virtual vs physical address space confusions
+  * V4L/DVB (8876): budget: udelay changed to mdelay
+  * V4L/DVB (8877): b2c2 and bt8xx: udelay to mdelay
+  * V4L/DVB (8880): PATCH: Fix parents on some webcam drivers
+  * V4L/DVB (8881): gspca: After 'while (retry--) {...}', retry will be -1
+    but not 0.
+  * powerpc/spufs: Fix multiple get_spu_context()
+  * powerpc/spufs: Fix race for a free SPU
+  * Input: bcm5974 - small formatting cleanup
+  * Input: bcm5974 - improve finger tracking and counting
+  * Input: bcm5974 - add BTN_TOUCH event for mousedev benefit
+  * Input: i8042 - make Lenovo 3000 N100 blacklist entry more specific
+  * sh: resume_kernel fix for kernel oops built with CONFIG_BKL_PREEMPT=y.
+  * sh64: resume_kernel fix for kernel oops built with
+    CONFIG_BKL_PREEMPT=y.
+  * i2c: fix i2c-sh_mobile timing issues
+  * clockevents: prevent clockevent event_handler ending up handler_noop
+  * clockevents: prevent endless loop in periodic broadcast handler
+  * clockevents: enforce reprogram in oneshot setup
+  * clockevents: prevent multiple init/shutdown
+  * clockevents: prevent endless loop lockup
+  * HPET: make minimum reprogramming delta useful
+  * [MTD] [NAND] tmio_nand: fix base address programming
+  * Fix conditional export of kvh.h and a.out.h to userspace.
+  * async_tx: fix the bug in async_tx_run_dependencies
+  * sched_clock: fix NOHZ interaction
+  * sched: fix process time monotonicity
+  * UBIFS: fix division by zero
+  * UBIFS: make minimum fanout 3
+  * [MIPS] Fix data bus error recovery
+  * [MIPS] Fix WARNING: at kernel/smp.c:290
+  * [MIPS] TXx9: Fix txx9_pcode initialization
+  * [MIPS] TX39xx: Add missing local_flush_icache_range initialization
+  * [MIPS] Probe initrd header only if explicitly specified
+  * res_counter: fix off-by-one bug in setting limit
+  * forcedeth: fix kexec regression
+  * atmel_lcdfb: fix oops in rmmod when framebuffer fails to register
+  * tracehook: comment pasto fixes
+  * drivers/mmc/card/block.c: fix refcount leak in mmc_block_open()
+  * x86: boot: stub out unimplemented CPU feature words
+  * x86: add NOPL as a synthetic CPU feature bit
+  * x86: use X86_FEATURE_NOPL in alternatives
+  * clockevents: broadcast fixup possible waiters
+  * x86: HPET fix moronic 32/64bit thinko
+  * x86: HPET: read back compare register before reading counter
+  * Fix CONFIG_AC97_BUS dependency
+  * [ARM] 5241/1: provide ioremap_wc()
+  * ntp: fix calculation of the next jiffie to trigger RTC sync
+  * clocksource, acpi_pm.c: use proper read function also in errata mode
+  * clocksource, acpi_pm.c: check for monotonicity
+  * x86: delay early cpu initialization until cpuid is done
+  * x86: move mtrr cpu cap setting early in early_init_xxxx
+  * sched: arch_reinit_sched_domains() must destroy domains to force
+    rebuild
+  * x86, xen: Use native_pte_flags instead of native_pte_val for .pte_flags
+  * x86: pda_init(): fix memory leak when using CPU hotplug
+  * x86: cpu_init(): fix memory leak when using CPU hotplug
+  * powerpc/spufs: Fix possible scheduling of a context to multiple SPEs
+  * netfilter: nf_conntrack_sip: de-static helper pointers
+  * netfilter: nf_conntrack_gre: more locking around keymap list
+  * netfilter: nf_conntrack_gre: nf_ct_gre_keymap_flush() fixlet
+  * netfilter: nf_conntrack_irc: make sure string is terminated before
+    calling simple_strtoul
+  * pkt_sched: Fix qdisc state in net_tx_action()
+  * powerpc: Fix rare boot build breakage
+  * ahci, pata_marvell: play nicely together
+  * sata_mv: add RocketRaid 1720 PCI ID to driver
+  * ahci: disable PMP for marvell ahcis
+  * sata_nv: disable hardreset for generic
+  * libata-sff: kill spurious WARN_ON() in ata_hsm_move()
+  * pata_sil680: remove duplicate pcim_enable_device
+  * ahci: RAID mode SATA patch for Intel Ibex Peak DeviceIDs
+  * [MIPS] IP22: Fix detection of second HPC3 on Challenge S
+  * xen: fix 2.6.27-rc5 xen balloon driver warnings
+  * x86: disable static NOPLs on 32 bits
+  * netns : fix kernel panic in timewait socket destruction
+  * bridge: don't allow setting hello time to zero
+  * NFS: Restore missing hunk in NFS mount option parser
+  * usb: fix null deferences in low level usb serial
+  * Fix format of MAINTAINERS
+  * sparc64: Disable timer interrupts in fixup_irqs().
+  * [Bluetooth] Fix reference counting during ACL config stage
+  * [Bluetooth] Enforce correct authentication requirements
+  * [Bluetooth] Reject L2CAP connections on an insecure ACL link
+  * [S390] CVE-2008-1514: prevent ptrace padding area read/write in 31-bit
+    mode
+  * [S390] cio: Correct cleanup on error.
+  * [S390] cio: handle ssch() return codes correctly.
+  * [S390] cio: allow offline processing for disconnected devices
+  * ipsec: Restore larval states and socket policies in dump
+  * update Documentation/filesystems/Locking for 2.6.27 changes
+  * MAINTAINERS: add Atheros maintainer for atlx
+  * lib: Correct printk %pF to work on all architectures
+  * x86: fix memmap=exactmap boot argument
+  * clockevents: remove WARN_ON which was used to gather information
+  * ipv6: Fix OOPS in ip6_dst_lookup_tail().
+  * Linux 2.6.27-rc6
+
+ -- Ben Collins <ben.collins@canonical.com>  Tue, 02 Sep 2008 12:45:56 -0400
+
+linux (2.6.27-2.3) intrepid; urgency=low
+
+  [ Ben Collins ]
+
+  * build/retag: Make script save .orig of tags for later use
+  * ubuntu/lirc: Fix device_create call
+  * build/firmware: Put in-kernel firmware into version specific subdir
+    - LP: #262115
+  * Rebase on linux-2.6 git.
+  * ABI bump
+
+  [ Herton Ronaldo Krzesinski ]
+
+  * SAUCE: (no-up) Apparmor warning fixes
+
+  [ John Johansen ]
+
+  * SAUCE: (no-up) Proper AppArmor ptrace updates for newer lsm API
+
+  [ Mackenzie Morgan ]
+
+  * SAUCE: Add quirk for ASUS Z37E to make sound audible after resume
+    - LP: #25896
+
+ -- Ben Collins <ben.collins@canonical.com>  Wed, 27 Aug 2008 14:03:05 -0400
+
+linux (2.6.27-1.2) intrepid; urgency=low
+
+  [ Amit Kucheria ]
+
+  * SAUCE: make fc transport removal of target configurable
+  * SAUCE: pm: Config option to disable handling of console during
+    suspend/resume
+
+  [ Ben Collins ]
+
+  * SAUCE: Lower warning level of some PCI messages
+  * SAUCE: input/mouse/alps: Do not call psmouse_reset() for alps
+  * SAUCE: tulip: Let dmfe handle davicom on non-sparc
+  * SAUCE: tulip: Define ULI PCI ID's
+  * SAUCE: (no-up) version: Implement version_signature proc file.
+  * SAUCE: (no-up) connector.h: Add idx/val for drbd
+  * SAUCE: (no-up) swap: Add notify_swap_entry_free callback for compcache
+  * SAUCE: drivers: Remove some duplicate device entries in various modules
+  * SAUCE: (no-up) [AppArmor] merge with upstream subversion r1291
+  * SAUCE: apparmor: Update for changes to ptrace lsm hooks
+  * SAUCE: (no-up) Enable ubuntu extra subdirectory
+  * SAUCE: applesmc: Add MacBookAir
+  * SAUCE: (no-up) ACPI: initramfs DSDT override support
+  * ubuntu: Add drbd module
+  * ubuntu: Add iscsitarget module
+  * ubuntu: Add BOM for iscsitarget
+  * ubuntu: Add squashfs driver
+  * SAUCE: (no-up) Check for squashfs superblock in initramfs mounting.
+  * ubuntu: Add aufs module
+  * ubuntu: Added atl2 driver
+  * ubuntu: Added et131x driver
+  * ubuntu: Add dm-raid4-5 driver
+  * ubuntu: Add ndiswrapper driver
+  * ubuntu: Added ram backed compressed swap module (compcache)
+  * ubuntu: Add misc drivers from hardy lum
+  * ubuntu: Add heci driver 3.2.0.24
+  * ubuntu: Add ov511 and bt-sco drivers
+  * ubuntu: Add acx, prism2_usb wireless drivers
+  * ubuntu: Add at76 driver to build
+  * ubuntu: Add fsam7400 sw kill switch driver
+  * ubuntu: Added qc-usb driver
+  * ubuntu: e1000e: Upgraded module to 0.4.1.7
+  * ubuntu: Added rfkill drivers
+  * ubuntu: VIA - Add VIA DRM Chrome9 3D engine
+  * ubuntu: unionfs: Added v1.4 module from hardy
+  * ubuntu: Add LIRC driver
+  * ubuntu: Add GFS driver
+  * ubuntu: New tlsup driver for toshiba laptops
+  * Update config files
+  * build/d-i: Remove obsolete dm modules
+
+  [ Chuck Short ]
+
+  * SAUCE: ata: blacklist FUJITSU MHW2160BH PL
+
+  [ Colin Ian King ]
+
+  * ubuntu: Add dm-loop
+  * SAUCE: Enable speedstep for sonoma processors.
+
+  [ Dennis Noordsij ]
+
+  * SAUCE: Work around ACPI corruption upon suspend on some Dell machines.
+
+  [ Fabio M. Di Nitto ]
+
+  * SAUCE: Export gfs2 symbols required for gfs1 kernel module
+
+  [ Matthew Garrett ]
+
+  * SAUCE: hostap: send events on data interface as well as master
+    interface
+
+  [ Michael Frey (Senior Manager, MID ]
+
+  * SAUCE: Send HCI_RESET for Broadcomm 2046
+
+  [ Phillip Lougher ]
+
+  * SAUCE: r8169: disable TSO by default for RTL8111/8168B chipsets.
+
+  [ Stefan Bader ]
+
+  * SAUCE: (no-up) Export dm_disk function of device-mapper
+  * SAUCE: Restore VT fonts on switch
+  * SAUCE: mmc: Increase power_up deleay to fix TI readers
+
+  [ Tim Gardner ]
+
+  * SAUCE: Add extra headers to linux-libc-dev
+  * SAUCE: Catch nonsense keycodes and silently ignore
+  * SAUCE: Added support for HDAPS on various ThinkPads from Lenovo and IBM
+  * SAUCE: Guest OS does not recognize a lun with non zero target id on
+    Vmware ESX Server
+  * SAUCE: (no-up) Take care of orinoco_cs overlap with hostap_cs
+  * ubuntu: Add GNBD driver
+
+ -- Ben Collins <ben.collins@canonical.com>  Sat, 23 Aug 2008 15:48:35 -0400
+
+linux (2.6.27-0.0) intrepid; urgency=low
+
+  * Not uploaded, placeholder for new release
+
+ -- Ben Collins <ben.collins@canonical.com>  Sat, 23 Aug 2008 15:48:35 -0400
+
+linux (2.6.26-5.17) intrepid; urgency=low
+
+  [ Ben Collins ]
+
+  * build/abi: Add tosh_smm symbol to blacklist
+
+ -- Ben Collins <ben.collins@canonical.com>  Fri, 15 Aug 2008 09:29:34 -0400
+
+linux (2.6.26-5.16) intrepid; urgency=low
+
+  [ Ben Collins ]
+
+  * Revert "SAUCE: toshiba_acpi: Rewrote most of the proc entry bits."
+  * Revert "SAUCE: Update toshiba_acpi.c to version 0.19a"
+  * build/config: Disable in-kernel toshiba driver(s)
+  * ubuntu/tlsup: New driver for toshiba laptops
+  * build/config: Enable TLSUP driver
+  * SAUCE: e1000e: Fix E1000E_ENABLED logic to check for our E1000E_NEW
+    driver as well
+  * ubuntu/e1000e: Remove E1000E_ENABLED option in local config
+  * build/config: Update configs to have E1000E_ENABLED set
+  * ubuntu/prism2: Remove duplicate device
+
+  [ Fabio M. Di Nitto ]
+
+  * SAUCE: Export gfs2 symbols required for gfs1 kernel module
+
+  [ Stefan Bader ]
+
+  * SAUCE: x86: HPET rework for SB700
+    - LP: #255910
+
+  [ Tim Gardner ]
+
+  * Add GNBD driver
+  * Enable GNBD driver
+  * SAUCE: Add GFS driver
+  * SAUCE: Enable gfs driver configs
+  * b43: Linksys WMP54G (BCM4306/3) card in a PCI format has an SPROM
+    coding
+
+  [ Upstream Kernel Changes ]
+
+  * KVM: x86 emulator: emulate clflush
+  * USB: quirk PLL power down mode
+
+ -- Ben Collins <ben.collins@canonical.com>  Mon, 11 Aug 2008 13:19:28 -0400
+
+linux (2.6.26-5.15) intrepid; urgency=low
+
+  [ Ben Collins ]
+
+  * Revert "SAUCE: Add blacklist support to fix Belkin bluetooth dongle."
+    - Superceded by upstream changes.
+  * build/config: New option enabled for uvcvideo
+  * build/control: Add Vcs-Git meta data to control file
+  * SAUCE: toshiba_acpi: Rewrote most of the new code
+  * abi/perm-blacklist: Add emu10k1 driver to blacklist
+
+  [ Upstream Kernel Changes ]
+
+  * pxamci: trivial fix of DMA alignment register bit clearing
+  * udplite: Protection against coverage value wrap-around
+  * ipv6: use timer pending
+  * ipv6: __KERNEL__ ifdef struct ipv6_devconf
+  * hdlcdrv: Fix CRC calculation.
+  * quota: fix possible infinite loop in quota code
+  * isofs: fix minor filesystem corruption
+  * KVM: VMX: Fix a wrong usage of vmcs_config
+  * KVM: SVM: fix suspend/resume support
+  * KVM: mmu_shrink: kvm_mmu_zap_page requires slots_lock to be held
+  * KVM: VMX: Add ept_sync_context in flush_tlb
+  * KVM: x86 emulator: Fix HLT instruction
+  * KVM: MMU: nuke shadowed pgtable pages and ptes on memslot destruction
+  * KVM: MMU: Fix potential race setting upper shadow ptes on nonpae hosts
+  * Patch Upstream: x86 ptrace: fix PTRACE_GETFPXREGS error
+  * rcu: fix rcu_try_flip_waitack_needed() to prevent grace-period stall
+  * Fix typos from signal_32/64.h merge
+  * x86 reboot quirks: add Dell Precision WorkStation T5400
+  * USB: fix usb serial pm counter decrement for disconnected interfaces
+  * x86, suspend, acpi: enter Big Real Mode
+  * markers: fix duplicate modpost entry
+  * Fix build on COMPAT platforms when CONFIG_EPOLL is disabled
+  * proc: fix /proc/*/pagemap some more
+  * cpusets: fix wrong domain attr updates
+  * x86: fix crash due to missing debugctlmsr on AMD K6-3
+  * ide-cd: fix oops when using growisofs
+  * rtc-at91rm9200: avoid spurious irqs
+  * vmlinux.lds: move __attribute__((__cold__)) functions back into final
+    .text section
+  * ARM: fix fls() for 64-bit arguments
+  * tcp: Clear probes_out more aggressively in tcp_ack().
+  * sparc64: Fix lockdep issues in LDC protocol layer.
+  * sparc64: Fix cpufreq notifier registry.
+  * sparc64: Do not define BIO_VMERGE_BOUNDARY.
+  * iop-adma: fix platform driver hotplug/coldplug
+  * myri10ge: do not forget to setup the single slice pointers
+  * myri10ge: do not use mgp->max_intr_slots before loading the firmware
+  * ALSA: trident - pause s/pdif output
+  * V4L: cx18: Upgrade to newer firmware & update documentation
+  * DVB: dib0700: add support for Hauppauge Nova-TD Stick 52009
+  * V4L: uvcvideo: Fix a buffer overflow in format descriptor parsing
+  * V4L: uvcvideo: Use GFP_NOIO when allocating memory during resume
+  * V4L: uvcvideo: Don't free URB buffers on suspend
+  * V4L: uvcvideo: Make input device support optional
+  * V4L: uvcvideo: Add support for Medion Akoya Mini E1210 integrated
+    webcam
+  * V4L: saa7134: Copy tuner data earlier to avoid overwriting manual tuner
+    type
+  * V4L: cx23885: Bugfix for concurrent use of /dev/video0 and /dev/video1
+  * DVB: cx23885: Ensure PAD_CTRL is always reset to a sensible default
+  * DVB: cx23885: DVB Transport cards using DVB port VIDB/TS1 did not
+    stream
+  * DVB: cx23885: Reallocated the sram to avoid concurrent VIDB/C issues
+  * DVB: cx23885: SRAM changes for the 885 and 887 silicon parts
+  * x86: fix kernel_physical_mapping_init() for large x86 systems
+  * eCryptfs: use page_alloc not kmalloc to get a page of memory
+  * UML - Fix boot crash
+  * ixgbe: remove device ID for unsupported device
+  * mpc52xx_psc_spi: fix block transfer
+  * tmpfs: fix kernel BUG in shmem_delete_inode
+  * markers: fix markers read barrier for multiple probes
+  * VFS: increase pseudo-filesystem block size to PAGE_SIZE
+  * cpufreq acpi: only call _PPC after cpufreq ACPI init funcs got called
+    already
+  * b43legacy: Release mutex in error handling code
+  * ath5k: don't enable MSI, we cannot handle it yet
+  * Fix off-by-one error in iov_iter_advance()
+  * Linux 2.6.26.1
+  * ftrace: remove unneeded documentation
+  * romfs_readpage: don't report errors for pages beyond i_size
+  * netfilter: nf_nat_sip: c= is optional for session
+  * SCSI: bsg: fix bsg_mutex hang with device removal
+  * x86: idle process - add checking for NULL early param
+  * x86: io delay - add checking for NULL early param
+  * Close race in md_probe
+  * Kprobe smoke test lockdep warning
+  * netfilter: xt_time: fix time's time_mt()'s use of do_div()
+  * linear: correct disk numbering error check
+  * SCSI: ch: fix ch_remove oops
+  * NFS: Ensure we zap only the access and acl caches when setting new acls
+  * jbd: fix race between free buffer and commit transaction
+  * Input: i8042 - add Intel D845PESV to nopnp list
+  * Input: i8042 - add Gericom Bellagio to nomux blacklist
+  * Input: i8042 - add Acer Aspire 1360 to nomux blacklist
+  * Bluetooth: Signal user-space for HIDP and BNEP socket errors
+  * Add compat handler for PTRACE_GETSIGINFO
+  * ALSA: hda - Fix wrong volumes in AD1988 auto-probe mode
+  * ALSA: hda - Fix DMA position inaccuracy
+  * ALSA: hda - Add missing Thinkpad Z60m support
+  * ALSA: emu10k1 - Fix inverted Analog/Digital mixer switch on Audigy2
+  * vfs: fix lookup on deleted directory
+  * Ath5k: fix memory corruption
+  * Ath5k: kill tasklets on shutdown
+  * sound: ensure device number is valid in snd_seq_oss_synth_make_info
+  * Linux 2.6.26.2
+
+ -- Ben Collins <ben.collins@canonical.com>  Sun, 03 Aug 2008 13:25:02 -0400
+
+linux (2.6.26-5.14) intrepid; urgency=low
+
+  [ Ben Collins ]
+
+  * SAUCE: applesmc: Add MacBookAir
+  * build: Do not build ddeb unless we are on the buildd
+  * build: control: Consistency in arch fields.
+  * SAUCE: Update toshiba_acpi.c to version 0.19a
+    - LP: #77026
+  * build: Added perm blacklist support and per-module support to abi-check
+    - Blacklist p80211 module from abi checks
+  * ubuntu/lirc: Get rid of drivers symlink and use real include stuff
+
+
+  [ Colin Ian King ]
+
+  * SAUCE: acerhk module - add support for Amilo A1650g keyboard
+    - LP: #84159
+  * SAUCE: rt2x00: Fix OOPS on failed creation of rt2x00lib workqueue
+    - LP: #249242
+
+  [ Mario Limonciello ]
+
+  * Add LIRC back in
+
+  [ Tim Gardner ]
+
+  * Makefile race condition can lead to ndiswrapper build failure
+    - LP: #241547
+  * update linux-wlan-ng (prism2_usb) to upstream version 1861
+    - LP: #245026
+
+  [ Upstream Kernel Changes ]
+
+  * Fix typos from signal_32/64.h merge
+
+ -- Ben Collins <ben.collins@canonical.com>  Fri, 01 Aug 2008 00:05:01 -0400
+
+linux (2.6.26-5.13) intrepid; urgency=low
+
+  [ Ben Collins ]
+
+  * build: Make makedumpfile an amd64/i386 only build-dep
+  * ubuntu/acerhk: Fixup assembly to compile with newer binutils
+
+ -- Ben Collins <ben.collins@canonical.com>  Sat, 26 Jul 2008 16:41:50 -0400
+
+linux (2.6.26-4.12) intrepid; urgency=low
+
+  [ Ben Collins ]
+
+  * e1000e: Upgraded module to 0.4.1.7 upstream. Placed in ubuntu/,
+    in-kernel driver disabled
+  * config: Disable e1000e in-kernel, and enable newer driver in ubuntu/
+  * rfkill: Update to 1.3 drivers, and move to common location
+  * ubuntu: Actually link kconfig/kbuild into rfkill subdir
+  * config: Enable loading dsdt from initramfs
+    - LP: #246222
+  * ubuntu: [compcache] Update to fix crashes in improper BUG()
+  * build: Create a retag scripts to recover tags from rebases
+  * build: Updates for dbg pkg
+  * build: Make sure no empty lines show up in debian/files
+  * ubuntu: atl1e: Add new driver from 2.6.27-pre-rc1
+    - LP: #243894
+  * sys_getcwd: Fix some brokeness introduced by AppArmor __d_path
+    changes
+    - LP: #251223
+  * ubuntu: unionfs: Added v1.4 module from hardy
+  * build: Add sub-flavour infrastructure, and virtual subflav
+
+  [ Eric Piel ]
+
+  * ACPI: Allow custom DSDT tables to be loaded from initramfs
+
+  [ Kees Cook ]
+
+  * AppArmor: Smack VFS patches
+
+  [ Mario Limonciello ]
+
+  * Work around ACPI corruption upon suspend on some Dell machines.
+    - LP: #183033
+
+  [ Tim Gardner ]
+
+  * Export usbhid_modify_dquirk for LBM module bcm5974
+    - LP: #250838
+  * VIA - Add VIA DRM Chrome9 3D engine
+    - LP: #251862
+  * Define TRUE/FALSE for VIA DRM driver.
+
+ -- Ben Collins <ben.collins@canonical.com>  Tue, 15 Jul 2008 12:51:39 -0400
+
+linux (2.6.26-4.11) intrepid; urgency=low
+
+  [ Ben Collins ]
+
+  * config: Enable bcm5974 driver in all configs
+
+  [ 2.6.26-4.10 ]
+
+  [ Amit Kucheria ]
+
+  * Fix typo in GSPCA Makefile and make it compile
+
+  [ Ben Collins ]
+
+  * ubuntu: Remove UVC driver in favor of in-kernel one (-rc9)
+  * config: Updates for -rc9
+  * ubuntu: Add acx, prism2_usb wireless drivers
+  * config: Enable prism2_usb and acx drivers.
+  * ubuntu: Add at76 driver to build
+  * config: Enable at76_usb driver.
+  * iscsitarget: Fix prototype for bi_end_io callback.
+  * acx: Fix section type mismatch warnings
+  * fsam7400: Add sw kill switch driver
+  * config: Enable fsam7400 driver
+  * qc-usb: Added new driver
+  * config: Enable qc-usb driver
+  * drbd: Remove built-in connector usage
+  * drbd: Do not define idx/val for connector here
+  * connector.h: Add idx/val for drbd
+  * bcm5974: Added new driver
+
+  [ Kees Cook ]
+
+  * SAUCE: [AppArmor] merge with upstream subversion r1291
+  * SAUCE: [AppArmor] fix typo in selinux_inode_link
+  * SAUCE: [AppArmor] aufs patches
+
+  [ Michael Frey (Senior Manager, MID ]
+
+  * SAUCE: Send HCI_RESET for Broadcomm 2046
+    - LP: #241749
+
+  [ Tim Gardner ]
+
+  * SAUCE: Medion Akoya Mini E1210
+
+  [ Upstream Kernel Changes ]
+
+  * Revert "BAST: Remove old IDE driver"
+  * ARM: OMAP: DMA: Don't mark channel active in omap_enable_channel_irq
+  * ARM: OMAP: Correcting the gpmc prefetch control register address
+  * debugobjects: fix lockdep warning
+  * [ARM] 5115/1: pxafb: fix ifdef for command line option handling
+  * [ARM] 5116/1: pxafb: cleanup and fix order of failure handling
+  * [ARM] 5109/1: Mark rtc sa1100 driver as wakeup source before
+    registering it
+  * [ARM] Export dma_sync_sg_for_device()
+  * fix cgroup-inflicted breakage in block_dev.c
+  * [patch for 2.6.26 2/4] vfs: utimensat(): be consistent with utime() for
+    immutable and append-only files
+  * [patch for 2.6.26 1/4] vfs: utimensat(): ignore tv_sec if tv_nsec ==
+    UTIME_OMIT or UTIME_NOW
+  * [patch for 2.6.26 3/4] vfs: utimensat(): fix error checking for
+    {UTIME_NOW,UTIME_OMIT} case
+  * [patch for 2.6.26 4/4] vfs: utimensat(): fix write access check for
+    futimens()
+  * [patch 1/4] vfs: path_{get,put}() cleanups
+  * [patch 2/4] fs: make struct file arg to d_path const
+  * [patch 3/4] vfs: fix ERR_PTR abuse in generic_readlink
+  * [patch 4/4] flock: remove unused fields from file_lock_operations
+  * [patch 3/3] vfs: make d_path() consistent across mount operations
+  * [patch 1/3] vfs: dcache sparse fixes
+  * [patch 2/3] vfs: dcache cleanups
+  * udf: Fix regression in UDF anchor block detection
+  * [SCSI] ses: Fix timeout
+  * netfilter: ip6table_mangle: don't reroute in LOCAL_IN
+  * [SCSI] esp: Fix OOPS in esp_reset_cleanup().
+  * kernel/audit.c: nlh->nlmsg_type is gotten more than once
+  * audit: fix kernel-doc parameter notation
+  * remove useless argument type in audit_filter_user()
+  * Blackfin arch: fix bug - kernel boot fails when Spinlock and rw-lock
+    debugging enabled
+  * Blackfin arch: fix up section mismatch warning
+  * mac80211: implement EU regulatory domain
+  * b43: Do not return TX_BUSY from op_tx
+  * b43legacy: Do not return TX_BUSY from op_tx
+  * b43: Fix possible MMIO access while device is down
+  * b43legacy: Fix possible NULL pointer dereference in DMA code
+  * rt2x00: Fix unbalanced mutex locking
+  * iwlwifi: improve scanning band selection management
+  * [SCSI] esp: tidy up target reference counting
+  * [ARM] 5117/1: pxafb: fix __devinit/exit annotations
+  * thermal: Create CONFIG_THERMAL_HWMON=n
+  * ACPI: don't walk tables if ACPI was disabled
+  * dock: bay: Don't call acpi_walk_namespace() when ACPI is disabled.
+  * x86: shift bits the right way in native_read_tscp
+  * x86: section/warning fixes
+  * V4L/DVB (8004): Fix INPUT dependency at budget-ci
+  * V4L/DVB (8005): Fix OOPS if frontend is null
+  * V4L/DVB (8007): cx18/cx25840: the S-Video LUMA input can use all
+    In1-In8 inputs
+  * V4L/DVB (8008): cx18: remove duplicate audio and video input enums
+  * V4L/DVB (8010): em28xx: Properly register extensions for already
+    attached devices
+  * V4L/DVB (8011): em28xx: enable DVB for HVR-900
+  * V4L/DVB (8012): gl861: sleep a little to avoid I2C errors
+  * V4L/DVB (8013): gl861: remove useless identify_state
+  * V4L/DVB (8015): gl861: replace non critical msleep(0) with msleep(1) to
+    be on the safe side
+  * V4L/DVB (8017): Ensure em28xx extensions only get run against devs that
+    support them
+  * V4L/DVB (8018): Add em2860 chip ID
+  * V4L/DVB (8020): Fix callbacks functions of saa7134_empress
+  * V4L/DVB (8022): saa7134: fix race between opening and closing the
+    device
+  * V4L/DVB (8026): Avoids an OOPS if dev struct can't be successfully
+    recovered
+  * V4L/DVB (8027): saa7134: Avermedia A700: only s-video and composite
+    input are working
+  * V4L/DVB (8028): Improve error messages for tda1004x attach
+  * V4L/DVB (8029): Improve error message at tda1004x_attach
+  * V4L/DVB (8034): tda18271: fix IF notch frequency handling
+  * V4L/DVB (8035): tda18271: dont touch EB14 if rf_cal lookup is out of
+    range
+  * V4L/DVB (8036): tda18271: toggle rf agc speed mode on TDA18271HD/C2
+    only
+  * V4L/DVB (8037): tda18271: ensure that the thermometer is off during
+    channel configuration
+  * V4L/DVB (8039): pxa-camera: fix platform_get_irq() error handling.
+  * V4L/DVB (8040): soc-camera: remove soc_camera_host_class class
+  * V4L/DVB (8042): DVB-USB UMT-010 channel scan oops
+  * V4L/DVB (8043): au0828: add support for additional USB device id's
+  * V4L/DVB (8044): au8522: tuning optimizations
+  * V4L/DVB (8048): saa7134: Fix entries for Avermedia A16d and Avermedia
+    E506
+  * V4L/DVB (8061): cx18: only select tuner / frontend modules if
+    !DVB_FE_CUSTOMISE
+  * V4L/DVB (8063): cx18: Fix unintended auto configurations in
+    cx18-av-core
+  * V4L/DVB (8066): cx18: Fix audio mux input definitions for HVR-1600 Line
+    In 2 and FM radio
+  * V4L/DVB (8067): cx18: Fix firmware load for case when digital capture
+    happens first
+  * V4L/DVB (8068): cx18: Add I2C slave reset via GPIO upon initialization
+  * V4L/DVB (8069): cx18: Fix S-Video and Compsite inputs for the Yuan
+    MPC718 and enable card entry
+  * V4L/DVB (8071): tda10023: Fix possible kernel oops during
+    initialisation
+  * V4L/DVB (8073): av7110: Catch another type of ARM crash
+  * V4L/DVB (8074): av7110: OSD transfers should not be interrupted
+  * V4L/DVB (8075): stv0299: Uncorrected block count and bit error rate
+    fixed
+  * V4L/DVB (8092): videodev: simplify and fix standard enumeration
+  * V4L/DVB (8096): au8522: prevent false-positive lock status
+  * V4L/DVB (8097): xc5000: check device hardware state to determine if
+    firmware download is needed
+  * V4L/DVB (8100): V4L/vivi: fix possible memory leak in vivi_fillbuff
+  * V4L/DVB (8108): Fix open/close race in saa7134
+  * s2io: fix documentation about intr_type
+  * tc35815: Mark carrier-off before starting PHY
+  * tc35815: Fix receiver hangup on Rx FIFO overflow
+  * ixgbe: fix EEH recovery during reset on PPC
+  * igb: fix EEH recovery during reset on PPC
+  * e1000e: fix EEH recovery during reset on PPC
+  * pcnet_cs, axnet_cs: clear bogus interrupt before request_irq
+  * drivers/net/r6040.c: Eliminate double sizeof
+  * ipg: fix jumbo frame compilation
+  * ipg: use NULL, not zero, for pointers
+  * [netdrvr] 3c59x: remove irqs_disabled warning from local_bh_enable
+  * [netdrvr] netxen: fix netxen_pci_tbl[] breakage
+  * e100: Do pci_dma_sync after skb_alloc for proper operation on ixp4xx
+  * e1000: only enable TSO6 via ethtool when using correct hardware
+  * [netdrvr] Fix IOMMU overflow checking in s2io.c
+  * qla3xxx: Hold RTNL while calling dev_close()
+  * Hold RTNL while calling dev_close()
+  * sata_uli: hardreset is broken
+  * rt2x00: Fix lock dependency errror
+  * prism: islpci_eth.c endianness fix
+  * mac80211: fix an oops in several failure paths in key allocation
+  * firewire: fw-sbp2: fix parsing of logical unit directories
+  * kbuild: fix a.out.h export to userspace with O= build.
+  * Ensure interrupted recovery completed properly (v1 metadata plus
+    bitmap)
+  * Don't acknowlege that stripe-expand is complete until it really is.
+  * Fix error paths if md_probe fails.
+  * hamradio: remove unused variable
+  * tcp: calculate tcp_mem based on low memory instead of all memory
+  * tcp: fix for splice receive when used with software LRO
+  * af_unix: fix 'poll for write'/connected DGRAM sockets
+  * netdevice: Fix typo of dev_unicast_add() comment
+  * pkt_sched: ERR_PTR() ususally encodes an negative errno, not positive.
+  * pkt_sched: Remove CONFIG_NET_SCH_RR
+  * include/linux/netdevice.h: don't export MAX_HEADER to userspace
+  * tcp: /proc/net/tcp rto,ato values not scaled properly (v2)
+  * netlink: Fix some doc comments in net/netlink/attr.c
+  * CONNECTOR: add a proc entry to list connectors
+  * inet fragments: fix race between inet_frag_find and
+    inet_frag_secret_rebuild
+  * net/inet_lro: remove setting skb->ip_summed when not LRO-able
+  * netlabel: Fix a problem when dumping the default IPv6 static labels
+  * ipv6 route: Convert rt6_device_match() to use RT6_LOOKUP_F_xxx flags.
+  * sched: fix cpu hotplug
+  * Fix and clean top .gitignore
+  * x86: fix cpu hotplug crash
+  * ptrace GET/SET FPXREGS broken
+  * Input: add KEY_MEDIA_REPEAT definition
+  * Input: fix locking in force-feedback core
+  * [ARM] 5131/1: Annotate platform_secondary_init with trace_hardirqs_off
+  * ide: fix /proc/ide/ide?/mate reporting
+  * netfilter: nf_conntrack_tcp: fixing to check the lower bound of valid
+    ACK
+  * textsearch: fix Boyer-Moore text search bug
+  * hostap: don't report useless WDS frames by default
+  * hostap: fix sparse warnings
+  * mac80211: don't accept WEP keys other than WEP40 and WEP104
+  * V4L/DVB (8145a): USB Video Class driver
+  * [IA64] Bugfix for system with 32 cpus
+  * [IA64] export account_system_vtime
+  * sched: fix divide error when trying to configure rt_period to zero
+  * x86: fix NODES_SHIFT Kconfig range
+  * block: Fix the starving writes bug in the anticipatory IO scheduler
+  * Properly notify block layer of sync writes
+  * rcu: fix hotplug vs rcu race
+  * I2C: S3C2410: Check ACK on byte transmission
+  * I2C: S3C2410: Fixup error codes returned rom a transfer.
+  * I2C: S3C2410: Add MODULE_ALIAS() for s3c2440 device.
+  * PCI: Restrict VPD read permission to root
+  * powerpc/bootwrapper: update for initrd with simpleImage
+  * i2c: Documentation: fix device matching description
+  * i2c: Fix bad hint about irqs in i2c.h
+  * powerpc/legacy_serial: Bail if reg-offset/shift properties are present
+  * powerpc/mpc5200: Fix lite5200b suspend/resume
+  * ipv4: fix sysctl documentation of time related values
+  * net-sched: change tcf_destroy_chain() to clear start of filter list
+  * net-sched: fix filter destruction in atm/hfsc qdisc destruction
+  * netlink: Unneeded local variable
+  * net: Tyop of sk_filter() comment
+  * netdevice: Fix wrong string handle in kernel command line parsing
+  * net: fib_rules: fix error code for unsupported families
+  * dm crypt: use cond_resched
+  * V4L/DVB (8178): uvc: Fix compilation breakage for the other drivers, if
+    uvc is selected
+  * PCI: Limit VPD read/write lengths for Broadcom 5706, 5708, 5709 rev.
+  * PCI: acpiphp: cleanup notify handler on all root bridges
+  * drivers/input/ff-core.c needs <linux/sched.h>
+  * DRM/i915: only use tiled blits on 965+
+  * tty: Fix inverted logic in send_break
+  * x86: fix Intel Mac booting with EFI
+  * arch/x86/mm/init_64.c: early_memtest(): fix types
+  * 9p: fix O_APPEND in legacy mode
+  * slub: Do not use 192 byte sized cache if minimum alignment is 128 byte
+  * Do not overwrite nr_zones on !NUMA when initialising zlcache_ptr
+  * [MIPS] IP32: Fix unexpected irq 71
+  * [MIPS] IP22: Fix crashes due to wrong L1_CACHE_BYTES
+  * [MIPS] cevt-txx9: Reset timer counter on initialization
+  * hrtimer: prevent migration for raising softirq
+  * svcrpc: fix handling of garbage args
+  * OHCI: Fix problem if SM501 and another platform driver is selected
+  * USB: fix cdc-acm resume()
+  * USB: ehci - fix timer regression
+  * USB: ohci - record data toggle after unlink
+  * USB: mass storage: new id for US_SC_CYP_ATACB
+  * sisusbvga: Fix oops on disconnect.
+  * USB: New device ID for ftdi_sio driver
+  * USB: fix interrupt disabling for HCDs with shared interrupt handlers
+  * USB: don't lose disconnections during suspend
+  * USB: another option device id
+  * USB: add a pl2303 device id
+  * USB: fix Oops on loading ipaq module since 2.6.26
+  * USB: adding comment for ipaq forcing number of ports
+  * [MIPS] Fix bug in atomic_sub_if_positive.
+  * xen: fix address truncation in pte mfn<->pfn conversion
+  * sata_sil24: add DID for another adaptec flavor
+  * ahci: always clear all bits in irq_stat
+  * libata-sff: improve HSM violation reporting
+  * sata_mv: safer logic for limit_warnings
+  * Update maintainers for powerpc
+  * Christoph has moved
+  * mm: dirty page accounting vs VM_MIXEDMAP
+  * rtc: rtc_read_alarm() handles wraparound
+  * firmware: fix the request_firmware() dummy
+  * serial: fix serial_match_port() for dynamic major tty-device numbers
+  * get_user_pages(): fix possible page leak on oom
+  * rtc-x1205: Fix alarm set
+  * rtc: fix CMOS time error after writing /proc/acpi/alarm
+  * pci: VT3336 can't do MSI either
+  * Miguel Ojeda has moved
+  * ext3: add missing unlock to error path in ext3_quota_write()
+  * ext4: add missing unlock to an error path in ext4_quota_write()
+  * reiserfs: add missing unlock to an error path in reiserfs_quota_write()
+  * ecryptfs: remove unnecessary mux from ecryptfs_init_ecryptfs_miscdev()
+  * lib: taint kernel in common report_bug() WARN path.
+  * gpio: pca953x (i2c) handles max7310 too
+  * fsl_diu_fb: fix build with CONFIG_PM=y, plus fix some warnings
+  * Update taskstats-struct document for scaled time accounting
+  * cciss: fix regression that no device nodes are created if no logical
+    drives are configured.
+  * delay accounting: maintainer update
+  * Doc*/kernel-parameters.txt: fix stale references
+  * hdaps: add support for various newer Lenovo thinkpads
+  * mn10300: export certain arch symbols required to build allmodconfig
+  * mn10300: provide __ucmpdi2() for MN10300
+  * Introduce rculist.h
+  * man-pages is supported
+  * ntfs: update help text
+  * add kernel-doc for simple_read_from_buffer and memory_read_from_buffer
+  * w100fb: do not depend on SHARPSL
+  * w100fb: add 80 MHz modeline
+  * MFD maintainer
+  * cgroups: document the effect of attaching PID 0 to a cgroup
+  * spi: fix the read path in spidev
+  * doc: doc maintainers
+  * security: filesystem capabilities: fix fragile setuid fixup code
+  * security: filesystem capabilities: fix CAP_SETPCAP handling
+  * Alpha Linux kernel fails with inconsistent kallsyms data
+  * cpusets: document proc status cpus and mems allowed lists
+  * MAINTAINERS: update the email address of Andreas Dilger
+  * cciss: read config to obtain max outstanding commands per controller
+  * olpc: sdhci: add quirk for the Marvell CaFe's vdd/powerup issue
+  * olpc: sdhci: add quirk for the Marvell CaFe's interrupt timeout
+  * cpumask: introduce new APIs
+  * mm: switch node meminfo Active & Inactive pages to Kbytes
+  * Update MAINTAINERS file for the TPM device driver
+  * devcgroup: fix odd behaviour when writing 'a' to devices.allow
+  * doc: document the relax_domain_level kernel boot argument
+  * mmc: don't use DMA on newer ENE controllers
+  * mempolicy: mask off internal flags for userspace API
+  * x86 ACPI: normalize segment descriptor register on resume
+  * x86 ACPI: fix resume from suspend to RAM on uniprocessor x86-64
+  * softlockup: print a module list on being stuck
+  * ide: fix hwif->gendev refcounting
+  * ide: ide_unregister() warm-plug bugfix
+  * ide: ide_unregister() locking bugfix
+  * ahci: give another shot at clearing all bits in irq_stat
+  * Fix clear_refs_write() use of struct mm_walk
+  * Move _RET_IP_ and _THIS_IP_ to include/linux/kernel.h
+  * Fix pagemap_read() use of struct mm_walk
+  * Linux 2.6.26-rc9
+  * Revert "USB: don't explicitly reenable root-hub status interrupts"
+  * Revert "PCI: Correct last two HP entries in the bfsort whitelist"
+  * iwlwifi: fix incorrect 5GHz rates reported in monitor mode
+  * iwlwifi: drop skb silently for Tx request in monitor mode
+  * libertas: support USB persistence on suspend/resume (resend)
+  * tcp: net/ipv4/tcp.c needs linux/scatterlist.h
+  * tcp: fix a size_t < 0 comparison in tcp_read_sock
+  * bridge: fix use-after-free in br_cleanup_bridges()
+  * Add missing skb->dev assignment in Frame Relay RX code
+  * forcedeth: fix lockdep warning on ethtool -s
+  * ehea: fix might sleep problem
+  * ehea: add MODULE_DEVICE_TABLE
+  * ehea: fix race condition
+  * ehea: Access iph->tot_len with correct endianness
+  * pasemi_mac: Access iph->tot_len with correct endianness
+  * ibm_newemac: Fixes kernel crashes when speed of cable connected changes
+  * ibm_newemac: Fixes entry of short packets
+  * fs_enet: restore promiscuous and multicast settings in restart()
+  * can: add sanity checks
+  * x86: KVM guest: Add memory clobber to hypercalls
+  * KVM: IOAPIC: Fix level-triggered irq injection hang
+  * [SCSI] erase invalid data returned by device
+  * pxamci: fix byte aligned DMA transfers
+  * vsprintf: split out '%s' handling logic
+  * vsprintf: split out '%p' handling logic
+  * vsprintf: add infrastructure support for extended '%p' specifiers
+  * vsprintf: add support for '%pS' and '%pF' pointer formats
+  * powerpc: Fix unterminated of_device_id array in legacy_serial.c
+  * [UML] fix gcc ICEs and unresolved externs
+  * ocfs2/dlm: Fixes oops in dlm_new_lockres()
+  * hostap_cs: correct poor NULL checks in suspend/resume routines
+  * drivers/net/wireless/iwlwifi/iwl-3945.c Fix type issue on 64bit
+  * mac80211: move netif_carrier_on to after
+    ieee80211_bss_info_change_notify
+  * mac80211: Only flush workqueue when last interface was removed
+  * zd1211rw: add ID for AirTies WUS-201
+  * ssb-pcicore: Fix IRQ-vector init on embedded devices
+  * mac80211: don't report selected IBSS when not found
+  * crypto: tcrypt - Fix memory leak in test_cipher
+  * sctp: Mark the tsn as received after all allocations finish
+  * [S390] protect _PAGE_SPECIAL bit against mprotect
+  * irda: via-ircc proper dma freeing
+  * irda: New device ID for nsc-ircc
+  * irda: Fix netlink error path return value
+  * [SCSI] mptspi: fix oops in mptspi_dv_renegotiate_work()
+  * Correct hash flushing from huge_ptep_set_wrprotect()
+  * ide: add __ide_default_irq() inline helper
+  * palm_bk3710: fix IDECLK period calculation
+  * it8213: fix return value in it8213_init_one()
+  * [MIPS] Atlas, decstation: Fix section mismatches triggered by
+    defconfigs
+  * [MIPS] Fix 32bit kernels on R4k with 128 byte cache line size
+  * NFS: Fix readdir cache invalidation
+  * SUNRPC: Fix a double-free in rpcbind
+  * SUNRPC: Fix an rpcbind breakage for the case of IPv6 lookups
+  * reiserfs: discard prealloc in reiserfs_delete_inode
+  * Fix broken fix for fsl-diu-db
+  * RDMA/cxgb3: Fix regression caused by class_device -> device conversion
+  * ipv6: fix race between ipv6_del_addr and DAD timer
+  * sctp: Add documentation for sctp sysctl variable
+  * kernel/printk.c: Made printk_recursion_bug_msg static.
+  * powerpc: Add missing reference to coherent_dma_mask
+  * rc80211_pid: Fix fast_start parameter handling
+  * rt2x00: Disable synchronization during initialization
+  * zd1211rw: stop beacons on remove_interface
+  * libertas: fix memory alignment problems on the blackfin
+  * netfilter: nf_conntrack_tcp: fix endless loop
+  * netfilter: nf_nat_snmp_basic: fix a range check in NAT for SNMP
+  * md: ensure all blocks are uptodate or locked when syncing
+  * sched: fix cpu hotplug
+  * x86: fix /dev/mem compatibility under PAT
+  * crypto: chainiv - Invoke completion function
+  * ocfs2: Fix flags in ocfs2_file_lock
+  * kernel/kprobes.c: Made kprobe_blacklist static.
+  * arch/x86/kernel/.gitignore: Added vmlinux.lds to .gitignore file
+    because it shouldn't be tracked.
+  * ftrace: Documentation
+  * Fix PREEMPT_RCU without HOTPLUG_CPU
+  * sched: fix cpu hotplug, cleanup
+  * exec: fix stack excutability without PT_GNU_STACK
+  * slub: Fix use-after-preempt of per-CPU data structure
+  * Documentation: clarify tcp_{r,w}mem sysctl docs
+  * ip: sysctl documentation cleanup
+  * tcp: correct kcalloc usage
+  * ipv4: fib_trie: Fix lookup error return
+  * netlabel: netlink_unicast calls kfree_skb on error path by itself
+  * ipv6: missed namespace context in ipv6_rthdr_rcv
+  * xfrm: Add a XFRM_STATE_AF_UNSPEC flag to xfrm_usersa_info
+  * tun: Persistent devices can get stuck in xoff state
+  * tpm: add Intel TPM TIS device HID
+  * rapidio: fix device reference counting
+  * Fix name of Russell King in various comments
+  * rtc: fix reported IRQ rate for when HPET is enabled
+  * libata-acpi: filter out DIPM enable
+  * Added Targa Visionary 1000 IDE adapter to pata_sis.c
+  * libata-acpi: don't call sleeping function from invalid context
+  * Fix reference counting race on log buffers
+  * [SCSI] ipr: Fix HDIO_GET_IDENTITY oops for SATA devices
+  * IPMI: return correct value from ipmi_write
+  * x86: fix ldt limit for 64 bit
+  * [SCSI] fusion: default MSI to disabled for SPI and FC controllers
+  * [SCSI] bsg: fix oops on remove
+  * drivers/char/pcmcia/ipwireless/hardware.c fix resource leak
+  * drivers/isdn/i4l/isdn_common.c fix small resource leak
+  * fbdev: bugfix for multiprocess defio
+  * serial8250: sanity check nr_uarts on all paths.
+  * ov7670: clean up ov7670_read semantics
+  * rtc-fm3130: fix chip naming
+  * rtc-pcf8563: add chip id
+  * OProfile kernel maintainership changes
+  * frv: fix irqs_disabled() to return an int, not an unsigned long
+  * cifs: fix inode leak in cifs_get_inode_info_unix
+  * cifs: fix wksidarr declaration to be big-endian friendly
+  * cpusets, hotplug, scheduler: fix scheduler domain breakage
+  * Documentation/HOWTO: correct wrong kernel bugzilla FAQ URL
+  * devcgroup: always show positive major/minor num
+  * devcgroup: fix permission check when adding entry to child cgroup
+  * Linux 2.6.26
+
+ -- Ben Collins <ben.collins@canonical.com>  Mon, 14 Jul 2008 13:41:50 -0400
+
+linux (2.6.26-3.9) intrepid; urgency=low
+
+  * abi: Add dca and ioatdma to modules.ignore
+
+  [ 2.6.26-3.8 ]
+
+  [ Ben Collins ]
+
+  * ubuntu: Add heci driver 3.2.0.24
+  * ubuntu: Add heci to kconfig/kbuild
+  * config: Enable heci module on all flavours
+  * dm-bbr: Update to get it to compile with 2.6.26
+  * config: Enable dm-bbr
+  * ubuntu: Add some media drivers
+  * config: Enable misc media drivers
+  * udeb: Switch to uvesafb in fb-modules
+  * abi: Add more modules to ignore (known)
+
+  [ 2.6.26-3.7 ]
+
+  [Amit Kucheria]
+
+  * SAUCE: make fc transport removal of target configurable
+     - LP: #163075
+  * SAUCE: pm: Config option to disable handling of console during
+    suspend/resume
+
+  [Ben Collins]
+
+  * SAUCE: input/mouse/alps: Do not call psmouse_reset() for alps
+  * SAUCE: irda: Default to dongle type 9 on IBM hardware
+  * SAUCE: tulip: Let dmfe handle davicom on non-sparc
+  * SAUCE: tulip: Define ULI PCI ID's
+  * SAUCE: version: Implement version_signature proc file.
+  * build: Cleanup arches
+  * build: Remove remnants of unused binary-custom infrastructure
+  * build: Remove disable_d_i (not needed) and cleanup ppa build stuff
+  * ubuntu: New modules, acer-acpi
+  * build: Remove -virtual, and rebuild configs
+  * ubuntu: Add drbd module
+  * acer-acpi: Fix makefile
+  * x86/Kconfig: Fix missing quote for ubuntu Kconfig source
+  * ubuntu: Add iscsitarget module
+  * ubuntu: Added Amiga FS driver
+  * ubuntu: Add squashfs driver
+  * ubuntu: Remove asfs (Amiga FS). Need to be in linux-ports instead
+  * squashfs: Move headers to real include directory
+  * build/configs: The Great Config Consistency Check of 2008
+  * ubuntu: Move third-party includes to ubuntu/include
+  * ubuntu: Add aufs module
+  * ubuntu: Added atl2 driver
+  * ubuntu: Add dm-radi4-5 driver
+  * build: Add CONFIG_DEBUG_SECTION_MISMATCH=y to get old style warnings
+    from build
+  * ubuntu/Makefile: Fixup dm-raid4-5 and add kludge for kbuild
+  * squashfs: Fixes for VFS changes
+  * ubuntu/dm-raid4-5: Fixups for moved/renamed headers/functions in core
+    md
+  * ubuntu: Add ndiswrapper driver
+  * d-i: Update module listings
+  * build: Disable xd block device (ancient)
+  * ndiswrapper: Fixup makefile
+  * d-i: Remove efi-modules. The only module, efivars, is built-in
+  * build: Remove install-source, obsolete and caused build failure
+  * Ubuntu-2.6.26-1.3
+  * build: linux-doc rules got broken when disabling html side. Fixed now.
+  * Ubuntu-2.6.26-1.4
+  * x86: Update to -rc6 allows CONFIG_PCI_OLPC to work with PCI_GOANY
+  * d-i: Make virtio-ring optional (it's built-in on i386)
+  * Ubuntu-2.6.26-1.4
+  * Ubuntu-2.6.26-1.5
+  * config: Enable DVB devices
+  * ubuntu/aufs: Make aufs a bool config, since it needs to be built-in
+  * config: Build aufs into the kernels
+  * build: Fix arguments passed to link-headers script
+  * config: Disable early printk
+  * d-i: Move isofs to storage-core and kill st (scsi tape) from list
+  * config: Enable non-promiscuous access to /dev/mem
+  * x86: Add option to disable decompression info messages
+  * config: Enable no-bz-chatter config options
+  * build: Re-add linux-source package
+  * d-i: Re-add socket-modules. Accidentally removed
+    - LP: #241295
+  * Ubuntu-2.6.26-2.6
+  * Use makedumpfile to generate a vmcoreinfo file.
+  * build: Build-Depend on makedumpfile for vmcoreinfo generation
+  * build: Remove debug print from git-ubuntu-log
+  * Updated configs for -rc7
+  * build: postinst, do not call depmod with -F
+  * config: Enable rtc-cmos as a built-in driver.
+  * control: Provide ndiswrapper-modules-1.9
+  * build: Generate vmcoreinfo in image build for crashdumps without debug
+    image
+  * config: Disable vesafb, since we'll prefer uvesafb
+  * build: Copy uvesafb module to initrd mod directory
+  * abi-check: New, more robust script
+  * config: Enable heap randomization by default
+  * abi-check: Cleanup output and call with perl (not $SHELL)
+  * abi: Ignore missing vesafb (known)
+  * config: Disable pcspkr (in favor of snd-pcsp)
+  * swap: Add notify_swap_entry_free callback for compcache
+  * compcache: Added ram backed compressed swap module
+  * ubuntu: Enable kbuild and kconfig for compcache
+  * config: Enable compcache and tlsf allocator as modules
+  * config: Updated for -rc8. Disables XEN on i386
+  * config: Switch i386-server to 64G, enable PAE, 64-bit res, and XEN
+  * ubuntu: Add misc drivers from hardy lum
+  * ubuntu: Enable build of misc/ subdir
+  * config: Enable misc drivers
+  * aufs: Fix warning about single non-string-literal arg to printf style
+    function
+  * drivers: Remove some duplicate device entries in various modules
+  * config: Disable some duplicate drivers
+  * keyspan: Remove duplicate device ID's
+  * check-aliases: Cleanup output, and fix rolling checks
+  * ubuntu: Disable dm-bbr for now
+  * dm-bbr: First cut at forward portiong. Still needs work.
+  * ubuntu: Disable dm-bbr in kbuild/kconfig
+
+  [Chuck Short]
+
+  * SAUCE: ata: blacklist FUJITSU MHW2160BH PL
+     - LP: #175834
+  * SAUCE: [USB]: add ASUS LCM to the blacklist
+
+  [Colin Ian King]
+
+  * SAUCE: airprime.c supports more devices
+    - LP: #208250
+  * SAUCE: Enable speedstep for sonoma processors. 
+     - LP: #132271
+  * Add dm-loop
+  * Add dm-loop BOM
+
+  [Kyle McMartin]
+
+  * SAUCE: fix orinoco_cs oops
+
+  [Mario Limonciello]
+
+  * SAUCE: Enable Reset and SCO workaround on Dell 410 BT adapter
+
+  [Matthew Garrett]
+
+  * SAUCE: hostap: send events on data interface as well as master
+    interface
+
+  [Phillip Lougher]
+
+  * SAUCE: r8169: disable TSO by default for RTL8111/8168B chipsets.
+
+  [Stefan Bader]
+
+  * SAUCE: Export dm_disk function of device-mapper
+  * SAUCE: Restore VT fonts on switch
+  * SAUCE: Always use SCO protocol (disable eSCO support) Bug: #39414
+  * SAUCE: mmc: Increase power_up deleay to fix TI readers OriginalAuthor:
+    Pascal Terjan <pterjan@mandriva.com> Bug: #137686
+  * SAUCE: Add blacklist support to fix Belkin bluetooth dongle. Bug:
+    #140511
+  * SAUCE: Lower warning level of pci resource allocation messages. Bug:
+    159241
+  * SAUCE: Lower message level for PCI memory and I/O allocation.
+    - LP: #159241
+  * Modify log generation to catch bug numbers when adding with git-am.
+
+  [Tim Gardner]
+
+  * Added the debian directory. Ignore: yes
+  * Add support for UBUNTUINCLUDE Ignore: yes
+  * LUM headers go in /usr/src Ignore: yes
+  * First pass at 2.6.25 configs Ignore: yes
+  * i386 -generic builds. Ignore: yes
+  * SAUCE: Increase CONFIG_IDE_MAX_HWIFS to 8 (from 4)
+  * SAUCE: Add extra headers to linux-libc-dev OriginalAuthor: Soren Hansen
+    OriginalLocation:
+    https://lists.ubuntu.com/archives/kernel-team/2007-November/001891.html
+  * Set CONFIG_DEVKMEM=n Ignore: yes
+  * Enabled ALSA and CGROUPS for i386 Ignore: yes
+  * Enabled amd64 configs. Ignore: yes
+  * CONFIG_STANDALONE=n Ignore: yes
+  * CONFIG_BLK_DEV_4DRIVES=n for i386 Ignore: yes
+  * CONFIG: CONFIG_DEFAULT_RELATIME=y for all flavours. Ignore: yes
+  * Set CONFIG_EDD_OFF=y Ignore: yes
+  * SAUCE: Blacklist Bluetooth Dell Wireless 370 for SCO MTU
+    OriginalAuthor: Mario Limonciello <Mario_Limonciello@Dell.com> Bug:
+    #209715
+  * SAUCE: Catch nonsense keycodes and silently ignore
+  * SAUCE: frame buffer regression - screen blank except for blinking
+    cursor after fbcon vtswitch OriginalAuthor: Matthew Garrett
+    <mjg59@srcf.ucam.org> Bug: #201591
+  * SAUCE: Added support for HDAPS on various ThinkPads from Lenovo and IBM
+    OriginalAuthor: Klaus S. Madsen <ubuntu@hjernemadsen.org>
+    OriginalAuthor: Chuck Short <zulcss@ubuntu.com>
+  * SAUCE: Guest OS does not recognize a lun with non zero target id on
+    Vmware ESX Server
+  * SAUCE: orinoco_cs.ko missing
+  * Set CONFIG_FB_VESA=m for i386/amd64 Ignore: yes
+  * Set CONFIG_PM_DISABLE_CONSOLE=y for all flavours Ignore: yes
+  * Thorough review of amd64 -generic config Ignore: yes
+  * Build PPA packages for Hardy until the Intrepid archive is opened.
+  * Deleted obsolete flavours Ignore: yes
+  * Don't build docs for PPA Ignore: yes
+  * Build all standard packages in PPA. Ignore: yes
+  * Remove duplicate USB ids
+  * SAUCE: DVB-USB UMT-010 driver oops on install Bug: #115284
+  * Update configs after rebase to 2.6.26-rc1 Ignore: yes
+  * Update configs after rebase Ignore: yes
+  * Disable V4L until the build issues get ironed out. Ignore: yes
+  * Update configs after rebase. Ignore: yes
+  * Another device enable pass Ignore: yes
+  * Update configs after merge. Ignore: yes
+  * SAUCE: fn key doesn't work in hardy with macbook pro fourth generation
+    (4,1)
+    - LP: #207127
+  * Enabled CONFIG_CIFS_DFS_UPCALL=y and CONFIG_CIFS_UPCALL=y
+    - LP: #236830
+
+  [Upstream Kernel Changes]
+
+  * Revert "[WATCHDOG] hpwdt: Add CFLAGS to get driver working"
+  * mac80211: detect driver tx bugs
+  * hwmon: (lm85) Fix function RANGE_TO_REG()
+  * hwmon: (adt7473) Initialize max_duty_at_overheat before use
+  * hwmon: Update the sysfs interface documentation
+  * hwmon: (abituguru3) Identify Abit AW8D board as such
+  * hwmon: (w83791d) new maintainer
+  * hwmon: (abituguru3) update driver detection
+  * hwmon: (lm75) sensor reading bugfix
+  * ipv6: Remove options header when setsockopt's optlen is 0
+  * ipv6: Drop packets for loopback address from outside of the box.
+  * sched: rt: dont stop the period timer when there are tasks wanting to
+    run
+  * sched: fix wait_for_completion_timeout() spurious failure under heavy
+    load
+  * x86: fix NULL pointer deref in __switch_to
+  * xen: Use wmb instead of rmb in xen_evtchn_do_upcall().
+  * xen: mask unwanted pte bits in __supported_pte_mask
+  * xen: don't drop NX bit
+  * sched: refactor wait_for_completion_timeout()
+  * Ext4: Fix online resize block group descriptor corruption
+  * [IA64] SN2: security hole in sn2_ptc_proc_write
+  * alpha: fix module load failures on smp (bug #10926)
+  * alpha: link failure fix
+  * alpha: fix compile failures with gcc-4.3 (bug #10438)
+  * alpha: resurrect Cypress IDE quirk
+  * pppoe: warning fix
+  * sctp: Make sure N * sizeof(union sctp_addr) does not overflow.
+  * netns: Don't receive new packets in a dead network namespace.
+  * Add return value to reserve_bootmem_node()
+  * Slab: Fix memory leak in fallback_alloc()
+  * Fix performance regression on lmbench select benchmark
+  * ALSA: aw2 - Fix Oops at initialization
+  * ALSA: sb - Fix wrong assertions
+  * futexes: fix fault handling in futex_lock_pi
+  * IB/mthca: Clear ICM pages before handing to FW
+  * tty_driver: Update required method documentation
+  * removed unused var real_tty on n_tty_ioctl()
+  * Fix ZERO_PAGE breakage with vmware
+  * mm: fix race in COW logic
+  * NFS: Reduce the NFS mount code stack usage.
+  * NFS: Fix filehandle size comparisons in the mount code
+  * NFS: nfs_updatepage(): don't mark page as dirty if an error occurred
+  * alpha: fix compile error in arch/alpha/mm/init.c
+  * KVM: Fix race between timer migration and vcpu migration
+  * KVM: close timer injection race window in __vcpu_run
+  * KVM: MMU: Fix rmap_write_protect() hugepage iteration bug
+  * KVM: MMU: large page update_pte issue with non-PAE 32-bit guests
+    (resend)
+  * KVM: MMU: Fix oops on guest userspace access to guest pagetable
+  * KVM: ioapic: fix lost interrupt when changing a device's irq
+  * KVM: VMX: Fix host msr corruption with preemption enabled
+  * [GFS2] BUG: unable to handle kernel paging request at ffff81002690e000
+  * xen: remove support for non-PAE 32-bit
+  * kgdb: documentation update - remove kgdboe
+  * kgdb: sparse fix
+  * [IA64] Fix boot failure on ia64/sn2
+  * [IA64] Handle count==0 in sn2_ptc_proc_write()
+  * [IA64] Eliminate NULL test after alloc_bootmem in iosapic_alloc_rte()
+  * [GFS2] fix gfs2 block allocation (cleaned up)
+  * x86: Add structs and functions for paravirt clocksource
+  * x86: Make xen use the paravirt clocksource structs and functions
+  * KVM: Make kvm host use the paravirt clocksource structs
+  * x86: KVM guest: Use the paravirt clocksource structs and functions
+  * KVM: Remove now unused structs from kvm_para.h
+  * enable bus mastering on i915 at resume time
+  * Linux 2.6.26-rc8
+  * # Ubuntu external driver commit.
+  * # Ubuntu commit template.
+
+ -- Ben Collins <ben.collins@canonical.com>  Sat, 21 Jun 2008 09:05:15 -0400
+
+linux (2.6.26-2.6) intrepid; urgency=low
+
+  [Ben Collins]
+
+  * Revert "SAUCE: Export symbols for aufs (in lum) (not needed)
+  * config: Enable DVB devices
+  * ubuntu/aufs: Make aufs a bool config, since it needs to be built-in
+  * config: Build aufs into the kernels
+  * build: Fix arguments passed to link-headers script
+  * config: Disable early printk
+  * d-i: Move isofs to storage-core and kill st (scsi tape) from list
+  * config: Enable non-promiscuous access to /dev/mem
+  * x86: Add option to disable decompression info messages
+  * config: Enable no-bz-chatter config options
+  * build: Re-add linux-source package
+  * d-i: Re-add socket-modules. Accidentally removed
+    - LP: #241295
+
+  [Colin Ian King]
+
+  * Add dm-loop
+
+  [Tim Gardner]
+
+  * Revert "SAUCE: USB bluetooth device 0x0e5e:0x6622 floods errors to
+    syslog (merged upstream)
+
+ -- Ben Collins <ben.collins@canonical.com>  Mon, 16 Jun 2008 10:56:01 -0400
+
+linux (2.6.26-1.5) intrepid; urgency=low
+
+  * d-i: Make virtio-ring optional (it's built-in on i386)
+  * Rebased on 2.6.26-rc6
+
+  [Ubuntu-2.6.26-1.4 Changes below]
+
+  * build: linux-doc rules got broken when disabling html side. Fixed now.
+
+  [Ubuntu-2.6.26-1.3 Changes below]
+
+  * build: Remove install-source, obsolete and caused build failure
+
+  [Ubuntu-2.6.26-1.2 Changes below]
+
+  * Remove efi-modules from d-i module list (efivars is built-in). Caused a
+    build failure.
+  * Patch to arch/x86/xen/time.c to remove __divdi3 usage (build failure on
+    i386).
+
+  [Ubuntu-2.6.26-1.1 Changes below]
+
+  [Amit Kucheria]
+
+  * SAUCE: make fc transport removal of target configurable
+  * SAUCE: Add AGP support for Radeon Mobility 9000 chipset
+  * SAUCE: pm: Config option to disable handling of console during
+    suspend/resume
+
+  [Ben Collins]
+
+  * SAUCE: input/mouse/alps: Do not call psmouse_reset() for alps
+  * SAUCE: irda: Default to dongle type 9 on IBM hardware
+  * SAUCE: tulip: Let dmfe handle davicom on non-sparc
+  * SAUCE: tulip: Define ULI PCI ID's
+  * SAUCE: version: Implement version_signature proc file.
+  * build: Remove remnants of unused binary-custom infrastructure
+  * mmc_block: Fix bad allocation on 64-bit (zero len array)
+  * ubuntu: New modules, acer-acpi
+  * build: Remove -virtual, and rebuild configs
+  * ubuntu: Add drbd module
+  * ubuntu: Add iscsitarget module
+  * ubuntu: Add squashfs driver
+  * build/configs: The Great Config Consistency Check of 2008
+  * ubuntu: Add aufs module
+  * ubuntu: Added atl2 driver
+  * ubuntu: Add dm-radi4-5 driver
+  * build: Add CONFIG_DEBUG_SECTION_MISMATCH=y to get old style warnings
+    from build
+  * squashfs: Fixes for VFS changes
+  * ubuntu/dm-raid4-5: Fixups for moved/renamed headers/functions in core
+    md
+  * ubuntu: Add ndiswrapper driver
+  * d-i: Update module listings
+
+  [Chuck Short]
+
+  * SAUCE: ata: blacklist FUJITSU MHW2160BH PL
+  * SAUCE: [USB]: add ASUS LCM to the blacklist
+
+  [Colin Ian King]
+
+  * SAUCE: Enable speedstep for sonoma processors.
+  * SAUCE: airprime.c supports more devices
+
+  [Kyle McMartin]
+
+  * SAUCE: fix orinoco_cs oops
+
+  [Mario Limonciello]
+
+  * SAUCE: Enable Reset and SCO workaround on Dell 410 BT adapter
+
+  [Matthew Garrett]
+
+  * SAUCE: hostap: send events on data interface as well as master
+    interface
+
+  [Phillip Lougher]
+
+  * SAUCE: r8169: disable TSO by default for RTL8111/8168B chipsets.
+
+  [Stefan Bader]
+
+  * SAUCE: Export dm_disk function of device-mapper
+  * SAUCE: Restore VT fonts on switch
+  * SAUCE: Always use SCO protocol (disable eSCO support) Bug: #39414
+  * SAUCE: mmc: Increase power_up deleay to fix TI readers
+  * SAUCE: Add blacklist support to fix Belkin bluetooth dongle.
+  * SAUCE: Lower warning level of pci resource allocation messages.
+  * SAUCE: Lower message level for PCI memory and I/O allocation.
+    - LP: #159241
+  * Modify log generation to catch bug numbers when adding with git-am.
+
+  [Tim Gardner]
+
+  * SAUCE: hdaps module does not load on Thinkpad T61P
+  * SAUCE: Add extra headers to linux-libc-dev
+  * SAUCE: Export symbols for aufs (in lum).
+  * SAUCE: USB bluetooth device 0x0e5e:0x6622 floods errors to syslog
+  * SAUCE: Blacklist Bluetooth Dell Wireless 370 for SCO MTU
+  * SAUCE: Catch nonsense keycodes and silently ignore
+  * SAUCE: frame buffer regression - screen blank except for blinking
+    cursor after fbcon vtswitch
+  * SAUCE: Added support for HDAPS on various ThinkPads from Lenovo and IBM
+  * SAUCE: Guest OS does not recognize a lun with non zero target id on
+    Vmware ESX Server
+  * SAUCE: Modualrize vesafb
+  * SAUCE: DVB-USB UMT-010 driver oops on install
+  * SAUCE: fn key doesn't work in hardy with macbook pro fourth generation
+    (4,1)
+    - LP: #207127
+
+ -- Ben Collins <ben.collins@canonical.com>  Wed, 11 Jun 2008 05:28:35 -0400
--- linux-mvl-dove-2.6.32.orig/debian.master/etc/getabis
+++ linux-mvl-dove-2.6.32/debian.master/etc/getabis
@@ -0,0 +1,15 @@
+repo_list=(
+	"http://archive.ubuntu.com/ubuntu/pool/main/l/linux"
+	"http://ports.ubuntu.com/ubuntu-ports/pool/main/l/linux"
+	"http://archive.ubuntu.com/ubuntu/pool/universe/l/linux"
+	"http://ports.ubuntu.com/ubuntu-ports/pool/universe/l/linux"
+)
+
+getall armel versatile
+getall amd64 generic server preempt
+getall i386 generic generic-pae 386
+
+# Ports arches and flavours.
+getall powerpc powerpc powerpc-smp powerpc64-smp
+getall ia64 ia64
+getall sparc sparc64 sparc64-smp
--- linux-mvl-dove-2.6.32.orig/debian.master/etc/kernelconfig
+++ linux-mvl-dove-2.6.32/debian.master/etc/kernelconfig
@@ -0,0 +1,7 @@
+if [ "$variant" = "ports" ]; then
+	archs="sparc powerpc ia64"
+	family='ports'
+else
+	archs="amd64 i386 lpia armel"
+	family='ubuntu'
+fi
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/exclude-modules.sparc
+++ linux-mvl-dove-2.6.32/debian.master/d-i/exclude-modules.sparc
@@ -0,0 +1,10 @@
+efi-modules
+nic-pcmcia-modules
+pcmcia-modules
+pcmcia-storage-modules
+irda-modules
+floppy-modules
+fb-modules
+acpi-modules
+virtio-modules
+char-modules
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/package-list
+++ linux-mvl-dove-2.6.32/debian.master/d-i/package-list
@@ -0,0 +1,190 @@
+Package: kernel-image
+
+Package: char-modules
+Depends: kernel-image
+Priority: standard
+Description: Character module support
+
+Package: fat-modules
+Depends: kernel-image
+Priority: standard
+Description: FAT filesystem support
+ This includes Windows FAT and VFAT support.
+
+Package: fb-modules
+Depends: kernel-image
+Priority: standard
+Description: Framebuffer modules
+
+Package: firewire-core-modules
+Depends: kernel-image, storage-core-modules
+Priority: standard
+Description: Firewire (IEEE-1394) Support
+
+Package: floppy-modules
+Depends: kernel-image
+Priority: standard
+Description: Floppy driver support
+
+Package: fs-core-modules
+Depends: kernel-image
+Priority: standard
+Provides: jfs-modules, reiserfs-modules, xfs-modules
+Description: Base filesystem modules
+ This includes jfs, reiserfs and xfs.
+
+Package: fs-secondary-modules
+Depends: kernel-image, fat-modules
+Priority: standard
+Provides: ntfs-modules, hfs-modules
+Description: Extra filesystem modules
+ This includes support for Windows NTFS and MacOS HFS/HFSPlus
+
+Package: input-modules
+Depends: kernel-image, usb-modules
+Priority: standard
+Description: Support for various input methods
+
+Package: irda-modules
+Depends: kernel-image, nic-shared-modules
+Priority: standard
+Description: Support for Infrared protocols
+
+Package: md-modules
+Depends: kernel-image
+Priority: standard
+Description: Multi-device support (raid, device-mapper, lvm)
+
+Package: nic-modules
+Depends: kernel-image, nic-shared-modules, virtio-modules
+Priority: standard
+Description: Network interface support
+
+Package: nic-pcmcia-modules
+Depends: kernel-image, nic-shared-modules, nic-modules
+Priority: standard
+Description: PCMCIA network interface support
+
+Package: nic-usb-modules
+Depends: kernel-image, nic-shared-modules, usb-modules
+Priority: standard
+Description: USB network interface support
+
+Package: nic-shared-modules
+Depends: kernel-image, crypto-modules
+Priority: standard
+Description: nic shared modules
+  This package contains modules which support nic modules
+
+Package: parport-modules
+Depends: kernel-image
+Priority: standard
+Description: Parallel port support
+
+Package: pata-modules
+Depends: kernel-image, storage-core-modules
+Priority: standard
+Description: PATA support modules
+
+Package: pcmcia-modules
+Depends: kernel-image
+Priority: standard
+Description: PCMCIA Modules
+
+Package: pcmcia-storage-modules
+Depends: kernel-image, scsi-modules
+Priority: standard
+Description: PCMCIA storage support
+
+Package: plip-modules
+Depends: kernel-image, nic-shared-modules, parport-modules
+Priority: standard
+Description: PLIP (parallel port) networking support
+
+Package: ppp-modules
+Depends: kernel-image, nic-shared-modules, serial-modules
+Priority: standard
+Description: PPP (serial port) networking support
+
+Package: sata-modules
+Depends: kernel-image, storage-core-modules
+Priority: standard
+Description: SATA storage support
+
+Package: scsi-modules
+Depends: kernel-image, storage-core-modules
+Priority: standard
+Description: SCSI storage support
+
+Package: serial-modules
+Depends: kernel-image
+Priority: standard
+Description: Serial port support
+
+Package: storage-core-modules
+Depends: kernel-image
+Priority: standard
+Provides: loop-modules
+Description: Core storage support
+ Includes core SCSI, LibATA, USB-Storage. Also includes related block
+ devices for CD, Disk and Tape medium (and IDE Floppy).
+
+Package: usb-modules
+Depends: kernel-image, storage-core-modules
+Priority: standard
+Description: Core USB support
+
+Package: nfs-modules
+Priority: standard
+Depends: kernel-image
+Description: NFS filesystem drivers
+ Includes the NFS client driver, and supporting modules.
+
+Package: block-modules
+Priority: standard
+Depends: kernel-image, storage-core-modules, parport-modules, virtio-modules
+Description: Block storage devices
+ This package contains the block storage devices, including DAC960 and
+ paraide.
+
+Package: message-modules
+Priority: standard
+Depends: kernel-image, storage-core-modules, scsi-modules
+Description: Fusion and i2o storage modules
+ This package containes the fusion and i2o storage modules.
+
+Package: crypto-modules
+Priority: extra
+Depends: kernel-image
+Description: crypto modules
+ This package contains crypto modules.
+
+Package: virtio-modules
+Priority: standard
+Depends: kernel-image
+Description: VirtIO Modules
+ Includes modules for VirtIO (virtual machine, generally kvm guests)
+
+Package: socket-modules
+Depends: kernel-image
+Priority: standard
+Description: Unix socket support
+
+Package: mouse-modules
+Depends: kernel-image, input-modules, usb-modules
+Priority: extra
+Description: Mouse support
+ This package contains mouse drivers for the Linux kernel.
+
+Package: squashfs-modules
+Depends: kernel-image
+Priority: extra
+Description: squashfs modules
+ This package contains squashfs modules.
+
+Package: vlan-modules
+Depends: kernel-image
+Priority: extra
+Description: vlan modules
+ This package contains vlan (8021.Q) modules.
+
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/exclude-modules.powerpc
+++ linux-mvl-dove-2.6.32/debian.master/d-i/exclude-modules.powerpc
@@ -0,0 +1,5 @@
+efi-modules
+fb-modules
+acpi-modules
+virtio-modules
+char-modules
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/kernel-versions.in
+++ linux-mvl-dove-2.6.32/debian.master/d-i/kernel-versions.in
@@ -0,0 +1,18 @@
+# arch	version		flavour		installedname			suffix	bdep
+amd64	PKGVER-ABINUM	generic		PKGVER-ABINUM-generic		-	
+
+i386	PKGVER-ABINUM	generic		PKGVER-ABINUM-generic		-	
+i386	PKGVER-ABINUM	generic-pae	PKGVER-ABINUM-generic-pae	-	
+
+lpia	PKGVER-ABINUM	lpia		PKGVER-ABINUM-lpia
+
+armel	PKGVER-ABINUM	versatile	PKGVER-ABINUM-versatile		-
+
+# Ports
+# arch	version		flavour		installedname			suffix	bdep
+ia64	PKGVER-ABINUM	ia64			PKGVER-ABINUM-ia64	-	
+
+powerpc	PKGVER-ABINUM	powerpc			PKGVER-ABINUM-powerpc		-	
+powerpc	PKGVER-ABINUM	powerpc64-smp		PKGVER-ABINUM-powerpc64-smp	-	
+
+sparc	PKGVER-ABINUM	sparc64			PKGVER-ABINUM-sparc64		-	
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/exclude-modules.armel
+++ linux-mvl-dove-2.6.32/debian.master/d-i/exclude-modules.armel
@@ -0,0 +1,20 @@
+crypto-modules
+fb-modules
+fs-core-modules
+fs-secondary-modules
+nic-modules
+nic-pcmcia-modules
+nic-usb-modules
+scsi-modules
+storage-core-modules
+nfs-modules
+pcmcia-modules
+parport-modules
+serial-modules
+plip-modules
+pcmcia-storage-modules
+mouse-modules
+irda-modules
+floppy-modules
+char-modules
+virtio-modules
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/exclude-modules.ia64
+++ linux-mvl-dove-2.6.32/debian.master/d-i/exclude-modules.ia64
@@ -0,0 +1,5 @@
+irda-modules
+floppy-modules
+fb-modules
+virtio-modules
+char-modules
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules-sparc/block-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules-sparc/block-modules
@@ -0,0 +1,9 @@
+aoe
+cciss
+comm
+cpqarray ?
+DAC960
+nbd
+sx8
+umem
+virtio_blk ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules-sparc/message-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules-sparc/message-modules
@@ -0,0 +1,13 @@
+mptbase
+mptctl
+mptfc
+mptlan
+mptsas
+mptscsih
+mptspi
+i2o_block
+i2o_bus
+i2o_config ?
+i2o_core
+i2o_proc
+i2o_scsi
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules-powerpc/scsi-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules-powerpc/scsi-modules
@@ -0,0 +1,116 @@
+# SCSI
+raid_class ?
+scsi_transport_spi ?
+scsi_transport_fc ?
+scsi_transport_iscsi ?
+scsi_transport_sas ?
+iscsi_tcp ?
+libiscsi ?
+amiga7xx ?
+a3000 ?
+a2091 ?
+gvp11 ?
+mvme147 ?
+sgiwd93 ?
+cyberstorm ?
+cyberstormII ?
+blz2060 ?
+blz1230 ?
+fastlane ?
+oktagon_esp_mod ?
+atari_scsi ?
+mac_scsi ?
+mac_esp ?
+sun3_scsi ?
+mvme16x ?
+bvme6000 ?
+sim710 ?
+advansys ?
+psi240i ?
+BusLogic ?
+dpt_i2o ?
+u14-34f ?
+ultrastor ?
+aha152x ?
+aha1542 ?
+aha1740 ?
+aic7xxx_old ?
+ips ?
+fd_mcs ?
+fdomain ?
+in2000 ?
+g_NCR5380 ?
+g_NCR5380_mmio ?
+NCR53c406a ?
+NCR_D700 ?
+NCR_Q720_mod ?
+sym53c416 ?
+qlogicfas408 ?
+qla1280 ?
+pas16 ?
+seagate ?
+seagate ?
+t128 ?
+dmx3191d ?
+dtc ?
+zalon7xx ?
+eata_pio ?
+wd7000 ?
+mca_53c9x ?
+ibmmca ?
+eata ?
+dc395x ?
+tmscsim ?
+megaraid ?
+atp870u ?
+esp ?
+gdth ?
+initio ?
+a100u2w ?
+qlogicpti ?
+ide-scsi ?
+mesh ?
+mac53c94 ?
+pluto ?
+dec_esp ?
+3w-xxxx ?
+3w-9xxx ?
+ppa ?
+imm ?
+jazz_esp ?
+sun3x_esp ?
+fcal ?
+lasi700 ?
+nsp32 ?
+ipr ?
+hptiop ?
+stex ?
+osst ?
+sg ?
+ch ?
+scsi_debug ?
+aacraid ?
+aic7xxx ?
+aic79xx ?
+aic94xx ?
+arcmsr ?
+acornscsi_mod ?
+arxescsi ?
+cumana_1 ?
+cumana_2 ?
+ecoscsi ?
+oak ?
+powertec ?
+eesox ?
+ibmvscsic ?
+libsas ?
+lpfc ?
+megaraid_mm ?
+megaraid_mbox ?
+megaraid_sas ?
+qla2xxx ?
+sym53c8xx ?
+qla4xxx ?
+mvsas ?
+sr_mod ?
+sd_mod ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules-powerpc/storage-core-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules-powerpc/storage-core-modules
@@ -0,0 +1,13 @@
+# Core stacks
+usb-storage ?
+
+# Block level
+
+# Loop modules
+cryptoloop
+
+# Needs to be here for better cdrom initrd layout
+isofs
+
+ps3stor_lib ?
+ps3rom ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules-powerpc/block-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules-powerpc/block-modules
@@ -0,0 +1,31 @@
+aoe
+aten
+bpck
+bpck6 ?
+cciss
+comm
+cpqarray ?
+DAC960
+dstr
+epat
+epia
+fit2
+fit3
+friq
+frpw
+kbic
+ktti
+nbd
+on20
+on26
+paride
+pcd
+pd
+pf
+pg
+ps3disk ?
+ps3vram ?
+pt
+sx8
+umem
+virtio_blk ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules-powerpc/message-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules-powerpc/message-modules
@@ -0,0 +1,13 @@
+mptbase
+mptctl
+mptfc
+mptlan
+mptsas
+mptscsih
+mptspi
+i2o_block
+i2o_bus
+i2o_config ?
+i2o_core
+i2o_proc
+i2o_scsi
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules-powerpc/nic-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules-powerpc/nic-modules
@@ -0,0 +1,152 @@
+3c359 ?
+3c501 ?
+3c503 ?
+3c505 ?
+3c507 ?
+3c509 ?
+3c515 ?
+3c523 ?
+3c527 ?
+3c59x ?
+8139cp ?
+8139too ?
+82596 ?
+abyss ?
+ac3200 ?
+adm8211 ?
+airo ?
+airport ?
+amd8111e ?
+arc4 ?
+arcnet ?
+arc-rawmode ?
+arc-rimi ?
+arlan ?
+at1700 ?
+atl1 ?
+atl1e ?
+atl2 ?
+atmel ?
+atmel_pci ?
+b44 ?
+bcm43xx ?
+bcm43xx-mac80211 ?
+bmac ?
+bnx2 ?
+bnx2x ?
+bonding ?
+cassini ?
+com20020 ?
+com20020-pci ?
+com90io ?
+com90xx ?
+cs89x0 ?
+de2104x ?
+de4x5 ?
+de600 ?
+de620 ?
+defxx ?
+depca ?
+dl2k ?
+dmfe ?
+dummy ?
+e100 ?
+e1000 ?
+e1000e ?
+e2100 ?
+eepro ?
+eepro100 ?
+eexpress ?
+epic100 ?
+eql ?
+es3210 ?
+eth16i ?
+ewrk3 ?
+fealnx ?
+forcedeth ?
+igb ?
+hamachi ?
+hermes ?
+hp ?
+hp100 ?
+hp-plus ?
+ibmtr ?
+ipddp ?
+ipw2100 ?
+ipw2200 ?
+ipw3945 ?
+ixgb ?
+lance ?
+lanstreamer ?
+lasi_82596 ?
+lne390 ?
+lp486e ?
+mace ?
+mv643xx_eth ?
+myri_sbus ?
+natsemi ?
+ne ?
+ne2 ?
+ne2k-pci ?
+ne3210 ?
+netconsole ?
+netxen_nic ?
+ni5010 ?
+ni52 ?
+ni65 ?
+niu ?
+ns83820 ?
+olympic ?
+orinoco ?
+orinoco_pci ?
+orinoco_plx ?
+orinoco_tmd ?
+pcnet32 ?
+prism54 ?
+ps3_gelic ?
+r8169 ?
+rate_control ?
+rfc1051 ?
+rfc1201 ?
+rrunner ?
+rt2400 ?
+rt2500 ?
+rt61pci ?
+s2io ?
+shaper ?
+sis190 ?
+sis900 ?
+spidernet ?
+skfp ?
+skge ?
+sk98lin ?
+sky2 ?
+smc9194 ?
+smc-ultra ?
+smc-ultra32 ?
+starfire ?
+strip ?
+sunbmac ?
+sundance ?
+sungem ?
+sungem_phy ?
+sunhme ?
+sunlance ?
+sunqe ?
+sunvnet ?
+tg3 ?
+tlan ?
+tms380tr ?
+tmspci ?
+tulip ?
+tun ?
+typhoon ?
+uli526x ?
+via-rhine ?
+via-velocity ?
+virtio_net ?
+wavelan ?
+wd ?
+winbond-840 ?
+yellowfin ?
+znet ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules/fb-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules/fb-modules
@@ -0,0 +1,3 @@
+fbcon ?
+vesafb ?
+vga16fb ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules/pata-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules/pata-modules
@@ -0,0 +1,46 @@
+pata_ali.ko ?
+pata_amd.ko ?
+pata_artop.ko ?
+pata_atiixp.ko ?
+pata_atp867x.ko ?
+pata_cmd640.ko ?
+pata_cmd64x.ko ?
+pata_cs5520.ko ?
+pata_cs5530.ko ?
+pata_cs5535.ko ?
+pata_cs5536.ko ?
+pata_cypress.ko ?
+pata_efar.ko ?
+pata_hpt366.ko ?
+pata_hpt37x.ko ?
+pata_hpt3x2n.ko ?
+pata_hpt3x3.ko ?
+pata_isapnp.ko ?
+pata_it8213.ko ?
+pata_it821x.ko ?
+pata_jmicron.ko ?
+pata_legacy.ko ?
+pata_marvell.ko ?
+pata_mpiix.ko ?
+pata_netcell.ko ?
+pata_ninja32.ko ?
+pata_ns87410.ko ?
+pata_ns87415.ko ?
+pata_oldpiix.ko ?
+pata_optidma.ko ?
+pata_opti.ko ?
+pata_pcmcia.ko ?
+pata_pdc2027x.ko ?
+pata_pdc202xx_old.ko ?
+pata_qdi.ko ?
+pata_radisys.ko ?
+pata_rdc.ko ?
+pata_rz1000.ko ?
+pata_sc1200.ko ?
+pata_sch.ko ?
+pata_serverworks.ko ?
+pata_sil680.ko ?
+pata_sl82c105.ko ?
+pata_triflex.ko ?
+pata_via.ko ?
+pata_winbond.ko ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules/nic-pcmcia-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules/nic-pcmcia-modules
@@ -0,0 +1,19 @@
+3c574_cs ?
+3c589_cs ?
+airo_cs ?
+atmel_cs ?
+axnet_cs ?
+com20020_cs ?
+fmvj18x_cs ?
+ibmtr_cs ?
+netwave_cs ?
+nmclan_cs ?
+orinoco_cs ?
+pcnet_cs ?
+ray_cs ?
+smc91c92_cs ?
+wavelan_cs ?
+wl3501_cs ?
+xirc2ps_cs ?
+xircom_cb ?
+xircom_tulip_cb ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules/sata-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules/sata-modules
@@ -0,0 +1,14 @@
+ahci.ko ?
+sata_inic162x.ko ?
+sata_mv.ko ?
+sata_nv.ko ?
+sata_promise.ko ?
+sata_qstor.ko ?
+sata_sil24.ko ?
+sata_sil.ko ?
+sata_sis.ko ?
+sata_svw.ko ?
+sata_sx4.ko ?
+sata_uli.ko ?
+sata_via.ko ?
+sata_vsc.ko ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules/usb-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules/usb-modules
@@ -0,0 +1,9 @@
+ehci-hcd ?
+isp116x-hcd ?
+isp1760 ?
+ohci-hcd ?
+r8a66597-hcd ?
+sl811_cs ?
+sl811-hcd ?
+u132-hcd ?
+uhci-hcd ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules/crypto-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules/crypto-modules
@@ -0,0 +1,8 @@
+aes_generic ?
+blowfish ?
+twofish ?
+serpent ?
+sha256_generic ?
+cbc ?
+ecb ?
+crc32c ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules/scsi-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules/scsi-modules
@@ -0,0 +1,118 @@
+# SCSI
+raid_class ?
+scsi_transport_spi ?
+scsi_transport_fc ?
+scsi_transport_iscsi ?
+scsi_transport_sas ?
+iscsi_tcp ?
+libiscsi ?
+amiga7xx ?
+a3000 ?
+a2091 ?
+gvp11 ?
+mvme147 ?
+sgiwd93 ?
+cyberstorm ?
+cyberstormII ?
+blz2060 ?
+blz1230 ?
+fastlane ?
+oktagon_esp_mod ?
+atari_scsi ?
+mac_scsi ?
+mac_esp ?
+sun3_scsi ?
+mvme16x ?
+bvme6000 ?
+sim710 ?
+advansys ?
+psi240i ?
+BusLogic ?
+dpt_i2o ?
+u14-34f ?
+ultrastor ?
+aha152x ?
+aha1542 ?
+aha1740 ?
+aic7xxx_old ?
+ips ?
+fd_mcs ?
+fdomain ?
+fnic ?
+in2000 ?
+g_NCR5380 ?
+g_NCR5380_mmio ?
+NCR53c406a ?
+NCR_D700 ?
+NCR_Q720_mod ?
+sym53c416 ?
+qlogicfas408 ?
+qla1280 ?
+pas16 ?
+seagate ?
+seagate ?
+t128 ?
+dmx3191d ?
+dtc ?
+zalon7xx ?
+eata_pio ?
+wd7000 ?
+mca_53c9x ?
+ibmmca ?
+eata ?
+dc395x ?
+tmscsim ?
+megaraid ?
+atp870u ?
+esp ?
+gdth ?
+initio ?
+a100u2w ?
+qlogicpti ?
+ide-scsi ?
+mesh ?
+mac53c94 ?
+pluto ?
+dec_esp ?
+3w-xxxx ?
+3w-9xxx ?
+ppa ?
+imm ?
+jazz_esp ?
+sun3x_esp ?
+fcal ?
+lasi700 ?
+nsp32 ?
+ipr ?
+hptiop ?
+stex ?
+osst ?
+sg ?
+ch ?
+scsi_debug ?
+aacraid ?
+aic7xxx ?
+aic79xx ?
+aic94xx ?
+arcmsr ?
+acornscsi_mod ?
+arxescsi ?
+cumana_1 ?
+cumana_2 ?
+ecoscsi ?
+oak ?
+powertec ?
+eesox ?
+ibmvscsic ?
+libsas ?
+lpfc ?
+megaraid_mm ?
+megaraid_mbox ?
+megaraid_sas ?
+qla2xxx ?
+sym53c8xx ?
+qla4xxx ?
+mvsas ?
+vmw_pvscsi ?
+ums-cypress ?
+be2iscsi ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules/fat-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules/fat-modules
@@ -0,0 +1,7 @@
+fat ?
+vfat ?
+
+# Supporting modules ?
+nls_cp437 ?
+nls_iso8859-1 ?
+nls_utf8 ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules/storage-core-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules/storage-core-modules
@@ -0,0 +1,10 @@
+# Core stacks
+usb-storage ?
+
+# Block level
+
+# Loop modules
+cryptoloop ?
+
+# Needs to be here for better cdrom initrd layout
+isofs ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules/pcmcia-storage-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules/pcmcia-storage-modules
@@ -0,0 +1,6 @@
+pata_pcmcia ?
+qlogic_cs ?
+fdomain_cs ?
+aha152x_cs ?
+nsp_cs ?
+sym53c500_cs ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules/firewire-core-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules/firewire-core-modules
@@ -0,0 +1,4 @@
+ieee1394 ?
+ohci1394 ?
+sbp2 ?
+eth1394 ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules/irda-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules/irda-modules
@@ -0,0 +1,30 @@
+act200l-sir ?
+actisys-sir ?
+ali-ircc ?
+donauboe ?
+esi-sir ?
+girbil-sir ?
+ircomm ?
+ircomm-tty ?
+irda ?
+irda-usb ?
+irlan ?
+irnet ?
+irport ?
+irtty-sir ?
+kingsun-sir ?
+ks959-sir ?
+ksdazzle-sir ?
+litelink-sir ?
+ma600-sir ?
+mcp2120-sir ?
+mcs7780 ?
+nsc-ircc ?
+old_belkin-sir ?
+sir-dev ?
+smsc-ircc2 ?
+stir4200 ?
+tekram-sir ?
+via-ircc ?
+vlsi_ir ?
+w83977af_ir ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules/vlan-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules/vlan-modules
@@ -0,0 +1,3 @@
+slp ?
+garp ?
+8021q ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules/block-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules/block-modules
@@ -0,0 +1,30 @@
+aoe ?
+aten ?
+bpck ?
+bpck6 ?
+cciss ?
+comm ?
+cpqarray ?
+DAC960
+dstr ?
+epat ?
+epia ?
+fit2 ?
+fit3 ?
+friq ?
+frpw ?
+kbic ?
+ktti ?
+nbd ?
+on20 ?
+on26 ?
+paride ?
+pcd ?
+pd ?
+pf ?
+pg ?
+pt ?
+sx8 ?
+umem ?
+virtio_blk ?
+xen-blkfront ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules/mouse-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules/mouse-modules
@@ -0,0 +1,2 @@
+psmouse ?
+usbmouse ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules/floppy-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules/floppy-modules
@@ -0,0 +1 @@
+floppy ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules/plip-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules/plip-modules
@@ -0,0 +1 @@
+plip ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules/ppp-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules/ppp-modules
@@ -0,0 +1,6 @@
+ppp_async ?
+ppp_deflate ?
+ppp_mppe ?
+pppoe ?
+pppox ?
+ppp_synctty ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules/fs-core-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules/fs-core-modules
@@ -0,0 +1,3 @@
+jfs ?
+reiserfs ?
+xfs ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules/char-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules/char-modules
@@ -0,0 +1 @@
+intel-agp ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules/input-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules/input-modules
@@ -0,0 +1,21 @@
+hid-a4tech ?
+hid-apple ?
+hid-belkin ?
+hid-bright ?
+hid-cherry ?
+hid-chicony ?
+hid-cypress ?
+hid-dell ?
+hid-ezkey ?
+hid-gyration ?
+hid-logitech ?
+hid-microsoft ?
+hid-monterey ?
+hid-petalynx ?
+hid-pl ?
+hid-samsung ?
+hid-sony ?
+hid-sunplus ?
+hid-tmff ?
+hid-zpff ?
+usbhid ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules/message-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules/message-modules
@@ -0,0 +1,14 @@
+mptbase ?
+mptctl ?
+mptfc ?
+mptlan ?
+mptsas ?
+mpt2sas ?
+mptscsih ?
+mptspi ?
+i2o_block ?
+i2o_bus ?
+i2o_config ?
+i2o_core ?
+i2o_proc ?
+i2o_scsi ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules/squashfs-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules/squashfs-modules
@@ -0,0 +1 @@
+squashfs ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules/serial-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules/serial-modules
@@ -0,0 +1,3 @@
+generic_serial ?
+serial_cs ?
+synclink_cs ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules/nic-usb-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules/nic-usb-modules
@@ -0,0 +1,13 @@
+catc ?
+kaweth ?
+pegasus ?
+prism2_usb ?
+rtl8150 ?
+usbnet ?
+zd1211rw ?
+zd1201 ?
+rt2500usb ?
+rt73usb ?
+rt2570 ?
+cdc_ether ?
+asix ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules/nfs-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules/nfs-modules
@@ -0,0 +1,4 @@
+nfs ?
+nfs_acl ?
+lockd ?
+sunrpc ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules/virtio-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules/virtio-modules
@@ -0,0 +1,4 @@
+virtio_balloon ?
+virtio_pci ?
+virtio_ring ?
+virtio-rng ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules/md-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules/md-modules
@@ -0,0 +1,13 @@
+dm-crypt ?
+dm-zero ?
+faulty ?
+linear ?
+multipath ?
+raid0 ?
+raid1 ?
+raid10 ?
+raid456 ?
+
+# Extras
+dm-raid4-5 ?
+dm-loop ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules/nic-shared-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules/nic-shared-modules
@@ -0,0 +1,22 @@
+# PHY
+8390 ?
+mii ?
+
+# CRC modules
+crc-ccitt ?
+crc-itu-t ?
+libcrc32c ?
+
+# mac80211 stuff
+mac80211 ?
+cfg80211 ?
+
+# rt2x00 lib (since rt2x00 is split across usb/pci/cb
+rt2x00lib ?
+
+# Wireless 802.11 modules
+lib80211 ?
+cfg80211 ?
+lib80211_crypt_ccmp ?
+lib80211_crypt_tkip ?
+lib80211_crypt_wep ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules/nic-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules/nic-modules
@@ -0,0 +1,157 @@
+3c359 ?
+3c501 ?
+3c503 ?
+3c505 ?
+3c507 ?
+3c509 ?
+3c515 ?
+3c523 ?
+3c527 ?
+3c59x ?
+8139cp ?
+8139too ?
+82596 ?
+abyss ?
+ac3200 ?
+adm8211 ?
+airo ?
+airport ?
+amd8111e ?
+arc4 ?
+arcnet ?
+arc-rawmode ?
+arc-rimi ?
+arlan ?
+at1700 ?
+atl1 ?
+atl1c ?
+atl1e ?
+atl2 ?
+atmel ?
+atmel_pci ?
+b44 ?
+bcm43xx ?
+bcm43xx-mac80211 ?
+be2net ?
+bmac ?
+bnx2 ?
+bnx2x ?
+bonding ?
+cassini ?
+com20020 ?
+com20020-pci ?
+com90io ?
+com90xx ?
+cs89x0 ?
+de2104x ?
+de4x5 ?
+de600 ?
+de620 ?
+defxx ?
+depca ?
+dl2k ?
+dmfe ?
+dummy ?
+e100 ?
+e1000 ?
+e1000e ?
+e2100 ?
+eepro ?
+eepro100 ?
+eexpress ?
+enic ?
+epic100 ?
+eql ?
+es3210 ?
+eth16i ?
+ewrk3 ?
+fealnx ?
+forcedeth ?
+igb ?
+ps3_gelic ?
+hamachi ?
+hermes ?
+hp ?
+hp100 ?
+hp-plus ?
+ibmtr ?
+ipddp ?
+ipw2100 ?
+ipw2200 ?
+ipw3945 ?
+ixgb ?
+lance ?
+lanstreamer ?
+lasi_82596 ?
+lne390 ?
+lp486e ?
+mace ?
+mv643xx_eth ?
+myri_sbus ?
+natsemi ?
+ne ?
+ne2 ?
+ne2k-pci ?
+ne3210 ?
+netconsole ?
+netxen_nic ?
+ni5010 ?
+ni52 ?
+ni65 ?
+niu ?
+ns83820 ?
+olympic ?
+orinoco ?
+orinoco_pci ?
+orinoco_plx ?
+orinoco_tmd ?
+pcnet32 ?
+prism54 ?
+r8169 ?
+rate_control ?
+rfc1051 ?
+rfc1201 ?
+rrunner ?
+rt2400 ?
+rt2500 ?
+rt61pci ?
+s2io ?
+shaper ?
+sis190 ?
+sis900 ?
+spidernet ?
+skfp ?
+skge ?
+sk98lin ?
+sky2 ?
+smc9194 ?
+smc-ultra ?
+smc-ultra32 ?
+starfire ?
+strip ?
+sunbmac ?
+sundance ?
+sungem ?
+sungem_phy ?
+sunhme ?
+sunlance ?
+sunqe ?
+sunvnet ?
+tg3 ?
+tlan ?
+tms380tr ?
+tmspci ?
+tulip ?
+tun ?
+typhoon ?
+uli526x ?
+via-rhine ?
+via-velocity ?
+virtio_net ?
+wavelan ?
+wd ?
+winbond-840 ?
+yellowfin ?
+znet ?
+vmxnet3 ?
+xen-netfront ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules/pcmcia-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules/pcmcia-modules
@@ -0,0 +1,8 @@
+i82092 ?
+i82365 ?
+pcmcia ?
+pcmcia_core ?
+pd6729 ?
+rsrc_nonstatic ?
+tcic ?
+yenta_socket ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules/parport-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules/parport-modules
@@ -0,0 +1,2 @@
+parport ?
+parport_pc ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/modules/fs-secondary-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/modules/fs-secondary-modules
@@ -0,0 +1,4 @@
+fuse ?
+ntfs ?
+hfs ?
+hfsplus ?
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/firmware/scsi-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/firmware/scsi-modules
@@ -0,0 +1,3 @@
+qlogic/1040.bin
+qlogic/12160.bin
+qlogic/1280.bin
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/firmware/README.txt
+++ linux-mvl-dove-2.6.32/debian.master/d-i/firmware/README.txt
@@ -0,0 +1,4 @@
+#
+# Place the names of udeb modules into this directory that require
+# runtime firmware.
+#
--- linux-mvl-dove-2.6.32.orig/debian.master/d-i/firmware/nic-modules
+++ linux-mvl-dove-2.6.32/debian.master/d-i/firmware/nic-modules
@@ -0,0 +1,10 @@
+bnx2/bnx2-mips-06-5.0.0.j3.fw ?
+bnx2/bnx2-rv2p-06-5.0.0.j3.fw ?
+bnx2/bnx2-mips-09-5.0.0.j3.fw ?
+bnx2/bnx2-rv2p-09ax-5.0.0.j3.fw ?
+bnx2/bnx2-rv2p-09-5.0.0.j3.fw ?
+bnx2x-e1-5.0.21.0.fw ?
+bnx2x-e1h-5.0.21.0.fw ?
+e100/d101m_ucode.bin
+e100/d101s_ucode.bin
+e100/d102e_ucode.bin
--- linux-mvl-dove-2.6.32.orig/debian.master/rules.d/i386.mk
+++ linux-mvl-dove-2.6.32/debian.master/rules.d/i386.mk
@@ -0,0 +1,12 @@
+build_arch	= i386
+header_arch	= x86_64
+asm_link	= x86
+defconfig	= defconfig
+flavours        = generic generic-pae 386
+build_image	= bzImage
+kernel_file	= arch/$(build_arch)/boot/bzImage
+install_file	= vmlinuz
+
+generic-pae_sub	= virtual
+
+loader		= grub
--- linux-mvl-dove-2.6.32.orig/debian.master/rules.d/ia64.mk
+++ linux-mvl-dove-2.6.32/debian.master/rules.d/ia64.mk
@@ -0,0 +1,21 @@
+build_arch	= ia64
+header_arch	= $(build_arch)
+asm_link	= $(build_arch)
+defconfig	= defconfig
+flavours	= ia64
+build_image	= vmlinux
+kernel_file	= $(build_image)
+install_file	= vmlinuz
+compress_file	= yes
+
+loader		= elilo
+
+skipdbg		= true
+no_dumpfile	= true
+skipabi		= true
+skipmodule	= true
+
+# XXX: ia64 libelf-dev/binutils-dev dependancy does not supply libraries?!?
+do_tools	= false
+
+family=ports
--- linux-mvl-dove-2.6.32.orig/debian.master/rules.d/lpia.mk
+++ linux-mvl-dove-2.6.32/debian.master/rules.d/lpia.mk
@@ -0,0 +1,10 @@
+build_arch	= i386
+header_arch	= i386
+asm_link	= x86
+defconfig	= defconfig
+flavours        = lpia
+build_image	= bzImage
+kernel_file	= arch/$(build_arch)/boot/bzImage
+install_file	= vmlinuz
+do_debug_image	= true
+loader		= grub
--- linux-mvl-dove-2.6.32.orig/debian.master/rules.d/powerpc.mk
+++ linux-mvl-dove-2.6.32/debian.master/rules.d/powerpc.mk
@@ -0,0 +1,19 @@
+build_arch	= powerpc
+header_arch	= $(build_arch)
+asm_link	= $(build_arch)
+defconfig	= pmac32_defconfig
+flavours	= powerpc powerpc-smp powerpc64-smp
+build_image	= vmlinux
+kernel_file	= $(build_image)
+install_file	= $(build_image)
+
+loader		= yaboot
+
+custom_flavours	=
+
+no_dumpfile = true
+skipdbg		= true
+skipabi		= true
+skipmodule	= true
+
+family=ports
--- linux-mvl-dove-2.6.32.orig/debian.master/rules.d/armel.mk
+++ linux-mvl-dove-2.6.32/debian.master/rules.d/armel.mk
@@ -0,0 +1,13 @@
+build_arch	= arm
+header_arch	= arm
+asm_link	= arm
+defconfig	= defconfig
+flavours	= versatile
+build_image	= zImage
+kernel_file	= arch/$(build_arch)/boot/zImage
+install_file	= vmlinuz
+no_dumpfile = true
+# ARM is not a supported architecture in perf userspace
+do_tools	= false
+
+loader		= grub
--- linux-mvl-dove-2.6.32.orig/debian.master/rules.d/sparc.mk
+++ linux-mvl-dove-2.6.32/debian.master/rules.d/sparc.mk
@@ -0,0 +1,18 @@
+build_arch	= sparc64
+header_arch	= $(build_arch)
+asm_link	= $(build_arch)
+defconfig	= defconfig
+flavours	= sparc64 sparc64-smp
+build_image	= image
+kernel_file     = arch/sparc/boot/image
+install_file	= vmlinuz
+compress_file	= Yes
+
+loader		= silo
+
+skipdbg		= true
+no_dumpfile	= true
+skipabi		= true
+skipmodule	= true
+
+family=ports
--- linux-mvl-dove-2.6.32.orig/debian.master/rules.d/amd64.mk
+++ linux-mvl-dove-2.6.32/debian.master/rules.d/amd64.mk
@@ -0,0 +1,12 @@
+build_arch	= x86_64
+header_arch	= $(build_arch)
+asm_link	= x86
+defconfig	= defconfig
+flavours	= generic server preempt
+build_image	= bzImage
+kernel_file	= arch/$(build_arch)/boot/bzImage
+install_file	= vmlinuz
+
+server_sub	= virtual
+
+loader		= grub
--- linux-mvl-dove-2.6.32.orig/debian.master/config/config.common.ubuntu
+++ linux-mvl-dove-2.6.32/debian.master/config/config.common.ubuntu
@@ -0,0 +1,4565 @@
+#
+# Common config options automatically generated by splitconfig.pl
+#
+CONFIG_3C359=m
+CONFIG_3C515=m
+# CONFIG_4KSTACKS is not set
+CONFIG_60XX_WDT=m
+CONFIG_6PACK=m
+CONFIG_8139CP=m
+CONFIG_8139TOO=m
+CONFIG_8139TOO_8129=y
+CONFIG_8139TOO_PIO=y
+# CONFIG_8139TOO_TUNE_TWISTER is not set
+# CONFIG_8139_OLD_RX_RESET is not set
+CONFIG_9P_FS=m
+# CONFIG_9P_FSCACHE is not set
+CONFIG_AB3100_CORE=m
+CONFIG_AB3100_OTP=m
+CONFIG_ABYSS=m
+CONFIG_AC3200=m
+CONFIG_AC97_BUS=m
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_ACENIC=m
+# CONFIG_ACENIC_OMIT_TIGON_I is not set
+CONFIG_ACERHDF=m
+CONFIG_ACER_WMI=m
+CONFIG_ACORN_PARTITION=y
+# CONFIG_ACORN_PARTITION_ADFS is not set
+# CONFIG_ACORN_PARTITION_CUMANA is not set
+# CONFIG_ACORN_PARTITION_EESOX is not set
+CONFIG_ACORN_PARTITION_ICS=y
+# CONFIG_ACORN_PARTITION_POWERTEC is not set
+CONFIG_ACORN_PARTITION_RISCIX=y
+CONFIG_ACPI=y
+CONFIG_ACPI_AC=y
+# CONFIG_ACPI_ASUS is not set
+CONFIG_ACPI_BATTERY=y
+CONFIG_ACPI_BUTTON=y
+CONFIG_ACPI_CONTAINER=y
+# CONFIG_ACPI_CUSTOM_DSDT is not set
+CONFIG_ACPI_CUSTOM_DSDT_FILE=""
+# CONFIG_ACPI_DEBUG is not set
+CONFIG_ACPI_DOCK=y
+CONFIG_ACPI_FAN=y
+CONFIG_ACPI_HOTPLUG_CPU=y
+CONFIG_ACPI_HOTPLUG_MEMORY=m
+CONFIG_ACPI_NUMA=y
+CONFIG_ACPI_PCI_SLOT=y
+CONFIG_ACPI_POWER_METER=m
+CONFIG_ACPI_PROCESSOR=y
+CONFIG_ACPI_PROCESSOR_AGGREGATOR=m
+CONFIG_ACPI_PROCFS=y
+CONFIG_ACPI_PROCFS_POWER=y
+CONFIG_ACPI_PROC_EVENT=y
+CONFIG_ACPI_SBS=y
+CONFIG_ACPI_SLEEP=y
+CONFIG_ACPI_SYSFS_POWER=y
+CONFIG_ACPI_THERMAL=y
+CONFIG_ACPI_TOSHIBA=m
+CONFIG_ACPI_VIDEO=m
+CONFIG_ACPI_WMI=y
+CONFIG_ACQUIRE_WDT=m
+CONFIG_ACT200L_DONGLE=m
+CONFIG_ACTISYS_DONGLE=m
+CONFIG_ADAPTEC_STARFIRE=m
+CONFIG_ADFS_FS=m
+# CONFIG_ADFS_FS_RW is not set
+CONFIG_ADM8211=m
+CONFIG_ADVANTECH_WDT=m
+CONFIG_AEABI=y
+CONFIG_AFFS_FS=m
+# CONFIG_AFS_DEBUG is not set
+CONFIG_AFS_FS=m
+# CONFIG_AFS_FSCACHE is not set
+CONFIG_AF_RXRPC=m
+# CONFIG_AF_RXRPC_DEBUG is not set
+CONFIG_AGP_ALI=m
+CONFIG_AGP_AMD=m
+CONFIG_AGP_ATI=m
+CONFIG_AGP_EFFICEON=m
+CONFIG_AGP_INTEL=m
+CONFIG_AGP_NVIDIA=m
+CONFIG_AGP_SIS=m
+CONFIG_AGP_SWORKS=m
+CONFIG_AGP_VIA=m
+CONFIG_AIC79XX_CMDS_PER_DEVICE=32
+CONFIG_AIC79XX_DEBUG_ENABLE=y
+CONFIG_AIC79XX_DEBUG_MASK=0
+CONFIG_AIC79XX_REG_PRETTY_PRINT=y
+CONFIG_AIC79XX_RESET_DELAY_MS=5000
+CONFIG_AIC7XXX_CMDS_PER_DEVICE=8
+CONFIG_AIC7XXX_DEBUG_ENABLE=y
+CONFIG_AIC7XXX_DEBUG_MASK=0
+CONFIG_AIC7XXX_REG_PRETTY_PRINT=y
+CONFIG_AIC7XXX_RESET_DELAY_MS=15000
+# CONFIG_AIC94XX_DEBUG is not set
+CONFIG_AIO=y
+CONFIG_AIRO=m
+CONFIG_AIRO_CS=m
+CONFIG_ALIGNMENT_TRAP=y
+CONFIG_ALIM1535_WDT=m
+CONFIG_ALIM7101_WDT=m
+CONFIG_ALI_FIR=m
+CONFIG_ALTERA_PCIE_CHDMA=m
+CONFIG_AMD8111_ETH=m
+CONFIG_AMD_IOMMU=y
+CONFIG_AMD_IOMMU_STATS=y
+CONFIG_AMIGA_PARTITION=y
+CONFIG_ANON_INODES=y
+CONFIG_APM=m
+# CONFIG_APM_ALLOW_INTS is not set
+# CONFIG_APM_CPU_IDLE is not set
+# CONFIG_APM_DISPLAY_BLANK is not set
+# CONFIG_APM_DO_ENABLE is not set
+CONFIG_APM_EMULATION=m
+# CONFIG_APM_IGNORE_USER_SUSPEND is not set
+CONFIG_APM_POWER=m
+CONFIG_APPLICOM=m
+CONFIG_APRICOT=m
+CONFIG_AR9170_LEDS=y
+CONFIG_AR9170_USB=m
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_CLPS711X is not set
+CONFIG_ARCH_CPU_PROBE_RELEASE=y
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_EBSA110 is not set
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
+# CONFIG_ARCH_EP93XX is not set
+CONFIG_ARCH_FLATMEM_ENABLE=y
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_H720X is not set
+CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
+CONFIG_ARCH_HAS_CPU_RELAX=y
+CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HIBERNATION_HEADER=y
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_LOKI is not set
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_ARCH_MEMORY_PROBE=y
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_PNX4008 is not set
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_ARCH_PROC_KCORE_TEXT=y
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5PC1XX is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_SHARK is not set
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+# CONFIG_ARCH_STMP3XXX is not set
+CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
+CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y
+CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_ARCH_U300 is not set
+CONFIG_ARCH_USES_PG_UNCACHED=y
+CONFIG_ARCH_VERSATILE=y
+CONFIG_ARCH_VERSATILE_PB=y
+# CONFIG_ARCH_W90X900 is not set
+CONFIG_ARCH_WANT_FRAME_POINTERS=y
+CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
+CONFIG_ARCNET=m
+CONFIG_ARCNET_1051=m
+CONFIG_ARCNET_1201=m
+CONFIG_ARCNET_CAP=m
+CONFIG_ARCNET_COM20020=m
+CONFIG_ARCNET_COM20020_CS=m
+CONFIG_ARCNET_COM20020_ISA=m
+CONFIG_ARCNET_COM20020_PCI=m
+CONFIG_ARCNET_COM90xx=m
+CONFIG_ARCNET_COM90xxIO=m
+CONFIG_ARCNET_RAW=m
+CONFIG_ARCNET_RIM_I=m
+CONFIG_ARLAN=m
+CONFIG_ARM=y
+CONFIG_ARM_AMBA=y
+# CONFIG_ARM_ERRATA_430973 is not set
+# CONFIG_ARM_ERRATA_458693 is not set
+# CONFIG_ARM_ERRATA_460075 is not set
+CONFIG_ARM_L1_CACHE_SHIFT=5
+CONFIG_ARM_THUMB=y
+# CONFIG_ARM_THUMBEE is not set
+CONFIG_ARM_UNWIND=y
+CONFIG_ARM_VIC=y
+CONFIG_ARM_VIC_NR=2
+# CONFIG_ARPD is not set
+CONFIG_ASK_IP_FIB_HASH=y
+CONFIG_ASUS_LAPTOP=m
+CONFIG_ASUS_OLED=m
+CONFIG_ASYNC_CORE=m
+CONFIG_ASYNC_MEMCPY=m
+CONFIG_ASYNC_PQ=m
+CONFIG_ASYNC_RAID6_RECOV=m
+CONFIG_ASYNC_RAID6_TEST=m
+CONFIG_ASYNC_TX_DISABLE_CHANNEL_SWITCH=y
+CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA=y
+CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA=y
+CONFIG_ASYNC_XOR=m
+CONFIG_AT1700=m
+CONFIG_AT76C50X_USB=m
+CONFIG_ATA=y
+CONFIG_ATAGS_PROC=y
+CONFIG_ATARI_PARTITION=y
+CONFIG_ATA_ACPI=y
+CONFIG_ATA_GENERIC=y
+# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_ATA_OVER_ETH=m
+CONFIG_ATA_PIIX=y
+CONFIG_ATA_SFF=y
+CONFIG_ATA_VERBOSE_ERROR=y
+CONFIG_ATH5K=m
+# CONFIG_ATH5K_DEBUG is not set
+CONFIG_ATH9K=m
+CONFIG_ATH9K_DEBUG=y
+CONFIG_ATH_COMMON=m
+CONFIG_ATL1=m
+CONFIG_ATL1C=m
+CONFIG_ATL1E=m
+CONFIG_ATL2=m
+CONFIG_ATMEL=m
+CONFIG_ATM_AMBASSADOR=m
+# CONFIG_ATM_AMBASSADOR_DEBUG is not set
+CONFIG_ATM_BR2684=m
+# CONFIG_ATM_BR2684_IPFILTER is not set
+CONFIG_ATM_CLIP=m
+# CONFIG_ATM_CLIP_NO_ICMP is not set
+CONFIG_ATM_DRIVERS=y
+# CONFIG_ATM_DUMMY is not set
+CONFIG_ATM_ENI=m
+# CONFIG_ATM_ENI_DEBUG is not set
+# CONFIG_ATM_ENI_TUNE_BURST is not set
+CONFIG_ATM_FIRESTREAM=m
+CONFIG_ATM_FORE200E=m
+CONFIG_ATM_FORE200E_DEBUG=0
+CONFIG_ATM_FORE200E_TX_RETRY=16
+# CONFIG_ATM_FORE200E_USE_TASKLET is not set
+CONFIG_ATM_HE=m
+CONFIG_ATM_HE_USE_SUNI=y
+CONFIG_ATM_HORIZON=m
+# CONFIG_ATM_HORIZON_DEBUG is not set
+CONFIG_ATM_IA=m
+# CONFIG_ATM_IA_DEBUG is not set
+CONFIG_ATM_IDT77252=m
+# CONFIG_ATM_IDT77252_DEBUG is not set
+# CONFIG_ATM_IDT77252_RCV_ALL is not set
+CONFIG_ATM_IDT77252_USE_SUNI=y
+CONFIG_ATM_LANAI=m
+CONFIG_ATM_LANE=m
+CONFIG_ATM_MPOA=m
+CONFIG_ATM_NICSTAR=m
+# CONFIG_ATM_NICSTAR_USE_IDT77105 is not set
+# CONFIG_ATM_NICSTAR_USE_SUNI is not set
+CONFIG_ATM_SOLOS=m
+CONFIG_ATM_TCP=m
+CONFIG_ATM_ZATM=m
+# CONFIG_ATM_ZATM_DEBUG is not set
+CONFIG_ATP=m
+CONFIG_AUDIT=y
+CONFIG_AUDITSYSCALL=y
+CONFIG_AUDIT_GENERIC=y
+CONFIG_AUDIT_TREE=y
+CONFIG_AUFS_BDEV_LOOP=y
+# CONFIG_AUFS_BRANCH_MAX_1023 is not set
+CONFIG_AUFS_BRANCH_MAX_127=y
+# CONFIG_AUFS_BRANCH_MAX_32767 is not set
+# CONFIG_AUFS_BRANCH_MAX_511 is not set
+CONFIG_AUFS_BR_FUSE=y
+CONFIG_AUFS_BR_RAMFS=y
+# CONFIG_AUFS_DEBUG is not set
+# CONFIG_AUFS_EXPORT is not set
+CONFIG_AUFS_FS=m
+CONFIG_AUFS_HINOTIFY=y
+CONFIG_AUFS_POLL=y
+# CONFIG_AUFS_RDU is not set
+# CONFIG_AUFS_SHWH is not set
+CONFIG_AUTOFS4_FS=m
+CONFIG_AUTOFS_FS=m
+CONFIG_AUXDISPLAY=y
+CONFIG_AVERATEC_5100P=m
+CONFIG_AX25=m
+CONFIG_AX25_DAMA_SLAVE=y
+CONFIG_AX88796=m
+# CONFIG_AX88796_93CX6 is not set
+CONFIG_B3DFG=m
+CONFIG_B43LEGACY_DEBUG=y
+CONFIG_B43LEGACY_DMA=y
+CONFIG_B43LEGACY_DMA_AND_PIO_MODE=y
+# CONFIG_B43LEGACY_DMA_MODE is not set
+CONFIG_B43LEGACY_HWRNG=y
+CONFIG_B43LEGACY_LEDS=y
+CONFIG_B43LEGACY_PCICORE_AUTOSELECT=y
+CONFIG_B43LEGACY_PCI_AUTOSELECT=y
+CONFIG_B43LEGACY_PIO=y
+# CONFIG_B43LEGACY_PIO_MODE is not set
+# CONFIG_B43_DEBUG is not set
+CONFIG_B43_HWRNG=y
+CONFIG_B43_LEDS=y
+CONFIG_B43_PCICORE_AUTOSELECT=y
+CONFIG_B43_PCI_AUTOSELECT=y
+# CONFIG_B43_PCMCIA is not set
+CONFIG_B43_PHY_LP=y
+CONFIG_B43_PIO=y
+# CONFIG_B43_SDIO is not set
+CONFIG_B44_PCI=y
+CONFIG_B44_PCICORE_AUTOSELECT=y
+CONFIG_B44_PCI_AUTOSELECT=y
+CONFIG_BACKLIGHT_CARILLO_RANCH=m
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_DA903X=m
+CONFIG_BACKLIGHT_GENERIC=m
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_BACKLIGHT_MBP_NVIDIA=m
+CONFIG_BACKLIGHT_PROGEAR=m
+CONFIG_BACKLIGHT_SAHARA=m
+CONFIG_BACKLIGHT_WM831X=m
+# CONFIG_BACKTRACE_SELF_TEST is not set
+CONFIG_BASE_FULL=y
+CONFIG_BASE_SMALL=0
+CONFIG_BATTERY_BQ27x00=m
+CONFIG_BATTERY_DA9030=m
+CONFIG_BATTERY_DS2760=m
+CONFIG_BATTERY_DS2782=m
+CONFIG_BATTERY_MAX17040=m
+CONFIG_BATTERY_OLPC=m
+CONFIG_BAYCOM_EPP=m
+CONFIG_BAYCOM_PAR=m
+CONFIG_BAYCOM_SER_FDX=m
+CONFIG_BAYCOM_SER_HDX=m
+CONFIG_BE2ISCSI=m
+CONFIG_BE2NET=m
+# CONFIG_BEFS_DEBUG is not set
+CONFIG_BEFS_FS=m
+CONFIG_BFS_FS=m
+CONFIG_BINARY_PRINTF=y
+CONFIG_BINFMT_AOUT=m
+CONFIG_BINFMT_ELF=y
+CONFIG_BINFMT_MISC=m
+CONFIG_BITREVERSE=y
+CONFIG_BLK_CPQ_CISS_DA=m
+CONFIG_BLK_CPQ_DA=m
+CONFIG_BLK_DEV=y
+CONFIG_BLK_DEV_3W_XXXX_RAID=m
+CONFIG_BLK_DEV_BSG=y
+CONFIG_BLK_DEV_COMPCACHE=m
+# CONFIG_BLK_DEV_COMPCACHE_DEBUG is not set
+# CONFIG_BLK_DEV_COMPCACHE_STATS is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_CRYPTOLOOP=m
+CONFIG_BLK_DEV_DAC960=m
+CONFIG_BLK_DEV_DM=y
+CONFIG_BLK_DEV_FD=m
+# CONFIG_BLK_DEV_HD is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_BLK_DEV_INTEGRITY=y
+CONFIG_BLK_DEV_IO_TRACE=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_MD=y
+CONFIG_BLK_DEV_NBD=m
+CONFIG_BLK_DEV_OSD=m
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=65536
+CONFIG_BLK_DEV_SD=y
+CONFIG_BLK_DEV_SR=y
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+CONFIG_BLK_DEV_SX8=m
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_UMEM=m
+# CONFIG_BLK_DEV_XD is not set
+# CONFIG_BLK_DEV_XIP is not set
+CONFIG_BLOCK=y
+CONFIG_BLOCK_COMPAT=y
+CONFIG_BNX2=m
+CONFIG_BNX2X=m
+CONFIG_BONDING=m
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_BOOT_PRINTK_DELAY=y
+# CONFIG_BOOT_TRACER is not set
+CONFIG_BOUNCE=y
+CONFIG_BPQETHER=m
+CONFIG_BRANCH_PROFILE_NONE=y
+CONFIG_BRIDGE=m
+CONFIG_BRIDGE_EBT_802_3=m
+CONFIG_BRIDGE_EBT_AMONG=m
+CONFIG_BRIDGE_EBT_ARP=m
+CONFIG_BRIDGE_EBT_ARPREPLY=m
+CONFIG_BRIDGE_EBT_BROUTE=m
+CONFIG_BRIDGE_EBT_DNAT=m
+CONFIG_BRIDGE_EBT_IP=m
+CONFIG_BRIDGE_EBT_IP6=m
+CONFIG_BRIDGE_EBT_LIMIT=m
+CONFIG_BRIDGE_EBT_LOG=m
+CONFIG_BRIDGE_EBT_MARK=m
+CONFIG_BRIDGE_EBT_MARK_T=m
+CONFIG_BRIDGE_EBT_NFLOG=m
+CONFIG_BRIDGE_EBT_PKTTYPE=m
+CONFIG_BRIDGE_EBT_REDIRECT=m
+CONFIG_BRIDGE_EBT_SNAT=m
+CONFIG_BRIDGE_EBT_STP=m
+CONFIG_BRIDGE_EBT_T_FILTER=m
+CONFIG_BRIDGE_EBT_T_NAT=m
+CONFIG_BRIDGE_EBT_ULOG=m
+CONFIG_BRIDGE_EBT_VLAN=m
+CONFIG_BRIDGE_NETFILTER=y
+CONFIG_BRIDGE_NF_EBTABLES=m
+CONFIG_BROADCOM_PHY=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_BSD_DISKLABEL=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+CONFIG_BTRFS_FS=m
+CONFIG_BTRFS_FS_POSIX_ACL=y
+CONFIG_BT_BNEP=m
+CONFIG_BT_BNEP_MC_FILTER=y
+CONFIG_BT_BNEP_PROTO_FILTER=y
+CONFIG_BT_CMTP=m
+CONFIG_BT_HCIBCM203X=m
+CONFIG_BT_HCIBFUSB=m
+CONFIG_BT_HCIBLUECARD=m
+CONFIG_BT_HCIBPA10X=m
+CONFIG_BT_HCIBT3C=m
+CONFIG_BT_HCIBTSDIO=m
+CONFIG_BT_HCIBTUART=m
+CONFIG_BT_HCIBTUSB=m
+CONFIG_BT_HCIDTL1=m
+CONFIG_BT_HCIUART=m
+CONFIG_BT_HCIUART_BCSP=y
+CONFIG_BT_HCIUART_H4=y
+CONFIG_BT_HCIUART_LL=y
+CONFIG_BT_HCIVHCI=m
+CONFIG_BT_HIDP=m
+CONFIG_BT_L2CAP=m
+CONFIG_BT_MRVL=m
+CONFIG_BT_MRVL_SDIO=m
+CONFIG_BT_RFCOMM=m
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_SCO=m
+CONFIG_BUG=y
+CONFIG_C101=m
+CONFIG_C2PORT=m
+CONFIG_C2PORT_DURAMAR_2150=m
+CONFIG_CACHEFILES=m
+# CONFIG_CACHEFILES_DEBUG is not set
+# CONFIG_CACHEFILES_HISTOGRAM is not set
+CONFIG_CALGARY_IOMMU=y
+CONFIG_CALGARY_IOMMU_ENABLED_BY_DEFAULT=y
+CONFIG_CAN=m
+CONFIG_CAN_BCM=m
+# CONFIG_CAN_CALC_BITTIMING is not set
+# CONFIG_CAN_DEBUG_DEVICES is not set
+CONFIG_CAN_DEV=m
+CONFIG_CAN_EMS_PCI=m
+CONFIG_CAN_EMS_USB=m
+CONFIG_CAN_KVASER_PCI=m
+CONFIG_CAN_PM_TRACE=y
+CONFIG_CAN_RAW=m
+CONFIG_CAN_SJA1000=m
+CONFIG_CAN_SJA1000_ISA=m
+CONFIG_CAN_SJA1000_PLATFORM=m
+CONFIG_CAN_VCAN=m
+CONFIG_CAPI_AVM=y
+CONFIG_CAPI_EICON=y
+CONFIG_CAPI_TRACE=y
+CONFIG_CARDBUS=y
+CONFIG_CARDMAN_4000=m
+CONFIG_CARDMAN_4040=m
+# CONFIG_CARMINE_DRAM_CUSTOM is not set
+CONFIG_CASSINI=m
+CONFIG_CB710_CORE=m
+# CONFIG_CB710_DEBUG is not set
+CONFIG_CB710_DEBUG_ASSUMPTIONS=y
+CONFIG_CC_STACKPROTECTOR=y
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+CONFIG_CFAG12864B=m
+CONFIG_CFAG12864B_RATE=20
+CONFIG_CFG80211=m
+CONFIG_CFG80211_DEBUGFS=y
+CONFIG_CFG80211_DEFAULT_PS=y
+CONFIG_CFG80211_DEFAULT_PS_VALUE=1
+# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
+CONFIG_CFG80211_REG_DEBUG=y
+CONFIG_CGROUPS=y
+CONFIG_CGROUP_CPUACCT=y
+# CONFIG_CGROUP_DEBUG is not set
+CONFIG_CGROUP_DEVICE=y
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CGROUP_MEM_RES_CTLR=y
+CONFIG_CGROUP_MEM_RES_CTLR_SWAP=y
+CONFIG_CGROUP_NS=y
+CONFIG_CGROUP_SCHED=y
+CONFIG_CHARGER_PCF50633=m
+CONFIG_CHECK_SIGNATURE=y
+CONFIG_CHELSIO_T1=m
+CONFIG_CHELSIO_T1_1G=y
+CONFIG_CHELSIO_T3=m
+CONFIG_CHELSIO_T3_DEPENDS=y
+CONFIG_CHR_DEV_OSST=m
+CONFIG_CHR_DEV_SCH=m
+CONFIG_CHR_DEV_SG=y
+CONFIG_CHR_DEV_ST=m
+CONFIG_CICADA_PHY=y
+CONFIG_CIFS=m
+# CONFIG_CIFS_DEBUG2 is not set
+CONFIG_CIFS_DFS_UPCALL=y
+CONFIG_CIFS_EXPERIMENTAL=y
+CONFIG_CIFS_POSIX=y
+# CONFIG_CIFS_STATS is not set
+CONFIG_CIFS_UPCALL=y
+CONFIG_CIFS_WEAK_PW_HASH=y
+CONFIG_CIFS_XATTR=y
+CONFIG_CISS_SCSI_TAPE=y
+CONFIG_CLOCKSOURCE_WATCHDOG=y
+CONFIG_CLS_U32_MARK=y
+# CONFIG_CLS_U32_PERF is not set
+CONFIG_CMDLINE=""
+# CONFIG_CMDLINE_BOOL is not set
+CONFIG_CNIC=m
+CONFIG_CODA_FS=m
+CONFIG_COMEDI_8255=m
+# CONFIG_COMEDI_DEBUG is not set
+CONFIG_COMEDI_PCI_DRIVERS=m
+CONFIG_COMEDI_PCMCIA_DRIVERS=m
+CONFIG_COMEDI_USB_DRIVERS=m
+CONFIG_COMMON_CLKDEV=y
+CONFIG_COMPAL_LAPTOP=m
+CONFIG_COMPAT=y
+CONFIG_COMPAT_BINFMT_ELF=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_COMPAT_FOR_U64_ALIGNMENT=y
+CONFIG_COMPAT_NETLINK_MESSAGES=y
+# CONFIG_COMPAT_VDSO is not set
+CONFIG_COMPUTONE=m
+CONFIG_CONFIGFS_FS=m
+CONFIG_CONNECTOR=y
+CONFIG_CONSOLE_POLL=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_CONSTRUCTORS=y
+CONFIG_CONTEXT_SWITCH_TRACER=y
+# CONFIG_COPS is not set
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_COSA=m
+# CONFIG_CPA_DEBUG is not set
+CONFIG_CPU5_WDT=m
+CONFIG_CPUSETS=y
+CONFIG_CPU_32=y
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_32v7=y
+CONFIG_CPU_ABRT_EV7=y
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_CPU_CACHE_V7=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+# CONFIG_CPU_DCACHE_DISABLE is not set
+CONFIG_CPU_FREQ=y
+# CONFIG_CPU_FREQ_DEBUG is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_STAT=y
+CONFIG_CPU_FREQ_STAT_DETAILS=y
+CONFIG_CPU_FREQ_TABLE=y
+CONFIG_CPU_HAS_ASID=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+CONFIG_CPU_IDLE=y
+CONFIG_CPU_IDLE_GOV_LADDER=y
+CONFIG_CPU_IDLE_GOV_MENU=y
+CONFIG_CPU_PABRT_V7=y
+CONFIG_CPU_SUP_AMD=y
+CONFIG_CPU_SUP_CENTAUR=y
+CONFIG_CPU_SUP_CYRIX_32=y
+CONFIG_CPU_SUP_INTEL=y
+CONFIG_CPU_SUP_TRANSMETA_32=y
+CONFIG_CPU_SUP_UMC_32=y
+CONFIG_CPU_TLB_V7=y
+CONFIG_CPU_V7=y
+CONFIG_CRAMFS=m
+CONFIG_CRASH_DUMP=y
+CONFIG_CRC16=y
+CONFIG_CRC32=y
+CONFIG_CRC7=m
+CONFIG_CRC_CCITT=m
+CONFIG_CRC_ITU_T=m
+CONFIG_CRC_T10DIF=y
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_AEAD=m
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_AES=m
+CONFIG_CRYPTO_AES_586=m
+CONFIG_CRYPTO_AES_NI_INTEL=m
+CONFIG_CRYPTO_AES_X86_64=m
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_ANSI_CPRNG=m
+CONFIG_CRYPTO_ANUBIS=m
+CONFIG_CRYPTO_ARC4=m
+CONFIG_CRYPTO_AUTHENC=m
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_BLOWFISH=m
+CONFIG_CRYPTO_CAMELLIA=m
+CONFIG_CRYPTO_CAST5=m
+CONFIG_CRYPTO_CAST6=m
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_CCM=m
+CONFIG_CRYPTO_CRC32C=m
+CONFIG_CRYPTO_CRC32C_INTEL=m
+CONFIG_CRYPTO_CRYPTD=m
+CONFIG_CRYPTO_CTR=m
+CONFIG_CRYPTO_CTS=m
+CONFIG_CRYPTO_DEFLATE=m
+CONFIG_CRYPTO_DES=m
+CONFIG_CRYPTO_DEV_GEODE=m
+CONFIG_CRYPTO_DEV_HIFN_795X=m
+CONFIG_CRYPTO_DEV_HIFN_795X_RNG=y
+CONFIG_CRYPTO_DEV_PADLOCK=y
+CONFIG_CRYPTO_DEV_PADLOCK_AES=m
+CONFIG_CRYPTO_DEV_PADLOCK_SHA=m
+CONFIG_CRYPTO_ECB=y
+CONFIG_CRYPTO_FCRYPT=m
+CONFIG_CRYPTO_FIPS=y
+CONFIG_CRYPTO_FPU=m
+CONFIG_CRYPTO_GCM=m
+CONFIG_CRYPTO_GF128MUL=m
+CONFIG_CRYPTO_GHASH=m
+CONFIG_CRYPTO_GHASH_CLMUL_NI_INTEL=m
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_HW=y
+CONFIG_CRYPTO_KHAZAD=m
+CONFIG_CRYPTO_LRW=m
+CONFIG_CRYPTO_LZO=m
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+CONFIG_CRYPTO_MD4=m
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_MICHAEL_MIC=m
+CONFIG_CRYPTO_NULL=m
+CONFIG_CRYPTO_PCBC=m
+CONFIG_CRYPTO_PCOMP=y
+CONFIG_CRYPTO_RMD128=m
+CONFIG_CRYPTO_RMD160=m
+CONFIG_CRYPTO_RMD256=m
+CONFIG_CRYPTO_RMD320=m
+CONFIG_CRYPTO_RNG=m
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_SALSA20=m
+CONFIG_CRYPTO_SALSA20_586=m
+CONFIG_CRYPTO_SALSA20_X86_64=m
+CONFIG_CRYPTO_SEED=m
+CONFIG_CRYPTO_SEQIV=m
+CONFIG_CRYPTO_SERPENT=m
+CONFIG_CRYPTO_SHA1=m
+CONFIG_CRYPTO_SHA256=m
+CONFIG_CRYPTO_SHA512=m
+CONFIG_CRYPTO_TEA=m
+CONFIG_CRYPTO_TEST=m
+CONFIG_CRYPTO_TGR192=m
+CONFIG_CRYPTO_TWOFISH=m
+CONFIG_CRYPTO_TWOFISH_586=m
+CONFIG_CRYPTO_TWOFISH_COMMON=m
+CONFIG_CRYPTO_TWOFISH_X86_64=m
+CONFIG_CRYPTO_VMAC=m
+CONFIG_CRYPTO_WORKQUEUE=y
+CONFIG_CRYPTO_WP512=m
+CONFIG_CRYPTO_XCBC=m
+CONFIG_CRYPTO_XTS=m
+CONFIG_CRYPTO_ZLIB=m
+CONFIG_CS5535_GPIO=m
+CONFIG_CS89x0=m
+CONFIG_CUSE=m
+CONFIG_CYCLADES=m
+CONFIG_CYCLADES_SYNC=m
+CONFIG_CYCLOMX_X25=y
+# CONFIG_CYZ_INTR is not set
+CONFIG_DAB=y
+CONFIG_DAVICOM_PHY=y
+CONFIG_DCA=m
+CONFIG_DCB=y
+CONFIG_DCDBAS=m
+CONFIG_DE2104X=m
+CONFIG_DE2104X_DSL=0
+CONFIG_DE4X5=m
+CONFIG_DE600=m
+CONFIG_DE620=m
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_BOOT_PARAMS is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_CREDENTIALS is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_DEBUG_DRIVER is not set
+CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_HIGHMEM is not set
+# CONFIG_DEBUG_ICEDCC is not set
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_LIST is not set
+CONFIG_DEBUG_LL=y
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_NX_TEST is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_PAGEALLOC is not set
+# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
+# CONFIG_DEBUG_PER_CPU_MAPS is not set
+CONFIG_DEBUG_PREEMPT=y
+CONFIG_DEBUG_RODATA=y
+# CONFIG_DEBUG_RODATA_TEST is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_SHIRQ is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+CONFIG_DEBUG_USER=y
+# CONFIG_DEBUG_VIRTUAL is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DECNET=m
+CONFIG_DECNET_NF_GRABULATOR=m
+# CONFIG_DECNET_ROUTER is not set
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_LZMA=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_BIC is not set
+CONFIG_DEFAULT_CUBIC=y
+# CONFIG_DEFAULT_HTCP is not set
+CONFIG_DEFAULT_IO_DELAY_TYPE=1
+# CONFIG_DEFAULT_NOOP is not set
+# CONFIG_DEFAULT_RENO is not set
+CONFIG_DEFAULT_SECURITY="apparmor"
+CONFIG_DEFAULT_SECURITY_APPARMOR=y
+# CONFIG_DEFAULT_SECURITY_DAC is not set
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_DEFAULT_VEGAS is not set
+# CONFIG_DEFAULT_WESTWOOD is not set
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_DEFXX=m
+# CONFIG_DEFXX_MMIO is not set
+CONFIG_DELL_LAPTOP=m
+CONFIG_DELL_RBU=m
+CONFIG_DELL_WMI=m
+CONFIG_DEPCA=m
+CONFIG_DETECT_HUNG_TASK=y
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_DEVKMEM is not set
+CONFIG_DEVPORT=y
+CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_DEV_APPLETALK=m
+CONFIG_DE_AOC=y
+CONFIG_DIGIEPCA=m
+CONFIG_DIRECT_GBPAGES=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+CONFIG_DISPLAY_SUPPORT=m
+# CONFIG_DL2K is not set
+CONFIG_DLCI=m
+CONFIG_DLCI_MAX=8
+CONFIG_DLM=m
+# CONFIG_DLM_DEBUG is not set
+# CONFIG_DM9000 is not set
+CONFIG_DM9102=m
+CONFIG_DMADEVICES=y
+# CONFIG_DMAR is not set
+# CONFIG_DMATEST is not set
+# CONFIG_DMA_API_DEBUG is not set
+CONFIG_DMA_ENGINE=y
+CONFIG_DMI=y
+CONFIG_DMIID=y
+CONFIG_DM_CRYPT=m
+# CONFIG_DM_DEBUG is not set
+# CONFIG_DM_DELAY is not set
+# CONFIG_DM_LOG_USERSPACE is not set
+CONFIG_DM_MIRROR=y
+CONFIG_DM_MULTIPATH=y
+CONFIG_DM_MULTIPATH_QL=m
+CONFIG_DM_MULTIPATH_ST=m
+CONFIG_DM_RAID45=m
+CONFIG_DM_SNAPSHOT=y
+CONFIG_DM_UEVENT=y
+CONFIG_DM_ZERO=m
+CONFIG_DNET=m
+CONFIG_DNOTIFY=y
+CONFIG_DONGLE=y
+CONFIG_DOUBLEFAULT=y
+CONFIG_DRAGONRISE_FF=y
+CONFIG_DRM=m
+CONFIG_DRM_I2C_CH7006=m
+CONFIG_DRM_I810=m
+CONFIG_DRM_I830=m
+CONFIG_DRM_I915=m
+CONFIG_DRM_I915_KMS=y
+CONFIG_DRM_KMS_HELPER=m
+CONFIG_DRM_MGA=m
+CONFIG_DRM_NOUVEAU=m
+CONFIG_DRM_NOUVEAU_BACKLIGHT=y
+CONFIG_DRM_NOUVEAU_DEBUG=y
+CONFIG_DRM_R128=m
+CONFIG_DRM_RADEON_KMS=y
+CONFIG_DRM_SAVAGE=m
+CONFIG_DRM_SIS=m
+CONFIG_DRM_TDFX=m
+CONFIG_DRM_TTM=m
+CONFIG_DRM_VIA=m
+CONFIG_DS1682=m
+CONFIG_DSCC4=m
+CONFIG_DSCC4_PCISYNC=y
+CONFIG_DSCC4_PCI_RST=y
+CONFIG_DST=m
+# CONFIG_DST_DEBUG is not set
+CONFIG_DTLK=m
+CONFIG_DUMMY=m
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_DVB_AF9013=m
+CONFIG_DVB_AU8522=m
+CONFIG_DVB_AV7110=m
+CONFIG_DVB_AV7110_OSD=y
+CONFIG_DVB_B2C2_FLEXCOP=m
+# CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set
+CONFIG_DVB_B2C2_FLEXCOP_PCI=m
+CONFIG_DVB_B2C2_FLEXCOP_USB=m
+CONFIG_DVB_BCM3510=m
+CONFIG_DVB_BT8XX=m
+CONFIG_DVB_BUDGET=m
+CONFIG_DVB_BUDGET_AV=m
+CONFIG_DVB_BUDGET_CI=m
+CONFIG_DVB_BUDGET_CORE=m
+CONFIG_DVB_BUDGET_PATCH=m
+CONFIG_DVB_CAPTURE_DRIVERS=y
+CONFIG_DVB_CORE=m
+CONFIG_DVB_CX22700=m
+CONFIG_DVB_CX22702=m
+CONFIG_DVB_CX24110=m
+CONFIG_DVB_CX24116=m
+CONFIG_DVB_CX24123=m
+CONFIG_DVB_DIB3000MB=m
+CONFIG_DVB_DIB3000MC=m
+CONFIG_DVB_DIB7000M=m
+CONFIG_DVB_DIB7000P=m
+CONFIG_DVB_DIB8000=m
+CONFIG_DVB_DM1105=m
+CONFIG_DVB_DYNAMIC_MINORS=y
+# CONFIG_DVB_FE_CUSTOMISE is not set
+CONFIG_DVB_FIREDTV=m
+CONFIG_DVB_FIREDTV_IEEE1394=y
+CONFIG_DVB_FIREDTV_INPUT=y
+CONFIG_DVB_ISL6405=m
+CONFIG_DVB_ISL6421=m
+CONFIG_DVB_ISL6423=m
+CONFIG_DVB_L64781=m
+CONFIG_DVB_LGDT3305=m
+CONFIG_DVB_LGDT330X=m
+CONFIG_DVB_LGS8GXX=m
+CONFIG_DVB_LNBP21=m
+CONFIG_DVB_MAX_ADAPTERS=8
+CONFIG_DVB_MT312=m
+CONFIG_DVB_MT352=m
+CONFIG_DVB_NXT200X=m
+CONFIG_DVB_NXT6000=m
+CONFIG_DVB_OR51132=m
+CONFIG_DVB_OR51211=m
+CONFIG_DVB_PLL=m
+CONFIG_DVB_PLUTO2=m
+CONFIG_DVB_PT1=m
+CONFIG_DVB_S5H1409=m
+CONFIG_DVB_S5H1411=m
+CONFIG_DVB_S5H1420=m
+CONFIG_DVB_SI21XX=m
+CONFIG_DVB_SP8870=m
+CONFIG_DVB_SP887X=m
+CONFIG_DVB_STB0899=m
+CONFIG_DVB_STB6000=m
+CONFIG_DVB_STB6100=m
+CONFIG_DVB_STV0288=m
+CONFIG_DVB_STV0297=m
+CONFIG_DVB_STV0299=m
+CONFIG_DVB_STV0900=m
+CONFIG_DVB_STV090x=m
+CONFIG_DVB_STV6110=m
+CONFIG_DVB_STV6110x=m
+CONFIG_DVB_TDA10021=m
+CONFIG_DVB_TDA10023=m
+CONFIG_DVB_TDA10048=m
+CONFIG_DVB_TDA1004X=m
+CONFIG_DVB_TDA10086=m
+CONFIG_DVB_TDA8083=m
+CONFIG_DVB_TDA8261=m
+CONFIG_DVB_TDA826X=m
+CONFIG_DVB_TTUSB_BUDGET=m
+CONFIG_DVB_TTUSB_DEC=m
+CONFIG_DVB_TUA6100=m
+CONFIG_DVB_TUNER_CX24113=m
+CONFIG_DVB_TUNER_DIB0070=m
+CONFIG_DVB_TUNER_ITD1000=m
+CONFIG_DVB_USB=m
+CONFIG_DVB_USB_A800=m
+CONFIG_DVB_USB_AF9005=m
+CONFIG_DVB_USB_AF9005_REMOTE=m
+CONFIG_DVB_USB_AF9015=m
+CONFIG_DVB_USB_ANYSEE=m
+CONFIG_DVB_USB_AU6610=m
+CONFIG_DVB_USB_CE6230=m
+CONFIG_DVB_USB_CINERGY_T2=m
+CONFIG_DVB_USB_CXUSB=m
+# CONFIG_DVB_USB_DEBUG is not set
+CONFIG_DVB_USB_DIB0700=m
+CONFIG_DVB_USB_DIBUSB_MB=m
+# CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set
+CONFIG_DVB_USB_DIBUSB_MC=m
+CONFIG_DVB_USB_DIGITV=m
+CONFIG_DVB_USB_DTT200U=m
+CONFIG_DVB_USB_DTV5100=m
+CONFIG_DVB_USB_DW2102=m
+CONFIG_DVB_USB_FRIIO=m
+CONFIG_DVB_USB_GL861=m
+CONFIG_DVB_USB_GP8PSK=m
+CONFIG_DVB_USB_M920X=m
+CONFIG_DVB_USB_NOVA_T_USB2=m
+CONFIG_DVB_USB_OPERA1=m
+CONFIG_DVB_USB_TTUSB2=m
+CONFIG_DVB_USB_UMT_010=m
+CONFIG_DVB_USB_VP702X=m
+CONFIG_DVB_USB_VP7045=m
+CONFIG_DVB_VES1820=m
+CONFIG_DVB_VES1X93=m
+CONFIG_DVB_ZL10036=m
+CONFIG_DVB_ZL10039=m
+CONFIG_DVB_ZL10353=m
+CONFIG_DX_SEP=m
+# CONFIG_DYNAMIC_DEBUG is not set
+CONFIG_DYNAMIC_FTRACE=y
+CONFIG_E100=m
+CONFIG_E1000=m
+CONFIG_E1000E=m
+CONFIG_E2100=m
+CONFIG_EARLY_PRINTK=y
+# CONFIG_EARLY_PRINTK_DBGP is not set
+CONFIG_ECHO=m
+CONFIG_ECONET=m
+CONFIG_ECONET_AUNUDP=y
+CONFIG_ECONET_NATIVE=y
+CONFIG_ECRYPT_FS=y
+CONFIG_EDAC=y
+CONFIG_EDAC_AMD64=m
+# CONFIG_EDAC_AMD64_ERROR_INJECTION is not set
+CONFIG_EDAC_AMD76X=m
+# CONFIG_EDAC_DEBUG is not set
+CONFIG_EDAC_DECODE_MCE=m
+CONFIG_EDAC_E752X=m
+CONFIG_EDAC_E7XXX=m
+CONFIG_EDAC_I3000=m
+CONFIG_EDAC_I3200=m
+CONFIG_EDAC_I5000=m
+CONFIG_EDAC_I5100=m
+CONFIG_EDAC_I5400=m
+CONFIG_EDAC_I82860=m
+CONFIG_EDAC_I82875P=m
+CONFIG_EDAC_I82975X=m
+CONFIG_EDAC_MM_EDAC=m
+CONFIG_EDAC_R82600=m
+CONFIG_EDAC_X38=m
+CONFIG_EDD=y
+CONFIG_EDD_OFF=y
+CONFIG_EEEPC_LAPTOP=m
+CONFIG_EEPROM_93CX6=m
+CONFIG_EEPROM_AT24=m
+CONFIG_EEPROM_AT25=m
+CONFIG_EEPROM_LEGACY=m
+CONFIG_EEPROM_MAX6875=m
+CONFIG_EEXPRESS=m
+CONFIG_EEXPRESS_PRO=m
+CONFIG_EFI=y
+CONFIG_EFI_PARTITION=y
+CONFIG_EFI_VARS=y
+CONFIG_EFS_FS=m
+CONFIG_EISA=y
+CONFIG_EISA_NAMES=y
+CONFIG_EISA_PCI_EISA=y
+CONFIG_EISA_VIRTUAL_ROOT=y
+CONFIG_EISA_VLB_PRIMING=y
+CONFIG_EL1=m
+CONFIG_EL16=m
+CONFIG_EL2=m
+CONFIG_EL3=m
+CONFIG_ELF_CORE=y
+CONFIG_ELMC=m
+CONFIG_ELMC_II=m
+CONFIG_ELPLUS=m
+# CONFIG_EMBEDDED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENC28J60 is not set
+CONFIG_ENCLOSURE_SERVICES=m
+CONFIG_ENIC=m
+CONFIG_EPIC100=m
+CONFIG_EPOLL=y
+CONFIG_EQUALIZER=m
+CONFIG_ES3210=m
+CONFIG_ESI_DONGLE=m
+CONFIG_ET131X=m
+# CONFIG_ET131X_DEBUG is not set
+CONFIG_ETH16I=m
+CONFIG_ETHOC=m
+CONFIG_EUROTECH_WDT=m
+CONFIG_EVENTFD=y
+CONFIG_EVENT_PROFILE=y
+CONFIG_EVENT_TRACING=y
+CONFIG_EWRK3=m
+# CONFIG_EXOFS_DEBUG is not set
+CONFIG_EXOFS_FS=m
+CONFIG_EXPERIMENTAL=y
+CONFIG_EXPORTFS=m
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+CONFIG_EXT2_FS_SECURITY=y
+CONFIG_EXT2_FS_XATTR=y
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_DEFAULTS_TO_ORDERED=y
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT4_DEBUG is not set
+CONFIG_EXT4_FS=y
+CONFIG_EXT4_FS_POSIX_ACL=y
+CONFIG_EXT4_FS_SECURITY=y
+CONFIG_EXT4_FS_XATTR=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_EZX_PCAP is not set
+CONFIG_FAIR_GROUP_SCHED=y
+CONFIG_FARSYNC=m
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+CONFIG_FAT_FS=m
+# CONFIG_FAULT_INJECTION is not set
+CONFIG_FB=y
+CONFIG_FB_3DFX=m
+# CONFIG_FB_3DFX_ACCEL is not set
+CONFIG_FB_3DFX_I2C=y
+CONFIG_FB_ARC=m
+CONFIG_FB_ARK=m
+CONFIG_FB_ARMCLCD=y
+CONFIG_FB_ASILIANT=y
+CONFIG_FB_ATY=m
+CONFIG_FB_ATY128=m
+CONFIG_FB_ATY128_BACKLIGHT=y
+CONFIG_FB_ATY_BACKLIGHT=y
+CONFIG_FB_ATY_CT=y
+CONFIG_FB_ATY_GENERIC_LCD=y
+CONFIG_FB_ATY_GX=y
+CONFIG_FB_BACKLIGHT=y
+CONFIG_FB_BROADSHEET=m
+CONFIG_FB_CARILLO_RANCH=m
+CONFIG_FB_CARMINE=m
+CONFIG_FB_CARMINE_DRAM_EVAL=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+CONFIG_FB_CIRRUS=m
+CONFIG_FB_CYBER2000=m
+CONFIG_FB_DDC=m
+CONFIG_FB_DEFERRED_IO=y
+CONFIG_FB_EFI=y
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+CONFIG_FB_GEODE=y
+CONFIG_FB_GEODE_GX=m
+CONFIG_FB_GEODE_GX1=m
+CONFIG_FB_GEODE_LX=m
+CONFIG_FB_HECUBA=m
+CONFIG_FB_HGA=m
+# CONFIG_FB_HGA_ACCEL is not set
+CONFIG_FB_I810=m
+# CONFIG_FB_I810_GTF is not set
+CONFIG_FB_IMSTT=y
+CONFIG_FB_KYRO=m
+CONFIG_FB_LE80578=m
+# CONFIG_FB_MACMODES is not set
+CONFIG_FB_MATROX=m
+CONFIG_FB_MATROX_G=y
+CONFIG_FB_MATROX_I2C=m
+CONFIG_FB_MATROX_MAVEN=m
+CONFIG_FB_MATROX_MILLENIUM=y
+CONFIG_FB_MATROX_MYSTIQUE=y
+CONFIG_FB_MB862XX=m
+CONFIG_FB_MB862XX_PCI_GDC=y
+CONFIG_FB_METRONOME=m
+CONFIG_FB_MODE_HELPERS=y
+CONFIG_FB_N411=m
+CONFIG_FB_NEOMAGIC=m
+CONFIG_FB_NVIDIA=m
+CONFIG_FB_NVIDIA_BACKLIGHT=y
+# CONFIG_FB_NVIDIA_DEBUG is not set
+CONFIG_FB_NVIDIA_I2C=y
+CONFIG_FB_PM2=m
+CONFIG_FB_PM2_FIFO_DISCONNECT=y
+CONFIG_FB_PM3=m
+CONFIG_FB_RADEON=m
+CONFIG_FB_RADEON_BACKLIGHT=y
+# CONFIG_FB_RADEON_DEBUG is not set
+CONFIG_FB_RADEON_I2C=y
+CONFIG_FB_RIVA=m
+CONFIG_FB_RIVA_BACKLIGHT=y
+# CONFIG_FB_RIVA_DEBUG is not set
+CONFIG_FB_RIVA_I2C=y
+CONFIG_FB_S3=m
+CONFIG_FB_SAVAGE_ACCEL=y
+CONFIG_FB_SAVAGE_I2C=y
+CONFIG_FB_SIS=m
+CONFIG_FB_SIS_300=y
+CONFIG_FB_SIS_315=y
+CONFIG_FB_SM501=m
+CONFIG_FB_SVGALIB=m
+CONFIG_FB_SYS_COPYAREA=m
+CONFIG_FB_SYS_FILLRECT=m
+CONFIG_FB_SYS_FOPS=m
+CONFIG_FB_SYS_IMAGEBLIT=m
+CONFIG_FB_TILEBLITTING=y
+CONFIG_FB_TMIO=m
+CONFIG_FB_TMIO_ACCELL=y
+CONFIG_FB_TRIDENT=m
+CONFIG_FB_UDL=m
+CONFIG_FB_UVESA=m
+CONFIG_FB_VESA=m
+CONFIG_FB_VGA16=m
+CONFIG_FB_VIA=m
+# CONFIG_FB_VIRTUAL is not set
+CONFIG_FB_VOODOO1=m
+CONFIG_FB_VT8623=m
+CONFIG_FCOE=m
+CONFIG_FCOE_FNIC=m
+CONFIG_FDDI=y
+CONFIG_FEALNX=m
+CONFIG_FIB_RULES=y
+CONFIG_FILE_LOCKING=y
+CONFIG_FIREWIRE=m
+CONFIG_FIREWIRE_NET=m
+CONFIG_FIREWIRE_OHCI=m
+CONFIG_FIREWIRE_OHCI_DEBUG=y
+# CONFIG_FIREWIRE_OHCI_REMOTE_DMA is not set
+CONFIG_FIREWIRE_SBP2=m
+CONFIG_FIRMWARE_EDID=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_FIRMWARE_MEMMAP=y
+CONFIG_FIXED_PHY=y
+CONFIG_FIX_EARLYCON_MEM=y
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_FONT_10x18 is not set
+# CONFIG_FONT_6x11 is not set
+# CONFIG_FONT_7x14 is not set
+CONFIG_FONT_8x16=y
+CONFIG_FONT_8x8=y
+CONFIG_FONT_ACORN_8x8=y
+# CONFIG_FONT_MINI_4x6 is not set
+# CONFIG_FONT_PEARL_8x8 is not set
+# CONFIG_FONT_SUN12x22 is not set
+# CONFIG_FONT_SUN8x16 is not set
+CONFIG_FORCEDETH=m
+# CONFIG_FORCEDETH_NAPI is not set
+# CONFIG_FPE_FASTFPE is not set
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+CONFIG_FRAME_POINTER=y
+CONFIG_FRAME_WARN=1024
+CONFIG_FREEZER=y
+CONFIG_FSCACHE=m
+# CONFIG_FSCACHE_DEBUG is not set
+# CONFIG_FSCACHE_HISTOGRAM is not set
+# CONFIG_FSCACHE_OBJECT_LIST is not set
+# CONFIG_FSCACHE_STATS is not set
+CONFIG_FSNOTIFY=y
+CONFIG_FS_MBCACHE=y
+CONFIG_FS_POSIX_ACL=y
+CONFIG_FTRACE=y
+CONFIG_FTRACE_MCOUNT_RECORD=y
+CONFIG_FTRACE_NMI_ENTER=y
+# CONFIG_FTRACE_STARTUP_TEST is not set
+# CONFIG_FTRACE_SYSCALLS is not set
+CONFIG_FUJITSU_LAPTOP=m
+# CONFIG_FUJITSU_LAPTOP_DEBUG is not set
+CONFIG_FUNCTION_GRAPH_TRACER=y
+CONFIG_FUNCTION_PROFILER=y
+CONFIG_FUNCTION_TRACER=y
+CONFIG_FUSE_FS=y
+CONFIG_FUSION=y
+CONFIG_FUSION_CTL=m
+CONFIG_FUSION_FC=m
+CONFIG_FUSION_LAN=m
+CONFIG_FUSION_LOGGING=y
+CONFIG_FUSION_MAX_SGE=128
+CONFIG_FUSION_SAS=m
+CONFIG_FUSION_SPI=m
+CONFIG_FUTEX=y
+CONFIG_FW_LOADER=y
+CONFIG_GACT_PROB=y
+CONFIG_GAMEPORT_EMU10K1=m
+CONFIG_GAMEPORT_FM801=m
+CONFIG_GAMEPORT_L4=m
+CONFIG_GAMEPORT_NS558=m
+CONFIG_GARP=m
+CONFIG_GART_IOMMU=y
+# CONFIG_GCOV_KERNEL is not set
+CONFIG_GENERIC_ACL=y
+CONFIG_GENERIC_ALLOCATOR=y
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_FIND_FIRST_BIT=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_IOMAP=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_ISA_DMA=y
+CONFIG_GENERIC_PENDING_IRQ=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_TRACER=y
+CONFIG_GFS2_FS=m
+CONFIG_GFS2_FS_LOCKING_DLM=y
+CONFIG_GIGASET_BASE=m
+# CONFIG_GIGASET_DEBUG is not set
+CONFIG_GIGASET_M101=m
+CONFIG_GIGASET_M105=m
+CONFIG_GIRBIL_DONGLE=m
+CONFIG_GPIOLIB=y
+# CONFIG_GPIO_BT8XX is not set
+CONFIG_GPIO_LANGWELL=y
+CONFIG_GPIO_MAX7301=m
+CONFIG_GPIO_MAX732X=m
+CONFIG_GPIO_MC33880=m
+CONFIG_GPIO_MCP23S08=m
+CONFIG_GPIO_PCA953X=m
+CONFIG_GPIO_PCF857X=m
+# CONFIG_GPIO_PL061 is not set
+CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_TWL4030=m
+CONFIG_GPIO_UCB1400=y
+CONFIG_GPIO_WM831X=m
+CONFIG_GREENASIA_FF=y
+CONFIG_HAMACHI=m
+CONFIG_HAMRADIO=y
+CONFIG_HANGCHECK_TIMER=m
+CONFIG_HAPPYMEAL=m
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_HAS_DMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_TLS_REG=y
+CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID=y
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_HAVE_ARCH_KMEMCHECK=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_ATOMIC_IOMAP=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_DMA_ATTRS=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_FTRACE_NMI_ENTER=y
+CONFIG_HAVE_FUNCTION_GRAPH_FP_TEST=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
+CONFIG_HAVE_IDE=y
+CONFIG_HAVE_IOREMAP_PROT=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_KVM=y
+CONFIG_HAVE_KVM_EVENTFD=y
+CONFIG_HAVE_KVM_IRQCHIP=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_HAVE_MEMORY_PRESENT=y
+CONFIG_HAVE_MLOCK=y
+CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+CONFIG_HAVE_MMIOTRACE_SUPPORT=y
+CONFIG_HAVE_MTD_OTP=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_HAVE_SETUP_PER_CPU_AREA=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
+CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y
+CONFIG_HDLC=m
+CONFIG_HDLC_CISCO=m
+CONFIG_HDLC_FR=m
+CONFIG_HDLC_PPP=m
+CONFIG_HDLC_RAW=m
+CONFIG_HDLC_RAW_ETH=m
+CONFIG_HDLC_X25=m
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_HERMES=m
+CONFIG_HERMES_CACHE_FW_ON_INIT=y
+CONFIG_HFSPLUS_FS=m
+CONFIG_HFS_FS=m
+CONFIG_HIBERNATION=y
+CONFIG_HIBERNATION_NVS=y
+CONFIG_HID=m
+CONFIG_HIDRAW=y
+CONFIG_HID_3M_PCT=m
+CONFIG_HID_A4TECH=m
+CONFIG_HID_APPLE=m
+CONFIG_HID_BELKIN=m
+CONFIG_HID_CHERRY=m
+CONFIG_HID_CHICONY=m
+CONFIG_HID_CYPRESS=m
+CONFIG_HID_DRAGONRISE=m
+CONFIG_HID_EZKEY=m
+CONFIG_HID_GREENASIA=m
+CONFIG_HID_GYRATION=m
+CONFIG_HID_KENSINGTON=m
+CONFIG_HID_KYE=m
+CONFIG_HID_LOGITECH=m
+CONFIG_HID_MICROSOFT=m
+CONFIG_HID_MONTEREY=m
+CONFIG_HID_MOSART=m
+CONFIG_HID_NTRIG=m
+CONFIG_HID_ORTEK=m
+CONFIG_HID_PANTHERLORD=m
+CONFIG_HID_PETALYNX=m
+CONFIG_HID_PID=y
+CONFIG_HID_QUANTA=m
+CONFIG_HID_SAMSUNG=m
+CONFIG_HID_SMARTJOYPLUS=m
+CONFIG_HID_SONY=m
+CONFIG_HID_STANTUM=m
+CONFIG_HID_SUNPLUS=m
+CONFIG_HID_SUPPORT=y
+CONFIG_HID_THRUSTMASTER=m
+CONFIG_HID_TOPSEED=m
+CONFIG_HID_TWINHAN=m
+CONFIG_HID_WACOM=m
+CONFIG_HID_ZEROPLUS=m
+CONFIG_HIGHMEM=y
+CONFIG_HIGHPTE=y
+CONFIG_HIPPI=y
+CONFIG_HISAX_16_0=y
+CONFIG_HISAX_16_3=y
+CONFIG_HISAX_1TR6=y
+CONFIG_HISAX_ASUSCOM=y
+CONFIG_HISAX_AVM_A1=y
+CONFIG_HISAX_AVM_A1_CS=m
+CONFIG_HISAX_AVM_A1_PCMCIA=y
+CONFIG_HISAX_BKM_A4T=y
+# CONFIG_HISAX_DEBUG is not set
+CONFIG_HISAX_DIEHLDIVA=y
+CONFIG_HISAX_ELSA=y
+CONFIG_HISAX_ELSA_CS=m
+CONFIG_HISAX_ENTERNOW_PCI=y
+CONFIG_HISAX_EURO=y
+CONFIG_HISAX_FRITZPCI=y
+CONFIG_HISAX_FRITZ_PCIPNP=m
+CONFIG_HISAX_GAZEL=y
+CONFIG_HISAX_HFC4S8S=m
+CONFIG_HISAX_HFCS=y
+CONFIG_HISAX_HFCUSB=m
+CONFIG_HISAX_HFC_PCI=y
+CONFIG_HISAX_HFC_SX=y
+CONFIG_HISAX_HSTSAPHIR=y
+CONFIG_HISAX_ISURF=y
+CONFIG_HISAX_IX1MICROR2=y
+CONFIG_HISAX_MAX_CARDS=8
+CONFIG_HISAX_MIC=y
+CONFIG_HISAX_NETJET=y
+CONFIG_HISAX_NETJET_U=y
+CONFIG_HISAX_NI1=y
+CONFIG_HISAX_NICCY=y
+# CONFIG_HISAX_NO_KEYPAD is not set
+# CONFIG_HISAX_NO_LLC is not set
+# CONFIG_HISAX_NO_SENDCOMPLETE is not set
+CONFIG_HISAX_S0BOX=y
+CONFIG_HISAX_SCT_QUADRO=y
+CONFIG_HISAX_SEDLBAUER=y
+CONFIG_HISAX_SEDLBAUER_CS=m
+CONFIG_HISAX_SPORTSTER=y
+CONFIG_HISAX_ST5481=m
+CONFIG_HISAX_TELEINT=y
+CONFIG_HISAX_TELESPCI=y
+CONFIG_HISAX_TELES_CS=m
+CONFIG_HISAX_W6692=y
+CONFIG_HOSTAP=m
+CONFIG_HOSTAP_CS=m
+CONFIG_HOSTAP_FIRMWARE=y
+CONFIG_HOSTAP_FIRMWARE_NVRAM=y
+CONFIG_HOSTAP_PCI=m
+CONFIG_HOSTAP_PLX=m
+CONFIG_HOSTESS_SV11=m
+CONFIG_HOTPLUG=y
+CONFIG_HOTPLUG_CPU=y
+CONFIG_HOTPLUG_PCI=y
+CONFIG_HOTPLUG_PCI_ACPI=m
+CONFIG_HOTPLUG_PCI_ACPI_IBM=m
+CONFIG_HOTPLUG_PCI_COMPAQ=m
+CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM=y
+CONFIG_HOTPLUG_PCI_CPCI=y
+CONFIG_HOTPLUG_PCI_CPCI_GENERIC=m
+CONFIG_HOTPLUG_PCI_CPCI_ZT5550=m
+CONFIG_HOTPLUG_PCI_FAKE=m
+CONFIG_HOTPLUG_PCI_IBM=m
+CONFIG_HOTPLUG_PCI_PCIE=y
+CONFIG_HOTPLUG_PCI_SHPC=m
+CONFIG_HP100=m
+CONFIG_HPET=y
+CONFIG_HPET_EMULATE_RTC=y
+CONFIG_HPET_MMAP=y
+CONFIG_HPET_TIMER=y
+CONFIG_HPFS_FS=m
+CONFIG_HPLAN=m
+CONFIG_HPLAN_PLUS=m
+CONFIG_HP_ILO=m
+# CONFIG_HP_WATCHDOG is not set
+CONFIG_HP_WMI=m
+# CONFIG_HTC_EGPIO is not set
+CONFIG_HTC_PASIC3=m
+CONFIG_HT_IRQ=y
+CONFIG_HUGETLBFS=y
+CONFIG_HVC_DRIVER=y
+CONFIG_HVC_IRQ=y
+CONFIG_HVC_XEN=y
+# CONFIG_HWMON_DEBUG_CHIP is not set
+CONFIG_HWMON_VID=m
+# CONFIG_HWPOISON_INJECT is not set
+CONFIG_HW_CONSOLE=y
+CONFIG_HW_RANDOM=y
+CONFIG_HW_RANDOM_AMD=m
+CONFIG_HW_RANDOM_GEODE=m
+CONFIG_HW_RANDOM_INTEL=m
+CONFIG_HW_RANDOM_TIMERIOMEM=m
+CONFIG_HW_RANDOM_VIA=m
+CONFIG_HW_RANDOM_VIRTIO=m
+CONFIG_HYPERV=m
+CONFIG_HYPERV_BLOCK=m
+CONFIG_HYPERV_NET=m
+CONFIG_HYPERV_STORAGE=m
+CONFIG_HYSDN=m
+CONFIG_HYSDN_CAPI=y
+# CONFIG_HZ_300 is not set
+CONFIG_I2C=y
+CONFIG_I2C_ALGOBIT=m
+CONFIG_I2C_ALGOPCA=m
+CONFIG_I2C_ALGOPCF=m
+CONFIG_I2C_ALI1535=m
+CONFIG_I2C_ALI1563=m
+CONFIG_I2C_ALI15X3=m
+CONFIG_I2C_AMD756=m
+CONFIG_I2C_AMD756_S4882=m
+CONFIG_I2C_AMD8111=m
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=m
+CONFIG_I2C_COMPAT=y
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+CONFIG_I2C_DESIGNWARE=m
+CONFIG_I2C_GPIO=m
+# CONFIG_I2C_HELPER_AUTO is not set
+CONFIG_I2C_I801=m
+CONFIG_I2C_ISCH=m
+CONFIG_I2C_NFORCE2=m
+CONFIG_I2C_NFORCE2_S4985=m
+CONFIG_I2C_OCORES=m
+CONFIG_I2C_PARPORT=m
+CONFIG_I2C_PARPORT_LIGHT=m
+CONFIG_I2C_PCA_ISA=m
+CONFIG_I2C_PCA_PLATFORM=m
+CONFIG_I2C_PIIX4=m
+CONFIG_I2C_SCMI=m
+CONFIG_I2C_SI470X=m
+CONFIG_I2C_SI4713=m
+CONFIG_I2C_SIMTEC=m
+CONFIG_I2C_SIS5595=m
+CONFIG_I2C_SIS630=m
+CONFIG_I2C_SIS96X=m
+CONFIG_I2C_STUB=m
+CONFIG_I2C_TAOS_EVM=m
+CONFIG_I2C_TINY_USB=m
+CONFIG_I2C_VERSATILE=m
+CONFIG_I2C_VIA=m
+CONFIG_I2C_VIAPRO=m
+CONFIG_I2C_VOODOO3=m
+CONFIG_I2O=m
+CONFIG_I2O_BLOCK=m
+CONFIG_I2O_BUS=m
+CONFIG_I2O_CONFIG=m
+CONFIG_I2O_CONFIG_OLD_IOCTL=y
+CONFIG_I2O_EXT_ADAPTEC=y
+CONFIG_I2O_EXT_ADAPTEC_DMA64=y
+CONFIG_I2O_LCT_NOTIFY_ON_CHANGES=y
+CONFIG_I2O_PROC=m
+CONFIG_I2O_SCSI=m
+CONFIG_I6300ESB_WDT=m
+CONFIG_I7300_IDLE=m
+CONFIG_I7300_IDLE_IOAT_CHANNEL=y
+CONFIG_I82092=m
+CONFIG_I82365=m
+CONFIG_I8K=m
+# CONFIG_IA32_AOUT is not set
+CONFIG_IA32_EMULATION=y
+CONFIG_IB700_WDT=m
+CONFIG_IBMASR=m
+CONFIG_IBMLANA=m
+CONFIG_IBMLS=m
+# CONFIG_IBMMCA_SCSI_DEV_RESET is not set
+CONFIG_IBMMCA_SCSI_ORDER_STANDARD=y
+CONFIG_IBMOL=m
+CONFIG_IBMTR=m
+CONFIG_IBM_ASM=m
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+CONFIG_ICPLUS_PHY=y
+CONFIG_ICS932S401=m
+CONFIG_ICST307=y
+# CONFIG_IDE is not set
+CONFIG_IDE_PHISON=m
+CONFIG_IEEE1394=m
+CONFIG_IEEE1394_DV1394=m
+CONFIG_IEEE1394_ETH1394=m
+CONFIG_IEEE1394_ETH1394_ROM_ENTRY=y
+CONFIG_IEEE1394_OHCI1394=m
+CONFIG_IEEE1394_PCILYNX=m
+CONFIG_IEEE1394_RAWIO=m
+CONFIG_IEEE1394_SBP2=m
+# CONFIG_IEEE1394_SBP2_PHYS_DMA is not set
+# CONFIG_IEEE1394_VERBOSEDEBUG is not set
+CONFIG_IEEE1394_VIDEO1394=m
+CONFIG_IEEE802154=m
+CONFIG_IEEE802154_DRIVERS=m
+# CONFIG_IEEE802154_FAKEHARD is not set
+CONFIG_IFB=m
+CONFIG_IGB=m
+CONFIG_IGBVF=m
+CONFIG_IGB_DCA=y
+CONFIG_IIO=m
+# CONFIG_IIO_RING_BUFFER is not set
+# CONFIG_IIO_TRIGGER is not set
+# CONFIG_IKCONFIG is not set
+# CONFIG_IMA is not set
+CONFIG_INET=y
+CONFIG_INET6_AH=m
+CONFIG_INET6_ESP=m
+CONFIG_INET6_IPCOMP=m
+CONFIG_INET6_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_BEET=m
+CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
+CONFIG_INET6_XFRM_MODE_TRANSPORT=m
+CONFIG_INET6_XFRM_MODE_TUNNEL=m
+CONFIG_INET6_XFRM_TUNNEL=m
+CONFIG_INET_AH=m
+CONFIG_INET_DCCP_DIAG=m
+CONFIG_INET_DIAG=y
+CONFIG_INET_ESP=m
+CONFIG_INET_IPCOMP=m
+CONFIG_INET_LRO=y
+CONFIG_INET_TCP_DIAG=y
+CONFIG_INET_TUNNEL=m
+CONFIG_INET_XFRM_MODE_BEET=m
+CONFIG_INET_XFRM_MODE_TRANSPORT=m
+CONFIG_INET_XFRM_MODE_TUNNEL=m
+CONFIG_INET_XFRM_TUNNEL=m
+CONFIG_INFINIBAND=m
+CONFIG_INFINIBAND_ADDR_TRANS=y
+CONFIG_INFINIBAND_AMSO1100=m
+CONFIG_INFINIBAND_AMSO1100_DEBUG=y
+CONFIG_INFINIBAND_CXGB3=m
+# CONFIG_INFINIBAND_CXGB3_DEBUG is not set
+CONFIG_INFINIBAND_IPATH=m
+CONFIG_INFINIBAND_IPOIB=m
+CONFIG_INFINIBAND_IPOIB_CM=y
+CONFIG_INFINIBAND_IPOIB_DEBUG=y
+# CONFIG_INFINIBAND_IPOIB_DEBUG_DATA is not set
+CONFIG_INFINIBAND_ISER=m
+CONFIG_INFINIBAND_MTHCA=m
+CONFIG_INFINIBAND_MTHCA_DEBUG=y
+# CONFIG_INFINIBAND_NES is not set
+CONFIG_INFINIBAND_SRP=m
+CONFIG_INFINIBAND_USER_ACCESS=m
+CONFIG_INFINIBAND_USER_MAD=m
+CONFIG_INFINIBAND_USER_MEM=y
+CONFIG_INFTL=m
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+CONFIG_INPUT=y
+# CONFIG_INPUT_APANEL is not set
+CONFIG_INPUT_ATI_REMOTE=m
+CONFIG_INPUT_ATI_REMOTE2=m
+CONFIG_INPUT_ATLAS_BTNS=m
+CONFIG_INPUT_CM109=m
+CONFIG_INPUT_EVBUG=m
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_FF_MEMLESS=m
+CONFIG_INPUT_GPIO=m
+CONFIG_INPUT_GPIO_ROTARY_ENCODER=m
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_INPUT_KEYSPAN_REMOTE=m
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_MOUSE=y
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+CONFIG_INPUT_PCF50633_PMU=m
+CONFIG_INPUT_PCSPKR=m
+CONFIG_INPUT_POLLDEV=m
+CONFIG_INPUT_POWERMATE=m
+CONFIG_INPUT_TABLET=y
+CONFIG_INPUT_TWL4030_PWRBUTTON=m
+CONFIG_INPUT_UINPUT=m
+CONFIG_INPUT_WINBOND_CIR=m
+CONFIG_INPUT_WISTRON_BTNS=m
+CONFIG_INPUT_WM831X_ON=m
+CONFIG_INPUT_YEALINK=m
+CONFIG_INTEL_IOATDMA=m
+CONFIG_INTEL_MENLOW=m
+# CONFIG_INTR_REMAP is not set
+# CONFIG_IOMMU_DEBUG is not set
+# CONFIG_IOMMU_STRESS is not set
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IO_DELAY_0X80 is not set
+CONFIG_IO_DELAY_0XED=y
+# CONFIG_IO_DELAY_NONE is not set
+CONFIG_IO_DELAY_TYPE_0X80=0
+CONFIG_IO_DELAY_TYPE_0XED=1
+CONFIG_IO_DELAY_TYPE_NONE=3
+CONFIG_IO_DELAY_TYPE_UDELAY=2
+# CONFIG_IO_DELAY_UDELAY is not set
+CONFIG_IP1000=m
+CONFIG_IP6_NF_FILTER=m
+CONFIG_IP6_NF_IPTABLES=m
+CONFIG_IP6_NF_MANGLE=m
+CONFIG_IP6_NF_MATCH_AH=m
+CONFIG_IP6_NF_MATCH_EUI64=m
+CONFIG_IP6_NF_MATCH_FRAG=m
+CONFIG_IP6_NF_MATCH_HL=m
+CONFIG_IP6_NF_MATCH_IPV6HEADER=m
+CONFIG_IP6_NF_MATCH_MH=m
+CONFIG_IP6_NF_MATCH_OPTS=m
+CONFIG_IP6_NF_MATCH_RT=m
+CONFIG_IP6_NF_QUEUE=m
+CONFIG_IP6_NF_RAW=m
+CONFIG_IP6_NF_SECURITY=m
+CONFIG_IP6_NF_TARGET_HL=m
+CONFIG_IP6_NF_TARGET_LOG=m
+CONFIG_IP6_NF_TARGET_REJECT=m
+CONFIG_IPC_NS=y
+CONFIG_IPDDP=m
+CONFIG_IPDDP_DECAP=y
+CONFIG_IPDDP_ENCAP=y
+CONFIG_IPMI_DEVICE_INTERFACE=m
+# CONFIG_IPMI_PANIC_EVENT is not set
+CONFIG_IPMI_POWEROFF=m
+CONFIG_IPMI_SI=m
+CONFIG_IPMI_WATCHDOG=m
+CONFIG_IPPP_FILTER=y
+CONFIG_IPV6=y
+# CONFIG_IPV6_MIP6 is not set
+# CONFIG_IPV6_MROUTE is not set
+CONFIG_IPV6_MULTIPLE_TABLES=y
+CONFIG_IPV6_NDISC_NODETYPE=y
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+CONFIG_IPV6_PRIVACY=y
+# CONFIG_IPV6_ROUTER_PREF is not set
+CONFIG_IPV6_SIT=m
+# CONFIG_IPV6_SUBTREES is not set
+CONFIG_IPV6_TUNNEL=m
+CONFIG_IPW2100=m
+# CONFIG_IPW2100_DEBUG is not set
+CONFIG_IPW2100_MONITOR=y
+CONFIG_IPW2200=m
+# CONFIG_IPW2200_DEBUG is not set
+CONFIG_IPW2200_MONITOR=y
+CONFIG_IPW2200_PROMISCUOUS=y
+CONFIG_IPW2200_QOS=y
+CONFIG_IPW2200_RADIOTAP=y
+CONFIG_IPWIRELESS=m
+CONFIG_IPX=m
+# CONFIG_IPX_INTERN is not set
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_DCCP=m
+# CONFIG_IP_DCCP_CCID2_DEBUG is not set
+CONFIG_IP_DCCP_CCID3=y
+# CONFIG_IP_DCCP_CCID3_DEBUG is not set
+CONFIG_IP_DCCP_CCID3_RTO=100
+# CONFIG_IP_DCCP_DEBUG is not set
+CONFIG_IP_DCCP_TFRC_LIB=y
+CONFIG_IP_FIB_HASH=y
+# CONFIG_IP_FIB_TRIE is not set
+CONFIG_IP_MROUTE=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_IP_NF_ARPFILTER=m
+CONFIG_IP_NF_ARPTABLES=m
+CONFIG_IP_NF_ARP_MANGLE=m
+CONFIG_IP_NF_FILTER=m
+CONFIG_IP_NF_IPTABLES=m
+CONFIG_IP_NF_MANGLE=m
+CONFIG_IP_NF_MATCH_ADDRTYPE=m
+CONFIG_IP_NF_MATCH_AH=m
+CONFIG_IP_NF_MATCH_ECN=m
+CONFIG_IP_NF_MATCH_TTL=m
+CONFIG_IP_NF_QUEUE=m
+CONFIG_IP_NF_RAW=m
+CONFIG_IP_NF_SECURITY=m
+CONFIG_IP_NF_TARGET_CLUSTERIP=m
+CONFIG_IP_NF_TARGET_ECN=m
+CONFIG_IP_NF_TARGET_LOG=m
+CONFIG_IP_NF_TARGET_MASQUERADE=m
+CONFIG_IP_NF_TARGET_NETMAP=m
+CONFIG_IP_NF_TARGET_REDIRECT=m
+CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_NF_TARGET_TTL=m
+CONFIG_IP_NF_TARGET_ULOG=m
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+# CONFIG_IP_PNP is not set
+CONFIG_IP_ROUTE_MULTIPATH=y
+CONFIG_IP_ROUTE_VERBOSE=y
+CONFIG_IP_SCTP=m
+CONFIG_IP_VS=m
+# CONFIG_IP_VS_DEBUG is not set
+CONFIG_IP_VS_DH=m
+CONFIG_IP_VS_FTP=m
+CONFIG_IP_VS_IPV6=y
+CONFIG_IP_VS_LBLC=m
+CONFIG_IP_VS_LBLCR=m
+CONFIG_IP_VS_LC=m
+CONFIG_IP_VS_NQ=m
+CONFIG_IP_VS_PROTO_AH=y
+CONFIG_IP_VS_PROTO_AH_ESP=y
+CONFIG_IP_VS_PROTO_ESP=y
+CONFIG_IP_VS_PROTO_TCP=y
+CONFIG_IP_VS_PROTO_UDP=y
+CONFIG_IP_VS_RR=m
+CONFIG_IP_VS_SED=m
+CONFIG_IP_VS_SH=m
+CONFIG_IP_VS_TAB_BITS=12
+CONFIG_IP_VS_WLC=m
+CONFIG_IP_VS_WRR=m
+CONFIG_IRCOMM=m
+CONFIG_IRDA_CACHE_LAST_LSAP=y
+CONFIG_IRDA_DEBUG=y
+CONFIG_IRDA_FAST_RR=y
+CONFIG_IRDA_ULTRA=y
+CONFIG_IRLAN=m
+CONFIG_IRNET=m
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_IRQ_TIME_ACCOUNTING is not set
+CONFIG_IRTTY_SIR=m
+CONFIG_ISA=y
+CONFIG_ISAPNP=y
+CONFIG_ISA_DMA_API=y
+CONFIG_ISCSI_IBFT=m
+CONFIG_ISCSI_IBFT_FIND=y
+CONFIG_ISCSI_TCP=m
+CONFIG_ISDN_AUDIO=y
+CONFIG_ISDN_CAPI=m
+CONFIG_ISDN_CAPI_CAPI20=m
+CONFIG_ISDN_CAPI_CAPIDRV=m
+CONFIG_ISDN_CAPI_CAPIFS=m
+CONFIG_ISDN_CAPI_CAPIFS_BOOL=y
+CONFIG_ISDN_CAPI_MIDDLEWARE=y
+CONFIG_ISDN_DIVAS=m
+CONFIG_ISDN_DIVAS_BRIPCI=y
+CONFIG_ISDN_DIVAS_DIVACAPI=m
+CONFIG_ISDN_DIVAS_MAINT=m
+CONFIG_ISDN_DIVAS_PRIPCI=y
+CONFIG_ISDN_DIVAS_USERIDI=m
+CONFIG_ISDN_DIVERSION=m
+CONFIG_ISDN_DRV_ACT2000=m
+CONFIG_ISDN_DRV_AVMB1_AVM_CS=m
+CONFIG_ISDN_DRV_AVMB1_B1ISA=m
+CONFIG_ISDN_DRV_AVMB1_B1PCI=m
+CONFIG_ISDN_DRV_AVMB1_B1PCIV4=y
+CONFIG_ISDN_DRV_AVMB1_B1PCMCIA=m
+CONFIG_ISDN_DRV_AVMB1_C4=m
+CONFIG_ISDN_DRV_AVMB1_T1ISA=m
+CONFIG_ISDN_DRV_AVMB1_T1PCI=m
+CONFIG_ISDN_DRV_AVMB1_VERBOSE_REASON=y
+CONFIG_ISDN_DRV_GIGASET=m
+CONFIG_ISDN_DRV_HISAX=m
+CONFIG_ISDN_DRV_ICN=m
+CONFIG_ISDN_DRV_PCBIT=m
+CONFIG_ISDN_DRV_SC=m
+CONFIG_ISDN_HDLC=m
+CONFIG_ISDN_I4L=m
+CONFIG_ISDN_MPP=y
+CONFIG_ISDN_PPP=y
+CONFIG_ISDN_PPP_BSDCOMP=m
+CONFIG_ISDN_PPP_VJ=y
+CONFIG_ISDN_TTY_FAX=y
+CONFIG_ISDN_X25=y
+# CONFIG_ISI is not set
+CONFIG_ISL29003=m
+CONFIG_ISO9660_FS=m
+CONFIG_ISTALLION=m
+CONFIG_IT8712F_WDT=m
+CONFIG_IT87_WDT=m
+CONFIG_ITCO_VENDOR_SUPPORT=y
+CONFIG_ITCO_WDT=m
+CONFIG_IWL3945=m
+CONFIG_IWL3945_SPECTRUM_MEASUREMENT=y
+CONFIG_IWL4965=y
+CONFIG_IWL5000=y
+CONFIG_IWLAGN=m
+CONFIG_IWLWIFI=m
+# CONFIG_IWLWIFI_DEBUG is not set
+CONFIG_IWLWIFI_LEDS=y
+# CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT is not set
+CONFIG_IWM=m
+# CONFIG_IWM_DEBUG is not set
+CONFIG_IXGB=m
+CONFIG_IXGBE=m
+CONFIG_IXGBE_DCA=y
+CONFIG_IXGBE_DCB=y
+CONFIG_JBD=y
+CONFIG_JBD2=y
+# CONFIG_JBD2_DEBUG is not set
+# CONFIG_JBD_DEBUG is not set
+CONFIG_JFFS2_CMODE_FAVOURLZO=y
+# CONFIG_JFFS2_CMODE_NONE is not set
+# CONFIG_JFFS2_CMODE_PRIORITY is not set
+# CONFIG_JFFS2_CMODE_SIZE is not set
+CONFIG_JFFS2_COMPRESSION_OPTIONS=y
+CONFIG_JFFS2_FS=m
+CONFIG_JFFS2_FS_DEBUG=0
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_XATTR is not set
+CONFIG_JFFS2_LZO=y
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_JFFS2_SUMMARY is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFS_DEBUG is not set
+CONFIG_JFS_FS=m
+CONFIG_JFS_POSIX_ACL=y
+CONFIG_JFS_SECURITY=y
+CONFIG_JFS_STATISTICS=y
+CONFIG_JME=m
+CONFIG_JOLIET=y
+CONFIG_JOYSTICK_A3D=m
+CONFIG_JOYSTICK_ADI=m
+CONFIG_JOYSTICK_ANALOG=m
+CONFIG_JOYSTICK_COBRA=m
+CONFIG_JOYSTICK_DB9=m
+CONFIG_JOYSTICK_GAMECON=m
+CONFIG_JOYSTICK_GF2K=m
+CONFIG_JOYSTICK_GRIP=m
+CONFIG_JOYSTICK_GRIP_MP=m
+CONFIG_JOYSTICK_GUILLEMOT=m
+CONFIG_JOYSTICK_IFORCE=m
+CONFIG_JOYSTICK_IFORCE_232=y
+CONFIG_JOYSTICK_IFORCE_USB=y
+CONFIG_JOYSTICK_INTERACT=m
+CONFIG_JOYSTICK_JOYDUMP=m
+CONFIG_JOYSTICK_MAGELLAN=m
+CONFIG_JOYSTICK_SIDEWINDER=m
+CONFIG_JOYSTICK_SPACEBALL=m
+CONFIG_JOYSTICK_SPACEORB=m
+CONFIG_JOYSTICK_STINGER=m
+CONFIG_JOYSTICK_TMDC=m
+CONFIG_JOYSTICK_TURBOGRAFX=m
+CONFIG_JOYSTICK_TWIDJOY=m
+CONFIG_JOYSTICK_WALKERA0701=m
+CONFIG_JOYSTICK_WARRIOR=m
+CONFIG_JOYSTICK_XPAD=m
+CONFIG_JOYSTICK_XPAD_FF=y
+CONFIG_JOYSTICK_XPAD_LEDS=y
+CONFIG_JOYSTICK_ZHENHUA=m
+CONFIG_K8_NB=y
+CONFIG_K8_NUMA=y
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_ALL=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_KARMA_PARTITION=y
+# CONFIG_KERNEL_BZIP2 is not set
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_LZMA is not set
+CONFIG_KEXEC=y
+CONFIG_KEXEC_JUMP=y
+CONFIG_KEYBOARD_ADP5588=m
+CONFIG_KEYBOARD_ATKBD=y
+CONFIG_KEYBOARD_GPIO=m
+CONFIG_KEYBOARD_LM8323=m
+CONFIG_KEYBOARD_MATRIX=m
+CONFIG_KEYBOARD_MAX7359=m
+CONFIG_KEYBOARD_OPENCORES=m
+CONFIG_KEYBOARD_STOWAWAY=m
+CONFIG_KEYBOARD_TWL4030=m
+CONFIG_KEYS=y
+# CONFIG_KEYS_DEBUG_PROC_KEYS is not set
+CONFIG_KGDB=y
+CONFIG_KGDB_SERIAL_CONSOLE=y
+# CONFIG_KGDB_TESTS is not set
+CONFIG_KINGSUN_DONGLE=m
+# CONFIG_KMEMTRACE is not set
+CONFIG_KPROBES=y
+# CONFIG_KPROBES_SANITY_TEST is not set
+CONFIG_KRETPROBES=y
+CONFIG_KS0108=m
+CONFIG_KS0108_DELAY=2
+CONFIG_KS0108_PORT=0x378
+CONFIG_KS8842=m
+CONFIG_KS8851=m
+CONFIG_KS8851_MLL=m
+CONFIG_KS959_DONGLE=m
+CONFIG_KSDAZZLE_DONGLE=m
+CONFIG_KSM=y
+CONFIG_KVM=m
+CONFIG_KVM_AMD=m
+CONFIG_KVM_APIC_ARCHITECTURE=y
+CONFIG_KVM_CLOCK=y
+CONFIG_KVM_GUEST=y
+CONFIG_KVM_INTEL=m
+CONFIG_KXSD9=m
+CONFIG_LANCE=m
+CONFIG_LANMEDIA=m
+CONFIG_LAPBETHER=m
+CONFIG_LATENCYTOP=y
+CONFIG_LBDAF=y
+CONFIG_LCD_CLASS_DEVICE=m
+CONFIG_LCD_LMS283GF05=m
+CONFIG_LCD_LTV350QV=m
+CONFIG_LCD_PLATFORM=m
+CONFIG_LCD_TDO24M=m
+CONFIG_LCD_VGG2432A4=m
+# CONFIG_LDM_DEBUG is not set
+CONFIG_LDM_PARTITION=y
+CONFIG_LEDS=y
+CONFIG_LEDS_ALIX2=m
+CONFIG_LEDS_BD2802=m
+CONFIG_LEDS_CLASS=m
+# CONFIG_LEDS_CLEVO_MAIL is not set
+CONFIG_LEDS_CPU=y
+CONFIG_LEDS_DA903X=m
+CONFIG_LEDS_DAC124S085=m
+CONFIG_LEDS_DELL_NETBOOKS=m
+CONFIG_LEDS_GPIO=m
+CONFIG_LEDS_GPIO_PLATFORM=y
+CONFIG_LEDS_LP3944=m
+CONFIG_LEDS_NET48XX=m
+CONFIG_LEDS_PCA9532=m
+CONFIG_LEDS_PCA955X=m
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_BACKLIGHT=m
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=m
+CONFIG_LEDS_TRIGGER_GPIO=m
+CONFIG_LEDS_TRIGGER_HEARTBEAT=m
+CONFIG_LEDS_TRIGGER_TIMER=m
+CONFIG_LEDS_WM831X_STATUS=m
+CONFIG_LEDS_WM8350=m
+CONFIG_LEDS_WRAP=m
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=0
+# CONFIG_LGUEST is not set
+# CONFIG_LGUEST_GUEST is not set
+CONFIG_LIB80211=m
+CONFIG_LIB80211_CRYPT_CCMP=m
+CONFIG_LIB80211_CRYPT_TKIP=m
+CONFIG_LIB80211_CRYPT_WEP=m
+# CONFIG_LIB80211_DEBUG is not set
+CONFIG_LIBCRC32C=m
+CONFIG_LIBERTAS=m
+CONFIG_LIBERTAS_CS=m
+# CONFIG_LIBERTAS_DEBUG is not set
+CONFIG_LIBERTAS_SDIO=m
+CONFIG_LIBERTAS_SPI=m
+CONFIG_LIBERTAS_THINFIRM=m
+CONFIG_LIBERTAS_THINFIRM_USB=m
+CONFIG_LIBERTAS_USB=m
+CONFIG_LIBFC=m
+CONFIG_LIBFCOE=m
+CONFIG_LIBIPW=m
+CONFIG_LIBIPW_DEBUG=y
+CONFIG_LINE6_USB=m
+CONFIG_LIRC_ATIUSB=m
+CONFIG_LIRC_BT829=m
+CONFIG_LIRC_CONFIG_LIRC_WPC8769L=m
+CONFIG_LIRC_DEV=m
+CONFIG_LIRC_ENE0100=m
+# CONFIG_LIRC_GPIO is not set
+CONFIG_LIRC_I2C=m
+CONFIG_LIRC_IGORPLUGUSB=m
+CONFIG_LIRC_IMON=m
+CONFIG_LIRC_IT87=m
+CONFIG_LIRC_ITE8709=m
+CONFIG_LIRC_MCEUSB=m
+# CONFIG_LIRC_PARALLEL is not set
+CONFIG_LIRC_SASEM=m
+CONFIG_LIRC_SERIAL=m
+CONFIG_LIRC_SIR=m
+CONFIG_LIRC_STREAMZAP=m
+CONFIG_LIRC_TTUSBIR=m
+CONFIG_LIS3L02DQ=m
+CONFIG_LITELINK_DONGLE=m
+# CONFIG_LKDTM is not set
+CONFIG_LLC=y
+CONFIG_LNE390=m
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_LOCKD=m
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_LOCKD_V4=y
+CONFIG_LOCK_KERNEL=y
+# CONFIG_LOCK_STAT is not set
+CONFIG_LOGIRUMBLEPAD2_FF=y
+CONFIG_LOGITECH_FF=y
+# CONFIG_LOGO is not set
+CONFIG_LP486E=m
+# CONFIG_LP_CONSOLE is not set
+CONFIG_LSI_ET1011C_PHY=y
+CONFIG_LSM_MMAP_MIN_ADDR=0
+CONFIG_LTPC=m
+CONFIG_LXT_PHY=y
+CONFIG_LZO_COMPRESS=m
+CONFIG_LZO_DECOMPRESS=m
+CONFIG_M25PXX_USE_FAST_READ=y
+# CONFIG_M386 is not set
+# CONFIG_M586MMX is not set
+# CONFIG_M686 is not set
+CONFIG_MA600_DONGLE=m
+CONFIG_MAC80211=m
+CONFIG_MAC80211_DEBUGFS=y
+# CONFIG_MAC80211_DEBUG_MENU is not set
+CONFIG_MAC80211_HAS_RC=y
+CONFIG_MAC80211_HWSIM=m
+CONFIG_MAC80211_LEDS=y
+CONFIG_MAC80211_MESH=y
+CONFIG_MAC80211_RC_DEFAULT="minstrel"
+CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
+# CONFIG_MAC80211_RC_DEFAULT_PID is not set
+CONFIG_MAC80211_RC_MINSTREL=y
+CONFIG_MACHZ_WDT=m
+CONFIG_MACH_VERSATILE_AB=y
+CONFIG_MACINTOSH_DRIVERS=y
+CONFIG_MACVLAN=m
+CONFIG_MAC_EMUMOUSEBTN=y
+CONFIG_MAC_PARTITION=y
+CONFIG_MADGEMC=m
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_MARVELL_PHY=y
+# CONFIG_MATH_EMULATION is not set
+# CONFIG_MATOM is not set
+CONFIG_MAX1363=m
+# CONFIG_MAXSMP is not set
+CONFIG_MAX_RAW_DEVS=256
+CONFIG_MCA=y
+CONFIG_MCA_LEGACY=y
+# CONFIG_MCA_PROC_FS is not set
+# CONFIG_MCORE2 is not set
+CONFIG_MCP2120_DONGLE=m
+# CONFIG_MCRUSOE is not set
+CONFIG_MCS_FIR=m
+# CONFIG_MCYRIXIII is not set
+CONFIG_MD=y
+CONFIG_MDA_CONSOLE=m
+CONFIG_MDIO=m
+CONFIG_MDIO_BITBANG=y
+CONFIG_MDIO_GPIO=y
+CONFIG_MD_AUTODETECT=y
+CONFIG_MD_FAULTY=m
+CONFIG_MD_LINEAR=m
+CONFIG_MD_MULTIPATH=m
+CONFIG_MD_RAID0=m
+CONFIG_MD_RAID1=m
+CONFIG_MD_RAID10=m
+CONFIG_MD_RAID456=m
+CONFIG_MD_RAID6_PQ=m
+CONFIG_MEDIA_ATTACH=y
+CONFIG_MEDIA_SUPPORT=m
+CONFIG_MEDIA_TUNER=m
+# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
+CONFIG_MEDIA_TUNER_MC44S803=m
+CONFIG_MEDIA_TUNER_MT2060=m
+CONFIG_MEDIA_TUNER_MT20XX=m
+CONFIG_MEDIA_TUNER_MT2131=m
+CONFIG_MEDIA_TUNER_MT2266=m
+CONFIG_MEDIA_TUNER_MXL5005S=m
+CONFIG_MEDIA_TUNER_MXL5007T=m
+CONFIG_MEDIA_TUNER_QT1010=m
+CONFIG_MEDIA_TUNER_SIMPLE=m
+CONFIG_MEDIA_TUNER_TDA18271=m
+CONFIG_MEDIA_TUNER_TDA827X=m
+CONFIG_MEDIA_TUNER_TDA8290=m
+CONFIG_MEDIA_TUNER_TDA9887=m
+CONFIG_MEDIA_TUNER_TEA5761=m
+CONFIG_MEDIA_TUNER_TEA5767=m
+CONFIG_MEDIA_TUNER_XC2028=m
+CONFIG_MEDIA_TUNER_XC5000=m
+# CONFIG_MEFFICEON is not set
+CONFIG_MEGARAID_LEGACY=m
+CONFIG_MEGARAID_MAILBOX=m
+CONFIG_MEGARAID_MM=m
+CONFIG_MEGARAID_NEWGEN=y
+CONFIG_MEGARAID_SAS=m
+CONFIG_MEMORY_FAILURE=y
+CONFIG_MEMORY_HOTPLUG_SPARSE=y
+CONFIG_MEMORY_HOTREMOVE=y
+CONFIG_MEMSTICK=m
+# CONFIG_MEMSTICK_DEBUG is not set
+CONFIG_MEMSTICK_JMICRON_38X=m
+CONFIG_MEMSTICK_TIFM_MS=m
+# CONFIG_MEMSTICK_UNSAFE_RESUME is not set
+# CONFIG_MEMTEST is not set
+# CONFIG_MFD_ASIC3 is not set
+CONFIG_MFD_CORE=m
+CONFIG_MFD_MC13783=m
+CONFIG_MFD_PCF50633=m
+CONFIG_MFD_SM501=m
+# CONFIG_MFD_SM501_GPIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_MFD_TMIO is not set
+CONFIG_MFD_WM831X=m
+CONFIG_MFD_WM8350=m
+CONFIG_MFD_WM8350_I2C=m
+CONFIG_MFD_WM8400=m
+# CONFIG_MGEODEGX1 is not set
+# CONFIG_MGEODE_LX is not set
+CONFIG_MG_DISK=m
+CONFIG_MG_DISK_RES=0
+CONFIG_MICROCODE=m
+CONFIG_MICROCODE_AMD=y
+CONFIG_MICROCODE_INTEL=y
+CONFIG_MICROCODE_OLD_INTERFACE=y
+CONFIG_MIGRATION=y
+CONFIG_MINIX_FS=m
+CONFIG_MINIX_SUBPARTITION=y
+CONFIG_MISC_DEVICES=y
+CONFIG_MISC_FILESYSTEMS=y
+CONFIG_MISDN=m
+CONFIG_MISDN_AVMFRITZ=m
+CONFIG_MISDN_DSP=m
+CONFIG_MISDN_HFCMULTI=m
+CONFIG_MISDN_HFCPCI=m
+CONFIG_MISDN_HFCUSB=m
+CONFIG_MISDN_INFINEON=m
+CONFIG_MISDN_IPAC=m
+CONFIG_MISDN_ISAR=m
+CONFIG_MISDN_L1OIP=m
+CONFIG_MISDN_NETJET=m
+CONFIG_MISDN_SPEEDFAX=m
+CONFIG_MISDN_W6692=m
+CONFIG_MIXCOMWD=m
+# CONFIG_MK6 is not set
+# CONFIG_MK7 is not set
+# CONFIG_MK8 is not set
+CONFIG_MKISS=m
+CONFIG_MLX4_CORE=m
+CONFIG_MLX4_DEBUG=y
+CONFIG_MLX4_EN=m
+CONFIG_MLX4_INFINIBAND=m
+CONFIG_MMC=y
+CONFIG_MMC_ARMMMCI=y
+# CONFIG_MMC_AT91 is not set
+# CONFIG_MMC_ATMELMCI is not set
+CONFIG_MMC_BLOCK_BOUNCE=y
+CONFIG_MMC_CB710=m
+# CONFIG_MMC_DEBUG is not set
+CONFIG_MMC_RICOH_MMC=m
+CONFIG_MMC_SDHCI=m
+CONFIG_MMC_SDHCI_PCI=m
+CONFIG_MMC_SDHCI_PLTFM=m
+CONFIG_MMC_SDRICOH_CS=m
+CONFIG_MMC_SPI=m
+# CONFIG_MMC_TEST is not set
+CONFIG_MMC_TIFM_SD=m
+# CONFIG_MMC_UNSAFE_RESUME is not set
+CONFIG_MMC_VIA_SDMMC=m
+CONFIG_MMC_WBSD=m
+CONFIG_MMIOTRACE=y
+# CONFIG_MMIOTRACE_TEST is not set
+CONFIG_MMU=y
+CONFIG_MMU_NOTIFIER=y
+CONFIG_MM_OWNER=y
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_MODULE_SRCVERSION_ALL=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+CONFIG_MOUSE_APPLETOUCH=m
+# CONFIG_MOUSE_ATIXL is not set
+CONFIG_MOUSE_BCM5974=m
+CONFIG_MOUSE_GPIO=m
+CONFIG_MOUSE_INPORT=m
+CONFIG_MOUSE_LOGIBM=m
+CONFIG_MOUSE_PC110PAD=m
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_ELANTECH=y
+CONFIG_MOUSE_PS2_LIFEBOOK=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_OLPC=y
+CONFIG_MOUSE_PS2_SENTELIC=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+CONFIG_MOUSE_SERIAL=m
+CONFIG_MOUSE_SYNAPTICS_I2C=m
+CONFIG_MOXA_INTELLIO=m
+CONFIG_MOXA_SMARTIO=m
+# CONFIG_MPENTIUM4 is not set
+# CONFIG_MPENTIUMII is not set
+# CONFIG_MPENTIUMIII is not set
+# CONFIG_MPENTIUMM is not set
+# CONFIG_MPSC is not set
+CONFIG_MSDOS_FS=m
+CONFIG_MSDOS_PARTITION=y
+CONFIG_MSI_LAPTOP=m
+CONFIG_MSNDCLAS_INIT_FILE="/etc/sound/msndinit.bin"
+CONFIG_MSNDCLAS_PERM_FILE="/etc/sound/msndperm.bin"
+CONFIG_MSNDPIN_INIT_FILE="/etc/sound/pndspini.bin"
+CONFIG_MSNDPIN_PERM_FILE="/etc/sound/pndsperm.bin"
+CONFIG_MSPRO_BLOCK=m
+CONFIG_MTDRAM_ERASE_SIZE=128
+CONFIG_MTDRAM_TOTAL_SIZE=4096
+# CONFIG_MTD_AFS_PARTS is not set
+CONFIG_MTD_ALAUDA=m
+CONFIG_MTD_AMD76XROM=m
+CONFIG_MTD_AR7_PARTS=m
+CONFIG_MTD_ARM_INTEGRATOR=y
+CONFIG_MTD_BLOCK2MTD=m
+CONFIG_MTD_BLOCK_RO=m
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_GEOMETRY is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+CONFIG_MTD_CFI_NOSWAP=y
+CONFIG_MTD_CK804XROM=m
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_DATAFLASH=m
+CONFIG_MTD_DATAFLASH_OTP=y
+# CONFIG_MTD_DATAFLASH_WRITE_VERIFY is not set
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_DOCECC=m
+CONFIG_MTD_DOCPROBE=m
+CONFIG_MTD_DOCPROBE_ADDRESS=0
+# CONFIG_MTD_DOCPROBE_ADVANCED is not set
+CONFIG_MTD_ESB2ROM=m
+CONFIG_MTD_GPIO_ADDR=m
+CONFIG_MTD_ICHXROM=m
+CONFIG_MTD_INTEL_VR_NOR=m
+CONFIG_MTD_L440GX=m
+CONFIG_MTD_LPDDR=m
+CONFIG_MTD_M25P80=m
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+CONFIG_MTD_NAND_CAFE=m
+CONFIG_MTD_NAND_CS553X=m
+CONFIG_MTD_NAND_DISKONCHIP=m
+# CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE is not set
+CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0
+# CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED is not set
+# CONFIG_MTD_NAND_ECC_SMC is not set
+CONFIG_MTD_NAND_IDS=m
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+CONFIG_MTD_NAND_NANDSIM=m
+CONFIG_MTD_NAND_PLATFORM=m
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+CONFIG_MTD_NETSC520=m
+CONFIG_MTD_NETtel=m
+CONFIG_MTD_ONENAND_2X_PROGRAM=y
+CONFIG_MTD_ONENAND_GENERIC=m
+# CONFIG_MTD_ONENAND_OTP is not set
+CONFIG_MTD_ONENAND_SIM=m
+CONFIG_MTD_ONENAND_VERIFY_WRITE=y
+CONFIG_MTD_OOPS=m
+# CONFIG_MTD_OTP is not set
+CONFIG_MTD_PARTITIONS=y
+CONFIG_MTD_PCI=m
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+CONFIG_MTD_PMC551=m
+# CONFIG_MTD_PMC551_BUGFIX is not set
+# CONFIG_MTD_PMC551_DEBUG is not set
+CONFIG_MTD_QINFO_PROBE=m
+CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
+# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
+# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
+CONFIG_MTD_SBC_GXX=m
+CONFIG_MTD_SC520CDP=m
+CONFIG_MTD_SCB2_FLASH=m
+CONFIG_MTD_SCx200_DOCFLASH=m
+CONFIG_MTD_SST25L=m
+CONFIG_MTD_TESTS=m
+CONFIG_MTD_TS5500=m
+CONFIG_MTD_UBI=m
+CONFIG_MTD_UBI_BEB_RESERVE=1
+# CONFIG_MTD_UBI_DEBUG is not set
+CONFIG_MTD_UBI_GLUEBI=m
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_MTRR=y
+CONFIG_MTRR_SANITIZER=y
+CONFIG_MTRR_SANITIZER_ENABLE_DEFAULT=0
+CONFIG_MTRR_SANITIZER_SPARE_REG_NR_DEFAULT=1
+# CONFIG_MULTICORE_RAID456 is not set
+# CONFIG_MVIAC3_2 is not set
+# CONFIG_MVIAC7 is not set
+CONFIG_MWAVE=m
+# CONFIG_MWINCHIP3D is not set
+# CONFIG_MWINCHIPC6 is not set
+CONFIG_MWL8K=m
+CONFIG_MYRI10GE=m
+CONFIG_MYRI10GE_DCA=y
+CONFIG_N2=m
+CONFIG_NAMESPACES=y
+CONFIG_NATIONAL_PHY=y
+CONFIG_NATSEMI=m
+CONFIG_NCPFS_EXTRAS=y
+CONFIG_NCPFS_IOCTL_LOCKING=y
+CONFIG_NCPFS_NFS_NS=y
+CONFIG_NCPFS_NLS=y
+CONFIG_NCPFS_OS2_NS=y
+CONFIG_NCPFS_PACKET_SIGNING=y
+# CONFIG_NCPFS_SMALLDOS is not set
+CONFIG_NCPFS_STRONG=y
+CONFIG_NCP_FS=m
+CONFIG_NE2000=m
+CONFIG_NE2K_PCI=m
+CONFIG_NE2_MCA=m
+CONFIG_NE3210=m
+CONFIG_NEED_MULTIPLE_NODES=y
+CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y
+CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y
+CONFIG_NEON=y
+CONFIG_NET=y
+CONFIG_NETCONSOLE=m
+CONFIG_NETCONSOLE_DYNAMIC=y
+CONFIG_NETDEVICES=y
+CONFIG_NETDEV_1000=y
+CONFIG_NETDEV_10000=y
+CONFIG_NETFILTER=y
+CONFIG_NETFILTER_ADVANCED=y
+# CONFIG_NETFILTER_DEBUG is not set
+CONFIG_NETFILTER_NETLINK=m
+CONFIG_NETFILTER_NETLINK_LOG=m
+CONFIG_NETFILTER_NETLINK_QUEUE=m
+CONFIG_NETFILTER_TPROXY=m
+CONFIG_NETFILTER_XTABLES=m
+CONFIG_NETFILTER_XT_MATCH_CLUSTER=m
+CONFIG_NETFILTER_XT_MATCH_COMMENT=m
+CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
+CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
+CONFIG_NETFILTER_XT_MATCH_DCCP=m
+CONFIG_NETFILTER_XT_MATCH_DSCP=m
+CONFIG_NETFILTER_XT_MATCH_ESP=m
+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
+CONFIG_NETFILTER_XT_MATCH_HELPER=m
+CONFIG_NETFILTER_XT_MATCH_HL=m
+CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
+CONFIG_NETFILTER_XT_MATCH_LENGTH=m
+CONFIG_NETFILTER_XT_MATCH_LIMIT=m
+CONFIG_NETFILTER_XT_MATCH_MAC=m
+CONFIG_NETFILTER_XT_MATCH_MARK=m
+CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
+CONFIG_NETFILTER_XT_MATCH_OSF=m
+CONFIG_NETFILTER_XT_MATCH_OWNER=m
+CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
+CONFIG_NETFILTER_XT_MATCH_POLICY=m
+CONFIG_NETFILTER_XT_MATCH_QUOTA=m
+CONFIG_NETFILTER_XT_MATCH_RATEEST=m
+CONFIG_NETFILTER_XT_MATCH_REALM=m
+CONFIG_NETFILTER_XT_MATCH_RECENT=m
+# CONFIG_NETFILTER_XT_MATCH_RECENT_PROC_COMPAT is not set
+CONFIG_NETFILTER_XT_MATCH_SCTP=m
+CONFIG_NETFILTER_XT_MATCH_SOCKET=m
+CONFIG_NETFILTER_XT_MATCH_STATE=m
+CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
+CONFIG_NETFILTER_XT_MATCH_STRING=m
+CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
+CONFIG_NETFILTER_XT_MATCH_TIME=m
+CONFIG_NETFILTER_XT_MATCH_U32=m
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
+CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
+CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m
+CONFIG_NETFILTER_XT_TARGET_DSCP=m
+CONFIG_NETFILTER_XT_TARGET_HL=m
+CONFIG_NETFILTER_XT_TARGET_LED=m
+CONFIG_NETFILTER_XT_TARGET_MARK=m
+CONFIG_NETFILTER_XT_TARGET_NFLOG=m
+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
+CONFIG_NETFILTER_XT_TARGET_NOTRACK=m
+CONFIG_NETFILTER_XT_TARGET_RATEEST=m
+CONFIG_NETFILTER_XT_TARGET_SECMARK=m
+CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
+# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
+CONFIG_NETFILTER_XT_TARGET_TPROXY=m
+CONFIG_NETFILTER_XT_TARGET_TRACE=m
+CONFIG_NETLABEL=y
+CONFIG_NETPOLL=y
+# CONFIG_NETPOLL_TRAP is not set
+CONFIG_NETROM=m
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NETWORK_SECMARK=y
+CONFIG_NETXEN_NIC=m
+CONFIG_NET_9P=m
+# CONFIG_NET_9P_DEBUG is not set
+CONFIG_NET_9P_RDMA=m
+CONFIG_NET_9P_VIRTIO=m
+CONFIG_NET_ACT_GACT=m
+CONFIG_NET_ACT_IPT=m
+CONFIG_NET_ACT_MIRRED=m
+CONFIG_NET_ACT_NAT=m
+CONFIG_NET_ACT_PEDIT=m
+CONFIG_NET_ACT_POLICE=m
+CONFIG_NET_ACT_SIMP=m
+CONFIG_NET_ACT_SKBEDIT=m
+CONFIG_NET_CLS=y
+CONFIG_NET_CLS_ACT=y
+CONFIG_NET_CLS_BASIC=m
+CONFIG_NET_CLS_CGROUP=y
+CONFIG_NET_CLS_FLOW=m
+CONFIG_NET_CLS_FW=m
+# CONFIG_NET_CLS_IND is not set
+CONFIG_NET_CLS_ROUTE=y
+CONFIG_NET_CLS_ROUTE4=m
+CONFIG_NET_CLS_RSVP=m
+CONFIG_NET_CLS_RSVP6=m
+CONFIG_NET_CLS_TCINDEX=m
+CONFIG_NET_CLS_U32=m
+CONFIG_NET_DCCPPROBE=m
+CONFIG_NET_DMA=y
+# CONFIG_NET_DROP_MONITOR is not set
+CONFIG_NET_DSA=y
+CONFIG_NET_DSA_MV88E6060=y
+CONFIG_NET_DSA_MV88E6123_61_65=y
+CONFIG_NET_DSA_MV88E6131=y
+CONFIG_NET_DSA_MV88E6XXX=y
+CONFIG_NET_DSA_MV88E6XXX_NEED_PPU=y
+CONFIG_NET_DSA_TAG_DSA=y
+CONFIG_NET_DSA_TAG_EDSA=y
+CONFIG_NET_DSA_TAG_TRAILER=y
+CONFIG_NET_EMATCH=y
+CONFIG_NET_EMATCH_CMP=m
+CONFIG_NET_EMATCH_META=m
+CONFIG_NET_EMATCH_NBYTE=m
+CONFIG_NET_EMATCH_STACK=32
+CONFIG_NET_EMATCH_TEXT=m
+CONFIG_NET_EMATCH_U32=m
+CONFIG_NET_ETHERNET=y
+CONFIG_NET_FC=y
+CONFIG_NET_IPGRE=m
+CONFIG_NET_IPGRE_BROADCAST=y
+CONFIG_NET_IPIP=m
+CONFIG_NET_ISA=y
+CONFIG_NET_KEY=m
+# CONFIG_NET_KEY_MIGRATE is not set
+# CONFIG_NET_NS is not set
+CONFIG_NET_PCI=y
+CONFIG_NET_PCMCIA=y
+CONFIG_NET_PKTGEN=m
+CONFIG_NET_POCKET=y
+CONFIG_NET_POLL_CONTROLLER=y
+CONFIG_NET_SB1000=m
+CONFIG_NET_SCHED=y
+CONFIG_NET_SCH_ATM=m
+CONFIG_NET_SCH_CBQ=m
+CONFIG_NET_SCH_DRR=m
+CONFIG_NET_SCH_DSMARK=m
+CONFIG_NET_SCH_FIFO=y
+CONFIG_NET_SCH_GRED=m
+CONFIG_NET_SCH_HFSC=m
+CONFIG_NET_SCH_HTB=m
+CONFIG_NET_SCH_INGRESS=m
+CONFIG_NET_SCH_MULTIQ=m
+CONFIG_NET_SCH_NETEM=m
+CONFIG_NET_SCH_PRIO=m
+CONFIG_NET_SCH_RED=m
+CONFIG_NET_SCH_SFQ=m
+CONFIG_NET_SCH_TBF=m
+CONFIG_NET_SCH_TEQL=m
+CONFIG_NET_TCPPROBE=m
+CONFIG_NET_TULIP=y
+CONFIG_NET_VENDOR_3COM=y
+CONFIG_NET_VENDOR_RACAL=y
+CONFIG_NET_VENDOR_SMC=y
+CONFIG_NEW_LEDS=y
+CONFIG_NFSD=m
+CONFIG_NFSD_V2_ACL=y
+CONFIG_NFSD_V3=y
+CONFIG_NFSD_V3_ACL=y
+CONFIG_NFSD_V4=y
+CONFIG_NFS_ACL_SUPPORT=m
+CONFIG_NFS_COMMON=y
+CONFIG_NFS_FS=m
+# CONFIG_NFS_FSCACHE is not set
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+# CONFIG_NFS_V4_1 is not set
+CONFIG_NFTL_RW=y
+CONFIG_NF_CONNTRACK=m
+CONFIG_NF_CONNTRACK_AMANDA=m
+CONFIG_NF_CONNTRACK_EVENTS=y
+CONFIG_NF_CONNTRACK_FTP=m
+CONFIG_NF_CONNTRACK_H323=m
+CONFIG_NF_CONNTRACK_IPV4=m
+CONFIG_NF_CONNTRACK_IPV6=m
+CONFIG_NF_CONNTRACK_IRC=m
+CONFIG_NF_CONNTRACK_MARK=y
+CONFIG_NF_CONNTRACK_NETBIOS_NS=m
+CONFIG_NF_CONNTRACK_PPTP=m
+CONFIG_NF_CONNTRACK_PROC_COMPAT=y
+CONFIG_NF_CONNTRACK_SANE=m
+CONFIG_NF_CONNTRACK_SECMARK=y
+CONFIG_NF_CONNTRACK_SIP=m
+CONFIG_NF_CONNTRACK_TFTP=m
+CONFIG_NF_CT_ACCT=y
+CONFIG_NF_CT_NETLINK=m
+CONFIG_NF_CT_PROTO_DCCP=m
+CONFIG_NF_CT_PROTO_GRE=m
+CONFIG_NF_CT_PROTO_SCTP=m
+CONFIG_NF_CT_PROTO_UDPLITE=m
+CONFIG_NF_DEFRAG_IPV4=m
+CONFIG_NF_NAT=m
+CONFIG_NF_NAT_AMANDA=m
+CONFIG_NF_NAT_FTP=m
+CONFIG_NF_NAT_H323=m
+CONFIG_NF_NAT_IRC=m
+CONFIG_NF_NAT_NEEDED=y
+CONFIG_NF_NAT_PPTP=m
+CONFIG_NF_NAT_PROTO_DCCP=m
+CONFIG_NF_NAT_PROTO_GRE=m
+CONFIG_NF_NAT_PROTO_SCTP=m
+CONFIG_NF_NAT_PROTO_UDPLITE=m
+CONFIG_NF_NAT_SIP=m
+CONFIG_NF_NAT_SNMP_BASIC=m
+CONFIG_NF_NAT_TFTP=m
+CONFIG_NI52=m
+CONFIG_NI65=m
+CONFIG_NILFS2_FS=m
+CONFIG_NIU=m
+CONFIG_NL80211_TESTMODE=y
+CONFIG_NLATTR=y
+CONFIG_NLS=y
+CONFIG_NLS_ASCII=m
+CONFIG_NLS_CODEPAGE_1250=m
+CONFIG_NLS_CODEPAGE_1251=m
+CONFIG_NLS_CODEPAGE_437=m
+CONFIG_NLS_CODEPAGE_737=m
+CONFIG_NLS_CODEPAGE_775=m
+CONFIG_NLS_CODEPAGE_850=m
+CONFIG_NLS_CODEPAGE_852=m
+CONFIG_NLS_CODEPAGE_855=m
+CONFIG_NLS_CODEPAGE_857=m
+CONFIG_NLS_CODEPAGE_860=m
+CONFIG_NLS_CODEPAGE_861=m
+CONFIG_NLS_CODEPAGE_862=m
+CONFIG_NLS_CODEPAGE_863=m
+CONFIG_NLS_CODEPAGE_864=m
+CONFIG_NLS_CODEPAGE_865=m
+CONFIG_NLS_CODEPAGE_866=m
+CONFIG_NLS_CODEPAGE_869=m
+CONFIG_NLS_CODEPAGE_874=m
+CONFIG_NLS_CODEPAGE_932=m
+CONFIG_NLS_CODEPAGE_936=m
+CONFIG_NLS_CODEPAGE_949=m
+CONFIG_NLS_CODEPAGE_950=m
+CONFIG_NLS_DEFAULT="cp437"
+CONFIG_NLS_ISO8859_1=m
+CONFIG_NLS_ISO8859_13=m
+CONFIG_NLS_ISO8859_14=m
+CONFIG_NLS_ISO8859_15=m
+CONFIG_NLS_ISO8859_2=m
+CONFIG_NLS_ISO8859_3=m
+CONFIG_NLS_ISO8859_4=m
+CONFIG_NLS_ISO8859_5=m
+CONFIG_NLS_ISO8859_6=m
+CONFIG_NLS_ISO8859_7=m
+CONFIG_NLS_ISO8859_8=m
+CONFIG_NLS_ISO8859_9=m
+CONFIG_NLS_KOI8_R=m
+CONFIG_NLS_KOI8_U=m
+CONFIG_NLS_UTF8=m
+CONFIG_NODES_SHIFT=6
+CONFIG_NODES_SPAN_OTHER_NODES=y
+# CONFIG_NOHIGHMEM is not set
+CONFIG_NOP_TRACER=y
+CONFIG_NOP_USB_XCEIV=m
+CONFIG_NORTEL_HERMES=m
+CONFIG_NOZOMI=m
+CONFIG_NS83820=m
+CONFIG_NSC_FIR=m
+CONFIG_NSC_GPIO=m
+# CONFIG_NTFS_DEBUG is not set
+CONFIG_NTFS_FS=m
+# CONFIG_NTFS_RW is not set
+CONFIG_NUMA=y
+# CONFIG_NUMA_EMU is not set
+CONFIG_NUMA_IRQ_DESC=y
+CONFIG_NVRAM=m
+CONFIG_N_HDLC=m
+CONFIG_OABI_COMPAT=y
+# CONFIG_OCFS2_DEBUG_FS is not set
+CONFIG_OCFS2_DEBUG_MASKLOG=y
+CONFIG_OCFS2_FS=m
+CONFIG_OCFS2_FS_O2CB=m
+CONFIG_OCFS2_FS_POSIX_ACL=y
+CONFIG_OCFS2_FS_STATS=y
+CONFIG_OCFS2_FS_USERSPACE_CLUSTER=m
+CONFIG_OLD_BELKIN_DONGLE=m
+CONFIG_OLPC=y
+CONFIG_OMFS_FS=m
+CONFIG_OMNIBOOK=m
+CONFIG_OPROFILE=m
+CONFIG_OPROFILE_ARMV7=y
+# CONFIG_OPROFILE_EVENT_MULTIPLEX is not set
+CONFIG_OPROFILE_IBS=y
+CONFIG_OPTIMIZE_INLINING=y
+CONFIG_OSF_PARTITION=y
+# CONFIG_OTUS is not set
+CONFIG_P54_COMMON=m
+CONFIG_P54_LEDS=y
+CONFIG_P54_PCI=m
+CONFIG_P54_SPI=m
+CONFIG_P54_USB=m
+CONFIG_PACKARDBELL_E5=m
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_PAGE_OFFSET=0xC0000000
+# CONFIG_PAGE_POISONING is not set
+CONFIG_PANASONIC_LAPTOP=m
+CONFIG_PANEL=m
+# CONFIG_PANEL_CHANGE_MESSAGE is not set
+CONFIG_PANEL_PARPORT=0
+CONFIG_PANEL_PROFILE=5
+CONFIG_PANTHERLORD_FF=y
+CONFIG_PARAVIRT=y
+CONFIG_PARAVIRT_CLOCK=y
+# CONFIG_PARAVIRT_DEBUG is not set
+CONFIG_PARAVIRT_GUEST=y
+CONFIG_PARAVIRT_SPINLOCKS=y
+CONFIG_PARIDE=m
+CONFIG_PARIDE_ATEN=m
+CONFIG_PARIDE_BPCK=m
+CONFIG_PARIDE_BPCK6=m
+CONFIG_PARIDE_COMM=m
+CONFIG_PARIDE_DSTR=m
+CONFIG_PARIDE_EPAT=m
+# CONFIG_PARIDE_EPATC8 is not set
+CONFIG_PARIDE_EPIA=m
+CONFIG_PARIDE_FIT2=m
+CONFIG_PARIDE_FIT3=m
+CONFIG_PARIDE_FRIQ=m
+CONFIG_PARIDE_FRPW=m
+CONFIG_PARIDE_KBIC=m
+CONFIG_PARIDE_KTTI=m
+CONFIG_PARIDE_ON20=m
+CONFIG_PARIDE_ON26=m
+CONFIG_PARIDE_PCD=m
+CONFIG_PARIDE_PD=m
+CONFIG_PARIDE_PF=m
+CONFIG_PARIDE_PG=m
+CONFIG_PARIDE_PT=m
+CONFIG_PARPORT_1284=y
+CONFIG_PARPORT_AX88796=m
+# CONFIG_PARPORT_GSC is not set
+CONFIG_PARPORT_NOT_PC=y
+CONFIG_PARPORT_PC=m
+CONFIG_PARPORT_PC_FIFO=y
+CONFIG_PARPORT_PC_PCMCIA=m
+# CONFIG_PARPORT_PC_SUPERIO is not set
+CONFIG_PARPORT_SERIAL=m
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_PATA_ACPI=y
+CONFIG_PATA_ALI=m
+CONFIG_PATA_AMD=m
+CONFIG_PATA_ARTOP=m
+CONFIG_PATA_ATIIXP=m
+CONFIG_PATA_ATP867X=m
+CONFIG_PATA_CMD640_PCI=m
+CONFIG_PATA_CMD64X=m
+CONFIG_PATA_CS5520=m
+CONFIG_PATA_CS5530=m
+CONFIG_PATA_CS5535=m
+CONFIG_PATA_CS5536=m
+CONFIG_PATA_CYPRESS=m
+CONFIG_PATA_EFAR=m
+CONFIG_PATA_HPT366=m
+CONFIG_PATA_HPT37X=m
+CONFIG_PATA_HPT3X2N=m
+CONFIG_PATA_HPT3X3=m
+# CONFIG_PATA_HPT3X3_DMA is not set
+CONFIG_PATA_ISAPNP=m
+CONFIG_PATA_IT8213=m
+CONFIG_PATA_IT821X=m
+CONFIG_PATA_JMICRON=m
+CONFIG_PATA_LEGACY=m
+CONFIG_PATA_MARVELL=m
+CONFIG_PATA_MPIIX=m
+CONFIG_PATA_NETCELL=m
+CONFIG_PATA_NINJA32=m
+CONFIG_PATA_NS87410=m
+CONFIG_PATA_NS87415=m
+CONFIG_PATA_OLDPIIX=m
+CONFIG_PATA_OPTI=m
+CONFIG_PATA_OPTIDMA=m
+CONFIG_PATA_PCMCIA=m
+CONFIG_PATA_PDC2027X=m
+CONFIG_PATA_PDC_OLD=m
+CONFIG_PATA_QDI=m
+CONFIG_PATA_RADISYS=m
+CONFIG_PATA_RDC=m
+CONFIG_PATA_RZ1000=m
+CONFIG_PATA_SC1200=m
+CONFIG_PATA_SCH=m
+CONFIG_PATA_SERVERWORKS=m
+CONFIG_PATA_SIL680=m
+CONFIG_PATA_SIS=y
+CONFIG_PATA_TRIFLEX=m
+CONFIG_PATA_VIA=m
+CONFIG_PATA_WINBOND=m
+CONFIG_PATA_WINBOND_VLB=m
+# CONFIG_PC300TOO is not set
+CONFIG_PC8736x_GPIO=m
+CONFIG_PC87413_WDT=m
+CONFIG_PCCARD_NONSTATIC=m
+CONFIG_PCF50633_ADC=m
+CONFIG_PCF50633_GPIO=m
+CONFIG_PCI=y
+CONFIG_PCI200SYN=m
+CONFIG_PCIEAER=y
+# CONFIG_PCIEAER_INJECT is not set
+# CONFIG_PCIEASPM is not set
+CONFIG_PCIEPORTBUS=y
+# CONFIG_PCIE_ECRC is not set
+CONFIG_PCIPCWATCHDOG=m
+CONFIG_PCI_ATMEL=m
+CONFIG_PCI_BIOS=y
+# CONFIG_PCI_DEBUG is not set
+CONFIG_PCI_DIRECT=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_GOANY=y
+# CONFIG_PCI_GOBIOS is not set
+# CONFIG_PCI_GODIRECT is not set
+# CONFIG_PCI_GOMMCONFIG is not set
+# CONFIG_PCI_GOOLPC is not set
+CONFIG_PCI_HERMES=m
+CONFIG_PCI_IOV=y
+CONFIG_PCI_LEGACY=y
+CONFIG_PCI_MMCONFIG=y
+CONFIG_PCI_MSI=y
+CONFIG_PCI_OLPC=y
+CONFIG_PCI_QUIRKS=y
+CONFIG_PCI_STUB=m
+CONFIG_PCI_SYSCALL=y
+CONFIG_PCMCIA=m
+CONFIG_PCMCIA_3C574=m
+CONFIG_PCMCIA_3C589=m
+CONFIG_PCMCIA_AHA152X=m
+CONFIG_PCMCIA_ATMEL=m
+CONFIG_PCMCIA_AXNET=m
+# CONFIG_PCMCIA_DEBUG is not set
+CONFIG_PCMCIA_FDOMAIN=m
+CONFIG_PCMCIA_FMVJ18X=m
+CONFIG_PCMCIA_HERMES=m
+CONFIG_PCMCIA_IBMTR=m
+CONFIG_PCMCIA_IOCTL=y
+CONFIG_PCMCIA_LOAD_CIS=y
+CONFIG_PCMCIA_NETWAVE=m
+CONFIG_PCMCIA_NINJA_SCSI=m
+CONFIG_PCMCIA_NMCLAN=m
+CONFIG_PCMCIA_PCNET=m
+CONFIG_PCMCIA_PROBE=y
+CONFIG_PCMCIA_QLOGIC=m
+CONFIG_PCMCIA_RAYCS=m
+CONFIG_PCMCIA_SMC91C92=m
+CONFIG_PCMCIA_SPECTRUM=m
+CONFIG_PCMCIA_SYM53C500=m
+CONFIG_PCMCIA_WAVELAN=m
+CONFIG_PCMCIA_WL3501=m
+CONFIG_PCMCIA_XIRC2PS=m
+CONFIG_PCMCIA_XIRCOM=m
+CONFIG_PCNET32=m
+CONFIG_PCSPKR_PLATFORM=y
+CONFIG_PCWATCHDOG=m
+CONFIG_PD6729=m
+CONFIG_PDA_POWER=m
+CONFIG_PDC_ADMA=y
+CONFIG_PERF_COUNTERS=y
+CONFIG_PERF_EVENTS=y
+CONFIG_PHANTOM=m
+CONFIG_PHONE=m
+CONFIG_PHONET=m
+CONFIG_PHONE_IXJ=m
+CONFIG_PHONE_IXJ_PCMCIA=m
+CONFIG_PHYLIB=y
+CONFIG_PID_NS=y
+CONFIG_PLAN9AUTH=m
+CONFIG_PLIP=m
+CONFIG_PLX_HERMES=m
+CONFIG_PM=y
+CONFIG_PMIC_DA903X=y
+CONFIG_PM_DISABLE_CONSOLE=y
+CONFIG_PM_RUNTIME=y
+CONFIG_PM_SLEEP=y
+CONFIG_PM_SLEEP_SMP=y
+CONFIG_PM_STD_PARTITION=""
+CONFIG_PM_TEST_SUSPEND=y
+CONFIG_PM_TRACE=y
+CONFIG_PM_TRACE_RTC=y
+# CONFIG_PM_VERBOSE is not set
+CONFIG_PNP=y
+CONFIG_PNPACPI=y
+CONFIG_PNPBIOS=y
+CONFIG_PNPBIOS_PROC_FS=y
+CONFIG_PNP_DEBUG_MESSAGES=y
+CONFIG_POHMELFS=m
+CONFIG_POHMELFS_CRYPTO=y
+# CONFIG_POHMELFS_DEBUG is not set
+CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
+CONFIG_POWER_SUPPLY=y
+# CONFIG_POWER_SUPPLY_DEBUG is not set
+# CONFIG_POWER_TRACER is not set
+CONFIG_PPDEV=m
+CONFIG_PPP=y
+CONFIG_PPPOATM=m
+CONFIG_PPPOE=m
+CONFIG_PPPOL2TP=m
+CONFIG_PPP_ASYNC=m
+CONFIG_PPP_BSDCOMP=m
+CONFIG_PPP_DEFLATE=m
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_MPPE=m
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPP_SYNC_TTY=m
+CONFIG_PPS=m
+# CONFIG_PPS_DEBUG is not set
+CONFIG_PREEMPT_NOTIFIERS=y
+# CONFIG_PREEMPT_TRACER is not set
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_PRINTER=m
+CONFIG_PRINTK=y
+CONFIG_PRINTK_TIME=y
+# CONFIG_PRINT_QUOTA_WARNING is not set
+CONFIG_PRISM2_USB=m
+CONFIG_PRISM54=m
+CONFIG_PROC_EVENTS=y
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_PROC_PID_CPUSET=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_VMCORE=y
+# CONFIG_PROFILE_ALL_BRANCHES is not set
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+CONFIG_PROFILING=y
+CONFIG_PROTEON=m
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_PROVIDE_OHCI1394_DMA_INIT is not set
+# CONFIG_PSS_HAVE_BOOT is not set
+CONFIG_PSS_MIXER=y
+CONFIG_QFMT_V1=m
+CONFIG_QFMT_V2=m
+CONFIG_QLA3XXX=m
+CONFIG_QLGE=m
+CONFIG_QNX4FS_FS=m
+CONFIG_QSEMI_PHY=y
+CONFIG_QT2160=m
+CONFIG_QUOTA=y
+CONFIG_QUOTACTL=y
+CONFIG_QUOTA_NETLINK_INTERFACE=y
+CONFIG_QUOTA_TREE=m
+# CONFIG_R6040 is not set
+CONFIG_R8169=m
+CONFIG_R8169_VLAN=y
+CONFIG_RADIO_ADAPTERS=y
+CONFIG_RADIO_AZTECH=m
+CONFIG_RADIO_CADET=m
+CONFIG_RADIO_GEMTEK=m
+CONFIG_RADIO_GEMTEK_PCI=m
+CONFIG_RADIO_MAESTRO=m
+CONFIG_RADIO_MAXIRADIO=m
+CONFIG_RADIO_RTRACK=m
+CONFIG_RADIO_RTRACK2=m
+CONFIG_RADIO_SF16FMI=m
+CONFIG_RADIO_SF16FMR2=m
+CONFIG_RADIO_SI470X=y
+CONFIG_RADIO_SI4713=m
+CONFIG_RADIO_TEA5764=m
+CONFIG_RADIO_TERRATEC=m
+CONFIG_RADIO_TRUST=m
+CONFIG_RADIO_TYPHOON=m
+CONFIG_RADIO_ZOLTRIX=m
+CONFIG_RAR_REGISTER=m
+CONFIG_RAW_DRIVER=m
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RDS=m
+# CONFIG_RDS_DEBUG is not set
+CONFIG_RDS_RDMA=m
+CONFIG_RDS_TCP=m
+CONFIG_RD_BZIP2=y
+CONFIG_RD_GZIP=y
+CONFIG_RD_LZMA=y
+CONFIG_REALTEK_PHY=y
+CONFIG_REED_SOLOMON=m
+CONFIG_REED_SOLOMON_DEC16=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_AB3100=m
+CONFIG_REGULATOR_BQ24022=m
+CONFIG_REGULATOR_DA903X=m
+# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
+CONFIG_REGULATOR_LP3971=m
+CONFIG_REGULATOR_MAX1586=m
+CONFIG_REGULATOR_MC13783=m
+CONFIG_REGULATOR_PCF50633=m
+CONFIG_REGULATOR_TPS65023=m
+CONFIG_REGULATOR_TPS6507X=m
+CONFIG_REGULATOR_TWL4030=y
+CONFIG_REGULATOR_USERSPACE_CONSUMER=m
+CONFIG_REGULATOR_VIRTUAL_CONSUMER=m
+CONFIG_REGULATOR_WM831X=m
+CONFIG_REGULATOR_WM8350=m
+CONFIG_REGULATOR_WM8400=m
+# CONFIG_REISERFS_CHECK is not set
+CONFIG_REISERFS_FS=m
+CONFIG_REISERFS_FS_POSIX_ACL=y
+CONFIG_REISERFS_FS_SECURITY=y
+CONFIG_REISERFS_FS_XATTR=y
+# CONFIG_REISERFS_PROC_INFO is not set
+CONFIG_RELAY=y
+CONFIG_RELOCATABLE=y
+CONFIG_RESOURCE_COUNTERS=y
+CONFIG_RFKILL=y
+CONFIG_RFKILL_INPUT=y
+CONFIG_RFKILL_LEDS=y
+CONFIG_RING_BUFFER=y
+CONFIG_RING_BUFFER_ALLOW_SWAP=y
+# CONFIG_RING_BUFFER_BENCHMARK is not set
+CONFIG_RISCOM8=m
+CONFIG_ROADRUNNER=m
+# CONFIG_ROADRUNNER_LARGE_RINGS is not set
+CONFIG_ROCKETPORT=m
+CONFIG_ROMFS_BACKED_BY_BLOCK=y
+# CONFIG_ROMFS_BACKED_BY_BOTH is not set
+# CONFIG_ROMFS_BACKED_BY_MTD is not set
+CONFIG_ROMFS_FS=m
+CONFIG_ROMFS_ON_BLOCK=y
+CONFIG_ROSE=m
+CONFIG_RPCSEC_GSS_KRB5=m
+CONFIG_RT2400PCI=m
+CONFIG_RT2500PCI=m
+CONFIG_RT2500USB=m
+CONFIG_RT2800USB=m
+CONFIG_RT2860=m
+CONFIG_RT2870=m
+CONFIG_RT2X00=m
+# CONFIG_RT2X00_DEBUG is not set
+CONFIG_RT2X00_LIB=m
+CONFIG_RT2X00_LIB_CRYPTO=y
+# CONFIG_RT2X00_LIB_DEBUGFS is not set
+CONFIG_RT2X00_LIB_FIRMWARE=y
+CONFIG_RT2X00_LIB_HT=y
+CONFIG_RT2X00_LIB_LEDS=y
+CONFIG_RT2X00_LIB_PCI=m
+CONFIG_RT2X00_LIB_USB=m
+CONFIG_RT3090=m
+CONFIG_RT61PCI=m
+CONFIG_RT73USB=m
+CONFIG_RTC_CLASS=y
+# CONFIG_RTC_DEBUG is not set
+CONFIG_RTC_DRV_AB3100=m
+CONFIG_RTC_DRV_BQ4802=m
+CONFIG_RTC_DRV_CMOS=y
+CONFIG_RTC_DRV_DS1286=m
+CONFIG_RTC_DRV_DS1305=m
+CONFIG_RTC_DRV_DS1307=m
+CONFIG_RTC_DRV_DS1374=m
+CONFIG_RTC_DRV_DS1390=m
+CONFIG_RTC_DRV_DS1511=m
+CONFIG_RTC_DRV_DS1553=m
+CONFIG_RTC_DRV_DS1672=m
+CONFIG_RTC_DRV_DS1742=m
+CONFIG_RTC_DRV_DS3234=m
+CONFIG_RTC_DRV_FM3130=m
+CONFIG_RTC_DRV_ISL1208=m
+CONFIG_RTC_DRV_M41T80=m
+CONFIG_RTC_DRV_M41T80_WDT=y
+CONFIG_RTC_DRV_M41T94=m
+CONFIG_RTC_DRV_M48T35=m
+CONFIG_RTC_DRV_M48T59=m
+CONFIG_RTC_DRV_M48T86=m
+CONFIG_RTC_DRV_MAX6900=m
+CONFIG_RTC_DRV_MAX6902=m
+CONFIG_RTC_DRV_PCF2123=m
+CONFIG_RTC_DRV_PCF50633=m
+CONFIG_RTC_DRV_PCF8563=m
+CONFIG_RTC_DRV_PCF8583=m
+# CONFIG_RTC_DRV_PL030 is not set
+CONFIG_RTC_DRV_PL031=y
+CONFIG_RTC_DRV_R9701=m
+CONFIG_RTC_DRV_RS5C348=m
+CONFIG_RTC_DRV_RS5C372=m
+CONFIG_RTC_DRV_RX8025=m
+CONFIG_RTC_DRV_RX8581=m
+CONFIG_RTC_DRV_S35390A=m
+CONFIG_RTC_DRV_STK17TA8=m
+CONFIG_RTC_DRV_TEST=m
+CONFIG_RTC_DRV_TWL4030=m
+CONFIG_RTC_DRV_V3020=m
+CONFIG_RTC_DRV_WM831X=m
+CONFIG_RTC_DRV_WM8350=m
+CONFIG_RTC_DRV_X1205=m
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+CONFIG_RTC_INTF_DEV=y
+CONFIG_RTC_INTF_DEV_UIE_EMUL=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_LIB=y
+CONFIG_RTL8180=m
+CONFIG_RTL8187=m
+CONFIG_RTL8187SE=m
+CONFIG_RTL8187_LEDS=y
+CONFIG_RTL8192E=m
+CONFIG_RTL8192SE=m
+CONFIG_RTL8192SU=m
+CONFIG_RT_GROUP_SCHED=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_RT_MUTEX_TESTER is not set
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_RXKAD=m
+CONFIG_S2IO=m
+# CONFIG_SAMPLES is not set
+CONFIG_SATA_AHCI=m
+CONFIG_SATA_INIC162X=m
+CONFIG_SATA_MV=m
+CONFIG_SATA_NV=m
+CONFIG_SATA_PMP=y
+CONFIG_SATA_PROMISE=m
+CONFIG_SATA_QSTOR=m
+CONFIG_SATA_SIL=m
+CONFIG_SATA_SIL24=m
+CONFIG_SATA_SIS=m
+CONFIG_SATA_SVW=m
+CONFIG_SATA_SX4=m
+CONFIG_SATA_ULI=m
+CONFIG_SATA_VIA=m
+CONFIG_SATA_VITESSE=m
+CONFIG_SBC7240_WDT=m
+CONFIG_SBC8360_WDT=m
+CONFIG_SBC_EPX_C3_WATCHDOG=m
+CONFIG_SBC_FITPC2_WATCHDOG=m
+CONFIG_SBNI=m
+# CONFIG_SBNI_MULTILINE is not set
+CONFIG_SC1200_WDT=m
+CONFIG_SC520_WDT=m
+CONFIG_SC6600=y
+CONFIG_SC6600_CDROM=4
+CONFIG_SC6600_CDROMBASE=0
+CONFIG_SC6600_JOY=y
+CONFIG_SC92031=m
+CONFIG_SCC=m
+# CONFIG_SCC_DELAY is not set
+# CONFIG_SCC_TRXECHO is not set
+CONFIG_SCHEDSTATS=y
+CONFIG_SCHED_DEBUG=y
+CONFIG_SCHED_HRTICK=y
+CONFIG_SCHED_MC=y
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
+CONFIG_SCHED_SMT=y
+# CONFIG_SCHED_TRACER is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_3W_9XXX=m
+CONFIG_SCSI_7000FASST=m
+CONFIG_SCSI_AACRAID=m
+CONFIG_SCSI_AHA152X=m
+CONFIG_SCSI_AHA1542=m
+CONFIG_SCSI_AHA1740=m
+CONFIG_SCSI_AIC79XX=m
+CONFIG_SCSI_AIC7XXX=m
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+CONFIG_SCSI_AIC94XX=m
+CONFIG_SCSI_ARCMSR=m
+CONFIG_SCSI_ARCMSR_AER=y
+CONFIG_SCSI_BFA_FC=m
+CONFIG_SCSI_BNX2_ISCSI=m
+CONFIG_SCSI_BUSLOGIC=m
+CONFIG_SCSI_CONSTANTS=y
+CONFIG_SCSI_CXGB3_ISCSI=m
+CONFIG_SCSI_DC390T=m
+CONFIG_SCSI_DC395x=m
+CONFIG_SCSI_DEBUG=m
+CONFIG_SCSI_DH=y
+CONFIG_SCSI_DH_ALUA=m
+CONFIG_SCSI_DH_EMC=m
+CONFIG_SCSI_DH_HP_SW=m
+CONFIG_SCSI_DH_RDAC=m
+CONFIG_SCSI_DMA=y
+CONFIG_SCSI_DMX3191D=m
+CONFIG_SCSI_DPT_I2O=m
+CONFIG_SCSI_DTC3280=m
+CONFIG_SCSI_EATA=m
+CONFIG_SCSI_EATA_LINKED_COMMANDS=y
+CONFIG_SCSI_EATA_MAX_TAGS=16
+CONFIG_SCSI_EATA_TAGGED_QUEUE=y
+CONFIG_SCSI_ENCLOSURE=m
+CONFIG_SCSI_FC_ATTRS=m
+CONFIG_SCSI_FC_TGT_ATTRS=y
+CONFIG_SCSI_FD_MCS=m
+# CONFIG_SCSI_FLASHPOINT is not set
+CONFIG_SCSI_FUTURE_DOMAIN=m
+CONFIG_SCSI_GDTH=m
+CONFIG_SCSI_GENERIC_NCR5380=m
+CONFIG_SCSI_GENERIC_NCR5380_MMIO=m
+CONFIG_SCSI_GENERIC_NCR53C400=y
+CONFIG_SCSI_HPTIOP=m
+CONFIG_SCSI_IBMMCA=m
+CONFIG_SCSI_IMM=m
+CONFIG_SCSI_IN2000=m
+CONFIG_SCSI_INIA100=m
+CONFIG_SCSI_INITIO=m
+CONFIG_SCSI_IPR=m
+# CONFIG_SCSI_IPR_DUMP is not set
+# CONFIG_SCSI_IPR_TRACE is not set
+CONFIG_SCSI_IPS=m
+CONFIG_SCSI_ISCSITARGET=m
+CONFIG_SCSI_ISCSI_ATTRS=m
+# CONFIG_SCSI_IZIP_EPP16 is not set
+# CONFIG_SCSI_IZIP_SLOW_CTR is not set
+CONFIG_SCSI_LOGGING=y
+CONFIG_SCSI_LOWLEVEL=y
+CONFIG_SCSI_LOWLEVEL_PCMCIA=y
+CONFIG_SCSI_LPFC=m
+CONFIG_SCSI_LPFC_DEBUG_FS=y
+CONFIG_SCSI_MPT2SAS=m
+# CONFIG_SCSI_MPT2SAS_LOGGING is not set
+CONFIG_SCSI_MPT2SAS_MAX_SGE=128
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_SCSI_MVSAS=m
+CONFIG_SCSI_MVSAS_DEBUG=y
+CONFIG_SCSI_NCR53C406A=m
+CONFIG_SCSI_NCR53C8XX_DEFAULT_TAGS=8
+CONFIG_SCSI_NCR53C8XX_MAX_TAGS=4
+CONFIG_SCSI_NCR53C8XX_SYNC=5
+CONFIG_SCSI_NCR_D700=m
+CONFIG_SCSI_NCR_Q720=m
+CONFIG_SCSI_NETLINK=y
+# CONFIG_SCSI_OSD_DEBUG is not set
+CONFIG_SCSI_OSD_DPRINT_SENSE=1
+CONFIG_SCSI_OSD_ULD=m
+CONFIG_SCSI_PAS16=m
+CONFIG_SCSI_PMCRAID=m
+CONFIG_SCSI_PPA=m
+CONFIG_SCSI_PROC_FS=y
+CONFIG_SCSI_QLA_FC=m
+CONFIG_SCSI_QLA_ISCSI=m
+CONFIG_SCSI_QLOGIC_1280=m
+CONFIG_SCSI_QLOGIC_FAS=m
+CONFIG_SCSI_SAS_ATA=y
+CONFIG_SCSI_SAS_ATTRS=m
+CONFIG_SCSI_SAS_HOST_SMP=y
+CONFIG_SCSI_SAS_LIBSAS=m
+# CONFIG_SCSI_SAS_LIBSAS_DEBUG is not set
+CONFIG_SCSI_SCAN_ASYNC=y
+CONFIG_SCSI_SIM710=m
+CONFIG_SCSI_SRP=m
+CONFIG_SCSI_SRP_ATTRS=m
+CONFIG_SCSI_SRP_TGT_ATTRS=y
+CONFIG_SCSI_STEX=m
+CONFIG_SCSI_SYM53C416=m
+CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
+CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1
+CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
+CONFIG_SCSI_SYM53C8XX_MMIO=y
+CONFIG_SCSI_T128=m
+CONFIG_SCSI_TGT=m
+CONFIG_SCSI_U14_34F=m
+CONFIG_SCSI_U14_34F_LINKED_COMMANDS=y
+CONFIG_SCSI_U14_34F_MAX_TAGS=8
+CONFIG_SCSI_U14_34F_TAGGED_QUEUE=y
+CONFIG_SCSI_ULTRASTOR=m
+CONFIG_SCSI_WAIT_SCAN=m
+# CONFIG_SCTP_DBG_MSG is not set
+# CONFIG_SCTP_DBG_OBJCNT is not set
+CONFIG_SCTP_HMAC_MD5=y
+# CONFIG_SCTP_HMAC_NONE is not set
+# CONFIG_SCTP_HMAC_SHA1 is not set
+CONFIG_SCx200=m
+CONFIG_SCx200HR_TIMER=m
+CONFIG_SCx200_ACB=m
+CONFIG_SCx200_GPIO=m
+CONFIG_SCx200_I2C=m
+CONFIG_SCx200_I2C_SCL=12
+CONFIG_SCx200_I2C_SDA=13
+CONFIG_SCx200_WDT=m
+CONFIG_SDIO_UART=m
+CONFIG_SDLA=m
+CONFIG_SEALEVEL_4021=m
+CONFIG_SECCOMP=y
+CONFIG_SECURITY=y
+CONFIG_SECURITYFS=y
+CONFIG_SECURITY_APPARMOR=y
+CONFIG_SECURITY_APPARMOR_BOOTPARAM_VALUE=1
+CONFIG_SECURITY_APPARMOR_COMPAT_24=y
+CONFIG_SECURITY_FILE_CAPABILITIES=y
+CONFIG_SECURITY_NETWORK=y
+# CONFIG_SECURITY_NETWORK_XFRM is not set
+CONFIG_SECURITY_PATH=y
+# CONFIG_SECURITY_ROOTPLUG is not set
+CONFIG_SECURITY_SELINUX=y
+CONFIG_SECURITY_SELINUX_AVC_STATS=y
+CONFIG_SECURITY_SELINUX_BOOTPARAM=y
+CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=0
+CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1
+CONFIG_SECURITY_SELINUX_DEVELOP=y
+CONFIG_SECURITY_SELINUX_DISABLE=y
+# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set
+CONFIG_SECURITY_SMACK=y
+CONFIG_SECURITY_TOMOYO=y
+CONFIG_SEEQ8005=m
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_SENSORS_ABITUGURU=m
+CONFIG_SENSORS_ABITUGURU3=m
+CONFIG_SENSORS_AD7414=m
+CONFIG_SENSORS_AD7418=m
+CONFIG_SENSORS_ADCXX=m
+CONFIG_SENSORS_ADM1021=m
+CONFIG_SENSORS_ADM1025=m
+CONFIG_SENSORS_ADM1026=m
+CONFIG_SENSORS_ADM1029=m
+CONFIG_SENSORS_ADM1031=m
+CONFIG_SENSORS_ADM9240=m
+CONFIG_SENSORS_ADS7828=m
+CONFIG_SENSORS_ADT7462=m
+CONFIG_SENSORS_ADT7470=m
+CONFIG_SENSORS_ADT7473=m
+CONFIG_SENSORS_ADT7475=m
+CONFIG_SENSORS_APPLESMC=m
+CONFIG_SENSORS_ASB100=m
+CONFIG_SENSORS_ATK0110=m
+CONFIG_SENSORS_ATXP1=m
+CONFIG_SENSORS_CORETEMP=m
+CONFIG_SENSORS_DME1737=m
+CONFIG_SENSORS_DS1621=m
+CONFIG_SENSORS_F71805F=m
+CONFIG_SENSORS_F71882FG=m
+CONFIG_SENSORS_F75375S=m
+CONFIG_SENSORS_FSCHMD=m
+CONFIG_SENSORS_G760A=m
+CONFIG_SENSORS_GL518SM=m
+CONFIG_SENSORS_GL520SM=m
+CONFIG_SENSORS_HDAPS=m
+CONFIG_SENSORS_I5K_AMB=m
+CONFIG_SENSORS_IBMAEM=m
+CONFIG_SENSORS_IBMPEX=m
+CONFIG_SENSORS_IT87=m
+CONFIG_SENSORS_K8TEMP=m
+CONFIG_SENSORS_LIS3LV02D=m
+CONFIG_SENSORS_LM63=m
+CONFIG_SENSORS_LM70=m
+CONFIG_SENSORS_LM75=m
+CONFIG_SENSORS_LM77=m
+CONFIG_SENSORS_LM78=m
+CONFIG_SENSORS_LM80=m
+CONFIG_SENSORS_LM83=m
+CONFIG_SENSORS_LM85=m
+CONFIG_SENSORS_LM87=m
+CONFIG_SENSORS_LM90=m
+CONFIG_SENSORS_LM92=m
+CONFIG_SENSORS_LM93=m
+CONFIG_SENSORS_LM95241=m
+CONFIG_SENSORS_LTC4215=m
+CONFIG_SENSORS_LTC4245=m
+CONFIG_SENSORS_MAX1111=m
+CONFIG_SENSORS_MAX1619=m
+CONFIG_SENSORS_MAX6650=m
+CONFIG_SENSORS_PC87360=m
+CONFIG_SENSORS_PC87427=m
+CONFIG_SENSORS_PCF8591=m
+CONFIG_SENSORS_SHT15=m
+CONFIG_SENSORS_SIS5595=m
+CONFIG_SENSORS_SMSC47B397=m
+CONFIG_SENSORS_SMSC47M1=m
+CONFIG_SENSORS_SMSC47M192=m
+CONFIG_SENSORS_THMC50=m
+CONFIG_SENSORS_TMP401=m
+CONFIG_SENSORS_TMP421=m
+CONFIG_SENSORS_TSL2550=m
+CONFIG_SENSORS_VIA686A=m
+CONFIG_SENSORS_VT1211=m
+CONFIG_SENSORS_VT8231=m
+CONFIG_SENSORS_W83627EHF=m
+CONFIG_SENSORS_W83627HF=m
+CONFIG_SENSORS_W83781D=m
+CONFIG_SENSORS_W83791D=m
+CONFIG_SENSORS_W83792D=m
+CONFIG_SENSORS_W83793=m
+CONFIG_SENSORS_W83L785TS=m
+CONFIG_SENSORS_W83L786NG=m
+CONFIG_SENSORS_WM831X=m
+CONFIG_SENSORS_WM8350=m
+CONFIG_SERIAL_8250_ACCENT=m
+CONFIG_SERIAL_8250_BOCA=m
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_CS=m
+# CONFIG_SERIAL_8250_DETECT_IRQ is not set
+CONFIG_SERIAL_8250_EXAR_ST16C554=m
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_FOURPORT=m
+CONFIG_SERIAL_8250_HUB6=m
+CONFIG_SERIAL_8250_MANY_PORTS=y
+CONFIG_SERIAL_8250_MCA=m
+CONFIG_SERIAL_8250_PNP=y
+CONFIG_SERIAL_8250_RSA=y
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+CONFIG_SERIAL_AMBA_PL011=y
+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_SERIAL_JSM=m
+CONFIG_SERIAL_MAX3100=m
+CONFIG_SERIAL_NONSTANDARD=y
+CONFIG_SERIO=y
+CONFIG_SERIO_AMBAKMI=y
+CONFIG_SERIO_CT82C710=m
+CONFIG_SERIO_I8042=y
+CONFIG_SERIO_LIBPS2=y
+CONFIG_SERIO_PARKBD=m
+CONFIG_SERIO_PCIPS2=m
+CONFIG_SERIO_RAW=m
+CONFIG_SERIO_SERPORT=m
+CONFIG_SFC=m
+CONFIG_SFC_MTD=y
+CONFIG_SFI=y
+CONFIG_SGI_IOC4=m
+CONFIG_SGI_PARTITION=y
+CONFIG_SHMEM=y
+CONFIG_SIGMATEL_FIR=m
+CONFIG_SIGNALFD=y
+CONFIG_SIS190=m
+CONFIG_SIS900=m
+CONFIG_SKFP=m
+CONFIG_SKGE=m
+# CONFIG_SKGE_DEBUG is not set
+CONFIG_SKISA=m
+CONFIG_SKY2=m
+# CONFIG_SKY2_DEBUG is not set
+CONFIG_SLABINFO=y
+CONFIG_SLHC=y
+CONFIG_SLICOSS=m
+CONFIG_SLIP=m
+CONFIG_SLIP_COMPRESSED=y
+CONFIG_SLIP_MODE_SLIP6=y
+CONFIG_SLIP_SMART=y
+# CONFIG_SLOB is not set
+CONFIG_SLOW_WORK=y
+# CONFIG_SLOW_WORK_DEBUG is not set
+CONFIG_SLUB_DEBUG=y
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+CONFIG_SMARTJOYPLUS_FF=y
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+CONFIG_SMC911X=m
+CONFIG_SMC9194=m
+CONFIG_SMC91X=y
+CONFIG_SMCTR=m
+CONFIG_SMC_IRCC_FIR=m
+CONFIG_SMP=y
+CONFIG_SMSC37B787_WDT=m
+CONFIG_SMSC911X=m
+CONFIG_SMSC9420=m
+CONFIG_SMSC_PHY=y
+CONFIG_SMSC_SCH311X_WDT=m
+CONFIG_SMS_SDIO_DRV=m
+CONFIG_SMS_SIANO_MDTV=m
+CONFIG_SMS_USB_DRV=m
+CONFIG_SND=m
+CONFIG_SND_AC97_CODEC=m
+CONFIG_SND_AC97_POWER_SAVE=y
+CONFIG_SND_AC97_POWER_SAVE_DEFAULT=0
+CONFIG_SND_AD1816A=m
+CONFIG_SND_AD1848=m
+CONFIG_SND_AD1889=m
+CONFIG_SND_ADLIB=m
+CONFIG_SND_ALS100=m
+CONFIG_SND_ALS300=m
+CONFIG_SND_ALS4000=m
+CONFIG_SND_ARM=y
+CONFIG_SND_ARMAACI=m
+CONFIG_SND_ATIIXP=m
+CONFIG_SND_ATIIXP_MODEM=m
+CONFIG_SND_AU8810=m
+CONFIG_SND_AU8820=m
+CONFIG_SND_AU8830=m
+CONFIG_SND_AW2=m
+CONFIG_SND_AZT2320=m
+CONFIG_SND_AZT3328=m
+CONFIG_SND_BT87X=m
+# CONFIG_SND_BT87X_OVERCLOCK is not set
+CONFIG_SND_CA0106=m
+CONFIG_SND_CMI8330=m
+CONFIG_SND_CMIPCI=m
+CONFIG_SND_CS4231=m
+CONFIG_SND_CS4236=m
+CONFIG_SND_CS4281=m
+CONFIG_SND_CS46XX=m
+CONFIG_SND_CS46XX_NEW_DSP=y
+CONFIG_SND_CS5530=m
+CONFIG_SND_CS5535AUDIO=m
+CONFIG_SND_CTXFI=m
+CONFIG_SND_DARLA20=m
+CONFIG_SND_DARLA24=m
+# CONFIG_SND_DEBUG is not set
+CONFIG_SND_DMA_SGBUF=y
+CONFIG_SND_DRIVERS=y
+CONFIG_SND_DT019X=m
+CONFIG_SND_DUMMY=m
+CONFIG_SND_DYNAMIC_MINORS=y
+CONFIG_SND_ECHO3G=m
+CONFIG_SND_EMU10K1=m
+CONFIG_SND_EMU10K1X=m
+CONFIG_SND_ENS1370=m
+CONFIG_SND_ENS1371=m
+CONFIG_SND_ES1688=m
+CONFIG_SND_ES18XX=m
+CONFIG_SND_ES1938=m
+CONFIG_SND_ES1968=m
+CONFIG_SND_ES968=m
+CONFIG_SND_FM801=m
+CONFIG_SND_FM801_TEA575X=m
+CONFIG_SND_FM801_TEA575X_BOOL=y
+CONFIG_SND_GINA20=m
+CONFIG_SND_GINA24=m
+CONFIG_SND_GUSCLASSIC=m
+CONFIG_SND_GUSEXTREME=m
+CONFIG_SND_GUSMAX=m
+CONFIG_SND_HDA_CODEC_ANALOG=y
+CONFIG_SND_HDA_CODEC_ATIHDMI=y
+CONFIG_SND_HDA_CODEC_CA0110=y
+CONFIG_SND_HDA_CODEC_CIRRUS=y
+CONFIG_SND_HDA_CODEC_CMEDIA=y
+CONFIG_SND_HDA_CODEC_CONEXANT=y
+CONFIG_SND_HDA_CODEC_INTELHDMI=y
+CONFIG_SND_HDA_CODEC_NVHDMI=y
+CONFIG_SND_HDA_CODEC_REALTEK=y
+CONFIG_SND_HDA_CODEC_SI3054=y
+CONFIG_SND_HDA_CODEC_SIGMATEL=y
+CONFIG_SND_HDA_CODEC_VIA=y
+CONFIG_SND_HDA_ELD=y
+CONFIG_SND_HDA_GENERIC=y
+CONFIG_SND_HDA_HWDEP=y
+CONFIG_SND_HDA_INPUT_BEEP=y
+CONFIG_SND_HDA_INPUT_JACK=y
+CONFIG_SND_HDA_INTEL=m
+CONFIG_SND_HDA_PATCH_LOADER=y
+CONFIG_SND_HDA_POWER_SAVE=y
+CONFIG_SND_HDA_POWER_SAVE_DEFAULT=0
+CONFIG_SND_HDA_RECONFIG=y
+CONFIG_SND_HDSP=m
+CONFIG_SND_HDSPM=m
+CONFIG_SND_HIFIER=m
+CONFIG_SND_HRTIMER=m
+CONFIG_SND_HWDEP=m
+CONFIG_SND_ICE1712=m
+CONFIG_SND_ICE1724=m
+CONFIG_SND_INDIGO=m
+CONFIG_SND_INDIGODJ=m
+CONFIG_SND_INDIGODJX=m
+CONFIG_SND_INDIGOIO=m
+CONFIG_SND_INDIGOIOX=m
+CONFIG_SND_INTEL8X0=m
+CONFIG_SND_INTEL8X0M=m
+CONFIG_SND_INTERWAVE=m
+CONFIG_SND_INTERWAVE_STB=m
+CONFIG_SND_ISA=y
+CONFIG_SND_JACK=y
+CONFIG_SND_KORG1212=m
+CONFIG_SND_LAYLA20=m
+CONFIG_SND_LAYLA24=m
+CONFIG_SND_LX6464ES=m
+CONFIG_SND_MAESTRO3=m
+CONFIG_SND_MIA=m
+CONFIG_SND_MIRO=m
+CONFIG_SND_MIXART=m
+CONFIG_SND_MIXER_OSS=m
+CONFIG_SND_MONA=m
+CONFIG_SND_MPU401_UART=m
+CONFIG_SND_MSND_CLASSIC=m
+CONFIG_SND_MSND_PINNACLE=m
+CONFIG_SND_MTS64=m
+CONFIG_SND_NM256=m
+CONFIG_SND_OPL3SA2=m
+CONFIG_SND_OPL3_LIB=m
+CONFIG_SND_OPL4_LIB=m
+CONFIG_SND_OPTI92X_AD1848=m
+CONFIG_SND_OPTI92X_CS4231=m
+CONFIG_SND_OPTI93X=m
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_OXYGEN=m
+CONFIG_SND_OXYGEN_LIB=m
+CONFIG_SND_PCI=y
+CONFIG_SND_PCM=m
+CONFIG_SND_PCMCIA=y
+CONFIG_SND_PCM_OSS=m
+CONFIG_SND_PCM_OSS_PLUGINS=y
+CONFIG_SND_PCSP=m
+CONFIG_SND_PCXHR=m
+CONFIG_SND_PDAUDIOCF=m
+CONFIG_SND_PORTMAN2X4=m
+CONFIG_SND_RAWMIDI=m
+CONFIG_SND_RIPTIDE=m
+CONFIG_SND_RME32=m
+CONFIG_SND_RME96=m
+CONFIG_SND_RME9652=m
+CONFIG_SND_SB16=m
+CONFIG_SND_SB16_CSP=y
+CONFIG_SND_SB16_DSP=m
+CONFIG_SND_SB8=m
+CONFIG_SND_SB8_DSP=m
+CONFIG_SND_SBAWE=m
+CONFIG_SND_SB_COMMON=m
+CONFIG_SND_SC6000=m
+CONFIG_SND_SEQUENCER_OSS=y
+CONFIG_SND_SEQ_DUMMY=m
+CONFIG_SND_SEQ_HRTIMER_DEFAULT=y
+CONFIG_SND_SGALAXY=m
+CONFIG_SND_SIS7019=m
+CONFIG_SND_SOC=m
+CONFIG_SND_SOC_AD1836=m
+CONFIG_SND_SOC_AD1938=m
+CONFIG_SND_SOC_AD73311=m
+CONFIG_SND_SOC_AK4104=m
+CONFIG_SND_SOC_AK4535=m
+CONFIG_SND_SOC_AK4642=m
+CONFIG_SND_SOC_ALL_CODECS=m
+CONFIG_SND_SOC_CS4270=m
+CONFIG_SND_SOC_I2C_AND_SPI=m
+CONFIG_SND_SOC_L3=m
+CONFIG_SND_SOC_MAX9877=m
+CONFIG_SND_SOC_PCM3008=m
+CONFIG_SND_SOC_SPDIF=m
+CONFIG_SND_SOC_SSM2602=m
+CONFIG_SND_SOC_TLV320AIC23=m
+CONFIG_SND_SOC_TLV320AIC26=m
+CONFIG_SND_SOC_TLV320AIC3X=m
+CONFIG_SND_SOC_TWL4030=m
+CONFIG_SND_SOC_UDA134X=m
+CONFIG_SND_SOC_UDA1380=m
+CONFIG_SND_SOC_WM8350=m
+CONFIG_SND_SOC_WM8400=m
+CONFIG_SND_SOC_WM8510=m
+CONFIG_SND_SOC_WM8523=m
+CONFIG_SND_SOC_WM8580=m
+CONFIG_SND_SOC_WM8728=m
+CONFIG_SND_SOC_WM8731=m
+CONFIG_SND_SOC_WM8750=m
+CONFIG_SND_SOC_WM8753=m
+CONFIG_SND_SOC_WM8776=m
+CONFIG_SND_SOC_WM8900=m
+CONFIG_SND_SOC_WM8903=m
+CONFIG_SND_SOC_WM8940=m
+CONFIG_SND_SOC_WM8960=m
+CONFIG_SND_SOC_WM8961=m
+CONFIG_SND_SOC_WM8971=m
+CONFIG_SND_SOC_WM8974=m
+CONFIG_SND_SOC_WM8988=m
+CONFIG_SND_SOC_WM8990=m
+CONFIG_SND_SOC_WM8993=m
+CONFIG_SND_SOC_WM9081=m
+CONFIG_SND_SOC_WM_HUBS=m
+CONFIG_SND_SONICVIBES=m
+CONFIG_SND_SPI=y
+CONFIG_SND_SSCAPE=m
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_TIMER=m
+CONFIG_SND_TRIDENT=m
+CONFIG_SND_USB=y
+CONFIG_SND_USB_AUDIO=m
+CONFIG_SND_USB_CAIAQ=m
+CONFIG_SND_USB_CAIAQ_INPUT=y
+CONFIG_SND_USB_US122L=m
+CONFIG_SND_USB_USX2Y=m
+# CONFIG_SND_VERBOSE_PRINTK is not set
+CONFIG_SND_VERBOSE_PROCFS=y
+CONFIG_SND_VIA82XX=m
+CONFIG_SND_VIA82XX_MODEM=m
+CONFIG_SND_VIRMIDI=m
+CONFIG_SND_VIRTUOSO=m
+CONFIG_SND_VMASTER=y
+CONFIG_SND_VX222=m
+CONFIG_SND_VXPOCKET=m
+CONFIG_SND_VX_LIB=m
+CONFIG_SND_WAVEFRONT=m
+CONFIG_SND_WSS_LIB=m
+CONFIG_SND_YMFPCI=m
+CONFIG_SOC_CAMERA=m
+CONFIG_SOC_CAMERA_MT9M001=m
+CONFIG_SOC_CAMERA_MT9M111=m
+CONFIG_SOC_CAMERA_MT9T031=m
+CONFIG_SOC_CAMERA_MT9V022=m
+CONFIG_SOC_CAMERA_OV772X=m
+CONFIG_SOC_CAMERA_PLATFORM=m
+CONFIG_SOC_CAMERA_TW9910=m
+CONFIG_SOFT_WATCHDOG=m
+CONFIG_SOLARIS_X86_PARTITION=y
+CONFIG_SONYPI=m
+CONFIG_SONYPI_COMPAT=y
+CONFIG_SONY_LAPTOP=m
+CONFIG_SOUND=m
+CONFIG_SOUND_AEDSP16=m
+CONFIG_SOUND_DMAP=y
+CONFIG_SOUND_KAHLUA=m
+CONFIG_SOUND_MPU401=m
+CONFIG_SOUND_MSNDCLAS=m
+CONFIG_SOUND_MSNDPIN=m
+CONFIG_SOUND_MSS=m
+CONFIG_SOUND_OSS=m
+CONFIG_SOUND_OSS_CORE=y
+CONFIG_SOUND_OSS_CORE_PRECLAIM=y
+CONFIG_SOUND_PAS=m
+CONFIG_SOUND_PRIME=m
+CONFIG_SOUND_PSS=m
+CONFIG_SOUND_SB=m
+CONFIG_SOUND_SSCAPE=m
+# CONFIG_SOUND_TRACEINIT is not set
+CONFIG_SOUND_TRIX=m
+CONFIG_SOUND_UART6850=m
+CONFIG_SOUND_VMIDI=m
+CONFIG_SOUND_YM3812=m
+CONFIG_SPARSEMEM=y
+CONFIG_SPARSEMEM_EXTREME=y
+CONFIG_SPARSEMEM_STATIC=y
+CONFIG_SPARSEMEM_VMEMMAP=y
+CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
+CONFIG_SPARSE_IRQ=y
+CONFIG_SPECIALIX=m
+CONFIG_SPI_BITBANG=m
+CONFIG_SPI_BUTTERFLY=m
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_GPIO=m
+CONFIG_SPI_LM70_LLP=m
+CONFIG_SPI_MASTER=y
+CONFIG_SPI_SPIDEV=m
+CONFIG_SPI_TLE62X0=m
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_SQUASHFS=m
+# CONFIG_SQUASHFS_EMBEDDED is not set
+CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
+CONFIG_SR_REPORT_TIME_LIMIT=100
+CONFIG_SSB=m
+CONFIG_SSB_BLOCKIO=y
+# CONFIG_SSB_DEBUG is not set
+CONFIG_SSB_DRIVER_PCICORE=y
+CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
+CONFIG_SSB_PCIHOST=y
+CONFIG_SSB_PCIHOST_POSSIBLE=y
+# CONFIG_SSB_PCMCIAHOST is not set
+CONFIG_SSB_PCMCIAHOST_POSSIBLE=y
+CONFIG_SSB_POSSIBLE=y
+CONFIG_SSB_SDIOHOST=y
+CONFIG_SSB_SDIOHOST_POSSIBLE=y
+CONFIG_SSB_SPROM=y
+CONFIG_SSFDC=m
+CONFIG_STACKTRACE=y
+CONFIG_STACKTRACE_SUPPORT=y
+# CONFIG_STACK_TRACER is not set
+CONFIG_STAGING=y
+# CONFIG_STAGING_EXCLUDE_BUILD is not set
+CONFIG_STALDRV=y
+CONFIG_STALLION=m
+CONFIG_STE10XP=y
+CONFIG_STOP_MACHINE=y
+CONFIG_STP=m
+CONFIG_STRICT_DEVMEM=y
+CONFIG_STRIP=m
+# CONFIG_STRIP_ASM_SYMS is not set
+CONFIG_SUNDANCE=m
+# CONFIG_SUNDANCE_MMIO is not set
+CONFIG_SUNRPC=m
+CONFIG_SUNRPC_GSS=m
+CONFIG_SUNRPC_XPRT_RDMA=m
+CONFIG_SUN_PARTITION=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+CONFIG_SWAP=y
+CONFIG_SWIOTLB=y
+CONFIG_SYNCLINK=m
+CONFIG_SYNCLINKMP=m
+CONFIG_SYNCLINK_CS=m
+CONFIG_SYNCLINK_GT=m
+CONFIG_SYN_COOKIES=y
+CONFIG_SYSCTL=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_SYSFS=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+# CONFIG_SYSPROF_TRACER is not set
+CONFIG_SYSV68_PARTITION=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_COMPAT=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_SYSV_FS=m
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_TABLET_USB_ACECAD=m
+CONFIG_TABLET_USB_AIPTEK=m
+CONFIG_TABLET_USB_GTCO=m
+CONFIG_TABLET_USB_KBTAB=m
+CONFIG_TABLET_USB_WACOM=m
+CONFIG_TASKSTATS=y
+CONFIG_TASK_DELAY_ACCT=y
+CONFIG_TASK_IO_ACCOUNTING=y
+CONFIG_TASK_XACCT=y
+CONFIG_TC1100_WMI=m
+CONFIG_TCG_ATMEL=m
+CONFIG_TCG_INFINEON=m
+CONFIG_TCG_NSC=m
+CONFIG_TCG_TIS=m
+CONFIG_TCIC=m
+CONFIG_TCP_CONG_BIC=m
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_TCP_CONG_HSTCP=m
+CONFIG_TCP_CONG_HTCP=m
+CONFIG_TCP_CONG_HYBLA=m
+CONFIG_TCP_CONG_ILLINOIS=m
+CONFIG_TCP_CONG_LP=m
+CONFIG_TCP_CONG_SCALABLE=m
+CONFIG_TCP_CONG_VEGAS=m
+CONFIG_TCP_CONG_VENO=m
+CONFIG_TCP_CONG_WESTWOOD=m
+CONFIG_TCP_CONG_YEAH=m
+CONFIG_TCP_MD5SIG=y
+CONFIG_TEHUTI=m
+CONFIG_TEKRAM_DONGLE=m
+CONFIG_TELCLOCK=m
+CONFIG_TEXTSEARCH=y
+CONFIG_TEXTSEARCH_BM=m
+CONFIG_TEXTSEARCH_FSM=m
+CONFIG_TEXTSEARCH_KMP=m
+CONFIG_THERMAL=y
+CONFIG_THERMAL_HWMON=y
+CONFIG_THINKPAD_ACPI=m
+CONFIG_THINKPAD_ACPI_ALSA_SUPPORT=y
+# CONFIG_THINKPAD_ACPI_DEBUG is not set
+CONFIG_THINKPAD_ACPI_DEBUGFACILITIES=y
+CONFIG_THINKPAD_ACPI_HOTKEY_POLL=y
+# CONFIG_THINKPAD_ACPI_UNSAFE_LEDS is not set
+CONFIG_THINKPAD_ACPI_VIDEO=y
+CONFIG_THRUSTMASTER_FF=y
+# CONFIG_THUMB2_KERNEL is not set
+CONFIG_TICK_ONESHOT=y
+CONFIG_TIFM_7XX1=m
+CONFIG_TIFM_CORE=m
+CONFIG_TIGON3=m
+CONFIG_TIMERFD=y
+CONFIG_TIMER_STATS=y
+# CONFIG_TIPC_ADVANCED is not set
+# CONFIG_TIPC_DEBUG is not set
+CONFIG_TLAN=m
+CONFIG_TMD_HERMES=m
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_TMS380TR=m
+CONFIG_TMSPCI=m
+CONFIG_TOIM3232_DONGLE=m
+CONFIG_TOPSTAR_LAPTOP=m
+# CONFIG_TOSHIBA is not set
+CONFIG_TOSHIBA_FIR=m
+CONFIG_TOUCHSCREEN_AD7877=m
+CONFIG_TOUCHSCREEN_AD7879=m
+CONFIG_TOUCHSCREEN_AD7879_I2C=m
+CONFIG_TOUCHSCREEN_ADS7846=m
+CONFIG_TOUCHSCREEN_DA9034=m
+CONFIG_TOUCHSCREEN_EETI=m
+CONFIG_TOUCHSCREEN_ELO=m
+CONFIG_TOUCHSCREEN_FUJITSU=m
+CONFIG_TOUCHSCREEN_GUNZE=m
+CONFIG_TOUCHSCREEN_HTCPEN=m
+CONFIG_TOUCHSCREEN_INEXIO=m
+CONFIG_TOUCHSCREEN_MCS5000=m
+CONFIG_TOUCHSCREEN_MK712=m
+CONFIG_TOUCHSCREEN_MTOUCH=m
+CONFIG_TOUCHSCREEN_PENMOUNT=m
+CONFIG_TOUCHSCREEN_TOUCHIT213=m
+CONFIG_TOUCHSCREEN_TOUCHRIGHT=m
+CONFIG_TOUCHSCREEN_TOUCHWIN=m
+CONFIG_TOUCHSCREEN_TSC2007=m
+CONFIG_TOUCHSCREEN_UCB1400=m
+CONFIG_TOUCHSCREEN_USB_3M=y
+CONFIG_TOUCHSCREEN_USB_COMPOSITE=m
+CONFIG_TOUCHSCREEN_USB_DMC_TSC10=y
+CONFIG_TOUCHSCREEN_USB_E2I=y
+CONFIG_TOUCHSCREEN_USB_EGALAX=y
+CONFIG_TOUCHSCREEN_USB_ETURBO=y
+CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH=y
+CONFIG_TOUCHSCREEN_USB_GOTOP=y
+CONFIG_TOUCHSCREEN_USB_GUNZE=y
+CONFIG_TOUCHSCREEN_USB_IDEALTEK=y
+CONFIG_TOUCHSCREEN_USB_IRTOUCH=y
+CONFIG_TOUCHSCREEN_USB_ITM=y
+CONFIG_TOUCHSCREEN_USB_JASTEC=y
+CONFIG_TOUCHSCREEN_USB_PANJIT=y
+CONFIG_TOUCHSCREEN_WACOM_W8001=m
+CONFIG_TOUCHSCREEN_WM9705=y
+CONFIG_TOUCHSCREEN_WM9712=y
+CONFIG_TOUCHSCREEN_WM9713=y
+CONFIG_TOUCHSCREEN_WM97XX=m
+CONFIG_TPS65010=m
+CONFIG_TR=y
+CONFIG_TRACEPOINTS=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_TRACING=y
+CONFIG_TRACING_SUPPORT=y
+CONFIG_TRANZPORT=m
+# CONFIG_TREE_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_RCU_TRACE is not set
+CONFIG_TSL2561=m
+CONFIG_TTPCI_EEPROM=m
+CONFIG_TULIP=m
+# CONFIG_TULIP_MMIO is not set
+# CONFIG_TULIP_MWI is not set
+# CONFIG_TULIP_NAPI is not set
+CONFIG_TUN=y
+CONFIG_TWL4030_CORE=y
+# CONFIG_TWL4030_POWER is not set
+CONFIG_TWL4030_USB=m
+CONFIG_TWL4030_WATCHDOG=m
+CONFIG_TYPHOON=m
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+CONFIG_UBIFS_FS=m
+# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
+# CONFIG_UBIFS_FS_DEBUG is not set
+CONFIG_UBIFS_FS_LZO=y
+CONFIG_UBIFS_FS_XATTR=y
+CONFIG_UBIFS_FS_ZLIB=y
+CONFIG_UCB1400_CORE=m
+CONFIG_UDF_FS=m
+CONFIG_UDF_NLS=y
+CONFIG_UEVENT_HELPER_PATH=""
+# CONFIG_UFS_DEBUG is not set
+CONFIG_UFS_FS=m
+# CONFIG_UFS_FS_WRITE is not set
+CONFIG_UID16=y
+CONFIG_UIO=m
+CONFIG_UIO_AEC=m
+CONFIG_UIO_CIF=m
+CONFIG_UIO_PCI_GENERIC=m
+CONFIG_UIO_PDRV=m
+CONFIG_UIO_PDRV_GENIRQ=m
+CONFIG_UIO_SERCOS3=m
+CONFIG_UIO_SMX=m
+CONFIG_ULI526X=m
+CONFIG_ULTRA=m
+CONFIG_ULTRA32=m
+CONFIG_ULTRAMCA=m
+CONFIG_ULTRIX_PARTITION=y
+CONFIG_UNIX=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNUSED_SYMBOLS=y
+CONFIG_USBPCWATCHDOG=m
+CONFIG_USB_ACM=m
+CONFIG_USB_ADUTUX=m
+CONFIG_USB_ALI_M5632=y
+CONFIG_USB_AN2720=y
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+CONFIG_USB_APPLEDISPLAY=m
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARMLINUX=y
+CONFIG_USB_ATM=m
+CONFIG_USB_AUDIO=m
+CONFIG_USB_BELKIN=y
+CONFIG_USB_BERRY_CHARGE=m
+CONFIG_USB_C67X00_HCD=m
+CONFIG_USB_CATC=m
+CONFIG_USB_CDC_COMPOSITE=m
+CONFIG_USB_CDC_PHONET=m
+CONFIG_USB_CXACRU=m
+CONFIG_USB_CYPRESS_CY7C63=m
+CONFIG_USB_CYTHERM=m
+CONFIG_USB_DABUSB=m
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_DEVICEFS is not set
+# CONFIG_USB_DEVICE_CLASS is not set
+CONFIG_USB_DSBR=m
+CONFIG_USB_DUMMY_HCD=m
+# CONFIG_USB_DYNAMIC_MINORS is not set
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+CONFIG_USB_EHCI_TT_NEWSCHED=y
+CONFIG_USB_EMI26=m
+CONFIG_USB_EMI62=m
+CONFIG_USB_EPSON2888=y
+CONFIG_USB_ET61X251=m
+CONFIG_USB_ETH=m
+# CONFIG_USB_ETH_EEM is not set
+CONFIG_USB_ETH_RNDIS=y
+CONFIG_USB_EZUSB=y
+CONFIG_USB_FILE_STORAGE=m
+# CONFIG_USB_FILE_STORAGE_TEST is not set
+CONFIG_USB_FTDI_ELAN=m
+CONFIG_USB_GADGETFS=m
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_CI13XXX is not set
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+# CONFIG_USB_GADGET_DEBUG_FS is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+CONFIG_USB_GADGET_DUMMY_HCD=y
+# CONFIG_USB_GADGET_FSL_QE is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_IMX is not set
+# CONFIG_USB_GADGET_LANGWELL is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_MUSB_HDRC is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_PXA25X is not set
+# CONFIG_USB_GADGET_PXA27X is not set
+# CONFIG_USB_GADGET_R8A66597 is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_S3C_HSOTG is not set
+CONFIG_USB_GADGET_SELECTED=y
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GL860=m
+CONFIG_USB_GPIO_VBUS=m
+CONFIG_USB_GSPCA=m
+CONFIG_USB_GSPCA_CONEX=m
+CONFIG_USB_GSPCA_ETOMS=m
+CONFIG_USB_GSPCA_FINEPIX=m
+CONFIG_USB_GSPCA_JEILINJ=m
+CONFIG_USB_GSPCA_MARS=m
+CONFIG_USB_GSPCA_MR97310A=m
+CONFIG_USB_GSPCA_OV519=m
+CONFIG_USB_GSPCA_OV534=m
+CONFIG_USB_GSPCA_PAC207=m
+CONFIG_USB_GSPCA_PAC7311=m
+CONFIG_USB_GSPCA_SN9C20X=m
+# CONFIG_USB_GSPCA_SN9C20X_EVDEV is not set
+CONFIG_USB_GSPCA_SONIXB=m
+CONFIG_USB_GSPCA_SONIXJ=m
+CONFIG_USB_GSPCA_SPCA500=m
+CONFIG_USB_GSPCA_SPCA501=m
+CONFIG_USB_GSPCA_SPCA505=m
+CONFIG_USB_GSPCA_SPCA506=m
+CONFIG_USB_GSPCA_SPCA508=m
+CONFIG_USB_GSPCA_SPCA561=m
+CONFIG_USB_GSPCA_SQ905=m
+CONFIG_USB_GSPCA_SQ905C=m
+CONFIG_USB_GSPCA_STK014=m
+CONFIG_USB_GSPCA_SUNPLUS=m
+CONFIG_USB_GSPCA_T613=m
+CONFIG_USB_GSPCA_TV8532=m
+CONFIG_USB_GSPCA_VC032X=m
+CONFIG_USB_GSPCA_ZC3XX=m
+CONFIG_USB_G_PRINTER=m
+CONFIG_USB_G_SERIAL=m
+CONFIG_USB_HID=m
+CONFIG_USB_HIDDEV=y
+CONFIG_USB_HSO=m
+CONFIG_USB_HWA_HCD=m
+CONFIG_USB_IBMCAM=m
+CONFIG_USB_IDMOUSE=m
+CONFIG_USB_IOWARRIOR=m
+CONFIG_USB_IP_COMMON=m
+CONFIG_USB_IP_HOST=m
+CONFIG_USB_IP_VHCI_HCD=m
+CONFIG_USB_IRDA=m
+CONFIG_USB_ISIGHTFW=m
+CONFIG_USB_ISP116X_HCD=m
+CONFIG_USB_ISP1760_HCD=m
+CONFIG_USB_KAWETH=m
+CONFIG_USB_KC2190=y
+CONFIG_USB_KONICAWC=m
+CONFIG_USB_LCD=m
+CONFIG_USB_LD=m
+CONFIG_USB_LED=m
+CONFIG_USB_LEGOTOWER=m
+# CONFIG_USB_LIBUSUAL is not set
+CONFIG_USB_M5602=m
+CONFIG_USB_MDC800=m
+CONFIG_USB_MICROTEK=m
+CONFIG_USB_MIDI_GADGET=m
+CONFIG_USB_MR800=m
+# CONFIG_USB_MUSB_HDRC is not set
+CONFIG_USB_NET_AX8817X=m
+CONFIG_USB_NET_CDCETHER=m
+CONFIG_USB_NET_CDC_EEM=m
+CONFIG_USB_NET_CDC_SUBSET=m
+CONFIG_USB_NET_DM9601=m
+CONFIG_USB_NET_GL620A=m
+CONFIG_USB_NET_INT51X1=m
+CONFIG_USB_NET_MCS7830=m
+CONFIG_USB_NET_NET1080=m
+CONFIG_USB_NET_PLUSB=m
+CONFIG_USB_NET_RNDIS_HOST=m
+CONFIG_USB_NET_RNDIS_WLAN=m
+CONFIG_USB_NET_SMSC95XX=m
+CONFIG_USB_NET_ZAURUS=m
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+# CONFIG_USB_OHCI_HCD_SSB is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_OTG is not set
+CONFIG_USB_OTG_UTILS=y
+# CONFIG_USB_OV511 is not set
+CONFIG_USB_OXU210HP_HCD=m
+CONFIG_USB_PEGASUS=m
+CONFIG_USB_PRINTER=m
+CONFIG_USB_PWC=m
+# CONFIG_USB_PWC_DEBUG is not set
+CONFIG_USB_PWC_INPUT_EVDEV=y
+CONFIG_USB_QUICKCAM_MESSENGER=m
+CONFIG_USB_R8A66597_HCD=m
+CONFIG_USB_RIO500=m
+CONFIG_USB_RTL8150=m
+CONFIG_USB_S2255=m
+CONFIG_USB_SE401=m
+CONFIG_USB_SERIAL=m
+CONFIG_USB_SERIAL_AIRCABLE=m
+CONFIG_USB_SERIAL_ARK3116=m
+CONFIG_USB_SERIAL_BELKIN=m
+CONFIG_USB_SERIAL_CH341=m
+CONFIG_USB_SERIAL_CP210X=m
+CONFIG_USB_SERIAL_CYBERJACK=m
+CONFIG_USB_SERIAL_CYPRESS_M8=m
+CONFIG_USB_SERIAL_DEBUG=m
+CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
+CONFIG_USB_SERIAL_EDGEPORT=m
+CONFIG_USB_SERIAL_EDGEPORT_TI=m
+CONFIG_USB_SERIAL_EMPEG=m
+CONFIG_USB_SERIAL_FTDI_SIO=m
+CONFIG_USB_SERIAL_FUNSOFT=m
+CONFIG_USB_SERIAL_GARMIN=m
+CONFIG_USB_SERIAL_GENERIC=y
+CONFIG_USB_SERIAL_HP4X=m
+CONFIG_USB_SERIAL_IPAQ=m
+CONFIG_USB_SERIAL_IPW=m
+CONFIG_USB_SERIAL_IR=m
+CONFIG_USB_SERIAL_IUU=m
+CONFIG_USB_SERIAL_KEYSPAN=m
+CONFIG_USB_SERIAL_KEYSPAN_MPR=y
+CONFIG_USB_SERIAL_KEYSPAN_PDA=m
+CONFIG_USB_SERIAL_KEYSPAN_USA18X=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19W=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28X=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y
+CONFIG_USB_SERIAL_KEYSPAN_USA49W=y
+CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y
+CONFIG_USB_SERIAL_KLSI=m
+CONFIG_USB_SERIAL_KOBIL_SCT=m
+CONFIG_USB_SERIAL_MCT_U232=m
+CONFIG_USB_SERIAL_MOS7720=m
+CONFIG_USB_SERIAL_MOS7840=m
+CONFIG_USB_SERIAL_MOTOROLA=m
+CONFIG_USB_SERIAL_NAVMAN=m
+CONFIG_USB_SERIAL_OMNINET=m
+CONFIG_USB_SERIAL_OPTICON=m
+CONFIG_USB_SERIAL_OPTION=m
+CONFIG_USB_SERIAL_OTI6858=m
+CONFIG_USB_SERIAL_PL2303=m
+CONFIG_USB_SERIAL_QUALCOMM=m
+CONFIG_USB_SERIAL_QUATECH2=m
+CONFIG_USB_SERIAL_QUATECH_USB2=m
+CONFIG_USB_SERIAL_SAFE=m
+# CONFIG_USB_SERIAL_SAFE_PADDED is not set
+CONFIG_USB_SERIAL_SIEMENS_MPI=m
+CONFIG_USB_SERIAL_SIERRAWIRELESS=m
+CONFIG_USB_SERIAL_SPCP8X5=m
+CONFIG_USB_SERIAL_SYMBOL=m
+CONFIG_USB_SERIAL_TI=m
+CONFIG_USB_SERIAL_VISOR=m
+CONFIG_USB_SERIAL_WHITEHEAT=m
+CONFIG_USB_SERIAL_XIRCOM=m
+CONFIG_USB_SEVSEG=m
+CONFIG_USB_SI470X=m
+CONFIG_USB_SISUSBVGA=m
+# CONFIG_USB_SISUSBVGA_CON is not set
+CONFIG_USB_SL811_CS=m
+CONFIG_USB_SL811_HCD=m
+CONFIG_USB_SN9C102=m
+CONFIG_USB_SPEEDTOUCH=m
+CONFIG_USB_STKWEBCAM=m
+CONFIG_USB_STORAGE=m
+CONFIG_USB_STORAGE_ALAUDA=m
+CONFIG_USB_STORAGE_CYPRESS_ATACB=m
+CONFIG_USB_STORAGE_DATAFAB=m
+# CONFIG_USB_STORAGE_DEBUG is not set
+CONFIG_USB_STORAGE_FREECOM=m
+CONFIG_USB_STORAGE_ISD200=m
+CONFIG_USB_STORAGE_JUMPSHOT=m
+CONFIG_USB_STORAGE_KARMA=m
+CONFIG_USB_STORAGE_ONETOUCH=m
+CONFIG_USB_STORAGE_SDDR09=m
+CONFIG_USB_STORAGE_SDDR55=m
+CONFIG_USB_STORAGE_USBAT=m
+CONFIG_USB_STV06XX=m
+CONFIG_USB_STV680=m
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_SUSPEND=y
+CONFIG_USB_TEST=m
+CONFIG_USB_TMC=m
+CONFIG_USB_TRANCEVIBRATOR=m
+CONFIG_USB_U132_HCD=m
+CONFIG_USB_UEAGLEATM=m
+CONFIG_USB_USBNET=m
+CONFIG_USB_USS720=m
+CONFIG_USB_VICAM=m
+CONFIG_USB_VIDEO_CLASS=m
+CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
+CONFIG_USB_VST=m
+CONFIG_USB_W9968CF=m
+CONFIG_USB_WDM=m
+CONFIG_USB_WHCI_HCD=m
+CONFIG_USB_WUSB=m
+CONFIG_USB_WUSB_CBAF=m
+# CONFIG_USB_WUSB_CBAF_DEBUG is not set
+CONFIG_USB_XHCI_HCD=m
+# CONFIG_USB_XHCI_HCD_DEBUGGING is not set
+CONFIG_USB_XUSBATM=m
+CONFIG_USB_ZC0301=m
+CONFIG_USB_ZD1201=m
+CONFIG_USB_ZERO=m
+CONFIG_USB_ZR364XX=m
+CONFIG_USER_NS=y
+CONFIG_USER_STACKTRACE_SUPPORT=y
+CONFIG_USE_GENERIC_SMP_HELPERS=y
+CONFIG_UTS_NS=y
+CONFIG_UWB=m
+CONFIG_UWB_HWA=m
+CONFIG_UWB_I1480U=m
+CONFIG_UWB_I1480U_WLP=m
+CONFIG_UWB_WHCI=m
+CONFIG_UWB_WLP=m
+CONFIG_V4L_USB_DRIVERS=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_VERSION_SIGNATURE=""
+CONFIG_VETH=m
+CONFIG_VFAT_FS=m
+CONFIG_VFP=y
+CONFIG_VFPv3=y
+# CONFIG_VGACON_SOFT_SCROLLBACK is not set
+CONFIG_VGASTATE=m
+CONFIG_VGA_ARB=y
+CONFIG_VGA_CONSOLE=y
+CONFIG_VIA_FIR=m
+CONFIG_VIA_RHINE=m
+CONFIG_VIA_RHINE_MMIO=y
+CONFIG_VIA_VELOCITY=m
+CONFIG_VIDEOBUF_DMA_SG=m
+CONFIG_VIDEOBUF_DVB=m
+CONFIG_VIDEOBUF_GEN=m
+CONFIG_VIDEOBUF_VMALLOC=m
+CONFIG_VIDEO_ADV7170=m
+CONFIG_VIDEO_ADV7175=m
+# CONFIG_VIDEO_ADV_DEBUG is not set
+CONFIG_VIDEO_ALLOW_V4L1=y
+CONFIG_VIDEO_AU0828=m
+CONFIG_VIDEO_BT819=m
+CONFIG_VIDEO_BT848=m
+CONFIG_VIDEO_BT848_DVB=y
+CONFIG_VIDEO_BT856=m
+CONFIG_VIDEO_BT866=m
+CONFIG_VIDEO_BTCX=m
+CONFIG_VIDEO_BWQCAM=m
+CONFIG_VIDEO_CAFE_CCIC=m
+CONFIG_VIDEO_CAPTURE_DRIVERS=y
+CONFIG_VIDEO_CPIA=m
+CONFIG_VIDEO_CPIA2=m
+CONFIG_VIDEO_CPIA_PP=m
+CONFIG_VIDEO_CPIA_USB=m
+CONFIG_VIDEO_CQCAM=m
+CONFIG_VIDEO_CS5345=m
+CONFIG_VIDEO_CS53L32A=m
+CONFIG_VIDEO_CX18=m
+CONFIG_VIDEO_CX231XX=m
+CONFIG_VIDEO_CX231XX_ALSA=m
+CONFIG_VIDEO_CX231XX_DVB=m
+CONFIG_VIDEO_CX2341X=m
+CONFIG_VIDEO_CX23885=m
+CONFIG_VIDEO_CX25821=m
+CONFIG_VIDEO_CX25821_ALSA=m
+CONFIG_VIDEO_CX25840=m
+CONFIG_VIDEO_CX88=m
+CONFIG_VIDEO_CX88_ALSA=m
+CONFIG_VIDEO_CX88_BLACKBIRD=m
+CONFIG_VIDEO_CX88_DVB=m
+CONFIG_VIDEO_CX88_MPEG=m
+CONFIG_VIDEO_CX88_VP3054=m
+CONFIG_VIDEO_EM28XX=m
+CONFIG_VIDEO_EM28XX_ALSA=m
+CONFIG_VIDEO_EM28XX_DVB=m
+CONFIG_VIDEO_FB_IVTV=m
+# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
+CONFIG_VIDEO_GO7007=m
+CONFIG_VIDEO_GO7007_OV7640=m
+CONFIG_VIDEO_GO7007_SAA7113=m
+CONFIG_VIDEO_GO7007_SAA7115=m
+CONFIG_VIDEO_GO7007_SONY_TUNER=m
+CONFIG_VIDEO_GO7007_TW2804=m
+CONFIG_VIDEO_GO7007_TW9903=m
+CONFIG_VIDEO_GO7007_UDA1342=m
+CONFIG_VIDEO_GO7007_USB=m
+CONFIG_VIDEO_GO7007_USB_S2250_BOARD=m
+CONFIG_VIDEO_HDPVR=m
+CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
+CONFIG_VIDEO_HEXIUM_GEMINI=m
+CONFIG_VIDEO_HEXIUM_ORION=m
+CONFIG_VIDEO_IR=m
+CONFIG_VIDEO_IR_I2C=m
+CONFIG_VIDEO_IVTV=m
+CONFIG_VIDEO_KS0127=m
+CONFIG_VIDEO_M52790=m
+CONFIG_VIDEO_MEDIA=m
+CONFIG_VIDEO_MEYE=m
+CONFIG_VIDEO_MSP3400=m
+CONFIG_VIDEO_MT9V011=m
+CONFIG_VIDEO_MXB=m
+CONFIG_VIDEO_OUTPUT_CONTROL=m
+CONFIG_VIDEO_OV7670=m
+CONFIG_VIDEO_OVCAMCHIP=m
+CONFIG_VIDEO_PMS=m
+CONFIG_VIDEO_PVRUSB2=m
+# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set
+CONFIG_VIDEO_PVRUSB2_DVB=y
+CONFIG_VIDEO_PVRUSB2_SYSFS=y
+CONFIG_VIDEO_SAA5246A=m
+CONFIG_VIDEO_SAA5249=m
+CONFIG_VIDEO_SAA6588=m
+CONFIG_VIDEO_SAA7110=m
+CONFIG_VIDEO_SAA711X=m
+CONFIG_VIDEO_SAA7127=m
+CONFIG_VIDEO_SAA7134=m
+CONFIG_VIDEO_SAA7134_ALSA=m
+CONFIG_VIDEO_SAA7134_DVB=m
+CONFIG_VIDEO_SAA7146=m
+CONFIG_VIDEO_SAA7146_VV=m
+CONFIG_VIDEO_SAA7164=m
+CONFIG_VIDEO_SAA717X=m
+CONFIG_VIDEO_SAA7185=m
+CONFIG_VIDEO_STRADIS=m
+CONFIG_VIDEO_TDA7432=m
+CONFIG_VIDEO_TDA9840=m
+CONFIG_VIDEO_TEA6415C=m
+CONFIG_VIDEO_TEA6420=m
+CONFIG_VIDEO_TUNER=m
+CONFIG_VIDEO_TVAUDIO=m
+CONFIG_VIDEO_TVEEPROM=m
+CONFIG_VIDEO_TVP5150=m
+CONFIG_VIDEO_UPD64031A=m
+CONFIG_VIDEO_UPD64083=m
+CONFIG_VIDEO_USBVIDEO=m
+CONFIG_VIDEO_USBVISION=m
+CONFIG_VIDEO_V4L1=m
+CONFIG_VIDEO_V4L1_COMPAT=y
+CONFIG_VIDEO_V4L2=m
+CONFIG_VIDEO_V4L2_COMMON=m
+CONFIG_VIDEO_VIVI=m
+CONFIG_VIDEO_VP27SMPX=m
+CONFIG_VIDEO_VPX3220=m
+CONFIG_VIDEO_W9966=m
+CONFIG_VIDEO_WM8739=m
+CONFIG_VIDEO_WM8775=m
+CONFIG_VIDEO_ZORAN=m
+CONFIG_VIDEO_ZORAN_AVS6EYES=m
+CONFIG_VIDEO_ZORAN_BUZ=m
+CONFIG_VIDEO_ZORAN_DC10=m
+CONFIG_VIDEO_ZORAN_DC30=m
+CONFIG_VIDEO_ZORAN_LML33=m
+CONFIG_VIDEO_ZORAN_LML33R10=m
+CONFIG_VIDEO_ZORAN_ZR36060=m
+CONFIG_VIRTIO_BALLOON=m
+CONFIG_VIRTIO_CONSOLE=m
+CONFIG_VIRTUALIZATION=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_VITESSE_PHY=y
+CONFIG_VLAN_8021Q=m
+CONFIG_VLAN_8021Q_GVRP=y
+CONFIG_VLSI_FIR=m
+CONFIG_VM86=y
+CONFIG_VME_BUS=m
+CONFIG_VME_USER=m
+CONFIG_VMI=y
+# CONFIG_VMSPLIT_1G is not set
+# CONFIG_VMSPLIT_2G is not set
+CONFIG_VMSPLIT_3G=y
+CONFIG_VMWARE_PVSCSI=m
+CONFIG_VMXNET3=m
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_VORTEX=m
+CONFIG_VT=y
+# CONFIG_VT6655 is not set
+CONFIG_VT_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+CONFIG_VXFS_FS=m
+CONFIG_VXGE=m
+# CONFIG_VXGE_DEBUG_TRACE_ALL is not set
+CONFIG_W1=m
+CONFIG_W1_CON=y
+CONFIG_W1_MASTER_DS1WM=m
+CONFIG_W1_MASTER_DS2482=m
+CONFIG_W1_MASTER_DS2490=m
+CONFIG_W1_MASTER_GPIO=m
+CONFIG_W1_MASTER_MATROX=m
+CONFIG_W1_SLAVE_BQ27000=m
+CONFIG_W1_SLAVE_DS2431=m
+CONFIG_W1_SLAVE_DS2433=m
+# CONFIG_W1_SLAVE_DS2433_CRC is not set
+CONFIG_W1_SLAVE_DS2760=m
+CONFIG_W1_SLAVE_SMEM=m
+CONFIG_W1_SLAVE_THERM=m
+CONFIG_W35UND=m
+CONFIG_W83627HF_WDT=m
+CONFIG_W83697HF_WDT=m
+CONFIG_W83697UG_WDT=m
+CONFIG_W83877F_WDT=m
+CONFIG_W83977F_WDT=m
+CONFIG_WAFER_WDT=m
+CONFIG_WANXL=m
+CONFIG_WAN_ROUTER_DRIVERS=m
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+CONFIG_WAVELAN=m
+CONFIG_WD80x3=m
+CONFIG_WDT=m
+CONFIG_WDTPCI=m
+CONFIG_WIMAX=m
+CONFIG_WIMAX_DEBUG_LEVEL=8
+CONFIG_WIMAX_I2400M=m
+CONFIG_WIMAX_I2400M_DEBUG_LEVEL=8
+CONFIG_WIMAX_I2400M_SDIO=m
+CONFIG_WIMAX_I2400M_USB=m
+CONFIG_WINBOND_840=m
+CONFIG_WINBOND_FIR=m
+CONFIG_WIRELESS=y
+CONFIG_WIRELESS_EXT=y
+CONFIG_WIRELESS_EXT_SYSFS=y
+# CONFIG_WIRELESS_OLD_REGULATORY is not set
+CONFIG_WL1251=m
+CONFIG_WL1251_SDIO=m
+CONFIG_WL1251_SPI=m
+CONFIG_WL1271=m
+CONFIG_WL12XX=m
+CONFIG_WLAN=y
+CONFIG_WLAN_80211=y
+CONFIG_WLAN_PRE80211=y
+CONFIG_WM831X_POWER=m
+CONFIG_WM831X_WATCHDOG=m
+CONFIG_WM8350_POWER=m
+CONFIG_WM8350_WATCHDOG=m
+# CONFIG_WORKQUEUE_TRACER is not set
+CONFIG_X25_ASY=m
+CONFIG_X86=y
+# CONFIG_X86_32_NON_STANDARD is not set
+CONFIG_X86_32_SMP=y
+CONFIG_X86_64_ACPI_NUMA=y
+CONFIG_X86_64_SMP=y
+CONFIG_X86_ACPI_CPUFREQ=y
+CONFIG_X86_ALIGNMENT_16=y
+# CONFIG_X86_ANCIENT_MCE is not set
+CONFIG_X86_APM_BOOT=y
+# CONFIG_X86_BIGSMP is not set
+CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK=y
+CONFIG_X86_BSWAP=y
+CONFIG_X86_CHECK_BIOS_CORRUPTION=y
+CONFIG_X86_CMOV=y
+CONFIG_X86_CMPXCHG=y
+CONFIG_X86_CMPXCHG64=y
+CONFIG_X86_CPU=y
+CONFIG_X86_CPUFREQ_NFORCE2=y
+CONFIG_X86_CPUID=m
+CONFIG_X86_DEBUGCTLMSR=y
+# CONFIG_X86_DS is not set
+# CONFIG_X86_ELAN is not set
+CONFIG_X86_EXTENDED_PLATFORM=y
+CONFIG_X86_E_POWERSAVER=m
+CONFIG_X86_F00F_BUG=y
+CONFIG_X86_GENERIC=y
+CONFIG_X86_GX_SUSPMOD=y
+CONFIG_X86_HT=y
+CONFIG_X86_INTEL_USERCOPY=y
+CONFIG_X86_INTERNODE_CACHE_BYTES=64
+CONFIG_X86_INVLPG=y
+CONFIG_X86_IO_APIC=y
+CONFIG_X86_L1_CACHE_BYTES=64
+CONFIG_X86_LOCAL_APIC=y
+CONFIG_X86_LONGHAUL=y
+CONFIG_X86_LONGRUN=y
+CONFIG_X86_MCE=y
+CONFIG_X86_MCE_AMD=y
+CONFIG_X86_MCE_INJECT=m
+CONFIG_X86_MCE_INTEL=y
+CONFIG_X86_MCE_THRESHOLD=y
+CONFIG_X86_MCE_XEON75XX=m
+CONFIG_X86_MPPARSE=y
+CONFIG_X86_MRST=y
+CONFIG_X86_MSR=m
+CONFIG_X86_NEED_RELOCS=y
+CONFIG_X86_P4_CLOCKMOD=m
+CONFIG_X86_PAE=y
+CONFIG_X86_PAT=y
+CONFIG_X86_PLATFORM_DEVICES=y
+CONFIG_X86_PM_TIMER=y
+CONFIG_X86_POPAD_OK=y
+CONFIG_X86_POWERNOW_K6=y
+CONFIG_X86_POWERNOW_K7=y
+CONFIG_X86_POWERNOW_K7_ACPI=y
+CONFIG_X86_POWERNOW_K8=y
+CONFIG_X86_PPRO_FENCE=y
+# CONFIG_X86_PTDUMP is not set
+# CONFIG_X86_RDC321X is not set
+CONFIG_X86_REBOOTFIXUPS=y
+CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS=y
+CONFIG_X86_RESERVE_LOW_64K=y
+CONFIG_X86_SPEEDSTEP_CENTRINO=y
+CONFIG_X86_SPEEDSTEP_CENTRINO_TABLE=y
+CONFIG_X86_SPEEDSTEP_ICH=y
+CONFIG_X86_SPEEDSTEP_RELAXED_CAP_CHECK=y
+CONFIG_X86_SPEEDSTEP_SMI=y
+CONFIG_X86_SUPPORTS_MEMORY_FAILURE=y
+CONFIG_X86_THERMAL_VECTOR=y
+CONFIG_X86_TRAMPOLINE=y
+CONFIG_X86_TSC=y
+# CONFIG_X86_VERBOSE_BOOTUP is not set
+# CONFIG_X86_VSMP is not set
+CONFIG_X86_WP_WORKS_OK=y
+CONFIG_X86_XADD=y
+CONFIG_XEN=y
+CONFIG_XENFS=m
+CONFIG_XEN_BALLOON=y
+CONFIG_XEN_BLKDEV_FRONTEND=m
+CONFIG_XEN_COMPAT_XENFS=y
+# CONFIG_XEN_DEBUG_FS is not set
+CONFIG_XEN_DEV_EVTCHN=m
+CONFIG_XEN_FBDEV_FRONTEND=m
+CONFIG_XEN_KBDDEV_FRONTEND=m
+CONFIG_XEN_MAX_DOMAIN_MEMORY=32
+CONFIG_XEN_NETDEV_FRONTEND=m
+CONFIG_XEN_SAVE_RESTORE=y
+CONFIG_XEN_SCRUB_PAGES=y
+CONFIG_XEN_SYS_HYPERVISOR=y
+CONFIG_XFRM=y
+CONFIG_XFRM_IPCOMP=m
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+CONFIG_XFRM_USER=m
+# CONFIG_XFS_DEBUG is not set
+CONFIG_XFS_FS=m
+CONFIG_XFS_POSIX_ACL=y
+CONFIG_XFS_QUOTA=y
+CONFIG_XFS_RT=y
+# CONFIG_XIP_KERNEL is not set
+CONFIG_XOR_BLOCKS=m
+CONFIG_YAM=m
+CONFIG_YELLOWFIN=m
+CONFIG_YENTA=m
+CONFIG_YENTA_ENE_TUNE=y
+CONFIG_YENTA_O2=y
+CONFIG_YENTA_RICOH=y
+CONFIG_YENTA_TI=y
+CONFIG_YENTA_TOSHIBA=y
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZD1211RW=m
+# CONFIG_ZD1211RW_DEBUG is not set
+CONFIG_ZEROPLUS_FF=y
+CONFIG_ZISOFS=y
+CONFIG_ZLIB_DEFLATE=m
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZNET=m
+CONFIG_ZONE_DMA=y
--- linux-mvl-dove-2.6.32.orig/debian.master/config/config.common.ports
+++ linux-mvl-dove-2.6.32/debian.master/config/config.common.ports
@@ -0,0 +1,3930 @@
+#
+# Common config options automatically generated by splitconfig.pl
+#
+CONFIG_3C359=m
+# CONFIG_40x is not set
+# CONFIG_44x is not set
+CONFIG_64BIT=y
+CONFIG_6PACK=m
+CONFIG_6xx=y
+CONFIG_8139CP=m
+CONFIG_8139TOO=m
+CONFIG_8139TOO_8129=y
+CONFIG_8139TOO_PIO=y
+# CONFIG_8139TOO_TUNE_TWISTER is not set
+# CONFIG_8139_OLD_RX_RESET is not set
+CONFIG_9P_FS=m
+# CONFIG_9P_FSCACHE is not set
+CONFIG_A11Y_BRAILLE_CONSOLE=y
+CONFIG_AB3100_CORE=m
+CONFIG_AB3100_OTP=m
+CONFIG_ABYSS=m
+CONFIG_AC97_BUS=m
+CONFIG_ACENIC=m
+# CONFIG_ACENIC_OMIT_TIGON_I is not set
+# CONFIG_ACORN_PARTITION_ADFS is not set
+# CONFIG_ACORN_PARTITION_CUMANA is not set
+# CONFIG_ACORN_PARTITION_EESOX is not set
+CONFIG_ACORN_PARTITION_ICS=y
+# CONFIG_ACORN_PARTITION_POWERTEC is not set
+CONFIG_ACORN_PARTITION_RISCIX=y
+CONFIG_ACPI=y
+CONFIG_ACPI_BLACKLIST_YEAR=0
+CONFIG_ACPI_BUTTON=m
+CONFIG_ACPI_CONTAINER=m
+# CONFIG_ACPI_CUSTOM_DSDT is not set
+# CONFIG_ACPI_DEBUG is not set
+CONFIG_ACPI_DOCK=y
+CONFIG_ACPI_FAN=m
+CONFIG_ACPI_HOTPLUG_CPU=y
+CONFIG_ACPI_NUMA=y
+CONFIG_ACPI_PCI_SLOT=m
+CONFIG_ACPI_POWER_METER=m
+CONFIG_ACPI_PROCESSOR=m
+CONFIG_ACPI_PROCFS=y
+CONFIG_ACPI_PROCFS_POWER=y
+CONFIG_ACPI_PROC_EVENT=y
+CONFIG_ACPI_SYSFS_POWER=y
+CONFIG_ACPI_THERMAL=m
+CONFIG_ACT200L_DONGLE=m
+CONFIG_ACTISYS_DONGLE=m
+CONFIG_ADAPTEC_STARFIRE=m
+CONFIG_ADB=y
+CONFIG_ADB_CUDA=y
+CONFIG_ADB_MACIO=y
+CONFIG_ADB_PMU=y
+CONFIG_ADB_PMU_LED=y
+# CONFIG_ADB_PMU_LED_IDE is not set
+CONFIG_ADFS_FS=m
+# CONFIG_ADFS_FS_RW is not set
+CONFIG_ADM8211=m
+# CONFIG_ADVANCED_OPTIONS is not set
+CONFIG_AFFS_FS=m
+# CONFIG_AFS_DEBUG is not set
+CONFIG_AFS_FS=m
+# CONFIG_AFS_FSCACHE is not set
+CONFIG_AF_RXRPC=m
+# CONFIG_AF_RXRPC_DEBUG is not set
+CONFIG_AGP=m
+# CONFIG_AGP_HP_ZX1 is not set
+# CONFIG_AGP_I460 is not set
+# CONFIG_AGP_SGI_TIOCA is not set
+CONFIG_AGP_UNINORTH=m
+CONFIG_AIC79XX_CMDS_PER_DEVICE=32
+CONFIG_AIC79XX_DEBUG_MASK=0
+CONFIG_AIC79XX_RESET_DELAY_MS=15000
+CONFIG_AIC7XXX_CMDS_PER_DEVICE=8
+CONFIG_AIC7XXX_DEBUG_ENABLE=y
+CONFIG_AIC7XXX_DEBUG_MASK=0
+CONFIG_AIC7XXX_REG_PRETTY_PRINT=y
+CONFIG_AIC7XXX_RESET_DELAY_MS=15000
+# CONFIG_AIC94XX_DEBUG is not set
+CONFIG_AIO=y
+CONFIG_AIRO=m
+CONFIG_AIRO_CS=m
+CONFIG_ALI_FIR=m
+# CONFIG_ALTERA_PCIE_CHDMA is not set
+CONFIG_ALTIVEC=y
+# CONFIG_AMIGAONE is not set
+CONFIG_ANON_INODES=y
+CONFIG_ANSLCD=m
+CONFIG_APM_EMULATION=m
+CONFIG_APM_POWER=m
+CONFIG_APPLE_AIRPORT=m
+CONFIG_APPLICOM=m
+CONFIG_AR9170_LEDS=y
+CONFIG_AR9170_USB=m
+CONFIG_ARCH_DEFCONFIG="arch/sparc/configs/sparc64_defconfig"
+CONFIG_ARCH_DISCONTIGMEM_DEFAULT=y
+CONFIG_ARCH_DISCONTIGMEM_ENABLE=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_HAS_ILOG2_U32=y
+CONFIG_ARCH_HAS_ILOG2_U64=y
+CONFIG_ARCH_HAS_WALK_MEMORY=y
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_ARCH_MEMORY_PROBE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_ARCH_PROC_KCORE_TEXT=y
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+CONFIG_ARCH_SPARSEMEM_DEFAULT=y
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
+CONFIG_ARCH_SUPPORTS_MSI=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_ARCH_USES_PG_UNCACHED=y
+CONFIG_ARCH_WANTS_FREEZER_CONTROL=y
+CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
+CONFIG_ARCNET_1051=m
+CONFIG_ARCNET_1201=m
+CONFIG_ARCNET_CAP=m
+CONFIG_ARCNET_COM20020=m
+CONFIG_ARCNET_COM20020_CS=m
+CONFIG_ARCNET_COM20020_PCI=m
+CONFIG_ARCNET_COM90xx=m
+CONFIG_ARCNET_COM90xxIO=m
+CONFIG_ARCNET_RAW=m
+CONFIG_ARCNET_RIM_I=m
+# CONFIG_ARPD is not set
+CONFIG_ASK_IP_FIB_HASH=y
+# CONFIG_ASUS_OLED is not set
+CONFIG_ASYNC_CORE=m
+CONFIG_ASYNC_MEMCPY=m
+CONFIG_ASYNC_PQ=m
+CONFIG_ASYNC_RAID6_RECOV=m
+CONFIG_ASYNC_RAID6_TEST=m
+CONFIG_ASYNC_XOR=m
+CONFIG_AT76C50X_USB=m
+CONFIG_ATALK=m
+CONFIG_ATA_ACPI=y
+CONFIG_ATA_GENERIC=m
+CONFIG_ATA_OVER_ETH=m
+CONFIG_ATA_PIIX=m
+CONFIG_ATA_SFF=y
+CONFIG_ATA_VERBOSE_ERROR=y
+# CONFIG_ATH5K is not set
+CONFIG_ATH9K=m
+CONFIG_ATH9K_DEBUG=y
+CONFIG_ATH_COMMON=m
+CONFIG_ATL1=m
+CONFIG_ATL1C=m
+CONFIG_ATL1E=m
+CONFIG_ATL2=m
+CONFIG_ATM=m
+CONFIG_ATMEL=m
+CONFIG_ATM_AMBASSADOR=m
+# CONFIG_ATM_AMBASSADOR_DEBUG is not set
+CONFIG_ATM_BR2684=m
+# CONFIG_ATM_BR2684_IPFILTER is not set
+CONFIG_ATM_CLIP=m
+# CONFIG_ATM_CLIP_NO_ICMP is not set
+CONFIG_ATM_DRIVERS=y
+# CONFIG_ATM_DUMMY is not set
+CONFIG_ATM_ENI=m
+# CONFIG_ATM_ENI_DEBUG is not set
+# CONFIG_ATM_ENI_TUNE_BURST is not set
+CONFIG_ATM_FIRESTREAM=m
+CONFIG_ATM_FORE200E=m
+CONFIG_ATM_FORE200E_DEBUG=0
+CONFIG_ATM_FORE200E_TX_RETRY=16
+# CONFIG_ATM_FORE200E_USE_TASKLET is not set
+CONFIG_ATM_HE=m
+CONFIG_ATM_HE_USE_SUNI=y
+CONFIG_ATM_HORIZON=m
+# CONFIG_ATM_HORIZON_DEBUG is not set
+CONFIG_ATM_IA=m
+# CONFIG_ATM_IA_DEBUG is not set
+CONFIG_ATM_IDT77252=m
+# CONFIG_ATM_IDT77252_DEBUG is not set
+# CONFIG_ATM_IDT77252_RCV_ALL is not set
+CONFIG_ATM_IDT77252_USE_SUNI=y
+CONFIG_ATM_LANAI=m
+CONFIG_ATM_LANE=m
+CONFIG_ATM_MPOA=m
+CONFIG_ATM_NICSTAR=m
+# CONFIG_ATM_NICSTAR_USE_IDT77105 is not set
+# CONFIG_ATM_NICSTAR_USE_SUNI is not set
+CONFIG_ATM_SOLOS=m
+CONFIG_ATM_TCP=m
+CONFIG_ATM_ZATM=m
+# CONFIG_ATM_ZATM_DEBUG is not set
+CONFIG_AUDIT=y
+CONFIG_AUDITSYSCALL=y
+CONFIG_AUDIT_ARCH=y
+CONFIG_AUDIT_TREE=y
+CONFIG_AUFS_BDEV_LOOP=y
+# CONFIG_AUFS_BRANCH_MAX_1023 is not set
+CONFIG_AUFS_BRANCH_MAX_127=y
+# CONFIG_AUFS_BRANCH_MAX_32767 is not set
+# CONFIG_AUFS_BRANCH_MAX_511 is not set
+CONFIG_AUFS_BR_FUSE=y
+CONFIG_AUFS_BR_RAMFS=y
+# CONFIG_AUFS_DEBUG is not set
+# CONFIG_AUFS_EXPORT is not set
+CONFIG_AUFS_FS=m
+CONFIG_AUFS_HINOTIFY=y
+CONFIG_AUFS_POLL=y
+# CONFIG_AUFS_RDU is not set
+# CONFIG_AUFS_SHWH is not set
+CONFIG_AUTOFS4_FS=m
+CONFIG_AUTOFS_FS=m
+CONFIG_AUXDISPLAY=y
+CONFIG_AX25=m
+# CONFIG_AX25_DAMA_SLAVE is not set
+# CONFIG_B3DFG is not set
+CONFIG_B43=m
+CONFIG_B43LEGACY=m
+CONFIG_B43LEGACY_DEBUG=y
+CONFIG_B43LEGACY_DMA=y
+CONFIG_B43LEGACY_DMA_AND_PIO_MODE=y
+# CONFIG_B43LEGACY_DMA_MODE is not set
+CONFIG_B43LEGACY_HWRNG=y
+CONFIG_B43LEGACY_LEDS=y
+CONFIG_B43LEGACY_PCICORE_AUTOSELECT=y
+CONFIG_B43LEGACY_PCI_AUTOSELECT=y
+CONFIG_B43LEGACY_PIO=y
+# CONFIG_B43LEGACY_PIO_MODE is not set
+# CONFIG_B43_DEBUG is not set
+CONFIG_B43_HWRNG=y
+CONFIG_B43_LEDS=y
+CONFIG_B43_PCICORE_AUTOSELECT=y
+CONFIG_B43_PCI_AUTOSELECT=y
+# CONFIG_B43_PCMCIA is not set
+CONFIG_B43_PHY_LP=y
+CONFIG_B43_PIO=y
+# CONFIG_B43_SDIO is not set
+CONFIG_B44=m
+CONFIG_B44_PCI=y
+CONFIG_B44_PCICORE_AUTOSELECT=y
+CONFIG_B44_PCI_AUTOSELECT=y
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_DA903X=m
+CONFIG_BACKLIGHT_GENERIC=m
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_BACKLIGHT_WM831X=m
+# CONFIG_BACKTRACE_SELF_TEST is not set
+CONFIG_BASE_FULL=y
+CONFIG_BASE_SMALL=0
+CONFIG_BATTERY_BQ27x00=m
+CONFIG_BATTERY_DA9030=m
+CONFIG_BATTERY_DS2760=m
+CONFIG_BATTERY_DS2782=m
+CONFIG_BATTERY_MAX17040=m
+CONFIG_BATTERY_PMU=m
+CONFIG_BAYCOM_EPP=m
+CONFIG_BAYCOM_PAR=m
+CONFIG_BAYCOM_SER_FDX=m
+CONFIG_BAYCOM_SER_HDX=m
+CONFIG_BBC_I2C=m
+# CONFIG_BDI_SWITCH is not set
+CONFIG_BE2ISCSI=m
+CONFIG_BE2NET=m
+# CONFIG_BEFS_DEBUG is not set
+CONFIG_BEFS_FS=m
+CONFIG_BFS_FS=m
+CONFIG_BINFMT_ELF=y
+CONFIG_BINFMT_MISC=m
+CONFIG_BITREVERSE=y
+CONFIG_BITS=64
+CONFIG_BLK_CPQ_CISS_DA=m
+CONFIG_BLK_CPQ_DA=m
+CONFIG_BLK_DEV=y
+CONFIG_BLK_DEV_3W_XXXX_RAID=m
+# CONFIG_BLK_DEV_AEC62XX is not set
+# CONFIG_BLK_DEV_ALI15X3 is not set
+# CONFIG_BLK_DEV_AMD74XX is not set
+CONFIG_BLK_DEV_BSG=y
+# CONFIG_BLK_DEV_CMD64X is not set
+CONFIG_BLK_DEV_COMPCACHE=m
+# CONFIG_BLK_DEV_COMPCACHE_DEBUG is not set
+# CONFIG_BLK_DEV_COMPCACHE_STATS is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_CRYPTOLOOP=m
+# CONFIG_BLK_DEV_CS5520 is not set
+# CONFIG_BLK_DEV_CS5530 is not set
+CONFIG_BLK_DEV_DAC960=m
+# CONFIG_BLK_DEV_DELKIN is not set
+CONFIG_BLK_DEV_DM=y
+# CONFIG_BLK_DEV_GENERIC is not set
+# CONFIG_BLK_DEV_HD is not set
+# CONFIG_BLK_DEV_HPT366 is not set
+CONFIG_BLK_DEV_IDECD=y
+CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS=y
+# CONFIG_BLK_DEV_IDECS is not set
+CONFIG_BLK_DEV_IDEDMA=y
+CONFIG_BLK_DEV_IDEDMA_PCI=y
+CONFIG_BLK_DEV_IDEDMA_SFF=y
+CONFIG_BLK_DEV_IDEPCI=y
+# CONFIG_BLK_DEV_IDETAPE is not set
+CONFIG_BLK_DEV_IDE_PMAC=y
+CONFIG_BLK_DEV_IDE_PMAC_ATA100FIRST=y
+# CONFIG_BLK_DEV_IDE_SATA is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_BLK_DEV_INTEGRITY=y
+CONFIG_BLK_DEV_IO_TRACE=y
+# CONFIG_BLK_DEV_IT8172 is not set
+# CONFIG_BLK_DEV_IT8213 is not set
+# CONFIG_BLK_DEV_IT821X is not set
+# CONFIG_BLK_DEV_JMICRON is not set
+CONFIG_BLK_DEV_MD=m
+CONFIG_BLK_DEV_NBD=m
+# CONFIG_BLK_DEV_NS87415 is not set
+# CONFIG_BLK_DEV_OPTI621 is not set
+CONFIG_BLK_DEV_OSD=m
+# CONFIG_BLK_DEV_PDC202XX_NEW is not set
+# CONFIG_BLK_DEV_PDC202XX_OLD is not set
+# CONFIG_BLK_DEV_PIIX is not set
+# CONFIG_BLK_DEV_PLATFORM is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=65536
+# CONFIG_BLK_DEV_SC1200 is not set
+CONFIG_BLK_DEV_SD=m
+# CONFIG_BLK_DEV_SIIMAGE is not set
+# CONFIG_BLK_DEV_SL82C105 is not set
+# CONFIG_BLK_DEV_SLC90E66 is not set
+CONFIG_BLK_DEV_SR=m
+# CONFIG_BLK_DEV_SVWKS is not set
+CONFIG_BLK_DEV_SX8=m
+# CONFIG_BLK_DEV_TC86C001 is not set
+# CONFIG_BLK_DEV_TRIFLEX is not set
+# CONFIG_BLK_DEV_TRM290 is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_UMEM=m
+# CONFIG_BLK_DEV_VIA82CXXX is not set
+# CONFIG_BLK_DEV_XIP is not set
+CONFIG_BLOCK=y
+CONFIG_BLOCK_COMPAT=y
+CONFIG_BMAC=m
+CONFIG_BNX2=m
+# CONFIG_BNX2X is not set
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+# CONFIG_BOOTX_TEXT is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_BOOT_TRACER is not set
+CONFIG_BOUNCE=y
+CONFIG_BPQETHER=m
+CONFIG_BRANCH_PROFILE_NONE=y
+CONFIG_BRIDGE=m
+CONFIG_BRIDGE_EBT_802_3=m
+CONFIG_BRIDGE_EBT_AMONG=m
+CONFIG_BRIDGE_EBT_ARP=m
+CONFIG_BRIDGE_EBT_ARPREPLY=m
+CONFIG_BRIDGE_EBT_BROUTE=m
+CONFIG_BRIDGE_EBT_DNAT=m
+CONFIG_BRIDGE_EBT_IP=m
+CONFIG_BRIDGE_EBT_IP6=m
+CONFIG_BRIDGE_EBT_LIMIT=m
+CONFIG_BRIDGE_EBT_LOG=m
+CONFIG_BRIDGE_EBT_MARK=m
+CONFIG_BRIDGE_EBT_MARK_T=m
+CONFIG_BRIDGE_EBT_NFLOG=m
+CONFIG_BRIDGE_EBT_PKTTYPE=m
+CONFIG_BRIDGE_EBT_REDIRECT=m
+CONFIG_BRIDGE_EBT_SNAT=m
+CONFIG_BRIDGE_EBT_STP=m
+CONFIG_BRIDGE_EBT_T_FILTER=m
+CONFIG_BRIDGE_EBT_T_NAT=m
+CONFIG_BRIDGE_EBT_ULOG=m
+CONFIG_BRIDGE_EBT_VLAN=m
+CONFIG_BRIDGE_NETFILTER=y
+CONFIG_BRIQ_PANEL=m
+CONFIG_BROADCOM_PHY=m
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+CONFIG_BTRFS_FS=m
+CONFIG_BTRFS_FS_POSIX_ACL=y
+CONFIG_BT_BNEP=m
+CONFIG_BT_BNEP_MC_FILTER=y
+CONFIG_BT_BNEP_PROTO_FILTER=y
+# CONFIG_BT_CMTP is not set
+CONFIG_BT_HCIBCM203X=m
+CONFIG_BT_HCIBFUSB=m
+CONFIG_BT_HCIBLUECARD=m
+CONFIG_BT_HCIBPA10X=m
+CONFIG_BT_HCIBT3C=m
+CONFIG_BT_HCIBTSDIO=m
+CONFIG_BT_HCIBTUART=m
+CONFIG_BT_HCIBTUSB=m
+CONFIG_BT_HCIDTL1=m
+CONFIG_BT_HCIUART=m
+CONFIG_BT_HCIUART_BCSP=y
+CONFIG_BT_HCIUART_H4=y
+CONFIG_BT_HCIUART_LL=y
+CONFIG_BT_HCIVHCI=m
+CONFIG_BT_HIDP=m
+CONFIG_BT_L2CAP=m
+CONFIG_BT_MRVL=m
+CONFIG_BT_MRVL_SDIO=m
+CONFIG_BT_RFCOMM=m
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_SCO=m
+CONFIG_BUG=y
+CONFIG_C2PORT=m
+CONFIG_CACHEFILES=m
+# CONFIG_CACHEFILES_DEBUG is not set
+# CONFIG_CACHEFILES_HISTOGRAM is not set
+CONFIG_CAN=m
+CONFIG_CAN_BCM=m
+# CONFIG_CAN_CALC_BITTIMING is not set
+# CONFIG_CAN_DEBUG_DEVICES is not set
+CONFIG_CAN_DEV=m
+CONFIG_CAN_EMS_PCI=m
+CONFIG_CAN_EMS_USB=m
+CONFIG_CAN_KVASER_PCI=m
+CONFIG_CAN_RAW=m
+CONFIG_CAN_SJA1000=m
+CONFIG_CAN_SJA1000_OF_PLATFORM=m
+CONFIG_CAN_SJA1000_PLATFORM=m
+CONFIG_CAN_VCAN=m
+# CONFIG_CAPI_AVM is not set
+# CONFIG_CAPI_EICON is not set
+CONFIG_CAPI_TRACE=y
+CONFIG_CARDBUS=y
+# CONFIG_CARDMAN_4000 is not set
+# CONFIG_CARDMAN_4040 is not set
+# CONFIG_CARMINE_DRAM_CUSTOM is not set
+CONFIG_CASSINI=m
+CONFIG_CB710_CORE=m
+# CONFIG_CB710_DEBUG is not set
+CONFIG_CB710_DEBUG_ASSUMPTIONS=y
+CONFIG_CBE_CPUFREQ_SPU_GOVERNOR=m
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+CONFIG_CFG80211=m
+CONFIG_CFG80211_DEBUGFS=y
+CONFIG_CFG80211_DEFAULT_PS=y
+CONFIG_CFG80211_DEFAULT_PS_VALUE=1
+# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
+CONFIG_CGROUPS=y
+# CONFIG_CGROUP_CPUACCT is not set
+# CONFIG_CGROUP_DEBUG is not set
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CGROUP_NS=y
+# CONFIG_CGROUP_SCHED is not set
+CONFIG_CHARGER_PCF50633=m
+CONFIG_CHECK_SIGNATURE=y
+CONFIG_CHELSIO_T1=m
+CONFIG_CHELSIO_T1_1G=y
+CONFIG_CHELSIO_T3=m
+CONFIG_CHELSIO_T3_DEPENDS=y
+CONFIG_CHR_DEV_OSST=m
+CONFIG_CHR_DEV_SG=m
+CONFIG_CHR_DEV_ST=m
+CONFIG_CICADA_PHY=m
+CONFIG_CIFS=m
+# CONFIG_CIFS_DEBUG2 is not set
+CONFIG_CIFS_DFS_UPCALL=y
+# CONFIG_CIFS_EXPERIMENTAL is not set
+# CONFIG_CIFS_STATS is not set
+CONFIG_CIFS_UPCALL=y
+CONFIG_CIFS_WEAK_PW_HASH=y
+# CONFIG_CIFS_XATTR is not set
+CONFIG_CISS_SCSI_TAPE=y
+CONFIG_CLS_U32_MARK=y
+# CONFIG_CLS_U32_PERF is not set
+# CONFIG_CMDLINE_BOOL is not set
+CONFIG_CNIC=m
+CONFIG_CODA_FS=m
+# CONFIG_CODE_PATCHING_SELFTEST is not set
+# CONFIG_COMEDI is not set
+CONFIG_COMPAT=y
+CONFIG_COMPAT_BINFMT_ELF=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_COMPAT_FOR_U64_ALIGNMENT=y
+CONFIG_COMPAT_NETLINK_MESSAGES=y
+CONFIG_COMPUTONE=m
+CONFIG_CONFIGFS_FS=m
+CONFIG_CONNECTOR=m
+CONFIG_CONSOLE_POLL=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_CONSTRUCTORS=y
+CONFIG_CONTEXT_SWITCH_TRACER=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_CPUSETS=y
+# CONFIG_CPU_FREQ_DEBUG is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_PMAC=y
+CONFIG_CPU_FREQ_STAT=m
+CONFIG_CPU_FREQ_STAT_DETAILS=y
+CONFIG_CPU_FREQ_TABLE=y
+CONFIG_CRAMFS=m
+# CONFIG_CRASH_DUMP is not set
+CONFIG_CRC16=y
+CONFIG_CRC32=y
+CONFIG_CRC7=m
+CONFIG_CRC_CCITT=m
+CONFIG_CRC_ITU_T=m
+CONFIG_CRC_T10DIF=m
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_AEAD=m
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_AES=m
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_ANSI_CPRNG=m
+CONFIG_CRYPTO_ANUBIS=m
+CONFIG_CRYPTO_ARC4=m
+CONFIG_CRYPTO_AUTHENC=m
+CONFIG_CRYPTO_BLKCIPHER=m
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_BLOWFISH=m
+CONFIG_CRYPTO_CAMELLIA=m
+CONFIG_CRYPTO_CAST5=m
+CONFIG_CRYPTO_CAST6=m
+CONFIG_CRYPTO_CBC=m
+# CONFIG_CRYPTO_CCM is not set
+CONFIG_CRYPTO_CRC32C=m
+CONFIG_CRYPTO_CRYPTD=m
+# CONFIG_CRYPTO_CTR is not set
+CONFIG_CRYPTO_CTS=m
+CONFIG_CRYPTO_DEFLATE=m
+# CONFIG_CRYPTO_DEV_HIFN_795X is not set
+CONFIG_CRYPTO_ECB=m
+CONFIG_CRYPTO_FCRYPT=m
+CONFIG_CRYPTO_FIPS=y
+# CONFIG_CRYPTO_GCM is not set
+CONFIG_CRYPTO_GF128MUL=m
+CONFIG_CRYPTO_GHASH=m
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_HW=y
+CONFIG_CRYPTO_KHAZAD=m
+CONFIG_CRYPTO_LRW=m
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+CONFIG_CRYPTO_MD4=m
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_MICHAEL_MIC=m
+CONFIG_CRYPTO_NULL=m
+CONFIG_CRYPTO_PCBC=m
+CONFIG_CRYPTO_PCOMP=y
+CONFIG_CRYPTO_RMD128=m
+CONFIG_CRYPTO_RMD160=m
+CONFIG_CRYPTO_RMD256=m
+CONFIG_CRYPTO_RMD320=m
+CONFIG_CRYPTO_RNG=m
+CONFIG_CRYPTO_RNG2=y
+# CONFIG_CRYPTO_SALSA20 is not set
+CONFIG_CRYPTO_SEED=m
+# CONFIG_CRYPTO_SEQIV is not set
+CONFIG_CRYPTO_SERPENT=m
+CONFIG_CRYPTO_SHA1=m
+CONFIG_CRYPTO_SHA256=m
+CONFIG_CRYPTO_SHA512=m
+CONFIG_CRYPTO_TEA=m
+CONFIG_CRYPTO_TGR192=m
+CONFIG_CRYPTO_TWOFISH=m
+CONFIG_CRYPTO_TWOFISH_COMMON=m
+CONFIG_CRYPTO_VMAC=m
+CONFIG_CRYPTO_WORKQUEUE=y
+CONFIG_CRYPTO_WP512=m
+CONFIG_CRYPTO_XCBC=m
+CONFIG_CRYPTO_XTS=m
+CONFIG_CRYPTO_ZLIB=m
+CONFIG_CUSE=m
+CONFIG_CYCLADES=m
+CONFIG_CYCLADES_SYNC=m
+CONFIG_CYCLOMX_X25=y
+# CONFIG_CYZ_INTR is not set
+CONFIG_DAVICOM_PHY=m
+CONFIG_DCB=y
+CONFIG_DE2104X_DSL=0
+CONFIG_DE600=m
+CONFIG_DE620=m
+CONFIG_DEBUGGER=y
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_CREDENTIALS is not set
+# CONFIG_DEBUG_DCFLUSH is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_HIGHMEM is not set
+# CONFIG_DEBUG_INFO is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_PAGEALLOC is not set
+# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_SHIRQ is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DECNET=m
+CONFIG_DECNET_NF_GRABULATOR=m
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_LZMA=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_BIC is not set
+CONFIG_DEFAULT_CFQ=y
+CONFIG_DEFAULT_CUBIC=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_HTCP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_DEFAULT_NOOP is not set
+# CONFIG_DEFAULT_RENO is not set
+CONFIG_DEFAULT_SECURITY="apparmor"
+CONFIG_DEFAULT_SECURITY_APPARMOR=y
+# CONFIG_DEFAULT_SECURITY_DAC is not set
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_DEFAULT_UIMAGE is not set
+# CONFIG_DEFAULT_VEGAS is not set
+# CONFIG_DEFAULT_WESTWOOD is not set
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+# CONFIG_DEFXX_MMIO is not set
+CONFIG_DETECT_HUNG_TASK=y
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_DEVKMEM is not set
+CONFIG_DEVPORT=y
+CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_DIGIEPCA=m
+# CONFIG_DISABLE_VHPT is not set
+CONFIG_DISCONTIGMEM=y
+CONFIG_DISPLAY7SEG=m
+CONFIG_DISPLAY_SUPPORT=m
+CONFIG_DL2K=m
+CONFIG_DLCI=m
+CONFIG_DLCI_MAX=8
+CONFIG_DLM=m
+# CONFIG_DLM_DEBUG is not set
+CONFIG_DMAR=y
+# CONFIG_DMAR_DEFAULT_ON is not set
+# CONFIG_DMA_API_DEBUG is not set
+CONFIG_DMI=y
+CONFIG_DMIID=y
+CONFIG_DM_CRYPT=m
+# CONFIG_DM_DEBUG is not set
+# CONFIG_DM_DELAY is not set
+# CONFIG_DM_LOG_USERSPACE is not set
+CONFIG_DM_MIRROR=m
+CONFIG_DM_MULTIPATH=m
+CONFIG_DM_MULTIPATH_QL=m
+CONFIG_DM_MULTIPATH_ST=m
+# CONFIG_DM_RAID45 is not set
+CONFIG_DM_SNAPSHOT=m
+CONFIG_DM_UEVENT=y
+CONFIG_DM_ZERO=m
+CONFIG_DNET=m
+CONFIG_DNOTIFY=y
+CONFIG_DONGLE=y
+CONFIG_DRAGONRISE_FF=y
+CONFIG_DRM_I2C_CH7006=m
+CONFIG_DRM_KMS_HELPER=m
+CONFIG_DRM_MGA=m
+CONFIG_DRM_NOUVEAU=m
+CONFIG_DRM_NOUVEAU_BACKLIGHT=y
+CONFIG_DRM_NOUVEAU_DEBUG=y
+CONFIG_DRM_R128=m
+CONFIG_DRM_RADEON=m
+CONFIG_DRM_RADEON_KMS=y
+CONFIG_DRM_SAVAGE=m
+CONFIG_DRM_SIS=m
+CONFIG_DRM_TDFX=m
+CONFIG_DRM_TTM=m
+CONFIG_DRM_VIA=m
+CONFIG_DS1682=m
+CONFIG_DSCC4=m
+CONFIG_DSCC4_PCISYNC=y
+CONFIG_DSCC4_PCI_RST=y
+# CONFIG_DST is not set
+CONFIG_DTC=y
+CONFIG_DUMMY=m
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_DVB_AF9013=m
+CONFIG_DVB_AU8522=m
+CONFIG_DVB_AV7110=m
+CONFIG_DVB_AV7110_OSD=y
+CONFIG_DVB_B2C2_FLEXCOP=m
+# CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set
+CONFIG_DVB_B2C2_FLEXCOP_PCI=m
+CONFIG_DVB_B2C2_FLEXCOP_USB=m
+CONFIG_DVB_BCM3510=m
+CONFIG_DVB_BT8XX=m
+# CONFIG_DVB_BUDGET_CORE is not set
+CONFIG_DVB_CAPTURE_DRIVERS=y
+CONFIG_DVB_CX22700=m
+CONFIG_DVB_CX22702=m
+CONFIG_DVB_CX24110=m
+CONFIG_DVB_CX24116=m
+CONFIG_DVB_CX24123=m
+CONFIG_DVB_DIB3000MB=m
+CONFIG_DVB_DIB3000MC=m
+CONFIG_DVB_DIB7000M=m
+CONFIG_DVB_DIB7000P=m
+CONFIG_DVB_DIB8000=m
+CONFIG_DVB_DM1105=m
+CONFIG_DVB_DYNAMIC_MINORS=y
+# CONFIG_DVB_FE_CUSTOMISE is not set
+CONFIG_DVB_FIREDTV=m
+CONFIG_DVB_FIREDTV_IEEE1394=y
+CONFIG_DVB_FIREDTV_INPUT=y
+CONFIG_DVB_ISL6405=m
+CONFIG_DVB_ISL6421=m
+CONFIG_DVB_L64781=m
+CONFIG_DVB_LGDT3305=m
+CONFIG_DVB_LGDT330X=m
+CONFIG_DVB_LGS8GXX=m
+CONFIG_DVB_LNBP21=m
+CONFIG_DVB_MAX_ADAPTERS=8
+CONFIG_DVB_MT312=m
+CONFIG_DVB_MT352=m
+CONFIG_DVB_NXT200X=m
+CONFIG_DVB_NXT6000=m
+CONFIG_DVB_OR51132=m
+CONFIG_DVB_OR51211=m
+CONFIG_DVB_PLL=m
+CONFIG_DVB_PLUTO2=m
+CONFIG_DVB_PT1=m
+CONFIG_DVB_S5H1409=m
+CONFIG_DVB_S5H1411=m
+CONFIG_DVB_S5H1420=m
+CONFIG_DVB_SI21XX=m
+CONFIG_DVB_SP8870=m
+CONFIG_DVB_SP887X=m
+CONFIG_DVB_STB6000=m
+CONFIG_DVB_STV0288=m
+CONFIG_DVB_STV0297=m
+CONFIG_DVB_STV0299=m
+CONFIG_DVB_STV0900=m
+CONFIG_DVB_STV6110=m
+CONFIG_DVB_TDA10021=m
+CONFIG_DVB_TDA10023=m
+CONFIG_DVB_TDA10048=m
+CONFIG_DVB_TDA1004X=m
+CONFIG_DVB_TDA10086=m
+CONFIG_DVB_TDA8083=m
+CONFIG_DVB_TDA826X=m
+CONFIG_DVB_TTUSB_BUDGET=m
+CONFIG_DVB_TTUSB_DEC=m
+CONFIG_DVB_TUNER_CX24113=m
+CONFIG_DVB_TUNER_DIB0070=m
+CONFIG_DVB_TUNER_ITD1000=m
+CONFIG_DVB_USB=m
+CONFIG_DVB_USB_A800=m
+CONFIG_DVB_USB_AF9005=m
+CONFIG_DVB_USB_AF9005_REMOTE=m
+CONFIG_DVB_USB_AF9015=m
+CONFIG_DVB_USB_ANYSEE=m
+CONFIG_DVB_USB_AU6610=m
+CONFIG_DVB_USB_CE6230=m
+CONFIG_DVB_USB_CINERGY_T2=m
+CONFIG_DVB_USB_CXUSB=m
+# CONFIG_DVB_USB_DEBUG is not set
+CONFIG_DVB_USB_DIB0700=m
+CONFIG_DVB_USB_DIBUSB_MB=m
+CONFIG_DVB_USB_DIBUSB_MB_FAULTY=y
+CONFIG_DVB_USB_DIBUSB_MC=m
+CONFIG_DVB_USB_DIGITV=m
+CONFIG_DVB_USB_DTT200U=m
+CONFIG_DVB_USB_DTV5100=m
+CONFIG_DVB_USB_DW2102=m
+CONFIG_DVB_USB_FRIIO=m
+CONFIG_DVB_USB_GL861=m
+CONFIG_DVB_USB_GP8PSK=m
+CONFIG_DVB_USB_M920X=m
+CONFIG_DVB_USB_NOVA_T_USB2=m
+CONFIG_DVB_USB_OPERA1=m
+CONFIG_DVB_USB_TTUSB2=m
+CONFIG_DVB_USB_UMT_010=m
+CONFIG_DVB_USB_VP702X=m
+CONFIG_DVB_USB_VP7045=m
+CONFIG_DVB_VES1820=m
+CONFIG_DVB_VES1X93=m
+CONFIG_DVB_ZL10036=m
+CONFIG_DVB_ZL10039=m
+CONFIG_DVB_ZL10353=m
+# CONFIG_DYNAMIC_DEBUG is not set
+CONFIG_DYNAMIC_FTRACE=y
+CONFIG_E100=m
+CONFIG_E1000=m
+CONFIG_E1000E=m
+# CONFIG_E200 is not set
+CONFIG_EARLY_PRINTK=y
+# CONFIG_ECHO is not set
+CONFIG_ECONET_AUNUDP=y
+CONFIG_ECONET_NATIVE=y
+CONFIG_ECRYPT_FS=m
+CONFIG_EDAC=y
+# CONFIG_EDAC_AMD8111 is not set
+# CONFIG_EDAC_AMD8131 is not set
+# CONFIG_EDAC_CPC925 is not set
+# CONFIG_EDAC_DEBUG is not set
+CONFIG_EDAC_MM_EDAC=m
+# CONFIG_EDAC_PASEMI is not set
+CONFIG_EEH=y
+CONFIG_EEPROM_93CX6=m
+CONFIG_EEPROM_AT24=m
+CONFIG_EEPROM_AT25=m
+CONFIG_EEPROM_LEGACY=m
+CONFIG_EEPROM_MAX6875=m
+CONFIG_EFI=y
+CONFIG_EFI_PARTITION=y
+CONFIG_EFI_PCDP=y
+CONFIG_EFI_VARS=m
+CONFIG_EFS_FS=m
+# CONFIG_ELECTRA_CF is not set
+CONFIG_ELF_CORE=y
+# CONFIG_EMBEDDED is not set
+# CONFIG_EMBEDDED6xx is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+CONFIG_ENIC=m
+CONFIG_ENVCTRL=m
+CONFIG_EPIC100=m
+CONFIG_EPOLL=y
+CONFIG_EQUALIZER=m
+CONFIG_ESI_DONGLE=m
+# CONFIG_ET131X is not set
+CONFIG_ETHOC=m
+CONFIG_EVENTFD=y
+CONFIG_EVENT_PROFILE=y
+CONFIG_EVENT_TRACING=y
+# CONFIG_EXOFS_DEBUG is not set
+CONFIG_EXOFS_FS=m
+CONFIG_EXPERIMENTAL=y
+CONFIG_EXPORTFS=m
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+CONFIG_EXT2_FS_SECURITY=y
+CONFIG_EXT2_FS_XATTR=y
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_DEFAULTS_TO_ORDERED=y
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT4_DEBUG is not set
+CONFIG_EXT4_FS=y
+CONFIG_EXT4_FS_POSIX_ACL=y
+CONFIG_EXT4_FS_SECURITY=y
+CONFIG_EXT4_FS_XATTR=y
+CONFIG_EXTRA_FIRMWARE=""
+CONFIG_EXTRA_TARGETS=""
+CONFIG_FAIR_GROUP_SCHED=y
+CONFIG_FARSYNC=m
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+CONFIG_FAT_FS=m
+# CONFIG_FAULT_INJECTION is not set
+CONFIG_FB=y
+# CONFIG_FB_3DFX_ACCEL is not set
+CONFIG_FB_3DFX_I2C=y
+CONFIG_FB_ARK=m
+CONFIG_FB_ATY128_BACKLIGHT=y
+CONFIG_FB_ATY_BACKLIGHT=y
+CONFIG_FB_ATY_CT=y
+CONFIG_FB_ATY_GENERIC_LCD=y
+CONFIG_FB_ATY_GX=y
+CONFIG_FB_BACKLIGHT=y
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_BROADSHEET=m
+# CONFIG_FB_BW2 is not set
+CONFIG_FB_CARMINE=m
+CONFIG_FB_CARMINE_DRAM_EVAL=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_CG14 is not set
+# CONFIG_FB_CG3 is not set
+CONFIG_FB_CG6=y
+CONFIG_FB_CONTROL=y
+CONFIG_FB_CT65550=y
+CONFIG_FB_CYBER2000=m
+CONFIG_FB_DDC=y
+CONFIG_FB_DEFERRED_IO=y
+CONFIG_FB_FFB=y
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+CONFIG_FB_IBM_GXT4500=m
+# CONFIG_FB_LEO is not set
+CONFIG_FB_MATROX_G=y
+CONFIG_FB_MATROX_I2C=m
+CONFIG_FB_MATROX_MAVEN=m
+CONFIG_FB_MATROX_MILLENIUM=y
+CONFIG_FB_MATROX_MYSTIQUE=y
+CONFIG_FB_MB862XX=m
+CONFIG_FB_MB862XX_PCI_GDC=y
+CONFIG_FB_METRONOME=m
+CONFIG_FB_MODE_HELPERS=y
+CONFIG_FB_NVIDIA=m
+CONFIG_FB_NVIDIA_BACKLIGHT=y
+# CONFIG_FB_NVIDIA_DEBUG is not set
+CONFIG_FB_NVIDIA_I2C=y
+CONFIG_FB_OF=y
+# CONFIG_FB_P9100 is not set
+CONFIG_FB_PLATINUM=y
+CONFIG_FB_PM3=m
+CONFIG_FB_PS3_DEFAULT_SIZE_M=9
+CONFIG_FB_RADEON=y
+CONFIG_FB_RADEON_BACKLIGHT=y
+# CONFIG_FB_RADEON_DEBUG is not set
+CONFIG_FB_RADEON_I2C=y
+CONFIG_FB_RIVA_BACKLIGHT=y
+# CONFIG_FB_RIVA_DEBUG is not set
+CONFIG_FB_RIVA_I2C=y
+CONFIG_FB_S1D13XXX=m
+CONFIG_FB_S3=m
+CONFIG_FB_SAVAGE=m
+CONFIG_FB_SAVAGE_ACCEL=y
+CONFIG_FB_SAVAGE_I2C=y
+CONFIG_FB_SBUS=y
+CONFIG_FB_SIS_300=y
+CONFIG_FB_SIS_315=y
+CONFIG_FB_SM501=m
+CONFIG_FB_SVGALIB=m
+# CONFIG_FB_TCX is not set
+CONFIG_FB_TILEBLITTING=y
+CONFIG_FB_TMIO=m
+CONFIG_FB_TMIO_ACCELL=y
+# CONFIG_FB_UDL is not set
+CONFIG_FB_UVESA=m
+CONFIG_FB_VALKYRIE=y
+# CONFIG_FB_VGA16 is not set
+CONFIG_FB_VIA=m
+# CONFIG_FB_VIRTUAL is not set
+CONFIG_FB_VT8623=m
+CONFIG_FB_XVR2500=y
+CONFIG_FB_XVR500=y
+CONFIG_FCOE=m
+CONFIG_FDDI=y
+CONFIG_FEALNX=m
+CONFIG_FIB_RULES=y
+CONFIG_FILE_LOCKING=y
+# CONFIG_FIREWIRE is not set
+CONFIG_FIRMWARE_EDID=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+# CONFIG_FIRMWARE_MEMMAP is not set
+CONFIG_FIXED_PHY=y
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x16=y
+CONFIG_FONT_8x8=y
+# CONFIG_FONT_SUN12x22 is not set
+CONFIG_FONT_SUN8x16=y
+# CONFIG_FORCEDETH_NAPI is not set
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+CONFIG_FRAME_POINTER=y
+CONFIG_FRAME_WARN=1024
+CONFIG_FREEZER=y
+# CONFIG_FSAM7400 is not set
+CONFIG_FSCACHE=m
+# CONFIG_FSCACHE_DEBUG is not set
+# CONFIG_FSCACHE_HISTOGRAM is not set
+# CONFIG_FSCACHE_OBJECT_LIST is not set
+# CONFIG_FSCACHE_STATS is not set
+# CONFIG_FSL_ULI1575 is not set
+CONFIG_FSNOTIFY=y
+CONFIG_FS_MBCACHE=y
+CONFIG_FS_POSIX_ACL=y
+CONFIG_FTL=m
+CONFIG_FTRACE=y
+CONFIG_FTRACE_MCOUNT_RECORD=y
+# CONFIG_FTRACE_STARTUP_TEST is not set
+# CONFIG_FTR_FIXUP_SELFTEST is not set
+CONFIG_FUNCTION_GRAPH_TRACER=y
+CONFIG_FUNCTION_PROFILER=y
+CONFIG_FUNCTION_TRACER=y
+CONFIG_FUSE_FS=y
+CONFIG_FUSION=y
+CONFIG_FUSION_CTL=m
+CONFIG_FUSION_FC=m
+CONFIG_FUSION_LAN=m
+CONFIG_FUSION_LOGGING=y
+CONFIG_FUSION_SAS=m
+CONFIG_FUSION_SPI=m
+CONFIG_FUTEX=y
+CONFIG_FW_LOADER=y
+CONFIG_GACT_PROB=y
+CONFIG_GAMEPORT_EMU10K1=m
+CONFIG_GAMEPORT_FM801=m
+CONFIG_GAMEPORT_L4=m
+CONFIG_GAMEPORT_NS558=m
+CONFIG_GARP=m
+# CONFIG_GCOV_KERNEL is not set
+CONFIG_GELIC_WIRELESS=y
+# CONFIG_GELIC_WIRELESS_OLD_PSK_INTERFACE is not set
+CONFIG_GENERIC_ACL=y
+CONFIG_GENERIC_ALLOCATOR=y
+CONFIG_GENERIC_ATOMIC64=y
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_ISA_DMA=y
+# CONFIG_GENERIC_LOCKBREAK is not set
+CONFIG_GENERIC_NVRAM=y
+CONFIG_GENERIC_PENDING_IRQ=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+CONFIG_GENERIC_TRACER=y
+CONFIG_GFS2_FS=m
+CONFIG_GFS2_FS_LOCKING_DLM=y
+# CONFIG_GIGASET_BASE is not set
+# CONFIG_GIGASET_DEBUG is not set
+# CONFIG_GIGASET_M101 is not set
+# CONFIG_GIGASET_M105 is not set
+CONFIG_GIRBIL_DONGLE=m
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_BT8XX=m
+CONFIG_GPIO_LANGWELL=y
+CONFIG_GPIO_MAX7301=m
+CONFIG_GPIO_MAX732X=m
+CONFIG_GPIO_MC33880=m
+CONFIG_GPIO_MCP23S08=m
+CONFIG_GPIO_PCA953X=m
+CONFIG_GPIO_PCF857X=m
+CONFIG_GPIO_TWL4030=m
+CONFIG_GPIO_UCB1400=y
+CONFIG_GPIO_WM831X=m
+CONFIG_GPIO_XILINX=y
+CONFIG_GREENASIA_FF=y
+CONFIG_GROUP_SCHED=y
+CONFIG_HANGCHECK_TIMER=m
+CONFIG_HAS_DMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+# CONFIG_HAS_RAPIDIO is not set
+# CONFIG_HAVE_AOUT is not set
+# CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID is not set
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_HAVE_ARCH_NODEDATA_EXTENSION=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_DMA_ATTRS=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
+CONFIG_HAVE_IDE=y
+CONFIG_HAVE_IOREMAP_PROT=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_KVM=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_HAVE_LEGACY_PER_CPU_AREA=y
+CONFIG_HAVE_LMB=y
+CONFIG_HAVE_MEMORY_PRESENT=y
+CONFIG_HAVE_MLOCK=y
+CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+CONFIG_HAVE_MTD_OTP=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_HAVE_SYSCALL_WRAPPERS=y
+CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y
+# CONFIG_HCALL_STATS is not set
+CONFIG_HDLC=m
+CONFIG_HDLC_CISCO=m
+CONFIG_HDLC_FR=m
+CONFIG_HDLC_PPP=m
+CONFIG_HDLC_RAW=m
+CONFIG_HDLC_RAW_ETH=m
+CONFIG_HDLC_X25=m
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_HERMES=m
+CONFIG_HERMES_CACHE_FW_ON_INIT=y
+CONFIG_HFSPLUS_FS=m
+CONFIG_HFS_FS=m
+CONFIG_HIBERNATE_32=y
+CONFIG_HIBERNATE_64=y
+CONFIG_HIBERNATION=y
+CONFIG_HIBERNATION_NVS=y
+CONFIG_HID=m
+CONFIG_HIDRAW=y
+CONFIG_HID_3M_PCT=m
+CONFIG_HID_A4TECH=m
+CONFIG_HID_APPLE=m
+CONFIG_HID_BELKIN=m
+CONFIG_HID_CHERRY=m
+CONFIG_HID_CHICONY=m
+CONFIG_HID_CYPRESS=m
+CONFIG_HID_DRAGONRISE=m
+CONFIG_HID_EZKEY=m
+CONFIG_HID_GREENASIA=m
+CONFIG_HID_GYRATION=m
+CONFIG_HID_KENSINGTON=m
+CONFIG_HID_KYE=m
+CONFIG_HID_LOGITECH=m
+CONFIG_HID_MICROSOFT=m
+CONFIG_HID_MONTEREY=m
+CONFIG_HID_MOSART=m
+CONFIG_HID_NTRIG=m
+CONFIG_HID_ORTEK=m
+CONFIG_HID_PANTHERLORD=m
+CONFIG_HID_PETALYNX=m
+CONFIG_HID_PID=y
+CONFIG_HID_QUANTA=m
+CONFIG_HID_SAMSUNG=m
+CONFIG_HID_SMARTJOYPLUS=m
+CONFIG_HID_SONY=m
+CONFIG_HID_STANTUM=m
+CONFIG_HID_SUNPLUS=m
+CONFIG_HID_SUPPORT=y
+CONFIG_HID_THRUSTMASTER=m
+CONFIG_HID_TOPSEED=m
+CONFIG_HID_TWINHAN=m
+CONFIG_HID_WACOM=m
+CONFIG_HID_ZEROPLUS=m
+CONFIG_HIGHMEM=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_HOLES_IN_ZONE=y
+CONFIG_HOSTAP=m
+CONFIG_HOSTAP_CS=m
+CONFIG_HOSTAP_FIRMWARE=y
+CONFIG_HOSTAP_FIRMWARE_NVRAM=y
+CONFIG_HOSTAP_PCI=m
+CONFIG_HOSTAP_PLX=m
+CONFIG_HOTPLUG=y
+CONFIG_HOTPLUG_CPU=y
+# CONFIG_HOTPLUG_PCI is not set
+CONFIG_HPET=y
+CONFIG_HPET_MMAP=y
+CONFIG_HPFS_FS=m
+# CONFIG_HP_SIMETH is not set
+# CONFIG_HP_SIMSERIAL is not set
+CONFIG_HTC_PASIC3=m
+CONFIG_HUGETLBFS=y
+CONFIG_HUGETLB_PAGE_SIZE_4MB=y
+# CONFIG_HUGETLB_PAGE_SIZE_512K is not set
+# CONFIG_HUGETLB_PAGE_SIZE_64K is not set
+CONFIG_HUGETLB_PAGE_SIZE_VARIABLE=y
+# CONFIG_HVCS is not set
+# CONFIG_HVC_CONSOLE is not set
+CONFIG_HVC_DRIVER=y
+CONFIG_HVC_RTAS=y
+CONFIG_HVC_UDBG=y
+CONFIG_HWMON=y
+# CONFIG_HWMON_DEBUG_CHIP is not set
+CONFIG_HWMON_VID=m
+CONFIG_HW_CONSOLE=y
+CONFIG_HW_RANDOM=y
+CONFIG_HW_RANDOM_INTEL=m
+CONFIG_HW_RANDOM_N2RNG=y
+CONFIG_HW_RANDOM_PASEMI=y
+CONFIG_HW_RANDOM_TIMERIOMEM=m
+CONFIG_HW_RANDOM_VIRTIO=m
+# CONFIG_HYSDN is not set
+CONFIG_HZ=250
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+CONFIG_I2C=y
+CONFIG_I2C_ALGOBIT=y
+CONFIG_I2C_ALGOPCA=m
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=m
+CONFIG_I2C_COMPAT=y
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+CONFIG_I2C_HELPER_AUTO=y
+CONFIG_I2C_HYDRA=m
+CONFIG_I2C_ISCH=m
+CONFIG_I2C_MPC=m
+CONFIG_I2C_OCORES=m
+CONFIG_I2C_PARPORT=m
+CONFIG_I2C_PARPORT_LIGHT=m
+# CONFIG_I2C_PASEMI is not set
+CONFIG_I2C_PCA_PLATFORM=m
+CONFIG_I2C_PIIX4=m
+CONFIG_I2C_POWERMAC=y
+CONFIG_I2C_SCMI=m
+CONFIG_I2C_SI470X=m
+CONFIG_I2C_SI4713=m
+CONFIG_I2C_SIMTEC=m
+CONFIG_I2C_STUB=m
+CONFIG_I2C_TAOS_EVM=m
+CONFIG_I2C_TINY_USB=m
+CONFIG_I2O=m
+CONFIG_I2O_BLOCK=m
+CONFIG_I2O_BUS=m
+CONFIG_I2O_CONFIG=m
+CONFIG_I2O_CONFIG_OLD_IOCTL=y
+CONFIG_I2O_EXT_ADAPTEC=y
+CONFIG_I2O_EXT_ADAPTEC_DMA64=y
+CONFIG_I2O_LCT_NOTIFY_ON_CHANGES=y
+CONFIG_I2O_PROC=m
+CONFIG_I2O_SCSI=m
+CONFIG_I82092=m
+CONFIG_IA32_SUPPORT=y
+CONFIG_IA64=y
+# CONFIG_IA64_ACPI_CPUFREQ is not set
+# CONFIG_IA64_CYCLONE is not set
+# CONFIG_IA64_DEBUG_CMPXCHG is not set
+# CONFIG_IA64_DEBUG_IRQ is not set
+# CONFIG_IA64_DIG is not set
+# CONFIG_IA64_DIG_VTD is not set
+# CONFIG_IA64_ESI is not set
+CONFIG_IA64_GENERIC=y
+CONFIG_IA64_GRANULE_16MB=y
+# CONFIG_IA64_GRANULE_64MB is not set
+# CONFIG_IA64_HP_AML_NFW is not set
+# CONFIG_IA64_HP_SIM is not set
+# CONFIG_IA64_HP_ZX1 is not set
+# CONFIG_IA64_HP_ZX1_SWIOTLB is not set
+CONFIG_IA64_L1_CACHE_SHIFT=7
+# CONFIG_IA64_MCA_RECOVERY is not set
+# CONFIG_IA64_MC_ERR_INJECT is not set
+CONFIG_IA64_PAGE_SIZE_16KB=y
+# CONFIG_IA64_PAGE_SIZE_4KB is not set
+# CONFIG_IA64_PAGE_SIZE_64KB is not set
+# CONFIG_IA64_PAGE_SIZE_8KB is not set
+# CONFIG_IA64_PALINFO is not set
+# CONFIG_IA64_PRINT_HAZARDS is not set
+# CONFIG_IA64_SGI_SN2 is not set
+# CONFIG_IA64_SGI_UV is not set
+CONFIG_IA64_UNCACHED_ALLOCATOR=y
+# CONFIG_IA64_XEN_GUEST is not set
+# CONFIG_IBMEBUS is not set
+CONFIG_IBMLS=m
+CONFIG_IBMOL=m
+# CONFIG_IBMVETH is not set
+CONFIG_IBMVIO=y
+# CONFIG_IBM_BSR is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+CONFIG_ICPLUS_PHY=m
+CONFIG_ICS932S401=m
+CONFIG_IDEPCI_PCIBUS_ORDER=y
+CONFIG_IDE_ATAPI=y
+CONFIG_IDE_GD=y
+CONFIG_IDE_GD_ATA=y
+# CONFIG_IDE_GD_ATAPI is not set
+# CONFIG_IDE_PHISON is not set
+CONFIG_IDE_PROC_FS=y
+# CONFIG_IDE_TASK_IOCTL is not set
+CONFIG_IDE_TIMINGS=y
+CONFIG_IDE_XFER_MODE=y
+CONFIG_IEEE1394=m
+CONFIG_IEEE1394_DV1394=m
+CONFIG_IEEE1394_ETH1394=m
+CONFIG_IEEE1394_ETH1394_ROM_ENTRY=y
+CONFIG_IEEE1394_OHCI1394=m
+CONFIG_IEEE1394_RAWIO=m
+CONFIG_IEEE1394_SBP2=m
+# CONFIG_IEEE1394_SBP2_PHYS_DMA is not set
+# CONFIG_IEEE1394_VERBOSEDEBUG is not set
+CONFIG_IEEE1394_VIDEO1394=m
+CONFIG_IEEE802154=m
+CONFIG_IEEE802154_DRIVERS=m
+# CONFIG_IEEE802154_FAKEHARD is not set
+CONFIG_IFB=m
+# CONFIG_IGB is not set
+CONFIG_IGBVF=m
+# CONFIG_IIO is not set
+# CONFIG_IKCONFIG_PROC is not set
+# CONFIG_IMA is not set
+CONFIG_INET=y
+CONFIG_INET6_XFRM_MODE_BEET=m
+CONFIG_INET6_XFRM_MODE_TRANSPORT=m
+CONFIG_INET6_XFRM_MODE_TUNNEL=m
+CONFIG_INET_AH=m
+CONFIG_INET_DCCP_DIAG=m
+CONFIG_INET_DIAG=y
+CONFIG_INET_ESP=m
+CONFIG_INET_IPCOMP=m
+CONFIG_INET_LRO=y
+CONFIG_INET_TCP_DIAG=y
+CONFIG_INET_TUNNEL=m
+CONFIG_INET_XFRM_MODE_BEET=m
+CONFIG_INET_XFRM_MODE_TRANSPORT=m
+CONFIG_INET_XFRM_MODE_TUNNEL=m
+CONFIG_INET_XFRM_TUNNEL=m
+CONFIG_INFINIBAND=m
+CONFIG_INFINIBAND_ADDR_TRANS=y
+CONFIG_INFINIBAND_AMSO1100_DEBUG=y
+CONFIG_INFINIBAND_CXGB3=m
+# CONFIG_INFINIBAND_CXGB3_DEBUG is not set
+CONFIG_INFINIBAND_IPOIB=m
+CONFIG_INFINIBAND_IPOIB_DEBUG=y
+# CONFIG_INFINIBAND_IPOIB_DEBUG_DATA is not set
+CONFIG_INFINIBAND_MTHCA=m
+CONFIG_INFINIBAND_MTHCA_DEBUG=y
+# CONFIG_INFINIBAND_NES is not set
+CONFIG_INFINIBAND_USER_MEM=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+CONFIG_INPUT=y
+CONFIG_INPUT_ADBHID=y
+CONFIG_INPUT_ATI_REMOTE=m
+CONFIG_INPUT_ATI_REMOTE2=m
+CONFIG_INPUT_CM109=m
+CONFIG_INPUT_EVDEV=m
+CONFIG_INPUT_FF_MEMLESS=m
+# CONFIG_INPUT_GPIO is not set
+CONFIG_INPUT_GPIO_ROTARY_ENCODER=m
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_INPUT_KEYSPAN_REMOTE=m
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_MOUSE=y
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+CONFIG_INPUT_PCAP=m
+CONFIG_INPUT_PCF50633_PMU=m
+CONFIG_INPUT_PCSPKR=m
+CONFIG_INPUT_POLLDEV=m
+CONFIG_INPUT_POWERMATE=m
+CONFIG_INPUT_SPARCSPKR=y
+CONFIG_INPUT_TABLET=y
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_INPUT_TWL4030_PWRBUTTON=m
+CONFIG_INPUT_WM831X_ON=m
+CONFIG_INPUT_YEALINK=m
+CONFIG_IOMMU_API=y
+CONFIG_IOMMU_HELPER=y
+CONFIG_IOMMU_VMERGE=y
+CONFIG_IOSAPIC=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IP6_NF_FILTER=m
+CONFIG_IP6_NF_IPTABLES=m
+CONFIG_IP6_NF_MANGLE=m
+CONFIG_IP6_NF_MATCH_AH=m
+CONFIG_IP6_NF_MATCH_EUI64=m
+CONFIG_IP6_NF_MATCH_FRAG=m
+CONFIG_IP6_NF_MATCH_HL=m
+CONFIG_IP6_NF_MATCH_IPV6HEADER=m
+CONFIG_IP6_NF_MATCH_MH=m
+CONFIG_IP6_NF_MATCH_OPTS=m
+CONFIG_IP6_NF_MATCH_RT=m
+CONFIG_IP6_NF_QUEUE=m
+CONFIG_IP6_NF_RAW=m
+CONFIG_IP6_NF_SECURITY=m
+CONFIG_IP6_NF_TARGET_HL=m
+CONFIG_IP6_NF_TARGET_LOG=m
+CONFIG_IP6_NF_TARGET_REJECT=m
+# CONFIG_IPC_NS is not set
+CONFIG_IPDDP=m
+CONFIG_IPDDP_DECAP=y
+CONFIG_IPDDP_ENCAP=y
+# CONFIG_IPIC is not set
+CONFIG_IPMI_DEVICE_INTERFACE=m
+# CONFIG_IPMI_PANIC_EVENT is not set
+CONFIG_IPMI_SI=m
+CONFIG_IPMI_WATCHDOG=m
+CONFIG_IPV6=m
+# CONFIG_IPV6_MIP6 is not set
+# CONFIG_IPV6_MROUTE is not set
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+CONFIG_IPV6_NDISC_NODETYPE=y
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+CONFIG_IPV6_SIT=m
+CONFIG_IPW2100=m
+# CONFIG_IPW2100_DEBUG is not set
+CONFIG_IPW2100_MONITOR=y
+CONFIG_IPW2200=m
+# CONFIG_IPW2200_DEBUG is not set
+CONFIG_IPW2200_MONITOR=y
+CONFIG_IPW2200_PROMISCUOUS=y
+CONFIG_IPW2200_QOS=y
+CONFIG_IPW2200_RADIOTAP=y
+# CONFIG_IPWIRELESS is not set
+CONFIG_IPX=m
+# CONFIG_IPX_INTERN is not set
+CONFIG_IP_ADVANCED_ROUTER=y
+# CONFIG_IP_DCCP_CCID2_DEBUG is not set
+CONFIG_IP_DCCP_CCID3=y
+# CONFIG_IP_DCCP_CCID3_DEBUG is not set
+CONFIG_IP_DCCP_CCID3_RTO=100
+# CONFIG_IP_DCCP_DEBUG is not set
+CONFIG_IP_DCCP_TFRC_LIB=y
+CONFIG_IP_FIB_HASH=y
+# CONFIG_IP_FIB_TRIE is not set
+CONFIG_IP_MROUTE=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_IP_NF_ARPFILTER=m
+CONFIG_IP_NF_ARPTABLES=m
+CONFIG_IP_NF_ARP_MANGLE=m
+CONFIG_IP_NF_FILTER=m
+CONFIG_IP_NF_IPTABLES=m
+CONFIG_IP_NF_MANGLE=m
+CONFIG_IP_NF_MATCH_ADDRTYPE=m
+CONFIG_IP_NF_MATCH_AH=m
+CONFIG_IP_NF_MATCH_ECN=m
+CONFIG_IP_NF_MATCH_TTL=m
+CONFIG_IP_NF_RAW=m
+CONFIG_IP_NF_SECURITY=m
+CONFIG_IP_NF_TARGET_CLUSTERIP=m
+CONFIG_IP_NF_TARGET_ECN=m
+CONFIG_IP_NF_TARGET_LOG=m
+CONFIG_IP_NF_TARGET_MASQUERADE=m
+CONFIG_IP_NF_TARGET_NETMAP=m
+CONFIG_IP_NF_TARGET_REDIRECT=m
+CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_NF_TARGET_TTL=m
+CONFIG_IP_NF_TARGET_ULOG=m
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_RARP=y
+CONFIG_IP_SCTP=m
+CONFIG_IP_VS=m
+# CONFIG_IP_VS_DEBUG is not set
+CONFIG_IP_VS_DH=m
+CONFIG_IP_VS_FTP=m
+CONFIG_IP_VS_IPV6=y
+CONFIG_IP_VS_LBLC=m
+CONFIG_IP_VS_LBLCR=m
+CONFIG_IP_VS_LC=m
+CONFIG_IP_VS_NQ=m
+CONFIG_IP_VS_PROTO_AH=y
+CONFIG_IP_VS_PROTO_AH_ESP=y
+CONFIG_IP_VS_PROTO_ESP=y
+CONFIG_IP_VS_PROTO_TCP=y
+CONFIG_IP_VS_PROTO_UDP=y
+CONFIG_IP_VS_RR=m
+CONFIG_IP_VS_SED=m
+CONFIG_IP_VS_SH=m
+CONFIG_IP_VS_TAB_BITS=12
+CONFIG_IP_VS_WLC=m
+CONFIG_IP_VS_WRR=m
+CONFIG_IRCOMM=m
+CONFIG_IRDA_CACHE_LAST_LSAP=y
+CONFIG_IRDA_DEBUG=y
+CONFIG_IRDA_FAST_RR=y
+CONFIG_IRDA_ULTRA=y
+CONFIG_IRLAN=m
+CONFIG_IRNET=m
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_IRQSTACKS is not set
+# CONFIG_IRQ_ALL_CPUS is not set
+CONFIG_IRQ_PER_CPU=y
+CONFIG_IRTTY_SIR=m
+# CONFIG_ISA is not set
+CONFIG_ISA_DMA_API=y
+CONFIG_ISCSI_TCP=m
+# CONFIG_ISDN_AUDIO is not set
+CONFIG_ISDN_CAPI=m
+# CONFIG_ISDN_CAPI_CAPI20 is not set
+# CONFIG_ISDN_CAPI_CAPIDRV is not set
+# CONFIG_ISDN_CAPI_MIDDLEWARE is not set
+# CONFIG_ISDN_DIVERSION is not set
+CONFIG_ISDN_DRV_AVMB1_VERBOSE_REASON=y
+# CONFIG_ISDN_DRV_HISAX is not set
+# CONFIG_ISDN_DRV_LOOP is not set
+CONFIG_ISDN_HDLC=m
+CONFIG_ISDN_I4L=m
+# CONFIG_ISDN_PPP is not set
+# CONFIG_ISDN_X25 is not set
+# CONFIG_ISI is not set
+CONFIG_ISL29003=m
+CONFIG_ISO9660_FS=m
+CONFIG_ISTALLION=m
+# CONFIG_ITANIUM is not set
+CONFIG_ITCO_VENDOR_SUPPORT=y
+CONFIG_ITCO_WDT=m
+# CONFIG_IWL3945 is not set
+# CONFIG_IWL4965 is not set
+CONFIG_IWL5000=y
+CONFIG_IWLAGN=m
+CONFIG_IWLWIFI=m
+# CONFIG_IWLWIFI_DEBUG is not set
+CONFIG_IWLWIFI_LEDS=y
+# CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT is not set
+CONFIG_IWM=m
+# CONFIG_IWM_DEBUG is not set
+CONFIG_IXGB=m
+CONFIG_IXGBE=m
+CONFIG_IXGBE_DCB=y
+CONFIG_JBD=y
+CONFIG_JBD2=y
+# CONFIG_JBD2_DEBUG is not set
+# CONFIG_JBD_DEBUG is not set
+CONFIG_JFFS2_CMODE_FAVOURLZO=y
+# CONFIG_JFFS2_CMODE_NONE is not set
+# CONFIG_JFFS2_CMODE_PRIORITY is not set
+# CONFIG_JFFS2_CMODE_SIZE is not set
+CONFIG_JFFS2_COMPRESSION_OPTIONS=y
+CONFIG_JFFS2_FS=m
+CONFIG_JFFS2_FS_DEBUG=0
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_XATTR is not set
+CONFIG_JFFS2_LZO=y
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_JFFS2_SUMMARY is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFS_DEBUG is not set
+CONFIG_JFS_FS=m
+CONFIG_JFS_POSIX_ACL=y
+CONFIG_JFS_SECURITY=y
+CONFIG_JFS_STATISTICS=y
+CONFIG_JME=m
+CONFIG_JOLIET=y
+CONFIG_JOYSTICK_A3D=m
+CONFIG_JOYSTICK_ADI=m
+CONFIG_JOYSTICK_ANALOG=m
+CONFIG_JOYSTICK_COBRA=m
+CONFIG_JOYSTICK_DB9=m
+CONFIG_JOYSTICK_GAMECON=m
+CONFIG_JOYSTICK_GF2K=m
+CONFIG_JOYSTICK_GRIP=m
+CONFIG_JOYSTICK_GRIP_MP=m
+CONFIG_JOYSTICK_GUILLEMOT=m
+CONFIG_JOYSTICK_IFORCE=m
+CONFIG_JOYSTICK_IFORCE_232=y
+CONFIG_JOYSTICK_IFORCE_USB=y
+CONFIG_JOYSTICK_INTERACT=m
+CONFIG_JOYSTICK_JOYDUMP=m
+CONFIG_JOYSTICK_MAGELLAN=m
+CONFIG_JOYSTICK_SIDEWINDER=m
+CONFIG_JOYSTICK_SPACEBALL=m
+CONFIG_JOYSTICK_SPACEORB=m
+CONFIG_JOYSTICK_STINGER=m
+CONFIG_JOYSTICK_TMDC=m
+CONFIG_JOYSTICK_TURBOGRAFX=m
+CONFIG_JOYSTICK_TWIDJOY=m
+CONFIG_JOYSTICK_WALKERA0701=m
+CONFIG_JOYSTICK_WARRIOR=m
+CONFIG_JOYSTICK_XPAD=m
+CONFIG_JOYSTICK_XPAD_FF=y
+CONFIG_JOYSTICK_XPAD_LEDS=y
+CONFIG_JOYSTICK_ZHENHUA=m
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_ALL=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_KARMA_PARTITION=y
+CONFIG_KEXEC=y
+CONFIG_KEYBOARD_ADP5588=m
+CONFIG_KEYBOARD_ATKBD=y
+CONFIG_KEYBOARD_GPIO=m
+CONFIG_KEYBOARD_LKKBD=m
+CONFIG_KEYBOARD_LM8323=m
+CONFIG_KEYBOARD_MATRIX=m
+CONFIG_KEYBOARD_MAX7359=m
+CONFIG_KEYBOARD_OPENCORES=m
+CONFIG_KEYBOARD_STOWAWAY=m
+CONFIG_KEYBOARD_TWL4030=m
+CONFIG_KEYS=y
+CONFIG_KEYS_COMPAT=y
+# CONFIG_KEYS_DEBUG_PROC_KEYS is not set
+CONFIG_KGDB_SERIAL_CONSOLE=y
+# CONFIG_KGDB_TESTS is not set
+CONFIG_KINGSUN_DONGLE=m
+# CONFIG_KMEMTRACE is not set
+CONFIG_KPROBES=y
+# CONFIG_KPROBES_SANITY_TEST is not set
+CONFIG_KRETPROBES=y
+CONFIG_KS0108=m
+CONFIG_KS0108_DELAY=2
+CONFIG_KS0108_PORT=0x378
+CONFIG_KS8842=m
+CONFIG_KS8851=m
+CONFIG_KS8851_MLL=m
+CONFIG_KS959_DONGLE=m
+CONFIG_KSDAZZLE_DONGLE=m
+CONFIG_KSM=y
+CONFIG_LANMEDIA=m
+CONFIG_LAPBETHER=m
+CONFIG_LBDAF=y
+CONFIG_LCD_CLASS_DEVICE=m
+CONFIG_LCD_ILI9320=m
+CONFIG_LCD_LMS283GF05=m
+CONFIG_LCD_LTV350QV=m
+CONFIG_LCD_PLATFORM=m
+CONFIG_LCD_TDO24M=m
+CONFIG_LCD_VGG2432A4=m
+# CONFIG_LDM_DEBUG is not set
+CONFIG_LEDS_BD2802=m
+CONFIG_LEDS_DA903X=m
+CONFIG_LEDS_DAC124S085=m
+# CONFIG_LEDS_GPIO is not set
+CONFIG_LEDS_LP3944=m
+CONFIG_LEDS_SUNFIRE=m
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_BACKLIGHT=m
+CONFIG_LEDS_TRIGGER_GPIO=m
+# CONFIG_LEDS_TRIGGER_IDE_DISK is not set
+CONFIG_LEDS_WM831X_STATUS=m
+CONFIG_LEDS_WM8350=m
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=0
+CONFIG_LIB80211=m
+CONFIG_LIB80211_CRYPT_CCMP=m
+CONFIG_LIB80211_CRYPT_TKIP=m
+CONFIG_LIB80211_CRYPT_WEP=m
+# CONFIG_LIB80211_DEBUG is not set
+CONFIG_LIBCRC32C=m
+CONFIG_LIBERTAS=m
+CONFIG_LIBERTAS_CS=m
+# CONFIG_LIBERTAS_DEBUG is not set
+CONFIG_LIBERTAS_SDIO=m
+CONFIG_LIBERTAS_SPI=m
+CONFIG_LIBERTAS_THINFIRM=m
+CONFIG_LIBERTAS_THINFIRM_USB=m
+CONFIG_LIBERTAS_USB=m
+CONFIG_LIBFC=m
+CONFIG_LIBFCOE=m
+CONFIG_LIBIPW=m
+# CONFIG_LIBIPW_DEBUG is not set
+# CONFIG_LINE6_USB is not set
+CONFIG_LIRC_ATIUSB=m
+CONFIG_LIRC_BT829=m
+CONFIG_LIRC_CONFIG_LIRC_WPC8769L=m
+CONFIG_LIRC_DEV=m
+CONFIG_LIRC_ENE0100=m
+# CONFIG_LIRC_GPIO is not set
+CONFIG_LIRC_I2C=m
+CONFIG_LIRC_IGORPLUGUSB=m
+CONFIG_LIRC_IMON=m
+CONFIG_LIRC_IT87=m
+CONFIG_LIRC_ITE8709=m
+CONFIG_LIRC_MCEUSB=m
+# CONFIG_LIRC_PARALLEL is not set
+CONFIG_LIRC_SASEM=m
+CONFIG_LIRC_SERIAL=m
+CONFIG_LIRC_SIR=m
+CONFIG_LIRC_STREAMZAP=m
+CONFIG_LIRC_TTUSBIR=m
+CONFIG_LITELINK_DONGLE=m
+# CONFIG_LKDTM is not set
+CONFIG_LLC2=m
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_LOCKD=m
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_LOCKD_V4=y
+CONFIG_LOCK_KERNEL=y
+# CONFIG_LOCK_STAT is not set
+CONFIG_LOGIRUMBLEPAD2_FF=y
+CONFIG_LOGITECH_FF=y
+# CONFIG_LOGO is not set
+CONFIG_LOWMEM_SIZE=0x30000000
+# CONFIG_LPARCFG is not set
+# CONFIG_LP_CONSOLE is not set
+CONFIG_LSI_ET1011C_PHY=m
+CONFIG_LSM_MMAP_MIN_ADDR=0
+CONFIG_LXT_PHY=m
+CONFIG_M25PXX_USE_FAST_READ=y
+CONFIG_MA600_DONGLE=m
+CONFIG_MAC80211=m
+CONFIG_MAC80211_DEBUGFS=y
+# CONFIG_MAC80211_DEBUG_MENU is not set
+CONFIG_MAC80211_HAS_RC=y
+CONFIG_MAC80211_HWSIM=m
+CONFIG_MAC80211_LEDS=y
+CONFIG_MAC80211_RC_DEFAULT="minstrel"
+CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
+# CONFIG_MAC80211_RC_DEFAULT_PID is not set
+CONFIG_MAC80211_RC_MINSTREL=y
+CONFIG_MACE=m
+# CONFIG_MACE_AAUI_PORT is not set
+CONFIG_MACINTOSH_DRIVERS=y
+CONFIG_MAC_EMUMOUSEBTN=y
+CONFIG_MAC_FLOPPY=m
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_MARVELL_PHY=m
+CONFIG_MAX_RAW_DEVS=256
+CONFIG_MCKINLEY=y
+CONFIG_MCOUNT=y
+CONFIG_MCP2120_DONGLE=m
+CONFIG_MCS_FIR=m
+CONFIG_MD=y
+CONFIG_MDIO=m
+CONFIG_MDIO_BITBANG=m
+CONFIG_MDIO_GPIO=m
+CONFIG_MD_FAULTY=m
+CONFIG_MD_LINEAR=m
+CONFIG_MD_MULTIPATH=m
+CONFIG_MD_RAID0=m
+CONFIG_MD_RAID1=m
+CONFIG_MD_RAID10=m
+CONFIG_MD_RAID456=m
+CONFIG_MD_RAID6_PQ=m
+CONFIG_MEDIA_ATTACH=y
+CONFIG_MEDIA_SUPPORT=m
+CONFIG_MEDIA_TUNER=m
+# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
+CONFIG_MEDIA_TUNER_MC44S803=m
+CONFIG_MEDIA_TUNER_MT2060=m
+CONFIG_MEDIA_TUNER_MT20XX=m
+CONFIG_MEDIA_TUNER_MT2131=m
+CONFIG_MEDIA_TUNER_MT2266=m
+CONFIG_MEDIA_TUNER_MXL5005S=m
+CONFIG_MEDIA_TUNER_MXL5007T=m
+CONFIG_MEDIA_TUNER_QT1010=m
+CONFIG_MEDIA_TUNER_SIMPLE=m
+CONFIG_MEDIA_TUNER_TDA18271=m
+CONFIG_MEDIA_TUNER_TDA827X=m
+CONFIG_MEDIA_TUNER_TDA8290=m
+CONFIG_MEDIA_TUNER_TDA9887=m
+CONFIG_MEDIA_TUNER_TEA5761=m
+CONFIG_MEDIA_TUNER_TEA5767=m
+CONFIG_MEDIA_TUNER_XC2028=m
+CONFIG_MEDIA_TUNER_XC5000=m
+CONFIG_MEGARAID_LEGACY=m
+CONFIG_MEGARAID_MAILBOX=m
+CONFIG_MEGARAID_MM=m
+CONFIG_MEGARAID_NEWGEN=y
+CONFIG_MEGARAID_SAS=m
+CONFIG_MEMORY_HOTPLUG=y
+CONFIG_MEMORY_HOTPLUG_SPARSE=y
+# CONFIG_MEMORY_HOTREMOVE is not set
+# CONFIG_MEMSTICK is not set
+CONFIG_MFD_CORE=m
+CONFIG_MFD_MC13783=m
+CONFIG_MFD_PCF50633=m
+CONFIG_MFD_SM501=m
+# CONFIG_MFD_TMIO is not set
+CONFIG_MFD_WM831X=m
+CONFIG_MFD_WM8350=m
+CONFIG_MFD_WM8350_I2C=m
+CONFIG_MFD_WM8400=m
+CONFIG_MIGRATION=y
+CONFIG_MII=m
+CONFIG_MINIX_FS=m
+CONFIG_MISC_DEVICES=y
+CONFIG_MISC_FILESYSTEMS=y
+CONFIG_MISDN=m
+CONFIG_MISDN_AVMFRITZ=m
+# CONFIG_MISDN_DSP is not set
+# CONFIG_MISDN_HFCMULTI is not set
+# CONFIG_MISDN_HFCPCI is not set
+# CONFIG_MISDN_HFCUSB is not set
+CONFIG_MISDN_INFINEON=m
+CONFIG_MISDN_IPAC=m
+CONFIG_MISDN_ISAR=m
+# CONFIG_MISDN_L1OIP is not set
+CONFIG_MISDN_NETJET=m
+CONFIG_MISDN_SPEEDFAX=m
+CONFIG_MISDN_W6692=m
+CONFIG_MKISS=m
+CONFIG_MLX4_CORE=m
+CONFIG_MLX4_DEBUG=y
+CONFIG_MLX4_EN=m
+CONFIG_MLX4_INFINIBAND=m
+CONFIG_MMC=m
+# CONFIG_MMC_AT91 is not set
+# CONFIG_MMC_ATMELMCI is not set
+CONFIG_MMC_BLOCK=m
+CONFIG_MMC_BLOCK_BOUNCE=y
+CONFIG_MMC_CB710=m
+# CONFIG_MMC_DEBUG is not set
+CONFIG_MMC_RICOH_MMC=m
+CONFIG_MMC_SDHCI=m
+CONFIG_MMC_SDHCI_IO_ACCESSORS=y
+CONFIG_MMC_SDHCI_OF=m
+CONFIG_MMC_SDHCI_PCI=m
+CONFIG_MMC_SDHCI_PLTFM=m
+CONFIG_MMC_SDRICOH_CS=m
+CONFIG_MMC_SPI=m
+# CONFIG_MMC_TEST is not set
+CONFIG_MMC_TIFM_SD=m
+# CONFIG_MMC_UNSAFE_RESUME is not set
+CONFIG_MMC_VIA_SDMMC=m
+CONFIG_MMC_WBSD=m
+CONFIG_MMTIMER=y
+CONFIG_MMU=y
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_MODULE_SRCVERSION_ALL=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+CONFIG_MOUSE_APPLETOUCH=m
+CONFIG_MOUSE_BCM5974=m
+CONFIG_MOUSE_GPIO=m
+CONFIG_MOUSE_PS2=m
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_ELANTECH=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SENTELIC=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+CONFIG_MOUSE_SYNAPTICS_I2C=m
+CONFIG_MOXA_INTELLIO=m
+# CONFIG_MOXA_SMARTIO is not set
+# CONFIG_MPC5121_ADS is not set
+# CONFIG_MPC5121_GENERIC is not set
+CONFIG_MPIC=y
+CONFIG_MPIC_BROKEN_REGREAD=y
+CONFIG_MPIC_U3_HT_IRQS=y
+# CONFIG_MPIC_WEIRD is not set
+CONFIG_MSDOS_FS=m
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_MSI_BITMAP_SELFTEST is not set
+# CONFIG_MSPEC is not set
+CONFIG_MTD=m
+CONFIG_MTDRAM_ERASE_SIZE=128
+CONFIG_MTDRAM_TOTAL_SIZE=4096
+CONFIG_MTD_ABSENT=m
+CONFIG_MTD_ALAUDA=m
+CONFIG_MTD_AR7_PARTS=m
+CONFIG_MTD_BLKDEVS=m
+CONFIG_MTD_BLOCK=m
+CONFIG_MTD_BLOCK2MTD=m
+CONFIG_MTD_BLOCK_RO=m
+CONFIG_MTD_CFI=m
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_CFI_AMDSTD=m
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CFI_INTELEXT=m
+CONFIG_MTD_CFI_STAA=m
+CONFIG_MTD_CFI_UTIL=m
+CONFIG_MTD_CHAR=m
+CONFIG_MTD_COMPLEX_MAPPINGS=y
+CONFIG_MTD_CONCAT=m
+CONFIG_MTD_DATAFLASH=m
+CONFIG_MTD_DATAFLASH_OTP=y
+# CONFIG_MTD_DATAFLASH_WRITE_VERIFY is not set
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_DOC2000=m
+CONFIG_MTD_DOC2001=m
+CONFIG_MTD_DOC2001PLUS=m
+CONFIG_MTD_DOCECC=m
+CONFIG_MTD_DOCPROBE=m
+CONFIG_MTD_DOCPROBE_ADDRESS=0
+# CONFIG_MTD_DOCPROBE_ADVANCED is not set
+CONFIG_MTD_GEN_PROBE=m
+CONFIG_MTD_GPIO_ADDR=m
+CONFIG_MTD_INTEL_VR_NOR=m
+CONFIG_MTD_JEDECPROBE=m
+CONFIG_MTD_LPDDR=m
+CONFIG_MTD_M25P80=m
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+CONFIG_MTD_MTDRAM=m
+CONFIG_MTD_NAND=m
+CONFIG_MTD_NAND_CAFE=m
+CONFIG_MTD_NAND_DISKONCHIP=m
+# CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE is not set
+CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0
+# CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED is not set
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_FSL_ELBC is not set
+CONFIG_MTD_NAND_IDS=m
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+CONFIG_MTD_NAND_NANDSIM=m
+# CONFIG_MTD_NAND_PASEMI is not set
+CONFIG_MTD_NAND_PLATFORM=m
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_OF_PARTS is not set
+CONFIG_MTD_ONENAND=m
+CONFIG_MTD_ONENAND_2X_PROGRAM=y
+CONFIG_MTD_ONENAND_GENERIC=m
+# CONFIG_MTD_ONENAND_OTP is not set
+CONFIG_MTD_ONENAND_SIM=m
+CONFIG_MTD_ONENAND_VERIFY_WRITE=y
+CONFIG_MTD_OOPS=m
+CONFIG_MTD_PARTITIONS=y
+CONFIG_MTD_PCI=m
+CONFIG_MTD_PHRAM=m
+CONFIG_MTD_PHYSMAP=m
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+CONFIG_MTD_PHYSMAP_OF=m
+CONFIG_MTD_PLATRAM=m
+CONFIG_MTD_PMC551=m
+# CONFIG_MTD_PMC551_BUGFIX is not set
+# CONFIG_MTD_PMC551_DEBUG is not set
+CONFIG_MTD_QINFO_PROBE=m
+CONFIG_MTD_RAM=m
+CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
+CONFIG_MTD_REDBOOT_PARTS=m
+# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
+CONFIG_MTD_ROM=m
+CONFIG_MTD_SLRAM=m
+CONFIG_MTD_SST25L=m
+CONFIG_MTD_SUN_UFLASH=m
+CONFIG_MTD_TESTS=m
+CONFIG_MTD_UBI=m
+CONFIG_MTD_UBI_BEB_RESERVE=1
+# CONFIG_MTD_UBI_DEBUG is not set
+CONFIG_MTD_UBI_GLUEBI=m
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+# CONFIG_MULTICORE_RAID456 is not set
+CONFIG_MV643XX_ETH=m
+CONFIG_MWL8K=m
+CONFIG_MYRI10GE=m
+CONFIG_MYRI_SBUS=m
+CONFIG_NAMESPACES=y
+CONFIG_NATIONAL_PHY=m
+CONFIG_NATSEMI=m
+CONFIG_NCPFS_EXTRAS=y
+CONFIG_NCPFS_IOCTL_LOCKING=y
+CONFIG_NCPFS_NFS_NS=y
+CONFIG_NCPFS_NLS=y
+CONFIG_NCPFS_OS2_NS=y
+CONFIG_NCPFS_PACKET_SIGNING=y
+CONFIG_NCPFS_STRONG=y
+CONFIG_NCP_FS=m
+# CONFIG_NDISWRAPPER is not set
+CONFIG_NE2K_PCI=m
+CONFIG_NEED_MULTIPLE_NODES=y
+CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y
+CONFIG_NET=y
+CONFIG_NETCONSOLE=m
+CONFIG_NETCONSOLE_DYNAMIC=y
+CONFIG_NETDEVICES=y
+CONFIG_NETDEV_1000=y
+CONFIG_NETDEV_10000=y
+CONFIG_NETFILTER=y
+CONFIG_NETFILTER_ADVANCED=y
+# CONFIG_NETFILTER_DEBUG is not set
+CONFIG_NETFILTER_NETLINK=m
+CONFIG_NETFILTER_NETLINK_LOG=m
+CONFIG_NETFILTER_NETLINK_QUEUE=m
+CONFIG_NETFILTER_TPROXY=m
+CONFIG_NETFILTER_XTABLES=m
+CONFIG_NETFILTER_XT_MATCH_CLUSTER=m
+CONFIG_NETFILTER_XT_MATCH_COMMENT=m
+CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
+CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
+CONFIG_NETFILTER_XT_MATCH_DCCP=m
+CONFIG_NETFILTER_XT_MATCH_DSCP=m
+CONFIG_NETFILTER_XT_MATCH_ESP=m
+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
+CONFIG_NETFILTER_XT_MATCH_HELPER=m
+CONFIG_NETFILTER_XT_MATCH_HL=m
+# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set
+CONFIG_NETFILTER_XT_MATCH_LENGTH=m
+CONFIG_NETFILTER_XT_MATCH_LIMIT=m
+CONFIG_NETFILTER_XT_MATCH_MAC=m
+CONFIG_NETFILTER_XT_MATCH_MARK=m
+CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
+CONFIG_NETFILTER_XT_MATCH_OSF=m
+# CONFIG_NETFILTER_XT_MATCH_OWNER is not set
+CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
+CONFIG_NETFILTER_XT_MATCH_POLICY=m
+CONFIG_NETFILTER_XT_MATCH_QUOTA=m
+# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set
+CONFIG_NETFILTER_XT_MATCH_REALM=m
+CONFIG_NETFILTER_XT_MATCH_RECENT=m
+# CONFIG_NETFILTER_XT_MATCH_RECENT_PROC_COMPAT is not set
+CONFIG_NETFILTER_XT_MATCH_SCTP=m
+CONFIG_NETFILTER_XT_MATCH_SOCKET=m
+CONFIG_NETFILTER_XT_MATCH_STATE=m
+CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
+CONFIG_NETFILTER_XT_MATCH_STRING=m
+CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
+CONFIG_NETFILTER_XT_MATCH_TIME=m
+CONFIG_NETFILTER_XT_MATCH_U32=m
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
+CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
+CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m
+CONFIG_NETFILTER_XT_TARGET_DSCP=m
+CONFIG_NETFILTER_XT_TARGET_HL=m
+CONFIG_NETFILTER_XT_TARGET_LED=m
+CONFIG_NETFILTER_XT_TARGET_MARK=m
+CONFIG_NETFILTER_XT_TARGET_NFLOG=m
+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
+CONFIG_NETFILTER_XT_TARGET_NOTRACK=m
+# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set
+CONFIG_NETFILTER_XT_TARGET_SECMARK=m
+CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
+# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
+CONFIG_NETFILTER_XT_TARGET_TPROXY=m
+CONFIG_NETFILTER_XT_TARGET_TRACE=m
+CONFIG_NETLABEL=y
+CONFIG_NETPOLL=y
+# CONFIG_NETPOLL_TRAP is not set
+CONFIG_NETROM=m
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NETWORK_SECMARK=y
+CONFIG_NETXEN_NIC=m
+CONFIG_NET_9P=m
+# CONFIG_NET_9P_DEBUG is not set
+CONFIG_NET_9P_RDMA=m
+CONFIG_NET_9P_VIRTIO=m
+CONFIG_NET_ACT_GACT=m
+CONFIG_NET_ACT_IPT=m
+CONFIG_NET_ACT_MIRRED=m
+CONFIG_NET_ACT_NAT=m
+CONFIG_NET_ACT_PEDIT=m
+CONFIG_NET_ACT_POLICE=m
+CONFIG_NET_ACT_SIMP=m
+CONFIG_NET_ACT_SKBEDIT=m
+CONFIG_NET_CLS=y
+CONFIG_NET_CLS_ACT=y
+CONFIG_NET_CLS_BASIC=m
+CONFIG_NET_CLS_CGROUP=y
+CONFIG_NET_CLS_FLOW=m
+CONFIG_NET_CLS_FW=m
+# CONFIG_NET_CLS_IND is not set
+CONFIG_NET_CLS_ROUTE=y
+CONFIG_NET_CLS_ROUTE4=m
+CONFIG_NET_CLS_RSVP=m
+CONFIG_NET_CLS_RSVP6=m
+CONFIG_NET_CLS_TCINDEX=m
+CONFIG_NET_CLS_U32=m
+CONFIG_NET_DCCPPROBE=m
+# CONFIG_NET_DROP_MONITOR is not set
+CONFIG_NET_DSA=y
+CONFIG_NET_DSA_MV88E6060=y
+CONFIG_NET_DSA_MV88E6123_61_65=y
+CONFIG_NET_DSA_MV88E6131=y
+CONFIG_NET_DSA_MV88E6XXX=y
+CONFIG_NET_DSA_MV88E6XXX_NEED_PPU=y
+CONFIG_NET_DSA_TAG_DSA=y
+CONFIG_NET_DSA_TAG_EDSA=y
+CONFIG_NET_DSA_TAG_TRAILER=y
+CONFIG_NET_EMATCH=y
+CONFIG_NET_EMATCH_CMP=m
+CONFIG_NET_EMATCH_META=m
+CONFIG_NET_EMATCH_NBYTE=m
+CONFIG_NET_EMATCH_STACK=32
+CONFIG_NET_EMATCH_TEXT=m
+CONFIG_NET_EMATCH_U32=m
+CONFIG_NET_ETHERNET=y
+CONFIG_NET_FC=y
+CONFIG_NET_IPGRE_BROADCAST=y
+CONFIG_NET_IPIP=m
+CONFIG_NET_KEY=m
+# CONFIG_NET_KEY_MIGRATE is not set
+# CONFIG_NET_NS is not set
+CONFIG_NET_PCI=y
+CONFIG_NET_PCMCIA=y
+CONFIG_NET_POCKET=y
+CONFIG_NET_POLL_CONTROLLER=y
+# CONFIG_NET_SB1000 is not set
+CONFIG_NET_SCHED=y
+CONFIG_NET_SCH_ATM=m
+CONFIG_NET_SCH_CBQ=m
+CONFIG_NET_SCH_DRR=m
+CONFIG_NET_SCH_DSMARK=m
+CONFIG_NET_SCH_FIFO=y
+CONFIG_NET_SCH_GRED=m
+CONFIG_NET_SCH_HFSC=m
+CONFIG_NET_SCH_HTB=m
+CONFIG_NET_SCH_INGRESS=m
+CONFIG_NET_SCH_MULTIQ=m
+CONFIG_NET_SCH_NETEM=m
+CONFIG_NET_SCH_PRIO=m
+CONFIG_NET_SCH_RED=m
+CONFIG_NET_SCH_SFQ=m
+CONFIG_NET_SCH_TBF=m
+CONFIG_NET_SCH_TEQL=m
+CONFIG_NET_TCPPROBE=m
+CONFIG_NET_TULIP=y
+CONFIG_NET_VENDOR_3COM=y
+CONFIG_NEW_LEDS=y
+CONFIG_NFSD=m
+CONFIG_NFSD_V2_ACL=y
+CONFIG_NFSD_V3=y
+CONFIG_NFSD_V3_ACL=y
+CONFIG_NFSD_V4=y
+CONFIG_NFS_ACL_SUPPORT=m
+CONFIG_NFS_COMMON=y
+CONFIG_NFS_FS=m
+# CONFIG_NFS_FSCACHE is not set
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+# CONFIG_NFS_V4_1 is not set
+CONFIG_NFTL=m
+CONFIG_NFTL_RW=y
+CONFIG_NF_CONNTRACK=m
+CONFIG_NF_CONNTRACK_AMANDA=m
+CONFIG_NF_CONNTRACK_EVENTS=y
+CONFIG_NF_CONNTRACK_FTP=m
+CONFIG_NF_CONNTRACK_H323=m
+CONFIG_NF_CONNTRACK_IPV4=m
+CONFIG_NF_CONNTRACK_IPV6=m
+CONFIG_NF_CONNTRACK_IRC=m
+CONFIG_NF_CONNTRACK_MARK=y
+CONFIG_NF_CONNTRACK_NETBIOS_NS=m
+CONFIG_NF_CONNTRACK_PPTP=m
+CONFIG_NF_CONNTRACK_PROC_COMPAT=y
+CONFIG_NF_CONNTRACK_SANE=m
+CONFIG_NF_CONNTRACK_SECMARK=y
+CONFIG_NF_CONNTRACK_SIP=m
+CONFIG_NF_CONNTRACK_TFTP=m
+CONFIG_NF_CT_ACCT=y
+CONFIG_NF_CT_NETLINK=m
+CONFIG_NF_CT_PROTO_DCCP=m
+CONFIG_NF_CT_PROTO_GRE=m
+CONFIG_NF_CT_PROTO_SCTP=m
+CONFIG_NF_CT_PROTO_UDPLITE=m
+CONFIG_NF_DEFRAG_IPV4=m
+CONFIG_NF_NAT=m
+CONFIG_NF_NAT_AMANDA=m
+CONFIG_NF_NAT_FTP=m
+CONFIG_NF_NAT_H323=m
+CONFIG_NF_NAT_IRC=m
+CONFIG_NF_NAT_NEEDED=y
+CONFIG_NF_NAT_PPTP=m
+CONFIG_NF_NAT_PROTO_DCCP=m
+CONFIG_NF_NAT_PROTO_GRE=m
+CONFIG_NF_NAT_PROTO_SCTP=m
+CONFIG_NF_NAT_PROTO_UDPLITE=m
+CONFIG_NF_NAT_SIP=m
+CONFIG_NF_NAT_SNMP_BASIC=m
+CONFIG_NF_NAT_TFTP=m
+CONFIG_NILFS2_FS=m
+CONFIG_NL80211_TESTMODE=y
+CONFIG_NLATTR=y
+CONFIG_NLS=y
+CONFIG_NLS_ASCII=m
+CONFIG_NLS_CODEPAGE_1250=m
+CONFIG_NLS_CODEPAGE_1251=m
+CONFIG_NLS_CODEPAGE_437=m
+CONFIG_NLS_CODEPAGE_737=m
+CONFIG_NLS_CODEPAGE_775=m
+CONFIG_NLS_CODEPAGE_850=m
+CONFIG_NLS_CODEPAGE_852=m
+CONFIG_NLS_CODEPAGE_855=m
+CONFIG_NLS_CODEPAGE_857=m
+CONFIG_NLS_CODEPAGE_860=m
+CONFIG_NLS_CODEPAGE_861=m
+CONFIG_NLS_CODEPAGE_862=m
+CONFIG_NLS_CODEPAGE_863=m
+CONFIG_NLS_CODEPAGE_864=m
+CONFIG_NLS_CODEPAGE_865=m
+CONFIG_NLS_CODEPAGE_866=m
+CONFIG_NLS_CODEPAGE_869=m
+CONFIG_NLS_CODEPAGE_874=m
+CONFIG_NLS_CODEPAGE_932=m
+CONFIG_NLS_CODEPAGE_936=m
+CONFIG_NLS_CODEPAGE_949=m
+CONFIG_NLS_CODEPAGE_950=m
+CONFIG_NLS_ISO8859_1=m
+CONFIG_NLS_ISO8859_13=m
+CONFIG_NLS_ISO8859_14=m
+CONFIG_NLS_ISO8859_15=m
+CONFIG_NLS_ISO8859_2=m
+CONFIG_NLS_ISO8859_3=m
+CONFIG_NLS_ISO8859_4=m
+CONFIG_NLS_ISO8859_5=m
+CONFIG_NLS_ISO8859_6=m
+CONFIG_NLS_ISO8859_7=m
+CONFIG_NLS_ISO8859_8=m
+CONFIG_NLS_ISO8859_9=m
+CONFIG_NLS_KOI8_R=m
+CONFIG_NLS_KOI8_U=m
+CONFIG_NLS_UTF8=m
+CONFIG_NODES_SPAN_OTHER_NODES=y
+CONFIG_NOP_TRACER=y
+CONFIG_NOP_USB_XCEIV=m
+# CONFIG_NORTEL_HERMES is not set
+# CONFIG_NOZOMI is not set
+CONFIG_NO_HZ=y
+CONFIG_NR_QUICK=1
+CONFIG_NS83820=m
+CONFIG_NSC_FIR=m
+# CONFIG_NTFS_DEBUG is not set
+CONFIG_NTFS_FS=m
+# CONFIG_NTFS_RW is not set
+CONFIG_NUMA=y
+CONFIG_NVRAM=y
+CONFIG_N_HDLC=m
+CONFIG_OBP_FLASH=m
+# CONFIG_OCFS2_DEBUG_FS is not set
+CONFIG_OCFS2_DEBUG_MASKLOG=y
+CONFIG_OCFS2_FS=m
+CONFIG_OCFS2_FS_O2CB=m
+CONFIG_OCFS2_FS_POSIX_ACL=y
+CONFIG_OCFS2_FS_STATS=y
+CONFIG_OCFS2_FS_USERSPACE_CLUSTER=m
+CONFIG_OF=y
+CONFIG_OF_DEVICE=y
+CONFIG_OF_GPIO=y
+CONFIG_OF_I2C=y
+CONFIG_OF_MDIO=y
+CONFIG_OF_SPI=y
+CONFIG_OLD_BELKIN_DONGLE=m
+CONFIG_OMFS_FS=m
+CONFIG_OPROFILE=m
+# CONFIG_OTUS is not set
+CONFIG_P54_COMMON=m
+CONFIG_P54_LEDS=y
+CONFIG_P54_PCI=m
+CONFIG_P54_SPI=m
+CONFIG_P54_USB=m
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+# CONFIG_PAGE_POISONING is not set
+# CONFIG_PANEL is not set
+CONFIG_PANTHERLORD_FF=y
+CONFIG_PARAVIRT=y
+CONFIG_PARAVIRT_GUEST=y
+CONFIG_PARIDE=m
+CONFIG_PARIDE_ATEN=m
+CONFIG_PARIDE_BPCK=m
+CONFIG_PARIDE_BPCK6=m
+CONFIG_PARIDE_COMM=m
+CONFIG_PARIDE_DSTR=m
+CONFIG_PARIDE_EPAT=m
+# CONFIG_PARIDE_EPATC8 is not set
+CONFIG_PARIDE_EPIA=m
+CONFIG_PARIDE_FIT2=m
+CONFIG_PARIDE_FIT3=m
+CONFIG_PARIDE_FRIQ=m
+CONFIG_PARIDE_FRPW=m
+CONFIG_PARIDE_KBIC=m
+CONFIG_PARIDE_KTTI=m
+CONFIG_PARIDE_ON20=m
+CONFIG_PARIDE_ON26=m
+CONFIG_PARIDE_PCD=m
+CONFIG_PARIDE_PD=m
+CONFIG_PARIDE_PF=m
+CONFIG_PARIDE_PG=m
+CONFIG_PARIDE_PT=m
+CONFIG_PARPORT=m
+CONFIG_PARPORT_1284=y
+CONFIG_PARPORT_AX88796=m
+# CONFIG_PARPORT_GSC is not set
+CONFIG_PARPORT_NOT_PC=y
+CONFIG_PARPORT_PC=m
+CONFIG_PARPORT_PC_FIFO=y
+CONFIG_PARPORT_PC_PCMCIA=m
+# CONFIG_PARPORT_PC_SUPERIO is not set
+CONFIG_PARPORT_SERIAL=m
+CONFIG_PARPORT_SUNBPP=m
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_PASEMI_MAC is not set
+CONFIG_PATA_ACPI=m
+# CONFIG_PATA_ALI is not set
+CONFIG_PATA_AMD=m
+# CONFIG_PATA_ARTOP is not set
+# CONFIG_PATA_ATIIXP is not set
+CONFIG_PATA_ATP867X=m
+# CONFIG_PATA_CMD640_PCI is not set
+# CONFIG_PATA_CMD64X is not set
+CONFIG_PATA_CS5520=m
+# CONFIG_PATA_CS5530 is not set
+# CONFIG_PATA_CYPRESS is not set
+CONFIG_PATA_EFAR=m
+# CONFIG_PATA_HPT366 is not set
+# CONFIG_PATA_HPT37X is not set
+# CONFIG_PATA_HPT3X2N is not set
+# CONFIG_PATA_HPT3X3 is not set
+CONFIG_PATA_IT8213=m
+CONFIG_PATA_IT821X=m
+CONFIG_PATA_JMICRON=m
+CONFIG_PATA_MARVELL=m
+CONFIG_PATA_MPIIX=m
+CONFIG_PATA_NETCELL=m
+CONFIG_PATA_NINJA32=m
+# CONFIG_PATA_NS87410 is not set
+# CONFIG_PATA_NS87415 is not set
+CONFIG_PATA_OF_PLATFORM=m
+CONFIG_PATA_OLDPIIX=m
+# CONFIG_PATA_OPTI is not set
+# CONFIG_PATA_OPTIDMA is not set
+CONFIG_PATA_PCMCIA=m
+CONFIG_PATA_PDC2027X=m
+# CONFIG_PATA_PDC_OLD is not set
+CONFIG_PATA_PLATFORM=m
+# CONFIG_PATA_RADISYS is not set
+CONFIG_PATA_RDC=m
+CONFIG_PATA_RZ1000=m
+# CONFIG_PATA_SC1200 is not set
+CONFIG_PATA_SCH=m
+CONFIG_PATA_SERVERWORKS=m
+CONFIG_PATA_SIL680=m
+CONFIG_PATA_SIS=m
+CONFIG_PATA_TRIFLEX=m
+CONFIG_PATA_VIA=m
+CONFIG_PATA_WINBOND=m
+# CONFIG_PC300TOO is not set
+CONFIG_PCCARD=m
+CONFIG_PCCARD_NONSTATIC=m
+CONFIG_PCF50633_ADC=m
+CONFIG_PCF50633_GPIO=m
+CONFIG_PCI=y
+CONFIG_PCI200SYN=m
+CONFIG_PCIEAER=y
+# CONFIG_PCIEAER_INJECT is not set
+# CONFIG_PCIEASPM_DEBUG is not set
+CONFIG_PCIEPORTBUS=y
+# CONFIG_PCIE_ECRC is not set
+CONFIG_PCIPCWATCHDOG=m
+CONFIG_PCI_ATMEL=m
+# CONFIG_PCI_DEBUG is not set
+CONFIG_PCI_DOMAINS=y
+# CONFIG_PCI_HERMES is not set
+# CONFIG_PCI_IOV is not set
+CONFIG_PCI_LEGACY=y
+CONFIG_PCI_QUIRKS=y
+# CONFIG_PCI_STUB is not set
+CONFIG_PCI_SYSCALL=y
+CONFIG_PCMCIA=m
+CONFIG_PCMCIA_3C574=m
+CONFIG_PCMCIA_3C589=m
+CONFIG_PCMCIA_AHA152X=m
+CONFIG_PCMCIA_ATMEL=m
+CONFIG_PCMCIA_AXNET=m
+# CONFIG_PCMCIA_DEBUG is not set
+CONFIG_PCMCIA_FDOMAIN=m
+CONFIG_PCMCIA_FMVJ18X=m
+CONFIG_PCMCIA_HERMES=m
+CONFIG_PCMCIA_IBMTR=m
+CONFIG_PCMCIA_IOCTL=y
+CONFIG_PCMCIA_LOAD_CIS=y
+CONFIG_PCMCIA_NETWAVE=m
+CONFIG_PCMCIA_NINJA_SCSI=m
+CONFIG_PCMCIA_NMCLAN=m
+CONFIG_PCMCIA_PCNET=m
+CONFIG_PCMCIA_QLOGIC=m
+CONFIG_PCMCIA_RAYCS=m
+CONFIG_PCMCIA_SMC91C92=m
+CONFIG_PCMCIA_SPECTRUM=m
+CONFIG_PCMCIA_SYM53C500=m
+CONFIG_PCMCIA_WAVELAN=m
+CONFIG_PCMCIA_WL3501=m
+CONFIG_PCMCIA_XIRC2PS=m
+CONFIG_PCMCIA_XIRCOM=m
+CONFIG_PCNET32=m
+CONFIG_PCSPKR_PLATFORM=y
+CONFIG_PD6729=m
+CONFIG_PDA_POWER=m
+CONFIG_PDC_ADMA=m
+# CONFIG_PERFMON is not set
+CONFIG_PERF_COUNTERS=y
+CONFIG_PERF_EVENTS=y
+CONFIG_PERF_USE_VMALLOC=y
+# CONFIG_PERMIT_BSP_REMOVE is not set
+CONFIG_PGTABLE_3=y
+# CONFIG_PGTABLE_4 is not set
+CONFIG_PHANTOM=m
+CONFIG_PHONE=m
+CONFIG_PHONET=m
+CONFIG_PHONE_IXJ=m
+CONFIG_PHONE_IXJ_PCMCIA=m
+CONFIG_PHYLIB=y
+# CONFIG_PHYP_DUMP is not set
+CONFIG_PHYSICAL_START=0x00000000
+# CONFIG_PID_NS is not set
+# CONFIG_PLAN9AUTH is not set
+CONFIG_PLIP=m
+# CONFIG_PLX_HERMES is not set
+CONFIG_PM=y
+CONFIG_PMAC_APM_EMU=m
+CONFIG_PMAC_BACKLIGHT=y
+CONFIG_PMAC_BACKLIGHT_LEGACY=y
+CONFIG_PMAC_MEDIABAY=y
+CONFIG_PMAC_RACKMETER=m
+CONFIG_PMIC_DA903X=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_DISABLE_CONSOLE=y
+CONFIG_PM_RUNTIME=y
+CONFIG_PM_SLEEP=y
+CONFIG_PM_SLEEP_SMP=y
+CONFIG_PM_STD_PARTITION=""
+CONFIG_PNP=y
+CONFIG_PNPACPI=y
+# CONFIG_PNP_DEBUG_MESSAGES is not set
+# CONFIG_POCH is not set
+# CONFIG_POHMELFS is not set
+CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
+CONFIG_POWER3=y
+CONFIG_POWER4=y
+# CONFIG_POWER4_ONLY is not set
+CONFIG_POWER_SUPPLY=y
+# CONFIG_POWER_SUPPLY_DEBUG is not set
+CONFIG_PPC=y
+CONFIG_PPC32=y
+# CONFIG_PPC601_SYNC_FIX is not set
+# CONFIG_PPC_16K_PAGES is not set
+# CONFIG_PPC_256K_PAGES is not set
+CONFIG_PPC_4K_PAGES=y
+# CONFIG_PPC_64K_PAGES is not set
+# CONFIG_PPC_82xx is not set
+# CONFIG_PPC_83xx is not set
+# CONFIG_PPC_85xx is not set
+# CONFIG_PPC_86xx is not set
+# CONFIG_PPC_8xx is not set
+# CONFIG_PPC_BOOK3E_64 is not set
+CONFIG_PPC_BOOK3S=y
+CONFIG_PPC_BOOK3S_32=y
+CONFIG_PPC_BOOK3S_64=y
+# CONFIG_PPC_CELLEB is not set
+# CONFIG_PPC_CELL_NATIVE is not set
+# CONFIG_PPC_CELL_QPACE is not set
+CONFIG_PPC_CHRP=y
+# CONFIG_PPC_CLOCK is not set
+# CONFIG_PPC_DCR_MMIO is not set
+# CONFIG_PPC_DCR_NATIVE is not set
+CONFIG_PPC_DISABLE_WERROR=y
+# CONFIG_PPC_EARLY_DEBUG is not set
+# CONFIG_PPC_EMULATED_STATS is not set
+CONFIG_PPC_FPU=y
+CONFIG_PPC_HAVE_PMU_SUPPORT=y
+CONFIG_PPC_I8259=y
+# CONFIG_PPC_IBM_CELL_BLADE is not set
+# CONFIG_PPC_INDIRECT_IO is not set
+# CONFIG_PPC_ISERIES is not set
+# CONFIG_PPC_MPC52xx is not set
+CONFIG_PPC_MSI_BITMAP=y
+CONFIG_PPC_NATIVE=y
+CONFIG_PPC_OF=y
+CONFIG_PPC_OF_BOOT_TRAMPOLINE=y
+# CONFIG_PPC_OF_PLATFORM_PCI is not set
+CONFIG_PPC_PASEMI_CPUFREQ=y
+CONFIG_PPC_PASEMI_IOMMU=y
+# CONFIG_PPC_PASEMI_IOMMU_DMA_FORCE is not set
+CONFIG_PPC_PASEMI_MDIO=y
+CONFIG_PPC_PCI_CHOICE=y
+CONFIG_PPC_PERF_CTRS=y
+CONFIG_PPC_PMAC=y
+CONFIG_PPC_PMAC64=y
+CONFIG_PPC_PSERIES=y
+CONFIG_PPC_RTAS=y
+# CONFIG_PPC_SMLPAR is not set
+# CONFIG_PPC_SPLPAR is not set
+CONFIG_PPC_STD_MMU=y
+CONFIG_PPC_STD_MMU_32=y
+CONFIG_PPC_STD_MMU_64=y
+CONFIG_PPC_UDBG_16550=y
+CONFIG_PPDEV=m
+CONFIG_PPP=m
+CONFIG_PPPOATM=m
+CONFIG_PPPOE=m
+CONFIG_PPPOL2TP=m
+CONFIG_PPP_ASYNC=m
+CONFIG_PPP_BSDCOMP=m
+CONFIG_PPP_DEFLATE=m
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_MPPE=m
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPP_SYNC_TTY=m
+CONFIG_PPS=m
+# CONFIG_PPS_DEBUG is not set
+# CONFIG_PQ2ADS is not set
+# CONFIG_PREEMPT is not set
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_PRINTER=m
+CONFIG_PRINTK=y
+CONFIG_PRINTK_TIME=y
+# CONFIG_PRINT_QUOTA_WARNING is not set
+CONFIG_PRINT_STACK_DEPTH=64
+# CONFIG_PRISM2_USB is not set
+CONFIG_PROC_DEVICETREE=y
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_PROC_PID_CPUSET=y
+CONFIG_PROC_SYSCTL=y
+# CONFIG_PROFILE_ALL_BRANCHES is not set
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_PS3_ADVANCED is not set
+CONFIG_PS3_DISK=m
+# CONFIG_PS3_DYNAMIC_DMA is not set
+CONFIG_PS3_FLASH=m
+CONFIG_PS3_HTAB_SIZE=20
+CONFIG_PS3_LPM=m
+CONFIG_PS3_PS3AV=y
+CONFIG_PS3_ROM=m
+CONFIG_PS3_STORAGE=m
+CONFIG_PS3_SYS_MANAGER=y
+CONFIG_PS3_VUART=y
+CONFIG_PSERIES_MSI=y
+CONFIG_PSS_MIXER=y
+CONFIG_QFMT_V2=m
+CONFIG_QLA3XXX=m
+CONFIG_QLGE=m
+CONFIG_QNX4FS_FS=m
+CONFIG_QSEMI_PHY=m
+CONFIG_QT2160=m
+CONFIG_QUICKLIST=y
+CONFIG_QUOTA=y
+CONFIG_QUOTACTL=y
+CONFIG_QUOTA_NETLINK_INTERFACE=y
+CONFIG_QUOTA_TREE=m
+CONFIG_R3964=m
+# CONFIG_R6040 is not set
+CONFIG_R8169_VLAN=y
+CONFIG_RADIO_ADAPTERS=y
+CONFIG_RADIO_GEMTEK_PCI=m
+CONFIG_RADIO_MAESTRO=m
+CONFIG_RADIO_MAXIRADIO=m
+CONFIG_RADIO_SI470X=y
+CONFIG_RADIO_SI4713=m
+CONFIG_RADIO_TEA5764=m
+CONFIG_RAID_ATTRS=m
+# CONFIG_RAR_REGISTER is not set
+CONFIG_RAW_DRIVER=m
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_TRACE is not set
+# CONFIG_RDS_DEBUG is not set
+CONFIG_RDS_RDMA=m
+CONFIG_RDS_TCP=m
+CONFIG_RD_BZIP2=y
+CONFIG_RD_GZIP=y
+CONFIG_RD_LZMA=y
+# CONFIG_REALTEK_PHY is not set
+CONFIG_REED_SOLOMON=m
+CONFIG_REED_SOLOMON_DEC16=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_AB3100=m
+CONFIG_REGULATOR_BQ24022=m
+CONFIG_REGULATOR_DA903X=m
+# CONFIG_REGULATOR_DEBUG is not set
+# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
+CONFIG_REGULATOR_LP3971=m
+CONFIG_REGULATOR_MAX1586=m
+CONFIG_REGULATOR_MC13783=m
+CONFIG_REGULATOR_PCAP=m
+CONFIG_REGULATOR_PCF50633=m
+CONFIG_REGULATOR_TPS65023=m
+CONFIG_REGULATOR_TPS6507X=m
+CONFIG_REGULATOR_TWL4030=y
+CONFIG_REGULATOR_USERSPACE_CONSUMER=m
+CONFIG_REGULATOR_VIRTUAL_CONSUMER=m
+CONFIG_REGULATOR_WM831X=m
+CONFIG_REGULATOR_WM8350=m
+CONFIG_REGULATOR_WM8400=m
+# CONFIG_REISERFS_CHECK is not set
+CONFIG_REISERFS_FS=m
+CONFIG_REISERFS_FS_POSIX_ACL=y
+CONFIG_REISERFS_FS_SECURITY=y
+CONFIG_REISERFS_FS_XATTR=y
+# CONFIG_REISERFS_PROC_INFO is not set
+CONFIG_RELAY=y
+# CONFIG_RELOCATABLE is not set
+# CONFIG_RESOURCE_COUNTERS is not set
+CONFIG_RFD_FTL=m
+CONFIG_RFKILL=m
+CONFIG_RFKILL_INPUT=y
+CONFIG_RFKILL_LEDS=y
+CONFIG_RING_BUFFER=y
+CONFIG_RING_BUFFER_ALLOW_SWAP=y
+# CONFIG_RING_BUFFER_BENCHMARK is not set
+CONFIG_ROADRUNNER=m
+# CONFIG_ROADRUNNER_LARGE_RINGS is not set
+CONFIG_ROCKETPORT=m
+CONFIG_ROMFS_BACKED_BY_BLOCK=y
+# CONFIG_ROMFS_BACKED_BY_BOTH is not set
+# CONFIG_ROMFS_BACKED_BY_MTD is not set
+CONFIG_ROMFS_FS=m
+CONFIG_ROMFS_ON_BLOCK=y
+CONFIG_ROSE=m
+CONFIG_RPCSEC_GSS_KRB5=m
+CONFIG_RPCSEC_GSS_SPKM3=m
+CONFIG_RT2400PCI=m
+CONFIG_RT2500PCI=m
+CONFIG_RT2500USB=m
+CONFIG_RT2800USB=m
+CONFIG_RT2X00=m
+# CONFIG_RT2X00_DEBUG is not set
+CONFIG_RT2X00_LIB=m
+CONFIG_RT2X00_LIB_CRYPTO=y
+# CONFIG_RT2X00_LIB_DEBUGFS is not set
+CONFIG_RT2X00_LIB_FIRMWARE=y
+CONFIG_RT2X00_LIB_HT=y
+CONFIG_RT2X00_LIB_LEDS=y
+CONFIG_RT2X00_LIB_PCI=m
+CONFIG_RT2X00_LIB_USB=m
+CONFIG_RT61PCI=m
+CONFIG_RT73USB=m
+# CONFIG_RTAS_FLASH is not set
+CONFIG_RTAS_PROC=y
+CONFIG_RTC_CLASS=y
+# CONFIG_RTC_DEBUG is not set
+CONFIG_RTC_DRV_AB3100=m
+CONFIG_RTC_DRV_DS1286=m
+CONFIG_RTC_DRV_DS1305=m
+CONFIG_RTC_DRV_DS1307=m
+CONFIG_RTC_DRV_DS1374=m
+CONFIG_RTC_DRV_DS1390=m
+CONFIG_RTC_DRV_DS1511=m
+CONFIG_RTC_DRV_DS1553=m
+CONFIG_RTC_DRV_DS1672=m
+CONFIG_RTC_DRV_DS1742=m
+CONFIG_RTC_DRV_DS3234=m
+CONFIG_RTC_DRV_EFI=m
+CONFIG_RTC_DRV_FM3130=m
+CONFIG_RTC_DRV_GENERIC=m
+CONFIG_RTC_DRV_ISL1208=m
+CONFIG_RTC_DRV_M41T80=m
+CONFIG_RTC_DRV_M41T80_WDT=y
+CONFIG_RTC_DRV_M41T94=m
+CONFIG_RTC_DRV_M48T35=m
+CONFIG_RTC_DRV_M48T86=m
+CONFIG_RTC_DRV_MAX6900=m
+CONFIG_RTC_DRV_MAX6902=m
+CONFIG_RTC_DRV_PCAP=m
+CONFIG_RTC_DRV_PCF2123=m
+CONFIG_RTC_DRV_PCF50633=m
+CONFIG_RTC_DRV_PCF8563=m
+CONFIG_RTC_DRV_PCF8583=m
+CONFIG_RTC_DRV_R9701=m
+CONFIG_RTC_DRV_RS5C348=m
+CONFIG_RTC_DRV_RS5C372=m
+CONFIG_RTC_DRV_RX8025=m
+CONFIG_RTC_DRV_RX8581=m
+CONFIG_RTC_DRV_S35390A=m
+CONFIG_RTC_DRV_STARFIRE=y
+CONFIG_RTC_DRV_STK17TA8=m
+CONFIG_RTC_DRV_SUN4V=y
+CONFIG_RTC_DRV_TWL4030=m
+CONFIG_RTC_DRV_V3020=m
+CONFIG_RTC_DRV_WM831X=m
+CONFIG_RTC_DRV_WM8350=m
+CONFIG_RTC_DRV_X1205=m
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+CONFIG_RTC_INTF_DEV=y
+CONFIG_RTC_INTF_DEV_UIE_EMUL=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_LIB=y
+# CONFIG_RTL8180 is not set
+CONFIG_RTL8187=m
+# CONFIG_RTL8187SE is not set
+CONFIG_RTL8187_LEDS=y
+# CONFIG_RTL8192E is not set
+# CONFIG_RTL8192SU is not set
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_RT_MUTEXES=y
+# CONFIG_RT_MUTEX_TESTER is not set
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_RXKAD=m
+CONFIG_S2IO=m
+# CONFIG_SAMPLES is not set
+CONFIG_SATA_AHCI=m
+CONFIG_SATA_INIC162X=m
+CONFIG_SATA_MV=m
+CONFIG_SATA_NV=m
+CONFIG_SATA_PMP=y
+CONFIG_SATA_PROMISE=m
+CONFIG_SATA_QSTOR=m
+CONFIG_SATA_SIL=m
+CONFIG_SATA_SIL24=m
+CONFIG_SATA_SIS=m
+CONFIG_SATA_SX4=m
+CONFIG_SATA_ULI=m
+CONFIG_SATA_VIA=m
+CONFIG_SATA_VITESSE=m
+CONFIG_SBUS=y
+CONFIG_SBUSCHAR=y
+CONFIG_SC6600=y
+CONFIG_SC6600_CDROM=4
+CONFIG_SC6600_CDROMBASE=0
+CONFIG_SC6600_JOY=y
+CONFIG_SC92031=m
+# CONFIG_SCANLOG is not set
+CONFIG_SCHED_DEBUG=y
+CONFIG_SCHED_MC=y
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
+CONFIG_SCHED_SMT=y
+# CONFIG_SCHED_TRACER is not set
+CONFIG_SCSI_3W_9XXX=m
+CONFIG_SCSI_AACRAID=m
+CONFIG_SCSI_ACARD=m
+CONFIG_SCSI_ADVANSYS=m
+CONFIG_SCSI_AIC79XX=m
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+CONFIG_SCSI_AIC94XX=m
+CONFIG_SCSI_ARCMSR=m
+CONFIG_SCSI_ARCMSR_AER=y
+CONFIG_SCSI_BFA_FC=m
+CONFIG_SCSI_BNX2_ISCSI=m
+CONFIG_SCSI_BUSLOGIC=m
+CONFIG_SCSI_CXGB3_ISCSI=m
+CONFIG_SCSI_DC395x=m
+CONFIG_SCSI_DH=m
+CONFIG_SCSI_DH_ALUA=m
+CONFIG_SCSI_DH_EMC=m
+CONFIG_SCSI_DH_HP_SW=m
+CONFIG_SCSI_DH_RDAC=m
+CONFIG_SCSI_DMA=y
+CONFIG_SCSI_DMX3191D=m
+CONFIG_SCSI_DPT_I2O=m
+CONFIG_SCSI_EATA=m
+CONFIG_SCSI_EATA_LINKED_COMMANDS=y
+CONFIG_SCSI_EATA_MAX_TAGS=16
+CONFIG_SCSI_EATA_TAGGED_QUEUE=y
+CONFIG_SCSI_FC_ATTRS=m
+CONFIG_SCSI_FC_TGT_ATTRS=y
+CONFIG_SCSI_GDTH=m
+CONFIG_SCSI_HPTIOP=m
+# CONFIG_SCSI_IBMVFC is not set
+# CONFIG_SCSI_IBMVSCSI is not set
+# CONFIG_SCSI_IBMVSCSIS is not set
+CONFIG_SCSI_IMM=m
+CONFIG_SCSI_INIA100=m
+CONFIG_SCSI_INITIO=m
+CONFIG_SCSI_IPR=m
+# CONFIG_SCSI_IPR_DUMP is not set
+# CONFIG_SCSI_IPR_TRACE is not set
+CONFIG_SCSI_ISCSITARGET=m
+CONFIG_SCSI_ISCSI_ATTRS=m
+# CONFIG_SCSI_IZIP_EPP16 is not set
+# CONFIG_SCSI_IZIP_SLOW_CTR is not set
+CONFIG_SCSI_LOWLEVEL=y
+CONFIG_SCSI_LOWLEVEL_PCMCIA=y
+CONFIG_SCSI_LPFC=m
+CONFIG_SCSI_MAC53C94=m
+CONFIG_SCSI_MESH=m
+CONFIG_SCSI_MESH_RESET_DELAY_MS=4000
+CONFIG_SCSI_MESH_SYNC_RATE=5
+CONFIG_SCSI_MPT2SAS=m
+# CONFIG_SCSI_MPT2SAS_LOGGING is not set
+CONFIG_SCSI_MPT2SAS_MAX_SGE=128
+CONFIG_SCSI_MULTI_LUN=y
+# CONFIG_SCSI_MVSAS is not set
+CONFIG_SCSI_NETLINK=y
+CONFIG_SCSI_NSP32=m
+# CONFIG_SCSI_OSD_DEBUG is not set
+CONFIG_SCSI_OSD_DPRINT_SENSE=1
+CONFIG_SCSI_OSD_INITIATOR=m
+CONFIG_SCSI_OSD_ULD=m
+CONFIG_SCSI_PMCRAID=m
+CONFIG_SCSI_PPA=m
+CONFIG_SCSI_PROC_FS=y
+CONFIG_SCSI_QLA_FC=m
+CONFIG_SCSI_QLA_ISCSI=m
+CONFIG_SCSI_QLOGICPTI=m
+CONFIG_SCSI_QLOGIC_1280=m
+CONFIG_SCSI_SAS_ATA=y
+CONFIG_SCSI_SAS_ATTRS=m
+CONFIG_SCSI_SAS_HOST_SMP=y
+CONFIG_SCSI_SAS_LIBSAS=m
+# CONFIG_SCSI_SAS_LIBSAS_DEBUG is not set
+CONFIG_SCSI_SCAN_ASYNC=y
+CONFIG_SCSI_SPI_ATTRS=m
+CONFIG_SCSI_SRP=m
+CONFIG_SCSI_SRP_ATTRS=m
+CONFIG_SCSI_SRP_TGT_ATTRS=y
+CONFIG_SCSI_STEX=m
+CONFIG_SCSI_SUNESP=m
+CONFIG_SCSI_SYM53C8XX_2=m
+CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
+CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1
+CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
+CONFIG_SCSI_SYM53C8XX_MMIO=y
+CONFIG_SCSI_TGT=m
+CONFIG_SCSI_WAIT_SCAN=m
+# CONFIG_SCTP_DBG_MSG is not set
+# CONFIG_SCTP_DBG_OBJCNT is not set
+CONFIG_SCTP_HMAC_MD5=y
+# CONFIG_SCTP_HMAC_NONE is not set
+# CONFIG_SCTP_HMAC_SHA1 is not set
+CONFIG_SDIO_UART=m
+CONFIG_SECCOMP=y
+CONFIG_SECURITY=y
+CONFIG_SECURITYFS=y
+CONFIG_SECURITY_APPARMOR=y
+CONFIG_SECURITY_APPARMOR_BOOTPARAM_VALUE=1
+CONFIG_SECURITY_APPARMOR_COMPAT_24=y
+CONFIG_SECURITY_FILE_CAPABILITIES=y
+CONFIG_SECURITY_NETWORK=y
+# CONFIG_SECURITY_NETWORK_XFRM is not set
+CONFIG_SECURITY_PATH=y
+# CONFIG_SECURITY_ROOTPLUG is not set
+CONFIG_SECURITY_SELINUX=y
+CONFIG_SECURITY_SELINUX_AVC_STATS=y
+CONFIG_SECURITY_SELINUX_BOOTPARAM=y
+CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=0
+CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1
+CONFIG_SECURITY_SELINUX_DEVELOP=y
+CONFIG_SECURITY_SELINUX_DISABLE=y
+# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set
+CONFIG_SECURITY_SMACK=y
+CONFIG_SECURITY_TOMOYO=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_SENSORS_AD7414=m
+CONFIG_SENSORS_AD7418=m
+CONFIG_SENSORS_ADCXX=m
+CONFIG_SENSORS_ADM1026=m
+CONFIG_SENSORS_ADM1029=m
+CONFIG_SENSORS_ADM9240=m
+# CONFIG_SENSORS_ADS7828 is not set
+CONFIG_SENSORS_ADT7462=m
+CONFIG_SENSORS_ADT7470=m
+# CONFIG_SENSORS_ADT7473 is not set
+CONFIG_SENSORS_ADT7475=m
+CONFIG_SENSORS_AMS=m
+CONFIG_SENSORS_AMS_I2C=y
+CONFIG_SENSORS_AMS_PMU=y
+CONFIG_SENSORS_ATXP1=m
+CONFIG_SENSORS_DME1737=m
+CONFIG_SENSORS_F71805F=m
+CONFIG_SENSORS_F71882FG=m
+CONFIG_SENSORS_F75375S=m
+CONFIG_SENSORS_G760A=m
+CONFIG_SENSORS_GL520SM=m
+CONFIG_SENSORS_I5K_AMB=m
+CONFIG_SENSORS_IBMAEM=m
+CONFIG_SENSORS_IBMPEX=m
+CONFIG_SENSORS_LIS3LV02D=m
+CONFIG_SENSORS_LIS3_SPI=m
+CONFIG_SENSORS_LM63=m
+CONFIG_SENSORS_LM70=m
+CONFIG_SENSORS_LM87=m
+CONFIG_SENSORS_LM92=m
+CONFIG_SENSORS_LM93=m
+CONFIG_SENSORS_LM95241=m
+CONFIG_SENSORS_LTC4215=m
+CONFIG_SENSORS_LTC4245=m
+CONFIG_SENSORS_MAX1111=m
+CONFIG_SENSORS_MAX6650=m
+CONFIG_SENSORS_PC87360=m
+CONFIG_SENSORS_PC87427=m
+CONFIG_SENSORS_SHT15=m
+CONFIG_SENSORS_SIS5595=m
+CONFIG_SENSORS_SMSC47B397=m
+CONFIG_SENSORS_SMSC47M1=m
+CONFIG_SENSORS_SMSC47M192=m
+CONFIG_SENSORS_THMC50=m
+CONFIG_SENSORS_TMP401=m
+CONFIG_SENSORS_TMP421=m
+CONFIG_SENSORS_TSL2550=m
+CONFIG_SENSORS_ULTRA45=m
+CONFIG_SENSORS_VT1211=m
+CONFIG_SENSORS_VT8231=m
+CONFIG_SENSORS_W83627EHF=m
+CONFIG_SENSORS_W83791D=m
+CONFIG_SENSORS_W83792D=m
+CONFIG_SENSORS_W83793=m
+# CONFIG_SENSORS_W83L786NG is not set
+CONFIG_SENSORS_WM831X=m
+CONFIG_SENSORS_WM8350=m
+CONFIG_SERIAL_8250=m
+CONFIG_SERIAL_8250_CS=m
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_MANY_PORTS=y
+CONFIG_SERIAL_8250_PCI=m
+CONFIG_SERIAL_8250_PNP=m
+CONFIG_SERIAL_8250_RSA=y
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_ICOM is not set
+CONFIG_SERIAL_JSM=m
+CONFIG_SERIAL_MAX3100=m
+CONFIG_SERIAL_NONSTANDARD=y
+CONFIG_SERIAL_OF_PLATFORM=m
+CONFIG_SERIAL_PMACZILOG=m
+# CONFIG_SERIAL_PMACZILOG_TTYS is not set
+# CONFIG_SERIAL_SGI_IOC3 is not set
+# CONFIG_SERIAL_SGI_IOC4 is not set
+# CONFIG_SERIAL_SGI_L1_CONSOLE is not set
+CONFIG_SERIAL_SUNCORE=y
+CONFIG_SERIAL_SUNHV=y
+CONFIG_SERIAL_SUNSAB=y
+CONFIG_SERIAL_SUNSAB_CONSOLE=y
+CONFIG_SERIAL_SUNSU=y
+CONFIG_SERIAL_SUNSU_CONSOLE=y
+CONFIG_SERIAL_SUNZILOG=y
+CONFIG_SERIAL_SUNZILOG_CONSOLE=y
+CONFIG_SERIAL_UARTLITE=m
+CONFIG_SERIO=y
+CONFIG_SERIO_I8042=y
+CONFIG_SERIO_LIBPS2=y
+CONFIG_SERIO_RAW=m
+CONFIG_SERIO_SERPORT=m
+CONFIG_SERIO_XILINX_XPS_PS2=m
+CONFIG_SFC=m
+CONFIG_SFC_MTD=y
+CONFIG_SGI_IOC3=m
+CONFIG_SGI_IOC4=m
+CONFIG_SGI_SN=y
+# CONFIG_SGI_SNSC is not set
+# CONFIG_SGI_TIOCX is not set
+CONFIG_SGI_XP=m
+CONFIG_SHMEM=y
+CONFIG_SIGMATEL_FIR=m
+CONFIG_SIGNALFD=y
+CONFIG_SIMPLE_GPIO=y
+CONFIG_SIS190=m
+CONFIG_SIS900=m
+CONFIG_SKFP=m
+CONFIG_SKGE=m
+# CONFIG_SKGE_DEBUG is not set
+CONFIG_SKY2=m
+# CONFIG_SKY2_DEBUG is not set
+# CONFIG_SLAB is not set
+CONFIG_SLABINFO=y
+CONFIG_SLHC=m
+CONFIG_SLIP=m
+CONFIG_SLIP_COMPRESSED=y
+CONFIG_SLIP_SMART=y
+# CONFIG_SLOB is not set
+CONFIG_SLOW_WORK=y
+# CONFIG_SLOW_WORK_DEBUG is not set
+CONFIG_SLUB=y
+CONFIG_SLUB_DEBUG=y
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+CONFIG_SMARTJOYPLUS_FF=y
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+CONFIG_SMC_IRCC_FIR=m
+CONFIG_SMSC9420=m
+CONFIG_SMSC_PHY=m
+CONFIG_SMS_SDIO_DRV=m
+CONFIG_SMS_SIANO_MDTV=m
+CONFIG_SMS_USB_DRV=m
+CONFIG_SND=m
+CONFIG_SND_AC97_CODEC=m
+CONFIG_SND_AC97_POWER_SAVE=y
+CONFIG_SND_AC97_POWER_SAVE_DEFAULT=0
+CONFIG_SND_AD1889=m
+CONFIG_SND_ALI5451=m
+CONFIG_SND_ALS300=m
+CONFIG_SND_ALS4000=m
+CONFIG_SND_AOA=m
+CONFIG_SND_AOA_FABRIC_LAYOUT=m
+CONFIG_SND_AOA_ONYX=m
+CONFIG_SND_AOA_SOUNDBUS=m
+CONFIG_SND_AOA_SOUNDBUS_I2S=m
+CONFIG_SND_AOA_TAS=m
+CONFIG_SND_AOA_TOONIE=m
+CONFIG_SND_ATIIXP=m
+CONFIG_SND_ATIIXP_MODEM=m
+CONFIG_SND_AU8810=m
+CONFIG_SND_AU8820=m
+CONFIG_SND_AU8830=m
+CONFIG_SND_AW2=m
+CONFIG_SND_AZT3328=m
+CONFIG_SND_BT87X=m
+CONFIG_SND_BT87X_OVERCLOCK=y
+CONFIG_SND_CA0106=m
+CONFIG_SND_CMIPCI=m
+CONFIG_SND_CS4281=m
+CONFIG_SND_CS46XX=m
+CONFIG_SND_CS46XX_NEW_DSP=y
+CONFIG_SND_CS5530=m
+CONFIG_SND_CS5535AUDIO=m
+CONFIG_SND_CTXFI=m
+CONFIG_SND_DARLA20=m
+CONFIG_SND_DARLA24=m
+# CONFIG_SND_DEBUG is not set
+CONFIG_SND_DRIVERS=y
+CONFIG_SND_DUMMY=m
+CONFIG_SND_DYNAMIC_MINORS=y
+CONFIG_SND_ECHO3G=m
+CONFIG_SND_EMU10K1=m
+CONFIG_SND_EMU10K1X=m
+CONFIG_SND_EMU10K1_SEQ=m
+CONFIG_SND_ENS1370=m
+CONFIG_SND_ENS1371=m
+CONFIG_SND_ES1938=m
+CONFIG_SND_ES1968=m
+CONFIG_SND_FM801=m
+CONFIG_SND_FM801_TEA575X=m
+CONFIG_SND_FM801_TEA575X_BOOL=y
+CONFIG_SND_GINA20=m
+CONFIG_SND_GINA24=m
+CONFIG_SND_HDA_CODEC_ANALOG=y
+CONFIG_SND_HDA_CODEC_ATIHDMI=y
+CONFIG_SND_HDA_CODEC_CA0110=y
+CONFIG_SND_HDA_CODEC_CIRRUS=y
+CONFIG_SND_HDA_CODEC_CMEDIA=y
+CONFIG_SND_HDA_CODEC_CONEXANT=y
+CONFIG_SND_HDA_CODEC_INTELHDMI=y
+CONFIG_SND_HDA_CODEC_NVHDMI=y
+CONFIG_SND_HDA_CODEC_REALTEK=y
+CONFIG_SND_HDA_CODEC_SI3054=y
+CONFIG_SND_HDA_CODEC_SIGMATEL=y
+CONFIG_SND_HDA_CODEC_VIA=y
+CONFIG_SND_HDA_ELD=y
+CONFIG_SND_HDA_GENERIC=y
+CONFIG_SND_HDA_HWDEP=y
+CONFIG_SND_HDA_INPUT_BEEP=y
+CONFIG_SND_HDA_INPUT_JACK=y
+CONFIG_SND_HDA_INTEL=m
+CONFIG_SND_HDA_PATCH_LOADER=y
+CONFIG_SND_HDA_POWER_SAVE=y
+CONFIG_SND_HDA_POWER_SAVE_DEFAULT=0
+CONFIG_SND_HDA_RECONFIG=y
+CONFIG_SND_HDSP=m
+CONFIG_SND_HDSPM=m
+# CONFIG_SND_HIFIER is not set
+CONFIG_SND_HRTIMER=m
+CONFIG_SND_HWDEP=m
+CONFIG_SND_ICE1712=m
+CONFIG_SND_ICE1724=m
+CONFIG_SND_INDIGO=m
+CONFIG_SND_INDIGODJ=m
+CONFIG_SND_INDIGODJX=m
+CONFIG_SND_INDIGOIO=m
+CONFIG_SND_INDIGOIOX=m
+CONFIG_SND_INTEL8X0=m
+CONFIG_SND_INTEL8X0M=m
+CONFIG_SND_JACK=y
+CONFIG_SND_KORG1212=m
+CONFIG_SND_LAYLA20=m
+CONFIG_SND_LAYLA24=m
+CONFIG_SND_LX6464ES=m
+CONFIG_SND_MAESTRO3=m
+CONFIG_SND_MIA=m
+CONFIG_SND_MIXART=m
+CONFIG_SND_MIXER_OSS=m
+CONFIG_SND_MONA=m
+CONFIG_SND_MPU401=m
+CONFIG_SND_MPU401_UART=m
+CONFIG_SND_MTPAV=m
+CONFIG_SND_MTS64=m
+CONFIG_SND_NM256=m
+CONFIG_SND_OPL3_LIB=m
+CONFIG_SND_OPL3_LIB_SEQ=m
+# CONFIG_SND_OPL4_LIB_SEQ is not set
+CONFIG_SND_OSSEMUL=y
+# CONFIG_SND_OXYGEN is not set
+CONFIG_SND_PCI=y
+CONFIG_SND_PCM=m
+CONFIG_SND_PCMCIA=y
+CONFIG_SND_PCM_OSS=m
+CONFIG_SND_PCM_OSS_PLUGINS=y
+CONFIG_SND_PCXHR=m
+CONFIG_SND_PDAUDIOCF=m
+CONFIG_SND_PORTMAN2X4=m
+CONFIG_SND_POWERMAC=m
+CONFIG_SND_POWERMAC_AUTO_DRC=y
+CONFIG_SND_PPC=y
+CONFIG_SND_PS3=m
+CONFIG_SND_PS3_DEFAULT_START_DELAY=2000
+CONFIG_SND_RAWMIDI=m
+CONFIG_SND_RAWMIDI_SEQ=m
+CONFIG_SND_RIPTIDE=m
+CONFIG_SND_RME32=m
+CONFIG_SND_RME96=m
+CONFIG_SND_RME9652=m
+CONFIG_SND_SB16_DSP=m
+# CONFIG_SND_SBAWE_SEQ is not set
+CONFIG_SND_SB_COMMON=m
+CONFIG_SND_SEQUENCER=m
+CONFIG_SND_SEQUENCER_OSS=y
+CONFIG_SND_SEQ_DUMMY=m
+CONFIG_SND_SEQ_HRTIMER_DEFAULT=y
+CONFIG_SND_SERIAL_U16550=m
+CONFIG_SND_SOC=m
+CONFIG_SND_SOC_AD1836=m
+CONFIG_SND_SOC_AD1938=m
+CONFIG_SND_SOC_AD73311=m
+CONFIG_SND_SOC_AK4104=m
+CONFIG_SND_SOC_AK4535=m
+CONFIG_SND_SOC_AK4642=m
+CONFIG_SND_SOC_ALL_CODECS=m
+CONFIG_SND_SOC_CS4270=m
+CONFIG_SND_SOC_I2C_AND_SPI=m
+CONFIG_SND_SOC_L3=m
+CONFIG_SND_SOC_MAX9877=m
+CONFIG_SND_SOC_PCM3008=m
+CONFIG_SND_SOC_SPDIF=m
+CONFIG_SND_SOC_SSM2602=m
+CONFIG_SND_SOC_TLV320AIC23=m
+CONFIG_SND_SOC_TLV320AIC26=m
+CONFIG_SND_SOC_TLV320AIC3X=m
+CONFIG_SND_SOC_TWL4030=m
+CONFIG_SND_SOC_UDA134X=m
+CONFIG_SND_SOC_UDA1380=m
+CONFIG_SND_SOC_WM8350=m
+CONFIG_SND_SOC_WM8400=m
+CONFIG_SND_SOC_WM8510=m
+CONFIG_SND_SOC_WM8523=m
+CONFIG_SND_SOC_WM8580=m
+CONFIG_SND_SOC_WM8728=m
+CONFIG_SND_SOC_WM8731=m
+CONFIG_SND_SOC_WM8750=m
+CONFIG_SND_SOC_WM8753=m
+CONFIG_SND_SOC_WM8776=m
+CONFIG_SND_SOC_WM8900=m
+CONFIG_SND_SOC_WM8903=m
+CONFIG_SND_SOC_WM8940=m
+CONFIG_SND_SOC_WM8960=m
+CONFIG_SND_SOC_WM8961=m
+CONFIG_SND_SOC_WM8971=m
+CONFIG_SND_SOC_WM8974=m
+CONFIG_SND_SOC_WM8988=m
+CONFIG_SND_SOC_WM8990=m
+CONFIG_SND_SOC_WM8993=m
+CONFIG_SND_SOC_WM9081=m
+CONFIG_SND_SOC_WM_HUBS=m
+CONFIG_SND_SONICVIBES=m
+CONFIG_SND_SPARC=y
+CONFIG_SND_SPI=y
+CONFIG_SND_SUN_AMD7930=m
+CONFIG_SND_SUN_CS4231=m
+CONFIG_SND_SUN_DBRI=m
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_TIMER=m
+CONFIG_SND_TRIDENT=m
+CONFIG_SND_USB=y
+CONFIG_SND_USB_AUDIO=m
+CONFIG_SND_USB_CAIAQ=m
+CONFIG_SND_USB_CAIAQ_INPUT=y
+CONFIG_SND_USB_USX2Y=m
+# CONFIG_SND_VERBOSE_PRINTK is not set
+CONFIG_SND_VERBOSE_PROCFS=y
+CONFIG_SND_VIA82XX=m
+CONFIG_SND_VIA82XX_MODEM=m
+CONFIG_SND_VIRMIDI=m
+# CONFIG_SND_VIRTUOSO is not set
+CONFIG_SND_VMASTER=y
+CONFIG_SND_VX222=m
+CONFIG_SND_VXPOCKET=m
+CONFIG_SND_VX_LIB=m
+CONFIG_SND_YMFPCI=m
+CONFIG_SOC_CAMERA=m
+CONFIG_SOC_CAMERA_MT9M001=m
+CONFIG_SOC_CAMERA_MT9M111=m
+CONFIG_SOC_CAMERA_MT9T031=m
+CONFIG_SOC_CAMERA_MT9V022=m
+CONFIG_SOC_CAMERA_OV772X=m
+CONFIG_SOC_CAMERA_PLATFORM=m
+CONFIG_SOC_CAMERA_TW9910=m
+CONFIG_SOFT_WATCHDOG=m
+CONFIG_SOUND=m
+CONFIG_SOUND_AEDSP16=m
+CONFIG_SOUND_DMAP=y
+CONFIG_SOUND_KAHLUA=m
+CONFIG_SOUND_MPU401=m
+CONFIG_SOUND_MSS=m
+CONFIG_SOUND_OSS=m
+CONFIG_SOUND_OSS_CORE=y
+CONFIG_SOUND_OSS_CORE_PRECLAIM=y
+CONFIG_SOUND_PAS=m
+CONFIG_SOUND_PRIME=m
+CONFIG_SOUND_PSS=m
+CONFIG_SOUND_SB=m
+CONFIG_SOUND_SSCAPE=m
+# CONFIG_SOUND_TRACEINIT is not set
+CONFIG_SOUND_TRIX=m
+CONFIG_SOUND_UART6850=m
+CONFIG_SOUND_VMIDI=m
+CONFIG_SOUND_YM3812=m
+CONFIG_SPARC=y
+# CONFIG_SPARC32 is not set
+CONFIG_SPARC64=y
+# CONFIG_SPARC64_PAGE_SIZE_64KB is not set
+CONFIG_SPARC64_PAGE_SIZE_8KB=y
+CONFIG_SPARC64_PCI=y
+CONFIG_SPARC64_SMP=y
+CONFIG_SPARSEMEM=y
+CONFIG_SPARSEMEM_EXTREME=y
+CONFIG_SPARSEMEM_VMEMMAP=y
+CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
+CONFIG_SPI=y
+CONFIG_SPI_BITBANG=m
+CONFIG_SPI_BUTTERFLY=m
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_GPIO=m
+CONFIG_SPI_LM70_LLP=m
+CONFIG_SPI_MASTER=y
+CONFIG_SPI_SPIDEV=m
+CONFIG_SPI_TLE62X0=m
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_SPU_BASE=y
+CONFIG_SPU_FS=m
+CONFIG_SPU_FS_64K_LS=y
+CONFIG_SQUASHFS=m
+# CONFIG_SQUASHFS_EMBEDDED is not set
+CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
+CONFIG_SR_REPORT_TIME_LIMIT=100
+CONFIG_SSB=m
+CONFIG_SSB_B43_PCI_BRIDGE=y
+CONFIG_SSB_BLOCKIO=y
+# CONFIG_SSB_DEBUG is not set
+CONFIG_SSB_DRIVER_PCICORE=y
+CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
+CONFIG_SSB_PCIHOST=y
+CONFIG_SSB_PCIHOST_POSSIBLE=y
+# CONFIG_SSB_PCMCIAHOST is not set
+CONFIG_SSB_PCMCIAHOST_POSSIBLE=y
+CONFIG_SSB_POSSIBLE=y
+CONFIG_SSB_SDIOHOST=y
+CONFIG_SSB_SDIOHOST_POSSIBLE=y
+CONFIG_SSB_SPROM=y
+CONFIG_SSFDC=m
+CONFIG_STACKTRACE=y
+CONFIG_STACKTRACE_SUPPORT=y
+# CONFIG_STACK_DEBUG is not set
+# CONFIG_STACK_TRACER is not set
+CONFIG_STAGING=y
+CONFIG_STALDRV=y
+CONFIG_STALLION=m
+CONFIG_STANDALONE=y
+CONFIG_STE10XP=m
+CONFIG_STOP_MACHINE=y
+CONFIG_STP=m
+CONFIG_STRIP=m
+# CONFIG_STRIP_ASM_SYMS is not set
+CONFIG_SUNBMAC=m
+CONFIG_SUNDANCE=m
+CONFIG_SUNLANCE=m
+CONFIG_SUNQE=m
+CONFIG_SUNRPC=m
+CONFIG_SUNRPC_GSS=m
+CONFIG_SUNRPC_XPRT_RDMA=m
+CONFIG_SUNVDC=m
+CONFIG_SUNVNET=m
+CONFIG_SUN_LDOMS=y
+CONFIG_SUN_OPENPROMFS=m
+CONFIG_SUN_OPENPROMIO=y
+CONFIG_SUN_PARTITION=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+CONFIG_SWAP=y
+CONFIG_SWIOTLB=y
+CONFIG_SYNCLINK=m
+CONFIG_SYNCLINKMP=m
+CONFIG_SYNCLINK_CS=m
+CONFIG_SYNCLINK_GT=m
+CONFIG_SYN_COOKIES=y
+CONFIG_SYSCTL=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_SYSFS=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+CONFIG_SYSV68_PARTITION=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_COMPAT=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_SYSV_FS=m
+# CONFIG_SYS_HYPERVISOR is not set
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_SYS_SUPPORTS_HUGETLBFS=y
+CONFIG_TABLET_USB_ACECAD=m
+CONFIG_TABLET_USB_AIPTEK=m
+CONFIG_TABLET_USB_GTCO=m
+CONFIG_TABLET_USB_KBTAB=m
+CONFIG_TADPOLE_TS102_UCTRL=m
+CONFIG_TASKSTATS=y
+CONFIG_TASK_DELAY_ACCT=y
+CONFIG_TASK_IO_ACCOUNTING=y
+CONFIG_TASK_SIZE=0xc0000000
+CONFIG_TASK_XACCT=y
+CONFIG_TAU=y
+# CONFIG_TAU_AVERAGE is not set
+# CONFIG_TAU_INT is not set
+CONFIG_TCG_ATMEL=m
+# CONFIG_TCG_INFINEON is not set
+CONFIG_TCG_NSC=m
+# CONFIG_TCG_TIS is not set
+CONFIG_TCG_TPM=m
+CONFIG_TCP_CONG_ADVANCED=y
+CONFIG_TCP_CONG_BIC=m
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_TCP_CONG_HSTCP=m
+CONFIG_TCP_CONG_HTCP=m
+CONFIG_TCP_CONG_HYBLA=m
+CONFIG_TCP_CONG_ILLINOIS=m
+CONFIG_TCP_CONG_LP=m
+CONFIG_TCP_CONG_SCALABLE=m
+CONFIG_TCP_CONG_VEGAS=m
+CONFIG_TCP_CONG_VENO=m
+CONFIG_TCP_CONG_WESTWOOD=m
+CONFIG_TCP_CONG_YEAH=m
+CONFIG_TCP_MD5SIG=y
+CONFIG_TEHUTI=m
+CONFIG_TEKRAM_DONGLE=m
+CONFIG_TEXTSEARCH=y
+CONFIG_TEXTSEARCH_BM=m
+CONFIG_TEXTSEARCH_FSM=m
+CONFIG_TEXTSEARCH_KMP=m
+CONFIG_THERMAL_HWMON=y
+CONFIG_THERM_ADT746X=m
+CONFIG_THERM_WINDTUNNEL=m
+CONFIG_THRUSTMASTER_FF=y
+CONFIG_TICK_ONESHOT=y
+CONFIG_TIFM_7XX1=m
+CONFIG_TIFM_CORE=m
+CONFIG_TIGON3=m
+CONFIG_TIMERFD=y
+CONFIG_TIMER_STATS=y
+CONFIG_TIPC=m
+# CONFIG_TIPC_ADVANCED is not set
+# CONFIG_TIPC_DEBUG is not set
+CONFIG_TLAN=m
+# CONFIG_TMD_HERMES is not set
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_TMS380TR=m
+CONFIG_TMSPCI=m
+CONFIG_TOIM3232_DONGLE=m
+CONFIG_TOSHIBA_FIR=m
+CONFIG_TOUCHSCREEN_AD7877=m
+CONFIG_TOUCHSCREEN_AD7879=m
+CONFIG_TOUCHSCREEN_AD7879_I2C=m
+CONFIG_TOUCHSCREEN_ADS7846=m
+CONFIG_TOUCHSCREEN_DA9034=m
+CONFIG_TOUCHSCREEN_EETI=m
+CONFIG_TOUCHSCREEN_ELO=m
+CONFIG_TOUCHSCREEN_FUJITSU=m
+CONFIG_TOUCHSCREEN_GUNZE=m
+CONFIG_TOUCHSCREEN_INEXIO=m
+CONFIG_TOUCHSCREEN_MCS5000=m
+CONFIG_TOUCHSCREEN_MK712=m
+CONFIG_TOUCHSCREEN_MTOUCH=m
+CONFIG_TOUCHSCREEN_PCAP=m
+CONFIG_TOUCHSCREEN_PENMOUNT=m
+CONFIG_TOUCHSCREEN_TOUCHIT213=m
+CONFIG_TOUCHSCREEN_TOUCHRIGHT=m
+CONFIG_TOUCHSCREEN_TOUCHWIN=m
+CONFIG_TOUCHSCREEN_TSC2007=m
+CONFIG_TOUCHSCREEN_UCB1400=m
+CONFIG_TOUCHSCREEN_USB_3M=y
+CONFIG_TOUCHSCREEN_USB_COMPOSITE=m
+CONFIG_TOUCHSCREEN_USB_DMC_TSC10=y
+CONFIG_TOUCHSCREEN_USB_E2I=y
+CONFIG_TOUCHSCREEN_USB_EGALAX=y
+CONFIG_TOUCHSCREEN_USB_ETURBO=y
+CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH=y
+CONFIG_TOUCHSCREEN_USB_GOTOP=y
+CONFIG_TOUCHSCREEN_USB_GUNZE=y
+CONFIG_TOUCHSCREEN_USB_IDEALTEK=y
+CONFIG_TOUCHSCREEN_USB_IRTOUCH=y
+CONFIG_TOUCHSCREEN_USB_ITM=y
+CONFIG_TOUCHSCREEN_USB_JASTEC=y
+CONFIG_TOUCHSCREEN_USB_PANJIT=y
+CONFIG_TOUCHSCREEN_WACOM_W8001=m
+CONFIG_TOUCHSCREEN_WM9705=y
+CONFIG_TOUCHSCREEN_WM9712=y
+CONFIG_TOUCHSCREEN_WM9713=y
+CONFIG_TOUCHSCREEN_WM97XX=m
+CONFIG_TRACEPOINTS=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_TRACING=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_TRANZPORT is not set
+# CONFIG_TREE_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_RCU_TRACE is not set
+CONFIG_TTPCI_EEPROM=m
+CONFIG_TULIP=m
+CONFIG_TULIP_DM910X=y
+# CONFIG_TULIP_MMIO is not set
+# CONFIG_TULIP_MWI is not set
+CONFIG_TULIP_NAPI_HW_MITIGATION=y
+CONFIG_TUN=y
+# CONFIG_TUNE_CELL is not set
+CONFIG_TWL4030_CORE=y
+CONFIG_TWL4030_USB=m
+CONFIG_TWL4030_WATCHDOG=m
+CONFIG_TYPHOON=m
+CONFIG_U3_DART=y
+# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
+# CONFIG_UBIFS_FS_DEBUG is not set
+CONFIG_UBIFS_FS_LZO=y
+CONFIG_UBIFS_FS_XATTR=y
+CONFIG_UBIFS_FS_ZLIB=y
+CONFIG_UCB1400_CORE=m
+CONFIG_UDBG_RTAS_CONSOLE=y
+CONFIG_UDF_FS=m
+CONFIG_UDF_NLS=y
+CONFIG_UEVENT_HELPER_PATH=""
+# CONFIG_UFS_DEBUG is not set
+# CONFIG_UFS_FS_WRITE is not set
+CONFIG_UID16=y
+CONFIG_UIO=m
+CONFIG_UIO_AEC=m
+CONFIG_UIO_CIF=m
+CONFIG_UIO_PCI_GENERIC=m
+CONFIG_UIO_PDRV=m
+CONFIG_UIO_PDRV_GENIRQ=m
+CONFIG_UIO_SERCOS3=m
+CONFIG_UIO_SMX=m
+CONFIG_ULI526X=m
+CONFIG_UNIX=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNUSED_SYMBOLS=y
+CONFIG_US3_MC=m
+CONFIG_USBPCWATCHDOG=m
+CONFIG_USB_ACM=m
+CONFIG_USB_ADUTUX=m
+CONFIG_USB_ALI_M5632=y
+CONFIG_USB_AN2720=y
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+CONFIG_USB_APPLEDISPLAY=m
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARMLINUX=y
+CONFIG_USB_ATM=m
+CONFIG_USB_AUDIO=m
+CONFIG_USB_BELKIN=y
+CONFIG_USB_BERRY_CHARGE=m
+CONFIG_USB_C67X00_HCD=m
+CONFIG_USB_CATC=m
+CONFIG_USB_CDC_COMPOSITE=m
+CONFIG_USB_CDC_PHONET=m
+CONFIG_USB_CXACRU=m
+CONFIG_USB_CYPRESS_CY7C63=m
+CONFIG_USB_CYTHERM=m
+# CONFIG_USB_DABUSB is not set
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_DEVICEFS is not set
+# CONFIG_USB_DEVICE_CLASS is not set
+CONFIG_USB_DSBR=m
+# CONFIG_USB_DYNAMIC_MINORS is not set
+CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y
+CONFIG_USB_EHCI_HCD_PPC_OF=y
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+CONFIG_USB_EHCI_TT_NEWSCHED=y
+CONFIG_USB_EMI26=m
+CONFIG_USB_EMI62=m
+CONFIG_USB_EPSON2888=y
+CONFIG_USB_ET61X251=m
+CONFIG_USB_ETH=m
+# CONFIG_USB_ETH_EEM is not set
+CONFIG_USB_ETH_RNDIS=y
+CONFIG_USB_EZUSB=y
+CONFIG_USB_FILE_STORAGE=m
+# CONFIG_USB_FILE_STORAGE_TEST is not set
+CONFIG_USB_FTDI_ELAN=m
+CONFIG_USB_GADGETFS=m
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_CI13XXX is not set
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+# CONFIG_USB_GADGET_DEBUG_FS is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+# CONFIG_USB_GADGET_FSL_QE is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_IMX is not set
+# CONFIG_USB_GADGET_LANGWELL is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_MUSB_HDRC is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_PXA25X is not set
+# CONFIG_USB_GADGET_PXA27X is not set
+# CONFIG_USB_GADGET_R8A66597 is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_S3C_HSOTG is not set
+CONFIG_USB_GADGET_SELECTED=y
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GL860=m
+CONFIG_USB_GOKU=m
+CONFIG_USB_GPIO_VBUS=m
+CONFIG_USB_GSPCA=m
+CONFIG_USB_GSPCA_CONEX=m
+CONFIG_USB_GSPCA_ETOMS=m
+CONFIG_USB_GSPCA_FINEPIX=m
+CONFIG_USB_GSPCA_JEILINJ=m
+CONFIG_USB_GSPCA_MARS=m
+CONFIG_USB_GSPCA_MR97310A=m
+CONFIG_USB_GSPCA_OV519=m
+CONFIG_USB_GSPCA_OV534=m
+CONFIG_USB_GSPCA_PAC207=m
+CONFIG_USB_GSPCA_PAC7311=m
+CONFIG_USB_GSPCA_SN9C20X=m
+# CONFIG_USB_GSPCA_SN9C20X_EVDEV is not set
+CONFIG_USB_GSPCA_SONIXB=m
+CONFIG_USB_GSPCA_SONIXJ=m
+CONFIG_USB_GSPCA_SPCA500=m
+CONFIG_USB_GSPCA_SPCA501=m
+CONFIG_USB_GSPCA_SPCA505=m
+CONFIG_USB_GSPCA_SPCA506=m
+CONFIG_USB_GSPCA_SPCA508=m
+CONFIG_USB_GSPCA_SPCA561=m
+CONFIG_USB_GSPCA_SQ905=m
+CONFIG_USB_GSPCA_SQ905C=m
+CONFIG_USB_GSPCA_STK014=m
+CONFIG_USB_GSPCA_SUNPLUS=m
+CONFIG_USB_GSPCA_T613=m
+CONFIG_USB_GSPCA_TV8532=m
+CONFIG_USB_GSPCA_VC032X=m
+CONFIG_USB_GSPCA_ZC3XX=m
+CONFIG_USB_G_PRINTER=m
+CONFIG_USB_G_SERIAL=m
+CONFIG_USB_HID=m
+CONFIG_USB_HSO=m
+CONFIG_USB_HWA_HCD=m
+CONFIG_USB_IDMOUSE=m
+CONFIG_USB_IOWARRIOR=m
+# CONFIG_USB_IP_COMMON is not set
+CONFIG_USB_IRDA=m
+CONFIG_USB_ISIGHTFW=m
+CONFIG_USB_ISP116X_HCD=m
+CONFIG_USB_ISP1362_HCD=m
+CONFIG_USB_ISP1760_HCD=m
+CONFIG_USB_KAWETH=m
+CONFIG_USB_KC2190=y
+CONFIG_USB_LCD=m
+CONFIG_USB_LD=m
+CONFIG_USB_LED=m
+CONFIG_USB_LEGOTOWER=m
+# CONFIG_USB_LIBUSUAL is not set
+CONFIG_USB_M5602=m
+CONFIG_USB_MDC800=m
+CONFIG_USB_MICROTEK=m
+CONFIG_USB_MIDI_GADGET=m
+CONFIG_USB_MR800=m
+CONFIG_USB_NET_AX8817X=m
+CONFIG_USB_NET_CDCETHER=m
+CONFIG_USB_NET_CDC_EEM=m
+CONFIG_USB_NET_CDC_SUBSET=m
+CONFIG_USB_NET_DM9601=m
+CONFIG_USB_NET_GL620A=m
+CONFIG_USB_NET_INT51X1=m
+CONFIG_USB_NET_MCS7830=m
+CONFIG_USB_NET_NET1080=m
+CONFIG_USB_NET_PLUSB=m
+CONFIG_USB_NET_RNDIS_HOST=m
+# CONFIG_USB_NET_RNDIS_WLAN is not set
+CONFIG_USB_NET_SMSC95XX=m
+# CONFIG_USB_NET_ZAURUS is not set
+CONFIG_USB_OHCI_HCD_PCI=y
+CONFIG_USB_OHCI_HCD_PPC_OF=y
+CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
+# CONFIG_USB_OHCI_HCD_PPC_OF_LE is not set
+# CONFIG_USB_OHCI_HCD_SSB is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_OTG is not set
+CONFIG_USB_OTG_UTILS=y
+# CONFIG_USB_OV511 is not set
+CONFIG_USB_OXU210HP_HCD=m
+CONFIG_USB_PEGASUS=m
+CONFIG_USB_PRINTER=m
+# CONFIG_USB_PWC_DEBUG is not set
+CONFIG_USB_PWC_INPUT_EVDEV=y
+CONFIG_USB_R8A66597_HCD=m
+CONFIG_USB_RIO500=m
+CONFIG_USB_RTL8150=m
+CONFIG_USB_S2255=m
+CONFIG_USB_SERIAL=m
+CONFIG_USB_SERIAL_AIRCABLE=m
+CONFIG_USB_SERIAL_ARK3116=m
+CONFIG_USB_SERIAL_BELKIN=m
+CONFIG_USB_SERIAL_CH341=m
+CONFIG_USB_SERIAL_CP210X=m
+CONFIG_USB_SERIAL_CYBERJACK=m
+CONFIG_USB_SERIAL_CYPRESS_M8=m
+CONFIG_USB_SERIAL_DEBUG=m
+CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
+CONFIG_USB_SERIAL_EDGEPORT=m
+CONFIG_USB_SERIAL_EDGEPORT_TI=m
+CONFIG_USB_SERIAL_EMPEG=m
+CONFIG_USB_SERIAL_FTDI_SIO=m
+CONFIG_USB_SERIAL_FUNSOFT=m
+CONFIG_USB_SERIAL_GARMIN=m
+CONFIG_USB_SERIAL_GENERIC=y
+CONFIG_USB_SERIAL_HP4X=m
+CONFIG_USB_SERIAL_IPAQ=m
+CONFIG_USB_SERIAL_IPW=m
+CONFIG_USB_SERIAL_IR=m
+CONFIG_USB_SERIAL_IUU=m
+CONFIG_USB_SERIAL_KEYSPAN=m
+CONFIG_USB_SERIAL_KEYSPAN_MPR=y
+CONFIG_USB_SERIAL_KEYSPAN_PDA=m
+CONFIG_USB_SERIAL_KEYSPAN_USA18X=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19W=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28X=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y
+CONFIG_USB_SERIAL_KEYSPAN_USA49W=y
+CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y
+CONFIG_USB_SERIAL_KLSI=m
+CONFIG_USB_SERIAL_KOBIL_SCT=m
+CONFIG_USB_SERIAL_MCT_U232=m
+CONFIG_USB_SERIAL_MOS7720=m
+CONFIG_USB_SERIAL_MOS7840=m
+CONFIG_USB_SERIAL_MOTOROLA=m
+CONFIG_USB_SERIAL_NAVMAN=m
+CONFIG_USB_SERIAL_OMNINET=m
+CONFIG_USB_SERIAL_OPTICON=m
+CONFIG_USB_SERIAL_OPTION=m
+CONFIG_USB_SERIAL_OTI6858=m
+CONFIG_USB_SERIAL_PL2303=m
+CONFIG_USB_SERIAL_QUALCOMM=m
+# CONFIG_USB_SERIAL_QUATECH2 is not set
+# CONFIG_USB_SERIAL_QUATECH_USB2 is not set
+CONFIG_USB_SERIAL_SAFE=m
+# CONFIG_USB_SERIAL_SAFE_PADDED is not set
+CONFIG_USB_SERIAL_SIEMENS_MPI=m
+CONFIG_USB_SERIAL_SIERRAWIRELESS=m
+CONFIG_USB_SERIAL_SPCP8X5=m
+CONFIG_USB_SERIAL_SYMBOL=m
+CONFIG_USB_SERIAL_TI=m
+CONFIG_USB_SERIAL_VISOR=m
+CONFIG_USB_SERIAL_WHITEHEAT=m
+CONFIG_USB_SERIAL_XIRCOM=m
+CONFIG_USB_SEVSEG=m
+# CONFIG_USB_SI470X is not set
+CONFIG_USB_SISUSBVGA=m
+# CONFIG_USB_SISUSBVGA_CON is not set
+CONFIG_USB_SL811_CS=m
+CONFIG_USB_SL811_HCD=m
+CONFIG_USB_SN9C102=m
+CONFIG_USB_SPEEDTOUCH=m
+# CONFIG_USB_STKWEBCAM is not set
+CONFIG_USB_STORAGE=m
+CONFIG_USB_STORAGE_ALAUDA=m
+CONFIG_USB_STORAGE_CYPRESS_ATACB=m
+CONFIG_USB_STORAGE_DATAFAB=m
+# CONFIG_USB_STORAGE_DEBUG is not set
+CONFIG_USB_STORAGE_FREECOM=m
+CONFIG_USB_STORAGE_ISD200=m
+CONFIG_USB_STORAGE_JUMPSHOT=m
+CONFIG_USB_STORAGE_KARMA=m
+CONFIG_USB_STORAGE_ONETOUCH=m
+CONFIG_USB_STORAGE_SDDR09=m
+CONFIG_USB_STORAGE_SDDR55=m
+CONFIG_USB_STORAGE_USBAT=m
+CONFIG_USB_STV06XX=m
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_SUSPEND=y
+CONFIG_USB_TEST=m
+CONFIG_USB_TMC=m
+CONFIG_USB_TRANCEVIBRATOR=m
+CONFIG_USB_U132_HCD=m
+CONFIG_USB_UEAGLEATM=m
+CONFIG_USB_USBNET=m
+CONFIG_USB_USS720=m
+CONFIG_USB_VIDEO_CLASS=m
+CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
+CONFIG_USB_VST=m
+CONFIG_USB_W9968CF=m
+CONFIG_USB_WDM=m
+CONFIG_USB_WHCI_HCD=m
+CONFIG_USB_WUSB=m
+CONFIG_USB_WUSB_CBAF=m
+# CONFIG_USB_WUSB_CBAF_DEBUG is not set
+CONFIG_USB_XHCI_HCD=m
+# CONFIG_USB_XHCI_HCD_DEBUGGING is not set
+CONFIG_USB_XUSBATM=m
+CONFIG_USB_ZC0301=m
+CONFIG_USB_ZD1201=m
+CONFIG_USB_ZERO=m
+CONFIG_USB_ZR364XX=m
+# CONFIG_USER_NS is not set
+CONFIG_USER_SCHED=y
+CONFIG_USE_GENERIC_SMP_HELPERS=y
+# CONFIG_UTS_NS is not set
+CONFIG_UWB=m
+CONFIG_UWB_HWA=m
+CONFIG_UWB_I1480U=m
+CONFIG_UWB_I1480U_WLP=m
+CONFIG_UWB_WHCI=m
+CONFIG_UWB_WLP=m
+CONFIG_V4L_USB_DRIVERS=y
+CONFIG_VERSION_SIGNATURE=""
+CONFIG_VETH=m
+CONFIG_VFAT_FS=m
+CONFIG_VGASTATE=m
+CONFIG_VGA_ARB=y
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_VIA_FIR=m
+CONFIG_VIA_RHINE=m
+CONFIG_VIA_RHINE_MMIO=y
+CONFIG_VIA_VELOCITY=m
+CONFIG_VIDEOBUF_DMA_SG=m
+CONFIG_VIDEOBUF_DVB=m
+CONFIG_VIDEOBUF_GEN=m
+CONFIG_VIDEOBUF_VMALLOC=m
+CONFIG_VIDEO_ADV7180=m
+CONFIG_VIDEO_ADV7343=m
+# CONFIG_VIDEO_ADV_DEBUG is not set
+CONFIG_VIDEO_ALLOW_V4L1=y
+CONFIG_VIDEO_AU0828=m
+CONFIG_VIDEO_BT848_DVB=y
+CONFIG_VIDEO_BTCX=m
+CONFIG_VIDEO_CAFE_CCIC=m
+CONFIG_VIDEO_CAPTURE_DRIVERS=y
+CONFIG_VIDEO_CPIA_PP=m
+CONFIG_VIDEO_CPIA_USB=m
+CONFIG_VIDEO_CS53L32A=m
+CONFIG_VIDEO_CX18=m
+CONFIG_VIDEO_CX231XX=m
+CONFIG_VIDEO_CX231XX_ALSA=m
+CONFIG_VIDEO_CX231XX_DVB=m
+CONFIG_VIDEO_CX2341X=m
+CONFIG_VIDEO_CX23885=m
+# CONFIG_VIDEO_CX25821 is not set
+CONFIG_VIDEO_CX25840=m
+CONFIG_VIDEO_CX88_ALSA=m
+CONFIG_VIDEO_CX88_BLACKBIRD=m
+CONFIG_VIDEO_CX88_DVB=m
+CONFIG_VIDEO_CX88_MPEG=m
+CONFIG_VIDEO_CX88_VP3054=m
+CONFIG_VIDEO_DEV=m
+# CONFIG_VIDEO_EM28XX_ALSA is not set
+CONFIG_VIDEO_EM28XX_DVB=m
+CONFIG_VIDEO_FB_IVTV=m
+# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
+# CONFIG_VIDEO_GO7007 is not set
+CONFIG_VIDEO_HDPVR=m
+# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set
+CONFIG_VIDEO_HEXIUM_GEMINI=m
+CONFIG_VIDEO_HEXIUM_ORION=m
+CONFIG_VIDEO_IR=m
+CONFIG_VIDEO_IR_I2C=m
+CONFIG_VIDEO_MEDIA=m
+CONFIG_VIDEO_MSP3400=m
+CONFIG_VIDEO_MT9V011=m
+# CONFIG_VIDEO_MXB is not set
+CONFIG_VIDEO_OUTPUT_CONTROL=m
+CONFIG_VIDEO_OV7670=m
+CONFIG_VIDEO_PVRUSB2=m
+# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set
+CONFIG_VIDEO_PVRUSB2_DVB=y
+CONFIG_VIDEO_PVRUSB2_SYSFS=y
+CONFIG_VIDEO_SAA5246A=m
+CONFIG_VIDEO_SAA6588=m
+CONFIG_VIDEO_SAA711X=m
+CONFIG_VIDEO_SAA7127=m
+CONFIG_VIDEO_SAA7134=m
+CONFIG_VIDEO_SAA7134_ALSA=m
+CONFIG_VIDEO_SAA7134_DVB=m
+CONFIG_VIDEO_SAA7146=m
+CONFIG_VIDEO_SAA7146_VV=m
+CONFIG_VIDEO_SAA7164=m
+CONFIG_VIDEO_SAA717X=m
+CONFIG_VIDEO_STRADIS=m
+CONFIG_VIDEO_TCM825X=m
+CONFIG_VIDEO_TDA9840=m
+CONFIG_VIDEO_TEA6415C=m
+CONFIG_VIDEO_TEA6420=m
+CONFIG_VIDEO_THS7303=m
+CONFIG_VIDEO_TLV320AIC23B=m
+CONFIG_VIDEO_TUNER=m
+CONFIG_VIDEO_TVEEPROM=m
+CONFIG_VIDEO_TVP514X=m
+CONFIG_VIDEO_TVP5150=m
+CONFIG_VIDEO_UPD64031A=m
+CONFIG_VIDEO_UPD64083=m
+CONFIG_VIDEO_USBVIDEO=m
+CONFIG_VIDEO_USBVISION=m
+CONFIG_VIDEO_V4L1=m
+CONFIG_VIDEO_V4L1_COMPAT=y
+CONFIG_VIDEO_V4L2=m
+CONFIG_VIDEO_V4L2_COMMON=m
+CONFIG_VIDEO_VIVI=m
+CONFIG_VIDEO_VP27SMPX=m
+CONFIG_VIDEO_WM8739=m
+CONFIG_VIDEO_WM8775=m
+CONFIG_VIDEO_ZORAN=m
+CONFIG_VIDEO_ZORAN_AVS6EYES=m
+CONFIG_VIDEO_ZORAN_BUZ=m
+CONFIG_VIDEO_ZORAN_DC10=m
+CONFIG_VIDEO_ZORAN_DC30=m
+CONFIG_VIDEO_ZORAN_LML33=m
+CONFIG_VIDEO_ZORAN_LML33R10=m
+CONFIG_VIDEO_ZORAN_ZR36060=m
+# CONFIG_VIRQ_DEBUG is not set
+CONFIG_VIRTIO=m
+CONFIG_VIRTIO_BALLOON=m
+CONFIG_VIRTIO_BLK=m
+CONFIG_VIRTIO_CONSOLE=m
+CONFIG_VIRTIO_NET=m
+CONFIG_VIRTIO_PCI=m
+CONFIG_VIRTIO_RING=m
+CONFIG_VIRTUAL_MEM_MAP=y
+CONFIG_VIRT_CPU_ACCOUNTING=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_VITESSE_PHY=m
+CONFIG_VLAN_8021Q=m
+CONFIG_VLAN_8021Q_GVRP=y
+CONFIG_VLSI_FIR=m
+# CONFIG_VME_BUS is not set
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_VORTEX=m
+# CONFIG_VSX is not set
+CONFIG_VT=y
+# CONFIG_VT6655 is not set
+# CONFIG_VT6656 is not set
+CONFIG_VT_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+CONFIG_VXFS_FS=m
+CONFIG_VXGE=m
+# CONFIG_VXGE_DEBUG_TRACE_ALL is not set
+CONFIG_W1=m
+CONFIG_W1_CON=y
+CONFIG_W1_MASTER_DS2482=m
+CONFIG_W1_MASTER_DS2490=m
+CONFIG_W1_MASTER_GPIO=m
+CONFIG_W1_MASTER_MATROX=m
+CONFIG_W1_SLAVE_BQ27000=m
+CONFIG_W1_SLAVE_DS2431=m
+CONFIG_W1_SLAVE_DS2433=m
+# CONFIG_W1_SLAVE_DS2433_CRC is not set
+CONFIG_W1_SLAVE_DS2760=m
+CONFIG_W1_SLAVE_SMEM=m
+CONFIG_W1_SLAVE_THERM=m
+# CONFIG_W35UND is not set
+CONFIG_WANXL=m
+CONFIG_WAN_ROUTER_DRIVERS=m
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_CP1XXX=m
+CONFIG_WATCHDOG_RIO=m
+CONFIG_WATCHDOG_RTAS=m
+CONFIG_WDTPCI=m
+CONFIG_WIMAX=m
+CONFIG_WIMAX_DEBUG_LEVEL=8
+CONFIG_WIMAX_I2400M=m
+CONFIG_WIMAX_I2400M_DEBUG_LEVEL=8
+CONFIG_WIMAX_I2400M_SDIO=m
+CONFIG_WIMAX_I2400M_USB=m
+CONFIG_WINBOND_840=m
+CONFIG_WINBOND_FIR=m
+CONFIG_WINDFARM=m
+CONFIG_WINDFARM_PM112=m
+CONFIG_WINDFARM_PM121=m
+CONFIG_WINDFARM_PM81=m
+CONFIG_WINDFARM_PM91=m
+CONFIG_WIRELESS=y
+CONFIG_WIRELESS_EXT=y
+CONFIG_WIRELESS_EXT_SYSFS=y
+# CONFIG_WIRELESS_OLD_REGULATORY is not set
+CONFIG_WL1251=m
+CONFIG_WL1251_SDIO=m
+CONFIG_WL1251_SPI=m
+CONFIG_WL1271=m
+CONFIG_WL12XX=m
+CONFIG_WLAN=y
+CONFIG_WLAN_80211=y
+CONFIG_WLAN_PRE80211=y
+CONFIG_WM831X_POWER=m
+CONFIG_WM831X_WATCHDOG=m
+CONFIG_WM8350_POWER=m
+CONFIG_WM8350_WATCHDOG=m
+# CONFIG_WORKQUEUE_TRACER is not set
+CONFIG_X25_ASY=m
+# CONFIG_XEN is not set
+CONFIG_XFRM=y
+CONFIG_XFRM_IPCOMP=m
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+CONFIG_XFRM_USER=m
+# CONFIG_XFS_DEBUG is not set
+CONFIG_XFS_FS=m
+CONFIG_XFS_POSIX_ACL=y
+CONFIG_XFS_QUOTA=y
+CONFIG_XFS_RT=y
+CONFIG_XICS=y
+CONFIG_XILINX_EMACLITE=m
+# CONFIG_XMON is not set
+CONFIG_XOR_BLOCKS=m
+CONFIG_YAM=m
+CONFIG_YELLOWFIN=m
+CONFIG_YENTA=m
+CONFIG_YENTA_ENE_TUNE=y
+CONFIG_YENTA_O2=y
+CONFIG_YENTA_RICOH=y
+CONFIG_YENTA_TI=y
+CONFIG_YENTA_TOSHIBA=y
+CONFIG_ZD1211RW=m
+# CONFIG_ZD1211RW_DEBUG is not set
+CONFIG_ZEROPLUS_FF=y
+CONFIG_ZISOFS=y
+CONFIG_ZLIB_DEFLATE=m
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZONE_DMA=y
--- linux-mvl-dove-2.6.32.orig/debian.master/config/enforce
+++ linux-mvl-dove-2.6.32/debian.master/config/enforce
@@ -0,0 +1,40 @@
+#
+# SECURITY items
+#
+# Ensure this option is enabled.
+value CONFIG_COMPAT_BRK n
+value CONFIG_DEVKMEM n
+value CONFIG_LSM_MMAP_MIN_ADDR 0
+value CONFIG_SECURITY y
+!exists CONFIG_SECURITY_FILE_CAPABILITIES | value CONFIG_SECURITY_FILE_CAPABILITIES y
+value CONFIG_SECURITY_SELINUX y
+value CONFIG_SECURITY_SMACK y
+value CONFIG_SYN_COOKIES y
+value CONFIG_DEFAULT_SECURITY_APPARMOR y
+# For architectures which support this option ensure it is enabled.
+!exists CONFIG_SECCOMP | value CONFIG_SECCOMP y
+!exists CONFIG_CC_STACKPROTECTOR | value CONFIG_CC_STACKPROTECTOR y
+!exists CONFIG_DEBUG_RODATA | value CONFIG_DEBUG_RODATA y
+!exists CONFIG_STRICT_DEVMEM | value CONFIG_STRICT_DEVMEM y
+# For architectures which support this option ensure it is disabled.
+!exists CONFIG_COMPAT_VDSO | value CONFIG_COMPAT_VDSO n
+# Default to 32768 for armel, 65536 for everything else.
+(( arch armel | arch sparc ) & value CONFIG_DEFAULT_MMAP_MIN_ADDR 32768 ) | \
+	( value CONFIG_DEFAULT_MMAP_MIN_ADDR 65536)
+
+# CONFIG_USB_DEVICE_FS breaks udev USB firmware loading and is deprecated
+# ensure it is disabled.
+value CONFIG_USB_DEVICEFS n
+
+# upstart requires DEVTMPFS be enabled and mounted by default.
+value CONFIG_DEVTMPFS y
+value CONFIG_DEVTMPFS_MOUNT y
+
+# some /dev nodes require POSIX ACLs, like /dev/dsp
+value CONFIG_TMPFS_POSIX_ACL y
+
+# Ramdisk size should be a minimum of 64M
+value CONFIG_BLK_DEV_RAM_SIZE 65536
+
+# LVM requires dm_mod built in to activate correctly (LP: #560717)
+value CONFIG_BLK_DEV_DM y
--- linux-mvl-dove-2.6.32.orig/debian.master/config/powerpc/config.flavour.powerpc-smp
+++ linux-mvl-dove-2.6.32/debian.master/config/powerpc/config.flavour.powerpc-smp
@@ -0,0 +1,51 @@
+#
+# Config options for config.flavour.powerpc-smp automatically generated by splitconfig.pl
+#
+# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
+# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
+# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_CFG80211_REG_DEBUG=y
+# CONFIG_CRYPTO_LZO is not set
+CONFIG_FB_SYS_COPYAREA=m
+CONFIG_FB_SYS_FILLRECT=m
+CONFIG_FB_SYS_FOPS=m
+CONFIG_FB_SYS_IMAGEBLIT=m
+CONFIG_FLATMEM_MANUAL=y
+CONFIG_FORCE_MAX_ZONEORDER=11
+CONFIG_GENERIC_TBSYNC=y
+# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
+# CONFIG_HP_ILO is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_I2C_GPIO=m
+CONFIG_KERNEL_START=0xc0000000
+# CONFIG_KGDB is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
+CONFIG_LZO_COMPRESS=m
+CONFIG_LZO_DECOMPRESS=m
+CONFIG_MAX_ACTIVE_REGIONS=32
+# CONFIG_MMIO_NVRAM is not set
+# CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK is not set
+CONFIG_NR_CPUS=4
+CONFIG_PAGE_OFFSET=0xc0000000
+CONFIG_PCIEASPM=y
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+# CONFIG_PPC64 is not set
+# CONFIG_PPC_970_NAP is not set
+# CONFIG_PPC_CELL is not set
+CONFIG_PPC_INDIRECT_PCI=y
+# CONFIG_PPC_MM_SLICES is not set
+CONFIG_PPC_MPC106=y
+CONFIG_RCU_FANOUT=32
+# CONFIG_RISCOM8 is not set
+# CONFIG_RTAS_ERROR_LOGGING is not set
+# CONFIG_SCHEDSTATS is not set
+CONFIG_SCSI_LPFC_DEBUG_FS=y
+CONFIG_SMP=y
+# CONFIG_SPARSEMEM_MANUAL is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_UBIFS_FS is not set
+# CONFIG_USB_GADGET_DUALSPEED is not set
+CONFIG_USB_GADGET_GOKU=y
+# CONFIG_USB_GADGET_NET2280 is not set
+CONFIG_WORD_SIZE=32
--- linux-mvl-dove-2.6.32.orig/debian.master/config/powerpc/config.flavour.powerpc64-smp
+++ linux-mvl-dove-2.6.32/debian.master/config/powerpc/config.flavour.powerpc64-smp
@@ -0,0 +1,51 @@
+#
+# Config options for config.flavour.powerpc64-smp automatically generated by splitconfig.pl
+#
+CONFIG_ARCH_NO_VIRT_TO_BUS=y
+CONFIG_ARCH_PHYS_ADDR_T_64BIT=y
+CONFIG_ATA_NONSTANDARD=y
+# CONFIG_CFG80211_REG_DEBUG is not set
+CONFIG_CRYPTO_LZO=y
+CONFIG_FB_SYS_COPYAREA=y
+CONFIG_FB_SYS_FILLRECT=y
+CONFIG_FB_SYS_FOPS=y
+CONFIG_FB_SYS_IMAGEBLIT=y
+# CONFIG_FLATMEM_MANUAL is not set
+CONFIG_FORCE_MAX_ZONEORDER=13
+CONFIG_GENERIC_TBSYNC=y
+CONFIG_HAVE_SETUP_PER_CPU_AREA=y
+CONFIG_HP_ILO=m
+CONFIG_HUGETLB_PAGE=y
+# CONFIG_I2C_GPIO is not set
+CONFIG_KERNEL_START=0xc000000000000000
+CONFIG_KGDB=y
+CONFIG_LATENCYTOP=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=m
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_MAX_ACTIVE_REGIONS=256
+CONFIG_MMIO_NVRAM=y
+CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y
+CONFIG_NR_CPUS=1024
+CONFIG_PAGE_OFFSET=0xc000000000000000
+# CONFIG_PCIEASPM is not set
+CONFIG_PHYS_ADDR_T_64BIT=y
+CONFIG_PPC64=y
+CONFIG_PPC_970_NAP=y
+CONFIG_PPC_CELL=y
+# CONFIG_PPC_INDIRECT_PCI is not set
+CONFIG_PPC_MM_SLICES=y
+# CONFIG_PPC_MPC106 is not set
+CONFIG_RCU_FANOUT=64
+CONFIG_RISCOM8=m
+CONFIG_RTAS_ERROR_LOGGING=y
+CONFIG_SCHEDSTATS=y
+# CONFIG_SCSI_LPFC_DEBUG_FS is not set
+CONFIG_SMP=y
+CONFIG_SPARSEMEM_MANUAL=y
+# CONFIG_TPS65010 is not set
+CONFIG_UBIFS_FS=m
+CONFIG_USB_GADGET_DUALSPEED=y
+# CONFIG_USB_GADGET_GOKU is not set
+CONFIG_USB_GADGET_NET2280=y
+CONFIG_WORD_SIZE=64
--- linux-mvl-dove-2.6.32.orig/debian.master/config/powerpc/config.flavour.powerpc
+++ linux-mvl-dove-2.6.32/debian.master/config/powerpc/config.flavour.powerpc
@@ -0,0 +1,50 @@
+#
+# Config options for config.flavour.powerpc automatically generated by splitconfig.pl
+#
+# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
+# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
+# CONFIG_ATA_NONSTANDARD is not set
+# CONFIG_CFG80211_REG_DEBUG is not set
+CONFIG_CRYPTO_LZO=m
+CONFIG_FB_SYS_COPYAREA=m
+CONFIG_FB_SYS_FILLRECT=m
+CONFIG_FB_SYS_FOPS=m
+CONFIG_FB_SYS_IMAGEBLIT=m
+CONFIG_FLATMEM_MANUAL=y
+CONFIG_FORCE_MAX_ZONEORDER=11
+# CONFIG_GENERIC_TBSYNC is not set
+# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
+CONFIG_HP_ILO=m
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_I2C_GPIO=m
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_KGDB=y
+CONFIG_LATENCYTOP=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+CONFIG_LZO_COMPRESS=m
+CONFIG_LZO_DECOMPRESS=m
+CONFIG_MAX_ACTIVE_REGIONS=32
+# CONFIG_MMIO_NVRAM is not set
+# CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK is not set
+CONFIG_PAGE_OFFSET=0xc0000000
+# CONFIG_PCIEASPM is not set
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+# CONFIG_PPC64 is not set
+# CONFIG_PPC_970_NAP is not set
+# CONFIG_PPC_CELL is not set
+CONFIG_PPC_INDIRECT_PCI=y
+# CONFIG_PPC_MM_SLICES is not set
+CONFIG_PPC_MPC106=y
+CONFIG_RCU_FANOUT=32
+CONFIG_RISCOM8=m
+# CONFIG_RTAS_ERROR_LOGGING is not set
+CONFIG_SCHEDSTATS=y
+# CONFIG_SCSI_LPFC_DEBUG_FS is not set
+# CONFIG_SMP is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_TPS65010=m
+CONFIG_UBIFS_FS=m
+CONFIG_USB_GADGET_DUALSPEED=y
+# CONFIG_USB_GADGET_GOKU is not set
+CONFIG_USB_GADGET_NET2280=y
+CONFIG_WORD_SIZE=32
--- linux-mvl-dove-2.6.32.orig/debian.master/config/powerpc/config.common.powerpc
+++ linux-mvl-dove-2.6.32/debian.master/config/powerpc/config.common.powerpc
@@ -0,0 +1,260 @@
+#
+# Config options for config.common.powerpc automatically generated by splitconfig.pl
+#
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_ACORN_PARTITION=y
+CONFIG_AIC79XX_DEBUG_ENABLE=y
+CONFIG_AIC79XX_REG_PRETTY_PRINT=y
+# CONFIG_ALIM7101_WDT is not set
+CONFIG_AMD8111_ETH=m
+CONFIG_AMIGA_PARTITION=y
+CONFIG_ARCNET=m
+CONFIG_ATA=y
+CONFIG_ATARI_PARTITION=y
+CONFIG_BINARY_PRINTF=y
+CONFIG_BLK_DEV_FD=m
+CONFIG_BLK_DEV_LOOP=m
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+CONFIG_BONDING=m
+CONFIG_BRIDGE_NF_EBTABLES=m
+CONFIG_BSD_DISKLABEL=y
+CONFIG_BT=m
+CONFIG_CGROUP_DEVICE=y
+CONFIG_CHR_DEV_SCH=m
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_PMAC64=y
+CONFIG_CRYPTO_DES=m
+CONFIG_CRYPTO_TEST=m
+# CONFIG_DAB is not set
+CONFIG_DE2104X=m
+CONFIG_DE4X5=m
+# CONFIG_DECNET_ROUTER is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=65536
+CONFIG_DEFXX=m
+CONFIG_DEV_APPLETALK=m
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+CONFIG_DM9102=m
+# CONFIG_DMADEVICES is not set
+CONFIG_DRM=m
+CONFIG_DVB_CORE=m
+CONFIG_ECONET=m
+# CONFIG_EZX_PCAP is not set
+CONFIG_FB_3DFX=y
+CONFIG_FB_ASILIANT=y
+CONFIG_FB_ATY=y
+CONFIG_FB_ATY128=y
+CONFIG_FB_CIRRUS=m
+CONFIG_FB_IMSTT=y
+CONFIG_FB_KYRO=m
+CONFIG_FB_MACMODES=y
+CONFIG_FB_MATROX=y
+CONFIG_FB_NEOMAGIC=m
+CONFIG_FB_PM2=m
+CONFIG_FB_PM2_FIFO_DISCONNECT=y
+CONFIG_FB_PS3=y
+CONFIG_FB_RIVA=m
+CONFIG_FB_SIS=m
+CONFIG_FB_TRIDENT=m
+CONFIG_FB_VOODOO1=y
+CONFIG_FORCEDETH=m
+CONFIG_FUSION_MAX_SGE=128
+CONFIG_GAMEPORT=m
+CONFIG_GELIC_NET=m
+# CONFIG_GENERIC_IOMAP is not set
+# CONFIG_GPIO_SYSFS is not set
+CONFIG_HAMACHI=m
+CONFIG_HAMRADIO=y
+CONFIG_HAPPYMEAL=m
+CONFIG_HIPPI=y
+CONFIG_HP100=m
+CONFIG_I2C_ALI1535=m
+CONFIG_I2C_ALI1563=m
+CONFIG_I2C_ALI15X3=m
+CONFIG_I2C_AMD756=m
+CONFIG_I2C_AMD8111=m
+CONFIG_I2C_I801=m
+CONFIG_I2C_NFORCE2=m
+CONFIG_I2C_SIS5595=m
+CONFIG_I2C_SIS630=m
+CONFIG_I2C_SIS96X=m
+CONFIG_I2C_VIA=m
+CONFIG_I2C_VIAPRO=m
+CONFIG_I2C_VOODOO3=m
+CONFIG_IDE=y
+CONFIG_IEEE1394_PCILYNX=m
+# CONFIG_IKCONFIG is not set
+CONFIG_INET6_AH=m
+CONFIG_INET6_ESP=m
+CONFIG_INET6_IPCOMP=m
+CONFIG_INET6_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
+CONFIG_INET6_XFRM_TUNNEL=m
+CONFIG_INFINIBAND_AMSO1100=m
+# CONFIG_INFINIBAND_IPATH is not set
+CONFIG_INFINIBAND_IPOIB_CM=y
+CONFIG_INFINIBAND_ISER=m
+CONFIG_INFINIBAND_SRP=m
+CONFIG_INFINIBAND_USER_ACCESS=m
+CONFIG_INFINIBAND_USER_MAD=m
+CONFIG_INFTL=m
+CONFIG_INPUT_EVBUG=m
+CONFIG_INPUT_JOYDEV=m
+CONFIG_INPUT_JOYSTICK=y
+CONFIG_INPUT_UINPUT=m
+CONFIG_IP1000=m
+CONFIG_IPMI_HANDLER=m
+CONFIG_IPMI_POWEROFF=m
+CONFIG_IPV6_PRIVACY=y
+CONFIG_IPV6_TUNNEL=m
+CONFIG_IP_DCCP=m
+CONFIG_IP_NF_QUEUE=m
+# CONFIG_IP_PNP is not set
+CONFIG_IP_ROUTE_MULTIPATH=y
+CONFIG_IP_ROUTE_VERBOSE=y
+CONFIG_IRDA=m
+# CONFIG_ISDN is not set
+CONFIG_KEYBOARD_NEWTON=m
+CONFIG_KEYBOARD_SUNKBD=m
+CONFIG_KEYBOARD_XTKBD=m
+CONFIG_LAPB=m
+CONFIG_LDM_PARTITION=y
+CONFIG_LEDS_CLASS=y
+# CONFIG_LEDS_PCA9532 is not set
+# CONFIG_LEDS_PCA955X is not set
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LLC=y
+CONFIG_LOG_BUF_SHIFT=17
+CONFIG_MAC80211_MESH=y
+CONFIG_MACVLAN=m
+CONFIG_MAC_PARTITION=y
+CONFIG_MARKERS=y
+# CONFIG_MFD_SM501_GPIO is not set
+CONFIG_MINIX_SUBPARTITION=y
+CONFIG_MOUSE_SERIAL=m
+CONFIG_MOUSE_VSXXXAA=m
+# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
+# CONFIG_NCPFS_SMALLDOS is not set
+CONFIG_NET_IPGRE=m
+CONFIG_NET_PKTGEN=m
+# CONFIG_NIU is not set
+CONFIG_NLS_DEFAULT="cp437"
+CONFIG_NODES_SHIFT=8
+CONFIG_OSF_PARTITION=y
+CONFIG_PCI_MSI=y
+CONFIG_PMAC_SMU=y
+CONFIG_PPC_HAS_HASH_64K=y
+CONFIG_PPC_MAPLE=y
+CONFIG_PPC_PASEMI=y
+CONFIG_PPC_PS3=y
+# CONFIG_PREEMPT_NONE is not set
+CONFIG_PREEMPT_VOLUNTARY=y
+CONFIG_PRISM54=m
+CONFIG_PROFILING=y
+CONFIG_PS3_VRAM=m
+CONFIG_QFMT_V1=m
+CONFIG_R8169=m
+# CONFIG_RDS is not set
+CONFIG_RTC_DRV_BQ4802=m
+CONFIG_RTC_DRV_CMOS=m
+CONFIG_RTC_DRV_M48T59=m
+CONFIG_RTC_DRV_PS3=m
+# CONFIG_RTC_DRV_TEST is not set
+CONFIG_SATA_SVW=y
+CONFIG_SCHED_HRTICK=y
+CONFIG_SCSI=y
+CONFIG_SCSI_AIC7XXX=m
+CONFIG_SCSI_CONSTANTS=y
+CONFIG_SCSI_DC390T=m
+CONFIG_SCSI_DEBUG=m
+CONFIG_SCSI_FUTURE_DOMAIN=m
+CONFIG_SCSI_IPS=m
+CONFIG_SCSI_LOGGING=y
+CONFIG_SENSORS_ADM1021=m
+CONFIG_SENSORS_ADM1025=m
+CONFIG_SENSORS_ADM1031=m
+CONFIG_SENSORS_DS1621=m
+CONFIG_SENSORS_GL518SM=m
+CONFIG_SENSORS_IT87=m
+CONFIG_SENSORS_LM75=m
+CONFIG_SENSORS_LM77=m
+CONFIG_SENSORS_LM78=m
+CONFIG_SENSORS_LM80=m
+CONFIG_SENSORS_LM83=m
+CONFIG_SENSORS_LM85=m
+CONFIG_SENSORS_LM90=m
+CONFIG_SENSORS_MAX1619=m
+CONFIG_SENSORS_PCF8591=m
+CONFIG_SENSORS_VIA686A=m
+CONFIG_SENSORS_W83627HF=m
+CONFIG_SENSORS_W83781D=m
+CONFIG_SENSORS_W83L785TS=m
+# CONFIG_SERIAL_8250_DETECT_IRQ is not set
+CONFIG_SERIAL_8250_NR_UARTS=48
+CONFIG_SERIAL_CORE=m
+CONFIG_SERIO_PARKBD=m
+CONFIG_SERIO_PCIPS2=m
+CONFIG_SGI_PARTITION=y
+CONFIG_SLIP_MODE_SLIP6=y
+CONFIG_SOLARIS_X86_PARTITION=y
+CONFIG_SPECIALIX=m
+# CONFIG_STAGING_EXCLUDE_BUILD is not set
+# CONFIG_SUNDANCE_MMIO is not set
+CONFIG_SUNGEM=m
+# CONFIG_TABLET_USB_WACOM is not set
+# CONFIG_THERMAL is not set
+CONFIG_THERM_PM72=m
+CONFIG_TR=y
+# CONFIG_TULIP_NAPI is not set
+CONFIG_UFS_FS=m
+CONFIG_ULTRIX_PARTITION=y
+CONFIG_UNIXWARE_DISKLABEL=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_GADGET=m
+CONFIG_USB_HIDDEV=y
+CONFIG_USB_IBMCAM=m
+CONFIG_USB_KONICAWC=m
+CONFIG_USB_MON=y
+CONFIG_USB_NET2280=m
+CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y
+CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_PWC=m
+CONFIG_USB_QUICKCAM_MESSENGER=m
+CONFIG_USB_SE401=m
+CONFIG_USB_STV680=m
+CONFIG_USB_UHCI_HCD=y
+CONFIG_USB_VICAM=m
+CONFIG_VIDEO_ADV7170=m
+CONFIG_VIDEO_ADV7175=m
+CONFIG_VIDEO_BT819=m
+CONFIG_VIDEO_BT848=m
+CONFIG_VIDEO_BT856=m
+CONFIG_VIDEO_BT866=m
+CONFIG_VIDEO_BWQCAM=m
+CONFIG_VIDEO_CPIA=m
+CONFIG_VIDEO_CPIA2=m
+CONFIG_VIDEO_CQCAM=m
+CONFIG_VIDEO_CS5345=m
+CONFIG_VIDEO_CX88=m
+CONFIG_VIDEO_EM28XX=m
+CONFIG_VIDEO_IVTV=m
+CONFIG_VIDEO_KS0127=m
+CONFIG_VIDEO_M52790=m
+CONFIG_VIDEO_OVCAMCHIP=m
+CONFIG_VIDEO_SAA5249=m
+CONFIG_VIDEO_SAA7110=m
+CONFIG_VIDEO_SAA7185=m
+CONFIG_VIDEO_SAA7191=m
+CONFIG_VIDEO_TDA7432=m
+CONFIG_VIDEO_TDA9875=m
+CONFIG_VIDEO_TVAUDIO=m
+CONFIG_VIDEO_VPX3220=m
+CONFIG_VIDEO_W9966=m
+CONFIG_VIRTUALIZATION=y
+CONFIG_WAN=y
+CONFIG_WAN_ROUTER=m
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+CONFIG_X25=m
+CONFIG_ZONE_DMA_FLAG=1
--- linux-mvl-dove-2.6.32.orig/debian.master/config/sparc/config.flavour.sparc64
+++ linux-mvl-dove-2.6.32/debian.master/config/sparc/config.flavour.sparc64
@@ -0,0 +1,4 @@
+#
+# Config options for config.flavour.sparc64 automatically generated by splitconfig.pl
+#
+# CONFIG_SMP is not set
--- linux-mvl-dove-2.6.32.orig/debian.master/config/sparc/config.flavour.sparc64-smp
+++ linux-mvl-dove-2.6.32/debian.master/config/sparc/config.flavour.sparc64-smp
@@ -0,0 +1,4 @@
+#
+# Config options for config.flavour.sparc64-smp automatically generated by splitconfig.pl
+#
+CONFIG_SMP=y
--- linux-mvl-dove-2.6.32.orig/debian.master/config/sparc/config.common.sparc
+++ linux-mvl-dove-2.6.32/debian.master/config/sparc/config.common.sparc
@@ -0,0 +1,302 @@
+#
+# Config options for config.common.sparc automatically generated by splitconfig.pl
+#
+CONFIG_ACCESSIBILITY=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_AIC79XX_DEBUG_ENABLE is not set
+# CONFIG_AIC79XX_REG_PRETTY_PRINT is not set
+CONFIG_ALIM7101_WDT=m
+# CONFIG_AMD8111_ETH is not set
+# CONFIG_AMIGA_PARTITION is not set
+CONFIG_ARCH_NO_VIRT_TO_BUS=y
+# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
+# CONFIG_ARCNET is not set
+CONFIG_ATA=m
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_BINARY_PRINTF=y
+CONFIG_BLK_DEV_FD=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_SR_VENDOR=y
+CONFIG_BONDING=m
+CONFIG_BRIDGE_NF_EBTABLES=m
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_BT is not set
+# CONFIG_CFG80211_REG_DEBUG is not set
+CONFIG_CGROUP_DEVICE=y
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_CPU_FREQ is not set
+# CONFIG_CPU_FREQ_PMAC64 is not set
+CONFIG_CRYPTO_DES=y
+CONFIG_CRYPTO_LZO=m
+# CONFIG_CRYPTO_TEST is not set
+# CONFIG_DAB is not set
+# CONFIG_DE2104X is not set
+# CONFIG_DE4X5 is not set
+CONFIG_DECNET_ROUTER=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
+# CONFIG_DEFXX is not set
+# CONFIG_DEV_APPLETALK is not set
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_DM9102 is not set
+CONFIG_DMADEVICES=y
+CONFIG_DRM=y
+# CONFIG_DVB_CORE is not set
+# CONFIG_ECONET is not set
+# CONFIG_EZX_PCAP is not set
+# CONFIG_FB_3DFX is not set
+# CONFIG_FB_ASILIANT is not set
+CONFIG_FB_ATY=y
+CONFIG_FB_ATY128=y
+# CONFIG_FB_CIRRUS is not set
+# CONFIG_FB_IMSTT is not set
+# CONFIG_FB_KYRO is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_MATROX is not set
+# CONFIG_FB_NEOMAGIC is not set
+CONFIG_FB_PM2=y
+# CONFIG_FB_PM2_FIFO_DISCONNECT is not set
+# CONFIG_FB_PS3 is not set
+# CONFIG_FB_RIVA is not set
+# CONFIG_FB_SIS is not set
+CONFIG_FB_SYS_COPYAREA=m
+CONFIG_FB_SYS_FILLRECT=m
+CONFIG_FB_SYS_FOPS=m
+CONFIG_FB_SYS_IMAGEBLIT=m
+# CONFIG_FB_TRIDENT is not set
+# CONFIG_FB_VOODOO1 is not set
+# CONFIG_FLATMEM_MANUAL is not set
+# CONFIG_FORCEDETH is not set
+CONFIG_FUSION_MAX_SGE=40
+# CONFIG_GAMEPORT is not set
+# CONFIG_GELIC_NET is not set
+CONFIG_GPIO_SYSFS=y
+# CONFIG_HAMACHI is not set
+# CONFIG_HAMRADIO is not set
+CONFIG_HAPPYMEAL=y
+CONFIG_HAVE_SETUP_PER_CPU_AREA=y
+# CONFIG_HIPPI is not set
+# CONFIG_HP100 is not set
+# CONFIG_HP_ILO is not set
+CONFIG_HUGETLB_PAGE=y
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+CONFIG_I2C_GPIO=m
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+# CONFIG_I2C_VOODOO3 is not set
+# CONFIG_IDE is not set
+CONFIG_IEEE1394_PCILYNX=m
+# CONFIG_IKCONFIG is not set
+CONFIG_INET6_AH=m
+CONFIG_INET6_ESP=m
+CONFIG_INET6_IPCOMP=m
+CONFIG_INET6_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
+CONFIG_INET6_XFRM_TUNNEL=m
+CONFIG_INFINIBAND_AMSO1100=m
+CONFIG_INFINIBAND_IPATH=m
+CONFIG_INFINIBAND_IPOIB_CM=y
+CONFIG_INFINIBAND_ISER=m
+CONFIG_INFINIBAND_SRP=m
+CONFIG_INFINIBAND_USER_ACCESS=m
+CONFIG_INFINIBAND_USER_MAD=m
+CONFIG_INFTL=m
+# CONFIG_INPUT_EVBUG is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_UINPUT is not set
+CONFIG_IP1000=m
+CONFIG_IPMI_HANDLER=m
+# CONFIG_IPMI_POWEROFF is not set
+CONFIG_IPV6_PRIVACY=y
+CONFIG_IPV6_TUNNEL=m
+CONFIG_IP_DCCP=m
+CONFIG_IP_NF_QUEUE=m
+CONFIG_IP_PNP=y
+# CONFIG_IP_ROUTE_MULTIPATH is not set
+# CONFIG_IP_ROUTE_VERBOSE is not set
+# CONFIG_IRDA is not set
+CONFIG_ISDN=y
+CONFIG_ISDN_DRV_GIGASET=m
+CONFIG_KERNEL_START=0xc0000000
+# CONFIG_KEYBOARD_NEWTON is not set
+CONFIG_KEYBOARD_SUNKBD=y
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KGDB is not set
+# CONFIG_LAPB is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_LDM_PARTITION is not set
+CONFIG_LEDS_CLASS=m
+CONFIG_LEDS_PCA9532=m
+CONFIG_LEDS_PCA955X=m
+# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LLC=m
+CONFIG_LOG_BUF_SHIFT=17
+CONFIG_LZO_COMPRESS=m
+CONFIG_LZO_DECOMPRESS=m
+# CONFIG_MAC80211_MESH is not set
+CONFIG_MACVLAN=m
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MARKERS=y
+CONFIG_MFD_SM501_GPIO=y
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_MMIO_NVRAM is not set
+CONFIG_MOUSE_SERIAL=y
+# CONFIG_MOUSE_VSXXXAA is not set
+CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
+CONFIG_NCPFS_SMALLDOS=y
+CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y
+# CONFIG_NET_IPGRE is not set
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NIU=m
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NODES_SHIFT=4
+CONFIG_NR_CPUS=256
+# CONFIG_OSF_PARTITION is not set
+CONFIG_PAGE_OFFSET=0xc0000000
+# CONFIG_PCI_MSI is not set
+CONFIG_PHYS_ADDR_T_64BIT=y
+# CONFIG_PMAC_SMU is not set
+# CONFIG_PPC64 is not set
+# CONFIG_PPC_970_NAP is not set
+# CONFIG_PPC_CELL is not set
+# CONFIG_PPC_HAS_HASH_64K is not set
+CONFIG_PPC_INDIRECT_PCI=y
+# CONFIG_PPC_MAPLE is not set
+# CONFIG_PPC_MM_SLICES is not set
+CONFIG_PPC_MPC106=y
+# CONFIG_PPC_PASEMI is not set
+# CONFIG_PPC_PS3 is not set
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PRISM54 is not set
+# CONFIG_PROFILING is not set
+# CONFIG_PS3_VRAM is not set
+# CONFIG_QFMT_V1 is not set
+# CONFIG_R8169 is not set
+CONFIG_RCU_FANOUT=64
+CONFIG_RDS=m
+# CONFIG_RISCOM8 is not set
+# CONFIG_RTAS_ERROR_LOGGING is not set
+CONFIG_RTC_DRV_BQ4802=y
+CONFIG_RTC_DRV_CMOS=y
+CONFIG_RTC_DRV_M48T59=y
+# CONFIG_RTC_DRV_PS3 is not set
+CONFIG_RTC_DRV_TEST=m
+CONFIG_SATA_SVW=m
+# CONFIG_SCHEDSTATS is not set
+CONFIG_SCHED_HRTICK=y
+CONFIG_SCSI=m
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_LPFC_DEBUG_FS is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_VIA686A is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83L785TS is not set
+CONFIG_SERIAL_8250_DETECT_IRQ=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_CORE=y
+# CONFIG_SERIO_PARKBD is not set
+CONFIG_SERIO_PCIPS2=y
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_SLIP_MODE_SLIP6 is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+CONFIG_SPARSEMEM_MANUAL=y
+# CONFIG_SPECIALIX is not set
+CONFIG_STAGING_EXCLUDE_BUILD=y
+CONFIG_SUNDANCE_MMIO=y
+CONFIG_SUNGEM=y
+# CONFIG_TABLET_USB_WACOM is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERM_PM72 is not set
+CONFIG_TPS65010=m
+# CONFIG_TR is not set
+CONFIG_TULIP_NAPI=y
+CONFIG_UBIFS_FS=m
+CONFIG_UFS_FS=m
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+CONFIG_USB=m
+CONFIG_USB_EHCI_HCD=m
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DUALSPEED=y
+# CONFIG_USB_GADGET_GOKU is not set
+CONFIG_USB_GADGET_NET2280=y
+# CONFIG_USB_HIDDEV is not set
+# CONFIG_USB_IBMCAM is not set
+# CONFIG_USB_KONICAWC is not set
+CONFIG_USB_MON=m
+CONFIG_USB_NET2280=y
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_HCD=m
+# CONFIG_USB_PWC is not set
+# CONFIG_USB_QUICKCAM_MESSENGER is not set
+# CONFIG_USB_SE401 is not set
+# CONFIG_USB_STV680 is not set
+CONFIG_USB_UHCI_HCD=m
+# CONFIG_USB_VICAM is not set
+# CONFIG_VIDEO_ADV7170 is not set
+# CONFIG_VIDEO_ADV7175 is not set
+# CONFIG_VIDEO_BT819 is not set
+# CONFIG_VIDEO_BT848 is not set
+# CONFIG_VIDEO_BT856 is not set
+# CONFIG_VIDEO_BT866 is not set
+# CONFIG_VIDEO_BWQCAM is not set
+# CONFIG_VIDEO_CPIA is not set
+# CONFIG_VIDEO_CPIA2 is not set
+# CONFIG_VIDEO_CQCAM is not set
+# CONFIG_VIDEO_CS5345 is not set
+# CONFIG_VIDEO_CX88 is not set
+# CONFIG_VIDEO_EM28XX is not set
+# CONFIG_VIDEO_IVTV is not set
+# CONFIG_VIDEO_KS0127 is not set
+# CONFIG_VIDEO_M52790 is not set
+# CONFIG_VIDEO_OVCAMCHIP is not set
+# CONFIG_VIDEO_SAA5249 is not set
+# CONFIG_VIDEO_SAA7110 is not set
+# CONFIG_VIDEO_SAA7185 is not set
+# CONFIG_VIDEO_SAA7191 is not set
+# CONFIG_VIDEO_TDA7432 is not set
+# CONFIG_VIDEO_TDA9875 is not set
+# CONFIG_VIDEO_TVAUDIO is not set
+# CONFIG_VIDEO_VPX3220 is not set
+# CONFIG_VIDEO_W9966 is not set
+# CONFIG_WAN is not set
+# CONFIG_WAN_ROUTER is not set
+CONFIG_WATCHDOG_NOWAYOUT=y
+CONFIG_WORD_SIZE=32
+# CONFIG_X25 is not set
+CONFIG_ZONE_DMA_FLAG=0
--- linux-mvl-dove-2.6.32.orig/debian.master/config/amd64/config.common.amd64
+++ linux-mvl-dove-2.6.32/debian.master/config/amd64/config.common.amd64
@@ -0,0 +1,164 @@
+#
+# Config options for config.common.amd64 automatically generated by splitconfig.pl
+#
+CONFIG_64BIT=y
+CONFIG_ACPI_BLACKLIST_YEAR=0
+CONFIG_AGP=y
+CONFIG_AGP_AMD64=y
+CONFIG_ARCH_DEFCONFIG="arch/x86/configs/x86_64_defconfig"
+CONFIG_ARCH_PHYS_ADDR_T_64BIT=y
+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+CONFIG_ARCH_SPARSEMEM_DEFAULT=y
+CONFIG_ARCH_SUPPORTS_MSI=y
+# CONFIG_ASYNC_TX_DMA is not set
+CONFIG_ATALK=m
+CONFIG_ATM=m
+CONFIG_AUDIT_ARCH=y
+CONFIG_B43=m
+CONFIG_B43LEGACY=m
+CONFIG_B44=m
+CONFIG_BT=m
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_CDROM_PKTCDVD=y
+CONFIG_COMEDI=m
+CONFIG_DEFAULT_MMAP_MIN_ADDR=65536
+CONFIG_DRM_RADEON=m
+CONFIG_FB_BOOT_VESA_SUPPORT=y
+CONFIG_FB_S1D13XXX=m
+CONFIG_FB_SAVAGE=m
+# CONFIG_FLATMEM_MANUAL is not set
+# CONFIG_FONTS is not set
+CONFIG_FRAMEBUFFER_CONSOLE=m
+CONFIG_FSAM7400=m
+CONFIG_FTL=m
+CONFIG_GAMEPORT=m
+CONFIG_GENERIC_CPU=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+# CONFIG_HAVE_AOUT is not set
+CONFIG_HAVE_CPUMASK_OF_CPU_MAP=y
+# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_HUGETLB_PAGE=y
+CONFIG_HWMON=y
+# CONFIG_HZ_250 is not set
+CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
+CONFIG_INPUT_JOYDEV=m
+CONFIG_INPUT_JOYSTICK=y
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_IOMMU_API=y
+CONFIG_IOMMU_HELPER=y
+CONFIG_IPMI_HANDLER=m
+CONFIG_IRDA=m
+CONFIG_ISDN=y
+CONFIG_KEYBOARD_LKKBD=m
+CONFIG_KEYBOARD_NEWTON=m
+CONFIG_KEYBOARD_SUNKBD=m
+CONFIG_KEYBOARD_XTKBD=m
+# CONFIG_KTIME_SCALAR is not set
+CONFIG_LAPB=m
+CONFIG_LCD_ILI9320=m
+CONFIG_LLC2=m
+CONFIG_LOG_BUF_SHIFT=18
+# CONFIG_M486 is not set
+# CONFIG_M586 is not set
+# CONFIG_M586TSC is not set
+CONFIG_MII=m
+CONFIG_MMC_BLOCK=m
+CONFIG_MOUSE_PS2=m
+CONFIG_MOUSE_VSXXXAA=m
+CONFIG_MTD=m
+CONFIG_MTD_ABSENT=m
+CONFIG_MTD_BLKDEVS=m
+CONFIG_MTD_BLOCK=m
+CONFIG_MTD_CFI=m
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_CFI_AMDSTD=m
+CONFIG_MTD_CFI_INTELEXT=m
+CONFIG_MTD_CFI_STAA=m
+CONFIG_MTD_CFI_UTIL=m
+CONFIG_MTD_CHAR=m
+CONFIG_MTD_COMPLEX_MAPPINGS=y
+CONFIG_MTD_CONCAT=m
+CONFIG_MTD_DOC2000=m
+CONFIG_MTD_DOC2001=m
+CONFIG_MTD_DOC2001PLUS=m
+CONFIG_MTD_GEN_PROBE=m
+CONFIG_MTD_JEDECPROBE=m
+CONFIG_MTD_MTDRAM=m
+CONFIG_MTD_NAND=m
+CONFIG_MTD_ONENAND=m
+CONFIG_MTD_PHRAM=m
+CONFIG_MTD_PHYSMAP=m
+CONFIG_MTD_PLATRAM=m
+CONFIG_MTD_RAM=m
+CONFIG_MTD_REDBOOT_PARTS=m
+CONFIG_MTD_ROM=m
+CONFIG_MTD_SLRAM=m
+CONFIG_NDISWRAPPER=m
+CONFIG_NFTL=m
+CONFIG_NO_HZ=y
+CONFIG_OUTPUT_FORMAT="elf64-x86-64"
+CONFIG_PARPORT=m
+CONFIG_PCCARD=m
+CONFIG_PHYSICAL_ALIGN=0x1000000
+CONFIG_PHYSICAL_START=0x200000
+CONFIG_PHYS_ADDR_T_64BIT=y
+CONFIG_PM_DEBUG=y
+CONFIG_POCH=m
+CONFIG_R3964=m
+CONFIG_RAID_ATTRS=m
+CONFIG_RCU_FANOUT=64
+# CONFIG_REGULATOR_DEBUG is not set
+CONFIG_RFD_FTL=m
+CONFIG_RPCSEC_GSS_SPKM3=m
+# CONFIG_RWSEM_GENERIC_SPINLOCK is not set
+CONFIG_SCSI_ACARD=m
+CONFIG_SCSI_ADVANSYS=m
+CONFIG_SCSI_OSD_INITIATOR=m
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_NR_UARTS=48
+CONFIG_SERIAL_8250_PCI=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+CONFIG_SND_ALI5451=m
+CONFIG_SND_EMU10K1_SEQ=m
+CONFIG_SND_MPU401=m
+CONFIG_SND_MTPAV=m
+CONFIG_SND_OPL3_LIB_SEQ=m
+# CONFIG_SND_OPL4_LIB_SEQ is not set
+CONFIG_SND_RAWMIDI_SEQ=m
+# CONFIG_SND_SBAWE_SEQ is not set
+CONFIG_SND_SEQUENCER=m
+CONFIG_SND_SERIAL_U16550=m
+CONFIG_SPARSEMEM_MANUAL=y
+CONFIG_SPI=y
+CONFIG_SSB_B43_PCI_BRIDGE=y
+# CONFIG_STANDALONE is not set
+CONFIG_SUNGEM=m
+CONFIG_SYS_HYPERVISOR=y
+CONFIG_TCG_TPM=m
+CONFIG_TCP_CONG_ADVANCED=y
+CONFIG_TIPC=m
+CONFIG_UNIXWARE_DISKLABEL=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_GADGET=m
+CONFIG_USB_ISP1362_HCD=m
+CONFIG_USB_MON=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_UHCI_HCD=y
+CONFIG_VIDEO_DEV=m
+CONFIG_VME_CA91CX42=m
+CONFIG_VME_TSI148=m
+CONFIG_VT6656=m
+CONFIG_WAN=y
+CONFIG_WAN_ROUTER=m
+CONFIG_WATCHDOG=y
+CONFIG_X25=m
+# CONFIG_X86_32 is not set
+CONFIG_X86_64=y
+CONFIG_X86_L1_CACHE_SHIFT=6
+CONFIG_X86_MINIMUM_CPU_FAMILY=64
+CONFIG_X86_SPEEDSTEP_LIB=m
+CONFIG_ZONE_DMA32=y
+CONFIG_ZONE_DMA_FLAG=1
--- linux-mvl-dove-2.6.32.orig/debian.master/config/amd64/config.flavour.server
+++ linux-mvl-dove-2.6.32/debian.master/config/amd64/config.flavour.server
@@ -0,0 +1,21 @@
+#
+# Config options for config.flavour.server automatically generated by splitconfig.pl
+#
+# CONFIG_DEFAULT_CFQ is not set
+CONFIG_DEFAULT_DEADLINE=y
+CONFIG_DEFAULT_IOSCHED="deadline"
+CONFIG_HZ=100
+CONFIG_HZ_100=y
+# CONFIG_HZ_1000 is not set
+CONFIG_MEMORY_HOTPLUG=y
+CONFIG_NR_CPUS=256
+# CONFIG_PREEMPT is not set
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_SCSI_SPI_ATTRS=y
+CONFIG_SCSI_SYM53C8XX_2=y
+CONFIG_VIRTIO=y
+CONFIG_VIRTIO_BLK=y
+CONFIG_VIRTIO_NET=y
+CONFIG_VIRTIO_PCI=y
+CONFIG_VIRTIO_RING=y
--- linux-mvl-dove-2.6.32.orig/debian.master/config/amd64/config.flavour.generic
+++ linux-mvl-dove-2.6.32/debian.master/config/amd64/config.flavour.generic
@@ -0,0 +1,21 @@
+#
+# Config options for config.flavour.generic automatically generated by splitconfig.pl
+#
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+CONFIG_HZ=100
+CONFIG_HZ_100=y
+# CONFIG_HZ_1000 is not set
+# CONFIG_MEMORY_HOTPLUG is not set
+CONFIG_NR_CPUS=64
+# CONFIG_PREEMPT is not set
+# CONFIG_PREEMPT_NONE is not set
+CONFIG_PREEMPT_VOLUNTARY=y
+CONFIG_SCSI_SPI_ATTRS=m
+CONFIG_SCSI_SYM53C8XX_2=m
+CONFIG_VIRTIO=m
+CONFIG_VIRTIO_BLK=m
+CONFIG_VIRTIO_NET=m
+CONFIG_VIRTIO_PCI=m
+CONFIG_VIRTIO_RING=m
--- linux-mvl-dove-2.6.32.orig/debian.master/config/amd64/config.flavour.preempt
+++ linux-mvl-dove-2.6.32/debian.master/config/amd64/config.flavour.preempt
@@ -0,0 +1,21 @@
+#
+# Config options for config.flavour.preempt automatically generated by splitconfig.pl
+#
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+CONFIG_HZ=1000
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_1000=y
+# CONFIG_MEMORY_HOTPLUG is not set
+CONFIG_NR_CPUS=64
+CONFIG_PREEMPT=y
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_SCSI_SPI_ATTRS=m
+CONFIG_SCSI_SYM53C8XX_2=m
+CONFIG_VIRTIO=m
+CONFIG_VIRTIO_BLK=m
+CONFIG_VIRTIO_NET=m
+CONFIG_VIRTIO_PCI=m
+CONFIG_VIRTIO_RING=m
--- linux-mvl-dove-2.6.32.orig/debian.master/config/i386/config.flavour.generic
+++ linux-mvl-dove-2.6.32/debian.master/config/i386/config.flavour.generic
@@ -0,0 +1,23 @@
+#
+# Config options for config.flavour.generic automatically generated by splitconfig.pl
+#
+# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+CONFIG_HIGHMEM4G=y
+# CONFIG_HIGHMEM64G is not set
+# CONFIG_M486 is not set
+CONFIG_M586=y
+# CONFIG_M586TSC is not set
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_SCSI_SPI_ATTRS=m
+CONFIG_SCSI_SYM53C8XX_2=m
+# CONFIG_SYS_HYPERVISOR is not set
+CONFIG_VIRTIO=m
+CONFIG_VIRTIO_BLK=m
+CONFIG_VIRTIO_NET=m
+CONFIG_VIRTIO_PCI=m
+CONFIG_VIRTIO_RING=m
+CONFIG_X86_L1_CACHE_SHIFT=5
+CONFIG_X86_MINIMUM_CPU_FAMILY=4
--- linux-mvl-dove-2.6.32.orig/debian.master/config/i386/config.common.i386
+++ linux-mvl-dove-2.6.32/debian.master/config/i386/config.common.i386
@@ -0,0 +1,163 @@
+#
+# Config options for config.common.i386 automatically generated by splitconfig.pl
+#
+# CONFIG_64BIT is not set
+CONFIG_ACPI_BLACKLIST_YEAR=2000
+CONFIG_AGP=m
+CONFIG_AGP_AMD64=m
+CONFIG_ARCH_DEFCONFIG="arch/x86/configs/i386_defconfig"
+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+CONFIG_ARCH_SUPPORTS_MSI=y
+CONFIG_ASYNC_TX_DMA=y
+CONFIG_ATALK=m
+CONFIG_ATM=m
+# CONFIG_AUDIT_ARCH is not set
+CONFIG_B43=m
+CONFIG_B43LEGACY=m
+CONFIG_B44=m
+CONFIG_BT=m
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_CDROM_PKTCDVD=y
+CONFIG_COMEDI=m
+CONFIG_DEFAULT_MMAP_MIN_ADDR=65536
+CONFIG_DRM_RADEON=m
+CONFIG_FB_BOOT_VESA_SUPPORT=y
+CONFIG_FB_S1D13XXX=m
+CONFIG_FB_SAVAGE=m
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_FONTS is not set
+CONFIG_FRAMEBUFFER_CONSOLE=m
+CONFIG_FSAM7400=m
+CONFIG_FTL=m
+CONFIG_GAMEPORT=m
+# CONFIG_GENERIC_CPU is not set
+# CONFIG_GENERIC_TIME_VSYSCALL is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_HAVE_CPUMASK_OF_CPU_MAP is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_HUGETLB_PAGE=y
+CONFIG_HWMON=y
+CONFIG_HZ=250
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ_250=y
+CONFIG_ILLEGAL_POINTER_VALUE=0
+CONFIG_INPUT_JOYDEV=m
+CONFIG_INPUT_JOYSTICK=y
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_IOMMU_API is not set
+# CONFIG_IOMMU_HELPER is not set
+CONFIG_IPMI_HANDLER=m
+CONFIG_IRDA=m
+CONFIG_ISDN=y
+CONFIG_KEYBOARD_LKKBD=m
+CONFIG_KEYBOARD_NEWTON=m
+CONFIG_KEYBOARD_SUNKBD=m
+CONFIG_KEYBOARD_XTKBD=m
+CONFIG_KTIME_SCALAR=y
+CONFIG_LAPB=m
+CONFIG_LCD_ILI9320=m
+CONFIG_LLC2=m
+CONFIG_LOG_BUF_SHIFT=17
+CONFIG_MII=m
+CONFIG_MMC_BLOCK=m
+CONFIG_MOUSE_PS2=m
+CONFIG_MOUSE_VSXXXAA=m
+CONFIG_MTD=m
+CONFIG_MTD_ABSENT=m
+CONFIG_MTD_BLKDEVS=m
+CONFIG_MTD_BLOCK=m
+CONFIG_MTD_CFI=m
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_CFI_AMDSTD=m
+CONFIG_MTD_CFI_INTELEXT=m
+CONFIG_MTD_CFI_STAA=m
+CONFIG_MTD_CFI_UTIL=m
+CONFIG_MTD_CHAR=m
+CONFIG_MTD_COMPLEX_MAPPINGS=y
+CONFIG_MTD_CONCAT=m
+CONFIG_MTD_DOC2000=m
+CONFIG_MTD_DOC2001=m
+CONFIG_MTD_DOC2001PLUS=m
+CONFIG_MTD_GEN_PROBE=m
+CONFIG_MTD_JEDECPROBE=m
+CONFIG_MTD_MTDRAM=m
+CONFIG_MTD_NAND=m
+CONFIG_MTD_ONENAND=m
+CONFIG_MTD_PHRAM=m
+CONFIG_MTD_PHYSMAP=m
+CONFIG_MTD_PLATRAM=m
+CONFIG_MTD_RAM=m
+CONFIG_MTD_REDBOOT_PARTS=m
+CONFIG_MTD_ROM=m
+CONFIG_MTD_SLRAM=m
+CONFIG_NDISWRAPPER=m
+CONFIG_NFTL=m
+CONFIG_NO_HZ=y
+CONFIG_NR_CPUS=8
+CONFIG_OUTPUT_FORMAT="elf32-i386"
+CONFIG_PARPORT=m
+CONFIG_PCCARD=m
+CONFIG_PHYSICAL_ALIGN=0x100000
+CONFIG_PHYSICAL_START=0x100000
+CONFIG_PM_DEBUG=y
+CONFIG_POCH=m
+# CONFIG_PREEMPT is not set
+# CONFIG_PREEMPT_NONE is not set
+CONFIG_PREEMPT_VOLUNTARY=y
+CONFIG_R3964=m
+CONFIG_RAID_ATTRS=m
+CONFIG_RCU_FANOUT=32
+CONFIG_REGULATOR_DEBUG=y
+CONFIG_RFD_FTL=m
+CONFIG_RPCSEC_GSS_SPKM3=m
+# CONFIG_RWSEM_GENERIC_SPINLOCK is not set
+CONFIG_SCSI_ACARD=m
+CONFIG_SCSI_ADVANSYS=m
+CONFIG_SCSI_NSP32=m
+CONFIG_SCSI_OSD_INITIATOR=m
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_NR_UARTS=48
+CONFIG_SERIAL_8250_PCI=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+CONFIG_SND_ALI5451=m
+CONFIG_SND_EMU10K1_SEQ=m
+CONFIG_SND_MPU401=m
+CONFIG_SND_MTPAV=m
+CONFIG_SND_OPL3_LIB_SEQ=m
+CONFIG_SND_OPL4_LIB_SEQ=m
+CONFIG_SND_RAWMIDI_SEQ=m
+CONFIG_SND_SBAWE_SEQ=m
+CONFIG_SND_SEQUENCER=m
+CONFIG_SND_SERIAL_U16550=m
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_SPI=y
+CONFIG_SSB_B43_PCI_BRIDGE=y
+# CONFIG_STANDALONE is not set
+CONFIG_SUNGEM=m
+CONFIG_TCG_TPM=m
+CONFIG_TCP_CONG_ADVANCED=y
+CONFIG_TIPC=m
+CONFIG_UNIXWARE_DISKLABEL=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_GADGET=m
+CONFIG_USB_ISP1362_HCD=m
+CONFIG_USB_MON=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_UHCI_HCD=y
+CONFIG_VIDEO_DEV=m
+CONFIG_VME_CA91CX42=m
+CONFIG_VME_TSI148=m
+CONFIG_VT6656=m
+CONFIG_WAN=y
+CONFIG_WAN_ROUTER=m
+CONFIG_WATCHDOG=y
+CONFIG_X25=m
+CONFIG_X86_32=y
+# CONFIG_X86_64 is not set
+CONFIG_X86_SPEEDSTEP_LIB=y
+# CONFIG_ZONE_DMA32 is not set
+CONFIG_ZONE_DMA_FLAG=1
--- linux-mvl-dove-2.6.32.orig/debian.master/config/i386/config.flavour.generic-pae
+++ linux-mvl-dove-2.6.32/debian.master/config/i386/config.flavour.generic-pae
@@ -0,0 +1,23 @@
+#
+# Config options for config.flavour.generic-pae automatically generated by splitconfig.pl
+#
+CONFIG_ARCH_PHYS_ADDR_T_64BIT=y
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_HIGHMEM4G is not set
+CONFIG_HIGHMEM64G=y
+# CONFIG_M486 is not set
+# CONFIG_M586 is not set
+CONFIG_M586TSC=y
+CONFIG_PHYS_ADDR_T_64BIT=y
+CONFIG_SCSI_SPI_ATTRS=y
+CONFIG_SCSI_SYM53C8XX_2=y
+CONFIG_SYS_HYPERVISOR=y
+CONFIG_VIRTIO=y
+CONFIG_VIRTIO_BLK=y
+CONFIG_VIRTIO_NET=y
+CONFIG_VIRTIO_PCI=y
+CONFIG_VIRTIO_RING=y
+CONFIG_X86_L1_CACHE_SHIFT=5
+CONFIG_X86_MINIMUM_CPU_FAMILY=5
--- linux-mvl-dove-2.6.32.orig/debian.master/config/i386/config.flavour.386
+++ linux-mvl-dove-2.6.32/debian.master/config/i386/config.flavour.386
@@ -0,0 +1,23 @@
+#
+# Config options for config.flavour.386 automatically generated by splitconfig.pl
+#
+# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
+# CONFIG_DEFAULT_CFQ is not set
+CONFIG_DEFAULT_DEADLINE=y
+CONFIG_DEFAULT_IOSCHED="deadline"
+CONFIG_HIGHMEM4G=y
+# CONFIG_HIGHMEM64G is not set
+CONFIG_M486=y
+# CONFIG_M586 is not set
+# CONFIG_M586TSC is not set
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_SCSI_SPI_ATTRS=m
+CONFIG_SCSI_SYM53C8XX_2=m
+# CONFIG_SYS_HYPERVISOR is not set
+CONFIG_VIRTIO=m
+CONFIG_VIRTIO_BLK=m
+CONFIG_VIRTIO_NET=m
+CONFIG_VIRTIO_PCI=m
+CONFIG_VIRTIO_RING=m
+CONFIG_X86_L1_CACHE_SHIFT=4
+CONFIG_X86_MINIMUM_CPU_FAMILY=4
--- linux-mvl-dove-2.6.32.orig/debian.master/config/lpia/config.flavour.lpia
+++ linux-mvl-dove-2.6.32/debian.master/config/lpia/config.flavour.lpia
@@ -0,0 +1,3 @@
+#
+# Config options for config.flavour.lpia automatically generated by splitconfig.pl
+#
--- linux-mvl-dove-2.6.32.orig/debian.master/config/lpia/config.common.lpia
+++ linux-mvl-dove-2.6.32/debian.master/config/lpia/config.common.lpia
@@ -0,0 +1,183 @@
+#
+# Config options for config.common.lpia automatically generated by splitconfig.pl
+#
+# CONFIG_64BIT is not set
+CONFIG_ACPI_BLACKLIST_YEAR=2000
+CONFIG_AGP=m
+CONFIG_AGP_AMD64=m
+CONFIG_ARCH_DEFCONFIG="arch/x86/configs/i386_defconfig"
+# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+CONFIG_ARCH_SUPPORTS_MSI=y
+CONFIG_ASYNC_TX_DMA=y
+CONFIG_ATALK=m
+CONFIG_ATM=m
+# CONFIG_AUDIT_ARCH is not set
+CONFIG_B43=m
+CONFIG_B43LEGACY=m
+CONFIG_B44=m
+CONFIG_BT=m
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_CDROM_PKTCDVD=y
+CONFIG_COMEDI=m
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+CONFIG_DEFAULT_MMAP_MIN_ADDR=65536
+CONFIG_DRM_RADEON=m
+CONFIG_FB_BOOT_VESA_SUPPORT=y
+CONFIG_FB_S1D13XXX=m
+CONFIG_FB_SAVAGE=m
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_FONTS is not set
+CONFIG_FRAMEBUFFER_CONSOLE=m
+CONFIG_FSAM7400=m
+CONFIG_FTL=m
+CONFIG_GAMEPORT=m
+# CONFIG_GENERIC_CPU is not set
+# CONFIG_GENERIC_TIME_VSYSCALL is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_HAVE_CPUMASK_OF_CPU_MAP is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_HIGHMEM4G=y
+# CONFIG_HIGHMEM64G is not set
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_HUGETLB_PAGE=y
+CONFIG_HWMON=y
+CONFIG_HZ=250
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ_250=y
+CONFIG_ILLEGAL_POINTER_VALUE=0
+CONFIG_INPUT_JOYDEV=m
+CONFIG_INPUT_JOYSTICK=y
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_IOMMU_API is not set
+# CONFIG_IOMMU_HELPER is not set
+CONFIG_IPMI_HANDLER=m
+CONFIG_IRDA=m
+CONFIG_ISDN=y
+CONFIG_KEYBOARD_LKKBD=m
+CONFIG_KEYBOARD_NEWTON=m
+CONFIG_KEYBOARD_SUNKBD=m
+CONFIG_KEYBOARD_XTKBD=m
+CONFIG_KTIME_SCALAR=y
+CONFIG_LAPB=m
+CONFIG_LCD_ILI9320=m
+CONFIG_LLC2=m
+CONFIG_LOG_BUF_SHIFT=17
+# CONFIG_M486 is not set
+CONFIG_M586=y
+# CONFIG_M586TSC is not set
+CONFIG_MII=m
+CONFIG_MMC_BLOCK=m
+CONFIG_MOUSE_PS2=m
+CONFIG_MOUSE_VSXXXAA=m
+CONFIG_MTD=m
+CONFIG_MTD_ABSENT=m
+CONFIG_MTD_BLKDEVS=m
+CONFIG_MTD_BLOCK=m
+CONFIG_MTD_CFI=m
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_CFI_AMDSTD=m
+CONFIG_MTD_CFI_INTELEXT=m
+CONFIG_MTD_CFI_STAA=m
+CONFIG_MTD_CFI_UTIL=m
+CONFIG_MTD_CHAR=m
+CONFIG_MTD_COMPLEX_MAPPINGS=y
+CONFIG_MTD_CONCAT=m
+CONFIG_MTD_DOC2000=m
+CONFIG_MTD_DOC2001=m
+CONFIG_MTD_DOC2001PLUS=m
+CONFIG_MTD_GEN_PROBE=m
+CONFIG_MTD_JEDECPROBE=m
+CONFIG_MTD_MTDRAM=m
+CONFIG_MTD_NAND=m
+CONFIG_MTD_ONENAND=m
+CONFIG_MTD_PHRAM=m
+CONFIG_MTD_PHYSMAP=m
+CONFIG_MTD_PLATRAM=m
+CONFIG_MTD_RAM=m
+CONFIG_MTD_REDBOOT_PARTS=m
+CONFIG_MTD_ROM=m
+CONFIG_MTD_SLRAM=m
+CONFIG_NDISWRAPPER=m
+CONFIG_NFTL=m
+CONFIG_NO_HZ=y
+CONFIG_NR_CPUS=8
+CONFIG_OUTPUT_FORMAT="elf32-i386"
+CONFIG_PARPORT=m
+CONFIG_PCCARD=m
+CONFIG_PHYSICAL_ALIGN=0x100000
+CONFIG_PHYSICAL_START=0x100000
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_PM_DEBUG=y
+CONFIG_POCH=m
+# CONFIG_PREEMPT is not set
+# CONFIG_PREEMPT_NONE is not set
+CONFIG_PREEMPT_VOLUNTARY=y
+CONFIG_R3964=m
+CONFIG_RAID_ATTRS=m
+CONFIG_RCU_FANOUT=32
+CONFIG_REGULATOR_DEBUG=y
+CONFIG_RFD_FTL=m
+CONFIG_RPCSEC_GSS_SPKM3=m
+# CONFIG_RWSEM_GENERIC_SPINLOCK is not set
+CONFIG_SCSI_ACARD=m
+CONFIG_SCSI_ADVANSYS=m
+CONFIG_SCSI_NSP32=m
+CONFIG_SCSI_OSD_INITIATOR=m
+CONFIG_SCSI_SPI_ATTRS=m
+CONFIG_SCSI_SYM53C8XX_2=m
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_NR_UARTS=48
+CONFIG_SERIAL_8250_PCI=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+CONFIG_SND_ALI5451=m
+CONFIG_SND_EMU10K1_SEQ=m
+CONFIG_SND_MPU401=m
+CONFIG_SND_MTPAV=m
+CONFIG_SND_OPL3_LIB_SEQ=m
+CONFIG_SND_OPL4_LIB_SEQ=m
+CONFIG_SND_RAWMIDI_SEQ=m
+CONFIG_SND_SBAWE_SEQ=m
+CONFIG_SND_SEQUENCER=m
+CONFIG_SND_SERIAL_U16550=m
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_SPI=y
+CONFIG_SSB_B43_PCI_BRIDGE=y
+# CONFIG_STANDALONE is not set
+CONFIG_SUNGEM=m
+# CONFIG_SYS_HYPERVISOR is not set
+CONFIG_TCG_TPM=m
+CONFIG_TCP_CONG_ADVANCED=y
+CONFIG_TIPC=m
+CONFIG_UNIXWARE_DISKLABEL=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_GADGET=m
+CONFIG_USB_ISP1362_HCD=m
+CONFIG_USB_MON=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_UHCI_HCD=y
+CONFIG_VIDEO_DEV=m
+CONFIG_VIRTIO=m
+CONFIG_VIRTIO_BLK=m
+CONFIG_VIRTIO_NET=m
+CONFIG_VIRTIO_PCI=m
+CONFIG_VIRTIO_RING=m
+CONFIG_VME_CA91CX42=m
+CONFIG_VME_TSI148=m
+CONFIG_VT6656=m
+CONFIG_WAN=y
+CONFIG_WAN_ROUTER=m
+CONFIG_WATCHDOG=y
+CONFIG_X25=m
+CONFIG_X86_32=y
+# CONFIG_X86_64 is not set
+CONFIG_X86_L1_CACHE_SHIFT=5
+CONFIG_X86_MINIMUM_CPU_FAMILY=4
+CONFIG_X86_SPEEDSTEP_LIB=y
+# CONFIG_ZONE_DMA32 is not set
+CONFIG_ZONE_DMA_FLAG=1
--- linux-mvl-dove-2.6.32.orig/debian.master/config/armel/config.common.armel
+++ linux-mvl-dove-2.6.32/debian.master/config/armel/config.common.armel
@@ -0,0 +1,151 @@
+#
+# Config options for config.common.armel automatically generated by splitconfig.pl
+#
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_ATALK is not set
+# CONFIG_ATM is not set
+# CONFIG_B43 is not set
+# CONFIG_B43LEGACY is not set
+# CONFIG_B44 is not set
+# CONFIG_BT is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_COMEDI is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
+# CONFIG_DRM_RADEON is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_SAVAGE is not set
+CONFIG_FLATMEM_MANUAL=y
+CONFIG_FONTS=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FSAM7400 is not set
+# CONFIG_FTL is not set
+# CONFIG_GAMEPORT is not set
+CONFIG_HAVE_AOUT=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+# CONFIG_HIGH_RES_TIMERS is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_HWMON is not set
+CONFIG_HZ=100
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_IRDA is not set
+# CONFIG_ISDN is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_LAPB is not set
+# CONFIG_LCD_ILI9320 is not set
+# CONFIG_LLC2 is not set
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_MII=y
+CONFIG_MMC_BLOCK=y
+# CONFIG_MOUSE_PS2 is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+CONFIG_MTD=y
+# CONFIG_MTD_ABSENT is not set
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+CONFIG_MTD_CHAR=y
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_CONCAT is not set
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_JEDECPROBE is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_PHYSMAP is not set
+# CONFIG_MTD_PLATRAM is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_NDISWRAPPER is not set
+# CONFIG_NFTL is not set
+# CONFIG_NO_HZ is not set
+# CONFIG_PARPORT is not set
+# CONFIG_PCCARD is not set
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+# CONFIG_PM_DEBUG is not set
+# CONFIG_POCH is not set
+# CONFIG_PREEMPT is not set
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAID_ATTRS is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_REGULATOR_DEBUG is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_SCSI_NSP32 is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+CONFIG_SCSI_SPI_ATTRS=y
+CONFIG_SCSI_SYM53C8XX_2=y
+CONFIG_SERIAL_8250=m
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_PCI=m
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SND_ALI5451 is not set
+# CONFIG_SND_EMU10K1_SEQ is not set
+# CONFIG_SND_MPU401 is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_OPL3_LIB_SEQ is not set
+# CONFIG_SND_OPL4_LIB_SEQ is not set
+# CONFIG_SND_RAWMIDI_SEQ is not set
+# CONFIG_SND_SBAWE_SEQ is not set
+# CONFIG_SND_SEQUENCER is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+# CONFIG_SPI is not set
+# CONFIG_SSB_B43_PCI_BRIDGE is not set
+CONFIG_STANDALONE=y
+# CONFIG_SUNGEM is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
+# CONFIG_TIPC is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+CONFIG_USB=m
+CONFIG_USB_EHCI_HCD=m
+# CONFIG_USB_GADGET is not set
+# CONFIG_USB_ISP1362_HCD is not set
+CONFIG_USB_MON=m
+CONFIG_USB_OHCI_HCD=m
+CONFIG_USB_UHCI_HCD=m
+# CONFIG_VIDEO_DEV is not set
+CONFIG_VIRTIO=m
+CONFIG_VIRTIO_BLK=m
+CONFIG_VIRTIO_NET=m
+CONFIG_VIRTIO_PCI=m
+CONFIG_VIRTIO_RING=m
+# CONFIG_VME_CA91CX42 is not set
+# CONFIG_VME_TSI148 is not set
+# CONFIG_VT6656 is not set
+# CONFIG_WAN is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_X25 is not set
+CONFIG_ZONE_DMA_FLAG=0
--- linux-mvl-dove-2.6.32.orig/debian.master/config/armel/config.flavour.versatile
+++ linux-mvl-dove-2.6.32/debian.master/config/armel/config.flavour.versatile
@@ -0,0 +1,3 @@
+#
+# Config options for config.flavour.versatile automatically generated by splitconfig.pl
+#
--- linux-mvl-dove-2.6.32.orig/debian.master/config/ia64/config.common.ia64
+++ linux-mvl-dove-2.6.32/debian.master/config/ia64/config.common.ia64
@@ -0,0 +1,294 @@
+#
+# Config options for config.common.ia64 automatically generated by splitconfig.pl
+#
+CONFIG_ACCESSIBILITY=y
+CONFIG_ACORN_PARTITION=y
+CONFIG_AIC79XX_DEBUG_ENABLE=y
+CONFIG_AIC79XX_REG_PRETTY_PRINT=y
+# CONFIG_ALIM7101_WDT is not set
+CONFIG_AMD8111_ETH=m
+CONFIG_AMIGA_PARTITION=y
+# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
+CONFIG_ARCNET=m
+CONFIG_ATA=m
+CONFIG_ATARI_PARTITION=y
+CONFIG_ATA_NONSTANDARD=y
+# CONFIG_BINARY_PRINTF is not set
+CONFIG_BLK_DEV_LOOP=m
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+# CONFIG_BONDING is not set
+# CONFIG_BRIDGE_NF_EBTABLES is not set
+CONFIG_BSD_DISKLABEL=y
+CONFIG_BT=m
+# CONFIG_CFG80211_REG_DEBUG is not set
+# CONFIG_CGROUP_DEVICE is not set
+CONFIG_CHR_DEV_SCH=m
+CONFIG_CPU_FREQ=y
+# CONFIG_CPU_FREQ_PMAC64 is not set
+CONFIG_CRYPTO_DES=m
+CONFIG_CRYPTO_LZO=m
+CONFIG_CRYPTO_TEST=m
+CONFIG_DAB=y
+CONFIG_DE2104X=m
+CONFIG_DE4X5=m
+# CONFIG_DECNET_ROUTER is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=65536
+CONFIG_DEFXX=m
+CONFIG_DEV_APPLETALK=m
+CONFIG_DISCONTIGMEM_MANUAL=y
+CONFIG_DM9102=m
+CONFIG_DMADEVICES=y
+CONFIG_DRM=m
+CONFIG_DVB_CORE=m
+CONFIG_ECONET=m
+CONFIG_EZX_PCAP=y
+CONFIG_FB_3DFX=y
+CONFIG_FB_ASILIANT=y
+CONFIG_FB_ATY=m
+CONFIG_FB_ATY128=m
+CONFIG_FB_CIRRUS=m
+CONFIG_FB_IMSTT=y
+CONFIG_FB_KYRO=m
+# CONFIG_FB_MACMODES is not set
+CONFIG_FB_MATROX=y
+CONFIG_FB_NEOMAGIC=m
+CONFIG_FB_PM2=m
+CONFIG_FB_PM2_FIFO_DISCONNECT=y
+# CONFIG_FB_PS3 is not set
+CONFIG_FB_RIVA=m
+CONFIG_FB_SIS=m
+CONFIG_FB_SYS_COPYAREA=m
+CONFIG_FB_SYS_FILLRECT=m
+CONFIG_FB_SYS_FOPS=m
+CONFIG_FB_SYS_IMAGEBLIT=m
+CONFIG_FB_TRIDENT=m
+CONFIG_FB_VOODOO1=y
+# CONFIG_FLATMEM_MANUAL is not set
+CONFIG_FORCEDETH=m
+CONFIG_FORCE_MAX_ZONEORDER=17
+CONFIG_FUSION_MAX_SGE=128
+CONFIG_GAMEPORT=m
+# CONFIG_GELIC_NET is not set
+CONFIG_GENERIC_IOMAP=y
+CONFIG_HAMACHI=m
+CONFIG_HAMRADIO=y
+CONFIG_HAPPYMEAL=m
+CONFIG_HAVE_SETUP_PER_CPU_AREA=y
+CONFIG_HIPPI=y
+CONFIG_HP100=m
+CONFIG_HP_ILO=m
+CONFIG_HUGETLB_PAGE=y
+CONFIG_I2C_ALI1535=m
+CONFIG_I2C_ALI1563=m
+CONFIG_I2C_ALI15X3=m
+CONFIG_I2C_AMD756=m
+CONFIG_I2C_AMD8111=m
+CONFIG_I2C_I801=m
+CONFIG_I2C_NFORCE2=m
+CONFIG_I2C_SIS5595=m
+CONFIG_I2C_SIS630=m
+CONFIG_I2C_SIS96X=m
+CONFIG_I2C_VIA=m
+CONFIG_I2C_VIAPRO=m
+CONFIG_I2C_VOODOO3=m
+# CONFIG_IDE is not set
+# CONFIG_IEEE1394_PCILYNX is not set
+CONFIG_IKCONFIG=y
+# CONFIG_INET6_AH is not set
+# CONFIG_INET6_ESP is not set
+# CONFIG_INET6_IPCOMP is not set
+# CONFIG_INET6_TUNNEL is not set
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INFINIBAND_AMSO1100 is not set
+# CONFIG_INFINIBAND_IPATH is not set
+# CONFIG_INFINIBAND_IPOIB_CM is not set
+# CONFIG_INFINIBAND_ISER is not set
+# CONFIG_INFINIBAND_SRP is not set
+# CONFIG_INFINIBAND_USER_ACCESS is not set
+# CONFIG_INFINIBAND_USER_MAD is not set
+# CONFIG_INFTL is not set
+CONFIG_INPUT_EVBUG=m
+CONFIG_INPUT_JOYDEV=m
+CONFIG_INPUT_JOYSTICK=y
+CONFIG_INPUT_UINPUT=m
+# CONFIG_IP1000 is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_TUNNEL is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_NF_QUEUE is not set
+# CONFIG_IP_PNP is not set
+CONFIG_IP_ROUTE_MULTIPATH=y
+CONFIG_IP_ROUTE_VERBOSE=y
+CONFIG_IRDA=m
+CONFIG_ISDN=y
+# CONFIG_ISDN_DRV_GIGASET is not set
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_KEYBOARD_NEWTON=m
+CONFIG_KEYBOARD_SUNKBD=m
+CONFIG_KEYBOARD_XTKBD=m
+CONFIG_LAPB=m
+CONFIG_LDM_PARTITION=y
+CONFIG_LEDS_CLASS=m
+CONFIG_LEDS_PCA9532=m
+CONFIG_LEDS_PCA955X=m
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=m
+CONFIG_LEDS_TRIGGER_HEARTBEAT=m
+CONFIG_LEDS_TRIGGER_TIMER=m
+CONFIG_LLC=y
+CONFIG_LOG_BUF_SHIFT=20
+CONFIG_LZO_COMPRESS=m
+CONFIG_LZO_DECOMPRESS=m
+CONFIG_MAC80211_MESH=y
+# CONFIG_MACVLAN is not set
+CONFIG_MAC_PARTITION=y
+# CONFIG_MARKERS is not set
+CONFIG_MINIX_SUBPARTITION=y
+# CONFIG_MMIO_NVRAM is not set
+CONFIG_MOUSE_SERIAL=m
+CONFIG_MOUSE_VSXXXAA=m
+# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
+# CONFIG_NCPFS_SMALLDOS is not set
+CONFIG_NET_IPGRE=m
+CONFIG_NET_PKTGEN=m
+# CONFIG_NIU is not set
+CONFIG_NLS_DEFAULT="cp437"
+CONFIG_NODES_SHIFT=4
+CONFIG_NR_CPUS=4096
+CONFIG_OSF_PARTITION=y
+CONFIG_PAGE_OFFSET=0xc0000000
+# CONFIG_PCIEASPM is not set
+CONFIG_PCI_MSI=y
+CONFIG_PHYS_ADDR_T_64BIT=y
+# CONFIG_PPC64 is not set
+# CONFIG_PPC_970_NAP is not set
+# CONFIG_PPC_CELL is not set
+# CONFIG_PPC_HAS_HASH_64K is not set
+CONFIG_PPC_INDIRECT_PCI=y
+# CONFIG_PPC_MAPLE is not set
+# CONFIG_PPC_MM_SLICES is not set
+CONFIG_PPC_MPC106=y
+# CONFIG_PPC_PASEMI is not set
+# CONFIG_PPC_PS3 is not set
+# CONFIG_PREEMPT_NONE is not set
+CONFIG_PREEMPT_VOLUNTARY=y
+CONFIG_PRISM54=m
+CONFIG_PROFILING=y
+# CONFIG_PS3_VRAM is not set
+CONFIG_QFMT_V1=m
+CONFIG_R8169=m
+CONFIG_RCU_FANOUT=64
+CONFIG_RDS=m
+CONFIG_RISCOM8=m
+# CONFIG_RTAS_ERROR_LOGGING is not set
+CONFIG_RTC_DRV_BQ4802=m
+CONFIG_RTC_DRV_M48T59=m
+# CONFIG_RTC_DRV_PS3 is not set
+# CONFIG_RTC_DRV_TEST is not set
+CONFIG_SATA_SVW=m
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_SCHED_HRTICK is not set
+CONFIG_SCSI=m
+CONFIG_SCSI_AIC7XXX=m
+CONFIG_SCSI_CONSTANTS=y
+CONFIG_SCSI_DC390T=m
+CONFIG_SCSI_DEBUG=m
+CONFIG_SCSI_FUTURE_DOMAIN=m
+CONFIG_SCSI_IPS=m
+CONFIG_SCSI_LOGGING=y
+# CONFIG_SCSI_LPFC_DEBUG_FS is not set
+CONFIG_SENSORS_ADM1021=m
+CONFIG_SENSORS_ADM1025=m
+CONFIG_SENSORS_ADM1031=m
+CONFIG_SENSORS_DS1621=m
+CONFIG_SENSORS_GL518SM=m
+CONFIG_SENSORS_IT87=m
+CONFIG_SENSORS_LM75=m
+CONFIG_SENSORS_LM77=m
+CONFIG_SENSORS_LM78=m
+CONFIG_SENSORS_LM80=m
+CONFIG_SENSORS_LM83=m
+CONFIG_SENSORS_LM85=m
+CONFIG_SENSORS_LM90=m
+CONFIG_SENSORS_MAX1619=m
+CONFIG_SENSORS_PCF8591=m
+CONFIG_SENSORS_VIA686A=m
+CONFIG_SENSORS_W83627HF=m
+CONFIG_SENSORS_W83781D=m
+CONFIG_SENSORS_W83L785TS=m
+# CONFIG_SERIAL_8250_DETECT_IRQ is not set
+CONFIG_SERIAL_8250_NR_UARTS=48
+CONFIG_SERIAL_CORE=m
+CONFIG_SERIO_PARKBD=m
+CONFIG_SERIO_PCIPS2=m
+CONFIG_SGI_PARTITION=y
+CONFIG_SLIP_MODE_SLIP6=y
+CONFIG_SMP=y
+CONFIG_SOLARIS_X86_PARTITION=y
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_SPECIALIX=m
+CONFIG_STAGING_EXCLUDE_BUILD=y
+# CONFIG_SUNDANCE_MMIO is not set
+CONFIG_SUNGEM=m
+CONFIG_TABLET_USB_WACOM=m
+CONFIG_THERMAL=m
+CONFIG_TR=y
+# CONFIG_TULIP_NAPI is not set
+CONFIG_UBIFS_FS=m
+# CONFIG_UFS_FS is not set
+CONFIG_ULTRIX_PARTITION=y
+CONFIG_UNIXWARE_DISKLABEL=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_GADGET=m
+CONFIG_USB_GADGET_DUALSPEED=y
+# CONFIG_USB_GADGET_GOKU is not set
+CONFIG_USB_GADGET_NET2280=y
+CONFIG_USB_HIDDEV=y
+CONFIG_USB_IBMCAM=m
+CONFIG_USB_KONICAWC=m
+CONFIG_USB_MON=y
+CONFIG_USB_NET2280=m
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_PWC=m
+CONFIG_USB_QUICKCAM_MESSENGER=m
+CONFIG_USB_SE401=m
+CONFIG_USB_STV680=m
+CONFIG_USB_UHCI_HCD=y
+CONFIG_USB_VICAM=m
+CONFIG_VIDEO_ADV7170=m
+CONFIG_VIDEO_ADV7175=m
+CONFIG_VIDEO_BT819=m
+CONFIG_VIDEO_BT848=m
+CONFIG_VIDEO_BT856=m
+CONFIG_VIDEO_BT866=m
+CONFIG_VIDEO_BWQCAM=m
+CONFIG_VIDEO_CPIA=m
+CONFIG_VIDEO_CPIA2=m
+CONFIG_VIDEO_CQCAM=m
+CONFIG_VIDEO_CS5345=m
+CONFIG_VIDEO_CX88=m
+CONFIG_VIDEO_EM28XX=m
+CONFIG_VIDEO_IVTV=m
+CONFIG_VIDEO_KS0127=m
+CONFIG_VIDEO_M52790=m
+CONFIG_VIDEO_OVCAMCHIP=m
+CONFIG_VIDEO_SAA5249=m
+CONFIG_VIDEO_SAA7110=m
+CONFIG_VIDEO_SAA7185=m
+CONFIG_VIDEO_SAA7191=m
+CONFIG_VIDEO_TDA7432=m
+CONFIG_VIDEO_TDA9875=m
+CONFIG_VIDEO_TVAUDIO=m
+CONFIG_VIDEO_VPX3220=m
+CONFIG_VIDEO_W9966=m
+# CONFIG_VIRTUALIZATION is not set
+CONFIG_WAN=y
+CONFIG_WAN_ROUTER=m
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+CONFIG_WORD_SIZE=32
+CONFIG_X25=m
+CONFIG_ZONE_DMA_FLAG=1
--- linux-mvl-dove-2.6.32.orig/debian.master/config/ia64/config.flavour.ia64
+++ linux-mvl-dove-2.6.32/debian.master/config/ia64/config.flavour.ia64
@@ -0,0 +1,3 @@
+#
+# Config options for config.flavour.ia64 automatically generated by splitconfig.pl
+#
--- linux-mvl-dove-2.6.32.orig/debian.master/control.d/vars.powerpc
+++ linux-mvl-dove-2.6.32/debian.master/control.d/vars.powerpc
@@ -0,0 +1,6 @@
+supported="32-bit PowerPC"
+target="Geared toward desktop or server systems."
+desc="32-bit PowerPC"
+bootloader="yaboot"
+provides="redhat-cluster-modules, ivtv-modules"
+arch="powerpc"
--- linux-mvl-dove-2.6.32.orig/debian.master/control.d/vars.386
+++ linux-mvl-dove-2.6.32/debian.master/control.d/vars.386
@@ -0,0 +1,6 @@
+arch="i386"
+supported="Alternate x86 (486 and better)"
+target="Geared toward desktop systems."
+desc="i386"
+bootloader="grub-pc | grub | lilo (>= 19.1)"
+provides="kvm-api-4, ivtv-modules"
--- linux-mvl-dove-2.6.32.orig/debian.master/control.d/vars.generic-pae
+++ linux-mvl-dove-2.6.32/debian.master/control.d/vars.generic-pae
@@ -0,0 +1,6 @@
+arch="i386"
+supported="Generic"
+target="Geared toward 32 bit desktop systems with more then 4GB RAM."
+desc="x86"
+bootloader="grub-pc | grub | lilo (>= 19.1)"
+provides="kvm-api-4, redhat-cluster-modules, ivtv-modules, ndiswrapper-modules-1.9"
--- linux-mvl-dove-2.6.32.orig/debian.master/control.d/vars.generic
+++ linux-mvl-dove-2.6.32/debian.master/control.d/vars.generic
@@ -0,0 +1,6 @@
+arch="i386 amd64"
+supported="Generic"
+target="Geared toward desktop systems."
+desc="x86/x86_64"
+bootloader="grub-pc | grub | lilo (>= 19.1)"
+provides="kvm-api-4, redhat-cluster-modules, ivtv-modules, ndiswrapper-modules-1.9"
--- linux-mvl-dove-2.6.32.orig/debian.master/control.d/vars.sparc64-smp
+++ linux-mvl-dove-2.6.32/debian.master/control.d/vars.sparc64-smp
@@ -0,0 +1,6 @@
+supported="64-bit UltraSPARC SMP"
+target="Geared toward desktop or server systems."
+desc="64-bit UltraSPARC SMP"
+bootloader="silo"
+provides="redhat-cluster-modules, ivtv-modules"
+arch="sparc"
--- linux-mvl-dove-2.6.32.orig/debian.master/control.d/flavour-control.stub
+++ linux-mvl-dove-2.6.32/debian.master/control.d/flavour-control.stub
@@ -0,0 +1,78 @@
+# Items that get replaced:
+# FLAVOUR
+# DESC
+# ARCH
+# SUPPORTED
+# TARGET
+# BOOTLOADER
+# =PROVIDES=
+#
+# Items marked with =FOO= are optional
+#
+# This file describes the template for packages that are created for each flavour
+# in debian/control.d/vars.*
+#
+# This file gets edited in a couple of places. See the debian/control.stub rule in
+# debian/rules. PGGVER, ABINUM, and SRCPKGNAME are all converted in the
+# process of creating debian/control.
+#
+# The flavour specific strings (ARCH, DESC, etc) are converted using values from the various
+# flavour files in debian/control.d/vars.*
+#
+# XXX: Leave the blank line before the first package!!
+
+Package: linux-image-PKGVER-ABINUM-FLAVOUR
+Architecture: ARCH
+Section: admin
+Priority: optional
+Pre-Depends: dpkg (>= 1.10.24)
+Provides: linux-image, linux-image-2.6, fuse-module, =PROVIDES=
+Depends: ${misc:Depends}, ${shlibs:Depends}, initramfs-tools (>= 0.36ubuntu6), coreutils | fileutils (>= 4.0), module-init-tools (>= 3.3-pre11-4ubuntu3), wireless-crda
+Conflicts: hotplug (<< 0.0.20040105-1)
+Breaks: lvm2 (<< 2.02.54-1ubuntu3)
+Recommends: BOOTLOADER
+Suggests: fdutils, SRCPKGNAME-doc-PKGVER | SRCPKGNAME-source-PKGVER, SRCPKGNAME-tools
+Description: Linux kernel image for version PKGVER on DESC
+ This package contains the Linux kernel image for version PKGVER on
+ DESC.
+ .
+ Also includes the corresponding System.map file, the modules built by the
+ packager, and scripts that try to ensure that the system is not left in an
+ unbootable state after an update.
+ .
+ Supports SUPPORTED processors.
+ .
+ TARGET
+ .
+ You likely do not want to install this package directly. Instead, install
+ the linux-FLAVOUR meta-package, which will ensure that upgrades work
+ correctly, and that supporting packages are also installed.
+
+Package: linux-headers-PKGVER-ABINUM-FLAVOUR
+Architecture: ARCH
+Section: devel
+Priority: optional
+Depends: ${misc:Depends}, coreutils | fileutils (>= 4.0), SRCPKGNAME-headers-PKGVER-ABINUM, ${shlibs:Depends}
+Provides: SRCPKGNAME-headers, SRCPKGNAME-headers-2.6
+Description: Linux kernel headers for version PKGVER on DESC
+ This package provides kernel header files for version PKGVER on
+ DESC.
+ .
+ This is for sites that want the latest kernel headers.  Please read
+ /usr/share/doc/SRCPKGNAME-headers-PKGVER-ABINUM/debian.README.gz for details.
+
+Package: linux-image-PKGVER-ABINUM-FLAVOUR-dbgsym
+Architecture: ARCH
+Section: devel
+Priority: optional
+Depends: ${misc:Depends}
+Provides: linux-debug
+Description: Linux kernel debug image for version PKGVER on DESC
+ This package provides a kernel debug image for version PKGVER on
+ DESC.
+ .
+ This is for sites that wish to debug the kernel.
+ .
+ The kernel image contained in this package is NOT meant to boot from. It
+ is uncompressed, and unstripped. This package also includes the
+ unstripped modules.
--- linux-mvl-dove-2.6.32.orig/debian.master/control.d/vars.sparc64
+++ linux-mvl-dove-2.6.32/debian.master/control.d/vars.sparc64
@@ -0,0 +1,6 @@
+supported="64-bit UltraSPARC"
+target="Geared toward desktop or server systems."
+desc="64-bit UltraSPARC"
+bootloader="silo"
+provides="redhat-cluster-modules, ivtv-modules"
+arch="sparc"
--- linux-mvl-dove-2.6.32.orig/debian.master/control.d/vars.powerpc-smp
+++ linux-mvl-dove-2.6.32/debian.master/control.d/vars.powerpc-smp
@@ -0,0 +1,6 @@
+supported="32-bit PowerPC SMP"
+target="Geared toward desktop or server systems."
+desc="32-bit PowerPC SMP"
+bootloader="yaboot"
+provides="redhat-cluster-modules, ivtv-modules"
+arch="powerpc"
--- linux-mvl-dove-2.6.32.orig/debian.master/control.d/vars.ia64
+++ linux-mvl-dove-2.6.32/debian.master/control.d/vars.ia64
@@ -0,0 +1,6 @@
+supported="IA-64 SMP"
+target="Geared toward desktop or server systems."
+desc="IA-64 SMP"
+bootloader="elilo (>= 3.6-1)"
+provides="redhat-cluster-modules, ivtv-modules"
+arch="ia64"
--- linux-mvl-dove-2.6.32.orig/debian.master/control.d/vars.lpia
+++ linux-mvl-dove-2.6.32/debian.master/control.d/vars.lpia
@@ -0,0 +1,8 @@
+arch="lpia"
+supported="Intel Atom"
+desc="Intel Atom processors"
+target="Geared toward LPIA-based mobile devices"
+bootloader="grub-pc | grub | lilo (>= 19.1)"
+provides="kvm-api-4, redhat-cluster-modules"
+section_image="universe/admin"
+do_debug="Yes"
--- linux-mvl-dove-2.6.32.orig/debian.master/control.d/vars.versatile
+++ linux-mvl-dove-2.6.32/debian.master/control.d/vars.versatile
@@ -0,0 +1,8 @@
+arch="armel"
+supported="Versatile"
+desc="Versatile-based systems"
+target="PB, AB, Qemu, etc."
+bootloader=""
+provides=""
+section_image="universe/base"
+do_debug="Yes"
--- linux-mvl-dove-2.6.32.orig/debian.master/control.d/vars.preempt
+++ linux-mvl-dove-2.6.32/debian.master/control.d/vars.preempt
@@ -0,0 +1,6 @@
+arch="amd64"
+supported="Preempt"
+target="Geared toward low latency systems."
+desc="x86_64"
+bootloader="grub-pc | grub | lilo (>= 19.1)"
+provides="kvm-api-4, redhat-cluster-modules, ivtv-modules, ndiswrapper-modules-1.9"
--- linux-mvl-dove-2.6.32.orig/debian.master/control.d/vars.powerpc64-smp
+++ linux-mvl-dove-2.6.32/debian.master/control.d/vars.powerpc64-smp
@@ -0,0 +1,6 @@
+supported="64-bit PowerPC SMP"
+target="Geared toward desktop or server systems."
+desc="64-bit PowerPC SMP"
+bootloader="yaboot"
+provides="redhat-cluster-modules, ivtv-modules"
+arch="powerpc"
--- linux-mvl-dove-2.6.32.orig/debian.master/control.d/vars.server
+++ linux-mvl-dove-2.6.32/debian.master/control.d/vars.server
@@ -0,0 +1,6 @@
+arch="amd64"
+supported="Server"
+target="Geared toward 64 bit server systems."
+desc="x86_64"
+bootloader="grub-pc | grub | lilo (>= 19.1)"
+provides="redhat-cluster-modules, kvm-api-4, ivtv-modules, ndiswrapper-modules-1.9"
--- linux-mvl-dove-2.6.32.orig/debian.master/sub-flavours/control.stub
+++ linux-mvl-dove-2.6.32/debian.master/sub-flavours/control.stub
@@ -0,0 +1,39 @@
+# Items that get replaced:
+# FLAVOUR
+# DESC
+# ARCH
+# SUPPORTED
+# TARGET
+# BOOTLOADER
+# =PROVIDES=
+# =CONFLICTS=
+#
+# Items marked with =FOO= are optional
+#
+# XXX: Leave the blank line before the first package!!
+
+Package: linux-image-PKGVER-ABINUM-FLAVOUR
+Architecture: ARCH
+Section: admin
+Priority: optional
+Pre-Depends: dpkg (>= 1.10.24)
+Provides: linux-image, linux-image-2.6, fuse-module, =PROVIDES=
+Depends: ${misc:Depends}, initramfs-tools (>= 0.36ubuntu6), coreutils | fileutils (>= 4.0), module-init-tools (>= 3.3-pre11-4ubuntu3)
+Conflicts: hotplug (<< 0.0.20040105-1), =CONFLICTS=
+Recommends: BOOTLOADER
+Suggests: fdutils, linux-doc-PKGVER | linux-source-PKGVER
+Description: Linux kernel image for version PKGVER on DESC
+ This package contains the Linux kernel image for version PKGVER on
+ DESC.
+ .
+ Also includes the corresponding System.map file, the modules built by the
+ packager, and scripts that try to ensure that the system is not left in an
+ unbootable state after an update.
+ .
+ Supports SUPPORTED processors.
+ .
+ TARGET
+ .
+ You likely do not want to install this package directly. Instead, install
+ the linux-FLAVOUR meta-package, which will ensure that upgrades work
+ correctly, and that supporting packages are also installed.
--- linux-mvl-dove-2.6.32.orig/debian.master/sub-flavours/virtual.list
+++ linux-mvl-dove-2.6.32/debian.master/sub-flavours/virtual.list
@@ -0,0 +1,107 @@
+arch/*/{crypto,kernel,oprofile}
+crypto/*
+drivers/acpi/*
+drivers/ata/ahci.ko
+drivers/ata/ata_generic.ko
+drivers/ata/ata_piix.ko
+drivers/ata/libata.ko
+drivers/block/nbd.ko
+drivers/block/loop.ko
+drivers/block/floppy.ko
+drivers/block/cryptoloop.ko
+drivers/block/xen-blkfront.ko
+drivers/cdrom/cdrom.ko
+drivers/char/hangcheck-timer.ko
+drivers/char/lp.ko
+drivers/char/nvram.ko
+drivers/char/ppdev.ko
+drivers/char/raw.ko
+drivers/input/evbug.ko
+drivers/input/evdev.ko
+drivers/input/gameport/gameport.ko
+drivers/input/mouse/psmouse.ko
+drivers/input/serio/serio_raw.ko
+drivers/input/serio/serport.ko
+drivers/input/joydev.ko
+drivers/input/misc/uinput.ko
+drivers/input/touchscreen/usbtouchscreen.ko
+drivers/input/xen-kbdfront.ko
+drivers/md/*
+drivers/message/fusion*
+drivers/misc/eeprom_93cx6.ko
+drivers/net/8139too.ko
+drivers/net/8139cp.ko
+drivers/net/appletalk/ipddp.ko
+drivers/net/bonding/bonding.ko
+drivers/net/bsd_comp.ko
+drivers/net/dummy.ko
+drivers/net/e1000/e1000.ko
+drivers/net/eql.ko
+drivers/net/ifb.ko
+drivers/net/mii.ko
+drivers/net/ne2k-pci.ko
+drivers/net/netconsole.ko
+drivers/net/pcnet32.ko
+drivers/net/ppp_async.ko
+drivers/net/ppp_deflate.ko
+drivers/net/ppp_generic.ko
+drivers/net/ppp_mppe.ko
+drivers/net/pppoe.ko
+drivers/net/pppol2tp.ko
+drivers/net/pppox.ko
+drivers/net/ppp_synctty.ko
+drivers/net/slhc.ko
+drivers/net/slip.ko
+drivers/net/tun.ko
+drivers/net/veth.ko
+drivers/net/vmxnet3/vmxnet3.ko
+drivers/net/xen-netfront.ko
+drivers/parport/parport.ko
+drivers/parport/parport_pc.ko
+drivers/pci/hotplug/acpiphp.ko
+drivers/net/tulip/tulip.ko
+drivers/scsi/BusLogic.ko
+drivers/scsi/iscsi_tcp.ko
+drivers/scsi/libiscsi.ko
+drivers/scsi/libsas/*
+drivers/scsi/libsas/libsas.ko
+drivers/scsi/qla1280.ko
+drivers/scsi/raid_class.ko
+drivers/scsi/scsi_mod.ko
+drivers/scsi/scsi_transport_fc.ko
+drivers/scsi/scsi_transport_iscsi.ko
+drivers/scsi/scsi_transport_sas.ko
+drivers/scsi/scsi_transport_spi.ko
+drivers/scsi/scsi_wait_scan.ko
+drivers/scsi/sd_mod.ko
+drivers/scsi/sg.ko
+drivers/scsi/sr_mod.ko
+drivers/scsi/vmw_pvscsi.ko
+drivers/usb/core/usbcore.ko
+drivers/usb/storage/usb-storage.ko
+drivers/video/cirrusfb.ko
+drivers/video/console/bitblit.ko
+drivers/video/console/fbcon.ko
+drivers/video/console/font.ko
+drivers/video/console/softcursor.ko
+drivers/video/console/tileblit.ko
+drivers/video/output.ko
+drivers/video/syscopyarea.ko
+drivers/video/sysfillrect.ko
+drivers/video/sysimgblt.ko
+drivers/video/vesafb.ko
+drivers/video/vga16fb.ko
+drivers/video/vgastate.ko
+drivers/video/xen-fbfront.ko
+drivers/virtio/virtio_balloon.ko
+drivers/watchdog/softdog.ko
+drivers/xen/*
+fs/*
+lib/*
+net/*
+sound/core/*
+sound/pci/snd-ens1370.ko
+sound/drivers/pcsp/snd-pcsp.ko
+ubuntu/e1000e/e1000e.ko
+ubuntu/squashfs/squashfs.ko
+ubuntu/iscsitarget/iscsi_trgt.ko
--- linux-mvl-dove-2.6.32.orig/debian.master/sub-flavours/virtual.vars
+++ linux-mvl-dove-2.6.32/debian.master/sub-flavours/virtual.vars
@@ -0,0 +1,10 @@
+# Based on server flavour
+arch="i386 amd64"
+supported="Virtual"
+target="Geared toward virtual machine guests."
+desc="x86/x86_64"
+bootloader="grub-pc | grub | lilo (>= 19.1)"
+is_sub="true"
+# The provides and conflicts are REQUIRED
+provides="redhat-cluster-modules"
+conflicts="linux-image-PKGVER-ABINUM-generic-pae, linux-image-PKGVER-ABINUM-server"
--- linux-mvl-dove-2.6.32.orig/debian.master/sub-flavours/README
+++ linux-mvl-dove-2.6.32/debian.master/sub-flavours/README
@@ -0,0 +1,12 @@
+Sub flavours are flavours that are built based on other builds. IOW, they
+are usually a subset of something else.
+
+Requirements:
+
+debian/sub-flavours/<sub>.list	: The file list, uses glob syntax
+debian/sub-flavours/<sub>.vars	: The make vars, similar to normal flavours
+debian/rules.d/<arch>.mk	: Add <base>_sub var listing the <sub>, e.g.
+				  server_sub = virtual would mean virtual is
+				  based on the server flavour.
+
+Note, the vars must include a conflicts with the flavour it was built on.
--- linux-mvl-dove-2.6.32.orig/debian.master/abi/2.6.32-34.73/abiname
+++ linux-mvl-dove-2.6.32/debian.master/abi/2.6.32-34.73/abiname
@@ -0,0 +1 @@
+34
--- linux-mvl-dove-2.6.32.orig/debian.master/abi/2.6.32-34.73/powerpc/powerpc64-smp.modules
+++ linux-mvl-dove-2.6.32/debian.master/abi/2.6.32-34.73/powerpc/powerpc64-smp.modules
@@ -0,0 +1,2161 @@
+3c359
+3c574_cs
+3c589_cs
+3c59x
+3w-9xxx
+3w-xxxx
+6pack
+8021q
+8139cp
+8139too
+8250
+8250_pci
+8390
+9p
+9pnet
+9pnet_rdma
+9pnet_virtio
+a100u2w
+a3d
+aacraid
+ab3100
+ab3100-core
+ab3100-otp
+abyss
+ac97_bus
+acecad
+acenic
+act200l-sir
+act_gact
+act_ipt
+actisys-sir
+act_mirred
+act_nat
+act_pedit
+act_police
+act_simple
+act_skbedit
+ad7414
+ad7418
+ad7877
+ad7879
+adcxx
+adfs
+adi
+adm1021
+adm1025
+adm1026
+adm1029
+adm1031
+adm8211
+adm9240
+adp5588-keys
+ads7846
+adt7462
+adt7470
+adt7475
+adutux
+adv7170
+adv7175
+adv7180
+adv7343
+aes_generic
+af_802154
+af9013
+affs
+af_key
+af-rxrpc
+agpgart
+ah4
+ah6
+ahci
+aic79xx
+aic7xxx
+aic94xx
+aiptek
+aircable
+airo
+airo_cs
+airport
+alauda
+ali-ircc
+amd8111e
+analog
+ansi_cprng
+anubis
+aoe
+appledisplay
+appletalk
+appletouch
+applicom
+ar7part
+ar9170usb
+arc4
+arcmsr
+arcnet
+arc-rawmode
+arc-rimi
+ark3116
+arkfb
+arptable_filter
+arp_tables
+arpt_mangle
+asix
+async_memcpy
+async_pq
+async_raid6_recov
+async_tx
+async_xor
+at24
+at25
+at76c50x-usb
+ata_generic
+ata_piix
+aten
+ath
+ath9k
+ati_remote
+ati_remote2
+atl1
+atl1c
+atl1e
+atl2
+atm
+atmel
+atmel_cs
+atmel_pci
+atmtcp
+atp870u
+atxp1
+au0828
+au8522
+aufs
+authenc
+auth_rpcgss
+autofs
+autofs4
+ax25
+axnet_cs
+b2c2-flexcop
+b2c2-flexcop-pci
+b2c2-flexcop-usb
+b43
+b43legacy
+b44
+baycom_par
+baycom_ser_fdx
+baycom_ser_hdx
+bcm203x
+bcm3510
+bcm5974
+be2iscsi
+be2net
+befs
+belkin_sa
+berry_charge
+bfa
+bfs
+bfusb
+binfmt_misc
+block2mtd
+blowfish
+bluecard_cs
+bluetooth
+bnep
+bnx2
+bnx2i
+bonding
+bpa10x
+bpck
+bpqether
+bq24022
+bq27x00_battery
+br2684
+bridge
+broadcom
+broadsheetfb
+bsd_comp
+bt3c_cs
+bt819
+bt856
+bt866
+bt878
+btcx-risc
+btmrvl
+btmrvl_sdio
+btrfs
+btsdio
+bttv
+btuart_cs
+btusb
+bw-qcam
+c67x00
+cachefiles
+cafe_ccic
+cafe_nand
+camellia
+can
+can-bcm
+can-dev
+can-raw
+capmode
+carminefb
+cassini
+cast5
+cast6
+catc
+cb710
+cb710-mmc
+cbc
+cciss
+cdc-acm
+cdc_eem
+cdc_ether
+cdc-phonet
+cdc_subset
+cdc-wdm
+cfg80211
+cfi_cmdset_0001
+cfi_cmdset_0002
+cfi_cmdset_0020
+cfi_probe
+cfi_util
+ch
+ch341
+ch7006
+chipreg
+cicada
+cifs
+cirrusfb
+clip
+cls_basic
+cls_flow
+cls_fw
+cls_route
+cls_rsvp
+cls_rsvp6
+cls_tcindex
+cls_u32
+cm109
+cn
+cnic
+cobra
+coda
+com20020
+com20020_cs
+com20020-pci
+com90io
+com90xx
+comm
+configfs
+core
+cp210x
+cpia
+cpia2
+cpia_pp
+cpia_usb
+cpufreq_spudemand
+cpufreq_stats
+c-qcam
+cramfs
+crc32c
+crc7
+crc-ccitt
+crc-itu-t
+crc-t10dif
+cryptd
+cryptoloop
+crypto_null
+cs5345
+cs53l32a
+cts
+cuse
+cx18
+cx22700
+cx22702
+cx231xx
+cx231xx-alsa
+cx231xx-dvb
+cx2341x
+cx23885
+cx24110
+cx24113
+cx24116
+cx24123
+cx25840
+cx8800
+cx8802
+cx88-alsa
+cx88-blackbird
+cx88-dvb
+cx88-vp3054-i2c
+cx88xx
+cxacru
+cxgb
+cxgb3
+cxgb3i
+cyber2000fb
+cyberjack
+cyclades
+cyclomx
+cycx_drv
+cypress_cy7c63
+cypress_m8
+cytherm
+da9030_battery
+da9034-ts
+da903x
+da903x_bl
+DAC960
+davicom
+db9
+dc395x
+dccp
+dccp_diag
+dccp_ipv4
+dccp_ipv6
+dccp_probe
+de2104x
+de4x5
+de600
+de620
+decnet
+deflate
+defxx
+des_generic
+dib0070
+dib3000mb
+dib3000mc
+dib7000m
+dib7000p
+dib8000
+dibx000_common
+digi_acceleport
+diskonchip
+display
+dl2k
+dlci
+dlm
+dm1105
+dm9601
+dm-crypt
+dme1737
+dmfe
+dm-log
+dm-mirror
+dm-multipath
+dm-queue-length
+dm-region-hash
+dm-round-robin
+dm-service-time
+dm-snapshot
+dmx3191d
+dm-zero
+dnet
+dn_rtmsg
+doc2000
+doc2001
+doc2001plus
+docecc
+docprobe
+drm
+drm_kms_helper
+ds1621
+ds1682
+ds2482
+ds2490
+ds2760_battery
+ds2782_battery
+dsbr100
+dscc4
+dst
+dst_ca
+dstr
+dtl1_cs
+dummy
+dv1394
+dvb-bt8xx
+dvb-core
+dvb-pll
+dvb-ttpci
+dvb-ttusb-budget
+dvb-usb
+dvb-usb-a800
+dvb-usb-af9005
+dvb-usb-af9005-remote
+dvb-usb-af9015
+dvb-usb-anysee
+dvb-usb-au6610
+dvb-usb-ce6230
+dvb-usb-cinergyT2
+dvb-usb-cxusb
+dvb-usb-dib0700
+dvb-usb-dibusb-common
+dvb-usb-dibusb-mb
+dvb-usb-dibusb-mc
+dvb-usb-digitv
+dvb-usb-dtt200u
+dvb-usb-dtv5100
+dvb-usb-dw2102
+dvb-usb-friio
+dvb-usb-gl861
+dvb-usb-gp8psk
+dvb-usb-m920x
+dvb-usb-nova-t-usb2
+dvb-usb-opera
+dvb-usb-ttusb2
+dvb-usb-umt-010
+dvb-usb-vp702x
+dvb-usb-vp7045
+e100
+e1000
+e1000e
+earth-pt1
+eata
+ebt_802_3
+ebtable_broute
+ebtable_filter
+ebtable_nat
+ebtables
+ebt_among
+ebt_arp
+ebt_arpreply
+ebt_dnat
+ebt_ip
+ebt_ip6
+ebt_limit
+ebt_log
+ebt_mark
+ebt_mark_m
+ebt_nflog
+ebt_pkttype
+ebt_redirect
+ebt_snat
+ebt_stp
+ebt_ulog
+ebt_vlan
+ecb
+econet
+ecryptfs
+edac_core
+eeprom
+eeprom_93cx6
+eeti_ts
+efs
+elo
+em28xx
+em28xx-dvb
+em_cmp
+emi26
+emi62
+em_meta
+em_nbyte
+empeg
+ems_pci
+ems_usb
+em_text
+emu10k1-gp
+em_u32
+eni
+enic
+epat
+epca
+epia
+epic100
+eql
+esi-sir
+esp4
+esp6
+et1011c
+et61x251
+eth1394
+ethoc
+evbug
+evdev
+exofs
+exportfs
+f71805f
+f71882fg
+f75375s
+farsync
+fat
+faulty
+fcoe
+fcrypt
+fdomain
+fdomain_cs
+fealnx
+ff-memless
+firedtv
+fit2
+fit3
+floppy
+fm801-gp
+fmvj18x_cs
+forcedeth
+fore_200e
+freevxfs
+friq
+frpw
+fscache
+ftdi-elan
+ftdi_sio
+ftl
+fujitsu_ts
+funsoft
+g760a
+gadgetfs
+gamecon
+gameport
+garmin_gps
+garp
+g_audio
+g_cdc
+gdth
+generic
+generic_bl
+gen_probe
+g_ether
+gf128mul
+gf2k
+g_file_storage
+gfs2
+ghash-generic
+girbil-sir
+gl518sm
+gl520sm
+gl620a
+gluebi
+g_midi
+gpio-addr-flash
+gpio_keys
+gpio_mouse
+gpio_vbus
+g_printer
+grip
+grip_mp
+g_serial
+gspca_conex
+gspca_etoms
+gspca_finepix
+gspca_gl860
+gspca_jeilinj
+gspca_m5602
+gspca_main
+gspca_mars
+gspca_mr97310a
+gspca_ov519
+gspca_ov534
+gspca_pac207
+gspca_pac7311
+gspca_sn9c20x
+gspca_sonixb
+gspca_sonixj
+gspca_spca500
+gspca_spca501
+gspca_spca505
+gspca_spca506
+gspca_spca508
+gspca_spca561
+gspca_sq905
+gspca_sq905c
+gspca_stk014
+gspca_stv06xx
+gspca_sunplus
+gspca_t613
+gspca_tv8532
+gspca_vc032x
+gspca_zc3xx
+gtco
+guillemot
+gunze
+gxt4500
+g_zero
+hamachi
+hangcheck-timer
+hci_uart
+hci_vhci
+hdlc
+hdlc_cisco
+hdlcdrv
+hdlc_fr
+hdlc_ppp
+hdlc_raw
+hdlc_raw_eth
+hdlc_x25
+hdpvr
+he
+hexium_gemini
+hexium_orion
+hfs
+hfsplus
+hid
+hid-3m-pct
+hid-a4tech
+hid-apple
+hid-belkin
+hid-cherry
+hid-chicony
+hid-cypress
+hid-drff
+hid-ezkey
+hid-gaff
+hid-gyration
+hid-kensington
+hid-kye
+hid-logitech
+hid-microsoft
+hid-monterey
+hid-mosart
+hid-ntrig
+hid-ortek
+hidp
+hid-petalynx
+hid-pl
+hid-quanta
+hid-samsung
+hid-sjoy
+hid-sony
+hid-stantum
+hid-sunplus
+hid-tmff
+hid-topseed
+hid-twinhan
+hid-wacom
+hid-zpff
+hostap
+hostap_cs
+hostap_pci
+hostap_plx
+hp100
+hp4x
+hpfs
+hpilo
+hptiop
+hso
+htc-pasic3
+hwa-hc
+hwa-rc
+hwmon-vid
+i1480-dfu-usb
+i1480-est
+i1480u-wlp
+i2400m
+i2400m-sdio
+i2400m-usb
+i2c-algo-pca
+i2c-ali1535
+i2c-ali1563
+i2c-ali15x3
+i2c-amd756
+i2c-amd8111
+i2c-dev
+i2c-i801
+i2c-isch
+i2c-matroxfb
+i2c-nforce2
+i2c-ocores
+i2c-parport
+i2c-parport-light
+i2c-pca-platform
+i2c-piix4
+i2c-simtec
+i2c-sis5595
+i2c-sis630
+i2c-sis96x
+i2c-stub
+i2c-taos-evm
+i2c-tiny-usb
+i2c-via
+i2c-viapro
+i2c-voodoo3
+i2o_block
+i2o_bus
+i2o_core
+i2o_proc
+i2o_scsi
+i5k_amb
+i82092
+ib_addr
+ib_cm
+ib_core
+ib_ipoib
+ib_iser
+ib_mad
+ibmaem
+ibmcam
+ibmpex
+ib_mthca
+ibmtr_cs
+ib_sa
+ib_srp
+ib_ucm
+ib_umad
+ib_uverbs
+icplus
+ics932s401
+idmouse
+idt77252
+ieee1394
+ifb
+iforce
+igbvf
+ili9320
+imm
+inexio
+inftl
+initio
+input-polldev
+int51x1
+intel_vr_nor
+interact
+ioc4
+io_edgeport
+io_ti
+iowarrior
+ip2
+ip6_queue
+ip6table_filter
+ip6table_mangle
+ip6table_raw
+ip6_tables
+ip6table_security
+ip6t_ah
+ip6t_eui64
+ip6t_frag
+ip6t_hbh
+ip6t_ipv6header
+ip6t_LOG
+ip6t_mh
+ip6t_REJECT
+ip6t_rt
+ip6_tunnel
+ipaq
+ipcomp
+ipcomp6
+ipddp
+ipg
+ip_gre
+iphase
+ipip
+ipmi_devintf
+ipmi_msghandler
+ipmi_poweroff
+ipmi_si
+ipmi_watchdog
+ip_queue
+ipr
+ips
+iptable_filter
+iptable_mangle
+iptable_nat
+iptable_raw
+ip_tables
+iptable_security
+ipt_addrtype
+ipt_ah
+ipt_CLUSTERIP
+ipt_ecn
+ipt_ECN
+ipt_LOG
+ipt_MASQUERADE
+ipt_NETMAP
+ipt_REDIRECT
+ipt_REJECT
+ipt_ULOG
+ipv6
+ip_vs
+ip_vs_dh
+ip_vs_ftp
+ip_vs_lblc
+ip_vs_lblcr
+ip_vs_lc
+ip_vs_nq
+ip_vs_rr
+ip_vs_sed
+ip_vs_sh
+ip_vs_wlc
+ip_vs_wrr
+ipw
+ipw2100
+ipw2200
+ipx
+ircomm
+ir-common
+ircomm-tty
+irda
+irda-usb
+ir-kbd-i2c
+irlan
+irnet
+irtty-sir
+ir-usb
+iscsi_tcp
+iscsi_trgt
+isight_firmware
+isl29003
+isl6405
+isl6421
+isofs
+isp116x-hcd
+isp1362-hcd
+isp1760
+istallion
+it87
+itd1000
+iuu_phoenix
+ivtv
+ivtvfb
+iw_c2
+iw_cm
+iw_cxgb3
+iwlagn
+iwlcore
+iwmc3200wifi
+ixgb
+ixgbe
+ixj
+ixj_pcmcia
+jedec_probe
+jffs2
+jfs
+jme
+joydev
+joydump
+jsm
+kafs
+kaweth
+kbic
+kbtab
+keyspan
+keyspan_pda
+keyspan_remote
+khazad
+kingsun-sir
+kl5kusb105
+kobil_sct
+konicawc
+ks0108
+ks0127
+ks8842
+ks8851
+ks8851_mll
+ks959-sir
+ksdazzle-sir
+ktti
+kvaser_pci
+kyrofb
+l2cap
+l64781
+lanai
+lapb
+lapbether
+lcd
+ldusb
+lec
+leds-bd2802
+leds-da903x
+leds-dac124s085
+leds-lp3944
+leds-wm831x-status
+leds-wm8350
+ledtrig-backlight
+ledtrig-default-on
+ledtrig-gpio
+legousbtower
+lgdt3305
+lgdt330x
+lgs8gxx
+lib80211
+lib80211_crypt_ccmp
+lib80211_crypt_tkip
+lib80211_crypt_wep
+libcrc32c
+libertas
+libertas_cs
+libertas_sdio
+libertas_spi
+libertas_tf
+libertas_tf_usb
+libfc
+libfcoe
+libipw
+libiscsi
+libiscsi_tcp
+libosd
+libsas
+libsrp
+lightning
+linear
+lirc_atiusb
+lirc_bt829
+lirc_dev
+lirc_ene0100
+lirc_i2c
+lirc_igorplugusb
+lirc_imon
+lirc_it87
+lirc_ite8709
+lirc_mceusb
+lirc_sasem
+lirc_serial
+lirc_sir
+lirc_streamzap
+lirc_ttusbir
+lis3lv02d
+lis3lv02d_spi
+litelink-sir
+lkkbd
+llc2
+lm63
+lm70
+lm75
+lm77
+lm78
+lm80
+lm83
+lm8323
+lm85
+lm87
+lm90
+lm92
+lm93
+lm95241
+lms283gf05
+lnbp21
+lockd
+loop
+lp
+lp3971
+lpddr_cmds
+lpfc
+lrw
+ltc4215
+ltc4245
+ltv350qv
+lxt
+m25p80
+m52790
+ma600-sir
+mac80211
+mac80211_hwsim
+macvlan
+magellan
+map_absent
+map_funcs
+map_ram
+map_rom
+marvell
+matrix_keypad
+matroxfb_maven
+matrox_w1
+max1111
+max1586
+max1619
+max17040_battery
+max3100
+max6650
+max6875
+max7301
+max732x
+max7359_keypad
+mb862xxfb
+mc13783
+mc13783-core
+mc33880
+mc44s803
+mcp2120-sir
+mcp23s08
+mcs5000_ts
+mcs7780
+mcs7830
+mct_u232
+md4
+mdc800
+mdio
+mdio-bitbang
+mdio-gpio
+md-mod
+megaraid
+megaraid_mbox
+megaraid_mm
+megaraid_sas
+metronomefb
+mfd-core
+mga
+michael_mic
+microtek
+mii
+minix
+mk712
+mkiss
+mlx4_core
+mlx4_en
+mlx4_ib
+mmc_block
+mmc_core
+mmc_spi
+mos7720
+mos7840
+moto_modem
+moxa
+mpoa
+mpt2sas
+mptbase
+mptctl
+mptfc
+mptlan
+mptsas
+mptscsih
+mptspi
+msdos
+msp3400
+mt2060
+mt20xx
+mt2131
+mt2266
+mt312
+mt352
+mt9m001
+mt9m111
+mt9t031
+mt9v011
+mt9v022
+mtd
+mtd_blkdevs
+mtdblock
+mtdblock_ro
+mtdchar
+mtdconcat
+mtd_dataflash
+mtd_oobtest
+mtdoops
+mtd_pagetest
+mtdram
+mtd_readtest
+mtd_speedtest
+mtd_stresstest
+mtd_subpagetest
+mtd_torturetest
+mtouch
+multipath
+mwl8k
+mxl5005s
+mxl5007t
+myri10ge
+nand
+nand_ecc
+nand_ids
+nandsim
+national
+natsemi
+navman
+nbd
+ncpfs
+ne2k-pci
+neofb
+net1080
+net2280
+netconsole
+netrom
+netwave_cs
+netxen_nic
+newtonkbd
+nf_conntrack
+nf_conntrack_amanda
+nf_conntrack_ftp
+nf_conntrack_h323
+nf_conntrack_ipv4
+nf_conntrack_ipv6
+nf_conntrack_irc
+nf_conntrack_netbios_ns
+nf_conntrack_netlink
+nf_conntrack_pptp
+nf_conntrack_proto_dccp
+nf_conntrack_proto_gre
+nf_conntrack_proto_sctp
+nf_conntrack_proto_udplite
+nf_conntrack_sane
+nf_conntrack_sip
+nf_conntrack_tftp
+nf_defrag_ipv4
+nf_nat
+nf_nat_amanda
+nf_nat_ftp
+nf_nat_h323
+nf_nat_irc
+nf_nat_pptp
+nf_nat_proto_dccp
+nf_nat_proto_gre
+nf_nat_proto_sctp
+nf_nat_proto_udplite
+nf_nat_sip
+nf_nat_snmp_basic
+nf_nat_tftp
+nfnetlink
+nfnetlink_log
+nfnetlink_queue
+nfs
+nfs_acl
+nfsd
+nftl
+nf_tproxy_core
+n_hdlc
+nilfs2
+nl802154
+nls_ascii
+nls_cp1250
+nls_cp1251
+nls_cp1255
+nls_cp437
+nls_cp737
+nls_cp775
+nls_cp850
+nls_cp852
+nls_cp855
+nls_cp857
+nls_cp860
+nls_cp861
+nls_cp862
+nls_cp863
+nls_cp864
+nls_cp865
+nls_cp866
+nls_cp869
+nls_cp874
+nls_cp932
+nls_cp936
+nls_cp949
+nls_cp950
+nls_euc-jp
+nls_iso8859-1
+nls_iso8859-13
+nls_iso8859-14
+nls_iso8859-15
+nls_iso8859-2
+nls_iso8859-3
+nls_iso8859-4
+nls_iso8859-5
+nls_iso8859-6
+nls_iso8859-7
+nls_iso8859-9
+nls_koi8-r
+nls_koi8-ru
+nls_koi8-u
+nls_utf8
+nmclan_cs
+nop-usb-xceiv
+nouveau
+n_r3964
+ns558
+ns83820
+nsc-ircc
+ntfs
+nvidiafb
+nxt200x
+nxt6000
+ocfs2
+ocfs2_dlm
+ocfs2_dlmfs
+ocfs2_nodemanager
+ocfs2_stackglue
+ocfs2_stack_o2cb
+ocfs2_stack_user
+of_mmc_spi
+of_serial
+ohci1394
+old_belkin-sir
+olympic
+omfs
+omninet
+on20
+on26
+onenand
+onenand_sim
+opencores-kbd
+oprofile
+opticon
+option
+or51132
+or51211
+orinoco
+orinoco_cs
+osd
+osdblk
+osst
+oti6858
+output
+ov7670
+ov772x
+ovcamchip
+oxu210hp-hcd
+p54common
+p54pci
+p54spi
+p54usb
+p8023
+paride
+parkbd
+parport
+parport_ax88796
+parport_cs
+parport_pc
+parport_serial
+pata_amd
+pata_atp867x
+pata_cs5520
+pata_efar
+pata_it8213
+pata_it821x
+pata_jmicron
+pata_marvell
+pata_mpiix
+pata_netcell
+pata_ninja32
+pata_of_platform
+pata_oldpiix
+pata_pcmcia
+pata_pdc2027x
+pata_platform
+pata_rdc
+pata_rz1000
+pata_sch
+pata_serverworks
+pata_sil680
+pata_sis
+pata_sl82c105
+pata_triflex
+pata_via
+pc87360
+pc87427
+pca953x
+pcbc
+pcd
+pcf50633-adc
+pcf50633-charger
+pcf50633-core
+pcf50633-gpio
+pcf50633-input
+pcf50633-regulator
+pcf857x
+pcf8591
+pci
+pci200syn
+pcilynx
+pcips2
+pcmcia
+pcmcia_core
+pcnet32
+pcnet_cs
+pcspkr
+pcwd_pci
+pcwd_usb
+pd
+pd6729
+pda_power
+pdc_adma
+pegasus
+penmount
+pf
+pg
+phantom
+phonedev
+phonet
+phram
+physmap
+physmap_of
+pktcdvd
+pktgen
+pl2303
+platform_lcd
+plat_nand
+plat-ram
+plip
+plusb
+pluto2
+pm2fb
+pm3fb
+pmac_zilog
+pmc551
+pmcraid
+pn_pep
+powermate
+ppa
+ppdev
+ppp_async
+ppp_deflate
+ppp_generic
+ppp_mppe
+pppoatm
+pppoe
+pppol2tp
+pppox
+ppp_synctty
+pps_core
+prism54
+ps3disk
+ps3flash
+ps3_gelic
+ps3-lpm
+ps3rom
+ps3stor_lib
+ps3vram
+psmouse
+pt
+pvrusb2
+pwc
+qcserial
+qinfo_probe
+qla1280
+qla2xxx
+qla3xxx
+qla4xxx
+qlge
+qlogic_cs
+qlogicfas408
+qnx4
+qsemi
+qt1010
+quickcam_messenger
+quota_tree
+quota_v1
+quota_v2
+r128
+r8169
+r8a66597-hcd
+rack-meter
+radeon
+radio-gemtek-pci
+radio-i2c-si470x
+radio-maestro
+radio-maxiradio
+radio-mr800
+radio-si4713
+radio-tea5764
+raid0
+raid1
+raid10
+raid456
+raid6_pq
+raid6test
+raid_class
+ramzswap
+raw
+raw1394
+ray_cs
+rdma_cm
+rdma_ucm
+redboot
+reed_solomon
+reiserfs
+rfc1051
+rfc1201
+rfcomm
+rfd_ftl
+rfkill
+ricoh_mmc
+rio500
+riscom8
+rivafb
+rmd128
+rmd160
+rmd256
+rmd320
+rndis_host
+rocket
+romfs
+rose
+rotary_encoder
+rpcsec_gss_krb5
+rpcsec_gss_spkm3
+rrunner
+rsrc_nonstatic
+rt2400pci
+rt2500pci
+rt2500usb
+rt2800usb
+rt2x00lib
+rt2x00pci
+rt2x00usb
+rt61pci
+rt73usb
+rtc-ab3100
+rtc-bq4802
+rtc-cmos
+rtc_cmos_setup
+rtc-ds1286
+rtc-ds1305
+rtc-ds1307
+rtc-ds1374
+rtc-ds1390
+rtc-ds1511
+rtc-ds1553
+rtc-ds1672
+rtc-ds1742
+rtc-ds3234
+rtc-fm3130
+rtc-generic
+rtc-isl1208
+rtc-m41t80
+rtc-m41t94
+rtc-m48t35
+rtc-m48t59
+rtc-m48t86
+rtc-max6900
+rtc-max6902
+rtc-pcf2123
+rtc-pcf50633
+rtc-pcf8563
+rtc-pcf8583
+rtc-ps3
+rtc-r9701
+rtc-rs5c348
+rtc-rs5c372
+rtc-rx8025
+rtc-rx8581
+rtc-s35390a
+rtc-stk17ta8
+rtc-twl4030
+rtc-v3020
+rtc-wm831x
+rtc-wm8350
+rtc-x1205
+rtl8150
+rtl8187
+rxkad
+s1d13xxxfb
+s2255drv
+s2io
+s3fb
+s5h1409
+s5h1411
+s5h1420
+saa5246a
+saa5249
+saa6588
+saa6752hs
+saa7110
+saa7115
+saa7127
+saa7134
+saa7134-alsa
+saa7134-dvb
+saa7134-empress
+saa7146
+saa7146_vv
+saa7164
+saa717x
+saa7185
+saa7191
+safe_serial
+sata_inic162x
+sata_mv
+sata_nv
+sata_promise
+sata_qstor
+sata_sil
+sata_sil24
+sata_sis
+sata_sx4
+sata_uli
+sata_via
+sata_vsc
+savage
+savagefb
+sbp2
+sc92031
+sch_atm
+sch_cbq
+sch_drr
+sch_dsmark
+sch_gred
+sch_hfsc
+sch_htb
+sch_ingress
+sch_multiq
+sch_netem
+sch_prio
+sch_red
+sch_sfq
+sch_tbf
+sch_teql
+sco
+scsi_debug
+scsi_dh
+scsi_dh_alua
+scsi_dh_emc
+scsi_dh_hp_sw
+scsi_dh_rdac
+scsi_tgt
+scsi_transport_fc
+scsi_transport_iscsi
+scsi_transport_sas
+scsi_transport_spi
+scsi_transport_srp
+scsi_wait_scan
+sctp
+sdhci
+sdhci-of
+sdhci-pci
+sdhci-pltfm
+sdio_uart
+sd_mod
+sdricoh_cs
+se401
+seed
+serial_core
+serial_cs
+serio_raw
+sermouse
+serpent
+serport
+sfc
+sg
+sha1_generic
+sha256_generic
+sha512_generic
+sht15
+si21xx
+si4713-i2c
+sidewinder
+siemens_mpi
+sierra
+sir-dev
+sis
+sis190
+sis5595
+sis900
+sisfb
+sisusbvga
+sit
+sja1000
+sja1000_of_platform
+sja1000_platform
+skfp
+skge
+sky2
+sl811_cs
+sl811-hcd
+slhc
+slip
+slram
+sm501
+sm501fb
+smbfs
+smc91c92_cs
+smsc
+smsc47b397
+smsc47m1
+smsc47m192
+smsc9420
+smsc95xx
+smsc-ircc2
+smsdvb
+smsmdtv
+smssdio
+smsusb
+sn9c102
+snd
+snd-ac97-codec
+snd-ad1889
+snd-ak4114
+snd-ak4117
+snd-ak4xxx-adda
+snd-ali5451
+snd-als300
+snd-als4000
+snd-aoa
+snd-aoa-codec-onyx
+snd-aoa-codec-tas
+snd-aoa-codec-toonie
+snd-aoa-fabric-layout
+snd-aoa-i2sbus
+snd-aoa-soundbus
+snd-atiixp
+snd-atiixp-modem
+snd-au8810
+snd-au8820
+snd-au8830
+snd-aw2
+snd-azt3328
+snd-bt87x
+snd-ca0106
+snd-cmipci
+snd-cs4281
+snd-cs46xx
+snd-cs5530
+snd-cs5535audio
+snd-cs8427
+snd-ctxfi
+snd-darla20
+snd-darla24
+snd-dummy
+snd-echo3g
+snd-emu10k1
+snd-emu10k1-synth
+snd-emu10k1x
+snd-emux-synth
+snd-ens1370
+snd-ens1371
+snd-es1938
+snd-es1968
+snd-fm801
+snd-gina20
+snd-gina24
+snd-hda-codec
+snd-hda-codec-analog
+snd-hda-codec-atihdmi
+snd-hda-codec-ca0110
+snd-hda-codec-cirrus
+snd-hda-codec-cmedia
+snd-hda-codec-conexant
+snd-hda-codec-idt
+snd-hda-codec-intelhdmi
+snd-hda-codec-nvhdmi
+snd-hda-codec-realtek
+snd-hda-codec-si3054
+snd-hda-codec-via
+snd-hda-intel
+snd-hdsp
+snd-hdspm
+snd-hrtimer
+snd-hwdep
+snd-i2c
+snd-ice1712
+snd-ice1724
+snd-ice17xx-ak4xxx
+snd-indigo
+snd-indigodj
+snd-indigodjx
+snd-indigoio
+snd-indigoiox
+snd-intel8x0
+snd-intel8x0m
+snd-korg1212
+snd-layla20
+snd-layla24
+snd-lx6464es
+snd-maestro3
+snd-mia
+snd-mixart
+snd-mixer-oss
+snd-mona
+snd-mpu401
+snd-mpu401-uart
+snd-mtpav
+snd-mts64
+snd-nm256
+snd-opl3-lib
+snd-opl3-synth
+snd-page-alloc
+snd-pcm
+snd-pcm-oss
+snd-pcxhr
+snd-pdaudiocf
+snd-portman2x4
+snd-powermac
+snd_ps3
+snd-pt2258
+snd-rawmidi
+snd-riptide
+snd-rme32
+snd-rme96
+snd-rme9652
+snd-sb16-dsp
+snd-sb-common
+snd-seq
+snd-seq-device
+snd-seq-dummy
+snd-seq-midi
+snd-seq-midi-emul
+snd-seq-midi-event
+snd-seq-oss
+snd-seq-virmidi
+snd-serial-u16550
+snd-soc-ad1836
+snd-soc-ad1938
+snd-soc-ad73311
+snd-soc-ak4104
+snd-soc-ak4535
+snd-soc-ak4642
+snd-soc-core
+snd-soc-cs4270
+snd-soc-l3
+snd-soc-max9877
+snd-soc-pcm3008
+snd-soc-spdif
+snd-soc-ssm2602
+snd-soc-tlv320aic23
+snd-soc-tlv320aic26
+snd-soc-tlv320aic3x
+snd-soc-twl4030
+snd-soc-uda134x
+snd-soc-uda1380
+snd-soc-wm8350
+snd-soc-wm8400
+snd-soc-wm8510
+snd-soc-wm8523
+snd-soc-wm8580
+snd-soc-wm8728
+snd-soc-wm8731
+snd-soc-wm8750
+snd-soc-wm8753
+snd-soc-wm8776
+snd-soc-wm8900
+snd-soc-wm8903
+snd-soc-wm8940
+snd-soc-wm8960
+snd-soc-wm8961
+snd-soc-wm8971
+snd-soc-wm8974
+snd-soc-wm8988
+snd-soc-wm8990
+snd-soc-wm8993
+snd-soc-wm9081
+snd-soc-wm-hubs
+snd-sonicvibes
+snd-tea575x-tuner
+snd-timer
+snd-trident
+snd-usb-audio
+snd-usb-caiaq
+snd-usb-lib
+snd-usb-usx2y
+snd-util-mem
+snd-via82xx
+snd-via82xx-modem
+snd-virmidi
+snd-vx222
+snd-vx-lib
+snd-vxpocket
+snd-ymfpci
+soc_camera
+soc_camera_platform
+softdog
+solos-pci
+soundcore
+sound_firmware
+sp8870
+sp887x
+spaceball
+spaceorb
+spcp8x5
+specialix
+spectrum_cs
+speedtch
+spi_bitbang
+spi_butterfly
+spidev
+spi_gpio
+spi_lm70llp
+spufs
+squashfs
+sr_mod
+ssb
+ssfdc
+sst25l
+st
+stallion
+starfire
+stb6000
+ste10Xp
+stex
+stinger
+stir4200
+stowaway
+stp
+strip
+stv0288
+stv0297
+stv0299
+stv0900
+stv6110
+stv680
+sundance
+sungem
+sungem_phy
+sunhme
+suni
+sunkbd
+sunrpc
+svcrdma
+svgalib
+sx8
+sym53c500_cs
+sym53c8xx
+symbolserial
+synaptics_i2c
+synclink
+synclink_cs
+synclink_gt
+synclinkmp
+sysv
+tcm825x
+tcp_bic
+tcp_highspeed
+tcp_htcp
+tcp_hybla
+tcp_illinois
+tcp_lp
+tcp_probe
+tcp_scalable
+tcp_vegas
+tcp_veno
+tcp_westwood
+tcp_yeah
+tcrypt
+tda10021
+tda10023
+tda10048
+tda1004x
+tda10086
+tda18271
+tda7432
+tda8083
+tda826x
+tda827x
+tda8290
+tda9840
+tda9875
+tda9887
+tdfx
+tdo24m
+tea
+tea5761
+tea5767
+tea6415c
+tea6420
+tehuti
+tekram-sir
+tg3
+tgr192
+therm_pm72
+thmc50
+ths7303
+tifm_7xx1
+tifm_core
+tifm_sd
+timeriomem-rng
+tipc
+ti_usb_3410_5052
+tlan
+tle62x0
+tlv320aic23b
+tmdc
+tmiofb
+tmp401
+tmp421
+tms380tr
+tmscsim
+tmspci
+toim3232-sir
+touchit213
+touchright
+touchwin
+tpm
+tpm_atmel
+tpm_nsc
+tps65023-regulator
+tps6507x-regulator
+trancevibrator
+tridentfb
+ts_bm
+tsc2007
+ts_fsm
+ts_kmp
+tsl2550
+ttm
+ttpci-eeprom
+ttusb_dec
+ttusbdecfe
+tulip
+tuner
+tuner-simple
+tuner-types
+tuner-xc2028
+tunnel4
+tunnel6
+turbografx
+tvaudio
+tveeprom
+tvp514x
+tvp5150
+tw9910
+twidjoy
+twl4030-gpio
+twl4030_keypad
+twl4030-pwrbutton
+twl4030-usb
+twl4030_wdt
+twofish
+twofish_common
+typhoon
+u132-hcd
+ubi
+ubifs
+ucb1400_core
+ucb1400_ts
+udf
+ueagle-atm
+ufs
+uinput
+uio
+uio_aec
+uio_cif
+uio_pci_generic
+uio_pdrv
+uio_pdrv_genirq
+uio_sercos3
+uio_smx
+uli526x
+ultracam
+umc
+umem
+ums-alauda
+ums-cypress
+ums-datafab
+ums-freecom
+ums-isd200
+ums-jumpshot
+ums-karma
+ums-onetouch
+ums-sddr09
+ums-sddr55
+ums-usbat
+uninorth-agp
+upd64031a
+upd64083
+usb8xxx
+usbatm
+usb_debug
+usbhid
+usblcd
+usbled
+usblp
+usbnet
+usbserial
+usbsevseg
+usb-storage
+usbtest
+usbtmc
+usbtouchscreen
+usbvideo
+usbvision
+userspace-consumer
+uss720
+uvcvideo
+uvesafb
+uwb
+v4l1-compat
+v4l2-common
+v4l2-compat-ioctl32
+v4l2-int-device
+vcan
+ves1820
+ves1x93
+veth
+vfat
+vgastate
+vgg2432a4
+via
+via686a
+viafb
+via-ircc
+via-rhine
+via-sdmmc
+via-velocity
+vicam
+video1394
+videobuf-core
+videobuf-dma-sg
+videobuf-dvb
+videobuf-vmalloc
+videodev
+virtio
+virtio_balloon
+virtio_blk
+virtio_console
+virtio_net
+virtio_pci
+virtio_ring
+virtio-rng
+virtual
+visor
+vitesse
+vivi
+vlsi_ir
+vmac
+vp27smpx
+vpx3220
+vstusb
+vsxxxaa
+vt1211
+vt8231
+vt8623fb
+vxge
+w1_bq27000
+w1_ds2431
+w1_ds2433
+w1_ds2760
+w1-gpio
+w1_smem
+w1_therm
+w83627ehf
+w83627hf
+w83781d
+w83791d
+w83792d
+w83793
+w83977af_ir
+w83l785ts
+w9966
+w9968cf
+wacom_w8001
+walkera0701
+wanrouter
+wanxl
+warrior
+wavelan_cs
+wbsd
+wdrtas
+wdt_pci
+whci
+whci-hcd
+whc-rc
+whiteheat
+wimax
+winbond-840
+windfarm_core
+windfarm_cpufreq_clamp
+windfarm_lm75_sensor
+windfarm_max6690_sensor
+windfarm_pid
+windfarm_pm112
+windfarm_pm121
+windfarm_pm81
+windfarm_pm91
+windfarm_smu_controls
+windfarm_smu_sat
+windfarm_smu_sensors
+wire
+wl1251
+wl1251_sdio
+wl1251_spi
+wl1271
+wl3501_cs
+wlp
+wm831x
+wm831x_bl
+wm831x-dcdc
+wm831x-gpio
+wm831x-hwmon
+wm831x-isink
+wm831x-ldo
+wm831x-on
+wm831x_power
+wm831x_wdt
+wm8350
+wm8350-hwmon
+wm8350-i2c
+wm8350_power
+wm8350-regulator
+wm8350_wdt
+wm8400-core
+wm8400-regulator
+wm8739
+wm8775
+wm97xx-ts
+wp512
+wpan-class
+wusb-cbaf
+wusbcore
+wusb-wa
+x25
+x25_asy
+xc5000
+xcbc
+xfrm4_mode_beet
+xfrm4_mode_transport
+xfrm4_mode_tunnel
+xfrm4_tunnel
+xfrm6_mode_beet
+xfrm6_mode_ro
+xfrm6_mode_transport
+xfrm6_mode_tunnel
+xfrm6_tunnel
+xfrm_ipcomp
+xfrm_user
+xfs
+xhci
+xilinx_ps2
+xirc2ps_cs
+xircom_cb
+xor
+xpad
+xprtrdma
+x_tables
+xt_CLASSIFY
+xt_cluster
+xt_comment
+xt_connbytes
+xt_connlimit
+xt_connmark
+xt_CONNMARK
+xt_CONNSECMARK
+xt_conntrack
+xt_dccp
+xt_dscp
+xt_DSCP
+xt_esp
+xt_hashlimit
+xt_helper
+xt_hl
+xt_HL
+xtkbd
+xt_LED
+xt_length
+xt_limit
+xt_mac
+xt_mark
+xt_MARK
+xt_multiport
+xt_NFLOG
+xt_NFQUEUE
+xt_NOTRACK
+xt_osf
+xt_physdev
+xt_pkttype
+xt_policy
+xt_quota
+xt_realm
+xt_recent
+xts
+xt_sctp
+xt_SECMARK
+xt_socket
+xt_state
+xt_statistic
+xt_string
+xt_tcpmss
+xt_TCPMSS
+xt_tcpudp
+xt_time
+xt_TPROXY
+xt_TRACE
+xt_u32
+xusbatm
+xvmalloc
+yam
+yealink
+yellowfin
+yenta_socket
+zc0301
+zd1201
+zd1211rw
+zhenhua
+zl10036
+zl10039
+zl10353
+zlib
+zlib_deflate
+zr364xx
--- linux-mvl-dove-2.6.32.orig/debian.master/abi/2.6.32-34.73/powerpc/powerpc
+++ linux-mvl-dove-2.6.32/debian.master/abi/2.6.32-34.73/powerpc/powerpc
@@ -0,0 +1,9476 @@
+EXPORT_SYMBOL crypto/gf128mul 0x0c2f123f	gf128mul_4k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x1068004b	gf128mul_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x2f2889a0	gf128mul_init_64k_lle
+EXPORT_SYMBOL crypto/gf128mul 0x3755f990	gf128mul_init_64k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x384ef9ce	gf128mul_64k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x56af0dbd	gf128mul_x_ble
+EXPORT_SYMBOL crypto/gf128mul 0x83581089	gf128mul_init_4k_lle
+EXPORT_SYMBOL crypto/gf128mul 0x9b2560b9	gf128mul_init_4k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x9e13f6f6	gf128mul_lle
+EXPORT_SYMBOL crypto/gf128mul 0xbd17a0df	gf128mul_4k_lle
+EXPORT_SYMBOL crypto/gf128mul 0xc0890413	gf128mul_64k_lle
+EXPORT_SYMBOL crypto/gf128mul 0xd60736ec	gf128mul_free_64k
+EXPORT_SYMBOL crypto/xor 0x5b6c00e6	xor_blocks
+EXPORT_SYMBOL drivers/atm/suni 0x3b24fe72	suni_init
+EXPORT_SYMBOL drivers/atm/uPD98402 0x682e54e9	uPD98402_init
+EXPORT_SYMBOL drivers/block/loop 0xbfee3ad5	loop_unregister_transfer
+EXPORT_SYMBOL drivers/block/loop 0xf4ffa7ac	loop_register_transfer
+EXPORT_SYMBOL drivers/block/paride/paride 0x2801f135	pi_connect
+EXPORT_SYMBOL drivers/block/paride/paride 0x3caf4e79	pi_do_claimed
+EXPORT_SYMBOL drivers/block/paride/paride 0x492608e8	pi_schedule_claimed
+EXPORT_SYMBOL drivers/block/paride/paride 0x56311a60	paride_register
+EXPORT_SYMBOL drivers/block/paride/paride 0x5a8bedd0	pi_write_block
+EXPORT_SYMBOL drivers/block/paride/paride 0x70bdc7bf	paride_unregister
+EXPORT_SYMBOL drivers/block/paride/paride 0x7c833961	pi_write_regr
+EXPORT_SYMBOL drivers/block/paride/paride 0x916324ab	pi_disconnect
+EXPORT_SYMBOL drivers/block/paride/paride 0xa8711b82	pi_read_regr
+EXPORT_SYMBOL drivers/block/paride/paride 0xade156c9	pi_init
+EXPORT_SYMBOL drivers/block/paride/paride 0xc483114e	pi_read_block
+EXPORT_SYMBOL drivers/block/paride/paride 0xd1dd10d3	pi_release
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x0707c83c	agp_generic_alloc_by_type
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x10b04517	agp_generic_alloc_page
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x23349758	agp_generic_destroy_pages
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x2a68cc84	agp_generic_enable
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x30226ddf	agp_device_command
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x38e2d013	agp_copy_info
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x413dca4b	get_agp_version
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x4372d174	agp_generic_remove_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x43b190c7	agp_bind_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x4724e25c	agp_generic_free_gatt_table
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x4b085dbf	agp3_generic_configure
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x4d69a8b0	agp_generic_create_gatt_table
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x4dfce93f	agp_enable
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x58e86464	agp_generic_alloc_user
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x673f815e	agp_bridges
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x6d2ee0b8	agp_free_page_array
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x7538b132	agp_off
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x7823c048	agp_put_bridge
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x7acc21de	agp_bridge
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x7af29aeb	agp_unbind_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x81892411	agp_generic_mask_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x90d4e626	agp_backend_acquire
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x9da1c32f	agp_create_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xa4d4f0e6	global_cache_flush
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xa5a58a48	agp_free_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xb04ea8f0	agp_rebind_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xb59b62d6	agp_allocate_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xb9ac4d5b	agp_generic_alloc_pages
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xc2424641	agp3_generic_cleanup
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xc43e5464	agp_generic_insert_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xc5d9c46c	agp_try_unsupported_boot
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xc65abeb7	agp3_generic_sizes
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xc71d4cd2	agp_flush_chipset
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xc94b8bb1	agp_backend_release
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xcb3afb60	agp_alloc_bridge
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xcc917288	agp3_generic_tlbflush
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xd0fef3b2	agp_free_key
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xd23ef827	agp_collect_device_status
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xda4c2d3b	agp_generic_free_by_type
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xda96b2a8	agp_generic_type_to_mask_type
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xdb43f151	agp_find_bridge
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xde9b17ed	agp3_generic_fetch_size
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xe376c255	agp_alloc_page_array
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xfe8a1b8f	agp_generic_destroy_page
+EXPORT_SYMBOL drivers/char/apm-emulation 0x129e74f2	apm_get_power_status
+EXPORT_SYMBOL drivers/char/apm-emulation 0xdf3329b8	apm_queue_event
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x1254daa7	ipmi_register_smi
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x167565d4	ipmi_get_my_address
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x1f0453df	ipmi_set_gets_events
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x20c660a4	ipmi_smi_msg_received
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x26e396e0	ipmi_set_my_LUN
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x4031575c	ipmi_set_maintenance_mode
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x40f2b10c	ipmi_alloc_smi_msg
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x440f3b2a	ipmi_unregister_for_cmd
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x44f066bc	ipmi_register_for_cmd
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x4779072f	ipmi_set_my_address
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x4cbf8822	ipmi_get_my_LUN
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x59a141ee	ipmi_request_supply_msgs
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x5d8696b5	ipmi_smi_watcher_register
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x68aa3af7	ipmi_poll_interface
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x76e82902	ipmi_get_version
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x804f922a	ipmi_addr_length
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x81bad66b	ipmi_smi_watchdog_pretimeout
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x825b38f5	ipmi_create_user
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x9d5a5592	ipmi_get_maintenance_mode
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xa2bc73b0	ipmi_smi_add_proc_entry
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xc54111a1	ipmi_free_recv_msg
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xd1e284ef	ipmi_smi_watcher_unregister
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe39750ad	ipmi_destroy_user
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe4f4665b	ipmi_validate_addr
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xee0c82df	ipmi_unregister_smi
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xfa4c8b4f	ipmi_request_settime
+EXPORT_SYMBOL drivers/edac/edac_core 0x8d937703	edac_mc_handle_fbd_ue
+EXPORT_SYMBOL drivers/edac/edac_core 0x96e186eb	edac_mc_find
+EXPORT_SYMBOL drivers/edac/edac_core 0xf07b4128	edac_mc_handle_fbd_ce
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x04102ae0	drm_mode_attachmode_crtc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0612cc51	drm_mm_scan_remove_block
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0809b912	drm_core_ioremap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0836695c	drm_sman_takedown
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x088ddf1f	drm_mm_clean
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0c52ccac	drm_connector_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0c60867b	drm_mode_connector_detach_encoder
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0ce42175	drm_mode_config_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1771170f	drm_mm_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x17c2bd96	drm_gem_mmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1877211c	drm_framebuffer_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1b0b33d3	drm_irq_install
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1c2c5b8c	drm_put_dev
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1da1c287	drm_read
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1ee77efe	drm_ioctl
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1f072c59	drm_property_add_enum
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1f9dc880	drm_mode_detachmode_crtc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x20645642	drm_debug
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x21451ac4	drm_sman_owner_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x23b345a4	drm_sysfs_hotplug_event
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x23d6b597	drm_rmmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2435312f	drm_get_drawable_info
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x25da10a5	drm_agp_chipset_flush
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x25e0d8ae	drm_sg_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2723d74f	drm_exit
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2916bf63	drm_sman_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x29dac398	drm_mm_search_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2a7aedc4	drm_free_agp
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2a870576	drm_irq_uninstall
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2eb2f903	drm_sman_free_key
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3074f033	drm_order
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x337be897	drm_vblank_pre_modeset
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x37ea1ed8	drm_clflush_pages
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x383d7e1f	drm_property_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3a4ee52c	drm_vblank_post_modeset
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3c9a1409	drm_ht_just_insert_please
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3e6f3bd1	drm_agp_enable
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3ef120e7	drm_core_ioremapfree
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3f1dd72a	drm_mode_create_tv_properties
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4072d3de	drm_agp_info
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x40a8dfbe	drm_mode_connector_update_edid_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x451ad91b	drm_mode_remove
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x46d584d6	drm_cvt_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4956d419	drm_get_resource_len
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4ec3139c	drm_master_get
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4ed4f9bc	drm_add_modes_noedid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4ef4ba97	drm_crtc_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x51574863	drm_mmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5165ad59	drm_agp_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x532c9c43	drm_framebuffer_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x55f060ee	drm_sman_set_range
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x577f5c2e	drm_pci_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x580830f0	drm_mode_set_name
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x583989e8	drm_getsarea
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5b04983f	drm_unbind_agp
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5cb0cde5	drm_add_edid_modes
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5d0f8e7d	drm_mm_takedown
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5ea53c9c	drm_mm_debug_table
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5eca9af9	drm_mm_scan_add_block
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5f2805b6	drm_get_resource_start
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5f6951f0	drm_vblank_get
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x60ae4f72	drm_core_reclaim_buffers
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x62962662	drm_connector_attach_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x62ed2aef	drm_mode_create_dirty_info_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6566c539	drm_mm_put_block
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x66cd86b7	drm_mode_probed_add
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x68ca167d	drm_gem_handle_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x68d5ce19	drm_get_encoder_name
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x68e74f9a	drm_mode_duplicate
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6a017bbb	drm_get_dev
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6ad6125b	drm_i2c_encoder_destroy
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6d2e5837	drm_ut_debug_printk
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6f0880ab	drm_connector_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6f6a047a	drm_vblank_count
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6fc30481	drm_mode_hsync
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x70a9916c	drm_encoder_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x71a91d7b	drm_core_ioremap_wc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x73b942fe	drm_mode_object_find
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x784915eb	drm_mode_vrefresh
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7a8be215	drm_gtf_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7b2ba968	drm_vblank_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7becf9f2	drm_gem_object_handle_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7c1fd6c8	drm_mode_equal
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7dfe0b4b	drm_poll
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7f2bf8d0	drm_lock_take
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7f861d61	drm_crtc_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x815a2cb4	drm_i2c_encoder_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x81b936c8	drm_debugfs_remove_files
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x83a466f3	drm_mm_dump_table
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x83de39ed	drm_addbufs_pci
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x84da937b	drm_mode_create_scaling_mode_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8582edca	drm_agp_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x85de09f5	drm_mode_width
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x87d6e7ef	drm_detect_hdmi_monitor
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8903ea5d	drm_sysfs_connector_remove
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8cb46689	drm_lock_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x94ec6c2c	drm_addmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x964f69a8	drm_mode_connector_attach_encoder
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x98474a78	drm_mode_config_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x984a4fd1	drm_sysfs_connector_add
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x99303068	drm_gem_object_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x99bdb89e	drm_mode_create_dithering_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9a24ea8b	drm_debugfs_create_files
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9e9a7652	drm_vblank_off
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9ec7c478	drm_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa1eabd87	drm_mode_list_concat
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa76cc9b4	drm_ati_pcigart_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xaaa54017	drm_core_get_reg_ofs
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xae4a381a	drm_encoder_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xae4f58a8	drm_gem_vm_open
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xaf29788e	drm_sman_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb4052725	drm_idlelock_release
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb68386a4	drm_mode_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb782a44f	drm_vblank_put
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb834f692	drm_addbufs_agp
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb8c35edc	drm_mode_validate_clocks
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xbc2ffbe8	drm_mode_create_dvi_i_properties
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xbe5d5a14	drm_mode_prune_invalid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc1718cfd	drm_connector_property_set_value
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc19aa52e	drm_do_probe_ddc_edid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc3a412f7	drm_mode_connector_list_update
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc4f368ec	drm_ati_pcigart_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc5ba5df0	drm_pci_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc6794f16	drm_core_get_map_ofs
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcdf2eff4	drm_mode_height
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd08fa3f0	drm_mode_set_crtcinfo
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd14b9db8	drm_idlelock_take
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd2e568c3	drm_gem_vm_close
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3028e75	drm_sman_set_manager
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd384cfa2	drm_get_edid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3f2a994	drm_mm_pre_get
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3ffab51	drm_ht_remove
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd473578f	drm_rmmap_locked
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd9938344	drm_i_have_hw_lock
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdb7f62c8	drm_mm_get_block_generic
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd3febe2	drm_gem_object_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd49095c	drm_ht_insert_item
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe1457735	drm_ht_remove_item
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe24a7b88	drm_ht_find_item
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe4fec992	drm_handle_vblank
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe5bdce7e	drm_mode_debug_printmodeline
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe6db1cf3	drm_agp_acquire
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe919dd5c	drm_sman_owner_clean
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe98d3c90	drm_get_connector_name
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe9e511a9	drm_connector_property_get_value
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xeac6022c	drm_fasync
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xeb2ecbf2	drm_gem_object_lookup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xeb6c8f0d	drm_mm_init_scan
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xeecdbee9	drm_agp_bind_pages
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xef0a73d3	drm_mm_get_block_range_generic
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xef42644e	drm_mode_crtc_set_gamma_size
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf11a72a5	drm_agp_bind
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf1421d13	drm_mode_sort
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf1ada65c	drm_property_destroy
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf2f75812	drm_mm_search_free_in_range
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf42a2b26	drm_ht_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf91bb3a1	drm_release
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfa19c633	drm_mode_destroy
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfaf138e7	drm_master_put
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfc996e2f	drm_vblank_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfd854908	drm_agp_unbind
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfd9db163	drm_mode_validate_size
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfdfbad19	drm_sman_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfe169e7f	drm_agp_release
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfe370d8f	drm_open
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x0430c15b	drm_helper_probe_connector_modes
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x06c5b7fb	drm_fb_helper_setcmap
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x10878665	i2c_dp_aux_add_bus
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x2500bd72	drm_helper_encoder_in_use
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x2e16393d	drm_fb_helper_single_fb_probe
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x3509d913	drm_fb_helper_fill_var
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x4149974d	drm_fb_helper_set_par
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x415e2f62	drm_crtc_helper_set_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x421e87a6	drm_fb_helper_init_crtc_count
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x56c08d40	drm_helper_resume_force_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x63b78959	drm_fb_helper_pan_display
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x69de7c4e	drm_helper_probe_single_connector_modes
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x6ca23053	drm_fb_helper_setcolreg
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x74099030	drm_fb_helper_blank
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x7d11fa9f	drm_fb_helper_free
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x967ea1a9	drm_helper_initial_config
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x9d251144	drm_fb_helper_panic
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xa3c6a0fd	drm_fb_helper_add_connector
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xb44c4b1a	drm_crtc_helper_set_config
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xc158e32e	drm_helper_crtc_in_use
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xc469c244	drm_fb_helper_restore
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xcc675181	drm_fb_helper_check_var
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xd194243d	drm_helper_disable_unused_functions
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xd9f4cb6a	drm_helper_connector_dpms
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xe92af6f1	drm_helper_mode_fill_fb_struct
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xef66d14f	drm_fb_helper_fill_fix
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xf612c148	drm_helper_hotplug_stage_two
+EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0x2f5ef1f3	radeonfb_resize
+EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0x766743e0	radeonfb_remove
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x0270bb64	ttm_bo_device_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x07787990	ttm_bo_global_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x0bb6c056	ttm_bo_synccpu_write_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x0de98dc9	ttm_write_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x132b05be	ttm_round_pot
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x149c4c70	ttm_mem_global_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x1bc1381a	ttm_bo_mmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x1c5679ad	ttm_ref_object_add
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x1debfa1a	ttm_mem_global_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x219b251c	ttm_mem_global_alloc
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x22d8c4b4	ttm_suspend_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x24536b5d	ttm_write_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x2abc11d1	ttm_bo_move_accel_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x34704ea7	ttm_global_item_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x365feb2e	ttm_eu_reserve_buffers
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x36bd0747	ttm_bo_evict_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x376ac7be	ttm_read_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x3c3c3af1	ttm_bo_global_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x424d6505	ttm_bo_device_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x47a2658f	ttm_bo_wait
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x4ea73215	ttm_bo_reserve
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x59609446	ttm_suspend_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x5e69f585	ttm_base_object_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x61bdb34f	ttm_eu_fence_buffer_objects
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x62421faa	ttm_ref_object_base_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x65c9ebe6	ttm_tt_populate
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x66666d70	ttm_global_item_ref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x6a6eb82e	ttm_bo_wait_unreserved
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x6c9c44d8	ttm_bo_clean_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x802d320c	ttm_bo_wait_cpu
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x80d35dda	ttm_object_device_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x842962e4	ttm_bo_init_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x86a4066d	ttm_eu_backoff_reservation
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x887bf5ba	ttm_fbdev_mmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x8f264193	ttm_agp_backend_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x938975bb	ttm_object_device_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x9c08fea2	ttm_tt_bind
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x9c7d4cb5	ttm_bo_mem_space
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x9d815cd1	ttm_mem_global_free
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xa77b51bc	ttm_vt_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xacc80e98	ttm_read_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb11fabf3	ttm_bo_move_ttm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb2c08e8d	ttm_tt_set_placement_caching
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb8f9d883	ttm_lock_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xbc43b03e	ttm_base_object_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xbe2331a5	ttm_bo_kunmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc409eeae	ttm_bo_move_memcpy
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc43b400c	ttm_vt_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xcb9ab3c3	ttm_bo_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xd318de28	ttm_bo_validate
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xd3202caa	ttm_bo_kmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xdc8573ea	ttm_bo_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xdd897b88	ttm_bo_unreserve
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xe145c33f	ttm_object_file_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xe25f2d4d	ttm_bo_swapout_all
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xe39e4134	ttm_base_object_lookup
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xf81debea	ttm_bo_synccpu_write_grab
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xfda31e08	ttm_object_file_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xfe362a63	ttm_io_prot
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xff890798	ttm_bo_unmap_virtual
+EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0x0903c239	vid_from_reg
+EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0xef1c781c	vid_which_vrm
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0x6a0eb93d	i2c_pca_add_bus
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0x8ae30815	i2c_pca_add_numbered_bus
+EXPORT_SYMBOL drivers/i2c/busses/i2c-amd756 0x0f1407a8	amd756_smbus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x032c72c4	hpsb_add_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0849cba7	hpsb_iso_recv_listen_channel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0e903f45	hpsb_free_tlabel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x15842822	hpsb_bus_reset
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x15f85242	hpsb_iso_recv_start
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x191b0ea3	hpsb_iso_recv_flush
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1a200e5a	csr1212_release_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1e9de7f2	hpsb_free_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1fd8e8b9	hpsb_register_highlevel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x219cbabe	dma_region_offset_to_bus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x245922ee	hpsb_set_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2983b7db	hpsb_get_hostinfo_bykey
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2a4cc36b	csr1212_attach_keyval_to_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2aa3130c	hpsb_iso_xmit_sync
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2da548eb	hpsb_resume_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2ff4fe36	hpsb_iso_packet_sent
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x32d1eeb0	hpsb_set_hostinfo_key
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x33c776b1	hpsb_read
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3a9b38f0	hpsb_remove_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3b44b992	hpsb_get_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3d6de812	hpsb_update_config_rom
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x564a7e0e	hpsb_make_streampacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5f5fdd2f	csr1212_new_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5fa237ff	hpsb_make_writepacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x61915caa	hpsb_unregister_highlevel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x672ad148	dma_region_sync_for_device
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x67cf5122	hpsb_protocol_class
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6ad945be	hpsb_send_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6b41654f	hpsb_iso_shutdown
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6d5e0914	hpsb_set_packet_complete_task
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x76bc1a5c	dma_region_free
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x843030b8	hpsb_iso_xmit_queue_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x85106eeb	dma_region_mmap
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8879f8f0	dma_region_sync_for_cpu
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8b03d686	hpsb_iso_xmit_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8c7f4c70	hpsb_register_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8dc83281	hpsb_iso_recv_unlisten_channel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8ec2b312	dma_region_alloc
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x94bce230	csr1212_get_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x94eb1832	hpsb_packet_sent
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x979b3052	dma_prog_region_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x97cf6bc9	hpsb_iso_wake
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x97ea3167	hpsb_unregister_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x996b378a	hpsb_read_cycle_timer
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9c47f2cb	hpsb_iso_recv_set_channel_mask
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9d79a23f	hpsb_selfid_complete
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9eadc4a0	hpsb_make_phypacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa2c6950d	hpsb_make_lockpacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa924dac6	dma_prog_region_alloc
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaef57bb5	csr1212_detach_keyval_from_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaefbd374	csr1212_parse_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb4d11640	hpsb_allocate_and_register_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb9f5c3dc	hpsb_create_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xba691a35	hpsb_iso_packet_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbba70620	dma_prog_region_free
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbe80d2b1	hpsb_get_tlabel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc0a004f4	hpsb_iso_recv_release_packets
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc0f1dc32	hpsb_iso_xmit_start
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc2651eb6	hpsb_destroy_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc40dfe7d	hpsb_make_readpacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xccfca8ba	__hpsb_register_protocol
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd01c96ba	hpsb_reset_bus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd5cd505b	hpsb_make_lock64packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xda741fed	hpsb_write
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xdbe0c17c	hpsb_update_config_rom_image
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xdcffa199	hpsb_lock
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe2f5e90f	hpsb_packet_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe8f1bc30	hpsb_unregister_protocol
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xea4152ff	dma_region_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xea4a9273	hpsb_iso_n_ready
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xeb43944d	hpsb_node_write
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xef1541a6	hpsb_alloc_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf217d066	hpsb_alloc_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf4698e77	hpsb_node_fill_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf507080e	hpsb_selfid_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfab27536	csr1212_read
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfaebfb7a	hpsb_packet_success
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfba57f51	hpsb_speedto_str
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfc780c8e	hpsb_iso_stop
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfcd7f994	hpsb_iso_recv_init
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x1d5aeebc	ohci1394_init_iso_tasklet
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x6cb4c706	ohci1394_stop_context
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x7f69982d	ohci1394_register_iso_tasklet
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0xea7f2e2c	ohci1394_unregister_iso_tasklet
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x07fb66d5	rdma_translate_ip
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x08a37740	rdma_addr_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x6907f68c	rdma_copy_addr
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x8811b5aa	rdma_resolve_ip
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xb0900f14	rdma_addr_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xc599ee4b	rdma_addr_cancel
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x038380e5	ib_send_cm_apr
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x2c28c663	ib_send_cm_rej
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x384e9320	ib_destroy_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x3b0154d8	ib_create_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x462f4015	ib_send_cm_drep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x4af26e02	ib_send_cm_mra
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xad519991	ib_send_cm_sidr_rep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xb5a05bdc	ib_send_cm_lap
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xb7c9830a	ib_cm_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xbea34dd1	ib_send_cm_rep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xc9ef60c8	ib_cm_notify
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xd292c1e7	ib_cm_listen
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xda7a14e4	ib_send_cm_sidr_req
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xef8ef013	ib_send_cm_dreq
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xf433d7ce	ib_send_cm_rtu
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xfc2fdd31	ib_send_cm_req
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xfe210e28	cm_class
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x050d20e3	ib_find_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x058f1602	ib_modify_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0d3d890f	ib_unregister_event_handler
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0e73c5b7	ib_create_ah_from_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0fedbe31	ib_destroy_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x130929b4	ib_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x150b330e	ib_get_cached_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x19e96771	ib_get_cached_lmc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1b355c9e	ib_fmr_pool_map_phys
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1b414afc	ib_resize_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1d5aa4d6	ib_dealloc_mw
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1e491a04	ib_unmap_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2118b0dc	ib_alloc_fast_reg_page_list
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x28dc3617	ib_find_cached_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2b7f876c	ib_flush_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2ce4cbb0	ib_create_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x313d2ab6	ib_get_cached_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x313e988a	ib_dealloc_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3b4e3dd5	ib_rereg_phys_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3bed1b1f	ib_create_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3c195cef	ib_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3cf234c4	ib_destroy_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3f7567fd	ib_rate_to_mult
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3f9e3fc1	ib_alloc_pd
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x401e74ef	ib_destroy_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x47b44f0f	ib_query_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4c5fe458	ib_umem_get
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x517bd817	ib_alloc_mw
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x51cc7f71	ib_umem_page_count
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x520b2638	ib_pack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x55a89301	ib_get_client_data
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x663d71e9	ib_query_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x667a8d16	ib_find_cached_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x73a62444	ib_init_ah_from_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x78808419	ib_modify_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x838f8b48	ib_query_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8405037d	ib_alloc_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x84faab25	ib_dealloc_pd
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8640eaeb	ib_modify_qp_is_ok
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x87b614d8	ib_ud_header_pack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8895aabf	ib_alloc_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x89bca5cb	ib_modify_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8da9df04	ib_attach_mcast
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8fc13798	ib_register_event_handler
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x94ccff84	ib_query_port
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x959a2957	ib_dereg_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x96ce6c46	rdma_node_get_transport
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9b119bba	ib_query_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9d804fa1	mult_to_ib_rate
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9ed103b0	ib_destroy_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa5274742	ib_unregister_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xaafd1565	ib_alloc_fast_reg_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xad576cb4	ib_create_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xaf7ce99a	ib_modify_port
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb0307ef3	ib_get_dma_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb1a312e1	ib_unpack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb77495c5	ib_dealloc_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xbd008b3c	ib_dispatch_event
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc8cd8bf4	ib_find_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc956f43e	ib_detach_mcast
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc97f21ba	ib_set_client_data
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd08f0a7e	ib_query_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd17ba9d1	ib_ud_header_init
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd3c86d13	ib_register_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd793b795	ib_create_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xde76d907	ib_free_fast_reg_page_list
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe1cdf2a4	ib_umem_release
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xebe380b0	ib_create_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xef83f8f5	ib_fmr_pool_unmap
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf1972f0d	ib_modify_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf1cba345	ib_query_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf1f58626	ib_destroy_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf36498b9	ib_ud_header_unpack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf56d55e2	ib_reg_phys_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf8192b25	ib_modify_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xffc5ea6a	ib_query_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6c8890bc	ib_redirect_mad_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6ef787ed	ib_response_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6f077fcf	ib_get_mad_data_offset
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x7224dd82	ib_post_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x7b5d4b7a	ib_is_mad_class_rmpp
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x8c6605c4	ib_get_rmpp_segment
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x97535b50	ib_unregister_mad_agent
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xa8707613	ib_modify_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xab912278	ib_free_recv_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xbf93bff1	ib_process_mad_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xd04e93c4	ib_create_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xd948deca	ib_free_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xdd23fa88	ib_register_mad_snoop
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xdf532306	ib_cancel_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xfe93c677	ib_register_mad_agent
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x16587f33	ib_sa_service_rec_query
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x2ebbb31b	ib_sa_cancel_query
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x576fdbac	ib_sa_free_multicast
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x5d72dabc	ib_sa_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x7395e51f	ib_init_ah_from_path
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x73a64cb5	ib_sa_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x77e8111c	ib_sa_path_rec_get
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x917794ff	ib_sa_get_mcmember_rec
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xa0e6c115	ib_init_ah_from_mcmember
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xe034fd02	ib_sa_join_multicast
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x02f847bc	ib_copy_path_rec_from_user
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x07cf5a51	ib_copy_ah_attr_to_user
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x18382f6a	ib_copy_path_rec_to_user
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x184f3575	ib_copy_qp_attr_to_user
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x12c405c5	iw_cm_disconnect
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x1c981364	iw_destroy_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x3694caa7	iw_cm_connect
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x49ba7a61	iw_create_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x69c88683	iw_cm_accept
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xa8a9cb45	iw_cm_reject
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xbea77098	iw_cm_listen
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xe91ff830	iw_cm_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x0746b300	rdma_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x1004316c	rdma_create_qp
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x187de9cc	rdma_set_ib_paths
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x199c1aed	rdma_accept
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x21606083	rdma_bind_addr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x24806121	rdma_destroy_id
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x31d2c2a6	rdma_leave_multicast
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x42fc043d	rdma_connect
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x55bfbe0a	rdma_destroy_qp
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x63f16866	rdma_listen
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x65fb9014	rdma_notify
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x6df3a0ab	rdma_resolve_route
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x8115eccf	rdma_disconnect
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xbe99251b	rdma_set_service_type
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xc2a08fea	rdma_join_multicast
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xd8e32038	rdma_resolve_addr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xdfd4024c	rdma_reject
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xe134d46a	rdma_create_id
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x3a2a2133	__gameport_register_driver
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x65ee1ae6	gameport_unregister_port
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x681c1fb4	gameport_open
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x7afef792	gameport_stop_polling
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x7c30234b	gameport_set_phys
+EXPORT_SYMBOL drivers/input/gameport/gameport 0xa1a8867d	gameport_start_polling
+EXPORT_SYMBOL drivers/input/gameport/gameport 0xc9036624	__gameport_register_port
+EXPORT_SYMBOL drivers/input/gameport/gameport 0xf3d57cea	gameport_unregister_driver
+EXPORT_SYMBOL drivers/input/gameport/gameport 0xfa28d653	gameport_close
+EXPORT_SYMBOL drivers/input/input-polldev 0x16edc555	input_register_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0x2f0fcf76	input_allocate_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0x57835506	input_unregister_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0xc89350f8	input_free_polled_device
+EXPORT_SYMBOL drivers/md/dm-log 0x12d0acbf	dm_dirty_log_type_unregister
+EXPORT_SYMBOL drivers/md/dm-log 0x6fa83144	dm_dirty_log_create
+EXPORT_SYMBOL drivers/md/dm-log 0x82fcc456	dm_dirty_log_destroy
+EXPORT_SYMBOL drivers/md/dm-log 0xf3860fa7	dm_dirty_log_type_register
+EXPORT_SYMBOL drivers/md/dm-snapshot 0x07e89d7f	dm_exception_store_type_register
+EXPORT_SYMBOL drivers/md/dm-snapshot 0x4cc9b73c	dm_exception_store_create
+EXPORT_SYMBOL drivers/md/dm-snapshot 0xd2500858	dm_exception_store_destroy
+EXPORT_SYMBOL drivers/md/dm-snapshot 0xe9e91e63	dm_exception_store_type_unregister
+EXPORT_SYMBOL drivers/md/md-mod 0x0185a35d	md_check_recovery
+EXPORT_SYMBOL drivers/md/md-mod 0x05ee58f0	md_wakeup_thread
+EXPORT_SYMBOL drivers/md/md-mod 0x07499ad8	bitmap_cond_end_sync
+EXPORT_SYMBOL drivers/md/md-mod 0x0efc3a19	md_integrity_register
+EXPORT_SYMBOL drivers/md/md-mod 0x356f32c0	md_register_thread
+EXPORT_SYMBOL drivers/md/md-mod 0x37b04d78	register_md_personality
+EXPORT_SYMBOL drivers/md/md-mod 0x67b1d82d	md_write_start
+EXPORT_SYMBOL drivers/md/md-mod 0x6f8da657	md_write_end
+EXPORT_SYMBOL drivers/md/md-mod 0x83095c6a	bitmap_end_sync
+EXPORT_SYMBOL drivers/md/md-mod 0x8a7b8b66	md_check_no_bitmap
+EXPORT_SYMBOL drivers/md/md-mod 0x8d2a6939	md_done_sync
+EXPORT_SYMBOL drivers/md/md-mod 0x9332c5b0	bitmap_unplug
+EXPORT_SYMBOL drivers/md/md-mod 0x93791918	md_error
+EXPORT_SYMBOL drivers/md/md-mod 0x9d47faab	md_set_array_sectors
+EXPORT_SYMBOL drivers/md/md-mod 0xb28585db	bitmap_close_sync
+EXPORT_SYMBOL drivers/md/md-mod 0xbd8e5ebb	md_integrity_add_rdev
+EXPORT_SYMBOL drivers/md/md-mod 0xc676c2d0	md_unregister_thread
+EXPORT_SYMBOL drivers/md/md-mod 0xc6872dc5	bitmap_start_sync
+EXPORT_SYMBOL drivers/md/md-mod 0xce17e40b	bitmap_startwrite
+EXPORT_SYMBOL drivers/md/md-mod 0xd4022b63	unregister_md_personality
+EXPORT_SYMBOL drivers/md/md-mod 0xe3873c5f	bitmap_endwrite
+EXPORT_SYMBOL drivers/md/md-mod 0xf870244c	mddev_congested
+EXPORT_SYMBOL drivers/md/md-mod 0xfaedc8f7	md_wait_for_blocked_rdev
+EXPORT_SYMBOL drivers/md/raid6_pq 0x0bd662f6	raid6_gfmul
+EXPORT_SYMBOL drivers/md/raid6_pq 0x15fe0cd3	raid6_gfexp
+EXPORT_SYMBOL drivers/md/raid6_pq 0x5ba93f9d	raid6_gfinv
+EXPORT_SYMBOL drivers/md/raid6_pq 0x7456cc61	raid6_empty_zero_page
+EXPORT_SYMBOL drivers/md/raid6_pq 0xce45a6f1	raid6_gfexi
+EXPORT_SYMBOL drivers/media/common/tuners/mc44s803 0x56e8044a	mc44s803_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mt2060 0x6af595c9	mt2060_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mt2131 0x717df829	mt2131_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mt2266 0xe4c2b156	mt2266_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mxl5005s 0xfd36c979	mxl5005s_attach
+EXPORT_SYMBOL drivers/media/common/tuners/qt1010 0xade35bbf	qt1010_attach
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0x0cb4b189	tuners
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0xc2821775	tuner_count
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-xc2028 0x8e690b50	xc2028_attach
+EXPORT_SYMBOL drivers/media/common/tuners/xc5000 0xd6c1d989	xc5000_attach
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x02a66a89	flexcop_sram_ctrl
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x14e609c6	flexcop_i2c_request
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x2710b390	flexcop_pass_dmx_packets
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x3543c52a	flexcop_dma_xfer_control
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x5b632395	flexcop_dma_control_size_irq
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x6e0f36d7	flexcop_wan_set_speed
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x74dcfd21	flexcop_dump_reg
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x7540b5cc	flexcop_sram_set_dest
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x7f6796dd	flexcop_eeprom_check_mac_addr
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x87121043	flexcop_dma_control_timer_irq
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x9ac92c03	flexcop_dma_free
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xa83f1918	flexcop_device_exit
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xabbc96f9	flexcop_device_initialize
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xb1f7ad24	flexcop_dma_config_timer
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xbaf7eb6f	flexcop_device_kmalloc
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xbb7e7694	flexcop_pass_dmx_data
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xcbc626cd	flexcop_pid_feed_control
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xcfd24fa7	flexcop_device_kfree
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xd6403978	flexcop_dma_allocate
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xd9520fa8	flexcop_dma_config
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x31e58e28	bt878
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x55e7db28	bt878_start
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x87c70ffc	bt878_device_control
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xd5d0bdef	bt878_num
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xee13c4b1	bt878_stop
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x0dd716c7	write_dst
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x5a195943	dst_error_bailout
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x5e1c6156	rdc_reset_state
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x7da79f9d	dst_attach
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x99a1b3db	dst_comm_init
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xb614bdc5	dst_error_recovery
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xc86fbaba	dst_pio_disable
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xd7aeba0b	dst_wait_dst_ready
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xe94b8c9c	dst_check_sum
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xf569b091	read_dst
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst_ca 0xe0d2b0c3	dst_ca_attach
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x00cbdc37	dvb_ringbuffer_flush_spinlock_wakeup
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0add5c46	dvb_ca_en50221_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0c4d4a14	dvb_frontend_sleep_until
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x1271c710	dvb_register_adapter
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x13ee8494	dvb_ringbuffer_free
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x13ee84d7	dvb_ca_en50221_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x14c136db	dvb_ringbuffer_empty
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x1e60b7a1	dvb_dmx_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x396a6f60	dvb_generic_open
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x452ad392	dvb_ca_en50221_camchange_irq
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x47d40ba0	dvb_dmxdev_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x4a5ad2b0	dvb_ringbuffer_read_user
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x529b11af	dvb_register_device
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x589bc332	dvb_ca_en50221_camready_irq
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x5908fe37	dvb_dmx_swfilter
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6b00c62c	dvb_ringbuffer_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x72065b32	dvb_frontend_detach
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x74a5a698	dvb_filter_pes2ts_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x80e3832d	dvb_filter_get_ac3info
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x84813a02	dvb_dmx_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x9894d59e	dvb_frontend_reinitialise
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x9dc276db	dvb_register_frontend
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x9ec8bc37	dvb_generic_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xac4ca1b0	intlog2
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb4581bdf	dvb_unregister_device
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb53ef7bf	dvb_unregister_adapter
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xbc0d91e1	timeval_usec_diff
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xc4d54333	dvb_unregister_frontend
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xc7348c25	dvb_generic_ioctl
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xc850e755	dvb_dmxdev_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xcc41083f	dvb_ringbuffer_write
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xd0cb5a7b	dvb_ca_en50221_frda_irq
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xd958b8d5	dvb_net_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe20c965c	dvb_dmx_swfilter_204
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe54b83ca	dvb_ringbuffer_read
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe5ae8707	intlog10
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe8074fa5	dvb_ringbuffer_avail
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xef0f13fc	dvb_net_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf2031ad9	dvb_dmx_swfilter_packets
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf826deb0	dvb_filter_pes2ts
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x17b16dca	dvb_usb_nec_rc_key_to_event
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x2ead5f59	dvb_usb_device_exit
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x51895dae	dvb_usb_device_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x8bdf34c0	dvb_usb_generic_write
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xa1770e88	dvb_usb_get_hexline
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xebc347e4	usb_cypress_load_firmware
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xfc2faa5b	dvb_usb_generic_rw
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x3693500b	af9005_rc_keys
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x82886122	af9005_rc_decode
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0xd3383957	af9005_rc_keys_size
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x1e6db292	dibusb_i2c_algo
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x54bc4fbe	dibusb_rc_query
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x6b5e7b50	dibusb_pid_filter_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x6e617752	dibusb_pid_filter
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x776885de	dibusb_dib3000mc_frontend_attach
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x8b866c8e	dibusb_read_eeprom_byte
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xabc59da2	dibusb_dib3000mc_tuner_attach
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xb3285167	dibusb_streaming_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xcc9ccaff	dibusb_rc_keys
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xdc536174	dibusb2_0_power_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xe0c19047	dibusb_power_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xe617f792	dibusb2_0_streaming_ctrl
+EXPORT_SYMBOL drivers/media/dvb/frontends/af9013 0x6ce7dc77	af9013_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/au8522 0xab9a1fa8	au8522_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/bcm3510 0x76874f25	bcm3510_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx22700 0x290fbbb3	cx22700_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx22702 0x61f673e0	cx22702_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24110 0xdbbe697c	cx24110_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0x73fe3a55	cx24113_agc_callback
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0xf700d892	cx24113_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24116 0x4abcf73a	cx24116_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0x935b10ab	cx24123_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0xecbdb596	cx24123_get_tuner_i2c_adapter
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0x04e7b886	dib0070_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0x3639765c	dib0070_wbd_offset
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0xfbe81a85	dib0070_ctrl_agc_filter
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mb 0xdad66422	dib3000mb_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x1f3c4deb	dib3000mc_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x1fbff5bb	dib3000mc_i2c_enumeration
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x5a0094fe	dib3000mc_get_tuner_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x657ba1cf	dib3000mc_set_config
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xd9b77622	dib3000mc_pid_parse
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xe3d34864	dib3000mc_pid_control
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0x18ba44c6	dib7000m_get_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0xb444fa0d	dib7000m_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x2ffa30fc	dib7000p_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x42991a5e	dib7000p_get_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x803f7ca4	dib7000p_i2c_enumeration
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xc4b82485	dib7000p_set_gpio
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xd1b7c52f	dib7000p_set_wbd_ref
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xd4162570	dib7000pc_detection
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x02b1c875	dib8000_i2c_enumeration
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x242e6729	dib8000_set_wbd_ref
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x66c7ba50	dib8000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x6b41147b	dib8000_set_gpio
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0xabfb2813	dib8000_get_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x64374595	dibx000_reset_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x8cb9bef2	dibx000_init_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0xb910f6b6	dibx000_exit_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0xd29f4ff1	dibx000_get_i2c_adapter
+EXPORT_SYMBOL drivers/media/dvb/frontends/dvb-pll 0x72d32cef	dvb_pll_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/isl6405 0x306ae68e	isl6405_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/isl6421 0xb9734aed	isl6421_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/itd1000 0x10ad4051	itd1000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/l64781 0x991fc030	l64781_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt3305 0xcd46a493	lgdt3305_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt330x 0x1b585079	lgdt330x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lgs8gxx 0xc328add1	lgs8gxx_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0x7c2ff817	lnbp21_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0xcc05dfe6	lnbh24_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/mt312 0xa28c05ec	mt312_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/mt352 0x719d9436	mt352_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/nxt200x 0x1e6604f6	nxt200x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/nxt6000 0xba6e139a	nxt6000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/or51132 0x0e2fafb7	or51132_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/or51211 0xab8aacde	or51211_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1409 0xc1112912	s5h1409_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1411 0x69233e8a	s5h1411_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0x134a94b6	s5h1420_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0x3f244c2b	s5h1420_get_tuner_i2c_adapter
+EXPORT_SYMBOL drivers/media/dvb/frontends/si21xx 0x6f2ade4b	si21xx_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/sp8870 0x15c3d103	sp8870_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/sp887x 0x81fff2b1	sp887x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stb6000 0x0cc1c9a9	stb6000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0288 0x686538e4	stv0288_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0297 0x36bc2245	stv0297_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0299 0xfd33f95e	stv0299_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0900 0x8a83b05c	stv0900_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv6110 0xe669e218	stv6110_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10021 0x98352baf	tda10021_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10023 0x1cfc37a0	tda10023_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10048 0x7050a6ab	tda10048_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x323b8bf8	tda10045_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x535f7ff2	tda10046_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10086 0x7d1f3fe2	tda10086_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda8083 0x06c9b286	tda8083_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda826x 0x46e40ddd	tda826x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/ves1820 0xdd9b4445	ves1820_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/ves1x93 0xd22f993c	ves1x93_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/zl10036 0x3ba3ee3a	zl10036_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/zl10039 0xc98c3ac9	zl10039_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/zl10353 0xa9e66a1d	zl10353_attach
+EXPORT_SYMBOL drivers/media/dvb/ttpci/ttpci-eeprom 0xc8e36421	ttpci_eeprom_parse_mac
+EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0x45d7778c	ttusbdecfe_dvbt_attach
+EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0x6e107646	ttusbdecfe_dvbs_attach
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x11dc4b6d	bttv_gpio_enable
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x27d0c6dc	bttv_sub_unregister
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x8bfb33c2	bttv_sub_register
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x8ecf4acc	bttv_write_gpio
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xbcf2d2fb	bttv_read_gpio
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xbe6534de	bttv_get_pcidev
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0x495e4b0c	btcx_calc_skips
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0x4aec2a2b	btcx_riscmem_alloc
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0x842e4a68	btcx_riscmem_free
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xad2fe38b	btcx_sort_clips
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xc368f8e6	btcx_align
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xcda0ded2	btcx_screen_clips
+EXPORT_SYMBOL drivers/media/video/cpia 0x424b2573	cpia_unregister_camera
+EXPORT_SYMBOL drivers/media/video/cpia 0xba89890c	cpia_register_camera
+EXPORT_SYMBOL drivers/media/video/cx18/cx18 0x2cdea06d	cx18_reset_ir_gpio
+EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0x98f52e66	cx231xx_unregister_extension
+EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0xe4a68cfc	cx231xx_register_extension
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x155650f3	cx2341x_ctrl_get_menu
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x1ca0c084	cx2341x_log_status
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x2f25eee2	cx2341x_update
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x5b88faf6	cx2341x_ext_ctrls
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf76ce95	cx2341x_fill_defaults
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf8b77a4	cx2341x_mpeg_ctrls
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xe2c2b5eb	cx2341x_ctrl_query
+EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0x16bc015e	vp3054_i2c_probe
+EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0xfefd1d65	vp3054_i2c_remove
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x12638f2e	cx8800_ctrl_query
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x15c1e2ce	cx88_set_control
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x363797b4	cx88_get_control
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x4da34613	cx88_set_freq
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xac4e53b9	cx88_user_ctrls
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xbb1197b8	cx88_enum_input
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xdd702850	cx88_video_mux
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x2721e360	cx8802_cancel_buffers
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x5f719498	cx8802_buf_queue
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xaf27baf7	cx8802_register_driver
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xb17cd9bc	cx8802_get_driver
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xb5b2b52c	cx8802_unregister_driver
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xbb34ee63	cx8802_get_device
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xfadde7c5	cx8802_buf_prepare
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x0dbe3a6e	cx88_free_buffer
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x138fc723	cx88_set_tvnorm
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x1aef832a	cx88_risc_stopper
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x35bb0bf0	cx88_wakeup
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x45971c43	cx88_ir_stop
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x4ca1f2d0	cx88_core_irq
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x515a59f9	cx88_set_tvaudio
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x6141c8c5	cx88_tuner_callback
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x7f0093ae	cx88_core_put
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x904b8696	cx88_audio_thread
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x914af7da	cx88_core_get
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x98f9061e	cx88_risc_buffer
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x9b140fff	cx88_sram_channels
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x9c100529	cx88_shutdown
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xa2a263c2	cx88_sram_channel_dump
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xabe8ada7	cx88_set_stereo
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xae45bbcf	cx88_dsp_detect_stereo_sap
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb47f6cda	cx88_print_irqbits
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xc114bc14	cx88_ir_start
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xc372962c	cx88_risc_databuffer
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xd88347a5	cx88_vdev_init
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xe3bf318d	cx88_set_scale
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xf4c702d0	cx88_newstation
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xf7e350f5	cx88_reset
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xfda63d69	cx88_sram_channel_setup
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xffb6d971	cx88_get_stereo
+EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0x44c537c0	em28xx_register_extension
+EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0x7149046d	em28xx_unregister_extension
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x39e790e7	gspca_suspend
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x43653e92	gspca_resume
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x707bfa3b	gspca_disconnect
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x816343af	gspca_dev_probe
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x9670af2c	gspca_debug
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xadfd43ca	gspca_get_i_frame
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xf0478741	gspca_auto_gain_n_exposure
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xf879bebf	gspca_frame_add
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x14f67530	ivtv_debug
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x4a324496	ivtv_udma_unmap
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x52f0a350	ivtv_clear_irq_mask
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x58941b78	ivtv_vapi
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x5ef8fb59	ivtv_reset_ir_gpio
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x6a040147	ivtv_init_on_first_open
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x972e669e	ivtv_vapi_result
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x9ed681e6	ivtv_api
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xb9870a49	ivtv_udma_alloc
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xbc35418a	ivtv_udma_setup
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xcd0f3606	ivtv_set_irq_mask
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xe92c3eb8	ivtv_udma_prepare
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x04e83446	saa7134_tuner_callback
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x1211df5d	saa7134_devlist
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x14dfecc6	saa7134_boards
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x27fd8a0a	saa7134_devlist_lock
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x2c521836	saa7134_dmasound_exit
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x47365666	saa7134_ts_unregister
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x49345257	saa7134_set_dmabits
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x4a007756	saa7134_pgtable_free
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x4cacbc79	saa_dsp_writel
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x797d4de4	saa7134_pgtable_build
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x7ca71662	saa7134_dmasound_init
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xb34f8983	saa7134_pgtable_alloc
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xb436f401	saa7134_tvaudio_setmute
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xca4f0240	saa7134_ts_register
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xeba7a573	saa7134_set_gpio
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x1a33f1f9	soc_camera_host_register
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x5c94eb33	soc_camera_apply_sensor_flags
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x942b81b2	soc_camera_host_unregister
+EXPORT_SYMBOL drivers/media/video/soc_camera 0xa21e83a2	soc_camera_xlate_by_fourcc
+EXPORT_SYMBOL drivers/media/video/soc_camera 0xd4790f65	soc_camera_format_by_fourcc
+EXPORT_SYMBOL drivers/media/video/tveeprom 0xebde3c4a	tveeprom_read
+EXPORT_SYMBOL drivers/media/video/tveeprom 0xf44455d7	tveeprom_hauppauge_analog
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x25a8155d	usbvideo_DeinterlaceFrame
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x26af5b87	RingQueue_WakeUpInterruptible
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x3845fdbd	usbvideo_Deregister
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x5d0f882d	usbvideo_AllocateDevice
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x6cc94fc4	usbvideo_TestPattern
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xa8caef21	RingQueue_Enqueue
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xb3f01b51	RingQueue_Dequeue
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xbc4a757d	RingQueue_Flush
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xcc9a2336	usbvideo_RegisterVideoDevice
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xee2e66f1	usbvideo_register
+EXPORT_SYMBOL drivers/media/video/v4l1-compat 0xbecbe92e	v4l_compat_translate_ioctl
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x03165a85	v4l2_ctrl_get_menu
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1dcaa0c8	v4l2_prio_max
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1e326b97	v4l2_ctrl_query_fill
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x2f639468	v4l2_prio_check
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x42c8e001	v4l2_ctrl_next
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x44950e30	v4l2_chip_ident_i2c_client
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x495426ee	v4l2_ctrl_get_name
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x4ed5e0d7	v4l2_chip_match_host
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x50766d69	v4l2_ctrl_query_menu_valid_items
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x76ba9a9a	v4l2_prio_open
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x8d70e72e	v4l2_chip_match_i2c_client
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x95284709	v4l2_prio_close
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9c7de443	v4l2_prio_change
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9eb43ee2	v4l2_ctrl_check
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0xbecd2858	v4l2_prio_init
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0xd9ee1e3f	v4l2_ctrl_query_menu
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x0bf9a7b8	videobuf_dvb_register_bus
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x4e57b913	videobuf_dvb_find_frontend
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x57ab9873	videobuf_dvb_unregister_bus
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x82325a57	videobuf_dvb_alloc_frontend
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x905ab2c5	videobuf_dvb_get_frontend
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xf73cf2c9	videobuf_dvb_dealloc_frontends
+EXPORT_SYMBOL drivers/media/video/videodev 0x0614dd5a	v4l2_video_std_frame_period
+EXPORT_SYMBOL drivers/media/video/videodev 0x123959a1	v4l2_type_names
+EXPORT_SYMBOL drivers/media/video/videodev 0x14d42d26	video_devdata
+EXPORT_SYMBOL drivers/media/video/videodev 0x2a85d2f3	video_register_device_no_warn
+EXPORT_SYMBOL drivers/media/video/videodev 0x2edfdb0d	video_device_release
+EXPORT_SYMBOL drivers/media/video/videodev 0x33215575	video_device_alloc
+EXPORT_SYMBOL drivers/media/video/videodev 0x3adbd595	v4l2_field_names
+EXPORT_SYMBOL drivers/media/video/videodev 0x5ebefe4b	v4l_printk_ioctl
+EXPORT_SYMBOL drivers/media/video/videodev 0x5f3262aa	video_unregister_device
+EXPORT_SYMBOL drivers/media/video/videodev 0x71a0e861	video_register_device
+EXPORT_SYMBOL drivers/media/video/videodev 0xaa3db952	video_ioctl2
+EXPORT_SYMBOL drivers/media/video/videodev 0xd82e1839	video_usercopy
+EXPORT_SYMBOL drivers/media/video/videodev 0xe2b92059	v4l2_video_std_construct
+EXPORT_SYMBOL drivers/media/video/videodev 0xf3251e7b	v4l2_norm_to_name
+EXPORT_SYMBOL drivers/media/video/videodev 0xf7e9cedd	video_device_release_empty
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x33b61089	videocodec_attach
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x4a1ce093	videocodec_register
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x97eda85d	videocodec_detach
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0xc58a8849	videocodec_unregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x03914fb1	mpt_event_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x066124bd	mpt_GetIocState
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x12fc8fc3	mpt_findImVolumes
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x201a57e8	mpt_put_msg_frame_hi_pri
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x22cd6b4d	mpt_raid_phys_disk_pg1
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x33976122	mpt_HardResetHandler
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x3c6cea99	mpt_free_fw_memory
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x3dc40c79	mptbase_sas_persist_operation
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4004869a	mpt_send_handshake_request
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4156a5f3	mpt_print_ioc_summary
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4526289b	mpt_event_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4819c18c	mpt_device_driver_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4b99b32b	mpt_put_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x502108d0	mpt_fwfault_debug
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x516bb420	mpt_resume
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x5f73d8b7	mpt_alloc_fw_memory
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x664d5e42	mpt_get_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x6ed3c692	mpt_suspend
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x6fbb6211	mpt_halt_firmware
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x7e25cf15	mpt_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x82c2b0d9	mpt_free_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x92e1255c	mpt_config
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x95b907c5	mpt_reset_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x98e8bfdf	mpt_detach
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x99521ca8	mpt_raid_phys_disk_get_num_paths
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x99d961c8	mpt_raid_phys_disk_pg0
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xa9fe31b8	mpt_clear_taskmgmt_in_progress_flag
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc0e69f82	mpt_device_driver_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc47c22e8	mpt_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xccab54d0	mpt_set_taskmgmt_in_progress_flag
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd04de91b	mpt_verify_adapter
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd407aa07	mpt_attach
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd9a92a75	mpt_reset_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xdd805159	ioc_list
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x04a498a1	mptscsih_proc_info
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x0b38a2dd	mptscsih_bus_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x3f2ce092	mptscsih_info
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x4567cc94	mptscsih_taskmgmt_complete
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x495d8387	mptscsih_slave_destroy
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x5f3a8457	mptscsih_shutdown
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x65d20953	mptscsih_remove
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x6c3a7d2b	mptscsih_IssueTaskMgmt
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x79bb54ef	mptscsih_host_attrs
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x7b5aae67	mptscsih_change_queue_depth
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x7bc27b51	mptscsih_dev_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x83aa9bcc	mptscsih_get_scsi_lookup
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x86682a76	mptscsih_bios_param
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x8c58cc67	mptscsih_abort
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x9ef98376	mptscsih_io_done
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xa2d8aed5	mptscsih_qcmd
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xa3dbf40d	mptscsih_suspend
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xab175587	mptscsih_scandv_complete
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xd6d6bddc	mptscsih_ioc_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xe63b4b46	mptscsih_event_process
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xeab692c3	mptscsih_host_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xed8b12c0	mptscsih_raid_id_to_num
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xf0e9fa35	mptscsih_slave_configure
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xf20b6213	mptscsih_taskmgmt_response_code
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xf22f9185	mptscsih_is_phys_disk
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xffdbf1e2	mptscsih_resume
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x166f8d57	i2o_driver_notify_controller_remove_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x19fedca7	i2o_driver_register
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2a843bef	i2o_dump_message
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2c651fbb	i2o_parm_table_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x33fc41c9	i2o_status_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x37a12a76	i2o_msg_post_wait_mem
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x4b23a9de	i2o_msg_get_wait
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x518674aa	i2o_driver_unregister
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x606c2841	i2o_device_claim
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x61cd6ba0	i2o_event_register
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x63b2c07c	i2o_parm_field_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x73308ff4	i2o_find_iop
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x81e2baf5	i2o_parm_issue
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x99275163	i2o_iop_find_device
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb08ba63f	i2o_driver_notify_controller_add_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb1cd734c	i2o_driver_notify_device_add_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb4c00dcf	i2o_controllers
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xc747ebc1	i2o_driver_notify_device_remove_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xeb6740aa	i2o_exec_lct_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xf02cf81f	i2o_device_claim_release
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x0285b251	ab3100_get_chip_type
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x0b0d0323	ab3100_event_register
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x217c1b93	ab3100_mask_and_set_register_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x557df319	ab3100_get_register_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x8adc5ef7	ab3100_event_registers_startup_state_get
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xad2caed5	ab3100_set_register_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xce34642c	ab3100_event_unregister
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xfd150c35	ab3100_get_register_page_interruptible
+EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x6e5cef24	pasic3_read_register
+EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x9a768681	pasic3_write_register
+EXPORT_SYMBOL drivers/mfd/mfd-core 0x421cf965	mfd_remove_devices
+EXPORT_SYMBOL drivers/mfd/mfd-core 0x4e24a0c9	mfd_add_devices
+EXPORT_SYMBOL drivers/mfd/tps65010 0x02d4ad0f	tps65013_set_low_pwr
+EXPORT_SYMBOL drivers/mfd/tps65010 0x28485130	tps65010_config_vregs1
+EXPORT_SYMBOL drivers/mfd/tps65010 0x33739de7	tps65010_set_vib
+EXPORT_SYMBOL drivers/mfd/tps65010 0x9fd44c69	tps65010_set_led
+EXPORT_SYMBOL drivers/mfd/tps65010 0xb14080cc	tps65010_set_low_pwr
+EXPORT_SYMBOL drivers/mfd/tps65010 0xd5bb106d	tps65010_set_vbus_draw
+EXPORT_SYMBOL drivers/mfd/tps65010 0xe99b3f36	tps65010_set_gpio_out_value
+EXPORT_SYMBOL drivers/misc/c2port/core 0x7cdc02ac	c2port_device_unregister
+EXPORT_SYMBOL drivers/misc/c2port/core 0x8daa94bb	c2port_device_register
+EXPORT_SYMBOL drivers/misc/ioc4 0x17fdef48	ioc4_register_submodule
+EXPORT_SYMBOL drivers/misc/ioc4 0x43a7f868	ioc4_unregister_submodule
+EXPORT_SYMBOL drivers/misc/tifm_core 0x17c4f37f	tifm_register_driver
+EXPORT_SYMBOL drivers/misc/tifm_core 0x17d421ca	tifm_queue_work
+EXPORT_SYMBOL drivers/misc/tifm_core 0x2c6c5034	tifm_free_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0x37d29f8c	tifm_alloc_device
+EXPORT_SYMBOL drivers/misc/tifm_core 0x50b595e7	tifm_unmap_sg
+EXPORT_SYMBOL drivers/misc/tifm_core 0x67171cd6	tifm_has_ms_pif
+EXPORT_SYMBOL drivers/misc/tifm_core 0x6db50a5a	tifm_free_device
+EXPORT_SYMBOL drivers/misc/tifm_core 0x9502186d	tifm_map_sg
+EXPORT_SYMBOL drivers/misc/tifm_core 0xa3c0b515	tifm_unregister_driver
+EXPORT_SYMBOL drivers/misc/tifm_core 0xb1dc8afc	tifm_alloc_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0xb2d70ae7	tifm_eject
+EXPORT_SYMBOL drivers/misc/tifm_core 0xb7ad6412	tifm_add_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0xbe62daf3	tifm_remove_adapter
+EXPORT_SYMBOL drivers/mmc/card/mmc_block 0xc843aaaa	mmc_cleanup_queue
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x02c22805	mmc_card_sleep
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x184b82fb	mmc_vddrange_to_ocrmask
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x1ecd7348	mmc_host_enable
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x4732e449	mmc_unregister_driver
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x550e4239	mmc_align_data_size
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x56df5a59	mmc_regulator_set_ocr
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x5d0afcbb	mmc_add_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x65e9bc3a	mmc_card_can_sleep
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x72e3b72d	mmc_resume_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x81c774b4	mmc_wait_for_app_cmd
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x825e1642	mmc_alloc_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x8496e2b0	mmc_host_disable
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x8d8e2248	mmc_request_done
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x91cf3282	mmc_wait_for_cmd
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x945a49b1	mmc_power_restore_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x9808bc6d	mmc_register_driver
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xa431ee02	mmc_suspend_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xb0370444	mmc_wait_for_req
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xb2fb1337	mmc_free_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xc459253e	mmc_release_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xcb7717dd	__mmc_claim_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xcbab5f45	mmc_detect_change
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xd7dacdc8	mmc_remove_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xe7deddaa	mmc_power_save_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xe7ff35d9	mmc_try_claim_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xf494f618	mmc_regulator_get_ocrmask
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xf8d66de0	mmc_set_data_timeout
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xfd385e4d	mmc_card_awake
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xfdd37b02	mmc_host_lazy_disable
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x2250de1c	cfi_varsize_frob
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x66684284	cfi_read_pri
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0xef48cc3c	cfi_fixup
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x3222805f	map_destroy
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x344ea331	do_map_probe
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0xe2caa113	register_mtd_chip_driver
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0xee565adb	unregister_mtd_chip_driver
+EXPORT_SYMBOL drivers/mtd/chips/gen_probe 0x28589eeb	mtd_do_chip_probe
+EXPORT_SYMBOL drivers/mtd/lpddr/lpddr_cmds 0x2d951fb0	lpddr_cmdset
+EXPORT_SYMBOL drivers/mtd/maps/map_funcs 0x70900d89	simple_map_init
+EXPORT_SYMBOL drivers/mtd/mtd 0xde438427	add_mtd_partitions
+EXPORT_SYMBOL drivers/mtd/mtd 0xeea8ccc8	del_mtd_partitions
+EXPORT_SYMBOL drivers/mtd/mtdconcat 0x2b2435ea	mtd_concat_create
+EXPORT_SYMBOL drivers/mtd/mtdconcat 0x9271d6e6	mtd_concat_destroy
+EXPORT_SYMBOL drivers/mtd/nand/nand 0x4a19d97a	nand_default_bbt
+EXPORT_SYMBOL drivers/mtd/nand/nand 0xcc8326c5	nand_scan_bbt
+EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0x4599d564	nand_correct_data
+EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0xab39f793	nand_calculate_ecc
+EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0xb4b94377	__nand_correct_data
+EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0x836bdb72	nand_flash_ids
+EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0xa336feb7	nand_manuf_ids
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x5b42103e	flexonenand_region
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x68c196d1	onenand_addr
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x97eac86d	onenand_default_bbt
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x9f4dbf0c	onenand_scan_bbt
+EXPORT_SYMBOL drivers/net/8390 0x102c0db9	ei_set_multicast_list
+EXPORT_SYMBOL drivers/net/8390 0x1409553a	ei_close
+EXPORT_SYMBOL drivers/net/8390 0x600049d6	__alloc_ei_netdev
+EXPORT_SYMBOL drivers/net/8390 0x9615d44f	ei_tx_timeout
+EXPORT_SYMBOL drivers/net/8390 0xa5430109	ei_netdev_ops
+EXPORT_SYMBOL drivers/net/8390 0xba308392	ei_open
+EXPORT_SYMBOL drivers/net/8390 0xbb7a5b6d	ei_poll
+EXPORT_SYMBOL drivers/net/8390 0xc20395d0	ei_get_stats
+EXPORT_SYMBOL drivers/net/8390 0xdd365790	ei_interrupt
+EXPORT_SYMBOL drivers/net/8390 0xed5b55cd	ei_start_xmit
+EXPORT_SYMBOL drivers/net/8390 0xef539b06	NS8390_init
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x194984b4	arcnet_unregister_proto
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x1ebb0090	arcnet_open
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x1ebe464f	arc_bcast_proto
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x23f86078	arcnet_interrupt
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x6534792a	arcnet_debug
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x7805032c	arc_raw_proto
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x81f66b94	arcnet_send_packet
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x9f9aac1f	arcnet_timeout
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xbb100bfc	arc_proto_default
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xc4558c2d	arcnet_close
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xeff5abdb	alloc_arcdev
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xfed932e9	arc_proto_map
+EXPORT_SYMBOL drivers/net/arcnet/com20020 0x5d9ad6b1	com20020_netdev_ops
+EXPORT_SYMBOL drivers/net/arcnet/com20020 0x63930034	com20020_check
+EXPORT_SYMBOL drivers/net/arcnet/com20020 0xf76da1bf	com20020_found
+EXPORT_SYMBOL drivers/net/bnx2 0xbb09381f	bnx2_cnic_probe
+EXPORT_SYMBOL drivers/net/cnic 0x636af174	cnic_unregister_driver
+EXPORT_SYMBOL drivers/net/cnic 0xab4340b9	cnic_register_driver
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x0e9d5062	cxgb3_queue_tid_release
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x1d74f933	cxgb3_alloc_atid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x2132b619	cxgb3_remove_tid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x379ac653	t3_l2e_free
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x3e03b8c7	cxgb3_ofld_send
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x54c72003	dev2t3cdev
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x733f4e2a	t3_l2t_get
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xae61add0	cxgb3_unregister_client
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xb339ba44	cxgb3_alloc_stid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xc39769e3	t3_l2t_send_event
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xcc8f15f3	cxgb3_free_atid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xe6735b70	cxgb3_register_client
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xeed7b43a	t3_register_cpl_handler
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xf2d14215	cxgb3_free_stid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xfde30d9d	cxgb3_insert_tid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xfeda8df8	t3_l2t_send_slow
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x35cb79a0	hdlcdrv_register
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x4ce1fb87	hdlcdrv_unregister
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x732b3312	hdlcdrv_receiver
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x7eb237ad	hdlcdrv_arbitrate
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x87785a79	hdlcdrv_transmitter
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x22ce8283	sirdev_raw_read
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x230d90cd	sirdev_get_instance
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x2f8b7996	irda_unregister_dongle
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x386d5b93	sirdev_set_dtr_rts
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x3a010ec9	sirdev_set_dongle
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x4ad916ed	sirdev_receive
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xb9707dae	sirdev_raw_write
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xc76abce8	irda_register_dongle
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xc958b386	sirdev_put_instance
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xf781968b	sirdev_write_complete
+EXPORT_SYMBOL drivers/net/mdio 0x0f934475	mdio45_ethtool_gset_npage
+EXPORT_SYMBOL drivers/net/mdio 0x22bce513	mdio_mii_ioctl
+EXPORT_SYMBOL drivers/net/mdio 0x43e4defc	mdio45_nway_restart
+EXPORT_SYMBOL drivers/net/mdio 0x7577f992	mdio_set_flag
+EXPORT_SYMBOL drivers/net/mdio 0xa1a29548	mdio45_probe
+EXPORT_SYMBOL drivers/net/mdio 0xb34a7575	mdio45_ethtool_spauseparam_an
+EXPORT_SYMBOL drivers/net/mdio 0xc6b1163f	mdio45_links_ok
+EXPORT_SYMBOL drivers/net/mii 0x027c683c	mii_check_link
+EXPORT_SYMBOL drivers/net/mii 0x07e56533	mii_check_gmii_support
+EXPORT_SYMBOL drivers/net/mii 0x0aeec939	mii_nway_restart
+EXPORT_SYMBOL drivers/net/mii 0x145bf23a	mii_ethtool_gset
+EXPORT_SYMBOL drivers/net/mii 0x4b3a3deb	generic_mii_ioctl
+EXPORT_SYMBOL drivers/net/mii 0x5092bdd2	mii_check_media
+EXPORT_SYMBOL drivers/net/mii 0xaf585cff	mii_link_ok
+EXPORT_SYMBOL drivers/net/mii 0xb8dcbece	mii_ethtool_sset
+EXPORT_SYMBOL drivers/net/phy/mdio-bitbang 0x1b2c4ce9	alloc_mdio_bitbang
+EXPORT_SYMBOL drivers/net/phy/mdio-bitbang 0x77575b2c	free_mdio_bitbang
+EXPORT_SYMBOL drivers/net/ppp_generic 0x24f5ad52	ppp_register_compressor
+EXPORT_SYMBOL drivers/net/ppp_generic 0x2d0171d0	ppp_unregister_channel
+EXPORT_SYMBOL drivers/net/ppp_generic 0x34e0b769	ppp_unregister_compressor
+EXPORT_SYMBOL drivers/net/ppp_generic 0x3b24e7a8	ppp_output_wakeup
+EXPORT_SYMBOL drivers/net/ppp_generic 0x66700a58	ppp_register_channel
+EXPORT_SYMBOL drivers/net/ppp_generic 0x72c56a29	ppp_channel_index
+EXPORT_SYMBOL drivers/net/ppp_generic 0x790860b5	ppp_register_net_channel
+EXPORT_SYMBOL drivers/net/ppp_generic 0xd25c0150	ppp_input
+EXPORT_SYMBOL drivers/net/ppp_generic 0xe0243ab6	ppp_input_error
+EXPORT_SYMBOL drivers/net/ppp_generic 0xfb252ec7	ppp_unit_number
+EXPORT_SYMBOL drivers/net/pppox 0x904f98af	register_pppox_proto
+EXPORT_SYMBOL drivers/net/pppox 0xe0ff7a18	unregister_pppox_proto
+EXPORT_SYMBOL drivers/net/pppox 0xeb05e14e	pppox_ioctl
+EXPORT_SYMBOL drivers/net/pppox 0xf737a24c	pppox_unbind_sock
+EXPORT_SYMBOL drivers/net/slhc 0x2278e94b	slhc_remember
+EXPORT_SYMBOL drivers/net/slhc 0x26b760c4	slhc_init
+EXPORT_SYMBOL drivers/net/slhc 0x3fe0d1c0	slhc_free
+EXPORT_SYMBOL drivers/net/slhc 0x62538167	slhc_toss
+EXPORT_SYMBOL drivers/net/slhc 0x7e87227e	slhc_compress
+EXPORT_SYMBOL drivers/net/slhc 0xa78d9eb7	slhc_uncompress
+EXPORT_SYMBOL drivers/net/sungem_phy 0x27556f48	mii_phy_probe
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x0c86c2ea	tms380tr_close
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x435a565b	tmsdev_init
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x82e02445	tms380tr_open
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x8f3d5fcc	tms380tr_netdev_ops
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x90821da5	tmsdev_term
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd2328794	tms380tr_wait
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd49af46e	tms380tr_interrupt
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x38da4725	cycx_intr
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x62be23ea	cycx_setup
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x66a4c4e6	cycx_down
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x968458a6	cycx_peek
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xb6f383de	cycx_poke
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xfe7cd576	cycx_exec
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x00eae1ec	attach_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x0db7fc69	hdlc_start_xmit
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x228185e5	hdlc_change_mtu
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x4b89f819	hdlc_open
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x7a060808	hdlc_ioctl
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x85f55b51	detach_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x972a9fca	hdlc_close
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x9df076db	unregister_hdlc_device
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xdbf517f6	alloc_hdlcdev
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xe35bbad2	register_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xeb66e7f8	unregister_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wireless/airo 0x1c3d7212	stop_airo_card
+EXPORT_SYMBOL drivers/net/wireless/airo 0x1df18246	init_airo_card
+EXPORT_SYMBOL drivers/net/wireless/airo 0x35fb9c1e	reset_airo_card
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x31219afb	ath_is_world_regd
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x9db95eec	ath_regd_init
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xa8879946	ath_rxbuf_alloc
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xbe25b39d	ath_regd_get_band_ctl
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xdb3f467e	ath_reg_notifier_apply
+EXPORT_SYMBOL drivers/net/wireless/atmel 0x0d4681f0	init_atmel_card
+EXPORT_SYMBOL drivers/net/wireless/atmel 0x11bb870a	stop_atmel_card
+EXPORT_SYMBOL drivers/net/wireless/atmel 0xf80f8b8a	atmel_open
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x1f2cfdc1	hostap_set_hostapd
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x298e25b8	hostap_init_data
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x334c7a9f	hostap_setup_dev
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x43e6344a	hostap_init_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x449618d1	hostap_handle_sta_tx_exc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x4541a5fe	hostap_set_auth_algs
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x4ac65750	hostap_set_antsel
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x575cb6ff	hostap_set_roaming
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x639b85ee	hostap_add_interface
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x6f9a3771	hostap_check_sta_fw_version
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x7f55a924	hostap_set_multicast_list_queue
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x90db4f20	hostap_remove_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x93fe2abd	hostap_set_string
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x948c1036	hostap_set_word
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x973e061f	hostap_free_data
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa12ad27f	hostap_dump_tx_header
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa382d287	hostap_info_init
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb27e9720	hostap_init_ap_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb2a945e0	hostap_dump_rx_header
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb4b77c8b	hostap_80211_get_hdrlen
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb4d781e0	hostap_info_process
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xbb9833e5	hostap_get_porttype
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xd83209a6	hostap_remove_interface
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xdd8effac	hostap_80211_ops
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xdf83eb40	hostap_master_start_xmit
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xecbc56c5	hostap_80211_rx
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf2fb64e0	prism2_update_comms_qual
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf746b86d	hostap_set_encryption
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xfa2bb651	hostap_set_hostapd_sta
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x010c0d4f	libipw_is_valid_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x27da2beb	free_ieee80211
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x28469776	libipw_xmit
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x2ae38c59	libipw_get_geo
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x313f1c86	libipw_txb_free
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x37ddeeee	alloc_ieee80211
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x38fa8a52	libipw_rx_mgt
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x3abf66f3	libipw_wx_get_encodeext
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x46f562d6	libipw_wx_get_encode
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x504e3275	libipw_channel_to_freq
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x59f6de9d	libipw_wx_set_encode
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x5f1084ec	libipw_get_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x6614e6e0	libipw_channel_to_index
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x6b7bbf47	libipw_get_channel_flags
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x9709b4c3	libipw_wx_set_encodeext
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xa1edccb5	libipw_rx
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xbbbcd84a	libipw_freq_to_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xbe19b3dd	libipw_wx_get_scan
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xd8bc6929	libipw_set_geo
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xe1cc3bb2	libipw_networks_age
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xfddf66a3	libipw_change_mtu
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x007a950e	iwl_rx_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x026ff30d	iwl_tx_agg_start
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x02f930b5	iwl_leds_register
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x04144e10	iwl_send_cmd_pdu_async
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x047630f4	iwl_pci_suspend
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x07e20275	iwl_tx_skb
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1266edce	iwl_hw_txq_ctx_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x14d37256	iwlcore_eeprom_release_semaphore
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1500c2f9	iwlcore_eeprom_verify_signature
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x167164b6	iwl_tt_exit
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x167e2f5e	iwl_rxq_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1742c4a2	iwl_fill_probe_req
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x19f0e900	iwl_debug_level
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1b5a8a9b	iwl_set_rxon_channel
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d77b399	iwl_bcast_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1de4e2fa	iwl_tt_exit_ct_kill
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1ee88a75	iwl_pci_resume
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x20da1aba	iwl_hwrate_to_tx_control
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x228eef40	iwl_activate_qos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2443db13	iwl_chain_noise_calibration
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x29f55d55	iwl_power_update_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2a09be69	iwl_set_rxon_ht
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3208defd	iwl_txq_update_write_ptr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x35a3d1ba	iwl_reset_qos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x361f6e40	iwl_remove_dynamic_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x363142ce	iwl_cmd_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x38675d87	iwl_mac_remove_interface
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3b225e02	iwl_setup_rxon_timing
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3d7f75bd	iwlcore_eeprom_enhanced_txpower
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4161a54d	iwl_set_decrypted_flag
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x41996130	iwlcore_init_geos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x41c7c9a5	iwl_get_channel_info
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4349994b	iwl_verify_ucode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x449b043d	iwl_txq_ctx_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4ace8ccc	iwl_is_ht40_tx_allowed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4b60dc08	iwl_send_calib_results
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4cc7a563	iwl_mac_conf_tx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4cebe2a1	iwl_send_lq_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4dbbe331	iwl_sensitivity_calibration
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4fbe55a0	iwl_tt_enter_ct_kill
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x50b6ca8a	iwl_set_tx_power
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x517cdc14	iwl_add_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x53b75c03	iwl_configure_filter
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x543d3a72	iwl_rx_reply_rx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x54ff3b80	iwl_rx_replenish
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x57cbf908	iwl_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x58f64bee	iwl_rx_reply_compressed_ba
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x59fd6ac0	iwl_mac_hw_scan
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5aa55534	iwl_remove_default_wep_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5cfefa88	iwl_hw_nic_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5d4dcfe1	iwl_mac_add_interface
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5d8516a8	iwl_check_rxon_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5dc1aae3	iwl_get_sta_id
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5e9a0141	iwl_get_ra_sta_id
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5f1dc878	iwl_scan_cancel
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5f3bac48	iwl_rx_queue_alloc
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6099102e	iwl_send_cmd_pdu
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x609e512b	iwl_set_dynamic_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x62727d56	iwl_calib_set
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6586c79e	iwl_mac_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x685e1d01	iwl_set_default_wep_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6c2559bd	iwl_reset_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6cbda3ea	iwl_get_passive_dwell_time
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6d604be1	iwl_get_active_dwell_time
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6e32169d	iwl_rx_reply_rx_phy
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6fc5e2a5	iwl_init_drv
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x71c9733a	iwl_send_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x72836230	iwl_rx_replenish_now
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x734c0f72	iwl_scan_cancel_timeout
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x73e2cf6f	iwl_tt_initialize
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x74948013	iwl_rf_kill_ct_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x74c005ed	iwl_full_rxon_required
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x76658317	iwlcore_eeprom_query_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x76e83b60	iwl_mac_get_tx_stats
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x78976e61	iwl_isr_legacy
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7b012601	iwl_tx_ant_restriction
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7bbcbf4b	iwl_init_sensitivity
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7d6400db	iwl_eeprom_get_mac
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8467c5a9	iwl_sta_rx_agg_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8670273d	iwl_hwrate_to_plcp_idx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x89c27207	iwl_get_free_ucode_key_index
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8a39bd8b	iwl_irq_handle_error
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8bd9164a	iwl_free_tfds_in_queue
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8c6abd84	iwl_send_statistics_request
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8ecded39	iwl_rate_get_lowest_plcp
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8f15e251	iwl_tx_cmd_complete
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8f1631b8	iwl_is_monitor_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x92f7971d	iwl_eeprom_check_version
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x93baab37	iwl_init_channel_map
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x96817d1b	iwl_tx_agg_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9a60af0b	iwl_bg_scan_check
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9b257370	iwl_power_initialize
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9c441fcb	iwl_send_cmd_sync
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9cbb041c	iwl_tt_handler
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9cde1f24	iwl_queue_space
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9e304c03	iwl_update_tkip_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9e86e8e0	iwl_bg_abort_scan
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9e8fade0	iwl_leds_unregister
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9fc5a762	iwl_free_channel_map
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa39c0514	iwl_eeprom_query_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa3de31b1	iwl_rx_queue_space
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaa218594	iwl_tx_queue_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaac7e095	iwl_set_rxon_hwcrypto
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaad0846e	iwl_bg_scan_completed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaafed362	iwl_find_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xad1652c3	iwl_eeprom_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaf3620b1	iwl_send_static_wepkey_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb08a4e72	iwl_rx_reply_error
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb159c9fe	iwl_setup_mac
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb704ad10	iwl_uninit_drv
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb858d9e5	iwl_free_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbb2b4842	iwl_rxon_add_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbfd8e94a	iwl_set_rxon_chain
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc18b5035	iwl_setup_rx_scan_handlers
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc44589f3	iwl_tx_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc534df06	iwl_connection_init_rx_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc6f11052	iwl_reset_run_time_calib
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc9c09ecc	iwl_sta_rx_agg_start
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcbaf4931	get_cmd_string
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcc0d9ab5	iwlcore_free_geos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xccbcfbd1	iwl_alloc_all
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd0376962	iwl_rx_pm_sleep_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd4627c03	iwl_sta_tx_modify_enable_tid
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd4dcc343	iwl_tx_queue_reclaim
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd51cfad1	iwl_send_bt_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd57efa80	iwl_set_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd5fb7b7d	iwl_clear_stations_table
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd60375a9	iwl_rx_queue_restock
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd7cc0494	iwl_hw_detect
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xda1e89b4	iwl_send_add_sta
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xde1d1d79	iwlcore_eeprom_acquire_semaphore
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe3778e09	iwl_rx_missed_beacon_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe5da289d	iwl_bss_info_changed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe7c36db3	iwl_disable_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe7ce5d70	iwl_rates
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe9347229	iwl_mac_reset_tsf
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xea4e2790	iwl_eeprom_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xebe79462	iwl_ht_enabled
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf034f066	iwl_alloc_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf2dbc20e	iwl_rx_statistics
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf5831407	iwl_txq_check_empty
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf64b32d9	iwl_set_hw_params
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf6cd6a20	iwl_eeprom_query16
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf84006d4	iwl_mac_beacon_update
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf91125c5	iwl_rx_csa
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfadfb00b	iwl_setup_scan_deferred_work
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfeb574c7	iwl_rx_pm_debug_statistics_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xff3f09cf	iwl_rx_queue_update_write_ptr
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x23219618	free_orinocodev
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x4196c38b	hermes_write_ltv
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x5113c18b	alloc_orinocodev
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x56eedc43	orinoco_if_del
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x6a927e18	orinoco_interrupt
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x7e6f97f8	orinoco_up
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x8d465ae9	orinoco_down
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xa031d8e4	hermes_doicmd_wait
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc60b5e9e	hermes_bap_pwrite
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd38d8ae2	hermes_read_ltv
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd3f714e5	hermes_bap_pread
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5168829	hermes_allocate
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5336e5d	hermes_init
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd54e219d	hermes_docmd_wait
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xea6c647c	orinoco_if_add
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xed47b224	hermes_struct_init
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xf22387d7	orinoco_init
+EXPORT_SYMBOL drivers/parport/parport 0x0a0a6659	parport_put_port
+EXPORT_SYMBOL drivers/parport/parport 0x0fd462a2	parport_claim_or_block
+EXPORT_SYMBOL drivers/parport/parport 0x140ff711	parport_unregister_device
+EXPORT_SYMBOL drivers/parport/parport 0x21792557	parport_read
+EXPORT_SYMBOL drivers/parport/parport 0x38a0d21f	parport_negotiate
+EXPORT_SYMBOL drivers/parport/parport 0x3934f080	parport_ieee1284_epp_read_data
+EXPORT_SYMBOL drivers/parport/parport 0x4c5b8d8c	parport_register_driver
+EXPORT_SYMBOL drivers/parport/parport 0x4d2a941b	parport_ieee1284_interrupt
+EXPORT_SYMBOL drivers/parport/parport 0x4e36701b	parport_announce_port
+EXPORT_SYMBOL drivers/parport/parport 0x53d446ea	parport_ieee1284_epp_read_addr
+EXPORT_SYMBOL drivers/parport/parport 0x599789c0	parport_ieee1284_read_nibble
+EXPORT_SYMBOL drivers/parport/parport 0x5cfb80b4	parport_ieee1284_ecp_write_addr
+EXPORT_SYMBOL drivers/parport/parport 0x652777e2	parport_register_device
+EXPORT_SYMBOL drivers/parport/parport 0x66c22b18	parport_ieee1284_read_byte
+EXPORT_SYMBOL drivers/parport/parport 0x6d2fb303	parport_ieee1284_epp_write_data
+EXPORT_SYMBOL drivers/parport/parport 0x730a172e	parport_write
+EXPORT_SYMBOL drivers/parport/parport 0x862cc763	parport_register_port
+EXPORT_SYMBOL drivers/parport/parport 0x86746051	parport_find_number
+EXPORT_SYMBOL drivers/parport/parport 0x8a1f3248	parport_wait_peripheral
+EXPORT_SYMBOL drivers/parport/parport 0x8baf9d0f	parport_get_port
+EXPORT_SYMBOL drivers/parport/parport 0x9d5eff70	parport_irq_handler
+EXPORT_SYMBOL drivers/parport/parport 0xad410caf	parport_set_timeout
+EXPORT_SYMBOL drivers/parport/parport 0xae52baff	parport_remove_port
+EXPORT_SYMBOL drivers/parport/parport 0xbb201c59	parport_unregister_driver
+EXPORT_SYMBOL drivers/parport/parport 0xbb8b2805	parport_claim
+EXPORT_SYMBOL drivers/parport/parport 0xc8f86d45	parport_ieee1284_epp_write_addr
+EXPORT_SYMBOL drivers/parport/parport 0xcd0c2ace	parport_release
+EXPORT_SYMBOL drivers/parport/parport 0xcdbe83f3	parport_ieee1284_write_compat
+EXPORT_SYMBOL drivers/parport/parport 0xeefa5d18	parport_ieee1284_ecp_read_data
+EXPORT_SYMBOL drivers/parport/parport 0xf92c5ef2	parport_ieee1284_ecp_write_data
+EXPORT_SYMBOL drivers/parport/parport 0xfc81d628	parport_find_base
+EXPORT_SYMBOL drivers/parport/parport 0xfcf307c6	parport_wait_event
+EXPORT_SYMBOL drivers/parport/parport_pc 0x6cc071a8	parport_pc_probe_port
+EXPORT_SYMBOL drivers/parport/parport_pc 0x8cd2f1d7	parport_pc_unregister_port
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x01c52c35	pcmcia_register_driver
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x0807717e	pcmcia_unregister_driver
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x19a58419	pcmcia_release_window
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x20b98aa9	pcmcia_get_window
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x382cc464	pcmcia_dev_present
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4fd033a0	pcmcia_error_func
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x556db251	pcmcia_loop_config
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x68a83d08	pcmcia_request_window
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x6c8326e9	pcmcia_request_irq
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x765bea00	pcmcia_map_mem_page
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x77884317	pcmcia_get_mem_page
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x87152129	pcmcia_modify_configuration
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x8df9efbc	pcmcia_request_io
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xa098654d	pcmcia_access_configuration_register
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xa2e59dd1	pcmcia_request_configuration
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xcb2e327b	pcmcia_disable_device
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf0a25e12	pcmcia_error_ret
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x19512d34	pcmcia_unregister_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x212db8d2	pcmcia_socket_list
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x33f691ac	pcmcia_socket_list_rwsem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x377de2a8	pcmcia_adjust_io_region
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x3e1d5e85	pccard_get_tuple_data
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x49baabcc	pcmcia_resume_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x5205db3d	pcmcia_socket_class
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x53b7c7d4	pcmcia_put_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x56085a82	pcmcia_register_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x5958b345	destroy_cis_cache
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x64288b75	pcmcia_find_mem_region
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x6aaeb81f	pcmcia_suspend_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x7e900c0b	pccard_register_pcmcia
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x7f972070	pcmcia_get_socket_by_nr
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x87107b5f	pcmcia_validate_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x8803758f	pcmcia_write_cis_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x8a1ba99c	pcmcia_replace_cis
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x8c8b5e00	pcmcia_socket_dev_early_resume
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x8da42978	pcmcia_socket_dev_resume
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x8e394755	pccard_get_next_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x92dfa400	pccard_get_first_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xa2a764e3	pcmcia_parse_events
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xabad7747	pccard_static_ops
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xb525e13b	pcmcia_read_cis_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xb6277349	pcmcia_eject_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc02ef2c8	pcmcia_parse_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc4765512	pcmcia_find_io_region
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc8de063d	pcmcia_socket_dev_suspend
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcf97f3bd	dead_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xd70202d4	pcmcia_insert_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xdc2fedd6	pcmcia_reset_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xdfd7ca9b	release_cis_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xe6d935b2	pcmcia_get_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf3df21f9	pccard_read_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf893536e	pcmcia_socket_dev_late_resume
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xfb58170b	pccard_validate_cis
+EXPORT_SYMBOL drivers/pcmcia/rsrc_nonstatic 0xf652b6ec	pccard_nonstatic_ops
+EXPORT_SYMBOL drivers/pps/pps_core 0x1e145952	pps_unregister_source
+EXPORT_SYMBOL drivers/pps/pps_core 0xa244323c	pps_register_source
+EXPORT_SYMBOL drivers/pps/pps_core 0xe6a16116	pps_event
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x032622ad	fcoe_ctlr_recv
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x1fa84f87	fcoe_ctlr_link_down
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x52f4f62d	fcoe_ctlr_init
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x57974028	fcoe_ctlr_els_send
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x69bf462e	fcoe_ctlr_link_up
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x8a8369d6	fcoe_ctlr_destroy
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x96d8c6e7	fcoe_ctlr_recv_flogi
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x010b23e8	fc_lport_destroy
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0460db9c	fc_fcp_destroy
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x06dc4edd	fc_exch_recv
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x076a0909	fc_seq_start_next
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x099a223f	fc_fcp_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1301ac5f	fc_rport_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1935bd2f	fc_slave_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1ca90e9c	fc_disc_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x24a134f1	fc_get_host_port_state
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x2f5f9b60	fc_linkup
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x3047e279	fc_fabric_logoff
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x36e5fbaf	fc_cpu_mask
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x3830b56d	fc_linkdown
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x49f0e5a4	fc_exch_mgr_add
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x4abd909d	fc_fcp_ddp_setup
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x4b4c533c	fc_lport_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x4d7f783a	fc_seq_els_rsp_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x500d9acf	fc_exch_mgr_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x50cdc9bb	fc_lport_config
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x525cb8b6	fc_frame_crc_check
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x56183917	fc_destroy_rport
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x5e7a5df8	fc_fcp_complete
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x67750428	fc_exch_done
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x682b187d	fc_exch_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6d38d559	fc_exch_seq_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6d797a95	fc_elsct_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x74ae965a	fc_exch_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x79f5b96e	fc_lport_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x7c82f790	fc_eh_host_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x7e3250fd	fc_change_queue_depth
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x986e0b92	fc_rport_terminate_io
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x9ca32408	fc_set_mfs
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x9ed93388	fc_get_host_stats
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xad5991cd	fc_exch_mgr_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb5944ae6	fc_get_host_port_type
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xc29ce752	fc_queuecommand
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xc6a8d14f	fc_set_rport_loss_tmo
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xcf319e0b	fc_eh_abort
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xcf569b87	fc_exch_mgr_del
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xcfe79558	__fc_frame_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd6cb3359	fc_setup_rport
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xdb85c7db	fc_exch_mgr_free
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xddfc5426	fc_fabric_login
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xea973c30	fc_change_queue_type
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xec16d322	fc_seq_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf6531a78	fc_eh_device_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf7365d60	fc_seq_exch_abort
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xfaa780bf	fc_get_host_speed
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x2250c66e	mraid_mm_adapter_app_handle
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x512c956d	mraid_mm_unregister_adp
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x761734c4	mraid_mm_register_adp
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0c0526c1	osd_req_flush_partition
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0c17edb1	osd_sec_init_nosec_doall_caps
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x12ce4fcb	osd_req_remove_object
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x2149648f	osd_req_add_set_attr_list
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x27bb08ef	osd_req_list_partition_collections
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x28b88f3a	osd_req_create_partition
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x393506fe	osd_req_write_kern
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x3cc6dae9	osd_auto_detect_ver
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x42d1396e	osd_req_format
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x447a0ecb	osd_req_list_dev_partitions
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x49b9f1ee	osd_finalize_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x51b458f1	osd_req_remove_partition
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x55ab25d4	osd_dev_fini
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x577ad38e	osd_req_write
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x60dd9212	osd_req_decode_sense_full
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x674b7ab3	osd_req_flush_obsd
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x8050df37	osd_execute_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x8a733329	osd_req_list_collection_objects
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x96146073	osd_req_flush_object
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x9761f1eb	osd_req_flush_collection
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x9cca46ba	osd_req_set_attributes
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xa6009963	osd_req_list_partition_objects
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xb106b9eb	osd_execute_request_async
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xb3c1dcbe	osd_dev_init
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xbbd93b8c	osd_start_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xc19273e7	osd_req_decode_get_attr_list
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xdb48d853	osd_req_read
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xdb661827	osd_end_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xdd8f5d8b	osd_req_create_object
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe41f999d	osd_req_get_attributes
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe529171c	osd_req_read_kern
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe986a22f	osd_req_add_get_attr_list
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xf8803440	osd_req_add_get_attr_page
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x438add59	osduld_register_test
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x53af0b90	osduld_path_lookup
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x5fc48609	osduld_unregister_test
+EXPORT_SYMBOL drivers/scsi/osd/osd 0xf5d2629e	osduld_put_device
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x07cea384	qlogicfas408_info
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x151814b2	qlogicfas408_queuecommand
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x3fd8cd71	qlogicfas408_detect
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x808a8258	qlogicfas408_abort
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x97266d97	qlogicfas408_disable_ints
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xa9744d1d	qlogicfas408_bus_reset
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xdc310b12	qlogicfas408_ihandl
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xe76b3b20	qlogicfas408_get_chip_type
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xf27a48e0	qlogicfas408_biosparam
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xf2b95199	qlogicfas408_setup
+EXPORT_SYMBOL drivers/scsi/raid_class 0x4bd3a2de	raid_class_release
+EXPORT_SYMBOL drivers/scsi/raid_class 0x97653285	raid_component_add
+EXPORT_SYMBOL drivers/scsi/raid_class 0xd1da881f	raid_class_attach
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x0a546fef	fc_remote_port_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x40d99574	fc_remove_host
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x4f0c711b	fc_attach_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x777b0cda	scsi_is_fc_vport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x7954b1ea	fc_get_event_number
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x9eb15769	fc_host_post_event
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xa895e51c	fc_host_post_vendor_event
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xae98b286	fc_remote_port_rolechg
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xbb45698d	scsi_is_fc_rport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xc65817ec	fc_release_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xe20212a7	fc_vport_terminate
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xf051638d	fc_vport_create
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xfe145548	fc_remote_port_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x09b729a5	sas_end_device_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x14c4b7ef	sas_port_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x156108b6	sas_port_delete_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x18877519	sas_expander_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x1a6343f0	sas_port_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x22f22d70	sas_rphy_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x24ad56f7	sas_phy_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x2fe7c750	scsi_is_sas_rphy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x3748a764	sas_phy_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x491cfedb	sas_phy_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x5662ea86	sas_remove_host
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x80e5f346	scsi_is_sas_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x86230c5d	sas_port_alloc_num
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x912eb094	sas_rphy_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x9136a533	scsi_is_sas_port
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x94ea0c19	sas_attach_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xa440d21a	sas_port_add_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xa5c55f58	sas_phy_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xa9078cf9	sas_remove_children
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xaba55610	sas_port_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xbb045265	sas_rphy_remove
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xdc2d6489	sas_rphy_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xdde6939e	sas_port_mark_backlink
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xe3292463	sas_read_port_mode_page
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xf3d76a24	sas_release_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xf92b1313	sas_port_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x02d0021e	spi_schedule_dv_device
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x3686ea09	spi_print_msg
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x85d7b777	spi_release_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0xb44f75e7	spi_display_xfer_agreement
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0xb99f8dde	spi_dv_device
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0xe607b379	spi_attach_transport
+EXPORT_SYMBOL drivers/serial/8250 0xc7208c3a	serial8250_resume_port
+EXPORT_SYMBOL drivers/serial/8250 0xcc248d26	serial8250_suspend_port
+EXPORT_SYMBOL drivers/serial/8250 0xcefcd99a	serial8250_unregister_port
+EXPORT_SYMBOL drivers/serial/8250 0xf195be45	serial8250_register_port
+EXPORT_SYMBOL drivers/serial/serial_core 0x060906ed	uart_get_baud_rate
+EXPORT_SYMBOL drivers/serial/serial_core 0x0972a786	uart_register_driver
+EXPORT_SYMBOL drivers/serial/serial_core 0x338b5b64	uart_update_timeout
+EXPORT_SYMBOL drivers/serial/serial_core 0x38d2ce79	uart_remove_one_port
+EXPORT_SYMBOL drivers/serial/serial_core 0x60d1f6a8	uart_get_divisor
+EXPORT_SYMBOL drivers/serial/serial_core 0x7e286b41	uart_resume_port
+EXPORT_SYMBOL drivers/serial/serial_core 0x7ff7d144	uart_match_port
+EXPORT_SYMBOL drivers/serial/serial_core 0x93b007d1	uart_unregister_driver
+EXPORT_SYMBOL drivers/serial/serial_core 0xd615a4f2	uart_suspend_port
+EXPORT_SYMBOL drivers/serial/serial_core 0xf2c0f3cb	uart_add_one_port
+EXPORT_SYMBOL drivers/serial/serial_core 0xfef6b4e2	uart_write_wakeup
+EXPORT_SYMBOL drivers/ssb/ssb 0x0006361f	ssb_bus_pcibus_register
+EXPORT_SYMBOL drivers/ssb/ssb 0x0203f894	ssb_pcihost_register
+EXPORT_SYMBOL drivers/ssb/ssb 0x05afef26	ssb_driver_unregister
+EXPORT_SYMBOL drivers/ssb/ssb 0x091efcfc	ssb_set_devtypedata
+EXPORT_SYMBOL drivers/ssb/ssb 0x4e226ac5	ssb_pmu_set_ldo_paref
+EXPORT_SYMBOL drivers/ssb/ssb 0x55b3b568	ssb_bus_may_powerdown
+EXPORT_SYMBOL drivers/ssb/ssb 0x5dde6e1f	ssb_bus_resume
+EXPORT_SYMBOL drivers/ssb/ssb 0x7529ac12	ssb_dma_free_consistent
+EXPORT_SYMBOL drivers/ssb/ssb 0x75a3df63	ssb_pmu_set_ldo_voltage
+EXPORT_SYMBOL drivers/ssb/ssb 0x798788d6	ssb_device_disable
+EXPORT_SYMBOL drivers/ssb/ssb 0x7e08b368	ssb_bus_suspend
+EXPORT_SYMBOL drivers/ssb/ssb 0x8fa42567	ssb_bus_unregister
+EXPORT_SYMBOL drivers/ssb/ssb 0x9a766e8f	__ssb_driver_register
+EXPORT_SYMBOL drivers/ssb/ssb 0xa276672e	ssb_dma_translation
+EXPORT_SYMBOL drivers/ssb/ssb 0xa73febde	ssb_device_is_enabled
+EXPORT_SYMBOL drivers/ssb/ssb 0xb1ef34c3	ssb_dma_set_mask
+EXPORT_SYMBOL drivers/ssb/ssb 0xb78b5a26	ssb_bus_sdiobus_register
+EXPORT_SYMBOL drivers/ssb/ssb 0xc0512e0f	ssb_admatch_base
+EXPORT_SYMBOL drivers/ssb/ssb 0xd481192b	ssb_admatch_size
+EXPORT_SYMBOL drivers/ssb/ssb 0xd6d2dee7	ssb_pcicore_dev_irqvecs_enable
+EXPORT_SYMBOL drivers/ssb/ssb 0xd726d50a	ssb_device_enable
+EXPORT_SYMBOL drivers/ssb/ssb 0xd742f2fb	ssb_bus_powerup
+EXPORT_SYMBOL drivers/ssb/ssb 0xe4b34490	ssb_dma_alloc_consistent
+EXPORT_SYMBOL drivers/ssb/ssb 0xe88cfdcb	ssb_clockspeed
+EXPORT_SYMBOL drivers/telephony/ixj 0xf56e2659	ixj_pcmcia_probe
+EXPORT_SYMBOL drivers/telephony/phonedev 0x2a3533ba	phone_unregister_device
+EXPORT_SYMBOL drivers/telephony/phonedev 0xc6f4d6ee	phone_register_device
+EXPORT_SYMBOL drivers/usb/gadget/net2280 0x7180bba2	net2280_set_fifo_mode
+EXPORT_SYMBOL drivers/usb/gadget/net2280 0x98740a79	usb_gadget_unregister_driver
+EXPORT_SYMBOL drivers/usb/gadget/net2280 0xc6a47615	usb_gadget_register_driver
+EXPORT_SYMBOL drivers/usb/host/sl811-hcd 0x01c5fcee	sl811h_driver
+EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xa64a4cea	usb_nop_xceiv_unregister
+EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xd0e43207	usb_nop_xceiv_register
+EXPORT_SYMBOL drivers/usb/serial/usbserial 0x0271e902	usb_serial_resume
+EXPORT_SYMBOL drivers/usb/serial/usbserial 0x048bdada	usb_serial_suspend
+EXPORT_SYMBOL drivers/video/backlight/generic_bl 0xc86baa7c	corgibl_limit_intensity
+EXPORT_SYMBOL drivers/video/backlight/lcd 0x897cb35d	lcd_device_register
+EXPORT_SYMBOL drivers/video/backlight/lcd 0xfad5034e	lcd_device_unregister
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x0cc3ede5	cyber2000fb_detach
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x2f896b15	cyber2000fb_enable_extregs
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x32937655	cyber2000fb_attach
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x79b5732b	cyber2000fb_disable_extregs
+EXPORT_SYMBOL drivers/video/cyber2000fb 0xa8668e21	cyber2000fb_get_fb_var
+EXPORT_SYMBOL drivers/video/display/display 0x875fa58b	display_device_register
+EXPORT_SYMBOL drivers/video/display/display 0x8e999e7b	display_device_unregister
+EXPORT_SYMBOL drivers/video/output 0x748ac513	video_output_register
+EXPORT_SYMBOL drivers/video/output 0xa7cde332	video_output_unregister
+EXPORT_SYMBOL drivers/video/sis/sisfb 0x3037658e	sis_malloc
+EXPORT_SYMBOL drivers/video/sis/sisfb 0x454a3cf0	sis_free
+EXPORT_SYMBOL drivers/video/svgalib 0x00d1fce9	svga_set_default_seq_regs
+EXPORT_SYMBOL drivers/video/svgalib 0x07b3da30	svga_wseq_multi
+EXPORT_SYMBOL drivers/video/svgalib 0x0892c6bb	svga_tilecursor
+EXPORT_SYMBOL drivers/video/svgalib 0x1b95c56a	svga_check_timings
+EXPORT_SYMBOL drivers/video/svgalib 0x63e898d1	svga_set_default_crt_regs
+EXPORT_SYMBOL drivers/video/svgalib 0x7a3ae959	svga_wcrt_multi
+EXPORT_SYMBOL drivers/video/svgalib 0x7c4da953	svga_get_caps
+EXPORT_SYMBOL drivers/video/svgalib 0x80408443	svga_set_timings
+EXPORT_SYMBOL drivers/video/svgalib 0x8a865bdb	svga_settile
+EXPORT_SYMBOL drivers/video/svgalib 0x8b06d8d9	svga_tileblit
+EXPORT_SYMBOL drivers/video/svgalib 0x8fa8438b	svga_set_textmode_vga_regs
+EXPORT_SYMBOL drivers/video/svgalib 0xab3b22ad	svga_set_default_gfx_regs
+EXPORT_SYMBOL drivers/video/svgalib 0xab68fc71	svga_tilecopy
+EXPORT_SYMBOL drivers/video/svgalib 0xc0ecc58e	svga_tilefill
+EXPORT_SYMBOL drivers/video/svgalib 0xcb31ae6b	svga_get_tilemax
+EXPORT_SYMBOL drivers/video/svgalib 0xdad682b1	svga_set_default_atc_regs
+EXPORT_SYMBOL drivers/video/svgalib 0xec83c473	svga_match_format
+EXPORT_SYMBOL drivers/video/svgalib 0xef774f5d	svga_compute_pll
+EXPORT_SYMBOL drivers/video/syscopyarea 0x31fd73b3	sys_copyarea
+EXPORT_SYMBOL drivers/video/sysfillrect 0x10bcc01e	sys_fillrect
+EXPORT_SYMBOL drivers/video/sysimgblt 0x14cffe6a	sys_imageblit
+EXPORT_SYMBOL drivers/video/vgastate 0x686de290	restore_vga
+EXPORT_SYMBOL drivers/video/vgastate 0xe7a2620e	save_vga
+EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x308737df	w1_bq27000_write
+EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0xdf951578	w1_bq27000_read
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x2b286728	w1_ds2760_write
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x65ee3b85	w1_ds2760_store_eeprom
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0xa18ee025	w1_ds2760_recall_eeprom
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0xe7ee4ae5	w1_ds2760_read
+EXPORT_SYMBOL drivers/w1/wire 0x107f33f5	w1_add_master_device
+EXPORT_SYMBOL drivers/w1/wire 0x5ed5f8b5	w1_register_family
+EXPORT_SYMBOL drivers/w1/wire 0x5f274a1c	w1_unregister_family
+EXPORT_SYMBOL drivers/w1/wire 0x95795db1	w1_remove_master_device
+EXPORT_SYMBOL fs/configfs/configfs 0x2edf1dfc	configfs_undepend_item
+EXPORT_SYMBOL fs/configfs/configfs 0x3597f74f	config_item_put
+EXPORT_SYMBOL fs/configfs/configfs 0x44d5fd96	config_group_init_type_name
+EXPORT_SYMBOL fs/configfs/configfs 0x7e3a3922	config_item_get
+EXPORT_SYMBOL fs/configfs/configfs 0x9a10bd2d	config_item_init_type_name
+EXPORT_SYMBOL fs/configfs/configfs 0x9fecf97e	configfs_register_subsystem
+EXPORT_SYMBOL fs/configfs/configfs 0xa5b15edd	config_item_set_name
+EXPORT_SYMBOL fs/configfs/configfs 0xa8375ef4	config_group_init
+EXPORT_SYMBOL fs/configfs/configfs 0xd71183b3	configfs_depend_item
+EXPORT_SYMBOL fs/configfs/configfs 0xd8d9e45d	config_group_find_item
+EXPORT_SYMBOL fs/configfs/configfs 0xe4ce3ae2	configfs_unregister_subsystem
+EXPORT_SYMBOL fs/configfs/configfs 0xf05975c9	config_item_init
+EXPORT_SYMBOL fs/fscache/fscache 0x07d9b576	fscache_wait_bit_interruptible
+EXPORT_SYMBOL fs/fscache/fscache 0x10846f2f	fscache_mark_pages_cached
+EXPORT_SYMBOL fs/fscache/fscache 0x158822b4	__fscache_unregister_netfs
+EXPORT_SYMBOL fs/fscache/fscache 0x1efc7913	fscache_put_operation
+EXPORT_SYMBOL fs/fscache/fscache 0x2099cc92	__fscache_update_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0x2afdf505	__fscache_attr_changed
+EXPORT_SYMBOL fs/fscache/fscache 0x34ed820e	__fscache_wait_on_page_write
+EXPORT_SYMBOL fs/fscache/fscache 0x3fc23318	fscache_wait_bit
+EXPORT_SYMBOL fs/fscache/fscache 0x496932b9	fscache_op_debug_id
+EXPORT_SYMBOL fs/fscache/fscache 0x4c546dd4	fscache_withdraw_cache
+EXPORT_SYMBOL fs/fscache/fscache 0x54cca43b	__fscache_read_or_alloc_page
+EXPORT_SYMBOL fs/fscache/fscache 0x6e399163	fscache_io_error
+EXPORT_SYMBOL fs/fscache/fscache 0x739643bc	__fscache_alloc_page
+EXPORT_SYMBOL fs/fscache/fscache 0x73a5587a	fscache_object_lookup_negative
+EXPORT_SYMBOL fs/fscache/fscache 0x7900de2d	fscache_fsdef_index
+EXPORT_SYMBOL fs/fscache/fscache 0x7a73bba9	fscache_init_cache
+EXPORT_SYMBOL fs/fscache/fscache 0x81b7ec23	__fscache_relinquish_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0x86f8894f	fscache_object_states
+EXPORT_SYMBOL fs/fscache/fscache 0x96fb7a39	__fscache_write_page
+EXPORT_SYMBOL fs/fscache/fscache 0x9706d75c	fscache_add_cache
+EXPORT_SYMBOL fs/fscache/fscache 0x9e7f806d	__fscache_read_or_alloc_pages
+EXPORT_SYMBOL fs/fscache/fscache 0xa6ae39db	__fscache_acquire_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0xa883523c	fscache_obtained_object
+EXPORT_SYMBOL fs/fscache/fscache 0xa9ed45ef	__fscache_uncache_page
+EXPORT_SYMBOL fs/fscache/fscache 0xaab52b32	fscache_check_aux
+EXPORT_SYMBOL fs/fscache/fscache 0xb3f14765	__fscache_check_page_write
+EXPORT_SYMBOL fs/fscache/fscache 0xb894b833	__fscache_maybe_release_page
+EXPORT_SYMBOL fs/fscache/fscache 0xdaba1f22	fscache_enqueue_operation
+EXPORT_SYMBOL fs/fscache/fscache 0xdf433116	fscache_object_slow_work_ops
+EXPORT_SYMBOL fs/fscache/fscache 0xeb5930a1	__fscache_register_netfs
+EXPORT_SYMBOL fs/fscache/fscache 0xebd812a8	fscache_cache_cleared_wq
+EXPORT_SYMBOL fs/nfsd/nfsd 0x0e195c1c	nfs4_acl_nfsv4_to_posix
+EXPORT_SYMBOL fs/nfsd/nfsd 0x2095976a	nfs4_acl_new
+EXPORT_SYMBOL fs/nfsd/nfsd 0x28fb929b	nfs4_acl_posix_to_nfsv4
+EXPORT_SYMBOL fs/nfsd/nfsd 0x35e33c1e	nfs4_acl_write_who
+EXPORT_SYMBOL fs/nfsd/nfsd 0x5a157ae4	nfs4_acl_get_whotype
+EXPORT_SYMBOL fs/quota/quota_tree 0x044c50fa	qtree_release_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0xae2fcbaa	qtree_entry_unused
+EXPORT_SYMBOL fs/quota/quota_tree 0xd25c5a58	qtree_write_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0xea81b229	qtree_delete_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0xeefc236d	qtree_read_dquot
+EXPORT_SYMBOL lib/crc-ccitt 0x3771b461	crc_ccitt
+EXPORT_SYMBOL lib/crc-ccitt 0x75811312	crc_ccitt_table
+EXPORT_SYMBOL lib/crc-itu-t 0xd29b009f	crc_itu_t_table
+EXPORT_SYMBOL lib/crc-itu-t 0xf5b4a948	crc_itu_t
+EXPORT_SYMBOL lib/crc-t10dif 0xb6896671	crc_t10dif
+EXPORT_SYMBOL lib/crc7 0xa7587646	crc7
+EXPORT_SYMBOL lib/crc7 0xd80c3603	crc7_syndrome_table
+EXPORT_SYMBOL lib/libcrc32c 0x27000b29	crc32c
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x315c65fd	zlib_deflateInit2
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x48034724	zlib_deflateReset
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xaf64ad0d	zlib_deflate
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf0caf44b	zlib_deflate_workspacesize
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf741c793	zlib_deflateEnd
+EXPORT_SYMBOL net/802/p8023 0x01de19db	make_8023_client
+EXPORT_SYMBOL net/802/p8023 0x305d5295	destroy_8023_client
+EXPORT_SYMBOL net/9p/9pnet 0x0b11ff5a	p9_idpool_put
+EXPORT_SYMBOL net/9p/9pnet 0x0f897d61	p9_client_version
+EXPORT_SYMBOL net/9p/9pnet 0x21c38efd	p9_client_walk
+EXPORT_SYMBOL net/9p/9pnet 0x266ff366	p9_client_clunk
+EXPORT_SYMBOL net/9p/9pnet 0x26dee1fa	p9_client_cb
+EXPORT_SYMBOL net/9p/9pnet 0x26df5466	p9_client_open
+EXPORT_SYMBOL net/9p/9pnet 0x2d76745a	p9_client_remove
+EXPORT_SYMBOL net/9p/9pnet 0x3bd3cc6a	v9fs_get_default_trans
+EXPORT_SYMBOL net/9p/9pnet 0x3d73a797	p9_errstr2errno
+EXPORT_SYMBOL net/9p/9pnet 0x4d93ee35	p9_client_auth
+EXPORT_SYMBOL net/9p/9pnet 0x549d6c9a	p9_client_create
+EXPORT_SYMBOL net/9p/9pnet 0x6b754e6f	p9_parse_header
+EXPORT_SYMBOL net/9p/9pnet 0x6bc72e1b	p9_client_wstat
+EXPORT_SYMBOL net/9p/9pnet 0x6e518efd	v9fs_register_trans
+EXPORT_SYMBOL net/9p/9pnet 0x70a79177	v9fs_unregister_trans
+EXPORT_SYMBOL net/9p/9pnet 0x7310a66f	p9_idpool_create
+EXPORT_SYMBOL net/9p/9pnet 0x76b79bf1	p9stat_read
+EXPORT_SYMBOL net/9p/9pnet 0x77f11bc0	p9_tag_lookup
+EXPORT_SYMBOL net/9p/9pnet 0x845f5336	p9_client_write
+EXPORT_SYMBOL net/9p/9pnet 0x873467ed	p9_client_disconnect
+EXPORT_SYMBOL net/9p/9pnet 0x8f34fe15	p9_idpool_check
+EXPORT_SYMBOL net/9p/9pnet 0x95a0bac3	v9fs_get_trans_by_name
+EXPORT_SYMBOL net/9p/9pnet 0x99a7f30f	p9_idpool_destroy
+EXPORT_SYMBOL net/9p/9pnet 0x99aa7841	p9_idpool_get
+EXPORT_SYMBOL net/9p/9pnet 0x9a76aa2d	p9_client_attach
+EXPORT_SYMBOL net/9p/9pnet 0x9c964743	p9stat_free
+EXPORT_SYMBOL net/9p/9pnet 0x9ff15446	p9_client_stat
+EXPORT_SYMBOL net/9p/9pnet 0xc0f6c18a	p9_client_fcreate
+EXPORT_SYMBOL net/9p/9pnet 0xc3393aaf	p9_client_destroy
+EXPORT_SYMBOL net/9p/9pnet 0xd331fc1d	p9pdu_dump
+EXPORT_SYMBOL net/9p/9pnet 0xe58a3360	p9_error_init
+EXPORT_SYMBOL net/9p/9pnet 0xf455e8a8	p9_client_read
+EXPORT_SYMBOL net/appletalk/appletalk 0x0bedbd07	atrtr_get_dev
+EXPORT_SYMBOL net/appletalk/appletalk 0x11c75c84	atalk_find_dev_addr
+EXPORT_SYMBOL net/appletalk/appletalk 0x7ba2ac69	alloc_ltalkdev
+EXPORT_SYMBOL net/appletalk/appletalk 0xd9f6fcea	aarp_send_ddp
+EXPORT_SYMBOL net/atm/atm 0x02bda38c	atm_alloc_charge
+EXPORT_SYMBOL net/atm/atm 0x03732158	atm_proc_root
+EXPORT_SYMBOL net/atm/atm 0x1a24e5e2	sonet_subtract_stats
+EXPORT_SYMBOL net/atm/atm 0x2afb6702	atm_dev_register
+EXPORT_SYMBOL net/atm/atm 0x2cc2d52d	vcc_hash
+EXPORT_SYMBOL net/atm/atm 0x2f8e3fdf	vcc_release_async
+EXPORT_SYMBOL net/atm/atm 0x31eb46b9	vcc_sklist_lock
+EXPORT_SYMBOL net/atm/atm 0x58f4eba4	atm_dev_lookup
+EXPORT_SYMBOL net/atm/atm 0x5f885d40	atm_charge
+EXPORT_SYMBOL net/atm/atm 0x7f18f820	atm_dev_deregister
+EXPORT_SYMBOL net/atm/atm 0x88e691a8	register_atm_ioctl
+EXPORT_SYMBOL net/atm/atm 0x89195dc3	sonet_copy_stats
+EXPORT_SYMBOL net/atm/atm 0xcef95556	vcc_insert_socket
+EXPORT_SYMBOL net/atm/atm 0xd8356629	atm_init_aal5
+EXPORT_SYMBOL net/atm/atm 0xe6cb05fd	deregister_atm_ioctl
+EXPORT_SYMBOL net/atm/atm 0xf49bc67a	atm_pcr_goal
+EXPORT_SYMBOL net/ax25/ax25 0x19da42c3	ax25_hard_header
+EXPORT_SYMBOL net/ax25/ax25 0x242852b9	ax25_uid_policy
+EXPORT_SYMBOL net/ax25/ax25 0x2e4ee324	ax25_listen_register
+EXPORT_SYMBOL net/ax25/ax25 0x3d2d82ec	ax25_display_timer
+EXPORT_SYMBOL net/ax25/ax25 0x4502c65a	asc2ax
+EXPORT_SYMBOL net/ax25/ax25 0x47ab7c6c	ax25_rebuild_header
+EXPORT_SYMBOL net/ax25/ax25 0x4a643a61	ax25_find_cb
+EXPORT_SYMBOL net/ax25/ax25 0x53dea1ff	ax2asc
+EXPORT_SYMBOL net/ax25/ax25 0x542f5af3	ax25_send_frame
+EXPORT_SYMBOL net/ax25/ax25 0x564d9f14	ax25_findbyuid
+EXPORT_SYMBOL net/ax25/ax25 0x5f9d6b4c	ax25_linkfail_register
+EXPORT_SYMBOL net/ax25/ax25 0x792ece53	ax25_listen_release
+EXPORT_SYMBOL net/ax25/ax25 0x8ede9e26	ax25_protocol_release
+EXPORT_SYMBOL net/ax25/ax25 0x9fe3ee6b	ax25_header_ops
+EXPORT_SYMBOL net/ax25/ax25 0xc1444946	ax25cmp
+EXPORT_SYMBOL net/ax25/ax25 0xd43ecbf1	null_ax25_address
+EXPORT_SYMBOL net/ax25/ax25 0xdd74ee3f	ax25_linkfail_release
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x0fc2d6ac	hci_free_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x219aedbb	hci_send_sco
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x263408ce	hci_conn_security
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x39b87df2	bt_accept_enqueue
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x3b378740	hci_connect
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x3c2f2c7f	hci_register_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x433eb5d9	bt_accept_dequeue
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x43997630	bt_sock_poll
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x4b9be756	hci_unregister_cb
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x4bb55916	hci_register_proto
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x60f6c5d1	hci_conn_switch_role
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x63318bf6	hci_conn_put_device
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x64a7a8f5	bt_sock_unlink
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x670621c0	bt_sock_ioctl
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x7094f8ae	bt_err
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x82556925	hci_resume_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x8509bfc3	hci_conn_hold_device
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x8622f742	bt_accept_unlink
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x87f9c13c	hci_send_acl
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x99f52c0a	hci_unregister_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xad9be372	bt_sock_recvmsg
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xadafc1b1	hci_recv_fragment
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xb03a7669	hci_unregister_proto
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xc2066af0	batostr
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xc4087ec2	hci_get_route
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xc7d98eff	hci_register_cb
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xcc1fb551	baswap
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xd5c8ece8	bt_sock_link
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xeb2a84ab	hci_conn_change_link_key
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xf19294db	bt_sock_unregister
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xf3ecfe3c	hci_suspend_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xf8acd215	hci_conn_check_link_mode
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xfad49970	bt_sock_wait_state
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xfc2df93b	bt_sock_register
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xfe209c79	hci_alloc_dev
+EXPORT_SYMBOL net/bluetooth/l2cap 0xfc31fe88	l2cap_load
+EXPORT_SYMBOL net/bridge/bridge 0x2e3aea46	br_should_route_hook
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x41b268e5	ebt_register_table
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0xadf8f66d	ebt_unregister_table
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0xf3ab42de	ebt_do_table
+EXPORT_SYMBOL net/can/can 0x1e1093ff	can_rx_register
+EXPORT_SYMBOL net/can/can 0x5d02c1cf	can_proto_register
+EXPORT_SYMBOL net/can/can 0x8841fa57	can_rx_unregister
+EXPORT_SYMBOL net/can/can 0xbd412f4e	can_send
+EXPORT_SYMBOL net/can/can 0xe0637265	can_proto_unregister
+EXPORT_SYMBOL net/ieee802154/nl802154 0x32b1d995	ieee802154_nl_disassoc_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0x603e852c	ieee802154_nl_scan_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0x7b8a4a86	ieee802154_nl_beacon_indic
+EXPORT_SYMBOL net/ieee802154/nl802154 0x99ef3db8	ieee802154_nl_start_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0xa64911c8	ieee802154_nl_assoc_indic
+EXPORT_SYMBOL net/ieee802154/nl802154 0xdab339e3	ieee802154_nl_disassoc_indic
+EXPORT_SYMBOL net/ieee802154/nl802154 0xfe0b7152	ieee802154_nl_assoc_confirm
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x5949d8a9	wpan_phy_find
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x672024aa	wpan_phy_unregister
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x6a92d7bb	wpan_phy_register
+EXPORT_SYMBOL net/ieee802154/wpan-class 0xbce375fb	wpan_phy_alloc
+EXPORT_SYMBOL net/ieee802154/wpan-class 0xeea9bffb	wpan_phy_free
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x116de0cf	arpt_register_table
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x28ad9abe	arpt_unregister_table
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x6e815601	arpt_do_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x48a2ab4a	ipt_do_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x5f661556	ipt_register_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x8976454b	ipt_unregister_table
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x8eb936ff	nf_nat_follow_master
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xaf5ab70f	nf_nat_mangle_tcp_packet
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xbd11fbca	nf_nat_mangle_udp_packet
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xbdabf888	nf_nat_protocol_register
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xcdae09e5	nf_nat_used_tuple
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xcf8693c9	nf_nat_setup_info
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xfff08630	nf_nat_protocol_unregister
+EXPORT_SYMBOL net/ipv4/tunnel4 0x869a46c7	xfrm4_tunnel_deregister
+EXPORT_SYMBOL net/ipv4/tunnel4 0xf1ede6a5	xfrm4_tunnel_register
+EXPORT_SYMBOL net/ipv6/ipv6 0x0302f27b	inet6_register_protosw
+EXPORT_SYMBOL net/ipv6/ipv6 0x0b0d888b	icmpv6_err_convert
+EXPORT_SYMBOL net/ipv6/ipv6 0x0c617051	ndisc_send_skb
+EXPORT_SYMBOL net/ipv6/ipv6 0x0f1230ae	inet6_release
+EXPORT_SYMBOL net/ipv6/ipv6 0x0f32d626	xfrm6_prepare_output
+EXPORT_SYMBOL net/ipv6/ipv6 0x0fd73765	ndisc_build_skb
+EXPORT_SYMBOL net/ipv6/ipv6 0x1620a69f	inet6_bind
+EXPORT_SYMBOL net/ipv6/ipv6 0x169540ad	inet6_del_protocol
+EXPORT_SYMBOL net/ipv6/ipv6 0x17ad0e65	inet6_getname
+EXPORT_SYMBOL net/ipv6/ipv6 0x25a775ea	in6_dev_finish_destroy
+EXPORT_SYMBOL net/ipv6/ipv6 0x2f20aa0d	ip6_route_output
+EXPORT_SYMBOL net/ipv6/ipv6 0x30123eb5	icmpv6_statistics
+EXPORT_SYMBOL net/ipv6/ipv6 0x3101802f	ip6_frag_match
+EXPORT_SYMBOL net/ipv6/ipv6 0x3723f337	xfrm6_input_addr
+EXPORT_SYMBOL net/ipv6/ipv6 0x44a47e0e	inet6_ioctl
+EXPORT_SYMBOL net/ipv6/ipv6 0x4e31ee6e	inet6_add_protocol
+EXPORT_SYMBOL net/ipv6/ipv6 0x4f0103b8	ip6_route_me_harder
+EXPORT_SYMBOL net/ipv6/ipv6 0x5221c767	ipv6_chk_prefix
+EXPORT_SYMBOL net/ipv6/ipv6 0x538383c0	unregister_inet6addr_notifier
+EXPORT_SYMBOL net/ipv6/ipv6 0x61406040	inet6_unregister_protosw
+EXPORT_SYMBOL net/ipv6/ipv6 0x693eaa95	xfrm6_rcv
+EXPORT_SYMBOL net/ipv6/ipv6 0x73f91fe6	icmpv6_send
+EXPORT_SYMBOL net/ipv6/ipv6 0x79565f2a	nf_ip6_checksum
+EXPORT_SYMBOL net/ipv6/ipv6 0x7d236495	ip6_frag_init
+EXPORT_SYMBOL net/ipv6/ipv6 0x99236f30	ipv6_getsockopt
+EXPORT_SYMBOL net/ipv6/ipv6 0xb0f9920b	xfrm6_find_1stfragopt
+EXPORT_SYMBOL net/ipv6/ipv6 0xb25d0129	ip6_xmit
+EXPORT_SYMBOL net/ipv6/ipv6 0xbaff45e2	ipv6_setsockopt
+EXPORT_SYMBOL net/ipv6/ipv6 0xce19bac5	register_inet6addr_notifier
+EXPORT_SYMBOL net/ipv6/ipv6 0xd17c23d9	xfrm6_rcv_spi
+EXPORT_SYMBOL net/ipv6/ipv6 0xd7c17461	ipv6_chk_addr
+EXPORT_SYMBOL net/ipv6/ipv6 0xe1a81c3a	icmpv6msg_statistics
+EXPORT_SYMBOL net/ipv6/ipv6 0xe249fa6f	ipv6_dev_get_saddr
+EXPORT_SYMBOL net/ipv6/ipv6 0xe690b8fd	__ipv6_isatap_ifid
+EXPORT_SYMBOL net/ipv6/ipv6 0xe9e810d8	ipv6_push_nfrag_opts
+EXPORT_SYMBOL net/ipv6/ipv6 0xefd40273	rt6_lookup
+EXPORT_SYMBOL net/ipv6/ipv6 0xfd7367e6	ndisc_mc_map
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x36a4057e	ip6t_unregister_table
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x7a043eaa	ip6t_do_table
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xaaa73bb0	ip6t_register_table
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xb8bddf33	ip6t_ext_hdr
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xe2f2e667	ipv6_find_hdr
+EXPORT_SYMBOL net/ipv6/tunnel6 0x962388ba	xfrm6_tunnel_deregister
+EXPORT_SYMBOL net/ipv6/tunnel6 0xec49c9de	xfrm6_tunnel_register
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0x9cd013f2	xfrm6_tunnel_alloc_spi
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xab14e193	xfrm6_tunnel_free_spi
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xdb1b42d1	xfrm6_tunnel_spi_lookup
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x02edd651	ircomm_disconnect_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x59d2a308	ircomm_flow_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x8f3848db	ircomm_close
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0xbbb130c3	ircomm_connect_response
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0xc31d25d8	ircomm_control_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0xc3b19039	ircomm_data_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0xdc5ee780	ircomm_connect_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0xfea8a076	ircomm_open
+EXPORT_SYMBOL net/irda/irda 0x05bc3e4c	iriap_getvaluebyclass_request
+EXPORT_SYMBOL net/irda/irda 0x05d7cfe5	irias_add_octseq_attrib
+EXPORT_SYMBOL net/irda/irda 0x06a3ee58	irias_new_integer_value
+EXPORT_SYMBOL net/irda/irda 0x07d3647c	irlmp_register_service
+EXPORT_SYMBOL net/irda/irda 0x08427234	irlap_close
+EXPORT_SYMBOL net/irda/irda 0x19d79c82	hashbin_lock_find
+EXPORT_SYMBOL net/irda/irda 0x1c51e992	hashbin_delete
+EXPORT_SYMBOL net/irda/irda 0x1d22d00f	irttp_close_tsap
+EXPORT_SYMBOL net/irda/irda 0x1fb60f34	async_wrap_skb
+EXPORT_SYMBOL net/irda/irda 0x2036ad06	irda_param_insert
+EXPORT_SYMBOL net/irda/irda 0x22747781	irlmp_open_lsap
+EXPORT_SYMBOL net/irda/irda 0x22b0f52d	hashbin_insert
+EXPORT_SYMBOL net/irda/irda 0x2980f92b	irttp_connect_request
+EXPORT_SYMBOL net/irda/irda 0x30827e1c	irias_insert_object
+EXPORT_SYMBOL net/irda/irda 0x38a20e5b	irda_debug
+EXPORT_SYMBOL net/irda/irda 0x3b2e9df9	hashbin_remove
+EXPORT_SYMBOL net/irda/irda 0x42c30334	irda_notify_init
+EXPORT_SYMBOL net/irda/irda 0x42c7c5ce	irias_find_object
+EXPORT_SYMBOL net/irda/irda 0x448b8aaa	irda_qos_bits_to_value
+EXPORT_SYMBOL net/irda/irda 0x46900701	irlmp_disconnect_request
+EXPORT_SYMBOL net/irda/irda 0x46c1c4a2	irlmp_unregister_service
+EXPORT_SYMBOL net/irda/irda 0x519118cc	irias_add_integer_attrib
+EXPORT_SYMBOL net/irda/irda 0x538fe1e0	hashbin_get_first
+EXPORT_SYMBOL net/irda/irda 0x5504cf7c	hashbin_new
+EXPORT_SYMBOL net/irda/irda 0x567a8066	irttp_disconnect_request
+EXPORT_SYMBOL net/irda/irda 0x57fb1ed2	hashbin_remove_this
+EXPORT_SYMBOL net/irda/irda 0x5aad87aa	irias_delete_object
+EXPORT_SYMBOL net/irda/irda 0x5d609063	irias_new_object
+EXPORT_SYMBOL net/irda/irda 0x5eddd912	iriap_open
+EXPORT_SYMBOL net/irda/irda 0x63c66845	irlap_open
+EXPORT_SYMBOL net/irda/irda 0x66112650	irlmp_connect_response
+EXPORT_SYMBOL net/irda/irda 0x6621aa8a	hashbin_find
+EXPORT_SYMBOL net/irda/irda 0x6b043eba	irda_init_max_qos_capabilies
+EXPORT_SYMBOL net/irda/irda 0x6c5968c9	irttp_dup
+EXPORT_SYMBOL net/irda/irda 0x6d5c0482	iriap_close
+EXPORT_SYMBOL net/irda/irda 0x701e028e	irias_add_string_attrib
+EXPORT_SYMBOL net/irda/irda 0x7042bc54	irlmp_register_client
+EXPORT_SYMBOL net/irda/irda 0x763e54a4	irlmp_unregister_client
+EXPORT_SYMBOL net/irda/irda 0x7957f728	irlmp_update_client
+EXPORT_SYMBOL net/irda/irda 0x85259c8b	irttp_connect_response
+EXPORT_SYMBOL net/irda/irda 0x874a5223	irttp_data_request
+EXPORT_SYMBOL net/irda/irda 0x91815586	irda_param_pack
+EXPORT_SYMBOL net/irda/irda 0x930000fb	proc_irda
+EXPORT_SYMBOL net/irda/irda 0x9438cf45	irttp_flow_request
+EXPORT_SYMBOL net/irda/irda 0x993ad14b	irda_param_extract_all
+EXPORT_SYMBOL net/irda/irda 0xaa712a2e	irlmp_close_lsap
+EXPORT_SYMBOL net/irda/irda 0xaf087c74	irttp_udata_request
+EXPORT_SYMBOL net/irda/irda 0xb64fb528	irda_device_set_media_busy
+EXPORT_SYMBOL net/irda/irda 0xb9394173	irias_delete_value
+EXPORT_SYMBOL net/irda/irda 0xbcd3ef13	irias_object_change_attribute
+EXPORT_SYMBOL net/irda/irda 0xbe40ace9	irlmp_discovery_request
+EXPORT_SYMBOL net/irda/irda 0xc1d763e3	alloc_irdadev
+EXPORT_SYMBOL net/irda/irda 0xca40a1b6	irlmp_data_request
+EXPORT_SYMBOL net/irda/irda 0xcc12ff85	irlmp_connect_request
+EXPORT_SYMBOL net/irda/irda 0xddf864b4	irttp_open_tsap
+EXPORT_SYMBOL net/irda/irda 0xde4c6b3c	irlmp_service_to_hint
+EXPORT_SYMBOL net/irda/irda 0xe2f84c82	hashbin_get_next
+EXPORT_SYMBOL net/irda/irda 0xedd521c2	irlmp_get_discoveries
+EXPORT_SYMBOL net/irda/irda 0xf39b7fe0	irda_setup_dma
+EXPORT_SYMBOL net/irda/irda 0xf848fbde	async_unwrap_char
+EXPORT_SYMBOL net/lapb/lapb 0x08256b94	lapb_setparms
+EXPORT_SYMBOL net/lapb/lapb 0x2b28e4d5	lapb_connect_request
+EXPORT_SYMBOL net/lapb/lapb 0x321cc712	lapb_unregister
+EXPORT_SYMBOL net/lapb/lapb 0x49fefb2e	lapb_data_received
+EXPORT_SYMBOL net/lapb/lapb 0x5f562d96	lapb_disconnect_request
+EXPORT_SYMBOL net/lapb/lapb 0xa0afbad7	lapb_getparms
+EXPORT_SYMBOL net/lapb/lapb 0xeadda959	lapb_data_request
+EXPORT_SYMBOL net/lapb/lapb 0xffeb43a2	lapb_register
+EXPORT_SYMBOL net/mac80211/mac80211 0x1168e410	ieee80211_stop_tx_ba_cb
+EXPORT_SYMBOL net/mac80211/mac80211 0x1ae08004	ieee80211_rx
+EXPORT_SYMBOL net/mac80211/mac80211 0x299c4be5	ieee80211_rts_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0x30772525	ieee80211_start_tx_ba_session
+EXPORT_SYMBOL net/mac80211/mac80211 0x30e23ced	ieee80211_rx_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0x31b6173b	ieee80211_wake_queue
+EXPORT_SYMBOL net/mac80211/mac80211 0x34e106bf	__ieee80211_get_assoc_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0x3817486b	ieee80211_get_tkip_key
+EXPORT_SYMBOL net/mac80211/mac80211 0x3c28282e	ieee80211_tx_status_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0x48547b82	ieee80211_beacon_get
+EXPORT_SYMBOL net/mac80211/mac80211 0x4a85f726	rate_control_send_low
+EXPORT_SYMBOL net/mac80211/mac80211 0x4cde317f	ieee80211_wake_queues
+EXPORT_SYMBOL net/mac80211/mac80211 0x60c16e8c	__ieee80211_get_tx_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0x71285ded	ieee80211_ctstoself_get
+EXPORT_SYMBOL net/mac80211/mac80211 0x71668bb4	ieee80211_queue_delayed_work
+EXPORT_SYMBOL net/mac80211/mac80211 0x7bbde6a2	ieee80211_stop_tx_ba_session
+EXPORT_SYMBOL net/mac80211/mac80211 0x8306d39a	ieee80211_ctstoself_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0x857a5a8c	ieee80211_rts_get
+EXPORT_SYMBOL net/mac80211/mac80211 0x90347485	__ieee80211_get_radio_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0xae6409d6	ieee80211_start_tx_ba_cb
+EXPORT_SYMBOL net/mac80211/mac80211 0xb2163fae	ieee80211_stop_tx_ba_cb_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0xb77bc713	ieee80211_alloc_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xbcb7f774	ieee80211_start_tx_ba_cb_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0xbf9f645b	ieee80211_get_buffered_bc
+EXPORT_SYMBOL net/mac80211/mac80211 0xc42c5d1a	ieee80211_scan_completed
+EXPORT_SYMBOL net/mac80211/mac80211 0xc5203728	ieee80211_stop_queue
+EXPORT_SYMBOL net/mac80211/mac80211 0xc80b97d6	ieee80211_free_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xd371b96c	ieee80211_tx_status
+EXPORT_SYMBOL net/mac80211/mac80211 0xd511859d	ieee80211_queue_work
+EXPORT_SYMBOL net/mac80211/mac80211 0xdc3a7fe6	__ieee80211_get_rx_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0xddd4337f	wiphy_to_ieee80211_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xde1ce2d0	ieee80211_restart_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xdf33033c	ieee80211_queue_stopped
+EXPORT_SYMBOL net/mac80211/mac80211 0xe73f6fd5	ieee80211_stop_queues
+EXPORT_SYMBOL net/mac80211/mac80211 0xe8abe42d	ieee80211_beacon_loss
+EXPORT_SYMBOL net/mac80211/mac80211 0xe9a1b845	ieee80211_generic_frame_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0xea4ca1b3	ieee80211_unregister_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xf13ec247	ieee80211_rate_control_register
+EXPORT_SYMBOL net/mac80211/mac80211 0xf2ab5b46	ieee80211_rate_control_unregister
+EXPORT_SYMBOL net/mac80211/mac80211 0xf43af280	ieee80211_register_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xf8f7d3c5	ieee80211_find_sta
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x03cd6b5b	register_ip_vs_app_inc
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x14e5bf6c	unregister_ip_vs_app
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x3009c22d	register_ip_vs_app
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x446f6740	ip_vs_conn_in_get
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x4c1b706e	ip_vs_skb_replace
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x4e6052b8	register_ip_vs_scheduler
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xa1dbc2d8	ip_vs_proto_name
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xbcb846e9	ip_vs_tcp_conn_listen
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xc60ae645	unregister_ip_vs_scheduler
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xd4540d4b	ip_vs_conn_new
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xf18a9ce9	ip_vs_conn_out_get
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xf22a60ad	ip_vs_conn_put
+EXPORT_SYMBOL net/netfilter/nf_conntrack 0x69abcf36	__nf_ct_ext_add
+EXPORT_SYMBOL net/netfilter/nf_conntrack 0x840e6941	__nf_ct_ext_destroy
+EXPORT_SYMBOL net/netfilter/nf_conntrack_proto_gre 0xb18b85dd	nf_ct_gre_keymap_flush
+EXPORT_SYMBOL net/netfilter/x_tables 0x16a5e826	xt_free_table_info
+EXPORT_SYMBOL net/netfilter/x_tables 0x43d59099	xt_register_target
+EXPORT_SYMBOL net/netfilter/x_tables 0x4f51a692	xt_unregister_matches
+EXPORT_SYMBOL net/netfilter/x_tables 0x5ce8fca6	xt_register_targets
+EXPORT_SYMBOL net/netfilter/x_tables 0x70586a22	xt_find_target
+EXPORT_SYMBOL net/netfilter/x_tables 0x8571e3f2	xt_register_matches
+EXPORT_SYMBOL net/netfilter/x_tables 0x94c4e927	xt_find_match
+EXPORT_SYMBOL net/netfilter/x_tables 0xa3f9c3b7	xt_unregister_match
+EXPORT_SYMBOL net/netfilter/x_tables 0xacfcb596	xt_unregister_targets
+EXPORT_SYMBOL net/netfilter/x_tables 0xc3ff5dff	xt_alloc_table_info
+EXPORT_SYMBOL net/netfilter/x_tables 0xc5e36bce	xt_unregister_target
+EXPORT_SYMBOL net/netfilter/x_tables 0xcbc32598	xt_register_match
+EXPORT_SYMBOL net/phonet/phonet 0x48291284	phonet_stream_ops
+EXPORT_SYMBOL net/phonet/phonet 0x4a824243	phonet_proto_register
+EXPORT_SYMBOL net/phonet/phonet 0x63b2937b	pn_skb_send
+EXPORT_SYMBOL net/phonet/phonet 0x74c821ce	phonet_proto_unregister
+EXPORT_SYMBOL net/phonet/phonet 0x833a3ba4	pn_sock_unhash
+EXPORT_SYMBOL net/phonet/phonet 0xc45233d3	pn_sock_get_port
+EXPORT_SYMBOL net/phonet/phonet 0xce8213f4	pn_sock_hash
+EXPORT_SYMBOL net/phonet/phonet 0xe375b79a	phonet_header_ops
+EXPORT_SYMBOL net/rfkill/rfkill 0x1e7bda44	rfkill_set_states
+EXPORT_SYMBOL net/rfkill/rfkill 0x20f3d26f	rfkill_unregister
+EXPORT_SYMBOL net/rfkill/rfkill 0x3ee32f1c	rfkill_alloc
+EXPORT_SYMBOL net/rfkill/rfkill 0x5342df3d	rfkill_blocked
+EXPORT_SYMBOL net/rfkill/rfkill 0x5d4d55dc	rfkill_init_sw_state
+EXPORT_SYMBOL net/rfkill/rfkill 0x9ac3cb49	rfkill_destroy
+EXPORT_SYMBOL net/rfkill/rfkill 0x9c972f27	rfkill_pause_polling
+EXPORT_SYMBOL net/rfkill/rfkill 0xa79950f2	rfkill_set_led_trigger_name
+EXPORT_SYMBOL net/rfkill/rfkill 0xb55f44f9	rfkill_get_led_trigger_name
+EXPORT_SYMBOL net/rfkill/rfkill 0xb704e9a8	rfkill_register
+EXPORT_SYMBOL net/rfkill/rfkill 0xbfe3a436	rfkill_set_sw_state
+EXPORT_SYMBOL net/rfkill/rfkill 0xdbef1809	rfkill_resume_polling
+EXPORT_SYMBOL net/rfkill/rfkill 0xeb70f13f	rfkill_set_hw_state
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x0bcf6ea0	rxrpc_kernel_intercept_rx_messages
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x166dfd8e	rxrpc_kernel_begin_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x24b9b070	rxrpc_kernel_accept_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x33900860	rxrpc_kernel_end_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x39cb3b99	rxrpc_kernel_get_error_number
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x631bf972	rxrpc_kernel_send_data
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x63aa3a9b	rxrpc_get_server_data_key
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x94af18df	rxrpc_kernel_reject_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x9c656a51	rxrpc_kernel_abort_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xa3c361eb	rxrpc_kernel_get_abort_code
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xac15cdb0	rxrpc_get_null_key
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xb5ab3308	key_type_rxrpc
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xc9b911c2	rxrpc_kernel_free_skb
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xc9c3b5cf	rxrpc_kernel_data_delivered
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xea629229	rxrpc_kernel_is_data_last
+EXPORT_SYMBOL net/sunrpc/sunrpc 0x513f446c	svc_pool_stats_open
+EXPORT_SYMBOL net/tipc/tipc 0x08acf310	tipc_available_nodes
+EXPORT_SYMBOL net/tipc/tipc 0x10d40fcd	tipc_isconnected
+EXPORT_SYMBOL net/tipc/tipc 0x1472b270	tipc_disconnect
+EXPORT_SYMBOL net/tipc/tipc 0x1479cb03	tipc_deleteport
+EXPORT_SYMBOL net/tipc/tipc 0x15b5ecde	tipc_set_portunreliable
+EXPORT_SYMBOL net/tipc/tipc 0x16f27683	tipc_block_bearer
+EXPORT_SYMBOL net/tipc/tipc 0x1b2d828a	tipc_register_media
+EXPORT_SYMBOL net/tipc/tipc 0x259b74f9	tipc_acknowledge
+EXPORT_SYMBOL net/tipc/tipc 0x27d8bb58	tipc_send2port
+EXPORT_SYMBOL net/tipc/tipc 0x310d1bc9	tipc_detach
+EXPORT_SYMBOL net/tipc/tipc 0x3712e340	tipc_portunreliable
+EXPORT_SYMBOL net/tipc/tipc 0x3976041f	tipc_set_portimportance
+EXPORT_SYMBOL net/tipc/tipc 0x3e93b677	tipc_continue
+EXPORT_SYMBOL net/tipc/tipc 0x4b2243c6	tipc_portimportance
+EXPORT_SYMBOL net/tipc/tipc 0x4ba3cfc8	tipc_send2name
+EXPORT_SYMBOL net/tipc/tipc 0x4bd73e94	tipc_send_buf2name
+EXPORT_SYMBOL net/tipc/tipc 0x4e796163	tipc_get_port
+EXPORT_SYMBOL net/tipc/tipc 0x538b228a	tipc_withdraw
+EXPORT_SYMBOL net/tipc/tipc 0x5637ed44	tipc_get_mode
+EXPORT_SYMBOL net/tipc/tipc 0x5c0d4b5c	tipc_ref_valid
+EXPORT_SYMBOL net/tipc/tipc 0x62a681a3	tipc_portunreturnable
+EXPORT_SYMBOL net/tipc/tipc 0x64357d3c	tipc_multicast
+EXPORT_SYMBOL net/tipc/tipc 0x7b4ec3b6	tipc_send_buf
+EXPORT_SYMBOL net/tipc/tipc 0x8001e3d7	tipc_forward2port
+EXPORT_SYMBOL net/tipc/tipc 0x88b73627	tipc_get_addr
+EXPORT_SYMBOL net/tipc/tipc 0x9c45558e	tipc_enable_bearer
+EXPORT_SYMBOL net/tipc/tipc 0x9ef4f379	tipc_forward_buf2port
+EXPORT_SYMBOL net/tipc/tipc 0xa4773cd6	tipc_send_buf_fast
+EXPORT_SYMBOL net/tipc/tipc 0xadd203d0	tipc_connect2port
+EXPORT_SYMBOL net/tipc/tipc 0xae0103c3	tipc_shutdown
+EXPORT_SYMBOL net/tipc/tipc 0xb01ffc2c	tipc_forward2name
+EXPORT_SYMBOL net/tipc/tipc 0xb35b672c	tipc_publish
+EXPORT_SYMBOL net/tipc/tipc 0xbb2b2504	tipc_send
+EXPORT_SYMBOL net/tipc/tipc 0xc7ec3c7d	tipc_createport
+EXPORT_SYMBOL net/tipc/tipc 0xcec8514a	tipc_set_portunreturnable
+EXPORT_SYMBOL net/tipc/tipc 0xd028a217	tipc_send_buf2port
+EXPORT_SYMBOL net/tipc/tipc 0xd44731e5	tipc_ownidentity
+EXPORT_SYMBOL net/tipc/tipc 0xda7f9d3f	tipc_attach
+EXPORT_SYMBOL net/tipc/tipc 0xdf5008fc	tipc_peer
+EXPORT_SYMBOL net/tipc/tipc 0xe51178f3	tipc_recv_msg
+EXPORT_SYMBOL net/tipc/tipc 0xe6415876	tipc_createport_raw
+EXPORT_SYMBOL net/tipc/tipc 0xe7aece47	tipc_ispublished
+EXPORT_SYMBOL net/tipc/tipc 0xeb44a01e	tipc_reject_msg
+EXPORT_SYMBOL net/tipc/tipc 0xeefd49b3	tipc_get_handle
+EXPORT_SYMBOL net/tipc/tipc 0xef50a1ef	tipc_disable_bearer
+EXPORT_SYMBOL net/tipc/tipc 0xfab93cf0	tipc_forward_buf2name
+EXPORT_SYMBOL net/wanrouter/wanrouter 0x0ebe03d1	unregister_wan_device
+EXPORT_SYMBOL net/wanrouter/wanrouter 0xdbb51c06	register_wan_device
+EXPORT_SYMBOL net/wimax/wimax 0x5b7c25cf	wimax_reset
+EXPORT_SYMBOL net/wimax/wimax 0xfaf7c36a	wimax_rfkill
+EXPORT_SYMBOL net/wireless/cfg80211 0x07933f89	wiphy_register
+EXPORT_SYMBOL net/wireless/cfg80211 0x07e7ac5a	ieee80211_radiotap_iterator_init
+EXPORT_SYMBOL net/wireless/cfg80211 0x09c64fbd	ieee80211_frequency_to_channel
+EXPORT_SYMBOL net/wireless/cfg80211 0x09f982a4	ieee80211_data_from_8023
+EXPORT_SYMBOL net/wireless/cfg80211 0x10cb5a1c	ieee80211_get_hdrlen_from_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0x11ad2c38	cfg80211_unlink_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0x1879fcbd	bridge_tunnel_header
+EXPORT_SYMBOL net/wireless/cfg80211 0x18ff58f3	wiphy_new
+EXPORT_SYMBOL net/wireless/cfg80211 0x1a2ead5a	cfg80211_send_assoc_timeout
+EXPORT_SYMBOL net/wireless/cfg80211 0x1af8a0e8	cfg80211_testmode_reply
+EXPORT_SYMBOL net/wireless/cfg80211 0x1d2b6ff3	cfg80211_ibss_joined
+EXPORT_SYMBOL net/wireless/cfg80211 0x21d3e2b7	cfg80211_roamed
+EXPORT_SYMBOL net/wireless/cfg80211 0x2d82843f	cfg80211_michael_mic_failure
+EXPORT_SYMBOL net/wireless/cfg80211 0x2fe4efd5	freq_reg_info
+EXPORT_SYMBOL net/wireless/cfg80211 0x34df7646	cfg80211_testmode_event
+EXPORT_SYMBOL net/wireless/cfg80211 0x3549dd61	ieee80211_data_to_8023
+EXPORT_SYMBOL net/wireless/cfg80211 0x37ac8d05	ieee80211_get_response_rate
+EXPORT_SYMBOL net/wireless/cfg80211 0x45d24f91	cfg80211_classify8021d
+EXPORT_SYMBOL net/wireless/cfg80211 0x4c94b6de	cfg80211_connect_result
+EXPORT_SYMBOL net/wireless/cfg80211 0x4d3d0798	wiphy_rfkill_stop_polling
+EXPORT_SYMBOL net/wireless/cfg80211 0x6021d492	cfg80211_send_deauth
+EXPORT_SYMBOL net/wireless/cfg80211 0x60e08810	cfg80211_send_auth_timeout
+EXPORT_SYMBOL net/wireless/cfg80211 0x69b18f43	rfc1042_header
+EXPORT_SYMBOL net/wireless/cfg80211 0x7887246a	wiphy_free
+EXPORT_SYMBOL net/wireless/cfg80211 0x7a64b2c2	wiphy_apply_custom_regulatory
+EXPORT_SYMBOL net/wireless/cfg80211 0x7a8c3d09	cfg80211_send_disassoc
+EXPORT_SYMBOL net/wireless/cfg80211 0x8c35d732	ieee80211_hdrlen
+EXPORT_SYMBOL net/wireless/cfg80211 0x90eb5e02	cfg80211_put_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0x98b6f59c	cfg80211_get_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0x9afdd83f	cfg80211_inform_bss_frame
+EXPORT_SYMBOL net/wireless/cfg80211 0x9edaaed5	cfg80211_send_rx_auth
+EXPORT_SYMBOL net/wireless/cfg80211 0xac75d239	cfg80211_send_rx_assoc
+EXPORT_SYMBOL net/wireless/cfg80211 0xad5556ed	__ieee80211_get_channel
+EXPORT_SYMBOL net/wireless/cfg80211 0xb629162d	cfg80211_testmode_alloc_event_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0xb6c199ca	cfg80211_get_mesh
+EXPORT_SYMBOL net/wireless/cfg80211 0xb8b27791	wiphy_rfkill_set_hw_state
+EXPORT_SYMBOL net/wireless/cfg80211 0xc4e85ec5	ieee80211_radiotap_iterator_next
+EXPORT_SYMBOL net/wireless/cfg80211 0xc931a03d	ieee80211_bss_get_ie
+EXPORT_SYMBOL net/wireless/cfg80211 0xcc8dc6f8	cfg80211_testmode_alloc_reply_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0xccc291b3	ieee80211_channel_to_frequency
+EXPORT_SYMBOL net/wireless/cfg80211 0xcdc493db	cfg80211_scan_done
+EXPORT_SYMBOL net/wireless/cfg80211 0xd63595a8	wiphy_rfkill_start_polling
+EXPORT_SYMBOL net/wireless/cfg80211 0xd70b5129	wiphy_unregister
+EXPORT_SYMBOL net/wireless/cfg80211 0xe5e275a6	cfg80211_disconnected
+EXPORT_SYMBOL net/wireless/cfg80211 0xee23b3d8	cfg80211_inform_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0xf99a5d07	regulatory_hint
+EXPORT_SYMBOL net/wireless/lib80211 0x230f3ffb	lib80211_crypt_deinit_handler
+EXPORT_SYMBOL net/wireless/lib80211 0x2d0f99e5	print_ssid
+EXPORT_SYMBOL net/wireless/lib80211 0x3bd4c09e	lib80211_crypt_info_free
+EXPORT_SYMBOL net/wireless/lib80211 0x3d781e8a	lib80211_crypt_quiescing
+EXPORT_SYMBOL net/wireless/lib80211 0x47152748	lib80211_register_crypto_ops
+EXPORT_SYMBOL net/wireless/lib80211 0x4a73d016	lib80211_get_crypto_ops
+EXPORT_SYMBOL net/wireless/lib80211 0x696f491f	lib80211_crypt_info_init
+EXPORT_SYMBOL net/wireless/lib80211 0xa4dfd620	lib80211_crypt_deinit_entries
+EXPORT_SYMBOL net/wireless/lib80211 0xc43846c1	lib80211_unregister_crypto_ops
+EXPORT_SYMBOL net/wireless/lib80211 0xf52422f4	lib80211_crypt_delayed_deinit
+EXPORT_SYMBOL sound/ac97_bus 0x8fb575c4	ac97_bus_type
+EXPORT_SYMBOL sound/core/oss/snd-mixer-oss 0xff3f3a29	snd_mixer_oss_ioctl_card
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x094acb5a	snd_seq_event_port_attach
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x1a724fcc	snd_seq_kernel_client_ctl
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x38a3e2f4	snd_seq_kernel_client_write_poll
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x3fb4d161	snd_seq_kernel_client_dispatch
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x4abda4e3	snd_seq_kernel_client_enqueue_blocking
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x6bb71038	snd_seq_delete_kernel_client
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x7ac2f329	snd_seq_expand_var_event
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x7b8699eb	snd_seq_event_port_detach
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x8db055f5	snd_seq_create_kernel_client
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xb8e448a0	snd_seq_set_queue_tempo
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xcac0a3be	snd_seq_kernel_client_enqueue
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xe934da1d	snd_seq_dump_var_event
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x3a57f235	snd_seq_autoload_unlock
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x6339b6d0	snd_seq_device_load_drivers
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x6b2a937f	snd_seq_device_register_driver
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xb90668b2	snd_seq_autoload_lock
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xc622fb29	snd_seq_device_unregister_driver
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xf539f6f3	snd_seq_device_new
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x6ea09972	snd_midi_channel_alloc_set
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x833a3e07	snd_midi_channel_set_clear
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xb9948d2c	snd_midi_channel_free_set
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xf0a1fdb3	snd_midi_process_event
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x3b55d387	snd_midi_event_encode_byte
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x68b9bd07	snd_midi_event_free
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x7adfa053	snd_midi_event_encode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x998f2126	snd_midi_event_new
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x9b1825a9	snd_midi_event_no_status
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xb6327286	snd_midi_event_decode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xbc51650a	snd_midi_event_reset_decode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xe58d6519	snd_midi_event_reset_encode
+EXPORT_SYMBOL sound/core/seq/snd-seq-virmidi 0x6cc8b667	snd_virmidi_new
+EXPORT_SYMBOL sound/core/snd 0x0150fbd0	snd_device_register
+EXPORT_SYMBOL sound/core/snd 0x15438d33	snd_card_file_remove
+EXPORT_SYMBOL sound/core/snd 0x18e1683f	snd_dma_program
+EXPORT_SYMBOL sound/core/snd 0x191e88cf	snd_dma_pointer
+EXPORT_SYMBOL sound/core/snd 0x198788b4	snd_lookup_oss_minor_data
+EXPORT_SYMBOL sound/core/snd 0x19a5e81f	snd_ctl_register_ioctl
+EXPORT_SYMBOL sound/core/snd 0x1f3e6289	snd_add_device_sysfs_file
+EXPORT_SYMBOL sound/core/snd 0x213d9e96	snd_ctl_boolean_stereo_info
+EXPORT_SYMBOL sound/core/snd 0x24a94b26	snd_info_get_line
+EXPORT_SYMBOL sound/core/snd 0x2643d2b5	snd_device_new
+EXPORT_SYMBOL sound/core/snd 0x282ceefc	_snd_ctl_add_slave
+EXPORT_SYMBOL sound/core/snd 0x2834a1dc	snd_card_free
+EXPORT_SYMBOL sound/core/snd 0x2bfbec42	snd_seq_root
+EXPORT_SYMBOL sound/core/snd 0x2c5dbb19	snd_cards
+EXPORT_SYMBOL sound/core/snd 0x34b7642e	snd_card_register
+EXPORT_SYMBOL sound/core/snd 0x396e6b9e	snd_info_register
+EXPORT_SYMBOL sound/core/snd 0x3971b4df	snd_ecards_limit
+EXPORT_SYMBOL sound/core/snd 0x3a3f654b	snd_ctl_new1
+EXPORT_SYMBOL sound/core/snd 0x3df22261	snd_ctl_find_numid
+EXPORT_SYMBOL sound/core/snd 0x40cb221b	snd_card_file_add
+EXPORT_SYMBOL sound/core/snd 0x438c3d14	snd_device_free
+EXPORT_SYMBOL sound/core/snd 0x4a3ea5c0	snd_request_card
+EXPORT_SYMBOL sound/core/snd 0x4c7e002d	snd_card_create
+EXPORT_SYMBOL sound/core/snd 0x51208190	snd_pci_quirk_lookup
+EXPORT_SYMBOL sound/core/snd 0x593abbad	snd_unregister_oss_device
+EXPORT_SYMBOL sound/core/snd 0x5c0d2517	snd_unregister_device
+EXPORT_SYMBOL sound/core/snd 0x5cb355c0	snd_register_device_for_dev
+EXPORT_SYMBOL sound/core/snd 0x602c96f0	copy_to_user_fromio
+EXPORT_SYMBOL sound/core/snd 0x645d354d	snd_jack_new
+EXPORT_SYMBOL sound/core/snd 0x6ef4567a	snd_jack_set_parent
+EXPORT_SYMBOL sound/core/snd 0x7066a7c8	snd_mixer_oss_notify_callback
+EXPORT_SYMBOL sound/core/snd 0x70c15ac1	snd_dma_disable
+EXPORT_SYMBOL sound/core/snd 0x73fecfb4	snd_ctl_find_id
+EXPORT_SYMBOL sound/core/snd 0x752733bf	snd_ctl_remove
+EXPORT_SYMBOL sound/core/snd 0x783426d5	snd_card_disconnect
+EXPORT_SYMBOL sound/core/snd 0x7c32805d	snd_ctl_add
+EXPORT_SYMBOL sound/core/snd 0x865eeb4f	snd_component_add
+EXPORT_SYMBOL sound/core/snd 0x87330341	snd_card_free_when_closed
+EXPORT_SYMBOL sound/core/snd 0x89f43a51	snd_power_wait
+EXPORT_SYMBOL sound/core/snd 0x8df3789f	snd_oss_info_register
+EXPORT_SYMBOL sound/core/snd 0x8f595b11	snd_major
+EXPORT_SYMBOL sound/core/snd 0x996dc1a2	snd_ctl_free_one
+EXPORT_SYMBOL sound/core/snd 0x9b911ec9	snd_jack_report
+EXPORT_SYMBOL sound/core/snd 0x9e6d79f8	snd_info_get_str
+EXPORT_SYMBOL sound/core/snd 0xb2e5ae4a	snd_lookup_minor_data
+EXPORT_SYMBOL sound/core/snd 0xbf7d4812	snd_ctl_make_virtual_master
+EXPORT_SYMBOL sound/core/snd 0xc8d30f10	snd_card_proc_new
+EXPORT_SYMBOL sound/core/snd 0xcb2da76c	snd_ctl_unregister_ioctl
+EXPORT_SYMBOL sound/core/snd 0xce3ca308	copy_from_user_toio
+EXPORT_SYMBOL sound/core/snd 0xd1157735	release_and_free_resource
+EXPORT_SYMBOL sound/core/snd 0xd40ed28d	snd_ctl_notify
+EXPORT_SYMBOL sound/core/snd 0xd4342f5c	snd_info_free_entry
+EXPORT_SYMBOL sound/core/snd 0xd90ec35f	snd_ctl_remove_id
+EXPORT_SYMBOL sound/core/snd 0xd959b087	snd_ctl_boolean_mono_info
+EXPORT_SYMBOL sound/core/snd 0xdaf11aa6	snd_info_create_card_entry
+EXPORT_SYMBOL sound/core/snd 0xe20c9214	snd_iprintf
+EXPORT_SYMBOL sound/core/snd 0xe34e29ca	snd_ctl_rename_id
+EXPORT_SYMBOL sound/core/snd 0xf3aacea0	snd_info_create_module_entry
+EXPORT_SYMBOL sound/core/snd 0xff2082df	snd_card_set_id
+EXPORT_SYMBOL sound/core/snd 0xff72a13b	snd_register_oss_device
+EXPORT_SYMBOL sound/core/snd-hwdep 0xdd713912	snd_hwdep_new
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x20360641	snd_dma_free_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x3b91f3af	snd_free_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x7c4955d0	snd_dma_alloc_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x8665a426	snd_dma_alloc_pages_fallback
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x95826f66	snd_dma_get_reserved_buf
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xade88e76	snd_malloc_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xfda9987c	snd_dma_reserve_buf
+EXPORT_SYMBOL sound/core/snd-pcm 0x0283dfe3	_snd_pcm_hw_params_any
+EXPORT_SYMBOL sound/core/snd-pcm 0x039f17c9	snd_pcm_set_ops
+EXPORT_SYMBOL sound/core/snd-pcm 0x04cda566	snd_interval_refine
+EXPORT_SYMBOL sound/core/snd-pcm 0x0e7b95a6	snd_pcm_hw_constraint_integer
+EXPORT_SYMBOL sound/core/snd-pcm 0x1076b93c	snd_pcm_notify
+EXPORT_SYMBOL sound/core/snd-pcm 0x13158572	snd_pcm_lib_preallocate_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0x1ada06ee	snd_pcm_hw_constraint_list
+EXPORT_SYMBOL sound/core/snd-pcm 0x1c25026c	snd_pcm_hw_constraint_step
+EXPORT_SYMBOL sound/core/snd-pcm 0x1d027e4b	snd_pcm_format_signed
+EXPORT_SYMBOL sound/core/snd-pcm 0x22ff1505	snd_pcm_mmap_data
+EXPORT_SYMBOL sound/core/snd-pcm 0x24479a7e	snd_pcm_hw_rule_add
+EXPORT_SYMBOL sound/core/snd-pcm 0x3185c0be	snd_pcm_period_elapsed
+EXPORT_SYMBOL sound/core/snd-pcm 0x36f5d298	snd_pcm_hw_param_first
+EXPORT_SYMBOL sound/core/snd-pcm 0x3796bdcc	snd_pcm_format_little_endian
+EXPORT_SYMBOL sound/core/snd-pcm 0x395e287f	snd_pcm_link_rwlock
+EXPORT_SYMBOL sound/core/snd-pcm 0x39bf9301	_snd_pcm_hw_param_setempty
+EXPORT_SYMBOL sound/core/snd-pcm 0x3d552d88	snd_pcm_hw_constraint_pow2
+EXPORT_SYMBOL sound/core/snd-pcm 0x3f2d521b	snd_pcm_hw_constraint_msbits
+EXPORT_SYMBOL sound/core/snd-pcm 0x3f95626b	snd_pcm_release_substream
+EXPORT_SYMBOL sound/core/snd-pcm 0x455d675e	snd_pcm_hw_refine
+EXPORT_SYMBOL sound/core/snd-pcm 0x4764de4a	snd_pcm_lib_free_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0x4d36526e	snd_pcm_limit_hw_rates
+EXPORT_SYMBOL sound/core/snd-pcm 0x4d9b6d35	snd_pcm_format_size
+EXPORT_SYMBOL sound/core/snd-pcm 0x4f816e9b	snd_pcm_format_big_endian
+EXPORT_SYMBOL sound/core/snd-pcm 0x50898ff1	snd_pcm_lib_readv
+EXPORT_SYMBOL sound/core/snd-pcm 0x51f608c9	snd_pcm_hw_constraint_minmax
+EXPORT_SYMBOL sound/core/snd-pcm 0x52e3e4a5	snd_pcm_hw_param_value
+EXPORT_SYMBOL sound/core/snd-pcm 0x5af42d1d	snd_pcm_stop
+EXPORT_SYMBOL sound/core/snd-pcm 0x5cdbdb78	snd_pcm_suspend_all
+EXPORT_SYMBOL sound/core/snd-pcm 0x5e7f4920	snd_pcm_format_set_silence
+EXPORT_SYMBOL sound/core/snd-pcm 0x650f8603	snd_pcm_format_silence_64
+EXPORT_SYMBOL sound/core/snd-pcm 0x68a24153	snd_pcm_format_physical_width
+EXPORT_SYMBOL sound/core/snd-pcm 0x69b62cd7	snd_pcm_lib_write
+EXPORT_SYMBOL sound/core/snd-pcm 0x6ef8fcd8	snd_pcm_format_linear
+EXPORT_SYMBOL sound/core/snd-pcm 0x71d44d6c	snd_pcm_new_stream
+EXPORT_SYMBOL sound/core/snd-pcm 0x75438026	snd_pcm_hw_constraint_ratdens
+EXPORT_SYMBOL sound/core/snd-pcm 0x7e768815	snd_pcm_lib_malloc_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0x7ef71114	snd_pcm_set_sync
+EXPORT_SYMBOL sound/core/snd-pcm 0x81ac5739	snd_pcm_lib_read
+EXPORT_SYMBOL sound/core/snd-pcm 0x82dfe565	snd_pcm_suspend
+EXPORT_SYMBOL sound/core/snd-pcm 0x83bae925	snd_pcm_kernel_ioctl
+EXPORT_SYMBOL sound/core/snd-pcm 0x8434e32c	snd_pcm_lib_preallocate_free_for_all
+EXPORT_SYMBOL sound/core/snd-pcm 0xa074821f	snd_pcm_lib_mmap_iomem
+EXPORT_SYMBOL sound/core/snd-pcm 0xa61aa028	snd_pcm_format_unsigned
+EXPORT_SYMBOL sound/core/snd-pcm 0xa629e8bc	snd_pcm_hw_param_last
+EXPORT_SYMBOL sound/core/snd-pcm 0xb9638db4	snd_pcm_rate_to_rate_bit
+EXPORT_SYMBOL sound/core/snd-pcm 0xbce8cc7e	snd_pcm_lib_preallocate_pages_for_all
+EXPORT_SYMBOL sound/core/snd-pcm 0xc8f50ba4	snd_pcm_new
+EXPORT_SYMBOL sound/core/snd-pcm 0xc93ad7b6	snd_pcm_lib_writev
+EXPORT_SYMBOL sound/core/snd-pcm 0xd0b9b8b8	snd_interval_list
+EXPORT_SYMBOL sound/core/snd-pcm 0xe56a9336	snd_pcm_format_width
+EXPORT_SYMBOL sound/core/snd-pcm 0xea59bd17	snd_pcm_open_substream
+EXPORT_SYMBOL sound/core/snd-pcm 0xec540cb5	snd_pcm_hw_constraint_ratnums
+EXPORT_SYMBOL sound/core/snd-pcm 0xf3797152	snd_interval_ratnum
+EXPORT_SYMBOL sound/core/snd-pcm 0xfcb54adf	snd_pcm_lib_ioctl
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x06223e84	snd_rawmidi_receive
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x2532a192	snd_rawmidi_output_params
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x327d30cc	snd_rawmidi_input_params
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x4ccfdbdc	snd_rawmidi_set_ops
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x5080d705	snd_rawmidi_kernel_write
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x5b9ba644	snd_rawmidi_new
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x61c64c1e	snd_rawmidi_transmit
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x7e46db43	snd_rawmidi_transmit_peek
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xa4e1cb34	snd_rawmidi_drain_output
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xc0a7aa43	snd_rawmidi_info_select
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xca5933f9	snd_rawmidi_transmit_empty
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xd7734624	snd_rawmidi_drop_output
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xe1df74ed	snd_rawmidi_kernel_open
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xe8413137	snd_rawmidi_drain_input
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xea1ba8bd	snd_rawmidi_kernel_read
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xea604e1d	snd_rawmidi_transmit_ack
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xfd728ff6	snd_rawmidi_kernel_release
+EXPORT_SYMBOL sound/core/snd-timer 0x17ba57b2	snd_timer_new
+EXPORT_SYMBOL sound/core/snd-timer 0x2cd8a6f0	snd_timer_pause
+EXPORT_SYMBOL sound/core/snd-timer 0x57c4988d	snd_timer_global_free
+EXPORT_SYMBOL sound/core/snd-timer 0x7f1fe0ae	snd_timer_close
+EXPORT_SYMBOL sound/core/snd-timer 0x89985830	snd_timer_interrupt
+EXPORT_SYMBOL sound/core/snd-timer 0x8f2c0f94	snd_timer_global_register
+EXPORT_SYMBOL sound/core/snd-timer 0x97982f1f	snd_timer_continue
+EXPORT_SYMBOL sound/core/snd-timer 0xab35456c	snd_timer_global_new
+EXPORT_SYMBOL sound/core/snd-timer 0xbd56a082	snd_timer_start
+EXPORT_SYMBOL sound/core/snd-timer 0xce243af4	snd_timer_stop
+EXPORT_SYMBOL sound/core/snd-timer 0xd7285b43	snd_timer_resolution
+EXPORT_SYMBOL sound/core/snd-timer 0xfe0c6d63	snd_timer_notify
+EXPORT_SYMBOL sound/core/snd-timer 0xffe302dd	snd_timer_open
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x4bbb7f27	snd_mpu401_uart_interrupt_tx
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x98c48ef8	snd_mpu401_uart_new
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xc43a3940	snd_mpu401_uart_interrupt
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x05060a19	snd_opl3_regmap
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x1a0f3970	snd_opl3_reset
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x29014191	snd_opl3_interrupt
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x71dabd67	snd_opl3_create
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x892df8a1	snd_opl3_load_patch
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xa292203d	snd_opl3_find_patch
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xc0e5c57e	snd_opl3_new
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xc1bb5bea	snd_opl3_hwdep_new
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xc6615bcc	snd_opl3_timer_new
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xc84e7037	snd_opl3_init
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x387cb864	snd_vx_resume
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x4b5c5fb3	snd_vx_free_firmware
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x57bb2a0f	snd_vx_create
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x660c2c9e	snd_vx_load_boot_image
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x82a53fa4	snd_vx_check_reg_bit
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x860acb1d	snd_vx_dsp_boot
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x99b88ede	snd_vx_irq_handler
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xdfdc054b	snd_vx_suspend
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xf80b59eb	snd_vx_setup_firmware
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xf9889327	snd_vx_dsp_load
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x2b88c638	snd_ak4114_check_rate_and_errors
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x37a2374d	snd_ak4114_create
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x8499b1ea	snd_ak4114_build
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x9306de5e	snd_ak4114_reg_write
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xa1515a0b	snd_ak4114_reinit
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xc2473c01	snd_ak4114_external_rate
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x181c681e	snd_ak4117_check_rate_and_errors
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x30b2bd08	snd_ak4117_reinit
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x953ed267	snd_ak4117_reg_write
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xa8b46b61	snd_ak4117_external_rate
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xd06b292a	snd_ak4117_build
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xf1c015c3	snd_ak4117_create
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x3e2d7411	snd_akm4xxx_write
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x84c107d0	snd_akm4xxx_reset
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xbb68899d	snd_akm4xxx_build_controls
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xe8ef0733	snd_akm4xxx_init
+EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0x8be20412	snd_pt2258_reset
+EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0xfa8d60ef	snd_pt2258_build_controls
+EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0x14cb4183	snd_tea575x_init
+EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0xff7234ef	snd_tea575x_exit
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x3cf43abf	snd_cs8427_iec958_build
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x791d595c	snd_cs8427_create
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0xd271c53a	snd_cs8427_iec958_active
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0xd945b50d	snd_cs8427_reg_write
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0xeb5f31b1	snd_cs8427_iec958_pcm
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x1697b17f	snd_i2c_device_create
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x38b77372	snd_i2c_bus_create
+EXPORT_SYMBOL sound/i2c/snd-i2c 0xaa5185a3	snd_i2c_readbytes
+EXPORT_SYMBOL sound/i2c/snd-i2c 0xc43cb7d9	snd_i2c_sendbytes
+EXPORT_SYMBOL sound/i2c/snd-i2c 0xe01b3f84	snd_i2c_probeaddr
+EXPORT_SYMBOL sound/i2c/snd-i2c 0xfa706bf7	snd_i2c_device_free
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x02a81092	snd_sbmixer_add_ctl
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x0f87055f	snd_sbmixer_read
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x179fe6e9	snd_sbdsp_command
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x34e36704	snd_sbmixer_suspend
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x693e6017	snd_sbmixer_new
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x6c9f777e	snd_sbdsp_create
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xa4112ba9	snd_sbmixer_resume
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xbd3f92cf	snd_sbdsp_reset
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xd37afec3	snd_sbmixer_write
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xe75e23a6	snd_sbdsp_get_byte
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0x231c8a48	snd_sb16dsp_get_pcm_ops
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0x741df320	snd_sb16dsp_pcm
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xaea90106	snd_sb16dsp_configure
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xc57f5b54	snd_sb16dsp_interrupt
+EXPORT_SYMBOL sound/oss/ad1848 0x2b5d9dae	ad1848_detect
+EXPORT_SYMBOL sound/oss/ad1848 0x9bf1cc62	ad1848_unload
+EXPORT_SYMBOL sound/oss/ad1848 0xa3e16c6b	probe_ms_sound
+EXPORT_SYMBOL sound/oss/ad1848 0xb0ddaaac	attach_ms_sound
+EXPORT_SYMBOL sound/oss/ad1848 0xb29a9148	unload_ms_sound
+EXPORT_SYMBOL sound/oss/ad1848 0xc04f6f67	ad1848_control
+EXPORT_SYMBOL sound/oss/ad1848 0xceb37bce	ad1848_init
+EXPORT_SYMBOL sound/oss/mpu401 0x5febf284	unload_mpu401
+EXPORT_SYMBOL sound/oss/mpu401 0x61641749	probe_mpu401
+EXPORT_SYMBOL sound/oss/mpu401 0x80c2c01b	attach_mpu401
+EXPORT_SYMBOL sound/oss/sb_lib 0x071770e0	sb_dsp_init
+EXPORT_SYMBOL sound/oss/sb_lib 0x42424109	sb_be_quiet
+EXPORT_SYMBOL sound/oss/sb_lib 0x450f9aea	smw_free
+EXPORT_SYMBOL sound/oss/sb_lib 0x74afd69c	unload_sbmpu
+EXPORT_SYMBOL sound/oss/sb_lib 0xc4884969	sb_dsp_unload
+EXPORT_SYMBOL sound/oss/sb_lib 0xd8a2731c	sb_dsp_detect
+EXPORT_SYMBOL sound/oss/sb_lib 0xf754f891	probe_sbmpu
+EXPORT_SYMBOL sound/oss/sound 0x04c87ec8	compute_finetune
+EXPORT_SYMBOL sound/oss/sound 0x06339815	sound_unload_synthdev
+EXPORT_SYMBOL sound/oss/sound 0x0f280035	conf_printf
+EXPORT_SYMBOL sound/oss/sound 0x17ba231d	seq_input_event
+EXPORT_SYMBOL sound/oss/sound 0x1b3df3cf	sound_alloc_mixerdev
+EXPORT_SYMBOL sound/oss/sound 0x1f395686	MIDIbuf_avail
+EXPORT_SYMBOL sound/oss/sound 0x2161d5e8	sound_timer_init
+EXPORT_SYMBOL sound/oss/sound 0x2aa31695	midi_synth_kill_note
+EXPORT_SYMBOL sound/oss/sound 0x394cb088	sound_free_dma
+EXPORT_SYMBOL sound/oss/sound 0x418f5fbe	sound_close_dma
+EXPORT_SYMBOL sound/oss/sound 0x4cd01bdd	num_audiodevs
+EXPORT_SYMBOL sound/oss/sound 0x4ff47e9d	midi_synth_setup_voice
+EXPORT_SYMBOL sound/oss/sound 0x51e354b2	sound_alloc_timerdev
+EXPORT_SYMBOL sound/oss/sound 0x56504ca2	midi_synth_reset
+EXPORT_SYMBOL sound/oss/sound 0x5bbd624a	sound_timer_devs
+EXPORT_SYMBOL sound/oss/sound 0x5d986fc9	note_to_freq
+EXPORT_SYMBOL sound/oss/sound 0x6d53e94a	mixer_devs
+EXPORT_SYMBOL sound/oss/sound 0x71465d15	sound_install_audiodrv
+EXPORT_SYMBOL sound/oss/sound 0x7679ee76	seq_copy_to_input
+EXPORT_SYMBOL sound/oss/sound 0x7bdf0907	conf_printf2
+EXPORT_SYMBOL sound/oss/sound 0x892093e0	midi_synth_controller
+EXPORT_SYMBOL sound/oss/sound 0x90bd9714	sequencer_timer
+EXPORT_SYMBOL sound/oss/sound 0x9445c39e	audio_devs
+EXPORT_SYMBOL sound/oss/sound 0x987bcf12	DMAbuf_outputintr
+EXPORT_SYMBOL sound/oss/sound 0x9a95733f	sound_alloc_dma
+EXPORT_SYMBOL sound/oss/sound 0x9bdaf24d	midi_synth_start_note
+EXPORT_SYMBOL sound/oss/sound 0x9d845b18	num_mixers
+EXPORT_SYMBOL sound/oss/sound 0xa1d5f04f	load_mixer_volumes
+EXPORT_SYMBOL sound/oss/sound 0xa1eae7cf	num_midis
+EXPORT_SYMBOL sound/oss/sound 0xa41ead5f	sound_unload_timerdev
+EXPORT_SYMBOL sound/oss/sound 0xa51c913b	sound_unload_mixerdev
+EXPORT_SYMBOL sound/oss/sound 0xa6bb414c	sound_unload_mididev
+EXPORT_SYMBOL sound/oss/sound 0xa948751e	sound_unload_audiodev
+EXPORT_SYMBOL sound/oss/sound 0xad45df73	midi_synth_close
+EXPORT_SYMBOL sound/oss/sound 0xaef743b2	midi_synth_ioctl
+EXPORT_SYMBOL sound/oss/sound 0xb14b22cd	midi_synth_hw_control
+EXPORT_SYMBOL sound/oss/sound 0xb51587f6	do_midi_msg
+EXPORT_SYMBOL sound/oss/sound 0xba413f87	sound_alloc_mididev
+EXPORT_SYMBOL sound/oss/sound 0xba7dd041	midi_synth_bender
+EXPORT_SYMBOL sound/oss/sound 0xc748d109	sound_alloc_synthdev
+EXPORT_SYMBOL sound/oss/sound 0xcab4d5bf	midi_synth_load_patch
+EXPORT_SYMBOL sound/oss/sound 0xcc4b8797	sound_open_dma
+EXPORT_SYMBOL sound/oss/sound 0xd85be938	midi_synth_set_instr
+EXPORT_SYMBOL sound/oss/sound 0xdb400afa	midi_synth_panning
+EXPORT_SYMBOL sound/oss/sound 0xde45e301	sound_install_mixer
+EXPORT_SYMBOL sound/oss/sound 0xe056b71c	DMAbuf_start_dma
+EXPORT_SYMBOL sound/oss/sound 0xe2675a79	sound_timer_interrupt
+EXPORT_SYMBOL sound/oss/sound 0xeb315d99	DMAbuf_inputintr
+EXPORT_SYMBOL sound/oss/sound 0xebf55bc8	midi_devs
+EXPORT_SYMBOL sound/oss/sound 0xf18b69ef	synth_devs
+EXPORT_SYMBOL sound/oss/sound 0xf1ea8a20	midi_synth_aftertouch
+EXPORT_SYMBOL sound/oss/sound 0xf6b3a2fb	midi_synth_open
+EXPORT_SYMBOL sound/oss/sound 0xf78f6363	sequencer_init
+EXPORT_SYMBOL sound/oss/sound 0xfa6871be	sound_timer_syncinterval
+EXPORT_SYMBOL sound/oss/sound 0xfddcbfb3	midi_synth_send_sysex
+EXPORT_SYMBOL sound/oss/uart401 0x049cd8b7	uart401intr
+EXPORT_SYMBOL sound/oss/uart401 0xb79c661a	probe_uart401
+EXPORT_SYMBOL sound/oss/uart401 0xecfdd9c9	unload_uart401
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x2753c41e	snd_ac97_resume
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x2ffad946	snd_ac97_tune_hardware
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x33d97cb3	snd_ac97_pcm_close
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x394bb7e2	snd_ac97_mixer
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x46b1e2a6	snd_ac97_pcm_open
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x54988a88	snd_ac97_update
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x596518d4	snd_ac97_suspend
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x6641c966	snd_ac97_pcm_double_rate_rules
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x71094957	snd_ac97_set_rate
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x824edd5a	snd_ac97_bus
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x83e059bb	snd_ac97_write_cache
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x94651a30	snd_ac97_update_power
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xd0a14420	snd_ac97_update_bits
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xe819c9a0	snd_ac97_get_short_name
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xf39ce0a7	snd_ac97_read
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xfc0a3844	snd_ac97_write
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xfeb8443f	snd_ac97_pcm_assign
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x19097add	snd_emu10k1_memblk_map
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x24b165fa	snd_emu10k1_voice_alloc
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x48a74519	snd_emu10k1_synth_free
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x73075c00	snd_emu10k1_synth_bzero
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xc23f6cc2	snd_emu10k1_synth_alloc
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xc3fe1cbf	snd_emu10k1_synth_copy_from_user
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xd25af256	snd_emu10k1_ptr_read
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xe695e1b9	snd_emu10k1_voice_free
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xfc5650e2	snd_emu10k1_ptr_write
+EXPORT_SYMBOL sound/pci/hda/snd-hda-codec 0xacb9e7be	snd_hda_parse_generic_codec
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x9826901c	snd_ice1712_akm4xxx_init
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0xa70aa2dd	snd_ice1712_akm4xxx_build_controls
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0xe2595a2d	snd_ice1712_akm4xxx_free
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x0e73c1b0	snd_trident_free_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x584acb6d	snd_trident_write_voice_regs
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x68650e36	snd_trident_stop_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x6bdc1386	snd_trident_alloc_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0xfc5b08ae	snd_trident_start_voice
+EXPORT_SYMBOL sound/soc/codecs/snd-soc-uda134x 0x3d4fd4d1	uda134x_dai
+EXPORT_SYMBOL sound/sound_firmware 0x39e3dd23	mod_firmware_load
+EXPORT_SYMBOL sound/soundcore 0x39b8cc1a	register_sound_dsp
+EXPORT_SYMBOL sound/soundcore 0x6bc442d3	register_sound_midi
+EXPORT_SYMBOL sound/soundcore 0x776c869e	register_sound_special
+EXPORT_SYMBOL sound/soundcore 0x7afc9d8a	unregister_sound_mixer
+EXPORT_SYMBOL sound/soundcore 0x99c95fa5	unregister_sound_special
+EXPORT_SYMBOL sound/soundcore 0x9b2d1b54	register_sound_mixer
+EXPORT_SYMBOL sound/soundcore 0xcd083b10	unregister_sound_dsp
+EXPORT_SYMBOL sound/soundcore 0xda28e5dd	register_sound_special_device
+EXPORT_SYMBOL sound/soundcore 0xfa42714b	sound_class
+EXPORT_SYMBOL sound/soundcore 0xfdab6de3	unregister_sound_midi
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x2cbcfdcd	snd_emux_terminate_all
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x524da871	snd_emux_lock_voice
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x655cb202	snd_sf_linear_to_log
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xc0cc5bc4	snd_emux_new
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xde1ef263	snd_emux_register
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xf49a14f9	snd_emux_unlock_voice
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xf9775a21	snd_emux_free
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x01e234f2	__snd_util_mem_alloc
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x0895e1a9	__snd_util_mem_free
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x15cfaea4	snd_util_memhdr_new
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x2ba29873	snd_util_mem_avail
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x45c2abb1	snd_util_memhdr_free
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x5d2130f4	snd_util_mem_alloc
+EXPORT_SYMBOL sound/synth/snd-util-mem 0xab810f2e	__snd_util_memblk_new
+EXPORT_SYMBOL sound/synth/snd-util-mem 0xb2676a58	snd_util_mem_free
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0x16756dc0	snd_usbmidi_input_start
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0x63343b1d	snd_usbmidi_input_stop
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0xd9d2bb03	snd_usbmidi_disconnect
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0xfba59b1d	snd_usb_create_midi_interface
+EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x04dca738	lirc_unregister_driver
+EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0xbdf08d01	lirc_register_driver
+EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0xfc200c68	lirc_get_pdata
+EXPORT_SYMBOL vmlinux 0x00000000	per_cpu__softirq_work_list
+EXPORT_SYMBOL vmlinux 0x000f8480	alloc_tty_driver
+EXPORT_SYMBOL vmlinux 0x005f9757	sget
+EXPORT_SYMBOL vmlinux 0x00801678	flush_scheduled_work
+EXPORT_SYMBOL vmlinux 0x00b0459b	bio_alloc_bioset
+EXPORT_SYMBOL vmlinux 0x00c4dc87	timecounter_init
+EXPORT_SYMBOL vmlinux 0x00e8097b	csum_partial_copy_fromiovecend
+EXPORT_SYMBOL vmlinux 0x01000e51	schedule
+EXPORT_SYMBOL vmlinux 0x01139ffc	max_mapnr
+EXPORT_SYMBOL vmlinux 0x011eaccb	bfifo_qdisc_ops
+EXPORT_SYMBOL vmlinux 0x015f231e	pci_bus_write_config_word
+EXPORT_SYMBOL vmlinux 0x01902adf	netpoll_trap
+EXPORT_SYMBOL vmlinux 0x01a4aab6	set_irq_chip_data
+EXPORT_SYMBOL vmlinux 0x01a80b1f	sb_min_blocksize
+EXPORT_SYMBOL vmlinux 0x01b96eee	pcim_iomap
+EXPORT_SYMBOL vmlinux 0x01c5cf02	fb_validate_mode
+EXPORT_SYMBOL vmlinux 0x01cc962a	skb_put
+EXPORT_SYMBOL vmlinux 0x01df8550	generic_setxattr
+EXPORT_SYMBOL vmlinux 0x01e78ef2	pci_bus_write_config_dword
+EXPORT_SYMBOL vmlinux 0x02384e8d	ioremap_flags
+EXPORT_SYMBOL vmlinux 0x02649054	security_sock_rcv_skb
+EXPORT_SYMBOL vmlinux 0x029324a4	tc_classify_compat
+EXPORT_SYMBOL vmlinux 0x02952d69	blk_queue_bounce
+EXPORT_SYMBOL vmlinux 0x02a2ec4a	filemap_fault
+EXPORT_SYMBOL vmlinux 0x02a6ce5a	crc16_table
+EXPORT_SYMBOL vmlinux 0x02b57899	__kfree_skb
+EXPORT_SYMBOL vmlinux 0x02c91048	sock_i_ino
+EXPORT_SYMBOL vmlinux 0x02cfa794	blk_queue_free_tags
+EXPORT_SYMBOL vmlinux 0x02d81845	audit_log_task_context
+EXPORT_SYMBOL vmlinux 0x02ee26c1	free_pages_exact
+EXPORT_SYMBOL vmlinux 0x03072068	simple_pin_fs
+EXPORT_SYMBOL vmlinux 0x0334da4e	scsi_command_size_tbl
+EXPORT_SYMBOL vmlinux 0x033ae0bf	insert_inode_locked
+EXPORT_SYMBOL vmlinux 0x03447b01	bdput
+EXPORT_SYMBOL vmlinux 0x0360d77b	tcp_create_openreq_child
+EXPORT_SYMBOL vmlinux 0x0369cff5	blk_queue_physical_block_size
+EXPORT_SYMBOL vmlinux 0x037a0cba	kfree
+EXPORT_SYMBOL vmlinux 0x03a43ff2	qdisc_list_del
+EXPORT_SYMBOL vmlinux 0x03bdad22	of_gpio_simple_xlate
+EXPORT_SYMBOL vmlinux 0x03c06156	bitmap_fold
+EXPORT_SYMBOL vmlinux 0x03c6ecf4	sb_set_blocksize
+EXPORT_SYMBOL vmlinux 0x03d0e836	tty_free_termios
+EXPORT_SYMBOL vmlinux 0x03d2ebaf	udp_prot
+EXPORT_SYMBOL vmlinux 0x03d4d941	put_mnt_ns
+EXPORT_SYMBOL vmlinux 0x03e31fed	dcache_dir_close
+EXPORT_SYMBOL vmlinux 0x03ea4124	neigh_lookup
+EXPORT_SYMBOL vmlinux 0x03fd2571	vm_unmap_ram
+EXPORT_SYMBOL vmlinux 0x0400429e	set_irq_chip
+EXPORT_SYMBOL vmlinux 0x040b61d1	soft_cursor
+EXPORT_SYMBOL vmlinux 0x041b1fd9	blk_sync_queue
+EXPORT_SYMBOL vmlinux 0x0422fe4a	inet_csk_timer_bug_msg
+EXPORT_SYMBOL vmlinux 0x043b8483	__kfifo_get
+EXPORT_SYMBOL vmlinux 0x0454ce42	tr_type_trans
+EXPORT_SYMBOL vmlinux 0x047e2ee9	read_dev_sector
+EXPORT_SYMBOL vmlinux 0x047f8bdf	__scsi_device_lookup_by_target
+EXPORT_SYMBOL vmlinux 0x0487f831	fb_find_best_display
+EXPORT_SYMBOL vmlinux 0x049e47b3	xfrm_policy_insert
+EXPORT_SYMBOL vmlinux 0x04d2349b	flush_hash_entry
+EXPORT_SYMBOL vmlinux 0x04fab5bc	jbd2_journal_restart
+EXPORT_SYMBOL vmlinux 0x0507e63f	genphy_read_status
+EXPORT_SYMBOL vmlinux 0x05162293	sock_tx_timestamp
+EXPORT_SYMBOL vmlinux 0x051fdd4c	mb_cache_entry_insert
+EXPORT_SYMBOL vmlinux 0x052fc1ca	qdisc_warn_nonwc
+EXPORT_SYMBOL vmlinux 0x054493e6	vm_insert_pfn
+EXPORT_SYMBOL vmlinux 0x0550cadf	ipv4_specific
+EXPORT_SYMBOL vmlinux 0x0552d59d	ps2_handle_response
+EXPORT_SYMBOL vmlinux 0x05570d1c	bio_endio
+EXPORT_SYMBOL vmlinux 0x0563294b	journal_revoke
+EXPORT_SYMBOL vmlinux 0x056c04d5	otg_get_transceiver
+EXPORT_SYMBOL vmlinux 0x057ce975	hex_dump_to_buffer
+EXPORT_SYMBOL vmlinux 0x059a9c45	locks_remove_posix
+EXPORT_SYMBOL vmlinux 0x05a08966	elv_rb_former_request
+EXPORT_SYMBOL vmlinux 0x05a514a1	_insl_ns
+EXPORT_SYMBOL vmlinux 0x05adc96b	of_get_parent
+EXPORT_SYMBOL vmlinux 0x05b74b89	dev_load
+EXPORT_SYMBOL vmlinux 0x05cfe96c	file_update_time
+EXPORT_SYMBOL vmlinux 0x05d331d1	xfrm_state_unregister_afinfo
+EXPORT_SYMBOL vmlinux 0x06148581	tcp_hashinfo
+EXPORT_SYMBOL vmlinux 0x061651be	strcat
+EXPORT_SYMBOL vmlinux 0x062aba95	mempool_free
+EXPORT_SYMBOL vmlinux 0x0675c7eb	atomic64_cmpxchg
+EXPORT_SYMBOL vmlinux 0x067d8d35	security_release_secctx
+EXPORT_SYMBOL vmlinux 0x06993f40	inet_unregister_protosw
+EXPORT_SYMBOL vmlinux 0x06a3b256	jbd2_journal_get_undo_access
+EXPORT_SYMBOL vmlinux 0x06b05fd8	ip_xfrm_me_harder
+EXPORT_SYMBOL vmlinux 0x06d8bae1	idr_get_new
+EXPORT_SYMBOL vmlinux 0x06e39669	tcp_v4_destroy_sock
+EXPORT_SYMBOL vmlinux 0x06e74489	nf_log_packet
+EXPORT_SYMBOL vmlinux 0x06fe3b14	default_grn
+EXPORT_SYMBOL vmlinux 0x06fe97f7	matroxfb_register_driver
+EXPORT_SYMBOL vmlinux 0x071626ab	scsi_register
+EXPORT_SYMBOL vmlinux 0x0719ff32	sk_receive_skb
+EXPORT_SYMBOL vmlinux 0x0727c4f3	iowrite8
+EXPORT_SYMBOL vmlinux 0x0799aca4	local_bh_enable
+EXPORT_SYMBOL vmlinux 0x0799c50a	param_set_ulong
+EXPORT_SYMBOL vmlinux 0x07a890c8	fb_alloc_cmap
+EXPORT_SYMBOL vmlinux 0x07c620bc	dst_discard
+EXPORT_SYMBOL vmlinux 0x07cc4a5d	printk_timed_ratelimit
+EXPORT_SYMBOL vmlinux 0x07d10f95	create_proc_entry
+EXPORT_SYMBOL vmlinux 0x07d319eb	register_gifconf
+EXPORT_SYMBOL vmlinux 0x07d9b783	scsi_nl_send_vendor_msg
+EXPORT_SYMBOL vmlinux 0x0806fdcf	sg_miter_next
+EXPORT_SYMBOL vmlinux 0x082afc6e	vc_cons
+EXPORT_SYMBOL vmlinux 0x082c3213	pci_root_buses
+EXPORT_SYMBOL vmlinux 0x08955201	__rta_fill
+EXPORT_SYMBOL vmlinux 0x089b2329	kmem_cache_name
+EXPORT_SYMBOL vmlinux 0x08a22651	dm_kcopyd_client_create
+EXPORT_SYMBOL vmlinux 0x08e52929	ip_nat_decode_session
+EXPORT_SYMBOL vmlinux 0x08e9bf5a	fb_class
+EXPORT_SYMBOL vmlinux 0x08ed0b62	mac_vmode_to_var
+EXPORT_SYMBOL vmlinux 0x08ff3823	qdisc_create_dflt
+EXPORT_SYMBOL vmlinux 0x091807a7	mpage_writepages
+EXPORT_SYMBOL vmlinux 0x091ae81b	dmam_pool_destroy
+EXPORT_SYMBOL vmlinux 0x092b007a	sleep_on_timeout
+EXPORT_SYMBOL vmlinux 0x0948cde9	num_physpages
+EXPORT_SYMBOL vmlinux 0x095bb830	down_interruptible
+EXPORT_SYMBOL vmlinux 0x0961266c	xfrm_state_delete
+EXPORT_SYMBOL vmlinux 0x098b71c6	fb_dealloc_cmap
+EXPORT_SYMBOL vmlinux 0x09c55cec	schedule_timeout_interruptible
+EXPORT_SYMBOL vmlinux 0x09c6472c	pcim_iounmap_regions
+EXPORT_SYMBOL vmlinux 0x09c8eb55	font_vga_8x16
+EXPORT_SYMBOL vmlinux 0x09e8a15d	i2c_release_client
+EXPORT_SYMBOL vmlinux 0x09fd926b	skb_free_datagram
+EXPORT_SYMBOL vmlinux 0x0a049a61	neigh_create
+EXPORT_SYMBOL vmlinux 0x0a0ab956	vmap
+EXPORT_SYMBOL vmlinux 0x0a11b200	override_creds
+EXPORT_SYMBOL vmlinux 0x0a2190b7	serio_unregister_port
+EXPORT_SYMBOL vmlinux 0x0a2487e0	unblock_all_signals
+EXPORT_SYMBOL vmlinux 0x0a3131f6	strnchr
+EXPORT_SYMBOL vmlinux 0x0a4747ff	allocate_resource
+EXPORT_SYMBOL vmlinux 0x0a745ccf	of_find_device_by_node
+EXPORT_SYMBOL vmlinux 0x0a8365ab	simple_rename
+EXPORT_SYMBOL vmlinux 0x0a853528	vfs_fsync
+EXPORT_SYMBOL vmlinux 0x0ab204c9	nf_register_queue_handler
+EXPORT_SYMBOL vmlinux 0x0ac3c858	key_payload_reserve
+EXPORT_SYMBOL vmlinux 0x0acb1a3c	__bitmap_shift_right
+EXPORT_SYMBOL vmlinux 0x0afa66fc	generic_file_readonly_mmap
+EXPORT_SYMBOL vmlinux 0x0b0d91bd	dev_get_by_index
+EXPORT_SYMBOL vmlinux 0x0b0f99f7	tty_port_carrier_raised
+EXPORT_SYMBOL vmlinux 0x0b1beb31	vmalloc_32_user
+EXPORT_SYMBOL vmlinux 0x0b1ecd58	of_device_alloc
+EXPORT_SYMBOL vmlinux 0x0b2ba6ef	journal_update_format
+EXPORT_SYMBOL vmlinux 0x0b661722	alloc_buffer_head
+EXPORT_SYMBOL vmlinux 0x0b742fd7	simple_strtol
+EXPORT_SYMBOL vmlinux 0x0b74b68e	xfrm_state_alloc
+EXPORT_SYMBOL vmlinux 0x0b98f584	sk_release_kernel
+EXPORT_SYMBOL vmlinux 0x0ba2defe	napi_gro_flush
+EXPORT_SYMBOL vmlinux 0x0ba4b2dd	dquot_alloc_inode
+EXPORT_SYMBOL vmlinux 0x0ba4edce	tcp_recvmsg
+EXPORT_SYMBOL vmlinux 0x0ba64476	xfrm_unregister_km
+EXPORT_SYMBOL vmlinux 0x0bca6c0c	inet_csk_destroy_sock
+EXPORT_SYMBOL vmlinux 0x0c05b234	set_groups
+EXPORT_SYMBOL vmlinux 0x0c12e626	__debugger_bpt
+EXPORT_SYMBOL vmlinux 0x0c379382	blk_free_tags
+EXPORT_SYMBOL vmlinux 0x0c4dd262	set_binfmt
+EXPORT_SYMBOL vmlinux 0x0c65e73c	scsi_normalize_sense
+EXPORT_SYMBOL vmlinux 0x0c81a7cd	scsi_eh_prep_cmnd
+EXPORT_SYMBOL vmlinux 0x0c892734	pcie_port_service_register
+EXPORT_SYMBOL vmlinux 0x0c8b5a92	set_page_dirty
+EXPORT_SYMBOL vmlinux 0x0c8c9e99	scsi_show_extd_sense
+EXPORT_SYMBOL vmlinux 0x0c9b6089	nvram_get_size
+EXPORT_SYMBOL vmlinux 0x0cae232b	utf16s_to_utf8s
+EXPORT_SYMBOL vmlinux 0x0cce1783	__dev_remove_pack
+EXPORT_SYMBOL vmlinux 0x0cf582c5	dmam_pool_create
+EXPORT_SYMBOL vmlinux 0x0cf8fbfd	simple_transaction_set
+EXPORT_SYMBOL vmlinux 0x0cf9fe8b	dmam_alloc_noncoherent
+EXPORT_SYMBOL vmlinux 0x0d0fe2f4	down_trylock
+EXPORT_SYMBOL vmlinux 0x0d3002c2	ilookup5_nowait
+EXPORT_SYMBOL vmlinux 0x0d3def21	idr_pre_get
+EXPORT_SYMBOL vmlinux 0x0d500f50	dev_trans_start
+EXPORT_SYMBOL vmlinux 0x0d542439	__ipv6_addr_type
+EXPORT_SYMBOL vmlinux 0x0d64e417	set_security_override
+EXPORT_SYMBOL vmlinux 0x0d7299b8	proc_dointvec_userhz_jiffies
+EXPORT_SYMBOL vmlinux 0x0d7dfcb4	scsi_release_buffers
+EXPORT_SYMBOL vmlinux 0x0da10ec3	security_sock_graft
+EXPORT_SYMBOL vmlinux 0x0dbf38b8	mol_trampoline
+EXPORT_SYMBOL vmlinux 0x0dc9bc14	alloc_disk_node
+EXPORT_SYMBOL vmlinux 0x0df29468	sock_kfree_s
+EXPORT_SYMBOL vmlinux 0x0e10433e	sock_no_accept
+EXPORT_SYMBOL vmlinux 0x0e2d16c3	proc_dointvec
+EXPORT_SYMBOL vmlinux 0x0e52592a	panic
+EXPORT_SYMBOL vmlinux 0x0e6dd809	nobh_write_end
+EXPORT_SYMBOL vmlinux 0x0e7c5361	bdi_init
+EXPORT_SYMBOL vmlinux 0x0e7e919f	pci_try_set_mwi
+EXPORT_SYMBOL vmlinux 0x0ef20db1	kernstart_addr
+EXPORT_SYMBOL vmlinux 0x0f12c4e8	tty_port_free_xmit_buf
+EXPORT_SYMBOL vmlinux 0x0f1ef871	posix_acl_alloc
+EXPORT_SYMBOL vmlinux 0x0f28cb91	nvram_read_byte
+EXPORT_SYMBOL vmlinux 0x0f7254d4	devm_ioport_unmap
+EXPORT_SYMBOL vmlinux 0x0f86b8a2	blk_requeue_request
+EXPORT_SYMBOL vmlinux 0x0fbe3445	napi_frags_skb
+EXPORT_SYMBOL vmlinux 0x0fc8a42b	fb_get_buffer_offset
+EXPORT_SYMBOL vmlinux 0x100584f7	nla_reserve_nohdr
+EXPORT_SYMBOL vmlinux 0x1010ebdb	qdisc_destroy
+EXPORT_SYMBOL vmlinux 0x1017714d	tty_port_close_start
+EXPORT_SYMBOL vmlinux 0x102821b5	netlink_dump_start
+EXPORT_SYMBOL vmlinux 0x105e2727	__tracepoint_kmalloc
+EXPORT_SYMBOL vmlinux 0x106de8b1	input_free_device
+EXPORT_SYMBOL vmlinux 0x108afc08	take_over_console
+EXPORT_SYMBOL vmlinux 0x108daa76	mdiobus_unregister
+EXPORT_SYMBOL vmlinux 0x108e8985	param_get_uint
+EXPORT_SYMBOL vmlinux 0x10ee20bb	default_blu
+EXPORT_SYMBOL vmlinux 0x11267875	scsi_extd_sense_format
+EXPORT_SYMBOL vmlinux 0x1129b85d	tcf_em_tree_dump
+EXPORT_SYMBOL vmlinux 0x11384b7e	unregister_8022_client
+EXPORT_SYMBOL vmlinux 0x1163f0a7	blk_max_low_pfn
+EXPORT_SYMBOL vmlinux 0x11663cec	adb_register
+EXPORT_SYMBOL vmlinux 0x117093be	qdisc_class_hash_init
+EXPORT_SYMBOL vmlinux 0x118f01ea	putname
+EXPORT_SYMBOL vmlinux 0x12161125	matroxfb_g450_setclk
+EXPORT_SYMBOL vmlinux 0x121fc8bd	kernel_getsockname
+EXPORT_SYMBOL vmlinux 0x122962d2	inet_shutdown
+EXPORT_SYMBOL vmlinux 0x124fd0e7	devm_ioremap
+EXPORT_SYMBOL vmlinux 0x125477c9	textsearch_unregister
+EXPORT_SYMBOL vmlinux 0x125e16db	phy_driver_unregister
+EXPORT_SYMBOL vmlinux 0x12637c56	i2c_smbus_read_byte
+EXPORT_SYMBOL vmlinux 0x12703333	skb_copy_and_csum_dev
+EXPORT_SYMBOL vmlinux 0x12839d2c	dev_get_by_flags
+EXPORT_SYMBOL vmlinux 0x12b6f940	of_scan_pci_bridge
+EXPORT_SYMBOL vmlinux 0x12bb3336	netif_device_detach
+EXPORT_SYMBOL vmlinux 0x12bcae3a	pcix_set_mmrbc
+EXPORT_SYMBOL vmlinux 0x12c6d73a	inet_frags_init
+EXPORT_SYMBOL vmlinux 0x12da5bb2	__kmalloc
+EXPORT_SYMBOL vmlinux 0x12e5ef0c	rtas_set_power_level
+EXPORT_SYMBOL vmlinux 0x12f7b7dd	__sk_dst_check
+EXPORT_SYMBOL vmlinux 0x12f8892e	sock_init_data
+EXPORT_SYMBOL vmlinux 0x13653f70	noop_qdisc
+EXPORT_SYMBOL vmlinux 0x139fa087	d_alloc_name
+EXPORT_SYMBOL vmlinux 0x13b53a07	blk_rq_map_user_iov
+EXPORT_SYMBOL vmlinux 0x13c8c298	simple_write_begin
+EXPORT_SYMBOL vmlinux 0x13e2a7c1	seq_release_private
+EXPORT_SYMBOL vmlinux 0x13e3b739	arp_broken_ops
+EXPORT_SYMBOL vmlinux 0x13e784e3	pneigh_lookup
+EXPORT_SYMBOL vmlinux 0x13f42152	system_entering_hibernation
+EXPORT_SYMBOL vmlinux 0x13f890f8	matroxfb_vgaHWrestore
+EXPORT_SYMBOL vmlinux 0x1407c6e7	kmap_prot
+EXPORT_SYMBOL vmlinux 0x14182e99	inet_stream_connect
+EXPORT_SYMBOL vmlinux 0x141d99f0	pci_release_regions
+EXPORT_SYMBOL vmlinux 0x1420423d	pci_request_regions
+EXPORT_SYMBOL vmlinux 0x144ed3a1	dev_base_lock
+EXPORT_SYMBOL vmlinux 0x148efe3b	matrox_G100
+EXPORT_SYMBOL vmlinux 0x14943841	cdev_alloc
+EXPORT_SYMBOL vmlinux 0x14b62b1e	skb_dma_unmap
+EXPORT_SYMBOL vmlinux 0x14b9d46b	kernel_sendpage
+EXPORT_SYMBOL vmlinux 0x14c86b6a	ide_complete_rq
+EXPORT_SYMBOL vmlinux 0x14f9ec5f	hippi_neigh_setup_dev
+EXPORT_SYMBOL vmlinux 0x15039f72	nla_append
+EXPORT_SYMBOL vmlinux 0x1518c703	skb_dma_map
+EXPORT_SYMBOL vmlinux 0x1521b8f4	generic_file_buffered_write
+EXPORT_SYMBOL vmlinux 0x153ccc0d	neigh_resolve_output
+EXPORT_SYMBOL vmlinux 0x154aeeba	xfrm_state_flush
+EXPORT_SYMBOL vmlinux 0x155133e9	tcp_tso_segment
+EXPORT_SYMBOL vmlinux 0x1551dc51	bitmap_find_free_region
+EXPORT_SYMBOL vmlinux 0x15733740	dev_unicast_sync
+EXPORT_SYMBOL vmlinux 0x158d60e9	__bforget
+EXPORT_SYMBOL vmlinux 0x15a6e22f	sock_no_shutdown
+EXPORT_SYMBOL vmlinux 0x15ab5c98	devm_ioremap_nocache
+EXPORT_SYMBOL vmlinux 0x15bbd614	kernel_accept
+EXPORT_SYMBOL vmlinux 0x15e384f0	__skb_checksum_complete_head
+EXPORT_SYMBOL vmlinux 0x15e5ff16	call_usermodehelper_pipe
+EXPORT_SYMBOL vmlinux 0x160bd45c	rtas_token
+EXPORT_SYMBOL vmlinux 0x1613664b	scsi_put_command
+EXPORT_SYMBOL vmlinux 0x163c5e39	twl4030_i2c_read
+EXPORT_SYMBOL vmlinux 0x16479e8f	panic_notifier_list
+EXPORT_SYMBOL vmlinux 0x16481590	pci_get_slot
+EXPORT_SYMBOL vmlinux 0x166ca6b3	pci_read_irq_line
+EXPORT_SYMBOL vmlinux 0x167157b7	dm_io
+EXPORT_SYMBOL vmlinux 0x1679b29e	tcf_hash_create
+EXPORT_SYMBOL vmlinux 0x16870aef	brioctl_set
+EXPORT_SYMBOL vmlinux 0x16a0f2b0	jbd2_journal_forget
+EXPORT_SYMBOL vmlinux 0x16a1b9a1	sock_sendmsg
+EXPORT_SYMBOL vmlinux 0x16b5d76e	scm_fp_dup
+EXPORT_SYMBOL vmlinux 0x16e911d4	down_write
+EXPORT_SYMBOL vmlinux 0x171f0eab	blk_put_request
+EXPORT_SYMBOL vmlinux 0x17201ba8	pneigh_enqueue
+EXPORT_SYMBOL vmlinux 0x17489230	DAC1064_global_restore
+EXPORT_SYMBOL vmlinux 0x176df0a1	netdev_rx_csum_fault
+EXPORT_SYMBOL vmlinux 0x17766dbf	blk_run_queue
+EXPORT_SYMBOL vmlinux 0x177f3424	task_tgid_nr_ns
+EXPORT_SYMBOL vmlinux 0x17889018	gnet_stats_copy_rate_est
+EXPORT_SYMBOL vmlinux 0x179b20ca	ioctl_by_bdev
+EXPORT_SYMBOL vmlinux 0x17aa156a	__ucmpdi2
+EXPORT_SYMBOL vmlinux 0x17b53868	tcf_action_exec
+EXPORT_SYMBOL vmlinux 0x17df17bc	sysctl_tcp_ecn
+EXPORT_SYMBOL vmlinux 0x17f341a0	i8042_lock_chip
+EXPORT_SYMBOL vmlinux 0x1813716a	i2c_smbus_xfer
+EXPORT_SYMBOL vmlinux 0x183fa88b	mempool_alloc_slab
+EXPORT_SYMBOL vmlinux 0x186ca29f	page_readlink
+EXPORT_SYMBOL vmlinux 0x187a3338	vfs_readlink
+EXPORT_SYMBOL vmlinux 0x188f5949	jbd2_journal_get_write_access
+EXPORT_SYMBOL vmlinux 0x1890c46a	__generic_file_aio_write
+EXPORT_SYMBOL vmlinux 0x18e51957	rtnl_notify
+EXPORT_SYMBOL vmlinux 0x190f6597	tcp_md5_hash_skb_data
+EXPORT_SYMBOL vmlinux 0x1933d763	vm_insert_mixed
+EXPORT_SYMBOL vmlinux 0x19437b3d	i2c_smbus_write_byte
+EXPORT_SYMBOL vmlinux 0x194cff14	netif_rx
+EXPORT_SYMBOL vmlinux 0x1966bf16	down_read_trylock
+EXPORT_SYMBOL vmlinux 0x1976bc16	__tracepoint_kmem_cache_free
+EXPORT_SYMBOL vmlinux 0x199ed0cd	net_disable_timestamp
+EXPORT_SYMBOL vmlinux 0x19e07b15	icmp_send
+EXPORT_SYMBOL vmlinux 0x19e667fc	ide_geometry_proc_fops
+EXPORT_SYMBOL vmlinux 0x1a00e6a7	vfs_readv
+EXPORT_SYMBOL vmlinux 0x1a0cb8b3	iget_failed
+EXPORT_SYMBOL vmlinux 0x1a4e1bda	sock_get_timestamp
+EXPORT_SYMBOL vmlinux 0x1a79ded4	proto_register
+EXPORT_SYMBOL vmlinux 0x1a99b4ad	pipe_lock
+EXPORT_SYMBOL vmlinux 0x1a9dbbba	jbd2_journal_flush
+EXPORT_SYMBOL vmlinux 0x1aba5949	input_unregister_handle
+EXPORT_SYMBOL vmlinux 0x1ac61557	journal_create
+EXPORT_SYMBOL vmlinux 0x1ace138d	bitmap_allocate_region
+EXPORT_SYMBOL vmlinux 0x1aeac738	blk_fetch_request
+EXPORT_SYMBOL vmlinux 0x1b015d25	bitmap_parselist
+EXPORT_SYMBOL vmlinux 0x1b0d1322	sg_alloc_table
+EXPORT_SYMBOL vmlinux 0x1b1c49b9	blk_queue_io_min
+EXPORT_SYMBOL vmlinux 0x1b1cfcd9	register_filesystem
+EXPORT_SYMBOL vmlinux 0x1b6314fd	in_aton
+EXPORT_SYMBOL vmlinux 0x1b68dc7c	blkdev_issue_flush
+EXPORT_SYMBOL vmlinux 0x1b7861ab	tty_unregister_driver
+EXPORT_SYMBOL vmlinux 0x1b79738d	simple_readpage
+EXPORT_SYMBOL vmlinux 0x1b7d3a59	vlan_dev_vlan_id
+EXPORT_SYMBOL vmlinux 0x1b8b95ad	i8042_unlock_chip
+EXPORT_SYMBOL vmlinux 0x1b9981cc	set_irq_wake
+EXPORT_SYMBOL vmlinux 0x1b9e0ff1	scsilun_to_int
+EXPORT_SYMBOL vmlinux 0x1ba1e20b	phy_sanitize_settings
+EXPORT_SYMBOL vmlinux 0x1bc01101	put_tty_driver
+EXPORT_SYMBOL vmlinux 0x1bc4ff03	tty_termios_hw_change
+EXPORT_SYMBOL vmlinux 0x1bda578d	dev_addr_add
+EXPORT_SYMBOL vmlinux 0x1be6d238	init_timer_deferrable_key
+EXPORT_SYMBOL vmlinux 0x1bebf07c	mdiobus_scan
+EXPORT_SYMBOL vmlinux 0x1bed3975	lookup_hash
+EXPORT_SYMBOL vmlinux 0x1bef543b	rtnl_unicast
+EXPORT_SYMBOL vmlinux 0x1c028113	setup_arg_pages
+EXPORT_SYMBOL vmlinux 0x1c160a38	dm_kcopyd_copy
+EXPORT_SYMBOL vmlinux 0x1c1af916	set_normalized_timespec
+EXPORT_SYMBOL vmlinux 0x1c1ef27c	load_nls_default
+EXPORT_SYMBOL vmlinux 0x1c30ecf0	mb_cache_entry_find_first
+EXPORT_SYMBOL vmlinux 0x1c324357	idr_replace
+EXPORT_SYMBOL vmlinux 0x1c5b2c15	pmu_wait_complete
+EXPORT_SYMBOL vmlinux 0x1c7eaa48	kobject_del
+EXPORT_SYMBOL vmlinux 0x1c80de9c	ip_send_check
+EXPORT_SYMBOL vmlinux 0x1c83d532	bdget
+EXPORT_SYMBOL vmlinux 0x1c8daa9f	sock_release
+EXPORT_SYMBOL vmlinux 0x1c8fd6fc	page_address
+EXPORT_SYMBOL vmlinux 0x1ca3d6c5	bd_set_size
+EXPORT_SYMBOL vmlinux 0x1cc6719a	register_reboot_notifier
+EXPORT_SYMBOL vmlinux 0x1cd8bc80	flush_icache_user_range
+EXPORT_SYMBOL vmlinux 0x1ce09067	security_path_mknod
+EXPORT_SYMBOL vmlinux 0x1cfa0c30	of_iomap
+EXPORT_SYMBOL vmlinux 0x1d1f4984	skb_queue_tail
+EXPORT_SYMBOL vmlinux 0x1d239ed3	clear_inode
+EXPORT_SYMBOL vmlinux 0x1d2e87c6	do_gettimeofday
+EXPORT_SYMBOL vmlinux 0x1d49cc65	posix_lock_file
+EXPORT_SYMBOL vmlinux 0x1d5180c1	input_unregister_handler
+EXPORT_SYMBOL vmlinux 0x1d5b37aa	gnet_stats_copy_basic
+EXPORT_SYMBOL vmlinux 0x1d77cfa1	request_firmware_nowait
+EXPORT_SYMBOL vmlinux 0x1d91574f	ethtool_op_set_tx_ipv6_csum
+EXPORT_SYMBOL vmlinux 0x1dc36131	fb_destroy_modedb
+EXPORT_SYMBOL vmlinux 0x1dd571e6	fb_copy_cmap
+EXPORT_SYMBOL vmlinux 0x1dd79f59	hippi_mac_addr
+EXPORT_SYMBOL vmlinux 0x1e084830	set_security_override_from_ctx
+EXPORT_SYMBOL vmlinux 0x1e6d26a8	strstr
+EXPORT_SYMBOL vmlinux 0x1e81b5d3	matroxfb_g450_setpll_cond
+EXPORT_SYMBOL vmlinux 0x1e89f873	input_register_handler
+EXPORT_SYMBOL vmlinux 0x1ea5de2e	iw_handler_get_spy
+EXPORT_SYMBOL vmlinux 0x1ecb9943	posix_acl_to_xattr
+EXPORT_SYMBOL vmlinux 0x1edc9598	_atomic_dec_and_lock
+EXPORT_SYMBOL vmlinux 0x1eec84e1	vfs_quota_off
+EXPORT_SYMBOL vmlinux 0x1eeeb79d	dev_mc_sync
+EXPORT_SYMBOL vmlinux 0x1ef81084	write_one_page
+EXPORT_SYMBOL vmlinux 0x1efe283f	__cap_full_set
+EXPORT_SYMBOL vmlinux 0x1f1b59ad	inode_get_bytes
+EXPORT_SYMBOL vmlinux 0x1f3d86d8	netpoll_setup
+EXPORT_SYMBOL vmlinux 0x1f7cc628	mempool_create
+EXPORT_SYMBOL vmlinux 0x1f848154	dquot_mark_dquot_dirty
+EXPORT_SYMBOL vmlinux 0x1f91ff57	serio_close
+EXPORT_SYMBOL vmlinux 0x1fa88a2f	ethtool_op_set_sg
+EXPORT_SYMBOL vmlinux 0x1fae7a0b	wait_for_completion_timeout
+EXPORT_SYMBOL vmlinux 0x1fe7792a	security_inode_permission
+EXPORT_SYMBOL vmlinux 0x1feb6cd4	tty_driver_kref_put
+EXPORT_SYMBOL vmlinux 0x1ff69dd8	vfs_fstatat
+EXPORT_SYMBOL vmlinux 0x20000329	simple_strtoul
+EXPORT_SYMBOL vmlinux 0x20030ecd	ioremap
+EXPORT_SYMBOL vmlinux 0x20133bb6	sock_get_timestampns
+EXPORT_SYMBOL vmlinux 0x2014fad2	add_timer
+EXPORT_SYMBOL vmlinux 0x20186fb4	qdisc_reset
+EXPORT_SYMBOL vmlinux 0x20385c58	genl_register_mc_group
+EXPORT_SYMBOL vmlinux 0x203d84d2	pagevec_lookup_tag
+EXPORT_SYMBOL vmlinux 0x204c57eb	xfrm_register_type
+EXPORT_SYMBOL vmlinux 0x2055532e	matroxfb_g450_connect
+EXPORT_SYMBOL vmlinux 0x206484af	sg_copy_from_buffer
+EXPORT_SYMBOL vmlinux 0x206fc972	remove_proc_entry
+EXPORT_SYMBOL vmlinux 0x2080941a	of_find_property
+EXPORT_SYMBOL vmlinux 0x2086930e	of_platform_bus_probe
+EXPORT_SYMBOL vmlinux 0x2096d9a5	flush_tlb_page
+EXPORT_SYMBOL vmlinux 0x20c0417a	__blk_end_request_cur
+EXPORT_SYMBOL vmlinux 0x20d3e9ca	tty_port_tty_set
+EXPORT_SYMBOL vmlinux 0x20e6b9f6	pcim_iomap_regions_request_all
+EXPORT_SYMBOL vmlinux 0x20f27045	filemap_fdatawait
+EXPORT_SYMBOL vmlinux 0x21140e7b	eth_validate_addr
+EXPORT_SYMBOL vmlinux 0x2118bed0	call_usermodehelper_freeinfo
+EXPORT_SYMBOL vmlinux 0x215ebd78	bitrev16
+EXPORT_SYMBOL vmlinux 0x21620219	request_firmware
+EXPORT_SYMBOL vmlinux 0x21853b12	aio_complete
+EXPORT_SYMBOL vmlinux 0x21db6f3b	phy_start
+EXPORT_SYMBOL vmlinux 0x21e87fc0	locks_init_lock
+EXPORT_SYMBOL vmlinux 0x2207b25d	cpu_sysdev_class
+EXPORT_SYMBOL vmlinux 0x222dfe2a	sysctl_intvec
+EXPORT_SYMBOL vmlinux 0x222e7ce2	sysfs_streq
+EXPORT_SYMBOL vmlinux 0x2234abb0	single_open
+EXPORT_SYMBOL vmlinux 0x224710b7	pcim_pin_device
+EXPORT_SYMBOL vmlinux 0x22471ba4	bio_integrity_tag_size
+EXPORT_SYMBOL vmlinux 0x225027f8	fb_set_var
+EXPORT_SYMBOL vmlinux 0x225ea34d	of_match_node
+EXPORT_SYMBOL vmlinux 0x226e86a9	audit_log
+EXPORT_SYMBOL vmlinux 0x227311ad	of_phy_connect
+EXPORT_SYMBOL vmlinux 0x2288378f	system_state
+EXPORT_SYMBOL vmlinux 0x22a73912	__tcp_put_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x22b325d5	kd_mksound
+EXPORT_SYMBOL vmlinux 0x22b4096e	netif_napi_del
+EXPORT_SYMBOL vmlinux 0x22b6533b	xfrm_sad_getinfo
+EXPORT_SYMBOL vmlinux 0x22c6a709	datagram_poll
+EXPORT_SYMBOL vmlinux 0x22da923f	kthread_bind
+EXPORT_SYMBOL vmlinux 0x22daa663	blk_queue_max_discard_sectors
+EXPORT_SYMBOL vmlinux 0x22e8ac3a	pci_read_vpd
+EXPORT_SYMBOL vmlinux 0x231ab5ce	blk_integrity_compare
+EXPORT_SYMBOL vmlinux 0x23269a13	strict_strtoul
+EXPORT_SYMBOL vmlinux 0x233b7136	blk_queue_stack_limits
+EXPORT_SYMBOL vmlinux 0x234cf75d	pci_domain_nr
+EXPORT_SYMBOL vmlinux 0x236159a1	phy_attach
+EXPORT_SYMBOL vmlinux 0x237e22aa	inet_proto_csum_replace4
+EXPORT_SYMBOL vmlinux 0x23941f1e	d_instantiate
+EXPORT_SYMBOL vmlinux 0x23a11200	sock_common_setsockopt
+EXPORT_SYMBOL vmlinux 0x23cdd76d	tcp_md5_hash_key
+EXPORT_SYMBOL vmlinux 0x23d8609f	pci_wake_from_d3
+EXPORT_SYMBOL vmlinux 0x23fd3028	vmalloc_node
+EXPORT_SYMBOL vmlinux 0x23fdf489	inode_sub_rsv_space
+EXPORT_SYMBOL vmlinux 0x245489b2	nonseekable_open
+EXPORT_SYMBOL vmlinux 0x2459bbcc	console_set_on_cmdline
+EXPORT_SYMBOL vmlinux 0x2465e121	generic_file_llseek_unlocked
+EXPORT_SYMBOL vmlinux 0x249bb03a	dquot_alloc
+EXPORT_SYMBOL vmlinux 0x24a85c3e	key_put
+EXPORT_SYMBOL vmlinux 0x24ab1651	journal_flush
+EXPORT_SYMBOL vmlinux 0x24dbf169	i2c_smbus_read_byte_data
+EXPORT_SYMBOL vmlinux 0x24e4f5fb	nf_log_bind_pf
+EXPORT_SYMBOL vmlinux 0x24eb5668	d_move
+EXPORT_SYMBOL vmlinux 0x24fdac79	wake_bit_function
+EXPORT_SYMBOL vmlinux 0x250113b4	memory_read_from_buffer
+EXPORT_SYMBOL vmlinux 0x2511c20a	pci_prepare_to_sleep
+EXPORT_SYMBOL vmlinux 0x25128fdd	tcf_em_register
+EXPORT_SYMBOL vmlinux 0x252d53be	skb_over_panic
+EXPORT_SYMBOL vmlinux 0x2540f403	xfrm_user_policy
+EXPORT_SYMBOL vmlinux 0x2571a86b	path_put
+EXPORT_SYMBOL vmlinux 0x25820c64	fs_overflowuid
+EXPORT_SYMBOL vmlinux 0x258355b4	fb_find_best_mode
+EXPORT_SYMBOL vmlinux 0x25ba121c	mempool_resize
+EXPORT_SYMBOL vmlinux 0x25c15f6c	sk_send_sigurg
+EXPORT_SYMBOL vmlinux 0x25c72e42	scsi_nonblockable_ioctl
+EXPORT_SYMBOL vmlinux 0x25cf8049	matroxfb_PLL_calcclock
+EXPORT_SYMBOL vmlinux 0x25f3bd2e	atomic64_xchg
+EXPORT_SYMBOL vmlinux 0x25f6c368	dev_mc_unsync
+EXPORT_SYMBOL vmlinux 0x25fa6f17	wait_for_completion
+EXPORT_SYMBOL vmlinux 0x261e6f55	mutex_lock_killable
+EXPORT_SYMBOL vmlinux 0x26269f2b	kunmap_atomic
+EXPORT_SYMBOL vmlinux 0x26477c07	__vmalloc
+EXPORT_SYMBOL vmlinux 0x265f0a96	skb_copy_and_csum_datagram_iovec
+EXPORT_SYMBOL vmlinux 0x266d03c8	macio_dev_put
+EXPORT_SYMBOL vmlinux 0x267498f6	dquot_drop
+EXPORT_SYMBOL vmlinux 0x267fc65b	__tasklet_hi_schedule
+EXPORT_SYMBOL vmlinux 0x268c4c36	dquot_transfer
+EXPORT_SYMBOL vmlinux 0x26ab4495	filemap_write_and_wait
+EXPORT_SYMBOL vmlinux 0x26bfe31e	iput
+EXPORT_SYMBOL vmlinux 0x26e76fb8	sysctl_udp_wmem_min
+EXPORT_SYMBOL vmlinux 0x26e974cb	elv_rq_merge_ok
+EXPORT_SYMBOL vmlinux 0x272c9acd	pmu_battery_count
+EXPORT_SYMBOL vmlinux 0x2745cd6d	xfrm_policy_delete
+EXPORT_SYMBOL vmlinux 0x274ada14	___pskb_trim
+EXPORT_SYMBOL vmlinux 0x2765b034	neigh_seq_stop
+EXPORT_SYMBOL vmlinux 0x27696b2e	i2c_smbus_read_i2c_block_data
+EXPORT_SYMBOL vmlinux 0x276d36fd	remove_inode_hash
+EXPORT_SYMBOL vmlinux 0x2776bed5	pcim_iomap_table
+EXPORT_SYMBOL vmlinux 0x27864d57	memparse
+EXPORT_SYMBOL vmlinux 0x27880f3c	force_sig
+EXPORT_SYMBOL vmlinux 0x27a29994	tcf_action_dump_1
+EXPORT_SYMBOL vmlinux 0x27b7c8ee	tcp_ioctl
+EXPORT_SYMBOL vmlinux 0x27bbf221	disable_irq_nosync
+EXPORT_SYMBOL vmlinux 0x27c61ece	qdisc_put_stab
+EXPORT_SYMBOL vmlinux 0x27d45ee7	set_page_dirty_lock
+EXPORT_SYMBOL vmlinux 0x27d494a8	unregister_binfmt
+EXPORT_SYMBOL vmlinux 0x27ee3775	__init_rwsem
+EXPORT_SYMBOL vmlinux 0x27f47506	nf_afinfo
+EXPORT_SYMBOL vmlinux 0x27fcd70e	blk_rq_map_sg
+EXPORT_SYMBOL vmlinux 0x284bd8b5	pmac_register_agp_pm
+EXPORT_SYMBOL vmlinux 0x285ac517	strict_strtoll
+EXPORT_SYMBOL vmlinux 0x2875d704	page_put_link
+EXPORT_SYMBOL vmlinux 0x2879794c	scsi_remove_host
+EXPORT_SYMBOL vmlinux 0x2892ed39	netdev_features_change
+EXPORT_SYMBOL vmlinux 0x28a2ed02	scsi_build_sense_buffer
+EXPORT_SYMBOL vmlinux 0x28add490	dquot_alloc_space
+EXPORT_SYMBOL vmlinux 0x28cbf304	try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0x28ccef8b	register_sysrq_key
+EXPORT_SYMBOL vmlinux 0x28d91b0b	of_register_driver
+EXPORT_SYMBOL vmlinux 0x28da6e46	dev_open
+EXPORT_SYMBOL vmlinux 0x28ea93d9	of_node_get
+EXPORT_SYMBOL vmlinux 0x2906676a	dev_getbyhwaddr
+EXPORT_SYMBOL vmlinux 0x295115f8	elevator_exit
+EXPORT_SYMBOL vmlinux 0x29537c9e	alloc_chrdev_region
+EXPORT_SYMBOL vmlinux 0x297c00e9	__xfrm_state_delete
+EXPORT_SYMBOL vmlinux 0x29bd4c46	__cap_init_eff_set
+EXPORT_SYMBOL vmlinux 0x29c8163d	__seq_open_private
+EXPORT_SYMBOL vmlinux 0x2a2c7fea	tcf_hash_search
+EXPORT_SYMBOL vmlinux 0x2a303d4d	check_signature
+EXPORT_SYMBOL vmlinux 0x2a307d98	unmap_mapping_range
+EXPORT_SYMBOL vmlinux 0x2a468986	sk_stream_write_space
+EXPORT_SYMBOL vmlinux 0x2a50c1e7	blk_dump_rq_flags
+EXPORT_SYMBOL vmlinux 0x2a55f5ed	alloc_etherdev_mq
+EXPORT_SYMBOL vmlinux 0x2a592c2c	pci_bus_add_devices
+EXPORT_SYMBOL vmlinux 0x2a6a3630	elv_rb_del
+EXPORT_SYMBOL vmlinux 0x2a79658b	bio_split
+EXPORT_SYMBOL vmlinux 0x2aa0e4fc	strncasecmp
+EXPORT_SYMBOL vmlinux 0x2aa65068	unregister_filesystem
+EXPORT_SYMBOL vmlinux 0x2ab6bdad	vfs_unlink
+EXPORT_SYMBOL vmlinux 0x2ae1c1b1	textsearch_destroy
+EXPORT_SYMBOL vmlinux 0x2afec2ca	iget5_locked
+EXPORT_SYMBOL vmlinux 0x2b016d51	ide_proc_unregister_driver
+EXPORT_SYMBOL vmlinux 0x2b05e054	matroxfb_read_pins
+EXPORT_SYMBOL vmlinux 0x2b0ba2b0	scsi_sense_desc_find
+EXPORT_SYMBOL vmlinux 0x2b224e7c	dev_set_mac_address
+EXPORT_SYMBOL vmlinux 0x2b2bf4ec	dentry_open
+EXPORT_SYMBOL vmlinux 0x2b5015f1	udp_poll
+EXPORT_SYMBOL vmlinux 0x2b570dc0	ida_pre_get
+EXPORT_SYMBOL vmlinux 0x2b630053	eth_header_cache
+EXPORT_SYMBOL vmlinux 0x2b776484	scsi_command_normalize_sense
+EXPORT_SYMBOL vmlinux 0x2b7f8795	register_tcf_proto_ops
+EXPORT_SYMBOL vmlinux 0x2ba707a8	sysctl_tcp_low_latency
+EXPORT_SYMBOL vmlinux 0x2bb869b6	journal_stop
+EXPORT_SYMBOL vmlinux 0x2bbb48b8	set_device_ro
+EXPORT_SYMBOL vmlinux 0x2bbf2fa7	tty_port_lower_dtr_rts
+EXPORT_SYMBOL vmlinux 0x2bc61da1	program_check_exception
+EXPORT_SYMBOL vmlinux 0x2c3a24fa	install_exec_creds
+EXPORT_SYMBOL vmlinux 0x2c3f2b05	ethtool_op_set_tx_hw_csum
+EXPORT_SYMBOL vmlinux 0x2c4929fd	fd_install
+EXPORT_SYMBOL vmlinux 0x2c49f906	journal_set_features
+EXPORT_SYMBOL vmlinux 0x2c7a307e	tty_schedule_flip
+EXPORT_SYMBOL vmlinux 0x2cb0ce97	scsi_unblock_requests
+EXPORT_SYMBOL vmlinux 0x2cd35a80	dma_direct_ops
+EXPORT_SYMBOL vmlinux 0x2cd45f8a	ethtool_op_get_tso
+EXPORT_SYMBOL vmlinux 0x2cdd801c	dm_table_unplug_all
+EXPORT_SYMBOL vmlinux 0x2cf6515b	jbd2_journal_clear_err
+EXPORT_SYMBOL vmlinux 0x2d1efcd9	tcp_timewait_state_process
+EXPORT_SYMBOL vmlinux 0x2d2b0c53	i2c_master_send
+EXPORT_SYMBOL vmlinux 0x2d89342a	scsi_show_sense_hdr
+EXPORT_SYMBOL vmlinux 0x2da117cf	pci_set_mwi
+EXPORT_SYMBOL vmlinux 0x2dcb0123	schedule_delayed_work_on
+EXPORT_SYMBOL vmlinux 0x2dd3cd0f	dentry_unhash
+EXPORT_SYMBOL vmlinux 0x2e11eac5	__xfrm_decode_session
+EXPORT_SYMBOL vmlinux 0x2e2ce9e0	sysctl_tcp_syncookies
+EXPORT_SYMBOL vmlinux 0x2e4a39f8	sysctl_udp_mem
+EXPORT_SYMBOL vmlinux 0x2e7ce199	get_io_context
+EXPORT_SYMBOL vmlinux 0x2e866fed	journal_check_used_features
+EXPORT_SYMBOL vmlinux 0x2e8caace	kernel_sendmsg
+EXPORT_SYMBOL vmlinux 0x2ea0ad12	km_state_notify
+EXPORT_SYMBOL vmlinux 0x2ebf630f	seq_open
+EXPORT_SYMBOL vmlinux 0x2ecb40df	journal_init_dev
+EXPORT_SYMBOL vmlinux 0x2ed39ca9	inet_frags_fini
+EXPORT_SYMBOL vmlinux 0x2edaee69	cdrom_media_changed
+EXPORT_SYMBOL vmlinux 0x2ee5183e	pci_disable_msi
+EXPORT_SYMBOL vmlinux 0x2ef253d0	d_splice_alias
+EXPORT_SYMBOL vmlinux 0x2f5fc74b	mb_cache_entry_find_next
+EXPORT_SYMBOL vmlinux 0x2f98bf98	handle_sysrq
+EXPORT_SYMBOL vmlinux 0x2faeffea	sock_no_listen
+EXPORT_SYMBOL vmlinux 0x2fbb0c7e	arp_send
+EXPORT_SYMBOL vmlinux 0x2fc1b61b	vfs_dq_quota_on_remount
+EXPORT_SYMBOL vmlinux 0x2ff14618	grab_cache_page_nowait
+EXPORT_SYMBOL vmlinux 0x2ff63a81	balance_dirty_pages_ratelimited_nr
+EXPORT_SYMBOL vmlinux 0x2ffa2192	dmam_free_coherent
+EXPORT_SYMBOL vmlinux 0x303075a9	simple_getattr
+EXPORT_SYMBOL vmlinux 0x3042cd54	giveup_altivec
+EXPORT_SYMBOL vmlinux 0x3048eb77	init_net
+EXPORT_SYMBOL vmlinux 0x30742258	pci_set_dma_seg_boundary
+EXPORT_SYMBOL vmlinux 0x308a6950	inode_claim_rsv_space
+EXPORT_SYMBOL vmlinux 0x309bd511	pci_scan_bus_parented
+EXPORT_SYMBOL vmlinux 0x309f76fa	pci_enable_msi_block
+EXPORT_SYMBOL vmlinux 0x310917fe	sort
+EXPORT_SYMBOL vmlinux 0x31121fe1	genl_unregister_mc_group
+EXPORT_SYMBOL vmlinux 0x3113fc31	otg_set_transceiver
+EXPORT_SYMBOL vmlinux 0x313167e4	kmap_high
+EXPORT_SYMBOL vmlinux 0x3145216f	pci_dev_present
+EXPORT_SYMBOL vmlinux 0x3147857d	default_red
+EXPORT_SYMBOL vmlinux 0x31515753	rtc_dev_update_irq_enable_emul
+EXPORT_SYMBOL vmlinux 0x315cb5c3	phy_register_fixup_for_uid
+EXPORT_SYMBOL vmlinux 0x31677a2b	vmtruncate
+EXPORT_SYMBOL vmlinux 0x31708ecc	skb_realloc_headroom
+EXPORT_SYMBOL vmlinux 0x317622bb	tty_register_driver
+EXPORT_SYMBOL vmlinux 0x31862cf9	pci_bus_read_config_word
+EXPORT_SYMBOL vmlinux 0x318d0d0f	ethtool_op_get_ufo
+EXPORT_SYMBOL vmlinux 0x3191f109	__krealloc
+EXPORT_SYMBOL vmlinux 0x3193e981	simple_fill_super
+EXPORT_SYMBOL vmlinux 0x319c2caf	key_instantiate_and_link
+EXPORT_SYMBOL vmlinux 0x31ae36ec	phy_driver_register
+EXPORT_SYMBOL vmlinux 0x31bb15a4	alloc_file
+EXPORT_SYMBOL vmlinux 0x31bd8134	elv_abort_queue
+EXPORT_SYMBOL vmlinux 0x32047871	vlan_dev_real_dev
+EXPORT_SYMBOL vmlinux 0x323222ba	mutex_unlock
+EXPORT_SYMBOL vmlinux 0x324c8c59	cont_write_begin
+EXPORT_SYMBOL vmlinux 0x32515c55	get_disk
+EXPORT_SYMBOL vmlinux 0x32666c94	of_n_addr_cells
+EXPORT_SYMBOL vmlinux 0x326df9e1	vfs_stat
+EXPORT_SYMBOL vmlinux 0x326fdc33	pci_fixup_device
+EXPORT_SYMBOL vmlinux 0x327b9c1b	pmu_poll_adb
+EXPORT_SYMBOL vmlinux 0x3285cc48	param_set_uint
+EXPORT_SYMBOL vmlinux 0x328a05f1	strncpy
+EXPORT_SYMBOL vmlinux 0x328aa894	jbd2_journal_release_buffer
+EXPORT_SYMBOL vmlinux 0x32ba9202	km_state_expired
+EXPORT_SYMBOL vmlinux 0x32dd1a6f	devcgroup_inode_permission
+EXPORT_SYMBOL vmlinux 0x3323a409	scsi_is_host_device
+EXPORT_SYMBOL vmlinux 0x3397cc56	pci_dev_put
+EXPORT_SYMBOL vmlinux 0x33b84f74	copy_page
+EXPORT_SYMBOL vmlinux 0x33cfc4be	ip_mc_inc_group
+EXPORT_SYMBOL vmlinux 0x33e48a9f	phy_scan_fixups
+EXPORT_SYMBOL vmlinux 0x33e952f4	scsi_unregister
+EXPORT_SYMBOL vmlinux 0x33f33aa0	remap_vmalloc_range
+EXPORT_SYMBOL vmlinux 0x34032624	get_sb_ns
+EXPORT_SYMBOL vmlinux 0x341b65e4	call_usermodehelper_setkeys
+EXPORT_SYMBOL vmlinux 0x344adbd5	init_cdrom_command
+EXPORT_SYMBOL vmlinux 0x3457cb68	param_set_long
+EXPORT_SYMBOL vmlinux 0x3466b2b6	napi_frags_finish
+EXPORT_SYMBOL vmlinux 0x34908c14	print_hex_dump_bytes
+EXPORT_SYMBOL vmlinux 0x349cba85	strchr
+EXPORT_SYMBOL vmlinux 0x34c69ad3	vfs_path_lookup
+EXPORT_SYMBOL vmlinux 0x34cb216a	generic_removexattr
+EXPORT_SYMBOL vmlinux 0x34e23acc	pci_scan_slot
+EXPORT_SYMBOL vmlinux 0x34f1eb7c	blk_integrity_unregister
+EXPORT_SYMBOL vmlinux 0x3533427d	serio_reconnect
+EXPORT_SYMBOL vmlinux 0x359b1de9	dev_set_drvdata
+EXPORT_SYMBOL vmlinux 0x35c2ba9e	refrigerator
+EXPORT_SYMBOL vmlinux 0x35da2e61	radix_tree_tag_get
+EXPORT_SYMBOL vmlinux 0x35f00a97	bio_get_nr_vecs
+EXPORT_SYMBOL vmlinux 0x35fbd7cb	ip_ct_attach
+EXPORT_SYMBOL vmlinux 0x361d6233	ide_stall_queue
+EXPORT_SYMBOL vmlinux 0x362d944c	vmalloc_to_page
+EXPORT_SYMBOL vmlinux 0x364849ed	default_unplug_io_fn
+EXPORT_SYMBOL vmlinux 0x366834b1	tcp_v4_md5_do_add
+EXPORT_SYMBOL vmlinux 0x3695ac03	cdrom_mode_sense
+EXPORT_SYMBOL vmlinux 0x36a0185d	__blk_end_request_all
+EXPORT_SYMBOL vmlinux 0x36a122f4	serio_open
+EXPORT_SYMBOL vmlinux 0x36afcf4f	tcp_enter_memory_pressure
+EXPORT_SYMBOL vmlinux 0x36c71916	clear_bdi_congested
+EXPORT_SYMBOL vmlinux 0x36cccf17	proc_dostring
+EXPORT_SYMBOL vmlinux 0x36d249ae	scsi_report_device_reset
+EXPORT_SYMBOL vmlinux 0x36e47222	remove_wait_queue
+EXPORT_SYMBOL vmlinux 0x36f4955f	sg_next
+EXPORT_SYMBOL vmlinux 0x36f6fd41	dm_io_client_create
+EXPORT_SYMBOL vmlinux 0x3710b839	vfs_quota_disable
+EXPORT_SYMBOL vmlinux 0x371d2130	check_legacy_ioport
+EXPORT_SYMBOL vmlinux 0x37208e4d	redraw_screen
+EXPORT_SYMBOL vmlinux 0x37383edd	rtas_get_power_level
+EXPORT_SYMBOL vmlinux 0x3744cf36	vmalloc_to_pfn
+EXPORT_SYMBOL vmlinux 0x374ed073	scnprintf
+EXPORT_SYMBOL vmlinux 0x37af6a0a	abort_exclusive_wait
+EXPORT_SYMBOL vmlinux 0x37befc70	jiffies_to_msecs
+EXPORT_SYMBOL vmlinux 0x37e5383d	inet_frags_exit_net
+EXPORT_SYMBOL vmlinux 0x37e674ac	lookup_bdev
+EXPORT_SYMBOL vmlinux 0x37e74642	get_jiffies_64
+EXPORT_SYMBOL vmlinux 0x38097e11	save_mount_options
+EXPORT_SYMBOL vmlinux 0x38102073	__ip_select_ident
+EXPORT_SYMBOL vmlinux 0x3812d181	register_framebuffer
+EXPORT_SYMBOL vmlinux 0x3818cf0e	pci_bus_assign_resources
+EXPORT_SYMBOL vmlinux 0x381c4bb1	cancel_delayed_work_sync
+EXPORT_SYMBOL vmlinux 0x383d8cfc	security_path_symlink
+EXPORT_SYMBOL vmlinux 0x384aee80	end_page_writeback
+EXPORT_SYMBOL vmlinux 0x3887b5ec	make_EII_client
+EXPORT_SYMBOL vmlinux 0x388f9128	xfrm_state_walk_done
+EXPORT_SYMBOL vmlinux 0x38942e9d	nla_put
+EXPORT_SYMBOL vmlinux 0x38b105ad	i2c_smbus_write_i2c_block_data
+EXPORT_SYMBOL vmlinux 0x38b223b5	of_device_unregister
+EXPORT_SYMBOL vmlinux 0x38b92846	llc_remove_pack
+EXPORT_SYMBOL vmlinux 0x38b9eae5	ide_dump_status
+EXPORT_SYMBOL vmlinux 0x38cb9dbe	km_report
+EXPORT_SYMBOL vmlinux 0x38fb9933	tty_std_termios
+EXPORT_SYMBOL vmlinux 0x392b1d86	devm_free_irq
+EXPORT_SYMBOL vmlinux 0x396737fc	nf_ct_attach
+EXPORT_SYMBOL vmlinux 0x39807396	journal_ack_err
+EXPORT_SYMBOL vmlinux 0x3980aac1	unregister_reboot_notifier
+EXPORT_SYMBOL vmlinux 0x398fc1da	ftrace_print_symbols_seq
+EXPORT_SYMBOL vmlinux 0x39ad478d	cdrom_get_last_written
+EXPORT_SYMBOL vmlinux 0x39bd4e59	xfrm_register_km
+EXPORT_SYMBOL vmlinux 0x39ca1964	irq_stat
+EXPORT_SYMBOL vmlinux 0x39e4fb09	d_add_ci
+EXPORT_SYMBOL vmlinux 0x3a2204c6	security_netlink_recv
+EXPORT_SYMBOL vmlinux 0x3a347120	sync_mapping_buffers
+EXPORT_SYMBOL vmlinux 0x3a4a1797	mb_cache_entry_alloc
+EXPORT_SYMBOL vmlinux 0x3a58d48e	pci_disable_msix
+EXPORT_SYMBOL vmlinux 0x3a74fa6c	__scsi_add_device
+EXPORT_SYMBOL vmlinux 0x3a811435	inode_add_bytes
+EXPORT_SYMBOL vmlinux 0x3a859bce	jbd2_journal_start_commit
+EXPORT_SYMBOL vmlinux 0x3a9a36b8	write_cache_pages
+EXPORT_SYMBOL vmlinux 0x3a9b6fb9	blk_unregister_region
+EXPORT_SYMBOL vmlinux 0x3a9e9cb6	module_layout
+EXPORT_SYMBOL vmlinux 0x3abb37b1	elv_dispatch_add_tail
+EXPORT_SYMBOL vmlinux 0x3ae831b6	kref_init
+EXPORT_SYMBOL vmlinux 0x3b089eae	seq_path
+EXPORT_SYMBOL vmlinux 0x3b3016d3	cpufreq_unregister_notifier
+EXPORT_SYMBOL vmlinux 0x3b3d6978	page_zero_new_buffers
+EXPORT_SYMBOL vmlinux 0x3b8a3ecc	get_phy_device
+EXPORT_SYMBOL vmlinux 0x3b8e973a	skb_copy_datagram_const_iovec
+EXPORT_SYMBOL vmlinux 0x3b9983d6	__kill_fasync
+EXPORT_SYMBOL vmlinux 0x3b9e5694	tcp_setsockopt
+EXPORT_SYMBOL vmlinux 0x3ba9f0bd	tcf_exts_change
+EXPORT_SYMBOL vmlinux 0x3bae9733	pipe_to_file
+EXPORT_SYMBOL vmlinux 0x3bb78130	set_current_groups
+EXPORT_SYMBOL vmlinux 0x3bd1b1f6	msecs_to_jiffies
+EXPORT_SYMBOL vmlinux 0x3bf55b41	xfrm_policy_byid
+EXPORT_SYMBOL vmlinux 0x3c05f144	phy_connect_direct
+EXPORT_SYMBOL vmlinux 0x3c11a0bf	sync_inode
+EXPORT_SYMBOL vmlinux 0x3c24807b	slow_work_unregister_user
+EXPORT_SYMBOL vmlinux 0x3c2c5af5	sprintf
+EXPORT_SYMBOL vmlinux 0x3c356f1e	atomic_dec_and_mutex_lock
+EXPORT_SYMBOL vmlinux 0x3c41fe4e	of_find_compatible_node
+EXPORT_SYMBOL vmlinux 0x3c4317fc	shrink_dcache_parent
+EXPORT_SYMBOL vmlinux 0x3c782ecf	xfrm_state_insert
+EXPORT_SYMBOL vmlinux 0x3c795d30	simple_rmdir
+EXPORT_SYMBOL vmlinux 0x3c7a68da	shrink_dcache_sb
+EXPORT_SYMBOL vmlinux 0x3c9d1211	string_get_size
+EXPORT_SYMBOL vmlinux 0x3cc0a3bb	xfrm_spd_getinfo
+EXPORT_SYMBOL vmlinux 0x3ce4ca6f	disable_irq
+EXPORT_SYMBOL vmlinux 0x3d1fe213	scsi_init_io
+EXPORT_SYMBOL vmlinux 0x3d250bbf	of_find_node_by_path
+EXPORT_SYMBOL vmlinux 0x3d4e7027	tty_insert_flip_string
+EXPORT_SYMBOL vmlinux 0x3d5c26a1	remap_pfn_range
+EXPORT_SYMBOL vmlinux 0x3d68bd4b	flow_cache_genid
+EXPORT_SYMBOL vmlinux 0x3daa69da	vfs_lstat
+EXPORT_SYMBOL vmlinux 0x3dc674e3	__free_pages
+EXPORT_SYMBOL vmlinux 0x3de4e685	lro_vlan_hwaccel_receive_skb
+EXPORT_SYMBOL vmlinux 0x3e029632	neigh_compat_output
+EXPORT_SYMBOL vmlinux 0x3e383385	nf_hooks
+EXPORT_SYMBOL vmlinux 0x3e45e9ff	register_inetaddr_notifier
+EXPORT_SYMBOL vmlinux 0x3e4f2e03	netlink_set_err
+EXPORT_SYMBOL vmlinux 0x3e6caebd	add_wait_queue_exclusive
+EXPORT_SYMBOL vmlinux 0x3e899c9d	blk_limits_io_min
+EXPORT_SYMBOL vmlinux 0x3ebc0f44	grab_cache_page_write_begin
+EXPORT_SYMBOL vmlinux 0x3eca4230	tcp_prot
+EXPORT_SYMBOL vmlinux 0x3ecab5a9	buffer_migrate_page
+EXPORT_SYMBOL vmlinux 0x3ed63055	zlib_inflateReset
+EXPORT_SYMBOL vmlinux 0x3f02bfa7	elv_rb_latter_request
+EXPORT_SYMBOL vmlinux 0x3f0546a8	ioread32_rep
+EXPORT_SYMBOL vmlinux 0x3f2c92ab	sock_recvmsg
+EXPORT_SYMBOL vmlinux 0x3f3cb721	swiotlb_alloc_coherent
+EXPORT_SYMBOL vmlinux 0x3f406a3b	enable_kernel_altivec
+EXPORT_SYMBOL vmlinux 0x3f4547a7	put_unused_fd
+EXPORT_SYMBOL vmlinux 0x3f4a34d2	ide_dma_off_quietly
+EXPORT_SYMBOL vmlinux 0x3f690ab5	mpage_writepage
+EXPORT_SYMBOL vmlinux 0x3f8755c9	pci_bus_type
+EXPORT_SYMBOL vmlinux 0x3fa6d28e	mapping_tagged
+EXPORT_SYMBOL vmlinux 0x3fe12a04	pagecache_write_end
+EXPORT_SYMBOL vmlinux 0x3ff62317	local_bh_disable
+EXPORT_SYMBOL vmlinux 0x3ff73397	do_munmap
+EXPORT_SYMBOL vmlinux 0x40123aeb	idr_for_each
+EXPORT_SYMBOL vmlinux 0x403c8e57	get_super
+EXPORT_SYMBOL vmlinux 0x40488124	sg_last
+EXPORT_SYMBOL vmlinux 0x404c5860	skb_copy_bits
+EXPORT_SYMBOL vmlinux 0x4059792f	print_hex_dump
+EXPORT_SYMBOL vmlinux 0x405c1144	get_seconds
+EXPORT_SYMBOL vmlinux 0x40a27c37	scsi_dev_info_remove_list
+EXPORT_SYMBOL vmlinux 0x40ce72ad	unregister_tcf_proto_ops
+EXPORT_SYMBOL vmlinux 0x40dc1555	dst_destroy
+EXPORT_SYMBOL vmlinux 0x40dc717c	tcf_destroy_chain
+EXPORT_SYMBOL vmlinux 0x40f1ad10	tb_ticks_per_jiffy
+EXPORT_SYMBOL vmlinux 0x4101a975	ide_fixstring
+EXPORT_SYMBOL vmlinux 0x4101bbde	param_set_copystring
+EXPORT_SYMBOL vmlinux 0x4108e69a	fb_match_mode
+EXPORT_SYMBOL vmlinux 0x41166725	inet_frags_init_net
+EXPORT_SYMBOL vmlinux 0x412ddc0c	dcache_lock
+EXPORT_SYMBOL vmlinux 0x41344088	param_get_charp
+EXPORT_SYMBOL vmlinux 0x41482d8b	strndup_user
+EXPORT_SYMBOL vmlinux 0x4153fc47	journal_try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0x416983d9	netdev_fix_features
+EXPORT_SYMBOL vmlinux 0x4185cf4b	radix_tree_lookup_slot
+EXPORT_SYMBOL vmlinux 0x4188d439	neigh_rand_reach_time
+EXPORT_SYMBOL vmlinux 0x41ca965e	sysctl_data
+EXPORT_SYMBOL vmlinux 0x41d11bc8	netif_carrier_off
+EXPORT_SYMBOL vmlinux 0x41dfad50	fb_firmware_edid
+EXPORT_SYMBOL vmlinux 0x41f8fb6e	__destroy_inode
+EXPORT_SYMBOL vmlinux 0x41ffaaa8	tcf_em_unregister
+EXPORT_SYMBOL vmlinux 0x420b4524	alloc_netdev_mq
+EXPORT_SYMBOL vmlinux 0x42116cc5	n_tty_ioctl_helper
+EXPORT_SYMBOL vmlinux 0x4211c3c1	zlib_inflateInit2
+EXPORT_SYMBOL vmlinux 0x421d4249	kobject_get
+EXPORT_SYMBOL vmlinux 0x42224298	sscanf
+EXPORT_SYMBOL vmlinux 0x423a9bee	journal_dirty_data
+EXPORT_SYMBOL vmlinux 0x42418152	scsi_device_get
+EXPORT_SYMBOL vmlinux 0x4243f23d	unregister_con_driver
+EXPORT_SYMBOL vmlinux 0x4256e8ba	tty_check_change
+EXPORT_SYMBOL vmlinux 0x426685ce	set_anon_super
+EXPORT_SYMBOL vmlinux 0x42aedeee	vfs_rmdir
+EXPORT_SYMBOL vmlinux 0x42b8573e	netlink_kernel_release
+EXPORT_SYMBOL vmlinux 0x42ecf462	inet_frag_kill
+EXPORT_SYMBOL vmlinux 0x42f87c8f	vga_put
+EXPORT_SYMBOL vmlinux 0x4302d0eb	free_pages
+EXPORT_SYMBOL vmlinux 0x43030cbc	generic_file_llseek
+EXPORT_SYMBOL vmlinux 0x431be37b	blk_queue_resize_tags
+EXPORT_SYMBOL vmlinux 0x4333eadb	param_set_short
+EXPORT_SYMBOL vmlinux 0x434fa55c	release_console_sem
+EXPORT_SYMBOL vmlinux 0x4369915a	scsi_set_medium_removal
+EXPORT_SYMBOL vmlinux 0x436c2179	iowrite32
+EXPORT_SYMBOL vmlinux 0x4375a3f9	dev_alloc_name
+EXPORT_SYMBOL vmlinux 0x438d7205	pci_pme_capable
+EXPORT_SYMBOL vmlinux 0x43942fdf	pcim_iomap_regions
+EXPORT_SYMBOL vmlinux 0x439ada25	get_sb_single
+EXPORT_SYMBOL vmlinux 0x439d42df	__f_setown
+EXPORT_SYMBOL vmlinux 0x43ab66c3	param_array_get
+EXPORT_SYMBOL vmlinux 0x43be9a4a	inet_dgram_connect
+EXPORT_SYMBOL vmlinux 0x44161c19	unregister_shrinker
+EXPORT_SYMBOL vmlinux 0x44199307	get_phy_id
+EXPORT_SYMBOL vmlinux 0x44314efb	radix_tree_gang_lookup_tag_slot
+EXPORT_SYMBOL vmlinux 0x4441f079	of_device_is_compatible
+EXPORT_SYMBOL vmlinux 0x4441f810	con_set_default_unimap
+EXPORT_SYMBOL vmlinux 0x444779c4	nla_find
+EXPORT_SYMBOL vmlinux 0x445b8535	f_setown
+EXPORT_SYMBOL vmlinux 0x44672db4	security_path_unlink
+EXPORT_SYMBOL vmlinux 0x44af83f8	audit_log_start
+EXPORT_SYMBOL vmlinux 0x44b911c3	rb_replace_node
+EXPORT_SYMBOL vmlinux 0x44c214d1	__wake_up_bit
+EXPORT_SYMBOL vmlinux 0x44c3d6ba	dquot_scan_active
+EXPORT_SYMBOL vmlinux 0x44d915f7	elv_queue_empty
+EXPORT_SYMBOL vmlinux 0x44dc9a31	xfrm_policy_unregister_afinfo
+EXPORT_SYMBOL vmlinux 0x44e9a829	match_token
+EXPORT_SYMBOL vmlinux 0x4531edfc	dput
+EXPORT_SYMBOL vmlinux 0x4538c0ee	tcf_exts_dump_stats
+EXPORT_SYMBOL vmlinux 0x453c8403	pci_msi_enabled
+EXPORT_SYMBOL vmlinux 0x4541fc72	poll_freewait
+EXPORT_SYMBOL vmlinux 0x4544a6d4	simple_statfs
+EXPORT_SYMBOL vmlinux 0x456d788d	swiotlb_sync_single_for_cpu
+EXPORT_SYMBOL vmlinux 0x4575315d	utf8s_to_utf16s
+EXPORT_SYMBOL vmlinux 0x4582b16b	neigh_ifdown
+EXPORT_SYMBOL vmlinux 0x458fe786	__set_page_dirty_buffers
+EXPORT_SYMBOL vmlinux 0x45947727	param_array_set
+EXPORT_SYMBOL vmlinux 0x4596db6a	sys_sigreturn
+EXPORT_SYMBOL vmlinux 0x459c0d86	__inet6_hash
+EXPORT_SYMBOL vmlinux 0x45b0ba7b	swiotlb_dma_supported
+EXPORT_SYMBOL vmlinux 0x45c850d5	jbd2_journal_check_available_features
+EXPORT_SYMBOL vmlinux 0x45e6b04f	free_buffer_head
+EXPORT_SYMBOL vmlinux 0x460b38c0	generic_cont_expand_simple
+EXPORT_SYMBOL vmlinux 0x461ebfa0	__copy_tofrom_user
+EXPORT_SYMBOL vmlinux 0x462a2e75	match_strlcpy
+EXPORT_SYMBOL vmlinux 0x466c14a7	__delay
+EXPORT_SYMBOL vmlinux 0x468d1cbc	kill_fasync
+EXPORT_SYMBOL vmlinux 0x468d9f65	rtnetlink_put_metrics
+EXPORT_SYMBOL vmlinux 0x46f321f4	adb_client_list
+EXPORT_SYMBOL vmlinux 0x46f33707	of_mm_gpiochip_add
+EXPORT_SYMBOL vmlinux 0x4716fe40	lro_receive_skb
+EXPORT_SYMBOL vmlinux 0x4719ba4e	kfifo_free
+EXPORT_SYMBOL vmlinux 0x472073e3	dm_table_get_md
+EXPORT_SYMBOL vmlinux 0x472d2a9a	radix_tree_lookup
+EXPORT_SYMBOL vmlinux 0x475100c2	inet_get_local_port_range
+EXPORT_SYMBOL vmlinux 0x47664ea1	of_device_get_modalias
+EXPORT_SYMBOL vmlinux 0x479419fa	down_read
+EXPORT_SYMBOL vmlinux 0x479c3c86	find_next_zero_bit
+EXPORT_SYMBOL vmlinux 0x47c06e62	unregister_framebuffer
+EXPORT_SYMBOL vmlinux 0x47e8b816	set_user_nice
+EXPORT_SYMBOL vmlinux 0x47f1dafe	bdi_set_max_ratio
+EXPORT_SYMBOL vmlinux 0x4833d6eb	end_buffer_read_sync
+EXPORT_SYMBOL vmlinux 0x4834df7f	__skb_checksum_complete
+EXPORT_SYMBOL vmlinux 0x4842901c	netlink_rcv_skb
+EXPORT_SYMBOL vmlinux 0x484cee1e	scsi_finish_command
+EXPORT_SYMBOL vmlinux 0x4859b8bb	rtc_year_days
+EXPORT_SYMBOL vmlinux 0x485fe81a	dev_remove_pack
+EXPORT_SYMBOL vmlinux 0x486b6407	hweight64
+EXPORT_SYMBOL vmlinux 0x4881efab	pmac_get_partition
+EXPORT_SYMBOL vmlinux 0x4887149a	qdisc_watchdog_cancel
+EXPORT_SYMBOL vmlinux 0x489c3b71	mod_timer_pinned
+EXPORT_SYMBOL vmlinux 0x48a5c0db	unregister_console
+EXPORT_SYMBOL vmlinux 0x48c1d080	tcp_parse_md5sig_option
+EXPORT_SYMBOL vmlinux 0x48dadd30	seq_read
+EXPORT_SYMBOL vmlinux 0x48e48728	do_SAK
+EXPORT_SYMBOL vmlinux 0x48eec1df	fddi_change_mtu
+EXPORT_SYMBOL vmlinux 0x48f9f12d	complete_all
+EXPORT_SYMBOL vmlinux 0x4929e187	con_is_bound
+EXPORT_SYMBOL vmlinux 0x493be2b4	cdrom_number_of_slots
+EXPORT_SYMBOL vmlinux 0x493fd179	block_page_mkwrite
+EXPORT_SYMBOL vmlinux 0x49439411	genl_unregister_family
+EXPORT_SYMBOL vmlinux 0x49480b47	xfrm_lookup
+EXPORT_SYMBOL vmlinux 0x49603fb8	security_sb_copy_data
+EXPORT_SYMBOL vmlinux 0x497229a1	tty_flip_buffer_push
+EXPORT_SYMBOL vmlinux 0x49804799	__starget_for_each_device
+EXPORT_SYMBOL vmlinux 0x498d6e3f	unlock_page
+EXPORT_SYMBOL vmlinux 0x49947ded	pci_get_bus_and_slot
+EXPORT_SYMBOL vmlinux 0x49a4935f	skb_dequeue
+EXPORT_SYMBOL vmlinux 0x49e182c0	param_get_string
+EXPORT_SYMBOL vmlinux 0x49e2557c	phy_disable_interrupts
+EXPORT_SYMBOL vmlinux 0x4a1dab3e	elv_dispatch_sort
+EXPORT_SYMBOL vmlinux 0x4a1ea811	block_truncate_page
+EXPORT_SYMBOL vmlinux 0x4a290d4d	cur_cpu_spec
+EXPORT_SYMBOL vmlinux 0x4a358252	__bitmap_subset
+EXPORT_SYMBOL vmlinux 0x4a615292	tcp_read_sock
+EXPORT_SYMBOL vmlinux 0x4a971ec7	radix_tree_delete
+EXPORT_SYMBOL vmlinux 0x4af7d559	cancel_dirty_page
+EXPORT_SYMBOL vmlinux 0x4afe9a77	scsi_partsize
+EXPORT_SYMBOL vmlinux 0x4b14f738	xfrm_register_mode
+EXPORT_SYMBOL vmlinux 0x4b15be83	tty_register_device
+EXPORT_SYMBOL vmlinux 0x4b2a4e72	generic_error_remove_page
+EXPORT_SYMBOL vmlinux 0x4b34fbf5	block_all_signals
+EXPORT_SYMBOL vmlinux 0x4b35edc8	tty_port_raise_dtr_rts
+EXPORT_SYMBOL vmlinux 0x4b3babf7	flock_lock_file_wait
+EXPORT_SYMBOL vmlinux 0x4b73c7a3	open_by_devnum
+EXPORT_SYMBOL vmlinux 0x4b7cd409	rwsem_down_write_failed
+EXPORT_SYMBOL vmlinux 0x4b7f90c5	security_inode_setsecctx
+EXPORT_SYMBOL vmlinux 0x4b8baddc	unregister_netdevice
+EXPORT_SYMBOL vmlinux 0x4b8edde9	complete_and_exit
+EXPORT_SYMBOL vmlinux 0x4b9f3684	kfifo_init
+EXPORT_SYMBOL vmlinux 0x4ba3fbdd	alloc_hippi_dev
+EXPORT_SYMBOL vmlinux 0x4ba46be9	__lookup_one_len
+EXPORT_SYMBOL vmlinux 0x4bae1fa0	bdevname
+EXPORT_SYMBOL vmlinux 0x4bb97567	journal_lock_updates
+EXPORT_SYMBOL vmlinux 0x4bbc3e5f	pm_flags
+EXPORT_SYMBOL vmlinux 0x4bc12dd2	filemap_fdatawrite_range
+EXPORT_SYMBOL vmlinux 0x4bc721fe	pci_request_region_exclusive
+EXPORT_SYMBOL vmlinux 0x4bdd3e14	pskb_expand_head
+EXPORT_SYMBOL vmlinux 0x4bf7278f	genphy_config_aneg
+EXPORT_SYMBOL vmlinux 0x4bfed89e	pci_enable_wake
+EXPORT_SYMBOL vmlinux 0x4c1182cb	bitmap_scnprintf
+EXPORT_SYMBOL vmlinux 0x4c32ee7f	pcibios_bus_to_resource
+EXPORT_SYMBOL vmlinux 0x4c4eaa62	migrate_page
+EXPORT_SYMBOL vmlinux 0x4c587afa	file_permission
+EXPORT_SYMBOL vmlinux 0x4c710f3e	sk_dst_check
+EXPORT_SYMBOL vmlinux 0x4c746a1d	aio_put_req
+EXPORT_SYMBOL vmlinux 0x4c7fe3a7	blk_alloc_queue
+EXPORT_SYMBOL vmlinux 0x4cab6d82	blk_queue_max_hw_segments
+EXPORT_SYMBOL vmlinux 0x4cbbd171	__bitmap_weight
+EXPORT_SYMBOL vmlinux 0x4ce369d3	blk_queue_max_phys_segments
+EXPORT_SYMBOL vmlinux 0x4d3c153f	sigprocmask
+EXPORT_SYMBOL vmlinux 0x4d49d4d8	sock_i_uid
+EXPORT_SYMBOL vmlinux 0x4d651518	swiotlb_dma_mapping_error
+EXPORT_SYMBOL vmlinux 0x4da28767	km_policy_notify
+EXPORT_SYMBOL vmlinux 0x4dbb8d23	skb_gso_segment
+EXPORT_SYMBOL vmlinux 0x4dc45be9	nf_log_unbind_pf
+EXPORT_SYMBOL vmlinux 0x4dec6038	memscan
+EXPORT_SYMBOL vmlinux 0x4df119fa	__bitmap_parse
+EXPORT_SYMBOL vmlinux 0x4dfd0da8	pci_find_parent_resource
+EXPORT_SYMBOL vmlinux 0x4e0009da	idr_get_new_above
+EXPORT_SYMBOL vmlinux 0x4e069249	security_tun_dev_post_create
+EXPORT_SYMBOL vmlinux 0x4e168d29	fb_pan_display
+EXPORT_SYMBOL vmlinux 0x4e19bab5	proc_dointvec_jiffies
+EXPORT_SYMBOL vmlinux 0x4e29c9f9	security_path_truncate
+EXPORT_SYMBOL vmlinux 0x4e34ed69	get_user_pages
+EXPORT_SYMBOL vmlinux 0x4e3567f7	match_int
+EXPORT_SYMBOL vmlinux 0x4e41c847	gen_pool_create
+EXPORT_SYMBOL vmlinux 0x4e68154c	genphy_resume
+EXPORT_SYMBOL vmlinux 0x4e694745	lock_sock_nested
+EXPORT_SYMBOL vmlinux 0x4e6e8ea7	fg_console
+EXPORT_SYMBOL vmlinux 0x4e830a3e	strnicmp
+EXPORT_SYMBOL vmlinux 0x4e96eef5	unlock_buffer
+EXPORT_SYMBOL vmlinux 0x4e9dffb5	ip_fast_csum
+EXPORT_SYMBOL vmlinux 0x4ea18571	udp_disconnect
+EXPORT_SYMBOL vmlinux 0x4ecd15fe	pci_set_consistent_dma_mask
+EXPORT_SYMBOL vmlinux 0x4ee2ddd1	jbd2_journal_stop
+EXPORT_SYMBOL vmlinux 0x4ee31422	sock_no_getsockopt
+EXPORT_SYMBOL vmlinux 0x4ee4f9d7	seq_bitmap
+EXPORT_SYMBOL vmlinux 0x4f063fd0	elevator_init
+EXPORT_SYMBOL vmlinux 0x4f0ea0c0	up
+EXPORT_SYMBOL vmlinux 0x4f1cd128	security_tun_dev_create
+EXPORT_SYMBOL vmlinux 0x4f201838	scsicam_bios_param
+EXPORT_SYMBOL vmlinux 0x4f4187bd	xfrm_stateonly_find
+EXPORT_SYMBOL vmlinux 0x4f463bd5	bio_integrity_clone
+EXPORT_SYMBOL vmlinux 0x4f6d446f	iw_handler_get_thrspy
+EXPORT_SYMBOL vmlinux 0x4f95e777	consume_skb
+EXPORT_SYMBOL vmlinux 0x4fa43f95	do_splice_from
+EXPORT_SYMBOL vmlinux 0x4fcc1d1f	lookup_one_len
+EXPORT_SYMBOL vmlinux 0x4fdee897	i8042_command
+EXPORT_SYMBOL vmlinux 0x4fe99583	atomic64_dec_if_positive
+EXPORT_SYMBOL vmlinux 0x501ff70e	bioset_integrity_create
+EXPORT_SYMBOL vmlinux 0x50211ee3	tcp_free_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x503fb5a7	filemap_fdatawrite
+EXPORT_SYMBOL vmlinux 0x5046331d	skb_copy_expand
+EXPORT_SYMBOL vmlinux 0x5046a170	xfrm_state_lookup_byaddr
+EXPORT_SYMBOL vmlinux 0x506746b6	getrawmonotonic
+EXPORT_SYMBOL vmlinux 0x5073dcf8	of_unregister_driver
+EXPORT_SYMBOL vmlinux 0x508c3e3f	notify_change
+EXPORT_SYMBOL vmlinux 0x50a725f8	scsi_rescan_device
+EXPORT_SYMBOL vmlinux 0x50d56018	posix_acl_equiv_mode
+EXPORT_SYMBOL vmlinux 0x5107a5c4	seq_write
+EXPORT_SYMBOL vmlinux 0x5118c382	secure_dccp_sequence_number
+EXPORT_SYMBOL vmlinux 0x512506d1	bio_map_user
+EXPORT_SYMBOL vmlinux 0x5127c022	scsi_device_lookup_by_target
+EXPORT_SYMBOL vmlinux 0x51493d94	finish_wait
+EXPORT_SYMBOL vmlinux 0x515e24a7	flush_instruction_cache
+EXPORT_SYMBOL vmlinux 0x5164d01c	tcp_mtup_init
+EXPORT_SYMBOL vmlinux 0x516ac985	blk_rq_map_user
+EXPORT_SYMBOL vmlinux 0x519c0947	jbd2_journal_load
+EXPORT_SYMBOL vmlinux 0x519de756	unregister_netdev
+EXPORT_SYMBOL vmlinux 0x51ca0b4c	writeback_inodes_sb
+EXPORT_SYMBOL vmlinux 0x51db430d	bdev_read_only
+EXPORT_SYMBOL vmlinux 0x51dce73b	xfrm_state_walk_init
+EXPORT_SYMBOL vmlinux 0x51ef33b8	kstrndup
+EXPORT_SYMBOL vmlinux 0x51fe2781	vfs_rename
+EXPORT_SYMBOL vmlinux 0x52026cdf	security_sb_parse_opts_str
+EXPORT_SYMBOL vmlinux 0x52079cd7	inet_put_port
+EXPORT_SYMBOL vmlinux 0x520e3336	address_space_init_once
+EXPORT_SYMBOL vmlinux 0x522e8994	pci_enable_device_mem
+EXPORT_SYMBOL vmlinux 0x522f5d77	ip_dev_find
+EXPORT_SYMBOL vmlinux 0x52354a0b	mutex_trylock
+EXPORT_SYMBOL vmlinux 0x523fa6a7	find_get_page
+EXPORT_SYMBOL vmlinux 0x5240eeca	make_bad_inode
+EXPORT_SYMBOL vmlinux 0x5254956f	of_find_node_by_name
+EXPORT_SYMBOL vmlinux 0x525e6496	__napi_schedule
+EXPORT_SYMBOL vmlinux 0x52699f41	pci_bus_find_capability
+EXPORT_SYMBOL vmlinux 0x52760ca9	getnstimeofday
+EXPORT_SYMBOL vmlinux 0x527830ff	pmac_xpram_read
+EXPORT_SYMBOL vmlinux 0x528c709d	simple_read_from_buffer
+EXPORT_SYMBOL vmlinux 0x528c911c	del_timer
+EXPORT_SYMBOL vmlinux 0x52a58c24	ifla_policy
+EXPORT_SYMBOL vmlinux 0x52d7b2fd	llc_sap_list
+EXPORT_SYMBOL vmlinux 0x52d87517	nf_reinject
+EXPORT_SYMBOL vmlinux 0x52df721d	nf_unregister_sockopt
+EXPORT_SYMBOL vmlinux 0x52e0c617	tty_wait_until_sent
+EXPORT_SYMBOL vmlinux 0x52ebb126	param_get_ushort
+EXPORT_SYMBOL vmlinux 0x52ee88a3	per_cpu__softnet_data
+EXPORT_SYMBOL vmlinux 0x52f9bc3f	pci_get_class
+EXPORT_SYMBOL vmlinux 0x530b1e98	pm_suspend
+EXPORT_SYMBOL vmlinux 0x53326531	mempool_alloc_pages
+EXPORT_SYMBOL vmlinux 0x53413940	scsi_host_lookup
+EXPORT_SYMBOL vmlinux 0x534236a6	fb_get_mode
+EXPORT_SYMBOL vmlinux 0x5344cd27	sync_dirty_buffer
+EXPORT_SYMBOL vmlinux 0x534aec1e	nf_register_sockopt
+EXPORT_SYMBOL vmlinux 0x536a2a5c	test_set_page_writeback
+EXPORT_SYMBOL vmlinux 0x537f29dd	input_register_device
+EXPORT_SYMBOL vmlinux 0x5399a31f	block_sync_page
+EXPORT_SYMBOL vmlinux 0x53a7b7fb	ll_rw_block
+EXPORT_SYMBOL vmlinux 0x53ad2226	register_8022_client
+EXPORT_SYMBOL vmlinux 0x53c0767c	sk_chk_filter
+EXPORT_SYMBOL vmlinux 0x53c71965	dcache_dir_open
+EXPORT_SYMBOL vmlinux 0x53d19779	__page_symlink
+EXPORT_SYMBOL vmlinux 0x53d202bf	jbd2_log_start_commit
+EXPORT_SYMBOL vmlinux 0x53e7b08a	journal_errno
+EXPORT_SYMBOL vmlinux 0x53ebab1b	_outsl_ns
+EXPORT_SYMBOL vmlinux 0x540c3b3c	kernel_connect
+EXPORT_SYMBOL vmlinux 0x5424a011	tty_driver_flush_buffer
+EXPORT_SYMBOL vmlinux 0x54290dc9	nla_validate
+EXPORT_SYMBOL vmlinux 0x54671157	__xfrm_state_destroy
+EXPORT_SYMBOL vmlinux 0x547c059a	mpage_readpages
+EXPORT_SYMBOL vmlinux 0x54d42936	seq_printf
+EXPORT_SYMBOL vmlinux 0x54e6fcdd	net_enable_timestamp
+EXPORT_SYMBOL vmlinux 0x54fd246b	__nla_put
+EXPORT_SYMBOL vmlinux 0x54fd27ea	gnet_stats_finish_copy
+EXPORT_SYMBOL vmlinux 0x552de8d0	of_get_gpio_flags
+EXPORT_SYMBOL vmlinux 0x5531a158	xfrm_dst_ifdown
+EXPORT_SYMBOL vmlinux 0x554dd2f5	validate_sp
+EXPORT_SYMBOL vmlinux 0x556643e3	llc_sap_list_lock
+EXPORT_SYMBOL vmlinux 0x5579ceb7	contig_page_data
+EXPORT_SYMBOL vmlinux 0x558bc23a	i2c_smbus_write_byte_data
+EXPORT_SYMBOL vmlinux 0x5594be03	bitmap_remap
+EXPORT_SYMBOL vmlinux 0x55a04cb7	__scsi_iterate_devices
+EXPORT_SYMBOL vmlinux 0x55bf4148	block_is_partially_uptodate
+EXPORT_SYMBOL vmlinux 0x55f715f2	wireless_spy_update
+EXPORT_SYMBOL vmlinux 0x5600904f	fb_get_color_depth
+EXPORT_SYMBOL vmlinux 0x56026d3a	scsi_remove_target
+EXPORT_SYMBOL vmlinux 0x5603cf43	do_settimeofday
+EXPORT_SYMBOL vmlinux 0x5614b010	xfrm_policy_walk_done
+EXPORT_SYMBOL vmlinux 0x56216cb8	ps2_init
+EXPORT_SYMBOL vmlinux 0x5635a60a	vmalloc_user
+EXPORT_SYMBOL vmlinux 0x564b3824	cdrom_ioctl
+EXPORT_SYMBOL vmlinux 0x564d1a16	pci_write_vpd
+EXPORT_SYMBOL vmlinux 0x56533277	writeback_inodes_sb_if_idle
+EXPORT_SYMBOL vmlinux 0x56535fd9	simple_empty
+EXPORT_SYMBOL vmlinux 0x568d2175	file_fsync
+EXPORT_SYMBOL vmlinux 0x569784a9	flush_tlb_mm
+EXPORT_SYMBOL vmlinux 0x56a10763	csum_tcpudp_magic
+EXPORT_SYMBOL vmlinux 0x56a876d9	__pci_register_driver
+EXPORT_SYMBOL vmlinux 0x56b00541	sock_wfree
+EXPORT_SYMBOL vmlinux 0x56c2b95b	rtas_progress
+EXPORT_SYMBOL vmlinux 0x56c8799d	scsi_kunmap_atomic_sg
+EXPORT_SYMBOL vmlinux 0x56cfbd49	input_filter_device
+EXPORT_SYMBOL vmlinux 0x56db7125	ipv6_skip_exthdr
+EXPORT_SYMBOL vmlinux 0x570313e6	scsi_report_bus_reset
+EXPORT_SYMBOL vmlinux 0x572d6022	__secpath_destroy
+EXPORT_SYMBOL vmlinux 0x572e85d4	blk_lookup_devt
+EXPORT_SYMBOL vmlinux 0x576b2741	dqput
+EXPORT_SYMBOL vmlinux 0x577775f8	inet_sock_destruct
+EXPORT_SYMBOL vmlinux 0x57925f28	sock_common_recvmsg
+EXPORT_SYMBOL vmlinux 0x5795c76d	pci_pme_active
+EXPORT_SYMBOL vmlinux 0x57a6504e	vsnprintf
+EXPORT_SYMBOL vmlinux 0x57b57ebe	jiffies_to_timespec
+EXPORT_SYMBOL vmlinux 0x57c2d44e	posix_test_lock
+EXPORT_SYMBOL vmlinux 0x57db7242	mangle_path
+EXPORT_SYMBOL vmlinux 0x580b2249	backlight_device_register
+EXPORT_SYMBOL vmlinux 0x582a4747	cacheable_memcpy
+EXPORT_SYMBOL vmlinux 0x583536bc	of_platform_bus_type
+EXPORT_SYMBOL vmlinux 0x5838f6c9	rtc_valid_tm
+EXPORT_SYMBOL vmlinux 0x5856d7c5	generic_unplug_device
+EXPORT_SYMBOL vmlinux 0x5857009b	km_query
+EXPORT_SYMBOL vmlinux 0x5857b225	ioread16_rep
+EXPORT_SYMBOL vmlinux 0x5857e434	groups_free
+EXPORT_SYMBOL vmlinux 0x587b59fb	nla_reserve
+EXPORT_SYMBOL vmlinux 0x58d033f3	read_cache_page_async
+EXPORT_SYMBOL vmlinux 0x5934392b	fb_register_client
+EXPORT_SYMBOL vmlinux 0x5944ca77	netpoll_cleanup
+EXPORT_SYMBOL vmlinux 0x5946d465	generic_fillattr
+EXPORT_SYMBOL vmlinux 0x594bf15b	ioport_map
+EXPORT_SYMBOL vmlinux 0x595d0946	empty_zero_page
+EXPORT_SYMBOL vmlinux 0x5962859f	sg_init_table
+EXPORT_SYMBOL vmlinux 0x597d1a8f	dev_get_drvdata
+EXPORT_SYMBOL vmlinux 0x59a73e79	netpoll_send_udp
+EXPORT_SYMBOL vmlinux 0x59d696b6	register_module_notifier
+EXPORT_SYMBOL vmlinux 0x59d8223a	ioport_resource
+EXPORT_SYMBOL vmlinux 0x5a019c1c	blkdev_put
+EXPORT_SYMBOL vmlinux 0x5a0ed783	swiotlb_map_sg
+EXPORT_SYMBOL vmlinux 0x5a41e9e8	invalidate_bdev
+EXPORT_SYMBOL vmlinux 0x5a4b3f80	pci_set_power_state
+EXPORT_SYMBOL vmlinux 0x5a5f594d	tty_port_close
+EXPORT_SYMBOL vmlinux 0x5a744b86	netlink_set_nonroot
+EXPORT_SYMBOL vmlinux 0x5a952c80	ps2_handle_ack
+EXPORT_SYMBOL vmlinux 0x5aacf9f4	tty_register_ldisc
+EXPORT_SYMBOL vmlinux 0x5aada9d4	pcix_get_max_mmrbc
+EXPORT_SYMBOL vmlinux 0x5ab67931	do_IRQ
+EXPORT_SYMBOL vmlinux 0x5adff15e	flush_signals
+EXPORT_SYMBOL vmlinux 0x5af65e8b	d_genocide
+EXPORT_SYMBOL vmlinux 0x5affdff6	eth_mac_addr
+EXPORT_SYMBOL vmlinux 0x5b19634d	div_s64_rem
+EXPORT_SYMBOL vmlinux 0x5b22d49a	pid_task
+EXPORT_SYMBOL vmlinux 0x5b43f1f1	rtas_service_present
+EXPORT_SYMBOL vmlinux 0x5b5abdf5	of_find_matching_node
+EXPORT_SYMBOL vmlinux 0x5b6285e4	dm_table_get
+EXPORT_SYMBOL vmlinux 0x5b6e7014	inode_sub_bytes
+EXPORT_SYMBOL vmlinux 0x5b8542e4	dev_close
+EXPORT_SYMBOL vmlinux 0x5b9c4bd6	key_link
+EXPORT_SYMBOL vmlinux 0x5bc2f234	is_bad_inode
+EXPORT_SYMBOL vmlinux 0x5beb4b89	phy_stop_interrupts
+EXPORT_SYMBOL vmlinux 0x5bf5b9df	pci_dev_driver
+EXPORT_SYMBOL vmlinux 0x5c02f62c	audit_log_end
+EXPORT_SYMBOL vmlinux 0x5c06de43	neigh_for_each
+EXPORT_SYMBOL vmlinux 0x5c673bc8	tty_mutex
+EXPORT_SYMBOL vmlinux 0x5c698ccd	journal_abort
+EXPORT_SYMBOL vmlinux 0x5c70bacb	jbd2_journal_invalidatepage
+EXPORT_SYMBOL vmlinux 0x5c7f139f	blk_queue_max_segment_size
+EXPORT_SYMBOL vmlinux 0x5cc2f7f0	init_special_inode
+EXPORT_SYMBOL vmlinux 0x5cde162a	clip_tbl_hook
+EXPORT_SYMBOL vmlinux 0x5cf51381	simple_link
+EXPORT_SYMBOL vmlinux 0x5cfcb441	dev_addr_del_multiple
+EXPORT_SYMBOL vmlinux 0x5d12b3fc	twl4030_i2c_write_u8
+EXPORT_SYMBOL vmlinux 0x5d7df85b	i2c_del_driver
+EXPORT_SYMBOL vmlinux 0x5da89562	blk_queue_bounce_limit
+EXPORT_SYMBOL vmlinux 0x5dae54b4	mutex_lock_interruptible
+EXPORT_SYMBOL vmlinux 0x5dbc74c5	sock_no_sendmsg
+EXPORT_SYMBOL vmlinux 0x5deab861	vfs_get_dqblk
+EXPORT_SYMBOL vmlinux 0x5deb54ee	pipe_unlock
+EXPORT_SYMBOL vmlinux 0x5df56fd1	inet_stream_ops
+EXPORT_SYMBOL vmlinux 0x5e5f543b	tty_port_tty_get
+EXPORT_SYMBOL vmlinux 0x5e697310	bio_integrity_free
+EXPORT_SYMBOL vmlinux 0x5e6e33a3	bio_integrity_add_page
+EXPORT_SYMBOL vmlinux 0x5e95b1cd	current_umask
+EXPORT_SYMBOL vmlinux 0x5ea26095	elv_rb_add
+EXPORT_SYMBOL vmlinux 0x5ea520c5	tcp_select_initial_window
+EXPORT_SYMBOL vmlinux 0x5ec68ffd	pci_request_regions_exclusive
+EXPORT_SYMBOL vmlinux 0x5ed040b0	pm_set_vt_switch
+EXPORT_SYMBOL vmlinux 0x5edd0762	bin2bcd
+EXPORT_SYMBOL vmlinux 0x5ee50d64	xfrm_find_acq_byseq
+EXPORT_SYMBOL vmlinux 0x5f262388	call_usermodehelper_exec
+EXPORT_SYMBOL vmlinux 0x5f322edc	kmap_atomic_prot
+EXPORT_SYMBOL vmlinux 0x5f4f7fe8	get_pci_dma_ops
+EXPORT_SYMBOL vmlinux 0x5f53d1b7	machine_id
+EXPORT_SYMBOL vmlinux 0x5f5970df	set_create_files_as
+EXPORT_SYMBOL vmlinux 0x5f71e08d	gnet_stats_start_copy
+EXPORT_SYMBOL vmlinux 0x5f754e5a	memset
+EXPORT_SYMBOL vmlinux 0x5f85d626	input_release_device
+EXPORT_SYMBOL vmlinux 0x5f894230	vga_set_legacy_decoding
+EXPORT_SYMBOL vmlinux 0x5f8a2728	isa_io_base
+EXPORT_SYMBOL vmlinux 0x5fa042a4	pci_bus_read_config_dword
+EXPORT_SYMBOL vmlinux 0x5fe9b109	set_disk_ro
+EXPORT_SYMBOL vmlinux 0x5ffca43a	of_device_is_available
+EXPORT_SYMBOL vmlinux 0x600683d3	do_unblank_screen
+EXPORT_SYMBOL vmlinux 0x6024d8d3	udp_lib_getsockopt
+EXPORT_SYMBOL vmlinux 0x603db3b0	xfrm_state_add
+EXPORT_SYMBOL vmlinux 0x60412412	iov_iter_copy_from_user_atomic
+EXPORT_SYMBOL vmlinux 0x6047c4da	gen_pool_destroy
+EXPORT_SYMBOL vmlinux 0x6060c0df	jbd2_journal_unlock_updates
+EXPORT_SYMBOL vmlinux 0x6067757c	kern_path
+EXPORT_SYMBOL vmlinux 0x60855593	tcp_make_synack
+EXPORT_SYMBOL vmlinux 0x608fc322	get_sb_nodev
+EXPORT_SYMBOL vmlinux 0x6099b736	pfifo_qdisc_ops
+EXPORT_SYMBOL vmlinux 0x609f1c7e	synchronize_net
+EXPORT_SYMBOL vmlinux 0x60a0ebad	__tracepoint_kmem_cache_alloc_node
+EXPORT_SYMBOL vmlinux 0x60a4efe2	ida_get_new
+EXPORT_SYMBOL vmlinux 0x60a7a053	fbcon_set_tileops
+EXPORT_SYMBOL vmlinux 0x60d13b6a	sock_create
+EXPORT_SYMBOL vmlinux 0x60f85b36	security_path_mkdir
+EXPORT_SYMBOL vmlinux 0x610dc00d	i2c_get_adapter
+EXPORT_SYMBOL vmlinux 0x61134f32	blk_rq_map_integrity_sg
+EXPORT_SYMBOL vmlinux 0x611c3df3	vfs_dq_transfer
+EXPORT_SYMBOL vmlinux 0x612390ad	netpoll_set_trap
+EXPORT_SYMBOL vmlinux 0x61287f5c	of_dev_put
+EXPORT_SYMBOL vmlinux 0x6152bf0f	kill_litter_super
+EXPORT_SYMBOL vmlinux 0x618d8299	set_notify_swap_entry_free
+EXPORT_SYMBOL vmlinux 0x61b7b126	simple_strtoull
+EXPORT_SYMBOL vmlinux 0x61eef2c9	_insb
+EXPORT_SYMBOL vmlinux 0x622bfc0a	journal_clear_err
+EXPORT_SYMBOL vmlinux 0x623d7182	_chrp_type
+EXPORT_SYMBOL vmlinux 0x62737e1d	sock_unregister
+EXPORT_SYMBOL vmlinux 0x62827bec	security_secctx_to_secid
+EXPORT_SYMBOL vmlinux 0x628332e8	pmu_power_flags
+EXPORT_SYMBOL vmlinux 0x62cc569e	cpu_present_mask
+EXPORT_SYMBOL vmlinux 0x6303bd81	release_sock
+EXPORT_SYMBOL vmlinux 0x6308158d	journal_blocks_per_page
+EXPORT_SYMBOL vmlinux 0x633214d1	blk_queue_end_tag
+EXPORT_SYMBOL vmlinux 0x6371cd5f	pci_add_new_bus
+EXPORT_SYMBOL vmlinux 0x63850283	blk_make_request
+EXPORT_SYMBOL vmlinux 0x638ec829	pcix_get_mmrbc
+EXPORT_SYMBOL vmlinux 0x6392d2a1	fifo_set_limit
+EXPORT_SYMBOL vmlinux 0x639b9092	sock_no_bind
+EXPORT_SYMBOL vmlinux 0x63b8822b	directly_mappable_cdev_bdi
+EXPORT_SYMBOL vmlinux 0x63ecad53	register_netdevice_notifier
+EXPORT_SYMBOL vmlinux 0x63efc536	radix_tree_prev_hole
+EXPORT_SYMBOL vmlinux 0x63f205d2	i2c_smbus_process_call
+EXPORT_SYMBOL vmlinux 0x6403e338	tcp_memory_pressure
+EXPORT_SYMBOL vmlinux 0x6420c2c0	netdev_bonding_change
+EXPORT_SYMBOL vmlinux 0x644bf827	init_task
+EXPORT_SYMBOL vmlinux 0x64615132	generic_file_open
+EXPORT_SYMBOL vmlinux 0x646cc6ab	pmu_poll
+EXPORT_SYMBOL vmlinux 0x646f5266	page_symlink_inode_operations
+EXPORT_SYMBOL vmlinux 0x648b7331	__generic_block_fiemap
+EXPORT_SYMBOL vmlinux 0x64999478	congestion_wait
+EXPORT_SYMBOL vmlinux 0x649aa73d	key_negate_and_link
+EXPORT_SYMBOL vmlinux 0x64a5f569	qdisc_tree_decrease_qlen
+EXPORT_SYMBOL vmlinux 0x64c795dc	cdrom_mode_select
+EXPORT_SYMBOL vmlinux 0x64cd0f5c	mpage_readpage
+EXPORT_SYMBOL vmlinux 0x64cd920b	qdisc_calculate_pkt_len
+EXPORT_SYMBOL vmlinux 0x64e631fe	__skb_warn_lro_forwarding
+EXPORT_SYMBOL vmlinux 0x64fe5d53	tty_hangup
+EXPORT_SYMBOL vmlinux 0x650dfebf	cfb_imageblit
+EXPORT_SYMBOL vmlinux 0x650e9891	may_umount_tree
+EXPORT_SYMBOL vmlinux 0x651a4139	test_taint
+EXPORT_SYMBOL vmlinux 0x65276ea8	xfrm_state_delete_tunnel
+EXPORT_SYMBOL vmlinux 0x652d9afd	__set_page_dirty_nobuffers
+EXPORT_SYMBOL vmlinux 0x65400222	__irq_offset_value
+EXPORT_SYMBOL vmlinux 0x65408378	zlib_inflate_blob
+EXPORT_SYMBOL vmlinux 0x65414e67	dev_valid_name
+EXPORT_SYMBOL vmlinux 0x656941e5	register_nls
+EXPORT_SYMBOL vmlinux 0x657570a9	generic_read_dir
+EXPORT_SYMBOL vmlinux 0x65825d52	kill_anon_super
+EXPORT_SYMBOL vmlinux 0x65aa7074	tcf_exts_validate
+EXPORT_SYMBOL vmlinux 0x65c54278	register_sysctl_table
+EXPORT_SYMBOL vmlinux 0x66046a3d	blk_queue_prep_rq
+EXPORT_SYMBOL vmlinux 0x6660a270	journal_get_write_access
+EXPORT_SYMBOL vmlinux 0x666881d1	dcache_dir_lseek
+EXPORT_SYMBOL vmlinux 0x668da8d5	zlib_inflateIncomp
+EXPORT_SYMBOL vmlinux 0x66a0f5c0	hippi_change_mtu
+EXPORT_SYMBOL vmlinux 0x66c17758	i2c_transfer
+EXPORT_SYMBOL vmlinux 0x66cbf14b	pmac_xpram_write
+EXPORT_SYMBOL vmlinux 0x66e3f98e	sock_kmalloc
+EXPORT_SYMBOL vmlinux 0x67053080	current_kernel_time
+EXPORT_SYMBOL vmlinux 0x671a00f0	tty_unthrottle
+EXPORT_SYMBOL vmlinux 0x671f927c	vfs_readdir
+EXPORT_SYMBOL vmlinux 0x6752649b	__bread
+EXPORT_SYMBOL vmlinux 0x67b1451c	register_exec_domain
+EXPORT_SYMBOL vmlinux 0x67bb60ee	vfs_getattr
+EXPORT_SYMBOL vmlinux 0x67be1d3d	cpu_active_mask
+EXPORT_SYMBOL vmlinux 0x67d59ef6	security_d_instantiate
+EXPORT_SYMBOL vmlinux 0x67f2cee5	udp_table
+EXPORT_SYMBOL vmlinux 0x68259315	pci_restore_state
+EXPORT_SYMBOL vmlinux 0x68578889	tcp_v4_md5_hash_skb
+EXPORT_SYMBOL vmlinux 0x6864b46d	inode_set_bytes
+EXPORT_SYMBOL vmlinux 0x68c9c513	unlock_new_inode
+EXPORT_SYMBOL vmlinux 0x68cc256f	pci_back_from_sleep
+EXPORT_SYMBOL vmlinux 0x68f4eeef	kset_register
+EXPORT_SYMBOL vmlinux 0x68fd2117	journal_start
+EXPORT_SYMBOL vmlinux 0x690198e6	clocksource_unregister
+EXPORT_SYMBOL vmlinux 0x694d14e4	journal_release_buffer
+EXPORT_SYMBOL vmlinux 0x6971447a	rtc_month_days
+EXPORT_SYMBOL vmlinux 0x6980fe91	param_get_int
+EXPORT_SYMBOL vmlinux 0x69927dff	try_acquire_console_sem
+EXPORT_SYMBOL vmlinux 0x69a0ca7d	iowrite16be
+EXPORT_SYMBOL vmlinux 0x69ae6f29	unbind_con_driver
+EXPORT_SYMBOL vmlinux 0x69af2327	idr_init
+EXPORT_SYMBOL vmlinux 0x69c27df4	send_sig
+EXPORT_SYMBOL vmlinux 0x69c8c1d5	security_req_classify_flow
+EXPORT_SYMBOL vmlinux 0x69d38ed9	__scsi_print_sense
+EXPORT_SYMBOL vmlinux 0x69d7e5b8	__debugger_ipi
+EXPORT_SYMBOL vmlinux 0x69e27c7a	bitmap_copy_le
+EXPORT_SYMBOL vmlinux 0x6a037cf1	mempool_kfree
+EXPORT_SYMBOL vmlinux 0x6a47571d	__set_personality
+EXPORT_SYMBOL vmlinux 0x6a61f874	to_tm
+EXPORT_SYMBOL vmlinux 0x6a673f52	of_device_register
+EXPORT_SYMBOL vmlinux 0x6a76f3ac	blk_iopoll_enable
+EXPORT_SYMBOL vmlinux 0x6ab3d561	__register_binfmt
+EXPORT_SYMBOL vmlinux 0x6ac617a9	ip_route_output_key
+EXPORT_SYMBOL vmlinux 0x6acb973d	iowrite32be
+EXPORT_SYMBOL vmlinux 0x6ad065f4	param_set_charp
+EXPORT_SYMBOL vmlinux 0x6aeef631	__netdev_alloc_page
+EXPORT_SYMBOL vmlinux 0x6b1b67d3	__bdevname
+EXPORT_SYMBOL vmlinux 0x6b2dc060	dump_stack
+EXPORT_SYMBOL vmlinux 0x6b5b066b	__locks_copy_lock
+EXPORT_SYMBOL vmlinux 0x6bac1652	genl_register_ops
+EXPORT_SYMBOL vmlinux 0x6bc3fbc0	__unregister_chrdev
+EXPORT_SYMBOL vmlinux 0x6bd039f6	get_empty_filp
+EXPORT_SYMBOL vmlinux 0x6bdcfd99	qdisc_class_hash_remove
+EXPORT_SYMBOL vmlinux 0x6be1745d	giveup_fpu
+EXPORT_SYMBOL vmlinux 0x6c1ce5ce	strcspn
+EXPORT_SYMBOL vmlinux 0x6c36a5c1	__mutex_init
+EXPORT_SYMBOL vmlinux 0x6c3b242e	sg_copy_to_buffer
+EXPORT_SYMBOL vmlinux 0x6c5decc9	d_alloc
+EXPORT_SYMBOL vmlinux 0x6c61ce70	num_registered_fb
+EXPORT_SYMBOL vmlinux 0x6c702af7	sysctl_udp_rmem_min
+EXPORT_SYMBOL vmlinux 0x6c930c20	tcf_hash_lookup
+EXPORT_SYMBOL vmlinux 0x6ca1d1a4	atomic64_read
+EXPORT_SYMBOL vmlinux 0x6cc5145c	__xfrm_route_forward
+EXPORT_SYMBOL vmlinux 0x6cca8062	ps2_sendbyte
+EXPORT_SYMBOL vmlinux 0x6cdc5c6b	nla_strlcpy
+EXPORT_SYMBOL vmlinux 0x6ce87dc0	sk_wait_data
+EXPORT_SYMBOL vmlinux 0x6cec6f5b	xfrm_bundle_ok
+EXPORT_SYMBOL vmlinux 0x6cf00149	dquot_release
+EXPORT_SYMBOL vmlinux 0x6d04e9eb	macio_register_driver
+EXPORT_SYMBOL vmlinux 0x6d0ecf89	kernel_getsockopt
+EXPORT_SYMBOL vmlinux 0x6d27ef64	__bitmap_empty
+EXPORT_SYMBOL vmlinux 0x6d288375	radix_tree_next_hole
+EXPORT_SYMBOL vmlinux 0x6d294e43	clock_t_to_jiffies
+EXPORT_SYMBOL vmlinux 0x6d44d5a3	napi_get_frags
+EXPORT_SYMBOL vmlinux 0x6d64296d	simple_sync_file
+EXPORT_SYMBOL vmlinux 0x6d6cb9ed	tcp_child_process
+EXPORT_SYMBOL vmlinux 0x6d6cbadc	rb_last
+EXPORT_SYMBOL vmlinux 0x6d700ec9	gnet_stats_start_copy_compat
+EXPORT_SYMBOL vmlinux 0x6d8c8dee	blk_queue_segment_boundary
+EXPORT_SYMBOL vmlinux 0x6da508d3	rwsem_wake
+EXPORT_SYMBOL vmlinux 0x6da928f4	_insw_ns
+EXPORT_SYMBOL vmlinux 0x6dc40835	napi_reuse_skb
+EXPORT_SYMBOL vmlinux 0x6ddd276b	seq_open_private
+EXPORT_SYMBOL vmlinux 0x6de9f50d	nf_register_hook
+EXPORT_SYMBOL vmlinux 0x6def2db2	half_md4_transform
+EXPORT_SYMBOL vmlinux 0x6dfb7912	jbd2_journal_init_dev
+EXPORT_SYMBOL vmlinux 0x6e03d1cf	blk_stop_queue
+EXPORT_SYMBOL vmlinux 0x6e4675b7	journal_force_commit
+EXPORT_SYMBOL vmlinux 0x6e522015	sg_init_one
+EXPORT_SYMBOL vmlinux 0x6e52edb3	call_usermodehelper_stdinpipe
+EXPORT_SYMBOL vmlinux 0x6e5ef624	__blockdev_direct_IO
+EXPORT_SYMBOL vmlinux 0x6e720ff2	rtnl_unlock
+EXPORT_SYMBOL vmlinux 0x6e9dd606	__symbol_put
+EXPORT_SYMBOL vmlinux 0x6ec643ba	prepare_kernel_cred
+EXPORT_SYMBOL vmlinux 0x6ede1608	ethtool_op_set_tso
+EXPORT_SYMBOL vmlinux 0x6ee70837	scsi_dma_unmap
+EXPORT_SYMBOL vmlinux 0x6ef0297d	ip_defrag
+EXPORT_SYMBOL vmlinux 0x6f086759	wait_on_page_bit
+EXPORT_SYMBOL vmlinux 0x6f1ecaa6	dquot_reserve_space
+EXPORT_SYMBOL vmlinux 0x6f3d3fc7	ip_generic_getfrag
+EXPORT_SYMBOL vmlinux 0x6f420242	block_fsync
+EXPORT_SYMBOL vmlinux 0x6f72cd89	pci_find_bus
+EXPORT_SYMBOL vmlinux 0x6f75c7b8	tty_write_room
+EXPORT_SYMBOL vmlinux 0x6f816ec9	tcf_register_action
+EXPORT_SYMBOL vmlinux 0x6f8932b0	llc_sap_find
+EXPORT_SYMBOL vmlinux 0x6f913348	bdi_register_dev
+EXPORT_SYMBOL vmlinux 0x6f9ffe34	tcf_exts_destroy
+EXPORT_SYMBOL vmlinux 0x6fcb87a1	touch_softlockup_watchdog
+EXPORT_SYMBOL vmlinux 0x6fe09bdb	inet_select_addr
+EXPORT_SYMBOL vmlinux 0x6fff393f	time_to_tm
+EXPORT_SYMBOL vmlinux 0x701d0ebd	snprintf
+EXPORT_SYMBOL vmlinux 0x701ec063	vlan_gro_receive
+EXPORT_SYMBOL vmlinux 0x702f53e4	ip_queue_xmit
+EXPORT_SYMBOL vmlinux 0x70414b1e	blkdev_get
+EXPORT_SYMBOL vmlinux 0x70523a7a	__cond_resched_softirq
+EXPORT_SYMBOL vmlinux 0x7054a3e4	request_dma
+EXPORT_SYMBOL vmlinux 0x707ec8c8	__alloc_skb
+EXPORT_SYMBOL vmlinux 0x708b929d	input_grab_device
+EXPORT_SYMBOL vmlinux 0x70b0097f	scsi_reset_provider
+EXPORT_SYMBOL vmlinux 0x70b5d704	remove_arg_zero
+EXPORT_SYMBOL vmlinux 0x70b8647e	ip_route_me_harder
+EXPORT_SYMBOL vmlinux 0x70bc17d7	inode_wait
+EXPORT_SYMBOL vmlinux 0x70d888b7	__debugger_fault_handler
+EXPORT_SYMBOL vmlinux 0x70de5aa6	phy_start_interrupts
+EXPORT_SYMBOL vmlinux 0x70f86c70	pmu_queue_request
+EXPORT_SYMBOL vmlinux 0x70f9bb1a	mdiobus_free
+EXPORT_SYMBOL vmlinux 0x7121e434	pci_busdev_to_OF_node
+EXPORT_SYMBOL vmlinux 0x7129e5f8	hex_asc
+EXPORT_SYMBOL vmlinux 0x71398328	pci_save_state
+EXPORT_SYMBOL vmlinux 0x71558f22	genl_unregister_ops
+EXPORT_SYMBOL vmlinux 0x715b43fc	free_netdev
+EXPORT_SYMBOL vmlinux 0x716b174c	tcp_parse_options
+EXPORT_SYMBOL vmlinux 0x7177da0a	scsi_host_put
+EXPORT_SYMBOL vmlinux 0x717cc171	bio_alloc
+EXPORT_SYMBOL vmlinux 0x718a412a	generic_setlease
+EXPORT_SYMBOL vmlinux 0x71a50dbc	register_blkdev
+EXPORT_SYMBOL vmlinux 0x71bb1b48	dev_addr_add_multiple
+EXPORT_SYMBOL vmlinux 0x71c730cd	pci_disable_device
+EXPORT_SYMBOL vmlinux 0x71c90087	memcmp
+EXPORT_SYMBOL vmlinux 0x7202f703	scsi_host_get
+EXPORT_SYMBOL vmlinux 0x720c6256	skb_kill_datagram
+EXPORT_SYMBOL vmlinux 0x72195495	may_umount
+EXPORT_SYMBOL vmlinux 0x727b413f	dev_change_flags
+EXPORT_SYMBOL vmlinux 0x728a5592	freeze_bdev
+EXPORT_SYMBOL vmlinux 0x72b243d4	free_dma
+EXPORT_SYMBOL vmlinux 0x72c3be87	param_set_byte
+EXPORT_SYMBOL vmlinux 0x72d5af61	try_wait_for_completion
+EXPORT_SYMBOL vmlinux 0x72e630d4	kmem_cache_create
+EXPORT_SYMBOL vmlinux 0x72ea7b2d	scsi_device_type
+EXPORT_SYMBOL vmlinux 0x72fc3e29	inet_add_protocol
+EXPORT_SYMBOL vmlinux 0x730b1b59	vlan_ioctl_set
+EXPORT_SYMBOL vmlinux 0x73362c14	posix_unblock_lock
+EXPORT_SYMBOL vmlinux 0x7340e072	sk_stop_timer
+EXPORT_SYMBOL vmlinux 0x73564277	__timecompare_update
+EXPORT_SYMBOL vmlinux 0x7362dd1e	vfs_fstat
+EXPORT_SYMBOL vmlinux 0x73678a16	__skb_recv_datagram
+EXPORT_SYMBOL vmlinux 0x739ed91d	vfs_quota_sync
+EXPORT_SYMBOL vmlinux 0x73ad0c1e	dm_io_client_resize
+EXPORT_SYMBOL vmlinux 0x73aed307	bio_integrity_advance
+EXPORT_SYMBOL vmlinux 0x73d1e08c	pagevec_lookup
+EXPORT_SYMBOL vmlinux 0x73e136c9	follow_down
+EXPORT_SYMBOL vmlinux 0x73e20c1c	strlcpy
+EXPORT_SYMBOL vmlinux 0x73f6dcd8	con_copy_unimap
+EXPORT_SYMBOL vmlinux 0x740e471e	unload_nls
+EXPORT_SYMBOL vmlinux 0x7428f700	alloc_pci_dev
+EXPORT_SYMBOL vmlinux 0x744c0c68	param_get_byte
+EXPORT_SYMBOL vmlinux 0x7485e15e	unregister_chrdev_region
+EXPORT_SYMBOL vmlinux 0x748d8c87	alloc_fcdev
+EXPORT_SYMBOL vmlinux 0x74954462	timecounter_read
+EXPORT_SYMBOL vmlinux 0x74bbf714	pci_get_subsys
+EXPORT_SYMBOL vmlinux 0x74bfc369	__tracepoint_kmem_cache_alloc
+EXPORT_SYMBOL vmlinux 0x74fe8730	sys_ctrler
+EXPORT_SYMBOL vmlinux 0x75213669	skb_gro_reset_offset
+EXPORT_SYMBOL vmlinux 0x7534fe4b	pci_set_dma_mask
+EXPORT_SYMBOL vmlinux 0x753be665	pci_alloc_consistent
+EXPORT_SYMBOL vmlinux 0x754d6fcd	pci_choose_state
+EXPORT_SYMBOL vmlinux 0x756b81b6	block_read_full_page
+EXPORT_SYMBOL vmlinux 0x756dd160	start_thread
+EXPORT_SYMBOL vmlinux 0x759b2fda	simple_transaction_release
+EXPORT_SYMBOL vmlinux 0x759b8e82	of_find_node_with_property
+EXPORT_SYMBOL vmlinux 0x75a22451	submit_bio
+EXPORT_SYMBOL vmlinux 0x75a545fe	submit_bh
+EXPORT_SYMBOL vmlinux 0x75b6fc0c	generic_delete_inode
+EXPORT_SYMBOL vmlinux 0x75b95e5c	invalidate_mapping_pages
+EXPORT_SYMBOL vmlinux 0x75bdea12	iommu_area_alloc
+EXPORT_SYMBOL vmlinux 0x760a0f4f	yield
+EXPORT_SYMBOL vmlinux 0x760b437a	unregister_inetaddr_notifier
+EXPORT_SYMBOL vmlinux 0x7632d705	xfrm_input_resume
+EXPORT_SYMBOL vmlinux 0x768185fb	find_lock_page
+EXPORT_SYMBOL vmlinux 0x76a752e3	phys_mem_access_prot
+EXPORT_SYMBOL vmlinux 0x76bf656d	__bitmap_shift_left
+EXPORT_SYMBOL vmlinux 0x76d3cd60	laptop_mode
+EXPORT_SYMBOL vmlinux 0x76d583c1	write_inode_now
+EXPORT_SYMBOL vmlinux 0x7706df1d	inet_ioctl
+EXPORT_SYMBOL vmlinux 0x7717c843	__dev_getfirstbyhwtype
+EXPORT_SYMBOL vmlinux 0x772b7ad5	starget_for_each_device
+EXPORT_SYMBOL vmlinux 0x773a9c94	blk_iopoll_enabled
+EXPORT_SYMBOL vmlinux 0x774f8218	inet_csk_clear_xmit_timers
+EXPORT_SYMBOL vmlinux 0x777634b8	nf_setsockopt
+EXPORT_SYMBOL vmlinux 0x7788e295	scsi_execute_req
+EXPORT_SYMBOL vmlinux 0x77b14cce	napi_gro_frags
+EXPORT_SYMBOL vmlinux 0x77b5d115	dm_register_target
+EXPORT_SYMBOL vmlinux 0x77b851c4	cacheable_memzero
+EXPORT_SYMBOL vmlinux 0x77cd2ee2	sock_alloc_send_pskb
+EXPORT_SYMBOL vmlinux 0x77cfcfde	__tracepoint_kmalloc_node
+EXPORT_SYMBOL vmlinux 0x77ea7016	__inet6_lookup_established
+EXPORT_SYMBOL vmlinux 0x77ecac9f	zlib_inflateEnd
+EXPORT_SYMBOL vmlinux 0x77fa5d1f	ns_to_timespec
+EXPORT_SYMBOL vmlinux 0x7818dee6	blk_rq_init
+EXPORT_SYMBOL vmlinux 0x782549a7	tty_chars_in_buffer
+EXPORT_SYMBOL vmlinux 0x786f8532	inet_twsk_deschedule
+EXPORT_SYMBOL vmlinux 0x788fe103	iomem_resource
+EXPORT_SYMBOL vmlinux 0x789481b7	bio_copy_user
+EXPORT_SYMBOL vmlinux 0x78d3677d	vfs_quota_on_path
+EXPORT_SYMBOL vmlinux 0x78df6bd7	no_pci_devices
+EXPORT_SYMBOL vmlinux 0x7905d99d	dm_get_mapinfo
+EXPORT_SYMBOL vmlinux 0x790d7c6f	single_release
+EXPORT_SYMBOL vmlinux 0x793d9ff6	note_scsi_host
+EXPORT_SYMBOL vmlinux 0x793e2922	scsi_free_command
+EXPORT_SYMBOL vmlinux 0x795026c7	cad_pid
+EXPORT_SYMBOL vmlinux 0x79600d4a	wait_for_completion_killable
+EXPORT_SYMBOL vmlinux 0x79637267	eth_change_mtu
+EXPORT_SYMBOL vmlinux 0x79687431	del_gendisk
+EXPORT_SYMBOL vmlinux 0x796afbd1	neigh_changeaddr
+EXPORT_SYMBOL vmlinux 0x796fc5ce	scsi_get_sense_info_fld
+EXPORT_SYMBOL vmlinux 0x79aa04a2	get_random_bytes
+EXPORT_SYMBOL vmlinux 0x79ad224b	tasklet_kill
+EXPORT_SYMBOL vmlinux 0x79b38b85	dev_mc_delete
+EXPORT_SYMBOL vmlinux 0x79eab565	pci_remove_bus
+EXPORT_SYMBOL vmlinux 0x7a2a837d	strict_strtol
+EXPORT_SYMBOL vmlinux 0x7a407aba	of_phy_find_device
+EXPORT_SYMBOL vmlinux 0x7a4497db	kzfree
+EXPORT_SYMBOL vmlinux 0x7a709ff9	inode_newsize_ok
+EXPORT_SYMBOL vmlinux 0x7acb634b	try_to_release_page
+EXPORT_SYMBOL vmlinux 0x7acc4fa3	udp_lib_unhash
+EXPORT_SYMBOL vmlinux 0x7af28378	in_dev_finish_destroy
+EXPORT_SYMBOL vmlinux 0x7af7bf0c	load_nls
+EXPORT_SYMBOL vmlinux 0x7b1c2b20	__serio_register_port
+EXPORT_SYMBOL vmlinux 0x7b2dcd0c	dcache_readdir
+EXPORT_SYMBOL vmlinux 0x7b36140d	tty_port_init
+EXPORT_SYMBOL vmlinux 0x7b3d340c	ethtool_op_get_rx_csum
+EXPORT_SYMBOL vmlinux 0x7b48793d	current_fs_time
+EXPORT_SYMBOL vmlinux 0x7b49dc4c	pci_dev_get
+EXPORT_SYMBOL vmlinux 0x7b74e617	dm_get_device
+EXPORT_SYMBOL vmlinux 0x7b8e15ab	scsi_get_host_dev
+EXPORT_SYMBOL vmlinux 0x7b996ce9	llc_mac_hdr_init
+EXPORT_SYMBOL vmlinux 0x7bb2a24a	d_obtain_alias
+EXPORT_SYMBOL vmlinux 0x7bd7754a	close_bdev_exclusive
+EXPORT_SYMBOL vmlinux 0x7be4827c	pci_dram_offset
+EXPORT_SYMBOL vmlinux 0x7bf62d7d	__xfrm_policy_check
+EXPORT_SYMBOL vmlinux 0x7c087781	vfs_quota_enable
+EXPORT_SYMBOL vmlinux 0x7c1bd574	sk_stream_wait_connect
+EXPORT_SYMBOL vmlinux 0x7c2456c2	input_allocate_device
+EXPORT_SYMBOL vmlinux 0x7c2ca8f1	vfs_write
+EXPORT_SYMBOL vmlinux 0x7c46233a	cpufreq_quick_get
+EXPORT_SYMBOL vmlinux 0x7c573ccd	inet_frag_destroy
+EXPORT_SYMBOL vmlinux 0x7c59f5e7	tcp_proc_register
+EXPORT_SYMBOL vmlinux 0x7c60d66e	getname
+EXPORT_SYMBOL vmlinux 0x7c73a4c5	tcp4_gro_complete
+EXPORT_SYMBOL vmlinux 0x7c864591	netif_device_attach
+EXPORT_SYMBOL vmlinux 0x7c904ded	unregister_module_notifier
+EXPORT_SYMBOL vmlinux 0x7c9291d1	csum_partial_copy_generic
+EXPORT_SYMBOL vmlinux 0x7ca341af	kernel_thread
+EXPORT_SYMBOL vmlinux 0x7cc0ca5d	netdev_set_master
+EXPORT_SYMBOL vmlinux 0x7cc48bc6	block_commit_write
+EXPORT_SYMBOL vmlinux 0x7cd1f2fa	tty_port_alloc_xmit_buf
+EXPORT_SYMBOL vmlinux 0x7cfcca3f	scsi_device_quiesce
+EXPORT_SYMBOL vmlinux 0x7d11c268	jiffies
+EXPORT_SYMBOL vmlinux 0x7d2100c6	sk_alloc
+EXPORT_SYMBOL vmlinux 0x7d7eb23f	nf_log_register
+EXPORT_SYMBOL vmlinux 0x7d905a2c	neigh_parms_release
+EXPORT_SYMBOL vmlinux 0x7d94ce48	netdev_state_change
+EXPORT_SYMBOL vmlinux 0x7d9e2782	ip_cmsg_recv
+EXPORT_SYMBOL vmlinux 0x7dceceac	capable
+EXPORT_SYMBOL vmlinux 0x7dd89064	__module_put_and_exit
+EXPORT_SYMBOL vmlinux 0x7de22e66	sock_no_connect
+EXPORT_SYMBOL vmlinux 0x7de86baa	swiotlb_unmap_sg_attrs
+EXPORT_SYMBOL vmlinux 0x7e228146	create_empty_buffers
+EXPORT_SYMBOL vmlinux 0x7e2a2713	jbd2_journal_force_commit
+EXPORT_SYMBOL vmlinux 0x7e30e9be	tty_port_block_til_ready
+EXPORT_SYMBOL vmlinux 0x7e5f53ab	xfrm_policy_walk
+EXPORT_SYMBOL vmlinux 0x7e609e0e	lease_modify
+EXPORT_SYMBOL vmlinux 0x7e7ccf46	scsi_eh_finish_cmd
+EXPORT_SYMBOL vmlinux 0x7ebd47f3	pci_bus_read_config_byte
+EXPORT_SYMBOL vmlinux 0x7ebe9a87	call_usermodehelper_setup
+EXPORT_SYMBOL vmlinux 0x7f21a336	wait_for_key_construction
+EXPORT_SYMBOL vmlinux 0x7f24de73	jiffies_to_usecs
+EXPORT_SYMBOL vmlinux 0x7f307ae0	kthread_create
+EXPORT_SYMBOL vmlinux 0x7f5f172c	journal_load
+EXPORT_SYMBOL vmlinux 0x7f74a9a6	register_snap_client
+EXPORT_SYMBOL vmlinux 0x7f7c8a6a	netif_carrier_on
+EXPORT_SYMBOL vmlinux 0x7f8048db	put_page
+EXPORT_SYMBOL vmlinux 0x7fb86d77	iw_handler_set_spy
+EXPORT_SYMBOL vmlinux 0x7fbd4e70	vlan_gro_frags
+EXPORT_SYMBOL vmlinux 0x7fe0eac5	eth_header_parse
+EXPORT_SYMBOL vmlinux 0x7fede6f7	pci_device_to_OF_node
+EXPORT_SYMBOL vmlinux 0x80081340	fb_set_cmap
+EXPORT_SYMBOL vmlinux 0x800f88cc	__getblk
+EXPORT_SYMBOL vmlinux 0x80179bd5	blk_queue_invalidate_tags
+EXPORT_SYMBOL vmlinux 0x8018936b	sk_stream_kill_queues
+EXPORT_SYMBOL vmlinux 0x801f5a3f	__strncpy_from_user
+EXPORT_SYMBOL vmlinux 0x802f0030	of_release_dev
+EXPORT_SYMBOL vmlinux 0x8063f83d	radix_tree_gang_lookup
+EXPORT_SYMBOL vmlinux 0x80703728	pci_release_selected_regions
+EXPORT_SYMBOL vmlinux 0x80775f85	bio_phys_segments
+EXPORT_SYMBOL vmlinux 0x8078460c	fail_migrate_page
+EXPORT_SYMBOL vmlinux 0x8085c7b1	prepare_to_wait
+EXPORT_SYMBOL vmlinux 0x8086435a	bd_claim
+EXPORT_SYMBOL vmlinux 0x80d54f75	simple_transaction_read
+EXPORT_SYMBOL vmlinux 0x80eec093	iw_handler_set_thrspy
+EXPORT_SYMBOL vmlinux 0x80fa2e1e	locks_mandatory_area
+EXPORT_SYMBOL vmlinux 0x815b5dd4	match_octal
+EXPORT_SYMBOL vmlinux 0x81732be9	netdev_boot_setup_check
+EXPORT_SYMBOL vmlinux 0x81799cee	vscnprintf
+EXPORT_SYMBOL vmlinux 0x818c73a3	jbd2_journal_begin_ordered_truncate
+EXPORT_SYMBOL vmlinux 0x81a1d6c5	vfs_writev
+EXPORT_SYMBOL vmlinux 0x81ba897d	journal_get_create_access
+EXPORT_SYMBOL vmlinux 0x81c0a84f	rtas_set_indicator
+EXPORT_SYMBOL vmlinux 0x81d11cf2	neigh_destroy
+EXPORT_SYMBOL vmlinux 0x81d23117	km_new_mapping
+EXPORT_SYMBOL vmlinux 0x81f6fee8	blk_start_request
+EXPORT_SYMBOL vmlinux 0x820d225f	print_mac
+EXPORT_SYMBOL vmlinux 0x821d04c7	filp_close
+EXPORT_SYMBOL vmlinux 0x821e348e	slow_work_sleep_till_thread_needed
+EXPORT_SYMBOL vmlinux 0x8251bcc3	bitmap_release_region
+EXPORT_SYMBOL vmlinux 0x825d6695	sync_blockdev
+EXPORT_SYMBOL vmlinux 0x8262f64b	tcp_sockets_allocated
+EXPORT_SYMBOL vmlinux 0x8267002c	generic_write_sync
+EXPORT_SYMBOL vmlinux 0x82692209	kref_set
+EXPORT_SYMBOL vmlinux 0x826c948d	lease_get_mtime
+EXPORT_SYMBOL vmlinux 0x82acfb70	blk_iopoll_sched
+EXPORT_SYMBOL vmlinux 0x82b1f918	skb_checksum
+EXPORT_SYMBOL vmlinux 0x82b540de	xrlim_allow
+EXPORT_SYMBOL vmlinux 0x82b5bffd	lock_may_write
+EXPORT_SYMBOL vmlinux 0x82b6f13a	tcp_v4_conn_request
+EXPORT_SYMBOL vmlinux 0x82e5a238	vm_get_page_prot
+EXPORT_SYMBOL vmlinux 0x82ee4076	inet_bind
+EXPORT_SYMBOL vmlinux 0x83003538	blk_queue_max_hw_sectors
+EXPORT_SYMBOL vmlinux 0x831c790f	tty_unregister_device
+EXPORT_SYMBOL vmlinux 0x832d3236	of_get_mac_address
+EXPORT_SYMBOL vmlinux 0x834404e5	sock_alloc_send_skb
+EXPORT_SYMBOL vmlinux 0x83541059	ide_set_handler
+EXPORT_SYMBOL vmlinux 0x835c41c0	path_get
+EXPORT_SYMBOL vmlinux 0x83751acb	journal_get_undo_access
+EXPORT_SYMBOL vmlinux 0x838e726e	phy_register_fixup
+EXPORT_SYMBOL vmlinux 0x83a476ce	bitmap_scnlistprintf
+EXPORT_SYMBOL vmlinux 0x83c43dc1	posix_acl_chmod_masq
+EXPORT_SYMBOL vmlinux 0x83f23833	netlink_ack
+EXPORT_SYMBOL vmlinux 0x83f86767	do_sync_write
+EXPORT_SYMBOL vmlinux 0x8403fdb0	poll_schedule_timeout
+EXPORT_SYMBOL vmlinux 0x8443529f	sk_filter
+EXPORT_SYMBOL vmlinux 0x844404cf	ISA_DMA_THRESHOLD
+EXPORT_SYMBOL vmlinux 0x8447ea0a	udp_lib_setsockopt
+EXPORT_SYMBOL vmlinux 0x84671671	mark_page_accessed
+EXPORT_SYMBOL vmlinux 0x84816af1	neigh_connected_output
+EXPORT_SYMBOL vmlinux 0x84830cc7	i2c_smbus_read_block_data
+EXPORT_SYMBOL vmlinux 0x84959a73	llc_build_and_send_ui_pkt
+EXPORT_SYMBOL vmlinux 0x84b183ae	strncmp
+EXPORT_SYMBOL vmlinux 0x84cdf595	delayed_slow_work_enqueue
+EXPORT_SYMBOL vmlinux 0x85036aaa	ip_getsockopt
+EXPORT_SYMBOL vmlinux 0x8541bccc	intercept_table
+EXPORT_SYMBOL vmlinux 0x85670f1d	rtnl_is_locked
+EXPORT_SYMBOL vmlinux 0x8592b399	netpoll_parse_options
+EXPORT_SYMBOL vmlinux 0x85aa6210	__sk_mem_reclaim
+EXPORT_SYMBOL vmlinux 0x85ac7f10	posix_acl_from_xattr
+EXPORT_SYMBOL vmlinux 0x85b836bf	pci_device_from_OF_node
+EXPORT_SYMBOL vmlinux 0x85d4289a	journal_restart
+EXPORT_SYMBOL vmlinux 0x85dde046	blk_recount_segments
+EXPORT_SYMBOL vmlinux 0x85df9b6c	strsep
+EXPORT_SYMBOL vmlinux 0x85e7deb2	iov_iter_fault_in_readable
+EXPORT_SYMBOL vmlinux 0x85e9d240	generic_ide_ioctl
+EXPORT_SYMBOL vmlinux 0x8622b3bc	input_inject_event
+EXPORT_SYMBOL vmlinux 0x864cebff	dmam_free_noncoherent
+EXPORT_SYMBOL vmlinux 0x8664f62e	cpufreq_update_policy
+EXPORT_SYMBOL vmlinux 0x868acba5	get_options
+EXPORT_SYMBOL vmlinux 0x86aa66d1	__devm_request_region
+EXPORT_SYMBOL vmlinux 0x86b39e32	pcie_set_readrq
+EXPORT_SYMBOL vmlinux 0x86b6ab35	revalidate_disk
+EXPORT_SYMBOL vmlinux 0x86c8dfbd	cpufreq_global_kobject
+EXPORT_SYMBOL vmlinux 0x86db1cbb	rtas_flash_term_hook
+EXPORT_SYMBOL vmlinux 0x86fb9b05	bitmap_parse_user
+EXPORT_SYMBOL vmlinux 0x87076f8c	fb_find_mode
+EXPORT_SYMBOL vmlinux 0x87198f96	tcf_hash_new_index
+EXPORT_SYMBOL vmlinux 0x871c0a7e	fiemap_check_flags
+EXPORT_SYMBOL vmlinux 0x872927b8	down_timeout
+EXPORT_SYMBOL vmlinux 0x87393bf8	bio_integrity_alloc_bioset
+EXPORT_SYMBOL vmlinux 0x873eb482	inet_accept
+EXPORT_SYMBOL vmlinux 0x878ab3ce	sysctl_tcp_adv_win_scale
+EXPORT_SYMBOL vmlinux 0x879e2d3f	registered_fb
+EXPORT_SYMBOL vmlinux 0x87d9c190	thaw_process
+EXPORT_SYMBOL vmlinux 0x87f658b7	inet_addr_type
+EXPORT_SYMBOL vmlinux 0x881039d0	zlib_inflate
+EXPORT_SYMBOL vmlinux 0x8835cb81	flush_dcache_page
+EXPORT_SYMBOL vmlinux 0x883ff5fd	sock_no_ioctl
+EXPORT_SYMBOL vmlinux 0x885e1a02	mdiobus_register
+EXPORT_SYMBOL vmlinux 0x886aa274	posix_acl_create_masq
+EXPORT_SYMBOL vmlinux 0x887fde48	journal_extend
+EXPORT_SYMBOL vmlinux 0x8890283a	ppc_md
+EXPORT_SYMBOL vmlinux 0x889240ed	xfrm_init_state
+EXPORT_SYMBOL vmlinux 0x889f9866	jbd2_journal_set_features
+EXPORT_SYMBOL vmlinux 0x88e621bd	genl_register_family_with_ops
+EXPORT_SYMBOL vmlinux 0x88ec12d2	scsi_ioctl
+EXPORT_SYMBOL vmlinux 0x88eeeb8f	sysctl_jiffies
+EXPORT_SYMBOL vmlinux 0x8909667c	register_key_type
+EXPORT_SYMBOL vmlinux 0x891e32b8	wait_for_completion_interruptible
+EXPORT_SYMBOL vmlinux 0x895aa523	inet_register_protosw
+EXPORT_SYMBOL vmlinux 0x897473df	mktime
+EXPORT_SYMBOL vmlinux 0x89afd585	jbd2_journal_wipe
+EXPORT_SYMBOL vmlinux 0x89b3107b	isa_mem_base
+EXPORT_SYMBOL vmlinux 0x89bf6f61	generic_readlink
+EXPORT_SYMBOL vmlinux 0x89c3503a	bdget_disk
+EXPORT_SYMBOL vmlinux 0x89cce279	inode_init_once
+EXPORT_SYMBOL vmlinux 0x89d5538d	fb_pad_aligned_buffer
+EXPORT_SYMBOL vmlinux 0x89d66811	build_ehash_secret
+EXPORT_SYMBOL vmlinux 0x8a1203a9	kref_get
+EXPORT_SYMBOL vmlinux 0x8a1ac020	kill_pid
+EXPORT_SYMBOL vmlinux 0x8a21cbd9	jbd2_journal_errno
+EXPORT_SYMBOL vmlinux 0x8a373fd7	twl4030_i2c_write
+EXPORT_SYMBOL vmlinux 0x8a52ea3a	mnt_unpin
+EXPORT_SYMBOL vmlinux 0x8a611221	d_find_alias
+EXPORT_SYMBOL vmlinux 0x8a6911c3	rwsem_down_read_failed
+EXPORT_SYMBOL vmlinux 0x8a78c750	phy_disconnect
+EXPORT_SYMBOL vmlinux 0x8a7d1c31	high_memory
+EXPORT_SYMBOL vmlinux 0x8a99a016	mempool_free_slab
+EXPORT_SYMBOL vmlinux 0x8ab2dcf4	vfs_fsync_range
+EXPORT_SYMBOL vmlinux 0x8ab4079e	atomic64_add
+EXPORT_SYMBOL vmlinux 0x8ac40297	iommu_area_free
+EXPORT_SYMBOL vmlinux 0x8ac660f2	invalidate_inodes
+EXPORT_SYMBOL vmlinux 0x8ac71b3e	vfs_create
+EXPORT_SYMBOL vmlinux 0x8ae3a039	generic_listxattr
+EXPORT_SYMBOL vmlinux 0x8af43db1	blk_queue_dma_pad
+EXPORT_SYMBOL vmlinux 0x8af4feb7	blk_complete_request
+EXPORT_SYMBOL vmlinux 0x8af6ee92	of_match_device
+EXPORT_SYMBOL vmlinux 0x8b0d3047	ip_mc_dec_group
+EXPORT_SYMBOL vmlinux 0x8b9a4149	ida_destroy
+EXPORT_SYMBOL vmlinux 0x8bb54f93	xfrm_state_check_expire
+EXPORT_SYMBOL vmlinux 0x8bd313b8	__tracepoint_kfree
+EXPORT_SYMBOL vmlinux 0x8bd5b603	param_get_long
+EXPORT_SYMBOL vmlinux 0x8bd5b70d	tcp_sendmsg
+EXPORT_SYMBOL vmlinux 0x8be321a4	tty_kref_put
+EXPORT_SYMBOL vmlinux 0x8be8462a	blk_queue_make_request
+EXPORT_SYMBOL vmlinux 0x8bfbed28	jbd2_journal_dirty_metadata
+EXPORT_SYMBOL vmlinux 0x8c183cbe	iowrite16
+EXPORT_SYMBOL vmlinux 0x8c2f5022	blk_rq_count_integrity_sg
+EXPORT_SYMBOL vmlinux 0x8c44c6d5	dquot_free_space
+EXPORT_SYMBOL vmlinux 0x8c537c45	posix_acl_from_mode
+EXPORT_SYMBOL vmlinux 0x8c6bae50	tcp_simple_retransmit
+EXPORT_SYMBOL vmlinux 0x8c7bc348	ida_remove
+EXPORT_SYMBOL vmlinux 0x8c8f4f29	journal_forget
+EXPORT_SYMBOL vmlinux 0x8ca2f5e1	blk_queue_alignment_offset
+EXPORT_SYMBOL vmlinux 0x8cc79cab	iowrite16_rep
+EXPORT_SYMBOL vmlinux 0x8cdbb115	bdi_register
+EXPORT_SYMBOL vmlinux 0x8d149b5b	devm_iounmap
+EXPORT_SYMBOL vmlinux 0x8d1ae5dc	d_validate
+EXPORT_SYMBOL vmlinux 0x8d1f6d3f	skb_make_writable
+EXPORT_SYMBOL vmlinux 0x8d3894f2	_ctype
+EXPORT_SYMBOL vmlinux 0x8d3bd753	poll_initwait
+EXPORT_SYMBOL vmlinux 0x8d521a7a	skb_append
+EXPORT_SYMBOL vmlinux 0x8d551bef	sysctl_tcp_rmem
+EXPORT_SYMBOL vmlinux 0x8d5642fc	wait_for_completion_interruptible_timeout
+EXPORT_SYMBOL vmlinux 0x8d5c8725	skb_queue_purge
+EXPORT_SYMBOL vmlinux 0x8d6a139d	kernel_setsockopt
+EXPORT_SYMBOL vmlinux 0x8d8a4a83	pci_release_region
+EXPORT_SYMBOL vmlinux 0x8d8d5d48	kobject_put
+EXPORT_SYMBOL vmlinux 0x8dcb5c27	idr_remove
+EXPORT_SYMBOL vmlinux 0x8dcf01e0	unregister_key_type
+EXPORT_SYMBOL vmlinux 0x8dec69c4	vfs_set_dqinfo
+EXPORT_SYMBOL vmlinux 0x8df5da63	memstart_addr
+EXPORT_SYMBOL vmlinux 0x8e0b7743	ipv6_ext_hdr
+EXPORT_SYMBOL vmlinux 0x8e39d616	pci_scan_single_device
+EXPORT_SYMBOL vmlinux 0x8e3c9cc3	vprintk
+EXPORT_SYMBOL vmlinux 0x8e426a7f	mod_timer_pending
+EXPORT_SYMBOL vmlinux 0x8e477951	serio_interrupt
+EXPORT_SYMBOL vmlinux 0x8e523025	journal_start_commit
+EXPORT_SYMBOL vmlinux 0x8e763ae1	send_remote_softirq
+EXPORT_SYMBOL vmlinux 0x8e84bcdb	proc_mkdir
+EXPORT_SYMBOL vmlinux 0x8e8de82a	__wait_on_buffer
+EXPORT_SYMBOL vmlinux 0x8ee69235	timeval_to_jiffies
+EXPORT_SYMBOL vmlinux 0x8eec0432	d_invalidate
+EXPORT_SYMBOL vmlinux 0x8efb9d48	i2c_bit_add_numbered_bus
+EXPORT_SYMBOL vmlinux 0x8f07d8ca	__wait_on_bit
+EXPORT_SYMBOL vmlinux 0x8f2e1c84	unlock_rename
+EXPORT_SYMBOL vmlinux 0x8f3a5cfe	lock_fb_info
+EXPORT_SYMBOL vmlinux 0x8f3c6282	bmap
+EXPORT_SYMBOL vmlinux 0x8f48679a	rb_prev
+EXPORT_SYMBOL vmlinux 0x8f5bdb39	of_parse_phandle
+EXPORT_SYMBOL vmlinux 0x8f67ed18	stop_tty
+EXPORT_SYMBOL vmlinux 0x8f6b7950	set_irq_data
+EXPORT_SYMBOL vmlinux 0x8f9b86b2	kfifo_alloc
+EXPORT_SYMBOL vmlinux 0x8fab8738	tcp_md5_hash_header
+EXPORT_SYMBOL vmlinux 0x8fb25436	blk_queue_dma_alignment
+EXPORT_SYMBOL vmlinux 0x8fb9f8ef	kmem_cache_destroy
+EXPORT_SYMBOL vmlinux 0x8fbc7e47	flush_tlb_range
+EXPORT_SYMBOL vmlinux 0x8fd23363	blk_rq_map_kern
+EXPORT_SYMBOL vmlinux 0x8fdb3a2f	sk_run_filter
+EXPORT_SYMBOL vmlinux 0x8fe995d2	matroxfb_wait_for_sync
+EXPORT_SYMBOL vmlinux 0x8ffdb3b8	crc16
+EXPORT_SYMBOL vmlinux 0x90035333	secure_tcpv6_sequence_number
+EXPORT_SYMBOL vmlinux 0x9005a832	dm_io_client_destroy
+EXPORT_SYMBOL vmlinux 0x900e022b	security_inode_getsecctx
+EXPORT_SYMBOL vmlinux 0x90134fd4	pci_request_selected_regions
+EXPORT_SYMBOL vmlinux 0x901d773e	neigh_sysctl_register
+EXPORT_SYMBOL vmlinux 0x902e0be7	genphy_suspend
+EXPORT_SYMBOL vmlinux 0x90501868	transfer_to_handler
+EXPORT_SYMBOL vmlinux 0x90840cda	pci_remove_bus_device
+EXPORT_SYMBOL vmlinux 0x90921a6a	block_prepare_write
+EXPORT_SYMBOL vmlinux 0x90a38db7	inet_del_protocol
+EXPORT_SYMBOL vmlinux 0x90ddf997	bio_free
+EXPORT_SYMBOL vmlinux 0x90ee5c05	proc_create_data
+EXPORT_SYMBOL vmlinux 0x91009452	schedule_delayed_work
+EXPORT_SYMBOL vmlinux 0x912557ce	rtas_busy_delay
+EXPORT_SYMBOL vmlinux 0x9126deb2	nf_unregister_queue_handler
+EXPORT_SYMBOL vmlinux 0x91481982	__ratelimit
+EXPORT_SYMBOL vmlinux 0x9148c7ae	dma_spin_lock
+EXPORT_SYMBOL vmlinux 0x915a0597	ide_raw_taskfile
+EXPORT_SYMBOL vmlinux 0x915c89ed	unmap_underlying_metadata
+EXPORT_SYMBOL vmlinux 0x915e1208	tb_ticks_per_usec
+EXPORT_SYMBOL vmlinux 0x9168c033	rtas_get_sensor
+EXPORT_SYMBOL vmlinux 0x91766c09	param_get_ulong
+EXPORT_SYMBOL vmlinux 0x9186526e	vfs_quota_on
+EXPORT_SYMBOL vmlinux 0x919d1163	tty_termios_baud_rate
+EXPORT_SYMBOL vmlinux 0x919f50b6	__find_get_block
+EXPORT_SYMBOL vmlinux 0x91b53732	register_con_driver
+EXPORT_SYMBOL vmlinux 0x91b6c79f	__devm_release_region
+EXPORT_SYMBOL vmlinux 0x91bd1b22	generic_write_checks
+EXPORT_SYMBOL vmlinux 0x91d88e48	__debugger_dabr_match
+EXPORT_SYMBOL vmlinux 0x91e31b30	journal_invalidatepage
+EXPORT_SYMBOL vmlinux 0x91f4ffec	inode_needs_sync
+EXPORT_SYMBOL vmlinux 0x91fbf6d9	neigh_table_init
+EXPORT_SYMBOL vmlinux 0x9214ed8a	param_get_bool
+EXPORT_SYMBOL vmlinux 0x9244ad23	journal_dirty_metadata
+EXPORT_SYMBOL vmlinux 0x9275ec39	bio_map_kern
+EXPORT_SYMBOL vmlinux 0x92860cbf	pskb_copy
+EXPORT_SYMBOL vmlinux 0x928a8dc9	put_disk
+EXPORT_SYMBOL vmlinux 0x92a16f51	scsi_print_command
+EXPORT_SYMBOL vmlinux 0x92b6514b	tty_get_baud_rate
+EXPORT_SYMBOL vmlinux 0x92db7b5d	bio_init
+EXPORT_SYMBOL vmlinux 0x92e19f0d	neigh_parms_alloc
+EXPORT_SYMBOL vmlinux 0x92f69136	dma_pool_alloc
+EXPORT_SYMBOL vmlinux 0x9305f8e6	cpufreq_get
+EXPORT_SYMBOL vmlinux 0x9309de94	cuda_request
+EXPORT_SYMBOL vmlinux 0x938f48ce	vm_insert_page
+EXPORT_SYMBOL vmlinux 0x93a6e0b2	io_schedule
+EXPORT_SYMBOL vmlinux 0x93c0aee2	d_instantiate_unique
+EXPORT_SYMBOL vmlinux 0x93fca811	__get_free_pages
+EXPORT_SYMBOL vmlinux 0x9412f08d	pci_assign_resource
+EXPORT_SYMBOL vmlinux 0x9419ba94	eth_rebuild_header
+EXPORT_SYMBOL vmlinux 0x945d01ec	llc_sap_close
+EXPORT_SYMBOL vmlinux 0x94847b23	nf_ct_destroy
+EXPORT_SYMBOL vmlinux 0x94961283	vunmap
+EXPORT_SYMBOL vmlinux 0x949c3756	netdev_class_remove_file
+EXPORT_SYMBOL vmlinux 0x94acff4d	matroxfb_enable_irq
+EXPORT_SYMBOL vmlinux 0x94d020b3	security_inode_notifysecctx
+EXPORT_SYMBOL vmlinux 0x94fb58ef	jbd2_journal_lock_updates
+EXPORT_SYMBOL vmlinux 0x9501d078	__wait_on_bit_lock
+EXPORT_SYMBOL vmlinux 0x950bac9d	lock_may_read
+EXPORT_SYMBOL vmlinux 0x9512d7f9	pci_bus_write_config_byte
+EXPORT_SYMBOL vmlinux 0x9514151a	_mcount
+EXPORT_SYMBOL vmlinux 0x9524b0ae	_outsb
+EXPORT_SYMBOL vmlinux 0x952e843b	machine_is_compatible
+EXPORT_SYMBOL vmlinux 0x9536bf96	llc_set_station_handler
+EXPORT_SYMBOL vmlinux 0x954488a4	syncookie_secret
+EXPORT_SYMBOL vmlinux 0x954cbb26	vsprintf
+EXPORT_SYMBOL vmlinux 0x956590de	end_buffer_async_write
+EXPORT_SYMBOL vmlinux 0x958c7064	kernel_listen
+EXPORT_SYMBOL vmlinux 0x95a1e5ca	proc_symlink
+EXPORT_SYMBOL vmlinux 0x95a80d17	pmac_suspend_agp_for_card
+EXPORT_SYMBOL vmlinux 0x95c707d6	dev_mc_add
+EXPORT_SYMBOL vmlinux 0x95cf9217	I_BDEV
+EXPORT_SYMBOL vmlinux 0x95d589d2	update_region
+EXPORT_SYMBOL vmlinux 0x95f343be	jbd2_journal_check_used_features
+EXPORT_SYMBOL vmlinux 0x96301e74	xfrm_state_lookup
+EXPORT_SYMBOL vmlinux 0x963fe0d6	dev_kfree_skb_irq
+EXPORT_SYMBOL vmlinux 0x964de571	sockfd_lookup
+EXPORT_SYMBOL vmlinux 0x965b07d9	input_set_keycode
+EXPORT_SYMBOL vmlinux 0x967706ee	tcp_initialize_rcv_mss
+EXPORT_SYMBOL vmlinux 0x96898769	sysfs_format_mac
+EXPORT_SYMBOL vmlinux 0x96b9f9db	tcp4_gro_receive
+EXPORT_SYMBOL vmlinux 0x96cacb2f	open_exec
+EXPORT_SYMBOL vmlinux 0x96cd2b04	scsi_sense_key_string
+EXPORT_SYMBOL vmlinux 0x96e21c58	keyring_clear
+EXPORT_SYMBOL vmlinux 0x9702915f	clear_page_dirty_for_io
+EXPORT_SYMBOL vmlinux 0x972127d6	names_cachep
+EXPORT_SYMBOL vmlinux 0x97255bdf	strlen
+EXPORT_SYMBOL vmlinux 0x972777ee	search_binary_handler
+EXPORT_SYMBOL vmlinux 0x972f88cd	pagecache_write_begin
+EXPORT_SYMBOL vmlinux 0x9746671f	inet_release
+EXPORT_SYMBOL vmlinux 0x9748927f	_outsw_ns
+EXPORT_SYMBOL vmlinux 0x9754ec10	radix_tree_preload
+EXPORT_SYMBOL vmlinux 0x97556f5d	scm_detach_fds
+EXPORT_SYMBOL vmlinux 0x9768fa87	pci_free_consistent
+EXPORT_SYMBOL vmlinux 0x977099c1	tcp_getsockopt
+EXPORT_SYMBOL vmlinux 0x977f964e	slow_work_cancel
+EXPORT_SYMBOL vmlinux 0x97862778	blk_init_queue
+EXPORT_SYMBOL vmlinux 0x979c25d5	phy_enable_interrupts
+EXPORT_SYMBOL vmlinux 0x97fdd642	dev_alloc_skb
+EXPORT_SYMBOL vmlinux 0x981c5109	end_buffer_write_sync
+EXPORT_SYMBOL vmlinux 0x981d62ed	kmalloc_caches
+EXPORT_SYMBOL vmlinux 0x983748be	i2c_master_recv
+EXPORT_SYMBOL vmlinux 0x984936f8	skb_recv_datagram
+EXPORT_SYMBOL vmlinux 0x9869b8b8	skb_find_text
+EXPORT_SYMBOL vmlinux 0x986e6135	fb_pad_unaligned_buffer
+EXPORT_SYMBOL vmlinux 0x987c5905	netlink_unicast
+EXPORT_SYMBOL vmlinux 0x9894445e	slow_work_register_user
+EXPORT_SYMBOL vmlinux 0x98b3a21e	igrab
+EXPORT_SYMBOL vmlinux 0x98fe7882	DMA_MODE_READ
+EXPORT_SYMBOL vmlinux 0x990d0d70	blk_plug_device_unlocked
+EXPORT_SYMBOL vmlinux 0x9983567c	tcp_alloc_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x998715f2	console_start
+EXPORT_SYMBOL vmlinux 0x99875516	arp_tbl
+EXPORT_SYMBOL vmlinux 0x9994c0ca	ps2_is_keyboard_id
+EXPORT_SYMBOL vmlinux 0x999667c5	dm_table_get_size
+EXPORT_SYMBOL vmlinux 0x999e8297	vfree
+EXPORT_SYMBOL vmlinux 0x99a48d7b	jbd2_journal_abort
+EXPORT_SYMBOL vmlinux 0x99a71dd5	kernel_read
+EXPORT_SYMBOL vmlinux 0x99a97346	ps2_end_command
+EXPORT_SYMBOL vmlinux 0x99bb8806	memmove
+EXPORT_SYMBOL vmlinux 0x99bfbe39	get_unused_fd
+EXPORT_SYMBOL vmlinux 0x99c7a8b8	jbd2_dev_to_name
+EXPORT_SYMBOL vmlinux 0x99c84f01	jbd2_journal_init_jbd_inode
+EXPORT_SYMBOL vmlinux 0x99cdc86b	sysctl_tcp_reordering
+EXPORT_SYMBOL vmlinux 0x99d64f2d	ethtool_op_get_flags
+EXPORT_SYMBOL vmlinux 0x99ea12ce	panic_blink
+EXPORT_SYMBOL vmlinux 0x99eba688	phy_register_fixup_for_id
+EXPORT_SYMBOL vmlinux 0x9a1dfd65	strpbrk
+EXPORT_SYMBOL vmlinux 0x9a7279c6	sysctl_ms_jiffies
+EXPORT_SYMBOL vmlinux 0x9aacc38c	macio_release_resource
+EXPORT_SYMBOL vmlinux 0x9ab5554d	dma_pool_free
+EXPORT_SYMBOL vmlinux 0x9ac00b19	alloc_trdev
+EXPORT_SYMBOL vmlinux 0x9b2bed99	matrox_millennium
+EXPORT_SYMBOL vmlinux 0x9b388444	get_zeroed_page
+EXPORT_SYMBOL vmlinux 0x9b4071ea	pcim_enable_device
+EXPORT_SYMBOL vmlinux 0x9b6eb137	ksize
+EXPORT_SYMBOL vmlinux 0x9b87d150	hippi_type_trans
+EXPORT_SYMBOL vmlinux 0x9ba7089d	argv_split
+EXPORT_SYMBOL vmlinux 0x9bae7574	skb_push
+EXPORT_SYMBOL vmlinux 0x9bbf9431	dev_unicast_add
+EXPORT_SYMBOL vmlinux 0x9bc22d1b	blk_cleanup_queue
+EXPORT_SYMBOL vmlinux 0x9bc65ead	i2c_smbus_read_word_data
+EXPORT_SYMBOL vmlinux 0x9bcb0d7b	__dst_free
+EXPORT_SYMBOL vmlinux 0x9bce482f	__release_region
+EXPORT_SYMBOL vmlinux 0x9bd44725	generic_ro_fops
+EXPORT_SYMBOL vmlinux 0x9bdca8ca	lro_vlan_hwaccel_receive_frags
+EXPORT_SYMBOL vmlinux 0x9c012508	fb_parse_edid
+EXPORT_SYMBOL vmlinux 0x9c063ad6	scsi_test_unit_ready
+EXPORT_SYMBOL vmlinux 0x9c3285f8	skb_trim
+EXPORT_SYMBOL vmlinux 0x9c5834a9	rwsem_downgrade_wake
+EXPORT_SYMBOL vmlinux 0x9c60a9f0	kthread_stop
+EXPORT_SYMBOL vmlinux 0x9c7af904	inet_sk_rebuild_header
+EXPORT_SYMBOL vmlinux 0x9c827f93	mark_buffer_dirty
+EXPORT_SYMBOL vmlinux 0x9cb96e92	qdisc_put_rtab
+EXPORT_SYMBOL vmlinux 0x9cc6637b	security_inode_readlink
+EXPORT_SYMBOL vmlinux 0x9ce3f83f	nvram_write_byte
+EXPORT_SYMBOL vmlinux 0x9ceb034f	phy_detach
+EXPORT_SYMBOL vmlinux 0x9ceb163c	memcpy_toiovec
+EXPORT_SYMBOL vmlinux 0x9cfd56c5	scsi_print_status
+EXPORT_SYMBOL vmlinux 0x9d08f44b	__ps2_command
+EXPORT_SYMBOL vmlinux 0x9d14983a	ppc_enable_pmcs
+EXPORT_SYMBOL vmlinux 0x9d3aa376	blk_iopoll_init
+EXPORT_SYMBOL vmlinux 0x9d3b154b	i2c_smbus_write_word_data
+EXPORT_SYMBOL vmlinux 0x9d3ba4fe	set_bdi_congested
+EXPORT_SYMBOL vmlinux 0x9d5d565f	user_path_at
+EXPORT_SYMBOL vmlinux 0x9d612e3d	pci_claim_resource
+EXPORT_SYMBOL vmlinux 0x9d617819	give_up_console
+EXPORT_SYMBOL vmlinux 0x9d669763	memcpy
+EXPORT_SYMBOL vmlinux 0x9d70daed	blk_get_request
+EXPORT_SYMBOL vmlinux 0x9d9b2021	unregister_exec_domain
+EXPORT_SYMBOL vmlinux 0x9dba4f6c	inetdev_by_index
+EXPORT_SYMBOL vmlinux 0x9e0f1a1f	swiotlb_free_coherent
+EXPORT_SYMBOL vmlinux 0x9e120414	ida_get_new_above
+EXPORT_SYMBOL vmlinux 0x9e2000a7	memcpy_toiovecend
+EXPORT_SYMBOL vmlinux 0x9e43daf5	tty_throttle
+EXPORT_SYMBOL vmlinux 0x9e61e2fc	__blk_run_queue
+EXPORT_SYMBOL vmlinux 0x9e8cf2c9	ethtool_op_get_tx_csum
+EXPORT_SYMBOL vmlinux 0x9e97375d	rtas_busy_delay_time
+EXPORT_SYMBOL vmlinux 0x9e9f1714	__bitmap_andnot
+EXPORT_SYMBOL vmlinux 0x9ea01a77	xfrm_input
+EXPORT_SYMBOL vmlinux 0x9ea26c4c	down_write_trylock
+EXPORT_SYMBOL vmlinux 0x9ed685ee	iov_iter_advance
+EXPORT_SYMBOL vmlinux 0x9ee7af24	kick_iocb
+EXPORT_SYMBOL vmlinux 0x9eecde16	do_brk
+EXPORT_SYMBOL vmlinux 0x9efdd2a4	kobject_add
+EXPORT_SYMBOL vmlinux 0x9f100139	jiffies_to_clock_t
+EXPORT_SYMBOL vmlinux 0x9f2bdaac	__bitmap_or
+EXPORT_SYMBOL vmlinux 0x9f2d613e	param_set_bool
+EXPORT_SYMBOL vmlinux 0x9f4615b1	scsi_execute
+EXPORT_SYMBOL vmlinux 0x9f54f6e6	find_get_pages_contig
+EXPORT_SYMBOL vmlinux 0x9f6dc4a6	scsi_cmd_ioctl
+EXPORT_SYMBOL vmlinux 0x9f72c2eb	init_timer_key
+EXPORT_SYMBOL vmlinux 0x9f984513	strrchr
+EXPORT_SYMBOL vmlinux 0x9fa325c0	tcf_hash_insert
+EXPORT_SYMBOL vmlinux 0x9fb3dd30	memcpy_fromiovec
+EXPORT_SYMBOL vmlinux 0x9fe6fa56	ftrace_print_flags_seq
+EXPORT_SYMBOL vmlinux 0x9ff1a916	skb_queue_head
+EXPORT_SYMBOL vmlinux 0x9ffb5228	tty_devnum
+EXPORT_SYMBOL vmlinux 0xa0041391	arp_create
+EXPORT_SYMBOL vmlinux 0xa024ffa5	__sg_free_table
+EXPORT_SYMBOL vmlinux 0xa033d05a	up_read
+EXPORT_SYMBOL vmlinux 0xa03523d5	security_unix_stream_connect
+EXPORT_SYMBOL vmlinux 0xa04a01bd	qdisc_class_hash_insert
+EXPORT_SYMBOL vmlinux 0xa04aa283	i2c_add_adapter
+EXPORT_SYMBOL vmlinux 0xa0522e38	jbd2_journal_try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0xa05c03df	mempool_kmalloc
+EXPORT_SYMBOL vmlinux 0xa074fc79	scsi_eh_restore_cmnd
+EXPORT_SYMBOL vmlinux 0xa07a8d22	sleep_on
+EXPORT_SYMBOL vmlinux 0xa0b04675	vmalloc_32
+EXPORT_SYMBOL vmlinux 0xa0b478db	neigh_seq_start
+EXPORT_SYMBOL vmlinux 0xa0b86ef8	dm_kcopyd_client_destroy
+EXPORT_SYMBOL vmlinux 0xa0cade94	vfs_dq_drop
+EXPORT_SYMBOL vmlinux 0xa0ceef51	out_of_line_wait_on_bit
+EXPORT_SYMBOL vmlinux 0xa0d6e86a	cdev_add
+EXPORT_SYMBOL vmlinux 0xa0e63d71	tty_insert_flip_string_flags
+EXPORT_SYMBOL vmlinux 0xa0fbac79	wake_up_bit
+EXPORT_SYMBOL vmlinux 0xa108eb4d	sysctl_optmem_max
+EXPORT_SYMBOL vmlinux 0xa10daf16	tty_set_operations
+EXPORT_SYMBOL vmlinux 0xa120d33c	tty_unregister_ldisc
+EXPORT_SYMBOL vmlinux 0xa120e9b6	kunmap_high
+EXPORT_SYMBOL vmlinux 0xa1218706	iov_iter_copy_from_user
+EXPORT_SYMBOL vmlinux 0xa134f7b1	create_mnt_ns
+EXPORT_SYMBOL vmlinux 0xa13798f8	printk_ratelimit
+EXPORT_SYMBOL vmlinux 0xa15e4853	__alloc_pages_nodemask
+EXPORT_SYMBOL vmlinux 0xa17c5ee7	register_qdisc
+EXPORT_SYMBOL vmlinux 0xa19a4155	xfrm_policy_destroy
+EXPORT_SYMBOL vmlinux 0xa19ca792	__kfifo_put
+EXPORT_SYMBOL vmlinux 0xa19da751	fbcon_set_bitops
+EXPORT_SYMBOL vmlinux 0xa1b234f5	pci_enable_device_io
+EXPORT_SYMBOL vmlinux 0xa1b580bf	splice_from_pipe_end
+EXPORT_SYMBOL vmlinux 0xa1b759ce	fb_add_videomode
+EXPORT_SYMBOL vmlinux 0xa1b801c7	pmac_resume_agp_for_card
+EXPORT_SYMBOL vmlinux 0xa1b8db10	vfs_symlink
+EXPORT_SYMBOL vmlinux 0xa1c76e0a	_cond_resched
+EXPORT_SYMBOL vmlinux 0xa1cc0402	generic_file_aio_read
+EXPORT_SYMBOL vmlinux 0xa1eb6e90	read_cache_page_gfp
+EXPORT_SYMBOL vmlinux 0xa20aa77c	pci_reenable_device
+EXPORT_SYMBOL vmlinux 0xa20ce1b8	net_msg_warn
+EXPORT_SYMBOL vmlinux 0xa218bf61	complete
+EXPORT_SYMBOL vmlinux 0xa24bfc0d	of_register_spi_devices
+EXPORT_SYMBOL vmlinux 0xa2650334	do_truncate
+EXPORT_SYMBOL vmlinux 0xa2776d36	__dev_get_by_name
+EXPORT_SYMBOL vmlinux 0xa28c0064	path_lookup
+EXPORT_SYMBOL vmlinux 0xa29163c3	dev_get_by_name
+EXPORT_SYMBOL vmlinux 0xa29b1708	tcp_memory_allocated
+EXPORT_SYMBOL vmlinux 0xa2a5fd77	inet_ehash_secret
+EXPORT_SYMBOL vmlinux 0xa2ba8082	vfs_read
+EXPORT_SYMBOL vmlinux 0xa2bbed37	crash_shutdown_register
+EXPORT_SYMBOL vmlinux 0xa2c6879b	dquot_claim_space
+EXPORT_SYMBOL vmlinux 0xa329f07e	register_shrinker
+EXPORT_SYMBOL vmlinux 0xa3323b48	dev_addr_del
+EXPORT_SYMBOL vmlinux 0xa332cdd1	security_tun_dev_attach
+EXPORT_SYMBOL vmlinux 0xa34f1ef5	crc32_le
+EXPORT_SYMBOL vmlinux 0xa35de80f	ipv4_config
+EXPORT_SYMBOL vmlinux 0xa36694fd	scsi_remove_device
+EXPORT_SYMBOL vmlinux 0xa383b9d7	mac_find_mode
+EXPORT_SYMBOL vmlinux 0xa38e691a	ioremap_bot
+EXPORT_SYMBOL vmlinux 0xa39b4cf2	udelay
+EXPORT_SYMBOL vmlinux 0xa3a28fa1	iget_locked
+EXPORT_SYMBOL vmlinux 0xa3b523d5	__breadahead
+EXPORT_SYMBOL vmlinux 0xa3b58c3b	dqget
+EXPORT_SYMBOL vmlinux 0xa3e42510	block_write_begin
+EXPORT_SYMBOL vmlinux 0xa3e75545	flush_tlb_kernel_range
+EXPORT_SYMBOL vmlinux 0xa4001551	ip_mc_rejoin_group
+EXPORT_SYMBOL vmlinux 0xa4142ce9	generic_splice_sendpage
+EXPORT_SYMBOL vmlinux 0xa422e7f5	jbd2_journal_start
+EXPORT_SYMBOL vmlinux 0xa42ee096	d_delete
+EXPORT_SYMBOL vmlinux 0xa43b9539	memcpy_fromiovecend
+EXPORT_SYMBOL vmlinux 0xa4402079	deactivate_locked_super
+EXPORT_SYMBOL vmlinux 0xa4530736	inet_dgram_ops
+EXPORT_SYMBOL vmlinux 0xa4b94fea	iowrite8_rep
+EXPORT_SYMBOL vmlinux 0xa52445b4	journal_wipe
+EXPORT_SYMBOL vmlinux 0xa538b2ac	sock_no_poll
+EXPORT_SYMBOL vmlinux 0xa567a325	request_key
+EXPORT_SYMBOL vmlinux 0xa576c263	generic_find_next_le_bit
+EXPORT_SYMBOL vmlinux 0xa5808bbf	tasklet_init
+EXPORT_SYMBOL vmlinux 0xa585e42b	tcp_gro_complete
+EXPORT_SYMBOL vmlinux 0xa58b6804	nla_parse
+EXPORT_SYMBOL vmlinux 0xa598e29c	vesa_modes
+EXPORT_SYMBOL vmlinux 0xa5a2fc2b	slow_work_enqueue
+EXPORT_SYMBOL vmlinux 0xa5acc360	kobject_set_name
+EXPORT_SYMBOL vmlinux 0xa5b00659	ppc_proc_freq
+EXPORT_SYMBOL vmlinux 0xa5bc2bff	ip_mc_join_group
+EXPORT_SYMBOL vmlinux 0xa5cef8ad	release_resource
+EXPORT_SYMBOL vmlinux 0xa643080f	i2c_clients_command
+EXPORT_SYMBOL vmlinux 0xa65972b8	_memcpy_toio
+EXPORT_SYMBOL vmlinux 0xa65e5938	elv_add_request
+EXPORT_SYMBOL vmlinux 0xa6607d4c	tcp_v4_send_check
+EXPORT_SYMBOL vmlinux 0xa6784401	of_translate_dma_address
+EXPORT_SYMBOL vmlinux 0xa68124fa	hweight8
+EXPORT_SYMBOL vmlinux 0xa681fe88	generate_random_uuid
+EXPORT_SYMBOL vmlinux 0xa68d0ca7	simple_dir_inode_operations
+EXPORT_SYMBOL vmlinux 0xa6dcc773	rb_insert_color
+EXPORT_SYMBOL vmlinux 0xa6e582cc	kblockd_schedule_work
+EXPORT_SYMBOL vmlinux 0xa6fe0d4e	mb_cache_entry_free
+EXPORT_SYMBOL vmlinux 0xa70f82bc	fb_show_logo
+EXPORT_SYMBOL vmlinux 0xa725c1ec	sock_create_kern
+EXPORT_SYMBOL vmlinux 0xa7362c6e	sock_no_sendpage
+EXPORT_SYMBOL vmlinux 0xa73c7172	filemap_flush
+EXPORT_SYMBOL vmlinux 0xa74d6add	key_type_keyring
+EXPORT_SYMBOL vmlinux 0xa7847f1d	dev_set_allmulti
+EXPORT_SYMBOL vmlinux 0xa7cf3bd5	skb_unlink
+EXPORT_SYMBOL vmlinux 0xa7dd0583	bio_integrity_prep
+EXPORT_SYMBOL vmlinux 0xa7df8d7a	bh_uptodate_or_lock
+EXPORT_SYMBOL vmlinux 0xa8152d55	dquot_free_inode
+EXPORT_SYMBOL vmlinux 0xa81540b8	__napi_complete
+EXPORT_SYMBOL vmlinux 0xa81aa872	bdi_destroy
+EXPORT_SYMBOL vmlinux 0xa827c4f4	of_translate_address
+EXPORT_SYMBOL vmlinux 0xa8322b40	skb_under_panic
+EXPORT_SYMBOL vmlinux 0xa83949a7	tty_port_close_end
+EXPORT_SYMBOL vmlinux 0xa8599871	bio_put
+EXPORT_SYMBOL vmlinux 0xa861ab6e	__ioremap
+EXPORT_SYMBOL vmlinux 0xa877e305	boot_tvec_bases
+EXPORT_SYMBOL vmlinux 0xa87e9758	serio_unregister_child_port
+EXPORT_SYMBOL vmlinux 0xa89464b7	__ashldi3
+EXPORT_SYMBOL vmlinux 0xa898cd78	default_llseek
+EXPORT_SYMBOL vmlinux 0xa8ac4d52	copy_io_context
+EXPORT_SYMBOL vmlinux 0xa8adfa32	kfree_skb
+EXPORT_SYMBOL vmlinux 0xa8bf3b32	simple_set_mnt
+EXPORT_SYMBOL vmlinux 0xa8fef7bb	security_unix_may_send
+EXPORT_SYMBOL vmlinux 0xa9571d6d	DMA_MODE_WRITE
+EXPORT_SYMBOL vmlinux 0xa976dc47	pci_get_device
+EXPORT_SYMBOL vmlinux 0xa9c62259	pci_find_capability
+EXPORT_SYMBOL vmlinux 0xa9f1ed23	bit_waitqueue
+EXPORT_SYMBOL vmlinux 0xaa0bf802	skb_prepare_seq_read
+EXPORT_SYMBOL vmlinux 0xaa1a1579	pcim_iounmap
+EXPORT_SYMBOL vmlinux 0xaa248432	copy_strings_kernel
+EXPORT_SYMBOL vmlinux 0xaa261e2b	register_cdrom
+EXPORT_SYMBOL vmlinux 0xaa289240	qdisc_watchdog_init
+EXPORT_SYMBOL vmlinux 0xaa4df512	pmu_batteries
+EXPORT_SYMBOL vmlinux 0xaa847229	sk_free
+EXPORT_SYMBOL vmlinux 0xaa864707	neigh_lookup_nodev
+EXPORT_SYMBOL vmlinux 0xaa87c940	secpath_dup
+EXPORT_SYMBOL vmlinux 0xaa9b3bfd	vfs_get_dqinfo
+EXPORT_SYMBOL vmlinux 0xaaac9538	bio_integrity_alloc
+EXPORT_SYMBOL vmlinux 0xaace9d87	dquot_commit
+EXPORT_SYMBOL vmlinux 0xaad934c8	ps2_command
+EXPORT_SYMBOL vmlinux 0xaafd459d	do_sync_read
+EXPORT_SYMBOL vmlinux 0xaafdc258	strcasecmp
+EXPORT_SYMBOL vmlinux 0xab184686	ethtool_op_set_ufo
+EXPORT_SYMBOL vmlinux 0xab3d4238	blk_queue_softirq_done
+EXPORT_SYMBOL vmlinux 0xab53b0a8	mempool_alloc
+EXPORT_SYMBOL vmlinux 0xab64cbb0	generic_block_fiemap
+EXPORT_SYMBOL vmlinux 0xab7fd338	jbd2_journal_ack_err
+EXPORT_SYMBOL vmlinux 0xabd0c91c	rtc_time_to_tm
+EXPORT_SYMBOL vmlinux 0xabd47787	down_killable
+EXPORT_SYMBOL vmlinux 0xabd8e427	matroxfb_var2my
+EXPORT_SYMBOL vmlinux 0xabe82070	vga_tryget
+EXPORT_SYMBOL vmlinux 0xabf65c8c	tcp_splice_read
+EXPORT_SYMBOL vmlinux 0xac05ceee	blk_start_queue
+EXPORT_SYMBOL vmlinux 0xac0ba8c1	blk_iopoll_disable
+EXPORT_SYMBOL vmlinux 0xac239b0b	blk_queue_ordered
+EXPORT_SYMBOL vmlinux 0xac30759b	serio_unregister_driver
+EXPORT_SYMBOL vmlinux 0xac4f64b5	vga_client_register
+EXPORT_SYMBOL vmlinux 0xac54fc9f	mempool_destroy
+EXPORT_SYMBOL vmlinux 0xac5f113d	cpu_all_bits
+EXPORT_SYMBOL vmlinux 0xac6855b0	gen_kill_estimator
+EXPORT_SYMBOL vmlinux 0xac8ce2dd	of_register_i2c_devices
+EXPORT_SYMBOL vmlinux 0xac9c95cc	pci_match_id
+EXPORT_SYMBOL vmlinux 0xacb34cc4	should_remove_suid
+EXPORT_SYMBOL vmlinux 0xacca9176	seq_bitmap_list
+EXPORT_SYMBOL vmlinux 0xaccabc6a	in4_pton
+EXPORT_SYMBOL vmlinux 0xaccd84db	sysctl_string
+EXPORT_SYMBOL vmlinux 0xaccdbe4f	sock_wake_async
+EXPORT_SYMBOL vmlinux 0xacdeb154	__tracepoint_module_get
+EXPORT_SYMBOL vmlinux 0xacf4d843	match_strdup
+EXPORT_SYMBOL vmlinux 0xad0413d4	match_hex
+EXPORT_SYMBOL vmlinux 0xad053588	dev_set_mtu
+EXPORT_SYMBOL vmlinux 0xad0bda15	log_start_commit
+EXPORT_SYMBOL vmlinux 0xad55b009	input_unregister_device
+EXPORT_SYMBOL vmlinux 0xad5fa227	dev_queue_xmit
+EXPORT_SYMBOL vmlinux 0xad67c80a	get_write_access
+EXPORT_SYMBOL vmlinux 0xad74385e	misc_register
+EXPORT_SYMBOL vmlinux 0xad99b975	dm_table_put
+EXPORT_SYMBOL vmlinux 0xadaa2657	cpufreq_register_notifier
+EXPORT_SYMBOL vmlinux 0xadad28a6	sk_stream_wait_close
+EXPORT_SYMBOL vmlinux 0xadb792c2	prepare_to_wait_exclusive
+EXPORT_SYMBOL vmlinux 0xadcd9ec4	i2c_smbus_write_block_data
+EXPORT_SYMBOL vmlinux 0xadd1e971	alignment_exception
+EXPORT_SYMBOL vmlinux 0xaddba73d	dev_driver_string
+EXPORT_SYMBOL vmlinux 0xaddd4770	__debugger_iabr_match
+EXPORT_SYMBOL vmlinux 0xadf42bd5	__request_region
+EXPORT_SYMBOL vmlinux 0xae10ae9f	gnet_stats_copy_app
+EXPORT_SYMBOL vmlinux 0xae395308	per_cpu__vm_event_states
+EXPORT_SYMBOL vmlinux 0xae3ea7a7	setup_new_exec
+EXPORT_SYMBOL vmlinux 0xae3faaaa	skb_pull
+EXPORT_SYMBOL vmlinux 0xae432435	kernel_getpeername
+EXPORT_SYMBOL vmlinux 0xae596320	lro_flush_pkt
+EXPORT_SYMBOL vmlinux 0xae83c369	bio_integrity_split
+EXPORT_SYMBOL vmlinux 0xaeb51600	i2c_bit_add_bus
+EXPORT_SYMBOL vmlinux 0xaeb8a531	of_find_node_by_phandle
+EXPORT_SYMBOL vmlinux 0xaec0969e	textsearch_prepare
+EXPORT_SYMBOL vmlinux 0xaec655c7	alloc_pages_exact
+EXPORT_SYMBOL vmlinux 0xaed013b9	posix_acl_valid
+EXPORT_SYMBOL vmlinux 0xaed56f35	sock_no_recvmsg
+EXPORT_SYMBOL vmlinux 0xaefc6fc7	matroxfb_DAC_in
+EXPORT_SYMBOL vmlinux 0xaf018a78	tc_classify
+EXPORT_SYMBOL vmlinux 0xaf18636d	sock_setsockopt
+EXPORT_SYMBOL vmlinux 0xaf3dd7dc	scsi_logging_level
+EXPORT_SYMBOL vmlinux 0xaf40b002	eth_header_cache_update
+EXPORT_SYMBOL vmlinux 0xaf4ee8fa	nf_register_hooks
+EXPORT_SYMBOL vmlinux 0xaf58a540	xfrm_policy_alloc
+EXPORT_SYMBOL vmlinux 0xaf696be0	inet_sendmsg
+EXPORT_SYMBOL vmlinux 0xafbacadb	tcf_hash_release
+EXPORT_SYMBOL vmlinux 0xafc7a624	pci_remove_behind_bridge
+EXPORT_SYMBOL vmlinux 0xafdfa2e6	xfrm_alloc_spi
+EXPORT_SYMBOL vmlinux 0xaff008f5	blk_end_request_all
+EXPORT_SYMBOL vmlinux 0xb025c548	key_task_permission
+EXPORT_SYMBOL vmlinux 0xb0268e28	commit_creds
+EXPORT_SYMBOL vmlinux 0xb02849ff	simple_transaction_get
+EXPORT_SYMBOL vmlinux 0xb03792bf	ip_setsockopt
+EXPORT_SYMBOL vmlinux 0xb03f2325	vfs_llseek
+EXPORT_SYMBOL vmlinux 0xb06a616a	simple_fsync
+EXPORT_SYMBOL vmlinux 0xb07421f0	netif_notify_peers
+EXPORT_SYMBOL vmlinux 0xb076d94c	scsi_device_set_state
+EXPORT_SYMBOL vmlinux 0xb08df20a	__scsi_device_lookup
+EXPORT_SYMBOL vmlinux 0xb09697ae	touch_atime
+EXPORT_SYMBOL vmlinux 0xb099e378	vfs_mknod
+EXPORT_SYMBOL vmlinux 0xb09b3776	blk_queue_merge_bvec
+EXPORT_SYMBOL vmlinux 0xb0a23d19	vfs_mkdir
+EXPORT_SYMBOL vmlinux 0xb0b847ac	__bitmap_full
+EXPORT_SYMBOL vmlinux 0xb0c5829c	proc_net_netfilter
+EXPORT_SYMBOL vmlinux 0xb0e10781	get_option
+EXPORT_SYMBOL vmlinux 0xb1380c86	devm_ioremap_prot
+EXPORT_SYMBOL vmlinux 0xb13ac29e	devm_request_threaded_irq
+EXPORT_SYMBOL vmlinux 0xb14fc3f9	scsi_kmap_atomic_sg
+EXPORT_SYMBOL vmlinux 0xb15bd8fa	tb_ticks_per_sec
+EXPORT_SYMBOL vmlinux 0xb18f3f06	ide_xfer_verbose
+EXPORT_SYMBOL vmlinux 0xb19760c3	bitmap_onto
+EXPORT_SYMBOL vmlinux 0xb1a2a935	of_n_size_cells
+EXPORT_SYMBOL vmlinux 0xb1a9eff6	init_file
+EXPORT_SYMBOL vmlinux 0xb1c3a01a	oops_in_progress
+EXPORT_SYMBOL vmlinux 0xb1fa73df	read_cache_page
+EXPORT_SYMBOL vmlinux 0xb1fdf9d1	xfrm4_rcv
+EXPORT_SYMBOL vmlinux 0xb224fbe2	param_get_short
+EXPORT_SYMBOL vmlinux 0xb22fe6a3	netdev_increment_features
+EXPORT_SYMBOL vmlinux 0xb231c822	replace_mount_options
+EXPORT_SYMBOL vmlinux 0xb233762c	atomic64_set
+EXPORT_SYMBOL vmlinux 0xb2668bcd	seq_puts
+EXPORT_SYMBOL vmlinux 0xb2682405	utf8_to_utf32
+EXPORT_SYMBOL vmlinux 0xb27a3468	dst_alloc
+EXPORT_SYMBOL vmlinux 0xb27d8b91	start_tty
+EXPORT_SYMBOL vmlinux 0xb284fd6f	d_rehash
+EXPORT_SYMBOL vmlinux 0xb2a6bb7f	wake_up_process
+EXPORT_SYMBOL vmlinux 0xb2b8cd04	mark_buffer_async_write
+EXPORT_SYMBOL vmlinux 0xb2d72cc7	gen_replace_estimator
+EXPORT_SYMBOL vmlinux 0xb34208ee	blk_get_backing_dev_info
+EXPORT_SYMBOL vmlinux 0xb34d185e	inet_getname
+EXPORT_SYMBOL vmlinux 0xb350fb72	proto_unregister
+EXPORT_SYMBOL vmlinux 0xb370a4f8	cdrom_release
+EXPORT_SYMBOL vmlinux 0xb3732e3c	generic_file_splice_read
+EXPORT_SYMBOL vmlinux 0xb376d79d	radix_tree_tagged
+EXPORT_SYMBOL vmlinux 0xb38b1dd1	__nla_put_nohdr
+EXPORT_SYMBOL vmlinux 0xb3a1e706	dev_get_stats
+EXPORT_SYMBOL vmlinux 0xb3a307c6	si_meminfo
+EXPORT_SYMBOL vmlinux 0xb3f88a6c	scsi_host_alloc
+EXPORT_SYMBOL vmlinux 0xb402b27e	seq_lseek
+EXPORT_SYMBOL vmlinux 0xb4205dea	__neigh_event_send
+EXPORT_SYMBOL vmlinux 0xb423dba1	console_blanked
+EXPORT_SYMBOL vmlinux 0xb42453d3	param_get_invbool
+EXPORT_SYMBOL vmlinux 0xb436ffa3	__cond_resched_lock
+EXPORT_SYMBOL vmlinux 0xb4709322	scsi_dev_info_add_list
+EXPORT_SYMBOL vmlinux 0xb482693a	pcie_get_readrq
+EXPORT_SYMBOL vmlinux 0xb4c21925	gnet_stats_copy_queue
+EXPORT_SYMBOL vmlinux 0xb5044271	vsscanf
+EXPORT_SYMBOL vmlinux 0xb53556b0	input_close_device
+EXPORT_SYMBOL vmlinux 0xb53a4336	kmap_pte
+EXPORT_SYMBOL vmlinux 0xb54488b6	nobh_writepage
+EXPORT_SYMBOL vmlinux 0xb54533f7	usecs_to_jiffies
+EXPORT_SYMBOL vmlinux 0xb561fcc4	pci_set_master
+EXPORT_SYMBOL vmlinux 0xb58a1f66	dev_get_flags
+EXPORT_SYMBOL vmlinux 0xb58c7a60	xfrm_state_register_afinfo
+EXPORT_SYMBOL vmlinux 0xb58d4e8e	scsi_get_command
+EXPORT_SYMBOL vmlinux 0xb5a3f82d	macio_dev_get
+EXPORT_SYMBOL vmlinux 0xb5a459dc	unregister_blkdev
+EXPORT_SYMBOL vmlinux 0xb5b61276	log_wait_commit
+EXPORT_SYMBOL vmlinux 0xb5e146fe	bio_copy_kern
+EXPORT_SYMBOL vmlinux 0xb5e37823	scsi_add_device
+EXPORT_SYMBOL vmlinux 0xb5e9e4f1	ip_fragment
+EXPORT_SYMBOL vmlinux 0xb61966fd	splice_direct_to_actor
+EXPORT_SYMBOL vmlinux 0xb6599b9a	machine_check_exception
+EXPORT_SYMBOL vmlinux 0xb678366f	int_sqrt
+EXPORT_SYMBOL vmlinux 0xb6876b9d	udp_flush_pending_frames
+EXPORT_SYMBOL vmlinux 0xb6a61a86	qdisc_get_rtab
+EXPORT_SYMBOL vmlinux 0xb6a68816	find_last_bit
+EXPORT_SYMBOL vmlinux 0xb6be40d5	proc_dointvec_minmax
+EXPORT_SYMBOL vmlinux 0xb6bffb99	kstat_irqs_cpu
+EXPORT_SYMBOL vmlinux 0xb6c10b75	__scm_send
+EXPORT_SYMBOL vmlinux 0xb6c5a973	scsi_show_result
+EXPORT_SYMBOL vmlinux 0xb6c70a7d	__wake_up
+EXPORT_SYMBOL vmlinux 0xb6cbe9cd	cdev_del
+EXPORT_SYMBOL vmlinux 0xb6e8ddef	ethtool_op_get_sg
+EXPORT_SYMBOL vmlinux 0xb6f88fb4	of_get_cpu_node
+EXPORT_SYMBOL vmlinux 0xb6fdb278	swiotlb_sync_single_for_device
+EXPORT_SYMBOL vmlinux 0xb7209573	scsi_track_queue_full
+EXPORT_SYMBOL vmlinux 0xb73266bf	truncate_inode_pages_range
+EXPORT_SYMBOL vmlinux 0xb7447730	security_sb_set_mnt_opts
+EXPORT_SYMBOL vmlinux 0xb753bcc8	__ashrdi3
+EXPORT_SYMBOL vmlinux 0xb77086ea	g450_mnp2f
+EXPORT_SYMBOL vmlinux 0xb7792469	bio_add_page
+EXPORT_SYMBOL vmlinux 0xb781cdb5	bio_integrity_endio
+EXPORT_SYMBOL vmlinux 0xb798938f	inode_add_rsv_space
+EXPORT_SYMBOL vmlinux 0xb798b8e4	flow_cache_lookup
+EXPORT_SYMBOL vmlinux 0xb7ad3321	ida_init
+EXPORT_SYMBOL vmlinux 0xb7b2e211	jbd2_log_wait_commit
+EXPORT_SYMBOL vmlinux 0xb7b61546	crc32_be
+EXPORT_SYMBOL vmlinux 0xb7ccb3c7	twl4030_i2c_read_u8
+EXPORT_SYMBOL vmlinux 0xb7d9348c	key_alloc
+EXPORT_SYMBOL vmlinux 0xb8067495	matrox_cfbX_init
+EXPORT_SYMBOL vmlinux 0xb814b300	generic_file_mmap
+EXPORT_SYMBOL vmlinux 0xb84b3413	splice_from_pipe_next
+EXPORT_SYMBOL vmlinux 0xb8529912	ide_dma_off
+EXPORT_SYMBOL vmlinux 0xb86e4ab9	random32
+EXPORT_SYMBOL vmlinux 0xb8923bc0	nf_log_unregister
+EXPORT_SYMBOL vmlinux 0xb89af9bf	srandom32
+EXPORT_SYMBOL vmlinux 0xb8aa2342	__check_region
+EXPORT_SYMBOL vmlinux 0xb8becf42	tcp_poll
+EXPORT_SYMBOL vmlinux 0xb8c4bfba	blk_alloc_queue_node
+EXPORT_SYMBOL vmlinux 0xb90365ca	bio_integrity_get_tag
+EXPORT_SYMBOL vmlinux 0xb90bae19	pci_map_rom
+EXPORT_SYMBOL vmlinux 0xb912074a	of_create_pci_dev
+EXPORT_SYMBOL vmlinux 0xb9193f1a	pci_iomap
+EXPORT_SYMBOL vmlinux 0xb91f8216	simple_lookup
+EXPORT_SYMBOL vmlinux 0xb922f332	register_netdevice
+EXPORT_SYMBOL vmlinux 0xb93514b2	kernel_bind
+EXPORT_SYMBOL vmlinux 0xb937f2dd	matroxfb_g450_shutdown
+EXPORT_SYMBOL vmlinux 0xb9418bfe	sk_common_release
+EXPORT_SYMBOL vmlinux 0xb9648d3c	blk_end_request
+EXPORT_SYMBOL vmlinux 0xb96bdb91	alloc_disk
+EXPORT_SYMBOL vmlinux 0xb9718bd8	dev_add_pack
+EXPORT_SYMBOL vmlinux 0xb97d4c9c	mutex_lock
+EXPORT_SYMBOL vmlinux 0xb98a0185	rtc_tm_to_time
+EXPORT_SYMBOL vmlinux 0xb98ef804	vm_stat
+EXPORT_SYMBOL vmlinux 0xb996590e	tcp_sendpage
+EXPORT_SYMBOL vmlinux 0xb9ab692f	mach_chrp
+EXPORT_SYMBOL vmlinux 0xba13089f	tcf_generic_walker
+EXPORT_SYMBOL vmlinux 0xba497f13	loops_per_jiffy
+EXPORT_SYMBOL vmlinux 0xba6d9de1	netif_rx_ni
+EXPORT_SYMBOL vmlinux 0xba8f8b68	completion_done
+EXPORT_SYMBOL vmlinux 0xba934eb6	read_cache_pages
+EXPORT_SYMBOL vmlinux 0xbaaab8ae	timespec_to_jiffies
+EXPORT_SYMBOL vmlinux 0xbab57c20	skb_checksum_help
+EXPORT_SYMBOL vmlinux 0xbb0486d9	complete_request_key
+EXPORT_SYMBOL vmlinux 0xbb167766	fb_var_to_videomode
+EXPORT_SYMBOL vmlinux 0xbb189cad	disallow_signal
+EXPORT_SYMBOL vmlinux 0xbb4669dd	phy_connect
+EXPORT_SYMBOL vmlinux 0xbb4c17be	mnt_pin
+EXPORT_SYMBOL vmlinux 0xbb5b9143	ilookup
+EXPORT_SYMBOL vmlinux 0xbb5d343d	xfrm_get_acqseq
+EXPORT_SYMBOL vmlinux 0xbb845c35	pci_clear_mwi
+EXPORT_SYMBOL vmlinux 0xbb99125c	get_default_font
+EXPORT_SYMBOL vmlinux 0xbbada0c9	tcp_v4_connect
+EXPORT_SYMBOL vmlinux 0xbbca3c3b	dquot_initialize
+EXPORT_SYMBOL vmlinux 0xbbf1988d	ether_setup
+EXPORT_SYMBOL vmlinux 0xbc0d0ea8	bdi_unregister
+EXPORT_SYMBOL vmlinux 0xbc3134c6	pci_enable_device
+EXPORT_SYMBOL vmlinux 0xbc316de4	tty_termios_input_baud_rate
+EXPORT_SYMBOL vmlinux 0xbc44d02c	is_container_init
+EXPORT_SYMBOL vmlinux 0xbc58779c	dev_gro_receive
+EXPORT_SYMBOL vmlinux 0xbc66d6ec	input_open_device
+EXPORT_SYMBOL vmlinux 0xbc7c99d1	skb_seq_read
+EXPORT_SYMBOL vmlinux 0xbca20f7f	__mark_inode_dirty
+EXPORT_SYMBOL vmlinux 0xbcf8d9ff	__pagevec_release
+EXPORT_SYMBOL vmlinux 0xbd1842f4	blk_insert_request
+EXPORT_SYMBOL vmlinux 0xbd28b907	scsi_add_host_with_dma
+EXPORT_SYMBOL vmlinux 0xbd4b1d00	skb_clone
+EXPORT_SYMBOL vmlinux 0xbd5f5566	pci_fixup_cardbus
+EXPORT_SYMBOL vmlinux 0xbd8d541d	flush_hash_pages
+EXPORT_SYMBOL vmlinux 0xbd8f0850	open_bdev_exclusive
+EXPORT_SYMBOL vmlinux 0xbd9e5d49	__lshrdi3
+EXPORT_SYMBOL vmlinux 0xbdb28424	tcf_exts_dump
+EXPORT_SYMBOL vmlinux 0xbdb4f7ec	cdrom_open
+EXPORT_SYMBOL vmlinux 0xbdcfd4c7	kmem_cache_free
+EXPORT_SYMBOL vmlinux 0xbde4be75	blk_init_queue_node
+EXPORT_SYMBOL vmlinux 0xbdf5c25c	rb_next
+EXPORT_SYMBOL vmlinux 0xbdf7b2ad	flush_old_exec
+EXPORT_SYMBOL vmlinux 0xbe0e5118	nla_memcmp
+EXPORT_SYMBOL vmlinux 0xbe215b07	ethtool_op_set_flags
+EXPORT_SYMBOL vmlinux 0xbe63ee40	request_resource
+EXPORT_SYMBOL vmlinux 0xbe75d7f6	tcp_disconnect
+EXPORT_SYMBOL vmlinux 0xbe7d7587	bio_uncopy_user
+EXPORT_SYMBOL vmlinux 0xbea0348f	dquot_acquire
+EXPORT_SYMBOL vmlinux 0xbebc8c9e	DAC1064_global_init
+EXPORT_SYMBOL vmlinux 0xbedadd73	of_dev_get
+EXPORT_SYMBOL vmlinux 0xbedd1adc	bio_sector_offset
+EXPORT_SYMBOL vmlinux 0xbeed2dcc	mb_cache_entry_get
+EXPORT_SYMBOL vmlinux 0xbef28684	of_node_put
+EXPORT_SYMBOL vmlinux 0xbef43296	console_conditional_schedule
+EXPORT_SYMBOL vmlinux 0xbf212bc2	dev_kfree_skb_any
+EXPORT_SYMBOL vmlinux 0xbf225595	nf_unregister_hook
+EXPORT_SYMBOL vmlinux 0xbf391328	dm_table_event
+EXPORT_SYMBOL vmlinux 0xbf7586b4	splice_from_pipe_begin
+EXPORT_SYMBOL vmlinux 0xbf7946e2	genphy_update_link
+EXPORT_SYMBOL vmlinux 0xbf7fd2f5	schedule_timeout_killable
+EXPORT_SYMBOL vmlinux 0xbf9bcc8d	__cap_empty_set
+EXPORT_SYMBOL vmlinux 0xbfbee1d6	bdev_stack_limits
+EXPORT_SYMBOL vmlinux 0xbfc177bc	iowrite32_rep
+EXPORT_SYMBOL vmlinux 0xbfdb8474	unregister_sysrq_key
+EXPORT_SYMBOL vmlinux 0xbfe35295	generic_file_direct_write
+EXPORT_SYMBOL vmlinux 0xbffee226	bioset_free
+EXPORT_SYMBOL vmlinux 0xc0044724	blk_set_default_limits
+EXPORT_SYMBOL vmlinux 0xc023c45f	pci_clear_master
+EXPORT_SYMBOL vmlinux 0xc0255a00	phy_device_register
+EXPORT_SYMBOL vmlinux 0xc02591c3	bio_integrity_enabled
+EXPORT_SYMBOL vmlinux 0xc025e5f7	neigh_table_clear
+EXPORT_SYMBOL vmlinux 0xc028570f	dev_set_promiscuity
+EXPORT_SYMBOL vmlinux 0xc0580937	rb_erase
+EXPORT_SYMBOL vmlinux 0xc05e0964	__neigh_for_each_release
+EXPORT_SYMBOL vmlinux 0xc090ce11	gen_pool_alloc
+EXPORT_SYMBOL vmlinux 0xc096f728	truncate_inode_pages
+EXPORT_SYMBOL vmlinux 0xc0991d37	tcp_check_req
+EXPORT_SYMBOL vmlinux 0xc0a3d105	find_next_bit
+EXPORT_SYMBOL vmlinux 0xc0bf6ead	timecounter_cyc2time
+EXPORT_SYMBOL vmlinux 0xc0c186e3	phy_print_status
+EXPORT_SYMBOL vmlinux 0xc0ca654e	scsi_adjust_queue_depth
+EXPORT_SYMBOL vmlinux 0xc0d815f5	up_write
+EXPORT_SYMBOL vmlinux 0xc0d84ced	cuda_poll
+EXPORT_SYMBOL vmlinux 0xc11d8093	iov_shorten
+EXPORT_SYMBOL vmlinux 0xc1351a64	input_set_capability
+EXPORT_SYMBOL vmlinux 0xc15e073c	generic_find_next_zero_le_bit
+EXPORT_SYMBOL vmlinux 0xc179b708	pci_enable_msix
+EXPORT_SYMBOL vmlinux 0xc17ac536	follow_pfn
+EXPORT_SYMBOL vmlinux 0xc18a581f	arp_xmit
+EXPORT_SYMBOL vmlinux 0xc1921888	netlink_kernel_create
+EXPORT_SYMBOL vmlinux 0xc1be6c32	tcf_unregister_action
+EXPORT_SYMBOL vmlinux 0xc1c4b513	pci_find_device
+EXPORT_SYMBOL vmlinux 0xc1dd4a7f	adb_request
+EXPORT_SYMBOL vmlinux 0xc1e1904c	udp_lib_get_port
+EXPORT_SYMBOL vmlinux 0xc2026eb3	jbd2_journal_release_jbd_inode
+EXPORT_SYMBOL vmlinux 0xc23cf1e9	matroxfb_DAC_out
+EXPORT_SYMBOL vmlinux 0xc249a8fc	elv_rb_find
+EXPORT_SYMBOL vmlinux 0xc256e762	__bitmap_equal
+EXPORT_SYMBOL vmlinux 0xc2682b66	i2c_del_adapter
+EXPORT_SYMBOL vmlinux 0xc29c3d08	unregister_quota_format
+EXPORT_SYMBOL vmlinux 0xc2c16e10	security_path_rename
+EXPORT_SYMBOL vmlinux 0xc2d711e1	krealloc
+EXPORT_SYMBOL vmlinux 0xc2e3fd4d	jbd2_journal_destroy
+EXPORT_SYMBOL vmlinux 0xc2e587d1	reset_devices
+EXPORT_SYMBOL vmlinux 0xc2e964aa	seq_release
+EXPORT_SYMBOL vmlinux 0xc2e9a916	inet_dev_addr_type
+EXPORT_SYMBOL vmlinux 0xc2f56d95	of_gpio_count
+EXPORT_SYMBOL vmlinux 0xc303c99a	__dev_get_by_index
+EXPORT_SYMBOL vmlinux 0xc31504c2	pci_bus_alloc_resource
+EXPORT_SYMBOL vmlinux 0xc3486888	get_sb_bdev
+EXPORT_SYMBOL vmlinux 0xc368849f	nvram_sync
+EXPORT_SYMBOL vmlinux 0xc38f7f27	skb_abort_seq_read
+EXPORT_SYMBOL vmlinux 0xc3c1150d	linkwatch_fire_event
+EXPORT_SYMBOL vmlinux 0xc3c19d02	seq_putc
+EXPORT_SYMBOL vmlinux 0xc3cf1128	in_group_p
+EXPORT_SYMBOL vmlinux 0xc3d701fd	fput
+EXPORT_SYMBOL vmlinux 0xc401a452	netpoll_poll
+EXPORT_SYMBOL vmlinux 0xc458b2ea	gen_pool_add
+EXPORT_SYMBOL vmlinux 0xc46f6d15	skb_append_datato_frags
+EXPORT_SYMBOL vmlinux 0xc477a7df	bioset_create
+EXPORT_SYMBOL vmlinux 0xc47d887f	blk_queue_find_tag
+EXPORT_SYMBOL vmlinux 0xc499ae1e	kstrdup
+EXPORT_SYMBOL vmlinux 0xc4b2d4b4	get_unmapped_area_prot
+EXPORT_SYMBOL vmlinux 0xc4dc67d3	ps2_begin_command
+EXPORT_SYMBOL vmlinux 0xc4e6d94b	no_llseek
+EXPORT_SYMBOL vmlinux 0xc4f74249	jbd2_journal_update_format
+EXPORT_SYMBOL vmlinux 0xc50855b8	posix_lock_file_wait
+EXPORT_SYMBOL vmlinux 0xc52d6eba	have_submounts
+EXPORT_SYMBOL vmlinux 0xc52f5714	fb_videomode_to_var
+EXPORT_SYMBOL vmlinux 0xc53552fc	of_find_i2c_device_by_node
+EXPORT_SYMBOL vmlinux 0xc53656bd	genphy_restart_aneg
+EXPORT_SYMBOL vmlinux 0xc54688be	tcp_gro_receive
+EXPORT_SYMBOL vmlinux 0xc5534d64	ioread16
+EXPORT_SYMBOL vmlinux 0xc55e62be	eth_header
+EXPORT_SYMBOL vmlinux 0xc5652f56	bh_submit_read
+EXPORT_SYMBOL vmlinux 0xc575771e	sg_free_table
+EXPORT_SYMBOL vmlinux 0xc57ba9a3	skb_store_bits
+EXPORT_SYMBOL vmlinux 0xc589c938	inode_change_ok
+EXPORT_SYMBOL vmlinux 0xc59cfe82	unregister_nls
+EXPORT_SYMBOL vmlinux 0xc5b3d054	sk_stream_error
+EXPORT_SYMBOL vmlinux 0xc5c2676e	register_quota_format
+EXPORT_SYMBOL vmlinux 0xc5d93583	per_cpu____irq_regs
+EXPORT_SYMBOL vmlinux 0xc6045640	scsi_host_set_state
+EXPORT_SYMBOL vmlinux 0xc6184045	cpu_possible_mask
+EXPORT_SYMBOL vmlinux 0xc633495b	schedule_work
+EXPORT_SYMBOL vmlinux 0xc648683c	scsi_device_resume
+EXPORT_SYMBOL vmlinux 0xc656d4c9	tcp_v4_md5_do_del
+EXPORT_SYMBOL vmlinux 0xc686450d	kmem_cache_alloc
+EXPORT_SYMBOL vmlinux 0xc69ff87c	netdev_class_create_file
+EXPORT_SYMBOL vmlinux 0xc6a771fb	block_write_full_page
+EXPORT_SYMBOL vmlinux 0xc6d4211e	km_policy_expired
+EXPORT_SYMBOL vmlinux 0xc6e0e167	clocksource_change_rating
+EXPORT_SYMBOL vmlinux 0xc7131591	pcibios_align_resource
+EXPORT_SYMBOL vmlinux 0xc722227e	posix_acl_clone
+EXPORT_SYMBOL vmlinux 0xc79bcd36	dm_vcalloc
+EXPORT_SYMBOL vmlinux 0xc7a4fbed	rtnl_lock
+EXPORT_SYMBOL vmlinux 0xc7b19fa6	of_platform_device_create
+EXPORT_SYMBOL vmlinux 0xc7c08161	scsi_target_quiesce
+EXPORT_SYMBOL vmlinux 0xc7cd02bf	xfrm4_prepare_output
+EXPORT_SYMBOL vmlinux 0xc7ec6c27	strspn
+EXPORT_SYMBOL vmlinux 0xc7f3f72c	nobh_write_begin
+EXPORT_SYMBOL vmlinux 0xc7f8874b	seq_escape
+EXPORT_SYMBOL vmlinux 0xc7f98eaa	prepare_creds
+EXPORT_SYMBOL vmlinux 0xc8346964	scsi_prep_state_check
+EXPORT_SYMBOL vmlinux 0xc85c8fc6	mach_powermac
+EXPORT_SYMBOL vmlinux 0xc8a7d5ab	splice_from_pipe_feed
+EXPORT_SYMBOL vmlinux 0xc8aeb309	tcf_em_tree_validate
+EXPORT_SYMBOL vmlinux 0xc8b57c27	autoremove_wake_function
+EXPORT_SYMBOL vmlinux 0xc902462a	sk_stream_wait_memory
+EXPORT_SYMBOL vmlinux 0xc9242666	mod_timer
+EXPORT_SYMBOL vmlinux 0xc925d7be	fget
+EXPORT_SYMBOL vmlinux 0xc928b6ad	d_prune_aliases
+EXPORT_SYMBOL vmlinux 0xc95958ae	macio_request_resource
+EXPORT_SYMBOL vmlinux 0xc964fc03	pcibios_resource_to_bus
+EXPORT_SYMBOL vmlinux 0xc970fd2e	tcf_em_tree_destroy
+EXPORT_SYMBOL vmlinux 0xc983dcee	kill_pgrp
+EXPORT_SYMBOL vmlinux 0xc998d641	icmp_err_convert
+EXPORT_SYMBOL vmlinux 0xc99bf48c	jbd2_journal_revoke
+EXPORT_SYMBOL vmlinux 0xc9fd7794	vfs_follow_link
+EXPORT_SYMBOL vmlinux 0xca0daad1	tcp_v4_remember_stamp
+EXPORT_SYMBOL vmlinux 0xca0e0b84	security_task_getsecid
+EXPORT_SYMBOL vmlinux 0xca0e9335	genlmsg_multicast_allns
+EXPORT_SYMBOL vmlinux 0xca1f67fb	swiotlb_sync_sg_for_device
+EXPORT_SYMBOL vmlinux 0xca24607f	of_get_property
+EXPORT_SYMBOL vmlinux 0xca3df261	of_phy_connect_fixed_link
+EXPORT_SYMBOL vmlinux 0xca404913	simple_release_fs
+EXPORT_SYMBOL vmlinux 0xca53a758	pcie_port_service_unregister
+EXPORT_SYMBOL vmlinux 0xca5dbc50	scsi_print_sense_hdr
+EXPORT_SYMBOL vmlinux 0xca825895	pmu_suspend
+EXPORT_SYMBOL vmlinux 0xca8b1beb	add_to_page_cache_locked
+EXPORT_SYMBOL vmlinux 0xca8c6ee1	generic_make_request
+EXPORT_SYMBOL vmlinux 0xca968e4a	__blk_end_request
+EXPORT_SYMBOL vmlinux 0xcacd272d	atomic64_sub_return
+EXPORT_SYMBOL vmlinux 0xcaeccaed	sock_no_socketpair
+EXPORT_SYMBOL vmlinux 0xcaf9dd34	__pskb_pull_tail
+EXPORT_SYMBOL vmlinux 0xcb35b2bd	lro_flush_all
+EXPORT_SYMBOL vmlinux 0xcb6beb40	hweight32
+EXPORT_SYMBOL vmlinux 0xcb7131fb	fb_get_options
+EXPORT_SYMBOL vmlinux 0xcb93a945	sock_rfree
+EXPORT_SYMBOL vmlinux 0xcbb81825	block_write_end
+EXPORT_SYMBOL vmlinux 0xcbc29f4e	gen_new_estimator
+EXPORT_SYMBOL vmlinux 0xcbc5a9f9	sock_queue_rcv_skb
+EXPORT_SYMBOL vmlinux 0xcbdab45a	inet_csk_accept
+EXPORT_SYMBOL vmlinux 0xcbe4923c	unregister_snap_client
+EXPORT_SYMBOL vmlinux 0xcbe7b480	pci_scan_bridge
+EXPORT_SYMBOL vmlinux 0xcc36f32e	fb_unregister_client
+EXPORT_SYMBOL vmlinux 0xcc4e63c1	eth_type_trans
+EXPORT_SYMBOL vmlinux 0xcc5005fe	msleep_interruptible
+EXPORT_SYMBOL vmlinux 0xcc552dab	tcp_connect
+EXPORT_SYMBOL vmlinux 0xcc7fa952	local_bh_enable_ip
+EXPORT_SYMBOL vmlinux 0xcc9e608f	__vlan_hwaccel_rx
+EXPORT_SYMBOL vmlinux 0xcd826cee	jbd2_journal_init_inode
+EXPORT_SYMBOL vmlinux 0xcd9cb962	filemap_fdatawait_range
+EXPORT_SYMBOL vmlinux 0xcdadb487	matroxfb_unregister_driver
+EXPORT_SYMBOL vmlinux 0xcdb2332b	cfb_copyarea
+EXPORT_SYMBOL vmlinux 0xcdbd10ae	tcp_rcv_established
+EXPORT_SYMBOL vmlinux 0xcdc8a6cc	scsi_target_resume
+EXPORT_SYMBOL vmlinux 0xcddfe591	proc_doulongvec_minmax
+EXPORT_SYMBOL vmlinux 0xcde7f7e8	sock_map_fd
+EXPORT_SYMBOL vmlinux 0xcde90d3b	scsi_setup_blk_pc_cmnd
+EXPORT_SYMBOL vmlinux 0xce36ded6	sysctl_tcp_mem
+EXPORT_SYMBOL vmlinux 0xce3aa34b	arp_find
+EXPORT_SYMBOL vmlinux 0xce409cda	pmac_set_early_video_resume
+EXPORT_SYMBOL vmlinux 0xce594d46	file_remove_suid
+EXPORT_SYMBOL vmlinux 0xce5ac24f	zlib_inflate_workspacesize
+EXPORT_SYMBOL vmlinux 0xce724ffc	xfrm_policy_register_afinfo
+EXPORT_SYMBOL vmlinux 0xce7890a0	simple_dir_operations
+EXPORT_SYMBOL vmlinux 0xce7d3f9f	d_path
+EXPORT_SYMBOL vmlinux 0xce8b1b1f	tcp_v4_do_rcv
+EXPORT_SYMBOL vmlinux 0xce9a5720	lro_receive_frags
+EXPORT_SYMBOL vmlinux 0xcea0f73b	tty_name
+EXPORT_SYMBOL vmlinux 0xcea1bbd9	misc_deregister
+EXPORT_SYMBOL vmlinux 0xceb851da	ide_do_reset
+EXPORT_SYMBOL vmlinux 0xced5b830	skb_copy_datagram_from_iovec
+EXPORT_SYMBOL vmlinux 0xcf14dc5c	journal_unlock_updates
+EXPORT_SYMBOL vmlinux 0xcf46ba1b	pci_request_selected_regions_exclusive
+EXPORT_SYMBOL vmlinux 0xcf55c77d	security_file_permission
+EXPORT_SYMBOL vmlinux 0xcf56f91d	scsi_mode_sense
+EXPORT_SYMBOL vmlinux 0xcf6be91c	lock_rename
+EXPORT_SYMBOL vmlinux 0xcf735e18	proc_doulongvec_ms_jiffies_minmax
+EXPORT_SYMBOL vmlinux 0xcf901697	__strnlen_user
+EXPORT_SYMBOL vmlinux 0xcfa8a2ac	xfrm_state_walk
+EXPORT_SYMBOL vmlinux 0xcfb9006e	jiffies_to_timeval
+EXPORT_SYMBOL vmlinux 0xcfcf00a4	scsi_is_target_device
+EXPORT_SYMBOL vmlinux 0xcfe958e4	release_firmware
+EXPORT_SYMBOL vmlinux 0xcff53400	kref_put
+EXPORT_SYMBOL vmlinux 0xd00652f3	timecompare_offset
+EXPORT_SYMBOL vmlinux 0xd0181f4f	__bitmap_xor
+EXPORT_SYMBOL vmlinux 0xd01c5068	netpoll_print_options
+EXPORT_SYMBOL vmlinux 0xd01e64d3	jbd2_journal_file_inode
+EXPORT_SYMBOL vmlinux 0xd04e731e	per_cpu__kstat
+EXPORT_SYMBOL vmlinux 0xd0a45fa5	pmu_enable_irled
+EXPORT_SYMBOL vmlinux 0xd0d145cd	iunique
+EXPORT_SYMBOL vmlinux 0xd0ee38b8	schedule_timeout_uninterruptible
+EXPORT_SYMBOL vmlinux 0xd104150f	sg_miter_stop
+EXPORT_SYMBOL vmlinux 0xd11bbde9	cap_netlink_recv
+EXPORT_SYMBOL vmlinux 0xd1254c02	llc_sap_open
+EXPORT_SYMBOL vmlinux 0xd1262886	rtas_data_buf
+EXPORT_SYMBOL vmlinux 0xd12fe5ac	proc_dointvec_ms_jiffies
+EXPORT_SYMBOL vmlinux 0xd13b9496	of_find_node_by_type
+EXPORT_SYMBOL vmlinux 0xd14d404d	ip_route_input
+EXPORT_SYMBOL vmlinux 0xd17a86af	blk_queue_max_sectors
+EXPORT_SYMBOL vmlinux 0xd193222b	phy_ethtool_gset
+EXPORT_SYMBOL vmlinux 0xd1a07da0	of_get_next_child
+EXPORT_SYMBOL vmlinux 0xd251d7b0	security_socket_getpeersec_dgram
+EXPORT_SYMBOL vmlinux 0xd2555f19	jiffies_64_to_clock_t
+EXPORT_SYMBOL vmlinux 0xd25ae5a7	bio_integrity_set_tag
+EXPORT_SYMBOL vmlinux 0xd25d4f74	console_blank_hook
+EXPORT_SYMBOL vmlinux 0xd26c24c2	xfrm_unregister_mode
+EXPORT_SYMBOL vmlinux 0xd27728a4	scsi_free_host_dev
+EXPORT_SYMBOL vmlinux 0xd27f6c66	deny_write_access
+EXPORT_SYMBOL vmlinux 0xd28077da	fifo_create_dflt
+EXPORT_SYMBOL vmlinux 0xd2965f6f	kthread_should_stop
+EXPORT_SYMBOL vmlinux 0xd29a305e	send_sig_info
+EXPORT_SYMBOL vmlinux 0xd2a53a16	____pagevec_lru_add
+EXPORT_SYMBOL vmlinux 0xd2b09eaa	bio_unmap_user
+EXPORT_SYMBOL vmlinux 0xd2d91143	dmam_alloc_coherent
+EXPORT_SYMBOL vmlinux 0xd2e4f945	blkdev_issue_discard
+EXPORT_SYMBOL vmlinux 0xd3426d29	ilookup5
+EXPORT_SYMBOL vmlinux 0xd3427f73	mempool_create_node
+EXPORT_SYMBOL vmlinux 0xd34405a5	bioset_integrity_free
+EXPORT_SYMBOL vmlinux 0xd34bf5dc	scsi_block_when_processing_errors
+EXPORT_SYMBOL vmlinux 0xd3668b92	__register_chrdev
+EXPORT_SYMBOL vmlinux 0xd392d5a5	posix_acl_permission
+EXPORT_SYMBOL vmlinux 0xd3c9d0d3	bio_kmalloc
+EXPORT_SYMBOL vmlinux 0xd409383c	pmu_request
+EXPORT_SYMBOL vmlinux 0xd418e1c0	adjust_resource
+EXPORT_SYMBOL vmlinux 0xd41c34c9	inet_csk_reset_keepalive_timer
+EXPORT_SYMBOL vmlinux 0xd44aaf03	prepare_binprm
+EXPORT_SYMBOL vmlinux 0xd44fbbbe	__netdev_alloc_skb
+EXPORT_SYMBOL vmlinux 0xd4568c85	thaw_bdev
+EXPORT_SYMBOL vmlinux 0xd4584614	skb_tx_hash
+EXPORT_SYMBOL vmlinux 0xd4b29189	init_buffer
+EXPORT_SYMBOL vmlinux 0xd4f8ede6	sock_create_lite
+EXPORT_SYMBOL vmlinux 0xd5263820	mb_cache_destroy
+EXPORT_SYMBOL vmlinux 0xd5688a7a	radix_tree_insert
+EXPORT_SYMBOL vmlinux 0xd57f8789	iommu_num_pages
+EXPORT_SYMBOL vmlinux 0xd59e3e5b	clear_user_page
+EXPORT_SYMBOL vmlinux 0xd5a0af8b	__netif_schedule
+EXPORT_SYMBOL vmlinux 0xd5a24d53	tcp_v4_md5_lookup
+EXPORT_SYMBOL vmlinux 0xd5a6e632	put_io_context
+EXPORT_SYMBOL vmlinux 0xd5b2e52a	single_step_exception
+EXPORT_SYMBOL vmlinux 0xd5c69703	cpufreq_get_policy
+EXPORT_SYMBOL vmlinux 0xd5e8444a	__div64_32
+EXPORT_SYMBOL vmlinux 0xd5f6eb73	dquot_release_reserved_space
+EXPORT_SYMBOL vmlinux 0xd627480b	strncat
+EXPORT_SYMBOL vmlinux 0xd62c833f	schedule_timeout
+EXPORT_SYMBOL vmlinux 0xd6583a69	jbd2_journal_set_triggers
+EXPORT_SYMBOL vmlinux 0xd6991f26	bd_release
+EXPORT_SYMBOL vmlinux 0xd69b30e0	atomic64_add_unless
+EXPORT_SYMBOL vmlinux 0xd6a78d08	smp_call_function_single
+EXPORT_SYMBOL vmlinux 0xd6a9e8ff	netlink_broadcast
+EXPORT_SYMBOL vmlinux 0xd6af8545	keyring_search
+EXPORT_SYMBOL vmlinux 0xd6b149f1	check_disk_size_change
+EXPORT_SYMBOL vmlinux 0xd6c0e4be	audit_log_format
+EXPORT_SYMBOL vmlinux 0xd6c4ad69	generic_writepages
+EXPORT_SYMBOL vmlinux 0xd6ee688f	vmalloc
+EXPORT_SYMBOL vmlinux 0xd6f00d1f	key_validate
+EXPORT_SYMBOL vmlinux 0xd7144331	destroy_EII_client
+EXPORT_SYMBOL vmlinux 0xd717c74d	locks_copy_lock
+EXPORT_SYMBOL vmlinux 0xd71aaf8d	request_key_with_auxdata
+EXPORT_SYMBOL vmlinux 0xd72b5523	scsi_calculate_bounce_limit
+EXPORT_SYMBOL vmlinux 0xd742fdd5	__scsi_alloc_queue
+EXPORT_SYMBOL vmlinux 0xd77a5aa5	__bitmap_and
+EXPORT_SYMBOL vmlinux 0xd77b9cb3	tcp_close
+EXPORT_SYMBOL vmlinux 0xd78ccf8b	neigh_seq_next
+EXPORT_SYMBOL vmlinux 0xd78f811d	input_unfilter_device
+EXPORT_SYMBOL vmlinux 0xd79b5a02	allow_signal
+EXPORT_SYMBOL vmlinux 0xd7a2a956	follow_up
+EXPORT_SYMBOL vmlinux 0xd7b69fae	idr_find
+EXPORT_SYMBOL vmlinux 0xd7d4d7de	swiotlb_sync_sg_for_cpu
+EXPORT_SYMBOL vmlinux 0xd8183667	generic_write_end
+EXPORT_SYMBOL vmlinux 0xd83791bc	nf_conntrack_destroy
+EXPORT_SYMBOL vmlinux 0xd88bbaa5	wait_on_sync_kiocb
+EXPORT_SYMBOL vmlinux 0xd898605c	do_splice_to
+EXPORT_SYMBOL vmlinux 0xd89a8514	xfrm4_rcv_encap
+EXPORT_SYMBOL vmlinux 0xd89da37f	movable_zone
+EXPORT_SYMBOL vmlinux 0xd8a2ab95	in_egroup_p
+EXPORT_SYMBOL vmlinux 0xd8a77621	skb_split
+EXPORT_SYMBOL vmlinux 0xd8b52aed	truncate_pagecache
+EXPORT_SYMBOL vmlinux 0xd8bd9099	udp_sendmsg
+EXPORT_SYMBOL vmlinux 0xd8e484f0	register_chrdev_region
+EXPORT_SYMBOL vmlinux 0xd92514ca	agp_special_page
+EXPORT_SYMBOL vmlinux 0xd963a74a	flush_delayed_work
+EXPORT_SYMBOL vmlinux 0xd985dc99	mempool_free_pages
+EXPORT_SYMBOL vmlinux 0xd99b52e5	pci_target_state
+EXPORT_SYMBOL vmlinux 0xd99bda9a	blk_remove_plug
+EXPORT_SYMBOL vmlinux 0xd9aa4389	module_refcount
+EXPORT_SYMBOL vmlinux 0xd9bac924	tty_termios_copy_hw
+EXPORT_SYMBOL vmlinux 0xd9ce8f0c	strnlen
+EXPORT_SYMBOL vmlinux 0xd9f654f2	find_get_pages_tag
+EXPORT_SYMBOL vmlinux 0xda1a7335	kasprintf
+EXPORT_SYMBOL vmlinux 0xda226fe3	__invalidate_device
+EXPORT_SYMBOL vmlinux 0xda3cb8b1	tcf_hash_destroy
+EXPORT_SYMBOL vmlinux 0xda59b97b	pci_unmap_rom
+EXPORT_SYMBOL vmlinux 0xda70af8c	fib_default_rule_add
+EXPORT_SYMBOL vmlinux 0xda726866	blk_queue_init_tags
+EXPORT_SYMBOL vmlinux 0xda7ca6cb	fb_mode_is_equal
+EXPORT_SYMBOL vmlinux 0xda8af7ad	fb_find_nearest_mode
+EXPORT_SYMBOL vmlinux 0xda8b5096	xfrm_cfg_mutex
+EXPORT_SYMBOL vmlinux 0xdaa57ec3	totalhigh_pages
+EXPORT_SYMBOL vmlinux 0xdaa5c653	skb_recycle_check
+EXPORT_SYMBOL vmlinux 0xdad49337	generic_getxattr
+EXPORT_SYMBOL vmlinux 0xdad86821	mb_cache_shrink
+EXPORT_SYMBOL vmlinux 0xdafe1bf3	pci_select_bars
+EXPORT_SYMBOL vmlinux 0xdb1b2059	__sk_mem_schedule
+EXPORT_SYMBOL vmlinux 0xdb223f91	generic_permission
+EXPORT_SYMBOL vmlinux 0xdb31f257	sync_inodes_sb
+EXPORT_SYMBOL vmlinux 0xdb380756	textsearch_register
+EXPORT_SYMBOL vmlinux 0xdb38a3a8	pci_set_dma_max_seg_size
+EXPORT_SYMBOL vmlinux 0xdb4c88b4	groups_alloc
+EXPORT_SYMBOL vmlinux 0xdb5a63d9	blk_queue_start_tag
+EXPORT_SYMBOL vmlinux 0xdb8258c3	phy_stop
+EXPORT_SYMBOL vmlinux 0xdb83f600	backlight_force_update
+EXPORT_SYMBOL vmlinux 0xdb864d65	iov_iter_single_seg_count
+EXPORT_SYMBOL vmlinux 0xdb8c356f	skb_copy_datagram_iovec
+EXPORT_SYMBOL vmlinux 0xdb98591f	dm_unregister_target
+EXPORT_SYMBOL vmlinux 0xdb9d93e8	generic_file_aio_write
+EXPORT_SYMBOL vmlinux 0xdbc5b650	dev_unicast_delete
+EXPORT_SYMBOL vmlinux 0xdbcd416e	sysctl_ip_nonlocal_bind
+EXPORT_SYMBOL vmlinux 0xdbce3333	blk_queue_update_dma_alignment
+EXPORT_SYMBOL vmlinux 0xdbd33a14	tty_shutdown
+EXPORT_SYMBOL vmlinux 0xdbe16669	dm_put_device
+EXPORT_SYMBOL vmlinux 0xdc047fc4	scsi_dev_info_list_add_keyed
+EXPORT_SYMBOL vmlinux 0xdc053205	udp_memory_allocated
+EXPORT_SYMBOL vmlinux 0xdc0e1cd3	journal_init_inode
+EXPORT_SYMBOL vmlinux 0xdc14eda7	pci_pci_problems
+EXPORT_SYMBOL vmlinux 0xdc1b4b88	swiotlb_unmap_sg
+EXPORT_SYMBOL vmlinux 0xdc21cecb	macio_unregister_driver
+EXPORT_SYMBOL vmlinux 0xdc2adb35	add_taint
+EXPORT_SYMBOL vmlinux 0xdc43a9c8	daemonize
+EXPORT_SYMBOL vmlinux 0xdc76e44a	swiotlb_map_sg_attrs
+EXPORT_SYMBOL vmlinux 0xdca0e950	genl_register_family
+EXPORT_SYMBOL vmlinux 0xdcb0349b	sys_close
+EXPORT_SYMBOL vmlinux 0xdccf8e32	dev_getfirstbyhwtype
+EXPORT_SYMBOL vmlinux 0xdcde3f32	pci_iounmap
+EXPORT_SYMBOL vmlinux 0xdcefb9a5	pmu_resume
+EXPORT_SYMBOL vmlinux 0xdcf416f3	dquot_commit_info
+EXPORT_SYMBOL vmlinux 0xdd0a2ba2	strlcat
+EXPORT_SYMBOL vmlinux 0xdd0b1520	skb_insert
+EXPORT_SYMBOL vmlinux 0xdd27fa87	memchr
+EXPORT_SYMBOL vmlinux 0xdd4faa00	udp_proc_unregister
+EXPORT_SYMBOL vmlinux 0xdd646e1d	mdiobus_read
+EXPORT_SYMBOL vmlinux 0xdd6baf77	rtas
+EXPORT_SYMBOL vmlinux 0xdd6bfccd	radix_tree_tag_set
+EXPORT_SYMBOL vmlinux 0xdd74aab2	xfrm_find_acq
+EXPORT_SYMBOL vmlinux 0xdd87a39a	__nla_reserve
+EXPORT_SYMBOL vmlinux 0xdd8be9b8	filp_open
+EXPORT_SYMBOL vmlinux 0xddd78aca	__scm_destroy
+EXPORT_SYMBOL vmlinux 0xddd99979	i2c_use_client
+EXPORT_SYMBOL vmlinux 0xdddf0f8b	udp_proc_register
+EXPORT_SYMBOL vmlinux 0xddfff4a2	pci_vpd_truncate
+EXPORT_SYMBOL vmlinux 0xde31b902	blk_limits_io_opt
+EXPORT_SYMBOL vmlinux 0xde3c68a6	cpu_online_mask
+EXPORT_SYMBOL vmlinux 0xde405ee6	d_alloc_root
+EXPORT_SYMBOL vmlinux 0xde40ea1a	scsi_bios_ptable
+EXPORT_SYMBOL vmlinux 0xde68659a	drop_super
+EXPORT_SYMBOL vmlinux 0xde75b689	set_irq_type
+EXPORT_SYMBOL vmlinux 0xde9360ba	totalram_pages
+EXPORT_SYMBOL vmlinux 0xdea6ee56	pci_bus_set_ops
+EXPORT_SYMBOL vmlinux 0xdeb5cd83	scsi_scan_host
+EXPORT_SYMBOL vmlinux 0xdee075ba	gen_pool_free
+EXPORT_SYMBOL vmlinux 0xdeee4352	neigh_event_ns
+EXPORT_SYMBOL vmlinux 0xdef19063	task_nice
+EXPORT_SYMBOL vmlinux 0xdef93507	llc_add_pack
+EXPORT_SYMBOL vmlinux 0xdef96b44	matroxfb_vgaHWinit
+EXPORT_SYMBOL vmlinux 0xdf16efc2	vfsmount_lock
+EXPORT_SYMBOL vmlinux 0xdf4c8767	ns_to_timeval
+EXPORT_SYMBOL vmlinux 0xdf501852	journal_destroy
+EXPORT_SYMBOL vmlinux 0xdf554ffd	mem_map
+EXPORT_SYMBOL vmlinux 0xdf5855d4	unregister_cdrom
+EXPORT_SYMBOL vmlinux 0xdf60cc27	__print_symbol
+EXPORT_SYMBOL vmlinux 0xdf929370	fs_overflowgid
+EXPORT_SYMBOL vmlinux 0xdfe21727	nla_put_nohdr
+EXPORT_SYMBOL vmlinux 0xdff43ed4	__debugger
+EXPORT_SYMBOL vmlinux 0xdff56e64	adb_poll
+EXPORT_SYMBOL vmlinux 0xdffcdfa0	per_cpu__ftrace_event_seq
+EXPORT_SYMBOL vmlinux 0xe001e342	abort_creds
+EXPORT_SYMBOL vmlinux 0xe04d94f3	of_parse_phandles_with_args
+EXPORT_SYMBOL vmlinux 0xe0683d57	udp_ioctl
+EXPORT_SYMBOL vmlinux 0xe075d6eb	iter_div_u64_rem
+EXPORT_SYMBOL vmlinux 0xe08e6a4b	__nla_reserve_nohdr
+EXPORT_SYMBOL vmlinux 0xe0a0364b	dev_disable_lro
+EXPORT_SYMBOL vmlinux 0xe0b13336	argv_free
+EXPORT_SYMBOL vmlinux 0xe0b49843	macio_request_resources
+EXPORT_SYMBOL vmlinux 0xe0bc24a1	param_set_ushort
+EXPORT_SYMBOL vmlinux 0xe0bd341a	unregister_qdisc
+EXPORT_SYMBOL vmlinux 0xe0d1b1b3	skb_add_rx_frag
+EXPORT_SYMBOL vmlinux 0xe113bbbc	csum_partial
+EXPORT_SYMBOL vmlinux 0xe11a89f7	dm_table_get_mode
+EXPORT_SYMBOL vmlinux 0xe1725138	rtnl_create_link
+EXPORT_SYMBOL vmlinux 0xe1761617	security_inet_conn_request
+EXPORT_SYMBOL vmlinux 0xe1b4c24e	scsi_block_requests
+EXPORT_SYMBOL vmlinux 0xe1b6cc47	filemap_write_and_wait_range
+EXPORT_SYMBOL vmlinux 0xe1c30f1f	unlock_super
+EXPORT_SYMBOL vmlinux 0xe1ef07fa	get_sb_pseudo
+EXPORT_SYMBOL vmlinux 0xe1f16d9a	pci_unregister_driver
+EXPORT_SYMBOL vmlinux 0xe21abe6e	page_symlink
+EXPORT_SYMBOL vmlinux 0xe2262dbe	inode_setattr
+EXPORT_SYMBOL vmlinux 0xe22f2182	tcf_hash_check
+EXPORT_SYMBOL vmlinux 0xe2304303	mac_map_monitor_sense
+EXPORT_SYMBOL vmlinux 0xe23ae481	blk_iopoll_complete
+EXPORT_SYMBOL vmlinux 0xe24d3a97	jiffies_64
+EXPORT_SYMBOL vmlinux 0xe2a6b912	block_write_full_page_endio
+EXPORT_SYMBOL vmlinux 0xe2b1d1a9	scsi_print_sense
+EXPORT_SYMBOL vmlinux 0xe2d5255a	strcmp
+EXPORT_SYMBOL vmlinux 0xe2e0c7c6	__flush_icache_range
+EXPORT_SYMBOL vmlinux 0xe2e8065e	memdup_user
+EXPORT_SYMBOL vmlinux 0xe2fae716	kmemdup
+EXPORT_SYMBOL vmlinux 0xe2fefeea	dst_release
+EXPORT_SYMBOL vmlinux 0xe32ab573	__tcp_get_md5sig_pool
+EXPORT_SYMBOL vmlinux 0xe36b44e4	key_unlink
+EXPORT_SYMBOL vmlinux 0xe37f4716	pci_bus_size_bridges
+EXPORT_SYMBOL vmlinux 0xe3928a2b	mark_info_dirty
+EXPORT_SYMBOL vmlinux 0xe39f6804	bio_integrity_trim
+EXPORT_SYMBOL vmlinux 0xe3b9fee9	skb_copy
+EXPORT_SYMBOL vmlinux 0xe3ec9e48	__brelse
+EXPORT_SYMBOL vmlinux 0xe3f4d6b3	find_vma
+EXPORT_SYMBOL vmlinux 0xe418aefe	scsi_print_result
+EXPORT_SYMBOL vmlinux 0xe42cf037	ethtool_op_set_tx_csum
+EXPORT_SYMBOL vmlinux 0xe442281b	__splice_from_pipe
+EXPORT_SYMBOL vmlinux 0xe477f86e	get_fs_type
+EXPORT_SYMBOL vmlinux 0xe480e2a3	ps2_cmd_aborted
+EXPORT_SYMBOL vmlinux 0xe484e35f	ioread32
+EXPORT_SYMBOL vmlinux 0xe48bee29	nf_unregister_hooks
+EXPORT_SYMBOL vmlinux 0xe4921dd7	mb_cache_create
+EXPORT_SYMBOL vmlinux 0xe499f968	sock_common_getsockopt
+EXPORT_SYMBOL vmlinux 0xe4b92ec1	jbd2_journal_extend
+EXPORT_SYMBOL vmlinux 0xe4c6c98e	kobject_init
+EXPORT_SYMBOL vmlinux 0xe4c8212f	unregister_sysctl_table
+EXPORT_SYMBOL vmlinux 0xe4e243a1	input_get_keycode
+EXPORT_SYMBOL vmlinux 0xe4f1695e	cookie_check_timestamp
+EXPORT_SYMBOL vmlinux 0xe4f73470	scsi_register_driver
+EXPORT_SYMBOL vmlinux 0xe50610bd	scsi_setup_fs_cmnd
+EXPORT_SYMBOL vmlinux 0xe51ae7ca	security_path_link
+EXPORT_SYMBOL vmlinux 0xe520d352	fasync_helper
+EXPORT_SYMBOL vmlinux 0xe523ad75	synchronize_irq
+EXPORT_SYMBOL vmlinux 0xe524d65b	simple_write_end
+EXPORT_SYMBOL vmlinux 0xe57878a1	in6_pton
+EXPORT_SYMBOL vmlinux 0xe5867808	dlci_ioctl_set
+EXPORT_SYMBOL vmlinux 0xe5c78a99	do_blank_screen
+EXPORT_SYMBOL vmlinux 0xe5d5f184	tty_port_hangup
+EXPORT_SYMBOL vmlinux 0xe5ed5467	xfrm_policy_walk_init
+EXPORT_SYMBOL vmlinux 0xe5fbe600	request_key_async_with_auxdata
+EXPORT_SYMBOL vmlinux 0xe6562614	udplite_table
+EXPORT_SYMBOL vmlinux 0xe67b110e	scsi_device_put
+EXPORT_SYMBOL vmlinux 0xe697d108	__blk_iopoll_complete
+EXPORT_SYMBOL vmlinux 0xe6b4e9b9	input_flush_device
+EXPORT_SYMBOL vmlinux 0xe6dc245a	pci_lost_interrupt
+EXPORT_SYMBOL vmlinux 0xe6dd236d	clear_pages
+EXPORT_SYMBOL vmlinux 0xe6ebc016	key_create_or_update
+EXPORT_SYMBOL vmlinux 0xe6fa0a7a	__elv_add_request
+EXPORT_SYMBOL vmlinux 0xe6fbe430	can_do_mlock
+EXPORT_SYMBOL vmlinux 0xe714375c	__tasklet_hi_schedule_first
+EXPORT_SYMBOL vmlinux 0xe720bb6b	security_path_rmdir
+EXPORT_SYMBOL vmlinux 0xe79bf55b	ide_proc_register_driver
+EXPORT_SYMBOL vmlinux 0xe7a53366	cdev_index
+EXPORT_SYMBOL vmlinux 0xe7ce7439	_memcpy_fromio
+EXPORT_SYMBOL vmlinux 0xe7cebe7f	sock_no_mmap
+EXPORT_SYMBOL vmlinux 0xe7d2aca1	security_sk_classify_flow
+EXPORT_SYMBOL vmlinux 0xe7d31886	of_device_uevent
+EXPORT_SYMBOL vmlinux 0xe7d4daac	seq_list_next
+EXPORT_SYMBOL vmlinux 0xe801b2ee	generic_shutdown_super
+EXPORT_SYMBOL vmlinux 0xe8096027	jbd2_journal_blocks_per_page
+EXPORT_SYMBOL vmlinux 0xe86e5fc1	downgrade_write
+EXPORT_SYMBOL vmlinux 0xe871ef47	dquot_destroy
+EXPORT_SYMBOL vmlinux 0xe87387b1	backlight_device_unregister
+EXPORT_SYMBOL vmlinux 0xe8cd902e	hweight16
+EXPORT_SYMBOL vmlinux 0xe8d356b7	blk_queue_io_opt
+EXPORT_SYMBOL vmlinux 0xe8f6696f	neigh_sysctl_unregister
+EXPORT_SYMBOL vmlinux 0xe90dcae0	__request_module
+EXPORT_SYMBOL vmlinux 0xe914e41e	strcpy
+EXPORT_SYMBOL vmlinux 0xe91aa2fb	scsi_dma_map
+EXPORT_SYMBOL vmlinux 0xe927c727	dma_pool_destroy
+EXPORT_SYMBOL vmlinux 0xe95eee4c	cdrom_get_media_event
+EXPORT_SYMBOL vmlinux 0xe998bee1	scsi_is_sdev_device
+EXPORT_SYMBOL vmlinux 0xe9bd32cf	scsi_allocate_command
+EXPORT_SYMBOL vmlinux 0xe9d85a43	register_console
+EXPORT_SYMBOL vmlinux 0xe9e44bf0	neigh_table_init_no_netlink
+EXPORT_SYMBOL vmlinux 0xea054b22	nla_policy_len
+EXPORT_SYMBOL vmlinux 0xea10212a	int_to_scsilun
+EXPORT_SYMBOL vmlinux 0xea10655a	__bitmap_intersects
+EXPORT_SYMBOL vmlinux 0xea143513	of_get_address
+EXPORT_SYMBOL vmlinux 0xea147363	printk
+EXPORT_SYMBOL vmlinux 0xea2d33a2	radix_tree_gang_lookup_slot
+EXPORT_SYMBOL vmlinux 0xea44e54a	textsearch_find_continuous
+EXPORT_SYMBOL vmlinux 0xea464c86	xfrm_prepare_input
+EXPORT_SYMBOL vmlinux 0xea466ebb	inode_permission
+EXPORT_SYMBOL vmlinux 0xea4f51f5	blk_execute_rq
+EXPORT_SYMBOL vmlinux 0xea624a2f	alloc_fddidev
+EXPORT_SYMBOL vmlinux 0xea74a4d1	ps2_drain
+EXPORT_SYMBOL vmlinux 0xea7987f1	key_update
+EXPORT_SYMBOL vmlinux 0xea858cb5	radix_tree_gang_lookup_tag
+EXPORT_SYMBOL vmlinux 0xeadf5109	journal_check_available_features
+EXPORT_SYMBOL vmlinux 0xeae3466d	user_revoke
+EXPORT_SYMBOL vmlinux 0xeae79dd9	napi_complete
+EXPORT_SYMBOL vmlinux 0xeaf43599	add_disk
+EXPORT_SYMBOL vmlinux 0xeaf48741	tcp_rcv_state_process
+EXPORT_SYMBOL vmlinux 0xeb023cde	input_register_handle
+EXPORT_SYMBOL vmlinux 0xeb167e41	console_stop
+EXPORT_SYMBOL vmlinux 0xeb5292ee	bio_add_pc_page
+EXPORT_SYMBOL vmlinux 0xeb58cd1d	napi_skb_finish
+EXPORT_SYMBOL vmlinux 0xeb5dde97	fddi_type_trans
+EXPORT_SYMBOL vmlinux 0xeb8f54b3	strstrip
+EXPORT_SYMBOL vmlinux 0xeba2a1f7	rtas_indicator_present
+EXPORT_SYMBOL vmlinux 0xebab3bdb	phy_device_free
+EXPORT_SYMBOL vmlinux 0xebb82894	__scsi_put_command
+EXPORT_SYMBOL vmlinux 0xebc65da1	block_invalidatepage
+EXPORT_SYMBOL vmlinux 0xebd273a6	strict_strtoull
+EXPORT_SYMBOL vmlinux 0xebd2c91f	phy_mii_ioctl
+EXPORT_SYMBOL vmlinux 0xec1ef628	sock_wmalloc
+EXPORT_SYMBOL vmlinux 0xec212efe	free_task
+EXPORT_SYMBOL vmlinux 0xec3066ae	__serio_register_driver
+EXPORT_SYMBOL vmlinux 0xec4f14df	__xfrm_lookup
+EXPORT_SYMBOL vmlinux 0xec794ba0	__send_remote_softirq
+EXPORT_SYMBOL vmlinux 0xeca10f28	inet_csk_delete_keepalive_timer
+EXPORT_SYMBOL vmlinux 0xecc7a116	blk_unplug
+EXPORT_SYMBOL vmlinux 0xeccc5894	__lock_buffer
+EXPORT_SYMBOL vmlinux 0xecf38086	cfb_fillrect
+EXPORT_SYMBOL vmlinux 0xecfe9da8	devm_ioport_map
+EXPORT_SYMBOL vmlinux 0xed0ac053	inet_frag_find
+EXPORT_SYMBOL vmlinux 0xed27451e	inode_init_always
+EXPORT_SYMBOL vmlinux 0xed546ccd	set_blocksize
+EXPORT_SYMBOL vmlinux 0xeda0d76e	gen_estimator_active
+EXPORT_SYMBOL vmlinux 0xedbaee5e	nla_strcmp
+EXPORT_SYMBOL vmlinux 0xedc03953	iounmap
+EXPORT_SYMBOL vmlinux 0xedc92842	of_find_device_by_phandle
+EXPORT_SYMBOL vmlinux 0xedd66858	__bio_clone
+EXPORT_SYMBOL vmlinux 0xedf01f0d	nf_hook_slow
+EXPORT_SYMBOL vmlinux 0xedf63a29	i2c_register_driver
+EXPORT_SYMBOL vmlinux 0xee0ea422	__lock_page
+EXPORT_SYMBOL vmlinux 0xee1c240d	clocksource_register
+EXPORT_SYMBOL vmlinux 0xee2d0fc7	_local_bh_enable
+EXPORT_SYMBOL vmlinux 0xee59412f	adb_try_handler_change
+EXPORT_SYMBOL vmlinux 0xee90884e	dq_data_lock
+EXPORT_SYMBOL vmlinux 0xee988e8a	generic_file_splice_write
+EXPORT_SYMBOL vmlinux 0xeea0fd9e	pci_find_next_bus
+EXPORT_SYMBOL vmlinux 0xeea9dbaf	bitmap_bitremap
+EXPORT_SYMBOL vmlinux 0xeeabb567	mntput_no_expire
+EXPORT_SYMBOL vmlinux 0xeebcfe62	bio_pair_release
+EXPORT_SYMBOL vmlinux 0xeee62224	dget_locked
+EXPORT_SYMBOL vmlinux 0xeef4e25a	framebuffer_release
+EXPORT_SYMBOL vmlinux 0xef19bcb5	tcp_sync_mss
+EXPORT_SYMBOL vmlinux 0xef267a5d	invalidate_partition
+EXPORT_SYMBOL vmlinux 0xef488876	tcp_v4_syn_recv_sock
+EXPORT_SYMBOL vmlinux 0xef5c06c0	scsi_register_interface
+EXPORT_SYMBOL vmlinux 0xef5e9017	kernel_recvmsg
+EXPORT_SYMBOL vmlinux 0xef6ed1ba	param_set_invbool
+EXPORT_SYMBOL vmlinux 0xef722c79	da903x_query_status
+EXPORT_SYMBOL vmlinux 0xef77bfc2	pcibios_fixup_bus
+EXPORT_SYMBOL vmlinux 0xef9e345f	invalidate_inode_buffers
+EXPORT_SYMBOL vmlinux 0xef9eadfb	inet_listen
+EXPORT_SYMBOL vmlinux 0xefba3a2a	dma_pool_create
+EXPORT_SYMBOL vmlinux 0xefd1af04	mb_cache_entry_release
+EXPORT_SYMBOL vmlinux 0xefd44ee4	xfrm_policy_flush
+EXPORT_SYMBOL vmlinux 0xefd62b6c	scsi_get_device_flags_keyed
+EXPORT_SYMBOL vmlinux 0xefdd70ce	security_secid_to_secctx
+EXPORT_SYMBOL vmlinux 0xefde1bbe	flush_dcache_range
+EXPORT_SYMBOL vmlinux 0xefe25e35	i2c_put_adapter
+EXPORT_SYMBOL vmlinux 0xefe3e51a	jbd2_journal_force_commit_nested
+EXPORT_SYMBOL vmlinux 0xf0009fee	put_pages_list
+EXPORT_SYMBOL vmlinux 0xf0075a2e	xfrm_state_update
+EXPORT_SYMBOL vmlinux 0xf01f0e35	blk_integrity_register
+EXPORT_SYMBOL vmlinux 0xf01f36d0	of_mdiobus_register
+EXPORT_SYMBOL vmlinux 0xf03156a8	tty_hung_up_p
+EXPORT_SYMBOL vmlinux 0xf042c688	netif_napi_add
+EXPORT_SYMBOL vmlinux 0xf065f629	ioread16be
+EXPORT_SYMBOL vmlinux 0xf06a137a	zero_fill_bio
+EXPORT_SYMBOL vmlinux 0xf075cf9e	fsync_bdev
+EXPORT_SYMBOL vmlinux 0xf07dff3c	wireless_send_event
+EXPORT_SYMBOL vmlinux 0xf07fb9f1	security_sb_clone_mnt_opts
+EXPORT_SYMBOL vmlinux 0xf08f6f43	phy_attach_direct
+EXPORT_SYMBOL vmlinux 0xf091a0ba	scsi_device_lookup
+EXPORT_SYMBOL vmlinux 0xf0932bbc	blk_register_region
+EXPORT_SYMBOL vmlinux 0xf0a006a2	mdiobus_write
+EXPORT_SYMBOL vmlinux 0xf0ef15b4	list_sort
+EXPORT_SYMBOL vmlinux 0xf0ef6cf4	check_disk_change
+EXPORT_SYMBOL vmlinux 0xf0f1246c	kvasprintf
+EXPORT_SYMBOL vmlinux 0xf0fb5962	blk_peek_request
+EXPORT_SYMBOL vmlinux 0xf10de535	ioread8
+EXPORT_SYMBOL vmlinux 0xf11c5ff2	vga_get
+EXPORT_SYMBOL vmlinux 0xf1364d1c	register_sysctl_paths
+EXPORT_SYMBOL vmlinux 0xf1421ce9	bio_clone
+EXPORT_SYMBOL vmlinux 0xf15e5ccb	__tcf_em_tree_match
+EXPORT_SYMBOL vmlinux 0xf174ed48	acquire_console_sem
+EXPORT_SYMBOL vmlinux 0xf1906a78	framebuffer_alloc
+EXPORT_SYMBOL vmlinux 0xf195c682	fb_invert_cmaps
+EXPORT_SYMBOL vmlinux 0xf1b09d01	xfrm_policy_bysel_ctx
+EXPORT_SYMBOL vmlinux 0xf1b35445	blk_plug_device
+EXPORT_SYMBOL vmlinux 0xf1b5d31e	sock_no_getname
+EXPORT_SYMBOL vmlinux 0xf1d9f8e9	nobh_truncate_page
+EXPORT_SYMBOL vmlinux 0xf1da11a8	__sg_alloc_table
+EXPORT_SYMBOL vmlinux 0xf1db1704	nla_memcpy
+EXPORT_SYMBOL vmlinux 0xf1deabf2	div64_u64
+EXPORT_SYMBOL vmlinux 0xf1e07ed1	kmem_cache_shrink
+EXPORT_SYMBOL vmlinux 0xf1e98c74	avenrun
+EXPORT_SYMBOL vmlinux 0xf206f07a	dev_unicast_unsync
+EXPORT_SYMBOL vmlinux 0xf20dabd8	free_irq
+EXPORT_SYMBOL vmlinux 0xf22b01dd	irq_desc
+EXPORT_SYMBOL vmlinux 0xf22fb223	pci_setup_cardbus
+EXPORT_SYMBOL vmlinux 0xf26ebcf0	nlmsg_notify
+EXPORT_SYMBOL vmlinux 0xf28dcfa8	__ide_dma_bad_drive
+EXPORT_SYMBOL vmlinux 0xf2b96445	set_bh_page
+EXPORT_SYMBOL vmlinux 0xf2e32767	nf_getsockopt
+EXPORT_SYMBOL vmlinux 0xf2f0a506	simple_unlink
+EXPORT_SYMBOL vmlinux 0xf313da4e	sha_transform
+EXPORT_SYMBOL vmlinux 0xf31d1b26	skb_pad
+EXPORT_SYMBOL vmlinux 0xf3341268	__clear_user
+EXPORT_SYMBOL vmlinux 0xf338d4c3	netlink_unregister_notifier
+EXPORT_SYMBOL vmlinux 0xf340eb42	generic_block_bmap
+EXPORT_SYMBOL vmlinux 0xf341a11a	mdiobus_alloc
+EXPORT_SYMBOL vmlinux 0xf346231f	seq_list_start_head
+EXPORT_SYMBOL vmlinux 0xf35ba9ab	d_lookup
+EXPORT_SYMBOL vmlinux 0xf369ceea	kmem_cache_size
+EXPORT_SYMBOL vmlinux 0xf3725ccb	nf_ip_checksum
+EXPORT_SYMBOL vmlinux 0xf3728c83	otg_put_transceiver
+EXPORT_SYMBOL vmlinux 0xf3731efd	skb_free_datagram_locked
+EXPORT_SYMBOL vmlinux 0xf37626ae	xfrm_unregister_type
+EXPORT_SYMBOL vmlinux 0xf397b9aa	__tasklet_schedule
+EXPORT_SYMBOL vmlinux 0xf39bf4d9	put_cmsg
+EXPORT_SYMBOL vmlinux 0xf3a55a36	scsi_scan_target
+EXPORT_SYMBOL vmlinux 0xf3bf0bce	__bitmap_complement
+EXPORT_SYMBOL vmlinux 0xf3cc8b18	rtas_data_buf_lock
+EXPORT_SYMBOL vmlinux 0xf3cf2812	__put_cred
+EXPORT_SYMBOL vmlinux 0xf3d60b39	vfs_quota_on_mount
+EXPORT_SYMBOL vmlinux 0xf3e084ce	lock_super
+EXPORT_SYMBOL vmlinux 0xf441ac43	ioread8_rep
+EXPORT_SYMBOL vmlinux 0xf4449388	timer_interrupt
+EXPORT_SYMBOL vmlinux 0xf4714a67	ide_wait_stat
+EXPORT_SYMBOL vmlinux 0xf47c1577	scsi_cmd_print_sense_hdr
+EXPORT_SYMBOL vmlinux 0xf48bd0cb	kmem_ptr_validate
+EXPORT_SYMBOL vmlinux 0xf492af33	sg_miter_start
+EXPORT_SYMBOL vmlinux 0xf4a752e0	rtnl_set_sk_err
+EXPORT_SYMBOL vmlinux 0xf4b162a3	fb_blank
+EXPORT_SYMBOL vmlinux 0xf4b65283	qdisc_class_hash_grow
+EXPORT_SYMBOL vmlinux 0xf4d51f35	udplite_prot
+EXPORT_SYMBOL vmlinux 0xf4e3383e	skb_copy_and_csum_bits
+EXPORT_SYMBOL vmlinux 0xf4f14de6	rtnl_trylock
+EXPORT_SYMBOL vmlinux 0xf4f52f93	dqstats
+EXPORT_SYMBOL vmlinux 0xf51c639f	interruptible_sleep_on_timeout
+EXPORT_SYMBOL vmlinux 0xf52321e0	atomic64_sub
+EXPORT_SYMBOL vmlinux 0xf53d4c26	qdisc_class_hash_destroy
+EXPORT_SYMBOL vmlinux 0xf5490cd5	__break_lease
+EXPORT_SYMBOL vmlinux 0xf54d61c2	blk_end_request_cur
+EXPORT_SYMBOL vmlinux 0xf58518c9	qdisc_watchdog_schedule
+EXPORT_SYMBOL vmlinux 0xf5a62ecc	_memset_io
+EXPORT_SYMBOL vmlinux 0xf5b3b32c	page_follow_link_light
+EXPORT_SYMBOL vmlinux 0xf5c05914	generic_segment_checks
+EXPORT_SYMBOL vmlinux 0xf5c9012e	timespec_trunc
+EXPORT_SYMBOL vmlinux 0xf5ccdffd	blk_stack_limits
+EXPORT_SYMBOL vmlinux 0xf5e1558d	crash_shutdown_unregister
+EXPORT_SYMBOL vmlinux 0xf5eb86ea	blk_verify_command
+EXPORT_SYMBOL vmlinux 0xf5f8434e	inet_csk_init_xmit_timers
+EXPORT_SYMBOL vmlinux 0xf6207c8c	vm_map_ram
+EXPORT_SYMBOL vmlinux 0xf6383663	netif_receive_skb
+EXPORT_SYMBOL vmlinux 0xf65789e0	tcp_shutdown
+EXPORT_SYMBOL vmlinux 0xf66702f1	blk_rq_unmap_user
+EXPORT_SYMBOL vmlinux 0xf68214c9	key_revoke
+EXPORT_SYMBOL vmlinux 0xf6bb4729	color_table
+EXPORT_SYMBOL vmlinux 0xf6da7f13	pci_enable_bridges
+EXPORT_SYMBOL vmlinux 0xf6ebc03b	net_ratelimit
+EXPORT_SYMBOL vmlinux 0xf70384d7	__debugger_sstep
+EXPORT_SYMBOL vmlinux 0xf71521ba	atomic64_add_return
+EXPORT_SYMBOL vmlinux 0xf7231ed7	revert_creds
+EXPORT_SYMBOL vmlinux 0xf72d33a8	find_inode_number
+EXPORT_SYMBOL vmlinux 0xf7448af0	register_netdev
+EXPORT_SYMBOL vmlinux 0xf74bc4f8	blk_init_tags
+EXPORT_SYMBOL vmlinux 0xf7584a9c	find_font
+EXPORT_SYMBOL vmlinux 0xf75c6be7	request_key_async
+EXPORT_SYMBOL vmlinux 0xf7623914	radix_tree_tag_clear
+EXPORT_SYMBOL vmlinux 0xf7775de8	deactivate_super
+EXPORT_SYMBOL vmlinux 0xf77fbb46	idr_remove_all
+EXPORT_SYMBOL vmlinux 0xf78d04ab	netlink_register_notifier
+EXPORT_SYMBOL vmlinux 0xf7a6baef	vfs_set_dqblk
+EXPORT_SYMBOL vmlinux 0xf7fa9345	scsi_prep_fn
+EXPORT_SYMBOL vmlinux 0xf7fe2be2	default_file_splice_read
+EXPORT_SYMBOL vmlinux 0xf80c1f42	input_event
+EXPORT_SYMBOL vmlinux 0xf811e69d	scsi_eh_flush_done_q
+EXPORT_SYMBOL vmlinux 0xf82abc1d	isa_dma_bridge_buggy
+EXPORT_SYMBOL vmlinux 0xf8371f88	i2c_verify_client
+EXPORT_SYMBOL vmlinux 0xf8408e56	tcp_init_xmit_timers
+EXPORT_SYMBOL vmlinux 0xf85a1eac	vfs_statfs
+EXPORT_SYMBOL vmlinux 0xf8677eef	kset_unregister
+EXPORT_SYMBOL vmlinux 0xf8a9dc6c	vfs_link
+EXPORT_SYMBOL vmlinux 0xf8b43164	sock_no_setsockopt
+EXPORT_SYMBOL vmlinux 0xf8e2d465	scsi_prep_return
+EXPORT_SYMBOL vmlinux 0xf8f3c69d	phy_device_create
+EXPORT_SYMBOL vmlinux 0xf8fb0f08	vc_resize
+EXPORT_SYMBOL vmlinux 0xf9694d59	__task_pid_nr_ns
+EXPORT_SYMBOL vmlinux 0xf984c8d3	tty_pair_get_tty
+EXPORT_SYMBOL vmlinux 0xf9a482f9	msleep
+EXPORT_SYMBOL vmlinux 0xf9b28bac	interruptible_sleep_on
+EXPORT_SYMBOL vmlinux 0xf9ea9d36	do_mmap_pgoff
+EXPORT_SYMBOL vmlinux 0xf9ec28e9	insert_inode_locked4
+EXPORT_SYMBOL vmlinux 0xf9f65b70	pci_request_region
+EXPORT_SYMBOL vmlinux 0xfa0966c5	kill_block_super
+EXPORT_SYMBOL vmlinux 0xfa4299b3	kernel_sock_shutdown
+EXPORT_SYMBOL vmlinux 0xfa9af191	kernel_sock_ioctl
+EXPORT_SYMBOL vmlinux 0xfa9dd504	timecompare_transform
+EXPORT_SYMBOL vmlinux 0xfaa37c3d	of_get_pci_address
+EXPORT_SYMBOL vmlinux 0xfab8917e	jbd2_journal_get_create_access
+EXPORT_SYMBOL vmlinux 0xfad223dd	i8042_check_port_owner
+EXPORT_SYMBOL vmlinux 0xfadb5750	pmu_unlock
+EXPORT_SYMBOL vmlinux 0xfaf52868	napi_gro_receive
+EXPORT_SYMBOL vmlinux 0xfaf98462	bitrev32
+EXPORT_SYMBOL vmlinux 0xfb020478	jbd2_journal_clear_features
+EXPORT_SYMBOL vmlinux 0xfb0cf2e9	touch_all_softlockup_watchdogs
+EXPORT_SYMBOL vmlinux 0xfb145ce4	mark_buffer_dirty_inode
+EXPORT_SYMBOL vmlinux 0xfb22b5e8	neigh_update
+EXPORT_SYMBOL vmlinux 0xfb326a5d	down
+EXPORT_SYMBOL vmlinux 0xfb569912	sock_register
+EXPORT_SYMBOL vmlinux 0xfb58121b	__init_waitqueue_head
+EXPORT_SYMBOL vmlinux 0xfb6af58d	recalc_sigpending
+EXPORT_SYMBOL vmlinux 0xfb780b71	generic_show_options
+EXPORT_SYMBOL vmlinux 0xfb8c61ad	module_put
+EXPORT_SYMBOL vmlinux 0xfbe27a1c	rb_first
+EXPORT_SYMBOL vmlinux 0xfbe82d4e	sk_reset_timer
+EXPORT_SYMBOL vmlinux 0xfbfc278e	ethtool_op_get_link
+EXPORT_SYMBOL vmlinux 0xfc026569	call_usermodehelper_setcleanup
+EXPORT_SYMBOL vmlinux 0xfc02b7ad	sysctl_tcp_wmem
+EXPORT_SYMBOL vmlinux 0xfc28a676	phy_ethtool_sset
+EXPORT_SYMBOL vmlinux 0xfc39e32f	ioport_unmap
+EXPORT_SYMBOL vmlinux 0xfc533f85	schedule_work_on
+EXPORT_SYMBOL vmlinux 0xfc6f72a9	skb_dequeue_tail
+EXPORT_SYMBOL vmlinux 0xfc76e94f	ip4_datagram_connect
+EXPORT_SYMBOL vmlinux 0xfc97ef21	find_or_create_page
+EXPORT_SYMBOL vmlinux 0xfcaa04a0	out_of_line_wait_on_bit_lock
+EXPORT_SYMBOL vmlinux 0xfcc2a43c	utf32_to_utf8
+EXPORT_SYMBOL vmlinux 0xfcda63a3	node_states
+EXPORT_SYMBOL vmlinux 0xfcec0987	enable_irq
+EXPORT_SYMBOL vmlinux 0xfcf6481e	tcp_proc_unregister
+EXPORT_SYMBOL vmlinux 0xfcfa03ff	fb_videomode_to_modelist
+EXPORT_SYMBOL vmlinux 0xfd0c5038	adb_unregister
+EXPORT_SYMBOL vmlinux 0xfd4c3171	of_find_all_nodes
+EXPORT_SYMBOL vmlinux 0xfd717005	redirty_page_for_writepage
+EXPORT_SYMBOL vmlinux 0xfd8b3fce	cdev_init
+EXPORT_SYMBOL vmlinux 0xfd8dba4c	add_wait_queue
+EXPORT_SYMBOL vmlinux 0xfda85a7d	request_threaded_irq
+EXPORT_SYMBOL vmlinux 0xfdb9b629	ioread32be
+EXPORT_SYMBOL vmlinux 0xfdc06c44	genphy_config_advert
+EXPORT_SYMBOL vmlinux 0xfdccc3bb	switch_mmu_context
+EXPORT_SYMBOL vmlinux 0xfdd495eb	new_inode
+EXPORT_SYMBOL vmlinux 0xfddd8175	matrox_mystique
+EXPORT_SYMBOL vmlinux 0xfded48ed	enable_kernel_fp
+EXPORT_SYMBOL vmlinux 0xfdfc0b3b	fiemap_fill_next_extent
+EXPORT_SYMBOL vmlinux 0xfe16775f	idr_destroy
+EXPORT_SYMBOL vmlinux 0xfe331dbd	journal_force_commit_nested
+EXPORT_SYMBOL vmlinux 0xfe5d4bb2	sys_tz
+EXPORT_SYMBOL vmlinux 0xfe6eb9c2	mdio_bus_type
+EXPORT_SYMBOL vmlinux 0xfe769456	unregister_netdevice_notifier
+EXPORT_SYMBOL vmlinux 0xfe801711	macio_release_resources
+EXPORT_SYMBOL vmlinux 0xfec3c2f2	bcd2bin
+EXPORT_SYMBOL vmlinux 0xfedd35fc	console_suspend_enabled
+EXPORT_SYMBOL vmlinux 0xfee169d7	tty_vhangup
+EXPORT_SYMBOL vmlinux 0xfef96e23	__scsi_print_command
+EXPORT_SYMBOL vmlinux 0xff1765c7	rtas_call
+EXPORT_SYMBOL vmlinux 0xff1e9dd8	seq_list_start
+EXPORT_SYMBOL vmlinux 0xff303f79	blk_queue_update_dma_pad
+EXPORT_SYMBOL vmlinux 0xff464720	fb_set_suspend
+EXPORT_SYMBOL vmlinux 0xff4de198	disk_stack_limits
+EXPORT_SYMBOL vmlinux 0xff533ca7	tty_pair_get_pty
+EXPORT_SYMBOL vmlinux 0xff615f93	phy_start_aneg
+EXPORT_SYMBOL vmlinux 0xff6878cf	fb_default_cmap
+EXPORT_SYMBOL vmlinux 0xff7e6a98	blk_queue_logical_block_size
+EXPORT_SYMBOL vmlinux 0xff7efa9e	__insert_inode_hash
+EXPORT_SYMBOL vmlinux 0xff8c936e	serio_rescan
+EXPORT_SYMBOL vmlinux 0xff8e1f55	check_media_bay
+EXPORT_SYMBOL vmlinux 0xff964b25	param_set_int
+EXPORT_SYMBOL vmlinux 0xff9ca065	fb_edid_to_monspecs
+EXPORT_SYMBOL vmlinux 0xff9f1499	inet_frag_evictor
+EXPORT_SYMBOL vmlinux 0xffc9038c	security_inode_init_security
+EXPORT_SYMBOL vmlinux 0xffd5a395	default_wake_function
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x0cc1e40f	crypto_it_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x24aac4d9	crypto_aes_expand_key
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x3dc916b6	crypto_fl_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x40d46b21	crypto_ft_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x71dc9998	crypto_il_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0xef15d112	crypto_aes_set_key
+EXPORT_SYMBOL_GPL crypto/async_tx/async_memcpy 0x648d500e	async_memcpy
+EXPORT_SYMBOL_GPL crypto/async_tx/async_pq 0x843df4c1	async_syndrome_val
+EXPORT_SYMBOL_GPL crypto/async_tx/async_pq 0xb27b224d	async_gen_syndrome
+EXPORT_SYMBOL_GPL crypto/async_tx/async_raid6_recov 0x561e95c3	async_raid6_datap_recov
+EXPORT_SYMBOL_GPL crypto/async_tx/async_raid6_recov 0x9aa4e7eb	async_raid6_2data_recov
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x3a82657e	async_tx_quiesce
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x80b50c81	async_tx_submit
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0xfa946c99	async_trigger_callback
+EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0x3b770fd6	async_xor_val
+EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0x90ff27a1	async_xor
+EXPORT_SYMBOL_GPL crypto/cryptd 0x08da54de	cryptd_ablkcipher_child
+EXPORT_SYMBOL_GPL crypto/cryptd 0x5cd512a3	cryptd_alloc_ahash
+EXPORT_SYMBOL_GPL crypto/cryptd 0x60f9cd5a	cryptd_shash_desc
+EXPORT_SYMBOL_GPL crypto/cryptd 0x89b9ddb2	cryptd_ahash_child
+EXPORT_SYMBOL_GPL crypto/cryptd 0xab2af326	cryptd_alloc_ablkcipher
+EXPORT_SYMBOL_GPL crypto/cryptd 0xcc6b67c3	cryptd_free_ablkcipher
+EXPORT_SYMBOL_GPL crypto/cryptd 0xe80663c6	cryptd_free_ahash
+EXPORT_SYMBOL_GPL crypto/des_generic 0xcfd9a2c0	des_ekey
+EXPORT_SYMBOL_GPL crypto/twofish_common 0x1a3efe17	twofish_setkey
+EXPORT_SYMBOL_GPL drivers/ata/pata_platform 0x8a0c63d2	__pata_platform_probe
+EXPORT_SYMBOL_GPL drivers/ata/pata_platform 0xf9fabcfd	__pata_platform_remove
+EXPORT_SYMBOL_GPL drivers/ata/pata_sis 0x97e76dcf	sis_info133_for_sata
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x14102f23	ks0108_displaystate
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x48a70518	ks0108_writedata
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x4f506333	ks0108_startline
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x6edae968	ks0108_isinited
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xbf4774db	ks0108_writecontrol
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xedde6df2	ks0108_page
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xfee8ef7b	ks0108_address
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0x2003aef3	btmrvl_process_event
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0x313fdba3	btmrvl_interrupt
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0x712be343	btmrvl_check_evtpkt
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0x7e4cb085	btmrvl_send_module_cfg_cmd
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0xc901e832	btmrvl_remove_card
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0xf5a9f476	btmrvl_add_card
+EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0x14fb1e56	agp_remove_bridge
+EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0x5ed6f417	agp_add_bridge
+EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0xd6feefa5	agp_num_entries
+EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0xe089cfcc	agp_memory_reserved
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x011f2622	tpm_show_caps
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x02c7a5a4	tpm_show_temp_deactivated
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x036dc81f	tpm_read
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x063674a3	tpm_show_pubek
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x090db556	tpm_calc_ordinal_duration
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x0b6eac21	tpm_release
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x14237e50	tpm_dev_vendor_release
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x16d90a8f	tpm_show_enabled
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x1b394145	tpm_pm_resume
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x2c6a7d91	tpm_continue_selftest
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x529782bd	tpm_remove_hardware
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x56f38095	tpm_show_caps_1_2
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x589350c1	tpm_get_timeouts
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x659d8df1	tpm_show_active
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x78bb6f62	tpm_show_pcrs
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x9527514c	tpm_show_owned
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xa65fca86	tpm_write
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xadf6aa4d	tpm_pcr_read
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xb5d800c8	tpm_dev_release
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xc37226a5	tpm_pcr_extend
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xd5e7188b	tpm_gen_interrupt
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xd66aaf33	tpm_register_hardware
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xdef4a533	tpm_show_timeouts
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xed5e4fc5	tpm_pm_suspend
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xf2d1f5c7	tpm_store_cancel
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xfeb85626	tpm_open
+EXPORT_SYMBOL_GPL drivers/connector/cn 0xb10d55bc	cn_netlink_send
+EXPORT_SYMBOL_GPL drivers/connector/cn 0xcf7a962e	cn_add_callback
+EXPORT_SYMBOL_GPL drivers/connector/cn 0xff5a8cfe	cn_del_callback
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x00e63d7a	edac_device_alloc_ctl_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x075159f2	edac_pci_create_generic_ctl
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x0c32ff8a	edac_pci_alloc_index
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x1128741e	edac_device_add_device
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x287948f7	edac_mc_add_mc
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x2e1427b2	edac_mc_handle_ue_no_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x2f8ece49	edac_mc_free
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x393d5079	edac_device_handle_ce
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x3b5bb6e7	edac_mc_handle_ce_no_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x4261bef8	edac_mc_del_mc
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x58481c03	edac_pci_del_device
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x6e3ff83a	edac_device_alloc_index
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x7a5604b3	edac_pci_handle_npe
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x96243891	edac_mc_handle_ce
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xafd544b8	edac_pci_release_generic_ctl
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xb93de211	edac_pci_reset_delay_period
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xbb67dfc6	edac_device_free_ctl_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xbc636ad5	edac_mc_handle_ue
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xbde62564	edac_device_handle_ue
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xc262562b	edac_pci_add_device
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xc6e0169e	edac_mc_alloc
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xd918dbff	edac_pci_alloc_ctl_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xe991ac70	edac_mc_find_csrow_by_page
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xed375b05	edac_pci_free_ctl_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xf1ece1e5	edac_pci_handle_pe
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xf90d716c	edac_device_del_device
+EXPORT_SYMBOL_GPL drivers/gpu/drm/drm 0x1a323c3a	drm_class_device_unregister
+EXPORT_SYMBOL_GPL drivers/gpu/drm/drm 0xbf9337de	drm_class_device_register
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x05495392	hid_debug
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x078c2b9a	hid_dump_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x0bf61f6a	hidraw_report_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x0d881d68	hidinput_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x15294e19	hid_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x15410855	hid_report_raw_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x17129043	hid_debug_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x23379535	hidraw_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x2ef20d5a	hid_allocate_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x37759034	hid_dump_input
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x397a110a	hidinput_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x3d68c239	hid_dump_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x43046d36	hid_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x46a0c0fc	hid_destroy_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x4a137503	hidinput_find_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x554df005	hid_unregister_driver
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x83ced666	__hid_register_driver
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x967c0049	hidinput_report_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xa2c3e2db	hid_parse_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xdf9872d7	hid_add_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xe1c44747	hid_output_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xe2510fab	hid_set_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xe6c12872	hid_resolv_usage
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xe86d19f3	hidraw_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xf99b5fc0	hid_check_keys_pressed
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xfcaadfac	hid_input_report
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x01fd453e	usbhid_lookup_quirk
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x038f4bbf	usbhid_set_leds
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x9f2cb592	usbhid_submit_report
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0xbdfb3e40	hiddev_hid_event
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x4d038774	lis3lv02d_poweron
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x6c33e494	lis3lv02d_joystick_disable
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x70145ff3	lis3lv02d_poweroff
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x7ed5abd0	lis3lv02d_remove_fs
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x84422d89	lis3lv02d_init_device
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xa23b2873	lis3_dev
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xe6af28c8	lis3lv02d_joystick_enable
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0x2ed3379d	hpsb_config_rom_ip1394_remove
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0xd72c9a2a	hpsb_config_rom_ip1394_add
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0xec8d18cf	hpsb_disable_irm
+EXPORT_SYMBOL_GPL drivers/input/ff-memless 0x5da989d7	input_ff_create_memless
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x07f17275	wm97xx_read_aux_adc
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x0a92a63f	wm97xx_reg_write
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x1849722f	wm97xx_set_suspend_mode
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x3a68ee0f	wm97xx_config_gpio
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x632d1120	wm9713_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x73fafc20	wm97xx_unregister_mach_ops
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x8585c47d	wm97xx_set_gpio
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x8c6d122e	wm97xx_get_gpio
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xaf8711be	wm9712_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xb2390ce4	wm9705_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xbadc0b21	wm97xx_reg_read
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xe42d53d5	wm97xx_register_mach_ops
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0x0a943139	wf_get_sensor
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0x2828339e	wf_find_sensor
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0x49197a66	wf_unregister_control
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0x4fe5ed9f	wf_register_control
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0x5d441521	wf_put_control
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0x5fd22824	wf_find_control
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0x75147afa	wf_set_overtemp
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0x94765fac	wf_critical_overtemp
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0x9cedd4f2	wf_unregister_sensor
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0xa2f19a49	wf_is_overtemp
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0xa7c5a23a	wf_register_sensor
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0xaf15726f	wf_unregister_client
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0xbf19b2e6	wf_get_control
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0xca874c31	wf_put_sensor
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0xdb7e8499	wf_register_client
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0xed82a14f	wf_clear_overtemp
+EXPORT_SYMBOL_GPL drivers/md/dm-multipath 0x85c47b1d	dm_register_path_selector
+EXPORT_SYMBOL_GPL drivers/md/dm-multipath 0xad1db33d	dm_unregister_path_selector
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x31ccd1f2	dm_rh_get_region_key
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x3b9d4cfe	dm_rh_dec
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x3bbf5d21	dm_rh_region_context
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x3f16d7c9	dm_rh_get_region_size
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x3f657039	dm_rh_stop_recovery
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x553cea6b	dm_rh_delay
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x5bfa26ee	dm_rh_region_to_sector
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x75848546	dm_rh_recovery_end
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x788ccc99	dm_region_hash_create
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x7ad67eb8	dm_rh_dirty_log
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x83f4e09f	dm_region_hash_destroy
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x939dc85b	dm_rh_recovery_start
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x9eb3e8fc	dm_rh_start_recovery
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xb8e6e936	dm_rh_bio_to_region
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xb98d6370	dm_rh_recovery_prepare
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xc67dce2b	dm_rh_recovery_in_flight
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xcf8d9aec	dm_rh_update_states
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xd0cb451e	dm_rh_inc_pending
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xe0a48211	dm_rh_flush
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xe63d50c4	dm_rh_mark_nosync
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xfade4730	dm_rh_get_state
+EXPORT_SYMBOL_GPL drivers/md/md-mod 0x0dba34f1	sync_page_io
+EXPORT_SYMBOL_GPL drivers/md/md-mod 0x936d1c05	md_allow_write
+EXPORT_SYMBOL_GPL drivers/md/md-mod 0xa86d191f	md_do_sync
+EXPORT_SYMBOL_GPL drivers/md/md-mod 0xf6ab7f87	md_new_event
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0x05513b71	raid6_call
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0x0b8ef590	raid6_2data_recov
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0x4a48d81c	raid6_datap_recov
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x0349c9bd	ir_codes_proteus_2309_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x0366dcdf	ir_codes_videomate_s350_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x110b053a	ir_codes_pixelview_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x124cb753	ir_codes_encore_enltv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x183fdfdd	ir_codes_gotview7135_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x19b4d61c	ir_codes_nebula_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x19cd2826	ir_codes_behold_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x1a9009d6	ir_codes_dm1105_nec_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x1cb148f5	ir_extract_bits
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x1f20b693	ir_input_init
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2456e513	ir_decode_pulsedistance
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2cc459b5	ir_codes_flydvb_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2d0e9a49	ir_codes_em_terratec_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2f922f5b	ir_input_keydown
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3136d8ff	ir_codes_dntv_live_dvbt_pro_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x32b9033b	ir_codes_apac_viewcomp_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3909f4ad	ir_codes_terratec_cinergy_xs_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3a84be27	ir_codes_avermedia_a16d_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x4267d749	ir_codes_budget_ci_old_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x43c89ef4	ir_decode_biphase
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x4c1442c1	ir_codes_real_audio_220_32_keys_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x51ba1643	ir_codes_kworld_plus_tv_analog_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x543db4ff	ir_codes_avermedia_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x5e95da31	ir_codes_tt_1500_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x5fbe6515	ir_codes_pinnacle_color_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x61d039d7	ir_codes_behold_columbus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6427a3fb	ir_codes_pinnacle_grey_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x64b02fed	ir_codes_avermedia_dvbt_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6606596a	ir_rc5_timer_keyup
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6809de82	ir_codes_pctv_sedna_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6d6511e7	ir_dump_samples
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x703fc738	ir_codes_avertv_303_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x7283f81d	ir_codes_purpletv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x72c2992e	ir_codes_powercolor_real_angel_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x76d71b8e	ir_codes_dntv_live_dvb_t_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x784e176d	ir_codes_asus_pc39_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x7b6fb0b2	ir_input_nokey
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x828b3ce5	ir_codes_encore_enltv_fm53_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x8acae3dd	ir_codes_pinnacle_pctv_hd_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x92d1d181	ir_codes_flyvideo_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x94651dab	ir_codes_ati_tv_wonder_hd_600_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x97c35dab	ir_codes_msi_tvanywhere_plus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x9944e2e5	ir_codes_hauppauge_new_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xa69aa6ad	ir_codes_pv951_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xa95157c5	ir_codes_cinergy_1400_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xac15f6c8	ir_codes_kaiomy_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xaff22e87	ir_codes_pixelview_new_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb01a1998	ir_codes_manli_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb0a8ef38	ir_codes_rc5_tv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb57445f7	ir_codes_eztv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb5adb754	ir_codes_cinergy_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xbd3ce6f0	ir_codes_avermedia_cardbus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xbeaccbdc	ir_codes_gadmei_rm008z_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xcba36c62	ir_codes_videomate_tv_pvr_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xd30c491f	ir_codes_norwood_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xdc23fec4	ir_codes_fusionhdtv_mce_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xdd4c0a07	ir_codes_evga_indtube_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xe1101f4d	ir_codes_avermedia_m135a_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xe4140c60	ir_codes_genius_tvgo_a11mce_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xeb9bb08f	ir_codes_npgtech_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xebf345b4	ir_codes_encore_enltv2_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xeec89db8	ir_codes_empty_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xef29c40d	ir_codes_adstech_dvb_t_pci_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf33c155d	ir_codes_msi_tvanywhere_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf3d619ec	ir_codes_iodata_bctv7e_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf4f7a4d6	ir_rc5_timer_end
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf5e15e65	ir_codes_winfast_table
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x155ff8e5	saa7146_register_extension
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x4dce3724	saa7146_vfree_destroy_pgtable
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x5ed9f682	saa7146_setgpio
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x63733ba9	saa7146_i2c_adapter_prepare
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x7ef68416	saa7146_devices_lock
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x84eb66a0	saa7146_pgtable_alloc
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x9ad3c9b5	saa7146_unregister_extension
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xcf683cf2	saa7146_devices
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xdcc5a415	saa7146_pgtable_build_single
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xdd567ac9	saa7146_vmalloc_build_pgtable
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xdf698cab	saa7146_wait_for_debi_done
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xe3cd9b5c	saa7146_debug
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xe65105cf	saa7146_pgtable_free
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x0d38c03f	saa7146_start_preview
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x160d6891	saa7146_vv_release
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x211cdc8c	saa7146_set_hps_source_and_sync
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x6129aa5e	saa7146_vv_init
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x758c02a5	saa7146_register_device
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x9c91e143	saa7146_unregister_device
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xedfbe3c5	saa7146_stop_preview
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/mt20xx 0x225d98fa	microtune_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/mxl5007t 0xed9e5adc	mxl5007t_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda18271 0x13588659	tda18271_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda827x 0x3408922e	tda827x_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda8290 0x2c6def9a	tda829x_probe
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda8290 0xbe8b3473	tda829x_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda9887 0x4189823c	tda9887_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5761 0x65fd93d7	tea5761_autodetection
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5761 0xe8748f43	tea5761_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5767 0xa7e6399a	tea5767_autodetection
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5767 0xd23c71e9	tea5767_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tuner-simple 0x0f3e0048	simple_tuner_attach
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x1ba3905f	smscore_getbuffer
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x21e36bf2	smscore_registry_getmode
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x2dbfba7e	smscore_unregister_hotplug
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x34c0536f	smscore_unregister_client
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x37d91069	smsendian_handle_tx_message
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x39a315bc	smsclient_sendrequest
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x3f3881fb	sms_board_event
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x45284ae9	smsendian_handle_rx_message
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x45ee7e02	smscore_putbuffer
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x67b6820f	smscore_unregister_device
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x71524d3a	sms_board_setup
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x74ee9098	sms_board_load_modules
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x7c576277	smsendian_handle_message_header
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x7d047c47	smscore_get_board_id
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x9356030f	smscore_onresponse
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xb1ddd8f8	sms_board_led_feedback
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xb9fa2efb	smscore_start_device
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xc906ac75	smscore_register_client
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xc9476d5d	smscore_register_hotplug
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xd2785d41	smscore_register_device
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xd351948a	sms_board_lna_control
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xe2391009	smscore_set_board_id
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xf0ef7d6e	smscore_get_device_mode
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xfda878c5	sms_get_board
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xfed7c59a	sms_board_power
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x017ea7c7	cx231xx_tuner_callback
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x2a657c8f	cx231xx_set_mode
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x32f7d8fa	cx231xx_dev_uninit
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x376908af	cx231xx_send_gpio_cmd
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x3ef61cb3	cx231xx_set_alt_setting
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x71b5be40	cx231xx_send_usb_command
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x83f7dc08	cx231xx_uninit_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x926905d3	cx231xx_dev_init
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x9db1d8a4	cx231xx_init_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xb1ddafbb	cx231xx_uninit_vbi_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xcc621488	cx231xx_capture_start
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xdd5341f9	cx231xx_init_vbi_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx88/cx88xx 0x48965359	cx88_setup_xc3028
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x08647554	em28xx_set_mode
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x34d7d083	em28xx_audio_analog_set
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x351e3cec	em28xx_isoc_dvb_max_packetsize
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x7fc8652c	em28xx_tuner_callback
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0xa17917ab	em28xx_audio_setup
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0xb19f549d	em28xx_init_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0xcf83e7f4	em28xx_uninit_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x872b7423	saa7134_ts_qops
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x9273e4e5	saa7134_s_std_internal
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0xa096cf74	saa7134_s_ctrl_internal
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0xc14e343d	saa7134_g_ctrl_internal
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0xe4a3ca16	saa7134_queryctrl
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x0e4faee3	v4l2_i2c_new_subdev_cfg
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x49c2cc82	v4l2_i2c_subdev_init
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x6e4cfbfd	v4l2_i2c_new_subdev_board
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xa6e2362f	v4l2_i2c_subdev_addr
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xf2a353ac	v4l2_i2c_tuner_addrs
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xf5ef842e	v4l_bound_align_image
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x8cfca2cb	v4l2_int_device_register
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xa0b50d06	v4l2_int_ioctl_0
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xa5228b24	v4l2_int_device_try_attach_all
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xa7b55c00	v4l2_int_ioctl_1
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xcf30d721	v4l2_int_device_unregister
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x012a7953	videobuf_mmap_setup
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x15fccadb	videobuf_streamoff
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x212545fe	videobuf_queue_to_vmalloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x38b1edae	videobuf_next_field
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x4ea08728	videobuf_reqbufs
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x504a98c4	videobuf_mmap_free
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x557a461a	videobuf_queue_is_busy
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x5fac245f	videobuf_poll_stream
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x601bae97	videobuf_querybuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x60eb836e	videobuf_alloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x6221a391	videobuf_read_start
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x65c1e1e8	videobuf_dqbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x77a493d0	videobuf_iolock
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x8754bc9b	videobuf_cgmbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xabadfeeb	videobuf_mmap_mapper
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xb70ca905	videobuf_qbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xbc9fc643	videobuf_read_stop
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xc0f98827	videobuf_streamon
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xc48d8e8b	__videobuf_mmap_setup
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xc52df1c9	videobuf_queue_cancel
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xc94c8888	videobuf_stop
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xccdee821	videobuf_read_one
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xe7447943	videobuf_queue_core_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xf19adb09	videobuf_waiton
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xfd386a51	videobuf_read_stream
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x18a92c17	videobuf_dma_unmap
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x44b6701d	videobuf_dma_free
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x50bc2ff4	videobuf_sg_dma_map
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x66f9427d	videobuf_vmalloc_to_sg
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x81a857e2	videobuf_dma_sync
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x96bfbd16	videobuf_dma_init_kernel
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x9b3591be	videobuf_dma_init_user
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xa825c75b	videobuf_sg_alloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xafefe0f1	videobuf_dma_init_overlay
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xbeff7b13	videobuf_sg_dma_unmap
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xda15fa80	videobuf_to_dma
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xe5f6a7b5	videobuf_dma_map
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xf6bbf211	videobuf_queue_sg_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xf6ffa29b	videobuf_dma_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0x2ea732c9	videobuf_queue_vmalloc_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0xc810d3a3	videobuf_to_vmalloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0xf53e5a70	videobuf_vmalloc_free
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x13372270	v4l2_device_register
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x4d04ccbc	v4l2_device_unregister_subdev
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x7a1e0fe0	v4l2_device_unregister
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x7ae620b1	v4l2_device_disconnect
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x86a2ee54	v4l2_device_register_subdev
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0xe2834da7	v4l2_device_set_name
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x1dc31ffa	i2o_dma_free
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x2e8c2c74	i2o_dma_realloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x34578069	i2o_dma_alloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x67651f45	i2o_dma_map_sg
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xb7a89e4b	i2o_dma_map_single
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xcfcb5eb4	i2o_pool_free
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xe9320735	i2o_sg_tablesize
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xf6b63571	i2o_pool_alloc
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x1edd5195	mc13783_adc_set_ts_status
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x2faa5b17	mc13783_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x3cd6abf2	mc13783_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x6bd2edff	mc13783_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x9942d548	mc13783_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0xe7de24aa	mc13783_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0xfd6718a3	mc13783_adc_do_conversion
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-adc 0x29277847	pcf50633_adc_async_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-adc 0x331a6831	pcf50633_adc_sync_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x327bd467	pcf50633_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x5afec406	pcf50633_irq_mask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x5e75aa90	pcf50633_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x658c989f	pcf50633_irq_mask_get
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x6d1dafa1	pcf50633_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x7f4a019f	pcf50633_read_block
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x9d90841d	pcf50633_irq_unmask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xa653a086	pcf50633_write_block
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xdecdb0bd	pcf50633_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xebb78ff3	pcf50633_reg_clear_bits
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xf5707eff	pcf50633_reg_set_bit_mask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x0cbff812	pcf50633_gpio_power_supply_set
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x10667142	pcf50633_gpio_set
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x45112b58	pcf50633_gpio_get
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0xb83d1f84	pcf50633_gpio_invert_set
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0xc79c8e32	pcf50633_gpio_invert_get
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x41c57551	sm501_misc_control
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x44fa7e55	sm501_unit_power
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x6216bddc	sm501_set_clock
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x629fc14c	sm501_find_clock
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0xd7b17b5f	sm501_modify_reg
+EXPORT_SYMBOL_GPL drivers/mfd/ucb1400_core 0x3c562d5d	ucb1400_adc_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x23e5d41c	wm831x_auxadc_read_uv
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x28c7e413	wm831x_bulk_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x7dab26b6	wm831x_isinkv_values
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xa4b1e3f9	wm831x_auxadc_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xad29af60	wm831x_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xafb008d7	wm831x_enable_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xb0e3892b	wm831x_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xbd6141ed	wm831x_request_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xd9a763a6	wm831x_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xf6ca5d5a	wm831x_reg_unlock
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xfe2ac5f7	wm831x_disable_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xfe3691e8	wm831x_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xfec8e8ec	wm831x_reg_lock
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x226ce4f9	wm8350_mask_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x24d62342	wm8350_reg_lock
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x2cfc4cf1	wm8350_device_exit
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x3117513b	wm8350_reg_unlock
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x3cad6b36	wm8350_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x5030a36a	wm8350_block_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x5985d749	wm8350_gpio_config
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x6b81bfac	wm8350_read_auxadc
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x751ca285	wm8350_block_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x9693de20	wm8350_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x9934a13d	wm8350_unmask_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xb35d9dde	wm8350_device_init
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xd06f3bb4	wm8350_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xe071a937	wm8350_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xf2ed2565	wm8350_clear_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xf7b31832	wm8350_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x126b0041	wm8400_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x5cfd633d	wm8400_block_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x60670d68	wm8400_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0xbf9a1798	wm8400_reset_codec_reg_cache
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x56401e5a	cb710_set_irq_handler
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0xac27080f	cb710_sg_dwiter_write_next_block
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0xd07e8e8a	cb710_sg_dwiter_read_next_block
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0xfe9c1de6	cb710_pci_update_config_reg
+EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x2df115d4	eeprom_93cx6_multiread
+EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x63d14d2f	eeprom_93cx6_read
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x1c12a206	sdio_release_irq
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x2053a173	sdio_readsb
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x244993dd	sdio_disable_func
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x332ec390	sdio_readl
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x391c7517	sdio_f0_writeb
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x43063a68	sdio_unregister_driver
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x47c7e1fe	sdio_readw
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x5b19e5f9	sdio_align_size
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x78853fc0	sdio_readb
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x895d59e0	sdio_memcpy_toio
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x90b1b289	sdio_f0_readb
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xa326ba5e	sdio_set_block_size
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xa4758cfc	sdio_claim_host
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xb28b1bcf	sdio_writel
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xd0f724be	sdio_register_driver
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xd168a6b7	sdio_claim_irq
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xe102652d	sdio_writew
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xe68c47bb	sdio_memcpy_fromio
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xea6406a2	sdio_writesb
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xef806b77	sdio_release_host
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xf791e1c5	sdio_enable_func
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xfbd90d53	sdio_writeb
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x383b9c7b	sdhci_suspend_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x67656849	sdhci_resume_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x9aca5425	sdhci_free_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x9ed9eec2	sdhci_remove_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xaada40d9	sdhci_alloc_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xec552e83	sdhci_add_host
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x223c1647	cfi_cmdset_0200
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x5d56feb1	cfi_cmdset_0003
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x744c0512	cfi_cmdset_0001
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0002 0xa4630040	cfi_cmdset_0002
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0020 0xc28f134a	cfi_cmdset_0020
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0xc37744c0	cfi_qry_present
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0xc67c4a00	cfi_qry_mode_off
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0xf1a71877	cfi_qry_mode_on
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2000 0x81e71c97	DoC2k_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001 0x690a06da	DoCMil_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001plus 0x13becb8c	DoCMilPlus_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/docecc 0x45937659	doc_decode_ecc
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x0f977d14	get_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x1f2ca7bc	mtd_erase_callback
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x23f88444	get_sb_mtd
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x480c66d8	kill_mtd_super
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x740fef77	get_mtd_device_nm
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x7a695b13	unregister_mtd_user
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xb086cb89	add_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xb449ed11	mtd_table_mutex
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xbae1311a	register_mtd_parser
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xc2154e28	deregister_mtd_parser
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xcd9a565a	default_mtd_writev
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xd62f6fff	parse_mtd_partitions
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xd838dedb	del_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xe68c2dc6	register_mtd_user
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xf60f8b28	mtd_table
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xfa4049bc	put_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x004027d9	del_mtd_blktrans_dev
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x301e8c55	register_mtd_blktrans
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0xa530e0d6	deregister_mtd_blktrans
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0xfdc8e7ba	add_mtd_blktrans_dev
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x778ec3bb	nand_scan_ident
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x78a528ca	nand_wait_ready
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x9ad9e4a1	nand_release
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xb9dcd257	nand_scan_tail
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xec714479	nand_scan
+EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0x98d1d4f8	onenand_scan
+EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0xc1286702	onenand_release
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x0a51cea9	ubi_leb_erase
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x11c19a11	ubi_do_get_device_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x34f872eb	ubi_is_mapped
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x395a42a0	ubi_close_volume
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x42801d20	ubi_sync
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x46af08e1	ubi_leb_read
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x6f09ba8a	ubi_register_volume_notifier
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x7ec60bcb	ubi_leb_unmap
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x9a02d9f2	ubi_leb_change
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x9ed2b671	ubi_leb_write
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xbc505df4	ubi_get_device_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xc2f7e80a	ubi_leb_map
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xd7506963	ubi_get_volume_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xdf6bbe0b	ubi_open_volume_nm
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xe18f37ac	ubi_open_volume
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xfd6f0ef9	ubi_unregister_volume_notifier
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x11b311ec	can_free_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x13509d07	can_get_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x1d000929	unregister_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x226c6b7e	can_bus_off
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x4988d2c3	can_put_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x6d2f22c0	alloc_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x828ffa6d	open_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xa4933895	free_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xceb63580	close_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xdc5a3d46	register_candev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xbb25cc89	free_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xbb7e06bd	unregister_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xdc9bd500	sja1000_interrupt
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xedf962d7	register_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xf98f9e63	alloc_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x002e04b7	mlx4_pd_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x0421ad29	mlx4_qp_reserve_range
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x04442a99	mlx4_alloc_cmd_mailbox
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x0467ef00	mlx4_register_interface
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x0b9c5cfc	mlx4_mtt_cleanup
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x0c5fa585	mlx4_cq_modify
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x0e0de954	mlx4_CLOSE_PORT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1824f4cf	__mlx4_cmd
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1959b6c1	mlx4_srq_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1a66b892	mlx4_qp_release_range
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1c1ccbc9	mlx4_unregister_interface
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1dadd073	mlx4_fmr_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x20f91f76	mlx4_free_hwq_res
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x2825c53d	mlx4_uar_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x2b85433d	mlx4_mtt_init
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x2b89c917	mlx4_qp_remove
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x31b0f155	mlx4_SYNC_TPT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x372c2734	mlx4_fmr_unmap
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x423db81f	mlx4_db_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x4535cf5b	mlx4_srq_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x512352ae	mlx4_buf_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x55de94a1	mlx4_qp_modify
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x57ff9ae8	mlx4_pd_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x58a2593e	mlx4_INIT_PORT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x5a43ac71	mlx4_unregister_mac
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x6d6fa10e	mlx4_mr_enable
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x789d8efe	mlx4_qp_to_ready
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x78d58b87	mlx4_cq_resize
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x83eb364e	mlx4_multicast_attach
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x965027a0	mlx4_fmr_enable
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9c247d8a	mlx4_alloc_hwq_res
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9c8395d1	mlx4_cq_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9c917155	mlx4_qp_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9e03adeb	mlx4_multicast_detach
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa711ff65	mlx4_register_vlan
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb2cab0cc	mlx4_map_phys_fmr
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xbe86e27c	mlx4_buf_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc32a4510	mlx4_write_mtt
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc60ef136	mlx4_srq_arm
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc8816d8a	mlx4_unregister_vlan
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc9f7a303	mlx4_free_cmd_mailbox
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe6ecb719	mlx4_fmr_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe94ab109	mlx4_mr_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe973b7e9	mlx4_buf_write_mtt
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xeb288d3b	mlx4_db_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xeba97d90	mlx4_srq_query
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xee07f28b	mlx4_mr_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xef96a2b5	mlx4_uar_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf40ecd9a	mlx4_qp_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf8075d4a	mlx4_qp_query
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf82b3df1	mlx4_mtt_addr
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xfc8f8c08	mlx4_cq_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xff9ca4d9	mlx4_register_mac
+EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0x4adcd3c9	usbnet_cdc_unbind
+EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0x847c4ea7	usbnet_generic_cdc_bind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x0ceef0c7	rndis_rx_fixup
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x8142d5fc	generic_rndis_bind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xa2ed4871	rndis_status
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xb0fc9f4e	rndis_unbind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xe5244873	rndis_tx_fixup
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xff389369	rndis_command
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x08bf2e7f	usbnet_set_settings
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x1bacedf6	usbnet_set_msglevel
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x3755abe3	usbnet_change_mtu
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x39362342	usbnet_tx_timeout
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x3a6c0029	usbnet_get_endpoints
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x4d227591	usbnet_get_msglevel
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x553ce30d	usbnet_unlink_rx_urbs
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x5b0642ee	usbnet_get_settings
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x61a5877f	usbnet_defer_kevent
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x65b7d2e4	usbnet_get_ethernet_addr
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x6bb4c0e5	usbnet_open
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x6dc1b488	usbnet_skb_return
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x7995fbdd	usbnet_resume
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x7ec37c5a	usbnet_suspend
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x8031791b	usbnet_start_xmit
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x854b937e	usbnet_nway_reset
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x9391f1a4	usbnet_resume_rx
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x94d8ee0f	usbnet_purge_paused_rxq
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x9dfc33ef	usbnet_pause_rx
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xa27fd631	usbnet_get_link
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xa5ce5e76	usbnet_stop
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xa9448a99	usbnet_probe
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xb76bb277	usbnet_get_drvinfo
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xcfdb3e25	usbnet_disconnect
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x0f741e1e	i2400m_rx
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x290c32b5	i2400m_release
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x3b91c23c	i2400m_dev_reset_handle
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x41236036	i2400m_dev_bootstrap
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x5a9aaa57	i2400m_tx
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x5d35210b	i2400m_queue_work
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x82cb374a	i2400m_netdev_setup
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x97402e51	i2400m_set_init_config
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xb00b793c	i2400m_bm_cmd_prepare
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xc2c660f9	i2400m_cmd_enter_powersave
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xc8a8cdc8	i2400m_tx_msg_get
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xcd4022ea	i2400m_cmd_get_state
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xd3e388cf	i2400m_tx_msg_sent
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xe3c9477f	i2400m_setup
+EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0xd0168098	libipw_rx_any
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x12ad96a5	lbs_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x293c85db	lbs_host_to_card_done
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x3298ff8b	lbs_remove_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x41ef271a	__lbs_cmd
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x445e7e22	lbs_cmd_copyback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x624e8479	lbs_cmd_802_11_rate_adapt_rateset
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x8f9b48cf	lbs_queue_event
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x8fb4225c	lbs_start_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x92d98eff	lbs_process_rxed_packet
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x94cdbe3f	lbs_stop_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x9b5b7508	lbs_add_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xa01651af	lbs_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xc39b5ec6	lbs_send_tx_feedback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xc8a30b3b	lbs_host_sleep_cfg
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xecbe9a70	lbs_notify_command_response
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf64277de	lbs_debug
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x0e619af3	lbtf_send_tx_feedback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x181af8b5	lbtf_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x3793f139	lbtf_bcn_sent
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x45fc7c39	lbtf_cmd_copyback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x54e63f6d	lbtf_add_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x66446429	lbtf_remove_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x914a7f83	__lbtf_cmd
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xacdc1fa0	lbtf_cmd_response_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0x0ef8e991	if_usb_reset_device
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0xd340bc15	if_usb_prog_firmware
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x03708516	p54_register_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x424ea29e	p54_read_eeprom
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x437cc48c	p54_free_skb
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x669b723e	p54_parse_firmware
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x79ba1ad5	p54_parse_eeprom
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x882e8c4a	p54_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xbc90d4ff	p54_unregister_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xcf3baeac	p54_init_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xf508696a	p54_free_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x161d27fb	rt2x00mac_set_key
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x1baf7008	rt2x00queue_map_txskb
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x1da1a98d	rt2x00mac_remove_interface
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x1dc4b0d7	rt2x00lib_probe_dev
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x2191b9c5	rt2x00mac_stop
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x236c820f	rt2x00mac_start
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x4cde2d8c	rt2x00mac_get_stats
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x4e61dc9b	rt2x00mac_bss_info_changed
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x5f6b87bb	rt2x00mac_add_interface
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x6977f7db	rt2x00lib_remove_dev
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x74b91f51	rt2x00mac_conf_tx
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x776d6d53	rt2x00lib_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x7e2b81bb	rt2x00queue_get_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x89e5ee74	rt2x00mac_rfkill_poll
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x90f09e25	rt2x00mac_config
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xae69d727	rt2x00mac_get_tx_stats
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xb189c0d7	rt2x00mac_tx
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xc0e9f2b6	rt2x00mac_set_tim
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xc76e178c	rt2x00mac_configure_filter
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xccb0f71b	rt2x00lib_beacondone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xd667a686	rt2x00lib_txdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xeb227f7f	rt2x00queue_get_entry
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xf50293f6	rt2x00lib_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xfbe9a8dd	rt2x00lib_rxdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x09f24b66	rt2x00pci_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x38a7ec52	rt2x00pci_rxdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x4335964c	rt2x00pci_remove
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x4af19b84	rt2x00pci_initialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x5b39dd48	rt2x00pci_regbusy_read
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x66d4665d	rt2x00pci_uninitialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x75b31b31	rt2x00pci_probe
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x8368dce1	rt2x00pci_write_tx_data
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x8befacc3	rt2x00pci_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x18fccd18	rt2x00usb_vendor_request
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x2b00ed98	rt2x00usb_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x32378f83	rt2x00usb_disconnect
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x357aa70a	rt2x00usb_vendor_req_buff_lock
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x3badfffd	rt2x00usb_disable_radio
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x3ca3a017	rt2x00usb_clear_entry
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x44c823d2	rt2x00usb_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x615b6d86	rt2x00usb_kick_tx_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x7416899d	rt2x00usb_vendor_request_buff
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x90287ff3	rt2x00usb_uninitialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x92147e90	rt2x00usb_regbusy_read
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x9ab40715	rt2x00usb_initialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x9fe03d55	rt2x00usb_write_tx_data
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xa872f684	rt2x00usb_vendor_request_large_buff
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xd8aa3812	rt2x00usb_probe
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xed96bf7f	rt2x00usb_kill_tx_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0x7a88dc39	wl1251_free_hw
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0xe6cec25f	wl1251_init_ieee80211
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0xeeed237d	wl1251_alloc_hw
+EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0x037dcbcc	pcf50633_mbc_get_status
+EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0x5d25b19f	pcf50633_mbc_usb_curlim_set
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x0968d579	wm8350_isink_set_flash
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x0d93d1d1	wm8350_dcdc_set_slot
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x2d07c1eb	wm8350_dcdc25_set_mode
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x4f0e4972	wm8350_register_led
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xcd448944	wm8350_register_regulator
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xe14af64d	wm8350_ldo_set_slot
+EXPORT_SYMBOL_GPL drivers/regulator/wm8400-regulator 0x6c0d83db	wm8400_register_regulator
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x0669601b	scsi_dh_detach
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x18756e7c	scsi_register_device_handler
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x286a8285	scsi_dh_attach
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x593a36c2	scsi_dh_handler_exist
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0xa3ef22d6	scsi_dh_activate
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0xd5f6cf5c	scsi_dh_set_params
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0xd6837815	scsi_unregister_device_handler
+EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x374c1e1c	fcoe_wwn_from_mac
+EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x6204c76a	fcoe_libfc_config
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0c5ff1c0	__iscsi_complete_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x1bb51df0	iscsi_host_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x20e2fc99	iscsi_conn_queue_work
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x226ef624	iscsi_complete_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x255b7495	iscsi_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x2ccca7dc	iscsi_prep_data_out_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x36566e66	iscsi_session_recovery_timedout
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x395d7741	iscsi_conn_send_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4d6373cf	iscsi_session_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x51442ac7	iscsi_conn_stop
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x547977b5	iscsi_conn_failure
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5dc3c089	iscsi_conn_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x6eed7cbf	iscsi_host_remove
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x6f0ef10a	iscsi_itt_to_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x739b4741	iscsi_conn_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x7d7fe39f	__iscsi_get_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x7f6d4bd3	iscsi_eh_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x811cae4c	iscsi_conn_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x839c6024	iscsi_queuecommand
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x8e0f5727	iscsi_change_queue_depth
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x93086cea	iscsi_pool_init
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x9312f099	iscsi_requeue_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x93a85402	iscsi_session_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xa66e9a8f	iscsi_suspend_queue
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xaa282a16	iscsi_eh_target_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xab9c9f31	iscsi_conn_bind
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb59eb876	iscsi_set_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xbccf439b	iscsi_host_add
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xbea76ac0	iscsi_pool_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xc3a45b41	iscsi_host_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xcaa5a98a	iscsi_complete_scsi_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xcb494fa4	iscsi_put_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xccc4622a	iscsi_itt_to_ctask
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xd1ba0241	iscsi_conn_start
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xd2c374fa	iscsi_host_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xd3c5d921	iscsi_eh_device_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xdc3f48bf	iscsi_host_set_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe493957e	iscsi_session_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xedbba80c	iscsi_verify_itt
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xfb84bbbb	iscsi_update_cmdsn
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xfcd9ada9	iscsi_suspend_tx
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xfd7b6d93	iscsi_session_failure
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x2bc03779	iscsi_tcp_recv_skb
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x2ff4e1c6	iscsi_tcp_task_xmit
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x429c0a7e	iscsi_segment_init_linear
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x69dda5ee	iscsi_tcp_hdr_recv_prep
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x7067078c	iscsi_tcp_dgst_header
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x7872e6e4	iscsi_tcp_task_init
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x95c0aac8	iscsi_tcp_conn_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xb6b01454	iscsi_segment_seek_sg
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xc11e6587	iscsi_tcp_cleanup_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xc3935e33	iscsi_tcp_segment_unmap
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xda2eeb2c	iscsi_tcp_conn_get_stats
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xe2e5b0ca	iscsi_tcp_r2tpool_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xe4b861a1	iscsi_tcp_conn_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xeea77150	iscsi_tcp_r2tpool_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xf311bd5d	iscsi_tcp_segment_done
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xf61e540a	iscsi_tcp_recv_segment_is_hdr
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x0e4e96a5	sas_request_addr
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x0ed4acf8	sas_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x14150563	sas_phy_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x19fb2958	sas_register_ha
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x2cdba4e7	sas_phy_enable
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x2f7ac391	sas_task_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x3d086b44	sas_find_local_phy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x47c25633	sas_unregister_ha
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x4a4969c8	sas_slave_configure
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x51ec3088	sas_eh_bus_reset_handler
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x7396fa62	sas_domain_release_transport
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x73c20d51	sas_eh_device_reset_handler
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x877e3244	sas_slave_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x9f05725a	sas_domain_attach_transport
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xa0bfd7bb	__sas_task_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xa776d224	sas_bios_param
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xb4936719	sas_target_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xc134b9fd	sas_change_queue_type
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xcd1e991e	sas_change_queue_depth
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xcf1f5c45	sas_ioctl
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xe12ac1ee	sas_queuecommand
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xe1880b6c	sas_ssp_task_response
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xfbffad95	sas_slave_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x22fb0fa0	srp_cmd_queue
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x3714576f	srp_transfer_data
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x83882e20	srp_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xc6024234	srp_target_free
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xc96e7da1	srp_iu_put
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xd7f4efd0	srp_iu_get
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x2289f6ff	scsi_tgt_free_queue
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x81dd12e5	scsi_tgt_it_nexus_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xa221be8f	scsi_tgt_it_nexus_create
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xa60f340b	scsi_tgt_tsk_mgmt_request
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xb5265e32	scsi_tgt_alloc_queue
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xc08d8292	scsi_host_put_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xceb39748	scsi_tgt_cmd_to_host
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xd603fbd0	scsi_tgt_queue_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xfd20f157	scsi_host_get_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x0f6ab730	iscsi_add_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x3243cdfb	iscsi_create_conn
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x3a2183f8	iscsi_remove_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x616b85a5	iscsi_session_event
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x6512c2ab	iscsi_host_for_each_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x667552d7	iscsi_destroy_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x7b31e9dd	iscsi_create_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x7c451989	iscsi_recv_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x7f3ca70a	iscsi_offload_mesg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x81652953	iscsi_create_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x93a0644a	iscsi_conn_error_event
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x9a400d24	iscsi_destroy_conn
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x9ae48eb9	iscsi_register_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xb5b40931	iscsi_scan_finished
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xbb555f6b	iscsi_free_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xc6104669	iscsi_unregister_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xca122099	iscsi_session_chkready
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xccf9593c	iscsi_block_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xdfff8756	iscsi_destroy_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xe2153f2f	iscsi_alloc_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xe575b93e	iscsi_unblock_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xfb291893	iscsi_lookup_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0x0ef06974	spi_populate_ppr_msg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xa0c71dac	spi_populate_sync_msg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xcffa2aff	spi_populate_width_msg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x177e4dcf	srp_attach_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x4722cbe6	srp_rport_add
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x8211729b	srp_rport_del
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xafa2302b	srp_remove_host
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xcb5bba60	srp_release_transport
+EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0x39f7a09d	pciserial_init_ports
+EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0xb9bf0b88	pciserial_suspend_ports
+EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0xde120b65	pciserial_resume_ports
+EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0xf88e044b	pciserial_remove_ports
+EXPORT_SYMBOL_GPL drivers/serial/serial_core 0x68007ed7	uart_console_write
+EXPORT_SYMBOL_GPL drivers/serial/serial_core 0xa31a779f	uart_set_options
+EXPORT_SYMBOL_GPL drivers/serial/serial_core 0xf2fca922	uart_parse_options
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x07bbba45	spi_bitbang_setup_transfer
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x3a51cb6d	spi_bitbang_setup
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x9db886eb	spi_bitbang_transfer
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xa59bfdd7	spi_bitbang_start
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xa83c5491	spi_bitbang_cleanup
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xd364eac9	spi_bitbang_stop
+EXPORT_SYMBOL_GPL drivers/uio/uio 0x1947ced2	uio_unregister_device
+EXPORT_SYMBOL_GPL drivers/uio/uio 0x95f48b4e	uio_event_notify
+EXPORT_SYMBOL_GPL drivers/uio/uio 0xe35e59a7	__uio_register_device
+EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0x2fad04a4	usbatm_usb_probe
+EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0x33b8feee	usbatm_usb_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x197c5949	usb_ftdi_elan_edset_single
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x23a19f42	usb_ftdi_elan_edset_input
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x23b23aa9	usb_ftdi_elan_read_pcimem
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x62915f19	usb_ftdi_elan_edset_empty
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x692e8c40	ftdi_elan_gone_away
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x7c5cbe0d	usb_ftdi_elan_write_pcimem
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x9128b08c	usb_ftdi_elan_edset_flush
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x9c9b3f67	usb_ftdi_elan_edset_setup
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xd198d6d7	usb_ftdi_elan_edset_output
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x02da3879	usb_serial_port_softint
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x0a8cc18b	usb_serial_handle_sysrq_char
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x2ac18265	ezusb_set_reset
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x3357cba5	ezusb_writememory
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x37ed4b70	usb_serial_generic_resubmit_read_urb
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x3aeb7ae7	usb_serial_handle_dcd_change
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x3e82eaaa	usb_serial_probe
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x485feb30	usb_serial_register
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x5494f0e2	usb_serial_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x7ef97542	usb_serial_generic_read_bulk_callback
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x7f883a44	usb_serial_generic_resume
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x8ea6c77a	usb_serial_generic_write
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x998842f7	usb_serial_generic_open
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xd0d4bc23	usb_serial_generic_write_bulk_callback
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xd951fa74	usb_serial_handle_break
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xec2c6a46	usb_serial_deregister
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x0be13004	usb_storage_usb_ids
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1bc3edc2	usb_stor_sense_invalidCDB
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1fdfb65b	usb_stor_control_msg
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x258c47fc	usb_stor_probe2
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x2771efaf	usb_stor_reset_resume
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x3b57e76a	usb_stor_CB_transport
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x4880be9d	usb_stor_pre_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x6107c10a	usb_stor_bulk_srb
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x679aa156	usb_stor_bulk_transfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x6c70b376	usb_stor_CB_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x7b0034fc	usb_stor_post_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x7b3e206d	usb_stor_suspend
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x803ad475	usb_stor_Bulk_transport
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x83179c22	usb_stor_ctrl_transfer
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x8872f114	usb_stor_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x8971da72	usb_stor_set_xfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x8dc17584	usb_stor_probe1
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x900731da	usb_usual_ignore_device
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x91cadad0	usb_stor_bulk_transfer_sg
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x9f50f799	usb_stor_transparent_scsi_command
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xb618da6f	usb_stor_access_xfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xbf6439f0	fill_inquiry_response
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xd74e0bdd	usb_stor_clear_halt
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xdd2d6f02	usb_stor_resume
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xef1f72f2	usb_stor_Bulk_reset
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x09f3c921	wa_urb_enqueue_run
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x3c06c5d4	rpipe_ep_disable
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x4aa4f12d	__wa_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x8668d134	rpipe_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x9e698021	wa_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xb5301305	wa_urb_enqueue
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xc7ed52e7	wa_urb_dequeue
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x055a0276	wusbhc_rh_start_port_reset
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x0bb6bf5e	wusb_cluster_id_get
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x0c92be96	wusbhc_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x106310af	wusbhc_mmcie_rm
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x283c48b8	wusbhc_rh_status_data
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x39465ebc	wusbhc_chid_set
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x584da71d	wusbhc_handle_dn
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x5cf0b33c	wusbhc_reset_all
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x66585e43	wusbhc_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x8ab8b24e	wusbhc_rh_control
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x9bf07d1d	wusbhc_mmcie_set
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xacb21e00	wusbhc_b_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb09b6967	__wusb_dev_get_by_usb_dev
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb725d128	wusb_cluster_id_put
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xd5e42568	wusbhc_rh_resume
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xdf6e4f08	wusb_dev_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xe3898259	wusbhc_b_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xef918b8b	wusbhc_rh_suspend
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf4f969a9	wusbhc_giveback_urb
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf770a6b4	wusbd
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xfe2e17d7	wusb_et_name
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x1bf4dd0f	i1480_rceb_check
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x6317df67	i1480_fw_upload
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x72d59e5c	i1480_cmd
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x1885a194	uwb_phy_rate_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x268be260	uwb_pca_base_priority_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x943bec09	uwb_ack_policy_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x96f9997a	uwb_rts_cts_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xa768d07f	uwb_rts_cts_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xb3aa3381	uwb_phy_rate_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xd001a229	uwb_pca_base_priority_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xefde0736	uwb_ack_policy_store
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x17d9559d	umc_driver_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x2ceaa277	__umc_driver_register
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x38517d32	umc_device_create
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x6fe29396	umc_bus_type
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x7f5fcdee	umc_device_register
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x8e386706	umc_controller_reset
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x96d075d0	umc_match_pci_id
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xba37de26	umc_device_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0592cbc6	uwb_rc_init
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x09c2ae47	uwb_rc_neh_error
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0af39237	uwb_rc_ie_rm
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0b8aad57	uwb_est_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x1554633b	uwb_notifs_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x17f99eff	uwb_rc_mac_addr_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x223c4ce7	uwb_rc_reset_all
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x30a913cb	uwb_pal_init
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4207f914	uwb_rc_pre_reset
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4d57ae3c	uwb_rsv_type_str
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x516d2ce8	uwb_rc_neh_grok
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5e4bc088	__uwb_addr_print
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6384d311	uwb_rc_ie_add
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6399ca0d	uwb_radio_stop
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x7065afdb	uwb_rc_vcmd
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x72bdbe4a	uwb_rsv_modify
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x739fef90	uwb_rsv_destroy
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x7b9bda78	uwb_rc_get_by_dev
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x7dc307b5	uwb_rsv_create
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x7dcfcd23	uwb_ie_next
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x7efa446b	uwb_rc_dev_addr_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x8186c593	uwb_rc_rm
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x85da5f3d	uwb_pal_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x95dbe7d1	uwb_rc_cmd_async
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x9771bb7c	uwb_pal_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x98413234	uwb_rsv_state_str
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa94aef6e	uwb_rc_get_by_grandpa
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xad5fe208	uwb_rsv_accept
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb42c953e	uwb_dev_for_each
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb596a5c2	uwb_rsv_establish
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb9da9604	uwb_rsv_terminate
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xbb0a5781	uwb_rc_put
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xbd60286a	uwb_rc_alloc
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xc49b5752	uwb_rc_add
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xc70b37a9	uwb_rc_cmd
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd1fbaac8	uwb_rc_post_reset
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd35f7774	uwb_radio_start
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd89d8dee	uwb_rsv_get_usable_mas
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd939bf9d	uwb_dev_try_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xdd8532ac	uwb_est_find_size
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe1716f06	uwb_est_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xea319a4b	uwb_notifs_deregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xefb7bde2	__uwb_rc_try_get
+EXPORT_SYMBOL_GPL drivers/uwb/whci 0xe7fdb366	whci_wait_for
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x09286a09	wlp_prepare_tx_frame
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x0dcc9256	wlp_dev_prim_category_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x267fc4a6	wlp_uuid_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x2844d4b9	wlp_receive_frame
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x2a0eb2b0	wlp_uuid_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x3b6845ba	wlp_wss_activate_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x3ebde17c	wlp_dev_model_name_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x4a553e7c	wlp_dev_name_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x50f154c5	wlp_reset_all
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x5110aa71	wlp_dev_model_nr_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x5ab2fe36	wlp_dev_manufacturer_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x5ef0639f	wlp_eda_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x65afc8be	wlp_eda_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x66321911	wlp_dev_prim_category_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x6d0f0b7f	wlp_wss_setup
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x707121a2	wlp_dev_prim_OUI_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x8a21a544	wlp_dev_prim_OUI_sub_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x8c92ff9b	wlp_dev_model_nr_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x8ebc7a05	wlp_setup
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xb8aa9d31	wlp_neighborhood_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xcfb6532a	wlp_wss_activate_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xcfc8fbd0	wlp_dev_manufacturer_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xd67d4947	wlp_dev_serial_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xdac56967	wlp_remove
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xea40057e	wlp_dev_prim_OUI_sub_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xea860eca	wlp_dev_prim_subcat_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xeea8fb1e	wlp_dev_prim_subcat_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xeed7bbeb	wlp_dev_name_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xef8d55ee	wlp_dev_serial_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xf237cc33	wlp_dev_model_name_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xf35d3b64	wlp_wss_remove
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xfbfb8032	wlp_dev_prim_OUI_show
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x2cb1c5af	ili9320_resume
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x2d7d76a3	ili9320_remove
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x31e07554	ili9320_probe_spi
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x4627dde9	ili9320_shutdown
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x4e08f252	ili9320_write_regs
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x7b0f0bda	ili9320_write
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xcdb42fe8	ili9320_suspend
+EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0x5f2fffb3	fb_sys_write
+EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0x63aab33f	fb_sys_read
+EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0x531df62a	sis_malloc_new
+EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0x57855e80	sis_free_new
+EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x533d2410	unregister_virtio_device
+EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x65ad547d	register_virtio_driver
+EXPORT_SYMBOL_GPL drivers/virtio/virtio 0xb3dba808	virtio_check_driver_offered_feature
+EXPORT_SYMBOL_GPL drivers/virtio/virtio 0xf06879d2	register_virtio_device
+EXPORT_SYMBOL_GPL drivers/virtio/virtio 0xfaad665c	unregister_virtio_driver
+EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x0ac0ab25	vring_interrupt
+EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x5aef85d1	vring_new_virtqueue
+EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x5d1c3d94	vring_del_virtqueue
+EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0xc6465289	vring_transport_features
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x17e15a48	w1_write_8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x2b6916d6	w1_next_pullup
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x4dfedc1a	w1_reset_select_slave
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x7b7eae13	w1_read_block
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x7c2f2afb	w1_calc_crc8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x89f6b763	w1_write_block
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xd685ae4c	w1_touch_block
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xdeab8891	w1_read_8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xf12ddb4b	w1_reset_bus
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x0864c4a4	dlm_new_lockspace
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x9321df95	dlm_lock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xa2204d4d	dlm_posix_unlock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xcf9f3328	dlm_release_lockspace
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xdc583c08	dlm_unlock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xe5ceb3d6	dlm_posix_lock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xf1e44796	dlm_posix_get
+EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0xc7928153	exportfs_decode_fh
+EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0xecd9c42b	exportfs_encode_fh
+EXPORT_SYMBOL_GPL fs/fat/fat 0x0f3610fd	fat_dir_empty
+EXPORT_SYMBOL_GPL fs/fat/fat 0x1768c3a1	fat_detach
+EXPORT_SYMBOL_GPL fs/fat/fat 0x3c48028c	fat_search_long
+EXPORT_SYMBOL_GPL fs/fat/fat 0x3fd32b5a	fat_alloc_new_dir
+EXPORT_SYMBOL_GPL fs/fat/fat 0x516b26c5	fat_build_inode
+EXPORT_SYMBOL_GPL fs/fat/fat 0x55ecc0a1	fat_sync_inode
+EXPORT_SYMBOL_GPL fs/fat/fat 0x64b1f402	fat_setattr
+EXPORT_SYMBOL_GPL fs/fat/fat 0x722d2be8	fat_attach
+EXPORT_SYMBOL_GPL fs/fat/fat 0x86eae39a	fat_remove_entries
+EXPORT_SYMBOL_GPL fs/fat/fat 0xb5f9913f	fat_free_clusters
+EXPORT_SYMBOL_GPL fs/fat/fat 0xbb97c8d7	fat_getattr
+EXPORT_SYMBOL_GPL fs/fat/fat 0xc79919b9	fat_scan
+EXPORT_SYMBOL_GPL fs/fat/fat 0xd84a77d1	fat_get_dotdot_entry
+EXPORT_SYMBOL_GPL fs/fat/fat 0xe7a2ea51	fat_flush_inodes
+EXPORT_SYMBOL_GPL fs/fat/fat 0xecd80b35	fat_time_unix2fat
+EXPORT_SYMBOL_GPL fs/fat/fat 0xee3edc33	fat_fill_super
+EXPORT_SYMBOL_GPL fs/fat/fat 0xf091b059	fat_fs_error
+EXPORT_SYMBOL_GPL fs/fat/fat 0xfb052ba6	fat_add_entries
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x17ce645d	locks_end_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x1a618932	nlmsvc_unlock_all_by_ip
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x3a73dd99	nlmclnt_init
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x63af51b5	nlmclnt_done
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x6f959b35	locks_in_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x7bce1595	nlmclnt_proc
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x8ef1bde9	nlmsvc_unlock_all_by_sb
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x96877ac4	locks_start_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xa4a6aa0d	nlmsvc_ops
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xa7b91a7b	lockd_down
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xf6933c48	lockd_up
+EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0x86d33dc7	nfsacl_encode
+EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0xfac52a43	nfsacl_decode
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1b89c6ee	o2hb_fill_node_map
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1cb231d0	mlog_not_bits
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1d747ce3	o2hb_check_node_heartbeating
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1d8284fe	o2nm_get_node_by_ip
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x36418553	o2net_send_message
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x4900035b	o2hb_stop_all_regions
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x50ae05b6	o2nm_get_node_by_num
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x687f6251	mlog_and_bits
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x70fcf0aa	o2hb_register_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x905f8e9e	o2hb_setup_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa4badf92	o2nm_node_get
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa82a8645	o2nm_this_node
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa87bc9e7	o2nm_configured_node_map
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa9f5379a	o2net_send_message_vec
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xae808bac	o2net_register_handler
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xbaeb4700	o2hb_check_node_heartbeating_from_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xcbbc7184	o2hb_unregister_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xcd73f430	o2nm_node_put
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xd60f2c6c	o2hb_check_local_node_heartbeating
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf1a5611d	o2net_unregister_handler_list
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x088c8543	dlmlock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x180f030d	dlmunlock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x4c13c151	dlm_unregister_domain
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x7a1211f8	dlm_setup_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x89909af4	dlm_register_domain
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd7ba575e	dlm_errmsg
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd8fa57a6	dlm_unregister_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xf107a1a2	dlm_print_one_lock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xf1c25e97	dlm_register_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xfb86b96f	dlm_errname
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0562c415	ocfs2_cluster_this_node
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x06379db6	ocfs2_dlm_lvb_valid
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0e27f909	ocfs2_dlm_lock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x21db5b88	ocfs2_cluster_disconnect
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4a1f6fe9	ocfs2_cluster_connect
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4b7de319	ocfs2_plock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4d3af7fa	ocfs2_cluster_hangup
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x81c85a68	ocfs2_dlm_lock_status
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x90da9550	ocfs2_stack_glue_register
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x91fab465	ocfs2_dlm_lvb
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x963932a3	ocfs2_stack_glue_set_locking_protocol
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xa7d5c1c0	ocfs2_dlm_unlock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xbbc4ef97	ocfs2_stack_supports_plocks
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xd066711e	ocfs2_dlm_dump_lksb
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xfc48e890	ocfs2_stack_glue_unregister
+EXPORT_SYMBOL_GPL lib/lzo/lzo_compress 0x56b63670	lzo1x_1_compress
+EXPORT_SYMBOL_GPL lib/lzo/lzo_decompress 0xf30fda27	lzo1x_decompress_safe
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x300d7e57	free_rs
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x6fbb3bd9	init_rs_non_canonical
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xabda1e2e	decode_rs16
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xb050f329	init_rs
+EXPORT_SYMBOL_GPL net/802/garp 0x0feaf230	garp_register_application
+EXPORT_SYMBOL_GPL net/802/garp 0x48049055	garp_request_join
+EXPORT_SYMBOL_GPL net/802/garp 0x5692879a	garp_unregister_application
+EXPORT_SYMBOL_GPL net/802/garp 0x7cdc95bb	garp_init_applicant
+EXPORT_SYMBOL_GPL net/802/garp 0xa110a9c7	garp_request_leave
+EXPORT_SYMBOL_GPL net/802/garp 0xa15f4dd3	garp_uninit_applicant
+EXPORT_SYMBOL_GPL net/802/stp 0x10b434c0	stp_proto_register
+EXPORT_SYMBOL_GPL net/802/stp 0xe0bbe2ad	stp_proto_unregister
+EXPORT_SYMBOL_GPL net/ax25/ax25 0x8b1fdaa7	ax25_register_pid
+EXPORT_SYMBOL_GPL net/ax25/ax25 0xac93ae05	ax25_bcast
+EXPORT_SYMBOL_GPL net/ax25/ax25 0xaeb7451e	ax25_defaddr
+EXPORT_SYMBOL_GPL net/bluetooth/bluetooth 0xdf9dd440	bt_class
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x0393229a	dccp_insert_option_timestamp
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x1218092d	dccp_destroy_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x15d02869	dccp_make_response
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x1d99d49a	dccp_timestamp
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x1f6e31cf	dccp_setsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x3994d89a	inet_dccp_listen
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x427b6c87	dccp_insert_option_elapsed_time
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x433441f4	dccp_orphan_count
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x46dc9086	dccp_sendmsg
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x4785723c	dccp_rcv_state_process
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x48523c3c	dccp_connect
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x4cdd391d	dccp_feat_list_purge
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x53e5a9ba	dccp_ctl_make_reset
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x56ea266a	dccp_state_name
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x5b24d28a	dccp_send_sync
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x60c9baf8	dccp_set_state
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x63118bce	dccp_recvmsg
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x6d14b3aa	dccp_send_ack
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x6e660313	dccp_child_process
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x794e8ceb	dccp_init_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x7cf0a730	dccp_shutdown
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x86be7924	dccp_packet_name
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x894fdce8	dccp_create_openreq_child
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x8b7d8caf	dccp_statistics
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x99d2cc17	dccp_parse_options
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x9af26902	dccp_reqsk_init
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x9fc3e3fb	dccp_ioctl
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xa6eb2f99	dccp_close
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xa99457ed	dccp_reqsk_send_ack
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xacc950f9	dccp_poll
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xaf96ca01	dccp_rcv_established
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xb3debb90	dccp_disconnect
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xbda8315f	dccp_death_row
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xbf243ec2	dccp_sync_mss
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xc2b68e60	dccp_hashinfo
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xd0a43ed2	dccp_getsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xd0b702d2	dccp_insert_option
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xdda5026f	dccp_done
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xe71f3a32	dccp_check_req
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x189fcbad	dccp_v4_conn_request
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x43a1ff8f	dccp_v4_connect
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x965bec84	dccp_invalid_packet
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x9daabd9d	dccp_v4_request_recv_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xbd9c11b7	dccp_v4_send_check
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xc5b481b2	dccp_v4_do_rcv
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0x6d40a921	need_ipv4_conntrack
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0xaaf6f963	nf_nat_seq_adjust_hook
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_defrag_ipv4 0x6b6c3d10	nf_defrag_ipv4_enable
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x07ae60b6	nf_nat_proto_in_range
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x19ec1bf4	nf_nat_proto_unique_tuple
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x6eed08f3	nf_nat_proto_range_to_nlattr
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x73ce6c08	nf_nat_get_offset
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x8ca3aba3	nf_nat_icmp_reply_translation
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x93c4969e	nf_nat_packet
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x94a08134	nf_nat_proto_nlattr_to_range
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xae81ef97	nf_nat_proto_find_get
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xd09ec80e	nf_nat_proto_put
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat_proto_gre 0x636b12c8	nf_nat_need_gre
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x0508a72a	tcp_vegas_get_info
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x11f9afe6	tcp_vegas_pkts_acked
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x216f97ed	tcp_vegas_cwnd_event
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x7c27effb	tcp_vegas_init
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xd44c9036	tcp_vegas_state
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x08a3e5d1	net_ipv6_ctl_path
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x0c1832bb	inet6_csk_addr2sockaddr
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x241f0311	ipv6_opt_accepted
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x2576986e	fl6_sock_lookup
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x3a6f75ae	ip6_dst_blackhole
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x5088cad3	ip6_sk_dst_lookup
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x54e2879d	inet6_csk_search_req
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x6287869d	inet6_csk_reqsk_queue_hash_add
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x73fe5688	inet6_sk_rebuild_header
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x7c5af2d7	ipv6_find_tlv
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x831961cd	ip6_dst_lookup
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x85478a0b	inet6_hash_frag
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xb747b89b	ip6_local_out
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xbc0d96a7	inet6_destroy_sock
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xc617c29d	ipv6_dup_options
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xfa68a598	inet6_csk_bind_conflict
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xfcda66e9	inet6_csk_xmit
+EXPORT_SYMBOL_GPL net/mac80211/mac80211 0xaf30eeac	ieee80211_iterate_active_interfaces
+EXPORT_SYMBOL_GPL net/mac80211/mac80211 0xffb7f85f	ieee80211_iterate_active_interfaces_atomic
+EXPORT_SYMBOL_GPL net/netfilter/ipvs/ip_vs 0xe6476b4a	net_vs_ctl_path
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x045072cd	nf_ct_port_nla_policy
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x09221e06	nf_conntrack_alloc
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x0a413bc9	__nf_conntrack_helper_find_byname
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x0baf9cf0	nf_ct_port_tuple_to_nlattr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x0d58939d	nf_ct_iterate_cleanup
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x0e94baf9	__nf_conntrack_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x1309b526	nf_conntrack_helper_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x17052d3c	nf_ct_deliver_cached_events
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x1b9e355d	__nf_ct_refresh_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x1cd78241	nf_ct_l3proto_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x274e6e83	nf_ct_nat_offset
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x284ca89b	nf_ct_invert_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x2bf61db5	nf_ct_get_tuplepr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x2c272c63	nf_ct_unlink_expect
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x2d2bc03e	nf_ct_expect_related_report
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x2d308528	nf_ct_helper_ext_add
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x2f54036f	nf_conntrack_unregister_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3bdacd93	nf_ct_expect_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3f5b1415	nf_ct_port_nlattr_to_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3f78c2ca	nf_ct_l3protos
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4542b821	__nf_ct_try_assign_helper
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x49828b8f	nf_ct_unexpect_related
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4b9065a9	nf_ct_alloc_hashtable
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x51eb9d3c	nf_ct_remove_expectations
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5882ba33	nf_conntrack_set_hashsize
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x598915d2	nf_conntrack_hash_insert
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5c72cf27	nf_conntrack_register_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5ddffffc	nf_ct_insert_dying_list
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x62813e5c	nf_ct_port_nlattr_tuple_size
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x62fb9347	nf_conntrack_l4proto_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6d26004b	nf_ct_expect_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6e224a7a	need_conntrack
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x77525ab7	nf_ct_expect_register_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x78f9b710	nf_ct_l3proto_try_module_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x7dbf33e7	__nf_ct_kill_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x7fbaeb49	__nf_ct_l4proto_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x86797883	nf_conntrack_free
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x870d6399	nf_conntrack_l4proto_udp4
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x89a70e4c	nf_ct_l3proto_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8b953d7c	nf_conntrack_alter_reply
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8ffe7e89	nf_conntrack_htable_size
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x905111a1	seq_print_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9067606c	nf_conntrack_tuple_taken
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x90ff6c9f	nf_ct_invert_tuplepr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x975e52ac	nf_ct_expect_init
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9af3f6c1	nf_ct_free_hashtable
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xa0d469ab	nf_ct_delete_from_lists
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xa1dd7744	__nf_ct_expect_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xa5afefea	nf_conntrack_l3proto_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb34ed660	nf_conntrack_helper_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb4a736d1	nf_conntrack_l3proto_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb4bee52a	nf_conntrack_in
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb53b011b	nf_conntrack_l4proto_udp6
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb602c57e	nf_ct_l3proto_module_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb98eda4f	nf_conntrack_event_cb
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb9b138b6	nf_conntrack_l3proto_generic
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc06fd09e	__nf_conntrack_confirm
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc18ac88d	nf_ct_expect_hsize
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc53f2ec7	nf_conntrack_l4proto_tcp6
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc7490a6a	nfnetlink_parse_nat_setup_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc758b990	nf_conntrack_untracked
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc78d5301	nf_ct_get_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc8b7117a	print_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xce597eb5	nf_ct_expect_unregister_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xd3d96685	nf_ct_extend_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xd5af974a	nf_ct_extend_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xdbef8b57	nf_conntrack_lock
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xe234c6dd	nf_conntrack_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xe8f7de7a	nf_ct_expect_alloc
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xef5af925	nf_conntrack_l4proto_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf38bcdf3	nf_conntrack_max
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf7094c45	nf_conntrack_l4proto_tcp4
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf852ac34	nf_expect_event_cb
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xfd60d554	nf_conntrack_flush_report
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_amanda 0x7eb71894	nf_nat_amanda_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_ftp 0x2f620c3f	nf_nat_ftp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x077ac5cb	nat_callforwarding_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x3a1f446e	nat_h245_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x4935fc55	nat_t120_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x4d1710e1	nat_q931_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x563a7d0e	set_h225_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x65ce7afa	set_ras_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x8c010692	set_sig_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x95c494b3	nat_rtp_rtcp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x9651c1d3	get_h225_addr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xf0e5b5a0	set_h245_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_irc 0x01d703ba	nf_nat_irc_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x22ead8a1	nf_nat_pptp_hook_inbound
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x35facdae	nf_nat_pptp_hook_expectfn
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0xa61c5b95	nf_nat_pptp_hook_outbound
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0xb06d756b	nf_nat_pptp_hook_exp_gre
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_proto_gre 0x3cc14252	nf_ct_gre_keymap_destroy
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_proto_gre 0x528830ff	nf_ct_gre_keymap_add
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x08d9e2c4	ct_sip_parse_request
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x0b5f07f6	nf_nat_sdp_session_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x4fe45503	ct_sip_parse_address_param
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x59781d86	nf_nat_sdp_media_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x6b81663a	ct_sip_parse_numerical_param
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x76b968b0	ct_sip_get_sdp_header
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x88013b96	nf_nat_sdp_port_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xb156f233	ct_sip_parse_header_uri
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xb5735867	nf_nat_sdp_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xd34c36af	nf_nat_sip_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xe692b64a	nf_nat_sip_expect_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xf7798e0a	ct_sip_get_header
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_tftp 0x9ef11d05	nf_nat_tftp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_tproxy_core 0x1b644a8e	nf_tproxy_get_sock_v4
+EXPORT_SYMBOL_GPL net/netfilter/nf_tproxy_core 0x4a7e9ae5	nf_tproxy_assign_sock
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x1f58e71b	nfnl_lock
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x2056d7bc	nfnetlink_send
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x3895cd7a	nfnl_unlock
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x7c8c2bd6	nfnetlink_unicast
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xc2b906c8	nfnetlink_subsys_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xeca95329	nfnetlink_has_listeners
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xef9b4bbd	nfnetlink_set_err
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xff832e46	nfnetlink_subsys_register
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink_log 0xd81aa186	nfulnl_log_packet
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x0fb2bef1	xt_register_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x1a695922	xt_check_target
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x32ac6f08	xt_unregister_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x40728a63	xt_find_revision
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x583a81b5	xt_proto_init
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x5bbb0c8b	xt_proto_fini
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x6b87e845	xt_replace_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x8096fe88	xt_find_table_lock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xa1cce8f9	per_cpu__xt_info_locks
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xba1c5d65	xt_check_match
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xbcc4f0b1	xt_request_find_target
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xf9e63e54	xt_table_unlock
+EXPORT_SYMBOL_GPL net/rxrpc/af-rxrpc 0x6d4603f6	rxrpc_unregister_security
+EXPORT_SYMBOL_GPL net/rxrpc/af-rxrpc 0xfbdfd131	rxrpc_register_security
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x00c52ef5	g_make_token_header
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x0f93600b	svcauth_gss_flavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x1745627c	gss_mech_get
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x2418e795	gss_mech_get_by_name
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x4c1e151c	gss_svc_to_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x5f5697c5	gss_mech_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x8c365b66	gss_pseudoflavor_to_service
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x8d0dea57	gss_mech_get_by_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x8d1a827e	svcauth_gss_register_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x937c6d4b	svc_gss_principal
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x96407f5b	gss_mech_register
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xb5dea7ef	g_token_size
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xd5a926f0	gss_mech_put
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xf8b2ff6e	g_verify_token_header
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xfe6b0dab	gss_service_to_auth_domain_name
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x000d7999	rpc_destroy_wait_queue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x00cd9be2	svc_sock_names
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x026cffe1	csum_partial_copy_to_xdr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0286e910	xdr_partial_copy_from_skb
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x05e807a9	xdr_encode_string
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x065994f1	xdr_encode_opaque_fixed
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x073ee599	svc_xprt_names
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x097a5d87	xprt_wait_for_buffer_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x09da7fa8	xprt_lookup_rqst
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0ad1e0e0	svc_find_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0b74f728	rpc_delay
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0d33b3bd	xdr_decode_array2
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0f668ba9	svc_auth_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0f9fd9c0	rpc_ntop
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0fb698d5	svc_xprt_copy_addrs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1163f794	rpc_peeraddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x12e280e3	svc_proc_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x13cbab1f	rpc_max_payload
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1a4fd151	rpc_mkpipe
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1dfcce0e	svc_xprt_put
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1dfd5134	cache_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x212769a9	svc_recv
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x233a97e6	rpc_clone_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x234c8c1d	xdr_buf_subsegment
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x27b0841f	rpc_restart_call_prepare
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x283f9c00	xprt_complete_rqst
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2919b156	xdr_decode_string_inplace
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x29cbcfb0	svc_sock_update_bufs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x29e7906a	svc_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2aa17774	rpc_free_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2bc822e5	xprt_release_xprt_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2cd06e34	rpcauth_destroy_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2de49c9e	svc_auth_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2e20b64b	rpc_queue_upcall
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2eec63c9	xdr_encode_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x31a89d59	rpc_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x36188e57	svc_authenticate
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x37709e43	svc_wake_up
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x37e2f492	xdr_shift_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x395b9ffc	svc_reserve
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3bf015bb	svc_xprt_init
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3d932fa1	xprt_register_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3df543c7	xprt_adjust_cwnd
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x42f2e2c2	svc_xprt_enqueue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x433ab06f	rpc_force_rebind
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4422cf44	auth_unix_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4460a98f	sunrpc_cache_unregister_pipefs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x459a84d6	rpc_lookup_machine_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4821dd6a	xdr_enter_page
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x48f7fff5	xdr_process_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4b9de6de	rpc_wake_up
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4df5241f	xdr_inline_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4fd058de	rpc_proc_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5134b98f	auth_domain_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5200f283	xprt_release_rqst_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x53445f68	nlm_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5398922e	svc_print_addr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x59ff5cd4	rpcauth_init_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5a08aaaf	rpc_alloc_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5b14ec1a	rpc_put_mount
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5bd26000	rpc_proc_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5c818c1b	cache_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6163c618	xdr_write_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x65d0ce48	xprt_update_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x66c57b74	rpc_print_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x675524ec	rpc_sockaddr2uaddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x676eccbd	rpcauth_generic_bind_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6a8cffb9	auth_domain_put
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6b1b86b0	sunrpc_cache_register_pipefs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6c5304c5	rpcb_getport_sync
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6df2ca4d	sunrpc_cache_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6e3ed02b	svc_seq_show
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6eea229d	svcauth_unix_purge
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x70ad8a50	rpcauth_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x71fa908a	cache_flush
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x739cda0d	rpc_setbufsize
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x73e29688	xdr_init_encode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x752d6439	__rpc_wait_for_completion_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7a16cdf7	rpc_killall_tasks
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7de53067	rpc_init_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7e051352	xdr_init_decode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7ee79dba	svc_close_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8024a670	cache_purge
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8140f31d	xprt_reserve_xprt_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x84ddb3ba	svc_xprt_received
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8504bd74	xprt_set_retrans_timeout_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x86a64722	svc_sock_destroy
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x86ed282a	rpc_uaddr2sockaddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8812d541	xdr_buf_from_iov
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x886e2631	xprt_set_retrans_timeout_def
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8c0c6686	xprt_release_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8c51e16c	svc_exit_thread
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8c9f7f0b	rpc_init_wait_queue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8d9a7cfc	xprt_disconnect_done
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8dd12c19	svc_addsock
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x91bbda06	rpc_call_async
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x91e941b2	svc_create_pooled
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x926caec0	svc_reg_xprt_class
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x93204926	svc_process
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x98936b13	rpc_put_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9afc5688	xdr_encode_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9c495e74	rpc_malloc
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9d38968a	rpc_peeraddr2str
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9d5ba1ca	rpc_get_mount
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9fb58f70	sunrpc_cache_pipe_upcall
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa21fb0ef	svc_prepare_thread
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa2840f2b	rpcauth_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa5ae9efd	rpcauth_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa75d8a9d	xprt_unregister_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa7980691	auth_unix_add_addr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa7d04d29	xdr_skb_read_bits
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xac5b9953	rpc_call_sync
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xad34d7e2	xdr_encode_array2
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xad6c080f	xprt_reserve_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xae409b5f	rpc_wake_up_next
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xaf295356	xdr_decode_word
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xaf5bf6ef	nfs_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb17298a9	cache_check
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb783ccb3	rpc_call_start
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb7dd1629	rpc_shutdown_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb88dc3b0	rpc_wake_up_status
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb9ec35a6	xdr_buf_read_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbf72feaa	sunrpc_cache_update
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbf9d1b96	nfsd_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc12435e3	rpc_calc_rto
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc13544f1	svc_set_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc181c925	rpc_exit_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc38107bc	put_rpccred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc3880471	xdr_decode_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc5b0c737	svc_destroy
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc6580dd2	xprt_write_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc8e96dea	qword_addhex
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcbba080b	svc_unreg_xprt_class
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcc7d5ca3	auth_unix_forget_old
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xccc2372e	rpc_pton
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcee467f3	xprt_load_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcf759850	svc_create_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd21bdebc	rpcauth_lookup_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd4753b56	rpc_wake_up_queued_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd542e0a2	rpc_bind_new_program
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd6fdc242	rpc_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd754180d	xdr_reserve_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd82d8d6e	svc_set_num_threads
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd950f6ef	auth_domain_find
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd958a45f	svc_max_payload
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xddc24601	rpc_run_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xde0665fb	xdr_inline_decode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdf00fc67	svc_proc_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdf7a87d4	rpc_unlink
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe053b098	read_bytes_from_xdr_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe080692b	rpc_call_null
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe0a7f59f	rpcb_getport_async
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe16a9b29	xdr_encode_word
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe1d57601	svcauth_unix_set_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe4d3df8e	xdr_read_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe5919cb1	xdr_encode_opaque
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe86a31f6	rpc_lookup_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe97f4ce5	qword_get
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xec9d49be	rpcauth_init_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xedcf6be4	qword_add
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xeeacab69	rpc_update_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf3390881	svc_drop
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf7690225	rpc_sleep_on
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf7cefc01	rpc_restart_call
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf9d1164c	rpc_free
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfa9a0ace	xprt_wake_pending_tasks
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfbf0940b	unix_domain_find
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfc642210	svc_sock_create
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x2e5cb59f	wimax_msg_alloc
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x407426f1	wimax_msg_len
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x4314c89f	wimax_dev_add
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x5c1cbd7d	wimax_report_rfkill_sw
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x6b766b52	wimax_state_change
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x7479e64e	wimax_dev_init
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x918b8f32	wimax_msg
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xa9fb295a	wimax_msg_data_len
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xb0c0af29	wimax_msg_send
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xb7a2f69e	wimax_dev_rm
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xbf9cc56a	wimax_report_rfkill_hw
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xcebf1748	wimax_state_get
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xd4dc89bd	wimax_msg_data
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x080c82ec	cfg80211_wext_siwessid
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x0e627e59	cfg80211_wext_siwpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x1522acb9	cfg80211_wext_giwrts
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x15d82e77	cfg80211_wext_giwauth
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x1f0f4587	cfg80211_wext_siwscan
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x21b5037f	cfg80211_wext_siwencodeext
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x239a6411	cfg80211_wext_giwfreq
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x2cb60e3c	cfg80211_wext_siwrate
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x4151d0e6	cfg80211_wext_giwencode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x428c68ea	cfg80211_wext_giwretry
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x4701ba59	cfg80211_wext_siwtxpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x4d4bfbb2	cfg80211_wext_giwtxpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x59dae76d	cfg80211_wext_giwrange
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x606e3045	cfg80211_wext_siwap
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x71381f82	cfg80211_wext_siwencode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x7f305b20	cfg80211_wext_siwfrag
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x7f4a6dcd	cfg80211_wext_giwap
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x80346f15	cfg80211_wext_giwscan
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x84f02169	cfg80211_wext_siwmode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x99b07b0e	cfg80211_wext_giwfrag
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x9e74934e	cfg80211_wext_siwmlme
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x9e9db96c	cfg80211_wext_giwmode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x9ebce505	cfg80211_wext_siwretry
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xa088ad6f	cfg80211_wext_giwname
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xc0e64b5e	cfg80211_wext_siwfreq
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xca362e12	cfg80211_wext_giwrate
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xd252f3b6	cfg80211_wext_giwpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xd43c0f03	cfg80211_wext_giwessid
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xd54f5e38	cfg80211_wireless_stats
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xe518013e	cfg80211_wext_siwgenie
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xf3580e59	cfg80211_wext_siwauth
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xf65e83f6	cfg80211_wext_siwrts
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x4284984d	ipcomp_input
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x62a17344	ipcomp_init_state
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x9f5e799d	ipcomp_output
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0xf4f3cd0a	ipcomp_destroy
+EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0x82a1fbe1	ftr_gpio_methods
+EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0x8e4b888f	aoa_snd_device_new
+EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0x91adb9f2	aoa_get_card
+EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0x9e5641f7	aoa_fabric_register
+EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0xb12c5c92	aoa_snd_ctl_add
+EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0xb4754406	aoa_codec_register
+EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0xb6593375	aoa_fabric_unlink_codec
+EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0xd42a4ee7	aoa_fabric_unregister
+EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0xdb896590	aoa_codec_unregister
+EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0xfd998100	pmf_gpio_methods
+EXPORT_SYMBOL_GPL sound/aoa/soundbus/snd-aoa-soundbus 0x1ba1cbff	soundbus_remove_one
+EXPORT_SYMBOL_GPL sound/aoa/soundbus/snd-aoa-soundbus 0x48244ce7	soundbus_dev_put
+EXPORT_SYMBOL_GPL sound/aoa/soundbus/snd-aoa-soundbus 0x5306f395	soundbus_register_driver
+EXPORT_SYMBOL_GPL sound/aoa/soundbus/snd-aoa-soundbus 0x6232c0a0	soundbus_dev_get
+EXPORT_SYMBOL_GPL sound/aoa/soundbus/snd-aoa-soundbus 0x7612a13a	soundbus_add_one
+EXPORT_SYMBOL_GPL sound/aoa/soundbus/snd-aoa-soundbus 0xf5bc63c9	soundbus_unregister_driver
+EXPORT_SYMBOL_GPL sound/core/snd-pcm 0xa286a234	snd_pcm_format_name
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x01e4828d	snd_hda_mixer_bind_ctls_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x03644613	snd_hda_multi_out_analog_prepare
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x059c34c6	snd_hda_suspend
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x07a9c0f5	snd_hda_multi_out_analog_cleanup
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0dff9df6	snd_hda_mixer_amp_switch_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x11621e38	snd_hda_codec_setup_stream
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x11f6f9ef	snd_hda_get_sub_nodes
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x15901382	snd_hda_multi_out_analog_open
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x16187b82	snd_hda_codec_amp_read
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x187ce0fc	snd_hda_mixer_amp_volume_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1a3e45d2	snd_hda_detach_beep_device
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1ac71d30	snd_hda_multi_out_dig_close
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1d00b417	snd_hda_resume
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1d526dde	snd_hda_set_vmaster_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1eab3d25	snd_hda_codec_write
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2949b19a	snd_hda_queue_unsol_event
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2ec975dd	snd_hda_is_supported_format
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x30403607	snd_hda_codec_resume_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x379857aa	snd_hda_mixer_amp_volume_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3b5fa01c	snd_hda_build_pcms
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3ee435e6	snd_hda_sequence_write_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x429619f9	snd_hda_parse_pin_def_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x457e7441	snd_hda_ch_mode_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x497820f1	snd_hda_mixer_amp_volume_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x49b98b28	snd_hda_codec_read
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4b5f36f0	snd_hda_power_up
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x50e04280	snd_hda_mixer_bind_ctls_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x55df6e2c	query_amp_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5724827b	snd_hda_power_down
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5ae76f73	auto_pin_cfg_labels
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5cfb5dfb	snd_hda_mixer_amp_switch_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5f0fcb2a	snd_hda_build_controls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5f769be2	snd_hda_codec_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x610d88b5	snd_hda_codec_write_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x63d20f35	snd_hda_multi_out_dig_cleanup
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x65c9e1e2	snd_hda_check_board_codec_sid_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x68256bc4	snd_hda_attach_beep_device
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x69307009	snd_hda_get_connections
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6c760bda	snd_hda_mixer_amp_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x70f9f44b	snd_hda_bind_sw
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7135ac5a	snd_hda_bind_vol
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x731feaad	snd_hda_mixer_amp_switch_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x77134702	snd_hda_query_pin_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x78d4663e	snd_hda_check_board_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7eb92366	snd_hda_add_codec_preset
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7f04f5d6	snd_hda_mixer_bind_ctls_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x82127f19	snd_hda_bus_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x870fcc32	snd_hda_codec_get_pincfg
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x87c72cf5	snd_hda_get_hint
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8f16c153	snd_hda_create_spdif_in_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9943c8c3	snd_hda_multi_out_dig_open
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9a8e1877	snd_array_free
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa2827d76	snd_hda_get_jack_location
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa4c216d6	snd_hda_multi_out_dig_prepare
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xaca4cd3b	snd_hda_get_bool_hint
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xad87613e	snd_print_pcm_rates
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xaec63afe	snd_hda_codec_amp_update
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xaf29091a	snd_hda_load_patch
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbcb4f59d	snd_hda_codec_set_pincfg
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbe7dd7dc	snd_array_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc34a54c6	snd_hda_calc_stream_format
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc652fd69	snd_hda_get_jack_connectivity
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc8b5d928	snd_hda_mixer_bind_switch_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc9a8647d	snd_hda_ch_mode_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc9d911d8	snd_hda_delete_codec_preset
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcb301b6e	snd_hda_get_jack_type
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcce27eb0	snd_hda_input_mux_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcd8361d0	snd_hda_create_spdif_out_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcdadb421	snd_hda_codec_resume_amp
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd172495c	snd_hda_add_vmaster
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd251271b	snd_hda_input_mux_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd59b611e	snd_hda_codec_amp_stereo
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd7ea7f5c	snd_hda_add_new_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd91617ad	snd_hda_find_mixer_ctl
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xdce31e9b	snd_hda_override_amp_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xdd6d4968	snd_hda_codec_configure
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xde4781ab	snd_hda_create_spdif_share_sw
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe7516e7e	snd_hda_mixer_bind_switch_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe767af00	snd_hda_check_amp_list_power
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeda3a721	snd_print_pcm_bits
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeda685cd	snd_hda_codec_cleanup_stream
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf0ea1103	snd_hda_ctl_add
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf11fd646	snd_hda_mixer_bind_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xfe1e0495	snd_hda_sequence_write
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xfed2c33b	snd_hda_ch_mode_info
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1836 0x3308071f	ad1836_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1836 0xd9a9b603	soc_codec_dev_ad1836
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1938 0xc5a866f1	ad1938_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1938 0xff96fce8	soc_codec_dev_ad1938
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0x87a3d0d0	soc_codec_dev_ad73311
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0xd2c2a8d8	ad73311_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4104 0x9678f183	soc_codec_device_ak4104
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0x395800b8	soc_codec_dev_ak4535
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0x95057ea2	ak4535_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4642 0x61e32f14	soc_codec_dev_ak4642
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4642 0xc3287777	ak4642_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0x5757bac6	cs4270_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0x9df41c33	soc_codec_device_cs4270
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-l3 0x78c84c7e	l3_write
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-max9877 0xf5473a09	max9877_add_controls
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0x9db58aea	soc_codec_dev_pcm3008
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0xcd8557d6	pcm3008_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-spdif 0x1f8f2820	dit_stub_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0x64627f4f	ssm2602_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0x96008f21	soc_codec_dev_ssm2602
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0x09e44668	tlv320aic23_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0xd1a6a825	soc_codec_dev_tlv320aic23
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0x649b8c31	aic26_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0xdea5f033	aic26_soc_codec_dev
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x021e6009	soc_codec_dev_aic3x
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x102595c6	aic3x_set_gpio
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x428d938c	aic3x_set_headset_detection
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x477ac945	aic3x_get_gpio
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xe102470b	aic3x_headset_detected
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xee11f502	aic3x_button_pressed
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xf7beec99	aic3x_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0x398d0729	soc_codec_dev_twl4030
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0xaca44174	twl4030_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda134x 0xf835612c	soc_codec_dev_uda134x
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x1ee434a3	uda1380_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0xc98f5d45	soc_codec_dev_uda1380
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0x0c988781	wm_hubs_add_analogue_routes
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0x757206d5	wm_hubs_spkmix_tlv
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0x8c112fa0	wm_hubs_add_analogue_controls
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x07facadf	wm8350_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x2135f927	wm8350_hp_jack_detect
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x879a5672	soc_codec_dev_wm8350
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x1c86ac20	soc_codec_dev_wm8400
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x5f07ec61	wm8400_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0x500c877b	soc_codec_dev_wm8510
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0xff3e73e3	wm8510_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8523 0x48421bd0	wm8523_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8523 0x79676ae1	soc_codec_dev_wm8523
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0x5fddbcf4	soc_codec_dev_wm8580
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0xb489e024	wm8580_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0x309a7ba1	soc_codec_dev_wm8728
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0x60a0ec6e	wm8728_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0xe09aaadf	soc_codec_dev_wm8731
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0xe1d8b612	wm8731_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x4954508d	wm8750_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0xfd0ce72c	soc_codec_dev_wm8750
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0x96d9370f	wm8753_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0xd621b4ef	soc_codec_dev_wm8753
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8776 0xa8d294c4	soc_codec_dev_wm8776
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8776 0xc654fa3a	wm8776_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0x0ee66d18	wm8900_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0x1b1852f4	soc_codec_dev_wm8900
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0x30350137	soc_codec_dev_wm8903
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0x88721fb6	wm8903_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0x1c11fa28	soc_codec_dev_wm8940
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0xfaa9490b	wm8940_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0x1f952e46	soc_codec_dev_wm8960
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0x6d365822	wm8960_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8961 0x068e1f07	soc_codec_dev_wm8961
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8961 0xa66a8b87	wm8961_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0x001d8033	wm8971_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0x074c7530	soc_codec_dev_wm8971
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8974 0x50d01180	wm8974_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8974 0x7a3b8175	soc_codec_dev_wm8974
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0xd15aa112	wm8988_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0xddd28944	soc_codec_dev_wm8988
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0x14c9697b	soc_codec_dev_wm8990
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0x9b7e28cb	wm8990_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8993 0x1dea5a65	wm8993_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8993 0x3fe43ab8	soc_codec_dev_wm8993
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0x4c785437	soc_codec_dev_wm9081
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0xfe61ffb2	wm9081_dai
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x05ab6862	snd_soc_free_ac97_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0b542cae	snd_soc_get_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0f276f23	snd_soc_get_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x115bb2fd	snd_soc_info_enum_ext
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x15a456be	snd_soc_register_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x24c8d6e3	snd_soc_dapm_get_pin_status
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2538ceec	snd_soc_jack_add_pins
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x261d7650	snd_soc_dapm_new_widgets
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x27e1e870	snd_soc_unregister_platform
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3035454f	snd_soc_dapm_disable_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x32605c97	snd_soc_cnew
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x32a39266	snd_soc_jack_new
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x32d2de1f	snd_soc_put_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x37eb2071	snd_soc_dapm_free
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3a0da550	snd_soc_dapm_nc_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3cd6da32	snd_soc_dapm_put_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3eb992a1	snd_soc_dapm_get_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x41c3e415	snd_soc_dai_set_fmt
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x448fa151	snd_soc_put_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4a6300ad	snd_soc_dapm_stream_event
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4a6f8b29	snd_soc_dai_set_tristate
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4d44373d	snd_soc_unregister_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x53cbbb6e	snd_soc_set_runtime_hwparams
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x57429a97	snd_soc_resume_device
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5b81a09f	snd_soc_put_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5d316cb2	snd_soc_info_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x616f0a66	snd_soc_get_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x62c701b6	snd_soc_dai_set_sysclk
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x63e4523e	snd_soc_info_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6577bf8e	snd_soc_dapm_put_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6dcc423a	snd_soc_dapm_get_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x70da38cd	snd_soc_dai_digital_mute
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7380f30d	snd_soc_new_pcms
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x73875137	snd_soc_free_pcms
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x76aed5d9	snd_soc_dapm_info_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7cb5c04f	snd_soc_unregister_dais
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7e610ba8	snd_soc_get_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8abe5d14	snd_soc_dai_set_tdm_slot
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8e410c5b	snd_soc_info_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x92d1c88a	snd_soc_dapm_get_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9a202c2f	snd_soc_dapm_add_routes
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9acd92e3	snd_soc_update_bits
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9aea6c50	snd_soc_codec_set_cache_io
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9d99ed90	snd_soc_dapm_new_controls
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa297db2a	snd_soc_register_dai
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa54721ed	snd_soc_test_bits
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa668bc5a	snd_soc_put_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xaf47eecb	snd_soc_register_platform
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xaf716793	snd_soc_dai_set_pll
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb766f2ed	snd_soc_info_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xbcbec77e	snd_soc_suspend_device
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc0df98bf	snd_soc_codec_volatile_register
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc17aa39d	snd_soc_jack_add_gpios
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc4839143	snd_soc_dapm_put_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc574a91b	snd_soc_get_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc830f60c	snd_soc_init_card
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc986bd07	snd_soc_info_volsw_ext
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xca78c580	snd_soc_dapm_get_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xccc908ce	snd_soc_unregister_dai
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xcdc4b84d	snd_soc_dapm_put_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd1a10187	snd_soc_add_controls
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd5c38640	snd_soc_jack_free_gpios
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd68eaf0d	snd_soc_jack_report
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xda4e2db7	snd_soc_new_ac97_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xe0a7368e	snd_soc_dapm_enable_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xee3221d7	snd_soc_dai_set_clkdiv
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xee9a27e6	dapm_reg_event
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf413c6f4	snd_soc_register_dais
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf86f56c9	snd_soc_dapm_new_control
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf876b382	snd_soc_dapm_sync
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xfdfa331c	snd_soc_put_volsw
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x2a52bfbb	xv_malloc
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x4aff07d2	xv_create_pool
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x73bc1f25	xv_free
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0xa56cc910	xv_destroy_pool
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0xaf69699e	xv_get_object_size
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0xda64226d	xv_get_total_size_bytes
+EXPORT_SYMBOL_GPL vmlinux 0x000fd75e	rtc_set_mmss
+EXPORT_SYMBOL_GPL vmlinux 0x0037270f	pci_disable_rom
+EXPORT_SYMBOL_GPL vmlinux 0x0041e343	pmac_low_i2c_unlock
+EXPORT_SYMBOL_GPL vmlinux 0x00566d8f	inotify_get_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x0067df75	ata_tf_from_fis
+EXPORT_SYMBOL_GPL vmlinux 0x006e3d7e	ide_error
+EXPORT_SYMBOL_GPL vmlinux 0x008a1447	ata_sas_port_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x00ae2951	ide_release_dma_engine
+EXPORT_SYMBOL_GPL vmlinux 0x00ebcb5d	ata_id_string
+EXPORT_SYMBOL_GPL vmlinux 0x010a4b44	init_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0x013c12f0	sg_scsi_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x014d6192	pm_runtime_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x015f09b1	ata_sas_queuecmd
+EXPORT_SYMBOL_GPL vmlinux 0x016b9869	xfrm_calg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0x0181e4a6	__pm_runtime_set_status
+EXPORT_SYMBOL_GPL vmlinux 0x019c993b	sk_setup_caps
+EXPORT_SYMBOL_GPL vmlinux 0x01a4ea6d	unregister_die_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x01d835c9	sata_pmp_qc_defer_cmd_switch
+EXPORT_SYMBOL_GPL vmlinux 0x01e1a8de	kgdb_breakpoint
+EXPORT_SYMBOL_GPL vmlinux 0x01f363fb	single_open_net
+EXPORT_SYMBOL_GPL vmlinux 0x0212dcd1	rtc_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x024077e6	__trace_note_message
+EXPORT_SYMBOL_GPL vmlinux 0x0247b3d6	spi_sync
+EXPORT_SYMBOL_GPL vmlinux 0x02643ea3	put_device
+EXPORT_SYMBOL_GPL vmlinux 0x028a0c43	ata_sff_irq_on
+EXPORT_SYMBOL_GPL vmlinux 0x028a24fb	hrtimer_get_remaining
+EXPORT_SYMBOL_GPL vmlinux 0x028c8d19	kobject_rename
+EXPORT_SYMBOL_GPL vmlinux 0x02acdedc	__rtnl_link_register
+EXPORT_SYMBOL_GPL vmlinux 0x02ccea56	lock_policy_rwsem_write
+EXPORT_SYMBOL_GPL vmlinux 0x02cd5782	skcipher_geniv_exit
+EXPORT_SYMBOL_GPL vmlinux 0x02d6112e	ata_pio_need_iordy
+EXPORT_SYMBOL_GPL vmlinux 0x02e86e56	ata_sas_slave_configure
+EXPORT_SYMBOL_GPL vmlinux 0x0309a2a2	inet_csk_addr2sockaddr
+EXPORT_SYMBOL_GPL vmlinux 0x0343bdf1	__i2c_board_list
+EXPORT_SYMBOL_GPL vmlinux 0x03b019bf	crypto_unregister_shash
+EXPORT_SYMBOL_GPL vmlinux 0x03e3686c	ata_timing_cycle2mode
+EXPORT_SYMBOL_GPL vmlinux 0x03f3cdb1	__inet_hash_nolisten
+EXPORT_SYMBOL_GPL vmlinux 0x04069b1d	set_irq_nested_thread
+EXPORT_SYMBOL_GPL vmlinux 0x043046ae	device_initialize
+EXPORT_SYMBOL_GPL vmlinux 0x04486e88	rcu_batches_completed
+EXPORT_SYMBOL_GPL vmlinux 0x044a7489	hrtimer_start_range_ns
+EXPORT_SYMBOL_GPL vmlinux 0x04915a4f	driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x04a9d202	crypto_aead_setauthsize
+EXPORT_SYMBOL_GPL vmlinux 0x04e95741	ide_cd_expiry
+EXPORT_SYMBOL_GPL vmlinux 0x052f7ab3	klist_add_tail
+EXPORT_SYMBOL_GPL vmlinux 0x0531dcb8	ata_dev_classify
+EXPORT_SYMBOL_GPL vmlinux 0x054e550b	kernel_halt
+EXPORT_SYMBOL_GPL vmlinux 0x058eaf7c	__inet_inherit_port
+EXPORT_SYMBOL_GPL vmlinux 0x05f5d352	isa_bridge_pcidev
+EXPORT_SYMBOL_GPL vmlinux 0x05fdf243	sysfs_put
+EXPORT_SYMBOL_GPL vmlinux 0x0619ca8a	getboottime
+EXPORT_SYMBOL_GPL vmlinux 0x064db9a5	mark_mounts_for_expiry
+EXPORT_SYMBOL_GPL vmlinux 0x06785b24	inet_csk_bind_conflict
+EXPORT_SYMBOL_GPL vmlinux 0x069ad5ff	fuse_dev_release
+EXPORT_SYMBOL_GPL vmlinux 0x06d13f1f	ring_buffer_entries_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x06e3cd26	fib_rules_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x06faa096	bd_release_from_disk
+EXPORT_SYMBOL_GPL vmlinux 0x06fff9d1	ata_link_online
+EXPORT_SYMBOL_GPL vmlinux 0x07078633	xfrm_audit_state_delete
+EXPORT_SYMBOL_GPL vmlinux 0x072f0c12	single_release_net
+EXPORT_SYMBOL_GPL vmlinux 0x076be98a	usb_hcd_giveback_urb
+EXPORT_SYMBOL_GPL vmlinux 0x078b3d38	ide_pio_cycle_time
+EXPORT_SYMBOL_GPL vmlinux 0x07b52e38	rtnl_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x07bb8c43	cpufreq_frequency_table_target
+EXPORT_SYMBOL_GPL vmlinux 0x07eb5fbf	spi_alloc_device
+EXPORT_SYMBOL_GPL vmlinux 0x07f74407	eventfd_ctx_put
+EXPORT_SYMBOL_GPL vmlinux 0x082ede4b	usb_find_interface
+EXPORT_SYMBOL_GPL vmlinux 0x087bf1d8	ring_buffer_empty
+EXPORT_SYMBOL_GPL vmlinux 0x08cc5059	__ide_pci_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0x08f41756	__scsi_get_command
+EXPORT_SYMBOL_GPL vmlinux 0x090626b6	pm_runtime_barrier
+EXPORT_SYMBOL_GPL vmlinux 0x09068272	get_driver
+EXPORT_SYMBOL_GPL vmlinux 0x091c824a	machine_power_off
+EXPORT_SYMBOL_GPL vmlinux 0x091eb9b4	round_jiffies
+EXPORT_SYMBOL_GPL vmlinux 0x09597096	devres_add
+EXPORT_SYMBOL_GPL vmlinux 0x0987bc30	ata_wait_after_reset
+EXPORT_SYMBOL_GPL vmlinux 0x09895a55	crypto_givcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0x09a19a19	transport_class_register
+EXPORT_SYMBOL_GPL vmlinux 0x09bdb89d	dev_attr_em_message
+EXPORT_SYMBOL_GPL vmlinux 0x0a51ae5b	virq_to_hw
+EXPORT_SYMBOL_GPL vmlinux 0x0a70818e	pmf_call_one
+EXPORT_SYMBOL_GPL vmlinux 0x0adda751	sched_setscheduler
+EXPORT_SYMBOL_GPL vmlinux 0x0adf2819	inet_csk_search_req
+EXPORT_SYMBOL_GPL vmlinux 0x0af6e71d	usb_string
+EXPORT_SYMBOL_GPL vmlinux 0x0b07abe2	unshare_fs_struct
+EXPORT_SYMBOL_GPL vmlinux 0x0b098e22	ide_port_scan
+EXPORT_SYMBOL_GPL vmlinux 0x0b277d89	usb_kill_urb
+EXPORT_SYMBOL_GPL vmlinux 0x0b2db87e	led_trigger_register_simple
+EXPORT_SYMBOL_GPL vmlinux 0x0b628ffd	tcp_register_congestion_control
+EXPORT_SYMBOL_GPL vmlinux 0x0b7a3689	fuse_file_poll
+EXPORT_SYMBOL_GPL vmlinux 0x0b8b8a1f	bus_sort_breadthfirst
+EXPORT_SYMBOL_GPL vmlinux 0x0bbefa0a	usb_autopm_get_interface
+EXPORT_SYMBOL_GPL vmlinux 0x0be1ffd1	pci_slots_kset
+EXPORT_SYMBOL_GPL vmlinux 0x0be782b2	led_classdev_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x0c0c41a5	ring_buffer_read_finish
+EXPORT_SYMBOL_GPL vmlinux 0x0c10b85a	sysdev_show_ulong
+EXPORT_SYMBOL_GPL vmlinux 0x0c2cdbf1	synchronize_sched
+EXPORT_SYMBOL_GPL vmlinux 0x0c3de750	ata_sff_wait_after_reset
+EXPORT_SYMBOL_GPL vmlinux 0x0c9325a0	debugfs_create_x8
+EXPORT_SYMBOL_GPL vmlinux 0x0cb88680	__tracepoint_block_rq_remap
+EXPORT_SYMBOL_GPL vmlinux 0x0cc2efea	destroy_workqueue
+EXPORT_SYMBOL_GPL vmlinux 0x0d132bd4	pci_set_pcie_reset_state
+EXPORT_SYMBOL_GPL vmlinux 0x0d239ed5	ip_route_output_flow
+EXPORT_SYMBOL_GPL vmlinux 0x0d2773cc	blk_queue_rq_timeout
+EXPORT_SYMBOL_GPL vmlinux 0x0d5b835f	get_net_ns_by_pid
+EXPORT_SYMBOL_GPL vmlinux 0x0d8556ed	skcipher_geniv_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x0daa786d	device_add
+EXPORT_SYMBOL_GPL vmlinux 0x0e4b5229	pcibios_finish_adding_to_bus
+EXPORT_SYMBOL_GPL vmlinux 0x0ec76932	crypto_ahash_type
+EXPORT_SYMBOL_GPL vmlinux 0x0efd900b	device_find_child
+EXPORT_SYMBOL_GPL vmlinux 0x0f0a7799	sata_std_hardreset
+EXPORT_SYMBOL_GPL vmlinux 0x0f2d5658	sysfs_notify
+EXPORT_SYMBOL_GPL vmlinux 0x0f6b1f36	__pci_reset_function
+EXPORT_SYMBOL_GPL vmlinux 0x0f7ee96c	usb_buffer_unmap_sg
+EXPORT_SYMBOL_GPL vmlinux 0x0fa91604	ata_sff_tf_read
+EXPORT_SYMBOL_GPL vmlinux 0x0fb4f960	pci_bus_add_device
+EXPORT_SYMBOL_GPL vmlinux 0x0fd05a27	register_kretprobe
+EXPORT_SYMBOL_GPL vmlinux 0x0fe1f219	bus_get_device_klist
+EXPORT_SYMBOL_GPL vmlinux 0x10138352	tracing_on
+EXPORT_SYMBOL_GPL vmlinux 0x101c923e	__tracepoint_power_start
+EXPORT_SYMBOL_GPL vmlinux 0x1027020d	ide_dma_setup
+EXPORT_SYMBOL_GPL vmlinux 0x1098795e	nf_register_afinfo
+EXPORT_SYMBOL_GPL vmlinux 0x10ec7b44	pmac_i2c_get_dev_addr
+EXPORT_SYMBOL_GPL vmlinux 0x1130addb	register_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0x1150ad74	device_for_each_child
+EXPORT_SYMBOL_GPL vmlinux 0x115c533a	hvc_poll
+EXPORT_SYMBOL_GPL vmlinux 0x116a1f32	task_current_syscall
+EXPORT_SYMBOL_GPL vmlinux 0x11955db8	pmac_backlight_mutex
+EXPORT_SYMBOL_GPL vmlinux 0x11e3d5e9	do_sync_mapping_range
+EXPORT_SYMBOL_GPL vmlinux 0x11f447ce	__gpio_to_irq
+EXPORT_SYMBOL_GPL vmlinux 0x120e5078	power_supply_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x1214bce3	led_trigger_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x124f2056	crypto_get_attr_type
+EXPORT_SYMBOL_GPL vmlinux 0x1251d30f	call_rcu
+EXPORT_SYMBOL_GPL vmlinux 0x1256109f	sk_clone
+EXPORT_SYMBOL_GPL vmlinux 0x1268f357	resume_device_irqs
+EXPORT_SYMBOL_GPL vmlinux 0x12d1b9b1	ide_init_pc
+EXPORT_SYMBOL_GPL vmlinux 0x1306724a	crypto_chain
+EXPORT_SYMBOL_GPL vmlinux 0x131477ed	__rt_mutex_init
+EXPORT_SYMBOL_GPL vmlinux 0x133adcb1	ata_noop_qc_prep
+EXPORT_SYMBOL_GPL vmlinux 0x1348db5c	pmac_i2c_get_flags
+EXPORT_SYMBOL_GPL vmlinux 0x1355be72	eventfd_fget
+EXPORT_SYMBOL_GPL vmlinux 0x137d5fac	regulator_enable
+EXPORT_SYMBOL_GPL vmlinux 0x13868451	fuse_do_open
+EXPORT_SYMBOL_GPL vmlinux 0x13b2a946	register_keyboard_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x13bb0772	tcp_get_info
+EXPORT_SYMBOL_GPL vmlinux 0x13e33054	tty_ldisc_ref_wait
+EXPORT_SYMBOL_GPL vmlinux 0x13f7b82e	dev_set_name
+EXPORT_SYMBOL_GPL vmlinux 0x143accf6	blk_trace_startstop
+EXPORT_SYMBOL_GPL vmlinux 0x14485194	ring_buffer_iter_peek
+EXPORT_SYMBOL_GPL vmlinux 0x144ca71b	klist_iter_init_node
+EXPORT_SYMBOL_GPL vmlinux 0x1471692a	blk_trace_remove
+EXPORT_SYMBOL_GPL vmlinux 0x149db923	selinux_string_to_sid
+EXPORT_SYMBOL_GPL vmlinux 0x14d33a51	ata_port_probe
+EXPORT_SYMBOL_GPL vmlinux 0x14e636cc	ring_buffer_lock_reserve
+EXPORT_SYMBOL_GPL vmlinux 0x14ffc454	ata_sg_init
+EXPORT_SYMBOL_GPL vmlinux 0x1503b580	ide_pci_init_one
+EXPORT_SYMBOL_GPL vmlinux 0x154548df	crypto_init_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x15892417	async_synchronize_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x1598dc9d	unregister_netevent_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x15a68eea	regulator_bulk_free
+EXPORT_SYMBOL_GPL vmlinux 0x15cdd977	generic_fh_to_parent
+EXPORT_SYMBOL_GPL vmlinux 0x16746fb9	ide_prep_sense
+EXPORT_SYMBOL_GPL vmlinux 0x16cd27db	skb_pull_rcsum
+EXPORT_SYMBOL_GPL vmlinux 0x16f76869	probe_kernel_read
+EXPORT_SYMBOL_GPL vmlinux 0x16fb347b	__blocking_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x1717922b	pci_rescan_bus
+EXPORT_SYMBOL_GPL vmlinux 0x172bea8f	rtc_read_time
+EXPORT_SYMBOL_GPL vmlinux 0x172f7ed6	usb_add_hcd
+EXPORT_SYMBOL_GPL vmlinux 0x1763b4bb	sata_pmp_error_handler
+EXPORT_SYMBOL_GPL vmlinux 0x17781d19	ata_sff_host_intr
+EXPORT_SYMBOL_GPL vmlinux 0x178959bd	ata_pci_device_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x17be4441	ide_output_data
+EXPORT_SYMBOL_GPL vmlinux 0x17df24d6	usb_sg_wait
+EXPORT_SYMBOL_GPL vmlinux 0x17fb8086	add_to_page_cache_lru
+EXPORT_SYMBOL_GPL vmlinux 0x180797e8	__ata_ehi_push_desc
+EXPORT_SYMBOL_GPL vmlinux 0x18533c47	usb_match_one_id
+EXPORT_SYMBOL_GPL vmlinux 0x1878f62b	edac_err_assert
+EXPORT_SYMBOL_GPL vmlinux 0x18984673	rtnl_link_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x18d53420	kgdb_register_io_module
+EXPORT_SYMBOL_GPL vmlinux 0x1908dfba	ata_sff_drain_fifo
+EXPORT_SYMBOL_GPL vmlinux 0x191fb096	srcu_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x193e606b	usb_autopm_put_interface_async
+EXPORT_SYMBOL_GPL vmlinux 0x19a304ba	usb_disabled
+EXPORT_SYMBOL_GPL vmlinux 0x19b37ef3	__root_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x19b70ac1	perf_tp_event
+EXPORT_SYMBOL_GPL vmlinux 0x19fb62a3	device_create_vargs
+EXPORT_SYMBOL_GPL vmlinux 0x19fbdd99	ide_dma_sff_read_status
+EXPORT_SYMBOL_GPL vmlinux 0x1a0fefd4	class_compat_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x1a323362	__ftrace_vbprintk
+EXPORT_SYMBOL_GPL vmlinux 0x1a399f32	ring_buffer_overruns
+EXPORT_SYMBOL_GPL vmlinux 0x1a474901	tracepoint_probe_unregister_noupdate
+EXPORT_SYMBOL_GPL vmlinux 0x1a59cd38	aead_geniv_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x1a9c6f2d	pmf_put_function
+EXPORT_SYMBOL_GPL vmlinux 0x1aaadf0a	platform_add_devices
+EXPORT_SYMBOL_GPL vmlinux 0x1b7f9f8a	klist_add_head
+EXPORT_SYMBOL_GPL vmlinux 0x1b9aca3f	jprobe_return
+EXPORT_SYMBOL_GPL vmlinux 0x1bad70f3	ide_pci_resume
+EXPORT_SYMBOL_GPL vmlinux 0x1bcd2b92	ata_host_start
+EXPORT_SYMBOL_GPL vmlinux 0x1bcdddb8	anon_inode_getfd
+EXPORT_SYMBOL_GPL vmlinux 0x1bdd1eca	rtc_update_irq
+EXPORT_SYMBOL_GPL vmlinux 0x1bf47e56	regulator_get_init_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0x1c852e7c	xfrm_calg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x1c869835	find_module
+EXPORT_SYMBOL_GPL vmlinux 0x1c87a811	__round_jiffies_up
+EXPORT_SYMBOL_GPL vmlinux 0x1cb095e1	hrtimer_init_sleeper
+EXPORT_SYMBOL_GPL vmlinux 0x1cbb8507	blk_rq_prep_clone
+EXPORT_SYMBOL_GPL vmlinux 0x1ce4365b	crypto_shash_final
+EXPORT_SYMBOL_GPL vmlinux 0x1cf5680a	__cpufreq_driver_target
+EXPORT_SYMBOL_GPL vmlinux 0x1d8f8059	__tracepoint_power_end
+EXPORT_SYMBOL_GPL vmlinux 0x1db21d74	__tracepoint_kfree_skb
+EXPORT_SYMBOL_GPL vmlinux 0x1dee2629	trace_current_buffer_lock_reserve
+EXPORT_SYMBOL_GPL vmlinux 0x1e0d648d	transport_add_device
+EXPORT_SYMBOL_GPL vmlinux 0x1e1c8309	led_trigger_remove
+EXPORT_SYMBOL_GPL vmlinux 0x1e37c24e	fuse_conn_put
+EXPORT_SYMBOL_GPL vmlinux 0x1e46e086	shash_ahash_digest
+EXPORT_SYMBOL_GPL vmlinux 0x1e7bbcb3	kernel_restart
+EXPORT_SYMBOL_GPL vmlinux 0x1e9acdb0	ide_map_sg
+EXPORT_SYMBOL_GPL vmlinux 0x1eb9516e	round_jiffies_relative
+EXPORT_SYMBOL_GPL vmlinux 0x1ebab681	led_trigger_event
+EXPORT_SYMBOL_GPL vmlinux 0x1ebf6c2a	pci_power_names
+EXPORT_SYMBOL_GPL vmlinux 0x1f11c36e	put_driver
+EXPORT_SYMBOL_GPL vmlinux 0x1f35b41b	platform_device_add_resources
+EXPORT_SYMBOL_GPL vmlinux 0x1f47c342	usb_buffer_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x1f6c6bd5	relay_flush
+EXPORT_SYMBOL_GPL vmlinux 0x1fa3023f	cpufreq_freq_attr_scaling_available_freqs
+EXPORT_SYMBOL_GPL vmlinux 0x1fc9d387	unregister_ftrace_event
+EXPORT_SYMBOL_GPL vmlinux 0x1fcece42	inet_twdr_twcal_tick
+EXPORT_SYMBOL_GPL vmlinux 0x1fe75b7e	usb_create_hcd
+EXPORT_SYMBOL_GPL vmlinux 0x1fefdae5	ring_buffer_commit_overrun_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x20596565	usb_wait_anchor_empty_timeout
+EXPORT_SYMBOL_GPL vmlinux 0x209fd64c	uhci_check_and_reset_hc
+EXPORT_SYMBOL_GPL vmlinux 0x20b640a4	usb_root_hub_lost_power
+EXPORT_SYMBOL_GPL vmlinux 0x20b86772	tty_put_char
+EXPORT_SYMBOL_GPL vmlinux 0x20bc3470	orderly_poweroff
+EXPORT_SYMBOL_GPL vmlinux 0x2105d3c5	ide_pci_set_master
+EXPORT_SYMBOL_GPL vmlinux 0x21195975	debugfs_remove_recursive
+EXPORT_SYMBOL_GPL vmlinux 0x21353f51	spi_async
+EXPORT_SYMBOL_GPL vmlinux 0x215bcbe0	klist_next
+EXPORT_SYMBOL_GPL vmlinux 0x215db6e9	tracepoint_probe_register_noupdate
+EXPORT_SYMBOL_GPL vmlinux 0x2217225e	ata_pci_bmdma_init
+EXPORT_SYMBOL_GPL vmlinux 0x2282a839	regulator_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x2296c00d	crypto_attr_u32
+EXPORT_SYMBOL_GPL vmlinux 0x22e2c20b	atomic_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x232cd2b6	pmf_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0x232d2beb	crypto_hash_walk_first
+EXPORT_SYMBOL_GPL vmlinux 0x23679939	__iowrite32_copy
+EXPORT_SYMBOL_GPL vmlinux 0x23744761	tty_prepare_flip_string_flags
+EXPORT_SYMBOL_GPL vmlinux 0x23864ce7	cpuset_mem_spread_node
+EXPORT_SYMBOL_GPL vmlinux 0x23869dc7	cancel_work_sync
+EXPORT_SYMBOL_GPL vmlinux 0x23892240	da903x_write
+EXPORT_SYMBOL_GPL vmlinux 0x23a0179f	sysdev_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x23f073be	debugfs_rename
+EXPORT_SYMBOL_GPL vmlinux 0x23fc87d0	ide_timing_find_mode
+EXPORT_SYMBOL_GPL vmlinux 0x2406dae3	pci_address_to_pio
+EXPORT_SYMBOL_GPL vmlinux 0x241739d7	sysdev_class_register
+EXPORT_SYMBOL_GPL vmlinux 0x241c916a	blk_add_driver_data
+EXPORT_SYMBOL_GPL vmlinux 0x2455ef86	regulator_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x247ecca7	__blkdev_driver_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x2493924a	ring_buffer_resize
+EXPORT_SYMBOL_GPL vmlinux 0x24c70898	inet_diag_register
+EXPORT_SYMBOL_GPL vmlinux 0x24cda041	ide_vlb_clk
+EXPORT_SYMBOL_GPL vmlinux 0x24eb7e32	leds_list
+EXPORT_SYMBOL_GPL vmlinux 0x269d0d78	relay_open
+EXPORT_SYMBOL_GPL vmlinux 0x26c90ea4	scsi_eh_get_sense
+EXPORT_SYMBOL_GPL vmlinux 0x26fb86e8	usb_autopm_get_interface_async
+EXPORT_SYMBOL_GPL vmlinux 0x2730dcfc	relay_file_operations
+EXPORT_SYMBOL_GPL vmlinux 0x2758cf79	ide_timing_compute
+EXPORT_SYMBOL_GPL vmlinux 0x2787db00	vbin_printf
+EXPORT_SYMBOL_GPL vmlinux 0x27965113	i2c_unregister_device
+EXPORT_SYMBOL_GPL vmlinux 0x27adf232	tracing_generic_entry_update
+EXPORT_SYMBOL_GPL vmlinux 0x27e28800	led_trigger_register
+EXPORT_SYMBOL_GPL vmlinux 0x280d3dc7	pmac_i2c_detach_adapter
+EXPORT_SYMBOL_GPL vmlinux 0x288d5f78	dequeue_signal
+EXPORT_SYMBOL_GPL vmlinux 0x28aec710	tcp_slow_start
+EXPORT_SYMBOL_GPL vmlinux 0x28b2cc80	atomic_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x28d664ff	__raw_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x28e23139	xfrm_probe_algs
+EXPORT_SYMBOL_GPL vmlinux 0x29111d89	ata_eh_analyze_ncq_error
+EXPORT_SYMBOL_GPL vmlinux 0x2949a71a	usb_reset_endpoint
+EXPORT_SYMBOL_GPL vmlinux 0x297c2f40	cpu_add_sysdev_attr
+EXPORT_SYMBOL_GPL vmlinux 0x299a3f8e	crypto_ahash_setkey
+EXPORT_SYMBOL_GPL vmlinux 0x29ae19b9	bdi_writeout_inc
+EXPORT_SYMBOL_GPL vmlinux 0x29b23d20	ata_sff_irq_clear
+EXPORT_SYMBOL_GPL vmlinux 0x29c9215f	ata_scsi_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x2a45f313	ata_pci_sff_activate_host
+EXPORT_SYMBOL_GPL vmlinux 0x2a678a13	__suspend_report_result
+EXPORT_SYMBOL_GPL vmlinux 0x2ab37810	netlink_has_listeners
+EXPORT_SYMBOL_GPL vmlinux 0x2ab67fa1	ata_std_prereset
+EXPORT_SYMBOL_GPL vmlinux 0x2aca0c38	ata_port_disable
+EXPORT_SYMBOL_GPL vmlinux 0x2aef3398	sysfs_get
+EXPORT_SYMBOL_GPL vmlinux 0x2b03edc0	ata_host_init
+EXPORT_SYMBOL_GPL vmlinux 0x2b3953e4	tracepoint_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0x2b47ad38	ide_read_altstatus
+EXPORT_SYMBOL_GPL vmlinux 0x2b607170	ktime_sub_ns
+EXPORT_SYMBOL_GPL vmlinux 0x2b9f8e23	nf_net_ipv4_netfilter_sysctl_path
+EXPORT_SYMBOL_GPL vmlinux 0x2bc62483	ide_port_unregister_devices
+EXPORT_SYMBOL_GPL vmlinux 0x2be0570a	sysdev_class_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x2bfc4d7f	tracepoint_get_iter_range
+EXPORT_SYMBOL_GPL vmlinux 0x2c208607	power_supply_is_system_supplied
+EXPORT_SYMBOL_GPL vmlinux 0x2c226ab2	clockevent_delta2ns
+EXPORT_SYMBOL_GPL vmlinux 0x2c2373b5	ide_dma_lost_irq
+EXPORT_SYMBOL_GPL vmlinux 0x2c34a173	ide_pci_dma_base
+EXPORT_SYMBOL_GPL vmlinux 0x2c7db649	irq_dispose_mapping
+EXPORT_SYMBOL_GPL vmlinux 0x2c91c5ad	debugfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x2ca7e31d	of_pci_address_to_resource
+EXPORT_SYMBOL_GPL vmlinux 0x2cc34f5a	lookup_create
+EXPORT_SYMBOL_GPL vmlinux 0x2ce98559	kcrypto_wq
+EXPORT_SYMBOL_GPL vmlinux 0x2ceb91b0	rdev_get_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0x2d136788	power_supply_changed
+EXPORT_SYMBOL_GPL vmlinux 0x2d2a0c0b	input_ff_upload
+EXPORT_SYMBOL_GPL vmlinux 0x2d339e63	blk_queue_lld_busy
+EXPORT_SYMBOL_GPL vmlinux 0x2d472af8	skb_morph
+EXPORT_SYMBOL_GPL vmlinux 0x2d53cb01	hwmon_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x2d5a56e5	crypto_alg_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x2da88917	class_compat_create_link
+EXPORT_SYMBOL_GPL vmlinux 0x2db0511f	spi_get_device_id
+EXPORT_SYMBOL_GPL vmlinux 0x2db2ba35	of_rescan_bus
+EXPORT_SYMBOL_GPL vmlinux 0x2db95441	device_create
+EXPORT_SYMBOL_GPL vmlinux 0x2dbd2db4	pci_msi_off
+EXPORT_SYMBOL_GPL vmlinux 0x2dd3526b	br_handle_frame_hook
+EXPORT_SYMBOL_GPL vmlinux 0x2e47f677	xfrm_aalg_get_byidx
+EXPORT_SYMBOL_GPL vmlinux 0x2e611142	ring_buffer_record_enable_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x2e731b60	ata_cable_40wire
+EXPORT_SYMBOL_GPL vmlinux 0x2e73e939	pci_create_slot
+EXPORT_SYMBOL_GPL vmlinux 0x2ea5be5e	spi_register_master
+EXPORT_SYMBOL_GPL vmlinux 0x2eabceeb	inotify_remove_watch_locked
+EXPORT_SYMBOL_GPL vmlinux 0x2eca8706	kobject_init_and_add
+EXPORT_SYMBOL_GPL vmlinux 0x2ee0e86f	invalidate_inode_pages2_range
+EXPORT_SYMBOL_GPL vmlinux 0x2ef37f08	attribute_container_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x2f2aa116	unregister_jprobe
+EXPORT_SYMBOL_GPL vmlinux 0x2f47d8c7	cpufreq_frequency_get_table
+EXPORT_SYMBOL_GPL vmlinux 0x2fc85e32	ata_sff_softreset
+EXPORT_SYMBOL_GPL vmlinux 0x2fcd9e17	dpm_resume_noirq
+EXPORT_SYMBOL_GPL vmlinux 0x301fcc0d	scatterwalk_start
+EXPORT_SYMBOL_GPL vmlinux 0x30234fdb	unregister_pernet_subsys
+EXPORT_SYMBOL_GPL vmlinux 0x305aaa94	inode_add_to_lists
+EXPORT_SYMBOL_GPL vmlinux 0x3075aafc	crypto_ahash_final
+EXPORT_SYMBOL_GPL vmlinux 0x30a4f4ca	bstr_printf
+EXPORT_SYMBOL_GPL vmlinux 0x30a838c2	pmf_do_functions
+EXPORT_SYMBOL_GPL vmlinux 0x30ff21e0	unregister_kretprobes
+EXPORT_SYMBOL_GPL vmlinux 0x311ec2d2	usb_unpoison_urb
+EXPORT_SYMBOL_GPL vmlinux 0x31232084	pmac_backlight
+EXPORT_SYMBOL_GPL vmlinux 0x3129a664	ide_build_dmatable
+EXPORT_SYMBOL_GPL vmlinux 0x315d9ec6	rt_mutex_timed_lock
+EXPORT_SYMBOL_GPL vmlinux 0x316392b4	inotify_rm_watch
+EXPORT_SYMBOL_GPL vmlinux 0x317b4739	hvc_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x31b7728a	relay_close
+EXPORT_SYMBOL_GPL vmlinux 0x31dc9471	sysdev_register
+EXPORT_SYMBOL_GPL vmlinux 0x323ac973	sata_scr_valid
+EXPORT_SYMBOL_GPL vmlinux 0x32715112	cpufreq_frequency_table_cpuinfo
+EXPORT_SYMBOL_GPL vmlinux 0x328c68ae	debugfs_create_x16
+EXPORT_SYMBOL_GPL vmlinux 0x329f83e2	ata_sff_dev_classify
+EXPORT_SYMBOL_GPL vmlinux 0x32cd023f	setup_irq
+EXPORT_SYMBOL_GPL vmlinux 0x32d5e7fc	xfrm_aalg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x32e32bf0	tcp_reno_min_cwnd
+EXPORT_SYMBOL_GPL vmlinux 0x32f17454	ring_buffer_event_data
+EXPORT_SYMBOL_GPL vmlinux 0x32fd721b	crypto_alloc_instance
+EXPORT_SYMBOL_GPL vmlinux 0x333ee557	media_bay_set_ide_infos
+EXPORT_SYMBOL_GPL vmlinux 0x338989d1	spi_new_device
+EXPORT_SYMBOL_GPL vmlinux 0x3399e5f8	ring_buffer_entries
+EXPORT_SYMBOL_GPL vmlinux 0x33cd1be2	kset_create_and_add
+EXPORT_SYMBOL_GPL vmlinux 0x34275124	trace_current_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0x3441c3d6	gpio_set_value_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x345e99b4	ide_setup_pci_noise
+EXPORT_SYMBOL_GPL vmlinux 0x34a92ef1	vfs_setxattr
+EXPORT_SYMBOL_GPL vmlinux 0x34b311b7	scsi_nl_sock
+EXPORT_SYMBOL_GPL vmlinux 0x34f08c2b	ide_end_rq
+EXPORT_SYMBOL_GPL vmlinux 0x34f5befe	dm_requeue_unmapped_request
+EXPORT_SYMBOL_GPL vmlinux 0x35116e7b	ata_sff_port_start
+EXPORT_SYMBOL_GPL vmlinux 0x35664159	__pm_runtime_get
+EXPORT_SYMBOL_GPL vmlinux 0x358fd480	inet6_hash_connect
+EXPORT_SYMBOL_GPL vmlinux 0x35d8c94a	sdev_evt_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x361bd8d9	register_pernet_gen_device
+EXPORT_SYMBOL_GPL vmlinux 0x361e2bcc	save_stack_trace
+EXPORT_SYMBOL_GPL vmlinux 0x362e23ec	call_rcu_bh
+EXPORT_SYMBOL_GPL vmlinux 0x3650d9a6	unregister_pernet_gen_device
+EXPORT_SYMBOL_GPL vmlinux 0x367ed6a8	pci_ioremap_bar
+EXPORT_SYMBOL_GPL vmlinux 0x36cb38ce	regulator_bulk_disable
+EXPORT_SYMBOL_GPL vmlinux 0x36e30032	screen_glyph
+EXPORT_SYMBOL_GPL vmlinux 0x36e35a2f	ip_local_out
+EXPORT_SYMBOL_GPL vmlinux 0x371e0220	sysfs_chmod_file
+EXPORT_SYMBOL_GPL vmlinux 0x3745db77	ide_dma_end
+EXPORT_SYMBOL_GPL vmlinux 0x3749b7fd	inet_twsk_purge
+EXPORT_SYMBOL_GPL vmlinux 0x37ad4176	__tracepoint_block_bio_complete
+EXPORT_SYMBOL_GPL vmlinux 0x37d8a4fb	device_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x3831ccbe	shash_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0x3845a797	usb_unlink_urb
+EXPORT_SYMBOL_GPL vmlinux 0x3854ebdf	simple_attr_write
+EXPORT_SYMBOL_GPL vmlinux 0x38a9c2c7	input_ff_effect_from_user
+EXPORT_SYMBOL_GPL vmlinux 0x38ff1786	regulator_disable
+EXPORT_SYMBOL_GPL vmlinux 0x3917e0f9	tty_init_termios
+EXPORT_SYMBOL_GPL vmlinux 0x39383d30	ide_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x393e6e9a	eventfd_signal
+EXPORT_SYMBOL_GPL vmlinux 0x39509166	irq_create_of_mapping
+EXPORT_SYMBOL_GPL vmlinux 0x397eebab	of_modalias_node
+EXPORT_SYMBOL_GPL vmlinux 0x39819646	atomic_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x39afa246	raw_unhash_sk
+EXPORT_SYMBOL_GPL vmlinux 0x39e73a70	usb_hcd_pci_shutdown
+EXPORT_SYMBOL_GPL vmlinux 0x3a3d70e5	ata_sff_qc_issue
+EXPORT_SYMBOL_GPL vmlinux 0x3a6b5816	ahash_free_instance
+EXPORT_SYMBOL_GPL vmlinux 0x3ac22052	usb_alloc_urb
+EXPORT_SYMBOL_GPL vmlinux 0x3adb362c	eventfd_ctx_fdget
+EXPORT_SYMBOL_GPL vmlinux 0x3b6af100	crypto_grab_skcipher
+EXPORT_SYMBOL_GPL vmlinux 0x3bc33f65	cleanup_srcu_struct
+EXPORT_SYMBOL_GPL vmlinux 0x3be12ea7	device_rename
+EXPORT_SYMBOL_GPL vmlinux 0x3be7af02	get_max_files
+EXPORT_SYMBOL_GPL vmlinux 0x3be89d3c	usb_register_notify
+EXPORT_SYMBOL_GPL vmlinux 0x3bf090b5	mmput
+EXPORT_SYMBOL_GPL vmlinux 0x3bfaaaa0	irq_of_parse_and_map
+EXPORT_SYMBOL_GPL vmlinux 0x3c09604e	power_supply_set_battery_charged
+EXPORT_SYMBOL_GPL vmlinux 0x3c0c0174	ata_cable_sata
+EXPORT_SYMBOL_GPL vmlinux 0x3c67ad58	input_ff_erase
+EXPORT_SYMBOL_GPL vmlinux 0x3c6c45ca	__tracepoint_power_frequency
+EXPORT_SYMBOL_GPL vmlinux 0x3c942368	profile_event_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x3cd06035	add_input_randomness
+EXPORT_SYMBOL_GPL vmlinux 0x3cddafc1	ata_dev_pair
+EXPORT_SYMBOL_GPL vmlinux 0x3ce763f3	pci_intx
+EXPORT_SYMBOL_GPL vmlinux 0x3cfcae4c	rtc_set_alarm
+EXPORT_SYMBOL_GPL vmlinux 0x3cfdfae5	trace_current_buffer_discard_commit
+EXPORT_SYMBOL_GPL vmlinux 0x3cfedb3f	register_pm_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x3d177c42	i2c_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x3d388324	dpm_resume_end
+EXPORT_SYMBOL_GPL vmlinux 0x3d42932d	queue_work
+EXPORT_SYMBOL_GPL vmlinux 0x3d7187c4	ring_buffer_iter_reset
+EXPORT_SYMBOL_GPL vmlinux 0x3d72cf18	scsi_nl_add_transport
+EXPORT_SYMBOL_GPL vmlinux 0x3d9969ae	ata_pci_sff_init_one
+EXPORT_SYMBOL_GPL vmlinux 0x3dc87c82	regulator_bulk_enable
+EXPORT_SYMBOL_GPL vmlinux 0x3dd2e641	pci_find_next_capability
+EXPORT_SYMBOL_GPL vmlinux 0x3dd4d3a7	bprintf
+EXPORT_SYMBOL_GPL vmlinux 0x3ddf5351	pci_find_ht_capability
+EXPORT_SYMBOL_GPL vmlinux 0x3e034166	class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x3e37e58c	fuse_abort_conn
+EXPORT_SYMBOL_GPL vmlinux 0x3eceeb22	ide_allocate_dma_engine
+EXPORT_SYMBOL_GPL vmlinux 0x3ee593c9	input_ff_create
+EXPORT_SYMBOL_GPL vmlinux 0x3f01570a	probe_kernel_write
+EXPORT_SYMBOL_GPL vmlinux 0x3f238101	dcookie_register
+EXPORT_SYMBOL_GPL vmlinux 0x3f77a5e2	tcp_done
+EXPORT_SYMBOL_GPL vmlinux 0x3f8e3733	ata_host_register
+EXPORT_SYMBOL_GPL vmlinux 0x3f93b769	ata_sff_lost_interrupt
+EXPORT_SYMBOL_GPL vmlinux 0x402b10f2	securityfs_remove
+EXPORT_SYMBOL_GPL vmlinux 0x402f2a8c	__sock_recv_timestamp
+EXPORT_SYMBOL_GPL vmlinux 0x4035a7f6	sysfs_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x407318df	crypto_hash_walk_done
+EXPORT_SYMBOL_GPL vmlinux 0x4083713a	da903x_writes
+EXPORT_SYMBOL_GPL vmlinux 0x40af0dec	ata_xfer_mode2mask
+EXPORT_SYMBOL_GPL vmlinux 0x40ca3435	shash_ahash_update
+EXPORT_SYMBOL_GPL vmlinux 0x410c560e	kernel_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x411a7428	usb_queue_reset_device
+EXPORT_SYMBOL_GPL vmlinux 0x413ebb2a	ata_pci_device_do_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x417524e1	queue_work_on
+EXPORT_SYMBOL_GPL vmlinux 0x419e1330	proc_net_mkdir
+EXPORT_SYMBOL_GPL vmlinux 0x41ea2e1e	crypto_create_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x41f3dde4	scsi_flush_work
+EXPORT_SYMBOL_GPL vmlinux 0x420a2f57	gpiochip_add
+EXPORT_SYMBOL_GPL vmlinux 0x42494cea	ring_buffer_event_length
+EXPORT_SYMBOL_GPL vmlinux 0x425c1c0b	ktime_add_safe
+EXPORT_SYMBOL_GPL vmlinux 0x425c77b1	crypto_grab_aead
+EXPORT_SYMBOL_GPL vmlinux 0x426d15ab	xfrm_output_resume
+EXPORT_SYMBOL_GPL vmlinux 0x4271c266	sysfs_remove_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0x4299b345	fuse_get_req
+EXPORT_SYMBOL_GPL vmlinux 0x42cf2ecf	hrtimer_init
+EXPORT_SYMBOL_GPL vmlinux 0x42d83b2e	usb_match_id
+EXPORT_SYMBOL_GPL vmlinux 0x42f8909e	pmac_i2c_find_bus
+EXPORT_SYMBOL_GPL vmlinux 0x42fab71e	da903x_set_bits
+EXPORT_SYMBOL_GPL vmlinux 0x43059f8f	crypto_shash_finup
+EXPORT_SYMBOL_GPL vmlinux 0x4314a2a2	kern_mount_data
+EXPORT_SYMBOL_GPL vmlinux 0x432fd7f6	__gpio_set_value
+EXPORT_SYMBOL_GPL vmlinux 0x434abba4	seq_release_net
+EXPORT_SYMBOL_GPL vmlinux 0x43c21d67	pci_test_config_bits
+EXPORT_SYMBOL_GPL vmlinux 0x43eb81d3	driver_add_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x43f56e82	ata_xfer_mode2shift
+EXPORT_SYMBOL_GPL vmlinux 0x44352be1	dm_device_name
+EXPORT_SYMBOL_GPL vmlinux 0x444bf215	usb_deregister_dev
+EXPORT_SYMBOL_GPL vmlinux 0x4484a5a4	wait_for_device_probe
+EXPORT_SYMBOL_GPL vmlinux 0x44871b30	da903x_update
+EXPORT_SYMBOL_GPL vmlinux 0x44a65d5c	lock_policy_rwsem_read
+EXPORT_SYMBOL_GPL vmlinux 0x44a83d00	inet_twsk_schedule
+EXPORT_SYMBOL_GPL vmlinux 0x44b8960e	rt_mutex_lock_interruptible
+EXPORT_SYMBOL_GPL vmlinux 0x44ffceda	rt_mutex_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x457594fa	crypto_alg_list
+EXPORT_SYMBOL_GPL vmlinux 0x45a92798	__cpufreq_driver_getavg
+EXPORT_SYMBOL_GPL vmlinux 0x45b16f01	get_dcookie
+EXPORT_SYMBOL_GPL vmlinux 0x45bf1ff3	crypto_inc
+EXPORT_SYMBOL_GPL vmlinux 0x45d8b41b	dm_path_uevent
+EXPORT_SYMBOL_GPL vmlinux 0x45d920d6	bus_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x45dabae2	ide_no_data_taskfile
+EXPORT_SYMBOL_GPL vmlinux 0x461d856b	ide_host_register
+EXPORT_SYMBOL_GPL vmlinux 0x461eeb64	queue_delayed_work_on
+EXPORT_SYMBOL_GPL vmlinux 0x46301aac	__blk_put_request
+EXPORT_SYMBOL_GPL vmlinux 0x4672e88b	__crypto_dequeue_request
+EXPORT_SYMBOL_GPL vmlinux 0x46870b57	xfrm_audit_state_replay_overflow
+EXPORT_SYMBOL_GPL vmlinux 0x46c72860	usb_bus_list_lock
+EXPORT_SYMBOL_GPL vmlinux 0x47229b5c	gpio_request
+EXPORT_SYMBOL_GPL vmlinux 0x472cc96a	ata_sff_dma_pause
+EXPORT_SYMBOL_GPL vmlinux 0x47371632	rtc_class_close
+EXPORT_SYMBOL_GPL vmlinux 0x47697e66	crypto_destroy_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x47bb253b	register_net_sysctl_rotable
+EXPORT_SYMBOL_GPL vmlinux 0x47cde280	regulator_get_voltage
+EXPORT_SYMBOL_GPL vmlinux 0x47d7f72d	inet6_lookup_listener
+EXPORT_SYMBOL_GPL vmlinux 0x47f0cec0	rtnl_link_register
+EXPORT_SYMBOL_GPL vmlinux 0x47f65290	ata_sff_dumb_qc_prep
+EXPORT_SYMBOL_GPL vmlinux 0x4819377e	fib_rules_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x4857b818	spi_unregister_master
+EXPORT_SYMBOL_GPL vmlinux 0x499043d3	crypto_init_queue
+EXPORT_SYMBOL_GPL vmlinux 0x49fece0b	ata_sff_hsm_move
+EXPORT_SYMBOL_GPL vmlinux 0x4a008d94	xfrm_audit_policy_add
+EXPORT_SYMBOL_GPL vmlinux 0x4a18950c	d_materialise_unique
+EXPORT_SYMBOL_GPL vmlinux 0x4a374542	ata_link_offline
+EXPORT_SYMBOL_GPL vmlinux 0x4a4b254c	net_assign_generic
+EXPORT_SYMBOL_GPL vmlinux 0x4a527528	rtc_irq_register
+EXPORT_SYMBOL_GPL vmlinux 0x4a553656	pmf_call_function
+EXPORT_SYMBOL_GPL vmlinux 0x4a93c241	pmac_i2c_xfer
+EXPORT_SYMBOL_GPL vmlinux 0x4aaa761c	blkdev_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x4aad3ead	ahash_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0x4ac77488	usb_hcd_link_urb_to_ep
+EXPORT_SYMBOL_GPL vmlinux 0x4adb3a92	ide_create_request_sense_cmd
+EXPORT_SYMBOL_GPL vmlinux 0x4b2d0720	raw_hash_sk
+EXPORT_SYMBOL_GPL vmlinux 0x4bf217fc	fuse_conn_get
+EXPORT_SYMBOL_GPL vmlinux 0x4c28b701	crypto_alloc_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0x4c72c022	leds_list_lock
+EXPORT_SYMBOL_GPL vmlinux 0x4c759827	byte_rev_table
+EXPORT_SYMBOL_GPL vmlinux 0x4c848371	tcp_orphan_count
+EXPORT_SYMBOL_GPL vmlinux 0x4cc42acd	kobject_uevent_env
+EXPORT_SYMBOL_GPL vmlinux 0x4ce771ba	sysdev_class_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x4ce9b315	tcp_cong_avoid_ai
+EXPORT_SYMBOL_GPL vmlinux 0x4d1564e8	device_create_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0x4d412953	disk_part_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0x4d79223e	pmac_i2c_close
+EXPORT_SYMBOL_GPL vmlinux 0x4d864c17	crypto_blkcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0x4d8f4c15	klist_add_before
+EXPORT_SYMBOL_GPL vmlinux 0x4dc811e2	sysfs_notify_dirent
+EXPORT_SYMBOL_GPL vmlinux 0x4dc9eb8b	eventfd_ctx_fileget
+EXPORT_SYMBOL_GPL vmlinux 0x4e3201a6	devres_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x4e4bba85	scsi_queue_work
+EXPORT_SYMBOL_GPL vmlinux 0x4e5c4582	ata_sas_port_init
+EXPORT_SYMBOL_GPL vmlinux 0x4e7abd28	sff_dma_ops
+EXPORT_SYMBOL_GPL vmlinux 0x4efbd1fd	blocking_notifier_chain_cond_register
+EXPORT_SYMBOL_GPL vmlinux 0x4f171bb0	ide_pci_check_simplex
+EXPORT_SYMBOL_GPL vmlinux 0x4f242b28	device_release_driver
+EXPORT_SYMBOL_GPL vmlinux 0x4f6ab79e	ring_buffer_reset_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x4f7744c4	page_cache_sync_readahead
+EXPORT_SYMBOL_GPL vmlinux 0x4f9b7a9a	ata_pio_queue_task
+EXPORT_SYMBOL_GPL vmlinux 0x4f9f9870	sysfs_remove_file_from_group
+EXPORT_SYMBOL_GPL vmlinux 0x4fd0809c	ide_check_atapi_device
+EXPORT_SYMBOL_GPL vmlinux 0x4fdc945d	sata_deb_timing_normal
+EXPORT_SYMBOL_GPL vmlinux 0x5086ac3a	alg_test
+EXPORT_SYMBOL_GPL vmlinux 0x50abafb1	sysfs_schedule_callback
+EXPORT_SYMBOL_GPL vmlinux 0x50c60c77	of_irq_map_one
+EXPORT_SYMBOL_GPL vmlinux 0x50e7193a	__i2c_first_dynamic_bus_num
+EXPORT_SYMBOL_GPL vmlinux 0x50f5e532	call_rcu_sched
+EXPORT_SYMBOL_GPL vmlinux 0x50f60c88	bus_find_device_by_name
+EXPORT_SYMBOL_GPL vmlinux 0x50fad434	round_jiffies_up
+EXPORT_SYMBOL_GPL vmlinux 0x510f758c	dm_dispatch_request
+EXPORT_SYMBOL_GPL vmlinux 0x51920c2d	class_dev_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0x51af7f83	unregister_kprobes
+EXPORT_SYMBOL_GPL vmlinux 0x51cf1682	root_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x520d3605	ide_get_lba_addr
+EXPORT_SYMBOL_GPL vmlinux 0x52232854	queue_delayed_work
+EXPORT_SYMBOL_GPL vmlinux 0x522884a3	cpu_add_sysdev_attr_group
+EXPORT_SYMBOL_GPL vmlinux 0x525e0b9e	regulator_list_voltage
+EXPORT_SYMBOL_GPL vmlinux 0x52982f41	do_add_mount
+EXPORT_SYMBOL_GPL vmlinux 0x52d111ea	pm_qos_update_requirement
+EXPORT_SYMBOL_GPL vmlinux 0x5323fbab	__inet_lookup_listener
+EXPORT_SYMBOL_GPL vmlinux 0x534b3f33	skb_gro_receive
+EXPORT_SYMBOL_GPL vmlinux 0x535dcf89	ata_sff_port_start32
+EXPORT_SYMBOL_GPL vmlinux 0x53614269	get_cpu_idle_time_us
+EXPORT_SYMBOL_GPL vmlinux 0x53986488	register_die_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x53a22bf8	ata_sff_thaw
+EXPORT_SYMBOL_GPL vmlinux 0x53b38cbd	usb_get_urb
+EXPORT_SYMBOL_GPL vmlinux 0x53e314e7	ata_do_set_mode
+EXPORT_SYMBOL_GPL vmlinux 0x53e98f05	crypto_mod_get
+EXPORT_SYMBOL_GPL vmlinux 0x5460c8d8	fsnotify_get_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x549525ef	handle_nested_irq
+EXPORT_SYMBOL_GPL vmlinux 0x55006f71	usb_get_descriptor
+EXPORT_SYMBOL_GPL vmlinux 0x551c970f	tty_prepare_flip_string
+EXPORT_SYMBOL_GPL vmlinux 0x55407b04	crypto_unregister_template
+EXPORT_SYMBOL_GPL vmlinux 0x5542b913	cpu_bit_bitmap
+EXPORT_SYMBOL_GPL vmlinux 0x55438d2a	register_pernet_subsys
+EXPORT_SYMBOL_GPL vmlinux 0x55b1e7e1	synchronize_srcu
+EXPORT_SYMBOL_GPL vmlinux 0x55d65b3e	tcp_unregister_congestion_control
+EXPORT_SYMBOL_GPL vmlinux 0x56310925	regulator_mode_to_status
+EXPORT_SYMBOL_GPL vmlinux 0x563fb5c8	__trace_bprintk
+EXPORT_SYMBOL_GPL vmlinux 0x566b8045	ata_dummy_port_info
+EXPORT_SYMBOL_GPL vmlinux 0x569e0dc4	devres_release_group
+EXPORT_SYMBOL_GPL vmlinux 0x56b76b9d	crypto_init_ahash_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x56ff89c9	fsstack_copy_inode_size
+EXPORT_SYMBOL_GPL vmlinux 0x5744be74	rtc_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x57499077	init_user_ns
+EXPORT_SYMBOL_GPL vmlinux 0x57818dab	blk_queue_dma_drain
+EXPORT_SYMBOL_GPL vmlinux 0x578ad73b	ide_check_ireason
+EXPORT_SYMBOL_GPL vmlinux 0x579e0bf5	rtnl_unregister_all
+EXPORT_SYMBOL_GPL vmlinux 0x57ea15dd	bus_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x580b6af4	skb_segment
+EXPORT_SYMBOL_GPL vmlinux 0x581dedd9	pmac_i2c_attach_adapter
+EXPORT_SYMBOL_GPL vmlinux 0x5842af90	crypto_alloc_instance2
+EXPORT_SYMBOL_GPL vmlinux 0x588cdf2a	anon_transport_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x5892f832	release_pmc_hardware
+EXPORT_SYMBOL_GPL vmlinux 0x58c13924	usb_register_device_driver
+EXPORT_SYMBOL_GPL vmlinux 0x590318b0	irq_find_mapping
+EXPORT_SYMBOL_GPL vmlinux 0x5910ade4	driver_find
+EXPORT_SYMBOL_GPL vmlinux 0x593878c1	usb_buffer_map_sg
+EXPORT_SYMBOL_GPL vmlinux 0x59595f51	rtc_set_time
+EXPORT_SYMBOL_GPL vmlinux 0x598484a4	xfrm_audit_state_notfound
+EXPORT_SYMBOL_GPL vmlinux 0x59ca3224	inet_twdr_twkill_work
+EXPORT_SYMBOL_GPL vmlinux 0x5a11b8f6	ide_pio_need_iordy
+EXPORT_SYMBOL_GPL vmlinux 0x5a27f74b	regulator_get_current_limit
+EXPORT_SYMBOL_GPL vmlinux 0x5a371d39	xfrm_audit_state_icvfail
+EXPORT_SYMBOL_GPL vmlinux 0x5a48f457	ring_buffer_free_read_page
+EXPORT_SYMBOL_GPL vmlinux 0x5a6073c3	pmac_i2c_get_adapter
+EXPORT_SYMBOL_GPL vmlinux 0x5a64ba0d	locks_release_private
+EXPORT_SYMBOL_GPL vmlinux 0x5a7bfe41	crypto_probing_notify
+EXPORT_SYMBOL_GPL vmlinux 0x5aaa3ed6	pci_enable_pcie_error_reporting
+EXPORT_SYMBOL_GPL vmlinux 0x5ad6ed67	crypto_tfm_in_queue
+EXPORT_SYMBOL_GPL vmlinux 0x5b0d97e2	schedule_hrtimeout_range
+EXPORT_SYMBOL_GPL vmlinux 0x5b65456b	simple_attr_read
+EXPORT_SYMBOL_GPL vmlinux 0x5b6bccdf	use_module
+EXPORT_SYMBOL_GPL vmlinux 0x5b8f6c8d	shash_ahash_finup
+EXPORT_SYMBOL_GPL vmlinux 0x5bc56d9e	trace_define_field
+EXPORT_SYMBOL_GPL vmlinux 0x5be6e047	blk_lld_busy
+EXPORT_SYMBOL_GPL vmlinux 0x5beb3b96	crypto_register_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0x5bfc03c3	unregister_keyboard_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5c0f1e93	platform_device_register_simple
+EXPORT_SYMBOL_GPL vmlinux 0x5c13f8e7	fuse_do_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x5c5f17e2	ring_buffer_reset
+EXPORT_SYMBOL_GPL vmlinux 0x5c734b2c	ide_host_add
+EXPORT_SYMBOL_GPL vmlinux 0x5d0f6f57	kbd_table
+EXPORT_SYMBOL_GPL vmlinux 0x5d112836	inet_twsk_put
+EXPORT_SYMBOL_GPL vmlinux 0x5d3e0bd0	attribute_container_find_class_device
+EXPORT_SYMBOL_GPL vmlinux 0x5d5b9455	rt_mutex_lock
+EXPORT_SYMBOL_GPL vmlinux 0x5d730e7b	raw_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x5d76109f	sdev_evt_send
+EXPORT_SYMBOL_GPL vmlinux 0x5dd67618	register_netevent_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5e4825a2	ata_ehi_push_desc
+EXPORT_SYMBOL_GPL vmlinux 0x5e4fdb78	set_task_ioprio
+EXPORT_SYMBOL_GPL vmlinux 0x5e5137eb	skb_tstamp_tx
+EXPORT_SYMBOL_GPL vmlinux 0x5e76ad8f	mnt_want_write
+EXPORT_SYMBOL_GPL vmlinux 0x5e778efc	cpufreq_cpu_put
+EXPORT_SYMBOL_GPL vmlinux 0x5e7f6047	driver_find_device
+EXPORT_SYMBOL_GPL vmlinux 0x5e849645	crypto_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0x5eaf5bc2	regulator_register
+EXPORT_SYMBOL_GPL vmlinux 0x5eaff85f	ata_sff_busy_sleep
+EXPORT_SYMBOL_GPL vmlinux 0x5eb158b6	ata_bmdma_start
+EXPORT_SYMBOL_GPL vmlinux 0x5f70e55d	crypto_spawn_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x5f794439	rt_mutex_unlock
+EXPORT_SYMBOL_GPL vmlinux 0x5f93cc48	register_jprobe
+EXPORT_SYMBOL_GPL vmlinux 0x5f9f6a80	ide_write_devctl
+EXPORT_SYMBOL_GPL vmlinux 0x5fc6605a	dm_noflush_suspending
+EXPORT_SYMBOL_GPL vmlinux 0x5fcdec5d	xfrm_ealg_get_byidx
+EXPORT_SYMBOL_GPL vmlinux 0x60215d6e	ide_unregister_region
+EXPORT_SYMBOL_GPL vmlinux 0x60651d7d	ide_pci_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x609e2617	crypto_enqueue_request
+EXPORT_SYMBOL_GPL vmlinux 0x609f66e7	simple_attr_open
+EXPORT_SYMBOL_GPL vmlinux 0x60a13e90	rcu_barrier
+EXPORT_SYMBOL_GPL vmlinux 0x60a32ea9	pm_power_off
+EXPORT_SYMBOL_GPL vmlinux 0x60b1c148	usb_buffer_free
+EXPORT_SYMBOL_GPL vmlinux 0x610aaf1b	class_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x610cde41	shash_attr_alg
+EXPORT_SYMBOL_GPL vmlinux 0x61153e6b	rtc_irq_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x61547de9	sata_scr_write
+EXPORT_SYMBOL_GPL vmlinux 0x61629506	key_type_user
+EXPORT_SYMBOL_GPL vmlinux 0x61a906cb	fuse_conn_init
+EXPORT_SYMBOL_GPL vmlinux 0x61c8ea20	raw_seq_start
+EXPORT_SYMBOL_GPL vmlinux 0x622b3e2c	srcu_read_lock
+EXPORT_SYMBOL_GPL vmlinux 0x62572cc5	usb_driver_release_interface
+EXPORT_SYMBOL_GPL vmlinux 0x626253ff	ata_sas_port_stop
+EXPORT_SYMBOL_GPL vmlinux 0x62634392	security_inode_setattr
+EXPORT_SYMBOL_GPL vmlinux 0x629a7f6e	do_posix_clock_nonanosleep
+EXPORT_SYMBOL_GPL vmlinux 0x62c0a6bb	crypto_register_alg
+EXPORT_SYMBOL_GPL vmlinux 0x630bb23b	mnt_clone_write
+EXPORT_SYMBOL_GPL vmlinux 0x63131cb6	scsi_internal_device_block
+EXPORT_SYMBOL_GPL vmlinux 0x63e16a93	usb_get_hcd
+EXPORT_SYMBOL_GPL vmlinux 0x6453f77c	pmac_has_backlight_type
+EXPORT_SYMBOL_GPL vmlinux 0x64971483	device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x649e9592	klist_init
+EXPORT_SYMBOL_GPL vmlinux 0x64ba928d	mnt_drop_write
+EXPORT_SYMBOL_GPL vmlinux 0x6522abcc	tty_mode_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x654a78f7	ata_eh_qc_retry
+EXPORT_SYMBOL_GPL vmlinux 0x654b1455	ata_bmdma_stop
+EXPORT_SYMBOL_GPL vmlinux 0x654c49e2	aer_irq
+EXPORT_SYMBOL_GPL vmlinux 0x65ccb6f0	call_netevent_notifiers
+EXPORT_SYMBOL_GPL vmlinux 0x65d6d0f0	gpio_direction_input
+EXPORT_SYMBOL_GPL vmlinux 0x65d6f23c	dev_change_net_namespace
+EXPORT_SYMBOL_GPL vmlinux 0x65f27188	ata_do_dev_read_id
+EXPORT_SYMBOL_GPL vmlinux 0x65f73aae	sata_sff_hardreset
+EXPORT_SYMBOL_GPL vmlinux 0x66052099	__module_text_address
+EXPORT_SYMBOL_GPL vmlinux 0x661601de	sprint_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x6666a15f	power_supply_am_i_supplied
+EXPORT_SYMBOL_GPL vmlinux 0x668402aa	crypto_put_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x66b2a859	nr_free_buffer_pages
+EXPORT_SYMBOL_GPL vmlinux 0x66d87d38	symbol_put_addr
+EXPORT_SYMBOL_GPL vmlinux 0x66e16464	ata_cable_ignore
+EXPORT_SYMBOL_GPL vmlinux 0x672eebde	sata_scr_write_flush
+EXPORT_SYMBOL_GPL vmlinux 0x673430b5	ata_common_sdev_attrs
+EXPORT_SYMBOL_GPL vmlinux 0x67955ce6	profile_hits
+EXPORT_SYMBOL_GPL vmlinux 0x67a0d1e4	of_scan_bus
+EXPORT_SYMBOL_GPL vmlinux 0x67ca6e5f	sysfs_get_dirent
+EXPORT_SYMBOL_GPL vmlinux 0x67d3c5d4	crypto_unregister_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0x67d59c6a	ide_queue_pc_tail
+EXPORT_SYMBOL_GPL vmlinux 0x68072f43	usb_bulk_msg
+EXPORT_SYMBOL_GPL vmlinux 0x686c703f	xfrm_count_auth_supported
+EXPORT_SYMBOL_GPL vmlinux 0x6892088c	unregister_pm_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x69002de2	ata_port_freeze
+EXPORT_SYMBOL_GPL vmlinux 0x6901119a	trace_nowake_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0x692faa3a	ide_device_put
+EXPORT_SYMBOL_GPL vmlinux 0x69667426	blk_abort_request
+EXPORT_SYMBOL_GPL vmlinux 0x69e3728e	tcp_init_congestion_ops
+EXPORT_SYMBOL_GPL vmlinux 0x69e8fa48	tty_get_pgrp
+EXPORT_SYMBOL_GPL vmlinux 0x69e9a2cb	ata_scsi_slave_config
+EXPORT_SYMBOL_GPL vmlinux 0x69efb668	ata_dev_next
+EXPORT_SYMBOL_GPL vmlinux 0x69f77bde	ata_std_qc_defer
+EXPORT_SYMBOL_GPL vmlinux 0x69fe0cfe	ide_read_status
+EXPORT_SYMBOL_GPL vmlinux 0x6a0e3e90	sync_filesystem
+EXPORT_SYMBOL_GPL vmlinux 0x6a1fcd58	pmac_i2c_get_controller
+EXPORT_SYMBOL_GPL vmlinux 0x6ab62fe9	inet_csk_reqsk_queue_prune
+EXPORT_SYMBOL_GPL vmlinux 0x6ab9a40f	ide_host_free
+EXPORT_SYMBOL_GPL vmlinux 0x6b545de0	inotify_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x6b755a8f	__crypto_alloc_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x6bbfcd39	__rtnl_link_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x6bc9d85b	led_trigger_show
+EXPORT_SYMBOL_GPL vmlinux 0x6c49c4f2	clockevents_notify
+EXPORT_SYMBOL_GPL vmlinux 0x6c6271b5	dm_kill_unmapped_request
+EXPORT_SYMBOL_GPL vmlinux 0x6c8d5ae8	__gpio_get_value
+EXPORT_SYMBOL_GPL vmlinux 0x6c8eb98f	xfrm_aalg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0x6cbb7d62	da903x_reads
+EXPORT_SYMBOL_GPL vmlinux 0x6d1fa32d	__rtnl_register
+EXPORT_SYMBOL_GPL vmlinux 0x6d29f2ac	ide_dma_unmap_sg
+EXPORT_SYMBOL_GPL vmlinux 0x6d2fc5a6	net_namespace_list
+EXPORT_SYMBOL_GPL vmlinux 0x6d3b944b	ide_pci_setup_ports
+EXPORT_SYMBOL_GPL vmlinux 0x6d50e282	ring_buffer_iter_empty
+EXPORT_SYMBOL_GPL vmlinux 0x6d55864f	fsstack_copy_attr_all
+EXPORT_SYMBOL_GPL vmlinux 0x6d5ccec7	crypto_lookup_template
+EXPORT_SYMBOL_GPL vmlinux 0x6d5fd57f	__set_irq_handler
+EXPORT_SYMBOL_GPL vmlinux 0x6db16be1	pci_add_dynid
+EXPORT_SYMBOL_GPL vmlinux 0x6dd6b78f	inotify_init_watch
+EXPORT_SYMBOL_GPL vmlinux 0x6e7474fc	xfrm_ealg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x6e94067f	scsi_eh_ready_devs
+EXPORT_SYMBOL_GPL vmlinux 0x6e9d8d18	ata_pci_sff_prepare_host
+EXPORT_SYMBOL_GPL vmlinux 0x6ec7ec01	raw_seq_open
+EXPORT_SYMBOL_GPL vmlinux 0x6fd4735b	usb_get_status
+EXPORT_SYMBOL_GPL vmlinux 0x6ff607b6	crypto_get_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x701d447a	register_posix_clock
+EXPORT_SYMBOL_GPL vmlinux 0x7033a466	ring_buffer_normalize_time_stamp
+EXPORT_SYMBOL_GPL vmlinux 0x706b3a33	cpufreq_frequency_table_get_attr
+EXPORT_SYMBOL_GPL vmlinux 0x707ff1bb	ata_xfer_mask2mode
+EXPORT_SYMBOL_GPL vmlinux 0x70e14151	devres_find
+EXPORT_SYMBOL_GPL vmlinux 0x711e48fc	pmac_i2c_adapter_to_bus
+EXPORT_SYMBOL_GPL vmlinux 0x7123fbf0	dm_set_device_limits
+EXPORT_SYMBOL_GPL vmlinux 0x716265c7	debugfs_initialized
+EXPORT_SYMBOL_GPL vmlinux 0x7185d3ca	pmac_low_i2c_lock
+EXPORT_SYMBOL_GPL vmlinux 0x71c8bc95	kgdb_unregister_io_module
+EXPORT_SYMBOL_GPL vmlinux 0x71d01e7f	gpiochip_is_requested
+EXPORT_SYMBOL_GPL vmlinux 0x71fe2b28	__blk_end_request_err
+EXPORT_SYMBOL_GPL vmlinux 0x72497b81	ide_get_best_pio_mode
+EXPORT_SYMBOL_GPL vmlinux 0x7268f3a6	fb_bl_default_curve
+EXPORT_SYMBOL_GPL vmlinux 0x726f29c3	class_for_each_device
+EXPORT_SYMBOL_GPL vmlinux 0x72741f25	trace_vbprintk
+EXPORT_SYMBOL_GPL vmlinux 0x7278d328	all_vm_events
+EXPORT_SYMBOL_GPL vmlinux 0x729a2620	tcp_death_row
+EXPORT_SYMBOL_GPL vmlinux 0x72beb774	aead_geniv_init
+EXPORT_SYMBOL_GPL vmlinux 0x72f6c69c	debugfs_remove
+EXPORT_SYMBOL_GPL vmlinux 0x7334ebc8	scatterwalk_map_and_copy
+EXPORT_SYMBOL_GPL vmlinux 0x735c5cc7	tcp_reno_cong_avoid
+EXPORT_SYMBOL_GPL vmlinux 0x73a48b4a	ata_sff_std_ports
+EXPORT_SYMBOL_GPL vmlinux 0x73aa2ff1	of_irq_map_pci
+EXPORT_SYMBOL_GPL vmlinux 0x73fe4f4d	fuse_request_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x743a165e	ata_pack_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0x74607620	regulator_bulk_get
+EXPORT_SYMBOL_GPL vmlinux 0x746ea513	regulator_set_current_limit
+EXPORT_SYMBOL_GPL vmlinux 0x74711bb6	spi_setup
+EXPORT_SYMBOL_GPL vmlinux 0x74abdafa	task_handoff_register
+EXPORT_SYMBOL_GPL vmlinux 0x74b4ef64	debugfs_create_blob
+EXPORT_SYMBOL_GPL vmlinux 0x74baf17a	tracing_is_on
+EXPORT_SYMBOL_GPL vmlinux 0x74f45b88	trace_define_common_fields
+EXPORT_SYMBOL_GPL vmlinux 0x75089fa7	of_address_to_resource
+EXPORT_SYMBOL_GPL vmlinux 0x75285556	power_supply_get_by_name
+EXPORT_SYMBOL_GPL vmlinux 0x755c92f7	scsi_schedule_eh
+EXPORT_SYMBOL_GPL vmlinux 0x75c8d0c0	gpiochip_remove
+EXPORT_SYMBOL_GPL vmlinux 0x75cd87bb	ide_set_media_lock
+EXPORT_SYMBOL_GPL vmlinux 0x75e8f3c3	crypto_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x761188fd	dpm_suspend_noirq
+EXPORT_SYMBOL_GPL vmlinux 0x7626b273	unregister_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0x762cf021	relay_reset
+EXPORT_SYMBOL_GPL vmlinux 0x762f64bf	ehci_cf_port_reset_rwsem
+EXPORT_SYMBOL_GPL vmlinux 0x765d9a42	ata_sff_dev_select
+EXPORT_SYMBOL_GPL vmlinux 0x7677bfe2	pci_find_next_ht_capability
+EXPORT_SYMBOL_GPL vmlinux 0x773ca527	init_uts_ns
+EXPORT_SYMBOL_GPL vmlinux 0x77f54f1a	i2c_new_device
+EXPORT_SYMBOL_GPL vmlinux 0x781acb7a	__ring_buffer_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x7833192a	scatterwalk_done
+EXPORT_SYMBOL_GPL vmlinux 0x7846c880	spi_alloc_master
+EXPORT_SYMBOL_GPL vmlinux 0x7896b360	scsi_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x78af7c8f	init_srcu_struct
+EXPORT_SYMBOL_GPL vmlinux 0x78be747b	devres_close_group
+EXPORT_SYMBOL_GPL vmlinux 0x78e4a4ee	klist_add_after
+EXPORT_SYMBOL_GPL vmlinux 0x79270861	device_reprobe
+EXPORT_SYMBOL_GPL vmlinux 0x792b65de	regulator_get
+EXPORT_SYMBOL_GPL vmlinux 0x7944e0fc	tracing_off
+EXPORT_SYMBOL_GPL vmlinux 0x7948d109	srcu_read_unlock
+EXPORT_SYMBOL_GPL vmlinux 0x794a9f28	usb_reset_configuration
+EXPORT_SYMBOL_GPL vmlinux 0x79d2f8a1	usb_anchor_empty
+EXPORT_SYMBOL_GPL vmlinux 0x79dd5ec0	ring_buffer_peek
+EXPORT_SYMBOL_GPL vmlinux 0x7a24270d	find_get_pid
+EXPORT_SYMBOL_GPL vmlinux 0x7a2a3665	shmem_file_setup
+EXPORT_SYMBOL_GPL vmlinux 0x7a3f8b5c	sysdev_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x7a4ba221	relay_switch_subbuf
+EXPORT_SYMBOL_GPL vmlinux 0x7a5f1db9	ide_pad_transfer
+EXPORT_SYMBOL_GPL vmlinux 0x7a66339e	led_classdev_register
+EXPORT_SYMBOL_GPL vmlinux 0x7a7e21f9	hrtimer_start
+EXPORT_SYMBOL_GPL vmlinux 0x7ab3c122	edac_handlers
+EXPORT_SYMBOL_GPL vmlinux 0x7ae1ae8e	cpufreq_frequency_table_put_attr
+EXPORT_SYMBOL_GPL vmlinux 0x7b1520c7	platform_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x7b1d544d	edac_handler_set
+EXPORT_SYMBOL_GPL vmlinux 0x7b3d39f9	raw_seq_stop
+EXPORT_SYMBOL_GPL vmlinux 0x7bd662c1	class_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x7bea0cae	disable_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0x7c13fb69	debugfs_create_x32
+EXPORT_SYMBOL_GPL vmlinux 0x7c2eb9f7	ring_buffer_free
+EXPORT_SYMBOL_GPL vmlinux 0x7c595934	ring_buffer_alloc_read_page
+EXPORT_SYMBOL_GPL vmlinux 0x7c5fed12	usb_hcd_platform_shutdown
+EXPORT_SYMBOL_GPL vmlinux 0x7c8366fd	console_drivers
+EXPORT_SYMBOL_GPL vmlinux 0x7cbb0637	cpufreq_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0x7cc2a6dc	crypto_unregister_alg
+EXPORT_SYMBOL_GPL vmlinux 0x7ce6e863	ata_bmdma_mode_filter
+EXPORT_SYMBOL_GPL vmlinux 0x7cf311ff	tty_ldisc_flush
+EXPORT_SYMBOL_GPL vmlinux 0x7d0bf632	ata_scsi_simulate
+EXPORT_SYMBOL_GPL vmlinux 0x7d783788	default_backing_dev_info
+EXPORT_SYMBOL_GPL vmlinux 0x7dc5d0b6	crypto_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x7dd23283	generic_drop_inode
+EXPORT_SYMBOL_GPL vmlinux 0x7deb79ab	usb_free_urb
+EXPORT_SYMBOL_GPL vmlinux 0x7df2c5ed	led_trigger_set_default
+EXPORT_SYMBOL_GPL vmlinux 0x7e1183c9	async_schedule
+EXPORT_SYMBOL_GPL vmlinux 0x7e275ea8	scsi_complete_async_scans
+EXPORT_SYMBOL_GPL vmlinux 0x7e2d29ec	ide_pci_clk
+EXPORT_SYMBOL_GPL vmlinux 0x7e64181d	usb_calc_bus_time
+EXPORT_SYMBOL_GPL vmlinux 0x7e7de688	i2c_new_probed_device
+EXPORT_SYMBOL_GPL vmlinux 0x7ead5512	usb_hc_died
+EXPORT_SYMBOL_GPL vmlinux 0x7ed553d9	ide_dma_host_set
+EXPORT_SYMBOL_GPL vmlinux 0x7f19c836	unlock_policy_rwsem_write
+EXPORT_SYMBOL_GPL vmlinux 0x7f3f5410	da903x_read
+EXPORT_SYMBOL_GPL vmlinux 0x7f41508c	ata_pci_device_do_resume
+EXPORT_SYMBOL_GPL vmlinux 0x7f4f18fa	ata_port_pbar_desc
+EXPORT_SYMBOL_GPL vmlinux 0x7f7bc6d3	debugfs_create_u8
+EXPORT_SYMBOL_GPL vmlinux 0x7f84949f	crypto_register_template
+EXPORT_SYMBOL_GPL vmlinux 0x7f92f76f	sysdev_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x7faca1f2	trace_seq_vprintf
+EXPORT_SYMBOL_GPL vmlinux 0x7facbc42	usb_sg_cancel
+EXPORT_SYMBOL_GPL vmlinux 0x7fbcc7ff	i2c_new_dummy
+EXPORT_SYMBOL_GPL vmlinux 0x7fbd8def	fb_ddc_read
+EXPORT_SYMBOL_GPL vmlinux 0x7fdc2e73	tty_encode_baud_rate
+EXPORT_SYMBOL_GPL vmlinux 0x7ff10ccf	raw_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x8014b6af	input_event_from_user
+EXPORT_SYMBOL_GPL vmlinux 0x8039d043	selinux_secmark_relabel_packet_permission
+EXPORT_SYMBOL_GPL vmlinux 0x8047508e	bus_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x807238ea	hvc_instantiate
+EXPORT_SYMBOL_GPL vmlinux 0x808ec1a3	crypto_alg_tested
+EXPORT_SYMBOL_GPL vmlinux 0x80b1b6b9	ide_queue_sense_rq
+EXPORT_SYMBOL_GPL vmlinux 0x80c64780	bd_claim_by_disk
+EXPORT_SYMBOL_GPL vmlinux 0x80ee55c3	selinux_secmark_refcount_inc
+EXPORT_SYMBOL_GPL vmlinux 0x812a1ca8	usb_submit_urb
+EXPORT_SYMBOL_GPL vmlinux 0x812b695f	__pm_runtime_disable
+EXPORT_SYMBOL_GPL vmlinux 0x8149ea54	ata_timing_find_mode
+EXPORT_SYMBOL_GPL vmlinux 0x814d4dc8	usb_control_msg
+EXPORT_SYMBOL_GPL vmlinux 0x817eec5a	inet_csk_clone
+EXPORT_SYMBOL_GPL vmlinux 0x81958bec	k_handler
+EXPORT_SYMBOL_GPL vmlinux 0x8222ba7c	led_trigger_unregister_simple
+EXPORT_SYMBOL_GPL vmlinux 0x8226642f	__gpio_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x823f78f5	bsg_register_queue
+EXPORT_SYMBOL_GPL vmlinux 0x825900b4	pmf_find_function
+EXPORT_SYMBOL_GPL vmlinux 0x82635b5c	zap_vma_ptes
+EXPORT_SYMBOL_GPL vmlinux 0x82939ebd	rcu_batches_completed_sched
+EXPORT_SYMBOL_GPL vmlinux 0x8299a45e	__module_address
+EXPORT_SYMBOL_GPL vmlinux 0x82ae9b11	usb_put_hcd
+EXPORT_SYMBOL_GPL vmlinux 0x82d79b51	sysctl_vfs_cache_pressure
+EXPORT_SYMBOL_GPL vmlinux 0x82d96828	ata_sff_data_xfer32
+EXPORT_SYMBOL_GPL vmlinux 0x830a8e84	inet_unhash
+EXPORT_SYMBOL_GPL vmlinux 0x83405d59	cpufreq_cpu_get
+EXPORT_SYMBOL_GPL vmlinux 0x8344a44d	devres_get
+EXPORT_SYMBOL_GPL vmlinux 0x837ffaaf	kobject_create_and_add
+EXPORT_SYMBOL_GPL vmlinux 0x8383dab8	usb_hcd_pci_pm_ops
+EXPORT_SYMBOL_GPL vmlinux 0x838c5d19	blk_rq_unprep_clone
+EXPORT_SYMBOL_GPL vmlinux 0x83a8d993	ide_init_sg_cmd
+EXPORT_SYMBOL_GPL vmlinux 0x83b6014a	ring_buffer_size
+EXPORT_SYMBOL_GPL vmlinux 0x8412e3c5	srcu_batches_completed
+EXPORT_SYMBOL_GPL vmlinux 0x842f742b	usb_interrupt_msg
+EXPORT_SYMBOL_GPL vmlinux 0x84753473	usb_hub_clear_tt_buffer
+EXPORT_SYMBOL_GPL vmlinux 0x850ad1e6	transport_remove_device
+EXPORT_SYMBOL_GPL vmlinux 0x8519ce68	regulator_set_mode
+EXPORT_SYMBOL_GPL vmlinux 0x851ee5e8	pid_vnr
+EXPORT_SYMBOL_GPL vmlinux 0x85222b3e	ide_tf_load
+EXPORT_SYMBOL_GPL vmlinux 0x853da304	ata_pci_sff_init_host
+EXPORT_SYMBOL_GPL vmlinux 0x8561cbe9	usb_poison_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0x85866450	fsnotify
+EXPORT_SYMBOL_GPL vmlinux 0x859c3b86	ata_bmdma_setup
+EXPORT_SYMBOL_GPL vmlinux 0x85c10896	rcu_batches_completed_bh
+EXPORT_SYMBOL_GPL vmlinux 0x85c4b74d	ata_qc_complete
+EXPORT_SYMBOL_GPL vmlinux 0x85f7b02a	ata_sas_port_start
+EXPORT_SYMBOL_GPL vmlinux 0x8633da5b	regulator_get_mode
+EXPORT_SYMBOL_GPL vmlinux 0x863a1890	nf_unregister_afinfo
+EXPORT_SYMBOL_GPL vmlinux 0x865ddb2f	ring_buffer_swap_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x868784cb	__symbol_get
+EXPORT_SYMBOL_GPL vmlinux 0x86b1667d	hwrng_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x86f6b99d	synchronize_rcu_expedited
+EXPORT_SYMBOL_GPL vmlinux 0x87108e2d	ata_port_start
+EXPORT_SYMBOL_GPL vmlinux 0x873d7a89	relay_buf_full
+EXPORT_SYMBOL_GPL vmlinux 0x873fbaea	edac_atomic_assert_error
+EXPORT_SYMBOL_GPL vmlinux 0x874e3968	blk_queue_rq_timed_out
+EXPORT_SYMBOL_GPL vmlinux 0x87754115	raw_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x877e6d10	sata_pmp_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x87ac1bc6	klist_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0x87d8708e	pci_scan_child_bus
+EXPORT_SYMBOL_GPL vmlinux 0x8810ad5e	crypto_xor
+EXPORT_SYMBOL_GPL vmlinux 0x884ab083	register_ftrace_event
+EXPORT_SYMBOL_GPL vmlinux 0x884e321f	ata_sff_tf_load
+EXPORT_SYMBOL_GPL vmlinux 0x884f5ef5	vfs_listxattr
+EXPORT_SYMBOL_GPL vmlinux 0x885142a6	nf_net_netfilter_sysctl_path
+EXPORT_SYMBOL_GPL vmlinux 0x888f0196	platform_get_resource
+EXPORT_SYMBOL_GPL vmlinux 0x88e86ad4	tracepoint_iter_start
+EXPORT_SYMBOL_GPL vmlinux 0x8901d803	handle_level_irq
+EXPORT_SYMBOL_GPL vmlinux 0x8a0de322	platform_get_irq_byname
+EXPORT_SYMBOL_GPL vmlinux 0x8a16b797	register_jprobes
+EXPORT_SYMBOL_GPL vmlinux 0x8a2ba003	usb_autopm_put_interface
+EXPORT_SYMBOL_GPL vmlinux 0x8a8bdf72	__lock_page_killable
+EXPORT_SYMBOL_GPL vmlinux 0x8addb36f	blk_update_request
+EXPORT_SYMBOL_GPL vmlinux 0x8b048f0e	put_pid
+EXPORT_SYMBOL_GPL vmlinux 0x8b25aaa5	unregister_pernet_gen_subsys
+EXPORT_SYMBOL_GPL vmlinux 0x8b375b6b	tracepoint_iter_stop
+EXPORT_SYMBOL_GPL vmlinux 0x8b5a9eec	crypto_dequeue_request
+EXPORT_SYMBOL_GPL vmlinux 0x8b752ac1	ata_tf_to_fis
+EXPORT_SYMBOL_GPL vmlinux 0x8be5ad17	ide_undecoded_slave
+EXPORT_SYMBOL_GPL vmlinux 0x8c5c3f26	ata_bus_reset
+EXPORT_SYMBOL_GPL vmlinux 0x8c61793a	tty_ldisc_deref
+EXPORT_SYMBOL_GPL vmlinux 0x8c742627	crypto_shash_update
+EXPORT_SYMBOL_GPL vmlinux 0x8c8883e7	flush_workqueue
+EXPORT_SYMBOL_GPL vmlinux 0x8ca3a9d0	usb_unanchor_urb
+EXPORT_SYMBOL_GPL vmlinux 0x8caa2e09	pmac_i2c_get_channel
+EXPORT_SYMBOL_GPL vmlinux 0x8cb13e7e	platform_get_irq
+EXPORT_SYMBOL_GPL vmlinux 0x8d033df4	klist_node_attached
+EXPORT_SYMBOL_GPL vmlinux 0x8d2831ad	usb_unlink_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0x8d547751	scsi_target_unblock
+EXPORT_SYMBOL_GPL vmlinux 0x8d831609	scsi_mode_select
+EXPORT_SYMBOL_GPL vmlinux 0x8d97d724	ide_tf_read
+EXPORT_SYMBOL_GPL vmlinux 0x8dcbc49e	crypto_alloc_shash
+EXPORT_SYMBOL_GPL vmlinux 0x8dcf63da	tcp_is_cwnd_limited
+EXPORT_SYMBOL_GPL vmlinux 0x8dd340cb	inet_hash
+EXPORT_SYMBOL_GPL vmlinux 0x8e1cba2d	input_ff_event
+EXPORT_SYMBOL_GPL vmlinux 0x8e401512	skcipher_geniv_free
+EXPORT_SYMBOL_GPL vmlinux 0x8e474958	usb_hcd_pci_remove
+EXPORT_SYMBOL_GPL vmlinux 0x8e5fef42	platform_driver_probe
+EXPORT_SYMBOL_GPL vmlinux 0x8e87d590	driver_register
+EXPORT_SYMBOL_GPL vmlinux 0x8e923371	fib_rules_register
+EXPORT_SYMBOL_GPL vmlinux 0x8ea00f7f	ata_link_abort
+EXPORT_SYMBOL_GPL vmlinux 0x8f025321	debugfs_create_dir
+EXPORT_SYMBOL_GPL vmlinux 0x8f4ec88f	aead_geniv_exit
+EXPORT_SYMBOL_GPL vmlinux 0x8f6cee77	__round_jiffies_relative
+EXPORT_SYMBOL_GPL vmlinux 0x8f6fd5f4	ide_do_test_unit_ready
+EXPORT_SYMBOL_GPL vmlinux 0x8fa35570	tasklet_hrtimer_init
+EXPORT_SYMBOL_GPL vmlinux 0x8fa5dd69	dev_attr_unload_heads
+EXPORT_SYMBOL_GPL vmlinux 0x8fa74514	sysdev_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x8faf6dce	pmac_i2c_setmode
+EXPORT_SYMBOL_GPL vmlinux 0x8fd187e1	kallsyms_on_each_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x8fea56b5	pm_runtime_idle
+EXPORT_SYMBOL_GPL vmlinux 0x908b0134	inet_csk_route_req
+EXPORT_SYMBOL_GPL vmlinux 0x90a1004a	crypto_has_alg
+EXPORT_SYMBOL_GPL vmlinux 0x90b8c3d8	apply_to_page_range
+EXPORT_SYMBOL_GPL vmlinux 0x90fe1140	usb_get_intf
+EXPORT_SYMBOL_GPL vmlinux 0x910d45d0	tcp_twsk_unique
+EXPORT_SYMBOL_GPL vmlinux 0x912f86df	ata_sff_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x9159b9d6	profile_event_register
+EXPORT_SYMBOL_GPL vmlinux 0x91840556	dm_get_rq_mapinfo
+EXPORT_SYMBOL_GPL vmlinux 0x918488a2	bsg_unregister_queue
+EXPORT_SYMBOL_GPL vmlinux 0x91f1bc45	usb_reset_device
+EXPORT_SYMBOL_GPL vmlinux 0x91fccb59	ata_sff_error_handler
+EXPORT_SYMBOL_GPL vmlinux 0x9211af1c	tty_ldisc_ref
+EXPORT_SYMBOL_GPL vmlinux 0x921c66f1	cpu_remove_sysdev_attr_group
+EXPORT_SYMBOL_GPL vmlinux 0x9240d54a	ata_bmdma32_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x924c9e55	regulator_force_disable
+EXPORT_SYMBOL_GPL vmlinux 0x927caba6	rtc_irq_set_state
+EXPORT_SYMBOL_GPL vmlinux 0x92ccfce0	usb_init_urb
+EXPORT_SYMBOL_GPL vmlinux 0x92d31cfb	fixed_phy_add
+EXPORT_SYMBOL_GPL vmlinux 0x92d989d5	ata_sff_check_status
+EXPORT_SYMBOL_GPL vmlinux 0x92f012c6	driver_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x92fb217b	dcookie_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x9319c2b6	ata_sas_scsi_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x933f51a5	ata_sff_wait_ready
+EXPORT_SYMBOL_GPL vmlinux 0x934bb1e9	ip_build_and_send_pkt
+EXPORT_SYMBOL_GPL vmlinux 0x9373f24a	__inet_lookup_established
+EXPORT_SYMBOL_GPL vmlinux 0x938101fb	fuse_sync_release
+EXPORT_SYMBOL_GPL vmlinux 0x93a2cb47	reserve_pmc_hardware
+EXPORT_SYMBOL_GPL vmlinux 0x93c434ee	pm_runtime_enable
+EXPORT_SYMBOL_GPL vmlinux 0x93d2422d	snmp_mib_free
+EXPORT_SYMBOL_GPL vmlinux 0x93e19137	usb_ep0_reinit
+EXPORT_SYMBOL_GPL vmlinux 0x93fe1449	ide_do_start_stop
+EXPORT_SYMBOL_GPL vmlinux 0x9405d410	find_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0x9407af63	swiotlb_sync_single_range_for_device
+EXPORT_SYMBOL_GPL vmlinux 0x9417eb55	anon_transport_class_register
+EXPORT_SYMBOL_GPL vmlinux 0x942b7c2b	usb_poison_urb
+EXPORT_SYMBOL_GPL vmlinux 0x944aa378	rtc_irq_set_freq
+EXPORT_SYMBOL_GPL vmlinux 0x945c837a	pmf_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0x94a68723	ata_scsi_slave_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x94e94a5f	device_bind_driver
+EXPORT_SYMBOL_GPL vmlinux 0x94fae565	usb_hcd_check_unlink_urb
+EXPORT_SYMBOL_GPL vmlinux 0x952664c5	do_exit
+EXPORT_SYMBOL_GPL vmlinux 0x952b7b63	alloc_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0x956a91ba	gpio_get_value_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x95959175	driver_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x961a8cd3	unlock_policy_rwsem_read
+EXPORT_SYMBOL_GPL vmlinux 0x96427b41	crypto_larval_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x96533a1c	blocking_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x9692da8c	fb_deferred_io_cleanup
+EXPORT_SYMBOL_GPL vmlinux 0x96c4f63b	user_instantiate
+EXPORT_SYMBOL_GPL vmlinux 0x96cbcf31	pm_qos_add_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x96d083d9	ide_set_pio
+EXPORT_SYMBOL_GPL vmlinux 0x96f8ccf9	power_supply_register
+EXPORT_SYMBOL_GPL vmlinux 0x970cc97b	sata_link_hardreset
+EXPORT_SYMBOL_GPL vmlinux 0x9746e1cd	platform_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x976058ed	sysfs_remove_link
+EXPORT_SYMBOL_GPL vmlinux 0x9795d6ed	bus_for_each_drv
+EXPORT_SYMBOL_GPL vmlinux 0x97da844e	pci_block_user_cfg_access
+EXPORT_SYMBOL_GPL vmlinux 0x97dbf522	pmac_i2c_match_adapter
+EXPORT_SYMBOL_GPL vmlinux 0x97ec31a7	blkcipher_walk_phys
+EXPORT_SYMBOL_GPL vmlinux 0x982dfe89	device_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x9833bc0c	hvc_kick
+EXPORT_SYMBOL_GPL vmlinux 0x985b4216	__inet_twsk_hashdance
+EXPORT_SYMBOL_GPL vmlinux 0x98638145	disk_get_part
+EXPORT_SYMBOL_GPL vmlinux 0x988412e0	device_attach
+EXPORT_SYMBOL_GPL vmlinux 0x989136b2	ata_dummy_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x98d1dde0	security_inode_create
+EXPORT_SYMBOL_GPL vmlinux 0x98deb6ba	module_mutex
+EXPORT_SYMBOL_GPL vmlinux 0x9905328f	ring_buffer_write
+EXPORT_SYMBOL_GPL vmlinux 0x9924c496	__usb_get_extra_descriptor
+EXPORT_SYMBOL_GPL vmlinux 0x993a565e	platform_device_add_data
+EXPORT_SYMBOL_GPL vmlinux 0x993d5d3a	ata_std_bios_param
+EXPORT_SYMBOL_GPL vmlinux 0x995d1071	prof_on
+EXPORT_SYMBOL_GPL vmlinux 0x99aed153	sysfs_add_file_to_group
+EXPORT_SYMBOL_GPL vmlinux 0x99e64aae	pci_bus_max_busnr
+EXPORT_SYMBOL_GPL vmlinux 0x9a11a0fc	crypto_attr_alg_name
+EXPORT_SYMBOL_GPL vmlinux 0x9a135ade	input_ff_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x9a1dcc45	pci_enable_rom
+EXPORT_SYMBOL_GPL vmlinux 0x9a668ac2	ata_sff_exec_command
+EXPORT_SYMBOL_GPL vmlinux 0x9a82790d	pmf_register_irq_client
+EXPORT_SYMBOL_GPL vmlinux 0x9a87edb4	pm_request_idle
+EXPORT_SYMBOL_GPL vmlinux 0x9af8cd58	transport_destroy_device
+EXPORT_SYMBOL_GPL vmlinux 0x9b035b12	regulator_put
+EXPORT_SYMBOL_GPL vmlinux 0x9b2e0df0	blk_insert_cloned_request
+EXPORT_SYMBOL_GPL vmlinux 0x9b4ff3df	pm_request_resume
+EXPORT_SYMBOL_GPL vmlinux 0x9ba0501e	unregister_vt_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x9bf488e8	sysfs_update_group
+EXPORT_SYMBOL_GPL vmlinux 0x9c52fcd5	rtc_read_alarm
+EXPORT_SYMBOL_GPL vmlinux 0x9cb8037b	xfrm_count_enc_supported
+EXPORT_SYMBOL_GPL vmlinux 0x9d14f654	ide_pci_remove
+EXPORT_SYMBOL_GPL vmlinux 0x9dce6066	sysdev_show_int
+EXPORT_SYMBOL_GPL vmlinux 0x9df3995d	crypto_nivaead_type
+EXPORT_SYMBOL_GPL vmlinux 0x9e12e550	find_vpid
+EXPORT_SYMBOL_GPL vmlinux 0x9e23e343	i2c_add_numbered_adapter
+EXPORT_SYMBOL_GPL vmlinux 0x9e35e4c1	clockevents_register_device
+EXPORT_SYMBOL_GPL vmlinux 0x9e509861	ata_std_error_handler
+EXPORT_SYMBOL_GPL vmlinux 0x9e711ad2	pm_qos_requirement
+EXPORT_SYMBOL_GPL vmlinux 0x9e785d72	crypto_find_alg
+EXPORT_SYMBOL_GPL vmlinux 0x9e8aaf3e	init_dummy_netdev
+EXPORT_SYMBOL_GPL vmlinux 0x9ea9ec7e	led_trigger_store
+EXPORT_SYMBOL_GPL vmlinux 0x9efac022	usb_hcd_unlink_urb_from_ep
+EXPORT_SYMBOL_GPL vmlinux 0x9f40a6d6	async_synchronize_full_domain
+EXPORT_SYMBOL_GPL vmlinux 0x9f85ed90	klist_remove
+EXPORT_SYMBOL_GPL vmlinux 0x9fce80db	fb_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x9fea6bad	ide_device_get
+EXPORT_SYMBOL_GPL vmlinux 0x9ffd549c	remove_irq
+EXPORT_SYMBOL_GPL vmlinux 0xa0255440	net_ipv4_ctl_path
+EXPORT_SYMBOL_GPL vmlinux 0xa08e035b	sata_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0xa08e1bf5	crypto_alg_sem
+EXPORT_SYMBOL_GPL vmlinux 0xa0adcfa1	vfs_setlease
+EXPORT_SYMBOL_GPL vmlinux 0xa0e16ac5	ata_host_activate
+EXPORT_SYMBOL_GPL vmlinux 0xa0fe3b89	trace_seq_printf
+EXPORT_SYMBOL_GPL vmlinux 0xa150e792	class_interface_register
+EXPORT_SYMBOL_GPL vmlinux 0xa1b0f04f	__mmdrop
+EXPORT_SYMBOL_GPL vmlinux 0xa1fb8336	device_del
+EXPORT_SYMBOL_GPL vmlinux 0xa1fc46e8	hrtimer_try_to_cancel
+EXPORT_SYMBOL_GPL vmlinux 0xa200213b	rt_mutex_trylock
+EXPORT_SYMBOL_GPL vmlinux 0xa244a31f	dm_underlying_device_busy
+EXPORT_SYMBOL_GPL vmlinux 0xa2688deb	cpu_remove_sysdev_attr
+EXPORT_SYMBOL_GPL vmlinux 0xa29a1214	usb_scuttle_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0xa2acbe8b	ata_sff_freeze
+EXPORT_SYMBOL_GPL vmlinux 0xa2b66dd5	user_describe
+EXPORT_SYMBOL_GPL vmlinux 0xa3574a41	platform_driver_register
+EXPORT_SYMBOL_GPL vmlinux 0xa357d56e	ktime_get
+EXPORT_SYMBOL_GPL vmlinux 0xa35c9323	inet_csk_listen_stop
+EXPORT_SYMBOL_GPL vmlinux 0xa38b7f90	__i2c_board_lock
+EXPORT_SYMBOL_GPL vmlinux 0xa393b84f	get_device
+EXPORT_SYMBOL_GPL vmlinux 0xa39d9220	unregister_timer_hook
+EXPORT_SYMBOL_GPL vmlinux 0xa3a2d9af	walk_system_ram_range
+EXPORT_SYMBOL_GPL vmlinux 0xa40a8590	input_event_to_user
+EXPORT_SYMBOL_GPL vmlinux 0xa432367c	lookup_instantiate_filp
+EXPORT_SYMBOL_GPL vmlinux 0xa43476ab	ata_host_suspend
+EXPORT_SYMBOL_GPL vmlinux 0xa4730b90	blk_end_request_err
+EXPORT_SYMBOL_GPL vmlinux 0xa4781ede	elv_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xa48c834f	ata_host_detach
+EXPORT_SYMBOL_GPL vmlinux 0xa4ca9523	crypto_rng_type
+EXPORT_SYMBOL_GPL vmlinux 0xa51f1888	bus_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xa545a9d7	usb_set_device_state
+EXPORT_SYMBOL_GPL vmlinux 0xa5bf5c3e	pm_qos_add_requirement
+EXPORT_SYMBOL_GPL vmlinux 0xa5c36cec	inotify_unmount_inodes
+EXPORT_SYMBOL_GPL vmlinux 0xa5efbf4c	async_synchronize_full
+EXPORT_SYMBOL_GPL vmlinux 0xa6141364	regulator_set_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0xa631cffe	debugfs_create_size_t
+EXPORT_SYMBOL_GPL vmlinux 0xa636eb30	securityfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xa65f9329	raw_seq_next
+EXPORT_SYMBOL_GPL vmlinux 0xa6dc29f3	crypto_alg_mod_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xa7080a0f	disk_map_sector_rcu
+EXPORT_SYMBOL_GPL vmlinux 0xa767c5a9	cpufreq_frequency_table_verify
+EXPORT_SYMBOL_GPL vmlinux 0xa7a40037	crypto_alloc_ablkcipher
+EXPORT_SYMBOL_GPL vmlinux 0xa7c9d1a3	of_irq_to_resource
+EXPORT_SYMBOL_GPL vmlinux 0xa7e2a404	led_trigger_set
+EXPORT_SYMBOL_GPL vmlinux 0xa89297e5	spi_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0xa8a89e67	get_task_mm
+EXPORT_SYMBOL_GPL vmlinux 0xa8edcc4d	fixed_phy_set_link_update
+EXPORT_SYMBOL_GPL vmlinux 0xa8f59416	gpio_direction_output
+EXPORT_SYMBOL_GPL vmlinux 0xa8f872d5	ide_setting_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xa9048e0a	ata_timing_compute
+EXPORT_SYMBOL_GPL vmlinux 0xa91d939d	of_irq_map_raw
+EXPORT_SYMBOL_GPL vmlinux 0xa97592bd	do_rw_taskfile
+EXPORT_SYMBOL_GPL vmlinux 0xa9a17761	sock_prot_inuse_add
+EXPORT_SYMBOL_GPL vmlinux 0xa9a809b0	attribute_container_register
+EXPORT_SYMBOL_GPL vmlinux 0xa9be05a0	ata_sas_port_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xa9c530b8	unregister_oom_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xaa04ccbd	__audit_inode_child
+EXPORT_SYMBOL_GPL vmlinux 0xaa2a72bf	__iowrite64_copy
+EXPORT_SYMBOL_GPL vmlinux 0xaa5310f9	__tracepoint_napi_poll
+EXPORT_SYMBOL_GPL vmlinux 0xaa733099	crypto_alloc_ahash
+EXPORT_SYMBOL_GPL vmlinux 0xaa8c4696	cpu_clock
+EXPORT_SYMBOL_GPL vmlinux 0xaafe355e	fuse_direct_io
+EXPORT_SYMBOL_GPL vmlinux 0xab4861ca	regulator_is_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xab57e311	tracepoint_probe_register
+EXPORT_SYMBOL_GPL vmlinux 0xab616aa1	sock_prot_inuse_get
+EXPORT_SYMBOL_GPL vmlinux 0xabac076e	pskb_put
+EXPORT_SYMBOL_GPL vmlinux 0xac045cfc	ata_bmdma_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0xac189a3a	sysfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xac494f94	input_class
+EXPORT_SYMBOL_GPL vmlinux 0xac628179	ide_dma_start
+EXPORT_SYMBOL_GPL vmlinux 0xace5c0fc	usb_bus_list
+EXPORT_SYMBOL_GPL vmlinux 0xad03a8cd	ring_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0xad4cf28c	nf_unregister_queue_handlers
+EXPORT_SYMBOL_GPL vmlinux 0xad63cb23	inet_csk_reqsk_queue_hash_add
+EXPORT_SYMBOL_GPL vmlinux 0xadbd2d7a	sysdev_driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xadc21757	ide_cd_get_xferlen
+EXPORT_SYMBOL_GPL vmlinux 0xae0c87ee	pm_qos_remove_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xae890174	ata_std_postreset
+EXPORT_SYMBOL_GPL vmlinux 0xaedc962c	hrtimer_forward
+EXPORT_SYMBOL_GPL vmlinux 0xaef25ce7	led_classdev_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xaf3f6fe0	ata_sff_interrupt
+EXPORT_SYMBOL_GPL vmlinux 0xafe0af7d	__wake_up_sync_key
+EXPORT_SYMBOL_GPL vmlinux 0xafe2620c	crypto_shash_setkey
+EXPORT_SYMBOL_GPL vmlinux 0xafeae739	sata_link_debounce
+EXPORT_SYMBOL_GPL vmlinux 0xafebadbd	filter_match_preds
+EXPORT_SYMBOL_GPL vmlinux 0xb026782a	ata_sff_data_xfer_noirq
+EXPORT_SYMBOL_GPL vmlinux 0xb0477e90	ide_pci_init_two
+EXPORT_SYMBOL_GPL vmlinux 0xb0653733	transport_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xb07fb9d0	crypto_spawn_tfm2
+EXPORT_SYMBOL_GPL vmlinux 0xb0aa812e	fips_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xb12ed8e0	swiotlb_sync_single_range_for_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xb150afad	crypto_drop_spawn
+EXPORT_SYMBOL_GPL vmlinux 0xb18409c5	__create_workqueue_key
+EXPORT_SYMBOL_GPL vmlinux 0xb18429eb	suspend_device_irqs
+EXPORT_SYMBOL_GPL vmlinux 0xb18a541a	crypto_aead_type
+EXPORT_SYMBOL_GPL vmlinux 0xb1acbcce	rcu_barrier_sched
+EXPORT_SYMBOL_GPL vmlinux 0xb1b04df8	device_remove_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0xb1cf4188	usb_get_current_frame_number
+EXPORT_SYMBOL_GPL vmlinux 0xb1fa4a2e	sysdev_store_int
+EXPORT_SYMBOL_GPL vmlinux 0xb1ff9112	usb_mon_register
+EXPORT_SYMBOL_GPL vmlinux 0xb225d888	platform_get_resource_byname
+EXPORT_SYMBOL_GPL vmlinux 0xb2360919	fuse_request_send_background
+EXPORT_SYMBOL_GPL vmlinux 0xb260d981	swiotlb_map_page
+EXPORT_SYMBOL_GPL vmlinux 0xb28c57aa	ring_buffer_consume
+EXPORT_SYMBOL_GPL vmlinux 0xb2a6343c	unregister_pernet_device
+EXPORT_SYMBOL_GPL vmlinux 0xb2d30f88	ring_buffer_read
+EXPORT_SYMBOL_GPL vmlinux 0xb2dfab79	blk_abort_queue
+EXPORT_SYMBOL_GPL vmlinux 0xb3674f53	usb_remove_hcd
+EXPORT_SYMBOL_GPL vmlinux 0xb38707a3	device_schedule_callback_owner
+EXPORT_SYMBOL_GPL vmlinux 0xb3a7a9f5	__mnt_is_readonly
+EXPORT_SYMBOL_GPL vmlinux 0xb3c86812	ide_host_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xb3d57a80	vfs_removexattr
+EXPORT_SYMBOL_GPL vmlinux 0xb47cf676	usb_hcd_poll_rh_status
+EXPORT_SYMBOL_GPL vmlinux 0xb4b1cbe5	ata_bmdma_status
+EXPORT_SYMBOL_GPL vmlinux 0xb4ea7cf7	kgdb_connected
+EXPORT_SYMBOL_GPL vmlinux 0xb505f912	da903x_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xb50e51c8	disk_part_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0xb51fbd64	edac_op_state
+EXPORT_SYMBOL_GPL vmlinux 0xb58dcfa2	synchronize_sched_expedited
+EXPORT_SYMBOL_GPL vmlinux 0xb5aba14e	generic_fh_to_dentry
+EXPORT_SYMBOL_GPL vmlinux 0xb5c7ce67	bus_register
+EXPORT_SYMBOL_GPL vmlinux 0xb5e5aa9d	debugfs_create_u16
+EXPORT_SYMBOL_GPL vmlinux 0xb61ed030	class_compat_register
+EXPORT_SYMBOL_GPL vmlinux 0xb642790a	irq_find_host
+EXPORT_SYMBOL_GPL vmlinux 0xb643b6b3	regulator_get_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0xb65091b3	selinux_secmark_refcount_dec
+EXPORT_SYMBOL_GPL vmlinux 0xb66cac03	mm_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xb6aeb661	ata_id_c_string
+EXPORT_SYMBOL_GPL vmlinux 0xb6aee0f4	pmf_unregister_irq_client
+EXPORT_SYMBOL_GPL vmlinux 0xb6be7f55	devres_open_group
+EXPORT_SYMBOL_GPL vmlinux 0xb744fa43	xfrm_ealg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0xb752dd36	free_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0xb7646604	spi_busnum_to_master
+EXPORT_SYMBOL_GPL vmlinux 0xb768988e	class_find_device
+EXPORT_SYMBOL_GPL vmlinux 0xb7845e4f	ata_port_schedule_eh
+EXPORT_SYMBOL_GPL vmlinux 0xb795ee1f	crypto_unregister_ahash
+EXPORT_SYMBOL_GPL vmlinux 0xb79cbf11	crypto_larval_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xb7b1cbbc	usb_driver_claim_interface
+EXPORT_SYMBOL_GPL vmlinux 0xb8060313	__class_create
+EXPORT_SYMBOL_GPL vmlinux 0xb83a386a	devres_remove
+EXPORT_SYMBOL_GPL vmlinux 0xb8435070	dm_put
+EXPORT_SYMBOL_GPL vmlinux 0xb846274f	dm_disk
+EXPORT_SYMBOL_GPL vmlinux 0xb8504358	unregister_kretprobe
+EXPORT_SYMBOL_GPL vmlinux 0xb85eee5a	hrtimer_cancel
+EXPORT_SYMBOL_GPL vmlinux 0xb8759c2c	srcu_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0xb8a87241	user_read
+EXPORT_SYMBOL_GPL vmlinux 0xb8a94743	scsi_nl_add_driver
+EXPORT_SYMBOL_GPL vmlinux 0xb8abeab1	inet_diag_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xb8ebb565	tty_find_polling_driver
+EXPORT_SYMBOL_GPL vmlinux 0xb9562902	blocking_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xb964494e	spi_add_device
+EXPORT_SYMBOL_GPL vmlinux 0xb98ee8cc	cpufreq_register_governor
+EXPORT_SYMBOL_GPL vmlinux 0xb9c28085	kobject_uevent
+EXPORT_SYMBOL_GPL vmlinux 0xb9eb3aa9	add_uevent_var
+EXPORT_SYMBOL_GPL vmlinux 0xba09cb2b	register_net_sysctl_table
+EXPORT_SYMBOL_GPL vmlinux 0xba38369b	rtnl_kill_links
+EXPORT_SYMBOL_GPL vmlinux 0xba9897df	bus_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xbab7eae6	register_kprobes
+EXPORT_SYMBOL_GPL vmlinux 0xbad09aa6	ata_host_alloc_pinfo
+EXPORT_SYMBOL_GPL vmlinux 0xbae34c27	scsi_nl_remove_transport
+EXPORT_SYMBOL_GPL vmlinux 0xbb8864f0	class_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xbbb397e1	platform_driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xbc00f27c	generic_detach_inode
+EXPORT_SYMBOL_GPL vmlinux 0xbc3265b4	dev_attr_em_message_type
+EXPORT_SYMBOL_GPL vmlinux 0xbc9022dc	usb_set_interface
+EXPORT_SYMBOL_GPL vmlinux 0xbd940b04	ide_register_region
+EXPORT_SYMBOL_GPL vmlinux 0xbdd295f0	trace_vprintk
+EXPORT_SYMBOL_GPL vmlinux 0xbe116723	do_posix_clock_nosettime
+EXPORT_SYMBOL_GPL vmlinux 0xbe1887e4	ata_unpack_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0xbe35db6f	usb_register_dev
+EXPORT_SYMBOL_GPL vmlinux 0xbe77795e	irq_create_mapping
+EXPORT_SYMBOL_GPL vmlinux 0xbecb684f	crypto_ahash_digest
+EXPORT_SYMBOL_GPL vmlinux 0xbeea7a2b	srcu_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xbef80cd5	ata_qc_complete_multiple
+EXPORT_SYMBOL_GPL vmlinux 0xbf1cc04b	tty_termios_encode_baud_rate
+EXPORT_SYMBOL_GPL vmlinux 0xbf847c79	class_dev_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0xbf92cdee	platform_device_put
+EXPORT_SYMBOL_GPL vmlinux 0xbfdd9771	tty_buffer_request_room
+EXPORT_SYMBOL_GPL vmlinux 0xbfe7385b	usb_kill_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0xc02235f1	rtc_lock
+EXPORT_SYMBOL_GPL vmlinux 0xc088e403	inet_twsk_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xc0bc62d0	inverse_translate
+EXPORT_SYMBOL_GPL vmlinux 0xc0ce5e38	usb_hcd_pci_probe
+EXPORT_SYMBOL_GPL vmlinux 0xc0f71d95	cpufreq_unregister_governor
+EXPORT_SYMBOL_GPL vmlinux 0xc1095dad	sysfs_remove_group
+EXPORT_SYMBOL_GPL vmlinux 0xc1097247	__get_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0xc126e890	klist_del
+EXPORT_SYMBOL_GPL vmlinux 0xc12f7e0d	trace_profile_buf_nmi
+EXPORT_SYMBOL_GPL vmlinux 0xc17515d7	usb_hcds_loaded
+EXPORT_SYMBOL_GPL vmlinux 0xc1bacf65	put_inotify_watch
+EXPORT_SYMBOL_GPL vmlinux 0xc1f2e21e	ata_pci_remove_one
+EXPORT_SYMBOL_GPL vmlinux 0xc202b546	blk_trace_setup
+EXPORT_SYMBOL_GPL vmlinux 0xc22a3091	vm_unmap_aliases
+EXPORT_SYMBOL_GPL vmlinux 0xc2ee7d1e	pmf_do_irq
+EXPORT_SYMBOL_GPL vmlinux 0xc3301f02	rcu_expedited_torture_stats
+EXPORT_SYMBOL_GPL vmlinux 0xc34efe27	snmp_fold_field
+EXPORT_SYMBOL_GPL vmlinux 0xc35128a5	ata_eh_freeze_port
+EXPORT_SYMBOL_GPL vmlinux 0xc38fc193	ring_buffer_record_enable
+EXPORT_SYMBOL_GPL vmlinux 0xc399468f	scsi_nl_remove_driver
+EXPORT_SYMBOL_GPL vmlinux 0xc39e81f2	pci_renumber_slot
+EXPORT_SYMBOL_GPL vmlinux 0xc3e34590	fuse_request_send
+EXPORT_SYMBOL_GPL vmlinux 0xc428068d	sata_deb_timing_long
+EXPORT_SYMBOL_GPL vmlinux 0xc4699cf9	rdev_get_dev
+EXPORT_SYMBOL_GPL vmlinux 0xc46d877e	schedule_hrtimeout
+EXPORT_SYMBOL_GPL vmlinux 0xc48a81fc	ide_pio_bytes
+EXPORT_SYMBOL_GPL vmlinux 0xc48b7ccf	ata_mode_string
+EXPORT_SYMBOL_GPL vmlinux 0xc4b33aa6	tracepoint_probe_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xc517bb13	ide_input_data
+EXPORT_SYMBOL_GPL vmlinux 0xc57a82c4	pci_reset_function
+EXPORT_SYMBOL_GPL vmlinux 0xc58011d1	__fsnotify_inode_delete
+EXPORT_SYMBOL_GPL vmlinux 0xc5a79fab	unregister_jprobes
+EXPORT_SYMBOL_GPL vmlinux 0xc6059ec8	pci_find_ext_capability
+EXPORT_SYMBOL_GPL vmlinux 0xc606cd3c	boot_cpuid
+EXPORT_SYMBOL_GPL vmlinux 0xc60f75ec	__ftrace_vprintk
+EXPORT_SYMBOL_GPL vmlinux 0xc66b31b3	bus_get_kset
+EXPORT_SYMBOL_GPL vmlinux 0xc673e23e	ata_scsi_change_queue_depth
+EXPORT_SYMBOL_GPL vmlinux 0xc6aedf30	proc_net_remove
+EXPORT_SYMBOL_GPL vmlinux 0xc746d857	inotify_inode_queue_event
+EXPORT_SYMBOL_GPL vmlinux 0xc7a709ac	__class_register
+EXPORT_SYMBOL_GPL vmlinux 0xc801ca54	blkcipher_walk_done
+EXPORT_SYMBOL_GPL vmlinux 0xc83cf33e	usb_store_new_id
+EXPORT_SYMBOL_GPL vmlinux 0xc84c3822	inet_csk_listen_start
+EXPORT_SYMBOL_GPL vmlinux 0xc8ad59a2	vfs_kern_mount
+EXPORT_SYMBOL_GPL vmlinux 0xc90234f3	shash_free_instance
+EXPORT_SYMBOL_GPL vmlinux 0xc9110494	ide_read_bcount_and_ireason
+EXPORT_SYMBOL_GPL vmlinux 0xc914091e	class_compat_remove_link
+EXPORT_SYMBOL_GPL vmlinux 0xc94cb61b	debugfs_create_symlink
+EXPORT_SYMBOL_GPL vmlinux 0xc9561772	fb_destroy_modelist
+EXPORT_SYMBOL_GPL vmlinux 0xc996d3b0	ata_cable_unknown
+EXPORT_SYMBOL_GPL vmlinux 0xc9eae318	seq_open_net
+EXPORT_SYMBOL_GPL vmlinux 0xca007f9e	ide_init_disk
+EXPORT_SYMBOL_GPL vmlinux 0xca32a2aa	ide_timing_merge
+EXPORT_SYMBOL_GPL vmlinux 0xca717f9f	sata_scr_read
+EXPORT_SYMBOL_GPL vmlinux 0xca85d8cf	tracepoint_probe_update_all
+EXPORT_SYMBOL_GPL vmlinux 0xcaa461c1	ata_port_abort
+EXPORT_SYMBOL_GPL vmlinux 0xcabe836c	platform_device_del
+EXPORT_SYMBOL_GPL vmlinux 0xcac27b92	regulator_set_optimum_mode
+EXPORT_SYMBOL_GPL vmlinux 0xcafb76f0	inotify_find_update_watch
+EXPORT_SYMBOL_GPL vmlinux 0xcb0c2ebf	__srcu_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xcb51cabe	klist_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0xcb94bf4c	dev_attr_sw_activity
+EXPORT_SYMBOL_GPL vmlinux 0xcbc33e9b	inet_ctl_sock_create
+EXPORT_SYMBOL_GPL vmlinux 0xcc1f1c3d	inet_twdr_hangman
+EXPORT_SYMBOL_GPL vmlinux 0xcc39e9fb	crypto_ablkcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0xcc576c9a	driver_for_each_device
+EXPORT_SYMBOL_GPL vmlinux 0xcca4e5b5	blk_rq_check_limits
+EXPORT_SYMBOL_GPL vmlinux 0xcccfb2fa	sata_deb_timing_hotplug
+EXPORT_SYMBOL_GPL vmlinux 0xcd30cdf2	ata_sff_post_internal_cmd
+EXPORT_SYMBOL_GPL vmlinux 0xcdb01877	ktime_add_ns
+EXPORT_SYMBOL_GPL vmlinux 0xcdbd3dee	usb_get_dev
+EXPORT_SYMBOL_GPL vmlinux 0xcdbefc28	__hvc_resize
+EXPORT_SYMBOL_GPL vmlinux 0xcdca3691	nr_irqs
+EXPORT_SYMBOL_GPL vmlinux 0xcdf80483	ide_read_error
+EXPORT_SYMBOL_GPL vmlinux 0xcdfed241	blocking_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xce73a0b6	swiotlb_unmap_page
+EXPORT_SYMBOL_GPL vmlinux 0xcf22ebf4	do_kern_mount
+EXPORT_SYMBOL_GPL vmlinux 0xcf651565	__pm_runtime_put
+EXPORT_SYMBOL_GPL vmlinux 0xcf72bad7	inet6_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xcf82d151	ata_pci_device_resume
+EXPORT_SYMBOL_GPL vmlinux 0xcf8af983	trace_profile_buf
+EXPORT_SYMBOL_GPL vmlinux 0xcf91ba88	usb_debug_root
+EXPORT_SYMBOL_GPL vmlinux 0xcfb3a2f6	pci_stop_bus_device
+EXPORT_SYMBOL_GPL vmlinux 0xcfc68341	synchronize_rcu_bh
+EXPORT_SYMBOL_GPL vmlinux 0xcfcaeab4	usb_unpoison_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0xcfcc83ad	register_vt_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xcfd76c18	ata_sff_qc_prep
+EXPORT_SYMBOL_GPL vmlinux 0xcff3f2da	sysdev_store_ulong
+EXPORT_SYMBOL_GPL vmlinux 0xd03c7700	secure_ipv4_port_ephemeral
+EXPORT_SYMBOL_GPL vmlinux 0xd07bc7b3	blkdev_aio_write
+EXPORT_SYMBOL_GPL vmlinux 0xd0c05159	emergency_restart
+EXPORT_SYMBOL_GPL vmlinux 0xd0cb7f04	debugfs_create_u64
+EXPORT_SYMBOL_GPL vmlinux 0xd0d2858b	user_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xd0d3d59a	cpufreq_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0xd151676b	dm_send_uevents
+EXPORT_SYMBOL_GPL vmlinux 0xd16712f3	crypto_check_attr_type
+EXPORT_SYMBOL_GPL vmlinux 0xd16a6698	regulator_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xd173c700	usb_driver_set_configuration
+EXPORT_SYMBOL_GPL vmlinux 0xd1a2cf78	user_update
+EXPORT_SYMBOL_GPL vmlinux 0xd1bdbb2a	ata_base_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0xd2107b9f	dev_attr_link_power_management_policy
+EXPORT_SYMBOL_GPL vmlinux 0xd261f035	ring_buffer_record_disable
+EXPORT_SYMBOL_GPL vmlinux 0xd26f7c30	usb_put_intf
+EXPORT_SYMBOL_GPL vmlinux 0xd273b1b1	__round_jiffies_up_relative
+EXPORT_SYMBOL_GPL vmlinux 0xd2918b32	pmac_i2c_get_bus_node
+EXPORT_SYMBOL_GPL vmlinux 0xd2e3b746	pmac_i2c_get_type
+EXPORT_SYMBOL_GPL vmlinux 0xd331fc06	ring_buffer_empty_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xd381ee7c	macvlan_handle_frame_hook
+EXPORT_SYMBOL_GPL vmlinux 0xd3d5982a	page_cache_async_readahead
+EXPORT_SYMBOL_GPL vmlinux 0xd43a16e9	register_pernet_gen_subsys
+EXPORT_SYMBOL_GPL vmlinux 0xd4624c68	crypto_larval_kill
+EXPORT_SYMBOL_GPL vmlinux 0xd517df80	ring_buffer_read_page
+EXPORT_SYMBOL_GPL vmlinux 0xd5401d81	devres_remove_group
+EXPORT_SYMBOL_GPL vmlinux 0xd5425d55	tty_wakeup
+EXPORT_SYMBOL_GPL vmlinux 0xd56ab831	pci_restore_msi_state
+EXPORT_SYMBOL_GPL vmlinux 0xd5744279	inet_hashinfo_init
+EXPORT_SYMBOL_GPL vmlinux 0xd5f0e885	each_symbol
+EXPORT_SYMBOL_GPL vmlinux 0xd63f1f01	get_current_tty
+EXPORT_SYMBOL_GPL vmlinux 0xd6d787c5	check_media_bay_by_base
+EXPORT_SYMBOL_GPL vmlinux 0xd73ef534	sysdev_resume
+EXPORT_SYMBOL_GPL vmlinux 0xd768e985	regulator_has_full_constraints
+EXPORT_SYMBOL_GPL vmlinux 0xd7a07d9d	transport_configure_device
+EXPORT_SYMBOL_GPL vmlinux 0xd7bf37e7	regulator_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xd7c6f6cd	register_pernet_device
+EXPORT_SYMBOL_GPL vmlinux 0xd7e5e921	udp4_lib_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xd7fe376d	da903x_clr_bits
+EXPORT_SYMBOL_GPL vmlinux 0xd800bfec	skcipher_geniv_init
+EXPORT_SYMBOL_GPL vmlinux 0xd801347a	ahash_attr_alg
+EXPORT_SYMBOL_GPL vmlinux 0xd81975a0	rtc_update_irq_enable
+EXPORT_SYMBOL_GPL vmlinux 0xd821964e	add_timer_on
+EXPORT_SYMBOL_GPL vmlinux 0xd8491a1a	anon_inode_getfile
+EXPORT_SYMBOL_GPL vmlinux 0xd87bc0f6	tty_perform_flush
+EXPORT_SYMBOL_GPL vmlinux 0xd8df6e83	device_register
+EXPORT_SYMBOL_GPL vmlinux 0xd8e7da0a	ring_buffer_overrun_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xd8f27446	platform_bus
+EXPORT_SYMBOL_GPL vmlinux 0xd93e0a11	cpufreq_driver_target
+EXPORT_SYMBOL_GPL vmlinux 0xd942e1c3	xfrm_output
+EXPORT_SYMBOL_GPL vmlinux 0xd949822d	crypto_alloc_aead
+EXPORT_SYMBOL_GPL vmlinux 0xd9a34ba2	rtnl_register
+EXPORT_SYMBOL_GPL vmlinux 0xd9bcb968	pci_cleanup_aer_uncorrect_error_status
+EXPORT_SYMBOL_GPL vmlinux 0xda086939	usb_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0xda1be8e1	async_synchronize_cookie_domain
+EXPORT_SYMBOL_GPL vmlinux 0xda37f00c	sata_link_resume
+EXPORT_SYMBOL_GPL vmlinux 0xda73a895	ata_sff_postreset
+EXPORT_SYMBOL_GPL vmlinux 0xda970b68	ata_cable_80wire
+EXPORT_SYMBOL_GPL vmlinux 0xdadd63b3	__fsnotify_parent
+EXPORT_SYMBOL_GPL vmlinux 0xdaf4dfb3	fb_mode_option
+EXPORT_SYMBOL_GPL vmlinux 0xdb011a91	sysfs_create_group
+EXPORT_SYMBOL_GPL vmlinux 0xdb274e52	monotonic_to_bootbased
+EXPORT_SYMBOL_GPL vmlinux 0xdb34d9ca	da903x_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xdb4f834f	fb_deferred_io_init
+EXPORT_SYMBOL_GPL vmlinux 0xdba30e8d	ide_host_remove
+EXPORT_SYMBOL_GPL vmlinux 0xdbaf5d7c	proc_net_fops_create
+EXPORT_SYMBOL_GPL vmlinux 0xdbc2eb24	disk_part_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0xdc72ffed	__ip_route_output_key
+EXPORT_SYMBOL_GPL vmlinux 0xdc99f000	filter_current_check_discard
+EXPORT_SYMBOL_GPL vmlinux 0xdcec9ed7	ata_sff_data_xfer
+EXPORT_SYMBOL_GPL vmlinux 0xdcfc1754	usb_anchor_urb
+EXPORT_SYMBOL_GPL vmlinux 0xdd6be4a9	invalidate_inode_pages2
+EXPORT_SYMBOL_GPL vmlinux 0xdd8ec993	fuse_dev_operations
+EXPORT_SYMBOL_GPL vmlinux 0xddc595db	task_active_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0xddc61ee0	ide_set_dma_mode
+EXPORT_SYMBOL_GPL vmlinux 0xddf0cde4	usb_put_dev
+EXPORT_SYMBOL_GPL vmlinux 0xde417b81	async_schedule_domain
+EXPORT_SYMBOL_GPL vmlinux 0xde808360	ide_capacity_proc_fops
+EXPORT_SYMBOL_GPL vmlinux 0xdecda349	sdev_evt_send_simple
+EXPORT_SYMBOL_GPL vmlinux 0xdee7bdf7	pm_runtime_resume
+EXPORT_SYMBOL_GPL vmlinux 0xdf27877b	register_timer_hook
+EXPORT_SYMBOL_GPL vmlinux 0xdf65c324	alloc_page_buffers
+EXPORT_SYMBOL_GPL vmlinux 0xdf7d68b8	fb_deferred_io_open
+EXPORT_SYMBOL_GPL vmlinux 0xdf968347	crypto_register_shash
+EXPORT_SYMBOL_GPL vmlinux 0xdfa925e2	ide_issue_pc
+EXPORT_SYMBOL_GPL vmlinux 0xe0158c91	scsi_target_block
+EXPORT_SYMBOL_GPL vmlinux 0xe02bbd0c	crypto_alloc_base
+EXPORT_SYMBOL_GPL vmlinux 0xe044ac7c	tcp_reno_ssthresh
+EXPORT_SYMBOL_GPL vmlinux 0xe04be78c	inotify_dentry_parent_queue_event
+EXPORT_SYMBOL_GPL vmlinux 0xe05b3af4	elv_register
+EXPORT_SYMBOL_GPL vmlinux 0xe06c94cc	usb_deregister_device_driver
+EXPORT_SYMBOL_GPL vmlinux 0xe07ef0e0	firmware_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xe0cca33e	xfrm_aead_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0xe0e029a4	crypto_init_shash_spawn
+EXPORT_SYMBOL_GPL vmlinux 0xe0fd6150	pci_disable_pcie_error_reporting
+EXPORT_SYMBOL_GPL vmlinux 0xe10884fb	blkcipher_walk_virt_block
+EXPORT_SYMBOL_GPL vmlinux 0xe13fc8ff	crypto_attr_alg2
+EXPORT_SYMBOL_GPL vmlinux 0xe16b956e	xfrm_audit_state_notfound_simple
+EXPORT_SYMBOL_GPL vmlinux 0xe18e0102	rtc_class_open
+EXPORT_SYMBOL_GPL vmlinux 0xe1ab3946	devm_kfree
+EXPORT_SYMBOL_GPL vmlinux 0xe1f4d491	pcie_port_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0xe20cd26b	ata_pci_bmdma_clear_simplex
+EXPORT_SYMBOL_GPL vmlinux 0xe23ff37c	pci_unblock_user_cfg_access
+EXPORT_SYMBOL_GPL vmlinux 0xe245a72d	tcp_twsk_destructor
+EXPORT_SYMBOL_GPL vmlinux 0xe25e49c0	save_stack_trace_tsk
+EXPORT_SYMBOL_GPL vmlinux 0xe3597017	inet_csk_get_port
+EXPORT_SYMBOL_GPL vmlinux 0xe388cced	__pci_complete_power_transition
+EXPORT_SYMBOL_GPL vmlinux 0xe3b3af70	ata_host_resume
+EXPORT_SYMBOL_GPL vmlinux 0xe42601f9	rdev_get_id
+EXPORT_SYMBOL_GPL vmlinux 0xe4317948	scsi_get_vpd_page
+EXPORT_SYMBOL_GPL vmlinux 0xe49e1f6c	ring_buffer_record_disable_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xe49ff3b0	ata_wait_register
+EXPORT_SYMBOL_GPL vmlinux 0xe4f79dab	spi_write_then_read
+EXPORT_SYMBOL_GPL vmlinux 0xe530071c	pm_qos_remove_requirement
+EXPORT_SYMBOL_GPL vmlinux 0xe5923561	ring_buffer_time_stamp
+EXPORT_SYMBOL_GPL vmlinux 0xe59a7c5c	platform_device_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xe615ea33	securityfs_create_dir
+EXPORT_SYMBOL_GPL vmlinux 0xe643ec7d	ata_eh_thaw_port
+EXPORT_SYMBOL_GPL vmlinux 0xe6465a24	mnt_want_write_file
+EXPORT_SYMBOL_GPL vmlinux 0xe6488b47	cpufreq_notify_transition
+EXPORT_SYMBOL_GPL vmlinux 0xe651f76e	selinux_is_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xe68dc55e	class_interface_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xe6ea481c	posix_timer_event
+EXPORT_SYMBOL_GPL vmlinux 0xe761a22f	vfs_cancel_lock
+EXPORT_SYMBOL_GPL vmlinux 0xe764ee67	drop_file_write_access
+EXPORT_SYMBOL_GPL vmlinux 0xe78d1aec	skb_icv_walk
+EXPORT_SYMBOL_GPL vmlinux 0xe7e28453	crypto_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0xe802ce13	usb_clear_halt
+EXPORT_SYMBOL_GPL vmlinux 0xe806b748	ata_ehi_clear_desc
+EXPORT_SYMBOL_GPL vmlinux 0xe85ee872	usb_sg_init
+EXPORT_SYMBOL_GPL vmlinux 0xe862c4b7	dpm_suspend_start
+EXPORT_SYMBOL_GPL vmlinux 0xe8789a12	eventfd_ctx_get
+EXPORT_SYMBOL_GPL vmlinux 0xe89cdf79	ata_scsi_queuecmd
+EXPORT_SYMBOL_GPL vmlinux 0xe8b93a92	sysdev_driver_register
+EXPORT_SYMBOL_GPL vmlinux 0xe8bb9457	sata_async_notification
+EXPORT_SYMBOL_GPL vmlinux 0xe901175f	__dev_addr_unsync
+EXPORT_SYMBOL_GPL vmlinux 0xe93e49c3	devres_free
+EXPORT_SYMBOL_GPL vmlinux 0xe9587909	usb_unregister_notify
+EXPORT_SYMBOL_GPL vmlinux 0xe9959c9a	ata_host_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xe9a94483	get_user_pages_fast
+EXPORT_SYMBOL_GPL vmlinux 0xe9de2fa7	ata_link_next
+EXPORT_SYMBOL_GPL vmlinux 0xe9f187c5	hwmon_device_register
+EXPORT_SYMBOL_GPL vmlinux 0xea065e01	task_handoff_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xea124bd1	gcd
+EXPORT_SYMBOL_GPL vmlinux 0xea418e0f	atapi_cmd_type
+EXPORT_SYMBOL_GPL vmlinux 0xea886996	usb_autopm_set_interface
+EXPORT_SYMBOL_GPL vmlinux 0xea920cd1	fib_rules_cleanup_ops
+EXPORT_SYMBOL_GPL vmlinux 0xeab978ff	pmac_i2c_open
+EXPORT_SYMBOL_GPL vmlinux 0xeae74760	scsi_nl_send_transport_msg
+EXPORT_SYMBOL_GPL vmlinux 0xeb16e0b2	__pneigh_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xeb4c1fc8	__tracepoint_block_remap
+EXPORT_SYMBOL_GPL vmlinux 0xebc682da	xattr_getsecurity
+EXPORT_SYMBOL_GPL vmlinux 0xec1a75a9	__dev_addr_sync
+EXPORT_SYMBOL_GPL vmlinux 0xec1b043e	regulator_suspend_prepare
+EXPORT_SYMBOL_GPL vmlinux 0xec1e9518	skb_cow_data
+EXPORT_SYMBOL_GPL vmlinux 0xec2b169f	crypto_shash_digest
+EXPORT_SYMBOL_GPL vmlinux 0xecb3adf6	aead_geniv_free
+EXPORT_SYMBOL_GPL vmlinux 0xeccfa885	pci_destroy_slot
+EXPORT_SYMBOL_GPL vmlinux 0xecea75d0	enable_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0xed1d4334	platform_device_add
+EXPORT_SYMBOL_GPL vmlinux 0xed2e4cf5	security_inode_mkdir
+EXPORT_SYMBOL_GPL vmlinux 0xed3f5b61	ide_dev_select
+EXPORT_SYMBOL_GPL vmlinux 0xed83a0c0	xfrm_audit_policy_delete
+EXPORT_SYMBOL_GPL vmlinux 0xedaa0b9e	spi_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0xedc2994d	ktime_get_real
+EXPORT_SYMBOL_GPL vmlinux 0xede6ba93	scsi_internal_device_unblock
+EXPORT_SYMBOL_GPL vmlinux 0xee46491a	crypto_mod_put
+EXPORT_SYMBOL_GPL vmlinux 0xee478b68	crypto_shoot_alg
+EXPORT_SYMBOL_GPL vmlinux 0xee582d9b	power_supply_class
+EXPORT_SYMBOL_GPL vmlinux 0xee7610de	ata_sff_qc_fill_rtf
+EXPORT_SYMBOL_GPL vmlinux 0xeea6c792	ide_exec_command
+EXPORT_SYMBOL_GPL vmlinux 0xeec63024	crypto_init_spawn2
+EXPORT_SYMBOL_GPL vmlinux 0xef074293	ata_sff_prereset
+EXPORT_SYMBOL_GPL vmlinux 0xef126570	pm_schedule_suspend
+EXPORT_SYMBOL_GPL vmlinux 0xef181598	fuse_put_request
+EXPORT_SYMBOL_GPL vmlinux 0xef4c8c74	blk_execute_rq_nowait
+EXPORT_SYMBOL_GPL vmlinux 0xef4e963e	__atomic_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xef6c3f70	round_jiffies_up_relative
+EXPORT_SYMBOL_GPL vmlinux 0xef82fdba	srcu_init_notifier_head
+EXPORT_SYMBOL_GPL vmlinux 0xefdd5a63	ktime_get_ts
+EXPORT_SYMBOL_GPL vmlinux 0xefe21106	snmp_mib_init
+EXPORT_SYMBOL_GPL vmlinux 0xefeecfd7	unregister_net_sysctl_table
+EXPORT_SYMBOL_GPL vmlinux 0xf04c52d0	simple_attr_release
+EXPORT_SYMBOL_GPL vmlinux 0xf0724890	ide_retry_pc
+EXPORT_SYMBOL_GPL vmlinux 0xf09d463b	skb_to_sgvec
+EXPORT_SYMBOL_GPL vmlinux 0xf0ab3a9b	br_fdb_test_addr_hook
+EXPORT_SYMBOL_GPL vmlinux 0xf0ba35d7	map_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0xf0cfdb0c	device_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xf0d616fe	pmf_get_function
+EXPORT_SYMBOL_GPL vmlinux 0xf105d00d	ide_in_drive_list
+EXPORT_SYMBOL_GPL vmlinux 0xf140af77	sysfs_create_link
+EXPORT_SYMBOL_GPL vmlinux 0xf1463412	execute_in_process_context
+EXPORT_SYMBOL_GPL vmlinux 0xf157b5c6	led_classdev_resume
+EXPORT_SYMBOL_GPL vmlinux 0xf184d189	kernel_power_off
+EXPORT_SYMBOL_GPL vmlinux 0xf19aec5b	kill_pid_info_as_uid
+EXPORT_SYMBOL_GPL vmlinux 0xf1cb5dbd	bus_rescan_devices
+EXPORT_SYMBOL_GPL vmlinux 0xf214347c	fb_deferred_io_fsync
+EXPORT_SYMBOL_GPL vmlinux 0xf21db403	dma_get_required_mask
+EXPORT_SYMBOL_GPL vmlinux 0xf22fdedd	ata_slave_link_init
+EXPORT_SYMBOL_GPL vmlinux 0xf2415e78	usb_get_from_anchor
+EXPORT_SYMBOL_GPL vmlinux 0xf2905e5c	fuse_conn_kill
+EXPORT_SYMBOL_GPL vmlinux 0xf29d16a2	class_dev_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0xf2f342da	macio_find
+EXPORT_SYMBOL_GPL vmlinux 0xf310a973	blk_rq_err_bytes
+EXPORT_SYMBOL_GPL vmlinux 0xf3163275	get_cpu_sysdev
+EXPORT_SYMBOL_GPL vmlinux 0xf3224304	inet_hash_connect
+EXPORT_SYMBOL_GPL vmlinux 0xf32dc2bb	inotify_add_watch
+EXPORT_SYMBOL_GPL vmlinux 0xf34806ec	hrtimer_get_res
+EXPORT_SYMBOL_GPL vmlinux 0xf3681fad	attribute_container_classdev_to_container
+EXPORT_SYMBOL_GPL vmlinux 0xf3a2c3ac	ide_intr
+EXPORT_SYMBOL_GPL vmlinux 0xf3c8cedb	register_kretprobes
+EXPORT_SYMBOL_GPL vmlinux 0xf40463ca	crypto_ahash_finup
+EXPORT_SYMBOL_GPL vmlinux 0xf422ba65	regulator_get_exclusive
+EXPORT_SYMBOL_GPL vmlinux 0xf43f950c	devres_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xf46b28d2	part_round_stats
+EXPORT_SYMBOL_GPL vmlinux 0xf4875030	platform_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xf499fdb2	rcu_barrier_bh
+EXPORT_SYMBOL_GPL vmlinux 0xf49a4ae4	ata_do_eh
+EXPORT_SYMBOL_GPL vmlinux 0xf5384ac1	__trace_printk
+EXPORT_SYMBOL_GPL vmlinux 0xf54bd49b	lcm
+EXPORT_SYMBOL_GPL vmlinux 0xf59dbb81	skb_partial_csum_set
+EXPORT_SYMBOL_GPL vmlinux 0xf5a691cd	invalidate_bh_lrus
+EXPORT_SYMBOL_GPL vmlinux 0xf5c73066	vfs_lock_file
+EXPORT_SYMBOL_GPL vmlinux 0xf62563d6	usb_lock_device_for_reset
+EXPORT_SYMBOL_GPL vmlinux 0xf6baf792	scatterwalk_map
+EXPORT_SYMBOL_GPL vmlinux 0xf6bcbd73	hwrng_register
+EXPORT_SYMBOL_GPL vmlinux 0xf6c8d6dc	blkcipher_walk_virt
+EXPORT_SYMBOL_GPL vmlinux 0xf6e874f5	ata_timing_merge
+EXPORT_SYMBOL_GPL vmlinux 0xf7030f72	vfs_getxattr
+EXPORT_SYMBOL_GPL vmlinux 0xf71d83d6	sata_set_spd
+EXPORT_SYMBOL_GPL vmlinux 0xf752f925	bus_for_each_dev
+EXPORT_SYMBOL_GPL vmlinux 0xf773cb9f	ata_eh_qc_complete
+EXPORT_SYMBOL_GPL vmlinux 0xf791ab3d	driver_attach
+EXPORT_SYMBOL_GPL vmlinux 0xf7c795c1	inotify_init
+EXPORT_SYMBOL_GPL vmlinux 0xf7d86336	usb_altnum_to_altsetting
+EXPORT_SYMBOL_GPL vmlinux 0xf7fbc574	ring_buffer_read_start
+EXPORT_SYMBOL_GPL vmlinux 0xf81a4f6c	file_ra_state_init
+EXPORT_SYMBOL_GPL vmlinux 0xf84cf6e0	devm_kzalloc
+EXPORT_SYMBOL_GPL vmlinux 0xf855de7e	ide_dma_sff_timer_expiry
+EXPORT_SYMBOL_GPL vmlinux 0xf863e82a	flush_work
+EXPORT_SYMBOL_GPL vmlinux 0xf873a71c	page_mkclean
+EXPORT_SYMBOL_GPL vmlinux 0xf87d0548	ata_port_desc
+EXPORT_SYMBOL_GPL vmlinux 0xf8802492	print_stack_trace
+EXPORT_SYMBOL_GPL vmlinux 0xf89b2967	sysdev_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0xf8af8294	regulator_count_voltages
+EXPORT_SYMBOL_GPL vmlinux 0xf8f3a0fb	ata_ratelimit
+EXPORT_SYMBOL_GPL vmlinux 0xf9a054b5	__round_jiffies
+EXPORT_SYMBOL_GPL vmlinux 0xf9ca3160	ata_id_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0xf9efc38d	xfrm_inner_extract_output
+EXPORT_SYMBOL_GPL vmlinux 0xfa03f3fa	ring_buffer_discard_commit
+EXPORT_SYMBOL_GPL vmlinux 0xfa134852	inotify_find_watch
+EXPORT_SYMBOL_GPL vmlinux 0xfa682b56	find_symbol
+EXPORT_SYMBOL_GPL vmlinux 0xfa715017	ata_sff_pause
+EXPORT_SYMBOL_GPL vmlinux 0xfb45310d	fs_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xfb7a395a	debugfs_create_u32
+EXPORT_SYMBOL_GPL vmlinux 0xfbb8a8cf	sysfs_create_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0xfbc112a9	get_inotify_watch
+EXPORT_SYMBOL_GPL vmlinux 0xfbf9be5d	register_oom_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xfbfd36dc	inotify_inode_is_dead
+EXPORT_SYMBOL_GPL vmlinux 0xfc09a99a	usb_deregister
+EXPORT_SYMBOL_GPL vmlinux 0xfc481bad	tcp_set_state
+EXPORT_SYMBOL_GPL vmlinux 0xfc8a2de2	regulator_set_voltage
+EXPORT_SYMBOL_GPL vmlinux 0xfc8e5ddb	user_match
+EXPORT_SYMBOL_GPL vmlinux 0xfc9df87f	crypto_alloc_tfm
+EXPORT_SYMBOL_GPL vmlinux 0xfcae8202	vfs_test_lock
+EXPORT_SYMBOL_GPL vmlinux 0xfcdafade	inotify_rm_wd
+EXPORT_SYMBOL_GPL vmlinux 0xfd38234c	scatterwalk_copychunks
+EXPORT_SYMBOL_GPL vmlinux 0xfd386a2a	ide_dma_test_irq
+EXPORT_SYMBOL_GPL vmlinux 0xfd8a2d88	relay_subbufs_consumed
+EXPORT_SYMBOL_GPL vmlinux 0xfdb95f67	rtc_alarm_irq_enable
+EXPORT_SYMBOL_GPL vmlinux 0xfde0b92c	crypto_larval_error
+EXPORT_SYMBOL_GPL vmlinux 0xfde96878	usb_ifnum_to_if
+EXPORT_SYMBOL_GPL vmlinux 0xfdf2cf6b	rtnl_put_cacheinfo
+EXPORT_SYMBOL_GPL vmlinux 0xfe041f98	tracepoint_iter_reset
+EXPORT_SYMBOL_GPL vmlinux 0xfe35ac6e	debugfs_create_bool
+EXPORT_SYMBOL_GPL vmlinux 0xfe52381d	uhci_reset_hc
+EXPORT_SYMBOL_GPL vmlinux 0xfe5fc906	usb_hcd_resume_root_hub
+EXPORT_SYMBOL_GPL vmlinux 0xfe990052	gpio_free
+EXPORT_SYMBOL_GPL vmlinux 0xfecfa4bc	transport_setup_device
+EXPORT_SYMBOL_GPL vmlinux 0xfed11ed1	usb_mon_deregister
+EXPORT_SYMBOL_GPL vmlinux 0xfee97613	kobject_get_path
+EXPORT_SYMBOL_GPL vmlinux 0xff05e8fd	device_move
+EXPORT_SYMBOL_GPL vmlinux 0xff3d3bee	add_page_wait_queue
+EXPORT_SYMBOL_GPL vmlinux 0xff62ca76	bus_find_device
+EXPORT_SYMBOL_GPL vmlinux 0xffabb87a	ata_dev_disable
+EXPORT_SYMBOL_GPL vmlinux 0xffaf7bbb	__wake_up_sync
+EXPORT_SYMBOL_GPL vmlinux 0xffafbdd2	crypto_register_ahash
+EXPORT_SYMBOL_GPL vmlinux 0xffc8855e	xfrm_audit_state_add
+EXPORT_UNUSED_SYMBOL vmlinux 0x00000000	simple_prepare_write
--- linux-mvl-dove-2.6.32.orig/debian.master/abi/2.6.32-34.73/powerpc/powerpc64-smp
+++ linux-mvl-dove-2.6.32/debian.master/abi/2.6.32-34.73/powerpc/powerpc64-smp
@@ -0,0 +1,9730 @@
+EXPORT_SYMBOL crypto/gf128mul 0x0c2f123f	gf128mul_4k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x1068004b	gf128mul_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x2f2889a0	gf128mul_init_64k_lle
+EXPORT_SYMBOL crypto/gf128mul 0x3755f990	gf128mul_init_64k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x384ef9ce	gf128mul_64k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x56af0dbd	gf128mul_x_ble
+EXPORT_SYMBOL crypto/gf128mul 0x83581089	gf128mul_init_4k_lle
+EXPORT_SYMBOL crypto/gf128mul 0x9b2560b9	gf128mul_init_4k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x9e13f6f6	gf128mul_lle
+EXPORT_SYMBOL crypto/gf128mul 0xbd17a0df	gf128mul_4k_lle
+EXPORT_SYMBOL crypto/gf128mul 0xc0890413	gf128mul_64k_lle
+EXPORT_SYMBOL crypto/gf128mul 0xd60736ec	gf128mul_free_64k
+EXPORT_SYMBOL crypto/xor 0x5b6c00e6	xor_blocks
+EXPORT_SYMBOL drivers/atm/suni 0xc93f6d6f	suni_init
+EXPORT_SYMBOL drivers/block/loop 0xbc4a2e19	loop_register_transfer
+EXPORT_SYMBOL drivers/block/loop 0xbfee3ad5	loop_unregister_transfer
+EXPORT_SYMBOL drivers/block/paride/paride 0x1d80e042	pi_do_claimed
+EXPORT_SYMBOL drivers/block/paride/paride 0x22d65af5	pi_read_block
+EXPORT_SYMBOL drivers/block/paride/paride 0x243c00ec	pi_schedule_claimed
+EXPORT_SYMBOL drivers/block/paride/paride 0x3d9dd5c4	paride_register
+EXPORT_SYMBOL drivers/block/paride/paride 0x54c76ac1	paride_unregister
+EXPORT_SYMBOL drivers/block/paride/paride 0x8902c34f	pi_write_block
+EXPORT_SYMBOL drivers/block/paride/paride 0x8a0485c8	pi_disconnect
+EXPORT_SYMBOL drivers/block/paride/paride 0xa675e744	pi_release
+EXPORT_SYMBOL drivers/block/paride/paride 0xa85eec7c	pi_write_regr
+EXPORT_SYMBOL drivers/block/paride/paride 0xae6d6136	pi_connect
+EXPORT_SYMBOL drivers/block/paride/paride 0xb3e90c5b	pi_read_regr
+EXPORT_SYMBOL drivers/block/paride/paride 0xb8edc90f	pi_init
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x17943df5	agp_create_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x17eb5749	agp_generic_destroy_pages
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x26f54527	agp_backend_release
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x2c02098a	agp_flush_chipset
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x30226ddf	agp_device_command
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x3443621a	agp_alloc_bridge
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x46640e1d	agp_unbind_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x4b085dbf	agp3_generic_configure
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x4ba98ab8	agp_enable
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x52daa7c0	agp_put_bridge
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x5347117c	agp_generic_destroy_page
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x60210f18	get_agp_version
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x60463068	agp_generic_create_gatt_table
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x6137a192	agp3_generic_tlbflush
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x673f815e	agp_bridges
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x7355872a	agp_free_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x7538b132	agp_off
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x7eab027a	agp_generic_free_by_type
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x7f621c03	agp_generic_free_gatt_table
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x92cbfe3e	agp_allocate_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x9f79310d	agp_generic_type_to_mask_type
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xa4d4f0e6	global_cache_flush
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xa5dc185d	agp_find_bridge
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xa9b4d7b7	agp_bind_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xb04ea8f0	agp_rebind_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xb1686a5b	agp_backend_acquire
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xb3c1ed1f	agp_generic_alloc_pages
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xc22e0c9f	agp_collect_device_status
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xc2424641	agp3_generic_cleanup
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xc5d9c46c	agp_try_unsupported_boot
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xc65abeb7	agp3_generic_sizes
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xc8336c57	agp_free_page_array
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xc8cda261	agp_generic_alloc_by_type
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xd0fef3b2	agp_free_key
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xd71be3ac	agp_generic_alloc_user
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xd9c7e97a	agp_copy_info
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xdc8a46b5	agp_bridge
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xddcd4f39	agp_generic_enable
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xde9b17ed	agp3_generic_fetch_size
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xe1dfc78d	agp_generic_insert_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xe3fe57c4	agp_generic_alloc_page
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xec563c5e	agp_alloc_page_array
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xf2d3ab29	agp_generic_mask_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xf73f5416	agp_generic_remove_memory
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x0bdd215f	ipmi_smi_add_proc_entry
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x14561d24	ipmi_register_for_cmd
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x1787b19d	ipmi_poll_interface
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x22a53c87	ipmi_unregister_smi
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x2ad64671	ipmi_register_smi
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x2f69dbe7	ipmi_set_my_LUN
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x3acaefa4	ipmi_smi_msg_received
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x40f2b10c	ipmi_alloc_smi_msg
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x44ca8faa	ipmi_free_recv_msg
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x4d87420b	ipmi_get_version
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x5ed8eaad	ipmi_smi_watcher_register
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x6ba408d1	ipmi_destroy_user
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x804f922a	ipmi_addr_length
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x86727e35	ipmi_set_gets_events
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x8bc922f3	ipmi_request_supply_msgs
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x8ccdd9b5	ipmi_smi_watcher_unregister
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x8d6b377d	ipmi_unregister_for_cmd
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x92e06572	ipmi_get_maintenance_mode
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x970d133d	ipmi_request_settime
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xa5e22634	ipmi_set_maintenance_mode
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xbf131a48	ipmi_set_my_address
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xc6766bf4	ipmi_get_my_address
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xc700947f	ipmi_smi_watchdog_pretimeout
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xcbe34dfb	ipmi_get_my_LUN
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe4f4665b	ipmi_validate_addr
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe899ab03	ipmi_create_user
+EXPORT_SYMBOL drivers/edac/edac_core 0x3d8bab15	edac_mc_find
+EXPORT_SYMBOL drivers/edac/edac_core 0xa673d4f9	edac_mc_handle_fbd_ue
+EXPORT_SYMBOL drivers/edac/edac_core 0xcaf507bd	edac_mc_handle_fbd_ce
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x012b874d	drm_idlelock_take
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x03038fe7	drm_property_destroy
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x03d54599	drm_encoder_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x04533910	drm_exit
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x05e8f1b6	drm_sg_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x063a1bfe	drm_mode_validate_size
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x06d602e4	drm_mm_debug_table
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x07caaa5f	drm_ioctl
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0826ee67	drm_agp_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0836695c	drm_sman_takedown
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x08f8e76e	drm_connector_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x09b381b9	drm_vblank_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0c47724d	drm_vblank_off
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0e5c2dae	drm_gem_vm_close
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0e63825d	drm_mode_create_dithering_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0f2b6398	drm_gem_object_lookup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x12068d9c	drm_framebuffer_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x163a7e32	drm_put_dev
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1864cab8	drm_mm_search_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1a6e25c1	drm_encoder_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1b1cb0fd	drm_agp_acquire
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1c8dfdbc	drm_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1dbe07a2	drm_agp_enable
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1dea5c15	drm_mode_attachmode_crtc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1f072c59	drm_property_add_enum
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x201f12fa	drm_mode_duplicate
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x20645642	drm_debug
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x21451ac4	drm_sman_owner_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2745704c	drm_mode_create_scaling_mode_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x286daa16	drm_mm_init_scan
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x290571f0	drm_mode_remove
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2916bf63	drm_sman_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x29bd5f80	drm_pci_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2d08af2e	drm_get_connector_name
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2eb2f903	drm_sman_free_key
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2f494614	drm_gem_mmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3074f033	drm_order
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x30f61e09	drm_mode_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3241dbb2	drm_rmmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x38d89ac0	drm_mode_detachmode_crtc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3c16f2eb	drm_debugfs_remove_files
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3c9a1409	drm_ht_just_insert_please
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3d0f7bb9	drm_mode_create_dirty_info_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3ede50cd	drm_gtf_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3f15bbcf	drm_vblank_get
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x414cfb7a	drm_mode_config_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x445b77af	drm_mm_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x44f46c6a	drm_get_dev
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x477704ba	drm_get_encoder_name
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4895da16	drm_master_put
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x48ddbb67	drm_debugfs_create_files
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4acce81c	drm_lock_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4b29a2f7	drm_master_get
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4e6fd34a	drm_agp_info
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4e9fa204	drm_mode_probed_add
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5011c69f	drm_free_agp
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x513da37b	drm_ati_pcigart_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x518eca6c	drm_open
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x51ff77b1	drm_get_resource_start
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x52e22ae6	drm_mmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x53035d44	drm_connector_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x55f060ee	drm_sman_set_range
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x55f7335d	drm_clflush_pages
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5688afc3	drm_crtc_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x573d90c8	drm_mode_prune_invalid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x580830f0	drm_mode_set_name
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x581de79b	drm_core_ioremapfree
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5fd266f0	drm_mm_dump_table
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x63ba539e	drm_addbufs_agp
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x63f3417f	drm_mode_connector_detach_encoder
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x645206f7	drm_mm_pre_get
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x660f3fd7	drm_do_probe_ddc_edid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x675f1c66	drm_connector_property_set_value
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6792cd67	drm_core_get_reg_ofs
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6a429264	drm_i2c_encoder_destroy
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6ca4a03e	drm_sysfs_connector_remove
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6cb56f06	drm_mm_put_block
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6d2e5837	drm_ut_debug_printk
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6d8f3279	drm_mm_search_free_in_range
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6e2bd6ee	drm_mm_get_block_generic
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6e9ffc54	drm_get_resource_len
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6fc30481	drm_mode_hsync
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x757c15aa	drm_lock_take
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x76c38f4e	drm_gem_vm_open
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7833d3b7	drm_agp_bind_pages
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x784915eb	drm_mode_vrefresh
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x788620ed	drm_core_ioremap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7becf9f2	drm_gem_object_handle_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7c1fd6c8	drm_mode_equal
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7caeb3ec	drm_connector_attach_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8298a1b7	drm_agp_release
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8509fca1	drm_mode_destroy
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x85de09f5	drm_mode_width
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x87d6e7ef	drm_detect_hdmi_monitor
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8b97f2f4	drm_mm_scan_remove_block
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8f320e94	drm_get_drawable_info
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x90b99d97	drm_cvt_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9a4fd3d5	drm_connector_property_get_value
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9b3b171d	drm_framebuffer_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9b4cfc5f	drm_pci_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9d863d1a	drm_mm_scan_add_block
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9fabdb8a	drm_vblank_post_modeset
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9fd73f9e	drm_mode_connector_update_edid_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa0fd6104	drm_i_have_hw_lock
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa1cedcb2	drm_addbufs_pci
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa1eabd87	drm_mode_list_concat
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa33c5d2f	drm_get_edid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa3722f25	drm_fasync
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa3d7c413	drm_core_ioremap_wc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa6777cf7	drm_rmmap_locked
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa690ab38	drm_i2c_encoder_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa7200084	drm_ati_pcigart_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xab6229e0	drm_gem_object_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xada919fe	drm_irq_uninstall
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xae6ece55	drm_core_reclaim_buffers
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xaf29788e	drm_sman_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb0783bce	drm_idlelock_release
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb34e553b	drm_property_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb4daca1b	drm_agp_bind
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb6b90a9f	drm_unbind_agp
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb8cef0d4	drm_sysfs_connector_add
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xba06bd6a	drm_mode_crtc_set_gamma_size
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xbe9acde0	drm_addmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc33dbe78	drm_add_edid_modes
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc4302b95	drm_mm_clean
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc464d681	drm_mm_get_block_range_generic
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc4f33d00	drm_mode_create_dvi_i_properties
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc6be82e6	drm_mode_connector_attach_encoder
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc8da7227	drm_read
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc8e8bd15	drm_mode_create_tv_properties
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xca2cbfc5	drm_poll
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcd69bfd5	drm_handle_vblank
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcdb1b8a8	drm_getsarea
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcdf2eff4	drm_mode_height
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd08fa3f0	drm_mode_set_crtcinfo
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3028e75	drm_sman_set_manager
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd338300a	drm_gem_handle_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3ffab51	drm_ht_remove
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd63d6819	drm_core_get_map_ofs
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xda2bbd0c	drm_vblank_pre_modeset
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdac20c58	drm_irq_install
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdb1a11b6	drm_vblank_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdcdaac7b	drm_mode_connector_list_update
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd3febe2	drm_gem_object_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd49095c	drm_ht_insert_item
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd65e538	drm_mode_validate_clocks
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe1457735	drm_ht_remove_item
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe1c848c7	drm_agp_unbind
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe24a7b88	drm_ht_find_item
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe3a49f47	drm_agp_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe43be265	drm_mode_object_find
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe47fd69b	drm_vblank_count
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe5bdce7e	drm_mode_debug_printmodeline
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe919dd5c	drm_sman_owner_clean
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf12777a8	drm_release
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf1421d13	drm_mode_sort
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf26f0d1e	drm_sysfs_hotplug_event
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf3071705	drm_mode_config_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf412411d	drm_crtc_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf42a2b26	drm_ht_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf5a03c3b	drm_add_modes_noedid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfa75d9e9	drm_agp_chipset_flush
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfbd0abb4	drm_vblank_put
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfc190dc0	drm_mm_takedown
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfdfbad19	drm_sman_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfe28f632	drm_compat_ioctl
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x1a28d5ec	drm_helper_encoder_in_use
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x21cac0be	drm_crtc_helper_set_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x28758f82	drm_fb_helper_set_par
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x28926c19	drm_fb_helper_init_crtc_count
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x2f959f11	drm_helper_probe_connector_modes
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x3aadae6c	drm_helper_hotplug_stage_two
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x4e76baf4	drm_helper_probe_single_connector_modes
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x52dbfce3	drm_helper_resume_force_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x6e071242	drm_fb_helper_add_connector
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x72a162ac	drm_fb_helper_single_fb_probe
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x7482914d	drm_helper_crtc_in_use
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x78ce8520	drm_fb_helper_check_var
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x83273cea	drm_fb_helper_pan_display
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x8a6fa28f	drm_fb_helper_setcolreg
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x8caa1cc0	drm_crtc_helper_set_config
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x8fe5e07c	drm_helper_mode_fill_fb_struct
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x9478aeed	drm_helper_disable_unused_functions
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x9d251144	drm_fb_helper_panic
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x9f15f0cf	drm_fb_helper_fill_var
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xb1b1fb79	drm_fb_helper_free
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xc00a2cb9	drm_helper_initial_config
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xc135b0a2	drm_helper_connector_dpms
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xc469c244	drm_fb_helper_restore
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xd756ab8b	i2c_dp_aux_add_bus
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xdfd1784b	drm_fb_helper_fill_fix
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xeafe6b8c	drm_fb_helper_setcmap
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xf1fb347e	drm_fb_helper_blank
+EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0xd6e2dbaf	radeonfb_remove
+EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0xd8c65b2f	radeonfb_resize
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x0a78285c	ttm_bo_swapout_all
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x0e79cdf6	ttm_suspend_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x107296ee	ttm_ref_object_base_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x158d4d96	ttm_object_device_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x1eb26d99	ttm_object_device_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x23ba8329	ttm_vt_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x25cf1a09	ttm_object_file_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x260f8893	ttm_mem_global_alloc
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x273633cf	ttm_bo_synccpu_write_grab
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x2ad2f71a	ttm_bo_clean_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x2b7834b0	ttm_read_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x2c70b82c	ttm_bo_kmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x2cca2e37	ttm_tt_set_placement_caching
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x365feb2e	ttm_eu_reserve_buffers
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x44409a13	ttm_global_item_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x4998650a	ttm_write_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x4a8ccfb5	ttm_bo_wait_cpu
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x4e0aa310	ttm_read_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x51553747	ttm_bo_synccpu_write_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x52c2c654	ttm_bo_validate
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x5ca5cb47	ttm_global_item_ref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x61bdb34f	ttm_eu_fence_buffer_objects
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x65320f54	ttm_bo_reserve
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x68a3f11a	ttm_base_object_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x6944cfb7	ttm_base_object_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x6e4fd0b1	ttm_bo_unmap_virtual
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x72880d75	ttm_bo_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x83738c23	ttm_bo_device_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x8639e509	ttm_fbdev_mmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x86a4066d	ttm_eu_backoff_reservation
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x9371f948	ttm_vt_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x96a7d319	ttm_bo_move_accel_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x9ae0a443	ttm_tt_populate
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xa3ab2f80	ttm_bo_wait
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xab29038c	ttm_bo_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xac0e50d1	ttm_round_pot
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xac4517b2	ttm_bo_mem_space
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xbd0ff59e	ttm_object_file_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xbdc74f35	ttm_lock_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc1a28692	ttm_bo_move_memcpy
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc4704ca8	ttm_bo_evict_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc4d55ddb	ttm_tt_bind
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc5ac4d80	ttm_bo_init_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc64022a6	ttm_bo_global_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc985ee54	ttm_write_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xd2b2d062	ttm_bo_move_ttm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xd838863c	ttm_bo_unreserve
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xda84af8c	ttm_mem_global_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xddd37e48	ttm_bo_wait_unreserved
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xdf426545	ttm_mem_global_free
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xe4a2d4fa	ttm_base_object_lookup
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xe945037e	ttm_bo_mmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xf52e5f52	ttm_suspend_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xf6b7ea7e	ttm_ref_object_add
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xf77191bd	ttm_mem_global_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xf7beeccd	ttm_agp_backend_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xf8c73be3	ttm_bo_kunmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xfcce372b	ttm_bo_global_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xfe362a63	ttm_io_prot
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xff74d5d4	ttm_bo_device_release
+EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0x0903c239	vid_from_reg
+EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0xef1c781c	vid_which_vrm
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0x0381f2f9	i2c_pca_add_numbered_bus
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0xaa5c496d	i2c_pca_add_bus
+EXPORT_SYMBOL drivers/i2c/busses/i2c-amd756 0xa5d03e45	amd756_smbus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x036d09d4	hpsb_set_hostinfo_key
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x040ddb8f	hpsb_packet_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x093deab5	hpsb_selfid_complete
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0b234c4e	dma_prog_region_alloc
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x158ac548	dma_region_offset_to_bus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x170ed812	hpsb_lock
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1a200e5a	csr1212_release_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1d102b8a	hpsb_iso_recv_release_packets
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1d4be42e	hpsb_iso_n_ready
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x200c97dc	hpsb_add_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x220e5e90	hpsb_make_writepacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2a4cc36b	csr1212_attach_keyval_to_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2d173a48	hpsb_remove_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2ebf6e5a	dma_prog_region_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2fbc5a72	hpsb_resume_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3802af23	hpsb_packet_sent
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3861140b	hpsb_register_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3892bd99	hpsb_send_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3bb6045d	hpsb_update_config_rom
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3dcc6ce1	hpsb_bus_reset
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x435a5bd5	__hpsb_register_protocol
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x474e353b	hpsb_free_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x47ad0e3e	hpsb_selfid_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x47fdf982	hpsb_get_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x49a95dc4	csr1212_get_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4a9cd770	csr1212_parse_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x52ba6ae0	hpsb_iso_shutdown
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x58407eef	hpsb_write
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x59571a14	hpsb_reset_bus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5b0c5614	hpsb_free_tlabel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5b16f161	hpsb_iso_packet_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5dfaa9c7	hpsb_iso_wake
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5dfe6391	hpsb_protocol_class
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5e6b404f	hpsb_alloc_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5f5fdd2f	csr1212_new_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x63132047	hpsb_unregister_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x672ad148	dma_region_sync_for_device
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x68b51e47	csr1212_read
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6dd9c690	hpsb_read
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x72aa929e	hpsb_create_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x74cab304	hpsb_unregister_highlevel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x75cc4cd9	hpsb_make_streampacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7619745e	hpsb_unregister_protocol
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x76bc1a5c	dma_region_free
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7b519ad6	hpsb_iso_xmit_start
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x831d2028	hpsb_read_cycle_timer
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x879433ae	dma_region_mmap
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8879f8f0	dma_region_sync_for_cpu
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8aea5176	hpsb_iso_recv_flush
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8ec2b312	dma_region_alloc
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x948968e9	hpsb_get_hostinfo_bykey
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa43ccc23	hpsb_iso_xmit_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xab5cf3ee	hpsb_set_packet_complete_task
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xadb41e91	hpsb_make_lock64packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaef57bb5	csr1212_detach_keyval_from_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb044986d	hpsb_alloc_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb35efc36	hpsb_destroy_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb53fd5bf	hpsb_allocate_and_register_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb7bb9317	hpsb_register_highlevel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc29dc257	hpsb_update_config_rom_image
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc6f9876c	hpsb_make_phypacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc92423e7	hpsb_iso_stop
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xcaf31aae	hpsb_iso_xmit_queue_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xcb187f60	hpsb_make_readpacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xcd9e772b	dma_prog_region_free
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd150ad09	hpsb_iso_recv_set_channel_mask
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd3c41dcd	hpsb_iso_recv_start
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd3e8e331	hpsb_iso_recv_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd66caa05	hpsb_iso_xmit_sync
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd73d80f2	hpsb_node_write
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xdabfdbc7	hpsb_make_lockpacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xdd1226b5	hpsb_packet_success
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe43e47f2	hpsb_iso_recv_unlisten_channel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe4d5b548	hpsb_get_tlabel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xea4152ff	dma_region_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xebe25d66	hpsb_iso_recv_listen_channel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xee584630	hpsb_set_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf5baf38c	hpsb_node_fill_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfba57f51	hpsb_speedto_str
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfcf8e3aa	hpsb_iso_packet_sent
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x1d5aeebc	ohci1394_init_iso_tasklet
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x28e023ea	ohci1394_stop_context
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0xb726b031	ohci1394_unregister_iso_tasklet
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0xc6357824	ohci1394_register_iso_tasklet
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x19dd9a74	rdma_resolve_ip
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x2e35f198	rdma_addr_cancel
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x6e7a5651	rdma_addr_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x823d8c6f	rdma_translate_ip
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x8ba15d00	rdma_copy_addr
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xee867448	rdma_addr_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x113eeed8	ib_send_cm_mra
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x2282cb75	ib_send_cm_dreq
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x2c0a1732	ib_send_cm_drep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x2c79f5da	ib_send_cm_apr
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x2d1f2e9f	ib_send_cm_sidr_req
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x3816a516	cm_class
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x4d34d11b	ib_send_cm_lap
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x52f15722	ib_send_cm_req
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x5741d1f4	ib_cm_notify
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x590870c2	ib_cm_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x7b0e268c	ib_send_cm_rep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x824f3f9b	ib_cm_listen
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x9905be95	ib_destroy_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xb6a46f59	ib_send_cm_sidr_rep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xc594ea07	ib_send_cm_rej
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xefe7bf74	ib_create_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xfd6d20db	ib_send_cm_rtu
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x05ec0d94	ib_register_event_handler
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x06830b9a	ib_pack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x07b07efb	ib_create_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0808fccb	ib_find_cached_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x086bcaef	ib_query_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x094d0479	ib_dispatch_event
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0e9189ae	ib_detach_mcast
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0f7284af	ib_create_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0f95e7c8	ib_get_cached_lmc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x13f61e41	ib_dealloc_pd
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1596a659	ib_init_ah_from_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1e491a04	ib_unmap_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1f002236	ib_alloc_pd
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x22276581	ib_modify_port
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x255afc22	ib_flush_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x26974ddc	ib_get_cached_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2da51ae7	ib_attach_mcast
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2fdb9db4	ib_modify_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3d59ba7e	ib_modify_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3f7567fd	ib_rate_to_mult
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3fa3781b	ib_fmr_pool_unmap
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x41d082b9	ib_dealloc_mw
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x57157cf7	ib_create_ah_from_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5a858e18	ib_fmr_pool_map_phys
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5cce8ee8	ib_query_port
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5ea3fbd3	ib_get_dma_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6744b467	ib_resize_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x77df4826	ib_unregister_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7aa077cb	ib_create_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7be3fbe2	ib_query_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7cf8485b	ib_query_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7d7c569b	ib_create_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7f1bd2be	ib_query_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x803aff9e	ib_dealloc_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x810b63e3	ib_reg_phys_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8568ffea	ib_create_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8640eaeb	ib_modify_qp_is_ok
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x86ce884a	ib_register_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x87b614d8	ib_ud_header_pack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x89453aea	ib_destroy_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8b3bc259	ib_alloc_fast_reg_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x917c6c84	ib_find_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x96ce6c46	rdma_node_get_transport
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x991a3750	ib_unregister_event_handler
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9b796201	ib_get_client_data
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9d804fa1	mult_to_ib_rate
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9feeebef	ib_destroy_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa305bd06	ib_dereg_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xaeda9e2d	ib_rereg_phys_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb0645cf8	ib_set_client_data
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb80411c4	ib_umem_get
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb8324f8b	ib_destroy_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xba74cbd2	ib_free_fast_reg_page_list
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xbefd6b2e	ib_modify_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xbf73112c	ib_alloc_mw
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc072bf49	ib_find_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc5056a9a	ib_alloc_fast_reg_page_list
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc53819ff	ib_destroy_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc8a446ac	ib_alloc_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xca63a9b7	ib_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xca99148d	ib_query_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xcd915881	ib_query_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd17ba9d1	ib_ud_header_init
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd3895eca	ib_modify_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd751b927	ib_query_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xdde12a0d	ib_destroy_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xde95c388	ib_umem_release
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe20a90cc	ib_umem_page_count
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe4a7a498	ib_find_cached_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe59f7372	ib_alloc_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xeb448130	ib_dealloc_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf1d1bbd4	ib_modify_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf36498b9	ib_ud_header_unpack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf799a1a1	ib_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf96fc9de	ib_unpack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xff89aa3b	ib_get_cached_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x145e18cd	ib_register_mad_snoop
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x1ff13d73	ib_register_mad_agent
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x2dc76d46	ib_process_mad_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x32191b5a	ib_cancel_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x58150fa8	ib_post_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6acc9c62	ib_free_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6ef787ed	ib_response_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6f077fcf	ib_get_mad_data_offset
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x72ad5a8c	ib_redirect_mad_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x7b5d4b7a	ib_is_mad_class_rmpp
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x99299491	ib_unregister_mad_agent
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xa80e2ac4	ib_get_rmpp_segment
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xaa4f4d69	ib_create_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xd41f235e	ib_modify_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xef9d3d48	ib_free_recv_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x035303e4	ib_init_ah_from_mcmember
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x38765d6c	ib_sa_service_rec_query
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x576fdbac	ib_sa_free_multicast
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x59d6e5a5	ib_sa_join_multicast
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x6043324f	ib_sa_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x94bf195d	ib_sa_path_rec_get
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xac92942a	ib_sa_cancel_query
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xc2500269	ib_init_ah_from_path
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xdb92ca47	ib_sa_get_mcmember_rec
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xf6a5def7	ib_sa_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x02f847bc	ib_copy_path_rec_from_user
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x07cf5a51	ib_copy_ah_attr_to_user
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x18382f6a	ib_copy_path_rec_to_user
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x184f3575	ib_copy_qp_attr_to_user
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x3b3756ea	iw_create_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x5b3bf853	iw_cm_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x72c03ea5	iw_cm_disconnect
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x8f41d9b4	iw_destroy_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xba7fed6e	iw_cm_reject
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xd4ddbebe	iw_cm_connect
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xf05cb9ff	iw_cm_accept
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xf191fe01	iw_cm_listen
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x060e607a	rdma_create_qp
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x073d15c0	rdma_resolve_addr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x17fc1ff7	rdma_bind_addr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x28569c02	rdma_leave_multicast
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x3346c8d2	rdma_disconnect
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x39a79371	rdma_reject
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x5536d6c5	rdma_resolve_route
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x5f4bb03e	rdma_set_ib_paths
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x6162e433	rdma_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x617a764b	rdma_listen
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x684842a8	rdma_connect
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x7022e14b	rdma_join_multicast
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x9a733235	rdma_destroy_qp
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x9f9bcb87	rdma_set_service_type
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xc504fa22	rdma_destroy_id
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xc6aaa11c	rdma_create_id
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xeadd1412	rdma_accept
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xf8686608	rdma_notify
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x3db67472	gameport_close
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x474a624e	gameport_unregister_port
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x5295503a	gameport_set_phys
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x7ac3d489	gameport_start_polling
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x8f4f7972	gameport_stop_polling
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x9480b77c	__gameport_register_driver
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x9959efcc	gameport_unregister_driver
+EXPORT_SYMBOL drivers/input/gameport/gameport 0xa593fb74	gameport_open
+EXPORT_SYMBOL drivers/input/gameport/gameport 0xb7eae2b9	__gameport_register_port
+EXPORT_SYMBOL drivers/input/input-polldev 0x13ea93b3	input_register_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0x7d650e55	input_free_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0xd87dd060	input_allocate_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0xe96c8e23	input_unregister_polled_device
+EXPORT_SYMBOL drivers/md/dm-log 0x0af591db	dm_dirty_log_destroy
+EXPORT_SYMBOL drivers/md/dm-log 0x7fb0709a	dm_dirty_log_type_register
+EXPORT_SYMBOL drivers/md/dm-log 0xb97c5adb	dm_dirty_log_type_unregister
+EXPORT_SYMBOL drivers/md/dm-log 0xdcf7568c	dm_dirty_log_create
+EXPORT_SYMBOL drivers/md/dm-snapshot 0x203c4799	dm_exception_store_type_unregister
+EXPORT_SYMBOL drivers/md/dm-snapshot 0xa0edd583	dm_exception_store_type_register
+EXPORT_SYMBOL drivers/md/dm-snapshot 0xe72cc93a	dm_exception_store_destroy
+EXPORT_SYMBOL drivers/md/dm-snapshot 0xf5c0b90b	dm_exception_store_create
+EXPORT_SYMBOL drivers/md/md-mod 0x004238e1	md_check_recovery
+EXPORT_SYMBOL drivers/md/md-mod 0x01daddf9	register_md_personality
+EXPORT_SYMBOL drivers/md/md-mod 0x01ecca5e	md_write_end
+EXPORT_SYMBOL drivers/md/md-mod 0x074d4b79	md_register_thread
+EXPORT_SYMBOL drivers/md/md-mod 0x34b27325	md_integrity_add_rdev
+EXPORT_SYMBOL drivers/md/md-mod 0x3f818f27	bitmap_cond_end_sync
+EXPORT_SYMBOL drivers/md/md-mod 0x4b911445	bitmap_close_sync
+EXPORT_SYMBOL drivers/md/md-mod 0x5e5ceb26	md_integrity_register
+EXPORT_SYMBOL drivers/md/md-mod 0x79ab75c8	md_unregister_thread
+EXPORT_SYMBOL drivers/md/md-mod 0x9997ad04	bitmap_endwrite
+EXPORT_SYMBOL drivers/md/md-mod 0xb44aa42f	md_wakeup_thread
+EXPORT_SYMBOL drivers/md/md-mod 0xb66db67a	bitmap_start_sync
+EXPORT_SYMBOL drivers/md/md-mod 0xc5647220	mddev_congested
+EXPORT_SYMBOL drivers/md/md-mod 0xd11abefd	md_write_start
+EXPORT_SYMBOL drivers/md/md-mod 0xd1d3ef19	md_set_array_sectors
+EXPORT_SYMBOL drivers/md/md-mod 0xddbaddd7	bitmap_unplug
+EXPORT_SYMBOL drivers/md/md-mod 0xe3bd6ed4	bitmap_startwrite
+EXPORT_SYMBOL drivers/md/md-mod 0xe7e314b8	md_wait_for_blocked_rdev
+EXPORT_SYMBOL drivers/md/md-mod 0xec577410	md_check_no_bitmap
+EXPORT_SYMBOL drivers/md/md-mod 0xf54c92c3	md_done_sync
+EXPORT_SYMBOL drivers/md/md-mod 0xf81019dd	bitmap_end_sync
+EXPORT_SYMBOL drivers/md/md-mod 0xfba13263	md_error
+EXPORT_SYMBOL drivers/md/md-mod 0xffeaa812	unregister_md_personality
+EXPORT_SYMBOL drivers/md/raid6_pq 0x0bd662f6	raid6_gfmul
+EXPORT_SYMBOL drivers/md/raid6_pq 0x15fe0cd3	raid6_gfexp
+EXPORT_SYMBOL drivers/md/raid6_pq 0x5ba93f9d	raid6_gfinv
+EXPORT_SYMBOL drivers/md/raid6_pq 0x7456cc61	raid6_empty_zero_page
+EXPORT_SYMBOL drivers/md/raid6_pq 0xce45a6f1	raid6_gfexi
+EXPORT_SYMBOL drivers/media/common/tuners/mc44s803 0x2e4725db	mc44s803_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mt2060 0x21c766f7	mt2060_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mt2131 0x3a4f0b17	mt2131_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mt2266 0x23f26555	mt2266_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mxl5005s 0xf582388b	mxl5005s_attach
+EXPORT_SYMBOL drivers/media/common/tuners/qt1010 0x6ad38fbc	qt1010_attach
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0x0cb4b189	tuners
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0xc2821775	tuner_count
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-xc2028 0xe2ce6919	xc2028_attach
+EXPORT_SYMBOL drivers/media/common/tuners/xc5000 0x86b8e510	xc5000_attach
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x1945b581	flexcop_device_initialize
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x1fb50ca4	flexcop_dma_control_timer_irq
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x2ffa97c5	flexcop_eeprom_check_mac_addr
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x36a16974	flexcop_sram_set_dest
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x4b844bb8	flexcop_pass_dmx_data
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x5757508a	flexcop_pid_feed_control
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x5ac18b48	flexcop_dma_allocate
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x67de82bd	flexcop_dma_config
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x67ed4eb1	flexcop_wan_set_speed
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x70217e40	flexcop_dma_config_timer
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x754ac07a	flexcop_dump_reg
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xaaaf8408	flexcop_device_kmalloc
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xb8bdb575	flexcop_sram_ctrl
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xbf52a65b	flexcop_pass_dmx_packets
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xbf6c684e	flexcop_dma_free
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xcd5685b0	flexcop_device_exit
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xd1c733d9	flexcop_i2c_request
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xd4699043	flexcop_device_kfree
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xf1f01ae8	flexcop_dma_control_size_irq
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xf64f9661	flexcop_dma_xfer_control
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x2923456b	bt878_start
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x3050d468	bt878_device_control
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x6474146c	bt878
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xd5d0bdef	bt878_num
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xfe5debcf	bt878_stop
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x0c34bb00	rdc_reset_state
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x0fe7eaf0	read_dst
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x3d9cb044	dst_error_bailout
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x414ce4a3	dst_attach
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x5e2006cd	dst_pio_disable
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x62c2141f	dst_wait_dst_ready
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xb3b547d2	dst_error_recovery
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xe94b8c9c	dst_check_sum
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xf1f4b38e	dst_comm_init
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xfbc75390	write_dst
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst_ca 0x61cc24e7	dst_ca_attach
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x01c746c2	dvb_dmx_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0c3c3b82	dvb_generic_ioctl
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0c4d4a14	dvb_frontend_sleep_until
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0cf22966	dvb_dmx_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x14dfa7e4	dvb_generic_open
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x155a1df0	dvb_ca_en50221_frda_irq
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x1cee4c5e	dvb_dmx_swfilter
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x22cbb1c1	dvb_ringbuffer_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x25ee78ee	dvb_ringbuffer_flush_spinlock_wakeup
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x3434efc2	dvb_unregister_frontend
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x3b4683b8	dvb_net_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x4011d18e	dvb_ringbuffer_write
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x48235682	dvb_dmx_swfilter_204
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x4c0606cc	dvb_unregister_adapter
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x5048b611	dvb_register_device
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x5ab27315	dvb_ca_en50221_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x5b29cb97	dvb_dmx_swfilter_packets
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6d54f72e	dvb_ringbuffer_read
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x722c1c38	dvb_frontend_detach
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x74a5a698	dvb_filter_pes2ts_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x80e3832d	dvb_filter_get_ac3info
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x829c2085	dvb_ringbuffer_empty
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x88b9ad4a	dvb_net_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x8f8634e8	dvb_ringbuffer_free
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x9174e73a	dvb_dmxdev_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x96a6ac64	dvb_generic_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xa2d6f3ac	dvb_register_adapter
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xa7d53547	dvb_dmxdev_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xac4ca1b0	intlog2
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb2f46147	dvb_ca_en50221_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb956c556	dvb_ringbuffer_avail
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xbc0d91e1	timeval_usec_diff
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xc2c146e0	dvb_ca_en50221_camready_irq
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xd25bcb43	dvb_ringbuffer_read_user
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe1032626	dvb_frontend_reinitialise
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe49ffafd	dvb_ca_en50221_camchange_irq
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe5ae8707	intlog10
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe7065728	dvb_register_frontend
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe90e97fe	dvb_unregister_device
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf826deb0	dvb_filter_pes2ts
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x432289a3	dvb_usb_get_hexline
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x7117f7ad	dvb_usb_generic_write
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xa04f507f	dvb_usb_nec_rc_key_to_event
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xa950dd17	dvb_usb_device_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xbf818dcb	dvb_usb_device_exit
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xde812923	dvb_usb_generic_rw
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xe4b464ee	usb_cypress_load_firmware
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x0220830a	af9005_rc_decode
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x3693500b	af9005_rc_keys
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0xd3383957	af9005_rc_keys_size
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x10a19e6d	dibusb2_0_power_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x13fb394a	dibusb_streaming_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x3f0e4b7b	dibusb_dib3000mc_tuner_attach
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x4aeebd7b	dibusb_rc_query
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x4afa9525	dibusb_pid_filter
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x5b339d01	dibusb2_0_streaming_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x9ff65fa1	dibusb_dib3000mc_frontend_attach
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xab3bb5b8	dibusb_read_eeprom_byte
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xcc9ccaff	dibusb_rc_keys
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xd2e67152	dibusb_pid_filter_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xec009864	dibusb_power_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xf3d81c5f	dibusb_i2c_algo
+EXPORT_SYMBOL drivers/media/dvb/frontends/af9013 0x1c982a28	af9013_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/au8522 0x6ec55563	au8522_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/bcm3510 0xc3e16413	bcm3510_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx22700 0xf3e3cd1b	cx22700_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx22702 0xa03dfdc9	cx22702_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24110 0x01521fd4	cx24110_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0x2f0102b0	cx24113_agc_callback
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0xc127a1b7	cx24113_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24116 0x6021ddb6	cx24116_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0xa7f536eb	cx24123_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0xf27c60f7	cx24123_get_tuner_i2c_adapter
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0x25092d69	dib0070_ctrl_agc_filter
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0x2e38a13c	dib0070_wbd_offset
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0xf4f4385a	dib0070_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mb 0x0a32ab72	dib3000mb_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x1df961ac	dib3000mc_set_config
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x5181bff4	dib3000mc_get_tuner_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x81f80598	dib3000mc_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x84f63f5f	dib3000mc_pid_control
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xbf4ec575	dib3000mc_i2c_enumeration
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xcdbd06df	dib3000mc_pid_parse
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0x39c8dd8f	dib7000m_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0x3c37da12	dib7000m_get_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x0ff79558	dib7000p_i2c_enumeration
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x2248af67	dib7000p_set_wbd_ref
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x2adb13f6	dib7000pc_detection
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x6614848a	dib7000p_get_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x70606fd4	dib7000p_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x87d903d3	dib7000p_set_gpio
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x3280d537	dib8000_i2c_enumeration
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x6279b4c0	dib8000_set_wbd_ref
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x92c65ae0	dib8000_get_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0xacfd9612	dib8000_set_gpio
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0xf606cac7	dib8000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x3dfd7f59	dibx000_init_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x6cfa45c1	dibx000_exit_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0xcc738401	dibx000_reset_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0xfd394c3b	dibx000_get_i2c_adapter
+EXPORT_SYMBOL drivers/media/dvb/frontends/dvb-pll 0xc7564370	dvb_pll_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/isl6405 0x1874a560	isl6405_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/isl6421 0x916d0903	isl6421_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/itd1000 0xba3ec26f	itd1000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/l64781 0x841b586e	l64781_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt3305 0xe8044e86	lgdt3305_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt330x 0x4384a559	lgdt330x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lgs8gxx 0x0e788d01	lgs8gxx_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0x9041c73b	lnbp21_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0xd0feafde	lnbh24_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/mt312 0x25fc091f	mt312_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/mt352 0xe5f9fd0a	mt352_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/nxt200x 0x5253a593	nxt200x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/nxt6000 0x2b24d454	nxt6000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/or51132 0x421a0ed2	or51132_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/or51211 0x564878fb	or51211_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1409 0xca19675a	s5h1409_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1411 0x3b9bb78a	s5h1411_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0x21e5994a	s5h1420_get_tuner_i2c_adapter
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0xde633d91	s5h1420_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/si21xx 0xaee15062	si21xx_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/sp8870 0x97e9513c	sp8870_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/sp887x 0x03d5728e	sp887x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stb6000 0x66dc3b49	stb6000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0288 0xc1a19a76	stv0288_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0297 0x6a0d1964	stv0297_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0299 0xc64226c5	stv0299_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0900 0x2240a2c0	stv0900_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv6110 0x133e8377	stv6110_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10021 0xd673dba8	tda10021_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10023 0x0254016a	tda10023_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10048 0x5e0abbca	tda10048_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x91f0efc6	tda10045_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0xf0941bcc	tda10046_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10086 0x01e00378	tda10086_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda8083 0xdc25c42e	tda8083_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda826x 0x8567d4d6	tda826x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/ves1820 0x00636fed	ves1820_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/ves1x93 0x7ac7aa74	ves1x93_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/zl10036 0x6306d66d	zl10036_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/zl10039 0x645e28d8	zl10039_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/zl10353 0x5981edb5	zl10353_attach
+EXPORT_SYMBOL drivers/media/dvb/ttpci/ttpci-eeprom 0x18a01fd2	ttpci_eeprom_parse_mac
+EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0x8ab36345	ttusbdecfe_dvbs_attach
+EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0xa174628f	ttusbdecfe_dvbt_attach
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x11dc4b6d	bttv_gpio_enable
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x17ce9ba9	bttv_sub_unregister
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x8ecf4acc	bttv_write_gpio
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xbcf2d2fb	bttv_read_gpio
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xc70f1c73	bttv_get_pcidev
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xdae37eb6	bttv_sub_register
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0x1ebf0280	btcx_riscmem_free
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0x495e4b0c	btcx_calc_skips
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0x99385c91	btcx_riscmem_alloc
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xad2fe38b	btcx_sort_clips
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xc368f8e6	btcx_align
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xcda0ded2	btcx_screen_clips
+EXPORT_SYMBOL drivers/media/video/cpia 0x8525aff2	cpia_register_camera
+EXPORT_SYMBOL drivers/media/video/cpia 0xe4f7ecaf	cpia_unregister_camera
+EXPORT_SYMBOL drivers/media/video/cx18/cx18 0x2cdea06d	cx18_reset_ir_gpio
+EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0x31912fa8	cx231xx_register_extension
+EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0x680967b6	cx231xx_unregister_extension
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x155650f3	cx2341x_ctrl_get_menu
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x1ca0c084	cx2341x_log_status
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x2f25eee2	cx2341x_update
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x5b88faf6	cx2341x_ext_ctrls
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf76ce95	cx2341x_fill_defaults
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf8b77a4	cx2341x_mpeg_ctrls
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xe2c2b5eb	cx2341x_ctrl_query
+EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0x130d1990	vp3054_i2c_remove
+EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0xb0af6652	vp3054_i2c_probe
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x069cb59b	cx88_get_control
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x08b6fb15	cx88_set_freq
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x762caaa5	cx88_video_mux
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xac4e53b9	cx88_user_ctrls
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xcebe9d4d	cx88_enum_input
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xd93171ed	cx8800_ctrl_query
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xedd6f9f5	cx88_set_control
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x0731ebf3	cx8802_unregister_driver
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x1602dde7	cx8802_get_device
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x452ffd83	cx8802_cancel_buffers
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x5fa473b7	cx8802_buf_prepare
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x7137ace6	cx8802_get_driver
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x86d643b5	cx8802_register_driver
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x900d2076	cx8802_buf_queue
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x0a926549	cx88_risc_databuffer
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x10c67a2c	cx88_core_irq
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x14bc50b4	cx88_newstation
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x1a3cdc62	cx88_dsp_detect_stereo_sap
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x1d5b9762	cx88_reset
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x1eeea348	cx88_get_stereo
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x32c7717c	cx88_shutdown
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x3473e2eb	cx88_ir_start
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x5ab47c34	cx88_set_scale
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x6141c8c5	cx88_tuner_callback
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x6db6ab0e	cx88_set_tvaudio
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x904b8696	cx88_audio_thread
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x9694e392	cx88_wakeup
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x97ae3c4b	cx88_core_put
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x9b140fff	cx88_sram_channels
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xa88a8d1d	cx88_free_buffer
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xabdb4990	cx88_sram_channel_setup
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xad0a1e62	cx88_vdev_init
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb47f6cda	cx88_print_irqbits
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xba36dab0	cx88_sram_channel_dump
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xd18a1452	cx88_set_stereo
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xd194b84d	cx88_risc_buffer
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xd9b78d9f	cx88_ir_stop
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xdc78bd7c	cx88_core_get
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xe6431927	cx88_set_tvnorm
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xff168563	cx88_risc_stopper
+EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0x4a219371	em28xx_register_extension
+EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0x964ac77c	em28xx_unregister_extension
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x4b62ea00	gspca_get_i_frame
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x4ea800c1	gspca_dev_probe
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x534f1413	gspca_auto_gain_n_exposure
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x752d2418	gspca_frame_add
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x9670af2c	gspca_debug
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xb2122598	gspca_resume
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xe374492c	gspca_disconnect
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xe9e2e466	gspca_suspend
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x14f67530	ivtv_debug
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x17857a36	ivtv_udma_prepare
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x23d1d0af	ivtv_vapi_result
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x2af005b1	ivtv_vapi
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x2c4470e1	ivtv_udma_setup
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x4858aa14	ivtv_init_on_first_open
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x9e9c241f	ivtv_udma_alloc
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xcef63b53	ivtv_set_irq_mask
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xd40e85fb	ivtv_api
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xdbb35e26	ivtv_udma_unmap
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xfd650a04	ivtv_reset_ir_gpio
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xfe2703f8	ivtv_clear_irq_mask
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x04e83446	saa7134_tuner_callback
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x1211df5d	saa7134_devlist
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x14dfecc6	saa7134_boards
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x174efe00	saa_dsp_writel
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x24483b51	saa7134_dmasound_init
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x37200cf7	saa7134_pgtable_alloc
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x476b0ab5	saa7134_ts_register
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x479c0db9	saa7134_pgtable_free
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x6bc6521a	saa7134_dmasound_exit
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x9e581ce7	saa7134_tvaudio_setmute
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xbc06d0cb	saa7134_devlist_lock
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xbf74a853	saa7134_ts_unregister
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xc1613c82	saa7134_set_dmabits
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xccfa7d1e	saa7134_pgtable_build
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xd47446bc	saa7134_set_gpio
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x31d5d7e1	soc_camera_host_register
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x5435eb1b	soc_camera_xlate_by_fourcc
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x72f49541	soc_camera_apply_sensor_flags
+EXPORT_SYMBOL drivers/media/video/soc_camera 0xdb4ff49f	soc_camera_host_unregister
+EXPORT_SYMBOL drivers/media/video/soc_camera 0xe2fb8987	soc_camera_format_by_fourcc
+EXPORT_SYMBOL drivers/media/video/tveeprom 0x19971eb3	tveeprom_read
+EXPORT_SYMBOL drivers/media/video/tveeprom 0xc70bd1b6	tveeprom_hauppauge_analog
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x193e70a4	usbvideo_DeinterlaceFrame
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x5293ede2	RingQueue_Enqueue
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x54742c67	usbvideo_AllocateDevice
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x54ded406	RingQueue_Dequeue
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x81a7b4a8	usbvideo_Deregister
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x8a80f6e5	usbvideo_RegisterVideoDevice
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x965ebe89	usbvideo_register
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x9778abda	RingQueue_Flush
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xbbf27766	usbvideo_TestPattern
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xdf605c59	RingQueue_WakeUpInterruptible
+EXPORT_SYMBOL drivers/media/video/v4l1-compat 0xf76ae3f3	v4l_compat_translate_ioctl
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x03165a85	v4l2_ctrl_get_menu
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x171d08d4	v4l2_chip_ident_i2c_client
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1dcaa0c8	v4l2_prio_max
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1e326b97	v4l2_ctrl_query_fill
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1ffcac5c	v4l2_chip_match_i2c_client
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x2f639468	v4l2_prio_check
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x42c8e001	v4l2_ctrl_next
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x495426ee	v4l2_ctrl_get_name
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x4ed5e0d7	v4l2_chip_match_host
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x50766d69	v4l2_ctrl_query_menu_valid_items
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x76ba9a9a	v4l2_prio_open
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x95284709	v4l2_prio_close
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9c7de443	v4l2_prio_change
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9eb43ee2	v4l2_ctrl_check
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0xbecd2858	v4l2_prio_init
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0xd9ee1e3f	v4l2_ctrl_query_menu
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x12f290d1	videobuf_dvb_alloc_frontend
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x1f8b7d1c	videobuf_dvb_dealloc_frontends
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x2d400689	videobuf_dvb_get_frontend
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x65a835bc	videobuf_dvb_register_bus
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xee30413a	videobuf_dvb_find_frontend
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xfdb55694	videobuf_dvb_unregister_bus
+EXPORT_SYMBOL drivers/media/video/videodev 0x0614dd5a	v4l2_video_std_frame_period
+EXPORT_SYMBOL drivers/media/video/videodev 0x123959a1	v4l2_type_names
+EXPORT_SYMBOL drivers/media/video/videodev 0x1beb2995	video_usercopy
+EXPORT_SYMBOL drivers/media/video/videodev 0x29e33f56	video_register_device_no_warn
+EXPORT_SYMBOL drivers/media/video/videodev 0x2bef9664	video_devdata
+EXPORT_SYMBOL drivers/media/video/videodev 0x3adbd595	v4l2_field_names
+EXPORT_SYMBOL drivers/media/video/videodev 0x5ebefe4b	v4l_printk_ioctl
+EXPORT_SYMBOL drivers/media/video/videodev 0x8269654f	video_device_alloc
+EXPORT_SYMBOL drivers/media/video/videodev 0x88c8d440	video_unregister_device
+EXPORT_SYMBOL drivers/media/video/videodev 0x9e63572d	video_device_release
+EXPORT_SYMBOL drivers/media/video/videodev 0xae53dabe	video_ioctl2
+EXPORT_SYMBOL drivers/media/video/videodev 0xe2b92059	v4l2_video_std_construct
+EXPORT_SYMBOL drivers/media/video/videodev 0xe8fd5f55	video_register_device
+EXPORT_SYMBOL drivers/media/video/videodev 0xf3251e7b	v4l2_norm_to_name
+EXPORT_SYMBOL drivers/media/video/videodev 0xfa3222a9	video_device_release_empty
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x16ea12d9	mpt_reset_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x3088e71d	mpt_detach
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x310656f4	mpt_print_ioc_summary
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x34763890	mptbase_sas_persist_operation
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x39fd6f56	mpt_alloc_fw_memory
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x3e0e2ae8	mpt_GetIocState
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4526289b	mpt_event_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x48ae94ec	mpt_HardResetHandler
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4fae4827	mpt_suspend
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x502108d0	mpt_fwfault_debug
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x549dbf04	mpt_clear_taskmgmt_in_progress_flag
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x5a39547b	mpt_attach
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x6519ed62	mpt_raid_phys_disk_pg0
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x65c5fb28	mpt_get_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x753fbb16	mpt_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x764ae705	mpt_send_handshake_request
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x9b19ec1e	mpt_resume
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x9bdcf241	mpt_event_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xa1c13d40	mpt_raid_phys_disk_get_num_paths
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xad3428c2	mpt_put_msg_frame_hi_pri
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xbf330f9a	mpt_verify_adapter
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc0e69f82	mpt_device_driver_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc2f1b933	mpt_raid_phys_disk_pg1
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc47c22e8	mpt_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd7714ab7	mpt_config
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd9a92a75	mpt_reset_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xda40a4b3	mpt_halt_firmware
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xdd805159	ioc_list
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xe6769ff1	mpt_free_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xe79d9fe6	mpt_device_driver_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xee09248b	mpt_put_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xeeb73695	mpt_set_taskmgmt_in_progress_flag
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xf0879861	mpt_free_fw_memory
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xff46c254	mpt_findImVolumes
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x0b324707	mptscsih_suspend
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x276dac92	mptscsih_slave_configure
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x32d6c1be	mptscsih_taskmgmt_complete
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x3f728f51	mptscsih_bios_param
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x4924aef9	mptscsih_io_done
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x4ade8867	mptscsih_raid_id_to_num
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x596e5502	mptscsih_is_phys_disk
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x5bcb07b1	mptscsih_ioc_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x5f584123	mptscsih_scandv_complete
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x60c8a26a	mptscsih_get_scsi_lookup
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x6918e6d4	mptscsih_proc_info
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x6bc091d6	mptscsih_host_attrs
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x7090a4c2	mptscsih_shutdown
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x77696409	mptscsih_resume
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x88b000ce	mptscsih_IssueTaskMgmt
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x8b412729	mptscsih_host_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xa0ed77e0	mptscsih_slave_destroy
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xa0f45415	mptscsih_taskmgmt_response_code
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xace786de	mptscsih_event_process
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xc3dde90e	mptscsih_remove
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xc5eeff9b	mptscsih_bus_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xc7b165da	mptscsih_change_queue_depth
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xca29266a	mptscsih_qcmd
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xd14bdfc5	mptscsih_abort
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xed764abe	mptscsih_info
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xf60357db	mptscsih_dev_reset
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x046df1b4	i2o_device_claim
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x050e2bda	i2o_parm_issue
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x0fa197a4	i2o_event_register
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x14945ad9	i2o_cntxt_list_remove
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2a843bef	i2o_dump_message
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x39caa426	i2o_msg_get_wait
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x3d3863e3	i2o_driver_unregister
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x3e6af915	i2o_parm_field_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x3f16b308	i2o_cntxt_list_get_ptr
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x48fd805b	i2o_msg_post_wait_mem
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x5b76c19c	i2o_driver_notify_controller_remove_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x5b9b2d27	i2o_find_iop
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x695a3ff2	i2o_device_claim_release
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x78d26d13	i2o_cntxt_list_add
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x7e9b0f59	i2o_status_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x8ca6f157	i2o_driver_notify_device_add_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x8d6c8f34	i2o_parm_table_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x8d969e7f	i2o_cntxt_list_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xab6a2c5f	i2o_driver_notify_device_remove_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb4c00dcf	i2o_controllers
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xc744af89	i2o_exec_lct_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xca26cb6a	i2o_driver_register
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xd68eb01d	i2o_driver_notify_controller_add_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xfca42f94	i2o_iop_find_device
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x3938ab79	ab3100_event_registers_startup_state_get
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x3c33d9af	ab3100_get_register_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x456f0742	ab3100_event_unregister
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x89d93380	ab3100_get_chip_type
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xa91570f2	ab3100_event_register
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xc473e9f2	ab3100_get_register_page_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xe4feca1f	ab3100_set_register_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xfafa248e	ab3100_mask_and_set_register_interruptible
+EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x1f0f3bae	pasic3_read_register
+EXPORT_SYMBOL drivers/mfd/htc-pasic3 0xd5576a08	pasic3_write_register
+EXPORT_SYMBOL drivers/mfd/mfd-core 0x46658bbd	mfd_add_devices
+EXPORT_SYMBOL drivers/mfd/mfd-core 0x74939838	mfd_remove_devices
+EXPORT_SYMBOL drivers/misc/c2port/core 0x73aa0600	c2port_device_unregister
+EXPORT_SYMBOL drivers/misc/c2port/core 0x883c7364	c2port_device_register
+EXPORT_SYMBOL drivers/misc/ioc4 0x339ed175	ioc4_register_submodule
+EXPORT_SYMBOL drivers/misc/ioc4 0x4bf66385	ioc4_unregister_submodule
+EXPORT_SYMBOL drivers/misc/tifm_core 0x24ba2983	tifm_register_driver
+EXPORT_SYMBOL drivers/misc/tifm_core 0x41dc0ab2	tifm_map_sg
+EXPORT_SYMBOL drivers/misc/tifm_core 0x6d0a24f8	tifm_alloc_device
+EXPORT_SYMBOL drivers/misc/tifm_core 0x731ef5b3	tifm_has_ms_pif
+EXPORT_SYMBOL drivers/misc/tifm_core 0x8b881a8f	tifm_eject
+EXPORT_SYMBOL drivers/misc/tifm_core 0x8d4a5d89	tifm_alloc_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0x9ae8692b	tifm_unmap_sg
+EXPORT_SYMBOL drivers/misc/tifm_core 0x9d7b3f39	tifm_unregister_driver
+EXPORT_SYMBOL drivers/misc/tifm_core 0xad4cb050	tifm_add_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0xb141f5fa	tifm_free_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0xcd153284	tifm_queue_work
+EXPORT_SYMBOL drivers/misc/tifm_core 0xd1453b52	tifm_remove_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0xfae208a3	tifm_free_device
+EXPORT_SYMBOL drivers/mmc/card/mmc_block 0x011082c5	mmc_cleanup_queue
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x184b82fb	mmc_vddrange_to_ocrmask
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x1da8efb9	mmc_set_data_timeout
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x1dec7e17	mmc_wait_for_req
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x2fa82802	mmc_remove_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x3e6e6051	mmc_unregister_driver
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x470b7cdd	mmc_detect_change
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x4746da35	mmc_resume_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x5139bb0e	mmc_request_done
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x56df5a59	mmc_regulator_set_ocr
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x599027dd	mmc_power_restore_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x63a5bb75	mmc_try_claim_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x648f69c0	mmc_host_disable
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x66ae732e	mmc_power_save_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x6ba91191	mmc_wait_for_app_cmd
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x7a28fd6a	mmc_align_data_size
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x8b254cf7	mmc_free_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x8cc9a32f	mmc_wait_for_cmd
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x9e6ffb70	mmc_card_can_sleep
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xa20f0621	mmc_card_awake
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xa722dd70	mmc_host_enable
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xac375f58	mmc_register_driver
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xb137d486	mmc_release_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xbf76aa79	mmc_host_lazy_disable
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xc497c6a9	__mmc_claim_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xd6e5728d	mmc_card_sleep
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xde4f7aa9	mmc_suspend_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xdf6ac2f4	mmc_add_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xe7123d65	mmc_alloc_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xf494f618	mmc_regulator_get_ocrmask
+EXPORT_SYMBOL drivers/mmc/host/of_mmc_spi 0x158edb8b	mmc_spi_get_pdata
+EXPORT_SYMBOL drivers/mmc/host/of_mmc_spi 0x81abf9e1	mmc_spi_put_pdata
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x165662e7	cfi_fixup
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x8f9b9831	cfi_read_pri
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0xadf0b302	cfi_varsize_frob
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x3a7ad0cf	map_destroy
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x74d94a1e	do_map_probe
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x8142c570	register_mtd_chip_driver
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0xb09e8548	unregister_mtd_chip_driver
+EXPORT_SYMBOL drivers/mtd/chips/gen_probe 0xa3f8ef93	mtd_do_chip_probe
+EXPORT_SYMBOL drivers/mtd/lpddr/lpddr_cmds 0x6793b11f	lpddr_cmdset
+EXPORT_SYMBOL drivers/mtd/maps/map_funcs 0x3638e4f4	simple_map_init
+EXPORT_SYMBOL drivers/mtd/mtd 0x530f2d47	del_mtd_partitions
+EXPORT_SYMBOL drivers/mtd/mtd 0xe6cc28cf	add_mtd_partitions
+EXPORT_SYMBOL drivers/mtd/mtdconcat 0x4ae187b1	mtd_concat_create
+EXPORT_SYMBOL drivers/mtd/mtdconcat 0xbcbd3ae7	mtd_concat_destroy
+EXPORT_SYMBOL drivers/mtd/nand/nand 0x581681dd	nand_default_bbt
+EXPORT_SYMBOL drivers/mtd/nand/nand 0xa992cc7c	nand_scan_bbt
+EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0x0d2a768b	nand_calculate_ecc
+EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0x8574a022	nand_correct_data
+EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0xb4b94377	__nand_correct_data
+EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0x836bdb72	nand_flash_ids
+EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0xa336feb7	nand_manuf_ids
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x2d67ba49	onenand_default_bbt
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x6fa058f4	onenand_scan_bbt
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x7a0b6ad8	flexonenand_region
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x95b40f0f	onenand_addr
+EXPORT_SYMBOL drivers/net/8390 0x2de46436	ei_netdev_ops
+EXPORT_SYMBOL drivers/net/8390 0x3863d95f	NS8390_init
+EXPORT_SYMBOL drivers/net/8390 0x40903aff	ei_get_stats
+EXPORT_SYMBOL drivers/net/8390 0x56b8c7bd	ei_poll
+EXPORT_SYMBOL drivers/net/8390 0x62d1c208	ei_open
+EXPORT_SYMBOL drivers/net/8390 0x788e990b	ei_set_multicast_list
+EXPORT_SYMBOL drivers/net/8390 0x9897ac98	__alloc_ei_netdev
+EXPORT_SYMBOL drivers/net/8390 0x9fb9e3ab	ei_tx_timeout
+EXPORT_SYMBOL drivers/net/8390 0xbea4a52e	ei_start_xmit
+EXPORT_SYMBOL drivers/net/8390 0xdd365790	ei_interrupt
+EXPORT_SYMBOL drivers/net/8390 0xdeb02c03	ei_close
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x23f86078	arcnet_interrupt
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x35d7dddd	arc_bcast_proto
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x6534792a	arcnet_debug
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x6b01096a	arcnet_close
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x7264c6fe	alloc_arcdev
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x7a978228	arc_proto_map
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x9fba82c1	arc_proto_default
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xb4797043	arc_raw_proto
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xccb9cefb	arcnet_send_packet
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xccc0696b	arcnet_unregister_proto
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xeaa7390f	arcnet_open
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xecf2bda8	arcnet_timeout
+EXPORT_SYMBOL drivers/net/arcnet/com20020 0x08a24a4b	com20020_check
+EXPORT_SYMBOL drivers/net/arcnet/com20020 0xc6fef070	com20020_netdev_ops
+EXPORT_SYMBOL drivers/net/arcnet/com20020 0xf5dd9f5b	com20020_found
+EXPORT_SYMBOL drivers/net/bnx2 0x5694c420	bnx2_cnic_probe
+EXPORT_SYMBOL drivers/net/cnic 0x636af174	cnic_unregister_driver
+EXPORT_SYMBOL drivers/net/cnic 0xad8b6f38	cnic_register_driver
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x1dfc13a0	cxgb3_alloc_atid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x35088dd3	t3_l2t_send_event
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x488e0b81	cxgb3_free_atid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x52013a20	dev2t3cdev
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x61028d20	cxgb3_alloc_stid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x7731866f	t3_l2t_get
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x8b7b1d19	cxgb3_remove_tid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x946399ce	cxgb3_ofld_send
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x950bb39b	cxgb3_insert_tid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x9ed3537b	t3_l2e_free
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xab80c6ad	cxgb3_free_stid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xb2b77e48	cxgb3_unregister_client
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xd0e65f56	t3_l2t_send_slow
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xecf8e149	cxgb3_register_client
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xf41cfeeb	t3_register_cpl_handler
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xf7c7bd6c	cxgb3_queue_tid_release
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x15e6e83d	hdlcdrv_register
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x5640f602	hdlcdrv_transmitter
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x5bd7e180	hdlcdrv_unregister
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x5cfa04f5	hdlcdrv_receiver
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xd0d97d4d	hdlcdrv_arbitrate
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x0641b461	sirdev_put_instance
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x299cc608	sirdev_set_dongle
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x486fb03e	irda_register_dongle
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x4f049449	irda_unregister_dongle
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x4f5dec0e	sirdev_raw_write
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x550216ab	sirdev_receive
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x7e71d963	sirdev_write_complete
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xa2d67fdb	sirdev_raw_read
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xde1ec198	sirdev_set_dtr_rts
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xe3e1d143	sirdev_get_instance
+EXPORT_SYMBOL drivers/net/mdio 0x0f934475	mdio45_ethtool_gset_npage
+EXPORT_SYMBOL drivers/net/mdio 0x22bce513	mdio_mii_ioctl
+EXPORT_SYMBOL drivers/net/mdio 0x43e4defc	mdio45_nway_restart
+EXPORT_SYMBOL drivers/net/mdio 0x7577f992	mdio_set_flag
+EXPORT_SYMBOL drivers/net/mdio 0xa1a29548	mdio45_probe
+EXPORT_SYMBOL drivers/net/mdio 0xb34a7575	mdio45_ethtool_spauseparam_an
+EXPORT_SYMBOL drivers/net/mdio 0xc6b1163f	mdio45_links_ok
+EXPORT_SYMBOL drivers/net/mii 0x16afdabb	generic_mii_ioctl
+EXPORT_SYMBOL drivers/net/mii 0x1c89e96c	mii_check_media
+EXPORT_SYMBOL drivers/net/mii 0x42fa0449	mii_link_ok
+EXPORT_SYMBOL drivers/net/mii 0x518ac094	mii_check_link
+EXPORT_SYMBOL drivers/net/mii 0x687fee22	mii_ethtool_sset
+EXPORT_SYMBOL drivers/net/mii 0xc8a0d5c2	mii_ethtool_gset
+EXPORT_SYMBOL drivers/net/mii 0xc99e061d	mii_nway_restart
+EXPORT_SYMBOL drivers/net/mii 0xce0d2ecb	mii_check_gmii_support
+EXPORT_SYMBOL drivers/net/phy/mdio-bitbang 0x5ded8855	free_mdio_bitbang
+EXPORT_SYMBOL drivers/net/phy/mdio-bitbang 0x9fb46c4c	alloc_mdio_bitbang
+EXPORT_SYMBOL drivers/net/ppp_generic 0x07d41063	ppp_output_wakeup
+EXPORT_SYMBOL drivers/net/ppp_generic 0x18cb7ae3	ppp_register_net_channel
+EXPORT_SYMBOL drivers/net/ppp_generic 0x435f25bd	ppp_register_compressor
+EXPORT_SYMBOL drivers/net/ppp_generic 0x4dccaa99	ppp_unregister_compressor
+EXPORT_SYMBOL drivers/net/ppp_generic 0x8671bf12	ppp_input_error
+EXPORT_SYMBOL drivers/net/ppp_generic 0x9cb33f61	ppp_unregister_channel
+EXPORT_SYMBOL drivers/net/ppp_generic 0xb01e8ecf	ppp_unit_number
+EXPORT_SYMBOL drivers/net/ppp_generic 0xb0ef4df4	ppp_input
+EXPORT_SYMBOL drivers/net/ppp_generic 0xcc22232d	ppp_channel_index
+EXPORT_SYMBOL drivers/net/ppp_generic 0xe0fc7510	ppp_register_channel
+EXPORT_SYMBOL drivers/net/pppox 0x29891386	register_pppox_proto
+EXPORT_SYMBOL drivers/net/pppox 0x6f0757c8	pppox_ioctl
+EXPORT_SYMBOL drivers/net/pppox 0x7aacc4aa	pppox_unbind_sock
+EXPORT_SYMBOL drivers/net/pppox 0xe0ff7a18	unregister_pppox_proto
+EXPORT_SYMBOL drivers/net/slhc 0x2278e94b	slhc_remember
+EXPORT_SYMBOL drivers/net/slhc 0x26b760c4	slhc_init
+EXPORT_SYMBOL drivers/net/slhc 0x3fe0d1c0	slhc_free
+EXPORT_SYMBOL drivers/net/slhc 0x62538167	slhc_toss
+EXPORT_SYMBOL drivers/net/slhc 0x7e87227e	slhc_compress
+EXPORT_SYMBOL drivers/net/slhc 0xa78d9eb7	slhc_uncompress
+EXPORT_SYMBOL drivers/net/sungem_phy 0x3d47bf98	mii_phy_probe
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x1459790d	tms380tr_netdev_ops
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x3f56d648	tms380tr_open
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x4e93afc2	tmsdev_term
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xa831ea87	tms380tr_close
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xcb226f7d	tmsdev_init
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd2328794	tms380tr_wait
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd49af46e	tms380tr_interrupt
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x38da4725	cycx_intr
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x62be23ea	cycx_setup
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x66a4c4e6	cycx_down
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x968458a6	cycx_peek
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xb6f383de	cycx_poke
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xfe7cd576	cycx_exec
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x209639ed	hdlc_ioctl
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x62847466	alloc_hdlcdev
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x6c4f60ab	unregister_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x78ed20ae	unregister_hdlc_device
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x82bc6569	hdlc_start_xmit
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x8adff10a	register_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xa6973de6	detach_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xaf067c17	hdlc_change_mtu
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xcc5dbe44	hdlc_close
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xd0691e48	attach_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xd06ef700	hdlc_open
+EXPORT_SYMBOL drivers/net/wireless/airo 0x694ba408	init_airo_card
+EXPORT_SYMBOL drivers/net/wireless/airo 0xd7ccf9c9	reset_airo_card
+EXPORT_SYMBOL drivers/net/wireless/airo 0xefaaf629	stop_airo_card
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x31219afb	ath_is_world_regd
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x3eb040e5	ath_reg_notifier_apply
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x58d7fdc7	ath_regd_init
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xbe25b39d	ath_regd_get_band_ctl
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xccbc8daa	ath_rxbuf_alloc
+EXPORT_SYMBOL drivers/net/wireless/atmel 0x952e27fc	atmel_open
+EXPORT_SYMBOL drivers/net/wireless/atmel 0xa3b3029b	init_atmel_card
+EXPORT_SYMBOL drivers/net/wireless/atmel 0xaf88c341	stop_atmel_card
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x04323e23	hostap_check_sta_fw_version
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x078c6eb3	hostap_set_multicast_list_queue
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x161fbe2b	hostap_set_roaming
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x19a7f68f	hostap_get_porttype
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x1e7f92f6	hostap_set_word
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x21ada2bd	hostap_set_hostapd
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x277e62ba	hostap_init_ap_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x2fa44cbc	hostap_info_process
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x3ceaf7f2	hostap_80211_ops
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x62d3ca20	hostap_master_start_xmit
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x6673deff	prism2_update_comms_qual
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x7909adc3	hostap_free_data
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x7c879c38	hostap_init_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x8131b476	hostap_init_data
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x972658a1	hostap_set_string
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x972abd25	hostap_setup_dev
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x99dbf2b4	hostap_set_encryption
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa12ad27f	hostap_dump_tx_header
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa5566ba1	hostap_add_interface
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb2a945e0	hostap_dump_rx_header
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb2ff7de9	hostap_info_init
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb4b77c8b	hostap_80211_get_hdrlen
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xbee69d02	hostap_remove_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xc289c76c	hostap_set_antsel
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xc8002ca4	hostap_set_hostapd_sta
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xcaaf4c1c	hostap_80211_rx
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xe4e44459	hostap_handle_sta_tx_exc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf3cc69f5	hostap_set_auth_algs
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf7f7dc48	hostap_remove_interface
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x0f66e46b	libipw_txb_free
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x11b8d5ae	libipw_wx_set_encodeext
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x15ac859d	libipw_wx_set_encode
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x176db45b	alloc_ieee80211
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x1e6d30a4	libipw_networks_age
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x256aea8a	libipw_rx_mgt
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x34ccbcba	libipw_channel_to_freq
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x443e4463	libipw_freq_to_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x48bb666b	libipw_change_mtu
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x4d7d9637	libipw_is_valid_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x5de39911	libipw_get_channel_flags
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x601977d8	libipw_get_geo
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x62984e8a	libipw_xmit
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x6b3acf97	free_ieee80211
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x73a5dd37	libipw_wx_get_encode
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x74782430	libipw_rx
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x7fe577f9	libipw_set_geo
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xac4ecdf8	libipw_wx_get_scan
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xcee96286	libipw_wx_get_encodeext
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xd73fc2e1	libipw_channel_to_index
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xf410a74b	libipw_get_channel
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x00131cf9	iwl_rx_queue_update_write_ptr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0238b373	iwl_tx_queue_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x039dc880	iwl_clear_stations_table
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x04c68d0e	iwl_mac_get_tx_stats
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x04f3ecb2	iwl_send_cmd_sync
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x05b64340	iwl_bss_info_changed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x07d63f35	iwl_scan_cancel_timeout
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0b74d280	iwl_add_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0bb37f9f	iwl_tx_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0bd699be	iwl_set_rxon_hwcrypto
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x10116733	iwl_set_dynamic_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x13ed4fa9	iwl_tx_skb
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1737d716	iwl_send_lq_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x17af58df	iwl_irq_handle_error
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x187f76cb	iwl_rx_queue_alloc
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x19e5ff4a	iwl_rx_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x19f0e900	iwl_debug_level
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1a3e3ade	iwl_find_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d77b399	iwl_bcast_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1e0f16f9	iwl_setup_rx_scan_handlers
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1f5fc1d6	iwl_rx_reply_error
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2081ec5f	iwl_txq_ctx_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x227de5fe	iwl_eeprom_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x26293c3d	iwl_reset_qos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x280de255	iwl_get_channel_info
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2a5ca848	iwl_set_hw_params
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2a7ff6f6	iwl_scan_cancel
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2cd466ec	iwl_rx_statistics
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2d3ec5c8	iwl_tx_cmd_complete
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2d79cd13	iwl_setup_scan_deferred_work
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2e0934e1	iwl_rate_get_lowest_plcp
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3220d5df	iwl_hw_detect
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x34541262	iwl_pci_resume
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x34740c2e	iwl_bg_scan_check
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x34d9c9a7	iwl_full_rxon_required
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3a4e5236	iwl_tx_ant_restriction
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3bf8839b	iwl_remove_dynamic_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3d25ee9c	iwl_set_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3ffa8a8c	iwl_free_channel_map
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4125242a	iwl_rx_pm_debug_statistics_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x432dc556	iwl_set_rxon_chain
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x491fb53f	iwl_eeprom_query16
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4c48c5cf	iwl_ht_enabled
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4cd11da0	iwl_rx_replenish
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4d91d370	iwl_power_initialize
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4ddbd3ca	iwlcore_eeprom_acquire_semaphore
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4e1afff8	iwlcore_init_geos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5145782e	iwl_power_update_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x51b21251	iwl_activate_qos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x54517c20	iwl_get_passive_dwell_time
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5599b788	iwl_send_static_wepkey_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x57a28e1c	iwl_init_channel_map
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x57cbf908	iwl_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x58ed1cdc	iwl_mac_remove_interface
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5e1043c8	iwl_is_ht40_tx_allowed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5e91114f	iwl_cmd_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5ec32c86	iwl_rf_kill_ct_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x60774702	iwl_queue_space
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x61a31edd	iwlcore_free_geos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x61f5990e	iwl_hw_nic_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x662000a7	iwl_alloc_all
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6792ade4	iwl_bg_abort_scan
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6857bf8e	iwl_get_free_ucode_key_index
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6c87e1a6	iwl_send_cmd_pdu_async
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6cb0acd6	iwl_fill_probe_req
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x719bab25	iwl_set_tx_power
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x777350b4	iwlcore_eeprom_verify_signature
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x782db05e	iwl_rx_reply_rx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x78976e61	iwl_isr_legacy
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x79322014	iwl_get_sta_id
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7a302074	iwl_reset_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7a7cac5a	iwl_tx_queue_reclaim
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7b4be2bc	iwl_send_add_sta
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7b83cc1f	iwl_setup_rxon_timing
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7ee83afc	iwl_txq_update_write_ptr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x81a67d9c	iwl_rx_queue_space
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x85e6f952	iwl_rx_reply_rx_phy
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x86530b3a	iwl_tx_agg_start
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8670273d	iwl_hwrate_to_plcp_idx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x86a25355	iwl_send_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x89029fce	iwl_rx_queue_restock
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x894612dc	iwl_chain_noise_calibration
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8b97304a	iwl_mac_beacon_update
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x908ad141	iwl_sta_rx_agg_start
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x90eb42e8	iwl_tt_initialize
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x93e7be56	iwl_init_sensitivity
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x942081ec	iwl_free_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9442aa09	iwl_txq_check_empty
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x958aa86a	iwlcore_eeprom_query_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x96571315	iwl_pci_suspend
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9a55c8b5	iwl_set_default_wep_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9a7984b0	iwl_tx_agg_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9a9248d3	iwl_check_rxon_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9b7f7137	iwl_mac_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9d6c8b86	iwl_disable_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9e001618	iwl_tt_handler
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9e04a60d	iwl_get_ra_sta_id
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9f08233b	iwlcore_eeprom_release_semaphore
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9faced57	iwl_calib_set
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa367e4a2	iwl_rx_csa
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xad04b238	iwl_rxq_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaeec8866	iwl_send_cmd_pdu
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb04843f7	iwl_sensitivity_calibration
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb131ad86	iwl_sta_rx_agg_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb13c05c0	iwl_mac_conf_tx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb28d5a80	iwl_mac_reset_tsf
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb604aeac	iwl_send_calib_results
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb6a05572	iwl_leds_unregister
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb77e4f65	iwl_rx_pm_sleep_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xba0f0694	iwl_eeprom_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbc58d50b	iwl_rx_replenish_now
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbd55f9d0	iwl_hw_txq_ctx_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc3fbfad4	iwl_connection_init_rx_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc44b9d19	iwl_configure_filter
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc51d8c8d	iwl_send_statistics_request
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc62a1da3	iwl_rxon_add_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc7794b30	iwl_bg_scan_completed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc7dcca15	iwl_send_bt_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc7ebf20f	iwl_remove_default_wep_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc890fa0f	iwlcore_eeprom_enhanced_txpower
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc8a15aba	iwl_leds_register
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc9c56586	iwl_set_rxon_channel
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcbaf4931	get_cmd_string
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xce36ecaf	iwl_alloc_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd1544a55	iwl_mac_add_interface
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd2240e9e	iwl_init_drv
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd225afa0	iwl_eeprom_get_mac
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd586d04a	iwl_rx_reply_compressed_ba
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd67932f7	iwl_eeprom_check_version
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd782d870	iwl_rx_missed_beacon_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd81b43bd	iwl_set_rxon_ht
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd90e2808	iwl_get_active_dwell_time
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd96fe85d	iwl_is_monitor_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdcf96c68	iwl_tt_enter_ct_kill
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdf217e40	iwl_tt_exit
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdf609d45	iwl_tt_exit_ct_kill
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe110f089	iwl_update_tkip_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe23a6dea	iwl_reset_run_time_calib
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe2d05e25	iwl_verify_ucode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe5a86adc	iwl_mac_hw_scan
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe64c918a	iwl_setup_mac
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe752ba74	iwl_free_tfds_in_queue
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe7ce5d70	iwl_rates
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe87ae2f3	iwl_sta_tx_modify_enable_tid
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xeac868cc	iwl_uninit_drv
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xec5658bf	iwl_set_decrypted_flag
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf1c95259	iwl_hwrate_to_tx_control
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf9d70534	iwl_eeprom_query_addr
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x2dcbdd35	orinoco_if_add
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x4196c38b	hermes_write_ltv
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x466945ae	orinoco_init
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x5ee38223	orinoco_down
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x6a927e18	orinoco_interrupt
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x8928ddf4	alloc_orinocodev
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xa031d8e4	hermes_doicmd_wait
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc60b5e9e	hermes_bap_pwrite
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc69d5150	orinoco_up
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd38d8ae2	hermes_read_ltv
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd3f714e5	hermes_bap_pread
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5168829	hermes_allocate
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5336e5d	hermes_init
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd54e219d	hermes_docmd_wait
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xe03aef73	free_orinocodev
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xed47b224	hermes_struct_init
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xffae7695	orinoco_if_del
+EXPORT_SYMBOL drivers/parport/parport 0x0da83f35	parport_wait_event
+EXPORT_SYMBOL drivers/parport/parport 0x1bce7c86	parport_announce_port
+EXPORT_SYMBOL drivers/parport/parport 0x204face4	parport_ieee1284_ecp_read_data
+EXPORT_SYMBOL drivers/parport/parport 0x2733ec4d	parport_unregister_driver
+EXPORT_SYMBOL drivers/parport/parport 0x2915c671	parport_register_device
+EXPORT_SYMBOL drivers/parport/parport 0x2e5cdbb1	parport_ieee1284_epp_read_data
+EXPORT_SYMBOL drivers/parport/parport 0x311af278	parport_ieee1284_epp_write_addr
+EXPORT_SYMBOL drivers/parport/parport 0x31ba7ab4	parport_register_port
+EXPORT_SYMBOL drivers/parport/parport 0x337390cb	parport_ieee1284_ecp_write_data
+EXPORT_SYMBOL drivers/parport/parport 0x37689427	parport_get_port
+EXPORT_SYMBOL drivers/parport/parport 0x3def3993	parport_claim
+EXPORT_SYMBOL drivers/parport/parport 0x4cdbb772	parport_read
+EXPORT_SYMBOL drivers/parport/parport 0x4d2a941b	parport_ieee1284_interrupt
+EXPORT_SYMBOL drivers/parport/parport 0x588731b5	parport_unregister_device
+EXPORT_SYMBOL drivers/parport/parport 0x5b600c9d	parport_put_port
+EXPORT_SYMBOL drivers/parport/parport 0x6b553aba	parport_set_timeout
+EXPORT_SYMBOL drivers/parport/parport 0x6d558021	parport_remove_port
+EXPORT_SYMBOL drivers/parport/parport 0x6da3dc1b	parport_ieee1284_read_nibble
+EXPORT_SYMBOL drivers/parport/parport 0x914f9370	parport_ieee1284_ecp_write_addr
+EXPORT_SYMBOL drivers/parport/parport 0x924aa3d1	parport_ieee1284_read_byte
+EXPORT_SYMBOL drivers/parport/parport 0x9326f1c3	parport_ieee1284_epp_write_data
+EXPORT_SYMBOL drivers/parport/parport 0x94c06265	parport_release
+EXPORT_SYMBOL drivers/parport/parport 0x9d5eff70	parport_irq_handler
+EXPORT_SYMBOL drivers/parport/parport 0xa7201989	parport_find_base
+EXPORT_SYMBOL drivers/parport/parport 0xabfae74f	parport_negotiate
+EXPORT_SYMBOL drivers/parport/parport 0xb522ce96	parport_find_number
+EXPORT_SYMBOL drivers/parport/parport 0xcf9f2b59	parport_write
+EXPORT_SYMBOL drivers/parport/parport 0xd3308c08	parport_register_driver
+EXPORT_SYMBOL drivers/parport/parport 0xe421e230	parport_claim_or_block
+EXPORT_SYMBOL drivers/parport/parport 0xe6ea70e4	parport_wait_peripheral
+EXPORT_SYMBOL drivers/parport/parport 0xe9862c35	parport_ieee1284_epp_read_addr
+EXPORT_SYMBOL drivers/parport/parport 0xfc5534aa	parport_ieee1284_write_compat
+EXPORT_SYMBOL drivers/parport/parport_pc 0x1ce1ebca	parport_pc_probe_port
+EXPORT_SYMBOL drivers/parport/parport_pc 0x81aaf595	parport_pc_unregister_port
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x12b41d28	pcmcia_request_io
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x2718a4d0	pcmcia_request_window
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x2b06b40c	pcmcia_register_driver
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x2f33c337	pcmcia_get_mem_page
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x47b1c940	pcmcia_map_mem_page
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4fd033a0	pcmcia_error_func
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x84ce57f9	pcmcia_access_configuration_register
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x8b664f8d	pcmcia_request_irq
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x8bc13ace	pcmcia_disable_device
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x8e34f55f	pcmcia_get_window
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xb591dd1f	pcmcia_dev_present
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xc75e8155	pcmcia_loop_config
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xeae6b589	pcmcia_modify_configuration
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xebbdb4f6	pcmcia_unregister_driver
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xecb9b626	pcmcia_request_configuration
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf0a25e12	pcmcia_error_ret
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf6052044	pcmcia_release_window
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x0008470b	pcmcia_socket_dev_resume
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x06c193ea	pcmcia_resume_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x07f66038	pccard_get_first_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x08b4808c	pccard_static_ops
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x0f9014e9	release_cis_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x1c10de06	pcmcia_socket_class
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x212db8d2	pcmcia_socket_list
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x2597b113	pcmcia_reset_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x26fc8bd8	destroy_cis_cache
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x2e12f8b8	pccard_register_pcmcia
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x2fb75352	pcmcia_insert_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x33a22e06	pcmcia_replace_cis
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x3cba8815	pcmcia_write_cis_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x4517129d	pccard_get_tuple_data
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x549cd58d	pccard_get_next_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x6c35ffff	pcmcia_adjust_io_region
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x6ecea035	pcmcia_put_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x7b5eadeb	pccard_read_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x7c459694	pcmcia_get_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x7cbd7164	pcmcia_find_mem_region
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x7e9d84de	pcmcia_validate_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x816d4b28	pcmcia_socket_dev_suspend
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x8a4124a7	pccard_validate_cis
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x990fed10	pcmcia_parse_events
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xa23bc04f	pcmcia_register_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xa41b9d81	pcmcia_suspend_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xa5ed35af	pcmcia_find_io_region
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xa9c073fd	pcmcia_socket_dev_late_resume
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xb5aa362f	pcmcia_get_socket_by_nr
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xbd8e7a03	pcmcia_read_cis_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xbe07cfa6	pcmcia_socket_dev_early_resume
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc02ef2c8	pcmcia_parse_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc7410faf	pcmcia_eject_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcf97f3bd	dead_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xd905150a	pcmcia_socket_list_rwsem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xe5de8eb0	pcmcia_unregister_socket
+EXPORT_SYMBOL drivers/pcmcia/rsrc_nonstatic 0x2821d014	pccard_nonstatic_ops
+EXPORT_SYMBOL drivers/pps/pps_core 0x1e145952	pps_unregister_source
+EXPORT_SYMBOL drivers/pps/pps_core 0x28f4ecf5	pps_register_source
+EXPORT_SYMBOL drivers/pps/pps_core 0xe6a16116	pps_event
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x253df151	fcoe_ctlr_els_send
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x3acfbf6a	fcoe_ctlr_link_up
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x43f88043	fcoe_ctlr_recv_flogi
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x69976078	fcoe_ctlr_recv
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x7223ba4f	fcoe_ctlr_link_down
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xbc5ebbf5	fcoe_ctlr_init
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xdbb26237	fcoe_ctlr_destroy
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x02503575	fc_disc_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0697d0ed	fc_linkdown
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0715feaa	fc_fcp_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x076a0909	fc_seq_start_next
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1a09d546	fc_get_host_port_state
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1aace8fe	fc_get_host_stats
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1fe7a623	fc_get_host_port_type
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x25e75eff	fc_elsct_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x27cbe7d6	fc_exch_mgr_add
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x2b7b37be	fc_eh_abort
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x2cd94386	fc_fabric_logoff
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x2f7ce7d1	fc_exch_recv
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x36e5fbaf	fc_cpu_mask
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x3f1872e0	fc_exch_mgr_del
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x41f8d098	fc_lport_destroy
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x494aed71	fc_queuecommand
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x49614342	fc_exch_mgr_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x56183917	fc_destroy_rport
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x568b27c9	fc_set_mfs
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x56941476	fc_fcp_destroy
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x5805a966	fc_set_rport_loss_tmo
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x5d3b67d1	fc_change_queue_depth
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x5f2acc56	fc_exch_mgr_free
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x60d3b490	fc_slave_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x62ffc420	fc_rport_terminate_io
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x65d5a4cf	fc_exch_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x67750428	fc_exch_done
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x7b05cbd6	fc_seq_els_rsp_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x7f6d8e5c	fc_linkup
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x886c83f9	fc_change_queue_type
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x93cfbb3d	fc_rport_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa9bb4205	fc_exch_mgr_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xac238a7a	fc_frame_crc_check
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xae04230d	fc_exch_seq_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb356f164	fc_eh_device_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb89a19ad	fc_exch_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xbb5771a3	fc_fcp_complete
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xbe83131a	fc_fabric_login
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xbf03f8ab	fc_eh_host_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd57563dd	fc_fcp_ddp_setup
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd6cb3359	fc_setup_rport
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xdecc278a	fc_get_host_speed
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xee445814	__fc_frame_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf1d66010	fc_lport_config
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf41f8d3e	fc_lport_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf7365d60	fc_seq_exch_abort
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf75d2486	fc_lport_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf920ca1f	fc_seq_send
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x2250c66e	mraid_mm_adapter_app_handle
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x512c956d	mraid_mm_unregister_adp
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0xa9b05e16	mraid_mm_register_adp
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0359a390	osd_req_flush_object
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0c17edb1	osd_sec_init_nosec_doall_caps
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x12611df6	osd_req_create_object
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x1a0393f5	osd_req_read_kern
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x1a39f305	osd_req_create_partition
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x1be323ef	osd_req_flush_partition
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x20932743	osd_req_add_get_attr_page
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x2cb00acf	osd_auto_detect_ver
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x5254ab3f	osd_req_read
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x5270be83	osd_end_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x53160501	osd_req_add_get_attr_list
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x568cb31a	osd_req_write_kern
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x600d9d4b	osd_req_decode_sense_full
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x73139c80	osd_execute_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x76a7aa14	osd_start_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x7744a229	osd_req_list_partition_collections
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x7d5e3444	osd_req_list_collection_objects
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x807ca234	osd_req_list_dev_partitions
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x8215573b	osd_dev_fini
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x82ca4d6a	osd_req_format
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x87b3d9e0	osd_req_flush_obsd
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x95514f33	osd_dev_init
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x995f4a04	osd_req_remove_partition
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x9b3b4964	osd_req_write
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xb428317f	osd_execute_request_async
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xc368f5e9	osd_req_decode_get_attr_list
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xc9bfceca	osd_req_set_attributes
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xd294f8ae	osd_finalize_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe0f4f0b1	osd_req_flush_collection
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe2f12b20	osd_req_list_partition_objects
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xf3a37e1a	osd_req_add_set_attr_list
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xf5167beb	osd_req_get_attributes
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xf7bac3de	osd_req_remove_object
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x1fb69aec	osduld_register_test
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x506e04d0	osduld_path_lookup
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x5e232e2b	osduld_put_device
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x5fc48609	osduld_unregister_test
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x120dfec1	qlogicfas408_biosparam
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x14c7863f	qlogicfas408_disable_ints
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x3fd8cd71	qlogicfas408_detect
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x4cb7680c	qlogicfas408_bus_reset
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x4fcbd240	qlogicfas408_abort
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x755f6d4d	qlogicfas408_queuecommand
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xdc310b12	qlogicfas408_ihandl
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xe76b3b20	qlogicfas408_get_chip_type
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xf2b95199	qlogicfas408_setup
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xfda94a5e	qlogicfas408_info
+EXPORT_SYMBOL drivers/scsi/raid_class 0x00b0696d	raid_component_add
+EXPORT_SYMBOL drivers/scsi/raid_class 0xc8f296ad	raid_class_release
+EXPORT_SYMBOL drivers/scsi/raid_class 0xff750054	raid_class_attach
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x1372a013	fc_vport_create
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x1f102da6	fc_remote_port_rolechg
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x2a22fcb4	fc_release_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x2b529e1d	fc_host_post_event
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x6b497eb7	fc_remove_host
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x7954b1ea	fc_get_event_number
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x7bb928d5	fc_remote_port_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x82173ca6	fc_vport_terminate
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xa2320c09	scsi_is_fc_vport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xa64a97b2	scsi_is_fc_rport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xcb04dbf2	fc_host_post_vendor_event
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xe5bc193d	fc_attach_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xf31958d6	fc_remote_port_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x00245309	sas_phy_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x090ba0b2	sas_port_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x151e547b	sas_rphy_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x19649c0b	scsi_is_sas_rphy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x1bf2cc52	sas_attach_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x2c4c26e9	scsi_is_sas_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x40fa6ac2	sas_expander_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x440475c0	sas_phy_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x59f967ee	sas_rphy_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x5fcb21ac	sas_remove_host
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x66acb6f1	sas_port_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x6ddddb57	sas_phy_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x6fc8fe8b	sas_read_port_mode_page
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x7f0076c3	sas_port_mark_backlink
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x7f17f80b	sas_rphy_remove
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x8200ad48	sas_phy_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x9e99e196	scsi_is_sas_port
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xa8bd66ce	sas_release_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xb1927351	sas_end_device_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xb3312cef	sas_port_delete_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xb48ebdaa	sas_port_add_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xb671720b	sas_rphy_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xb751c0a9	sas_port_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xf00d9445	sas_port_alloc_num
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xf6a689cb	sas_port_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xfac3af61	sas_remove_children
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x3686ea09	spi_print_msg
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x400d4f58	spi_attach_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x9a1bc074	spi_display_xfer_agreement
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0xaf592b72	spi_schedule_dv_device
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0xc7dc4be1	spi_dv_device
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0xc9eff65a	spi_release_transport
+EXPORT_SYMBOL drivers/serial/8250 0xc7208c3a	serial8250_resume_port
+EXPORT_SYMBOL drivers/serial/8250 0xcc248d26	serial8250_suspend_port
+EXPORT_SYMBOL drivers/serial/8250 0xcefcd99a	serial8250_unregister_port
+EXPORT_SYMBOL drivers/serial/8250 0xeeee06f5	serial8250_register_port
+EXPORT_SYMBOL drivers/serial/serial_core 0x386ea680	uart_add_one_port
+EXPORT_SYMBOL drivers/serial/serial_core 0x42432e74	uart_resume_port
+EXPORT_SYMBOL drivers/serial/serial_core 0x477b757b	uart_suspend_port
+EXPORT_SYMBOL drivers/serial/serial_core 0x5b8fe802	uart_unregister_driver
+EXPORT_SYMBOL drivers/serial/serial_core 0x6cdb0ed6	uart_remove_one_port
+EXPORT_SYMBOL drivers/serial/serial_core 0x942bcc6b	uart_match_port
+EXPORT_SYMBOL drivers/serial/serial_core 0x9e8fbc27	uart_get_baud_rate
+EXPORT_SYMBOL drivers/serial/serial_core 0xa311bed7	uart_register_driver
+EXPORT_SYMBOL drivers/serial/serial_core 0xd2c764ec	uart_write_wakeup
+EXPORT_SYMBOL drivers/serial/serial_core 0xf99f40aa	uart_get_divisor
+EXPORT_SYMBOL drivers/serial/serial_core 0xfb3a5b64	uart_update_timeout
+EXPORT_SYMBOL drivers/ssb/ssb 0x07382194	ssb_dma_alloc_consistent
+EXPORT_SYMBOL drivers/ssb/ssb 0x12059897	ssb_bus_suspend
+EXPORT_SYMBOL drivers/ssb/ssb 0x12de97ac	ssb_device_enable
+EXPORT_SYMBOL drivers/ssb/ssb 0x157cfc29	ssb_device_disable
+EXPORT_SYMBOL drivers/ssb/ssb 0x19bd8ff6	ssb_device_is_enabled
+EXPORT_SYMBOL drivers/ssb/ssb 0x1c6f55ef	ssb_bus_resume
+EXPORT_SYMBOL drivers/ssb/ssb 0x21644b3d	ssb_dma_translation
+EXPORT_SYMBOL drivers/ssb/ssb 0x24018e45	ssb_dma_free_consistent
+EXPORT_SYMBOL drivers/ssb/ssb 0x26c6a6e1	__ssb_driver_register
+EXPORT_SYMBOL drivers/ssb/ssb 0x3aaf95ce	ssb_pcihost_register
+EXPORT_SYMBOL drivers/ssb/ssb 0x4d18e93b	ssb_pmu_set_ldo_voltage
+EXPORT_SYMBOL drivers/ssb/ssb 0x53b15887	ssb_dma_set_mask
+EXPORT_SYMBOL drivers/ssb/ssb 0x5654c64d	ssb_bus_sdiobus_register
+EXPORT_SYMBOL drivers/ssb/ssb 0x56e3d201	ssb_clockspeed
+EXPORT_SYMBOL drivers/ssb/ssb 0x59116ddb	ssb_bus_pcibus_register
+EXPORT_SYMBOL drivers/ssb/ssb 0x7cb2348c	ssb_bus_unregister
+EXPORT_SYMBOL drivers/ssb/ssb 0x8feea293	ssb_driver_unregister
+EXPORT_SYMBOL drivers/ssb/ssb 0xa89f8ad9	ssb_pcicore_dev_irqvecs_enable
+EXPORT_SYMBOL drivers/ssb/ssb 0xad3431d8	ssb_pmu_set_ldo_paref
+EXPORT_SYMBOL drivers/ssb/ssb 0xc0512e0f	ssb_admatch_base
+EXPORT_SYMBOL drivers/ssb/ssb 0xc4a6f4b8	ssb_set_devtypedata
+EXPORT_SYMBOL drivers/ssb/ssb 0xd481192b	ssb_admatch_size
+EXPORT_SYMBOL drivers/ssb/ssb 0xe69b18a7	ssb_bus_may_powerdown
+EXPORT_SYMBOL drivers/ssb/ssb 0xea8ca14d	ssb_bus_powerup
+EXPORT_SYMBOL drivers/telephony/ixj 0x11973d70	ixj_pcmcia_probe
+EXPORT_SYMBOL drivers/telephony/phonedev 0x4adee8b0	phone_register_device
+EXPORT_SYMBOL drivers/telephony/phonedev 0x9b134590	phone_unregister_device
+EXPORT_SYMBOL drivers/usb/gadget/net2280 0x2955c74c	usb_gadget_unregister_driver
+EXPORT_SYMBOL drivers/usb/gadget/net2280 0x7090559c	net2280_set_fifo_mode
+EXPORT_SYMBOL drivers/usb/gadget/net2280 0xa853dfab	usb_gadget_register_driver
+EXPORT_SYMBOL drivers/usb/host/sl811-hcd 0x2be82d27	sl811h_driver
+EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xa64a4cea	usb_nop_xceiv_unregister
+EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xd0e43207	usb_nop_xceiv_register
+EXPORT_SYMBOL drivers/usb/serial/usbserial 0x5497687d	usb_serial_suspend
+EXPORT_SYMBOL drivers/usb/serial/usbserial 0x99d30684	usb_serial_resume
+EXPORT_SYMBOL drivers/video/backlight/generic_bl 0xc86baa7c	corgibl_limit_intensity
+EXPORT_SYMBOL drivers/video/backlight/lcd 0x3aa91919	lcd_device_unregister
+EXPORT_SYMBOL drivers/video/backlight/lcd 0xeec889a0	lcd_device_register
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x0a6fbb36	cyber2000fb_disable_extregs
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x0cc3ede5	cyber2000fb_detach
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x5465db14	cyber2000fb_attach
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x6d6797c5	cyber2000fb_enable_extregs
+EXPORT_SYMBOL drivers/video/cyber2000fb 0xd8895b71	cyber2000fb_get_fb_var
+EXPORT_SYMBOL drivers/video/display/display 0x449e712f	display_device_register
+EXPORT_SYMBOL drivers/video/display/display 0x628e2c1b	display_device_unregister
+EXPORT_SYMBOL drivers/video/output 0x787e239c	video_output_register
+EXPORT_SYMBOL drivers/video/output 0xb1e96dc7	video_output_unregister
+EXPORT_SYMBOL drivers/video/sis/sisfb 0x3037658e	sis_malloc
+EXPORT_SYMBOL drivers/video/sis/sisfb 0x454a3cf0	sis_free
+EXPORT_SYMBOL drivers/video/svgalib 0x00d1fce9	svga_set_default_seq_regs
+EXPORT_SYMBOL drivers/video/svgalib 0x07b3da30	svga_wseq_multi
+EXPORT_SYMBOL drivers/video/svgalib 0x0b210241	svga_get_caps
+EXPORT_SYMBOL drivers/video/svgalib 0x1b95c56a	svga_check_timings
+EXPORT_SYMBOL drivers/video/svgalib 0x2f414515	svga_settile
+EXPORT_SYMBOL drivers/video/svgalib 0x3b590130	svga_tilecopy
+EXPORT_SYMBOL drivers/video/svgalib 0x49e87382	svga_tileblit
+EXPORT_SYMBOL drivers/video/svgalib 0x63e898d1	svga_set_default_crt_regs
+EXPORT_SYMBOL drivers/video/svgalib 0x7a3ae959	svga_wcrt_multi
+EXPORT_SYMBOL drivers/video/svgalib 0x7d280e3d	svga_tilefill
+EXPORT_SYMBOL drivers/video/svgalib 0x80408443	svga_set_timings
+EXPORT_SYMBOL drivers/video/svgalib 0x8751770b	svga_tilecursor
+EXPORT_SYMBOL drivers/video/svgalib 0x8fa8438b	svga_set_textmode_vga_regs
+EXPORT_SYMBOL drivers/video/svgalib 0xab3b22ad	svga_set_default_gfx_regs
+EXPORT_SYMBOL drivers/video/svgalib 0xdad682b1	svga_set_default_atc_regs
+EXPORT_SYMBOL drivers/video/svgalib 0xdb40e295	svga_get_tilemax
+EXPORT_SYMBOL drivers/video/svgalib 0xec83c473	svga_match_format
+EXPORT_SYMBOL drivers/video/svgalib 0xef774f5d	svga_compute_pll
+EXPORT_SYMBOL drivers/video/vgastate 0x686de290	restore_vga
+EXPORT_SYMBOL drivers/video/vgastate 0xe7a2620e	save_vga
+EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x9fe624c7	w1_bq27000_read
+EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0xe138950c	w1_bq27000_write
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x33f3dfca	w1_ds2760_store_eeprom
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x8ee1de43	w1_ds2760_read
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0xeebe60bf	w1_ds2760_write
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0xfc43bd35	w1_ds2760_recall_eeprom
+EXPORT_SYMBOL drivers/w1/wire 0x1361219f	w1_remove_master_device
+EXPORT_SYMBOL drivers/w1/wire 0x2dc4f4db	w1_add_master_device
+EXPORT_SYMBOL drivers/w1/wire 0x52a691af	w1_register_family
+EXPORT_SYMBOL drivers/w1/wire 0xcbffb631	w1_unregister_family
+EXPORT_SYMBOL fs/configfs/configfs 0x0629992b	config_group_find_item
+EXPORT_SYMBOL fs/configfs/configfs 0x11ebac9f	config_item_set_name
+EXPORT_SYMBOL fs/configfs/configfs 0x20be5f0a	config_item_get
+EXPORT_SYMBOL fs/configfs/configfs 0x31231d57	configfs_register_subsystem
+EXPORT_SYMBOL fs/configfs/configfs 0x445d6cb9	config_group_init
+EXPORT_SYMBOL fs/configfs/configfs 0x57ead8c7	configfs_undepend_item
+EXPORT_SYMBOL fs/configfs/configfs 0x6522f8b2	configfs_depend_item
+EXPORT_SYMBOL fs/configfs/configfs 0xa9dc163f	config_item_init_type_name
+EXPORT_SYMBOL fs/configfs/configfs 0xbe5abefc	config_item_init
+EXPORT_SYMBOL fs/configfs/configfs 0xc2f99b43	config_item_put
+EXPORT_SYMBOL fs/configfs/configfs 0xd0b72342	configfs_unregister_subsystem
+EXPORT_SYMBOL fs/configfs/configfs 0xe1bd192a	config_group_init_type_name
+EXPORT_SYMBOL fs/fscache/fscache 0x03170aba	__fscache_register_netfs
+EXPORT_SYMBOL fs/fscache/fscache 0x07d9b576	fscache_wait_bit_interruptible
+EXPORT_SYMBOL fs/fscache/fscache 0x07e671dc	fscache_object_lookup_negative
+EXPORT_SYMBOL fs/fscache/fscache 0x2d53ad14	__fscache_alloc_page
+EXPORT_SYMBOL fs/fscache/fscache 0x361d7ad1	fscache_io_error
+EXPORT_SYMBOL fs/fscache/fscache 0x3fc23318	fscache_wait_bit
+EXPORT_SYMBOL fs/fscache/fscache 0x496932b9	fscache_op_debug_id
+EXPORT_SYMBOL fs/fscache/fscache 0x525e444e	__fscache_maybe_release_page
+EXPORT_SYMBOL fs/fscache/fscache 0x52d6c39d	__fscache_read_or_alloc_page
+EXPORT_SYMBOL fs/fscache/fscache 0x5fe58c20	fscache_cache_cleared_wq
+EXPORT_SYMBOL fs/fscache/fscache 0x71e7b47e	__fscache_unregister_netfs
+EXPORT_SYMBOL fs/fscache/fscache 0x79e88661	__fscache_attr_changed
+EXPORT_SYMBOL fs/fscache/fscache 0x7a5f03c3	fscache_obtained_object
+EXPORT_SYMBOL fs/fscache/fscache 0x7e7c60c6	__fscache_uncache_page
+EXPORT_SYMBOL fs/fscache/fscache 0x86f8894f	fscache_object_states
+EXPORT_SYMBOL fs/fscache/fscache 0x8d18fffa	__fscache_acquire_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0x96b1a52b	__fscache_check_page_write
+EXPORT_SYMBOL fs/fscache/fscache 0x99210f26	fscache_init_cache
+EXPORT_SYMBOL fs/fscache/fscache 0xa62342c4	__fscache_write_page
+EXPORT_SYMBOL fs/fscache/fscache 0xb92a9eb7	__fscache_relinquish_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0xbb1811b9	fscache_object_slow_work_ops
+EXPORT_SYMBOL fs/fscache/fscache 0xbd3fa707	fscache_put_operation
+EXPORT_SYMBOL fs/fscache/fscache 0xc6573584	__fscache_read_or_alloc_pages
+EXPORT_SYMBOL fs/fscache/fscache 0xce29d0dd	fscache_check_aux
+EXPORT_SYMBOL fs/fscache/fscache 0xdf805e0c	fscache_add_cache
+EXPORT_SYMBOL fs/fscache/fscache 0xe60d79d9	__fscache_wait_on_page_write
+EXPORT_SYMBOL fs/fscache/fscache 0xe974ad4a	fscache_withdraw_cache
+EXPORT_SYMBOL fs/fscache/fscache 0xf586f962	__fscache_update_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0xfb9448dd	fscache_enqueue_operation
+EXPORT_SYMBOL fs/fscache/fscache 0xfd45416a	fscache_mark_pages_cached
+EXPORT_SYMBOL fs/fscache/fscache 0xff850045	fscache_fsdef_index
+EXPORT_SYMBOL fs/nfsd/nfsd 0x0e195c1c	nfs4_acl_nfsv4_to_posix
+EXPORT_SYMBOL fs/nfsd/nfsd 0x2095976a	nfs4_acl_new
+EXPORT_SYMBOL fs/nfsd/nfsd 0x28fb929b	nfs4_acl_posix_to_nfsv4
+EXPORT_SYMBOL fs/nfsd/nfsd 0x35e33c1e	nfs4_acl_write_who
+EXPORT_SYMBOL fs/nfsd/nfsd 0x5a157ae4	nfs4_acl_get_whotype
+EXPORT_SYMBOL fs/quota/quota_tree 0x11444c0e	qtree_entry_unused
+EXPORT_SYMBOL fs/quota/quota_tree 0x37d696d3	qtree_delete_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0x74182fe4	qtree_read_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0x89db33b4	qtree_write_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0xd156daba	qtree_release_dquot
+EXPORT_SYMBOL lib/crc-ccitt 0x651c2313	crc_ccitt
+EXPORT_SYMBOL lib/crc-ccitt 0x75811312	crc_ccitt_table
+EXPORT_SYMBOL lib/crc-itu-t 0x276c7e62	crc_itu_t
+EXPORT_SYMBOL lib/crc-itu-t 0xd29b009f	crc_itu_t_table
+EXPORT_SYMBOL lib/crc-t10dif 0x782acba5	crc_t10dif
+EXPORT_SYMBOL lib/crc7 0xc086bfba	crc7
+EXPORT_SYMBOL lib/crc7 0xd80c3603	crc7_syndrome_table
+EXPORT_SYMBOL lib/libcrc32c 0x27000b29	crc32c
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x315c65fd	zlib_deflateInit2
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x48034724	zlib_deflateReset
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xaf64ad0d	zlib_deflate
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf0caf44b	zlib_deflate_workspacesize
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf741c793	zlib_deflateEnd
+EXPORT_SYMBOL net/802/p8023 0x89e7f603	make_8023_client
+EXPORT_SYMBOL net/802/p8023 0xb690eeca	destroy_8023_client
+EXPORT_SYMBOL net/9p/9pnet 0x0b3ac49a	p9pdu_dump
+EXPORT_SYMBOL net/9p/9pnet 0x1ddcd0a1	p9_client_write
+EXPORT_SYMBOL net/9p/9pnet 0x3255786e	p9_idpool_destroy
+EXPORT_SYMBOL net/9p/9pnet 0x3b519556	p9_client_destroy
+EXPORT_SYMBOL net/9p/9pnet 0x3d73a797	p9_errstr2errno
+EXPORT_SYMBOL net/9p/9pnet 0x41e6bc51	p9_parse_header
+EXPORT_SYMBOL net/9p/9pnet 0x4496ec53	p9_client_open
+EXPORT_SYMBOL net/9p/9pnet 0x4bca3c0d	p9_idpool_create
+EXPORT_SYMBOL net/9p/9pnet 0x584cc7c8	p9_client_cb
+EXPORT_SYMBOL net/9p/9pnet 0x608663f5	p9_client_disconnect
+EXPORT_SYMBOL net/9p/9pnet 0x64515c50	v9fs_unregister_trans
+EXPORT_SYMBOL net/9p/9pnet 0x76b79bf1	p9stat_read
+EXPORT_SYMBOL net/9p/9pnet 0x77dbe8f7	p9_idpool_get
+EXPORT_SYMBOL net/9p/9pnet 0x805a0381	p9_client_auth
+EXPORT_SYMBOL net/9p/9pnet 0x81d1457c	p9_idpool_put
+EXPORT_SYMBOL net/9p/9pnet 0x881fee3c	p9_client_stat
+EXPORT_SYMBOL net/9p/9pnet 0x98964528	p9_client_create
+EXPORT_SYMBOL net/9p/9pnet 0x9a77ab27	p9_client_attach
+EXPORT_SYMBOL net/9p/9pnet 0x9c964743	p9stat_free
+EXPORT_SYMBOL net/9p/9pnet 0xb4b5806d	p9_client_fcreate
+EXPORT_SYMBOL net/9p/9pnet 0xb9d67413	p9_client_clunk
+EXPORT_SYMBOL net/9p/9pnet 0xb9e94ccf	p9_idpool_check
+EXPORT_SYMBOL net/9p/9pnet 0xc007e809	p9_client_remove
+EXPORT_SYMBOL net/9p/9pnet 0xc096dd22	p9_client_read
+EXPORT_SYMBOL net/9p/9pnet 0xc0f88dbc	v9fs_get_trans_by_name
+EXPORT_SYMBOL net/9p/9pnet 0xcda93a1c	p9_tag_lookup
+EXPORT_SYMBOL net/9p/9pnet 0xcf7936e2	v9fs_register_trans
+EXPORT_SYMBOL net/9p/9pnet 0xdbff7bd4	v9fs_get_default_trans
+EXPORT_SYMBOL net/9p/9pnet 0xe58a3360	p9_error_init
+EXPORT_SYMBOL net/9p/9pnet 0xe6a17230	p9_client_version
+EXPORT_SYMBOL net/9p/9pnet 0xfb680afd	p9_client_walk
+EXPORT_SYMBOL net/9p/9pnet 0xff094241	p9_client_wstat
+EXPORT_SYMBOL net/appletalk/appletalk 0x118dc3d8	atalk_find_dev_addr
+EXPORT_SYMBOL net/appletalk/appletalk 0x504fc417	atrtr_get_dev
+EXPORT_SYMBOL net/appletalk/appletalk 0x5edb76d9	aarp_send_ddp
+EXPORT_SYMBOL net/appletalk/appletalk 0x9c058805	alloc_ltalkdev
+EXPORT_SYMBOL net/atm/atm 0x06ad5b2b	atm_dev_deregister
+EXPORT_SYMBOL net/atm/atm 0x1a24e5e2	sonet_subtract_stats
+EXPORT_SYMBOL net/atm/atm 0x2cc2d52d	vcc_hash
+EXPORT_SYMBOL net/atm/atm 0x5d0ecbf7	deregister_atm_ioctl
+EXPORT_SYMBOL net/atm/atm 0x5dcc92a0	vcc_release_async
+EXPORT_SYMBOL net/atm/atm 0x735e233b	atm_alloc_charge
+EXPORT_SYMBOL net/atm/atm 0x8024f98e	atm_dev_lookup
+EXPORT_SYMBOL net/atm/atm 0x853ed4af	atm_proc_root
+EXPORT_SYMBOL net/atm/atm 0x89195dc3	sonet_copy_stats
+EXPORT_SYMBOL net/atm/atm 0x8ba17a0f	atm_init_aal5
+EXPORT_SYMBOL net/atm/atm 0xa5bdabab	vcc_insert_socket
+EXPORT_SYMBOL net/atm/atm 0xa6fba74b	atm_dev_register
+EXPORT_SYMBOL net/atm/atm 0xe9e8631f	vcc_sklist_lock
+EXPORT_SYMBOL net/atm/atm 0xf14337b9	register_atm_ioctl
+EXPORT_SYMBOL net/atm/atm 0xf49bc67a	atm_pcr_goal
+EXPORT_SYMBOL net/atm/atm 0xfebef585	atm_charge
+EXPORT_SYMBOL net/ax25/ax25 0x06843c0c	ax25_linkfail_register
+EXPORT_SYMBOL net/ax25/ax25 0x21afef82	ax25_hard_header
+EXPORT_SYMBOL net/ax25/ax25 0x242852b9	ax25_uid_policy
+EXPORT_SYMBOL net/ax25/ax25 0x2d110fd1	ax25_listen_register
+EXPORT_SYMBOL net/ax25/ax25 0x3d2d82ec	ax25_display_timer
+EXPORT_SYMBOL net/ax25/ax25 0x3efcdbe6	ax25_send_frame
+EXPORT_SYMBOL net/ax25/ax25 0x4502c65a	asc2ax
+EXPORT_SYMBOL net/ax25/ax25 0x53dea1ff	ax2asc
+EXPORT_SYMBOL net/ax25/ax25 0x564d9f14	ax25_findbyuid
+EXPORT_SYMBOL net/ax25/ax25 0x7da1e804	ax25_header_ops
+EXPORT_SYMBOL net/ax25/ax25 0x8ede9e26	ax25_protocol_release
+EXPORT_SYMBOL net/ax25/ax25 0xc1444946	ax25cmp
+EXPORT_SYMBOL net/ax25/ax25 0xd43ecbf1	null_ax25_address
+EXPORT_SYMBOL net/ax25/ax25 0xd48de96f	ax25_listen_release
+EXPORT_SYMBOL net/ax25/ax25 0xe465f344	ax25_rebuild_header
+EXPORT_SYMBOL net/ax25/ax25 0xe79ee045	ax25_find_cb
+EXPORT_SYMBOL net/ax25/ax25 0xee7affb7	ax25_linkfail_release
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x03188356	bt_sock_unlink
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x06d72ad6	hci_send_sco
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x116ed31e	hci_free_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x12c919df	bt_sock_wait_state
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x16cf6399	bt_accept_enqueue
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x2f3633b5	hci_register_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x3204366d	bt_sock_link
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x4b11062d	bt_accept_dequeue
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x5c4f0eb6	hci_conn_check_link_mode
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x6056a033	hci_conn_switch_role
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x6b91ee70	hci_conn_hold_device
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x7094f8ae	bt_err
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x72260a17	hci_get_route
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x76aabbe6	bt_sock_register
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x7d612524	hci_send_acl
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x8553e227	hci_conn_put_device
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x8ba57826	hci_unregister_cb
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x8dade3b6	hci_suspend_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x9aa4d403	hci_resume_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x9d1008c8	hci_connect
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xa9d29bd4	hci_conn_change_link_key
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xb12d3f83	hci_register_cb
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xbd74863e	bt_sock_recvmsg
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xc1f1fff7	bt_sock_poll
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xc2066af0	batostr
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xcc1fb551	baswap
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xd1f77470	hci_unregister_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xd2449948	hci_alloc_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xd65f238b	hci_recv_fragment
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xd85f73fd	hci_unregister_proto
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xe7ecd812	bt_accept_unlink
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xf19294db	bt_sock_unregister
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xf92a907c	bt_sock_ioctl
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xfb56d5ce	hci_conn_security
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xfd1c5401	hci_register_proto
+EXPORT_SYMBOL net/bluetooth/l2cap 0xfc31fe88	l2cap_load
+EXPORT_SYMBOL net/bridge/bridge 0x2ddcc7ca	br_should_route_hook
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x231d88b3	ebt_unregister_table
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x4cf872b9	ebt_register_table
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x72ab2d1c	ebt_do_table
+EXPORT_SYMBOL net/can/can 0x38a36d0c	can_rx_unregister
+EXPORT_SYMBOL net/can/can 0x731d4f5c	can_send
+EXPORT_SYMBOL net/can/can 0x993c5303	can_proto_unregister
+EXPORT_SYMBOL net/can/can 0xa764debb	can_proto_register
+EXPORT_SYMBOL net/can/can 0xdd253359	can_rx_register
+EXPORT_SYMBOL net/ieee802154/nl802154 0x83dfb499	ieee802154_nl_disassoc_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0x88c899b5	ieee802154_nl_start_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0x9db31d9d	ieee802154_nl_assoc_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0xa3f7a00a	ieee802154_nl_beacon_indic
+EXPORT_SYMBOL net/ieee802154/nl802154 0xae23ebb2	ieee802154_nl_scan_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0xef97c224	ieee802154_nl_assoc_indic
+EXPORT_SYMBOL net/ieee802154/nl802154 0xfeb8c6f4	ieee802154_nl_disassoc_indic
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x02b676d9	wpan_phy_unregister
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x4cdf115e	wpan_phy_alloc
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x6c075552	wpan_phy_find
+EXPORT_SYMBOL net/ieee802154/wpan-class 0xc5c69dba	wpan_phy_free
+EXPORT_SYMBOL net/ieee802154/wpan-class 0xd7533f86	wpan_phy_register
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x857cc4ee	arpt_register_table
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x9d4c539b	arpt_do_table
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xfb62829a	arpt_unregister_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x651f1aff	ipt_register_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x6b817064	ipt_do_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0xaf834960	ipt_unregister_table
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x23dcd4e6	nf_nat_protocol_unregister
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x46743ef6	nf_nat_setup_info
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x4aef759b	nf_nat_used_tuple
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x64902ae1	nf_nat_protocol_register
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xa6fab321	nf_nat_mangle_udp_packet
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xa7b89364	nf_nat_follow_master
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xbef12e1a	nf_nat_mangle_tcp_packet
+EXPORT_SYMBOL net/ipv4/tunnel4 0x09837505	xfrm4_tunnel_register
+EXPORT_SYMBOL net/ipv4/tunnel4 0x3b9ffef1	xfrm4_tunnel_deregister
+EXPORT_SYMBOL net/ipv6/ipv6 0x059a92d4	ipv6_push_nfrag_opts
+EXPORT_SYMBOL net/ipv6/ipv6 0x07e53d2d	inet6_bind
+EXPORT_SYMBOL net/ipv6/ipv6 0x0b0d888b	icmpv6_err_convert
+EXPORT_SYMBOL net/ipv6/ipv6 0x0f4f4c42	inet6_del_protocol
+EXPORT_SYMBOL net/ipv6/ipv6 0x0fe30cc2	inet6_getname
+EXPORT_SYMBOL net/ipv6/ipv6 0x13de2e0d	inet6_unregister_protosw
+EXPORT_SYMBOL net/ipv6/ipv6 0x14663431	inet6_register_protosw
+EXPORT_SYMBOL net/ipv6/ipv6 0x14bbb2b4	ip6_xmit
+EXPORT_SYMBOL net/ipv6/ipv6 0x1bcac5a3	ip6_frag_match
+EXPORT_SYMBOL net/ipv6/ipv6 0x30123eb5	icmpv6_statistics
+EXPORT_SYMBOL net/ipv6/ipv6 0x42b245c0	ndisc_mc_map
+EXPORT_SYMBOL net/ipv6/ipv6 0x533a75e3	inet6_release
+EXPORT_SYMBOL net/ipv6/ipv6 0x538383c0	unregister_inet6addr_notifier
+EXPORT_SYMBOL net/ipv6/ipv6 0x53873159	compat_ipv6_setsockopt
+EXPORT_SYMBOL net/ipv6/ipv6 0x53c7083b	inet6_ioctl
+EXPORT_SYMBOL net/ipv6/ipv6 0x54841933	ipv6_dev_get_saddr
+EXPORT_SYMBOL net/ipv6/ipv6 0x5a71cb93	inet6_add_protocol
+EXPORT_SYMBOL net/ipv6/ipv6 0x5c2090a7	in6_dev_finish_destroy
+EXPORT_SYMBOL net/ipv6/ipv6 0x65549984	nf_ip6_checksum
+EXPORT_SYMBOL net/ipv6/ipv6 0x66aa5e32	xfrm6_rcv_spi
+EXPORT_SYMBOL net/ipv6/ipv6 0x6960e4e8	ip6_route_me_harder
+EXPORT_SYMBOL net/ipv6/ipv6 0x6b70bc14	ndisc_send_skb
+EXPORT_SYMBOL net/ipv6/ipv6 0x7403ab32	xfrm6_find_1stfragopt
+EXPORT_SYMBOL net/ipv6/ipv6 0x7e85759d	ipv6_getsockopt
+EXPORT_SYMBOL net/ipv6/ipv6 0x85035058	compat_ipv6_getsockopt
+EXPORT_SYMBOL net/ipv6/ipv6 0x88e85a3e	ipv6_chk_prefix
+EXPORT_SYMBOL net/ipv6/ipv6 0x8a633ad8	icmpv6_send
+EXPORT_SYMBOL net/ipv6/ipv6 0x9cc16881	ip6_frag_init
+EXPORT_SYMBOL net/ipv6/ipv6 0xa35d971f	xfrm6_input_addr
+EXPORT_SYMBOL net/ipv6/ipv6 0xa8505670	ip6_route_output
+EXPORT_SYMBOL net/ipv6/ipv6 0xbad40bd8	rt6_lookup
+EXPORT_SYMBOL net/ipv6/ipv6 0xc157258b	ipv6_chk_addr
+EXPORT_SYMBOL net/ipv6/ipv6 0xc35f1b1c	xfrm6_prepare_output
+EXPORT_SYMBOL net/ipv6/ipv6 0xc846640b	ndisc_build_skb
+EXPORT_SYMBOL net/ipv6/ipv6 0xce19bac5	register_inet6addr_notifier
+EXPORT_SYMBOL net/ipv6/ipv6 0xd485d764	xfrm6_rcv
+EXPORT_SYMBOL net/ipv6/ipv6 0xe1a81c3a	icmpv6msg_statistics
+EXPORT_SYMBOL net/ipv6/ipv6 0xe690b8fd	__ipv6_isatap_ifid
+EXPORT_SYMBOL net/ipv6/ipv6 0xf502c164	ipv6_setsockopt
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x00bb89f6	ip6t_do_table
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x014744b9	ipv6_find_hdr
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x75d5d52a	ip6t_register_table
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xb8bddf33	ip6t_ext_hdr
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xf1ab957f	ip6t_unregister_table
+EXPORT_SYMBOL net/ipv6/tunnel6 0xcb067b4b	xfrm6_tunnel_deregister
+EXPORT_SYMBOL net/ipv6/tunnel6 0xf3cd66eb	xfrm6_tunnel_register
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0x9cd013f2	xfrm6_tunnel_alloc_spi
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xab14e193	xfrm6_tunnel_free_spi
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xdb1b42d1	xfrm6_tunnel_spi_lookup
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x204782b2	ircomm_connect_response
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x265b459a	ircomm_close
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x32525c8b	ircomm_disconnect_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x721a0943	ircomm_data_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x73059c7e	ircomm_flow_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x734669b0	ircomm_control_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x83fba8bb	ircomm_connect_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0xfb16b018	ircomm_open
+EXPORT_SYMBOL net/irda/irda 0x05b35e51	irlmp_open_lsap
+EXPORT_SYMBOL net/irda/irda 0x06a3ee58	irias_new_integer_value
+EXPORT_SYMBOL net/irda/irda 0x07d3647c	irlmp_register_service
+EXPORT_SYMBOL net/irda/irda 0x083fa7ce	irlap_close
+EXPORT_SYMBOL net/irda/irda 0x0972510b	irlap_open
+EXPORT_SYMBOL net/irda/irda 0x09da500c	irttp_dup
+EXPORT_SYMBOL net/irda/irda 0x0efdbec3	proc_irda
+EXPORT_SYMBOL net/irda/irda 0x18edd399	irias_add_string_attrib
+EXPORT_SYMBOL net/irda/irda 0x1952407c	irttp_flow_request
+EXPORT_SYMBOL net/irda/irda 0x1ca73fd3	irda_notify_init
+EXPORT_SYMBOL net/irda/irda 0x2036ad06	irda_param_insert
+EXPORT_SYMBOL net/irda/irda 0x26891c95	iriap_close
+EXPORT_SYMBOL net/irda/irda 0x29783db6	hashbin_get_first
+EXPORT_SYMBOL net/irda/irda 0x2f960a27	irttp_close_tsap
+EXPORT_SYMBOL net/irda/irda 0x38a20e5b	irda_debug
+EXPORT_SYMBOL net/irda/irda 0x448b8aaa	irda_qos_bits_to_value
+EXPORT_SYMBOL net/irda/irda 0x46c1c4a2	irlmp_unregister_service
+EXPORT_SYMBOL net/irda/irda 0x4c2054e3	irttp_connect_request
+EXPORT_SYMBOL net/irda/irda 0x5200ac1b	async_unwrap_char
+EXPORT_SYMBOL net/irda/irda 0x543a6db5	hashbin_new
+EXPORT_SYMBOL net/irda/irda 0x550a5e27	irias_add_octseq_attrib
+EXPORT_SYMBOL net/irda/irda 0x5861b834	hashbin_insert
+EXPORT_SYMBOL net/irda/irda 0x5f261aef	hashbin_get_next
+EXPORT_SYMBOL net/irda/irda 0x69ab8d96	irttp_connect_response
+EXPORT_SYMBOL net/irda/irda 0x6a751ea8	irttp_udata_request
+EXPORT_SYMBOL net/irda/irda 0x6b043eba	irda_init_max_qos_capabilies
+EXPORT_SYMBOL net/irda/irda 0x7042bc54	irlmp_register_client
+EXPORT_SYMBOL net/irda/irda 0x7290a7dc	irttp_disconnect_request
+EXPORT_SYMBOL net/irda/irda 0x763e54a4	irlmp_unregister_client
+EXPORT_SYMBOL net/irda/irda 0x7957f728	irlmp_update_client
+EXPORT_SYMBOL net/irda/irda 0x7f933922	hashbin_remove_this
+EXPORT_SYMBOL net/irda/irda 0x8479a07a	irlmp_data_request
+EXPORT_SYMBOL net/irda/irda 0x89136cd1	irias_delete_object
+EXPORT_SYMBOL net/irda/irda 0x896caa6a	irlmp_disconnect_request
+EXPORT_SYMBOL net/irda/irda 0x8bbed4f9	irlmp_connect_request
+EXPORT_SYMBOL net/irda/irda 0x8fead36b	iriap_getvaluebyclass_request
+EXPORT_SYMBOL net/irda/irda 0x91815586	irda_param_pack
+EXPORT_SYMBOL net/irda/irda 0x94a8156e	hashbin_delete
+EXPORT_SYMBOL net/irda/irda 0x980fe568	irias_insert_object
+EXPORT_SYMBOL net/irda/irda 0x993ad14b	irda_param_extract_all
+EXPORT_SYMBOL net/irda/irda 0x9b6590f7	irttp_open_tsap
+EXPORT_SYMBOL net/irda/irda 0xa26f32f8	irias_find_object
+EXPORT_SYMBOL net/irda/irda 0xaac08f4a	alloc_irdadev
+EXPORT_SYMBOL net/irda/irda 0xb7884205	hashbin_remove
+EXPORT_SYMBOL net/irda/irda 0xb9394173	irias_delete_value
+EXPORT_SYMBOL net/irda/irda 0xbcd3ef13	irias_object_change_attribute
+EXPORT_SYMBOL net/irda/irda 0xbe40ace9	irlmp_discovery_request
+EXPORT_SYMBOL net/irda/irda 0xc10a5281	irias_add_integer_attrib
+EXPORT_SYMBOL net/irda/irda 0xc1c1bde8	iriap_open
+EXPORT_SYMBOL net/irda/irda 0xd627dc1a	hashbin_lock_find
+EXPORT_SYMBOL net/irda/irda 0xd6deeaae	irda_setup_dma
+EXPORT_SYMBOL net/irda/irda 0xdb82a4e2	irlmp_connect_response
+EXPORT_SYMBOL net/irda/irda 0xde4c6b3c	irlmp_service_to_hint
+EXPORT_SYMBOL net/irda/irda 0xe0acf0d4	hashbin_find
+EXPORT_SYMBOL net/irda/irda 0xe1a50c6f	irias_new_object
+EXPORT_SYMBOL net/irda/irda 0xe6655fb3	irda_device_set_media_busy
+EXPORT_SYMBOL net/irda/irda 0xece890bc	irlmp_close_lsap
+EXPORT_SYMBOL net/irda/irda 0xedd521c2	irlmp_get_discoveries
+EXPORT_SYMBOL net/irda/irda 0xf904cff4	irttp_data_request
+EXPORT_SYMBOL net/irda/irda 0xfbdfba1a	async_wrap_skb
+EXPORT_SYMBOL net/lapb/lapb 0x33142aa8	lapb_disconnect_request
+EXPORT_SYMBOL net/lapb/lapb 0x41da9121	lapb_data_request
+EXPORT_SYMBOL net/lapb/lapb 0x6195301e	lapb_data_received
+EXPORT_SYMBOL net/lapb/lapb 0x8042a3ee	lapb_setparms
+EXPORT_SYMBOL net/lapb/lapb 0xe17212a9	lapb_connect_request
+EXPORT_SYMBOL net/lapb/lapb 0xe7ff66f9	lapb_unregister
+EXPORT_SYMBOL net/lapb/lapb 0xee9ffd88	lapb_getparms
+EXPORT_SYMBOL net/lapb/lapb 0xf2a0c799	lapb_register
+EXPORT_SYMBOL net/mac80211/mac80211 0x09ff23ce	ieee80211_restart_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x0d0701a1	__ieee80211_get_tx_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0x1bf419fd	ieee80211_stop_tx_ba_cb
+EXPORT_SYMBOL net/mac80211/mac80211 0x28acb3ef	ieee80211_ctstoself_get
+EXPORT_SYMBOL net/mac80211/mac80211 0x2daa23b9	wiphy_to_ieee80211_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x308d8b66	ieee80211_start_tx_ba_cb
+EXPORT_SYMBOL net/mac80211/mac80211 0x3408d484	ieee80211_tx_status_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0x43c1409e	ieee80211_rate_control_register
+EXPORT_SYMBOL net/mac80211/mac80211 0x5109303e	ieee80211_find_sta
+EXPORT_SYMBOL net/mac80211/mac80211 0x54273268	ieee80211_rx
+EXPORT_SYMBOL net/mac80211/mac80211 0x55f653d4	ieee80211_rts_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0x572e71df	ieee80211_stop_tx_ba_cb_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0x5da94daf	__ieee80211_get_rx_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0x672bba96	rate_control_send_low
+EXPORT_SYMBOL net/mac80211/mac80211 0x67e2d5d3	ieee80211_rx_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0x69481bda	ieee80211_queue_work
+EXPORT_SYMBOL net/mac80211/mac80211 0x69dbfcab	ieee80211_tx_status
+EXPORT_SYMBOL net/mac80211/mac80211 0x6c511676	ieee80211_rate_control_unregister
+EXPORT_SYMBOL net/mac80211/mac80211 0x7b5e59f8	ieee80211_queue_delayed_work
+EXPORT_SYMBOL net/mac80211/mac80211 0x82bd4d81	ieee80211_start_tx_ba_session
+EXPORT_SYMBOL net/mac80211/mac80211 0x90517acf	ieee80211_scan_completed
+EXPORT_SYMBOL net/mac80211/mac80211 0x91f74b1d	ieee80211_rts_get
+EXPORT_SYMBOL net/mac80211/mac80211 0x9316a128	ieee80211_stop_queue
+EXPORT_SYMBOL net/mac80211/mac80211 0x934f4cba	ieee80211_stop_tx_ba_session
+EXPORT_SYMBOL net/mac80211/mac80211 0x9c840f9c	ieee80211_generic_frame_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0x9ec654fa	ieee80211_alloc_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xa5f058db	ieee80211_start_tx_ba_cb_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0xa66b4a98	ieee80211_queue_stopped
+EXPORT_SYMBOL net/mac80211/mac80211 0xadf157c6	ieee80211_free_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xb2ee6617	__ieee80211_get_radio_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0xb4c48716	ieee80211_stop_queues
+EXPORT_SYMBOL net/mac80211/mac80211 0xb869d4e5	ieee80211_ctstoself_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0xcccfc504	ieee80211_get_buffered_bc
+EXPORT_SYMBOL net/mac80211/mac80211 0xd833d772	ieee80211_beacon_get
+EXPORT_SYMBOL net/mac80211/mac80211 0xda107dc6	ieee80211_unregister_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xe3170539	ieee80211_get_tkip_key
+EXPORT_SYMBOL net/mac80211/mac80211 0xe40427e5	ieee80211_wake_queues
+EXPORT_SYMBOL net/mac80211/mac80211 0xe5a56803	ieee80211_register_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xe8abe42d	ieee80211_beacon_loss
+EXPORT_SYMBOL net/mac80211/mac80211 0xfafd59b4	ieee80211_wake_queue
+EXPORT_SYMBOL net/mac80211/mac80211 0xfb597179	__ieee80211_get_assoc_led_name
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x1311556a	unregister_ip_vs_app
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x22111221	unregister_ip_vs_scheduler
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x2245f0e1	register_ip_vs_scheduler
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x3cd3da17	ip_vs_tcp_conn_listen
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x531a66fd	ip_vs_conn_put
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x5cd2cebd	ip_vs_conn_out_get
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x7bb5752a	ip_vs_conn_in_get
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x85851b6e	register_ip_vs_app
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xa1dbc2d8	ip_vs_proto_name
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xdbd7081c	register_ip_vs_app_inc
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xed773d9b	ip_vs_skb_replace
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xfee7e654	ip_vs_conn_new
+EXPORT_SYMBOL net/netfilter/nf_conntrack 0x692a99cd	__nf_ct_ext_destroy
+EXPORT_SYMBOL net/netfilter/nf_conntrack 0xdf5c344a	__nf_ct_ext_add
+EXPORT_SYMBOL net/netfilter/nf_conntrack_proto_gre 0xe4038d62	nf_ct_gre_keymap_flush
+EXPORT_SYMBOL net/netfilter/x_tables 0x16a5e826	xt_free_table_info
+EXPORT_SYMBOL net/netfilter/x_tables 0x1d9c25cf	xt_unregister_matches
+EXPORT_SYMBOL net/netfilter/x_tables 0x2c92c57c	xt_unregister_targets
+EXPORT_SYMBOL net/netfilter/x_tables 0x55f55274	xt_register_match
+EXPORT_SYMBOL net/netfilter/x_tables 0x95a02aae	xt_register_targets
+EXPORT_SYMBOL net/netfilter/x_tables 0x97adceee	xt_unregister_target
+EXPORT_SYMBOL net/netfilter/x_tables 0x9df447f2	xt_register_matches
+EXPORT_SYMBOL net/netfilter/x_tables 0xaece6ea9	xt_unregister_match
+EXPORT_SYMBOL net/netfilter/x_tables 0xc3ff5dff	xt_alloc_table_info
+EXPORT_SYMBOL net/netfilter/x_tables 0xcd8d4f28	xt_find_match
+EXPORT_SYMBOL net/netfilter/x_tables 0xd516a48c	xt_find_target
+EXPORT_SYMBOL net/netfilter/x_tables 0xf1fd472b	xt_register_target
+EXPORT_SYMBOL net/phonet/phonet 0x095b434f	phonet_proto_unregister
+EXPORT_SYMBOL net/phonet/phonet 0x207ff571	pn_skb_send
+EXPORT_SYMBOL net/phonet/phonet 0x30942fdf	pn_sock_hash
+EXPORT_SYMBOL net/phonet/phonet 0x50a2f53c	phonet_proto_register
+EXPORT_SYMBOL net/phonet/phonet 0x5446721e	pn_sock_unhash
+EXPORT_SYMBOL net/phonet/phonet 0x756ee17b	phonet_stream_ops
+EXPORT_SYMBOL net/phonet/phonet 0xc1a8d487	phonet_header_ops
+EXPORT_SYMBOL net/phonet/phonet 0xc20c717e	pn_sock_get_port
+EXPORT_SYMBOL net/rfkill/rfkill 0x2df0c6b0	rfkill_destroy
+EXPORT_SYMBOL net/rfkill/rfkill 0x379af0ed	rfkill_register
+EXPORT_SYMBOL net/rfkill/rfkill 0x6684232c	rfkill_get_led_trigger_name
+EXPORT_SYMBOL net/rfkill/rfkill 0x6a07f5ee	rfkill_init_sw_state
+EXPORT_SYMBOL net/rfkill/rfkill 0x87587145	rfkill_alloc
+EXPORT_SYMBOL net/rfkill/rfkill 0x8787a4f5	rfkill_blocked
+EXPORT_SYMBOL net/rfkill/rfkill 0x8a20b131	rfkill_set_sw_state
+EXPORT_SYMBOL net/rfkill/rfkill 0xbdd07ca0	rfkill_pause_polling
+EXPORT_SYMBOL net/rfkill/rfkill 0xc2bc4cb6	rfkill_unregister
+EXPORT_SYMBOL net/rfkill/rfkill 0xdd932444	rfkill_set_states
+EXPORT_SYMBOL net/rfkill/rfkill 0xe4b1be85	rfkill_set_led_trigger_name
+EXPORT_SYMBOL net/rfkill/rfkill 0xe8cbf611	rfkill_resume_polling
+EXPORT_SYMBOL net/rfkill/rfkill 0xfecc5734	rfkill_set_hw_state
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x27646192	rxrpc_kernel_begin_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x2ef8c537	rxrpc_kernel_get_error_number
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x40b1411d	rxrpc_get_server_data_key
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x43eb85e9	key_type_rxrpc
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x5d3f42a6	rxrpc_kernel_is_data_last
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x69152d79	rxrpc_kernel_data_delivered
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x6ed0c840	rxrpc_kernel_reject_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xa98ab011	rxrpc_kernel_get_abort_code
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xb5315c07	rxrpc_kernel_send_data
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xb66abccb	rxrpc_kernel_intercept_rx_messages
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xc5ea0c5c	rxrpc_kernel_abort_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xcfbdd16a	rxrpc_kernel_accept_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xd45e2dfa	rxrpc_get_null_key
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xe0027725	rxrpc_kernel_end_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xf312bc1f	rxrpc_kernel_free_skb
+EXPORT_SYMBOL net/sunrpc/sunrpc 0xdaddbaf0	svc_pool_stats_open
+EXPORT_SYMBOL net/tipc/tipc 0x08acf310	tipc_available_nodes
+EXPORT_SYMBOL net/tipc/tipc 0x0b074a7b	tipc_multicast
+EXPORT_SYMBOL net/tipc/tipc 0x0b8f00dc	tipc_recv_msg
+EXPORT_SYMBOL net/tipc/tipc 0x10c35d88	tipc_createport
+EXPORT_SYMBOL net/tipc/tipc 0x10d40fcd	tipc_isconnected
+EXPORT_SYMBOL net/tipc/tipc 0x1472b270	tipc_disconnect
+EXPORT_SYMBOL net/tipc/tipc 0x1479cb03	tipc_deleteport
+EXPORT_SYMBOL net/tipc/tipc 0x15b5ecde	tipc_set_portunreliable
+EXPORT_SYMBOL net/tipc/tipc 0x16f27683	tipc_block_bearer
+EXPORT_SYMBOL net/tipc/tipc 0x21c9ceb2	tipc_reject_msg
+EXPORT_SYMBOL net/tipc/tipc 0x23daecbd	tipc_send
+EXPORT_SYMBOL net/tipc/tipc 0x259b74f9	tipc_acknowledge
+EXPORT_SYMBOL net/tipc/tipc 0x27d99f49	tipc_createport_raw
+EXPORT_SYMBOL net/tipc/tipc 0x310d1bc9	tipc_detach
+EXPORT_SYMBOL net/tipc/tipc 0x3712e340	tipc_portunreliable
+EXPORT_SYMBOL net/tipc/tipc 0x3976041f	tipc_set_portimportance
+EXPORT_SYMBOL net/tipc/tipc 0x419b02fc	tipc_send2port
+EXPORT_SYMBOL net/tipc/tipc 0x4a620d54	tipc_send_buf_fast
+EXPORT_SYMBOL net/tipc/tipc 0x4b2243c6	tipc_portimportance
+EXPORT_SYMBOL net/tipc/tipc 0x538b228a	tipc_withdraw
+EXPORT_SYMBOL net/tipc/tipc 0x5637ed44	tipc_get_mode
+EXPORT_SYMBOL net/tipc/tipc 0x5c0d4b5c	tipc_ref_valid
+EXPORT_SYMBOL net/tipc/tipc 0x62a681a3	tipc_portunreturnable
+EXPORT_SYMBOL net/tipc/tipc 0x7bb35e75	tipc_send_buf2name
+EXPORT_SYMBOL net/tipc/tipc 0x88b73627	tipc_get_addr
+EXPORT_SYMBOL net/tipc/tipc 0x9b9d3b36	tipc_forward_buf2name
+EXPORT_SYMBOL net/tipc/tipc 0x9c45558e	tipc_enable_bearer
+EXPORT_SYMBOL net/tipc/tipc 0xa1b42d32	tipc_forward2port
+EXPORT_SYMBOL net/tipc/tipc 0xa58219d5	tipc_register_media
+EXPORT_SYMBOL net/tipc/tipc 0xadd203d0	tipc_connect2port
+EXPORT_SYMBOL net/tipc/tipc 0xae0103c3	tipc_shutdown
+EXPORT_SYMBOL net/tipc/tipc 0xb1f8eacc	tipc_send2name
+EXPORT_SYMBOL net/tipc/tipc 0xb27ac4a7	tipc_get_port
+EXPORT_SYMBOL net/tipc/tipc 0xb35b672c	tipc_publish
+EXPORT_SYMBOL net/tipc/tipc 0xc7472c5d	tipc_forward_buf2port
+EXPORT_SYMBOL net/tipc/tipc 0xcdc6e909	tipc_continue
+EXPORT_SYMBOL net/tipc/tipc 0xcec8514a	tipc_set_portunreturnable
+EXPORT_SYMBOL net/tipc/tipc 0xcee290be	tipc_forward2name
+EXPORT_SYMBOL net/tipc/tipc 0xd44731e5	tipc_ownidentity
+EXPORT_SYMBOL net/tipc/tipc 0xda7f9d3f	tipc_attach
+EXPORT_SYMBOL net/tipc/tipc 0xdf5008fc	tipc_peer
+EXPORT_SYMBOL net/tipc/tipc 0xe7aece47	tipc_ispublished
+EXPORT_SYMBOL net/tipc/tipc 0xe9827186	tipc_send_buf2port
+EXPORT_SYMBOL net/tipc/tipc 0xeefd49b3	tipc_get_handle
+EXPORT_SYMBOL net/tipc/tipc 0xef50a1ef	tipc_disable_bearer
+EXPORT_SYMBOL net/tipc/tipc 0xfb8bd7eb	tipc_send_buf
+EXPORT_SYMBOL net/wanrouter/wanrouter 0x0ebe03d1	unregister_wan_device
+EXPORT_SYMBOL net/wanrouter/wanrouter 0x6bb97173	register_wan_device
+EXPORT_SYMBOL net/wimax/wimax 0x50b13db2	wimax_reset
+EXPORT_SYMBOL net/wimax/wimax 0xc43baf0b	wimax_rfkill
+EXPORT_SYMBOL net/wireless/cfg80211 0x062e2153	regulatory_hint
+EXPORT_SYMBOL net/wireless/cfg80211 0x07e7ac5a	ieee80211_radiotap_iterator_init
+EXPORT_SYMBOL net/wireless/cfg80211 0x083572b7	cfg80211_testmode_alloc_event_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0x09c64fbd	ieee80211_frequency_to_channel
+EXPORT_SYMBOL net/wireless/cfg80211 0x0ae5e047	cfg80211_scan_done
+EXPORT_SYMBOL net/wireless/cfg80211 0x1879fcbd	bridge_tunnel_header
+EXPORT_SYMBOL net/wireless/cfg80211 0x214e8055	__ieee80211_get_channel
+EXPORT_SYMBOL net/wireless/cfg80211 0x2a12d07e	cfg80211_send_disassoc
+EXPORT_SYMBOL net/wireless/cfg80211 0x2fc0a64e	cfg80211_get_mesh
+EXPORT_SYMBOL net/wireless/cfg80211 0x30a8da42	cfg80211_michael_mic_failure
+EXPORT_SYMBOL net/wireless/cfg80211 0x34f640bd	cfg80211_ibss_joined
+EXPORT_SYMBOL net/wireless/cfg80211 0x374e61df	cfg80211_send_rx_auth
+EXPORT_SYMBOL net/wireless/cfg80211 0x37ac8d05	ieee80211_get_response_rate
+EXPORT_SYMBOL net/wireless/cfg80211 0x3b7ea891	cfg80211_classify8021d
+EXPORT_SYMBOL net/wireless/cfg80211 0x3c22e081	cfg80211_get_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0x3c835ee6	freq_reg_info
+EXPORT_SYMBOL net/wireless/cfg80211 0x3f84a41e	ieee80211_data_to_8023
+EXPORT_SYMBOL net/wireless/cfg80211 0x411919e0	wiphy_apply_custom_regulatory
+EXPORT_SYMBOL net/wireless/cfg80211 0x5738f01a	cfg80211_roamed
+EXPORT_SYMBOL net/wireless/cfg80211 0x69b18f43	rfc1042_header
+EXPORT_SYMBOL net/wireless/cfg80211 0x6defd1ae	wiphy_rfkill_start_polling
+EXPORT_SYMBOL net/wireless/cfg80211 0x755128df	cfg80211_send_assoc_timeout
+EXPORT_SYMBOL net/wireless/cfg80211 0x7636ac43	wiphy_register
+EXPORT_SYMBOL net/wireless/cfg80211 0x77dbb393	cfg80211_send_auth_timeout
+EXPORT_SYMBOL net/wireless/cfg80211 0x7c3fddc1	ieee80211_bss_get_ie
+EXPORT_SYMBOL net/wireless/cfg80211 0x800dbce3	wiphy_unregister
+EXPORT_SYMBOL net/wireless/cfg80211 0x87bcbe57	cfg80211_unlink_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0x8c35d732	ieee80211_hdrlen
+EXPORT_SYMBOL net/wireless/cfg80211 0x8d394569	cfg80211_testmode_alloc_reply_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0x8dcb3c18	cfg80211_send_deauth
+EXPORT_SYMBOL net/wireless/cfg80211 0x9d64db94	wiphy_rfkill_set_hw_state
+EXPORT_SYMBOL net/wireless/cfg80211 0xa4757f75	wiphy_new
+EXPORT_SYMBOL net/wireless/cfg80211 0xa7fa5649	ieee80211_get_hdrlen_from_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0xaf66b2f1	wiphy_rfkill_stop_polling
+EXPORT_SYMBOL net/wireless/cfg80211 0xb0643312	cfg80211_connect_result
+EXPORT_SYMBOL net/wireless/cfg80211 0xb2443dfd	cfg80211_send_rx_assoc
+EXPORT_SYMBOL net/wireless/cfg80211 0xbfaf4c46	cfg80211_inform_bss_frame
+EXPORT_SYMBOL net/wireless/cfg80211 0xc4e85ec5	ieee80211_radiotap_iterator_next
+EXPORT_SYMBOL net/wireless/cfg80211 0xcacb59da	cfg80211_testmode_event
+EXPORT_SYMBOL net/wireless/cfg80211 0xccc291b3	ieee80211_channel_to_frequency
+EXPORT_SYMBOL net/wireless/cfg80211 0xcfcb3ddd	cfg80211_inform_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0xdc639a93	cfg80211_disconnected
+EXPORT_SYMBOL net/wireless/cfg80211 0xe49f8244	cfg80211_put_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0xee98db58	wiphy_free
+EXPORT_SYMBOL net/wireless/cfg80211 0xef180b13	cfg80211_testmode_reply
+EXPORT_SYMBOL net/wireless/cfg80211 0xfdd3e565	ieee80211_data_from_8023
+EXPORT_SYMBOL net/wireless/lib80211 0x230f3ffb	lib80211_crypt_deinit_handler
+EXPORT_SYMBOL net/wireless/lib80211 0x2d0f99e5	print_ssid
+EXPORT_SYMBOL net/wireless/lib80211 0x37b9a370	lib80211_crypt_info_free
+EXPORT_SYMBOL net/wireless/lib80211 0x3f33e664	lib80211_register_crypto_ops
+EXPORT_SYMBOL net/wireless/lib80211 0x8e9af7ad	lib80211_crypt_delayed_deinit
+EXPORT_SYMBOL net/wireless/lib80211 0x97e7d606	lib80211_crypt_info_init
+EXPORT_SYMBOL net/wireless/lib80211 0xa16739b4	lib80211_unregister_crypto_ops
+EXPORT_SYMBOL net/wireless/lib80211 0xa4675381	lib80211_crypt_deinit_entries
+EXPORT_SYMBOL net/wireless/lib80211 0xdae1e2b8	lib80211_get_crypto_ops
+EXPORT_SYMBOL net/wireless/lib80211 0xfe42065c	lib80211_crypt_quiescing
+EXPORT_SYMBOL sound/ac97_bus 0xb566cf9b	ac97_bus_type
+EXPORT_SYMBOL sound/core/oss/snd-mixer-oss 0x3910a7aa	snd_mixer_oss_ioctl_card
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x16a5941a	snd_seq_event_port_attach
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x1a724fcc	snd_seq_kernel_client_ctl
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x3ad11e35	snd_seq_kernel_client_write_poll
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x3fb4d161	snd_seq_kernel_client_dispatch
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x69981736	snd_seq_kernel_client_enqueue_blocking
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x6bb71038	snd_seq_delete_kernel_client
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x7ac2f329	snd_seq_expand_var_event
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x7b8699eb	snd_seq_event_port_detach
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x7dea71e7	snd_seq_create_kernel_client
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x89947013	snd_use_lock_sync_helper
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xb8e448a0	snd_seq_set_queue_tempo
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xcac0a3be	snd_seq_kernel_client_enqueue
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xe934da1d	snd_seq_dump_var_event
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x02aa692f	snd_seq_device_register_driver
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x3a57f235	snd_seq_autoload_unlock
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x6339b6d0	snd_seq_device_load_drivers
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xb90668b2	snd_seq_autoload_lock
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xc622fb29	snd_seq_device_unregister_driver
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xf93aa615	snd_seq_device_new
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x6ea09972	snd_midi_channel_alloc_set
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x833a3e07	snd_midi_channel_set_clear
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xb9948d2c	snd_midi_channel_free_set
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xf0a1fdb3	snd_midi_process_event
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x326911b6	snd_midi_event_new
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x7cb19049	snd_midi_event_reset_decode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xb389aad4	snd_midi_event_encode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xb401ffd7	snd_midi_event_no_status
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xb5d25358	snd_midi_event_free
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xbf834054	snd_midi_event_reset_encode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xe03c0c74	snd_midi_event_encode_byte
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xe8755241	snd_midi_event_decode
+EXPORT_SYMBOL sound/core/seq/snd-seq-virmidi 0x54c5bd1e	snd_virmidi_new
+EXPORT_SYMBOL sound/core/snd 0x07b609d2	snd_ctl_register_ioctl_compat
+EXPORT_SYMBOL sound/core/snd 0x09e4028d	snd_info_register
+EXPORT_SYMBOL sound/core/snd 0x18e1683f	snd_dma_program
+EXPORT_SYMBOL sound/core/snd 0x191e88cf	snd_dma_pointer
+EXPORT_SYMBOL sound/core/snd 0x198788b4	snd_lookup_oss_minor_data
+EXPORT_SYMBOL sound/core/snd 0x1f97dda0	snd_card_set_id
+EXPORT_SYMBOL sound/core/snd 0x24a94b26	snd_info_get_line
+EXPORT_SYMBOL sound/core/snd 0x2ae3deaa	release_and_free_resource
+EXPORT_SYMBOL sound/core/snd 0x2c521d4f	snd_card_file_remove
+EXPORT_SYMBOL sound/core/snd 0x312a3379	snd_ctl_make_virtual_master
+EXPORT_SYMBOL sound/core/snd 0x36baa9f8	snd_unregister_oss_device
+EXPORT_SYMBOL sound/core/snd 0x3971b4df	snd_ecards_limit
+EXPORT_SYMBOL sound/core/snd 0x3d523428	snd_device_free
+EXPORT_SYMBOL sound/core/snd 0x46cd7d71	snd_add_device_sysfs_file
+EXPORT_SYMBOL sound/core/snd 0x47df4ca7	snd_ctl_find_numid
+EXPORT_SYMBOL sound/core/snd 0x4a3ea5c0	snd_request_card
+EXPORT_SYMBOL sound/core/snd 0x4cb97993	snd_card_file_add
+EXPORT_SYMBOL sound/core/snd 0x518bb7f8	copy_from_user_toio
+EXPORT_SYMBOL sound/core/snd 0x55e5d0e9	snd_ctl_free_one
+EXPORT_SYMBOL sound/core/snd 0x587eb042	snd_card_free
+EXPORT_SYMBOL sound/core/snd 0x5c3e34f2	snd_device_register
+EXPORT_SYMBOL sound/core/snd 0x62224c4e	snd_component_add
+EXPORT_SYMBOL sound/core/snd 0x6332e28d	snd_mixer_oss_notify_callback
+EXPORT_SYMBOL sound/core/snd 0x6824573f	snd_ctl_rename_id
+EXPORT_SYMBOL sound/core/snd 0x6cdc6e11	snd_power_wait
+EXPORT_SYMBOL sound/core/snd 0x70c15ac1	snd_dma_disable
+EXPORT_SYMBOL sound/core/snd 0x72c9b6fe	snd_device_new
+EXPORT_SYMBOL sound/core/snd 0x76424a30	snd_ctl_boolean_mono_info
+EXPORT_SYMBOL sound/core/snd 0x79917104	snd_ctl_find_id
+EXPORT_SYMBOL sound/core/snd 0x8dbf8dde	snd_ctl_new1
+EXPORT_SYMBOL sound/core/snd 0x8df3789f	snd_oss_info_register
+EXPORT_SYMBOL sound/core/snd 0x8f595b11	snd_major
+EXPORT_SYMBOL sound/core/snd 0x8f8dcd15	snd_ctl_unregister_ioctl_compat
+EXPORT_SYMBOL sound/core/snd 0x8f8e4504	snd_ctl_unregister_ioctl
+EXPORT_SYMBOL sound/core/snd 0x9768b268	snd_ctl_notify
+EXPORT_SYMBOL sound/core/snd 0x98f21989	snd_card_disconnect
+EXPORT_SYMBOL sound/core/snd 0x9dab2f45	snd_register_device_for_dev
+EXPORT_SYMBOL sound/core/snd 0x9e6d79f8	snd_info_get_str
+EXPORT_SYMBOL sound/core/snd 0x9ff48f06	snd_ctl_boolean_stereo_info
+EXPORT_SYMBOL sound/core/snd 0xa0726d24	snd_unregister_device
+EXPORT_SYMBOL sound/core/snd 0xa15285da	snd_card_free_when_closed
+EXPORT_SYMBOL sound/core/snd 0xa7647946	snd_jack_set_parent
+EXPORT_SYMBOL sound/core/snd 0xae22416c	_snd_ctl_add_slave
+EXPORT_SYMBOL sound/core/snd 0xae25e647	snd_pci_quirk_lookup
+EXPORT_SYMBOL sound/core/snd 0xb2e5ae4a	snd_lookup_minor_data
+EXPORT_SYMBOL sound/core/snd 0xbb88b38c	snd_ctl_register_ioctl
+EXPORT_SYMBOL sound/core/snd 0xbfd201ae	snd_cards
+EXPORT_SYMBOL sound/core/snd 0xc2214680	snd_info_create_module_entry
+EXPORT_SYMBOL sound/core/snd 0xc38785f5	snd_ctl_add
+EXPORT_SYMBOL sound/core/snd 0xd7c780b5	snd_jack_new
+EXPORT_SYMBOL sound/core/snd 0xda16eadd	snd_info_free_entry
+EXPORT_SYMBOL sound/core/snd 0xdac8caad	snd_jack_report
+EXPORT_SYMBOL sound/core/snd 0xdde405ec	snd_card_register
+EXPORT_SYMBOL sound/core/snd 0xe20c9214	snd_iprintf
+EXPORT_SYMBOL sound/core/snd 0xe243dde3	copy_to_user_fromio
+EXPORT_SYMBOL sound/core/snd 0xeb255f59	snd_ctl_remove_id
+EXPORT_SYMBOL sound/core/snd 0xeb7a9286	snd_info_create_card_entry
+EXPORT_SYMBOL sound/core/snd 0xf48b7a4e	snd_register_oss_device
+EXPORT_SYMBOL sound/core/snd 0xf51c18c9	snd_seq_root
+EXPORT_SYMBOL sound/core/snd 0xf953ff1f	snd_ctl_remove
+EXPORT_SYMBOL sound/core/snd 0xfe60f7ee	snd_card_proc_new
+EXPORT_SYMBOL sound/core/snd 0xffbf5c2e	snd_card_create
+EXPORT_SYMBOL sound/core/snd-hwdep 0x726d3f9c	snd_hwdep_new
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x19cc2ce3	snd_free_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x76322b84	snd_dma_reserve_buf
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x7e01b5a9	snd_dma_alloc_pages_fallback
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xab445411	snd_dma_alloc_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xb5a7ab21	snd_dma_get_reserved_buf
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xc6829020	snd_malloc_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xdf014128	snd_dma_free_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0x0283dfe3	_snd_pcm_hw_params_any
+EXPORT_SYMBOL sound/core/snd-pcm 0x04cda566	snd_interval_refine
+EXPORT_SYMBOL sound/core/snd-pcm 0x063e52de	snd_pcm_lib_preallocate_free_for_all
+EXPORT_SYMBOL sound/core/snd-pcm 0x11045edc	snd_pcm_lib_write
+EXPORT_SYMBOL sound/core/snd-pcm 0x19da1b87	snd_pcm_lib_free_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0x1bfde535	snd_pcm_lib_writev
+EXPORT_SYMBOL sound/core/snd-pcm 0x1d027e4b	snd_pcm_format_signed
+EXPORT_SYMBOL sound/core/snd-pcm 0x1fb1a97c	snd_pcm_hw_constraint_integer
+EXPORT_SYMBOL sound/core/snd-pcm 0x25efa331	snd_pcm_hw_constraint_ratdens
+EXPORT_SYMBOL sound/core/snd-pcm 0x3796bdcc	snd_pcm_format_little_endian
+EXPORT_SYMBOL sound/core/snd-pcm 0x39bf9301	_snd_pcm_hw_param_setempty
+EXPORT_SYMBOL sound/core/snd-pcm 0x4f816e9b	snd_pcm_format_big_endian
+EXPORT_SYMBOL sound/core/snd-pcm 0x52e3e4a5	snd_pcm_hw_param_value
+EXPORT_SYMBOL sound/core/snd-pcm 0x55766085	snd_pcm_hw_refine
+EXPORT_SYMBOL sound/core/snd-pcm 0x5cad93b1	snd_pcm_open_substream
+EXPORT_SYMBOL sound/core/snd-pcm 0x5e2b6128	snd_pcm_lib_read
+EXPORT_SYMBOL sound/core/snd-pcm 0x5e7f4920	snd_pcm_format_set_silence
+EXPORT_SYMBOL sound/core/snd-pcm 0x650f8603	snd_pcm_format_silence_64
+EXPORT_SYMBOL sound/core/snd-pcm 0x6842ba4c	snd_pcm_lib_readv
+EXPORT_SYMBOL sound/core/snd-pcm 0x68a24153	snd_pcm_format_physical_width
+EXPORT_SYMBOL sound/core/snd-pcm 0x6cfd1c43	snd_pcm_set_sync
+EXPORT_SYMBOL sound/core/snd-pcm 0x6ef8fcd8	snd_pcm_format_linear
+EXPORT_SYMBOL sound/core/snd-pcm 0x6fee2242	snd_pcm_release_substream
+EXPORT_SYMBOL sound/core/snd-pcm 0x738a8da5	snd_pcm_kernel_ioctl
+EXPORT_SYMBOL sound/core/snd-pcm 0x7d219d44	snd_pcm_new
+EXPORT_SYMBOL sound/core/snd-pcm 0x80893f8f	snd_pcm_new_stream
+EXPORT_SYMBOL sound/core/snd-pcm 0x838862b1	snd_pcm_lib_preallocate_pages_for_all
+EXPORT_SYMBOL sound/core/snd-pcm 0x83cc2925	snd_pcm_hw_constraint_list
+EXPORT_SYMBOL sound/core/snd-pcm 0x8ff2bb09	snd_pcm_lib_malloc_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0x9514d28b	snd_pcm_mmap_data
+EXPORT_SYMBOL sound/core/snd-pcm 0x974e9a5e	snd_pcm_notify
+EXPORT_SYMBOL sound/core/snd-pcm 0xa61aa028	snd_pcm_format_unsigned
+EXPORT_SYMBOL sound/core/snd-pcm 0xab3c7536	snd_pcm_hw_constraint_msbits
+EXPORT_SYMBOL sound/core/snd-pcm 0xac1ecbe5	snd_pcm_suspend_all
+EXPORT_SYMBOL sound/core/snd-pcm 0xaec30cce	snd_pcm_hw_constraint_ratnums
+EXPORT_SYMBOL sound/core/snd-pcm 0xb108f990	snd_pcm_suspend
+EXPORT_SYMBOL sound/core/snd-pcm 0xb2219a7e	snd_pcm_lib_ioctl
+EXPORT_SYMBOL sound/core/snd-pcm 0xb2fbe3bd	snd_pcm_hw_constraint_step
+EXPORT_SYMBOL sound/core/snd-pcm 0xb30e210f	snd_pcm_hw_constraint_minmax
+EXPORT_SYMBOL sound/core/snd-pcm 0xb89e889d	snd_pcm_hw_constraint_pow2
+EXPORT_SYMBOL sound/core/snd-pcm 0xb9638db4	snd_pcm_rate_to_rate_bit
+EXPORT_SYMBOL sound/core/snd-pcm 0xc2ff589f	snd_pcm_hw_param_last
+EXPORT_SYMBOL sound/core/snd-pcm 0xccfde388	snd_pcm_link_rwlock
+EXPORT_SYMBOL sound/core/snd-pcm 0xcd284810	snd_pcm_set_ops
+EXPORT_SYMBOL sound/core/snd-pcm 0xd0b9b8b8	snd_interval_list
+EXPORT_SYMBOL sound/core/snd-pcm 0xd13b4235	snd_pcm_period_elapsed
+EXPORT_SYMBOL sound/core/snd-pcm 0xd32fb693	snd_pcm_hw_param_first
+EXPORT_SYMBOL sound/core/snd-pcm 0xd42b0adf	snd_pcm_limit_hw_rates
+EXPORT_SYMBOL sound/core/snd-pcm 0xe3b0d73a	snd_pcm_stop
+EXPORT_SYMBOL sound/core/snd-pcm 0xe51a1c64	snd_pcm_format_size
+EXPORT_SYMBOL sound/core/snd-pcm 0xe56a9336	snd_pcm_format_width
+EXPORT_SYMBOL sound/core/snd-pcm 0xea235376	snd_pcm_lib_preallocate_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0xeeb666b2	snd_pcm_hw_rule_add
+EXPORT_SYMBOL sound/core/snd-pcm 0xf3797152	snd_interval_ratnum
+EXPORT_SYMBOL sound/core/snd-pcm 0xf553a7f6	snd_pcm_lib_mmap_iomem
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x04fdf449	snd_rawmidi_kernel_write
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x1eb64fbd	snd_rawmidi_drop_output
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x1f8ee846	snd_rawmidi_output_params
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x1fedf60e	snd_rawmidi_new
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x35c72f4a	snd_rawmidi_kernel_read
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x3a1042c3	snd_rawmidi_drain_output
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x422517a4	snd_rawmidi_info_select
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x42e50ccc	snd_rawmidi_kernel_open
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x7b85af52	snd_rawmidi_receive
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x8f1b7ee2	snd_rawmidi_transmit_ack
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x92924326	snd_rawmidi_transmit
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xb236331d	snd_rawmidi_transmit_empty
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xbe406e82	snd_rawmidi_drain_input
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xd17fb723	snd_rawmidi_set_ops
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xd3ea6499	snd_rawmidi_input_params
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xdeaf1e21	snd_rawmidi_kernel_release
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xe4a6e5d7	snd_rawmidi_transmit_peek
+EXPORT_SYMBOL sound/core/snd-timer 0x02d18201	snd_timer_close
+EXPORT_SYMBOL sound/core/snd-timer 0x1dd058fd	snd_timer_new
+EXPORT_SYMBOL sound/core/snd-timer 0x20c0868a	snd_timer_continue
+EXPORT_SYMBOL sound/core/snd-timer 0x2f8fe9ca	snd_timer_pause
+EXPORT_SYMBOL sound/core/snd-timer 0x376c4a94	snd_timer_interrupt
+EXPORT_SYMBOL sound/core/snd-timer 0x41fd2ce1	snd_timer_global_register
+EXPORT_SYMBOL sound/core/snd-timer 0x430d664b	snd_timer_stop
+EXPORT_SYMBOL sound/core/snd-timer 0x4bc0fe37	snd_timer_notify
+EXPORT_SYMBOL sound/core/snd-timer 0x4d5dfa28	snd_timer_start
+EXPORT_SYMBOL sound/core/snd-timer 0x4f497d9d	snd_timer_global_new
+EXPORT_SYMBOL sound/core/snd-timer 0x71c87941	snd_timer_resolution
+EXPORT_SYMBOL sound/core/snd-timer 0xe3105ddd	snd_timer_global_free
+EXPORT_SYMBOL sound/core/snd-timer 0xf52ea627	snd_timer_open
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x4bbb7f27	snd_mpu401_uart_interrupt_tx
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xb6a02cc2	snd_mpu401_uart_new
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xc43a3940	snd_mpu401_uart_interrupt
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x05060a19	snd_opl3_regmap
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x28de3867	snd_opl3_load_patch
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x3acfec46	snd_opl3_interrupt
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x574ec185	snd_opl3_find_patch
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x69165265	snd_opl3_new
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x75b7ce77	snd_opl3_hwdep_new
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x9984f6c1	snd_opl3_reset
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xa775ddbf	snd_opl3_init
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xb95aeeac	snd_opl3_create
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xd7c6a7b4	snd_opl3_timer_new
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x1d0b9bcd	snd_vx_check_reg_bit
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x427db049	snd_vx_create
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x84deefc7	snd_vx_suspend
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x99b88ede	snd_vx_irq_handler
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xa781062a	snd_vx_resume
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xa95e7ea8	snd_vx_load_boot_image
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xab0cc86a	snd_vx_setup_firmware
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xb26e2c3c	snd_vx_free_firmware
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xd9b24c1b	snd_vx_dsp_load
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xedb6ee9b	snd_vx_dsp_boot
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x4f711833	snd_ak4114_reg_write
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x93cec34f	snd_ak4114_external_rate
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xec1efb79	snd_ak4114_reinit
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xee77e866	snd_ak4114_build
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xf08b1fc4	snd_ak4114_check_rate_and_errors
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xfeadf89c	snd_ak4114_create
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x1222cfa8	snd_ak4117_reinit
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x19a89043	snd_ak4117_build
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x2931e9be	snd_ak4117_reg_write
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x2b323c2d	snd_ak4117_create
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x9f928fe6	snd_ak4117_check_rate_and_errors
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xe3b45b7e	snd_ak4117_external_rate
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x18e8cd5b	snd_akm4xxx_reset
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x464d4a06	snd_akm4xxx_write
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xd331475c	snd_akm4xxx_init
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xd349b8e2	snd_akm4xxx_build_controls
+EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0x320ab99c	snd_pt2258_reset
+EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0xc09a6400	snd_pt2258_build_controls
+EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0x28343891	snd_tea575x_init
+EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0xd893d8ef	snd_tea575x_exit
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x2ea19107	snd_cs8427_reg_write
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x5d019e56	snd_cs8427_iec958_build
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x6018d9a4	snd_cs8427_iec958_pcm
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x9d0e8c17	snd_cs8427_create
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0xcd6fcde1	snd_cs8427_iec958_active
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x3805d718	snd_i2c_readbytes
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x59795c90	snd_i2c_bus_create
+EXPORT_SYMBOL sound/i2c/snd-i2c 0xbd7665ce	snd_i2c_probeaddr
+EXPORT_SYMBOL sound/i2c/snd-i2c 0xbe7cfd99	snd_i2c_device_create
+EXPORT_SYMBOL sound/i2c/snd-i2c 0xdbb4c9e2	snd_i2c_device_free
+EXPORT_SYMBOL sound/i2c/snd-i2c 0xeaf11e6c	snd_i2c_sendbytes
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x0e84e012	snd_sbmixer_resume
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x345e25e3	snd_sbmixer_read
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x35b06602	snd_sbdsp_get_byte
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x372a5a03	snd_sbmixer_add_ctl
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x590c3146	snd_sbdsp_create
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x9eeccc1f	snd_sbdsp_command
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xcfd12c74	snd_sbmixer_new
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xe6dca8aa	snd_sbmixer_write
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xf8e4f6fd	snd_sbmixer_suspend
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xfca5a574	snd_sbdsp_reset
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0x6b366561	snd_sb16dsp_pcm
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0x8920f2f6	snd_sb16dsp_get_pcm_ops
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xb13c12cb	snd_sb16dsp_configure
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xc57f5b54	snd_sb16dsp_interrupt
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x071c85bc	snd_ac97_pcm_open
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x10745d7c	snd_ac97_pcm_assign
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x15465e51	snd_ac97_mixer
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x4805b910	snd_ac97_write_cache
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x4fae0c50	snd_ac97_set_rate
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x6f844a76	snd_ac97_tune_hardware
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x7b46070e	snd_ac97_get_short_name
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x8a24d8d6	snd_ac97_pcm_close
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x8a3ae444	snd_ac97_resume
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x90562719	snd_ac97_pcm_double_rate_rules
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x97db629a	snd_ac97_bus
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x97e628b3	snd_ac97_read
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x9ce7e41f	snd_ac97_update_bits
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xa69774d2	snd_ac97_write
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xaa810cf0	snd_ac97_suspend
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xe1f98ffc	snd_ac97_update_power
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xedf17aba	snd_ac97_update
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x1533fbe7	snd_emu10k1_voice_free
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x1af5e121	snd_emu10k1_memblk_map
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x32c5dfc0	snd_emu10k1_synth_alloc
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x53193141	snd_emu10k1_voice_alloc
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x84979aac	snd_emu10k1_synth_free
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xa10e8f4a	snd_emu10k1_synth_copy_from_user
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xaa1debdc	snd_emu10k1_synth_bzero
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xaf22ab15	snd_emu10k1_ptr_write
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xb23ec70a	snd_emu10k1_ptr_read
+EXPORT_SYMBOL sound/pci/hda/snd-hda-codec 0x9fc194eb	snd_hda_parse_generic_codec
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x1688cec7	snd_ice1712_akm4xxx_init
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x5c60adfd	snd_ice1712_akm4xxx_free
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x6aedb867	snd_ice1712_akm4xxx_build_controls
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x239d9ed5	snd_trident_stop_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x51f21d58	snd_trident_start_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x67b43f7a	snd_trident_write_voice_regs
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0xd3273fe0	snd_trident_alloc_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0xe338e8fc	snd_trident_free_voice
+EXPORT_SYMBOL sound/soc/codecs/snd-soc-uda134x 0x8a1523da	uda134x_dai
+EXPORT_SYMBOL sound/sound_firmware 0x39e3dd23	mod_firmware_load
+EXPORT_SYMBOL sound/soundcore 0x269c9e58	register_sound_special
+EXPORT_SYMBOL sound/soundcore 0x660ca130	register_sound_dsp
+EXPORT_SYMBOL sound/soundcore 0x698e12ce	register_sound_special_device
+EXPORT_SYMBOL sound/soundcore 0x7afc9d8a	unregister_sound_mixer
+EXPORT_SYMBOL sound/soundcore 0x99c95fa5	unregister_sound_special
+EXPORT_SYMBOL sound/soundcore 0xc955158b	register_sound_midi
+EXPORT_SYMBOL sound/soundcore 0xcd083b10	unregister_sound_dsp
+EXPORT_SYMBOL sound/soundcore 0xe4dda37e	sound_class
+EXPORT_SYMBOL sound/soundcore 0xe5e02d9f	register_sound_mixer
+EXPORT_SYMBOL sound/soundcore 0xfdab6de3	unregister_sound_midi
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x4830d76b	snd_emux_new
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x4a26c0f9	snd_emux_free
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x655cb202	snd_sf_linear_to_log
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x83947c0d	snd_emux_unlock_voice
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xa765ada6	snd_emux_register
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xb5c0e204	snd_emux_lock_voice
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xde805752	snd_emux_terminate_all
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x521d3d5e	snd_util_memhdr_free
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x5fe1e32a	snd_util_mem_avail
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x7c66af6e	snd_util_memhdr_new
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x8582d0b0	__snd_util_memblk_new
+EXPORT_SYMBOL sound/synth/snd-util-mem 0xa0f291b0	__snd_util_mem_free
+EXPORT_SYMBOL sound/synth/snd-util-mem 0xbc98fb0f	snd_util_mem_free
+EXPORT_SYMBOL sound/synth/snd-util-mem 0xc4429069	snd_util_mem_alloc
+EXPORT_SYMBOL sound/synth/snd-util-mem 0xfefec7e2	__snd_util_mem_alloc
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0x16756dc0	snd_usbmidi_input_start
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0x63343b1d	snd_usbmidi_input_stop
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0xb864090c	snd_usb_create_midi_interface
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0xd9d2bb03	snd_usbmidi_disconnect
+EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x04dca738	lirc_unregister_driver
+EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0xb3cf210f	lirc_register_driver
+EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0xb48ca2a0	lirc_get_pdata
+EXPORT_SYMBOL vmlinux 0x00000000	per_cpu__softirq_work_list
+EXPORT_SYMBOL vmlinux 0x000f3af8	filemap_write_and_wait
+EXPORT_SYMBOL vmlinux 0x003f6c35	cancel_dirty_page
+EXPORT_SYMBOL vmlinux 0x005a4975	cpu_possible_mask
+EXPORT_SYMBOL vmlinux 0x006568bd	dev_mc_sync
+EXPORT_SYMBOL vmlinux 0x00801678	flush_scheduled_work
+EXPORT_SYMBOL vmlinux 0x0097902a	tcp_setsockopt
+EXPORT_SYMBOL vmlinux 0x00ab5824	update_region
+EXPORT_SYMBOL vmlinux 0x00c4dc87	timecounter_init
+EXPORT_SYMBOL vmlinux 0x00ededfc	do_munmap
+EXPORT_SYMBOL vmlinux 0x01000e51	schedule
+EXPORT_SYMBOL vmlinux 0x01136447	skb_tx_hash
+EXPORT_SYMBOL vmlinux 0x01168b91	seq_open
+EXPORT_SYMBOL vmlinux 0x0121a5e1	eth_mac_addr
+EXPORT_SYMBOL vmlinux 0x0122f95e	_lv1_get_spe_irq_outlet
+EXPORT_SYMBOL vmlinux 0x0151ae4f	of_get_parent
+EXPORT_SYMBOL vmlinux 0x015c95be	register_netdevice
+EXPORT_SYMBOL vmlinux 0x015f4a1e	splice_from_pipe_next
+EXPORT_SYMBOL vmlinux 0x0169c73f	compat_mc_setsockopt
+EXPORT_SYMBOL vmlinux 0x018d9919	_lv1_set_lpm_interrupt_mask
+EXPORT_SYMBOL vmlinux 0x01902adf	netpoll_trap
+EXPORT_SYMBOL vmlinux 0x0194d356	dev_alloc_name
+EXPORT_SYMBOL vmlinux 0x01a27b74	filp_open
+EXPORT_SYMBOL vmlinux 0x01a2ade5	get_sb_pseudo
+EXPORT_SYMBOL vmlinux 0x01a4aab6	set_irq_chip_data
+EXPORT_SYMBOL vmlinux 0x01b6bde4	udp_flush_pending_frames
+EXPORT_SYMBOL vmlinux 0x020bf27b	pci_get_bus_and_slot
+EXPORT_SYMBOL vmlinux 0x020d18d7	_lv1_set_lpm_debug_bus_control
+EXPORT_SYMBOL vmlinux 0x0250f6ca	blk_alloc_queue_node
+EXPORT_SYMBOL vmlinux 0x02649054	security_sock_rcv_skb
+EXPORT_SYMBOL vmlinux 0x027d5499	_lv1_did_update_interrupt_mask
+EXPORT_SYMBOL vmlinux 0x027ef72f	tcf_em_unregister
+EXPORT_SYMBOL vmlinux 0x027f25b3	single_release
+EXPORT_SYMBOL vmlinux 0x0284b451	mb_cache_entry_free
+EXPORT_SYMBOL vmlinux 0x028d62f7	dma_spin_lock
+EXPORT_SYMBOL vmlinux 0x02a6ce5a	crc16_table
+EXPORT_SYMBOL vmlinux 0x02ac1b76	of_node_get
+EXPORT_SYMBOL vmlinux 0x02be6f81	block_write_full_page_endio
+EXPORT_SYMBOL vmlinux 0x02c412b8	tty_write_room
+EXPORT_SYMBOL vmlinux 0x02ca8dc4	ip_xfrm_me_harder
+EXPORT_SYMBOL vmlinux 0x02d81845	audit_log_task_context
+EXPORT_SYMBOL vmlinux 0x02e7116f	mod_zone_page_state
+EXPORT_SYMBOL vmlinux 0x02fd769f	kobject_set_name
+EXPORT_SYMBOL vmlinux 0x02ff140b	compat_mc_getsockopt
+EXPORT_SYMBOL vmlinux 0x031dc65e	pasemi_dma_free_chan
+EXPORT_SYMBOL vmlinux 0x03288811	swiotlb_dma_mapping_error
+EXPORT_SYMBOL vmlinux 0x032db3e2	i2c_release_client
+EXPORT_SYMBOL vmlinux 0x0334da4e	scsi_command_size_tbl
+EXPORT_SYMBOL vmlinux 0x033de027	end_buffer_async_write
+EXPORT_SYMBOL vmlinux 0x0340e0ae	schedule_delayed_work
+EXPORT_SYMBOL vmlinux 0x034adfe4	tty_devnum
+EXPORT_SYMBOL vmlinux 0x0373a5e6	node_data
+EXPORT_SYMBOL vmlinux 0x037a0cba	kfree
+EXPORT_SYMBOL vmlinux 0x03c06156	bitmap_fold
+EXPORT_SYMBOL vmlinux 0x03dfee49	pci_unmap_rom
+EXPORT_SYMBOL vmlinux 0x03e10f7d	tty_port_hangup
+EXPORT_SYMBOL vmlinux 0x03fd2571	vm_unmap_ram
+EXPORT_SYMBOL vmlinux 0x04074f48	ioremap
+EXPORT_SYMBOL vmlinux 0x0416e29f	scsi_init_io
+EXPORT_SYMBOL vmlinux 0x04209cbf	blk_queue_max_segment_size
+EXPORT_SYMBOL vmlinux 0x0422fe4a	inet_csk_timer_bug_msg
+EXPORT_SYMBOL vmlinux 0x042f4525	flush_dcache_page
+EXPORT_SYMBOL vmlinux 0x043ea7e7	i2c_bit_add_bus
+EXPORT_SYMBOL vmlinux 0x0440a533	_lv1_net_remove_multicast_address
+EXPORT_SYMBOL vmlinux 0x045d1af2	llc_sap_find
+EXPORT_SYMBOL vmlinux 0x0487f831	fb_find_best_display
+EXPORT_SYMBOL vmlinux 0x048a2030	i2c_smbus_xfer
+EXPORT_SYMBOL vmlinux 0x04a1c929	ide_dump_status
+EXPORT_SYMBOL vmlinux 0x04b51659	zero_fill_bio
+EXPORT_SYMBOL vmlinux 0x04bfb926	security_path_mknod
+EXPORT_SYMBOL vmlinux 0x04d2aa20	pci_pme_active
+EXPORT_SYMBOL vmlinux 0x04d8085e	inode_set_bytes
+EXPORT_SYMBOL vmlinux 0x0500c84c	hippi_change_mtu
+EXPORT_SYMBOL vmlinux 0x05240ee7	percpu_counter_batch
+EXPORT_SYMBOL vmlinux 0x053491a8	scsi_remove_target
+EXPORT_SYMBOL vmlinux 0x054f4af4	__scsi_iterate_devices
+EXPORT_SYMBOL vmlinux 0x0550b71a	i2c_use_client
+EXPORT_SYMBOL vmlinux 0x057ad4ef	security_d_instantiate
+EXPORT_SYMBOL vmlinux 0x0597a91e	tcp_read_sock
+EXPORT_SYMBOL vmlinux 0x05a514a1	_insl_ns
+EXPORT_SYMBOL vmlinux 0x05b4e835	gen_pool_destroy
+EXPORT_SYMBOL vmlinux 0x05f05a4c	vc_cons
+EXPORT_SYMBOL vmlinux 0x0600f211	buffer_migrate_page
+EXPORT_SYMBOL vmlinux 0x060b87da	register_8022_client
+EXPORT_SYMBOL vmlinux 0x061651be	strcat
+EXPORT_SYMBOL vmlinux 0x06619a88	register_filesystem
+EXPORT_SYMBOL vmlinux 0x067c1e19	key_link
+EXPORT_SYMBOL vmlinux 0x067d8d35	security_release_secctx
+EXPORT_SYMBOL vmlinux 0x068af119	kmem_cache_alloc_node
+EXPORT_SYMBOL vmlinux 0x068b094f	blk_rq_unmap_user
+EXPORT_SYMBOL vmlinux 0x0691c62b	linkwatch_fire_event
+EXPORT_SYMBOL vmlinux 0x06a485f2	__krealloc
+EXPORT_SYMBOL vmlinux 0x06b23196	security_inode_readlink
+EXPORT_SYMBOL vmlinux 0x06b2c8c5	set_irq_chip
+EXPORT_SYMBOL vmlinux 0x06c36e2d	unregister_exec_domain
+EXPORT_SYMBOL vmlinux 0x06d6b084	neigh_lookup_nodev
+EXPORT_SYMBOL vmlinux 0x06e9d477	load_nls
+EXPORT_SYMBOL vmlinux 0x06ef0ef2	blk_execute_rq
+EXPORT_SYMBOL vmlinux 0x06f8c89e	proc_mkdir
+EXPORT_SYMBOL vmlinux 0x06fe3b14	default_grn
+EXPORT_SYMBOL vmlinux 0x070cbf01	ps2_handle_ack
+EXPORT_SYMBOL vmlinux 0x0727c4f3	iowrite8
+EXPORT_SYMBOL vmlinux 0x0745f63d	compat_sock_get_timestamp
+EXPORT_SYMBOL vmlinux 0x07527e0d	__kfifo_get
+EXPORT_SYMBOL vmlinux 0x0761f5b6	tcp_sendmsg
+EXPORT_SYMBOL vmlinux 0x0769d88c	genphy_resume
+EXPORT_SYMBOL vmlinux 0x077430b6	dm_kcopyd_client_create
+EXPORT_SYMBOL vmlinux 0x07778f28	bio_integrity_alloc
+EXPORT_SYMBOL vmlinux 0x0799aca4	local_bh_enable
+EXPORT_SYMBOL vmlinux 0x0799c50a	param_set_ulong
+EXPORT_SYMBOL vmlinux 0x07a890c8	fb_alloc_cmap
+EXPORT_SYMBOL vmlinux 0x07af909e	netif_notify_peers
+EXPORT_SYMBOL vmlinux 0x07c1e271	sock_get_timestampns
+EXPORT_SYMBOL vmlinux 0x07cc4a5d	printk_timed_ratelimit
+EXPORT_SYMBOL vmlinux 0x07d89a34	release_firmware
+EXPORT_SYMBOL vmlinux 0x07d9b783	scsi_nl_send_vendor_msg
+EXPORT_SYMBOL vmlinux 0x07ef213a	pasemi_dma_free_fun
+EXPORT_SYMBOL vmlinux 0x07f8ee15	_lv1_unmap_device_dma_region
+EXPORT_SYMBOL vmlinux 0x0801f40f	ip_mc_rejoin_group
+EXPORT_SYMBOL vmlinux 0x082c3213	pci_root_buses
+EXPORT_SYMBOL vmlinux 0x084c08ee	security_path_rename
+EXPORT_SYMBOL vmlinux 0x08819915	make_bad_inode
+EXPORT_SYMBOL vmlinux 0x089e5b6c	__init_rwsem
+EXPORT_SYMBOL vmlinux 0x08a64e7c	kfifo_free
+EXPORT_SYMBOL vmlinux 0x08b855c1	path_put
+EXPORT_SYMBOL vmlinux 0x08c59daa	wireless_send_event
+EXPORT_SYMBOL vmlinux 0x08d827a7	balance_dirty_pages_ratelimited_nr
+EXPORT_SYMBOL vmlinux 0x08e1e5f6	dm_io_client_resize
+EXPORT_SYMBOL vmlinux 0x08ed0b62	mac_vmode_to_var
+EXPORT_SYMBOL vmlinux 0x0907f744	blk_alloc_queue
+EXPORT_SYMBOL vmlinux 0x09328b34	make_EII_client
+EXPORT_SYMBOL vmlinux 0x09479633	dma_pool_create
+EXPORT_SYMBOL vmlinux 0x09479c65	scsi_register_interface
+EXPORT_SYMBOL vmlinux 0x0948cde9	num_physpages
+EXPORT_SYMBOL vmlinux 0x0955a325	journal_set_features
+EXPORT_SYMBOL vmlinux 0x0962960d	pci_set_dma_mask
+EXPORT_SYMBOL vmlinux 0x0962f68d	unregister_nls
+EXPORT_SYMBOL vmlinux 0x096341c2	_lv1_connect_irq_plug_ext
+EXPORT_SYMBOL vmlinux 0x097edb6c	journal_get_create_access
+EXPORT_SYMBOL vmlinux 0x0985da55	_read_lock_irqsave
+EXPORT_SYMBOL vmlinux 0x098b71c6	fb_dealloc_cmap
+EXPORT_SYMBOL vmlinux 0x09c55cec	schedule_timeout_interruptible
+EXPORT_SYMBOL vmlinux 0x09c8eb55	font_vga_8x16
+EXPORT_SYMBOL vmlinux 0x09d44df9	in_lock_functions
+EXPORT_SYMBOL vmlinux 0x09ea48f5	sk_wait_data
+EXPORT_SYMBOL vmlinux 0x0a00a260	tcp_timewait_state_process
+EXPORT_SYMBOL vmlinux 0x0a2487e0	unblock_all_signals
+EXPORT_SYMBOL vmlinux 0x0a3132aa	serio_close
+EXPORT_SYMBOL vmlinux 0x0a3d0644	cpu_online_mask
+EXPORT_SYMBOL vmlinux 0x0a5acd0f	con_copy_unimap
+EXPORT_SYMBOL vmlinux 0x0a698076	gen_pool_free
+EXPORT_SYMBOL vmlinux 0x0a8243dc	scsi_command_normalize_sense
+EXPORT_SYMBOL vmlinux 0x0a8d9d8a	blk_dump_rq_flags
+EXPORT_SYMBOL vmlinux 0x0a9f892f	swiotlb_map_sg_attrs
+EXPORT_SYMBOL vmlinux 0x0aa36d62	macio_dev_put
+EXPORT_SYMBOL vmlinux 0x0ab8b872	sock_no_mmap
+EXPORT_SYMBOL vmlinux 0x0ac5aeed	blkdev_put
+EXPORT_SYMBOL vmlinux 0x0acb1a3c	__bitmap_shift_right
+EXPORT_SYMBOL vmlinux 0x0acf0963	key_payload_reserve
+EXPORT_SYMBOL vmlinux 0x0ad7c2d4	seq_read
+EXPORT_SYMBOL vmlinux 0x0ae7bfff	elv_rq_merge_ok
+EXPORT_SYMBOL vmlinux 0x0b074b89	kmem_cache_shrink
+EXPORT_SYMBOL vmlinux 0x0b1beb31	vmalloc_32_user
+EXPORT_SYMBOL vmlinux 0x0b37926b	clear_bdi_congested
+EXPORT_SYMBOL vmlinux 0x0b3ad4c1	scsi_block_when_processing_errors
+EXPORT_SYMBOL vmlinux 0x0b4cdaba	kernel_sendpage
+EXPORT_SYMBOL vmlinux 0x0b742fd7	simple_strtol
+EXPORT_SYMBOL vmlinux 0x0bb058eb	scsi_host_get
+EXPORT_SYMBOL vmlinux 0x0beff593	pci_read_vpd
+EXPORT_SYMBOL vmlinux 0x0c0452b9	check_disk_change
+EXPORT_SYMBOL vmlinux 0x0c18fabe	pci_vpd_truncate
+EXPORT_SYMBOL vmlinux 0x0c1ad162	_lv1_net_start_rx_dma
+EXPORT_SYMBOL vmlinux 0x0c65e73c	scsi_normalize_sense
+EXPORT_SYMBOL vmlinux 0x0c7e6ebe	skb_find_text
+EXPORT_SYMBOL vmlinux 0x0c7fab18	add_timer
+EXPORT_SYMBOL vmlinux 0x0c8c9e99	scsi_show_extd_sense
+EXPORT_SYMBOL vmlinux 0x0ca0538f	fb_set_cmap
+EXPORT_SYMBOL vmlinux 0x0cae232b	utf16s_to_utf8s
+EXPORT_SYMBOL vmlinux 0x0d119436	mnt_pin
+EXPORT_SYMBOL vmlinux 0x0d15d86d	otg_set_transceiver
+EXPORT_SYMBOL vmlinux 0x0d1cba56	user_revoke
+EXPORT_SYMBOL vmlinux 0x0d542439	__ipv6_addr_type
+EXPORT_SYMBOL vmlinux 0x0d6c963c	copy_from_user
+EXPORT_SYMBOL vmlinux 0x0d6d0093	sock_register
+EXPORT_SYMBOL vmlinux 0x0d99f26f	commit_creds
+EXPORT_SYMBOL vmlinux 0x0da10ec3	security_sock_graft
+EXPORT_SYMBOL vmlinux 0x0dbd2d6e	__dec_zone_page_state
+EXPORT_SYMBOL vmlinux 0x0ddb7691	disk_stack_limits
+EXPORT_SYMBOL vmlinux 0x0de66882	bdi_unregister
+EXPORT_SYMBOL vmlinux 0x0df15005	_spin_unlock_irqrestore
+EXPORT_SYMBOL vmlinux 0x0e024752	cdrom_number_of_slots
+EXPORT_SYMBOL vmlinux 0x0e2308aa	tcp_md5_hash_header
+EXPORT_SYMBOL vmlinux 0x0e299f08	tcp_proc_register
+EXPORT_SYMBOL vmlinux 0x0e3874f8	__skb_checksum_complete
+EXPORT_SYMBOL vmlinux 0x0e52592a	panic
+EXPORT_SYMBOL vmlinux 0x0e667c81	compat_tcp_setsockopt
+EXPORT_SYMBOL vmlinux 0x0e89c1eb	bio_pair_release
+EXPORT_SYMBOL vmlinux 0x0e910a8a	dev_mc_delete
+EXPORT_SYMBOL vmlinux 0x0eaea873	get_write_access
+EXPORT_SYMBOL vmlinux 0x0ed10749	scsi_cmd_ioctl
+EXPORT_SYMBOL vmlinux 0x0ed7fa48	lock_fb_info
+EXPORT_SYMBOL vmlinux 0x0ef22ade	remove_wait_queue
+EXPORT_SYMBOL vmlinux 0x0f08084d	genl_register_family_with_ops
+EXPORT_SYMBOL vmlinux 0x0f0898ef	security_inode_notifysecctx
+EXPORT_SYMBOL vmlinux 0x0f1ef871	posix_acl_alloc
+EXPORT_SYMBOL vmlinux 0x0f3182c4	tcp_v4_remember_stamp
+EXPORT_SYMBOL vmlinux 0x0f3d9ef7	__kfifo_put
+EXPORT_SYMBOL vmlinux 0x0f5738c2	page_symlink
+EXPORT_SYMBOL vmlinux 0x0f57d5ae	_read_unlock_bh
+EXPORT_SYMBOL vmlinux 0x0f5b4fe4	inet_frag_find
+EXPORT_SYMBOL vmlinux 0x0f6a01a4	netdev_state_change
+EXPORT_SYMBOL vmlinux 0x0f9bced4	dev_unicast_unsync
+EXPORT_SYMBOL vmlinux 0x0fa9f783	cdev_alloc
+EXPORT_SYMBOL vmlinux 0x0fafc9b5	xfrm4_rcv
+EXPORT_SYMBOL vmlinux 0x0fbbeaf9	simple_write_end
+EXPORT_SYMBOL vmlinux 0x0fc5e8eb	radix_tree_gang_lookup_slot
+EXPORT_SYMBOL vmlinux 0x0fce48bb	inet_getname
+EXPORT_SYMBOL vmlinux 0x0fd9c2f1	__napi_complete
+EXPORT_SYMBOL vmlinux 0x0fdc2ffb	pci_choose_state
+EXPORT_SYMBOL vmlinux 0x0fe6a139	__neigh_for_each_release
+EXPORT_SYMBOL vmlinux 0x1015bbb9	clear_user_page
+EXPORT_SYMBOL vmlinux 0x10288b48	netlink_kernel_release
+EXPORT_SYMBOL vmlinux 0x102cc650	vga_put
+EXPORT_SYMBOL vmlinux 0x10437920	serio_unregister_child_port
+EXPORT_SYMBOL vmlinux 0x105e2727	__tracepoint_kmalloc
+EXPORT_SYMBOL vmlinux 0x107651b9	pci_disable_msi
+EXPORT_SYMBOL vmlinux 0x108e8985	param_get_uint
+EXPORT_SYMBOL vmlinux 0x10b1406b	per_cpu____irq_regs
+EXPORT_SYMBOL vmlinux 0x10ee20bb	default_blu
+EXPORT_SYMBOL vmlinux 0x10f5a375	sock_setsockopt
+EXPORT_SYMBOL vmlinux 0x1122252b	input_filter_device
+EXPORT_SYMBOL vmlinux 0x11267875	scsi_extd_sense_format
+EXPORT_SYMBOL vmlinux 0x112f5a2f	sock_create
+EXPORT_SYMBOL vmlinux 0x113d93d2	touch_atime
+EXPORT_SYMBOL vmlinux 0x11410bff	wait_on_page_bit
+EXPORT_SYMBOL vmlinux 0x114ed1ce	schedule_work_on
+EXPORT_SYMBOL vmlinux 0x115a16ee	dma_iommu_ops
+EXPORT_SYMBOL vmlinux 0x1163f0a7	blk_max_low_pfn
+EXPORT_SYMBOL vmlinux 0x116f91fb	ethtool_op_get_tso
+EXPORT_SYMBOL vmlinux 0x117093be	qdisc_class_hash_init
+EXPORT_SYMBOL vmlinux 0x1171b635	_lv1_delete_lpm_event_bookmark
+EXPORT_SYMBOL vmlinux 0x118f01ea	putname
+EXPORT_SYMBOL vmlinux 0x11a41041	_write_lock_irqsave
+EXPORT_SYMBOL vmlinux 0x11a57044	module_layout
+EXPORT_SYMBOL vmlinux 0x11cb0048	truncate_pagecache
+EXPORT_SYMBOL vmlinux 0x11e1b2c5	of_device_unregister
+EXPORT_SYMBOL vmlinux 0x12048f5a	of_device_alloc
+EXPORT_SYMBOL vmlinux 0x1215d1be	tty_port_raise_dtr_rts
+EXPORT_SYMBOL vmlinux 0x121711a4	ilookup5_nowait
+EXPORT_SYMBOL vmlinux 0x1224aa36	i2c_smbus_read_word_data
+EXPORT_SYMBOL vmlinux 0x12312db8	vfs_get_dqinfo
+EXPORT_SYMBOL vmlinux 0x125c5998	sk_stream_wait_memory
+EXPORT_SYMBOL vmlinux 0x1283e688	da903x_query_status
+EXPORT_SYMBOL vmlinux 0x1286a366	compat_nf_setsockopt
+EXPORT_SYMBOL vmlinux 0x12c7b1a1	dm_put_device
+EXPORT_SYMBOL vmlinux 0x12cb6622	_lv1_map_device_dma_region
+EXPORT_SYMBOL vmlinux 0x12dca040	pci_bus_add_devices
+EXPORT_SYMBOL vmlinux 0x12e5ef0c	rtas_set_power_level
+EXPORT_SYMBOL vmlinux 0x12f0dba7	dquot_alloc_space
+EXPORT_SYMBOL vmlinux 0x12f78780	of_phy_connect_fixed_link
+EXPORT_SYMBOL vmlinux 0x12f98706	kernel_setsockopt
+EXPORT_SYMBOL vmlinux 0x12ff0ac4	init_net
+EXPORT_SYMBOL vmlinux 0x13057ae6	tcf_hash_check
+EXPORT_SYMBOL vmlinux 0x1322234e	skb_dma_map
+EXPORT_SYMBOL vmlinux 0x133ca320	register_quota_format
+EXPORT_SYMBOL vmlinux 0x133da912	tty_chars_in_buffer
+EXPORT_SYMBOL vmlinux 0x136dd610	matroxfb_g450_connect
+EXPORT_SYMBOL vmlinux 0x1373e0d7	inet_csk_delete_keepalive_timer
+EXPORT_SYMBOL vmlinux 0x137d2ced	cdrom_mode_sense
+EXPORT_SYMBOL vmlinux 0x1385e0ac	dquot_drop
+EXPORT_SYMBOL vmlinux 0x1395b3f2	splice_direct_to_actor
+EXPORT_SYMBOL vmlinux 0x13bcbdbf	should_remove_suid
+EXPORT_SYMBOL vmlinux 0x13c4eb6f	kobject_init
+EXPORT_SYMBOL vmlinux 0x13d49665	tcp_poll
+EXPORT_SYMBOL vmlinux 0x13dcc670	cdrom_media_changed
+EXPORT_SYMBOL vmlinux 0x13f42152	system_entering_hibernation
+EXPORT_SYMBOL vmlinux 0x13f53da6	CMO_PageSize
+EXPORT_SYMBOL vmlinux 0x14044bed	rtnl_unicast
+EXPORT_SYMBOL vmlinux 0x141fe5fd	pasemi_read_iob_reg
+EXPORT_SYMBOL vmlinux 0x1430ae27	tcf_exts_dump_stats
+EXPORT_SYMBOL vmlinux 0x143a2f59	phy_device_free
+EXPORT_SYMBOL vmlinux 0x143f3322	per_cpu__cpu_core_map
+EXPORT_SYMBOL vmlinux 0x14605c34	tty_port_carrier_raised
+EXPORT_SYMBOL vmlinux 0x1467a54d	mb_cache_shrink
+EXPORT_SYMBOL vmlinux 0x147f34b5	devm_ioremap
+EXPORT_SYMBOL vmlinux 0x148eb173	sock_no_connect
+EXPORT_SYMBOL vmlinux 0x14e31e59	jbd2_journal_set_triggers
+EXPORT_SYMBOL vmlinux 0x14f25810	input_set_capability
+EXPORT_SYMBOL vmlinux 0x150b4737	dev_addr_del
+EXPORT_SYMBOL vmlinux 0x151592c4	_lv1_invalidate_htab_entries
+EXPORT_SYMBOL vmlinux 0x1551dc51	bitmap_find_free_region
+EXPORT_SYMBOL vmlinux 0x15678acf	xfrm_state_lookup_byaddr
+EXPORT_SYMBOL vmlinux 0x15739712	ps2_drain
+EXPORT_SYMBOL vmlinux 0x1577f93e	prepare_binprm
+EXPORT_SYMBOL vmlinux 0x15c3bac0	cpufreq_global_kobject
+EXPORT_SYMBOL vmlinux 0x15df36a8	nf_ct_attach
+EXPORT_SYMBOL vmlinux 0x15e50e7b	sock_no_sendpage
+EXPORT_SYMBOL vmlinux 0x15ed95d3	_read_lock
+EXPORT_SYMBOL vmlinux 0x16037f8f	scsi_setup_blk_pc_cmnd
+EXPORT_SYMBOL vmlinux 0x160bd45c	rtas_token
+EXPORT_SYMBOL vmlinux 0x160e3e5a	scsi_track_queue_full
+EXPORT_SYMBOL vmlinux 0x161554df	netdev_bonding_change
+EXPORT_SYMBOL vmlinux 0x16250200	_atomic_dec_and_lock
+EXPORT_SYMBOL vmlinux 0x163c5e39	twl4030_i2c_read
+EXPORT_SYMBOL vmlinux 0x164a5452	phy_start_aneg
+EXPORT_SYMBOL vmlinux 0x165d5758	con_is_bound
+EXPORT_SYMBOL vmlinux 0x165f577a	inet_select_addr
+EXPORT_SYMBOL vmlinux 0x166363c6	flock_lock_file_wait
+EXPORT_SYMBOL vmlinux 0x166376e0	simple_unlink
+EXPORT_SYMBOL vmlinux 0x16a8ad8e	unmap_mapping_range
+EXPORT_SYMBOL vmlinux 0x16a9dcb6	xfrm_register_mode
+EXPORT_SYMBOL vmlinux 0x16ac6ba0	jbd2_journal_release_buffer
+EXPORT_SYMBOL vmlinux 0x16cc50fa	sock_no_poll
+EXPORT_SYMBOL vmlinux 0x16db4f36	skb_gso_segment
+EXPORT_SYMBOL vmlinux 0x171401d9	netlink_ack
+EXPORT_SYMBOL vmlinux 0x1724886d	__nla_put_nohdr
+EXPORT_SYMBOL vmlinux 0x173a602a	xrlim_allow
+EXPORT_SYMBOL vmlinux 0x173eece5	register_console
+EXPORT_SYMBOL vmlinux 0x1743414f	__debugger_fault_handler
+EXPORT_SYMBOL vmlinux 0x1743d827	dev_open
+EXPORT_SYMBOL vmlinux 0x177ba22f	inc_zone_page_state
+EXPORT_SYMBOL vmlinux 0x177dca6e	pci_clear_mwi
+EXPORT_SYMBOL vmlinux 0x1793e344	tty_wait_until_sent
+EXPORT_SYMBOL vmlinux 0x179ec4b8	dcache_lock
+EXPORT_SYMBOL vmlinux 0x17b375cb	netpoll_cleanup
+EXPORT_SYMBOL vmlinux 0x17c85a66	radix_tree_tagged
+EXPORT_SYMBOL vmlinux 0x17cb8c79	_lv1_read_htab_entries
+EXPORT_SYMBOL vmlinux 0x17d8876e	blk_end_request
+EXPORT_SYMBOL vmlinux 0x17df17bc	sysctl_tcp_ecn
+EXPORT_SYMBOL vmlinux 0x17ebeb8c	revalidate_disk
+EXPORT_SYMBOL vmlinux 0x17f341a0	i8042_lock_chip
+EXPORT_SYMBOL vmlinux 0x1806e171	ethtool_op_set_tx_csum
+EXPORT_SYMBOL vmlinux 0x180c1536	generic_file_mmap
+EXPORT_SYMBOL vmlinux 0x182f50af	_lv1_open_device
+EXPORT_SYMBOL vmlinux 0x1830b99b	xfrm_policy_byid
+EXPORT_SYMBOL vmlinux 0x1831af6b	unregister_netdev
+EXPORT_SYMBOL vmlinux 0x183fa88b	mempool_alloc_slab
+EXPORT_SYMBOL vmlinux 0x185b7dd6	_lv1_modify_repository_node_value
+EXPORT_SYMBOL vmlinux 0x186e41d9	abort_creds
+EXPORT_SYMBOL vmlinux 0x189b6bac	memory_read_from_buffer
+EXPORT_SYMBOL vmlinux 0x18ae863c	pcim_iounmap
+EXPORT_SYMBOL vmlinux 0x18b3a035	seq_putc
+EXPORT_SYMBOL vmlinux 0x18c30adb	skb_add_rx_frag
+EXPORT_SYMBOL vmlinux 0x18c98205	_lv1_destruct_virtual_address_space
+EXPORT_SYMBOL vmlinux 0x18d46142	sock_alloc_send_skb
+EXPORT_SYMBOL vmlinux 0x18e8401d	proc_dointvec_jiffies
+EXPORT_SYMBOL vmlinux 0x1900a8fa	pci_request_region
+EXPORT_SYMBOL vmlinux 0x192a8db0	d_lookup
+EXPORT_SYMBOL vmlinux 0x19391763	iov_iter_fault_in_readable
+EXPORT_SYMBOL vmlinux 0x194783be	ida_pre_get
+EXPORT_SYMBOL vmlinux 0x1976bc16	__tracepoint_kmem_cache_free
+EXPORT_SYMBOL vmlinux 0x198e9fd2	pci_request_selected_regions
+EXPORT_SYMBOL vmlinux 0x199ed0cd	net_disable_timestamp
+EXPORT_SYMBOL vmlinux 0x19a425f2	__bio_clone
+EXPORT_SYMBOL vmlinux 0x19b28953	skb_copy
+EXPORT_SYMBOL vmlinux 0x19c968d1	pasemi_dma_start_chan
+EXPORT_SYMBOL vmlinux 0x19cbb4b5	down_timeout
+EXPORT_SYMBOL vmlinux 0x19d98794	kmalloc_caches
+EXPORT_SYMBOL vmlinux 0x19dabb88	inet_sock_destruct
+EXPORT_SYMBOL vmlinux 0x19e7fffd	qdisc_tree_decrease_qlen
+EXPORT_SYMBOL vmlinux 0x19f190f1	bio_integrity_tag_size
+EXPORT_SYMBOL vmlinux 0x1a2f6945	__next_cpu
+EXPORT_SYMBOL vmlinux 0x1a5899b6	of_n_addr_cells
+EXPORT_SYMBOL vmlinux 0x1a72533f	slow_work_sleep_till_thread_needed
+EXPORT_SYMBOL vmlinux 0x1a91663d	pasemi_dma_free_buf
+EXPORT_SYMBOL vmlinux 0x1ac1d885	bh_uptodate_or_lock
+EXPORT_SYMBOL vmlinux 0x1ace138d	bitmap_allocate_region
+EXPORT_SYMBOL vmlinux 0x1af10bf5	textsearch_unregister
+EXPORT_SYMBOL vmlinux 0x1b015d25	bitmap_parselist
+EXPORT_SYMBOL vmlinux 0x1b4c28ad	pci_dev_put
+EXPORT_SYMBOL vmlinux 0x1b626805	bdget
+EXPORT_SYMBOL vmlinux 0x1b6314fd	in_aton
+EXPORT_SYMBOL vmlinux 0x1b67461e	get_user_pages
+EXPORT_SYMBOL vmlinux 0x1b81b1f7	register_key_type
+EXPORT_SYMBOL vmlinux 0x1b8b95ad	i8042_unlock_chip
+EXPORT_SYMBOL vmlinux 0x1b983758	tcp_recvmsg
+EXPORT_SYMBOL vmlinux 0x1b9981cc	set_irq_wake
+EXPORT_SYMBOL vmlinux 0x1b9e0ff1	scsilun_to_int
+EXPORT_SYMBOL vmlinux 0x1bc4ff03	tty_termios_hw_change
+EXPORT_SYMBOL vmlinux 0x1bd2e867	kernel_getsockopt
+EXPORT_SYMBOL vmlinux 0x1bdd349c	bdi_register
+EXPORT_SYMBOL vmlinux 0x1bf8f0ce	skb_copy_bits
+EXPORT_SYMBOL vmlinux 0x1bfec830	__iounmap_at
+EXPORT_SYMBOL vmlinux 0x1c1af916	set_normalized_timespec
+EXPORT_SYMBOL vmlinux 0x1c1d4c24	dst_destroy
+EXPORT_SYMBOL vmlinux 0x1c200a7d	pasemi_dma_stop_chan
+EXPORT_SYMBOL vmlinux 0x1c3013de	framebuffer_alloc
+EXPORT_SYMBOL vmlinux 0x1c38c90c	sock_init_data
+EXPORT_SYMBOL vmlinux 0x1c4dab93	_lv1_connect_irq_plug
+EXPORT_SYMBOL vmlinux 0x1c5b2c15	pmu_wait_complete
+EXPORT_SYMBOL vmlinux 0x1c6d9341	qdisc_create_dflt
+EXPORT_SYMBOL vmlinux 0x1c78c14b	dm_register_target
+EXPORT_SYMBOL vmlinux 0x1c80de9c	ip_send_check
+EXPORT_SYMBOL vmlinux 0x1c945162	fb_find_mode
+EXPORT_SYMBOL vmlinux 0x1ca31120	mnt_unpin
+EXPORT_SYMBOL vmlinux 0x1ca371bd	scsi_cmd_print_sense_hdr
+EXPORT_SYMBOL vmlinux 0x1cb5777b	phy_ethtool_sset
+EXPORT_SYMBOL vmlinux 0x1cc3a876	bio_copy_user
+EXPORT_SYMBOL vmlinux 0x1cc6719a	register_reboot_notifier
+EXPORT_SYMBOL vmlinux 0x1ccc4581	clocksource_register
+EXPORT_SYMBOL vmlinux 0x1d09855b	skb_unlink
+EXPORT_SYMBOL vmlinux 0x1d158dec	read_cache_page
+EXPORT_SYMBOL vmlinux 0x1d29ea46	elv_abort_queue
+EXPORT_SYMBOL vmlinux 0x1d2e87c6	do_gettimeofday
+EXPORT_SYMBOL vmlinux 0x1d4750bc	_lv1_stop_lpm
+EXPORT_SYMBOL vmlinux 0x1d4ff9e4	of_mm_gpiochip_add
+EXPORT_SYMBOL vmlinux 0x1d6da805	xfrm_policy_alloc
+EXPORT_SYMBOL vmlinux 0x1d952ed8	elevator_init
+EXPORT_SYMBOL vmlinux 0x1dc36131	fb_destroy_modedb
+EXPORT_SYMBOL vmlinux 0x1dd571e6	fb_copy_cmap
+EXPORT_SYMBOL vmlinux 0x1dfe3c2a	dm_table_event
+EXPORT_SYMBOL vmlinux 0x1e240182	put_page
+EXPORT_SYMBOL vmlinux 0x1e55aca4	of_get_property
+EXPORT_SYMBOL vmlinux 0x1e6d26a8	strstr
+EXPORT_SYMBOL vmlinux 0x1e6e3fc5	scsi_bios_ptable
+EXPORT_SYMBOL vmlinux 0x1e763f7e	filemap_fdatawrite_range
+EXPORT_SYMBOL vmlinux 0x1eb3c98c	tty_register_ldisc
+EXPORT_SYMBOL vmlinux 0x1eb75607	inet_frags_exit_net
+EXPORT_SYMBOL vmlinux 0x1ec7e5ad	d_alloc_name
+EXPORT_SYMBOL vmlinux 0x1ed3d9cb	hippi_mac_addr
+EXPORT_SYMBOL vmlinux 0x1edd66f7	netdev_features_change
+EXPORT_SYMBOL vmlinux 0x1efe283f	__cap_full_set
+EXPORT_SYMBOL vmlinux 0x1f004fc4	kernel_recvmsg
+EXPORT_SYMBOL vmlinux 0x1f25c990	file_remove_suid
+EXPORT_SYMBOL vmlinux 0x1f35adce	of_find_all_nodes
+EXPORT_SYMBOL vmlinux 0x1f3f706e	freeze_bdev
+EXPORT_SYMBOL vmlinux 0x1f5549cd	up_write
+EXPORT_SYMBOL vmlinux 0x1f567352	tty_flip_buffer_push
+EXPORT_SYMBOL vmlinux 0x1f5a8793	ide_do_reset
+EXPORT_SYMBOL vmlinux 0x1f5dc118	neigh_sysctl_register
+EXPORT_SYMBOL vmlinux 0x1f64e017	sk_dst_check
+EXPORT_SYMBOL vmlinux 0x1fe7b4ab	pasemi_write_dma_reg
+EXPORT_SYMBOL vmlinux 0x1fedf0f4	__request_region
+EXPORT_SYMBOL vmlinux 0x20000329	simple_strtoul
+EXPORT_SYMBOL vmlinux 0x2000d46f	__register_chrdev
+EXPORT_SYMBOL vmlinux 0x201494ee	_lv1_net_set_interrupt_mask
+EXPORT_SYMBOL vmlinux 0x2020c831	tty_port_block_til_ready
+EXPORT_SYMBOL vmlinux 0x2029508b	generic_file_splice_read
+EXPORT_SYMBOL vmlinux 0x20385c58	genl_register_mc_group
+EXPORT_SYMBOL vmlinux 0x2043e818	ida_destroy
+EXPORT_SYMBOL vmlinux 0x2044441c	mdio_bus_type
+EXPORT_SYMBOL vmlinux 0x204857ac	proc_dostring
+EXPORT_SYMBOL vmlinux 0x20491434	i2c_smbus_write_byte_data
+EXPORT_SYMBOL vmlinux 0x20747cbd	sock_alloc_send_pskb
+EXPORT_SYMBOL vmlinux 0x2081c9cc	scsi_get_device_flags_keyed
+EXPORT_SYMBOL vmlinux 0x209c7871	ethtool_op_set_tx_hw_csum
+EXPORT_SYMBOL vmlinux 0x209f16fc	tcp4_gro_receive
+EXPORT_SYMBOL vmlinux 0x20c66fe0	nlmsg_notify
+EXPORT_SYMBOL vmlinux 0x20f24b98	inode_change_ok
+EXPORT_SYMBOL vmlinux 0x21249be6	__dev_get_by_name
+EXPORT_SYMBOL vmlinux 0x21342c01	pci_restore_state
+EXPORT_SYMBOL vmlinux 0x213603bf	pasemi_dma_free_ring
+EXPORT_SYMBOL vmlinux 0x214c88b1	set_security_override
+EXPORT_SYMBOL vmlinux 0x21587115	dcache_dir_open
+EXPORT_SYMBOL vmlinux 0x215ebd78	bitrev16
+EXPORT_SYMBOL vmlinux 0x21cf688d	blk_rq_map_kern
+EXPORT_SYMBOL vmlinux 0x21d296b4	security_sb_clone_mnt_opts
+EXPORT_SYMBOL vmlinux 0x21d479fa	remove_proc_entry
+EXPORT_SYMBOL vmlinux 0x21d939ef	kmem_cache_destroy
+EXPORT_SYMBOL vmlinux 0x21db5ad2	grab_cache_page_write_begin
+EXPORT_SYMBOL vmlinux 0x21efcb08	xfrm_state_add
+EXPORT_SYMBOL vmlinux 0x22246eed	idr_find
+EXPORT_SYMBOL vmlinux 0x222e7ce2	sysfs_streq
+EXPORT_SYMBOL vmlinux 0x224b707b	blkdev_issue_flush
+EXPORT_SYMBOL vmlinux 0x2257d4bd	vfs_quota_enable
+EXPORT_SYMBOL vmlinux 0x225ebee6	_lv1_destruct_lpm
+EXPORT_SYMBOL vmlinux 0x2267880f	sync_mapping_buffers
+EXPORT_SYMBOL vmlinux 0x226e86a9	audit_log
+EXPORT_SYMBOL vmlinux 0x2282b320	try_to_release_page
+EXPORT_SYMBOL vmlinux 0x2287ff61	sock_no_getname
+EXPORT_SYMBOL vmlinux 0x2288378f	system_state
+EXPORT_SYMBOL vmlinux 0x22995693	pci_fixup_cardbus
+EXPORT_SYMBOL vmlinux 0x22a73912	__tcp_put_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x22b325d5	kd_mksound
+EXPORT_SYMBOL vmlinux 0x22b4517a	phy_driver_register
+EXPORT_SYMBOL vmlinux 0x22b564ca	deny_write_access
+EXPORT_SYMBOL vmlinux 0x22b6533b	xfrm_sad_getinfo
+EXPORT_SYMBOL vmlinux 0x22ca4cc3	dq_data_lock
+EXPORT_SYMBOL vmlinux 0x22e59b0c	bio_integrity_free
+EXPORT_SYMBOL vmlinux 0x23148fe3	vm_insert_mixed
+EXPORT_SYMBOL vmlinux 0x23188903	pci_get_device
+EXPORT_SYMBOL vmlinux 0x23269a13	strict_strtoul
+EXPORT_SYMBOL vmlinux 0x2339d2db	get_pci_dma_ops
+EXPORT_SYMBOL vmlinux 0x23416acc	serio_open
+EXPORT_SYMBOL vmlinux 0x234509f3	strncat
+EXPORT_SYMBOL vmlinux 0x2349a491	of_get_gpio_flags
+EXPORT_SYMBOL vmlinux 0x235405bd	nf_register_sockopt
+EXPORT_SYMBOL vmlinux 0x23bc428b	journal_get_write_access
+EXPORT_SYMBOL vmlinux 0x23c279a8	poll_freewait
+EXPORT_SYMBOL vmlinux 0x23eb75e9	filemap_fdatawait
+EXPORT_SYMBOL vmlinux 0x23f15e51	vm_insert_pfn
+EXPORT_SYMBOL vmlinux 0x23fb97fc	nf_log_bind_pf
+EXPORT_SYMBOL vmlinux 0x23fd3028	vmalloc_node
+EXPORT_SYMBOL vmlinux 0x2407770c	of_parse_phandle
+EXPORT_SYMBOL vmlinux 0x243a22f9	truncate_inode_pages_range
+EXPORT_SYMBOL vmlinux 0x24431fdf	validate_sp
+EXPORT_SYMBOL vmlinux 0x244a2411	__first_cpu
+EXPORT_SYMBOL vmlinux 0x2459bbcc	console_set_on_cmdline
+EXPORT_SYMBOL vmlinux 0x24686293	proc_doulongvec_minmax
+EXPORT_SYMBOL vmlinux 0x24a02670	inet_frag_kill
+EXPORT_SYMBOL vmlinux 0x24c32064	stop_tty
+EXPORT_SYMBOL vmlinux 0x24cfd438	_lv1_copy_lpm_trace_buffer
+EXPORT_SYMBOL vmlinux 0x24d1af43	tty_check_change
+EXPORT_SYMBOL vmlinux 0x24e509cc	do_splice_to
+EXPORT_SYMBOL vmlinux 0x24f38c86	is_bad_inode
+EXPORT_SYMBOL vmlinux 0x24fdac79	wake_bit_function
+EXPORT_SYMBOL vmlinux 0x251ba3b5	dev_queue_xmit
+EXPORT_SYMBOL vmlinux 0x2554d417	blk_queue_softirq_done
+EXPORT_SYMBOL vmlinux 0x2556ec69	scm_fp_dup
+EXPORT_SYMBOL vmlinux 0x2563270c	input_set_keycode
+EXPORT_SYMBOL vmlinux 0x256c5b38	generic_file_open
+EXPORT_SYMBOL vmlinux 0x2581543c	complete
+EXPORT_SYMBOL vmlinux 0x25818771	key_task_permission
+EXPORT_SYMBOL vmlinux 0x25820c64	fs_overflowuid
+EXPORT_SYMBOL vmlinux 0x258355b4	fb_find_best_mode
+EXPORT_SYMBOL vmlinux 0x25b6b8f7	_lv1_set_spe_transition_notifier
+EXPORT_SYMBOL vmlinux 0x25bb65c3	path_lookup
+EXPORT_SYMBOL vmlinux 0x25cf4441	jbd2_journal_dirty_metadata
+EXPORT_SYMBOL vmlinux 0x25cf8049	matroxfb_PLL_calcclock
+EXPORT_SYMBOL vmlinux 0x25db860b	__brelse
+EXPORT_SYMBOL vmlinux 0x25f4bbad	journal_check_available_features
+EXPORT_SYMBOL vmlinux 0x26410c72	tcp_shutdown
+EXPORT_SYMBOL vmlinux 0x26477c07	__vmalloc
+EXPORT_SYMBOL vmlinux 0x267c7f2a	igrab
+EXPORT_SYMBOL vmlinux 0x267fc65b	__tasklet_hi_schedule
+EXPORT_SYMBOL vmlinux 0x26beac46	task_tgid_nr_ns
+EXPORT_SYMBOL vmlinux 0x26cb9928	jbd2_journal_abort
+EXPORT_SYMBOL vmlinux 0x26e65891	key_alloc
+EXPORT_SYMBOL vmlinux 0x26e76fb8	sysctl_udp_wmem_min
+EXPORT_SYMBOL vmlinux 0x271f4d2a	finish_wait
+EXPORT_SYMBOL vmlinux 0x27646df3	start_thread
+EXPORT_SYMBOL vmlinux 0x27864d57	memparse
+EXPORT_SYMBOL vmlinux 0x2788e5dd	__sg_alloc_table
+EXPORT_SYMBOL vmlinux 0x27bbf221	disable_irq_nosync
+EXPORT_SYMBOL vmlinux 0x27bc82e1	__lookup_one_len
+EXPORT_SYMBOL vmlinux 0x27c61ece	qdisc_put_stab
+EXPORT_SYMBOL vmlinux 0x27d8c257	generic_file_aio_write
+EXPORT_SYMBOL vmlinux 0x27d928cc	backlight_device_unregister
+EXPORT_SYMBOL vmlinux 0x27de6cd4	wait_on_sync_kiocb
+EXPORT_SYMBOL vmlinux 0x280e96e8	mapping_tagged
+EXPORT_SYMBOL vmlinux 0x285ac517	strict_strtoll
+EXPORT_SYMBOL vmlinux 0x2862fdf7	tcp_v4_connect
+EXPORT_SYMBOL vmlinux 0x28659b40	tcf_destroy_chain
+EXPORT_SYMBOL vmlinux 0x2866d677	scsi_print_sense
+EXPORT_SYMBOL vmlinux 0x2876a6d3	memcpy_toiovec
+EXPORT_SYMBOL vmlinux 0x28a2ed02	scsi_build_sense_buffer
+EXPORT_SYMBOL vmlinux 0x28ad125c	neigh_table_init
+EXPORT_SYMBOL vmlinux 0x28cd36a3	pci_request_regions
+EXPORT_SYMBOL vmlinux 0x28ce9869	dmam_pool_destroy
+EXPORT_SYMBOL vmlinux 0x28cf3e70	up
+EXPORT_SYMBOL vmlinux 0x28fbf1f6	search_binary_handler
+EXPORT_SYMBOL vmlinux 0x290ef588	arp_send
+EXPORT_SYMBOL vmlinux 0x293f2141	journal_unlock_updates
+EXPORT_SYMBOL vmlinux 0x29436b8a	handle_sysrq
+EXPORT_SYMBOL vmlinux 0x29537c9e	alloc_chrdev_region
+EXPORT_SYMBOL vmlinux 0x2960019b	eeh_check_failure
+EXPORT_SYMBOL vmlinux 0x29766a93	down_killable
+EXPORT_SYMBOL vmlinux 0x29777d52	phy_disconnect
+EXPORT_SYMBOL vmlinux 0x29bd4c46	__cap_init_eff_set
+EXPORT_SYMBOL vmlinux 0x29c795fe	add_disk
+EXPORT_SYMBOL vmlinux 0x29ddfb79	complete_request_key
+EXPORT_SYMBOL vmlinux 0x29eecbdc	kmem_ptr_validate
+EXPORT_SYMBOL vmlinux 0x2a15f06e	xfrm4_rcv_encap
+EXPORT_SYMBOL vmlinux 0x2a16e6d0	gen_replace_estimator
+EXPORT_SYMBOL vmlinux 0x2a286978	call_usermodehelper_freeinfo
+EXPORT_SYMBOL vmlinux 0x2a303d4d	check_signature
+EXPORT_SYMBOL vmlinux 0x2a555390	writeback_inodes_sb
+EXPORT_SYMBOL vmlinux 0x2a579309	pci_bus_find_capability
+EXPORT_SYMBOL vmlinux 0x2a7bd32b	block_truncate_page
+EXPORT_SYMBOL vmlinux 0x2a7da96e	page_put_link
+EXPORT_SYMBOL vmlinux 0x2a81f06a	find_inode_number
+EXPORT_SYMBOL vmlinux 0x2a93ed1b	add_to_page_cache_locked
+EXPORT_SYMBOL vmlinux 0x2a970c08	skb_kill_datagram
+EXPORT_SYMBOL vmlinux 0x2b05920f	simple_rename
+EXPORT_SYMBOL vmlinux 0x2b0ba2b0	scsi_sense_desc_find
+EXPORT_SYMBOL vmlinux 0x2b150080	i2c_put_adapter
+EXPORT_SYMBOL vmlinux 0x2b5704cb	test_set_page_writeback
+EXPORT_SYMBOL vmlinux 0x2b571383	ip_mc_join_group
+EXPORT_SYMBOL vmlinux 0x2b5e6c69	__any_online_cpu
+EXPORT_SYMBOL vmlinux 0x2b69834b	tty_insert_flip_string
+EXPORT_SYMBOL vmlinux 0x2b6f0eab	kobject_put
+EXPORT_SYMBOL vmlinux 0x2b8d3d94	generic_setlease
+EXPORT_SYMBOL vmlinux 0x2ba12884	simple_dir_inode_operations
+EXPORT_SYMBOL vmlinux 0x2ba39ba8	vfs_symlink
+EXPORT_SYMBOL vmlinux 0x2ba707a8	sysctl_tcp_low_latency
+EXPORT_SYMBOL vmlinux 0x2ba8c9ad	vio_unregister_driver
+EXPORT_SYMBOL vmlinux 0x2bf9b41c	pci_reenable_device
+EXPORT_SYMBOL vmlinux 0x2c1637ed	I_BDEV
+EXPORT_SYMBOL vmlinux 0x2c1cd4a4	cpu_present_mask
+EXPORT_SYMBOL vmlinux 0x2c32793a	rtas
+EXPORT_SYMBOL vmlinux 0x2c437361	nf_log_register
+EXPORT_SYMBOL vmlinux 0x2c4c7997	_lv1_construct_lpm
+EXPORT_SYMBOL vmlinux 0x2c4fd32c	__getblk
+EXPORT_SYMBOL vmlinux 0x2c53528a	ip_route_input
+EXPORT_SYMBOL vmlinux 0x2c57cf33	pagecache_write_begin
+EXPORT_SYMBOL vmlinux 0x2c6a3554	dmam_free_noncoherent
+EXPORT_SYMBOL vmlinux 0x2c979d63	blk_rq_map_integrity_sg
+EXPORT_SYMBOL vmlinux 0x2cb2ad49	pci_release_selected_regions
+EXPORT_SYMBOL vmlinux 0x2cbf35b2	splice_from_pipe_begin
+EXPORT_SYMBOL vmlinux 0x2cd25cc3	bio_map_kern
+EXPORT_SYMBOL vmlinux 0x2cecb072	netpoll_parse_options
+EXPORT_SYMBOL vmlinux 0x2cf9edf9	phy_start_interrupts
+EXPORT_SYMBOL vmlinux 0x2d2fcd77	tty_port_close
+EXPORT_SYMBOL vmlinux 0x2d476616	scsi_scan_host
+EXPORT_SYMBOL vmlinux 0x2d6714e2	aio_put_req
+EXPORT_SYMBOL vmlinux 0x2d73d9e4	generic_removexattr
+EXPORT_SYMBOL vmlinux 0x2d7d2767	_lv1_set_lpm_group_control
+EXPORT_SYMBOL vmlinux 0x2d89342a	scsi_show_sense_hdr
+EXPORT_SYMBOL vmlinux 0x2da7c377	of_iomap
+EXPORT_SYMBOL vmlinux 0x2dbafbe3	pcibios_align_resource
+EXPORT_SYMBOL vmlinux 0x2dd5815d	of_match_node
+EXPORT_SYMBOL vmlinux 0x2dfde521	sb_min_blocksize
+EXPORT_SYMBOL vmlinux 0x2e1bef92	eeh_subsystem_enabled
+EXPORT_SYMBOL vmlinux 0x2e29fb68	tcp_v4_md5_do_add
+EXPORT_SYMBOL vmlinux 0x2e2ce9e0	sysctl_tcp_syncookies
+EXPORT_SYMBOL vmlinux 0x2e4a39f8	sysctl_udp_mem
+EXPORT_SYMBOL vmlinux 0x2e93495e	_lv1_write_htab_entry
+EXPORT_SYMBOL vmlinux 0x2ea9ef37	inet_csk_reset_keepalive_timer
+EXPORT_SYMBOL vmlinux 0x2eb9c6e1	set_device_ro
+EXPORT_SYMBOL vmlinux 0x2ebb9a79	dma_direct_ops
+EXPORT_SYMBOL vmlinux 0x2ee4337f	smu_queue_cmd
+EXPORT_SYMBOL vmlinux 0x2ef51ac2	key_revoke
+EXPORT_SYMBOL vmlinux 0x2f0c9200	pci_request_regions_exclusive
+EXPORT_SYMBOL vmlinux 0x2f2597ba	pci_find_next_bus
+EXPORT_SYMBOL vmlinux 0x2f287f0d	copy_to_user
+EXPORT_SYMBOL vmlinux 0x2f6b2c5e	neigh_sysctl_unregister
+EXPORT_SYMBOL vmlinux 0x2f6e7a3e	__page_cache_alloc
+EXPORT_SYMBOL vmlinux 0x2fa796ca	keyring_clear
+EXPORT_SYMBOL vmlinux 0x3061a2e8	block_prepare_write
+EXPORT_SYMBOL vmlinux 0x306adcbe	register_con_driver
+EXPORT_SYMBOL vmlinux 0x307f7776	timecompare_offset
+EXPORT_SYMBOL vmlinux 0x30897e1d	__tcp_get_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x3095e678	netpoll_send_udp
+EXPORT_SYMBOL vmlinux 0x30ab6ff4	pci_enable_msix
+EXPORT_SYMBOL vmlinux 0x30ffe1f7	cancel_delayed_work_sync
+EXPORT_SYMBOL vmlinux 0x31040edf	pci_request_selected_regions_exclusive
+EXPORT_SYMBOL vmlinux 0x31086dda	xfrm_state_register_afinfo
+EXPORT_SYMBOL vmlinux 0x310b80b5	genphy_read_status
+EXPORT_SYMBOL vmlinux 0x31121fe1	genl_unregister_mc_group
+EXPORT_SYMBOL vmlinux 0x311f671f	of_translate_address
+EXPORT_SYMBOL vmlinux 0x3128e79c	__mod_zone_page_state
+EXPORT_SYMBOL vmlinux 0x312cfaf2	_lv1_disable_logical_spe
+EXPORT_SYMBOL vmlinux 0x313cc9f3	clip_tbl_hook
+EXPORT_SYMBOL vmlinux 0x31448a4a	mempool_create_node
+EXPORT_SYMBOL vmlinux 0x3145216f	pci_dev_present
+EXPORT_SYMBOL vmlinux 0x3147857d	default_red
+EXPORT_SYMBOL vmlinux 0x314eed8a	of_get_cpu_node
+EXPORT_SYMBOL vmlinux 0x3153a195	vfs_readdir
+EXPORT_SYMBOL vmlinux 0x317aeef2	pci_lost_interrupt
+EXPORT_SYMBOL vmlinux 0x317ce66c	sock_queue_rcv_skb
+EXPORT_SYMBOL vmlinux 0x318351f9	iov_iter_copy_from_user
+EXPORT_SYMBOL vmlinux 0x319d7203	blk_integrity_unregister
+EXPORT_SYMBOL vmlinux 0x31b7f300	_lv1_set_lpm_signal
+EXPORT_SYMBOL vmlinux 0x31cd509a	_lv1_net_control
+EXPORT_SYMBOL vmlinux 0x3218c701	invalidate_inodes
+EXPORT_SYMBOL vmlinux 0x32578752	compat_nf_getsockopt
+EXPORT_SYMBOL vmlinux 0x32659b77	tcp_prot
+EXPORT_SYMBOL vmlinux 0x3277e9c1	skb_checksum_help
+EXPORT_SYMBOL vmlinux 0x327b9c1b	pmu_poll_adb
+EXPORT_SYMBOL vmlinux 0x3285cc48	param_set_uint
+EXPORT_SYMBOL vmlinux 0x3295facd	revert_creds
+EXPORT_SYMBOL vmlinux 0x32fbf826	vio_register_driver
+EXPORT_SYMBOL vmlinux 0x330f7655	misc_deregister
+EXPORT_SYMBOL vmlinux 0x331e35d3	ethtool_op_get_flags
+EXPORT_SYMBOL vmlinux 0x33496a15	ida_get_new_above
+EXPORT_SYMBOL vmlinux 0x334c82dc	journal_forget
+EXPORT_SYMBOL vmlinux 0x336a7fc5	iw_handler_get_thrspy
+EXPORT_SYMBOL vmlinux 0x336aae76	vfs_link
+EXPORT_SYMBOL vmlinux 0x336fb32c	dev_addr_add_multiple
+EXPORT_SYMBOL vmlinux 0x33742a88	pci_set_dma_max_seg_size
+EXPORT_SYMBOL vmlinux 0x33780dfa	follow_up
+EXPORT_SYMBOL vmlinux 0x337d56bf	journal_extend
+EXPORT_SYMBOL vmlinux 0x3394a7c1	scsi_host_put
+EXPORT_SYMBOL vmlinux 0x339d4841	prepare_to_wait_exclusive
+EXPORT_SYMBOL vmlinux 0x33b3949a	add_wait_queue_exclusive
+EXPORT_SYMBOL vmlinux 0x33bea151	bio_integrity_clone
+EXPORT_SYMBOL vmlinux 0x33fe8e67	skb_recv_datagram
+EXPORT_SYMBOL vmlinux 0x340a3691	generic_writepages
+EXPORT_SYMBOL vmlinux 0x3419c6f6	cpufreq_get_policy
+EXPORT_SYMBOL vmlinux 0x3438adbb	blk_init_queue
+EXPORT_SYMBOL vmlinux 0x344adbd5	init_cdrom_command
+EXPORT_SYMBOL vmlinux 0x3457cb68	param_set_long
+EXPORT_SYMBOL vmlinux 0x345cfb8c	ps3_dma_region_free
+EXPORT_SYMBOL vmlinux 0x346b6575	proto_register
+EXPORT_SYMBOL vmlinux 0x3481fe05	ethtool_op_set_tso
+EXPORT_SYMBOL vmlinux 0x349cba85	strchr
+EXPORT_SYMBOL vmlinux 0x34b29e56	tcf_hash_search
+EXPORT_SYMBOL vmlinux 0x34b467dd	matroxfb_g450_setclk
+EXPORT_SYMBOL vmlinux 0x34be8f65	udp_lib_unhash
+EXPORT_SYMBOL vmlinux 0x34e1a193	ethtool_op_set_flags
+EXPORT_SYMBOL vmlinux 0x34f8d82a	netdev_class_remove_file
+EXPORT_SYMBOL vmlinux 0x35064a2d	of_find_node_with_property
+EXPORT_SYMBOL vmlinux 0x35167c6c	clear_page_dirty_for_io
+EXPORT_SYMBOL vmlinux 0x3582ac9a	iget5_locked
+EXPORT_SYMBOL vmlinux 0x3582d242	scsi_release_buffers
+EXPORT_SYMBOL vmlinux 0x35b0650f	vsnprintf
+EXPORT_SYMBOL vmlinux 0x35ba7847	otg_put_transceiver
+EXPORT_SYMBOL vmlinux 0x35c2ba9e	refrigerator
+EXPORT_SYMBOL vmlinux 0x35ddddc4	__alloc_pages_nodemask
+EXPORT_SYMBOL vmlinux 0x35e8fb2f	ida_get_new
+EXPORT_SYMBOL vmlinux 0x35fe8b4b	ide_raw_taskfile
+EXPORT_SYMBOL vmlinux 0x3607c60c	pci_release_regions
+EXPORT_SYMBOL vmlinux 0x36139a51	memcpy_fromiovec
+EXPORT_SYMBOL vmlinux 0x3656bf5a	lock_kernel
+EXPORT_SYMBOL vmlinux 0x36875389	__timecompare_update
+EXPORT_SYMBOL vmlinux 0x369c210c	nf_afinfo
+EXPORT_SYMBOL vmlinux 0x36c261d4	blk_rq_map_sg
+EXPORT_SYMBOL vmlinux 0x371902e9	_lv1_get_lpm_interrupt_status
+EXPORT_SYMBOL vmlinux 0x371b143e	skb_checksum
+EXPORT_SYMBOL vmlinux 0x371d2130	check_legacy_ioport
+EXPORT_SYMBOL vmlinux 0x37360459	scsi_host_alloc
+EXPORT_SYMBOL vmlinux 0x37383edd	rtas_get_power_level
+EXPORT_SYMBOL vmlinux 0x3744cf36	vmalloc_to_pfn
+EXPORT_SYMBOL vmlinux 0x375465a7	radix_tree_gang_lookup_tag_slot
+EXPORT_SYMBOL vmlinux 0x37754bb8	block_commit_write
+EXPORT_SYMBOL vmlinux 0x377b7930	mb_cache_entry_release
+EXPORT_SYMBOL vmlinux 0x37a9798f	mempool_free
+EXPORT_SYMBOL vmlinux 0x37b51291	sock_recvmsg
+EXPORT_SYMBOL vmlinux 0x37befc70	jiffies_to_msecs
+EXPORT_SYMBOL vmlinux 0x37e4923f	do_sync_write
+EXPORT_SYMBOL vmlinux 0x37ee7c21	pci_enable_device
+EXPORT_SYMBOL vmlinux 0x38023d19	sg_init_one
+EXPORT_SYMBOL vmlinux 0x38164b6a	nf_hook_slow
+EXPORT_SYMBOL vmlinux 0x382777ab	_lv1_gpu_context_allocate
+EXPORT_SYMBOL vmlinux 0x382a8317	pcix_get_max_mmrbc
+EXPORT_SYMBOL vmlinux 0x383fc62e	inet_shutdown
+EXPORT_SYMBOL vmlinux 0x385ff923	journal_try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0x38693d66	dmam_free_coherent
+EXPORT_SYMBOL vmlinux 0x38792163	security_path_link
+EXPORT_SYMBOL vmlinux 0x388959b5	_lv1_net_stop_tx_dma
+EXPORT_SYMBOL vmlinux 0x388f9128	xfrm_state_walk_done
+EXPORT_SYMBOL vmlinux 0x38b34e73	dev_addr_del_multiple
+EXPORT_SYMBOL vmlinux 0x38b92846	llc_remove_pack
+EXPORT_SYMBOL vmlinux 0x38e06470	simple_statfs
+EXPORT_SYMBOL vmlinux 0x38fb9933	tty_std_termios
+EXPORT_SYMBOL vmlinux 0x3902d435	pci_get_slot
+EXPORT_SYMBOL vmlinux 0x3906b93c	_spin_trylock_bh
+EXPORT_SYMBOL vmlinux 0x3912dedb	napi_skb_finish
+EXPORT_SYMBOL vmlinux 0x39193ffb	nla_put_nohdr
+EXPORT_SYMBOL vmlinux 0x3922d605	_spin_trylock
+EXPORT_SYMBOL vmlinux 0x3931391a	scsi_prep_state_check
+EXPORT_SYMBOL vmlinux 0x39463a8b	tcp_tso_segment
+EXPORT_SYMBOL vmlinux 0x3955e04d	scm_detach_fds
+EXPORT_SYMBOL vmlinux 0x396d09f3	__percpu_counter_init
+EXPORT_SYMBOL vmlinux 0x3980aac1	unregister_reboot_notifier
+EXPORT_SYMBOL vmlinux 0x398fc1da	ftrace_print_symbols_seq
+EXPORT_SYMBOL vmlinux 0x39a36c31	set_disk_ro
+EXPORT_SYMBOL vmlinux 0x39aea87a	blk_sync_queue
+EXPORT_SYMBOL vmlinux 0x39f7a067	create_empty_buffers
+EXPORT_SYMBOL vmlinux 0x39fd69b7	log_start_commit
+EXPORT_SYMBOL vmlinux 0x3a0ffa80	d_add_ci
+EXPORT_SYMBOL vmlinux 0x3a2204c6	security_netlink_recv
+EXPORT_SYMBOL vmlinux 0x3a271295	gen_pool_add
+EXPORT_SYMBOL vmlinux 0x3a44f31c	journal_release_buffer
+EXPORT_SYMBOL vmlinux 0x3a593cf6	put_io_context
+EXPORT_SYMBOL vmlinux 0x3a62be25	hippi_neigh_setup_dev
+EXPORT_SYMBOL vmlinux 0x3a7406bd	skb_make_writable
+EXPORT_SYMBOL vmlinux 0x3a7aa35f	__scm_send
+EXPORT_SYMBOL vmlinux 0x3a9b6fb9	blk_unregister_region
+EXPORT_SYMBOL vmlinux 0x3a9d70ef	per_cpu__cpu_sibling_map
+EXPORT_SYMBOL vmlinux 0x3ac43936	open_bdev_exclusive
+EXPORT_SYMBOL vmlinux 0x3acacb55	mb_cache_entry_get
+EXPORT_SYMBOL vmlinux 0x3acc9402	generic_block_fiemap
+EXPORT_SYMBOL vmlinux 0x3ad3c7aa	journal_get_undo_access
+EXPORT_SYMBOL vmlinux 0x3ae21c6f	scsi_register_driver
+EXPORT_SYMBOL vmlinux 0x3ae831b6	kref_init
+EXPORT_SYMBOL vmlinux 0x3b15457f	tty_port_close_start
+EXPORT_SYMBOL vmlinux 0x3b2abcc2	register_netdev
+EXPORT_SYMBOL vmlinux 0x3b3016d3	cpufreq_unregister_notifier
+EXPORT_SYMBOL vmlinux 0x3b36596e	get_disk
+EXPORT_SYMBOL vmlinux 0x3b68e18e	elv_rb_add
+EXPORT_SYMBOL vmlinux 0x3b9ed503	jbd2_journal_destroy
+EXPORT_SYMBOL vmlinux 0x3bb78130	set_current_groups
+EXPORT_SYMBOL vmlinux 0x3bd1b1f6	msecs_to_jiffies
+EXPORT_SYMBOL vmlinux 0x3bd48730	vfs_read
+EXPORT_SYMBOL vmlinux 0x3be23729	security_path_unlink
+EXPORT_SYMBOL vmlinux 0x3be30589	of_find_matching_node
+EXPORT_SYMBOL vmlinux 0x3bf62555	lock_may_write
+EXPORT_SYMBOL vmlinux 0x3c04f600	file_fsync
+EXPORT_SYMBOL vmlinux 0x3c0d4199	tcp_v4_send_check
+EXPORT_SYMBOL vmlinux 0x3c10529b	inet_dgram_connect
+EXPORT_SYMBOL vmlinux 0x3c1a2820	blk_queue_physical_block_size
+EXPORT_SYMBOL vmlinux 0x3c2c5af5	sprintf
+EXPORT_SYMBOL vmlinux 0x3c2eca3d	bio_integrity_prep
+EXPORT_SYMBOL vmlinux 0x3c442e28	xfrm_input
+EXPORT_SYMBOL vmlinux 0x3c7873fb	journal_destroy
+EXPORT_SYMBOL vmlinux 0x3c7f7b0c	unregister_netdevice
+EXPORT_SYMBOL vmlinux 0x3c885663	netdev_class_create_file
+EXPORT_SYMBOL vmlinux 0x3c90e288	devm_ioport_map
+EXPORT_SYMBOL vmlinux 0x3c9ce34c	tty_register_device
+EXPORT_SYMBOL vmlinux 0x3c9d1211	string_get_size
+EXPORT_SYMBOL vmlinux 0x3ca1e637	generic_readlink
+EXPORT_SYMBOL vmlinux 0x3ca87c1b	vfs_readlink
+EXPORT_SYMBOL vmlinux 0x3cb5cdc5	neigh_changeaddr
+EXPORT_SYMBOL vmlinux 0x3cc0a3bb	xfrm_spd_getinfo
+EXPORT_SYMBOL vmlinux 0x3cc1c745	matroxfb_read_pins
+EXPORT_SYMBOL vmlinux 0x3ce4ca6f	disable_irq
+EXPORT_SYMBOL vmlinux 0x3d54ac01	_lv1_net_stop_rx_dma
+EXPORT_SYMBOL vmlinux 0x3d567549	scsi_host_lookup
+EXPORT_SYMBOL vmlinux 0x3d5814e8	locks_init_lock
+EXPORT_SYMBOL vmlinux 0x3d6481f2	init_timer_key
+EXPORT_SYMBOL vmlinux 0x3d68bd4b	flow_cache_genid
+EXPORT_SYMBOL vmlinux 0x3d8728bb	memcpy_toiovecend
+EXPORT_SYMBOL vmlinux 0x3db2e258	radix_tree_gang_lookup
+EXPORT_SYMBOL vmlinux 0x3ddb5317	console_start
+EXPORT_SYMBOL vmlinux 0x3ddf6bec	i2c_transfer
+EXPORT_SYMBOL vmlinux 0x3e0da1ae	iget_locked
+EXPORT_SYMBOL vmlinux 0x3e286dca	_lv1_get_rtc
+EXPORT_SYMBOL vmlinux 0x3e383385	nf_hooks
+EXPORT_SYMBOL vmlinux 0x3e45e9ff	register_inetaddr_notifier
+EXPORT_SYMBOL vmlinux 0x3e899c9d	blk_limits_io_min
+EXPORT_SYMBOL vmlinux 0x3eabccff	of_gpio_simple_xlate
+EXPORT_SYMBOL vmlinux 0x3ed2b8fe	dquot_release
+EXPORT_SYMBOL vmlinux 0x3ed63055	zlib_inflateReset
+EXPORT_SYMBOL vmlinux 0x3ed93182	dqget
+EXPORT_SYMBOL vmlinux 0x3ee7a68e	__alloc_skb
+EXPORT_SYMBOL vmlinux 0x3eeb228a	dev_kfree_skb_irq
+EXPORT_SYMBOL vmlinux 0x3ef6ff76	block_write_full_page
+EXPORT_SYMBOL vmlinux 0x3f0546a8	ioread32_rep
+EXPORT_SYMBOL vmlinux 0x3f06a656	_lv1_construct_event_receive_port
+EXPORT_SYMBOL vmlinux 0x3f0a0f57	block_fsync
+EXPORT_SYMBOL vmlinux 0x3f12ad5b	tcf_action_exec
+EXPORT_SYMBOL vmlinux 0x3f130d2a	generic_write_sync
+EXPORT_SYMBOL vmlinux 0x3f406a3b	enable_kernel_altivec
+EXPORT_SYMBOL vmlinux 0x3f4547a7	put_unused_fd
+EXPORT_SYMBOL vmlinux 0x3f58f4d6	gnet_stats_start_copy
+EXPORT_SYMBOL vmlinux 0x3f5cc717	elv_dispatch_add_tail
+EXPORT_SYMBOL vmlinux 0x3f63c6be	dquot_acquire
+EXPORT_SYMBOL vmlinux 0x3f6535ce	jbd2_journal_force_commit
+EXPORT_SYMBOL vmlinux 0x3f70bfd8	kmem_cache_alloc
+EXPORT_SYMBOL vmlinux 0x3fa03a97	memset
+EXPORT_SYMBOL vmlinux 0x3fa913da	strspn
+EXPORT_SYMBOL vmlinux 0x3fa9ba0f	scsi_put_command
+EXPORT_SYMBOL vmlinux 0x3fb47dd3	kthread_stop
+EXPORT_SYMBOL vmlinux 0x3fbfd6ed	_lv1_gpu_open
+EXPORT_SYMBOL vmlinux 0x3fc6e4a3	__pskb_pull_tail
+EXPORT_SYMBOL vmlinux 0x3fefb615	pci_dev_get
+EXPORT_SYMBOL vmlinux 0x3ff17a26	vfs_follow_link
+EXPORT_SYMBOL vmlinux 0x3ff62317	local_bh_disable
+EXPORT_SYMBOL vmlinux 0x40059657	generic_make_request
+EXPORT_SYMBOL vmlinux 0x400af34f	sys_imageblit
+EXPORT_SYMBOL vmlinux 0x405c1144	get_seconds
+EXPORT_SYMBOL vmlinux 0x4076dabd	lro_receive_frags
+EXPORT_SYMBOL vmlinux 0x4083b769	blk_rq_map_user
+EXPORT_SYMBOL vmlinux 0x40a27c37	scsi_dev_info_remove_list
+EXPORT_SYMBOL vmlinux 0x40d3bf98	sock_wake_async
+EXPORT_SYMBOL vmlinux 0x40f68dda	mb_cache_entry_alloc
+EXPORT_SYMBOL vmlinux 0x40f9eef2	mach_maple
+EXPORT_SYMBOL vmlinux 0x4101a975	ide_fixstring
+EXPORT_SYMBOL vmlinux 0x4101bbde	param_set_copystring
+EXPORT_SYMBOL vmlinux 0x4108e69a	fb_match_mode
+EXPORT_SYMBOL vmlinux 0x41166725	inet_frags_init_net
+EXPORT_SYMBOL vmlinux 0x41173575	jbd2_journal_update_format
+EXPORT_SYMBOL vmlinux 0x41255091	__xfrm_state_destroy
+EXPORT_SYMBOL vmlinux 0x4128058b	request_key_async_with_auxdata
+EXPORT_SYMBOL vmlinux 0x41344088	param_get_charp
+EXPORT_SYMBOL vmlinux 0x41361807	_lv1_get_logical_ppe_id
+EXPORT_SYMBOL vmlinux 0x41482d8b	strndup_user
+EXPORT_SYMBOL vmlinux 0x415714b6	down_read
+EXPORT_SYMBOL vmlinux 0x416983d9	netdev_fix_features
+EXPORT_SYMBOL vmlinux 0x41727a09	bioset_free
+EXPORT_SYMBOL vmlinux 0x4188d439	neigh_rand_reach_time
+EXPORT_SYMBOL vmlinux 0x41a04a84	input_inject_event
+EXPORT_SYMBOL vmlinux 0x41ab15dd	jbd2_journal_flush
+EXPORT_SYMBOL vmlinux 0x41b43950	thaw_process
+EXPORT_SYMBOL vmlinux 0x41dbf4de	_lv1_start_lpm
+EXPORT_SYMBOL vmlinux 0x41f5db27	nf_unregister_sockopt
+EXPORT_SYMBOL vmlinux 0x4211c3c1	zlib_inflateInit2
+EXPORT_SYMBOL vmlinux 0x421ddd23	lock_rename
+EXPORT_SYMBOL vmlinux 0x42224298	sscanf
+EXPORT_SYMBOL vmlinux 0x42347de1	tcf_hash_lookup
+EXPORT_SYMBOL vmlinux 0x42901ccf	phys_mem_access_prot
+EXPORT_SYMBOL vmlinux 0x429328d9	_spin_lock
+EXPORT_SYMBOL vmlinux 0x42a3ff28	idr_get_new_above
+EXPORT_SYMBOL vmlinux 0x42aabed8	of_find_node_by_path
+EXPORT_SYMBOL vmlinux 0x42acbf72	posix_acl_from_xattr
+EXPORT_SYMBOL vmlinux 0x42fea262	blk_queue_invalidate_tags
+EXPORT_SYMBOL vmlinux 0x4302d0eb	free_pages
+EXPORT_SYMBOL vmlinux 0x4321776f	neigh_destroy
+EXPORT_SYMBOL vmlinux 0x4333075c	journal_lock_updates
+EXPORT_SYMBOL vmlinux 0x4333eadb	param_set_short
+EXPORT_SYMBOL vmlinux 0x434fa55c	release_console_sem
+EXPORT_SYMBOL vmlinux 0x436c2179	iowrite32
+EXPORT_SYMBOL vmlinux 0x43757d9f	blk_insert_request
+EXPORT_SYMBOL vmlinux 0x438918d1	dm_table_get_md
+EXPORT_SYMBOL vmlinux 0x439cbf07	inode_add_rsv_space
+EXPORT_SYMBOL vmlinux 0x43aa44a1	pcim_iomap_regions
+EXPORT_SYMBOL vmlinux 0x43ab66c3	param_array_get
+EXPORT_SYMBOL vmlinux 0x43ab698c	security_path_rmdir
+EXPORT_SYMBOL vmlinux 0x43b962c8	fifo_set_limit
+EXPORT_SYMBOL vmlinux 0x43ec913a	put_cmsg
+EXPORT_SYMBOL vmlinux 0x43ee8049	pagevec_lookup
+EXPORT_SYMBOL vmlinux 0x43f5a585	xfrm_state_alloc
+EXPORT_SYMBOL vmlinux 0x43f9eac7	inet_ioctl
+EXPORT_SYMBOL vmlinux 0x44161c19	unregister_shrinker
+EXPORT_SYMBOL vmlinux 0x4438e13b	__destroy_inode
+EXPORT_SYMBOL vmlinux 0x444779c4	nla_find
+EXPORT_SYMBOL vmlinux 0x4493b988	set_page_dirty
+EXPORT_SYMBOL vmlinux 0x449d59ac	__scm_destroy
+EXPORT_SYMBOL vmlinux 0x44a80a73	ide_dma_off
+EXPORT_SYMBOL vmlinux 0x44ae5d2f	ethtool_op_set_tx_ipv6_csum
+EXPORT_SYMBOL vmlinux 0x44b154df	scsi_set_medium_removal
+EXPORT_SYMBOL vmlinux 0x44b911c3	rb_replace_node
+EXPORT_SYMBOL vmlinux 0x44c2a895	find_vma
+EXPORT_SYMBOL vmlinux 0x44c720ab	input_flush_device
+EXPORT_SYMBOL vmlinux 0x44c86fec	of_gpio_count
+EXPORT_SYMBOL vmlinux 0x44d05f8a	dqput
+EXPORT_SYMBOL vmlinux 0x44e9a829	match_token
+EXPORT_SYMBOL vmlinux 0x44f608c8	pci_scan_single_device
+EXPORT_SYMBOL vmlinux 0x45053705	genl_register_ops
+EXPORT_SYMBOL vmlinux 0x450c972a	ps2_sendbyte
+EXPORT_SYMBOL vmlinux 0x4517bdfc	cdev_add
+EXPORT_SYMBOL vmlinux 0x4525e320	dev_gro_receive
+EXPORT_SYMBOL vmlinux 0x453c8403	pci_msi_enabled
+EXPORT_SYMBOL vmlinux 0x45411427	eth_validate_addr
+EXPORT_SYMBOL vmlinux 0x4550ba8a	register_cpu_notifier
+EXPORT_SYMBOL vmlinux 0x45512217	replace_mount_options
+EXPORT_SYMBOL vmlinux 0x4564459b	_lv1_set_virtual_uart_param
+EXPORT_SYMBOL vmlinux 0x45704798	print_hex_dump_bytes
+EXPORT_SYMBOL vmlinux 0x4575315d	utf8s_to_utf16s
+EXPORT_SYMBOL vmlinux 0x45947727	param_array_set
+EXPORT_SYMBOL vmlinux 0x45a55ec8	__iounmap
+EXPORT_SYMBOL vmlinux 0x45cfe80b	pasemi_dma_free_flag
+EXPORT_SYMBOL vmlinux 0x45e228e4	end_page_writeback
+EXPORT_SYMBOL vmlinux 0x461ebfa0	__copy_tofrom_user
+EXPORT_SYMBOL vmlinux 0x4640278e	paca
+EXPORT_SYMBOL vmlinux 0x466c14a7	__delay
+EXPORT_SYMBOL vmlinux 0x46950542	journal_dirty_data
+EXPORT_SYMBOL vmlinux 0x46b2abc7	xfrm_state_lookup
+EXPORT_SYMBOL vmlinux 0x46bc2655	simple_link
+EXPORT_SYMBOL vmlinux 0x47170c96	journal_errno
+EXPORT_SYMBOL vmlinux 0x47390c68	jbd2_journal_get_write_access
+EXPORT_SYMBOL vmlinux 0x4742a8e1	pci_find_bus
+EXPORT_SYMBOL vmlinux 0x475100c2	inet_get_local_port_range
+EXPORT_SYMBOL vmlinux 0x476087d0	init_task
+EXPORT_SYMBOL vmlinux 0x476232ee	lock_super
+EXPORT_SYMBOL vmlinux 0x47737e99	i2c_smbus_read_i2c_block_data
+EXPORT_SYMBOL vmlinux 0x477e201e	dm_get_mapinfo
+EXPORT_SYMBOL vmlinux 0x479b0e49	km_state_expired
+EXPORT_SYMBOL vmlinux 0x479c3c86	find_next_zero_bit
+EXPORT_SYMBOL vmlinux 0x47c712d1	ide_wait_stat
+EXPORT_SYMBOL vmlinux 0x47c8f62a	seq_release
+EXPORT_SYMBOL vmlinux 0x47e05145	scsi_test_unit_ready
+EXPORT_SYMBOL vmlinux 0x47f1778a	__starget_for_each_device
+EXPORT_SYMBOL vmlinux 0x48052792	writeback_inodes_sb_if_idle
+EXPORT_SYMBOL vmlinux 0x480637c2	scsi_add_host_with_dma
+EXPORT_SYMBOL vmlinux 0x480ab42a	__next_cpu_nr
+EXPORT_SYMBOL vmlinux 0x48485d63	mb_cache_entry_find_next
+EXPORT_SYMBOL vmlinux 0x4859b8bb	rtc_year_days
+EXPORT_SYMBOL vmlinux 0x485a4e89	of_find_node_by_type
+EXPORT_SYMBOL vmlinux 0x4867aaf5	giveup_altivec
+EXPORT_SYMBOL vmlinux 0x486b6407	hweight64
+EXPORT_SYMBOL vmlinux 0x488069e9	gnet_stats_copy_rate_est
+EXPORT_SYMBOL vmlinux 0x4881efab	pmac_get_partition
+EXPORT_SYMBOL vmlinux 0x4889ae65	journal_stop
+EXPORT_SYMBOL vmlinux 0x48accb6e	get_sb_ns
+EXPORT_SYMBOL vmlinux 0x48b6efa5	of_release_dev
+EXPORT_SYMBOL vmlinux 0x48b7b335	of_parse_phandles_with_args
+EXPORT_SYMBOL vmlinux 0x48bc2ef0	sg_copy_to_buffer
+EXPORT_SYMBOL vmlinux 0x48c1d080	tcp_parse_md5sig_option
+EXPORT_SYMBOL vmlinux 0x491b1049	xfrm_policy_flush
+EXPORT_SYMBOL vmlinux 0x49439411	genl_unregister_family
+EXPORT_SYMBOL vmlinux 0x495844ef	vfs_quota_off
+EXPORT_SYMBOL vmlinux 0x495ec6eb	pasemi_dma_alloc_buf
+EXPORT_SYMBOL vmlinux 0x49603fb8	security_sb_copy_data
+EXPORT_SYMBOL vmlinux 0x496605b6	notify_change
+EXPORT_SYMBOL vmlinux 0x4969db5d	ide_dma_off_quietly
+EXPORT_SYMBOL vmlinux 0x497310dc	xfrm_register_type
+EXPORT_SYMBOL vmlinux 0x4983ca33	is_container_init
+EXPORT_SYMBOL vmlinux 0x49849528	register_exec_domain
+EXPORT_SYMBOL vmlinux 0x49873e5e	copy_strings_kernel
+EXPORT_SYMBOL vmlinux 0x4992751e	tty_port_free_xmit_buf
+EXPORT_SYMBOL vmlinux 0x49a02ded	textsearch_prepare
+EXPORT_SYMBOL vmlinux 0x49a70ad2	mdiobus_scan
+EXPORT_SYMBOL vmlinux 0x49df3eef	eth_change_mtu
+EXPORT_SYMBOL vmlinux 0x49e182c0	param_get_string
+EXPORT_SYMBOL vmlinux 0x49e4485a	vfs_quota_on_path
+EXPORT_SYMBOL vmlinux 0x49f8c1b2	lookup_one_len
+EXPORT_SYMBOL vmlinux 0x4a17107d	__put_cred
+EXPORT_SYMBOL vmlinux 0x4a172097	abort_exclusive_wait
+EXPORT_SYMBOL vmlinux 0x4a2622b8	pci_set_master
+EXPORT_SYMBOL vmlinux 0x4a358252	__bitmap_subset
+EXPORT_SYMBOL vmlinux 0x4a5d726f	blk_queue_start_tag
+EXPORT_SYMBOL vmlinux 0x4a862177	rtnl_notify
+EXPORT_SYMBOL vmlinux 0x4a8702be	panic_notifier_list
+EXPORT_SYMBOL vmlinux 0x4a955a01	inet_frags_fini
+EXPORT_SYMBOL vmlinux 0x4a9e46a4	sk_stream_wait_close
+EXPORT_SYMBOL vmlinux 0x4aa5185c	security_path_truncate
+EXPORT_SYMBOL vmlinux 0x4aaf100f	mntput_no_expire
+EXPORT_SYMBOL vmlinux 0x4ab5af35	swiotlb_dma_supported
+EXPORT_SYMBOL vmlinux 0x4ac3e56e	tc_classify_compat
+EXPORT_SYMBOL vmlinux 0x4ac64da4	_lv1_select_virtual_address_space
+EXPORT_SYMBOL vmlinux 0x4acd93d3	release_resource
+EXPORT_SYMBOL vmlinux 0x4afe9a77	scsi_partsize
+EXPORT_SYMBOL vmlinux 0x4b17de47	_read_lock_bh
+EXPORT_SYMBOL vmlinux 0x4b3cb349	_lv1_destruct_io_irq_outlet
+EXPORT_SYMBOL vmlinux 0x4b46037d	file_permission
+EXPORT_SYMBOL vmlinux 0x4b48acf5	sync_dirty_buffer
+EXPORT_SYMBOL vmlinux 0x4b4e63e0	jbd2_journal_init_inode
+EXPORT_SYMBOL vmlinux 0x4b65a3dc	tcf_hash_insert
+EXPORT_SYMBOL vmlinux 0x4b6fcddc	_lv1_set_spe_interrupt_mask
+EXPORT_SYMBOL vmlinux 0x4b8cfd46	scsi_is_target_device
+EXPORT_SYMBOL vmlinux 0x4bbc3e5f	pm_flags
+EXPORT_SYMBOL vmlinux 0x4be36b59	seq_printf
+EXPORT_SYMBOL vmlinux 0x4bee8443	xfrm_state_check_expire
+EXPORT_SYMBOL vmlinux 0x4c1182cb	bitmap_scnprintf
+EXPORT_SYMBOL vmlinux 0x4c4c956e	nla_memcmp
+EXPORT_SYMBOL vmlinux 0x4c720bf4	jbd2_journal_errno
+EXPORT_SYMBOL vmlinux 0x4c7a6de8	input_event
+EXPORT_SYMBOL vmlinux 0x4cbbd171	__bitmap_weight
+EXPORT_SYMBOL vmlinux 0x4cd34a9b	vfsmount_lock
+EXPORT_SYMBOL vmlinux 0x4cd380c3	skb_seq_read
+EXPORT_SYMBOL vmlinux 0x4cdce2dc	serio_interrupt
+EXPORT_SYMBOL vmlinux 0x4cde356c	tcp_connect
+EXPORT_SYMBOL vmlinux 0x4d2a5c19	rwsem_wake
+EXPORT_SYMBOL vmlinux 0x4d508308	unregister_sysctl_table
+EXPORT_SYMBOL vmlinux 0x4d66c7af	migrate_page
+EXPORT_SYMBOL vmlinux 0x4d77dfdd	block_is_partially_uptodate
+EXPORT_SYMBOL vmlinux 0x4db022ad	set_binfmt
+EXPORT_SYMBOL vmlinux 0x4dc1e271	giveup_fpu
+EXPORT_SYMBOL vmlinux 0x4dc45be9	nf_log_unbind_pf
+EXPORT_SYMBOL vmlinux 0x4dd464f0	request_key_async
+EXPORT_SYMBOL vmlinux 0x4dda726b	match_strlcpy
+EXPORT_SYMBOL vmlinux 0x4df119fa	__bitmap_parse
+EXPORT_SYMBOL vmlinux 0x4df7631a	tty_port_tty_set
+EXPORT_SYMBOL vmlinux 0x4e069249	security_tun_dev_post_create
+EXPORT_SYMBOL vmlinux 0x4e07789c	inet_sk_rebuild_header
+EXPORT_SYMBOL vmlinux 0x4e3567f7	match_int
+EXPORT_SYMBOL vmlinux 0x4e6e8ea7	fg_console
+EXPORT_SYMBOL vmlinux 0x4e927977	bio_integrity_split
+EXPORT_SYMBOL vmlinux 0x4e977938	scsi_host_set_state
+EXPORT_SYMBOL vmlinux 0x4e9dffb5	ip_fast_csum
+EXPORT_SYMBOL vmlinux 0x4eab58c5	seq_bitmap_list
+EXPORT_SYMBOL vmlinux 0x4ed87f85	kset_unregister
+EXPORT_SYMBOL vmlinux 0x4edd72f7	block_all_signals
+EXPORT_SYMBOL vmlinux 0x4eef7a01	genphy_config_advert
+EXPORT_SYMBOL vmlinux 0x4f1cd128	security_tun_dev_create
+EXPORT_SYMBOL vmlinux 0x4f1dd628	bdi_destroy
+EXPORT_SYMBOL vmlinux 0x4f664db6	_lv1_insert_htab_entry
+EXPORT_SYMBOL vmlinux 0x4fa1c46d	kernel_getpeername
+EXPORT_SYMBOL vmlinux 0x4fad3da0	bdev_stack_limits
+EXPORT_SYMBOL vmlinux 0x4fdee897	i8042_command
+EXPORT_SYMBOL vmlinux 0x4fdf87f6	kmem_cache_free
+EXPORT_SYMBOL vmlinux 0x4fe0a54e	ps2_begin_command
+EXPORT_SYMBOL vmlinux 0x501a9f7c	kmem_cache_create
+EXPORT_SYMBOL vmlinux 0x50211ee3	tcp_free_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x506746b6	getrawmonotonic
+EXPORT_SYMBOL vmlinux 0x506dd9b5	DAC1064_global_init
+EXPORT_SYMBOL vmlinux 0x508a0ec6	blk_init_tags
+EXPORT_SYMBOL vmlinux 0x508f4a33	bio_copy_kern
+EXPORT_SYMBOL vmlinux 0x50ae3c54	_lv1_gpu_attribute
+EXPORT_SYMBOL vmlinux 0x50b15c53	_read_unlock_irqrestore
+EXPORT_SYMBOL vmlinux 0x50d56018	posix_acl_equiv_mode
+EXPORT_SYMBOL vmlinux 0x50e274cd	pagecache_write_end
+EXPORT_SYMBOL vmlinux 0x50ee9b94	sock_common_recvmsg
+EXPORT_SYMBOL vmlinux 0x50f31e52	bio_init
+EXPORT_SYMBOL vmlinux 0x5118c382	secure_dccp_sequence_number
+EXPORT_SYMBOL vmlinux 0x51a25c69	tcf_hash_new_index
+EXPORT_SYMBOL vmlinux 0x51dce73b	xfrm_state_walk_init
+EXPORT_SYMBOL vmlinux 0x51f70ded	inet_add_protocol
+EXPORT_SYMBOL vmlinux 0x52026cdf	security_sb_parse_opts_str
+EXPORT_SYMBOL vmlinux 0x524b0479	journal_init_dev
+EXPORT_SYMBOL vmlinux 0x525740e2	dquot_commit
+EXPORT_SYMBOL vmlinux 0x525b8b02	neigh_connected_output
+EXPORT_SYMBOL vmlinux 0x52760ca9	getnstimeofday
+EXPORT_SYMBOL vmlinux 0x527830ff	pmac_xpram_read
+EXPORT_SYMBOL vmlinux 0x5295d977	tcf_register_action
+EXPORT_SYMBOL vmlinux 0x52a58c24	ifla_policy
+EXPORT_SYMBOL vmlinux 0x52acd4f6	sock_no_recvmsg
+EXPORT_SYMBOL vmlinux 0x52b3afe1	tcp_gro_complete
+EXPORT_SYMBOL vmlinux 0x52d7b2fd	llc_sap_list
+EXPORT_SYMBOL vmlinux 0x52e3fa05	_lv1_allocate_memory
+EXPORT_SYMBOL vmlinux 0x52ebb126	param_get_ushort
+EXPORT_SYMBOL vmlinux 0x52f1997c	lro_receive_skb
+EXPORT_SYMBOL vmlinux 0x5302502f	ethtool_op_get_ufo
+EXPORT_SYMBOL vmlinux 0x530b1e98	pm_suspend
+EXPORT_SYMBOL vmlinux 0x5315f750	__wake_up_bit
+EXPORT_SYMBOL vmlinux 0x53326531	mempool_alloc_pages
+EXPORT_SYMBOL vmlinux 0x5339f5f8	_lv1_read_virtual_uart
+EXPORT_SYMBOL vmlinux 0x536da764	generic_file_aio_read
+EXPORT_SYMBOL vmlinux 0x53819fbe	sk_stream_write_space
+EXPORT_SYMBOL vmlinux 0x538824c9	__blk_end_request_all
+EXPORT_SYMBOL vmlinux 0x53c0767c	sk_chk_filter
+EXPORT_SYMBOL vmlinux 0x53d91e59	_spin_unlock_bh
+EXPORT_SYMBOL vmlinux 0x53ebab1b	_outsl_ns
+EXPORT_SYMBOL vmlinux 0x540acaee	remove_inode_hash
+EXPORT_SYMBOL vmlinux 0x541d4169	vfs_getattr
+EXPORT_SYMBOL vmlinux 0x54290dc9	nla_validate
+EXPORT_SYMBOL vmlinux 0x54470367	down
+EXPORT_SYMBOL vmlinux 0x548f6b16	copy_4K_page
+EXPORT_SYMBOL vmlinux 0x54c6479c	__percpu_counter_sum
+EXPORT_SYMBOL vmlinux 0x54d37d0c	tcp_sync_mss
+EXPORT_SYMBOL vmlinux 0x54e6fcdd	net_enable_timestamp
+EXPORT_SYMBOL vmlinux 0x54ec56f5	ps3_sb_event_receive_port_setup
+EXPORT_SYMBOL vmlinux 0x554232d6	tcf_unregister_action
+EXPORT_SYMBOL vmlinux 0x55460289	netif_rx_ni
+EXPORT_SYMBOL vmlinux 0x554ab7e0	find_get_pages_contig
+EXPORT_SYMBOL vmlinux 0x554e43f7	devm_ioremap_prot
+EXPORT_SYMBOL vmlinux 0x556b5fd9	no_llseek
+EXPORT_SYMBOL vmlinux 0x5576f948	ether_setup
+EXPORT_SYMBOL vmlinux 0x557b3dd8	_lv1_gpu_close
+EXPORT_SYMBOL vmlinux 0x5580a636	ip_dev_find
+EXPORT_SYMBOL vmlinux 0x5594be03	bitmap_remap
+EXPORT_SYMBOL vmlinux 0x55a286bf	proc_dointvec_minmax
+EXPORT_SYMBOL vmlinux 0x55a6bc22	jbd2_journal_ack_err
+EXPORT_SYMBOL vmlinux 0x55b02baf	pci_unregister_driver
+EXPORT_SYMBOL vmlinux 0x55ce7da3	tcp_ioctl
+EXPORT_SYMBOL vmlinux 0x55eda730	vfs_llseek
+EXPORT_SYMBOL vmlinux 0x5600495e	qdisc_class_hash_grow
+EXPORT_SYMBOL vmlinux 0x5600904f	fb_get_color_depth
+EXPORT_SYMBOL vmlinux 0x5603cf43	do_settimeofday
+EXPORT_SYMBOL vmlinux 0x560d0f68	gnet_stats_finish_copy
+EXPORT_SYMBOL vmlinux 0x5614b010	xfrm_policy_walk_done
+EXPORT_SYMBOL vmlinux 0x56278dbb	do_truncate
+EXPORT_SYMBOL vmlinux 0x5635a60a	vmalloc_user
+EXPORT_SYMBOL vmlinux 0x5639fccd	xfrm_bundle_ok
+EXPORT_SYMBOL vmlinux 0x5666e6e5	get_phy_device
+EXPORT_SYMBOL vmlinux 0x56678d15	blk_make_request
+EXPORT_SYMBOL vmlinux 0x568804ee	_lv1_destruct_event_receive_port
+EXPORT_SYMBOL vmlinux 0x56a10763	csum_tcpudp_magic
+EXPORT_SYMBOL vmlinux 0x56a91e8d	vlan_gro_frags
+EXPORT_SYMBOL vmlinux 0x56c2b95b	rtas_progress
+EXPORT_SYMBOL vmlinux 0x56c8799d	scsi_kunmap_atomic_sg
+EXPORT_SYMBOL vmlinux 0x56d81721	inet_csk_clear_xmit_timers
+EXPORT_SYMBOL vmlinux 0x56f38712	schedule_delayed_work_on
+EXPORT_SYMBOL vmlinux 0x56f494e0	smp_call_function
+EXPORT_SYMBOL vmlinux 0x571850dc	fb_set_var
+EXPORT_SYMBOL vmlinux 0x572253c2	tty_unregister_device
+EXPORT_SYMBOL vmlinux 0x57235917	ide_proc_register_driver
+EXPORT_SYMBOL vmlinux 0x572e85d4	blk_lookup_devt
+EXPORT_SYMBOL vmlinux 0x573eb9f0	dma_pool_destroy
+EXPORT_SYMBOL vmlinux 0x57503fb9	neigh_resolve_output
+EXPORT_SYMBOL vmlinux 0x57887df5	destroy_EII_client
+EXPORT_SYMBOL vmlinux 0x579bab50	_lv1_gpu_memory_free
+EXPORT_SYMBOL vmlinux 0x57b0fab9	ll_rw_block
+EXPORT_SYMBOL vmlinux 0x57b57ebe	jiffies_to_timespec
+EXPORT_SYMBOL vmlinux 0x57c08b58	__dst_free
+EXPORT_SYMBOL vmlinux 0x57daa41a	pcim_iomap_table
+EXPORT_SYMBOL vmlinux 0x57db7242	mangle_path
+EXPORT_SYMBOL vmlinux 0x5838f6c9	rtc_valid_tm
+EXPORT_SYMBOL vmlinux 0x5857b225	ioread16_rep
+EXPORT_SYMBOL vmlinux 0x5857e434	groups_free
+EXPORT_SYMBOL vmlinux 0x585a4120	__splice_from_pipe
+EXPORT_SYMBOL vmlinux 0x58627899	splice_from_pipe_end
+EXPORT_SYMBOL vmlinux 0x586b609a	vfs_lstat
+EXPORT_SYMBOL vmlinux 0x5879d96c	vlan_dev_vlan_id
+EXPORT_SYMBOL vmlinux 0x588517d6	generic_getxattr
+EXPORT_SYMBOL vmlinux 0x58add4cb	phy_register_fixup_for_uid
+EXPORT_SYMBOL vmlinux 0x58addbb2	sock_get_timestamp
+EXPORT_SYMBOL vmlinux 0x58c5336e	bmap
+EXPORT_SYMBOL vmlinux 0x58f6dd73	vfs_dq_quota_on_remount
+EXPORT_SYMBOL vmlinux 0x590bd3ca	module_put
+EXPORT_SYMBOL vmlinux 0x592abc7e	prepare_kernel_cred
+EXPORT_SYMBOL vmlinux 0x5934392b	fb_register_client
+EXPORT_SYMBOL vmlinux 0x593c38a4	skb_gro_reset_offset
+EXPORT_SYMBOL vmlinux 0x594bf15b	ioport_map
+EXPORT_SYMBOL vmlinux 0x595d0946	empty_zero_page
+EXPORT_SYMBOL vmlinux 0x596d6917	inet_bind
+EXPORT_SYMBOL vmlinux 0x599f6229	i2c_bit_add_numbered_bus
+EXPORT_SYMBOL vmlinux 0x59c56a56	napi_gro_receive
+EXPORT_SYMBOL vmlinux 0x59d696b6	register_module_notifier
+EXPORT_SYMBOL vmlinux 0x59daa6bc	simple_transaction_release
+EXPORT_SYMBOL vmlinux 0x59e406f4	bio_free
+EXPORT_SYMBOL vmlinux 0x59eef4d1	sock_common_getsockopt
+EXPORT_SYMBOL vmlinux 0x5a25b14e	vmtruncate
+EXPORT_SYMBOL vmlinux 0x5a2a3876	inet_unregister_protosw
+EXPORT_SYMBOL vmlinux 0x5a347e64	pcim_enable_device
+EXPORT_SYMBOL vmlinux 0x5a34a45c	__kmalloc
+EXPORT_SYMBOL vmlinux 0x5a38190f	sock_wmalloc
+EXPORT_SYMBOL vmlinux 0x5a57f9c1	fput
+EXPORT_SYMBOL vmlinux 0x5a5e7ea3	simple_read_from_buffer
+EXPORT_SYMBOL vmlinux 0x5a6534c9	of_n_size_cells
+EXPORT_SYMBOL vmlinux 0x5a744b86	netlink_set_nonroot
+EXPORT_SYMBOL vmlinux 0x5a794999	of_device_uevent
+EXPORT_SYMBOL vmlinux 0x5a969373	blk_queue_alignment_offset
+EXPORT_SYMBOL vmlinux 0x5aae59f2	sk_receive_skb
+EXPORT_SYMBOL vmlinux 0x5ae887a7	i2c_clients_command
+EXPORT_SYMBOL vmlinux 0x5b12c5b9	iget_failed
+EXPORT_SYMBOL vmlinux 0x5b23e70a	tty_schedule_flip
+EXPORT_SYMBOL vmlinux 0x5b27bcec	sysctl_intvec
+EXPORT_SYMBOL vmlinux 0x5b43f1f1	rtas_service_present
+EXPORT_SYMBOL vmlinux 0x5b5e3eb7	netdev_rx_csum_fault
+EXPORT_SYMBOL vmlinux 0x5bbdc16a	input_register_handler
+EXPORT_SYMBOL vmlinux 0x5bbf80a0	macio_dev_get
+EXPORT_SYMBOL vmlinux 0x5bc23b4b	__nla_reserve
+EXPORT_SYMBOL vmlinux 0x5becbadf	do_sync_read
+EXPORT_SYMBOL vmlinux 0x5bee05b4	sk_filter
+EXPORT_SYMBOL vmlinux 0x5bf97472	d_instantiate
+EXPORT_SYMBOL vmlinux 0x5bfa679d	dev_set_mac_address
+EXPORT_SYMBOL vmlinux 0x5c471c4f	blk_get_backing_dev_info
+EXPORT_SYMBOL vmlinux 0x5c4e9383	tty_shutdown
+EXPORT_SYMBOL vmlinux 0x5cc5b658	kfifo_alloc
+EXPORT_SYMBOL vmlinux 0x5cc8e015	iov_iter_single_seg_count
+EXPORT_SYMBOL vmlinux 0x5ccc9045	_lv1_close_device
+EXPORT_SYMBOL vmlinux 0x5ce85bd4	scsi_remove_host
+EXPORT_SYMBOL vmlinux 0x5cf30e10	__debugger_ipi
+EXPORT_SYMBOL vmlinux 0x5d12b3fc	twl4030_i2c_write_u8
+EXPORT_SYMBOL vmlinux 0x5d559474	tcf_exts_validate
+EXPORT_SYMBOL vmlinux 0x5d5e0483	kmem_cache_size
+EXPORT_SYMBOL vmlinux 0x5dbbe98e	memmove
+EXPORT_SYMBOL vmlinux 0x5dca4e7c	qdisc_list_del
+EXPORT_SYMBOL vmlinux 0x5dd39cfd	vfs_fstatat
+EXPORT_SYMBOL vmlinux 0x5e2670ba	inode_needs_sync
+EXPORT_SYMBOL vmlinux 0x5e507f77	nf_reinject
+EXPORT_SYMBOL vmlinux 0x5e515b31	mach_pasemi
+EXPORT_SYMBOL vmlinux 0x5e823e3f	clocksource_change_rating
+EXPORT_SYMBOL vmlinux 0x5e8c5941	insert_inode_locked4
+EXPORT_SYMBOL vmlinux 0x5e95b1cd	current_umask
+EXPORT_SYMBOL vmlinux 0x5ea1535d	kill_anon_super
+EXPORT_SYMBOL vmlinux 0x5ea520c5	tcp_select_initial_window
+EXPORT_SYMBOL vmlinux 0x5ea9ad96	put_tty_driver
+EXPORT_SYMBOL vmlinux 0x5ebdf3c0	blk_queue_bounce_limit
+EXPORT_SYMBOL vmlinux 0x5ece211c	idr_replace
+EXPORT_SYMBOL vmlinux 0x5ed040b0	pm_set_vt_switch
+EXPORT_SYMBOL vmlinux 0x5edd0762	bin2bcd
+EXPORT_SYMBOL vmlinux 0x5ef94f79	mdiobus_alloc
+EXPORT_SYMBOL vmlinux 0x5f4f9e86	of_get_address
+EXPORT_SYMBOL vmlinux 0x5f5936c3	register_nls
+EXPORT_SYMBOL vmlinux 0x5f5bce0e	mark_buffer_dirty_inode
+EXPORT_SYMBOL vmlinux 0x5f7da958	page_readlink
+EXPORT_SYMBOL vmlinux 0x5f8a2728	isa_io_base
+EXPORT_SYMBOL vmlinux 0x5fb8e413	cdrom_get_media_event
+EXPORT_SYMBOL vmlinux 0x5ffc7534	vlan_ioctl_set
+EXPORT_SYMBOL vmlinux 0x600683d3	do_unblank_screen
+EXPORT_SYMBOL vmlinux 0x60550843	vm_map_ram
+EXPORT_SYMBOL vmlinux 0x605c8bde	radix_tree_delete
+EXPORT_SYMBOL vmlinux 0x6067a146	memcpy
+EXPORT_SYMBOL vmlinux 0x607e98d4	blk_unplug
+EXPORT_SYMBOL vmlinux 0x609067e8	journal_load
+EXPORT_SYMBOL vmlinux 0x6092581c	skb_under_panic
+EXPORT_SYMBOL vmlinux 0x609f1c7e	synchronize_net
+EXPORT_SYMBOL vmlinux 0x60a0ebad	__tracepoint_kmem_cache_alloc_node
+EXPORT_SYMBOL vmlinux 0x60af3c43	slow_work_unregister_user
+EXPORT_SYMBOL vmlinux 0x60aff489	of_device_get_modalias
+EXPORT_SYMBOL vmlinux 0x60c8698e	xfrm_state_delete_tunnel
+EXPORT_SYMBOL vmlinux 0x60d674d0	dev_trans_start
+EXPORT_SYMBOL vmlinux 0x60dc1a9c	unregister_quota_format
+EXPORT_SYMBOL vmlinux 0x610c1cb2	unbind_con_driver
+EXPORT_SYMBOL vmlinux 0x61117b15	inet_dgram_ops
+EXPORT_SYMBOL vmlinux 0x61226ab5	pneigh_lookup
+EXPORT_SYMBOL vmlinux 0x612390ad	netpoll_set_trap
+EXPORT_SYMBOL vmlinux 0x6144ad16	devm_ioremap_nocache
+EXPORT_SYMBOL vmlinux 0x614efdba	tty_name
+EXPORT_SYMBOL vmlinux 0x616f7708	pci_request_region_exclusive
+EXPORT_SYMBOL vmlinux 0x618d8299	set_notify_swap_entry_free
+EXPORT_SYMBOL vmlinux 0x61a4487c	_lv1_gpu_device_unmap
+EXPORT_SYMBOL vmlinux 0x61b7b126	simple_strtoull
+EXPORT_SYMBOL vmlinux 0x61beb65f	neigh_for_each
+EXPORT_SYMBOL vmlinux 0x61dcdcd3	_lv1_pause
+EXPORT_SYMBOL vmlinux 0x61eef2c9	_insb
+EXPORT_SYMBOL vmlinux 0x61f1c4e0	scsi_scan_target
+EXPORT_SYMBOL vmlinux 0x620060ec	mod_timer
+EXPORT_SYMBOL vmlinux 0x620efe87	register_tcf_proto_ops
+EXPORT_SYMBOL vmlinux 0x621fdc55	scsi_get_command
+EXPORT_SYMBOL vmlinux 0x6220b988	_spin_lock_irq
+EXPORT_SYMBOL vmlinux 0x62213951	pcim_iounmap_regions
+EXPORT_SYMBOL vmlinux 0x62492331	submit_bh
+EXPORT_SYMBOL vmlinux 0x6254071f	vfs_quota_disable
+EXPORT_SYMBOL vmlinux 0x625a7d77	tr_type_trans
+EXPORT_SYMBOL vmlinux 0x625cc1c9	__devm_request_region
+EXPORT_SYMBOL vmlinux 0x62737e1d	sock_unregister
+EXPORT_SYMBOL vmlinux 0x627c63d7	unregister_framebuffer
+EXPORT_SYMBOL vmlinux 0x62827bec	security_secctx_to_secid
+EXPORT_SYMBOL vmlinux 0x62879a44	of_platform_device_create
+EXPORT_SYMBOL vmlinux 0x628ea400	vfs_quota_on
+EXPORT_SYMBOL vmlinux 0x62985ce2	matrox_millennium
+EXPORT_SYMBOL vmlinux 0x62f8bc2e	of_get_pci_address
+EXPORT_SYMBOL vmlinux 0x62fa9a16	bioset_integrity_free
+EXPORT_SYMBOL vmlinux 0x6353edc6	pci_find_parent_resource
+EXPORT_SYMBOL vmlinux 0x6360d639	cpu_all_bits
+EXPORT_SYMBOL vmlinux 0x638c172e	vfs_fstat
+EXPORT_SYMBOL vmlinux 0x63d4206a	sg_miter_start
+EXPORT_SYMBOL vmlinux 0x63df5b91	pci_select_bars
+EXPORT_SYMBOL vmlinux 0x63ecad53	register_netdevice_notifier
+EXPORT_SYMBOL vmlinux 0x63f75920	_lv1_construct_virtual_address_space
+EXPORT_SYMBOL vmlinux 0x6403e338	tcp_memory_pressure
+EXPORT_SYMBOL vmlinux 0x640d5d49	netif_device_attach
+EXPORT_SYMBOL vmlinux 0x64203002	mark_buffer_async_write
+EXPORT_SYMBOL vmlinux 0x6452212f	try_to_del_timer_sync
+EXPORT_SYMBOL vmlinux 0x6452d61b	deactivate_locked_super
+EXPORT_SYMBOL vmlinux 0x646cc6ab	pmu_poll
+EXPORT_SYMBOL vmlinux 0x64801d95	vfs_create
+EXPORT_SYMBOL vmlinux 0x648cb093	vfs_set_dqblk
+EXPORT_SYMBOL vmlinux 0x64998ec3	dma_pool_alloc
+EXPORT_SYMBOL vmlinux 0x64999478	congestion_wait
+EXPORT_SYMBOL vmlinux 0x650007a4	journal_ack_err
+EXPORT_SYMBOL vmlinux 0x65022a24	radix_tree_prev_hole
+EXPORT_SYMBOL vmlinux 0x6504ebc0	i2c_smbus_read_block_data
+EXPORT_SYMBOL vmlinux 0x650a66b4	submit_bio
+EXPORT_SYMBOL vmlinux 0x651a4139	test_taint
+EXPORT_SYMBOL vmlinux 0x65263739	dev_get_flags
+EXPORT_SYMBOL vmlinux 0x65281a43	netif_rx
+EXPORT_SYMBOL vmlinux 0x653e5922	sock_i_uid
+EXPORT_SYMBOL vmlinux 0x65408378	zlib_inflate_blob
+EXPORT_SYMBOL vmlinux 0x65414e67	dev_valid_name
+EXPORT_SYMBOL vmlinux 0x65422628	vga_get
+EXPORT_SYMBOL vmlinux 0x658fa60f	matroxfb_wait_for_sync
+EXPORT_SYMBOL vmlinux 0x65c58e65	netlink_rcv_skb
+EXPORT_SYMBOL vmlinux 0x65c95ebb	llc_sap_open
+EXPORT_SYMBOL vmlinux 0x65f3277f	neigh_seq_next
+EXPORT_SYMBOL vmlinux 0x65f4af5f	prepare_to_wait
+EXPORT_SYMBOL vmlinux 0x660484ca	__sk_dst_check
+EXPORT_SYMBOL vmlinux 0x6614bc28	netif_carrier_off
+EXPORT_SYMBOL vmlinux 0x661a5783	proc_dointvec_userhz_jiffies
+EXPORT_SYMBOL vmlinux 0x662eb654	phy_start
+EXPORT_SYMBOL vmlinux 0x663d2c44	tty_port_tty_get
+EXPORT_SYMBOL vmlinux 0x66478a78	scsi_device_lookup
+EXPORT_SYMBOL vmlinux 0x6652193d	input_register_device
+EXPORT_SYMBOL vmlinux 0x66537089	page_symlink_inode_operations
+EXPORT_SYMBOL vmlinux 0x66866246	neigh_seq_stop
+EXPORT_SYMBOL vmlinux 0x668da8d5	zlib_inflateIncomp
+EXPORT_SYMBOL vmlinux 0x668dd22a	cad_pid
+EXPORT_SYMBOL vmlinux 0x66ad1cb3	_lv1_set_lpm_general_control
+EXPORT_SYMBOL vmlinux 0x66b224d2	bio_kmalloc
+EXPORT_SYMBOL vmlinux 0x66bfb9d9	bdget_disk
+EXPORT_SYMBOL vmlinux 0x66cbf14b	pmac_xpram_write
+EXPORT_SYMBOL vmlinux 0x67053080	current_kernel_time
+EXPORT_SYMBOL vmlinux 0x6717af9d	close_bdev_exclusive
+EXPORT_SYMBOL vmlinux 0x672144bd	strlcpy
+EXPORT_SYMBOL vmlinux 0x67225d30	generic_delete_inode
+EXPORT_SYMBOL vmlinux 0x672ee05b	vlan_dev_real_dev
+EXPORT_SYMBOL vmlinux 0x674acbf7	misc_register
+EXPORT_SYMBOL vmlinux 0x676e3291	down_write
+EXPORT_SYMBOL vmlinux 0x67c769f3	d_invalidate
+EXPORT_SYMBOL vmlinux 0x67ca06b5	netpoll_print_options
+EXPORT_SYMBOL vmlinux 0x67fea51a	blk_queue_ordered
+EXPORT_SYMBOL vmlinux 0x680b0e7f	serio_rescan
+EXPORT_SYMBOL vmlinux 0x680fe7d0	genphy_restart_aneg
+EXPORT_SYMBOL vmlinux 0x685d4d32	netlink_set_err
+EXPORT_SYMBOL vmlinux 0x6860d3d0	skb_copy_expand
+EXPORT_SYMBOL vmlinux 0x68628e77	_write_lock_bh
+EXPORT_SYMBOL vmlinux 0x6878d7a9	dmam_pool_create
+EXPORT_SYMBOL vmlinux 0x68aa82ed	get_unmapped_area_prot
+EXPORT_SYMBOL vmlinux 0x68c7760d	request_key
+EXPORT_SYMBOL vmlinux 0x68e1ef51	smu_present
+EXPORT_SYMBOL vmlinux 0x68fb0500	nobh_truncate_page
+EXPORT_SYMBOL vmlinux 0x690137a8	tty_set_operations
+EXPORT_SYMBOL vmlinux 0x690da496	ida_init
+EXPORT_SYMBOL vmlinux 0x69163733	scsi_unblock_requests
+EXPORT_SYMBOL vmlinux 0x694a482e	wireless_spy_update
+EXPORT_SYMBOL vmlinux 0x6954bf79	vlan_gro_receive
+EXPORT_SYMBOL vmlinux 0x69579869	dev_add_pack
+EXPORT_SYMBOL vmlinux 0x6971447a	rtc_month_days
+EXPORT_SYMBOL vmlinux 0x697cb0a0	sysctl_ms_jiffies
+EXPORT_SYMBOL vmlinux 0x6980fe91	param_get_int
+EXPORT_SYMBOL vmlinux 0x6989875b	add_wait_queue
+EXPORT_SYMBOL vmlinux 0x69927dff	try_acquire_console_sem
+EXPORT_SYMBOL vmlinux 0x699b9ef6	simple_sync_file
+EXPORT_SYMBOL vmlinux 0x699ccbf8	_lv1_deconfigure_virtual_uart_irq
+EXPORT_SYMBOL vmlinux 0x69a0ca7d	iowrite16be
+EXPORT_SYMBOL vmlinux 0x69a358a6	iomem_resource
+EXPORT_SYMBOL vmlinux 0x69b4208d	complete_and_exit
+EXPORT_SYMBOL vmlinux 0x69b7ed3e	current_fs_time
+EXPORT_SYMBOL vmlinux 0x69c8c1d5	security_req_classify_flow
+EXPORT_SYMBOL vmlinux 0x69d11bbc	inode_get_bytes
+EXPORT_SYMBOL vmlinux 0x69d38ed9	__scsi_print_sense
+EXPORT_SYMBOL vmlinux 0x69e27c7a	bitmap_copy_le
+EXPORT_SYMBOL vmlinux 0x69f32610	__cputime_msec_factor
+EXPORT_SYMBOL vmlinux 0x6a037cf1	mempool_kfree
+EXPORT_SYMBOL vmlinux 0x6a0fb1b8	xfrm_init_state
+EXPORT_SYMBOL vmlinux 0x6a47571d	__set_personality
+EXPORT_SYMBOL vmlinux 0x6a5fa363	sigprocmask
+EXPORT_SYMBOL vmlinux 0x6a61f874	to_tm
+EXPORT_SYMBOL vmlinux 0x6a76f3ac	blk_iopoll_enable
+EXPORT_SYMBOL vmlinux 0x6a8c9ea5	jbd2_journal_revoke
+EXPORT_SYMBOL vmlinux 0x6aa0d6a7	get_empty_filp
+EXPORT_SYMBOL vmlinux 0x6ab7d26a	scsi_kmap_atomic_sg
+EXPORT_SYMBOL vmlinux 0x6acb973d	iowrite32be
+EXPORT_SYMBOL vmlinux 0x6ad065f4	param_set_charp
+EXPORT_SYMBOL vmlinux 0x6ae5fe10	skb_pull
+EXPORT_SYMBOL vmlinux 0x6af0b3fa	inode_init_once
+EXPORT_SYMBOL vmlinux 0x6b1b67d3	__bdevname
+EXPORT_SYMBOL vmlinux 0x6b2dc060	dump_stack
+EXPORT_SYMBOL vmlinux 0x6b387694	_lv1_end_of_interrupt_ext
+EXPORT_SYMBOL vmlinux 0x6b49ef1a	sget
+EXPORT_SYMBOL vmlinux 0x6b4e5a52	radix_tree_lookup_slot
+EXPORT_SYMBOL vmlinux 0x6b589a6e	_lv1_net_add_multicast_address
+EXPORT_SYMBOL vmlinux 0x6b5dfe73	__debugger_bpt
+EXPORT_SYMBOL vmlinux 0x6b6f0c4b	_lv1_create_repository_node
+EXPORT_SYMBOL vmlinux 0x6bae093c	fsync_bdev
+EXPORT_SYMBOL vmlinux 0x6bbf9462	generic_show_options
+EXPORT_SYMBOL vmlinux 0x6bc3fbc0	__unregister_chrdev
+EXPORT_SYMBOL vmlinux 0x6bc56c67	radix_tree_next_hole
+EXPORT_SYMBOL vmlinux 0x6bdcfd99	qdisc_class_hash_remove
+EXPORT_SYMBOL vmlinux 0x6bf5b5a7	arp_tbl
+EXPORT_SYMBOL vmlinux 0x6c307ac5	register_gifconf
+EXPORT_SYMBOL vmlinux 0x6c45358e	unregister_tcf_proto_ops
+EXPORT_SYMBOL vmlinux 0x6c61ce70	num_registered_fb
+EXPORT_SYMBOL vmlinux 0x6c702af7	sysctl_udp_rmem_min
+EXPORT_SYMBOL vmlinux 0x6c70847c	km_policy_notify
+EXPORT_SYMBOL vmlinux 0x6c8695db	alloc_hippi_dev
+EXPORT_SYMBOL vmlinux 0x6cadac68	fetch_dev_dn
+EXPORT_SYMBOL vmlinux 0x6cbfe63b	boot_tvec_bases
+EXPORT_SYMBOL vmlinux 0x6cccc1a7	d_prune_aliases
+EXPORT_SYMBOL vmlinux 0x6cd53f6a	__set_page_dirty_nobuffers
+EXPORT_SYMBOL vmlinux 0x6cf9e917	alloc_tty_driver
+EXPORT_SYMBOL vmlinux 0x6d0b77fe	sysctl_data
+EXPORT_SYMBOL vmlinux 0x6d1743eb	_lv1_get_total_execution_time
+EXPORT_SYMBOL vmlinux 0x6d1d5f8a	skb_put
+EXPORT_SYMBOL vmlinux 0x6d27ef64	__bitmap_empty
+EXPORT_SYMBOL vmlinux 0x6d294e43	clock_t_to_jiffies
+EXPORT_SYMBOL vmlinux 0x6d3d0f1f	tty_vhangup
+EXPORT_SYMBOL vmlinux 0x6d54983c	kill_litter_super
+EXPORT_SYMBOL vmlinux 0x6d625f3b	rwsem_down_read_failed
+EXPORT_SYMBOL vmlinux 0x6d659d3b	ip_defrag
+EXPORT_SYMBOL vmlinux 0x6d6cbadc	rb_last
+EXPORT_SYMBOL vmlinux 0x6d8aa715	blk_queue_end_tag
+EXPORT_SYMBOL vmlinux 0x6d8ac801	jbd2_log_wait_commit
+EXPORT_SYMBOL vmlinux 0x6da928f4	_insw_ns
+EXPORT_SYMBOL vmlinux 0x6dbed3c3	f_setown
+EXPORT_SYMBOL vmlinux 0x6de6bf83	radix_tree_lookup
+EXPORT_SYMBOL vmlinux 0x6def2db2	half_md4_transform
+EXPORT_SYMBOL vmlinux 0x6df0d01c	gnet_stats_copy_basic
+EXPORT_SYMBOL vmlinux 0x6df9c596	do_mmap_pgoff
+EXPORT_SYMBOL vmlinux 0x6dfa3134	fd_install
+EXPORT_SYMBOL vmlinux 0x6e2ee118	ip_mc_dec_group
+EXPORT_SYMBOL vmlinux 0x6e3088a0	qdisc_watchdog_init
+EXPORT_SYMBOL vmlinux 0x6e311fc0	journal_flush
+EXPORT_SYMBOL vmlinux 0x6e370f8f	simple_rmdir
+EXPORT_SYMBOL vmlinux 0x6e41887c	pci_assign_resource
+EXPORT_SYMBOL vmlinux 0x6e720ff2	rtnl_unlock
+EXPORT_SYMBOL vmlinux 0x6e802324	radix_tree_tag_get
+EXPORT_SYMBOL vmlinux 0x6e955b28	security_sb_set_mnt_opts
+EXPORT_SYMBOL vmlinux 0x6e9dd606	__symbol_put
+EXPORT_SYMBOL vmlinux 0x6e9de31a	dev_close
+EXPORT_SYMBOL vmlinux 0x6ea4be70	del_timer
+EXPORT_SYMBOL vmlinux 0x6ee400dc	framebuffer_release
+EXPORT_SYMBOL vmlinux 0x6f0874da	netif_napi_add
+EXPORT_SYMBOL vmlinux 0x6f6d6252	mb_cache_entry_find_first
+EXPORT_SYMBOL vmlinux 0x6fa331ed	_lv1_construct_io_irq_outlet
+EXPORT_SYMBOL vmlinux 0x6fb4610d	napi_reuse_skb
+EXPORT_SYMBOL vmlinux 0x6fcb87a1	touch_softlockup_watchdog
+EXPORT_SYMBOL vmlinux 0x6fde556f	clear_inode
+EXPORT_SYMBOL vmlinux 0x6fff393f	time_to_tm
+EXPORT_SYMBOL vmlinux 0x700a2a26	dev_alloc_skb
+EXPORT_SYMBOL vmlinux 0x701699b2	_lv1_set_spe_privilege_state_area_1_register
+EXPORT_SYMBOL vmlinux 0x7035ea60	blk_free_tags
+EXPORT_SYMBOL vmlinux 0x704467a5	xfrm_unregister_km
+EXPORT_SYMBOL vmlinux 0x704c4365	__cputime_sec_factor
+EXPORT_SYMBOL vmlinux 0x704f2643	security_path_symlink
+EXPORT_SYMBOL vmlinux 0x70523a7a	__cond_resched_softirq
+EXPORT_SYMBOL vmlinux 0x7054a3e4	request_dma
+EXPORT_SYMBOL vmlinux 0x70814b31	unregister_8022_client
+EXPORT_SYMBOL vmlinux 0x709064b2	dcache_readdir
+EXPORT_SYMBOL vmlinux 0x70a82f05	ip_generic_getfrag
+EXPORT_SYMBOL vmlinux 0x70b1f7e4	skb_append_datato_frags
+EXPORT_SYMBOL vmlinux 0x70bc17d7	inode_wait
+EXPORT_SYMBOL vmlinux 0x70e1d74f	kernel_listen
+EXPORT_SYMBOL vmlinux 0x70ea5691	blk_queue_max_sectors
+EXPORT_SYMBOL vmlinux 0x70f86c70	pmu_queue_request
+EXPORT_SYMBOL vmlinux 0x7108e0aa	send_sig_info
+EXPORT_SYMBOL vmlinux 0x7129e5f8	hex_asc
+EXPORT_SYMBOL vmlinux 0x7146e890	key_unlink
+EXPORT_SYMBOL vmlinux 0x7154d7a7	mem_section
+EXPORT_SYMBOL vmlinux 0x716bab92	sock_no_listen
+EXPORT_SYMBOL vmlinux 0x717242e7	rtas_data_buf_lock
+EXPORT_SYMBOL vmlinux 0x717c4306	jbd2_journal_init_jbd_inode
+EXPORT_SYMBOL vmlinux 0x71a50dbc	register_blkdev
+EXPORT_SYMBOL vmlinux 0x71afdcea	llc_add_pack
+EXPORT_SYMBOL vmlinux 0x71b819c3	swiotlb_sync_sg_for_device
+EXPORT_SYMBOL vmlinux 0x71d51644	set_groups
+EXPORT_SYMBOL vmlinux 0x723ded18	of_find_device_by_node
+EXPORT_SYMBOL vmlinux 0x7242e96d	strnchr
+EXPORT_SYMBOL vmlinux 0x729b4a83	_lv1_get_spe_all_interrupt_statuses
+EXPORT_SYMBOL vmlinux 0x72afe962	posix_lock_file
+EXPORT_SYMBOL vmlinux 0x72b243d4	free_dma
+EXPORT_SYMBOL vmlinux 0x72b4877f	remove_arg_zero
+EXPORT_SYMBOL vmlinux 0x72b4a511	key_validate
+EXPORT_SYMBOL vmlinux 0x72c3be87	param_set_byte
+EXPORT_SYMBOL vmlinux 0x72e8e55a	blk_rq_init
+EXPORT_SYMBOL vmlinux 0x72ea7b2d	scsi_device_type
+EXPORT_SYMBOL vmlinux 0x731a747a	pci_io_base
+EXPORT_SYMBOL vmlinux 0x73334f2b	phy_device_create
+EXPORT_SYMBOL vmlinux 0x73445da6	read_cache_page_async
+EXPORT_SYMBOL vmlinux 0x737056c2	fb_blank
+EXPORT_SYMBOL vmlinux 0x73a3032f	slow_work_register_user
+EXPORT_SYMBOL vmlinux 0x73c64a58	swiotlb_sync_sg_for_cpu
+EXPORT_SYMBOL vmlinux 0x73ce6b3a	gnet_stats_start_copy_compat
+EXPORT_SYMBOL vmlinux 0x73ec4a90	inet_listen
+EXPORT_SYMBOL vmlinux 0x73fc5910	__sk_mem_reclaim
+EXPORT_SYMBOL vmlinux 0x744c0c68	param_get_byte
+EXPORT_SYMBOL vmlinux 0x74559a0e	km_report
+EXPORT_SYMBOL vmlinux 0x7485e15e	unregister_chrdev_region
+EXPORT_SYMBOL vmlinux 0x74954462	timecounter_read
+EXPORT_SYMBOL vmlinux 0x74b496ce	bio_alloc_bioset
+EXPORT_SYMBOL vmlinux 0x74bfc369	__tracepoint_kmem_cache_alloc
+EXPORT_SYMBOL vmlinux 0x74cc1cbe	unregister_cpu_notifier
+EXPORT_SYMBOL vmlinux 0x74d12f70	generic_file_llseek_unlocked
+EXPORT_SYMBOL vmlinux 0x74f07b01	dev_kfree_skb_any
+EXPORT_SYMBOL vmlinux 0x74fbfcd0	netlink_dump_start
+EXPORT_SYMBOL vmlinux 0x74fe8730	sys_ctrler
+EXPORT_SYMBOL vmlinux 0x7515f1d0	blk_remove_plug
+EXPORT_SYMBOL vmlinux 0x75293402	pci_bus_write_config_word
+EXPORT_SYMBOL vmlinux 0x75314230	pskb_expand_head
+EXPORT_SYMBOL vmlinux 0x75408047	nf_setsockopt
+EXPORT_SYMBOL vmlinux 0x75535adb	dev_unicast_delete
+EXPORT_SYMBOL vmlinux 0x756c786e	_lv1_connect_interrupt_event_receive_port
+EXPORT_SYMBOL vmlinux 0x756e6992	strnicmp
+EXPORT_SYMBOL vmlinux 0x75754995	_lv1_storage_check_async_status
+EXPORT_SYMBOL vmlinux 0x757883b8	alloc_file
+EXPORT_SYMBOL vmlinux 0x75a1809a	blk_register_region
+EXPORT_SYMBOL vmlinux 0x75bdea12	iommu_area_alloc
+EXPORT_SYMBOL vmlinux 0x75d51f97	pcibios_bus_to_resource
+EXPORT_SYMBOL vmlinux 0x75d5f7d1	jbd2_journal_blocks_per_page
+EXPORT_SYMBOL vmlinux 0x75d5fa30	tcf_em_register
+EXPORT_SYMBOL vmlinux 0x75e4df08	call_usermodehelper_pipe
+EXPORT_SYMBOL vmlinux 0x75e4f5aa	pasemi_read_mac_reg
+EXPORT_SYMBOL vmlinux 0x760a0f4f	yield
+EXPORT_SYMBOL vmlinux 0x760b437a	unregister_inetaddr_notifier
+EXPORT_SYMBOL vmlinux 0x760b933d	key_negate_and_link
+EXPORT_SYMBOL vmlinux 0x761364bb	thaw_bdev
+EXPORT_SYMBOL vmlinux 0x7623a43c	inet_sendmsg
+EXPORT_SYMBOL vmlinux 0x7637b8a1	__serio_register_driver
+EXPORT_SYMBOL vmlinux 0x763e5f38	alloc_fcdev
+EXPORT_SYMBOL vmlinux 0x764016a0	sg_free_table
+EXPORT_SYMBOL vmlinux 0x764776f0	eth_header
+EXPORT_SYMBOL vmlinux 0x764bd77c	request_resource
+EXPORT_SYMBOL vmlinux 0x764e2224	_lv1_disconnect_irq_plug_ext
+EXPORT_SYMBOL vmlinux 0x769b25d2	_lv1_get_version_info
+EXPORT_SYMBOL vmlinux 0x76b457c7	blk_queue_dma_pad
+EXPORT_SYMBOL vmlinux 0x76bf656d	__bitmap_shift_left
+EXPORT_SYMBOL vmlinux 0x76c97a60	register_sysctl_table
+EXPORT_SYMBOL vmlinux 0x76d3cd60	laptop_mode
+EXPORT_SYMBOL vmlinux 0x76d9f5a7	pci_set_consistent_dma_mask
+EXPORT_SYMBOL vmlinux 0x76dfcebd	skb_copy_datagram_from_iovec
+EXPORT_SYMBOL vmlinux 0x770e02e2	__neigh_event_send
+EXPORT_SYMBOL vmlinux 0x77144936	_lv1_disconnect_irq_plug
+EXPORT_SYMBOL vmlinux 0x773a9c94	blk_iopoll_enabled
+EXPORT_SYMBOL vmlinux 0x773d26ef	neigh_seq_start
+EXPORT_SYMBOL vmlinux 0x7799aa67	sk_stream_wait_connect
+EXPORT_SYMBOL vmlinux 0x77cfcfde	__tracepoint_kmalloc_node
+EXPORT_SYMBOL vmlinux 0x77e1bd49	generic_permission
+EXPORT_SYMBOL vmlinux 0x77ecac9f	zlib_inflateEnd
+EXPORT_SYMBOL vmlinux 0x77f7c349	neigh_lookup
+EXPORT_SYMBOL vmlinux 0x77fa5d1f	ns_to_timespec
+EXPORT_SYMBOL vmlinux 0x77ff94a9	skb_copy_datagram_const_iovec
+EXPORT_SYMBOL vmlinux 0x78043fdb	lro_vlan_hwaccel_receive_frags
+EXPORT_SYMBOL vmlinux 0x783144a0	generic_setxattr
+EXPORT_SYMBOL vmlinux 0x783e596d	__xfrm_decode_session
+EXPORT_SYMBOL vmlinux 0x7849226d	idr_destroy
+EXPORT_SYMBOL vmlinux 0x7897d03d	napi_gro_flush
+EXPORT_SYMBOL vmlinux 0x789a17f7	_lv1_destruct_logical_spe
+EXPORT_SYMBOL vmlinux 0x78c67292	blk_queue_max_discard_sectors
+EXPORT_SYMBOL vmlinux 0x78d7ec1f	tcp_proc_unregister
+EXPORT_SYMBOL vmlinux 0x78df6bd7	no_pci_devices
+EXPORT_SYMBOL vmlinux 0x7909b2a1	iput
+EXPORT_SYMBOL vmlinux 0x790a067b	__kfree_skb
+EXPORT_SYMBOL vmlinux 0x7913adac	__percpu_counter_add
+EXPORT_SYMBOL vmlinux 0x793c336a	dentry_unhash
+EXPORT_SYMBOL vmlinux 0x7949ab9e	vfs_writev
+EXPORT_SYMBOL vmlinux 0x796fc5ce	scsi_get_sense_info_fld
+EXPORT_SYMBOL vmlinux 0x79aa04a2	get_random_bytes
+EXPORT_SYMBOL vmlinux 0x79ad224b	tasklet_kill
+EXPORT_SYMBOL vmlinux 0x79ae628f	nobh_write_end
+EXPORT_SYMBOL vmlinux 0x79d6c54a	sg_copy_from_buffer
+EXPORT_SYMBOL vmlinux 0x79d81035	jbd2_journal_restart
+EXPORT_SYMBOL vmlinux 0x7a147125	audit_log_end
+EXPORT_SYMBOL vmlinux 0x7a1f061e	write_one_page
+EXPORT_SYMBOL vmlinux 0x7a2a837d	strict_strtol
+EXPORT_SYMBOL vmlinux 0x7a4253cb	xfrm4_prepare_output
+EXPORT_SYMBOL vmlinux 0x7a4497db	kzfree
+EXPORT_SYMBOL vmlinux 0x7a7fffd6	dquot_free_inode
+EXPORT_SYMBOL vmlinux 0x7a86cd45	mutex_unlock
+EXPORT_SYMBOL vmlinux 0x7a90b40c	matrox_G100
+EXPORT_SYMBOL vmlinux 0x7a92983b	vfs_quota_on_mount
+EXPORT_SYMBOL vmlinux 0x7a9d009f	blk_plug_device_unlocked
+EXPORT_SYMBOL vmlinux 0x7aa9e259	_lv1_map_htab
+EXPORT_SYMBOL vmlinux 0x7ac1993a	eth_header_cache
+EXPORT_SYMBOL vmlinux 0x7ae73de1	alloc_pages_exact
+EXPORT_SYMBOL vmlinux 0x7b0dc60f	inet_csk_init_xmit_timers
+EXPORT_SYMBOL vmlinux 0x7b1b191a	__rta_fill
+EXPORT_SYMBOL vmlinux 0x7b63766e	locks_remove_posix
+EXPORT_SYMBOL vmlinux 0x7b63d05d	read_dev_sector
+EXPORT_SYMBOL vmlinux 0x7b8f4c40	key_create_or_update
+EXPORT_SYMBOL vmlinux 0x7bc3600a	sock_create_lite
+EXPORT_SYMBOL vmlinux 0x7be35ded	tty_hangup
+EXPORT_SYMBOL vmlinux 0x7bf932a6	block_page_mkwrite
+EXPORT_SYMBOL vmlinux 0x7bfd8929	bio_integrity_endio
+EXPORT_SYMBOL vmlinux 0x7bff3be7	iov_iter_advance
+EXPORT_SYMBOL vmlinux 0x7c13bf78	xfrm_stateonly_find
+EXPORT_SYMBOL vmlinux 0x7c1cde82	proc_dointvec_ms_jiffies
+EXPORT_SYMBOL vmlinux 0x7c2149a2	vfs_mknod
+EXPORT_SYMBOL vmlinux 0x7c32a620	i2c_verify_client
+EXPORT_SYMBOL vmlinux 0x7c46233a	cpufreq_quick_get
+EXPORT_SYMBOL vmlinux 0x7c60d66e	getname
+EXPORT_SYMBOL vmlinux 0x7c61340c	__release_region
+EXPORT_SYMBOL vmlinux 0x7c6b3ed7	scsi_calculate_bounce_limit
+EXPORT_SYMBOL vmlinux 0x7c743bc1	udp_lib_get_port
+EXPORT_SYMBOL vmlinux 0x7c859462	generic_block_bmap
+EXPORT_SYMBOL vmlinux 0x7c904ded	unregister_module_notifier
+EXPORT_SYMBOL vmlinux 0x7c9291d1	csum_partial_copy_generic
+EXPORT_SYMBOL vmlinux 0x7c9fbe8c	bioset_integrity_create
+EXPORT_SYMBOL vmlinux 0x7ca341af	kernel_thread
+EXPORT_SYMBOL vmlinux 0x7cb1ae69	cpu_down
+EXPORT_SYMBOL vmlinux 0x7cc05e97	give_up_console
+EXPORT_SYMBOL vmlinux 0x7cc08bc6	kset_register
+EXPORT_SYMBOL vmlinux 0x7ce4a153	try_wait_for_completion
+EXPORT_SYMBOL vmlinux 0x7cfe3b6f	jbd2_journal_start
+EXPORT_SYMBOL vmlinux 0x7d03ce15	__breadahead
+EXPORT_SYMBOL vmlinux 0x7d11c268	jiffies
+EXPORT_SYMBOL vmlinux 0x7d554651	bio_integrity_set_tag
+EXPORT_SYMBOL vmlinux 0x7d84a916	dmam_alloc_coherent
+EXPORT_SYMBOL vmlinux 0x7d982324	bio_clone
+EXPORT_SYMBOL vmlinux 0x7daeb8d2	generic_file_readonly_mmap
+EXPORT_SYMBOL vmlinux 0x7dc97879	rtas_get_error_log_max
+EXPORT_SYMBOL vmlinux 0x7dceceac	capable
+EXPORT_SYMBOL vmlinux 0x7dd682e8	jbd2_journal_get_create_access
+EXPORT_SYMBOL vmlinux 0x7de07a43	pneigh_enqueue
+EXPORT_SYMBOL vmlinux 0x7de59394	tcp_getsockopt
+EXPORT_SYMBOL vmlinux 0x7de5dcf5	__xfrm_lookup
+EXPORT_SYMBOL vmlinux 0x7de5eafe	up_read
+EXPORT_SYMBOL vmlinux 0x7e0d73d6	seq_puts
+EXPORT_SYMBOL vmlinux 0x7e19180c	neigh_create
+EXPORT_SYMBOL vmlinux 0x7e34f8ba	load_nls_default
+EXPORT_SYMBOL vmlinux 0x7e613127	interruptible_sleep_on
+EXPORT_SYMBOL vmlinux 0x7eaf5e2b	scsi_eh_finish_cmd
+EXPORT_SYMBOL vmlinux 0x7ec2fe05	delayed_slow_work_enqueue
+EXPORT_SYMBOL vmlinux 0x7ec9bfbc	strncpy
+EXPORT_SYMBOL vmlinux 0x7f15751a	init_file
+EXPORT_SYMBOL vmlinux 0x7f24de73	jiffies_to_usecs
+EXPORT_SYMBOL vmlinux 0x7f278f17	pci_save_state
+EXPORT_SYMBOL vmlinux 0x7f713dfa	ps3_dma_region_create
+EXPORT_SYMBOL vmlinux 0x7f8f8b76	completion_done
+EXPORT_SYMBOL vmlinux 0x7f902162	llc_set_station_handler
+EXPORT_SYMBOL vmlinux 0x7fc712d8	bio_uncopy_user
+EXPORT_SYMBOL vmlinux 0x7fd7b821	blk_integrity_compare
+EXPORT_SYMBOL vmlinux 0x7ff0290d	pipe_to_file
+EXPORT_SYMBOL vmlinux 0x8005ea88	open_exec
+EXPORT_SYMBOL vmlinux 0x801d66cb	__raw_spin_unlock_wait
+EXPORT_SYMBOL vmlinux 0x801f5a3f	__strncpy_from_user
+EXPORT_SYMBOL vmlinux 0x80428c80	__wait_on_bit_lock
+EXPORT_SYMBOL vmlinux 0x80580e4c	get_sb_bdev
+EXPORT_SYMBOL vmlinux 0x805e9c01	udp_sendmsg
+EXPORT_SYMBOL vmlinux 0x8075639a	idr_remove
+EXPORT_SYMBOL vmlinux 0x80c34e6e	cdev_init
+EXPORT_SYMBOL vmlinux 0x81091092	vfs_rename
+EXPORT_SYMBOL vmlinux 0x8123c9cd	serio_unregister_port
+EXPORT_SYMBOL vmlinux 0x812968c8	jbd2_journal_wipe
+EXPORT_SYMBOL vmlinux 0x812f20aa	jbd2_journal_file_inode
+EXPORT_SYMBOL vmlinux 0x81442648	jbd2_journal_init_dev
+EXPORT_SYMBOL vmlinux 0x815b5dd4	match_octal
+EXPORT_SYMBOL vmlinux 0x81ad395b	inode_permission
+EXPORT_SYMBOL vmlinux 0x81beb67b	sock_create_kern
+EXPORT_SYMBOL vmlinux 0x81c0a84f	rtas_set_indicator
+EXPORT_SYMBOL vmlinux 0x81cd9eb3	pci_bus_size_bridges
+EXPORT_SYMBOL vmlinux 0x81d9f7f2	_lv1_put_iopte
+EXPORT_SYMBOL vmlinux 0x81fbb612	__cond_resched_lock
+EXPORT_SYMBOL vmlinux 0x820d225f	print_mac
+EXPORT_SYMBOL vmlinux 0x8234349b	blk_get_request
+EXPORT_SYMBOL vmlinux 0x824784ec	cdrom_ioctl
+EXPORT_SYMBOL vmlinux 0x8251bcc3	bitmap_release_region
+EXPORT_SYMBOL vmlinux 0x82692209	kref_set
+EXPORT_SYMBOL vmlinux 0x828a41a6	pci_prepare_to_sleep
+EXPORT_SYMBOL vmlinux 0x828a4c02	rtnl_create_link
+EXPORT_SYMBOL vmlinux 0x82a704bf	scsi_mode_sense
+EXPORT_SYMBOL vmlinux 0x82a7f746	mach_powermac
+EXPORT_SYMBOL vmlinux 0x82acfb70	blk_iopoll_sched
+EXPORT_SYMBOL vmlinux 0x82b4b1ce	default_llseek
+EXPORT_SYMBOL vmlinux 0x82bd90c1	i2c_smbus_write_word_data
+EXPORT_SYMBOL vmlinux 0x82c507c8	get_super
+EXPORT_SYMBOL vmlinux 0x82d13e24	qdisc_calculate_pkt_len
+EXPORT_SYMBOL vmlinux 0x82e5a238	vm_get_page_prot
+EXPORT_SYMBOL vmlinux 0x82e9c083	csum_partial_copy_fromiovecend
+EXPORT_SYMBOL vmlinux 0x834b4757	jbd2_journal_forget
+EXPORT_SYMBOL vmlinux 0x834eac64	unregister_console
+EXPORT_SYMBOL vmlinux 0x83569a6b	tty_unregister_driver
+EXPORT_SYMBOL vmlinux 0x83a476ce	bitmap_scnlistprintf
+EXPORT_SYMBOL vmlinux 0x83b2145f	vio_find_node
+EXPORT_SYMBOL vmlinux 0x83c43dc1	posix_acl_chmod_masq
+EXPORT_SYMBOL vmlinux 0x8420c1d0	sg_next
+EXPORT_SYMBOL vmlinux 0x84231605	vfs_fsync
+EXPORT_SYMBOL vmlinux 0x84415931	elv_rb_latter_request
+EXPORT_SYMBOL vmlinux 0x845124e0	ps3_mm_phys_to_lpar
+EXPORT_SYMBOL vmlinux 0x847e7526	start_tty
+EXPORT_SYMBOL vmlinux 0x84c20f61	unregister_key_type
+EXPORT_SYMBOL vmlinux 0x84d69475	i2c_smbus_write_byte
+EXPORT_SYMBOL vmlinux 0x84d86e2c	posix_acl_permission
+EXPORT_SYMBOL vmlinux 0x851c1b5b	bd_claim
+EXPORT_SYMBOL vmlinux 0x8540b5be	sleep_on
+EXPORT_SYMBOL vmlinux 0x8556f8df	xfrm_user_policy
+EXPORT_SYMBOL vmlinux 0x855f1abc	proto_unregister
+EXPORT_SYMBOL vmlinux 0x85670f1d	rtnl_is_locked
+EXPORT_SYMBOL vmlinux 0x8577b8e0	pci_scan_bridge
+EXPORT_SYMBOL vmlinux 0x85919696	d_move
+EXPORT_SYMBOL vmlinux 0x8597eb47	plpar_hcall
+EXPORT_SYMBOL vmlinux 0x85abc85f	strncmp
+EXPORT_SYMBOL vmlinux 0x85b0be2a	pcim_iomap
+EXPORT_SYMBOL vmlinux 0x85d35553	slow_work_cancel
+EXPORT_SYMBOL vmlinux 0x85df9b6c	strsep
+EXPORT_SYMBOL vmlinux 0x8623aaee	neigh_table_clear
+EXPORT_SYMBOL vmlinux 0x8624ccb0	kernel_getsockname
+EXPORT_SYMBOL vmlinux 0x8631f188	radix_tree_tag_set
+EXPORT_SYMBOL vmlinux 0x863cfffc	dquot_reserve_space
+EXPORT_SYMBOL vmlinux 0x8641b8c7	unlock_super
+EXPORT_SYMBOL vmlinux 0x864fcf91	fget
+EXPORT_SYMBOL vmlinux 0x8656592b	bioset_create
+EXPORT_SYMBOL vmlinux 0x8664f62e	cpufreq_update_policy
+EXPORT_SYMBOL vmlinux 0x868acba5	get_options
+EXPORT_SYMBOL vmlinux 0x86c81a43	down_trylock
+EXPORT_SYMBOL vmlinux 0x86ca282c	vfs_rmdir
+EXPORT_SYMBOL vmlinux 0x86db1cbb	rtas_flash_term_hook
+EXPORT_SYMBOL vmlinux 0x86f8a75a	bio_integrity_get_tag
+EXPORT_SYMBOL vmlinux 0x86fb9b05	bitmap_parse_user
+EXPORT_SYMBOL vmlinux 0x87163809	tcp_gro_receive
+EXPORT_SYMBOL vmlinux 0x871b9eca	of_find_node_by_phandle
+EXPORT_SYMBOL vmlinux 0x871c0a7e	fiemap_check_flags
+EXPORT_SYMBOL vmlinux 0x8735607f	xfrm_policy_delete
+EXPORT_SYMBOL vmlinux 0x874a5e38	textsearch_register
+EXPORT_SYMBOL vmlinux 0x874e0b9d	idr_init
+EXPORT_SYMBOL vmlinux 0x874ed3db	blk_queue_stack_limits
+EXPORT_SYMBOL vmlinux 0x87505a83	tcp_rcv_established
+EXPORT_SYMBOL vmlinux 0x878ab3ce	sysctl_tcp_adv_win_scale
+EXPORT_SYMBOL vmlinux 0x878baa86	vfs_readv
+EXPORT_SYMBOL vmlinux 0x879c8edd	audit_log_start
+EXPORT_SYMBOL vmlinux 0x87ceb763	security_inode_init_security
+EXPORT_SYMBOL vmlinux 0x8802dc24	genlmsg_multicast_allns
+EXPORT_SYMBOL vmlinux 0x880da1b1	_lv1_get_logical_partition_id
+EXPORT_SYMBOL vmlinux 0x881039d0	zlib_inflate
+EXPORT_SYMBOL vmlinux 0x881816d3	skb_copy_and_csum_datagram_iovec
+EXPORT_SYMBOL vmlinux 0x882baa33	sock_no_shutdown
+EXPORT_SYMBOL vmlinux 0x883e6faf	elv_queue_empty
+EXPORT_SYMBOL vmlinux 0x88491d30	simple_transaction_get
+EXPORT_SYMBOL vmlinux 0x885b7de9	pci_bus_read_config_dword
+EXPORT_SYMBOL vmlinux 0x8863e371	dev_getfirstbyhwtype
+EXPORT_SYMBOL vmlinux 0x886aa274	posix_acl_create_masq
+EXPORT_SYMBOL vmlinux 0x886c3f5a	jbd2_journal_check_used_features
+EXPORT_SYMBOL vmlinux 0x887f9c83	tcp_check_req
+EXPORT_SYMBOL vmlinux 0x8881ecdc	__sk_mem_schedule
+EXPORT_SYMBOL vmlinux 0x88b0eb23	elv_rb_find
+EXPORT_SYMBOL vmlinux 0x88b154f8	km_state_notify
+EXPORT_SYMBOL vmlinux 0x88d91f3b	otg_get_transceiver
+EXPORT_SYMBOL vmlinux 0x8912b061	__find_get_block
+EXPORT_SYMBOL vmlinux 0x891fa803	llc_mac_hdr_init
+EXPORT_SYMBOL vmlinux 0x895577b0	numa_cpu_lookup_table
+EXPORT_SYMBOL vmlinux 0x896e9fb1	input_unregister_handle
+EXPORT_SYMBOL vmlinux 0x897473df	mktime
+EXPORT_SYMBOL vmlinux 0x898a7764	posix_lock_file_wait
+EXPORT_SYMBOL vmlinux 0x899d772b	sock_release
+EXPORT_SYMBOL vmlinux 0x89c5a8be	smu_get_sdb_partition
+EXPORT_SYMBOL vmlinux 0x89ce4095	cdrom_open
+EXPORT_SYMBOL vmlinux 0x89d5538d	fb_pad_aligned_buffer
+EXPORT_SYMBOL vmlinux 0x89d66811	build_ehash_secret
+EXPORT_SYMBOL vmlinux 0x89dab394	mb_cache_entry_insert
+EXPORT_SYMBOL vmlinux 0x89db13a5	shrink_dcache_sb
+EXPORT_SYMBOL vmlinux 0x89f48871	neigh_ifdown
+EXPORT_SYMBOL vmlinux 0x8a0b950a	follow_down
+EXPORT_SYMBOL vmlinux 0x8a1203a9	kref_get
+EXPORT_SYMBOL vmlinux 0x8a2542b7	invalidate_mapping_pages
+EXPORT_SYMBOL vmlinux 0x8a2d0597	jbd2_journal_stop
+EXPORT_SYMBOL vmlinux 0x8a318344	simple_write_begin
+EXPORT_SYMBOL vmlinux 0x8a373fd7	twl4030_i2c_write
+EXPORT_SYMBOL vmlinux 0x8a7bfa83	elv_rb_del
+EXPORT_SYMBOL vmlinux 0x8a7d1c31	high_memory
+EXPORT_SYMBOL vmlinux 0x8a99a016	mempool_free_slab
+EXPORT_SYMBOL vmlinux 0x8a9cef2a	_lv1_allocate_device_dma_region
+EXPORT_SYMBOL vmlinux 0x8ac40297	iommu_area_free
+EXPORT_SYMBOL vmlinux 0x8af82afa	blk_put_request
+EXPORT_SYMBOL vmlinux 0x8b323a6f	dquot_scan_active
+EXPORT_SYMBOL vmlinux 0x8b5c8159	dev_get_by_index
+EXPORT_SYMBOL vmlinux 0x8b5cc278	bdi_register_dev
+EXPORT_SYMBOL vmlinux 0x8b7fe311	kmemdup
+EXPORT_SYMBOL vmlinux 0x8b96377f	pci_get_subsys
+EXPORT_SYMBOL vmlinux 0x8ba3106d	xfrm_prepare_input
+EXPORT_SYMBOL vmlinux 0x8bcc3a3a	_spin_lock_bh
+EXPORT_SYMBOL vmlinux 0x8bd313b8	__tracepoint_kfree
+EXPORT_SYMBOL vmlinux 0x8bd5b603	param_get_long
+EXPORT_SYMBOL vmlinux 0x8bd854a2	__skb_checksum_complete_head
+EXPORT_SYMBOL vmlinux 0x8bda666b	skb_trim
+EXPORT_SYMBOL vmlinux 0x8c05e4cd	d_rehash
+EXPORT_SYMBOL vmlinux 0x8c183cbe	iowrite16
+EXPORT_SYMBOL vmlinux 0x8c35d043	default_unplug_io_fn
+EXPORT_SYMBOL vmlinux 0x8c3cc895	__page_symlink
+EXPORT_SYMBOL vmlinux 0x8c4098db	alloc_pci_dev
+EXPORT_SYMBOL vmlinux 0x8c537c45	posix_acl_from_mode
+EXPORT_SYMBOL vmlinux 0x8c82fed9	compat_ip_getsockopt
+EXPORT_SYMBOL vmlinux 0x8c8d79c0	_lv1_gpu_context_iomap
+EXPORT_SYMBOL vmlinux 0x8c9705c9	blk_recount_segments
+EXPORT_SYMBOL vmlinux 0x8c9f0b38	bdi_set_max_ratio
+EXPORT_SYMBOL vmlinux 0x8cc645f8	mdiobus_register
+EXPORT_SYMBOL vmlinux 0x8cc79cab	iowrite16_rep
+EXPORT_SYMBOL vmlinux 0x8ceeede0	tcp_md5_hash_key
+EXPORT_SYMBOL vmlinux 0x8d12643e	tty_unthrottle
+EXPORT_SYMBOL vmlinux 0x8d19d43d	sock_kfree_s
+EXPORT_SYMBOL vmlinux 0x8d3894f2	_ctype
+EXPORT_SYMBOL vmlinux 0x8d479e0b	icmp_send
+EXPORT_SYMBOL vmlinux 0x8d4dd0e1	arp_create
+EXPORT_SYMBOL vmlinux 0x8d551bef	sysctl_tcp_rmem
+EXPORT_SYMBOL vmlinux 0x8d580d75	napi_complete
+EXPORT_SYMBOL vmlinux 0x8d6906d4	unregister_memory_notifier
+EXPORT_SYMBOL vmlinux 0x8d6ef862	sleep_on_timeout
+EXPORT_SYMBOL vmlinux 0x8d944cbb	copy_in_user
+EXPORT_SYMBOL vmlinux 0x8dcb8213	ida_remove
+EXPORT_SYMBOL vmlinux 0x8de2fbc5	_lv1_get_virtual_uart_param
+EXPORT_SYMBOL vmlinux 0x8e0b7743	ipv6_ext_hdr
+EXPORT_SYMBOL vmlinux 0x8e1caec2	dev_getbyhwaddr
+EXPORT_SYMBOL vmlinux 0x8e36d22d	tcp_enter_memory_pressure
+EXPORT_SYMBOL vmlinux 0x8e3c9cc3	vprintk
+EXPORT_SYMBOL vmlinux 0x8e562923	dentry_open
+EXPORT_SYMBOL vmlinux 0x8e72ee12	alloc_disk
+EXPORT_SYMBOL vmlinux 0x8e763ae1	send_remote_softirq
+EXPORT_SYMBOL vmlinux 0x8ebc7fba	xfrm_register_km
+EXPORT_SYMBOL vmlinux 0x8ebdc1dd	jbd2_journal_try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0x8edddc73	filemap_fault
+EXPORT_SYMBOL vmlinux 0x8ede4eb5	vc_resize
+EXPORT_SYMBOL vmlinux 0x8ee69235	timeval_to_jiffies
+EXPORT_SYMBOL vmlinux 0x8eea1bc9	smu_poll
+EXPORT_SYMBOL vmlinux 0x8ef1b7c2	kernel_sock_shutdown
+EXPORT_SYMBOL vmlinux 0x8ef833f6	vga_set_legacy_decoding
+EXPORT_SYMBOL vmlinux 0x8f060a87	jbd2_journal_load
+EXPORT_SYMBOL vmlinux 0x8f094416	dm_table_get_size
+EXPORT_SYMBOL vmlinux 0x8f10b05b	fb_get_mode
+EXPORT_SYMBOL vmlinux 0x8f1838bd	find_get_pages_tag
+EXPORT_SYMBOL vmlinux 0x8f1c3185	km_query
+EXPORT_SYMBOL vmlinux 0x8f29ba76	__pci_register_driver
+EXPORT_SYMBOL vmlinux 0x8f48679a	rb_prev
+EXPORT_SYMBOL vmlinux 0x8f55a3cf	tty_hung_up_p
+EXPORT_SYMBOL vmlinux 0x8f608116	dquot_alloc_inode
+EXPORT_SYMBOL vmlinux 0x8f6b7950	set_irq_data
+EXPORT_SYMBOL vmlinux 0x8f8fd819	bdev_read_only
+EXPORT_SYMBOL vmlinux 0x8fa26ecc	ethtool_op_get_link
+EXPORT_SYMBOL vmlinux 0x8fb501bf	dev_unicast_sync
+EXPORT_SYMBOL vmlinux 0x8fd8b7bc	_write_lock_irq
+EXPORT_SYMBOL vmlinux 0x8ff452fc	ip_queue_xmit
+EXPORT_SYMBOL vmlinux 0x90035333	secure_tcpv6_sequence_number
+EXPORT_SYMBOL vmlinux 0x90210c8e	phy_stop
+EXPORT_SYMBOL vmlinux 0x9029f6e6	tcf_hash_release
+EXPORT_SYMBOL vmlinux 0x9043dfa9	kblockd_schedule_work
+EXPORT_SYMBOL vmlinux 0x904c58d2	genphy_update_link
+EXPORT_SYMBOL vmlinux 0x9065e79f	generic_file_splice_write
+EXPORT_SYMBOL vmlinux 0x9077906b	gnet_stats_copy_app
+EXPORT_SYMBOL vmlinux 0x90827a88	mutex_lock
+EXPORT_SYMBOL vmlinux 0x90a24367	__blk_end_request_cur
+EXPORT_SYMBOL vmlinux 0x90ac7fdd	dst_discard
+EXPORT_SYMBOL vmlinux 0x90bb37fb	sock_no_setsockopt
+EXPORT_SYMBOL vmlinux 0x9105f9c3	kill_block_super
+EXPORT_SYMBOL vmlinux 0x91201cef	_lv1_enable_logical_spe
+EXPORT_SYMBOL vmlinux 0x912557ce	rtas_busy_delay
+EXPORT_SYMBOL vmlinux 0x913c6c89	of_register_i2c_devices
+EXPORT_SYMBOL vmlinux 0x91481982	__ratelimit
+EXPORT_SYMBOL vmlinux 0x9155d1d7	tcp4_gro_complete
+EXPORT_SYMBOL vmlinux 0x915e1208	tb_ticks_per_usec
+EXPORT_SYMBOL vmlinux 0x9168c033	rtas_get_sensor
+EXPORT_SYMBOL vmlinux 0x91766c09	param_get_ulong
+EXPORT_SYMBOL vmlinux 0x919d1163	tty_termios_baud_rate
+EXPORT_SYMBOL vmlinux 0x91a255df	iw_handler_set_spy
+EXPORT_SYMBOL vmlinux 0x91bb9139	eth_header_cache_update
+EXPORT_SYMBOL vmlinux 0x91c20d81	bio_integrity_advance
+EXPORT_SYMBOL vmlinux 0x91c4feca	_lv1_unmap_htab
+EXPORT_SYMBOL vmlinux 0x91cd2798	pci_map_rom
+EXPORT_SYMBOL vmlinux 0x9214ed8a	param_get_bool
+EXPORT_SYMBOL vmlinux 0x92392cd9	iov_shorten
+EXPORT_SYMBOL vmlinux 0x9248c9f3	cfb_copyarea
+EXPORT_SYMBOL vmlinux 0x924d1d7f	of_translate_dma_address
+EXPORT_SYMBOL vmlinux 0x92528416	find_or_create_page
+EXPORT_SYMBOL vmlinux 0x926710d6	bfifo_qdisc_ops
+EXPORT_SYMBOL vmlinux 0x9268f276	__ip_select_ident
+EXPORT_SYMBOL vmlinux 0x926f30c1	__free_pages
+EXPORT_SYMBOL vmlinux 0x92924729	scsi_print_result
+EXPORT_SYMBOL vmlinux 0x92968147	sock_no_accept
+EXPORT_SYMBOL vmlinux 0x9296c93d	udp_table
+EXPORT_SYMBOL vmlinux 0x92a079bc	pci_iounmap
+EXPORT_SYMBOL vmlinux 0x92a9a11d	__scsi_device_lookup_by_target
+EXPORT_SYMBOL vmlinux 0x92d170ca	posix_test_lock
+EXPORT_SYMBOL vmlinux 0x92d1e01f	___pskb_trim
+EXPORT_SYMBOL vmlinux 0x92da05af	__f_setown
+EXPORT_SYMBOL vmlinux 0x92de93ea	pci_remove_behind_bridge
+EXPORT_SYMBOL vmlinux 0x92ea4ae4	crc32_le
+EXPORT_SYMBOL vmlinux 0x92f5df56	i2c_register_driver
+EXPORT_SYMBOL vmlinux 0x92f9137e	tcp_v4_destroy_sock
+EXPORT_SYMBOL vmlinux 0x92fa18c6	__scsi_device_lookup
+EXPORT_SYMBOL vmlinux 0x9305f8e6	cpufreq_get
+EXPORT_SYMBOL vmlinux 0x930a8d01	elevator_exit
+EXPORT_SYMBOL vmlinux 0x9318a2c8	vfs_get_dqblk
+EXPORT_SYMBOL vmlinux 0x931d2521	mempool_resize
+EXPORT_SYMBOL vmlinux 0x931d8f54	scsi_eh_prep_cmnd
+EXPORT_SYMBOL vmlinux 0x93507f1c	_lv1_gpu_memory_allocate
+EXPORT_SYMBOL vmlinux 0x93673afb	matrox_mystique
+EXPORT_SYMBOL vmlinux 0x93a174a0	inet_stream_connect
+EXPORT_SYMBOL vmlinux 0x93a6e0b2	io_schedule
+EXPORT_SYMBOL vmlinux 0x93ab7cd9	mb_cache_create
+EXPORT_SYMBOL vmlinux 0x93d514b7	matrox_cfbX_init
+EXPORT_SYMBOL vmlinux 0x93e1f338	pci_enable_device_mem
+EXPORT_SYMBOL vmlinux 0x93ef9d4a	__xfrm_policy_check
+EXPORT_SYMBOL vmlinux 0x93f97afe	arp_find
+EXPORT_SYMBOL vmlinux 0x93fca811	__get_free_pages
+EXPORT_SYMBOL vmlinux 0x9423cc36	cdrom_mode_select
+EXPORT_SYMBOL vmlinux 0x9423f1ba	xfrm_lookup
+EXPORT_SYMBOL vmlinux 0x944b1a37	of_find_device_by_phandle
+EXPORT_SYMBOL vmlinux 0x94614156	jbd2_journal_lock_updates
+EXPORT_SYMBOL vmlinux 0x94847b23	nf_ct_destroy
+EXPORT_SYMBOL vmlinux 0x94961283	vunmap
+EXPORT_SYMBOL vmlinux 0x94b73d20	generic_file_direct_write
+EXPORT_SYMBOL vmlinux 0x94cd2db0	percpu_counter_destroy
+EXPORT_SYMBOL vmlinux 0x94ee52ca	phy_scan_fixups
+EXPORT_SYMBOL vmlinux 0x94f69cff	sock_sendmsg
+EXPORT_SYMBOL vmlinux 0x95063bb2	idr_remove_all
+EXPORT_SYMBOL vmlinux 0x9514151a	_mcount
+EXPORT_SYMBOL vmlinux 0x9524b0ae	_outsb
+EXPORT_SYMBOL vmlinux 0x952a0707	fail_migrate_page
+EXPORT_SYMBOL vmlinux 0x952e843b	machine_is_compatible
+EXPORT_SYMBOL vmlinux 0x954488a4	syncookie_secret
+EXPORT_SYMBOL vmlinux 0x9545eef1	arp_broken_ops
+EXPORT_SYMBOL vmlinux 0x954cbb26	vsprintf
+EXPORT_SYMBOL vmlinux 0x95634999	vfs_quota_sync
+EXPORT_SYMBOL vmlinux 0x956c490f	sg_last
+EXPORT_SYMBOL vmlinux 0x957b806e	jbd2_journal_clear_err
+EXPORT_SYMBOL vmlinux 0x95baa69c	in_dev_finish_destroy
+EXPORT_SYMBOL vmlinux 0x95ceb864	key_update
+EXPORT_SYMBOL vmlinux 0x95d463b9	scsi_free_host_dev
+EXPORT_SYMBOL vmlinux 0x95ee0700	security_file_permission
+EXPORT_SYMBOL vmlinux 0x96169574	d_find_alias
+EXPORT_SYMBOL vmlinux 0x96263d42	neigh_compat_output
+EXPORT_SYMBOL vmlinux 0x9640f120	sg_miter_next
+EXPORT_SYMBOL vmlinux 0x9685b3fe	blk_queue_max_hw_sectors
+EXPORT_SYMBOL vmlinux 0x9690f9f7	smp_call_function_many
+EXPORT_SYMBOL vmlinux 0x96ab6647	vga_client_register
+EXPORT_SYMBOL vmlinux 0x96ba1b27	xfrm_dst_ifdown
+EXPORT_SYMBOL vmlinux 0x96bc67b7	pci_bus_write_config_dword
+EXPORT_SYMBOL vmlinux 0x96cd2b04	scsi_sense_key_string
+EXPORT_SYMBOL vmlinux 0x96d56018	percpu_counter_set
+EXPORT_SYMBOL vmlinux 0x970c0be6	journal_revoke
+EXPORT_SYMBOL vmlinux 0x9710c39f	blk_stack_limits
+EXPORT_SYMBOL vmlinux 0x9748927f	_outsw_ns
+EXPORT_SYMBOL vmlinux 0x97494a59	kern_path
+EXPORT_SYMBOL vmlinux 0x9754ec10	radix_tree_preload
+EXPORT_SYMBOL vmlinux 0x975ae81e	dev_get_drvdata
+EXPORT_SYMBOL vmlinux 0x9768e704	netlink_broadcast
+EXPORT_SYMBOL vmlinux 0x9769f6fe	vio_enable_interrupts
+EXPORT_SYMBOL vmlinux 0x976e014f	_lv1_map_device_mmio_region
+EXPORT_SYMBOL vmlinux 0x978114bd	call_usermodehelper_exec
+EXPORT_SYMBOL vmlinux 0x9785b023	swiotlb_free_coherent
+EXPORT_SYMBOL vmlinux 0x979be89a	tty_driver_kref_put
+EXPORT_SYMBOL vmlinux 0x97a53420	pci_set_dma_seg_boundary
+EXPORT_SYMBOL vmlinux 0x97b1fdf8	con_set_default_unimap
+EXPORT_SYMBOL vmlinux 0x97d7575d	skb_queue_head
+EXPORT_SYMBOL vmlinux 0x97e82694	seq_open_private
+EXPORT_SYMBOL vmlinux 0x97ec1ae9	check_disk_size_change
+EXPORT_SYMBOL vmlinux 0x98177648	_lv1_set_lpm_interval
+EXPORT_SYMBOL vmlinux 0x98188b78	blk_rq_map_user_iov
+EXPORT_SYMBOL vmlinux 0x9825f2d6	create_mnt_ns
+EXPORT_SYMBOL vmlinux 0x983d42de	devm_iounmap
+EXPORT_SYMBOL vmlinux 0x984a72fd	fb_get_buffer_offset
+EXPORT_SYMBOL vmlinux 0x984b2402	tcp_sockets_allocated
+EXPORT_SYMBOL vmlinux 0x9854acbf	generic_error_remove_page
+EXPORT_SYMBOL vmlinux 0x9869c1d3	find_lock_page
+EXPORT_SYMBOL vmlinux 0x986e6135	fb_pad_unaligned_buffer
+EXPORT_SYMBOL vmlinux 0x9871f8c1	nf_unregister_hook
+EXPORT_SYMBOL vmlinux 0x9873d8a6	alloc_trdev
+EXPORT_SYMBOL vmlinux 0x98968039	compat_sock_get_timestampns
+EXPORT_SYMBOL vmlinux 0x989b52fe	filemap_fdatawait_range
+EXPORT_SYMBOL vmlinux 0x989d4082	_write_trylock
+EXPORT_SYMBOL vmlinux 0x98b40804	phy_enable_interrupts
+EXPORT_SYMBOL vmlinux 0x98da768a	dm_io_client_create
+EXPORT_SYMBOL vmlinux 0x98dbf28a	dquot_commit_info
+EXPORT_SYMBOL vmlinux 0x98e720f3	scsi_device_set_state
+EXPORT_SYMBOL vmlinux 0x98f0355c	setup_arg_pages
+EXPORT_SYMBOL vmlinux 0x99320644	journal_dirty_metadata
+EXPORT_SYMBOL vmlinux 0x99383d5c	pci_bus_alloc_resource
+EXPORT_SYMBOL vmlinux 0x994aaf02	udp_proc_register
+EXPORT_SYMBOL vmlinux 0x99520eb2	__generic_file_aio_write
+EXPORT_SYMBOL vmlinux 0x996162f8	pid_task
+EXPORT_SYMBOL vmlinux 0x997c80cd	qdisc_watchdog_schedule
+EXPORT_SYMBOL vmlinux 0x9994c0ca	ps2_is_keyboard_id
+EXPORT_SYMBOL vmlinux 0x999e8297	vfree
+EXPORT_SYMBOL vmlinux 0x99a05be5	eth_type_trans
+EXPORT_SYMBOL vmlinux 0x99a0db61	journal_check_used_features
+EXPORT_SYMBOL vmlinux 0x99acb189	i2c_smbus_process_call
+EXPORT_SYMBOL vmlinux 0x99bfbe39	get_unused_fd
+EXPORT_SYMBOL vmlinux 0x99c01138	cfb_fillrect
+EXPORT_SYMBOL vmlinux 0x99c24cfe	_lv1_free_device_dma_region
+EXPORT_SYMBOL vmlinux 0x99c7a8b8	jbd2_dev_to_name
+EXPORT_SYMBOL vmlinux 0x99cdc86b	sysctl_tcp_reordering
+EXPORT_SYMBOL vmlinux 0x99dd1451	rwsem_downgrade_wake
+EXPORT_SYMBOL vmlinux 0x99e32c9f	__blk_run_queue
+EXPORT_SYMBOL vmlinux 0x99ea12ce	panic_blink
+EXPORT_SYMBOL vmlinux 0x9a054270	filemap_fdatawrite
+EXPORT_SYMBOL vmlinux 0x9a1dfd65	strpbrk
+EXPORT_SYMBOL vmlinux 0x9a1ffb92	_lv1_clear_spe_interrupt_status
+EXPORT_SYMBOL vmlinux 0x9a3243a4	ethtool_op_set_sg
+EXPORT_SYMBOL vmlinux 0x9a6c2531	pasemi_dma_init
+EXPORT_SYMBOL vmlinux 0x9aabc564	crc16
+EXPORT_SYMBOL vmlinux 0x9ab29619	netlink_kernel_create
+EXPORT_SYMBOL vmlinux 0x9ab7f9d7	insert_inode_locked
+EXPORT_SYMBOL vmlinux 0x9abd0051	inode_add_bytes
+EXPORT_SYMBOL vmlinux 0x9ac3e079	scsi_eh_restore_cmnd
+EXPORT_SYMBOL vmlinux 0x9af3401d	journal_blocks_per_page
+EXPORT_SYMBOL vmlinux 0x9af6ac13	pci_fixup_device
+EXPORT_SYMBOL vmlinux 0x9af9de03	compat_sock_common_getsockopt
+EXPORT_SYMBOL vmlinux 0x9b388444	get_zeroed_page
+EXPORT_SYMBOL vmlinux 0x9b71255e	bio_alloc
+EXPORT_SYMBOL vmlinux 0x9b9f8d5a	journal_invalidatepage
+EXPORT_SYMBOL vmlinux 0x9ba7089d	argv_split
+EXPORT_SYMBOL vmlinux 0x9bd394ed	request_firmware
+EXPORT_SYMBOL vmlinux 0x9bef3f6d	qdisc_warn_nonwc
+EXPORT_SYMBOL vmlinux 0x9bf056a5	skb_push
+EXPORT_SYMBOL vmlinux 0x9bf0c4b0	__bread
+EXPORT_SYMBOL vmlinux 0x9bf80240	blk_plug_device
+EXPORT_SYMBOL vmlinux 0x9c012508	fb_parse_edid
+EXPORT_SYMBOL vmlinux 0x9c052597	mark_buffer_dirty
+EXPORT_SYMBOL vmlinux 0x9c0ea3cd	memscan
+EXPORT_SYMBOL vmlinux 0x9c420148	__inet6_hash
+EXPORT_SYMBOL vmlinux 0x9c4ad25c	mpage_writepage
+EXPORT_SYMBOL vmlinux 0x9c5bb171	phy_attach_direct
+EXPORT_SYMBOL vmlinux 0x9c5f589b	pcim_pin_device
+EXPORT_SYMBOL vmlinux 0x9c694569	bio_unmap_user
+EXPORT_SYMBOL vmlinux 0x9c6a6b55	pcie_port_service_unregister
+EXPORT_SYMBOL vmlinux 0x9c71e738	per_cpu__vm_event_states
+EXPORT_SYMBOL vmlinux 0x9c7f3fcd	scsi_allocate_command
+EXPORT_SYMBOL vmlinux 0x9c8b6cc2	udp_proc_unregister
+EXPORT_SYMBOL vmlinux 0x9ca95a0e	sort
+EXPORT_SYMBOL vmlinux 0x9cb01603	textsearch_destroy
+EXPORT_SYMBOL vmlinux 0x9cb96e92	qdisc_put_rtab
+EXPORT_SYMBOL vmlinux 0x9ce103a0	down_write_trylock
+EXPORT_SYMBOL vmlinux 0x9cf9a9b1	seq_escape
+EXPORT_SYMBOL vmlinux 0x9cfd56c5	scsi_print_status
+EXPORT_SYMBOL vmlinux 0x9d0c3f33	wait_for_completion_killable
+EXPORT_SYMBOL vmlinux 0x9d14983a	ppc_enable_pmcs
+EXPORT_SYMBOL vmlinux 0x9d15f41d	clocksource_unregister
+EXPORT_SYMBOL vmlinux 0x9d2c9eaf	dm_io_client_destroy
+EXPORT_SYMBOL vmlinux 0x9d3aa376	blk_iopoll_init
+EXPORT_SYMBOL vmlinux 0x9d3cd24e	of_phy_connect
+EXPORT_SYMBOL vmlinux 0x9d57e17c	journal_force_commit_nested
+EXPORT_SYMBOL vmlinux 0x9d775348	write_cache_pages
+EXPORT_SYMBOL vmlinux 0x9d822445	__blk_end_request
+EXPORT_SYMBOL vmlinux 0x9dad1f62	end_buffer_read_sync
+EXPORT_SYMBOL vmlinux 0x9db21624	hex_dump_to_buffer
+EXPORT_SYMBOL vmlinux 0x9df174c9	of_match_device
+EXPORT_SYMBOL vmlinux 0x9e1e26e4	lease_modify
+EXPORT_SYMBOL vmlinux 0x9e22b70b	of_device_is_compatible
+EXPORT_SYMBOL vmlinux 0x9e28459a	dquot_mark_dquot_dirty
+EXPORT_SYMBOL vmlinux 0x9e2f04cb	journal_wipe
+EXPORT_SYMBOL vmlinux 0x9e3286c9	__nla_put
+EXPORT_SYMBOL vmlinux 0x9e4337e6	get_fs_type
+EXPORT_SYMBOL vmlinux 0x9e6abb21	bio_sector_offset
+EXPORT_SYMBOL vmlinux 0x9e923edc	send_sig
+EXPORT_SYMBOL vmlinux 0x9e97375d	rtas_busy_delay_time
+EXPORT_SYMBOL vmlinux 0x9e9f1714	__bitmap_andnot
+EXPORT_SYMBOL vmlinux 0x9ea1f537	tty_get_baud_rate
+EXPORT_SYMBOL vmlinux 0x9ea29f3c	init_timer_deferrable_key
+EXPORT_SYMBOL vmlinux 0x9ebd4c04	adjust_resource
+EXPORT_SYMBOL vmlinux 0x9ec54e4c	scsi_dma_unmap
+EXPORT_SYMBOL vmlinux 0x9edbecae	snprintf
+EXPORT_SYMBOL vmlinux 0x9ee78669	_lv1_write_virtual_uart
+EXPORT_SYMBOL vmlinux 0x9eecde16	do_brk
+EXPORT_SYMBOL vmlinux 0x9ef98b58	phy_register_fixup
+EXPORT_SYMBOL vmlinux 0x9f100139	jiffies_to_clock_t
+EXPORT_SYMBOL vmlinux 0x9f2bdaac	__bitmap_or
+EXPORT_SYMBOL vmlinux 0x9f2d613e	param_set_bool
+EXPORT_SYMBOL vmlinux 0x9f409dcc	__dev_getfirstbyhwtype
+EXPORT_SYMBOL vmlinux 0x9f5c4f5a	__bforget
+EXPORT_SYMBOL vmlinux 0x9f91e0de	skb_free_datagram
+EXPORT_SYMBOL vmlinux 0x9f92a29f	napi_frags_skb
+EXPORT_SYMBOL vmlinux 0x9f984513	strrchr
+EXPORT_SYMBOL vmlinux 0x9f9f2b0b	__sg_free_table
+EXPORT_SYMBOL vmlinux 0x9fb030f4	del_timer_sync
+EXPORT_SYMBOL vmlinux 0x9fc07928	names_cachep
+EXPORT_SYMBOL vmlinux 0x9fe6fa56	ftrace_print_flags_seq
+EXPORT_SYMBOL vmlinux 0x9feea720	xfrm_input_resume
+EXPORT_SYMBOL vmlinux 0xa006086d	do_SAK
+EXPORT_SYMBOL vmlinux 0xa0311f7f	simple_lookup
+EXPORT_SYMBOL vmlinux 0xa03523d5	security_unix_stream_connect
+EXPORT_SYMBOL vmlinux 0xa04a01bd	qdisc_class_hash_insert
+EXPORT_SYMBOL vmlinux 0xa05c03df	mempool_kmalloc
+EXPORT_SYMBOL vmlinux 0xa076ce85	noop_qdisc
+EXPORT_SYMBOL vmlinux 0xa0ae1dd0	pmac_resume_agp_for_card
+EXPORT_SYMBOL vmlinux 0xa0b04675	vmalloc_32
+EXPORT_SYMBOL vmlinux 0xa0ce1ee2	genphy_config_aneg
+EXPORT_SYMBOL vmlinux 0xa0ceef51	out_of_line_wait_on_bit
+EXPORT_SYMBOL vmlinux 0xa0d3d560	ksize
+EXPORT_SYMBOL vmlinux 0xa0fbac79	wake_up_bit
+EXPORT_SYMBOL vmlinux 0xa108eb4d	sysctl_optmem_max
+EXPORT_SYMBOL vmlinux 0xa120d33c	tty_unregister_ldisc
+EXPORT_SYMBOL vmlinux 0xa124d57f	sk_run_filter
+EXPORT_SYMBOL vmlinux 0xa13798f8	printk_ratelimit
+EXPORT_SYMBOL vmlinux 0xa1661428	remap_vmalloc_range
+EXPORT_SYMBOL vmlinux 0xa1ace497	dev_driver_string
+EXPORT_SYMBOL vmlinux 0xa1b759ce	fb_add_videomode
+EXPORT_SYMBOL vmlinux 0xa1ba4b95	memcpy_fromiovecend
+EXPORT_SYMBOL vmlinux 0xa1c76e0a	_cond_resched
+EXPORT_SYMBOL vmlinux 0xa1cea0b8	proc_dointvec
+EXPORT_SYMBOL vmlinux 0xa1f52623	ip4_datagram_connect
+EXPORT_SYMBOL vmlinux 0xa209baae	scsi_register
+EXPORT_SYMBOL vmlinux 0xa20ce1b8	net_msg_warn
+EXPORT_SYMBOL vmlinux 0xa2127cdc	pasemi_dma_alloc_flag
+EXPORT_SYMBOL vmlinux 0xa2223cf9	dcache_dir_close
+EXPORT_SYMBOL vmlinux 0xa22e26ab	inode_newsize_ok
+EXPORT_SYMBOL vmlinux 0xa2576262	inet_del_protocol
+EXPORT_SYMBOL vmlinux 0xa25b1b25	tcp_v4_conn_request
+EXPORT_SYMBOL vmlinux 0xa27f5e34	inet_addr_type
+EXPORT_SYMBOL vmlinux 0xa28e76e6	schedule_work
+EXPORT_SYMBOL vmlinux 0xa29b1708	tcp_memory_allocated
+EXPORT_SYMBOL vmlinux 0xa2a5fd77	inet_ehash_secret
+EXPORT_SYMBOL vmlinux 0xa2bbed37	crash_shutdown_register
+EXPORT_SYMBOL vmlinux 0xa2d4c119	complete_all
+EXPORT_SYMBOL vmlinux 0xa2db2b91	__skb_warn_lro_forwarding
+EXPORT_SYMBOL vmlinux 0xa2fd76b1	xfrm_state_insert
+EXPORT_SYMBOL vmlinux 0xa329f07e	register_shrinker
+EXPORT_SYMBOL vmlinux 0xa32f7704	fbcon_set_bitops
+EXPORT_SYMBOL vmlinux 0xa332cdd1	security_tun_dev_attach
+EXPORT_SYMBOL vmlinux 0xa333f749	ilookup
+EXPORT_SYMBOL vmlinux 0xa33b2dc7	rtc_dev_update_irq_enable_emul
+EXPORT_SYMBOL vmlinux 0xa33f7c7c	nla_strlcpy
+EXPORT_SYMBOL vmlinux 0xa342561f	vio_unregister_device
+EXPORT_SYMBOL vmlinux 0xa3473d80	scsi_free_command
+EXPORT_SYMBOL vmlinux 0xa35de80f	ipv4_config
+EXPORT_SYMBOL vmlinux 0xa39b4cf2	udelay
+EXPORT_SYMBOL vmlinux 0xa3a9af11	tty_mutex
+EXPORT_SYMBOL vmlinux 0xa3caa0cf	lookup_bdev
+EXPORT_SYMBOL vmlinux 0xa3ffe5c2	lease_get_mtime
+EXPORT_SYMBOL vmlinux 0xa42015a4	pci_iomap
+EXPORT_SYMBOL vmlinux 0xa422d4c9	vfs_dq_drop
+EXPORT_SYMBOL vmlinux 0xa435375c	pci_bus_write_config_byte
+EXPORT_SYMBOL vmlinux 0xa480c04b	_lv1_gpu_context_attribute
+EXPORT_SYMBOL vmlinux 0xa495b0ce	pci_bus_assign_resources
+EXPORT_SYMBOL vmlinux 0xa4b94fea	iowrite8_rep
+EXPORT_SYMBOL vmlinux 0xa4bdd447	__cputime_clockt_factor
+EXPORT_SYMBOL vmlinux 0xa4c77317	devm_request_threaded_irq
+EXPORT_SYMBOL vmlinux 0xa4eecd02	pci_bus_read_config_word
+EXPORT_SYMBOL vmlinux 0xa50031b4	jbd2_journal_get_undo_access
+EXPORT_SYMBOL vmlinux 0xa5023ae1	of_unregister_driver
+EXPORT_SYMBOL vmlinux 0xa5179fbc	sk_free
+EXPORT_SYMBOL vmlinux 0xa5365478	sys_fillrect
+EXPORT_SYMBOL vmlinux 0xa53f7b75	skb_insert
+EXPORT_SYMBOL vmlinux 0xa55cee89	tcp_initialize_rcv_mss
+EXPORT_SYMBOL vmlinux 0xa576c263	generic_find_next_le_bit
+EXPORT_SYMBOL vmlinux 0xa57849ba	llc_build_and_send_ui_pkt
+EXPORT_SYMBOL vmlinux 0xa5808bbf	tasklet_init
+EXPORT_SYMBOL vmlinux 0xa5868e13	phy_sanitize_settings
+EXPORT_SYMBOL vmlinux 0xa58b6804	nla_parse
+EXPORT_SYMBOL vmlinux 0xa58cfcb2	blk_start_queue
+EXPORT_SYMBOL vmlinux 0xa598e29c	vesa_modes
+EXPORT_SYMBOL vmlinux 0xa59f6b32	d_alloc
+EXPORT_SYMBOL vmlinux 0xa5b00659	ppc_proc_freq
+EXPORT_SYMBOL vmlinux 0xa5ee0498	scsi_print_command
+EXPORT_SYMBOL vmlinux 0xa63f9355	pci_disable_device
+EXPORT_SYMBOL vmlinux 0xa65972b8	_memcpy_toio
+EXPORT_SYMBOL vmlinux 0xa67e1cae	dm_table_put
+EXPORT_SYMBOL vmlinux 0xa67e5fcc	blkdev_issue_discard
+EXPORT_SYMBOL vmlinux 0xa68124fa	hweight8
+EXPORT_SYMBOL vmlinux 0xa681fe88	generate_random_uuid
+EXPORT_SYMBOL vmlinux 0xa686e537	inet_twsk_deschedule
+EXPORT_SYMBOL vmlinux 0xa6a5d973	pci_enable_bridges
+EXPORT_SYMBOL vmlinux 0xa6bdce70	mpage_readpage
+EXPORT_SYMBOL vmlinux 0xa6db76ca	seq_release_private
+EXPORT_SYMBOL vmlinux 0xa6dcc773	rb_insert_color
+EXPORT_SYMBOL vmlinux 0xa6de5ea3	bio_add_page
+EXPORT_SYMBOL vmlinux 0xa7026feb	dm_kcopyd_client_destroy
+EXPORT_SYMBOL vmlinux 0xa71bc972	unmap_underlying_metadata
+EXPORT_SYMBOL vmlinux 0xa72a0f5b	nr_online_nodes
+EXPORT_SYMBOL vmlinux 0xa77bc3a5	__mark_inode_dirty
+EXPORT_SYMBOL vmlinux 0xa7ab31aa	nf_unregister_hooks
+EXPORT_SYMBOL vmlinux 0xa7c05d8f	init_buffer
+EXPORT_SYMBOL vmlinux 0xa7e58ba4	per_cpu__ftrace_event_seq
+EXPORT_SYMBOL vmlinux 0xa82215c6	bio_map_user
+EXPORT_SYMBOL vmlinux 0xa8544eac	filemap_write_and_wait_range
+EXPORT_SYMBOL vmlinux 0xa859298c	get_sb_single
+EXPORT_SYMBOL vmlinux 0xa85eea5f	blk_queue_dma_alignment
+EXPORT_SYMBOL vmlinux 0xa8851856	dquot_alloc
+EXPORT_SYMBOL vmlinux 0xa886a958	krealloc
+EXPORT_SYMBOL vmlinux 0xa8a6f639	__check_region
+EXPORT_SYMBOL vmlinux 0xa8ced546	_lv1_net_set_interrupt_status_indicator
+EXPORT_SYMBOL vmlinux 0xa8fef7bb	security_unix_may_send
+EXPORT_SYMBOL vmlinux 0xa901353a	pci_release_region
+EXPORT_SYMBOL vmlinux 0xa903f8ce	kernel_bind
+EXPORT_SYMBOL vmlinux 0xa91c77b6	_lv1_end_of_interrupt
+EXPORT_SYMBOL vmlinux 0xa91e0b26	journal_clear_err
+EXPORT_SYMBOL vmlinux 0xa922f240	_read_lock_irq
+EXPORT_SYMBOL vmlinux 0xa93e7c1d	sock_wfree
+EXPORT_SYMBOL vmlinux 0xa93ed79f	dev_unicast_add
+EXPORT_SYMBOL vmlinux 0xa94563ec	ide_set_handler
+EXPORT_SYMBOL vmlinux 0xa9986364	open_by_devnum
+EXPORT_SYMBOL vmlinux 0xa9db0efd	tcp_init_xmit_timers
+EXPORT_SYMBOL vmlinux 0xa9e8549a	dquot_free_space
+EXPORT_SYMBOL vmlinux 0xa9e8ce46	proc_create_data
+EXPORT_SYMBOL vmlinux 0xaa0edca8	pasemi_dma_alloc_fun
+EXPORT_SYMBOL vmlinux 0xaa36ebae	ip_mc_inc_group
+EXPORT_SYMBOL vmlinux 0xaa4870a1	new_inode
+EXPORT_SYMBOL vmlinux 0xaa4a6f2d	ps2_init
+EXPORT_SYMBOL vmlinux 0xaa4bad81	dcache_dir_lseek
+EXPORT_SYMBOL vmlinux 0xaa66b4e7	d_splice_alias
+EXPORT_SYMBOL vmlinux 0xaa6a75e4	unregister_snap_client
+EXPORT_SYMBOL vmlinux 0xaa6fe5c9	cont_write_begin
+EXPORT_SYMBOL vmlinux 0xaa943532	pcie_port_service_register
+EXPORT_SYMBOL vmlinux 0xaa964832	scsi_target_resume
+EXPORT_SYMBOL vmlinux 0xaab28b4d	journal_force_commit
+EXPORT_SYMBOL vmlinux 0xaac33ab2	fasync_helper
+EXPORT_SYMBOL vmlinux 0xaacf4bd8	unregister_sysrq_key
+EXPORT_SYMBOL vmlinux 0xaad713b0	machine_id
+EXPORT_SYMBOL vmlinux 0xaae9ccf7	blk_queue_init_tags
+EXPORT_SYMBOL vmlinux 0xaaf3d1df	inode_sub_rsv_space
+EXPORT_SYMBOL vmlinux 0xaafdc258	strcasecmp
+EXPORT_SYMBOL vmlinux 0xab66f611	_lv1_set_lpm_trigger_control
+EXPORT_SYMBOL vmlinux 0xab80b511	remap_pfn_range
+EXPORT_SYMBOL vmlinux 0xaba36430	dev_set_mtu
+EXPORT_SYMBOL vmlinux 0xaba9ff34	allocate_resource
+EXPORT_SYMBOL vmlinux 0xabaabea8	seq_lseek
+EXPORT_SYMBOL vmlinux 0xabd0c91c	rtc_time_to_tm
+EXPORT_SYMBOL vmlinux 0xabd8e427	matroxfb_var2my
+EXPORT_SYMBOL vmlinux 0xac0ba8c1	blk_iopoll_disable
+EXPORT_SYMBOL vmlinux 0xac2a70f7	input_open_device
+EXPORT_SYMBOL vmlinux 0xac383451	radix_tree_tag_clear
+EXPORT_SYMBOL vmlinux 0xac6855b0	gen_kill_estimator
+EXPORT_SYMBOL vmlinux 0xac9190cc	tcp_splice_read
+EXPORT_SYMBOL vmlinux 0xaccabc6a	in4_pton
+EXPORT_SYMBOL vmlinux 0xacd14ab8	_lv1_construct_logical_spe
+EXPORT_SYMBOL vmlinux 0xacd78481	security_inode_getsecctx
+EXPORT_SYMBOL vmlinux 0xacdeb154	__tracepoint_module_get
+EXPORT_SYMBOL vmlinux 0xacf4d843	match_strdup
+EXPORT_SYMBOL vmlinux 0xacff258f	tty_kref_put
+EXPORT_SYMBOL vmlinux 0xacffb63f	genphy_suspend
+EXPORT_SYMBOL vmlinux 0xad0413d4	match_hex
+EXPORT_SYMBOL vmlinux 0xad1c5e97	prepare_creds
+EXPORT_SYMBOL vmlinux 0xad4ebe22	_write_unlock_irqrestore
+EXPORT_SYMBOL vmlinux 0xad61e9d3	skb_copy_and_csum_dev
+EXPORT_SYMBOL vmlinux 0xad7b3db5	udp_lib_setsockopt
+EXPORT_SYMBOL vmlinux 0xada28b78	init_special_inode
+EXPORT_SYMBOL vmlinux 0xadaa2657	cpufreq_register_notifier
+EXPORT_SYMBOL vmlinux 0xadb4a5b0	bd_release
+EXPORT_SYMBOL vmlinux 0xadcbb291	tcf_hash_create
+EXPORT_SYMBOL vmlinux 0xaddb6eed	page_follow_link_light
+EXPORT_SYMBOL vmlinux 0xade4e098	simple_fill_super
+EXPORT_SYMBOL vmlinux 0xade89df6	scsi_finish_command
+EXPORT_SYMBOL vmlinux 0xadeffe25	_lv1_gpu_context_intr
+EXPORT_SYMBOL vmlinux 0xae11a163	pci_write_vpd
+EXPORT_SYMBOL vmlinux 0xae376d31	skb_recycle_check
+EXPORT_SYMBOL vmlinux 0xae457b44	brioctl_set
+EXPORT_SYMBOL vmlinux 0xae56c0dc	eth_header_parse
+EXPORT_SYMBOL vmlinux 0xaea7d857	scsi_adjust_queue_depth
+EXPORT_SYMBOL vmlinux 0xaebdec76	__scsi_add_device
+EXPORT_SYMBOL vmlinux 0xaebe8cb3	sys_copyarea
+EXPORT_SYMBOL vmlinux 0xaed013b9	posix_acl_valid
+EXPORT_SYMBOL vmlinux 0xaed5fc8a	nobh_writepage
+EXPORT_SYMBOL vmlinux 0xaee71705	pcix_set_mmrbc
+EXPORT_SYMBOL vmlinux 0xaf3dd7dc	scsi_logging_level
+EXPORT_SYMBOL vmlinux 0xaf423619	mutex_trylock
+EXPORT_SYMBOL vmlinux 0xaf438d65	_lv1_get_repository_node_value
+EXPORT_SYMBOL vmlinux 0xaf8e9a53	scsi_setup_fs_cmnd
+EXPORT_SYMBOL vmlinux 0xafa7bd33	tcf_hash_destroy
+EXPORT_SYMBOL vmlinux 0xafae7f5d	sock_tx_timestamp
+EXPORT_SYMBOL vmlinux 0xafb34a5d	inode_setattr
+EXPORT_SYMBOL vmlinux 0xafb8fd77	vio_register_device_node
+EXPORT_SYMBOL vmlinux 0xafbcbdd4	tc_classify
+EXPORT_SYMBOL vmlinux 0xafe13c71	skb_pad
+EXPORT_SYMBOL vmlinux 0xafe75c59	backlight_force_update
+EXPORT_SYMBOL vmlinux 0xafe82e10	strcspn
+EXPORT_SYMBOL vmlinux 0xafef8fa9	register_memory_notifier
+EXPORT_SYMBOL vmlinux 0xaff678ea	ip_fragment
+EXPORT_SYMBOL vmlinux 0xaffacdd3	nf_log_unregister
+EXPORT_SYMBOL vmlinux 0xb00ef5ac	proc_doulongvec_ms_jiffies_minmax
+EXPORT_SYMBOL vmlinux 0xb00f315f	nla_put
+EXPORT_SYMBOL vmlinux 0xb055d8da	posix_acl_to_xattr
+EXPORT_SYMBOL vmlinux 0xb091745b	i2c_smbus_write_i2c_block_data
+EXPORT_SYMBOL vmlinux 0xb0b847ac	__bitmap_full
+EXPORT_SYMBOL vmlinux 0xb0e10781	get_option
+EXPORT_SYMBOL vmlinux 0xb0ee9d5f	bio_split
+EXPORT_SYMBOL vmlinux 0xb0fd4df4	alloc_pages_current
+EXPORT_SYMBOL vmlinux 0xb0ff5ecf	pci_find_device
+EXPORT_SYMBOL vmlinux 0xb10da3a6	dev_load
+EXPORT_SYMBOL vmlinux 0xb115b393	backlight_device_register
+EXPORT_SYMBOL vmlinux 0xb11fa1ce	strlcat
+EXPORT_SYMBOL vmlinux 0xb145bbe7	xfrm_state_unregister_afinfo
+EXPORT_SYMBOL vmlinux 0xb15bd8fa	tb_ticks_per_sec
+EXPORT_SYMBOL vmlinux 0xb170671b	nla_append
+EXPORT_SYMBOL vmlinux 0xb18e02c3	radix_tree_gang_lookup_tag
+EXPORT_SYMBOL vmlinux 0xb18f3f06	ide_xfer_verbose
+EXPORT_SYMBOL vmlinux 0xb192d700	__serio_register_port
+EXPORT_SYMBOL vmlinux 0xb19760c3	bitmap_onto
+EXPORT_SYMBOL vmlinux 0xb19bf6b3	alloc_buffer_head
+EXPORT_SYMBOL vmlinux 0xb1b859b6	mod_timer_pinned
+EXPORT_SYMBOL vmlinux 0xb1c3a01a	oops_in_progress
+EXPORT_SYMBOL vmlinux 0xb1f975aa	unlock_kernel
+EXPORT_SYMBOL vmlinux 0xb2079489	sk_send_sigurg
+EXPORT_SYMBOL vmlinux 0xb224fbe2	param_get_short
+EXPORT_SYMBOL vmlinux 0xb22acaf7	xfrm_state_delete
+EXPORT_SYMBOL vmlinux 0xb22fe6a3	netdev_increment_features
+EXPORT_SYMBOL vmlinux 0xb23a3e1a	blk_queue_find_tag
+EXPORT_SYMBOL vmlinux 0xb248aabd	pci_remove_bus
+EXPORT_SYMBOL vmlinux 0xb2682405	utf8_to_utf32
+EXPORT_SYMBOL vmlinux 0xb2a051d9	vio_disable_interrupts
+EXPORT_SYMBOL vmlinux 0xb2a3e620	scsi_report_device_reset
+EXPORT_SYMBOL vmlinux 0xb2a50009	console_stop
+EXPORT_SYMBOL vmlinux 0xb2ba62b5	__wait_on_bit
+EXPORT_SYMBOL vmlinux 0xb2c969cb	gen_pool_create
+EXPORT_SYMBOL vmlinux 0xb2d27380	generic_fillattr
+EXPORT_SYMBOL vmlinux 0xb2e9dae7	nf_unregister_queue_handler
+EXPORT_SYMBOL vmlinux 0xb33a5c0d	mutex_lock_killable
+EXPORT_SYMBOL vmlinux 0xb34bb97c	tty_port_init
+EXPORT_SYMBOL vmlinux 0xb3649ad9	i2c_master_recv
+EXPORT_SYMBOL vmlinux 0xb3652964	vio_cmo_set_dev_desired
+EXPORT_SYMBOL vmlinux 0xb384498e	scsi_device_lookup_by_target
+EXPORT_SYMBOL vmlinux 0xb38a3d65	end_buffer_write_sync
+EXPORT_SYMBOL vmlinux 0xb391fb12	seq_bitmap
+EXPORT_SYMBOL vmlinux 0xb3948f30	get_phy_id
+EXPORT_SYMBOL vmlinux 0xb3994c7a	per_cpu__kstat
+EXPORT_SYMBOL vmlinux 0xb39a6e90	pci_claim_resource
+EXPORT_SYMBOL vmlinux 0xb39ee740	jbd2_journal_force_commit_nested
+EXPORT_SYMBOL vmlinux 0xb3a307c6	si_meminfo
+EXPORT_SYMBOL vmlinux 0xb3a5baac	dev_mc_unsync
+EXPORT_SYMBOL vmlinux 0xb3bf73df	cpu_active_mask
+EXPORT_SYMBOL vmlinux 0xb3e4de9c	dev_set_allmulti
+EXPORT_SYMBOL vmlinux 0xb3ff1f69	free_pages_exact
+EXPORT_SYMBOL vmlinux 0xb40e51ea	bd_set_size
+EXPORT_SYMBOL vmlinux 0xb4128754	generic_shutdown_super
+EXPORT_SYMBOL vmlinux 0xb419a6e6	netdev_boot_setup_check
+EXPORT_SYMBOL vmlinux 0xb41aa2a5	find_get_page
+EXPORT_SYMBOL vmlinux 0xb423dba1	console_blanked
+EXPORT_SYMBOL vmlinux 0xb42453d3	param_get_invbool
+EXPORT_SYMBOL vmlinux 0xb43cbb7b	n_tty_ioctl_helper
+EXPORT_SYMBOL vmlinux 0xb460da79	pci_domain_nr
+EXPORT_SYMBOL vmlinux 0xb4709322	scsi_dev_info_add_list
+EXPORT_SYMBOL vmlinux 0xb475ada1	invalidate_inode_buffers
+EXPORT_SYMBOL vmlinux 0xb4ade25d	kill_pgrp
+EXPORT_SYMBOL vmlinux 0xb4bb6690	key_type_keyring
+EXPORT_SYMBOL vmlinux 0xb4c8b1f0	input_allocate_device
+EXPORT_SYMBOL vmlinux 0xb4e1bf56	dev_get_by_name
+EXPORT_SYMBOL vmlinux 0xb4f7003f	i2c_del_driver
+EXPORT_SYMBOL vmlinux 0xb5044271	vsscanf
+EXPORT_SYMBOL vmlinux 0xb5191a99	netlink_unicast
+EXPORT_SYMBOL vmlinux 0xb520ab04	qdisc_destroy
+EXPORT_SYMBOL vmlinux 0xb52af531	request_key_with_auxdata
+EXPORT_SYMBOL vmlinux 0xb54533f7	usecs_to_jiffies
+EXPORT_SYMBOL vmlinux 0xb54f5ed8	free_netdev
+EXPORT_SYMBOL vmlinux 0xb5610950	dm_unregister_target
+EXPORT_SYMBOL vmlinux 0xb565bef5	inode_sub_bytes
+EXPORT_SYMBOL vmlinux 0xb56bfd9e	smu_spinwait_cmd
+EXPORT_SYMBOL vmlinux 0xb5985df4	module_refcount
+EXPORT_SYMBOL vmlinux 0xb5a459dc	unregister_blkdev
+EXPORT_SYMBOL vmlinux 0xb5c494d5	neigh_parms_alloc
+EXPORT_SYMBOL vmlinux 0xb5c7d15b	generic_file_buffered_write
+EXPORT_SYMBOL vmlinux 0xb604cd4e	sock_no_sendmsg
+EXPORT_SYMBOL vmlinux 0xb616c562	netif_device_detach
+EXPORT_SYMBOL vmlinux 0xb64fe804	bdput
+EXPORT_SYMBOL vmlinux 0xb654b22f	phy_connect
+EXPORT_SYMBOL vmlinux 0xb6766e8e	pci_wake_from_d3
+EXPORT_SYMBOL vmlinux 0xb678366f	int_sqrt
+EXPORT_SYMBOL vmlinux 0xb6a61a86	qdisc_get_rtab
+EXPORT_SYMBOL vmlinux 0xb6a68816	find_last_bit
+EXPORT_SYMBOL vmlinux 0xb6bffb99	kstat_irqs_cpu
+EXPORT_SYMBOL vmlinux 0xb6c22469	nonseekable_open
+EXPORT_SYMBOL vmlinux 0xb6c5a973	scsi_show_result
+EXPORT_SYMBOL vmlinux 0xb6f8940b	block_sync_page
+EXPORT_SYMBOL vmlinux 0xb714a4ed	scsi_ioctl
+EXPORT_SYMBOL vmlinux 0xb7296edc	lro_flush_all
+EXPORT_SYMBOL vmlinux 0xb73de76d	irq_desc
+EXPORT_SYMBOL vmlinux 0xb73ed49e	__ide_dma_bad_drive
+EXPORT_SYMBOL vmlinux 0xb747b3af	kill_pid
+EXPORT_SYMBOL vmlinux 0xb7585bf6	ioctl_by_bdev
+EXPORT_SYMBOL vmlinux 0xb76e6b54	journal_update_format
+EXPORT_SYMBOL vmlinux 0xb773a3b1	arp_xmit
+EXPORT_SYMBOL vmlinux 0xb7899653	__skb_recv_datagram
+EXPORT_SYMBOL vmlinux 0xb798b8e4	flow_cache_lookup
+EXPORT_SYMBOL vmlinux 0xb79c32e3	blk_integrity_register
+EXPORT_SYMBOL vmlinux 0xb7ab077c	__lock_page
+EXPORT_SYMBOL vmlinux 0xb7ccb3c7	twl4030_i2c_read_u8
+EXPORT_SYMBOL vmlinux 0xb7dbd831	pci_remove_bus_device
+EXPORT_SYMBOL vmlinux 0xb7e029af	scsi_is_host_device
+EXPORT_SYMBOL vmlinux 0xb7ec369c	kernel_accept
+EXPORT_SYMBOL vmlinux 0xb7f33f7e	mod_timer_pending
+EXPORT_SYMBOL vmlinux 0xb7fa9729	genl_unregister_ops
+EXPORT_SYMBOL vmlinux 0xb813ce5a	timecompare_transform
+EXPORT_SYMBOL vmlinux 0xb8266e7f	elv_add_request
+EXPORT_SYMBOL vmlinux 0xb8324683	ide_geometry_proc_fops
+EXPORT_SYMBOL vmlinux 0xb84cf619	generic_file_llseek
+EXPORT_SYMBOL vmlinux 0xb852d78d	nf_register_hook
+EXPORT_SYMBOL vmlinux 0xb85cd3b3	jbd2_journal_start_commit
+EXPORT_SYMBOL vmlinux 0xb86e4ab9	random32
+EXPORT_SYMBOL vmlinux 0xb8827318	idr_pre_get
+EXPORT_SYMBOL vmlinux 0xb88bc1f0	xfrm_policy_insert
+EXPORT_SYMBOL vmlinux 0xb892ee26	pci_pme_capable
+EXPORT_SYMBOL vmlinux 0xb89af9bf	srandom32
+EXPORT_SYMBOL vmlinux 0xb89e9310	__set_page_dirty_buffers
+EXPORT_SYMBOL vmlinux 0xb8a1f9c1	inet_csk_accept
+EXPORT_SYMBOL vmlinux 0xb8a30c7e	_lv1_add_lpm_event_bookmark
+EXPORT_SYMBOL vmlinux 0xb8a8789a	blk_queue_resize_tags
+EXPORT_SYMBOL vmlinux 0xb8f78f66	bh_submit_read
+EXPORT_SYMBOL vmlinux 0xb8fd5950	blk_queue_bounce
+EXPORT_SYMBOL vmlinux 0xb8ff9b66	phy_attach
+EXPORT_SYMBOL vmlinux 0xb90f3f77	tty_port_close_end
+EXPORT_SYMBOL vmlinux 0xb95cc752	cpu_sysdev_class
+EXPORT_SYMBOL vmlinux 0xb9715fc7	unlock_rename
+EXPORT_SYMBOL vmlinux 0xb972dfcc	kill_fasync
+EXPORT_SYMBOL vmlinux 0xb98a0185	rtc_tm_to_time
+EXPORT_SYMBOL vmlinux 0xb991b1a0	call_usermodehelper_setcleanup
+EXPORT_SYMBOL vmlinux 0xb99229fa	datagram_poll
+EXPORT_SYMBOL vmlinux 0xb99e85eb	sock_no_bind
+EXPORT_SYMBOL vmlinux 0xb9c3f3e0	call_usermodehelper_stdinpipe
+EXPORT_SYMBOL vmlinux 0xb9d68201	unregister_cdrom
+EXPORT_SYMBOL vmlinux 0xb9fc3aef	setup_new_exec
+EXPORT_SYMBOL vmlinux 0xba013461	node_states
+EXPORT_SYMBOL vmlinux 0xba0a45ea	take_over_console
+EXPORT_SYMBOL vmlinux 0xba0c1806	sock_rfree
+EXPORT_SYMBOL vmlinux 0xba122a2c	smu_done_complete
+EXPORT_SYMBOL vmlinux 0xba348cb3	input_release_device
+EXPORT_SYMBOL vmlinux 0xba39e94f	ip_setsockopt
+EXPORT_SYMBOL vmlinux 0xba3d6613	generic_cont_expand_simple
+EXPORT_SYMBOL vmlinux 0xba497f13	loops_per_jiffy
+EXPORT_SYMBOL vmlinux 0xba693132	blk_queue_merge_bvec
+EXPORT_SYMBOL vmlinux 0xba783c2b	inetdev_by_index
+EXPORT_SYMBOL vmlinux 0xba8317d4	slow_work_enqueue
+EXPORT_SYMBOL vmlinux 0xbaa2782a	kstrndup
+EXPORT_SYMBOL vmlinux 0xbaaab8ae	timespec_to_jiffies
+EXPORT_SYMBOL vmlinux 0xbabc456c	netpoll_poll
+EXPORT_SYMBOL vmlinux 0xbacaa218	vfs_unlink
+EXPORT_SYMBOL vmlinux 0xbadd5455	put_disk
+EXPORT_SYMBOL vmlinux 0xbaf129f6	i8042_check_port_owner
+EXPORT_SYMBOL vmlinux 0xbaf45d6b	dquot_destroy
+EXPORT_SYMBOL vmlinux 0xbb167766	fb_var_to_videomode
+EXPORT_SYMBOL vmlinux 0xbb189cad	disallow_signal
+EXPORT_SYMBOL vmlinux 0xbb1c17ef	swiotlb_unmap_sg_attrs
+EXPORT_SYMBOL vmlinux 0xbb1fad6a	flush_delayed_work
+EXPORT_SYMBOL vmlinux 0xbb5c2919	key_put
+EXPORT_SYMBOL vmlinux 0xbb5d343d	xfrm_get_acqseq
+EXPORT_SYMBOL vmlinux 0xbb7a91dc	_write_unlock_bh
+EXPORT_SYMBOL vmlinux 0xbb7fa01b	idr_get_new
+EXPORT_SYMBOL vmlinux 0xbb99125c	get_default_font
+EXPORT_SYMBOL vmlinux 0xbbaaed48	__inet6_lookup_established
+EXPORT_SYMBOL vmlinux 0xbbb7ca52	kthread_bind
+EXPORT_SYMBOL vmlinux 0xbbec0100	sk_stream_error
+EXPORT_SYMBOL vmlinux 0xbbfd00e6	unlock_buffer
+EXPORT_SYMBOL vmlinux 0xbc0c3b70	tcf_em_tree_destroy
+EXPORT_SYMBOL vmlinux 0xbc316de4	tty_termios_input_baud_rate
+EXPORT_SYMBOL vmlinux 0xbc32ef84	pagevec_lookup_tag
+EXPORT_SYMBOL vmlinux 0xbc460b12	blkdev_get
+EXPORT_SYMBOL vmlinux 0xbc52ec37	fb_set_suspend
+EXPORT_SYMBOL vmlinux 0xbc5d6d9f	ip_getsockopt
+EXPORT_SYMBOL vmlinux 0xbc8ffe06	unregister_filesystem
+EXPORT_SYMBOL vmlinux 0xbd0469d9	DAC1064_global_restore
+EXPORT_SYMBOL vmlinux 0xbd359003	pcim_iomap_regions_request_all
+EXPORT_SYMBOL vmlinux 0xbd4b2afd	key_instantiate_and_link
+EXPORT_SYMBOL vmlinux 0xbd508099	soft_cursor
+EXPORT_SYMBOL vmlinux 0xbd582fcd	try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0xbd8cfa15	pasemi_write_mac_reg
+EXPORT_SYMBOL vmlinux 0xbd9fd4c1	lro_vlan_hwaccel_receive_skb
+EXPORT_SYMBOL vmlinux 0xbda183e9	generic_listxattr
+EXPORT_SYMBOL vmlinux 0xbdf5c25c	rb_next
+EXPORT_SYMBOL vmlinux 0xbdf6cb0c	cdev_del
+EXPORT_SYMBOL vmlinux 0xbe48cd44	scsi_target_quiesce
+EXPORT_SYMBOL vmlinux 0xbe8a1485	mempool_create
+EXPORT_SYMBOL vmlinux 0xbeae05fc	scsi_device_quiesce
+EXPORT_SYMBOL vmlinux 0xbeb56490	devm_ioport_unmap
+EXPORT_SYMBOL vmlinux 0xbece2263	kernel_sendmsg
+EXPORT_SYMBOL vmlinux 0xbed1164e	kernel_sock_ioctl
+EXPORT_SYMBOL vmlinux 0xbee36ff0	elv_rb_former_request
+EXPORT_SYMBOL vmlinux 0xbef43296	console_conditional_schedule
+EXPORT_SYMBOL vmlinux 0xbf1598dc	sock_i_ino
+EXPORT_SYMBOL vmlinux 0xbf2096b9	do_splice_from
+EXPORT_SYMBOL vmlinux 0xbf72d47d	blk_requeue_request
+EXPORT_SYMBOL vmlinux 0xbf7fd2f5	schedule_timeout_killable
+EXPORT_SYMBOL vmlinux 0xbf82ea61	wait_for_completion_interruptible_timeout
+EXPORT_SYMBOL vmlinux 0xbf9bcc8d	__cap_empty_set
+EXPORT_SYMBOL vmlinux 0xbfabfe59	__debugger_iabr_match
+EXPORT_SYMBOL vmlinux 0xbfb38ec4	macio_release_resource
+EXPORT_SYMBOL vmlinux 0xbfc177bc	iowrite32_rep
+EXPORT_SYMBOL vmlinux 0xbff5965e	vio_get_attribute
+EXPORT_SYMBOL vmlinux 0xbff8182c	plpar_hcall_norets
+EXPORT_SYMBOL vmlinux 0xc0044724	blk_set_default_limits
+EXPORT_SYMBOL vmlinux 0xc00f878a	xfrm_state_walk
+EXPORT_SYMBOL vmlinux 0xc0299c5a	set_bdi_congested
+EXPORT_SYMBOL vmlinux 0xc045b80e	neigh_table_init_no_netlink
+EXPORT_SYMBOL vmlinux 0xc04d34a8	____pagevec_lru_add
+EXPORT_SYMBOL vmlinux 0xc0580937	rb_erase
+EXPORT_SYMBOL vmlinux 0xc0763f6d	inet_proto_csum_replace4
+EXPORT_SYMBOL vmlinux 0xc0936bfb	neigh_update
+EXPORT_SYMBOL vmlinux 0xc09651d9	crc32_be
+EXPORT_SYMBOL vmlinux 0xc0a3d105	find_next_bit
+EXPORT_SYMBOL vmlinux 0xc0bf6ead	timecounter_cyc2time
+EXPORT_SYMBOL vmlinux 0xc0f41a3b	pci_set_mwi
+EXPORT_SYMBOL vmlinux 0xc0fa6605	ethtool_op_set_ufo
+EXPORT_SYMBOL vmlinux 0xc0fabe1a	skb_copy_datagram_iovec
+EXPORT_SYMBOL vmlinux 0xc108670d	neigh_parms_release
+EXPORT_SYMBOL vmlinux 0xc10a2ac2	pmac_suspend_agp_for_card
+EXPORT_SYMBOL vmlinux 0xc129da0c	ide_proc_unregister_driver
+EXPORT_SYMBOL vmlinux 0xc13511d7	cpumask_next_and
+EXPORT_SYMBOL vmlinux 0xc144fd5d	blk_end_request_cur
+EXPORT_SYMBOL vmlinux 0xc14bc884	__netdev_alloc_skb
+EXPORT_SYMBOL vmlinux 0xc15e073c	generic_find_next_zero_le_bit
+EXPORT_SYMBOL vmlinux 0xc1717c96	tcf_exts_change
+EXPORT_SYMBOL vmlinux 0xc173abba	drop_super
+EXPORT_SYMBOL vmlinux 0xc1a00dfa	phy_device_register
+EXPORT_SYMBOL vmlinux 0xc1b21282	matroxfb_DAC_out
+EXPORT_SYMBOL vmlinux 0xc1ba49a9	dev_base_lock
+EXPORT_SYMBOL vmlinux 0xc1c268fb	blk_cleanup_queue
+EXPORT_SYMBOL vmlinux 0xc1d58231	swiotlb_unmap_sg
+EXPORT_SYMBOL vmlinux 0xc1df943a	mpage_writepages
+EXPORT_SYMBOL vmlinux 0xc1e4c345	bdevname
+EXPORT_SYMBOL vmlinux 0xc1f9e0ec	scsi_unregister
+EXPORT_SYMBOL vmlinux 0xc2200019	ps2_end_command
+EXPORT_SYMBOL vmlinux 0xc237d9b3	d_alloc_root
+EXPORT_SYMBOL vmlinux 0xc256e762	__bitmap_equal
+EXPORT_SYMBOL vmlinux 0xc26d74f4	tty_port_alloc_xmit_buf
+EXPORT_SYMBOL vmlinux 0xc2894835	scsi_block_requests
+EXPORT_SYMBOL vmlinux 0xc2c64acf	inet_release
+EXPORT_SYMBOL vmlinux 0xc2e587d1	reset_devices
+EXPORT_SYMBOL vmlinux 0xc2fb9ee1	_lv1_shutdown_logical_partition
+EXPORT_SYMBOL vmlinux 0xc314c3d2	__cputime_jiffies_factor
+EXPORT_SYMBOL vmlinux 0xc3177f9c	posix_unblock_lock
+EXPORT_SYMBOL vmlinux 0xc31e3aca	fifo_create_dflt
+EXPORT_SYMBOL vmlinux 0xc31f0c33	udp_prot
+EXPORT_SYMBOL vmlinux 0xc33bf01e	ethtool_op_get_sg
+EXPORT_SYMBOL vmlinux 0xc33f6f4c	on_each_cpu
+EXPORT_SYMBOL vmlinux 0xc39c47af	__init_waitqueue_head
+EXPORT_SYMBOL vmlinux 0xc3c0a8e6	dev_disable_lro
+EXPORT_SYMBOL vmlinux 0xc3c1b299	__devm_release_region
+EXPORT_SYMBOL vmlinux 0xc3cf1128	in_group_p
+EXPORT_SYMBOL vmlinux 0xc3e9e458	dm_kcopyd_copy
+EXPORT_SYMBOL vmlinux 0xc413f3ed	dquot_transfer
+EXPORT_SYMBOL vmlinux 0xc41f1696	_lv1_configure_virtual_uart_irq
+EXPORT_SYMBOL vmlinux 0xc43ca6cd	vfs_mkdir
+EXPORT_SYMBOL vmlinux 0xc4554797	d_instantiate_unique
+EXPORT_SYMBOL vmlinux 0xc45b1738	tcp_v4_do_rcv
+EXPORT_SYMBOL vmlinux 0xc478e3f7	qdisc_reset
+EXPORT_SYMBOL vmlinux 0xc4917d88	vfs_path_lookup
+EXPORT_SYMBOL vmlinux 0xc499ae1e	kstrdup
+EXPORT_SYMBOL vmlinux 0xc49d11b0	proc_symlink
+EXPORT_SYMBOL vmlinux 0xc4dbb923	i2c_master_send
+EXPORT_SYMBOL vmlinux 0xc4e058f9	pci_bus_type
+EXPORT_SYMBOL vmlinux 0xc4f62ec0	default_file_splice_read
+EXPORT_SYMBOL vmlinux 0xc4fe3a06	tcp_disconnect
+EXPORT_SYMBOL vmlinux 0xc503d1d4	block_read_full_page
+EXPORT_SYMBOL vmlinux 0xc5089620	_lv1_stop_ppe_periodic_tracer
+EXPORT_SYMBOL vmlinux 0xc514d2ed	mutex_lock_interruptible
+EXPORT_SYMBOL vmlinux 0xc520ed09	lock_sock_nested
+EXPORT_SYMBOL vmlinux 0xc52f5714	fb_videomode_to_var
+EXPORT_SYMBOL vmlinux 0xc5534d64	ioread16
+EXPORT_SYMBOL vmlinux 0xc5536839	gnet_stats_copy_queue
+EXPORT_SYMBOL vmlinux 0xc5b58a8d	of_platform_bus_type
+EXPORT_SYMBOL vmlinux 0xc5db83bc	call_usermodehelper_setkeys
+EXPORT_SYMBOL vmlinux 0xc5dc5e4c	tcp_v4_md5_lookup
+EXPORT_SYMBOL vmlinux 0xc60eb998	tcp_sendpage
+EXPORT_SYMBOL vmlinux 0xc61a38bb	flush_icache_user_range
+EXPORT_SYMBOL vmlinux 0xc624346f	get_sb_nodev
+EXPORT_SYMBOL vmlinux 0xc649df41	fbcon_set_tileops
+EXPORT_SYMBOL vmlinux 0xc6620a69	tty_driver_flush_buffer
+EXPORT_SYMBOL vmlinux 0xc663b075	__ioremap
+EXPORT_SYMBOL vmlinux 0xc6b6d78c	wait_for_completion_timeout
+EXPORT_SYMBOL vmlinux 0xc6e22c4b	free_task
+EXPORT_SYMBOL vmlinux 0xc6e83248	lock_may_read
+EXPORT_SYMBOL vmlinux 0xc6f3e189	sock_common_setsockopt
+EXPORT_SYMBOL vmlinux 0xc705b035	ide_complete_rq
+EXPORT_SYMBOL vmlinux 0xc722227e	posix_acl_clone
+EXPORT_SYMBOL vmlinux 0xc740c64a	memchr
+EXPORT_SYMBOL vmlinux 0xc7532e2c	tcf_em_tree_validate
+EXPORT_SYMBOL vmlinux 0xc75b07d3	simple_set_mnt
+EXPORT_SYMBOL vmlinux 0xc76627a2	inet_put_port
+EXPORT_SYMBOL vmlinux 0xc77e03de	scsi_execute_req
+EXPORT_SYMBOL vmlinux 0xc78f915e	alloc_fddidev
+EXPORT_SYMBOL vmlinux 0xc79bcd36	dm_vcalloc
+EXPORT_SYMBOL vmlinux 0xc7a24d76	sysfs_format_mac
+EXPORT_SYMBOL vmlinux 0xc7a4fbed	rtnl_lock
+EXPORT_SYMBOL vmlinux 0xc7ad2fb8	wait_for_completion_interruptible
+EXPORT_SYMBOL vmlinux 0xc7ec28b0	memcmp
+EXPORT_SYMBOL vmlinux 0xc8053617	km_new_mapping
+EXPORT_SYMBOL vmlinux 0xc8294fee	blk_start_request
+EXPORT_SYMBOL vmlinux 0xc829a4f9	kfree_skb
+EXPORT_SYMBOL vmlinux 0xc82f9939	del_gendisk
+EXPORT_SYMBOL vmlinux 0xc8829a92	scsi_report_bus_reset
+EXPORT_SYMBOL vmlinux 0xc8875f9b	blk_queue_make_request
+EXPORT_SYMBOL vmlinux 0xc8b57c27	autoremove_wake_function
+EXPORT_SYMBOL vmlinux 0xc8ba5f8b	note_scsi_host
+EXPORT_SYMBOL vmlinux 0xc8ca2ead	pci_read_irq_line
+EXPORT_SYMBOL vmlinux 0xc8e31d75	_lv1_configure_irq_state_bitmap
+EXPORT_SYMBOL vmlinux 0xc8ec1a80	udp_ioctl
+EXPORT_SYMBOL vmlinux 0xc8ef6167	vfs_fsync_range
+EXPORT_SYMBOL vmlinux 0xc8fbc4d9	macio_request_resources
+EXPORT_SYMBOL vmlinux 0xc9215a70	fb_show_logo
+EXPORT_SYMBOL vmlinux 0xc951a671	xfrm_state_update
+EXPORT_SYMBOL vmlinux 0xc995ce26	sync_blockdev
+EXPORT_SYMBOL vmlinux 0xc998d641	icmp_err_convert
+EXPORT_SYMBOL vmlinux 0xc9eeb3e3	vfs_set_dqinfo
+EXPORT_SYMBOL vmlinux 0xc9fc598d	pasemi_read_dma_reg
+EXPORT_SYMBOL vmlinux 0xca289aa9	input_unregister_device
+EXPORT_SYMBOL vmlinux 0xca5da9e6	xfrm_state_flush
+EXPORT_SYMBOL vmlinux 0xca5dbc50	scsi_print_sense_hdr
+EXPORT_SYMBOL vmlinux 0xca7bad1d	of_mdiobus_register
+EXPORT_SYMBOL vmlinux 0xca7fd923	journal_start
+EXPORT_SYMBOL vmlinux 0xca825895	pmu_suspend
+EXPORT_SYMBOL vmlinux 0xcaabf3f9	pasemi_write_iob_reg
+EXPORT_SYMBOL vmlinux 0xcae7ed68	scsi_rescan_device
+EXPORT_SYMBOL vmlinux 0xcb0953b7	blk_peek_request
+EXPORT_SYMBOL vmlinux 0xcb1af3f3	ps3_dma_region_init
+EXPORT_SYMBOL vmlinux 0xcb2d2d87	sk_stop_timer
+EXPORT_SYMBOL vmlinux 0xcb354f70	of_find_node_by_name
+EXPORT_SYMBOL vmlinux 0xcb494e7e	sockfd_lookup
+EXPORT_SYMBOL vmlinux 0xcb4ef6a9	pci_enable_wake
+EXPORT_SYMBOL vmlinux 0xcb6beb40	hweight32
+EXPORT_SYMBOL vmlinux 0xcb7131fb	fb_get_options
+EXPORT_SYMBOL vmlinux 0xcb7bc48a	bit_waitqueue
+EXPORT_SYMBOL vmlinux 0xcb80dd88	jbd2_journal_extend
+EXPORT_SYMBOL vmlinux 0xcba68f04	journal_restart
+EXPORT_SYMBOL vmlinux 0xcbe6b54e	bio_endio
+EXPORT_SYMBOL vmlinux 0xcbe8b038	_lv1_configure_execution_time_variable
+EXPORT_SYMBOL vmlinux 0xcbfe6008	cap_netlink_recv
+EXPORT_SYMBOL vmlinux 0xcc07af75	strnlen
+EXPORT_SYMBOL vmlinux 0xcc19fdfe	netif_napi_del
+EXPORT_SYMBOL vmlinux 0xcc22a9ba	security_inode_permission
+EXPORT_SYMBOL vmlinux 0xcc36f32e	fb_unregister_client
+EXPORT_SYMBOL vmlinux 0xcc4951f1	cdev_index
+EXPORT_SYMBOL vmlinux 0xcc5005fe	msleep_interruptible
+EXPORT_SYMBOL vmlinux 0xcc719d13	dquot_claim_space
+EXPORT_SYMBOL vmlinux 0xcc771ce3	redirty_page_for_writepage
+EXPORT_SYMBOL vmlinux 0xcc7fa952	local_bh_enable_ip
+EXPORT_SYMBOL vmlinux 0xcc820934	__xfrm_route_forward
+EXPORT_SYMBOL vmlinux 0xcc843743	__ps2_command
+EXPORT_SYMBOL vmlinux 0xcc89c246	pasemi_dma_alloc_chan
+EXPORT_SYMBOL vmlinux 0xccb75104	scsi_device_get
+EXPORT_SYMBOL vmlinux 0xccbf09d7	udplite_table
+EXPORT_SYMBOL vmlinux 0xccc61b7e	xfrm_policy_bysel_ctx
+EXPORT_SYMBOL vmlinux 0xcd0c40c6	iw_handler_set_thrspy
+EXPORT_SYMBOL vmlinux 0xcd32b009	release_sock
+EXPORT_SYMBOL vmlinux 0xcd674301	pcibios_fixup_bus
+EXPORT_SYMBOL vmlinux 0xcd769f62	_lv1_gpu_device_map
+EXPORT_SYMBOL vmlinux 0xcd8381c6	inet_frag_destroy
+EXPORT_SYMBOL vmlinux 0xcd948a8b	of_find_compatible_node
+EXPORT_SYMBOL vmlinux 0xcda243ff	directly_mappable_cdev_bdi
+EXPORT_SYMBOL vmlinux 0xcdac53e8	macio_unregister_driver
+EXPORT_SYMBOL vmlinux 0xcde102a4	ps3_sb_event_receive_port_destroy
+EXPORT_SYMBOL vmlinux 0xcdf53c62	scsi_dma_map
+EXPORT_SYMBOL vmlinux 0xce14115b	page_zero_new_buffers
+EXPORT_SYMBOL vmlinux 0xce198f90	pci_bus_read_config_byte
+EXPORT_SYMBOL vmlinux 0xce21ba8d	generic_unplug_device
+EXPORT_SYMBOL vmlinux 0xce321a59	pci_find_capability
+EXPORT_SYMBOL vmlinux 0xce36ded6	sysctl_tcp_mem
+EXPORT_SYMBOL vmlinux 0xce3b3f09	profile_pc
+EXPORT_SYMBOL vmlinux 0xce409cda	pmac_set_early_video_resume
+EXPORT_SYMBOL vmlinux 0xce5ac24f	zlib_inflate_workspacesize
+EXPORT_SYMBOL vmlinux 0xce67556c	sb_set_blocksize
+EXPORT_SYMBOL vmlinux 0xce6dc002	scsi_nonblockable_ioctl
+EXPORT_SYMBOL vmlinux 0xce7c622e	user_path_at
+EXPORT_SYMBOL vmlinux 0xcead56f0	of_find_property
+EXPORT_SYMBOL vmlinux 0xceeddfe6	tty_throttle
+EXPORT_SYMBOL vmlinux 0xcf01a434	sock_kmalloc
+EXPORT_SYMBOL vmlinux 0xcf2e05a7	read_cache_page_gfp
+EXPORT_SYMBOL vmlinux 0xcf64bb3d	register_sysctl_paths
+EXPORT_SYMBOL vmlinux 0xcf6e6b51	__tcf_em_tree_match
+EXPORT_SYMBOL vmlinux 0xcf901697	__strnlen_user
+EXPORT_SYMBOL vmlinux 0xcfa201af	d_obtain_alias
+EXPORT_SYMBOL vmlinux 0xcfaf79ba	mempool_alloc
+EXPORT_SYMBOL vmlinux 0xcfb9006e	jiffies_to_timeval
+EXPORT_SYMBOL vmlinux 0xcff53400	kref_put
+EXPORT_SYMBOL vmlinux 0xd0181f4f	__bitmap_xor
+EXPORT_SYMBOL vmlinux 0xd05931ec	_lv1_set_lpm_counter_control
+EXPORT_SYMBOL vmlinux 0xd07a6600	udp_disconnect
+EXPORT_SYMBOL vmlinux 0xd087b846	kernel_connect
+EXPORT_SYMBOL vmlinux 0xd08b84f0	tty_register_driver
+EXPORT_SYMBOL vmlinux 0xd09f54f6	vfs_write
+EXPORT_SYMBOL vmlinux 0xd0a7651c	blk_run_queue
+EXPORT_SYMBOL vmlinux 0xd0ad080e	flush_signals
+EXPORT_SYMBOL vmlinux 0xd0c2256b	blk_queue_update_dma_alignment
+EXPORT_SYMBOL vmlinux 0xd0c5513e	dma_pool_free
+EXPORT_SYMBOL vmlinux 0xd0e15bfb	generic_ro_fops
+EXPORT_SYMBOL vmlinux 0xd0ec96ac	blk_init_queue_node
+EXPORT_SYMBOL vmlinux 0xd0ee38b8	schedule_timeout_uninterruptible
+EXPORT_SYMBOL vmlinux 0xd10e302b	consume_skb
+EXPORT_SYMBOL vmlinux 0xd1262886	rtas_data_buf
+EXPORT_SYMBOL vmlinux 0xd12e124e	fddi_type_trans
+EXPORT_SYMBOL vmlinux 0xd143a0f3	bio_integrity_trim
+EXPORT_SYMBOL vmlinux 0xd14a9d9c	swiotlb_sync_single_for_cpu
+EXPORT_SYMBOL vmlinux 0xd1533d22	simple_readpage
+EXPORT_SYMBOL vmlinux 0xd154840e	sk_stream_kill_queues
+EXPORT_SYMBOL vmlinux 0xd188cb81	__scsi_alloc_queue
+EXPORT_SYMBOL vmlinux 0xd18a64a6	mark_page_accessed
+EXPORT_SYMBOL vmlinux 0xd1d8b2a4	input_free_device
+EXPORT_SYMBOL vmlinux 0xd1e72e27	dm_table_get
+EXPORT_SYMBOL vmlinux 0xd1fe8ebb	_lv1_get_spe_interrupt_status
+EXPORT_SYMBOL vmlinux 0xd23f7a64	scsi_reset_provider
+EXPORT_SYMBOL vmlinux 0xd251d7b0	security_socket_getpeersec_dgram
+EXPORT_SYMBOL vmlinux 0xd2555f19	jiffies_64_to_clock_t
+EXPORT_SYMBOL vmlinux 0xd25d4f74	console_blank_hook
+EXPORT_SYMBOL vmlinux 0xd260ac05	seq_write
+EXPORT_SYMBOL vmlinux 0xd2892f9c	blk_queue_segment_boundary
+EXPORT_SYMBOL vmlinux 0xd2965f6f	kthread_should_stop
+EXPORT_SYMBOL vmlinux 0xd2b38746	skb_append
+EXPORT_SYMBOL vmlinux 0xd2b7b295	matroxfb_DAC_in
+EXPORT_SYMBOL vmlinux 0xd2c6a056	udp_poll
+EXPORT_SYMBOL vmlinux 0xd2ca2d21	tcf_action_dump_1
+EXPORT_SYMBOL vmlinux 0xd2ef2638	smu_cmdbuf_abs
+EXPORT_SYMBOL vmlinux 0xd303eca6	security_inode_setsecctx
+EXPORT_SYMBOL vmlinux 0xd30adc9b	input_register_handle
+EXPORT_SYMBOL vmlinux 0xd3223ee7	pcibus_to_node
+EXPORT_SYMBOL vmlinux 0xd32dd428	nf_log_packet
+EXPORT_SYMBOL vmlinux 0xd3580bd6	simple_empty
+EXPORT_SYMBOL vmlinux 0xd3928333	__mutex_init
+EXPORT_SYMBOL vmlinux 0xd3af979c	memdup_user
+EXPORT_SYMBOL vmlinux 0xd3d6361c	ps2_handle_response
+EXPORT_SYMBOL vmlinux 0xd3da95da	pci_target_state
+EXPORT_SYMBOL vmlinux 0xd409383c	pmu_request
+EXPORT_SYMBOL vmlinux 0xd40b15e1	phy_disable_interrupts
+EXPORT_SYMBOL vmlinux 0xd41c10e3	phy_register_fixup_for_id
+EXPORT_SYMBOL vmlinux 0xd42909ac	fb_class
+EXPORT_SYMBOL vmlinux 0xd42f95d1	starget_for_each_device
+EXPORT_SYMBOL vmlinux 0xd4308a52	inet_register_protosw
+EXPORT_SYMBOL vmlinux 0xd44054f2	address_space_init_once
+EXPORT_SYMBOL vmlinux 0xd46d0968	ioremap_flags
+EXPORT_SYMBOL vmlinux 0xd4975b9d	unlock_page
+EXPORT_SYMBOL vmlinux 0xd49c0cf4	matroxfb_g450_setpll_cond
+EXPORT_SYMBOL vmlinux 0xd4b35d67	__wait_on_buffer
+EXPORT_SYMBOL vmlinux 0xd4c96022	locks_mandatory_area
+EXPORT_SYMBOL vmlinux 0xd4dddc5e	cdrom_release
+EXPORT_SYMBOL vmlinux 0xd50727bc	dm_table_get_mode
+EXPORT_SYMBOL vmlinux 0xd5263820	mb_cache_destroy
+EXPORT_SYMBOL vmlinux 0xd5425a9c	mach_ps3
+EXPORT_SYMBOL vmlinux 0xd5540c6e	generic_ide_ioctl
+EXPORT_SYMBOL vmlinux 0xd55547ec	deactivate_super
+EXPORT_SYMBOL vmlinux 0xd55f3209	_lv1_remove_repository_node
+EXPORT_SYMBOL vmlinux 0xd56a857b	qdisc_watchdog_cancel
+EXPORT_SYMBOL vmlinux 0xd57f8789	iommu_num_pages
+EXPORT_SYMBOL vmlinux 0xd5877187	scsi_add_device
+EXPORT_SYMBOL vmlinux 0xd5b24b93	scsi_prep_fn
+EXPORT_SYMBOL vmlinux 0xd5bfd16d	dm_io
+EXPORT_SYMBOL vmlinux 0xd5c7c61d	sysctl_string
+EXPORT_SYMBOL vmlinux 0xd5cbfefc	keyring_search
+EXPORT_SYMBOL vmlinux 0xd5e1d719	_lv1_set_ppe_periodic_tracer_frequency
+EXPORT_SYMBOL vmlinux 0xd62c833f	schedule_timeout
+EXPORT_SYMBOL vmlinux 0xd645fb09	bdi_init
+EXPORT_SYMBOL vmlinux 0xd69ebc51	_read_trylock
+EXPORT_SYMBOL vmlinux 0xd6a435ea	mach_pseries
+EXPORT_SYMBOL vmlinux 0xd6a53297	swiotlb_map_sg
+EXPORT_SYMBOL vmlinux 0xd6a78d08	smp_call_function_single
+EXPORT_SYMBOL vmlinux 0xd6bf5867	dev_addr_add
+EXPORT_SYMBOL vmlinux 0xd6d68c6b	vm_stat
+EXPORT_SYMBOL vmlinux 0xd6df68b0	tcp_v4_md5_hash_skb
+EXPORT_SYMBOL vmlinux 0xd6edf811	_lv1_release_memory
+EXPORT_SYMBOL vmlinux 0xd6ee688f	vmalloc
+EXPORT_SYMBOL vmlinux 0xd6f08006	blk_queue_max_hw_segments
+EXPORT_SYMBOL vmlinux 0xd7154121	down_interruptible
+EXPORT_SYMBOL vmlinux 0xd725b633	ilookup5
+EXPORT_SYMBOL vmlinux 0xd72e1cfc	_lv1_set_lpm_spr_trigger
+EXPORT_SYMBOL vmlinux 0xd7475e7a	macio_register_driver
+EXPORT_SYMBOL vmlinux 0xd74fa466	__register_binfmt
+EXPORT_SYMBOL vmlinux 0xd77a5aa5	__bitmap_and
+EXPORT_SYMBOL vmlinux 0xd77e48f6	netif_receive_skb
+EXPORT_SYMBOL vmlinux 0xd786c0ea	plpar_hcall9
+EXPORT_SYMBOL vmlinux 0xd79b5a02	allow_signal
+EXPORT_SYMBOL vmlinux 0xd7d3c8d9	skb_copy_and_csum_bits
+EXPORT_SYMBOL vmlinux 0xd7d715ed	flush_old_exec
+EXPORT_SYMBOL vmlinux 0xd82f6711	ipv6_skip_exthdr
+EXPORT_SYMBOL vmlinux 0xd83791bc	nf_conntrack_destroy
+EXPORT_SYMBOL vmlinux 0xd85151f5	of_create_pci_dev
+EXPORT_SYMBOL vmlinux 0xd857d182	skb_clone
+EXPORT_SYMBOL vmlinux 0xd86d68b6	matroxfb_g450_shutdown
+EXPORT_SYMBOL vmlinux 0xd884facb	jbd2_journal_set_features
+EXPORT_SYMBOL vmlinux 0xd8959b81	pci_bus_set_ops
+EXPORT_SYMBOL vmlinux 0xd89da37f	movable_zone
+EXPORT_SYMBOL vmlinux 0xd8a1d3bd	skb_realloc_headroom
+EXPORT_SYMBOL vmlinux 0xd8a2ab95	in_egroup_p
+EXPORT_SYMBOL vmlinux 0xd8a5ceed	sg_miter_stop
+EXPORT_SYMBOL vmlinux 0xd8d0120b	pcie_set_readrq
+EXPORT_SYMBOL vmlinux 0xd8d58ec0	grab_cache_page_nowait
+EXPORT_SYMBOL vmlinux 0xd8e484f0	register_chrdev_region
+EXPORT_SYMBOL vmlinux 0xd8eb7a93	generic_read_dir
+EXPORT_SYMBOL vmlinux 0xd94ef8cf	sync_inodes_sb
+EXPORT_SYMBOL vmlinux 0xd950717c	poll_initwait
+EXPORT_SYMBOL vmlinux 0xd956712b	alloc_etherdev_mq
+EXPORT_SYMBOL vmlinux 0xd95e4355	bio_integrity_enabled
+EXPORT_SYMBOL vmlinux 0xd95fe946	seq_path
+EXPORT_SYMBOL vmlinux 0xd96c8608	interruptible_sleep_on_timeout
+EXPORT_SYMBOL vmlinux 0xd96fc40b	per_cpu__softnet_data
+EXPORT_SYMBOL vmlinux 0xd985dc99	mempool_free_pages
+EXPORT_SYMBOL vmlinux 0xd9bac924	tty_termios_copy_hw
+EXPORT_SYMBOL vmlinux 0xd9be6698	dev_mc_add
+EXPORT_SYMBOL vmlinux 0xd9d4d09d	_lv1_release_io_segment
+EXPORT_SYMBOL vmlinux 0xda0ddce8	jbd2_journal_begin_ordered_truncate
+EXPORT_SYMBOL vmlinux 0xda1a7335	kasprintf
+EXPORT_SYMBOL vmlinux 0xda4629e4	radix_tree_insert
+EXPORT_SYMBOL vmlinux 0xda6f56a9	pipe_unlock
+EXPORT_SYMBOL vmlinux 0xda7ca6cb	fb_mode_is_equal
+EXPORT_SYMBOL vmlinux 0xda8af7ad	fb_find_nearest_mode
+EXPORT_SYMBOL vmlinux 0xda9fce20	register_qdisc
+EXPORT_SYMBOL vmlinux 0xdac77e6d	kobject_get
+EXPORT_SYMBOL vmlinux 0xdada7bf5	unlock_new_inode
+EXPORT_SYMBOL vmlinux 0xdaf7a5c5	phy_stop_interrupts
+EXPORT_SYMBOL vmlinux 0xdb03470c	input_unregister_handler
+EXPORT_SYMBOL vmlinux 0xdb09708f	__wake_up
+EXPORT_SYMBOL vmlinux 0xdb1f9a52	skb_queue_purge
+EXPORT_SYMBOL vmlinux 0xdb2cb8fe	override_creds
+EXPORT_SYMBOL vmlinux 0xdb4c88b4	groups_alloc
+EXPORT_SYMBOL vmlinux 0xdb61c0c2	dmam_alloc_noncoherent
+EXPORT_SYMBOL vmlinux 0xdbb60eab	set_create_files_as
+EXPORT_SYMBOL vmlinux 0xdbbd0804	input_grab_device
+EXPORT_SYMBOL vmlinux 0xdbcd416e	sysctl_ip_nonlocal_bind
+EXPORT_SYMBOL vmlinux 0xdc047fc4	scsi_dev_info_list_add_keyed
+EXPORT_SYMBOL vmlinux 0xdc053205	udp_memory_allocated
+EXPORT_SYMBOL vmlinux 0xdc06d8eb	audit_log_format
+EXPORT_SYMBOL vmlinux 0xdc14eda7	pci_pci_problems
+EXPORT_SYMBOL vmlinux 0xdc2793c0	blk_queue_free_tags
+EXPORT_SYMBOL vmlinux 0xdc2adb35	add_taint
+EXPORT_SYMBOL vmlinux 0xdc305714	elv_dispatch_sort
+EXPORT_SYMBOL vmlinux 0xdc4113fa	i2c_smbus_read_byte_data
+EXPORT_SYMBOL vmlinux 0xdc43a9c8	daemonize
+EXPORT_SYMBOL vmlinux 0xdc5531d7	of_platform_bus_probe
+EXPORT_SYMBOL vmlinux 0xdc5f670d	set_anon_super
+EXPORT_SYMBOL vmlinux 0xdc8a4802	devm_free_irq
+EXPORT_SYMBOL vmlinux 0xdca0e950	genl_register_family
+EXPORT_SYMBOL vmlinux 0xdca7302f	request_firmware_nowait
+EXPORT_SYMBOL vmlinux 0xdcaa28b5	skb_free_datagram_locked
+EXPORT_SYMBOL vmlinux 0xdcaffc55	sg_alloc_table
+EXPORT_SYMBOL vmlinux 0xdcb0349b	sys_close
+EXPORT_SYMBOL vmlinux 0xdcb5671d	strlen
+EXPORT_SYMBOL vmlinux 0xdcdf55d6	skb_queue_tail
+EXPORT_SYMBOL vmlinux 0xdce086e5	mdiobus_read
+EXPORT_SYMBOL vmlinux 0xdcef0368	inet_dev_addr_type
+EXPORT_SYMBOL vmlinux 0xdcefb9a5	pmu_resume
+EXPORT_SYMBOL vmlinux 0xdcf0747c	fb_firmware_edid
+EXPORT_SYMBOL vmlinux 0xdcf86504	pcix_get_mmrbc
+EXPORT_SYMBOL vmlinux 0xdd0af448	ip_cmsg_recv
+EXPORT_SYMBOL vmlinux 0xdd1de270	d_validate
+EXPORT_SYMBOL vmlinux 0xdd5a37a7	_spin_lock_irqsave
+EXPORT_SYMBOL vmlinux 0xdd7615fd	sock_no_getsockopt
+EXPORT_SYMBOL vmlinux 0xdd85fe00	sock_no_ioctl
+EXPORT_SYMBOL vmlinux 0xdd955144	__debugger
+EXPORT_SYMBOL vmlinux 0xdd9d78a3	ethtool_op_get_rx_csum
+EXPORT_SYMBOL vmlinux 0xddd11e36	kernel_read
+EXPORT_SYMBOL vmlinux 0xdde25489	_write_lock
+EXPORT_SYMBOL vmlinux 0xddec5576	scsicam_bios_param
+EXPORT_SYMBOL vmlinux 0xde04a83b	kick_iocb
+EXPORT_SYMBOL vmlinux 0xde0aa509	phy_driver_unregister
+EXPORT_SYMBOL vmlinux 0xde29d7da	set_user_nice
+EXPORT_SYMBOL vmlinux 0xde31b902	blk_limits_io_opt
+EXPORT_SYMBOL vmlinux 0xde75b689	set_irq_type
+EXPORT_SYMBOL vmlinux 0xde9360ba	totalram_pages
+EXPORT_SYMBOL vmlinux 0xdea0be97	dput
+EXPORT_SYMBOL vmlinux 0xdea1dcba	netif_carrier_on
+EXPORT_SYMBOL vmlinux 0xdea2a94e	tcp_md5_hash_skb_data
+EXPORT_SYMBOL vmlinux 0xdeb5e0fa	skb_prepare_seq_read
+EXPORT_SYMBOL vmlinux 0xded01321	of_dev_get
+EXPORT_SYMBOL vmlinux 0xdef259dd	__generic_block_fiemap
+EXPORT_SYMBOL vmlinux 0xdef26e71	__netif_schedule
+EXPORT_SYMBOL vmlinux 0xdef6341a	log_wait_commit
+EXPORT_SYMBOL vmlinux 0xdf330bd5	dquot_initialize
+EXPORT_SYMBOL vmlinux 0xdf3d574c	__scsi_put_command
+EXPORT_SYMBOL vmlinux 0xdf4a6810	of_get_next_child
+EXPORT_SYMBOL vmlinux 0xdf4a8ece	phy_connect_direct
+EXPORT_SYMBOL vmlinux 0xdf4c8767	ns_to_timeval
+EXPORT_SYMBOL vmlinux 0xdf575cb3	wait_for_key_construction
+EXPORT_SYMBOL vmlinux 0xdf60cc27	__print_symbol
+EXPORT_SYMBOL vmlinux 0xdf60fc83	_lv1_net_start_tx_dma
+EXPORT_SYMBOL vmlinux 0xdf6ab257	jbd2_log_start_commit
+EXPORT_SYMBOL vmlinux 0xdf7c16dc	d_genocide
+EXPORT_SYMBOL vmlinux 0xdf929370	fs_overflowgid
+EXPORT_SYMBOL vmlinux 0xdfb10773	raw_local_irq_restore
+EXPORT_SYMBOL vmlinux 0xdfb2c18f	bio_integrity_add_page
+EXPORT_SYMBOL vmlinux 0xdfc0c824	pipe_lock
+EXPORT_SYMBOL vmlinux 0xe00d0e1d	blk_queue_update_dma_pad
+EXPORT_SYMBOL vmlinux 0xe01a993d	swiotlb_alloc_coherent
+EXPORT_SYMBOL vmlinux 0xe029b0be	alloc_netdev_mq
+EXPORT_SYMBOL vmlinux 0xe04143d5	jbd2_journal_invalidatepage
+EXPORT_SYMBOL vmlinux 0xe041cd4f	write_inode_now
+EXPORT_SYMBOL vmlinux 0xe04ec40d	tcp_create_openreq_child
+EXPORT_SYMBOL vmlinux 0xe075d6eb	iter_div_u64_rem
+EXPORT_SYMBOL vmlinux 0xe0902b5a	scsi_is_sdev_device
+EXPORT_SYMBOL vmlinux 0xe0944bec	i2c_add_adapter
+EXPORT_SYMBOL vmlinux 0xe099a3eb	pci_scan_bus_parented
+EXPORT_SYMBOL vmlinux 0xe0a446bc	fib_default_rule_add
+EXPORT_SYMBOL vmlinux 0xe0b13336	argv_free
+EXPORT_SYMBOL vmlinux 0xe0bc24a1	param_set_ushort
+EXPORT_SYMBOL vmlinux 0xe0c36186	free_buffer_head
+EXPORT_SYMBOL vmlinux 0xe0c6e338	tty_pair_get_tty
+EXPORT_SYMBOL vmlinux 0xe0f0f17e	__locks_copy_lock
+EXPORT_SYMBOL vmlinux 0xe0fe0fd7	of_scan_pci_bridge
+EXPORT_SYMBOL vmlinux 0xe10980c3	ppc_md
+EXPORT_SYMBOL vmlinux 0xe113bbbc	csum_partial
+EXPORT_SYMBOL vmlinux 0xe14f9455	dev_get_stats
+EXPORT_SYMBOL vmlinux 0xe16938d3	simple_release_fs
+EXPORT_SYMBOL vmlinux 0xe1761617	security_inet_conn_request
+EXPORT_SYMBOL vmlinux 0xe1a0d44c	pci_disable_msix
+EXPORT_SYMBOL vmlinux 0xe1cbe048	of_device_is_available
+EXPORT_SYMBOL vmlinux 0xe200b03f	__dev_remove_pack
+EXPORT_SYMBOL vmlinux 0xe20c63e7	_lv1_unmap_device_mmio_region
+EXPORT_SYMBOL vmlinux 0xe220ceb8	__debugger_sstep
+EXPORT_SYMBOL vmlinux 0xe229c178	tcf_em_tree_dump
+EXPORT_SYMBOL vmlinux 0xe2304303	mac_map_monitor_sense
+EXPORT_SYMBOL vmlinux 0xe23ae481	blk_iopoll_complete
+EXPORT_SYMBOL vmlinux 0xe24050c7	scnprintf
+EXPORT_SYMBOL vmlinux 0xe24d3a97	jiffies_64
+EXPORT_SYMBOL vmlinux 0xe2535f0f	ps2_cmd_aborted
+EXPORT_SYMBOL vmlinux 0xe2553f60	km_policy_expired
+EXPORT_SYMBOL vmlinux 0xe263a766	aio_complete
+EXPORT_SYMBOL vmlinux 0xe2640246	tcp_mtup_init
+EXPORT_SYMBOL vmlinux 0xe27b08b8	alloc_disk_node
+EXPORT_SYMBOL vmlinux 0xe2d5255a	strcmp
+EXPORT_SYMBOL vmlinux 0xe2d955e8	splice_from_pipe_feed
+EXPORT_SYMBOL vmlinux 0xe2e0c7c6	__flush_icache_range
+EXPORT_SYMBOL vmlinux 0xe2ea2b12	have_submounts
+EXPORT_SYMBOL vmlinux 0xe2fa60f6	pci_dev_driver
+EXPORT_SYMBOL vmlinux 0xe32e220b	security_path_mkdir
+EXPORT_SYMBOL vmlinux 0xe34aed60	compat_tcp_getsockopt
+EXPORT_SYMBOL vmlinux 0xe35b311b	irq_stat
+EXPORT_SYMBOL vmlinux 0xe35d951e	registered_fb
+EXPORT_SYMBOL vmlinux 0xe370353e	dev_change_flags
+EXPORT_SYMBOL vmlinux 0xe38a746b	pci_add_new_bus
+EXPORT_SYMBOL vmlinux 0xe39906b6	register_cdrom
+EXPORT_SYMBOL vmlinux 0xe3b0192b	vscnprintf
+EXPORT_SYMBOL vmlinux 0xe3b5cc8c	inode_claim_rsv_space
+EXPORT_SYMBOL vmlinux 0xe3ca7d2a	force_sig
+EXPORT_SYMBOL vmlinux 0xe3cb3bfc	mpage_readpages
+EXPORT_SYMBOL vmlinux 0xe3eecc36	xfrm_find_acq_byseq
+EXPORT_SYMBOL vmlinux 0xe3f1cf6d	dec_zone_page_state
+EXPORT_SYMBOL vmlinux 0xe42ef79b	pci_set_power_state
+EXPORT_SYMBOL vmlinux 0xe43490b5	journal_start_commit
+EXPORT_SYMBOL vmlinux 0xe454683d	i2c_smbus_read_byte
+EXPORT_SYMBOL vmlinux 0xe484e35f	ioread32
+EXPORT_SYMBOL vmlinux 0xe4a0f0a7	sk_alloc
+EXPORT_SYMBOL vmlinux 0xe4a66f47	__dev_get_by_index
+EXPORT_SYMBOL vmlinux 0xe4ac047b	xfrm_policy_unregister_afinfo
+EXPORT_SYMBOL vmlinux 0xe4bb02ff	dev_set_promiscuity
+EXPORT_SYMBOL vmlinux 0xe4f1695e	cookie_check_timestamp
+EXPORT_SYMBOL vmlinux 0xe4fa99fc	i2c_smbus_write_block_data
+EXPORT_SYMBOL vmlinux 0xe5077a8f	mempool_destroy
+EXPORT_SYMBOL vmlinux 0xe50ff4d8	vmalloc_to_page
+EXPORT_SYMBOL vmlinux 0xe523ad75	synchronize_irq
+EXPORT_SYMBOL vmlinux 0xe5254fa4	create_proc_entry
+EXPORT_SYMBOL vmlinux 0xe552173c	mark_info_dirty
+EXPORT_SYMBOL vmlinux 0xe57878a1	in6_pton
+EXPORT_SYMBOL vmlinux 0xe5867808	dlci_ioctl_set
+EXPORT_SYMBOL vmlinux 0xe5b1d707	skb_dequeue
+EXPORT_SYMBOL vmlinux 0xe5c33eed	filp_close
+EXPORT_SYMBOL vmlinux 0xe5c78a99	do_blank_screen
+EXPORT_SYMBOL vmlinux 0xe5df840f	file_update_time
+EXPORT_SYMBOL vmlinux 0xe5ed5467	xfrm_policy_walk_init
+EXPORT_SYMBOL vmlinux 0xe5f7800f	of_register_driver
+EXPORT_SYMBOL vmlinux 0xe6048b73	inet_frag_evictor
+EXPORT_SYMBOL vmlinux 0xe60988ac	_lv1_query_logical_partition_address_region_info
+EXPORT_SYMBOL vmlinux 0xe611174c	tty_pair_get_pty
+EXPORT_SYMBOL vmlinux 0xe62cbebc	napi_gro_frags
+EXPORT_SYMBOL vmlinux 0xe63f54c8	llc_sap_list_lock
+EXPORT_SYMBOL vmlinux 0xe64356dc	iw_handler_get_spy
+EXPORT_SYMBOL vmlinux 0xe64bb885	scsi_device_put
+EXPORT_SYMBOL vmlinux 0xe66896d6	copy_io_context
+EXPORT_SYMBOL vmlinux 0xe697d108	__blk_iopoll_complete
+EXPORT_SYMBOL vmlinux 0xe6ac7e41	xfrm_policy_destroy
+EXPORT_SYMBOL vmlinux 0xe6cc9de1	vfs_stat
+EXPORT_SYMBOL vmlinux 0xe6d2679e	__secpath_destroy
+EXPORT_SYMBOL vmlinux 0xe6dcd2c0	__pagevec_release
+EXPORT_SYMBOL vmlinux 0xe6ec08f5	input_unfilter_device
+EXPORT_SYMBOL vmlinux 0xe6f7fee0	journal_create
+EXPORT_SYMBOL vmlinux 0xe6fbe430	can_do_mlock
+EXPORT_SYMBOL vmlinux 0xe7013835	pci_try_set_mwi
+EXPORT_SYMBOL vmlinux 0xe714375c	__tasklet_hi_schedule_first
+EXPORT_SYMBOL vmlinux 0xe71d4fc8	fddi_change_mtu
+EXPORT_SYMBOL vmlinux 0xe74aa406	_lv1_set_dabr
+EXPORT_SYMBOL vmlinux 0xe74c4293	bio_phys_segments
+EXPORT_SYMBOL vmlinux 0xe773c464	netpoll_setup
+EXPORT_SYMBOL vmlinux 0xe789f29c	kobject_del
+EXPORT_SYMBOL vmlinux 0xe7968fe6	hippi_type_trans
+EXPORT_SYMBOL vmlinux 0xe7b233f3	i2c_del_adapter
+EXPORT_SYMBOL vmlinux 0xe7b5b028	skb_dma_unmap
+EXPORT_SYMBOL vmlinux 0xe7cd99b7	smu_queue_simple
+EXPORT_SYMBOL vmlinux 0xe7ce7439	_memcpy_fromio
+EXPORT_SYMBOL vmlinux 0xe7d2aca1	security_sk_classify_flow
+EXPORT_SYMBOL vmlinux 0xe7d4daac	seq_list_next
+EXPORT_SYMBOL vmlinux 0xe7d65bef	pci_clear_master
+EXPORT_SYMBOL vmlinux 0xe7dc1733	__insert_inode_hash
+EXPORT_SYMBOL vmlinux 0xe8019692	generic_write_checks
+EXPORT_SYMBOL vmlinux 0xe8116e08	__kmalloc_node
+EXPORT_SYMBOL vmlinux 0xe861888c	phy_mii_ioctl
+EXPORT_SYMBOL vmlinux 0xe873326d	llc_sap_close
+EXPORT_SYMBOL vmlinux 0xe88d51ea	sock_map_fd
+EXPORT_SYMBOL vmlinux 0xe8985687	tcp_v4_md5_do_del
+EXPORT_SYMBOL vmlinux 0xe8bde345	pmac_register_agp_pm
+EXPORT_SYMBOL vmlinux 0xe8caed9e	call_usermodehelper_setup
+EXPORT_SYMBOL vmlinux 0xe8cd902e	hweight16
+EXPORT_SYMBOL vmlinux 0xe8dd1850	tcp_alloc_md5sig_pool
+EXPORT_SYMBOL vmlinux 0xe8f34a03	ide_stall_queue
+EXPORT_SYMBOL vmlinux 0xe902f524	put_mnt_ns
+EXPORT_SYMBOL vmlinux 0xe90dcae0	__request_module
+EXPORT_SYMBOL vmlinux 0xe914e41e	strcpy
+EXPORT_SYMBOL vmlinux 0xe95de52c	simple_pin_fs
+EXPORT_SYMBOL vmlinux 0xe967471b	dquot_release_reserved_space
+EXPORT_SYMBOL vmlinux 0xe97c7e07	nobh_write_begin
+EXPORT_SYMBOL vmlinux 0xe9ad3e2f	follow_pfn
+EXPORT_SYMBOL vmlinux 0xe9ce3af0	phy_ethtool_gset
+EXPORT_SYMBOL vmlinux 0xe9ceda4d	pci_enable_msi_block
+EXPORT_SYMBOL vmlinux 0xe9d753b7	skb_store_bits
+EXPORT_SYMBOL vmlinux 0xe9e5ec85	tty_free_termios
+EXPORT_SYMBOL vmlinux 0xea054b22	nla_policy_len
+EXPORT_SYMBOL vmlinux 0xea10212a	int_to_scsilun
+EXPORT_SYMBOL vmlinux 0xea10655a	__bitmap_intersects
+EXPORT_SYMBOL vmlinux 0xea147363	printk
+EXPORT_SYMBOL vmlinux 0xea3f72a4	jbd2_journal_unlock_updates
+EXPORT_SYMBOL vmlinux 0xea862536	ip_route_me_harder
+EXPORT_SYMBOL vmlinux 0xea872cd9	ps2_command
+EXPORT_SYMBOL vmlinux 0xeaa0dfcf	compat_sock_common_setsockopt
+EXPORT_SYMBOL vmlinux 0xead58fb9	print_hex_dump
+EXPORT_SYMBOL vmlinux 0xeb0be073	mdiobus_write
+EXPORT_SYMBOL vmlinux 0xeb245a01	read_cache_pages
+EXPORT_SYMBOL vmlinux 0xeb8f54b3	strstrip
+EXPORT_SYMBOL vmlinux 0xeba2a1f7	rtas_indicator_present
+EXPORT_SYMBOL vmlinux 0xebbf1dba	strncasecmp
+EXPORT_SYMBOL vmlinux 0xebd273a6	strict_strtoull
+EXPORT_SYMBOL vmlinux 0xebdafa6f	tty_insert_flip_string_flags
+EXPORT_SYMBOL vmlinux 0xebe5ee97	pci_back_from_sleep
+EXPORT_SYMBOL vmlinux 0xebfc47ab	mac_find_mode
+EXPORT_SYMBOL vmlinux 0xec07ed97	idr_for_each
+EXPORT_SYMBOL vmlinux 0xec0c118a	eth_rebuild_header
+EXPORT_SYMBOL vmlinux 0xec30765a	_lv1_allocate_io_segment
+EXPORT_SYMBOL vmlinux 0xec54f8e7	block_invalidatepage
+EXPORT_SYMBOL vmlinux 0xec62a5c4	matroxfb_vgaHWrestore
+EXPORT_SYMBOL vmlinux 0xec681369	blk_fetch_request
+EXPORT_SYMBOL vmlinux 0xec78af56	generic_splice_sendpage
+EXPORT_SYMBOL vmlinux 0xec794ba0	__send_remote_softirq
+EXPORT_SYMBOL vmlinux 0xecc19722	vmap
+EXPORT_SYMBOL vmlinux 0xecca2b68	generic_write_end
+EXPORT_SYMBOL vmlinux 0xecd8d9b7	__xfrm_state_delete
+EXPORT_SYMBOL vmlinux 0xece9464a	mdiobus_unregister
+EXPORT_SYMBOL vmlinux 0xed0e7387	__lock_buffer
+EXPORT_SYMBOL vmlinux 0xed49ba48	downgrade_write
+EXPORT_SYMBOL vmlinux 0xed5ead30	serio_unregister_driver
+EXPORT_SYMBOL vmlinux 0xed652427	_lv1_set_interrupt_mask
+EXPORT_SYMBOL vmlinux 0xeda0d76e	gen_estimator_active
+EXPORT_SYMBOL vmlinux 0xedbaee5e	nla_strcmp
+EXPORT_SYMBOL vmlinux 0xedbdc71e	dm_table_unplug_all
+EXPORT_SYMBOL vmlinux 0xedc03953	iounmap
+EXPORT_SYMBOL vmlinux 0xeddd8eed	devcgroup_inode_permission
+EXPORT_SYMBOL vmlinux 0xedf0b48c	_lv1_storage_get_async_status
+EXPORT_SYMBOL vmlinux 0xee0303cb	__kill_fasync
+EXPORT_SYMBOL vmlinux 0xee04db32	blk_complete_request
+EXPORT_SYMBOL vmlinux 0xee066ff8	tcp_make_synack
+EXPORT_SYMBOL vmlinux 0xee132efa	of_phy_find_device
+EXPORT_SYMBOL vmlinux 0xee1e19b0	tcf_exts_destroy
+EXPORT_SYMBOL vmlinux 0xee269277	xfrm_find_acq
+EXPORT_SYMBOL vmlinux 0xee27622f	swiotlb_sync_single_for_device
+EXPORT_SYMBOL vmlinux 0xee2bf126	shrink_dcache_parent
+EXPORT_SYMBOL vmlinux 0xee2d0fc7	_local_bh_enable
+EXPORT_SYMBOL vmlinux 0xee32bbca	atomic_dec_and_mutex_lock
+EXPORT_SYMBOL vmlinux 0xee444373	xfrm_policy_register_afinfo
+EXPORT_SYMBOL vmlinux 0xee5bb20b	_lv1_panic
+EXPORT_SYMBOL vmlinux 0xee5f8018	cfb_imageblit
+EXPORT_SYMBOL vmlinux 0xee6766ff	of_register_spi_devices
+EXPORT_SYMBOL vmlinux 0xee70ef4b	inet_csk_destroy_sock
+EXPORT_SYMBOL vmlinux 0xee768fa2	of_node_put
+EXPORT_SYMBOL vmlinux 0xee9174c5	_lv1_storage_read
+EXPORT_SYMBOL vmlinux 0xeea5f159	kthread_create
+EXPORT_SYMBOL vmlinux 0xeea9dbaf	bitmap_bitremap
+EXPORT_SYMBOL vmlinux 0xeeb5310a	secpath_dup
+EXPORT_SYMBOL vmlinux 0xeee60870	locks_copy_lock
+EXPORT_SYMBOL vmlinux 0xef106327	rtnetlink_put_metrics
+EXPORT_SYMBOL vmlinux 0xef571259	set_page_dirty_lock
+EXPORT_SYMBOL vmlinux 0xef6ed1ba	param_set_invbool
+EXPORT_SYMBOL vmlinux 0xef7979ec	macio_release_resources
+EXPORT_SYMBOL vmlinux 0xef7ba82c	pcibios_resource_to_bus
+EXPORT_SYMBOL vmlinux 0xefa10312	dev_get_by_flags
+EXPORT_SYMBOL vmlinux 0xefac5eb4	sk_release_kernel
+EXPORT_SYMBOL vmlinux 0xefb17807	__break_lease
+EXPORT_SYMBOL vmlinux 0xefb2b2a6	xfrm_unregister_type
+EXPORT_SYMBOL vmlinux 0xefc2e54d	_lv1_storage_send_device_command
+EXPORT_SYMBOL vmlinux 0xefdd70ce	security_secid_to_secctx
+EXPORT_SYMBOL vmlinux 0xefde1bbe	flush_dcache_range
+EXPORT_SYMBOL vmlinux 0xefe74525	pci_setup_cardbus
+EXPORT_SYMBOL vmlinux 0xf0009fee	put_pages_list
+EXPORT_SYMBOL vmlinux 0xf00db061	blk_queue_io_min
+EXPORT_SYMBOL vmlinux 0xf01d4d6f	vfs_statfs
+EXPORT_SYMBOL vmlinux 0xf045c0b7	tcp_rcv_state_process
+EXPORT_SYMBOL vmlinux 0xf065f629	ioread16be
+EXPORT_SYMBOL vmlinux 0xf0a5d7bb	ipv4_specific
+EXPORT_SYMBOL vmlinux 0xf0bebfec	__seq_open_private
+EXPORT_SYMBOL vmlinux 0xf0c1ff6d	nf_register_hooks
+EXPORT_SYMBOL vmlinux 0xf0d2f84a	_lv1_gpu_context_free
+EXPORT_SYMBOL vmlinux 0xf0ef15b4	list_sort
+EXPORT_SYMBOL vmlinux 0xf0f1246c	kvasprintf
+EXPORT_SYMBOL vmlinux 0xf0f876ce	get_io_context
+EXPORT_SYMBOL vmlinux 0xf10de535	ioread8
+EXPORT_SYMBOL vmlinux 0xf110b606	dst_alloc
+EXPORT_SYMBOL vmlinux 0xf129f603	nf_getsockopt
+EXPORT_SYMBOL vmlinux 0xf14c079a	xfrm_policy_walk
+EXPORT_SYMBOL vmlinux 0xf174ed48	acquire_console_sem
+EXPORT_SYMBOL vmlinux 0xf183189b	__ioremap_at
+EXPORT_SYMBOL vmlinux 0xf195c682	fb_invert_cmaps
+EXPORT_SYMBOL vmlinux 0xf19bdc11	netdev_set_master
+EXPORT_SYMBOL vmlinux 0xf1bc1a7f	sk_common_release
+EXPORT_SYMBOL vmlinux 0xf1db1704	nla_memcpy
+EXPORT_SYMBOL vmlinux 0xf1dc3ea6	inode_init_always
+EXPORT_SYMBOL vmlinux 0xf1dd9fb3	down_read_trylock
+EXPORT_SYMBOL vmlinux 0xf1df1cb5	may_umount
+EXPORT_SYMBOL vmlinux 0xf1e98c74	avenrun
+EXPORT_SYMBOL vmlinux 0xf1f727d5	inet_frags_init
+EXPORT_SYMBOL vmlinux 0xf20dabd8	free_irq
+EXPORT_SYMBOL vmlinux 0xf2254996	numa_cpumask_lookup_table
+EXPORT_SYMBOL vmlinux 0xf2553b41	tcp_simple_retransmit
+EXPORT_SYMBOL vmlinux 0xf279379b	__nla_reserve_nohdr
+EXPORT_SYMBOL vmlinux 0xf291a571	dget_locked
+EXPORT_SYMBOL vmlinux 0xf2a35be2	phy_print_status
+EXPORT_SYMBOL vmlinux 0xf2e53e32	set_security_override_from_ctx
+EXPORT_SYMBOL vmlinux 0xf2e69fe5	nla_reserve
+EXPORT_SYMBOL vmlinux 0xf309e9ee	cur_cpu_spec
+EXPORT_SYMBOL vmlinux 0xf30ad568	__netdev_alloc_page
+EXPORT_SYMBOL vmlinux 0xf30d1036	_lv1_start_ppe_periodic_tracer
+EXPORT_SYMBOL vmlinux 0xf313da4e	sha_transform
+EXPORT_SYMBOL vmlinux 0xf3341268	__clear_user
+EXPORT_SYMBOL vmlinux 0xf338d4c3	netlink_unregister_notifier
+EXPORT_SYMBOL vmlinux 0xf3433e3f	i2c_get_adapter
+EXPORT_SYMBOL vmlinux 0xf346231f	seq_list_start_head
+EXPORT_SYMBOL vmlinux 0xf357db8d	pasemi_dma_set_flag
+EXPORT_SYMBOL vmlinux 0xf35ae954	simple_dir_operations
+EXPORT_SYMBOL vmlinux 0xf397b9aa	__tasklet_schedule
+EXPORT_SYMBOL vmlinux 0xf39a5222	_lv1_get_virtual_address_space_id_of_ppe
+EXPORT_SYMBOL vmlinux 0xf39f0fe3	jbd2_journal_release_jbd_inode
+EXPORT_SYMBOL vmlinux 0xf39f8152	pci_enable_device_io
+EXPORT_SYMBOL vmlinux 0xf3a8959f	ip_route_output_key
+EXPORT_SYMBOL vmlinux 0xf3bf0bce	__bitmap_complement
+EXPORT_SYMBOL vmlinux 0xf3e00b2b	pfifo_qdisc_ops
+EXPORT_SYMBOL vmlinux 0xf3ea7b9e	fb_validate_mode
+EXPORT_SYMBOL vmlinux 0xf441ac43	ioread8_rep
+EXPORT_SYMBOL vmlinux 0xf4528d45	neigh_event_ns
+EXPORT_SYMBOL vmlinux 0xf456c906	dst_release
+EXPORT_SYMBOL vmlinux 0xf46aa199	pci_get_class
+EXPORT_SYMBOL vmlinux 0xf46f4618	napi_frags_finish
+EXPORT_SYMBOL vmlinux 0xf48481cc	simple_transaction_set
+EXPORT_SYMBOL vmlinux 0xf4b761fb	matroxfb_vgaHWinit
+EXPORT_SYMBOL vmlinux 0xf4c6d69d	save_mount_options
+EXPORT_SYMBOL vmlinux 0xf4d06481	matroxfb_register_driver
+EXPORT_SYMBOL vmlinux 0xf4d71beb	register_framebuffer
+EXPORT_SYMBOL vmlinux 0xf4dee8b3	__task_pid_nr_ns
+EXPORT_SYMBOL vmlinux 0xf4e077ad	ip_nat_decode_session
+EXPORT_SYMBOL vmlinux 0xf4e7e6d4	vm_insert_page
+EXPORT_SYMBOL vmlinux 0xf4f14de6	rtnl_trylock
+EXPORT_SYMBOL vmlinux 0xf4f52f93	dqstats
+EXPORT_SYMBOL vmlinux 0xf505b33e	journal_init_inode
+EXPORT_SYMBOL vmlinux 0xf520a51c	bio_get_nr_vecs
+EXPORT_SYMBOL vmlinux 0xf5294ec8	lookup_hash
+EXPORT_SYMBOL vmlinux 0xf531608a	blk_stop_queue
+EXPORT_SYMBOL vmlinux 0xf5325c2c	__elv_add_request
+EXPORT_SYMBOL vmlinux 0xf53b20ad	simple_transaction_read
+EXPORT_SYMBOL vmlinux 0xf53d4c26	qdisc_class_hash_destroy
+EXPORT_SYMBOL vmlinux 0xf55e189a	tcp_v4_syn_recv_sock
+EXPORT_SYMBOL vmlinux 0xf56698df	tty_port_lower_dtr_rts
+EXPORT_SYMBOL vmlinux 0xf57201a2	blk_end_request_all
+EXPORT_SYMBOL vmlinux 0xf57dfe5f	set_bh_page
+EXPORT_SYMBOL vmlinux 0xf5995242	filemap_flush
+EXPORT_SYMBOL vmlinux 0xf59d1849	input_get_keycode
+EXPORT_SYMBOL vmlinux 0xf5a62ecc	_memset_io
+EXPORT_SYMBOL vmlinux 0xf5b4cc2d	sg_init_table
+EXPORT_SYMBOL vmlinux 0xf5c36ef3	pci_match_id
+EXPORT_SYMBOL vmlinux 0xf5c5f5ae	path_get
+EXPORT_SYMBOL vmlinux 0xf5c9012e	timespec_trunc
+EXPORT_SYMBOL vmlinux 0xf5e1558d	crash_shutdown_unregister
+EXPORT_SYMBOL vmlinux 0xf5eb86ea	blk_verify_command
+EXPORT_SYMBOL vmlinux 0xf603d548	dm_get_device
+EXPORT_SYMBOL vmlinux 0xf603d6d2	sock_no_socketpair
+EXPORT_SYMBOL vmlinux 0xf6213e12	pasemi_dma_clear_flag
+EXPORT_SYMBOL vmlinux 0xf6290df9	dev_set_drvdata
+EXPORT_SYMBOL vmlinux 0xf66dd6de	block_write_begin
+EXPORT_SYMBOL vmlinux 0xf69be488	wait_for_completion
+EXPORT_SYMBOL vmlinux 0xf6a634a8	jbd2_journal_check_available_features
+EXPORT_SYMBOL vmlinux 0xf6a7b3a9	invalidate_bdev
+EXPORT_SYMBOL vmlinux 0xf6b134cb	of_device_register
+EXPORT_SYMBOL vmlinux 0xf6bb4729	color_table
+EXPORT_SYMBOL vmlinux 0xf6bbc5a2	__napi_schedule
+EXPORT_SYMBOL vmlinux 0xf6ebc03b	net_ratelimit
+EXPORT_SYMBOL vmlinux 0xf6ecb763	_lv1_send_event_locally
+EXPORT_SYMBOL vmlinux 0xf701c554	jbd2_journal_clear_features
+EXPORT_SYMBOL vmlinux 0xf7067a0d	simple_fsync
+EXPORT_SYMBOL vmlinux 0xf71eba51	simple_getattr
+EXPORT_SYMBOL vmlinux 0xf71ff50c	macio_request_resource
+EXPORT_SYMBOL vmlinux 0xf73340db	kobject_add
+EXPORT_SYMBOL vmlinux 0xf7584a9c	find_font
+EXPORT_SYMBOL vmlinux 0xf76cea03	unregister_qdisc
+EXPORT_SYMBOL vmlinux 0xf78cf332	dev_remove_pack
+EXPORT_SYMBOL vmlinux 0xf78d04ab	netlink_register_notifier
+EXPORT_SYMBOL vmlinux 0xf79a706e	bio_put
+EXPORT_SYMBOL vmlinux 0xf79ac03d	pskb_copy
+EXPORT_SYMBOL vmlinux 0xf7bac0ec	_lv1_set_lpm_counter
+EXPORT_SYMBOL vmlinux 0xf7beac3c	scsi_get_host_dev
+EXPORT_SYMBOL vmlinux 0xf7cc335f	gen_new_estimator
+EXPORT_SYMBOL vmlinux 0xf7eb6c47	scsi_execute
+EXPORT_SYMBOL vmlinux 0xf7f94a26	__invalidate_device
+EXPORT_SYMBOL vmlinux 0xf8004bfd	_lv1_disconnect_interrupt_event_receive_port
+EXPORT_SYMBOL vmlinux 0xf800e6ef	register_sysrq_key
+EXPORT_SYMBOL vmlinux 0xf80a8f8e	udp_lib_getsockopt
+EXPORT_SYMBOL vmlinux 0xf811e69d	scsi_eh_flush_done_q
+EXPORT_SYMBOL vmlinux 0xf8123407	pci_scan_slot
+EXPORT_SYMBOL vmlinux 0xf81c2fec	__module_put_and_exit
+EXPORT_SYMBOL vmlinux 0xf82374f6	xfrm_cfg_mutex
+EXPORT_SYMBOL vmlinux 0xf825abb7	skb_dequeue_tail
+EXPORT_SYMBOL vmlinux 0xf82abc1d	isa_dma_bridge_buggy
+EXPORT_SYMBOL vmlinux 0xf842b3f1	blk_queue_io_opt
+EXPORT_SYMBOL vmlinux 0xf85d7631	blk_queue_prep_rq
+EXPORT_SYMBOL vmlinux 0xf8906870	vio_cmo_entitlement_update
+EXPORT_SYMBOL vmlinux 0xf892e5ba	truncate_inode_pages
+EXPORT_SYMBOL vmlinux 0xf8acdada	mdiobus_free
+EXPORT_SYMBOL vmlinux 0xf8b257e4	nla_reserve_nohdr
+EXPORT_SYMBOL vmlinux 0xf8b783b7	set_blocksize
+EXPORT_SYMBOL vmlinux 0xf8bdb8b5	poll_schedule_timeout
+EXPORT_SYMBOL vmlinux 0xf8df43d9	tcf_generic_walker
+EXPORT_SYMBOL vmlinux 0xf8e12e77	skb_over_panic
+EXPORT_SYMBOL vmlinux 0xf8eda325	scsi_prep_return
+EXPORT_SYMBOL vmlinux 0xf8fda569	rwsem_down_write_failed
+EXPORT_SYMBOL vmlinux 0xf9002b38	__blockdev_direct_IO
+EXPORT_SYMBOL vmlinux 0xf916436b	skb_abort_seq_read
+EXPORT_SYMBOL vmlinux 0xf937402c	__inc_zone_page_state
+EXPORT_SYMBOL vmlinux 0xf95e3f76	matroxfb_enable_irq
+EXPORT_SYMBOL vmlinux 0xf9764a9d	unregister_binfmt
+EXPORT_SYMBOL vmlinux 0xf97d9633	lro_flush_pkt
+EXPORT_SYMBOL vmlinux 0xf99183ea	kmem_cache_name
+EXPORT_SYMBOL vmlinux 0xf9a482f9	msleep
+EXPORT_SYMBOL vmlinux 0xf9a6ba65	g450_mnp2f
+EXPORT_SYMBOL vmlinux 0xf9b1feb1	skb_split
+EXPORT_SYMBOL vmlinux 0xf9bb43ee	blk_rq_count_integrity_sg
+EXPORT_SYMBOL vmlinux 0xf9ce2e36	nf_ip_checksum
+EXPORT_SYMBOL vmlinux 0xf9d86e7b	blk_queue_logical_block_size
+EXPORT_SYMBOL vmlinux 0xfa00c9a1	tcp_close
+EXPORT_SYMBOL vmlinux 0xfa1c40aa	tcp_child_process
+EXPORT_SYMBOL vmlinux 0xfa2ea329	ethtool_op_get_tx_csum
+EXPORT_SYMBOL vmlinux 0xfa31cd3b	kfifo_init
+EXPORT_SYMBOL vmlinux 0xfa4c7a55	redraw_screen
+EXPORT_SYMBOL vmlinux 0xfa4cf133	blk_queue_max_phys_segments
+EXPORT_SYMBOL vmlinux 0xfa64119c	__vlan_hwaccel_rx
+EXPORT_SYMBOL vmlinux 0xfa74b63a	rtnl_set_sk_err
+EXPORT_SYMBOL vmlinux 0xfa763165	ip_ct_attach
+EXPORT_SYMBOL vmlinux 0xfa908648	sysctl_jiffies
+EXPORT_SYMBOL vmlinux 0xfa997bbc	xfrm_alloc_spi
+EXPORT_SYMBOL vmlinux 0xfaa2ce7f	invalidate_partition
+EXPORT_SYMBOL vmlinux 0xfaad13b2	input_close_device
+EXPORT_SYMBOL vmlinux 0xfabe3e0d	tcp_parse_options
+EXPORT_SYMBOL vmlinux 0xfadb5750	pmu_unlock
+EXPORT_SYMBOL vmlinux 0xfadfb14e	unregister_con_driver
+EXPORT_SYMBOL vmlinux 0xfae87771	task_nice
+EXPORT_SYMBOL vmlinux 0xfaf98462	bitrev32
+EXPORT_SYMBOL vmlinux 0xfb0cf2e9	touch_all_softlockup_watchdogs
+EXPORT_SYMBOL vmlinux 0xfb219df3	vfs_dq_transfer
+EXPORT_SYMBOL vmlinux 0xfb2c4e70	d_delete
+EXPORT_SYMBOL vmlinux 0xfb3fe3f2	sk_reset_timer
+EXPORT_SYMBOL vmlinux 0xfb404f8b	of_get_mac_address
+EXPORT_SYMBOL vmlinux 0xfb4979e3	textsearch_find_continuous
+EXPORT_SYMBOL vmlinux 0xfb58cb2b	nf_register_queue_handler
+EXPORT_SYMBOL vmlinux 0xfb6af58d	recalc_sigpending
+EXPORT_SYMBOL vmlinux 0xfb779823	wake_up_process
+EXPORT_SYMBOL vmlinux 0xfb788c9b	gen_pool_alloc
+EXPORT_SYMBOL vmlinux 0xfbb1296b	scsi_remove_device
+EXPORT_SYMBOL vmlinux 0xfbd13598	xfrm_unregister_mode
+EXPORT_SYMBOL vmlinux 0xfbe27a1c	rb_first
+EXPORT_SYMBOL vmlinux 0xfbe7ec62	udplite_prot
+EXPORT_SYMBOL vmlinux 0xfc02b7ad	sysctl_tcp_wmem
+EXPORT_SYMBOL vmlinux 0xfc09d631	may_umount_tree
+EXPORT_SYMBOL vmlinux 0xfc39e32f	ioport_unmap
+EXPORT_SYMBOL vmlinux 0xfc47091d	bio_integrity_alloc_bioset
+EXPORT_SYMBOL vmlinux 0xfc71bf70	inet_accept
+EXPORT_SYMBOL vmlinux 0xfc89bdb8	iov_iter_copy_from_user_atomic
+EXPORT_SYMBOL vmlinux 0xfc96bd33	d_path
+EXPORT_SYMBOL vmlinux 0xfc9ff695	single_open
+EXPORT_SYMBOL vmlinux 0xfcaa04a0	out_of_line_wait_on_bit_lock
+EXPORT_SYMBOL vmlinux 0xfcc2a43c	utf32_to_utf8
+EXPORT_SYMBOL vmlinux 0xfcec0987	enable_irq
+EXPORT_SYMBOL vmlinux 0xfcfa03ff	fb_videomode_to_modelist
+EXPORT_SYMBOL vmlinux 0xfd4e40c9	serio_reconnect
+EXPORT_SYMBOL vmlinux 0xfd5d616c	fb_pan_display
+EXPORT_SYMBOL vmlinux 0xfd684379	napi_get_frags
+EXPORT_SYMBOL vmlinux 0xfd80fad5	tcf_exts_dump
+EXPORT_SYMBOL vmlinux 0xfd95e622	register_snap_client
+EXPORT_SYMBOL vmlinux 0xfd9eddc8	compat_ip_setsockopt
+EXPORT_SYMBOL vmlinux 0xfda85a7d	request_threaded_irq
+EXPORT_SYMBOL vmlinux 0xfdb9b629	ioread32be
+EXPORT_SYMBOL vmlinux 0xfded48ed	enable_kernel_fp
+EXPORT_SYMBOL vmlinux 0xfdfc0b3b	fiemap_fill_next_extent
+EXPORT_SYMBOL vmlinux 0xfe06ac67	matroxfb_unregister_driver
+EXPORT_SYMBOL vmlinux 0xfe1e14e4	of_dev_put
+EXPORT_SYMBOL vmlinux 0xfe26fc7c	nr_node_ids
+EXPORT_SYMBOL vmlinux 0xfe36ceb0	sync_inode
+EXPORT_SYMBOL vmlinux 0xfe392bcd	generic_segment_checks
+EXPORT_SYMBOL vmlinux 0xfe4cb4b5	_lv1_storage_write
+EXPORT_SYMBOL vmlinux 0xfe5d4bb2	sys_tz
+EXPORT_SYMBOL vmlinux 0xfe769456	unregister_netdevice_notifier
+EXPORT_SYMBOL vmlinux 0xfe7746e8	pcie_get_readrq
+EXPORT_SYMBOL vmlinux 0xfe7c4287	nr_cpu_ids
+EXPORT_SYMBOL vmlinux 0xfeb4646c	nvram_find_partition
+EXPORT_SYMBOL vmlinux 0xfec3c2f2	bcd2bin
+EXPORT_SYMBOL vmlinux 0xfed221d9	pasemi_dma_alloc_ring
+EXPORT_SYMBOL vmlinux 0xfed73d2f	cdrom_get_last_written
+EXPORT_SYMBOL vmlinux 0xfedd35fc	console_suspend_enabled
+EXPORT_SYMBOL vmlinux 0xfee0e308	vga_tryget
+EXPORT_SYMBOL vmlinux 0xfeefa4b1	security_task_getsecid
+EXPORT_SYMBOL vmlinux 0xfef96e23	__scsi_print_command
+EXPORT_SYMBOL vmlinux 0xff165985	scsi_device_resume
+EXPORT_SYMBOL vmlinux 0xff1765c7	rtas_call
+EXPORT_SYMBOL vmlinux 0xff1b4941	journal_abort
+EXPORT_SYMBOL vmlinux 0xff1e9dd8	seq_list_start
+EXPORT_SYMBOL vmlinux 0xff2c8e55	proc_net_netfilter
+EXPORT_SYMBOL vmlinux 0xff4bf974	install_exec_creds
+EXPORT_SYMBOL vmlinux 0xff575cdf	inet_stream_ops
+EXPORT_SYMBOL vmlinux 0xff664794	bio_add_pc_page
+EXPORT_SYMBOL vmlinux 0xff6878cf	fb_default_cmap
+EXPORT_SYMBOL vmlinux 0xff6cefd3	block_write_end
+EXPORT_SYMBOL vmlinux 0xff722688	tcp_hashinfo
+EXPORT_SYMBOL vmlinux 0xff7559e4	ioport_resource
+EXPORT_SYMBOL vmlinux 0xff81d2c5	__debugger_dabr_match
+EXPORT_SYMBOL vmlinux 0xff822b9b	unload_nls
+EXPORT_SYMBOL vmlinux 0xff82de1e	of_find_i2c_device_by_node
+EXPORT_SYMBOL vmlinux 0xff964b25	param_set_int
+EXPORT_SYMBOL vmlinux 0xff9ca065	fb_edid_to_monspecs
+EXPORT_SYMBOL vmlinux 0xffb24af1	iunique
+EXPORT_SYMBOL vmlinux 0xffd5a395	default_wake_function
+EXPORT_SYMBOL vmlinux 0xffec2b88	phy_detach
+EXPORT_SYMBOL_GPL arch/powerpc/platforms/cell/spufs/spufs 0x367e933e	spu_restore
+EXPORT_SYMBOL_GPL arch/powerpc/platforms/cell/spufs/spufs 0x5797dd53	spufs_context_fops
+EXPORT_SYMBOL_GPL arch/powerpc/platforms/cell/spufs/spufs 0x9ea48dc2	spu_save
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x0cc1e40f	crypto_it_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x24aac4d9	crypto_aes_expand_key
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x3dc916b6	crypto_fl_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x40d46b21	crypto_ft_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x71dc9998	crypto_il_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0xaa1f422a	crypto_aes_set_key
+EXPORT_SYMBOL_GPL crypto/async_tx/async_memcpy 0x1ff955fa	async_memcpy
+EXPORT_SYMBOL_GPL crypto/async_tx/async_pq 0x2e958ba1	async_syndrome_val
+EXPORT_SYMBOL_GPL crypto/async_tx/async_pq 0xec3e36d5	async_gen_syndrome
+EXPORT_SYMBOL_GPL crypto/async_tx/async_raid6_recov 0x39e66dc1	async_raid6_2data_recov
+EXPORT_SYMBOL_GPL crypto/async_tx/async_raid6_recov 0xbd9dde52	async_raid6_datap_recov
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x47c39a52	async_tx_submit
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x847b8be7	async_tx_quiesce
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0xafe63e28	async_trigger_callback
+EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0x21516726	async_xor_val
+EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0xfce44b5c	async_xor
+EXPORT_SYMBOL_GPL crypto/cryptd 0x38ef7e22	cryptd_ablkcipher_child
+EXPORT_SYMBOL_GPL crypto/cryptd 0x3a2db460	cryptd_alloc_ablkcipher
+EXPORT_SYMBOL_GPL crypto/cryptd 0x3a648e16	cryptd_free_ablkcipher
+EXPORT_SYMBOL_GPL crypto/cryptd 0x7585944e	cryptd_shash_desc
+EXPORT_SYMBOL_GPL crypto/cryptd 0x8fa25553	cryptd_ahash_child
+EXPORT_SYMBOL_GPL crypto/cryptd 0xab3cf181	cryptd_alloc_ahash
+EXPORT_SYMBOL_GPL crypto/cryptd 0xccc130a8	cryptd_free_ahash
+EXPORT_SYMBOL_GPL crypto/des_generic 0xcfd9a2c0	des_ekey
+EXPORT_SYMBOL_GPL crypto/twofish_common 0x4b09ca01	twofish_setkey
+EXPORT_SYMBOL_GPL drivers/ata/pata_platform 0x2c747571	__pata_platform_remove
+EXPORT_SYMBOL_GPL drivers/ata/pata_platform 0x5c4c5176	__pata_platform_probe
+EXPORT_SYMBOL_GPL drivers/ata/pata_sis 0xfcb25964	sis_info133_for_sata
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x14102f23	ks0108_displaystate
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x48a70518	ks0108_writedata
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x4f506333	ks0108_startline
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x6edae968	ks0108_isinited
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xbf4774db	ks0108_writecontrol
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xedde6df2	ks0108_page
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xfee8ef7b	ks0108_address
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0x51ec64c5	btmrvl_check_evtpkt
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0x570d6539	btmrvl_interrupt
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0x59877098	btmrvl_process_event
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0x5cab0669	btmrvl_remove_card
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0xa44c13fd	btmrvl_add_card
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0xdb81a0ef	btmrvl_send_module_cfg_cmd
+EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0x023f5a77	agp_add_bridge
+EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0x86338ded	agp_remove_bridge
+EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0xd6feefa5	agp_num_entries
+EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0xe089cfcc	agp_memory_reserved
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x0902732f	tpm_show_enabled
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x0fd9fc95	tpm_show_temp_deactivated
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x15fca096	tpm_dev_release
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x18cb155d	tpm_remove_hardware
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x2841ee4d	tpm_register_hardware
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x396495b3	tpm_open
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x3f3c542c	tpm_calc_ordinal_duration
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x49d154d4	tpm_show_active
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x4cc5ca92	tpm_show_timeouts
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x5f698215	tpm_show_caps_1_2
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x6790e819	tpm_gen_interrupt
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x6e3c19aa	tpm_write
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x76516368	tpm_read
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x7826e425	tpm_store_cancel
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x8feecd2e	tpm_dev_vendor_release
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xa0361d27	tpm_show_caps
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xa48dbe65	tpm_get_timeouts
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xab7c371c	tpm_show_pcrs
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xadf6aa4d	tpm_pcr_read
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xae231004	tpm_show_owned
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xbca02ba5	tpm_pm_suspend
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xbeda9d7b	tpm_pm_resume
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xc37226a5	tpm_pcr_extend
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xd93eb564	tpm_continue_selftest
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xe3b46361	tpm_show_pubek
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xe5431647	tpm_release
+EXPORT_SYMBOL_GPL drivers/connector/cn 0xb10d55bc	cn_netlink_send
+EXPORT_SYMBOL_GPL drivers/connector/cn 0xcf7a962e	cn_add_callback
+EXPORT_SYMBOL_GPL drivers/connector/cn 0xff5a8cfe	cn_del_callback
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x048d2531	edac_mc_del_mc
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x0c32ff8a	edac_pci_alloc_index
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x12b48c0c	edac_pci_create_generic_ctl
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x18477ed7	edac_device_alloc_ctl_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x1943692d	edac_mc_find_csrow_by_page
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x1b9c1c2b	edac_pci_handle_npe
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x22903368	edac_pci_del_device
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x373a7b9c	edac_mc_handle_ue_no_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x46909fed	edac_device_handle_ue
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x53472974	edac_mc_handle_ce_no_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x5374d192	edac_device_free_ctl_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x64899224	edac_pci_reset_delay_period
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x6e3ff83a	edac_device_alloc_index
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x7145a02d	edac_pci_alloc_ctl_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x75d1e97f	edac_device_handle_ce
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xa4ff071b	edac_pci_free_ctl_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xb17497e5	edac_mc_handle_ce
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xba27cf52	edac_pci_add_device
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xc7a05ce7	edac_pci_handle_pe
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xcfd45248	edac_device_del_device
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xdcad9e23	edac_device_add_device
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xddd3202c	edac_mc_handle_ue
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xe510fc22	edac_mc_add_mc
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xea108f10	edac_mc_free
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xecdae601	edac_mc_alloc
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xefda22e9	edac_pci_release_generic_ctl
+EXPORT_SYMBOL_GPL drivers/gpu/drm/drm 0x239811e0	drm_class_device_register
+EXPORT_SYMBOL_GPL drivers/gpu/drm/drm 0x6dbb5b0b	drm_class_device_unregister
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x05495392	hid_debug
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x05e669c6	hid_parse_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x199cd07d	hidinput_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x2d0f9211	hidraw_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x2fa027d0	hid_input_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x31f2043b	hid_set_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x36289a77	hid_check_keys_pressed
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x455c27d3	hidinput_report_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x45b943fa	hid_output_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x48ea910a	hid_debug_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x584bb5fc	hid_dump_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x6db02c0e	hid_add_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x880e8ee5	hid_dump_input
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x99895566	hid_dump_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x9f24c3de	__hid_register_driver
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xa7e37059	hid_resolv_usage
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xb050d7e0	hid_allocate_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xca28d099	hidraw_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xcca80f9d	hidinput_find_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xcdf2efe2	hid_report_raw_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xce7b78ef	hid_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xd2e0c25e	hidinput_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xdeda28ec	hidraw_report_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xe3ccabb3	hid_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xf3591053	hid_destroy_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xff2ed877	hid_unregister_driver
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x01fd453e	usbhid_lookup_quirk
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x31941bd5	usbhid_submit_report
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x5f7df903	usbhid_set_leds
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0xc0697253	hiddev_hid_event
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x3df2eecd	lis3lv02d_poweroff
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x66a706a3	lis3lv02d_init_device
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x6c33e494	lis3lv02d_joystick_disable
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x831c7cd9	lis3lv02d_remove_fs
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xbf478141	lis3lv02d_poweron
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xe6af28c8	lis3lv02d_joystick_enable
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xf5af7538	lis3_dev
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0x1232e653	hpsb_config_rom_ip1394_remove
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0xd93e8556	hpsb_config_rom_ip1394_add
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0xec8d18cf	hpsb_disable_irm
+EXPORT_SYMBOL_GPL drivers/input/ff-memless 0x54e7839e	input_ff_create_memless
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x48f4036e	wm97xx_config_gpio
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x6d8d36ac	wm9713_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xa1273632	wm9712_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xa4d25fb2	wm97xx_reg_write
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xa87f2f8d	wm97xx_set_gpio
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xbc992b68	wm9705_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xc185bcbd	wm97xx_reg_read
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xc45269a4	wm97xx_register_mach_ops
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xc9ba54bd	wm97xx_read_aux_adc
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xcff0fdde	wm97xx_get_gpio
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xe0b1184e	wm97xx_set_suspend_mode
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xf57a69a1	wm97xx_unregister_mach_ops
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0x21bac4cf	wf_register_control
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0x2566a6ab	wf_find_control
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0x291570ab	wf_unregister_control
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0x2acb9313	wf_register_sensor
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0x3c2f1424	wf_unregister_sensor
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0x3e610238	wf_find_sensor
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0x75147afa	wf_set_overtemp
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0x8efb5487	wf_put_sensor
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0x94765fac	wf_critical_overtemp
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0xa2f19a49	wf_is_overtemp
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0xac9885a6	wf_get_sensor
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0xaf15726f	wf_unregister_client
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0xc2829b3e	wf_put_control
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0xccc84cec	wf_get_control
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0xdb7e8499	wf_register_client
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0xed82a14f	wf_clear_overtemp
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_pid 0x9808f147	wf_pid_run
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_pid 0xb8ed5b2c	wf_cpu_pid_init
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_pid 0xcd9a18ef	wf_pid_init
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_pid 0xceda69f1	wf_cpu_pid_run
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_smu_sat 0xe05851d5	smu_sat_get_sdb_partition
+EXPORT_SYMBOL_GPL drivers/md/dm-multipath 0x60744a77	dm_unregister_path_selector
+EXPORT_SYMBOL_GPL drivers/md/dm-multipath 0x9b365b28	dm_register_path_selector
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x1af6b940	dm_rh_region_to_sector
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x25631036	dm_rh_get_region_size
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x3398a2de	dm_rh_dec
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x4c52995a	dm_region_hash_destroy
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x4d2f4cf8	dm_rh_update_states
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x5a54bfa4	dm_rh_bio_to_region
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x619fb9bd	dm_rh_flush
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x797dc34c	dm_rh_get_state
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x94e22ae6	dm_rh_delay
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x98a61196	dm_rh_recovery_in_flight
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xa8a02222	dm_rh_start_recovery
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xc0d46083	dm_rh_recovery_start
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xd7053d2a	dm_rh_recovery_prepare
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xda8fe54b	dm_rh_mark_nosync
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xdf7eda39	dm_rh_dirty_log
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xe778b709	dm_rh_get_region_key
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xe7b7b3f5	dm_region_hash_create
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xe91fe9d3	dm_rh_region_context
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xedb4e291	dm_rh_inc_pending
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xf9d2dfe8	dm_rh_recovery_end
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xfafa40db	dm_rh_stop_recovery
+EXPORT_SYMBOL_GPL drivers/md/md-mod 0x013fcd50	md_do_sync
+EXPORT_SYMBOL_GPL drivers/md/md-mod 0x423e103a	sync_page_io
+EXPORT_SYMBOL_GPL drivers/md/md-mod 0x948fd221	md_allow_write
+EXPORT_SYMBOL_GPL drivers/md/md-mod 0xcc567b5f	md_new_event
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0x24935f26	raid6_call
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0xcdc24ab5	raid6_2data_recov
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0xdbab0c01	raid6_datap_recov
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x0349c9bd	ir_codes_proteus_2309_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x0366dcdf	ir_codes_videomate_s350_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x110b053a	ir_codes_pixelview_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x124cb753	ir_codes_encore_enltv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x183fdfdd	ir_codes_gotview7135_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x19b4d61c	ir_codes_nebula_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x19cd2826	ir_codes_behold_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x1a9009d6	ir_codes_dm1105_nec_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x1cb148f5	ir_extract_bits
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x1d66324d	ir_input_init
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2456e513	ir_decode_pulsedistance
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2cc459b5	ir_codes_flydvb_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2d0e9a49	ir_codes_em_terratec_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3136d8ff	ir_codes_dntv_live_dvbt_pro_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x32b9033b	ir_codes_apac_viewcomp_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3909f4ad	ir_codes_terratec_cinergy_xs_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3a84be27	ir_codes_avermedia_a16d_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3edfb314	ir_input_nokey
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x4267d749	ir_codes_budget_ci_old_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x43c89ef4	ir_decode_biphase
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x4c1442c1	ir_codes_real_audio_220_32_keys_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x51ba1643	ir_codes_kworld_plus_tv_analog_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x543db4ff	ir_codes_avermedia_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x58f30078	ir_input_keydown
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x5e95da31	ir_codes_tt_1500_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x5fbe6515	ir_codes_pinnacle_color_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x61d039d7	ir_codes_behold_columbus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6427a3fb	ir_codes_pinnacle_grey_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x64b02fed	ir_codes_avermedia_dvbt_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6606596a	ir_rc5_timer_keyup
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6809de82	ir_codes_pctv_sedna_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6d6511e7	ir_dump_samples
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x703fc738	ir_codes_avertv_303_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x7283f81d	ir_codes_purpletv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x72c2992e	ir_codes_powercolor_real_angel_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x76d71b8e	ir_codes_dntv_live_dvb_t_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x784e176d	ir_codes_asus_pc39_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x828b3ce5	ir_codes_encore_enltv_fm53_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x8acae3dd	ir_codes_pinnacle_pctv_hd_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x92d1d181	ir_codes_flyvideo_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x94651dab	ir_codes_ati_tv_wonder_hd_600_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x97c35dab	ir_codes_msi_tvanywhere_plus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x9944e2e5	ir_codes_hauppauge_new_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xa69aa6ad	ir_codes_pv951_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xa95157c5	ir_codes_cinergy_1400_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xac15f6c8	ir_codes_kaiomy_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xaff22e87	ir_codes_pixelview_new_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb01a1998	ir_codes_manli_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb0a8ef38	ir_codes_rc5_tv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb57445f7	ir_codes_eztv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb5adb754	ir_codes_cinergy_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xbd3ce6f0	ir_codes_avermedia_cardbus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xbeaccbdc	ir_codes_gadmei_rm008z_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xcba36c62	ir_codes_videomate_tv_pvr_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xd30c491f	ir_codes_norwood_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xdc23fec4	ir_codes_fusionhdtv_mce_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xdd4c0a07	ir_codes_evga_indtube_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xe1101f4d	ir_codes_avermedia_m135a_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xe4140c60	ir_codes_genius_tvgo_a11mce_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xeb9bb08f	ir_codes_npgtech_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xebf345b4	ir_codes_encore_enltv2_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xeec89db8	ir_codes_empty_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xef29c40d	ir_codes_adstech_dvb_t_pci_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf33c155d	ir_codes_msi_tvanywhere_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf3d619ec	ir_codes_iodata_bctv7e_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf4f7a4d6	ir_rc5_timer_end
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf5e15e65	ir_codes_winfast_table
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x20ef167b	saa7146_i2c_adapter_prepare
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x2cd6c8f2	saa7146_pgtable_free
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x2de86bc5	saa7146_wait_for_debi_done
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x43e1aaa9	saa7146_vmalloc_build_pgtable
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x5b780b9c	saa7146_register_extension
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x6a0c616a	saa7146_setgpio
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xb135fcce	saa7146_pgtable_alloc
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xc9f9f7ce	saa7146_pgtable_build_single
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xcb6f4751	saa7146_vfree_destroy_pgtable
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xcf683cf2	saa7146_devices
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xe3cd9b5c	saa7146_debug
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xe50dded7	saa7146_devices_lock
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xf71df8c3	saa7146_unregister_extension
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x3f261be4	saa7146_unregister_device
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x464849f7	saa7146_register_device
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x811fd9d3	saa7146_stop_preview
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xaec6f75d	saa7146_vv_init
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xc02489eb	saa7146_start_preview
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xd6e468a8	saa7146_set_hps_source_and_sync
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xe4f3b21e	saa7146_vv_release
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/mt20xx 0x823d6770	microtune_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/mxl5007t 0xca9458b8	mxl5007t_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda18271 0x6918fd20	tda18271_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda827x 0x22adf18c	tda827x_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda8290 0xdafaf31c	tda829x_probe
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda8290 0xf2be9516	tda829x_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda9887 0xf7a2c85f	tda9887_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5761 0x45a69d52	tea5761_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5761 0xb9149eab	tea5761_autodetection
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5767 0x7fee63f8	tea5767_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5767 0x8acca8d5	tea5767_autodetection
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tuner-simple 0x3b5556fa	simple_tuner_attach
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x03245cf0	smscore_start_device
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x04cbf5d4	smscore_set_board_id
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x0cfcdcd2	smscore_register_hotplug
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x13509a80	smscore_getbuffer
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x15fe53bc	smscore_get_board_id
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x21e36bf2	smscore_registry_getmode
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x37d91069	smsendian_handle_tx_message
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x3c1d6b3f	smscore_putbuffer
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x45284ae9	smsendian_handle_rx_message
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x5054f2ef	smscore_onresponse
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x6e1e5799	sms_board_event
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x70da9e2f	sms_board_setup
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x7104d52a	smscore_register_device
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x74ee9098	sms_board_load_modules
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x7c576277	smsendian_handle_message_header
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x82ad4e05	sms_board_led_feedback
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x8652d4cb	sms_board_lna_control
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x9f1ffd34	smscore_unregister_device
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xbc817420	sms_board_power
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xc7346786	smscore_register_client
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xd1bc6c4c	smsclient_sendrequest
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xd45ed688	smscore_get_device_mode
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xd803711b	smscore_unregister_client
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xe4d93a7f	smscore_unregister_hotplug
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xfda878c5	sms_get_board
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x017ea7c7	cx231xx_tuner_callback
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x0747250e	cx231xx_dev_uninit
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x443c1db8	cx231xx_set_alt_setting
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x5ff40f6a	cx231xx_send_usb_command
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x733dbdef	cx231xx_uninit_vbi_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x7c4f3bb5	cx231xx_uninit_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x91ea38b3	cx231xx_init_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x9b6b0edb	cx231xx_set_mode
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xaacb9162	cx231xx_capture_start
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xaf49f293	cx231xx_dev_init
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xcd04d084	cx231xx_init_vbi_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xd42340da	cx231xx_send_gpio_cmd
+EXPORT_SYMBOL_GPL drivers/media/video/cx88/cx88xx 0x89b99f1b	cx88_setup_xc3028
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x03ffbe69	em28xx_set_mode
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x28f5123c	em28xx_init_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x38406f58	em28xx_audio_analog_set
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x7fc8652c	em28xx_tuner_callback
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0xc77c4de4	em28xx_isoc_dvb_max_packetsize
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0xee89f626	em28xx_uninit_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0xf9fbdcd5	em28xx_audio_setup
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x2cdb1393	saa7134_g_ctrl_internal
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x429efed5	saa7134_ts_qops
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x60bf0d47	saa7134_queryctrl
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x8d43f8f7	saa7134_s_std_internal
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0xb23186e5	saa7134_s_ctrl_internal
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x0132b8f9	v4l2_i2c_new_subdev_cfg
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x31770615	v4l2_i2c_subdev_init
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x4967bb15	v4l2_i2c_new_subdev_board
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xea0e8587	v4l2_i2c_subdev_addr
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xf2a353ac	v4l2_i2c_tuner_addrs
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xf5ef842e	v4l_bound_align_image
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-compat-ioctl32 0xfe64607b	v4l2_compat_ioctl32
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x1481e733	v4l2_int_device_register
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x65112d2d	v4l2_int_ioctl_1
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xa5228b24	v4l2_int_device_try_attach_all
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xb89dee75	v4l2_int_ioctl_0
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xda968bec	v4l2_int_device_unregister
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x02d204e8	videobuf_read_one
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x27036aa9	videobuf_mmap_free
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x345732ff	videobuf_mmap_mapper
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x38142c77	videobuf_streamoff
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x51051d73	videobuf_waiton
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x6496c70e	videobuf_streamon
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x651ffa74	videobuf_queue_is_busy
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x688d8226	videobuf_qbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x6c9f0322	videobuf_poll_stream
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x71e0cb8d	videobuf_read_start
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x76ab0659	videobuf_queue_core_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x7ed0cd85	videobuf_alloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x875d7f12	videobuf_querybuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x9cbd87af	videobuf_stop
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xa8c10076	videobuf_queue_cancel
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xad2d4437	__videobuf_mmap_setup
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xaf364fa4	videobuf_cgmbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xb543d564	videobuf_iolock
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xbb6f89c1	videobuf_read_stop
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xbf4a723c	videobuf_dqbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xcd781bde	videobuf_read_stream
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xd0957843	videobuf_queue_to_vmalloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xd24dd89f	videobuf_reqbufs
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xd9861085	videobuf_next_field
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xe20b4487	videobuf_mmap_setup
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x27474d60	videobuf_dma_init_overlay
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x4a174f8c	videobuf_dma_free
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x6e8d2508	videobuf_to_dma
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x726bc753	videobuf_dma_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x8b9b80cb	videobuf_queue_sg_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x92029e4a	videobuf_dma_init_user
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x92d009ff	videobuf_dma_init_kernel
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xa38faed2	videobuf_sg_alloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xa634a0af	videobuf_sg_dma_unmap
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xb9b3bd4d	videobuf_dma_map
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xc30f01b4	videobuf_dma_unmap
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xc34b13c3	videobuf_sg_dma_map
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xca909ff5	videobuf_vmalloc_to_sg
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xe8afc13c	videobuf_dma_sync
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0x2cac105d	videobuf_queue_vmalloc_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0x46db401a	videobuf_to_vmalloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0x610c0be2	videobuf_vmalloc_free
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x08392b30	v4l2_device_register
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x2b66dccb	v4l2_device_disconnect
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x73b85e12	v4l2_device_register_subdev
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0xaeb371b0	v4l2_device_unregister_subdev
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0xc0bfc1f1	v4l2_device_unregister
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0xcdf525f0	v4l2_device_set_name
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x07897683	i2o_sg_tablesize
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x136a7bf6	i2o_dma_map_sg
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x5de80781	i2o_dma_map_single
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x60f0d4d6	i2o_dma_alloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x8cd5f2ff	i2o_dma_realloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xddd8053d	i2o_pool_alloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xe3b8e99f	i2o_pool_free
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xe581d52a	i2o_dma_free
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x192638c7	mc13783_adc_set_ts_status
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x5465d3a7	mc13783_adc_do_conversion
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x58e297bc	mc13783_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x805caefa	mc13783_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0xbd3ad37e	mc13783_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0xcacfa375	mc13783_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0xcbfff786	mc13783_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-adc 0x0c0a54ee	pcf50633_adc_sync_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-adc 0xddf7872d	pcf50633_adc_async_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x1e01dbd7	pcf50633_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x3d72f095	pcf50633_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x5c021e49	pcf50633_reg_set_bit_mask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x629a14f2	pcf50633_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x7390623d	pcf50633_reg_clear_bits
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x819557a7	pcf50633_read_block
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x9aec1ebc	pcf50633_irq_mask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xaf1cb032	pcf50633_irq_mask_get
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xb7406588	pcf50633_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xc75c792d	pcf50633_write_block
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xccab8a25	pcf50633_irq_unmask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x2ba49b91	pcf50633_gpio_set
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x4fe3728b	pcf50633_gpio_get
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x71680a0e	pcf50633_gpio_power_supply_set
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x74b80759	pcf50633_gpio_invert_set
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0xa7c43776	pcf50633_gpio_invert_get
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x68020eac	sm501_unit_power
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x869541f8	sm501_modify_reg
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x87204070	sm501_misc_control
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0xa2c82634	sm501_find_clock
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0xdd3a8679	sm501_set_clock
+EXPORT_SYMBOL_GPL drivers/mfd/ucb1400_core 0x48176c13	ucb1400_adc_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x366942b5	wm831x_auxadc_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x5229dcc8	wm831x_reg_unlock
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x5a71f19f	wm831x_enable_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x67cc7f1b	wm831x_disable_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x6d061253	wm831x_bulk_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x7dab26b6	wm831x_isinkv_values
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xa2f93166	wm831x_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xa3f125ea	wm831x_request_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xa884efd5	wm831x_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xaf2798fe	wm831x_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xc0a04955	wm831x_auxadc_read_uv
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xe55199c6	wm831x_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xed5a71c6	wm831x_reg_lock
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x043653ab	wm8350_read_auxadc
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x188cb607	wm8350_device_init
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x3372cf97	wm8350_mask_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x462138c4	wm8350_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x4d657e48	wm8350_block_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x500eec42	wm8350_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x5f7ab73e	wm8350_block_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x63bec57c	wm8350_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x84a9d645	wm8350_unmask_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x96b59a9a	wm8350_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xa977b0c7	wm8350_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xb59a3b1d	wm8350_device_exit
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xd0da6770	wm8350_reg_unlock
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xdc163151	wm8350_gpio_config
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xf077aee4	wm8350_reg_lock
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xf13d1875	wm8350_clear_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x6f93f0a5	wm8400_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0xcd4ecab7	wm8400_reset_codec_reg_cache
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0xd9e69e03	wm8400_block_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0xfeef112a	wm8400_reg_read
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x4c221016	cb710_sg_dwiter_read_next_block
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x5919c7fe	cb710_pci_update_config_reg
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x6f23d006	cb710_sg_dwiter_write_next_block
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0xc7d290db	cb710_set_irq_handler
+EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x2df115d4	eeprom_93cx6_multiread
+EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x63d14d2f	eeprom_93cx6_read
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x0b60017c	sdio_align_size
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x19380c0c	sdio_writew
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x46eaa05b	sdio_claim_host
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x4ffca3e3	sdio_readl
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x624b0cf5	sdio_register_driver
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x62898fd9	sdio_memcpy_toio
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x69d91af4	sdio_enable_func
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x7609f6c8	sdio_unregister_driver
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x87867e17	sdio_writel
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xa2427503	sdio_f0_readb
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xa4337417	sdio_claim_irq
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xa49eb1c9	sdio_release_irq
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xc9ce21f3	sdio_set_block_size
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xce91762c	sdio_readw
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xd62faca0	sdio_writesb
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xe1cc84df	sdio_release_host
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xe503ed6e	sdio_readsb
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xf25189ec	sdio_readb
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xf2da1733	sdio_writeb
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xf3a305bf	sdio_f0_writeb
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xfa2e01a2	sdio_memcpy_fromio
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xfb983b6a	sdio_disable_func
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x09edb60c	sdhci_add_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x1090e0b0	sdhci_remove_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x1e39010a	sdhci_resume_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x852d20d6	sdhci_suspend_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x9d3a6f5c	sdhci_free_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xd219c5da	sdhci_alloc_host
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x0dac47db	cfi_cmdset_0001
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x24b6bc78	cfi_cmdset_0003
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x5bdc548e	cfi_cmdset_0200
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0002 0xdd834289	cfi_cmdset_0002
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0020 0xbb6f5183	cfi_cmdset_0020
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x1dd29a3b	cfi_qry_mode_off
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x30a44cee	cfi_qry_mode_on
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0xe3e29148	cfi_qry_present
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2000 0x42fe0e58	DoC2k_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001 0x8e1a4651	DoCMil_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001plus 0xfda8f63e	DoCMilPlus_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/docecc 0x45937659	doc_decode_ecc
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x0360d0a2	mtd_erase_callback
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x0f2ac715	default_mtd_writev
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x28b62d15	put_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x2b4dabf6	get_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x3b21b8cd	get_sb_mtd
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x5ac9c54a	add_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x5bf3144f	kill_mtd_super
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x636315dc	mtd_table_mutex
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x70c40506	parse_mtd_partitions
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x7250b50a	register_mtd_user
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x9134aec7	unregister_mtd_user
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x9b0c789e	register_mtd_parser
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xa530201a	mtd_table
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xb9a0445a	deregister_mtd_parser
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xc38d2146	get_mtd_device_nm
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xccbfcc2f	del_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x009d1b6c	add_mtd_blktrans_dev
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x77f571af	register_mtd_blktrans
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x8a5863f1	del_mtd_blktrans_dev
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0xdd3569d0	deregister_mtd_blktrans
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x133c5bf3	nand_release
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x203d4111	nand_wait_ready
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x27e0c022	nand_scan
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x37bd43bc	nand_scan_tail
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x6165ef3c	nand_scan_ident
+EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0xa6733f8e	onenand_release
+EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0xd4207061	onenand_scan
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x19dab713	ubi_leb_unmap
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x334ee3ac	ubi_leb_read
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x42801d20	ubi_sync
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x47b92b91	ubi_is_mapped
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x4940be82	ubi_leb_erase
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x62c959f3	ubi_do_get_device_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x6f09ba8a	ubi_register_volume_notifier
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x956b1db3	ubi_open_volume_nm
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x9d34a656	ubi_get_volume_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xbb662402	ubi_leb_map
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xbc505df4	ubi_get_device_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xe57a3c5f	ubi_leb_change
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xe5a11f70	ubi_close_volume
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xf78f8865	ubi_leb_write
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xf92a276e	ubi_open_volume
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xfd6f0ef9	ubi_unregister_volume_notifier
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x31b51b2c	unregister_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x444702c0	register_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x472d5b41	free_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x54b67571	can_bus_off
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x66f41593	open_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x73bb0ac0	can_free_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x79cc4e5b	can_get_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x8bae262c	can_put_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x91188ca9	alloc_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x9c91a448	close_candev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x0cc4b9be	alloc_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x106a8844	unregister_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x402f63f5	register_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x9242aaee	free_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xdc9bd500	sja1000_interrupt
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x00752366	mlx4_CLOSE_PORT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x00ff3761	mlx4_cq_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x033b8f47	mlx4_qp_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x056752a2	mlx4_fmr_enable
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x074061d8	mlx4_unregister_mac
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x0965f5cc	mlx4_cq_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x158f39b2	mlx4_db_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1999b02a	mlx4_qp_query
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x21e08dc7	mlx4_pd_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x2aea20ff	mlx4_fmr_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x2e4b828b	mlx4_qp_to_ready
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x33f7d248	mlx4_srq_query
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x3973e2b1	__mlx4_cmd
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x4906cbc5	mlx4_register_mac
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x4978b5f7	mlx4_db_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x4b58db7e	mlx4_qp_release_range
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x4f73efe6	mlx4_qp_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x4fe4dc01	mlx4_write_mtt
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x5913d613	mlx4_mtt_init
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x5ff3e2f0	mlx4_mr_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x6527c053	mlx4_map_phys_fmr
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x6789ce70	mlx4_buf_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x67d2161a	mlx4_uar_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x71bf2a8d	mlx4_register_vlan
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x73d6449d	mlx4_alloc_cmd_mailbox
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x7491c7ee	mlx4_srq_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x76187649	mlx4_INIT_PORT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x769a59f0	mlx4_qp_reserve_range
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x80940b53	mlx4_qp_remove
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x848b1454	mlx4_multicast_detach
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x85d178fb	mlx4_mtt_cleanup
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x8df398df	mlx4_buf_write_mtt
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x935154ac	mlx4_unregister_interface
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9678481b	mlx4_fmr_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9db8602f	mlx4_register_interface
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9e2a5a83	mlx4_free_hwq_res
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9f20ff56	mlx4_free_cmd_mailbox
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa5324457	mlx4_fmr_unmap
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xafe42b1c	mlx4_cq_resize
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb70fccee	mlx4_unregister_vlan
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd3bf2202	mlx4_mr_enable
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xdab6fed6	mlx4_mtt_addr
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe05e86a5	mlx4_uar_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe0a21822	mlx4_qp_modify
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe9b11b8b	mlx4_mr_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xeaf326e8	mlx4_pd_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xebc03e4a	mlx4_srq_arm
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xece8d3e4	mlx4_buf_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xee090fd0	mlx4_multicast_attach
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf09ec3e7	mlx4_SYNC_TPT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf4e15ad5	mlx4_srq_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf82c1087	mlx4_alloc_hwq_res
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xfc6c3743	mlx4_cq_modify
+EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0x37869c03	usbnet_cdc_unbind
+EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0xc5d65b02	usbnet_generic_cdc_bind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x455b1c05	rndis_tx_fixup
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x4d9e18cc	rndis_status
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x9f13e616	rndis_unbind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xd1799c55	generic_rndis_bind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xd3c31bc6	rndis_rx_fixup
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xfae27dc9	rndis_command
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x042f42ae	usbnet_set_settings
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x122d0488	usbnet_unlink_rx_urbs
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x28c46f86	usbnet_nway_reset
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x4f4b937f	usbnet_get_drvinfo
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x50b4fe71	usbnet_change_mtu
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x582070c1	usbnet_open
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x5ad12d87	usbnet_purge_paused_rxq
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x5c3f7feb	usbnet_resume
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x5db6d341	usbnet_get_endpoints
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x64d10e94	usbnet_suspend
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x67469442	usbnet_get_msglevel
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x765962c7	usbnet_pause_rx
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x77707e9e	usbnet_resume_rx
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x847979fc	usbnet_get_link
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x96d196c1	usbnet_skb_return
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x9b113c9e	usbnet_defer_kevent
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xa5996141	usbnet_probe
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xae385de6	usbnet_get_settings
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xbe2e58d2	usbnet_tx_timeout
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xd4f7744f	usbnet_start_xmit
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xd71c2431	usbnet_disconnect
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xddce93b5	usbnet_set_msglevel
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xef73dcf9	usbnet_stop
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xf3eb0768	usbnet_get_ethernet_addr
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x0c5bf166	i2400m_queue_work
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x1205e5c4	i2400m_dev_bootstrap
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x18fb7623	i2400m_tx_msg_get
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x2af0d1b2	i2400m_release
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x45d017f9	i2400m_cmd_get_state
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x53c48f15	i2400m_set_init_config
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x91ad7f9f	i2400m_dev_reset_handle
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xa3b341a3	i2400m_setup
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xb00b793c	i2400m_bm_cmd_prepare
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xc68d5d23	i2400m_tx
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xd2a5cd2a	i2400m_rx
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xd3c3c17a	i2400m_tx_msg_sent
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xf072f10c	i2400m_cmd_enter_powersave
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xfc963de5	i2400m_netdev_setup
+EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0xb6427fb6	libipw_rx_any
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x039a50fa	lbs_process_rxed_packet
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x10111d54	lbs_cmd_copyback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x1f327b04	lbs_add_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x3a640b00	lbs_notify_command_response
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x51cac62f	lbs_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x56c88ff0	lbs_queue_event
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x85b8d03c	lbs_cmd_802_11_rate_adapt_rateset
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x9472907d	lbs_host_sleep_cfg
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xcc445cab	lbs_stop_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xdc4312b4	lbs_send_tx_feedback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xdfd23a8f	__lbs_cmd
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xe86a802d	lbs_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xe9b6d309	lbs_remove_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf64277de	lbs_debug
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf871c768	lbs_host_to_card_done
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xfbad7f44	lbs_start_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x0397edd9	lbtf_cmd_response_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x13bf00e7	lbtf_send_tx_feedback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x40b9be45	lbtf_bcn_sent
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x6709f16e	lbtf_remove_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x896ddf5f	lbtf_add_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x8ee2cfc7	__lbtf_cmd
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xc9719c13	lbtf_cmd_copyback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xd6febab7	lbtf_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0x3cd2c412	if_usb_reset_device
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0xac674c3c	if_usb_prog_firmware
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x1479a580	p54_init_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x16a2e317	p54_unregister_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x1747c416	p54_parse_firmware
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x3f0dcd00	p54_parse_eeprom
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x519fd5a0	p54_free_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x58e634e1	p54_read_eeprom
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x6b0669f0	p54_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xba80f43f	p54_register_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xbb317343	p54_free_skb
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x0ab3847a	rt2x00mac_rfkill_poll
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x0b13475d	rt2x00mac_get_tx_stats
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x1293d4bf	rt2x00lib_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x16bd493c	rt2x00queue_map_txskb
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x1ac76483	rt2x00mac_remove_interface
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x1ba13855	rt2x00lib_remove_dev
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x27c3cbbf	rt2x00mac_set_key
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x28260f9d	rt2x00mac_configure_filter
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x3243bf63	rt2x00mac_conf_tx
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x3a1b55e7	rt2x00mac_get_stats
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x51350de5	rt2x00lib_beacondone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x58b2f016	rt2x00lib_probe_dev
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x979530ee	rt2x00mac_stop
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xa303f238	rt2x00mac_config
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xa550e988	rt2x00mac_add_interface
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xac13ef84	rt2x00mac_tx
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xb7908206	rt2x00mac_set_tim
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xb7a23797	rt2x00lib_txdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xc31a2528	rt2x00queue_get_entry
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xc7eb2550	rt2x00queue_get_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xcec40602	rt2x00lib_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xd781c0d3	rt2x00mac_bss_info_changed
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xf8767e50	rt2x00mac_start
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xf9bb4196	rt2x00lib_rxdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x2d6d7a42	rt2x00pci_regbusy_read
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x650842bd	rt2x00pci_rxdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x811baa0a	rt2x00pci_probe
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x8cf5aa82	rt2x00pci_initialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xc401913e	rt2x00pci_write_tx_data
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xcfaab98f	rt2x00pci_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xdd5dd269	rt2x00pci_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xebde3156	rt2x00pci_uninitialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xf7767110	rt2x00pci_remove
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x0591718d	rt2x00usb_probe
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x0b253b1c	rt2x00usb_regbusy_read
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x1bc3673d	rt2x00usb_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x2626f828	rt2x00usb_disable_radio
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x2700ff47	rt2x00usb_disconnect
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x33f35cfa	rt2x00usb_vendor_request_buff
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x4a4d66f5	rt2x00usb_write_tx_data
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x537bfff5	rt2x00usb_uninitialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x63116dbc	rt2x00usb_kick_tx_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x7023a69f	rt2x00usb_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x8d0371fc	rt2x00usb_initialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xc4774960	rt2x00usb_vendor_request_large_buff
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xd0507e37	rt2x00usb_vendor_req_buff_lock
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xd712ab66	rt2x00usb_clear_entry
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xdce33733	rt2x00usb_kill_tx_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xf5476cc0	rt2x00usb_vendor_request
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0x95c866e1	wl1251_alloc_hw
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0xdb5aedde	wl1251_free_hw
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0xf751bd31	wl1251_init_ieee80211
+EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0x5c06ab42	pcf50633_mbc_get_status
+EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0xe79bfa35	pcf50633_mbc_usb_curlim_set
+EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0x003998ab	ps3_write_ctr
+EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0x0bdf50c4	ps3_disable_pm_interrupts
+EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0x0e622920	ps3_write_pm07_control
+EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0x181e55ab	ps3_read_phys_ctr
+EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0x1bcb88c1	ps3_write_pm
+EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0x2abf1471	ps3_get_hw_thread_id
+EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0x2b339635	ps3_disable_pm
+EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0x3c71a6b2	ps3_set_ctr_size
+EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0x4a24996f	ps3_lpm_copy_tb_to_user
+EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0x50488f64	ps3_lpm_close
+EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0x58e642c1	ps3_lpm_copy_tb
+EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0x59c54782	ps3_set_bookmark
+EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0x5eca6711	ps3_get_ctr_size
+EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0x60e3f0d7	ps3_read_ctr
+EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0x6702a28c	ps3_get_and_clear_pm_interrupts
+EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0x69010c19	ps3_set_signal
+EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0x70177200	ps3_write_phys_ctr
+EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0xa76ee01d	ps3_read_pm07_control
+EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0xaa190bc1	ps3_read_pm
+EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0xbb72a01c	ps3_enable_pm_interrupts
+EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0xce72c9c0	ps3_lpm_open
+EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0xdddfc980	ps3_set_pm_bookmark
+EXPORT_SYMBOL_GPL drivers/ps3/ps3-lpm 0xfae0ab68	ps3_enable_pm
+EXPORT_SYMBOL_GPL drivers/ps3/ps3stor_lib 0x06241bbc	ps3stor_teardown
+EXPORT_SYMBOL_GPL drivers/ps3/ps3stor_lib 0x65a37b08	ps3stor_read_write_sectors
+EXPORT_SYMBOL_GPL drivers/ps3/ps3stor_lib 0x8c2b0d1a	ps3stor_setup
+EXPORT_SYMBOL_GPL drivers/ps3/ps3stor_lib 0xe8c42fac	ps3stor_send_command
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x113fdfb5	wm8350_dcdc_set_slot
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x135d931a	wm8350_isink_set_flash
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x41e0084d	wm8350_dcdc25_set_mode
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x96682712	wm8350_register_regulator
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xb5311dd5	wm8350_register_led
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xb65e7c42	wm8350_ldo_set_slot
+EXPORT_SYMBOL_GPL drivers/regulator/wm8400-regulator 0xb8258285	wm8400_register_regulator
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x1f9deec6	scsi_dh_attach
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x33367581	scsi_register_device_handler
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x593a36c2	scsi_dh_handler_exist
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0xbe790ccb	scsi_dh_activate
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0xcc5bf7d6	scsi_dh_set_params
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0xe5c3ae84	scsi_dh_detach
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0xfd20a102	scsi_unregister_device_handler
+EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x374c1e1c	fcoe_wwn_from_mac
+EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x5e514f9c	fcoe_libfc_config
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0406f81f	iscsi_host_remove
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x077ed964	iscsi_conn_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x09b1fde2	iscsi_complete_scsi_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x237a656e	iscsi_suspend_tx
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x28fb2895	iscsi_verify_itt
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x2db2a13f	iscsi_host_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x37160420	__iscsi_get_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x42a3365f	iscsi_suspend_queue
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4560f31a	iscsi_complete_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x45a8252a	iscsi_host_add
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4c0ab8a7	iscsi_eh_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4d1f6de5	iscsi_conn_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5fd04465	iscsi_host_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x61bfb7dd	iscsi_conn_send_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x65f5c9a5	iscsi_session_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x6a3cb15e	iscsi_eh_device_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x6f51b613	iscsi_conn_stop
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x70acfa72	iscsi_conn_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x76449a5b	iscsi_pool_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x768d3ff6	iscsi_update_cmdsn
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x76eb261e	iscsi_itt_to_ctask
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x7f567c83	iscsi_requeue_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x801887a6	iscsi_conn_bind
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x8c1c1aec	iscsi_session_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x8cce3a1d	iscsi_put_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x907cc0fe	iscsi_itt_to_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x9e696f87	iscsi_queuecommand
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xa5cbb40f	iscsi_set_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb356eef2	iscsi_conn_start
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb3bebde2	iscsi_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb5459c11	iscsi_pool_init
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb6f3cfb6	iscsi_eh_target_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xc4505c33	iscsi_change_queue_depth
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xc7ea593b	iscsi_session_recovery_timedout
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xdb9c92ef	iscsi_host_set_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe29291fb	iscsi_host_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf02fc94d	iscsi_session_failure
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf12644ac	iscsi_conn_queue_work
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf3ea6386	iscsi_conn_failure
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf538acd2	iscsi_prep_data_out_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf754204c	__iscsi_complete_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xfa5aaa3e	iscsi_session_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x03affe5e	iscsi_tcp_hdr_recv_prep
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x117b8553	iscsi_tcp_dgst_header
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x1629d504	iscsi_tcp_task_xmit
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x344987d2	iscsi_tcp_recv_segment_is_hdr
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x5eeff2c1	iscsi_segment_init_linear
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x693ac2ae	iscsi_tcp_cleanup_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x8ebe5620	iscsi_tcp_segment_unmap
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x941181ba	iscsi_tcp_task_init
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x99406387	iscsi_tcp_conn_get_stats
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xaacc7ee4	iscsi_tcp_recv_skb
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xcbf6b104	iscsi_tcp_conn_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xe0be1879	iscsi_tcp_r2tpool_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xe6028134	iscsi_tcp_conn_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xe6c94822	iscsi_tcp_r2tpool_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xecb2a14a	iscsi_tcp_segment_done
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xed7a9005	iscsi_segment_seek_sg
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x09372344	sas_change_queue_depth
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x0be59de7	sas_unregister_ha
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x0d005d70	sas_request_addr
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x11a78afa	sas_queuecommand
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x20d848e1	sas_phy_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x27a72a06	sas_domain_attach_transport
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x3b464fd2	sas_phy_enable
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x5f1af26b	sas_slave_configure
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x607861cc	sas_register_ha
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x70021ea4	sas_eh_bus_reset_handler
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x7663ffa4	sas_ioctl
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x7bbf4bbc	sas_slave_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x80ffd2c1	sas_ssp_task_response
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x8eb2e401	sas_bios_param
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xabf8d06b	sas_task_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xb8205aa3	__sas_task_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xb8f9d5e6	sas_change_queue_type
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xc104cd27	sas_eh_device_reset_handler
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xd36cfc13	sas_find_local_phy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xdb5107f6	sas_domain_release_transport
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xdba499cb	sas_target_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xeb1ecf36	sas_slave_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xfd7219cf	sas_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x0a97479e	srp_iu_get
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x180c7c69	srp_transfer_data
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x2cd6f780	srp_iu_put
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x94be5134	srp_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xa883cca4	srp_cmd_queue
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xb335e486	srp_target_free
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x5691a417	scsi_tgt_cmd_to_host
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x9306f818	scsi_tgt_it_nexus_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xa83b6bdf	scsi_tgt_queue_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xa891b79c	scsi_host_get_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xadd71c97	scsi_tgt_free_queue
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xbf0c1392	scsi_host_put_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xe97d1056	scsi_tgt_tsk_mgmt_request
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xf2f897c2	scsi_tgt_alloc_queue
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xf3fc9bd9	scsi_tgt_it_nexus_create
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x0889fd5b	iscsi_session_event
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x2ad533e3	iscsi_destroy_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x4e03a1c2	iscsi_lookup_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x4f2023ad	iscsi_create_conn
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x56d12feb	iscsi_offload_mesg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x57ac7d62	iscsi_unregister_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x5c7fbf12	iscsi_free_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x5ca7d96e	iscsi_remove_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x611b37af	iscsi_destroy_conn
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x647d8fc2	iscsi_host_for_each_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x64c65f6c	iscsi_unblock_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x65e142cd	iscsi_create_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x7d0d41f8	iscsi_alloc_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x7d8a5dde	iscsi_block_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xa265905b	iscsi_conn_error_event
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xa5c952e1	iscsi_recv_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xce1b508c	iscsi_create_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xd180f127	iscsi_register_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xde98cd90	iscsi_session_chkready
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xf303a33e	iscsi_destroy_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xf3c77fab	iscsi_scan_finished
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xf9a159c3	iscsi_add_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0x0ef06974	spi_populate_ppr_msg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xa0c71dac	spi_populate_sync_msg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xcffa2aff	spi_populate_width_msg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x0abefd93	srp_rport_del
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x30ecb858	srp_attach_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x344aec66	srp_remove_host
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x9117810f	srp_release_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xf75a7043	srp_rport_add
+EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0x205f4a87	pciserial_suspend_ports
+EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0x24160877	pciserial_resume_ports
+EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0xaa20ee28	pciserial_init_ports
+EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0xe19a0972	pciserial_remove_ports
+EXPORT_SYMBOL_GPL drivers/serial/serial_core 0x0311ab78	uart_console_write
+EXPORT_SYMBOL_GPL drivers/serial/serial_core 0x20b1f9d4	uart_set_options
+EXPORT_SYMBOL_GPL drivers/serial/serial_core 0xf2fca922	uart_parse_options
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x5a3ee620	spi_bitbang_setup_transfer
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x64bdced0	spi_bitbang_start
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x98b23e7c	spi_bitbang_setup
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xb602c5bc	spi_bitbang_stop
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xcdaf34d5	spi_bitbang_cleanup
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xdb827bf5	spi_bitbang_transfer
+EXPORT_SYMBOL_GPL drivers/uio/uio 0x1fccba2b	__uio_register_device
+EXPORT_SYMBOL_GPL drivers/uio/uio 0x72a07e17	uio_unregister_device
+EXPORT_SYMBOL_GPL drivers/uio/uio 0xac379397	uio_event_notify
+EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0x0d55b433	usbatm_usb_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0xa784da15	usbatm_usb_probe
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x28bae96b	usb_ftdi_elan_edset_input
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x3ab4ffc2	usb_ftdi_elan_edset_empty
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x3e29920d	usb_ftdi_elan_edset_setup
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x8c02fcc3	usb_ftdi_elan_write_pcimem
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x976325f0	usb_ftdi_elan_read_pcimem
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xa53d3a3e	usb_ftdi_elan_edset_single
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xc7e5f66f	usb_ftdi_elan_edset_output
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xe18c6958	ftdi_elan_gone_away
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xee274bed	usb_ftdi_elan_edset_flush
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x06051765	usb_serial_probe
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x16c1b234	usb_serial_generic_resume
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x1cda724c	usb_serial_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x1fa5dc3a	ezusb_writememory
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x2b6e6c7d	usb_serial_generic_write_bulk_callback
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x5567b089	usb_serial_generic_read_bulk_callback
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x5cd42610	usb_serial_deregister
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x65a2922e	usb_serial_handle_sysrq_char
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x73fac234	usb_serial_handle_break
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x8cdd46ab	usb_serial_handle_dcd_change
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x91e04787	usb_serial_port_softint
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x925f2b20	usb_serial_generic_resubmit_read_urb
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xaefb2f90	usb_serial_generic_write
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xbbfcfb70	ezusb_set_reset
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xe24b81ea	usb_serial_generic_open
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xe6422d08	usb_serial_register
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x0be13004	usb_storage_usb_ids
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x0d7b1a49	usb_stor_Bulk_transport
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x16579a96	usb_stor_CB_transport
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1bc3edc2	usb_stor_sense_invalidCDB
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x2d9c1aa7	usb_stor_access_xfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x4663fee7	usb_stor_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x5529535b	usb_usual_ignore_device
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x60a5b19f	usb_stor_probe2
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x6182fad0	usb_stor_set_xfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x6a375c39	usb_stor_ctrl_transfer
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x6a99288a	usb_stor_post_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x72e3c2fe	usb_stor_control_msg
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x80775206	usb_stor_transparent_scsi_command
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x838be342	usb_stor_pre_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x8bc9a988	usb_stor_resume
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x8d9c0fbb	usb_stor_bulk_srb
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x8e4b9be3	usb_stor_reset_resume
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x94d7ffdc	fill_inquiry_response
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x964ff31b	usb_stor_bulk_transfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x971b3e81	usb_stor_Bulk_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xa99a78bc	usb_stor_clear_halt
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xbfee520c	usb_stor_CB_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xc2d03465	usb_stor_suspend
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xc45e81f3	usb_stor_bulk_transfer_sg
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xe3204eda	usb_stor_probe1
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x21046cf2	wa_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x2261d859	rpipe_ep_disable
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x5b0fc154	wa_urb_enqueue_run
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x8668d134	rpipe_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xa7e504ce	__wa_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xb1157f78	wa_urb_dequeue
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xc0d7abb4	wa_urb_enqueue
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x09ef287d	wusbhc_b_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x0bb6bf5e	wusb_cluster_id_get
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x0bf05a3e	wusbhc_handle_dn
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x1fbafd44	wusbhc_giveback_urb
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x2cc7eeab	__wusb_dev_get_by_usb_dev
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x41c045d4	wusbhc_rh_status_data
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x6069d7d1	wusbhc_mmcie_rm
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x668b05ae	wusbhc_rh_resume
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x83747396	wusbhc_reset_all
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x9125c994	wusbhc_mmcie_set
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x95625fad	wusbhc_rh_suspend
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xab5a0511	wusbhc_chid_set
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb725d128	wusb_cluster_id_put
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xbfa8847f	wusbhc_rh_start_port_reset
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xc18cbda7	wusbhc_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xd1a713d2	wusbhc_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xd481d917	wusbhc_b_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xdf6e4f08	wusb_dev_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf770a6b4	wusbd
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf8f23f23	wusbhc_rh_control
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xfe2e17d7	wusb_et_name
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0xb0d312ed	i1480_fw_upload
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0xc1b42328	i1480_cmd
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0xd7ab2b1a	i1480_rceb_check
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x234b1bba	uwb_pca_base_priority_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x64da49fe	uwb_phy_rate_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x7c50132f	uwb_phy_rate_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x87ee85bc	uwb_rts_cts_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x880adf95	uwb_ack_policy_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x9974c3b3	uwb_rts_cts_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x9e111be2	uwb_pca_base_priority_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xee7f1ce7	uwb_ack_policy_show
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x1ab8e8a1	umc_device_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x5f00d26a	umc_controller_reset
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x617ae89e	__umc_driver_register
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x746fe186	umc_device_create
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xad718921	umc_device_register
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xb1256e6d	umc_bus_type
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xb49079a8	umc_driver_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xe6db682d	umc_match_pci_id
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x01dd9e33	__uwb_rc_try_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0a84374d	uwb_rsv_establish
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x137d701f	uwb_notifs_deregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2417041e	uwb_rc_reset_all
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x25274c08	uwb_rc_neh_error
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2ab7d650	uwb_rc_dev_addr_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2f3549e9	uwb_rc_rm
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x3714b75d	uwb_dev_for_each
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x3d0ad030	uwb_notifs_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x3f7bd2dc	uwb_rc_add
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4188cb7e	uwb_est_find_size
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x42aa2a3a	uwb_radio_stop
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x47e364f7	uwb_rsv_modify
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4b4b66f1	uwb_rc_neh_grok
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4d57ae3c	uwb_rsv_type_str
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4d6e2745	uwb_rc_post_reset
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x51987d2b	uwb_rc_put
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5b1cd1bb	uwb_rc_init
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5c2ad264	uwb_rsv_get_usable_mas
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6830fdd1	uwb_rsv_accept
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6b9377c5	uwb_ie_next
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x81014346	uwb_rc_pre_reset
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x8cb42db6	__uwb_addr_print
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x98413234	uwb_rsv_state_str
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x9ce65caf	uwb_rc_get_by_grandpa
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa7cd6889	uwb_rc_alloc
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xaecd313d	uwb_rc_ie_add
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb1586ee4	uwb_dev_try_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb222819d	uwb_pal_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb9e1a849	uwb_rc_mac_addr_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xbeaafa2b	uwb_rsv_create
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xc3c45fc1	uwb_rc_cmd_async
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xc54d8153	uwb_rsv_terminate
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xc674f398	uwb_radio_start
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd06d37c6	uwb_rc_ie_rm
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd1b6f5a9	uwb_rc_cmd
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xda211d5c	uwb_rc_vcmd
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xdc10c4c0	uwb_pal_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xeb4cab9a	uwb_est_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf7ca313a	uwb_est_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf94ce51c	uwb_rsv_destroy
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xfa65315c	uwb_pal_init
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xfb12ebed	uwb_rc_get_by_dev
+EXPORT_SYMBOL_GPL drivers/uwb/whci 0x9d9fdb27	whci_wait_for
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x06d6ee73	wlp_setup
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x0a84cb92	wlp_dev_model_nr_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x0e80fe48	wlp_dev_serial_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x24dd2bcf	wlp_wss_setup
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x2630d409	wlp_dev_prim_category_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x30f4c537	wlp_remove
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x3a5af381	wlp_dev_serial_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x46f334ca	wlp_reset_all
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x4c109a4a	wlp_dev_name_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x4da8010c	wlp_dev_name_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x5683f7c5	wlp_uuid_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x5b23193d	wlp_dev_prim_OUI_sub_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x5e34cfe5	wlp_eda_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x656fef97	wlp_dev_prim_subcat_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x6c092f1b	wlp_dev_manufacturer_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x6d8d444c	wlp_dev_prim_subcat_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x76883654	wlp_dev_model_name_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x7c7896ea	wlp_dev_model_nr_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x83b16895	wlp_eda_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x871ffd3f	wlp_wss_activate_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x945ee4ac	wlp_dev_prim_category_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x9a7cdb74	wlp_wss_remove
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xa2ae2451	wlp_wss_activate_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xa97a5f58	wlp_dev_model_name_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xb04e3bb5	wlp_receive_frame
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xb3b99243	wlp_dev_prim_OUI_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xbe1781d9	wlp_dev_prim_OUI_sub_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xd630daff	wlp_dev_prim_OUI_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xdcdf6164	wlp_dev_manufacturer_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xe4d6e2d6	wlp_prepare_tx_frame
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xf3d922e6	wlp_neighborhood_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xfe07f679	wlp_uuid_show
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x02e80c71	ili9320_write_regs
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x074806d3	ili9320_remove
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x72d66354	ili9320_write
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x77a618ec	ili9320_resume
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xa42e0a20	ili9320_suspend
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xde65817e	ili9320_probe_spi
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xfa3db19a	ili9320_shutdown
+EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0x111fa5d9	sis_free_new
+EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0x88657f95	sis_malloc_new
+EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x28928dcb	virtio_check_driver_offered_feature
+EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x3023d67f	unregister_virtio_driver
+EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x34b3cbd6	unregister_virtio_device
+EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x5d8a11c0	register_virtio_driver
+EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x997062d7	register_virtio_device
+EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x0ac0ab25	vring_interrupt
+EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x1db8f229	vring_del_virtqueue
+EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x39b66292	vring_new_virtqueue
+EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x3fd084b3	vring_transport_features
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x066dfd29	w1_next_pullup
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x0b7c05e5	w1_read_8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x18663b24	w1_write_8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x36654fb4	w1_reset_select_slave
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x509c5cbe	w1_reset_bus
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x7c2f2afb	w1_calc_crc8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xa33d122b	w1_read_block
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xae0ae120	w1_touch_block
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xeff673d5	w1_write_block
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x0864c4a4	dlm_new_lockspace
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x0dc5d7d9	dlm_posix_unlock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x9321df95	dlm_lock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xcf9f3328	dlm_release_lockspace
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xdc583c08	dlm_unlock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xf2bc1962	dlm_posix_get
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xfc712a96	dlm_posix_lock
+EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0x2d0456d5	exportfs_encode_fh
+EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0xf060055d	exportfs_decode_fh
+EXPORT_SYMBOL_GPL fs/fat/fat 0x0eea5fb6	fat_search_long
+EXPORT_SYMBOL_GPL fs/fat/fat 0x177f17c3	fat_attach
+EXPORT_SYMBOL_GPL fs/fat/fat 0x1b55988f	fat_build_inode
+EXPORT_SYMBOL_GPL fs/fat/fat 0x2805242c	fat_flush_inodes
+EXPORT_SYMBOL_GPL fs/fat/fat 0x4842ab34	fat_remove_entries
+EXPORT_SYMBOL_GPL fs/fat/fat 0x6df6bc18	fat_sync_inode
+EXPORT_SYMBOL_GPL fs/fat/fat 0x70cbaa09	fat_time_unix2fat
+EXPORT_SYMBOL_GPL fs/fat/fat 0x9041cc0d	fat_dir_empty
+EXPORT_SYMBOL_GPL fs/fat/fat 0x9e81764c	fat_scan
+EXPORT_SYMBOL_GPL fs/fat/fat 0xa1730466	fat_add_entries
+EXPORT_SYMBOL_GPL fs/fat/fat 0xa7be34b7	fat_detach
+EXPORT_SYMBOL_GPL fs/fat/fat 0xb3549318	fat_getattr
+EXPORT_SYMBOL_GPL fs/fat/fat 0xb5683418	fat_get_dotdot_entry
+EXPORT_SYMBOL_GPL fs/fat/fat 0xbba38af7	fat_fs_error
+EXPORT_SYMBOL_GPL fs/fat/fat 0xdfe3bc92	fat_alloc_new_dir
+EXPORT_SYMBOL_GPL fs/fat/fat 0xe4264811	fat_setattr
+EXPORT_SYMBOL_GPL fs/fat/fat 0xe524f91a	fat_free_clusters
+EXPORT_SYMBOL_GPL fs/fat/fat 0xe9577578	fat_fill_super
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x17ce645d	locks_end_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x1a618932	nlmsvc_unlock_all_by_ip
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x5ae89523	nlmclnt_init
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x5ce9f162	nlmsvc_unlock_all_by_sb
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x6f959b35	locks_in_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x79be6d3f	nlmclnt_proc
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x96877ac4	locks_start_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xa302991a	nlmsvc_ops
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xa7b91a7b	lockd_down
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xcae3d5bc	nlmclnt_done
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xf6933c48	lockd_up
+EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0x2b2f1252	nfsacl_decode
+EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0x9b4655b0	nfsacl_encode
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x05d4ad28	o2hb_setup_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1b89c6ee	o2hb_fill_node_map
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1d747ce3	o2hb_check_node_heartbeating
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1e6fc0b3	o2hb_unregister_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x2827ad27	o2hb_register_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x36418553	o2net_send_message
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x4900035b	o2hb_stop_all_regions
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x521e0726	o2net_send_message_vec
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x81a17396	mlog_and_bits
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x87a4dedf	o2nm_get_node_by_ip
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x88884bb1	o2nm_node_get
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa82a8645	o2nm_this_node
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa87bc9e7	o2nm_configured_node_map
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xae808bac	o2net_register_handler
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xbaeb4700	o2hb_check_node_heartbeating_from_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xd60f2c6c	o2hb_check_local_node_heartbeating
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xde520182	o2nm_node_put
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xe09df6b9	o2nm_get_node_by_num
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf1a5611d	o2net_unregister_handler_list
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf56c2017	mlog_not_bits
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x0d2986e1	dlmunlock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x33b91b67	dlmlock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x368fa917	dlm_print_one_lock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x3e2fce10	dlm_unregister_domain
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x7a1211f8	dlm_setup_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xac0c973b	dlm_register_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xbc2b332b	dlm_register_domain
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd7ba575e	dlm_errmsg
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd8fa57a6	dlm_unregister_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xfb86b96f	dlm_errname
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0031c2a6	ocfs2_stack_glue_unregister
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0562c415	ocfs2_cluster_this_node
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x06379db6	ocfs2_dlm_lvb_valid
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0e27f909	ocfs2_dlm_lock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x21db5b88	ocfs2_cluster_disconnect
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x2778e2d9	ocfs2_plock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x407992fa	ocfs2_stack_glue_register
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4a1f6fe9	ocfs2_cluster_connect
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4d3af7fa	ocfs2_cluster_hangup
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x81c85a68	ocfs2_dlm_lock_status
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x91fab465	ocfs2_dlm_lvb
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x963932a3	ocfs2_stack_glue_set_locking_protocol
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xa7d5c1c0	ocfs2_dlm_unlock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xbbc4ef97	ocfs2_stack_supports_plocks
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xd066711e	ocfs2_dlm_dump_lksb
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x300d7e57	free_rs
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x6fbb3bd9	init_rs_non_canonical
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xabda1e2e	decode_rs16
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xb050f329	init_rs
+EXPORT_SYMBOL_GPL net/802/garp 0x20c1bb3a	garp_request_join
+EXPORT_SYMBOL_GPL net/802/garp 0x2f9a9a25	garp_register_application
+EXPORT_SYMBOL_GPL net/802/garp 0xacca91f4	garp_request_leave
+EXPORT_SYMBOL_GPL net/802/garp 0xbb7f38aa	garp_init_applicant
+EXPORT_SYMBOL_GPL net/802/garp 0xcb039b86	garp_uninit_applicant
+EXPORT_SYMBOL_GPL net/802/garp 0xd01784d3	garp_unregister_application
+EXPORT_SYMBOL_GPL net/802/stp 0x777093e5	stp_proto_register
+EXPORT_SYMBOL_GPL net/802/stp 0xb14ffa1a	stp_proto_unregister
+EXPORT_SYMBOL_GPL net/ax25/ax25 0xac93ae05	ax25_bcast
+EXPORT_SYMBOL_GPL net/ax25/ax25 0xaeb7451e	ax25_defaddr
+EXPORT_SYMBOL_GPL net/ax25/ax25 0xf334a564	ax25_register_pid
+EXPORT_SYMBOL_GPL net/bluetooth/bluetooth 0x2af848b2	bt_class
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x004a00c5	dccp_make_response
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x0443b3ae	dccp_getsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x0f05ba9e	dccp_setsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x1d99d49a	dccp_timestamp
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x22096ddf	dccp_insert_option
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x233435ea	dccp_ctl_make_reset
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x234b77ac	dccp_shutdown
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x29b3bb96	dccp_insert_option_elapsed_time
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x2b5bab26	dccp_check_req
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x309edaf5	dccp_rcv_state_process
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x3271238e	dccp_init_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x36810ef1	dccp_rcv_established
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x37239706	dccp_send_sync
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x4cdd391d	dccp_feat_list_purge
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x5285acd5	dccp_connect
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x56ea266a	dccp_state_name
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x5d31ddcd	dccp_poll
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x7382f4a8	dccp_child_process
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x80504a04	dccp_ioctl
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x86be7924	dccp_packet_name
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x8b7d8caf	dccp_statistics
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x90610c13	dccp_reqsk_init
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x91ae56cb	dccp_reqsk_send_ack
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xa161c396	inet_dccp_listen
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xa5c1be7a	dccp_disconnect
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xaa315ce8	dccp_insert_option_timestamp
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xaad33ccb	compat_dccp_setsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xaeaf27d6	dccp_recvmsg
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xaed78d1d	dccp_parse_options
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xbb935067	dccp_hashinfo
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xc17af03c	dccp_orphan_count
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xc87f8743	compat_dccp_getsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xc9709465	dccp_destroy_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xcb463043	dccp_done
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xd32e88f5	dccp_close
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xd4e3f328	dccp_send_ack
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xe0e7521e	dccp_create_openreq_child
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xe22e3393	dccp_sendmsg
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xe9a6dad0	dccp_set_state
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xf4a482cc	dccp_death_row
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xfdb2c3bb	dccp_sync_mss
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x30b6304f	dccp_v4_send_check
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x654853fe	dccp_v4_request_recv_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xb4b52cf7	dccp_v4_do_rcv
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xb74e1c62	dccp_invalid_packet
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xf41cc3f9	dccp_v4_connect
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xf6456088	dccp_v4_conn_request
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0x2a26dc64	nf_nat_seq_adjust_hook
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0x6d40a921	need_ipv4_conntrack
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_defrag_ipv4 0x6b6c3d10	nf_defrag_ipv4_enable
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x02fd736b	nf_nat_packet
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x07ae60b6	nf_nat_proto_in_range
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x087e8fd6	nf_nat_proto_range_to_nlattr
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x2c477328	nf_nat_icmp_reply_translation
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x4075045f	nf_nat_proto_find_get
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x8569547a	nf_nat_proto_unique_tuple
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x94a08134	nf_nat_proto_nlattr_to_range
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xabf0d95a	nf_nat_get_offset
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xf346f072	nf_nat_proto_put
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat_proto_gre 0x636b12c8	nf_nat_need_gre
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x2c67ddb4	tcp_vegas_init
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x9906da8c	tcp_vegas_get_info
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xbea1129c	tcp_vegas_state
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xd7d9b856	tcp_vegas_pkts_acked
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xdd93544d	tcp_vegas_cwnd_event
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x08a3e5d1	net_ipv6_ctl_path
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x0bf0eaef	ip6_sk_dst_lookup
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x288034b6	ipv6_find_tlv
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x6ee33451	inet6_csk_search_req
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x70a90202	ip6_dst_blackhole
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x80895eb0	ipv6_dup_options
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x85478a0b	inet6_hash_frag
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x89fed2d6	inet6_csk_reqsk_queue_hash_add
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x8aa6cd1e	ip6_dst_lookup
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xa3489c39	fl6_sock_lookup
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xaa691d21	inet6_csk_xmit
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xc9d42f71	inet6_destroy_sock
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xd391aaa9	ipv6_opt_accepted
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xe22bb5b4	inet6_csk_addr2sockaddr
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xed617976	inet6_csk_bind_conflict
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xfd20874c	ip6_local_out
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xfde2b8f4	inet6_sk_rebuild_header
+EXPORT_SYMBOL_GPL net/mac80211/mac80211 0x3811d544	ieee80211_iterate_active_interfaces_atomic
+EXPORT_SYMBOL_GPL net/mac80211/mac80211 0x7d515601	ieee80211_iterate_active_interfaces
+EXPORT_SYMBOL_GPL net/netfilter/ipvs/ip_vs 0xe6476b4a	net_vs_ctl_path
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x045072cd	nf_ct_port_nla_policy
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x04f97671	__nf_conntrack_confirm
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x0953bad8	nf_expect_event_cb
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x0a1321df	__nf_ct_l4proto_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x16424c71	nf_conntrack_l4proto_udp4
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x1a33a243	nf_ct_extend_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x1e1d3f4d	nf_conntrack_alloc
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x2464c1ab	nf_ct_expect_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x24742ef3	nf_conntrack_l4proto_udp6
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x26fd3610	nf_ct_unexpect_related
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x274102eb	__nf_ct_kill_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x28f66a67	nf_conntrack_in
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x2d0e5f95	nf_ct_port_tuple_to_nlattr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x33f02636	print_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3f5b1415	nf_ct_port_nlattr_to_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x43007328	seq_print_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x44e8e1c6	nf_conntrack_free
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x48323f9f	nf_ct_deliver_cached_events
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4b9065a9	nf_ct_alloc_hashtable
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4ce9e641	nf_ct_expect_register_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5882ba33	nf_conntrack_set_hashsize
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5a5c0a52	nf_conntrack_l3proto_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5aa70566	nf_ct_invert_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5c12cc94	nf_conntrack_alter_reply
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5e1eaf27	__nf_ct_refresh_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x608fee4f	nf_conntrack_event_cb
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x62813e5c	nf_ct_port_nlattr_tuple_size
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x62afa96b	nf_ct_remove_expectations
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x63f4b320	__nf_ct_try_assign_helper
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x64c83617	__nf_conntrack_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x64f52580	nf_conntrack_l4proto_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x65668db3	nf_ct_iterate_cleanup
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x65df66d3	nf_ct_expect_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x67c3591c	nf_ct_nat_offset
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6a72d15b	nf_ct_expect_unregister_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6dd2b501	nf_conntrack_lock
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6e224a7a	need_conntrack
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6f58bf3c	nf_ct_unlink_expect
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x73d9d77d	nf_ct_expect_alloc
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x74c1f4da	nf_conntrack_register_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x78f9b710	nf_ct_l3proto_try_module_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x7b0754b5	nf_ct_l3protos
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x89caaa9f	nf_conntrack_l4proto_tcp4
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8af3b270	nf_ct_expect_related_report
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8ffe7e89	nf_conntrack_htable_size
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x90ff6c9f	nf_ct_invert_tuplepr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x98f320e1	nf_conntrack_tuple_taken
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9af3f6c1	nf_ct_free_hashtable
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9b2397d2	nf_conntrack_untracked
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9e53becd	__nf_ct_expect_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9eb5142e	nf_ct_delete_from_lists
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xa54718af	nf_ct_insert_dying_list
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xa5b706a6	nf_ct_get_tuplepr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xab4c6e92	nfnetlink_parse_nat_setup_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb602c57e	nf_ct_l3proto_module_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xbbfcc81d	nf_conntrack_l4proto_tcp6
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc18ac88d	nf_ct_expect_hsize
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc296efd9	nf_conntrack_hash_insert
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc326e21b	nf_ct_l3proto_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc9399dc3	__nf_conntrack_helper_find_byname
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xcbe37e8e	nf_conntrack_helper_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xdba001bc	nf_conntrack_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xdbe8f42e	nf_conntrack_l3proto_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xe5b6ce83	nf_conntrack_helper_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xe5c39189	nf_conntrack_l3proto_generic
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xe71213b1	nf_ct_helper_ext_add
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xe8b764f6	nf_ct_expect_init
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xeed503e8	nf_ct_get_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xefa3620b	nf_ct_extend_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf38bcdf3	nf_conntrack_max
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf6be2e5f	nf_conntrack_unregister_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf76cba26	nf_conntrack_l4proto_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xfde12676	nf_ct_l3proto_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xfedf31a6	nf_conntrack_flush_report
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_amanda 0x5826e83e	nf_nat_amanda_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_ftp 0x9817ba8b	nf_nat_ftp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x15c48517	set_ras_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x175f48f0	set_h225_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x2bc98880	nat_q931_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x4631fb89	nat_callforwarding_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x7032afbf	set_h245_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xbd81acfc	nat_rtp_rtcp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xe2c53561	get_h225_addr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xe530833a	nat_t120_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xf90306a3	set_sig_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xfe1f4657	nat_h245_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_irc 0x24864600	nf_nat_irc_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x47d98f9c	nf_nat_pptp_hook_outbound
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x5589fe07	nf_nat_pptp_hook_inbound
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x640c0630	nf_nat_pptp_hook_exp_gre
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0xc1903c34	nf_nat_pptp_hook_expectfn
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_proto_gre 0x16f02f70	nf_ct_gre_keymap_add
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_proto_gre 0x805d9b37	nf_ct_gre_keymap_destroy
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x0199748c	ct_sip_parse_numerical_param
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x14e7bd76	ct_sip_parse_address_param
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x31082973	ct_sip_parse_header_uri
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x3cd79c4d	nf_nat_sdp_session_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x3f16ab04	nf_nat_sdp_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x3fdaa371	ct_sip_parse_request
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x4282db25	nf_nat_sip_expect_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x51542ccb	nf_nat_sdp_media_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x6bb9c78e	nf_nat_sip_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xd1a2bab5	ct_sip_get_header
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xdceacf1b	ct_sip_get_sdp_header
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xf88150be	nf_nat_sdp_port_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_tftp 0xb10d6b73	nf_nat_tftp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_tproxy_core 0x08a243ee	nf_tproxy_get_sock_v4
+EXPORT_SYMBOL_GPL net/netfilter/nf_tproxy_core 0x7c2745a8	nf_tproxy_assign_sock
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x188d50af	nfnetlink_send
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x1f58e71b	nfnl_lock
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x3895cd7a	nfnl_unlock
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x8c1db34c	nfnetlink_subsys_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x987e7757	nfnetlink_subsys_register
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xd5a35b45	nfnetlink_unicast
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xeca95329	nfnetlink_has_listeners
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xef9b4bbd	nfnetlink_set_err
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink_log 0x758abba7	nfulnl_log_packet
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x12b49a23	xt_request_find_target
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x161d1417	xt_compat_unlock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x2831eae0	xt_compat_match_to_user
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x296cab98	xt_check_match
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x2c8e4133	xt_proto_fini
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x40728a63	xt_find_revision
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x493a74c2	xt_find_table_lock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x5709107a	per_cpu__xt_info_locks
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x5f82f1f7	xt_compat_flush_offsets
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x684694c5	xt_compat_add_offset
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x6f9aa2fb	xt_compat_calc_jump
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x7def0eee	xt_check_target
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x7e4670d6	xt_compat_target_offset
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x85a3fd49	xt_compat_target_from_user
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x8e224a77	xt_compat_target_to_user
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x978cee8a	xt_compat_match_from_user
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xc1d9d5d7	xt_proto_init
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xc1dd9cf3	xt_replace_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xcbc18ad2	xt_table_unlock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xe0b4971b	xt_compat_lock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xe1ec9670	xt_compat_match_offset
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xf0758c82	xt_unregister_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xf486a2e0	xt_register_table
+EXPORT_SYMBOL_GPL net/rxrpc/af-rxrpc 0xb0c86184	rxrpc_register_security
+EXPORT_SYMBOL_GPL net/rxrpc/af-rxrpc 0xcc490626	rxrpc_unregister_security
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x0025d15c	gss_mech_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x00c52ef5	g_make_token_header
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x054380ff	gss_mech_get
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x058905b9	svcauth_gss_flavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x5af7d214	gss_mech_put
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x7e1be562	svc_gss_principal
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x8d1a827e	svcauth_gss_register_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x8d37976c	gss_mech_get_by_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x951334cc	gss_mech_get_by_name
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xb5dea7ef	g_token_size
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xc016b5dd	gss_svc_to_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xe1bfaffa	gss_mech_register
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xf8b2ff6e	g_verify_token_header
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xfb4b5218	gss_pseudoflavor_to_service
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xfd4b99e0	gss_service_to_auth_domain_name
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x01c3228c	xdr_buf_subsegment
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x051aca96	rpc_unlink
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x05aa704e	svc_xprt_received
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x05e807a9	xdr_encode_string
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x065994f1	xdr_encode_opaque_fixed
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x076369d9	xprt_disconnect_done
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x09a8dd9d	auth_domain_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0afbcad7	xdr_inline_decode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0c89c2ed	rpc_call_null
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0ccee6b5	xprt_update_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0efcda21	rpc_pton
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0f668ba9	svc_auth_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0fa9b9b4	xdr_partial_copy_from_skb
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x12641358	rpc_force_rebind
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x12e280e3	svc_proc_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x136f2899	svc_set_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x14fa9556	rpc_queue_upcall
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1683d933	rpc_get_mount
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1841cf86	auth_domain_find
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1c677244	svc_wake_up
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1e4e7d78	xprt_wake_pending_tasks
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x211bb83d	svc_proc_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x22a4ef61	xdr_decode_array2
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x24c25d97	rpcauth_lookup_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x289f5252	rpc_put_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2919b156	xdr_decode_string_inplace
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x29c8865c	svc_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2aa17774	rpc_free_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2ac93c6c	xprt_reserve_xprt_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2acbffdf	xdr_encode_word
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2b501424	xprt_adjust_cwnd
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2cd290d4	rpc_print_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2d7f75cf	rpc_clone_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2eec63c9	xdr_encode_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3057bf81	rpc_wake_up_status
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3099e4ea	xdr_encode_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x30dee655	rpc_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x30edabee	rpc_malloc
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3164985f	rpc_shutdown_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x31a89d59	rpc_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x34ac0b6a	svc_sock_names
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3546e700	cache_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x39b453ac	unix_domain_find
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3a01d129	svc_drop
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3c794ffc	xprt_set_retrans_timeout_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3ef94f4c	svc_reserve
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3f32164e	rpc_max_payload
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x40a0daac	auth_unix_forget_old
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x46a223f7	rpc_peeraddr2str
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x46b0b332	rpc_mkpipe
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4c0a6660	svc_set_num_threads
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4d2b8d2d	svc_unreg_xprt_class
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4d5ddb73	__rpc_wait_for_completion_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4e7b4e22	rpc_alloc_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4f889f10	csum_partial_copy_to_xdr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x521cba26	sunrpc_cache_pipe_upcall
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x53445f68	nlm_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x54d0c359	xdr_init_decode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x564c5657	cache_check
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x586d1666	svc_process
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5b14ec1a	rpc_put_mount
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5bd26000	rpc_proc_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5d981d49	rpc_call_sync
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5eb50996	xdr_process_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6301411f	rpc_wake_up
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x675524ec	rpc_sockaddr2uaddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x683f49d9	rpcauth_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x68d31a13	svc_reg_xprt_class
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6bb07934	svc_seq_show
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6bbb6fde	xdr_skb_read_bits
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6c5304c5	rpcb_getport_sync
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6d600159	rpc_wake_up_next
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6eea229d	svcauth_unix_purge
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6f9e58d2	auth_unix_add_addr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6fe9eeee	xprt_set_retrans_timeout_def
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x71fa908a	cache_flush
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x720ac7b7	svc_xprt_enqueue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7231219c	rpc_ntop
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x72dbaf22	svc_sock_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x73f839fc	xprt_register_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x751ed1c1	xprt_complete_rqst
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x75b09d8c	rpcauth_init_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x76a9d314	xprt_wait_for_buffer_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x775adaf6	rpc_uaddr2sockaddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x78df36a1	xdr_init_encode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7ab89cbd	xprt_release_rqst_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7ce15583	rpc_sleep_on
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7de53067	rpc_init_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7e44f44d	svc_xprt_put
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x81ad8e86	svc_sock_update_bufs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x835ef939	rpcauth_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x83e80b61	svc_print_addr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x86b68a0c	xdr_read_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x896e2082	svc_prepare_thread
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8a047be8	xprt_release_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8a9e07ab	cache_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8df3b75f	xprt_reserve_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8efe3fc8	svc_create_pooled
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x94975597	svc_create_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x96fa5811	xdr_shift_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x99e0ad2d	sunrpc_cache_update
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9e041b57	xdr_inline_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa1301dcd	svcauth_unix_set_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa1d886f5	svc_find_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa30806f8	svc_max_payload
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa73c17f3	svc_exit_thread
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa7910554	svc_xprt_init
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xaadb7783	xdr_encode_array2
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xac396b64	svc_authenticate
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xaf5bf6ef	nfs_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb90f1a31	rpc_init_wait_queue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb9874a18	rpc_peeraddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb9d1d278	xprt_release_xprt_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xba154246	xdr_enter_page
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xba61cdea	rpc_setbufsize
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbadef2e8	svc_addsock
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbda681e5	rpc_delay
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbdfa6716	auth_unix_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbedea603	xprt_write_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbf9d1b96	nfsd_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc082dc67	rpc_exit_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc10adf1d	svc_close_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc12435e3	rpc_calc_rto
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc3001fa6	rpc_lookup_machine_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc3880471	xdr_decode_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc54a0164	rpcauth_destroy_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc6e22263	svc_xprt_names
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc831a6a3	svc_recv
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc8e96dea	qword_addhex
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xca07381a	xdr_decode_word
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcbfd485b	put_rpccred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcd194730	auth_domain_put
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcd288a7a	rpc_call_async
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcd7ac4a0	svc_auth_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcee467f3	xprt_load_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd1c94090	xdr_buf_from_iov
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd3ed8637	rpc_lookup_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd428418e	rpc_call_start
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd6ee251b	read_bytes_from_xdr_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd795c1fd	xdr_buf_read_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdda8a9f7	sunrpc_cache_unregister_pipefs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xde2ad9d7	rpc_run_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdf2a5cf0	rpcauth_init_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe03b6d2a	cache_purge
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe187d19c	rpc_killall_tasks
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe4b640fa	sunrpc_cache_register_pipefs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe5919cb1	xdr_encode_opaque
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe733bd7b	xprt_lookup_rqst
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe8ce327a	rpcauth_generic_bind_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe97f4ce5	qword_get
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xebe62dd6	rpc_destroy_wait_queue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xedb8b8e3	rpc_restart_call_prepare
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xedcf6be4	qword_add
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xeeacab69	rpc_update_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf118e637	rpcauth_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf13fcbe0	rpc_bind_new_program
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf207184a	xdr_reserve_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf373dab0	svc_sock_destroy
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf5ce7412	rpcb_getport_async
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf6f31e48	svc_destroy
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf7cfbac7	xdr_write_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf7f2f1b0	svc_xprt_copy_addrs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf9c13b91	rpc_proc_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf9d1164c	rpc_free
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfa1014ad	rpc_wake_up_queued_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfb8a37f8	sunrpc_cache_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfd154861	xprt_unregister_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfe66958c	rpc_restart_call
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x1a7675ba	wimax_report_rfkill_sw
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x1d3fb9d9	wimax_dev_init
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x42d10a80	wimax_msg_send
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x4c28bda4	wimax_report_rfkill_hw
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x5601ce5b	wimax_msg
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x57b4afca	wimax_state_get
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x735e7755	wimax_state_change
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x93a3939c	wimax_msg_len
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xb141bb91	wimax_msg_data_len
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xb23a26e3	wimax_dev_rm
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xb8abb560	wimax_dev_add
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xe8ee3199	wimax_msg_alloc
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xf34fca33	wimax_msg_data
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x012b294e	cfg80211_wext_siwap
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x0b486941	cfg80211_wext_siwmode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x10101794	cfg80211_wext_siwscan
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x13629286	cfg80211_wext_giwrate
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x201f55d3	cfg80211_wext_siwrts
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x2619748e	cfg80211_wext_siwgenie
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x2798826a	cfg80211_wext_siwencode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x3b4e2c8f	cfg80211_wext_siwtxpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x3d72595f	cfg80211_wext_siwessid
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x415c1bd0	cfg80211_wext_siwrate
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x4b015c2d	cfg80211_wext_siwpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x541dcdd4	cfg80211_wext_giwrange
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x5f1d1102	cfg80211_wext_giwencode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x5fcc983e	cfg80211_wext_siwmlme
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x6011f958	cfg80211_wext_siwencodeext
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x632b58f2	cfg80211_wext_giwretry
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x6bf537d7	cfg80211_wext_giwscan
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x6d89a9a5	cfg80211_wext_giwmode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x76743560	cfg80211_wext_giwrts
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x861adf7e	cfg80211_wext_giwfreq
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x88a53375	cfg80211_wext_giwfrag
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x8ddeec7e	cfg80211_wireless_stats
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xb2880a13	cfg80211_wext_siwauth
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xbf289317	cfg80211_wext_giwessid
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xc95b9665	cfg80211_wext_giwpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xd071bfcd	cfg80211_wext_siwfreq
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xd98fb97b	cfg80211_wext_giwap
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xda9bba23	cfg80211_wext_siwfrag
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xe0aebcd8	cfg80211_wext_giwname
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xe0b68345	cfg80211_wext_giwauth
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xe17192ba	cfg80211_wext_siwretry
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xff6c775b	cfg80211_wext_giwtxpower
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x4ae250ed	ipcomp_destroy
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x79978d41	ipcomp_init_state
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0xe1cf2085	ipcomp_input
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0xea491062	ipcomp_output
+EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0x0136f318	aoa_codec_unregister
+EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0x3e95ded8	ftr_gpio_methods
+EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0x4994e3eb	aoa_snd_ctl_add
+EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0x49bf486f	aoa_snd_device_new
+EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0x79ccf2b6	pmf_gpio_methods
+EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0x8f822818	aoa_fabric_register
+EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0xb84869b4	aoa_get_card
+EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0xcd7dfeec	aoa_fabric_unregister
+EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0xdc5153bf	aoa_codec_register
+EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0xff0d9449	aoa_fabric_unlink_codec
+EXPORT_SYMBOL_GPL sound/aoa/soundbus/snd-aoa-soundbus 0x21ea0e45	soundbus_dev_put
+EXPORT_SYMBOL_GPL sound/aoa/soundbus/snd-aoa-soundbus 0x3c99e664	soundbus_add_one
+EXPORT_SYMBOL_GPL sound/aoa/soundbus/snd-aoa-soundbus 0x56d36696	soundbus_remove_one
+EXPORT_SYMBOL_GPL sound/aoa/soundbus/snd-aoa-soundbus 0x6f107231	soundbus_unregister_driver
+EXPORT_SYMBOL_GPL sound/aoa/soundbus/snd-aoa-soundbus 0xdc8afee5	soundbus_register_driver
+EXPORT_SYMBOL_GPL sound/aoa/soundbus/snd-aoa-soundbus 0xeb06ae74	soundbus_dev_get
+EXPORT_SYMBOL_GPL sound/core/snd-pcm 0xa286a234	snd_pcm_format_name
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x02830ce6	snd_hda_codec_configure
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x02b0d28f	snd_hda_codec_cleanup_stream
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x058ba683	snd_hda_parse_pin_def_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0ae44173	snd_hda_delete_codec_preset
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0da45c96	snd_hda_codec_resume_amp
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1439107f	snd_hda_multi_out_dig_cleanup
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1509e571	snd_hda_build_controls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x15af2128	snd_hda_codec_read
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x168ff42b	snd_hda_multi_out_analog_prepare
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1cf85246	snd_hda_add_codec_preset
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1daccf91	snd_hda_mixer_amp_volume_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1f410ec5	snd_hda_override_amp_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1fada65a	snd_hda_codec_set_pincfg
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2559f600	snd_hda_ch_mode_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x25a853f4	snd_hda_mixer_bind_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x27bb1232	snd_hda_mixer_bind_switch_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2e758791	snd_hda_multi_out_analog_open
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x30fc95f9	snd_hda_codec_amp_update
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x349adc65	snd_hda_ch_mode_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x398ac9dc	snd_hda_multi_out_dig_prepare
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3b5cb70c	snd_hda_get_hint
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3d6d10de	snd_hda_codec_setup_stream
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x41fbc818	snd_hda_power_down
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x42522f54	snd_hda_load_patch
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x44824727	snd_hda_codec_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4497dfe5	snd_hda_create_spdif_in_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4a2d1ded	snd_hda_bind_sw
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4db66704	snd_hda_set_vmaster_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4eba7e6e	snd_hda_bind_vol
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5181070d	snd_hda_sequence_write_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x53ca5340	snd_hda_mixer_bind_ctls_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x58350fe1	snd_hda_create_spdif_out_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5ae76f73	auto_pin_cfg_labels
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5f67521a	snd_hda_check_board_codec_sid_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6131a378	snd_hda_multi_out_analog_cleanup
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x634caa7b	snd_hda_add_new_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x64430c16	snd_hda_sequence_write
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6ded24d2	snd_hda_mixer_amp_switch_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x71ff699c	snd_hda_ctl_add
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x75098ed1	snd_hda_codec_write
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7a5c6998	snd_hda_multi_out_dig_open
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8128bb61	snd_hda_resume
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x81ce5c47	snd_hda_mixer_amp_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8203048d	query_amp_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9070cc54	snd_hda_mixer_amp_switch_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x932f6727	snd_hda_mixer_amp_volume_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9498e964	snd_hda_ch_mode_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9a88d7d9	snd_hda_codec_amp_read
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9a8e1877	snd_array_free
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9c459553	snd_hda_attach_beep_device
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9ce12d72	snd_hda_codec_amp_stereo
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9fce0bc6	snd_hda_power_up
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa2827d76	snd_hda_get_jack_location
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xad87613e	snd_print_pcm_rates
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xae57bbc6	snd_hda_mixer_bind_ctls_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xaefdf2e6	snd_hda_codec_resume_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb0988fb5	snd_hda_check_board_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb15b441b	snd_hda_build_pcms
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbc494e37	snd_hda_input_mux_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbc7bb5e4	snd_hda_add_vmaster
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbd886e59	snd_hda_get_bool_hint
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbe7dd7dc	snd_array_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc34a54c6	snd_hda_calc_stream_format
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc3f60079	snd_hda_get_connections
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc5473bec	snd_hda_multi_out_dig_close
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc652fd69	snd_hda_get_jack_connectivity
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcb301b6e	snd_hda_get_jack_type
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xccb701cf	snd_hda_bus_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcce27eb0	snd_hda_input_mux_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcfeb8214	snd_hda_codec_write_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd29d655e	snd_hda_get_sub_nodes
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd4c0bfbe	snd_hda_query_pin_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xda26fab4	snd_hda_mixer_bind_switch_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xda2dbaa7	snd_hda_create_spdif_share_sw
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xda495b63	snd_hda_check_amp_list_power
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xdce8f62b	snd_hda_find_mixer_ctl
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xdd49fbf6	snd_hda_mixer_bind_ctls_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe0312717	snd_hda_mixer_amp_volume_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe36e8c64	snd_hda_mixer_amp_switch_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe8ee880f	snd_hda_is_supported_format
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeda3a721	snd_print_pcm_bits
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xef85e321	snd_hda_suspend
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf558db67	snd_hda_detach_beep_device
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf9fb97fe	snd_hda_queue_unsol_event
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xfaee6dab	snd_hda_codec_get_pincfg
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1836 0x4b402ed3	soc_codec_dev_ad1836
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1836 0xd4a33761	ad1836_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1938 0x2203568f	ad1938_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1938 0x6d7f6438	soc_codec_dev_ad1938
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0x01e2eb9c	soc_codec_dev_ad73311
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0x65985fd3	ad73311_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4104 0x7bbf9eef	soc_codec_device_ak4104
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0x72ae4edc	ak4535_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0xabb19868	soc_codec_dev_ak4535
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4642 0x24834709	ak4642_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4642 0xf30ab7c4	soc_codec_dev_ak4642
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0x7033735f	soc_codec_device_cs4270
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0xb0fc8ab8	cs4270_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-l3 0x78c84c7e	l3_write
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-max9877 0x7d75e12e	max9877_add_controls
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0x1bf4b1a6	soc_codec_dev_pcm3008
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0x7adfa0dd	pcm3008_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-spdif 0x88eaab5f	dit_stub_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0x1041b46d	soc_codec_dev_ssm2602
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0xd3388844	ssm2602_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0x7b3f37cd	tlv320aic23_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0xc5e31d80	soc_codec_dev_tlv320aic23
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0x7786f53f	aic26_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0xe5b3bbff	aic26_soc_codec_dev
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x2b4f16fc	aic3x_button_pressed
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x39082bc5	soc_codec_dev_aic3x
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xbb4b836a	aic3x_headset_detected
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xbd5a55f5	aic3x_set_headset_detection
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xc8ec061d	aic3x_set_gpio
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xd55273ae	aic3x_get_gpio
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xe4a39597	aic3x_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0x58d63aa9	twl4030_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0xbfcc3c65	soc_codec_dev_twl4030
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda134x 0x7e745a60	soc_codec_dev_uda134x
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x4fce6609	soc_codec_dev_uda1380
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0xea964f7e	uda1380_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0x434c2b0c	wm_hubs_add_analogue_routes
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0x757206d5	wm_hubs_spkmix_tlv
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0xe099750a	wm_hubs_add_analogue_controls
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x0b925a6e	soc_codec_dev_wm8350
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x534b6b85	wm8350_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0xdc35ab42	wm8350_hp_jack_detect
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x0bb64d3b	wm8400_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x908ea03c	soc_codec_dev_wm8400
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0x1895439d	wm8510_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0xc2e51fab	soc_codec_dev_wm8510
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8523 0xafe92bae	wm8523_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8523 0xeb8ef231	soc_codec_dev_wm8523
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0x689fc0e2	wm8580_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0xcd342424	soc_codec_dev_wm8580
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0x870bdc10	wm8728_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0xa273e371	soc_codec_dev_wm8728
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x0673866c	wm8731_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x7273320f	soc_codec_dev_wm8731
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x6fe57ffc	soc_codec_dev_wm8750
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0xaeff60f3	wm8750_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0x3017bb19	wm8753_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0x44c82c3f	soc_codec_dev_wm8753
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8776 0x1a42dafc	wm8776_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8776 0x3a3b0c14	soc_codec_dev_wm8776
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0x89f1ca24	soc_codec_dev_wm8900
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0xe94d5d66	wm8900_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0x6fd92fc8	wm8903_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0xa2dc99e7	soc_codec_dev_wm8903
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0x1d027975	wm8940_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0x8ef862f8	soc_codec_dev_wm8940
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0x8a9d685c	wm8960_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0x8d7cb696	soc_codec_dev_wm8960
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8961 0x41c1bbf9	wm8961_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8961 0x946787d7	soc_codec_dev_wm8961
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0x95a5ede0	soc_codec_dev_wm8971
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0xe7b6b04d	wm8971_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8974 0xb77b21fe	wm8974_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8974 0xe8d219a5	soc_codec_dev_wm8974
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0x36f1916c	wm8988_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0x4f3b1194	soc_codec_dev_wm8988
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0x7cd518b5	wm8990_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0x8620f1ab	soc_codec_dev_wm8990
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8993 0xad0da268	soc_codec_dev_wm8993
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8993 0xfa416a1b	wm8993_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0x19cacfcc	wm9081_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0xde91cce7	soc_codec_dev_wm9081
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x01c55b0d	snd_soc_jack_report
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x01f2add7	snd_soc_dapm_put_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0b17f87f	snd_soc_dai_set_tristate
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0ddcbb7d	snd_soc_dapm_stream_event
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x12830b47	snd_soc_dapm_nc_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x13422ba8	snd_soc_codec_volatile_register
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2074b153	snd_soc_get_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x27fbfd0f	dapm_reg_event
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x29d82e80	snd_soc_suspend_device
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2ad77027	snd_soc_dai_digital_mute
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x30fb457c	snd_soc_jack_free_gpios
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x34811b57	snd_soc_add_controls
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x349e3c7d	snd_soc_dapm_add_routes
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x34fd1c1c	snd_soc_dapm_free
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x398fe1ca	snd_soc_unregister_platform
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x39efafb4	snd_soc_dapm_get_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x431e83b0	snd_soc_dapm_put_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x48b2c321	snd_soc_dapm_enable_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x49b9e7a9	snd_soc_dapm_get_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4cc2a0cf	snd_soc_register_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4e347007	snd_soc_unregister_dai
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x50b899b0	snd_soc_info_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x53a2c658	snd_soc_get_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x547364f7	snd_soc_dapm_get_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x55628208	snd_soc_dapm_put_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5905a241	snd_soc_put_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x60b515a9	snd_soc_dapm_disable_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x62b5faed	snd_soc_dapm_new_control
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6e0cffe2	snd_soc_dai_set_pll
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x703f3bc4	snd_soc_register_dais
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x763186be	snd_soc_init_card
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x77b88df0	snd_soc_dai_set_fmt
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x780a5f34	snd_soc_dapm_info_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8706c83e	snd_soc_info_volsw_ext
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x89b37577	snd_soc_put_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8ba3d000	snd_soc_dapm_new_controls
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8c749ace	snd_soc_info_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9056d2b9	snd_soc_unregister_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9425a4ab	snd_soc_update_bits
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x94b28b63	snd_soc_dapm_get_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9725b29f	snd_soc_info_enum_ext
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9743ece2	snd_soc_dai_set_sysclk
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x98e7dc10	snd_soc_unregister_dais
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9b7f54e7	snd_soc_jack_add_pins
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9f7c4b14	snd_soc_info_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xac5ac617	snd_soc_set_runtime_hwparams
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb37e0455	snd_soc_new_ac97_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb3a8ded2	snd_soc_register_dai
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb53497e7	snd_soc_put_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb5d52b15	snd_soc_put_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xbb7e9873	snd_soc_dapm_get_pin_status
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xbc2e8983	snd_soc_info_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xbd884c2b	snd_soc_put_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xbf2757f1	snd_soc_dapm_new_widgets
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc06cd84f	snd_soc_new_pcms
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc2efee41	snd_soc_get_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc45e45e1	snd_soc_jack_add_gpios
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc9365085	snd_soc_jack_new
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xcab2897f	snd_soc_get_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xcadb9c08	snd_soc_free_pcms
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xcd9846b6	snd_soc_free_ac97_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xcf744ffe	snd_soc_codec_set_cache_io
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd157061e	snd_soc_register_platform
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd313896c	snd_soc_cnew
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xe53e58cb	snd_soc_get_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf0a0686e	snd_soc_resume_device
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf3b95a79	snd_soc_dapm_put_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf4d7c0a6	snd_soc_dapm_sync
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xfa13bfc4	snd_soc_dai_set_tdm_slot
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xfbcd0dd3	snd_soc_test_bits
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xfd146fea	snd_soc_dai_set_clkdiv
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x1f621eea	xv_free
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x6a874429	xv_destroy_pool
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x9c6a0365	xv_create_pool
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0xaf69699e	xv_get_object_size
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0xd85f1692	xv_get_total_size_bytes
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0xe0cf8249	xv_malloc
+EXPORT_SYMBOL_GPL vmlinux 0x003ae408	ata_std_error_handler
+EXPORT_SYMBOL_GPL vmlinux 0x00566d8f	inotify_get_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x0067df75	ata_tf_from_fis
+EXPORT_SYMBOL_GPL vmlinux 0x00b8ecf8	__iowrite32_copy
+EXPORT_SYMBOL_GPL vmlinux 0x00befbaa	transport_add_device
+EXPORT_SYMBOL_GPL vmlinux 0x00e449c7	spu_switch_notify
+EXPORT_SYMBOL_GPL vmlinux 0x00ebcb5d	ata_id_string
+EXPORT_SYMBOL_GPL vmlinux 0x00f4e873	ata_pci_bmdma_clear_simplex
+EXPORT_SYMBOL_GPL vmlinux 0x0143861e	fuse_dev_operations
+EXPORT_SYMBOL_GPL vmlinux 0x016b9869	xfrm_calg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0x01892786	swiotlb_sync_single_range_for_device
+EXPORT_SYMBOL_GPL vmlinux 0x019353e2	fsstack_copy_inode_size
+EXPORT_SYMBOL_GPL vmlinux 0x01a4ea6d	unregister_die_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x01b169eb	usb_queue_reset_device
+EXPORT_SYMBOL_GPL vmlinux 0x01cc414a	spi_new_device
+EXPORT_SYMBOL_GPL vmlinux 0x01d49946	ata_sff_wait_after_reset
+EXPORT_SYMBOL_GPL vmlinux 0x01e1a8de	kgdb_breakpoint
+EXPORT_SYMBOL_GPL vmlinux 0x01f632c3	scsi_eh_ready_devs
+EXPORT_SYMBOL_GPL vmlinux 0x02192c22	tcp_init_congestion_ops
+EXPORT_SYMBOL_GPL vmlinux 0x026117fd	force_sig_info
+EXPORT_SYMBOL_GPL vmlinux 0x026c92a6	crypto_aead_type
+EXPORT_SYMBOL_GPL vmlinux 0x02b3f9d9	usb_get_status
+EXPORT_SYMBOL_GPL vmlinux 0x02ccea56	lock_policy_rwsem_write
+EXPORT_SYMBOL_GPL vmlinux 0x02e61d9f	get_dcookie
+EXPORT_SYMBOL_GPL vmlinux 0x02f81b1c	pmac_low_i2c_unlock
+EXPORT_SYMBOL_GPL vmlinux 0x0312e4dc	i2c_new_device
+EXPORT_SYMBOL_GPL vmlinux 0x0342f54a	single_release_net
+EXPORT_SYMBOL_GPL vmlinux 0x0343bdf1	__i2c_board_list
+EXPORT_SYMBOL_GPL vmlinux 0x03497035	pci_enable_pcie_error_reporting
+EXPORT_SYMBOL_GPL vmlinux 0x035ed0a5	ring_buffer_lock_reserve
+EXPORT_SYMBOL_GPL vmlinux 0x037218da	ide_input_data
+EXPORT_SYMBOL_GPL vmlinux 0x037401e3	pci_msi_off
+EXPORT_SYMBOL_GPL vmlinux 0x03b8e679	usb_autopm_put_interface
+EXPORT_SYMBOL_GPL vmlinux 0x03dfcfc8	kobject_get_path
+EXPORT_SYMBOL_GPL vmlinux 0x03e3686c	ata_timing_cycle2mode
+EXPORT_SYMBOL_GPL vmlinux 0x04069b1d	set_irq_nested_thread
+EXPORT_SYMBOL_GPL vmlinux 0x0423b49e	inotify_dentry_parent_queue_event
+EXPORT_SYMBOL_GPL vmlinux 0x042df92d	spi_busnum_to_master
+EXPORT_SYMBOL_GPL vmlinux 0x0433edea	get_net_ns_by_pid
+EXPORT_SYMBOL_GPL vmlinux 0x04486e88	rcu_batches_completed
+EXPORT_SYMBOL_GPL vmlinux 0x04ca975d	ata_cable_unknown
+EXPORT_SYMBOL_GPL vmlinux 0x04ea8706	__iowrite64_copy
+EXPORT_SYMBOL_GPL vmlinux 0x04ebc9a1	sata_set_spd
+EXPORT_SYMBOL_GPL vmlinux 0x05263d71	usb_kill_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0x0531dcb8	ata_dev_classify
+EXPORT_SYMBOL_GPL vmlinux 0x054e550b	kernel_halt
+EXPORT_SYMBOL_GPL vmlinux 0x0554307b	ring_buffer_time_stamp
+EXPORT_SYMBOL_GPL vmlinux 0x05876361	clockevent_delta2ns
+EXPORT_SYMBOL_GPL vmlinux 0x05b62a42	crypto_attr_alg2
+EXPORT_SYMBOL_GPL vmlinux 0x05ca88c7	pmac_i2c_detach_adapter
+EXPORT_SYMBOL_GPL vmlinux 0x05ed4de7	crypto_shash_finup
+EXPORT_SYMBOL_GPL vmlinux 0x0619ca8a	getboottime
+EXPORT_SYMBOL_GPL vmlinux 0x063a49b9	ata_sg_init
+EXPORT_SYMBOL_GPL vmlinux 0x064db9a5	mark_mounts_for_expiry
+EXPORT_SYMBOL_GPL vmlinux 0x065315d9	tty_ldisc_deref
+EXPORT_SYMBOL_GPL vmlinux 0x06b7828b	inet_hashinfo_init
+EXPORT_SYMBOL_GPL vmlinux 0x06deadb3	ata_noop_qc_prep
+EXPORT_SYMBOL_GPL vmlinux 0x06fa8d63	__rtnl_link_register
+EXPORT_SYMBOL_GPL vmlinux 0x07022a3e	ring_buffer_reset_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x070c4be0	platform_driver_probe
+EXPORT_SYMBOL_GPL vmlinux 0x071bc448	ide_check_ireason
+EXPORT_SYMBOL_GPL vmlinux 0x07636df0	br_fdb_test_addr_hook
+EXPORT_SYMBOL_GPL vmlinux 0x0785a27d	ring_buffer_consume
+EXPORT_SYMBOL_GPL vmlinux 0x07a94593	__ip_route_output_key
+EXPORT_SYMBOL_GPL vmlinux 0x07b284ee	ide_queue_pc_tail
+EXPORT_SYMBOL_GPL vmlinux 0x07b52e38	rtnl_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x07c5cf92	ide_pci_init_one
+EXPORT_SYMBOL_GPL vmlinux 0x07f200cb	ata_sff_irq_on
+EXPORT_SYMBOL_GPL vmlinux 0x083dfa03	ata_cable_sata
+EXPORT_SYMBOL_GPL vmlinux 0x083e799b	ata_pci_remove_one
+EXPORT_SYMBOL_GPL vmlinux 0x08438cea	swiotlb_unmap_page
+EXPORT_SYMBOL_GPL vmlinux 0x087c86f1	blk_rq_err_bytes
+EXPORT_SYMBOL_GPL vmlinux 0x089c7b1b	class_compat_remove_link
+EXPORT_SYMBOL_GPL vmlinux 0x08cc0e62	devres_remove_group
+EXPORT_SYMBOL_GPL vmlinux 0x08d8708f	cancel_work_sync
+EXPORT_SYMBOL_GPL vmlinux 0x08fba572	of_pci_address_to_resource
+EXPORT_SYMBOL_GPL vmlinux 0x091c824a	machine_power_off
+EXPORT_SYMBOL_GPL vmlinux 0x091eb9b4	round_jiffies
+EXPORT_SYMBOL_GPL vmlinux 0x09c7dc7b	regulator_register
+EXPORT_SYMBOL_GPL vmlinux 0x09c941e0	dev_attr_em_message
+EXPORT_SYMBOL_GPL vmlinux 0x09f303fa	crypto_grab_skcipher
+EXPORT_SYMBOL_GPL vmlinux 0x0a00c18d	kobject_uevent
+EXPORT_SYMBOL_GPL vmlinux 0x0a4c780a	led_classdev_resume
+EXPORT_SYMBOL_GPL vmlinux 0x0a51ae5b	virq_to_hw
+EXPORT_SYMBOL_GPL vmlinux 0x0a621c08	ide_host_free
+EXPORT_SYMBOL_GPL vmlinux 0x0ac18a27	tcp_orphan_count
+EXPORT_SYMBOL_GPL vmlinux 0x0ac6eccd	crypto_register_ahash
+EXPORT_SYMBOL_GPL vmlinux 0x0b07abe2	unshare_fs_struct
+EXPORT_SYMBOL_GPL vmlinux 0x0b0b356c	ip_build_and_send_pkt
+EXPORT_SYMBOL_GPL vmlinux 0x0b0cd58a	pmf_get_function
+EXPORT_SYMBOL_GPL vmlinux 0x0b15a243	drop_file_write_access
+EXPORT_SYMBOL_GPL vmlinux 0x0b225458	attribute_container_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x0b468586	module_mutex
+EXPORT_SYMBOL_GPL vmlinux 0x0b545570	class_for_each_device
+EXPORT_SYMBOL_GPL vmlinux 0x0b5f3286	find_get_pid
+EXPORT_SYMBOL_GPL vmlinux 0x0b83c726	sata_scr_valid
+EXPORT_SYMBOL_GPL vmlinux 0x0bc5647b	bd_release_from_disk
+EXPORT_SYMBOL_GPL vmlinux 0x0be3e706	unregister_pernet_device
+EXPORT_SYMBOL_GPL vmlinux 0x0beea446	srcu_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x0c09e486	crypto_alg_mod_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x0c2cdbf1	synchronize_sched
+EXPORT_SYMBOL_GPL vmlinux 0x0c4fee26	crypto_unregister_shash
+EXPORT_SYMBOL_GPL vmlinux 0x0c51c929	proc_net_mkdir
+EXPORT_SYMBOL_GPL vmlinux 0x0c759d89	crypto_shash_update
+EXPORT_SYMBOL_GPL vmlinux 0x0c87b646	usb_bus_list_lock
+EXPORT_SYMBOL_GPL vmlinux 0x0c956253	pm_runtime_enable
+EXPORT_SYMBOL_GPL vmlinux 0x0ca073b3	ata_host_resume
+EXPORT_SYMBOL_GPL vmlinux 0x0cb88680	__tracepoint_block_rq_remap
+EXPORT_SYMBOL_GPL vmlinux 0x0cbf66b1	scsi_internal_device_unblock
+EXPORT_SYMBOL_GPL vmlinux 0x0cc81abc	pmac_i2c_attach_adapter
+EXPORT_SYMBOL_GPL vmlinux 0x0ccc78d4	register_net_sysctl_rotable
+EXPORT_SYMBOL_GPL vmlinux 0x0cd61b67	kobject_create_and_add
+EXPORT_SYMBOL_GPL vmlinux 0x0cd9e1d0	scsi_queue_work
+EXPORT_SYMBOL_GPL vmlinux 0x0d2f2df7	pmf_do_irq
+EXPORT_SYMBOL_GPL vmlinux 0x0e2f2423	device_create_vargs
+EXPORT_SYMBOL_GPL vmlinux 0x0e5b9840	sata_sff_hardreset
+EXPORT_SYMBOL_GPL vmlinux 0x0e79a3c5	usb_driver_claim_interface
+EXPORT_SYMBOL_GPL vmlinux 0x0e977893	ata_pio_need_iordy
+EXPORT_SYMBOL_GPL vmlinux 0x0efbdb30	usb_match_id
+EXPORT_SYMBOL_GPL vmlinux 0x0f2b6168	ide_release_dma_engine
+EXPORT_SYMBOL_GPL vmlinux 0x0f4efd0e	platform_device_add_data
+EXPORT_SYMBOL_GPL vmlinux 0x0f8ba23c	sysfs_remove_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0x0fbf124d	crypto_alloc_ahash
+EXPORT_SYMBOL_GPL vmlinux 0x0ff2ee0e	sata_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x10138352	tracing_on
+EXPORT_SYMBOL_GPL vmlinux 0x101c923e	__tracepoint_power_start
+EXPORT_SYMBOL_GPL vmlinux 0x103fa0c1	usb_find_interface
+EXPORT_SYMBOL_GPL vmlinux 0x105d1834	flush_workqueue
+EXPORT_SYMBOL_GPL vmlinux 0x108adf71	usb_sg_cancel
+EXPORT_SYMBOL_GPL vmlinux 0x111dca74	part_round_stats
+EXPORT_SYMBOL_GPL vmlinux 0x113c628b	regulator_get_voltage
+EXPORT_SYMBOL_GPL vmlinux 0x1152f238	sata_pmp_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x11a4d6e1	__pneigh_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x11f447ce	__gpio_to_irq
+EXPORT_SYMBOL_GPL vmlinux 0x11fb3e85	ata_sff_host_intr
+EXPORT_SYMBOL_GPL vmlinux 0x124f2056	crypto_get_attr_type
+EXPORT_SYMBOL_GPL vmlinux 0x1251d30f	call_rcu
+EXPORT_SYMBOL_GPL vmlinux 0x12629c31	spi_write_then_read
+EXPORT_SYMBOL_GPL vmlinux 0x1268f357	resume_device_irqs
+EXPORT_SYMBOL_GPL vmlinux 0x12e7db77	of_modalias_node
+EXPORT_SYMBOL_GPL vmlinux 0x12edbcfc	crypto_shash_setkey
+EXPORT_SYMBOL_GPL vmlinux 0x1333d8b3	ps3av_video_mode2res
+EXPORT_SYMBOL_GPL vmlinux 0x13714f64	root_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x138552fc	sata_scr_write
+EXPORT_SYMBOL_GPL vmlinux 0x13b2a946	register_keyboard_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x13f6fb9e	cpufreq_frequency_table_verify
+EXPORT_SYMBOL_GPL vmlinux 0x13f82f8e	srcu_init_notifier_head
+EXPORT_SYMBOL_GPL vmlinux 0x13f98dcc	of_address_to_resource
+EXPORT_SYMBOL_GPL vmlinux 0x1400aba6	sysdev_class_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x142e9cf2	__wake_up_sync_key
+EXPORT_SYMBOL_GPL vmlinux 0x1460c88b	vfs_lock_file
+EXPORT_SYMBOL_GPL vmlinux 0x148d3636	crypto_register_alg
+EXPORT_SYMBOL_GPL vmlinux 0x149db923	selinux_string_to_sid
+EXPORT_SYMBOL_GPL vmlinux 0x14ddfc25	ata_sff_dev_classify
+EXPORT_SYMBOL_GPL vmlinux 0x14f34d54	usb_hcd_giveback_urb
+EXPORT_SYMBOL_GPL vmlinux 0x14ff9cc6	fuse_request_send
+EXPORT_SYMBOL_GPL vmlinux 0x154593c6	sysdev_class_register
+EXPORT_SYMBOL_GPL vmlinux 0x156c2c4a	fuse_file_poll
+EXPORT_SYMBOL_GPL vmlinux 0x158625d3	pid_vnr
+EXPORT_SYMBOL_GPL vmlinux 0x15892417	async_synchronize_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x1598dc9d	unregister_netevent_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x15c12170	mnt_want_write_file
+EXPORT_SYMBOL_GPL vmlinux 0x15c3fadc	handle_level_irq
+EXPORT_SYMBOL_GPL vmlinux 0x15e6d86b	dev_attr_em_message_type
+EXPORT_SYMBOL_GPL vmlinux 0x15f8f0b9	find_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0x1633caca	pm_runtime_barrier
+EXPORT_SYMBOL_GPL vmlinux 0x1659ca9c	cpufreq_freq_attr_scaling_available_freqs
+EXPORT_SYMBOL_GPL vmlinux 0x166925c0	crypto_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0x16718bee	led_trigger_event
+EXPORT_SYMBOL_GPL vmlinux 0x1672bce9	pmf_find_function
+EXPORT_SYMBOL_GPL vmlinux 0x168aed03	rtc_class_close
+EXPORT_SYMBOL_GPL vmlinux 0x1716cf11	driver_find
+EXPORT_SYMBOL_GPL vmlinux 0x1722d945	dm_put
+EXPORT_SYMBOL_GPL vmlinux 0x176eb175	irq_find_mapping
+EXPORT_SYMBOL_GPL vmlinux 0x176ef8c6	tcp_death_row
+EXPORT_SYMBOL_GPL vmlinux 0x17b1cfa8	pmf_call_function
+EXPORT_SYMBOL_GPL vmlinux 0x18654952	platform_driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x1878f62b	edac_err_assert
+EXPORT_SYMBOL_GPL vmlinux 0x189f7f73	inet_csk_addr2sockaddr
+EXPORT_SYMBOL_GPL vmlinux 0x18d53420	kgdb_register_io_module
+EXPORT_SYMBOL_GPL vmlinux 0x18e251af	ide_init_sg_cmd
+EXPORT_SYMBOL_GPL vmlinux 0x18ee7395	scatterwalk_map_and_copy
+EXPORT_SYMBOL_GPL vmlinux 0x18f464c6	ata_pci_device_do_resume
+EXPORT_SYMBOL_GPL vmlinux 0x19020eb3	regulator_is_enabled
+EXPORT_SYMBOL_GPL vmlinux 0x1928a369	of_irq_to_resource
+EXPORT_SYMBOL_GPL vmlinux 0x19a304ba	usb_disabled
+EXPORT_SYMBOL_GPL vmlinux 0x19b70ac1	perf_tp_event
+EXPORT_SYMBOL_GPL vmlinux 0x19c4f435	cpu_remove_sysdev_attr
+EXPORT_SYMBOL_GPL vmlinux 0x19f43c7a	led_trigger_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x19f6bd37	regulator_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x1a21c648	class_compat_register
+EXPORT_SYMBOL_GPL vmlinux 0x1a323362	__ftrace_vbprintk
+EXPORT_SYMBOL_GPL vmlinux 0x1a356812	sysfs_notify
+EXPORT_SYMBOL_GPL vmlinux 0x1a474901	tracepoint_probe_unregister_noupdate
+EXPORT_SYMBOL_GPL vmlinux 0x1a628a1c	ata_sff_port_start
+EXPORT_SYMBOL_GPL vmlinux 0x1a917e47	relay_file_operations
+EXPORT_SYMBOL_GPL vmlinux 0x1ac717e3	ps3_os_area_get_rtc_diff
+EXPORT_SYMBOL_GPL vmlinux 0x1acc9107	tcp_reno_cong_avoid
+EXPORT_SYMBOL_GPL vmlinux 0x1ae6f10b	macio_find
+EXPORT_SYMBOL_GPL vmlinux 0x1b07fb2c	rdev_get_id
+EXPORT_SYMBOL_GPL vmlinux 0x1b221e3d	ata_ehi_clear_desc
+EXPORT_SYMBOL_GPL vmlinux 0x1b379a98	aead_geniv_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x1b9aca3f	jprobe_return
+EXPORT_SYMBOL_GPL vmlinux 0x1c32d7f7	unregister_pernet_gen_device
+EXPORT_SYMBOL_GPL vmlinux 0x1c3af716	execute_in_process_context
+EXPORT_SYMBOL_GPL vmlinux 0x1c4a0fd4	device_del
+EXPORT_SYMBOL_GPL vmlinux 0x1c51c05d	dm_dispatch_request
+EXPORT_SYMBOL_GPL vmlinux 0x1c852e7c	xfrm_calg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x1c87a811	__round_jiffies_up
+EXPORT_SYMBOL_GPL vmlinux 0x1c9c6cd2	do_add_mount
+EXPORT_SYMBOL_GPL vmlinux 0x1cdeed47	usb_hcd_pci_probe
+EXPORT_SYMBOL_GPL vmlinux 0x1cfbe7c3	device_rename
+EXPORT_SYMBOL_GPL vmlinux 0x1d13d809	blk_abort_queue
+EXPORT_SYMBOL_GPL vmlinux 0x1d8d7c79	d_materialise_unique
+EXPORT_SYMBOL_GPL vmlinux 0x1d8f8059	__tracepoint_power_end
+EXPORT_SYMBOL_GPL vmlinux 0x1db21d74	__tracepoint_kfree_skb
+EXPORT_SYMBOL_GPL vmlinux 0x1dbac861	spu_init_channels
+EXPORT_SYMBOL_GPL vmlinux 0x1dee2629	trace_current_buffer_lock_reserve
+EXPORT_SYMBOL_GPL vmlinux 0x1df7125f	ata_pci_sff_prepare_host
+EXPORT_SYMBOL_GPL vmlinux 0x1e35322f	anon_inode_getfile
+EXPORT_SYMBOL_GPL vmlinux 0x1e7842c1	tracepoint_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0x1e7bbcb3	kernel_restart
+EXPORT_SYMBOL_GPL vmlinux 0x1eb9516e	round_jiffies_relative
+EXPORT_SYMBOL_GPL vmlinux 0x1ebf6c2a	pci_power_names
+EXPORT_SYMBOL_GPL vmlinux 0x1ec090a9	ata_qc_complete_multiple
+EXPORT_SYMBOL_GPL vmlinux 0x1eda81be	usb_hub_clear_tt_buffer
+EXPORT_SYMBOL_GPL vmlinux 0x1f263d4a	kobject_init_and_add
+EXPORT_SYMBOL_GPL vmlinux 0x1f32eb84	power_supply_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x1f805974	led_trigger_remove
+EXPORT_SYMBOL_GPL vmlinux 0x1fcece42	inet_twdr_twcal_tick
+EXPORT_SYMBOL_GPL vmlinux 0x1fd3e8b9	sched_setscheduler
+EXPORT_SYMBOL_GPL vmlinux 0x1fe6cca3	crypto_aead_setauthsize
+EXPORT_SYMBOL_GPL vmlinux 0x1fe970cb	ps3_io_irq_setup
+EXPORT_SYMBOL_GPL vmlinux 0x1ffba424	platform_bus
+EXPORT_SYMBOL_GPL vmlinux 0x2009d329	fb_sys_write
+EXPORT_SYMBOL_GPL vmlinux 0x2009e136	ata_sff_check_status
+EXPORT_SYMBOL_GPL vmlinux 0x20363438	ata_timing_compute
+EXPORT_SYMBOL_GPL vmlinux 0x204ed0e1	fb_deferred_io_init
+EXPORT_SYMBOL_GPL vmlinux 0x20770192	register_net_sysctl_table
+EXPORT_SYMBOL_GPL vmlinux 0x20a82b8d	skcipher_geniv_init
+EXPORT_SYMBOL_GPL vmlinux 0x20bc3470	orderly_poweroff
+EXPORT_SYMBOL_GPL vmlinux 0x20bc75a3	platform_get_resource_byname
+EXPORT_SYMBOL_GPL vmlinux 0x20c6472c	ide_create_request_sense_cmd
+EXPORT_SYMBOL_GPL vmlinux 0x20cb6493	rtnl_link_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x20e64ba6	bus_get_device_klist
+EXPORT_SYMBOL_GPL vmlinux 0x20e9cc4a	ide_do_test_unit_ready
+EXPORT_SYMBOL_GPL vmlinux 0x21468244	__rtnl_link_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x214fef7c	ide_pio_need_iordy
+EXPORT_SYMBOL_GPL vmlinux 0x215db6e9	tracepoint_probe_register_noupdate
+EXPORT_SYMBOL_GPL vmlinux 0x216808cb	pmac_i2c_get_type
+EXPORT_SYMBOL_GPL vmlinux 0x21954635	usb_init_urb
+EXPORT_SYMBOL_GPL vmlinux 0x2198bd5b	pci_disable_rom
+EXPORT_SYMBOL_GPL vmlinux 0x21a9a0f2	ring_buffer_write
+EXPORT_SYMBOL_GPL vmlinux 0x21b06f73	pcibios_find_pci_bus
+EXPORT_SYMBOL_GPL vmlinux 0x2296c00d	crypto_attr_u32
+EXPORT_SYMBOL_GPL vmlinux 0x22b3a7cf	usb_hc_died
+EXPORT_SYMBOL_GPL vmlinux 0x22b3c679	usb_hcd_check_unlink_urb
+EXPORT_SYMBOL_GPL vmlinux 0x235466ba	kick_process
+EXPORT_SYMBOL_GPL vmlinux 0x2357f8e1	da903x_reads
+EXPORT_SYMBOL_GPL vmlinux 0x23864ce7	cpuset_mem_spread_node
+EXPORT_SYMBOL_GPL vmlinux 0x23a59941	ring_buffer_free
+EXPORT_SYMBOL_GPL vmlinux 0x23b92f18	queue_delayed_work
+EXPORT_SYMBOL_GPL vmlinux 0x23f5e443	inotify_rm_wd
+EXPORT_SYMBOL_GPL vmlinux 0x23fc87d0	ide_timing_find_mode
+EXPORT_SYMBOL_GPL vmlinux 0x240a0bf9	led_trigger_set
+EXPORT_SYMBOL_GPL vmlinux 0x242f33c2	raw_seq_stop
+EXPORT_SYMBOL_GPL vmlinux 0x2447533c	ktime_get_real
+EXPORT_SYMBOL_GPL vmlinux 0x24770d68	rtc_read_alarm
+EXPORT_SYMBOL_GPL vmlinux 0x24905800	kill_pid_info_as_uid
+EXPORT_SYMBOL_GPL vmlinux 0x24adbf7a	inet_twsk_put
+EXPORT_SYMBOL_GPL vmlinux 0x24cda041	ide_vlb_clk
+EXPORT_SYMBOL_GPL vmlinux 0x24eb7e32	leds_list
+EXPORT_SYMBOL_GPL vmlinux 0x251ccf35	ahash_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0x2537f231	pmac_i2c_get_flags
+EXPORT_SYMBOL_GPL vmlinux 0x25410f38	ide_prep_sense
+EXPORT_SYMBOL_GPL vmlinux 0x254e1861	pm_request_resume
+EXPORT_SYMBOL_GPL vmlinux 0x254e310c	ps3_os_area_flash_register
+EXPORT_SYMBOL_GPL vmlinux 0x25b4d3d8	sysfs_notify_dirent
+EXPORT_SYMBOL_GPL vmlinux 0x25fff4f7	register_pernet_gen_device
+EXPORT_SYMBOL_GPL vmlinux 0x266351cc	mnt_drop_write
+EXPORT_SYMBOL_GPL vmlinux 0x266e29a6	ps3_sys_manager_register_ops
+EXPORT_SYMBOL_GPL vmlinux 0x26ac9d63	setup_irq
+EXPORT_SYMBOL_GPL vmlinux 0x26b5369b	__blkdev_driver_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x26c90ea4	scsi_eh_get_sense
+EXPORT_SYMBOL_GPL vmlinux 0x26deebf8	task_current_syscall
+EXPORT_SYMBOL_GPL vmlinux 0x271fde51	simple_attr_write
+EXPORT_SYMBOL_GPL vmlinux 0x2739ec30	screen_glyph
+EXPORT_SYMBOL_GPL vmlinux 0x27754885	usb_sg_wait
+EXPORT_SYMBOL_GPL vmlinux 0x27adf232	tracing_generic_entry_update
+EXPORT_SYMBOL_GPL vmlinux 0x27d55cd9	of_rescan_bus
+EXPORT_SYMBOL_GPL vmlinux 0x27e4ee22	ata_link_abort
+EXPORT_SYMBOL_GPL vmlinux 0x27e54864	__inet_inherit_port
+EXPORT_SYMBOL_GPL vmlinux 0x27ff79fb	sysfs_create_link
+EXPORT_SYMBOL_GPL vmlinux 0x282f7979	ring_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0x285c5dec	scsi_get_vpd_page
+EXPORT_SYMBOL_GPL vmlinux 0x289e63c1	tcp_register_congestion_control
+EXPORT_SYMBOL_GPL vmlinux 0x28b48f4a	led_trigger_set_default
+EXPORT_SYMBOL_GPL vmlinux 0x28d1e2b7	gpiochip_is_requested
+EXPORT_SYMBOL_GPL vmlinux 0x28d664ff	__raw_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x28e23139	xfrm_probe_algs
+EXPORT_SYMBOL_GPL vmlinux 0x292137d4	device_initialize
+EXPORT_SYMBOL_GPL vmlinux 0x2926a9cb	sysfs_remove_device_from_node
+EXPORT_SYMBOL_GPL vmlinux 0x294809f4	sysdev_store_ulong
+EXPORT_SYMBOL_GPL vmlinux 0x29537e73	cbe_spu_info
+EXPORT_SYMBOL_GPL vmlinux 0x29b58645	ide_pci_setup_ports
+EXPORT_SYMBOL_GPL vmlinux 0x29c32855	crypto_create_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x29d4e1ec	sysfs_schedule_callback
+EXPORT_SYMBOL_GPL vmlinux 0x2a1538ca	lzo1x_decompress_safe
+EXPORT_SYMBOL_GPL vmlinux 0x2a24de95	vfs_cancel_lock
+EXPORT_SYMBOL_GPL vmlinux 0x2a41956b	xattr_getsecurity
+EXPORT_SYMBOL_GPL vmlinux 0x2a678a13	__suspend_report_result
+EXPORT_SYMBOL_GPL vmlinux 0x2abc7adc	free_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0x2b2c5792	tty_perform_flush
+EXPORT_SYMBOL_GPL vmlinux 0x2b616070	crypto_ahash_finup
+EXPORT_SYMBOL_GPL vmlinux 0x2b8d14d9	bus_sort_breadthfirst
+EXPORT_SYMBOL_GPL vmlinux 0x2b977ce8	cpu_add_sysdev_attr
+EXPORT_SYMBOL_GPL vmlinux 0x2b9f8e23	nf_net_ipv4_netfilter_sysctl_path
+EXPORT_SYMBOL_GPL vmlinux 0x2bcaa8e3	flush_work
+EXPORT_SYMBOL_GPL vmlinux 0x2bfc4d7f	tracepoint_get_iter_range
+EXPORT_SYMBOL_GPL vmlinux 0x2c100eba	disk_get_part
+EXPORT_SYMBOL_GPL vmlinux 0x2c208607	power_supply_is_system_supplied
+EXPORT_SYMBOL_GPL vmlinux 0x2c31f4fc	class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x2c34d750	debugfs_rename
+EXPORT_SYMBOL_GPL vmlinux 0x2c7db649	irq_dispose_mapping
+EXPORT_SYMBOL_GPL vmlinux 0x2c8ef6ff	crypto_ablkcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0x2cbee5a8	tty_put_char
+EXPORT_SYMBOL_GPL vmlinux 0x2ce98559	kcrypto_wq
+EXPORT_SYMBOL_GPL vmlinux 0x2d43685b	pm_runtime_idle
+EXPORT_SYMBOL_GPL vmlinux 0x2dc60d6d	scsi_internal_device_block
+EXPORT_SYMBOL_GPL vmlinux 0x2dc87bb7	ata_std_prereset
+EXPORT_SYMBOL_GPL vmlinux 0x2ddbc3a3	transport_class_register
+EXPORT_SYMBOL_GPL vmlinux 0x2e1d1c2e	cpufreq_frequency_table_cpuinfo
+EXPORT_SYMBOL_GPL vmlinux 0x2e1d43cf	lzo1x_1_compress
+EXPORT_SYMBOL_GPL vmlinux 0x2e47f677	xfrm_aalg_get_byidx
+EXPORT_SYMBOL_GPL vmlinux 0x2e90e626	usb_debug_root
+EXPORT_SYMBOL_GPL vmlinux 0x2e919c97	usb_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0x2e948b55	user_match
+EXPORT_SYMBOL_GPL vmlinux 0x2e9b162f	ide_dma_unmap_sg
+EXPORT_SYMBOL_GPL vmlinux 0x2ea1fef1	nf_register_afinfo
+EXPORT_SYMBOL_GPL vmlinux 0x2f114373	fb_sys_read
+EXPORT_SYMBOL_GPL vmlinux 0x2f1802bc	scatterwalk_copychunks
+EXPORT_SYMBOL_GPL vmlinux 0x2f1d59c6	rt_mutex_lock
+EXPORT_SYMBOL_GPL vmlinux 0x2f224517	ring_buffer_reset
+EXPORT_SYMBOL_GPL vmlinux 0x2f47d8c7	cpufreq_frequency_get_table
+EXPORT_SYMBOL_GPL vmlinux 0x2f6b1062	kallsyms_on_each_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x2f70561d	crypto_blkcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0x2fcd9e17	dpm_resume_noirq
+EXPORT_SYMBOL_GPL vmlinux 0x2fd01314	regulator_get_current_limit
+EXPORT_SYMBOL_GPL vmlinux 0x304c530d	pci_test_config_bits
+EXPORT_SYMBOL_GPL vmlinux 0x3055879b	ata_pci_sff_init_host
+EXPORT_SYMBOL_GPL vmlinux 0x306ae8e7	regulator_enable
+EXPORT_SYMBOL_GPL vmlinux 0x307e766d	ring_buffer_iter_reset
+EXPORT_SYMBOL_GPL vmlinux 0x309c07e1	input_ff_erase
+EXPORT_SYMBOL_GPL vmlinux 0x30ea7615	inet6_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x30f4bc53	ide_read_bcount_and_ireason
+EXPORT_SYMBOL_GPL vmlinux 0x311b78c2	ps3_get_spe_id
+EXPORT_SYMBOL_GPL vmlinux 0x31348429	ata_common_sdev_attrs
+EXPORT_SYMBOL_GPL vmlinux 0x31afec64	disk_map_sector_rcu
+EXPORT_SYMBOL_GPL vmlinux 0x31b306e3	ring_buffer_free_read_page
+EXPORT_SYMBOL_GPL vmlinux 0x31dd0e08	pcibios_remove_pci_devices
+EXPORT_SYMBOL_GPL vmlinux 0x31e433a7	usb_get_intf
+EXPORT_SYMBOL_GPL vmlinux 0x31e90fb1	device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x31e954fe	ps3_vuart_port_driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x31f6b4ad	ring_buffer_peek
+EXPORT_SYMBOL_GPL vmlinux 0x31f780ab	find_vpid
+EXPORT_SYMBOL_GPL vmlinux 0x321651ce	platform_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x3225cbb2	spu_associate_mm
+EXPORT_SYMBOL_GPL vmlinux 0x325df705	vfs_setxattr
+EXPORT_SYMBOL_GPL vmlinux 0x3263c5b9	sysfs_create_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0x32acd5cc	rtnl_put_cacheinfo
+EXPORT_SYMBOL_GPL vmlinux 0x32ca497b	inotify_init_watch
+EXPORT_SYMBOL_GPL vmlinux 0x32d5e7fc	xfrm_aalg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x32e0eeb9	platform_device_del
+EXPORT_SYMBOL_GPL vmlinux 0x32f17454	ring_buffer_event_data
+EXPORT_SYMBOL_GPL vmlinux 0x3309ea64	ps3av_audio_mute
+EXPORT_SYMBOL_GPL vmlinux 0x330b0653	pcibios_map_io_space
+EXPORT_SYMBOL_GPL vmlinux 0x33621e3f	ide_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x33a6742c	ata_port_desc
+EXPORT_SYMBOL_GPL vmlinux 0x33fe4be3	eventfd_ctx_get
+EXPORT_SYMBOL_GPL vmlinux 0x34275124	trace_current_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0x34292dfe	regulator_get_exclusive
+EXPORT_SYMBOL_GPL vmlinux 0x343e3aa6	alloc_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0x3441c3d6	gpio_set_value_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x344a7f10	ring_buffer_record_disable_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x3476bd99	device_register
+EXPORT_SYMBOL_GPL vmlinux 0x3477d447	fb_deferred_io_open
+EXPORT_SYMBOL_GPL vmlinux 0x349ea1eb	ata_scsi_simulate
+EXPORT_SYMBOL_GPL vmlinux 0x34f4cb2e	crypto_unregister_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0x35589168	devres_remove
+EXPORT_SYMBOL_GPL vmlinux 0x3577ede3	platform_get_resource
+EXPORT_SYMBOL_GPL vmlinux 0x35d8c94a	sdev_evt_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x361e2bcc	save_stack_trace
+EXPORT_SYMBOL_GPL vmlinux 0x362e23ec	call_rcu_bh
+EXPORT_SYMBOL_GPL vmlinux 0x369f3b52	driver_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x36a58bb1	tty_prepare_flip_string_flags
+EXPORT_SYMBOL_GPL vmlinux 0x36d0f122	input_ff_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x3721bcc3	ata_cable_ignore
+EXPORT_SYMBOL_GPL vmlinux 0x3739be79	vfs_test_lock
+EXPORT_SYMBOL_GPL vmlinux 0x375d051e	da903x_set_bits
+EXPORT_SYMBOL_GPL vmlinux 0x376306d1	blk_abort_request
+EXPORT_SYMBOL_GPL vmlinux 0x37738b97	put_device
+EXPORT_SYMBOL_GPL vmlinux 0x37ad4176	__tracepoint_block_bio_complete
+EXPORT_SYMBOL_GPL vmlinux 0x37b2e22e	inet_csk_route_req
+EXPORT_SYMBOL_GPL vmlinux 0x37c72359	usb_put_dev
+EXPORT_SYMBOL_GPL vmlinux 0x382aec18	__inet_twsk_hashdance
+EXPORT_SYMBOL_GPL vmlinux 0x3866db94	crypto_alloc_shash
+EXPORT_SYMBOL_GPL vmlinux 0x386e6165	of_irq_map_pci
+EXPORT_SYMBOL_GPL vmlinux 0x3884953a	ring_buffer_size
+EXPORT_SYMBOL_GPL vmlinux 0x389d353a	ide_unregister_region
+EXPORT_SYMBOL_GPL vmlinux 0x38a83c50	hrtimer_try_to_cancel
+EXPORT_SYMBOL_GPL vmlinux 0x38c0fa71	debugfs_create_u16
+EXPORT_SYMBOL_GPL vmlinux 0x391e1f08	ide_device_get
+EXPORT_SYMBOL_GPL vmlinux 0x39d51f1d	pm_request_idle
+EXPORT_SYMBOL_GPL vmlinux 0x3a0757d3	da903x_update
+EXPORT_SYMBOL_GPL vmlinux 0x3a159e41	synchronize_srcu
+EXPORT_SYMBOL_GPL vmlinux 0x3a61f3d1	xfrm_audit_policy_delete
+EXPORT_SYMBOL_GPL vmlinux 0x3a723c15	klist_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0x3a74af13	crypto_ahash_type
+EXPORT_SYMBOL_GPL vmlinux 0x3a9b5c37	__mnt_is_readonly
+EXPORT_SYMBOL_GPL vmlinux 0x3b1c5afc	ps3_vuart_irq_setup
+EXPORT_SYMBOL_GPL vmlinux 0x3b5a2604	platform_get_irq_byname
+EXPORT_SYMBOL_GPL vmlinux 0x3b5ba5d8	crypto_init_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x3ba85f37	usb_unpoison_urb
+EXPORT_SYMBOL_GPL vmlinux 0x3ba96e36	inet_twsk_purge
+EXPORT_SYMBOL_GPL vmlinux 0x3be7af02	get_max_files
+EXPORT_SYMBOL_GPL vmlinux 0x3be89d3c	usb_register_notify
+EXPORT_SYMBOL_GPL vmlinux 0x3c06d6c9	raw_seq_open
+EXPORT_SYMBOL_GPL vmlinux 0x3c11991a	pmf_register_irq_client
+EXPORT_SYMBOL_GPL vmlinux 0x3c2cd97d	srcu_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x3c6c45ca	__tracepoint_power_frequency
+EXPORT_SYMBOL_GPL vmlinux 0x3c942368	profile_event_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x3cd06035	add_input_randomness
+EXPORT_SYMBOL_GPL vmlinux 0x3cd6cfb6	sysdev_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x3cd9b91c	pci_intx
+EXPORT_SYMBOL_GPL vmlinux 0x3cfdfae5	trace_current_buffer_discard_commit
+EXPORT_SYMBOL_GPL vmlinux 0x3cfedb3f	register_pm_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x3d17a676	skb_segment
+EXPORT_SYMBOL_GPL vmlinux 0x3d22a388	__fsnotify_parent
+EXPORT_SYMBOL_GPL vmlinux 0x3d27227a	pci_add_dynid
+EXPORT_SYMBOL_GPL vmlinux 0x3d388324	dpm_resume_end
+EXPORT_SYMBOL_GPL vmlinux 0x3d446f33	__audit_inode_child
+EXPORT_SYMBOL_GPL vmlinux 0x3dbb56e9	anon_inode_getfd
+EXPORT_SYMBOL_GPL vmlinux 0x3dccbe67	__atomic_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x3e1fd5c3	pmf_call_one
+EXPORT_SYMBOL_GPL vmlinux 0x3e5e3bf2	ata_sff_wait_ready
+EXPORT_SYMBOL_GPL vmlinux 0x3eb9bcb6	page_mkclean
+EXPORT_SYMBOL_GPL vmlinux 0x3ec042c9	da903x_writes
+EXPORT_SYMBOL_GPL vmlinux 0x3ee6e515	pci_slots_kset
+EXPORT_SYMBOL_GPL vmlinux 0x3efb35c9	get_online_cpus
+EXPORT_SYMBOL_GPL vmlinux 0x3f238101	dcookie_register
+EXPORT_SYMBOL_GPL vmlinux 0x3f3931d1	sysfs_remove_group
+EXPORT_SYMBOL_GPL vmlinux 0x3f427c8c	ide_get_best_pio_mode
+EXPORT_SYMBOL_GPL vmlinux 0x3f8689d2	ata_port_abort
+EXPORT_SYMBOL_GPL vmlinux 0x3f9f164c	crypto_init_shash_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x4027913d	ring_buffer_overrun_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x40af0dec	ata_xfer_mode2mask
+EXPORT_SYMBOL_GPL vmlinux 0x40afc938	usb_reset_configuration
+EXPORT_SYMBOL_GPL vmlinux 0x40c54fcd	enable_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0x413c4b7b	usb_sg_init
+EXPORT_SYMBOL_GPL vmlinux 0x4141fed6	usb_buffer_unmap_sg
+EXPORT_SYMBOL_GPL vmlinux 0x414c72f2	fuse_direct_io
+EXPORT_SYMBOL_GPL vmlinux 0x41c4ac49	bus_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x41fd80d5	ps3_system_bus_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x42494cea	ring_buffer_event_length
+EXPORT_SYMBOL_GPL vmlinux 0x427923d4	spi_alloc_device
+EXPORT_SYMBOL_GPL vmlinux 0x42886722	pcie_port_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x42fc1eef	ring_buffer_read_page
+EXPORT_SYMBOL_GPL vmlinux 0x430f8420	usb_create_hcd
+EXPORT_SYMBOL_GPL vmlinux 0x432c2ae7	regulator_get_init_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0x432fd7f6	__gpio_set_value
+EXPORT_SYMBOL_GPL vmlinux 0x4360f05c	transport_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x437d8a8f	ide_init_disk
+EXPORT_SYMBOL_GPL vmlinux 0x43d88c30	power_supply_set_battery_charged
+EXPORT_SYMBOL_GPL vmlinux 0x43f18e18	crypto_register_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0x43f56e82	ata_xfer_mode2shift
+EXPORT_SYMBOL_GPL vmlinux 0x43f896ed	remove_irq
+EXPORT_SYMBOL_GPL vmlinux 0x44075beb	sata_link_hardreset
+EXPORT_SYMBOL_GPL vmlinux 0x440a4f0b	crypto_init_spawn2
+EXPORT_SYMBOL_GPL vmlinux 0x4414eca7	rtc_update_irq_enable
+EXPORT_SYMBOL_GPL vmlinux 0x44571c9e	ata_link_online
+EXPORT_SYMBOL_GPL vmlinux 0x447b088e	inet_hash_connect
+EXPORT_SYMBOL_GPL vmlinux 0x4484a5a4	wait_for_device_probe
+EXPORT_SYMBOL_GPL vmlinux 0x449c2de0	ata_pci_device_do_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x44a65d5c	lock_policy_rwsem_read
+EXPORT_SYMBOL_GPL vmlinux 0x44bf4980	pci_disable_pcie_error_reporting
+EXPORT_SYMBOL_GPL vmlinux 0x45006acd	ring_buffer_commit_overrun_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x45346863	__root_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x45438bc2	spu_priv1_ops
+EXPORT_SYMBOL_GPL vmlinux 0x454df0b6	attribute_container_find_class_device
+EXPORT_SYMBOL_GPL vmlinux 0x457594fa	crypto_alg_list
+EXPORT_SYMBOL_GPL vmlinux 0x45bf1ff3	crypto_inc
+EXPORT_SYMBOL_GPL vmlinux 0x45ebbc47	platform_add_devices
+EXPORT_SYMBOL_GPL vmlinux 0x45f9d341	srcu_read_unlock
+EXPORT_SYMBOL_GPL vmlinux 0x460520f8	device_create
+EXPORT_SYMBOL_GPL vmlinux 0x46625800	spu_setup_kernel_slbs
+EXPORT_SYMBOL_GPL vmlinux 0x4672e88b	__crypto_dequeue_request
+EXPORT_SYMBOL_GPL vmlinux 0x467418f2	class_dev_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0x46c66fc0	driver_for_each_device
+EXPORT_SYMBOL_GPL vmlinux 0x46d9f955	ps3_irq_plug_setup
+EXPORT_SYMBOL_GPL vmlinux 0x47229b5c	gpio_request
+EXPORT_SYMBOL_GPL vmlinux 0x4741db42	ps3av_set_audio_mode
+EXPORT_SYMBOL_GPL vmlinux 0x4750bec0	ata_sff_tf_load
+EXPORT_SYMBOL_GPL vmlinux 0x47657ad5	led_trigger_register
+EXPORT_SYMBOL_GPL vmlinux 0x478bf381	spi_sync
+EXPORT_SYMBOL_GPL vmlinux 0x47acddea	ps3_sys_manager_set_wol
+EXPORT_SYMBOL_GPL vmlinux 0x47b702cc	device_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x47e8edde	generic_fh_to_parent
+EXPORT_SYMBOL_GPL vmlinux 0x482933d4	ide_timing_compute
+EXPORT_SYMBOL_GPL vmlinux 0x483177c5	i2c_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x48362971	class_dev_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0x4856fe99	scsi_target_unblock
+EXPORT_SYMBOL_GPL vmlinux 0x486ced2e	crypto_alloc_ablkcipher
+EXPORT_SYMBOL_GPL vmlinux 0x48be2c02	shash_ahash_finup
+EXPORT_SYMBOL_GPL vmlinux 0x48e9eeb3	ide_host_add
+EXPORT_SYMBOL_GPL vmlinux 0x48ff07d7	skb_to_sgvec
+EXPORT_SYMBOL_GPL vmlinux 0x4958e789	rtc_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x499043d3	crypto_init_queue
+EXPORT_SYMBOL_GPL vmlinux 0x49b78fca	ata_base_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x49c08b21	fixed_phy_set_link_update
+EXPORT_SYMBOL_GPL vmlinux 0x49c3512f	crypto_larval_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x4a04ff75	bd_claim_by_disk
+EXPORT_SYMBOL_GPL vmlinux 0x4a9ed4bf	usb_wait_anchor_empty_timeout
+EXPORT_SYMBOL_GPL vmlinux 0x4aa241be	ata_pci_device_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x4abaf37d	pci_restore_msi_state
+EXPORT_SYMBOL_GPL vmlinux 0x4adeb863	securityfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x4af006c6	ahash_free_instance
+EXPORT_SYMBOL_GPL vmlinux 0x4b700a97	usb_put_hcd
+EXPORT_SYMBOL_GPL vmlinux 0x4bad3169	invalidate_inode_pages2
+EXPORT_SYMBOL_GPL vmlinux 0x4bcc89ce	__crypto_alloc_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x4be20186	ide_tf_load
+EXPORT_SYMBOL_GPL vmlinux 0x4be757cf	pci_bus_max_busnr
+EXPORT_SYMBOL_GPL vmlinux 0x4c178fd6	shash_free_instance
+EXPORT_SYMBOL_GPL vmlinux 0x4c18f773	ps3_os_area_set_rtc_diff
+EXPORT_SYMBOL_GPL vmlinux 0x4c3f3414	__remove_pages
+EXPORT_SYMBOL_GPL vmlinux 0x4c5c6785	__inet_lookup_established
+EXPORT_SYMBOL_GPL vmlinux 0x4c759827	byte_rev_table
+EXPORT_SYMBOL_GPL vmlinux 0x4c7abaa6	cpufreq_driver_target
+EXPORT_SYMBOL_GPL vmlinux 0x4ce96145	regulator_set_optimum_mode
+EXPORT_SYMBOL_GPL vmlinux 0x4cf0712b	inet_csk_reqsk_queue_hash_add
+EXPORT_SYMBOL_GPL vmlinux 0x4d0c00eb	pm_runtime_resume
+EXPORT_SYMBOL_GPL vmlinux 0x4d41592c	blocking_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x4d760dca	input_class
+EXPORT_SYMBOL_GPL vmlinux 0x4d8f4c15	klist_add_before
+EXPORT_SYMBOL_GPL vmlinux 0x4d8ff5e2	sata_scr_read
+EXPORT_SYMBOL_GPL vmlinux 0x4d980c85	ata_sff_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x4dbbcfe8	ata_sff_softreset
+EXPORT_SYMBOL_GPL vmlinux 0x4dc3109a	fb_deferred_io_fsync
+EXPORT_SYMBOL_GPL vmlinux 0x4deb38fd	tty_buffer_request_room
+EXPORT_SYMBOL_GPL vmlinux 0x4e03906d	skb_icv_walk
+EXPORT_SYMBOL_GPL vmlinux 0x4e3295ec	ata_dev_pair
+EXPORT_SYMBOL_GPL vmlinux 0x4e4c7069	usb_hcd_resume_root_hub
+EXPORT_SYMBOL_GPL vmlinux 0x4e640f83	tty_encode_baud_rate
+EXPORT_SYMBOL_GPL vmlinux 0x4e8f2cc0	usb_add_hcd
+EXPORT_SYMBOL_GPL vmlinux 0x4eebc074	spi_alloc_master
+EXPORT_SYMBOL_GPL vmlinux 0x4ef745c5	get_driver
+EXPORT_SYMBOL_GPL vmlinux 0x4f2bd13d	seq_open_net
+EXPORT_SYMBOL_GPL vmlinux 0x4faa6cec	regulator_set_mode
+EXPORT_SYMBOL_GPL vmlinux 0x4fd1364b	queue_work
+EXPORT_SYMBOL_GPL vmlinux 0x4fd7b270	ps3_vuart_cancel_async
+EXPORT_SYMBOL_GPL vmlinux 0x4fdc945d	sata_deb_timing_normal
+EXPORT_SYMBOL_GPL vmlinux 0x4ffb463a	blk_trace_remove
+EXPORT_SYMBOL_GPL vmlinux 0x50146af6	devres_close_group
+EXPORT_SYMBOL_GPL vmlinux 0x507ae8c7	spu_get_profile_private_kref
+EXPORT_SYMBOL_GPL vmlinux 0x507de8c6	add_memory
+EXPORT_SYMBOL_GPL vmlinux 0x5086ac3a	alg_test
+EXPORT_SYMBOL_GPL vmlinux 0x508916c9	usb_put_intf
+EXPORT_SYMBOL_GPL vmlinux 0x50cd2eac	class_compat_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x50e7193a	__i2c_first_dynamic_bus_num
+EXPORT_SYMBOL_GPL vmlinux 0x50f5e532	call_rcu_sched
+EXPORT_SYMBOL_GPL vmlinux 0x50fad434	round_jiffies_up
+EXPORT_SYMBOL_GPL vmlinux 0x51208f92	blk_queue_rq_timed_out
+EXPORT_SYMBOL_GPL vmlinux 0x5148495d	mmput
+EXPORT_SYMBOL_GPL vmlinux 0x514cd834	platform_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x51a10425	crypto_unregister_alg
+EXPORT_SYMBOL_GPL vmlinux 0x52191d51	unregister_jprobes
+EXPORT_SYMBOL_GPL vmlinux 0x5244fec3	devres_add
+EXPORT_SYMBOL_GPL vmlinux 0x525acd28	regulator_get_mode
+EXPORT_SYMBOL_GPL vmlinux 0x52759f74	ata_port_freeze
+EXPORT_SYMBOL_GPL vmlinux 0x5297e0aa	inet_csk_get_port
+EXPORT_SYMBOL_GPL vmlinux 0x52d111ea	pm_qos_update_requirement
+EXPORT_SYMBOL_GPL vmlinux 0x52eec39b	crypto_find_alg
+EXPORT_SYMBOL_GPL vmlinux 0x52f2769a	tty_mode_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x5324d04f	bstr_printf
+EXPORT_SYMBOL_GPL vmlinux 0x532add2a	hrtimer_get_remaining
+EXPORT_SYMBOL_GPL vmlinux 0x53614269	get_cpu_idle_time_us
+EXPORT_SYMBOL_GPL vmlinux 0x5376721f	sata_pmp_error_handler
+EXPORT_SYMBOL_GPL vmlinux 0x53986488	register_die_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x539e231d	scsi_flush_work
+EXPORT_SYMBOL_GPL vmlinux 0x53d302ad	shash_attr_alg
+EXPORT_SYMBOL_GPL vmlinux 0x5405cc88	hrtimer_start_range_ns
+EXPORT_SYMBOL_GPL vmlinux 0x543d2e70	klist_add_head
+EXPORT_SYMBOL_GPL vmlinux 0x5460c8d8	fsnotify_get_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x549525ef	handle_nested_irq
+EXPORT_SYMBOL_GPL vmlinux 0x55135234	ps3_vuart_read_async
+EXPORT_SYMBOL_GPL vmlinux 0x55514975	xfrm_audit_state_notfound
+EXPORT_SYMBOL_GPL vmlinux 0x5552bc55	add_timer_on
+EXPORT_SYMBOL_GPL vmlinux 0x55624795	lookup_create
+EXPORT_SYMBOL_GPL vmlinux 0x556efbcc	ata_port_start
+EXPORT_SYMBOL_GPL vmlinux 0x558520d1	devres_open_group
+EXPORT_SYMBOL_GPL vmlinux 0x55f2580b	__alloc_percpu
+EXPORT_SYMBOL_GPL vmlinux 0x562cf6d0	driver_add_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x56310925	regulator_mode_to_status
+EXPORT_SYMBOL_GPL vmlinux 0x563fb5c8	__trace_bprintk
+EXPORT_SYMBOL_GPL vmlinux 0x568e2b71	__inet_hash_nolisten
+EXPORT_SYMBOL_GPL vmlinux 0x56970ae5	fib_rules_register
+EXPORT_SYMBOL_GPL vmlinux 0x5699caa9	fuse_request_send_background
+EXPORT_SYMBOL_GPL vmlinux 0x56ad5ac0	raw_unhash_sk
+EXPORT_SYMBOL_GPL vmlinux 0x56c7b48c	unregister_pernet_subsys
+EXPORT_SYMBOL_GPL vmlinux 0x56d81917	map_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0x56dfde23	crypto_tfm_in_queue
+EXPORT_SYMBOL_GPL vmlinux 0x57022ce8	ring_buffer_record_enable_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x5704276d	debugfs_create_bool
+EXPORT_SYMBOL_GPL vmlinux 0x57732a1b	cpufreq_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0x57842929	eventfd_ctx_fileget
+EXPORT_SYMBOL_GPL vmlinux 0x579a892f	crypto_spawn_tfm2
+EXPORT_SYMBOL_GPL vmlinux 0x579e0bf5	rtnl_unregister_all
+EXPORT_SYMBOL_GPL vmlinux 0x57c49357	debugfs_create_blob
+EXPORT_SYMBOL_GPL vmlinux 0x580460f1	ide_pci_init_two
+EXPORT_SYMBOL_GPL vmlinux 0x58197116	aead_geniv_exit
+EXPORT_SYMBOL_GPL vmlinux 0x583284a1	__class_create
+EXPORT_SYMBOL_GPL vmlinux 0x58521f79	ata_sff_data_xfer
+EXPORT_SYMBOL_GPL vmlinux 0x585b4f76	blocking_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x5876a9e2	driver_find_device
+EXPORT_SYMBOL_GPL vmlinux 0x5892f832	release_pmc_hardware
+EXPORT_SYMBOL_GPL vmlinux 0x5924af2c	ata_wait_after_reset
+EXPORT_SYMBOL_GPL vmlinux 0x5956d245	ide_retry_pc
+EXPORT_SYMBOL_GPL vmlinux 0x59626159	ide_pci_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x59afcff8	firmware_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x59f6e235	debugfs_remove
+EXPORT_SYMBOL_GPL vmlinux 0x5a18337b	blkdev_aio_write
+EXPORT_SYMBOL_GPL vmlinux 0x5a29b941	blk_add_driver_data
+EXPORT_SYMBOL_GPL vmlinux 0x5a7bfe41	crypto_probing_notify
+EXPORT_SYMBOL_GPL vmlinux 0x5ae1b0e7	each_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x5b306100	klist_init
+EXPORT_SYMBOL_GPL vmlinux 0x5b44b02e	sata_link_resume
+EXPORT_SYMBOL_GPL vmlinux 0x5b57e8dd	spu_management_ops
+EXPORT_SYMBOL_GPL vmlinux 0x5b5d765f	driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x5b783ef6	raw_seq_next
+EXPORT_SYMBOL_GPL vmlinux 0x5b823e85	ide_set_pio
+EXPORT_SYMBOL_GPL vmlinux 0x5bb730c2	tracepoint_iter_reset
+EXPORT_SYMBOL_GPL vmlinux 0x5bfc03c3	unregister_keyboard_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5c00f900	regulator_bulk_free
+EXPORT_SYMBOL_GPL vmlinux 0x5c0a5ee4	dev_attr_link_power_management_policy
+EXPORT_SYMBOL_GPL vmlinux 0x5c175b2e	rt_mutex_unlock
+EXPORT_SYMBOL_GPL vmlinux 0x5c342015	do_rw_taskfile
+EXPORT_SYMBOL_GPL vmlinux 0x5c776bf6	fb_ddc_read
+EXPORT_SYMBOL_GPL vmlinux 0x5c9a3517	da903x_read
+EXPORT_SYMBOL_GPL vmlinux 0x5cb698ad	ata_sff_error_handler
+EXPORT_SYMBOL_GPL vmlinux 0x5cd2e48f	shash_ahash_update
+EXPORT_SYMBOL_GPL vmlinux 0x5cd828fa	fb_bl_default_curve
+EXPORT_SYMBOL_GPL vmlinux 0x5ce49499	raw_hash_sk
+EXPORT_SYMBOL_GPL vmlinux 0x5d0f6f57	kbd_table
+EXPORT_SYMBOL_GPL vmlinux 0x5d5d5bc4	spi_register_master
+EXPORT_SYMBOL_GPL vmlinux 0x5d730e7b	raw_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x5d753a60	tcp_reno_min_cwnd
+EXPORT_SYMBOL_GPL vmlinux 0x5d81d240	dev_change_net_namespace
+EXPORT_SYMBOL_GPL vmlinux 0x5d8a8968	ring_buffer_entries_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x5d973cd0	get_task_mm
+EXPORT_SYMBOL_GPL vmlinux 0x5dd67618	register_netevent_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5dee2fe8	debugfs_create_u64
+EXPORT_SYMBOL_GPL vmlinux 0x5df2d982	set_task_ioprio
+EXPORT_SYMBOL_GPL vmlinux 0x5e64ba0e	dev_set_name
+EXPORT_SYMBOL_GPL vmlinux 0x5e769986	ps3_os_area_get_av_multi_out
+EXPORT_SYMBOL_GPL vmlinux 0x5e878658	ide_read_status
+EXPORT_SYMBOL_GPL vmlinux 0x5ee7542e	reserve_pmc_hardware
+EXPORT_SYMBOL_GPL vmlinux 0x5f3ba09a	__create_workqueue_key
+EXPORT_SYMBOL_GPL vmlinux 0x5f461a56	inet_csk_listen_start
+EXPORT_SYMBOL_GPL vmlinux 0x5f535dc0	driver_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x5f664da6	pci_enable_rom
+EXPORT_SYMBOL_GPL vmlinux 0x5fcdec5d	xfrm_ealg_get_byidx
+EXPORT_SYMBOL_GPL vmlinux 0x5fd322f6	sysdev_register
+EXPORT_SYMBOL_GPL vmlinux 0x5ffd8a58	platform_device_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x601c0775	ide_dma_sff_timer_expiry
+EXPORT_SYMBOL_GPL vmlinux 0x6035c616	__blk_put_request
+EXPORT_SYMBOL_GPL vmlinux 0x6042eaa2	ide_map_sg
+EXPORT_SYMBOL_GPL vmlinux 0x609266bc	of_scan_bus
+EXPORT_SYMBOL_GPL vmlinux 0x60a13e90	rcu_barrier
+EXPORT_SYMBOL_GPL vmlinux 0x60a32ea9	pm_power_off
+EXPORT_SYMBOL_GPL vmlinux 0x60d34857	cleanup_srcu_struct
+EXPORT_SYMBOL_GPL vmlinux 0x60dbcb3e	cpufreq_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0x60f70e66	usb_reset_endpoint
+EXPORT_SYMBOL_GPL vmlinux 0x61451fc2	ata_sff_exec_command
+EXPORT_SYMBOL_GPL vmlinux 0x6173aadd	regulator_list_voltage
+EXPORT_SYMBOL_GPL vmlinux 0x61bff36f	ide_output_data
+EXPORT_SYMBOL_GPL vmlinux 0x628ecdc7	driver_register
+EXPORT_SYMBOL_GPL vmlinux 0x629a7f6e	do_posix_clock_nonanosleep
+EXPORT_SYMBOL_GPL vmlinux 0x631238f0	vfs_kern_mount
+EXPORT_SYMBOL_GPL vmlinux 0x6315a335	sysdev_driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x631725de	pci_renumber_slot
+EXPORT_SYMBOL_GPL vmlinux 0x6377d40c	register_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0x63d1d047	spu_invalidate_slbs
+EXPORT_SYMBOL_GPL vmlinux 0x63f4dc09	bprintf
+EXPORT_SYMBOL_GPL vmlinux 0x63f80b12	sysdev_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x64559db1	ring_buffer_swap_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x648c6e09	unregister_net_sysctl_table
+EXPORT_SYMBOL_GPL vmlinux 0x64a43692	class_interface_register
+EXPORT_SYMBOL_GPL vmlinux 0x64ebbcd1	ata_sff_qc_fill_rtf
+EXPORT_SYMBOL_GPL vmlinux 0x64fba4b8	inverse_translate
+EXPORT_SYMBOL_GPL vmlinux 0x654c49e2	aer_irq
+EXPORT_SYMBOL_GPL vmlinux 0x65abdc4a	usb_buffer_free
+EXPORT_SYMBOL_GPL vmlinux 0x65bbbc78	schedule_hrtimeout_range
+EXPORT_SYMBOL_GPL vmlinux 0x65ccb6f0	call_netevent_notifiers
+EXPORT_SYMBOL_GPL vmlinux 0x65d6d0f0	gpio_direction_input
+EXPORT_SYMBOL_GPL vmlinux 0x65e3f147	ide_dma_lost_irq
+EXPORT_SYMBOL_GPL vmlinux 0x65e54015	ata_sff_drain_fifo
+EXPORT_SYMBOL_GPL vmlinux 0x66050a75	ata_sff_port_start32
+EXPORT_SYMBOL_GPL vmlinux 0x660a2183	queue_work_on
+EXPORT_SYMBOL_GPL vmlinux 0x661601de	sprint_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x661bf76e	__cpufreq_driver_getavg
+EXPORT_SYMBOL_GPL vmlinux 0x6651fef2	__ata_ehi_push_desc
+EXPORT_SYMBOL_GPL vmlinux 0x667a812c	ps3av_set_video_mode
+EXPORT_SYMBOL_GPL vmlinux 0x668402aa	crypto_put_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x66b2a859	nr_free_buffer_pages
+EXPORT_SYMBOL_GPL vmlinux 0x66d87d38	symbol_put_addr
+EXPORT_SYMBOL_GPL vmlinux 0x67040124	inet_csk_reqsk_queue_prune
+EXPORT_SYMBOL_GPL vmlinux 0x6720c26f	spi_add_device
+EXPORT_SYMBOL_GPL vmlinux 0x672bfe51	usb_anchor_urb
+EXPORT_SYMBOL_GPL vmlinux 0x672cdfad	__lock_page_killable
+EXPORT_SYMBOL_GPL vmlinux 0x67362d24	scsi_target_block
+EXPORT_SYMBOL_GPL vmlinux 0x675162d6	inet_ctl_sock_create
+EXPORT_SYMBOL_GPL vmlinux 0x675c46b2	vfs_removexattr
+EXPORT_SYMBOL_GPL vmlinux 0x67955ce6	profile_hits
+EXPORT_SYMBOL_GPL vmlinux 0x67d57669	ide_dma_setup
+EXPORT_SYMBOL_GPL vmlinux 0x681daccc	tty_init_termios
+EXPORT_SYMBOL_GPL vmlinux 0x682a0691	usb_set_device_state
+EXPORT_SYMBOL_GPL vmlinux 0x685c0a98	ide_pci_remove
+EXPORT_SYMBOL_GPL vmlinux 0x686c703f	xfrm_count_auth_supported
+EXPORT_SYMBOL_GPL vmlinux 0x6892088c	unregister_pm_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x68cc433f	ata_std_postreset
+EXPORT_SYMBOL_GPL vmlinux 0x6901119a	trace_nowake_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0x69521d41	dm_underlying_device_busy
+EXPORT_SYMBOL_GPL vmlinux 0x69a9b215	skb_cow_data
+EXPORT_SYMBOL_GPL vmlinux 0x69e9a2cb	ata_scsi_slave_config
+EXPORT_SYMBOL_GPL vmlinux 0x6a142cc0	regulator_get_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0x6a1c1925	ring_buffer_empty
+EXPORT_SYMBOL_GPL vmlinux 0x6a2b2ad4	invalidate_inode_pages2_range
+EXPORT_SYMBOL_GPL vmlinux 0x6a8975de	__rt_mutex_init
+EXPORT_SYMBOL_GPL vmlinux 0x6ac8a9ce	tcp_unregister_congestion_control
+EXPORT_SYMBOL_GPL vmlinux 0x6acb8d84	ppc64_caches
+EXPORT_SYMBOL_GPL vmlinux 0x6b13e6c5	nf_unregister_afinfo
+EXPORT_SYMBOL_GPL vmlinux 0x6b308770	regulator_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x6b31d020	pmf_put_function
+EXPORT_SYMBOL_GPL vmlinux 0x6b46802b	eeh_add_device_tree_early
+EXPORT_SYMBOL_GPL vmlinux 0x6b7f405f	crypto_givcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0x6b803ed3	skb_partial_csum_set
+EXPORT_SYMBOL_GPL vmlinux 0x6b8bac80	inode_add_to_lists
+EXPORT_SYMBOL_GPL vmlinux 0x6b94eca3	ata_eh_thaw_port
+EXPORT_SYMBOL_GPL vmlinux 0x6be62dfd	probe_kernel_read
+EXPORT_SYMBOL_GPL vmlinux 0x6c3abe45	ps3_vuart_write
+EXPORT_SYMBOL_GPL vmlinux 0x6c49c4f2	clockevents_notify
+EXPORT_SYMBOL_GPL vmlinux 0x6c530b3c	bus_get_kset
+EXPORT_SYMBOL_GPL vmlinux 0x6c72d963	ide_dma_test_irq
+EXPORT_SYMBOL_GPL vmlinux 0x6c766ca4	devres_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x6c886e75	ps3_system_bus_driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x6c8d5ae8	__gpio_get_value
+EXPORT_SYMBOL_GPL vmlinux 0x6c8eb98f	xfrm_aalg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0x6c95a5a7	ring_buffer_discard_commit
+EXPORT_SYMBOL_GPL vmlinux 0x6c9968be	tracepoint_iter_start
+EXPORT_SYMBOL_GPL vmlinux 0x6c99f8ab	relay_buf_full
+EXPORT_SYMBOL_GPL vmlinux 0x6cd75481	vfs_getxattr
+EXPORT_SYMBOL_GPL vmlinux 0x6d2fc5a6	net_namespace_list
+EXPORT_SYMBOL_GPL vmlinux 0x6d7b2cbf	xfrm_audit_state_add
+EXPORT_SYMBOL_GPL vmlinux 0x6db36e44	skcipher_geniv_free
+EXPORT_SYMBOL_GPL vmlinux 0x6db95a45	rtnl_link_register
+EXPORT_SYMBOL_GPL vmlinux 0x6e02980e	class_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x6e224a18	ring_buffer_alloc_read_page
+EXPORT_SYMBOL_GPL vmlinux 0x6e69d578	fuse_abort_conn
+EXPORT_SYMBOL_GPL vmlinux 0x6e6bc85a	led_classdev_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x6e7474fc	xfrm_ealg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x6ea2f845	queue_delayed_work_on
+EXPORT_SYMBOL_GPL vmlinux 0x6ed07b64	add_to_page_cache_lru
+EXPORT_SYMBOL_GPL vmlinux 0x6ee50465	usb_store_new_id
+EXPORT_SYMBOL_GPL vmlinux 0x6eecae31	pci_destroy_slot
+EXPORT_SYMBOL_GPL vmlinux 0x6f5fe8de	debugfs_remove_recursive
+EXPORT_SYMBOL_GPL vmlinux 0x6f972a8a	tty_find_polling_driver
+EXPORT_SYMBOL_GPL vmlinux 0x6fbf3825	disk_part_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0x6fe3d8cf	ktime_add_safe
+EXPORT_SYMBOL_GPL vmlinux 0x6fec98ff	cpufreq_register_governor
+EXPORT_SYMBOL_GPL vmlinux 0x6ff45be0	devres_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x6ff607b6	crypto_get_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x706b3a33	cpufreq_frequency_table_get_attr
+EXPORT_SYMBOL_GPL vmlinux 0x707fef6e	usb_poison_urb
+EXPORT_SYMBOL_GPL vmlinux 0x707ff1bb	ata_xfer_mask2mode
+EXPORT_SYMBOL_GPL vmlinux 0x70ad3fc6	remove_memory
+EXPORT_SYMBOL_GPL vmlinux 0x70dfe402	pci_ioremap_bar
+EXPORT_SYMBOL_GPL vmlinux 0x715157ae	dm_requeue_unmapped_request
+EXPORT_SYMBOL_GPL vmlinux 0x716265c7	debugfs_initialized
+EXPORT_SYMBOL_GPL vmlinux 0x71869ed9	klist_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0x71917bb9	sock_prot_inuse_add
+EXPORT_SYMBOL_GPL vmlinux 0x719bd1cf	ata_sas_port_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x71a3ea9a	sysfs_put
+EXPORT_SYMBOL_GPL vmlinux 0x71c3ea49	inotify_inode_queue_event
+EXPORT_SYMBOL_GPL vmlinux 0x71c8bc95	kgdb_unregister_io_module
+EXPORT_SYMBOL_GPL vmlinux 0x71f43a33	i2c_new_probed_device
+EXPORT_SYMBOL_GPL vmlinux 0x72741f25	trace_vbprintk
+EXPORT_SYMBOL_GPL vmlinux 0x7278d328	all_vm_events
+EXPORT_SYMBOL_GPL vmlinux 0x72c8b83e	ide_check_atapi_device
+EXPORT_SYMBOL_GPL vmlinux 0x72e03bae	stop_machine_create
+EXPORT_SYMBOL_GPL vmlinux 0x730ebe7e	ide_issue_pc
+EXPORT_SYMBOL_GPL vmlinux 0x7340fa2a	usb_buffer_map_sg
+EXPORT_SYMBOL_GPL vmlinux 0x73a48b4a	ata_sff_std_ports
+EXPORT_SYMBOL_GPL vmlinux 0x73c42b7c	ata_pio_queue_task
+EXPORT_SYMBOL_GPL vmlinux 0x73cc4ea9	find_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x7421d52a	__hvc_resize
+EXPORT_SYMBOL_GPL vmlinux 0x743a165e	ata_pack_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0x74abdafa	task_handoff_register
+EXPORT_SYMBOL_GPL vmlinux 0x74acc925	i2c_unregister_device
+EXPORT_SYMBOL_GPL vmlinux 0x74baf17a	tracing_is_on
+EXPORT_SYMBOL_GPL vmlinux 0x74f1279b	rdev_get_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0x750e92e8	macvlan_handle_frame_hook
+EXPORT_SYMBOL_GPL vmlinux 0x758923ee	ide_device_put
+EXPORT_SYMBOL_GPL vmlinux 0x75d15904	pci_reset_function
+EXPORT_SYMBOL_GPL vmlinux 0x75db7003	pmf_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0x75df593f	usb_submit_urb
+EXPORT_SYMBOL_GPL vmlinux 0x75e6e037	hash_page
+EXPORT_SYMBOL_GPL vmlinux 0x75e8f3c3	crypto_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x761188fd	dpm_suspend_noirq
+EXPORT_SYMBOL_GPL vmlinux 0x76135451	fuse_conn_put
+EXPORT_SYMBOL_GPL vmlinux 0x763959be	sdev_evt_send_simple
+EXPORT_SYMBOL_GPL vmlinux 0x764ac8bb	ring_buffer_read_finish
+EXPORT_SYMBOL_GPL vmlinux 0x7659b345	tty_get_pgrp
+EXPORT_SYMBOL_GPL vmlinux 0x765f69b6	debugfs_create_u32
+EXPORT_SYMBOL_GPL vmlinux 0x766542da	crypto_shash_digest
+EXPORT_SYMBOL_GPL vmlinux 0x7667866e	ide_setting_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x768538b1	inet6_lookup_listener
+EXPORT_SYMBOL_GPL vmlinux 0x76d6a509	task_active_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0x773ca527	init_uts_ns
+EXPORT_SYMBOL_GPL vmlinux 0x774aceba	disk_part_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0x77802ee7	ata_std_bios_param
+EXPORT_SYMBOL_GPL vmlinux 0x78008fa3	security_inode_create
+EXPORT_SYMBOL_GPL vmlinux 0x786b2c1c	usb_unlink_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0x78ba79d1	locks_release_private
+EXPORT_SYMBOL_GPL vmlinux 0x78d1e009	fuse_request_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x78d39ea4	__ring_buffer_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x78e4a4ee	klist_add_after
+EXPORT_SYMBOL_GPL vmlinux 0x790f5353	crypto_alloc_instance
+EXPORT_SYMBOL_GPL vmlinux 0x79124812	kobject_uevent_env
+EXPORT_SYMBOL_GPL vmlinux 0x7916d1c8	ring_buffer_empty_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x7944e0fc	tracing_off
+EXPORT_SYMBOL_GPL vmlinux 0x795d9155	crypto_alg_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x796fac8b	crypto_register_template
+EXPORT_SYMBOL_GPL vmlinux 0x79b17a5d	regulator_get
+EXPORT_SYMBOL_GPL vmlinux 0x79bc043f	device_for_each_child
+EXPORT_SYMBOL_GPL vmlinux 0x79be3e5d	ide_dma_host_set
+EXPORT_SYMBOL_GPL vmlinux 0x79be5670	blk_execute_rq_nowait
+EXPORT_SYMBOL_GPL vmlinux 0x7a2fa777	usb_free_urb
+EXPORT_SYMBOL_GPL vmlinux 0x7a45f91c	inet_diag_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x7ab3c122	edac_handlers
+EXPORT_SYMBOL_GPL vmlinux 0x7ad0cbba	led_classdev_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x7ae1ae8e	cpufreq_frequency_table_put_attr
+EXPORT_SYMBOL_GPL vmlinux 0x7b0ad54e	regulator_bulk_enable
+EXPORT_SYMBOL_GPL vmlinux 0x7b1d544d	edac_handler_set
+EXPORT_SYMBOL_GPL vmlinux 0x7b40f324	da903x_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x7baf60ca	ring_buffer_normalize_time_stamp
+EXPORT_SYMBOL_GPL vmlinux 0x7bd2e221	usb_autopm_get_interface
+EXPORT_SYMBOL_GPL vmlinux 0x7bdba145	ata_sff_post_internal_cmd
+EXPORT_SYMBOL_GPL vmlinux 0x7bebcefd	blk_queue_rq_timeout
+EXPORT_SYMBOL_GPL vmlinux 0x7c2e6801	dm_path_uevent
+EXPORT_SYMBOL_GPL vmlinux 0x7c472b30	usb_deregister_dev
+EXPORT_SYMBOL_GPL vmlinux 0x7c4ebf33	ide_port_unregister_devices
+EXPORT_SYMBOL_GPL vmlinux 0x7c819e1f	gpiochip_add
+EXPORT_SYMBOL_GPL vmlinux 0x7c84daab	crypto_register_shash
+EXPORT_SYMBOL_GPL vmlinux 0x7c9f31db	netlink_has_listeners
+EXPORT_SYMBOL_GPL vmlinux 0x7cd5d54e	inet_unhash
+EXPORT_SYMBOL_GPL vmlinux 0x7ce7c809	register_ftrace_event
+EXPORT_SYMBOL_GPL vmlinux 0x7d0ad5d3	apply_to_page_range
+EXPORT_SYMBOL_GPL vmlinux 0x7d3a373a	ide_host_register
+EXPORT_SYMBOL_GPL vmlinux 0x7da214f4	alloc_page_buffers
+EXPORT_SYMBOL_GPL vmlinux 0x7dc5d0b6	crypto_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x7e0a1ea4	vfs_setlease
+EXPORT_SYMBOL_GPL vmlinux 0x7e1183c9	async_schedule
+EXPORT_SYMBOL_GPL vmlinux 0x7e275ea8	scsi_complete_async_scans
+EXPORT_SYMBOL_GPL vmlinux 0x7e2d29ec	ide_pci_clk
+EXPORT_SYMBOL_GPL vmlinux 0x7e64181d	usb_calc_bus_time
+EXPORT_SYMBOL_GPL vmlinux 0x7e951158	inotify_init
+EXPORT_SYMBOL_GPL vmlinux 0x7e9ecb44	aead_geniv_init
+EXPORT_SYMBOL_GPL vmlinux 0x7ec49c72	ide_write_devctl
+EXPORT_SYMBOL_GPL vmlinux 0x7f19c836	unlock_policy_rwsem_write
+EXPORT_SYMBOL_GPL vmlinux 0x7f391915	default_backing_dev_info
+EXPORT_SYMBOL_GPL vmlinux 0x7f4f632b	ata_bmdma_status
+EXPORT_SYMBOL_GPL vmlinux 0x7f52c522	ps3av_get_mode
+EXPORT_SYMBOL_GPL vmlinux 0x7f54a21f	ide_capacity_proc_fops
+EXPORT_SYMBOL_GPL vmlinux 0x7f9aae34	ata_eh_analyze_ncq_error
+EXPORT_SYMBOL_GPL vmlinux 0x7faca1f2	trace_seq_vprintf
+EXPORT_SYMBOL_GPL vmlinux 0x7fcf82ed	crypto_alg_sem
+EXPORT_SYMBOL_GPL vmlinux 0x7ff10ccf	raw_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x7ff55bac	class_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x8014b6af	input_event_from_user
+EXPORT_SYMBOL_GPL vmlinux 0x8039d043	selinux_secmark_relabel_packet_permission
+EXPORT_SYMBOL_GPL vmlinux 0x80507f72	ps3av_audio_mute_analog
+EXPORT_SYMBOL_GPL vmlinux 0x808adb12	swiotlb_sync_single_range_for_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x808ec1a3	crypto_alg_tested
+EXPORT_SYMBOL_GPL vmlinux 0x80918605	__pm_runtime_get
+EXPORT_SYMBOL_GPL vmlinux 0x80e0494e	sysdev_show_int
+EXPORT_SYMBOL_GPL vmlinux 0x80ee55c3	selinux_secmark_refcount_inc
+EXPORT_SYMBOL_GPL vmlinux 0x80f1afab	class_dev_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0x810fc986	usb_ep0_reinit
+EXPORT_SYMBOL_GPL vmlinux 0x811afadf	rtc_lock
+EXPORT_SYMBOL_GPL vmlinux 0x81418618	usb_autopm_set_interface
+EXPORT_SYMBOL_GPL vmlinux 0x8149ea54	ata_timing_find_mode
+EXPORT_SYMBOL_GPL vmlinux 0x81a2e61f	crypto_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x81a50c13	debugfs_create_size_t
+EXPORT_SYMBOL_GPL vmlinux 0x81f789f5	spu_add_sysdev_attr_group
+EXPORT_SYMBOL_GPL vmlinux 0x8226642f	__gpio_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x822bfbfe	__trace_note_message
+EXPORT_SYMBOL_GPL vmlinux 0x822dbfe7	pmac_i2c_match_adapter
+EXPORT_SYMBOL_GPL vmlinux 0x8241c6d9	crypto_init_ahash_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x825db993	__fsnotify_inode_delete
+EXPORT_SYMBOL_GPL vmlinux 0x82742484	ide_dev_select
+EXPORT_SYMBOL_GPL vmlinux 0x828d1a9e	console_drivers
+EXPORT_SYMBOL_GPL vmlinux 0x8291b2a3	class_interface_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x8292e581	fsnotify
+EXPORT_SYMBOL_GPL vmlinux 0x82939ebd	rcu_batches_completed_sched
+EXPORT_SYMBOL_GPL vmlinux 0x82bbae86	dm_kill_unmapped_request
+EXPORT_SYMBOL_GPL vmlinux 0x82d79b51	sysctl_vfs_cache_pressure
+EXPORT_SYMBOL_GPL vmlinux 0x82fa6aad	irq_of_parse_and_map
+EXPORT_SYMBOL_GPL vmlinux 0x830e1a56	rtc_set_time
+EXPORT_SYMBOL_GPL vmlinux 0x832cc293	inotify_find_update_watch
+EXPORT_SYMBOL_GPL vmlinux 0x8339bbed	inotify_inode_is_dead
+EXPORT_SYMBOL_GPL vmlinux 0x833a175c	usb_register_device_driver
+EXPORT_SYMBOL_GPL vmlinux 0x835cfce8	get_slice_psize
+EXPORT_SYMBOL_GPL vmlinux 0x83696040	crypto_spawn_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x83855f10	inet_csk_compat_setsockopt
+EXPORT_SYMBOL_GPL vmlinux 0x8394f743	dm_set_device_limits
+EXPORT_SYMBOL_GPL vmlinux 0x83bc0e60	sysdev_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x843b6705	sysfs_chmod_file
+EXPORT_SYMBOL_GPL vmlinux 0x84b1a259	key_type_user
+EXPORT_SYMBOL_GPL vmlinux 0x84b2753c	ata_sas_port_stop
+EXPORT_SYMBOL_GPL vmlinux 0x857ea91f	crypto_nivaead_type
+EXPORT_SYMBOL_GPL vmlinux 0x85c10896	rcu_batches_completed_bh
+EXPORT_SYMBOL_GPL vmlinux 0x85d22769	__get_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0x8600781d	ata_sff_freeze
+EXPORT_SYMBOL_GPL vmlinux 0x86089354	pmac_i2c_xfer
+EXPORT_SYMBOL_GPL vmlinux 0x8658406f	regulator_set_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0x868784cb	__symbol_get
+EXPORT_SYMBOL_GPL vmlinux 0x86b1667d	hwrng_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x86f1b4d8	blk_queue_dma_drain
+EXPORT_SYMBOL_GPL vmlinux 0x86f6b99d	synchronize_rcu_expedited
+EXPORT_SYMBOL_GPL vmlinux 0x87078e7b	blk_end_request_err
+EXPORT_SYMBOL_GPL vmlinux 0x873fbaea	edac_atomic_assert_error
+EXPORT_SYMBOL_GPL vmlinux 0x87751b4d	ata_host_init
+EXPORT_SYMBOL_GPL vmlinux 0x87754115	raw_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x87bb6e98	blk_trace_startstop
+EXPORT_SYMBOL_GPL vmlinux 0x8810ad5e	crypto_xor
+EXPORT_SYMBOL_GPL vmlinux 0x8843f090	cpufreq_cpu_get
+EXPORT_SYMBOL_GPL vmlinux 0x885142a6	nf_net_netfilter_sysctl_path
+EXPORT_SYMBOL_GPL vmlinux 0x8872cb59	dequeue_signal
+EXPORT_SYMBOL_GPL vmlinux 0x88cc9e42	transport_remove_device
+EXPORT_SYMBOL_GPL vmlinux 0x88ef8bf3	__module_address
+EXPORT_SYMBOL_GPL vmlinux 0x88f70b9f	xfrm_output_resume
+EXPORT_SYMBOL_GPL vmlinux 0x89e89eea	fuse_conn_kill
+EXPORT_SYMBOL_GPL vmlinux 0x8a1a7ccf	use_module
+EXPORT_SYMBOL_GPL vmlinux 0x8a8fc70c	init_user_ns
+EXPORT_SYMBOL_GPL vmlinux 0x8aa437a4	platform_get_irq
+EXPORT_SYMBOL_GPL vmlinux 0x8ad7a4b8	ide_tf_read
+EXPORT_SYMBOL_GPL vmlinux 0x8aec5f8c	usb_control_msg
+EXPORT_SYMBOL_GPL vmlinux 0x8af082cd	spi_setup
+EXPORT_SYMBOL_GPL vmlinux 0x8af7665f	tcp_twsk_destructor
+EXPORT_SYMBOL_GPL vmlinux 0x8b6000b5	dma_get_required_mask
+EXPORT_SYMBOL_GPL vmlinux 0x8b752ac1	ata_tf_to_fis
+EXPORT_SYMBOL_GPL vmlinux 0x8b898ba5	__add_pages
+EXPORT_SYMBOL_GPL vmlinux 0x8b91d471	platform_device_add
+EXPORT_SYMBOL_GPL vmlinux 0x8bcd70c5	usb_driver_release_interface
+EXPORT_SYMBOL_GPL vmlinux 0x8c19dd94	ide_allocate_dma_engine
+EXPORT_SYMBOL_GPL vmlinux 0x8c48e026	ata_scsi_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x8c668f30	usb_bulk_msg
+EXPORT_SYMBOL_GPL vmlinux 0x8c6a9dca	rtc_set_mmss
+EXPORT_SYMBOL_GPL vmlinux 0x8c902200	aead_geniv_free
+EXPORT_SYMBOL_GPL vmlinux 0x8ccfacd3	ide_init_pc
+EXPORT_SYMBOL_GPL vmlinux 0x8d033df4	klist_node_attached
+EXPORT_SYMBOL_GPL vmlinux 0x8d27b9e4	securityfs_remove
+EXPORT_SYMBOL_GPL vmlinux 0x8d2c1594	ide_set_media_lock
+EXPORT_SYMBOL_GPL vmlinux 0x8d573e7c	pci_find_next_ht_capability
+EXPORT_SYMBOL_GPL vmlinux 0x8d708b1f	ide_pio_cycle_time
+EXPORT_SYMBOL_GPL vmlinux 0x8d92637c	unregister_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0x8e6c6e7f	ide_undecoded_slave
+EXPORT_SYMBOL_GPL vmlinux 0x8eee8eb1	scsi_mode_select
+EXPORT_SYMBOL_GPL vmlinux 0x8ef6417f	scsi_nl_sock
+EXPORT_SYMBOL_GPL vmlinux 0x8f297ae6	seq_release_net
+EXPORT_SYMBOL_GPL vmlinux 0x8f321478	pmac_i2c_adapter_to_bus
+EXPORT_SYMBOL_GPL vmlinux 0x8f573272	blk_lld_busy
+EXPORT_SYMBOL_GPL vmlinux 0x8f6cee77	__round_jiffies_relative
+EXPORT_SYMBOL_GPL vmlinux 0x8f8889f5	tty_ldisc_ref_wait
+EXPORT_SYMBOL_GPL vmlinux 0x8f9e3b37	class_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x8fa74514	sysdev_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x8faa955c	cpufreq_frequency_table_target
+EXPORT_SYMBOL_GPL vmlinux 0x901e3133	scatterwalk_start
+EXPORT_SYMBOL_GPL vmlinux 0x902ca6d0	rtc_alarm_irq_enable
+EXPORT_SYMBOL_GPL vmlinux 0x903c47db	generic_detach_inode
+EXPORT_SYMBOL_GPL vmlinux 0x90673390	spu_switch_event_register
+EXPORT_SYMBOL_GPL vmlinux 0x90a1004a	crypto_has_alg
+EXPORT_SYMBOL_GPL vmlinux 0x90be7c16	sync_filesystem
+EXPORT_SYMBOL_GPL vmlinux 0x90dfd1d7	pmac_i2c_find_bus
+EXPORT_SYMBOL_GPL vmlinux 0x9159b9d6	profile_event_register
+EXPORT_SYMBOL_GPL vmlinux 0x918bf846	uhci_reset_hc
+EXPORT_SYMBOL_GPL vmlinux 0x919e4700	crypto_chain
+EXPORT_SYMBOL_GPL vmlinux 0x91ae5232	hvc_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x91e67797	usb_poison_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0x92005e90	pmac_i2c_get_controller
+EXPORT_SYMBOL_GPL vmlinux 0x921254a2	crypto_unregister_template
+EXPORT_SYMBOL_GPL vmlinux 0x9214be9a	device_move
+EXPORT_SYMBOL_GPL vmlinux 0x9251686a	usb_unlink_urb
+EXPORT_SYMBOL_GPL vmlinux 0x925d71c9	ata_qc_complete
+EXPORT_SYMBOL_GPL vmlinux 0x927020e5	register_kretprobes
+EXPORT_SYMBOL_GPL vmlinux 0x92a08ed3	ps3_free_mmio_region
+EXPORT_SYMBOL_GPL vmlinux 0x92baa34b	__pm_runtime_put
+EXPORT_SYMBOL_GPL vmlinux 0x92d31cfb	fixed_phy_add
+EXPORT_SYMBOL_GPL vmlinux 0x92f2696b	skb_gro_receive
+EXPORT_SYMBOL_GPL vmlinux 0x92fb217b	dcookie_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x930316c4	slice_get_unmapped_area
+EXPORT_SYMBOL_GPL vmlinux 0x9333593a	leds_list_lock
+EXPORT_SYMBOL_GPL vmlinux 0x938c96b0	eventfd_ctx_put
+EXPORT_SYMBOL_GPL vmlinux 0x93d2422d	snmp_mib_free
+EXPORT_SYMBOL_GPL vmlinux 0x94472ee3	pci_rescan_bus
+EXPORT_SYMBOL_GPL vmlinux 0x94a68723	ata_scsi_slave_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x94db3647	inet_csk_bind_conflict
+EXPORT_SYMBOL_GPL vmlinux 0x94dc66d4	da903x_clr_bits
+EXPORT_SYMBOL_GPL vmlinux 0x9506dc7d	tcp_slow_start
+EXPORT_SYMBOL_GPL vmlinux 0x952664c5	do_exit
+EXPORT_SYMBOL_GPL vmlinux 0x95473018	sysfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x956a91ba	gpio_get_value_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x95c27e69	pci_scan_child_bus
+EXPORT_SYMBOL_GPL vmlinux 0x95c862ab	pci_set_pcie_reset_state
+EXPORT_SYMBOL_GPL vmlinux 0x96014d5a	sata_async_notification
+EXPORT_SYMBOL_GPL vmlinux 0x961a8cd3	unlock_policy_rwsem_read
+EXPORT_SYMBOL_GPL vmlinux 0x9632abd9	ide_exec_command
+EXPORT_SYMBOL_GPL vmlinux 0x966dbaa0	do_kern_mount
+EXPORT_SYMBOL_GPL vmlinux 0x969e43be	power_supply_register
+EXPORT_SYMBOL_GPL vmlinux 0x96c1c3a7	usb_get_urb
+EXPORT_SYMBOL_GPL vmlinux 0x96cbcf31	pm_qos_add_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x9707e712	ata_sff_lost_interrupt
+EXPORT_SYMBOL_GPL vmlinux 0x974f3f15	pmac_i2c_open
+EXPORT_SYMBOL_GPL vmlinux 0x979ed0d8	unregister_pernet_gen_subsys
+EXPORT_SYMBOL_GPL vmlinux 0x97c9b128	fs_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x97e5b4e3	sata_scr_write_flush
+EXPORT_SYMBOL_GPL vmlinux 0x9833bc0c	hvc_kick
+EXPORT_SYMBOL_GPL vmlinux 0x9842b8e6	register_posix_clock
+EXPORT_SYMBOL_GPL vmlinux 0x984a6b65	put_pid
+EXPORT_SYMBOL_GPL vmlinux 0x984b3bb4	devres_release_group
+EXPORT_SYMBOL_GPL vmlinux 0x9867b05b	ide_build_dmatable
+EXPORT_SYMBOL_GPL vmlinux 0x98893ce5	spu_set_profile_private_kref
+EXPORT_SYMBOL_GPL vmlinux 0x98e926dc	spu_remove_sysdev_attr_group
+EXPORT_SYMBOL_GPL vmlinux 0x98ee5fb7	sysdev_store_int
+EXPORT_SYMBOL_GPL vmlinux 0x9924c496	__usb_get_extra_descriptor
+EXPORT_SYMBOL_GPL vmlinux 0x995d1071	prof_on
+EXPORT_SYMBOL_GPL vmlinux 0x996a2677	bsg_register_queue
+EXPORT_SYMBOL_GPL vmlinux 0x99748b2a	crypto_dequeue_request
+EXPORT_SYMBOL_GPL vmlinux 0x99add812	sysdev_show_ulong
+EXPORT_SYMBOL_GPL vmlinux 0x99e7c17a	pmac_i2c_get_adapter
+EXPORT_SYMBOL_GPL vmlinux 0x9a11a0fc	crypto_attr_alg_name
+EXPORT_SYMBOL_GPL vmlinux 0x9a3a8846	blkcipher_walk_virt
+EXPORT_SYMBOL_GPL vmlinux 0x9a98f0f1	pcibios_finish_adding_to_bus
+EXPORT_SYMBOL_GPL vmlinux 0x9adca72b	__rtnl_register
+EXPORT_SYMBOL_GPL vmlinux 0x9af49d41	ide_no_data_taskfile
+EXPORT_SYMBOL_GPL vmlinux 0x9b3499fe	usb_hcd_platform_shutdown
+EXPORT_SYMBOL_GPL vmlinux 0x9b3b737f	register_kprobes
+EXPORT_SYMBOL_GPL vmlinux 0x9b798ae4	blk_rq_check_limits
+EXPORT_SYMBOL_GPL vmlinux 0x9b90e4df	k_handler
+EXPORT_SYMBOL_GPL vmlinux 0x9ba0501e	unregister_vt_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x9c084c51	of_node_to_nid
+EXPORT_SYMBOL_GPL vmlinux 0x9c2232ae	ps3_open_hv_device
+EXPORT_SYMBOL_GPL vmlinux 0x9c26cc67	dm_noflush_suspending
+EXPORT_SYMBOL_GPL vmlinux 0x9c4fe428	ata_sff_data_xfer_noirq
+EXPORT_SYMBOL_GPL vmlinux 0x9c8a8654	usb_hcd_pci_remove
+EXPORT_SYMBOL_GPL vmlinux 0x9cad41d1	bus_for_each_drv
+EXPORT_SYMBOL_GPL vmlinux 0x9cb8037b	xfrm_count_enc_supported
+EXPORT_SYMBOL_GPL vmlinux 0x9cc1d458	sk_setup_caps
+EXPORT_SYMBOL_GPL vmlinux 0x9cdce019	ehci_cf_port_reset_rwsem
+EXPORT_SYMBOL_GPL vmlinux 0x9ce6b657	i2c_new_dummy
+EXPORT_SYMBOL_GPL vmlinux 0x9d37fcf7	sata_pmp_qc_defer_cmd_switch
+EXPORT_SYMBOL_GPL vmlinux 0x9dedde27	bus_find_device
+EXPORT_SYMBOL_GPL vmlinux 0x9df0a8f6	crypto_larval_kill
+EXPORT_SYMBOL_GPL vmlinux 0x9e532c5a	register_jprobes
+EXPORT_SYMBOL_GPL vmlinux 0x9e711ad2	pm_qos_requirement
+EXPORT_SYMBOL_GPL vmlinux 0x9e795283	ps3_gpu_mutex
+EXPORT_SYMBOL_GPL vmlinux 0x9f40a6d6	async_synchronize_full_domain
+EXPORT_SYMBOL_GPL vmlinux 0x9f85ed90	klist_remove
+EXPORT_SYMBOL_GPL vmlinux 0x9fce80db	fb_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x9fd735d8	inotify_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x9ff1baaa	usb_deregister
+EXPORT_SYMBOL_GPL vmlinux 0xa0255440	net_ipv4_ctl_path
+EXPORT_SYMBOL_GPL vmlinux 0xa025c8d9	usb_root_hub_lost_power
+EXPORT_SYMBOL_GPL vmlinux 0xa04c8c81	inet_csk_compat_getsockopt
+EXPORT_SYMBOL_GPL vmlinux 0xa068752a	crypto_ahash_setkey
+EXPORT_SYMBOL_GPL vmlinux 0xa0756f6a	tty_wakeup
+EXPORT_SYMBOL_GPL vmlinux 0xa08155ce	pci_find_next_capability
+EXPORT_SYMBOL_GPL vmlinux 0xa0815e74	fuse_do_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xa0a27fff	pci_address_to_pio
+EXPORT_SYMBOL_GPL vmlinux 0xa0b47e73	proc_net_fops_create
+EXPORT_SYMBOL_GPL vmlinux 0xa0bcde0e	class_find_device
+EXPORT_SYMBOL_GPL vmlinux 0xa0de2f29	anon_transport_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xa0fe3b89	trace_seq_printf
+EXPORT_SYMBOL_GPL vmlinux 0xa12bc1ce	transport_setup_device
+EXPORT_SYMBOL_GPL vmlinux 0xa18e769a	relay_open
+EXPORT_SYMBOL_GPL vmlinux 0xa212d1b8	get_current_tty
+EXPORT_SYMBOL_GPL vmlinux 0xa22fce3e	regulator_disable
+EXPORT_SYMBOL_GPL vmlinux 0xa239dc76	bus_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xa24c2fc6	sysfs_get_dirent
+EXPORT_SYMBOL_GPL vmlinux 0xa296e9f6	usb_match_one_id
+EXPORT_SYMBOL_GPL vmlinux 0xa2b7880b	ata_dev_next
+EXPORT_SYMBOL_GPL vmlinux 0xa2d6bc6a	scatterwalk_map
+EXPORT_SYMBOL_GPL vmlinux 0xa2e3670a	ata_sff_dma_pause
+EXPORT_SYMBOL_GPL vmlinux 0xa301f3fc	pmf_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0xa30fa6c3	ata_sas_port_start
+EXPORT_SYMBOL_GPL vmlinux 0xa331f3ee	__ide_pci_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0xa34e18ca	pm_schedule_suspend
+EXPORT_SYMBOL_GPL vmlinux 0xa397751b	da903x_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xa3a2d9af	walk_system_ram_range
+EXPORT_SYMBOL_GPL vmlinux 0xa3d69bf3	device_release_driver
+EXPORT_SYMBOL_GPL vmlinux 0xa3f330ec	class_compat_create_link
+EXPORT_SYMBOL_GPL vmlinux 0xa40a8590	input_event_to_user
+EXPORT_SYMBOL_GPL vmlinux 0xa41d1ce3	pmac_i2c_setmode
+EXPORT_SYMBOL_GPL vmlinux 0xa41d8e28	usb_unanchor_urb
+EXPORT_SYMBOL_GPL vmlinux 0xa42aa19d	rtc_irq_set_state
+EXPORT_SYMBOL_GPL vmlinux 0xa4503450	spi_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0xa490d84f	inet_csk_clone
+EXPORT_SYMBOL_GPL vmlinux 0xa496a2d0	regulator_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xa4a42813	vbin_printf
+EXPORT_SYMBOL_GPL vmlinux 0xa4a9f011	ata_port_pbar_desc
+EXPORT_SYMBOL_GPL vmlinux 0xa4c5a895	register_pernet_subsys
+EXPORT_SYMBOL_GPL vmlinux 0xa4e7a901	sg_scsi_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xa4f03ad7	crypto_alloc_instance2
+EXPORT_SYMBOL_GPL vmlinux 0xa52b3750	ata_pci_bmdma_init
+EXPORT_SYMBOL_GPL vmlinux 0xa581939b	input_ff_event
+EXPORT_SYMBOL_GPL vmlinux 0xa598d8e9	usb_string
+EXPORT_SYMBOL_GPL vmlinux 0xa5bf5c3e	pm_qos_add_requirement
+EXPORT_SYMBOL_GPL vmlinux 0xa5c36cec	inotify_unmount_inodes
+EXPORT_SYMBOL_GPL vmlinux 0xa5dbc143	usb_altnum_to_altsetting
+EXPORT_SYMBOL_GPL vmlinux 0xa5eb2ce3	crypto_destroy_tfm
+EXPORT_SYMBOL_GPL vmlinux 0xa5eb8c2e	ata_pci_sff_activate_host
+EXPORT_SYMBOL_GPL vmlinux 0xa5efbf4c	async_synchronize_full
+EXPORT_SYMBOL_GPL vmlinux 0xa5f9e23f	fuse_put_request
+EXPORT_SYMBOL_GPL vmlinux 0xa601bd85	power_supply_get_by_name
+EXPORT_SYMBOL_GPL vmlinux 0xa6214aa0	rt_mutex_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xa6434776	sysfs_add_device_to_node
+EXPORT_SYMBOL_GPL vmlinux 0xa651d708	rt_mutex_timed_lock
+EXPORT_SYMBOL_GPL vmlinux 0xa65744b5	eeh_remove_bus_device
+EXPORT_SYMBOL_GPL vmlinux 0xa66597d8	device_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0xa6bc3b30	usb_clear_halt
+EXPORT_SYMBOL_GPL vmlinux 0xa6d7cd64	devm_kfree
+EXPORT_SYMBOL_GPL vmlinux 0xa7672da4	tracepoint_iter_stop
+EXPORT_SYMBOL_GPL vmlinux 0xa76806c1	ata_port_disable
+EXPORT_SYMBOL_GPL vmlinux 0xa77c2d06	debugfs_create_u8
+EXPORT_SYMBOL_GPL vmlinux 0xa787e50a	skcipher_geniv_exit
+EXPORT_SYMBOL_GPL vmlinux 0xa7966b51	usb_mon_register
+EXPORT_SYMBOL_GPL vmlinux 0xa79a306d	fuse_conn_init
+EXPORT_SYMBOL_GPL vmlinux 0xa7b701df	usb_get_dev
+EXPORT_SYMBOL_GPL vmlinux 0xa80e7443	ide_cd_expiry
+EXPORT_SYMBOL_GPL vmlinux 0xa81eb0ee	kernel_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xa8431368	__i2c_board_lock
+EXPORT_SYMBOL_GPL vmlinux 0xa8658a27	power_supply_class
+EXPORT_SYMBOL_GPL vmlinux 0xa881dcc5	do_sync_mapping_range
+EXPORT_SYMBOL_GPL vmlinux 0xa8933424	trace_define_common_fields
+EXPORT_SYMBOL_GPL vmlinux 0xa8b06578	ata_sas_queuecmd
+EXPORT_SYMBOL_GPL vmlinux 0xa8cb0088	srcu_batches_completed
+EXPORT_SYMBOL_GPL vmlinux 0xa8ce4dce	spu_add_sysdev_attr
+EXPORT_SYMBOL_GPL vmlinux 0xa8e9fcc1	ata_dummy_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0xa8f59416	gpio_direction_output
+EXPORT_SYMBOL_GPL vmlinux 0xa902af13	ide_pio_bytes
+EXPORT_SYMBOL_GPL vmlinux 0xa947abcc	filter_current_check_discard
+EXPORT_SYMBOL_GPL vmlinux 0xa987d295	register_pernet_gen_subsys
+EXPORT_SYMBOL_GPL vmlinux 0xa98cdb36	ps3_get_firmware_version
+EXPORT_SYMBOL_GPL vmlinux 0xa9c530b8	unregister_oom_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xa9f01699	get_device
+EXPORT_SYMBOL_GPL vmlinux 0xaa0b37dd	sysfs_remove_link
+EXPORT_SYMBOL_GPL vmlinux 0xaa40407b	securityfs_create_dir
+EXPORT_SYMBOL_GPL vmlinux 0xaa5310f9	__tracepoint_napi_poll
+EXPORT_SYMBOL_GPL vmlinux 0xaa7de91c	dm_device_name
+EXPORT_SYMBOL_GPL vmlinux 0xaa8c4696	cpu_clock
+EXPORT_SYMBOL_GPL vmlinux 0xaac3afd6	raw_seq_start
+EXPORT_SYMBOL_GPL vmlinux 0xaad9cf20	unregister_ftrace_event
+EXPORT_SYMBOL_GPL vmlinux 0xaaf917f5	ata_slave_link_init
+EXPORT_SYMBOL_GPL vmlinux 0xab0c295e	ata_port_probe
+EXPORT_SYMBOL_GPL vmlinux 0xab14110a	stop_machine
+EXPORT_SYMBOL_GPL vmlinux 0xab2412be	mm_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xab2b243d	ps3_irq_plug_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xab33787f	ide_queue_sense_rq
+EXPORT_SYMBOL_GPL vmlinux 0xab57e311	tracepoint_probe_register
+EXPORT_SYMBOL_GPL vmlinux 0xab6767bc	vfs_listxattr
+EXPORT_SYMBOL_GPL vmlinux 0xab9f03c4	simple_attr_release
+EXPORT_SYMBOL_GPL vmlinux 0xabd4fcaf	shmem_file_setup
+EXPORT_SYMBOL_GPL vmlinux 0xac1c98c5	ide_pci_set_master
+EXPORT_SYMBOL_GPL vmlinux 0xac54c2f5	input_ff_create
+EXPORT_SYMBOL_GPL vmlinux 0xac63de1e	ide_read_altstatus
+EXPORT_SYMBOL_GPL vmlinux 0xac8fa07e	__srcu_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xac91206d	crypto_shoot_alg
+EXPORT_SYMBOL_GPL vmlinux 0xac9ad5b1	fib_rules_cleanup_ops
+EXPORT_SYMBOL_GPL vmlinux 0xacc2633c	spu_switch_event_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xace5c0fc	usb_bus_list
+EXPORT_SYMBOL_GPL vmlinux 0xacfd1d19	device_add
+EXPORT_SYMBOL_GPL vmlinux 0xacfe997e	powerpc_firmware_features
+EXPORT_SYMBOL_GPL vmlinux 0xad050120	ata_sff_irq_clear
+EXPORT_SYMBOL_GPL vmlinux 0xad242e0e	relay_subbufs_consumed
+EXPORT_SYMBOL_GPL vmlinux 0xad368216	__pm_runtime_set_status
+EXPORT_SYMBOL_GPL vmlinux 0xad89e545	led_trigger_store
+EXPORT_SYMBOL_GPL vmlinux 0xadb3e5ee	inotify_rm_watch
+EXPORT_SYMBOL_GPL vmlinux 0xadb4bf3f	pmac_low_i2c_lock
+EXPORT_SYMBOL_GPL vmlinux 0xadc91752	pmac_i2c_get_dev_addr
+EXPORT_SYMBOL_GPL vmlinux 0xadd0d458	rtc_set_alarm
+EXPORT_SYMBOL_GPL vmlinux 0xadfae5d9	simple_attr_read
+EXPORT_SYMBOL_GPL vmlinux 0xae0c87ee	pm_qos_remove_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xae870c6c	lookup_instantiate_filp
+EXPORT_SYMBOL_GPL vmlinux 0xaed2cf91	rtnl_kill_links
+EXPORT_SYMBOL_GPL vmlinux 0xaee04e9f	ring_buffer_read
+EXPORT_SYMBOL_GPL vmlinux 0xaf27e93c	crypto_alloc_tfm
+EXPORT_SYMBOL_GPL vmlinux 0xaf3f6fe0	ata_sff_interrupt
+EXPORT_SYMBOL_GPL vmlinux 0xaf8b501d	ide_do_start_stop
+EXPORT_SYMBOL_GPL vmlinux 0xafabce6e	rtc_irq_set_freq
+EXPORT_SYMBOL_GPL vmlinux 0xafeb6a16	ata_bmdma_start
+EXPORT_SYMBOL_GPL vmlinux 0xb0aa812e	fips_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xb0b56ccb	ata_sff_qc_prep
+EXPORT_SYMBOL_GPL vmlinux 0xb0eb8df9	debugfs_create_dir
+EXPORT_SYMBOL_GPL vmlinux 0xb0ef4032	pci_block_user_cfg_access
+EXPORT_SYMBOL_GPL vmlinux 0xb10d75e4	crypto_rng_type
+EXPORT_SYMBOL_GPL vmlinux 0xb112f772	usb_driver_set_configuration
+EXPORT_SYMBOL_GPL vmlinux 0xb12117c1	ahash_attr_alg
+EXPORT_SYMBOL_GPL vmlinux 0xb14fcf46	platform_device_put
+EXPORT_SYMBOL_GPL vmlinux 0xb17f9c3f	shash_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0xb18429eb	suspend_device_irqs
+EXPORT_SYMBOL_GPL vmlinux 0xb1acbcce	rcu_barrier_sched
+EXPORT_SYMBOL_GPL vmlinux 0xb1b92432	rtc_irq_register
+EXPORT_SYMBOL_GPL vmlinux 0xb1d5f527	tcp_is_cwnd_limited
+EXPORT_SYMBOL_GPL vmlinux 0xb2883f30	register_timer_hook
+EXPORT_SYMBOL_GPL vmlinux 0xb2b65733	skb_morph
+EXPORT_SYMBOL_GPL vmlinux 0xb320351a	bus_find_device_by_name
+EXPORT_SYMBOL_GPL vmlinux 0xb337e335	eventfd_ctx_fdget
+EXPORT_SYMBOL_GPL vmlinux 0xb340ff7a	device_remove_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0xb36ea37f	ide_read_error
+EXPORT_SYMBOL_GPL vmlinux 0xb3a55416	rt_mutex_trylock
+EXPORT_SYMBOL_GPL vmlinux 0xb3a9b23b	ata_dev_disable
+EXPORT_SYMBOL_GPL vmlinux 0xb3ac8c8a	rtc_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xb3b45c2e	pmac_i2c_get_channel
+EXPORT_SYMBOL_GPL vmlinux 0xb40ba755	crypto_enqueue_request
+EXPORT_SYMBOL_GPL vmlinux 0xb491f59e	ring_buffer_resize
+EXPORT_SYMBOL_GPL vmlinux 0xb4a27710	usb_kill_urb
+EXPORT_SYMBOL_GPL vmlinux 0xb4bb0ce5	blk_update_request
+EXPORT_SYMBOL_GPL vmlinux 0xb4c42d3f	regulator_force_disable
+EXPORT_SYMBOL_GPL vmlinux 0xb4ea7cf7	kgdb_connected
+EXPORT_SYMBOL_GPL vmlinux 0xb50d0818	sk_clone
+EXPORT_SYMBOL_GPL vmlinux 0xb5158c0a	sata_link_debounce
+EXPORT_SYMBOL_GPL vmlinux 0xb51fbd64	edac_op_state
+EXPORT_SYMBOL_GPL vmlinux 0xb530a458	ata_scsi_queuecmd
+EXPORT_SYMBOL_GPL vmlinux 0xb54d65de	hvc_instantiate
+EXPORT_SYMBOL_GPL vmlinux 0xb5592a2c	scatterwalk_done
+EXPORT_SYMBOL_GPL vmlinux 0xb58dcfa2	synchronize_sched_expedited
+EXPORT_SYMBOL_GPL vmlinux 0xb5ff27a1	ide_dma_sff_read_status
+EXPORT_SYMBOL_GPL vmlinux 0xb612444d	snmp_mib_init
+EXPORT_SYMBOL_GPL vmlinux 0xb65091b3	selinux_secmark_refcount_dec
+EXPORT_SYMBOL_GPL vmlinux 0xb671d134	ata_sff_hsm_move
+EXPORT_SYMBOL_GPL vmlinux 0xb67a585a	blkcipher_walk_phys
+EXPORT_SYMBOL_GPL vmlinux 0xb68f1e50	ps3_close_hv_device
+EXPORT_SYMBOL_GPL vmlinux 0xb6aeb661	ata_id_c_string
+EXPORT_SYMBOL_GPL vmlinux 0xb6bc007a	spu_sys_callback
+EXPORT_SYMBOL_GPL vmlinux 0xb6e440b9	init_phb_dynamic
+EXPORT_SYMBOL_GPL vmlinux 0xb6ee2a7c	blkcipher_walk_virt_block
+EXPORT_SYMBOL_GPL vmlinux 0xb6f57dc8	regulator_set_current_limit
+EXPORT_SYMBOL_GPL vmlinux 0xb70d6ed0	ata_sas_port_init
+EXPORT_SYMBOL_GPL vmlinux 0xb744fa43	xfrm_ealg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0xb751b86e	ata_sas_port_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xb751f12a	sysfs_get
+EXPORT_SYMBOL_GPL vmlinux 0xb764c0d7	hrtimer_start
+EXPORT_SYMBOL_GPL vmlinux 0xb792762f	blk_queue_lld_busy
+EXPORT_SYMBOL_GPL vmlinux 0xb846ed4e	rtnl_register
+EXPORT_SYMBOL_GPL vmlinux 0xb84b1aae	ps3_event_receive_port_setup
+EXPORT_SYMBOL_GPL vmlinux 0xb89b2404	pcibios_unmap_io_space
+EXPORT_SYMBOL_GPL vmlinux 0xb92a792e	irq_create_of_mapping
+EXPORT_SYMBOL_GPL vmlinux 0xb93f323b	vma_kernel_pagesize
+EXPORT_SYMBOL_GPL vmlinux 0xb94739e9	crypto_larval_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xb9933632	sysfs_update_group
+EXPORT_SYMBOL_GPL vmlinux 0xb9d64cab	register_spu_syscalls
+EXPORT_SYMBOL_GPL vmlinux 0xb9d9b1ed	crypto_alloc_aead
+EXPORT_SYMBOL_GPL vmlinux 0xb9eb3aa9	add_uevent_var
+EXPORT_SYMBOL_GPL vmlinux 0xba062c7f	led_trigger_show
+EXPORT_SYMBOL_GPL vmlinux 0xba2acdfb	sysdev_driver_register
+EXPORT_SYMBOL_GPL vmlinux 0xba3b5758	ide_get_lba_addr
+EXPORT_SYMBOL_GPL vmlinux 0xbaafe09f	filter_match_preds
+EXPORT_SYMBOL_GPL vmlinux 0xbae34c27	scsi_nl_remove_transport
+EXPORT_SYMBOL_GPL vmlinux 0xbb305454	pm_runtime_suspend
+EXPORT_SYMBOL_GPL vmlinux 0xbb49aafe	spu_64k_pages_available
+EXPORT_SYMBOL_GPL vmlinux 0xbb4bfb2b	blk_rq_prep_clone
+EXPORT_SYMBOL_GPL vmlinux 0xbb68459c	uhci_check_and_reset_hc
+EXPORT_SYMBOL_GPL vmlinux 0xbb82cc9e	remove_phb_dynamic
+EXPORT_SYMBOL_GPL vmlinux 0xbb9653d6	mnt_want_write
+EXPORT_SYMBOL_GPL vmlinux 0xbb9a4e02	ring_buffer_read_start
+EXPORT_SYMBOL_GPL vmlinux 0xbbe2ce55	pmac_i2c_get_bus_node
+EXPORT_SYMBOL_GPL vmlinux 0xbc2fa9d1	trace_define_field
+EXPORT_SYMBOL_GPL vmlinux 0xbc4c1d46	ide_error
+EXPORT_SYMBOL_GPL vmlinux 0xbc7038be	__module_text_address
+EXPORT_SYMBOL_GPL vmlinux 0xbc7c2703	__inet_lookup_listener
+EXPORT_SYMBOL_GPL vmlinux 0xbccfdc43	crypto_shash_final
+EXPORT_SYMBOL_GPL vmlinux 0xbd225d55	hwmon_device_register
+EXPORT_SYMBOL_GPL vmlinux 0xbdd295f0	trace_vprintk
+EXPORT_SYMBOL_GPL vmlinux 0xbde949f3	ata_eh_freeze_port
+EXPORT_SYMBOL_GPL vmlinux 0xbe116723	do_posix_clock_nosettime
+EXPORT_SYMBOL_GPL vmlinux 0xbe1887e4	ata_unpack_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0xbe267923	destroy_workqueue
+EXPORT_SYMBOL_GPL vmlinux 0xbe3fe30d	pmf_unregister_irq_client
+EXPORT_SYMBOL_GPL vmlinux 0xbe8928b7	br_handle_frame_hook
+EXPORT_SYMBOL_GPL vmlinux 0xbed16a6e	blocking_notifier_chain_cond_register
+EXPORT_SYMBOL_GPL vmlinux 0xbf1cc04b	tty_termios_encode_baud_rate
+EXPORT_SYMBOL_GPL vmlinux 0xbf1f5871	of_irq_map_one
+EXPORT_SYMBOL_GPL vmlinux 0xbf51181b	sdev_evt_send
+EXPORT_SYMBOL_GPL vmlinux 0xbf74eb20	probe_kernel_write
+EXPORT_SYMBOL_GPL vmlinux 0xbf750773	crypto_hash_walk_first
+EXPORT_SYMBOL_GPL vmlinux 0xbf7c6c4f	i2c_add_numbered_adapter
+EXPORT_SYMBOL_GPL vmlinux 0xbf95e328	skb_pull_rcsum
+EXPORT_SYMBOL_GPL vmlinux 0xbfa3bffb	unregister_spu_syscalls
+EXPORT_SYMBOL_GPL vmlinux 0xbfa5fbe6	kobject_rename
+EXPORT_SYMBOL_GPL vmlinux 0xbfa93842	debugfs_create_x16
+EXPORT_SYMBOL_GPL vmlinux 0xbfc1643a	xfrm_audit_state_delete
+EXPORT_SYMBOL_GPL vmlinux 0xbffde8ec	compat_alloc_user_space
+EXPORT_SYMBOL_GPL vmlinux 0xc0280b90	bus_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xc0284593	ata_sas_slave_configure
+EXPORT_SYMBOL_GPL vmlinux 0xc09a819b	devm_kzalloc
+EXPORT_SYMBOL_GPL vmlinux 0xc0c4f8f3	simple_attr_open
+EXPORT_SYMBOL_GPL vmlinux 0xc0dde15d	crypto_mod_get
+EXPORT_SYMBOL_GPL vmlinux 0xc126e890	klist_del
+EXPORT_SYMBOL_GPL vmlinux 0xc12f7e0d	trace_profile_buf_nmi
+EXPORT_SYMBOL_GPL vmlinux 0xc14ba95f	ip_local_out
+EXPORT_SYMBOL_GPL vmlinux 0xc17395a1	usb_set_interface
+EXPORT_SYMBOL_GPL vmlinux 0xc17515d7	usb_hcds_loaded
+EXPORT_SYMBOL_GPL vmlinux 0xc17ac965	ata_host_activate
+EXPORT_SYMBOL_GPL vmlinux 0xc1d9a59b	sysdev_class_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xc1eb69cf	ide_setup_pci_noise
+EXPORT_SYMBOL_GPL vmlinux 0xc1f4f0c0	__mmdrop
+EXPORT_SYMBOL_GPL vmlinux 0xc1fa4dfb	unregister_jprobe
+EXPORT_SYMBOL_GPL vmlinux 0xc22a3091	vm_unmap_aliases
+EXPORT_SYMBOL_GPL vmlinux 0xc22fce34	ring_buffer_overruns
+EXPORT_SYMBOL_GPL vmlinux 0xc243d16a	ata_pci_sff_init_one
+EXPORT_SYMBOL_GPL vmlinux 0xc31307af	pcibios_add_pci_devices
+EXPORT_SYMBOL_GPL vmlinux 0xc31a8c74	device_schedule_callback_owner
+EXPORT_SYMBOL_GPL vmlinux 0xc3301f02	rcu_expedited_torture_stats
+EXPORT_SYMBOL_GPL vmlinux 0xc34efe27	snmp_fold_field
+EXPORT_SYMBOL_GPL vmlinux 0xc38d3ed3	bus_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0xc399468f	scsi_nl_remove_driver
+EXPORT_SYMBOL_GPL vmlinux 0xc3fe238e	power_supply_am_i_supplied
+EXPORT_SYMBOL_GPL vmlinux 0xc428068d	sata_deb_timing_long
+EXPORT_SYMBOL_GPL vmlinux 0xc450e3a3	security_inode_mkdir
+EXPORT_SYMBOL_GPL vmlinux 0xc48b7ccf	ata_mode_string
+EXPORT_SYMBOL_GPL vmlinux 0xc4947a46	page_cache_async_readahead
+EXPORT_SYMBOL_GPL vmlinux 0xc4b33aa6	tracepoint_probe_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xc4ca20f5	user_read
+EXPORT_SYMBOL_GPL vmlinux 0xc53650f3	register_jprobe
+EXPORT_SYMBOL_GPL vmlinux 0xc541e24f	ata_sff_dumb_qc_prep
+EXPORT_SYMBOL_GPL vmlinux 0xc5cf5b3e	relay_close
+EXPORT_SYMBOL_GPL vmlinux 0xc60f75ec	__ftrace_vprintk
+EXPORT_SYMBOL_GPL vmlinux 0xc63f0946	hrtimer_init_sleeper
+EXPORT_SYMBOL_GPL vmlinux 0xc66c2311	ps3_vuart_irq_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xc673e23e	ata_scsi_change_queue_depth
+EXPORT_SYMBOL_GPL vmlinux 0xc6ccedf0	eeh_dn_check_failure
+EXPORT_SYMBOL_GPL vmlinux 0xc7328d88	disk_part_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0xc73f87ad	gpiochip_remove
+EXPORT_SYMBOL_GPL vmlinux 0xc765ab67	usb_alloc_urb
+EXPORT_SYMBOL_GPL vmlinux 0xc7779f06	ide_pci_check_simplex
+EXPORT_SYMBOL_GPL vmlinux 0xc77e8d7f	ide_pci_resume
+EXPORT_SYMBOL_GPL vmlinux 0xc785dde2	put_driver
+EXPORT_SYMBOL_GPL vmlinux 0xc7bd431a	scsi_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0xc7d5c7d6	fuse_conn_get
+EXPORT_SYMBOL_GPL vmlinux 0xc7f47b40	elv_register
+EXPORT_SYMBOL_GPL vmlinux 0xc87c1f84	ktime_get
+EXPORT_SYMBOL_GPL vmlinux 0xc8a178a5	ide_dma_end
+EXPORT_SYMBOL_GPL vmlinux 0xc935828e	spi_async
+EXPORT_SYMBOL_GPL vmlinux 0xc9561772	fb_destroy_modelist
+EXPORT_SYMBOL_GPL vmlinux 0xc96299ae	ata_ehi_push_desc
+EXPORT_SYMBOL_GPL vmlinux 0xc9ec4e21	free_percpu
+EXPORT_SYMBOL_GPL vmlinux 0xc9eff9d4	__sock_recv_timestamp
+EXPORT_SYMBOL_GPL vmlinux 0xca32a2aa	ide_timing_merge
+EXPORT_SYMBOL_GPL vmlinux 0xca60e045	device_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xca7d9c56	unregister_kprobes
+EXPORT_SYMBOL_GPL vmlinux 0xca85d8cf	tracepoint_probe_update_all
+EXPORT_SYMBOL_GPL vmlinux 0xca8a14a2	dm_send_uevents
+EXPORT_SYMBOL_GPL vmlinux 0xcb0bc6b9	eventfd_fget
+EXPORT_SYMBOL_GPL vmlinux 0xcb8791e3	usb_autopm_get_interface_async
+EXPORT_SYMBOL_GPL vmlinux 0xcbb6f0b5	crypto_alloc_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0xcbd3d991	spu_remove_sysdev_attr
+EXPORT_SYMBOL_GPL vmlinux 0xcbe20242	page_cache_sync_readahead
+EXPORT_SYMBOL_GPL vmlinux 0xcc1f1c3d	inet_twdr_hangman
+EXPORT_SYMBOL_GPL vmlinux 0xcc1fa83c	fib_rules_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xcc20f3c1	ata_bmdma_setup
+EXPORT_SYMBOL_GPL vmlinux 0xcc47c400	bus_for_each_dev
+EXPORT_SYMBOL_GPL vmlinux 0xcc5573b3	add_page_wait_queue
+EXPORT_SYMBOL_GPL vmlinux 0xcc7a2564	usb_anchor_empty
+EXPORT_SYMBOL_GPL vmlinux 0xccadcecf	crypto_unregister_ahash
+EXPORT_SYMBOL_GPL vmlinux 0xcccfb2fa	sata_deb_timing_hotplug
+EXPORT_SYMBOL_GPL vmlinux 0xcce4e702	led_trigger_unregister_simple
+EXPORT_SYMBOL_GPL vmlinux 0xcd1f64f8	ata_dummy_port_info
+EXPORT_SYMBOL_GPL vmlinux 0xcd9babfc	hrtimer_forward
+EXPORT_SYMBOL_GPL vmlinux 0xcdca3691	nr_irqs
+EXPORT_SYMBOL_GPL vmlinux 0xce0d95ee	bus_register
+EXPORT_SYMBOL_GPL vmlinux 0xce4699c3	blkdev_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xce60429b	unregister_timer_hook
+EXPORT_SYMBOL_GPL vmlinux 0xce73b691	__pm_runtime_disable
+EXPORT_SYMBOL_GPL vmlinux 0xce977372	register_kretprobe
+EXPORT_SYMBOL_GPL vmlinux 0xcea59e31	ata_sff_busy_sleep
+EXPORT_SYMBOL_GPL vmlinux 0xcebda800	ata_cable_40wire
+EXPORT_SYMBOL_GPL vmlinux 0xcebfc38d	crypto_ahash_final
+EXPORT_SYMBOL_GPL vmlinux 0xcec5b6a1	ps3_system_bus_driver_register
+EXPORT_SYMBOL_GPL vmlinux 0xced5e06c	get_inotify_watch
+EXPORT_SYMBOL_GPL vmlinux 0xcf3062ac	regulator_bulk_get
+EXPORT_SYMBOL_GPL vmlinux 0xcf49d0a4	ata_sas_scsi_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xcf6dd1f4	platform_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0xcf8213ae	pci_unblock_user_cfg_access
+EXPORT_SYMBOL_GPL vmlinux 0xcf8af983	trace_profile_buf
+EXPORT_SYMBOL_GPL vmlinux 0xcf8dc213	mnt_clone_write
+EXPORT_SYMBOL_GPL vmlinux 0xcfc64a37	__pci_complete_power_transition
+EXPORT_SYMBOL_GPL vmlinux 0xcfc68341	synchronize_rcu_bh
+EXPORT_SYMBOL_GPL vmlinux 0xcfc6ea9c	crypto_alloc_base
+EXPORT_SYMBOL_GPL vmlinux 0xcfcc83ad	register_vt_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xcfda40c9	ata_do_dev_read_id
+EXPORT_SYMBOL_GPL vmlinux 0xd03c7700	secure_ipv4_port_ephemeral
+EXPORT_SYMBOL_GPL vmlinux 0xd07b5e22	ata_sff_prereset
+EXPORT_SYMBOL_GPL vmlinux 0xd0a2ff54	ata_bus_reset
+EXPORT_SYMBOL_GPL vmlinux 0xd0a39336	usb_autopm_put_interface_async
+EXPORT_SYMBOL_GPL vmlinux 0xd0bb725c	net_assign_generic
+EXPORT_SYMBOL_GPL vmlinux 0xd0c05159	emergency_restart
+EXPORT_SYMBOL_GPL vmlinux 0xd0f2fb2c	klist_next
+EXPORT_SYMBOL_GPL vmlinux 0xd10966d3	ide_host_remove
+EXPORT_SYMBOL_GPL vmlinux 0xd10e2570	skb_tstamp_tx
+EXPORT_SYMBOL_GPL vmlinux 0xd12a695c	generic_drop_inode
+EXPORT_SYMBOL_GPL vmlinux 0xd14d7ca6	__class_register
+EXPORT_SYMBOL_GPL vmlinux 0xd155901e	dev_attr_unload_heads
+EXPORT_SYMBOL_GPL vmlinux 0xd16712f3	crypto_check_attr_type
+EXPORT_SYMBOL_GPL vmlinux 0xd1d8adad	atomic_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xd1e6ecd6	ps3_vuart_read
+EXPORT_SYMBOL_GPL vmlinux 0xd1eb8c07	regulator_put
+EXPORT_SYMBOL_GPL vmlinux 0xd1ef9d11	ata_sff_thaw
+EXPORT_SYMBOL_GPL vmlinux 0xd23f22ed	usb_interrupt_msg
+EXPORT_SYMBOL_GPL vmlinux 0xd270b71c	ata_sff_qc_issue
+EXPORT_SYMBOL_GPL vmlinux 0xd273b1b1	__round_jiffies_up_relative
+EXPORT_SYMBOL_GPL vmlinux 0xd273e435	fuse_sync_release
+EXPORT_SYMBOL_GPL vmlinux 0xd2798269	pci_find_ext_capability
+EXPORT_SYMBOL_GPL vmlinux 0xd2a07eec	unregister_kretprobes
+EXPORT_SYMBOL_GPL vmlinux 0xd2a8caf0	work_on_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xd2d2baee	hrtimer_init
+EXPORT_SYMBOL_GPL vmlinux 0xd326ee04	ide_end_rq
+EXPORT_SYMBOL_GPL vmlinux 0xd345ca29	elv_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xd362a762	xfrm_inner_extract_output
+EXPORT_SYMBOL_GPL vmlinux 0xd38639e6	tty_prepare_flip_string
+EXPORT_SYMBOL_GPL vmlinux 0xd386aa0f	inet_twsk_schedule
+EXPORT_SYMBOL_GPL vmlinux 0xd46b86b0	init_dummy_netdev
+EXPORT_SYMBOL_GPL vmlinux 0xd4767c41	tcp_set_state
+EXPORT_SYMBOL_GPL vmlinux 0xd48bd04c	usb_hcd_link_urb_to_ep
+EXPORT_SYMBOL_GPL vmlinux 0xd494ce75	debugfs_create_x8
+EXPORT_SYMBOL_GPL vmlinux 0xd4ae99e9	usb_get_from_anchor
+EXPORT_SYMBOL_GPL vmlinux 0xd53351b4	udp4_lib_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xd535c103	zap_vma_ptes
+EXPORT_SYMBOL_GPL vmlinux 0xd57125f2	bdi_writeout_inc
+EXPORT_SYMBOL_GPL vmlinux 0xd58df8cc	bus_rescan_devices
+EXPORT_SYMBOL_GPL vmlinux 0xd591c19f	sata_std_hardreset
+EXPORT_SYMBOL_GPL vmlinux 0xd5cd221e	xfrm_audit_state_replay_overflow
+EXPORT_SYMBOL_GPL vmlinux 0xd5e485a5	ata_pci_device_resume
+EXPORT_SYMBOL_GPL vmlinux 0xd60fed1a	srcu_read_lock
+EXPORT_SYMBOL_GPL vmlinux 0xd69a6d1c	usb_deregister_device_driver
+EXPORT_SYMBOL_GPL vmlinux 0xd69fd641	usb_get_descriptor
+EXPORT_SYMBOL_GPL vmlinux 0xd6b5280a	usb_remove_hcd
+EXPORT_SYMBOL_GPL vmlinux 0xd6e08d83	ata_link_offline
+EXPORT_SYMBOL_GPL vmlinux 0xd6e13041	__blk_end_request_err
+EXPORT_SYMBOL_GPL vmlinux 0xd705b4c7	schedule_hrtimeout
+EXPORT_SYMBOL_GPL vmlinux 0xd73dc9c4	fib_rules_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xd73ef534	sysdev_resume
+EXPORT_SYMBOL_GPL vmlinux 0xd756868f	relay_reset
+EXPORT_SYMBOL_GPL vmlinux 0xd768e985	regulator_has_full_constraints
+EXPORT_SYMBOL_GPL vmlinux 0xd7923c5f	ata_sff_dev_select
+EXPORT_SYMBOL_GPL vmlinux 0xd7caba27	ata_std_qc_defer
+EXPORT_SYMBOL_GPL vmlinux 0xd7d79132	put_online_cpus
+EXPORT_SYMBOL_GPL vmlinux 0xd7f7f7bf	user_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xd840744e	ata_bmdma_stop
+EXPORT_SYMBOL_GPL vmlinux 0xd8498f4d	ps3av_mode_cs_info
+EXPORT_SYMBOL_GPL vmlinux 0xd863aa86	crypto_mod_put
+EXPORT_SYMBOL_GPL vmlinux 0xd86e15ba	eventfd_signal
+EXPORT_SYMBOL_GPL vmlinux 0xd884de5b	sysdev_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xd8d90595	ide_cd_get_xferlen
+EXPORT_SYMBOL_GPL vmlinux 0xd8db5e1a	hwmon_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xd950e461	user_describe
+EXPORT_SYMBOL_GPL vmlinux 0xd951ce9d	regulator_count_voltages
+EXPORT_SYMBOL_GPL vmlinux 0xd9d8dd5b	device_find_child
+EXPORT_SYMBOL_GPL vmlinux 0xd9eb4b0b	scsi_nl_add_transport
+EXPORT_SYMBOL_GPL vmlinux 0xd9f25354	cpu_remove_sysdev_attr_group
+EXPORT_SYMBOL_GPL vmlinux 0xda1be8e1	async_synchronize_cookie_domain
+EXPORT_SYMBOL_GPL vmlinux 0xda1d25cd	pci_stop_bus_device
+EXPORT_SYMBOL_GPL vmlinux 0xda836e87	ata_host_detach
+EXPORT_SYMBOL_GPL vmlinux 0xdaa2ecaf	blkcipher_walk_done
+EXPORT_SYMBOL_GPL vmlinux 0xdaf4dfb3	fb_mode_option
+EXPORT_SYMBOL_GPL vmlinux 0xdb026f50	tty_ldisc_flush
+EXPORT_SYMBOL_GPL vmlinux 0xdb0ac13b	ps3_compare_firmware_version
+EXPORT_SYMBOL_GPL vmlinux 0xdb15a283	hvc_poll
+EXPORT_SYMBOL_GPL vmlinux 0xdb1b2eba	srcu_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xdb274e52	monotonic_to_bootbased
+EXPORT_SYMBOL_GPL vmlinux 0xdb29a264	set_cpus_allowed_ptr
+EXPORT_SYMBOL_GPL vmlinux 0xdb8755a9	ps3_mmio_region_init
+EXPORT_SYMBOL_GPL vmlinux 0xdb8c8386	clockevents_register_device
+EXPORT_SYMBOL_GPL vmlinux 0xdbc82417	relay_flush
+EXPORT_SYMBOL_GPL vmlinux 0xdbce8cc5	get_cpu_sysdev
+EXPORT_SYMBOL_GPL vmlinux 0xdbfcbc60	ide_host_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xdc07f8fe	atomic_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xdca1540c	usb_hcd_pci_pm_ops
+EXPORT_SYMBOL_GPL vmlinux 0xdced6c58	usb_register_dev
+EXPORT_SYMBOL_GPL vmlinux 0xdd043eea	ps3av_get_auto_mode
+EXPORT_SYMBOL_GPL vmlinux 0xdd04cf4e	xfrm_audit_policy_add
+EXPORT_SYMBOL_GPL vmlinux 0xdd58e793	da903x_write
+EXPORT_SYMBOL_GPL vmlinux 0xdd6a58a6	device_attach
+EXPORT_SYMBOL_GPL vmlinux 0xdd8b0903	ring_buffer_record_enable
+EXPORT_SYMBOL_GPL vmlinux 0xddfcad78	inet6_hash_connect
+EXPORT_SYMBOL_GPL vmlinux 0xde417b81	async_schedule_domain
+EXPORT_SYMBOL_GPL vmlinux 0xde5e9233	rdev_get_dev
+EXPORT_SYMBOL_GPL vmlinux 0xdf2e21db	tcp_cong_avoid_ai
+EXPORT_SYMBOL_GPL vmlinux 0xdf385877	get_user_pages_fast
+EXPORT_SYMBOL_GPL vmlinux 0xdf66858d	__scsi_get_command
+EXPORT_SYMBOL_GPL vmlinux 0xdf7d8263	pci_cleanup_aer_uncorrect_error_status
+EXPORT_SYMBOL_GPL vmlinux 0xdf875a27	fuse_get_req
+EXPORT_SYMBOL_GPL vmlinux 0xdfd94b73	led_trigger_register_simple
+EXPORT_SYMBOL_GPL vmlinux 0xe011f817	ps3flash_bounce_buffer
+EXPORT_SYMBOL_GPL vmlinux 0xe0393841	pci_create_slot
+EXPORT_SYMBOL_GPL vmlinux 0xe057c8bf	disable_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0xe0953e05	crypto_lookup_template
+EXPORT_SYMBOL_GPL vmlinux 0xe0cca33e	xfrm_aead_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0xe0ff307a	crypto_drop_spawn
+EXPORT_SYMBOL_GPL vmlinux 0xe108123d	attribute_container_classdev_to_container
+EXPORT_SYMBOL_GPL vmlinux 0xe13d5fab	ata_bmdma_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0xe14c6849	ide_pad_transfer
+EXPORT_SYMBOL_GPL vmlinux 0xe151550a	nf_unregister_queue_handlers
+EXPORT_SYMBOL_GPL vmlinux 0xe1989d43	bsg_unregister_queue
+EXPORT_SYMBOL_GPL vmlinux 0xe19fc092	ps3fb_videomemory
+EXPORT_SYMBOL_GPL vmlinux 0xe1e1247e	sysfs_remove_file_from_group
+EXPORT_SYMBOL_GPL vmlinux 0xe1e22445	usb_reset_device
+EXPORT_SYMBOL_GPL vmlinux 0xe21e40e8	pmac_i2c_close
+EXPORT_SYMBOL_GPL vmlinux 0xe22884ee	ata_host_register
+EXPORT_SYMBOL_GPL vmlinux 0xe23a7203	scsi_schedule_eh
+EXPORT_SYMBOL_GPL vmlinux 0xe26563ce	fsstack_copy_attr_all
+EXPORT_SYMBOL_GPL vmlinux 0xe281b5ce	ata_port_schedule_eh
+EXPORT_SYMBOL_GPL vmlinux 0xe347537e	transport_configure_device
+EXPORT_SYMBOL_GPL vmlinux 0xe3ab72b0	init_srcu_struct
+EXPORT_SYMBOL_GPL vmlinux 0xe4130678	fuse_do_open
+EXPORT_SYMBOL_GPL vmlinux 0xe49d19f6	ata_eh_qc_complete
+EXPORT_SYMBOL_GPL vmlinux 0xe49ff3b0	ata_wait_register
+EXPORT_SYMBOL_GPL vmlinux 0xe4bbbe24	ring_buffer_iter_empty
+EXPORT_SYMBOL_GPL vmlinux 0xe4ca1471	xfrm_output
+EXPORT_SYMBOL_GPL vmlinux 0xe520c634	dev_attr_sw_activity
+EXPORT_SYMBOL_GPL vmlinux 0xe530071c	pm_qos_remove_requirement
+EXPORT_SYMBOL_GPL vmlinux 0xe583db55	xfrm_audit_state_notfound_simple
+EXPORT_SYMBOL_GPL vmlinux 0xe5adb801	device_create_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0xe5cac6ca	platform_device_add_resources
+EXPORT_SYMBOL_GPL vmlinux 0xe5fc9b83	crypto_grab_aead
+EXPORT_SYMBOL_GPL vmlinux 0xe6488b47	cpufreq_notify_transition
+EXPORT_SYMBOL_GPL vmlinux 0xe651f76e	selinux_is_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xe71f1230	ring_buffer_entries
+EXPORT_SYMBOL_GPL vmlinux 0xe747cfc1	__set_irq_handler
+EXPORT_SYMBOL_GPL vmlinux 0xe78e95e7	generic_fh_to_dentry
+EXPORT_SYMBOL_GPL vmlinux 0xe79018f0	sff_dma_ops
+EXPORT_SYMBOL_GPL vmlinux 0xe7b08068	usb_unpoison_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0xe7c753cf	usb_hcd_poll_rh_status
+EXPORT_SYMBOL_GPL vmlinux 0xe7cc543d	ata_eh_qc_retry
+EXPORT_SYMBOL_GPL vmlinux 0xe7df352f	sock_prot_inuse_get
+EXPORT_SYMBOL_GPL vmlinux 0xe7fc77ed	ata_bmdma_mode_filter
+EXPORT_SYMBOL_GPL vmlinux 0xe7ffe877	pcpu_base_addr
+EXPORT_SYMBOL_GPL vmlinux 0xe862c4b7	dpm_suspend_start
+EXPORT_SYMBOL_GPL vmlinux 0xe862f548	ata_link_next
+EXPORT_SYMBOL_GPL vmlinux 0xe8808c9b	eeh_add_device_tree_late
+EXPORT_SYMBOL_GPL vmlinux 0xe895cefa	ring_buffer_iter_peek
+EXPORT_SYMBOL_GPL vmlinux 0xe8a0c501	led_classdev_register
+EXPORT_SYMBOL_GPL vmlinux 0xe8a6c624	sysfs_add_file_to_group
+EXPORT_SYMBOL_GPL vmlinux 0xe8e25044	regulator_bulk_disable
+EXPORT_SYMBOL_GPL vmlinux 0xe8e4f33e	rtc_read_time
+EXPORT_SYMBOL_GPL vmlinux 0xe901175f	__dev_addr_unsync
+EXPORT_SYMBOL_GPL vmlinux 0xe93e49c3	devres_free
+EXPORT_SYMBOL_GPL vmlinux 0xe9587909	usb_unregister_notify
+EXPORT_SYMBOL_GPL vmlinux 0xe95d5bc1	security_inode_setattr
+EXPORT_SYMBOL_GPL vmlinux 0xea065e01	task_handoff_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xea124bd1	gcd
+EXPORT_SYMBOL_GPL vmlinux 0xea21c219	ata_sff_postreset
+EXPORT_SYMBOL_GPL vmlinux 0xea418e0f	atapi_cmd_type
+EXPORT_SYMBOL_GPL vmlinux 0xea513519	inotify_add_watch
+EXPORT_SYMBOL_GPL vmlinux 0xeab0e3a2	ps3_vuart_port_driver_register
+EXPORT_SYMBOL_GPL vmlinux 0xeabb70c6	transport_destroy_device
+EXPORT_SYMBOL_GPL vmlinux 0xeac62ca8	dm_get_rq_mapinfo
+EXPORT_SYMBOL_GPL vmlinux 0xeae74760	scsi_nl_send_transport_msg
+EXPORT_SYMBOL_GPL vmlinux 0xeae7c3ab	rtc_update_irq
+EXPORT_SYMBOL_GPL vmlinux 0xeb0079f4	ata_cable_80wire
+EXPORT_SYMBOL_GPL vmlinux 0xeb3ca2ff	ata_host_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xeb4c1fc8	__tracepoint_block_remap
+EXPORT_SYMBOL_GPL vmlinux 0xeb57912e	relay_switch_subbuf
+EXPORT_SYMBOL_GPL vmlinux 0xeb58a1bb	rt_mutex_lock_interruptible
+EXPORT_SYMBOL_GPL vmlinux 0xeb6bd037	ide_set_dma_mode
+EXPORT_SYMBOL_GPL vmlinux 0xec1a75a9	__dev_addr_sync
+EXPORT_SYMBOL_GPL vmlinux 0xec1b043e	regulator_suspend_prepare
+EXPORT_SYMBOL_GPL vmlinux 0xec36573f	irq_create_mapping
+EXPORT_SYMBOL_GPL vmlinux 0xec43a97b	device_bind_driver
+EXPORT_SYMBOL_GPL vmlinux 0xeca0f87c	sysfs_create_group
+EXPORT_SYMBOL_GPL vmlinux 0xecb000f7	hrtimer_cancel
+EXPORT_SYMBOL_GPL vmlinux 0xecbf3f01	irq_find_host
+EXPORT_SYMBOL_GPL vmlinux 0xecc6be6a	bus_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xecde64c7	blk_trace_setup
+EXPORT_SYMBOL_GPL vmlinux 0xecfad324	rtc_class_open
+EXPORT_SYMBOL_GPL vmlinux 0xed9661a9	pci_bus_add_device
+EXPORT_SYMBOL_GPL vmlinux 0xedbffc99	single_open_net
+EXPORT_SYMBOL_GPL vmlinux 0xede5b37c	ide_dma_start
+EXPORT_SYMBOL_GPL vmlinux 0xede74815	atomic_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0xedfaeb0e	ata_sff_tf_read
+EXPORT_SYMBOL_GPL vmlinux 0xedffd666	cpu_add_sysdev_attr_group
+EXPORT_SYMBOL_GPL vmlinux 0xee094371	driver_attach
+EXPORT_SYMBOL_GPL vmlinux 0xee25c7d3	pmf_do_functions
+EXPORT_SYMBOL_GPL vmlinux 0xee38cbdd	spi_unregister_master
+EXPORT_SYMBOL_GPL vmlinux 0xee417fa0	input_ff_upload
+EXPORT_SYMBOL_GPL vmlinux 0xee4de2d1	attribute_container_register
+EXPORT_SYMBOL_GPL vmlinux 0xee873d86	__cpufreq_driver_target
+EXPORT_SYMBOL_GPL vmlinux 0xee8bb7f7	__pci_reset_function
+EXPORT_SYMBOL_GPL vmlinux 0xeecac530	klist_add_tail
+EXPORT_SYMBOL_GPL vmlinux 0xeeeaf5b1	inet_diag_register
+EXPORT_SYMBOL_GPL vmlinux 0xeefb53a9	usb_buffer_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xef2c41da	regulator_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xef6c3f70	round_jiffies_up_relative
+EXPORT_SYMBOL_GPL vmlinux 0xef773e5a	spu_handle_mm_fault
+EXPORT_SYMBOL_GPL vmlinux 0xefdd5a63	ktime_get_ts
+EXPORT_SYMBOL_GPL vmlinux 0xefed9dc7	devres_get
+EXPORT_SYMBOL_GPL vmlinux 0xf098dd15	cpu_bit_bitmap
+EXPORT_SYMBOL_GPL vmlinux 0xf0ba8ac8	tcp_get_info
+EXPORT_SYMBOL_GPL vmlinux 0xf0ca507f	rtc_irq_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xf0f3467e	debugfs_create_symlink
+EXPORT_SYMBOL_GPL vmlinux 0xf105d00d	ide_in_drive_list
+EXPORT_SYMBOL_GPL vmlinux 0xf136ab85	debugfs_create_x32
+EXPORT_SYMBOL_GPL vmlinux 0xf141b0dd	anon_transport_class_register
+EXPORT_SYMBOL_GPL vmlinux 0xf1442ef1	ps3_vuart_clear_rx_bytes
+EXPORT_SYMBOL_GPL vmlinux 0xf184d189	kernel_power_off
+EXPORT_SYMBOL_GPL vmlinux 0xf18b9807	swiotlb_map_page
+EXPORT_SYMBOL_GPL vmlinux 0xf18c871d	user_update
+EXPORT_SYMBOL_GPL vmlinux 0xf1afa2cb	unregister_kretprobe
+EXPORT_SYMBOL_GPL vmlinux 0xf1ef73de	xfrm_audit_state_icvfail
+EXPORT_SYMBOL_GPL vmlinux 0xf24e48c6	find_module
+EXPORT_SYMBOL_GPL vmlinux 0xf26e0a57	user_instantiate
+EXPORT_SYMBOL_GPL vmlinux 0xf2b0aff3	save_stack_trace_tsk
+EXPORT_SYMBOL_GPL vmlinux 0xf2f600bd	isa_bridge_pcidev
+EXPORT_SYMBOL_GPL vmlinux 0xf2fc50df	ata_sff_pause
+EXPORT_SYMBOL_GPL vmlinux 0xf3370bd7	ata_do_set_mode
+EXPORT_SYMBOL_GPL vmlinux 0xf34806ec	hrtimer_get_res
+EXPORT_SYMBOL_GPL vmlinux 0xf38c8a96	inotify_remove_watch_locked
+EXPORT_SYMBOL_GPL vmlinux 0xf3a2c3ac	ide_intr
+EXPORT_SYMBOL_GPL vmlinux 0xf3c0c3bb	blk_rq_unprep_clone
+EXPORT_SYMBOL_GPL vmlinux 0xf416a8b5	scsi_nl_add_driver
+EXPORT_SYMBOL_GPL vmlinux 0xf426826c	crypto_ahash_digest
+EXPORT_SYMBOL_GPL vmlinux 0xf4488540	__wake_up_sync
+EXPORT_SYMBOL_GPL vmlinux 0xf469c705	ps3_io_irq_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xf499fdb2	rcu_barrier_bh
+EXPORT_SYMBOL_GPL vmlinux 0xf4aba5b5	ip_route_output_flow
+EXPORT_SYMBOL_GPL vmlinux 0xf4b5ce6a	usb_hcd_unlink_urb_from_ep
+EXPORT_SYMBOL_GPL vmlinux 0xf4cbe6ef	tcp_done
+EXPORT_SYMBOL_GPL vmlinux 0xf51c00fd	proc_net_remove
+EXPORT_SYMBOL_GPL vmlinux 0xf521bda2	cpufreq_unregister_governor
+EXPORT_SYMBOL_GPL vmlinux 0xf52aed65	platform_device_register_simple
+EXPORT_SYMBOL_GPL vmlinux 0xf5384ac1	__trace_printk
+EXPORT_SYMBOL_GPL vmlinux 0xf54bd49b	lcm
+EXPORT_SYMBOL_GPL vmlinux 0xf5799f7a	stop_machine_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xf589b391	inet_twdr_twkill_work
+EXPORT_SYMBOL_GPL vmlinux 0xf59448e5	pci_find_ht_capability
+EXPORT_SYMBOL_GPL vmlinux 0xf5a691cd	invalidate_bh_lrus
+EXPORT_SYMBOL_GPL vmlinux 0xf6a3e1d2	inet_csk_listen_stop
+EXPORT_SYMBOL_GPL vmlinux 0xf6b50586	inet_csk_search_req
+EXPORT_SYMBOL_GPL vmlinux 0xf6b7c0cc	put_inotify_watch
+EXPORT_SYMBOL_GPL vmlinux 0xf6bcbd73	hwrng_register
+EXPORT_SYMBOL_GPL vmlinux 0xf6e874f5	ata_timing_merge
+EXPORT_SYMBOL_GPL vmlinux 0xf70599c7	usb_lock_device_for_reset
+EXPORT_SYMBOL_GPL vmlinux 0xf7182433	ide_port_scan
+EXPORT_SYMBOL_GPL vmlinux 0xf7326f9e	smu_get_ofdev
+EXPORT_SYMBOL_GPL vmlinux 0xf73644a9	usb_ifnum_to_if
+EXPORT_SYMBOL_GPL vmlinux 0xf7377d7b	sysfs_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0xf75c811c	platform_driver_register
+EXPORT_SYMBOL_GPL vmlinux 0xf76726b6	devres_find
+EXPORT_SYMBOL_GPL vmlinux 0xf7699ab6	file_ra_state_init
+EXPORT_SYMBOL_GPL vmlinux 0xf7c822c7	ide_pci_dma_base
+EXPORT_SYMBOL_GPL vmlinux 0xf7d1a47c	crypto_hash_walk_done
+EXPORT_SYMBOL_GPL vmlinux 0xf7e9ceca	usb_scuttle_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0xf7ed3403	skcipher_geniv_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xf80fcd3b	tasklet_hrtimer_init
+EXPORT_SYMBOL_GPL vmlinux 0xf820cc8e	__blocking_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xf83fc93b	ata_do_eh
+EXPORT_SYMBOL_GPL vmlinux 0xf8802492	print_stack_trace
+EXPORT_SYMBOL_GPL vmlinux 0xf8f3a0fb	ata_ratelimit
+EXPORT_SYMBOL_GPL vmlinux 0xf91a3a31	usb_get_current_frame_number
+EXPORT_SYMBOL_GPL vmlinux 0xf93eeba9	init_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0xf95bb431	blocking_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xf964c558	tcp_reno_ssthresh
+EXPORT_SYMBOL_GPL vmlinux 0xf99074ff	ide_register_region
+EXPORT_SYMBOL_GPL vmlinux 0xf9a054b5	__round_jiffies
+EXPORT_SYMBOL_GPL vmlinux 0xf9ab37fa	spi_get_device_id
+EXPORT_SYMBOL_GPL vmlinux 0xf9bb0b33	inet_hash
+EXPORT_SYMBOL_GPL vmlinux 0xf9ca3160	ata_id_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0xf9e1fb1f	register_pernet_device
+EXPORT_SYMBOL_GPL vmlinux 0xf9ec46a5	device_reprobe
+EXPORT_SYMBOL_GPL vmlinux 0xfa239316	inet_twsk_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xfa391698	ata_host_start
+EXPORT_SYMBOL_GPL vmlinux 0xfab5b715	usb_hcd_pci_shutdown
+EXPORT_SYMBOL_GPL vmlinux 0xfae96de1	klist_iter_init_node
+EXPORT_SYMBOL_GPL vmlinux 0xfb5d5fb8	power_supply_changed
+EXPORT_SYMBOL_GPL vmlinux 0xfb843825	tcp_twsk_unique
+EXPORT_SYMBOL_GPL vmlinux 0xfb931376	usb_get_hcd
+EXPORT_SYMBOL_GPL vmlinux 0xfbaa6cb8	tty_ldisc_ref
+EXPORT_SYMBOL_GPL vmlinux 0xfbf29fd6	fuse_dev_release
+EXPORT_SYMBOL_GPL vmlinux 0xfbf9be5d	register_oom_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xfbfcdc2b	ps3_sys_manager_get_wol
+EXPORT_SYMBOL_GPL vmlinux 0xfc0aac0c	kset_create_and_add
+EXPORT_SYMBOL_GPL vmlinux 0xfc4a4b5e	ring_buffer_record_disable
+EXPORT_SYMBOL_GPL vmlinux 0xfc8428e6	fb_deferred_io_cleanup
+EXPORT_SYMBOL_GPL vmlinux 0xfcf59d44	posix_timer_event
+EXPORT_SYMBOL_GPL vmlinux 0xfd24308f	spi_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0xfd3f7ac7	kern_mount_data
+EXPORT_SYMBOL_GPL vmlinux 0xfd477982	inotify_find_watch
+EXPORT_SYMBOL_GPL vmlinux 0xfd5133ca	cpufreq_cpu_put
+EXPORT_SYMBOL_GPL vmlinux 0xfda59960	ps3_mmio_region_create
+EXPORT_SYMBOL_GPL vmlinux 0xfdadef6f	debugfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xfde0b92c	crypto_larval_error
+EXPORT_SYMBOL_GPL vmlinux 0xfdf95192	pskb_put
+EXPORT_SYMBOL_GPL vmlinux 0xfe12f550	regulator_set_voltage
+EXPORT_SYMBOL_GPL vmlinux 0xfe23a575	of_irq_map_raw
+EXPORT_SYMBOL_GPL vmlinux 0xfe925bce	ata_sff_data_xfer32
+EXPORT_SYMBOL_GPL vmlinux 0xfe990052	gpio_free
+EXPORT_SYMBOL_GPL vmlinux 0xfeb3025a	ata_bmdma32_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0xfec81760	dm_disk
+EXPORT_SYMBOL_GPL vmlinux 0xfed11ed1	usb_mon_deregister
+EXPORT_SYMBOL_GPL vmlinux 0xfefa2adb	input_ff_effect_from_user
+EXPORT_SYMBOL_GPL vmlinux 0xff0ab3f7	shash_ahash_digest
+EXPORT_SYMBOL_GPL vmlinux 0xff0dacff	ps3av_video_mute
+EXPORT_SYMBOL_GPL vmlinux 0xff0eb908	ata_host_alloc_pinfo
+EXPORT_SYMBOL_GPL vmlinux 0xff6ef3a3	ata_host_suspend
+EXPORT_SYMBOL_GPL vmlinux 0xffc68f75	blk_insert_cloned_request
+EXPORT_UNUSED_SYMBOL vmlinux 0x00000000	simple_prepare_write
--- linux-mvl-dove-2.6.32.orig/debian.master/abi/2.6.32-34.73/powerpc/powerpc.modules
+++ linux-mvl-dove-2.6.32/debian.master/abi/2.6.32-34.73/powerpc/powerpc.modules
@@ -0,0 +1,2201 @@
+3c359
+3c574_cs
+3c589_cs
+3c59x
+3w-9xxx
+3w-xxxx
+6pack
+8021q
+8139cp
+8139too
+8250
+8250_pci
+8390
+9p
+9pnet
+9pnet_rdma
+9pnet_virtio
+a100u2w
+a3d
+aacraid
+ab3100
+ab3100-core
+ab3100-otp
+abyss
+ac97_bus
+acecad
+acenic
+act200l-sir
+act_gact
+act_ipt
+actisys-sir
+act_mirred
+act_nat
+act_pedit
+act_police
+act_simple
+act_skbedit
+ad1848
+ad7414
+ad7418
+ad7877
+ad7879
+adcxx
+adfs
+adi
+adm1021
+adm1025
+adm1026
+adm1029
+adm1031
+adm8211
+adm9240
+adp5588-keys
+ads7846
+adt7462
+adt7470
+adt7475
+adutux
+adv7170
+adv7175
+adv7180
+adv7343
+advansys
+aedsp16
+aes_generic
+af_802154
+af9013
+affs
+af_key
+af-rxrpc
+agpgart
+ah4
+ah6
+aha152x_cs
+ahci
+aic79xx
+aic7xxx
+aic94xx
+aiptek
+aircable
+airo
+airo_cs
+airport
+alauda
+ali-ircc
+ambassador
+amd8111e
+ams
+analog
+ansi_cprng
+ans-lcd
+anubis
+aoe
+apm_emu
+apm-emulation
+apm_power
+appledisplay
+appletalk
+appletouch
+applicom
+ar7part
+ar9170usb
+arc4
+arcmsr
+arcnet
+arc-rawmode
+arc-rimi
+ark3116
+arkfb
+arptable_filter
+arp_tables
+arpt_mangle
+asix
+async_memcpy
+async_pq
+async_raid6_recov
+async_tx
+async_xor
+at24
+at25
+at76c50x-usb
+ata_generic
+ata_piix
+aten
+ath
+ath9k
+ati_remote
+ati_remote2
+atl1
+atl1c
+atl1e
+atl2
+atm
+atmel
+atmel_cs
+atmel_pci
+atmtcp
+atp870u
+atxp1
+au0828
+au8522
+aufs
+authenc
+auth_rpcgss
+autofs
+autofs4
+ax25
+axnet_cs
+b2c2-flexcop
+b2c2-flexcop-pci
+b2c2-flexcop-usb
+b43
+b43legacy
+b44
+baycom_epp
+baycom_par
+baycom_ser_fdx
+baycom_ser_hdx
+bcm203x
+bcm3510
+bcm5974
+be2iscsi
+be2net
+befs
+belkin_sa
+berry_charge
+bfa
+bfs
+bfusb
+binfmt_misc
+block2mtd
+blowfish
+bluecard_cs
+bluetooth
+bmac
+bnep
+bnx2
+bnx2i
+bonding
+bpa10x
+bpck
+bpck6
+bpqether
+bq24022
+bq27x00_battery
+br2684
+bridge
+briq_panel
+broadcom
+broadsheetfb
+bsd_comp
+bt3c_cs
+bt819
+bt856
+bt866
+bt878
+btcx-risc
+btmrvl
+btmrvl_sdio
+btrfs
+btsdio
+bttv
+btuart_cs
+btusb
+BusLogic
+bw-qcam
+c67x00
+cachefiles
+cafe_ccic
+cafe_nand
+camellia
+can
+can-bcm
+can-dev
+can-raw
+capmode
+carminefb
+cassini
+cast5
+cast6
+catc
+cb710
+cb710-mmc
+cbc
+cciss
+cdc-acm
+cdc_eem
+cdc_ether
+cdc-phonet
+cdc_subset
+cdc-wdm
+cfg80211
+cfi_cmdset_0001
+cfi_cmdset_0002
+cfi_cmdset_0020
+cfi_probe
+cfi_util
+ch
+ch341
+ch7006
+chipreg
+cicada
+cifs
+cirrusfb
+clip
+cls_basic
+cls_flow
+cls_fw
+cls_route
+cls_rsvp
+cls_rsvp6
+cls_tcindex
+cls_u32
+cm109
+cn
+cnic
+cobra
+coda
+com20020
+com20020_cs
+com20020-pci
+com90io
+com90xx
+comm
+configfs
+core
+cp210x
+cpia
+cpia2
+cpia_pp
+cpia_usb
+cpqarray
+cpufreq_stats
+c-qcam
+cramfs
+crc32c
+crc7
+crc-ccitt
+crc-itu-t
+crc-t10dif
+cryptd
+cryptoloop
+crypto_null
+cs5345
+cs53l32a
+cts
+cuse
+cx18
+cx22700
+cx22702
+cx231xx
+cx231xx-alsa
+cx231xx-dvb
+cx2341x
+cx23885
+cx24110
+cx24113
+cx24116
+cx24123
+cx25840
+cx8800
+cx8802
+cx88-alsa
+cx88-blackbird
+cx88-dvb
+cx88-vp3054-i2c
+cx88xx
+cxacru
+cxgb
+cxgb3
+cxgb3i
+cyber2000fb
+cyberjack
+cyclades
+cyclomx
+cycx_drv
+cypress_cy7c63
+cypress_m8
+cytherm
+da9030_battery
+da9034-ts
+da903x
+da903x_bl
+DAC960
+davicom
+db9
+dc395x
+dccp
+dccp_diag
+dccp_ipv4
+dccp_ipv6
+dccp_probe
+de2104x
+de4x5
+de600
+de620
+decnet
+deflate
+defxx
+des_generic
+dib0070
+dib3000mb
+dib3000mc
+dib7000m
+dib7000p
+dib8000
+dibx000_common
+digi_acceleport
+diskonchip
+display
+dl2k
+dlci
+dlm
+dm1105
+dm9601
+dm-crypt
+dme1737
+dmfe
+dm-log
+dm-mirror
+dm-multipath
+dm-queue-length
+dm-region-hash
+dm-round-robin
+dm-service-time
+dm-snapshot
+dmx3191d
+dm-zero
+dnet
+dn_rtmsg
+doc2000
+doc2001
+doc2001plus
+docecc
+docprobe
+donauboe
+dpt_i2o
+drm
+drm_kms_helper
+ds1621
+ds1682
+ds2482
+ds2490
+ds2760_battery
+ds2782_battery
+dsbr100
+dscc4
+dst
+dst_ca
+dstr
+dtl1_cs
+dummy
+dv1394
+dvb-bt8xx
+dvb-core
+dvb-pll
+dvb-ttpci
+dvb-ttusb-budget
+dvb-usb
+dvb-usb-a800
+dvb-usb-af9005
+dvb-usb-af9005-remote
+dvb-usb-af9015
+dvb-usb-anysee
+dvb-usb-au6610
+dvb-usb-ce6230
+dvb-usb-cinergyT2
+dvb-usb-cxusb
+dvb-usb-dib0700
+dvb-usb-dibusb-common
+dvb-usb-dibusb-mb
+dvb-usb-dibusb-mc
+dvb-usb-digitv
+dvb-usb-dtt200u
+dvb-usb-dtv5100
+dvb-usb-dw2102
+dvb-usb-friio
+dvb-usb-gl861
+dvb-usb-gp8psk
+dvb-usb-m920x
+dvb-usb-nova-t-usb2
+dvb-usb-opera
+dvb-usb-ttusb2
+dvb-usb-umt-010
+dvb-usb-vp702x
+dvb-usb-vp7045
+e100
+e1000
+e1000e
+earth-pt1
+eata
+ebt_802_3
+ebtable_broute
+ebtable_filter
+ebtable_nat
+ebtables
+ebt_among
+ebt_arp
+ebt_arpreply
+ebt_dnat
+ebt_ip
+ebt_ip6
+ebt_limit
+ebt_log
+ebt_mark
+ebt_mark_m
+ebt_nflog
+ebt_pkttype
+ebt_redirect
+ebt_snat
+ebt_stp
+ebt_ulog
+ebt_vlan
+ecb
+econet
+ecryptfs
+edac_core
+eeprom
+eeprom_93cx6
+eeti_ts
+efs
+elo
+em28xx
+em28xx-dvb
+em_cmp
+emi26
+emi62
+em_meta
+em_nbyte
+empeg
+ems_pci
+ems_usb
+em_text
+emu10k1-gp
+em_u32
+eni
+enic
+epat
+epca
+epia
+epic100
+eql
+esi-sir
+esp4
+esp6
+et1011c
+et61x251
+eth1394
+ethoc
+evbug
+evdev
+exofs
+exportfs
+f71805f
+f71882fg
+f75375s
+farsync
+fat
+faulty
+fb_sys_fops
+fcoe
+fcrypt
+fdomain
+fdomain_cs
+fealnx
+ff-memless
+firedtv
+firestream
+fit2
+fit3
+floppy
+fm801-gp
+fmvj18x_cs
+forcedeth
+fore_200e
+freevxfs
+friq
+frpw
+fscache
+ftdi-elan
+ftdi_sio
+ftl
+fujitsu_ts
+funsoft
+g760a
+gadgetfs
+gamecon
+gameport
+garmin_gps
+garp
+g_audio
+g_cdc
+gdth
+generic
+generic_bl
+gen_probe
+g_ether
+gf128mul
+gf2k
+g_file_storage
+gfs2
+ghash-generic
+girbil-sir
+gl518sm
+gl520sm
+gl620a
+gluebi
+g_midi
+gpio-addr-flash
+gpio_keys
+gpio_mouse
+gpio_vbus
+g_printer
+grip
+grip_mp
+g_serial
+gspca_conex
+gspca_etoms
+gspca_finepix
+gspca_gl860
+gspca_jeilinj
+gspca_m5602
+gspca_main
+gspca_mars
+gspca_mr97310a
+gspca_ov519
+gspca_ov534
+gspca_pac207
+gspca_pac7311
+gspca_sn9c20x
+gspca_sonixb
+gspca_sonixj
+gspca_spca500
+gspca_spca501
+gspca_spca505
+gspca_spca506
+gspca_spca508
+gspca_spca561
+gspca_sq905
+gspca_sq905c
+gspca_stk014
+gspca_stv06xx
+gspca_sunplus
+gspca_t613
+gspca_tv8532
+gspca_vc032x
+gspca_zc3xx
+gtco
+guillemot
+gunze
+gxt4500
+g_zero
+hamachi
+hci_uart
+hci_vhci
+hdlc
+hdlc_cisco
+hdlcdrv
+hdlc_fr
+hdlc_ppp
+hdlc_raw
+hdlc_raw_eth
+hdlc_x25
+hdpvr
+he
+hexium_gemini
+hexium_orion
+hfs
+hfsplus
+hid
+hid-3m-pct
+hid-a4tech
+hid-apple
+hid-belkin
+hid-cherry
+hid-chicony
+hid-cypress
+hid-drff
+hid-ezkey
+hid-gaff
+hid-gyration
+hid-kensington
+hid-kye
+hid-logitech
+hid-microsoft
+hid-monterey
+hid-mosart
+hid-ntrig
+hid-ortek
+hidp
+hid-petalynx
+hid-pl
+hid-quanta
+hid-samsung
+hid-sjoy
+hid-sony
+hid-stantum
+hid-sunplus
+hid-tmff
+hid-topseed
+hid-twinhan
+hid-wacom
+hid-zpff
+horizon
+hostap
+hostap_cs
+hostap_pci
+hostap_plx
+hp100
+hp4x
+hpfs
+hpilo
+hptiop
+hso
+htc-pasic3
+hwa-hc
+hwa-rc
+hwmon-vid
+i1480-dfu-usb
+i1480-est
+i1480u-wlp
+i2400m
+i2400m-sdio
+i2400m-usb
+i2c-algo-pca
+i2c-ali1535
+i2c-ali1563
+i2c-ali15x3
+i2c-amd756
+i2c-amd8111
+i2c-dev
+i2c-gpio
+i2c-hydra
+i2c-i801
+i2c-isch
+i2c-matroxfb
+i2c-mpc
+i2c-nforce2
+i2c-ocores
+i2c-parport
+i2c-parport-light
+i2c-pca-platform
+i2c-piix4
+i2c-simtec
+i2c-sis5595
+i2c-sis630
+i2c-sis96x
+i2c-stub
+i2c-taos-evm
+i2c-tiny-usb
+i2c-via
+i2c-viapro
+i2c-voodoo3
+i2o_block
+i2o_bus
+i2o_config
+i2o_core
+i2o_proc
+i2o_scsi
+i5k_amb
+i82092
+ib_addr
+ib_cm
+ib_core
+ib_ipoib
+ib_iser
+ib_mad
+ibmaem
+ibmcam
+ibmpex
+ib_mthca
+ibmtr_cs
+ib_sa
+ib_srp
+ib_ucm
+ib_umad
+ib_uverbs
+icplus
+ics932s401
+idmouse
+idt77252
+ieee1394
+ifb
+iforce
+igbvf
+ili9320
+imm
+inexio
+inftl
+initio
+input-polldev
+int51x1
+intel_vr_nor
+interact
+ioc4
+io_edgeport
+io_ti
+iowarrior
+ip2
+ip6_queue
+ip6table_filter
+ip6table_mangle
+ip6table_raw
+ip6_tables
+ip6table_security
+ip6t_ah
+ip6t_eui64
+ip6t_frag
+ip6t_hbh
+ip6t_ipv6header
+ip6t_LOG
+ip6t_mh
+ip6t_REJECT
+ip6t_rt
+ip6_tunnel
+ipaq
+ipcomp
+ipcomp6
+ipddp
+ipg
+ip_gre
+iphase
+ipip
+ipmi_devintf
+ipmi_msghandler
+ipmi_poweroff
+ipmi_si
+ipmi_watchdog
+ip_queue
+ipr
+ips
+iptable_filter
+iptable_mangle
+iptable_nat
+iptable_raw
+ip_tables
+iptable_security
+ipt_addrtype
+ipt_ah
+ipt_CLUSTERIP
+ipt_ecn
+ipt_ECN
+ipt_LOG
+ipt_MASQUERADE
+ipt_NETMAP
+ipt_REDIRECT
+ipt_REJECT
+ipt_ULOG
+ipv6
+ip_vs
+ip_vs_dh
+ip_vs_ftp
+ip_vs_lblc
+ip_vs_lblcr
+ip_vs_lc
+ip_vs_nq
+ip_vs_rr
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+ipw
+ipw2100
+ipw2200
+ipx
+ircomm
+ir-common
+ircomm-tty
+irda
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+irlan
+irnet
+irtty-sir
+ir-usb
+iscsi_tcp
+iscsi_trgt
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+isp1362-hcd
+isp1760
+istallion
+it87
+itd1000
+iuu_phoenix
+ivtv
+ivtvfb
+iw_c2
+iw_cm
+iw_cxgb3
+iwlagn
+iwlcore
+iwmc3200wifi
+ixgb
+ixgbe
+ixj
+ixj_pcmcia
+jedec_probe
+jffs2
+jfs
+jme
+joydev
+joydump
+jsm
+kafs
+kahlua
+kaweth
+kbic
+kbtab
+keyspan
+keyspan_pda
+keyspan_remote
+khazad
+kingsun-sir
+kl5kusb105
+kobil_sct
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+ks8842
+ks8851
+ks8851_mll
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+ksdazzle-sir
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+kyrofb
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+lanstreamer
+lapb
+lapbether
+lcd
+ldusb
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+leds-da903x
+leds-dac124s085
+leds-lp3944
+leds-wm831x-status
+leds-wm8350
+ledtrig-backlight
+ledtrig-gpio
+legousbtower
+lgdt3305
+lgdt330x
+lgs8gxx
+lib80211
+lib80211_crypt_ccmp
+lib80211_crypt_tkip
+lib80211_crypt_wep
+libcrc32c
+libertas
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+libertas_sdio
+libertas_spi
+libertas_tf
+libertas_tf_usb
+libfc
+libfcoe
+libipw
+libiscsi
+libiscsi_tcp
+libosd
+libsas
+libsrp
+lightning
+linear
+lirc_atiusb
+lirc_bt829
+lirc_dev
+lirc_ene0100
+lirc_i2c
+lirc_igorplugusb
+lirc_imon
+lirc_it87
+lirc_ite8709
+lirc_mceusb
+lirc_sasem
+lirc_serial
+lirc_sir
+lirc_streamzap
+lirc_ttusbir
+lis3lv02d
+lis3lv02d_spi
+litelink-sir
+lkkbd
+llc2
+lm63
+lm70
+lm75
+lm77
+lm78
+lm80
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+lm85
+lm87
+lm90
+lm92
+lm93
+lm95241
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+lms283gf05
+lnbp21
+lockd
+loop
+lp
+lp3971
+lpddr_cmds
+lpfc
+lrw
+ltc4215
+ltc4245
+ltv350qv
+lxt
+lzo
+lzo_compress
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+m25p80
+m52790
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+mac53c94
+mac80211
+mac80211_hwsim
+mace
+macvlan
+magellan
+map_absent
+map_funcs
+map_ram
+map_rom
+marvell
+matrix_keypad
+matroxfb_maven
+matrox_w1
+max1111
+max1586
+max1619
+max17040_battery
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+max6650
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+max7301
+max732x
+max7359_keypad
+mb862xxfb
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+mc13783-core
+mc33880
+mc44s803
+mcp2120-sir
+mcp23s08
+mcs5000_ts
+mcs7780
+mcs7830
+mct_u232
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+mdc800
+mdio
+mdio-bitbang
+mdio-gpio
+md-mod
+megaraid
+megaraid_mbox
+megaraid_mm
+megaraid_sas
+mesh
+metronomefb
+mfd-core
+mga
+michael_mic
+microtek
+mii
+minix
+mk712
+mkiss
+mlx4_core
+mlx4_en
+mlx4_ib
+mmc_block
+mmc_core
+mos7720
+mos7840
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+moxa
+mpoa
+mpt2sas
+mptbase
+mptctl
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+mptlan
+mptsas
+mptscsih
+mptspi
+mpu401
+msdos
+msp3400
+mt2060
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+mt9v022
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+mtdblock_ro
+mtdchar
+mtdconcat
+mtd_dataflash
+mtd_oobtest
+mtdoops
+mtd_pagetest
+mtdram
+mtd_readtest
+mtd_speedtest
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+mtd_subpagetest
+mtd_torturetest
+mtouch
+multipath
+mv643xx_eth
+mwl8k
+mxl5005s
+mxl5007t
+myri10ge
+nand
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+nand_ids
+nandsim
+national
+natsemi
+navman
+nbd
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+ne2k-pci
+neofb
+net1080
+net2280
+netconsole
+netrom
+netwave_cs
+netxen_nic
+newtonkbd
+nf_conntrack
+nf_conntrack_amanda
+nf_conntrack_ftp
+nf_conntrack_h323
+nf_conntrack_ipv4
+nf_conntrack_ipv6
+nf_conntrack_irc
+nf_conntrack_netbios_ns
+nf_conntrack_netlink
+nf_conntrack_pptp
+nf_conntrack_proto_dccp
+nf_conntrack_proto_gre
+nf_conntrack_proto_sctp
+nf_conntrack_proto_udplite
+nf_conntrack_sane
+nf_conntrack_sip
+nf_conntrack_tftp
+nf_defrag_ipv4
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+nf_nat_amanda
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+nf_nat_proto_dccp
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+nfnetlink
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+nf_tproxy_core
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+nilfs2
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+ocfs2_stack_o2cb
+ocfs2_stack_user
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+olympic
+omfs
+omninet
+on20
+on26
+onenand
+onenand_sim
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+opl3
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+oti6858
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+p54common
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+pas2
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+pata_sil680
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+pcf50633-input
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+pcf857x
+pcf8591
+pci
+pci200syn
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+pcips2
+pcmcia
+pcmcia_core
+pcnet32
+pcnet_cs
+pcspkr
+pcwd_pci
+pcwd_usb
+pd
+pd6729
+pda_power
+pdc_adma
+pegasus
+penmount
+pf
+pg
+phantom
+phonedev
+phonet
+phram
+physmap
+physmap_of
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+pktgen
+pl2303
+platform_lcd
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+ppa
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+prism54
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+r128
+r8169
+r8a66597-hcd
+rack-meter
+radeon
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+radio-i2c-si470x
+radio-maestro
+radio-maxiradio
+radio-mr800
+radio-si4713
+radio-tea5764
+raid0
+raid1
+raid10
+raid456
+raid6_pq
+raid6test
+raid_class
+ramzswap
+raw
+raw1394
+ray_cs
+rdma_cm
+rdma_ucm
+redboot
+reed_solomon
+reiserfs
+rfc1051
+rfc1201
+rfcomm
+rfd_ftl
+rfkill
+ricoh_mmc
+rio500
+riscom8
+rivafb
+rmd128
+rmd160
+rmd256
+rmd320
+rndis_host
+rocket
+romfs
+rose
+rotary_encoder
+rpcsec_gss_krb5
+rpcsec_gss_spkm3
+rrunner
+rsrc_nonstatic
+rt2400pci
+rt2500pci
+rt2500usb
+rt2800usb
+rt2x00lib
+rt2x00pci
+rt2x00usb
+rt61pci
+rt73usb
+rtc-ab3100
+rtc-bq4802
+rtc-cmos
+rtc_cmos_setup
+rtc-ds1286
+rtc-ds1305
+rtc-ds1307
+rtc-ds1374
+rtc-ds1390
+rtc-ds1511
+rtc-ds1553
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+rtc-ds1742
+rtc-ds3234
+rtc-fm3130
+rtc-generic
+rtc-isl1208
+rtc-m41t80
+rtc-m41t94
+rtc-m48t35
+rtc-m48t59
+rtc-m48t86
+rtc-max6900
+rtc-max6902
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+rtc-pcf50633
+rtc-pcf8563
+rtc-pcf8583
+rtc-r9701
+rtc-rs5c348
+rtc-rs5c372
+rtc-rx8025
+rtc-rx8581
+rtc-s35390a
+rtc-stk17ta8
+rtc-twl4030
+rtc-v3020
+rtc-wm831x
+rtc-wm8350
+rtc-x1205
+rtl8150
+rtl8187
+rxkad
+s1d13xxxfb
+s2255drv
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+saa7134-empress
+saa7146
+saa7146_vv
+saa7164
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+sata_inic162x
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+sata_sil24
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+sata_sx4
+sata_uli
+sata_via
+sata_vsc
+savage
+savagefb
+sb
+sb_lib
+sbp2
+sc92031
+sch_atm
+sch_cbq
+sch_drr
+sch_dsmark
+sch_gred
+sch_hfsc
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+sch_multiq
+sch_netem
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+sch_red
+sch_sfq
+sch_tbf
+sch_teql
+sco
+scsi_debug
+scsi_dh
+scsi_dh_alua
+scsi_dh_emc
+scsi_dh_hp_sw
+scsi_dh_rdac
+scsi_tgt
+scsi_transport_fc
+scsi_transport_iscsi
+scsi_transport_sas
+scsi_transport_spi
+scsi_transport_srp
+scsi_wait_scan
+sctp
+sdhci
+sdhci-of
+sdhci-pci
+sdhci-pltfm
+sdio_uart
+sd_mod
+sdricoh_cs
+se401
+seed
+serial_core
+serial_cs
+serio_raw
+sermouse
+serpent
+serport
+sfc
+sg
+sha1_generic
+sha256_generic
+sha512_generic
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+sierra
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+sis5595
+sis900
+sisfb
+sisusbvga
+sit
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+sja1000_of_platform
+sja1000_platform
+skfp
+skge
+sky2
+sl811_cs
+sl811-hcd
+slhc
+slip
+slram
+sm501
+sm501fb
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+smc91c92_cs
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+smsc47b397
+smsc47m1
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+smsc95xx
+smsc-ircc2
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+smsmdtv
+smssdio
+smsusb
+sn9c102
+snd
+snd-ac97-codec
+snd-ad1889
+snd-ak4114
+snd-ak4117
+snd-ak4xxx-adda
+snd-ali5451
+snd-als300
+snd-als4000
+snd-aoa
+snd-aoa-codec-onyx
+snd-aoa-codec-tas
+snd-aoa-codec-toonie
+snd-aoa-fabric-layout
+snd-aoa-i2sbus
+snd-aoa-soundbus
+snd-atiixp
+snd-atiixp-modem
+snd-au8810
+snd-au8820
+snd-au8830
+snd-aw2
+snd-azt3328
+snd-bt87x
+snd-ca0106
+snd-cmipci
+snd-cs4281
+snd-cs46xx
+snd-cs5530
+snd-cs5535audio
+snd-cs8427
+snd-ctxfi
+snd-darla20
+snd-darla24
+snd-dummy
+snd-echo3g
+snd-emu10k1
+snd-emu10k1-synth
+snd-emu10k1x
+snd-emux-synth
+snd-ens1370
+snd-ens1371
+snd-es1938
+snd-es1968
+snd-fm801
+snd-gina20
+snd-gina24
+snd-hda-codec
+snd-hda-codec-analog
+snd-hda-codec-atihdmi
+snd-hda-codec-ca0110
+snd-hda-codec-cirrus
+snd-hda-codec-cmedia
+snd-hda-codec-conexant
+snd-hda-codec-idt
+snd-hda-codec-intelhdmi
+snd-hda-codec-nvhdmi
+snd-hda-codec-realtek
+snd-hda-codec-si3054
+snd-hda-codec-via
+snd-hda-intel
+snd-hdsp
+snd-hdspm
+snd-hrtimer
+snd-hwdep
+snd-i2c
+snd-ice1712
+snd-ice1724
+snd-ice17xx-ak4xxx
+snd-indigo
+snd-indigodj
+snd-indigodjx
+snd-indigoio
+snd-indigoiox
+snd-intel8x0
+snd-intel8x0m
+snd-korg1212
+snd-layla20
+snd-layla24
+snd-lx6464es
+snd-maestro3
+snd-mia
+snd-mixart
+snd-mixer-oss
+snd-mona
+snd-mpu401
+snd-mpu401-uart
+snd-mtpav
+snd-mts64
+snd-nm256
+snd-opl3-lib
+snd-opl3-synth
+snd-page-alloc
+snd-pcm
+snd-pcm-oss
+snd-pcxhr
+snd-pdaudiocf
+snd-portman2x4
+snd-powermac
+snd-pt2258
+snd-rawmidi
+snd-riptide
+snd-rme32
+snd-rme96
+snd-rme9652
+snd-sb16-dsp
+snd-sb-common
+snd-seq
+snd-seq-device
+snd-seq-dummy
+snd-seq-midi
+snd-seq-midi-emul
+snd-seq-midi-event
+snd-seq-oss
+snd-seq-virmidi
+snd-serial-u16550
+snd-soc-ad1836
+snd-soc-ad1938
+snd-soc-ad73311
+snd-soc-ak4104
+snd-soc-ak4535
+snd-soc-ak4642
+snd-soc-core
+snd-soc-cs4270
+snd-soc-l3
+snd-soc-max9877
+snd-soc-pcm3008
+snd-soc-spdif
+snd-soc-ssm2602
+snd-soc-tlv320aic23
+snd-soc-tlv320aic26
+snd-soc-tlv320aic3x
+snd-soc-twl4030
+snd-soc-uda134x
+snd-soc-uda1380
+snd-soc-wm8350
+snd-soc-wm8400
+snd-soc-wm8510
+snd-soc-wm8523
+snd-soc-wm8580
+snd-soc-wm8728
+snd-soc-wm8731
+snd-soc-wm8750
+snd-soc-wm8753
+snd-soc-wm8776
+snd-soc-wm8900
+snd-soc-wm8903
+snd-soc-wm8940
+snd-soc-wm8960
+snd-soc-wm8961
+snd-soc-wm8971
+snd-soc-wm8974
+snd-soc-wm8988
+snd-soc-wm8990
+snd-soc-wm8993
+snd-soc-wm9081
+snd-soc-wm-hubs
+snd-sonicvibes
+snd-tea575x-tuner
+snd-timer
+snd-trident
+snd-usb-audio
+snd-usb-caiaq
+snd-usb-lib
+snd-usb-usx2y
+snd-util-mem
+snd-via82xx
+snd-via82xx-modem
+snd-virmidi
+snd-vx222
+snd-vx-lib
+snd-vxpocket
+snd-ymfpci
+soc_camera
+soc_camera_platform
+softdog
+solos-pci
+sound
+soundcore
+sound_firmware
+sp8870
+sp887x
+spaceball
+spaceorb
+spcp8x5
+specialix
+spectrum_cs
+speedtch
+spi_bitbang
+spi_butterfly
+spidev
+spi_gpio
+spi_lm70llp
+squashfs
+sr_mod
+ssb
+sscape
+ssfdc
+sst25l
+st
+stallion
+starfire
+stb6000
+ste10Xp
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+stinger
+stir4200
+stowaway
+stp
+stradis
+strip
+stv0288
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+stv0900
+stv6110
+stv680
+sundance
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+sungem_phy
+sunhme
+suni
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+sunrpc
+svcrdma
+svgalib
+swim3
+sx8
+sym53c500_cs
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+symbolserial
+synaptics_i2c
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+synclink_cs
+synclink_gt
+synclinkmp
+syscopyarea
+sysfillrect
+sysimgblt
+sysv
+tcm825x
+tcp_bic
+tcp_highspeed
+tcp_htcp
+tcp_hybla
+tcp_illinois
+tcp_lp
+tcp_probe
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+tcp_vegas
+tcp_veno
+tcp_westwood
+tcp_yeah
+tcrypt
+tda10021
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+tea6415c
+tea6420
+tehuti
+tekram-sir
+tg3
+tgr192
+therm_adt746x
+therm_windtunnel
+thmc50
+ths7303
+tifm_7xx1
+tifm_core
+tifm_sd
+timeriomem-rng
+tipc
+ti_usb_3410_5052
+tlan
+tle62x0
+tlv320aic23b
+tmdc
+tmiofb
+tmp401
+tmp421
+tms380tr
+tmscsim
+tmspci
+toim3232-sir
+touchit213
+touchright
+touchwin
+tpm
+tpm_atmel
+tpm_nsc
+tps65010
+tps65023-regulator
+tps6507x-regulator
+trancevibrator
+tridentfb
+trix
+ts_bm
+tsc2007
+ts_fsm
+ts_kmp
+tsl2550
+ttm
+ttpci-eeprom
+ttusb_dec
+ttusbdecfe
+tulip
+tuner
+tuner-simple
+tuner-types
+tuner-xc2028
+tunnel4
+tunnel6
+turbografx
+tvaudio
+tveeprom
+tvp514x
+tvp5150
+tw9910
+twidjoy
+twl4030-gpio
+twl4030_keypad
+twl4030-pwrbutton
+twl4030-usb
+twl4030_wdt
+twofish
+twofish_common
+typhoon
+u132-hcd
+uart401
+uart6850
+uartlite
+ubi
+ubifs
+ucb1400_core
+ucb1400_ts
+udf
+ueagle-atm
+ufs
+uinput
+uio
+uio_aec
+uio_cif
+uio_pci_generic
+uio_pdrv
+uio_pdrv_genirq
+uio_sercos3
+uio_smx
+uli526x
+ultracam
+umc
+umem
+ums-alauda
+ums-cypress
+ums-datafab
+ums-freecom
+ums-isd200
+ums-jumpshot
+ums-karma
+ums-onetouch
+ums-sddr09
+ums-sddr55
+ums-usbat
+uninorth-agp
+upd64031a
+upd64083
+uPD98402
+usb8xxx
+usbatm
+usb_debug
+usbhid
+usblcd
+usbled
+usblp
+usbnet
+usbserial
+usbsevseg
+usb-storage
+usbtest
+usbtmc
+usbtouchscreen
+usbvideo
+usbvision
+userspace-consumer
+uss720
+uvcvideo
+uvesafb
+uwb
+v4l1-compat
+v4l2-common
+v4l2-int-device
+vcan
+ves1820
+ves1x93
+veth
+vfat
+vgastate
+vgg2432a4
+via
+via686a
+viafb
+via-ircc
+via-rhine
+via-sdmmc
+via-velocity
+vicam
+video1394
+videobuf-core
+videobuf-dma-sg
+videobuf-dvb
+videobuf-vmalloc
+videocodec
+videodev
+virtio
+virtio_balloon
+virtio_blk
+virtio_console
+virtio_net
+virtio_pci
+virtio_ring
+virtio-rng
+virtual
+visor
+vitesse
+vivi
+vlsi_ir
+vmac
+v_midi
+vp27smpx
+vpx3220
+vstusb
+vsxxxaa
+vt1211
+vt8231
+vt8623fb
+vxge
+w1_bq27000
+w1_ds2431
+w1_ds2433
+w1_ds2760
+w1-gpio
+w1_smem
+w1_therm
+w83627ehf
+w83627hf
+w83781d
+w83791d
+w83792d
+w83793
+w83977af_ir
+w83l785ts
+w9966
+w9968cf
+wacom_w8001
+walkera0701
+wanrouter
+wanxl
+warrior
+wavelan_cs
+wbsd
+wdrtas
+wdt_pci
+whci
+whci-hcd
+whc-rc
+whiteheat
+wimax
+winbond-840
+windfarm_core
+wire
+wl1251
+wl1251_sdio
+wl1251_spi
+wl1271
+wl3501_cs
+wlp
+wm831x
+wm831x_bl
+wm831x-dcdc
+wm831x-gpio
+wm831x-hwmon
+wm831x-isink
+wm831x-ldo
+wm831x-on
+wm831x_power
+wm831x_wdt
+wm8350
+wm8350-hwmon
+wm8350-i2c
+wm8350_power
+wm8350-regulator
+wm8350_wdt
+wm8400-core
+wm8400-regulator
+wm8739
+wm8775
+wm97xx-ts
+wp512
+wpan-class
+wusb-cbaf
+wusbcore
+wusb-wa
+x25
+x25_asy
+xc5000
+xcbc
+xfrm4_mode_beet
+xfrm4_mode_transport
+xfrm4_mode_tunnel
+xfrm4_tunnel
+xfrm6_mode_beet
+xfrm6_mode_ro
+xfrm6_mode_transport
+xfrm6_mode_tunnel
+xfrm6_tunnel
+xfrm_ipcomp
+xfrm_user
+xfs
+xhci
+xilinx_emaclite
+xilinx_ps2
+xirc2ps_cs
+xircom_cb
+xor
+xpad
+xprtrdma
+x_tables
+xt_CLASSIFY
+xt_cluster
+xt_comment
+xt_connbytes
+xt_connlimit
+xt_connmark
+xt_CONNMARK
+xt_CONNSECMARK
+xt_conntrack
+xt_dccp
+xt_dscp
+xt_DSCP
+xt_esp
+xt_hashlimit
+xt_helper
+xt_hl
+xt_HL
+xtkbd
+xt_LED
+xt_length
+xt_limit
+xt_mac
+xt_mark
+xt_MARK
+xt_multiport
+xt_NFLOG
+xt_NFQUEUE
+xt_NOTRACK
+xt_osf
+xt_physdev
+xt_pkttype
+xt_policy
+xt_quota
+xt_realm
+xt_recent
+xts
+xt_sctp
+xt_SECMARK
+xt_socket
+xt_state
+xt_statistic
+xt_string
+xt_tcpmss
+xt_TCPMSS
+xt_tcpudp
+xt_time
+xt_TPROXY
+xt_TRACE
+xt_u32
+xusbatm
+xvmalloc
+yam
+yealink
+yellowfin
+yenta_socket
+zatm
+zc0301
+zd1201
+zd1211rw
+zhenhua
+zl10036
+zl10039
+zl10353
+zlib
+zlib_deflate
+zr36016
+zr36050
+zr36060
+zr36067
+zr364xx
--- linux-mvl-dove-2.6.32.orig/debian.master/abi/2.6.32-34.73/powerpc/powerpc-smp.modules
+++ linux-mvl-dove-2.6.32/debian.master/abi/2.6.32-34.73/powerpc/powerpc-smp.modules
@@ -0,0 +1,2196 @@
+3c359
+3c574_cs
+3c589_cs
+3c59x
+3w-9xxx
+3w-xxxx
+6pack
+8021q
+8139cp
+8139too
+8250
+8250_pci
+8390
+9p
+9pnet
+9pnet_rdma
+9pnet_virtio
+a100u2w
+a3d
+aacraid
+ab3100
+ab3100-core
+ab3100-otp
+abyss
+ac97_bus
+acecad
+acenic
+act200l-sir
+act_gact
+act_ipt
+actisys-sir
+act_mirred
+act_nat
+act_pedit
+act_police
+act_simple
+act_skbedit
+ad1848
+ad7414
+ad7418
+ad7877
+ad7879
+adcxx
+adfs
+adi
+adm1021
+adm1025
+adm1026
+adm1029
+adm1031
+adm8211
+adm9240
+adp5588-keys
+ads7846
+adt7462
+adt7470
+adt7475
+adutux
+adv7170
+adv7175
+adv7180
+adv7343
+advansys
+aedsp16
+aes_generic
+af_802154
+af9013
+affs
+af_key
+af-rxrpc
+agpgart
+ah4
+ah6
+aha152x_cs
+ahci
+aic79xx
+aic7xxx
+aic94xx
+aiptek
+aircable
+airo
+airo_cs
+airport
+alauda
+ali-ircc
+ambassador
+amd8111e
+ams
+analog
+ansi_cprng
+ans-lcd
+anubis
+aoe
+apm_emu
+apm-emulation
+apm_power
+appledisplay
+appletalk
+appletouch
+applicom
+ar7part
+ar9170usb
+arc4
+arcmsr
+arcnet
+arc-rawmode
+arc-rimi
+ark3116
+arkfb
+arptable_filter
+arp_tables
+arpt_mangle
+asix
+async_memcpy
+async_pq
+async_raid6_recov
+async_tx
+async_xor
+at24
+at25
+at76c50x-usb
+ata_generic
+ata_piix
+aten
+ath
+ath9k
+ati_remote
+ati_remote2
+atl1
+atl1c
+atl1e
+atl2
+atm
+atmel
+atmel_cs
+atmel_pci
+atmtcp
+atp870u
+atxp1
+au0828
+au8522
+aufs
+authenc
+auth_rpcgss
+autofs
+autofs4
+ax25
+axnet_cs
+b2c2-flexcop
+b2c2-flexcop-pci
+b2c2-flexcop-usb
+b43
+b43legacy
+b44
+baycom_epp
+baycom_par
+baycom_ser_fdx
+baycom_ser_hdx
+bcm203x
+bcm3510
+bcm5974
+be2iscsi
+be2net
+befs
+belkin_sa
+berry_charge
+bfa
+bfs
+bfusb
+binfmt_misc
+block2mtd
+blowfish
+bluecard_cs
+bluetooth
+bmac
+bnep
+bnx2
+bnx2i
+bonding
+bpa10x
+bpck
+bpck6
+bpqether
+bq24022
+bq27x00_battery
+br2684
+bridge
+briq_panel
+broadcom
+broadsheetfb
+bsd_comp
+bt3c_cs
+bt819
+bt856
+bt866
+bt878
+btcx-risc
+btmrvl
+btmrvl_sdio
+btrfs
+btsdio
+bttv
+btuart_cs
+btusb
+BusLogic
+bw-qcam
+c67x00
+cachefiles
+cafe_ccic
+cafe_nand
+camellia
+can
+can-bcm
+can-dev
+can-raw
+capmode
+carminefb
+cassini
+cast5
+cast6
+catc
+cb710
+cb710-mmc
+cbc
+cciss
+cdc-acm
+cdc_eem
+cdc_ether
+cdc-phonet
+cdc_subset
+cdc-wdm
+cfg80211
+cfi_cmdset_0001
+cfi_cmdset_0002
+cfi_cmdset_0020
+cfi_probe
+cfi_util
+ch
+ch341
+ch7006
+chipreg
+cicada
+cifs
+cirrusfb
+clip
+cls_basic
+cls_flow
+cls_fw
+cls_route
+cls_rsvp
+cls_rsvp6
+cls_tcindex
+cls_u32
+cm109
+cn
+cnic
+cobra
+coda
+com20020
+com20020_cs
+com20020-pci
+com90io
+com90xx
+comm
+configfs
+core
+cp210x
+cpia
+cpia2
+cpia_pp
+cpia_usb
+cpqarray
+cpufreq_stats
+c-qcam
+cramfs
+crc32c
+crc7
+crc-ccitt
+crc-itu-t
+crc-t10dif
+cryptd
+cryptoloop
+crypto_null
+cs5345
+cs53l32a
+cts
+cuse
+cx18
+cx22700
+cx22702
+cx231xx
+cx231xx-alsa
+cx231xx-dvb
+cx2341x
+cx23885
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+cx8802
+cx88-alsa
+cx88-blackbird
+cx88-dvb
+cx88-vp3054-i2c
+cx88xx
+cxacru
+cxgb
+cxgb3
+cxgb3i
+cyber2000fb
+cyberjack
+cyclades
+cyclomx
+cycx_drv
+cypress_cy7c63
+cypress_m8
+cytherm
+da9030_battery
+da9034-ts
+da903x
+da903x_bl
+DAC960
+davicom
+db9
+dc395x
+dccp
+dccp_diag
+dccp_ipv4
+dccp_ipv6
+dccp_probe
+de2104x
+de4x5
+de600
+de620
+decnet
+deflate
+defxx
+des_generic
+dib0070
+dib3000mb
+dib3000mc
+dib7000m
+dib7000p
+dib8000
+dibx000_common
+digi_acceleport
+diskonchip
+display
+dl2k
+dlci
+dlm
+dm1105
+dm9601
+dm-crypt
+dme1737
+dmfe
+dm-log
+dm-mirror
+dm-multipath
+dm-queue-length
+dm-region-hash
+dm-round-robin
+dm-service-time
+dm-snapshot
+dmx3191d
+dm-zero
+dnet
+dn_rtmsg
+doc2000
+doc2001
+doc2001plus
+docecc
+docprobe
+donauboe
+dpt_i2o
+drm
+drm_kms_helper
+ds1621
+ds1682
+ds2482
+ds2490
+ds2760_battery
+ds2782_battery
+dsbr100
+dscc4
+dst
+dst_ca
+dstr
+dtl1_cs
+dummy
+dv1394
+dvb-bt8xx
+dvb-core
+dvb-pll
+dvb-ttpci
+dvb-ttusb-budget
+dvb-usb
+dvb-usb-a800
+dvb-usb-af9005
+dvb-usb-af9005-remote
+dvb-usb-af9015
+dvb-usb-anysee
+dvb-usb-au6610
+dvb-usb-ce6230
+dvb-usb-cinergyT2
+dvb-usb-cxusb
+dvb-usb-dib0700
+dvb-usb-dibusb-common
+dvb-usb-dibusb-mb
+dvb-usb-dibusb-mc
+dvb-usb-digitv
+dvb-usb-dtt200u
+dvb-usb-dtv5100
+dvb-usb-dw2102
+dvb-usb-friio
+dvb-usb-gl861
+dvb-usb-gp8psk
+dvb-usb-m920x
+dvb-usb-nova-t-usb2
+dvb-usb-opera
+dvb-usb-ttusb2
+dvb-usb-umt-010
+dvb-usb-vp702x
+dvb-usb-vp7045
+e100
+e1000
+e1000e
+earth-pt1
+eata
+ebt_802_3
+ebtable_broute
+ebtable_filter
+ebtable_nat
+ebtables
+ebt_among
+ebt_arp
+ebt_arpreply
+ebt_dnat
+ebt_ip
+ebt_ip6
+ebt_limit
+ebt_log
+ebt_mark
+ebt_mark_m
+ebt_nflog
+ebt_pkttype
+ebt_redirect
+ebt_snat
+ebt_stp
+ebt_ulog
+ebt_vlan
+ecb
+econet
+ecryptfs
+edac_core
+eeprom
+eeprom_93cx6
+eeti_ts
+efs
+elo
+em28xx
+em28xx-dvb
+em_cmp
+emi26
+emi62
+em_meta
+em_nbyte
+empeg
+ems_pci
+ems_usb
+em_text
+emu10k1-gp
+em_u32
+eni
+enic
+epat
+epca
+epia
+epic100
+eql
+esi-sir
+esp4
+esp6
+et1011c
+et61x251
+eth1394
+ethoc
+evbug
+evdev
+exofs
+exportfs
+f71805f
+f71882fg
+f75375s
+farsync
+fat
+faulty
+fb_sys_fops
+fcoe
+fcrypt
+fdomain
+fdomain_cs
+fealnx
+ff-memless
+firedtv
+firestream
+fit2
+fit3
+floppy
+fm801-gp
+fmvj18x_cs
+forcedeth
+fore_200e
+freevxfs
+friq
+frpw
+fscache
+ftdi-elan
+ftdi_sio
+ftl
+fujitsu_ts
+funsoft
+g760a
+gadgetfs
+gamecon
+gameport
+garmin_gps
+garp
+g_audio
+g_cdc
+gdth
+generic
+generic_bl
+gen_probe
+g_ether
+gf128mul
+gf2k
+g_file_storage
+gfs2
+ghash-generic
+girbil-sir
+gl518sm
+gl520sm
+gl620a
+gluebi
+g_midi
+goku_udc
+gpio-addr-flash
+gpio_keys
+gpio_mouse
+gpio_vbus
+g_printer
+grip
+grip_mp
+g_serial
+gspca_conex
+gspca_etoms
+gspca_finepix
+gspca_gl860
+gspca_jeilinj
+gspca_m5602
+gspca_main
+gspca_mars
+gspca_mr97310a
+gspca_ov519
+gspca_ov534
+gspca_pac207
+gspca_pac7311
+gspca_sn9c20x
+gspca_sonixb
+gspca_sonixj
+gspca_spca500
+gspca_spca501
+gspca_spca505
+gspca_spca506
+gspca_spca508
+gspca_spca561
+gspca_sq905
+gspca_sq905c
+gspca_stk014
+gspca_stv06xx
+gspca_sunplus
+gspca_t613
+gspca_tv8532
+gspca_vc032x
+gspca_zc3xx
+gtco
+guillemot
+gunze
+gxt4500
+g_zero
+hamachi
+hci_uart
+hci_vhci
+hdlc
+hdlc_cisco
+hdlcdrv
+hdlc_fr
+hdlc_ppp
+hdlc_raw
+hdlc_raw_eth
+hdlc_x25
+hdpvr
+he
+hexium_gemini
+hexium_orion
+hfs
+hfsplus
+hid
+hid-3m-pct
+hid-a4tech
+hid-apple
+hid-belkin
+hid-cherry
+hid-chicony
+hid-cypress
+hid-drff
+hid-ezkey
+hid-gaff
+hid-gyration
+hid-kensington
+hid-kye
+hid-logitech
+hid-microsoft
+hid-monterey
+hid-mosart
+hid-ntrig
+hid-ortek
+hidp
+hid-petalynx
+hid-pl
+hid-quanta
+hid-samsung
+hid-sjoy
+hid-sony
+hid-stantum
+hid-sunplus
+hid-tmff
+hid-topseed
+hid-twinhan
+hid-wacom
+hid-zpff
+horizon
+hostap
+hostap_cs
+hostap_pci
+hostap_plx
+hp100
+hp4x
+hpfs
+hptiop
+hso
+htc-pasic3
+hwa-hc
+hwa-rc
+hwmon-vid
+i1480-dfu-usb
+i1480-est
+i1480u-wlp
+i2400m
+i2400m-sdio
+i2400m-usb
+i2c-algo-pca
+i2c-ali1535
+i2c-ali1563
+i2c-ali15x3
+i2c-amd756
+i2c-amd8111
+i2c-dev
+i2c-gpio
+i2c-hydra
+i2c-i801
+i2c-isch
+i2c-matroxfb
+i2c-mpc
+i2c-nforce2
+i2c-ocores
+i2c-parport
+i2c-parport-light
+i2c-pca-platform
+i2c-piix4
+i2c-simtec
+i2c-sis5595
+i2c-sis630
+i2c-sis96x
+i2c-stub
+i2c-taos-evm
+i2c-tiny-usb
+i2c-via
+i2c-viapro
+i2c-voodoo3
+i2o_block
+i2o_bus
+i2o_config
+i2o_core
+i2o_proc
+i2o_scsi
+i5k_amb
+i82092
+ib_addr
+ib_cm
+ib_core
+ib_ipoib
+ib_iser
+ib_mad
+ibmaem
+ibmcam
+ibmpex
+ib_mthca
+ibmtr_cs
+ib_sa
+ib_srp
+ib_ucm
+ib_umad
+ib_uverbs
+icplus
+ics932s401
+idmouse
+idt77252
+ieee1394
+ifb
+iforce
+igbvf
+ili9320
+imm
+inexio
+inftl
+initio
+input-polldev
+int51x1
+intel_vr_nor
+interact
+ioc4
+io_edgeport
+io_ti
+iowarrior
+ip2
+ip6_queue
+ip6table_filter
+ip6table_mangle
+ip6table_raw
+ip6_tables
+ip6table_security
+ip6t_ah
+ip6t_eui64
+ip6t_frag
+ip6t_hbh
+ip6t_ipv6header
+ip6t_LOG
+ip6t_mh
+ip6t_REJECT
+ip6t_rt
+ip6_tunnel
+ipaq
+ipcomp
+ipcomp6
+ipddp
+ipg
+ip_gre
+iphase
+ipip
+ipmi_devintf
+ipmi_msghandler
+ipmi_poweroff
+ipmi_si
+ipmi_watchdog
+ip_queue
+ipr
+ips
+iptable_filter
+iptable_mangle
+iptable_nat
+iptable_raw
+ip_tables
+iptable_security
+ipt_addrtype
+ipt_ah
+ipt_CLUSTERIP
+ipt_ecn
+ipt_ECN
+ipt_LOG
+ipt_MASQUERADE
+ipt_NETMAP
+ipt_REDIRECT
+ipt_REJECT
+ipt_ULOG
+ipv6
+ip_vs
+ip_vs_dh
+ip_vs_ftp
+ip_vs_lblc
+ip_vs_lblcr
+ip_vs_lc
+ip_vs_nq
+ip_vs_rr
+ip_vs_sed
+ip_vs_sh
+ip_vs_wlc
+ip_vs_wrr
+ipw
+ipw2100
+ipw2200
+ipx
+ircomm
+ir-common
+ircomm-tty
+irda
+irda-usb
+ir-kbd-i2c
+irlan
+irnet
+irtty-sir
+ir-usb
+iscsi_tcp
+iscsi_trgt
+isight_firmware
+isl29003
+isl6405
+isl6421
+isofs
+isp116x-hcd
+isp1362-hcd
+isp1760
+istallion
+it87
+itd1000
+iuu_phoenix
+ivtv
+ivtvfb
+iw_c2
+iw_cm
+iw_cxgb3
+iwlagn
+iwlcore
+iwmc3200wifi
+ixgb
+ixgbe
+ixj
+ixj_pcmcia
+jedec_probe
+jffs2
+jfs
+jme
+joydev
+joydump
+jsm
+kafs
+kahlua
+kaweth
+kbic
+kbtab
+keyspan
+keyspan_pda
+keyspan_remote
+khazad
+kingsun-sir
+kl5kusb105
+kobil_sct
+konicawc
+ks0108
+ks0127
+ks8842
+ks8851
+ks8851_mll
+ks959-sir
+ksdazzle-sir
+ktti
+kvaser_pci
+kyrofb
+l2cap
+l64781
+lanai
+lanstreamer
+lapb
+lapbether
+lcd
+ldusb
+lec
+leds-bd2802
+leds-da903x
+leds-dac124s085
+leds-lp3944
+leds-wm831x-status
+leds-wm8350
+ledtrig-backlight
+ledtrig-gpio
+legousbtower
+lgdt3305
+lgdt330x
+lgs8gxx
+lib80211
+lib80211_crypt_ccmp
+lib80211_crypt_tkip
+lib80211_crypt_wep
+libcrc32c
+libertas
+libertas_cs
+libertas_sdio
+libertas_spi
+libertas_tf
+libertas_tf_usb
+libfc
+libfcoe
+libipw
+libiscsi
+libiscsi_tcp
+libosd
+libsas
+libsrp
+lightning
+linear
+lirc_atiusb
+lirc_bt829
+lirc_dev
+lirc_ene0100
+lirc_i2c
+lirc_igorplugusb
+lirc_imon
+lirc_it87
+lirc_ite8709
+lirc_mceusb
+lirc_sasem
+lirc_serial
+lirc_sir
+lirc_streamzap
+lirc_ttusbir
+lis3lv02d
+lis3lv02d_spi
+litelink-sir
+lkkbd
+llc2
+lm63
+lm70
+lm75
+lm77
+lm78
+lm80
+lm83
+lm8323
+lm85
+lm87
+lm90
+lm92
+lm93
+lm95241
+lmc
+lms283gf05
+lnbp21
+lockd
+loop
+lp
+lp3971
+lpddr_cmds
+lpfc
+lrw
+ltc4215
+ltc4245
+ltv350qv
+lxt
+lzo_compress
+lzo_decompress
+m25p80
+m52790
+ma600-sir
+mac53c94
+mac80211
+mac80211_hwsim
+mace
+macvlan
+magellan
+map_absent
+map_funcs
+map_ram
+map_rom
+marvell
+matrix_keypad
+matroxfb_maven
+matrox_w1
+max1111
+max1586
+max1619
+max17040_battery
+max3100
+max6650
+max6875
+max7301
+max732x
+max7359_keypad
+mb862xxfb
+mc13783
+mc13783-core
+mc33880
+mc44s803
+mcp2120-sir
+mcp23s08
+mcs5000_ts
+mcs7780
+mcs7830
+mct_u232
+md4
+mdc800
+mdio
+mdio-bitbang
+mdio-gpio
+md-mod
+megaraid
+megaraid_mbox
+megaraid_mm
+megaraid_sas
+mesh
+metronomefb
+mfd-core
+mga
+michael_mic
+microtek
+mii
+minix
+mk712
+mkiss
+mlx4_core
+mlx4_en
+mlx4_ib
+mmc_block
+mmc_core
+mos7720
+mos7840
+moto_modem
+moxa
+mpoa
+mpt2sas
+mptbase
+mptctl
+mptfc
+mptlan
+mptsas
+mptscsih
+mptspi
+mpu401
+msdos
+msp3400
+mt2060
+mt20xx
+mt2131
+mt2266
+mt312
+mt352
+mt9m001
+mt9m111
+mt9t031
+mt9v011
+mt9v022
+mtd
+mtd_blkdevs
+mtdblock
+mtdblock_ro
+mtdchar
+mtdconcat
+mtd_dataflash
+mtd_oobtest
+mtdoops
+mtd_pagetest
+mtdram
+mtd_readtest
+mtd_speedtest
+mtd_stresstest
+mtd_subpagetest
+mtd_torturetest
+mtouch
+multipath
+mv643xx_eth
+mwl8k
+mxl5005s
+mxl5007t
+myri10ge
+nand
+nand_ecc
+nand_ids
+nandsim
+national
+natsemi
+navman
+nbd
+ncpfs
+ne2k-pci
+neofb
+net1080
+netconsole
+netrom
+netwave_cs
+netxen_nic
+newtonkbd
+nf_conntrack
+nf_conntrack_amanda
+nf_conntrack_ftp
+nf_conntrack_h323
+nf_conntrack_ipv4
+nf_conntrack_ipv6
+nf_conntrack_irc
+nf_conntrack_netbios_ns
+nf_conntrack_netlink
+nf_conntrack_pptp
+nf_conntrack_proto_dccp
+nf_conntrack_proto_gre
+nf_conntrack_proto_sctp
+nf_conntrack_proto_udplite
+nf_conntrack_sane
+nf_conntrack_sip
+nf_conntrack_tftp
+nf_defrag_ipv4
+nf_nat
+nf_nat_amanda
+nf_nat_ftp
+nf_nat_h323
+nf_nat_irc
+nf_nat_pptp
+nf_nat_proto_dccp
+nf_nat_proto_gre
+nf_nat_proto_sctp
+nf_nat_proto_udplite
+nf_nat_sip
+nf_nat_snmp_basic
+nf_nat_tftp
+nfnetlink
+nfnetlink_log
+nfnetlink_queue
+nfs
+nfs_acl
+nfsd
+nftl
+nf_tproxy_core
+n_hdlc
+nicstar
+nilfs2
+nl802154
+nls_ascii
+nls_cp1250
+nls_cp1251
+nls_cp1255
+nls_cp437
+nls_cp737
+nls_cp775
+nls_cp850
+nls_cp852
+nls_cp855
+nls_cp857
+nls_cp860
+nls_cp861
+nls_cp862
+nls_cp863
+nls_cp864
+nls_cp865
+nls_cp866
+nls_cp869
+nls_cp874
+nls_cp932
+nls_cp936
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+nls_euc-jp
+nls_iso8859-1
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+nls_iso8859-15
+nls_iso8859-2
+nls_iso8859-3
+nls_iso8859-4
+nls_iso8859-5
+nls_iso8859-6
+nls_iso8859-7
+nls_iso8859-9
+nls_koi8-r
+nls_koi8-ru
+nls_koi8-u
+nls_utf8
+nmclan_cs
+nop-usb-xceiv
+nouveau
+n_r3964
+ns558
+ns83820
+nsc-ircc
+nsp32
+nsp_cs
+ntfs
+nvidiafb
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+nxt6000
+ocfs2
+ocfs2_dlm
+ocfs2_dlmfs
+ocfs2_nodemanager
+ocfs2_stackglue
+ocfs2_stack_o2cb
+ocfs2_stack_user
+of_serial
+ohci1394
+old_belkin-sir
+olympic
+omfs
+omninet
+on20
+on26
+onenand
+onenand_sim
+opencores-kbd
+opl3
+oprofile
+opticon
+option
+or51132
+or51211
+orinoco
+orinoco_cs
+osd
+osdblk
+osst
+oti6858
+output
+ov7670
+ov772x
+ovcamchip
+oxu210hp-hcd
+p54common
+p54pci
+p54spi
+p54usb
+p8023
+paride
+parkbd
+parport
+parport_ax88796
+parport_cs
+parport_pc
+parport_serial
+pas2
+pata_amd
+pata_atp867x
+pata_cs5520
+pata_efar
+pata_it8213
+pata_it821x
+pata_jmicron
+pata_marvell
+pata_mpiix
+pata_netcell
+pata_ninja32
+pata_of_platform
+pata_oldpiix
+pata_pcmcia
+pata_pdc2027x
+pata_platform
+pata_rdc
+pata_rz1000
+pata_sch
+pata_serverworks
+pata_sil680
+pata_sis
+pata_sl82c105
+pata_triflex
+pata_via
+pc87360
+pc87427
+pca953x
+pcbc
+pcd
+pcf50633-adc
+pcf50633-charger
+pcf50633-core
+pcf50633-gpio
+pcf50633-input
+pcf50633-regulator
+pcf857x
+pcf8591
+pci
+pci200syn
+pcilynx
+pcips2
+pcmcia
+pcmcia_core
+pcnet32
+pcnet_cs
+pcspkr
+pcwd_pci
+pcwd_usb
+pd
+pd6729
+pda_power
+pdc_adma
+pegasus
+penmount
+pf
+pg
+phantom
+phonedev
+phonet
+phram
+physmap
+physmap_of
+pktcdvd
+pktgen
+pl2303
+platform_lcd
+plat_nand
+plat-ram
+plip
+plusb
+pluto2
+pm2fb
+pm3fb
+pmac_zilog
+pmc551
+pmcraid
+pmu_battery
+pn_pep
+powermate
+ppa
+ppdev
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+ppp_deflate
+ppp_generic
+ppp_mppe
+pppoatm
+pppoe
+pppol2tp
+pppox
+ppp_synctty
+pps_core
+prism54
+psmouse
+pss
+pt
+pvrusb2
+pwc
+qcserial
+qinfo_probe
+qla1280
+qla2xxx
+qla3xxx
+qla4xxx
+qlge
+qlogic_cs
+qlogicfas408
+qnx4
+qsemi
+qt1010
+quickcam_messenger
+quota_tree
+quota_v1
+quota_v2
+r128
+r8169
+r8a66597-hcd
+rack-meter
+radeon
+radio-gemtek-pci
+radio-i2c-si470x
+radio-maestro
+radio-maxiradio
+radio-mr800
+radio-si4713
+radio-tea5764
+raid0
+raid1
+raid10
+raid456
+raid6_pq
+raid6test
+raid_class
+ramzswap
+raw
+raw1394
+ray_cs
+rdma_cm
+rdma_ucm
+redboot
+reed_solomon
+reiserfs
+rfc1051
+rfc1201
+rfcomm
+rfd_ftl
+rfkill
+ricoh_mmc
+rio500
+rivafb
+rmd128
+rmd160
+rmd256
+rmd320
+rndis_host
+rocket
+romfs
+rose
+rotary_encoder
+rpcsec_gss_krb5
+rpcsec_gss_spkm3
+rrunner
+rsrc_nonstatic
+rt2400pci
+rt2500pci
+rt2500usb
+rt2800usb
+rt2x00lib
+rt2x00pci
+rt2x00usb
+rt61pci
+rt73usb
+rtc-ab3100
+rtc-bq4802
+rtc-cmos
+rtc_cmos_setup
+rtc-ds1286
+rtc-ds1305
+rtc-ds1307
+rtc-ds1374
+rtc-ds1390
+rtc-ds1511
+rtc-ds1553
+rtc-ds1672
+rtc-ds1742
+rtc-ds3234
+rtc-fm3130
+rtc-generic
+rtc-isl1208
+rtc-m41t80
+rtc-m41t94
+rtc-m48t35
+rtc-m48t59
+rtc-m48t86
+rtc-max6900
+rtc-max6902
+rtc-pcf2123
+rtc-pcf50633
+rtc-pcf8563
+rtc-pcf8583
+rtc-r9701
+rtc-rs5c348
+rtc-rs5c372
+rtc-rx8025
+rtc-rx8581
+rtc-s35390a
+rtc-stk17ta8
+rtc-twl4030
+rtc-v3020
+rtc-wm831x
+rtc-wm8350
+rtc-x1205
+rtl8150
+rtl8187
+rxkad
+s1d13xxxfb
+s2255drv
+s2io
+s3fb
+s5h1409
+s5h1411
+s5h1420
+saa5246a
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+saa6588
+saa6752hs
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+saa7115
+saa7127
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+saa7134-alsa
+saa7134-dvb
+saa7134-empress
+saa7146
+saa7146_vv
+saa7164
+saa717x
+saa7185
+saa7191
+safe_serial
+sata_inic162x
+sata_mv
+sata_nv
+sata_promise
+sata_qstor
+sata_sil
+sata_sil24
+sata_sis
+sata_sx4
+sata_uli
+sata_via
+sata_vsc
+savage
+savagefb
+sb
+sb_lib
+sbp2
+sc92031
+sch_atm
+sch_cbq
+sch_drr
+sch_dsmark
+sch_gred
+sch_hfsc
+sch_htb
+sch_ingress
+sch_multiq
+sch_netem
+sch_prio
+sch_red
+sch_sfq
+sch_tbf
+sch_teql
+sco
+scsi_debug
+scsi_dh
+scsi_dh_alua
+scsi_dh_emc
+scsi_dh_hp_sw
+scsi_dh_rdac
+scsi_tgt
+scsi_transport_fc
+scsi_transport_iscsi
+scsi_transport_sas
+scsi_transport_spi
+scsi_transport_srp
+scsi_wait_scan
+sctp
+sdhci
+sdhci-of
+sdhci-pci
+sdhci-pltfm
+sdio_uart
+sd_mod
+sdricoh_cs
+se401
+seed
+serial_core
+serial_cs
+serio_raw
+sermouse
+serpent
+serport
+sfc
+sg
+sha1_generic
+sha256_generic
+sha512_generic
+sht15
+si21xx
+si4713-i2c
+sidewinder
+siemens_mpi
+sierra
+sir-dev
+sis
+sis190
+sis5595
+sis900
+sisfb
+sisusbvga
+sit
+sja1000
+sja1000_of_platform
+sja1000_platform
+skfp
+skge
+sky2
+sl811_cs
+sl811-hcd
+slhc
+slip
+slram
+sm501
+sm501fb
+smbfs
+smc91c92_cs
+smsc
+smsc47b397
+smsc47m1
+smsc47m192
+smsc9420
+smsc95xx
+smsc-ircc2
+smsdvb
+smsmdtv
+smssdio
+smsusb
+sn9c102
+snd
+snd-ac97-codec
+snd-ad1889
+snd-ak4114
+snd-ak4117
+snd-ak4xxx-adda
+snd-ali5451
+snd-als300
+snd-als4000
+snd-aoa
+snd-aoa-codec-onyx
+snd-aoa-codec-tas
+snd-aoa-codec-toonie
+snd-aoa-fabric-layout
+snd-aoa-i2sbus
+snd-aoa-soundbus
+snd-atiixp
+snd-atiixp-modem
+snd-au8810
+snd-au8820
+snd-au8830
+snd-aw2
+snd-azt3328
+snd-bt87x
+snd-ca0106
+snd-cmipci
+snd-cs4281
+snd-cs46xx
+snd-cs5530
+snd-cs5535audio
+snd-cs8427
+snd-ctxfi
+snd-darla20
+snd-darla24
+snd-dummy
+snd-echo3g
+snd-emu10k1
+snd-emu10k1-synth
+snd-emu10k1x
+snd-emux-synth
+snd-ens1370
+snd-ens1371
+snd-es1938
+snd-es1968
+snd-fm801
+snd-gina20
+snd-gina24
+snd-hda-codec
+snd-hda-codec-analog
+snd-hda-codec-atihdmi
+snd-hda-codec-ca0110
+snd-hda-codec-cirrus
+snd-hda-codec-cmedia
+snd-hda-codec-conexant
+snd-hda-codec-idt
+snd-hda-codec-intelhdmi
+snd-hda-codec-nvhdmi
+snd-hda-codec-realtek
+snd-hda-codec-si3054
+snd-hda-codec-via
+snd-hda-intel
+snd-hdsp
+snd-hdspm
+snd-hrtimer
+snd-hwdep
+snd-i2c
+snd-ice1712
+snd-ice1724
+snd-ice17xx-ak4xxx
+snd-indigo
+snd-indigodj
+snd-indigodjx
+snd-indigoio
+snd-indigoiox
+snd-intel8x0
+snd-intel8x0m
+snd-korg1212
+snd-layla20
+snd-layla24
+snd-lx6464es
+snd-maestro3
+snd-mia
+snd-mixart
+snd-mixer-oss
+snd-mona
+snd-mpu401
+snd-mpu401-uart
+snd-mtpav
+snd-mts64
+snd-nm256
+snd-opl3-lib
+snd-opl3-synth
+snd-page-alloc
+snd-pcm
+snd-pcm-oss
+snd-pcxhr
+snd-pdaudiocf
+snd-portman2x4
+snd-powermac
+snd-pt2258
+snd-rawmidi
+snd-riptide
+snd-rme32
+snd-rme96
+snd-rme9652
+snd-sb16-dsp
+snd-sb-common
+snd-seq
+snd-seq-device
+snd-seq-dummy
+snd-seq-midi
+snd-seq-midi-emul
+snd-seq-midi-event
+snd-seq-oss
+snd-seq-virmidi
+snd-serial-u16550
+snd-soc-ad1836
+snd-soc-ad1938
+snd-soc-ad73311
+snd-soc-ak4104
+snd-soc-ak4535
+snd-soc-ak4642
+snd-soc-core
+snd-soc-cs4270
+snd-soc-l3
+snd-soc-max9877
+snd-soc-pcm3008
+snd-soc-spdif
+snd-soc-ssm2602
+snd-soc-tlv320aic23
+snd-soc-tlv320aic26
+snd-soc-tlv320aic3x
+snd-soc-twl4030
+snd-soc-uda134x
+snd-soc-uda1380
+snd-soc-wm8350
+snd-soc-wm8400
+snd-soc-wm8510
+snd-soc-wm8523
+snd-soc-wm8580
+snd-soc-wm8728
+snd-soc-wm8731
+snd-soc-wm8750
+snd-soc-wm8753
+snd-soc-wm8776
+snd-soc-wm8900
+snd-soc-wm8903
+snd-soc-wm8940
+snd-soc-wm8960
+snd-soc-wm8961
+snd-soc-wm8971
+snd-soc-wm8974
+snd-soc-wm8988
+snd-soc-wm8990
+snd-soc-wm8993
+snd-soc-wm9081
+snd-soc-wm-hubs
+snd-sonicvibes
+snd-tea575x-tuner
+snd-timer
+snd-trident
+snd-usb-audio
+snd-usb-caiaq
+snd-usb-lib
+snd-usb-usx2y
+snd-util-mem
+snd-via82xx
+snd-via82xx-modem
+snd-virmidi
+snd-vx222
+snd-vx-lib
+snd-vxpocket
+snd-ymfpci
+soc_camera
+soc_camera_platform
+softdog
+solos-pci
+sound
+soundcore
+sound_firmware
+sp8870
+sp887x
+spaceball
+spaceorb
+spcp8x5
+specialix
+spectrum_cs
+speedtch
+spi_bitbang
+spi_butterfly
+spidev
+spi_gpio
+spi_lm70llp
+squashfs
+sr_mod
+ssb
+sscape
+ssfdc
+sst25l
+st
+stallion
+starfire
+stb6000
+ste10Xp
+stex
+stinger
+stir4200
+stowaway
+stp
+stradis
+strip
+stv0288
+stv0297
+stv0299
+stv0900
+stv6110
+stv680
+sundance
+sungem
+sungem_phy
+sunhme
+suni
+sunkbd
+sunrpc
+svcrdma
+svgalib
+swim3
+sx8
+sym53c500_cs
+sym53c8xx
+symbolserial
+synaptics_i2c
+synclink
+synclink_cs
+synclink_gt
+synclinkmp
+syscopyarea
+sysfillrect
+sysimgblt
+sysv
+tcm825x
+tcp_bic
+tcp_highspeed
+tcp_htcp
+tcp_hybla
+tcp_illinois
+tcp_lp
+tcp_probe
+tcp_scalable
+tcp_vegas
+tcp_veno
+tcp_westwood
+tcp_yeah
+tcrypt
+tda10021
+tda10023
+tda10048
+tda1004x
+tda10086
+tda18271
+tda7432
+tda8083
+tda826x
+tda827x
+tda8290
+tda9840
+tda9875
+tda9887
+tdfx
+tdo24m
+tea
+tea5761
+tea5767
+tea6415c
+tea6420
+tehuti
+tekram-sir
+tg3
+tgr192
+therm_adt746x
+therm_windtunnel
+thmc50
+ths7303
+tifm_7xx1
+tifm_core
+tifm_sd
+timeriomem-rng
+tipc
+ti_usb_3410_5052
+tlan
+tle62x0
+tlv320aic23b
+tmdc
+tmiofb
+tmp401
+tmp421
+tms380tr
+tmscsim
+tmspci
+toim3232-sir
+touchit213
+touchright
+touchwin
+tpm
+tpm_atmel
+tpm_nsc
+tps65023-regulator
+tps6507x-regulator
+trancevibrator
+tridentfb
+trix
+ts_bm
+tsc2007
+ts_fsm
+ts_kmp
+tsl2550
+ttm
+ttpci-eeprom
+ttusb_dec
+ttusbdecfe
+tulip
+tuner
+tuner-simple
+tuner-types
+tuner-xc2028
+tunnel4
+tunnel6
+turbografx
+tvaudio
+tveeprom
+tvp514x
+tvp5150
+tw9910
+twidjoy
+twl4030-gpio
+twl4030_keypad
+twl4030-pwrbutton
+twl4030-usb
+twl4030_wdt
+twofish
+twofish_common
+typhoon
+u132-hcd
+uart401
+uart6850
+uartlite
+ubi
+ucb1400_core
+ucb1400_ts
+udf
+ueagle-atm
+ufs
+uinput
+uio
+uio_aec
+uio_cif
+uio_pci_generic
+uio_pdrv
+uio_pdrv_genirq
+uio_sercos3
+uio_smx
+uli526x
+ultracam
+umc
+umem
+ums-alauda
+ums-cypress
+ums-datafab
+ums-freecom
+ums-isd200
+ums-jumpshot
+ums-karma
+ums-onetouch
+ums-sddr09
+ums-sddr55
+ums-usbat
+uninorth-agp
+upd64031a
+upd64083
+uPD98402
+usb8xxx
+usbatm
+usb_debug
+usbhid
+usblcd
+usbled
+usblp
+usbnet
+usbserial
+usbsevseg
+usb-storage
+usbtest
+usbtmc
+usbtouchscreen
+usbvideo
+usbvision
+userspace-consumer
+uss720
+uvcvideo
+uvesafb
+uwb
+v4l1-compat
+v4l2-common
+v4l2-int-device
+vcan
+ves1820
+ves1x93
+veth
+vfat
+vgastate
+vgg2432a4
+via
+via686a
+viafb
+via-ircc
+via-rhine
+via-sdmmc
+via-velocity
+vicam
+video1394
+videobuf-core
+videobuf-dma-sg
+videobuf-dvb
+videobuf-vmalloc
+videocodec
+videodev
+virtio
+virtio_balloon
+virtio_blk
+virtio_console
+virtio_net
+virtio_pci
+virtio_ring
+virtio-rng
+virtual
+visor
+vitesse
+vivi
+vlsi_ir
+vmac
+v_midi
+vp27smpx
+vpx3220
+vstusb
+vsxxxaa
+vt1211
+vt8231
+vt8623fb
+vxge
+w1_bq27000
+w1_ds2431
+w1_ds2433
+w1_ds2760
+w1-gpio
+w1_smem
+w1_therm
+w83627ehf
+w83627hf
+w83781d
+w83791d
+w83792d
+w83793
+w83977af_ir
+w83l785ts
+w9966
+w9968cf
+wacom_w8001
+walkera0701
+wanrouter
+wanxl
+warrior
+wavelan_cs
+wbsd
+wdrtas
+wdt_pci
+whci
+whci-hcd
+whc-rc
+whiteheat
+wimax
+winbond-840
+windfarm_core
+wire
+wl1251
+wl1251_sdio
+wl1251_spi
+wl1271
+wl3501_cs
+wlp
+wm831x
+wm831x_bl
+wm831x-dcdc
+wm831x-gpio
+wm831x-hwmon
+wm831x-isink
+wm831x-ldo
+wm831x-on
+wm831x_power
+wm831x_wdt
+wm8350
+wm8350-hwmon
+wm8350-i2c
+wm8350_power
+wm8350-regulator
+wm8350_wdt
+wm8400-core
+wm8400-regulator
+wm8739
+wm8775
+wm97xx-ts
+wp512
+wpan-class
+wusb-cbaf
+wusbcore
+wusb-wa
+x25
+x25_asy
+xc5000
+xcbc
+xfrm4_mode_beet
+xfrm4_mode_transport
+xfrm4_mode_tunnel
+xfrm4_tunnel
+xfrm6_mode_beet
+xfrm6_mode_ro
+xfrm6_mode_transport
+xfrm6_mode_tunnel
+xfrm6_tunnel
+xfrm_ipcomp
+xfrm_user
+xfs
+xhci
+xilinx_emaclite
+xilinx_ps2
+xirc2ps_cs
+xircom_cb
+xor
+xpad
+xprtrdma
+x_tables
+xt_CLASSIFY
+xt_cluster
+xt_comment
+xt_connbytes
+xt_connlimit
+xt_connmark
+xt_CONNMARK
+xt_CONNSECMARK
+xt_conntrack
+xt_dccp
+xt_dscp
+xt_DSCP
+xt_esp
+xt_hashlimit
+xt_helper
+xt_hl
+xt_HL
+xtkbd
+xt_LED
+xt_length
+xt_limit
+xt_mac
+xt_mark
+xt_MARK
+xt_multiport
+xt_NFLOG
+xt_NFQUEUE
+xt_NOTRACK
+xt_osf
+xt_physdev
+xt_pkttype
+xt_policy
+xt_quota
+xt_realm
+xt_recent
+xts
+xt_sctp
+xt_SECMARK
+xt_socket
+xt_state
+xt_statistic
+xt_string
+xt_tcpmss
+xt_TCPMSS
+xt_tcpudp
+xt_time
+xt_TPROXY
+xt_TRACE
+xt_u32
+xusbatm
+xvmalloc
+yam
+yealink
+yellowfin
+yenta_socket
+zatm
+zc0301
+zd1201
+zd1211rw
+zhenhua
+zl10036
+zl10039
+zl10353
+zlib
+zlib_deflate
+zr36016
+zr36050
+zr36060
+zr36067
+zr364xx
--- linux-mvl-dove-2.6.32.orig/debian.master/abi/2.6.32-34.73/powerpc/powerpc-smp
+++ linux-mvl-dove-2.6.32/debian.master/abi/2.6.32-34.73/powerpc/powerpc-smp
@@ -0,0 +1,9529 @@
+EXPORT_SYMBOL crypto/gf128mul 0x0c2f123f	gf128mul_4k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x1068004b	gf128mul_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x2f2889a0	gf128mul_init_64k_lle
+EXPORT_SYMBOL crypto/gf128mul 0x3755f990	gf128mul_init_64k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x384ef9ce	gf128mul_64k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x56af0dbd	gf128mul_x_ble
+EXPORT_SYMBOL crypto/gf128mul 0x83581089	gf128mul_init_4k_lle
+EXPORT_SYMBOL crypto/gf128mul 0x9b2560b9	gf128mul_init_4k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x9e13f6f6	gf128mul_lle
+EXPORT_SYMBOL crypto/gf128mul 0xbd17a0df	gf128mul_4k_lle
+EXPORT_SYMBOL crypto/gf128mul 0xc0890413	gf128mul_64k_lle
+EXPORT_SYMBOL crypto/gf128mul 0xd60736ec	gf128mul_free_64k
+EXPORT_SYMBOL crypto/xor 0x5b6c00e6	xor_blocks
+EXPORT_SYMBOL drivers/atm/suni 0x2c1e82f7	suni_init
+EXPORT_SYMBOL drivers/atm/uPD98402 0xbfb2b46c	uPD98402_init
+EXPORT_SYMBOL drivers/block/loop 0xbfee3ad5	loop_unregister_transfer
+EXPORT_SYMBOL drivers/block/loop 0xef56fed6	loop_register_transfer
+EXPORT_SYMBOL drivers/block/paride/paride 0x0b479ff0	pi_write_block
+EXPORT_SYMBOL drivers/block/paride/paride 0x13926b5d	pi_connect
+EXPORT_SYMBOL drivers/block/paride/paride 0x286cd56d	pi_schedule_claimed
+EXPORT_SYMBOL drivers/block/paride/paride 0x5f7cd1c7	pi_read_block
+EXPORT_SYMBOL drivers/block/paride/paride 0x6718207d	paride_unregister
+EXPORT_SYMBOL drivers/block/paride/paride 0x7185b78d	pi_disconnect
+EXPORT_SYMBOL drivers/block/paride/paride 0x89b0cd8d	pi_write_regr
+EXPORT_SYMBOL drivers/block/paride/paride 0x8da5b4d2	pi_init
+EXPORT_SYMBOL drivers/block/paride/paride 0xa066b30d	pi_read_regr
+EXPORT_SYMBOL drivers/block/paride/paride 0xa3c72128	paride_register
+EXPORT_SYMBOL drivers/block/paride/paride 0xbd2936f1	pi_release
+EXPORT_SYMBOL drivers/block/paride/paride 0xdf99f4c5	pi_do_claimed
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x1643a564	agp_backend_release
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x1afd711b	agp_free_page_array
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x28920315	agp_generic_destroy_pages
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x2dc7b9f6	agp_generic_alloc_page
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x2e9592d0	agp_alloc_page_array
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x2ff4aa72	agp_generic_alloc_pages
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x30226ddf	agp_device_command
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x385423c5	agp_collect_device_status
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x3aa1a137	agp_find_bridge
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x3b588be7	agp_backend_acquire
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x40c38ffb	agp_alloc_bridge
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x4a928f3b	agp_unbind_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x4b085dbf	agp3_generic_configure
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x4bb0834c	agp_put_bridge
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x52ea3fd2	agp3_generic_tlbflush
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x567eb54d	agp_bind_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x612c1e20	agp_bridge
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x673f815e	agp_bridges
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x6def2841	agp_generic_type_to_mask_type
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x6f62863c	agp_generic_free_by_type
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x7538b132	agp_off
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x8016e2bb	agp_create_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x9b92e89a	agp_generic_destroy_page
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xa4d4f0e6	global_cache_flush
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xa8ec45cd	agp_generic_alloc_by_type
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xaf799326	agp_generic_alloc_user
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xb04ea8f0	agp_rebind_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xb3a76336	agp_allocate_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xb4b63629	agp_generic_remove_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xb9076aaf	agp_flush_chipset
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xb9c8ff1f	agp_enable
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xbb37e088	agp_generic_enable
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xbbb8b905	agp_generic_insert_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xbeea5985	agp_generic_create_gatt_table
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xc2424641	agp3_generic_cleanup
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xc5d9c46c	agp_try_unsupported_boot
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xc65abeb7	agp3_generic_sizes
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xd0fef3b2	agp_free_key
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xd5503208	get_agp_version
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xde9b17ed	agp3_generic_fetch_size
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xe3dd73bd	agp_free_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xedce233b	agp_generic_mask_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xee839684	agp_copy_info
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xf06a4bfe	agp_generic_free_gatt_table
+EXPORT_SYMBOL drivers/char/apm-emulation 0x129e74f2	apm_get_power_status
+EXPORT_SYMBOL drivers/char/apm-emulation 0xdf3329b8	apm_queue_event
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x0766f7b6	ipmi_get_maintenance_mode
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x15c66c91	ipmi_smi_watchdog_pretimeout
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x231773d7	ipmi_set_my_address
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x2e67e7c4	ipmi_smi_watcher_register
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x3b2ce626	ipmi_create_user
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x40f2b10c	ipmi_alloc_smi_msg
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x4181bd3d	ipmi_get_my_LUN
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x500e7630	ipmi_register_for_cmd
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x6190f63b	ipmi_unregister_smi
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x70453929	ipmi_smi_watcher_unregister
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x70c3cc55	ipmi_register_smi
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x804f922a	ipmi_addr_length
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x8a8ec6a4	ipmi_request_supply_msgs
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x9009363f	ipmi_set_gets_events
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x94d79bc9	ipmi_unregister_for_cmd
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x9a7ef133	ipmi_get_version
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x9b504d32	ipmi_smi_msg_received
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xb2e96920	ipmi_set_maintenance_mode
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xc6b1888d	ipmi_free_recv_msg
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xcb509a49	ipmi_set_my_LUN
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xcfce6789	ipmi_poll_interface
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xdc8bc17a	ipmi_smi_add_proc_entry
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xddc8d7f8	ipmi_get_my_address
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe4f4665b	ipmi_validate_addr
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xf23bfe73	ipmi_destroy_user
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xf2f545a0	ipmi_request_settime
+EXPORT_SYMBOL drivers/edac/edac_core 0x371cedcf	edac_mc_handle_fbd_ue
+EXPORT_SYMBOL drivers/edac/edac_core 0x9b053969	edac_mc_handle_fbd_ce
+EXPORT_SYMBOL drivers/edac/edac_core 0xdedad8f7	edac_mc_find
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0193b899	drm_idlelock_release
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x01f5f62d	drm_agp_bind_pages
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0200e36c	drm_agp_acquire
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x02affb02	drm_mode_probed_add
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x06d602e4	drm_mm_debug_table
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x07dcba04	drm_get_resource_len
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0836695c	drm_sman_takedown
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0edf97a1	drm_agp_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x10184d77	drm_addmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x11d26ce8	drm_framebuffer_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x11f96dd3	drm_mode_create_dvi_i_properties
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x12ae20df	drm_agp_chipset_flush
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x14ae9c2a	drm_lock_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x15bcd997	drm_encoder_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x160061c0	drm_add_modes_noedid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1864cab8	drm_mm_search_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1904ddf0	drm_mode_destroy
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1907fbad	drm_mode_validate_clocks
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1bebb34f	drm_get_edid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1f072c59	drm_property_add_enum
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x20645642	drm_debug
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x207ac085	drm_mode_attachmode_crtc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x21451ac4	drm_sman_owner_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x25110b1a	drm_ioctl
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x25a7a07e	drm_crtc_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x25ac5c35	drm_rmmap_locked
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x273d125d	drm_lock_take
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x286daa16	drm_mm_init_scan
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2916bf63	drm_sman_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x29692311	drm_sg_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2a2fc784	drm_vblank_pre_modeset
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2e4cca0e	drm_gem_handle_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2eb2f903	drm_sman_free_key
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3074f033	drm_order
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x30e06374	drm_clflush_pages
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x30eae202	drm_i2c_encoder_destroy
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x354fd527	drm_ati_pcigart_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x35a506ed	drm_get_drawable_info
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x37147420	drm_pci_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x382a1ef0	drm_pci_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x38b8fbb5	drm_get_resource_start
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x39b4d63e	drm_mode_connector_list_update
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3a8edaa4	drm_mode_create_scaling_mode_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3c9a1409	drm_ht_just_insert_please
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3cf63ddb	drm_core_ioremap_wc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3daabf49	drm_fasync
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3ece26b5	drm_agp_unbind
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3f0ccffe	drm_master_get
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3f3acafa	drm_encoder_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3fafe6a8	drm_i_have_hw_lock
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4362bd96	drm_master_put
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x445b77af	drm_mm_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x44cb4e46	drm_debugfs_remove_files
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4acd5639	drm_addbufs_agp
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4b6bf869	drm_vblank_put
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4bcd4026	drm_mode_create_dirty_info_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4d5d8932	drm_mmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4dbe0cfd	drm_unbind_agp
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4fd38c63	drm_handle_vblank
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x50de736d	drm_connector_attach_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x55f060ee	drm_sman_set_range
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x580830f0	drm_mode_set_name
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5825d325	drm_mode_crtc_set_gamma_size
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6192ff7e	drm_i2c_encoder_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x635ea1d6	drm_free_agp
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x645206f7	drm_mm_pre_get
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x64c6bf19	drm_mode_prune_invalid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x65fdfc37	drm_agp_bind
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6cb56f06	drm_mm_put_block
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6d2e5837	drm_ut_debug_printk
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6d8f3279	drm_mm_search_free_in_range
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6e2bd6ee	drm_mm_get_block_generic
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6fc30481	drm_mode_hsync
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x716310c1	drm_add_edid_modes
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x72d2193f	drm_mm_dump_table
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x784915eb	drm_mode_vrefresh
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7aadb052	drm_connector_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7ad9427f	drm_irq_install
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7b98801b	drm_put_dev
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7becf9f2	drm_gem_object_handle_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7c1fd6c8	drm_mode_equal
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7cb8c712	drm_get_encoder_name
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7e8fa7b6	drm_core_get_reg_ofs
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x84b726c4	drm_connector_property_get_value
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x84d1cf75	drm_open
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x85de09f5	drm_mode_width
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x877bb89e	drm_rmmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x87d6e7ef	drm_detect_hdmi_monitor
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x88c3005c	drm_framebuffer_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8aa5d73c	drm_mode_connector_update_edid_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8b97f2f4	drm_mm_scan_remove_block
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8d151e50	drm_exit
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8f985944	drm_crtc_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x94bf1a79	drm_mode_config_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x98b45474	drm_ati_pcigart_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x98f5666a	drm_sysfs_connector_add
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9aa9ab47	drm_agp_release
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9ad5e08b	drm_sysfs_hotplug_event
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9ca0d538	drm_do_probe_ddc_edid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9d863d1a	drm_mm_scan_add_block
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa18ed6ba	drm_idlelock_take
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa1a97f4d	drm_gtf_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa1eabd87	drm_mode_list_concat
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa2b65699	drm_vblank_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa579556b	drm_gem_mmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa58a11ff	drm_cvt_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa7ed6ace	drm_agp_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa9f85d8e	drm_property_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xaad50ea1	drm_mode_create_tv_properties
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xac87aa7c	drm_mode_create_dithering_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xadf0ee89	drm_vblank_off
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xaf29788e	drm_sman_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb00bb85b	drm_core_ioremapfree
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb1d4f9e4	drm_poll
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb2592f12	drm_core_ioremap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb3645844	drm_connector_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb714d042	drm_mode_connector_attach_encoder
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb7f5bb39	drm_mode_remove
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb899da2b	drm_mode_connector_detach_encoder
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xbab54df8	drm_gem_vm_open
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xbb3d8a84	drm_get_connector_name
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xbeeb4083	drm_connector_property_set_value
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xbef0d625	drm_mode_object_find
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc2c1fc78	drm_gem_vm_close
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc306ea64	drm_gem_object_lookup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc4302b95	drm_mm_clean
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc464d681	drm_mm_get_block_range_generic
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc6794f16	drm_core_get_map_ofs
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcb88ee68	drm_vblank_count
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcc9a0fce	drm_core_reclaim_buffers
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcdc61fa8	drm_gem_object_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcdd39746	drm_agp_enable
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcdf2eff4	drm_mode_height
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcf2fe76b	drm_sysfs_connector_remove
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcf778a51	drm_release
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd039fc9d	drm_addbufs_pci
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd08fa3f0	drm_mode_set_crtcinfo
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd0be15ee	drm_mode_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3028e75	drm_sman_set_manager
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3ffab51	drm_ht_remove
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd5862fd5	drm_get_dev
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd83d2582	drm_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd3febe2	drm_gem_object_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd49095c	drm_ht_insert_item
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe04f5234	drm_debugfs_create_files
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe06e4566	drm_agp_info
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe1457735	drm_ht_remove_item
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe24a7b88	drm_ht_find_item
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe31161d4	drm_mode_duplicate
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe39f9258	drm_getsarea
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe5bdce7e	drm_mode_debug_printmodeline
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe6807050	drm_vblank_post_modeset
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe919dd5c	drm_sman_owner_clean
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe9c0048f	drm_mode_detachmode_crtc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xebc2fab8	drm_read
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xee58f68b	drm_property_destroy
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf12888a9	drm_irq_uninstall
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf1421d13	drm_mode_sort
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf42a2b26	drm_ht_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf42e8483	drm_vblank_get
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfc186401	drm_mode_config_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfc190dc0	drm_mm_takedown
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfca3ca58	drm_mode_validate_size
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfcc0b8c2	drm_vblank_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfdfbad19	drm_sman_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x10e2fec3	drm_helper_probe_single_connector_modes
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x14c69e89	drm_fb_helper_fill_var
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x3464e4ce	drm_helper_connector_dpms
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x34ff52a5	drm_helper_crtc_in_use
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x36f5dab6	drm_fb_helper_blank
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x3a30b141	drm_fb_helper_set_par
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x49dd5dbc	drm_fb_helper_single_fb_probe
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x4bbbdb79	i2c_dp_aux_add_bus
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x4e249375	drm_helper_disable_unused_functions
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x7cb31ff8	drm_crtc_helper_set_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x80c756c1	drm_helper_encoder_in_use
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x84f07bc9	drm_fb_helper_pan_display
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x876f0dd4	drm_helper_resume_force_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x985bb138	drm_helper_probe_connector_modes
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x9d251144	drm_fb_helper_panic
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xa4e72d4b	drm_fb_helper_setcmap
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xa75131d2	drm_helper_initial_config
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xb90a5e9d	drm_fb_helper_setcolreg
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xc469c244	drm_fb_helper_restore
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xcaba9f8d	drm_fb_helper_add_connector
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xcac20e22	drm_helper_hotplug_stage_two
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xcb5977ee	drm_fb_helper_check_var
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xd5cecf9f	drm_fb_helper_fill_fix
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xd8dc0b4c	drm_fb_helper_init_crtc_count
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xdf118c61	drm_crtc_helper_set_config
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xe4ce0b12	drm_helper_mode_fill_fb_struct
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xfb27b6db	drm_fb_helper_free
+EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0x1becfa2f	radeonfb_remove
+EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0x1fc0886e	radeonfb_resize
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x07787990	ttm_bo_global_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x0e79cdf6	ttm_suspend_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x132b05be	ttm_round_pot
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x1b55047f	ttm_bo_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x23ba8329	ttm_vt_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x2921f46a	ttm_mem_global_alloc
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x2b36c329	ttm_fbdev_mmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x2b7834b0	ttm_read_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x2bb6388d	ttm_base_object_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x2e175208	ttm_bo_synccpu_write_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x34704ea7	ttm_global_item_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x365feb2e	ttm_eu_reserve_buffers
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x3c3c3af1	ttm_bo_global_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x4733ea39	ttm_tt_populate
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x482736c1	ttm_ref_object_add
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x4998650a	ttm_write_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x4af6f5d1	ttm_tt_set_placement_caching
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x4e0aa310	ttm_read_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x59af5702	ttm_mem_global_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x5ab32054	ttm_object_device_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x5b0b11f0	ttm_bo_wait
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x5d865cf7	ttm_ref_object_base_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x5e2449d3	ttm_bo_init_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x61bdb34f	ttm_eu_fence_buffer_objects
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x664fef25	ttm_bo_wait_cpu
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x66666d70	ttm_global_item_ref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x8284e39c	ttm_bo_kunmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x83fd9a30	ttm_object_file_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x86a4066d	ttm_eu_backoff_reservation
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x905f4704	ttm_bo_device_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x9371f948	ttm_vt_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x9486ec82	ttm_bo_swapout_all
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xa10af0f7	ttm_object_device_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xa17ac231	ttm_bo_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xa6a05331	ttm_bo_reserve
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xa732a1b7	ttm_bo_mmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xa950236c	ttm_bo_synccpu_write_grab
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb7df20c1	ttm_bo_move_memcpy
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xbdc74f35	ttm_lock_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xbe37d6fc	ttm_base_object_lookup
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xbe66f342	ttm_bo_mem_space
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc3f5982f	ttm_bo_unmap_virtual
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc6baa3c7	ttm_bo_kmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc985ee54	ttm_write_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc9a7d353	ttm_mem_global_free
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xcb9e9588	ttm_agp_backend_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xcda2a6f9	ttm_bo_unreserve
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xd5159eb3	ttm_bo_move_accel_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xdae325c8	ttm_bo_clean_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xde594d79	ttm_bo_device_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xe0e6c696	ttm_tt_bind
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xec8341bd	ttm_bo_evict_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xf4cdcb94	ttm_bo_move_ttm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xf52e5f52	ttm_suspend_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xf98669b7	ttm_object_file_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xfaafede1	ttm_bo_validate
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xfde12b8c	ttm_mem_global_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xfe1f71b4	ttm_base_object_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xfe362a63	ttm_io_prot
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xff32b5f6	ttm_bo_wait_unreserved
+EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0x0903c239	vid_from_reg
+EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0xef1c781c	vid_which_vrm
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0x9d9e120f	i2c_pca_add_numbered_bus
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0xc97ebb43	i2c_pca_add_bus
+EXPORT_SYMBOL drivers/i2c/busses/i2c-amd756 0x056ed9da	amd756_smbus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x03e410e5	hpsb_iso_packet_sent
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x14d65572	hpsb_allocate_and_register_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x166a8639	hpsb_unregister_protocol
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x18a73378	hpsb_iso_n_ready
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1a200e5a	csr1212_release_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x219cbabe	dma_region_offset_to_bus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x21b20c25	hpsb_lock
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x25ddf9d3	hpsb_iso_packet_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x29a3c26e	hpsb_destroy_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2a4cc36b	csr1212_attach_keyval_to_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2c21264e	hpsb_send_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2f7db775	hpsb_free_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x36d5a564	hpsb_unregister_highlevel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x387b3112	hpsb_iso_recv_unlisten_channel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3a85d369	hpsb_iso_recv_flush
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3c89280e	hpsb_update_config_rom_image
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3e37bea9	__hpsb_register_protocol
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3e67ce56	hpsb_iso_recv_listen_channel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3ef66810	hpsb_packet_success
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x493b6856	hpsb_make_streampacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4eb4456a	hpsb_iso_wake
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4ec1166f	hpsb_alloc_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5452b9e9	hpsb_set_hostinfo_key
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5ed9fb3a	hpsb_add_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5f5fdd2f	csr1212_new_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6507d45e	hpsb_reset_bus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x65f861da	hpsb_selfid_complete
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x672ad148	dma_region_sync_for_device
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x685a4a06	hpsb_resume_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6a2a24af	hpsb_iso_stop
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6f63dfc1	hpsb_get_hostinfo_bykey
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x727a4a19	hpsb_selfid_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x75b8e871	hpsb_iso_recv_release_packets
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7634cfa4	hpsb_bus_reset
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x76bc1a5c	dma_region_free
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7ac57a04	hpsb_create_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7bbf4644	hpsb_unregister_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7d9bd5b5	hpsb_packet_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7f2239b3	hpsb_get_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x84dfed4a	hpsb_remove_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x85667cbc	hpsb_write
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8879f8f0	dma_region_sync_for_cpu
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8c235e4d	hpsb_alloc_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8ead37b6	hpsb_register_highlevel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8ec2b312	dma_region_alloc
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x92fd79e5	hpsb_read
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x92ffee58	hpsb_packet_sent
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x94bce230	csr1212_get_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x979b3052	dma_prog_region_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9809dcd0	hpsb_set_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x98553a27	hpsb_iso_xmit_start
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9b03a847	hpsb_make_lockpacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa1e584a1	dma_region_mmap
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa3fcbada	hpsb_node_fill_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa924dac6	dma_prog_region_alloc
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaef57bb5	csr1212_detach_keyval_from_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaefbd374	csr1212_parse_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xafe01191	hpsb_make_readpacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb3371ab6	hpsb_read_cycle_timer
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb3564ff4	hpsb_iso_xmit_sync
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbba70620	dma_prog_region_free
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbd58ef8d	hpsb_iso_xmit_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc223c588	hpsb_iso_xmit_queue_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xca8cc09f	hpsb_iso_recv_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xcfd8c757	hpsb_free_tlabel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd14f24dc	hpsb_node_write
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd4bdd6fd	hpsb_get_tlabel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd97cdab8	hpsb_set_packet_complete_task
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd9afa928	hpsb_iso_recv_set_channel_mask
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xda1fac82	hpsb_make_phypacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe5ea56e5	hpsb_iso_shutdown
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe9e6ac70	hpsb_update_config_rom
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xea4152ff	dma_region_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xec086d11	hpsb_make_lock64packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xefdcfd2c	hpsb_register_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf155a989	hpsb_protocol_class
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf64cad32	hpsb_iso_recv_start
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfab27536	csr1212_read
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfba57f51	hpsb_speedto_str
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xffa1a84f	hpsb_make_writepacket
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x0bd8b762	ohci1394_stop_context
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x1d5aeebc	ohci1394_init_iso_tasklet
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x60a835c8	ohci1394_register_iso_tasklet
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x6e64e291	ohci1394_unregister_iso_tasklet
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x1c48cd49	rdma_addr_cancel
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x3908564c	rdma_resolve_ip
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x6766c410	rdma_translate_ip
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x6e7a5651	rdma_addr_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xee867448	rdma_addr_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xfa5647cc	rdma_copy_addr
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x00f97a70	ib_send_cm_rtu
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x061c9ed4	ib_send_cm_rep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x2f6581a7	ib_send_cm_sidr_req
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x38f06ae1	ib_send_cm_dreq
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x45eab199	ib_send_cm_req
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x4ae6898c	ib_cm_notify
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x65aa5397	ib_send_cm_sidr_rep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x88b5ebc3	ib_send_cm_lap
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x9ff8a9eb	ib_cm_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xa6dad157	ib_send_cm_drep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xb233934b	ib_send_cm_rej
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xb560b1e6	ib_destroy_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xcfe05a10	ib_send_cm_mra
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xdb22b801	ib_cm_listen
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xdc519d04	ib_create_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xdce0f200	cm_class
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xe76884c3	ib_send_cm_apr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0536aea6	ib_fmr_pool_unmap
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x06358761	ib_find_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x07c4d5b2	ib_query_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0bc9560d	ib_register_event_handler
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0da612fe	ib_register_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1e491a04	ib_unmap_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1f14a77e	ib_dereg_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x200a0c44	ib_dealloc_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2210fecd	ib_fmr_pool_map_phys
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x223c2b49	ib_umem_page_count
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2bac94ac	ib_find_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2c5e65d1	ib_dealloc_pd
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2e3ee9bb	ib_query_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x31be3c9c	ib_query_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x36a07ae7	ib_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3a3b03f3	ib_free_fast_reg_page_list
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3f7567fd	ib_rate_to_mult
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4b523893	ib_umem_get
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4dbabe88	ib_umem_release
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x520b2638	ib_pack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x53a7eb17	ib_alloc_pd
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5939643b	ib_create_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x598f18a3	ib_alloc_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5e9323c0	ib_destroy_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x60d7e0ac	ib_query_port
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6737b68f	ib_modify_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6f045756	ib_find_cached_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6f572acd	ib_get_client_data
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6fedef4e	ib_destroy_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x763adced	ib_rereg_phys_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7cd05992	ib_modify_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8411dcc7	ib_resize_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8640eaeb	ib_modify_qp_is_ok
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x87b614d8	ib_ud_header_pack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8b23b555	ib_find_cached_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8b27a493	ib_set_client_data
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8c7b3569	ib_alloc_mw
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x92dd1928	ib_query_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x96ce6c46	rdma_node_get_transport
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x98fdb3d8	ib_modify_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9d804fa1	mult_to_ib_rate
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9df49627	ib_init_ah_from_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa068b972	ib_get_dma_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xac56373f	ib_create_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xae1a3cb5	ib_destroy_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb1a312e1	ib_unpack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb58aac78	ib_get_cached_lmc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb5dbae00	ib_get_cached_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb6d20abb	ib_dispatch_event
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb7eff1af	ib_create_ah_from_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb9385010	ib_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xbc7b47ab	ib_create_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xbc8d9aa4	ib_dealloc_mw
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xbd9030e7	ib_flush_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc6f45fc8	ib_modify_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc9614ab1	ib_destroy_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xca749953	ib_query_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd00b09ba	ib_alloc_fast_reg_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd17ba9d1	ib_ud_header_init
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd65da825	ib_query_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd77591c3	ib_dealloc_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd7aef381	ib_alloc_fast_reg_page_list
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd85b8c4e	ib_modify_port
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xde2b7da8	ib_create_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe3da54f2	ib_modify_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe7f07097	ib_alloc_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe8dca5af	ib_attach_mcast
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe9b3ec40	ib_destroy_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xebcf2ecf	ib_detach_mcast
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xed7b711a	ib_query_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xedd94a78	ib_create_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf36498b9	ib_ud_header_unpack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf7d91c42	ib_get_cached_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf86bc664	ib_reg_phys_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xfad2052a	ib_unregister_event_handler
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xfe19bf3e	ib_unregister_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x2106dc29	ib_modify_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x2157fd38	ib_register_mad_agent
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x334df1f8	ib_cancel_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x358f546f	ib_post_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x581249fd	ib_get_rmpp_segment
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x60b18a66	ib_free_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x61e966d4	ib_unregister_mad_agent
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x679e9825	ib_register_mad_snoop
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6daa1908	ib_process_mad_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6ef787ed	ib_response_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6f077fcf	ib_get_mad_data_offset
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x7b5d4b7a	ib_is_mad_class_rmpp
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x844ee29e	ib_redirect_mad_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xa0598e5c	ib_create_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xe5bef1b7	ib_free_recv_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x183d9cd5	ib_sa_path_rec_get
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x39ed07ff	ib_init_ah_from_path
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x446afadb	ib_sa_join_multicast
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x576fdbac	ib_sa_free_multicast
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x6043324f	ib_sa_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x98d0d1b5	ib_sa_get_mcmember_rec
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x99d1c3a2	ib_init_ah_from_mcmember
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xb0ffafc1	ib_sa_service_rec_query
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xeb3b6ca3	ib_sa_cancel_query
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xf6a5def7	ib_sa_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x02f847bc	ib_copy_path_rec_from_user
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x07cf5a51	ib_copy_ah_attr_to_user
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x18382f6a	ib_copy_path_rec_to_user
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x184f3575	ib_copy_qp_attr_to_user
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x0857cd31	iw_cm_accept
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x27697fd6	iw_cm_listen
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x4fe987d5	iw_cm_reject
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x7c19ca27	iw_cm_connect
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x7cc3fc55	iw_create_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x9fdf9a78	iw_destroy_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xa2b68d77	iw_cm_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xcf2c2923	iw_cm_disconnect
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x0660a087	rdma_leave_multicast
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x15f536a7	rdma_resolve_addr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x16c432f4	rdma_connect
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x17e88ed3	rdma_listen
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x22f20fdd	rdma_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x25cb1b2f	rdma_bind_addr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x2a4314f6	rdma_disconnect
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x4b49b7b1	rdma_destroy_qp
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x6933f64a	rdma_resolve_route
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x6f14481d	rdma_reject
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x7cee0e66	rdma_join_multicast
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x91daa618	rdma_set_ib_paths
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x959dc675	rdma_notify
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xd5b12cd9	rdma_create_id
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xda6011de	rdma_accept
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xdfe48d37	rdma_set_service_type
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xe2b81142	rdma_create_qp
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xfc7ae45a	rdma_destroy_id
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x0590b016	gameport_start_polling
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x20d649ab	gameport_stop_polling
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x289bcb94	gameport_unregister_driver
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x696f68fd	gameport_unregister_port
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x93046da6	gameport_set_phys
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x9a67a61c	__gameport_register_driver
+EXPORT_SYMBOL drivers/input/gameport/gameport 0xa7cc86e8	gameport_close
+EXPORT_SYMBOL drivers/input/gameport/gameport 0xddd94523	gameport_open
+EXPORT_SYMBOL drivers/input/gameport/gameport 0xf6e8d57b	__gameport_register_port
+EXPORT_SYMBOL drivers/input/input-polldev 0x3a50cc10	input_unregister_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0x6c2c930d	input_register_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0xf4a651f5	input_free_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0xf86897ff	input_allocate_polled_device
+EXPORT_SYMBOL drivers/md/dm-log 0x03817f25	dm_dirty_log_type_unregister
+EXPORT_SYMBOL drivers/md/dm-log 0x5245f933	dm_dirty_log_create
+EXPORT_SYMBOL drivers/md/dm-log 0x7accd1bd	dm_dirty_log_type_register
+EXPORT_SYMBOL drivers/md/dm-log 0xbadb512b	dm_dirty_log_destroy
+EXPORT_SYMBOL drivers/md/dm-snapshot 0x195ab75d	dm_exception_store_type_unregister
+EXPORT_SYMBOL drivers/md/dm-snapshot 0x8720255e	dm_exception_store_create
+EXPORT_SYMBOL drivers/md/dm-snapshot 0x9ed04c6d	dm_exception_store_destroy
+EXPORT_SYMBOL drivers/md/dm-snapshot 0xa8413049	dm_exception_store_type_register
+EXPORT_SYMBOL drivers/md/md-mod 0x083380f6	md_write_end
+EXPORT_SYMBOL drivers/md/md-mod 0x0a2d2cc8	md_wakeup_thread
+EXPORT_SYMBOL drivers/md/md-mod 0x0b1140f6	md_integrity_add_rdev
+EXPORT_SYMBOL drivers/md/md-mod 0x39c513cc	register_md_personality
+EXPORT_SYMBOL drivers/md/md-mod 0x3f9890a7	md_set_array_sectors
+EXPORT_SYMBOL drivers/md/md-mod 0x427f73a0	md_error
+EXPORT_SYMBOL drivers/md/md-mod 0x5c9a73dc	bitmap_unplug
+EXPORT_SYMBOL drivers/md/md-mod 0x5df0977d	md_integrity_register
+EXPORT_SYMBOL drivers/md/md-mod 0x5f9f573c	md_wait_for_blocked_rdev
+EXPORT_SYMBOL drivers/md/md-mod 0x5fd5ed7b	unregister_md_personality
+EXPORT_SYMBOL drivers/md/md-mod 0x6142fef1	md_register_thread
+EXPORT_SYMBOL drivers/md/md-mod 0x8fd79af4	bitmap_end_sync
+EXPORT_SYMBOL drivers/md/md-mod 0x99925cd1	md_write_start
+EXPORT_SYMBOL drivers/md/md-mod 0x9b9d0df6	md_check_recovery
+EXPORT_SYMBOL drivers/md/md-mod 0xa7b3510a	mddev_congested
+EXPORT_SYMBOL drivers/md/md-mod 0xb0a8427e	md_done_sync
+EXPORT_SYMBOL drivers/md/md-mod 0xc6c7bc9d	bitmap_close_sync
+EXPORT_SYMBOL drivers/md/md-mod 0xd440aff7	bitmap_cond_end_sync
+EXPORT_SYMBOL drivers/md/md-mod 0xdb4fc598	md_unregister_thread
+EXPORT_SYMBOL drivers/md/md-mod 0xe4f0d8f0	bitmap_endwrite
+EXPORT_SYMBOL drivers/md/md-mod 0xe71b34ef	md_check_no_bitmap
+EXPORT_SYMBOL drivers/md/md-mod 0xf3bd329e	bitmap_start_sync
+EXPORT_SYMBOL drivers/md/md-mod 0xf8f2dd2c	bitmap_startwrite
+EXPORT_SYMBOL drivers/md/raid6_pq 0x0bd662f6	raid6_gfmul
+EXPORT_SYMBOL drivers/md/raid6_pq 0x15fe0cd3	raid6_gfexp
+EXPORT_SYMBOL drivers/md/raid6_pq 0x5ba93f9d	raid6_gfinv
+EXPORT_SYMBOL drivers/md/raid6_pq 0x7456cc61	raid6_empty_zero_page
+EXPORT_SYMBOL drivers/md/raid6_pq 0xce45a6f1	raid6_gfexi
+EXPORT_SYMBOL drivers/media/common/tuners/mc44s803 0x9c564659	mc44s803_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mt2060 0x5ab09c8e	mt2060_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mt2131 0x4138f16e	mt2131_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mt2266 0xfaaf1e7c	mt2266_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mxl5005s 0x5148f4b8	mxl5005s_attach
+EXPORT_SYMBOL drivers/media/common/tuners/qt1010 0xb38ef495	qt1010_attach
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0x0cb4b189	tuners
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0xc2821775	tuner_count
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-xc2028 0xdf984f92	xc2028_attach
+EXPORT_SYMBOL drivers/media/common/tuners/xc5000 0xf7a5b557	xc5000_attach
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x0436717c	flexcop_dma_control_size_irq
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x145f3e49	flexcop_eeprom_check_mac_addr
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x152f888e	flexcop_device_exit
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x1ecfee32	flexcop_device_kmalloc
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x56e6db98	flexcop_dma_free
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x5dfd055d	flexcop_i2c_request
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x626d6e95	flexcop_dma_config
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x66d3f3ab	flexcop_sram_set_dest
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x68810e2e	flexcop_dma_allocate
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x750bbb35	flexcop_device_initialize
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xb67ad4ac	flexcop_device_kfree
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xb867b4c9	flexcop_pass_dmx_data
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xbbc896b4	flexcop_dma_xfer_control
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xc0f210f2	flexcop_dma_control_timer_irq
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xc7afe098	flexcop_pass_dmx_packets
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xc7e5bb4e	flexcop_pid_feed_control
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xcb01e2d1	flexcop_dma_config_timer
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xd8040602	flexcop_wan_set_speed
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xe6cfbf9d	flexcop_dump_reg
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xfe775b13	flexcop_sram_ctrl
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x0ace2b67	bt878_start
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x26198ac6	bt878
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x7629b8c3	bt878_stop
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xd5d0bdef	bt878_num
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xe1686845	bt878_device_control
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x167ce40f	dst_error_bailout
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x1abb29b1	dst_comm_init
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x25fb7821	dst_error_recovery
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x28d1e5e2	write_dst
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x4853c2b8	dst_attach
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x590fc228	read_dst
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x629ed43d	dst_pio_disable
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xaf7cc133	rdc_reset_state
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xc3810ee4	dst_wait_dst_ready
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xe94b8c9c	dst_check_sum
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst_ca 0xecdfdb72	dst_ca_attach
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x075c1376	dvb_ca_en50221_camchange_irq
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0c4d4a14	dvb_frontend_sleep_until
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x12b6aa18	dvb_register_device
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x1b7dd0e1	dvb_dmx_swfilter_204
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x1d6df58c	dvb_ringbuffer_read
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x1f112663	dvb_dmx_swfilter_packets
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x251cad54	dvb_ca_en50221_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x26eb4103	dvb_ringbuffer_flush_spinlock_wakeup
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x2e6e56b7	dvb_ca_en50221_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x2fe06246	dvb_ringbuffer_avail
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x3089aaa2	dvb_ringbuffer_free
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x33954be7	dvb_ringbuffer_empty
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x37b9c0d9	dvb_ca_en50221_frda_irq
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x42590d80	dvb_dmx_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x48087fd8	dvb_unregister_frontend
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x4b51b046	dvb_dmx_swfilter
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x4b632aa3	dvb_dmx_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x4f0ce9fc	dvb_dmxdev_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x54a8ba5e	dvb_unregister_adapter
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x56e742fb	dvb_ca_en50221_camready_irq
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6ef69874	dvb_ringbuffer_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6f334f24	dvb_ringbuffer_read_user
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x7377a0b3	dvb_frontend_reinitialise
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x74a5a698	dvb_filter_pes2ts_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x80e3832d	dvb_filter_get_ac3info
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x97d38e3e	dvb_generic_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x97d3ff83	dvb_register_frontend
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x99ec5759	dvb_ringbuffer_write
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x9ea9766b	dvb_generic_ioctl
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xac4ca1b0	intlog2
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xadaa5e61	dvb_frontend_detach
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xbc0d91e1	timeval_usec_diff
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xc104c7c3	dvb_register_adapter
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xc12479b7	dvb_dmxdev_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xd01ca626	dvb_unregister_device
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xd98f3287	dvb_generic_open
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xdb29c13d	dvb_net_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe5ae8707	intlog10
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xebb1d8f1	dvb_net_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf826deb0	dvb_filter_pes2ts
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x0cac5dd9	dvb_usb_device_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x2472514c	dvb_usb_generic_rw
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x4a48aa7b	usb_cypress_load_firmware
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x76abcabe	dvb_usb_device_exit
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x944700ce	dvb_usb_nec_rc_key_to_event
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xcbaba82f	dvb_usb_generic_write
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xcbe6ce81	dvb_usb_get_hexline
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x205e9b55	af9005_rc_decode
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x3693500b	af9005_rc_keys
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0xd3383957	af9005_rc_keys_size
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x0943800d	dibusb_read_eeprom_byte
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x1eb2bb07	dibusb_streaming_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x22283c22	dibusb_dib3000mc_frontend_attach
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x2a687b50	dibusb_pid_filter
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x7df0fac1	dibusb_rc_query
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x8839aef9	dibusb_pid_filter_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x95713082	dibusb_dib3000mc_tuner_attach
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x97d5dd82	dibusb_i2c_algo
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xa5bc0bd9	dibusb2_0_power_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xb154024f	dibusb2_0_streaming_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xc9016633	dibusb_power_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xcc9ccaff	dibusb_rc_keys
+EXPORT_SYMBOL drivers/media/dvb/frontends/af9013 0x91e6c257	af9013_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/au8522 0x64488667	au8522_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/bcm3510 0x4378b862	bcm3510_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx22700 0xf6ea7fc4	cx22700_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx22702 0x4eb00d0b	cx22702_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24110 0x045bad0b	cx24110_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0x07f6767d	cx24113_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0x0f3854eb	cx24113_agc_callback
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24116 0x342fd3e6	cx24116_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0x1433b4a7	cx24123_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0xb882a993	cx24123_get_tuner_i2c_adapter
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0x3a1aad86	dib0070_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0x9ee5687d	dib0070_wbd_offset
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0x9efe3f35	dib0070_ctrl_agc_filter
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mb 0xac543374	dib3000mb_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x0481b9b7	dib3000mc_pid_parse
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x1b32ce1b	dib3000mc_get_tuner_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x2c91d610	dib3000mc_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xa4c5d2fc	dib3000mc_set_config
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xb4fa8295	dib3000mc_i2c_enumeration
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xdd9170a9	dib3000mc_pid_control
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0x668dd58d	dib7000m_get_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0xa59f9cb5	dib7000m_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x0d8fb4ca	dib7000p_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x3cae8b15	dib7000p_get_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x4a6e5f24	dib7000p_i2c_enumeration
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x77fcf224	dib7000pc_detection
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xa0c2f7a0	dib7000p_set_wbd_ref
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xdb1b578b	dib7000p_set_gpio
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x0821d432	dib8000_i2c_enumeration
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x2d16de1e	dib8000_get_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x8a38a89b	dib8000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0xb84aad8a	dib8000_set_gpio
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0xdb8df1ac	dib8000_set_wbd_ref
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x1994415a	dibx000_init_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x2b221805	dibx000_reset_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x7ce95187	dibx000_get_i2c_adapter
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0xd484af59	dibx000_exit_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dvb-pll 0xd625c234	dvb_pll_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/isl6405 0xcb209a0f	isl6405_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/isl6421 0x4239366c	isl6421_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/itd1000 0x39af2c6d	itd1000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/l64781 0xd79bb462	l64781_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt3305 0xa9416e6a	lgdt3305_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt330x 0x3c9bb06b	lgdt330x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lgs8gxx 0xdbdafb31	lgs8gxx_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0x52353bb9	lnbh24_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0x5b37529b	lnbp21_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/mt312 0x26f8fa70	mt312_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/mt352 0x253b2172	mt352_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/nxt200x 0x4086f652	nxt200x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/nxt6000 0x4213d07f	nxt6000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/or51132 0x50cf5d13	or51132_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/or51211 0x8f4c8b98	or51211_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1409 0x82a95401	s5h1409_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1411 0x8c876ac2	s5h1411_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0x3d509511	s5h1420_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0x6b1b502e	s5h1420_get_tuner_i2c_adapter
+EXPORT_SYMBOL drivers/media/dvb/frontends/si21xx 0x406ca0a0	si21xx_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/sp8870 0x95dbb867	sp8870_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/sp887x 0x01e79bd5	sp887x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stb6000 0x90433207	stb6000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0288 0x273e374f	stv0288_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0297 0x08b7883d	stv0297_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0299 0x152c016c	stv0299_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0900 0x7e7c5640	stv0900_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv6110 0xf4c7d08b	stv6110_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10021 0x920272f5	tda10021_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10023 0x5db716cf	tda10023_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10048 0x9c1fe919	tda10048_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x843a5fc8	tda10045_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0xe55eabc2	tda10046_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10086 0x5ef25689	tda10086_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda8083 0xd92c76f1	tda8083_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda826x 0xe94f232b	tda826x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/ves1820 0xb48f2889	ves1820_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/ves1x93 0xd6af00cd	ves1x93_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/zl10036 0x22782d63	zl10036_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/zl10039 0x42713d0d	zl10039_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/zl10353 0x91bd6f56	zl10353_attach
+EXPORT_SYMBOL drivers/media/dvb/ttpci/ttpci-eeprom 0x5ccb32c6	ttpci_eeprom_parse_mac
+EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0x0c22973f	ttusbdecfe_dvbs_attach
+EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0x27e596f5	ttusbdecfe_dvbt_attach
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x11dc4b6d	bttv_gpio_enable
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x1f591bd1	bttv_sub_register
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x767f3c01	bttv_sub_unregister
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x8ecf4acc	bttv_write_gpio
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xbcf2d2fb	bttv_read_gpio
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xf13eed2f	bttv_get_pcidev
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0x21285e49	btcx_riscmem_alloc
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0x495e4b0c	btcx_calc_skips
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xad2fe38b	btcx_sort_clips
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xc368f8e6	btcx_align
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xcda0ded2	btcx_screen_clips
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xceae97f8	btcx_riscmem_free
+EXPORT_SYMBOL drivers/media/video/cpia 0x69c1ae95	cpia_register_camera
+EXPORT_SYMBOL drivers/media/video/cpia 0xc22b7070	cpia_unregister_camera
+EXPORT_SYMBOL drivers/media/video/cx18/cx18 0x2cdea06d	cx18_reset_ir_gpio
+EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0x5347122c	cx231xx_unregister_extension
+EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0xfbd53f8d	cx231xx_register_extension
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x155650f3	cx2341x_ctrl_get_menu
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x1ca0c084	cx2341x_log_status
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x2f25eee2	cx2341x_update
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x5b88faf6	cx2341x_ext_ctrls
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf76ce95	cx2341x_fill_defaults
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf8b77a4	cx2341x_mpeg_ctrls
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xe2c2b5eb	cx2341x_ctrl_query
+EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0x6896d591	vp3054_i2c_remove
+EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0xf6fdd4c9	vp3054_i2c_probe
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x01dadbaa	cx88_set_freq
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x0d122210	cx88_set_control
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x3ae3b66e	cx8800_ctrl_query
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x64ef37bd	cx88_enum_input
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x6f0f98ca	cx88_video_mux
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xac4e53b9	cx88_user_ctrls
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xdb082d49	cx88_get_control
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x1bc9d143	cx8802_get_device
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x2d461143	cx8802_unregister_driver
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x6ad53268	cx8802_cancel_buffers
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x95c35767	cx8802_get_driver
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x9c29a8a2	cx8802_buf_queue
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xd2981900	cx8802_register_driver
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xf3f42966	cx8802_buf_prepare
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x0f6ed086	cx88_set_scale
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x13a1b9dd	cx88_shutdown
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x2850bc60	cx88_free_buffer
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x2d58f595	cx88_risc_stopper
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x2e655c1d	cx88_ir_stop
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x472a2b5c	cx88_dsp_detect_stereo_sap
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x4b89c445	cx88_core_get
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x5de97b6a	cx88_sram_channel_dump
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x6141c8c5	cx88_tuner_callback
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x67388954	cx88_risc_databuffer
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x7626fc30	cx88_get_stereo
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x763e38d9	cx88_ir_start
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x76955df6	cx88_set_tvaudio
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x79c91045	cx88_core_irq
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x904b8696	cx88_audio_thread
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x9b140fff	cx88_sram_channels
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xac30aa96	cx88_newstation
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb47f6cda	cx88_print_irqbits
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb4b53b86	cx88_set_tvnorm
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb6e14b44	cx88_vdev_init
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xbd8ada93	cx88_risc_buffer
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xc6ce4fdc	cx88_wakeup
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xddfbaaad	cx88_reset
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xfbd82d6b	cx88_core_put
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xfbde7874	cx88_sram_channel_setup
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xff9c83db	cx88_set_stereo
+EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0x4090bc2c	em28xx_register_extension
+EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0xef4c4930	em28xx_unregister_extension
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x496baf82	gspca_resume
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x4d948b90	gspca_frame_add
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x618d2f88	gspca_get_i_frame
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x6ef55d04	gspca_dev_probe
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x9670af2c	gspca_debug
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xa8410577	gspca_disconnect
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xc2a1a5a4	gspca_auto_gain_n_exposure
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xe352bcf2	gspca_suspend
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x024c8c84	ivtv_vapi
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x14f67530	ivtv_debug
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x31238b91	ivtv_udma_alloc
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x31a23388	ivtv_udma_prepare
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x47739ddf	ivtv_set_irq_mask
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x8e50890b	ivtv_udma_setup
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x8f1d6ac4	ivtv_vapi_result
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xa75dd963	ivtv_udma_unmap
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xbbac928b	ivtv_api
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xc34d3142	ivtv_init_on_first_open
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xd6cfe62b	ivtv_clear_irq_mask
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xfc96f122	ivtv_reset_ir_gpio
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x001e05e1	saa7134_ts_unregister
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x04e83446	saa7134_tuner_callback
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x050b5691	saa7134_dmasound_init
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x1211df5d	saa7134_devlist
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x14dfecc6	saa7134_boards
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x1e393404	saa7134_dmasound_exit
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x24f77109	saa7134_pgtable_alloc
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x3b1bbdb5	saa7134_set_dmabits
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x4b83c412	saa_dsp_writel
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x5557cd5d	saa7134_pgtable_build
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xa7429129	saa7134_tvaudio_setmute
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xc1322959	saa7134_devlist_lock
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xc66c6ba6	saa7134_pgtable_free
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xe4031b1b	saa7134_ts_register
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xe8944326	saa7134_set_gpio
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x3d631edb	soc_camera_host_register
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x468f0e3e	soc_camera_apply_sensor_flags
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x5e06c22c	soc_camera_host_unregister
+EXPORT_SYMBOL drivers/media/video/soc_camera 0xa7c65c56	soc_camera_xlate_by_fourcc
+EXPORT_SYMBOL drivers/media/video/soc_camera 0xffc4a98c	soc_camera_format_by_fourcc
+EXPORT_SYMBOL drivers/media/video/tveeprom 0x4db21373	tveeprom_hauppauge_analog
+EXPORT_SYMBOL drivers/media/video/tveeprom 0x82f71235	tveeprom_read
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x165cb92e	usbvideo_DeinterlaceFrame
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x186140d0	usbvideo_TestPattern
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x5293ede2	RingQueue_Enqueue
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x54ded406	RingQueue_Dequeue
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x81f04d55	usbvideo_RegisterVideoDevice
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x9778abda	RingQueue_Flush
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xa2b93d54	usbvideo_AllocateDevice
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xae48ce25	usbvideo_Deregister
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xdf605c59	RingQueue_WakeUpInterruptible
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xf78825b9	usbvideo_register
+EXPORT_SYMBOL drivers/media/video/v4l1-compat 0xb6852c61	v4l_compat_translate_ioctl
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x03165a85	v4l2_ctrl_get_menu
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1dcaa0c8	v4l2_prio_max
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1e326b97	v4l2_ctrl_query_fill
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x2f639468	v4l2_prio_check
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x42c8e001	v4l2_ctrl_next
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x495426ee	v4l2_ctrl_get_name
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x4ed5e0d7	v4l2_chip_match_host
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x50766d69	v4l2_ctrl_query_menu_valid_items
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x7254b460	v4l2_chip_match_i2c_client
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x76ba9a9a	v4l2_prio_open
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x95284709	v4l2_prio_close
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9c7de443	v4l2_prio_change
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9eb43ee2	v4l2_ctrl_check
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0xabe03eae	v4l2_chip_ident_i2c_client
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0xbecd2858	v4l2_prio_init
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0xd9ee1e3f	v4l2_ctrl_query_menu
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x547736a4	videobuf_dvb_register_bus
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x6c1ddcae	videobuf_dvb_unregister_bus
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x75ea8b93	videobuf_dvb_find_frontend
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xa810a68a	videobuf_dvb_alloc_frontend
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xc89dc8da	videobuf_dvb_dealloc_frontends
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xf57211a5	videobuf_dvb_get_frontend
+EXPORT_SYMBOL drivers/media/video/videodev 0x0614dd5a	v4l2_video_std_frame_period
+EXPORT_SYMBOL drivers/media/video/videodev 0x1237057f	video_register_device_no_warn
+EXPORT_SYMBOL drivers/media/video/videodev 0x123959a1	v4l2_type_names
+EXPORT_SYMBOL drivers/media/video/videodev 0x1dea92c5	video_unregister_device
+EXPORT_SYMBOL drivers/media/video/videodev 0x3adbd595	v4l2_field_names
+EXPORT_SYMBOL drivers/media/video/videodev 0x3f84da71	video_device_release_empty
+EXPORT_SYMBOL drivers/media/video/videodev 0x5ebefe4b	v4l_printk_ioctl
+EXPORT_SYMBOL drivers/media/video/videodev 0x68f47756	video_device_alloc
+EXPORT_SYMBOL drivers/media/video/videodev 0x7e7450b2	video_usercopy
+EXPORT_SYMBOL drivers/media/video/videodev 0x8a99a898	video_register_device
+EXPORT_SYMBOL drivers/media/video/videodev 0x9d6c065e	video_devdata
+EXPORT_SYMBOL drivers/media/video/videodev 0xc425f8ab	video_ioctl2
+EXPORT_SYMBOL drivers/media/video/videodev 0xc973b3ab	video_device_release
+EXPORT_SYMBOL drivers/media/video/videodev 0xe2b92059	v4l2_video_std_construct
+EXPORT_SYMBOL drivers/media/video/videodev 0xf3251e7b	v4l2_norm_to_name
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x189fa1ad	videocodec_attach
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x639f1f7c	videocodec_register
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0xa9fe551f	videocodec_unregister
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0xb9620a79	videocodec_detach
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x0fd0043d	mpt_put_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x112fb7f2	mpt_raid_phys_disk_pg0
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x175fab6e	mpt_HardResetHandler
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x20177cd0	mpt_detach
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x21c65b76	mpt_device_driver_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x26afad9e	mpt_attach
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x29708984	mpt_put_msg_frame_hi_pri
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x3441593f	mpt_GetIocState
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x38911329	mpt_set_taskmgmt_in_progress_flag
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x398e0160	mpt_verify_adapter
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x3a658f6a	mpt_config
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x3aaaf108	mpt_raid_phys_disk_pg1
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x3ab6394a	mpt_send_handshake_request
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x403f24e6	mpt_reset_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x42d8628c	mpt_alloc_fw_memory
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4526289b	mpt_event_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4f75ce17	mpt_halt_firmware
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x502108d0	mpt_fwfault_debug
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x5b3f32ae	mptbase_sas_persist_operation
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x645b4c79	mpt_resume
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x72375f2f	mpt_findImVolumes
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x823163a9	mpt_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc0e69f82	mpt_device_driver_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc47c22e8	mpt_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc611a725	mpt_free_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc908fc31	mpt_print_ioc_summary
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd23e84f8	mpt_clear_taskmgmt_in_progress_flag
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd9a92a75	mpt_reset_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xdd805159	ioc_list
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xe2f80d77	mpt_event_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xe3a8d993	mpt_free_fw_memory
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xe8708276	mpt_get_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xee0ecd5c	mpt_raid_phys_disk_get_num_paths
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xf87ce9a7	mpt_suspend
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x020ef50b	mptscsih_bus_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x04b7e667	mptscsih_io_done
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x201d90e7	mptscsih_raid_id_to_num
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x2b7f2150	mptscsih_remove
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x305f099d	mptscsih_event_process
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x38154931	mptscsih_dev_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x3af3e10e	mptscsih_slave_destroy
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x58f2bb67	mptscsih_ioc_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x5d3a481b	mptscsih_taskmgmt_complete
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x7878cfcb	mptscsih_suspend
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x824f23b3	mptscsih_get_scsi_lookup
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x8265e2dd	mptscsih_slave_configure
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x86d5e882	mptscsih_host_attrs
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x86fc25e8	mptscsih_host_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xa80186db	mptscsih_change_queue_depth
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xb6ff0b2b	mptscsih_resume
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xc5d06980	mptscsih_proc_info
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xd2be1620	mptscsih_is_phys_disk
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xdc49b88c	mptscsih_qcmd
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xdcda88b6	mptscsih_bios_param
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xe6256701	mptscsih_abort
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xe768a7d7	mptscsih_IssueTaskMgmt
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xe84a6b40	mptscsih_scandv_complete
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xf4247d38	mptscsih_shutdown
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xf7be8792	mptscsih_info
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xf9e4a509	mptscsih_taskmgmt_response_code
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x00706884	i2o_status_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x27eadac2	i2o_exec_lct_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2a843bef	i2o_dump_message
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x31f5a6b0	i2o_driver_register
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x349a38bf	i2o_parm_field_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x48958af6	i2o_event_register
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x5d407b7c	i2o_msg_post_wait_mem
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x6d40cdba	i2o_driver_notify_controller_add_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x8d5bfc3e	i2o_device_claim_release
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x8e6331db	i2o_find_iop
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x901bff66	i2o_parm_table_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x9ee160be	i2o_driver_notify_device_remove_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb46c1004	i2o_device_claim
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb4c00dcf	i2o_controllers
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb864fe13	i2o_msg_get_wait
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xd639f02b	i2o_driver_unregister
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xdace497e	i2o_driver_notify_controller_remove_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xe46a2ef8	i2o_parm_issue
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xf067bbc6	i2o_driver_notify_device_add_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xf619e15f	i2o_iop_find_device
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x09465512	ab3100_get_register_page_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x1fba6acd	ab3100_event_register
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x2650ffe9	ab3100_set_register_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x56ea6a65	ab3100_event_registers_startup_state_get
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xa15d2292	ab3100_event_unregister
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xa2401ce4	ab3100_get_chip_type
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xfba243b5	ab3100_mask_and_set_register_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xfdd28be1	ab3100_get_register_interruptible
+EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x1ea998e3	pasic3_write_register
+EXPORT_SYMBOL drivers/mfd/htc-pasic3 0xfdbc302b	pasic3_read_register
+EXPORT_SYMBOL drivers/mfd/mfd-core 0xd9cb82d1	mfd_add_devices
+EXPORT_SYMBOL drivers/mfd/mfd-core 0xe328e0ee	mfd_remove_devices
+EXPORT_SYMBOL drivers/misc/c2port/core 0x0af34cd5	c2port_device_register
+EXPORT_SYMBOL drivers/misc/c2port/core 0x8af82c87	c2port_device_unregister
+EXPORT_SYMBOL drivers/misc/ioc4 0x3f99c2e2	ioc4_unregister_submodule
+EXPORT_SYMBOL drivers/misc/ioc4 0xe84a2ac7	ioc4_register_submodule
+EXPORT_SYMBOL drivers/misc/tifm_core 0x10f4da93	tifm_eject
+EXPORT_SYMBOL drivers/misc/tifm_core 0x17d421ca	tifm_queue_work
+EXPORT_SYMBOL drivers/misc/tifm_core 0x17d9532f	tifm_free_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0x2829ace3	tifm_alloc_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0x2fa5530f	tifm_has_ms_pif
+EXPORT_SYMBOL drivers/misc/tifm_core 0x566938f3	tifm_free_device
+EXPORT_SYMBOL drivers/misc/tifm_core 0x5ac4c590	tifm_alloc_device
+EXPORT_SYMBOL drivers/misc/tifm_core 0x7a4bc6a7	tifm_remove_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0x89a59620	tifm_unregister_driver
+EXPORT_SYMBOL drivers/misc/tifm_core 0xb36e5448	tifm_register_driver
+EXPORT_SYMBOL drivers/misc/tifm_core 0xbdbda04e	tifm_add_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0xc768f94f	tifm_map_sg
+EXPORT_SYMBOL drivers/misc/tifm_core 0xdccc0d8b	tifm_unmap_sg
+EXPORT_SYMBOL drivers/mmc/card/mmc_block 0x7adc77d1	mmc_cleanup_queue
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x184b82fb	mmc_vddrange_to_ocrmask
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x234ffb93	mmc_host_lazy_disable
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x4020f529	mmc_power_save_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x463cec05	mmc_detect_change
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x48260588	mmc_request_done
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x4a5dd4e5	mmc_suspend_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x4cb151b7	mmc_host_enable
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x51753449	mmc_resume_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x56df5a59	mmc_regulator_set_ocr
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x58c9bfd9	mmc_host_disable
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x597f5c0c	mmc_free_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x63ce08f2	__mmc_claim_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x6f4f4719	mmc_alloc_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x7232d15e	mmc_wait_for_req
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x77022258	mmc_try_claim_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x7bdbc4e2	mmc_card_can_sleep
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x890642be	mmc_remove_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x9ab0d387	mmc_card_sleep
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xae465f6a	mmc_set_data_timeout
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xaf515ee8	mmc_align_data_size
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xb75e237d	mmc_wait_for_app_cmd
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xc9242fb7	mmc_card_awake
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xd180b173	mmc_release_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xdd7d6716	mmc_add_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xedf19aa7	mmc_wait_for_cmd
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xef149755	mmc_register_driver
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xf494f618	mmc_regulator_get_ocrmask
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xf6530777	mmc_power_restore_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xfe499523	mmc_unregister_driver
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x0b635a29	cfi_varsize_frob
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x22a55beb	cfi_read_pri
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0xb1184ec5	cfi_fixup
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x148bbf6e	unregister_mtd_chip_driver
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x1aea685a	map_destroy
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x5185d3c5	do_map_probe
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0xfd835a71	register_mtd_chip_driver
+EXPORT_SYMBOL drivers/mtd/chips/gen_probe 0xd832738a	mtd_do_chip_probe
+EXPORT_SYMBOL drivers/mtd/lpddr/lpddr_cmds 0x3f6365dc	lpddr_cmdset
+EXPORT_SYMBOL drivers/mtd/maps/map_funcs 0xb511ffba	simple_map_init
+EXPORT_SYMBOL drivers/mtd/mtd 0x6000125b	add_mtd_partitions
+EXPORT_SYMBOL drivers/mtd/mtd 0xf18e78cb	del_mtd_partitions
+EXPORT_SYMBOL drivers/mtd/mtdconcat 0x35008ba2	mtd_concat_create
+EXPORT_SYMBOL drivers/mtd/mtdconcat 0xecfb5a42	mtd_concat_destroy
+EXPORT_SYMBOL drivers/mtd/nand/nand 0x2ca727fe	nand_default_bbt
+EXPORT_SYMBOL drivers/mtd/nand/nand 0xc6e9a70d	nand_scan_bbt
+EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0x5f233d11	nand_correct_data
+EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0xb4b94377	__nand_correct_data
+EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0xb61c08c5	nand_calculate_ecc
+EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0x836bdb72	nand_flash_ids
+EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0xa336feb7	nand_manuf_ids
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x5f726202	flexonenand_region
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x8b340175	onenand_addr
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0xa21f724f	onenand_scan_bbt
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0xaf9a12c5	onenand_default_bbt
+EXPORT_SYMBOL drivers/net/8390 0x00ddfb77	ei_open
+EXPORT_SYMBOL drivers/net/8390 0x15c6039a	ei_get_stats
+EXPORT_SYMBOL drivers/net/8390 0x4c49c7ae	ei_netdev_ops
+EXPORT_SYMBOL drivers/net/8390 0x7cf1b6d6	ei_start_xmit
+EXPORT_SYMBOL drivers/net/8390 0x7eee0f7b	__alloc_ei_netdev
+EXPORT_SYMBOL drivers/net/8390 0x83e16624	ei_tx_timeout
+EXPORT_SYMBOL drivers/net/8390 0xba09b97f	ei_set_multicast_list
+EXPORT_SYMBOL drivers/net/8390 0xd71382d7	ei_poll
+EXPORT_SYMBOL drivers/net/8390 0xdd365790	ei_interrupt
+EXPORT_SYMBOL drivers/net/8390 0xde124301	NS8390_init
+EXPORT_SYMBOL drivers/net/8390 0xfef52109	ei_close
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x1b56a134	arc_proto_map
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x1ba59ff8	arcnet_open
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x23f86078	arcnet_interrupt
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x26aa2a05	arcnet_unregister_proto
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x45e969c8	alloc_arcdev
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x6534792a	arcnet_debug
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x791f6ba6	arc_raw_proto
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x9cbbdefe	arc_bcast_proto
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xb81a0d76	arc_proto_default
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xe973a043	arcnet_timeout
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xf3bcd3fb	arcnet_close
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xff3c2a81	arcnet_send_packet
+EXPORT_SYMBOL drivers/net/arcnet/com20020 0x6de9e2d0	com20020_check
+EXPORT_SYMBOL drivers/net/arcnet/com20020 0xa4534d39	com20020_found
+EXPORT_SYMBOL drivers/net/arcnet/com20020 0xf658e1d7	com20020_netdev_ops
+EXPORT_SYMBOL drivers/net/bnx2 0x6bf6661f	bnx2_cnic_probe
+EXPORT_SYMBOL drivers/net/cnic 0x0f1ada7e	cnic_register_driver
+EXPORT_SYMBOL drivers/net/cnic 0x636af174	cnic_unregister_driver
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x139d942b	cxgb3_free_stid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x3039f0fc	t3_register_cpl_handler
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x44ea570c	t3_l2t_send_event
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x7c8d7109	cxgb3_remove_tid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x7d851784	cxgb3_queue_tid_release
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x7e5d47fa	cxgb3_register_client
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x83936865	cxgb3_ofld_send
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x8effbdbf	cxgb3_unregister_client
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x98eb0b7e	cxgb3_insert_tid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xb83ce11e	t3_l2e_free
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xc502f532	t3_l2t_get
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xc8d30ca7	t3_l2t_send_slow
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xd79ae80b	cxgb3_free_atid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xe1a6175f	cxgb3_alloc_atid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xf9aa6355	dev2t3cdev
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xfd8ac25b	cxgb3_alloc_stid
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x28ab8b5b	hdlcdrv_arbitrate
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x4861f681	hdlcdrv_receiver
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x6096050e	hdlcdrv_register
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xb06403cf	hdlcdrv_transmitter
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xb3e24833	hdlcdrv_unregister
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x083ad2ae	sirdev_put_instance
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x2d625213	sirdev_receive
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x42ef8a76	sirdev_get_instance
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x62a9f348	irda_register_dongle
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x7556b307	irda_unregister_dongle
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xa9791146	sirdev_raw_read
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xc3f808c1	sirdev_set_dtr_rts
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xd01a4dc5	sirdev_set_dongle
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xd2163b5b	sirdev_raw_write
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xd4fc3176	sirdev_write_complete
+EXPORT_SYMBOL drivers/net/mdio 0x0f934475	mdio45_ethtool_gset_npage
+EXPORT_SYMBOL drivers/net/mdio 0x22bce513	mdio_mii_ioctl
+EXPORT_SYMBOL drivers/net/mdio 0x43e4defc	mdio45_nway_restart
+EXPORT_SYMBOL drivers/net/mdio 0x7577f992	mdio_set_flag
+EXPORT_SYMBOL drivers/net/mdio 0xa1a29548	mdio45_probe
+EXPORT_SYMBOL drivers/net/mdio 0xb34a7575	mdio45_ethtool_spauseparam_an
+EXPORT_SYMBOL drivers/net/mdio 0xc6b1163f	mdio45_links_ok
+EXPORT_SYMBOL drivers/net/mii 0x00e9abbf	generic_mii_ioctl
+EXPORT_SYMBOL drivers/net/mii 0x2f7aa7f9	mii_check_gmii_support
+EXPORT_SYMBOL drivers/net/mii 0x922cabe2	mii_ethtool_sset
+EXPORT_SYMBOL drivers/net/mii 0x97717652	mii_check_media
+EXPORT_SYMBOL drivers/net/mii 0xa623b24f	mii_nway_restart
+EXPORT_SYMBOL drivers/net/mii 0xbac7ab4a	mii_ethtool_gset
+EXPORT_SYMBOL drivers/net/mii 0xe31e4cac	mii_link_ok
+EXPORT_SYMBOL drivers/net/mii 0xf476e26c	mii_check_link
+EXPORT_SYMBOL drivers/net/phy/mdio-bitbang 0xc5f6088e	free_mdio_bitbang
+EXPORT_SYMBOL drivers/net/phy/mdio-bitbang 0xd674fafd	alloc_mdio_bitbang
+EXPORT_SYMBOL drivers/net/ppp_generic 0x17020afd	ppp_unregister_compressor
+EXPORT_SYMBOL drivers/net/ppp_generic 0x1be8b67e	ppp_output_wakeup
+EXPORT_SYMBOL drivers/net/ppp_generic 0x306092ca	ppp_register_channel
+EXPORT_SYMBOL drivers/net/ppp_generic 0x3122bbfd	ppp_input
+EXPORT_SYMBOL drivers/net/ppp_generic 0x3b9427c3	ppp_register_net_channel
+EXPORT_SYMBOL drivers/net/ppp_generic 0x50510190	ppp_input_error
+EXPORT_SYMBOL drivers/net/ppp_generic 0x5ad5cd88	ppp_unregister_channel
+EXPORT_SYMBOL drivers/net/ppp_generic 0x8e3b3beb	ppp_register_compressor
+EXPORT_SYMBOL drivers/net/ppp_generic 0xad916334	ppp_unit_number
+EXPORT_SYMBOL drivers/net/ppp_generic 0xe92119b0	ppp_channel_index
+EXPORT_SYMBOL drivers/net/pppox 0x230e92ee	register_pppox_proto
+EXPORT_SYMBOL drivers/net/pppox 0x5e21b02c	pppox_unbind_sock
+EXPORT_SYMBOL drivers/net/pppox 0xe0ff7a18	unregister_pppox_proto
+EXPORT_SYMBOL drivers/net/pppox 0xe86da8e5	pppox_ioctl
+EXPORT_SYMBOL drivers/net/slhc 0x2278e94b	slhc_remember
+EXPORT_SYMBOL drivers/net/slhc 0x26b760c4	slhc_init
+EXPORT_SYMBOL drivers/net/slhc 0x3fe0d1c0	slhc_free
+EXPORT_SYMBOL drivers/net/slhc 0x62538167	slhc_toss
+EXPORT_SYMBOL drivers/net/slhc 0x7e87227e	slhc_compress
+EXPORT_SYMBOL drivers/net/slhc 0xa78d9eb7	slhc_uncompress
+EXPORT_SYMBOL drivers/net/sungem_phy 0xb32a8a0f	mii_phy_probe
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x24ff68aa	tms380tr_netdev_ops
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x2979c64b	tms380tr_open
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x57185557	tmsdev_init
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x75a4570b	tmsdev_term
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd1b3f9b3	tms380tr_close
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd2328794	tms380tr_wait
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd49af46e	tms380tr_interrupt
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x38da4725	cycx_intr
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x62be23ea	cycx_setup
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x66a4c4e6	cycx_down
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x968458a6	cycx_peek
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xb6f383de	cycx_poke
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xfe7cd576	cycx_exec
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x045f969d	hdlc_close
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x191f380f	register_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x59e7457c	hdlc_change_mtu
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x68f95202	alloc_hdlcdev
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x70b7d2c4	unregister_hdlc_device
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x8db172e5	hdlc_ioctl
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xa96decb3	unregister_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xab66bc81	attach_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xecf1739b	hdlc_open
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xf1d0fcb3	hdlc_start_xmit
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xf6c3d97f	detach_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wireless/airo 0xd096c29d	stop_airo_card
+EXPORT_SYMBOL drivers/net/wireless/airo 0xdf539d95	init_airo_card
+EXPORT_SYMBOL drivers/net/wireless/airo 0xf9813d92	reset_airo_card
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x31219afb	ath_is_world_regd
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xa8879946	ath_rxbuf_alloc
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xbe25b39d	ath_regd_get_band_ctl
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xd6b85af2	ath_reg_notifier_apply
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xf3f8efbd	ath_regd_init
+EXPORT_SYMBOL drivers/net/wireless/atmel 0x1d3358e3	init_atmel_card
+EXPORT_SYMBOL drivers/net/wireless/atmel 0x9014b815	atmel_open
+EXPORT_SYMBOL drivers/net/wireless/atmel 0xf5c29143	stop_atmel_card
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x0a798d1f	hostap_set_antsel
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x0b995607	hostap_handle_sta_tx_exc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x14b30e72	hostap_set_roaming
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x14f6eb2c	prism2_update_comms_qual
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x16271a6f	hostap_info_process
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x1c4c9fe9	hostap_set_word
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x27544c8f	hostap_set_encryption
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x30dc4cf6	hostap_remove_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x3176240c	hostap_set_string
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x364b4360	hostap_add_interface
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x529edeb4	hostap_master_start_xmit
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x619b7539	hostap_set_hostapd
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x70c050b5	hostap_setup_dev
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x7f55a924	hostap_set_multicast_list_queue
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x9416ca3c	hostap_init_ap_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x95e85247	hostap_init_data
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x9b24f746	hostap_80211_rx
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa12ad27f	hostap_dump_tx_header
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa9c8a4d5	hostap_80211_ops
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb2a945e0	hostap_dump_rx_header
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb4b77c8b	hostap_80211_get_hdrlen
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xbd68b704	hostap_free_data
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xd801b96a	hostap_set_auth_algs
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xda5810bc	hostap_info_init
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xdd4a819b	hostap_set_hostapd_sta
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xe011f681	hostap_check_sta_fw_version
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xe2ad6773	hostap_remove_interface
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xfb3d1a59	hostap_init_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xfe1a6634	hostap_get_porttype
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x16d61f0a	libipw_channel_to_index
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x27880641	libipw_wx_get_scan
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x467a2a55	libipw_wx_set_encodeext
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x5e12287a	libipw_wx_get_encodeext
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x620c68ed	libipw_wx_get_encode
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x62abe9a0	libipw_get_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x712e5f14	libipw_txb_free
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x7377453e	libipw_set_geo
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x856ee688	free_ieee80211
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x8b177257	libipw_is_valid_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xa886ddb5	libipw_channel_to_freq
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xaea263a2	libipw_xmit
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xb5304e7b	libipw_networks_age
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xbaca645f	libipw_wx_set_encode
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xcc910415	alloc_ieee80211
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xd9ef29a0	libipw_change_mtu
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xdfe84fb5	libipw_get_channel_flags
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xe28c7b43	libipw_get_geo
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xe7eb54d2	libipw_rx_mgt
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xf2732f5c	libipw_freq_to_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xfd8999a7	libipw_rx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0052b3d1	iwl_txq_ctx_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0214c0c2	iwl_mac_get_tx_stats
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x02e0ed16	iwl_sensitivity_calibration
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0486cfa4	iwl_check_rxon_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x064c423f	iwl_leds_register
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x06e27a24	iwl_tx_agg_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x07a88d5c	iwl_rx_pm_sleep_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x09e70a36	iwl_rx_replenish
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0ab42402	iwl_eeprom_get_mac
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0bc6f92a	iwl_pci_suspend
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0e362842	iwl_init_drv
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0e38067d	iwl_find_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0f2a0687	iwl_reset_run_time_calib
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x15213592	iwl_set_default_wep_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x161708cf	iwl_set_rxon_ht
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1681c68a	iwl_cmd_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x19555e93	iwl_send_calib_results
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x19f0e900	iwl_debug_level
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1a23e023	iwl_set_rxon_channel
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1b75e74e	iwl_remove_dynamic_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1ceb31cc	iwl_alloc_all
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d77b399	iwl_bcast_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d820788	iwl_rxon_add_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1f45fc3b	iwl_hw_nic_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x21364296	iwl_set_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x21f45d42	iwl_rx_csa
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x25a24e92	iwl_get_passive_dwell_time
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x25ff2905	iwl_setup_mac
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2cf244a1	iwl_power_update_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2d626fd2	iwl_rx_reply_rx_phy
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x33c2aedb	iwl_configure_filter
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x34348ceb	iwl_set_tx_power
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x39c52833	iwl_send_cmd_pdu_async
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3ad99240	iwl_sta_rx_agg_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3b46534a	iwl_rx_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3b520418	iwl_rx_statistics
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3c4c0e29	iwlcore_eeprom_verify_signature
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3d1f0fc2	iwl_free_tfds_in_queue
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3dc83752	iwl_rate_get_lowest_plcp
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x41f2d5da	iwlcore_eeprom_acquire_semaphore
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x43487a04	iwl_tx_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x44f1a405	iwl_mac_conf_tx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x454a20ae	iwl_setup_scan_deferred_work
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x463ef1b1	iwl_pci_resume
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x49495507	iwl_send_static_wepkey_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4a3bf49a	iwl_mac_beacon_update
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4c847692	iwl_scan_cancel
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4d4e0df0	iwl_send_lq_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4ec48fdc	iwl_tx_ant_restriction
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5243c55b	iwl_setup_rx_scan_handlers
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x558f75dd	iwl_txq_check_empty
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x57cbf908	iwl_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5a17dd0a	iwl_hw_txq_ctx_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5b265120	iwl_get_sta_id
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5c84ceb0	iwl_tt_exit_ct_kill
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5de0ca92	iwlcore_eeprom_release_semaphore
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x60b360ae	iwl_irq_handle_error
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x60e4422e	iwl_rx_queue_alloc
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x62727d56	iwl_calib_set
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x65ec83ca	iwl_ht_enabled
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x66b0dc78	iwlcore_init_geos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x66ea7517	iwl_add_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x671dcd8b	iwl_txq_update_write_ptr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x67ffe315	iwl_get_ra_sta_id
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x68255076	iwl_mac_add_interface
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6e39fee5	iwl_setup_rxon_timing
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6e3f5e1e	iwl_eeprom_query_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6ed32194	iwl_rx_pm_debug_statistics_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x72777155	iwl_rx_replenish_now
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7298c8fd	iwl_scan_cancel_timeout
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x78976e61	iwl_isr_legacy
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7a3941f9	iwl_reset_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7d8084b6	iwl_send_bt_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8147c67a	iwlcore_eeprom_query_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8317eef2	iwlcore_free_geos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x83bb80cc	iwl_get_free_ucode_key_index
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8670273d	iwl_hwrate_to_plcp_idx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8a112a61	iwl_send_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8aa04b30	iwl_clear_stations_table
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x907d030d	iwl_tt_exit
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x93d59ba5	iwl_send_cmd_pdu
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x93f685be	iwl_eeprom_check_version
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9483982d	iwl_tx_queue_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x94a84018	iwl_set_dynamic_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9a60af0b	iwl_bg_scan_check
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9cde1f24	iwl_queue_space
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9e86e8e0	iwl_bg_abort_scan
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9ef2347a	iwl_is_monitor_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9f2543d9	iwl_rx_reply_rx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa0c6b972	iwl_reset_qos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa298a134	iwl_eeprom_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa35a3c46	iwl_rx_queue_space
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa5371278	iwl_rxq_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa5f3c02c	iwl_rx_queue_restock
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaad0846e	iwl_bg_scan_completed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xac1554f9	iwl_send_cmd_sync
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xad189c4e	iwl_remove_default_wep_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xae42b39b	iwl_tx_agg_start
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb18f74bf	iwl_get_channel_info
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb1a62406	iwl_set_decrypted_flag
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb36fdccd	iwl_alloc_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb508f7b6	iwl_tx_queue_reclaim
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb72914bf	iwl_rx_reply_error
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb767a9d6	iwl_eeprom_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbab13b2d	iwl_full_rxon_required
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbbbcdeb6	iwl_verify_ucode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbc7a77ae	iwl_rx_missed_beacon_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbd3a135c	iwl_hw_detect
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbdb669a6	iwl_rf_kill_ct_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc06357de	iwl_uninit_drv
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc0bd526d	iwl_init_sensitivity
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc112598c	iwl_free_channel_map
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc210dbaa	iwl_set_rxon_chain
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc590090a	iwl_mac_remove_interface
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc60cecab	iwl_tt_enter_ct_kill
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc6420198	iwl_bss_info_changed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc6597d1a	iwl_init_channel_map
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc6d01a61	iwl_tt_handler
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc7dba772	iwl_free_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc7e5e645	iwl_tx_cmd_complete
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc84e9777	iwl_rx_queue_update_write_ptr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcb493ad3	iwl_is_ht40_tx_allowed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcbaf4931	get_cmd_string
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd5e85f16	iwl_eeprom_query16
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd91a3d5b	iwl_tx_skb
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdc1f2542	iwl_fill_probe_req
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdccabe6d	iwlcore_eeprom_enhanced_txpower
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdcde5c18	iwl_activate_qos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe1334d2a	iwl_hwrate_to_tx_control
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe1646615	iwl_update_tkip_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe16f7fef	iwl_sta_rx_agg_start
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe1762002	iwl_mac_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe2b7169c	iwl_sta_tx_modify_enable_tid
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe2e8114d	iwl_send_statistics_request
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe56fe276	iwl_set_rxon_hwcrypto
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe70a48a6	iwl_set_hw_params
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe7ce5d70	iwl_rates
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe8be4dbc	iwl_disable_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xec8ae0b3	iwl_mac_hw_scan
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf064d588	iwl_rx_reply_compressed_ba
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf29749c7	iwl_mac_reset_tsf
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf2eeea7a	iwl_leds_unregister
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf40d4198	iwl_chain_noise_calibration
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf54337f1	iwl_get_active_dwell_time
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf68e8c66	iwl_send_add_sta
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf8524999	iwl_tt_initialize
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfdd2ca4b	iwl_power_initialize
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfe70480f	iwl_connection_init_rx_config
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x1a2343e4	orinoco_init
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x301c27cb	orinoco_down
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x4196c38b	hermes_write_ltv
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x62067817	orinoco_if_del
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x6a927e18	orinoco_interrupt
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x79d268dd	orinoco_up
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x8cadd5d8	free_orinocodev
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xa031d8e4	hermes_doicmd_wait
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc60b5e9e	hermes_bap_pwrite
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc6fad9f7	orinoco_if_add
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xcf175b4b	alloc_orinocodev
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd38d8ae2	hermes_read_ltv
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd3f714e5	hermes_bap_pread
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5168829	hermes_allocate
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5336e5d	hermes_init
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd54e219d	hermes_docmd_wait
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xed47b224	hermes_struct_init
+EXPORT_SYMBOL drivers/parport/parport 0x00761ddb	parport_put_port
+EXPORT_SYMBOL drivers/parport/parport 0x04651670	parport_wait_peripheral
+EXPORT_SYMBOL drivers/parport/parport 0x0bc57ed1	parport_ieee1284_ecp_read_data
+EXPORT_SYMBOL drivers/parport/parport 0x0f125394	parport_ieee1284_ecp_write_data
+EXPORT_SYMBOL drivers/parport/parport 0x162683e2	parport_register_device
+EXPORT_SYMBOL drivers/parport/parport 0x17bdcfc4	parport_remove_port
+EXPORT_SYMBOL drivers/parport/parport 0x215fc2bb	parport_ieee1284_epp_write_data
+EXPORT_SYMBOL drivers/parport/parport 0x22f6fdf2	parport_release
+EXPORT_SYMBOL drivers/parport/parport 0x2ca131b0	parport_unregister_driver
+EXPORT_SYMBOL drivers/parport/parport 0x30f40865	parport_write
+EXPORT_SYMBOL drivers/parport/parport 0x31b5b69f	parport_negotiate
+EXPORT_SYMBOL drivers/parport/parport 0x32e40688	parport_find_number
+EXPORT_SYMBOL drivers/parport/parport 0x3e869e71	parport_claim_or_block
+EXPORT_SYMBOL drivers/parport/parport 0x43e56672	parport_register_driver
+EXPORT_SYMBOL drivers/parport/parport 0x4d2a941b	parport_ieee1284_interrupt
+EXPORT_SYMBOL drivers/parport/parport 0x4fba2bb8	parport_ieee1284_ecp_write_addr
+EXPORT_SYMBOL drivers/parport/parport 0x52f739af	parport_set_timeout
+EXPORT_SYMBOL drivers/parport/parport 0x61f7ba97	parport_ieee1284_epp_write_addr
+EXPORT_SYMBOL drivers/parport/parport 0x9c5292d7	parport_ieee1284_read_byte
+EXPORT_SYMBOL drivers/parport/parport 0x9d3ad9c8	parport_unregister_device
+EXPORT_SYMBOL drivers/parport/parport 0x9d5eff70	parport_irq_handler
+EXPORT_SYMBOL drivers/parport/parport 0x9f01b83c	parport_ieee1284_write_compat
+EXPORT_SYMBOL drivers/parport/parport 0xb616e9e8	parport_ieee1284_epp_read_addr
+EXPORT_SYMBOL drivers/parport/parport 0xba635d98	parport_announce_port
+EXPORT_SYMBOL drivers/parport/parport 0xe05fc5fb	parport_read
+EXPORT_SYMBOL drivers/parport/parport 0xe2e2e9e3	parport_claim
+EXPORT_SYMBOL drivers/parport/parport 0xecda01df	parport_register_port
+EXPORT_SYMBOL drivers/parport/parport 0xef928a67	parport_wait_event
+EXPORT_SYMBOL drivers/parport/parport 0xf5947a57	parport_find_base
+EXPORT_SYMBOL drivers/parport/parport 0xfc3ae9bb	parport_ieee1284_read_nibble
+EXPORT_SYMBOL drivers/parport/parport 0xfc681ee0	parport_get_port
+EXPORT_SYMBOL drivers/parport/parport 0xfeb14424	parport_ieee1284_epp_read_data
+EXPORT_SYMBOL drivers/parport/parport_pc 0x7db93acb	parport_pc_probe_port
+EXPORT_SYMBOL drivers/parport/parport_pc 0xf67845df	parport_pc_unregister_port
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x19e9fa5a	pcmcia_map_mem_page
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x3a0f25f8	pcmcia_register_driver
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4337d58f	pcmcia_access_configuration_register
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4c5bc2b2	pcmcia_get_mem_page
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4fd033a0	pcmcia_error_func
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x5d1ce970	pcmcia_disable_device
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x6c89904d	pcmcia_get_window
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x732695ae	pcmcia_request_configuration
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x775eea08	pcmcia_unregister_driver
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x9750c148	pcmcia_request_irq
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x9a233f46	pcmcia_request_io
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xa752d6fe	pcmcia_modify_configuration
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xa7c5aada	pcmcia_request_window
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xaa2bd1f0	pcmcia_release_window
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xdadf963d	pcmcia_loop_config
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf0a25e12	pcmcia_error_ret
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf7cb431a	pcmcia_dev_present
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x034f0489	pcmcia_resume_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x0674e7d9	pccard_get_next_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x090dca95	pccard_register_pcmcia
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x0d98abd4	pcmcia_adjust_io_region
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x12d0c4f9	pcmcia_insert_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x212db8d2	pcmcia_socket_list
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x220d0b9e	pcmcia_parse_events
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x26b7c1f4	pccard_get_tuple_data
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x28eac5a3	pcmcia_reset_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x2a866e65	pcmcia_unregister_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x2f08176b	pcmcia_get_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x2ff6922b	pcmcia_suspend_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x4775fdd9	pcmcia_read_cis_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x4da4b3e2	pcmcia_eject_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x63bda2dd	destroy_cis_cache
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x6b4baba7	pcmcia_find_mem_region
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x87581177	pcmcia_socket_class
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x8be0c33d	pcmcia_put_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x8da66de2	pcmcia_register_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x93c960bd	release_cis_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x9bc55037	pcmcia_socket_dev_resume
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x9d642af1	pcmcia_socket_dev_early_resume
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x9fe0f822	pccard_get_first_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xa6393ae9	pccard_validate_cis
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xac2bebaf	pcmcia_validate_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc02ef2c8	pcmcia_parse_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcec1064f	pcmcia_write_cis_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcf97f3bd	dead_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xd5749736	pcmcia_socket_dev_late_resume
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xd905150a	pcmcia_socket_list_rwsem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xe4503b91	pcmcia_find_io_region
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xe4d06209	pccard_read_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xe5abd687	pcmcia_get_socket_by_nr
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xea30720f	pcmcia_replace_cis
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xecb00787	pcmcia_socket_dev_suspend
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf19430ac	pccard_static_ops
+EXPORT_SYMBOL drivers/pcmcia/rsrc_nonstatic 0x910cddfa	pccard_nonstatic_ops
+EXPORT_SYMBOL drivers/pps/pps_core 0x1e145952	pps_unregister_source
+EXPORT_SYMBOL drivers/pps/pps_core 0x463eaee3	pps_register_source
+EXPORT_SYMBOL drivers/pps/pps_core 0xe6a16116	pps_event
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x052f3d4a	fcoe_ctlr_recv
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x141d2db1	fcoe_ctlr_els_send
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x3a8ea5ec	fcoe_ctlr_link_up
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x74c04970	fcoe_ctlr_link_down
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x9a8cf9ea	fcoe_ctlr_recv_flogi
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xd7831a0a	fcoe_ctlr_destroy
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xe43d3516	fcoe_ctlr_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x01576a3e	fc_change_queue_type
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0372657c	fc_exch_mgr_free
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x076a0909	fc_seq_start_next
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x07a8c01b	fc_linkdown
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0fd27f79	fc_eh_device_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x15d58563	fc_get_host_port_type
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1e5c6fe9	fc_fabric_login
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x23aaf7e4	fc_exch_mgr_del
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x28d4ca10	fc_exch_seq_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x36e5fbaf	fc_cpu_mask
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x4269b7c9	fc_exch_mgr_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x44373943	fc_eh_abort
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x4459cb02	fc_eh_host_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x4c986cf3	fc_fcp_ddp_setup
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x4cf59b27	fc_set_rport_loss_tmo
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x4d7f783a	fc_seq_els_rsp_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x525cb8b6	fc_frame_crc_check
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x56183917	fc_destroy_rport
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x58e8dfcb	fc_queuecommand
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x60bdab93	fc_exch_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x628e96d1	fc_get_host_port_state
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x62e9db9c	fc_slave_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x64f83919	fc_set_mfs
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x67750428	fc_exch_done
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x7e2e5042	fc_rport_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x80402310	fc_exch_mgr_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x83a69302	fc_fcp_complete
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x933719ef	fc_lport_destroy
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa53717ab	fc_rport_terminate_io
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xaab4cd58	fc_linkup
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb0c2ed4e	fc_fcp_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb6983c33	fc_lport_config
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xc18e0928	fc_fcp_destroy
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xc4c8803d	fc_fabric_logoff
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xc70e4bde	fc_exch_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xceb14ab1	fc_lport_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xcfe79558	__fc_frame_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd1ea55cd	fc_disc_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd233241d	fc_get_host_stats
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd69d12c3	fc_change_queue_depth
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd6cb3359	fc_setup_rport
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd9b001d7	fc_exch_mgr_add
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe2119c32	fc_exch_recv
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe40bff2c	fc_lport_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xee8b1c78	fc_seq_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xefcbbfaf	fc_get_host_speed
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf7365d60	fc_seq_exch_abort
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xfa30c927	fc_elsct_init
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x2250c66e	mraid_mm_adapter_app_handle
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x512c956d	mraid_mm_unregister_adp
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0xd024d861	mraid_mm_register_adp
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0c17edb1	osd_sec_init_nosec_doall_caps
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x16751163	osd_finalize_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x258d4211	osd_req_create_partition
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x2e480e2b	osd_dev_fini
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x2e49bd7d	osd_req_add_get_attr_list
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x30dbe21e	osd_req_list_partition_collections
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x31be412f	osd_start_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x36403265	osd_req_add_set_attr_list
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x44984e11	osd_end_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x4cb388c4	osd_req_flush_object
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x4e6d3c4e	osd_req_write_kern
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x58782a67	osd_req_list_collection_objects
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x5af4ee54	osd_req_flush_obsd
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x6147c87b	osd_req_list_partition_objects
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x64750826	osd_req_add_get_attr_page
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x64fa553b	osd_req_read_kern
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x65d649d2	osd_execute_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x6ad621eb	osd_req_format
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x7aac543c	osd_req_get_attributes
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x83a18632	osd_req_remove_object
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x8b6ae74b	osd_req_decode_get_attr_list
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x8e362781	osd_req_set_attributes
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x90d4712c	osd_req_create_object
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xa626ba3a	osd_req_list_dev_partitions
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xadcec37d	osd_req_remove_partition
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xb57f1370	osd_req_read
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xd28b4ac1	osd_req_write
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xd6ac84bc	osd_dev_init
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe9b1adbe	osd_req_decode_sense_full
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xedcf610e	osd_req_flush_collection
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xefad8376	osd_auto_detect_ver
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xf174db6c	osd_execute_request_async
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xfd9113ae	osd_req_flush_partition
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x43bf183e	osduld_register_test
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x5366c507	osduld_put_device
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x5fc48609	osduld_unregister_test
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x67d7e42e	osduld_path_lookup
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x043586d6	qlogicfas408_info
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x3fd8cd71	qlogicfas408_detect
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x6222e28a	qlogicfas408_biosparam
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x7f802176	qlogicfas408_disable_ints
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x8b3d17ac	qlogicfas408_abort
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x901fbf9a	qlogicfas408_bus_reset
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xb3054f15	qlogicfas408_queuecommand
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xdc310b12	qlogicfas408_ihandl
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xe76b3b20	qlogicfas408_get_chip_type
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xf2b95199	qlogicfas408_setup
+EXPORT_SYMBOL drivers/scsi/raid_class 0x31a24fe9	raid_class_release
+EXPORT_SYMBOL drivers/scsi/raid_class 0xa19114af	raid_component_add
+EXPORT_SYMBOL drivers/scsi/raid_class 0xc966fab3	raid_class_attach
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x090cfaac	fc_host_post_event
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x1293b389	fc_remove_host
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x1a2c7b5b	fc_release_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x2a039618	fc_host_post_vendor_event
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x3a7dc055	fc_vport_create
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x3ecae0f7	scsi_is_fc_vport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x4e547661	fc_remote_port_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x731e3d98	fc_vport_terminate
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x7954b1ea	fc_get_event_number
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xa264cc40	fc_remote_port_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xb147aa85	fc_remote_port_rolechg
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xbd179d54	scsi_is_fc_rport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xfe1e67a9	fc_attach_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x09ac385e	scsi_is_sas_rphy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x0b102431	sas_end_device_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x35213cbe	sas_attach_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x3607b6cc	sas_expander_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x37855079	sas_port_mark_backlink
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x3a22e40d	sas_remove_host
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x3cd34a00	sas_phy_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x60896b67	sas_port_delete_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x61e0bdc2	sas_port_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x863e1ea7	sas_port_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x871c27f1	sas_release_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x88ec7823	sas_read_port_mode_page
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x89c00015	sas_rphy_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x92360eb9	scsi_is_sas_port
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x95b50b94	sas_rphy_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xa418e983	sas_port_alloc_num
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xa4ca0f18	sas_port_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xacd144cf	sas_remove_children
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xb3dd89c9	sas_phy_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xb9b83e15	sas_phy_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xbd61352c	sas_port_add_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xc17ea4ef	sas_phy_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xd5245c8a	scsi_is_sas_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xd5b89fad	sas_port_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xddf7f948	sas_rphy_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xf9ca1ab6	sas_rphy_remove
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x2901d8ab	spi_dv_device
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x3686ea09	spi_print_msg
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x39da5ac3	spi_attach_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x42fa458a	spi_display_xfer_agreement
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x5290dc09	spi_release_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x52b5d5a5	spi_schedule_dv_device
+EXPORT_SYMBOL drivers/serial/8250 0x661a55a4	serial8250_register_port
+EXPORT_SYMBOL drivers/serial/8250 0xc7208c3a	serial8250_resume_port
+EXPORT_SYMBOL drivers/serial/8250 0xcc248d26	serial8250_suspend_port
+EXPORT_SYMBOL drivers/serial/8250 0xcefcd99a	serial8250_unregister_port
+EXPORT_SYMBOL drivers/serial/serial_core 0x061cc18a	uart_unregister_driver
+EXPORT_SYMBOL drivers/serial/serial_core 0x3f43acfe	uart_match_port
+EXPORT_SYMBOL drivers/serial/serial_core 0x701d470a	uart_remove_one_port
+EXPORT_SYMBOL drivers/serial/serial_core 0x82379f9b	uart_get_divisor
+EXPORT_SYMBOL drivers/serial/serial_core 0x852d6009	uart_write_wakeup
+EXPORT_SYMBOL drivers/serial/serial_core 0xb7edcb0e	uart_resume_port
+EXPORT_SYMBOL drivers/serial/serial_core 0xf5e7ac80	uart_update_timeout
+EXPORT_SYMBOL drivers/serial/serial_core 0xf89eef5b	uart_add_one_port
+EXPORT_SYMBOL drivers/serial/serial_core 0xf926af17	uart_register_driver
+EXPORT_SYMBOL drivers/serial/serial_core 0xfbe4cba7	uart_get_baud_rate
+EXPORT_SYMBOL drivers/serial/serial_core 0xfd674587	uart_suspend_port
+EXPORT_SYMBOL drivers/ssb/ssb 0x275a1d88	ssb_dma_set_mask
+EXPORT_SYMBOL drivers/ssb/ssb 0x318f3385	ssb_pmu_set_ldo_paref
+EXPORT_SYMBOL drivers/ssb/ssb 0x3bd9dc40	ssb_bus_unregister
+EXPORT_SYMBOL drivers/ssb/ssb 0x4645b2b1	ssb_device_enable
+EXPORT_SYMBOL drivers/ssb/ssb 0x519e6d91	ssb_device_is_enabled
+EXPORT_SYMBOL drivers/ssb/ssb 0x529e4fcc	__ssb_driver_register
+EXPORT_SYMBOL drivers/ssb/ssb 0x781e3dc5	ssb_bus_may_powerdown
+EXPORT_SYMBOL drivers/ssb/ssb 0x83287150	ssb_device_disable
+EXPORT_SYMBOL drivers/ssb/ssb 0x8a4cad7e	ssb_pcihost_register
+EXPORT_SYMBOL drivers/ssb/ssb 0x8db44039	ssb_clockspeed
+EXPORT_SYMBOL drivers/ssb/ssb 0x90a28009	ssb_dma_free_consistent
+EXPORT_SYMBOL drivers/ssb/ssb 0x91c5f31e	ssb_bus_sdiobus_register
+EXPORT_SYMBOL drivers/ssb/ssb 0x9637677e	ssb_pcicore_dev_irqvecs_enable
+EXPORT_SYMBOL drivers/ssb/ssb 0x9ff759e7	ssb_driver_unregister
+EXPORT_SYMBOL drivers/ssb/ssb 0xb3a00fa3	ssb_bus_pcibus_register
+EXPORT_SYMBOL drivers/ssb/ssb 0xb55b5dcb	ssb_set_devtypedata
+EXPORT_SYMBOL drivers/ssb/ssb 0xc0512e0f	ssb_admatch_base
+EXPORT_SYMBOL drivers/ssb/ssb 0xc1ae1b46	ssb_bus_suspend
+EXPORT_SYMBOL drivers/ssb/ssb 0xc3d60929	ssb_bus_resume
+EXPORT_SYMBOL drivers/ssb/ssb 0xcc5ddfbe	ssb_bus_powerup
+EXPORT_SYMBOL drivers/ssb/ssb 0xcd66f859	ssb_dma_translation
+EXPORT_SYMBOL drivers/ssb/ssb 0xd481192b	ssb_admatch_size
+EXPORT_SYMBOL drivers/ssb/ssb 0xf7c363f0	ssb_pmu_set_ldo_voltage
+EXPORT_SYMBOL drivers/ssb/ssb 0xf8500008	ssb_dma_alloc_consistent
+EXPORT_SYMBOL drivers/telephony/ixj 0xfc1c9f33	ixj_pcmcia_probe
+EXPORT_SYMBOL drivers/telephony/phonedev 0x1bf8c1eb	phone_register_device
+EXPORT_SYMBOL drivers/telephony/phonedev 0x20dd9a09	phone_unregister_device
+EXPORT_SYMBOL drivers/usb/gadget/goku_udc 0x2d29d996	usb_gadget_register_driver
+EXPORT_SYMBOL drivers/usb/gadget/goku_udc 0x6f4f4981	usb_gadget_unregister_driver
+EXPORT_SYMBOL drivers/usb/host/sl811-hcd 0xa3d81046	sl811h_driver
+EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xa64a4cea	usb_nop_xceiv_unregister
+EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xd0e43207	usb_nop_xceiv_register
+EXPORT_SYMBOL drivers/usb/serial/usbserial 0x0110236d	usb_serial_resume
+EXPORT_SYMBOL drivers/usb/serial/usbserial 0xcb35d03f	usb_serial_suspend
+EXPORT_SYMBOL drivers/video/backlight/generic_bl 0xc86baa7c	corgibl_limit_intensity
+EXPORT_SYMBOL drivers/video/backlight/lcd 0x682c47b5	lcd_device_unregister
+EXPORT_SYMBOL drivers/video/backlight/lcd 0x76cec255	lcd_device_register
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x0cc3ede5	cyber2000fb_detach
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x46b6f639	cyber2000fb_attach
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x86684e0b	cyber2000fb_disable_extregs
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x96d455b0	cyber2000fb_get_fb_var
+EXPORT_SYMBOL drivers/video/cyber2000fb 0xc1bf76a1	cyber2000fb_enable_extregs
+EXPORT_SYMBOL drivers/video/display/display 0x704a637c	display_device_unregister
+EXPORT_SYMBOL drivers/video/display/display 0xf8515d12	display_device_register
+EXPORT_SYMBOL drivers/video/output 0x1e29da83	video_output_unregister
+EXPORT_SYMBOL drivers/video/output 0xae1150a3	video_output_register
+EXPORT_SYMBOL drivers/video/sis/sisfb 0x3037658e	sis_malloc
+EXPORT_SYMBOL drivers/video/sis/sisfb 0x454a3cf0	sis_free
+EXPORT_SYMBOL drivers/video/svgalib 0x00d1fce9	svga_set_default_seq_regs
+EXPORT_SYMBOL drivers/video/svgalib 0x07b3da30	svga_wseq_multi
+EXPORT_SYMBOL drivers/video/svgalib 0x08981929	svga_tilecopy
+EXPORT_SYMBOL drivers/video/svgalib 0x1b95c56a	svga_check_timings
+EXPORT_SYMBOL drivers/video/svgalib 0x3648ec08	svga_get_caps
+EXPORT_SYMBOL drivers/video/svgalib 0x63e898d1	svga_set_default_crt_regs
+EXPORT_SYMBOL drivers/video/svgalib 0x7a3ae959	svga_wcrt_multi
+EXPORT_SYMBOL drivers/video/svgalib 0x80408443	svga_set_timings
+EXPORT_SYMBOL drivers/video/svgalib 0x8fa8438b	svga_set_textmode_vga_regs
+EXPORT_SYMBOL drivers/video/svgalib 0x931f8f19	svga_get_tilemax
+EXPORT_SYMBOL drivers/video/svgalib 0xa5016405	svga_settile
+EXPORT_SYMBOL drivers/video/svgalib 0xab3b22ad	svga_set_default_gfx_regs
+EXPORT_SYMBOL drivers/video/svgalib 0xc4d992c5	svga_tileblit
+EXPORT_SYMBOL drivers/video/svgalib 0xdad682b1	svga_set_default_atc_regs
+EXPORT_SYMBOL drivers/video/svgalib 0xdc6e6d2a	svga_tilecursor
+EXPORT_SYMBOL drivers/video/svgalib 0xde365852	svga_tilefill
+EXPORT_SYMBOL drivers/video/svgalib 0xec83c473	svga_match_format
+EXPORT_SYMBOL drivers/video/svgalib 0xef774f5d	svga_compute_pll
+EXPORT_SYMBOL drivers/video/syscopyarea 0xde45b4dc	sys_copyarea
+EXPORT_SYMBOL drivers/video/sysfillrect 0xa9a2b640	sys_fillrect
+EXPORT_SYMBOL drivers/video/sysimgblt 0x202db1d1	sys_imageblit
+EXPORT_SYMBOL drivers/video/vgastate 0x686de290	restore_vga
+EXPORT_SYMBOL drivers/video/vgastate 0xe7a2620e	save_vga
+EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x8c6f5330	w1_bq27000_read
+EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0xf5ff9b3f	w1_bq27000_write
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x5aba2a69	w1_ds2760_read
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x90023166	w1_ds2760_write
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0xcb604430	w1_ds2760_recall_eeprom
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0xf4dec146	w1_ds2760_store_eeprom
+EXPORT_SYMBOL drivers/w1/wire 0x46340d04	w1_unregister_family
+EXPORT_SYMBOL drivers/w1/wire 0x7a0f26d0	w1_add_master_device
+EXPORT_SYMBOL drivers/w1/wire 0x8c6f3c5d	w1_register_family
+EXPORT_SYMBOL drivers/w1/wire 0xf9d9cd3a	w1_remove_master_device
+EXPORT_SYMBOL fs/configfs/configfs 0x08310bc6	config_item_put
+EXPORT_SYMBOL fs/configfs/configfs 0x0f2832ed	configfs_unregister_subsystem
+EXPORT_SYMBOL fs/configfs/configfs 0x1d9c8614	config_group_init
+EXPORT_SYMBOL fs/configfs/configfs 0x25ef043b	config_item_init
+EXPORT_SYMBOL fs/configfs/configfs 0x27d8afd4	config_item_init_type_name
+EXPORT_SYMBOL fs/configfs/configfs 0x3773e1d5	config_group_init_type_name
+EXPORT_SYMBOL fs/configfs/configfs 0x39a19940	configfs_register_subsystem
+EXPORT_SYMBOL fs/configfs/configfs 0x667cdff3	configfs_undepend_item
+EXPORT_SYMBOL fs/configfs/configfs 0xb310b496	config_item_set_name
+EXPORT_SYMBOL fs/configfs/configfs 0xb6fb41a8	configfs_depend_item
+EXPORT_SYMBOL fs/configfs/configfs 0xbd6118f3	config_item_get
+EXPORT_SYMBOL fs/configfs/configfs 0xc3782cee	config_group_find_item
+EXPORT_SYMBOL fs/fscache/fscache 0x07d9b576	fscache_wait_bit_interruptible
+EXPORT_SYMBOL fs/fscache/fscache 0x2197c579	__fscache_uncache_page
+EXPORT_SYMBOL fs/fscache/fscache 0x241a2fc8	__fscache_read_or_alloc_page
+EXPORT_SYMBOL fs/fscache/fscache 0x25bfd824	fscache_enqueue_operation
+EXPORT_SYMBOL fs/fscache/fscache 0x3e17d169	fscache_put_operation
+EXPORT_SYMBOL fs/fscache/fscache 0x3e9120ca	fscache_mark_pages_cached
+EXPORT_SYMBOL fs/fscache/fscache 0x3fc23318	fscache_wait_bit
+EXPORT_SYMBOL fs/fscache/fscache 0x496932b9	fscache_op_debug_id
+EXPORT_SYMBOL fs/fscache/fscache 0x51d157de	fscache_io_error
+EXPORT_SYMBOL fs/fscache/fscache 0x52ed5205	__fscache_acquire_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0x53b2ea89	fscache_object_lookup_negative
+EXPORT_SYMBOL fs/fscache/fscache 0x55bec4a6	fscache_withdraw_cache
+EXPORT_SYMBOL fs/fscache/fscache 0x5e978b9d	fscache_fsdef_index
+EXPORT_SYMBOL fs/fscache/fscache 0x5fe58c20	fscache_cache_cleared_wq
+EXPORT_SYMBOL fs/fscache/fscache 0x62dfb384	__fscache_update_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0x699ee156	__fscache_relinquish_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0x6bdc3bd0	fscache_init_cache
+EXPORT_SYMBOL fs/fscache/fscache 0x6c76d030	__fscache_alloc_page
+EXPORT_SYMBOL fs/fscache/fscache 0x7f7faf3c	__fscache_unregister_netfs
+EXPORT_SYMBOL fs/fscache/fscache 0x86f8894f	fscache_object_states
+EXPORT_SYMBOL fs/fscache/fscache 0x9576f493	fscache_add_cache
+EXPORT_SYMBOL fs/fscache/fscache 0xaac11527	__fscache_read_or_alloc_pages
+EXPORT_SYMBOL fs/fscache/fscache 0xab03d6ac	__fscache_check_page_write
+EXPORT_SYMBOL fs/fscache/fscache 0xdf4e8846	fscache_check_aux
+EXPORT_SYMBOL fs/fscache/fscache 0xdffa114a	__fscache_register_netfs
+EXPORT_SYMBOL fs/fscache/fscache 0xe60382a5	fscache_object_slow_work_ops
+EXPORT_SYMBOL fs/fscache/fscache 0xe9ba9fe5	__fscache_maybe_release_page
+EXPORT_SYMBOL fs/fscache/fscache 0xebbf4d78	__fscache_attr_changed
+EXPORT_SYMBOL fs/fscache/fscache 0xee482ea9	fscache_obtained_object
+EXPORT_SYMBOL fs/fscache/fscache 0xef828369	__fscache_wait_on_page_write
+EXPORT_SYMBOL fs/fscache/fscache 0xfa19cbab	__fscache_write_page
+EXPORT_SYMBOL fs/nfsd/nfsd 0x0e195c1c	nfs4_acl_nfsv4_to_posix
+EXPORT_SYMBOL fs/nfsd/nfsd 0x2095976a	nfs4_acl_new
+EXPORT_SYMBOL fs/nfsd/nfsd 0x28fb929b	nfs4_acl_posix_to_nfsv4
+EXPORT_SYMBOL fs/nfsd/nfsd 0x35e33c1e	nfs4_acl_write_who
+EXPORT_SYMBOL fs/nfsd/nfsd 0x5a157ae4	nfs4_acl_get_whotype
+EXPORT_SYMBOL fs/quota/quota_tree 0x19db1032	qtree_read_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0x2334005c	qtree_write_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0x50ae6cd2	qtree_entry_unused
+EXPORT_SYMBOL fs/quota/quota_tree 0x67b74716	qtree_release_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0x9ff84179	qtree_delete_dquot
+EXPORT_SYMBOL lib/crc-ccitt 0x3771b461	crc_ccitt
+EXPORT_SYMBOL lib/crc-ccitt 0x75811312	crc_ccitt_table
+EXPORT_SYMBOL lib/crc-itu-t 0xd29b009f	crc_itu_t_table
+EXPORT_SYMBOL lib/crc-itu-t 0xf5b4a948	crc_itu_t
+EXPORT_SYMBOL lib/crc-t10dif 0xb6896671	crc_t10dif
+EXPORT_SYMBOL lib/crc7 0xa7587646	crc7
+EXPORT_SYMBOL lib/crc7 0xd80c3603	crc7_syndrome_table
+EXPORT_SYMBOL lib/libcrc32c 0x27000b29	crc32c
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x315c65fd	zlib_deflateInit2
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x48034724	zlib_deflateReset
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xaf64ad0d	zlib_deflate
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf0caf44b	zlib_deflate_workspacesize
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf741c793	zlib_deflateEnd
+EXPORT_SYMBOL net/802/p8023 0x310daaa1	destroy_8023_client
+EXPORT_SYMBOL net/802/p8023 0x9b188125	make_8023_client
+EXPORT_SYMBOL net/9p/9pnet 0x0f254f26	p9_idpool_put
+EXPORT_SYMBOL net/9p/9pnet 0x11f5fa7d	p9_client_create
+EXPORT_SYMBOL net/9p/9pnet 0x371d4695	p9_idpool_check
+EXPORT_SYMBOL net/9p/9pnet 0x3d73a797	p9_errstr2errno
+EXPORT_SYMBOL net/9p/9pnet 0x41761ba0	v9fs_get_default_trans
+EXPORT_SYMBOL net/9p/9pnet 0x43001d99	p9_client_walk
+EXPORT_SYMBOL net/9p/9pnet 0x45e90c31	p9_client_auth
+EXPORT_SYMBOL net/9p/9pnet 0x485e3b1a	p9_client_disconnect
+EXPORT_SYMBOL net/9p/9pnet 0x52c71fb2	p9_client_remove
+EXPORT_SYMBOL net/9p/9pnet 0x58e6e609	p9_client_wstat
+EXPORT_SYMBOL net/9p/9pnet 0x6b754e6f	p9_parse_header
+EXPORT_SYMBOL net/9p/9pnet 0x6c4f1bb0	p9_client_attach
+EXPORT_SYMBOL net/9p/9pnet 0x76b79bf1	p9stat_read
+EXPORT_SYMBOL net/9p/9pnet 0x7814c0a9	p9_client_write
+EXPORT_SYMBOL net/9p/9pnet 0x8f7ff09a	p9_client_fcreate
+EXPORT_SYMBOL net/9p/9pnet 0x9c964743	p9stat_free
+EXPORT_SYMBOL net/9p/9pnet 0xa145e6d9	p9_client_clunk
+EXPORT_SYMBOL net/9p/9pnet 0xa994a9ec	v9fs_register_trans
+EXPORT_SYMBOL net/9p/9pnet 0xab5b5182	p9_client_open
+EXPORT_SYMBOL net/9p/9pnet 0xb08921a1	v9fs_unregister_trans
+EXPORT_SYMBOL net/9p/9pnet 0xb1ca96fa	p9_client_version
+EXPORT_SYMBOL net/9p/9pnet 0xbb6e425d	p9_client_destroy
+EXPORT_SYMBOL net/9p/9pnet 0xbca17234	p9_idpool_destroy
+EXPORT_SYMBOL net/9p/9pnet 0xbe64fb7d	p9_client_read
+EXPORT_SYMBOL net/9p/9pnet 0xc3f4cce3	p9_tag_lookup
+EXPORT_SYMBOL net/9p/9pnet 0xc901a44d	p9_client_cb
+EXPORT_SYMBOL net/9p/9pnet 0xd331fc1d	p9pdu_dump
+EXPORT_SYMBOL net/9p/9pnet 0xe58a3360	p9_error_init
+EXPORT_SYMBOL net/9p/9pnet 0xea140785	v9fs_get_trans_by_name
+EXPORT_SYMBOL net/9p/9pnet 0xeb51f52d	p9_client_stat
+EXPORT_SYMBOL net/9p/9pnet 0xed726162	p9_idpool_create
+EXPORT_SYMBOL net/9p/9pnet 0xf92fe2ad	p9_idpool_get
+EXPORT_SYMBOL net/appletalk/appletalk 0x413de130	atalk_find_dev_addr
+EXPORT_SYMBOL net/appletalk/appletalk 0x4cc294bd	aarp_send_ddp
+EXPORT_SYMBOL net/appletalk/appletalk 0x85a068e6	atrtr_get_dev
+EXPORT_SYMBOL net/appletalk/appletalk 0xc5e53cb7	alloc_ltalkdev
+EXPORT_SYMBOL net/atm/atm 0x18c8c930	atm_dev_deregister
+EXPORT_SYMBOL net/atm/atm 0x1a24e5e2	sonet_subtract_stats
+EXPORT_SYMBOL net/atm/atm 0x2cc2d52d	vcc_hash
+EXPORT_SYMBOL net/atm/atm 0x46d60d37	vcc_insert_socket
+EXPORT_SYMBOL net/atm/atm 0x4ee99ed1	atm_proc_root
+EXPORT_SYMBOL net/atm/atm 0x4efc3e11	atm_charge
+EXPORT_SYMBOL net/atm/atm 0x64dceac5	register_atm_ioctl
+EXPORT_SYMBOL net/atm/atm 0x79a2b2a9	deregister_atm_ioctl
+EXPORT_SYMBOL net/atm/atm 0x89195dc3	sonet_copy_stats
+EXPORT_SYMBOL net/atm/atm 0x98366bf3	atm_dev_register
+EXPORT_SYMBOL net/atm/atm 0xa333cd23	vcc_release_async
+EXPORT_SYMBOL net/atm/atm 0xab76ed81	atm_dev_lookup
+EXPORT_SYMBOL net/atm/atm 0xb5ce7ba4	atm_init_aal5
+EXPORT_SYMBOL net/atm/atm 0xe0640001	atm_alloc_charge
+EXPORT_SYMBOL net/atm/atm 0xe9e8631f	vcc_sklist_lock
+EXPORT_SYMBOL net/atm/atm 0xf49bc67a	atm_pcr_goal
+EXPORT_SYMBOL net/ax25/ax25 0x12905393	ax25_listen_release
+EXPORT_SYMBOL net/ax25/ax25 0x153c630b	ax25_header_ops
+EXPORT_SYMBOL net/ax25/ax25 0x192e22af	ax25_hard_header
+EXPORT_SYMBOL net/ax25/ax25 0x242852b9	ax25_uid_policy
+EXPORT_SYMBOL net/ax25/ax25 0x327a6f76	ax25_rebuild_header
+EXPORT_SYMBOL net/ax25/ax25 0x3d2d82ec	ax25_display_timer
+EXPORT_SYMBOL net/ax25/ax25 0x4502c65a	asc2ax
+EXPORT_SYMBOL net/ax25/ax25 0x535e7cce	ax25_find_cb
+EXPORT_SYMBOL net/ax25/ax25 0x53dea1ff	ax2asc
+EXPORT_SYMBOL net/ax25/ax25 0x564d9f14	ax25_findbyuid
+EXPORT_SYMBOL net/ax25/ax25 0x65a5bcbc	ax25_linkfail_register
+EXPORT_SYMBOL net/ax25/ax25 0x8ede9e26	ax25_protocol_release
+EXPORT_SYMBOL net/ax25/ax25 0xa47643b3	ax25_listen_register
+EXPORT_SYMBOL net/ax25/ax25 0xb6c3f8a2	ax25_linkfail_release
+EXPORT_SYMBOL net/ax25/ax25 0xc1444946	ax25cmp
+EXPORT_SYMBOL net/ax25/ax25 0xd43ecbf1	null_ax25_address
+EXPORT_SYMBOL net/ax25/ax25 0xf92c6f5c	ax25_send_frame
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x07bae5ba	hci_unregister_cb
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x0fd2d8a5	hci_conn_switch_role
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x10b64a35	hci_conn_change_link_key
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x16cf49f7	hci_register_cb
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x27c266fc	hci_alloc_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x2a8e8308	bt_sock_wait_state
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x30dff49d	hci_unregister_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x333d1db5	hci_send_acl
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x3c7173b8	hci_suspend_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x3d835cf6	hci_conn_hold_device
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x419fbb01	hci_get_route
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x46fffb15	bt_accept_unlink
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x4939f6be	bt_sock_ioctl
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x52e512de	bt_sock_unlink
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x539aefb7	hci_recv_fragment
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x5b39b0b6	hci_conn_security
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x65eaa4d6	hci_register_proto
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x7094f8ae	bt_err
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x7c2cd514	hci_resume_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x8292d5dc	bt_sock_recvmsg
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x84601832	hci_conn_put_device
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x8d75823a	bt_sock_link
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x938c7410	hci_free_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x9d815241	bt_sock_poll
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x9dade56b	hci_conn_check_link_mode
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xa7123b9b	hci_register_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xc2066af0	batostr
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xcc1fb551	baswap
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xccdc056d	hci_send_sco
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xcd2d2103	hci_connect
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xd1863fcc	bt_sock_register
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xd2c09349	bt_accept_dequeue
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xdd1d3f46	hci_unregister_proto
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xef8d767f	bt_accept_enqueue
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xf19294db	bt_sock_unregister
+EXPORT_SYMBOL net/bluetooth/l2cap 0xfc31fe88	l2cap_load
+EXPORT_SYMBOL net/bridge/bridge 0x8251bffa	br_should_route_hook
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x335a902d	ebt_do_table
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x7300008a	ebt_unregister_table
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0xd4b64a6c	ebt_register_table
+EXPORT_SYMBOL net/can/can 0x19536ea4	can_rx_register
+EXPORT_SYMBOL net/can/can 0x570a72a4	can_proto_register
+EXPORT_SYMBOL net/can/can 0x5f6a8b6e	can_rx_unregister
+EXPORT_SYMBOL net/can/can 0xcd6e1837	can_proto_unregister
+EXPORT_SYMBOL net/can/can 0xf4dc2098	can_send
+EXPORT_SYMBOL net/ieee802154/nl802154 0x0852bd61	ieee802154_nl_disassoc_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0x088ad245	ieee802154_nl_assoc_indic
+EXPORT_SYMBOL net/ieee802154/nl802154 0x1ded2648	ieee802154_nl_beacon_indic
+EXPORT_SYMBOL net/ieee802154/nl802154 0x2c1e67df	ieee802154_nl_scan_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0xa107759f	ieee802154_nl_start_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0xa457a834	ieee802154_nl_assoc_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0xa6ea4c96	ieee802154_nl_disassoc_indic
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x1721f44f	wpan_phy_free
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x9b6ab152	wpan_phy_register
+EXPORT_SYMBOL net/ieee802154/wpan-class 0xb77cdb50	wpan_phy_alloc
+EXPORT_SYMBOL net/ieee802154/wpan-class 0xe6b13e1e	wpan_phy_find
+EXPORT_SYMBOL net/ieee802154/wpan-class 0xf49fb0a5	wpan_phy_unregister
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x67fa0e49	arpt_do_table
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x87a40e4f	arpt_register_table
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xafeb0c9f	arpt_unregister_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x7e1b0716	ipt_unregister_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x86db8f0b	ipt_do_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x9aeb58fb	ipt_register_table
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x43607d23	nf_nat_protocol_register
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x46743ef6	nf_nat_setup_info
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x4a32db99	nf_nat_mangle_udp_packet
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x4aef759b	nf_nat_used_tuple
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x57a4416f	nf_nat_follow_master
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xab452ff2	nf_nat_protocol_unregister
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xdbdecbea	nf_nat_mangle_tcp_packet
+EXPORT_SYMBOL net/ipv4/tunnel4 0x7e7f119c	xfrm4_tunnel_register
+EXPORT_SYMBOL net/ipv4/tunnel4 0xe502b901	xfrm4_tunnel_deregister
+EXPORT_SYMBOL net/ipv6/ipv6 0x02638b0b	inet6_bind
+EXPORT_SYMBOL net/ipv6/ipv6 0x027d6f35	inet6_ioctl
+EXPORT_SYMBOL net/ipv6/ipv6 0x08c309db	ipv6_push_nfrag_opts
+EXPORT_SYMBOL net/ipv6/ipv6 0x0b0d888b	icmpv6_err_convert
+EXPORT_SYMBOL net/ipv6/ipv6 0x0f89ba98	ipv6_setsockopt
+EXPORT_SYMBOL net/ipv6/ipv6 0x19db5eab	icmpv6_send
+EXPORT_SYMBOL net/ipv6/ipv6 0x2577d006	ip6_route_output
+EXPORT_SYMBOL net/ipv6/ipv6 0x2c2b1106	ip6_frag_init
+EXPORT_SYMBOL net/ipv6/ipv6 0x2c6283b1	xfrm6_prepare_output
+EXPORT_SYMBOL net/ipv6/ipv6 0x30123eb5	icmpv6_statistics
+EXPORT_SYMBOL net/ipv6/ipv6 0x4a451ea2	xfrm6_rcv_spi
+EXPORT_SYMBOL net/ipv6/ipv6 0x538383c0	unregister_inet6addr_notifier
+EXPORT_SYMBOL net/ipv6/ipv6 0x589139a4	ipv6_chk_prefix
+EXPORT_SYMBOL net/ipv6/ipv6 0x5cfca51d	xfrm6_rcv
+EXPORT_SYMBOL net/ipv6/ipv6 0x69211486	rt6_lookup
+EXPORT_SYMBOL net/ipv6/ipv6 0x7337a2c1	nf_ip6_checksum
+EXPORT_SYMBOL net/ipv6/ipv6 0x775d2f07	ip6_frag_match
+EXPORT_SYMBOL net/ipv6/ipv6 0x8144a83d	inet6_del_protocol
+EXPORT_SYMBOL net/ipv6/ipv6 0x8261f08a	inet6_add_protocol
+EXPORT_SYMBOL net/ipv6/ipv6 0x83a35332	ndisc_mc_map
+EXPORT_SYMBOL net/ipv6/ipv6 0x93e7bd5f	inet6_register_protosw
+EXPORT_SYMBOL net/ipv6/ipv6 0xa46db933	ipv6_chk_addr
+EXPORT_SYMBOL net/ipv6/ipv6 0xadd644ea	ip6_xmit
+EXPORT_SYMBOL net/ipv6/ipv6 0xb69c6ba1	xfrm6_input_addr
+EXPORT_SYMBOL net/ipv6/ipv6 0xb76cdc5f	ipv6_getsockopt
+EXPORT_SYMBOL net/ipv6/ipv6 0xc890e80a	ip6_route_me_harder
+EXPORT_SYMBOL net/ipv6/ipv6 0xce19bac5	register_inet6addr_notifier
+EXPORT_SYMBOL net/ipv6/ipv6 0xd0dc795c	inet6_getname
+EXPORT_SYMBOL net/ipv6/ipv6 0xde6cfe6e	in6_dev_finish_destroy
+EXPORT_SYMBOL net/ipv6/ipv6 0xdf46b7e5	ipv6_dev_get_saddr
+EXPORT_SYMBOL net/ipv6/ipv6 0xe1a81c3a	icmpv6msg_statistics
+EXPORT_SYMBOL net/ipv6/ipv6 0xe1afa509	xfrm6_find_1stfragopt
+EXPORT_SYMBOL net/ipv6/ipv6 0xe690b8fd	__ipv6_isatap_ifid
+EXPORT_SYMBOL net/ipv6/ipv6 0xe722c751	inet6_unregister_protosw
+EXPORT_SYMBOL net/ipv6/ipv6 0xee2d9fd5	inet6_release
+EXPORT_SYMBOL net/ipv6/ipv6 0xf0fca350	ndisc_build_skb
+EXPORT_SYMBOL net/ipv6/ipv6 0xf82a7b67	ndisc_send_skb
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x4791f6d1	ip6t_do_table
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x4b065ba7	ipv6_find_hdr
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x4b997ced	ip6t_register_table
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xb8bddf33	ip6t_ext_hdr
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xda0774ae	ip6t_unregister_table
+EXPORT_SYMBOL net/ipv6/tunnel6 0x2732709f	xfrm6_tunnel_register
+EXPORT_SYMBOL net/ipv6/tunnel6 0x72d9febf	xfrm6_tunnel_deregister
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0x9cd013f2	xfrm6_tunnel_alloc_spi
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xab14e193	xfrm6_tunnel_free_spi
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xdb1b42d1	xfrm6_tunnel_spi_lookup
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x1c4e109a	ircomm_control_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x214be91e	ircomm_open
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x22a41bca	ircomm_flow_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x3e0003a4	ircomm_disconnect_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x74a61355	ircomm_close
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x8cf2aec4	ircomm_connect_response
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0xbcb7c7e4	ircomm_data_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0xd024ed93	ircomm_connect_request
+EXPORT_SYMBOL net/irda/irda 0x00dcd944	irlap_open
+EXPORT_SYMBOL net/irda/irda 0x017c9068	irda_notify_init
+EXPORT_SYMBOL net/irda/irda 0x05a6e430	irlmp_open_lsap
+EXPORT_SYMBOL net/irda/irda 0x06a3ee58	irias_new_integer_value
+EXPORT_SYMBOL net/irda/irda 0x07d3647c	irlmp_register_service
+EXPORT_SYMBOL net/irda/irda 0x0ed03b6c	iriap_close
+EXPORT_SYMBOL net/irda/irda 0x18edd399	irias_add_string_attrib
+EXPORT_SYMBOL net/irda/irda 0x2036ad06	irda_param_insert
+EXPORT_SYMBOL net/irda/irda 0x29783db6	hashbin_get_first
+EXPORT_SYMBOL net/irda/irda 0x38a20e5b	irda_debug
+EXPORT_SYMBOL net/irda/irda 0x414badfd	iriap_open
+EXPORT_SYMBOL net/irda/irda 0x448b8aaa	irda_qos_bits_to_value
+EXPORT_SYMBOL net/irda/irda 0x46c1c4a2	irlmp_unregister_service
+EXPORT_SYMBOL net/irda/irda 0x51b498b6	irda_device_set_media_busy
+EXPORT_SYMBOL net/irda/irda 0x543a6db5	hashbin_new
+EXPORT_SYMBOL net/irda/irda 0x550a5e27	irias_add_octseq_attrib
+EXPORT_SYMBOL net/irda/irda 0x5861b834	hashbin_insert
+EXPORT_SYMBOL net/irda/irda 0x5f261aef	hashbin_get_next
+EXPORT_SYMBOL net/irda/irda 0x66319e0e	irttp_open_tsap
+EXPORT_SYMBOL net/irda/irda 0x6b043eba	irda_init_max_qos_capabilies
+EXPORT_SYMBOL net/irda/irda 0x6b2a949c	proc_irda
+EXPORT_SYMBOL net/irda/irda 0x6b9c8938	irlmp_connect_request
+EXPORT_SYMBOL net/irda/irda 0x7042bc54	irlmp_register_client
+EXPORT_SYMBOL net/irda/irda 0x763e54a4	irlmp_unregister_client
+EXPORT_SYMBOL net/irda/irda 0x76d22267	iriap_getvaluebyclass_request
+EXPORT_SYMBOL net/irda/irda 0x7957f728	irlmp_update_client
+EXPORT_SYMBOL net/irda/irda 0x7d953711	irttp_disconnect_request
+EXPORT_SYMBOL net/irda/irda 0x7f933922	hashbin_remove_this
+EXPORT_SYMBOL net/irda/irda 0x81fa9357	irlap_close
+EXPORT_SYMBOL net/irda/irda 0x89136cd1	irias_delete_object
+EXPORT_SYMBOL net/irda/irda 0x91815586	irda_param_pack
+EXPORT_SYMBOL net/irda/irda 0x93950eb9	async_unwrap_char
+EXPORT_SYMBOL net/irda/irda 0x94a8156e	hashbin_delete
+EXPORT_SYMBOL net/irda/irda 0x980fe568	irias_insert_object
+EXPORT_SYMBOL net/irda/irda 0x993ad14b	irda_param_extract_all
+EXPORT_SYMBOL net/irda/irda 0x9c198227	irttp_connect_response
+EXPORT_SYMBOL net/irda/irda 0xa21b7736	irttp_flow_request
+EXPORT_SYMBOL net/irda/irda 0xa26f32f8	irias_find_object
+EXPORT_SYMBOL net/irda/irda 0xa4578768	irttp_connect_request
+EXPORT_SYMBOL net/irda/irda 0xb7884205	hashbin_remove
+EXPORT_SYMBOL net/irda/irda 0xb9394173	irias_delete_value
+EXPORT_SYMBOL net/irda/irda 0xbcd3ef13	irias_object_change_attribute
+EXPORT_SYMBOL net/irda/irda 0xbe40ace9	irlmp_discovery_request
+EXPORT_SYMBOL net/irda/irda 0xbf8cf11b	irttp_close_tsap
+EXPORT_SYMBOL net/irda/irda 0xc10a5281	irias_add_integer_attrib
+EXPORT_SYMBOL net/irda/irda 0xc2cfd97c	async_wrap_skb
+EXPORT_SYMBOL net/irda/irda 0xd627dc1a	hashbin_lock_find
+EXPORT_SYMBOL net/irda/irda 0xd9947b15	irlmp_disconnect_request
+EXPORT_SYMBOL net/irda/irda 0xde4c6b3c	irlmp_service_to_hint
+EXPORT_SYMBOL net/irda/irda 0xe0acf0d4	hashbin_find
+EXPORT_SYMBOL net/irda/irda 0xe1a50c6f	irias_new_object
+EXPORT_SYMBOL net/irda/irda 0xe2a72ebd	alloc_irdadev
+EXPORT_SYMBOL net/irda/irda 0xe731221c	irttp_dup
+EXPORT_SYMBOL net/irda/irda 0xebfbe710	irlmp_connect_response
+EXPORT_SYMBOL net/irda/irda 0xeda27e75	irlmp_data_request
+EXPORT_SYMBOL net/irda/irda 0xedd521c2	irlmp_get_discoveries
+EXPORT_SYMBOL net/irda/irda 0xf26ba93d	irttp_udata_request
+EXPORT_SYMBOL net/irda/irda 0xf39b7fe0	irda_setup_dma
+EXPORT_SYMBOL net/irda/irda 0xf4557782	irttp_data_request
+EXPORT_SYMBOL net/irda/irda 0xf913496a	irlmp_close_lsap
+EXPORT_SYMBOL net/lapb/lapb 0x127ae36e	lapb_setparms
+EXPORT_SYMBOL net/lapb/lapb 0x163f7fb3	lapb_register
+EXPORT_SYMBOL net/lapb/lapb 0x358eb972	lapb_unregister
+EXPORT_SYMBOL net/lapb/lapb 0x36bb18ee	lapb_connect_request
+EXPORT_SYMBOL net/lapb/lapb 0x538f5789	lapb_disconnect_request
+EXPORT_SYMBOL net/lapb/lapb 0xb4d257ad	lapb_data_received
+EXPORT_SYMBOL net/lapb/lapb 0xb552ce7f	lapb_getparms
+EXPORT_SYMBOL net/lapb/lapb 0xbfd74d76	lapb_data_request
+EXPORT_SYMBOL net/mac80211/mac80211 0x0897bb73	ieee80211_register_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x09dbcea4	ieee80211_find_sta
+EXPORT_SYMBOL net/mac80211/mac80211 0x1080008b	ieee80211_stop_tx_ba_cb_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0x19f72604	ieee80211_start_tx_ba_session
+EXPORT_SYMBOL net/mac80211/mac80211 0x1b9fb039	ieee80211_scan_completed
+EXPORT_SYMBOL net/mac80211/mac80211 0x32195e26	__ieee80211_get_assoc_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0x335fd756	ieee80211_get_buffered_bc
+EXPORT_SYMBOL net/mac80211/mac80211 0x3b22f896	ieee80211_rx_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0x40feb15c	ieee80211_stop_queues
+EXPORT_SYMBOL net/mac80211/mac80211 0x4155e850	ieee80211_beacon_get
+EXPORT_SYMBOL net/mac80211/mac80211 0x456853ce	ieee80211_unregister_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x459d8ea9	ieee80211_rate_control_register
+EXPORT_SYMBOL net/mac80211/mac80211 0x53ee0c0c	ieee80211_wake_queues
+EXPORT_SYMBOL net/mac80211/mac80211 0x597d45dc	ieee80211_rate_control_unregister
+EXPORT_SYMBOL net/mac80211/mac80211 0x5e317e73	ieee80211_tx_status_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0x60c87a29	ieee80211_start_tx_ba_cb_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0x62fff58b	ieee80211_restart_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x670561f5	ieee80211_ctstoself_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0x69b94018	__ieee80211_get_tx_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0x6bb3aa00	ieee80211_queue_stopped
+EXPORT_SYMBOL net/mac80211/mac80211 0x73dbd07d	ieee80211_stop_queue
+EXPORT_SYMBOL net/mac80211/mac80211 0x7593fa82	ieee80211_alloc_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x7b7d7d5c	ieee80211_rts_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0x8fb2b2cf	ieee80211_queue_delayed_work
+EXPORT_SYMBOL net/mac80211/mac80211 0x99c61fe4	rate_control_send_low
+EXPORT_SYMBOL net/mac80211/mac80211 0x9c69d79a	wiphy_to_ieee80211_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x9ced8d65	ieee80211_rx
+EXPORT_SYMBOL net/mac80211/mac80211 0xa3c48bc8	ieee80211_queue_work
+EXPORT_SYMBOL net/mac80211/mac80211 0xa5a9ca0e	ieee80211_start_tx_ba_cb
+EXPORT_SYMBOL net/mac80211/mac80211 0xa7d10f3c	ieee80211_free_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xa84030a7	ieee80211_stop_tx_ba_cb
+EXPORT_SYMBOL net/mac80211/mac80211 0xa865de31	ieee80211_tx_status
+EXPORT_SYMBOL net/mac80211/mac80211 0xb171c48c	__ieee80211_get_radio_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0xb6fad852	__ieee80211_get_rx_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0xb8d38bdb	ieee80211_rts_get
+EXPORT_SYMBOL net/mac80211/mac80211 0xb9dd6694	ieee80211_generic_frame_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0xc90ff8c4	ieee80211_ctstoself_get
+EXPORT_SYMBOL net/mac80211/mac80211 0xd9196b13	ieee80211_wake_queue
+EXPORT_SYMBOL net/mac80211/mac80211 0xe8abe42d	ieee80211_beacon_loss
+EXPORT_SYMBOL net/mac80211/mac80211 0xf9f5d38b	ieee80211_stop_tx_ba_session
+EXPORT_SYMBOL net/mac80211/mac80211 0xfe2bb91d	ieee80211_get_tkip_key
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x0d1bcab1	ip_vs_conn_put
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x21a4f0e2	ip_vs_conn_new
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x38f98a33	register_ip_vs_scheduler
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x496fe08f	ip_vs_conn_in_get
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x4ff2b212	register_ip_vs_app
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xa1dbc2d8	ip_vs_proto_name
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xaf81e835	register_ip_vs_app_inc
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xc165ca90	ip_vs_skb_replace
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xe12c6af3	unregister_ip_vs_scheduler
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xe83460d5	ip_vs_tcp_conn_listen
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xefcaade6	unregister_ip_vs_app
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xfa5c434f	ip_vs_conn_out_get
+EXPORT_SYMBOL net/netfilter/nf_conntrack 0x692a99cd	__nf_ct_ext_destroy
+EXPORT_SYMBOL net/netfilter/nf_conntrack 0xdf5c344a	__nf_ct_ext_add
+EXPORT_SYMBOL net/netfilter/nf_conntrack_proto_gre 0x39c051c2	nf_ct_gre_keymap_flush
+EXPORT_SYMBOL net/netfilter/x_tables 0x16a5e826	xt_free_table_info
+EXPORT_SYMBOL net/netfilter/x_tables 0x46ac7d30	xt_unregister_match
+EXPORT_SYMBOL net/netfilter/x_tables 0x595007af	xt_find_target
+EXPORT_SYMBOL net/netfilter/x_tables 0x8f6a2020	xt_register_targets
+EXPORT_SYMBOL net/netfilter/x_tables 0x99b2d22b	xt_unregister_target
+EXPORT_SYMBOL net/netfilter/x_tables 0xa4012524	xt_register_target
+EXPORT_SYMBOL net/netfilter/x_tables 0xac032efe	xt_register_match
+EXPORT_SYMBOL net/netfilter/x_tables 0xbd86e513	xt_find_match
+EXPORT_SYMBOL net/netfilter/x_tables 0xc3ff5dff	xt_alloc_table_info
+EXPORT_SYMBOL net/netfilter/x_tables 0xc6cb61cb	xt_unregister_targets
+EXPORT_SYMBOL net/netfilter/x_tables 0xe5f935ca	xt_register_matches
+EXPORT_SYMBOL net/netfilter/x_tables 0xedd5a83e	xt_unregister_matches
+EXPORT_SYMBOL net/phonet/phonet 0x2d02d8ee	phonet_proto_register
+EXPORT_SYMBOL net/phonet/phonet 0x63dc7014	pn_sock_hash
+EXPORT_SYMBOL net/phonet/phonet 0x73a00372	pn_sock_get_port
+EXPORT_SYMBOL net/phonet/phonet 0x84ab5ed7	pn_sock_unhash
+EXPORT_SYMBOL net/phonet/phonet 0xa0fb5524	pn_skb_send
+EXPORT_SYMBOL net/phonet/phonet 0xac3b821d	phonet_proto_unregister
+EXPORT_SYMBOL net/phonet/phonet 0xbce86a51	phonet_stream_ops
+EXPORT_SYMBOL net/phonet/phonet 0xe23609b7	phonet_header_ops
+EXPORT_SYMBOL net/rfkill/rfkill 0x17cd9544	rfkill_get_led_trigger_name
+EXPORT_SYMBOL net/rfkill/rfkill 0x39d790e9	rfkill_set_sw_state
+EXPORT_SYMBOL net/rfkill/rfkill 0x3cd016af	rfkill_init_sw_state
+EXPORT_SYMBOL net/rfkill/rfkill 0x6037765e	rfkill_set_states
+EXPORT_SYMBOL net/rfkill/rfkill 0x6544a4f7	rfkill_unregister
+EXPORT_SYMBOL net/rfkill/rfkill 0x6794d1cd	rfkill_set_hw_state
+EXPORT_SYMBOL net/rfkill/rfkill 0x7092b1ff	rfkill_register
+EXPORT_SYMBOL net/rfkill/rfkill 0x8ef7b2a1	rfkill_blocked
+EXPORT_SYMBOL net/rfkill/rfkill 0x8f44437b	rfkill_destroy
+EXPORT_SYMBOL net/rfkill/rfkill 0xa4924d7b	rfkill_set_led_trigger_name
+EXPORT_SYMBOL net/rfkill/rfkill 0xedcd6313	rfkill_alloc
+EXPORT_SYMBOL net/rfkill/rfkill 0xf21f681e	rfkill_resume_polling
+EXPORT_SYMBOL net/rfkill/rfkill 0xfadd5333	rfkill_pause_polling
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x041fd241	rxrpc_kernel_send_data
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x06a9e1dc	rxrpc_kernel_is_data_last
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x1123e1b8	rxrpc_kernel_get_error_number
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x3426e1aa	rxrpc_get_null_key
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x487e46cd	rxrpc_kernel_accept_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x48addf23	rxrpc_kernel_begin_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x4e35e06e	rxrpc_kernel_get_abort_code
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x57ce59df	rxrpc_get_server_data_key
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x67df79a2	rxrpc_kernel_abort_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x6c36a0be	rxrpc_kernel_end_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xb3bf85cf	rxrpc_kernel_intercept_rx_messages
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xdf7983da	rxrpc_kernel_reject_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xec042e22	rxrpc_kernel_data_delivered
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xf053e711	key_type_rxrpc
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xf9cf1f06	rxrpc_kernel_free_skb
+EXPORT_SYMBOL net/sunrpc/sunrpc 0x8577444f	svc_pool_stats_open
+EXPORT_SYMBOL net/tipc/tipc 0x08acf310	tipc_available_nodes
+EXPORT_SYMBOL net/tipc/tipc 0x10d40fcd	tipc_isconnected
+EXPORT_SYMBOL net/tipc/tipc 0x1472b270	tipc_disconnect
+EXPORT_SYMBOL net/tipc/tipc 0x1479cb03	tipc_deleteport
+EXPORT_SYMBOL net/tipc/tipc 0x15b5ecde	tipc_set_portunreliable
+EXPORT_SYMBOL net/tipc/tipc 0x16f27683	tipc_block_bearer
+EXPORT_SYMBOL net/tipc/tipc 0x259b74f9	tipc_acknowledge
+EXPORT_SYMBOL net/tipc/tipc 0x27d8bb58	tipc_send2port
+EXPORT_SYMBOL net/tipc/tipc 0x310d1bc9	tipc_detach
+EXPORT_SYMBOL net/tipc/tipc 0x3712e340	tipc_portunreliable
+EXPORT_SYMBOL net/tipc/tipc 0x384b43e4	tipc_send_buf2port
+EXPORT_SYMBOL net/tipc/tipc 0x3976041f	tipc_set_portimportance
+EXPORT_SYMBOL net/tipc/tipc 0x43f08602	tipc_forward_buf2port
+EXPORT_SYMBOL net/tipc/tipc 0x4b2243c6	tipc_portimportance
+EXPORT_SYMBOL net/tipc/tipc 0x4ba3cfc8	tipc_send2name
+EXPORT_SYMBOL net/tipc/tipc 0x538b228a	tipc_withdraw
+EXPORT_SYMBOL net/tipc/tipc 0x5637ed44	tipc_get_mode
+EXPORT_SYMBOL net/tipc/tipc 0x5aba0f03	tipc_send_buf2name
+EXPORT_SYMBOL net/tipc/tipc 0x5c0d4b5c	tipc_ref_valid
+EXPORT_SYMBOL net/tipc/tipc 0x62a681a3	tipc_portunreturnable
+EXPORT_SYMBOL net/tipc/tipc 0x64357d3c	tipc_multicast
+EXPORT_SYMBOL net/tipc/tipc 0x8001e3d7	tipc_forward2port
+EXPORT_SYMBOL net/tipc/tipc 0x88099b8f	tipc_createport
+EXPORT_SYMBOL net/tipc/tipc 0x88b73627	tipc_get_addr
+EXPORT_SYMBOL net/tipc/tipc 0x90e9bcdf	tipc_send_buf
+EXPORT_SYMBOL net/tipc/tipc 0x934abe91	tipc_reject_msg
+EXPORT_SYMBOL net/tipc/tipc 0x9c45558e	tipc_enable_bearer
+EXPORT_SYMBOL net/tipc/tipc 0xa3f242bb	tipc_send_buf_fast
+EXPORT_SYMBOL net/tipc/tipc 0xa8371507	tipc_recv_msg
+EXPORT_SYMBOL net/tipc/tipc 0xadd203d0	tipc_connect2port
+EXPORT_SYMBOL net/tipc/tipc 0xae0103c3	tipc_shutdown
+EXPORT_SYMBOL net/tipc/tipc 0xb01ffc2c	tipc_forward2name
+EXPORT_SYMBOL net/tipc/tipc 0xb27ac4a7	tipc_get_port
+EXPORT_SYMBOL net/tipc/tipc 0xb35b672c	tipc_publish
+EXPORT_SYMBOL net/tipc/tipc 0xbb2b2504	tipc_send
+EXPORT_SYMBOL net/tipc/tipc 0xcdc6e909	tipc_continue
+EXPORT_SYMBOL net/tipc/tipc 0xcec8514a	tipc_set_portunreturnable
+EXPORT_SYMBOL net/tipc/tipc 0xd44731e5	tipc_ownidentity
+EXPORT_SYMBOL net/tipc/tipc 0xd8740bd3	tipc_forward_buf2name
+EXPORT_SYMBOL net/tipc/tipc 0xda7f9d3f	tipc_attach
+EXPORT_SYMBOL net/tipc/tipc 0xdf5008fc	tipc_peer
+EXPORT_SYMBOL net/tipc/tipc 0xe7aece47	tipc_ispublished
+EXPORT_SYMBOL net/tipc/tipc 0xeefd49b3	tipc_get_handle
+EXPORT_SYMBOL net/tipc/tipc 0xef50a1ef	tipc_disable_bearer
+EXPORT_SYMBOL net/tipc/tipc 0xf3f246aa	tipc_createport_raw
+EXPORT_SYMBOL net/tipc/tipc 0xfcd4a6b8	tipc_register_media
+EXPORT_SYMBOL net/wanrouter/wanrouter 0x0ebe03d1	unregister_wan_device
+EXPORT_SYMBOL net/wanrouter/wanrouter 0x652219a8	register_wan_device
+EXPORT_SYMBOL net/wimax/wimax 0x5a2f1be8	wimax_reset
+EXPORT_SYMBOL net/wimax/wimax 0x8583a1e7	wimax_rfkill
+EXPORT_SYMBOL net/wireless/cfg80211 0x07c4d3e3	ieee80211_get_hdrlen_from_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0x07e7ac5a	ieee80211_radiotap_iterator_init
+EXPORT_SYMBOL net/wireless/cfg80211 0x09c64fbd	ieee80211_frequency_to_channel
+EXPORT_SYMBOL net/wireless/cfg80211 0x1879fcbd	bridge_tunnel_header
+EXPORT_SYMBOL net/wireless/cfg80211 0x18f96d80	cfg80211_testmode_event
+EXPORT_SYMBOL net/wireless/cfg80211 0x232a2f86	wiphy_register
+EXPORT_SYMBOL net/wireless/cfg80211 0x24f4c80f	cfg80211_send_rx_auth
+EXPORT_SYMBOL net/wireless/cfg80211 0x3654955d	__ieee80211_get_channel
+EXPORT_SYMBOL net/wireless/cfg80211 0x37ac8d05	ieee80211_get_response_rate
+EXPORT_SYMBOL net/wireless/cfg80211 0x44448048	ieee80211_data_from_8023
+EXPORT_SYMBOL net/wireless/cfg80211 0x46d31e95	cfg80211_unlink_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0x4c8d9b61	wiphy_rfkill_start_polling
+EXPORT_SYMBOL net/wireless/cfg80211 0x5572b20f	wiphy_rfkill_set_hw_state
+EXPORT_SYMBOL net/wireless/cfg80211 0x635f8acf	ieee80211_data_to_8023
+EXPORT_SYMBOL net/wireless/cfg80211 0x69b18f43	rfc1042_header
+EXPORT_SYMBOL net/wireless/cfg80211 0x75803500	cfg80211_testmode_reply
+EXPORT_SYMBOL net/wireless/cfg80211 0x7ec41d6d	wiphy_free
+EXPORT_SYMBOL net/wireless/cfg80211 0x8233c1d1	freq_reg_info
+EXPORT_SYMBOL net/wireless/cfg80211 0x8c35d732	ieee80211_hdrlen
+EXPORT_SYMBOL net/wireless/cfg80211 0x90eb5e02	cfg80211_put_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0x93a2b5e5	regulatory_hint
+EXPORT_SYMBOL net/wireless/cfg80211 0x93b402be	wiphy_rfkill_stop_polling
+EXPORT_SYMBOL net/wireless/cfg80211 0xa9718068	cfg80211_classify8021d
+EXPORT_SYMBOL net/wireless/cfg80211 0xabbe4d3f	cfg80211_testmode_alloc_event_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0xac53f2b7	cfg80211_testmode_alloc_reply_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0xb20c939f	cfg80211_inform_bss_frame
+EXPORT_SYMBOL net/wireless/cfg80211 0xb216d31d	cfg80211_send_assoc_timeout
+EXPORT_SYMBOL net/wireless/cfg80211 0xb375caa3	cfg80211_get_mesh
+EXPORT_SYMBOL net/wireless/cfg80211 0xb95e61c0	cfg80211_disconnected
+EXPORT_SYMBOL net/wireless/cfg80211 0xba3aec75	cfg80211_michael_mic_failure
+EXPORT_SYMBOL net/wireless/cfg80211 0xc0e5b5d1	cfg80211_scan_done
+EXPORT_SYMBOL net/wireless/cfg80211 0xc4e85ec5	ieee80211_radiotap_iterator_next
+EXPORT_SYMBOL net/wireless/cfg80211 0xc931a03d	ieee80211_bss_get_ie
+EXPORT_SYMBOL net/wireless/cfg80211 0xccc291b3	ieee80211_channel_to_frequency
+EXPORT_SYMBOL net/wireless/cfg80211 0xceaebc95	cfg80211_send_deauth
+EXPORT_SYMBOL net/wireless/cfg80211 0xd593d80d	wiphy_unregister
+EXPORT_SYMBOL net/wireless/cfg80211 0xdad92a6b	cfg80211_roamed
+EXPORT_SYMBOL net/wireless/cfg80211 0xe103a30a	cfg80211_send_rx_assoc
+EXPORT_SYMBOL net/wireless/cfg80211 0xe2e2c1d1	wiphy_apply_custom_regulatory
+EXPORT_SYMBOL net/wireless/cfg80211 0xe65bb420	cfg80211_send_auth_timeout
+EXPORT_SYMBOL net/wireless/cfg80211 0xf3babc4c	cfg80211_get_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0xf4414e31	wiphy_new
+EXPORT_SYMBOL net/wireless/cfg80211 0xf54196a5	cfg80211_inform_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0xf5f3428a	cfg80211_ibss_joined
+EXPORT_SYMBOL net/wireless/cfg80211 0xfb1474a6	cfg80211_send_disassoc
+EXPORT_SYMBOL net/wireless/cfg80211 0xfbde8dee	cfg80211_connect_result
+EXPORT_SYMBOL net/wireless/lib80211 0x01e88ea7	lib80211_crypt_info_free
+EXPORT_SYMBOL net/wireless/lib80211 0x1105883b	lib80211_unregister_crypto_ops
+EXPORT_SYMBOL net/wireless/lib80211 0x230f3ffb	lib80211_crypt_deinit_handler
+EXPORT_SYMBOL net/wireless/lib80211 0x2d0f99e5	print_ssid
+EXPORT_SYMBOL net/wireless/lib80211 0x4b3c74bd	lib80211_crypt_deinit_entries
+EXPORT_SYMBOL net/wireless/lib80211 0x59ef9adf	lib80211_crypt_quiescing
+EXPORT_SYMBOL net/wireless/lib80211 0x952c7bbd	lib80211_crypt_info_init
+EXPORT_SYMBOL net/wireless/lib80211 0xb530b9f8	lib80211_register_crypto_ops
+EXPORT_SYMBOL net/wireless/lib80211 0xccfe2756	lib80211_crypt_delayed_deinit
+EXPORT_SYMBOL net/wireless/lib80211 0xe9af1230	lib80211_get_crypto_ops
+EXPORT_SYMBOL sound/ac97_bus 0x38fd2f67	ac97_bus_type
+EXPORT_SYMBOL sound/core/oss/snd-mixer-oss 0x6f5f914e	snd_mixer_oss_ioctl_card
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x1a724fcc	snd_seq_kernel_client_ctl
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x3fb4d161	snd_seq_kernel_client_dispatch
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x4957a194	snd_seq_create_kernel_client
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x6bb71038	snd_seq_delete_kernel_client
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x7ac2f329	snd_seq_expand_var_event
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x7b8699eb	snd_seq_event_port_detach
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x89947013	snd_use_lock_sync_helper
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x95b38c91	snd_seq_kernel_client_write_poll
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xa7f1780e	snd_seq_event_port_attach
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xb8e448a0	snd_seq_set_queue_tempo
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xcac0a3be	snd_seq_kernel_client_enqueue
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xe934da1d	snd_seq_dump_var_event
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xfe86b53c	snd_seq_kernel_client_enqueue_blocking
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x34400d00	snd_seq_device_new
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x3a57f235	snd_seq_autoload_unlock
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x6339b6d0	snd_seq_device_load_drivers
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x644d7c43	snd_seq_device_register_driver
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xb90668b2	snd_seq_autoload_lock
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xc622fb29	snd_seq_device_unregister_driver
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x6ea09972	snd_midi_channel_alloc_set
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x833a3e07	snd_midi_channel_set_clear
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xb9948d2c	snd_midi_channel_free_set
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xf0a1fdb3	snd_midi_process_event
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x326911b6	snd_midi_event_new
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x7cb19049	snd_midi_event_reset_decode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xb389aad4	snd_midi_event_encode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xb401ffd7	snd_midi_event_no_status
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xb5d25358	snd_midi_event_free
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xbf834054	snd_midi_event_reset_encode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xe03c0c74	snd_midi_event_encode_byte
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xe8755241	snd_midi_event_decode
+EXPORT_SYMBOL sound/core/seq/snd-seq-virmidi 0xd7257adf	snd_virmidi_new
+EXPORT_SYMBOL sound/core/snd 0x07c8298d	snd_info_create_module_entry
+EXPORT_SYMBOL sound/core/snd 0x07f92dd4	snd_ctl_boolean_mono_info
+EXPORT_SYMBOL sound/core/snd 0x0bff93dc	snd_pci_quirk_lookup
+EXPORT_SYMBOL sound/core/snd 0x0e36aa19	snd_ctl_remove
+EXPORT_SYMBOL sound/core/snd 0x160f8f3a	snd_card_proc_new
+EXPORT_SYMBOL sound/core/snd 0x18e1683f	snd_dma_program
+EXPORT_SYMBOL sound/core/snd 0x191e88cf	snd_dma_pointer
+EXPORT_SYMBOL sound/core/snd 0x198788b4	snd_lookup_oss_minor_data
+EXPORT_SYMBOL sound/core/snd 0x20117d86	snd_ctl_boolean_stereo_info
+EXPORT_SYMBOL sound/core/snd 0x20b7fee3	snd_unregister_oss_device
+EXPORT_SYMBOL sound/core/snd 0x24a94b26	snd_info_get_line
+EXPORT_SYMBOL sound/core/snd 0x27d42a62	snd_register_device_for_dev
+EXPORT_SYMBOL sound/core/snd 0x27f331ad	snd_ctl_free_one
+EXPORT_SYMBOL sound/core/snd 0x2e93fd8b	snd_info_create_card_entry
+EXPORT_SYMBOL sound/core/snd 0x35c72d39	snd_card_register
+EXPORT_SYMBOL sound/core/snd 0x3971b4df	snd_ecards_limit
+EXPORT_SYMBOL sound/core/snd 0x3991f12e	snd_register_oss_device
+EXPORT_SYMBOL sound/core/snd 0x3d151980	snd_ctl_find_id
+EXPORT_SYMBOL sound/core/snd 0x45029373	snd_jack_set_parent
+EXPORT_SYMBOL sound/core/snd 0x4a3ea5c0	snd_request_card
+EXPORT_SYMBOL sound/core/snd 0x4d9fb5c1	snd_ctl_new1
+EXPORT_SYMBOL sound/core/snd 0x602c96f0	copy_to_user_fromio
+EXPORT_SYMBOL sound/core/snd 0x6109c332	snd_ctl_add
+EXPORT_SYMBOL sound/core/snd 0x62dd48dc	snd_card_create
+EXPORT_SYMBOL sound/core/snd 0x6d39114c	snd_ctl_make_virtual_master
+EXPORT_SYMBOL sound/core/snd 0x6ed52f21	snd_cards
+EXPORT_SYMBOL sound/core/snd 0x70c15ac1	snd_dma_disable
+EXPORT_SYMBOL sound/core/snd 0x74c2b984	snd_card_set_id
+EXPORT_SYMBOL sound/core/snd 0x777bd34f	snd_unregister_device
+EXPORT_SYMBOL sound/core/snd 0x81793127	snd_add_device_sysfs_file
+EXPORT_SYMBOL sound/core/snd 0x8b595efb	snd_ctl_notify
+EXPORT_SYMBOL sound/core/snd 0x8df3789f	snd_oss_info_register
+EXPORT_SYMBOL sound/core/snd 0x8f595b11	snd_major
+EXPORT_SYMBOL sound/core/snd 0x91a70480	snd_info_register
+EXPORT_SYMBOL sound/core/snd 0x9540fa5e	snd_card_file_add
+EXPORT_SYMBOL sound/core/snd 0x95deca87	snd_jack_new
+EXPORT_SYMBOL sound/core/snd 0x9ab68829	snd_ctl_rename_id
+EXPORT_SYMBOL sound/core/snd 0x9aec169e	snd_device_free
+EXPORT_SYMBOL sound/core/snd 0x9e6d79f8	snd_info_get_str
+EXPORT_SYMBOL sound/core/snd 0x9f231f9e	snd_info_free_entry
+EXPORT_SYMBOL sound/core/snd 0xa40688a0	snd_device_register
+EXPORT_SYMBOL sound/core/snd 0xa9e07151	snd_component_add
+EXPORT_SYMBOL sound/core/snd 0xaabf393f	snd_ctl_register_ioctl
+EXPORT_SYMBOL sound/core/snd 0xace0500a	snd_power_wait
+EXPORT_SYMBOL sound/core/snd 0xb2e5ae4a	snd_lookup_minor_data
+EXPORT_SYMBOL sound/core/snd 0xb649f258	snd_jack_report
+EXPORT_SYMBOL sound/core/snd 0xba510780	snd_card_file_remove
+EXPORT_SYMBOL sound/core/snd 0xbf60c7f6	snd_ctl_find_numid
+EXPORT_SYMBOL sound/core/snd 0xc0e502eb	snd_mixer_oss_notify_callback
+EXPORT_SYMBOL sound/core/snd 0xc4136e1d	snd_ctl_remove_id
+EXPORT_SYMBOL sound/core/snd 0xce3ca308	copy_from_user_toio
+EXPORT_SYMBOL sound/core/snd 0xd1157735	release_and_free_resource
+EXPORT_SYMBOL sound/core/snd 0xd6a999fd	snd_ctl_unregister_ioctl
+EXPORT_SYMBOL sound/core/snd 0xd8997d3c	_snd_ctl_add_slave
+EXPORT_SYMBOL sound/core/snd 0xdd28b678	snd_seq_root
+EXPORT_SYMBOL sound/core/snd 0xe20c9214	snd_iprintf
+EXPORT_SYMBOL sound/core/snd 0xf0f86b30	snd_card_free
+EXPORT_SYMBOL sound/core/snd 0xf15fc415	snd_card_free_when_closed
+EXPORT_SYMBOL sound/core/snd 0xfb7e6136	snd_device_new
+EXPORT_SYMBOL sound/core/snd 0xfbdc3c5e	snd_card_disconnect
+EXPORT_SYMBOL sound/core/snd-hwdep 0xb0c57b86	snd_hwdep_new
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x3b91f3af	snd_free_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x94108640	snd_dma_alloc_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xade88e76	snd_malloc_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xaff10c3a	snd_dma_alloc_pages_fallback
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xcb5c9072	snd_dma_free_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xf15582c5	snd_dma_reserve_buf
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xf34a9b89	snd_dma_get_reserved_buf
+EXPORT_SYMBOL sound/core/snd-pcm 0x0082cb84	snd_pcm_release_substream
+EXPORT_SYMBOL sound/core/snd-pcm 0x0283dfe3	_snd_pcm_hw_params_any
+EXPORT_SYMBOL sound/core/snd-pcm 0x04752595	snd_pcm_set_ops
+EXPORT_SYMBOL sound/core/snd-pcm 0x04cda566	snd_interval_refine
+EXPORT_SYMBOL sound/core/snd-pcm 0x0d16f6f5	snd_pcm_hw_constraint_ratnums
+EXPORT_SYMBOL sound/core/snd-pcm 0x13584671	snd_pcm_hw_param_last
+EXPORT_SYMBOL sound/core/snd-pcm 0x19a3c532	snd_pcm_lib_mmap_iomem
+EXPORT_SYMBOL sound/core/snd-pcm 0x1ab9811b	snd_pcm_hw_constraint_step
+EXPORT_SYMBOL sound/core/snd-pcm 0x1b726cb0	snd_pcm_new_stream
+EXPORT_SYMBOL sound/core/snd-pcm 0x1d027e4b	snd_pcm_format_signed
+EXPORT_SYMBOL sound/core/snd-pcm 0x27cb337c	snd_pcm_open_substream
+EXPORT_SYMBOL sound/core/snd-pcm 0x29cd4850	snd_pcm_hw_refine
+EXPORT_SYMBOL sound/core/snd-pcm 0x2b7893f7	snd_pcm_lib_malloc_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0x2ddf6984	snd_pcm_suspend_all
+EXPORT_SYMBOL sound/core/snd-pcm 0x2eaf8157	snd_pcm_hw_constraint_minmax
+EXPORT_SYMBOL sound/core/snd-pcm 0x35aab345	snd_pcm_lib_readv
+EXPORT_SYMBOL sound/core/snd-pcm 0x3796bdcc	snd_pcm_format_little_endian
+EXPORT_SYMBOL sound/core/snd-pcm 0x397f943e	snd_pcm_lib_read
+EXPORT_SYMBOL sound/core/snd-pcm 0x39bf9301	_snd_pcm_hw_param_setempty
+EXPORT_SYMBOL sound/core/snd-pcm 0x44541af4	snd_pcm_hw_rule_add
+EXPORT_SYMBOL sound/core/snd-pcm 0x46d9acc9	snd_pcm_lib_writev
+EXPORT_SYMBOL sound/core/snd-pcm 0x4cfa68c2	snd_pcm_limit_hw_rates
+EXPORT_SYMBOL sound/core/snd-pcm 0x4d9b6d35	snd_pcm_format_size
+EXPORT_SYMBOL sound/core/snd-pcm 0x4f816e9b	snd_pcm_format_big_endian
+EXPORT_SYMBOL sound/core/snd-pcm 0x52e3e4a5	snd_pcm_hw_param_value
+EXPORT_SYMBOL sound/core/snd-pcm 0x5e7f4920	snd_pcm_format_set_silence
+EXPORT_SYMBOL sound/core/snd-pcm 0x6349e57f	snd_pcm_stop
+EXPORT_SYMBOL sound/core/snd-pcm 0x64a28362	snd_pcm_kernel_ioctl
+EXPORT_SYMBOL sound/core/snd-pcm 0x650f8603	snd_pcm_format_silence_64
+EXPORT_SYMBOL sound/core/snd-pcm 0x68a24153	snd_pcm_format_physical_width
+EXPORT_SYMBOL sound/core/snd-pcm 0x6ef8fcd8	snd_pcm_format_linear
+EXPORT_SYMBOL sound/core/snd-pcm 0x7959e9e3	snd_pcm_lib_free_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0x7bcc6c4b	snd_pcm_hw_constraint_integer
+EXPORT_SYMBOL sound/core/snd-pcm 0x83be6ae4	snd_pcm_new
+EXPORT_SYMBOL sound/core/snd-pcm 0x840f46e0	snd_pcm_lib_preallocate_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0x89ce26a0	snd_pcm_hw_constraint_ratdens
+EXPORT_SYMBOL sound/core/snd-pcm 0x8c4c434a	snd_pcm_hw_param_first
+EXPORT_SYMBOL sound/core/snd-pcm 0x9450ade3	snd_pcm_notify
+EXPORT_SYMBOL sound/core/snd-pcm 0x99d7c51e	snd_pcm_lib_preallocate_pages_for_all
+EXPORT_SYMBOL sound/core/snd-pcm 0x9c0c5582	snd_pcm_lib_write
+EXPORT_SYMBOL sound/core/snd-pcm 0xa1c4de96	snd_pcm_hw_constraint_pow2
+EXPORT_SYMBOL sound/core/snd-pcm 0xa4565d43	snd_pcm_set_sync
+EXPORT_SYMBOL sound/core/snd-pcm 0xa61aa028	snd_pcm_format_unsigned
+EXPORT_SYMBOL sound/core/snd-pcm 0xa636bed2	snd_pcm_mmap_data
+EXPORT_SYMBOL sound/core/snd-pcm 0xb9638db4	snd_pcm_rate_to_rate_bit
+EXPORT_SYMBOL sound/core/snd-pcm 0xcb391daf	snd_pcm_lib_preallocate_free_for_all
+EXPORT_SYMBOL sound/core/snd-pcm 0xcca15bff	snd_pcm_suspend
+EXPORT_SYMBOL sound/core/snd-pcm 0xccfde388	snd_pcm_link_rwlock
+EXPORT_SYMBOL sound/core/snd-pcm 0xd0b9b8b8	snd_interval_list
+EXPORT_SYMBOL sound/core/snd-pcm 0xd9ce5f19	snd_pcm_hw_constraint_list
+EXPORT_SYMBOL sound/core/snd-pcm 0xe56a9336	snd_pcm_format_width
+EXPORT_SYMBOL sound/core/snd-pcm 0xe8cb4d4e	snd_pcm_lib_ioctl
+EXPORT_SYMBOL sound/core/snd-pcm 0xf0be905e	snd_pcm_hw_constraint_msbits
+EXPORT_SYMBOL sound/core/snd-pcm 0xf3797152	snd_interval_ratnum
+EXPORT_SYMBOL sound/core/snd-pcm 0xfe64492e	snd_pcm_period_elapsed
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x0d7bae22	snd_rawmidi_kernel_write
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x0de7495a	snd_rawmidi_transmit_empty
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x19b125ef	snd_rawmidi_receive
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x1e806f6e	snd_rawmidi_drain_input
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x22737340	snd_rawmidi_transmit
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x2a893a57	snd_rawmidi_output_params
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x3065e747	snd_rawmidi_drop_output
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x3bbba1d0	snd_rawmidi_input_params
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x41b9d868	snd_rawmidi_drain_output
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x63d6df22	snd_rawmidi_info_select
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x7426bdd4	snd_rawmidi_new
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x93fcdfb2	snd_rawmidi_transmit_ack
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x9aadb0cd	snd_rawmidi_kernel_open
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x9ee72cb5	snd_rawmidi_kernel_read
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xccb5bdb4	snd_rawmidi_set_ops
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xf0370c0b	snd_rawmidi_kernel_release
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xfa21108f	snd_rawmidi_transmit_peek
+EXPORT_SYMBOL sound/core/snd-timer 0x0d354bdb	snd_timer_start
+EXPORT_SYMBOL sound/core/snd-timer 0x1e7691ae	snd_timer_notify
+EXPORT_SYMBOL sound/core/snd-timer 0x1eb2e223	snd_timer_resolution
+EXPORT_SYMBOL sound/core/snd-timer 0x29f0b5b8	snd_timer_new
+EXPORT_SYMBOL sound/core/snd-timer 0x3572a690	snd_timer_close
+EXPORT_SYMBOL sound/core/snd-timer 0x657723f2	snd_timer_interrupt
+EXPORT_SYMBOL sound/core/snd-timer 0x75267f8b	snd_timer_global_free
+EXPORT_SYMBOL sound/core/snd-timer 0xafc96b61	snd_timer_global_register
+EXPORT_SYMBOL sound/core/snd-timer 0xc940e286	snd_timer_pause
+EXPORT_SYMBOL sound/core/snd-timer 0xcc263ab5	snd_timer_continue
+EXPORT_SYMBOL sound/core/snd-timer 0xd35c4dc6	snd_timer_stop
+EXPORT_SYMBOL sound/core/snd-timer 0xf30fba92	snd_timer_global_new
+EXPORT_SYMBOL sound/core/snd-timer 0xfafbcccf	snd_timer_open
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x4bbb7f27	snd_mpu401_uart_interrupt_tx
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xc43a3940	snd_mpu401_uart_interrupt
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xf7c3a46e	snd_mpu401_uart_new
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x05060a19	snd_opl3_regmap
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x0fee4656	snd_opl3_reset
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x316483ce	snd_opl3_init
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x4cfd2c9b	snd_opl3_timer_new
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x5890d472	snd_opl3_new
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x80d6fa8a	snd_opl3_load_patch
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x850cea85	snd_opl3_hwdep_new
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x9a754b1f	snd_opl3_find_patch
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xab253955	snd_opl3_interrupt
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xcc6a9213	snd_opl3_create
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x04923a1b	snd_vx_dsp_boot
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x25560aa5	snd_vx_resume
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x61cf9dee	snd_vx_suspend
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x77a5a8b9	snd_vx_setup_firmware
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x8a520825	snd_vx_free_firmware
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x99b88ede	snd_vx_irq_handler
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xbc91e5b8	snd_vx_check_reg_bit
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xeac446d2	snd_vx_dsp_load
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xf6742bfe	snd_vx_load_boot_image
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xfced24b6	snd_vx_create
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x1e3ef06d	snd_ak4114_reinit
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x323b33b3	snd_ak4114_external_rate
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x5f950dbc	snd_ak4114_check_rate_and_errors
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x87f35bff	snd_ak4114_create
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x900411f9	snd_ak4114_build
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xb419ee13	snd_ak4114_reg_write
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x09b48227	snd_ak4117_check_rate_and_errors
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x5e81a482	snd_ak4117_reg_write
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x6a7b78f1	snd_ak4117_reinit
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x7f1117a2	snd_ak4117_create
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xa76e4bb8	snd_ak4117_external_rate
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xd744da35	snd_ak4117_build
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x40250a9e	snd_akm4xxx_reset
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x6590b942	snd_akm4xxx_write
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x909a775c	snd_akm4xxx_init
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xd582e5b9	snd_akm4xxx_build_controls
+EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0x97a1eb53	snd_pt2258_reset
+EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0xfd5a4989	snd_pt2258_build_controls
+EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0x0cb849a8	snd_tea575x_init
+EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0x532bb295	snd_tea575x_exit
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x3df76be0	snd_cs8427_create
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x67cc87ae	snd_cs8427_reg_write
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0xd086fb85	snd_cs8427_iec958_active
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0xd4a3c3e2	snd_cs8427_iec958_build
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0xf7d143db	snd_cs8427_iec958_pcm
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x2bc372c3	snd_i2c_device_free
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x50e8ec95	snd_i2c_sendbytes
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x6069b097	snd_i2c_bus_create
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x7387c0b8	snd_i2c_device_create
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x94d0f038	snd_i2c_probeaddr
+EXPORT_SYMBOL sound/i2c/snd-i2c 0xcae6a75d	snd_i2c_readbytes
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x05bc7fd3	snd_sbmixer_write
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x2f7857e3	snd_sbmixer_add_ctl
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x31877aaf	snd_sbdsp_reset
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xa32a421f	snd_sbmixer_read
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xa3bb0c52	snd_sbdsp_create
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xc10fb638	snd_sbmixer_new
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xcbcddbff	snd_sbmixer_suspend
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xd15b3ab4	snd_sbmixer_resume
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xdb320e13	snd_sbdsp_command
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xead963a6	snd_sbdsp_get_byte
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0x853680fa	snd_sb16dsp_get_pcm_ops
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xa16a6804	snd_sb16dsp_pcm
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xa7fb15e4	snd_sb16dsp_configure
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xc57f5b54	snd_sb16dsp_interrupt
+EXPORT_SYMBOL sound/oss/ad1848 0x2b5d9dae	ad1848_detect
+EXPORT_SYMBOL sound/oss/ad1848 0x5c4ee0bf	ad1848_init
+EXPORT_SYMBOL sound/oss/ad1848 0x9bf1cc62	ad1848_unload
+EXPORT_SYMBOL sound/oss/ad1848 0xa3e16c6b	probe_ms_sound
+EXPORT_SYMBOL sound/oss/ad1848 0xb29a9148	unload_ms_sound
+EXPORT_SYMBOL sound/oss/ad1848 0xc04f6f67	ad1848_control
+EXPORT_SYMBOL sound/oss/ad1848 0xf935497a	attach_ms_sound
+EXPORT_SYMBOL sound/oss/mpu401 0x5febf284	unload_mpu401
+EXPORT_SYMBOL sound/oss/mpu401 0x61641749	probe_mpu401
+EXPORT_SYMBOL sound/oss/mpu401 0xbcd8f103	attach_mpu401
+EXPORT_SYMBOL sound/oss/sb_lib 0x42424109	sb_be_quiet
+EXPORT_SYMBOL sound/oss/sb_lib 0x450f9aea	smw_free
+EXPORT_SYMBOL sound/oss/sb_lib 0x74afd69c	unload_sbmpu
+EXPORT_SYMBOL sound/oss/sb_lib 0x7f79d1b2	sb_dsp_init
+EXPORT_SYMBOL sound/oss/sb_lib 0x883118df	probe_sbmpu
+EXPORT_SYMBOL sound/oss/sb_lib 0xc4884969	sb_dsp_unload
+EXPORT_SYMBOL sound/oss/sb_lib 0xd8a2731c	sb_dsp_detect
+EXPORT_SYMBOL sound/oss/sound 0x04c87ec8	compute_finetune
+EXPORT_SYMBOL sound/oss/sound 0x06339815	sound_unload_synthdev
+EXPORT_SYMBOL sound/oss/sound 0x0f280035	conf_printf
+EXPORT_SYMBOL sound/oss/sound 0x13a2bfa5	synth_devs
+EXPORT_SYMBOL sound/oss/sound 0x17ba231d	seq_input_event
+EXPORT_SYMBOL sound/oss/sound 0x1b3df3cf	sound_alloc_mixerdev
+EXPORT_SYMBOL sound/oss/sound 0x1f395686	MIDIbuf_avail
+EXPORT_SYMBOL sound/oss/sound 0x2161d5e8	sound_timer_init
+EXPORT_SYMBOL sound/oss/sound 0x2aa31695	midi_synth_kill_note
+EXPORT_SYMBOL sound/oss/sound 0x394cb088	sound_free_dma
+EXPORT_SYMBOL sound/oss/sound 0x418f5fbe	sound_close_dma
+EXPORT_SYMBOL sound/oss/sound 0x4cd01bdd	num_audiodevs
+EXPORT_SYMBOL sound/oss/sound 0x4ff47e9d	midi_synth_setup_voice
+EXPORT_SYMBOL sound/oss/sound 0x51e354b2	sound_alloc_timerdev
+EXPORT_SYMBOL sound/oss/sound 0x56504ca2	midi_synth_reset
+EXPORT_SYMBOL sound/oss/sound 0x5d986fc9	note_to_freq
+EXPORT_SYMBOL sound/oss/sound 0x7679ee76	seq_copy_to_input
+EXPORT_SYMBOL sound/oss/sound 0x7bdf0907	conf_printf2
+EXPORT_SYMBOL sound/oss/sound 0x82effef6	midi_devs
+EXPORT_SYMBOL sound/oss/sound 0x892093e0	midi_synth_controller
+EXPORT_SYMBOL sound/oss/sound 0x8acf76d2	sound_timer_devs
+EXPORT_SYMBOL sound/oss/sound 0x90bd9714	sequencer_timer
+EXPORT_SYMBOL sound/oss/sound 0x97a977cb	mixer_devs
+EXPORT_SYMBOL sound/oss/sound 0x987bcf12	DMAbuf_outputintr
+EXPORT_SYMBOL sound/oss/sound 0x9a95733f	sound_alloc_dma
+EXPORT_SYMBOL sound/oss/sound 0x9bdaf24d	midi_synth_start_note
+EXPORT_SYMBOL sound/oss/sound 0x9d845b18	num_mixers
+EXPORT_SYMBOL sound/oss/sound 0x9f9df4e4	sound_install_audiodrv
+EXPORT_SYMBOL sound/oss/sound 0xa1d5f04f	load_mixer_volumes
+EXPORT_SYMBOL sound/oss/sound 0xa1eae7cf	num_midis
+EXPORT_SYMBOL sound/oss/sound 0xa41ead5f	sound_unload_timerdev
+EXPORT_SYMBOL sound/oss/sound 0xa51c913b	sound_unload_mixerdev
+EXPORT_SYMBOL sound/oss/sound 0xa6bb414c	sound_unload_mididev
+EXPORT_SYMBOL sound/oss/sound 0xa948751e	sound_unload_audiodev
+EXPORT_SYMBOL sound/oss/sound 0xad45df73	midi_synth_close
+EXPORT_SYMBOL sound/oss/sound 0xaef743b2	midi_synth_ioctl
+EXPORT_SYMBOL sound/oss/sound 0xb14b22cd	midi_synth_hw_control
+EXPORT_SYMBOL sound/oss/sound 0xb51587f6	do_midi_msg
+EXPORT_SYMBOL sound/oss/sound 0xba413f87	sound_alloc_mididev
+EXPORT_SYMBOL sound/oss/sound 0xba7dd041	midi_synth_bender
+EXPORT_SYMBOL sound/oss/sound 0xc748d109	sound_alloc_synthdev
+EXPORT_SYMBOL sound/oss/sound 0xcab4d5bf	midi_synth_load_patch
+EXPORT_SYMBOL sound/oss/sound 0xcc4b8797	sound_open_dma
+EXPORT_SYMBOL sound/oss/sound 0xcf3c03ef	sound_install_mixer
+EXPORT_SYMBOL sound/oss/sound 0xd85be938	midi_synth_set_instr
+EXPORT_SYMBOL sound/oss/sound 0xdb400afa	midi_synth_panning
+EXPORT_SYMBOL sound/oss/sound 0xe056b71c	DMAbuf_start_dma
+EXPORT_SYMBOL sound/oss/sound 0xe2675a79	sound_timer_interrupt
+EXPORT_SYMBOL sound/oss/sound 0xeb315d99	DMAbuf_inputintr
+EXPORT_SYMBOL sound/oss/sound 0xf1ea8a20	midi_synth_aftertouch
+EXPORT_SYMBOL sound/oss/sound 0xf6805995	audio_devs
+EXPORT_SYMBOL sound/oss/sound 0xf6b3a2fb	midi_synth_open
+EXPORT_SYMBOL sound/oss/sound 0xf78f6363	sequencer_init
+EXPORT_SYMBOL sound/oss/sound 0xfa6871be	sound_timer_syncinterval
+EXPORT_SYMBOL sound/oss/sound 0xfddcbfb3	midi_synth_send_sysex
+EXPORT_SYMBOL sound/oss/uart401 0x049cd8b7	uart401intr
+EXPORT_SYMBOL sound/oss/uart401 0x8fde7c8b	probe_uart401
+EXPORT_SYMBOL sound/oss/uart401 0xecfdd9c9	unload_uart401
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x0c1ebb23	snd_ac97_update_power
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x26c34ef2	snd_ac97_update
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x2b9b5c7d	snd_ac97_write
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x47d0ed91	snd_ac97_tune_hardware
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x53506bda	snd_ac97_bus
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x6252345c	snd_ac97_suspend
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x771ade59	snd_ac97_pcm_double_rate_rules
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x838dc723	snd_ac97_mixer
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x9267ca42	snd_ac97_pcm_open
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x92fac979	snd_ac97_write_cache
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xa6bdd206	snd_ac97_read
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xc8e11bd6	snd_ac97_pcm_assign
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xca000b60	snd_ac97_resume
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xcd898093	snd_ac97_pcm_close
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xe6ced0ff	snd_ac97_set_rate
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xf078d85a	snd_ac97_get_short_name
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xfde553dc	snd_ac97_update_bits
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x0da748ba	snd_emu10k1_voice_alloc
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x39fae161	snd_emu10k1_synth_bzero
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x491c4d38	snd_emu10k1_ptr_read
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x81acd0fa	snd_emu10k1_synth_alloc
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xa91b9238	snd_emu10k1_memblk_map
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xe7040129	snd_emu10k1_synth_free
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xefe789f9	snd_emu10k1_ptr_write
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xf3b02acd	snd_emu10k1_synth_copy_from_user
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xfd27d245	snd_emu10k1_voice_free
+EXPORT_SYMBOL sound/pci/hda/snd-hda-codec 0xfcf0159f	snd_hda_parse_generic_codec
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x16361d69	snd_ice1712_akm4xxx_free
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x87529d00	snd_ice1712_akm4xxx_build_controls
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x8b50512e	snd_ice1712_akm4xxx_init
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x352d1ba1	snd_trident_write_voice_regs
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x37fe855f	snd_trident_stop_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x79e80026	snd_trident_start_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0xa6d07190	snd_trident_alloc_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0xea3ec349	snd_trident_free_voice
+EXPORT_SYMBOL sound/soc/codecs/snd-soc-uda134x 0xca2cf9b5	uda134x_dai
+EXPORT_SYMBOL sound/sound_firmware 0x39e3dd23	mod_firmware_load
+EXPORT_SYMBOL sound/soundcore 0x2a60fd9f	register_sound_dsp
+EXPORT_SYMBOL sound/soundcore 0x7afc9d8a	unregister_sound_mixer
+EXPORT_SYMBOL sound/soundcore 0x8261c4e5	register_sound_special_device
+EXPORT_SYMBOL sound/soundcore 0x93d013cd	register_sound_special
+EXPORT_SYMBOL sound/soundcore 0x99c95fa5	unregister_sound_special
+EXPORT_SYMBOL sound/soundcore 0xa20f93a1	register_sound_midi
+EXPORT_SYMBOL sound/soundcore 0xb64c7551	sound_class
+EXPORT_SYMBOL sound/soundcore 0xcd083b10	unregister_sound_dsp
+EXPORT_SYMBOL sound/soundcore 0xdef7a76c	register_sound_mixer
+EXPORT_SYMBOL sound/soundcore 0xfdab6de3	unregister_sound_midi
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x0940f1e4	snd_emux_lock_voice
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x160a5f83	snd_emux_unlock_voice
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x39b7b102	snd_emux_terminate_all
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x655cb202	snd_sf_linear_to_log
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x70151469	snd_emux_register
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xf14d3126	snd_emux_new
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xf7cdf085	snd_emux_free
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x17719e3e	__snd_util_memblk_new
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x19721668	__snd_util_mem_alloc
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x19c4fbbf	snd_util_mem_free
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x7e9699b6	snd_util_memhdr_new
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x93558410	snd_util_mem_alloc
+EXPORT_SYMBOL sound/synth/snd-util-mem 0xbb30c64d	snd_util_mem_avail
+EXPORT_SYMBOL sound/synth/snd-util-mem 0xd005c182	__snd_util_mem_free
+EXPORT_SYMBOL sound/synth/snd-util-mem 0xd77ecab8	snd_util_memhdr_free
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0x16756dc0	snd_usbmidi_input_start
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0x63343b1d	snd_usbmidi_input_stop
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0xd359e933	snd_usb_create_midi_interface
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0xd9d2bb03	snd_usbmidi_disconnect
+EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x04dca738	lirc_unregister_driver
+EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x8550bb67	lirc_register_driver
+EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0xb0f0ee80	lirc_get_pdata
+EXPORT_SYMBOL vmlinux 0x00000000	per_cpu__softirq_work_list
+EXPORT_SYMBOL vmlinux 0x000a4b6c	splice_from_pipe_begin
+EXPORT_SYMBOL vmlinux 0x00295aa1	matrox_G100
+EXPORT_SYMBOL vmlinux 0x004ba127	shrink_dcache_sb
+EXPORT_SYMBOL vmlinux 0x0055f1e2	log_wait_commit
+EXPORT_SYMBOL vmlinux 0x006172d8	swiotlb_sync_single_for_cpu
+EXPORT_SYMBOL vmlinux 0x007cdf5a	dquot_alloc_inode
+EXPORT_SYMBOL vmlinux 0x00801678	flush_scheduled_work
+EXPORT_SYMBOL vmlinux 0x00aa415e	pci_disable_msi
+EXPORT_SYMBOL vmlinux 0x00c2fb00	user_revoke
+EXPORT_SYMBOL vmlinux 0x00c4dc87	timecounter_init
+EXPORT_SYMBOL vmlinux 0x00d43e0e	tcp_simple_retransmit
+EXPORT_SYMBOL vmlinux 0x00e8097b	csum_partial_copy_fromiovecend
+EXPORT_SYMBOL vmlinux 0x00fafa75	skb_pad
+EXPORT_SYMBOL vmlinux 0x01000e51	schedule
+EXPORT_SYMBOL vmlinux 0x0102e4be	pci_reenable_device
+EXPORT_SYMBOL vmlinux 0x01139ffc	max_mapnr
+EXPORT_SYMBOL vmlinux 0x0116fa24	key_negate_and_link
+EXPORT_SYMBOL vmlinux 0x0122009f	simple_set_mnt
+EXPORT_SYMBOL vmlinux 0x01356a02	serio_unregister_port
+EXPORT_SYMBOL vmlinux 0x016ac8c7	ethtool_op_set_ufo
+EXPORT_SYMBOL vmlinux 0x017c8e52	generic_delete_inode
+EXPORT_SYMBOL vmlinux 0x01902adf	netpoll_trap
+EXPORT_SYMBOL vmlinux 0x01a24643	tcp_v4_md5_hash_skb
+EXPORT_SYMBOL vmlinux 0x01a4aab6	set_irq_chip_data
+EXPORT_SYMBOL vmlinux 0x01db8850	input_release_device
+EXPORT_SYMBOL vmlinux 0x01e658b7	blk_insert_request
+EXPORT_SYMBOL vmlinux 0x01ef1b6e	unlock_page
+EXPORT_SYMBOL vmlinux 0x02138617	phy_register_fixup_for_id
+EXPORT_SYMBOL vmlinux 0x021bc8d5	submit_bio
+EXPORT_SYMBOL vmlinux 0x02384e8d	ioremap_flags
+EXPORT_SYMBOL vmlinux 0x023be992	udp_lib_get_port
+EXPORT_SYMBOL vmlinux 0x02543915	__netif_schedule
+EXPORT_SYMBOL vmlinux 0x02649054	security_sock_rcv_skb
+EXPORT_SYMBOL vmlinux 0x027bee87	bio_alloc
+EXPORT_SYMBOL vmlinux 0x028d62f7	dma_spin_lock
+EXPORT_SYMBOL vmlinux 0x02a6ce5a	crc16_table
+EXPORT_SYMBOL vmlinux 0x02d67c2e	scsi_print_command
+EXPORT_SYMBOL vmlinux 0x02d81845	audit_log_task_context
+EXPORT_SYMBOL vmlinux 0x02da3b3e	tty_flip_buffer_push
+EXPORT_SYMBOL vmlinux 0x02ee26c1	free_pages_exact
+EXPORT_SYMBOL vmlinux 0x03179221	skb_copy
+EXPORT_SYMBOL vmlinux 0x03261f34	pci_set_consistent_dma_mask
+EXPORT_SYMBOL vmlinux 0x032f95e1	rtnl_unicast
+EXPORT_SYMBOL vmlinux 0x0334da4e	scsi_command_size_tbl
+EXPORT_SYMBOL vmlinux 0x037a0cba	kfree
+EXPORT_SYMBOL vmlinux 0x0389e869	flush_icache_user_range
+EXPORT_SYMBOL vmlinux 0x03b4955a	macio_unregister_driver
+EXPORT_SYMBOL vmlinux 0x03c06156	bitmap_fold
+EXPORT_SYMBOL vmlinux 0x03ee0175	simple_dir_inode_operations
+EXPORT_SYMBOL vmlinux 0x03fd2571	vm_unmap_ram
+EXPORT_SYMBOL vmlinux 0x040f1309	sock_kmalloc
+EXPORT_SYMBOL vmlinux 0x0422fe4a	inet_csk_timer_bug_msg
+EXPORT_SYMBOL vmlinux 0x042fe94c	buffer_migrate_page
+EXPORT_SYMBOL vmlinux 0x04528b10	tty_port_block_til_ready
+EXPORT_SYMBOL vmlinux 0x046b14f4	alloc_pci_dev
+EXPORT_SYMBOL vmlinux 0x046be155	scsi_device_get
+EXPORT_SYMBOL vmlinux 0x046be2ff	tty_unregister_device
+EXPORT_SYMBOL vmlinux 0x0487f831	fb_find_best_display
+EXPORT_SYMBOL vmlinux 0x04a9b8bb	slow_work_unregister_user
+EXPORT_SYMBOL vmlinux 0x04bd0e60	inet_accept
+EXPORT_SYMBOL vmlinux 0x04c9fbab	iw_handler_set_spy
+EXPORT_SYMBOL vmlinux 0x04ff27d9	scm_detach_fds
+EXPORT_SYMBOL vmlinux 0x0500058d	scsi_get_command
+EXPORT_SYMBOL vmlinux 0x05165665	devm_ioport_unmap
+EXPORT_SYMBOL vmlinux 0x05240ee7	percpu_counter_batch
+EXPORT_SYMBOL vmlinux 0x055d039f	posix_acl_permission
+EXPORT_SYMBOL vmlinux 0x056536f6	drop_super
+EXPORT_SYMBOL vmlinux 0x057ce975	hex_dump_to_buffer
+EXPORT_SYMBOL vmlinux 0x05a514a1	_insl_ns
+EXPORT_SYMBOL vmlinux 0x05b4e835	gen_pool_destroy
+EXPORT_SYMBOL vmlinux 0x05c31c01	hippi_mac_addr
+EXPORT_SYMBOL vmlinux 0x05ca3c2d	pcix_get_max_mmrbc
+EXPORT_SYMBOL vmlinux 0x061651be	strcat
+EXPORT_SYMBOL vmlinux 0x061b6f32	pci_pme_active
+EXPORT_SYMBOL vmlinux 0x0634fa7c	phy_register_fixup
+EXPORT_SYMBOL vmlinux 0x0652efbd	bio_integrity_set_tag
+EXPORT_SYMBOL vmlinux 0x0675c7eb	atomic64_cmpxchg
+EXPORT_SYMBOL vmlinux 0x067d8d35	security_release_secctx
+EXPORT_SYMBOL vmlinux 0x068c14ab	tty_driver_flush_buffer
+EXPORT_SYMBOL vmlinux 0x068d4e0c	vfs_follow_link
+EXPORT_SYMBOL vmlinux 0x0690a292	jbd2_journal_release_jbd_inode
+EXPORT_SYMBOL vmlinux 0x069f7408	dquot_alloc_space
+EXPORT_SYMBOL vmlinux 0x06c28c9f	xfrm_policy_delete
+EXPORT_SYMBOL vmlinux 0x06dc58bf	block_invalidatepage
+EXPORT_SYMBOL vmlinux 0x06f8c5a2	register_sysctl_table
+EXPORT_SYMBOL vmlinux 0x06fdf580	writeback_inodes_sb
+EXPORT_SYMBOL vmlinux 0x06fe3b14	default_grn
+EXPORT_SYMBOL vmlinux 0x071c1a69	set_user_nice
+EXPORT_SYMBOL vmlinux 0x0727c4f3	iowrite8
+EXPORT_SYMBOL vmlinux 0x072ce83a	nla_reserve
+EXPORT_SYMBOL vmlinux 0x0734c226	ida_get_new_above
+EXPORT_SYMBOL vmlinux 0x07473fe4	vfs_get_dqblk
+EXPORT_SYMBOL vmlinux 0x07527e0d	__kfifo_get
+EXPORT_SYMBOL vmlinux 0x07627aca	blk_get_backing_dev_info
+EXPORT_SYMBOL vmlinux 0x076ae5b2	kmap_atomic_prot
+EXPORT_SYMBOL vmlinux 0x0772c93d	unregister_console
+EXPORT_SYMBOL vmlinux 0x0783edb0	register_framebuffer
+EXPORT_SYMBOL vmlinux 0x0799aca4	local_bh_enable
+EXPORT_SYMBOL vmlinux 0x0799c50a	param_set_ulong
+EXPORT_SYMBOL vmlinux 0x07a890c8	fb_alloc_cmap
+EXPORT_SYMBOL vmlinux 0x07cc4a5d	printk_timed_ratelimit
+EXPORT_SYMBOL vmlinux 0x07d9b783	scsi_nl_send_vendor_msg
+EXPORT_SYMBOL vmlinux 0x082c3213	pci_root_buses
+EXPORT_SYMBOL vmlinux 0x082eb8b1	dev_set_promiscuity
+EXPORT_SYMBOL vmlinux 0x0835d0d3	jbd2_journal_forget
+EXPORT_SYMBOL vmlinux 0x08784909	phy_ethtool_gset
+EXPORT_SYMBOL vmlinux 0x08900297	pci_find_bus
+EXPORT_SYMBOL vmlinux 0x08958e74	of_iomap
+EXPORT_SYMBOL vmlinux 0x089e5b6c	__init_rwsem
+EXPORT_SYMBOL vmlinux 0x08a64e7c	kfifo_free
+EXPORT_SYMBOL vmlinux 0x08b66dd6	simple_link
+EXPORT_SYMBOL vmlinux 0x08bc76b2	tcp_check_req
+EXPORT_SYMBOL vmlinux 0x08c28f69	bio_split
+EXPORT_SYMBOL vmlinux 0x08d10779	tcp_getsockopt
+EXPORT_SYMBOL vmlinux 0x08ed0b62	mac_vmode_to_var
+EXPORT_SYMBOL vmlinux 0x0902bcbe	nf_unregister_sockopt
+EXPORT_SYMBOL vmlinux 0x0948cde9	num_physpages
+EXPORT_SYMBOL vmlinux 0x096a15cf	jbd2_journal_init_inode
+EXPORT_SYMBOL vmlinux 0x097d03e4	mpage_readpage
+EXPORT_SYMBOL vmlinux 0x0985da55	_read_lock_irqsave
+EXPORT_SYMBOL vmlinux 0x098b71c6	fb_dealloc_cmap
+EXPORT_SYMBOL vmlinux 0x0990c624	inet_unregister_protosw
+EXPORT_SYMBOL vmlinux 0x099b31d9	pci_enable_bridges
+EXPORT_SYMBOL vmlinux 0x09b8386a	tty_port_hangup
+EXPORT_SYMBOL vmlinux 0x09c55cec	schedule_timeout_interruptible
+EXPORT_SYMBOL vmlinux 0x09c8eb55	font_vga_8x16
+EXPORT_SYMBOL vmlinux 0x09d44df9	in_lock_functions
+EXPORT_SYMBOL vmlinux 0x0a2487e0	unblock_all_signals
+EXPORT_SYMBOL vmlinux 0x0a3131f6	strnchr
+EXPORT_SYMBOL vmlinux 0x0a4747ff	allocate_resource
+EXPORT_SYMBOL vmlinux 0x0a48102c	xfrm_input_resume
+EXPORT_SYMBOL vmlinux 0x0a590c60	fb_validate_mode
+EXPORT_SYMBOL vmlinux 0x0a5afa6d	fd_install
+EXPORT_SYMBOL vmlinux 0x0a623a29	put_disk
+EXPORT_SYMBOL vmlinux 0x0a82b5e0	vfs_dq_transfer
+EXPORT_SYMBOL vmlinux 0x0aa4f207	block_write_full_page
+EXPORT_SYMBOL vmlinux 0x0acb1a3c	__bitmap_shift_right
+EXPORT_SYMBOL vmlinux 0x0acd8b5a	matrox_mystique
+EXPORT_SYMBOL vmlinux 0x0ae809e3	sock_register
+EXPORT_SYMBOL vmlinux 0x0af4f230	xfrm_lookup
+EXPORT_SYMBOL vmlinux 0x0b1beb31	vmalloc_32_user
+EXPORT_SYMBOL vmlinux 0x0b5bba02	release_firmware
+EXPORT_SYMBOL vmlinux 0x0b742fd7	simple_strtol
+EXPORT_SYMBOL vmlinux 0x0b7bfc81	skb_insert
+EXPORT_SYMBOL vmlinux 0x0ba3804f	serio_open
+EXPORT_SYMBOL vmlinux 0x0ba9f282	pci_get_slot
+EXPORT_SYMBOL vmlinux 0x0bacbf79	__neigh_for_each_release
+EXPORT_SYMBOL vmlinux 0x0bbf7e2a	inetdev_by_index
+EXPORT_SYMBOL vmlinux 0x0bdcb5e1	pci_restore_state
+EXPORT_SYMBOL vmlinux 0x0c12e626	__debugger_bpt
+EXPORT_SYMBOL vmlinux 0x0c3af7ab	skb_queue_tail
+EXPORT_SYMBOL vmlinux 0x0c4214ea	scsi_scan_target
+EXPORT_SYMBOL vmlinux 0x0c45fbfb	pci_bus_size_bridges
+EXPORT_SYMBOL vmlinux 0x0c557f60	sock_no_sendpage
+EXPORT_SYMBOL vmlinux 0x0c65e73c	scsi_normalize_sense
+EXPORT_SYMBOL vmlinux 0x0c661b81	udp_poll
+EXPORT_SYMBOL vmlinux 0x0c7d6685	sock_create_lite
+EXPORT_SYMBOL vmlinux 0x0c7fab18	add_timer
+EXPORT_SYMBOL vmlinux 0x0c888857	mutex_lock_interruptible
+EXPORT_SYMBOL vmlinux 0x0c8c9e99	scsi_show_extd_sense
+EXPORT_SYMBOL vmlinux 0x0c9b6089	nvram_get_size
+EXPORT_SYMBOL vmlinux 0x0cae232b	utf16s_to_utf8s
+EXPORT_SYMBOL vmlinux 0x0cbe4a43	skb_copy_datagram_const_iovec
+EXPORT_SYMBOL vmlinux 0x0d3dee4a	netif_carrier_off
+EXPORT_SYMBOL vmlinux 0x0d542439	__ipv6_addr_type
+EXPORT_SYMBOL vmlinux 0x0d7299b8	proc_dointvec_userhz_jiffies
+EXPORT_SYMBOL vmlinux 0x0d7a6c49	pci_fixup_device
+EXPORT_SYMBOL vmlinux 0x0d838ca2	cpufreq_global_kobject
+EXPORT_SYMBOL vmlinux 0x0da10ec3	security_sock_graft
+EXPORT_SYMBOL vmlinux 0x0da152d0	__module_put_and_exit
+EXPORT_SYMBOL vmlinux 0x0da5076b	sock_create_kern
+EXPORT_SYMBOL vmlinux 0x0dbf38b8	mol_trampoline
+EXPORT_SYMBOL vmlinux 0x0dd1828b	vlan_gro_receive
+EXPORT_SYMBOL vmlinux 0x0de81b18	fb_show_logo
+EXPORT_SYMBOL vmlinux 0x0dee46d8	serio_unregister_child_port
+EXPORT_SYMBOL vmlinux 0x0df15005	_spin_unlock_irqrestore
+EXPORT_SYMBOL vmlinux 0x0df3861d	blk_queue_update_dma_pad
+EXPORT_SYMBOL vmlinux 0x0e2d16c3	proc_dointvec
+EXPORT_SYMBOL vmlinux 0x0e4d0266	get_disk
+EXPORT_SYMBOL vmlinux 0x0e52592a	panic
+EXPORT_SYMBOL vmlinux 0x0e56783a	pcim_iomap
+EXPORT_SYMBOL vmlinux 0x0e90f629	genphy_config_aneg
+EXPORT_SYMBOL vmlinux 0x0eb07daa	dev_mc_unsync
+EXPORT_SYMBOL vmlinux 0x0eec3a20	dev_get_by_index
+EXPORT_SYMBOL vmlinux 0x0ef20db1	kernstart_addr
+EXPORT_SYMBOL vmlinux 0x0ef22ade	remove_wait_queue
+EXPORT_SYMBOL vmlinux 0x0f0fb85b	matroxfb_enable_irq
+EXPORT_SYMBOL vmlinux 0x0f1ef871	posix_acl_alloc
+EXPORT_SYMBOL vmlinux 0x0f28cb91	nvram_read_byte
+EXPORT_SYMBOL vmlinux 0x0f2c9a1d	find_lock_page
+EXPORT_SYMBOL vmlinux 0x0f322a66	sock_i_ino
+EXPORT_SYMBOL vmlinux 0x0f3d9ef7	__kfifo_put
+EXPORT_SYMBOL vmlinux 0x0f3db073	journal_abort
+EXPORT_SYMBOL vmlinux 0x0f420ea1	skb_recycle_check
+EXPORT_SYMBOL vmlinux 0x0f4c4f82	jbd2_journal_blocks_per_page
+EXPORT_SYMBOL vmlinux 0x0f5413c8	__scsi_alloc_queue
+EXPORT_SYMBOL vmlinux 0x0f57d5ae	_read_unlock_bh
+EXPORT_SYMBOL vmlinux 0x0f7a1a16	alloc_tty_driver
+EXPORT_SYMBOL vmlinux 0x0f7c43d8	bio_add_page
+EXPORT_SYMBOL vmlinux 0x0fa4ee09	tcp_proc_register
+EXPORT_SYMBOL vmlinux 0x0fb639f0	pci_enable_device_io
+EXPORT_SYMBOL vmlinux 0x0fc0f01a	ip_ct_attach
+EXPORT_SYMBOL vmlinux 0x0fec8ca8	ps2_begin_command
+EXPORT_SYMBOL vmlinux 0x0ffc29b5	qdisc_watchdog_cancel
+EXPORT_SYMBOL vmlinux 0x1015a9c2	skb_dma_unmap
+EXPORT_SYMBOL vmlinux 0x104142b9	proto_register
+EXPORT_SYMBOL vmlinux 0x105e2727	__tracepoint_kmalloc
+EXPORT_SYMBOL vmlinux 0x1082e38f	blk_rq_unmap_user
+EXPORT_SYMBOL vmlinux 0x108e8985	param_get_uint
+EXPORT_SYMBOL vmlinux 0x10a6e66a	llc_sap_find
+EXPORT_SYMBOL vmlinux 0x10ee20bb	default_blu
+EXPORT_SYMBOL vmlinux 0x10f8c934	input_free_device
+EXPORT_SYMBOL vmlinux 0x11267875	scsi_extd_sense_format
+EXPORT_SYMBOL vmlinux 0x113d3436	idr_pre_get
+EXPORT_SYMBOL vmlinux 0x11499f9c	neigh_table_init_no_netlink
+EXPORT_SYMBOL vmlinux 0x11584ebc	__ip_select_ident
+EXPORT_SYMBOL vmlinux 0x1163f0a7	blk_max_low_pfn
+EXPORT_SYMBOL vmlinux 0x11663cec	adb_register
+EXPORT_SYMBOL vmlinux 0x1168fbad	scsi_block_when_processing_errors
+EXPORT_SYMBOL vmlinux 0x117093be	qdisc_class_hash_init
+EXPORT_SYMBOL vmlinux 0x1172c40e	alloc_file
+EXPORT_SYMBOL vmlinux 0x118f01ea	putname
+EXPORT_SYMBOL vmlinux 0x11910e58	of_register_spi_devices
+EXPORT_SYMBOL vmlinux 0x11a41041	_write_lock_irqsave
+EXPORT_SYMBOL vmlinux 0x11b69485	scsi_cmd_ioctl
+EXPORT_SYMBOL vmlinux 0x11f8277d	per_cpu__cpu_core_map
+EXPORT_SYMBOL vmlinux 0x11f92ca5	remove_inode_hash
+EXPORT_SYMBOL vmlinux 0x1200f780	tcp_setsockopt
+EXPORT_SYMBOL vmlinux 0x12023023	neigh_resolve_output
+EXPORT_SYMBOL vmlinux 0x1210e9c3	pci_bus_assign_resources
+EXPORT_SYMBOL vmlinux 0x122b9d83	ida_pre_get
+EXPORT_SYMBOL vmlinux 0x12387199	scsi_eh_prep_cmnd
+EXPORT_SYMBOL vmlinux 0x1252d179	inet_del_protocol
+EXPORT_SYMBOL vmlinux 0x1260a1ca	fsync_bdev
+EXPORT_SYMBOL vmlinux 0x12696a41	generic_error_remove_page
+EXPORT_SYMBOL vmlinux 0x12da5bb2	__kmalloc
+EXPORT_SYMBOL vmlinux 0x12e5ef0c	rtas_set_power_level
+EXPORT_SYMBOL vmlinux 0x12ea7d11	do_mmap_pgoff
+EXPORT_SYMBOL vmlinux 0x12ff4298	scsi_bios_ptable
+EXPORT_SYMBOL vmlinux 0x13083c2a	pagecache_write_end
+EXPORT_SYMBOL vmlinux 0x1318498e	xfrm_state_alloc
+EXPORT_SYMBOL vmlinux 0x131ce413	clear_user_page
+EXPORT_SYMBOL vmlinux 0x131d7fe0	i2c_smbus_read_byte_data
+EXPORT_SYMBOL vmlinux 0x1379fa46	delayed_slow_work_enqueue
+EXPORT_SYMBOL vmlinux 0x1383a115	tcp_md5_hash_key
+EXPORT_SYMBOL vmlinux 0x13bf0b57	dcache_dir_open
+EXPORT_SYMBOL vmlinux 0x13c0c771	__dev_remove_pack
+EXPORT_SYMBOL vmlinux 0x13d6cfd5	inet_proto_csum_replace4
+EXPORT_SYMBOL vmlinux 0x1407c6e7	kmap_prot
+EXPORT_SYMBOL vmlinux 0x1437d144	bio_map_kern
+EXPORT_SYMBOL vmlinux 0x14594a95	genphy_restart_aneg
+EXPORT_SYMBOL vmlinux 0x1495665a	blk_queue_softirq_done
+EXPORT_SYMBOL vmlinux 0x14bae760	pci_remove_bus
+EXPORT_SYMBOL vmlinux 0x14dfc065	tcp_rcv_established
+EXPORT_SYMBOL vmlinux 0x14f5ff8e	cdrom_mode_sense
+EXPORT_SYMBOL vmlinux 0x1516d955	key_put
+EXPORT_SYMBOL vmlinux 0x153c882c	cdrom_release
+EXPORT_SYMBOL vmlinux 0x154b0f24	scsi_device_lookup_by_target
+EXPORT_SYMBOL vmlinux 0x1551dc51	bitmap_find_free_region
+EXPORT_SYMBOL vmlinux 0x15815322	netlink_unicast
+EXPORT_SYMBOL vmlinux 0x15b7c998	d_genocide
+EXPORT_SYMBOL vmlinux 0x15ce58d0	seq_lseek
+EXPORT_SYMBOL vmlinux 0x15d4e849	sock_recvmsg
+EXPORT_SYMBOL vmlinux 0x15e1c830	sk_stream_wait_connect
+EXPORT_SYMBOL vmlinux 0x15ed95d3	_read_lock
+EXPORT_SYMBOL vmlinux 0x15fa359b	unload_nls
+EXPORT_SYMBOL vmlinux 0x160bd45c	rtas_token
+EXPORT_SYMBOL vmlinux 0x16250200	_atomic_dec_and_lock
+EXPORT_SYMBOL vmlinux 0x163c5e39	twl4030_i2c_read
+EXPORT_SYMBOL vmlinux 0x1677d7b4	jbd2_log_wait_commit
+EXPORT_SYMBOL vmlinux 0x168423ec	request_key_async_with_auxdata
+EXPORT_SYMBOL vmlinux 0x16e1eec9	netpoll_poll
+EXPORT_SYMBOL vmlinux 0x16ef373d	phy_stop
+EXPORT_SYMBOL vmlinux 0x1712ec87	jbd2_journal_check_available_features
+EXPORT_SYMBOL vmlinux 0x171786cb	i2c_smbus_write_byte
+EXPORT_SYMBOL vmlinux 0x174b876e	pfifo_qdisc_ops
+EXPORT_SYMBOL vmlinux 0x175e1ed0	dma_pool_create
+EXPORT_SYMBOL vmlinux 0x175f2ae8	dquot_transfer
+EXPORT_SYMBOL vmlinux 0x179ec4b8	dcache_lock
+EXPORT_SYMBOL vmlinux 0x17aa156a	__ucmpdi2
+EXPORT_SYMBOL vmlinux 0x17b296ec	kthread_create
+EXPORT_SYMBOL vmlinux 0x17bb9095	console_start
+EXPORT_SYMBOL vmlinux 0x17cdd7f0	generic_file_mmap
+EXPORT_SYMBOL vmlinux 0x17df17bc	sysctl_tcp_ecn
+EXPORT_SYMBOL vmlinux 0x17df92da	tcf_action_exec
+EXPORT_SYMBOL vmlinux 0x17e400bd	tcp_ioctl
+EXPORT_SYMBOL vmlinux 0x17f341a0	i8042_lock_chip
+EXPORT_SYMBOL vmlinux 0x18165e01	jbd2_journal_revoke
+EXPORT_SYMBOL vmlinux 0x183fa88b	mempool_alloc_slab
+EXPORT_SYMBOL vmlinux 0x185420b1	security_d_instantiate
+EXPORT_SYMBOL vmlinux 0x186d4632	scsi_device_put
+EXPORT_SYMBOL vmlinux 0x189b6ae0	bdi_register
+EXPORT_SYMBOL vmlinux 0x19001f92	sockfd_lookup
+EXPORT_SYMBOL vmlinux 0x19182e02	clocksource_register
+EXPORT_SYMBOL vmlinux 0x1932ff9e	blk_end_request_all
+EXPORT_SYMBOL vmlinux 0x19610e1f	cpu_all_bits
+EXPORT_SYMBOL vmlinux 0x19750ecf	sk_stream_kill_queues
+EXPORT_SYMBOL vmlinux 0x1976bc16	__tracepoint_kmem_cache_free
+EXPORT_SYMBOL vmlinux 0x199ed0cd	net_disable_timestamp
+EXPORT_SYMBOL vmlinux 0x19cbb4b5	down_timeout
+EXPORT_SYMBOL vmlinux 0x19d17cde	blk_make_request
+EXPORT_SYMBOL vmlinux 0x1a2bb5f4	inode_setattr
+EXPORT_SYMBOL vmlinux 0x1a39eacb	fb_blank
+EXPORT_SYMBOL vmlinux 0x1a43cbef	tcp_read_sock
+EXPORT_SYMBOL vmlinux 0x1a6c5672	journal_revoke
+EXPORT_SYMBOL vmlinux 0x1a754580	sb_set_blocksize
+EXPORT_SYMBOL vmlinux 0x1a8bf7ef	bio_integrity_get_tag
+EXPORT_SYMBOL vmlinux 0x1aa5e518	pcibios_fixup_bus
+EXPORT_SYMBOL vmlinux 0x1abe4da5	dev_unicast_add
+EXPORT_SYMBOL vmlinux 0x1ac03748	napi_gro_frags
+EXPORT_SYMBOL vmlinux 0x1aca5f15	__skb_checksum_complete
+EXPORT_SYMBOL vmlinux 0x1ace138d	bitmap_allocate_region
+EXPORT_SYMBOL vmlinux 0x1ace76ca	scsi_setup_blk_pc_cmnd
+EXPORT_SYMBOL vmlinux 0x1ad8621b	dm_get_mapinfo
+EXPORT_SYMBOL vmlinux 0x1ad97b97	of_get_mac_address
+EXPORT_SYMBOL vmlinux 0x1aed68d1	udp_flush_pending_frames
+EXPORT_SYMBOL vmlinux 0x1b015d25	bitmap_parselist
+EXPORT_SYMBOL vmlinux 0x1b0a4e5b	inet_twsk_deschedule
+EXPORT_SYMBOL vmlinux 0x1b0d1322	sg_alloc_table
+EXPORT_SYMBOL vmlinux 0x1b0f2084	register_tcf_proto_ops
+EXPORT_SYMBOL vmlinux 0x1b16092a	dev_set_drvdata
+EXPORT_SYMBOL vmlinux 0x1b26633e	may_umount
+EXPORT_SYMBOL vmlinux 0x1b2e8693	scsi_remove_device
+EXPORT_SYMBOL vmlinux 0x1b451a02	input_unregister_device
+EXPORT_SYMBOL vmlinux 0x1b6314fd	in_aton
+EXPORT_SYMBOL vmlinux 0x1b8b95ad	i8042_unlock_chip
+EXPORT_SYMBOL vmlinux 0x1b8e8666	dquot_reserve_space
+EXPORT_SYMBOL vmlinux 0x1b919d0c	inet_dgram_ops
+EXPORT_SYMBOL vmlinux 0x1b9981cc	set_irq_wake
+EXPORT_SYMBOL vmlinux 0x1b9e0ff1	scsilun_to_int
+EXPORT_SYMBOL vmlinux 0x1ba1f814	page_symlink_inode_operations
+EXPORT_SYMBOL vmlinux 0x1bc4ff03	tty_termios_hw_change
+EXPORT_SYMBOL vmlinux 0x1bcc42ed	get_pci_dma_ops
+EXPORT_SYMBOL vmlinux 0x1bcc9508	security_path_link
+EXPORT_SYMBOL vmlinux 0x1c0ef94a	per_cpu____irq_regs
+EXPORT_SYMBOL vmlinux 0x1c1af916	set_normalized_timespec
+EXPORT_SYMBOL vmlinux 0x1c1b2318	vfs_set_dqblk
+EXPORT_SYMBOL vmlinux 0x1c28deb6	sock_map_fd
+EXPORT_SYMBOL vmlinux 0x1c3d551f	__sk_mem_schedule
+EXPORT_SYMBOL vmlinux 0x1c5b2c15	pmu_wait_complete
+EXPORT_SYMBOL vmlinux 0x1c611259	unregister_binfmt
+EXPORT_SYMBOL vmlinux 0x1c7617ea	file_remove_suid
+EXPORT_SYMBOL vmlinux 0x1c7727ef	mnt_unpin
+EXPORT_SYMBOL vmlinux 0x1c80de9c	ip_send_check
+EXPORT_SYMBOL vmlinux 0x1ca0c483	sock_create
+EXPORT_SYMBOL vmlinux 0x1cab9646	skb_gso_segment
+EXPORT_SYMBOL vmlinux 0x1cc1ae61	tty_port_close_end
+EXPORT_SYMBOL vmlinux 0x1cc6719a	register_reboot_notifier
+EXPORT_SYMBOL vmlinux 0x1cd76330	scsi_free_host_dev
+EXPORT_SYMBOL vmlinux 0x1cf02bcf	inet_frags_init
+EXPORT_SYMBOL vmlinux 0x1cf069e2	handle_sysrq
+EXPORT_SYMBOL vmlinux 0x1cf7b37f	vga_tryget
+EXPORT_SYMBOL vmlinux 0x1cfc5490	set_binfmt
+EXPORT_SYMBOL vmlinux 0x1d050d88	bdi_unregister
+EXPORT_SYMBOL vmlinux 0x1d2e87c6	do_gettimeofday
+EXPORT_SYMBOL vmlinux 0x1d3c1faa	idr_get_new_above
+EXPORT_SYMBOL vmlinux 0x1d6919a0	load_nls_default
+EXPORT_SYMBOL vmlinux 0x1d9bd196	filp_open
+EXPORT_SYMBOL vmlinux 0x1dc36131	fb_destroy_modedb
+EXPORT_SYMBOL vmlinux 0x1dd571e6	fb_copy_cmap
+EXPORT_SYMBOL vmlinux 0x1df1fbd1	of_get_next_child
+EXPORT_SYMBOL vmlinux 0x1dfb5f44	irq_desc
+EXPORT_SYMBOL vmlinux 0x1e026038	register_netdev
+EXPORT_SYMBOL vmlinux 0x1e1e8c9b	bdput
+EXPORT_SYMBOL vmlinux 0x1e298dce	input_set_capability
+EXPORT_SYMBOL vmlinux 0x1e45cc4f	dmam_alloc_noncoherent
+EXPORT_SYMBOL vmlinux 0x1e6d26a8	strstr
+EXPORT_SYMBOL vmlinux 0x1e81710d	genphy_suspend
+EXPORT_SYMBOL vmlinux 0x1e8defb7	tcf_action_dump_1
+EXPORT_SYMBOL vmlinux 0x1e97033c	blk_cleanup_queue
+EXPORT_SYMBOL vmlinux 0x1ea0438a	pci_read_irq_line
+EXPORT_SYMBOL vmlinux 0x1ebbd43c	blk_rq_init
+EXPORT_SYMBOL vmlinux 0x1ec18f7d	pci_request_region
+EXPORT_SYMBOL vmlinux 0x1ecb9943	posix_acl_to_xattr
+EXPORT_SYMBOL vmlinux 0x1eccbb1f	generic_splice_sendpage
+EXPORT_SYMBOL vmlinux 0x1efe283f	__cap_full_set
+EXPORT_SYMBOL vmlinux 0x1f1ebaf6	atomic_dec_and_mutex_lock
+EXPORT_SYMBOL vmlinux 0x1f2f4f78	sock_no_accept
+EXPORT_SYMBOL vmlinux 0x1f3830bf	qdisc_reset
+EXPORT_SYMBOL vmlinux 0x1f5549cd	up_write
+EXPORT_SYMBOL vmlinux 0x1f562c13	xfrm_policy_insert
+EXPORT_SYMBOL vmlinux 0x1f5c5d86	register_nls
+EXPORT_SYMBOL vmlinux 0x1fc408c4	set_bdi_congested
+EXPORT_SYMBOL vmlinux 0x1fcb4ab7	copy_strings_kernel
+EXPORT_SYMBOL vmlinux 0x1fd30fae	mdiobus_write
+EXPORT_SYMBOL vmlinux 0x1fd54a83	sock_kfree_s
+EXPORT_SYMBOL vmlinux 0x1fec4093	kernel_setsockopt
+EXPORT_SYMBOL vmlinux 0x1ff00937	dqput
+EXPORT_SYMBOL vmlinux 0x1ff69dd8	vfs_fstatat
+EXPORT_SYMBOL vmlinux 0x1ff7bad5	genlmsg_multicast_allns
+EXPORT_SYMBOL vmlinux 0x20000329	simple_strtoul
+EXPORT_SYMBOL vmlinux 0x20030ecd	ioremap
+EXPORT_SYMBOL vmlinux 0x20385c58	genl_register_mc_group
+EXPORT_SYMBOL vmlinux 0x2045363b	nlmsg_notify
+EXPORT_SYMBOL vmlinux 0x206484af	sg_copy_from_buffer
+EXPORT_SYMBOL vmlinux 0x206be344	dev_addr_add
+EXPORT_SYMBOL vmlinux 0x2075251e	neigh_sysctl_register
+EXPORT_SYMBOL vmlinux 0x20ab5b82	invalidate_bdev
+EXPORT_SYMBOL vmlinux 0x20b1ff52	ipv4_specific
+EXPORT_SYMBOL vmlinux 0x20c57ddd	jbd2_journal_destroy
+EXPORT_SYMBOL vmlinux 0x20d9a292	simple_transaction_read
+EXPORT_SYMBOL vmlinux 0x20e2d580	__ide_dma_bad_drive
+EXPORT_SYMBOL vmlinux 0x20ea03e4	ip_xfrm_me_harder
+EXPORT_SYMBOL vmlinux 0x214d31d2	blk_queue_bounce_limit
+EXPORT_SYMBOL vmlinux 0x215ebd78	bitrev16
+EXPORT_SYMBOL vmlinux 0x21657567	bdi_set_max_ratio
+EXPORT_SYMBOL vmlinux 0x21692920	scsi_mode_sense
+EXPORT_SYMBOL vmlinux 0x21708c1a	pci_enable_wake
+EXPORT_SYMBOL vmlinux 0x217f7106	input_flush_device
+EXPORT_SYMBOL vmlinux 0x21b17e50	pci_assign_resource
+EXPORT_SYMBOL vmlinux 0x21d86186	skb_make_writable
+EXPORT_SYMBOL vmlinux 0x21f0a223	d_rehash
+EXPORT_SYMBOL vmlinux 0x222dfe2a	sysctl_intvec
+EXPORT_SYMBOL vmlinux 0x222e7ce2	sysfs_streq
+EXPORT_SYMBOL vmlinux 0x22436ddf	deactivate_locked_super
+EXPORT_SYMBOL vmlinux 0x226e86a9	audit_log
+EXPORT_SYMBOL vmlinux 0x226f3d35	in_dev_finish_destroy
+EXPORT_SYMBOL vmlinux 0x2279a092	simple_getattr
+EXPORT_SYMBOL vmlinux 0x2288378f	system_state
+EXPORT_SYMBOL vmlinux 0x22a73912	__tcp_put_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x22b325d5	kd_mksound
+EXPORT_SYMBOL vmlinux 0x22b6533b	xfrm_sad_getinfo
+EXPORT_SYMBOL vmlinux 0x22ca4cc3	dq_data_lock
+EXPORT_SYMBOL vmlinux 0x22eff463	blk_queue_update_dma_alignment
+EXPORT_SYMBOL vmlinux 0x231068f1	nobh_write_begin
+EXPORT_SYMBOL vmlinux 0x23269a13	strict_strtoul
+EXPORT_SYMBOL vmlinux 0x2332b88f	kernel_listen
+EXPORT_SYMBOL vmlinux 0x2351e153	vc_cons
+EXPORT_SYMBOL vmlinux 0x235491d8	poll_schedule_timeout
+EXPORT_SYMBOL vmlinux 0x2366f0c7	mark_buffer_dirty
+EXPORT_SYMBOL vmlinux 0x237f23f6	swiotlb_sync_single_for_device
+EXPORT_SYMBOL vmlinux 0x2398e4ae	find_get_page
+EXPORT_SYMBOL vmlinux 0x23fd3028	vmalloc_node
+EXPORT_SYMBOL vmlinux 0x241669c9	may_umount_tree
+EXPORT_SYMBOL vmlinux 0x2422a316	blk_init_queue
+EXPORT_SYMBOL vmlinux 0x2446a562	kill_fasync
+EXPORT_SYMBOL vmlinux 0x244be0c8	kmem_cache_alloc
+EXPORT_SYMBOL vmlinux 0x24568db5	tty_port_tty_set
+EXPORT_SYMBOL vmlinux 0x2459bbcc	console_set_on_cmdline
+EXPORT_SYMBOL vmlinux 0x24736250	jbd2_journal_errno
+EXPORT_SYMBOL vmlinux 0x2491fbb0	phy_scan_fixups
+EXPORT_SYMBOL vmlinux 0x24d34647	pci_release_regions
+EXPORT_SYMBOL vmlinux 0x24dfee4f	skb_recv_datagram
+EXPORT_SYMBOL vmlinux 0x24f5e6e8	posix_unblock_lock
+EXPORT_SYMBOL vmlinux 0x24fdac79	wake_bit_function
+EXPORT_SYMBOL vmlinux 0x250113b4	memory_read_from_buffer
+EXPORT_SYMBOL vmlinux 0x2503a116	tcp_v4_md5_do_del
+EXPORT_SYMBOL vmlinux 0x25191c11	xfrm_unregister_km
+EXPORT_SYMBOL vmlinux 0x25435829	inet_csk_accept
+EXPORT_SYMBOL vmlinux 0x257304c8	lock_sock_nested
+EXPORT_SYMBOL vmlinux 0x2581543c	complete
+EXPORT_SYMBOL vmlinux 0x25820c64	fs_overflowuid
+EXPORT_SYMBOL vmlinux 0x258355b4	fb_find_best_mode
+EXPORT_SYMBOL vmlinux 0x25882c95	vfs_read
+EXPORT_SYMBOL vmlinux 0x25c68bec	set_bh_page
+EXPORT_SYMBOL vmlinux 0x25cf8049	matroxfb_PLL_calcclock
+EXPORT_SYMBOL vmlinux 0x25e5837e	__netdev_alloc_skb
+EXPORT_SYMBOL vmlinux 0x25f3bd2e	atomic64_xchg
+EXPORT_SYMBOL vmlinux 0x2600ee52	tty_chars_in_buffer
+EXPORT_SYMBOL vmlinux 0x26024f81	dm_kcopyd_client_create
+EXPORT_SYMBOL vmlinux 0x26269f2b	kunmap_atomic
+EXPORT_SYMBOL vmlinux 0x26477c07	__vmalloc
+EXPORT_SYMBOL vmlinux 0x264c8f29	generic_file_readonly_mmap
+EXPORT_SYMBOL vmlinux 0x264ef55c	pskb_expand_head
+EXPORT_SYMBOL vmlinux 0x26536915	end_buffer_write_sync
+EXPORT_SYMBOL vmlinux 0x265e95e5	lookup_one_len
+EXPORT_SYMBOL vmlinux 0x267fc65b	__tasklet_hi_schedule
+EXPORT_SYMBOL vmlinux 0x26932928	unregister_quota_format
+EXPORT_SYMBOL vmlinux 0x26a54f6f	scsi_is_sdev_device
+EXPORT_SYMBOL vmlinux 0x26a5c46c	kmem_cache_name
+EXPORT_SYMBOL vmlinux 0x26a672e7	put_mnt_ns
+EXPORT_SYMBOL vmlinux 0x26e4fb5c	unregister_qdisc
+EXPORT_SYMBOL vmlinux 0x26e76fb8	sysctl_udp_wmem_min
+EXPORT_SYMBOL vmlinux 0x26efdfa1	skb_split
+EXPORT_SYMBOL vmlinux 0x2705470f	blk_alloc_queue
+EXPORT_SYMBOL vmlinux 0x271f1f09	pci_bus_find_capability
+EXPORT_SYMBOL vmlinux 0x271f4d2a	finish_wait
+EXPORT_SYMBOL vmlinux 0x2727470c	kthread_bind
+EXPORT_SYMBOL vmlinux 0x272c9acd	pmu_battery_count
+EXPORT_SYMBOL vmlinux 0x2735c59d	submit_bh
+EXPORT_SYMBOL vmlinux 0x273e199d	pcim_iomap_regions_request_all
+EXPORT_SYMBOL vmlinux 0x27532927	pci_release_selected_regions
+EXPORT_SYMBOL vmlinux 0x27595179	skb_free_datagram_locked
+EXPORT_SYMBOL vmlinux 0x27790a38	mb_cache_entry_insert
+EXPORT_SYMBOL vmlinux 0x27864d57	memparse
+EXPORT_SYMBOL vmlinux 0x27ab09f9	neigh_compat_output
+EXPORT_SYMBOL vmlinux 0x27bbf221	disable_irq_nosync
+EXPORT_SYMBOL vmlinux 0x27c61ece	qdisc_put_stab
+EXPORT_SYMBOL vmlinux 0x27dd8570	tcp_md5_hash_header
+EXPORT_SYMBOL vmlinux 0x27de730d	filp_close
+EXPORT_SYMBOL vmlinux 0x27ed3b96	ip_getsockopt
+EXPORT_SYMBOL vmlinux 0x27f47ba6	inet_frag_evictor
+EXPORT_SYMBOL vmlinux 0x27f6606d	netif_rx_ni
+EXPORT_SYMBOL vmlinux 0x27fa106a	sk_free
+EXPORT_SYMBOL vmlinux 0x285ac517	strict_strtoll
+EXPORT_SYMBOL vmlinux 0x2867790a	qdisc_calculate_pkt_len
+EXPORT_SYMBOL vmlinux 0x28817591	tcf_hash_search
+EXPORT_SYMBOL vmlinux 0x289ca9fb	rtas
+EXPORT_SYMBOL vmlinux 0x28a2ed02	scsi_build_sense_buffer
+EXPORT_SYMBOL vmlinux 0x28b1e9c3	netdev_class_remove_file
+EXPORT_SYMBOL vmlinux 0x28bad70d	register_exec_domain
+EXPORT_SYMBOL vmlinux 0x28cf3e70	up
+EXPORT_SYMBOL vmlinux 0x28f48c53	tty_unregister_driver
+EXPORT_SYMBOL vmlinux 0x29252d61	skb_copy_datagram_iovec
+EXPORT_SYMBOL vmlinux 0x29537c9e	alloc_chrdev_region
+EXPORT_SYMBOL vmlinux 0x29766a93	down_killable
+EXPORT_SYMBOL vmlinux 0x297a04e6	scsi_rescan_device
+EXPORT_SYMBOL vmlinux 0x297ae3bb	ethtool_op_get_rx_csum
+EXPORT_SYMBOL vmlinux 0x29a41629	vm_map_ram
+EXPORT_SYMBOL vmlinux 0x29b13d4c	pci_lost_interrupt
+EXPORT_SYMBOL vmlinux 0x29b2c59f	dentry_open
+EXPORT_SYMBOL vmlinux 0x29bd4c46	__cap_init_eff_set
+EXPORT_SYMBOL vmlinux 0x29cf5ebd	vfs_link
+EXPORT_SYMBOL vmlinux 0x29d8fde4	have_submounts
+EXPORT_SYMBOL vmlinux 0x2a16e6d0	gen_replace_estimator
+EXPORT_SYMBOL vmlinux 0x2a2933d0	llc_set_station_handler
+EXPORT_SYMBOL vmlinux 0x2a303d4d	check_signature
+EXPORT_SYMBOL vmlinux 0x2a471cf9	elv_rb_add
+EXPORT_SYMBOL vmlinux 0x2a4c31ab	__serio_register_driver
+EXPORT_SYMBOL vmlinux 0x2a745248	blk_start_queue
+EXPORT_SYMBOL vmlinux 0x2a819768	__inet6_lookup_established
+EXPORT_SYMBOL vmlinux 0x2aa0e4fc	strncasecmp
+EXPORT_SYMBOL vmlinux 0x2aba9e62	read_cache_page
+EXPORT_SYMBOL vmlinux 0x2ac7bd82	dev_get_by_flags
+EXPORT_SYMBOL vmlinux 0x2acf96c9	swiotlb_unmap_sg_attrs
+EXPORT_SYMBOL vmlinux 0x2ad374c3	bdi_destroy
+EXPORT_SYMBOL vmlinux 0x2add1951	input_event
+EXPORT_SYMBOL vmlinux 0x2ae6a301	clear_page_dirty_for_io
+EXPORT_SYMBOL vmlinux 0x2afda169	consume_skb
+EXPORT_SYMBOL vmlinux 0x2b02987f	con_copy_unimap
+EXPORT_SYMBOL vmlinux 0x2b0ba2b0	scsi_sense_desc_find
+EXPORT_SYMBOL vmlinux 0x2b12925d	cpumask_next_and
+EXPORT_SYMBOL vmlinux 0x2b22e1dc	ps2_cmd_aborted
+EXPORT_SYMBOL vmlinux 0x2b25e9be	of_device_is_available
+EXPORT_SYMBOL vmlinux 0x2b4e6bc4	vfs_write
+EXPORT_SYMBOL vmlinux 0x2b5dfc67	skb_under_panic
+EXPORT_SYMBOL vmlinux 0x2b5e8557	register_filesystem
+EXPORT_SYMBOL vmlinux 0x2b798f15	fbcon_set_tileops
+EXPORT_SYMBOL vmlinux 0x2b87747f	of_find_node_by_path
+EXPORT_SYMBOL vmlinux 0x2b91055b	kmem_cache_create
+EXPORT_SYMBOL vmlinux 0x2ba2d38b	cdev_index
+EXPORT_SYMBOL vmlinux 0x2ba3c9a2	get_user_pages
+EXPORT_SYMBOL vmlinux 0x2ba707a8	sysctl_tcp_low_latency
+EXPORT_SYMBOL vmlinux 0x2ba78f11	giveup_fpu
+EXPORT_SYMBOL vmlinux 0x2bb909d2	inet_listen
+EXPORT_SYMBOL vmlinux 0x2bc61da1	program_check_exception
+EXPORT_SYMBOL vmlinux 0x2bcf3c0f	register_sysctl_paths
+EXPORT_SYMBOL vmlinux 0x2bdc334a	fb_pan_display
+EXPORT_SYMBOL vmlinux 0x2befd955	neigh_table_clear
+EXPORT_SYMBOL vmlinux 0x2c293171	block_is_partially_uptodate
+EXPORT_SYMBOL vmlinux 0x2c4385d9	kernel_getpeername
+EXPORT_SYMBOL vmlinux 0x2c7d8276	sock_no_getsockopt
+EXPORT_SYMBOL vmlinux 0x2c94dde7	jbd2_journal_get_undo_access
+EXPORT_SYMBOL vmlinux 0x2c973547	lookup_bdev
+EXPORT_SYMBOL vmlinux 0x2ca23a67	ip4_datagram_connect
+EXPORT_SYMBOL vmlinux 0x2caf70be	sk_stop_timer
+EXPORT_SYMBOL vmlinux 0x2cb462a1	bdevname
+EXPORT_SYMBOL vmlinux 0x2d72d6f1	kernel_sendmsg
+EXPORT_SYMBOL vmlinux 0x2d89342a	scsi_show_sense_hdr
+EXPORT_SYMBOL vmlinux 0x2d9b6cdb	page_follow_link_light
+EXPORT_SYMBOL vmlinux 0x2dae379c	dev_unicast_unsync
+EXPORT_SYMBOL vmlinux 0x2dc1754a	netif_rx
+EXPORT_SYMBOL vmlinux 0x2dc357be	names_cachep
+EXPORT_SYMBOL vmlinux 0x2dcb0123	schedule_delayed_work_on
+EXPORT_SYMBOL vmlinux 0x2de82797	nf_afinfo
+EXPORT_SYMBOL vmlinux 0x2e0d082b	swiotlb_dma_supported
+EXPORT_SYMBOL vmlinux 0x2e2ce9e0	sysctl_tcp_syncookies
+EXPORT_SYMBOL vmlinux 0x2e46a39f	skb_unlink
+EXPORT_SYMBOL vmlinux 0x2e4a39f8	sysctl_udp_mem
+EXPORT_SYMBOL vmlinux 0x2e7c4302	journal_get_undo_access
+EXPORT_SYMBOL vmlinux 0x2e883b07	audit_log_end
+EXPORT_SYMBOL vmlinux 0x2e9011f6	__generic_block_fiemap
+EXPORT_SYMBOL vmlinux 0x2f0948ce	swiotlb_sync_sg_for_device
+EXPORT_SYMBOL vmlinux 0x2f0d2efd	scsi_calculate_bounce_limit
+EXPORT_SYMBOL vmlinux 0x2f11cb22	nla_reserve_nohdr
+EXPORT_SYMBOL vmlinux 0x2f25e989	cfb_copyarea
+EXPORT_SYMBOL vmlinux 0x2f55a1f0	eth_change_mtu
+EXPORT_SYMBOL vmlinux 0x2f5813b7	jbd2_journal_force_commit_nested
+EXPORT_SYMBOL vmlinux 0x2f609640	macio_request_resource
+EXPORT_SYMBOL vmlinux 0x2f749f92	block_write_full_page_endio
+EXPORT_SYMBOL vmlinux 0x2f763865	pci_vpd_truncate
+EXPORT_SYMBOL vmlinux 0x2f7c3abf	sk_reset_timer
+EXPORT_SYMBOL vmlinux 0x2fb09fa6	dquot_release_reserved_space
+EXPORT_SYMBOL vmlinux 0x2fb66665	cpufreq_get_policy
+EXPORT_SYMBOL vmlinux 0x302b5479	call_usermodehelper_setkeys
+EXPORT_SYMBOL vmlinux 0x3040e73e	simple_fsync
+EXPORT_SYMBOL vmlinux 0x30462bb2	tcp_enter_memory_pressure
+EXPORT_SYMBOL vmlinux 0x3063c22b	get_phy_device
+EXPORT_SYMBOL vmlinux 0x307da331	scsi_remove_host
+EXPORT_SYMBOL vmlinux 0x3095e63f	cdrom_get_last_written
+EXPORT_SYMBOL vmlinux 0x30d517bd	__secpath_destroy
+EXPORT_SYMBOL vmlinux 0x30ea13c7	tty_write_room
+EXPORT_SYMBOL vmlinux 0x310092e6	pci_match_id
+EXPORT_SYMBOL vmlinux 0x3101b861	get_sb_bdev
+EXPORT_SYMBOL vmlinux 0x310917fe	sort
+EXPORT_SYMBOL vmlinux 0x31121fe1	genl_unregister_mc_group
+EXPORT_SYMBOL vmlinux 0x311ac9ee	seq_bitmap
+EXPORT_SYMBOL vmlinux 0x311b4fd2	page_put_link
+EXPORT_SYMBOL vmlinux 0x313803c1	ip_setsockopt
+EXPORT_SYMBOL vmlinux 0x31448a4a	mempool_create_node
+EXPORT_SYMBOL vmlinux 0x3145216f	pci_dev_present
+EXPORT_SYMBOL vmlinux 0x3147857d	default_red
+EXPORT_SYMBOL vmlinux 0x315208c0	otg_get_transceiver
+EXPORT_SYMBOL vmlinux 0x316978fb	inode_sub_bytes
+EXPORT_SYMBOL vmlinux 0x316c3c10	seq_open_private
+EXPORT_SYMBOL vmlinux 0x318810b9	idr_find
+EXPORT_SYMBOL vmlinux 0x318ef6b3	netif_receive_skb
+EXPORT_SYMBOL vmlinux 0x3191f109	__krealloc
+EXPORT_SYMBOL vmlinux 0x31cc3e1b	deny_write_access
+EXPORT_SYMBOL vmlinux 0x32090956	scsi_execute
+EXPORT_SYMBOL vmlinux 0x3217c4f0	dquot_free_space
+EXPORT_SYMBOL vmlinux 0x3233ce06	smp_call_function_many
+EXPORT_SYMBOL vmlinux 0x326df9e1	vfs_stat
+EXPORT_SYMBOL vmlinux 0x327b9c1b	pmu_poll_adb
+EXPORT_SYMBOL vmlinux 0x3285cc48	param_set_uint
+EXPORT_SYMBOL vmlinux 0x328a05f1	strncpy
+EXPORT_SYMBOL vmlinux 0x329a356f	dev_kfree_skb_any
+EXPORT_SYMBOL vmlinux 0x32ac0acf	scsi_eh_restore_cmnd
+EXPORT_SYMBOL vmlinux 0x32b1226f	input_get_keycode
+EXPORT_SYMBOL vmlinux 0x32e0db0d	of_platform_bus_probe
+EXPORT_SYMBOL vmlinux 0x3303ba07	pneigh_enqueue
+EXPORT_SYMBOL vmlinux 0x3318cc22	scsi_host_get
+EXPORT_SYMBOL vmlinux 0x332211fa	scsi_release_buffers
+EXPORT_SYMBOL vmlinux 0x339d4841	prepare_to_wait_exclusive
+EXPORT_SYMBOL vmlinux 0x33b3949a	add_wait_queue_exclusive
+EXPORT_SYMBOL vmlinux 0x33b84f74	copy_page
+EXPORT_SYMBOL vmlinux 0x341a0bae	pci_enable_msi_block
+EXPORT_SYMBOL vmlinux 0x341b6e0d	ethtool_op_set_tso
+EXPORT_SYMBOL vmlinux 0x341dbfa3	__per_cpu_offset
+EXPORT_SYMBOL vmlinux 0x342d4db8	tty_driver_kref_put
+EXPORT_SYMBOL vmlinux 0x344775e7	dev_close
+EXPORT_SYMBOL vmlinux 0x344adbd5	init_cdrom_command
+EXPORT_SYMBOL vmlinux 0x3457cb68	param_set_long
+EXPORT_SYMBOL vmlinux 0x3469e7ca	pcix_get_mmrbc
+EXPORT_SYMBOL vmlinux 0x348b84b6	journal_ack_err
+EXPORT_SYMBOL vmlinux 0x34908c14	print_hex_dump_bytes
+EXPORT_SYMBOL vmlinux 0x349cba85	strchr
+EXPORT_SYMBOL vmlinux 0x34bfc5e4	slow_work_sleep_till_thread_needed
+EXPORT_SYMBOL vmlinux 0x34f6cb6e	fail_migrate_page
+EXPORT_SYMBOL vmlinux 0x35413767	blk_queue_max_hw_segments
+EXPORT_SYMBOL vmlinux 0x355d47c5	splice_from_pipe_next
+EXPORT_SYMBOL vmlinux 0x358aadaa	inet_frag_destroy
+EXPORT_SYMBOL vmlinux 0x3590c4e8	ethtool_op_get_link
+EXPORT_SYMBOL vmlinux 0x35c2ba9e	refrigerator
+EXPORT_SYMBOL vmlinux 0x35ce514a	do_SAK
+EXPORT_SYMBOL vmlinux 0x35d64381	pci_bus_read_config_byte
+EXPORT_SYMBOL vmlinux 0x35da2e61	radix_tree_tag_get
+EXPORT_SYMBOL vmlinux 0x35dd68c9	ip_route_output_key
+EXPORT_SYMBOL vmlinux 0x35ee9d9a	macio_release_resource
+EXPORT_SYMBOL vmlinux 0x3618b95e	kmem_cache_free
+EXPORT_SYMBOL vmlinux 0x36265e6d	notify_change
+EXPORT_SYMBOL vmlinux 0x3656bf5a	lock_kernel
+EXPORT_SYMBOL vmlinux 0x3663d4d9	journal_force_commit_nested
+EXPORT_SYMBOL vmlinux 0x3669189b	ip_mc_dec_group
+EXPORT_SYMBOL vmlinux 0x366e86e5	sk_alloc
+EXPORT_SYMBOL vmlinux 0x366eeaba	end_buffer_async_write
+EXPORT_SYMBOL vmlinux 0x36839ffc	qdisc_class_hash_grow
+EXPORT_SYMBOL vmlinux 0x3687fbda	mdiobus_unregister
+EXPORT_SYMBOL vmlinux 0x368a9785	pagevec_lookup_tag
+EXPORT_SYMBOL vmlinux 0x36b9be29	tcf_exts_dump
+EXPORT_SYMBOL vmlinux 0x36cccf17	proc_dostring
+EXPORT_SYMBOL vmlinux 0x36dad625	seq_path
+EXPORT_SYMBOL vmlinux 0x36f4955f	sg_next
+EXPORT_SYMBOL vmlinux 0x3709d60b	tty_port_raise_dtr_rts
+EXPORT_SYMBOL vmlinux 0x37112152	pci_unmap_rom
+EXPORT_SYMBOL vmlinux 0x371d2130	check_legacy_ioport
+EXPORT_SYMBOL vmlinux 0x37383edd	rtas_get_power_level
+EXPORT_SYMBOL vmlinux 0x3744cf36	vmalloc_to_pfn
+EXPORT_SYMBOL vmlinux 0x374b9f66	gen_pool_alloc
+EXPORT_SYMBOL vmlinux 0x374bf817	gnet_stats_start_copy
+EXPORT_SYMBOL vmlinux 0x374ed073	scnprintf
+EXPORT_SYMBOL vmlinux 0x37933920	dm_table_unplug_all
+EXPORT_SYMBOL vmlinux 0x37a9798f	mempool_free
+EXPORT_SYMBOL vmlinux 0x37aa5477	ps2_handle_ack
+EXPORT_SYMBOL vmlinux 0x37befc70	jiffies_to_msecs
+EXPORT_SYMBOL vmlinux 0x37d02616	sync_mapping_buffers
+EXPORT_SYMBOL vmlinux 0x37d3eca2	wake_up_process
+EXPORT_SYMBOL vmlinux 0x37dc11b3	xfrm_register_km
+EXPORT_SYMBOL vmlinux 0x37e74642	get_jiffies_64
+EXPORT_SYMBOL vmlinux 0x37fba18e	alloc_disk
+EXPORT_SYMBOL vmlinux 0x381c4bb1	cancel_delayed_work_sync
+EXPORT_SYMBOL vmlinux 0x383ab5b9	mb_cache_shrink
+EXPORT_SYMBOL vmlinux 0x387b722d	security_inode_getsecctx
+EXPORT_SYMBOL vmlinux 0x388f9128	xfrm_state_walk_done
+EXPORT_SYMBOL vmlinux 0x38b92846	llc_remove_pack
+EXPORT_SYMBOL vmlinux 0x38cb441c	dev_change_flags
+EXPORT_SYMBOL vmlinux 0x38cf7311	skb_append
+EXPORT_SYMBOL vmlinux 0x38fb9933	tty_std_termios
+EXPORT_SYMBOL vmlinux 0x3906b93c	_spin_trylock_bh
+EXPORT_SYMBOL vmlinux 0x39192d33	vmalloc_to_page
+EXPORT_SYMBOL vmlinux 0x3922d605	_spin_trylock
+EXPORT_SYMBOL vmlinux 0x39505d82	DAC1064_global_init
+EXPORT_SYMBOL vmlinux 0x396d09f3	__percpu_counter_init
+EXPORT_SYMBOL vmlinux 0x39703187	vlan_dev_real_dev
+EXPORT_SYMBOL vmlinux 0x39772ec8	key_instantiate_and_link
+EXPORT_SYMBOL vmlinux 0x3980aac1	unregister_reboot_notifier
+EXPORT_SYMBOL vmlinux 0x398fc1da	ftrace_print_symbols_seq
+EXPORT_SYMBOL vmlinux 0x39a6918d	slow_work_register_user
+EXPORT_SYMBOL vmlinux 0x39a90d6a	__inc_zone_page_state
+EXPORT_SYMBOL vmlinux 0x39ca1964	irq_stat
+EXPORT_SYMBOL vmlinux 0x39d3ee03	tcp_alloc_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x39d4c204	dm_table_event
+EXPORT_SYMBOL vmlinux 0x39e4e74f	cpu_sysdev_class
+EXPORT_SYMBOL vmlinux 0x39ea0d34	mach_powermac
+EXPORT_SYMBOL vmlinux 0x3a03fc0d	devm_ioremap_prot
+EXPORT_SYMBOL vmlinux 0x3a1d2ac3	journal_wipe
+EXPORT_SYMBOL vmlinux 0x3a2204c6	security_netlink_recv
+EXPORT_SYMBOL vmlinux 0x3a7549f4	mb_cache_entry_release
+EXPORT_SYMBOL vmlinux 0x3a820553	dev_load
+EXPORT_SYMBOL vmlinux 0x3a9b6fb9	blk_unregister_region
+EXPORT_SYMBOL vmlinux 0x3aab396b	seq_escape
+EXPORT_SYMBOL vmlinux 0x3adddf17	devm_iounmap
+EXPORT_SYMBOL vmlinux 0x3ae831b6	kref_init
+EXPORT_SYMBOL vmlinux 0x3af74ce8	update_region
+EXPORT_SYMBOL vmlinux 0x3afed8b6	bio_kmalloc
+EXPORT_SYMBOL vmlinux 0x3afef4eb	dmam_alloc_coherent
+EXPORT_SYMBOL vmlinux 0x3b13abac	kick_iocb
+EXPORT_SYMBOL vmlinux 0x3b22dc64	dec_zone_page_state
+EXPORT_SYMBOL vmlinux 0x3b235c58	page_address
+EXPORT_SYMBOL vmlinux 0x3b3016d3	cpufreq_unregister_notifier
+EXPORT_SYMBOL vmlinux 0x3b4a8aa8	pci_get_bus_and_slot
+EXPORT_SYMBOL vmlinux 0x3b97702c	cdrom_mode_select
+EXPORT_SYMBOL vmlinux 0x3ba188ba	mdiobus_register
+EXPORT_SYMBOL vmlinux 0x3bb78130	set_current_groups
+EXPORT_SYMBOL vmlinux 0x3bb8de47	bio_integrity_clone
+EXPORT_SYMBOL vmlinux 0x3bd1b1f6	msecs_to_jiffies
+EXPORT_SYMBOL vmlinux 0x3bedc60e	qdisc_create_dflt
+EXPORT_SYMBOL vmlinux 0x3bf74912	dquot_commit
+EXPORT_SYMBOL vmlinux 0x3bf8d74b	tty_register_driver
+EXPORT_SYMBOL vmlinux 0x3bfa6bdc	tcf_em_tree_dump
+EXPORT_SYMBOL vmlinux 0x3bfc8417	unregister_cdrom
+EXPORT_SYMBOL vmlinux 0x3bfcd91d	scsi_is_host_device
+EXPORT_SYMBOL vmlinux 0x3c1bf24d	posix_lock_file_wait
+EXPORT_SYMBOL vmlinux 0x3c2c5af5	sprintf
+EXPORT_SYMBOL vmlinux 0x3c33c191	tcp_v4_remember_stamp
+EXPORT_SYMBOL vmlinux 0x3c6b68a7	bdi_init
+EXPORT_SYMBOL vmlinux 0x3c6c8eb8	g450_mnp2f
+EXPORT_SYMBOL vmlinux 0x3c988291	vfs_quota_on_path
+EXPORT_SYMBOL vmlinux 0x3c9d1211	string_get_size
+EXPORT_SYMBOL vmlinux 0x3ca5461e	__tcp_get_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x3cbb9084	unregister_exec_domain
+EXPORT_SYMBOL vmlinux 0x3cc0a3bb	xfrm_spd_getinfo
+EXPORT_SYMBOL vmlinux 0x3ce36dbb	get_empty_filp
+EXPORT_SYMBOL vmlinux 0x3ce4ca6f	disable_irq
+EXPORT_SYMBOL vmlinux 0x3d0601ec	kobject_set_name
+EXPORT_SYMBOL vmlinux 0x3d06a5bf	journal_set_features
+EXPORT_SYMBOL vmlinux 0x3d0e3c8b	cdrom_open
+EXPORT_SYMBOL vmlinux 0x3d1819f9	framebuffer_release
+EXPORT_SYMBOL vmlinux 0x3d6481f2	init_timer_key
+EXPORT_SYMBOL vmlinux 0x3d68bd4b	flow_cache_genid
+EXPORT_SYMBOL vmlinux 0x3daa69da	vfs_lstat
+EXPORT_SYMBOL vmlinux 0x3db43352	skb_gro_reset_offset
+EXPORT_SYMBOL vmlinux 0x3dd5fb0d	tty_port_close
+EXPORT_SYMBOL vmlinux 0x3ddab590	i2c_smbus_write_i2c_block_data
+EXPORT_SYMBOL vmlinux 0x3de73649	splice_from_pipe_feed
+EXPORT_SYMBOL vmlinux 0x3e001476	tcp_sync_mss
+EXPORT_SYMBOL vmlinux 0x3e0da0d2	serio_rescan
+EXPORT_SYMBOL vmlinux 0x3e1657c1	set_security_override_from_ctx
+EXPORT_SYMBOL vmlinux 0x3e383385	nf_hooks
+EXPORT_SYMBOL vmlinux 0x3e45e9ff	register_inetaddr_notifier
+EXPORT_SYMBOL vmlinux 0x3e4a7bdd	noop_qdisc
+EXPORT_SYMBOL vmlinux 0x3e6995a4	path_put
+EXPORT_SYMBOL vmlinux 0x3e7d8680	matrox_cfbX_init
+EXPORT_SYMBOL vmlinux 0x3e839460	mod_zone_page_state
+EXPORT_SYMBOL vmlinux 0x3e899c9d	blk_limits_io_min
+EXPORT_SYMBOL vmlinux 0x3e996185	proto_unregister
+EXPORT_SYMBOL vmlinux 0x3ec7d1f7	generic_file_aio_read
+EXPORT_SYMBOL vmlinux 0x3ecff5a5	bio_map_user
+EXPORT_SYMBOL vmlinux 0x3ed63055	zlib_inflateReset
+EXPORT_SYMBOL vmlinux 0x3ef7138f	pci_disable_msix
+EXPORT_SYMBOL vmlinux 0x3f0546a8	ioread32_rep
+EXPORT_SYMBOL vmlinux 0x3f406a3b	enable_kernel_altivec
+EXPORT_SYMBOL vmlinux 0x3f4547a7	put_unused_fd
+EXPORT_SYMBOL vmlinux 0x3f7ed961	tcf_em_unregister
+EXPORT_SYMBOL vmlinux 0x3f812605	cdrom_ioctl
+EXPORT_SYMBOL vmlinux 0x3f8c50de	neigh_lookup_nodev
+EXPORT_SYMBOL vmlinux 0x3fc8de14	pci_bus_set_ops
+EXPORT_SYMBOL vmlinux 0x3ff62317	local_bh_disable
+EXPORT_SYMBOL vmlinux 0x40198616	seq_read
+EXPORT_SYMBOL vmlinux 0x4022e52c	is_container_init
+EXPORT_SYMBOL vmlinux 0x40436272	mark_buffer_dirty_inode
+EXPORT_SYMBOL vmlinux 0x40488124	sg_last
+EXPORT_SYMBOL vmlinux 0x4059792f	print_hex_dump
+EXPORT_SYMBOL vmlinux 0x405c1144	get_seconds
+EXPORT_SYMBOL vmlinux 0x407568d0	bioset_integrity_create
+EXPORT_SYMBOL vmlinux 0x40a27c37	scsi_dev_info_remove_list
+EXPORT_SYMBOL vmlinux 0x40cfcc7d	check_media_bay
+EXPORT_SYMBOL vmlinux 0x40f1ad10	tb_ticks_per_jiffy
+EXPORT_SYMBOL vmlinux 0x4101a975	ide_fixstring
+EXPORT_SYMBOL vmlinux 0x4101bbde	param_set_copystring
+EXPORT_SYMBOL vmlinux 0x4108e69a	fb_match_mode
+EXPORT_SYMBOL vmlinux 0x41166725	inet_frags_init_net
+EXPORT_SYMBOL vmlinux 0x41344088	param_get_charp
+EXPORT_SYMBOL vmlinux 0x41482d8b	strndup_user
+EXPORT_SYMBOL vmlinux 0x415714b6	down_read
+EXPORT_SYMBOL vmlinux 0x416983d9	netdev_fix_features
+EXPORT_SYMBOL vmlinux 0x4176ddda	eth_header_parse
+EXPORT_SYMBOL vmlinux 0x4185cf4b	radix_tree_lookup_slot
+EXPORT_SYMBOL vmlinux 0x4188d439	neigh_rand_reach_time
+EXPORT_SYMBOL vmlinux 0x418cc54a	generic_listxattr
+EXPORT_SYMBOL vmlinux 0x41abb861	jbd2_journal_set_features
+EXPORT_SYMBOL vmlinux 0x41acfd6d	make_EII_client
+EXPORT_SYMBOL vmlinux 0x41adcb50	dm_io_client_create
+EXPORT_SYMBOL vmlinux 0x41ca965e	sysctl_data
+EXPORT_SYMBOL vmlinux 0x4211c3c1	zlib_inflateInit2
+EXPORT_SYMBOL vmlinux 0x4211c6a6	kfree_skb
+EXPORT_SYMBOL vmlinux 0x421360d7	neigh_destroy
+EXPORT_SYMBOL vmlinux 0x42224298	sscanf
+EXPORT_SYMBOL vmlinux 0x422d3ef3	of_phy_connect_fixed_link
+EXPORT_SYMBOL vmlinux 0x42347de1	tcf_hash_lookup
+EXPORT_SYMBOL vmlinux 0x4264c470	scsi_dma_unmap
+EXPORT_SYMBOL vmlinux 0x429328d9	_spin_lock
+EXPORT_SYMBOL vmlinux 0x429e38c2	ip_nat_decode_session
+EXPORT_SYMBOL vmlinux 0x42a9c8cc	blk_queue_max_phys_segments
+EXPORT_SYMBOL vmlinux 0x42b4f6f4	___pskb_trim
+EXPORT_SYMBOL vmlinux 0x42ce1e6c	i2c_transfer
+EXPORT_SYMBOL vmlinux 0x42ef23b1	aio_complete
+EXPORT_SYMBOL vmlinux 0x4302d0eb	free_pages
+EXPORT_SYMBOL vmlinux 0x432f6e1e	ppc_md
+EXPORT_SYMBOL vmlinux 0x4333eadb	param_set_short
+EXPORT_SYMBOL vmlinux 0x434fa55c	release_console_sem
+EXPORT_SYMBOL vmlinux 0x4362e3eb	blk_start_request
+EXPORT_SYMBOL vmlinux 0x436c2179	iowrite32
+EXPORT_SYMBOL vmlinux 0x4384e99c	eth_rebuild_header
+EXPORT_SYMBOL vmlinux 0x43862167	inode_add_bytes
+EXPORT_SYMBOL vmlinux 0x43ab66c3	param_array_get
+EXPORT_SYMBOL vmlinux 0x43b07de1	ps2_drain
+EXPORT_SYMBOL vmlinux 0x43c892bc	ethtool_op_get_ufo
+EXPORT_SYMBOL vmlinux 0x43d3c5a7	netpoll_cleanup
+EXPORT_SYMBOL vmlinux 0x43d3d249	scsicam_bios_param
+EXPORT_SYMBOL vmlinux 0x43d92b65	generic_writepages
+EXPORT_SYMBOL vmlinux 0x43ed496a	ip_mc_rejoin_group
+EXPORT_SYMBOL vmlinux 0x43fbaf1b	pagevec_lookup
+EXPORT_SYMBOL vmlinux 0x44161c19	unregister_shrinker
+EXPORT_SYMBOL vmlinux 0x441aae85	__xfrm_route_forward
+EXPORT_SYMBOL vmlinux 0x44314efb	radix_tree_gang_lookup_tag_slot
+EXPORT_SYMBOL vmlinux 0x444779c4	nla_find
+EXPORT_SYMBOL vmlinux 0x445142a2	pci_choose_state
+EXPORT_SYMBOL vmlinux 0x445b3e0f	call_usermodehelper_stdinpipe
+EXPORT_SYMBOL vmlinux 0x446deb3a	write_cache_pages
+EXPORT_SYMBOL vmlinux 0x44923f1a	read_cache_page_async
+EXPORT_SYMBOL vmlinux 0x44b911c3	rb_replace_node
+EXPORT_SYMBOL vmlinux 0x44d3d9e3	pci_enable_device
+EXPORT_SYMBOL vmlinux 0x44e9a829	match_token
+EXPORT_SYMBOL vmlinux 0x4538f7d0	tty_hangup
+EXPORT_SYMBOL vmlinux 0x453c8403	pci_msi_enabled
+EXPORT_SYMBOL vmlinux 0x454305ca	__netdev_alloc_page
+EXPORT_SYMBOL vmlinux 0x454abe61	kmalloc_caches
+EXPORT_SYMBOL vmlinux 0x4550ba8a	register_cpu_notifier
+EXPORT_SYMBOL vmlinux 0x4552f40d	unregister_snap_client
+EXPORT_SYMBOL vmlinux 0x456ad48f	pci_bus_read_config_word
+EXPORT_SYMBOL vmlinux 0x4575315d	utf8s_to_utf16s
+EXPORT_SYMBOL vmlinux 0x45760b3f	dquot_claim_space
+EXPORT_SYMBOL vmlinux 0x45781a8b	fifo_create_dflt
+EXPORT_SYMBOL vmlinux 0x458d2295	blk_queue_alignment_offset
+EXPORT_SYMBOL vmlinux 0x45947727	param_array_set
+EXPORT_SYMBOL vmlinux 0x4596db6a	sys_sigreturn
+EXPORT_SYMBOL vmlinux 0x45b0ae5c	simple_pin_fs
+EXPORT_SYMBOL vmlinux 0x45cacee3	blk_integrity_unregister
+EXPORT_SYMBOL vmlinux 0x45d0895d	init_special_inode
+EXPORT_SYMBOL vmlinux 0x45d51239	generic_write_end
+EXPORT_SYMBOL vmlinux 0x46043bee	pci_get_subsys
+EXPORT_SYMBOL vmlinux 0x4616082d	inode_sub_rsv_space
+EXPORT_SYMBOL vmlinux 0x461ebfa0	__copy_tofrom_user
+EXPORT_SYMBOL vmlinux 0x4621ffc6	input_close_device
+EXPORT_SYMBOL vmlinux 0x462a2e75	match_strlcpy
+EXPORT_SYMBOL vmlinux 0x46400220	dev_get_by_name
+EXPORT_SYMBOL vmlinux 0x465757c3	cpu_present_mask
+EXPORT_SYMBOL vmlinux 0x466c14a7	__delay
+EXPORT_SYMBOL vmlinux 0x466d14cb	netif_device_attach
+EXPORT_SYMBOL vmlinux 0x46925259	secpath_dup
+EXPORT_SYMBOL vmlinux 0x46b28adc	inode_set_bytes
+EXPORT_SYMBOL vmlinux 0x46e8424c	__dev_get_by_index
+EXPORT_SYMBOL vmlinux 0x46ec46e3	truncate_inode_pages_range
+EXPORT_SYMBOL vmlinux 0x471788e0	flush_tlb_page
+EXPORT_SYMBOL vmlinux 0x472d2a9a	radix_tree_lookup
+EXPORT_SYMBOL vmlinux 0x4748b795	scsi_block_requests
+EXPORT_SYMBOL vmlinux 0x474c122f	netpoll_send_udp
+EXPORT_SYMBOL vmlinux 0x475100c2	inet_get_local_port_range
+EXPORT_SYMBOL vmlinux 0x475db82f	pci_dev_get
+EXPORT_SYMBOL vmlinux 0x47623ab0	inet_put_port
+EXPORT_SYMBOL vmlinux 0x47654924	sock_init_data
+EXPORT_SYMBOL vmlinux 0x4791af55	sk_filter
+EXPORT_SYMBOL vmlinux 0x47981484	is_bad_inode
+EXPORT_SYMBOL vmlinux 0x479c3c86	find_next_zero_bit
+EXPORT_SYMBOL vmlinux 0x47cc5cd5	aio_put_req
+EXPORT_SYMBOL vmlinux 0x47d4c32c	posix_test_lock
+EXPORT_SYMBOL vmlinux 0x481ce6ce	cpu_active_mask
+EXPORT_SYMBOL vmlinux 0x482667cb	km_policy_expired
+EXPORT_SYMBOL vmlinux 0x482fb688	__page_symlink
+EXPORT_SYMBOL vmlinux 0x483744f9	file_update_time
+EXPORT_SYMBOL vmlinux 0x4859b8bb	rtc_year_days
+EXPORT_SYMBOL vmlinux 0x4869d7dd	phy_connect
+EXPORT_SYMBOL vmlinux 0x486b6407	hweight64
+EXPORT_SYMBOL vmlinux 0x4881efab	pmac_get_partition
+EXPORT_SYMBOL vmlinux 0x4899d106	filemap_fdatawait
+EXPORT_SYMBOL vmlinux 0x48c1d080	tcp_parse_md5sig_option
+EXPORT_SYMBOL vmlinux 0x48d4549a	set_device_ro
+EXPORT_SYMBOL vmlinux 0x48ed53fd	netdev_bonding_change
+EXPORT_SYMBOL vmlinux 0x48fc2e1f	iunique
+EXPORT_SYMBOL vmlinux 0x492d7559	tcp4_gro_complete
+EXPORT_SYMBOL vmlinux 0x49439411	genl_unregister_family
+EXPORT_SYMBOL vmlinux 0x49603fb8	security_sb_copy_data
+EXPORT_SYMBOL vmlinux 0x4969a3f9	address_space_init_once
+EXPORT_SYMBOL vmlinux 0x4991274a	override_creds
+EXPORT_SYMBOL vmlinux 0x49acc70a	tty_unthrottle
+EXPORT_SYMBOL vmlinux 0x49b7a12c	macio_register_driver
+EXPORT_SYMBOL vmlinux 0x49d43004	pci_scan_slot
+EXPORT_SYMBOL vmlinux 0x49d7007f	pci_set_dma_mask
+EXPORT_SYMBOL vmlinux 0x49e182c0	param_get_string
+EXPORT_SYMBOL vmlinux 0x49ef5145	blk_end_request
+EXPORT_SYMBOL vmlinux 0x4a172097	abort_exclusive_wait
+EXPORT_SYMBOL vmlinux 0x4a18130c	simple_empty
+EXPORT_SYMBOL vmlinux 0x4a290d4d	cur_cpu_spec
+EXPORT_SYMBOL vmlinux 0x4a358252	__bitmap_subset
+EXPORT_SYMBOL vmlinux 0x4a56a0bc	mb_cache_entry_find_first
+EXPORT_SYMBOL vmlinux 0x4a679945	netlink_rcv_skb
+EXPORT_SYMBOL vmlinux 0x4a83ba40	tcp_v4_do_rcv
+EXPORT_SYMBOL vmlinux 0x4a8702be	panic_notifier_list
+EXPORT_SYMBOL vmlinux 0x4a924179	get_phy_id
+EXPORT_SYMBOL vmlinux 0x4a937230	sb_min_blocksize
+EXPORT_SYMBOL vmlinux 0x4a971ec7	radix_tree_delete
+EXPORT_SYMBOL vmlinux 0x4aa09ef1	rtnl_notify
+EXPORT_SYMBOL vmlinux 0x4ac2f3aa	of_scan_pci_bridge
+EXPORT_SYMBOL vmlinux 0x4ac52fe0	journal_update_format
+EXPORT_SYMBOL vmlinux 0x4af15eab	qdisc_watchdog_schedule
+EXPORT_SYMBOL vmlinux 0x4af897cc	d_invalidate
+EXPORT_SYMBOL vmlinux 0x4afe9a77	scsi_partsize
+EXPORT_SYMBOL vmlinux 0x4b17de47	_read_lock_bh
+EXPORT_SYMBOL vmlinux 0x4b34fbf5	block_all_signals
+EXPORT_SYMBOL vmlinux 0x4b44fa07	journal_try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0x4b65a3dc	tcf_hash_insert
+EXPORT_SYMBOL vmlinux 0x4b7ba1de	splice_direct_to_actor
+EXPORT_SYMBOL vmlinux 0x4bbc3e5f	pm_flags
+EXPORT_SYMBOL vmlinux 0x4bc2ab42	pci_request_selected_regions_exclusive
+EXPORT_SYMBOL vmlinux 0x4bd7df8f	balance_dirty_pages_ratelimited_nr
+EXPORT_SYMBOL vmlinux 0x4bedd6db	generic_write_sync
+EXPORT_SYMBOL vmlinux 0x4bfe4941	blk_queue_make_request
+EXPORT_SYMBOL vmlinux 0x4c1182cb	bitmap_scnprintf
+EXPORT_SYMBOL vmlinux 0x4c1fac29	pci_claim_resource
+EXPORT_SYMBOL vmlinux 0x4c2b3612	tcf_destroy_chain
+EXPORT_SYMBOL vmlinux 0x4c4b9497	pcix_set_mmrbc
+EXPORT_SYMBOL vmlinux 0x4c512d41	of_get_parent
+EXPORT_SYMBOL vmlinux 0x4c775325	filemap_fdatawait_range
+EXPORT_SYMBOL vmlinux 0x4c7e7770	xfrm_user_policy
+EXPORT_SYMBOL vmlinux 0x4ca556d6	tcp_shutdown
+EXPORT_SYMBOL vmlinux 0x4cbbd171	__bitmap_weight
+EXPORT_SYMBOL vmlinux 0x4cd34a9b	vfsmount_lock
+EXPORT_SYMBOL vmlinux 0x4d0078eb	scsi_host_lookup
+EXPORT_SYMBOL vmlinux 0x4d2a5c19	rwsem_wake
+EXPORT_SYMBOL vmlinux 0x4d34b4c4	of_mdiobus_register
+EXPORT_SYMBOL vmlinux 0x4d3c153f	sigprocmask
+EXPORT_SYMBOL vmlinux 0x4d67e2df	block_page_mkwrite
+EXPORT_SYMBOL vmlinux 0x4dc45be9	nf_log_unbind_pf
+EXPORT_SYMBOL vmlinux 0x4dca56e9	phy_attach
+EXPORT_SYMBOL vmlinux 0x4dec6038	memscan
+EXPORT_SYMBOL vmlinux 0x4df119fa	__bitmap_parse
+EXPORT_SYMBOL vmlinux 0x4e069249	security_tun_dev_post_create
+EXPORT_SYMBOL vmlinux 0x4e19bab5	proc_dointvec_jiffies
+EXPORT_SYMBOL vmlinux 0x4e3567f7	match_int
+EXPORT_SYMBOL vmlinux 0x4e6e8ea7	fg_console
+EXPORT_SYMBOL vmlinux 0x4e6f8890	pcim_iounmap_regions
+EXPORT_SYMBOL vmlinux 0x4e8112a5	pid_task
+EXPORT_SYMBOL vmlinux 0x4e830a3e	strnicmp
+EXPORT_SYMBOL vmlinux 0x4e8e6d64	__neigh_event_send
+EXPORT_SYMBOL vmlinux 0x4e9dffb5	ip_fast_csum
+EXPORT_SYMBOL vmlinux 0x4ee5e955	scsi_host_alloc
+EXPORT_SYMBOL vmlinux 0x4eecd2cc	of_find_node_by_name
+EXPORT_SYMBOL vmlinux 0x4f0af4fc	__napi_schedule
+EXPORT_SYMBOL vmlinux 0x4f1358f3	kunmap_high
+EXPORT_SYMBOL vmlinux 0x4f1cd128	security_tun_dev_create
+EXPORT_SYMBOL vmlinux 0x4f52b53c	tty_set_operations
+EXPORT_SYMBOL vmlinux 0x4f9de3da	fb_set_suspend
+EXPORT_SYMBOL vmlinux 0x4fb30eda	pcie_port_service_register
+EXPORT_SYMBOL vmlinux 0x4fb3e850	eth_validate_addr
+EXPORT_SYMBOL vmlinux 0x4fd03bfd	blk_queue_ordered
+EXPORT_SYMBOL vmlinux 0x4fdee897	i8042_command
+EXPORT_SYMBOL vmlinux 0x4fe99583	atomic64_dec_if_positive
+EXPORT_SYMBOL vmlinux 0x4ff12726	__seq_open_private
+EXPORT_SYMBOL vmlinux 0x4ff92465	block_write_begin
+EXPORT_SYMBOL vmlinux 0x4ffa6e8a	I_BDEV
+EXPORT_SYMBOL vmlinux 0x50211ee3	tcp_free_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x5027f8ea	xfrm_state_unregister_afinfo
+EXPORT_SYMBOL vmlinux 0x506746b6	getrawmonotonic
+EXPORT_SYMBOL vmlinux 0x508089b8	pci_remove_behind_bridge
+EXPORT_SYMBOL vmlinux 0x509b5364	alloc_trdev
+EXPORT_SYMBOL vmlinux 0x50aee8de	vfs_readlink
+EXPORT_SYMBOL vmlinux 0x50b15c53	_read_unlock_irqrestore
+EXPORT_SYMBOL vmlinux 0x50d56018	posix_acl_equiv_mode
+EXPORT_SYMBOL vmlinux 0x5118c382	secure_dccp_sequence_number
+EXPORT_SYMBOL vmlinux 0x51299abc	__getblk
+EXPORT_SYMBOL vmlinux 0x515e24a7	flush_instruction_cache
+EXPORT_SYMBOL vmlinux 0x515fec86	jbd2_journal_get_create_access
+EXPORT_SYMBOL vmlinux 0x51647539	bio_integrity_enabled
+EXPORT_SYMBOL vmlinux 0x51657de3	dmam_pool_create
+EXPORT_SYMBOL vmlinux 0x516f60c9	try_to_release_page
+EXPORT_SYMBOL vmlinux 0x51a25c69	tcf_hash_new_index
+EXPORT_SYMBOL vmlinux 0x51a26ec2	kill_pid
+EXPORT_SYMBOL vmlinux 0x51b93469	dm_put_device
+EXPORT_SYMBOL vmlinux 0x51ba2259	udp_lib_getsockopt
+EXPORT_SYMBOL vmlinux 0x51bc86f0	elv_queue_empty
+EXPORT_SYMBOL vmlinux 0x51c17ccb	get_sb_single
+EXPORT_SYMBOL vmlinux 0x51dce73b	xfrm_state_walk_init
+EXPORT_SYMBOL vmlinux 0x51e13e4e	nf_log_bind_pf
+EXPORT_SYMBOL vmlinux 0x51ef33b8	kstrndup
+EXPORT_SYMBOL vmlinux 0x52026cdf	security_sb_parse_opts_str
+EXPORT_SYMBOL vmlinux 0x52274a57	macio_request_resources
+EXPORT_SYMBOL vmlinux 0x5271fe0f	input_inject_event
+EXPORT_SYMBOL vmlinux 0x52760ca9	getnstimeofday
+EXPORT_SYMBOL vmlinux 0x527830ff	pmac_xpram_read
+EXPORT_SYMBOL vmlinux 0x528c709d	simple_read_from_buffer
+EXPORT_SYMBOL vmlinux 0x5291c72b	sock_i_uid
+EXPORT_SYMBOL vmlinux 0x52a58c24	ifla_policy
+EXPORT_SYMBOL vmlinux 0x52ad0624	vfs_mknod
+EXPORT_SYMBOL vmlinux 0x52d7b2fd	llc_sap_list
+EXPORT_SYMBOL vmlinux 0x52e2561d	nobh_writepage
+EXPORT_SYMBOL vmlinux 0x52e6a5ff	xfrm_alloc_spi
+EXPORT_SYMBOL vmlinux 0x52ebb126	param_get_ushort
+EXPORT_SYMBOL vmlinux 0x5309f873	close_bdev_exclusive
+EXPORT_SYMBOL vmlinux 0x530b1e98	pm_suspend
+EXPORT_SYMBOL vmlinux 0x530eb9c2	dev_get_drvdata
+EXPORT_SYMBOL vmlinux 0x5313ef9f	mem_map
+EXPORT_SYMBOL vmlinux 0x5315f750	__wake_up_bit
+EXPORT_SYMBOL vmlinux 0x5317b9f9	blk_run_queue
+EXPORT_SYMBOL vmlinux 0x5319fd4b	phys_mem_access_prot
+EXPORT_SYMBOL vmlinux 0x53323370	kernel_bind
+EXPORT_SYMBOL vmlinux 0x53326531	mempool_alloc_pages
+EXPORT_SYMBOL vmlinux 0x5355f1b8	dm_io_client_destroy
+EXPORT_SYMBOL vmlinux 0x5392c2e7	kobject_del
+EXPORT_SYMBOL vmlinux 0x53b656b3	framebuffer_alloc
+EXPORT_SYMBOL vmlinux 0x53c0767c	sk_chk_filter
+EXPORT_SYMBOL vmlinux 0x53cd88f1	matroxfb_g450_connect
+EXPORT_SYMBOL vmlinux 0x53d91e59	_spin_unlock_bh
+EXPORT_SYMBOL vmlinux 0x53eb3c5e	poll_initwait
+EXPORT_SYMBOL vmlinux 0x53ebab1b	_outsl_ns
+EXPORT_SYMBOL vmlinux 0x53f7ee7a	bio_integrity_tag_size
+EXPORT_SYMBOL vmlinux 0x53fb36f6	default_unplug_io_fn
+EXPORT_SYMBOL vmlinux 0x540cfbf7	vfs_mkdir
+EXPORT_SYMBOL vmlinux 0x540f1f6f	sock_no_setsockopt
+EXPORT_SYMBOL vmlinux 0x54290dc9	nla_validate
+EXPORT_SYMBOL vmlinux 0x54470367	down
+EXPORT_SYMBOL vmlinux 0x54475486	ilookup
+EXPORT_SYMBOL vmlinux 0x5475b1ad	security_path_truncate
+EXPORT_SYMBOL vmlinux 0x548b4394	journal_dirty_data
+EXPORT_SYMBOL vmlinux 0x549b3739	__skb_warn_lro_forwarding
+EXPORT_SYMBOL vmlinux 0x54b30c29	ethtool_op_set_tx_hw_csum
+EXPORT_SYMBOL vmlinux 0x54c1abf6	dm_io
+EXPORT_SYMBOL vmlinux 0x54c26c2a	create_empty_buffers
+EXPORT_SYMBOL vmlinux 0x54c6479c	__percpu_counter_sum
+EXPORT_SYMBOL vmlinux 0x54e6fcdd	net_enable_timestamp
+EXPORT_SYMBOL vmlinux 0x5500ff16	block_read_full_page
+EXPORT_SYMBOL vmlinux 0x554f291a	__inet6_hash
+EXPORT_SYMBOL vmlinux 0x55526ea9	follow_pfn
+EXPORT_SYMBOL vmlinux 0x5559cb55	inet_csk_destroy_sock
+EXPORT_SYMBOL vmlinux 0x55638614	sock_wake_async
+EXPORT_SYMBOL vmlinux 0x5573a0ef	__alloc_skb
+EXPORT_SYMBOL vmlinux 0x5594be03	bitmap_remap
+EXPORT_SYMBOL vmlinux 0x5600904f	fb_get_color_depth
+EXPORT_SYMBOL vmlinux 0x5603cf43	do_settimeofday
+EXPORT_SYMBOL vmlinux 0x5614b010	xfrm_policy_walk_done
+EXPORT_SYMBOL vmlinux 0x561d224b	set_blocksize
+EXPORT_SYMBOL vmlinux 0x562e3596	textsearch_destroy
+EXPORT_SYMBOL vmlinux 0x5635a60a	vmalloc_user
+EXPORT_SYMBOL vmlinux 0x5671cf6c	pcim_iounmap
+EXPORT_SYMBOL vmlinux 0x56720222	dm_register_target
+EXPORT_SYMBOL vmlinux 0x5679ae53	generic_unplug_device
+EXPORT_SYMBOL vmlinux 0x56946ba4	bio_integrity_split
+EXPORT_SYMBOL vmlinux 0x56a041c7	journal_extend
+EXPORT_SYMBOL vmlinux 0x56a10763	csum_tcpudp_magic
+EXPORT_SYMBOL vmlinux 0x56c2b95b	rtas_progress
+EXPORT_SYMBOL vmlinux 0x56c8799d	scsi_kunmap_atomic_sg
+EXPORT_SYMBOL vmlinux 0x56e45ff7	tc_classify
+EXPORT_SYMBOL vmlinux 0x56f178e9	pci_wake_from_d3
+EXPORT_SYMBOL vmlinux 0x56f494e0	smp_call_function
+EXPORT_SYMBOL vmlinux 0x56fa1c1f	nla_append
+EXPORT_SYMBOL vmlinux 0x5701d850	of_create_pci_dev
+EXPORT_SYMBOL vmlinux 0x572e85d4	blk_lookup_devt
+EXPORT_SYMBOL vmlinux 0x57397779	i2c_master_send
+EXPORT_SYMBOL vmlinux 0x57511388	pcim_iomap_table
+EXPORT_SYMBOL vmlinux 0x57535517	pcim_enable_device
+EXPORT_SYMBOL vmlinux 0x575c2493	blk_queue_max_hw_sectors
+EXPORT_SYMBOL vmlinux 0x578c5f0b	tty_check_change
+EXPORT_SYMBOL vmlinux 0x579c761e	wireless_spy_update
+EXPORT_SYMBOL vmlinux 0x57a6504e	vsnprintf
+EXPORT_SYMBOL vmlinux 0x57b57ebe	jiffies_to_timespec
+EXPORT_SYMBOL vmlinux 0x57db7242	mangle_path
+EXPORT_SYMBOL vmlinux 0x57e4e165	elv_rb_former_request
+EXPORT_SYMBOL vmlinux 0x57f77c46	journal_start
+EXPORT_SYMBOL vmlinux 0x582a4747	cacheable_memcpy
+EXPORT_SYMBOL vmlinux 0x5838f6c9	rtc_valid_tm
+EXPORT_SYMBOL vmlinux 0x5840523e	skb_queue_purge
+EXPORT_SYMBOL vmlinux 0x5857b225	ioread16_rep
+EXPORT_SYMBOL vmlinux 0x5857e434	groups_free
+EXPORT_SYMBOL vmlinux 0x587bdc56	mdio_bus_type
+EXPORT_SYMBOL vmlinux 0x588189a4	get_sb_nodev
+EXPORT_SYMBOL vmlinux 0x58c2eb15	cfb_fillrect
+EXPORT_SYMBOL vmlinux 0x58d03310	mb_cache_create
+EXPORT_SYMBOL vmlinux 0x58d2366b	dev_alloc_skb
+EXPORT_SYMBOL vmlinux 0x58edeb03	scsi_device_set_state
+EXPORT_SYMBOL vmlinux 0x58fd92d4	otg_set_transceiver
+EXPORT_SYMBOL vmlinux 0x59215a7f	skb_kill_datagram
+EXPORT_SYMBOL vmlinux 0x5934392b	fb_register_client
+EXPORT_SYMBOL vmlinux 0x59464b3d	set_page_dirty
+EXPORT_SYMBOL vmlinux 0x594bf15b	ioport_map
+EXPORT_SYMBOL vmlinux 0x595d0946	empty_zero_page
+EXPORT_SYMBOL vmlinux 0x5962859f	sg_init_table
+EXPORT_SYMBOL vmlinux 0x59730591	__blk_end_request
+EXPORT_SYMBOL vmlinux 0x59c2b3b8	blk_rq_map_sg
+EXPORT_SYMBOL vmlinux 0x59d696b6	register_module_notifier
+EXPORT_SYMBOL vmlinux 0x59d8223a	ioport_resource
+EXPORT_SYMBOL vmlinux 0x59d92f6e	sock_no_socketpair
+EXPORT_SYMBOL vmlinux 0x59f6ce02	of_find_matching_node
+EXPORT_SYMBOL vmlinux 0x59feb714	__scsi_device_lookup_by_target
+EXPORT_SYMBOL vmlinux 0x5a05f42b	gnet_stats_copy_basic
+EXPORT_SYMBOL vmlinux 0x5a0acf1f	jbd2_journal_start
+EXPORT_SYMBOL vmlinux 0x5a1df703	nf_register_hooks
+EXPORT_SYMBOL vmlinux 0x5a744b86	netlink_set_nonroot
+EXPORT_SYMBOL vmlinux 0x5ab67931	do_IRQ
+EXPORT_SYMBOL vmlinux 0x5adf1d3e	netif_carrier_on
+EXPORT_SYMBOL vmlinux 0x5b19634d	div_s64_rem
+EXPORT_SYMBOL vmlinux 0x5b43f1f1	rtas_service_present
+EXPORT_SYMBOL vmlinux 0x5bf8cdd3	unmap_underlying_metadata
+EXPORT_SYMBOL vmlinux 0x5c01f344	__tcf_em_tree_match
+EXPORT_SYMBOL vmlinux 0x5c047097	pagecache_write_begin
+EXPORT_SYMBOL vmlinux 0x5c11022c	scsi_execute_req
+EXPORT_SYMBOL vmlinux 0x5c187577	con_is_bound
+EXPORT_SYMBOL vmlinux 0x5c3313f2	locks_mandatory_area
+EXPORT_SYMBOL vmlinux 0x5c8b51bc	vfs_statfs
+EXPORT_SYMBOL vmlinux 0x5c8d3ce6	d_move
+EXPORT_SYMBOL vmlinux 0x5c91afad	scsi_prep_return
+EXPORT_SYMBOL vmlinux 0x5c9dee30	blk_queue_free_tags
+EXPORT_SYMBOL vmlinux 0x5ca7bc2b	matroxfb_read_pins
+EXPORT_SYMBOL vmlinux 0x5caa44e2	tcp_connect
+EXPORT_SYMBOL vmlinux 0x5cb23b7c	scsi_ioctl
+EXPORT_SYMBOL vmlinux 0x5cc5b658	kfifo_alloc
+EXPORT_SYMBOL vmlinux 0x5ce0174c	get_write_access
+EXPORT_SYMBOL vmlinux 0x5ce62d7d	kern_path
+EXPORT_SYMBOL vmlinux 0x5d12b3fc	twl4030_i2c_write_u8
+EXPORT_SYMBOL vmlinux 0x5d277ddb	vfs_quota_disable
+EXPORT_SYMBOL vmlinux 0x5d315997	xrlim_allow
+EXPORT_SYMBOL vmlinux 0x5d4aeeb2	register_snap_client
+EXPORT_SYMBOL vmlinux 0x5d70a428	lro_flush_pkt
+EXPORT_SYMBOL vmlinux 0x5d884c9e	alloc_disk_node
+EXPORT_SYMBOL vmlinux 0x5db104aa	bdget_disk
+EXPORT_SYMBOL vmlinux 0x5dc1507c	tcp_gro_complete
+EXPORT_SYMBOL vmlinux 0x5dc5e25e	journal_flush
+EXPORT_SYMBOL vmlinux 0x5de4c3b3	tcp_gro_receive
+EXPORT_SYMBOL vmlinux 0x5e03d023	xfrm_bundle_ok
+EXPORT_SYMBOL vmlinux 0x5e1741ae	tty_register_device
+EXPORT_SYMBOL vmlinux 0x5e4222f9	generic_fillattr
+EXPORT_SYMBOL vmlinux 0x5e595212	km_new_mapping
+EXPORT_SYMBOL vmlinux 0x5e95b1cd	current_umask
+EXPORT_SYMBOL vmlinux 0x5ea520c5	tcp_select_initial_window
+EXPORT_SYMBOL vmlinux 0x5ec650e0	kobject_put
+EXPORT_SYMBOL vmlinux 0x5ed040b0	pm_set_vt_switch
+EXPORT_SYMBOL vmlinux 0x5edd0762	bin2bcd
+EXPORT_SYMBOL vmlinux 0x5eee7dad	scsi_prep_state_check
+EXPORT_SYMBOL vmlinux 0x5ef4d39b	__vlan_hwaccel_rx
+EXPORT_SYMBOL vmlinux 0x5f0f7ca8	block_truncate_page
+EXPORT_SYMBOL vmlinux 0x5f4229ac	pci_disable_device
+EXPORT_SYMBOL vmlinux 0x5f4ad8d6	init_net
+EXPORT_SYMBOL vmlinux 0x5f754e5a	memset
+EXPORT_SYMBOL vmlinux 0x5f8a2728	isa_io_base
+EXPORT_SYMBOL vmlinux 0x5fc1d1e4	__xfrm_state_delete
+EXPORT_SYMBOL vmlinux 0x5fec3ddc	genl_register_family_with_ops
+EXPORT_SYMBOL vmlinux 0x5ff99499	security_path_mkdir
+EXPORT_SYMBOL vmlinux 0x600683d3	do_unblank_screen
+EXPORT_SYMBOL vmlinux 0x602402fe	jbd2_journal_restart
+EXPORT_SYMBOL vmlinux 0x60242f12	vfs_readdir
+EXPORT_SYMBOL vmlinux 0x60328207	lock_may_read
+EXPORT_SYMBOL vmlinux 0x6069a275	xfrm_policy_register_afinfo
+EXPORT_SYMBOL vmlinux 0x606ef26d	set_groups
+EXPORT_SYMBOL vmlinux 0x609f1c7e	synchronize_net
+EXPORT_SYMBOL vmlinux 0x60a0ebad	__tracepoint_kmem_cache_alloc_node
+EXPORT_SYMBOL vmlinux 0x60b37e88	tty_hung_up_p
+EXPORT_SYMBOL vmlinux 0x60b526b3	blk_recount_segments
+EXPORT_SYMBOL vmlinux 0x60c72568	nf_ip_checksum
+EXPORT_SYMBOL vmlinux 0x611221fb	of_get_address
+EXPORT_SYMBOL vmlinux 0x61181c19	pmac_resume_agp_for_card
+EXPORT_SYMBOL vmlinux 0x612390ad	netpoll_set_trap
+EXPORT_SYMBOL vmlinux 0x6125d15f	jbd2_journal_abort
+EXPORT_SYMBOL vmlinux 0x6137b282	tty_pair_get_tty
+EXPORT_SYMBOL vmlinux 0x613e2e4b	do_truncate
+EXPORT_SYMBOL vmlinux 0x6144c727	ide_set_handler
+EXPORT_SYMBOL vmlinux 0x617d21b3	kernel_connect
+EXPORT_SYMBOL vmlinux 0x618d8299	set_notify_swap_entry_free
+EXPORT_SYMBOL vmlinux 0x6196715d	keyring_search
+EXPORT_SYMBOL vmlinux 0x61b7b126	simple_strtoull
+EXPORT_SYMBOL vmlinux 0x61c67c35	blk_queue_invalidate_tags
+EXPORT_SYMBOL vmlinux 0x61de92bd	__destroy_inode
+EXPORT_SYMBOL vmlinux 0x61eef2c9	_insb
+EXPORT_SYMBOL vmlinux 0x61f356c3	dm_unregister_target
+EXPORT_SYMBOL vmlinux 0x620060ec	mod_timer
+EXPORT_SYMBOL vmlinux 0x620d5cb7	security_sb_clone_mnt_opts
+EXPORT_SYMBOL vmlinux 0x620f97aa	km_policy_notify
+EXPORT_SYMBOL vmlinux 0x6220b988	_spin_lock_irq
+EXPORT_SYMBOL vmlinux 0x62337e80	nf_unregister_hooks
+EXPORT_SYMBOL vmlinux 0x623a3a3c	idr_remove_all
+EXPORT_SYMBOL vmlinux 0x623d7182	_chrp_type
+EXPORT_SYMBOL vmlinux 0x62461995	tty_devnum
+EXPORT_SYMBOL vmlinux 0x62737e1d	sock_unregister
+EXPORT_SYMBOL vmlinux 0x62787451	scsi_command_normalize_sense
+EXPORT_SYMBOL vmlinux 0x62827bec	security_secctx_to_secid
+EXPORT_SYMBOL vmlinux 0x628332e8	pmu_power_flags
+EXPORT_SYMBOL vmlinux 0x62a7f69c	scsi_track_queue_full
+EXPORT_SYMBOL vmlinux 0x62b387ee	vfs_dq_drop
+EXPORT_SYMBOL vmlinux 0x631b65cd	journal_check_available_features
+EXPORT_SYMBOL vmlinux 0x63560f98	tcp_splice_read
+EXPORT_SYMBOL vmlinux 0x637d130a	__xfrm_lookup
+EXPORT_SYMBOL vmlinux 0x63ae073e	mutex_trylock
+EXPORT_SYMBOL vmlinux 0x63cc487d	__breadahead
+EXPORT_SYMBOL vmlinux 0x63ecad53	register_netdevice_notifier
+EXPORT_SYMBOL vmlinux 0x63efc536	radix_tree_prev_hole
+EXPORT_SYMBOL vmlinux 0x63ff7281	kernel_sendpage
+EXPORT_SYMBOL vmlinux 0x6403e338	tcp_memory_pressure
+EXPORT_SYMBOL vmlinux 0x6404b7fb	tcp_sendpage
+EXPORT_SYMBOL vmlinux 0x641a5123	macio_dev_get
+EXPORT_SYMBOL vmlinux 0x6452212f	try_to_del_timer_sync
+EXPORT_SYMBOL vmlinux 0x645402dc	tcp_parse_options
+EXPORT_SYMBOL vmlinux 0x646cc6ab	pmu_poll
+EXPORT_SYMBOL vmlinux 0x6495d99a	force_sig
+EXPORT_SYMBOL vmlinux 0x64999478	congestion_wait
+EXPORT_SYMBOL vmlinux 0x64c5128c	jbd2_journal_dirty_metadata
+EXPORT_SYMBOL vmlinux 0x64ebac61	jbd2_journal_stop
+EXPORT_SYMBOL vmlinux 0x64fbb0f3	__nla_reserve
+EXPORT_SYMBOL vmlinux 0x651a4139	test_taint
+EXPORT_SYMBOL vmlinux 0x65400222	__irq_offset_value
+EXPORT_SYMBOL vmlinux 0x65408378	zlib_inflate_blob
+EXPORT_SYMBOL vmlinux 0x65414e67	dev_valid_name
+EXPORT_SYMBOL vmlinux 0x654d8ade	bioset_create
+EXPORT_SYMBOL vmlinux 0x65681333	remap_vmalloc_range
+EXPORT_SYMBOL vmlinux 0x65d0b939	blk_fetch_request
+EXPORT_SYMBOL vmlinux 0x65f4af5f	prepare_to_wait
+EXPORT_SYMBOL vmlinux 0x6612d8b7	bio_integrity_advance
+EXPORT_SYMBOL vmlinux 0x663fa52a	get_sb_ns
+EXPORT_SYMBOL vmlinux 0x66812f11	sock_common_recvmsg
+EXPORT_SYMBOL vmlinux 0x668da8d5	zlib_inflateIncomp
+EXPORT_SYMBOL vmlinux 0x66ba9076	__f_setown
+EXPORT_SYMBOL vmlinux 0x66c43044	vlan_dev_vlan_id
+EXPORT_SYMBOL vmlinux 0x66c6b5bb	xfrm_state_insert
+EXPORT_SYMBOL vmlinux 0x66c71e93	filemap_fault
+EXPORT_SYMBOL vmlinux 0x66cbf14b	pmac_xpram_write
+EXPORT_SYMBOL vmlinux 0x66f82b41	i2c_use_client
+EXPORT_SYMBOL vmlinux 0x66f8a040	pci_bus_add_devices
+EXPORT_SYMBOL vmlinux 0x67053080	current_kernel_time
+EXPORT_SYMBOL vmlinux 0x670aa275	write_inode_now
+EXPORT_SYMBOL vmlinux 0x671bf0a0	adb_client_list
+EXPORT_SYMBOL vmlinux 0x6740a293	security_inode_setsecctx
+EXPORT_SYMBOL vmlinux 0x6741f2c6	dm_table_get_size
+EXPORT_SYMBOL vmlinux 0x6764ec0a	of_get_property
+EXPORT_SYMBOL vmlinux 0x676e3291	down_write
+EXPORT_SYMBOL vmlinux 0x67728f39	writeback_inodes_sb_if_idle
+EXPORT_SYMBOL vmlinux 0x67a3a23c	security_path_symlink
+EXPORT_SYMBOL vmlinux 0x67b6cc6e	swiotlb_dma_mapping_error
+EXPORT_SYMBOL vmlinux 0x67d0ee5d	vfs_path_lookup
+EXPORT_SYMBOL vmlinux 0x67d1de20	tcp_v4_md5_do_add
+EXPORT_SYMBOL vmlinux 0x67d5f9e6	sock_get_timestampns
+EXPORT_SYMBOL vmlinux 0x67e046f6	tty_pair_get_pty
+EXPORT_SYMBOL vmlinux 0x681a3389	skb_store_bits
+EXPORT_SYMBOL vmlinux 0x68283761	sock_rfree
+EXPORT_SYMBOL vmlinux 0x685200f6	ethtool_op_get_flags
+EXPORT_SYMBOL vmlinux 0x685eb015	xfrm_policy_bysel_ctx
+EXPORT_SYMBOL vmlinux 0x68628e77	_write_lock_bh
+EXPORT_SYMBOL vmlinux 0x686989d7	inet_addr_type
+EXPORT_SYMBOL vmlinux 0x686f1050	kmap_high
+EXPORT_SYMBOL vmlinux 0x687ab217	skb_dequeue
+EXPORT_SYMBOL vmlinux 0x68e2db9e	dquot_initialize
+EXPORT_SYMBOL vmlinux 0x68e51eee	inode_needs_sync
+EXPORT_SYMBOL vmlinux 0x68f4405e	skb_dma_map
+EXPORT_SYMBOL vmlinux 0x68f617b9	pci_free_consistent
+EXPORT_SYMBOL vmlinux 0x6903c3f5	netdev_set_master
+EXPORT_SYMBOL vmlinux 0x694cb1eb	xfrm_state_lookup
+EXPORT_SYMBOL vmlinux 0x6953fd46	__blockdev_direct_IO
+EXPORT_SYMBOL vmlinux 0x695e1ed5	bio_get_nr_vecs
+EXPORT_SYMBOL vmlinux 0x69627ca0	inet_frag_kill
+EXPORT_SYMBOL vmlinux 0x6971447a	rtc_month_days
+EXPORT_SYMBOL vmlinux 0x6971c3df	__any_online_cpu
+EXPORT_SYMBOL vmlinux 0x6980fe91	param_get_int
+EXPORT_SYMBOL vmlinux 0x6989875b	add_wait_queue
+EXPORT_SYMBOL vmlinux 0x69927dff	try_acquire_console_sem
+EXPORT_SYMBOL vmlinux 0x69a09467	dst_alloc
+EXPORT_SYMBOL vmlinux 0x69a0ca7d	iowrite16be
+EXPORT_SYMBOL vmlinux 0x69af3dc9	blk_queue_dma_pad
+EXPORT_SYMBOL vmlinux 0x69b4208d	complete_and_exit
+EXPORT_SYMBOL vmlinux 0x69c3920b	lease_modify
+EXPORT_SYMBOL vmlinux 0x69c8c1d5	security_req_classify_flow
+EXPORT_SYMBOL vmlinux 0x69d38ed9	__scsi_print_sense
+EXPORT_SYMBOL vmlinux 0x69d68890	d_lookup
+EXPORT_SYMBOL vmlinux 0x69d7e5b8	__debugger_ipi
+EXPORT_SYMBOL vmlinux 0x69e27c7a	bitmap_copy_le
+EXPORT_SYMBOL vmlinux 0x69e2cbfa	matrox_millennium
+EXPORT_SYMBOL vmlinux 0x6a037cf1	mempool_kfree
+EXPORT_SYMBOL vmlinux 0x6a2ac703	inode_init_always
+EXPORT_SYMBOL vmlinux 0x6a4734f7	call_usermodehelper_setup
+EXPORT_SYMBOL vmlinux 0x6a47571d	__set_personality
+EXPORT_SYMBOL vmlinux 0x6a61f874	to_tm
+EXPORT_SYMBOL vmlinux 0x6a71e97f	pci_iounmap
+EXPORT_SYMBOL vmlinux 0x6a76f3ac	blk_iopoll_enable
+EXPORT_SYMBOL vmlinux 0x6aab3b95	nonseekable_open
+EXPORT_SYMBOL vmlinux 0x6abb01a8	bio_copy_kern
+EXPORT_SYMBOL vmlinux 0x6acb973d	iowrite32be
+EXPORT_SYMBOL vmlinux 0x6ad065f4	param_set_charp
+EXPORT_SYMBOL vmlinux 0x6ad8e7a7	f_setown
+EXPORT_SYMBOL vmlinux 0x6ae90b52	ethtool_op_get_sg
+EXPORT_SYMBOL vmlinux 0x6b0eece6	mark_info_dirty
+EXPORT_SYMBOL vmlinux 0x6b1b67d3	__bdevname
+EXPORT_SYMBOL vmlinux 0x6b231faf	mb_cache_entry_free
+EXPORT_SYMBOL vmlinux 0x6b2dc060	dump_stack
+EXPORT_SYMBOL vmlinux 0x6b3cfca6	idr_get_new
+EXPORT_SYMBOL vmlinux 0x6b493c6a	vfs_get_dqinfo
+EXPORT_SYMBOL vmlinux 0x6b588c9c	tcp_timewait_state_process
+EXPORT_SYMBOL vmlinux 0x6b64d718	unregister_netdevice
+EXPORT_SYMBOL vmlinux 0x6b8ad800	blk_unplug
+EXPORT_SYMBOL vmlinux 0x6ba590a3	phy_register_fixup_for_uid
+EXPORT_SYMBOL vmlinux 0x6bba6bad	bio_endio
+EXPORT_SYMBOL vmlinux 0x6bc3fbc0	__unregister_chrdev
+EXPORT_SYMBOL vmlinux 0x6bd41553	init_buffer
+EXPORT_SYMBOL vmlinux 0x6bdcfd99	qdisc_class_hash_remove
+EXPORT_SYMBOL vmlinux 0x6bea43bf	vfs_getattr
+EXPORT_SYMBOL vmlinux 0x6c0399af	blk_queue_find_tag
+EXPORT_SYMBOL vmlinux 0x6c1ce5ce	strcspn
+EXPORT_SYMBOL vmlinux 0x6c20d401	jbd2_journal_ack_err
+EXPORT_SYMBOL vmlinux 0x6c3b242e	sg_copy_to_buffer
+EXPORT_SYMBOL vmlinux 0x6c61ce70	num_registered_fb
+EXPORT_SYMBOL vmlinux 0x6c702af7	sysctl_udp_rmem_min
+EXPORT_SYMBOL vmlinux 0x6c79e9e0	fb_find_mode
+EXPORT_SYMBOL vmlinux 0x6c7ef640	__brelse
+EXPORT_SYMBOL vmlinux 0x6c9dd9ee	__xfrm_decode_session
+EXPORT_SYMBOL vmlinux 0x6ca1d1a4	atomic64_read
+EXPORT_SYMBOL vmlinux 0x6cb593d3	blk_queue_dma_alignment
+EXPORT_SYMBOL vmlinux 0x6cbfe63b	boot_tvec_bases
+EXPORT_SYMBOL vmlinux 0x6cc51797	open_bdev_exclusive
+EXPORT_SYMBOL vmlinux 0x6cd60023	of_gpio_simple_xlate
+EXPORT_SYMBOL vmlinux 0x6cd656e1	generic_cont_expand_simple
+EXPORT_SYMBOL vmlinux 0x6cdc5c6b	nla_strlcpy
+EXPORT_SYMBOL vmlinux 0x6cedce23	dquot_mark_dquot_dirty
+EXPORT_SYMBOL vmlinux 0x6d27ef64	__bitmap_empty
+EXPORT_SYMBOL vmlinux 0x6d288375	radix_tree_next_hole
+EXPORT_SYMBOL vmlinux 0x6d294e43	clock_t_to_jiffies
+EXPORT_SYMBOL vmlinux 0x6d40e606	elv_add_request
+EXPORT_SYMBOL vmlinux 0x6d46d7a4	elv_rb_latter_request
+EXPORT_SYMBOL vmlinux 0x6d5f0a80	pci_map_rom
+EXPORT_SYMBOL vmlinux 0x6d625f3b	rwsem_down_read_failed
+EXPORT_SYMBOL vmlinux 0x6d6cbadc	rb_last
+EXPORT_SYMBOL vmlinux 0x6da928f4	_insw_ns
+EXPORT_SYMBOL vmlinux 0x6dd9038c	disk_stack_limits
+EXPORT_SYMBOL vmlinux 0x6dda0b2a	blk_integrity_register
+EXPORT_SYMBOL vmlinux 0x6def2db2	half_md4_transform
+EXPORT_SYMBOL vmlinux 0x6dfa9c96	journal_start_commit
+EXPORT_SYMBOL vmlinux 0x6e0431ff	pci_enable_msix
+EXPORT_SYMBOL vmlinux 0x6e076a5b	vfs_quota_on_mount
+EXPORT_SYMBOL vmlinux 0x6e48d385	udp_proc_register
+EXPORT_SYMBOL vmlinux 0x6e522015	sg_init_one
+EXPORT_SYMBOL vmlinux 0x6e720ff2	rtnl_unlock
+EXPORT_SYMBOL vmlinux 0x6e9dd606	__symbol_put
+EXPORT_SYMBOL vmlinux 0x6ea4be70	del_timer
+EXPORT_SYMBOL vmlinux 0x6ea7191b	udp_ioctl
+EXPORT_SYMBOL vmlinux 0x6eafd983	mnt_pin
+EXPORT_SYMBOL vmlinux 0x6eb660c6	sk_stream_wait_memory
+EXPORT_SYMBOL vmlinux 0x6ed58836	unregister_con_driver
+EXPORT_SYMBOL vmlinux 0x6ef5a6a1	simple_transaction_release
+EXPORT_SYMBOL vmlinux 0x6f03e3d3	of_mm_gpiochip_add
+EXPORT_SYMBOL vmlinux 0x6f4a322e	dst_destroy
+EXPORT_SYMBOL vmlinux 0x6f4e5586	inet_csk_clear_xmit_timers
+EXPORT_SYMBOL vmlinux 0x6f58ee53	tcp_v4_send_check
+EXPORT_SYMBOL vmlinux 0x6f6a204a	sk_stream_write_space
+EXPORT_SYMBOL vmlinux 0x6f8c2e6a	bio_phys_segments
+EXPORT_SYMBOL vmlinux 0x6facd1cf	log_start_commit
+EXPORT_SYMBOL vmlinux 0x6fcb87a1	touch_softlockup_watchdog
+EXPORT_SYMBOL vmlinux 0x6fe11d9e	cdev_add
+EXPORT_SYMBOL vmlinux 0x6fff393f	time_to_tm
+EXPORT_SYMBOL vmlinux 0x7005b96e	jbd2_journal_invalidatepage
+EXPORT_SYMBOL vmlinux 0x700c24dd	inode_change_ok
+EXPORT_SYMBOL vmlinux 0x701d0ebd	snprintf
+EXPORT_SYMBOL vmlinux 0x7024c95e	vmap
+EXPORT_SYMBOL vmlinux 0x7029e72f	devm_free_irq
+EXPORT_SYMBOL vmlinux 0x70377942	locks_remove_posix
+EXPORT_SYMBOL vmlinux 0x70523a7a	__cond_resched_softirq
+EXPORT_SYMBOL vmlinux 0x7054a3e4	request_dma
+EXPORT_SYMBOL vmlinux 0x706f75d1	jbd2_journal_load
+EXPORT_SYMBOL vmlinux 0x70720a13	idr_init
+EXPORT_SYMBOL vmlinux 0x70bc17d7	inode_wait
+EXPORT_SYMBOL vmlinux 0x70cb430b	simple_readpage
+EXPORT_SYMBOL vmlinux 0x70d888b7	__debugger_fault_handler
+EXPORT_SYMBOL vmlinux 0x70f07e84	pci_find_device
+EXPORT_SYMBOL vmlinux 0x70f86c70	pmu_queue_request
+EXPORT_SYMBOL vmlinux 0x71298847	phy_disable_interrupts
+EXPORT_SYMBOL vmlinux 0x7129e5f8	hex_asc
+EXPORT_SYMBOL vmlinux 0x713055c1	pci_pme_capable
+EXPORT_SYMBOL vmlinux 0x713663c0	ps2_init
+EXPORT_SYMBOL vmlinux 0x716e1a7f	input_register_handle
+EXPORT_SYMBOL vmlinux 0x717242e7	rtas_data_buf_lock
+EXPORT_SYMBOL vmlinux 0x7187e33b	sock_no_listen
+EXPORT_SYMBOL vmlinux 0x719450d2	jbd2_journal_clear_err
+EXPORT_SYMBOL vmlinux 0x71a50dbc	register_blkdev
+EXPORT_SYMBOL vmlinux 0x71c8da94	set_irq_chip
+EXPORT_SYMBOL vmlinux 0x71c90087	memcmp
+EXPORT_SYMBOL vmlinux 0x71d15b04	simple_lookup
+EXPORT_SYMBOL vmlinux 0x71df697a	backlight_force_update
+EXPORT_SYMBOL vmlinux 0x7204abee	swiotlb_sync_sg_for_cpu
+EXPORT_SYMBOL vmlinux 0x721dd81a	security_path_rmdir
+EXPORT_SYMBOL vmlinux 0x721f70a6	dev_set_mtu
+EXPORT_SYMBOL vmlinux 0x725b905b	tcf_generic_walker
+EXPORT_SYMBOL vmlinux 0x726e10da	register_key_type
+EXPORT_SYMBOL vmlinux 0x7271bcaa	register_8022_client
+EXPORT_SYMBOL vmlinux 0x72b243d4	free_dma
+EXPORT_SYMBOL vmlinux 0x72c3be87	param_set_byte
+EXPORT_SYMBOL vmlinux 0x72c7350d	security_inode_readlink
+EXPORT_SYMBOL vmlinux 0x72e12eb3	tty_register_ldisc
+EXPORT_SYMBOL vmlinux 0x72ea7b2d	scsi_device_type
+EXPORT_SYMBOL vmlinux 0x72ec86f9	misc_register
+EXPORT_SYMBOL vmlinux 0x7301f5ce	freeze_bdev
+EXPORT_SYMBOL vmlinux 0x7307247d	default_llseek
+EXPORT_SYMBOL vmlinux 0x7329ea05	generic_file_buffered_write
+EXPORT_SYMBOL vmlinux 0x7346f9f4	skb_checksum
+EXPORT_SYMBOL vmlinux 0x73564277	__timecompare_update
+EXPORT_SYMBOL vmlinux 0x7362dd1e	vfs_fstat
+EXPORT_SYMBOL vmlinux 0x7362df1a	skb_add_rx_frag
+EXPORT_SYMBOL vmlinux 0x73816ea5	tty_port_tty_get
+EXPORT_SYMBOL vmlinux 0x7386ab06	call_usermodehelper_setcleanup
+EXPORT_SYMBOL vmlinux 0x7387c11c	__mutex_init
+EXPORT_SYMBOL vmlinux 0x73a89795	genl_register_ops
+EXPORT_SYMBOL vmlinux 0x73da1cca	inet_dgram_connect
+EXPORT_SYMBOL vmlinux 0x73dc948d	tcp_v4_syn_recv_sock
+EXPORT_SYMBOL vmlinux 0x73e20c1c	strlcpy
+EXPORT_SYMBOL vmlinux 0x73fd8579	hippi_neigh_setup_dev
+EXPORT_SYMBOL vmlinux 0x741793c0	tty_free_termios
+EXPORT_SYMBOL vmlinux 0x74362000	__register_chrdev
+EXPORT_SYMBOL vmlinux 0x744c0c68	param_get_byte
+EXPORT_SYMBOL vmlinux 0x74542c96	netif_device_detach
+EXPORT_SYMBOL vmlinux 0x74547d19	scsi_print_result
+EXPORT_SYMBOL vmlinux 0x746f69ca	alloc_etherdev_mq
+EXPORT_SYMBOL vmlinux 0x7485e15e	unregister_chrdev_region
+EXPORT_SYMBOL vmlinux 0x74954462	timecounter_read
+EXPORT_SYMBOL vmlinux 0x74bfc369	__tracepoint_kmem_cache_alloc
+EXPORT_SYMBOL vmlinux 0x74cc1cbe	unregister_cpu_notifier
+EXPORT_SYMBOL vmlinux 0x74d39568	read_dev_sector
+EXPORT_SYMBOL vmlinux 0x74e8366f	pcie_port_service_unregister
+EXPORT_SYMBOL vmlinux 0x74fe8730	sys_ctrler
+EXPORT_SYMBOL vmlinux 0x74ff0ad1	of_n_addr_cells
+EXPORT_SYMBOL vmlinux 0x7537ca47	inet_sk_rebuild_header
+EXPORT_SYMBOL vmlinux 0x753f65b8	tty_port_init
+EXPORT_SYMBOL vmlinux 0x75575627	scsi_report_bus_reset
+EXPORT_SYMBOL vmlinux 0x756dd160	start_thread
+EXPORT_SYMBOL vmlinux 0x75818a0e	bdev_read_only
+EXPORT_SYMBOL vmlinux 0x7581e368	sock_no_bind
+EXPORT_SYMBOL vmlinux 0x75905206	dev_set_allmulti
+EXPORT_SYMBOL vmlinux 0x75bdea12	iommu_area_alloc
+EXPORT_SYMBOL vmlinux 0x75d2a80b	remap_pfn_range
+EXPORT_SYMBOL vmlinux 0x75d66229	scsi_free_command
+EXPORT_SYMBOL vmlinux 0x75dc67a2	d_path
+EXPORT_SYMBOL vmlinux 0x75f84434	unregister_netdev
+EXPORT_SYMBOL vmlinux 0x76051606	qdisc_destroy
+EXPORT_SYMBOL vmlinux 0x760a0f4f	yield
+EXPORT_SYMBOL vmlinux 0x760b437a	unregister_inetaddr_notifier
+EXPORT_SYMBOL vmlinux 0x762d4ec2	generic_shutdown_super
+EXPORT_SYMBOL vmlinux 0x76543d29	kernel_sock_ioctl
+EXPORT_SYMBOL vmlinux 0x76bf656d	__bitmap_shift_left
+EXPORT_SYMBOL vmlinux 0x76cc9c93	bfifo_qdisc_ops
+EXPORT_SYMBOL vmlinux 0x76d39921	per_cpu__cpu_sibling_map
+EXPORT_SYMBOL vmlinux 0x76d3cd60	laptop_mode
+EXPORT_SYMBOL vmlinux 0x76e91775	pci_enable_device_mem
+EXPORT_SYMBOL vmlinux 0x76ee29ac	blk_queue_bounce
+EXPORT_SYMBOL vmlinux 0x771b22d4	wait_on_page_bit
+EXPORT_SYMBOL vmlinux 0x773a9c94	blk_iopoll_enabled
+EXPORT_SYMBOL vmlinux 0x777414f1	backlight_device_register
+EXPORT_SYMBOL vmlinux 0x779f6682	kernel_read
+EXPORT_SYMBOL vmlinux 0x77b851c4	cacheable_memzero
+EXPORT_SYMBOL vmlinux 0x77cfcfde	__tracepoint_kmalloc_node
+EXPORT_SYMBOL vmlinux 0x77eae931	elv_rb_find
+EXPORT_SYMBOL vmlinux 0x77ecac9f	zlib_inflateEnd
+EXPORT_SYMBOL vmlinux 0x77ed9b13	ilookup5
+EXPORT_SYMBOL vmlinux 0x77fa5d1f	ns_to_timespec
+EXPORT_SYMBOL vmlinux 0x7817d9bd	scsi_scan_host
+EXPORT_SYMBOL vmlinux 0x7854e35f	vfs_quota_off
+EXPORT_SYMBOL vmlinux 0x78642580	dev_open
+EXPORT_SYMBOL vmlinux 0x7885647c	send_sig
+EXPORT_SYMBOL vmlinux 0x788d0631	do_sync_write
+EXPORT_SYMBOL vmlinux 0x788fe103	iomem_resource
+EXPORT_SYMBOL vmlinux 0x78c85c42	iw_handler_get_spy
+EXPORT_SYMBOL vmlinux 0x78df4e3d	vfs_llseek
+EXPORT_SYMBOL vmlinux 0x78df6bd7	no_pci_devices
+EXPORT_SYMBOL vmlinux 0x790962de	dquot_scan_active
+EXPORT_SYMBOL vmlinux 0x791364ab	kmem_cache_destroy
+EXPORT_SYMBOL vmlinux 0x7913adac	__percpu_counter_add
+EXPORT_SYMBOL vmlinux 0x79176c46	generic_readlink
+EXPORT_SYMBOL vmlinux 0x791a49a8	add_to_page_cache_locked
+EXPORT_SYMBOL vmlinux 0x796fc5ce	scsi_get_sense_info_fld
+EXPORT_SYMBOL vmlinux 0x798c704a	neigh_connected_output
+EXPORT_SYMBOL vmlinux 0x79a41dc5	linkwatch_fire_event
+EXPORT_SYMBOL vmlinux 0x79aa04a2	get_random_bytes
+EXPORT_SYMBOL vmlinux 0x79ad224b	tasklet_kill
+EXPORT_SYMBOL vmlinux 0x79c06d90	dentry_unhash
+EXPORT_SYMBOL vmlinux 0x7a2a837d	strict_strtol
+EXPORT_SYMBOL vmlinux 0x7a4497db	kzfree
+EXPORT_SYMBOL vmlinux 0x7a552670	seq_printf
+EXPORT_SYMBOL vmlinux 0x7a697128	kernel_accept
+EXPORT_SYMBOL vmlinux 0x7a70a33c	ide_dump_status
+EXPORT_SYMBOL vmlinux 0x7a8fa754	unregister_key_type
+EXPORT_SYMBOL vmlinux 0x7a94bd20	lro_receive_skb
+EXPORT_SYMBOL vmlinux 0x7aa24e03	skb_queue_head
+EXPORT_SYMBOL vmlinux 0x7aaaf907	inet_add_protocol
+EXPORT_SYMBOL vmlinux 0x7aad0881	scsi_test_unit_ready
+EXPORT_SYMBOL vmlinux 0x7ac6af7c	generic_file_splice_read
+EXPORT_SYMBOL vmlinux 0x7ac74fc9	scsi_register_driver
+EXPORT_SYMBOL vmlinux 0x7ae318d9	elv_rb_del
+EXPORT_SYMBOL vmlinux 0x7afab083	pci_request_regions
+EXPORT_SYMBOL vmlinux 0x7bb7d1f1	journal_get_write_access
+EXPORT_SYMBOL vmlinux 0x7be4827c	pci_dram_offset
+EXPORT_SYMBOL vmlinux 0x7be82abb	sync_blockdev
+EXPORT_SYMBOL vmlinux 0x7c0a211c	of_device_register
+EXPORT_SYMBOL vmlinux 0x7c175e55	of_match_node
+EXPORT_SYMBOL vmlinux 0x7c3a00d1	udp_proc_unregister
+EXPORT_SYMBOL vmlinux 0x7c46233a	cpufreq_quick_get
+EXPORT_SYMBOL vmlinux 0x7c4b1270	skb_copy_and_csum_datagram_iovec
+EXPORT_SYMBOL vmlinux 0x7c60d66e	getname
+EXPORT_SYMBOL vmlinux 0x7c79d28e	ide_proc_unregister_driver
+EXPORT_SYMBOL vmlinux 0x7c904ded	unregister_module_notifier
+EXPORT_SYMBOL vmlinux 0x7c9291d1	csum_partial_copy_generic
+EXPORT_SYMBOL vmlinux 0x7ca2ee32	single_open
+EXPORT_SYMBOL vmlinux 0x7ca341af	kernel_thread
+EXPORT_SYMBOL vmlinux 0x7cb1ae69	cpu_down
+EXPORT_SYMBOL vmlinux 0x7ce12687	macio_release_resources
+EXPORT_SYMBOL vmlinux 0x7ce4a153	try_wait_for_completion
+EXPORT_SYMBOL vmlinux 0x7ce997e2	bio_clone
+EXPORT_SYMBOL vmlinux 0x7cf7fba6	module_layout
+EXPORT_SYMBOL vmlinux 0x7d0e7e67	__sk_dst_check
+EXPORT_SYMBOL vmlinux 0x7d101267	xfrm_find_acq
+EXPORT_SYMBOL vmlinux 0x7d11c268	jiffies
+EXPORT_SYMBOL vmlinux 0x7d1bf017	dm_table_get
+EXPORT_SYMBOL vmlinux 0x7d40580f	bdev_stack_limits
+EXPORT_SYMBOL vmlinux 0x7d5991a8	rtnl_set_sk_err
+EXPORT_SYMBOL vmlinux 0x7d6d756c	nf_ct_attach
+EXPORT_SYMBOL vmlinux 0x7dceceac	capable
+EXPORT_SYMBOL vmlinux 0x7de5eafe	up_read
+EXPORT_SYMBOL vmlinux 0x7e00d2a4	pcibios_bus_to_resource
+EXPORT_SYMBOL vmlinux 0x7e38138c	sk_release_kernel
+EXPORT_SYMBOL vmlinux 0x7e613127	interruptible_sleep_on
+EXPORT_SYMBOL vmlinux 0x7e7aa835	do_munmap
+EXPORT_SYMBOL vmlinux 0x7e81440a	generic_file_open
+EXPORT_SYMBOL vmlinux 0x7e88255b	__lookup_one_len
+EXPORT_SYMBOL vmlinux 0x7e9abcec	tcp_create_openreq_child
+EXPORT_SYMBOL vmlinux 0x7f1db95b	mpage_writepages
+EXPORT_SYMBOL vmlinux 0x7f24de73	jiffies_to_usecs
+EXPORT_SYMBOL vmlinux 0x7f289480	splice_from_pipe_end
+EXPORT_SYMBOL vmlinux 0x7f407484	ip_route_input
+EXPORT_SYMBOL vmlinux 0x7f8e6953	security_task_getsecid
+EXPORT_SYMBOL vmlinux 0x7f8f8b76	completion_done
+EXPORT_SYMBOL vmlinux 0x7fc3ed5a	generic_setlease
+EXPORT_SYMBOL vmlinux 0x7fd1ac5e	__put_cred
+EXPORT_SYMBOL vmlinux 0x7ff2cace	sock_sendmsg
+EXPORT_SYMBOL vmlinux 0x801dda30	rtnl_create_link
+EXPORT_SYMBOL vmlinux 0x801f5a3f	__strncpy_from_user
+EXPORT_SYMBOL vmlinux 0x80428c80	__wait_on_bit_lock
+EXPORT_SYMBOL vmlinux 0x80443c07	init_file
+EXPORT_SYMBOL vmlinux 0x8063f83d	radix_tree_gang_lookup
+EXPORT_SYMBOL vmlinux 0x806bd978	eth_type_trans
+EXPORT_SYMBOL vmlinux 0x807e9c88	pci_bus_alloc_resource
+EXPORT_SYMBOL vmlinux 0x8085be84	qdisc_tree_decrease_qlen
+EXPORT_SYMBOL vmlinux 0x80a8794b	filemap_write_and_wait
+EXPORT_SYMBOL vmlinux 0x80ab2137	pci_bus_read_config_dword
+EXPORT_SYMBOL vmlinux 0x80b00c49	llc_mac_hdr_init
+EXPORT_SYMBOL vmlinux 0x81403a55	dcache_readdir
+EXPORT_SYMBOL vmlinux 0x815b5dd4	match_octal
+EXPORT_SYMBOL vmlinux 0x81658d23	__bio_clone
+EXPORT_SYMBOL vmlinux 0x81799cee	vscnprintf
+EXPORT_SYMBOL vmlinux 0x81a03f27	inet_bind
+EXPORT_SYMBOL vmlinux 0x81c0a84f	rtas_set_indicator
+EXPORT_SYMBOL vmlinux 0x81c18c24	page_symlink
+EXPORT_SYMBOL vmlinux 0x81eebc39	ide_proc_register_driver
+EXPORT_SYMBOL vmlinux 0x81fbb612	__cond_resched_lock
+EXPORT_SYMBOL vmlinux 0x820d225f	print_mac
+EXPORT_SYMBOL vmlinux 0x820d2bcc	textsearch_find_continuous
+EXPORT_SYMBOL vmlinux 0x8210aa9a	xfrm_state_lookup_byaddr
+EXPORT_SYMBOL vmlinux 0x8238332c	neigh_ifdown
+EXPORT_SYMBOL vmlinux 0x8241f44f	napi_complete
+EXPORT_SYMBOL vmlinux 0x8251bcc3	bitmap_release_region
+EXPORT_SYMBOL vmlinux 0x82629870	ida_init
+EXPORT_SYMBOL vmlinux 0x826862f3	bdget
+EXPORT_SYMBOL vmlinux 0x82692209	kref_set
+EXPORT_SYMBOL vmlinux 0x829010cf	contig_page_data
+EXPORT_SYMBOL vmlinux 0x82acfb70	blk_iopoll_sched
+EXPORT_SYMBOL vmlinux 0x82c22eff	pci_setup_cardbus
+EXPORT_SYMBOL vmlinux 0x82d2cf0f	vfs_symlink
+EXPORT_SYMBOL vmlinux 0x82d3a400	dm_table_put
+EXPORT_SYMBOL vmlinux 0x82d8900d	arp_xmit
+EXPORT_SYMBOL vmlinux 0x82e5a238	vm_get_page_prot
+EXPORT_SYMBOL vmlinux 0x8301e3e9	vfs_dq_quota_on_remount
+EXPORT_SYMBOL vmlinux 0x83119b10	tcp_v4_destroy_sock
+EXPORT_SYMBOL vmlinux 0x8376870d	of_find_device_by_phandle
+EXPORT_SYMBOL vmlinux 0x83941a17	put_io_context
+EXPORT_SYMBOL vmlinux 0x83a476ce	bitmap_scnlistprintf
+EXPORT_SYMBOL vmlinux 0x83b7204b	sock_no_shutdown
+EXPORT_SYMBOL vmlinux 0x83bbed6a	sock_no_ioctl
+EXPORT_SYMBOL vmlinux 0x83c43dc1	posix_acl_chmod_masq
+EXPORT_SYMBOL vmlinux 0x83d84477	ps2_sendbyte
+EXPORT_SYMBOL vmlinux 0x84265983	kset_register
+EXPORT_SYMBOL vmlinux 0x843185f7	__set_page_dirty_buffers
+EXPORT_SYMBOL vmlinux 0x844404cf	ISA_DMA_THRESHOLD
+EXPORT_SYMBOL vmlinux 0x8447b53a	i2c_add_adapter
+EXPORT_SYMBOL vmlinux 0x84aec95c	mutex_lock_killable
+EXPORT_SYMBOL vmlinux 0x84b183ae	strncmp
+EXPORT_SYMBOL vmlinux 0x84cef4ff	unlock_rename
+EXPORT_SYMBOL vmlinux 0x84e7a53e	register_quota_format
+EXPORT_SYMBOL vmlinux 0x85261203	find_inode_number
+EXPORT_SYMBOL vmlinux 0x8533bfe1	of_dev_put
+EXPORT_SYMBOL vmlinux 0x8534b7f8	generic_getxattr
+EXPORT_SYMBOL vmlinux 0x8540b5be	sleep_on
+EXPORT_SYMBOL vmlinux 0x8541bccc	intercept_table
+EXPORT_SYMBOL vmlinux 0x85459dee	input_set_keycode
+EXPORT_SYMBOL vmlinux 0x85670f1d	rtnl_is_locked
+EXPORT_SYMBOL vmlinux 0x85ac7f10	posix_acl_from_xattr
+EXPORT_SYMBOL vmlinux 0x85df4b26	fddi_change_mtu
+EXPORT_SYMBOL vmlinux 0x85df9b6c	strsep
+EXPORT_SYMBOL vmlinux 0x85e08f65	bio_uncopy_user
+EXPORT_SYMBOL vmlinux 0x85e7deb2	iov_iter_fault_in_readable
+EXPORT_SYMBOL vmlinux 0x85ec683e	neigh_seq_start
+EXPORT_SYMBOL vmlinux 0x85f6db29	blk_complete_request
+EXPORT_SYMBOL vmlinux 0x85f853be	inode_get_bytes
+EXPORT_SYMBOL vmlinux 0x8624cdd7	dm_table_get_mode
+EXPORT_SYMBOL vmlinux 0x8641607b	blk_execute_rq
+EXPORT_SYMBOL vmlinux 0x86419373	nf_reinject
+EXPORT_SYMBOL vmlinux 0x864b7c40	__scm_send
+EXPORT_SYMBOL vmlinux 0x864ec4d8	journal_init_inode
+EXPORT_SYMBOL vmlinux 0x865a8e45	sock_tx_timestamp
+EXPORT_SYMBOL vmlinux 0x8664f62e	cpufreq_update_policy
+EXPORT_SYMBOL vmlinux 0x868acba5	get_options
+EXPORT_SYMBOL vmlinux 0x86b63f87	skb_find_text
+EXPORT_SYMBOL vmlinux 0x86b9cae3	i2c_bit_add_bus
+EXPORT_SYMBOL vmlinux 0x86c81a43	down_trylock
+EXPORT_SYMBOL vmlinux 0x86db1cbb	rtas_flash_term_hook
+EXPORT_SYMBOL vmlinux 0x86fb9b05	bitmap_parse_user
+EXPORT_SYMBOL vmlinux 0x870a4604	phy_ethtool_sset
+EXPORT_SYMBOL vmlinux 0x870e2347	soft_cursor
+EXPORT_SYMBOL vmlinux 0x87166fb3	pci_remove_bus_device
+EXPORT_SYMBOL vmlinux 0x871c0a7e	fiemap_check_flags
+EXPORT_SYMBOL vmlinux 0x872baffe	blk_queue_logical_block_size
+EXPORT_SYMBOL vmlinux 0x8736aced	matroxfb_wait_for_sync
+EXPORT_SYMBOL vmlinux 0x87385a06	i2c_del_driver
+EXPORT_SYMBOL vmlinux 0x875f65d1	of_find_compatible_node
+EXPORT_SYMBOL vmlinux 0x878ab3ce	sysctl_tcp_adv_win_scale
+EXPORT_SYMBOL vmlinux 0x87b9f230	clocksource_change_rating
+EXPORT_SYMBOL vmlinux 0x87c733f7	inet_frags_fini
+EXPORT_SYMBOL vmlinux 0x87e9b210	input_filter_device
+EXPORT_SYMBOL vmlinux 0x87ea802d	seq_write
+EXPORT_SYMBOL vmlinux 0x87eaa4a3	skb_dequeue_tail
+EXPORT_SYMBOL vmlinux 0x8800abad	dma_pool_destroy
+EXPORT_SYMBOL vmlinux 0x881039d0	zlib_inflate
+EXPORT_SYMBOL vmlinux 0x8835ec1f	get_super
+EXPORT_SYMBOL vmlinux 0x886aa274	posix_acl_create_masq
+EXPORT_SYMBOL vmlinux 0x8896698b	swiotlb_unmap_sg
+EXPORT_SYMBOL vmlinux 0x889e203e	fbcon_set_bitops
+EXPORT_SYMBOL vmlinux 0x889ee33c	____pagevec_lru_add
+EXPORT_SYMBOL vmlinux 0x88a5e8d6	ip_defrag
+EXPORT_SYMBOL vmlinux 0x88c815f3	security_inode_notifysecctx
+EXPORT_SYMBOL vmlinux 0x88eeeb8f	sysctl_jiffies
+EXPORT_SYMBOL vmlinux 0x88f0d172	path_lookup
+EXPORT_SYMBOL vmlinux 0x88f2d5a2	mac_find_mode
+EXPORT_SYMBOL vmlinux 0x897473df	mktime
+EXPORT_SYMBOL vmlinux 0x89795e84	tty_vhangup
+EXPORT_SYMBOL vmlinux 0x898ad0a5	generic_ro_fops
+EXPORT_SYMBOL vmlinux 0x89a696e2	__invalidate_device
+EXPORT_SYMBOL vmlinux 0x89b3107b	isa_mem_base
+EXPORT_SYMBOL vmlinux 0x89b425da	d_add_ci
+EXPORT_SYMBOL vmlinux 0x89bd0fe3	fddi_type_trans
+EXPORT_SYMBOL vmlinux 0x89c66e79	skb_copy_bits
+EXPORT_SYMBOL vmlinux 0x89d23bad	dma_direct_ops
+EXPORT_SYMBOL vmlinux 0x89d5538d	fb_pad_aligned_buffer
+EXPORT_SYMBOL vmlinux 0x89d66811	build_ehash_secret
+EXPORT_SYMBOL vmlinux 0x89fc8ccd	mapping_tagged
+EXPORT_SYMBOL vmlinux 0x8a1203a9	kref_get
+EXPORT_SYMBOL vmlinux 0x8a12d69e	scsi_put_command
+EXPORT_SYMBOL vmlinux 0x8a1f0348	km_report
+EXPORT_SYMBOL vmlinux 0x8a373fd7	twl4030_i2c_write
+EXPORT_SYMBOL vmlinux 0x8a56f334	blk_dump_rq_flags
+EXPORT_SYMBOL vmlinux 0x8a5bc8ba	llc_sap_close
+EXPORT_SYMBOL vmlinux 0x8a5ffabb	devm_ioremap_nocache
+EXPORT_SYMBOL vmlinux 0x8a64809d	ip_queue_xmit
+EXPORT_SYMBOL vmlinux 0x8a6f4d4e	dm_kcopyd_client_destroy
+EXPORT_SYMBOL vmlinux 0x8a7d1c31	high_memory
+EXPORT_SYMBOL vmlinux 0x8a86004b	scsi_allocate_command
+EXPORT_SYMBOL vmlinux 0x8a87be6c	of_find_device_by_node
+EXPORT_SYMBOL vmlinux 0x8a99a016	mempool_free_slab
+EXPORT_SYMBOL vmlinux 0x8ab4079e	atomic64_add
+EXPORT_SYMBOL vmlinux 0x8ab67453	netdev_class_create_file
+EXPORT_SYMBOL vmlinux 0x8ac40297	iommu_area_free
+EXPORT_SYMBOL vmlinux 0x8ad382a1	key_payload_reserve
+EXPORT_SYMBOL vmlinux 0x8ade6342	validate_sp
+EXPORT_SYMBOL vmlinux 0x8afb3346	pcie_set_readrq
+EXPORT_SYMBOL vmlinux 0x8b09dc9c	inet_ioctl
+EXPORT_SYMBOL vmlinux 0x8b1a7a66	pcie_aspm_enabled
+EXPORT_SYMBOL vmlinux 0x8b3e9faa	sock_release
+EXPORT_SYMBOL vmlinux 0x8b654f82	xfrm4_rcv_encap
+EXPORT_SYMBOL vmlinux 0x8bb1fa47	blk_queue_segment_boundary
+EXPORT_SYMBOL vmlinux 0x8bcc3a3a	_spin_lock_bh
+EXPORT_SYMBOL vmlinux 0x8bd313b8	__tracepoint_kfree
+EXPORT_SYMBOL vmlinux 0x8bd5b603	param_get_long
+EXPORT_SYMBOL vmlinux 0x8bdba5f5	find_get_pages_tag
+EXPORT_SYMBOL vmlinux 0x8bdcd805	call_usermodehelper_exec
+EXPORT_SYMBOL vmlinux 0x8c183cbe	iowrite16
+EXPORT_SYMBOL vmlinux 0x8c432e93	nf_register_sockopt
+EXPORT_SYMBOL vmlinux 0x8c537c45	posix_acl_from_mode
+EXPORT_SYMBOL vmlinux 0x8c9304af	sync_inode
+EXPORT_SYMBOL vmlinux 0x8c9419eb	of_find_property
+EXPORT_SYMBOL vmlinux 0x8c994304	blk_queue_start_tag
+EXPORT_SYMBOL vmlinux 0x8c9e006f	wireless_send_event
+EXPORT_SYMBOL vmlinux 0x8cad76ee	filemap_write_and_wait_range
+EXPORT_SYMBOL vmlinux 0x8cc79cab	iowrite16_rep
+EXPORT_SYMBOL vmlinux 0x8d17140e	matroxfb_vgaHWrestore
+EXPORT_SYMBOL vmlinux 0x8d1d7727	page_zero_new_buffers
+EXPORT_SYMBOL vmlinux 0x8d2447bd	pci_select_bars
+EXPORT_SYMBOL vmlinux 0x8d3894f2	_ctype
+EXPORT_SYMBOL vmlinux 0x8d551bef	sysctl_tcp_rmem
+EXPORT_SYMBOL vmlinux 0x8d6ef862	sleep_on_timeout
+EXPORT_SYMBOL vmlinux 0x8d826097	alloc_hippi_dev
+EXPORT_SYMBOL vmlinux 0x8d864bfa	dquot_commit_info
+EXPORT_SYMBOL vmlinux 0x8d8bdd52	pci_fixup_cardbus
+EXPORT_SYMBOL vmlinux 0x8dbe09ad	of_register_driver
+EXPORT_SYMBOL vmlinux 0x8dc15d40	free_buffer_head
+EXPORT_SYMBOL vmlinux 0x8df5da63	memstart_addr
+EXPORT_SYMBOL vmlinux 0x8e05fd2d	d_prune_aliases
+EXPORT_SYMBOL vmlinux 0x8e0b7743	ipv6_ext_hdr
+EXPORT_SYMBOL vmlinux 0x8e0db8c5	dev_disable_lro
+EXPORT_SYMBOL vmlinux 0x8e11d980	set_page_dirty_lock
+EXPORT_SYMBOL vmlinux 0x8e2f914f	pci_set_master
+EXPORT_SYMBOL vmlinux 0x8e3c9cc3	vprintk
+EXPORT_SYMBOL vmlinux 0x8e3f4b53	vga_client_register
+EXPORT_SYMBOL vmlinux 0x8e763ae1	send_remote_softirq
+EXPORT_SYMBOL vmlinux 0x8ed2511c	__alloc_pages_nodemask
+EXPORT_SYMBOL vmlinux 0x8edb6f51	release_sock
+EXPORT_SYMBOL vmlinux 0x8ee69235	timeval_to_jiffies
+EXPORT_SYMBOL vmlinux 0x8f1fec7e	dev_unicast_delete
+EXPORT_SYMBOL vmlinux 0x8f394c09	neigh_sysctl_unregister
+EXPORT_SYMBOL vmlinux 0x8f48679a	rb_prev
+EXPORT_SYMBOL vmlinux 0x8f5d3369	journal_get_create_access
+EXPORT_SYMBOL vmlinux 0x8f6b7950	set_irq_data
+EXPORT_SYMBOL vmlinux 0x8f7523e3	idr_destroy
+EXPORT_SYMBOL vmlinux 0x8f8ad945	netpoll_print_options
+EXPORT_SYMBOL vmlinux 0x8fbf37e0	profile_pc
+EXPORT_SYMBOL vmlinux 0x8fcca2e0	kblockd_schedule_work
+EXPORT_SYMBOL vmlinux 0x8fd8b7bc	_write_lock_irq
+EXPORT_SYMBOL vmlinux 0x8ffdb3b8	crc16
+EXPORT_SYMBOL vmlinux 0x90035333	secure_tcpv6_sequence_number
+EXPORT_SYMBOL vmlinux 0x900b101c	ioctl_by_bdev
+EXPORT_SYMBOL vmlinux 0x90230e9c	dev_set_mac_address
+EXPORT_SYMBOL vmlinux 0x9029f6e6	tcf_hash_release
+EXPORT_SYMBOL vmlinux 0x90501868	transfer_to_handler
+EXPORT_SYMBOL vmlinux 0x905c6b85	ethtool_op_get_tx_csum
+EXPORT_SYMBOL vmlinux 0x9084b2f2	redraw_screen
+EXPORT_SYMBOL vmlinux 0x90aec66e	phy_start
+EXPORT_SYMBOL vmlinux 0x90e45f8d	cdrom_get_media_event
+EXPORT_SYMBOL vmlinux 0x91009452	schedule_delayed_work
+EXPORT_SYMBOL vmlinux 0x9101fdc0	sk_stream_wait_close
+EXPORT_SYMBOL vmlinux 0x9114cb20	prepare_creds
+EXPORT_SYMBOL vmlinux 0x91172a29	start_tty
+EXPORT_SYMBOL vmlinux 0x912557ce	rtas_busy_delay
+EXPORT_SYMBOL vmlinux 0x91319ced	nla_put_nohdr
+EXPORT_SYMBOL vmlinux 0x913b8ffa	xfrm_input
+EXPORT_SYMBOL vmlinux 0x91481982	__ratelimit
+EXPORT_SYMBOL vmlinux 0x9158b795	da903x_query_status
+EXPORT_SYMBOL vmlinux 0x915e1208	tb_ticks_per_usec
+EXPORT_SYMBOL vmlinux 0x9168c033	rtas_get_sensor
+EXPORT_SYMBOL vmlinux 0x916ad840	genphy_config_advert
+EXPORT_SYMBOL vmlinux 0x91766c09	param_get_ulong
+EXPORT_SYMBOL vmlinux 0x9193d673	open_by_devnum
+EXPORT_SYMBOL vmlinux 0x919d1163	tty_termios_baud_rate
+EXPORT_SYMBOL vmlinux 0x91b994b1	fasync_helper
+EXPORT_SYMBOL vmlinux 0x91d88e48	__debugger_dabr_match
+EXPORT_SYMBOL vmlinux 0x9214ed8a	param_get_bool
+EXPORT_SYMBOL vmlinux 0x9216be6f	lock_fb_info
+EXPORT_SYMBOL vmlinux 0x92648812	xfrm_prepare_input
+EXPORT_SYMBOL vmlinux 0x9296c93d	udp_table
+EXPORT_SYMBOL vmlinux 0x92b7fe17	gnet_stats_start_copy_compat
+EXPORT_SYMBOL vmlinux 0x92bd74a0	keyring_clear
+EXPORT_SYMBOL vmlinux 0x92be2835	phy_start_interrupts
+EXPORT_SYMBOL vmlinux 0x92d4acba	invalidate_inode_buffers
+EXPORT_SYMBOL vmlinux 0x92eaa4d9	posix_lock_file
+EXPORT_SYMBOL vmlinux 0x9305f8e6	cpufreq_get
+EXPORT_SYMBOL vmlinux 0x9309de94	cuda_request
+EXPORT_SYMBOL vmlinux 0x931d2521	mempool_resize
+EXPORT_SYMBOL vmlinux 0x934a584b	skb_append_datato_frags
+EXPORT_SYMBOL vmlinux 0x9377fdef	del_gendisk
+EXPORT_SYMBOL vmlinux 0x938e02de	skb_copy_datagram_from_iovec
+EXPORT_SYMBOL vmlinux 0x93a6e0b2	io_schedule
+EXPORT_SYMBOL vmlinux 0x93a7bd51	vfs_quota_on
+EXPORT_SYMBOL vmlinux 0x93d8bcbd	lro_flush_all
+EXPORT_SYMBOL vmlinux 0x93d91dce	idr_remove
+EXPORT_SYMBOL vmlinux 0x93fca811	__get_free_pages
+EXPORT_SYMBOL vmlinux 0x94062976	mdiobus_read
+EXPORT_SYMBOL vmlinux 0x9435ee40	bh_submit_read
+EXPORT_SYMBOL vmlinux 0x94813812	simple_unlink
+EXPORT_SYMBOL vmlinux 0x9484572d	cfb_imageblit
+EXPORT_SYMBOL vmlinux 0x94847b23	nf_ct_destroy
+EXPORT_SYMBOL vmlinux 0x948d72dd	generic_make_request
+EXPORT_SYMBOL vmlinux 0x94961283	vunmap
+EXPORT_SYMBOL vmlinux 0x949be0b7	set_anon_super
+EXPORT_SYMBOL vmlinux 0x94bff3fc	generic_file_direct_write
+EXPORT_SYMBOL vmlinux 0x94c102a1	devm_request_threaded_irq
+EXPORT_SYMBOL vmlinux 0x94cd2db0	percpu_counter_destroy
+EXPORT_SYMBOL vmlinux 0x94d50ab1	destroy_EII_client
+EXPORT_SYMBOL vmlinux 0x9514151a	_mcount
+EXPORT_SYMBOL vmlinux 0x9524b0ae	_outsb
+EXPORT_SYMBOL vmlinux 0x952e843b	machine_is_compatible
+EXPORT_SYMBOL vmlinux 0x954488a4	syncookie_secret
+EXPORT_SYMBOL vmlinux 0x954cbb26	vsprintf
+EXPORT_SYMBOL vmlinux 0x957c1080	ide_do_reset
+EXPORT_SYMBOL vmlinux 0x95944a86	__skb_recv_datagram
+EXPORT_SYMBOL vmlinux 0x95d0067e	bd_release
+EXPORT_SYMBOL vmlinux 0x9609cc54	kobject_add
+EXPORT_SYMBOL vmlinux 0x96306d03	tcp_v4_connect
+EXPORT_SYMBOL vmlinux 0x964c7518	skb_abort_seq_read
+EXPORT_SYMBOL vmlinux 0x964ecdae	bd_claim
+EXPORT_SYMBOL vmlinux 0x96546f7c	pci_get_device
+EXPORT_SYMBOL vmlinux 0x966cc2e4	__mark_inode_dirty
+EXPORT_SYMBOL vmlinux 0x96898769	sysfs_format_mac
+EXPORT_SYMBOL vmlinux 0x96cd2b04	scsi_sense_key_string
+EXPORT_SYMBOL vmlinux 0x96d56018	percpu_counter_set
+EXPORT_SYMBOL vmlinux 0x96fc851f	phy_connect_direct
+EXPORT_SYMBOL vmlinux 0x970111f7	pci_dev_driver
+EXPORT_SYMBOL vmlinux 0x97255bdf	strlen
+EXPORT_SYMBOL vmlinux 0x97325676	giveup_altivec
+EXPORT_SYMBOL vmlinux 0x9743020d	vfs_fsync_range
+EXPORT_SYMBOL vmlinux 0x9748927f	_outsw_ns
+EXPORT_SYMBOL vmlinux 0x9754ec10	radix_tree_preload
+EXPORT_SYMBOL vmlinux 0x97a17eb3	pci_prepare_to_sleep
+EXPORT_SYMBOL vmlinux 0x97a56046	i2c_smbus_read_block_data
+EXPORT_SYMBOL vmlinux 0x97c57510	unregister_nls
+EXPORT_SYMBOL vmlinux 0x97cf36b7	mpage_writepage
+EXPORT_SYMBOL vmlinux 0x97dcfd9c	nf_getsockopt
+EXPORT_SYMBOL vmlinux 0x97f4d0a2	jbd2_journal_set_triggers
+EXPORT_SYMBOL vmlinux 0x97f5c210	sg_miter_next
+EXPORT_SYMBOL vmlinux 0x98075aa8	__starget_for_each_device
+EXPORT_SYMBOL vmlinux 0x98091572	do_splice_from
+EXPORT_SYMBOL vmlinux 0x984b2402	tcp_sockets_allocated
+EXPORT_SYMBOL vmlinux 0x9856cc5d	swiotlb_alloc_coherent
+EXPORT_SYMBOL vmlinux 0x985a5836	journal_unlock_updates
+EXPORT_SYMBOL vmlinux 0x9866cfcc	clear_bdi_congested
+EXPORT_SYMBOL vmlinux 0x986e6135	fb_pad_unaligned_buffer
+EXPORT_SYMBOL vmlinux 0x98748d29	key_link
+EXPORT_SYMBOL vmlinux 0x988584b1	tcp_prot
+EXPORT_SYMBOL vmlinux 0x9888f927	blkdev_issue_discard
+EXPORT_SYMBOL vmlinux 0x989d4082	_write_trylock
+EXPORT_SYMBOL vmlinux 0x98a27876	commit_creds
+EXPORT_SYMBOL vmlinux 0x98aa6885	dput
+EXPORT_SYMBOL vmlinux 0x98c19f9e	clocksource_unregister
+EXPORT_SYMBOL vmlinux 0x98c4c6f9	tcp4_gro_receive
+EXPORT_SYMBOL vmlinux 0x98caa06e	invalidate_mapping_pages
+EXPORT_SYMBOL vmlinux 0x98ec45dc	slow_work_cancel
+EXPORT_SYMBOL vmlinux 0x98ec55eb	register_console
+EXPORT_SYMBOL vmlinux 0x98fe7882	DMA_MODE_READ
+EXPORT_SYMBOL vmlinux 0x99039661	phy_enable_interrupts
+EXPORT_SYMBOL vmlinux 0x991f1cc6	ip_route_me_harder
+EXPORT_SYMBOL vmlinux 0x99214174	dquot_alloc
+EXPORT_SYMBOL vmlinux 0x9939171c	request_key
+EXPORT_SYMBOL vmlinux 0x9978da20	mark_page_accessed
+EXPORT_SYMBOL vmlinux 0x997dbf74	simple_sync_file
+EXPORT_SYMBOL vmlinux 0x9990fbd7	__scsi_iterate_devices
+EXPORT_SYMBOL vmlinux 0x9994c0ca	ps2_is_keyboard_id
+EXPORT_SYMBOL vmlinux 0x999705f4	d_instantiate
+EXPORT_SYMBOL vmlinux 0x999e8297	vfree
+EXPORT_SYMBOL vmlinux 0x99a5ec53	block_write_end
+EXPORT_SYMBOL vmlinux 0x99bb8806	memmove
+EXPORT_SYMBOL vmlinux 0x99bfbe39	get_unused_fd
+EXPORT_SYMBOL vmlinux 0x99c6ebe7	create_mnt_ns
+EXPORT_SYMBOL vmlinux 0x99c7a8b8	jbd2_dev_to_name
+EXPORT_SYMBOL vmlinux 0x99cdc86b	sysctl_tcp_reordering
+EXPORT_SYMBOL vmlinux 0x99d1d378	get_sb_pseudo
+EXPORT_SYMBOL vmlinux 0x99d9e254	stop_tty
+EXPORT_SYMBOL vmlinux 0x99dd1451	rwsem_downgrade_wake
+EXPORT_SYMBOL vmlinux 0x99e26e35	get_unmapped_area_prot
+EXPORT_SYMBOL vmlinux 0x99ea12ce	panic_blink
+EXPORT_SYMBOL vmlinux 0x99f879a0	inet_frags_exit_net
+EXPORT_SYMBOL vmlinux 0x99f8a819	pci_set_dma_max_seg_size
+EXPORT_SYMBOL vmlinux 0x9a0e16a8	new_inode
+EXPORT_SYMBOL vmlinux 0x9a180b41	d_instantiate_unique
+EXPORT_SYMBOL vmlinux 0x9a1dfd65	strpbrk
+EXPORT_SYMBOL vmlinux 0x9a69013f	jbd2_journal_release_buffer
+EXPORT_SYMBOL vmlinux 0x9a7279c6	sysctl_ms_jiffies
+EXPORT_SYMBOL vmlinux 0x9a908e58	task_nice
+EXPORT_SYMBOL vmlinux 0x9a9cb67b	jbd2_journal_wipe
+EXPORT_SYMBOL vmlinux 0x9adf87e3	scsi_host_put
+EXPORT_SYMBOL vmlinux 0x9b28c8e7	blk_rq_count_integrity_sg
+EXPORT_SYMBOL vmlinux 0x9b28eee4	tcp_rcv_state_process
+EXPORT_SYMBOL vmlinux 0x9b388444	get_zeroed_page
+EXPORT_SYMBOL vmlinux 0x9b4674f9	inet_stream_ops
+EXPORT_SYMBOL vmlinux 0x9b487006	sk_wait_data
+EXPORT_SYMBOL vmlinux 0x9b6d94d8	sk_dst_check
+EXPORT_SYMBOL vmlinux 0x9b6eb137	ksize
+EXPORT_SYMBOL vmlinux 0x9b80ed92	blk_rq_map_user_iov
+EXPORT_SYMBOL vmlinux 0x9ba7089d	argv_split
+EXPORT_SYMBOL vmlinux 0x9ba9534d	vfs_readv
+EXPORT_SYMBOL vmlinux 0x9bbb73d0	devcgroup_inode_permission
+EXPORT_SYMBOL vmlinux 0x9bce482f	__release_region
+EXPORT_SYMBOL vmlinux 0x9bdb202a	mutex_unlock
+EXPORT_SYMBOL vmlinux 0x9bf74479	tcp_initialize_rcv_mss
+EXPORT_SYMBOL vmlinux 0x9bfbe489	bio_init
+EXPORT_SYMBOL vmlinux 0x9c012508	fb_parse_edid
+EXPORT_SYMBOL vmlinux 0x9c012655	flush_signals
+EXPORT_SYMBOL vmlinux 0x9c1f50fd	__pci_register_driver
+EXPORT_SYMBOL vmlinux 0x9c364679	scsi_reset_provider
+EXPORT_SYMBOL vmlinux 0x9c3922b5	pci_release_region
+EXPORT_SYMBOL vmlinux 0x9c50e2b3	journal_invalidatepage
+EXPORT_SYMBOL vmlinux 0x9c71e738	per_cpu__vm_event_states
+EXPORT_SYMBOL vmlinux 0x9c9e1bce	pci_back_from_sleep
+EXPORT_SYMBOL vmlinux 0x9ca539d0	tcp_hashinfo
+EXPORT_SYMBOL vmlinux 0x9cb96e92	qdisc_put_rtab
+EXPORT_SYMBOL vmlinux 0x9ccc1448	kmem_cache_size
+EXPORT_SYMBOL vmlinux 0x9cd45549	cdrom_number_of_slots
+EXPORT_SYMBOL vmlinux 0x9cda643c	truncate_pagecache
+EXPORT_SYMBOL vmlinux 0x9cdf9e0a	create_proc_entry
+EXPORT_SYMBOL vmlinux 0x9ce0670f	blkdev_issue_flush
+EXPORT_SYMBOL vmlinux 0x9ce103a0	down_write_trylock
+EXPORT_SYMBOL vmlinux 0x9ce3f83f	nvram_write_byte
+EXPORT_SYMBOL vmlinux 0x9ceb163c	memcpy_toiovec
+EXPORT_SYMBOL vmlinux 0x9cfd56c5	scsi_print_status
+EXPORT_SYMBOL vmlinux 0x9d0c3f33	wait_for_completion_killable
+EXPORT_SYMBOL vmlinux 0x9d14983a	ppc_enable_pmcs
+EXPORT_SYMBOL vmlinux 0x9d37a217	vm_insert_mixed
+EXPORT_SYMBOL vmlinux 0x9d3aa376	blk_iopoll_init
+EXPORT_SYMBOL vmlinux 0x9d669763	memcpy
+EXPORT_SYMBOL vmlinux 0x9d7d36bd	blk_queue_prep_rq
+EXPORT_SYMBOL vmlinux 0x9d82cd9f	tcp_child_process
+EXPORT_SYMBOL vmlinux 0x9daaf1bf	bio_integrity_endio
+EXPORT_SYMBOL vmlinux 0x9dc3b810	phy_attach_direct
+EXPORT_SYMBOL vmlinux 0x9dde1c71	blk_queue_resize_tags
+EXPORT_SYMBOL vmlinux 0x9de303ab	ide_geometry_proc_fops
+EXPORT_SYMBOL vmlinux 0x9e07068c	inode_claim_rsv_space
+EXPORT_SYMBOL vmlinux 0x9e1270b6	journal_stop
+EXPORT_SYMBOL vmlinux 0x9e2000a7	memcpy_toiovecend
+EXPORT_SYMBOL vmlinux 0x9e20643f	unregister_sysctl_table
+EXPORT_SYMBOL vmlinux 0x9e38a5fe	kernel_recvmsg
+EXPORT_SYMBOL vmlinux 0x9e88a038	nla_put
+EXPORT_SYMBOL vmlinux 0x9e894713	file_permission
+EXPORT_SYMBOL vmlinux 0x9e97375d	rtas_busy_delay_time
+EXPORT_SYMBOL vmlinux 0x9e9f1714	__bitmap_andnot
+EXPORT_SYMBOL vmlinux 0x9ea29f3c	init_timer_deferrable_key
+EXPORT_SYMBOL vmlinux 0x9eb14e76	tcf_register_action
+EXPORT_SYMBOL vmlinux 0x9ebefe86	flush_dcache_page
+EXPORT_SYMBOL vmlinux 0x9ecfb950	request_key_async
+EXPORT_SYMBOL vmlinux 0x9ed685ee	iov_iter_advance
+EXPORT_SYMBOL vmlinux 0x9eda426a	brioctl_set
+EXPORT_SYMBOL vmlinux 0x9eecde16	do_brk
+EXPORT_SYMBOL vmlinux 0x9ef5cda8	console_stop
+EXPORT_SYMBOL vmlinux 0x9f0a127a	ide_stall_queue
+EXPORT_SYMBOL vmlinux 0x9f100139	jiffies_to_clock_t
+EXPORT_SYMBOL vmlinux 0x9f1ce97b	vm_insert_page
+EXPORT_SYMBOL vmlinux 0x9f2bdaac	__bitmap_or
+EXPORT_SYMBOL vmlinux 0x9f2cbdbd	sync_dirty_buffer
+EXPORT_SYMBOL vmlinux 0x9f2d613e	param_set_bool
+EXPORT_SYMBOL vmlinux 0x9f3b2e20	inet_release
+EXPORT_SYMBOL vmlinux 0x9f4d3238	current_fs_time
+EXPORT_SYMBOL vmlinux 0x9f707bc2	single_release
+EXPORT_SYMBOL vmlinux 0x9f984513	strrchr
+EXPORT_SYMBOL vmlinux 0x9fb030f4	del_timer_sync
+EXPORT_SYMBOL vmlinux 0x9fb3dd30	memcpy_fromiovec
+EXPORT_SYMBOL vmlinux 0x9fe6fa56	ftrace_print_flags_seq
+EXPORT_SYMBOL vmlinux 0x9ffc1fe1	generic_permission
+EXPORT_SYMBOL vmlinux 0xa005daa2	sync_inodes_sb
+EXPORT_SYMBOL vmlinux 0xa024ffa5	__sg_free_table
+EXPORT_SYMBOL vmlinux 0xa03523d5	security_unix_stream_connect
+EXPORT_SYMBOL vmlinux 0xa04a01bd	qdisc_class_hash_insert
+EXPORT_SYMBOL vmlinux 0xa05c03df	mempool_kmalloc
+EXPORT_SYMBOL vmlinux 0xa0846db4	scsi_setup_fs_cmnd
+EXPORT_SYMBOL vmlinux 0xa088e32e	blk_peek_request
+EXPORT_SYMBOL vmlinux 0xa0a2027f	input_unregister_handle
+EXPORT_SYMBOL vmlinux 0xa0b04675	vmalloc_32
+EXPORT_SYMBOL vmlinux 0xa0b8aa12	gnet_stats_copy_app
+EXPORT_SYMBOL vmlinux 0xa0cd584d	of_translate_address
+EXPORT_SYMBOL vmlinux 0xa0ceef51	out_of_line_wait_on_bit
+EXPORT_SYMBOL vmlinux 0xa0fbac79	wake_up_bit
+EXPORT_SYMBOL vmlinux 0xa108eb4d	sysctl_optmem_max
+EXPORT_SYMBOL vmlinux 0xa11bce9b	jbd2_journal_clear_features
+EXPORT_SYMBOL vmlinux 0xa120d33c	tty_unregister_ldisc
+EXPORT_SYMBOL vmlinux 0xa13798f8	printk_ratelimit
+EXPORT_SYMBOL vmlinux 0xa14d9d10	pci_alloc_consistent
+EXPORT_SYMBOL vmlinux 0xa15d2c90	pci_get_class
+EXPORT_SYMBOL vmlinux 0xa16c6ce7	i2c_smbus_xfer
+EXPORT_SYMBOL vmlinux 0xa16fd1ee	sk_run_filter
+EXPORT_SYMBOL vmlinux 0xa18b902b	blk_free_tags
+EXPORT_SYMBOL vmlinux 0xa19ea178	__napi_complete
+EXPORT_SYMBOL vmlinux 0xa1b759ce	fb_add_videomode
+EXPORT_SYMBOL vmlinux 0xa1c76e0a	_cond_resched
+EXPORT_SYMBOL vmlinux 0xa1db3953	__bforget
+EXPORT_SYMBOL vmlinux 0xa1ffd6a9	invalidate_inodes
+EXPORT_SYMBOL vmlinux 0xa20ce1b8	net_msg_warn
+EXPORT_SYMBOL vmlinux 0xa20f3d3a	page_readlink
+EXPORT_SYMBOL vmlinux 0xa2200235	xfrm_policy_destroy
+EXPORT_SYMBOL vmlinux 0xa2299087	generic_file_aio_write
+EXPORT_SYMBOL vmlinux 0xa2451791	skb_copy_and_csum_dev
+EXPORT_SYMBOL vmlinux 0xa26b0f18	dm_get_device
+EXPORT_SYMBOL vmlinux 0xa273c412	security_path_unlink
+EXPORT_SYMBOL vmlinux 0xa2843a3b	d_find_alias
+EXPORT_SYMBOL vmlinux 0xa28a34b0	netpoll_setup
+EXPORT_SYMBOL vmlinux 0xa29b1708	tcp_memory_allocated
+EXPORT_SYMBOL vmlinux 0xa2a5fd77	inet_ehash_secret
+EXPORT_SYMBOL vmlinux 0xa2b11539	netlink_kernel_release
+EXPORT_SYMBOL vmlinux 0xa2bbed37	crash_shutdown_register
+EXPORT_SYMBOL vmlinux 0xa2d4c119	complete_all
+EXPORT_SYMBOL vmlinux 0xa311bb94	kernel_sock_shutdown
+EXPORT_SYMBOL vmlinux 0xa329f07e	register_shrinker
+EXPORT_SYMBOL vmlinux 0xa332cdd1	security_tun_dev_attach
+EXPORT_SYMBOL vmlinux 0xa34f1ef5	crc32_le
+EXPORT_SYMBOL vmlinux 0xa35de80f	ipv4_config
+EXPORT_SYMBOL vmlinux 0xa38db95d	blk_queue_io_opt
+EXPORT_SYMBOL vmlinux 0xa38e691a	ioremap_bot
+EXPORT_SYMBOL vmlinux 0xa397678a	iget_locked
+EXPORT_SYMBOL vmlinux 0xa39b4cf2	udelay
+EXPORT_SYMBOL vmlinux 0xa3ded1cc	arp_create
+EXPORT_SYMBOL vmlinux 0xa3e6a542	netdev_rx_csum_fault
+EXPORT_SYMBOL vmlinux 0xa3e75545	flush_tlb_kernel_range
+EXPORT_SYMBOL vmlinux 0xa3f2bd70	ide_dma_off_quietly
+EXPORT_SYMBOL vmlinux 0xa40d5eff	__kill_fasync
+EXPORT_SYMBOL vmlinux 0xa413c72c	vfs_create
+EXPORT_SYMBOL vmlinux 0xa42c1670	jbd2_journal_file_inode
+EXPORT_SYMBOL vmlinux 0xa42f63d9	arp_find
+EXPORT_SYMBOL vmlinux 0xa43b9539	memcpy_fromiovecend
+EXPORT_SYMBOL vmlinux 0xa44bb0ee	dev_addr_del
+EXPORT_SYMBOL vmlinux 0xa4657c01	ps2_handle_response
+EXPORT_SYMBOL vmlinux 0xa468705a	lro_vlan_hwaccel_receive_skb
+EXPORT_SYMBOL vmlinux 0xa4713025	i2c_smbus_write_byte_data
+EXPORT_SYMBOL vmlinux 0xa475503f	dqget
+EXPORT_SYMBOL vmlinux 0xa478985d	setup_arg_pages
+EXPORT_SYMBOL vmlinux 0xa4794184	fb_get_mode
+EXPORT_SYMBOL vmlinux 0xa49a6c1e	sk_stream_error
+EXPORT_SYMBOL vmlinux 0xa4a8aa34	otg_put_transceiver
+EXPORT_SYMBOL vmlinux 0xa4b94fea	iowrite8_rep
+EXPORT_SYMBOL vmlinux 0xa50dcbcb	tcp_close
+EXPORT_SYMBOL vmlinux 0xa53d88e7	send_sig_info
+EXPORT_SYMBOL vmlinux 0xa55c4730	__register_binfmt
+EXPORT_SYMBOL vmlinux 0xa576c263	generic_find_next_le_bit
+EXPORT_SYMBOL vmlinux 0xa5808bbf	tasklet_init
+EXPORT_SYMBOL vmlinux 0xa58b6804	nla_parse
+EXPORT_SYMBOL vmlinux 0xa58be26e	replace_mount_options
+EXPORT_SYMBOL vmlinux 0xa5960152	tcf_em_register
+EXPORT_SYMBOL vmlinux 0xa5977033	blk_queue_max_segment_size
+EXPORT_SYMBOL vmlinux 0xa598e29c	vesa_modes
+EXPORT_SYMBOL vmlinux 0xa5b00659	ppc_proc_freq
+EXPORT_SYMBOL vmlinux 0xa5cef8ad	release_resource
+EXPORT_SYMBOL vmlinux 0xa5d02e62	blk_init_tags
+EXPORT_SYMBOL vmlinux 0xa5e47dcf	input_grab_device
+EXPORT_SYMBOL vmlinux 0xa5f1fa21	ide_dma_off
+EXPORT_SYMBOL vmlinux 0xa5f77197	i2c_get_adapter
+EXPORT_SYMBOL vmlinux 0xa6108b9c	fifo_set_limit
+EXPORT_SYMBOL vmlinux 0xa640bff8	alloc_buffer_head
+EXPORT_SYMBOL vmlinux 0xa65972b8	_memcpy_toio
+EXPORT_SYMBOL vmlinux 0xa670d0bd	nf_hook_slow
+EXPORT_SYMBOL vmlinux 0xa68124fa	hweight8
+EXPORT_SYMBOL vmlinux 0xa681fe88	generate_random_uuid
+EXPORT_SYMBOL vmlinux 0xa682bbf1	jbd2_journal_get_write_access
+EXPORT_SYMBOL vmlinux 0xa69a8276	sg_miter_start
+EXPORT_SYMBOL vmlinux 0xa6b753e6	do_splice_to
+EXPORT_SYMBOL vmlinux 0xa6c50fb6	fput
+EXPORT_SYMBOL vmlinux 0xa6dcc773	rb_insert_color
+EXPORT_SYMBOL vmlinux 0xa6e15648	xfrm_policy_flush
+EXPORT_SYMBOL vmlinux 0xa6ff9b04	simple_statfs
+EXPORT_SYMBOL vmlinux 0xa70f3f8e	pcim_iomap_regions
+EXPORT_SYMBOL vmlinux 0xa7462668	mb_cache_entry_alloc
+EXPORT_SYMBOL vmlinux 0xa78e49b5	follow_up
+EXPORT_SYMBOL vmlinux 0xa7bcc804	inode_add_rsv_space
+EXPORT_SYMBOL vmlinux 0xa7d76b45	__splice_from_pipe
+EXPORT_SYMBOL vmlinux 0xa7e4b25b	get_io_context
+EXPORT_SYMBOL vmlinux 0xa7e58ba4	per_cpu__ftrace_event_seq
+EXPORT_SYMBOL vmlinux 0xa81e6f8a	of_gpio_count
+EXPORT_SYMBOL vmlinux 0xa861ab6e	__ioremap
+EXPORT_SYMBOL vmlinux 0xa872dae8	do_sync_read
+EXPORT_SYMBOL vmlinux 0xa89464b7	__ashldi3
+EXPORT_SYMBOL vmlinux 0xa8c1255a	__dec_zone_page_state
+EXPORT_SYMBOL vmlinux 0xa8cc3c32	skb_seq_read
+EXPORT_SYMBOL vmlinux 0xa8cf6bcf	bio_sector_offset
+EXPORT_SYMBOL vmlinux 0xa8eefc03	__find_get_block
+EXPORT_SYMBOL vmlinux 0xa8fef7bb	security_unix_may_send
+EXPORT_SYMBOL vmlinux 0xa8ff67b6	ll_rw_block
+EXPORT_SYMBOL vmlinux 0xa90e1561	tcp_proc_unregister
+EXPORT_SYMBOL vmlinux 0xa922f240	_read_lock_irq
+EXPORT_SYMBOL vmlinux 0xa9571d6d	DMA_MODE_WRITE
+EXPORT_SYMBOL vmlinux 0xa960f7f1	journal_create
+EXPORT_SYMBOL vmlinux 0xa9997caa	mdiobus_free
+EXPORT_SYMBOL vmlinux 0xa9af6172	d_delete
+EXPORT_SYMBOL vmlinux 0xa9c282ad	tcp_sendmsg
+EXPORT_SYMBOL vmlinux 0xa9cd1f78	tcf_em_tree_validate
+EXPORT_SYMBOL vmlinux 0xa9effda5	__first_cpu
+EXPORT_SYMBOL vmlinux 0xaa04c81c	vfs_rename
+EXPORT_SYMBOL vmlinux 0xaa29c2d1	remove_arg_zero
+EXPORT_SYMBOL vmlinux 0xaa4af454	inc_zone_page_state
+EXPORT_SYMBOL vmlinux 0xaa4df512	pmu_batteries
+EXPORT_SYMBOL vmlinux 0xaa592ccd	poll_freewait
+EXPORT_SYMBOL vmlinux 0xaa6711dc	bio_integrity_alloc_bioset
+EXPORT_SYMBOL vmlinux 0xaa758cee	nf_unregister_queue_handler
+EXPORT_SYMBOL vmlinux 0xaa75fdd0	alloc_fddidev
+EXPORT_SYMBOL vmlinux 0xaa980657	grab_cache_page_nowait
+EXPORT_SYMBOL vmlinux 0xaabbed7a	set_disk_ro
+EXPORT_SYMBOL vmlinux 0xaafd6f36	vfs_quota_sync
+EXPORT_SYMBOL vmlinux 0xaafdc258	strcasecmp
+EXPORT_SYMBOL vmlinux 0xab3e9fdb	ether_setup
+EXPORT_SYMBOL vmlinux 0xab42779e	of_get_gpio_flags
+EXPORT_SYMBOL vmlinux 0xab4964d4	starget_for_each_device
+EXPORT_SYMBOL vmlinux 0xab64d423	__blk_end_request_cur
+EXPORT_SYMBOL vmlinux 0xab7f52b0	mntput_no_expire
+EXPORT_SYMBOL vmlinux 0xab99a0b2	mpage_readpages
+EXPORT_SYMBOL vmlinux 0xab9a6426	udp_disconnect
+EXPORT_SYMBOL vmlinux 0xabae09e1	block_commit_write
+EXPORT_SYMBOL vmlinux 0xabaec7e7	__elv_add_request
+EXPORT_SYMBOL vmlinux 0xabd0c91c	rtc_time_to_tm
+EXPORT_SYMBOL vmlinux 0xabd8e427	matroxfb_var2my
+EXPORT_SYMBOL vmlinux 0xabdfbf13	scsi_nonblockable_ioctl
+EXPORT_SYMBOL vmlinux 0xabe10c4b	xfrm_state_add
+EXPORT_SYMBOL vmlinux 0xabf1b64d	dquot_acquire
+EXPORT_SYMBOL vmlinux 0xac00f4a9	dev_gro_receive
+EXPORT_SYMBOL vmlinux 0xac025c2c	inet_shutdown
+EXPORT_SYMBOL vmlinux 0xac0ba8c1	blk_iopoll_disable
+EXPORT_SYMBOL vmlinux 0xac369cf1	jbd2_journal_init_dev
+EXPORT_SYMBOL vmlinux 0xac6855b0	gen_kill_estimator
+EXPORT_SYMBOL vmlinux 0xac83d76a	vc_resize
+EXPORT_SYMBOL vmlinux 0xac8b6e85	generic_file_llseek_unlocked
+EXPORT_SYMBOL vmlinux 0xac9bd40a	init_task
+EXPORT_SYMBOL vmlinux 0xacb41bd5	generic_file_splice_write
+EXPORT_SYMBOL vmlinux 0xacb749fa	pci_set_mwi
+EXPORT_SYMBOL vmlinux 0xacb87c41	i2c_clients_command
+EXPORT_SYMBOL vmlinux 0xaccabc6a	in4_pton
+EXPORT_SYMBOL vmlinux 0xaccd84db	sysctl_string
+EXPORT_SYMBOL vmlinux 0xacd713ff	tty_kref_put
+EXPORT_SYMBOL vmlinux 0xacdeb154	__tracepoint_module_get
+EXPORT_SYMBOL vmlinux 0xace3fd20	sock_no_recvmsg
+EXPORT_SYMBOL vmlinux 0xacf4d843	match_strdup
+EXPORT_SYMBOL vmlinux 0xacfb4f9c	blkdev_get
+EXPORT_SYMBOL vmlinux 0xad0413d4	match_hex
+EXPORT_SYMBOL vmlinux 0xad109c71	scsi_device_lookup
+EXPORT_SYMBOL vmlinux 0xad1188c9	generic_show_options
+EXPORT_SYMBOL vmlinux 0xad12b363	dev_getbyhwaddr
+EXPORT_SYMBOL vmlinux 0xad1f13e6	llc_build_and_send_ui_pkt
+EXPORT_SYMBOL vmlinux 0xad28278d	d_validate
+EXPORT_SYMBOL vmlinux 0xad300d82	dma_pool_alloc
+EXPORT_SYMBOL vmlinux 0xad4ebe22	_write_unlock_irqrestore
+EXPORT_SYMBOL vmlinux 0xad8cd8a9	blk_integrity_compare
+EXPORT_SYMBOL vmlinux 0xada14b4f	input_register_handler
+EXPORT_SYMBOL vmlinux 0xadaa2657	cpufreq_register_notifier
+EXPORT_SYMBOL vmlinux 0xadad834d	bdi_register_dev
+EXPORT_SYMBOL vmlinux 0xadb1b581	journal_errno
+EXPORT_SYMBOL vmlinux 0xadd1e971	alignment_exception
+EXPORT_SYMBOL vmlinux 0xaddd4770	__debugger_iabr_match
+EXPORT_SYMBOL vmlinux 0xadf42bd5	__request_region
+EXPORT_SYMBOL vmlinux 0xae4e08e3	matroxfb_DAC_out
+EXPORT_SYMBOL vmlinux 0xae7d01a3	dm_kcopyd_copy
+EXPORT_SYMBOL vmlinux 0xae8ad51d	inet_dev_addr_type
+EXPORT_SYMBOL vmlinux 0xae8ef5c4	vfs_fsync
+EXPORT_SYMBOL vmlinux 0xaeb8fdb0	udp_lib_unhash
+EXPORT_SYMBOL vmlinux 0xaec655c7	alloc_pages_exact
+EXPORT_SYMBOL vmlinux 0xaed013b9	posix_acl_valid
+EXPORT_SYMBOL vmlinux 0xaef302bb	pci_request_regions_exclusive
+EXPORT_SYMBOL vmlinux 0xaf05fba2	pci_device_to_OF_node
+EXPORT_SYMBOL vmlinux 0xaf0b3213	fib_default_rule_add
+EXPORT_SYMBOL vmlinux 0xaf0d2ffd	dst_discard
+EXPORT_SYMBOL vmlinux 0xaf195013	scsi_unblock_requests
+EXPORT_SYMBOL vmlinux 0xaf2d174c	__scsi_put_command
+EXPORT_SYMBOL vmlinux 0xaf3dd7dc	scsi_logging_level
+EXPORT_SYMBOL vmlinux 0xaf63cdb0	simple_rename
+EXPORT_SYMBOL vmlinux 0xaf6fbc95	alloc_netdev_mq
+EXPORT_SYMBOL vmlinux 0xaf82b825	journal_restart
+EXPORT_SYMBOL vmlinux 0xaf917ec5	sock_no_poll
+EXPORT_SYMBOL vmlinux 0xaf9d5794	pci_disable_link_state
+EXPORT_SYMBOL vmlinux 0xafa7bd33	tcf_hash_destroy
+EXPORT_SYMBOL vmlinux 0xafaa2acd	__wait_on_buffer
+EXPORT_SYMBOL vmlinux 0xafc42231	km_state_expired
+EXPORT_SYMBOL vmlinux 0xb0015bf0	iput
+EXPORT_SYMBOL vmlinux 0xb0020317	udp_lib_setsockopt
+EXPORT_SYMBOL vmlinux 0xb01a22f9	jbd2_journal_force_commit
+EXPORT_SYMBOL vmlinux 0xb075877a	i2c_smbus_read_word_data
+EXPORT_SYMBOL vmlinux 0xb09940c5	jbd2_journal_check_used_features
+EXPORT_SYMBOL vmlinux 0xb09f4915	generic_block_bmap
+EXPORT_SYMBOL vmlinux 0xb0b847ac	__bitmap_full
+EXPORT_SYMBOL vmlinux 0xb0c77c29	inet_frag_find
+EXPORT_SYMBOL vmlinux 0xb0e10781	get_option
+EXPORT_SYMBOL vmlinux 0xb0e2b9b4	phy_print_status
+EXPORT_SYMBOL vmlinux 0xb118a90c	blk_queue_physical_block_size
+EXPORT_SYMBOL vmlinux 0xb121d922	inet_csk_delete_keepalive_timer
+EXPORT_SYMBOL vmlinux 0xb1347fa8	qdisc_warn_nonwc
+EXPORT_SYMBOL vmlinux 0xb13e85c3	revert_creds
+EXPORT_SYMBOL vmlinux 0xb14fc3f9	scsi_kmap_atomic_sg
+EXPORT_SYMBOL vmlinux 0xb1542da5	kill_litter_super
+EXPORT_SYMBOL vmlinux 0xb15bd8fa	tb_ticks_per_sec
+EXPORT_SYMBOL vmlinux 0xb1661be0	netif_notify_peers
+EXPORT_SYMBOL vmlinux 0xb18f3f06	ide_xfer_verbose
+EXPORT_SYMBOL vmlinux 0xb19760c3	bitmap_onto
+EXPORT_SYMBOL vmlinux 0xb199a894	blk_init_queue_node
+EXPORT_SYMBOL vmlinux 0xb1b859b6	mod_timer_pinned
+EXPORT_SYMBOL vmlinux 0xb1c3a01a	oops_in_progress
+EXPORT_SYMBOL vmlinux 0xb1cabc51	clip_tbl_hook
+EXPORT_SYMBOL vmlinux 0xb1f975aa	unlock_kernel
+EXPORT_SYMBOL vmlinux 0xb2116560	cont_write_begin
+EXPORT_SYMBOL vmlinux 0xb224fbe2	param_get_short
+EXPORT_SYMBOL vmlinux 0xb22fe6a3	netdev_increment_features
+EXPORT_SYMBOL vmlinux 0xb233762c	atomic64_set
+EXPORT_SYMBOL vmlinux 0xb2682405	utf8_to_utf32
+EXPORT_SYMBOL vmlinux 0xb281cafd	inode_init_once
+EXPORT_SYMBOL vmlinux 0xb2940458	of_phy_connect
+EXPORT_SYMBOL vmlinux 0xb2acad87	lock_may_write
+EXPORT_SYMBOL vmlinux 0xb2ba62b5	__wait_on_bit
+EXPORT_SYMBOL vmlinux 0xb2c969cb	gen_pool_create
+EXPORT_SYMBOL vmlinux 0xb2f8466f	journal_load
+EXPORT_SYMBOL vmlinux 0xb33163f7	dm_table_get_md
+EXPORT_SYMBOL vmlinux 0xb342b3a1	kernel_getsockname
+EXPORT_SYMBOL vmlinux 0xb35c3003	sock_no_connect
+EXPORT_SYMBOL vmlinux 0xb376d79d	radix_tree_tagged
+EXPORT_SYMBOL vmlinux 0xb3994c7a	per_cpu__kstat
+EXPORT_SYMBOL vmlinux 0xb3a307c6	si_meminfo
+EXPORT_SYMBOL vmlinux 0xb3b8f8c5	netlink_set_err
+EXPORT_SYMBOL vmlinux 0xb3db1469	phy_device_free
+EXPORT_SYMBOL vmlinux 0xb3f9cdd3	generic_block_fiemap
+EXPORT_SYMBOL vmlinux 0xb3fb73a7	pci_request_region_exclusive
+EXPORT_SYMBOL vmlinux 0xb40faa5b	iov_iter_copy_from_user
+EXPORT_SYMBOL vmlinux 0xb41aaf4d	flush_hash_entry
+EXPORT_SYMBOL vmlinux 0xb423dba1	console_blanked
+EXPORT_SYMBOL vmlinux 0xb42453d3	param_get_invbool
+EXPORT_SYMBOL vmlinux 0xb43fd7dd	__skb_checksum_complete_head
+EXPORT_SYMBOL vmlinux 0xb44e1da5	generic_read_dir
+EXPORT_SYMBOL vmlinux 0xb4556f81	journal_init_dev
+EXPORT_SYMBOL vmlinux 0xb4709322	scsi_dev_info_add_list
+EXPORT_SYMBOL vmlinux 0xb4711076	napi_frags_skb
+EXPORT_SYMBOL vmlinux 0xb48dcec2	dev_kfree_skb_irq
+EXPORT_SYMBOL vmlinux 0xb4a12845	inet_getname
+EXPORT_SYMBOL vmlinux 0xb4b05f8f	check_disk_size_change
+EXPORT_SYMBOL vmlinux 0xb4e31b17	cdev_del
+EXPORT_SYMBOL vmlinux 0xb4f6118c	netlink_ack
+EXPORT_SYMBOL vmlinux 0xb5044271	vsscanf
+EXPORT_SYMBOL vmlinux 0xb50e8448	netlink_broadcast
+EXPORT_SYMBOL vmlinux 0xb53a4336	kmap_pte
+EXPORT_SYMBOL vmlinux 0xb54533f7	usecs_to_jiffies
+EXPORT_SYMBOL vmlinux 0xb54e3095	pci_bus_type
+EXPORT_SYMBOL vmlinux 0xb59f2cf3	register_qdisc
+EXPORT_SYMBOL vmlinux 0xb5a459dc	unregister_blkdev
+EXPORT_SYMBOL vmlinux 0xb5bd58c2	dev_trans_start
+EXPORT_SYMBOL vmlinux 0xb5c7f030	scsi_report_device_reset
+EXPORT_SYMBOL vmlinux 0xb5cbe44d	phy_stop_interrupts
+EXPORT_SYMBOL vmlinux 0xb5d24ed2	journal_forget
+EXPORT_SYMBOL vmlinux 0xb602efc5	tcp_mtup_init
+EXPORT_SYMBOL vmlinux 0xb6255db0	mb_cache_entry_get
+EXPORT_SYMBOL vmlinux 0xb62654f9	dquot_free_inode
+EXPORT_SYMBOL vmlinux 0xb62bd749	xfrm_state_delete_tunnel
+EXPORT_SYMBOL vmlinux 0xb63c7d1f	fb_class
+EXPORT_SYMBOL vmlinux 0xb6599b9a	machine_check_exception
+EXPORT_SYMBOL vmlinux 0xb67478ed	generic_setxattr
+EXPORT_SYMBOL vmlinux 0xb678366f	int_sqrt
+EXPORT_SYMBOL vmlinux 0xb67d00a0	dev_addr_add_multiple
+EXPORT_SYMBOL vmlinux 0xb688793a	tcp_v4_md5_lookup
+EXPORT_SYMBOL vmlinux 0xb6a61a86	qdisc_get_rtab
+EXPORT_SYMBOL vmlinux 0xb6a68816	find_last_bit
+EXPORT_SYMBOL vmlinux 0xb6be40d5	proc_dointvec_minmax
+EXPORT_SYMBOL vmlinux 0xb6bffb99	kstat_irqs_cpu
+EXPORT_SYMBOL vmlinux 0xb6c5a973	scsi_show_result
+EXPORT_SYMBOL vmlinux 0xb6f96c54	pmac_register_agp_pm
+EXPORT_SYMBOL vmlinux 0xb6fccfbe	search_binary_handler
+EXPORT_SYMBOL vmlinux 0xb700af30	i2c_smbus_process_call
+EXPORT_SYMBOL vmlinux 0xb70919ba	tcp_poll
+EXPORT_SYMBOL vmlinux 0xb710d0fe	i2c_put_adapter
+EXPORT_SYMBOL vmlinux 0xb729d478	inet_sendmsg
+EXPORT_SYMBOL vmlinux 0xb753bcc8	__ashrdi3
+EXPORT_SYMBOL vmlinux 0xb7950e43	cad_pid
+EXPORT_SYMBOL vmlinux 0xb798b8e4	flow_cache_lookup
+EXPORT_SYMBOL vmlinux 0xb79a4d4d	xfrm_register_type
+EXPORT_SYMBOL vmlinux 0xb7ad1790	__lock_page
+EXPORT_SYMBOL vmlinux 0xb7b61546	crc32_be
+EXPORT_SYMBOL vmlinux 0xb7ccb3c7	twl4030_i2c_read_u8
+EXPORT_SYMBOL vmlinux 0xb7ecdd89	__scsi_device_lookup
+EXPORT_SYMBOL vmlinux 0xb7f33f7e	mod_timer_pending
+EXPORT_SYMBOL vmlinux 0xb7fadb7f	jbd2_log_start_commit
+EXPORT_SYMBOL vmlinux 0xb83258ac	tcf_exts_validate
+EXPORT_SYMBOL vmlinux 0xb85c4654	nobh_truncate_page
+EXPORT_SYMBOL vmlinux 0xb86c6a29	sock_no_sendmsg
+EXPORT_SYMBOL vmlinux 0xb86e4ab9	random32
+EXPORT_SYMBOL vmlinux 0xb883870f	pci_set_dma_seg_boundary
+EXPORT_SYMBOL vmlinux 0xb885eff8	inet_sock_destruct
+EXPORT_SYMBOL vmlinux 0xb8870648	registered_fb
+EXPORT_SYMBOL vmlinux 0xb89af9bf	srandom32
+EXPORT_SYMBOL vmlinux 0xb8aa2342	__check_region
+EXPORT_SYMBOL vmlinux 0xb8b2b020	misc_deregister
+EXPORT_SYMBOL vmlinux 0xb8c36d5b	skb_put
+EXPORT_SYMBOL vmlinux 0xb8de939c	of_device_get_modalias
+EXPORT_SYMBOL vmlinux 0xb93253ae	ida_get_new
+EXPORT_SYMBOL vmlinux 0xb93eb2f3	tty_port_carrier_raised
+EXPORT_SYMBOL vmlinux 0xb9502575	ps2_end_command
+EXPORT_SYMBOL vmlinux 0xb9877fc6	vfs_writev
+EXPORT_SYMBOL vmlinux 0xb98a0185	rtc_tm_to_time
+EXPORT_SYMBOL vmlinux 0xb98ef804	vm_stat
+EXPORT_SYMBOL vmlinux 0xb994f907	tty_insert_flip_string
+EXPORT_SYMBOL vmlinux 0xb9a0f14c	textsearch_unregister
+EXPORT_SYMBOL vmlinux 0xb9b3b0e7	no_llseek
+EXPORT_SYMBOL vmlinux 0xba095c9b	ip_generic_getfrag
+EXPORT_SYMBOL vmlinux 0xba2cca8c	elv_dispatch_sort
+EXPORT_SYMBOL vmlinux 0xba339809	copy_io_context
+EXPORT_SYMBOL vmlinux 0xba497f13	loops_per_jiffy
+EXPORT_SYMBOL vmlinux 0xba6fa6e1	security_file_permission
+EXPORT_SYMBOL vmlinux 0xbaaab8ae	timespec_to_jiffies
+EXPORT_SYMBOL vmlinux 0xbb167766	fb_var_to_videomode
+EXPORT_SYMBOL vmlinux 0xbb189cad	disallow_signal
+EXPORT_SYMBOL vmlinux 0xbb5d343d	xfrm_get_acqseq
+EXPORT_SYMBOL vmlinux 0xbb7a91dc	_write_unlock_bh
+EXPORT_SYMBOL vmlinux 0xbb7b9866	vfs_rmdir
+EXPORT_SYMBOL vmlinux 0xbb88e21e	tc_classify_compat
+EXPORT_SYMBOL vmlinux 0xbb99125c	get_default_font
+EXPORT_SYMBOL vmlinux 0xbbc5bbba	blk_alloc_queue_node
+EXPORT_SYMBOL vmlinux 0xbbe93cbc	tcp_recvmsg
+EXPORT_SYMBOL vmlinux 0xbc0d1999	tcf_hash_check
+EXPORT_SYMBOL vmlinux 0xbc1a8360	mark_buffer_async_write
+EXPORT_SYMBOL vmlinux 0xbc1e52a4	matroxfb_register_driver
+EXPORT_SYMBOL vmlinux 0xbc23022c	journal_blocks_per_page
+EXPORT_SYMBOL vmlinux 0xbc25038c	jbd2_journal_begin_ordered_truncate
+EXPORT_SYMBOL vmlinux 0xbc316de4	tty_termios_input_baud_rate
+EXPORT_SYMBOL vmlinux 0xbc3d14d3	proc_mkdir
+EXPORT_SYMBOL vmlinux 0xbc5eadce	set_create_files_as
+EXPORT_SYMBOL vmlinux 0xbc7493c5	pci_bus_write_config_dword
+EXPORT_SYMBOL vmlinux 0xbcadf96f	pci_read_vpd
+EXPORT_SYMBOL vmlinux 0xbcbead67	request_firmware
+EXPORT_SYMBOL vmlinux 0xbcd2e425	find_or_create_page
+EXPORT_SYMBOL vmlinux 0xbcdaa01d	register_gifconf
+EXPORT_SYMBOL vmlinux 0xbce22660	key_unlink
+EXPORT_SYMBOL vmlinux 0xbce3412f	scsi_unregister
+EXPORT_SYMBOL vmlinux 0xbd079847	install_exec_creds
+EXPORT_SYMBOL vmlinux 0xbd08c899	phy_driver_unregister
+EXPORT_SYMBOL vmlinux 0xbd270a7f	hippi_change_mtu
+EXPORT_SYMBOL vmlinux 0xbd3924ea	scsi_get_device_flags_keyed
+EXPORT_SYMBOL vmlinux 0xbd5b00f5	of_dev_get
+EXPORT_SYMBOL vmlinux 0xbd7eb3fb	napi_skb_finish
+EXPORT_SYMBOL vmlinux 0xbd8b631e	register_cdrom
+EXPORT_SYMBOL vmlinux 0xbd8d541d	flush_hash_pages
+EXPORT_SYMBOL vmlinux 0xbd8d770c	ide_complete_rq
+EXPORT_SYMBOL vmlinux 0xbd9e5d49	__lshrdi3
+EXPORT_SYMBOL vmlinux 0xbda1a634	dev_addr_del_multiple
+EXPORT_SYMBOL vmlinux 0xbdae30c7	idr_for_each
+EXPORT_SYMBOL vmlinux 0xbdc110a7	xfrm_dst_ifdown
+EXPORT_SYMBOL vmlinux 0xbdf36c0b	blk_register_region
+EXPORT_SYMBOL vmlinux 0xbdf56524	pci_bus_write_config_byte
+EXPORT_SYMBOL vmlinux 0xbdf5c25c	rb_next
+EXPORT_SYMBOL vmlinux 0xbe0e5118	nla_memcmp
+EXPORT_SYMBOL vmlinux 0xbe27c057	module_put
+EXPORT_SYMBOL vmlinux 0xbe374b99	bio_copy_user
+EXPORT_SYMBOL vmlinux 0xbe3c56cc	tty_shutdown
+EXPORT_SYMBOL vmlinux 0xbe484a83	nf_setsockopt
+EXPORT_SYMBOL vmlinux 0xbe50e6f5	vga_set_legacy_decoding
+EXPORT_SYMBOL vmlinux 0xbe63ee40	request_resource
+EXPORT_SYMBOL vmlinux 0xbe77bbe7	sk_receive_skb
+EXPORT_SYMBOL vmlinux 0xbe8a1485	mempool_create
+EXPORT_SYMBOL vmlinux 0xbeb0b5f4	proc_create_data
+EXPORT_SYMBOL vmlinux 0xbec72b47	seq_release
+EXPORT_SYMBOL vmlinux 0xbecd02d5	input_unregister_handler
+EXPORT_SYMBOL vmlinux 0xbed6d4fa	alloc_fcdev
+EXPORT_SYMBOL vmlinux 0xbee08970	tcf_exts_dump_stats
+EXPORT_SYMBOL vmlinux 0xbef43296	console_conditional_schedule
+EXPORT_SYMBOL vmlinux 0xbf7a3c26	dmam_free_coherent
+EXPORT_SYMBOL vmlinux 0xbf7fd2f5	schedule_timeout_killable
+EXPORT_SYMBOL vmlinux 0xbf82ea61	wait_for_completion_interruptible_timeout
+EXPORT_SYMBOL vmlinux 0xbf83ea96	d_alloc_name
+EXPORT_SYMBOL vmlinux 0xbf9bcc8d	__cap_empty_set
+EXPORT_SYMBOL vmlinux 0xbfab4310	ethtool_op_get_tso
+EXPORT_SYMBOL vmlinux 0xbfc177bc	iowrite32_rep
+EXPORT_SYMBOL vmlinux 0xbfc1f2bf	macio_dev_put
+EXPORT_SYMBOL vmlinux 0xbfe24289	xfrm_unregister_mode
+EXPORT_SYMBOL vmlinux 0xc0044724	blk_set_default_limits
+EXPORT_SYMBOL vmlinux 0xc032632a	vmtruncate
+EXPORT_SYMBOL vmlinux 0xc0580937	rb_erase
+EXPORT_SYMBOL vmlinux 0xc060a18a	pci_set_power_state
+EXPORT_SYMBOL vmlinux 0xc0614746	d_alloc
+EXPORT_SYMBOL vmlinux 0xc06b3c67	blk_end_request_cur
+EXPORT_SYMBOL vmlinux 0xc0742e64	netif_napi_add
+EXPORT_SYMBOL vmlinux 0xc07ebb9e	DAC1064_global_restore
+EXPORT_SYMBOL vmlinux 0xc08dc5ac	pipe_lock
+EXPORT_SYMBOL vmlinux 0xc0944f51	pneigh_lookup
+EXPORT_SYMBOL vmlinux 0xc0a3d105	find_next_bit
+EXPORT_SYMBOL vmlinux 0xc0a76ec1	dev_getfirstbyhwtype
+EXPORT_SYMBOL vmlinux 0xc0b0f85e	gnet_stats_copy_rate_est
+EXPORT_SYMBOL vmlinux 0xc0be9218	i2c_smbus_write_block_data
+EXPORT_SYMBOL vmlinux 0xc0bf6ead	timecounter_cyc2time
+EXPORT_SYMBOL vmlinux 0xc0ca2f52	ip_fragment
+EXPORT_SYMBOL vmlinux 0xc0d84ced	cuda_poll
+EXPORT_SYMBOL vmlinux 0xc0e32e0c	of_device_unregister
+EXPORT_SYMBOL vmlinux 0xc113ae27	genl_unregister_ops
+EXPORT_SYMBOL vmlinux 0xc11d8093	iov_shorten
+EXPORT_SYMBOL vmlinux 0xc1351aa7	elv_abort_queue
+EXPORT_SYMBOL vmlinux 0xc14989a7	bio_integrity_add_page
+EXPORT_SYMBOL vmlinux 0xc15e073c	generic_find_next_zero_le_bit
+EXPORT_SYMBOL vmlinux 0xc16ea804	of_translate_dma_address
+EXPORT_SYMBOL vmlinux 0xc16f785e	llc_sap_open
+EXPORT_SYMBOL vmlinux 0xc1811dad	__scm_destroy
+EXPORT_SYMBOL vmlinux 0xc1a81f6d	skb_free_datagram
+EXPORT_SYMBOL vmlinux 0xc1ba49a9	dev_base_lock
+EXPORT_SYMBOL vmlinux 0xc1dd4a7f	adb_request
+EXPORT_SYMBOL vmlinux 0xc21dc4d4	tty_name
+EXPORT_SYMBOL vmlinux 0xc251b5e0	dev_alloc_name
+EXPORT_SYMBOL vmlinux 0xc256e762	__bitmap_equal
+EXPORT_SYMBOL vmlinux 0xc2602502	scsi_device_resume
+EXPORT_SYMBOL vmlinux 0xc266ca2e	dm_io_client_resize
+EXPORT_SYMBOL vmlinux 0xc2820bf2	filemap_flush
+EXPORT_SYMBOL vmlinux 0xc2baca21	kthread_stop
+EXPORT_SYMBOL vmlinux 0xc2c99c2e	pipe_unlock
+EXPORT_SYMBOL vmlinux 0xc2ccf3f0	of_device_is_compatible
+EXPORT_SYMBOL vmlinux 0xc2d711e1	krealloc
+EXPORT_SYMBOL vmlinux 0xc2d7db81	zero_fill_bio
+EXPORT_SYMBOL vmlinux 0xc2e587d1	reset_devices
+EXPORT_SYMBOL vmlinux 0xc3229ae2	lock_super
+EXPORT_SYMBOL vmlinux 0xc325d8c6	mb_cache_entry_find_next
+EXPORT_SYMBOL vmlinux 0xc33f6f4c	on_each_cpu
+EXPORT_SYMBOL vmlinux 0xc345212f	pci_find_next_bus
+EXPORT_SYMBOL vmlinux 0xc368849f	nvram_sync
+EXPORT_SYMBOL vmlinux 0xc38d8356	scsi_is_target_device
+EXPORT_SYMBOL vmlinux 0xc38e1c11	directly_mappable_cdev_bdi
+EXPORT_SYMBOL vmlinux 0xc39c47af	__init_waitqueue_head
+EXPORT_SYMBOL vmlinux 0xc3cf1128	in_group_p
+EXPORT_SYMBOL vmlinux 0xc3e7a131	ethtool_op_set_flags
+EXPORT_SYMBOL vmlinux 0xc3f78fc7	call_usermodehelper_pipe
+EXPORT_SYMBOL vmlinux 0xc4026cfb	seq_open
+EXPORT_SYMBOL vmlinux 0xc407b112	netif_napi_del
+EXPORT_SYMBOL vmlinux 0xc4149551	nf_unregister_hook
+EXPORT_SYMBOL vmlinux 0xc449e51f	xfrm_state_flush
+EXPORT_SYMBOL vmlinux 0xc4912bda	nobh_write_end
+EXPORT_SYMBOL vmlinux 0xc499ae1e	kstrdup
+EXPORT_SYMBOL vmlinux 0xc4ab5af9	flush_tlb_range
+EXPORT_SYMBOL vmlinux 0xc4eaeb23	bio_put
+EXPORT_SYMBOL vmlinux 0xc4fa1f5e	give_up_console
+EXPORT_SYMBOL vmlinux 0xc4ff7306	locks_copy_lock
+EXPORT_SYMBOL vmlinux 0xc50775f4	dquot_drop
+EXPORT_SYMBOL vmlinux 0xc52f5714	fb_videomode_to_var
+EXPORT_SYMBOL vmlinux 0xc5318aae	neigh_table_init
+EXPORT_SYMBOL vmlinux 0xc5399c0e	xfrm4_rcv
+EXPORT_SYMBOL vmlinux 0xc549e697	xfrm_state_delete
+EXPORT_SYMBOL vmlinux 0xc5534d64	ioread16
+EXPORT_SYMBOL vmlinux 0xc562e1e7	scsi_target_resume
+EXPORT_SYMBOL vmlinux 0xc56d0a83	skb_clone
+EXPORT_SYMBOL vmlinux 0xc574b395	pci_add_new_bus
+EXPORT_SYMBOL vmlinux 0xc575771e	sg_free_table
+EXPORT_SYMBOL vmlinux 0xc57bca4d	skb_copy_expand
+EXPORT_SYMBOL vmlinux 0xc585e73e	inet_stream_connect
+EXPORT_SYMBOL vmlinux 0xc5894f0f	blk_sync_queue
+EXPORT_SYMBOL vmlinux 0xc5a65605	pci_write_vpd
+EXPORT_SYMBOL vmlinux 0xc5b89017	phy_mii_ioctl
+EXPORT_SYMBOL vmlinux 0xc6030a3e	dget_locked
+EXPORT_SYMBOL vmlinux 0xc633495b	schedule_work
+EXPORT_SYMBOL vmlinux 0xc6545ee4	key_validate
+EXPORT_SYMBOL vmlinux 0xc66af9d2	pci_domain_nr
+EXPORT_SYMBOL vmlinux 0xc67a4765	tcf_exts_destroy
+EXPORT_SYMBOL vmlinux 0xc684d9e4	__nla_reserve_nohdr
+EXPORT_SYMBOL vmlinux 0xc68dbe45	vm_insert_pfn
+EXPORT_SYMBOL vmlinux 0xc6b6bb1f	fb_firmware_edid
+EXPORT_SYMBOL vmlinux 0xc6b6d78c	wait_for_completion_timeout
+EXPORT_SYMBOL vmlinux 0xc6c9b74c	security_inode_init_security
+EXPORT_SYMBOL vmlinux 0xc6ff80fc	scsi_register_interface
+EXPORT_SYMBOL vmlinux 0xc7131591	pcibios_align_resource
+EXPORT_SYMBOL vmlinux 0xc71bc1b9	elv_rq_merge_ok
+EXPORT_SYMBOL vmlinux 0xc722227e	posix_acl_clone
+EXPORT_SYMBOL vmlinux 0xc76334f9	kill_anon_super
+EXPORT_SYMBOL vmlinux 0xc771b9b2	vfs_quota_enable
+EXPORT_SYMBOL vmlinux 0xc79bcd36	dm_vcalloc
+EXPORT_SYMBOL vmlinux 0xc7a4fbed	rtnl_lock
+EXPORT_SYMBOL vmlinux 0xc7ad2fb8	wait_for_completion_interruptible
+EXPORT_SYMBOL vmlinux 0xc7bfa7aa	prepare_kernel_cred
+EXPORT_SYMBOL vmlinux 0xc7ec6c27	strspn
+EXPORT_SYMBOL vmlinux 0xc7f08213	n_tty_ioctl_helper
+EXPORT_SYMBOL vmlinux 0xc7fc1468	check_disk_change
+EXPORT_SYMBOL vmlinux 0xc81eda66	arp_tbl
+EXPORT_SYMBOL vmlinux 0xc825299e	journal_dirty_metadata
+EXPORT_SYMBOL vmlinux 0xc836d26e	arp_broken_ops
+EXPORT_SYMBOL vmlinux 0xc8855a44	make_bad_inode
+EXPORT_SYMBOL vmlinux 0xc8a49578	pci_try_set_mwi
+EXPORT_SYMBOL vmlinux 0xc8b57c27	autoremove_wake_function
+EXPORT_SYMBOL vmlinux 0xc8caaa68	call_usermodehelper_freeinfo
+EXPORT_SYMBOL vmlinux 0xc8ff33d1	pci_unregister_driver
+EXPORT_SYMBOL vmlinux 0xc998d641	icmp_err_convert
+EXPORT_SYMBOL vmlinux 0xc9b90ff9	blk_queue_init_tags
+EXPORT_SYMBOL vmlinux 0xc9c90658	security_inode_permission
+EXPORT_SYMBOL vmlinux 0xca0edcc3	vlan_gro_frags
+EXPORT_SYMBOL vmlinux 0xca30662a	redirty_page_for_writepage
+EXPORT_SYMBOL vmlinux 0xca5dbc50	scsi_print_sense_hdr
+EXPORT_SYMBOL vmlinux 0xca61cade	scsi_add_host_with_dma
+EXPORT_SYMBOL vmlinux 0xca740ac3	skb_over_panic
+EXPORT_SYMBOL vmlinux 0xca825895	pmu_suspend
+EXPORT_SYMBOL vmlinux 0xca864991	key_type_keyring
+EXPORT_SYMBOL vmlinux 0xcacd272d	atomic64_sub_return
+EXPORT_SYMBOL vmlinux 0xcad08e48	mmu_hash_lock
+EXPORT_SYMBOL vmlinux 0xcae7cd3b	napi_reuse_skb
+EXPORT_SYMBOL vmlinux 0xcb07cc7b	generic_ide_ioctl
+EXPORT_SYMBOL vmlinux 0xcb1d0394	grab_cache_page_write_begin
+EXPORT_SYMBOL vmlinux 0xcb2cd4fe	ida_destroy
+EXPORT_SYMBOL vmlinux 0xcb5882fd	pcibios_resource_to_bus
+EXPORT_SYMBOL vmlinux 0xcb658794	of_node_put
+EXPORT_SYMBOL vmlinux 0xcb6beb40	hweight32
+EXPORT_SYMBOL vmlinux 0xcb7131fb	fb_get_options
+EXPORT_SYMBOL vmlinux 0xcb7bc48a	bit_waitqueue
+EXPORT_SYMBOL vmlinux 0xcb855bd8	matroxfb_g450_shutdown
+EXPORT_SYMBOL vmlinux 0xcbf10f00	mach_chrp
+EXPORT_SYMBOL vmlinux 0xcc175a83	dev_unicast_sync
+EXPORT_SYMBOL vmlinux 0xcc22b8f9	security_path_rename
+EXPORT_SYMBOL vmlinux 0xcc30d6a3	xfrm_init_state
+EXPORT_SYMBOL vmlinux 0xcc34d5ac	blk_rq_map_kern
+EXPORT_SYMBOL vmlinux 0xcc361c13	machine_id
+EXPORT_SYMBOL vmlinux 0xcc36f32e	fb_unregister_client
+EXPORT_SYMBOL vmlinux 0xcc5005fe	msleep_interruptible
+EXPORT_SYMBOL vmlinux 0xcc76c220	path_get
+EXPORT_SYMBOL vmlinux 0xcc7fa952	local_bh_enable_ip
+EXPORT_SYMBOL vmlinux 0xccac0b90	blk_queue_max_discard_sectors
+EXPORT_SYMBOL vmlinux 0xccbf09d7	udplite_table
+EXPORT_SYMBOL vmlinux 0xccfa66a3	flock_lock_file_wait
+EXPORT_SYMBOL vmlinux 0xcd138625	vfs_unlink
+EXPORT_SYMBOL vmlinux 0xcd19e925	i2c_smbus_read_i2c_block_data
+EXPORT_SYMBOL vmlinux 0xcd3a55fa	of_find_node_with_property
+EXPORT_SYMBOL vmlinux 0xcd3c6af2	put_page
+EXPORT_SYMBOL vmlinux 0xcd7f9ea8	unbind_con_driver
+EXPORT_SYMBOL vmlinux 0xcd83d335	of_find_node_by_type
+EXPORT_SYMBOL vmlinux 0xcd85b155	bmap
+EXPORT_SYMBOL vmlinux 0xcd916e44	unlock_buffer
+EXPORT_SYMBOL vmlinux 0xcd9e12eb	open_exec
+EXPORT_SYMBOL vmlinux 0xcdafb609	blk_rq_map_integrity_sg
+EXPORT_SYMBOL vmlinux 0xcdb3c713	netdev_features_change
+EXPORT_SYMBOL vmlinux 0xcdb845f7	netlink_kernel_create
+EXPORT_SYMBOL vmlinux 0xcdc3cf9d	tty_get_baud_rate
+EXPORT_SYMBOL vmlinux 0xcddfe591	proc_doulongvec_minmax
+EXPORT_SYMBOL vmlinux 0xcde37beb	idr_replace
+EXPORT_SYMBOL vmlinux 0xcdf4e628	revalidate_disk
+EXPORT_SYMBOL vmlinux 0xce2133cd	kobject_init
+EXPORT_SYMBOL vmlinux 0xce29f299	dev_driver_string
+EXPORT_SYMBOL vmlinux 0xce36ded6	sysctl_tcp_mem
+EXPORT_SYMBOL vmlinux 0xce37dddb	audit_log_format
+EXPORT_SYMBOL vmlinux 0xce3fac22	sock_get_timestamp
+EXPORT_SYMBOL vmlinux 0xce409cda	pmac_set_early_video_resume
+EXPORT_SYMBOL vmlinux 0xce42386a	ipv6_skip_exthdr
+EXPORT_SYMBOL vmlinux 0xce48e6ad	security_path_mknod
+EXPORT_SYMBOL vmlinux 0xce57a7ee	cdev_alloc
+EXPORT_SYMBOL vmlinux 0xce5ac24f	zlib_inflate_workspacesize
+EXPORT_SYMBOL vmlinux 0xce941938	iget_failed
+EXPORT_SYMBOL vmlinux 0xcea7f94c	touch_atime
+EXPORT_SYMBOL vmlinux 0xcee31c95	serio_unregister_driver
+EXPORT_SYMBOL vmlinux 0xcefed4b3	register_netdevice
+EXPORT_SYMBOL vmlinux 0xcf12bc05	pci_find_capability
+EXPORT_SYMBOL vmlinux 0xcf20efa8	follow_down
+EXPORT_SYMBOL vmlinux 0xcf2554ab	skb_realloc_headroom
+EXPORT_SYMBOL vmlinux 0xcf2bbcbb	sock_setsockopt
+EXPORT_SYMBOL vmlinux 0xcf47fb0c	dcache_dir_close
+EXPORT_SYMBOL vmlinux 0xcf54adef	skb_prepare_seq_read
+EXPORT_SYMBOL vmlinux 0xcf59d70f	llc_add_pack
+EXPORT_SYMBOL vmlinux 0xcf735e18	proc_doulongvec_ms_jiffies_minmax
+EXPORT_SYMBOL vmlinux 0xcf8ddf3a	xfrm_state_walk
+EXPORT_SYMBOL vmlinux 0xcf8ee477	of_find_i2c_device_by_node
+EXPORT_SYMBOL vmlinux 0xcf901697	__strnlen_user
+EXPORT_SYMBOL vmlinux 0xcfaf79ba	mempool_alloc
+EXPORT_SYMBOL vmlinux 0xcfb9006e	jiffies_to_timeval
+EXPORT_SYMBOL vmlinux 0xcfd7ca65	sock_alloc_send_skb
+EXPORT_SYMBOL vmlinux 0xcfe26253	elevator_exit
+EXPORT_SYMBOL vmlinux 0xcff53400	kref_put
+EXPORT_SYMBOL vmlinux 0xd00652f3	timecompare_offset
+EXPORT_SYMBOL vmlinux 0xd0181f4f	__bitmap_xor
+EXPORT_SYMBOL vmlinux 0xd036596d	__generic_file_aio_write
+EXPORT_SYMBOL vmlinux 0xd03b6a0b	sock_queue_rcv_skb
+EXPORT_SYMBOL vmlinux 0xd0414d4d	jbd2_journal_extend
+EXPORT_SYMBOL vmlinux 0xd0a45fa5	pmu_enable_irled
+EXPORT_SYMBOL vmlinux 0xd0b5fed5	tty_port_lower_dtr_rts
+EXPORT_SYMBOL vmlinux 0xd0ee38b8	schedule_timeout_uninterruptible
+EXPORT_SYMBOL vmlinux 0xd0f39c22	pci_find_parent_resource
+EXPORT_SYMBOL vmlinux 0xd0fb7cae	blk_requeue_request
+EXPORT_SYMBOL vmlinux 0xd10aa364	dev_get_stats
+EXPORT_SYMBOL vmlinux 0xd1135e5d	scsi_target_quiesce
+EXPORT_SYMBOL vmlinux 0xd11712b2	of_node_get
+EXPORT_SYMBOL vmlinux 0xd11bbde9	cap_netlink_recv
+EXPORT_SYMBOL vmlinux 0xd1262886	rtas_data_buf
+EXPORT_SYMBOL vmlinux 0xd12b03c5	inode_newsize_ok
+EXPORT_SYMBOL vmlinux 0xd12fe5ac	proc_dointvec_ms_jiffies
+EXPORT_SYMBOL vmlinux 0xd187fb5e	cancel_dirty_page
+EXPORT_SYMBOL vmlinux 0xd1e6c046	unregister_filesystem
+EXPORT_SYMBOL vmlinux 0xd22ea007	file_fsync
+EXPORT_SYMBOL vmlinux 0xd230e2b0	end_page_writeback
+EXPORT_SYMBOL vmlinux 0xd251d7b0	security_socket_getpeersec_dgram
+EXPORT_SYMBOL vmlinux 0xd2555f19	jiffies_64_to_clock_t
+EXPORT_SYMBOL vmlinux 0xd2561914	tcp_make_synack
+EXPORT_SYMBOL vmlinux 0xd25d4f74	console_blank_hook
+EXPORT_SYMBOL vmlinux 0xd2760f47	unlock_new_inode
+EXPORT_SYMBOL vmlinux 0xd2965f6f	kthread_should_stop
+EXPORT_SYMBOL vmlinux 0xd2c2243d	i2c_verify_client
+EXPORT_SYMBOL vmlinux 0xd2c9f8cb	__ps2_command
+EXPORT_SYMBOL vmlinux 0xd3073bcc	tcp_md5_hash_skb_data
+EXPORT_SYMBOL vmlinux 0xd394b577	neigh_parms_alloc
+EXPORT_SYMBOL vmlinux 0xd3a6f338	dquot_release
+EXPORT_SYMBOL vmlinux 0xd3acd806	__nla_put_nohdr
+EXPORT_SYMBOL vmlinux 0xd3bd7f61	hippi_type_trans
+EXPORT_SYMBOL vmlinux 0xd3db0a23	elv_dispatch_add_tail
+EXPORT_SYMBOL vmlinux 0xd3e1503b	devm_ioremap
+EXPORT_SYMBOL vmlinux 0xd3e6f60d	cpu_possible_mask
+EXPORT_SYMBOL vmlinux 0xd3e9c058	i2c_smbus_read_byte
+EXPORT_SYMBOL vmlinux 0xd3ed0108	d_splice_alias
+EXPORT_SYMBOL vmlinux 0xd409383c	pmu_request
+EXPORT_SYMBOL vmlinux 0xd40c15d5	jbd2_journal_unlock_updates
+EXPORT_SYMBOL vmlinux 0xd40e77d6	end_buffer_read_sync
+EXPORT_SYMBOL vmlinux 0xd418e1c0	adjust_resource
+EXPORT_SYMBOL vmlinux 0xd426b0ae	i2c_del_adapter
+EXPORT_SYMBOL vmlinux 0xd432de1a	pci_bus_write_config_word
+EXPORT_SYMBOL vmlinux 0xd4386ec9	locks_init_lock
+EXPORT_SYMBOL vmlinux 0xd465fbea	__sk_mem_reclaim
+EXPORT_SYMBOL vmlinux 0xd46876c0	bio_unmap_user
+EXPORT_SYMBOL vmlinux 0xd498fe6f	inet_csk_init_xmit_timers
+EXPORT_SYMBOL vmlinux 0xd4abba34	neigh_seq_stop
+EXPORT_SYMBOL vmlinux 0xd4be4901	tty_wait_until_sent
+EXPORT_SYMBOL vmlinux 0xd4e94dd9	eth_mac_addr
+EXPORT_SYMBOL vmlinux 0xd5263820	mb_cache_destroy
+EXPORT_SYMBOL vmlinux 0xd55acff0	gnet_stats_copy_queue
+EXPORT_SYMBOL vmlinux 0xd5688a7a	radix_tree_insert
+EXPORT_SYMBOL vmlinux 0xd57f8789	iommu_num_pages
+EXPORT_SYMBOL vmlinux 0xd5892252	abort_creds
+EXPORT_SYMBOL vmlinux 0xd591b684	thaw_process
+EXPORT_SYMBOL vmlinux 0xd5998091	__set_page_dirty_nobuffers
+EXPORT_SYMBOL vmlinux 0xd5b2e52a	single_step_exception
+EXPORT_SYMBOL vmlinux 0xd5da1a4e	of_unregister_driver
+EXPORT_SYMBOL vmlinux 0xd5e8444a	__div64_32
+EXPORT_SYMBOL vmlinux 0xd5ef29c6	vga_put
+EXPORT_SYMBOL vmlinux 0xd623c851	bio_free
+EXPORT_SYMBOL vmlinux 0xd627480b	strncat
+EXPORT_SYMBOL vmlinux 0xd62c833f	schedule_timeout
+EXPORT_SYMBOL vmlinux 0xd631ebd9	__break_lease
+EXPORT_SYMBOL vmlinux 0xd64e5071	cdev_init
+EXPORT_SYMBOL vmlinux 0xd6844ba3	pci_save_state
+EXPORT_SYMBOL vmlinux 0xd68bf190	napi_get_frags
+EXPORT_SYMBOL vmlinux 0xd69b30e0	atomic64_add_unless
+EXPORT_SYMBOL vmlinux 0xd69ebc51	_read_trylock
+EXPORT_SYMBOL vmlinux 0xd6a26bb7	backlight_device_unregister
+EXPORT_SYMBOL vmlinux 0xd6a78d08	smp_call_function_single
+EXPORT_SYMBOL vmlinux 0xd6b590da	dev_mc_delete
+EXPORT_SYMBOL vmlinux 0xd6df4ad0	fb_get_buffer_offset
+EXPORT_SYMBOL vmlinux 0xd6e4ebdc	__lock_buffer
+EXPORT_SYMBOL vmlinux 0xd6ee688f	vmalloc
+EXPORT_SYMBOL vmlinux 0xd7154121	down_interruptible
+EXPORT_SYMBOL vmlinux 0xd7296bf5	dmam_pool_destroy
+EXPORT_SYMBOL vmlinux 0xd757d4be	security_sb_set_mnt_opts
+EXPORT_SYMBOL vmlinux 0xd768bc52	__dst_free
+EXPORT_SYMBOL vmlinux 0xd7734727	tty_schedule_flip
+EXPORT_SYMBOL vmlinux 0xd77a5aa5	__bitmap_and
+EXPORT_SYMBOL vmlinux 0xd79b5a02	allow_signal
+EXPORT_SYMBOL vmlinux 0xd7ae541c	pci_request_selected_regions
+EXPORT_SYMBOL vmlinux 0xd7d043b4	skb_tx_hash
+EXPORT_SYMBOL vmlinux 0xd7d4dd3a	simple_transaction_set
+EXPORT_SYMBOL vmlinux 0xd7dfbac9	udplite_prot
+EXPORT_SYMBOL vmlinux 0xd80cf174	truncate_inode_pages
+EXPORT_SYMBOL vmlinux 0xd8186842	tcp_disconnect
+EXPORT_SYMBOL vmlinux 0xd819b743	bh_uptodate_or_lock
+EXPORT_SYMBOL vmlinux 0xd83791bc	nf_conntrack_destroy
+EXPORT_SYMBOL vmlinux 0xd846bc56	free_task
+EXPORT_SYMBOL vmlinux 0xd85ba858	bd_set_size
+EXPORT_SYMBOL vmlinux 0xd8735b9f	find_get_pages_contig
+EXPORT_SYMBOL vmlinux 0xd8834ecd	napi_gro_receive
+EXPORT_SYMBOL vmlinux 0xd88b2c0e	skb_trim
+EXPORT_SYMBOL vmlinux 0xd890187a	filemap_fdatawrite_range
+EXPORT_SYMBOL vmlinux 0xd89da37f	movable_zone
+EXPORT_SYMBOL vmlinux 0xd8a2ab95	in_egroup_p
+EXPORT_SYMBOL vmlinux 0xd8e20970	kobject_get
+EXPORT_SYMBOL vmlinux 0xd8e484f0	register_chrdev_region
+EXPORT_SYMBOL vmlinux 0xd8ef16b8	mutex_lock
+EXPORT_SYMBOL vmlinux 0xd9188449	ip_mc_join_group
+EXPORT_SYMBOL vmlinux 0xd91a290c	__pskb_pull_tail
+EXPORT_SYMBOL vmlinux 0xd921dc17	rtc_dev_update_irq_enable_emul
+EXPORT_SYMBOL vmlinux 0xd92514ca	agp_special_page
+EXPORT_SYMBOL vmlinux 0xd92cacd1	phy_start_aneg
+EXPORT_SYMBOL vmlinux 0xd963a74a	flush_delayed_work
+EXPORT_SYMBOL vmlinux 0xd96bcc1d	tr_type_trans
+EXPORT_SYMBOL vmlinux 0xd96c8608	interruptible_sleep_on_timeout
+EXPORT_SYMBOL vmlinux 0xd977cf49	__locks_copy_lock
+EXPORT_SYMBOL vmlinux 0xd97be3e8	fb_set_var
+EXPORT_SYMBOL vmlinux 0xd97dacc1	scsi_adjust_queue_depth
+EXPORT_SYMBOL vmlinux 0xd985dc99	mempool_free_pages
+EXPORT_SYMBOL vmlinux 0xd9a4d833	sock_wfree
+EXPORT_SYMBOL vmlinux 0xd9b9d301	simple_write_end
+EXPORT_SYMBOL vmlinux 0xd9bac924	tty_termios_copy_hw
+EXPORT_SYMBOL vmlinux 0xd9ce8f0c	strnlen
+EXPORT_SYMBOL vmlinux 0xd9ead95d	dquot_destroy
+EXPORT_SYMBOL vmlinux 0xda1a7335	kasprintf
+EXPORT_SYMBOL vmlinux 0xda408418	request_firmware_nowait
+EXPORT_SYMBOL vmlinux 0xda45a715	unmap_mapping_range
+EXPORT_SYMBOL vmlinux 0xda51ecb8	__xfrm_state_destroy
+EXPORT_SYMBOL vmlinux 0xda7ca6cb	fb_mode_is_equal
+EXPORT_SYMBOL vmlinux 0xda803864	insert_inode_locked4
+EXPORT_SYMBOL vmlinux 0xda8af7ad	fb_find_nearest_mode
+EXPORT_SYMBOL vmlinux 0xdaa57ec3	totalhigh_pages
+EXPORT_SYMBOL vmlinux 0xdab1efcf	of_device_uevent
+EXPORT_SYMBOL vmlinux 0xdac6b2c3	jbd2_journal_update_format
+EXPORT_SYMBOL vmlinux 0xdad0d369	pci_device_from_OF_node
+EXPORT_SYMBOL vmlinux 0xdaf12a81	write_one_page
+EXPORT_SYMBOL vmlinux 0xdb056344	arp_send
+EXPORT_SYMBOL vmlinux 0xdb09708f	__wake_up
+EXPORT_SYMBOL vmlinux 0xdb22c509	journal_destroy
+EXPORT_SYMBOL vmlinux 0xdb38b2a4	qdisc_list_del
+EXPORT_SYMBOL vmlinux 0xdb3dade5	xfrm_find_acq_byseq
+EXPORT_SYMBOL vmlinux 0xdb4c88b4	groups_alloc
+EXPORT_SYMBOL vmlinux 0xdb558ba6	vfs_set_dqinfo
+EXPORT_SYMBOL vmlinux 0xdb5f3217	elevator_init
+EXPORT_SYMBOL vmlinux 0xdb63dd6e	eth_header_cache
+EXPORT_SYMBOL vmlinux 0xdb7de000	neigh_parms_release
+EXPORT_SYMBOL vmlinux 0xdb864d65	iov_iter_single_seg_count
+EXPORT_SYMBOL vmlinux 0xdbb6343a	wait_on_sync_kiocb
+EXPORT_SYMBOL vmlinux 0xdbb8b0ca	matroxfb_vgaHWinit
+EXPORT_SYMBOL vmlinux 0xdbcd416e	sysctl_ip_nonlocal_bind
+EXPORT_SYMBOL vmlinux 0xdbfccbf1	tty_mutex
+EXPORT_SYMBOL vmlinux 0xdc047fc4	scsi_dev_info_list_add_keyed
+EXPORT_SYMBOL vmlinux 0xdc053205	udp_memory_allocated
+EXPORT_SYMBOL vmlinux 0xdc09d0ee	scsi_set_medium_removal
+EXPORT_SYMBOL vmlinux 0xdc14eda7	pci_pci_problems
+EXPORT_SYMBOL vmlinux 0xdc15e4d3	__nla_put
+EXPORT_SYMBOL vmlinux 0xdc2adb35	add_taint
+EXPORT_SYMBOL vmlinux 0xdc348554	__blk_end_request_all
+EXPORT_SYMBOL vmlinux 0xdc43a9c8	daemonize
+EXPORT_SYMBOL vmlinux 0xdc4489ad	invalidate_partition
+EXPORT_SYMBOL vmlinux 0xdc82e4ca	xfrm_policy_byid
+EXPORT_SYMBOL vmlinux 0xdca0e950	genl_register_family
+EXPORT_SYMBOL vmlinux 0xdcb0349b	sys_close
+EXPORT_SYMBOL vmlinux 0xdcdf7120	neigh_for_each
+EXPORT_SYMBOL vmlinux 0xdce0246a	seq_puts
+EXPORT_SYMBOL vmlinux 0xdcefb9a5	pmu_resume
+EXPORT_SYMBOL vmlinux 0xdcfa18a9	lookup_hash
+EXPORT_SYMBOL vmlinux 0xdcfe71a0	note_scsi_host
+EXPORT_SYMBOL vmlinux 0xdd0a2ba2	strlcat
+EXPORT_SYMBOL vmlinux 0xdd166882	jbd2_journal_start_commit
+EXPORT_SYMBOL vmlinux 0xdd27e855	kmem_ptr_validate
+EXPORT_SYMBOL vmlinux 0xdd27fa87	memchr
+EXPORT_SYMBOL vmlinux 0xdd454085	generic_write_checks
+EXPORT_SYMBOL vmlinux 0xdd5a37a7	_spin_lock_irqsave
+EXPORT_SYMBOL vmlinux 0xdd6bfccd	radix_tree_tag_set
+EXPORT_SYMBOL vmlinux 0xdda3ea2a	of_phy_find_device
+EXPORT_SYMBOL vmlinux 0xddbeb94a	input_register_device
+EXPORT_SYMBOL vmlinux 0xddc5fd5a	sock_no_getname
+EXPORT_SYMBOL vmlinux 0xdde0d1ef	of_find_all_nodes
+EXPORT_SYMBOL vmlinux 0xdde25489	_write_lock
+EXPORT_SYMBOL vmlinux 0xddfc8251	gen_pool_add
+EXPORT_SYMBOL vmlinux 0xde31b902	blk_limits_io_opt
+EXPORT_SYMBOL vmlinux 0xde49779b	swiotlb_free_coherent
+EXPORT_SYMBOL vmlinux 0xde4bdfcf	bio_add_pc_page
+EXPORT_SYMBOL vmlinux 0xde502118	unregister_sysrq_key
+EXPORT_SYMBOL vmlinux 0xde5b3e28	iw_handler_set_thrspy
+EXPORT_SYMBOL vmlinux 0xde75b689	set_irq_type
+EXPORT_SYMBOL vmlinux 0xde7db8a3	simple_release_fs
+EXPORT_SYMBOL vmlinux 0xde9360ba	totalram_pages
+EXPORT_SYMBOL vmlinux 0xdee8f217	tty_port_free_xmit_buf
+EXPORT_SYMBOL vmlinux 0xdf08fff7	xfrm_state_check_expire
+EXPORT_SYMBOL vmlinux 0xdf0b8d60	dev_remove_pack
+EXPORT_SYMBOL vmlinux 0xdf4c8767	ns_to_timeval
+EXPORT_SYMBOL vmlinux 0xdf578864	__devm_release_region
+EXPORT_SYMBOL vmlinux 0xdf5b5b49	of_get_cpu_node
+EXPORT_SYMBOL vmlinux 0xdf60cc27	__print_symbol
+EXPORT_SYMBOL vmlinux 0xdf6ee89f	phy_disconnect
+EXPORT_SYMBOL vmlinux 0xdf7837b1	netdev_boot_setup_check
+EXPORT_SYMBOL vmlinux 0xdf819315	blk_queue_end_tag
+EXPORT_SYMBOL vmlinux 0xdf8ad9fa	complete_request_key
+EXPORT_SYMBOL vmlinux 0xdf929370	fs_overflowgid
+EXPORT_SYMBOL vmlinux 0xdfb0e65b	tty_port_alloc_xmit_buf
+EXPORT_SYMBOL vmlinux 0xdfc38a31	nf_log_register
+EXPORT_SYMBOL vmlinux 0xdfd5d2b3	kernel_getsockopt
+EXPORT_SYMBOL vmlinux 0xdfe17ce9	iov_iter_copy_from_user_atomic
+EXPORT_SYMBOL vmlinux 0xdff43ed4	__debugger
+EXPORT_SYMBOL vmlinux 0xdff56e64	adb_poll
+EXPORT_SYMBOL vmlinux 0xdff604c3	scsi_device_quiesce
+EXPORT_SYMBOL vmlinux 0xdffe4fbe	default_file_splice_read
+EXPORT_SYMBOL vmlinux 0xe0299580	matroxfb_DAC_in
+EXPORT_SYMBOL vmlinux 0xe03e9bcd	block_sync_page
+EXPORT_SYMBOL vmlinux 0xe041dc50	mdiobus_scan
+EXPORT_SYMBOL vmlinux 0xe05bfab8	jbd2_journal_flush
+EXPORT_SYMBOL vmlinux 0xe061d146	xfrm_policy_unregister_afinfo
+EXPORT_SYMBOL vmlinux 0xe071b5ed	dev_get_flags
+EXPORT_SYMBOL vmlinux 0xe075d6eb	iter_div_u64_rem
+EXPORT_SYMBOL vmlinux 0xe088dfa0	unlock_super
+EXPORT_SYMBOL vmlinux 0xe0a69a89	__pagevec_release
+EXPORT_SYMBOL vmlinux 0xe0b13336	argv_free
+EXPORT_SYMBOL vmlinux 0xe0bc24a1	param_set_ushort
+EXPORT_SYMBOL vmlinux 0xe0cda45c	sg_miter_stop
+EXPORT_SYMBOL vmlinux 0xe0ce8ef7	scsi_add_device
+EXPORT_SYMBOL vmlinux 0xe0db8530	ps2_command
+EXPORT_SYMBOL vmlinux 0xe0f4c581	pmac_suspend_agp_for_card
+EXPORT_SYMBOL vmlinux 0xe0fcc1b2	bio_integrity_prep
+EXPORT_SYMBOL vmlinux 0xe113bbbc	csum_partial
+EXPORT_SYMBOL vmlinux 0xe11f60b6	pci_scan_bus_parented
+EXPORT_SYMBOL vmlinux 0xe13821f5	__free_pages
+EXPORT_SYMBOL vmlinux 0xe159f842	generic_file_llseek
+EXPORT_SYMBOL vmlinux 0xe16ab5c2	sk_send_sigurg
+EXPORT_SYMBOL vmlinux 0xe1761617	security_inet_conn_request
+EXPORT_SYMBOL vmlinux 0xe1961514	scsi_finish_command
+EXPORT_SYMBOL vmlinux 0xe1976038	pipe_to_file
+EXPORT_SYMBOL vmlinux 0xe1a97a4f	tcf_em_tree_destroy
+EXPORT_SYMBOL vmlinux 0xe1ae6594	read_cache_page_gfp
+EXPORT_SYMBOL vmlinux 0xe1bdbbce	set_security_override
+EXPORT_SYMBOL vmlinux 0xe1e56248	__blk_run_queue
+EXPORT_SYMBOL vmlinux 0xe1fcfebf	dev_mc_add
+EXPORT_SYMBOL vmlinux 0xe20e2640	pci_dev_put
+EXPORT_SYMBOL vmlinux 0xe2304303	mac_map_monitor_sense
+EXPORT_SYMBOL vmlinux 0xe23259e7	matroxfb_g450_setclk
+EXPORT_SYMBOL vmlinux 0xe233157a	nf_log_packet
+EXPORT_SYMBOL vmlinux 0xe23ae481	blk_iopoll_complete
+EXPORT_SYMBOL vmlinux 0xe24d3a97	jiffies_64
+EXPORT_SYMBOL vmlinux 0xe25ea9d3	blk_queue_stack_limits
+EXPORT_SYMBOL vmlinux 0xe263c90a	sock_wmalloc
+EXPORT_SYMBOL vmlinux 0xe2c9fc98	of_parse_phandle
+EXPORT_SYMBOL vmlinux 0xe2d5255a	strcmp
+EXPORT_SYMBOL vmlinux 0xe2d80be3	dcache_dir_lseek
+EXPORT_SYMBOL vmlinux 0xe2e0c7c6	__flush_icache_range
+EXPORT_SYMBOL vmlinux 0xe2e3e0f0	tcp_init_xmit_timers
+EXPORT_SYMBOL vmlinux 0xe2e572b1	textsearch_prepare
+EXPORT_SYMBOL vmlinux 0xe2e8065e	memdup_user
+EXPORT_SYMBOL vmlinux 0xe2ef586c	generic_removexattr
+EXPORT_SYMBOL vmlinux 0xe2f03739	jbd2_journal_lock_updates
+EXPORT_SYMBOL vmlinux 0xe2fae716	kmemdup
+EXPORT_SYMBOL vmlinux 0xe31df9e9	of_device_alloc
+EXPORT_SYMBOL vmlinux 0xe33f0ebd	pci_clear_mwi
+EXPORT_SYMBOL vmlinux 0xe345b834	journal_force_commit
+EXPORT_SYMBOL vmlinux 0xe36d00bc	con_set_default_unimap
+EXPORT_SYMBOL vmlinux 0xe3882e03	netdev_state_change
+EXPORT_SYMBOL vmlinux 0xe389262e	ip_dev_find
+EXPORT_SYMBOL vmlinux 0xe394ae60	bioset_free
+EXPORT_SYMBOL vmlinux 0xe39d49b3	test_set_page_writeback
+EXPORT_SYMBOL vmlinux 0xe3ce13dd	should_remove_suid
+EXPORT_SYMBOL vmlinux 0xe3f9196b	simple_transaction_get
+EXPORT_SYMBOL vmlinux 0xe412eec6	vlan_ioctl_set
+EXPORT_SYMBOL vmlinux 0xe427f630	bio_pair_release
+EXPORT_SYMBOL vmlinux 0xe44290ac	blk_plug_device_unlocked
+EXPORT_SYMBOL vmlinux 0xe44ade30	simple_fill_super
+EXPORT_SYMBOL vmlinux 0xe4515758	dst_release
+EXPORT_SYMBOL vmlinux 0xe484e35f	ioread32
+EXPORT_SYMBOL vmlinux 0xe48fcef5	add_disk
+EXPORT_SYMBOL vmlinux 0xe4b21311	xfrm_cfg_mutex
+EXPORT_SYMBOL vmlinux 0xe4f1695e	cookie_check_timestamp
+EXPORT_SYMBOL vmlinux 0xe502ba6f	load_nls
+EXPORT_SYMBOL vmlinux 0xe5077a8f	mempool_destroy
+EXPORT_SYMBOL vmlinux 0xe523ad75	synchronize_irq
+EXPORT_SYMBOL vmlinux 0xe573d0b6	neigh_seq_next
+EXPORT_SYMBOL vmlinux 0xe57878a1	in6_pton
+EXPORT_SYMBOL vmlinux 0xe5867808	dlci_ioctl_set
+EXPORT_SYMBOL vmlinux 0xe5a892aa	i2c_smbus_write_word_data
+EXPORT_SYMBOL vmlinux 0xe5c17fad	scsi_host_set_state
+EXPORT_SYMBOL vmlinux 0xe5c78a99	do_blank_screen
+EXPORT_SYMBOL vmlinux 0xe5d6796f	put_tty_driver
+EXPORT_SYMBOL vmlinux 0xe5ed5467	xfrm_policy_walk_init
+EXPORT_SYMBOL vmlinux 0xe63f54c8	llc_sap_list_lock
+EXPORT_SYMBOL vmlinux 0xe6518ff5	neigh_event_ns
+EXPORT_SYMBOL vmlinux 0xe697d108	__blk_iopoll_complete
+EXPORT_SYMBOL vmlinux 0xe6a3ab52	scm_fp_dup
+EXPORT_SYMBOL vmlinux 0xe6d566dd	xfrm_policy_alloc
+EXPORT_SYMBOL vmlinux 0xe6dd236d	clear_pages
+EXPORT_SYMBOL vmlinux 0xe6ebc016	key_create_or_update
+EXPORT_SYMBOL vmlinux 0xe6fbe430	can_do_mlock
+EXPORT_SYMBOL vmlinux 0xe6fbe5b8	inet_select_addr
+EXPORT_SYMBOL vmlinux 0xe70a8fc6	block_fsync
+EXPORT_SYMBOL vmlinux 0xe714375c	__tasklet_hi_schedule_first
+EXPORT_SYMBOL vmlinux 0xe7212514	gnet_stats_finish_copy
+EXPORT_SYMBOL vmlinux 0xe7ad6a6b	__task_pid_nr_ns
+EXPORT_SYMBOL vmlinux 0xe7c03516	skb_push
+EXPORT_SYMBOL vmlinux 0xe7ce7439	_memcpy_fromio
+EXPORT_SYMBOL vmlinux 0xe7d2aca1	security_sk_classify_flow
+EXPORT_SYMBOL vmlinux 0xe7d4daac	seq_list_next
+EXPORT_SYMBOL vmlinux 0xe7e33d90	find_vma
+EXPORT_SYMBOL vmlinux 0xe7e9799e	task_tgid_nr_ns
+EXPORT_SYMBOL vmlinux 0xe82842e3	jbd2_journal_init_jbd_inode
+EXPORT_SYMBOL vmlinux 0xe82e44f2	take_over_console
+EXPORT_SYMBOL vmlinux 0xe830ef74	bio_integrity_trim
+EXPORT_SYMBOL vmlinux 0xe83cca54	__scsi_add_device
+EXPORT_SYMBOL vmlinux 0xe845ee8e	ip_mc_inc_group
+EXPORT_SYMBOL vmlinux 0xe8480aa6	prepare_binprm
+EXPORT_SYMBOL vmlinux 0xe88c842d	__dev_getfirstbyhwtype
+EXPORT_SYMBOL vmlinux 0xe8974792	read_cache_pages
+EXPORT_SYMBOL vmlinux 0xe8a6c06d	skb_copy_and_csum_bits
+EXPORT_SYMBOL vmlinux 0xe8aada41	devm_ioport_map
+EXPORT_SYMBOL vmlinux 0xe8cd902e	hweight16
+EXPORT_SYMBOL vmlinux 0xe8e8dfdd	dev_mc_sync
+EXPORT_SYMBOL vmlinux 0xe90dcae0	__request_module
+EXPORT_SYMBOL vmlinux 0xe914e41e	strcpy
+EXPORT_SYMBOL vmlinux 0xe94824d2	__serio_register_port
+EXPORT_SYMBOL vmlinux 0xe9572b06	switch_mmu_context
+EXPORT_SYMBOL vmlinux 0xe9646822	netlink_dump_start
+EXPORT_SYMBOL vmlinux 0xe9868ad1	i8042_check_port_owner
+EXPORT_SYMBOL vmlinux 0xe988979a	scsi_eh_finish_cmd
+EXPORT_SYMBOL vmlinux 0xe98f1d8f	of_n_size_cells
+EXPORT_SYMBOL vmlinux 0xe9a266d4	genphy_update_link
+EXPORT_SYMBOL vmlinux 0xe9d9240a	of_release_dev
+EXPORT_SYMBOL vmlinux 0xe9e64c58	bio_alloc_bioset
+EXPORT_SYMBOL vmlinux 0xe9f9a791	tcf_unregister_action
+EXPORT_SYMBOL vmlinux 0xea054b22	nla_policy_len
+EXPORT_SYMBOL vmlinux 0xea10212a	int_to_scsilun
+EXPORT_SYMBOL vmlinux 0xea10655a	__bitmap_intersects
+EXPORT_SYMBOL vmlinux 0xea147363	printk
+EXPORT_SYMBOL vmlinux 0xea2d33a2	radix_tree_gang_lookup_slot
+EXPORT_SYMBOL vmlinux 0xea3e021d	i2c_master_recv
+EXPORT_SYMBOL vmlinux 0xea7987f1	key_update
+EXPORT_SYMBOL vmlinux 0xea858cb5	radix_tree_gang_lookup_tag
+EXPORT_SYMBOL vmlinux 0xea884e8e	setup_new_exec
+EXPORT_SYMBOL vmlinux 0xea889cd3	scsi_cmd_print_sense_hdr
+EXPORT_SYMBOL vmlinux 0xeaa01b3c	pskb_copy
+EXPORT_SYMBOL vmlinux 0xeaa98607	__kfree_skb
+EXPORT_SYMBOL vmlinux 0xeab546ed	bio_integrity_alloc
+EXPORT_SYMBOL vmlinux 0xeae6a1ad	of_find_node_by_phandle
+EXPORT_SYMBOL vmlinux 0xeaea5f8c	__xfrm_policy_check
+EXPORT_SYMBOL vmlinux 0xeafc7c27	key_revoke
+EXPORT_SYMBOL vmlinux 0xeb542390	unregister_tcf_proto_ops
+EXPORT_SYMBOL vmlinux 0xeb60b49e	phy_detach
+EXPORT_SYMBOL vmlinux 0xeb7a7963	blk_put_request
+EXPORT_SYMBOL vmlinux 0xeb8f54b3	strstrip
+EXPORT_SYMBOL vmlinux 0xeb938a44	sock_common_getsockopt
+EXPORT_SYMBOL vmlinux 0xeba2a1f7	rtas_indicator_present
+EXPORT_SYMBOL vmlinux 0xeba5c54b	of_platform_device_create
+EXPORT_SYMBOL vmlinux 0xebaa0ef7	dmam_free_noncoherent
+EXPORT_SYMBOL vmlinux 0xebb358ac	tty_port_close_start
+EXPORT_SYMBOL vmlinux 0xebc76942	input_open_device
+EXPORT_SYMBOL vmlinux 0xebd273a6	strict_strtoull
+EXPORT_SYMBOL vmlinux 0xebe697c8	km_query
+EXPORT_SYMBOL vmlinux 0xec5f8b99	sock_no_mmap
+EXPORT_SYMBOL vmlinux 0xec794ba0	__send_remote_softirq
+EXPORT_SYMBOL vmlinux 0xec80116f	serio_reconnect
+EXPORT_SYMBOL vmlinux 0xec9006a7	tcp_v4_conn_request
+EXPORT_SYMBOL vmlinux 0xecc5232d	scsi_dma_map
+EXPORT_SYMBOL vmlinux 0xed26356d	remove_proc_entry
+EXPORT_SYMBOL vmlinux 0xed49ba48	downgrade_write
+EXPORT_SYMBOL vmlinux 0xed79da6d	blk_plug_device
+EXPORT_SYMBOL vmlinux 0xed88f7b3	scsi_remove_target
+EXPORT_SYMBOL vmlinux 0xed8dd616	inet_csk_reset_keepalive_timer
+EXPORT_SYMBOL vmlinux 0xed917806	__dev_get_by_name
+EXPORT_SYMBOL vmlinux 0xeda0d76e	gen_estimator_active
+EXPORT_SYMBOL vmlinux 0xeda79f9e	tcp_tso_segment
+EXPORT_SYMBOL vmlinux 0xedac92ee	of_match_device
+EXPORT_SYMBOL vmlinux 0xedbaee5e	nla_strcmp
+EXPORT_SYMBOL vmlinux 0xedc03953	iounmap
+EXPORT_SYMBOL vmlinux 0xee0871b5	free_netdev
+EXPORT_SYMBOL vmlinux 0xee195348	swiotlb_map_sg
+EXPORT_SYMBOL vmlinux 0xee29cfc3	iw_handler_get_thrspy
+EXPORT_SYMBOL vmlinux 0xee2d0fc7	_local_bh_enable
+EXPORT_SYMBOL vmlinux 0xee3763a7	textsearch_register
+EXPORT_SYMBOL vmlinux 0xee59412f	adb_try_handler_change
+EXPORT_SYMBOL vmlinux 0xee741851	i2c_bit_add_numbered_bus
+EXPORT_SYMBOL vmlinux 0xee76a249	migrate_page
+EXPORT_SYMBOL vmlinux 0xee78e3f8	of_get_pci_address
+EXPORT_SYMBOL vmlinux 0xeea9dbaf	bitmap_bitremap
+EXPORT_SYMBOL vmlinux 0xeedafcca	fb_set_cmap
+EXPORT_SYMBOL vmlinux 0xef0c0d80	i2c_register_driver
+EXPORT_SYMBOL vmlinux 0xef14e808	slow_work_enqueue
+EXPORT_SYMBOL vmlinux 0xef253f68	xfrm_stateonly_find
+EXPORT_SYMBOL vmlinux 0xef49ee13	flush_tlb_mm
+EXPORT_SYMBOL vmlinux 0xef5b38e7	journal_check_used_features
+EXPORT_SYMBOL vmlinux 0xef600700	filemap_fdatawrite
+EXPORT_SYMBOL vmlinux 0xef6604b6	user_path_at
+EXPORT_SYMBOL vmlinux 0xef688be1	seq_release_private
+EXPORT_SYMBOL vmlinux 0xef6ed1ba	param_set_invbool
+EXPORT_SYMBOL vmlinux 0xef946bfe	sock_alloc_send_pskb
+EXPORT_SYMBOL vmlinux 0xefdc3598	dev_queue_xmit
+EXPORT_SYMBOL vmlinux 0xefdd70ce	security_secid_to_secctx
+EXPORT_SYMBOL vmlinux 0xefde1bbe	flush_dcache_range
+EXPORT_SYMBOL vmlinux 0xefdeb39c	journal_release_buffer
+EXPORT_SYMBOL vmlinux 0xeff1a04f	blk_stop_queue
+EXPORT_SYMBOL vmlinux 0xeff5f71f	ida_remove
+EXPORT_SYMBOL vmlinux 0xeff75274	register_sysrq_key
+EXPORT_SYMBOL vmlinux 0xefff7527	ethtool_op_set_sg
+EXPORT_SYMBOL vmlinux 0xf0009fee	put_pages_list
+EXPORT_SYMBOL vmlinux 0xf0426285	phy_sanitize_settings
+EXPORT_SYMBOL vmlinux 0xf065f629	ioread16be
+EXPORT_SYMBOL vmlinux 0xf0692f44	udp_prot
+EXPORT_SYMBOL vmlinux 0xf083b68a	lease_get_mtime
+EXPORT_SYMBOL vmlinux 0xf0929134	sk_common_release
+EXPORT_SYMBOL vmlinux 0xf099ca79	blk_queue_io_min
+EXPORT_SYMBOL vmlinux 0xf0aa56d9	udp_sendmsg
+EXPORT_SYMBOL vmlinux 0xf0b4786f	blk_rq_map_user
+EXPORT_SYMBOL vmlinux 0xf0ef15b4	list_sort
+EXPORT_SYMBOL vmlinux 0xf0f1246c	kvasprintf
+EXPORT_SYMBOL vmlinux 0xf0f69c24	flush_old_exec
+EXPORT_SYMBOL vmlinux 0xf10de535	ioread8
+EXPORT_SYMBOL vmlinux 0xf11fefa4	xfrm_register_mode
+EXPORT_SYMBOL vmlinux 0xf1415afa	of_parse_phandles_with_args
+EXPORT_SYMBOL vmlinux 0xf160017c	matroxfb_unregister_driver
+EXPORT_SYMBOL vmlinux 0xf174ed48	acquire_console_sem
+EXPORT_SYMBOL vmlinux 0xf181eccb	get_fs_type
+EXPORT_SYMBOL vmlinux 0xf18edd73	lro_vlan_hwaccel_receive_frags
+EXPORT_SYMBOL vmlinux 0xf195c682	fb_invert_cmaps
+EXPORT_SYMBOL vmlinux 0xf19e9355	cpu_online_mask
+EXPORT_SYMBOL vmlinux 0xf1d46b99	tty_throttle
+EXPORT_SYMBOL vmlinux 0xf1da11a8	__sg_alloc_table
+EXPORT_SYMBOL vmlinux 0xf1db1704	nla_memcpy
+EXPORT_SYMBOL vmlinux 0xf1dd9fb3	down_read_trylock
+EXPORT_SYMBOL vmlinux 0xf1deabf2	div64_u64
+EXPORT_SYMBOL vmlinux 0xf1e98c74	avenrun
+EXPORT_SYMBOL vmlinux 0xf1ea7434	tcf_exts_change
+EXPORT_SYMBOL vmlinux 0xf20dabd8	free_irq
+EXPORT_SYMBOL vmlinux 0xf20ffbcb	journal_lock_updates
+EXPORT_SYMBOL vmlinux 0xf221a93b	scsi_get_host_dev
+EXPORT_SYMBOL vmlinux 0xf252a64e	genphy_read_status
+EXPORT_SYMBOL vmlinux 0xf25fe13a	__insert_inode_hash
+EXPORT_SYMBOL vmlinux 0xf2658503	scsi_print_sense
+EXPORT_SYMBOL vmlinux 0xf2746c29	skb_checksum_help
+EXPORT_SYMBOL vmlinux 0xf27736ab	i2c_release_client
+EXPORT_SYMBOL vmlinux 0xf29684cf	ilookup5_nowait
+EXPORT_SYMBOL vmlinux 0xf29f38bd	phy_device_create
+EXPORT_SYMBOL vmlinux 0xf2a0f38a	nf_register_hook
+EXPORT_SYMBOL vmlinux 0xf2a530b7	gen_pool_free
+EXPORT_SYMBOL vmlinux 0xf2b79204	xfrm_state_register_afinfo
+EXPORT_SYMBOL vmlinux 0xf2bb785c	key_task_permission
+EXPORT_SYMBOL vmlinux 0xf2fcce45	input_allocate_device
+EXPORT_SYMBOL vmlinux 0xf2fd81b4	skb_pull
+EXPORT_SYMBOL vmlinux 0xf30e0f32	audit_log_start
+EXPORT_SYMBOL vmlinux 0xf313da4e	sha_transform
+EXPORT_SYMBOL vmlinux 0xf31a6692	nf_log_unregister
+EXPORT_SYMBOL vmlinux 0xf320ef49	sget
+EXPORT_SYMBOL vmlinux 0xf32ea0a1	neigh_update
+EXPORT_SYMBOL vmlinux 0xf3335762	simple_write_begin
+EXPORT_SYMBOL vmlinux 0xf3341268	__clear_user
+EXPORT_SYMBOL vmlinux 0xf338d4c3	netlink_unregister_notifier
+EXPORT_SYMBOL vmlinux 0xf33bdeea	ip_cmsg_recv
+EXPORT_SYMBOL vmlinux 0xf346231f	seq_list_start_head
+EXPORT_SYMBOL vmlinux 0xf34c1fe7	pci_scan_single_device
+EXPORT_SYMBOL vmlinux 0xf35eac05	ide_wait_stat
+EXPORT_SYMBOL vmlinux 0xf397b9aa	__tasklet_schedule
+EXPORT_SYMBOL vmlinux 0xf39bf4d9	put_cmsg
+EXPORT_SYMBOL vmlinux 0xf3bf0bce	__bitmap_complement
+EXPORT_SYMBOL vmlinux 0xf3fe3644	save_mount_options
+EXPORT_SYMBOL vmlinux 0xf435dc41	insert_inode_locked
+EXPORT_SYMBOL vmlinux 0xf441ac43	ioread8_rep
+EXPORT_SYMBOL vmlinux 0xf4449388	timer_interrupt
+EXPORT_SYMBOL vmlinux 0xf44ad886	serio_interrupt
+EXPORT_SYMBOL vmlinux 0xf4515f78	__rta_fill
+EXPORT_SYMBOL vmlinux 0xf453e951	napi_gro_flush
+EXPORT_SYMBOL vmlinux 0xf469287e	wait_for_key_construction
+EXPORT_SYMBOL vmlinux 0xf46af10d	blk_queue_max_sectors
+EXPORT_SYMBOL vmlinux 0xf47ffb71	journal_clear_err
+EXPORT_SYMBOL vmlinux 0xf4cca079	try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0xf4f14de6	rtnl_trylock
+EXPORT_SYMBOL vmlinux 0xf4f52f93	dqstats
+EXPORT_SYMBOL vmlinux 0xf514d565	qdisc_watchdog_init
+EXPORT_SYMBOL vmlinux 0xf51ee07c	__devm_request_region
+EXPORT_SYMBOL vmlinux 0xf52321e0	atomic64_sub
+EXPORT_SYMBOL vmlinux 0xf52e47bb	kill_pgrp
+EXPORT_SYMBOL vmlinux 0xf53d4c26	qdisc_class_hash_destroy
+EXPORT_SYMBOL vmlinux 0xf55b4c17	tty_insert_flip_string_flags
+EXPORT_SYMBOL vmlinux 0xf56e6d9c	cdrom_media_changed
+EXPORT_SYMBOL vmlinux 0xf58a658e	proc_symlink
+EXPORT_SYMBOL vmlinux 0xf59efa06	neigh_create
+EXPORT_SYMBOL vmlinux 0xf5a40807	__mod_zone_page_state
+EXPORT_SYMBOL vmlinux 0xf5a5c976	kset_unregister
+EXPORT_SYMBOL vmlinux 0xf5a62ecc	_memset_io
+EXPORT_SYMBOL vmlinux 0xf5c05914	generic_segment_checks
+EXPORT_SYMBOL vmlinux 0xf5c9012e	timespec_trunc
+EXPORT_SYMBOL vmlinux 0xf5ccdffd	blk_stack_limits
+EXPORT_SYMBOL vmlinux 0xf5d43c13	phy_driver_register
+EXPORT_SYMBOL vmlinux 0xf5e1558d	crash_shutdown_unregister
+EXPORT_SYMBOL vmlinux 0xf5e94ee4	bioset_integrity_free
+EXPORT_SYMBOL vmlinux 0xf5eb86ea	blk_verify_command
+EXPORT_SYMBOL vmlinux 0xf69be488	wait_for_completion
+EXPORT_SYMBOL vmlinux 0xf6a5451b	clear_inode
+EXPORT_SYMBOL vmlinux 0xf6a576fc	d_alloc_root
+EXPORT_SYMBOL vmlinux 0xf6bb4729	color_table
+EXPORT_SYMBOL vmlinux 0xf6caed6d	vga_get
+EXPORT_SYMBOL vmlinux 0xf6e3be01	fget
+EXPORT_SYMBOL vmlinux 0xf6ebc03b	net_ratelimit
+EXPORT_SYMBOL vmlinux 0xf70384d7	__debugger_sstep
+EXPORT_SYMBOL vmlinux 0xf71521ba	atomic64_add_return
+EXPORT_SYMBOL vmlinux 0xf73d1d1a	datagram_poll
+EXPORT_SYMBOL vmlinux 0xf7584a9c	find_font
+EXPORT_SYMBOL vmlinux 0xf75887e7	scsi_register
+EXPORT_SYMBOL vmlinux 0xf7623914	radix_tree_tag_clear
+EXPORT_SYMBOL vmlinux 0xf78b69db	ide_raw_taskfile
+EXPORT_SYMBOL vmlinux 0xf78d04ab	netlink_register_notifier
+EXPORT_SYMBOL vmlinux 0xf7a35cc2	lock_rename
+EXPORT_SYMBOL vmlinux 0xf7a9edca	inet_register_protosw
+EXPORT_SYMBOL vmlinux 0xf7b12aee	__next_cpu
+EXPORT_SYMBOL vmlinux 0xf7cc335f	gen_new_estimator
+EXPORT_SYMBOL vmlinux 0xf7d11c20	pci_busdev_to_OF_node
+EXPORT_SYMBOL vmlinux 0xf7f8f21f	xfrm_unregister_type
+EXPORT_SYMBOL vmlinux 0xf811e69d	scsi_eh_flush_done_q
+EXPORT_SYMBOL vmlinux 0xf82abc1d	isa_dma_bridge_buggy
+EXPORT_SYMBOL vmlinux 0xf8566e18	unregister_framebuffer
+EXPORT_SYMBOL vmlinux 0xf8896074	mdiobus_alloc
+EXPORT_SYMBOL vmlinux 0xf8b481a9	block_prepare_write
+EXPORT_SYMBOL vmlinux 0xf8b87414	dev_add_pack
+EXPORT_SYMBOL vmlinux 0xf8d04f30	seq_bitmap_list
+EXPORT_SYMBOL vmlinux 0xf8d43184	pci_scan_bridge
+EXPORT_SYMBOL vmlinux 0xf8f08325	key_alloc
+EXPORT_SYMBOL vmlinux 0xf8fda569	rwsem_down_write_failed
+EXPORT_SYMBOL vmlinux 0xf90e922e	blk_queue_merge_bvec
+EXPORT_SYMBOL vmlinux 0xf92d4cf3	module_refcount
+EXPORT_SYMBOL vmlinux 0xf93f2a6f	of_register_i2c_devices
+EXPORT_SYMBOL vmlinux 0xf9938d03	napi_frags_finish
+EXPORT_SYMBOL vmlinux 0xf9a482f9	msleep
+EXPORT_SYMBOL vmlinux 0xf9b9b731	iget5_locked
+EXPORT_SYMBOL vmlinux 0xf9ea08d0	ethtool_op_set_tx_ipv6_csum
+EXPORT_SYMBOL vmlinux 0xfa27e53f	__bread
+EXPORT_SYMBOL vmlinux 0xfa31cd3b	kfifo_init
+EXPORT_SYMBOL vmlinux 0xfa360807	of_platform_bus_type
+EXPORT_SYMBOL vmlinux 0xfa4252b7	register_con_driver
+EXPORT_SYMBOL vmlinux 0xfa4af182	blk_get_request
+EXPORT_SYMBOL vmlinux 0xfa4f5ce1	xfrm_policy_walk
+EXPORT_SYMBOL vmlinux 0xfa530832	pcie_get_readrq
+EXPORT_SYMBOL vmlinux 0xfa6d827c	eth_header_cache_update
+EXPORT_SYMBOL vmlinux 0xfa785b01	pci_clear_master
+EXPORT_SYMBOL vmlinux 0xfa7ada32	igrab
+EXPORT_SYMBOL vmlinux 0xfa92cfa4	seq_putc
+EXPORT_SYMBOL vmlinux 0xfa9dd504	timecompare_transform
+EXPORT_SYMBOL vmlinux 0xfab29c99	xfrm4_prepare_output
+EXPORT_SYMBOL vmlinux 0xfac3e14d	nf_register_queue_handler
+EXPORT_SYMBOL vmlinux 0xfadb5750	pmu_unlock
+EXPORT_SYMBOL vmlinux 0xfae4a95d	per_cpu__softnet_data
+EXPORT_SYMBOL vmlinux 0xfae8f050	xfrm_state_update
+EXPORT_SYMBOL vmlinux 0xfaed971c	matroxfb_g450_setpll_cond
+EXPORT_SYMBOL vmlinux 0xfaf98462	bitrev32
+EXPORT_SYMBOL vmlinux 0xfb09b120	bio_integrity_free
+EXPORT_SYMBOL vmlinux 0xfb0cf2e9	touch_all_softlockup_watchdogs
+EXPORT_SYMBOL vmlinux 0xfb4b322b	blkdev_put
+EXPORT_SYMBOL vmlinux 0xfb6af58d	recalc_sigpending
+EXPORT_SYMBOL vmlinux 0xfb92dc7b	unregister_8022_client
+EXPORT_SYMBOL vmlinux 0xfbb77a6f	kill_block_super
+EXPORT_SYMBOL vmlinux 0xfbc5adce	deactivate_super
+EXPORT_SYMBOL vmlinux 0xfbde8678	sock_common_setsockopt
+EXPORT_SYMBOL vmlinux 0xfbe27a1c	rb_first
+EXPORT_SYMBOL vmlinux 0xfbee904a	thaw_bdev
+EXPORT_SYMBOL vmlinux 0xfc02b7ad	sysctl_tcp_wmem
+EXPORT_SYMBOL vmlinux 0xfc0df36a	blk_remove_plug
+EXPORT_SYMBOL vmlinux 0xfc21d745	icmp_send
+EXPORT_SYMBOL vmlinux 0xfc2b07ff	netpoll_parse_options
+EXPORT_SYMBOL vmlinux 0xfc39e32f	ioport_unmap
+EXPORT_SYMBOL vmlinux 0xfc533f85	schedule_work_on
+EXPORT_SYMBOL vmlinux 0xfc5b1c35	serio_close
+EXPORT_SYMBOL vmlinux 0xfc702143	neigh_lookup
+EXPORT_SYMBOL vmlinux 0xfc7102dd	proc_net_netfilter
+EXPORT_SYMBOL vmlinux 0xfc90264e	eth_header
+EXPORT_SYMBOL vmlinux 0xfcaa04a0	out_of_line_wait_on_bit_lock
+EXPORT_SYMBOL vmlinux 0xfcac52ef	jbd2_journal_try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0xfcc2a43c	utf32_to_utf8
+EXPORT_SYMBOL vmlinux 0xfcc79e04	pci_target_state
+EXPORT_SYMBOL vmlinux 0xfcda63a3	node_states
+EXPORT_SYMBOL vmlinux 0xfceae9e5	scsi_init_io
+EXPORT_SYMBOL vmlinux 0xfcec0987	enable_irq
+EXPORT_SYMBOL vmlinux 0xfcfa03ff	fb_videomode_to_modelist
+EXPORT_SYMBOL vmlinux 0xfd0b963f	simple_dir_operations
+EXPORT_SYMBOL vmlinux 0xfd0c5038	adb_unregister
+EXPORT_SYMBOL vmlinux 0xfd65337c	neigh_changeaddr
+EXPORT_SYMBOL vmlinux 0xfda85a7d	request_threaded_irq
+EXPORT_SYMBOL vmlinux 0xfdb9b629	ioread32be
+EXPORT_SYMBOL vmlinux 0xfdd536bb	phy_device_register
+EXPORT_SYMBOL vmlinux 0xfde6cf1b	tcf_hash_create
+EXPORT_SYMBOL vmlinux 0xfded48ed	enable_kernel_fp
+EXPORT_SYMBOL vmlinux 0xfdfc0b3b	fiemap_fill_next_extent
+EXPORT_SYMBOL vmlinux 0xfe23bd9e	genphy_resume
+EXPORT_SYMBOL vmlinux 0xfe2ad88e	d_obtain_alias
+EXPORT_SYMBOL vmlinux 0xfe45f333	scsi_prep_fn
+EXPORT_SYMBOL vmlinux 0xfe57a394	pci_iomap
+EXPORT_SYMBOL vmlinux 0xfe5d4bb2	sys_tz
+EXPORT_SYMBOL vmlinux 0xfe6a5a27	ethtool_op_set_tx_csum
+EXPORT_SYMBOL vmlinux 0xfe769456	unregister_netdevice_notifier
+EXPORT_SYMBOL vmlinux 0xfe7c4287	nr_cpu_ids
+EXPORT_SYMBOL vmlinux 0xfec3c2f2	bcd2bin
+EXPORT_SYMBOL vmlinux 0xfec5430a	dma_pool_free
+EXPORT_SYMBOL vmlinux 0xfeccdd55	rtnetlink_put_metrics
+EXPORT_SYMBOL vmlinux 0xfed649cf	swiotlb_map_sg_attrs
+EXPORT_SYMBOL vmlinux 0xfedd35fc	console_suspend_enabled
+EXPORT_SYMBOL vmlinux 0xfef96e23	__scsi_print_command
+EXPORT_SYMBOL vmlinux 0xfefbc10b	shrink_dcache_parent
+EXPORT_SYMBOL vmlinux 0xff104fac	kmem_cache_shrink
+EXPORT_SYMBOL vmlinux 0xff1765c7	rtas_call
+EXPORT_SYMBOL vmlinux 0xff1e9dd8	seq_list_start
+EXPORT_SYMBOL vmlinux 0xff288011	input_unfilter_device
+EXPORT_SYMBOL vmlinux 0xff587c14	request_key_with_auxdata
+EXPORT_SYMBOL vmlinux 0xff6878cf	fb_default_cmap
+EXPORT_SYMBOL vmlinux 0xff6dea25	smp_hw_index
+EXPORT_SYMBOL vmlinux 0xff7d449b	simple_rmdir
+EXPORT_SYMBOL vmlinux 0xff964b25	param_set_int
+EXPORT_SYMBOL vmlinux 0xff99472a	km_state_notify
+EXPORT_SYMBOL vmlinux 0xff9ca065	fb_edid_to_monspecs
+EXPORT_SYMBOL vmlinux 0xffbd4f31	lro_receive_frags
+EXPORT_SYMBOL vmlinux 0xffd5a395	default_wake_function
+EXPORT_SYMBOL vmlinux 0xffe85bf9	pcim_pin_device
+EXPORT_SYMBOL vmlinux 0xfff78176	inode_permission
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x0cc1e40f	crypto_it_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x24aac4d9	crypto_aes_expand_key
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x3dc916b6	crypto_fl_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x40d46b21	crypto_ft_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x71dc9998	crypto_il_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x8fc9c160	crypto_aes_set_key
+EXPORT_SYMBOL_GPL crypto/async_tx/async_memcpy 0x0258ca87	async_memcpy
+EXPORT_SYMBOL_GPL crypto/async_tx/async_pq 0x2d232016	async_gen_syndrome
+EXPORT_SYMBOL_GPL crypto/async_tx/async_pq 0x784c1b24	async_syndrome_val
+EXPORT_SYMBOL_GPL crypto/async_tx/async_raid6_recov 0x2de59d00	async_raid6_2data_recov
+EXPORT_SYMBOL_GPL crypto/async_tx/async_raid6_recov 0x8374d349	async_raid6_datap_recov
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x569795b0	async_trigger_callback
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0xaee73f80	async_tx_quiesce
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0xcc38fa74	async_tx_submit
+EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0x007a3c6f	async_xor
+EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0xe25bd49b	async_xor_val
+EXPORT_SYMBOL_GPL crypto/cryptd 0x19230c42	cryptd_shash_desc
+EXPORT_SYMBOL_GPL crypto/cryptd 0x554f5da1	cryptd_alloc_ahash
+EXPORT_SYMBOL_GPL crypto/cryptd 0x61b41acc	cryptd_ablkcipher_child
+EXPORT_SYMBOL_GPL crypto/cryptd 0x8616179f	cryptd_ahash_child
+EXPORT_SYMBOL_GPL crypto/cryptd 0xbf0a45ce	cryptd_alloc_ablkcipher
+EXPORT_SYMBOL_GPL crypto/cryptd 0xc285082b	cryptd_free_ahash
+EXPORT_SYMBOL_GPL crypto/cryptd 0xe3857cd2	cryptd_free_ablkcipher
+EXPORT_SYMBOL_GPL crypto/des_generic 0xcfd9a2c0	des_ekey
+EXPORT_SYMBOL_GPL crypto/twofish_common 0x2326b496	twofish_setkey
+EXPORT_SYMBOL_GPL drivers/ata/pata_platform 0x794e8a03	__pata_platform_probe
+EXPORT_SYMBOL_GPL drivers/ata/pata_platform 0xd8e1abfa	__pata_platform_remove
+EXPORT_SYMBOL_GPL drivers/ata/pata_sis 0x75eef737	sis_info133_for_sata
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x14102f23	ks0108_displaystate
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x48a70518	ks0108_writedata
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x4f506333	ks0108_startline
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x6edae968	ks0108_isinited
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xbf4774db	ks0108_writecontrol
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xedde6df2	ks0108_page
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xfee8ef7b	ks0108_address
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0x1c8e7273	btmrvl_send_module_cfg_cmd
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0x2fa688ae	btmrvl_remove_card
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0xdcb0b1c4	btmrvl_process_event
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0xedc213e6	btmrvl_interrupt
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0xf8daf7a5	btmrvl_add_card
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0xffceba1c	btmrvl_check_evtpkt
+EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0x028d3a0d	agp_add_bridge
+EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0x1aa92bc6	agp_remove_bridge
+EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0xd6feefa5	agp_num_entries
+EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0xe089cfcc	agp_memory_reserved
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x01854de3	tpm_show_active
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x09bb4f24	tpm_show_temp_deactivated
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x1c262a39	tpm_gen_interrupt
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x2e2a2e99	tpm_show_enabled
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x2e3fa171	tpm_get_timeouts
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x30bce56a	tpm_continue_selftest
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x574d6ace	tpm_pm_suspend
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x6d8efb83	tpm_show_pubek
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x6e0d9eac	tpm_dev_vendor_release
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x7a4440b1	tpm_calc_ordinal_duration
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x8665f2f8	tpm_release
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x8c0d5180	tpm_register_hardware
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x997355a1	tpm_open
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xa54efac4	tpm_read
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xadf6aa4d	tpm_pcr_read
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xafd148d2	tpm_show_pcrs
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xb0c68fdc	tpm_pm_resume
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xb5cf6def	tpm_write
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xbba08ee9	tpm_remove_hardware
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xc37226a5	tpm_pcr_extend
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xce92f839	tpm_dev_release
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xd5c01b5b	tpm_show_caps_1_2
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xe708676e	tpm_store_cancel
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xeda72b15	tpm_show_owned
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xf334d800	tpm_show_timeouts
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xfeb2dcce	tpm_show_caps
+EXPORT_SYMBOL_GPL drivers/connector/cn 0xb10d55bc	cn_netlink_send
+EXPORT_SYMBOL_GPL drivers/connector/cn 0xcf7a962e	cn_add_callback
+EXPORT_SYMBOL_GPL drivers/connector/cn 0xff5a8cfe	cn_del_callback
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x0199aea1	edac_pci_handle_npe
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x0c32ff8a	edac_pci_alloc_index
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x13d3f789	edac_mc_add_mc
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x14a84e58	edac_mc_find_csrow_by_page
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x18863e9e	edac_pci_add_device
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x1de0e0f0	edac_device_alloc_ctl_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x21771662	edac_device_handle_ce
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x23af1eef	edac_pci_create_generic_ctl
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x2934d785	edac_mc_alloc
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x33a57fce	edac_device_add_device
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x3ec0a508	edac_pci_free_ctl_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x66843246	edac_device_free_ctl_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x676f2d39	edac_device_del_device
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x6e3ff83a	edac_device_alloc_index
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x89b6db3c	edac_device_handle_ue
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x9eb8e779	edac_mc_handle_ue
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xb3ef1c46	edac_pci_del_device
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xb8cd8210	edac_mc_handle_ue_no_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xc156cfa2	edac_mc_handle_ce
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xc6afce5c	edac_pci_release_generic_ctl
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xca25eb8b	edac_pci_handle_pe
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xd4a23a0c	edac_mc_handle_ce_no_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xefb58d03	edac_pci_alloc_ctl_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xf47a42d8	edac_mc_del_mc
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xf8621798	edac_pci_reset_delay_period
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xf8b6b779	edac_mc_free
+EXPORT_SYMBOL_GPL drivers/gpu/drm/drm 0x5e4bbf53	drm_class_device_unregister
+EXPORT_SYMBOL_GPL drivers/gpu/drm/drm 0xafe369a2	drm_class_device_register
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x0538c51e	hid_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x05495392	hid_debug
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x078dabea	__hid_register_driver
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x07a428ae	hid_dump_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x12717053	hid_allocate_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x1d212e40	hid_debug_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x1d2db2e5	hid_resolv_usage
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x1e076e50	hid_input_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x287d0cd9	hid_destroy_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x2f7edf52	hid_output_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x4d98ad6b	hid_dump_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x53cc6205	hid_report_raw_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x53da1457	hidinput_find_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x5dda51a2	hid_parse_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x77d430b7	hidinput_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x991bcd2d	hid_check_keys_pressed
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x99c69d6c	hidinput_report_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xa68ba981	hid_add_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xa7b0b275	hidraw_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xa8c72433	hid_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xcd0ece23	hidinput_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xe26672bb	hid_set_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xe557b55a	hid_unregister_driver
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xec76dd51	hid_dump_input
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xf10429ba	hidraw_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xfc75aab8	hidraw_report_event
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x01fd453e	usbhid_lookup_quirk
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x0f1b9441	usbhid_set_leds
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0xb45585db	usbhid_submit_report
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0xc1e842d3	hiddev_hid_event
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x10273297	lis3_dev
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x5110b2c7	lis3lv02d_init_device
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x5ce38960	lis3lv02d_poweron
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x6c33e494	lis3lv02d_joystick_disable
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x786c25a7	lis3lv02d_poweroff
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x846754b0	lis3lv02d_remove_fs
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xe6af28c8	lis3lv02d_joystick_enable
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0x0010ad84	hpsb_config_rom_ip1394_remove
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0x25f9d08f	hpsb_config_rom_ip1394_add
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0xec8d18cf	hpsb_disable_irm
+EXPORT_SYMBOL_GPL drivers/input/ff-memless 0xe63f01ec	input_ff_create_memless
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x0b4510b8	wm97xx_get_gpio
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x2ee24990	wm9712_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x335c54ca	wm9705_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x82671ad4	wm97xx_register_mach_ops
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x8344d58f	wm97xx_unregister_mach_ops
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x991b32d4	wm97xx_set_gpio
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x99c5f811	wm97xx_reg_write
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xce7eb9c7	wm97xx_set_suspend_mode
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xde22d722	wm97xx_read_aux_adc
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xe248490e	wm9713_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xe7f98e67	wm97xx_config_gpio
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xf23a4cf0	wm97xx_reg_read
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0x0e108e4c	wf_unregister_sensor
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0x0f977e63	wf_unregister_control
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0x4b8e7333	wf_find_control
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0x6e125b15	wf_get_control
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0x75147afa	wf_set_overtemp
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0x76436e0f	wf_get_sensor
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0x82be9a10	wf_register_control
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0x93094e82	wf_find_sensor
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0x94765fac	wf_critical_overtemp
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0x9a084b60	wf_put_control
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0xa2f19a49	wf_is_overtemp
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0xaf15726f	wf_unregister_client
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0xb4d6374e	wf_put_sensor
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0xb9f39360	wf_register_sensor
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0xdb7e8499	wf_register_client
+EXPORT_SYMBOL_GPL drivers/macintosh/windfarm_core 0xed82a14f	wf_clear_overtemp
+EXPORT_SYMBOL_GPL drivers/md/dm-multipath 0x6796c834	dm_register_path_selector
+EXPORT_SYMBOL_GPL drivers/md/dm-multipath 0xc4a9a75c	dm_unregister_path_selector
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x0a711803	dm_rh_dirty_log
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x177d1af6	dm_rh_bio_to_region
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x1d68f35e	dm_rh_delay
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x1f9f67d2	dm_rh_recovery_end
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x265fb7d0	dm_rh_update_states
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x32c3d2d4	dm_region_hash_destroy
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x34851cf5	dm_rh_get_region_key
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x39523162	dm_rh_start_recovery
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x4c47edab	dm_region_hash_create
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x4c93b537	dm_rh_get_state
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x4e0acf66	dm_rh_recovery_in_flight
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x4ee99baf	dm_rh_inc_pending
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x55d9db6c	dm_rh_dec
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x5d2de933	dm_rh_get_region_size
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x681cac29	dm_rh_region_to_sector
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x7fdc3dd3	dm_rh_mark_nosync
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xcbf675b0	dm_rh_stop_recovery
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xd1ad07e2	dm_rh_recovery_start
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xeb231d43	dm_rh_region_context
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xed3fc8ee	dm_rh_recovery_prepare
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xf0f3c380	dm_rh_flush
+EXPORT_SYMBOL_GPL drivers/md/md-mod 0x3a4a2802	md_do_sync
+EXPORT_SYMBOL_GPL drivers/md/md-mod 0x6c89ad97	sync_page_io
+EXPORT_SYMBOL_GPL drivers/md/md-mod 0xa2584707	md_allow_write
+EXPORT_SYMBOL_GPL drivers/md/md-mod 0xbb40c222	md_new_event
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0x05513b71	raid6_call
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0x0b8ef590	raid6_2data_recov
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0x4a48d81c	raid6_datap_recov
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x0349c9bd	ir_codes_proteus_2309_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x0366dcdf	ir_codes_videomate_s350_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x110b053a	ir_codes_pixelview_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x124cb753	ir_codes_encore_enltv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x183fdfdd	ir_codes_gotview7135_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x19b4d61c	ir_codes_nebula_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x19cd2826	ir_codes_behold_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x1a9009d6	ir_codes_dm1105_nec_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x1cb148f5	ir_extract_bits
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2456e513	ir_decode_pulsedistance
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2cc459b5	ir_codes_flydvb_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2d0e9a49	ir_codes_em_terratec_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3136d8ff	ir_codes_dntv_live_dvbt_pro_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x32b9033b	ir_codes_apac_viewcomp_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3909f4ad	ir_codes_terratec_cinergy_xs_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3a84be27	ir_codes_avermedia_a16d_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x4267d749	ir_codes_budget_ci_old_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x43c89ef4	ir_decode_biphase
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x4c1442c1	ir_codes_real_audio_220_32_keys_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x51ba1643	ir_codes_kworld_plus_tv_analog_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x543db4ff	ir_codes_avermedia_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x5e95da31	ir_codes_tt_1500_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x5fbe6515	ir_codes_pinnacle_color_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x61d039d7	ir_codes_behold_columbus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x61f66a3d	ir_input_keydown
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6427a3fb	ir_codes_pinnacle_grey_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x64b02fed	ir_codes_avermedia_dvbt_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x64e2d456	ir_input_init
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6606596a	ir_rc5_timer_keyup
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6809de82	ir_codes_pctv_sedna_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6d6511e7	ir_dump_samples
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x703fc738	ir_codes_avertv_303_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x7283f81d	ir_codes_purpletv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x72c2992e	ir_codes_powercolor_real_angel_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x76d71b8e	ir_codes_dntv_live_dvb_t_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x784e176d	ir_codes_asus_pc39_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x828b3ce5	ir_codes_encore_enltv_fm53_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x8acae3dd	ir_codes_pinnacle_pctv_hd_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x92d1d181	ir_codes_flyvideo_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x94651dab	ir_codes_ati_tv_wonder_hd_600_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x97c35dab	ir_codes_msi_tvanywhere_plus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x9944e2e5	ir_codes_hauppauge_new_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xa69aa6ad	ir_codes_pv951_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xa95157c5	ir_codes_cinergy_1400_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xac15f6c8	ir_codes_kaiomy_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xaff22e87	ir_codes_pixelview_new_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb01a1998	ir_codes_manli_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb0a8ef38	ir_codes_rc5_tv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb57445f7	ir_codes_eztv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb5adb754	ir_codes_cinergy_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xbd3ce6f0	ir_codes_avermedia_cardbus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xbeaccbdc	ir_codes_gadmei_rm008z_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xbeb56382	ir_input_nokey
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xcba36c62	ir_codes_videomate_tv_pvr_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xd30c491f	ir_codes_norwood_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xdc23fec4	ir_codes_fusionhdtv_mce_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xdd4c0a07	ir_codes_evga_indtube_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xe1101f4d	ir_codes_avermedia_m135a_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xe4140c60	ir_codes_genius_tvgo_a11mce_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xeb9bb08f	ir_codes_npgtech_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xebf345b4	ir_codes_encore_enltv2_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xeec89db8	ir_codes_empty_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xef29c40d	ir_codes_adstech_dvb_t_pci_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf33c155d	ir_codes_msi_tvanywhere_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf3d619ec	ir_codes_iodata_bctv7e_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf4f7a4d6	ir_rc5_timer_end
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf5e15e65	ir_codes_winfast_table
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x074d03d7	saa7146_i2c_adapter_prepare
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x2d59431b	saa7146_unregister_extension
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x476c6b9c	saa7146_wait_for_debi_done
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x7a891fb4	saa7146_pgtable_free
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x98392745	saa7146_devices_lock
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xabb5836e	saa7146_setgpio
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xb51f6eb5	saa7146_vfree_destroy_pgtable
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xc07dc29b	saa7146_pgtable_alloc
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xcf683cf2	saa7146_devices
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xd31b8a96	saa7146_register_extension
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xd974b369	saa7146_vmalloc_build_pgtable
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xe3cd9b5c	saa7146_debug
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xe989f0ab	saa7146_pgtable_build_single
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x7085d0cc	saa7146_register_device
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x7c8da7d8	saa7146_vv_init
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x7d011cdb	saa7146_set_hps_source_and_sync
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x81ad3f80	saa7146_unregister_device
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xb34fa485	saa7146_vv_release
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xd78ffe16	saa7146_start_preview
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xfc27187a	saa7146_stop_preview
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/mt20xx 0x13af94ee	microtune_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/mxl5007t 0x14cece08	mxl5007t_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda18271 0x0c2128a7	tda18271_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda827x 0x71e2741d	tda827x_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda8290 0x65133856	tda829x_probe
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda8290 0xe06bc6d7	tda829x_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda9887 0xb9047cbe	tda9887_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5761 0x2268be54	tea5761_autodetection
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5761 0x63898887	tea5761_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5767 0x59c1762d	tea5767_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5767 0xae0e0c64	tea5767_autodetection
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tuner-simple 0xbd4b3a77	simple_tuner_attach
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x035224f0	smscore_unregister_hotplug
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x05a2ade1	smscore_start_device
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x0f795b78	smscore_register_hotplug
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x21a8ed49	sms_board_event
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x21e36bf2	smscore_registry_getmode
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x330a8e52	sms_board_lna_control
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x37d91069	smsendian_handle_tx_message
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x45284ae9	smsendian_handle_rx_message
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x52265a79	smscore_unregister_device
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x5dc9a05a	smscore_onresponse
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x74ee9098	sms_board_load_modules
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x7c576277	smsendian_handle_message_header
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x897f0209	smscore_getbuffer
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x9859e4d7	sms_board_setup
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xadd13cc7	smsclient_sendrequest
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xb09e4068	smscore_get_board_id
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xb6d52f83	smscore_register_client
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xba7b1b4a	smscore_get_device_mode
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xc7ce4b82	smscore_unregister_client
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xdc43b8b0	smscore_putbuffer
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xdea75fe4	sms_board_led_feedback
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xf2a16f5f	smscore_set_board_id
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xf7179564	smscore_register_device
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xf8462ece	sms_board_power
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xfda878c5	sms_get_board
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x017ea7c7	cx231xx_tuner_callback
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x179ce228	cx231xx_set_mode
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x39dde9a4	cx231xx_send_gpio_cmd
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x3aff33e8	cx231xx_uninit_vbi_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x457bb2d6	cx231xx_capture_start
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x6cc781d8	cx231xx_dev_uninit
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x73bcacf3	cx231xx_init_vbi_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xc1bdb120	cx231xx_send_usb_command
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xcb2858af	cx231xx_dev_init
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xd45d597c	cx231xx_set_alt_setting
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xd4df9b06	cx231xx_uninit_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xf55d01fb	cx231xx_init_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx88/cx88xx 0x5f52a221	cx88_setup_xc3028
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x28f06c8b	em28xx_audio_analog_set
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x40934ae8	em28xx_audio_setup
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x423254a3	em28xx_uninit_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x5dd757f7	em28xx_isoc_dvb_max_packetsize
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x7cfd07df	em28xx_init_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x7fc8652c	em28xx_tuner_callback
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x9ab63b46	em28xx_set_mode
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x027d0a50	saa7134_s_std_internal
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x2c92840f	saa7134_queryctrl
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x363d5277	saa7134_g_ctrl_internal
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0xc8a43677	saa7134_ts_qops
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0xe5aa2dd4	saa7134_s_ctrl_internal
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x1d4a59a3	v4l2_i2c_subdev_addr
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x3ceb3929	v4l2_i2c_subdev_init
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x94e042e3	v4l2_i2c_new_subdev_board
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xbc60895d	v4l2_i2c_new_subdev_cfg
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xf2a353ac	v4l2_i2c_tuner_addrs
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xf5ef842e	v4l_bound_align_image
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x6b34390c	v4l2_int_device_register
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xa5228b24	v4l2_int_device_try_attach_all
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xafe4264a	v4l2_int_ioctl_0
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xb71542d1	v4l2_int_ioctl_1
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xe317450b	v4l2_int_device_unregister
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x0657621f	videobuf_streamoff
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x11dd6b8e	videobuf_waiton
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x1ea2a6e3	videobuf_read_one
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x2ba1c707	videobuf_queue_cancel
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x2f5f0c4f	videobuf_mmap_free
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x37662882	videobuf_queue_core_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x3a71487f	videobuf_iolock
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x3fe18cff	videobuf_querybuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x6304d284	videobuf_read_start
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x802bba72	videobuf_cgmbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x8186eec6	videobuf_qbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x909d5415	videobuf_queue_is_busy
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xa61e8835	videobuf_poll_stream
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xa6a2fba8	videobuf_read_stop
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xae6a051c	videobuf_stop
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xb1cf5aec	videobuf_alloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xb612c036	videobuf_mmap_setup
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xbf1d8fac	videobuf_streamon
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xbfc00ddc	__videobuf_mmap_setup
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xca151ebe	videobuf_queue_to_vmalloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xd2cd6e07	videobuf_dqbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xd8dd4767	videobuf_reqbufs
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xe701cd09	videobuf_mmap_mapper
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xe78c14f4	videobuf_read_stream
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xef541c42	videobuf_next_field
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x081832a8	videobuf_dma_sync
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x191c85e4	videobuf_dma_init_overlay
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x1e08e21a	videobuf_sg_dma_unmap
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x2cbb7984	videobuf_to_dma
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x66f9427d	videobuf_vmalloc_to_sg
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x6aa1a597	videobuf_dma_init_kernel
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x6dbd108c	videobuf_dma_init_user
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x6de14e75	videobuf_dma_map
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x88776c13	videobuf_dma_free
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x8c4aca30	videobuf_queue_sg_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x8f825a22	videobuf_dma_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xa825c75b	videobuf_sg_alloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xc76de257	videobuf_sg_dma_map
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xdfdbbfa5	videobuf_dma_unmap
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0x72b94207	videobuf_vmalloc_free
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0x7c868867	videobuf_to_vmalloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0xafb0e144	videobuf_queue_vmalloc_init
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x4a028330	v4l2_device_unregister_subdev
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x6b23cade	v4l2_device_register
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0xa6033f45	v4l2_device_disconnect
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0xdc563cb7	v4l2_device_unregister
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0xf1fe9880	v4l2_device_set_name
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0xffb8008c	v4l2_device_register_subdev
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x109e4560	i2o_dma_map_single
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x37871b7d	i2o_dma_alloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x443e3e18	i2o_dma_free
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x50763662	i2o_dma_realloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x76b8a0fc	i2o_dma_map_sg
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x85e18038	i2o_pool_alloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xd6f1d9f3	i2o_pool_free
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xf7a911c2	i2o_sg_tablesize
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x35455fce	mc13783_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x422df6fc	mc13783_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x70d0602e	mc13783_adc_do_conversion
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x8bb7cf88	mc13783_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0xc7437c73	mc13783_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0xce093610	mc13783_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0xe1032fe6	mc13783_adc_set_ts_status
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-adc 0x0b05bcfd	pcf50633_adc_sync_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-adc 0x4d833264	pcf50633_adc_async_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x097e9517	pcf50633_irq_mask_get
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x0c699963	pcf50633_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x4b82efc9	pcf50633_reg_clear_bits
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x5ec59393	pcf50633_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x7daa3080	pcf50633_read_block
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xc888aecd	pcf50633_irq_unmask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xc9017c9f	pcf50633_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xcd5da69d	pcf50633_irq_mask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xd379c149	pcf50633_reg_set_bit_mask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xf28dc811	pcf50633_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xfaadb9f3	pcf50633_write_block
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x4d21607f	pcf50633_gpio_invert_set
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x76a5748e	pcf50633_gpio_invert_get
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x7da9b8c9	pcf50633_gpio_power_supply_set
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0xc6ca8713	pcf50633_gpio_set
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0xdfc73ef0	pcf50633_gpio_get
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x1ef279a7	sm501_misc_control
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x222466e4	sm501_modify_reg
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x279b4fec	sm501_unit_power
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x4268109c	sm501_set_clock
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x7e961535	sm501_find_clock
+EXPORT_SYMBOL_GPL drivers/mfd/ucb1400_core 0xe5a6e4d0	ucb1400_adc_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x0d11c9fe	wm831x_request_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x1bb68bb6	wm831x_reg_lock
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x2213ee15	wm831x_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x51483793	wm831x_auxadc_read_uv
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x6eae38e6	wm831x_disable_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x7dab26b6	wm831x_isinkv_values
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x80948318	wm831x_enable_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x8e3e3576	wm831x_bulk_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xb05984df	wm831x_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xb58e9dd9	wm831x_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xb947c7dc	wm831x_auxadc_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xe38a0fc6	wm831x_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xf7e8ed70	wm831x_reg_unlock
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x0a4b2fb2	wm8350_gpio_config
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x11a781f6	wm8350_reg_lock
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x1d2aaf96	wm8350_unmask_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x2678829c	wm8350_block_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x2e47d25f	wm8350_device_init
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x442c7169	wm8350_block_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x4f9ae66f	wm8350_read_auxadc
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x53aeb174	wm8350_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x6373666c	wm8350_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x769875ce	wm8350_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x7b131a5d	wm8350_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x8ca1ed31	wm8350_reg_unlock
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xa70c3190	wm8350_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xcbb00f9d	wm8350_mask_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xd4483e6d	wm8350_device_exit
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xf1be35b4	wm8350_clear_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x16f231e2	wm8400_reset_codec_reg_cache
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x4cbb8bfd	wm8400_block_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x6c1fe7df	wm8400_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0xf52cebe9	wm8400_set_bits
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x503b1813	cb710_sg_dwiter_write_next_block
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x53cf1848	cb710_pci_update_config_reg
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0xf28e1dd9	cb710_sg_dwiter_read_next_block
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0xf2c8bad5	cb710_set_irq_handler
+EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x2df115d4	eeprom_93cx6_multiread
+EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x63d14d2f	eeprom_93cx6_read
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x02d25118	sdio_align_size
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x0998854c	sdio_unregister_driver
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x18003477	sdio_release_irq
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x1fedba22	sdio_f0_writeb
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x2349b4a4	sdio_writel
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x25533208	sdio_enable_func
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x2d457eec	sdio_readsb
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x313ab265	sdio_f0_readb
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x3820f3ec	sdio_memcpy_toio
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x5a18c1db	sdio_writesb
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x5cad8e64	sdio_writeb
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x5df69492	sdio_set_block_size
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x674d45f0	sdio_claim_host
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x7b2f4015	sdio_claim_irq
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x9625a377	sdio_register_driver
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xa5d3662f	sdio_memcpy_fromio
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xb2d5691e	sdio_release_host
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xb516f2de	sdio_disable_func
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xc887122b	sdio_readb
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xda248bdb	sdio_writew
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xe21fca08	sdio_readl
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xe4cf8e46	sdio_readw
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x3adb5493	sdhci_free_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x3bdca3ba	sdhci_resume_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x5d46d04f	sdhci_remove_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x827600f1	sdhci_suspend_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xa85ff68a	sdhci_alloc_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xd5ac5fe6	sdhci_add_host
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0xba70a5ad	cfi_cmdset_0200
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0xc51a4d5b	cfi_cmdset_0003
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0xec00b6f8	cfi_cmdset_0001
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0002 0x3c2fb3aa	cfi_cmdset_0002
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0020 0x5ac3a0a0	cfi_cmdset_0020
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x673a70f4	cfi_qry_present
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0xa29b0290	cfi_qry_mode_on
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0xff20cda9	cfi_qry_mode_off
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2000 0xb0f04418	DoC2k_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001 0x90793788	DoCMil_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001plus 0x62a65af0	DoCMilPlus_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/docecc 0x45937659	doc_decode_ecc
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x29a98ce1	default_mtd_writev
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x3380d372	register_mtd_user
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x4c3e49c3	mtd_erase_callback
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x6078820c	get_mtd_device_nm
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x61ff6b96	unregister_mtd_user
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x66a93ae3	deregister_mtd_parser
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x66b6e4ff	mtd_table
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x846142ff	add_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x88997256	del_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x8e161653	register_mtd_parser
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x8fefa109	get_sb_mtd
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x978bd1cc	get_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xa5a08294	mtd_table_mutex
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xb036138a	kill_mtd_super
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xd70be8cd	put_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xef700554	parse_mtd_partitions
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x26676915	deregister_mtd_blktrans
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x8c2fc37d	register_mtd_blktrans
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x8e389f29	add_mtd_blktrans_dev
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0xd400e862	del_mtd_blktrans_dev
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x1c5fc750	nand_scan_ident
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x94a2e54a	nand_scan
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xc6016633	nand_wait_ready
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xe5267463	nand_release
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xea18ff6d	nand_scan_tail
+EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0x4f2eeabb	onenand_scan
+EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0xcf1352f7	onenand_release
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x02954da6	ubi_leb_read
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x0b3c9a0f	ubi_leb_write
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x17d5a9f7	ubi_leb_change
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x42801d20	ubi_sync
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x4a88aebe	ubi_open_volume_nm
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x4b882957	ubi_is_mapped
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x6f09ba8a	ubi_register_volume_notifier
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x95c19608	ubi_leb_erase
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xa35bdb2b	ubi_close_volume
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xb95f5b70	ubi_open_volume
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xbc505df4	ubi_get_device_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xd04c8c1c	ubi_leb_map
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xd21369f5	ubi_leb_unmap
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xe7e4b1d1	ubi_do_get_device_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xedd24bbe	ubi_get_volume_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xfd6f0ef9	ubi_unregister_volume_notifier
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x39b88ab6	unregister_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x4b0b2372	can_free_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x60485815	close_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x8b168f66	free_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x8ec02ae0	can_bus_off
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x9c757282	open_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x9d5a3c4d	can_put_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xa2faa214	alloc_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xb3cdc579	register_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xca1c3fa7	can_get_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x163b5bf1	alloc_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x5397d2c8	unregister_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xa9910d2f	free_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xc075b18b	register_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xdc9bd500	sja1000_interrupt
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x02ecae58	mlx4_unregister_vlan
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x04da2ee2	mlx4_map_phys_fmr
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x092651e0	mlx4_buf_write_mtt
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x0dc76569	mlx4_db_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1242533a	mlx4_register_vlan
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x18b34db8	mlx4_multicast_attach
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1ad31a3b	mlx4_CLOSE_PORT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1b0b2eee	mlx4_write_mtt
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1c9e2618	mlx4_register_mac
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x2217ebcd	mlx4_buf_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x23c4f0a8	mlx4_srq_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x247ea001	mlx4_qp_release_range
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x2c633587	mlx4_mtt_cleanup
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x32ea221d	mlx4_cq_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x33e8520c	mlx4_cq_resize
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x3a3d4221	mlx4_alloc_cmd_mailbox
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x422be68c	mlx4_srq_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x440ea312	mlx4_fmr_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x47a25116	mlx4_qp_reserve_range
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x4b26c978	mlx4_uar_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x4e01f93a	mlx4_qp_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x53678160	mlx4_mtt_addr
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x57244383	mlx4_uar_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x594f6d5d	mlx4_INIT_PORT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x5c39e32c	mlx4_register_interface
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x61529e22	mlx4_srq_arm
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x65228442	mlx4_mr_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x67344d4e	mlx4_free_cmd_mailbox
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x77147337	mlx4_qp_query
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x77ed0fbb	mlx4_srq_query
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x79648b35	mlx4_SYNC_TPT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x7b6ac6e6	mlx4_qp_to_ready
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x80ad30ef	mlx4_qp_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x85dbceba	mlx4_fmr_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x8a34dd43	mlx4_db_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x8de70b17	mlx4_pd_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x963db7a6	mlx4_buf_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa09fb14d	mlx4_unregister_mac
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xaac8eb3b	mlx4_mr_enable
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb465b0aa	mlx4_cq_modify
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb97dfc00	mlx4_free_hwq_res
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xbdef997b	mlx4_multicast_detach
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc54e34f7	mlx4_qp_modify
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc5b75dfe	__mlx4_cmd
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc7f7b60d	mlx4_cq_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xcc494688	mlx4_fmr_enable
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xccc8b699	mlx4_mr_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe002c825	mlx4_unregister_interface
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe9adc22a	mlx4_fmr_unmap
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf232bb89	mlx4_qp_remove
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf34e6619	mlx4_pd_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf559f710	mlx4_mtt_init
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf85e68b1	mlx4_alloc_hwq_res
+EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0x76f4891f	usbnet_cdc_unbind
+EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0x8c4fcd8b	usbnet_generic_cdc_bind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x148093a6	rndis_tx_fixup
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x2d1266d3	rndis_unbind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x2d1b4884	rndis_status
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x69d009c9	rndis_rx_fixup
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x74a2c0f3	rndis_command
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x7d17ba37	generic_rndis_bind
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x0a941579	usbnet_get_settings
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x28063947	usbnet_probe
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x28bd59b4	usbnet_get_endpoints
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x2e9f8f20	usbnet_defer_kevent
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x34408379	usbnet_open
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x3624cd46	usbnet_get_msglevel
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x46946937	usbnet_resume_rx
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x475b6ba9	usbnet_resume
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x4d8c6792	usbnet_unlink_rx_urbs
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x5e80fcc5	usbnet_get_drvinfo
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x64d2f620	usbnet_set_settings
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x800e3661	usbnet_change_mtu
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x8e31053d	usbnet_stop
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x934710b0	usbnet_disconnect
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x9a552b1e	usbnet_suspend
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x9c1981f4	usbnet_start_xmit
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xacde84d0	usbnet_skb_return
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xbe7eaeb8	usbnet_pause_rx
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xc33121d4	usbnet_set_msglevel
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xdd87a5ad	usbnet_get_ethernet_addr
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xddd07201	usbnet_tx_timeout
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xdfe4e5b8	usbnet_purge_paused_rxq
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xe33699da	usbnet_nway_reset
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xed61c42d	usbnet_get_link
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x0f2cb2cc	i2400m_dev_bootstrap
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x1e38149a	i2400m_setup
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x523dd829	i2400m_netdev_setup
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x67e754d5	i2400m_cmd_get_state
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x7718ad21	i2400m_queue_work
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x78926d20	i2400m_tx_msg_sent
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x973fd254	i2400m_cmd_enter_powersave
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xb00b793c	i2400m_bm_cmd_prepare
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xb27c4742	i2400m_set_init_config
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xce973bc7	i2400m_tx
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xd6b6c0c9	i2400m_release
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xde2dfc6f	i2400m_tx_msg_get
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xe92c3e2b	i2400m_dev_reset_handle
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xf65072c9	i2400m_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0x3d415f9d	libipw_rx_any
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x0566a51c	lbs_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x1724d99f	lbs_remove_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x4286ee79	__lbs_cmd
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x52165c67	lbs_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x795513aa	lbs_queue_event
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x7db56cda	lbs_cmd_802_11_rate_adapt_rateset
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x9fc7edb4	lbs_cmd_copyback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xaabe2c95	lbs_notify_command_response
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xacdd139f	lbs_host_sleep_cfg
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xb0ed6271	lbs_add_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xb307b7b2	lbs_host_to_card_done
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xb59556ca	lbs_start_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xb67012f7	lbs_send_tx_feedback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xde006081	lbs_stop_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf49f812b	lbs_process_rxed_packet
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf64277de	lbs_debug
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x2d9a32bf	lbtf_remove_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x4b34242c	lbtf_cmd_response_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x76050c0b	lbtf_cmd_copyback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x93b2c3a8	lbtf_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xb8a08993	lbtf_send_tx_feedback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xcae92327	lbtf_bcn_sent
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xed5ab7be	lbtf_add_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xf0254daf	__lbtf_cmd
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0x94318bdb	if_usb_reset_device
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0xc2c4eaac	if_usb_prog_firmware
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x28d754d5	p54_parse_firmware
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x30228875	p54_register_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x41d6653c	p54_free_skb
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x58765669	p54_parse_eeprom
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x7523a249	p54_unregister_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xb203bd72	p54_init_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xb2a644ca	p54_read_eeprom
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xecd3e087	p54_free_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xf4b41697	p54_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x03528bf0	rt2x00mac_tx
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x154a4498	rt2x00lib_beacondone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x23ab50e5	rt2x00lib_remove_dev
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x2ec2fa5f	rt2x00mac_get_tx_stats
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x426ce8fb	rt2x00mac_start
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x57449473	rt2x00mac_add_interface
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x5a57913d	rt2x00lib_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x6551d8eb	rt2x00queue_get_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x6aaa8499	rt2x00mac_bss_info_changed
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x7ddebe45	rt2x00mac_config
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x81ef51f7	rt2x00mac_rfkill_poll
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x8cdbc3e2	rt2x00lib_rxdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x97c5f18f	rt2x00mac_stop
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xa59b04ce	rt2x00mac_conf_tx
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xad590c6e	rt2x00lib_txdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xb539a13a	rt2x00lib_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xbbec156a	rt2x00mac_set_key
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xc3c02935	rt2x00mac_remove_interface
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xda5580a8	rt2x00mac_set_tim
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xea4fc895	rt2x00queue_get_entry
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xefbb9374	rt2x00lib_probe_dev
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xf3347479	rt2x00mac_configure_filter
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xf7086df2	rt2x00queue_map_txskb
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xfcf4655a	rt2x00mac_get_stats
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x247779e0	rt2x00pci_uninitialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x3fed300a	rt2x00pci_rxdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x4492bb32	rt2x00pci_regbusy_read
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x497471df	rt2x00pci_probe
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x76d55ade	rt2x00pci_remove
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xa7c98002	rt2x00pci_initialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xb86757d0	rt2x00pci_write_tx_data
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xc57b1558	rt2x00pci_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xed7e97f9	rt2x00pci_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x0bcf7003	rt2x00usb_write_tx_data
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x1e62df7a	rt2x00usb_disable_radio
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x25eb58ab	rt2x00usb_clear_entry
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x28312e50	rt2x00usb_regbusy_read
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x2ccc9121	rt2x00usb_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x3127898e	rt2x00usb_vendor_request_buff
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x44ac30e9	rt2x00usb_initialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x57c60331	rt2x00usb_kick_tx_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x9f46ceb8	rt2x00usb_disconnect
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xa0381acb	rt2x00usb_kill_tx_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xa2585318	rt2x00usb_vendor_req_buff_lock
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xbd995670	rt2x00usb_uninitialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xccc9b989	rt2x00usb_vendor_request_large_buff
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xdb7073f0	rt2x00usb_vendor_request
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xdceb3ec1	rt2x00usb_probe
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xf3591217	rt2x00usb_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0x6a3a8a2a	wl1251_free_hw
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0x8cd81edd	wl1251_init_ieee80211
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0xd68471db	wl1251_alloc_hw
+EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0x7991f3e8	pcf50633_mbc_usb_curlim_set
+EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0x8b04d9f1	pcf50633_mbc_get_status
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x203ba6a3	wm8350_register_regulator
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x33e91722	wm8350_isink_set_flash
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x44444f3e	wm8350_dcdc_set_slot
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x7ab601c0	wm8350_register_led
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x8e1f8ecd	wm8350_ldo_set_slot
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x957ed872	wm8350_dcdc25_set_mode
+EXPORT_SYMBOL_GPL drivers/regulator/wm8400-regulator 0x43625d66	wm8400_register_regulator
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x0ee0c0f2	scsi_unregister_device_handler
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x24d1798d	scsi_dh_activate
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x593a36c2	scsi_dh_handler_exist
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x8338074f	scsi_dh_attach
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x87da947e	scsi_dh_detach
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x95bdd140	scsi_dh_set_params
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0xe1c99c8f	scsi_register_device_handler
+EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x374c1e1c	fcoe_wwn_from_mac
+EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0xe2584dc7	fcoe_libfc_config
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x02bf6f52	iscsi_put_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0406e173	iscsi_host_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x143ec841	iscsi_host_remove
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x17806715	iscsi_conn_stop
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x18ee0450	iscsi_session_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x1ed9c26c	iscsi_conn_start
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x1f6c7717	iscsi_session_failure
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x2b40a0ae	iscsi_conn_failure
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x2ba80dc8	iscsi_itt_to_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x34376bff	iscsi_complete_scsi_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x3b346c9e	iscsi_host_add
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x3bcae5ff	iscsi_eh_device_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4019ac59	iscsi_session_recovery_timedout
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x496fd74a	iscsi_change_queue_depth
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4dae711c	iscsi_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x50a71d94	iscsi_conn_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x50c07a6c	iscsi_suspend_queue
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x569d4cb9	iscsi_session_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5f5e264b	iscsi_conn_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5fb0bfd7	iscsi_conn_bind
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x65399160	__iscsi_get_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x6e3d8f19	iscsi_conn_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x76449a5b	iscsi_pool_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x7b7e2069	iscsi_session_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x7fd83219	__iscsi_complete_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x803d3ed2	iscsi_verify_itt
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x86a99345	iscsi_update_cmdsn
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x99f6e4bc	iscsi_host_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x9c72b065	iscsi_conn_send_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x9fbb9ffa	iscsi_queuecommand
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb363587b	iscsi_eh_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb42acd07	iscsi_host_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb5459c11	iscsi_pool_init
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb9ea674a	iscsi_itt_to_ctask
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xbda4e530	iscsi_host_set_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xbdb24a80	iscsi_complete_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xd56f19f1	iscsi_set_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xdacbfc13	iscsi_eh_target_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xde12de25	iscsi_conn_queue_work
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe667acd7	iscsi_suspend_tx
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xeaaa6c51	iscsi_prep_data_out_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf6374965	iscsi_requeue_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x0d362b94	iscsi_tcp_task_init
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x199afe99	iscsi_tcp_hdr_recv_prep
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x381e7503	iscsi_segment_init_linear
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x3e30f663	iscsi_tcp_dgst_header
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x5146560b	iscsi_tcp_conn_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x54de6cb4	iscsi_tcp_conn_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x64da6c42	iscsi_tcp_cleanup_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x8f28057c	iscsi_tcp_segment_unmap
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x9905829b	iscsi_tcp_recv_skb
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x994b8962	iscsi_tcp_task_xmit
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x9a6c1fc2	iscsi_tcp_r2tpool_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xa8a23744	iscsi_tcp_recv_segment_is_hdr
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xca18f5fc	iscsi_segment_seek_sg
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xde485b25	iscsi_tcp_conn_get_stats
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xe62738f7	iscsi_tcp_segment_done
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xf1dc9e66	iscsi_tcp_r2tpool_free
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x01739c60	sas_slave_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x043ed518	sas_eh_device_reset_handler
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x2102a1b2	sas_ssp_task_response
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x25d1ef1a	sas_domain_attach_transport
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x30dede0e	sas_slave_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x3128acfe	sas_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x321d16e0	sas_unregister_ha
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x5bbaccea	sas_change_queue_type
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x630ba048	sas_phy_enable
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x656a4723	sas_ioctl
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x88d75cb0	sas_bios_param
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x8c4bb6d4	sas_target_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x983dc59a	sas_phy_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xa6bbda20	sas_find_local_phy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xa78bfee2	sas_register_ha
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xa86c3715	sas_slave_configure
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xaeab5179	sas_eh_bus_reset_handler
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xc0505fe3	sas_domain_release_transport
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xc389ba3e	sas_request_addr
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xd122c85c	sas_task_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xea3413c4	sas_change_queue_depth
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xf5fcf08b	sas_queuecommand
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xff3ef54a	__sas_task_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x0ffe8842	srp_iu_put
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x5371b750	srp_iu_get
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x7c5e448b	srp_target_free
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x881298b3	srp_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x890c74b8	srp_transfer_data
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xca40f90d	srp_cmd_queue
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x13952724	scsi_host_put_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x37dedd31	scsi_tgt_queue_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x48d95029	scsi_tgt_free_queue
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x4d1de8ab	scsi_tgt_alloc_queue
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x50b3beff	scsi_tgt_it_nexus_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x6d3aff5d	scsi_tgt_cmd_to_host
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x6f1c9c03	scsi_tgt_tsk_mgmt_request
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xd1f03715	scsi_host_get_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xe005938a	scsi_tgt_it_nexus_create
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x031558de	iscsi_register_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x13d89c82	iscsi_unblock_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x174a8551	iscsi_recv_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x1af3f138	iscsi_create_conn
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x1ff25e87	iscsi_unregister_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x3d5cfcca	iscsi_session_chkready
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x48d7272b	iscsi_destroy_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x4e538ceb	iscsi_scan_finished
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x56537f3e	iscsi_conn_error_event
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x565b4670	iscsi_block_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x5bf0f04d	iscsi_free_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x70e87ae1	iscsi_lookup_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x7cbedbc5	iscsi_destroy_conn
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x8e8b8e32	iscsi_alloc_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xc37c3f70	iscsi_destroy_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xc3ca6ec4	iscsi_add_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xc79b08cb	iscsi_offload_mesg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xc7d7a9d9	iscsi_session_event
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xdcf6442d	iscsi_remove_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xefc03abd	iscsi_create_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xf0f08baf	iscsi_create_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xf3dad488	iscsi_host_for_each_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0x0ef06974	spi_populate_ppr_msg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xa0c71dac	spi_populate_sync_msg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xcffa2aff	spi_populate_width_msg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x056efcfe	srp_remove_host
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x3658d5f4	srp_rport_add
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xa076ffa6	srp_release_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xce8530c1	srp_rport_del
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xd67e1fe9	srp_attach_transport
+EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0x4f65b6b0	pciserial_remove_ports
+EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0x5847b768	pciserial_suspend_ports
+EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0x773b67e5	pciserial_init_ports
+EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0xdb9db799	pciserial_resume_ports
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x0e2c32f9	spi_bitbang_start
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x0ffe8733	spi_bitbang_cleanup
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x26f34007	spi_bitbang_stop
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x70cd56f7	spi_bitbang_transfer
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xce45ca7c	spi_bitbang_setup_transfer
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xe8cf8813	spi_bitbang_setup
+EXPORT_SYMBOL_GPL drivers/uio/uio 0x2831e087	uio_unregister_device
+EXPORT_SYMBOL_GPL drivers/uio/uio 0x29cc00d5	uio_event_notify
+EXPORT_SYMBOL_GPL drivers/uio/uio 0xcbf9ddc6	__uio_register_device
+EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0x7604c457	usbatm_usb_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0xbfbdafe4	usbatm_usb_probe
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x0e21ae21	usb_ftdi_elan_edset_input
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x17bddf0f	usb_ftdi_elan_edset_output
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x3911adf1	usb_ftdi_elan_write_pcimem
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x3ce54603	usb_ftdi_elan_edset_flush
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x7037fe8b	usb_ftdi_elan_edset_empty
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xbc358372	usb_ftdi_elan_read_pcimem
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xca5373cc	usb_ftdi_elan_edset_single
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xdd4118dd	usb_ftdi_elan_edset_setup
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xebb32370	ftdi_elan_gone_away
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x18a77db8	usb_serial_generic_write
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x1f7957a8	ezusb_writememory
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x3bc91d15	ezusb_set_reset
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x3c0a9554	usb_serial_generic_resume
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x47e7216e	usb_serial_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x64971d9c	usb_serial_generic_write_bulk_callback
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x82352402	usb_serial_generic_open
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x878db09d	usb_serial_probe
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x90922e06	usb_serial_generic_read_bulk_callback
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xacd89289	usb_serial_handle_sysrq_char
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xc01004a8	usb_serial_port_softint
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xc7276739	usb_serial_handle_dcd_change
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xcccbb5de	usb_serial_register
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xdb7cf079	usb_serial_generic_resubmit_read_urb
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xe1371637	usb_serial_handle_break
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xf9143f83	usb_serial_deregister
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x0be13004	usb_storage_usb_ids
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x0cb43d8f	usb_stor_Bulk_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x0ecb5310	usb_stor_control_msg
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x14db421c	usb_stor_CB_transport
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1586bc93	fill_inquiry_response
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x18f232ee	usb_stor_probe1
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1bc3edc2	usb_stor_sense_invalidCDB
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x45c82b02	usb_usual_ignore_device
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x54f0980f	usb_stor_suspend
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x5750abe3	usb_stor_bulk_transfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x6d6c7cbd	usb_stor_bulk_transfer_sg
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x86417309	usb_stor_set_xfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x89c26c7a	usb_stor_reset_resume
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x92bd0281	usb_stor_clear_halt
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xa1e47c57	usb_stor_resume
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xa2aacb5a	usb_stor_bulk_srb
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xa546e9a4	usb_stor_Bulk_transport
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xabce9824	usb_stor_post_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xb071e8e2	usb_stor_ctrl_transfer
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xb239eeb7	usb_stor_pre_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xb3e20a5c	usb_stor_transparent_scsi_command
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xbebee7d9	usb_stor_probe2
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xd16a4a3a	usb_stor_CB_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xd550071d	usb_stor_access_xfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xfbf23d87	usb_stor_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x09f3c921	wa_urb_enqueue_run
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x56d4808e	rpipe_ep_disable
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x59e8513a	wa_urb_dequeue
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x5d1670f0	wa_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x787e6235	__wa_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x8668d134	rpipe_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xf9e27759	wa_urb_enqueue
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x02996998	wusbhc_rh_control
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x0bb6bf5e	wusb_cluster_id_get
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x1146d6ae	wusbhc_rh_start_port_reset
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x1b705fd2	wusbhc_mmcie_rm
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x366366c6	wusbhc_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x4aba6dd2	wusbhc_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x59e8015e	wusbhc_b_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x75db103c	wusbhc_handle_dn
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x7aaf2393	wusbhc_rh_resume
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x82c8c613	wusbhc_rh_status_data
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x896a9725	wusbhc_mmcie_set
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x8a08f9c4	wusbhc_giveback_urb
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x9ad2028b	wusbhc_b_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xa57e72c9	wusbhc_rh_suspend
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb572bcea	wusbhc_reset_all
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb725d128	wusb_cluster_id_put
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xbbc7bc7c	__wusb_dev_get_by_usb_dev
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xdb8dd07f	wusbhc_chid_set
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xdf6e4f08	wusb_dev_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf770a6b4	wusbd
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xfe2e17d7	wusb_et_name
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x1ac8e915	i1480_fw_upload
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0xdbda220b	i1480_rceb_check
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0xf4d7ae8b	i1480_cmd
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x1f1c37b1	uwb_phy_rate_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x233ef4c1	uwb_rts_cts_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x286be73d	uwb_pca_base_priority_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x4e70577e	uwb_ack_policy_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x6c77ee25	uwb_phy_rate_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xc85b33ce	uwb_pca_base_priority_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xda855086	uwb_rts_cts_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xe8c81d64	uwb_ack_policy_store
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x06e9c91a	umc_device_register
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x329d8fb9	umc_controller_reset
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x660eef2d	__umc_driver_register
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x780ea028	umc_device_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x9684bc5c	umc_device_create
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xafda35fa	umc_bus_type
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xbdf2b208	umc_driver_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xc802d119	umc_match_pci_id
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x02be5927	uwb_rc_dev_addr_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0ab3581a	uwb_notifs_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0b8aad57	uwb_est_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0c6bdcfc	uwb_rc_mac_addr_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x1d83e856	uwb_pal_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x1e1c18b7	uwb_rsv_destroy
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x1fb8d24e	uwb_rsv_establish
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x26d56252	uwb_rc_neh_error
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2dc82b87	uwb_rc_pre_reset
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2f037ce6	uwb_rsv_terminate
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x30f353d7	uwb_radio_stop
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x3833864f	uwb_rsv_create
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x3c97b59a	uwb_rc_alloc
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x3e795502	uwb_notifs_deregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4d57ae3c	uwb_rsv_type_str
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x56b23d36	uwb_rc_put
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5a80d9c8	uwb_rsv_modify
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5e4bc088	__uwb_addr_print
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x62180c6b	uwb_rc_rm
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x662e871e	uwb_rc_cmd
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x688210a5	uwb_rc_init
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x69d84864	__uwb_rc_try_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6a81de34	uwb_pal_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x72ceaaea	uwb_radio_start
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x73e81303	uwb_dev_try_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x79cc01fc	uwb_rc_reset_all
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x7ba2c370	uwb_rsv_accept
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x7dcfcd23	uwb_ie_next
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x7dee7959	uwb_rc_add
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x83aea47a	uwb_rc_ie_rm
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x8f0da20e	uwb_rc_get_by_dev
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x912b18b5	uwb_rc_post_reset
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x98413234	uwb_rsv_state_str
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x9e15b136	uwb_dev_for_each
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xac11af19	uwb_est_find_size
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xc650a228	uwb_rc_neh_grok
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd1136c8d	uwb_rsv_get_usable_mas
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd6f59547	uwb_rc_get_by_grandpa
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd8a1684f	uwb_rc_vcmd
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe1716f06	uwb_est_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf2caace6	uwb_pal_init
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xfcffdd90	uwb_rc_cmd_async
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xffe58c7f	uwb_rc_ie_add
+EXPORT_SYMBOL_GPL drivers/uwb/whci 0x36ec1d71	whci_wait_for
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x002e5ceb	wlp_uuid_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x06d529fe	wlp_dev_prim_OUI_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x0d8e1bed	wlp_dev_prim_OUI_sub_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x0eafdfb2	wlp_dev_manufacturer_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x12680c2e	wlp_wss_activate_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x1ac95d57	wlp_dev_prim_category_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x24ccbc36	wlp_dev_model_name_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x27c9870b	wlp_prepare_tx_frame
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x31431693	wlp_dev_model_name_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x36e8e5de	wlp_wss_setup
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x4290a01f	wlp_dev_prim_subcat_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x4d19adc2	wlp_eda_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x4f20833b	wlp_receive_frame
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x62b376b6	wlp_dev_model_nr_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x6ac7038f	wlp_dev_manufacturer_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x75644bf4	wlp_neighborhood_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x765a192d	wlp_reset_all
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x79bb7f24	wlp_dev_serial_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x942a6009	wlp_dev_model_nr_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x9ada07c2	wlp_uuid_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xa0ee167c	wlp_dev_prim_subcat_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xae5493cf	wlp_dev_prim_OUI_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xb60a5270	wlp_dev_prim_category_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xc2adb5e9	wlp_wss_remove
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xc46cdcba	wlp_wss_activate_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xcb5bc62e	wlp_eda_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xcdf882d0	wlp_dev_name_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xcfd5b714	wlp_dev_prim_OUI_sub_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xd83c5850	wlp_dev_name_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xfcb7e9ba	wlp_setup
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xfd57be8f	wlp_dev_serial_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xfd924f08	wlp_remove
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x0b569058	ili9320_shutdown
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x2cee8a1c	ili9320_remove
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x60122fa0	ili9320_write_regs
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x849920ea	ili9320_resume
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x8fd7ffa9	ili9320_probe_spi
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xdebbb445	ili9320_suspend
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xf109524b	ili9320_write
+EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0x61a8a9ee	fb_sys_write
+EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0x9caab50b	fb_sys_read
+EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0x36917bf9	sis_free_new
+EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0xa7d1cb21	sis_malloc_new
+EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x2ac97927	register_virtio_driver
+EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x38829341	unregister_virtio_device
+EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x4982de25	register_virtio_device
+EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x57a1416a	unregister_virtio_driver
+EXPORT_SYMBOL_GPL drivers/virtio/virtio 0xd6c7e1f2	virtio_check_driver_offered_feature
+EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x0ac0ab25	vring_interrupt
+EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x8a6095db	vring_del_virtqueue
+EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0xf6857135	vring_transport_features
+EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0xf8609b4d	vring_new_virtqueue
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x2f01ce60	w1_write_block
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x4ba24b2d	w1_reset_bus
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x4df0852d	w1_write_8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x5e0ad413	w1_read_8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x7c2f2afb	w1_calc_crc8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xd1d08e2d	w1_reset_select_slave
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xde5ff971	w1_touch_block
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xe7b758a5	w1_next_pullup
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xf5545438	w1_read_block
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x0864c4a4	dlm_new_lockspace
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x1bd4e9c5	dlm_posix_get
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x6e873156	dlm_posix_lock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x9321df95	dlm_lock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xa17bdc1b	dlm_posix_unlock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xcf9f3328	dlm_release_lockspace
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xdc583c08	dlm_unlock
+EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0x6a30a211	exportfs_encode_fh
+EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0xddf7dbf7	exportfs_decode_fh
+EXPORT_SYMBOL_GPL fs/fat/fat 0x04d624ce	fat_detach
+EXPORT_SYMBOL_GPL fs/fat/fat 0x0d8a328a	fat_flush_inodes
+EXPORT_SYMBOL_GPL fs/fat/fat 0x1d6d7acf	fat_sync_inode
+EXPORT_SYMBOL_GPL fs/fat/fat 0x24c80f0a	fat_time_unix2fat
+EXPORT_SYMBOL_GPL fs/fat/fat 0x256174ea	fat_alloc_new_dir
+EXPORT_SYMBOL_GPL fs/fat/fat 0x2a2a8f0d	fat_free_clusters
+EXPORT_SYMBOL_GPL fs/fat/fat 0x35e7056b	fat_attach
+EXPORT_SYMBOL_GPL fs/fat/fat 0x44a9196c	fat_setattr
+EXPORT_SYMBOL_GPL fs/fat/fat 0x523b80c9	fat_add_entries
+EXPORT_SYMBOL_GPL fs/fat/fat 0x54b86d37	fat_build_inode
+EXPORT_SYMBOL_GPL fs/fat/fat 0x5d079f8c	fat_dir_empty
+EXPORT_SYMBOL_GPL fs/fat/fat 0x5dda1ac8	fat_fill_super
+EXPORT_SYMBOL_GPL fs/fat/fat 0x69a89cf8	fat_getattr
+EXPORT_SYMBOL_GPL fs/fat/fat 0x6fe7a21e	fat_remove_entries
+EXPORT_SYMBOL_GPL fs/fat/fat 0x846ff0f7	fat_get_dotdot_entry
+EXPORT_SYMBOL_GPL fs/fat/fat 0x8aa5b844	fat_fs_error
+EXPORT_SYMBOL_GPL fs/fat/fat 0xd4fae2f6	fat_scan
+EXPORT_SYMBOL_GPL fs/fat/fat 0xe8e1f9a7	fat_search_long
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x17ce645d	locks_end_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x1a618932	nlmsvc_unlock_all_by_ip
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x1c4ae447	nlmclnt_proc
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x35c72cfe	nlmsvc_ops
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x6f959b35	locks_in_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x7b9b2a4d	nlmclnt_done
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x96877ac4	locks_start_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xa7b91a7b	lockd_down
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xeb89c81e	nlmsvc_unlock_all_by_sb
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xf55f7694	nlmclnt_init
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xf6933c48	lockd_up
+EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0x8b730e20	nfsacl_decode
+EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0xca31e3ea	nfsacl_encode
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x0a960e68	o2nm_node_get
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1b89c6ee	o2hb_fill_node_map
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1cb231d0	mlog_not_bits
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1d747ce3	o2hb_check_node_heartbeating
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x2e702612	o2hb_unregister_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x36418553	o2net_send_message
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x46dc9295	o2nm_node_put
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x4900035b	o2hb_stop_all_regions
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x5fc8dd9b	o2hb_register_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x687f6251	mlog_and_bits
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x7fa54768	o2hb_setup_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa82a8645	o2nm_this_node
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa87bc9e7	o2nm_configured_node_map
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa9f5379a	o2net_send_message_vec
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xae808bac	o2net_register_handler
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xbaeb4700	o2hb_check_node_heartbeating_from_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xd60f2c6c	o2hb_check_local_node_heartbeating
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xd733de08	o2nm_get_node_by_num
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf1a5611d	o2net_unregister_handler_list
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xfb4a973d	o2nm_get_node_by_ip
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x20610ee4	dlm_register_domain
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x4d4c9e39	dlm_print_one_lock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x580dd520	dlmlock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x7a1211f8	dlm_setup_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x84bd4b83	dlm_register_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x9b9a4764	dlm_unregister_domain
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd7ba575e	dlm_errmsg
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd8fa57a6	dlm_unregister_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xeb56f59e	dlmunlock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xfb86b96f	dlm_errname
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0562c415	ocfs2_cluster_this_node
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x06379db6	ocfs2_dlm_lvb_valid
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0e27f909	ocfs2_dlm_lock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x21db5b88	ocfs2_cluster_disconnect
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x33f266d7	ocfs2_stack_glue_register
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4a1f6fe9	ocfs2_cluster_connect
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4d3af7fa	ocfs2_cluster_hangup
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x81c85a68	ocfs2_dlm_lock_status
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x91fab465	ocfs2_dlm_lvb
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x963932a3	ocfs2_stack_glue_set_locking_protocol
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xa7d5c1c0	ocfs2_dlm_unlock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xbac1d6d6	ocfs2_plock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xbbc4ef97	ocfs2_stack_supports_plocks
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xc3f34c10	ocfs2_stack_glue_unregister
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xd066711e	ocfs2_dlm_dump_lksb
+EXPORT_SYMBOL_GPL lib/lzo/lzo_compress 0x56b63670	lzo1x_1_compress
+EXPORT_SYMBOL_GPL lib/lzo/lzo_decompress 0xf30fda27	lzo1x_decompress_safe
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x300d7e57	free_rs
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x6fbb3bd9	init_rs_non_canonical
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xabda1e2e	decode_rs16
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xb050f329	init_rs
+EXPORT_SYMBOL_GPL net/802/garp 0x111908ae	garp_uninit_applicant
+EXPORT_SYMBOL_GPL net/802/garp 0x157f9a51	garp_request_join
+EXPORT_SYMBOL_GPL net/802/garp 0x2fd34bab	garp_request_leave
+EXPORT_SYMBOL_GPL net/802/garp 0x4b493ad8	garp_init_applicant
+EXPORT_SYMBOL_GPL net/802/garp 0x5e02de0f	garp_register_application
+EXPORT_SYMBOL_GPL net/802/garp 0x812c60dc	garp_unregister_application
+EXPORT_SYMBOL_GPL net/802/stp 0x77287168	stp_proto_register
+EXPORT_SYMBOL_GPL net/802/stp 0xc91e9b1e	stp_proto_unregister
+EXPORT_SYMBOL_GPL net/ax25/ax25 0xac93ae05	ax25_bcast
+EXPORT_SYMBOL_GPL net/ax25/ax25 0xaeb7451e	ax25_defaddr
+EXPORT_SYMBOL_GPL net/ax25/ax25 0xd314447d	ax25_register_pid
+EXPORT_SYMBOL_GPL net/bluetooth/bluetooth 0x66d82510	bt_class
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x03ce1385	dccp_disconnect
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x0954295f	dccp_getsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x0ac6a2b0	dccp_reqsk_send_ack
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x0dba26de	dccp_ioctl
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x14bf9f2d	dccp_sync_mss
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x1d99d49a	dccp_timestamp
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x373d3ca2	inet_dccp_listen
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x3b8721e0	dccp_connect
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x3c5c3a53	dccp_send_sync
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x3ce1cc82	dccp_child_process
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x4cdd391d	dccp_feat_list_purge
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x56ea266a	dccp_state_name
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x594387b3	dccp_parse_options
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x605edfc2	dccp_reqsk_init
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x67c8bc45	dccp_rcv_state_process
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x7736f132	dccp_ctl_make_reset
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x7a0568f6	dccp_check_req
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x7ecd62ec	dccp_destroy_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x86be7924	dccp_packet_name
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x8b7d8caf	dccp_statistics
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x91a827c0	dccp_done
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x98148466	dccp_set_state
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x981bcafe	dccp_sendmsg
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x9ddd92ee	dccp_poll
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xa04d8993	dccp_recvmsg
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xa0bf141b	dccp_insert_option_timestamp
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xb2bca6b9	dccp_make_response
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xb4655738	dccp_setsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xbb525478	dccp_send_ack
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xc17af03c	dccp_orphan_count
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xcb83f0f8	dccp_init_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xcdeaf2e3	dccp_rcv_established
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xd14aa0bb	dccp_create_openreq_child
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xd25ee0e4	dccp_close
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xd8b1a1f1	dccp_insert_option
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xde405ebe	dccp_hashinfo
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xe04c76b9	dccp_shutdown
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xe4973c5f	dccp_death_row
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xf1bd8009	dccp_insert_option_elapsed_time
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x2c0c0b73	dccp_v4_do_rcv
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x2c322652	dccp_v4_send_check
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x9f6fe1cc	dccp_v4_request_recv_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xbab943ff	dccp_v4_conn_request
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xd2829a09	dccp_invalid_packet
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xe2e45969	dccp_v4_connect
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0x6d40a921	need_ipv4_conntrack
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0x9b24045e	nf_nat_seq_adjust_hook
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_defrag_ipv4 0x6b6c3d10	nf_defrag_ipv4_enable
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x07ae60b6	nf_nat_proto_in_range
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x3e2fa9aa	nf_nat_proto_find_get
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x56d70e1f	nf_nat_icmp_reply_translation
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x8569547a	nf_nat_proto_unique_tuple
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x94a08134	nf_nat_proto_nlattr_to_range
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xa1b26de5	nf_nat_proto_range_to_nlattr
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xa376b63f	nf_nat_packet
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xabf0d95a	nf_nat_get_offset
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xf187f1a3	nf_nat_proto_put
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat_proto_gre 0x636b12c8	nf_nat_need_gre
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x05920e1f	tcp_vegas_pkts_acked
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x28609e87	tcp_vegas_get_info
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x8e349f10	tcp_vegas_cwnd_event
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x97df1c62	tcp_vegas_state
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xd32c419c	tcp_vegas_init
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x07ab449c	ipv6_dup_options
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x08a3e5d1	net_ipv6_ctl_path
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x0e9837eb	inet6_csk_addr2sockaddr
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x16438847	fl6_sock_lookup
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x497cacf8	ip6_sk_dst_lookup
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x4b39f8fa	inet6_destroy_sock
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x61a848a4	inet6_sk_rebuild_header
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x6bb6e729	ip6_dst_lookup
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x7e03a046	ip6_dst_blackhole
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x85478a0b	inet6_hash_frag
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x91866536	ipv6_find_tlv
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xa136b46b	inet6_csk_xmit
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xcb453934	inet6_csk_search_req
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xd9225dec	ipv6_opt_accepted
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xdc18a816	inet6_csk_bind_conflict
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xe864cbb2	ip6_local_out
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xfcc616b8	inet6_csk_reqsk_queue_hash_add
+EXPORT_SYMBOL_GPL net/mac80211/mac80211 0x1cb27297	ieee80211_iterate_active_interfaces_atomic
+EXPORT_SYMBOL_GPL net/mac80211/mac80211 0xa31f8441	ieee80211_iterate_active_interfaces
+EXPORT_SYMBOL_GPL net/netfilter/ipvs/ip_vs 0xe6476b4a	net_vs_ctl_path
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x02475530	nf_conntrack_l4proto_udp6
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x045072cd	nf_ct_port_nla_policy
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x04fba927	nf_conntrack_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x09193966	__nf_conntrack_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x0953bad8	nf_expect_event_cb
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x0df2e0d7	__nf_ct_refresh_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x11a80e48	print_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x122d63fd	nf_ct_expect_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x1a25e69c	nf_ct_helper_ext_add
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x1a33a243	nf_ct_extend_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x1bf37e8f	nf_conntrack_alloc
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x1d92d7a8	nf_conntrack_l4proto_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x2eb545b4	nf_conntrack_helper_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x307137b2	nf_conntrack_l4proto_udp4
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x32ed5213	__nf_ct_kill_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3f5b1415	nf_ct_port_nlattr_to_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x44e8e1c6	nf_conntrack_free
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x48323f9f	nf_ct_deliver_cached_events
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4b9065a9	nf_ct_alloc_hashtable
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4ce9e641	nf_ct_expect_register_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4e2f19c8	nf_conntrack_flush_report
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4e5c1927	__nf_ct_l4proto_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x549aedd6	nf_ct_invert_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x582a4864	nf_conntrack_in
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5882ba33	nf_conntrack_set_hashsize
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5c12cc94	nf_conntrack_alter_reply
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5ec27558	seq_print_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6048ee6e	nf_conntrack_l3proto_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x608fee4f	nf_conntrack_event_cb
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6098776f	nf_ct_unexpect_related
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x62813e5c	nf_ct_port_nlattr_tuple_size
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x62afa96b	nf_ct_remove_expectations
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x63f4b320	__nf_ct_try_assign_helper
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x67c3591c	nf_ct_nat_offset
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6a72d15b	nf_ct_expect_unregister_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6d466924	nf_ct_expect_related_report
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6dd2b501	nf_conntrack_lock
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6e224a7a	need_conntrack
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x74c1f4da	nf_conntrack_register_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x767d9952	nf_ct_unlink_expect
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x78f9b710	nf_ct_l3proto_try_module_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8148183f	nf_ct_l3proto_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8a2c7a95	nf_conntrack_l4proto_tcp6
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8e278465	__nf_ct_expect_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8ffe7e89	nf_conntrack_htable_size
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x90ff6c9f	nf_ct_invert_tuplepr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x92ee759f	nf_conntrack_l4proto_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x97085493	nf_conntrack_helper_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x98f320e1	nf_conntrack_tuple_taken
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9af3f6c1	nf_ct_free_hashtable
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9b2397d2	nf_conntrack_untracked
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9eb5142e	nf_ct_delete_from_lists
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9eebc98c	nf_ct_get_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xa0f1ca29	nf_ct_expect_init
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xa23c3959	nf_ct_expect_alloc
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xa54718af	nf_ct_insert_dying_list
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xab4c6e92	nfnetlink_parse_nat_setup_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb602c57e	nf_ct_l3proto_module_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb81a1817	nf_conntrack_l4proto_tcp4
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb82dcae1	nf_ct_l3proto_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xbd4ec15b	__nf_conntrack_confirm
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xbff98fe1	nf_ct_get_tuplepr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc18ac88d	nf_ct_expect_hsize
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc296efd9	nf_conntrack_hash_insert
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc502f062	nf_ct_iterate_cleanup
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc50d99f4	nf_ct_expect_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xca4c6ae3	nf_conntrack_l3proto_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xcf8cb901	nf_ct_port_tuple_to_nlattr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xe7094e62	nf_ct_l3protos
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xe806f906	__nf_conntrack_helper_find_byname
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xefa3620b	nf_ct_extend_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf38bcdf3	nf_conntrack_max
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf6be2e5f	nf_conntrack_unregister_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xfa846db9	nf_conntrack_l3proto_generic
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_amanda 0x460e8ef6	nf_nat_amanda_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_ftp 0xf8632b7e	nf_nat_ftp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x012748e4	set_sig_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x04e472a8	nat_h245_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x40509e9a	nat_rtp_rtcp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x5c5a9e63	set_ras_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x5cb8a7dd	set_h225_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xabeea8e6	nat_callforwarding_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xbeb40b24	nat_q931_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xe2c53561	get_h225_addr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xe8517d2f	set_h245_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xf3e9aea8	nat_t120_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_irc 0x60480f62	nf_nat_irc_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x289e4b4d	nf_nat_pptp_hook_exp_gre
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x63677466	nf_nat_pptp_hook_expectfn
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0xa7c489d0	nf_nat_pptp_hook_outbound
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0xb19a05d5	nf_nat_pptp_hook_inbound
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_proto_gre 0x16f02f70	nf_ct_gre_keymap_add
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_proto_gre 0x805d9b37	nf_ct_gre_keymap_destroy
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x0199748c	ct_sip_parse_numerical_param
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x14e7bd76	ct_sip_parse_address_param
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x31082973	ct_sip_parse_header_uri
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x339e6344	nf_nat_sdp_port_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x3fdaa371	ct_sip_parse_request
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x87583c10	nf_nat_sdp_session_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x9fa8aa39	nf_nat_sdp_media_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xcb1a197d	nf_nat_sdp_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xd1a2bab5	ct_sip_get_header
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xdceacf1b	ct_sip_get_sdp_header
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xef05631b	nf_nat_sip_expect_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xfc80e5d7	nf_nat_sip_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_tftp 0xfa105533	nf_nat_tftp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_tproxy_core 0x6647397e	nf_tproxy_assign_sock
+EXPORT_SYMBOL_GPL net/netfilter/nf_tproxy_core 0x741a90ad	nf_tproxy_get_sock_v4
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x1e35083e	nfnetlink_subsys_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x1f58e71b	nfnl_lock
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x3895cd7a	nfnl_unlock
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x7ffa6d14	nfnetlink_subsys_register
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x808b30c3	nfnetlink_send
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xc37ba37d	nfnetlink_unicast
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xeca95329	nfnetlink_has_listeners
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xef9b4bbd	nfnetlink_set_err
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink_log 0xf1296832	nfulnl_log_packet
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x098ffa39	xt_unregister_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x16b1d74c	xt_replace_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x25730a99	xt_find_table_lock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x40728a63	xt_find_revision
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x470b1f78	xt_proto_init
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x5709107a	per_cpu__xt_info_locks
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x8428a1ae	xt_proto_fini
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x9bbe1a95	xt_check_match
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xa01e9362	xt_table_unlock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xbe198287	xt_request_find_target
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xd4d1a581	xt_check_target
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xf101ea8c	xt_register_table
+EXPORT_SYMBOL_GPL net/rxrpc/af-rxrpc 0x79ab6a01	rxrpc_unregister_security
+EXPORT_SYMBOL_GPL net/rxrpc/af-rxrpc 0xa5bdcd56	rxrpc_register_security
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x00c52ef5	g_make_token_header
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x089f289f	gss_svc_to_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x3b94bd01	gss_mech_get_by_name
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x4493e959	gss_mech_put
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x6377da23	gss_mech_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x8d1a827e	svcauth_gss_register_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xa3aa62c7	gss_service_to_auth_domain_name
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xb43f2ba7	svc_gss_principal
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xb44e011e	gss_pseudoflavor_to_service
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xb5dea7ef	g_token_size
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xbec4b615	svcauth_gss_flavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xcb633bd1	gss_mech_register
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xdbd41084	gss_mech_get_by_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xe038b97b	gss_mech_get
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xf8b2ff6e	g_verify_token_header
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x00001cd8	__rpc_wait_for_completion_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x041cd8b3	svc_set_num_threads
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x04bf7af7	xdr_init_encode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x05e807a9	xdr_encode_string
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x065994f1	xdr_encode_opaque_fixed
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x07b710a8	xprt_register_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0995298f	rpc_call_start
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0a25b701	rpc_put_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0f668ba9	svc_auth_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0f6bb116	xprt_complete_rqst
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0f9fd9c0	rpc_ntop
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x115088b2	rpcauth_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x124e97d9	rpc_peeraddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x126e1738	xprt_wait_for_buffer_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x12e280e3	svc_proc_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x16b3381b	svc_addsock
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x19cb4334	svc_close_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1a8e1370	svc_authenticate
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1bc7d442	auth_unix_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1ecea66e	xdr_partial_copy_from_skb
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x20df18f1	xprt_write_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x21d3f24d	xprt_lookup_rqst
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x21db9396	svc_process
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x23bfd36f	rpc_sleep_on
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x26842849	svc_exit_thread
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x276dc999	rpc_run_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x27f459a5	svc_sock_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2919b156	xdr_decode_string_inplace
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x29b17385	rpc_call_sync
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2aa17774	rpc_free_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2b41b2cb	svc_sock_destroy
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2c9dd896	xprt_set_retrans_timeout_def
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2eec63c9	xdr_encode_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3057bf81	rpc_wake_up_status
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x31a89d59	rpc_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x33a079fa	svc_print_addr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x379b8e43	xdr_buf_subsegment
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x37d20813	xdr_decode_word
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x38c31bbe	svc_find_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x38ef8b27	rpc_call_async
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3a24d478	rpc_force_rebind
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3adefe75	sunrpc_cache_unregister_pipefs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3dde2b9d	rpcb_getport_async
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x42fdf142	xdr_reserve_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4373cace	xdr_decode_array2
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x43812ef9	rpc_setbufsize
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x439c488f	auth_domain_put
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x43de8c40	rpc_peeraddr2str
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4479db9f	auth_domain_find
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x458d220c	rpc_shutdown_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4870b753	svc_wake_up
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4b270d5c	auth_domain_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4c741dac	svc_create_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x52718730	svc_reg_xprt_class
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x532e1888	rpc_restart_call_prepare
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x53445f68	nlm_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x53d48dad	rpc_wake_up_next
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x570dfb14	xprt_adjust_cwnd
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x58e5c4a0	rpc_wake_up_queued_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5a99614c	xdr_inline_decode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5b14ec1a	rpc_put_mount
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5bd26000	rpc_proc_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5db1c3c2	put_rpccred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5db7b43b	read_bytes_from_xdr_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x612c7866	svc_xprt_copy_addrs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x61e00903	xdr_encode_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6301411f	rpc_wake_up
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6637f4e1	rpc_max_payload
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x66dacd38	svc_xprt_put
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x675524ec	rpc_sockaddr2uaddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6a6ba34f	rpc_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6a9a5417	xprt_disconnect_done
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6c5304c5	rpcb_getport_sync
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6d7ba834	svc_prepare_thread
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6dbf22bc	rpc_bind_new_program
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6e309c7c	auth_unix_add_addr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6eea229d	svcauth_unix_purge
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x70b5bae9	rpc_mkpipe
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x71fa908a	cache_flush
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x72081f95	xprt_release_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x729cd93d	rpcauth_init_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x733abab3	svc_sock_update_bufs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7351735f	svc_xprt_received
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x742ddb7d	xdr_init_decode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x77dd5084	xdr_buf_from_iov
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7a1f1dbd	svc_destroy
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7a482632	svc_max_payload
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7de53067	rpc_init_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7e8ac1d0	xdr_encode_array2
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7f55c91c	rpc_alloc_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7fc136a1	xprt_wake_pending_tasks
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x809cb4a1	sunrpc_cache_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x85354461	rpc_killall_tasks
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x86ed282a	rpc_uaddr2sockaddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x877c1047	rpc_print_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x87f2138a	auth_unix_forget_old
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8bb4055b	rpc_queue_upcall
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8bf5d19d	cache_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8c95c5cc	cache_check
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8f713092	rpcauth_generic_bind_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x951c6bba	svc_create_pooled
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9730b942	xprt_reserve_xprt_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x97c0f5a6	svc_xprt_init
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x986b8516	xdr_shift_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x99926b1f	rpcauth_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9beb0e74	rpc_call_null
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa02e145c	rpc_unlink
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa0f6577a	rpc_exit_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa2f425e9	rpc_lookup_machine_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa6e68472	xprt_update_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa9f97bce	xdr_enter_page
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xac38fa27	svc_seq_show
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xac72ef95	rpc_lookup_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xaf4d01f2	xdr_buf_read_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xaf5bf6ef	nfs_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xaff7a174	xprt_unregister_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb2d273f3	xdr_write_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb2daf74c	xdr_skb_read_bits
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb636be45	svc_drop
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb771f7a5	svc_set_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb90f1a31	rpc_init_wait_queue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xba1d9c00	svc_proc_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbb1eac99	rpc_proc_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbcc3789d	svc_xprt_names
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbd8f21ff	sunrpc_cache_register_pipefs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbf9d1b96	nfsd_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbfdbfeab	svc_reserve
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc12435e3	rpc_calc_rto
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc1e66b9e	svcauth_unix_set_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc37b23b4	rpc_delay
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc3880471	xdr_decode_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc3e7e970	xprt_release_xprt_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc74b7eb4	svc_recv
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc78d5203	svc_xprt_enqueue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc8e96dea	qword_addhex
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xca572748	xdr_read_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xccc2372e	rpc_pton
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcde6d2c8	rpcauth_destroy_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xce7dbe15	rpcauth_lookup_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcee467f3	xprt_load_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd1e78e0f	rpc_restart_call
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd20af6ee	xprt_release_rqst_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd222bfd2	svc_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd615165f	csum_partial_copy_to_xdr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd6796f61	rpc_get_mount
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd6b62b90	sunrpc_cache_pipe_upcall
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd9e44678	xdr_process_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdcba8686	svc_auth_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe07d1f2e	unix_domain_find
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe4840ba7	rpc_clone_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe51bf1fb	svc_sock_names
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe5919cb1	xdr_encode_opaque
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe9363444	svc_unreg_xprt_class
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe97f4ce5	qword_get
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe982da6f	rpcauth_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xebe62dd6	rpc_destroy_wait_queue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xec22d8d4	xprt_reserve_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xed9068f8	cache_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xedcf6be4	qword_add
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xee98930d	xprt_set_retrans_timeout_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xeeacab69	rpc_update_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xefbe5e96	sunrpc_cache_update
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf3639910	xdr_encode_word
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf9d1164c	rpc_free
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfa108665	rpc_malloc
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfa2ef2e2	cache_purge
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfe3ae15b	xdr_inline_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xff44ea5b	rpcauth_init_credcache
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x0081325c	wimax_state_get
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x042c7df5	wimax_state_change
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x2a64c4fb	wimax_report_rfkill_sw
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x2b135394	wimax_dev_add
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x4107f317	wimax_report_rfkill_hw
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x63b79b95	wimax_msg_send
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x6b5fc0f4	wimax_msg_alloc
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x94ccb86e	wimax_msg
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xa7407ff9	wimax_msg_data_len
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xbc8d304c	wimax_dev_rm
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xbe8f9ebc	wimax_dev_init
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xcbd4adf7	wimax_msg_data
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xe71763fe	wimax_msg_len
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x04cfbe84	cfg80211_wireless_stats
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x09743fe3	cfg80211_wext_giwap
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x11a4326d	cfg80211_wext_siwtxpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x13ad5db8	cfg80211_wext_giwfreq
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x1e12a80a	cfg80211_wext_siwfreq
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x23e9addc	cfg80211_wext_siwmode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x3114b967	cfg80211_wext_siwrts
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x3b2fb011	cfg80211_wext_giwname
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x3cab4cd5	cfg80211_wext_giwrts
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x4325ff1b	cfg80211_wext_giwfrag
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x47ae7d56	cfg80211_wext_siwauth
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x493643dc	cfg80211_wext_siwretry
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x4b4e2e91	cfg80211_wext_giwencode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x521284ca	cfg80211_wext_giwretry
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x62cc1003	cfg80211_wext_giwauth
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x6647924e	cfg80211_wext_siwfrag
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x8b75cfd0	cfg80211_wext_giwessid
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x905108c6	cfg80211_wext_siwessid
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x9b9e1480	cfg80211_wext_siwscan
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xaa88485d	cfg80211_wext_giwscan
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xb1b748ec	cfg80211_wext_giwtxpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xb4a6d5dc	cfg80211_wext_siwmlme
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xbf81bf07	cfg80211_wext_siwencode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xce85258f	cfg80211_wext_giwrate
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xd5e3b132	cfg80211_wext_siwgenie
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xdbebb369	cfg80211_wext_siwap
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xde73ecfd	cfg80211_wext_giwmode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xe4e2f7c7	cfg80211_wext_giwrange
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xebe748da	cfg80211_wext_siwrate
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xed137ef5	cfg80211_wext_siwencodeext
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xee494be0	cfg80211_wext_siwpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xf56d8cf6	cfg80211_wext_giwpower
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x4b2bbc31	ipcomp_output
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x8b674c68	ipcomp_destroy
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0xbf96f693	ipcomp_init_state
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0xfb946c31	ipcomp_input
+EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0x05e026f3	aoa_get_card
+EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0x075a2eed	aoa_fabric_unregister
+EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0x0821398a	aoa_fabric_register
+EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0x3c9fc67b	aoa_snd_device_new
+EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0x451789df	aoa_fabric_unlink_codec
+EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0x804e9b3d	aoa_codec_register
+EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0x90a3a2ab	aoa_snd_ctl_add
+EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0xe693c7d6	ftr_gpio_methods
+EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0xe8d256cb	aoa_codec_unregister
+EXPORT_SYMBOL_GPL sound/aoa/core/snd-aoa 0xf76b1284	pmf_gpio_methods
+EXPORT_SYMBOL_GPL sound/aoa/soundbus/snd-aoa-soundbus 0x1f06e86b	soundbus_register_driver
+EXPORT_SYMBOL_GPL sound/aoa/soundbus/snd-aoa-soundbus 0x383237a2	soundbus_add_one
+EXPORT_SYMBOL_GPL sound/aoa/soundbus/snd-aoa-soundbus 0x842ce684	soundbus_dev_put
+EXPORT_SYMBOL_GPL sound/aoa/soundbus/snd-aoa-soundbus 0xa495fb3b	soundbus_remove_one
+EXPORT_SYMBOL_GPL sound/aoa/soundbus/snd-aoa-soundbus 0xa71668e6	soundbus_unregister_driver
+EXPORT_SYMBOL_GPL sound/aoa/soundbus/snd-aoa-soundbus 0xe4e754e1	soundbus_dev_get
+EXPORT_SYMBOL_GPL sound/core/snd-pcm 0xa286a234	snd_pcm_format_name
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x042b753c	snd_hda_codec_configure
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x072d98c0	snd_hda_ch_mode_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0baa9bb3	snd_hda_bind_sw
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0c34b504	snd_hda_add_vmaster
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0d72e3d1	snd_hda_multi_out_analog_cleanup
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0f70deb9	snd_hda_mixer_bind_switch_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x149580ad	snd_hda_ch_mode_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x15b1bd5e	query_amp_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x18de5864	snd_hda_query_pin_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1abadfea	snd_hda_sequence_write_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1c25f39a	snd_hda_multi_out_dig_open
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1de34ee7	snd_hda_set_vmaster_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1f5d879d	snd_hda_codec_amp_stereo
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x22f6b211	snd_hda_ctl_add
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x238ba797	snd_hda_mixer_bind_ctls_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x27f4b168	snd_hda_get_connections
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x28ca407a	snd_hda_codec_resume_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2a31539c	snd_hda_queue_unsol_event
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2c335f04	snd_hda_codec_set_pincfg
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3b03db2c	snd_hda_is_supported_format
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x439bd5ce	snd_hda_check_amp_list_power
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5ae76f73	auto_pin_cfg_labels
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5b01b0c2	snd_hda_detach_beep_device
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5b42e990	snd_hda_codec_write_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5eb2fda0	snd_hda_codec_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x649d5612	snd_hda_override_amp_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6cc4e84e	snd_hda_mixer_amp_volume_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6f5cd0c4	snd_hda_get_hint
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x719e6a69	snd_hda_add_new_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x72c2925a	snd_hda_check_board_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x736751bb	snd_hda_codec_write
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x77c79b53	snd_hda_create_spdif_share_sw
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x77cf6501	snd_hda_mixer_amp_volume_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7ed90489	snd_hda_get_sub_nodes
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7f7097c6	snd_hda_mixer_bind_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7ff4171f	snd_hda_mixer_amp_switch_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8216ab03	snd_hda_find_mixer_ctl
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x83ac2271	snd_hda_mixer_bind_switch_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x83b84d99	snd_hda_multi_out_analog_open
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x841606fd	snd_hda_multi_out_dig_cleanup
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8ed613b9	snd_hda_get_bool_hint
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9413d064	snd_hda_codec_amp_read
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x95ddcb08	snd_hda_parse_pin_def_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9a8e1877	snd_array_free
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9b336f4e	snd_hda_check_board_codec_sid_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9c05e192	snd_hda_load_patch
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa050ce22	snd_hda_attach_beep_device
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa2827d76	snd_hda_get_jack_location
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa2e4a4f4	snd_hda_power_down
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa3c90152	snd_hda_create_spdif_in_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa3fb11e3	snd_hda_build_pcms
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa46cb27f	snd_hda_add_codec_preset
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xad87613e	snd_print_pcm_rates
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xaf575b5f	snd_hda_mixer_bind_ctls_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb360f0f0	snd_hda_power_up
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb45cd610	snd_hda_mixer_bind_ctls_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbe38b652	snd_hda_codec_get_pincfg
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbe7dd7dc	snd_array_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc0d5e66c	snd_hda_codec_resume_amp
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc0f45ba1	snd_hda_sequence_write
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc17c4c30	snd_hda_multi_out_dig_prepare
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc228851b	snd_hda_bind_vol
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc34a54c6	snd_hda_calc_stream_format
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc652fd69	snd_hda_get_jack_connectivity
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc7f98de3	snd_hda_codec_amp_update
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc9549b9b	snd_hda_build_controls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcb301b6e	snd_hda_get_jack_type
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcce27eb0	snd_hda_input_mux_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcd69c749	snd_hda_codec_read
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcf144bb2	snd_hda_bus_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd1c350eb	snd_hda_resume
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd58683ac	snd_hda_mixer_amp_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xdaf0efa2	snd_hda_multi_out_dig_close
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe35b95a2	snd_hda_codec_cleanup_stream
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe403167c	snd_hda_multi_out_analog_prepare
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe53e1d4e	snd_hda_input_mux_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe8236698	snd_hda_mixer_amp_switch_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe895d5fd	snd_hda_create_spdif_out_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe9b74e44	snd_hda_codec_setup_stream
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xebb6c9d3	snd_hda_suspend
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeda3a721	snd_print_pcm_bits
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf328ebd7	snd_hda_mixer_amp_switch_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf390da22	snd_hda_delete_codec_preset
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf72e67c1	snd_hda_ch_mode_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xfb1399c9	snd_hda_mixer_amp_volume_put
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1836 0x32723e8b	ad1836_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1836 0x5203f33e	soc_codec_dev_ad1836
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1938 0x743cb9d5	soc_codec_dev_ad1938
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1938 0xc4d25f65	ad1938_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0x25a185bc	ad73311_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0xdf403684	soc_codec_dev_ad73311
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4104 0x01c6767d	soc_codec_device_ak4104
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0x947f4736	ak4535_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0xb2f24585	soc_codec_dev_ak4535
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4642 0xc2524ee3	ak4642_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4642 0xea496a29	soc_codec_dev_ak4642
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0x0a4a9bcd	soc_codec_device_cs4270
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0x562d8352	cs4270_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-l3 0x78c84c7e	l3_write
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-max9877 0x9bd753fa	max9877_add_controls
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0x3ae67ab2	pcm3008_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0xc5566cbe	soc_codec_dev_pcm3008
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-spdif 0x55a7ee4c	dit_stub_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0x9301522b	ssm2602_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0xcee36975	soc_codec_dev_ssm2602
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0x2845e52b	soc_codec_dev_tlv320aic23
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0xe03cac54	tlv320aic23_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0xc5d31e70	aic26_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0xca582769	aic26_soc_codec_dev
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x16e3b753	soc_codec_dev_aic3x
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x56f67ed8	aic3x_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xad64226e	aic3x_headset_detected
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xb69015db	aic3x_button_pressed
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xba505346	aic3x_get_gpio
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xce91b596	aic3x_set_headset_detection
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xe0dd5a0d	aic3x_set_gpio
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0x616ee17d	soc_codec_dev_twl4030
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0x9f88da35	twl4030_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda134x 0xa0d68778	soc_codec_dev_uda134x
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x2dc8afe2	uda1380_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x916cbb11	soc_codec_dev_uda1380
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0x757206d5	wm_hubs_spkmix_tlv
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0xaf927e01	wm_hubs_add_analogue_routes
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0xc75cb1f0	wm_hubs_add_analogue_controls
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x115e1482	wm8350_hp_jack_detect
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x7838ab00	wm8350_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x9ec84fda	soc_codec_dev_wm8350
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x05d4b588	soc_codec_dev_wm8400
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x20c58dbe	wm8400_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0xdba6c246	soc_codec_dev_wm8510
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0xfe444a77	wm8510_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8523 0x49382244	wm8523_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8523 0xf2cd2fdc	soc_codec_dev_wm8523
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0x0fc6e922	wm8580_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0xd477f9c9	soc_codec_dev_wm8580
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0x61dad5fa	wm8728_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0xbb303e9c	soc_codec_dev_wm8728
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x6b30efe2	soc_codec_dev_wm8731
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0xe0a28f86	wm8731_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x482e6919	wm8750_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x76a6a211	soc_codec_dev_wm8750
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0x5d8bf1d2	soc_codec_dev_wm8753
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0xb95f9362	wm8753_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8776 0x2378d1f9	soc_codec_dev_wm8776
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8776 0x7d1bf33c	wm8776_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0x0f9c548c	wm8900_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0x90b217c9	soc_codec_dev_wm8900
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0x89082622	wm8903_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0xbb9f440a	soc_codec_dev_wm8903
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0x97bbbf15	soc_codec_dev_wm8940
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0xfbd3709f	wm8940_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0x6c4c61b6	wm8960_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0x943f6b7b	soc_codec_dev_wm8960
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8961 0x8d245a3a	soc_codec_dev_wm8961
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8961 0xa710b213	wm8961_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0x0167b9a7	wm8971_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0x8ce6300d	soc_codec_dev_wm8971
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8974 0x51aa2814	wm8974_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8974 0xf191c448	soc_codec_dev_wm8974
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0x5678cc79	soc_codec_dev_wm8988
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0xd0209886	wm8988_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0x9a04115f	wm8990_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0x9f632c46	soc_codec_dev_wm8990
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8993 0x1c9063f1	wm8993_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8993 0xb44e7f85	soc_codec_dev_wm8993
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0xc7d2110a	soc_codec_dev_wm9081
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0xff1bc626	wm9081_dai
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x00369432	snd_soc_unregister_dais
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x008c28a6	snd_soc_dai_digital_mute
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x00a6c367	snd_soc_dapm_nc_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0153d44b	snd_soc_get_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x07d33df7	snd_soc_dapm_get_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0978a600	dapm_reg_event
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x09a4b50e	snd_soc_dapm_get_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0fb1d0c7	snd_soc_dai_set_fmt
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x10557e9b	snd_soc_dapm_get_pin_status
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x13048b05	snd_soc_put_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x15982fb3	snd_soc_put_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2ecad938	snd_soc_info_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3133d860	snd_soc_unregister_dai
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x315697e7	snd_soc_jack_new
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3637524d	snd_soc_unregister_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3a0c8445	snd_soc_init_card
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3a9ee528	snd_soc_put_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3d0f5493	snd_soc_dai_set_pll
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x40e11e10	snd_soc_codec_set_cache_io
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x425848d4	snd_soc_dai_set_tdm_slot
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x44bf9401	snd_soc_info_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4b476364	snd_soc_resume_device
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4e0035fc	snd_soc_jack_free_gpios
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4e4d8f2f	snd_soc_info_volsw_ext
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5def2a02	snd_soc_dapm_get_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x63b605da	snd_soc_add_controls
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x66221b61	snd_soc_dapm_put_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x66b76378	snd_soc_dapm_info_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6dfd1593	snd_soc_new_ac97_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x71471072	snd_soc_cnew
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x734133e1	snd_soc_register_platform
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x77f06ce7	snd_soc_set_runtime_hwparams
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7f9b5f21	snd_soc_dapm_put_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8201abe9	snd_soc_free_ac97_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8235f044	snd_soc_dapm_add_routes
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x82e3e18a	snd_soc_dapm_put_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x83eee93a	snd_soc_get_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x874c8c69	snd_soc_register_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8a2f276c	snd_soc_codec_volatile_register
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x93016e2c	snd_soc_dapm_new_control
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9354acc7	snd_soc_new_pcms
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x97328ba4	snd_soc_register_dai
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa11b0643	snd_soc_unregister_platform
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xaaccacd0	snd_soc_dai_set_clkdiv
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xaeb76e6c	snd_soc_suspend_device
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xaf5fa464	snd_soc_get_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb07b2676	snd_soc_info_enum_ext
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb0ca3186	snd_soc_update_bits
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb34f5b0c	snd_soc_dapm_new_widgets
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb36ad86f	snd_soc_put_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb378b676	snd_soc_jack_add_pins
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb6f1dab8	snd_soc_dai_set_tristate
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xbf8d2264	snd_soc_dapm_new_controls
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc1629b59	snd_soc_info_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc55cd4f6	snd_soc_dapm_get_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xcb527a6c	snd_soc_dai_set_sysclk
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xcc9934dc	snd_soc_dapm_sync
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd2220a64	snd_soc_test_bits
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd26ca190	snd_soc_register_dais
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd5995d3b	snd_soc_dapm_disable_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd65fdca6	snd_soc_put_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd99cf432	snd_soc_dapm_enable_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xdbfbc766	snd_soc_dapm_free
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xddca601b	snd_soc_jack_report
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xe18797c9	snd_soc_jack_add_gpios
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xe6dbedf3	snd_soc_get_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xed8d3d9a	snd_soc_dapm_put_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf4b1474a	snd_soc_dapm_stream_event
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf8d06542	snd_soc_info_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf93c5b59	snd_soc_free_pcms
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf95a8b68	snd_soc_get_enum_double
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x1d1d6b89	xv_create_pool
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x5d428804	xv_destroy_pool
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0xaf69699e	xv_get_object_size
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0xb376a9a7	xv_malloc
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0xc5678acf	xv_get_total_size_bytes
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0xe68912b5	xv_free
+EXPORT_SYMBOL_GPL vmlinux 0x0011e3c3	ata_host_alloc_pinfo
+EXPORT_SYMBOL_GPL vmlinux 0x0030da8f	crypto_unregister_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0x00566d8f	inotify_get_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x0067df75	ata_tf_from_fis
+EXPORT_SYMBOL_GPL vmlinux 0x00a58403	get_user_pages_fast
+EXPORT_SYMBOL_GPL vmlinux 0x00cbc74d	trace_define_field
+EXPORT_SYMBOL_GPL vmlinux 0x00e5cdb9	blk_add_driver_data
+EXPORT_SYMBOL_GPL vmlinux 0x00ebcb5d	ata_id_string
+EXPORT_SYMBOL_GPL vmlinux 0x0111c3c0	init_dummy_netdev
+EXPORT_SYMBOL_GPL vmlinux 0x01485b03	sysdev_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x01666ec6	platform_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x016b9869	xfrm_calg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0x01738f4f	fuse_conn_get
+EXPORT_SYMBOL_GPL vmlinux 0x0173b747	put_inotify_watch
+EXPORT_SYMBOL_GPL vmlinux 0x0176243d	pmac_i2c_get_adapter
+EXPORT_SYMBOL_GPL vmlinux 0x01a4ea6d	unregister_die_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x01de8b5a	usb_alloc_urb
+EXPORT_SYMBOL_GPL vmlinux 0x01f02fde	__blkdev_driver_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x01fc217d	xfrm_audit_policy_add
+EXPORT_SYMBOL_GPL vmlinux 0x020299c0	drop_file_write_access
+EXPORT_SYMBOL_GPL vmlinux 0x025f2c5b	user_describe
+EXPORT_SYMBOL_GPL vmlinux 0x026cc731	usb_anchor_urb
+EXPORT_SYMBOL_GPL vmlinux 0x0298ba16	pci_msi_off
+EXPORT_SYMBOL_GPL vmlinux 0x02b6ce05	inet_csk_search_req
+EXPORT_SYMBOL_GPL vmlinux 0x02ccea56	lock_policy_rwsem_write
+EXPORT_SYMBOL_GPL vmlinux 0x03371e73	crypto_tfm_in_queue
+EXPORT_SYMBOL_GPL vmlinux 0x0343bdf1	__i2c_board_list
+EXPORT_SYMBOL_GPL vmlinux 0x0361b269	synchronize_srcu
+EXPORT_SYMBOL_GPL vmlinux 0x03a1a23f	dev_attr_em_message
+EXPORT_SYMBOL_GPL vmlinux 0x03e31abc	alloc_page_buffers
+EXPORT_SYMBOL_GPL vmlinux 0x03e3686c	ata_timing_cycle2mode
+EXPORT_SYMBOL_GPL vmlinux 0x04069b1d	set_irq_nested_thread
+EXPORT_SYMBOL_GPL vmlinux 0x0408a6df	blk_queue_rq_timed_out
+EXPORT_SYMBOL_GPL vmlinux 0x04316337	blk_abort_queue
+EXPORT_SYMBOL_GPL vmlinux 0x04486e88	rcu_batches_completed
+EXPORT_SYMBOL_GPL vmlinux 0x04519c78	securityfs_remove
+EXPORT_SYMBOL_GPL vmlinux 0x04908bef	skb_to_sgvec
+EXPORT_SYMBOL_GPL vmlinux 0x04cde249	pci_destroy_slot
+EXPORT_SYMBOL_GPL vmlinux 0x0511c9de	ide_pci_check_simplex
+EXPORT_SYMBOL_GPL vmlinux 0x05152f0a	of_modalias_node
+EXPORT_SYMBOL_GPL vmlinux 0x05263d71	usb_kill_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0x0531dcb8	ata_dev_classify
+EXPORT_SYMBOL_GPL vmlinux 0x05331671	mm_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x05368bdf	usb_get_status
+EXPORT_SYMBOL_GPL vmlinux 0x054e550b	kernel_halt
+EXPORT_SYMBOL_GPL vmlinux 0x0563f627	ide_read_error
+EXPORT_SYMBOL_GPL vmlinux 0x05a6f7e1	ide_device_put
+EXPORT_SYMBOL_GPL vmlinux 0x05dbc32e	relay_reset
+EXPORT_SYMBOL_GPL vmlinux 0x05e1a9cc	ring_buffer_record_enable_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x0619ca8a	getboottime
+EXPORT_SYMBOL_GPL vmlinux 0x063182df	invalidate_inode_pages2_range
+EXPORT_SYMBOL_GPL vmlinux 0x0634da57	regulator_get_init_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0x06368faa	usb_remove_hcd
+EXPORT_SYMBOL_GPL vmlinux 0x064db9a5	mark_mounts_for_expiry
+EXPORT_SYMBOL_GPL vmlinux 0x066462cf	crypto_lookup_template
+EXPORT_SYMBOL_GPL vmlinux 0x0667a569	ide_dma_end
+EXPORT_SYMBOL_GPL vmlinux 0x069dbce7	ata_pci_sff_init_one
+EXPORT_SYMBOL_GPL vmlinux 0x06f7e074	ide_init_disk
+EXPORT_SYMBOL_GPL vmlinux 0x06f9d29d	security_inode_mkdir
+EXPORT_SYMBOL_GPL vmlinux 0x07134c74	blk_trace_startstop
+EXPORT_SYMBOL_GPL vmlinux 0x0742802d	sata_async_notification
+EXPORT_SYMBOL_GPL vmlinux 0x07696497	get_net_ns_by_pid
+EXPORT_SYMBOL_GPL vmlinux 0x07abf300	crypto_shash_update
+EXPORT_SYMBOL_GPL vmlinux 0x07b52e38	rtnl_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x07e1b4f8	crypto_shash_digest
+EXPORT_SYMBOL_GPL vmlinux 0x07ead244	usb_deregister
+EXPORT_SYMBOL_GPL vmlinux 0x0830fe9f	ide_map_sg
+EXPORT_SYMBOL_GPL vmlinux 0x083a50e7	sysdev_register
+EXPORT_SYMBOL_GPL vmlinux 0x090fc3a9	crypto_hash_walk_done
+EXPORT_SYMBOL_GPL vmlinux 0x091c824a	machine_power_off
+EXPORT_SYMBOL_GPL vmlinux 0x091eb9b4	round_jiffies
+EXPORT_SYMBOL_GPL vmlinux 0x09751838	driver_add_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x09946d23	crypto_spawn_tfm2
+EXPORT_SYMBOL_GPL vmlinux 0x09cc0956	rtc_class_close
+EXPORT_SYMBOL_GPL vmlinux 0x0a2eac8d	led_trigger_show
+EXPORT_SYMBOL_GPL vmlinux 0x0a51ae5b	virq_to_hw
+EXPORT_SYMBOL_GPL vmlinux 0x0a524e59	inotify_inode_is_dead
+EXPORT_SYMBOL_GPL vmlinux 0x0a6f808b	tracepoint_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0x0a768eb9	inotify_add_watch
+EXPORT_SYMBOL_GPL vmlinux 0x0aa73f11	led_trigger_unregister_simple
+EXPORT_SYMBOL_GPL vmlinux 0x0aab3b33	ata_std_error_handler
+EXPORT_SYMBOL_GPL vmlinux 0x0ab55e50	attribute_container_classdev_to_container
+EXPORT_SYMBOL_GPL vmlinux 0x0ac18a27	tcp_orphan_count
+EXPORT_SYMBOL_GPL vmlinux 0x0afb3970	ata_do_set_mode
+EXPORT_SYMBOL_GPL vmlinux 0x0b07abe2	unshare_fs_struct
+EXPORT_SYMBOL_GPL vmlinux 0x0b3de2bf	page_cache_async_readahead
+EXPORT_SYMBOL_GPL vmlinux 0x0b42e301	cpu_remove_sysdev_attr
+EXPORT_SYMBOL_GPL vmlinux 0x0b59817b	find_get_pid
+EXPORT_SYMBOL_GPL vmlinux 0x0b780176	inverse_translate
+EXPORT_SYMBOL_GPL vmlinux 0x0b8241c0	pci_bus_max_busnr
+EXPORT_SYMBOL_GPL vmlinux 0x0c02d69f	inet_twsk_schedule
+EXPORT_SYMBOL_GPL vmlinux 0x0c2cdbf1	synchronize_sched
+EXPORT_SYMBOL_GPL vmlinux 0x0c468bad	user_read
+EXPORT_SYMBOL_GPL vmlinux 0x0c49b899	dm_get_rq_mapinfo
+EXPORT_SYMBOL_GPL vmlinux 0x0cb88680	__tracepoint_block_rq_remap
+EXPORT_SYMBOL_GPL vmlinux 0x0cb9bc90	ata_pio_queue_task
+EXPORT_SYMBOL_GPL vmlinux 0x0cd497cb	ide_check_ireason
+EXPORT_SYMBOL_GPL vmlinux 0x0cf9e8c9	class_compat_create_link
+EXPORT_SYMBOL_GPL vmlinux 0x0d2d2d8f	crypto_destroy_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x0dad180b	sff_dma_ops
+EXPORT_SYMBOL_GPL vmlinux 0x0db4c083	inet_hashinfo_init
+EXPORT_SYMBOL_GPL vmlinux 0x0dcabb9d	ide_undecoded_slave
+EXPORT_SYMBOL_GPL vmlinux 0x0ddbc207	disk_map_sector_rcu
+EXPORT_SYMBOL_GPL vmlinux 0x0def8dd6	bus_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x0e4eadd1	ata_bmdma_mode_filter
+EXPORT_SYMBOL_GPL vmlinux 0x0e7e6675	tty_perform_flush
+EXPORT_SYMBOL_GPL vmlinux 0x0e7f982a	devres_remove_group
+EXPORT_SYMBOL_GPL vmlinux 0x0ec16967	platform_get_resource
+EXPORT_SYMBOL_GPL vmlinux 0x0f46ed2e	usb_unanchor_urb
+EXPORT_SYMBOL_GPL vmlinux 0x0f8fc73d	vfs_setlease
+EXPORT_SYMBOL_GPL vmlinux 0x10098029	__inet_lookup_listener
+EXPORT_SYMBOL_GPL vmlinux 0x10138352	tracing_on
+EXPORT_SYMBOL_GPL vmlinux 0x101c923e	__tracepoint_power_start
+EXPORT_SYMBOL_GPL vmlinux 0x1025e4cd	crypto_ahash_setkey
+EXPORT_SYMBOL_GPL vmlinux 0x112d6a2a	fuse_get_req
+EXPORT_SYMBOL_GPL vmlinux 0x1130addb	register_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0x113eac5f	inet_csk_route_req
+EXPORT_SYMBOL_GPL vmlinux 0x11439671	inotify_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x11e14671	rdev_get_dev
+EXPORT_SYMBOL_GPL vmlinux 0x11f447ce	__gpio_to_irq
+EXPORT_SYMBOL_GPL vmlinux 0x1204bd84	usb_deregister_dev
+EXPORT_SYMBOL_GPL vmlinux 0x120d4d03	rtc_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x122c4c00	spi_async
+EXPORT_SYMBOL_GPL vmlinux 0x124f2056	crypto_get_attr_type
+EXPORT_SYMBOL_GPL vmlinux 0x1251d30f	call_rcu
+EXPORT_SYMBOL_GPL vmlinux 0x1260062b	ata_cable_ignore
+EXPORT_SYMBOL_GPL vmlinux 0x1263d96d	sata_pmp_error_handler
+EXPORT_SYMBOL_GPL vmlinux 0x1268f357	resume_device_irqs
+EXPORT_SYMBOL_GPL vmlinux 0x13527714	bus_get_kset
+EXPORT_SYMBOL_GPL vmlinux 0x13921256	driver_find_device
+EXPORT_SYMBOL_GPL vmlinux 0x13b2a946	register_keyboard_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x14109d2d	sata_set_spd
+EXPORT_SYMBOL_GPL vmlinux 0x142e9cf2	__wake_up_sync_key
+EXPORT_SYMBOL_GPL vmlinux 0x14421baf	ata_pci_bmdma_init
+EXPORT_SYMBOL_GPL vmlinux 0x146ee731	ide_pci_setup_ports
+EXPORT_SYMBOL_GPL vmlinux 0x14739579	hrtimer_get_remaining
+EXPORT_SYMBOL_GPL vmlinux 0x149db923	selinux_string_to_sid
+EXPORT_SYMBOL_GPL vmlinux 0x14b0a919	bd_claim_by_disk
+EXPORT_SYMBOL_GPL vmlinux 0x14e734ad	fib_rules_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x14ef5967	ata_host_init
+EXPORT_SYMBOL_GPL vmlinux 0x14f790eb	simple_attr_write
+EXPORT_SYMBOL_GPL vmlinux 0x15096a60	sysfs_remove_file_from_group
+EXPORT_SYMBOL_GPL vmlinux 0x157b1113	kernel_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x15892417	async_synchronize_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x158bff05	ide_pio_cycle_time
+EXPORT_SYMBOL_GPL vmlinux 0x1598dc9d	unregister_netevent_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x15e2a349	blk_queue_lld_busy
+EXPORT_SYMBOL_GPL vmlinux 0x15e9d713	class_compat_register
+EXPORT_SYMBOL_GPL vmlinux 0x161f7156	filter_match_preds
+EXPORT_SYMBOL_GPL vmlinux 0x16421fc3	platform_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x16c0e75a	xfrm_output_resume
+EXPORT_SYMBOL_GPL vmlinux 0x16cccb3a	ata_qc_complete
+EXPORT_SYMBOL_GPL vmlinux 0x16f76869	probe_kernel_read
+EXPORT_SYMBOL_GPL vmlinux 0x170ceee0	user_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x17346e61	usb_interrupt_msg
+EXPORT_SYMBOL_GPL vmlinux 0x173508a2	usb_clear_halt
+EXPORT_SYMBOL_GPL vmlinux 0x1860896c	xfrm_audit_state_delete
+EXPORT_SYMBOL_GPL vmlinux 0x1878f62b	edac_err_assert
+EXPORT_SYMBOL_GPL vmlinux 0x18814d9b	sdev_evt_send
+EXPORT_SYMBOL_GPL vmlinux 0x18da6b39	device_create_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0x190bcc72	devres_find
+EXPORT_SYMBOL_GPL vmlinux 0x1933bc17	pmf_call_one
+EXPORT_SYMBOL_GPL vmlinux 0x194053ed	__rtnl_register
+EXPORT_SYMBOL_GPL vmlinux 0x194d974d	pmf_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0x1986135a	driver_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x19a304ba	usb_disabled
+EXPORT_SYMBOL_GPL vmlinux 0x19b70ac1	perf_tp_event
+EXPORT_SYMBOL_GPL vmlinux 0x1a07cffd	scsi_schedule_eh
+EXPORT_SYMBOL_GPL vmlinux 0x1a11960e	register_kretprobes
+EXPORT_SYMBOL_GPL vmlinux 0x1a323362	__ftrace_vbprintk
+EXPORT_SYMBOL_GPL vmlinux 0x1a45c68a	dm_disk
+EXPORT_SYMBOL_GPL vmlinux 0x1a474901	tracepoint_probe_unregister_noupdate
+EXPORT_SYMBOL_GPL vmlinux 0x1a5bfe83	put_device
+EXPORT_SYMBOL_GPL vmlinux 0x1a81c8df	tty_buffer_request_room
+EXPORT_SYMBOL_GPL vmlinux 0x1aa2ae53	aead_geniv_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x1ab74999	mnt_drop_write
+EXPORT_SYMBOL_GPL vmlinux 0x1b0aee89	tracepoint_iter_start
+EXPORT_SYMBOL_GPL vmlinux 0x1b9aca3f	jprobe_return
+EXPORT_SYMBOL_GPL vmlinux 0x1ba4e4ae	__mmdrop
+EXPORT_SYMBOL_GPL vmlinux 0x1bba19ad	__fsnotify_parent
+EXPORT_SYMBOL_GPL vmlinux 0x1bcc9608	debugfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x1bd7e08b	usb_sg_wait
+EXPORT_SYMBOL_GPL vmlinux 0x1c048233	fuse_dev_operations
+EXPORT_SYMBOL_GPL vmlinux 0x1c61603c	device_create
+EXPORT_SYMBOL_GPL vmlinux 0x1c852e7c	xfrm_calg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x1c87a811	__round_jiffies_up
+EXPORT_SYMBOL_GPL vmlinux 0x1cbc4107	hrtimer_init
+EXPORT_SYMBOL_GPL vmlinux 0x1cddfdf9	inet_ctl_sock_create
+EXPORT_SYMBOL_GPL vmlinux 0x1cf8bff3	anon_transport_class_register
+EXPORT_SYMBOL_GPL vmlinux 0x1d229748	ata_sff_qc_prep
+EXPORT_SYMBOL_GPL vmlinux 0x1d8f8059	__tracepoint_power_end
+EXPORT_SYMBOL_GPL vmlinux 0x1da62b58	ata_host_resume
+EXPORT_SYMBOL_GPL vmlinux 0x1db21d74	__tracepoint_kfree_skb
+EXPORT_SYMBOL_GPL vmlinux 0x1dee2629	trace_current_buffer_lock_reserve
+EXPORT_SYMBOL_GPL vmlinux 0x1e5d674d	udp4_lib_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x1e5ef939	rtc_irq_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x1e7bbcb3	kernel_restart
+EXPORT_SYMBOL_GPL vmlinux 0x1e9f36c4	swiotlb_sync_single_range_for_device
+EXPORT_SYMBOL_GPL vmlinux 0x1ea6817b	ata_eh_freeze_port
+EXPORT_SYMBOL_GPL vmlinux 0x1eb9516e	round_jiffies_relative
+EXPORT_SYMBOL_GPL vmlinux 0x1ebf6c2a	pci_power_names
+EXPORT_SYMBOL_GPL vmlinux 0x1ee6ec8a	cpufreq_cpu_put
+EXPORT_SYMBOL_GPL vmlinux 0x1ef827ab	regulator_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x1f19d831	inet_diag_register
+EXPORT_SYMBOL_GPL vmlinux 0x1f43826b	destroy_workqueue
+EXPORT_SYMBOL_GPL vmlinux 0x1f694167	single_open_net
+EXPORT_SYMBOL_GPL vmlinux 0x1fcece42	inet_twdr_twcal_tick
+EXPORT_SYMBOL_GPL vmlinux 0x1fcfb1bc	aead_geniv_exit
+EXPORT_SYMBOL_GPL vmlinux 0x1ff70497	uhci_reset_hc
+EXPORT_SYMBOL_GPL vmlinux 0x20028a24	spi_register_master
+EXPORT_SYMBOL_GPL vmlinux 0x2010bb67	ring_buffer_lock_reserve
+EXPORT_SYMBOL_GPL vmlinux 0x202d7d77	skb_segment
+EXPORT_SYMBOL_GPL vmlinux 0x20bc3470	orderly_poweroff
+EXPORT_SYMBOL_GPL vmlinux 0x20e82cff	xfrm_audit_state_add
+EXPORT_SYMBOL_GPL vmlinux 0x20f07a05	shash_attr_alg
+EXPORT_SYMBOL_GPL vmlinux 0x21384c9d	usb_get_urb
+EXPORT_SYMBOL_GPL vmlinux 0x215db6e9	tracepoint_probe_register_noupdate
+EXPORT_SYMBOL_GPL vmlinux 0x2182d21a	swiotlb_sync_single_range_for_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x2187588f	inet_hash_connect
+EXPORT_SYMBOL_GPL vmlinux 0x219c98aa	device_schedule_callback_owner
+EXPORT_SYMBOL_GPL vmlinux 0x22281a3a	kobject_uevent_env
+EXPORT_SYMBOL_GPL vmlinux 0x2296c00d	crypto_attr_u32
+EXPORT_SYMBOL_GPL vmlinux 0x2312b165	pci_unblock_user_cfg_access
+EXPORT_SYMBOL_GPL vmlinux 0x23320eac	cpufreq_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0x23679939	__iowrite32_copy
+EXPORT_SYMBOL_GPL vmlinux 0x2370dd58	skb_tstamp_tx
+EXPORT_SYMBOL_GPL vmlinux 0x23864ce7	cpuset_mem_spread_node
+EXPORT_SYMBOL_GPL vmlinux 0x23869dc7	cancel_work_sync
+EXPORT_SYMBOL_GPL vmlinux 0x23991b64	securityfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x23ad5c4d	blk_lld_busy
+EXPORT_SYMBOL_GPL vmlinux 0x23d75474	attribute_container_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x23dd59d3	__pci_reset_function
+EXPORT_SYMBOL_GPL vmlinux 0x23ed41c8	regulator_bulk_enable
+EXPORT_SYMBOL_GPL vmlinux 0x23f05dce	bus_get_device_klist
+EXPORT_SYMBOL_GPL vmlinux 0x23fc87d0	ide_timing_find_mode
+EXPORT_SYMBOL_GPL vmlinux 0x2406dae3	pci_address_to_pio
+EXPORT_SYMBOL_GPL vmlinux 0x243f779c	inet_csk_get_port
+EXPORT_SYMBOL_GPL vmlinux 0x244518fc	rtc_read_alarm
+EXPORT_SYMBOL_GPL vmlinux 0x24859d14	debugfs_remove_recursive
+EXPORT_SYMBOL_GPL vmlinux 0x248c28fe	irq_create_mapping
+EXPORT_SYMBOL_GPL vmlinux 0x24cda041	ide_vlb_clk
+EXPORT_SYMBOL_GPL vmlinux 0x24db9b27	ring_buffer_discard_commit
+EXPORT_SYMBOL_GPL vmlinux 0x24eb7e32	leds_list
+EXPORT_SYMBOL_GPL vmlinux 0x2541ed29	platform_device_add_resources
+EXPORT_SYMBOL_GPL vmlinux 0x25a11cc9	fsnotify
+EXPORT_SYMBOL_GPL vmlinux 0x25a4c9e4	ring_buffer_entries
+EXPORT_SYMBOL_GPL vmlinux 0x25f67cf9	rtnl_register
+EXPORT_SYMBOL_GPL vmlinux 0x25f752af	k_handler
+EXPORT_SYMBOL_GPL vmlinux 0x263aee9c	generic_detach_inode
+EXPORT_SYMBOL_GPL vmlinux 0x266480d4	fuse_request_send
+EXPORT_SYMBOL_GPL vmlinux 0x268c8554	__pneigh_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x26c90ea4	scsi_eh_get_sense
+EXPORT_SYMBOL_GPL vmlinux 0x26d0ef05	pm_runtime_idle
+EXPORT_SYMBOL_GPL vmlinux 0x26e63110	ring_buffer_reset_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x273f39a3	crypto_register_alg
+EXPORT_SYMBOL_GPL vmlinux 0x275811e1	__inet_lookup_established
+EXPORT_SYMBOL_GPL vmlinux 0x2787db00	vbin_printf
+EXPORT_SYMBOL_GPL vmlinux 0x279e98c9	dev_attr_link_power_management_policy
+EXPORT_SYMBOL_GPL vmlinux 0x27adf232	tracing_generic_entry_update
+EXPORT_SYMBOL_GPL vmlinux 0x27cb2c1a	crypto_alloc_base
+EXPORT_SYMBOL_GPL vmlinux 0x2827db8b	__pm_runtime_put
+EXPORT_SYMBOL_GPL vmlinux 0x28283f0d	do_kern_mount
+EXPORT_SYMBOL_GPL vmlinux 0x28a9068e	user_update
+EXPORT_SYMBOL_GPL vmlinux 0x28aa398c	ip_route_output_flow
+EXPORT_SYMBOL_GPL vmlinux 0x28c30ba7	tcp_register_congestion_control
+EXPORT_SYMBOL_GPL vmlinux 0x28cb0402	crypto_enqueue_request
+EXPORT_SYMBOL_GPL vmlinux 0x28d664ff	__raw_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x28e23139	xfrm_probe_algs
+EXPORT_SYMBOL_GPL vmlinux 0x28f6196e	inet_hash
+EXPORT_SYMBOL_GPL vmlinux 0x290e48c2	led_classdev_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x293309b5	rtc_alarm_irq_enable
+EXPORT_SYMBOL_GPL vmlinux 0x293ec178	console_drivers
+EXPORT_SYMBOL_GPL vmlinux 0x294a881d	ide_get_lba_addr
+EXPORT_SYMBOL_GPL vmlinux 0x29725bab	pmf_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0x2985cc8e	__trace_note_message
+EXPORT_SYMBOL_GPL vmlinux 0x29c62f9e	usb_reset_configuration
+EXPORT_SYMBOL_GPL vmlinux 0x2a01938c	tcp_done
+EXPORT_SYMBOL_GPL vmlinux 0x2a1b499f	ide_retry_pc
+EXPORT_SYMBOL_GPL vmlinux 0x2a41fd5a	sysfs_chmod_file
+EXPORT_SYMBOL_GPL vmlinux 0x2a678a13	__suspend_report_result
+EXPORT_SYMBOL_GPL vmlinux 0x2a8358b2	platform_device_put
+EXPORT_SYMBOL_GPL vmlinux 0x2aa90784	ata_sff_post_internal_cmd
+EXPORT_SYMBOL_GPL vmlinux 0x2aae5609	ata_pci_sff_activate_host
+EXPORT_SYMBOL_GPL vmlinux 0x2ab66c9e	regulator_enable
+EXPORT_SYMBOL_GPL vmlinux 0x2abd5d4e	device_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x2b253933	pmf_unregister_irq_client
+EXPORT_SYMBOL_GPL vmlinux 0x2b607170	ktime_sub_ns
+EXPORT_SYMBOL_GPL vmlinux 0x2b8c70fe	skcipher_geniv_init
+EXPORT_SYMBOL_GPL vmlinux 0x2b9f8e23	nf_net_ipv4_netfilter_sysctl_path
+EXPORT_SYMBOL_GPL vmlinux 0x2bb5efd1	do_sync_mapping_range
+EXPORT_SYMBOL_GPL vmlinux 0x2bfc4d7f	tracepoint_get_iter_range
+EXPORT_SYMBOL_GPL vmlinux 0x2c0a21a4	device_remove_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0x2c17c0e1	i2c_new_dummy
+EXPORT_SYMBOL_GPL vmlinux 0x2c208607	power_supply_is_system_supplied
+EXPORT_SYMBOL_GPL vmlinux 0x2c7db649	irq_dispose_mapping
+EXPORT_SYMBOL_GPL vmlinux 0x2ca14b5e	scsi_queue_work
+EXPORT_SYMBOL_GPL vmlinux 0x2ce1f81d	ide_pci_init_one
+EXPORT_SYMBOL_GPL vmlinux 0x2ce98559	kcrypto_wq
+EXPORT_SYMBOL_GPL vmlinux 0x2dc6b54c	input_ff_create
+EXPORT_SYMBOL_GPL vmlinux 0x2e47f677	xfrm_aalg_get_byidx
+EXPORT_SYMBOL_GPL vmlinux 0x2e76c654	driver_attach
+EXPORT_SYMBOL_GPL vmlinux 0x2e8b7aea	inet_diag_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x2edb7001	crypto_register_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0x2eef18ad	trace_define_common_fields
+EXPORT_SYMBOL_GPL vmlinux 0x2ef16f9e	ide_exec_command
+EXPORT_SYMBOL_GPL vmlinux 0x2f100267	sata_pmp_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x2f2aa116	unregister_jprobe
+EXPORT_SYMBOL_GPL vmlinux 0x2f47d8c7	cpufreq_frequency_get_table
+EXPORT_SYMBOL_GPL vmlinux 0x2f9ca18f	scsi_nl_add_driver
+EXPORT_SYMBOL_GPL vmlinux 0x2fcd9e17	dpm_resume_noirq
+EXPORT_SYMBOL_GPL vmlinux 0x2fd3548b	ide_write_devctl
+EXPORT_SYMBOL_GPL vmlinux 0x301fcc0d	scatterwalk_start
+EXPORT_SYMBOL_GPL vmlinux 0x30213d15	locks_release_private
+EXPORT_SYMBOL_GPL vmlinux 0x30304505	kern_mount_data
+EXPORT_SYMBOL_GPL vmlinux 0x30788779	ide_pci_remove
+EXPORT_SYMBOL_GPL vmlinux 0x307fdec5	crypto_unregister_template
+EXPORT_SYMBOL_GPL vmlinux 0x30a4f4ca	bstr_printf
+EXPORT_SYMBOL_GPL vmlinux 0x31029f08	dev_change_net_namespace
+EXPORT_SYMBOL_GPL vmlinux 0x3127e9d6	debugfs_create_x32
+EXPORT_SYMBOL_GPL vmlinux 0x31a47067	sysdev_store_ulong
+EXPORT_SYMBOL_GPL vmlinux 0x31d9d4b7	spi_unregister_master
+EXPORT_SYMBOL_GPL vmlinux 0x324abfd6	ata_cable_sata
+EXPORT_SYMBOL_GPL vmlinux 0x32893043	ata_std_postreset
+EXPORT_SYMBOL_GPL vmlinux 0x32d5e7fc	xfrm_aalg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x32f17454	ring_buffer_event_data
+EXPORT_SYMBOL_GPL vmlinux 0x331d80c9	pmac_i2c_attach_adapter
+EXPORT_SYMBOL_GPL vmlinux 0x3340dde6	driver_for_each_device
+EXPORT_SYMBOL_GPL vmlinux 0x336035de	fsstack_copy_attr_all
+EXPORT_SYMBOL_GPL vmlinux 0x33c32ecc	macvlan_handle_frame_hook
+EXPORT_SYMBOL_GPL vmlinux 0x33fe4be3	eventfd_ctx_get
+EXPORT_SYMBOL_GPL vmlinux 0x34055617	dma_get_required_mask
+EXPORT_SYMBOL_GPL vmlinux 0x34275124	trace_current_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0x3441c3d6	gpio_set_value_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x34cb09db	anon_inode_getfd
+EXPORT_SYMBOL_GPL vmlinux 0x3504338f	usb_autopm_get_interface_async
+EXPORT_SYMBOL_GPL vmlinux 0x3548f447	ide_issue_pc
+EXPORT_SYMBOL_GPL vmlinux 0x355146bd	regulator_set_optimum_mode
+EXPORT_SYMBOL_GPL vmlinux 0x355d5d0d	sata_scr_write
+EXPORT_SYMBOL_GPL vmlinux 0x3568606f	gpiochip_is_requested
+EXPORT_SYMBOL_GPL vmlinux 0x356db47c	usb_put_dev
+EXPORT_SYMBOL_GPL vmlinux 0x35712cba	device_move
+EXPORT_SYMBOL_GPL vmlinux 0x357ba496	shash_ahash_update
+EXPORT_SYMBOL_GPL vmlinux 0x35d2c635	isa_bridge_pcidev
+EXPORT_SYMBOL_GPL vmlinux 0x35d7a315	mmput
+EXPORT_SYMBOL_GPL vmlinux 0x35d8c94a	sdev_evt_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x35dcd7e2	register_kretprobe
+EXPORT_SYMBOL_GPL vmlinux 0x35ecf9a2	rtc_set_alarm
+EXPORT_SYMBOL_GPL vmlinux 0x361e2bcc	save_stack_trace
+EXPORT_SYMBOL_GPL vmlinux 0x3625b5d3	pmac_i2c_get_type
+EXPORT_SYMBOL_GPL vmlinux 0x362e23ec	call_rcu_bh
+EXPORT_SYMBOL_GPL vmlinux 0x3632436c	debugfs_create_blob
+EXPORT_SYMBOL_GPL vmlinux 0x3677cc48	fb_ddc_read
+EXPORT_SYMBOL_GPL vmlinux 0x36876403	ata_sff_busy_sleep
+EXPORT_SYMBOL_GPL vmlinux 0x36e120b8	pm_runtime_enable
+EXPORT_SYMBOL_GPL vmlinux 0x36e2d0d9	ata_link_online
+EXPORT_SYMBOL_GPL vmlinux 0x36edc022	ide_no_data_taskfile
+EXPORT_SYMBOL_GPL vmlinux 0x37300e02	cpu_add_sysdev_attr
+EXPORT_SYMBOL_GPL vmlinux 0x379cfd2a	usb_get_from_anchor
+EXPORT_SYMBOL_GPL vmlinux 0x37ad4176	__tracepoint_block_bio_complete
+EXPORT_SYMBOL_GPL vmlinux 0x37ae590d	usb_reset_endpoint
+EXPORT_SYMBOL_GPL vmlinux 0x37b094e9	usb_kill_urb
+EXPORT_SYMBOL_GPL vmlinux 0x37c03c1a	do_rw_taskfile
+EXPORT_SYMBOL_GPL vmlinux 0x38173efb	ide_read_bcount_and_ireason
+EXPORT_SYMBOL_GPL vmlinux 0x388127d1	sk_setup_caps
+EXPORT_SYMBOL_GPL vmlinux 0x389acf52	ata_sff_exec_command
+EXPORT_SYMBOL_GPL vmlinux 0x38a9c2c7	input_ff_effect_from_user
+EXPORT_SYMBOL_GPL vmlinux 0x38ba6312	regulator_get_exclusive
+EXPORT_SYMBOL_GPL vmlinux 0x39031a5e	scsi_internal_device_block
+EXPORT_SYMBOL_GPL vmlinux 0x3915cd8f	usb_unpoison_urb
+EXPORT_SYMBOL_GPL vmlinux 0x39342fa3	relay_close
+EXPORT_SYMBOL_GPL vmlinux 0x396ab093	inotify_find_update_watch
+EXPORT_SYMBOL_GPL vmlinux 0x396ea137	ata_cable_80wire
+EXPORT_SYMBOL_GPL vmlinux 0x39fa5570	usb_register_dev
+EXPORT_SYMBOL_GPL vmlinux 0x3a359676	ata_sas_port_start
+EXPORT_SYMBOL_GPL vmlinux 0x3a50c123	spi_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0x3a723c15	klist_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0x3aeb0b80	unregister_pernet_subsys
+EXPORT_SYMBOL_GPL vmlinux 0x3aeb5ab1	fb_deferred_io_cleanup
+EXPORT_SYMBOL_GPL vmlinux 0x3b149494	use_module
+EXPORT_SYMBOL_GPL vmlinux 0x3b1fa5b9	blk_abort_request
+EXPORT_SYMBOL_GPL vmlinux 0x3b35a873	pci_find_ht_capability
+EXPORT_SYMBOL_GPL vmlinux 0x3b7d66da	blkdev_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x3bbd9fd1	crypto_larval_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x3bc59813	raw_hash_sk
+EXPORT_SYMBOL_GPL vmlinux 0x3bd4d29e	dm_requeue_unmapped_request
+EXPORT_SYMBOL_GPL vmlinux 0x3be7af02	get_max_files
+EXPORT_SYMBOL_GPL vmlinux 0x3be89d3c	usb_register_notify
+EXPORT_SYMBOL_GPL vmlinux 0x3c049d7e	inet_twsk_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x3c6c45ca	__tracepoint_power_frequency
+EXPORT_SYMBOL_GPL vmlinux 0x3c7d6225	ring_buffer_empty
+EXPORT_SYMBOL_GPL vmlinux 0x3c942368	profile_event_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x3cbc12ae	set_cpus_allowed_ptr
+EXPORT_SYMBOL_GPL vmlinux 0x3cd06035	add_input_randomness
+EXPORT_SYMBOL_GPL vmlinux 0x3cfdfae5	trace_current_buffer_discard_commit
+EXPORT_SYMBOL_GPL vmlinux 0x3cfedb3f	register_pm_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x3d388324	dpm_resume_end
+EXPORT_SYMBOL_GPL vmlinux 0x3dccbe67	__atomic_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x3dd4d3a7	bprintf
+EXPORT_SYMBOL_GPL vmlinux 0x3e136875	tcp_unregister_congestion_control
+EXPORT_SYMBOL_GPL vmlinux 0x3e525be8	usb_autopm_put_interface_async
+EXPORT_SYMBOL_GPL vmlinux 0x3e7e0306	tcp_set_state
+EXPORT_SYMBOL_GPL vmlinux 0x3eb5648e	swiotlb_unmap_page
+EXPORT_SYMBOL_GPL vmlinux 0x3ec0ef1d	bus_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x3eeccb8f	sysfs_remove_link
+EXPORT_SYMBOL_GPL vmlinux 0x3eed63a2	bd_release_from_disk
+EXPORT_SYMBOL_GPL vmlinux 0x3ef768fa	sg_scsi_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x3efb35c9	get_online_cpus
+EXPORT_SYMBOL_GPL vmlinux 0x3f01570a	probe_kernel_write
+EXPORT_SYMBOL_GPL vmlinux 0x3f238101	dcookie_register
+EXPORT_SYMBOL_GPL vmlinux 0x3f62528d	sysfs_add_file_to_group
+EXPORT_SYMBOL_GPL vmlinux 0x3fd1f520	ata_sff_dev_select
+EXPORT_SYMBOL_GPL vmlinux 0x3fea0828	simple_attr_release
+EXPORT_SYMBOL_GPL vmlinux 0x4017b189	ata_host_detach
+EXPORT_SYMBOL_GPL vmlinux 0x405548cd	sata_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x4055e04e	xfrm_output
+EXPORT_SYMBOL_GPL vmlinux 0x405c4819	sysdev_class_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x4083e6fe	transport_destroy_device
+EXPORT_SYMBOL_GPL vmlinux 0x40a9acfa	dm_underlying_device_busy
+EXPORT_SYMBOL_GPL vmlinux 0x40af0dec	ata_xfer_mode2mask
+EXPORT_SYMBOL_GPL vmlinux 0x40b7c106	__create_workqueue_key
+EXPORT_SYMBOL_GPL vmlinux 0x40b9a32d	ata_sff_qc_issue
+EXPORT_SYMBOL_GPL vmlinux 0x40f1f7af	tty_ldisc_ref
+EXPORT_SYMBOL_GPL vmlinux 0x41d11e80	fuse_request_send_background
+EXPORT_SYMBOL_GPL vmlinux 0x41d2bf07	fuse_conn_put
+EXPORT_SYMBOL_GPL vmlinux 0x41f963d0	sysdev_class_register
+EXPORT_SYMBOL_GPL vmlinux 0x42494cea	ring_buffer_event_length
+EXPORT_SYMBOL_GPL vmlinux 0x425c1c0b	ktime_add_safe
+EXPORT_SYMBOL_GPL vmlinux 0x4267dc8e	regulator_is_enabled
+EXPORT_SYMBOL_GPL vmlinux 0x42de05c1	proc_net_remove
+EXPORT_SYMBOL_GPL vmlinux 0x43004a61	pmac_i2c_get_dev_addr
+EXPORT_SYMBOL_GPL vmlinux 0x4306350c	led_trigger_register
+EXPORT_SYMBOL_GPL vmlinux 0x432fd7f6	__gpio_set_value
+EXPORT_SYMBOL_GPL vmlinux 0x433f6909	usb_set_interface
+EXPORT_SYMBOL_GPL vmlinux 0x4348940b	rtnl_link_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x437862b8	__ring_buffer_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x43afd684	crypto_register_shash
+EXPORT_SYMBOL_GPL vmlinux 0x43c030af	d_materialise_unique
+EXPORT_SYMBOL_GPL vmlinux 0x43c7c50f	tty_get_pgrp
+EXPORT_SYMBOL_GPL vmlinux 0x43cde0b0	pci_create_slot
+EXPORT_SYMBOL_GPL vmlinux 0x43f56e82	ata_xfer_mode2shift
+EXPORT_SYMBOL_GPL vmlinux 0x440e4603	power_supply_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x44217cb3	ata_sg_init
+EXPORT_SYMBOL_GPL vmlinux 0x444ef246	ide_end_rq
+EXPORT_SYMBOL_GPL vmlinux 0x44674c55	cpufreq_register_governor
+EXPORT_SYMBOL_GPL vmlinux 0x4484a5a4	wait_for_device_probe
+EXPORT_SYMBOL_GPL vmlinux 0x44a65d5c	lock_policy_rwsem_read
+EXPORT_SYMBOL_GPL vmlinux 0x44d4b572	blk_update_request
+EXPORT_SYMBOL_GPL vmlinux 0x44de57cb	clockevent_delta2ns
+EXPORT_SYMBOL_GPL vmlinux 0x4540509d	i2c_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x457594fa	crypto_alg_list
+EXPORT_SYMBOL_GPL vmlinux 0x45bf1ff3	crypto_inc
+EXPORT_SYMBOL_GPL vmlinux 0x460593cd	anon_transport_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x4672e88b	__crypto_dequeue_request
+EXPORT_SYMBOL_GPL vmlinux 0x46cd8bca	init_srcu_struct
+EXPORT_SYMBOL_GPL vmlinux 0x46d2cebd	rdev_get_id
+EXPORT_SYMBOL_GPL vmlinux 0x46fbf154	shash_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0x46fc5546	spi_get_device_id
+EXPORT_SYMBOL_GPL vmlinux 0x470e25c6	da903x_read
+EXPORT_SYMBOL_GPL vmlinux 0x47229b5c	gpio_request
+EXPORT_SYMBOL_GPL vmlinux 0x476d51c1	find_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x47d04447	module_mutex
+EXPORT_SYMBOL_GPL vmlinux 0x47e8a302	crypto_unregister_ahash
+EXPORT_SYMBOL_GPL vmlinux 0x48938165	xfrm_audit_policy_delete
+EXPORT_SYMBOL_GPL vmlinux 0x48b04fe8	raw_seq_start
+EXPORT_SYMBOL_GPL vmlinux 0x48b77722	get_device
+EXPORT_SYMBOL_GPL vmlinux 0x48d5ab4d	regulator_set_current_limit
+EXPORT_SYMBOL_GPL vmlinux 0x498f9a42	ring_buffer_free_read_page
+EXPORT_SYMBOL_GPL vmlinux 0x499043d3	crypto_init_queue
+EXPORT_SYMBOL_GPL vmlinux 0x49e0b24b	pm_request_resume
+EXPORT_SYMBOL_GPL vmlinux 0x49fe3fe3	seq_open_net
+EXPORT_SYMBOL_GPL vmlinux 0x4a853aa5	vfs_removexattr
+EXPORT_SYMBOL_GPL vmlinux 0x4a9ed4bf	usb_wait_anchor_empty_timeout
+EXPORT_SYMBOL_GPL vmlinux 0x4afdf49c	rtc_irq_set_state
+EXPORT_SYMBOL_GPL vmlinux 0x4b44c9f2	input_ff_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x4b6efdc0	skcipher_geniv_exit
+EXPORT_SYMBOL_GPL vmlinux 0x4badb1c6	unregister_kretprobe
+EXPORT_SYMBOL_GPL vmlinux 0x4c126538	fixed_phy_set_link_update
+EXPORT_SYMBOL_GPL vmlinux 0x4c39b721	init_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0x4c759827	byte_rev_table
+EXPORT_SYMBOL_GPL vmlinux 0x4c8a5a06	sysfs_create_group
+EXPORT_SYMBOL_GPL vmlinux 0x4c8d8323	tcp_reno_cong_avoid
+EXPORT_SYMBOL_GPL vmlinux 0x4c911c5c	pm_schedule_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x4caedb5d	register_net_sysctl_rotable
+EXPORT_SYMBOL_GPL vmlinux 0x4cbb4f6c	device_add
+EXPORT_SYMBOL_GPL vmlinux 0x4d41592c	blocking_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x4d63fa01	anon_inode_getfile
+EXPORT_SYMBOL_GPL vmlinux 0x4d8f4c15	klist_add_before
+EXPORT_SYMBOL_GPL vmlinux 0x4e0c31b6	input_ff_upload
+EXPORT_SYMBOL_GPL vmlinux 0x4e1cd934	crypto_mod_put
+EXPORT_SYMBOL_GPL vmlinux 0x4e27727a	platform_get_resource_byname
+EXPORT_SYMBOL_GPL vmlinux 0x4e51163f	pci_slots_kset
+EXPORT_SYMBOL_GPL vmlinux 0x4e656ea9	sysfs_get_dirent
+EXPORT_SYMBOL_GPL vmlinux 0x4e6a8cb3	ata_eh_thaw_port
+EXPORT_SYMBOL_GPL vmlinux 0x4e8283d3	bus_for_each_dev
+EXPORT_SYMBOL_GPL vmlinux 0x4eef5df0	bsg_register_queue
+EXPORT_SYMBOL_GPL vmlinux 0x4f808aa7	unregister_pernet_device
+EXPORT_SYMBOL_GPL vmlinux 0x4fd1809b	pci_scan_child_bus
+EXPORT_SYMBOL_GPL vmlinux 0x4fdc945d	sata_deb_timing_normal
+EXPORT_SYMBOL_GPL vmlinux 0x4fe6e3fa	pci_renumber_slot
+EXPORT_SYMBOL_GPL vmlinux 0x5002f3f1	ata_bmdma32_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x501ac127	ata_do_eh
+EXPORT_SYMBOL_GPL vmlinux 0x5086ac3a	alg_test
+EXPORT_SYMBOL_GPL vmlinux 0x5086dbd9	debugfs_create_size_t
+EXPORT_SYMBOL_GPL vmlinux 0x508e8a4b	sysfs_remove_group
+EXPORT_SYMBOL_GPL vmlinux 0x50939ddc	pid_vnr
+EXPORT_SYMBOL_GPL vmlinux 0x50a4af6d	device_release_driver
+EXPORT_SYMBOL_GPL vmlinux 0x50c89f23	__alloc_percpu
+EXPORT_SYMBOL_GPL vmlinux 0x50d112e0	tty_ldisc_ref_wait
+EXPORT_SYMBOL_GPL vmlinux 0x50e7193a	__i2c_first_dynamic_bus_num
+EXPORT_SYMBOL_GPL vmlinux 0x50eb1738	media_bay_set_ide_infos
+EXPORT_SYMBOL_GPL vmlinux 0x50f5e532	call_rcu_sched
+EXPORT_SYMBOL_GPL vmlinux 0x50fad434	round_jiffies_up
+EXPORT_SYMBOL_GPL vmlinux 0x5121ee09	crypto_drop_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x515d18c9	lookup_create
+EXPORT_SYMBOL_GPL vmlinux 0x517d7003	ring_buffer_normalize_time_stamp
+EXPORT_SYMBOL_GPL vmlinux 0x51af7f83	unregister_kprobes
+EXPORT_SYMBOL_GPL vmlinux 0x52031cd0	da903x_update
+EXPORT_SYMBOL_GPL vmlinux 0x52123842	input_class
+EXPORT_SYMBOL_GPL vmlinux 0x5220a23d	ide_tf_load
+EXPORT_SYMBOL_GPL vmlinux 0x52210d73	pmf_register_irq_client
+EXPORT_SYMBOL_GPL vmlinux 0x523fd666	irq_create_of_mapping
+EXPORT_SYMBOL_GPL vmlinux 0x524f3f09	ide_release_dma_engine
+EXPORT_SYMBOL_GPL vmlinux 0x52794471	ide_read_status
+EXPORT_SYMBOL_GPL vmlinux 0x5292ec30	crypto_alloc_ahash
+EXPORT_SYMBOL_GPL vmlinux 0x52d111ea	pm_qos_update_requirement
+EXPORT_SYMBOL_GPL vmlinux 0x534ff05f	power_supply_changed
+EXPORT_SYMBOL_GPL vmlinux 0x5358fdeb	pmac_i2c_get_controller
+EXPORT_SYMBOL_GPL vmlinux 0x53614269	get_cpu_idle_time_us
+EXPORT_SYMBOL_GPL vmlinux 0x53986488	register_die_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x53b1453c	fuse_sync_release
+EXPORT_SYMBOL_GPL vmlinux 0x53b93775	cpufreq_frequency_table_target
+EXPORT_SYMBOL_GPL vmlinux 0x540352d4	tty_prepare_flip_string
+EXPORT_SYMBOL_GPL vmlinux 0x543d2e70	klist_add_head
+EXPORT_SYMBOL_GPL vmlinux 0x544f5ba1	driver_register
+EXPORT_SYMBOL_GPL vmlinux 0x5460c8d8	fsnotify_get_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x54641878	scsi_eh_ready_devs
+EXPORT_SYMBOL_GPL vmlinux 0x5473df64	driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x547c8f65	ata_sff_check_status
+EXPORT_SYMBOL_GPL vmlinux 0x549525ef	handle_nested_irq
+EXPORT_SYMBOL_GPL vmlinux 0x54a731d2	ide_init_sg_cmd
+EXPORT_SYMBOL_GPL vmlinux 0x54d55a1e	rtnl_put_cacheinfo
+EXPORT_SYMBOL_GPL vmlinux 0x552ee540	ata_port_pbar_desc
+EXPORT_SYMBOL_GPL vmlinux 0x5546f493	class_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x5552bc55	add_timer_on
+EXPORT_SYMBOL_GPL vmlinux 0x556b2236	power_supply_am_i_supplied
+EXPORT_SYMBOL_GPL vmlinux 0x5574573d	pci_ioremap_bar
+EXPORT_SYMBOL_GPL vmlinux 0x55b4ec1e	ide_pci_resume
+EXPORT_SYMBOL_GPL vmlinux 0x55cd1b5e	pmac_i2c_get_bus_node
+EXPORT_SYMBOL_GPL vmlinux 0x55d9d359	pci_disable_rom
+EXPORT_SYMBOL_GPL vmlinux 0x56310925	regulator_mode_to_status
+EXPORT_SYMBOL_GPL vmlinux 0x563fb5c8	__trace_bprintk
+EXPORT_SYMBOL_GPL vmlinux 0x567e4553	crypto_alg_mod_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x56a45477	sysdev_show_int
+EXPORT_SYMBOL_GPL vmlinux 0x56fc357e	cpufreq_freq_attr_scaling_available_freqs
+EXPORT_SYMBOL_GPL vmlinux 0x57117d1b	crypto_alloc_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0x57495508	xfrm_inner_extract_output
+EXPORT_SYMBOL_GPL vmlinux 0x579e0bf5	rtnl_unregister_all
+EXPORT_SYMBOL_GPL vmlinux 0x580385e2	kobject_create_and_add
+EXPORT_SYMBOL_GPL vmlinux 0x585b4f76	blocking_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x5861e32b	of_pci_address_to_resource
+EXPORT_SYMBOL_GPL vmlinux 0x5892f832	release_pmc_hardware
+EXPORT_SYMBOL_GPL vmlinux 0x58a1b037	ide_output_data
+EXPORT_SYMBOL_GPL vmlinux 0x58a9ea66	sysfs_remove_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0x5908eed9	ata_port_desc
+EXPORT_SYMBOL_GPL vmlinux 0x5945713b	rt_mutex_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x595185aa	vfs_listxattr
+EXPORT_SYMBOL_GPL vmlinux 0x59749dac	platform_get_irq_byname
+EXPORT_SYMBOL_GPL vmlinux 0x59ad2535	init_user_ns
+EXPORT_SYMBOL_GPL vmlinux 0x59ca3224	inet_twdr_twkill_work
+EXPORT_SYMBOL_GPL vmlinux 0x59eae098	ata_ehi_clear_desc
+EXPORT_SYMBOL_GPL vmlinux 0x5a258897	vfs_cancel_lock
+EXPORT_SYMBOL_GPL vmlinux 0x5a7bfe41	crypto_probing_notify
+EXPORT_SYMBOL_GPL vmlinux 0x5a85e737	ide_capacity_proc_fops
+EXPORT_SYMBOL_GPL vmlinux 0x5aad65ac	blkcipher_walk_phys
+EXPORT_SYMBOL_GPL vmlinux 0x5afc0ce2	bus_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x5afcfd3b	cleanup_srcu_struct
+EXPORT_SYMBOL_GPL vmlinux 0x5b0d97e2	schedule_hrtimeout_range
+EXPORT_SYMBOL_GPL vmlinux 0x5b306100	klist_init
+EXPORT_SYMBOL_GPL vmlinux 0x5b38b93c	pmac_i2c_close
+EXPORT_SYMBOL_GPL vmlinux 0x5b730740	ring_buffer_read_page
+EXPORT_SYMBOL_GPL vmlinux 0x5b998f9f	ring_buffer_size
+EXPORT_SYMBOL_GPL vmlinux 0x5bc0d02d	lookup_instantiate_filp
+EXPORT_SYMBOL_GPL vmlinux 0x5bd2a49c	ata_pci_device_resume
+EXPORT_SYMBOL_GPL vmlinux 0x5be89259	generic_fh_to_dentry
+EXPORT_SYMBOL_GPL vmlinux 0x5bfc03c3	unregister_keyboard_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5c31d038	usb_driver_release_interface
+EXPORT_SYMBOL_GPL vmlinux 0x5c53b693	ide_get_best_pio_mode
+EXPORT_SYMBOL_GPL vmlinux 0x5c6a1175	ide_host_free
+EXPORT_SYMBOL_GPL vmlinux 0x5ccdc319	transport_remove_device
+EXPORT_SYMBOL_GPL vmlinux 0x5cd7c414	net_assign_generic
+EXPORT_SYMBOL_GPL vmlinux 0x5d0f6f57	kbd_table
+EXPORT_SYMBOL_GPL vmlinux 0x5d730e7b	raw_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x5dd67618	register_netevent_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5de3d374	kobject_rename
+EXPORT_SYMBOL_GPL vmlinux 0x5e2e520c	relay_file_operations
+EXPORT_SYMBOL_GPL vmlinux 0x5e48d473	pskb_put
+EXPORT_SYMBOL_GPL vmlinux 0x5e66ea70	dev_set_name
+EXPORT_SYMBOL_GPL vmlinux 0x5e79682d	xattr_getsecurity
+EXPORT_SYMBOL_GPL vmlinux 0x5e79c2e3	usb_driver_set_configuration
+EXPORT_SYMBOL_GPL vmlinux 0x5eb1fc41	ide_allocate_dma_engine
+EXPORT_SYMBOL_GPL vmlinux 0x5ebc0501	led_classdev_resume
+EXPORT_SYMBOL_GPL vmlinux 0x5ed2d728	tty_encode_baud_rate
+EXPORT_SYMBOL_GPL vmlinux 0x5ed2e03b	ata_dev_pair
+EXPORT_SYMBOL_GPL vmlinux 0x5ee6fc79	ata_sff_dev_classify
+EXPORT_SYMBOL_GPL vmlinux 0x5eff0bed	ide_input_data
+EXPORT_SYMBOL_GPL vmlinux 0x5f30d6f9	remove_irq
+EXPORT_SYMBOL_GPL vmlinux 0x5f49abc5	srcu_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x5f93cc48	register_jprobe
+EXPORT_SYMBOL_GPL vmlinux 0x5fcb48c6	tty_mode_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x5fcdec5d	xfrm_ealg_get_byidx
+EXPORT_SYMBOL_GPL vmlinux 0x5ff3a608	register_posix_clock
+EXPORT_SYMBOL_GPL vmlinux 0x60035921	__rt_mutex_init
+EXPORT_SYMBOL_GPL vmlinux 0x605c3a3f	platform_device_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x606ed249	ata_ehi_push_desc
+EXPORT_SYMBOL_GPL vmlinux 0x60a13e90	rcu_barrier
+EXPORT_SYMBOL_GPL vmlinux 0x60a32ea9	pm_power_off
+EXPORT_SYMBOL_GPL vmlinux 0x60eac24d	usb_hcd_pci_remove
+EXPORT_SYMBOL_GPL vmlinux 0x61175682	usb_get_intf
+EXPORT_SYMBOL_GPL vmlinux 0x61282423	crypto_init_shash_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x61339e0f	__lock_page_killable
+EXPORT_SYMBOL_GPL vmlinux 0x61604fac	input_ff_event
+EXPORT_SYMBOL_GPL vmlinux 0x61a0cd33	ide_create_request_sense_cmd
+EXPORT_SYMBOL_GPL vmlinux 0x623aa9f2	kset_create_and_add
+EXPORT_SYMBOL_GPL vmlinux 0x625f4578	fuse_do_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x6270aec7	blk_execute_rq_nowait
+EXPORT_SYMBOL_GPL vmlinux 0x6272e3ed	device_bind_driver
+EXPORT_SYMBOL_GPL vmlinux 0x629a7f6e	do_posix_clock_nonanosleep
+EXPORT_SYMBOL_GPL vmlinux 0x62e24b2b	platform_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x62e338fc	ide_tf_read
+EXPORT_SYMBOL_GPL vmlinux 0x62f32451	platform_driver_probe
+EXPORT_SYMBOL_GPL vmlinux 0x630e43d7	crypto_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0x63515a73	usb_hcd_platform_shutdown
+EXPORT_SYMBOL_GPL vmlinux 0x63a23e12	ata_sff_irq_on
+EXPORT_SYMBOL_GPL vmlinux 0x63a6b1bd	__ip_route_output_key
+EXPORT_SYMBOL_GPL vmlinux 0x63b353bc	ring_buffer_read_finish
+EXPORT_SYMBOL_GPL vmlinux 0x63c5af06	class_compat_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x6453f77c	pmac_has_backlight_type
+EXPORT_SYMBOL_GPL vmlinux 0x6489e32e	ata_sas_port_init
+EXPORT_SYMBOL_GPL vmlinux 0x64afe1f4	register_pernet_gen_device
+EXPORT_SYMBOL_GPL vmlinux 0x64c07887	ring_buffer_record_disable_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x64d3da68	shash_ahash_finup
+EXPORT_SYMBOL_GPL vmlinux 0x64faecb0	mnt_clone_write
+EXPORT_SYMBOL_GPL vmlinux 0x653cf46b	usb_put_intf
+EXPORT_SYMBOL_GPL vmlinux 0x654c49e2	aer_irq
+EXPORT_SYMBOL_GPL vmlinux 0x65ccb6f0	call_netevent_notifiers
+EXPORT_SYMBOL_GPL vmlinux 0x65d6d0f0	gpio_direction_input
+EXPORT_SYMBOL_GPL vmlinux 0x65d72f12	user_instantiate
+EXPORT_SYMBOL_GPL vmlinux 0x65f61fc7	ata_pio_need_iordy
+EXPORT_SYMBOL_GPL vmlinux 0x661601de	sprint_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x6628171d	sata_scr_read
+EXPORT_SYMBOL_GPL vmlinux 0x662e016c	power_supply_set_battery_charged
+EXPORT_SYMBOL_GPL vmlinux 0x664517cd	pmac_low_i2c_unlock
+EXPORT_SYMBOL_GPL vmlinux 0x6665c60b	ring_buffer_overruns
+EXPORT_SYMBOL_GPL vmlinux 0x668402aa	crypto_put_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x6699468c	add_page_wait_queue
+EXPORT_SYMBOL_GPL vmlinux 0x66a2ac27	dev_attr_em_message_type
+EXPORT_SYMBOL_GPL vmlinux 0x66b2a859	nr_free_buffer_pages
+EXPORT_SYMBOL_GPL vmlinux 0x66cd5e7d	ata_sas_queuecmd
+EXPORT_SYMBOL_GPL vmlinux 0x66d118ca	relay_switch_subbuf
+EXPORT_SYMBOL_GPL vmlinux 0x66d87d38	symbol_put_addr
+EXPORT_SYMBOL_GPL vmlinux 0x66f6a19a	pmac_i2c_get_flags
+EXPORT_SYMBOL_GPL vmlinux 0x671c791a	skb_gro_receive
+EXPORT_SYMBOL_GPL vmlinux 0x6729dc7b	pmac_i2c_adapter_to_bus
+EXPORT_SYMBOL_GPL vmlinux 0x67955ce6	profile_hits
+EXPORT_SYMBOL_GPL vmlinux 0x67eccb10	rtc_set_mmss
+EXPORT_SYMBOL_GPL vmlinux 0x68400065	screen_glyph
+EXPORT_SYMBOL_GPL vmlinux 0x6852f831	crypto_create_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x686c703f	xfrm_count_auth_supported
+EXPORT_SYMBOL_GPL vmlinux 0x686cb620	crypto_unregister_alg
+EXPORT_SYMBOL_GPL vmlinux 0x6892088c	unregister_pm_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x68c06abf	led_classdev_register
+EXPORT_SYMBOL_GPL vmlinux 0x6901119a	trace_nowake_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0x69367b45	ring_buffer_swap_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x69534156	regulator_bulk_get
+EXPORT_SYMBOL_GPL vmlinux 0x6972b28e	usb_get_current_frame_number
+EXPORT_SYMBOL_GPL vmlinux 0x69af3ae2	bus_sort_breadthfirst
+EXPORT_SYMBOL_GPL vmlinux 0x69d05545	blk_rq_unprep_clone
+EXPORT_SYMBOL_GPL vmlinux 0x69e470ce	ring_buffer_overrun_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x69e9a2cb	ata_scsi_slave_config
+EXPORT_SYMBOL_GPL vmlinux 0x6a00112d	input_ff_erase
+EXPORT_SYMBOL_GPL vmlinux 0x6a129765	ata_sff_tf_load
+EXPORT_SYMBOL_GPL vmlinux 0x6a2ac0da	tcp_twsk_destructor
+EXPORT_SYMBOL_GPL vmlinux 0x6a51a39f	class_find_device
+EXPORT_SYMBOL_GPL vmlinux 0x6a6106c1	sysfs_get
+EXPORT_SYMBOL_GPL vmlinux 0x6a6181cc	hrtimer_start
+EXPORT_SYMBOL_GPL vmlinux 0x6a6d54d8	skb_cow_data
+EXPORT_SYMBOL_GPL vmlinux 0x6aa09fb1	ide_device_get
+EXPORT_SYMBOL_GPL vmlinux 0x6ab4f2a6	usb_hcd_resume_root_hub
+EXPORT_SYMBOL_GPL vmlinux 0x6af523b4	dm_kill_unmapped_request
+EXPORT_SYMBOL_GPL vmlinux 0x6af8e62c	ata_noop_qc_prep
+EXPORT_SYMBOL_GPL vmlinux 0x6b282822	tasklet_hrtimer_init
+EXPORT_SYMBOL_GPL vmlinux 0x6bf30a7b	__inet_twsk_hashdance
+EXPORT_SYMBOL_GPL vmlinux 0x6c133162	disk_get_part
+EXPORT_SYMBOL_GPL vmlinux 0x6c169834	ata_host_activate
+EXPORT_SYMBOL_GPL vmlinux 0x6c49c4f2	clockevents_notify
+EXPORT_SYMBOL_GPL vmlinux 0x6c654282	led_classdev_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x6c8d5ae8	__gpio_get_value
+EXPORT_SYMBOL_GPL vmlinux 0x6c8eb98f	xfrm_aalg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0x6d2cbf26	ahash_attr_alg
+EXPORT_SYMBOL_GPL vmlinux 0x6d2fc5a6	net_namespace_list
+EXPORT_SYMBOL_GPL vmlinux 0x6d40bbda	inet_csk_reqsk_queue_prune
+EXPORT_SYMBOL_GPL vmlinux 0x6d65c0e7	ide_queue_sense_rq
+EXPORT_SYMBOL_GPL vmlinux 0x6d69a718	relay_subbufs_consumed
+EXPORT_SYMBOL_GPL vmlinux 0x6dc277a6	class_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x6de47301	regulator_bulk_disable
+EXPORT_SYMBOL_GPL vmlinux 0x6df24212	tcp_cong_avoid_ai
+EXPORT_SYMBOL_GPL vmlinux 0x6e197f2b	hrtimer_start_range_ns
+EXPORT_SYMBOL_GPL vmlinux 0x6e32209b	debugfs_create_dir
+EXPORT_SYMBOL_GPL vmlinux 0x6e7474fc	xfrm_ealg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x6eafabfa	led_trigger_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x6efde810	usb_hcd_giveback_urb
+EXPORT_SYMBOL_GPL vmlinux 0x6f2bd2a4	ata_cable_40wire
+EXPORT_SYMBOL_GPL vmlinux 0x6f755f43	blk_insert_cloned_request
+EXPORT_SYMBOL_GPL vmlinux 0x6ff607b6	crypto_get_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x7005d287	ide_pci_dma_base
+EXPORT_SYMBOL_GPL vmlinux 0x7006c182	pmac_i2c_open
+EXPORT_SYMBOL_GPL vmlinux 0x7012c5fb	ata_dev_next
+EXPORT_SYMBOL_GPL vmlinux 0x70288f03	platform_add_devices
+EXPORT_SYMBOL_GPL vmlinux 0x70464471	sata_std_hardreset
+EXPORT_SYMBOL_GPL vmlinux 0x704c9398	ide_check_atapi_device
+EXPORT_SYMBOL_GPL vmlinux 0x705935a4	cpufreq_cpu_get
+EXPORT_SYMBOL_GPL vmlinux 0x706357ae	bsg_unregister_queue
+EXPORT_SYMBOL_GPL vmlinux 0x706b3a33	cpufreq_frequency_table_get_attr
+EXPORT_SYMBOL_GPL vmlinux 0x707ff1bb	ata_xfer_mask2mode
+EXPORT_SYMBOL_GPL vmlinux 0x70ac64e7	hrtimer_init_sleeper
+EXPORT_SYMBOL_GPL vmlinux 0x70c28210	ide_dma_lost_irq
+EXPORT_SYMBOL_GPL vmlinux 0x715a3186	bus_find_device_by_name
+EXPORT_SYMBOL_GPL vmlinux 0x716265c7	debugfs_initialized
+EXPORT_SYMBOL_GPL vmlinux 0x71869ed9	klist_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0x71978fca	crypto_ahash_finup
+EXPORT_SYMBOL_GPL vmlinux 0x71a3b18b	ata_sff_error_handler
+EXPORT_SYMBOL_GPL vmlinux 0x71e4b75d	scsi_get_vpd_page
+EXPORT_SYMBOL_GPL vmlinux 0x71e89a1c	fb_bl_default_curve
+EXPORT_SYMBOL_GPL vmlinux 0x71f0f1f0	rtc_set_time
+EXPORT_SYMBOL_GPL vmlinux 0x722679c1	usb_driver_claim_interface
+EXPORT_SYMBOL_GPL vmlinux 0x7256c985	ata_common_sdev_attrs
+EXPORT_SYMBOL_GPL vmlinux 0x7258a6c7	usb_deregister_device_driver
+EXPORT_SYMBOL_GPL vmlinux 0x725d4a16	pmf_get_function
+EXPORT_SYMBOL_GPL vmlinux 0x72741f25	trace_vbprintk
+EXPORT_SYMBOL_GPL vmlinux 0x7278d328	all_vm_events
+EXPORT_SYMBOL_GPL vmlinux 0x72af3cf3	led_trigger_event
+EXPORT_SYMBOL_GPL vmlinux 0x72b072a1	driver_find
+EXPORT_SYMBOL_GPL vmlinux 0x72ba54cd	macio_find
+EXPORT_SYMBOL_GPL vmlinux 0x72e03bae	stop_machine_create
+EXPORT_SYMBOL_GPL vmlinux 0x72ef57c7	platform_driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x731e4497	tty_wakeup
+EXPORT_SYMBOL_GPL vmlinux 0x732598bd	regulator_list_voltage
+EXPORT_SYMBOL_GPL vmlinux 0x73297735	regulator_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x7334ebc8	scatterwalk_map_and_copy
+EXPORT_SYMBOL_GPL vmlinux 0x735c4b6b	ide_dma_sff_read_status
+EXPORT_SYMBOL_GPL vmlinux 0x73a48b4a	ata_sff_std_ports
+EXPORT_SYMBOL_GPL vmlinux 0x740a45b0	usb_bus_list_lock
+EXPORT_SYMBOL_GPL vmlinux 0x743a165e	ata_pack_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0x7443aaa9	usb_queue_reset_device
+EXPORT_SYMBOL_GPL vmlinux 0x749062e0	unregister_ftrace_event
+EXPORT_SYMBOL_GPL vmlinux 0x74abdafa	task_handoff_register
+EXPORT_SYMBOL_GPL vmlinux 0x74baf17a	tracing_is_on
+EXPORT_SYMBOL_GPL vmlinux 0x74f2be61	ata_sas_port_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x750fdcad	sock_prot_inuse_get
+EXPORT_SYMBOL_GPL vmlinux 0x753e790a	relay_buf_full
+EXPORT_SYMBOL_GPL vmlinux 0x75d73d65	pci_enable_rom
+EXPORT_SYMBOL_GPL vmlinux 0x75e8f3c3	crypto_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x761188fd	dpm_suspend_noirq
+EXPORT_SYMBOL_GPL vmlinux 0x7626b273	unregister_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0x76274846	devm_kfree
+EXPORT_SYMBOL_GPL vmlinux 0x763108bd	usb_mon_register
+EXPORT_SYMBOL_GPL vmlinux 0x7667fe5d	security_inode_setattr
+EXPORT_SYMBOL_GPL vmlinux 0x769e79b2	ring_buffer_time_stamp
+EXPORT_SYMBOL_GPL vmlinux 0x76fae526	eventfd_fget
+EXPORT_SYMBOL_GPL vmlinux 0x773ca527	init_uts_ns
+EXPORT_SYMBOL_GPL vmlinux 0x77435b7c	get_current_tty
+EXPORT_SYMBOL_GPL vmlinux 0x779c24e2	ata_sff_host_intr
+EXPORT_SYMBOL_GPL vmlinux 0x78023b01	scsi_mode_select
+EXPORT_SYMBOL_GPL vmlinux 0x7832f09f	inotify_init
+EXPORT_SYMBOL_GPL vmlinux 0x7833192a	scatterwalk_done
+EXPORT_SYMBOL_GPL vmlinux 0x78632f7f	nf_register_afinfo
+EXPORT_SYMBOL_GPL vmlinux 0x786b2c1c	usb_unlink_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0x78718915	class_dev_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0x787ffacc	regulator_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x78b1eada	pci_test_config_bits
+EXPORT_SYMBOL_GPL vmlinux 0x78bf14c6	fb_deferred_io_fsync
+EXPORT_SYMBOL_GPL vmlinux 0x78e4a4ee	klist_add_after
+EXPORT_SYMBOL_GPL vmlinux 0x79100a16	ide_pio_need_iordy
+EXPORT_SYMBOL_GPL vmlinux 0x7944e0fc	tracing_off
+EXPORT_SYMBOL_GPL vmlinux 0x7953b2e7	ide_pci_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x79b8daef	usb_create_hcd
+EXPORT_SYMBOL_GPL vmlinux 0x79bee454	spi_new_device
+EXPORT_SYMBOL_GPL vmlinux 0x79bfd66c	find_vpid
+EXPORT_SYMBOL_GPL vmlinux 0x79fb7ba2	pmac_i2c_find_bus
+EXPORT_SYMBOL_GPL vmlinux 0x7a5109ad	sysdev_store_int
+EXPORT_SYMBOL_GPL vmlinux 0x7a770d17	srcu_init_notifier_head
+EXPORT_SYMBOL_GPL vmlinux 0x7ab3c122	edac_handlers
+EXPORT_SYMBOL_GPL vmlinux 0x7ae1ae8e	cpufreq_frequency_table_put_attr
+EXPORT_SYMBOL_GPL vmlinux 0x7ae45b0f	regulator_set_mode
+EXPORT_SYMBOL_GPL vmlinux 0x7b01f53c	cpufreq_frequency_table_verify
+EXPORT_SYMBOL_GPL vmlinux 0x7b1d544d	edac_handler_set
+EXPORT_SYMBOL_GPL vmlinux 0x7b6425e8	queue_work_on
+EXPORT_SYMBOL_GPL vmlinux 0x7b6b4e23	devres_get
+EXPORT_SYMBOL_GPL vmlinux 0x7bea0cae	disable_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0x7bf79966	fuse_put_request
+EXPORT_SYMBOL_GPL vmlinux 0x7c05e251	ide_dma_start
+EXPORT_SYMBOL_GPL vmlinux 0x7c1c6031	ide_host_remove
+EXPORT_SYMBOL_GPL vmlinux 0x7c5d55c7	regulator_disable
+EXPORT_SYMBOL_GPL vmlinux 0x7c64cb42	ata_do_dev_read_id
+EXPORT_SYMBOL_GPL vmlinux 0x7c6c5c92	blk_trace_remove
+EXPORT_SYMBOL_GPL vmlinux 0x7c718546	scsi_internal_device_unblock
+EXPORT_SYMBOL_GPL vmlinux 0x7c788945	regulator_set_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0x7cabb390	tcp_init_congestion_ops
+EXPORT_SYMBOL_GPL vmlinux 0x7cc3a0fd	shash_ahash_digest
+EXPORT_SYMBOL_GPL vmlinux 0x7ced3583	regulator_get_current_limit
+EXPORT_SYMBOL_GPL vmlinux 0x7d3ddeb5	pci_block_user_cfg_access
+EXPORT_SYMBOL_GPL vmlinux 0x7d9d207c	crypto_shash_setkey
+EXPORT_SYMBOL_GPL vmlinux 0x7dc5d0b6	crypto_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x7ddcae9b	default_backing_dev_info
+EXPORT_SYMBOL_GPL vmlinux 0x7e0a82dd	flush_workqueue
+EXPORT_SYMBOL_GPL vmlinux 0x7e1183c9	async_schedule
+EXPORT_SYMBOL_GPL vmlinux 0x7e23663d	skcipher_geniv_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x7e275ea8	scsi_complete_async_scans
+EXPORT_SYMBOL_GPL vmlinux 0x7e2d29ec	ide_pci_clk
+EXPORT_SYMBOL_GPL vmlinux 0x7e64181d	usb_calc_bus_time
+EXPORT_SYMBOL_GPL vmlinux 0x7e7aebcf	crypto_shash_final
+EXPORT_SYMBOL_GPL vmlinux 0x7e89610c	pci_disable_pcie_error_reporting
+EXPORT_SYMBOL_GPL vmlinux 0x7ea7e635	ide_dma_test_irq
+EXPORT_SYMBOL_GPL vmlinux 0x7eb51385	apply_to_page_range
+EXPORT_SYMBOL_GPL vmlinux 0x7ebfb8fc	tracepoint_iter_reset
+EXPORT_SYMBOL_GPL vmlinux 0x7ec328b9	pmac_backlight_mutex
+EXPORT_SYMBOL_GPL vmlinux 0x7ecc7e7b	dequeue_signal
+EXPORT_SYMBOL_GPL vmlinux 0x7edd5672	__inet_hash_nolisten
+EXPORT_SYMBOL_GPL vmlinux 0x7f19c836	unlock_policy_rwsem_write
+EXPORT_SYMBOL_GPL vmlinux 0x7f306e38	mnt_want_write_file
+EXPORT_SYMBOL_GPL vmlinux 0x7f3d1e50	ata_host_register
+EXPORT_SYMBOL_GPL vmlinux 0x7fa831b9	xfrm_audit_state_icvfail
+EXPORT_SYMBOL_GPL vmlinux 0x7faca1f2	trace_seq_vprintf
+EXPORT_SYMBOL_GPL vmlinux 0x7fb87a11	debugfs_create_x16
+EXPORT_SYMBOL_GPL vmlinux 0x7fb936a1	usb_get_dev
+EXPORT_SYMBOL_GPL vmlinux 0x7fc3dc5c	debugfs_rename
+EXPORT_SYMBOL_GPL vmlinux 0x7fcf82ed	crypto_alg_sem
+EXPORT_SYMBOL_GPL vmlinux 0x7ff10ccf	raw_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x8014b6af	input_event_from_user
+EXPORT_SYMBOL_GPL vmlinux 0x8039d043	selinux_secmark_relabel_packet_permission
+EXPORT_SYMBOL_GPL vmlinux 0x804d544a	ata_pci_sff_init_host
+EXPORT_SYMBOL_GPL vmlinux 0x805b697e	crypto_blkcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0x808acb8b	aead_geniv_free
+EXPORT_SYMBOL_GPL vmlinux 0x808ec1a3	crypto_alg_tested
+EXPORT_SYMBOL_GPL vmlinux 0x80ee55c3	selinux_secmark_refcount_inc
+EXPORT_SYMBOL_GPL vmlinux 0x80f21e35	generic_drop_inode
+EXPORT_SYMBOL_GPL vmlinux 0x811afadf	rtc_lock
+EXPORT_SYMBOL_GPL vmlinux 0x8137d89d	pmf_put_function
+EXPORT_SYMBOL_GPL vmlinux 0x8149ea54	ata_timing_find_mode
+EXPORT_SYMBOL_GPL vmlinux 0x8224eacf	i2c_new_probed_device
+EXPORT_SYMBOL_GPL vmlinux 0x8226642f	__gpio_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x82680815	blkcipher_walk_done
+EXPORT_SYMBOL_GPL vmlinux 0x8271fe95	inode_add_to_lists
+EXPORT_SYMBOL_GPL vmlinux 0x8287dcf0	vfs_kern_mount
+EXPORT_SYMBOL_GPL vmlinux 0x82939ebd	rcu_batches_completed_sched
+EXPORT_SYMBOL_GPL vmlinux 0x82b7e628	ata_port_abort
+EXPORT_SYMBOL_GPL vmlinux 0x82d79b51	sysctl_vfs_cache_pressure
+EXPORT_SYMBOL_GPL vmlinux 0x82eeeacd	disk_part_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0x82fdbeb0	xfrm_audit_state_notfound
+EXPORT_SYMBOL_GPL vmlinux 0x8305d119	spi_add_device
+EXPORT_SYMBOL_GPL vmlinux 0x83191ddd	inet_csk_listen_stop
+EXPORT_SYMBOL_GPL vmlinux 0x833160c6	ata_pci_bmdma_clear_simplex
+EXPORT_SYMBOL_GPL vmlinux 0x837397b7	skcipher_geniv_free
+EXPORT_SYMBOL_GPL vmlinux 0x837a99d5	usb_init_urb
+EXPORT_SYMBOL_GPL vmlinux 0x83f15297	usb_bulk_msg
+EXPORT_SYMBOL_GPL vmlinux 0x83f47aba	device_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x84152626	ata_sff_drain_fifo
+EXPORT_SYMBOL_GPL vmlinux 0x8458375c	sdev_evt_send_simple
+EXPORT_SYMBOL_GPL vmlinux 0x8459a594	class_dev_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0x846cce8b	pcibios_finish_adding_to_bus
+EXPORT_SYMBOL_GPL vmlinux 0x849b6882	__audit_inode_child
+EXPORT_SYMBOL_GPL vmlinux 0x85379f57	rdev_get_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0x8570bc68	__root_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x85714c6a	pci_add_dynid
+EXPORT_SYMBOL_GPL vmlinux 0x8575d535	ata_sff_hsm_move
+EXPORT_SYMBOL_GPL vmlinux 0x858edce3	scsi_nl_sock
+EXPORT_SYMBOL_GPL vmlinux 0x85bfe3f2	crypto_aead_type
+EXPORT_SYMBOL_GPL vmlinux 0x85c10896	rcu_batches_completed_bh
+EXPORT_SYMBOL_GPL vmlinux 0x85db4f9d	sk_clone
+EXPORT_SYMBOL_GPL vmlinux 0x860027c5	devres_remove
+EXPORT_SYMBOL_GPL vmlinux 0x868784cb	__symbol_get
+EXPORT_SYMBOL_GPL vmlinux 0x86a7703a	blkcipher_walk_virt_block
+EXPORT_SYMBOL_GPL vmlinux 0x86b1667d	hwrng_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x86e51e53	ata_sff_data_xfer32
+EXPORT_SYMBOL_GPL vmlinux 0x86f6b99d	synchronize_rcu_expedited
+EXPORT_SYMBOL_GPL vmlinux 0x87041397	skb_pull_rcsum
+EXPORT_SYMBOL_GPL vmlinux 0x873fbaea	edac_atomic_assert_error
+EXPORT_SYMBOL_GPL vmlinux 0x87754115	raw_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x8786cff3	simple_attr_read
+EXPORT_SYMBOL_GPL vmlinux 0x878dd0d4	ata_port_probe
+EXPORT_SYMBOL_GPL vmlinux 0x87c84810	pmf_find_function
+EXPORT_SYMBOL_GPL vmlinux 0x8810ad5e	crypto_xor
+EXPORT_SYMBOL_GPL vmlinux 0x885142a6	nf_net_netfilter_sysctl_path
+EXPORT_SYMBOL_GPL vmlinux 0x88635b21	led_trigger_remove
+EXPORT_SYMBOL_GPL vmlinux 0x8866063c	crypto_init_ahash_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x886892fb	skb_morph
+EXPORT_SYMBOL_GPL vmlinux 0x88882e0a	disk_part_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0x88cfc00a	inet_csk_listen_start
+EXPORT_SYMBOL_GPL vmlinux 0x88ed84b1	blk_end_request_err
+EXPORT_SYMBOL_GPL vmlinux 0x8928c9b8	rt_mutex_timed_lock
+EXPORT_SYMBOL_GPL vmlinux 0x896da9ee	ide_timing_compute
+EXPORT_SYMBOL_GPL vmlinux 0x89ce44a0	blkdev_aio_write
+EXPORT_SYMBOL_GPL vmlinux 0x89df8a79	bus_find_device
+EXPORT_SYMBOL_GPL vmlinux 0x89f7e8f7	ata_sas_port_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x8a16b797	register_jprobes
+EXPORT_SYMBOL_GPL vmlinux 0x8a282c6b	usb_control_msg
+EXPORT_SYMBOL_GPL vmlinux 0x8a3e264b	spi_setup
+EXPORT_SYMBOL_GPL vmlinux 0x8a7dd765	ata_sff_wait_ready
+EXPORT_SYMBOL_GPL vmlinux 0x8a9ad22c	inotify_rm_wd
+EXPORT_SYMBOL_GPL vmlinux 0x8aae1899	regulator_get_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0x8ac2804e	regulator_force_disable
+EXPORT_SYMBOL_GPL vmlinux 0x8acebadc	sysfs_notify_dirent
+EXPORT_SYMBOL_GPL vmlinux 0x8ad2620f	i2c_new_device
+EXPORT_SYMBOL_GPL vmlinux 0x8b14374e	pci_stop_bus_device
+EXPORT_SYMBOL_GPL vmlinux 0x8b36d6dc	transport_class_register
+EXPORT_SYMBOL_GPL vmlinux 0x8b37bccf	inotify_find_watch
+EXPORT_SYMBOL_GPL vmlinux 0x8b3ab629	alloc_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0x8b752ac1	ata_tf_to_fis
+EXPORT_SYMBOL_GPL vmlinux 0x8b7cd6a0	usb_find_interface
+EXPORT_SYMBOL_GPL vmlinux 0x8ba3b75c	led_trigger_store
+EXPORT_SYMBOL_GPL vmlinux 0x8baf8f82	br_handle_frame_hook
+EXPORT_SYMBOL_GPL vmlinux 0x8bca0757	crypto_register_ahash
+EXPORT_SYMBOL_GPL vmlinux 0x8c675147	usb_hcd_pci_probe
+EXPORT_SYMBOL_GPL vmlinux 0x8cb3c332	platform_device_register_simple
+EXPORT_SYMBOL_GPL vmlinux 0x8d033df4	klist_node_attached
+EXPORT_SYMBOL_GPL vmlinux 0x8d0b3c7d	crypto_alloc_shash
+EXPORT_SYMBOL_GPL vmlinux 0x8e05f013	crypto_aead_setauthsize
+EXPORT_SYMBOL_GPL vmlinux 0x8e607a8a	kill_pid_info_as_uid
+EXPORT_SYMBOL_GPL vmlinux 0x8f12ec24	inotify_inode_queue_event
+EXPORT_SYMBOL_GPL vmlinux 0x8f26e101	scsi_target_block
+EXPORT_SYMBOL_GPL vmlinux 0x8f2f590d	ata_slave_link_init
+EXPORT_SYMBOL_GPL vmlinux 0x8f672bd2	ide_pad_transfer
+EXPORT_SYMBOL_GPL vmlinux 0x8f6cee77	__round_jiffies_relative
+EXPORT_SYMBOL_GPL vmlinux 0x8f6e0fe9	pmac_low_i2c_lock
+EXPORT_SYMBOL_GPL vmlinux 0x8f8af3a2	cpu_remove_sysdev_attr_group
+EXPORT_SYMBOL_GPL vmlinux 0x8fa74514	sysdev_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x90378f99	usb_submit_urb
+EXPORT_SYMBOL_GPL vmlinux 0x9045c0c5	da903x_reads
+EXPORT_SYMBOL_GPL vmlinux 0x90a1004a	crypto_has_alg
+EXPORT_SYMBOL_GPL vmlinux 0x912b3092	ata_sas_slave_configure
+EXPORT_SYMBOL_GPL vmlinux 0x912ba54e	class_compat_remove_link
+EXPORT_SYMBOL_GPL vmlinux 0x9159b9d6	profile_event_register
+EXPORT_SYMBOL_GPL vmlinux 0x915c60af	ata_sff_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x916951c1	srcu_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x919e4700	crypto_chain
+EXPORT_SYMBOL_GPL vmlinux 0x91a007f0	__get_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0x91e67797	usb_poison_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0x91f45586	fuse_dev_release
+EXPORT_SYMBOL_GPL vmlinux 0x9204bf2c	device_reprobe
+EXPORT_SYMBOL_GPL vmlinux 0x92080ccb	hrtimer_try_to_cancel
+EXPORT_SYMBOL_GPL vmlinux 0x9230bfb1	devres_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x92ba2117	scsi_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x92c17454	usb_register_device_driver
+EXPORT_SYMBOL_GPL vmlinux 0x92d31cfb	fixed_phy_add
+EXPORT_SYMBOL_GPL vmlinux 0x92fb217b	dcookie_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x9333593a	leds_list_lock
+EXPORT_SYMBOL_GPL vmlinux 0x933b0d83	usb_hcd_poll_rh_status
+EXPORT_SYMBOL_GPL vmlinux 0x938c96b0	eventfd_ctx_put
+EXPORT_SYMBOL_GPL vmlinux 0x93a2cb47	reserve_pmc_hardware
+EXPORT_SYMBOL_GPL vmlinux 0x93ca412c	led_trigger_set_default
+EXPORT_SYMBOL_GPL vmlinux 0x93d2422d	snmp_mib_free
+EXPORT_SYMBOL_GPL vmlinux 0x93d579fa	ide_do_test_unit_ready
+EXPORT_SYMBOL_GPL vmlinux 0x93dda0a7	tty_init_termios
+EXPORT_SYMBOL_GPL vmlinux 0x93f758f6	swiotlb_map_page
+EXPORT_SYMBOL_GPL vmlinux 0x9422c24c	attribute_container_find_class_device
+EXPORT_SYMBOL_GPL vmlinux 0x945d1b80	usb_free_urb
+EXPORT_SYMBOL_GPL vmlinux 0x9472ce05	class_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x9474f8f9	sync_filesystem
+EXPORT_SYMBOL_GPL vmlinux 0x9487bb50	crypto_attr_alg2
+EXPORT_SYMBOL_GPL vmlinux 0x94a68723	ata_scsi_slave_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x952664c5	do_exit
+EXPORT_SYMBOL_GPL vmlinux 0x95276bd9	pci_find_ext_capability
+EXPORT_SYMBOL_GPL vmlinux 0x95322b6a	ring_buffer_free
+EXPORT_SYMBOL_GPL vmlinux 0x954abe39	platform_driver_register
+EXPORT_SYMBOL_GPL vmlinux 0x956a91ba	gpio_get_value_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x95919762	ata_dummy_port_info
+EXPORT_SYMBOL_GPL vmlinux 0x961a8cd3	unlock_policy_rwsem_read
+EXPORT_SYMBOL_GPL vmlinux 0x96977e5a	rtc_update_irq
+EXPORT_SYMBOL_GPL vmlinux 0x96ace522	__inet_inherit_port
+EXPORT_SYMBOL_GPL vmlinux 0x96cbcf31	pm_qos_add_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x96eebc93	crypto_alloc_ablkcipher
+EXPORT_SYMBOL_GPL vmlinux 0x96fd0bf6	find_module
+EXPORT_SYMBOL_GPL vmlinux 0x96fe4812	ide_dma_unmap_sg
+EXPORT_SYMBOL_GPL vmlinux 0x97d8873e	inet_csk_clone
+EXPORT_SYMBOL_GPL vmlinux 0x981cc996	tty_ldisc_deref
+EXPORT_SYMBOL_GPL vmlinux 0x9833bc0c	hvc_kick
+EXPORT_SYMBOL_GPL vmlinux 0x98d37345	class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x9924c496	__usb_get_extra_descriptor
+EXPORT_SYMBOL_GPL vmlinux 0x994e5d44	elv_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x995d1071	prof_on
+EXPORT_SYMBOL_GPL vmlinux 0x9a11a0fc	crypto_attr_alg_name
+EXPORT_SYMBOL_GPL vmlinux 0x9a281bb0	platform_device_add
+EXPORT_SYMBOL_GPL vmlinux 0x9a37f04f	ring_buffer_read_start
+EXPORT_SYMBOL_GPL vmlinux 0x9aa1b64e	of_irq_to_resource
+EXPORT_SYMBOL_GPL vmlinux 0x9ad5756c	transport_configure_device
+EXPORT_SYMBOL_GPL vmlinux 0x9b888ab7	bdi_writeout_inc
+EXPORT_SYMBOL_GPL vmlinux 0x9ba0501e	unregister_vt_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x9bb639d1	sysfs_create_link
+EXPORT_SYMBOL_GPL vmlinux 0x9c205c38	ring_buffer_commit_overrun_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x9c678af5	ring_buffer_write
+EXPORT_SYMBOL_GPL vmlinux 0x9c69a520	device_attach
+EXPORT_SYMBOL_GPL vmlinux 0x9ca3e3cc	ata_sas_scsi_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x9cb8037b	xfrm_count_enc_supported
+EXPORT_SYMBOL_GPL vmlinux 0x9cdce019	ehci_cf_port_reset_rwsem
+EXPORT_SYMBOL_GPL vmlinux 0x9d175099	ata_sff_wait_after_reset
+EXPORT_SYMBOL_GPL vmlinux 0x9d606db8	ip_build_and_send_pkt
+EXPORT_SYMBOL_GPL vmlinux 0x9dff6dbb	debugfs_create_u64
+EXPORT_SYMBOL_GPL vmlinux 0x9e003b5e	of_rescan_bus
+EXPORT_SYMBOL_GPL vmlinux 0x9e4d09f5	ring_buffer_reset
+EXPORT_SYMBOL_GPL vmlinux 0x9e711ad2	pm_qos_requirement
+EXPORT_SYMBOL_GPL vmlinux 0x9e732ef4	pci_find_next_ht_capability
+EXPORT_SYMBOL_GPL vmlinux 0x9e993a4c	sysdev_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x9ee260dc	register_net_sysctl_table
+EXPORT_SYMBOL_GPL vmlinux 0x9f40a6d6	async_synchronize_full_domain
+EXPORT_SYMBOL_GPL vmlinux 0x9f85ed90	klist_remove
+EXPORT_SYMBOL_GPL vmlinux 0x9f99820c	scsi_nl_add_transport
+EXPORT_SYMBOL_GPL vmlinux 0x9fb44b60	usb_root_hub_lost_power
+EXPORT_SYMBOL_GPL vmlinux 0x9fb54ee6	crypto_hash_walk_first
+EXPORT_SYMBOL_GPL vmlinux 0x9fce80db	fb_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xa0255440	net_ipv4_ctl_path
+EXPORT_SYMBOL_GPL vmlinux 0xa03b159a	filter_current_check_discard
+EXPORT_SYMBOL_GPL vmlinux 0xa0497fe5	inet_unhash
+EXPORT_SYMBOL_GPL vmlinux 0xa0b35960	rt_mutex_trylock
+EXPORT_SYMBOL_GPL vmlinux 0xa0ead17c	ide_pci_set_master
+EXPORT_SYMBOL_GPL vmlinux 0xa0fe3b89	trace_seq_printf
+EXPORT_SYMBOL_GPL vmlinux 0xa1125293	class_interface_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xa12bd892	setup_irq
+EXPORT_SYMBOL_GPL vmlinux 0xa1963924	inotify_dentry_parent_queue_event
+EXPORT_SYMBOL_GPL vmlinux 0xa1b0f8fb	gpiochip_add
+EXPORT_SYMBOL_GPL vmlinux 0xa258341a	devres_add
+EXPORT_SYMBOL_GPL vmlinux 0xa35461c2	shmem_file_setup
+EXPORT_SYMBOL_GPL vmlinux 0xa357d56e	ktime_get
+EXPORT_SYMBOL_GPL vmlinux 0xa35e61a6	__mnt_is_readonly
+EXPORT_SYMBOL_GPL vmlinux 0xa39d9220	unregister_timer_hook
+EXPORT_SYMBOL_GPL vmlinux 0xa3a2d9af	walk_system_ram_range
+EXPORT_SYMBOL_GPL vmlinux 0xa40a8590	input_event_to_user
+EXPORT_SYMBOL_GPL vmlinux 0xa41e0357	raw_seq_open
+EXPORT_SYMBOL_GPL vmlinux 0xa438fe1d	usb_string
+EXPORT_SYMBOL_GPL vmlinux 0xa456e88f	register_pernet_device
+EXPORT_SYMBOL_GPL vmlinux 0xa473a9ef	rtc_read_time
+EXPORT_SYMBOL_GPL vmlinux 0xa51d8823	__rtnl_link_register
+EXPORT_SYMBOL_GPL vmlinux 0xa523a2c7	hvc_poll
+EXPORT_SYMBOL_GPL vmlinux 0xa53c6a65	ata_qc_complete_multiple
+EXPORT_SYMBOL_GPL vmlinux 0xa59b5334	raw_seq_stop
+EXPORT_SYMBOL_GPL vmlinux 0xa5a63661	debugfs_create_bool
+EXPORT_SYMBOL_GPL vmlinux 0xa5b17270	relay_flush
+EXPORT_SYMBOL_GPL vmlinux 0xa5bf5c3e	pm_qos_add_requirement
+EXPORT_SYMBOL_GPL vmlinux 0xa5c36cec	inotify_unmount_inodes
+EXPORT_SYMBOL_GPL vmlinux 0xa5efbf4c	async_synchronize_full
+EXPORT_SYMBOL_GPL vmlinux 0xa5f42609	ata_pci_device_do_resume
+EXPORT_SYMBOL_GPL vmlinux 0xa636f874	__cpufreq_driver_target
+EXPORT_SYMBOL_GPL vmlinux 0xa6944cda	__srcu_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xa6b69c87	of_irq_map_pci
+EXPORT_SYMBOL_GPL vmlinux 0xa6c2ae94	ide_init_pc
+EXPORT_SYMBOL_GPL vmlinux 0xa6d47255	device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xa6f88e6c	scsi_flush_work
+EXPORT_SYMBOL_GPL vmlinux 0xa7214fcc	device_initialize
+EXPORT_SYMBOL_GPL vmlinux 0xa81fe005	ata_pci_device_do_suspend
+EXPORT_SYMBOL_GPL vmlinux 0xa8431368	__i2c_board_lock
+EXPORT_SYMBOL_GPL vmlinux 0xa85d4ce0	ip_local_out
+EXPORT_SYMBOL_GPL vmlinux 0xa86639c0	attribute_container_register
+EXPORT_SYMBOL_GPL vmlinux 0xa8b4a17c	ide_build_dmatable
+EXPORT_SYMBOL_GPL vmlinux 0xa8bf5bb3	unregister_kretprobes
+EXPORT_SYMBOL_GPL vmlinux 0xa8f59416	gpio_direction_output
+EXPORT_SYMBOL_GPL vmlinux 0xa90c8f8b	sata_link_debounce
+EXPORT_SYMBOL_GPL vmlinux 0xa94949f7	put_driver
+EXPORT_SYMBOL_GPL vmlinux 0xa992248d	put_pid
+EXPORT_SYMBOL_GPL vmlinux 0xa9c530b8	unregister_oom_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xaa270cac	usb_hcd_pci_shutdown
+EXPORT_SYMBOL_GPL vmlinux 0xaa2a72bf	__iowrite64_copy
+EXPORT_SYMBOL_GPL vmlinux 0xaa5310f9	__tracepoint_napi_poll
+EXPORT_SYMBOL_GPL vmlinux 0xaa8c4696	cpu_clock
+EXPORT_SYMBOL_GPL vmlinux 0xaafc094d	rtc_class_open
+EXPORT_SYMBOL_GPL vmlinux 0xab385132	fib_rules_cleanup_ops
+EXPORT_SYMBOL_GPL vmlinux 0xab54d9e0	fib_rules_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xab57e311	tracepoint_probe_register
+EXPORT_SYMBOL_GPL vmlinux 0xab902f82	devres_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xaba3ae72	ide_set_dma_mode
+EXPORT_SYMBOL_GPL vmlinux 0xabadaf21	ata_wait_after_reset
+EXPORT_SYMBOL_GPL vmlinux 0xabe78a1b	of_irq_map_raw
+EXPORT_SYMBOL_GPL vmlinux 0xac09ded7	spi_sync
+EXPORT_SYMBOL_GPL vmlinux 0xac1a4519	ata_sff_port_start32
+EXPORT_SYMBOL_GPL vmlinux 0xac1e5ec6	__pm_runtime_get
+EXPORT_SYMBOL_GPL vmlinux 0xacc17371	__pci_complete_power_transition
+EXPORT_SYMBOL_GPL vmlinux 0xacd5bfda	i2c_unregister_device
+EXPORT_SYMBOL_GPL vmlinux 0xace5c0fc	usb_bus_list
+EXPORT_SYMBOL_GPL vmlinux 0xacf54980	cpu_add_sysdev_attr_group
+EXPORT_SYMBOL_GPL vmlinux 0xad8208ee	ata_port_schedule_eh
+EXPORT_SYMBOL_GPL vmlinux 0xadad065c	kallsyms_on_each_symbol
+EXPORT_SYMBOL_GPL vmlinux 0xae0c87ee	pm_qos_remove_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xae2e2eb7	crypto_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0xae421bf2	dm_dispatch_request
+EXPORT_SYMBOL_GPL vmlinux 0xae64c945	scsi_target_unblock
+EXPORT_SYMBOL_GPL vmlinux 0xaea685c4	vfs_setxattr
+EXPORT_SYMBOL_GPL vmlinux 0xaec7cf37	queue_delayed_work_on
+EXPORT_SYMBOL_GPL vmlinux 0xaef0d88c	usb_lock_device_for_reset
+EXPORT_SYMBOL_GPL vmlinux 0xaf0e4266	fs_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xaf1c9626	ide_dma_host_set
+EXPORT_SYMBOL_GPL vmlinux 0xaf3f6fe0	ata_sff_interrupt
+EXPORT_SYMBOL_GPL vmlinux 0xaf695bbf	ata_sff_freeze
+EXPORT_SYMBOL_GPL vmlinux 0xafb9c5ec	pmac_backlight
+EXPORT_SYMBOL_GPL vmlinux 0xafcb62b6	blk_rq_err_bytes
+EXPORT_SYMBOL_GPL vmlinux 0xb024071a	ide_port_unregister_devices
+EXPORT_SYMBOL_GPL vmlinux 0xb03f644f	da903x_write
+EXPORT_SYMBOL_GPL vmlinux 0xb061d127	regulator_get_mode
+EXPORT_SYMBOL_GPL vmlinux 0xb0749af3	crypto_unregister_shash
+EXPORT_SYMBOL_GPL vmlinux 0xb074b347	eventfd_ctx_fileget
+EXPORT_SYMBOL_GPL vmlinux 0xb096dc53	usb_set_device_state
+EXPORT_SYMBOL_GPL vmlinux 0xb0aa812e	fips_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xb0b84eda	regulator_count_voltages
+EXPORT_SYMBOL_GPL vmlinux 0xb0db11fe	rt_mutex_unlock
+EXPORT_SYMBOL_GPL vmlinux 0xb0dfc9a3	ring_buffer_iter_peek
+EXPORT_SYMBOL_GPL vmlinux 0xb0f36f15	set_task_ioprio
+EXPORT_SYMBOL_GPL vmlinux 0xb10adc73	disk_part_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0xb1561942	__pm_runtime_set_status
+EXPORT_SYMBOL_GPL vmlinux 0xb1788dd7	__fsnotify_inode_delete
+EXPORT_SYMBOL_GPL vmlinux 0xb18426b0	debugfs_create_x8
+EXPORT_SYMBOL_GPL vmlinux 0xb18429eb	suspend_device_irqs
+EXPORT_SYMBOL_GPL vmlinux 0xb1acbcce	rcu_barrier_sched
+EXPORT_SYMBOL_GPL vmlinux 0xb25875f0	pmac_i2c_get_channel
+EXPORT_SYMBOL_GPL vmlinux 0xb261ce36	ata_port_disable
+EXPORT_SYMBOL_GPL vmlinux 0xb28461bb	class_dev_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0xb31e4f3f	ata_std_bios_param
+EXPORT_SYMBOL_GPL vmlinux 0xb32a9c3f	transport_add_device
+EXPORT_SYMBOL_GPL vmlinux 0xb337e335	eventfd_ctx_fdget
+EXPORT_SYMBOL_GPL vmlinux 0xb338f1fd	ring_buffer_peek
+EXPORT_SYMBOL_GPL vmlinux 0xb33b03d1	fuse_request_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xb342328d	__sock_recv_timestamp
+EXPORT_SYMBOL_GPL vmlinux 0xb3747cfe	tty_ldisc_flush
+EXPORT_SYMBOL_GPL vmlinux 0xb3e854c9	proc_net_mkdir
+EXPORT_SYMBOL_GPL vmlinux 0xb42b1f0f	spi_write_then_read
+EXPORT_SYMBOL_GPL vmlinux 0xb4432b8c	device_del
+EXPORT_SYMBOL_GPL vmlinux 0xb4686f28	ide_host_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xb47b678f	usb_hcd_link_urb_to_ep
+EXPORT_SYMBOL_GPL vmlinux 0xb493fdc5	simple_attr_open
+EXPORT_SYMBOL_GPL vmlinux 0xb49c1b58	crypto_alloc_instance2
+EXPORT_SYMBOL_GPL vmlinux 0xb51dba6b	led_trigger_register_simple
+EXPORT_SYMBOL_GPL vmlinux 0xb51fbd64	edac_op_state
+EXPORT_SYMBOL_GPL vmlinux 0xb5551294	srcu_read_lock
+EXPORT_SYMBOL_GPL vmlinux 0xb5556e5c	sysdev_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xb58dcfa2	synchronize_sched_expedited
+EXPORT_SYMBOL_GPL vmlinux 0xb5bdd5ad	tcp_slow_start
+EXPORT_SYMBOL_GPL vmlinux 0xb5d542fd	rtc_irq_register
+EXPORT_SYMBOL_GPL vmlinux 0xb5dacf0d	unregister_net_sysctl_table
+EXPORT_SYMBOL_GPL vmlinux 0xb5dd6e3c	fuse_conn_kill
+EXPORT_SYMBOL_GPL vmlinux 0xb5ecc729	sata_link_hardreset
+EXPORT_SYMBOL_GPL vmlinux 0xb5fc5e8d	power_supply_get_by_name
+EXPORT_SYMBOL_GPL vmlinux 0xb62bac2a	ata_sff_prereset
+EXPORT_SYMBOL_GPL vmlinux 0xb638443d	rtnl_link_register
+EXPORT_SYMBOL_GPL vmlinux 0xb64e2be5	debugfs_create_u32
+EXPORT_SYMBOL_GPL vmlinux 0xb65091b3	selinux_secmark_refcount_dec
+EXPORT_SYMBOL_GPL vmlinux 0xb658d7e8	da903x_set_bits
+EXPORT_SYMBOL_GPL vmlinux 0xb6aeb661	ata_id_c_string
+EXPORT_SYMBOL_GPL vmlinux 0xb6e81ee9	root_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xb7165f2d	ide_pio_bytes
+EXPORT_SYMBOL_GPL vmlinux 0xb71ced33	inotify_rm_watch
+EXPORT_SYMBOL_GPL vmlinux 0xb744fa43	xfrm_ealg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0xb75adf3c	__set_irq_handler
+EXPORT_SYMBOL_GPL vmlinux 0xb7b040ee	kobject_init_and_add
+EXPORT_SYMBOL_GPL vmlinux 0xb7c174ec	dm_send_uevents
+EXPORT_SYMBOL_GPL vmlinux 0xb7e1ee6e	crypto_grab_aead
+EXPORT_SYMBOL_GPL vmlinux 0xb7ee52bd	skb_icv_walk
+EXPORT_SYMBOL_GPL vmlinux 0xb80951f6	ring_buffer_record_enable
+EXPORT_SYMBOL_GPL vmlinux 0xb84702a5	device_find_child
+EXPORT_SYMBOL_GPL vmlinux 0xb86ffc62	devm_kzalloc
+EXPORT_SYMBOL_GPL vmlinux 0xb8795c55	__scsi_get_command
+EXPORT_SYMBOL_GPL vmlinux 0xb889dbc7	usb_add_hcd
+EXPORT_SYMBOL_GPL vmlinux 0xb9210081	ata_scsi_queuecmd
+EXPORT_SYMBOL_GPL vmlinux 0xb988671d	ata_sff_dma_pause
+EXPORT_SYMBOL_GPL vmlinux 0xb99f41e3	do_add_mount
+EXPORT_SYMBOL_GPL vmlinux 0xb9eb3aa9	add_uevent_var
+EXPORT_SYMBOL_GPL vmlinux 0xb9f1e294	get_task_mm
+EXPORT_SYMBOL_GPL vmlinux 0xba2e75b0	queue_delayed_work
+EXPORT_SYMBOL_GPL vmlinux 0xba41bb42	inet_csk_bind_conflict
+EXPORT_SYMBOL_GPL vmlinux 0xba719bb9	task_active_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0xba7ade4c	nf_unregister_queue_handlers
+EXPORT_SYMBOL_GPL vmlinux 0xbab7eae6	register_kprobes
+EXPORT_SYMBOL_GPL vmlinux 0xbae34c27	scsi_nl_remove_transport
+EXPORT_SYMBOL_GPL vmlinux 0xbb479da6	sysdev_driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xbbc70ce2	vfs_lock_file
+EXPORT_SYMBOL_GPL vmlinux 0xbc73915b	transport_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xbd2d698d	pm_request_idle
+EXPORT_SYMBOL_GPL vmlinux 0xbda4d568	ring_buffer_iter_reset
+EXPORT_SYMBOL_GPL vmlinux 0xbda6261c	each_symbol
+EXPORT_SYMBOL_GPL vmlinux 0xbdbb17dd	usb_get_hcd
+EXPORT_SYMBOL_GPL vmlinux 0xbdc3e207	pci_reset_function
+EXPORT_SYMBOL_GPL vmlinux 0xbdd295f0	trace_vprintk
+EXPORT_SYMBOL_GPL vmlinux 0xbdd93408	ata_std_prereset
+EXPORT_SYMBOL_GPL vmlinux 0xbdf562f3	ata_pci_device_suspend
+EXPORT_SYMBOL_GPL vmlinux 0xbdf88fc9	free_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0xbe09b5f8	usb_hcd_check_unlink_urb
+EXPORT_SYMBOL_GPL vmlinux 0xbe116723	do_posix_clock_nosettime
+EXPORT_SYMBOL_GPL vmlinux 0xbe1887e4	ata_unpack_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0xbe611de0	pm_runtime_resume
+EXPORT_SYMBOL_GPL vmlinux 0xbe9cfb4b	usb_ifnum_to_if
+EXPORT_SYMBOL_GPL vmlinux 0xbeccbf38	ata_sff_data_xfer
+EXPORT_SYMBOL_GPL vmlinux 0xbed16a6e	blocking_notifier_chain_cond_register
+EXPORT_SYMBOL_GPL vmlinux 0xbee8ea7e	ata_host_start
+EXPORT_SYMBOL_GPL vmlinux 0xbf13c109	tty_put_char
+EXPORT_SYMBOL_GPL vmlinux 0xbf1cc04b	tty_termios_encode_baud_rate
+EXPORT_SYMBOL_GPL vmlinux 0xbf23dbcf	of_scan_bus
+EXPORT_SYMBOL_GPL vmlinux 0xbf85dbda	ide_unregister_region
+EXPORT_SYMBOL_GPL vmlinux 0xbfbdbd92	usb_hcd_unlink_urb_from_ep
+EXPORT_SYMBOL_GPL vmlinux 0xc0044290	raw_unhash_sk
+EXPORT_SYMBOL_GPL vmlinux 0xc01c17ed	vfs_test_lock
+EXPORT_SYMBOL_GPL vmlinux 0xc02b81f6	inotify_init_watch
+EXPORT_SYMBOL_GPL vmlinux 0xc0d2094e	save_stack_trace_tsk
+EXPORT_SYMBOL_GPL vmlinux 0xc0e421cb	inet_twsk_put
+EXPORT_SYMBOL_GPL vmlinux 0xc1106ab3	map_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0xc126e890	klist_del
+EXPORT_SYMBOL_GPL vmlinux 0xc12f7e0d	trace_profile_buf_nmi
+EXPORT_SYMBOL_GPL vmlinux 0xc1634ef9	shash_free_instance
+EXPORT_SYMBOL_GPL vmlinux 0xc17515d7	usb_hcds_loaded
+EXPORT_SYMBOL_GPL vmlinux 0xc1f1c582	crypto_mod_get
+EXPORT_SYMBOL_GPL vmlinux 0xc1f421f7	ring_buffer_alloc_read_page
+EXPORT_SYMBOL_GPL vmlinux 0xc201720b	ata_sff_lost_interrupt
+EXPORT_SYMBOL_GPL vmlinux 0xc22a3091	vm_unmap_aliases
+EXPORT_SYMBOL_GPL vmlinux 0xc24188ec	kobject_uevent
+EXPORT_SYMBOL_GPL vmlinux 0xc24a0755	xfrm_audit_state_replay_overflow
+EXPORT_SYMBOL_GPL vmlinux 0xc26cc5c3	debugfs_create_u8
+EXPORT_SYMBOL_GPL vmlinux 0xc270778c	hrtimer_cancel
+EXPORT_SYMBOL_GPL vmlinux 0xc288eefe	usb_poison_urb
+EXPORT_SYMBOL_GPL vmlinux 0xc2bc7fae	ata_std_qc_defer
+EXPORT_SYMBOL_GPL vmlinux 0xc2c9bd4d	usb_buffer_map_sg
+EXPORT_SYMBOL_GPL vmlinux 0xc3301f02	rcu_expedited_torture_stats
+EXPORT_SYMBOL_GPL vmlinux 0xc34e8544	queue_work
+EXPORT_SYMBOL_GPL vmlinux 0xc34efe27	snmp_fold_field
+EXPORT_SYMBOL_GPL vmlinux 0xc3755f5a	ide_setup_pci_noise
+EXPORT_SYMBOL_GPL vmlinux 0xc3863d94	blkcipher_walk_virt
+EXPORT_SYMBOL_GPL vmlinux 0xc399468f	scsi_nl_remove_driver
+EXPORT_SYMBOL_GPL vmlinux 0xc3a9da5d	fuse_abort_conn
+EXPORT_SYMBOL_GPL vmlinux 0xc3d9bf9f	irq_find_host
+EXPORT_SYMBOL_GPL vmlinux 0xc419abb2	regulator_put
+EXPORT_SYMBOL_GPL vmlinux 0xc425c297	ide_port_scan
+EXPORT_SYMBOL_GPL vmlinux 0xc428068d	sata_deb_timing_long
+EXPORT_SYMBOL_GPL vmlinux 0xc4547f3c	crypto_givcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0xc46d877e	schedule_hrtimeout
+EXPORT_SYMBOL_GPL vmlinux 0xc48b7ccf	ata_mode_string
+EXPORT_SYMBOL_GPL vmlinux 0xc4b33aa6	tracepoint_probe_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xc4c259b2	device_create_vargs
+EXPORT_SYMBOL_GPL vmlinux 0xc4df9d18	__module_text_address
+EXPORT_SYMBOL_GPL vmlinux 0xc4f570ad	kick_process
+EXPORT_SYMBOL_GPL vmlinux 0xc5953788	pcie_port_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0xc5a79fab	unregister_jprobes
+EXPORT_SYMBOL_GPL vmlinux 0xc5bd11bb	get_cpu_sysdev
+EXPORT_SYMBOL_GPL vmlinux 0xc5cfd2fd	fuse_conn_init
+EXPORT_SYMBOL_GPL vmlinux 0xc606cd3c	boot_cpuid
+EXPORT_SYMBOL_GPL vmlinux 0xc60f75ec	__ftrace_vprintk
+EXPORT_SYMBOL_GPL vmlinux 0xc6194aff	ata_pci_remove_one
+EXPORT_SYMBOL_GPL vmlinux 0xc61d03e8	spi_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0xc6256f9b	cpufreq_driver_target
+EXPORT_SYMBOL_GPL vmlinux 0xc673e23e	ata_scsi_change_queue_depth
+EXPORT_SYMBOL_GPL vmlinux 0xc6832df1	ring_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0xc6cea8b6	ide_queue_pc_tail
+EXPORT_SYMBOL_GPL vmlinux 0xc6f947cc	pm_runtime_suspend
+EXPORT_SYMBOL_GPL vmlinux 0xc70637fa	sysdev_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xc7080b41	blk_rq_prep_clone
+EXPORT_SYMBOL_GPL vmlinux 0xc735e42d	crypto_nivaead_type
+EXPORT_SYMBOL_GPL vmlinux 0xc79103d7	crypto_larval_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xc7a9a90b	ata_dev_disable
+EXPORT_SYMBOL_GPL vmlinux 0xc8487372	ide_cd_expiry
+EXPORT_SYMBOL_GPL vmlinux 0xc8823c30	pci_rescan_bus
+EXPORT_SYMBOL_GPL vmlinux 0xc888d999	ide_dma_setup
+EXPORT_SYMBOL_GPL vmlinux 0xc8b94de7	rtc_update_irq_enable
+EXPORT_SYMBOL_GPL vmlinux 0xc8c99059	ring_buffer_record_disable
+EXPORT_SYMBOL_GPL vmlinux 0xc91962ee	find_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0xc93d3800	hvc_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xc95495c8	ahash_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0xc9561772	fb_destroy_modelist
+EXPORT_SYMBOL_GPL vmlinux 0xc9abe502	fuse_direct_io
+EXPORT_SYMBOL_GPL vmlinux 0xc9ec4e21	free_percpu
+EXPORT_SYMBOL_GPL vmlinux 0xca0aba44	ide_prep_sense
+EXPORT_SYMBOL_GPL vmlinux 0xca32a2aa	ide_timing_merge
+EXPORT_SYMBOL_GPL vmlinux 0xca462b6e	debugfs_create_symlink
+EXPORT_SYMBOL_GPL vmlinux 0xca526234	ata_bmdma_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0xca558bf7	ata_link_offline
+EXPORT_SYMBOL_GPL vmlinux 0xca5ba081	crypto_rng_type
+EXPORT_SYMBOL_GPL vmlinux 0xca846263	inet6_lookup_listener
+EXPORT_SYMBOL_GPL vmlinux 0xca85d8cf	tracepoint_probe_update_all
+EXPORT_SYMBOL_GPL vmlinux 0xca89a9ac	invalidate_inode_pages2
+EXPORT_SYMBOL_GPL vmlinux 0xcac48f11	tracepoint_iter_stop
+EXPORT_SYMBOL_GPL vmlinux 0xcaf79c7b	tty_prepare_flip_string_flags
+EXPORT_SYMBOL_GPL vmlinux 0xcafba3c2	sysfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xcb800a57	aead_geniv_init
+EXPORT_SYMBOL_GPL vmlinux 0xcbb206a1	regulator_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xcbca1a6f	ata_bmdma_start
+EXPORT_SYMBOL_GPL vmlinux 0xcbd378f1	usb_store_new_id
+EXPORT_SYMBOL_GPL vmlinux 0xcbe32234	platform_device_add_data
+EXPORT_SYMBOL_GPL vmlinux 0xcbe988f4	posix_timer_event
+EXPORT_SYMBOL_GPL vmlinux 0xcc1110dd	__pm_runtime_disable
+EXPORT_SYMBOL_GPL vmlinux 0xcc129b87	regulator_bulk_free
+EXPORT_SYMBOL_GPL vmlinux 0xcc1f1c3d	inet_twdr_hangman
+EXPORT_SYMBOL_GPL vmlinux 0xcc246ea6	ata_pci_sff_prepare_host
+EXPORT_SYMBOL_GPL vmlinux 0xcc4f15a5	debugfs_remove
+EXPORT_SYMBOL_GPL vmlinux 0xcc7a2564	usb_anchor_empty
+EXPORT_SYMBOL_GPL vmlinux 0xcc7af6b7	dm_noflush_suspending
+EXPORT_SYMBOL_GPL vmlinux 0xcccfb2fa	sata_deb_timing_hotplug
+EXPORT_SYMBOL_GPL vmlinux 0xcd3a7b3b	skb_partial_csum_set
+EXPORT_SYMBOL_GPL vmlinux 0xcd41d931	xfrm_audit_state_notfound_simple
+EXPORT_SYMBOL_GPL vmlinux 0xcd7cc20e	ata_sff_softreset
+EXPORT_SYMBOL_GPL vmlinux 0xcdab5ee6	sysfs_schedule_callback
+EXPORT_SYMBOL_GPL vmlinux 0xcdb01877	ktime_add_ns
+EXPORT_SYMBOL_GPL vmlinux 0xcdb5ff3e	__blk_put_request
+EXPORT_SYMBOL_GPL vmlinux 0xcdca3691	nr_irqs
+EXPORT_SYMBOL_GPL vmlinux 0xce4052a7	page_cache_sync_readahead
+EXPORT_SYMBOL_GPL vmlinux 0xcea17dc1	ata_port_start
+EXPORT_SYMBOL_GPL vmlinux 0xcef7fdc7	fib_rules_register
+EXPORT_SYMBOL_GPL vmlinux 0xcf1c648c	register_ftrace_event
+EXPORT_SYMBOL_GPL vmlinux 0xcf8af983	trace_profile_buf
+EXPORT_SYMBOL_GPL vmlinux 0xcfa47a4e	blk_queue_dma_drain
+EXPORT_SYMBOL_GPL vmlinux 0xcfc68341	synchronize_rcu_bh
+EXPORT_SYMBOL_GPL vmlinux 0xcfcc83ad	register_vt_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xcfdb4755	bus_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xd03b38b6	class_for_each_device
+EXPORT_SYMBOL_GPL vmlinux 0xd03c7700	secure_ipv4_port_ephemeral
+EXPORT_SYMBOL_GPL vmlinux 0xd09287a6	inet_twsk_purge
+EXPORT_SYMBOL_GPL vmlinux 0xd09c0497	crypto_alg_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xd0a1965a	inet_csk_reqsk_queue_hash_add
+EXPORT_SYMBOL_GPL vmlinux 0xd0c05159	emergency_restart
+EXPORT_SYMBOL_GPL vmlinux 0xd0f2fb2c	klist_next
+EXPORT_SYMBOL_GPL vmlinux 0xd10fef21	of_address_to_resource
+EXPORT_SYMBOL_GPL vmlinux 0xd13d69a8	register_pernet_subsys
+EXPORT_SYMBOL_GPL vmlinux 0xd16712f3	crypto_check_attr_type
+EXPORT_SYMBOL_GPL vmlinux 0xd18a97e6	spi_alloc_master
+EXPORT_SYMBOL_GPL vmlinux 0xd1bcdd42	ata_cable_unknown
+EXPORT_SYMBOL_GPL vmlinux 0xd1d8adad	atomic_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xd1ef4cc5	ata_eh_qc_complete
+EXPORT_SYMBOL_GPL vmlinux 0xd20bb44f	irq_find_mapping
+EXPORT_SYMBOL_GPL vmlinux 0xd217cc38	cpufreq_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0xd273b1b1	__round_jiffies_up_relative
+EXPORT_SYMBOL_GPL vmlinux 0xd2a8caf0	work_on_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xd2b9a406	file_ra_state_init
+EXPORT_SYMBOL_GPL vmlinux 0xd2fd61a1	fsstack_copy_inode_size
+EXPORT_SYMBOL_GPL vmlinux 0xd338b729	ring_buffer_consume
+EXPORT_SYMBOL_GPL vmlinux 0xd33c2f8e	usb_autopm_get_interface
+EXPORT_SYMBOL_GPL vmlinux 0xd360609a	elv_register
+EXPORT_SYMBOL_GPL vmlinux 0xd3df2c4f	__module_address
+EXPORT_SYMBOL_GPL vmlinux 0xd3f7b2f5	sata_scr_valid
+EXPORT_SYMBOL_GPL vmlinux 0xd4675b07	sata_sff_hardreset
+EXPORT_SYMBOL_GPL vmlinux 0xd4756523	driver_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0xd4acad06	ata_scsi_simulate
+EXPORT_SYMBOL_GPL vmlinux 0xd4b8c665	usb_sg_init
+EXPORT_SYMBOL_GPL vmlinux 0xd4fe542d	ide_error
+EXPORT_SYMBOL_GPL vmlinux 0xd556b5bc	sysfs_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0xd56f30e2	__crypto_alloc_tfm
+EXPORT_SYMBOL_GPL vmlinux 0xd5b6c59c	crypto_find_alg
+EXPORT_SYMBOL_GPL vmlinux 0xd5bbba27	hrtimer_forward
+EXPORT_SYMBOL_GPL vmlinux 0xd5c12b24	transport_setup_device
+EXPORT_SYMBOL_GPL vmlinux 0xd5ec06df	pmac_i2c_setmode
+EXPORT_SYMBOL_GPL vmlinux 0xd66b1fd3	rt_mutex_lock_interruptible
+EXPORT_SYMBOL_GPL vmlinux 0xd6a7d5ce	unregister_pernet_gen_device
+EXPORT_SYMBOL_GPL vmlinux 0xd6d45d2e	usb_hcd_pci_pm_ops
+EXPORT_SYMBOL_GPL vmlinux 0xd6d787c5	check_media_bay_by_base
+EXPORT_SYMBOL_GPL vmlinux 0xd6f3ef62	crypto_init_spawn2
+EXPORT_SYMBOL_GPL vmlinux 0xd720348f	__class_create
+EXPORT_SYMBOL_GPL vmlinux 0xd730cb91	crypto_register_template
+EXPORT_SYMBOL_GPL vmlinux 0xd73ef534	sysdev_resume
+EXPORT_SYMBOL_GPL vmlinux 0xd768e985	regulator_has_full_constraints
+EXPORT_SYMBOL_GPL vmlinux 0xd77a5669	ata_sff_thaw
+EXPORT_SYMBOL_GPL vmlinux 0xd78a6b99	kobject_get_path
+EXPORT_SYMBOL_GPL vmlinux 0xd7bd65d2	hwmon_device_register
+EXPORT_SYMBOL_GPL vmlinux 0xd7d79132	put_online_cpus
+EXPORT_SYMBOL_GPL vmlinux 0xd8043c95	ide_read_altstatus
+EXPORT_SYMBOL_GPL vmlinux 0xd80a0900	ata_sas_port_stop
+EXPORT_SYMBOL_GPL vmlinux 0xd86e15ba	eventfd_signal
+EXPORT_SYMBOL_GPL vmlinux 0xd895f5e9	power_supply_class
+EXPORT_SYMBOL_GPL vmlinux 0xd89bc517	da903x_clr_bits
+EXPORT_SYMBOL_GPL vmlinux 0xd8b8121e	ata_sff_port_start
+EXPORT_SYMBOL_GPL vmlinux 0xd8d278be	ata_bmdma_status
+EXPORT_SYMBOL_GPL vmlinux 0xd9b44472	crypto_init_spawn
+EXPORT_SYMBOL_GPL vmlinux 0xd9e03161	single_release_net
+EXPORT_SYMBOL_GPL vmlinux 0xd9f0ebde	usb_reset_device
+EXPORT_SYMBOL_GPL vmlinux 0xda1b0bb0	power_supply_register
+EXPORT_SYMBOL_GPL vmlinux 0xda1be8e1	async_synchronize_cookie_domain
+EXPORT_SYMBOL_GPL vmlinux 0xda684d26	devres_release_group
+EXPORT_SYMBOL_GPL vmlinux 0xda71aa4e	ata_sff_tf_read
+EXPORT_SYMBOL_GPL vmlinux 0xdaaaba68	pci_bus_add_device
+EXPORT_SYMBOL_GPL vmlinux 0xdabc3797	fb_deferred_io_open
+EXPORT_SYMBOL_GPL vmlinux 0xdaed39b6	pm_runtime_barrier
+EXPORT_SYMBOL_GPL vmlinux 0xdaf406d1	inet6_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xdaf4dfb3	fb_mode_option
+EXPORT_SYMBOL_GPL vmlinux 0xdb274e52	monotonic_to_bootbased
+EXPORT_SYMBOL_GPL vmlinux 0xdb62ed06	get_driver
+EXPORT_SYMBOL_GPL vmlinux 0xdc07f8fe	atomic_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xdc3ed075	led_trigger_set
+EXPORT_SYMBOL_GPL vmlinux 0xdcaced20	sock_prot_inuse_add
+EXPORT_SYMBOL_GPL vmlinux 0xdcb0b1fb	ide_do_start_stop
+EXPORT_SYMBOL_GPL vmlinux 0xdd2a7097	device_register
+EXPORT_SYMBOL_GPL vmlinux 0xdd3c8e5d	dm_put
+EXPORT_SYMBOL_GPL vmlinux 0xdd407f43	crypto_ahash_final
+EXPORT_SYMBOL_GPL vmlinux 0xdd870456	crypto_spawn_tfm
+EXPORT_SYMBOL_GPL vmlinux 0xddba3c1b	ata_sff_qc_fill_rtf
+EXPORT_SYMBOL_GPL vmlinux 0xdde5f824	add_to_page_cache_lru
+EXPORT_SYMBOL_GPL vmlinux 0xde182f89	task_current_syscall
+EXPORT_SYMBOL_GPL vmlinux 0xde39d862	blk_trace_setup
+EXPORT_SYMBOL_GPL vmlinux 0xde417b81	async_schedule_domain
+EXPORT_SYMBOL_GPL vmlinux 0xdec01ab2	fb_deferred_io_init
+EXPORT_SYMBOL_GPL vmlinux 0xdee12df0	__class_register
+EXPORT_SYMBOL_GPL vmlinux 0xdeebba07	ide_host_register
+EXPORT_SYMBOL_GPL vmlinux 0xdf27877b	register_timer_hook
+EXPORT_SYMBOL_GPL vmlinux 0xdf9922d7	tcp_twsk_unique
+EXPORT_SYMBOL_GPL vmlinux 0xdfe6b550	crypto_alloc_aead
+EXPORT_SYMBOL_GPL vmlinux 0xe00f8ec2	ata_bmdma_stop
+EXPORT_SYMBOL_GPL vmlinux 0xe014a4d7	blk_queue_rq_timeout
+EXPORT_SYMBOL_GPL vmlinux 0xe03b8896	__ide_pci_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0xe07ca631	cpu_bit_bitmap
+EXPORT_SYMBOL_GPL vmlinux 0xe0993607	mnt_want_write
+EXPORT_SYMBOL_GPL vmlinux 0xe0b6fc87	sata_link_resume
+EXPORT_SYMBOL_GPL vmlinux 0xe0cca33e	xfrm_aead_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0xe0f437c8	raw_seq_next
+EXPORT_SYMBOL_GPL vmlinux 0xe1014031	pci_set_pcie_reset_state
+EXPORT_SYMBOL_GPL vmlinux 0xe12e254c	ata_sff_data_xfer_noirq
+EXPORT_SYMBOL_GPL vmlinux 0xe1315714	vfs_getxattr
+EXPORT_SYMBOL_GPL vmlinux 0xe131f61c	sysfs_put
+EXPORT_SYMBOL_GPL vmlinux 0xe1431c4d	usb_hub_clear_tt_buffer
+EXPORT_SYMBOL_GPL vmlinux 0xe16591ab	stop_machine
+EXPORT_SYMBOL_GPL vmlinux 0xe1ee82d9	of_irq_map_one
+EXPORT_SYMBOL_GPL vmlinux 0xe2228dff	sysdev_show_ulong
+EXPORT_SYMBOL_GPL vmlinux 0xe2527cf1	crypto_ahash_type
+EXPORT_SYMBOL_GPL vmlinux 0xe28648bb	srcu_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xe2919225	ata_bus_reset
+EXPORT_SYMBOL_GPL vmlinux 0xe2922b75	regulator_set_voltage
+EXPORT_SYMBOL_GPL vmlinux 0xe296ef2b	spi_alloc_device
+EXPORT_SYMBOL_GPL vmlinux 0xe32efb92	cpufreq_frequency_table_cpuinfo
+EXPORT_SYMBOL_GPL vmlinux 0xe39a601e	sata_pmp_qc_defer_cmd_switch
+EXPORT_SYMBOL_GPL vmlinux 0xe3bf57ae	__ata_ehi_push_desc
+EXPORT_SYMBOL_GPL vmlinux 0xe3e26cf5	__blk_end_request_err
+EXPORT_SYMBOL_GPL vmlinux 0xe442bd26	ata_sff_dumb_qc_prep
+EXPORT_SYMBOL_GPL vmlinux 0xe453b172	sysdev_driver_register
+EXPORT_SYMBOL_GPL vmlinux 0xe49ff3b0	ata_wait_register
+EXPORT_SYMBOL_GPL vmlinux 0xe4c1913d	rtc_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xe530071c	pm_qos_remove_requirement
+EXPORT_SYMBOL_GPL vmlinux 0xe53be9e6	da903x_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xe57f7567	pmf_call_function
+EXPORT_SYMBOL_GPL vmlinux 0xe591a991	crypto_dequeue_request
+EXPORT_SYMBOL_GPL vmlinux 0xe59502ad	br_fdb_test_addr_hook
+EXPORT_SYMBOL_GPL vmlinux 0xe595806c	ring_buffer_read
+EXPORT_SYMBOL_GPL vmlinux 0xe5bde1e4	usb_put_hcd
+EXPORT_SYMBOL_GPL vmlinux 0xe5ca35d6	platform_bus
+EXPORT_SYMBOL_GPL vmlinux 0xe62b04ce	get_dcookie
+EXPORT_SYMBOL_GPL vmlinux 0xe63d0aa0	bus_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xe6488b47	cpufreq_notify_transition
+EXPORT_SYMBOL_GPL vmlinux 0xe651f76e	selinux_is_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xe66363b0	platform_get_irq
+EXPORT_SYMBOL_GPL vmlinux 0xe685e310	inet_csk_addr2sockaddr
+EXPORT_SYMBOL_GPL vmlinux 0xe721f6fa	dm_path_uevent
+EXPORT_SYMBOL_GPL vmlinux 0xe74343f0	securityfs_create_dir
+EXPORT_SYMBOL_GPL vmlinux 0xe75d3483	usb_autopm_put_interface
+EXPORT_SYMBOL_GPL vmlinux 0xe7624542	device_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xe7b08068	usb_unpoison_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0xe7f74787	crypto_alloc_instance
+EXPORT_SYMBOL_GPL vmlinux 0xe7ffe877	pcpu_base_addr
+EXPORT_SYMBOL_GPL vmlinux 0xe862c4b7	dpm_suspend_start
+EXPORT_SYMBOL_GPL vmlinux 0xe87673ae	ata_eh_analyze_ncq_error
+EXPORT_SYMBOL_GPL vmlinux 0xe8a0fd9e	ring_buffer_entries_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xe901175f	__dev_addr_unsync
+EXPORT_SYMBOL_GPL vmlinux 0xe90828d1	__cpufreq_driver_getavg
+EXPORT_SYMBOL_GPL vmlinux 0xe90c178f	ata_sff_postreset
+EXPORT_SYMBOL_GPL vmlinux 0xe92f43d0	device_rename
+EXPORT_SYMBOL_GPL vmlinux 0xe92ff010	usb_hc_died
+EXPORT_SYMBOL_GPL vmlinux 0xe93e49c3	devres_free
+EXPORT_SYMBOL_GPL vmlinux 0xe9587909	usb_unregister_notify
+EXPORT_SYMBOL_GPL vmlinux 0xe98642e0	hwmon_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xe9ea1351	usb_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0xe9f0d1d6	fuse_do_open
+EXPORT_SYMBOL_GPL vmlinux 0xe9fca928	ide_cd_get_xferlen
+EXPORT_SYMBOL_GPL vmlinux 0xea065e01	task_handoff_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xea124bd1	gcd
+EXPORT_SYMBOL_GPL vmlinux 0xea418e0f	atapi_cmd_type
+EXPORT_SYMBOL_GPL vmlinux 0xea497f42	tcp_get_info
+EXPORT_SYMBOL_GPL vmlinux 0xea4c7a49	crypto_grab_skcipher
+EXPORT_SYMBOL_GPL vmlinux 0xea58d560	crypto_alloc_tfm
+EXPORT_SYMBOL_GPL vmlinux 0xea7cfbdb	register_pernet_gen_subsys
+EXPORT_SYMBOL_GPL vmlinux 0xeae74760	scsi_nl_send_transport_msg
+EXPORT_SYMBOL_GPL vmlinux 0xeb240a32	part_round_stats
+EXPORT_SYMBOL_GPL vmlinux 0xeb4c1fc8	__tracepoint_block_remap
+EXPORT_SYMBOL_GPL vmlinux 0xeb4c77c3	class_interface_register
+EXPORT_SYMBOL_GPL vmlinux 0xeb7ef7f7	bus_register
+EXPORT_SYMBOL_GPL vmlinux 0xeb96388c	usb_get_descriptor
+EXPORT_SYMBOL_GPL vmlinux 0xebd97b97	key_type_user
+EXPORT_SYMBOL_GPL vmlinux 0xec184057	inotify_remove_watch_locked
+EXPORT_SYMBOL_GPL vmlinux 0xec1a75a9	__dev_addr_sync
+EXPORT_SYMBOL_GPL vmlinux 0xec1b043e	regulator_suspend_prepare
+EXPORT_SYMBOL_GPL vmlinux 0xec8e64a9	ring_buffer_resize
+EXPORT_SYMBOL_GPL vmlinux 0xec9566dc	devres_open_group
+EXPORT_SYMBOL_GPL vmlinux 0xeca0fddc	ide_dev_select
+EXPORT_SYMBOL_GPL vmlinux 0xecccdb7b	ata_timing_compute
+EXPORT_SYMBOL_GPL vmlinux 0xecdac4a7	crypto_larval_kill
+EXPORT_SYMBOL_GPL vmlinux 0xecea75d0	enable_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0xed8d9334	regulator_register
+EXPORT_SYMBOL_GPL vmlinux 0xed9fdb24	tcp_reno_min_cwnd
+EXPORT_SYMBOL_GPL vmlinux 0xedc2994d	ktime_get_real
+EXPORT_SYMBOL_GPL vmlinux 0xede67e3d	hvc_instantiate
+EXPORT_SYMBOL_GPL vmlinux 0xede74815	atomic_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0xedeb3795	sched_setscheduler
+EXPORT_SYMBOL_GPL vmlinux 0xee4a9764	sysfs_update_group
+EXPORT_SYMBOL_GPL vmlinux 0xee96c218	ring_buffer_iter_empty
+EXPORT_SYMBOL_GPL vmlinux 0xeecac530	klist_add_tail
+EXPORT_SYMBOL_GPL vmlinux 0xeed1b796	page_mkclean
+EXPORT_SYMBOL_GPL vmlinux 0xeef6f064	dev_attr_unload_heads
+EXPORT_SYMBOL_GPL vmlinux 0xef12c978	gpiochip_remove
+EXPORT_SYMBOL_GPL vmlinux 0xef34610d	pmf_do_irq
+EXPORT_SYMBOL_GPL vmlinux 0xef59767c	__rtnl_link_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xef6c3f70	round_jiffies_up_relative
+EXPORT_SYMBOL_GPL vmlinux 0xef80e33e	pmf_do_functions
+EXPORT_SYMBOL_GPL vmlinux 0xef896f52	tcp_reno_ssthresh
+EXPORT_SYMBOL_GPL vmlinux 0xefa5f133	i2c_add_numbered_adapter
+EXPORT_SYMBOL_GPL vmlinux 0xefae4a30	da903x_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xefdd5a63	ktime_get_ts
+EXPORT_SYMBOL_GPL vmlinux 0xefe21106	snmp_mib_init
+EXPORT_SYMBOL_GPL vmlinux 0xefe5fdc8	ide_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0xf002c08a	usb_buffer_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xf014c815	zap_vma_ptes
+EXPORT_SYMBOL_GPL vmlinux 0xf01a2d9e	usb_debug_root
+EXPORT_SYMBOL_GPL vmlinux 0xf0241200	ahash_free_instance
+EXPORT_SYMBOL_GPL vmlinux 0xf07cce8e	ata_scsi_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xf0bfe979	usb_sg_cancel
+EXPORT_SYMBOL_GPL vmlinux 0xf0c37713	crypto_shash_finup
+EXPORT_SYMBOL_GPL vmlinux 0xf105d00d	ide_in_drive_list
+EXPORT_SYMBOL_GPL vmlinux 0xf112e550	nf_unregister_afinfo
+EXPORT_SYMBOL_GPL vmlinux 0xf13b3afd	ide_register_region
+EXPORT_SYMBOL_GPL vmlinux 0xf1463412	execute_in_process_context
+EXPORT_SYMBOL_GPL vmlinux 0xf184d189	kernel_power_off
+EXPORT_SYMBOL_GPL vmlinux 0xf1ab123f	proc_net_fops_create
+EXPORT_SYMBOL_GPL vmlinux 0xf1b5c0d0	netlink_has_listeners
+EXPORT_SYMBOL_GPL vmlinux 0xf1fdd100	crypto_shoot_alg
+EXPORT_SYMBOL_GPL vmlinux 0xf2201143	srcu_batches_completed
+EXPORT_SYMBOL_GPL vmlinux 0xf238301a	ring_buffer_empty_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xf23a9394	ata_sff_irq_clear
+EXPORT_SYMBOL_GPL vmlinux 0xf25d66ac	ata_sff_pause
+EXPORT_SYMBOL_GPL vmlinux 0xf2728169	fuse_file_poll
+EXPORT_SYMBOL_GPL vmlinux 0xf3466192	dev_attr_sw_activity
+EXPORT_SYMBOL_GPL vmlinux 0xf34806ec	hrtimer_get_res
+EXPORT_SYMBOL_GPL vmlinux 0xf3636b57	ide_set_pio
+EXPORT_SYMBOL_GPL vmlinux 0xf3a2c3ac	ide_intr
+EXPORT_SYMBOL_GPL vmlinux 0xf3c35061	dm_device_name
+EXPORT_SYMBOL_GPL vmlinux 0xf4099c86	crypto_ahash_digest
+EXPORT_SYMBOL_GPL vmlinux 0xf4488540	__wake_up_sync
+EXPORT_SYMBOL_GPL vmlinux 0xf44e1ba4	seq_release_net
+EXPORT_SYMBOL_GPL vmlinux 0xf46d3493	pci_intx
+EXPORT_SYMBOL_GPL vmlinux 0xf4818723	usb_buffer_unmap_sg
+EXPORT_SYMBOL_GPL vmlinux 0xf499fdb2	rcu_barrier_bh
+EXPORT_SYMBOL_GPL vmlinux 0xf4efdf5e	usb_autopm_set_interface
+EXPORT_SYMBOL_GPL vmlinux 0xf5384ac1	__trace_printk
+EXPORT_SYMBOL_GPL vmlinux 0xf547cec1	tcp_is_cwnd_limited
+EXPORT_SYMBOL_GPL vmlinux 0xf54bd49b	lcm
+EXPORT_SYMBOL_GPL vmlinux 0xf576609c	ata_host_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xf5799f7a	stop_machine_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xf57fc87f	pmac_i2c_xfer
+EXPORT_SYMBOL_GPL vmlinux 0xf59f8737	ide_setting_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xf5a691cd	invalidate_bh_lrus
+EXPORT_SYMBOL_GPL vmlinux 0xf5d27f32	da903x_writes
+EXPORT_SYMBOL_GPL vmlinux 0xf5f2ae9a	usb_match_one_id
+EXPORT_SYMBOL_GPL vmlinux 0xf635bf7c	rtnl_kill_links
+EXPORT_SYMBOL_GPL vmlinux 0xf655fa31	pci_restore_msi_state
+EXPORT_SYMBOL_GPL vmlinux 0xf6a50e5b	rtc_irq_set_freq
+EXPORT_SYMBOL_GPL vmlinux 0xf6baf792	scatterwalk_map
+EXPORT_SYMBOL_GPL vmlinux 0xf6bcbd73	hwrng_register
+EXPORT_SYMBOL_GPL vmlinux 0xf6c66f85	uhci_check_and_reset_hc
+EXPORT_SYMBOL_GPL vmlinux 0xf6c9d9b8	clockevents_register_device
+EXPORT_SYMBOL_GPL vmlinux 0xf6e874f5	ata_timing_merge
+EXPORT_SYMBOL_GPL vmlinux 0xf75b0f79	usb_buffer_free
+EXPORT_SYMBOL_GPL vmlinux 0xf77143eb	sata_scr_write_flush
+EXPORT_SYMBOL_GPL vmlinux 0xf79f99df	ata_base_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0xf7aa1cb8	firmware_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xf7b87f04	bus_for_each_drv
+EXPORT_SYMBOL_GPL vmlinux 0xf7d67077	blk_rq_check_limits
+EXPORT_SYMBOL_GPL vmlinux 0xf7e9ceca	usb_scuttle_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0xf7fad53e	usb_unlink_urb
+EXPORT_SYMBOL_GPL vmlinux 0xf820cc8e	__blocking_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xf8245840	ide_host_add
+EXPORT_SYMBOL_GPL vmlinux 0xf8302725	ata_host_suspend
+EXPORT_SYMBOL_GPL vmlinux 0xf841293b	relay_open
+EXPORT_SYMBOL_GPL vmlinux 0xf84e00ec	regulator_get
+EXPORT_SYMBOL_GPL vmlinux 0xf858a4f3	security_inode_create
+EXPORT_SYMBOL_GPL vmlinux 0xf863e82a	flush_work
+EXPORT_SYMBOL_GPL vmlinux 0xf8802492	print_stack_trace
+EXPORT_SYMBOL_GPL vmlinux 0xf89aed22	crypto_ablkcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0xf89bd839	usb_ep0_reinit
+EXPORT_SYMBOL_GPL vmlinux 0xf8d1b822	debugfs_create_u16
+EXPORT_SYMBOL_GPL vmlinux 0xf8e04795	pci_cleanup_aer_uncorrect_error_status
+EXPORT_SYMBOL_GPL vmlinux 0xf8f3a0fb	ata_ratelimit
+EXPORT_SYMBOL_GPL vmlinux 0xf95724c3	pci_find_next_capability
+EXPORT_SYMBOL_GPL vmlinux 0xf95bb431	blocking_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xf9a054b5	__round_jiffies
+EXPORT_SYMBOL_GPL vmlinux 0xf9ca3160	ata_id_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0xf9d2d8cc	sysdev_class_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0xf9da06a6	inet6_hash_connect
+EXPORT_SYMBOL_GPL vmlinux 0xf9e69e04	get_inotify_watch
+EXPORT_SYMBOL_GPL vmlinux 0xfa509602	rt_mutex_lock
+EXPORT_SYMBOL_GPL vmlinux 0xfab81182	ide_pci_init_two
+EXPORT_SYMBOL_GPL vmlinux 0xfae96de1	klist_iter_init_node
+EXPORT_SYMBOL_GPL vmlinux 0xfaf75c9f	ata_dummy_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0xfb33febd	irq_of_parse_and_map
+EXPORT_SYMBOL_GPL vmlinux 0xfb53cd15	sysfs_create_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0xfb5b0956	ata_link_abort
+EXPORT_SYMBOL_GPL vmlinux 0xfb644ece	user_match
+EXPORT_SYMBOL_GPL vmlinux 0xfb8eea60	generic_fh_to_parent
+EXPORT_SYMBOL_GPL vmlinux 0xfbd3c36a	ide_set_media_lock
+EXPORT_SYMBOL_GPL vmlinux 0xfbf9be5d	register_oom_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xfc0d85e9	bus_rescan_devices
+EXPORT_SYMBOL_GPL vmlinux 0xfc6b0998	regulator_get_voltage
+EXPORT_SYMBOL_GPL vmlinux 0xfcca8869	ide_dma_sff_timer_expiry
+EXPORT_SYMBOL_GPL vmlinux 0xfcfa6d98	usb_match_id
+EXPORT_SYMBOL_GPL vmlinux 0xfd38234c	scatterwalk_copychunks
+EXPORT_SYMBOL_GPL vmlinux 0xfd6b4931	ata_port_freeze
+EXPORT_SYMBOL_GPL vmlinux 0xfd72e631	ata_eh_qc_retry
+EXPORT_SYMBOL_GPL vmlinux 0xfd95d6e8	ata_bmdma_setup
+EXPORT_SYMBOL_GPL vmlinux 0xfdaa8a93	ata_link_next
+EXPORT_SYMBOL_GPL vmlinux 0xfdaeec86	__hvc_resize
+EXPORT_SYMBOL_GPL vmlinux 0xfdc99c36	device_for_each_child
+EXPORT_SYMBOL_GPL vmlinux 0xfde0b92c	crypto_larval_error
+EXPORT_SYMBOL_GPL vmlinux 0xfe0e3ad0	cpufreq_unregister_governor
+EXPORT_SYMBOL_GPL vmlinux 0xfe3e0109	devres_close_group
+EXPORT_SYMBOL_GPL vmlinux 0xfe77e514	usb_altnum_to_altsetting
+EXPORT_SYMBOL_GPL vmlinux 0xfe95a3db	unregister_pernet_gen_subsys
+EXPORT_SYMBOL_GPL vmlinux 0xfe990052	gpio_free
+EXPORT_SYMBOL_GPL vmlinux 0xfeaa315c	tcp_death_row
+EXPORT_SYMBOL_GPL vmlinux 0xfed11ed1	usb_mon_deregister
+EXPORT_SYMBOL_GPL vmlinux 0xfede3bda	dm_set_device_limits
+EXPORT_SYMBOL_GPL vmlinux 0xfee5dc78	platform_device_del
+EXPORT_SYMBOL_GPL vmlinux 0xfeeccc73	sysfs_notify
+EXPORT_SYMBOL_GPL vmlinux 0xff0d9b01	pci_enable_pcie_error_reporting
+EXPORT_SYMBOL_GPL vmlinux 0xff810f7c	pmac_i2c_match_adapter
+EXPORT_SYMBOL_GPL vmlinux 0xff89a4cd	handle_level_irq
+EXPORT_SYMBOL_GPL vmlinux 0xffa97462	pmac_i2c_detach_adapter
+EXPORT_SYMBOL_GPL vmlinux 0xffb352c4	srcu_read_unlock
+EXPORT_SYMBOL_GPL vmlinux 0xfff5cff9	spi_busnum_to_master
+EXPORT_UNUSED_SYMBOL vmlinux 0x00000000	simple_prepare_write
--- linux-mvl-dove-2.6.32.orig/debian.master/abi/2.6.32-34.73/sparc/sparc64
+++ linux-mvl-dove-2.6.32/debian.master/abi/2.6.32-34.73/sparc/sparc64
@@ -0,0 +1,8501 @@
+EXPORT_SYMBOL crypto/gf128mul 0x0c2f123f	gf128mul_4k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x1068004b	gf128mul_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x2f2889a0	gf128mul_init_64k_lle
+EXPORT_SYMBOL crypto/gf128mul 0x3755f990	gf128mul_init_64k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x384ef9ce	gf128mul_64k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x56af0dbd	gf128mul_x_ble
+EXPORT_SYMBOL crypto/gf128mul 0x83581089	gf128mul_init_4k_lle
+EXPORT_SYMBOL crypto/gf128mul 0x9b2560b9	gf128mul_init_4k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x9e13f6f6	gf128mul_lle
+EXPORT_SYMBOL crypto/gf128mul 0xbd17a0df	gf128mul_4k_lle
+EXPORT_SYMBOL crypto/gf128mul 0xc0890413	gf128mul_64k_lle
+EXPORT_SYMBOL crypto/gf128mul 0xd60736ec	gf128mul_free_64k
+EXPORT_SYMBOL crypto/xor 0x5b6c00e6	xor_blocks
+EXPORT_SYMBOL drivers/atm/suni 0x528be9d9	suni_init
+EXPORT_SYMBOL drivers/block/paride/paride 0x0658e1aa	pi_write_block
+EXPORT_SYMBOL drivers/block/paride/paride 0x18331c7b	pi_connect
+EXPORT_SYMBOL drivers/block/paride/paride 0x1be36932	pi_init
+EXPORT_SYMBOL drivers/block/paride/paride 0x33ec7370	pi_read_regr
+EXPORT_SYMBOL drivers/block/paride/paride 0x6724c8e1	paride_register
+EXPORT_SYMBOL drivers/block/paride/paride 0x8254b55d	pi_schedule_claimed
+EXPORT_SYMBOL drivers/block/paride/paride 0x8550619a	pi_disconnect
+EXPORT_SYMBOL drivers/block/paride/paride 0xa114f3fb	pi_do_claimed
+EXPORT_SYMBOL drivers/block/paride/paride 0xac778449	pi_read_block
+EXPORT_SYMBOL drivers/block/paride/paride 0xba3355c5	pi_write_regr
+EXPORT_SYMBOL drivers/block/paride/paride 0xbbc7a487	paride_unregister
+EXPORT_SYMBOL drivers/block/paride/paride 0xe0b78557	pi_release
+EXPORT_SYMBOL drivers/cdrom/cdrom 0x344adbd5	init_cdrom_command
+EXPORT_SYMBOL drivers/cdrom/cdrom 0x5923df7c	cdrom_open
+EXPORT_SYMBOL drivers/cdrom/cdrom 0x5ac1b4ee	cdrom_get_last_written
+EXPORT_SYMBOL drivers/cdrom/cdrom 0x81780366	cdrom_get_media_event
+EXPORT_SYMBOL drivers/cdrom/cdrom 0x8d9d76e9	cdrom_ioctl
+EXPORT_SYMBOL drivers/cdrom/cdrom 0x97bd077b	unregister_cdrom
+EXPORT_SYMBOL drivers/cdrom/cdrom 0xa2e04f6f	cdrom_number_of_slots
+EXPORT_SYMBOL drivers/cdrom/cdrom 0xb215c6b6	cdrom_release
+EXPORT_SYMBOL drivers/cdrom/cdrom 0xba589406	cdrom_media_changed
+EXPORT_SYMBOL drivers/cdrom/cdrom 0xcb148306	register_cdrom
+EXPORT_SYMBOL drivers/cdrom/cdrom 0xd4d37334	cdrom_mode_sense
+EXPORT_SYMBOL drivers/cdrom/cdrom 0xd9df302d	cdrom_mode_select
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x171a28ea	ipmi_poll_interface
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x2d672a11	ipmi_set_maintenance_mode
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x2e9bedf0	ipmi_smi_watcher_register
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x39ba09c7	ipmi_set_my_LUN
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x40f2b10c	ipmi_alloc_smi_msg
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x4d89ab03	ipmi_request_settime
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x4d8c16f3	ipmi_destroy_user
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x5087a6c6	ipmi_smi_msg_received
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x5f25b932	ipmi_smi_watchdog_pretimeout
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x6e8c0a61	ipmi_create_user
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x804f922a	ipmi_addr_length
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x815a82fc	ipmi_register_for_cmd
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x9331f654	ipmi_get_maintenance_mode
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xa18ab380	ipmi_request_supply_msgs
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xa7dfdc82	ipmi_set_gets_events
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xbb19a627	ipmi_smi_watcher_unregister
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xbcbe31b4	ipmi_get_version
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xbf0bd431	ipmi_smi_add_proc_entry
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xc1f9dc62	ipmi_get_my_LUN
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe045df25	ipmi_unregister_smi
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe4f4665b	ipmi_validate_addr
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe536e4b0	ipmi_free_recv_msg
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xec2d3844	ipmi_get_my_address
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xfada0d39	ipmi_unregister_for_cmd
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xfe9be857	ipmi_set_my_address
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xff3c5a62	ipmi_register_smi
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x0cf1fa85	drm_fb_helper_init_crtc_count
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x0e9c4417	drm_fb_helper_fill_var
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x3443669c	drm_fb_helper_free
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x4bf21f81	drm_fb_helper_add_connector
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x5462d6a3	drm_helper_initial_config
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x5dc4e189	drm_fb_helper_single_fb_probe
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x60babecc	drm_fb_helper_setcolreg
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x63c5ba34	drm_fb_helper_set_par
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x6443abc1	drm_helper_encoder_in_use
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x65ba3e8c	drm_fb_helper_blank
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x6bae2f15	drm_fb_helper_pan_display
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x7a2e1e89	drm_fb_helper_fill_fix
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x7f3ffa41	drm_helper_probe_connector_modes
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x97646953	i2c_dp_aux_add_bus
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x9bf655d6	drm_fb_helper_check_var
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x9d251144	drm_fb_helper_panic
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x9ee0cd4f	drm_helper_resume_force_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xa10bb602	drm_helper_hotplug_stage_two
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xab26880a	drm_helper_connector_dpms
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xb0c31924	drm_fb_helper_setcmap
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xb201d729	drm_crtc_helper_set_config
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xb250854b	drm_helper_disable_unused_functions
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xbfbd9008	drm_helper_probe_single_connector_modes
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xc469c244	drm_fb_helper_restore
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xc56e82aa	drm_helper_crtc_in_use
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xd47e716a	drm_crtc_helper_set_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xed52109a	drm_helper_mode_fill_fb_struct
+EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0xab2dc8e6	radeonfb_resize
+EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0xea02db3e	radeonfb_remove
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x00afeef1	ttm_bo_init_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x0498d018	ttm_base_object_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x059a171a	ttm_base_object_lookup
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x0ab8804a	ttm_bo_wait_unreserved
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x0de98dc9	ttm_write_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x1357ea50	ttm_mem_global_free
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x1539ea22	ttm_bo_wait
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x16cabd79	ttm_bo_clean_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x172210d6	ttm_mem_global_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x1c988c3c	ttm_bo_wait_cpu
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x22d8c4b4	ttm_suspend_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x24536b5d	ttm_write_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x280a1f9b	ttm_tt_set_placement_caching
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x284c3627	ttm_mem_global_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x2a5139ee	ttm_fbdev_mmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x2e045ee1	ttm_bo_device_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x30a3490c	ttm_bo_reserve
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x339e93d6	ttm_mem_global_alloc
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x34ac05e4	ttm_bo_validate
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x365feb2e	ttm_eu_reserve_buffers
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x376ac7be	ttm_read_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x3c89da6e	ttm_bo_synccpu_write_grab
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x44409a13	ttm_global_item_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x4daeed6e	ttm_object_file_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x4debf665	ttm_bo_unreserve
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x533c002c	ttm_bo_device_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x59609446	ttm_suspend_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x5bc1f20f	ttm_bo_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x5c0e4505	ttm_bo_mem_space
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x5ca5cb47	ttm_global_item_ref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x60713990	ttm_object_file_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x61bdb34f	ttm_eu_fence_buffer_objects
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x61eb9cce	ttm_base_object_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x86a4066d	ttm_eu_backoff_reservation
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x8ae685b9	ttm_io_prot
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x9629071f	ttm_object_device_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x96555074	ttm_bo_synccpu_write_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x96a1b658	ttm_bo_evict_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x9b2ce804	ttm_bo_kunmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xa29a24b8	ttm_bo_swapout_all
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xa4f2db2a	ttm_bo_unmap_virtual
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xa77b51bc	ttm_vt_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xac0e50d1	ttm_round_pot
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xacc80e98	ttm_read_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb171ffeb	ttm_bo_kmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb234e194	ttm_bo_move_accel_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb8f9d883	ttm_lock_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb982f905	ttm_object_device_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc43b400c	ttm_vt_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc64022a6	ttm_bo_global_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc7d6e0d5	ttm_bo_mmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xde4082d4	ttm_tt_bind
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xde9894a9	ttm_bo_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xe059b387	ttm_ref_object_add
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xe2cc720a	ttm_tt_populate
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xe4a99a83	ttm_bo_move_memcpy
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xf289ba45	ttm_bo_move_ttm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xf41ab31c	ttm_ref_object_base_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xfcce372b	ttm_bo_global_release
+EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0x0903c239	vid_from_reg
+EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0xef1c781c	vid_which_vrm
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0x4d5b9349	i2c_pca_add_numbered_bus
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0xc27405bc	i2c_pca_add_bus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x02d9962c	hpsb_iso_recv_release_packets
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0b3cc82c	hpsb_iso_xmit_sync
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x10116bd3	hpsb_resume_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x12653950	hpsb_get_hostinfo_bykey
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x12a0c364	hpsb_iso_n_ready
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x12e14051	hpsb_make_writepacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x146f2d8b	hpsb_iso_recv_listen_channel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1609641e	hpsb_set_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1a200e5a	csr1212_release_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1c2e398a	hpsb_iso_recv_start
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1d616a2c	hpsb_make_lockpacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2035ab20	hpsb_read_cycle_timer
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x219cbabe	dma_region_offset_to_bus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x237a6a52	hpsb_node_fill_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2a4cc36b	csr1212_attach_keyval_to_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2b21d3d9	hpsb_packet_sent
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2d796025	hpsb_selfid_complete
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2e8a06ab	hpsb_bus_reset
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x368267dc	hpsb_free_tlabel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3fbdba54	hpsb_destroy_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x46881e35	hpsb_register_highlevel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x47210d1f	hpsb_packet_success
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x49a95dc4	csr1212_get_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4a9cd770	csr1212_parse_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4df3c9ab	hpsb_protocol_class
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x589f0f68	hpsb_lock
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5aab17ed	hpsb_free_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5f5fdd2f	csr1212_new_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x64ee28b3	hpsb_iso_recv_flush
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x672ad148	dma_region_sync_for_device
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x68b51e47	csr1212_read
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6a6aaf7a	hpsb_make_lock64packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x76bc1a5c	dma_region_free
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x771914d0	hpsb_alloc_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x799afcfa	hpsb_selfid_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8879f8f0	dma_region_sync_for_cpu
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8e441007	hpsb_read
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8ec2b312	dma_region_alloc
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x93adb5bf	hpsb_update_config_rom
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x94e5d747	hpsb_iso_xmit_queue_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x95abe2c2	hpsb_iso_recv_unlisten_channel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x979b3052	dma_prog_region_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x993500e3	hpsb_iso_wake
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x99e8866c	hpsb_update_config_rom_image
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9f288df4	hpsb_make_readpacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa0cc06fb	hpsb_iso_stop
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa7478f8c	hpsb_unregister_highlevel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa7fbf449	hpsb_iso_xmit_start
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa8a90736	hpsb_get_tlabel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa924dac6	dma_prog_region_alloc
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xac9b3608	hpsb_unregister_protocol
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xae4c9f9c	hpsb_iso_recv_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaef57bb5	csr1212_detach_keyval_from_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb1253880	hpsb_add_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb1b84d94	hpsb_get_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb3d87f0a	hpsb_packet_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb9072299	hpsb_iso_packet_sent
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb924de8f	hpsb_send_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb94eab2e	hpsb_set_hostinfo_key
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbba70620	dma_prog_region_free
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbe45ae3a	hpsb_iso_shutdown
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc2669d1c	hpsb_reset_bus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xcf5398a3	hpsb_make_phypacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xcfdfef4c	hpsb_unregister_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd35f8697	hpsb_make_streampacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd55af67b	hpsb_node_write
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd998b08e	hpsb_iso_xmit_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xdb5ffb54	hpsb_set_packet_complete_task
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xdd4df5dd	hpsb_allocate_and_register_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xdf075a56	__hpsb_register_protocol
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe15f86e9	hpsb_alloc_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe4be3877	hpsb_register_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xea3f253a	hpsb_iso_packet_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xea4152ff	dma_region_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xed1b286c	hpsb_remove_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf2635846	hpsb_iso_recv_set_channel_mask
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf532c61f	hpsb_create_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf8e852ff	dma_region_mmap
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf8f2c612	hpsb_write
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfba57f51	hpsb_speedto_str
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x1d5aeebc	ohci1394_init_iso_tasklet
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x4ceb910d	ohci1394_stop_context
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x58878ec2	ohci1394_register_iso_tasklet
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0xf6718495	ohci1394_unregister_iso_tasklet
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x08a37740	rdma_addr_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x2be5084d	rdma_resolve_ip
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x3253fcf5	rdma_copy_addr
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x4a3af3f9	rdma_addr_cancel
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x95df68e7	rdma_translate_ip
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xb0900f14	rdma_addr_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x042356ca	ib_send_cm_lap
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x0da95310	ib_cm_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x176f0088	ib_cm_notify
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x311cfd28	cm_class
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x48edc042	ib_destroy_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x54dfbf6c	ib_create_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x70f16128	ib_send_cm_sidr_req
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x7785a2e8	ib_send_cm_mra
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x842f129e	ib_send_cm_apr
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x8c463cda	ib_send_cm_drep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xa12b95c0	ib_send_cm_dreq
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xa4fb1e87	ib_send_cm_sidr_rep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xa9a2abf0	ib_send_cm_rej
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xbcde42a5	ib_send_cm_rtu
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xc3512a20	ib_cm_listen
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xe96fd6c8	ib_send_cm_req
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xfc749849	ib_send_cm_rep
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0310de95	ib_modify_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x06830b9a	ib_pack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0a8adf59	ib_modify_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0ab9164c	ib_query_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0cefc67d	ib_destroy_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x14672959	ib_get_cached_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x14d49de9	ib_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x192e725b	ib_query_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1df75206	ib_alloc_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1e491a04	ib_unmap_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2509c04f	ib_create_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2b5dd609	ib_create_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2bca56e5	ib_query_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2ceb6e57	ib_set_client_data
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2d95b8f2	ib_create_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x354f1943	ib_alloc_fast_reg_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3c4e815c	ib_dealloc_pd
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3f7567fd	ib_rate_to_mult
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x409ea56b	ib_query_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x444fbff8	ib_alloc_fast_reg_page_list
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x44a58cc7	ib_modify_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x44f33eba	ib_create_ah_from_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x46c1f2e7	ib_find_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4ba08705	ib_dealloc_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x513fc94c	ib_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x519cf913	ib_fmr_pool_unmap
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x54d1d0f7	ib_register_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x58ec9ee9	ib_destroy_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x619e6ab7	ib_dispatch_event
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6305a786	ib_register_event_handler
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x68bb276f	ib_find_cached_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6ab96c15	ib_dereg_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6b2c2a8a	ib_destroy_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x71dd7dc6	ib_query_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x74c5484d	ib_query_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7abee12b	ib_find_cached_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7cef8b3a	ib_free_fast_reg_page_list
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8640eaeb	ib_modify_qp_is_ok
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x87b614d8	ib_ud_header_pack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x87ca06a6	ib_destroy_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x87fbb062	ib_destroy_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8ba306d4	ib_get_client_data
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x94d9bf8f	ib_fmr_pool_map_phys
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x96ce6c46	rdma_node_get_transport
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9a66c349	ib_query_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9d320042	ib_get_dma_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9d804fa1	mult_to_ib_rate
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9e4f7c8e	ib_init_ah_from_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa5e7ba9c	ib_umem_release
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa6d2fd29	ib_attach_mcast
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa825a023	ib_alloc_mw
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa9e8df81	ib_create_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xabc16e41	ib_rereg_phys_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xae06b307	ib_reg_phys_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb03cd6f2	ib_get_cached_lmc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb27e0377	ib_alloc_pd
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc046cc4c	ib_modify_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc37ef527	ib_dealloc_mw
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc89c6b74	ib_alloc_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd160a20f	ib_modify_port
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd17ba9d1	ib_ud_header_init
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd2936113	ib_dealloc_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd49986ef	ib_create_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xdae6cde4	ib_query_port
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xdaffe079	ib_umem_page_count
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xde68099f	ib_find_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe321e7fe	ib_umem_get
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe3e88aeb	ib_unregister_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe510f097	ib_modify_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xea3f8ff6	ib_unregister_event_handler
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xed4b1b61	ib_get_cached_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf071947d	ib_detach_mcast
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf11f069f	ib_resize_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf36498b9	ib_ud_header_unpack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf96fc9de	ib_unpack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xfc1366fa	ib_flush_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x0325136d	ib_process_mad_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x2c1e2e08	ib_register_mad_snoop
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x32fe7445	ib_cancel_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x38621f5f	ib_modify_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x4b965db7	ib_create_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x59deefbc	ib_free_recv_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x65b950e1	ib_post_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6ef787ed	ib_response_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6f077fcf	ib_get_mad_data_offset
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x73d1743b	ib_free_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x79bc06f9	ib_redirect_mad_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x7b5d4b7a	ib_is_mad_class_rmpp
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x8e29309d	ib_unregister_mad_agent
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xa1d2fc01	ib_register_mad_agent
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xc0b30707	ib_get_rmpp_segment
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x022079d4	ib_sa_get_mcmember_rec
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x4ab002ff	ib_sa_cancel_query
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x576fdbac	ib_sa_free_multicast
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x5d72dabc	ib_sa_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x73a64cb5	ib_sa_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x8609307e	ib_sa_service_rec_query
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x9a105d58	ib_sa_path_rec_get
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xae502be3	ib_init_ah_from_mcmember
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xcba36fc7	ib_init_ah_from_path
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xfa65c042	ib_sa_join_multicast
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x02f847bc	ib_copy_path_rec_from_user
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x07cf5a51	ib_copy_ah_attr_to_user
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x18382f6a	ib_copy_path_rec_to_user
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x184f3575	ib_copy_qp_attr_to_user
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x2677e158	iw_cm_listen
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x2de0f3f9	iw_cm_disconnect
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x46db99c1	iw_cm_accept
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x58895be5	iw_cm_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x639ee9da	iw_create_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x7e1873cf	iw_cm_reject
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xfc088129	iw_cm_connect
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xfd94621f	iw_destroy_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x275903e8	rdma_connect
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x29690788	rdma_resolve_route
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x54dac400	rdma_set_ib_paths
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x61c8d5d3	rdma_destroy_id
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x67814759	rdma_leave_multicast
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x68a0449a	rdma_listen
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x7135f44c	rdma_create_id
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x72cd6d07	rdma_set_service_type
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x76071072	rdma_join_multicast
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x80de69da	rdma_accept
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x98c1dbbc	rdma_resolve_addr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xa46a9409	rdma_create_qp
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xbd424430	rdma_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xccea40e0	rdma_reject
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xce08a0b4	rdma_disconnect
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xea470f4a	rdma_destroy_qp
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xf52ef4e8	rdma_notify
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xf7ab3a91	rdma_bind_addr
+EXPORT_SYMBOL drivers/input/input-polldev 0x2fe5c5b8	input_free_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0x556a23db	input_allocate_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0xae565863	input_unregister_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0xed937dce	input_register_polled_device
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x04403fcf	unregister_capi_driver
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x14f2aa5a	capi20_get_version
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x1c043499	detach_capi_ctr
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2b8eab1f	capilib_free_ncci
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2baa6586	capilib_new_ncci
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x31c24aa4	capi20_isinstalled
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x47d3fc51	capi_info2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x47dbfa0a	capi_message2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x4c95921a	capi_ctr_ready
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x50b33ca4	capi_cmsg2message
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x55e8d6da	capi20_put_message
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x588c1c4e	capi20_set_callback
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x6057c6f3	capi_message2cmsg
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x62e32d43	capilib_data_b3_conf
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x71e8d5ba	capilib_data_b3_req
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x788d398c	capi_cmsg2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7a33596c	capi20_get_serial
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7e6f1307	capi20_get_manufacturer
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x82d2a82c	capi20_release
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x8963d33c	capi_ctr_resume_output
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x8f699913	capilib_release
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x9cafab31	capi_ctr_suspend_output
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x9f823278	register_capi_driver
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xa3ed97d8	capi_ctr_down
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xaa165d27	capilib_release_appl
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb1938c13	capi_ctr_handle_message
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb19fda8d	capi_cmd2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb60e5e5f	capi_cmsg_header
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xc1f71a42	capi20_register
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xd5aa687a	attach_capi_ctr
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe19a11ac	capi20_get_profile
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe9f62f29	cdebbuf_free
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xed061606	capi20_manufacturer
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNipac 0x512d1b0e	mISDNipac_init
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNipac 0x52cecdca	mISDNipac_irq
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNipac 0x58601480	mISDNisac_irq
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNipac 0xce0e6dc4	mISDNisac_init
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNisar 0x8340ce78	mISDNisar_init
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNisar 0xa8acc379	mISDNisar_irq
+EXPORT_SYMBOL drivers/isdn/i4l/isdn 0x8c64edae	register_isdn
+EXPORT_SYMBOL drivers/isdn/i4l/isdnhdlc 0x3b71e4fc	isdnhdlc_decode
+EXPORT_SYMBOL drivers/isdn/i4l/isdnhdlc 0x59cc8a7e	isdnhdlc_out_init
+EXPORT_SYMBOL drivers/isdn/i4l/isdnhdlc 0x8ee38862	isdnhdlc_rcv_init
+EXPORT_SYMBOL drivers/isdn/i4l/isdnhdlc 0xfd9d4c09	isdnhdlc_encode
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x084ca7cc	mISDN_register_device
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x12a6a7d0	recv_Dchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x1409c292	mISDN_initbchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x2348cc3c	mISDN_FsmFree
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x26081dba	queue_ch_frame
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x296823fc	l1_event
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3ea336fd	mISDN_FsmAddTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3f92ea93	recv_Bchannel_skb
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x41808a5a	create_l1
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x429129f2	mISDN_FsmRestartTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x50c2230c	mISDN_FsmChangeState
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x51d9a7d1	mISDN_clear_bchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x5d01911c	mISDN_freebchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x6935d67b	get_next_dframe
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x6ffaf274	confirm_Bsend
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x70a836b2	mISDN_unregister_device
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x71d58475	get_next_bframe
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x9e3da2d6	mISDN_register_Bprotocol
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x9fddb0ad	mISDN_clock_update
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xace35cae	mISDN_FsmDelTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xb9cb1ea2	mISDN_unregister_Bprotocol
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc17eeb94	recv_Dchannel_skb
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc3401729	mISDN_register_clock
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xcb5dda64	mISDN_initdchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd285995f	mISDN_clock_get
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd5145151	mISDN_FsmEvent
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd99879f9	dchannel_senddata
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd9a7fbfd	mISDN_FsmInitTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe774a36e	recv_Echannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe8f617eb	mISDN_unregister_clock
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf3c40f26	mISDN_freedchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf8d83b5c	recv_Bchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf96c8c17	bchannel_senddata
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf9e7832f	mISDN_FsmNew
+EXPORT_SYMBOL drivers/md/dm-log 0x3d6611f3	dm_dirty_log_type_register
+EXPORT_SYMBOL drivers/md/dm-log 0x44cc609a	dm_dirty_log_destroy
+EXPORT_SYMBOL drivers/md/dm-log 0xb23cd488	dm_dirty_log_type_unregister
+EXPORT_SYMBOL drivers/md/dm-log 0xf64c6fee	dm_dirty_log_create
+EXPORT_SYMBOL drivers/md/dm-snapshot 0x0c3c9f18	dm_exception_store_type_register
+EXPORT_SYMBOL drivers/md/dm-snapshot 0x17e9a44c	dm_exception_store_type_unregister
+EXPORT_SYMBOL drivers/md/dm-snapshot 0x547f45b9	dm_exception_store_create
+EXPORT_SYMBOL drivers/md/dm-snapshot 0xaade356d	dm_exception_store_destroy
+EXPORT_SYMBOL drivers/md/md-mod 0x00935d80	bitmap_endwrite
+EXPORT_SYMBOL drivers/md/md-mod 0x04fa70fe	md_integrity_add_rdev
+EXPORT_SYMBOL drivers/md/md-mod 0x06bb7368	md_done_sync
+EXPORT_SYMBOL drivers/md/md-mod 0x147d4249	bitmap_start_sync
+EXPORT_SYMBOL drivers/md/md-mod 0x1dab4f86	bitmap_cond_end_sync
+EXPORT_SYMBOL drivers/md/md-mod 0x30d2374e	bitmap_close_sync
+EXPORT_SYMBOL drivers/md/md-mod 0x339107c0	bitmap_unplug
+EXPORT_SYMBOL drivers/md/md-mod 0x3866e923	bitmap_end_sync
+EXPORT_SYMBOL drivers/md/md-mod 0x47907e66	md_check_recovery
+EXPORT_SYMBOL drivers/md/md-mod 0x787c7d07	md_wakeup_thread
+EXPORT_SYMBOL drivers/md/md-mod 0x879a7313	md_wait_for_blocked_rdev
+EXPORT_SYMBOL drivers/md/md-mod 0x9eab782b	md_register_thread
+EXPORT_SYMBOL drivers/md/md-mod 0xa68a5c7a	bitmap_startwrite
+EXPORT_SYMBOL drivers/md/md-mod 0xa849987a	md_unregister_thread
+EXPORT_SYMBOL drivers/md/md-mod 0xaedf2963	md_set_array_sectors
+EXPORT_SYMBOL drivers/md/md-mod 0xaf6acd7d	md_error
+EXPORT_SYMBOL drivers/md/md-mod 0xb1c1f026	mddev_congested
+EXPORT_SYMBOL drivers/md/md-mod 0xc4602661	md_check_no_bitmap
+EXPORT_SYMBOL drivers/md/md-mod 0xc619eccb	md_integrity_register
+EXPORT_SYMBOL drivers/md/md-mod 0xcead70f6	unregister_md_personality
+EXPORT_SYMBOL drivers/md/md-mod 0xdda51594	register_md_personality
+EXPORT_SYMBOL drivers/md/md-mod 0xe732e587	md_write_end
+EXPORT_SYMBOL drivers/md/md-mod 0xebdaf1c6	md_write_start
+EXPORT_SYMBOL drivers/md/raid6_pq 0x0bd662f6	raid6_gfmul
+EXPORT_SYMBOL drivers/md/raid6_pq 0x15fe0cd3	raid6_gfexp
+EXPORT_SYMBOL drivers/md/raid6_pq 0x5ba93f9d	raid6_gfinv
+EXPORT_SYMBOL drivers/md/raid6_pq 0x7b85d712	raid6_empty_zero_page
+EXPORT_SYMBOL drivers/md/raid6_pq 0xce45a6f1	raid6_gfexi
+EXPORT_SYMBOL drivers/media/common/tuners/mc44s803 0xdb64d897	mc44s803_attach
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0x0cb4b189	tuners
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0xc2821775	tuner_count
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-xc2028 0x6359c0d4	xc2028_attach
+EXPORT_SYMBOL drivers/media/common/tuners/xc5000 0xb669d360	xc5000_attach
+EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0x5739f41a	cx231xx_register_extension
+EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0xc1a361bc	cx231xx_unregister_extension
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x155650f3	cx2341x_ctrl_get_menu
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x1ca0c084	cx2341x_log_status
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x2f25eee2	cx2341x_update
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x5b88faf6	cx2341x_ext_ctrls
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf76ce95	cx2341x_fill_defaults
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf8b77a4	cx2341x_mpeg_ctrls
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xe2c2b5eb	cx2341x_ctrl_query
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x7d7a5c2b	gspca_disconnect
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x9670af2c	gspca_debug
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xaad50da5	gspca_auto_gain_n_exposure
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xdab593bb	gspca_get_i_frame
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xe375770f	gspca_dev_probe
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xe5c87f08	gspca_frame_add
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x04e83446	saa7134_tuner_callback
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x1211df5d	saa7134_devlist
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x14dfecc6	saa7134_boards
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x1a7575e5	saa7134_set_gpio
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x21097b4b	saa7134_pgtable_alloc
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x27fd8a0a	saa7134_devlist_lock
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x2e275672	saa7134_dmasound_exit
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x3e331af6	saa_dsp_writel
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x3ebb05dd	saa7134_ts_unregister
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x450993b2	saa7134_pgtable_free
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x81a6813b	saa7134_ts_register
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x9396845f	saa7134_pgtable_build
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x9b7bbf57	saa7134_set_dmabits
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xb268acc3	saa7134_tvaudio_setmute
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xf81326ea	saa7134_dmasound_init
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x1c33988a	soc_camera_host_register
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x20eec7c4	soc_camera_xlate_by_fourcc
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x42ce7018	soc_camera_apply_sensor_flags
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x511f5d59	soc_camera_host_unregister
+EXPORT_SYMBOL drivers/media/video/soc_camera 0xffb8799c	soc_camera_format_by_fourcc
+EXPORT_SYMBOL drivers/media/video/tveeprom 0x1e56c781	tveeprom_hauppauge_analog
+EXPORT_SYMBOL drivers/media/video/tveeprom 0xeec1afa9	tveeprom_read
+EXPORT_SYMBOL drivers/media/video/v4l1-compat 0x64a0b3ff	v4l_compat_translate_ioctl
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x03165a85	v4l2_ctrl_get_menu
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1dcaa0c8	v4l2_prio_max
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1e326b97	v4l2_ctrl_query_fill
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x2f639468	v4l2_prio_check
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x42c8e001	v4l2_ctrl_next
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x495426ee	v4l2_ctrl_get_name
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x4ed5e0d7	v4l2_chip_match_host
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x50766d69	v4l2_ctrl_query_menu_valid_items
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x76ba9a9a	v4l2_prio_open
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x92cc36ae	v4l2_chip_match_i2c_client
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x936cc836	v4l2_chip_ident_i2c_client
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x95284709	v4l2_prio_close
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9c7de443	v4l2_prio_change
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9eb43ee2	v4l2_ctrl_check
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0xbecd2858	v4l2_prio_init
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0xd9ee1e3f	v4l2_ctrl_query_menu
+EXPORT_SYMBOL drivers/media/video/videodev 0x0614dd5a	v4l2_video_std_frame_period
+EXPORT_SYMBOL drivers/media/video/videodev 0x11cb24e1	video_unregister_device
+EXPORT_SYMBOL drivers/media/video/videodev 0x123959a1	v4l2_type_names
+EXPORT_SYMBOL drivers/media/video/videodev 0x26652127	video_device_release
+EXPORT_SYMBOL drivers/media/video/videodev 0x2a3f2a7a	video_usercopy
+EXPORT_SYMBOL drivers/media/video/videodev 0x2d0f78a0	video_devdata
+EXPORT_SYMBOL drivers/media/video/videodev 0x3adbd595	v4l2_field_names
+EXPORT_SYMBOL drivers/media/video/videodev 0x4f6514b4	video_register_device
+EXPORT_SYMBOL drivers/media/video/videodev 0x523952f1	video_register_device_no_warn
+EXPORT_SYMBOL drivers/media/video/videodev 0x574943ab	video_device_alloc
+EXPORT_SYMBOL drivers/media/video/videodev 0x5ebefe4b	v4l_printk_ioctl
+EXPORT_SYMBOL drivers/media/video/videodev 0x6e45102b	video_device_release_empty
+EXPORT_SYMBOL drivers/media/video/videodev 0x9ac5fc04	video_ioctl2
+EXPORT_SYMBOL drivers/media/video/videodev 0xe2b92059	v4l2_video_std_construct
+EXPORT_SYMBOL drivers/media/video/videodev 0xf3251e7b	v4l2_norm_to_name
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x01152a98	mpt_device_driver_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x02d3eaec	mpt_send_handshake_request
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x14b785c8	mpt_detach
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x18154e59	mpt_HardResetHandler
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x261f6218	mpt_raid_phys_disk_pg0
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x2d21dd84	mpt_reset_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x2f7d53e0	mpt_attach
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x3096fcef	mpt_print_ioc_summary
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x35ce3ba4	mpt_verify_adapter
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x37356e55	mpt_halt_firmware
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x3d47b6cb	mpt_raid_phys_disk_pg1
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x3fe9af77	mptbase_sas_persist_operation
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4526289b	mpt_event_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4531b167	mpt_clear_taskmgmt_in_progress_flag
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4ab3e7b7	mpt_set_taskmgmt_in_progress_flag
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4ac6591f	mpt_raid_phys_disk_get_num_paths
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x502108d0	mpt_fwfault_debug
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x5944967b	mpt_findImVolumes
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x6d02de72	mpt_event_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x770c4b38	mpt_alloc_fw_memory
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x82eed06f	mpt_GetIocState
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x85214dc6	mpt_put_msg_frame_hi_pri
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xa58d8ea6	mpt_free_fw_memory
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xb5603b50	mpt_free_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xb5614390	mpt_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc0e69f82	mpt_device_driver_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc47c22e8	mpt_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd5b2c287	mpt_put_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd9a92a75	mpt_reset_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xdd805159	ioc_list
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xfd166683	mpt_config
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xff4905ae	mpt_get_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x0ca30375	mptscsih_host_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x0dfcb7e5	mptscsih_shutdown
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x338f3225	mptscsih_slave_configure
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x4a393d16	mptscsih_slave_destroy
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x56c06659	mptscsih_abort
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x5cd95393	mptscsih_dev_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x6b617e36	mptscsih_taskmgmt_response_code
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x741eadbe	mptscsih_get_scsi_lookup
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x79069617	mptscsih_ioc_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x841ece10	mptscsih_change_queue_depth
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x8b85543b	mptscsih_bus_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x8e2e189c	mptscsih_proc_info
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x9391578f	mptscsih_bios_param
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xa65dde5e	mptscsih_remove
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xaebad21f	mptscsih_IssueTaskMgmt
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xba5c44d1	mptscsih_qcmd
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xd039ff09	mptscsih_is_phys_disk
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xd142f737	mptscsih_info
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xd2c717c2	mptscsih_raid_id_to_num
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xd5e69b5c	mptscsih_scandv_complete
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xe43cbf0d	mptscsih_taskmgmt_complete
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xf1607db8	mptscsih_event_process
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xf5e8a137	mptscsih_host_attrs
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xff9ddcdb	mptscsih_io_done
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x08429899	i2o_event_register
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x0afaf535	i2o_cntxt_list_get_ptr
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x14299d7f	i2o_driver_notify_device_add_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x166de97d	i2o_msg_get_wait
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x16f0e9be	i2o_driver_unregister
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x1c49428e	i2o_cntxt_list_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2a843bef	i2o_dump_message
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2c7bbd60	i2o_driver_notify_controller_remove_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x43e8acc4	i2o_msg_post_wait_mem
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x5c6b0c6f	i2o_parm_table_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x5daf257a	i2o_iop_find_device
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x8a1e773d	i2o_status_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x915ec310	i2o_exec_lct_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x934266ab	i2o_cntxt_list_add
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x935486b2	i2o_find_iop
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x9df45fc3	i2o_driver_notify_controller_add_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb4c00dcf	i2o_controllers
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb73f0615	i2o_parm_field_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xe450c7a8	i2o_parm_issue
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xeb109c26	i2o_device_claim_release
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xee44e889	i2o_cntxt_list_remove
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xef6a8fa3	i2o_device_claim
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xf0d4dff5	i2o_driver_notify_device_remove_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xf3416cd4	i2o_driver_register
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x24b5194c	ab3100_get_register_page_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x48245f24	ab3100_event_register
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x6345aa7d	ab3100_mask_and_set_register_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xa2c7c8bf	ab3100_set_register_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xa8bc60e2	ab3100_get_chip_type
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xaa36e3f2	ab3100_event_registers_startup_state_get
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xabcfe410	ab3100_get_register_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xfe208d4c	ab3100_event_unregister
+EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x7a892b49	pasic3_read_register
+EXPORT_SYMBOL drivers/mfd/htc-pasic3 0xc079e9ca	pasic3_write_register
+EXPORT_SYMBOL drivers/mfd/mfd-core 0x185d773f	mfd_remove_devices
+EXPORT_SYMBOL drivers/mfd/mfd-core 0x8cb5250d	mfd_add_devices
+EXPORT_SYMBOL drivers/mfd/tps65010 0x02d4ad0f	tps65013_set_low_pwr
+EXPORT_SYMBOL drivers/mfd/tps65010 0x28485130	tps65010_config_vregs1
+EXPORT_SYMBOL drivers/mfd/tps65010 0x33739de7	tps65010_set_vib
+EXPORT_SYMBOL drivers/mfd/tps65010 0x9fd44c69	tps65010_set_led
+EXPORT_SYMBOL drivers/mfd/tps65010 0xb14080cc	tps65010_set_low_pwr
+EXPORT_SYMBOL drivers/mfd/tps65010 0xd5bb106d	tps65010_set_vbus_draw
+EXPORT_SYMBOL drivers/mfd/tps65010 0xe99b3f36	tps65010_set_gpio_out_value
+EXPORT_SYMBOL drivers/misc/c2port/core 0x282585b0	c2port_device_unregister
+EXPORT_SYMBOL drivers/misc/c2port/core 0x7c7434d5	c2port_device_register
+EXPORT_SYMBOL drivers/misc/ioc4 0x2b276981	ioc4_register_submodule
+EXPORT_SYMBOL drivers/misc/ioc4 0xb1f17f59	ioc4_unregister_submodule
+EXPORT_SYMBOL drivers/misc/tifm_core 0x02fff24a	tifm_free_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0x177c4777	tifm_add_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0x3166c17a	tifm_eject
+EXPORT_SYMBOL drivers/misc/tifm_core 0x32e154c3	tifm_alloc_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0x508e7c34	tifm_unmap_sg
+EXPORT_SYMBOL drivers/misc/tifm_core 0x58df9377	tifm_register_driver
+EXPORT_SYMBOL drivers/misc/tifm_core 0x611e2d1d	tifm_unregister_driver
+EXPORT_SYMBOL drivers/misc/tifm_core 0xbc34cd43	tifm_has_ms_pif
+EXPORT_SYMBOL drivers/misc/tifm_core 0xbf3a1d03	tifm_alloc_device
+EXPORT_SYMBOL drivers/misc/tifm_core 0xc6f780f3	tifm_remove_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0xcd153284	tifm_queue_work
+EXPORT_SYMBOL drivers/misc/tifm_core 0xd7265044	tifm_free_device
+EXPORT_SYMBOL drivers/misc/tifm_core 0xdb60b9fe	tifm_map_sg
+EXPORT_SYMBOL drivers/mmc/card/mmc_block 0x2b099226	mmc_cleanup_queue
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x102e5ba2	mmc_card_can_sleep
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x184b82fb	mmc_vddrange_to_ocrmask
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x23e590b6	mmc_release_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x2baf6488	mmc_alloc_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x2e64ec1c	mmc_power_save_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x33cfb07a	mmc_card_sleep
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x48481904	mmc_register_driver
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x497f76ad	mmc_remove_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x4f2bf911	mmc_wait_for_app_cmd
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x56df5a59	mmc_regulator_set_ocr
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x5a10debf	mmc_set_data_timeout
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x71eb2da9	mmc_power_restore_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x7c22ddd5	__mmc_claim_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x7d50f389	mmc_try_claim_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x80d21d90	mmc_free_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x82a0ced9	mmc_host_enable
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x871b9538	mmc_align_data_size
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xa317d39c	mmc_wait_for_req
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xa95c303e	mmc_request_done
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xae8e5432	mmc_host_lazy_disable
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xb147f171	mmc_unregister_driver
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xb3ad570a	mmc_detect_change
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xbc092972	mmc_add_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xcf69bced	mmc_wait_for_cmd
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xd1602863	mmc_host_disable
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xe15d915a	mmc_card_awake
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xf494f618	mmc_regulator_get_ocrmask
+EXPORT_SYMBOL drivers/mmc/host/of_mmc_spi 0x54b9fedb	mmc_spi_put_pdata
+EXPORT_SYMBOL drivers/mmc/host/of_mmc_spi 0xe9433e65	mmc_spi_get_pdata
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x067b49ee	cfi_varsize_frob
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x7636660a	cfi_fixup
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x884e3701	cfi_read_pri
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x073d8dab	unregister_mtd_chip_driver
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x26ff320d	map_destroy
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x860d2fce	do_map_probe
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0xc8375439	register_mtd_chip_driver
+EXPORT_SYMBOL drivers/mtd/chips/gen_probe 0xe3c7ef89	mtd_do_chip_probe
+EXPORT_SYMBOL drivers/mtd/lpddr/lpddr_cmds 0x6d4692ba	lpddr_cmdset
+EXPORT_SYMBOL drivers/mtd/maps/map_funcs 0xdee655b9	simple_map_init
+EXPORT_SYMBOL drivers/mtd/mtd 0x0d336952	del_mtd_partitions
+EXPORT_SYMBOL drivers/mtd/mtd 0x2ea9b4c9	add_mtd_partitions
+EXPORT_SYMBOL drivers/mtd/mtdconcat 0x2541e59a	mtd_concat_create
+EXPORT_SYMBOL drivers/mtd/mtdconcat 0xa0c144e6	mtd_concat_destroy
+EXPORT_SYMBOL drivers/mtd/nand/nand 0x2eafa78f	nand_default_bbt
+EXPORT_SYMBOL drivers/mtd/nand/nand 0xd6b557e2	nand_scan_bbt
+EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0x08ee5e44	nand_correct_data
+EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0xa545f412	nand_calculate_ecc
+EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0xb4b94377	__nand_correct_data
+EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0x836bdb72	nand_flash_ids
+EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0xa336feb7	nand_manuf_ids
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x4e15ab05	onenand_scan_bbt
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x99cb6718	onenand_addr
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0xbf241d58	flexonenand_region
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0xdbda4400	onenand_default_bbt
+EXPORT_SYMBOL drivers/net/8390 0x0f1a3fb5	ei_tx_timeout
+EXPORT_SYMBOL drivers/net/8390 0x16aba17f	ei_close
+EXPORT_SYMBOL drivers/net/8390 0x4c78d7da	ei_start_xmit
+EXPORT_SYMBOL drivers/net/8390 0x8469bc58	ei_open
+EXPORT_SYMBOL drivers/net/8390 0x8b2e2f75	__alloc_ei_netdev
+EXPORT_SYMBOL drivers/net/8390 0x9d540add	NS8390_init
+EXPORT_SYMBOL drivers/net/8390 0xae2338a0	ei_set_multicast_list
+EXPORT_SYMBOL drivers/net/8390 0xcb7bf71b	ei_netdev_ops
+EXPORT_SYMBOL drivers/net/8390 0xdd365790	ei_interrupt
+EXPORT_SYMBOL drivers/net/8390 0xec074ea2	ei_get_stats
+EXPORT_SYMBOL drivers/net/8390 0xfbffc913	ei_poll
+EXPORT_SYMBOL drivers/net/bnx2 0xb7f4d024	bnx2_cnic_probe
+EXPORT_SYMBOL drivers/net/cnic 0x636af174	cnic_unregister_driver
+EXPORT_SYMBOL drivers/net/cnic 0x7962634d	cnic_register_driver
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x055f5600	cxgb3_remove_tid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x2393fbac	t3_register_cpl_handler
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x271d38b5	cxgb3_insert_tid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x296e2e41	dev2t3cdev
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x3eb620c9	t3_l2t_send_slow
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x4c073be2	cxgb3_ofld_send
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x5b1fe36f	cxgb3_alloc_atid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x698e5acb	cxgb3_register_client
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x8802507d	t3_l2t_get
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x89ba125e	cxgb3_unregister_client
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x954b5e65	t3_l2e_free
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x9b4cdb62	t3_l2t_send_event
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xa8ff3169	cxgb3_free_atid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xb90aaa3f	cxgb3_alloc_stid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xc0050468	cxgb3_queue_tid_release
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xc9687258	cxgb3_free_stid
+EXPORT_SYMBOL drivers/net/mdio 0x0f934475	mdio45_ethtool_gset_npage
+EXPORT_SYMBOL drivers/net/mdio 0x22bce513	mdio_mii_ioctl
+EXPORT_SYMBOL drivers/net/mdio 0x43e4defc	mdio45_nway_restart
+EXPORT_SYMBOL drivers/net/mdio 0x7577f992	mdio_set_flag
+EXPORT_SYMBOL drivers/net/mdio 0xa1a29548	mdio45_probe
+EXPORT_SYMBOL drivers/net/mdio 0xb34a7575	mdio45_ethtool_spauseparam_an
+EXPORT_SYMBOL drivers/net/mdio 0xc6b1163f	mdio45_links_ok
+EXPORT_SYMBOL drivers/net/mii 0x063e64fc	generic_mii_ioctl
+EXPORT_SYMBOL drivers/net/mii 0x1476ccdd	mii_check_gmii_support
+EXPORT_SYMBOL drivers/net/mii 0x6101b117	mii_ethtool_sset
+EXPORT_SYMBOL drivers/net/mii 0x6643c347	mii_check_media
+EXPORT_SYMBOL drivers/net/mii 0x719f8910	mii_nway_restart
+EXPORT_SYMBOL drivers/net/mii 0xc5cf4cbb	mii_check_link
+EXPORT_SYMBOL drivers/net/mii 0xf9957015	mii_ethtool_gset
+EXPORT_SYMBOL drivers/net/mii 0xfb507af4	mii_link_ok
+EXPORT_SYMBOL drivers/net/phy/mdio-bitbang 0xa7e6ea64	free_mdio_bitbang
+EXPORT_SYMBOL drivers/net/phy/mdio-bitbang 0xc50e1527	alloc_mdio_bitbang
+EXPORT_SYMBOL drivers/net/ppp_generic 0x0150aa5e	ppp_register_channel
+EXPORT_SYMBOL drivers/net/ppp_generic 0x3da18283	ppp_channel_index
+EXPORT_SYMBOL drivers/net/ppp_generic 0x521ba403	ppp_input_error
+EXPORT_SYMBOL drivers/net/ppp_generic 0x5522d7c8	ppp_input
+EXPORT_SYMBOL drivers/net/ppp_generic 0x68a41bfe	ppp_unregister_compressor
+EXPORT_SYMBOL drivers/net/ppp_generic 0x72f3fb7a	ppp_output_wakeup
+EXPORT_SYMBOL drivers/net/ppp_generic 0xa5071bb2	ppp_register_net_channel
+EXPORT_SYMBOL drivers/net/ppp_generic 0xb0c7fdea	ppp_unit_number
+EXPORT_SYMBOL drivers/net/ppp_generic 0xe05dd336	ppp_unregister_channel
+EXPORT_SYMBOL drivers/net/ppp_generic 0xf9785da7	ppp_register_compressor
+EXPORT_SYMBOL drivers/net/pppox 0x213b4b36	pppox_ioctl
+EXPORT_SYMBOL drivers/net/pppox 0x9c047167	pppox_unbind_sock
+EXPORT_SYMBOL drivers/net/pppox 0xe0ff7a18	unregister_pppox_proto
+EXPORT_SYMBOL drivers/net/pppox 0xf171ef73	register_pppox_proto
+EXPORT_SYMBOL drivers/net/slhc 0x2278e94b	slhc_remember
+EXPORT_SYMBOL drivers/net/slhc 0x26b760c4	slhc_init
+EXPORT_SYMBOL drivers/net/slhc 0x3fe0d1c0	slhc_free
+EXPORT_SYMBOL drivers/net/slhc 0x62538167	slhc_toss
+EXPORT_SYMBOL drivers/net/slhc 0x7e87227e	slhc_compress
+EXPORT_SYMBOL drivers/net/slhc 0xa78d9eb7	slhc_uncompress
+EXPORT_SYMBOL drivers/net/wireless/airo 0x110b9dba	reset_airo_card
+EXPORT_SYMBOL drivers/net/wireless/airo 0x21c5156d	init_airo_card
+EXPORT_SYMBOL drivers/net/wireless/airo 0x475ff7d5	stop_airo_card
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x31219afb	ath_is_world_regd
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x766907e3	ath_regd_init
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x84aa5c79	ath_reg_notifier_apply
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xbe25b39d	ath_regd_get_band_ctl
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xccbc8daa	ath_rxbuf_alloc
+EXPORT_SYMBOL drivers/net/wireless/atmel 0x21d730e5	atmel_open
+EXPORT_SYMBOL drivers/net/wireless/atmel 0x7ff169d8	init_atmel_card
+EXPORT_SYMBOL drivers/net/wireless/atmel 0xf17b994a	stop_atmel_card
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x078c6eb3	hostap_set_multicast_list_queue
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x0a5d4311	prism2_update_comms_qual
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x290d0c59	hostap_init_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x2b2e5618	hostap_remove_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x2c7626ee	hostap_80211_ops
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x30378f71	hostap_info_init
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x369fcc62	hostap_set_string
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x38eb67e5	hostap_get_porttype
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x3d46467a	hostap_setup_dev
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x4faeab76	hostap_set_roaming
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x52ba003f	hostap_set_auth_algs
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x53e65de5	hostap_free_data
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x68c9d8c1	hostap_master_start_xmit
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x6e32b21f	hostap_set_hostapd_sta
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x76c9dd93	hostap_80211_rx
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x781085ef	hostap_remove_interface
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x88c01286	hostap_info_process
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x8b38fef8	hostap_init_ap_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x9262c43d	hostap_handle_sta_tx_exc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x96c616e5	hostap_set_encryption
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x9bcc8dc8	hostap_init_data
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa12ad27f	hostap_dump_tx_header
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa9566083	hostap_set_antsel
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xaf9e3a04	hostap_set_word
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb163b59d	hostap_check_sta_fw_version
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb2a945e0	hostap_dump_rx_header
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb4b77c8b	hostap_80211_get_hdrlen
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf07d1cfd	hostap_set_hostapd
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf3bbe1b7	hostap_add_interface
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x052f81ba	libipw_wx_set_encode
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x079a8e4d	libipw_set_geo
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x15fbd77b	libipw_channel_to_freq
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x1eec0458	libipw_is_valid_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x1f85aa5b	libipw_get_channel_flags
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x33f206c5	libipw_rx_mgt
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x4448a39e	alloc_ieee80211
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x51cd5f10	libipw_get_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x6488f942	libipw_wx_set_encodeext
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x81e4346b	free_ieee80211
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x83d46168	libipw_wx_get_encodeext
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x87be10f8	libipw_rx
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x94bf520f	libipw_xmit
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xb3bd02d4	libipw_freq_to_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xb54a0b1c	libipw_txb_free
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xb97fe5c0	libipw_change_mtu
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xbc920d7a	libipw_networks_age
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xe80f26b6	libipw_channel_to_index
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xeac2f121	libipw_get_geo
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xec6d0e0f	libipw_wx_get_encode
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xf8b733e1	libipw_wx_get_scan
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x00ba5c90	iwl_init_channel_map
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x01ae0be3	iwl_hw_detect
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0212e4b8	iwl_mac_get_tx_stats
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0498fc64	iwl_reset_qos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x062f1009	iwl_leds_register
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x079d1d18	iwl_update_tkip_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0c0a0342	iwl_clear_stations_table
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0e610257	iwl_tt_initialize
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1008e330	iwl_tx_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x100f36b0	iwl_tt_exit_ct_kill
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x10ed6174	iwl_tx_queue_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x11505017	iwlcore_eeprom_enhanced_txpower
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1384c5ef	iwl_setup_rx_scan_handlers
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1509199c	iwl_tt_enter_ct_kill
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x15527535	iwl_rx_reply_rx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x15c6dfb5	iwl_init_drv
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x181eedb5	iwl_sta_rx_agg_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x19f0e900	iwl_debug_level
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1aaef6d4	iwl_eeprom_get_mac
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1ccfa2ad	iwl_sta_tx_modify_enable_tid
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d77b399	iwl_bcast_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x252e1d26	iwl_tx_cmd_complete
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x254f77fe	iwl_tx_agg_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x278cb1ef	iwl_rx_pm_sleep_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2818744b	iwlcore_eeprom_verify_signature
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x298fc17a	iwl_verify_ucode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x29b63bb5	iwl_rx_replenish_now
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x29ed985d	iwl_free_channel_map
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2aec97f9	iwlcore_init_geos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2ba9492d	iwl_disable_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2fb1780e	iwl_rx_replenish
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x313517cf	iwl_set_default_wep_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x31cfeba3	iwl_is_monitor_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x34740c2e	iwl_bg_scan_check
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x392f3e50	iwl_tx_ant_restriction
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x393f9505	iwl_mac_remove_interface
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3bd7eda9	iwl_init_sensitivity
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3e4e16aa	iwl_send_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3f086261	iwl_get_active_dwell_time
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x409576ea	iwl_setup_mac
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4112901d	iwl_mac_conf_tx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x46ebea49	iwl_setup_rxon_timing
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4773ed4d	iwl_send_statistics_request
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4d87b69e	iwl_uninit_drv
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4f34160e	iwl_rx_missed_beacon_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x50921d10	iwl_alloc_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x50e0ddf0	iwl_full_rxon_required
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x51806e10	iwl_rx_csa
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x53cecb89	iwl_rx_reply_error
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x54268c97	iwl_hwrate_to_tx_control
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x57cbf908	iwl_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x57e8e876	iwl_mac_beacon_update
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x592d7f39	iwl_txq_check_empty
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x594bb35c	iwl_rx_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5d310b73	iwl_rx_reply_rx_phy
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5da3d84f	iwl_mac_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5e607c7a	iwl_get_free_ucode_key_index
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6469746d	iwl_rate_get_lowest_plcp
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x663c5c78	iwl_set_rxon_hwcrypto
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x675cad0e	iwl_chain_noise_calibration
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6792ade4	iwl_bg_abort_scan
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x683b50bb	iwl_leds_unregister
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x69fc4d84	iwl_irq_handle_error
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6bdf48ea	iwl_tt_handler
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6cd7f100	iwl_send_cmd_pdu_async
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6dab3a5d	iwl_fill_probe_req
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6dea9bfb	iwl_eeprom_check_version
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x70c3c64b	iwl_remove_dynamic_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x70ee7eef	iwl_scan_cancel
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x726c3583	iwl_rx_pm_debug_statistics_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7389a4f0	iwl_tx_skb
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x754e0273	iwl_setup_scan_deferred_work
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x771546d8	iwl_txq_ctx_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x78976e61	iwl_isr_legacy
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x797c03d1	iwl_activate_qos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x825dc9a7	iwlcore_eeprom_acquire_semaphore
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x84fec1fd	iwl_set_tx_power
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8670273d	iwl_hwrate_to_plcp_idx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x89e91990	iwl_free_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8a78afeb	iwlcore_eeprom_release_semaphore
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8afdd14d	iwl_sensitivity_calibration
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8c038203	iwl_find_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8cd3f691	iwl_rf_kill_ct_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8d0f2202	iwl_mac_hw_scan
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8d9ff9ef	iwl_send_static_wepkey_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x90e5a888	iwl_get_channel_info
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9212e18f	iwl_eeprom_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9245f34e	iwl_rx_statistics
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9a096c8f	iwl_rx_queue_space
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9a40036e	iwl_send_cmd_pdu
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9cde1f24	iwl_queue_space
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9faced57	iwl_calib_set
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa2849490	iwl_power_initialize
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa2a5bce1	iwl_free_tfds_in_queue
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa36c156b	iwl_connection_init_rx_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa3da6ecf	iwlcore_eeprom_query_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa3f9db32	iwl_get_ra_sta_id
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa52b15a0	iwl_tx_queue_reclaim
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa5833da6	iwl_cmd_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa93ea8d7	iwlcore_free_geos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaed760cb	iwl_txq_update_write_ptr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaf815789	iwl_send_add_sta
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb8b796f9	iwl_rx_queue_alloc
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbc90d017	iwl_tx_agg_start
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbd7a1483	iwl_rx_reply_compressed_ba
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbda30752	iwl_power_update_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbf755b1d	iwl_set_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc05b4ea5	iwl_send_cmd_sync
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc6ad4fcf	iwl_rx_queue_restock
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc7794b30	iwl_bg_scan_completed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc7f30542	iwl_reset_run_time_calib
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc81a9eed	iwl_is_ht40_tx_allowed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc94c7d87	iwl_set_rxon_chain
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcbaf4931	get_cmd_string
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xceb35bf5	iwl_get_sta_id
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcf44d090	iwl_set_hw_params
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcf4b0d81	iwl_sta_rx_agg_start
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd2029130	iwl_rxq_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd324d3b5	iwl_eeprom_query_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd4da1527	iwl_remove_default_wep_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd55f61b1	iwl_set_decrypted_flag
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd6b1245c	iwl_hw_txq_ctx_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd6dd7c97	iwl_get_passive_dwell_time
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd89b716e	iwl_alloc_all
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd8d7a4bc	iwl_tt_exit
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd9371dc1	iwl_rxon_add_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdbc8b78c	iwl_ht_enabled
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdbdcbc85	iwl_configure_filter
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdd0526a6	iwl_check_rxon_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdef74303	iwl_set_dynamic_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe21013af	iwl_bss_info_changed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe3c1951f	iwl_mac_reset_tsf
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe54d7aa1	iwl_hw_nic_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe73f494a	iwl_add_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe7ce5d70	iwl_rates
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xea3c37f1	iwl_eeprom_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xea485720	iwl_mac_add_interface
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xeb2b0e96	iwl_scan_cancel_timeout
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xec457e0e	iwl_send_lq_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xed59defa	iwl_send_calib_results
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf002902b	iwl_eeprom_query16
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf2712826	iwl_send_bt_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf6815dc6	iwl_rx_queue_update_write_ptr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf7971a9d	iwl_set_rxon_channel
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf92a5ee0	iwl_reset_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfe84d1a2	iwl_set_rxon_ht
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x15945a45	alloc_orinocodev
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x2e57ca04	orinoco_if_del
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x3cdc0668	orinoco_if_add
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x4196c38b	hermes_write_ltv
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x434f5e71	orinoco_down
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x435de37a	orinoco_init
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x569744e8	free_orinocodev
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x6a927e18	orinoco_interrupt
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xa031d8e4	hermes_doicmd_wait
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc60b5e9e	hermes_bap_pwrite
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xcca4e9fe	orinoco_up
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd38d8ae2	hermes_read_ltv
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd3f714e5	hermes_bap_pread
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5168829	hermes_allocate
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5336e5d	hermes_init
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd54e219d	hermes_docmd_wait
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xed47b224	hermes_struct_init
+EXPORT_SYMBOL drivers/parport/parport 0x10c64498	parport_find_number
+EXPORT_SYMBOL drivers/parport/parport 0x14109fc1	parport_register_device
+EXPORT_SYMBOL drivers/parport/parport 0x26a48369	parport_remove_port
+EXPORT_SYMBOL drivers/parport/parport 0x2eab8e65	parport_write
+EXPORT_SYMBOL drivers/parport/parport 0x3a3ebe80	parport_ieee1284_epp_read_addr
+EXPORT_SYMBOL drivers/parport/parport 0x3d908aa4	parport_wait_event
+EXPORT_SYMBOL drivers/parport/parport 0x43cc7222	parport_ieee1284_ecp_read_data
+EXPORT_SYMBOL drivers/parport/parport 0x4a0cce56	parport_announce_port
+EXPORT_SYMBOL drivers/parport/parport 0x4d2a941b	parport_ieee1284_interrupt
+EXPORT_SYMBOL drivers/parport/parport 0x598aaf05	parport_set_timeout
+EXPORT_SYMBOL drivers/parport/parport 0x6758462b	parport_ieee1284_read_byte
+EXPORT_SYMBOL drivers/parport/parport 0x68004c1f	parport_put_port
+EXPORT_SYMBOL drivers/parport/parport 0x6e1b0de1	parport_ieee1284_epp_read_data
+EXPORT_SYMBOL drivers/parport/parport 0x7ca7764f	parport_unregister_driver
+EXPORT_SYMBOL drivers/parport/parport 0x8416210f	parport_register_port
+EXPORT_SYMBOL drivers/parport/parport 0x94368b62	parport_wait_peripheral
+EXPORT_SYMBOL drivers/parport/parport 0x99615328	parport_claim_or_block
+EXPORT_SYMBOL drivers/parport/parport 0x9d5eff70	parport_irq_handler
+EXPORT_SYMBOL drivers/parport/parport 0xa51b35fa	parport_ieee1284_write_compat
+EXPORT_SYMBOL drivers/parport/parport 0xa5c7dae8	parport_ieee1284_read_nibble
+EXPORT_SYMBOL drivers/parport/parport 0xa6272105	parport_claim
+EXPORT_SYMBOL drivers/parport/parport 0xa817faf4	parport_ieee1284_ecp_write_data
+EXPORT_SYMBOL drivers/parport/parport 0xabdef775	parport_find_base
+EXPORT_SYMBOL drivers/parport/parport 0xae1e7e5f	parport_read
+EXPORT_SYMBOL drivers/parport/parport 0xae8d6307	parport_ieee1284_epp_write_addr
+EXPORT_SYMBOL drivers/parport/parport 0xba17e575	parport_unregister_device
+EXPORT_SYMBOL drivers/parport/parport 0xc0818daf	parport_ieee1284_ecp_write_addr
+EXPORT_SYMBOL drivers/parport/parport 0xc2385bc9	parport_register_driver
+EXPORT_SYMBOL drivers/parport/parport 0xc61b145c	parport_ieee1284_epp_write_data
+EXPORT_SYMBOL drivers/parport/parport 0xc8d3f917	parport_get_port
+EXPORT_SYMBOL drivers/parport/parport 0xe01b7b56	parport_negotiate
+EXPORT_SYMBOL drivers/parport/parport 0xe14ba8c6	parport_release
+EXPORT_SYMBOL drivers/parport/parport_pc 0x54c8a414	parport_pc_unregister_port
+EXPORT_SYMBOL drivers/parport/parport_pc 0xf5d38378	parport_pc_probe_port
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x043c5740	pcmcia_request_irq
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x056e5b50	pcmcia_dev_present
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x09190335	pcmcia_get_mem_page
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4fd033a0	pcmcia_error_func
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x5307ee4d	pcmcia_get_window
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x5e772742	pcmcia_access_configuration_register
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x5f879378	pcmcia_register_driver
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x6193c138	pcmcia_request_window
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x6fe841a3	pcmcia_release_window
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x894fb27e	pcmcia_modify_configuration
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x9d1f6b50	pcmcia_unregister_driver
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xa1e849d2	pcmcia_request_io
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xa884cc78	pcmcia_disable_device
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xbaa2db8d	pcmcia_map_mem_page
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xe049d74b	pcmcia_loop_config
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf0a25e12	pcmcia_error_ret
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xff7d8f32	pcmcia_request_configuration
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x074c36ef	pcmcia_socket_dev_suspend
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x0b16586b	destroy_cis_cache
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x1a43004c	pcmcia_resume_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x1f243d26	pcmcia_read_cis_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x212db8d2	pcmcia_socket_list
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x29a0875b	pcmcia_register_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x2a2e8ce7	pccard_validate_cis
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x2e16b997	pcmcia_socket_dev_resume
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x33f691ac	pcmcia_socket_list_rwsem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x34504621	pcmcia_suspend_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x361626eb	pcmcia_socket_dev_late_resume
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x452c5ccb	pcmcia_unregister_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x45c443f0	pcmcia_socket_dev_early_resume
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x544c1dc1	pcmcia_write_cis_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x55ac249f	pcmcia_parse_events
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x646b4a7e	pccard_read_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x7962438a	pccard_get_next_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x816230ba	pccard_get_tuple_data
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x83209c22	pcmcia_validate_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x8f46aa9f	pcmcia_adjust_io_region
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xa41b0e9a	release_cis_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xa8502699	pcmcia_reset_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xa90a23f1	pcmcia_get_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xa9e9fb8c	pcmcia_replace_cis
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xb867281f	pccard_register_pcmcia
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc02ef2c8	pcmcia_parse_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcb053761	pcmcia_put_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcf97f3bd	dead_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xd8562f75	pcmcia_find_mem_region
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xda1248e8	pcmcia_find_io_region
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xdb774c2c	pcmcia_get_socket_by_nr
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xdc2c6d6d	pccard_static_ops
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xed84483a	pccard_get_first_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf0543f2a	pcmcia_socket_class
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf91c0b2c	pcmcia_insert_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xfd02ab6f	pcmcia_eject_card
+EXPORT_SYMBOL drivers/pcmcia/rsrc_nonstatic 0x28fb239f	pccard_nonstatic_ops
+EXPORT_SYMBOL drivers/pps/pps_core 0x1e145952	pps_unregister_source
+EXPORT_SYMBOL drivers/pps/pps_core 0xaa7b2f21	pps_register_source
+EXPORT_SYMBOL drivers/pps/pps_core 0xe6a16116	pps_event
+EXPORT_SYMBOL drivers/sbus/char/bbc 0x0e8d8f7d	bbc_i2c_write_buf
+EXPORT_SYMBOL drivers/sbus/char/bbc 0x36c32b41	bbc_i2c_readb
+EXPORT_SYMBOL drivers/sbus/char/bbc 0x68829c32	bbc_i2c_detach
+EXPORT_SYMBOL drivers/sbus/char/bbc 0x8a084ea8	bbc_i2c_read_buf
+EXPORT_SYMBOL drivers/sbus/char/bbc 0xb43f0443	bbc_i2c_getdev
+EXPORT_SYMBOL drivers/sbus/char/bbc 0xbb5ba667	bbc_i2c_attach
+EXPORT_SYMBOL drivers/sbus/char/bbc 0xf948e6f8	bbc_i2c_writeb
+EXPORT_SYMBOL drivers/scsi/esp_scsi 0x17ffea1d	scsi_esp_unregister
+EXPORT_SYMBOL drivers/scsi/esp_scsi 0x658a76c9	scsi_esp_intr
+EXPORT_SYMBOL drivers/scsi/esp_scsi 0x68a8a277	scsi_esp_cmd
+EXPORT_SYMBOL drivers/scsi/esp_scsi 0x6ccf1595	scsi_esp_register
+EXPORT_SYMBOL drivers/scsi/esp_scsi 0x86a8d8f4	scsi_esp_template
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x2d03029e	fcoe_ctlr_init
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x37361e34	fcoe_ctlr_recv_flogi
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x67ab1829	fcoe_ctlr_destroy
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x76ce1dbf	fcoe_ctlr_link_up
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x78402758	fcoe_ctlr_recv
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x83a2a783	fcoe_ctlr_els_send
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xa2457c5f	fcoe_ctlr_link_down
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x076a0909	fc_seq_start_next
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0ca44b48	fc_linkdown
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1891f26c	fc_slave_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x194cc641	fc_set_mfs
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1a23be74	fc_lport_destroy
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x20a6e796	fc_exch_recv
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x242d6fe5	fc_get_host_port_state
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x24c78e70	fc_exch_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x2bea53fa	fc_exch_seq_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x2c0cda40	fc_seq_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x36e5fbaf	fc_cpu_mask
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x39632060	fc_change_queue_type
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x3da70d9f	fc_fcp_complete
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x4a65bf2f	fc_eh_abort
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x4e12a7be	fc_exch_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x56183917	fc_destroy_rport
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x5c34f3f9	fc_rport_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x5cf13562	fc_queuecommand
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x5e839578	fc_fcp_ddp_setup
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x67750428	fc_exch_done
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6cf59e02	fc_linkup
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x740e75d0	fc_set_rport_loss_tmo
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x78c6f589	fc_disc_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x7b05cbd6	fc_seq_els_rsp_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x80e82cc5	fc_lport_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x8c204994	fc_get_host_port_type
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa1a2ccca	fc_elsct_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xac238a7a	fc_frame_crc_check
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb4b64e0a	fc_lport_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb6f95579	fc_rport_terminate_io
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xbaf0ae5b	fc_exch_mgr_free
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xc0897a88	fc_fabric_logoff
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xc4628d6c	fc_eh_host_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xcaa2d145	fc_exch_mgr_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd13cab87	fc_exch_mgr_del
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd2c050b0	fc_fabric_login
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd3d1f9c2	fc_fcp_destroy
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd522b3fe	fc_exch_mgr_add
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd6cb3359	fc_setup_rport
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xdd3efcc9	fc_lport_config
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe16a4715	fc_change_queue_depth
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe8863876	fc_eh_device_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe8dcc846	fc_fcp_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xee445814	__fc_frame_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf6c2612f	fc_get_host_stats
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf7365d60	fc_seq_exch_abort
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf991f885	fc_exch_mgr_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xfe04d98e	fc_get_host_speed
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x2250c66e	mraid_mm_adapter_app_handle
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x512c956d	mraid_mm_unregister_adp
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x8dda5d1d	mraid_mm_register_adp
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0562caa6	osd_req_list_collection_objects
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0c17edb1	osd_sec_init_nosec_doall_caps
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0c2fe6e6	osd_dev_fini
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0cf0ac7b	osd_dev_init
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x11df44fb	osd_req_add_set_attr_list
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x1754d1e2	osd_req_remove_partition
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x18424468	osd_req_create_object
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x186289c0	osd_req_add_get_attr_list
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x18b739de	osd_req_list_partition_collections
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x256ea512	osd_req_set_attributes
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x36f75c5d	osd_req_flush_object
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x4bfcc68c	osd_req_list_dev_partitions
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x4e2ee76d	osd_req_flush_collection
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x5294a314	osd_req_remove_object
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x62dffc65	osd_finalize_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x7087ba04	osd_req_flush_partition
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x717c7b3d	osd_req_flush_obsd
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x79e18086	osd_req_get_attributes
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x7ed9c270	osd_req_format
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x9141b6c1	osd_auto_detect_ver
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xa57449a0	osd_req_create_partition
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xb0153383	osd_end_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xb84bfd0f	osd_req_read_kern
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xbda88375	osd_req_add_get_attr_page
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xbe4d462b	osd_req_write
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xc7ace1e3	osd_req_decode_get_attr_list
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xcc08fc1f	osd_execute_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xce7098b7	osd_execute_request_async
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xd8ff973d	osd_req_decode_sense_full
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe23fb2f4	osd_start_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe45ebe4d	osd_req_read
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xeea579a4	osd_req_write_kern
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xf426604f	osd_req_list_partition_objects
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x097fce10	osduld_put_device
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x11425c54	osduld_register_test
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x2ccb7597	osduld_path_lookup
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x5fc48609	osduld_unregister_test
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x0adb7856	qlogicfas408_disable_ints
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x3fd8cd71	qlogicfas408_detect
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x57c98871	qlogicfas408_queuecommand
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x7ffee344	qlogicfas408_biosparam
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xc766be0f	qlogicfas408_bus_reset
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xdc310b12	qlogicfas408_ihandl
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xe76b3b20	qlogicfas408_get_chip_type
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xed93a5ca	qlogicfas408_info
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xf2b95199	qlogicfas408_setup
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xf9fab13e	qlogicfas408_abort
+EXPORT_SYMBOL drivers/scsi/raid_class 0x66af416f	raid_class_attach
+EXPORT_SYMBOL drivers/scsi/raid_class 0xdd894d3d	raid_component_add
+EXPORT_SYMBOL drivers/scsi/raid_class 0xf6a2c957	raid_class_release
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x032790ae	scsi_target_quiesce
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x03f04af6	scsi_allocate_command
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x045c379f	scsi_cmd_print_sense_hdr
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x07d9b783	scsi_nl_send_vendor_msg
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x091133d2	scsi_register_interface
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x09951e5c	scsi_get_host_dev
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x0c65e73c	scsi_normalize_sense
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x0c8c9e99	scsi_show_extd_sense
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x11267875	scsi_extd_sense_format
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x1197bb3c	scsi_is_sdev_device
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x120aaa32	scsi_add_host_with_dma
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x132448ed	scsi_report_bus_reset
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x17acd54d	scsi_target_resume
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x1ac7c1a2	scsi_add_device
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x1b7d6f12	scsi_device_put
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x1b9e0ff1	scsilun_to_int
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x22323b58	scsi_unregister
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x2356bcb4	scsi_remove_host
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x2408d2aa	scsi_bios_ptable
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x2659a278	scsi_remove_target
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x28a2ed02	scsi_build_sense_buffer
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x2b0ba2b0	scsi_sense_desc_find
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x2d89342a	scsi_show_sense_hdr
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x2f5ea9e6	scsi_remove_device
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x320c594c	scsi_host_get
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x377d65b5	scsi_setup_fs_cmnd
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x392a698d	scsi_rescan_device
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x3d1e236c	scsi_prep_return
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x40a27c37	scsi_dev_info_remove_list
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x44eee98a	__starget_for_each_device
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x48f24afa	scsi_nonblockable_ioctl
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x4abd287d	scsi_register_driver
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x4afe9a77	scsi_partsize
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x4b18299f	starget_for_each_device
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x4e397f49	scsi_print_result
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x514a8fa5	scsi_execute_req
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x561935c6	scsi_mode_sense
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x56c8799d	scsi_kunmap_atomic_sg
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x573d0483	scsi_get_device_flags_keyed
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x57a4e1a2	scsi_block_requests
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x5e8eb2e3	__scsi_alloc_queue
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x600e536d	scsi_device_get
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x635baaba	scsi_command_normalize_sense
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x654d5143	scsi_device_quiesce
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x69d38ed9	__scsi_print_sense
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x6b58eb8d	scsi_eh_prep_cmnd
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x6f1f05e2	scsi_is_host_device
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x7139cbb0	scsi_reset_provider
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x72ea7b2d	scsi_device_type
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x78eb1958	__scsi_device_lookup_by_target
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x796fc5ce	scsi_get_sense_info_fld
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x7b33c489	scsi_free_command
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x7dcf5fc1	scsi_print_sense
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x7e2dd943	scsi_put_command
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x817622de	scsi_setup_blk_pc_cmnd
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x82498aba	scsicam_bios_param
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x82e18c6b	__scsi_put_command
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x82e410aa	scsi_host_lookup
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x872e0070	scsi_prep_state_check
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x8a45f624	__scsi_iterate_devices
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x8c05323d	scsi_device_lookup
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x93d74931	scsi_scan_host
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x96cd2b04	scsi_sense_key_string
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x97e57a85	scsi_scan_target
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x98e5bd9c	scsi_free_host_dev
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x9c2e43bf	scsi_set_medium_removal
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x9cfd56c5	scsi_print_status
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x9e214585	scsi_device_lookup_by_target
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x9e443566	scsi_init_io
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xa0571aa4	scsi_ioctl
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xa60fe486	scsi_eh_finish_cmd
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xb4709322	scsi_dev_info_add_list
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xb4c1f17d	scsi_calculate_bounce_limit
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xb5fcfd30	__scsi_add_device
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xb6c5a973	scsi_show_result
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xc9defa99	scsi_release_buffers
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xca5dbc50	scsi_print_sense_hdr
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xcceaea0f	scsi_dma_map
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xceb9bf5d	scsi_dma_unmap
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xd4a4fc3d	scsi_prep_fn
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xd4f76ae7	scsi_report_device_reset
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xd66ce7b1	scsi_register
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xda4e727a	__scsi_device_lookup
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xdc047fc4	scsi_dev_info_list_add_keyed
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xdcb57363	scsi_device_resume
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xddb5e163	scsi_host_set_state
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xe5a0d8f2	scsi_device_set_state
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xe9452d82	scsi_eh_restore_cmnd
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xea10212a	int_to_scsilun
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xec5ecd5f	scsi_test_unit_ready
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xee34433e	scsi_print_command
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xefb653eb	scsi_host_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xf04d4f4b	scsi_get_command
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xf0a18cb3	scsi_adjust_queue_depth
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xf44724b4	scsi_unblock_requests
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xf765aa61	scsi_is_target_device
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xf811e69d	scsi_eh_flush_done_q
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xf8d390f9	scsi_host_put
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xf984c5e1	scsi_block_when_processing_errors
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xfbaa41e3	scsi_kmap_atomic_sg
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xfc369b70	scsi_track_queue_full
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xfebd2cbc	scsi_execute
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xfef96e23	__scsi_print_command
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xff207721	scsi_finish_command
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x06b411ff	fc_remove_host
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x0c92afac	fc_remote_port_rolechg
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x0dfc863d	fc_vport_create
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x1f2a7af5	fc_host_post_vendor_event
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x29a57166	fc_attach_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x36d47e32	fc_host_post_event
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x75a45f86	fc_remote_port_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x7954b1ea	fc_get_event_number
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x8caddd96	scsi_is_fc_vport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xbd91ebe5	fc_release_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xd3ddb429	fc_remote_port_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xdbfcc861	fc_vport_terminate
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xdc161c65	scsi_is_fc_rport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x01a6027a	sas_remove_children
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x0a3b45f5	sas_phy_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x10892549	sas_phy_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x24ea7f1e	sas_port_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x2db08565	scsi_is_sas_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x32c892c3	sas_read_port_mode_page
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x3867e062	sas_remove_host
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x38d745da	sas_end_device_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x482bb64b	sas_rphy_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x5555bc44	sas_port_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x59a443f8	sas_phy_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x5dc468f6	sas_phy_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x61b40b0d	sas_rphy_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x62bcdaa8	scsi_is_sas_port
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x6ecd49fd	sas_attach_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x775685f1	sas_expander_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x798e6688	sas_port_delete_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xad44a0cb	sas_rphy_remove
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xc29ea8d2	sas_port_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xc98810bc	sas_port_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xd17da845	sas_port_add_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xd2cb7aeb	sas_port_mark_backlink
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xd4b59121	sas_release_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xe79707c2	scsi_is_sas_rphy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xefb15fce	sas_rphy_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xf901bc38	sas_port_alloc_num
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x3453efc8	spi_dv_device
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x3686ea09	spi_print_msg
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x59f25c9d	spi_schedule_dv_device
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x60350e9b	spi_release_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x60a467d1	spi_attach_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x9bcbe98e	spi_display_xfer_agreement
+EXPORT_SYMBOL drivers/serial/8250 0x7d8c2877	serial8250_register_port
+EXPORT_SYMBOL drivers/serial/8250 0xc7208c3a	serial8250_resume_port
+EXPORT_SYMBOL drivers/serial/8250 0xcc248d26	serial8250_suspend_port
+EXPORT_SYMBOL drivers/serial/8250 0xcefcd99a	serial8250_unregister_port
+EXPORT_SYMBOL drivers/ssb/ssb 0x089438ad	ssb_bus_unregister
+EXPORT_SYMBOL drivers/ssb/ssb 0x1370b37d	ssb_bus_powerup
+EXPORT_SYMBOL drivers/ssb/ssb 0x1da701d0	ssb_device_is_enabled
+EXPORT_SYMBOL drivers/ssb/ssb 0x23d8e465	ssb_pmu_set_ldo_paref
+EXPORT_SYMBOL drivers/ssb/ssb 0x3c8eebca	ssb_bus_pcibus_register
+EXPORT_SYMBOL drivers/ssb/ssb 0x3fb7f951	ssb_pmu_set_ldo_voltage
+EXPORT_SYMBOL drivers/ssb/ssb 0x41aafa7f	ssb_bus_suspend
+EXPORT_SYMBOL drivers/ssb/ssb 0x627e19c4	ssb_pcicore_dev_irqvecs_enable
+EXPORT_SYMBOL drivers/ssb/ssb 0x6521c335	ssb_bus_may_powerdown
+EXPORT_SYMBOL drivers/ssb/ssb 0x6db1ff1d	ssb_device_disable
+EXPORT_SYMBOL drivers/ssb/ssb 0x8d9ddbc7	ssb_device_enable
+EXPORT_SYMBOL drivers/ssb/ssb 0xa0fd37b0	ssb_driver_unregister
+EXPORT_SYMBOL drivers/ssb/ssb 0xa31c9d69	ssb_bus_resume
+EXPORT_SYMBOL drivers/ssb/ssb 0xc0512e0f	ssb_admatch_base
+EXPORT_SYMBOL drivers/ssb/ssb 0xc1e75259	ssb_dma_set_mask
+EXPORT_SYMBOL drivers/ssb/ssb 0xc3d1e781	ssb_dma_free_consistent
+EXPORT_SYMBOL drivers/ssb/ssb 0xc40acc1a	__ssb_driver_register
+EXPORT_SYMBOL drivers/ssb/ssb 0xd27897b2	ssb_pcihost_register
+EXPORT_SYMBOL drivers/ssb/ssb 0xd481192b	ssb_admatch_size
+EXPORT_SYMBOL drivers/ssb/ssb 0xd9cee9a8	ssb_dma_alloc_consistent
+EXPORT_SYMBOL drivers/ssb/ssb 0xe0a10bc4	ssb_bus_sdiobus_register
+EXPORT_SYMBOL drivers/ssb/ssb 0xe55c0431	ssb_dma_translation
+EXPORT_SYMBOL drivers/ssb/ssb 0xe75ac9ba	ssb_set_devtypedata
+EXPORT_SYMBOL drivers/ssb/ssb 0xf186f532	ssb_clockspeed
+EXPORT_SYMBOL drivers/telephony/ixj 0x51194dd3	ixj_pcmcia_probe
+EXPORT_SYMBOL drivers/telephony/phonedev 0x8e7a836f	phone_unregister_device
+EXPORT_SYMBOL drivers/telephony/phonedev 0x9156ce82	phone_register_device
+EXPORT_SYMBOL drivers/usb/host/sl811-hcd 0x3978c56e	sl811h_driver
+EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xa64a4cea	usb_nop_xceiv_unregister
+EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xd0e43207	usb_nop_xceiv_register
+EXPORT_SYMBOL drivers/usb/serial/usbserial 0x0177a27b	usb_serial_suspend
+EXPORT_SYMBOL drivers/usb/serial/usbserial 0xf1d834f5	usb_serial_resume
+EXPORT_SYMBOL drivers/video/backlight/generic_bl 0xc86baa7c	corgibl_limit_intensity
+EXPORT_SYMBOL drivers/video/backlight/lcd 0x711b88db	lcd_device_unregister
+EXPORT_SYMBOL drivers/video/backlight/lcd 0xca2fd74c	lcd_device_register
+EXPORT_SYMBOL drivers/video/display/display 0x834fa4e8	display_device_register
+EXPORT_SYMBOL drivers/video/display/display 0xda5aaca9	display_device_unregister
+EXPORT_SYMBOL drivers/video/output 0x6f9f3ac1	video_output_unregister
+EXPORT_SYMBOL drivers/video/output 0x93359e68	video_output_register
+EXPORT_SYMBOL drivers/video/svgalib 0x00d1fce9	svga_set_default_seq_regs
+EXPORT_SYMBOL drivers/video/svgalib 0x05372966	svga_get_tilemax
+EXPORT_SYMBOL drivers/video/svgalib 0x07b3da30	svga_wseq_multi
+EXPORT_SYMBOL drivers/video/svgalib 0x1b95c56a	svga_check_timings
+EXPORT_SYMBOL drivers/video/svgalib 0x5f42976d	svga_tilecopy
+EXPORT_SYMBOL drivers/video/svgalib 0x63e898d1	svga_set_default_crt_regs
+EXPORT_SYMBOL drivers/video/svgalib 0x7a3ae959	svga_wcrt_multi
+EXPORT_SYMBOL drivers/video/svgalib 0x7ed2cad4	svga_settile
+EXPORT_SYMBOL drivers/video/svgalib 0x80408443	svga_set_timings
+EXPORT_SYMBOL drivers/video/svgalib 0x80673c8a	svga_get_caps
+EXPORT_SYMBOL drivers/video/svgalib 0x87cdbe29	svga_tilefill
+EXPORT_SYMBOL drivers/video/svgalib 0x8fa8438b	svga_set_textmode_vga_regs
+EXPORT_SYMBOL drivers/video/svgalib 0xab3b22ad	svga_set_default_gfx_regs
+EXPORT_SYMBOL drivers/video/svgalib 0xb7deaf9c	svga_tileblit
+EXPORT_SYMBOL drivers/video/svgalib 0xdad682b1	svga_set_default_atc_regs
+EXPORT_SYMBOL drivers/video/svgalib 0xeb92243a	svga_tilecursor
+EXPORT_SYMBOL drivers/video/svgalib 0xec83c473	svga_match_format
+EXPORT_SYMBOL drivers/video/svgalib 0xef774f5d	svga_compute_pll
+EXPORT_SYMBOL drivers/video/syscopyarea 0xee56b5cf	sys_copyarea
+EXPORT_SYMBOL drivers/video/sysfillrect 0x5c8505ed	sys_fillrect
+EXPORT_SYMBOL drivers/video/sysimgblt 0xe7bababd	sys_imageblit
+EXPORT_SYMBOL drivers/video/vgastate 0x686de290	restore_vga
+EXPORT_SYMBOL drivers/video/vgastate 0xe7a2620e	save_vga
+EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x8b9d5506	w1_bq27000_read
+EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x8d4068e2	w1_bq27000_write
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x1d860245	w1_ds2760_write
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x29a76e35	w1_ds2760_store_eeprom
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x4ec9786c	w1_ds2760_read
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0xb9d5bbd6	w1_ds2760_recall_eeprom
+EXPORT_SYMBOL drivers/w1/wire 0x6cb71cc0	w1_unregister_family
+EXPORT_SYMBOL drivers/w1/wire 0x878e525b	w1_remove_master_device
+EXPORT_SYMBOL drivers/w1/wire 0xaa3b34aa	w1_register_family
+EXPORT_SYMBOL drivers/w1/wire 0xe7ce1ca5	w1_add_master_device
+EXPORT_SYMBOL fs/configfs/configfs 0x014c9b6d	config_item_init
+EXPORT_SYMBOL fs/configfs/configfs 0x308ca573	config_group_init_type_name
+EXPORT_SYMBOL fs/configfs/configfs 0x49165814	configfs_unregister_subsystem
+EXPORT_SYMBOL fs/configfs/configfs 0x93f5af70	config_item_init_type_name
+EXPORT_SYMBOL fs/configfs/configfs 0x9652bfbc	configfs_undepend_item
+EXPORT_SYMBOL fs/configfs/configfs 0x9f1af723	config_item_set_name
+EXPORT_SYMBOL fs/configfs/configfs 0xa2e9ee24	configfs_depend_item
+EXPORT_SYMBOL fs/configfs/configfs 0xb5cb4450	config_group_find_item
+EXPORT_SYMBOL fs/configfs/configfs 0xb6877774	config_item_get
+EXPORT_SYMBOL fs/configfs/configfs 0xc3b63e63	config_item_put
+EXPORT_SYMBOL fs/configfs/configfs 0xd4ea3eb7	config_group_init
+EXPORT_SYMBOL fs/configfs/configfs 0xe1859501	configfs_register_subsystem
+EXPORT_SYMBOL fs/fscache/fscache 0x07d9b576	fscache_wait_bit_interruptible
+EXPORT_SYMBOL fs/fscache/fscache 0x09ce58d9	__fscache_read_or_alloc_page
+EXPORT_SYMBOL fs/fscache/fscache 0x27e72ee8	__fscache_read_or_alloc_pages
+EXPORT_SYMBOL fs/fscache/fscache 0x34218099	__fscache_check_page_write
+EXPORT_SYMBOL fs/fscache/fscache 0x3763408b	__fscache_register_netfs
+EXPORT_SYMBOL fs/fscache/fscache 0x3fc23318	fscache_wait_bit
+EXPORT_SYMBOL fs/fscache/fscache 0x496932b9	fscache_op_debug_id
+EXPORT_SYMBOL fs/fscache/fscache 0x66931490	fscache_enqueue_operation
+EXPORT_SYMBOL fs/fscache/fscache 0x74272d5c	__fscache_unregister_netfs
+EXPORT_SYMBOL fs/fscache/fscache 0x74a88261	__fscache_uncache_page
+EXPORT_SYMBOL fs/fscache/fscache 0x76181425	fscache_withdraw_cache
+EXPORT_SYMBOL fs/fscache/fscache 0x76f5c592	__fscache_alloc_page
+EXPORT_SYMBOL fs/fscache/fscache 0x81e1bca6	__fscache_update_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0x843041f9	fscache_object_lookup_negative
+EXPORT_SYMBOL fs/fscache/fscache 0x86f8894f	fscache_object_states
+EXPORT_SYMBOL fs/fscache/fscache 0x9a9b9558	__fscache_write_page
+EXPORT_SYMBOL fs/fscache/fscache 0xa2f746f2	fscache_put_operation
+EXPORT_SYMBOL fs/fscache/fscache 0xab91d526	fscache_fsdef_index
+EXPORT_SYMBOL fs/fscache/fscache 0xb37d91ab	__fscache_acquire_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0xd0395bb4	fscache_mark_pages_cached
+EXPORT_SYMBOL fs/fscache/fscache 0xd2bc3356	__fscache_wait_on_page_write
+EXPORT_SYMBOL fs/fscache/fscache 0xd369dfda	fscache_io_error
+EXPORT_SYMBOL fs/fscache/fscache 0xdb247263	fscache_add_cache
+EXPORT_SYMBOL fs/fscache/fscache 0xe27b89c2	fscache_object_slow_work_ops
+EXPORT_SYMBOL fs/fscache/fscache 0xe27f8e50	fscache_obtained_object
+EXPORT_SYMBOL fs/fscache/fscache 0xe357695f	__fscache_maybe_release_page
+EXPORT_SYMBOL fs/fscache/fscache 0xebd812a8	fscache_cache_cleared_wq
+EXPORT_SYMBOL fs/fscache/fscache 0xebe8d2ba	__fscache_attr_changed
+EXPORT_SYMBOL fs/fscache/fscache 0xf46aea2a	fscache_check_aux
+EXPORT_SYMBOL fs/fscache/fscache 0xf7622947	__fscache_relinquish_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0xf7645e0c	fscache_init_cache
+EXPORT_SYMBOL fs/nfsd/nfsd 0x1f573533	nfs4_acl_posix_to_nfsv4
+EXPORT_SYMBOL fs/nfsd/nfsd 0x35e33c1e	nfs4_acl_write_who
+EXPORT_SYMBOL fs/nfsd/nfsd 0x5a157ae4	nfs4_acl_get_whotype
+EXPORT_SYMBOL fs/nfsd/nfsd 0x96ce9bb4	nfs4_acl_new
+EXPORT_SYMBOL fs/nfsd/nfsd 0xdb389aec	nfs4_acl_nfsv4_to_posix
+EXPORT_SYMBOL fs/quota/quota_tree 0x13064ec3	qtree_read_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0x711786c9	qtree_release_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0x95b61c9c	qtree_write_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0xdaf6d50e	qtree_delete_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0xf724d7cc	qtree_entry_unused
+EXPORT_SYMBOL lib/crc-ccitt 0x651c2313	crc_ccitt
+EXPORT_SYMBOL lib/crc-ccitt 0x75811312	crc_ccitt_table
+EXPORT_SYMBOL lib/crc-itu-t 0x276c7e62	crc_itu_t
+EXPORT_SYMBOL lib/crc-itu-t 0xd29b009f	crc_itu_t_table
+EXPORT_SYMBOL lib/crc-t10dif 0x782acba5	crc_t10dif
+EXPORT_SYMBOL lib/crc7 0xc086bfba	crc7
+EXPORT_SYMBOL lib/crc7 0xd80c3603	crc7_syndrome_table
+EXPORT_SYMBOL lib/libcrc32c 0x27000b29	crc32c
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x315c65fd	zlib_deflateInit2
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x48034724	zlib_deflateReset
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xaf64ad0d	zlib_deflate
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf0caf44b	zlib_deflate_workspacesize
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf741c793	zlib_deflateEnd
+EXPORT_SYMBOL net/802/p8022 0x591e3099	unregister_8022_client
+EXPORT_SYMBOL net/802/p8022 0xbede173c	register_8022_client
+EXPORT_SYMBOL net/802/p8023 0x10c4e5f4	make_8023_client
+EXPORT_SYMBOL net/802/p8023 0xa0fca7fe	destroy_8023_client
+EXPORT_SYMBOL net/802/psnap 0x35a672b1	register_snap_client
+EXPORT_SYMBOL net/802/psnap 0x5d1aaace	unregister_snap_client
+EXPORT_SYMBOL net/9p/9pnet 0x01c0f44f	p9_idpool_check
+EXPORT_SYMBOL net/9p/9pnet 0x05df0ed8	p9_tag_lookup
+EXPORT_SYMBOL net/9p/9pnet 0x06998142	p9_client_cb
+EXPORT_SYMBOL net/9p/9pnet 0x0b3ac49a	p9pdu_dump
+EXPORT_SYMBOL net/9p/9pnet 0x0c574953	p9_client_write
+EXPORT_SYMBOL net/9p/9pnet 0x1753f955	p9_idpool_destroy
+EXPORT_SYMBOL net/9p/9pnet 0x175e721b	p9_idpool_get
+EXPORT_SYMBOL net/9p/9pnet 0x3d73a797	p9_errstr2errno
+EXPORT_SYMBOL net/9p/9pnet 0x402ec6b3	p9_client_clunk
+EXPORT_SYMBOL net/9p/9pnet 0x41e6bc51	p9_parse_header
+EXPORT_SYMBOL net/9p/9pnet 0x46b4b02c	v9fs_get_trans_by_name
+EXPORT_SYMBOL net/9p/9pnet 0x4fb45a54	p9_client_create
+EXPORT_SYMBOL net/9p/9pnet 0x51f24997	v9fs_register_trans
+EXPORT_SYMBOL net/9p/9pnet 0x5376d4ae	p9_client_wstat
+EXPORT_SYMBOL net/9p/9pnet 0x56d356ce	p9_client_read
+EXPORT_SYMBOL net/9p/9pnet 0x61d9b2f3	p9_client_open
+EXPORT_SYMBOL net/9p/9pnet 0x6c262ac2	p9_client_destroy
+EXPORT_SYMBOL net/9p/9pnet 0x6e40e33b	v9fs_get_default_trans
+EXPORT_SYMBOL net/9p/9pnet 0x70ca9a20	p9_client_version
+EXPORT_SYMBOL net/9p/9pnet 0x76b79bf1	p9stat_read
+EXPORT_SYMBOL net/9p/9pnet 0x85e5f500	p9_idpool_put
+EXPORT_SYMBOL net/9p/9pnet 0x9c964743	p9stat_free
+EXPORT_SYMBOL net/9p/9pnet 0xa0cf8253	p9_client_remove
+EXPORT_SYMBOL net/9p/9pnet 0xa5ff602a	p9_client_disconnect
+EXPORT_SYMBOL net/9p/9pnet 0xc7aa0c7b	p9_client_fcreate
+EXPORT_SYMBOL net/9p/9pnet 0xcaac5874	p9_client_attach
+EXPORT_SYMBOL net/9p/9pnet 0xcf6e0d03	v9fs_unregister_trans
+EXPORT_SYMBOL net/9p/9pnet 0xd5a8fb00	p9_idpool_create
+EXPORT_SYMBOL net/9p/9pnet 0xe58a3360	p9_error_init
+EXPORT_SYMBOL net/9p/9pnet 0xe711fa8f	p9_client_stat
+EXPORT_SYMBOL net/9p/9pnet 0xea8f33e7	p9_client_walk
+EXPORT_SYMBOL net/9p/9pnet 0xefcb2fbc	p9_client_auth
+EXPORT_SYMBOL net/appletalk/appletalk 0x3b997d17	aarp_send_ddp
+EXPORT_SYMBOL net/appletalk/appletalk 0x69d0914d	atrtr_get_dev
+EXPORT_SYMBOL net/appletalk/appletalk 0x82ffa841	atalk_find_dev_addr
+EXPORT_SYMBOL net/appletalk/appletalk 0xd7d204cf	alloc_ltalkdev
+EXPORT_SYMBOL net/atm/atm 0x0436dfe3	atm_proc_root
+EXPORT_SYMBOL net/atm/atm 0x12bb13b1	deregister_atm_ioctl
+EXPORT_SYMBOL net/atm/atm 0x1a24e5e2	sonet_subtract_stats
+EXPORT_SYMBOL net/atm/atm 0x2cc2d52d	vcc_hash
+EXPORT_SYMBOL net/atm/atm 0x31eb46b9	vcc_sklist_lock
+EXPORT_SYMBOL net/atm/atm 0x6a4a8004	atm_dev_deregister
+EXPORT_SYMBOL net/atm/atm 0x6a51a2f6	vcc_insert_socket
+EXPORT_SYMBOL net/atm/atm 0x746334ac	atm_alloc_charge
+EXPORT_SYMBOL net/atm/atm 0x88c92960	register_atm_ioctl
+EXPORT_SYMBOL net/atm/atm 0x89195dc3	sonet_copy_stats
+EXPORT_SYMBOL net/atm/atm 0x97aa6cd6	atm_charge
+EXPORT_SYMBOL net/atm/atm 0xb8f2b60b	atm_dev_register
+EXPORT_SYMBOL net/atm/atm 0xd0e2caff	atm_init_aal5
+EXPORT_SYMBOL net/atm/atm 0xd7053063	vcc_release_async
+EXPORT_SYMBOL net/atm/atm 0xda303d87	atm_dev_lookup
+EXPORT_SYMBOL net/atm/atm 0xf49bc67a	atm_pcr_goal
+EXPORT_SYMBOL net/bridge/bridge 0x4809645c	br_should_route_hook
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x1d2b81fd	ebt_do_table
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0xce5a250d	ebt_unregister_table
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0xda88b894	ebt_register_table
+EXPORT_SYMBOL net/can/can 0x1dcc3ec9	can_rx_register
+EXPORT_SYMBOL net/can/can 0x4e285bb2	can_proto_register
+EXPORT_SYMBOL net/can/can 0x587725d4	can_rx_unregister
+EXPORT_SYMBOL net/can/can 0x94fa85f1	can_proto_unregister
+EXPORT_SYMBOL net/can/can 0xa1fab483	can_send
+EXPORT_SYMBOL net/ieee802154/nl802154 0x1aeffe59	ieee802154_nl_disassoc_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0x20e68f1c	ieee802154_nl_assoc_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0x31461dd3	ieee802154_nl_disassoc_indic
+EXPORT_SYMBOL net/ieee802154/nl802154 0x67aa82b6	ieee802154_nl_beacon_indic
+EXPORT_SYMBOL net/ieee802154/nl802154 0xbd112083	ieee802154_nl_assoc_indic
+EXPORT_SYMBOL net/ieee802154/nl802154 0xc0985703	ieee802154_nl_start_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0xe14e4f1e	ieee802154_nl_scan_confirm
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x04f55218	wpan_phy_register
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x25849126	wpan_phy_find
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x443208b2	wpan_phy_unregister
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x698df09e	wpan_phy_free
+EXPORT_SYMBOL net/ieee802154/wpan-class 0xe10e71ea	wpan_phy_alloc
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x10f5f580	arpt_register_table
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x18179cd6	arpt_do_table
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xb6f1835f	arpt_unregister_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x4e46bcae	ipt_unregister_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0xe8abefc0	ipt_register_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0xfe88fd99	ipt_do_table
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x192a3759	nf_nat_protocol_register
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x26eb979f	nf_nat_mangle_tcp_packet
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x4d3bb8a2	nf_nat_mangle_udp_packet
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xa874f3c9	nf_nat_follow_master
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xcdae09e5	nf_nat_used_tuple
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xcf8693c9	nf_nat_setup_info
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xd3d9ee45	nf_nat_protocol_unregister
+EXPORT_SYMBOL net/ipv4/tunnel4 0x20122cf7	xfrm4_tunnel_deregister
+EXPORT_SYMBOL net/ipv4/tunnel4 0xcb0491b5	xfrm4_tunnel_register
+EXPORT_SYMBOL net/ipv6/ipv6 0x0b0d888b	icmpv6_err_convert
+EXPORT_SYMBOL net/ipv6/ipv6 0x0f54e35b	ipv6_dev_get_saddr
+EXPORT_SYMBOL net/ipv6/ipv6 0x104cbd36	inet6_register_protosw
+EXPORT_SYMBOL net/ipv6/ipv6 0x12a1c9e4	inet6_del_protocol
+EXPORT_SYMBOL net/ipv6/ipv6 0x1b9bdd37	ipv6_setsockopt
+EXPORT_SYMBOL net/ipv6/ipv6 0x1d9f52bf	ipv6_getsockopt
+EXPORT_SYMBOL net/ipv6/ipv6 0x2818de72	xfrm6_find_1stfragopt
+EXPORT_SYMBOL net/ipv6/ipv6 0x2901944a	rt6_lookup
+EXPORT_SYMBOL net/ipv6/ipv6 0x2b071415	in6_dev_finish_destroy
+EXPORT_SYMBOL net/ipv6/ipv6 0x30123eb5	icmpv6_statistics
+EXPORT_SYMBOL net/ipv6/ipv6 0x3d64fb7a	ndisc_mc_map
+EXPORT_SYMBOL net/ipv6/ipv6 0x4c684871	ipv6_chk_addr
+EXPORT_SYMBOL net/ipv6/ipv6 0x538383c0	unregister_inet6addr_notifier
+EXPORT_SYMBOL net/ipv6/ipv6 0x59fc2c80	icmpv6_send
+EXPORT_SYMBOL net/ipv6/ipv6 0x5b6694d6	ip6_route_me_harder
+EXPORT_SYMBOL net/ipv6/ipv6 0x5cfacd1c	xfrm6_rcv
+EXPORT_SYMBOL net/ipv6/ipv6 0x5d2615f0	inet6_add_protocol
+EXPORT_SYMBOL net/ipv6/ipv6 0x60dc49eb	ipv6_push_nfrag_opts
+EXPORT_SYMBOL net/ipv6/ipv6 0x69a3a818	inet6_getname
+EXPORT_SYMBOL net/ipv6/ipv6 0x6e4a5f7a	inet6_unregister_protosw
+EXPORT_SYMBOL net/ipv6/ipv6 0x7bdaa92f	ndisc_build_skb
+EXPORT_SYMBOL net/ipv6/ipv6 0x82ab96cb	xfrm6_prepare_output
+EXPORT_SYMBOL net/ipv6/ipv6 0x9062f4f9	ndisc_send_skb
+EXPORT_SYMBOL net/ipv6/ipv6 0x9123d769	ipv6_chk_prefix
+EXPORT_SYMBOL net/ipv6/ipv6 0x99b3b5be	inet6_release
+EXPORT_SYMBOL net/ipv6/ipv6 0x9aac527d	compat_ipv6_getsockopt
+EXPORT_SYMBOL net/ipv6/ipv6 0xab47d020	ip6_xmit
+EXPORT_SYMBOL net/ipv6/ipv6 0xac00c1e8	inet6_bind
+EXPORT_SYMBOL net/ipv6/ipv6 0xb2f1c3be	ip6_frag_init
+EXPORT_SYMBOL net/ipv6/ipv6 0xc4c7302a	nf_ip6_checksum
+EXPORT_SYMBOL net/ipv6/ipv6 0xc60013b2	ip6_frag_match
+EXPORT_SYMBOL net/ipv6/ipv6 0xce19bac5	register_inet6addr_notifier
+EXPORT_SYMBOL net/ipv6/ipv6 0xd02c4fa7	ip6_route_output
+EXPORT_SYMBOL net/ipv6/ipv6 0xd6161f41	compat_ipv6_setsockopt
+EXPORT_SYMBOL net/ipv6/ipv6 0xe1a81c3a	icmpv6msg_statistics
+EXPORT_SYMBOL net/ipv6/ipv6 0xe690b8fd	__ipv6_isatap_ifid
+EXPORT_SYMBOL net/ipv6/ipv6 0xf32a4f36	xfrm6_rcv_spi
+EXPORT_SYMBOL net/ipv6/ipv6 0xf849e0f6	inet6_ioctl
+EXPORT_SYMBOL net/ipv6/ipv6 0xfbdb1993	xfrm6_input_addr
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x3aacd497	ip6t_unregister_table
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x8fb09110	ip6t_register_table
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x91b03dcb	ipv6_find_hdr
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xb8bddf33	ip6t_ext_hdr
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xd4ce0abb	ip6t_do_table
+EXPORT_SYMBOL net/ipv6/tunnel6 0x4874e86b	xfrm6_tunnel_register
+EXPORT_SYMBOL net/ipv6/tunnel6 0x7e2d7748	xfrm6_tunnel_deregister
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0x9cd013f2	xfrm6_tunnel_alloc_spi
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xab14e193	xfrm6_tunnel_free_spi
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xdb1b42d1	xfrm6_tunnel_spi_lookup
+EXPORT_SYMBOL net/llc/llc 0x38b92846	llc_remove_pack
+EXPORT_SYMBOL net/llc/llc 0x3950cef5	llc_sap_find
+EXPORT_SYMBOL net/llc/llc 0x4d10ecd0	llc_mac_hdr_init
+EXPORT_SYMBOL net/llc/llc 0x52d7b2fd	llc_sap_list
+EXPORT_SYMBOL net/llc/llc 0x556643e3	llc_sap_list_lock
+EXPORT_SYMBOL net/llc/llc 0x58246ff6	llc_sap_open
+EXPORT_SYMBOL net/llc/llc 0x5e2e753e	llc_add_pack
+EXPORT_SYMBOL net/llc/llc 0x69fe9447	llc_set_station_handler
+EXPORT_SYMBOL net/llc/llc 0x807626c5	llc_sap_close
+EXPORT_SYMBOL net/llc/llc 0x84f82952	llc_build_and_send_ui_pkt
+EXPORT_SYMBOL net/mac80211/mac80211 0x11745014	ieee80211_queue_stopped
+EXPORT_SYMBOL net/mac80211/mac80211 0x1cc9ef4e	ieee80211_rts_get
+EXPORT_SYMBOL net/mac80211/mac80211 0x1f791943	ieee80211_queue_work
+EXPORT_SYMBOL net/mac80211/mac80211 0x2514b24d	ieee80211_stop_queues
+EXPORT_SYMBOL net/mac80211/mac80211 0x273bc88e	ieee80211_rx
+EXPORT_SYMBOL net/mac80211/mac80211 0x288a6855	ieee80211_stop_tx_ba_cb
+EXPORT_SYMBOL net/mac80211/mac80211 0x289965b3	ieee80211_alloc_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x30191740	ieee80211_ctstoself_get
+EXPORT_SYMBOL net/mac80211/mac80211 0x375fec18	ieee80211_unregister_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x3ca7eaf9	ieee80211_register_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x4306ca32	ieee80211_queue_delayed_work
+EXPORT_SYMBOL net/mac80211/mac80211 0x431ff899	ieee80211_start_tx_ba_session
+EXPORT_SYMBOL net/mac80211/mac80211 0x43794ed4	ieee80211_rate_control_register
+EXPORT_SYMBOL net/mac80211/mac80211 0x4f2ad900	ieee80211_free_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x505e210e	ieee80211_stop_queue
+EXPORT_SYMBOL net/mac80211/mac80211 0x50a4e693	ieee80211_stop_tx_ba_session
+EXPORT_SYMBOL net/mac80211/mac80211 0x537eeecb	__ieee80211_get_rx_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0x56a4a547	ieee80211_stop_tx_ba_cb_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0x587041ad	__ieee80211_get_tx_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0x593ac24d	ieee80211_wake_queues
+EXPORT_SYMBOL net/mac80211/mac80211 0x70a17b22	__ieee80211_get_radio_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0x81a7d830	ieee80211_start_tx_ba_cb_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0x82a27a8f	ieee80211_generic_frame_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0x88a72ee4	ieee80211_find_sta
+EXPORT_SYMBOL net/mac80211/mac80211 0x88dc1b5f	ieee80211_rx_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0x88e6a70c	ieee80211_restart_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x89806dc2	ieee80211_beacon_get
+EXPORT_SYMBOL net/mac80211/mac80211 0x8a38dc82	ieee80211_wake_queue
+EXPORT_SYMBOL net/mac80211/mac80211 0x8d8e4327	ieee80211_start_tx_ba_cb
+EXPORT_SYMBOL net/mac80211/mac80211 0x984c0df8	wiphy_to_ieee80211_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xa0f1c089	__ieee80211_get_assoc_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0xc89f9e0d	ieee80211_ctstoself_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0xca7f4fb2	ieee80211_get_buffered_bc
+EXPORT_SYMBOL net/mac80211/mac80211 0xcdd1cdae	ieee80211_tx_status
+EXPORT_SYMBOL net/mac80211/mac80211 0xd2f081f5	ieee80211_scan_completed
+EXPORT_SYMBOL net/mac80211/mac80211 0xe7293103	ieee80211_rts_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0xe8abe42d	ieee80211_beacon_loss
+EXPORT_SYMBOL net/mac80211/mac80211 0xf2bc76be	ieee80211_rate_control_unregister
+EXPORT_SYMBOL net/mac80211/mac80211 0xf629b134	ieee80211_tx_status_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0xfd379d8a	rate_control_send_low
+EXPORT_SYMBOL net/mac80211/mac80211 0xfe658906	ieee80211_get_tkip_key
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x05c851b6	register_ip_vs_app
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x0e249710	unregister_ip_vs_app
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x2fd3de11	ip_vs_conn_new
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x49897626	ip_vs_conn_out_get
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x5a5b02a5	ip_vs_conn_put
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x5f93de2b	register_ip_vs_app_inc
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x6d442799	unregister_ip_vs_scheduler
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xa1dbc2d8	ip_vs_proto_name
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xaa33ceb2	ip_vs_tcp_conn_listen
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xe1bba37b	register_ip_vs_scheduler
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xf281fc83	ip_vs_skb_replace
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xfa20a777	ip_vs_conn_in_get
+EXPORT_SYMBOL net/netfilter/nf_conntrack 0x69abcf36	__nf_ct_ext_add
+EXPORT_SYMBOL net/netfilter/nf_conntrack 0x840e6941	__nf_ct_ext_destroy
+EXPORT_SYMBOL net/netfilter/nf_conntrack_proto_gre 0xe88e50b7	nf_ct_gre_keymap_flush
+EXPORT_SYMBOL net/netfilter/x_tables 0x16a5e826	xt_free_table_info
+EXPORT_SYMBOL net/netfilter/x_tables 0x26fc4cf3	xt_unregister_matches
+EXPORT_SYMBOL net/netfilter/x_tables 0x34ba83fd	xt_register_targets
+EXPORT_SYMBOL net/netfilter/x_tables 0x8ed14b22	xt_register_match
+EXPORT_SYMBOL net/netfilter/x_tables 0x987829a2	xt_unregister_targets
+EXPORT_SYMBOL net/netfilter/x_tables 0xb46a6b21	xt_unregister_target
+EXPORT_SYMBOL net/netfilter/x_tables 0xb4bb205b	xt_register_matches
+EXPORT_SYMBOL net/netfilter/x_tables 0xc3ff5dff	xt_alloc_table_info
+EXPORT_SYMBOL net/netfilter/x_tables 0xcbe01653	xt_unregister_match
+EXPORT_SYMBOL net/netfilter/x_tables 0xcf52ec8d	xt_find_target
+EXPORT_SYMBOL net/netfilter/x_tables 0xdbc29c5b	xt_register_target
+EXPORT_SYMBOL net/netfilter/x_tables 0xe0b3dd83	xt_find_match
+EXPORT_SYMBOL net/phonet/phonet 0x0c7342ef	pn_sock_unhash
+EXPORT_SYMBOL net/phonet/phonet 0x5331f067	phonet_proto_unregister
+EXPORT_SYMBOL net/phonet/phonet 0x7a245e26	pn_skb_send
+EXPORT_SYMBOL net/phonet/phonet 0xc9db0c69	pn_sock_get_port
+EXPORT_SYMBOL net/phonet/phonet 0xd71bfa00	phonet_proto_register
+EXPORT_SYMBOL net/phonet/phonet 0xdd9c6c98	phonet_stream_ops
+EXPORT_SYMBOL net/phonet/phonet 0xe87ec6ed	pn_sock_hash
+EXPORT_SYMBOL net/phonet/phonet 0xfeee467e	phonet_header_ops
+EXPORT_SYMBOL net/rfkill/rfkill 0x037d996f	rfkill_register
+EXPORT_SYMBOL net/rfkill/rfkill 0x34b013d8	rfkill_set_hw_state
+EXPORT_SYMBOL net/rfkill/rfkill 0x39083de9	rfkill_set_sw_state
+EXPORT_SYMBOL net/rfkill/rfkill 0x3b06c84f	rfkill_init_sw_state
+EXPORT_SYMBOL net/rfkill/rfkill 0x4f04aa7f	rfkill_alloc
+EXPORT_SYMBOL net/rfkill/rfkill 0x5edf2435	rfkill_set_led_trigger_name
+EXPORT_SYMBOL net/rfkill/rfkill 0x8579a570	rfkill_set_states
+EXPORT_SYMBOL net/rfkill/rfkill 0xc8aacb75	rfkill_destroy
+EXPORT_SYMBOL net/rfkill/rfkill 0xda1086c8	rfkill_get_led_trigger_name
+EXPORT_SYMBOL net/rfkill/rfkill 0xda3ad314	rfkill_pause_polling
+EXPORT_SYMBOL net/rfkill/rfkill 0xe37e5cb3	rfkill_blocked
+EXPORT_SYMBOL net/rfkill/rfkill 0xf2252b21	rfkill_resume_polling
+EXPORT_SYMBOL net/rfkill/rfkill 0xf30339ec	rfkill_unregister
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x2c37156b	rxrpc_kernel_send_data
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x39705ec3	key_type_rxrpc
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x3f5e9e22	rxrpc_kernel_end_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x62d72922	rxrpc_get_null_key
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x66e8f981	rxrpc_kernel_intercept_rx_messages
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x7c71ff86	rxrpc_get_server_data_key
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x91b67fc9	rxrpc_kernel_reject_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x999a7a9d	rxrpc_kernel_abort_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xa7f44047	rxrpc_kernel_begin_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xb0f6d585	rxrpc_kernel_get_error_number
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xba3a5d49	rxrpc_kernel_data_delivered
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xbe333067	rxrpc_kernel_accept_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xd5ddc28c	rxrpc_kernel_get_abort_code
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xe81d91b8	rxrpc_kernel_is_data_last
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xf816e934	rxrpc_kernel_free_skb
+EXPORT_SYMBOL net/sunrpc/sunrpc 0x7ebaeaf2	svc_pool_stats_open
+EXPORT_SYMBOL net/tipc/tipc 0x08acf310	tipc_available_nodes
+EXPORT_SYMBOL net/tipc/tipc 0x0b074a7b	tipc_multicast
+EXPORT_SYMBOL net/tipc/tipc 0x0c4f0ded	tipc_send_buf2name
+EXPORT_SYMBOL net/tipc/tipc 0x10d40fcd	tipc_isconnected
+EXPORT_SYMBOL net/tipc/tipc 0x131ac64a	tipc_send_buf
+EXPORT_SYMBOL net/tipc/tipc 0x1472b270	tipc_disconnect
+EXPORT_SYMBOL net/tipc/tipc 0x1479cb03	tipc_deleteport
+EXPORT_SYMBOL net/tipc/tipc 0x15b5ecde	tipc_set_portunreliable
+EXPORT_SYMBOL net/tipc/tipc 0x16f27683	tipc_block_bearer
+EXPORT_SYMBOL net/tipc/tipc 0x1eda00b2	tipc_forward_buf2port
+EXPORT_SYMBOL net/tipc/tipc 0x23daecbd	tipc_send
+EXPORT_SYMBOL net/tipc/tipc 0x259b74f9	tipc_acknowledge
+EXPORT_SYMBOL net/tipc/tipc 0x310d1bc9	tipc_detach
+EXPORT_SYMBOL net/tipc/tipc 0x3712e340	tipc_portunreliable
+EXPORT_SYMBOL net/tipc/tipc 0x3976041f	tipc_set_portimportance
+EXPORT_SYMBOL net/tipc/tipc 0x3e93b677	tipc_continue
+EXPORT_SYMBOL net/tipc/tipc 0x408b1cbf	tipc_reject_msg
+EXPORT_SYMBOL net/tipc/tipc 0x419b02fc	tipc_send2port
+EXPORT_SYMBOL net/tipc/tipc 0x4b2243c6	tipc_portimportance
+EXPORT_SYMBOL net/tipc/tipc 0x4e796163	tipc_get_port
+EXPORT_SYMBOL net/tipc/tipc 0x538b228a	tipc_withdraw
+EXPORT_SYMBOL net/tipc/tipc 0x5637ed44	tipc_get_mode
+EXPORT_SYMBOL net/tipc/tipc 0x5c0d4b5c	tipc_ref_valid
+EXPORT_SYMBOL net/tipc/tipc 0x62a681a3	tipc_portunreturnable
+EXPORT_SYMBOL net/tipc/tipc 0x7f2be730	tipc_register_media
+EXPORT_SYMBOL net/tipc/tipc 0x88b73627	tipc_get_addr
+EXPORT_SYMBOL net/tipc/tipc 0x8e2a10e9	tipc_recv_msg
+EXPORT_SYMBOL net/tipc/tipc 0x9a1365b9	tipc_createport
+EXPORT_SYMBOL net/tipc/tipc 0x9c45558e	tipc_enable_bearer
+EXPORT_SYMBOL net/tipc/tipc 0xa1b42d32	tipc_forward2port
+EXPORT_SYMBOL net/tipc/tipc 0xadd203d0	tipc_connect2port
+EXPORT_SYMBOL net/tipc/tipc 0xae0103c3	tipc_shutdown
+EXPORT_SYMBOL net/tipc/tipc 0xb1f8eacc	tipc_send2name
+EXPORT_SYMBOL net/tipc/tipc 0xb35b672c	tipc_publish
+EXPORT_SYMBOL net/tipc/tipc 0xb7e0fdb5	tipc_send_buf2port
+EXPORT_SYMBOL net/tipc/tipc 0xc482475e	tipc_createport_raw
+EXPORT_SYMBOL net/tipc/tipc 0xcec8514a	tipc_set_portunreturnable
+EXPORT_SYMBOL net/tipc/tipc 0xcee290be	tipc_forward2name
+EXPORT_SYMBOL net/tipc/tipc 0xd0df19e1	tipc_send_buf_fast
+EXPORT_SYMBOL net/tipc/tipc 0xd39044ef	tipc_forward_buf2name
+EXPORT_SYMBOL net/tipc/tipc 0xd44731e5	tipc_ownidentity
+EXPORT_SYMBOL net/tipc/tipc 0xda7f9d3f	tipc_attach
+EXPORT_SYMBOL net/tipc/tipc 0xdf5008fc	tipc_peer
+EXPORT_SYMBOL net/tipc/tipc 0xe7aece47	tipc_ispublished
+EXPORT_SYMBOL net/tipc/tipc 0xeefd49b3	tipc_get_handle
+EXPORT_SYMBOL net/tipc/tipc 0xef50a1ef	tipc_disable_bearer
+EXPORT_SYMBOL net/wimax/wimax 0x75dacd31	wimax_rfkill
+EXPORT_SYMBOL net/wimax/wimax 0xc36d8896	wimax_reset
+EXPORT_SYMBOL net/wireless/cfg80211 0x045f2b58	cfg80211_inform_bss_frame
+EXPORT_SYMBOL net/wireless/cfg80211 0x07e7ac5a	ieee80211_radiotap_iterator_init
+EXPORT_SYMBOL net/wireless/cfg80211 0x09c64fbd	ieee80211_frequency_to_channel
+EXPORT_SYMBOL net/wireless/cfg80211 0x143b94ed	__ieee80211_get_channel
+EXPORT_SYMBOL net/wireless/cfg80211 0x1879fcbd	bridge_tunnel_header
+EXPORT_SYMBOL net/wireless/cfg80211 0x18f3e09f	wiphy_unregister
+EXPORT_SYMBOL net/wireless/cfg80211 0x19cadd0e	wiphy_apply_custom_regulatory
+EXPORT_SYMBOL net/wireless/cfg80211 0x22978a34	cfg80211_send_rx_assoc
+EXPORT_SYMBOL net/wireless/cfg80211 0x237cd469	wiphy_free
+EXPORT_SYMBOL net/wireless/cfg80211 0x268ce16d	cfg80211_send_rx_auth
+EXPORT_SYMBOL net/wireless/cfg80211 0x2706dea5	cfg80211_testmode_event
+EXPORT_SYMBOL net/wireless/cfg80211 0x2bf4a9dc	cfg80211_michael_mic_failure
+EXPORT_SYMBOL net/wireless/cfg80211 0x2cb969d7	cfg80211_roamed
+EXPORT_SYMBOL net/wireless/cfg80211 0x2e895277	cfg80211_get_mesh
+EXPORT_SYMBOL net/wireless/cfg80211 0x3478e524	ieee80211_data_to_8023
+EXPORT_SYMBOL net/wireless/cfg80211 0x37ac8d05	ieee80211_get_response_rate
+EXPORT_SYMBOL net/wireless/cfg80211 0x3944e5e9	cfg80211_testmode_reply
+EXPORT_SYMBOL net/wireless/cfg80211 0x4b103fd2	cfg80211_scan_done
+EXPORT_SYMBOL net/wireless/cfg80211 0x4c4cd5ac	cfg80211_testmode_alloc_reply_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0x5a2110c1	cfg80211_testmode_alloc_event_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0x69b18f43	rfc1042_header
+EXPORT_SYMBOL net/wireless/cfg80211 0x69e91fd3	cfg80211_send_auth_timeout
+EXPORT_SYMBOL net/wireless/cfg80211 0x6bc1cd56	cfg80211_unlink_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0x6c70c85a	cfg80211_inform_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0x701473ba	cfg80211_ibss_joined
+EXPORT_SYMBOL net/wireless/cfg80211 0x70b9ecda	cfg80211_classify8021d
+EXPORT_SYMBOL net/wireless/cfg80211 0x710d20ba	wiphy_register
+EXPORT_SYMBOL net/wireless/cfg80211 0x77b2b48b	wiphy_new
+EXPORT_SYMBOL net/wireless/cfg80211 0x7c3fddc1	ieee80211_bss_get_ie
+EXPORT_SYMBOL net/wireless/cfg80211 0x7c6fb0e6	wiphy_rfkill_set_hw_state
+EXPORT_SYMBOL net/wireless/cfg80211 0x8563ff3b	wiphy_rfkill_start_polling
+EXPORT_SYMBOL net/wireless/cfg80211 0x8c35d732	ieee80211_hdrlen
+EXPORT_SYMBOL net/wireless/cfg80211 0xa28cd1ad	ieee80211_data_from_8023
+EXPORT_SYMBOL net/wireless/cfg80211 0xa4a0affb	freq_reg_info
+EXPORT_SYMBOL net/wireless/cfg80211 0xb9ad4aad	cfg80211_send_assoc_timeout
+EXPORT_SYMBOL net/wireless/cfg80211 0xbbc59406	cfg80211_disconnected
+EXPORT_SYMBOL net/wireless/cfg80211 0xc4e85ec5	ieee80211_radiotap_iterator_next
+EXPORT_SYMBOL net/wireless/cfg80211 0xcc3c4970	cfg80211_connect_result
+EXPORT_SYMBOL net/wireless/cfg80211 0xccc291b3	ieee80211_channel_to_frequency
+EXPORT_SYMBOL net/wireless/cfg80211 0xd743969a	wiphy_rfkill_stop_polling
+EXPORT_SYMBOL net/wireless/cfg80211 0xd7bc0d25	cfg80211_send_deauth
+EXPORT_SYMBOL net/wireless/cfg80211 0xe49f8244	cfg80211_put_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0xee5e071c	ieee80211_get_hdrlen_from_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0xf367943b	cfg80211_get_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0xf58834a3	cfg80211_send_disassoc
+EXPORT_SYMBOL net/wireless/cfg80211 0xf86425df	regulatory_hint
+EXPORT_SYMBOL net/wireless/lib80211 0x0198a0e4	lib80211_register_crypto_ops
+EXPORT_SYMBOL net/wireless/lib80211 0x0827a8e6	lib80211_crypt_delayed_deinit
+EXPORT_SYMBOL net/wireless/lib80211 0x14f721ac	lib80211_unregister_crypto_ops
+EXPORT_SYMBOL net/wireless/lib80211 0x230f3ffb	lib80211_crypt_deinit_handler
+EXPORT_SYMBOL net/wireless/lib80211 0x2d0f99e5	print_ssid
+EXPORT_SYMBOL net/wireless/lib80211 0x4a4e1b9c	lib80211_crypt_deinit_entries
+EXPORT_SYMBOL net/wireless/lib80211 0x510e9fd8	lib80211_crypt_quiescing
+EXPORT_SYMBOL net/wireless/lib80211 0x583cdbb6	lib80211_crypt_info_free
+EXPORT_SYMBOL net/wireless/lib80211 0x6cb10585	lib80211_crypt_info_init
+EXPORT_SYMBOL net/wireless/lib80211 0x7aa6a587	lib80211_get_crypto_ops
+EXPORT_SYMBOL sound/ac97_bus 0xc983bd2d	ac97_bus_type
+EXPORT_SYMBOL sound/core/oss/snd-mixer-oss 0xfa93f4a6	snd_mixer_oss_ioctl_card
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x061d30e6	snd_seq_create_kernel_client
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x087bde99	snd_seq_kernel_client_write_poll
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x1a724fcc	snd_seq_kernel_client_ctl
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x3fb4d161	snd_seq_kernel_client_dispatch
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x4bb602b4	snd_seq_event_port_attach
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x62a4ba3c	snd_seq_kernel_client_enqueue_blocking
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x6bb71038	snd_seq_delete_kernel_client
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x7ac2f329	snd_seq_expand_var_event
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x7b8699eb	snd_seq_event_port_detach
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xb8e448a0	snd_seq_set_queue_tempo
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xcac0a3be	snd_seq_kernel_client_enqueue
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xe934da1d	snd_seq_dump_var_event
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x3a57f235	snd_seq_autoload_unlock
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x6339b6d0	snd_seq_device_load_drivers
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x79de7447	snd_seq_device_register_driver
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xac3fb5f5	snd_seq_device_new
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xb90668b2	snd_seq_autoload_lock
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xc622fb29	snd_seq_device_unregister_driver
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x6ea09972	snd_midi_channel_alloc_set
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x833a3e07	snd_midi_channel_set_clear
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xb9948d2c	snd_midi_channel_free_set
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xf0a1fdb3	snd_midi_process_event
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x3b55d387	snd_midi_event_encode_byte
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x68b9bd07	snd_midi_event_free
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x7adfa053	snd_midi_event_encode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x998f2126	snd_midi_event_new
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x9b1825a9	snd_midi_event_no_status
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xb6327286	snd_midi_event_decode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xbc51650a	snd_midi_event_reset_decode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xe58d6519	snd_midi_event_reset_encode
+EXPORT_SYMBOL sound/core/seq/snd-seq-virmidi 0x0ec673d2	snd_virmidi_new
+EXPORT_SYMBOL sound/core/snd 0x016f85e0	snd_info_create_card_entry
+EXPORT_SYMBOL sound/core/snd 0x02607df5	snd_register_device_for_dev
+EXPORT_SYMBOL sound/core/snd 0x198788b4	snd_lookup_oss_minor_data
+EXPORT_SYMBOL sound/core/snd 0x24a94b26	snd_info_get_line
+EXPORT_SYMBOL sound/core/snd 0x2722b345	snd_device_new
+EXPORT_SYMBOL sound/core/snd 0x283451e6	snd_info_create_module_entry
+EXPORT_SYMBOL sound/core/snd 0x29eec1aa	snd_ctl_register_ioctl_compat
+EXPORT_SYMBOL sound/core/snd 0x2ae3deaa	release_and_free_resource
+EXPORT_SYMBOL sound/core/snd 0x2e2b4a14	snd_unregister_device
+EXPORT_SYMBOL sound/core/snd 0x2e514a6d	snd_cards
+EXPORT_SYMBOL sound/core/snd 0x33b37313	snd_card_file_remove
+EXPORT_SYMBOL sound/core/snd 0x385140d6	snd_add_device_sysfs_file
+EXPORT_SYMBOL sound/core/snd 0x3971b4df	snd_ecards_limit
+EXPORT_SYMBOL sound/core/snd 0x39821d8a	snd_seq_root
+EXPORT_SYMBOL sound/core/snd 0x3a56ef9f	snd_ctl_find_numid
+EXPORT_SYMBOL sound/core/snd 0x3b07090e	snd_device_register
+EXPORT_SYMBOL sound/core/snd 0x3e77a55b	snd_card_set_id
+EXPORT_SYMBOL sound/core/snd 0x4068a675	snd_ctl_rename_id
+EXPORT_SYMBOL sound/core/snd 0x4261bf94	snd_jack_report
+EXPORT_SYMBOL sound/core/snd 0x4a3ea5c0	snd_request_card
+EXPORT_SYMBOL sound/core/snd 0x4dbc31cf	snd_card_proc_new
+EXPORT_SYMBOL sound/core/snd 0x518bb7f8	copy_from_user_toio
+EXPORT_SYMBOL sound/core/snd 0x52485757	snd_component_add
+EXPORT_SYMBOL sound/core/snd 0x57fe0e79	snd_jack_new
+EXPORT_SYMBOL sound/core/snd 0x6288429f	snd_ctl_find_id
+EXPORT_SYMBOL sound/core/snd 0x721e8b75	snd_ctl_unregister_ioctl_compat
+EXPORT_SYMBOL sound/core/snd 0x78b3fc93	snd_ctl_add
+EXPORT_SYMBOL sound/core/snd 0x7b34c7ee	snd_info_free_entry
+EXPORT_SYMBOL sound/core/snd 0x81e72b7d	snd_ctl_notify
+EXPORT_SYMBOL sound/core/snd 0x8811e926	snd_card_free
+EXPORT_SYMBOL sound/core/snd 0x8a92789b	snd_ctl_new1
+EXPORT_SYMBOL sound/core/snd 0x8aeff769	snd_card_create
+EXPORT_SYMBOL sound/core/snd 0x8cfb49a0	snd_ctl_register_ioctl
+EXPORT_SYMBOL sound/core/snd 0x8df3789f	snd_oss_info_register
+EXPORT_SYMBOL sound/core/snd 0x8f595b11	snd_major
+EXPORT_SYMBOL sound/core/snd 0x93a281a6	snd_device_free
+EXPORT_SYMBOL sound/core/snd 0x996c3fea	snd_card_free_when_closed
+EXPORT_SYMBOL sound/core/snd 0x9dbbc250	snd_card_file_add
+EXPORT_SYMBOL sound/core/snd 0x9e6d79f8	snd_info_get_str
+EXPORT_SYMBOL sound/core/snd 0xa345a92a	snd_jack_set_parent
+EXPORT_SYMBOL sound/core/snd 0xa6ac3130	snd_ctl_free_one
+EXPORT_SYMBOL sound/core/snd 0xb2e5ae4a	snd_lookup_minor_data
+EXPORT_SYMBOL sound/core/snd 0xb6f55ae4	snd_ctl_remove
+EXPORT_SYMBOL sound/core/snd 0xb8f0487f	snd_card_disconnect
+EXPORT_SYMBOL sound/core/snd 0xb98788df	snd_ctl_boolean_stereo_info
+EXPORT_SYMBOL sound/core/snd 0xc1514134	snd_mixer_oss_notify_callback
+EXPORT_SYMBOL sound/core/snd 0xc51d8bee	snd_ctl_boolean_mono_info
+EXPORT_SYMBOL sound/core/snd 0xc7a831dc	snd_info_register
+EXPORT_SYMBOL sound/core/snd 0xd3838e2b	snd_ctl_remove_id
+EXPORT_SYMBOL sound/core/snd 0xd9563cc7	snd_unregister_oss_device
+EXPORT_SYMBOL sound/core/snd 0xd9958e9c	snd_card_register
+EXPORT_SYMBOL sound/core/snd 0xda4ae695	snd_register_oss_device
+EXPORT_SYMBOL sound/core/snd 0xe20c9214	snd_iprintf
+EXPORT_SYMBOL sound/core/snd 0xe243dde3	copy_to_user_fromio
+EXPORT_SYMBOL sound/core/snd 0xebcf6b7c	snd_pci_quirk_lookup
+EXPORT_SYMBOL sound/core/snd 0xeedc3720	snd_ctl_unregister_ioctl
+EXPORT_SYMBOL sound/core/snd 0xef92e40a	snd_ctl_make_virtual_master
+EXPORT_SYMBOL sound/core/snd 0xfd774589	_snd_ctl_add_slave
+EXPORT_SYMBOL sound/core/snd-hwdep 0x5a417c1b	snd_hwdep_new
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x19cc2ce3	snd_free_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x1c08b65a	snd_dma_alloc_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x1e37608d	snd_dma_reserve_buf
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x1f4b5496	snd_dma_alloc_pages_fallback
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x846eaf8a	snd_dma_get_reserved_buf
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xc6829020	snd_malloc_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xf104f94c	snd_dma_free_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0x0283dfe3	_snd_pcm_hw_params_any
+EXPORT_SYMBOL sound/core/snd-pcm 0x04cda566	snd_interval_refine
+EXPORT_SYMBOL sound/core/snd-pcm 0x07f37d54	snd_pcm_lib_writev
+EXPORT_SYMBOL sound/core/snd-pcm 0x13008345	snd_pcm_hw_constraint_integer
+EXPORT_SYMBOL sound/core/snd-pcm 0x1cccbfb4	snd_pcm_hw_rule_add
+EXPORT_SYMBOL sound/core/snd-pcm 0x1d027e4b	snd_pcm_format_signed
+EXPORT_SYMBOL sound/core/snd-pcm 0x28ee6446	snd_pcm_lib_preallocate_free_for_all
+EXPORT_SYMBOL sound/core/snd-pcm 0x2cba7bd2	snd_pcm_notify
+EXPORT_SYMBOL sound/core/snd-pcm 0x3796bdcc	snd_pcm_format_little_endian
+EXPORT_SYMBOL sound/core/snd-pcm 0x395e287f	snd_pcm_link_rwlock
+EXPORT_SYMBOL sound/core/snd-pcm 0x39bf9301	_snd_pcm_hw_param_setempty
+EXPORT_SYMBOL sound/core/snd-pcm 0x3c3336b3	snd_pcm_open_substream
+EXPORT_SYMBOL sound/core/snd-pcm 0x4117f89f	snd_pcm_release_substream
+EXPORT_SYMBOL sound/core/snd-pcm 0x4f816e9b	snd_pcm_format_big_endian
+EXPORT_SYMBOL sound/core/snd-pcm 0x5182f1ea	snd_pcm_new
+EXPORT_SYMBOL sound/core/snd-pcm 0x52e3e4a5	snd_pcm_hw_param_value
+EXPORT_SYMBOL sound/core/snd-pcm 0x5e7f4920	snd_pcm_format_set_silence
+EXPORT_SYMBOL sound/core/snd-pcm 0x6187e693	snd_pcm_hw_param_first
+EXPORT_SYMBOL sound/core/snd-pcm 0x650f8603	snd_pcm_format_silence_64
+EXPORT_SYMBOL sound/core/snd-pcm 0x66d555ad	snd_pcm_lib_malloc_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0x68a24153	snd_pcm_format_physical_width
+EXPORT_SYMBOL sound/core/snd-pcm 0x692b5c9b	snd_pcm_lib_preallocate_pages_for_all
+EXPORT_SYMBOL sound/core/snd-pcm 0x6ef8fcd8	snd_pcm_format_linear
+EXPORT_SYMBOL sound/core/snd-pcm 0x6f875d3e	snd_pcm_hw_refine
+EXPORT_SYMBOL sound/core/snd-pcm 0x7077a8ec	snd_pcm_set_ops
+EXPORT_SYMBOL sound/core/snd-pcm 0x854ba7ac	snd_pcm_hw_constraint_ratnums
+EXPORT_SYMBOL sound/core/snd-pcm 0x89e71158	snd_pcm_new_stream
+EXPORT_SYMBOL sound/core/snd-pcm 0x8c5a5334	snd_pcm_kernel_ioctl
+EXPORT_SYMBOL sound/core/snd-pcm 0x9033f52c	snd_pcm_hw_constraint_minmax
+EXPORT_SYMBOL sound/core/snd-pcm 0x9185c159	snd_pcm_hw_param_last
+EXPORT_SYMBOL sound/core/snd-pcm 0x93da5806	snd_pcm_lib_readv
+EXPORT_SYMBOL sound/core/snd-pcm 0x9a373d19	snd_pcm_period_elapsed
+EXPORT_SYMBOL sound/core/snd-pcm 0x9ffea675	snd_pcm_hw_constraint_ratdens
+EXPORT_SYMBOL sound/core/snd-pcm 0xa61aa028	snd_pcm_format_unsigned
+EXPORT_SYMBOL sound/core/snd-pcm 0xacd72d49	snd_pcm_lib_read
+EXPORT_SYMBOL sound/core/snd-pcm 0xb5172335	snd_pcm_hw_constraint_step
+EXPORT_SYMBOL sound/core/snd-pcm 0xb9638db4	snd_pcm_rate_to_rate_bit
+EXPORT_SYMBOL sound/core/snd-pcm 0xbdf12e08	snd_pcm_lib_ioctl
+EXPORT_SYMBOL sound/core/snd-pcm 0xcdfb3721	snd_pcm_lib_write
+EXPORT_SYMBOL sound/core/snd-pcm 0xd0b9b8b8	snd_interval_list
+EXPORT_SYMBOL sound/core/snd-pcm 0xd929afc8	snd_pcm_stop
+EXPORT_SYMBOL sound/core/snd-pcm 0xdad3ffe5	snd_pcm_lib_preallocate_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0xde311e7a	snd_pcm_hw_constraint_pow2
+EXPORT_SYMBOL sound/core/snd-pcm 0xe0f7f995	snd_pcm_set_sync
+EXPORT_SYMBOL sound/core/snd-pcm 0xe51a1c64	snd_pcm_format_size
+EXPORT_SYMBOL sound/core/snd-pcm 0xe56a9336	snd_pcm_format_width
+EXPORT_SYMBOL sound/core/snd-pcm 0xf08c57e4	snd_pcm_hw_constraint_list
+EXPORT_SYMBOL sound/core/snd-pcm 0xf3762a03	snd_pcm_hw_constraint_msbits
+EXPORT_SYMBOL sound/core/snd-pcm 0xf3797152	snd_interval_ratnum
+EXPORT_SYMBOL sound/core/snd-pcm 0xf5788304	snd_pcm_limit_hw_rates
+EXPORT_SYMBOL sound/core/snd-pcm 0xf763dfc2	snd_pcm_mmap_data
+EXPORT_SYMBOL sound/core/snd-pcm 0xf81ab7cc	snd_pcm_lib_free_pages
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x1ad9e4de	snd_rawmidi_transmit_ack
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x351653f7	snd_rawmidi_transmit_peek
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x4a8d110f	snd_rawmidi_drain_input
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x625a4e97	snd_rawmidi_transmit
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x79b8b147	snd_rawmidi_transmit_empty
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x8c13c4f6	snd_rawmidi_receive
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x90501cb7	snd_rawmidi_kernel_read
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x90d43b86	snd_rawmidi_info_select
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xa24f837f	snd_rawmidi_kernel_release
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xa88f1102	snd_rawmidi_kernel_open
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xb3716ad0	snd_rawmidi_new
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xb5855ca4	snd_rawmidi_input_params
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xb81a236d	snd_rawmidi_set_ops
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xb95e1b8b	snd_rawmidi_drain_output
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xbbeb32f6	snd_rawmidi_output_params
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xc211368e	snd_rawmidi_kernel_write
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xc5b9a8e9	snd_rawmidi_drop_output
+EXPORT_SYMBOL sound/core/snd-timer 0x081934ad	snd_timer_global_new
+EXPORT_SYMBOL sound/core/snd-timer 0x2c15dda6	snd_timer_pause
+EXPORT_SYMBOL sound/core/snd-timer 0x4b7f39a9	snd_timer_stop
+EXPORT_SYMBOL sound/core/snd-timer 0x520ddca6	snd_timer_open
+EXPORT_SYMBOL sound/core/snd-timer 0x5b005d57	snd_timer_interrupt
+EXPORT_SYMBOL sound/core/snd-timer 0x7587d269	snd_timer_notify
+EXPORT_SYMBOL sound/core/snd-timer 0x8b86f16a	snd_timer_continue
+EXPORT_SYMBOL sound/core/snd-timer 0x9da649ef	snd_timer_global_free
+EXPORT_SYMBOL sound/core/snd-timer 0xa9b2eb0e	snd_timer_new
+EXPORT_SYMBOL sound/core/snd-timer 0xac06212a	snd_timer_start
+EXPORT_SYMBOL sound/core/snd-timer 0xb43ef85a	snd_timer_global_register
+EXPORT_SYMBOL sound/core/snd-timer 0xd746b2a0	snd_timer_close
+EXPORT_SYMBOL sound/core/snd-timer 0xdb72dedd	snd_timer_resolution
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x4bbb7f27	snd_mpu401_uart_interrupt_tx
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x8473b159	snd_mpu401_uart_new
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xc43a3940	snd_mpu401_uart_interrupt
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x04f5c43b	snd_opl3_find_patch
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x05060a19	snd_opl3_regmap
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x54a3d296	snd_opl3_create
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x6cb81ca6	snd_opl3_load_patch
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x9b1a4b5d	snd_opl3_init
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xe6aa23d2	snd_opl3_reset
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xefb3e791	snd_opl3_timer_new
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xf85358e6	snd_opl3_hwdep_new
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xf93a23bc	snd_opl3_interrupt
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xf9a60731	snd_opl3_new
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x0b433d64	snd_vx_free_firmware
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x19eff472	snd_vx_setup_firmware
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x3cbbcb60	snd_vx_create
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x6b4d8e84	snd_vx_dsp_load
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x8a61cf62	snd_vx_load_boot_image
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x99b88ede	snd_vx_irq_handler
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xc4d94720	snd_vx_dsp_boot
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xffdbb4c5	snd_vx_check_reg_bit
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x153216c9	snd_ak4114_reinit
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x1c413b82	snd_ak4114_reg_write
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x2b19bd70	snd_ak4114_external_rate
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x4bc9c49c	snd_ak4114_build
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x701fdbf6	snd_ak4114_check_rate_and_errors
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xf0a0ffaf	snd_ak4114_create
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x445032cb	snd_ak4117_external_rate
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x5255a9a9	snd_ak4117_create
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x6c011614	snd_ak4117_reinit
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x8dfabbb0	snd_ak4117_build
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xb67389f5	snd_ak4117_reg_write
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xc338fd29	snd_ak4117_check_rate_and_errors
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xa6ae1e58	snd_akm4xxx_build_controls
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xbb28f9d7	snd_akm4xxx_reset
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xbc36caaa	snd_akm4xxx_write
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xc78e9821	snd_akm4xxx_init
+EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0xdd65e2cc	snd_pt2258_reset
+EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0xfc04abf8	snd_pt2258_build_controls
+EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0xd1b20939	snd_tea575x_init
+EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0xdf456163	snd_tea575x_exit
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x38151de6	snd_cs8427_iec958_active
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x68c62b18	snd_cs8427_reg_write
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x8a667144	snd_cs8427_iec958_pcm
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0xb3d30951	snd_cs8427_iec958_build
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0xd266de53	snd_cs8427_create
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x0063f4ca	snd_i2c_bus_create
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x7e9e9ab3	snd_i2c_device_create
+EXPORT_SYMBOL sound/i2c/snd-i2c 0xb75c72b6	snd_i2c_sendbytes
+EXPORT_SYMBOL sound/i2c/snd-i2c 0xf48bd412	snd_i2c_device_free
+EXPORT_SYMBOL sound/i2c/snd-i2c 0xf4f1a9fb	snd_i2c_probeaddr
+EXPORT_SYMBOL sound/i2c/snd-i2c 0xf61c10ac	snd_i2c_readbytes
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x01888b0c	snd_ac97_tune_hardware
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x12234acf	snd_ac97_get_short_name
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x1d6db136	snd_ac97_read
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x23d9e316	snd_ac97_update
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x2b0de0ce	snd_ac97_pcm_close
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x2bb20095	snd_ac97_update_bits
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x394153d6	snd_ac97_set_rate
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x404a932b	snd_ac97_write_cache
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x6db96eb5	snd_ac97_bus
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x746c92a2	snd_ac97_pcm_assign
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x85973d02	snd_ac97_pcm_open
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x8c6dbc5e	snd_ac97_update_power
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x8df3ef3e	snd_ac97_mixer
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xa3984867	snd_ac97_write
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xb513349d	snd_ac97_pcm_double_rate_rules
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x483c9310	snd_emu10k1_voice_free
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x617edc3d	snd_emu10k1_synth_copy_from_user
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x744a4b17	snd_emu10k1_synth_bzero
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x7faa2701	snd_emu10k1_synth_free
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x8f8ec9ec	snd_emu10k1_ptr_read
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xa1a18107	snd_emu10k1_voice_alloc
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xac69a420	snd_emu10k1_synth_alloc
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xf1054598	snd_emu10k1_ptr_write
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xf3933fd6	snd_emu10k1_memblk_map
+EXPORT_SYMBOL sound/pci/hda/snd-hda-codec 0x124f59ba	snd_hda_parse_generic_codec
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x2fe0689b	snd_ice1712_akm4xxx_free
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x5a56970f	snd_ice1712_akm4xxx_init
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x7b0f61ad	snd_ice1712_akm4xxx_build_controls
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x0d7167df	snd_trident_write_voice_regs
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x2fe6165c	snd_trident_free_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x4c82a426	snd_trident_start_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x4ee7b3c8	snd_trident_alloc_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0xebc7281f	snd_trident_stop_voice
+EXPORT_SYMBOL sound/soc/codecs/snd-soc-uda134x 0x6ddd9245	uda134x_dai
+EXPORT_SYMBOL sound/sound_firmware 0x39e3dd23	mod_firmware_load
+EXPORT_SYMBOL sound/soundcore 0x0775602d	sound_class
+EXPORT_SYMBOL sound/soundcore 0x110cdaa5	register_sound_special_device
+EXPORT_SYMBOL sound/soundcore 0x1ff49db3	register_sound_special
+EXPORT_SYMBOL sound/soundcore 0x4efdd599	register_sound_midi
+EXPORT_SYMBOL sound/soundcore 0x7afc9d8a	unregister_sound_mixer
+EXPORT_SYMBOL sound/soundcore 0x9217f2ca	register_sound_dsp
+EXPORT_SYMBOL sound/soundcore 0x99c95fa5	unregister_sound_special
+EXPORT_SYMBOL sound/soundcore 0xcc5505ac	register_sound_mixer
+EXPORT_SYMBOL sound/soundcore 0xcd083b10	unregister_sound_dsp
+EXPORT_SYMBOL sound/soundcore 0xfdab6de3	unregister_sound_midi
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x1961fa23	snd_emux_free
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x655cb202	snd_sf_linear_to_log
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x980f9155	snd_emux_unlock_voice
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xddf734b3	snd_emux_new
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xeeee5bee	snd_emux_lock_voice
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xf1bf4eaf	snd_emux_terminate_all
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xf45f54eb	snd_emux_register
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x01e234f2	__snd_util_mem_alloc
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x0895e1a9	__snd_util_mem_free
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x15cfaea4	snd_util_memhdr_new
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x2ba29873	snd_util_mem_avail
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x45c2abb1	snd_util_memhdr_free
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x5d2130f4	snd_util_mem_alloc
+EXPORT_SYMBOL sound/synth/snd-util-mem 0xab810f2e	__snd_util_memblk_new
+EXPORT_SYMBOL sound/synth/snd-util-mem 0xb2676a58	snd_util_mem_free
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0x16756dc0	snd_usbmidi_input_start
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0x4d552600	snd_usb_create_midi_interface
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0x63343b1d	snd_usbmidi_input_stop
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0xd9d2bb03	snd_usbmidi_disconnect
+EXPORT_SYMBOL vmlinux 0x00000000	per_cpu__softirq_work_list
+EXPORT_SYMBOL vmlinux 0x0063a36b	pci_scan_bus_parented
+EXPORT_SYMBOL vmlinux 0x006a445d	jbd2_journal_start_commit
+EXPORT_SYMBOL vmlinux 0x0076a204	d_lookup
+EXPORT_SYMBOL vmlinux 0x00801678	flush_scheduled_work
+EXPORT_SYMBOL vmlinux 0x00985793	genphy_config_advert
+EXPORT_SYMBOL vmlinux 0x00b152b7	inode_permission
+EXPORT_SYMBOL vmlinux 0x00c4dc87	timecounter_init
+EXPORT_SYMBOL vmlinux 0x00cca9cc	dst_destroy
+EXPORT_SYMBOL vmlinux 0x00fe34f6	register_con_driver
+EXPORT_SYMBOL vmlinux 0x01000e51	schedule
+EXPORT_SYMBOL vmlinux 0x01020a39	jbd2_journal_release_jbd_inode
+EXPORT_SYMBOL vmlinux 0x01036775	simple_fsync
+EXPORT_SYMBOL vmlinux 0x01139ffc	max_mapnr
+EXPORT_SYMBOL vmlinux 0x0113a2da	ethtool_op_get_flags
+EXPORT_SYMBOL vmlinux 0x013ea7c6	drm_mmap
+EXPORT_SYMBOL vmlinux 0x0179d315	i2c_bit_add_bus
+EXPORT_SYMBOL vmlinux 0x018e2f54	eth_header
+EXPORT_SYMBOL vmlinux 0x01902adf	netpoll_trap
+EXPORT_SYMBOL vmlinux 0x01a29157	pci_get_subsys
+EXPORT_SYMBOL vmlinux 0x01a4aab6	set_irq_chip_data
+EXPORT_SYMBOL vmlinux 0x01cea6ac	block_prepare_write
+EXPORT_SYMBOL vmlinux 0x01ee6c8e	dquot_commit
+EXPORT_SYMBOL vmlinux 0x01f67911	___copy_in_user
+EXPORT_SYMBOL vmlinux 0x0218e24a	register_nls
+EXPORT_SYMBOL vmlinux 0x022a7a23	napi_skb_finish
+EXPORT_SYMBOL vmlinux 0x023c6cd1	thaw_bdev
+EXPORT_SYMBOL vmlinux 0x02649054	security_sock_rcv_skb
+EXPORT_SYMBOL vmlinux 0x028ef8ec	i2c_del_adapter
+EXPORT_SYMBOL vmlinux 0x02a6ce5a	crc16_table
+EXPORT_SYMBOL vmlinux 0x02c10d4d	sock_recvmsg
+EXPORT_SYMBOL vmlinux 0x02c42a6c	skb_pull
+EXPORT_SYMBOL vmlinux 0x02d81845	audit_log_task_context
+EXPORT_SYMBOL vmlinux 0x031ee678	xor_niagara_2
+EXPORT_SYMBOL vmlinux 0x0321a629	blk_queue_max_hw_segments
+EXPORT_SYMBOL vmlinux 0x0334da4e	scsi_command_size_tbl
+EXPORT_SYMBOL vmlinux 0x0340e0ae	schedule_delayed_work
+EXPORT_SYMBOL vmlinux 0x035a786c	skb_queue_tail
+EXPORT_SYMBOL vmlinux 0x037a0cba	kfree
+EXPORT_SYMBOL vmlinux 0x038a603f	write_one_page
+EXPORT_SYMBOL vmlinux 0x03c06156	bitmap_fold
+EXPORT_SYMBOL vmlinux 0x03d6c93b	call_usermodehelper_exec
+EXPORT_SYMBOL vmlinux 0x03ea9cf3	sun4v_hvapi_get
+EXPORT_SYMBOL vmlinux 0x03fd2571	vm_unmap_ram
+EXPORT_SYMBOL vmlinux 0x0400429e	set_irq_chip
+EXPORT_SYMBOL vmlinux 0x040126a4	kill_pgrp
+EXPORT_SYMBOL vmlinux 0x0422fe4a	inet_csk_timer_bug_msg
+EXPORT_SYMBOL vmlinux 0x04244696	locks_copy_lock
+EXPORT_SYMBOL vmlinux 0x0432fe66	generic_error_remove_page
+EXPORT_SYMBOL vmlinux 0x043b8483	__kfifo_get
+EXPORT_SYMBOL vmlinux 0x044812d3	registered_fb
+EXPORT_SYMBOL vmlinux 0x044f0d03	simple_transaction_set
+EXPORT_SYMBOL vmlinux 0x046ee767	ftrace_print_symbols_seq
+EXPORT_SYMBOL vmlinux 0x0487f831	fb_find_best_display
+EXPORT_SYMBOL vmlinux 0x048f0526	call_usermodehelper_freeinfo
+EXPORT_SYMBOL vmlinux 0x04d16c61	gnet_stats_finish_copy
+EXPORT_SYMBOL vmlinux 0x04d1efdf	find_lock_page
+EXPORT_SYMBOL vmlinux 0x04ef8674	bdi_init
+EXPORT_SYMBOL vmlinux 0x0511916c	pneigh_lookup
+EXPORT_SYMBOL vmlinux 0x051255d9	vfs_dq_drop
+EXPORT_SYMBOL vmlinux 0x05186ca4	flush_icache_range
+EXPORT_SYMBOL vmlinux 0x052643a1	no_llseek
+EXPORT_SYMBOL vmlinux 0x05320761	find_get_page
+EXPORT_SYMBOL vmlinux 0x0542a1ed	invalidate_partition
+EXPORT_SYMBOL vmlinux 0x0559bebb	nlmsg_notify
+EXPORT_SYMBOL vmlinux 0x0560fd8f	atomic_sub_ret
+EXPORT_SYMBOL vmlinux 0x05c2c37a	kmem_cache_create
+EXPORT_SYMBOL vmlinux 0x05c5d421	misc_register
+EXPORT_SYMBOL vmlinux 0x05c667a3	dev_unicast_add
+EXPORT_SYMBOL vmlinux 0x05c8a7d6	otg_put_transceiver
+EXPORT_SYMBOL vmlinux 0x05ef6bf3	__dev_get_by_name
+EXPORT_SYMBOL vmlinux 0x05fe6a0f	vfs_writev
+EXPORT_SYMBOL vmlinux 0x05fee3c4	pcim_enable_device
+EXPORT_SYMBOL vmlinux 0x0612cc51	drm_mm_scan_remove_block
+EXPORT_SYMBOL vmlinux 0x061651be	strcat
+EXPORT_SYMBOL vmlinux 0x062119c0	km_policy_notify
+EXPORT_SYMBOL vmlinux 0x062aba95	mempool_free
+EXPORT_SYMBOL vmlinux 0x06447d67	blk_init_queue
+EXPORT_SYMBOL vmlinux 0x0665bae2	kill_anon_super
+EXPORT_SYMBOL vmlinux 0x067d8d35	security_release_secctx
+EXPORT_SYMBOL vmlinux 0x06a485f2	__krealloc
+EXPORT_SYMBOL vmlinux 0x06c828fb	drm_sg_alloc
+EXPORT_SYMBOL vmlinux 0x06cd6370	drm_open
+EXPORT_SYMBOL vmlinux 0x06e28706	dev_mc_add
+EXPORT_SYMBOL vmlinux 0x06f969bf	pci_device_to_OF_node
+EXPORT_SYMBOL vmlinux 0x06fe3b14	default_grn
+EXPORT_SYMBOL vmlinux 0x07021d79	blk_queue_prep_rq
+EXPORT_SYMBOL vmlinux 0x0736fd1f	tcp_simple_retransmit
+EXPORT_SYMBOL vmlinux 0x0747e30b	tcp_sync_mss
+EXPORT_SYMBOL vmlinux 0x075e6bd4	pci_set_consistent_dma_mask
+EXPORT_SYMBOL vmlinux 0x077a8622	tty_write_room
+EXPORT_SYMBOL vmlinux 0x078b589c	netdev_boot_setup_check
+EXPORT_SYMBOL vmlinux 0x0799aca4	local_bh_enable
+EXPORT_SYMBOL vmlinux 0x0799c50a	param_set_ulong
+EXPORT_SYMBOL vmlinux 0x07a890c8	fb_alloc_cmap
+EXPORT_SYMBOL vmlinux 0x07acc206	blk_rq_init
+EXPORT_SYMBOL vmlinux 0x07bb6617	i2c_add_adapter
+EXPORT_SYMBOL vmlinux 0x07c68495	__lock_page
+EXPORT_SYMBOL vmlinux 0x07cc4a5d	printk_timed_ratelimit
+EXPORT_SYMBOL vmlinux 0x07df01be	sock_no_listen
+EXPORT_SYMBOL vmlinux 0x080bc39d	del_gendisk
+EXPORT_SYMBOL vmlinux 0x0826b0dc	__flush_dcache_range
+EXPORT_SYMBOL vmlinux 0x082c3213	pci_root_buses
+EXPORT_SYMBOL vmlinux 0x0832d09f	pcie_get_readrq
+EXPORT_SYMBOL vmlinux 0x0836695c	drm_sman_takedown
+EXPORT_SYMBOL vmlinux 0x087bed2c	tcp_proc_unregister
+EXPORT_SYMBOL vmlinux 0x088ddf1f	drm_mm_clean
+EXPORT_SYMBOL vmlinux 0x089da822	nf_log_register
+EXPORT_SYMBOL vmlinux 0x08a9a751	set_security_override
+EXPORT_SYMBOL vmlinux 0x08b0f8d3	drm_mode_connector_list_update
+EXPORT_SYMBOL vmlinux 0x08ced4f2	dquot_acquire
+EXPORT_SYMBOL vmlinux 0x08d66a3a	warn_slowpath_fmt
+EXPORT_SYMBOL vmlinux 0x08ed0b62	mac_vmode_to_var
+EXPORT_SYMBOL vmlinux 0x08f29019	dquot_mark_dquot_dirty
+EXPORT_SYMBOL vmlinux 0x09293d02	__rta_fill
+EXPORT_SYMBOL vmlinux 0x092b007a	sleep_on_timeout
+EXPORT_SYMBOL vmlinux 0x09412917	drm_i2c_encoder_init
+EXPORT_SYMBOL vmlinux 0x0948cde9	num_physpages
+EXPORT_SYMBOL vmlinux 0x095bb830	down_interruptible
+EXPORT_SYMBOL vmlinux 0x095c746d	security_path_rmdir
+EXPORT_SYMBOL vmlinux 0x095e33b1	tty_register_device
+EXPORT_SYMBOL vmlinux 0x09810d4f	__dst_free
+EXPORT_SYMBOL vmlinux 0x098b71c6	fb_dealloc_cmap
+EXPORT_SYMBOL vmlinux 0x09aa1696	ilookup
+EXPORT_SYMBOL vmlinux 0x09c55cec	schedule_timeout_interruptible
+EXPORT_SYMBOL vmlinux 0x09c8c5cd	ip_ct_attach
+EXPORT_SYMBOL vmlinux 0x09c8eb55	font_vga_8x16
+EXPORT_SYMBOL vmlinux 0x09d5e27d	dev_set_mtu
+EXPORT_SYMBOL vmlinux 0x0a0a11ac	tcp_close
+EXPORT_SYMBOL vmlinux 0x0a0daac0	nonseekable_open
+EXPORT_SYMBOL vmlinux 0x0a125f20	drm_ati_pcigart_cleanup
+EXPORT_SYMBOL vmlinux 0x0a2487e0	unblock_all_signals
+EXPORT_SYMBOL vmlinux 0x0a443cfe	xfrm4_prepare_output
+EXPORT_SYMBOL vmlinux 0x0a44b9d1	pci_unmap_sg
+EXPORT_SYMBOL vmlinux 0x0a498b9c	netdev_class_remove_file
+EXPORT_SYMBOL vmlinux 0x0a683639	slow_work_register_user
+EXPORT_SYMBOL vmlinux 0x0a735de5	blk_queue_dma_alignment
+EXPORT_SYMBOL vmlinux 0x0a945acf	d_genocide
+EXPORT_SYMBOL vmlinux 0x0acb1a3c	__bitmap_shift_right
+EXPORT_SYMBOL vmlinux 0x0accec3c	dma_supported
+EXPORT_SYMBOL vmlinux 0x0ae4b77a	__lock_buffer
+EXPORT_SYMBOL vmlinux 0x0af2303d	pagecache_write_begin
+EXPORT_SYMBOL vmlinux 0x0b1698f9	neigh_seq_next
+EXPORT_SYMBOL vmlinux 0x0b19b0d8	dm_table_get_size
+EXPORT_SYMBOL vmlinux 0x0b1beb31	vmalloc_32_user
+EXPORT_SYMBOL vmlinux 0x0b1efc74	pci_bus_write_config_word
+EXPORT_SYMBOL vmlinux 0x0b3f40b0	bio_free
+EXPORT_SYMBOL vmlinux 0x0b554f0c	start_tty
+EXPORT_SYMBOL vmlinux 0x0b689eb3	inode_setattr
+EXPORT_SYMBOL vmlinux 0x0b725d74	blk_queue_io_min
+EXPORT_SYMBOL vmlinux 0x0b742fd7	simple_strtol
+EXPORT_SYMBOL vmlinux 0x0b7d551e	journal_unlock_updates
+EXPORT_SYMBOL vmlinux 0x0b81b52e	nobh_write_end
+EXPORT_SYMBOL vmlinux 0x0ba8b9f3	__breadahead
+EXPORT_SYMBOL vmlinux 0x0be0d79f	add_to_page_cache_locked
+EXPORT_SYMBOL vmlinux 0x0c09f203	tcp_rcv_state_process
+EXPORT_SYMBOL vmlinux 0x0c27abf0	ip_setsockopt
+EXPORT_SYMBOL vmlinux 0x0c7cf91e	dm_io_client_destroy
+EXPORT_SYMBOL vmlinux 0x0ca40793	key_task_permission
+EXPORT_SYMBOL vmlinux 0x0cae232b	utf16s_to_utf8s
+EXPORT_SYMBOL vmlinux 0x0cbd9cc7	proc_create_data
+EXPORT_SYMBOL vmlinux 0x0cf66e14	__secpath_destroy
+EXPORT_SYMBOL vmlinux 0x0d0fe2f4	down_trylock
+EXPORT_SYMBOL vmlinux 0x0d3433e2	arp_send
+EXPORT_SYMBOL vmlinux 0x0d37801a	tty_port_tty_get
+EXPORT_SYMBOL vmlinux 0x0d542439	__ipv6_addr_type
+EXPORT_SYMBOL vmlinux 0x0d572ca2	vmap
+EXPORT_SYMBOL vmlinux 0x0d70cdf3	blk_start_request
+EXPORT_SYMBOL vmlinux 0x0d928ace	iget5_locked
+EXPORT_SYMBOL vmlinux 0x0da10ec3	security_sock_graft
+EXPORT_SYMBOL vmlinux 0x0dcbd79c	phy_connect_direct
+EXPORT_SYMBOL vmlinux 0x0dd9455f	per_cpu____cpu_data
+EXPORT_SYMBOL vmlinux 0x0ddeb83e	input_register_device
+EXPORT_SYMBOL vmlinux 0x0de2ce3b	blk_rq_map_kern
+EXPORT_SYMBOL vmlinux 0x0e046b0a	xfrm_state_lookup
+EXPORT_SYMBOL vmlinux 0x0e34f631	mac_find_mode
+EXPORT_SYMBOL vmlinux 0x0e382adb	pci_set_dma_mask
+EXPORT_SYMBOL vmlinux 0x0e432c5f	pci_find_next_bus
+EXPORT_SYMBOL vmlinux 0x0e4e7be0	fb_find_mode
+EXPORT_SYMBOL vmlinux 0x0e52592a	panic
+EXPORT_SYMBOL vmlinux 0x0e552dd1	tty_devnum
+EXPORT_SYMBOL vmlinux 0x0e713337	sg_init_table
+EXPORT_SYMBOL vmlinux 0x0e8bde8b	get_super
+EXPORT_SYMBOL vmlinux 0x0e90fa58	load_nls
+EXPORT_SYMBOL vmlinux 0x0ea1d61f	__dev_getfirstbyhwtype
+EXPORT_SYMBOL vmlinux 0x0ed5572e	dquot_release_reserved_space
+EXPORT_SYMBOL vmlinux 0x0ee366b6	ethtool_op_get_ufo
+EXPORT_SYMBOL vmlinux 0x0ee5f9f7	pcim_iomap_table
+EXPORT_SYMBOL vmlinux 0x0eebe6b2	unregister_tcf_proto_ops
+EXPORT_SYMBOL vmlinux 0x0eef3fc7	simple_transaction_release
+EXPORT_SYMBOL vmlinux 0x0f1ef871	posix_acl_alloc
+EXPORT_SYMBOL vmlinux 0x0f378a1e	___copy_from_user
+EXPORT_SYMBOL vmlinux 0x0f44c56c	xfrm_state_delete
+EXPORT_SYMBOL vmlinux 0x0f590924	elv_rb_latter_request
+EXPORT_SYMBOL vmlinux 0x0f618a7b	mb_cache_create
+EXPORT_SYMBOL vmlinux 0x0f64120a	napi_gro_receive
+EXPORT_SYMBOL vmlinux 0x0f88c0cb	sk_stop_timer
+EXPORT_SYMBOL vmlinux 0x0f984e88	inet_shutdown
+EXPORT_SYMBOL vmlinux 0x0fbde448	destroy_EII_client
+EXPORT_SYMBOL vmlinux 0x0fc5e8eb	radix_tree_gang_lookup_slot
+EXPORT_SYMBOL vmlinux 0x0fce10a5	sock_common_setsockopt
+EXPORT_SYMBOL vmlinux 0x100339e1	jbd2_journal_unlock_updates
+EXPORT_SYMBOL vmlinux 0x1005b094	of_getintprop_default
+EXPORT_SYMBOL vmlinux 0x105e2727	__tracepoint_kmalloc
+EXPORT_SYMBOL vmlinux 0x108e8985	param_get_uint
+EXPORT_SYMBOL vmlinux 0x10902bf7	insb
+EXPORT_SYMBOL vmlinux 0x10994d05	input_unregister_device
+EXPORT_SYMBOL vmlinux 0x10b04284	ida_get_new
+EXPORT_SYMBOL vmlinux 0x10b3c405	xfrm_input
+EXPORT_SYMBOL vmlinux 0x10d29ccb	sunserial_console_match
+EXPORT_SYMBOL vmlinux 0x10d42264	idr_get_new
+EXPORT_SYMBOL vmlinux 0x10ee20bb	default_blu
+EXPORT_SYMBOL vmlinux 0x10f87bc5	input_unregister_handler
+EXPORT_SYMBOL vmlinux 0x111f67af	atomic64_add_ret
+EXPORT_SYMBOL vmlinux 0x11217bfa	textsearch_find_continuous
+EXPORT_SYMBOL vmlinux 0x114780e1	blk_recount_segments
+EXPORT_SYMBOL vmlinux 0x114ed1ce	schedule_work_on
+EXPORT_SYMBOL vmlinux 0x115e0614	uart_resume_port
+EXPORT_SYMBOL vmlinux 0x1163f0a7	blk_max_low_pfn
+EXPORT_SYMBOL vmlinux 0x117093be	qdisc_class_hash_init
+EXPORT_SYMBOL vmlinux 0x118f01ea	putname
+EXPORT_SYMBOL vmlinux 0x11b6ec36	tty_port_free_xmit_buf
+EXPORT_SYMBOL vmlinux 0x120c5bf0	dev_addr_add
+EXPORT_SYMBOL vmlinux 0x121cf3d5	handle_sysrq
+EXPORT_SYMBOL vmlinux 0x12276207	__inet6_hash
+EXPORT_SYMBOL vmlinux 0x124e6c8f	register_framebuffer
+EXPORT_SYMBOL vmlinux 0x1253ceb8	__splice_from_pipe
+EXPORT_SYMBOL vmlinux 0x1280b871	dentry_open
+EXPORT_SYMBOL vmlinux 0x12d09a67	sun4v_hvapi_unregister
+EXPORT_SYMBOL vmlinux 0x12da3af2	arp_find
+EXPORT_SYMBOL vmlinux 0x12ea337e	outsb
+EXPORT_SYMBOL vmlinux 0x12fa76e0	otg_set_transceiver
+EXPORT_SYMBOL vmlinux 0x13143336	slow_work_sleep_till_thread_needed
+EXPORT_SYMBOL vmlinux 0x133ed78b	arp_tbl
+EXPORT_SYMBOL vmlinux 0x137e670f	submit_bio
+EXPORT_SYMBOL vmlinux 0x1380a3c0	cfb_fillrect
+EXPORT_SYMBOL vmlinux 0x138a78d1	set_current_groups
+EXPORT_SYMBOL vmlinux 0x1395bdb3	of_parse_phandle
+EXPORT_SYMBOL vmlinux 0x13b6eb57	fb_class
+EXPORT_SYMBOL vmlinux 0x140e2053	vm_insert_pfn
+EXPORT_SYMBOL vmlinux 0x1426217c	f_setown
+EXPORT_SYMBOL vmlinux 0x142ec69a	abort_creds
+EXPORT_SYMBOL vmlinux 0x144d4b72	kernel_sock_shutdown
+EXPORT_SYMBOL vmlinux 0x144ed3a1	dev_base_lock
+EXPORT_SYMBOL vmlinux 0x145da290	i2c_smbus_write_byte
+EXPORT_SYMBOL vmlinux 0x14680538	__blockdev_direct_IO
+EXPORT_SYMBOL vmlinux 0x147eb095	pci_set_dma_seg_boundary
+EXPORT_SYMBOL vmlinux 0x14a086c0	napi_reuse_skb
+EXPORT_SYMBOL vmlinux 0x14ca47cc	ldc_read
+EXPORT_SYMBOL vmlinux 0x14cc2b26	kmem_cache_free
+EXPORT_SYMBOL vmlinux 0x14f91eba	mb_cache_entry_release
+EXPORT_SYMBOL vmlinux 0x15001030	security_path_rename
+EXPORT_SYMBOL vmlinux 0x1513acc9	inet_register_protosw
+EXPORT_SYMBOL vmlinux 0x1551dc51	bitmap_find_free_region
+EXPORT_SYMBOL vmlinux 0x1562496d	pci_alloc_consistent
+EXPORT_SYMBOL vmlinux 0x1568549b	truncate_pagecache
+EXPORT_SYMBOL vmlinux 0x156c69de	ip_mc_inc_group
+EXPORT_SYMBOL vmlinux 0x15fc5e34	key_link
+EXPORT_SYMBOL vmlinux 0x15fc81c3	splice_from_pipe_begin
+EXPORT_SYMBOL vmlinux 0x16305289	warn_slowpath_null
+EXPORT_SYMBOL vmlinux 0x163c5e39	twl4030_i2c_read
+EXPORT_SYMBOL vmlinux 0x16479e8f	panic_notifier_list
+EXPORT_SYMBOL vmlinux 0x16687c68	qdisc_watchdog_cancel
+EXPORT_SYMBOL vmlinux 0x1689e671	pci_dev_driver
+EXPORT_SYMBOL vmlinux 0x16a3a583	drm_add_edid_modes
+EXPORT_SYMBOL vmlinux 0x16d3f945	__elv_add_request
+EXPORT_SYMBOL vmlinux 0x16e53815	tcp_v4_conn_request
+EXPORT_SYMBOL vmlinux 0x16e911d4	down_write
+EXPORT_SYMBOL vmlinux 0x16fa6a29	jbd2_journal_abort
+EXPORT_SYMBOL vmlinux 0x17066135	xfrm4_rcv_encap
+EXPORT_SYMBOL vmlinux 0x1712f429	dst_alloc
+EXPORT_SYMBOL vmlinux 0x171b43a0	drm_pci_alloc
+EXPORT_SYMBOL vmlinux 0x1770126e	xfrm_alloc_spi
+EXPORT_SYMBOL vmlinux 0x1771170f	drm_mm_init
+EXPORT_SYMBOL vmlinux 0x17c379c1	dev_add_pack
+EXPORT_SYMBOL vmlinux 0x17c7731f	dev_addr_del_multiple
+EXPORT_SYMBOL vmlinux 0x17c85a66	radix_tree_tagged
+EXPORT_SYMBOL vmlinux 0x17da2531	drm_gem_object_alloc
+EXPORT_SYMBOL vmlinux 0x17df17bc	sysctl_tcp_ecn
+EXPORT_SYMBOL vmlinux 0x17e54ae0	of_find_node_with_property
+EXPORT_SYMBOL vmlinux 0x17f341a0	i8042_lock_chip
+EXPORT_SYMBOL vmlinux 0x17fea2bb	inet_csk_reset_keepalive_timer
+EXPORT_SYMBOL vmlinux 0x180b8744	inet_stream_ops
+EXPORT_SYMBOL vmlinux 0x183fa88b	mempool_alloc_slab
+EXPORT_SYMBOL vmlinux 0x187726e4	get_phy_id
+EXPORT_SYMBOL vmlinux 0x189b6bac	memory_read_from_buffer
+EXPORT_SYMBOL vmlinux 0x18ae0bb0	sock_no_shutdown
+EXPORT_SYMBOL vmlinux 0x18bef9d9	mdesc_node_by_name
+EXPORT_SYMBOL vmlinux 0x18e54219	blk_get_request
+EXPORT_SYMBOL vmlinux 0x18e8401d	proc_dointvec_jiffies
+EXPORT_SYMBOL vmlinux 0x1906309b	dquot_release
+EXPORT_SYMBOL vmlinux 0x190bb2e0	generic_permission
+EXPORT_SYMBOL vmlinux 0x192a252e	update_region
+EXPORT_SYMBOL vmlinux 0x19391763	iov_iter_fault_in_readable
+EXPORT_SYMBOL vmlinux 0x1966bf16	down_read_trylock
+EXPORT_SYMBOL vmlinux 0x1976bc16	__tracepoint_kmem_cache_free
+EXPORT_SYMBOL vmlinux 0x197d4152	__vlan_hwaccel_rx
+EXPORT_SYMBOL vmlinux 0x199dd5ba	xfrm_policy_register_afinfo
+EXPORT_SYMBOL vmlinux 0x199ed0cd	net_disable_timestamp
+EXPORT_SYMBOL vmlinux 0x19a0114a	generic_unplug_device
+EXPORT_SYMBOL vmlinux 0x19de9dda	qdisc_list_del
+EXPORT_SYMBOL vmlinux 0x1a120abb	sock_no_recvmsg
+EXPORT_SYMBOL vmlinux 0x1a3505bf	bio_integrity_trim
+EXPORT_SYMBOL vmlinux 0x1a3583aa	pcix_get_max_mmrbc
+EXPORT_SYMBOL vmlinux 0x1a35bcbc	VISenter
+EXPORT_SYMBOL vmlinux 0x1a5b9546	bio_kmalloc
+EXPORT_SYMBOL vmlinux 0x1a7bd3b2	tcp_create_openreq_child
+EXPORT_SYMBOL vmlinux 0x1aa759d0	ns_to_timeval
+EXPORT_SYMBOL vmlinux 0x1ace138d	bitmap_allocate_region
+EXPORT_SYMBOL vmlinux 0x1ad9f95a	prom_finddevice
+EXPORT_SYMBOL vmlinux 0x1b015d25	bitmap_parselist
+EXPORT_SYMBOL vmlinux 0x1b371a72	key_put
+EXPORT_SYMBOL vmlinux 0x1b5f6ad6	path_lookup
+EXPORT_SYMBOL vmlinux 0x1b6314fd	in_aton
+EXPORT_SYMBOL vmlinux 0x1b8b95ad	i8042_unlock_chip
+EXPORT_SYMBOL vmlinux 0x1b8f7274	bioset_create
+EXPORT_SYMBOL vmlinux 0x1b91d72a	read_dev_sector
+EXPORT_SYMBOL vmlinux 0x1b9981cc	set_irq_wake
+EXPORT_SYMBOL vmlinux 0x1be6d238	init_timer_deferrable_key
+EXPORT_SYMBOL vmlinux 0x1be9e13d	block_truncate_page
+EXPORT_SYMBOL vmlinux 0x1bebec23	dma_pool_alloc
+EXPORT_SYMBOL vmlinux 0x1c1af916	set_normalized_timespec
+EXPORT_SYMBOL vmlinux 0x1c1b42b6	skb_unlink
+EXPORT_SYMBOL vmlinux 0x1c3d1289	vfs_quota_on_mount
+EXPORT_SYMBOL vmlinux 0x1c4edf13	pci_get_class
+EXPORT_SYMBOL vmlinux 0x1c678d7d	skb_dma_map
+EXPORT_SYMBOL vmlinux 0x1c6e29de	journal_clear_err
+EXPORT_SYMBOL vmlinux 0x1c7774fd	drm_gem_mmap
+EXPORT_SYMBOL vmlinux 0x1c80de9c	ip_send_check
+EXPORT_SYMBOL vmlinux 0x1c8e5326	__netif_schedule
+EXPORT_SYMBOL vmlinux 0x1c94908f	simple_rename
+EXPORT_SYMBOL vmlinux 0x1c9ed91e	nla_put_nohdr
+EXPORT_SYMBOL vmlinux 0x1ca2758b	generic_block_bmap
+EXPORT_SYMBOL vmlinux 0x1cc6719a	register_reboot_notifier
+EXPORT_SYMBOL vmlinux 0x1cc81ee3	skb_seq_read
+EXPORT_SYMBOL vmlinux 0x1d4de4a2	netlink_rcv_skb
+EXPORT_SYMBOL vmlinux 0x1d61226a	generic_ro_fops
+EXPORT_SYMBOL vmlinux 0x1d7015c8	ip_cmsg_recv
+EXPORT_SYMBOL vmlinux 0x1d745629	skb_over_panic
+EXPORT_SYMBOL vmlinux 0x1dc36131	fb_destroy_modedb
+EXPORT_SYMBOL vmlinux 0x1dd571e6	fb_copy_cmap
+EXPORT_SYMBOL vmlinux 0x1e2d57ce	sk_filter
+EXPORT_SYMBOL vmlinux 0x1e3f86d8	ioctl_by_bdev
+EXPORT_SYMBOL vmlinux 0x1e4b950d	__devm_release_region
+EXPORT_SYMBOL vmlinux 0x1e6453aa	blk_queue_max_segment_size
+EXPORT_SYMBOL vmlinux 0x1e6cf4ef	pci_clear_mwi
+EXPORT_SYMBOL vmlinux 0x1e6d26a8	strstr
+EXPORT_SYMBOL vmlinux 0x1e73a411	mb_cache_shrink
+EXPORT_SYMBOL vmlinux 0x1e906cc2	get_write_access
+EXPORT_SYMBOL vmlinux 0x1ebbf67f	i2c_use_client
+EXPORT_SYMBOL vmlinux 0x1edc9598	_atomic_dec_and_lock
+EXPORT_SYMBOL vmlinux 0x1efdad4f	wait_on_page_bit
+EXPORT_SYMBOL vmlinux 0x1efe283f	__cap_full_set
+EXPORT_SYMBOL vmlinux 0x1f072c59	drm_property_add_enum
+EXPORT_SYMBOL vmlinux 0x1f106e0b	iw_handler_get_thrspy
+EXPORT_SYMBOL vmlinux 0x1f11a5c0	igrab
+EXPORT_SYMBOL vmlinux 0x1f17e041	vc_resize
+EXPORT_SYMBOL vmlinux 0x1f4125ce	blk_queue_update_dma_pad
+EXPORT_SYMBOL vmlinux 0x1f5401f1	qdisc_calculate_pkt_len
+EXPORT_SYMBOL vmlinux 0x1f5c0cd6	slow_work_unregister_user
+EXPORT_SYMBOL vmlinux 0x1f7cc628	mempool_create
+EXPORT_SYMBOL vmlinux 0x1f957dd3	call_usermodehelper_stdinpipe
+EXPORT_SYMBOL vmlinux 0x1f9bd6bd	vfs_link
+EXPORT_SYMBOL vmlinux 0x1fa7a991	skb_copy_and_csum_datagram_iovec
+EXPORT_SYMBOL vmlinux 0x1fae7a0b	wait_for_completion_timeout
+EXPORT_SYMBOL vmlinux 0x1fe40bbb	___pskb_trim
+EXPORT_SYMBOL vmlinux 0x1fe87c3b	sock_init_data
+EXPORT_SYMBOL vmlinux 0x1fedf0f4	__request_region
+EXPORT_SYMBOL vmlinux 0x20000329	simple_strtoul
+EXPORT_SYMBOL vmlinux 0x2000fa27	drm_gem_vm_close
+EXPORT_SYMBOL vmlinux 0x2014fad2	add_timer
+EXPORT_SYMBOL vmlinux 0x20385c58	genl_register_mc_group
+EXPORT_SYMBOL vmlinux 0x204857ac	proc_dostring
+EXPORT_SYMBOL vmlinux 0x20645642	drm_debug
+EXPORT_SYMBOL vmlinux 0x207b61d1	skb_free_datagram
+EXPORT_SYMBOL vmlinux 0x20919bb0	jbd2_journal_init_dev
+EXPORT_SYMBOL vmlinux 0x21451ac4	drm_sman_owner_cleanup
+EXPORT_SYMBOL vmlinux 0x2147e5e4	sync_inode
+EXPORT_SYMBOL vmlinux 0x215ebd78	bitrev16
+EXPORT_SYMBOL vmlinux 0x2162114a	sk_stream_wait_connect
+EXPORT_SYMBOL vmlinux 0x2168c247	unregister_sysrq_key
+EXPORT_SYMBOL vmlinux 0x217ddd62	bdevname
+EXPORT_SYMBOL vmlinux 0x2183a690	security_sb_set_mnt_opts
+EXPORT_SYMBOL vmlinux 0x21a37a82	dqget
+EXPORT_SYMBOL vmlinux 0x21afe23d	ldc_map_single
+EXPORT_SYMBOL vmlinux 0x21c2e5c8	pskb_expand_head
+EXPORT_SYMBOL vmlinux 0x21f88ee1	bio_integrity_split
+EXPORT_SYMBOL vmlinux 0x222e7ce2	sysfs_streq
+EXPORT_SYMBOL vmlinux 0x224d85b8	vio_ldc_alloc
+EXPORT_SYMBOL vmlinux 0x225073d7	jbd2_log_start_commit
+EXPORT_SYMBOL vmlinux 0x2253963a	drm_mode_probed_add
+EXPORT_SYMBOL vmlinux 0x226be11e	cdev_add
+EXPORT_SYMBOL vmlinux 0x226e86a9	audit_log
+EXPORT_SYMBOL vmlinux 0x2288378f	system_state
+EXPORT_SYMBOL vmlinux 0x228ed87c	tcf_hash_create
+EXPORT_SYMBOL vmlinux 0x229295f8	inet_frag_kill
+EXPORT_SYMBOL vmlinux 0x22a320ac	blk_register_region
+EXPORT_SYMBOL vmlinux 0x22a6e88a	i2c_smbus_process_call
+EXPORT_SYMBOL vmlinux 0x22a73912	__tcp_put_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x22b325d5	kd_mksound
+EXPORT_SYMBOL vmlinux 0x22b6533b	xfrm_sad_getinfo
+EXPORT_SYMBOL vmlinux 0x22c3d947	proc_mkdir
+EXPORT_SYMBOL vmlinux 0x23269a13	strict_strtoul
+EXPORT_SYMBOL vmlinux 0x2326a178	page_follow_link_light
+EXPORT_SYMBOL vmlinux 0x232b52c3	generic_file_mmap
+EXPORT_SYMBOL vmlinux 0x233c5ce1	get_phy_device
+EXPORT_SYMBOL vmlinux 0x23409843	rtnl_create_link
+EXPORT_SYMBOL vmlinux 0x234509f3	strncat
+EXPORT_SYMBOL vmlinux 0x23493696	drm_encoder_cleanup
+EXPORT_SYMBOL vmlinux 0x2370c637	make_EII_client
+EXPORT_SYMBOL vmlinux 0x2376b908	xfrm_bundle_ok
+EXPORT_SYMBOL vmlinux 0x23aed54b	request_key_async_with_auxdata
+EXPORT_SYMBOL vmlinux 0x23cbd821	vio_conn_reset
+EXPORT_SYMBOL vmlinux 0x23f79d54	dev_close
+EXPORT_SYMBOL vmlinux 0x23fd3028	vmalloc_node
+EXPORT_SYMBOL vmlinux 0x240677e3	xfrm_find_acq_byseq
+EXPORT_SYMBOL vmlinux 0x240a3893	journal_init_dev
+EXPORT_SYMBOL vmlinux 0x242016ad	pid_task
+EXPORT_SYMBOL vmlinux 0x242f2d92	blk_unplug
+EXPORT_SYMBOL vmlinux 0x243e2146	generic_removexattr
+EXPORT_SYMBOL vmlinux 0x2459bbcc	console_set_on_cmdline
+EXPORT_SYMBOL vmlinux 0x24686293	proc_doulongvec_minmax
+EXPORT_SYMBOL vmlinux 0x246bb3fc	tcp_v4_remember_stamp
+EXPORT_SYMBOL vmlinux 0x2486ccb2	i2c_release_client
+EXPORT_SYMBOL vmlinux 0x249c23f8	ether_setup
+EXPORT_SYMBOL vmlinux 0x249e893f	ebus_dma_prepare
+EXPORT_SYMBOL vmlinux 0x24ac7dc9	tcp_setsockopt
+EXPORT_SYMBOL vmlinux 0x24bad3cf	nla_reserve_nohdr
+EXPORT_SYMBOL vmlinux 0x24bd930a	outsl
+EXPORT_SYMBOL vmlinux 0x24cb51e8	insert_inode_locked4
+EXPORT_SYMBOL vmlinux 0x24d63132	per_cpu__softnet_data
+EXPORT_SYMBOL vmlinux 0x24f445d8	of_platform_bus_type
+EXPORT_SYMBOL vmlinux 0x24fdac79	wake_bit_function
+EXPORT_SYMBOL vmlinux 0x2546807b	per_cpu____irq_regs
+EXPORT_SYMBOL vmlinux 0x255bcd0f	task_tgid_nr_ns
+EXPORT_SYMBOL vmlinux 0x25779e9a	tty_throttle
+EXPORT_SYMBOL vmlinux 0x257f17f2	block_invalidatepage
+EXPORT_SYMBOL vmlinux 0x25820c64	fs_overflowuid
+EXPORT_SYMBOL vmlinux 0x258355b4	fb_find_best_mode
+EXPORT_SYMBOL vmlinux 0x259fc593	tcf_register_action
+EXPORT_SYMBOL vmlinux 0x25b53277	free_task
+EXPORT_SYMBOL vmlinux 0x25ba121c	mempool_resize
+EXPORT_SYMBOL vmlinux 0x25c3dbca	prom_nextprop
+EXPORT_SYMBOL vmlinux 0x25db74e7	mdesc_node_name
+EXPORT_SYMBOL vmlinux 0x25ecc468	tcf_exts_change
+EXPORT_SYMBOL vmlinux 0x25fa6f17	wait_for_completion
+EXPORT_SYMBOL vmlinux 0x25ffe8e9	tty_termios_hw_change
+EXPORT_SYMBOL vmlinux 0x261de91d	neigh_parms_release
+EXPORT_SYMBOL vmlinux 0x261e6f55	mutex_lock_killable
+EXPORT_SYMBOL vmlinux 0x262eea91	__up_read
+EXPORT_SYMBOL vmlinux 0x26378021	inet_frag_destroy
+EXPORT_SYMBOL vmlinux 0x263a0aa4	unmap_underlying_metadata
+EXPORT_SYMBOL vmlinux 0x263b6b8a	genphy_read_status
+EXPORT_SYMBOL vmlinux 0x263ee19b	sg_init_one
+EXPORT_SYMBOL vmlinux 0x263f0801	poll_initwait
+EXPORT_SYMBOL vmlinux 0x264b33d6	arp_broken_ops
+EXPORT_SYMBOL vmlinux 0x265c26fb	seq_release
+EXPORT_SYMBOL vmlinux 0x2663e30a	inet_addr_type
+EXPORT_SYMBOL vmlinux 0x267b1045	km_query
+EXPORT_SYMBOL vmlinux 0x267fc65b	__tasklet_hi_schedule
+EXPORT_SYMBOL vmlinux 0x2684c080	input_free_device
+EXPORT_SYMBOL vmlinux 0x26880cd9	textsearch_prepare
+EXPORT_SYMBOL vmlinux 0x26ac82f1	key_payload_reserve
+EXPORT_SYMBOL vmlinux 0x26bea4fa	tcp_v4_connect
+EXPORT_SYMBOL vmlinux 0x26e76fb8	sysctl_udp_wmem_min
+EXPORT_SYMBOL vmlinux 0x26ea61ef	n_tty_ioctl_helper
+EXPORT_SYMBOL vmlinux 0x26fe5cc2	tcp_gro_receive
+EXPORT_SYMBOL vmlinux 0x2704ba24	blk_peek_request
+EXPORT_SYMBOL vmlinux 0x2707ccb6	mdiobus_unregister
+EXPORT_SYMBOL vmlinux 0x271cc07f	mem_section
+EXPORT_SYMBOL vmlinux 0x271d4835	do_sync_write
+EXPORT_SYMBOL vmlinux 0x27472adb	skb_copy_datagram_const_iovec
+EXPORT_SYMBOL vmlinux 0x274c8967	ipv6_skip_exthdr
+EXPORT_SYMBOL vmlinux 0x274fd19c	skb_gro_reset_offset
+EXPORT_SYMBOL vmlinux 0x2753ef0c	call_usermodehelper_setcleanup
+EXPORT_SYMBOL vmlinux 0x275df193	ip_mc_dec_group
+EXPORT_SYMBOL vmlinux 0x276f5c59	netif_rx
+EXPORT_SYMBOL vmlinux 0x27864d57	memparse
+EXPORT_SYMBOL vmlinux 0x278cc904	blk_plug_device_unlocked
+EXPORT_SYMBOL vmlinux 0x278df0d9	jbd2_journal_restart
+EXPORT_SYMBOL vmlinux 0x2791f679	sock_create_lite
+EXPORT_SYMBOL vmlinux 0x27b7f0eb	__blk_end_request_cur
+EXPORT_SYMBOL vmlinux 0x27b81daa	xor_niagara_3
+EXPORT_SYMBOL vmlinux 0x27bbf221	disable_irq_nosync
+EXPORT_SYMBOL vmlinux 0x27c61ece	qdisc_put_stab
+EXPORT_SYMBOL vmlinux 0x27ee3775	__init_rwsem
+EXPORT_SYMBOL vmlinux 0x280eae60	input_unregister_handle
+EXPORT_SYMBOL vmlinux 0x2831f049	drm_mode_prune_invalid
+EXPORT_SYMBOL vmlinux 0x285ac517	strict_strtoll
+EXPORT_SYMBOL vmlinux 0x286fc62c	drm_mode_detachmode_crtc
+EXPORT_SYMBOL vmlinux 0x28763c1a	pci_bus_alloc_resource
+EXPORT_SYMBOL vmlinux 0x2876a6d3	memcpy_toiovec
+EXPORT_SYMBOL vmlinux 0x287a92a1	unregister_nls
+EXPORT_SYMBOL vmlinux 0x2893b628	clear_inode
+EXPORT_SYMBOL vmlinux 0x28e0f32f	napi_complete
+EXPORT_SYMBOL vmlinux 0x28f26ed0	tcp_mtup_init
+EXPORT_SYMBOL vmlinux 0x2916bf63	drm_sman_cleanup
+EXPORT_SYMBOL vmlinux 0x29215a38	aio_complete
+EXPORT_SYMBOL vmlinux 0x2924dc11	tcp_splice_read
+EXPORT_SYMBOL vmlinux 0x29274685	input_filter_device
+EXPORT_SYMBOL vmlinux 0x292a03d4	put_tty_driver
+EXPORT_SYMBOL vmlinux 0x294d38f1	elevator_init
+EXPORT_SYMBOL vmlinux 0x29537c9e	alloc_chrdev_region
+EXPORT_SYMBOL vmlinux 0x2958e96f	nf_log_packet
+EXPORT_SYMBOL vmlinux 0x2961ff60	vfs_readv
+EXPORT_SYMBOL vmlinux 0x29916137	flush_dcache_page
+EXPORT_SYMBOL vmlinux 0x2995c4b0	netif_napi_del
+EXPORT_SYMBOL vmlinux 0x29a6d795	skb_trim
+EXPORT_SYMBOL vmlinux 0x29bd4c46	__cap_init_eff_set
+EXPORT_SYMBOL vmlinux 0x29d87bdc	drm_vblank_cleanup
+EXPORT_SYMBOL vmlinux 0x29dac398	drm_mm_search_free
+EXPORT_SYMBOL vmlinux 0x29dc4be7	of_console_options
+EXPORT_SYMBOL vmlinux 0x29feae76	pci_dev_put
+EXPORT_SYMBOL vmlinux 0x2a068174	inet_del_protocol
+EXPORT_SYMBOL vmlinux 0x2a0b9a98	unregister_exec_domain
+EXPORT_SYMBOL vmlinux 0x2a18a47b	tcp_enter_memory_pressure
+EXPORT_SYMBOL vmlinux 0x2a505c3c	trap_block
+EXPORT_SYMBOL vmlinux 0x2a694c76	jbd2_journal_get_write_access
+EXPORT_SYMBOL vmlinux 0x2a7c6e1b	set_binfmt
+EXPORT_SYMBOL vmlinux 0x2a885f7f	remove_proc_entry
+EXPORT_SYMBOL vmlinux 0x2a8b2fe8	pci_bus_add_devices
+EXPORT_SYMBOL vmlinux 0x2abc50ee	stop_tty
+EXPORT_SYMBOL vmlinux 0x2b0612ec	bio_integrity_set_tag
+EXPORT_SYMBOL vmlinux 0x2b30e930	drm_get_edid
+EXPORT_SYMBOL vmlinux 0x2b36fd94	xfrm_input_resume
+EXPORT_SYMBOL vmlinux 0x2b50d5ad	end_buffer_read_sync
+EXPORT_SYMBOL vmlinux 0x2b5d4342	tcp_md5_hash_key
+EXPORT_SYMBOL vmlinux 0x2b69bbdf	drm_connector_property_get_value
+EXPORT_SYMBOL vmlinux 0x2b6de8ae	of_dev_put
+EXPORT_SYMBOL vmlinux 0x2b86b723	compat_mc_getsockopt
+EXPORT_SYMBOL vmlinux 0x2b937a6f	__ret_efault
+EXPORT_SYMBOL vmlinux 0x2ba707a8	sysctl_tcp_low_latency
+EXPORT_SYMBOL vmlinux 0x2bcb9eb9	file_fsync
+EXPORT_SYMBOL vmlinux 0x2bddc6c4	drm_master_get
+EXPORT_SYMBOL vmlinux 0x2c89985b	dm_io
+EXPORT_SYMBOL vmlinux 0x2cc30c27	ps2_command
+EXPORT_SYMBOL vmlinux 0x2ccd70fe	qdisc_destroy
+EXPORT_SYMBOL vmlinux 0x2ce188ae	ethtool_op_get_rx_csum
+EXPORT_SYMBOL vmlinux 0x2cf426fb	mem_map_zero
+EXPORT_SYMBOL vmlinux 0x2d3e205c	sk_reset_timer
+EXPORT_SYMBOL vmlinux 0x2d91c3c1	pagevec_lookup_tag
+EXPORT_SYMBOL vmlinux 0x2d92e9c2	eth_validate_addr
+EXPORT_SYMBOL vmlinux 0x2daa7939	xor_vis_4
+EXPORT_SYMBOL vmlinux 0x2dd2d598	tty_port_lower_dtr_rts
+EXPORT_SYMBOL vmlinux 0x2ddf3d0f	genphy_resume
+EXPORT_SYMBOL vmlinux 0x2e12e558	tcp_v4_do_rcv
+EXPORT_SYMBOL vmlinux 0x2e24ad4a	__bread
+EXPORT_SYMBOL vmlinux 0x2e2ce9e0	sysctl_tcp_syncookies
+EXPORT_SYMBOL vmlinux 0x2e4a39f8	sysctl_udp_mem
+EXPORT_SYMBOL vmlinux 0x2e8c57aa	blk_queue_max_sectors
+EXPORT_SYMBOL vmlinux 0x2ea46b9c	sock_register
+EXPORT_SYMBOL vmlinux 0x2eb2f903	drm_sman_free_key
+EXPORT_SYMBOL vmlinux 0x2ed451c3	audit_log_format
+EXPORT_SYMBOL vmlinux 0x2ee04c8e	get_sb_single
+EXPORT_SYMBOL vmlinux 0x2ef2bffb	dmam_pool_create
+EXPORT_SYMBOL vmlinux 0x2f62c57a	tcf_em_tree_validate
+EXPORT_SYMBOL vmlinux 0x2f81d194	unlock_buffer
+EXPORT_SYMBOL vmlinux 0x2f889817	security_sb_clone_mnt_opts
+EXPORT_SYMBOL vmlinux 0x2fc36b50	of_match_device
+EXPORT_SYMBOL vmlinux 0x300b2000	of_find_in_proplist
+EXPORT_SYMBOL vmlinux 0x3074f033	drm_order
+EXPORT_SYMBOL vmlinux 0x307f7776	timecompare_offset
+EXPORT_SYMBOL vmlinux 0x308872d2	d_obtain_alias
+EXPORT_SYMBOL vmlinux 0x30c9efac	netdev_features_change
+EXPORT_SYMBOL vmlinux 0x30ffe1f7	cancel_delayed_work_sync
+EXPORT_SYMBOL vmlinux 0x31121fe1	genl_unregister_mc_group
+EXPORT_SYMBOL vmlinux 0x3125f623	dmam_pool_destroy
+EXPORT_SYMBOL vmlinux 0x3127ef05	udp_poll
+EXPORT_SYMBOL vmlinux 0x312dfea7	blk_execute_rq
+EXPORT_SYMBOL vmlinux 0x3141a65f	clip_tbl_hook
+EXPORT_SYMBOL vmlinux 0x3145216f	pci_dev_present
+EXPORT_SYMBOL vmlinux 0x3147857d	default_red
+EXPORT_SYMBOL vmlinux 0x316e2de1	ipv4_specific
+EXPORT_SYMBOL vmlinux 0x316feeb3	__tcp_get_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x3196238a	journal_create
+EXPORT_SYMBOL vmlinux 0x319cad8c	compat_sock_get_timestampns
+EXPORT_SYMBOL vmlinux 0x31a095e3	poll_schedule_timeout
+EXPORT_SYMBOL vmlinux 0x31a2e826	tty_termios_baud_rate
+EXPORT_SYMBOL vmlinux 0x31b31f5c	csum_partial_copy_nocheck
+EXPORT_SYMBOL vmlinux 0x31ebadcd	in_group_p
+EXPORT_SYMBOL vmlinux 0x32100320	gnet_stats_start_copy_compat
+EXPORT_SYMBOL vmlinux 0x322d2cf9	neigh_sysctl_register
+EXPORT_SYMBOL vmlinux 0x323222ba	mutex_unlock
+EXPORT_SYMBOL vmlinux 0x323cefec	copy_from_user_fixup
+EXPORT_SYMBOL vmlinux 0x32694de2	genlmsg_multicast_allns
+EXPORT_SYMBOL vmlinux 0x3275585b	sock_create
+EXPORT_SYMBOL vmlinux 0x3283bc3d	generic_block_fiemap
+EXPORT_SYMBOL vmlinux 0x3285cc48	param_set_uint
+EXPORT_SYMBOL vmlinux 0x32a76e21	blkdev_issue_flush
+EXPORT_SYMBOL vmlinux 0x32e9879f	uart_remove_one_port
+EXPORT_SYMBOL vmlinux 0x33099f80	simple_transaction_get
+EXPORT_SYMBOL vmlinux 0x330e70e4	sg_free_table
+EXPORT_SYMBOL vmlinux 0x33134f61	jiffies_to_timeval
+EXPORT_SYMBOL vmlinux 0x3319e8e5	prepare_kernel_cred
+EXPORT_SYMBOL vmlinux 0x333be43a	alloc_buffer_head
+EXPORT_SYMBOL vmlinux 0x33456c5c	blk_integrity_unregister
+EXPORT_SYMBOL vmlinux 0x337230af	phy_stop_interrupts
+EXPORT_SYMBOL vmlinux 0x3385d5bf	i2c_bit_add_numbered_bus
+EXPORT_SYMBOL vmlinux 0x33a8f3fe	get_fs_type
+EXPORT_SYMBOL vmlinux 0x33b3cf5d	lro_flush_all
+EXPORT_SYMBOL vmlinux 0x33c47930	pci_find_bus
+EXPORT_SYMBOL vmlinux 0x33e66ee0	pci_fixup_cardbus
+EXPORT_SYMBOL vmlinux 0x34067469	qdisc_watchdog_schedule
+EXPORT_SYMBOL vmlinux 0x342dbac3	seq_open_private
+EXPORT_SYMBOL vmlinux 0x3447f1d5	phy_scan_fixups
+EXPORT_SYMBOL vmlinux 0x3457cb68	param_set_long
+EXPORT_SYMBOL vmlinux 0x345c4de2	tty_get_baud_rate
+EXPORT_SYMBOL vmlinux 0x348b7c71	jbd2_journal_get_undo_access
+EXPORT_SYMBOL vmlinux 0x349cba85	strchr
+EXPORT_SYMBOL vmlinux 0x34a6bb69	inet_ioctl
+EXPORT_SYMBOL vmlinux 0x34c1b94a	cont_write_begin
+EXPORT_SYMBOL vmlinux 0x34cfd3cb	fb_pan_display
+EXPORT_SYMBOL vmlinux 0x351e90b6	drm_core_ioremapfree
+EXPORT_SYMBOL vmlinux 0x35235701	pcim_iomap_regions_request_all
+EXPORT_SYMBOL vmlinux 0x35237259	bio_integrity_free
+EXPORT_SYMBOL vmlinux 0x3582ed17	vfs_stat
+EXPORT_SYMBOL vmlinux 0x3586212a	eth_header_cache_update
+EXPORT_SYMBOL vmlinux 0x358e22da	pci_find_parent_resource
+EXPORT_SYMBOL vmlinux 0x3594a7c9	kfree_skb
+EXPORT_SYMBOL vmlinux 0x35a62ed5	install_exec_creds
+EXPORT_SYMBOL vmlinux 0x35b0650f	vsnprintf
+EXPORT_SYMBOL vmlinux 0x35c2ba9e	refrigerator
+EXPORT_SYMBOL vmlinux 0x35cdb1c6	ebus_dma_addr
+EXPORT_SYMBOL vmlinux 0x35d03500	do_sync_read
+EXPORT_SYMBOL vmlinux 0x35da942e	generic_delete_inode
+EXPORT_SYMBOL vmlinux 0x35eeb355	gen_pool_alloc
+EXPORT_SYMBOL vmlinux 0x35fb3fe5	elv_rb_former_request
+EXPORT_SYMBOL vmlinux 0x36139a51	memcpy_fromiovec
+EXPORT_SYMBOL vmlinux 0x3639ab5a	deactivate_locked_super
+EXPORT_SYMBOL vmlinux 0x36816747	pci_dma_sync_single_for_cpu
+EXPORT_SYMBOL vmlinux 0x36875389	__timecompare_update
+EXPORT_SYMBOL vmlinux 0x369faa68	generic_show_options
+EXPORT_SYMBOL vmlinux 0x36ad5deb	i2c_smbus_xfer
+EXPORT_SYMBOL vmlinux 0x36cd95b7	skb_under_panic
+EXPORT_SYMBOL vmlinux 0x36d0a5fb	sock_tx_timestamp
+EXPORT_SYMBOL vmlinux 0x36e47222	remove_wait_queue
+EXPORT_SYMBOL vmlinux 0x37415276	xfrm_register_km
+EXPORT_SYMBOL vmlinux 0x3744cf36	vmalloc_to_pfn
+EXPORT_SYMBOL vmlinux 0x375465a7	radix_tree_gang_lookup_tag_slot
+EXPORT_SYMBOL vmlinux 0x378c00a7	irq_of_parse_and_map
+EXPORT_SYMBOL vmlinux 0x37af6a0a	abort_exclusive_wait
+EXPORT_SYMBOL vmlinux 0x37bae620	genphy_restart_aneg
+EXPORT_SYMBOL vmlinux 0x37befc70	jiffies_to_msecs
+EXPORT_SYMBOL vmlinux 0x37ce3216	slow_work_cancel
+EXPORT_SYMBOL vmlinux 0x37d8687e	jbd2_journal_get_create_access
+EXPORT_SYMBOL vmlinux 0x37db507b	i2c_master_recv
+EXPORT_SYMBOL vmlinux 0x383cdde2	__destroy_inode
+EXPORT_SYMBOL vmlinux 0x385c16f6	phy_driver_register
+EXPORT_SYMBOL vmlinux 0x38822f97	copy_user_page
+EXPORT_SYMBOL vmlinux 0x388f9128	xfrm_state_walk_done
+EXPORT_SYMBOL vmlinux 0x38b0c0bc	__locks_copy_lock
+EXPORT_SYMBOL vmlinux 0x38cbfb58	__skb_recv_datagram
+EXPORT_SYMBOL vmlinux 0x39166d25	netdev_set_master
+EXPORT_SYMBOL vmlinux 0x391a952c	register_netdev
+EXPORT_SYMBOL vmlinux 0x3980aac1	unregister_reboot_notifier
+EXPORT_SYMBOL vmlinux 0x39b8fa70	jbd2_journal_force_commit_nested
+EXPORT_SYMBOL vmlinux 0x39c4ff8e	ldc_free_exp_dring
+EXPORT_SYMBOL vmlinux 0x3a2204c6	security_netlink_recv
+EXPORT_SYMBOL vmlinux 0x3a23095e	sock_setsockopt
+EXPORT_SYMBOL vmlinux 0x3a261bd4	nobh_writepage
+EXPORT_SYMBOL vmlinux 0x3a29efec	pci_disable_device
+EXPORT_SYMBOL vmlinux 0x3a47d7f1	of_match_node
+EXPORT_SYMBOL vmlinux 0x3a82a0fb	sync_inodes_sb
+EXPORT_SYMBOL vmlinux 0x3a9aa54d	clear_bit
+EXPORT_SYMBOL vmlinux 0x3a9b6fb9	blk_unregister_region
+EXPORT_SYMBOL vmlinux 0x3a9e50be	atomic64_sub
+EXPORT_SYMBOL vmlinux 0x3aa00ec0	drm_mode_config_init
+EXPORT_SYMBOL vmlinux 0x3aa3a35b	tcf_hash_check
+EXPORT_SYMBOL vmlinux 0x3abb132f	generic_write_checks
+EXPORT_SYMBOL vmlinux 0x3adcc015	input_set_capability
+EXPORT_SYMBOL vmlinux 0x3ae73b37	alloc_tty_driver
+EXPORT_SYMBOL vmlinux 0x3ae831b6	kref_init
+EXPORT_SYMBOL vmlinux 0x3b3855e0	__pskb_pull_tail
+EXPORT_SYMBOL vmlinux 0x3b3fe8cb	prom_getsibling
+EXPORT_SYMBOL vmlinux 0x3b5097ff	drm_mode_connector_detach_encoder
+EXPORT_SYMBOL vmlinux 0x3b741ad0	tty_pair_get_pty
+EXPORT_SYMBOL vmlinux 0x3b856f0d	sk_stream_kill_queues
+EXPORT_SYMBOL vmlinux 0x3ba567a3	pci_request_region
+EXPORT_SYMBOL vmlinux 0x3bd1b1f6	msecs_to_jiffies
+EXPORT_SYMBOL vmlinux 0x3bd6dc84	blk_integrity_compare
+EXPORT_SYMBOL vmlinux 0x3beda982	seq_bitmap_list
+EXPORT_SYMBOL vmlinux 0x3c1c2016	journal_flush
+EXPORT_SYMBOL vmlinux 0x3c263bcb	jbd2_journal_clear_features
+EXPORT_SYMBOL vmlinux 0x3c2c5af5	sprintf
+EXPORT_SYMBOL vmlinux 0x3c356f1e	atomic_dec_and_mutex_lock
+EXPORT_SYMBOL vmlinux 0x3c3a8853	pci_unmap_rom
+EXPORT_SYMBOL vmlinux 0x3c4e2397	drm_read
+EXPORT_SYMBOL vmlinux 0x3c63234d	get_sb_pseudo
+EXPORT_SYMBOL vmlinux 0x3c67a5a5	i2c_smbus_write_block_data
+EXPORT_SYMBOL vmlinux 0x3c72cc76	ldc_alloc_exp_dring
+EXPORT_SYMBOL vmlinux 0x3c9a1409	drm_ht_just_insert_please
+EXPORT_SYMBOL vmlinux 0x3c9d1211	string_get_size
+EXPORT_SYMBOL vmlinux 0x3ca93008	blk_rq_map_sg
+EXPORT_SYMBOL vmlinux 0x3cad4963	inet_release
+EXPORT_SYMBOL vmlinux 0x3cc0a3bb	xfrm_spd_getinfo
+EXPORT_SYMBOL vmlinux 0x3ce4ca6f	disable_irq
+EXPORT_SYMBOL vmlinux 0x3cf4f7f6	serio_unregister_child_port
+EXPORT_SYMBOL vmlinux 0x3d0b79a2	locks_remove_posix
+EXPORT_SYMBOL vmlinux 0x3d19b3bc	release_sock
+EXPORT_SYMBOL vmlinux 0x3d2a19a6	pci_claim_resource
+EXPORT_SYMBOL vmlinux 0x3d2ebbd4	get_sb_bdev
+EXPORT_SYMBOL vmlinux 0x3d68bd4b	flow_cache_genid
+EXPORT_SYMBOL vmlinux 0x3d8728bb	memcpy_toiovecend
+EXPORT_SYMBOL vmlinux 0x3da3eea4	tty_pair_get_tty
+EXPORT_SYMBOL vmlinux 0x3db2e258	radix_tree_gang_lookup
+EXPORT_SYMBOL vmlinux 0x3dbe490b	__nla_reserve
+EXPORT_SYMBOL vmlinux 0x3dc6d005	dquot_commit_info
+EXPORT_SYMBOL vmlinux 0x3df78b53	sync_mapping_buffers
+EXPORT_SYMBOL vmlinux 0x3e383385	nf_hooks
+EXPORT_SYMBOL vmlinux 0x3e45e9ff	register_inetaddr_notifier
+EXPORT_SYMBOL vmlinux 0x3e57b4ad	ethtool_op_get_tx_csum
+EXPORT_SYMBOL vmlinux 0x3e6caebd	add_wait_queue_exclusive
+EXPORT_SYMBOL vmlinux 0x3e731b0f	dev_get_stats
+EXPORT_SYMBOL vmlinux 0x3e899c9d	blk_limits_io_min
+EXPORT_SYMBOL vmlinux 0x3e9718c5	init_net
+EXPORT_SYMBOL vmlinux 0x3eb23f68	drm_vblank_init
+EXPORT_SYMBOL vmlinux 0x3ed5c845	jbd2_journal_invalidatepage
+EXPORT_SYMBOL vmlinux 0x3ed63055	zlib_inflateReset
+EXPORT_SYMBOL vmlinux 0x3f0ba2fb	nf_setsockopt
+EXPORT_SYMBOL vmlinux 0x3f11b175	simple_release_fs
+EXPORT_SYMBOL vmlinux 0x3f4547a7	put_unused_fd
+EXPORT_SYMBOL vmlinux 0x3f67341e	default_llseek
+EXPORT_SYMBOL vmlinux 0x3f9afcf4	vfs_fsync
+EXPORT_SYMBOL vmlinux 0x3fa03a97	memset
+EXPORT_SYMBOL vmlinux 0x3fa913da	strspn
+EXPORT_SYMBOL vmlinux 0x3fb61f3d	sbusfb_compat_ioctl
+EXPORT_SYMBOL vmlinux 0x3fb717e8	vio_unregister_driver
+EXPORT_SYMBOL vmlinux 0x3ff62317	local_bh_disable
+EXPORT_SYMBOL vmlinux 0x40234f59	netpoll_send_udp
+EXPORT_SYMBOL vmlinux 0x402693e0	ftrace_print_flags_seq
+EXPORT_SYMBOL vmlinux 0x402bc7e5	pci_get_device
+EXPORT_SYMBOL vmlinux 0x405c1144	get_seconds
+EXPORT_SYMBOL vmlinux 0x40aaf090	xfrm_state_lookup_byaddr
+EXPORT_SYMBOL vmlinux 0x40c631ca	sock_release
+EXPORT_SYMBOL vmlinux 0x4101bbde	param_set_copystring
+EXPORT_SYMBOL vmlinux 0x4103b76b	sock_queue_rcv_skb
+EXPORT_SYMBOL vmlinux 0x41081e23	tty_unregister_driver
+EXPORT_SYMBOL vmlinux 0x4108e69a	fb_match_mode
+EXPORT_SYMBOL vmlinux 0x410af546	bio_integrity_prep
+EXPORT_SYMBOL vmlinux 0x41166725	inet_frags_init_net
+EXPORT_SYMBOL vmlinux 0x412ddc0c	dcache_lock
+EXPORT_SYMBOL vmlinux 0x41344088	param_get_charp
+EXPORT_SYMBOL vmlinux 0x41482d8b	strndup_user
+EXPORT_SYMBOL vmlinux 0x41673d09	__serio_register_port
+EXPORT_SYMBOL vmlinux 0x4167f5a9	iw_handler_set_spy
+EXPORT_SYMBOL vmlinux 0x416983d9	netdev_fix_features
+EXPORT_SYMBOL vmlinux 0x4188d439	neigh_rand_reach_time
+EXPORT_SYMBOL vmlinux 0x41c7705a	i2c_clients_command
+EXPORT_SYMBOL vmlinux 0x41d35148	locks_mandatory_area
+EXPORT_SYMBOL vmlinux 0x4211c3c1	zlib_inflateInit2
+EXPORT_SYMBOL vmlinux 0x42124338	of_release_dev
+EXPORT_SYMBOL vmlinux 0x42128c4d	sb_set_blocksize
+EXPORT_SYMBOL vmlinux 0x42224298	sscanf
+EXPORT_SYMBOL vmlinux 0x4230073b	journal_dirty_data
+EXPORT_SYMBOL vmlinux 0x4232c41d	pci_request_regions_exclusive
+EXPORT_SYMBOL vmlinux 0x425faacb	__downgrade_write
+EXPORT_SYMBOL vmlinux 0x42a4bdf2	in_egroup_p
+EXPORT_SYMBOL vmlinux 0x42acbf72	posix_acl_from_xattr
+EXPORT_SYMBOL vmlinux 0x42df1663	request_key_async
+EXPORT_SYMBOL vmlinux 0x4302d0eb	free_pages
+EXPORT_SYMBOL vmlinux 0x4333eadb	param_set_short
+EXPORT_SYMBOL vmlinux 0x434fa55c	release_console_sem
+EXPORT_SYMBOL vmlinux 0x4359b242	skb_dequeue_tail
+EXPORT_SYMBOL vmlinux 0x43821bec	ida_get_new_above
+EXPORT_SYMBOL vmlinux 0x439090b9	kernel_thread
+EXPORT_SYMBOL vmlinux 0x43a47a1a	__seq_open_private
+EXPORT_SYMBOL vmlinux 0x43a4938f	vm_get_page_prot
+EXPORT_SYMBOL vmlinux 0x43ab66c3	param_array_get
+EXPORT_SYMBOL vmlinux 0x43bea045	auxio_register
+EXPORT_SYMBOL vmlinux 0x43dc3f96	drm_mode_create_dithering_property
+EXPORT_SYMBOL vmlinux 0x43ec913a	put_cmsg
+EXPORT_SYMBOL vmlinux 0x43f8d2d6	bio_unmap_user
+EXPORT_SYMBOL vmlinux 0x43ff30cd	sg_alloc_table
+EXPORT_SYMBOL vmlinux 0x440fc53d	generic_read_dir
+EXPORT_SYMBOL vmlinux 0x44161c19	unregister_shrinker
+EXPORT_SYMBOL vmlinux 0x4419d33c	journal_get_write_access
+EXPORT_SYMBOL vmlinux 0x4443e520	kmem_ptr_validate
+EXPORT_SYMBOL vmlinux 0x444779c4	nla_find
+EXPORT_SYMBOL vmlinux 0x4454f584	soft_cursor
+EXPORT_SYMBOL vmlinux 0x447adc0e	drm_lock_free
+EXPORT_SYMBOL vmlinux 0x447f7e18	sun4v_niagara2_getperf
+EXPORT_SYMBOL vmlinux 0x44a22eb2	neigh_update
+EXPORT_SYMBOL vmlinux 0x44b13160	genl_unregister_ops
+EXPORT_SYMBOL vmlinux 0x44b24dec	blk_rq_map_user_iov
+EXPORT_SYMBOL vmlinux 0x44b911c3	rb_replace_node
+EXPORT_SYMBOL vmlinux 0x44c214d1	__wake_up_bit
+EXPORT_SYMBOL vmlinux 0x44dee11c	address_space_init_once
+EXPORT_SYMBOL vmlinux 0x44e3205a	pcibios_bus_to_resource
+EXPORT_SYMBOL vmlinux 0x44e9a829	match_token
+EXPORT_SYMBOL vmlinux 0x453027d5	mdiobus_register
+EXPORT_SYMBOL vmlinux 0x45396182	sg_miter_stop
+EXPORT_SYMBOL vmlinux 0x454cbd8e	mdesc_release
+EXPORT_SYMBOL vmlinux 0x4559d41c	misc_deregister
+EXPORT_SYMBOL vmlinux 0x455b2d0a	fb_get_buffer_offset
+EXPORT_SYMBOL vmlinux 0x4560cebc	nf_unregister_sockopt
+EXPORT_SYMBOL vmlinux 0x45704798	print_hex_dump_bytes
+EXPORT_SYMBOL vmlinux 0x4575315d	utf8s_to_utf16s
+EXPORT_SYMBOL vmlinux 0x457f87cf	lro_flush_pkt
+EXPORT_SYMBOL vmlinux 0x45947727	param_array_set
+EXPORT_SYMBOL vmlinux 0x45d7f21a	__xfrm_route_forward
+EXPORT_SYMBOL vmlinux 0x45e11134	jbd2_journal_revoke
+EXPORT_SYMBOL vmlinux 0x4610f39f	arp_create
+EXPORT_SYMBOL vmlinux 0x462f0442	d_alloc
+EXPORT_SYMBOL vmlinux 0x465793ab	devm_ioremap_nocache
+EXPORT_SYMBOL vmlinux 0x4660dd32	nla_append
+EXPORT_SYMBOL vmlinux 0x466c14a7	__delay
+EXPORT_SYMBOL vmlinux 0x46f0f3c7	close_bdev_exclusive
+EXPORT_SYMBOL vmlinux 0x4719ba4e	kfifo_free
+EXPORT_SYMBOL vmlinux 0x473e89ef	unregister_framebuffer
+EXPORT_SYMBOL vmlinux 0x475100c2	inet_get_local_port_range
+EXPORT_SYMBOL vmlinux 0x479419fa	down_read
+EXPORT_SYMBOL vmlinux 0x4794f89c	__set_page_dirty_buffers
+EXPORT_SYMBOL vmlinux 0x479c3c86	find_next_zero_bit
+EXPORT_SYMBOL vmlinux 0x47e2da86	dev_gro_receive
+EXPORT_SYMBOL vmlinux 0x47e31bf1	try_to_release_page
+EXPORT_SYMBOL vmlinux 0x47e4636e	dev_kfree_skb_any
+EXPORT_SYMBOL vmlinux 0x47f76a18	pcibios_resource_to_bus
+EXPORT_SYMBOL vmlinux 0x480a5e0b	simple_transaction_read
+EXPORT_SYMBOL vmlinux 0x4810ef86	drm_mm_dump_table
+EXPORT_SYMBOL vmlinux 0x48470f97	journal_force_commit_nested
+EXPORT_SYMBOL vmlinux 0x4854026b	__inet6_lookup_established
+EXPORT_SYMBOL vmlinux 0x4859b8bb	rtc_year_days
+EXPORT_SYMBOL vmlinux 0x4860d755	pci_clear_master
+EXPORT_SYMBOL vmlinux 0x486b6407	hweight64
+EXPORT_SYMBOL vmlinux 0x48735a96	shrink_dcache_sb
+EXPORT_SYMBOL vmlinux 0x487dde50	alloc_disk_node
+EXPORT_SYMBOL vmlinux 0x4895496d	kernel_setsockopt
+EXPORT_SYMBOL vmlinux 0x489c3b71	mod_timer_pinned
+EXPORT_SYMBOL vmlinux 0x48ab644d	dev_unicast_delete
+EXPORT_SYMBOL vmlinux 0x48c1d080	tcp_parse_md5sig_option
+EXPORT_SYMBOL vmlinux 0x48c5a0ba	fb_get_mode
+EXPORT_SYMBOL vmlinux 0x48cb9caa	drm_lock_take
+EXPORT_SYMBOL vmlinux 0x48e1bce9	uart_get_divisor
+EXPORT_SYMBOL vmlinux 0x48f9f12d	complete_all
+EXPORT_SYMBOL vmlinux 0x49439411	genl_unregister_family
+EXPORT_SYMBOL vmlinux 0x494c5e3f	pci_remove_bus
+EXPORT_SYMBOL vmlinux 0x49603fb8	security_sb_copy_data
+EXPORT_SYMBOL vmlinux 0x49b9c6b5	vm_insert_mixed
+EXPORT_SYMBOL vmlinux 0x49c112f8	of_parse_phandles_with_args
+EXPORT_SYMBOL vmlinux 0x49c21a3a	audit_log_start
+EXPORT_SYMBOL vmlinux 0x49e182c0	param_get_string
+EXPORT_SYMBOL vmlinux 0x49f21267	open_exec
+EXPORT_SYMBOL vmlinux 0x49fdb46f	bio_uncopy_user
+EXPORT_SYMBOL vmlinux 0x4a0b9ed1	of_find_property
+EXPORT_SYMBOL vmlinux 0x4a15ae23	prom_node_has_property
+EXPORT_SYMBOL vmlinux 0x4a358252	__bitmap_subset
+EXPORT_SYMBOL vmlinux 0x4a483717	bio_endio
+EXPORT_SYMBOL vmlinux 0x4a5ca726	pci_request_selected_regions
+EXPORT_SYMBOL vmlinux 0x4a841f2c	kthread_create
+EXPORT_SYMBOL vmlinux 0x4a87ef0c	drm_gtf_mode
+EXPORT_SYMBOL vmlinux 0x4acd93d3	release_resource
+EXPORT_SYMBOL vmlinux 0x4b536398	dev_addr_add_multiple
+EXPORT_SYMBOL vmlinux 0x4b587153	of_set_property
+EXPORT_SYMBOL vmlinux 0x4b7a59b1	kobject_init
+EXPORT_SYMBOL vmlinux 0x4b8edde9	complete_and_exit
+EXPORT_SYMBOL vmlinux 0x4b97882f	security_inode_setsecctx
+EXPORT_SYMBOL vmlinux 0x4b9f3684	kfifo_init
+EXPORT_SYMBOL vmlinux 0x4bbb4921	__ps2_command
+EXPORT_SYMBOL vmlinux 0x4bc4ad92	drm_master_put
+EXPORT_SYMBOL vmlinux 0x4bc53fa5	gnet_stats_copy_basic
+EXPORT_SYMBOL vmlinux 0x4be4bd8a	tty_kref_put
+EXPORT_SYMBOL vmlinux 0x4c1182cb	bitmap_scnprintf
+EXPORT_SYMBOL vmlinux 0x4c16c0e8	set_create_files_as
+EXPORT_SYMBOL vmlinux 0x4c1a31d6	netif_carrier_off
+EXPORT_SYMBOL vmlinux 0x4c4c956e	nla_memcmp
+EXPORT_SYMBOL vmlinux 0x4c504ace	vfs_quota_enable
+EXPORT_SYMBOL vmlinux 0x4c58c063	drm_mode_remove
+EXPORT_SYMBOL vmlinux 0x4c6494ea	eth_mac_addr
+EXPORT_SYMBOL vmlinux 0x4c6f55c5	dev_open
+EXPORT_SYMBOL vmlinux 0x4ca393ef	i2c_smbus_read_byte
+EXPORT_SYMBOL vmlinux 0x4cbbd171	__bitmap_weight
+EXPORT_SYMBOL vmlinux 0x4cbda2bf	prom_setprop
+EXPORT_SYMBOL vmlinux 0x4cdf7228	compat_ip_setsockopt
+EXPORT_SYMBOL vmlinux 0x4cebc82a	invalidate_inode_buffers
+EXPORT_SYMBOL vmlinux 0x4d2c678a	drm_getsarea
+EXPORT_SYMBOL vmlinux 0x4d32c3a1	i2c_smbus_read_i2c_block_data
+EXPORT_SYMBOL vmlinux 0x4d366e5f	cancel_dirty_page
+EXPORT_SYMBOL vmlinux 0x4d472449	generic_write_sync
+EXPORT_SYMBOL vmlinux 0x4d9a86b4	nf_register_hooks
+EXPORT_SYMBOL vmlinux 0x4da0622e	tty_vhangup
+EXPORT_SYMBOL vmlinux 0x4db4b262	pci_back_from_sleep
+EXPORT_SYMBOL vmlinux 0x4dc45be9	nf_log_unbind_pf
+EXPORT_SYMBOL vmlinux 0x4dd7516a	km_report
+EXPORT_SYMBOL vmlinux 0x4dda726b	match_strlcpy
+EXPORT_SYMBOL vmlinux 0x4df119fa	__bitmap_parse
+EXPORT_SYMBOL vmlinux 0x4e069249	security_tun_dev_post_create
+EXPORT_SYMBOL vmlinux 0x4e0e0e43	kernel_getsockname
+EXPORT_SYMBOL vmlinux 0x4e1928e4	bdi_register
+EXPORT_SYMBOL vmlinux 0x4e3567f7	match_int
+EXPORT_SYMBOL vmlinux 0x4e39c7b9	drm_vblank_count
+EXPORT_SYMBOL vmlinux 0x4e41c847	gen_pool_create
+EXPORT_SYMBOL vmlinux 0x4e6e8ea7	fg_console
+EXPORT_SYMBOL vmlinux 0x4e9dffb5	ip_fast_csum
+EXPORT_SYMBOL vmlinux 0x4ecc0abb	xfrm_find_acq
+EXPORT_SYMBOL vmlinux 0x4ed03247	ebus_dma_enable
+EXPORT_SYMBOL vmlinux 0x4edd72f7	block_all_signals
+EXPORT_SYMBOL vmlinux 0x4edfb08f	sget
+EXPORT_SYMBOL vmlinux 0x4f0ea0c0	up
+EXPORT_SYMBOL vmlinux 0x4f16bfc1	vfs_set_dqinfo
+EXPORT_SYMBOL vmlinux 0x4f1cd128	security_tun_dev_create
+EXPORT_SYMBOL vmlinux 0x4f352a29	bdi_destroy
+EXPORT_SYMBOL vmlinux 0x4f471299	journal_try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0x4f66b507	netlink_set_err
+EXPORT_SYMBOL vmlinux 0x4f67a4aa	__module_put_and_exit
+EXPORT_SYMBOL vmlinux 0x4f70bf08	framebuffer_release
+EXPORT_SYMBOL vmlinux 0x4fd07871	deny_write_access
+EXPORT_SYMBOL vmlinux 0x4fd6d171	journal_dirty_metadata
+EXPORT_SYMBOL vmlinux 0x4fdee897	i8042_command
+EXPORT_SYMBOL vmlinux 0x4feec817	ilookup5
+EXPORT_SYMBOL vmlinux 0x50211ee3	tcp_free_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x50242f9d	d_add_ci
+EXPORT_SYMBOL vmlinux 0x504831c7	tty_insert_flip_string
+EXPORT_SYMBOL vmlinux 0x506746b6	getrawmonotonic
+EXPORT_SYMBOL vmlinux 0x508f8e52	module_layout
+EXPORT_SYMBOL vmlinux 0x50956c28	audit_log_end
+EXPORT_SYMBOL vmlinux 0x509f9bd2	__generic_file_aio_write
+EXPORT_SYMBOL vmlinux 0x50a7484a	pci_fixup_device
+EXPORT_SYMBOL vmlinux 0x50c4e9b1	splice_from_pipe_feed
+EXPORT_SYMBOL vmlinux 0x50d56018	posix_acl_equiv_mode
+EXPORT_SYMBOL vmlinux 0x50e5e765	__find_get_block
+EXPORT_SYMBOL vmlinux 0x50e7acca	neigh_parms_alloc
+EXPORT_SYMBOL vmlinux 0x5118c382	secure_dccp_sequence_number
+EXPORT_SYMBOL vmlinux 0x51203d2c	set_device_ro
+EXPORT_SYMBOL vmlinux 0x5120b24a	sk_dst_check
+EXPORT_SYMBOL vmlinux 0x51493d94	finish_wait
+EXPORT_SYMBOL vmlinux 0x5158c857	of_n_addr_cells
+EXPORT_SYMBOL vmlinux 0x515b03df	xfrm_register_type
+EXPORT_SYMBOL vmlinux 0x516fb35f	security_inode_permission
+EXPORT_SYMBOL vmlinux 0x517a1333	security_path_link
+EXPORT_SYMBOL vmlinux 0x51dce73b	xfrm_state_walk_init
+EXPORT_SYMBOL vmlinux 0x52026cdf	security_sb_parse_opts_str
+EXPORT_SYMBOL vmlinux 0x52043d82	elv_rb_del
+EXPORT_SYMBOL vmlinux 0x52046e13	atomic_sub
+EXPORT_SYMBOL vmlinux 0x5234d235	invalidate_bdev
+EXPORT_SYMBOL vmlinux 0x52354a0b	mutex_trylock
+EXPORT_SYMBOL vmlinux 0x5251cae4	prom_getbool
+EXPORT_SYMBOL vmlinux 0x5259a423	read_cache_page
+EXPORT_SYMBOL vmlinux 0x5266dad9	skb_kill_datagram
+EXPORT_SYMBOL vmlinux 0x52760ca9	getnstimeofday
+EXPORT_SYMBOL vmlinux 0x527f9ba5	drm_connector_init
+EXPORT_SYMBOL vmlinux 0x528c911c	del_timer
+EXPORT_SYMBOL vmlinux 0x5290b98f	bio_copy_user
+EXPORT_SYMBOL vmlinux 0x52a3fe9d	idr_pre_get
+EXPORT_SYMBOL vmlinux 0x52a540bc	con_set_default_unimap
+EXPORT_SYMBOL vmlinux 0x52a58c24	ifla_policy
+EXPORT_SYMBOL vmlinux 0x52ebb126	param_get_ushort
+EXPORT_SYMBOL vmlinux 0x53326531	mempool_alloc_pages
+EXPORT_SYMBOL vmlinux 0x533903d8	outsw
+EXPORT_SYMBOL vmlinux 0x534891e4	genphy_suspend
+EXPORT_SYMBOL vmlinux 0x538a6e7a	blk_requeue_request
+EXPORT_SYMBOL vmlinux 0x53c0767c	sk_chk_filter
+EXPORT_SYMBOL vmlinux 0x53c625ea	tc_classify_compat
+EXPORT_SYMBOL vmlinux 0x53d8e7f8	xfrm_state_alloc
+EXPORT_SYMBOL vmlinux 0x540f3b66	backlight_device_unregister
+EXPORT_SYMBOL vmlinux 0x541dd98c	save_mount_options
+EXPORT_SYMBOL vmlinux 0x54290dc9	nla_validate
+EXPORT_SYMBOL vmlinux 0x54312b7c	mb_cache_entry_insert
+EXPORT_SYMBOL vmlinux 0x54822432	tcf_action_dump_1
+EXPORT_SYMBOL vmlinux 0x549af924	page_symlink
+EXPORT_SYMBOL vmlinux 0x54e27620	phy_attach_direct
+EXPORT_SYMBOL vmlinux 0x54e56b10	km_new_mapping
+EXPORT_SYMBOL vmlinux 0x54e6fcdd	net_enable_timestamp
+EXPORT_SYMBOL vmlinux 0x54e80cb7	kmem_cache_destroy
+EXPORT_SYMBOL vmlinux 0x551db525	xfrm_policy_flush
+EXPORT_SYMBOL vmlinux 0x554129cd	journal_start
+EXPORT_SYMBOL vmlinux 0x5546bfa4	elv_rb_find
+EXPORT_SYMBOL vmlinux 0x554f0a48	groups_alloc
+EXPORT_SYMBOL vmlinux 0x556c50d7	tty_port_carrier_raised
+EXPORT_SYMBOL vmlinux 0x556db901	xor_vis_5
+EXPORT_SYMBOL vmlinux 0x5573106c	set_page_dirty
+EXPORT_SYMBOL vmlinux 0x5594be03	bitmap_remap
+EXPORT_SYMBOL vmlinux 0x55a286bf	proc_dointvec_minmax
+EXPORT_SYMBOL vmlinux 0x55c3ef1e	init_file
+EXPORT_SYMBOL vmlinux 0x55c9d187	register_console
+EXPORT_SYMBOL vmlinux 0x55f060ee	drm_sman_set_range
+EXPORT_SYMBOL vmlinux 0x55fc131c	sk_alloc
+EXPORT_SYMBOL vmlinux 0x5600904f	fb_get_color_depth
+EXPORT_SYMBOL vmlinux 0x5601937e	ns87303_lock
+EXPORT_SYMBOL vmlinux 0x5603cf43	do_settimeofday
+EXPORT_SYMBOL vmlinux 0x56059a7f	blk_queue_merge_bvec
+EXPORT_SYMBOL vmlinux 0x5607b807	drm_gem_object_lookup
+EXPORT_SYMBOL vmlinux 0x5614b010	xfrm_policy_walk_done
+EXPORT_SYMBOL vmlinux 0x5635a60a	vmalloc_user
+EXPORT_SYMBOL vmlinux 0x567fa4b3	ethtool_op_set_ufo
+EXPORT_SYMBOL vmlinux 0x5697bfa5	dm_io_client_resize
+EXPORT_SYMBOL vmlinux 0x569d09d2	kernel_sock_ioctl
+EXPORT_SYMBOL vmlinux 0x56aafa0c	sk_send_sigurg
+EXPORT_SYMBOL vmlinux 0x56cda35a	sun4v_niagara2_setperf
+EXPORT_SYMBOL vmlinux 0x56e64a12	unregister_netdev
+EXPORT_SYMBOL vmlinux 0x56f38712	schedule_delayed_work_on
+EXPORT_SYMBOL vmlinux 0x570119ce	copy_strings_kernel
+EXPORT_SYMBOL vmlinux 0x5701fdbd	netdev_class_create_file
+EXPORT_SYMBOL vmlinux 0x5716daa2	vlan_gro_frags
+EXPORT_SYMBOL vmlinux 0x5723a29f	console_start
+EXPORT_SYMBOL vmlinux 0x572e85d4	blk_lookup_devt
+EXPORT_SYMBOL vmlinux 0x57339003	dquot_alloc
+EXPORT_SYMBOL vmlinux 0x573d3b84	sock_no_mmap
+EXPORT_SYMBOL vmlinux 0x577f4bff	do_BUG
+EXPORT_SYMBOL vmlinux 0x579ad446	dev_addr_del
+EXPORT_SYMBOL vmlinux 0x57a225f7	ldc_alloc
+EXPORT_SYMBOL vmlinux 0x57b57ebe	jiffies_to_timespec
+EXPORT_SYMBOL vmlinux 0x57db7242	mangle_path
+EXPORT_SYMBOL vmlinux 0x57f7c686	sparc64_valid_addr_bitmap
+EXPORT_SYMBOL vmlinux 0x580830f0	drm_mode_set_name
+EXPORT_SYMBOL vmlinux 0x580d0de0	journal_extend
+EXPORT_SYMBOL vmlinux 0x582aba95	I_BDEV
+EXPORT_SYMBOL vmlinux 0x582fef16	auxio_set_lte
+EXPORT_SYMBOL vmlinux 0x5838f6c9	rtc_valid_tm
+EXPORT_SYMBOL vmlinux 0x58545268	d_splice_alias
+EXPORT_SYMBOL vmlinux 0x58587ff2	dev_set_allmulti
+EXPORT_SYMBOL vmlinux 0x585f9f55	dm_kcopyd_copy
+EXPORT_SYMBOL vmlinux 0x5861c23e	phy_sanitize_settings
+EXPORT_SYMBOL vmlinux 0x586a03d2	lookup_bdev
+EXPORT_SYMBOL vmlinux 0x5874fbfa	block_page_mkwrite
+EXPORT_SYMBOL vmlinux 0x587b5123	skb_prepare_seq_read
+EXPORT_SYMBOL vmlinux 0x589f96f7	vfs_get_dqblk
+EXPORT_SYMBOL vmlinux 0x58e14a1a	file_remove_suid
+EXPORT_SYMBOL vmlinux 0x58eb1e65	freeze_bdev
+EXPORT_SYMBOL vmlinux 0x59000e12	unbind_con_driver
+EXPORT_SYMBOL vmlinux 0x59037eeb	put_io_context
+EXPORT_SYMBOL vmlinux 0x592d765e	generic_fillattr
+EXPORT_SYMBOL vmlinux 0x5934392b	fb_register_client
+EXPORT_SYMBOL vmlinux 0x593de916	gnet_stats_copy_queue
+EXPORT_SYMBOL vmlinux 0x594bf15b	ioport_map
+EXPORT_SYMBOL vmlinux 0x59606a75	idr_init
+EXPORT_SYMBOL vmlinux 0x5995e371	iput
+EXPORT_SYMBOL vmlinux 0x59d696b6	register_module_notifier
+EXPORT_SYMBOL vmlinux 0x59f8e68a	skb_gso_segment
+EXPORT_SYMBOL vmlinux 0x5a13d4dc	d_prune_aliases
+EXPORT_SYMBOL vmlinux 0x5a33ede8	journal_force_commit
+EXPORT_SYMBOL vmlinux 0x5a34a45c	__kmalloc
+EXPORT_SYMBOL vmlinux 0x5a5660e5	shrink_dcache_parent
+EXPORT_SYMBOL vmlinux 0x5a5e7ea3	simple_read_from_buffer
+EXPORT_SYMBOL vmlinux 0x5a623bcb	pci_map_sg
+EXPORT_SYMBOL vmlinux 0x5a744b86	netlink_set_nonroot
+EXPORT_SYMBOL vmlinux 0x5a89a4c4	inet_sock_destruct
+EXPORT_SYMBOL vmlinux 0x5a8a04f0	simple_set_mnt
+EXPORT_SYMBOL vmlinux 0x5a8fc560	tcf_em_tree_dump
+EXPORT_SYMBOL vmlinux 0x5a9e8b0b	neigh_seq_stop
+EXPORT_SYMBOL vmlinux 0x5aa36dff	journal_forget
+EXPORT_SYMBOL vmlinux 0x5aa93d60	skb_checksum
+EXPORT_SYMBOL vmlinux 0x5abd399b	sk_stream_write_space
+EXPORT_SYMBOL vmlinux 0x5ac0a89c	dquot_scan_active
+EXPORT_SYMBOL vmlinux 0x5adb5373	set_anon_super
+EXPORT_SYMBOL vmlinux 0x5adf93d5	blkdev_issue_discard
+EXPORT_SYMBOL vmlinux 0x5b27bcec	sysctl_intvec
+EXPORT_SYMBOL vmlinux 0x5b6678f7	skb_realloc_headroom
+EXPORT_SYMBOL vmlinux 0x5b6ee752	blk_cleanup_queue
+EXPORT_SYMBOL vmlinux 0x5b8df286	drm_core_reclaim_buffers
+EXPORT_SYMBOL vmlinux 0x5b92c9b1	xfrm_unregister_mode
+EXPORT_SYMBOL vmlinux 0x5baa5800	tty_termios_input_baud_rate
+EXPORT_SYMBOL vmlinux 0x5bc70758	blk_init_queue_node
+EXPORT_SYMBOL vmlinux 0x5bccc4f7	pci_request_regions
+EXPORT_SYMBOL vmlinux 0x5c1ec489	request_firmware
+EXPORT_SYMBOL vmlinux 0x5c287838	dst_discard
+EXPORT_SYMBOL vmlinux 0x5c673bc8	tty_mutex
+EXPORT_SYMBOL vmlinux 0x5c8444ff	unregister_netdevice
+EXPORT_SYMBOL vmlinux 0x5ca4a0a8	dump_fpu
+EXPORT_SYMBOL vmlinux 0x5cbb2ff5	inode_newsize_ok
+EXPORT_SYMBOL vmlinux 0x5cc8e015	iov_iter_single_seg_count
+EXPORT_SYMBOL vmlinux 0x5cdc3ff0	drm_add_modes_noedid
+EXPORT_SYMBOL vmlinux 0x5ce518cc	blk_get_backing_dev_info
+EXPORT_SYMBOL vmlinux 0x5ce875cf	prom_root_node
+EXPORT_SYMBOL vmlinux 0x5d0f8e7d	drm_mm_takedown
+EXPORT_SYMBOL vmlinux 0x5d12b3fc	twl4030_i2c_write_u8
+EXPORT_SYMBOL vmlinux 0x5d17c6c4	revalidate_disk
+EXPORT_SYMBOL vmlinux 0x5d1e7809	xfrm_state_check_expire
+EXPORT_SYMBOL vmlinux 0x5d3dc4ed	pci_bus_read_config_word
+EXPORT_SYMBOL vmlinux 0x5d4249bf	bio_pair_release
+EXPORT_SYMBOL vmlinux 0x5d428880	xfrm_policy_insert
+EXPORT_SYMBOL vmlinux 0x5d4d0e26	__csum_partial_copy_from_user
+EXPORT_SYMBOL vmlinux 0x5d5ff429	ip_route_me_harder
+EXPORT_SYMBOL vmlinux 0x5d92e054	kset_unregister
+EXPORT_SYMBOL vmlinux 0x5dae54b4	mutex_lock_interruptible
+EXPORT_SYMBOL vmlinux 0x5dbbe98e	memmove
+EXPORT_SYMBOL vmlinux 0x5dbfa6c9	jbd2_journal_dirty_metadata
+EXPORT_SYMBOL vmlinux 0x5dd877ca	phy_disconnect
+EXPORT_SYMBOL vmlinux 0x5e017924	ip_nat_decode_session
+EXPORT_SYMBOL vmlinux 0x5e062d1f	bio_split
+EXPORT_SYMBOL vmlinux 0x5e0f57e8	remap_pfn_range
+EXPORT_SYMBOL vmlinux 0x5e60ee7c	block_read_full_page
+EXPORT_SYMBOL vmlinux 0x5e6fad0a	tcp_v4_md5_lookup
+EXPORT_SYMBOL vmlinux 0x5e95b1cd	current_umask
+EXPORT_SYMBOL vmlinux 0x5e9653f3	backlight_force_update
+EXPORT_SYMBOL vmlinux 0x5ea520c5	tcp_select_initial_window
+EXPORT_SYMBOL vmlinux 0x5ea53c9c	drm_mm_debug_table
+EXPORT_SYMBOL vmlinux 0x5ec0e2a4	sg_copy_to_buffer
+EXPORT_SYMBOL vmlinux 0x5eca9af9	drm_mm_scan_add_block
+EXPORT_SYMBOL vmlinux 0x5ed040b0	pm_set_vt_switch
+EXPORT_SYMBOL vmlinux 0x5ed52c2d	clear_user_page
+EXPORT_SYMBOL vmlinux 0x5edd0762	bin2bcd
+EXPORT_SYMBOL vmlinux 0x5ee0a984	prom_getchild
+EXPORT_SYMBOL vmlinux 0x5ee43a78	brioctl_set
+EXPORT_SYMBOL vmlinux 0x5f295d16	vlan_dev_vlan_id
+EXPORT_SYMBOL vmlinux 0x5f4897fd	inode_needs_sync
+EXPORT_SYMBOL vmlinux 0x5f6f1b62	dma_ops
+EXPORT_SYMBOL vmlinux 0x5f86d221	fddi_change_mtu
+EXPORT_SYMBOL vmlinux 0x5f9e3a4d	input_set_keycode
+EXPORT_SYMBOL vmlinux 0x5fca6145	consume_skb
+EXPORT_SYMBOL vmlinux 0x5fe41fa5	seq_path
+EXPORT_SYMBOL vmlinux 0x60038eb3	pci_scan_bridge
+EXPORT_SYMBOL vmlinux 0x600683d3	do_unblank_screen
+EXPORT_SYMBOL vmlinux 0x6008b49c	flush_signals
+EXPORT_SYMBOL vmlinux 0x601cc70f	tcp_v4_destroy_sock
+EXPORT_SYMBOL vmlinux 0x60454471	d_instantiate_unique
+EXPORT_SYMBOL vmlinux 0x6047c4da	gen_pool_destroy
+EXPORT_SYMBOL vmlinux 0x605c8bde	radix_tree_delete
+EXPORT_SYMBOL vmlinux 0x60674e66	log_wait_commit
+EXPORT_SYMBOL vmlinux 0x6067a146	memcpy
+EXPORT_SYMBOL vmlinux 0x609f1c7e	synchronize_net
+EXPORT_SYMBOL vmlinux 0x60a0ebad	__tracepoint_kmem_cache_alloc_node
+EXPORT_SYMBOL vmlinux 0x60a32ea9	pm_power_off
+EXPORT_SYMBOL vmlinux 0x60bfd1ce	proto_register
+EXPORT_SYMBOL vmlinux 0x60d55b6c	replace_mount_options
+EXPORT_SYMBOL vmlinux 0x60dadbea	devm_ioremap
+EXPORT_SYMBOL vmlinux 0x60f7bfa1	mark_buffer_dirty_inode
+EXPORT_SYMBOL vmlinux 0x612390ad	netpoll_set_trap
+EXPORT_SYMBOL vmlinux 0x61240d43	__sg_free_table
+EXPORT_SYMBOL vmlinux 0x613f9629	get_unmapped_area_prot
+EXPORT_SYMBOL vmlinux 0x61429b7a	pci_set_master
+EXPORT_SYMBOL vmlinux 0x614d0075	generic_file_splice_write
+EXPORT_SYMBOL vmlinux 0x61864f8a	invalidate_mapping_pages
+EXPORT_SYMBOL vmlinux 0x618d8299	set_notify_swap_entry_free
+EXPORT_SYMBOL vmlinux 0x6194253f	dev_disable_lro
+EXPORT_SYMBOL vmlinux 0x61b7b126	simple_strtoull
+EXPORT_SYMBOL vmlinux 0x625c3e76	inet_frags_fini
+EXPORT_SYMBOL vmlinux 0x62737e1d	sock_unregister
+EXPORT_SYMBOL vmlinux 0x6278025e	per_cpu__ftrace_event_seq
+EXPORT_SYMBOL vmlinux 0x62827bec	security_secctx_to_secid
+EXPORT_SYMBOL vmlinux 0x62a9293f	_clear_page
+EXPORT_SYMBOL vmlinux 0x62bbb4a7	unregister_sysctl_table
+EXPORT_SYMBOL vmlinux 0x62c9a357	kthread_stop
+EXPORT_SYMBOL vmlinux 0x62cc569e	cpu_present_mask
+EXPORT_SYMBOL vmlinux 0x62e0404b	mark_info_dirty
+EXPORT_SYMBOL vmlinux 0x62fe9502	blk_queue_invalidate_tags
+EXPORT_SYMBOL vmlinux 0x6316dc6c	pci_get_bus_and_slot
+EXPORT_SYMBOL vmlinux 0x6319e061	read_cache_pages
+EXPORT_SYMBOL vmlinux 0x63442b03	sync_dirty_buffer
+EXPORT_SYMBOL vmlinux 0x634bd152	page_put_link
+EXPORT_SYMBOL vmlinux 0x63662a18	vlan_ioctl_set
+EXPORT_SYMBOL vmlinux 0x63ab3dbb	alloc_fcdev
+EXPORT_SYMBOL vmlinux 0x63e1c26c	tty_schedule_flip
+EXPORT_SYMBOL vmlinux 0x63ecad53	register_netdevice_notifier
+EXPORT_SYMBOL vmlinux 0x6403e338	tcp_memory_pressure
+EXPORT_SYMBOL vmlinux 0x640cf638	register_exec_domain
+EXPORT_SYMBOL vmlinux 0x6495893c	tty_port_init
+EXPORT_SYMBOL vmlinux 0x64999478	congestion_wait
+EXPORT_SYMBOL vmlinux 0x649f2359	call_usermodehelper_setkeys
+EXPORT_SYMBOL vmlinux 0x64ee7b45	ida_remove
+EXPORT_SYMBOL vmlinux 0x64fd72cb	pci_add_new_bus
+EXPORT_SYMBOL vmlinux 0x65022a24	radix_tree_prev_hole
+EXPORT_SYMBOL vmlinux 0x651a4139	test_taint
+EXPORT_SYMBOL vmlinux 0x6522e29e	vfs_read
+EXPORT_SYMBOL vmlinux 0x65346c53	splice_from_pipe_next
+EXPORT_SYMBOL vmlinux 0x65408378	zlib_inflate_blob
+EXPORT_SYMBOL vmlinux 0x65414e67	dev_valid_name
+EXPORT_SYMBOL vmlinux 0x65584b43	blk_end_request_all
+EXPORT_SYMBOL vmlinux 0x655e24f7	bmap
+EXPORT_SYMBOL vmlinux 0x6566c539	drm_mm_put_block
+EXPORT_SYMBOL vmlinux 0x65ab012b	security_inode_notifysecctx
+EXPORT_SYMBOL vmlinux 0x65b0a97e	_PAGE_IE
+EXPORT_SYMBOL vmlinux 0x65c4bc2e	default_unplug_io_fn
+EXPORT_SYMBOL vmlinux 0x65cde22c	xfrm_unregister_km
+EXPORT_SYMBOL vmlinux 0x65df3429	dquot_alloc_inode
+EXPORT_SYMBOL vmlinux 0x65e42c2c	generic_file_aio_read
+EXPORT_SYMBOL vmlinux 0x6603e9d3	pci_map_single
+EXPORT_SYMBOL vmlinux 0x6604cb04	kblockd_schedule_work
+EXPORT_SYMBOL vmlinux 0x6612bc5f	have_submounts
+EXPORT_SYMBOL vmlinux 0x66143df5	sock_no_ioctl
+EXPORT_SYMBOL vmlinux 0x661a5783	proc_dointvec_userhz_jiffies
+EXPORT_SYMBOL vmlinux 0x668bf865	seq_write
+EXPORT_SYMBOL vmlinux 0x668da8d5	zlib_inflateIncomp
+EXPORT_SYMBOL vmlinux 0x668ddca1	gen_pool_add
+EXPORT_SYMBOL vmlinux 0x669af365	blk_queue_logical_block_size
+EXPORT_SYMBOL vmlinux 0x669bd932	blk_queue_max_phys_segments
+EXPORT_SYMBOL vmlinux 0x66a24ed1	vga_set_legacy_decoding
+EXPORT_SYMBOL vmlinux 0x66b0e4ed	of_find_node_by_type
+EXPORT_SYMBOL vmlinux 0x66c75a95	page_zero_new_buffers
+EXPORT_SYMBOL vmlinux 0x66cae227	stop_a_enabled
+EXPORT_SYMBOL vmlinux 0x66f48445	dm_io_client_create
+EXPORT_SYMBOL vmlinux 0x67053080	current_kernel_time
+EXPORT_SYMBOL vmlinux 0x670d2394	sock_no_connect
+EXPORT_SYMBOL vmlinux 0x672144bd	strlcpy
+EXPORT_SYMBOL vmlinux 0x6725cb3c	lro_receive_frags
+EXPORT_SYMBOL vmlinux 0x675070d0	devm_ioport_unmap
+EXPORT_SYMBOL vmlinux 0x6763b5ed	path_put
+EXPORT_SYMBOL vmlinux 0x67736179	sb_min_blocksize
+EXPORT_SYMBOL vmlinux 0x6778a991	skb_find_text
+EXPORT_SYMBOL vmlinux 0x677aeb1c	key_instantiate_and_link
+EXPORT_SYMBOL vmlinux 0x67ab87bc	tcp_tso_segment
+EXPORT_SYMBOL vmlinux 0x67b35cf0	test_set_page_writeback
+EXPORT_SYMBOL vmlinux 0x67be1d3d	cpu_active_mask
+EXPORT_SYMBOL vmlinux 0x67f2cee5	udp_table
+EXPORT_SYMBOL vmlinux 0x67f9d20e	kernel_connect
+EXPORT_SYMBOL vmlinux 0x680e8ca0	request_firmware_nowait
+EXPORT_SYMBOL vmlinux 0x681a2209	should_remove_suid
+EXPORT_SYMBOL vmlinux 0x681eff4e	bio_put
+EXPORT_SYMBOL vmlinux 0x68208fac	ldc_map_sg
+EXPORT_SYMBOL vmlinux 0x682d6157	nobh_truncate_page
+EXPORT_SYMBOL vmlinux 0x6851f4f4	i2c_smbus_read_byte_data
+EXPORT_SYMBOL vmlinux 0x68609055	alloc_pci_dev
+EXPORT_SYMBOL vmlinux 0x687b5643	xfrm_policy_delete
+EXPORT_SYMBOL vmlinux 0x68899126	ldc_copy
+EXPORT_SYMBOL vmlinux 0x6889dd47	generic_setxattr
+EXPORT_SYMBOL vmlinux 0x688eee0b	generic_listxattr
+EXPORT_SYMBOL vmlinux 0x6898f3ea	dquot_destroy
+EXPORT_SYMBOL vmlinux 0x689e5e3c	vfs_quota_sync
+EXPORT_SYMBOL vmlinux 0x68c3a4ba	drm_i_have_hw_lock
+EXPORT_SYMBOL vmlinux 0x68e87d62	sockfd_lookup
+EXPORT_SYMBOL vmlinux 0x68f88eee	tcp_alloc_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x68fb74ca	timeval_to_jiffies
+EXPORT_SYMBOL vmlinux 0x69010b06	insw
+EXPORT_SYMBOL vmlinux 0x690198e6	clocksource_unregister
+EXPORT_SYMBOL vmlinux 0x6905b49c	journal_update_format
+EXPORT_SYMBOL vmlinux 0x6919b059	filp_close
+EXPORT_SYMBOL vmlinux 0x696f7e02	input_event
+EXPORT_SYMBOL vmlinux 0x6971447a	rtc_month_days
+EXPORT_SYMBOL vmlinux 0x697cb0a0	sysctl_ms_jiffies
+EXPORT_SYMBOL vmlinux 0x6980fe91	param_get_int
+EXPORT_SYMBOL vmlinux 0x6984db74	mdesc_get_property
+EXPORT_SYMBOL vmlinux 0x69927dff	try_acquire_console_sem
+EXPORT_SYMBOL vmlinux 0x69a2f343	pci_set_power_state
+EXPORT_SYMBOL vmlinux 0x69a358a6	iomem_resource
+EXPORT_SYMBOL vmlinux 0x69c8c1d5	security_req_classify_flow
+EXPORT_SYMBOL vmlinux 0x69dc428b	iw_handler_get_spy
+EXPORT_SYMBOL vmlinux 0x69e27c7a	bitmap_copy_le
+EXPORT_SYMBOL vmlinux 0x69edaf1c	generic_getxattr
+EXPORT_SYMBOL vmlinux 0x69f23018	tcp_proc_register
+EXPORT_SYMBOL vmlinux 0x69fafd0e	set_blocksize
+EXPORT_SYMBOL vmlinux 0x6a037cf1	mempool_kfree
+EXPORT_SYMBOL vmlinux 0x6a1f85e5	dm_register_target
+EXPORT_SYMBOL vmlinux 0x6a47571d	__set_personality
+EXPORT_SYMBOL vmlinux 0x6a4c1e6b	bioset_free
+EXPORT_SYMBOL vmlinux 0x6a5fa363	sigprocmask
+EXPORT_SYMBOL vmlinux 0x6a76f3ac	blk_iopoll_enable
+EXPORT_SYMBOL vmlinux 0x6a969134	redraw_screen
+EXPORT_SYMBOL vmlinux 0x6a9d921b	journal_check_used_features
+EXPORT_SYMBOL vmlinux 0x6aa9aa19	sock_i_ino
+EXPORT_SYMBOL vmlinux 0x6ad065f4	param_set_charp
+EXPORT_SYMBOL vmlinux 0x6b1b67d3	__bdevname
+EXPORT_SYMBOL vmlinux 0x6b2dc060	dump_stack
+EXPORT_SYMBOL vmlinux 0x6b400b59	netpoll_poll
+EXPORT_SYMBOL vmlinux 0x6b4e5a52	radix_tree_lookup_slot
+EXPORT_SYMBOL vmlinux 0x6b79346e	jbd2_journal_errno
+EXPORT_SYMBOL vmlinux 0x6b98c32e	drm_rmmap_locked
+EXPORT_SYMBOL vmlinux 0x6bb3b34d	alloc_etherdev_mq
+EXPORT_SYMBOL vmlinux 0x6bbcb1a9	block_write_begin
+EXPORT_SYMBOL vmlinux 0x6bc3fbc0	__unregister_chrdev
+EXPORT_SYMBOL vmlinux 0x6bc56c67	radix_tree_next_hole
+EXPORT_SYMBOL vmlinux 0x6bdcfd99	qdisc_class_hash_remove
+EXPORT_SYMBOL vmlinux 0x6bdf6f94	inet_select_addr
+EXPORT_SYMBOL vmlinux 0x6c36a5c1	__mutex_init
+EXPORT_SYMBOL vmlinux 0x6c39972a	ps2_init
+EXPORT_SYMBOL vmlinux 0x6c61ce70	num_registered_fb
+EXPORT_SYMBOL vmlinux 0x6c702af7	sysctl_udp_rmem_min
+EXPORT_SYMBOL vmlinux 0x6c930c20	tcf_hash_lookup
+EXPORT_SYMBOL vmlinux 0x6c985967	splice_direct_to_actor
+EXPORT_SYMBOL vmlinux 0x6ca36082	serio_rescan
+EXPORT_SYMBOL vmlinux 0x6ca46de1	d_path
+EXPORT_SYMBOL vmlinux 0x6cd33df9	inode_init_always
+EXPORT_SYMBOL vmlinux 0x6ce3cedc	ldc_connect
+EXPORT_SYMBOL vmlinux 0x6d0b77fe	sysctl_data
+EXPORT_SYMBOL vmlinux 0x6d0e3039	vfs_fstatat
+EXPORT_SYMBOL vmlinux 0x6d117938	skb_pad
+EXPORT_SYMBOL vmlinux 0x6d27ef64	__bitmap_empty
+EXPORT_SYMBOL vmlinux 0x6d294e43	clock_t_to_jiffies
+EXPORT_SYMBOL vmlinux 0x6d2d385d	pci_restore_state
+EXPORT_SYMBOL vmlinux 0x6d2e5837	drm_ut_debug_printk
+EXPORT_SYMBOL vmlinux 0x6d53e721	tcp_shutdown
+EXPORT_SYMBOL vmlinux 0x6d62c91b	__set_page_dirty_nobuffers
+EXPORT_SYMBOL vmlinux 0x6d6ae0cc	proto_unregister
+EXPORT_SYMBOL vmlinux 0x6d6cbadc	rb_last
+EXPORT_SYMBOL vmlinux 0x6d7708da	vio_register_driver
+EXPORT_SYMBOL vmlinux 0x6d784f76	drm_release
+EXPORT_SYMBOL vmlinux 0x6da508d3	rwsem_wake
+EXPORT_SYMBOL vmlinux 0x6db640fa	blk_plug_device
+EXPORT_SYMBOL vmlinux 0x6de375c1	xor_niagara_5
+EXPORT_SYMBOL vmlinux 0x6de6bf83	radix_tree_lookup
+EXPORT_SYMBOL vmlinux 0x6def2db2	half_md4_transform
+EXPORT_SYMBOL vmlinux 0x6e1d6e7a	dev_mc_unsync
+EXPORT_SYMBOL vmlinux 0x6e28655c	vfs_write
+EXPORT_SYMBOL vmlinux 0x6e2bbf59	vfs_unlink
+EXPORT_SYMBOL vmlinux 0x6e2df0a5	phy_attach
+EXPORT_SYMBOL vmlinux 0x6e720ff2	rtnl_unlock
+EXPORT_SYMBOL vmlinux 0x6e802324	radix_tree_tag_get
+EXPORT_SYMBOL vmlinux 0x6e82e24b	keyring_search
+EXPORT_SYMBOL vmlinux 0x6e9dd606	__symbol_put
+EXPORT_SYMBOL vmlinux 0x6edf3858	log_start_commit
+EXPORT_SYMBOL vmlinux 0x6f65c61b	serio_unregister_driver
+EXPORT_SYMBOL vmlinux 0x6f81e910	kernel_bind
+EXPORT_SYMBOL vmlinux 0x6f9df7d9	splice_from_pipe_end
+EXPORT_SYMBOL vmlinux 0x6fac4f9b	nf_unregister_hooks
+EXPORT_SYMBOL vmlinux 0x6fc30481	drm_mode_hsync
+EXPORT_SYMBOL vmlinux 0x6fcb87a1	touch_softlockup_watchdog
+EXPORT_SYMBOL vmlinux 0x6fee4a26	redirty_page_for_writepage
+EXPORT_SYMBOL vmlinux 0x6ff9fca3	mb_cache_entry_alloc
+EXPORT_SYMBOL vmlinux 0x6fff393f	time_to_tm
+EXPORT_SYMBOL vmlinux 0x7003ed9d	tty_hangup
+EXPORT_SYMBOL vmlinux 0x701a5ce1	security_path_symlink
+EXPORT_SYMBOL vmlinux 0x702462f5	blk_queue_end_tag
+EXPORT_SYMBOL vmlinux 0x702f162c	__memscan_generic
+EXPORT_SYMBOL vmlinux 0x7032f3fd	cdev_alloc
+EXPORT_SYMBOL vmlinux 0x70523a7a	__cond_resched_softirq
+EXPORT_SYMBOL vmlinux 0x70551d51	i2c_transfer
+EXPORT_SYMBOL vmlinux 0x70568099	ip_generic_getfrag
+EXPORT_SYMBOL vmlinux 0x70765d1c	vfs_lstat
+EXPORT_SYMBOL vmlinux 0x708deaf4	pneigh_enqueue
+EXPORT_SYMBOL vmlinux 0x7097048d	bio_get_nr_vecs
+EXPORT_SYMBOL vmlinux 0x70a38bf3	journal_errno
+EXPORT_SYMBOL vmlinux 0x70b5a794	ldc_write
+EXPORT_SYMBOL vmlinux 0x70bc17d7	inode_wait
+EXPORT_SYMBOL vmlinux 0x70bfeb93	netlink_unicast
+EXPORT_SYMBOL vmlinux 0x70fa1176	bio_alloc
+EXPORT_SYMBOL vmlinux 0x710014d1	put_mnt_ns
+EXPORT_SYMBOL vmlinux 0x71086c7c	drm_rmmap
+EXPORT_SYMBOL vmlinux 0x7111eeb3	tcp_timewait_state_process
+EXPORT_SYMBOL vmlinux 0x712730a7	__flushw_user
+EXPORT_SYMBOL vmlinux 0x7129e5f8	hex_asc
+EXPORT_SYMBOL vmlinux 0x7133233e	dev_driver_string
+EXPORT_SYMBOL vmlinux 0x713ca24d	__nla_reserve_nohdr
+EXPORT_SYMBOL vmlinux 0x7164a78d	ldc_free
+EXPORT_SYMBOL vmlinux 0x716a8e11	bio_map_user
+EXPORT_SYMBOL vmlinux 0x7171121c	overflowgid
+EXPORT_SYMBOL vmlinux 0x71757b60	drm_addmap
+EXPORT_SYMBOL vmlinux 0x718dff2d	dquot_free_inode
+EXPORT_SYMBOL vmlinux 0x71921c47	__getblk
+EXPORT_SYMBOL vmlinux 0x71a50dbc	register_blkdev
+EXPORT_SYMBOL vmlinux 0x71c02438	sg_next
+EXPORT_SYMBOL vmlinux 0x71db061b	bio_integrity_tag_size
+EXPORT_SYMBOL vmlinux 0x72000bdb	of_set_property_mutex
+EXPORT_SYMBOL vmlinux 0x721d3b0e	xfrm_dst_ifdown
+EXPORT_SYMBOL vmlinux 0x723938d1	kmalloc_caches
+EXPORT_SYMBOL vmlinux 0x723dabec	inet_sk_rebuild_header
+EXPORT_SYMBOL vmlinux 0x7242e96d	strnchr
+EXPORT_SYMBOL vmlinux 0x725fe1ce	unload_nls
+EXPORT_SYMBOL vmlinux 0x7263842f	netlink_kernel_release
+EXPORT_SYMBOL vmlinux 0x728cc8d3	sk_stream_wait_close
+EXPORT_SYMBOL vmlinux 0x728cd4ba	i2c_smbus_write_byte_data
+EXPORT_SYMBOL vmlinux 0x7299eed4	blk_queue_max_discard_sectors
+EXPORT_SYMBOL vmlinux 0x72a685f9	drm_vblank_post_modeset
+EXPORT_SYMBOL vmlinux 0x72a7d376	kobject_del
+EXPORT_SYMBOL vmlinux 0x72c3be87	param_set_byte
+EXPORT_SYMBOL vmlinux 0x72d5af61	try_wait_for_completion
+EXPORT_SYMBOL vmlinux 0x7310abfe	netdev_rx_csum_fault
+EXPORT_SYMBOL vmlinux 0x734d4f22	of_find_compatible_node
+EXPORT_SYMBOL vmlinux 0x735ef3a6	__invalidate_device
+EXPORT_SYMBOL vmlinux 0x736ff831	drm_ati_pcigart_init
+EXPORT_SYMBOL vmlinux 0x73af9cab	elv_abort_queue
+EXPORT_SYMBOL vmlinux 0x73cf7625	ethtool_op_set_flags
+EXPORT_SYMBOL vmlinux 0x73e0877a	insl
+EXPORT_SYMBOL vmlinux 0x74481399	i2c_del_driver
+EXPORT_SYMBOL vmlinux 0x744a83d8	simple_sync_file
+EXPORT_SYMBOL vmlinux 0x744c0c68	param_get_byte
+EXPORT_SYMBOL vmlinux 0x7459373a	dquot_drop
+EXPORT_SYMBOL vmlinux 0x7471f4c9	send_sig
+EXPORT_SYMBOL vmlinux 0x747a3d5a	filemap_flush
+EXPORT_SYMBOL vmlinux 0x747b7387	inode_get_bytes
+EXPORT_SYMBOL vmlinux 0x7485e15e	unregister_chrdev_region
+EXPORT_SYMBOL vmlinux 0x748a84a4	drm_core_get_reg_ofs
+EXPORT_SYMBOL vmlinux 0x74954462	timecounter_read
+EXPORT_SYMBOL vmlinux 0x74bfc369	__tracepoint_kmem_cache_alloc
+EXPORT_SYMBOL vmlinux 0x74ead032	neigh_create
+EXPORT_SYMBOL vmlinux 0x74f11980	udp_proc_unregister
+EXPORT_SYMBOL vmlinux 0x74f4b98e	gen_pool_free
+EXPORT_SYMBOL vmlinux 0x7545d241	rtnl_notify
+EXPORT_SYMBOL vmlinux 0x75540cf9	uart_suspend_port
+EXPORT_SYMBOL vmlinux 0x756e6992	strnicmp
+EXPORT_SYMBOL vmlinux 0x757a0970	clear_bdi_congested
+EXPORT_SYMBOL vmlinux 0x757b3ac2	pci_find_capability
+EXPORT_SYMBOL vmlinux 0x7591b8ba	skb_copy_and_csum_dev
+EXPORT_SYMBOL vmlinux 0x75bdea12	iommu_area_alloc
+EXPORT_SYMBOL vmlinux 0x75c2cf52	gnet_stats_start_copy
+EXPORT_SYMBOL vmlinux 0x75e87adc	dm_table_get_md
+EXPORT_SYMBOL vmlinux 0x75fe8a36	d_instantiate
+EXPORT_SYMBOL vmlinux 0x760a0f4f	yield
+EXPORT_SYMBOL vmlinux 0x760b437a	unregister_inetaddr_notifier
+EXPORT_SYMBOL vmlinux 0x761ba6c5	free_netdev
+EXPORT_SYMBOL vmlinux 0x7639adf5	unlock_page
+EXPORT_SYMBOL vmlinux 0x7640bd63	inet_getname
+EXPORT_SYMBOL vmlinux 0x7644fc01	blk_queue_init_tags
+EXPORT_SYMBOL vmlinux 0x764bd77c	request_resource
+EXPORT_SYMBOL vmlinux 0x765c4169	get_fb_unmapped_area
+EXPORT_SYMBOL vmlinux 0x76821c83	gnet_stats_copy_app
+EXPORT_SYMBOL vmlinux 0x76835b8c	drm_mode_attachmode_crtc
+EXPORT_SYMBOL vmlinux 0x768d96d3	pci_dev_get
+EXPORT_SYMBOL vmlinux 0x76a4ae63	prepare_binprm
+EXPORT_SYMBOL vmlinux 0x76a80485	default_file_splice_read
+EXPORT_SYMBOL vmlinux 0x76ab8829	journal_get_undo_access
+EXPORT_SYMBOL vmlinux 0x76b0287a	genphy_config_aneg
+EXPORT_SYMBOL vmlinux 0x76bf656d	__bitmap_shift_left
+EXPORT_SYMBOL vmlinux 0x76c272f3	of_find_matching_node
+EXPORT_SYMBOL vmlinux 0x76d3cd60	laptop_mode
+EXPORT_SYMBOL vmlinux 0x76d5427e	vm_map_ram
+EXPORT_SYMBOL vmlinux 0x77079099	ldc_unmap
+EXPORT_SYMBOL vmlinux 0x7717e7cf	pci_bus_read_config_byte
+EXPORT_SYMBOL vmlinux 0x7726fbf5	jbd2_journal_check_used_features
+EXPORT_SYMBOL vmlinux 0x7727efc7	journal_check_available_features
+EXPORT_SYMBOL vmlinux 0x77367abb	blk_stop_queue
+EXPORT_SYMBOL vmlinux 0x773a9c94	blk_iopoll_enabled
+EXPORT_SYMBOL vmlinux 0x775b1478	ldc_disconnect
+EXPORT_SYMBOL vmlinux 0x779f0940	__skb_checksum_complete_head
+EXPORT_SYMBOL vmlinux 0x77afc09e	drm_connector_property_set_value
+EXPORT_SYMBOL vmlinux 0x77cad725	skb_copy_datagram_from_iovec
+EXPORT_SYMBOL vmlinux 0x77cfcfde	__tracepoint_kmalloc_node
+EXPORT_SYMBOL vmlinux 0x77d58993	vm_insert_page
+EXPORT_SYMBOL vmlinux 0x77ecac9f	zlib_inflateEnd
+EXPORT_SYMBOL vmlinux 0x77fa5d1f	ns_to_timespec
+EXPORT_SYMBOL vmlinux 0x77fb26a9	bio_integrity_advance
+EXPORT_SYMBOL vmlinux 0x784915eb	drm_mode_vrefresh
+EXPORT_SYMBOL vmlinux 0x7858820e	aio_put_req
+EXPORT_SYMBOL vmlinux 0x78b1a12d	pci_enable_device_io
+EXPORT_SYMBOL vmlinux 0x78be24c3	of_device_is_available
+EXPORT_SYMBOL vmlinux 0x78cf2018	tty_flip_buffer_push
+EXPORT_SYMBOL vmlinux 0x78dc1705	devm_free_irq
+EXPORT_SYMBOL vmlinux 0x78df6bd7	no_pci_devices
+EXPORT_SYMBOL vmlinux 0x7905fb28	bioset_integrity_free
+EXPORT_SYMBOL vmlinux 0x791064a8	da903x_query_status
+EXPORT_SYMBOL vmlinux 0x79235999	bio_sector_offset
+EXPORT_SYMBOL vmlinux 0x79441d79	bio_integrity_add_page
+EXPORT_SYMBOL vmlinux 0x7952710c	bio_integrity_endio
+EXPORT_SYMBOL vmlinux 0x79600d4a	wait_for_completion_killable
+EXPORT_SYMBOL vmlinux 0x79771b43	ip_route_input
+EXPORT_SYMBOL vmlinux 0x798bf7e3	neigh_table_init_no_netlink
+EXPORT_SYMBOL vmlinux 0x79927ace	lookup_one_len
+EXPORT_SYMBOL vmlinux 0x799627c5	drm_mode_create_dirty_info_property
+EXPORT_SYMBOL vmlinux 0x79a85d2d	contig_page_data
+EXPORT_SYMBOL vmlinux 0x79aa04a2	get_random_bytes
+EXPORT_SYMBOL vmlinux 0x79ad224b	tasklet_kill
+EXPORT_SYMBOL vmlinux 0x79ceee9e	vga_get
+EXPORT_SYMBOL vmlinux 0x79e88623	eth_type_trans
+EXPORT_SYMBOL vmlinux 0x79ff1937	drm_mode_object_find
+EXPORT_SYMBOL vmlinux 0x7a1d0eca	register_filesystem
+EXPORT_SYMBOL vmlinux 0x7a2087c2	devm_request_threaded_irq
+EXPORT_SYMBOL vmlinux 0x7a20f516	ip_mc_rejoin_group
+EXPORT_SYMBOL vmlinux 0x7a270238	__dev_get_by_index
+EXPORT_SYMBOL vmlinux 0x7a2a837d	strict_strtol
+EXPORT_SYMBOL vmlinux 0x7a3da573	jbd2_journal_try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0x7a4497db	kzfree
+EXPORT_SYMBOL vmlinux 0x7a58f927	fb_blank
+EXPORT_SYMBOL vmlinux 0x7a9fac69	cad_pid
+EXPORT_SYMBOL vmlinux 0x7aada183	journal_blocks_per_page
+EXPORT_SYMBOL vmlinux 0x7aba8d2f	tty_port_alloc_xmit_buf
+EXPORT_SYMBOL vmlinux 0x7ac16720	phy_register_fixup_for_uid
+EXPORT_SYMBOL vmlinux 0x7ae73de1	alloc_pages_exact
+EXPORT_SYMBOL vmlinux 0x7afc7c69	xfrm_policy_walk
+EXPORT_SYMBOL vmlinux 0x7b485808	__napi_schedule
+EXPORT_SYMBOL vmlinux 0x7b588853	genl_register_ops
+EXPORT_SYMBOL vmlinux 0x7b74512f	nla_put
+EXPORT_SYMBOL vmlinux 0x7b8efda9	lease_get_mtime
+EXPORT_SYMBOL vmlinux 0x7b8f4c40	key_create_or_update
+EXPORT_SYMBOL vmlinux 0x7bb45016	__blk_run_queue
+EXPORT_SYMBOL vmlinux 0x7bcf3daf	loop_register_transfer
+EXPORT_SYMBOL vmlinux 0x7bd6d92a	textsearch_destroy
+EXPORT_SYMBOL vmlinux 0x7becf9f2	drm_gem_object_handle_free
+EXPORT_SYMBOL vmlinux 0x7bf17cee	fb_set_cmap
+EXPORT_SYMBOL vmlinux 0x7bff3be7	iov_iter_advance
+EXPORT_SYMBOL vmlinux 0x7c1cde82	proc_dointvec_ms_jiffies
+EXPORT_SYMBOL vmlinux 0x7c1fd6c8	drm_mode_equal
+EXPORT_SYMBOL vmlinux 0x7c323c47	udp_sendmsg
+EXPORT_SYMBOL vmlinux 0x7c32a105	skb_queue_purge
+EXPORT_SYMBOL vmlinux 0x7c60d66e	getname
+EXPORT_SYMBOL vmlinux 0x7c61340c	__release_region
+EXPORT_SYMBOL vmlinux 0x7c904ded	unregister_module_notifier
+EXPORT_SYMBOL vmlinux 0x7cdd615a	uart_register_driver
+EXPORT_SYMBOL vmlinux 0x7ce430ee	drm_get_connector_name
+EXPORT_SYMBOL vmlinux 0x7d03bf55	netlink_broadcast
+EXPORT_SYMBOL vmlinux 0x7d040b77	neigh_lookup
+EXPORT_SYMBOL vmlinux 0x7d10f748	tcp_v4_send_check
+EXPORT_SYMBOL vmlinux 0x7d11c268	jiffies
+EXPORT_SYMBOL vmlinux 0x7d1814db	compat_tcp_getsockopt
+EXPORT_SYMBOL vmlinux 0x7d3d0ae2	input_close_device
+EXPORT_SYMBOL vmlinux 0x7d5d92ea	__bforget
+EXPORT_SYMBOL vmlinux 0x7d66dcef	tcf_exts_destroy
+EXPORT_SYMBOL vmlinux 0x7d7a919c	sock_wfree
+EXPORT_SYMBOL vmlinux 0x7d7e89db	vio_port_up
+EXPORT_SYMBOL vmlinux 0x7d92b531	make_bad_inode
+EXPORT_SYMBOL vmlinux 0x7db47355	new_inode
+EXPORT_SYMBOL vmlinux 0x7dceceac	capable
+EXPORT_SYMBOL vmlinux 0x7dd03e20	mdiobus_write
+EXPORT_SYMBOL vmlinux 0x7e07e308	elevator_exit
+EXPORT_SYMBOL vmlinux 0x7e0ca60b	pci_bus_assign_resources
+EXPORT_SYMBOL vmlinux 0x7e1eb1a7	input_get_keycode
+EXPORT_SYMBOL vmlinux 0x7e27480b	request_key
+EXPORT_SYMBOL vmlinux 0x7e9ac953	iget_locked
+EXPORT_SYMBOL vmlinux 0x7ec2d165	generic_file_llseek
+EXPORT_SYMBOL vmlinux 0x7ec87c53	elv_rq_merge_ok
+EXPORT_SYMBOL vmlinux 0x7ec9bfbc	strncpy
+EXPORT_SYMBOL vmlinux 0x7ecd148f	fb_set_var
+EXPORT_SYMBOL vmlinux 0x7edb9da5	drm_mode_config_cleanup
+EXPORT_SYMBOL vmlinux 0x7ee8ee43	blk_complete_request
+EXPORT_SYMBOL vmlinux 0x7efa82c4	sk_stream_wait_memory
+EXPORT_SYMBOL vmlinux 0x7efd1033	block_write_end
+EXPORT_SYMBOL vmlinux 0x7f174d7a	check_disk_change
+EXPORT_SYMBOL vmlinux 0x7f24de73	jiffies_to_usecs
+EXPORT_SYMBOL vmlinux 0x7f315aa7	unregister_quota_format
+EXPORT_SYMBOL vmlinux 0x7f34d76f	skb_copy_bits
+EXPORT_SYMBOL vmlinux 0x7f394d01	kernel_sendpage
+EXPORT_SYMBOL vmlinux 0x7f4ebabf	security_path_mknod
+EXPORT_SYMBOL vmlinux 0x7f56b8f4	module_put
+EXPORT_SYMBOL vmlinux 0x7f6ad809	drm_ioctl
+EXPORT_SYMBOL vmlinux 0x7f96c58b	key_alloc
+EXPORT_SYMBOL vmlinux 0x7fbf99ab	ps2_sendbyte
+EXPORT_SYMBOL vmlinux 0x7fc7d9c5	__ip_select_ident
+EXPORT_SYMBOL vmlinux 0x7fda322c	__tcf_em_tree_match
+EXPORT_SYMBOL vmlinux 0x7ff877c1	simple_statfs
+EXPORT_SYMBOL vmlinux 0x8046816e	do_splice_to
+EXPORT_SYMBOL vmlinux 0x8078b93a	tty_driver_flush_buffer
+EXPORT_SYMBOL vmlinux 0x807b7089	prom_firstprop
+EXPORT_SYMBOL vmlinux 0x807ccce7	blk_queue_make_request
+EXPORT_SYMBOL vmlinux 0x8085c7b1	prepare_to_wait
+EXPORT_SYMBOL vmlinux 0x8096eb27	init_task
+EXPORT_SYMBOL vmlinux 0x80a2edd4	single_open
+EXPORT_SYMBOL vmlinux 0x80b0c31d	drm_clflush_pages
+EXPORT_SYMBOL vmlinux 0x80bf3bc5	sun4v_niagara_getperf
+EXPORT_SYMBOL vmlinux 0x80ef18a5	netpoll_cleanup
+EXPORT_SYMBOL vmlinux 0x814365c7	input_register_handle
+EXPORT_SYMBOL vmlinux 0x815b5dd4	match_octal
+EXPORT_SYMBOL vmlinux 0x816db36a	tcp_md5_hash_header
+EXPORT_SYMBOL vmlinux 0x81a14ded	bio_integrity_alloc_bioset
+EXPORT_SYMBOL vmlinux 0x81a485c2	tcp_v4_md5_do_add
+EXPORT_SYMBOL vmlinux 0x81cc1ec2	sk_release_kernel
+EXPORT_SYMBOL vmlinux 0x820d225f	print_mac
+EXPORT_SYMBOL vmlinux 0x8229fce5	blk_queue_bounce_limit
+EXPORT_SYMBOL vmlinux 0x8237df00	drm_fasync
+EXPORT_SYMBOL vmlinux 0x8251bcc3	bitmap_release_region
+EXPORT_SYMBOL vmlinux 0x8262f64b	tcp_sockets_allocated
+EXPORT_SYMBOL vmlinux 0x82692209	kref_set
+EXPORT_SYMBOL vmlinux 0x827a4628	generic_file_direct_write
+EXPORT_SYMBOL vmlinux 0x82acb91b	remove_inode_hash
+EXPORT_SYMBOL vmlinux 0x82acfb70	blk_iopoll_sched
+EXPORT_SYMBOL vmlinux 0x82ceb533	pci_free_consistent
+EXPORT_SYMBOL vmlinux 0x82de01c8	jbd2_journal_check_available_features
+EXPORT_SYMBOL vmlinux 0x82e0f3e9	pci_scan_slot
+EXPORT_SYMBOL vmlinux 0x82e52e9d	drm_get_encoder_name
+EXPORT_SYMBOL vmlinux 0x82e9c083	csum_partial_copy_fromiovecend
+EXPORT_SYMBOL vmlinux 0x832f20ff	pskb_copy
+EXPORT_SYMBOL vmlinux 0x8344b1ae	vga_client_register
+EXPORT_SYMBOL vmlinux 0x83459d45	unlock_new_inode
+EXPORT_SYMBOL vmlinux 0x836fcf9f	journal_wipe
+EXPORT_SYMBOL vmlinux 0x8374bd4c	blk_queue_alignment_offset
+EXPORT_SYMBOL vmlinux 0x83964cfd	pci_select_bars
+EXPORT_SYMBOL vmlinux 0x8396f1bc	inetdev_by_index
+EXPORT_SYMBOL vmlinux 0x83a476ce	bitmap_scnlistprintf
+EXPORT_SYMBOL vmlinux 0x83bf9c53	seq_escape
+EXPORT_SYMBOL vmlinux 0x83c43dc1	posix_acl_chmod_masq
+EXPORT_SYMBOL vmlinux 0x83f4288e	uart_unregister_driver
+EXPORT_SYMBOL vmlinux 0x840dea0f	get_sb_ns
+EXPORT_SYMBOL vmlinux 0x844277cb	__pci_register_driver
+EXPORT_SYMBOL vmlinux 0x844edcc3	dget_locked
+EXPORT_SYMBOL vmlinux 0x8453c5c5	alloc_netdev_mq
+EXPORT_SYMBOL vmlinux 0x848d9d6a	ip4_datagram_connect
+EXPORT_SYMBOL vmlinux 0x849c578f	kernel_listen
+EXPORT_SYMBOL vmlinux 0x84b04b80	d_alloc_name
+EXPORT_SYMBOL vmlinux 0x84d20c54	tcf_unregister_action
+EXPORT_SYMBOL vmlinux 0x851754c6	sock_kfree_s
+EXPORT_SYMBOL vmlinux 0x851bb7d1	register_qdisc
+EXPORT_SYMBOL vmlinux 0x85212c3c	mntput_no_expire
+EXPORT_SYMBOL vmlinux 0x855cb3b1	drm_core_ioremap_wc
+EXPORT_SYMBOL vmlinux 0x85670f1d	rtnl_is_locked
+EXPORT_SYMBOL vmlinux 0x8582dc7e	blk_fetch_request
+EXPORT_SYMBOL vmlinux 0x85999b22	lro_receive_skb
+EXPORT_SYMBOL vmlinux 0x859f135b	zero_fill_bio
+EXPORT_SYMBOL vmlinux 0x85abc85f	strncmp
+EXPORT_SYMBOL vmlinux 0x85ddfe53	__kfree_skb
+EXPORT_SYMBOL vmlinux 0x85de09f5	drm_mode_width
+EXPORT_SYMBOL vmlinux 0x85df9b6c	strsep
+EXPORT_SYMBOL vmlinux 0x85e7e71b	inet_dgram_ops
+EXPORT_SYMBOL vmlinux 0x85fadc51	pci_assign_resource
+EXPORT_SYMBOL vmlinux 0x8631f188	radix_tree_tag_set
+EXPORT_SYMBOL vmlinux 0x8638a2a9	vmalloc_to_page
+EXPORT_SYMBOL vmlinux 0x868acba5	get_options
+EXPORT_SYMBOL vmlinux 0x86a0faf3	register_sysrq_key
+EXPORT_SYMBOL vmlinux 0x86a27139	udp_disconnect
+EXPORT_SYMBOL vmlinux 0x86c7146d	vfs_fstat
+EXPORT_SYMBOL vmlinux 0x86d8a081	cdev_del
+EXPORT_SYMBOL vmlinux 0x86e390fe	udp_lib_unhash
+EXPORT_SYMBOL vmlinux 0x86fb9b05	bitmap_parse_user
+EXPORT_SYMBOL vmlinux 0x87052828	pci_pme_active
+EXPORT_SYMBOL vmlinux 0x8716da89	__generic_block_fiemap
+EXPORT_SYMBOL vmlinux 0x87198f96	tcf_hash_new_index
+EXPORT_SYMBOL vmlinux 0x871c0a7e	fiemap_check_flags
+EXPORT_SYMBOL vmlinux 0x872927b8	down_timeout
+EXPORT_SYMBOL vmlinux 0x872bd087	suncore_mouse_baud_detection
+EXPORT_SYMBOL vmlinux 0x87392084	lock_sock_nested
+EXPORT_SYMBOL vmlinux 0x873c8c25	__scm_send
+EXPORT_SYMBOL vmlinux 0x878ab3ce	sysctl_tcp_adv_win_scale
+EXPORT_SYMBOL vmlinux 0x87d6e7ef	drm_detect_hdmi_monitor
+EXPORT_SYMBOL vmlinux 0x87dbe5d3	vio_ldc_send
+EXPORT_SYMBOL vmlinux 0x87f29adb	keyring_clear
+EXPORT_SYMBOL vmlinux 0x87ff4ab7	drm_mode_create_scaling_mode_property
+EXPORT_SYMBOL vmlinux 0x881039d0	zlib_inflate
+EXPORT_SYMBOL vmlinux 0x8821c9f1	xfrm_state_update
+EXPORT_SYMBOL vmlinux 0x882d2a41	sbusfb_ioctl_helper
+EXPORT_SYMBOL vmlinux 0x883b24fb	sun4v_niagara_setperf
+EXPORT_SYMBOL vmlinux 0x8840052c	bio_map_kern
+EXPORT_SYMBOL vmlinux 0x886aa274	posix_acl_create_masq
+EXPORT_SYMBOL vmlinux 0x887b03e1	proc_net_netfilter
+EXPORT_SYMBOL vmlinux 0x889b87f3	eth_header_cache
+EXPORT_SYMBOL vmlinux 0x889bc3df	security_task_getsecid
+EXPORT_SYMBOL vmlinux 0x88a4b938	linkwatch_fire_event
+EXPORT_SYMBOL vmlinux 0x88b5325f	sk_common_release
+EXPORT_SYMBOL vmlinux 0x8902f1af	of_console_path
+EXPORT_SYMBOL vmlinux 0x8904f147	sock_get_timestampns
+EXPORT_SYMBOL vmlinux 0x891e32b8	wait_for_completion_interruptible
+EXPORT_SYMBOL vmlinux 0x8955e53b	key_revoke
+EXPORT_SYMBOL vmlinux 0x897473df	mktime
+EXPORT_SYMBOL vmlinux 0x89921926	simple_pin_fs
+EXPORT_SYMBOL vmlinux 0x89d5538d	fb_pad_aligned_buffer
+EXPORT_SYMBOL vmlinux 0x89d66811	build_ehash_secret
+EXPORT_SYMBOL vmlinux 0x89d8916a	drm_crtc_cleanup
+EXPORT_SYMBOL vmlinux 0x89ea956e	napi_gro_frags
+EXPORT_SYMBOL vmlinux 0x8a02bd7c	__bio_clone
+EXPORT_SYMBOL vmlinux 0x8a1203a9	kref_get
+EXPORT_SYMBOL vmlinux 0x8a373fd7	twl4030_i2c_write
+EXPORT_SYMBOL vmlinux 0x8a7ce0df	vio_link_state_change
+EXPORT_SYMBOL vmlinux 0x8a7d1c31	high_memory
+EXPORT_SYMBOL vmlinux 0x8a902a9a	tcp_connect
+EXPORT_SYMBOL vmlinux 0x8a99a016	mempool_free_slab
+EXPORT_SYMBOL vmlinux 0x8ab846b6	unlock_super
+EXPORT_SYMBOL vmlinux 0x8ac40297	iommu_area_free
+EXPORT_SYMBOL vmlinux 0x8b0403e6	prom_getproperty
+EXPORT_SYMBOL vmlinux 0x8b160a10	jbd2_journal_init_inode
+EXPORT_SYMBOL vmlinux 0x8b31db6c	get_sb_nodev
+EXPORT_SYMBOL vmlinux 0x8b5e32dc	__page_symlink
+EXPORT_SYMBOL vmlinux 0x8b618d08	overflowuid
+EXPORT_SYMBOL vmlinux 0x8b7fe311	kmemdup
+EXPORT_SYMBOL vmlinux 0x8b8ba8e1	xfrm_policy_bysel_ctx
+EXPORT_SYMBOL vmlinux 0x8b922c0f	__strnlen_user
+EXPORT_SYMBOL vmlinux 0x8bb9ea7e	sg_miter_start
+EXPORT_SYMBOL vmlinux 0x8bbd56d1	inet_frag_evictor
+EXPORT_SYMBOL vmlinux 0x8bd313b8	__tracepoint_kfree
+EXPORT_SYMBOL vmlinux 0x8bd5b603	param_get_long
+EXPORT_SYMBOL vmlinux 0x8bf87169	__bzero
+EXPORT_SYMBOL vmlinux 0x8c021827	fb_firmware_edid
+EXPORT_SYMBOL vmlinux 0x8c175f17	skb_append_datato_frags
+EXPORT_SYMBOL vmlinux 0x8c24d884	user_path_at
+EXPORT_SYMBOL vmlinux 0x8c3ebc72	saved_command_line
+EXPORT_SYMBOL vmlinux 0x8c4fe212	xfrm_unregister_type
+EXPORT_SYMBOL vmlinux 0x8c52c2da	unregister_console
+EXPORT_SYMBOL vmlinux 0x8c537c45	posix_acl_from_mode
+EXPORT_SYMBOL vmlinux 0x8c76271f	dmam_alloc_noncoherent
+EXPORT_SYMBOL vmlinux 0x8c948565	bio_integrity_clone
+EXPORT_SYMBOL vmlinux 0x8c9be0ca	neigh_sysctl_unregister
+EXPORT_SYMBOL vmlinux 0x8ca750bf	tcf_exts_validate
+EXPORT_SYMBOL vmlinux 0x8cbeebae	nf_register_sockopt
+EXPORT_SYMBOL vmlinux 0x8cbf55b4	ip_dev_find
+EXPORT_SYMBOL vmlinux 0x8cd297c5	con_is_bound
+EXPORT_SYMBOL vmlinux 0x8cda7ed4	pipe_lock
+EXPORT_SYMBOL vmlinux 0x8cef8e25	inet_frags_exit_net
+EXPORT_SYMBOL vmlinux 0x8d07b947	set_bdi_congested
+EXPORT_SYMBOL vmlinux 0x8d0888eb	blk_insert_request
+EXPORT_SYMBOL vmlinux 0x8d179e42	fget
+EXPORT_SYMBOL vmlinux 0x8d1e9aac	dquot_free_space
+EXPORT_SYMBOL vmlinux 0x8d3894f2	_ctype
+EXPORT_SYMBOL vmlinux 0x8d551bef	sysctl_tcp_rmem
+EXPORT_SYMBOL vmlinux 0x8d5642fc	wait_for_completion_interruptible_timeout
+EXPORT_SYMBOL vmlinux 0x8d5ff71a	dev_get_by_name
+EXPORT_SYMBOL vmlinux 0x8d8ff492	drm_crtc_init
+EXPORT_SYMBOL vmlinux 0x8d9ea808	wireless_send_event
+EXPORT_SYMBOL vmlinux 0x8dd63c21	lease_modify
+EXPORT_SYMBOL vmlinux 0x8de65951	jbd2_journal_lock_updates
+EXPORT_SYMBOL vmlinux 0x8e0b7743	ipv6_ext_hdr
+EXPORT_SYMBOL vmlinux 0x8e3c9cc3	vprintk
+EXPORT_SYMBOL vmlinux 0x8e426a7f	mod_timer_pending
+EXPORT_SYMBOL vmlinux 0x8e763ae1	send_remote_softirq
+EXPORT_SYMBOL vmlinux 0x8e7ff8e5	journal_revoke
+EXPORT_SYMBOL vmlinux 0x8e879bb7	__vmalloc
+EXPORT_SYMBOL vmlinux 0x8ed64afa	security_file_permission
+EXPORT_SYMBOL vmlinux 0x8f07d8ca	__wait_on_bit
+EXPORT_SYMBOL vmlinux 0x8f0b3cbe	pcix_set_mmrbc
+EXPORT_SYMBOL vmlinux 0x8f17bc8f	simple_unlink
+EXPORT_SYMBOL vmlinux 0x8f1fe15a	tcf_em_unregister
+EXPORT_SYMBOL vmlinux 0x8f48679a	rb_prev
+EXPORT_SYMBOL vmlinux 0x8f541a06	drm_property_destroy
+EXPORT_SYMBOL vmlinux 0x8f6b7950	set_irq_data
+EXPORT_SYMBOL vmlinux 0x8f9b86b2	kfifo_alloc
+EXPORT_SYMBOL vmlinux 0x8fa0ff24	__blk_end_request
+EXPORT_SYMBOL vmlinux 0x8fdee83c	simple_write_begin
+EXPORT_SYMBOL vmlinux 0x90035333	secure_tcpv6_sequence_number
+EXPORT_SYMBOL vmlinux 0x90051cc8	generic_file_llseek_unlocked
+EXPORT_SYMBOL vmlinux 0x9010ba78	create_mnt_ns
+EXPORT_SYMBOL vmlinux 0x904aa52c	bio_add_page
+EXPORT_SYMBOL vmlinux 0x90516656	idr_for_each
+EXPORT_SYMBOL vmlinux 0x905ae424	vfs_quota_on_path
+EXPORT_SYMBOL vmlinux 0x906dfa08	nf_log_bind_pf
+EXPORT_SYMBOL vmlinux 0x90a0f5dc	generic_file_buffered_write
+EXPORT_SYMBOL vmlinux 0x91155f15	balance_dirty_pages_ratelimited_nr
+EXPORT_SYMBOL vmlinux 0x9117a881	prom_getstring
+EXPORT_SYMBOL vmlinux 0x9119b1ac	disk_stack_limits
+EXPORT_SYMBOL vmlinux 0x91481982	__ratelimit
+EXPORT_SYMBOL vmlinux 0x9150ed71	__put_cred
+EXPORT_SYMBOL vmlinux 0x9168b93c	sk_receive_skb
+EXPORT_SYMBOL vmlinux 0x91766c09	param_get_ulong
+EXPORT_SYMBOL vmlinux 0x918e5cae	fb_show_logo
+EXPORT_SYMBOL vmlinux 0x9192886a	pcim_iomap
+EXPORT_SYMBOL vmlinux 0x91fd613b	tty_chars_in_buffer
+EXPORT_SYMBOL vmlinux 0x9214ed8a	param_get_bool
+EXPORT_SYMBOL vmlinux 0x921f4390	atomic_add
+EXPORT_SYMBOL vmlinux 0x92392cd9	iov_shorten
+EXPORT_SYMBOL vmlinux 0x925953e6	submit_bh
+EXPORT_SYMBOL vmlinux 0x925d40da	xfrm_state_unregister_afinfo
+EXPORT_SYMBOL vmlinux 0x92849fad	bio_add_pc_page
+EXPORT_SYMBOL vmlinux 0x92967c67	iov_iter_copy_from_user_atomic
+EXPORT_SYMBOL vmlinux 0x92a5c690	netpoll_parse_options
+EXPORT_SYMBOL vmlinux 0x92c12a6a	may_umount
+EXPORT_SYMBOL vmlinux 0x92ea4ae4	crc32_le
+EXPORT_SYMBOL vmlinux 0x92f4ba6a	blk_queue_find_tag
+EXPORT_SYMBOL vmlinux 0x9322a27a	inode_sub_bytes
+EXPORT_SYMBOL vmlinux 0x932bd423	idr_remove
+EXPORT_SYMBOL vmlinux 0x9332823f	block_write_full_page
+EXPORT_SYMBOL vmlinux 0x93411f9b	fb_set_suspend
+EXPORT_SYMBOL vmlinux 0x934bae05	__dev_remove_pack
+EXPORT_SYMBOL vmlinux 0x93742b5a	set_disk_ro
+EXPORT_SYMBOL vmlinux 0x93a6e0b2	io_schedule
+EXPORT_SYMBOL vmlinux 0x93bb6b2b	cdev_init
+EXPORT_SYMBOL vmlinux 0x93fca811	__get_free_pages
+EXPORT_SYMBOL vmlinux 0x9405bed5	jbd2_log_wait_commit
+EXPORT_SYMBOL vmlinux 0x94402077	set_page_dirty_lock
+EXPORT_SYMBOL vmlinux 0x9443289e	set_bit
+EXPORT_SYMBOL vmlinux 0x94432f94	drm_mode_create_tv_properties
+EXPORT_SYMBOL vmlinux 0x9453508c	dev_unicast_unsync
+EXPORT_SYMBOL vmlinux 0x94629fd6	sock_no_getsockopt
+EXPORT_SYMBOL vmlinux 0x94847b23	nf_ct_destroy
+EXPORT_SYMBOL vmlinux 0x948ca926	phy_mii_ioctl
+EXPORT_SYMBOL vmlinux 0x94961283	vunmap
+EXPORT_SYMBOL vmlinux 0x94b93d8a	tty_set_operations
+EXPORT_SYMBOL vmlinux 0x94c5e559	journal_init_inode
+EXPORT_SYMBOL vmlinux 0x94d073ed	pci_iounmap
+EXPORT_SYMBOL vmlinux 0x94d244c7	xfrm_state_delete_tunnel
+EXPORT_SYMBOL vmlinux 0x94dd2728	vio_send_sid
+EXPORT_SYMBOL vmlinux 0x94eda1b2	mpage_writepage
+EXPORT_SYMBOL vmlinux 0x9501d078	__wait_on_bit_lock
+EXPORT_SYMBOL vmlinux 0x950b0b51	test_and_set_bit
+EXPORT_SYMBOL vmlinux 0x9514151a	_mcount
+EXPORT_SYMBOL vmlinux 0x954488a4	syncookie_secret
+EXPORT_SYMBOL vmlinux 0x954b91bf	netif_receive_skb
+EXPORT_SYMBOL vmlinux 0x954cbb26	vsprintf
+EXPORT_SYMBOL vmlinux 0x95664732	__sk_mem_schedule
+EXPORT_SYMBOL vmlinux 0x95a8578a	neigh_seq_start
+EXPORT_SYMBOL vmlinux 0x95b7849b	udp_lib_get_port
+EXPORT_SYMBOL vmlinux 0x95cad1ef	vfs_getattr
+EXPORT_SYMBOL vmlinux 0x95ceb864	key_update
+EXPORT_SYMBOL vmlinux 0x95ff081b	inet_listen
+EXPORT_SYMBOL vmlinux 0x963c6708	cdev_index
+EXPORT_SYMBOL vmlinux 0x9693d9c9	udp_flush_pending_frames
+EXPORT_SYMBOL vmlinux 0x96a9f6dd	sock_no_poll
+EXPORT_SYMBOL vmlinux 0x96d5603c	__neigh_event_send
+EXPORT_SYMBOL vmlinux 0x96d6b875	i2c_verify_client
+EXPORT_SYMBOL vmlinux 0x96edfdb6	sock_sendmsg
+EXPORT_SYMBOL vmlinux 0x9710c39f	blk_stack_limits
+EXPORT_SYMBOL vmlinux 0x97391827	blk_rq_unmap_user
+EXPORT_SYMBOL vmlinux 0x973b3359	find_inode_number
+EXPORT_SYMBOL vmlinux 0x973f74d7	udp_lib_getsockopt
+EXPORT_SYMBOL vmlinux 0x973fca1c	drm_debugfs_remove_files
+EXPORT_SYMBOL vmlinux 0x9754ec10	radix_tree_preload
+EXPORT_SYMBOL vmlinux 0x97e3bfbc	__register_chrdev
+EXPORT_SYMBOL vmlinux 0x97efd433	lookup_hash
+EXPORT_SYMBOL vmlinux 0x97f70158	pipe_to_file
+EXPORT_SYMBOL vmlinux 0x9809b257	ethtool_op_set_tso
+EXPORT_SYMBOL vmlinux 0x9831e854	input_unfilter_device
+EXPORT_SYMBOL vmlinux 0x9848c25e	journal_destroy
+EXPORT_SYMBOL vmlinux 0x986e6135	fb_pad_unaligned_buffer
+EXPORT_SYMBOL vmlinux 0x9872d116	cmos_regs
+EXPORT_SYMBOL vmlinux 0x987a81a2	drm_mode_connector_attach_encoder
+EXPORT_SYMBOL vmlinux 0x9880bb35	register_tcf_proto_ops
+EXPORT_SYMBOL vmlinux 0x98c3eba5	tty_port_block_til_ready
+EXPORT_SYMBOL vmlinux 0x98f95ba1	lock_may_read
+EXPORT_SYMBOL vmlinux 0x98fb34ba	seq_open
+EXPORT_SYMBOL vmlinux 0x98fd71e4	ethtool_op_get_tso
+EXPORT_SYMBOL vmlinux 0x991e7788	blk_run_queue
+EXPORT_SYMBOL vmlinux 0x994b6b9e	kobject_set_name
+EXPORT_SYMBOL vmlinux 0x9979468b	key_validate
+EXPORT_SYMBOL vmlinux 0x997f707f	ida_pre_get
+EXPORT_SYMBOL vmlinux 0x9994c0ca	ps2_is_keyboard_id
+EXPORT_SYMBOL vmlinux 0x999e8297	vfree
+EXPORT_SYMBOL vmlinux 0x99b760b5	phy_print_status
+EXPORT_SYMBOL vmlinux 0x99bfbe39	get_unused_fd
+EXPORT_SYMBOL vmlinux 0x99c7a8b8	jbd2_dev_to_name
+EXPORT_SYMBOL vmlinux 0x99cdc86b	sysctl_tcp_reordering
+EXPORT_SYMBOL vmlinux 0x99d49843	wireless_spy_update
+EXPORT_SYMBOL vmlinux 0x99de39a9	kernel_getpeername
+EXPORT_SYMBOL vmlinux 0x99ea12ce	panic_blink
+EXPORT_SYMBOL vmlinux 0x99ea539c	wake_up_process
+EXPORT_SYMBOL vmlinux 0x9a0fb29a	rtnl_unicast
+EXPORT_SYMBOL vmlinux 0x9a15e22a	slow_work_enqueue
+EXPORT_SYMBOL vmlinux 0x9a1dfd65	strpbrk
+EXPORT_SYMBOL vmlinux 0x9a4b431b	read_cache_page_gfp
+EXPORT_SYMBOL vmlinux 0x9a576f8c	blk_queue_segment_boundary
+EXPORT_SYMBOL vmlinux 0x9aa71e33	drm_addbufs_pci
+EXPORT_SYMBOL vmlinux 0x9aa7cce7	poll_freewait
+EXPORT_SYMBOL vmlinux 0x9aabc564	crc16
+EXPORT_SYMBOL vmlinux 0x9aacd62b	prom_getintdefault
+EXPORT_SYMBOL vmlinux 0x9aafc129	lock_rename
+EXPORT_SYMBOL vmlinux 0x9adcbcd4	do_truncate
+EXPORT_SYMBOL vmlinux 0x9ade1494	seq_bitmap
+EXPORT_SYMBOL vmlinux 0x9b241009	tty_insert_flip_string_flags
+EXPORT_SYMBOL vmlinux 0x9b388444	get_zeroed_page
+EXPORT_SYMBOL vmlinux 0x9b48420b	drm_mode_crtc_set_gamma_size
+EXPORT_SYMBOL vmlinux 0x9ba7089d	argv_split
+EXPORT_SYMBOL vmlinux 0x9bd88f31	blk_queue_start_tag
+EXPORT_SYMBOL vmlinux 0x9bfb1982	pci_map_rom
+EXPORT_SYMBOL vmlinux 0x9c012508	fb_parse_edid
+EXPORT_SYMBOL vmlinux 0x9c091aaf	drm_vblank_off
+EXPORT_SYMBOL vmlinux 0x9c0ea3cd	memscan
+EXPORT_SYMBOL vmlinux 0x9c1b5178	i2c_smbus_read_word_data
+EXPORT_SYMBOL vmlinux 0x9c548a91	input_release_device
+EXPORT_SYMBOL vmlinux 0x9c5834a9	rwsem_downgrade_wake
+EXPORT_SYMBOL vmlinux 0x9c6764b3	create_empty_buffers
+EXPORT_SYMBOL vmlinux 0x9ca7cd55	phy_register_fixup_for_id
+EXPORT_SYMBOL vmlinux 0x9ca95a0e	sort
+EXPORT_SYMBOL vmlinux 0x9cb96e92	qdisc_put_rtab
+EXPORT_SYMBOL vmlinux 0x9cc4ba07	__down_read_trylock
+EXPORT_SYMBOL vmlinux 0x9d3aa376	blk_iopoll_init
+EXPORT_SYMBOL vmlinux 0x9d3abf4a	inet_csk_accept
+EXPORT_SYMBOL vmlinux 0x9d51f872	tcp_disconnect
+EXPORT_SYMBOL vmlinux 0x9da4180e	skb_checksum_help
+EXPORT_SYMBOL vmlinux 0x9da5db03	generic_write_end
+EXPORT_SYMBOL vmlinux 0x9db21624	hex_dump_to_buffer
+EXPORT_SYMBOL vmlinux 0x9db37875	change_bit
+EXPORT_SYMBOL vmlinux 0x9ddf06ce	setup_arg_pages
+EXPORT_SYMBOL vmlinux 0x9dfb80df	tcp_poll
+EXPORT_SYMBOL vmlinux 0x9e030f56	inet_accept
+EXPORT_SYMBOL vmlinux 0x9e04dfbe	dcache_readdir
+EXPORT_SYMBOL vmlinux 0x9e447600	vfs_fsync_range
+EXPORT_SYMBOL vmlinux 0x9e4835b5	seq_lseek
+EXPORT_SYMBOL vmlinux 0x9e771285	_PAGE_E
+EXPORT_SYMBOL vmlinux 0x9e9f1714	__bitmap_andnot
+EXPORT_SYMBOL vmlinux 0x9ea26c4c	down_write_trylock
+EXPORT_SYMBOL vmlinux 0x9ebd4c04	adjust_resource
+EXPORT_SYMBOL vmlinux 0x9ed9ff79	tcp_parse_options
+EXPORT_SYMBOL vmlinux 0x9edbecae	snprintf
+EXPORT_SYMBOL vmlinux 0x9eec48e0	pci_dma_sync_sg_for_cpu
+EXPORT_SYMBOL vmlinux 0x9eecde16	do_brk
+EXPORT_SYMBOL vmlinux 0x9f100139	jiffies_to_clock_t
+EXPORT_SYMBOL vmlinux 0x9f2bdaac	__bitmap_or
+EXPORT_SYMBOL vmlinux 0x9f2d613e	param_set_bool
+EXPORT_SYMBOL vmlinux 0x9f34d045	journal_invalidatepage
+EXPORT_SYMBOL vmlinux 0x9f370643	phy_ethtool_gset
+EXPORT_SYMBOL vmlinux 0x9f3baefb	inet_put_port
+EXPORT_SYMBOL vmlinux 0x9f4d90ad	add_disk
+EXPORT_SYMBOL vmlinux 0x9f5a2d87	kill_block_super
+EXPORT_SYMBOL vmlinux 0x9f6805b6	of_find_node_by_path
+EXPORT_SYMBOL vmlinux 0x9f72c2eb	init_timer_key
+EXPORT_SYMBOL vmlinux 0x9f931302	nf_unregister_queue_handler
+EXPORT_SYMBOL vmlinux 0x9f984513	strrchr
+EXPORT_SYMBOL vmlinux 0x9fa1b0b7	journal_restart
+EXPORT_SYMBOL vmlinux 0x9fa325c0	tcf_hash_insert
+EXPORT_SYMBOL vmlinux 0x9ff08a9e	kernel_getsockopt
+EXPORT_SYMBOL vmlinux 0xa025085b	bdi_set_max_ratio
+EXPORT_SYMBOL vmlinux 0xa033d05a	up_read
+EXPORT_SYMBOL vmlinux 0xa03523d5	security_unix_stream_connect
+EXPORT_SYMBOL vmlinux 0xa03a68e6	security_inode_init_security
+EXPORT_SYMBOL vmlinux 0xa04378bd	__skb_warn_lro_forwarding
+EXPORT_SYMBOL vmlinux 0xa04a01bd	qdisc_class_hash_insert
+EXPORT_SYMBOL vmlinux 0xa053e10f	nf_ip_checksum
+EXPORT_SYMBOL vmlinux 0xa05c03df	mempool_kmalloc
+EXPORT_SYMBOL vmlinux 0xa07a8d22	sleep_on
+EXPORT_SYMBOL vmlinux 0xa09f10e8	jbd2_journal_force_commit
+EXPORT_SYMBOL vmlinux 0xa0b04675	vmalloc_32
+EXPORT_SYMBOL vmlinux 0xa0ceef51	out_of_line_wait_on_bit
+EXPORT_SYMBOL vmlinux 0xa0d3d560	ksize
+EXPORT_SYMBOL vmlinux 0xa0e8d7eb	key_type_keyring
+EXPORT_SYMBOL vmlinux 0xa0ebb2ba	_PAGE_CACHE
+EXPORT_SYMBOL vmlinux 0xa0f1311f	blk_rq_map_user
+EXPORT_SYMBOL vmlinux 0xa0fab7a7	kernel_recvmsg
+EXPORT_SYMBOL vmlinux 0xa0fbac79	wake_up_bit
+EXPORT_SYMBOL vmlinux 0xa10162c5	remap_vmalloc_range
+EXPORT_SYMBOL vmlinux 0xa108eb4d	sysctl_optmem_max
+EXPORT_SYMBOL vmlinux 0xa120d33c	tty_unregister_ldisc
+EXPORT_SYMBOL vmlinux 0xa1287176	compat_ip_getsockopt
+EXPORT_SYMBOL vmlinux 0xa13798f8	printk_ratelimit
+EXPORT_SYMBOL vmlinux 0xa15313e2	cfb_copyarea
+EXPORT_SYMBOL vmlinux 0xa17cdabf	ethtool_op_set_tx_ipv6_csum
+EXPORT_SYMBOL vmlinux 0xa1959404	pci_reenable_device
+EXPORT_SYMBOL vmlinux 0xa19ca792	__kfifo_put
+EXPORT_SYMBOL vmlinux 0xa1a407ca	__f_setown
+EXPORT_SYMBOL vmlinux 0xa1b759ce	fb_add_videomode
+EXPORT_SYMBOL vmlinux 0xa1ba4b95	memcpy_fromiovecend
+EXPORT_SYMBOL vmlinux 0xa1c5a4fa	__scm_destroy
+EXPORT_SYMBOL vmlinux 0xa1c76e0a	_cond_resched
+EXPORT_SYMBOL vmlinux 0xa1cea0b8	proc_dointvec
+EXPORT_SYMBOL vmlinux 0xa1eabd87	drm_mode_list_concat
+EXPORT_SYMBOL vmlinux 0xa1f36f25	neigh_destroy
+EXPORT_SYMBOL vmlinux 0xa201e898	ethtool_op_set_tx_csum
+EXPORT_SYMBOL vmlinux 0xa20483ff	vio_control_pkt_engine
+EXPORT_SYMBOL vmlinux 0xa20ce1b8	net_msg_warn
+EXPORT_SYMBOL vmlinux 0xa218bf61	complete
+EXPORT_SYMBOL vmlinux 0xa24b50e8	xfrm_prepare_input
+EXPORT_SYMBOL vmlinux 0xa25a7c77	dquot_transfer
+EXPORT_SYMBOL vmlinux 0xa25e65bd	tcf_em_tree_destroy
+EXPORT_SYMBOL vmlinux 0xa25e6e2e	unregister_qdisc
+EXPORT_SYMBOL vmlinux 0xa2714d86	vfs_create
+EXPORT_SYMBOL vmlinux 0xa28e76e6	schedule_work
+EXPORT_SYMBOL vmlinux 0xa2933f76	posix_acl_permission
+EXPORT_SYMBOL vmlinux 0xa29b1708	tcp_memory_allocated
+EXPORT_SYMBOL vmlinux 0xa2a5fd77	inet_ehash_secret
+EXPORT_SYMBOL vmlinux 0xa2dfef89	seq_puts
+EXPORT_SYMBOL vmlinux 0xa2e34c75	netpoll_setup
+EXPORT_SYMBOL vmlinux 0xa329f07e	register_shrinker
+EXPORT_SYMBOL vmlinux 0xa332cdd1	security_tun_dev_attach
+EXPORT_SYMBOL vmlinux 0xa33f7c7c	nla_strlcpy
+EXPORT_SYMBOL vmlinux 0xa34a4aa7	___copy_to_user
+EXPORT_SYMBOL vmlinux 0xa35de80f	ipv4_config
+EXPORT_SYMBOL vmlinux 0xa3621402	i2c_master_send
+EXPORT_SYMBOL vmlinux 0xa37fc320	skb_tx_hash
+EXPORT_SYMBOL vmlinux 0xa39b4cf2	udelay
+EXPORT_SYMBOL vmlinux 0xa39c5d29	d_validate
+EXPORT_SYMBOL vmlinux 0xa3a1d1eb	kobject_add
+EXPORT_SYMBOL vmlinux 0xa3b3adc4	complete_request_key
+EXPORT_SYMBOL vmlinux 0xa3c1768f	xfrm_state_flush
+EXPORT_SYMBOL vmlinux 0xa3ea5063	blk_queue_update_dma_alignment
+EXPORT_SYMBOL vmlinux 0xa3ec147d	km_state_expired
+EXPORT_SYMBOL vmlinux 0xa41578ab	of_device_unregister
+EXPORT_SYMBOL vmlinux 0xa423684b	skb_insert
+EXPORT_SYMBOL vmlinux 0xa4354e93	pfifo_qdisc_ops
+EXPORT_SYMBOL vmlinux 0xa444111b	ebus_dma_unregister
+EXPORT_SYMBOL vmlinux 0xa44b3a0f	neigh_table_init
+EXPORT_SYMBOL vmlinux 0xa474e8a6	pci_domain_nr
+EXPORT_SYMBOL vmlinux 0xa4864496	phy_device_register
+EXPORT_SYMBOL vmlinux 0xa497ebbd	rwsem_down_write_failed
+EXPORT_SYMBOL vmlinux 0xa4a057dd	phy_register_fixup
+EXPORT_SYMBOL vmlinux 0xa4b80f12	skb_push
+EXPORT_SYMBOL vmlinux 0xa4c5c8d6	sunserial_unregister_minors
+EXPORT_SYMBOL vmlinux 0xa4f503e6	generic_file_aio_write
+EXPORT_SYMBOL vmlinux 0xa520edfa	qdisc_tree_decrease_qlen
+EXPORT_SYMBOL vmlinux 0xa5237cd6	blk_put_request
+EXPORT_SYMBOL vmlinux 0xa5560dbe	nf_reinject
+EXPORT_SYMBOL vmlinux 0xa5563a59	of_phy_connect
+EXPORT_SYMBOL vmlinux 0xa56b1c58	dmam_free_noncoherent
+EXPORT_SYMBOL vmlinux 0xa576c263	generic_find_next_le_bit
+EXPORT_SYMBOL vmlinux 0xa5808bbf	tasklet_init
+EXPORT_SYMBOL vmlinux 0xa5890a97	pci_write_vpd
+EXPORT_SYMBOL vmlinux 0xa58b6804	nla_parse
+EXPORT_SYMBOL vmlinux 0xa598e29c	vesa_modes
+EXPORT_SYMBOL vmlinux 0xa5a86d72	pci_get_slot
+EXPORT_SYMBOL vmlinux 0xa5af42ac	blk_queue_physical_block_size
+EXPORT_SYMBOL vmlinux 0xa5b43dd2	qdisc_watchdog_init
+EXPORT_SYMBOL vmlinux 0xa5e68673	tlb_type
+EXPORT_SYMBOL vmlinux 0xa60d6fdd	bdev_read_only
+EXPORT_SYMBOL vmlinux 0xa63e8b94	dev_get_by_index
+EXPORT_SYMBOL vmlinux 0xa65ccc74	drm_sysfs_hotplug_event
+EXPORT_SYMBOL vmlinux 0xa68124fa	hweight8
+EXPORT_SYMBOL vmlinux 0xa681fe88	generate_random_uuid
+EXPORT_SYMBOL vmlinux 0xa6903bb0	sock_kmalloc
+EXPORT_SYMBOL vmlinux 0xa6ac0e9e	mii_phy_probe
+EXPORT_SYMBOL vmlinux 0xa6afbb50	fb_validate_mode
+EXPORT_SYMBOL vmlinux 0xa6dcc773	rb_insert_color
+EXPORT_SYMBOL vmlinux 0xa6df3f23	journal_abort
+EXPORT_SYMBOL vmlinux 0xa740cd12	drm_mode_create_dvi_i_properties
+EXPORT_SYMBOL vmlinux 0xa75d43ad	skb_abort_seq_read
+EXPORT_SYMBOL vmlinux 0xa760b56c	pci_bus_set_ops
+EXPORT_SYMBOL vmlinux 0xa7887179	of_n_size_cells
+EXPORT_SYMBOL vmlinux 0xa7ba9e5f	security_inode_readlink
+EXPORT_SYMBOL vmlinux 0xa7d30cbd	skb_recycle_check
+EXPORT_SYMBOL vmlinux 0xa8061c7a	generic_file_readonly_mmap
+EXPORT_SYMBOL vmlinux 0xa8226db5	sk_free
+EXPORT_SYMBOL vmlinux 0xa877e305	boot_tvec_bases
+EXPORT_SYMBOL vmlinux 0xa8808237	__break_lease
+EXPORT_SYMBOL vmlinux 0xa886a958	krealloc
+EXPORT_SYMBOL vmlinux 0xa895ef32	devm_iounmap
+EXPORT_SYMBOL vmlinux 0xa8a6f639	__check_region
+EXPORT_SYMBOL vmlinux 0xa8ba5678	nobh_write_begin
+EXPORT_SYMBOL vmlinux 0xa8f45887	tcp_sendpage
+EXPORT_SYMBOL vmlinux 0xa8fef7bb	security_unix_may_send
+EXPORT_SYMBOL vmlinux 0xa90a768a	simple_empty
+EXPORT_SYMBOL vmlinux 0xa9111a47	do_gettimeofday
+EXPORT_SYMBOL vmlinux 0xa912d0cb	pci_bus_size_bridges
+EXPORT_SYMBOL vmlinux 0xa91351b1	drm_mode_duplicate
+EXPORT_SYMBOL vmlinux 0xa92f7fa9	pcim_iomap_regions
+EXPORT_SYMBOL vmlinux 0xa947184c	compat_sock_common_setsockopt
+EXPORT_SYMBOL vmlinux 0xa98d15e4	kernel_accept
+EXPORT_SYMBOL vmlinux 0xa99648d0	__down_read
+EXPORT_SYMBOL vmlinux 0xa9a87cd6	drm_cvt_mode
+EXPORT_SYMBOL vmlinux 0xa9b42fe3	tcp_init_xmit_timers
+EXPORT_SYMBOL vmlinux 0xa9eb6e75	bdget_disk
+EXPORT_SYMBOL vmlinux 0xa9f0733b	dquot_claim_space
+EXPORT_SYMBOL vmlinux 0xa9f1ed23	bit_waitqueue
+EXPORT_SYMBOL vmlinux 0xaa067dc6	fput
+EXPORT_SYMBOL vmlinux 0xaa46be5f	dmam_free_coherent
+EXPORT_SYMBOL vmlinux 0xaac28899	bio_alloc_bioset
+EXPORT_SYMBOL vmlinux 0xaac84c5e	give_up_console
+EXPORT_SYMBOL vmlinux 0xaac91983	xfrm_register_mode
+EXPORT_SYMBOL vmlinux 0xaadb546d	phy_driver_unregister
+EXPORT_SYMBOL vmlinux 0xaafdc258	strcasecmp
+EXPORT_SYMBOL vmlinux 0xab1c8b8a	d_move
+EXPORT_SYMBOL vmlinux 0xab53b0a8	mempool_alloc
+EXPORT_SYMBOL vmlinux 0xab623431	write_cache_pages
+EXPORT_SYMBOL vmlinux 0xab93b634	uart_add_one_port
+EXPORT_SYMBOL vmlinux 0xaba9ff34	allocate_resource
+EXPORT_SYMBOL vmlinux 0xabb877fe	copy_io_context
+EXPORT_SYMBOL vmlinux 0xabcb5841	bio_integrity_get_tag
+EXPORT_SYMBOL vmlinux 0xabcc178f	generic_splice_sendpage
+EXPORT_SYMBOL vmlinux 0xabd0c91c	rtc_time_to_tm
+EXPORT_SYMBOL vmlinux 0xabd47787	down_killable
+EXPORT_SYMBOL vmlinux 0xabf5a978	tcp_initialize_rcv_mss
+EXPORT_SYMBOL vmlinux 0xac0ba8c1	blk_iopoll_disable
+EXPORT_SYMBOL vmlinux 0xac29d83b	drm_get_resource_len
+EXPORT_SYMBOL vmlinux 0xac2dab09	prom_getint
+EXPORT_SYMBOL vmlinux 0xac383451	radix_tree_tag_clear
+EXPORT_SYMBOL vmlinux 0xac47aa19	free_buffer_head
+EXPORT_SYMBOL vmlinux 0xac54fc9f	mempool_destroy
+EXPORT_SYMBOL vmlinux 0xac5f113d	cpu_all_bits
+EXPORT_SYMBOL vmlinux 0xac6855b0	gen_kill_estimator
+EXPORT_SYMBOL vmlinux 0xac83d2c6	____pagevec_lru_add
+EXPORT_SYMBOL vmlinux 0xac9ca686	tty_register_ldisc
+EXPORT_SYMBOL vmlinux 0xacbc6064	neigh_connected_output
+EXPORT_SYMBOL vmlinux 0xacbc6e26	simple_write_end
+EXPORT_SYMBOL vmlinux 0xaccabc6a	in4_pton
+EXPORT_SYMBOL vmlinux 0xacd11ebd	inet_proto_csum_replace4
+EXPORT_SYMBOL vmlinux 0xacdeb154	__tracepoint_module_get
+EXPORT_SYMBOL vmlinux 0xace23140	skb_clone
+EXPORT_SYMBOL vmlinux 0xace4c8ed	tick_ops
+EXPORT_SYMBOL vmlinux 0xace9732b	tcp_getsockopt
+EXPORT_SYMBOL vmlinux 0xacec652f	ps2_drain
+EXPORT_SYMBOL vmlinux 0xacf4d843	match_strdup
+EXPORT_SYMBOL vmlinux 0xad0413d4	match_hex
+EXPORT_SYMBOL vmlinux 0xad19fbbf	serio_interrupt
+EXPORT_SYMBOL vmlinux 0xadb1ec47	eth_rebuild_header
+EXPORT_SYMBOL vmlinux 0xadb792c2	prepare_to_wait_exclusive
+EXPORT_SYMBOL vmlinux 0xadd123f0	pci_enable_wake
+EXPORT_SYMBOL vmlinux 0xadfacde2	icmp_send
+EXPORT_SYMBOL vmlinux 0xae389f56	tty_driver_kref_put
+EXPORT_SYMBOL vmlinux 0xae395308	per_cpu__vm_event_states
+EXPORT_SYMBOL vmlinux 0xaea5c354	udp_prot
+EXPORT_SYMBOL vmlinux 0xaecbe356	jbd2_journal_extend
+EXPORT_SYMBOL vmlinux 0xaed013b9	posix_acl_valid
+EXPORT_SYMBOL vmlinux 0xaed3fc93	kernel_sendmsg
+EXPORT_SYMBOL vmlinux 0xaef1e53b	sock_common_getsockopt
+EXPORT_SYMBOL vmlinux 0xaef39ac3	unmap_mapping_range
+EXPORT_SYMBOL vmlinux 0xaef66524	secpath_dup
+EXPORT_SYMBOL vmlinux 0xaefffc5e	generic_setlease
+EXPORT_SYMBOL vmlinux 0xaf208cbb	genphy_update_link
+EXPORT_SYMBOL vmlinux 0xaf29788e	drm_sman_init
+EXPORT_SYMBOL vmlinux 0xaf39fe65	__xfrm_state_delete
+EXPORT_SYMBOL vmlinux 0xaf6221ed	eth_change_mtu
+EXPORT_SYMBOL vmlinux 0xaf742753	wait_for_key_construction
+EXPORT_SYMBOL vmlinux 0xaf7ac619	blk_queue_io_opt
+EXPORT_SYMBOL vmlinux 0xafa48eba	module_refcount
+EXPORT_SYMBOL vmlinux 0xafbacadb	tcf_hash_release
+EXPORT_SYMBOL vmlinux 0xafc3acb9	fbcon_set_bitops
+EXPORT_SYMBOL vmlinux 0xafe4788a	pci_release_region
+EXPORT_SYMBOL vmlinux 0xafe6583b	sg_last
+EXPORT_SYMBOL vmlinux 0xafe82e10	strcspn
+EXPORT_SYMBOL vmlinux 0xb007d6f0	__xfrm_state_destroy
+EXPORT_SYMBOL vmlinux 0xb00ef5ac	proc_doulongvec_ms_jiffies_minmax
+EXPORT_SYMBOL vmlinux 0xb01bb51e	napi_gro_flush
+EXPORT_SYMBOL vmlinux 0xb055d8da	posix_acl_to_xattr
+EXPORT_SYMBOL vmlinux 0xb05f3e3a	qdisc_class_hash_grow
+EXPORT_SYMBOL vmlinux 0xb07c076c	__wait_on_buffer
+EXPORT_SYMBOL vmlinux 0xb0961354	__xfrm_decode_session
+EXPORT_SYMBOL vmlinux 0xb0b847ac	__bitmap_full
+EXPORT_SYMBOL vmlinux 0xb0c1444c	jbd2_journal_blocks_per_page
+EXPORT_SYMBOL vmlinux 0xb0c6547f	send_sig_info
+EXPORT_SYMBOL vmlinux 0xb0cad2f0	serio_reconnect
+EXPORT_SYMBOL vmlinux 0xb0e10781	get_option
+EXPORT_SYMBOL vmlinux 0xb0f3a53c	find_get_pages_contig
+EXPORT_SYMBOL vmlinux 0xb11fa1ce	strlcat
+EXPORT_SYMBOL vmlinux 0xb148a0b5	jbd2_journal_stop
+EXPORT_SYMBOL vmlinux 0xb1568c3c	sock_wmalloc
+EXPORT_SYMBOL vmlinux 0xb167e94c	udp_lib_setsockopt
+EXPORT_SYMBOL vmlinux 0xb17c812c	i2c_get_adapter
+EXPORT_SYMBOL vmlinux 0xb18e02c3	radix_tree_gang_lookup_tag
+EXPORT_SYMBOL vmlinux 0xb19760c3	bitmap_onto
+EXPORT_SYMBOL vmlinux 0xb1c3a01a	oops_in_progress
+EXPORT_SYMBOL vmlinux 0xb1ff2e39	journal_stop
+EXPORT_SYMBOL vmlinux 0xb224fbe2	param_get_short
+EXPORT_SYMBOL vmlinux 0xb22d0601	of_phy_find_device
+EXPORT_SYMBOL vmlinux 0xb22fe6a3	netdev_increment_features
+EXPORT_SYMBOL vmlinux 0xb23d6af8	sk_run_filter
+EXPORT_SYMBOL vmlinux 0xb2410efb	sock_no_socketpair
+EXPORT_SYMBOL vmlinux 0xb2682405	utf8_to_utf32
+EXPORT_SYMBOL vmlinux 0xb273eefd	bdi_register_dev
+EXPORT_SYMBOL vmlinux 0xb27d50c5	d_invalidate
+EXPORT_SYMBOL vmlinux 0xb28e6ae9	sg_miter_next
+EXPORT_SYMBOL vmlinux 0xb2ce99ad	generic_shutdown_super
+EXPORT_SYMBOL vmlinux 0xb2d72cc7	gen_replace_estimator
+EXPORT_SYMBOL vmlinux 0xb32558c4	filemap_fault
+EXPORT_SYMBOL vmlinux 0xb33f75b4	tty_name
+EXPORT_SYMBOL vmlinux 0xb35b439a	dev_kfree_skb_irq
+EXPORT_SYMBOL vmlinux 0xb369ef70	skb_split
+EXPORT_SYMBOL vmlinux 0xb376801a	idr_get_new_above
+EXPORT_SYMBOL vmlinux 0xb3a307c6	si_meminfo
+EXPORT_SYMBOL vmlinux 0xb3a40b51	bio_clone
+EXPORT_SYMBOL vmlinux 0xb3b6d134	xfrm_state_insert
+EXPORT_SYMBOL vmlinux 0xb3e4e6f9	drm_core_ioremap
+EXPORT_SYMBOL vmlinux 0xb3ff1f69	free_pages_exact
+EXPORT_SYMBOL vmlinux 0xb412a941	posix_lock_file_wait
+EXPORT_SYMBOL vmlinux 0xb41332fd	__alloc_pages_nodemask
+EXPORT_SYMBOL vmlinux 0xb423dba1	console_blanked
+EXPORT_SYMBOL vmlinux 0xb42453d3	param_get_invbool
+EXPORT_SYMBOL vmlinux 0xb435bd66	mdesc_next_arc
+EXPORT_SYMBOL vmlinux 0xb436ffa3	__cond_resched_lock
+EXPORT_SYMBOL vmlinux 0xb4435c21	blk_queue_resize_tags
+EXPORT_SYMBOL vmlinux 0xb4468f80	rwsem_down_read_failed
+EXPORT_SYMBOL vmlinux 0xb463cf94	mem_map
+EXPORT_SYMBOL vmlinux 0xb46411dc	tty_check_change
+EXPORT_SYMBOL vmlinux 0xb47f414a	jbd2_journal_set_triggers
+EXPORT_SYMBOL vmlinux 0xb4812306	vga_put
+EXPORT_SYMBOL vmlinux 0xb48e6cfb	do_mmap_pgoff
+EXPORT_SYMBOL vmlinux 0xb4cbb7f2	bio_init
+EXPORT_SYMBOL vmlinux 0xb4db04b7	neigh_table_clear
+EXPORT_SYMBOL vmlinux 0xb4e8a001	d_alloc_root
+EXPORT_SYMBOL vmlinux 0xb4f04128	security_path_unlink
+EXPORT_SYMBOL vmlinux 0xb4f2a275	mdiobus_free
+EXPORT_SYMBOL vmlinux 0xb5044271	vsscanf
+EXPORT_SYMBOL vmlinux 0xb54533f7	usecs_to_jiffies
+EXPORT_SYMBOL vmlinux 0xb5748f29	mark_buffer_async_write
+EXPORT_SYMBOL vmlinux 0xb57e3d0e	put_disk
+EXPORT_SYMBOL vmlinux 0xb59978df	blk_queue_ordered
+EXPORT_SYMBOL vmlinux 0xb59f6ddd	vfs_get_dqinfo
+EXPORT_SYMBOL vmlinux 0xb5a3fec3	phy_device_create
+EXPORT_SYMBOL vmlinux 0xb5a459dc	unregister_blkdev
+EXPORT_SYMBOL vmlinux 0xb5b750ed	tcp_md5_hash_skb_data
+EXPORT_SYMBOL vmlinux 0xb5b9bbc0	xfrm_lookup
+EXPORT_SYMBOL vmlinux 0xb5ba8486	vfs_rmdir
+EXPORT_SYMBOL vmlinux 0xb621b186	blk_make_request
+EXPORT_SYMBOL vmlinux 0xb62e5730	vfs_quota_on
+EXPORT_SYMBOL vmlinux 0xb6556b26	simple_lookup
+EXPORT_SYMBOL vmlinux 0xb678366f	int_sqrt
+EXPORT_SYMBOL vmlinux 0xb6825515	bdput
+EXPORT_SYMBOL vmlinux 0xb6a2386d	kmem_cache_size
+EXPORT_SYMBOL vmlinux 0xb6a61a86	qdisc_get_rtab
+EXPORT_SYMBOL vmlinux 0xb6a68816	find_last_bit
+EXPORT_SYMBOL vmlinux 0xb6b56e13	pcix_get_mmrbc
+EXPORT_SYMBOL vmlinux 0xb6bffb99	kstat_irqs_cpu
+EXPORT_SYMBOL vmlinux 0xb6c70a7d	__wake_up
+EXPORT_SYMBOL vmlinux 0xb75bb39d	simple_dir_operations
+EXPORT_SYMBOL vmlinux 0xb76a8a3e	kernel_read
+EXPORT_SYMBOL vmlinux 0xb772c427	filemap_write_and_wait
+EXPORT_SYMBOL vmlinux 0xb7804006	vio_driver_init
+EXPORT_SYMBOL vmlinux 0xb798b8e4	flow_cache_lookup
+EXPORT_SYMBOL vmlinux 0xb7aa8cd3	nf_afinfo
+EXPORT_SYMBOL vmlinux 0xb7b8f8df	kobject_get
+EXPORT_SYMBOL vmlinux 0xb7ccb3c7	twl4030_i2c_read_u8
+EXPORT_SYMBOL vmlinux 0xb7e72e6b	pipe_unlock
+EXPORT_SYMBOL vmlinux 0xb7f2fe36	journal_lock_updates
+EXPORT_SYMBOL vmlinux 0xb813ce5a	timecompare_transform
+EXPORT_SYMBOL vmlinux 0xb81ad2b0	__serio_register_driver
+EXPORT_SYMBOL vmlinux 0xb8404599	end_buffer_async_write
+EXPORT_SYMBOL vmlinux 0xb84280b4	jbd2_journal_wipe
+EXPORT_SYMBOL vmlinux 0xb86e4ab9	random32
+EXPORT_SYMBOL vmlinux 0xb88f9f41	arp_xmit
+EXPORT_SYMBOL vmlinux 0xb89af9bf	srandom32
+EXPORT_SYMBOL vmlinux 0xb89b948c	drm_put_dev
+EXPORT_SYMBOL vmlinux 0xb8a60ad8	jbd2_journal_ack_err
+EXPORT_SYMBOL vmlinux 0xb8e86bf6	phy_enable_interrupts
+EXPORT_SYMBOL vmlinux 0xb8eff1e5	get_io_context
+EXPORT_SYMBOL vmlinux 0xb8f43772	devm_ioport_map
+EXPORT_SYMBOL vmlinux 0xb9132bf4	security_path_mkdir
+EXPORT_SYMBOL vmlinux 0xb93eca13	netpoll_print_options
+EXPORT_SYMBOL vmlinux 0xb96532cb	__blk_end_request_all
+EXPORT_SYMBOL vmlinux 0xb97126fd	tty_port_raise_dtr_rts
+EXPORT_SYMBOL vmlinux 0xb9718579	__skb_checksum_complete
+EXPORT_SYMBOL vmlinux 0xb97d4c9c	mutex_lock
+EXPORT_SYMBOL vmlinux 0xb98a0185	rtc_tm_to_time
+EXPORT_SYMBOL vmlinux 0xb9c04f78	prepare_creds
+EXPORT_SYMBOL vmlinux 0xb9cc9c90	pci_release_regions
+EXPORT_SYMBOL vmlinux 0xb9e1d498	sbus_set_sbus64
+EXPORT_SYMBOL vmlinux 0xba09b838	journal_start_commit
+EXPORT_SYMBOL vmlinux 0xba131e1c	bdev_stack_limits
+EXPORT_SYMBOL vmlinux 0xba14e32b	sk_stream_error
+EXPORT_SYMBOL vmlinux 0xba421228	__nla_put_nohdr
+EXPORT_SYMBOL vmlinux 0xba497f13	loops_per_jiffy
+EXPORT_SYMBOL vmlinux 0xba5de394	skb_make_writable
+EXPORT_SYMBOL vmlinux 0xba61c81a	end_buffer_write_sync
+EXPORT_SYMBOL vmlinux 0xba6ad57f	drm_debugfs_create_files
+EXPORT_SYMBOL vmlinux 0xba7692b9	drm_mode_create
+EXPORT_SYMBOL vmlinux 0xba8f8b68	completion_done
+EXPORT_SYMBOL vmlinux 0xba97df24	bh_uptodate_or_lock
+EXPORT_SYMBOL vmlinux 0xbaa2782a	kstrndup
+EXPORT_SYMBOL vmlinux 0xbaaab8ae	timespec_to_jiffies
+EXPORT_SYMBOL vmlinux 0xbaad7b0a	datagram_poll
+EXPORT_SYMBOL vmlinux 0xbad335dd	posix_unblock_lock
+EXPORT_SYMBOL vmlinux 0xbae1f9bb	pci_pme_capable
+EXPORT_SYMBOL vmlinux 0xbae35100	tty_port_hangup
+EXPORT_SYMBOL vmlinux 0xbaf7bb3c	netif_carrier_on
+EXPORT_SYMBOL vmlinux 0xbaf88db6	set_security_override_from_ctx
+EXPORT_SYMBOL vmlinux 0xbb167766	fb_var_to_videomode
+EXPORT_SYMBOL vmlinux 0xbb189cad	disallow_signal
+EXPORT_SYMBOL vmlinux 0xbb1fad6a	flush_delayed_work
+EXPORT_SYMBOL vmlinux 0xbb46890f	may_umount_tree
+EXPORT_SYMBOL vmlinux 0xbb551596	iov_iter_copy_from_user
+EXPORT_SYMBOL vmlinux 0xbb5d343d	xfrm_get_acqseq
+EXPORT_SYMBOL vmlinux 0xbb5e176f	__mark_inode_dirty
+EXPORT_SYMBOL vmlinux 0xbb6ad99f	find_vma
+EXPORT_SYMBOL vmlinux 0xbb7a86bf	sock_wake_async
+EXPORT_SYMBOL vmlinux 0xbb7c0915	ethtool_op_get_sg
+EXPORT_SYMBOL vmlinux 0xbb7fe2d4	vio_validate_sid
+EXPORT_SYMBOL vmlinux 0xbb95deee	__brelse
+EXPORT_SYMBOL vmlinux 0xbb99125c	get_default_font
+EXPORT_SYMBOL vmlinux 0xbb9a85aa	clear_page_dirty_for_io
+EXPORT_SYMBOL vmlinux 0xbbaf98cb	vfs_mknod
+EXPORT_SYMBOL vmlinux 0xbbbed060	dm_unregister_target
+EXPORT_SYMBOL vmlinux 0xbbdf9be8	jbd2_journal_destroy
+EXPORT_SYMBOL vmlinux 0xbbe4b8f6	of_device_register
+EXPORT_SYMBOL vmlinux 0xbbebd7f7	generic_make_request
+EXPORT_SYMBOL vmlinux 0xbc2a74de	kill_fasync
+EXPORT_SYMBOL vmlinux 0xbc4ce3ba	pci_set_mwi
+EXPORT_SYMBOL vmlinux 0xbc5492f7	xfrm_policy_alloc
+EXPORT_SYMBOL vmlinux 0xbc5c067f	blk_start_queue
+EXPORT_SYMBOL vmlinux 0xbca07ea9	init_special_inode
+EXPORT_SYMBOL vmlinux 0xbd6a38b4	tc_classify
+EXPORT_SYMBOL vmlinux 0xbda9df74	pci_scan_single_device
+EXPORT_SYMBOL vmlinux 0xbdc22161	napi_frags_skb
+EXPORT_SYMBOL vmlinux 0xbdc64101	in_dev_finish_destroy
+EXPORT_SYMBOL vmlinux 0xbdf5c25c	rb_next
+EXPORT_SYMBOL vmlinux 0xbe36a8eb	xfrm_policy_unregister_afinfo
+EXPORT_SYMBOL vmlinux 0xbe4d74b0	drm_framebuffer_cleanup
+EXPORT_SYMBOL vmlinux 0xbe9fdfe3	compat_tcp_setsockopt
+EXPORT_SYMBOL vmlinux 0xbecaede2	console_stop
+EXPORT_SYMBOL vmlinux 0xbee18f82	tty_port_tty_set
+EXPORT_SYMBOL vmlinux 0xbeeba782	lock_super
+EXPORT_SYMBOL vmlinux 0xbeee5d84	mark_page_accessed
+EXPORT_SYMBOL vmlinux 0xbef43296	console_conditional_schedule
+EXPORT_SYMBOL vmlinux 0xbef4a1a3	single_release
+EXPORT_SYMBOL vmlinux 0xbf1c6df1	dquot_reserve_space
+EXPORT_SYMBOL vmlinux 0xbf24853d	follow_pfn
+EXPORT_SYMBOL vmlinux 0xbf37c4fa	tty_hung_up_p
+EXPORT_SYMBOL vmlinux 0xbf4be8f9	uart_get_baud_rate
+EXPORT_SYMBOL vmlinux 0xbf52a79f	ps2_handle_response
+EXPORT_SYMBOL vmlinux 0xbf52c759	kill_litter_super
+EXPORT_SYMBOL vmlinux 0xbf792d32	of_phy_connect_fixed_link
+EXPORT_SYMBOL vmlinux 0xbf7fd2f5	schedule_timeout_killable
+EXPORT_SYMBOL vmlinux 0xbf993764	__memscan_zero
+EXPORT_SYMBOL vmlinux 0xbf9bcc8d	__cap_empty_set
+EXPORT_SYMBOL vmlinux 0xbf9ec3bd	drm_get_resource_start
+EXPORT_SYMBOL vmlinux 0xbfb5c50a	dma_set_mask
+EXPORT_SYMBOL vmlinux 0xbfcbfc41	otg_get_transceiver
+EXPORT_SYMBOL vmlinux 0xbfcfd462	netif_napi_add
+EXPORT_SYMBOL vmlinux 0xbfd7608c	drm_mode_validate_size
+EXPORT_SYMBOL vmlinux 0xbfe06909	unregister_binfmt
+EXPORT_SYMBOL vmlinux 0xbfe9485c	pci_choose_state
+EXPORT_SYMBOL vmlinux 0xbfee3ad5	loop_unregister_transfer
+EXPORT_SYMBOL vmlinux 0xbff589eb	nf_getsockopt
+EXPORT_SYMBOL vmlinux 0xbffe86fa	vfs_dq_quota_on_remount
+EXPORT_SYMBOL vmlinux 0xc003c637	__strncpy_from_user
+EXPORT_SYMBOL vmlinux 0xc0044724	blk_set_default_limits
+EXPORT_SYMBOL vmlinux 0xc02425a9	bio_integrity_enabled
+EXPORT_SYMBOL vmlinux 0xc043b7ae	scm_detach_fds
+EXPORT_SYMBOL vmlinux 0xc0580937	rb_erase
+EXPORT_SYMBOL vmlinux 0xc0638257	drm_exit
+EXPORT_SYMBOL vmlinux 0xc070d6a3	filp_open
+EXPORT_SYMBOL vmlinux 0xc09651d9	crc32_be
+EXPORT_SYMBOL vmlinux 0xc09ec30e	pcim_iounmap_regions
+EXPORT_SYMBOL vmlinux 0xc0a037f4	sock_get_timestamp
+EXPORT_SYMBOL vmlinux 0xc0a3d105	find_next_bit
+EXPORT_SYMBOL vmlinux 0xc0b0cb40	pci_bus_write_config_dword
+EXPORT_SYMBOL vmlinux 0xc0bb6206	vfs_readlink
+EXPORT_SYMBOL vmlinux 0xc0bf6ead	timecounter_cyc2time
+EXPORT_SYMBOL vmlinux 0xc0cb800a	sock_no_accept
+EXPORT_SYMBOL vmlinux 0xc0d815f5	up_write
+EXPORT_SYMBOL vmlinux 0xc0daebed	register_netdevice
+EXPORT_SYMBOL vmlinux 0xc0eaab0a	dm_get_mapinfo
+EXPORT_SYMBOL vmlinux 0xc1244cd6	set_user_nice
+EXPORT_SYMBOL vmlinux 0xc159c89e	alloc_file
+EXPORT_SYMBOL vmlinux 0xc15e073c	generic_find_next_zero_le_bit
+EXPORT_SYMBOL vmlinux 0xc15f8574	netlink_dump_start
+EXPORT_SYMBOL vmlinux 0xc180087f	tcp4_gro_complete
+EXPORT_SYMBOL vmlinux 0xc189e5d7	drm_i2c_encoder_destroy
+EXPORT_SYMBOL vmlinux 0xc18cae9c	dquot_initialize
+EXPORT_SYMBOL vmlinux 0xc1962c9e	wait_on_sync_kiocb
+EXPORT_SYMBOL vmlinux 0xc1b0e3ce	neigh_compat_output
+EXPORT_SYMBOL vmlinux 0xc1b998b4	udp_ioctl
+EXPORT_SYMBOL vmlinux 0xc1c280cd	__devm_request_region
+EXPORT_SYMBOL vmlinux 0xc1da14cb	inode_set_bytes
+EXPORT_SYMBOL vmlinux 0xc1e35e4b	of_dev_get
+EXPORT_SYMBOL vmlinux 0xc1e3d2c8	generic_file_open
+EXPORT_SYMBOL vmlinux 0xc1ee17ca	test_and_change_bit
+EXPORT_SYMBOL vmlinux 0xc20e4a16	tcp_recvmsg
+EXPORT_SYMBOL vmlinux 0xc2226cef	skb_queue_head
+EXPORT_SYMBOL vmlinux 0xc2256fe6	kern_path
+EXPORT_SYMBOL vmlinux 0xc22bdbe9	pci_match_id
+EXPORT_SYMBOL vmlinux 0xc23177bd	get_disk
+EXPORT_SYMBOL vmlinux 0xc23c6dc0	inet_dev_addr_type
+EXPORT_SYMBOL vmlinux 0xc25616a6	flock_lock_file_wait
+EXPORT_SYMBOL vmlinux 0xc256e762	__bitmap_equal
+EXPORT_SYMBOL vmlinux 0xc275a2e8	seq_read
+EXPORT_SYMBOL vmlinux 0xc29dd750	tcp_child_process
+EXPORT_SYMBOL vmlinux 0xc2a6dd58	tty_port_close_start
+EXPORT_SYMBOL vmlinux 0xc2ce915b	ip_xfrm_me_harder
+EXPORT_SYMBOL vmlinux 0xc2d49b34	drm_handle_vblank
+EXPORT_SYMBOL vmlinux 0xc2d96ca3	of_get_next_child
+EXPORT_SYMBOL vmlinux 0xc2e27ad7	of_console_device
+EXPORT_SYMBOL vmlinux 0xc2e587d1	reset_devices
+EXPORT_SYMBOL vmlinux 0xc2f1e129	tty_unthrottle
+EXPORT_SYMBOL vmlinux 0xc2f3e9c5	notify_change
+EXPORT_SYMBOL vmlinux 0xc2f4abbc	do_splice_from
+EXPORT_SYMBOL vmlinux 0xc31c9f55	register_key_type
+EXPORT_SYMBOL vmlinux 0xc3372624	vfs_quota_disable
+EXPORT_SYMBOL vmlinux 0xc36798dc	skb_copy_datagram_iovec
+EXPORT_SYMBOL vmlinux 0xc38765f1	napi_frags_finish
+EXPORT_SYMBOL vmlinux 0xc38c4ca2	PAGE_SHARED
+EXPORT_SYMBOL vmlinux 0xc3a45323	dev_trans_start
+EXPORT_SYMBOL vmlinux 0xc3c78a46	pci_enable_bridges
+EXPORT_SYMBOL vmlinux 0xc3e519ca	genl_register_family_with_ops
+EXPORT_SYMBOL vmlinux 0xc41338db	__register_binfmt
+EXPORT_SYMBOL vmlinux 0xc418cde4	invalidate_inodes
+EXPORT_SYMBOL vmlinux 0xc435e7bf	dev_mc_delete
+EXPORT_SYMBOL vmlinux 0xc446ac45	skb_add_rx_frag
+EXPORT_SYMBOL vmlinux 0xc45cf0ba	km_state_notify
+EXPORT_SYMBOL vmlinux 0xc499ae1e	kstrdup
+EXPORT_SYMBOL vmlinux 0xc4b0a27a	ethtool_op_set_sg
+EXPORT_SYMBOL vmlinux 0xc4ee4104	journal_load
+EXPORT_SYMBOL vmlinux 0xc50731e7	dev_getbyhwaddr
+EXPORT_SYMBOL vmlinux 0xc512b330	pci_bus_type
+EXPORT_SYMBOL vmlinux 0xc5196100	sock_no_sendpage
+EXPORT_SYMBOL vmlinux 0xc52f5714	fb_videomode_to_var
+EXPORT_SYMBOL vmlinux 0xc52fc117	nf_log_unregister
+EXPORT_SYMBOL vmlinux 0xc5303fb3	qdisc_create_dflt
+EXPORT_SYMBOL vmlinux 0xc55a78c6	pci_save_state
+EXPORT_SYMBOL vmlinux 0xc56108a8	pci_try_set_mwi
+EXPORT_SYMBOL vmlinux 0xc56bfa94	phy_device_free
+EXPORT_SYMBOL vmlinux 0xc56c4d7b	tty_shutdown
+EXPORT_SYMBOL vmlinux 0xc5984a56	inode_change_ok
+EXPORT_SYMBOL vmlinux 0xc59ab38c	vfs_mkdir
+EXPORT_SYMBOL vmlinux 0xc59ced32	register_gifconf
+EXPORT_SYMBOL vmlinux 0xc5b2556e	bfifo_qdisc_ops
+EXPORT_SYMBOL vmlinux 0xc5cbbdb8	mb_cache_entry_find_first
+EXPORT_SYMBOL vmlinux 0xc6184045	cpu_possible_mask
+EXPORT_SYMBOL vmlinux 0xc6198f33	dcache_dir_lseek
+EXPORT_SYMBOL vmlinux 0xc621b6cf	kmem_cache_alloc
+EXPORT_SYMBOL vmlinux 0xc62ff946	tcf_hash_search
+EXPORT_SYMBOL vmlinux 0xc6327b65	sun4v_chip_type
+EXPORT_SYMBOL vmlinux 0xc633d999	netdev_state_change
+EXPORT_SYMBOL vmlinux 0xc644679d	mb_cache_entry_free
+EXPORT_SYMBOL vmlinux 0xc64a7e77	create_proc_entry
+EXPORT_SYMBOL vmlinux 0xc663a948	jbd2_journal_set_features
+EXPORT_SYMBOL vmlinux 0xc68417f8	blk_queue_dma_pad
+EXPORT_SYMBOL vmlinux 0xc6b0bcfa	inet_frags_init
+EXPORT_SYMBOL vmlinux 0xc6b8a3a3	d_rehash
+EXPORT_SYMBOL vmlinux 0xc6d91b37	insert_inode_locked
+EXPORT_SYMBOL vmlinux 0xc6e0e167	clocksource_change_rating
+EXPORT_SYMBOL vmlinux 0xc716cadb	pcim_pin_device
+EXPORT_SYMBOL vmlinux 0xc722227e	posix_acl_clone
+EXPORT_SYMBOL vmlinux 0xc732124f	usb_gadget_unregister_driver
+EXPORT_SYMBOL vmlinux 0xc737c2aa	find_or_create_page
+EXPORT_SYMBOL vmlinux 0xc74044e0	jbd2_journal_load
+EXPORT_SYMBOL vmlinux 0xc740c64a	memchr
+EXPORT_SYMBOL vmlinux 0xc77bc5d8	pci_request_region_exclusive
+EXPORT_SYMBOL vmlinux 0xc79bcd36	dm_vcalloc
+EXPORT_SYMBOL vmlinux 0xc7a24d76	sysfs_format_mac
+EXPORT_SYMBOL vmlinux 0xc7a4fbed	rtnl_lock
+EXPORT_SYMBOL vmlinux 0xc7b0f214	idr_remove_all
+EXPORT_SYMBOL vmlinux 0xc7b595f2	atomic64_add
+EXPORT_SYMBOL vmlinux 0xc7ec28b0	memcmp
+EXPORT_SYMBOL vmlinux 0xc8053b23	put_page
+EXPORT_SYMBOL vmlinux 0xc8066055	dm_table_get
+EXPORT_SYMBOL vmlinux 0xc81c5c45	path_get
+EXPORT_SYMBOL vmlinux 0xc8238882	bd_claim
+EXPORT_SYMBOL vmlinux 0xc83abe95	pci_enable_device_mem
+EXPORT_SYMBOL vmlinux 0xc85775d0	simple_dir_inode_operations
+EXPORT_SYMBOL vmlinux 0xc85d31e0	inet_add_protocol
+EXPORT_SYMBOL vmlinux 0xc88d945d	simple_fill_super
+EXPORT_SYMBOL vmlinux 0xc8b57c27	autoremove_wake_function
+EXPORT_SYMBOL vmlinux 0xc8daa269	drm_compat_ioctl
+EXPORT_SYMBOL vmlinux 0xc8e075dd	textsearch_unregister
+EXPORT_SYMBOL vmlinux 0xc9061fc3	elv_add_request
+EXPORT_SYMBOL vmlinux 0xc907c28e	input_open_device
+EXPORT_SYMBOL vmlinux 0xc909a79b	dev_set_promiscuity
+EXPORT_SYMBOL vmlinux 0xc90c3090	udp_proc_register
+EXPORT_SYMBOL vmlinux 0xc9242666	mod_timer
+EXPORT_SYMBOL vmlinux 0xc95617aa	idr_find
+EXPORT_SYMBOL vmlinux 0xc971257e	vfs_path_lookup
+EXPORT_SYMBOL vmlinux 0xc9908d36	blkdev_put
+EXPORT_SYMBOL vmlinux 0xc998d641	icmp_err_convert
+EXPORT_SYMBOL vmlinux 0xc9a1ab83	drop_super
+EXPORT_SYMBOL vmlinux 0xc9b17d8d	dev_remove_pack
+EXPORT_SYMBOL vmlinux 0xc9bd273b	skb_copy_expand
+EXPORT_SYMBOL vmlinux 0xc9bf822b	journal_get_create_access
+EXPORT_SYMBOL vmlinux 0xc9c36120	pci_remove_behind_bridge
+EXPORT_SYMBOL vmlinux 0xc9cec07b	of_find_node_by_phandle
+EXPORT_SYMBOL vmlinux 0xc9d35fb4	drm_get_drawable_info
+EXPORT_SYMBOL vmlinux 0xc9ecb2f3	mdiobus_read
+EXPORT_SYMBOL vmlinux 0xc9faaecf	drm_do_probe_ddc_edid
+EXPORT_SYMBOL vmlinux 0xc9fd40ef	blk_integrity_register
+EXPORT_SYMBOL vmlinux 0xca177523	dev_getfirstbyhwtype
+EXPORT_SYMBOL vmlinux 0xca348a64	follow_down
+EXPORT_SYMBOL vmlinux 0xca409ead	set_groups
+EXPORT_SYMBOL vmlinux 0xca53908a	drm_connector_cleanup
+EXPORT_SYMBOL vmlinux 0xca63c5c5	drm_mode_validate_clocks
+EXPORT_SYMBOL vmlinux 0xca64d783	tcf_destroy_chain
+EXPORT_SYMBOL vmlinux 0xca947c60	ida_destroy
+EXPORT_SYMBOL vmlinux 0xca995c3b	drm_sysfs_connector_remove
+EXPORT_SYMBOL vmlinux 0xca9e9830	__task_pid_nr_ns
+EXPORT_SYMBOL vmlinux 0xca9f9dab	block_is_partially_uptodate
+EXPORT_SYMBOL vmlinux 0xcad0e819	__xfrm_policy_check
+EXPORT_SYMBOL vmlinux 0xcad0e881	blk_init_tags
+EXPORT_SYMBOL vmlinux 0xcae99f2b	unregister_filesystem
+EXPORT_SYMBOL vmlinux 0xcaf37528	backlight_device_register
+EXPORT_SYMBOL vmlinux 0xcb0e311c	tcp_v4_md5_do_del
+EXPORT_SYMBOL vmlinux 0xcb3f1356	d_delete
+EXPORT_SYMBOL vmlinux 0xcb4540f4	jbd2_journal_flush
+EXPORT_SYMBOL vmlinux 0xcb51af40	truncate_inode_pages
+EXPORT_SYMBOL vmlinux 0xcb64b53b	fsync_bdev
+EXPORT_SYMBOL vmlinux 0xcb64e8fe	__free_pages
+EXPORT_SYMBOL vmlinux 0xcb6b55ae	drm_init
+EXPORT_SYMBOL vmlinux 0xcb6beb40	hweight32
+EXPORT_SYMBOL vmlinux 0xcb7131fb	fb_get_options
+EXPORT_SYMBOL vmlinux 0xcbb9d7db	groups_free
+EXPORT_SYMBOL vmlinux 0xcbc29f4e	gen_new_estimator
+EXPORT_SYMBOL vmlinux 0xcbd6619e	get_user_pages
+EXPORT_SYMBOL vmlinux 0xcbef845a	dput
+EXPORT_SYMBOL vmlinux 0xcbf183cf	tcp4_gro_receive
+EXPORT_SYMBOL vmlinux 0xcbfe6008	cap_netlink_recv
+EXPORT_SYMBOL vmlinux 0xcc07af75	strnlen
+EXPORT_SYMBOL vmlinux 0xcc1f152a	tcp_prot
+EXPORT_SYMBOL vmlinux 0xcc23eeb8	jbd2_journal_update_format
+EXPORT_SYMBOL vmlinux 0xcc328cb9	skb_recv_datagram
+EXPORT_SYMBOL vmlinux 0xcc36f32e	fb_unregister_client
+EXPORT_SYMBOL vmlinux 0xcc390dc0	ps2_end_command
+EXPORT_SYMBOL vmlinux 0xcc5005fe	msleep_interruptible
+EXPORT_SYMBOL vmlinux 0xcc5ee3af	try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0xcc698ca0	seq_release_private
+EXPORT_SYMBOL vmlinux 0xcc7fa952	local_bh_enable_ip
+EXPORT_SYMBOL vmlinux 0xcca572ab	tty_std_termios
+EXPORT_SYMBOL vmlinux 0xccae85a0	register_quota_format
+EXPORT_SYMBOL vmlinux 0xccb042d8	framebuffer_alloc
+EXPORT_SYMBOL vmlinux 0xccd72c53	xfrm_user_policy
+EXPORT_SYMBOL vmlinux 0xcce09e76	i2c_register_driver
+EXPORT_SYMBOL vmlinux 0xcce813f7	__up_write
+EXPORT_SYMBOL vmlinux 0xcceb2b6a	skb_store_bits
+EXPORT_SYMBOL vmlinux 0xcd16e0ae	phy_connect
+EXPORT_SYMBOL vmlinux 0xcd174b28	security_inode_getsecctx
+EXPORT_SYMBOL vmlinux 0xcd2da75f	netdev_bonding_change
+EXPORT_SYMBOL vmlinux 0xcd3181df	thaw_process
+EXPORT_SYMBOL vmlinux 0xcd385c88	mapping_tagged
+EXPORT_SYMBOL vmlinux 0xcd5feb91	ip_getsockopt
+EXPORT_SYMBOL vmlinux 0xcd86ee88	override_creds
+EXPORT_SYMBOL vmlinux 0xcd98bd7e	unregister_key_type
+EXPORT_SYMBOL vmlinux 0xcdbcda53	__down_write
+EXPORT_SYMBOL vmlinux 0xcdd240d1	pci_vpd_truncate
+EXPORT_SYMBOL vmlinux 0xcdee7b12	serio_unregister_port
+EXPORT_SYMBOL vmlinux 0xcdf2eff4	drm_mode_height
+EXPORT_SYMBOL vmlinux 0xcdfb693c	inet_bind
+EXPORT_SYMBOL vmlinux 0xce288328	pci_release_selected_regions
+EXPORT_SYMBOL vmlinux 0xce30bcd0	sock_no_setsockopt
+EXPORT_SYMBOL vmlinux 0xce36ded6	sysctl_tcp_mem
+EXPORT_SYMBOL vmlinux 0xce3b41f4	sock_common_recvmsg
+EXPORT_SYMBOL vmlinux 0xce5ac24f	zlib_inflate_workspacesize
+EXPORT_SYMBOL vmlinux 0xce63527c	filemap_fdatawait_range
+EXPORT_SYMBOL vmlinux 0xceafaf20	netif_notify_peers
+EXPORT_SYMBOL vmlinux 0xcece0ab6	km_policy_expired
+EXPORT_SYMBOL vmlinux 0xced93e0d	idr_destroy
+EXPORT_SYMBOL vmlinux 0xcee99880	flush_old_exec
+EXPORT_SYMBOL vmlinux 0xcf370779	mpage_readpages
+EXPORT_SYMBOL vmlinux 0xcf40a85e	alloc_disk
+EXPORT_SYMBOL vmlinux 0xcf6a4905	dm_table_event
+EXPORT_SYMBOL vmlinux 0xcf905b7a	simple_rmdir
+EXPORT_SYMBOL vmlinux 0xcfd99463	con_copy_unimap
+EXPORT_SYMBOL vmlinux 0xcfe13710	sparc64_get_clock_tick
+EXPORT_SYMBOL vmlinux 0xcfe9d724	tcp_rcv_established
+EXPORT_SYMBOL vmlinux 0xcff53400	kref_put
+EXPORT_SYMBOL vmlinux 0xd0181f4f	__bitmap_xor
+EXPORT_SYMBOL vmlinux 0xd039ab9f	drm_framebuffer_init
+EXPORT_SYMBOL vmlinux 0xd04dee3f	drm_mode_destroy
+EXPORT_SYMBOL vmlinux 0xd04e731e	per_cpu__kstat
+EXPORT_SYMBOL vmlinux 0xd06d8377	lro_vlan_hwaccel_receive_skb
+EXPORT_SYMBOL vmlinux 0xd08fa3f0	drm_mode_set_crtcinfo
+EXPORT_SYMBOL vmlinux 0xd0aa03b8	compat_mc_setsockopt
+EXPORT_SYMBOL vmlinux 0xd0b38948	ip_mc_join_group
+EXPORT_SYMBOL vmlinux 0xd0be1a2e	__memset
+EXPORT_SYMBOL vmlinux 0xd0c91d10	qdisc_warn_nonwc
+EXPORT_SYMBOL vmlinux 0xd0d2a9d9	dcache_dir_close
+EXPORT_SYMBOL vmlinux 0xd0ee38b8	schedule_timeout_uninterruptible
+EXPORT_SYMBOL vmlinux 0xd0fa4b47	writeback_inodes_sb
+EXPORT_SYMBOL vmlinux 0xd11a73c9	ebus_dma_register
+EXPORT_SYMBOL vmlinux 0xd1215038	dev_get_by_flags
+EXPORT_SYMBOL vmlinux 0xd123add6	of_mdiobus_register
+EXPORT_SYMBOL vmlinux 0xd1312d36	nf_register_queue_handler
+EXPORT_SYMBOL vmlinux 0xd160b9c8	inode_sub_rsv_space
+EXPORT_SYMBOL vmlinux 0xd18c4465	i8042_check_port_owner
+EXPORT_SYMBOL vmlinux 0xd19231e9	file_update_time
+EXPORT_SYMBOL vmlinux 0xd1d7fd65	skb_append
+EXPORT_SYMBOL vmlinux 0xd240a67d	drm_encoder_init
+EXPORT_SYMBOL vmlinux 0xd2434d36	tcp_v4_md5_hash_skb
+EXPORT_SYMBOL vmlinux 0xd24e4290	dev_unicast_sync
+EXPORT_SYMBOL vmlinux 0xd251d7b0	security_socket_getpeersec_dgram
+EXPORT_SYMBOL vmlinux 0xd2555f19	jiffies_64_to_clock_t
+EXPORT_SYMBOL vmlinux 0xd25d4f74	console_blank_hook
+EXPORT_SYMBOL vmlinux 0xd260b816	kobject_put
+EXPORT_SYMBOL vmlinux 0xd26af9eb	fib_default_rule_add
+EXPORT_SYMBOL vmlinux 0xd2800752	ethtool_op_get_link
+EXPORT_SYMBOL vmlinux 0xd2901675	security_path_truncate
+EXPORT_SYMBOL vmlinux 0xd2965f6f	kthread_should_stop
+EXPORT_SYMBOL vmlinux 0xd29757d7	tcf_em_register
+EXPORT_SYMBOL vmlinux 0xd29b5ab5	vio_ldc_free
+EXPORT_SYMBOL vmlinux 0xd2ac4197	netlink_ack
+EXPORT_SYMBOL vmlinux 0xd2e86662	inet_csk_clear_xmit_timers
+EXPORT_SYMBOL vmlinux 0xd30063b7	ps2_handle_ack
+EXPORT_SYMBOL vmlinux 0xd3028e75	drm_sman_set_manager
+EXPORT_SYMBOL vmlinux 0xd306a875	journal_ack_err
+EXPORT_SYMBOL vmlinux 0xd3427f73	mempool_create_node
+EXPORT_SYMBOL vmlinux 0xd351c540	blk_end_request_cur
+EXPORT_SYMBOL vmlinux 0xd3527fdd	serio_open
+EXPORT_SYMBOL vmlinux 0xd37dc9d6	cfb_imageblit
+EXPORT_SYMBOL vmlinux 0xd3859422	dst_release
+EXPORT_SYMBOL vmlinux 0xd3af979c	memdup_user
+EXPORT_SYMBOL vmlinux 0xd3b5760a	page_readlink
+EXPORT_SYMBOL vmlinux 0xd3d0d1c1	tcf_exts_dump
+EXPORT_SYMBOL vmlinux 0xd3eeaed6	iw_handler_set_thrspy
+EXPORT_SYMBOL vmlinux 0xd3f2a994	drm_mm_pre_get
+EXPORT_SYMBOL vmlinux 0xd3ffab51	drm_ht_remove
+EXPORT_SYMBOL vmlinux 0xd42066f1	sock_map_fd
+EXPORT_SYMBOL vmlinux 0xd4941d23	serio_close
+EXPORT_SYMBOL vmlinux 0xd49f1ef6	test_and_clear_bit
+EXPORT_SYMBOL vmlinux 0xd4def3d9	skb_copy
+EXPORT_SYMBOL vmlinux 0xd4f5d2ac	tty_port_close_end
+EXPORT_SYMBOL vmlinux 0xd50009f2	lock_fb_info
+EXPORT_SYMBOL vmlinux 0xd507d0b1	kick_iocb
+EXPORT_SYMBOL vmlinux 0xd5263820	mb_cache_destroy
+EXPORT_SYMBOL vmlinux 0xd56ba0a0	sun4v_hvapi_register
+EXPORT_SYMBOL vmlinux 0xd57f2add	drm_connector_attach_property
+EXPORT_SYMBOL vmlinux 0xd57f8789	iommu_num_pages
+EXPORT_SYMBOL vmlinux 0xd5abd02b	pci_request_selected_regions_exclusive
+EXPORT_SYMBOL vmlinux 0xd5ad1253	open_by_devnum
+EXPORT_SYMBOL vmlinux 0xd5aeb786	vfs_llseek
+EXPORT_SYMBOL vmlinux 0xd5c7c61d	sysctl_string
+EXPORT_SYMBOL vmlinux 0xd5e9098e	revert_creds
+EXPORT_SYMBOL vmlinux 0xd5edb215	skb_dma_unmap
+EXPORT_SYMBOL vmlinux 0xd607cfb1	simple_getattr
+EXPORT_SYMBOL vmlinux 0xd62c833f	schedule_timeout
+EXPORT_SYMBOL vmlinux 0xd63296b2	blk_alloc_queue
+EXPORT_SYMBOL vmlinux 0xd63d6819	drm_core_get_map_ofs
+EXPORT_SYMBOL vmlinux 0xd63dc71e	vlan_dev_real_dev
+EXPORT_SYMBOL vmlinux 0xd65a482a	ps2_begin_command
+EXPORT_SYMBOL vmlinux 0xd66079cd	of_get_property
+EXPORT_SYMBOL vmlinux 0xd673c3ed	tty_unregister_device
+EXPORT_SYMBOL vmlinux 0xd69532ef	ebus_dma_request
+EXPORT_SYMBOL vmlinux 0xd6a78d08	smp_call_function_single
+EXPORT_SYMBOL vmlinux 0xd6a9bce7	generic_cont_expand_simple
+EXPORT_SYMBOL vmlinux 0xd6d68c6b	vm_stat
+EXPORT_SYMBOL vmlinux 0xd6ee688f	vmalloc
+EXPORT_SYMBOL vmlinux 0xd6f0f559	idprom
+EXPORT_SYMBOL vmlinux 0xd6ffd975	neigh_ifdown
+EXPORT_SYMBOL vmlinux 0xd7021072	jbd2_journal_begin_ordered_truncate
+EXPORT_SYMBOL vmlinux 0xd7278188	tcf_generic_walker
+EXPORT_SYMBOL vmlinux 0xd749e4dd	writeback_inodes_sb_if_idle
+EXPORT_SYMBOL vmlinux 0xd7533bb1	devcgroup_inode_permission
+EXPORT_SYMBOL vmlinux 0xd7588f8f	vfs_follow_link
+EXPORT_SYMBOL vmlinux 0xd7687369	pci_bus_read_config_dword
+EXPORT_SYMBOL vmlinux 0xd779a3f3	inet_dgram_connect
+EXPORT_SYMBOL vmlinux 0xd77a5aa5	__bitmap_and
+EXPORT_SYMBOL vmlinux 0xd79b5a02	allow_signal
+EXPORT_SYMBOL vmlinux 0xd7b014f0	blk_rq_count_integrity_sg
+EXPORT_SYMBOL vmlinux 0xd83791bc	nf_conntrack_destroy
+EXPORT_SYMBOL vmlinux 0xd8959f23	auxio_set_led
+EXPORT_SYMBOL vmlinux 0xd89da37f	movable_zone
+EXPORT_SYMBOL vmlinux 0xd8cff4bb	posix_lock_file
+EXPORT_SYMBOL vmlinux 0xd8e484f0	register_chrdev_region
+EXPORT_SYMBOL vmlinux 0xd8e70d61	blkdev_get
+EXPORT_SYMBOL vmlinux 0xd8e87f4b	simple_readpage
+EXPORT_SYMBOL vmlinux 0xd8fff16f	inode_claim_rsv_space
+EXPORT_SYMBOL vmlinux 0xd9242ea3	block_write_full_page_endio
+EXPORT_SYMBOL vmlinux 0xd92a08e1	vfs_statfs
+EXPORT_SYMBOL vmlinux 0xd93adec9	mpage_writepages
+EXPORT_SYMBOL vmlinux 0xd9662556	vmtruncate
+EXPORT_SYMBOL vmlinux 0xd9727ff3	elv_dispatch_add_tail
+EXPORT_SYMBOL vmlinux 0xd985dc99	mempool_free_pages
+EXPORT_SYMBOL vmlinux 0xd9db2de0	blk_queue_softirq_done
+EXPORT_SYMBOL vmlinux 0xda0fb661	__neigh_for_each_release
+EXPORT_SYMBOL vmlinux 0xda1a7335	kasprintf
+EXPORT_SYMBOL vmlinux 0xda224917	phy_start
+EXPORT_SYMBOL vmlinux 0xda3cb8b1	tcf_hash_destroy
+EXPORT_SYMBOL vmlinux 0xda3d2c3c	prom_feval
+EXPORT_SYMBOL vmlinux 0xda4629e4	radix_tree_insert
+EXPORT_SYMBOL vmlinux 0xda7ca6cb	fb_mode_is_equal
+EXPORT_SYMBOL vmlinux 0xda864409	pci_dma_supported
+EXPORT_SYMBOL vmlinux 0xda8af7ad	fb_find_nearest_mode
+EXPORT_SYMBOL vmlinux 0xda8b5096	xfrm_cfg_mutex
+EXPORT_SYMBOL vmlinux 0xda90890a	tcp_hashinfo
+EXPORT_SYMBOL vmlinux 0xda9c2ed8	xfrm4_rcv
+EXPORT_SYMBOL vmlinux 0xdad2bdae	fasync_helper
+EXPORT_SYMBOL vmlinux 0xdb2c795a	vc_cons
+EXPORT_SYMBOL vmlinux 0xdb64fdef	proc_symlink
+EXPORT_SYMBOL vmlinux 0xdb7f62c8	drm_mm_get_block_generic
+EXPORT_SYMBOL vmlinux 0xdb8942a5	vfs_readdir
+EXPORT_SYMBOL vmlinux 0xdb9f7552	phy_stop
+EXPORT_SYMBOL vmlinux 0xdb9fa31f	qdisc_reset
+EXPORT_SYMBOL vmlinux 0xdbb22587	nf_ct_attach
+EXPORT_SYMBOL vmlinux 0xdbcd416e	sysctl_ip_nonlocal_bind
+EXPORT_SYMBOL vmlinux 0xdc053205	udp_memory_allocated
+EXPORT_SYMBOL vmlinux 0xdc122592	rtnl_set_sk_err
+EXPORT_SYMBOL vmlinux 0xdc1341b1	mdesc_arc_target
+EXPORT_SYMBOL vmlinux 0xdc14eda7	pci_pci_problems
+EXPORT_SYMBOL vmlinux 0xdc2adb35	add_taint
+EXPORT_SYMBOL vmlinux 0xdc312587	pci_remove_bus_device
+EXPORT_SYMBOL vmlinux 0xdc43a9c8	daemonize
+EXPORT_SYMBOL vmlinux 0xdc64444a	dev_set_drvdata
+EXPORT_SYMBOL vmlinux 0xdc9ccfb8	inode_add_bytes
+EXPORT_SYMBOL vmlinux 0xdca0e950	genl_register_family
+EXPORT_SYMBOL vmlinux 0xdcb0349b	sys_close
+EXPORT_SYMBOL vmlinux 0xdcb5671d	strlen
+EXPORT_SYMBOL vmlinux 0xdcca9c7b	drm_vblank_put
+EXPORT_SYMBOL vmlinux 0xdccbbd08	pci_iomap
+EXPORT_SYMBOL vmlinux 0xdcd92a41	get_empty_filp
+EXPORT_SYMBOL vmlinux 0xdcf927b4	xfrm_stateonly_find
+EXPORT_SYMBOL vmlinux 0xdcfedfd4	commit_creds
+EXPORT_SYMBOL vmlinux 0xdd05f686	of_unregister_driver
+EXPORT_SYMBOL vmlinux 0xdd065e63	mb_cache_entry_find_next
+EXPORT_SYMBOL vmlinux 0xdd1197c8	xor_vis_3
+EXPORT_SYMBOL vmlinux 0xdd295b30	fifo_create_dflt
+EXPORT_SYMBOL vmlinux 0xdd338171	sunserial_register_minors
+EXPORT_SYMBOL vmlinux 0xdd3febe2	drm_gem_object_free
+EXPORT_SYMBOL vmlinux 0xdd49095c	drm_ht_insert_item
+EXPORT_SYMBOL vmlinux 0xdd9b975d	tcp_ioctl
+EXPORT_SYMBOL vmlinux 0xdda89a19	__nla_put
+EXPORT_SYMBOL vmlinux 0xdda8b31b	jbd2_journal_release_buffer
+EXPORT_SYMBOL vmlinux 0xddb88eea	ldc_state
+EXPORT_SYMBOL vmlinux 0xddd1ee8b	ldc_bind
+EXPORT_SYMBOL vmlinux 0xddd39d4f	dm_put_device
+EXPORT_SYMBOL vmlinux 0xddf3d6ab	nla_reserve
+EXPORT_SYMBOL vmlinux 0xde104cc5	setup_new_exec
+EXPORT_SYMBOL vmlinux 0xde31b902	blk_limits_io_opt
+EXPORT_SYMBOL vmlinux 0xde3c68a6	cpu_online_mask
+EXPORT_SYMBOL vmlinux 0xde4e0d2d	of_device_is_compatible
+EXPORT_SYMBOL vmlinux 0xde589e60	xor_vis_2
+EXPORT_SYMBOL vmlinux 0xde6ed984	ps2_cmd_aborted
+EXPORT_SYMBOL vmlinux 0xde7502a8	PAGE_KERNEL
+EXPORT_SYMBOL vmlinux 0xde75b689	set_irq_type
+EXPORT_SYMBOL vmlinux 0xde9360ba	totalram_pages
+EXPORT_SYMBOL vmlinux 0xdeba61f4	pci_set_dma_max_seg_size
+EXPORT_SYMBOL vmlinux 0xdec5294f	dcache_dir_open
+EXPORT_SYMBOL vmlinux 0xdec7def6	remove_arg_zero
+EXPORT_SYMBOL vmlinux 0xdedbabef	generic_writepages
+EXPORT_SYMBOL vmlinux 0xdef4ea11	io_remap_pfn_range
+EXPORT_SYMBOL vmlinux 0xdf0f89ac	tty_wait_until_sent
+EXPORT_SYMBOL vmlinux 0xdf16efc2	vfsmount_lock
+EXPORT_SYMBOL vmlinux 0xdf30a62d	register_sysctl_paths
+EXPORT_SYMBOL vmlinux 0xdf38c087	napi_get_frags
+EXPORT_SYMBOL vmlinux 0xdf59115e	posix_test_lock
+EXPORT_SYMBOL vmlinux 0xdf60cc27	__print_symbol
+EXPORT_SYMBOL vmlinux 0xdf6e5ef7	tcp_read_sock
+EXPORT_SYMBOL vmlinux 0xdf8fef53	prom_getproplen
+EXPORT_SYMBOL vmlinux 0xdf929370	fs_overflowgid
+EXPORT_SYMBOL vmlinux 0xdf96fe91	block_fsync
+EXPORT_SYMBOL vmlinux 0xdfb8f21f	blk_queue_max_hw_sectors
+EXPORT_SYMBOL vmlinux 0xdfd7c8c8	jbd2_journal_file_inode
+EXPORT_SYMBOL vmlinux 0xdff23018	kmem_cache_name
+EXPORT_SYMBOL vmlinux 0xdff85fb5	phy_detach
+EXPORT_SYMBOL vmlinux 0xe075d6eb	iter_div_u64_rem
+EXPORT_SYMBOL vmlinux 0xe08ef106	drm_idlelock_release
+EXPORT_SYMBOL vmlinux 0xe0aa174c	request_key_with_auxdata
+EXPORT_SYMBOL vmlinux 0xe0b13336	argv_free
+EXPORT_SYMBOL vmlinux 0xe0bc24a1	param_set_ushort
+EXPORT_SYMBOL vmlinux 0xe0c9ecc6	d_find_alias
+EXPORT_SYMBOL vmlinux 0xe0db4433	compat_nf_getsockopt
+EXPORT_SYMBOL vmlinux 0xe0e6aaac	pci_target_state
+EXPORT_SYMBOL vmlinux 0xe1070691	inode_init_once
+EXPORT_SYMBOL vmlinux 0xe113bbbc	csum_partial
+EXPORT_SYMBOL vmlinux 0xe11ff8df	lock_may_write
+EXPORT_SYMBOL vmlinux 0xe12b6985	blk_end_request
+EXPORT_SYMBOL vmlinux 0xe1457735	drm_ht_remove_item
+EXPORT_SYMBOL vmlinux 0xe16f3f7d	neigh_for_each
+EXPORT_SYMBOL vmlinux 0xe1739712	pci_unmap_single
+EXPORT_SYMBOL vmlinux 0xe175bd3a	ebus_dma_residue
+EXPORT_SYMBOL vmlinux 0xe1761617	security_inet_conn_request
+EXPORT_SYMBOL vmlinux 0xe17a58e0	kmem_cache_shrink
+EXPORT_SYMBOL vmlinux 0xe1838f84	skb_dequeue
+EXPORT_SYMBOL vmlinux 0xe1cc4610	inet_stream_connect
+EXPORT_SYMBOL vmlinux 0xe1dd3055	inet_unregister_protosw
+EXPORT_SYMBOL vmlinux 0xe2254ae0	filemap_write_and_wait_range
+EXPORT_SYMBOL vmlinux 0xe22b5f7b	filemap_fdatawrite_range
+EXPORT_SYMBOL vmlinux 0xe2304303	mac_map_monitor_sense
+EXPORT_SYMBOL vmlinux 0xe23ae481	blk_iopoll_complete
+EXPORT_SYMBOL vmlinux 0xe24050c7	scnprintf
+EXPORT_SYMBOL vmlinux 0xe24a7b88	drm_ht_find_item
+EXPORT_SYMBOL vmlinux 0xe24d3a97	jiffies_64
+EXPORT_SYMBOL vmlinux 0xe26a576c	vlan_gro_receive
+EXPORT_SYMBOL vmlinux 0xe2a54730	inet_csk_delete_keepalive_timer
+EXPORT_SYMBOL vmlinux 0xe2bc4bb7	vfs_symlink
+EXPORT_SYMBOL vmlinux 0xe2bd9889	jbd2_journal_forget
+EXPORT_SYMBOL vmlinux 0xe2c5a749	atomic64_sub_ret
+EXPORT_SYMBOL vmlinux 0xe2cc1eb9	mnt_pin
+EXPORT_SYMBOL vmlinux 0xe2d5255a	strcmp
+EXPORT_SYMBOL vmlinux 0xe2e1b441	security_d_instantiate
+EXPORT_SYMBOL vmlinux 0xe2f128b6	key_unlink
+EXPORT_SYMBOL vmlinux 0xe32cf598	find_get_pages_tag
+EXPORT_SYMBOL vmlinux 0xe33d88e3	current_fs_time
+EXPORT_SYMBOL vmlinux 0xe342b539	xrlim_allow
+EXPORT_SYMBOL vmlinux 0xe364ce21	sock_rfree
+EXPORT_SYMBOL vmlinux 0xe3883a4e	end_page_writeback
+EXPORT_SYMBOL vmlinux 0xe3a3c86c	unregister_con_driver
+EXPORT_SYMBOL vmlinux 0xe3b0192b	vscnprintf
+EXPORT_SYMBOL vmlinux 0xe40cdc48	phy_ethtool_sset
+EXPORT_SYMBOL vmlinux 0xe41f7579	mb_cache_entry_get
+EXPORT_SYMBOL vmlinux 0xe4396aaf	sock_no_getname
+EXPORT_SYMBOL vmlinux 0xe44a05ba	ip_defrag
+EXPORT_SYMBOL vmlinux 0xe45332a9	netlink_kernel_create
+EXPORT_SYMBOL vmlinux 0xe46ae855	elv_dispatch_sort
+EXPORT_SYMBOL vmlinux 0xe4908825	page_symlink_inode_operations
+EXPORT_SYMBOL vmlinux 0xe4f1695e	cookie_check_timestamp
+EXPORT_SYMBOL vmlinux 0xe4fd0c0e	directly_mappable_cdev_bdi
+EXPORT_SYMBOL vmlinux 0xe51b81bd	pci_prepare_to_sleep
+EXPORT_SYMBOL vmlinux 0xe523ad75	synchronize_irq
+EXPORT_SYMBOL vmlinux 0xe531a959	pci_bus_write_config_byte
+EXPORT_SYMBOL vmlinux 0xe5648109	deactivate_super
+EXPORT_SYMBOL vmlinux 0xe56ee495	filemap_fdatawrite
+EXPORT_SYMBOL vmlinux 0xe57878a1	in6_pton
+EXPORT_SYMBOL vmlinux 0xe578afb5	user_revoke
+EXPORT_SYMBOL vmlinux 0xe5867808	dlci_ioctl_set
+EXPORT_SYMBOL vmlinux 0xe5bdce7e	drm_mode_debug_printmodeline
+EXPORT_SYMBOL vmlinux 0xe5bf54ad	inet_twsk_deschedule
+EXPORT_SYMBOL vmlinux 0xe5c0213d	mdiobus_scan
+EXPORT_SYMBOL vmlinux 0xe5c78a99	do_blank_screen
+EXPORT_SYMBOL vmlinux 0xe5dfe514	of_find_node_by_name
+EXPORT_SYMBOL vmlinux 0xe5ea06a7	jbd2_journal_clear_err
+EXPORT_SYMBOL vmlinux 0xe5ebf965	bdget
+EXPORT_SYMBOL vmlinux 0xe5ed5467	xfrm_policy_walk_init
+EXPORT_SYMBOL vmlinux 0xe616b25a	call_usermodehelper_pipe
+EXPORT_SYMBOL vmlinux 0xe621fba5	iunique
+EXPORT_SYMBOL vmlinux 0xe62f26c6	tcf_action_exec
+EXPORT_SYMBOL vmlinux 0xe640cd68	xfrm_policy_byid
+EXPORT_SYMBOL vmlinux 0xe6512544	seq_printf
+EXPORT_SYMBOL vmlinux 0xe6562614	udplite_table
+EXPORT_SYMBOL vmlinux 0xe697d108	__blk_iopoll_complete
+EXPORT_SYMBOL vmlinux 0xe698d586	blk_alloc_queue_node
+EXPORT_SYMBOL vmlinux 0xe6a15eda	of_register_driver
+EXPORT_SYMBOL vmlinux 0xe6e9ab57	ip_fragment
+EXPORT_SYMBOL vmlinux 0xe6f4a9bc	dev_set_mac_address
+EXPORT_SYMBOL vmlinux 0xe6fbe430	can_do_mlock
+EXPORT_SYMBOL vmlinux 0xe6fdd3f9	kill_pid
+EXPORT_SYMBOL vmlinux 0xe714375c	__tasklet_hi_schedule_first
+EXPORT_SYMBOL vmlinux 0xe7293fd0	bio_copy_kern
+EXPORT_SYMBOL vmlinux 0xe74e75f0	dev_mc_sync
+EXPORT_SYMBOL vmlinux 0xe75507b6	pci_lost_interrupt
+EXPORT_SYMBOL vmlinux 0xe782899e	prom_searchsiblings
+EXPORT_SYMBOL vmlinux 0xe78acbc3	blk_dump_rq_flags
+EXPORT_SYMBOL vmlinux 0xe7ce6c22	compat_nf_setsockopt
+EXPORT_SYMBOL vmlinux 0xe7d2aca1	security_sk_classify_flow
+EXPORT_SYMBOL vmlinux 0xe7d32407	nmi_active
+EXPORT_SYMBOL vmlinux 0xe7d4daac	seq_list_next
+EXPORT_SYMBOL vmlinux 0xe7e2a757	blk_remove_plug
+EXPORT_SYMBOL vmlinux 0xe7f66aff	release_firmware
+EXPORT_SYMBOL vmlinux 0xe824ccfb	do_munmap
+EXPORT_SYMBOL vmlinux 0xe8292e41	textsearch_register
+EXPORT_SYMBOL vmlinux 0xe83cdb0f	elv_queue_empty
+EXPORT_SYMBOL vmlinux 0xe848386d	sk_wait_data
+EXPORT_SYMBOL vmlinux 0xe85ebcb7	dqput
+EXPORT_SYMBOL vmlinux 0xe86e5fc1	downgrade_write
+EXPORT_SYMBOL vmlinux 0xe86f6a00	dm_kcopyd_client_destroy
+EXPORT_SYMBOL vmlinux 0xe8cd902e	hweight16
+EXPORT_SYMBOL vmlinux 0xe8dfcdf9	__csum_partial_copy_to_user
+EXPORT_SYMBOL vmlinux 0xe8ec511c	vfs_rename
+EXPORT_SYMBOL vmlinux 0xe8f68f6e	netif_rx_ni
+EXPORT_SYMBOL vmlinux 0xe8fbad2a	drm_property_create
+EXPORT_SYMBOL vmlinux 0xe90dcae0	__request_module
+EXPORT_SYMBOL vmlinux 0xe914e41e	strcpy
+EXPORT_SYMBOL vmlinux 0xe919dd5c	drm_sman_owner_clean
+EXPORT_SYMBOL vmlinux 0xe91c635f	pci_wake_from_d3
+EXPORT_SYMBOL vmlinux 0xe944c091	tcp_check_req
+EXPORT_SYMBOL vmlinux 0xe94997af	sock_create_kern
+EXPORT_SYMBOL vmlinux 0xe96b5073	i2c_smbus_read_block_data
+EXPORT_SYMBOL vmlinux 0xe987da89	drm_gem_vm_open
+EXPORT_SYMBOL vmlinux 0xe988c114	call_usermodehelper_setup
+EXPORT_SYMBOL vmlinux 0xe9b6d4b3	scm_fp_dup
+EXPORT_SYMBOL vmlinux 0xe9fbdef3	tcf_exts_dump_stats
+EXPORT_SYMBOL vmlinux 0xea054b22	nla_policy_len
+EXPORT_SYMBOL vmlinux 0xea10655a	__bitmap_intersects
+EXPORT_SYMBOL vmlinux 0xea147363	printk
+EXPORT_SYMBOL vmlinux 0xea1fea9d	pagecache_write_end
+EXPORT_SYMBOL vmlinux 0xea72e923	alloc_fddidev
+EXPORT_SYMBOL vmlinux 0xea91bd9c	dma_pool_create
+EXPORT_SYMBOL vmlinux 0xeaaaaca7	kset_register
+EXPORT_SYMBOL vmlinux 0xeacbc7a2	udplite_prot
+EXPORT_SYMBOL vmlinux 0xead58fb9	print_hex_dump
+EXPORT_SYMBOL vmlinux 0xeb137709	take_over_console
+EXPORT_SYMBOL vmlinux 0xeb244f20	__napi_complete
+EXPORT_SYMBOL vmlinux 0xeb67c9bf	skb_put
+EXPORT_SYMBOL vmlinux 0xeb6c8f0d	drm_mm_init_scan
+EXPORT_SYMBOL vmlinux 0xeb885668	sock_alloc_send_skb
+EXPORT_SYMBOL vmlinux 0xeb8f54b3	strstrip
+EXPORT_SYMBOL vmlinux 0xeb9848b0	pci_read_vpd
+EXPORT_SYMBOL vmlinux 0xebbf1dba	strncasecmp
+EXPORT_SYMBOL vmlinux 0xebd273a6	strict_strtoull
+EXPORT_SYMBOL vmlinux 0xebf27b2e	dquot_alloc_space
+EXPORT_SYMBOL vmlinux 0xebf5c357	generic_file_splice_read
+EXPORT_SYMBOL vmlinux 0xec4e7db4	__netdev_alloc_skb
+EXPORT_SYMBOL vmlinux 0xec6bc073	kthread_bind
+EXPORT_SYMBOL vmlinux 0xec74d94f	__sk_dst_check
+EXPORT_SYMBOL vmlinux 0xec794ba0	__send_remote_softirq
+EXPORT_SYMBOL vmlinux 0xeca8a6d2	dev_alloc_skb
+EXPORT_SYMBOL vmlinux 0xecd2f6fa	follow_up
+EXPORT_SYMBOL vmlinux 0xecdcf838	grab_cache_page_write_begin
+EXPORT_SYMBOL vmlinux 0xece81194	xfrm_state_register_afinfo
+EXPORT_SYMBOL vmlinux 0xecf3e80b	rtc_dev_update_irq_enable_emul
+EXPORT_SYMBOL vmlinux 0xecf3fd91	tty_free_termios
+EXPORT_SYMBOL vmlinux 0xed1464f1	drm_get_dev
+EXPORT_SYMBOL vmlinux 0xed173d59	xfrm_state_add
+EXPORT_SYMBOL vmlinux 0xed1d95ed	tcp_make_synack
+EXPORT_SYMBOL vmlinux 0xed3ea0be	of_get_parent
+EXPORT_SYMBOL vmlinux 0xed56af6e	phy_start_interrupts
+EXPORT_SYMBOL vmlinux 0xed5702ef	nf_unregister_hook
+EXPORT_SYMBOL vmlinux 0xed6d6319	__sk_mem_reclaim
+EXPORT_SYMBOL vmlinux 0xed88f478	bio_phys_segments
+EXPORT_SYMBOL vmlinux 0xed901df5	bh_submit_read
+EXPORT_SYMBOL vmlinux 0xeda0d76e	gen_estimator_active
+EXPORT_SYMBOL vmlinux 0xedbaee5e	nla_strcmp
+EXPORT_SYMBOL vmlinux 0xedbd4611	bio_integrity_alloc
+EXPORT_SYMBOL vmlinux 0xedc69954	filemap_fdatawait
+EXPORT_SYMBOL vmlinux 0xede6059c	pcie_set_readrq
+EXPORT_SYMBOL vmlinux 0xede974a9	tty_port_close
+EXPORT_SYMBOL vmlinux 0xedec95b9	drm_poll
+EXPORT_SYMBOL vmlinux 0xedf851be	__pagevec_release
+EXPORT_SYMBOL vmlinux 0xedf8c8a8	journal_set_features
+EXPORT_SYMBOL vmlinux 0xee0a7b83	bd_release
+EXPORT_SYMBOL vmlinux 0xee0b1822	sock_alloc_send_pskb
+EXPORT_SYMBOL vmlinux 0xee1b6092	load_nls_default
+EXPORT_SYMBOL vmlinux 0xee1c240d	clocksource_register
+EXPORT_SYMBOL vmlinux 0xee2d0fc7	_local_bh_enable
+EXPORT_SYMBOL vmlinux 0xee4676a3	phy_start_aneg
+EXPORT_SYMBOL vmlinux 0xee90884e	dq_data_lock
+EXPORT_SYMBOL vmlinux 0xeea9dbaf	bitmap_bitremap
+EXPORT_SYMBOL vmlinux 0xeee85869	input_allocate_device
+EXPORT_SYMBOL vmlinux 0xeeec7b56	drm_vblank_pre_modeset
+EXPORT_SYMBOL vmlinux 0xef0a73d3	drm_mm_get_block_range_generic
+EXPORT_SYMBOL vmlinux 0xef26d9b8	i2c_put_adapter
+EXPORT_SYMBOL vmlinux 0xef335d40	mdesc_grab
+EXPORT_SYMBOL vmlinux 0xef56168b	neigh_resolve_output
+EXPORT_SYMBOL vmlinux 0xef5bcae6	tcp_gro_complete
+EXPORT_SYMBOL vmlinux 0xef5de76c	mnt_unpin
+EXPORT_SYMBOL vmlinux 0xef6ed1ba	param_set_invbool
+EXPORT_SYMBOL vmlinux 0xef7714ad	tcp_v4_syn_recv_sock
+EXPORT_SYMBOL vmlinux 0xef7ab7cf	neigh_changeaddr
+EXPORT_SYMBOL vmlinux 0xef8ff1ff	ebus_dma_irq_enable
+EXPORT_SYMBOL vmlinux 0xef957533	xfrm_policy_destroy
+EXPORT_SYMBOL vmlinux 0xef9daa62	sock_no_sendmsg
+EXPORT_SYMBOL vmlinux 0xefa49971	touch_atime
+EXPORT_SYMBOL vmlinux 0xefdd70ce	security_secid_to_secctx
+EXPORT_SYMBOL vmlinux 0xefdef987	drm_gem_handle_create
+EXPORT_SYMBOL vmlinux 0xf0009fee	put_pages_list
+EXPORT_SYMBOL vmlinux 0xf0798ce1	of_ioremap
+EXPORT_SYMBOL vmlinux 0xf096a8bc	sock_no_bind
+EXPORT_SYMBOL vmlinux 0xf0a05de5	inet_frag_find
+EXPORT_SYMBOL vmlinux 0xf0b31251	tty_register_driver
+EXPORT_SYMBOL vmlinux 0xf0e64d9b	file_permission
+EXPORT_SYMBOL vmlinux 0xf0ef15b4	list_sort
+EXPORT_SYMBOL vmlinux 0xf0f1246c	kvasprintf
+EXPORT_SYMBOL vmlinux 0xf11d4a21	journal_release_buffer
+EXPORT_SYMBOL vmlinux 0xf1387e94	__netdev_alloc_page
+EXPORT_SYMBOL vmlinux 0xf1421d13	drm_mode_sort
+EXPORT_SYMBOL vmlinux 0xf15a1e4c	vfs_dq_transfer
+EXPORT_SYMBOL vmlinux 0xf1658ca2	uart_write_wakeup
+EXPORT_SYMBOL vmlinux 0xf174ed48	acquire_console_sem
+EXPORT_SYMBOL vmlinux 0xf1885fcb	check_disk_size_change
+EXPORT_SYMBOL vmlinux 0xf195c682	fb_invert_cmaps
+EXPORT_SYMBOL vmlinux 0xf1bd8a58	nf_register_hook
+EXPORT_SYMBOL vmlinux 0xf1c3b00e	copy_in_user_fixup
+EXPORT_SYMBOL vmlinux 0xf1cdf37f	i2c_smbus_write_i2c_block_data
+EXPORT_SYMBOL vmlinux 0xf1db1704	nla_memcpy
+EXPORT_SYMBOL vmlinux 0xf1e11e77	dm_get_device
+EXPORT_SYMBOL vmlinux 0xf1e98c74	avenrun
+EXPORT_SYMBOL vmlinux 0xf20dabd8	free_irq
+EXPORT_SYMBOL vmlinux 0xf2561604	simple_link
+EXPORT_SYMBOL vmlinux 0xf261fe0c	cpu_sysdev_class
+EXPORT_SYMBOL vmlinux 0xf28cbbaa	elv_rb_add
+EXPORT_SYMBOL vmlinux 0xf2978247	grab_cache_page_nowait
+EXPORT_SYMBOL vmlinux 0xf2998abe	skb_free_datagram_locked
+EXPORT_SYMBOL vmlinux 0xf29f32ec	sg_copy_from_buffer
+EXPORT_SYMBOL vmlinux 0xf2a5238b	fddi_type_trans
+EXPORT_SYMBOL vmlinux 0xf2de259a	dm_table_get_mode
+EXPORT_SYMBOL vmlinux 0xf2f75812	drm_mm_search_free_in_range
+EXPORT_SYMBOL vmlinux 0xf2ff163a	ethtool_op_set_tx_hw_csum
+EXPORT_SYMBOL vmlinux 0xf30a54e7	i2c_smbus_write_word_data
+EXPORT_SYMBOL vmlinux 0xf310d05e	drm_sysfs_connector_add
+EXPORT_SYMBOL vmlinux 0xf313da4e	sha_transform
+EXPORT_SYMBOL vmlinux 0xf3341268	__clear_user
+EXPORT_SYMBOL vmlinux 0xf338d4c3	netlink_unregister_notifier
+EXPORT_SYMBOL vmlinux 0xf346231f	seq_list_start_head
+EXPORT_SYMBOL vmlinux 0xf36b58f6	init_buffer
+EXPORT_SYMBOL vmlinux 0xf37f083e	dev_load
+EXPORT_SYMBOL vmlinux 0xf397b9aa	__tasklet_schedule
+EXPORT_SYMBOL vmlinux 0xf3bc8f3e	inet_sendmsg
+EXPORT_SYMBOL vmlinux 0xf3bf0bce	__bitmap_complement
+EXPORT_SYMBOL vmlinux 0xf3e10493	pci_setup_cardbus
+EXPORT_SYMBOL vmlinux 0xf4056bc3	dma_pool_destroy
+EXPORT_SYMBOL vmlinux 0xf411bd7b	pci_enable_device
+EXPORT_SYMBOL vmlinux 0xf41c7bff	drm_irq_install
+EXPORT_SYMBOL vmlinux 0xf42a2b26	drm_ht_create
+EXPORT_SYMBOL vmlinux 0xf445eb55	dm_kcopyd_client_create
+EXPORT_SYMBOL vmlinux 0xf4552f2b	block_commit_write
+EXPORT_SYMBOL vmlinux 0xf471b8b3	ll_rw_block
+EXPORT_SYMBOL vmlinux 0xf486649e	is_container_init
+EXPORT_SYMBOL vmlinux 0xf497eebb	__down_write_trylock
+EXPORT_SYMBOL vmlinux 0xf49f403e	bioset_integrity_create
+EXPORT_SYMBOL vmlinux 0xf49fdb37	force_sig
+EXPORT_SYMBOL vmlinux 0xf4a736d3	eth_header_parse
+EXPORT_SYMBOL vmlinux 0xf4c3ba90	dev_queue_xmit
+EXPORT_SYMBOL vmlinux 0xf4f14de6	rtnl_trylock
+EXPORT_SYMBOL vmlinux 0xf4f1b214	generic_readlink
+EXPORT_SYMBOL vmlinux 0xf4f52f93	dqstats
+EXPORT_SYMBOL vmlinux 0xf51ae235	touch_nmi_watchdog
+EXPORT_SYMBOL vmlinux 0xf51c639f	interruptible_sleep_on_timeout
+EXPORT_SYMBOL vmlinux 0xf523f7cd	compat_sock_common_getsockopt
+EXPORT_SYMBOL vmlinux 0xf52a8fab	scsi_cmd_ioctl
+EXPORT_SYMBOL vmlinux 0xf52f91ca	read_cache_page_async
+EXPORT_SYMBOL vmlinux 0xf53d4c26	qdisc_class_hash_destroy
+EXPORT_SYMBOL vmlinux 0xf552f9e6	seq_putc
+EXPORT_SYMBOL vmlinux 0xf562df04	input_grab_device
+EXPORT_SYMBOL vmlinux 0xf563bcc1	delayed_slow_work_enqueue
+EXPORT_SYMBOL vmlinux 0xf56e65f5	drm_pci_free
+EXPORT_SYMBOL vmlinux 0xf58edbad	unlock_rename
+EXPORT_SYMBOL vmlinux 0xf59eb297	dev_change_flags
+EXPORT_SYMBOL vmlinux 0xf5b08166	dentry_unhash
+EXPORT_SYMBOL vmlinux 0xf5b0a90a	neigh_lookup_nodev
+EXPORT_SYMBOL vmlinux 0xf5b6970a	set_bh_page
+EXPORT_SYMBOL vmlinux 0xf5be0887	task_nice
+EXPORT_SYMBOL vmlinux 0xf5c9012e	timespec_trunc
+EXPORT_SYMBOL vmlinux 0xf5d409f2	mark_buffer_dirty
+EXPORT_SYMBOL vmlinux 0xf5eb86ea	blk_verify_command
+EXPORT_SYMBOL vmlinux 0xf60efa23	__sg_alloc_table
+EXPORT_SYMBOL vmlinux 0xf61361c8	dev_get_flags
+EXPORT_SYMBOL vmlinux 0xf621ff13	blk_rq_map_integrity_sg
+EXPORT_SYMBOL vmlinux 0xf632f5e6	of_iounmap
+EXPORT_SYMBOL vmlinux 0xf63bf47d	dev_get_drvdata
+EXPORT_SYMBOL vmlinux 0xf65ae663	pci_bus_find_capability
+EXPORT_SYMBOL vmlinux 0xf67ed436	dev_alloc_name
+EXPORT_SYMBOL vmlinux 0xf683f27d	phy_disable_interrupts
+EXPORT_SYMBOL vmlinux 0xf6a30e08	ida_init
+EXPORT_SYMBOL vmlinux 0xf6a3ccd7	bdi_unregister
+EXPORT_SYMBOL vmlinux 0xf6aeeb15	suncore_mouse_baud_cflag_next
+EXPORT_SYMBOL vmlinux 0xf6bb4729	color_table
+EXPORT_SYMBOL vmlinux 0xf6ceb1fd	ip_route_output_key
+EXPORT_SYMBOL vmlinux 0xf6ebc03b	net_ratelimit
+EXPORT_SYMBOL vmlinux 0xf6f8c5b6	nf_hook_slow
+EXPORT_SYMBOL vmlinux 0xf7584a9c	find_font
+EXPORT_SYMBOL vmlinux 0xf7586cb1	pcim_iounmap
+EXPORT_SYMBOL vmlinux 0xf761c3ae	copy_to_user_fixup
+EXPORT_SYMBOL vmlinux 0xf7711577	dma_pool_free
+EXPORT_SYMBOL vmlinux 0xf78d04ab	netlink_register_notifier
+EXPORT_SYMBOL vmlinux 0xf7a931a2	dm_table_put
+EXPORT_SYMBOL vmlinux 0xf7b409df	drm_mode_connector_update_edid_property
+EXPORT_SYMBOL vmlinux 0xf7bc7799	vfs_set_dqblk
+EXPORT_SYMBOL vmlinux 0xf7e0188e	do_SAK
+EXPORT_SYMBOL vmlinux 0xf80006e3	block_sync_page
+EXPORT_SYMBOL vmlinux 0xf80c69d2	__strlen_user
+EXPORT_SYMBOL vmlinux 0xf81095b0	__xfrm_lookup
+EXPORT_SYMBOL vmlinux 0xf82abc1d	isa_dma_bridge_buggy
+EXPORT_SYMBOL vmlinux 0xf84b38c3	atomic_add_ret
+EXPORT_SYMBOL vmlinux 0xf84fec93	bd_set_size
+EXPORT_SYMBOL vmlinux 0xf8acc735	search_binary_handler
+EXPORT_SYMBOL vmlinux 0xf8ee9b93	jbd2_journal_start
+EXPORT_SYMBOL vmlinux 0xf8f35da1	vga_tryget
+EXPORT_SYMBOL vmlinux 0xf931feb7	pagevec_lookup
+EXPORT_SYMBOL vmlinux 0xf93eee6e	names_cachep
+EXPORT_SYMBOL vmlinux 0xf95f03da	drm_irq_uninstall
+EXPORT_SYMBOL vmlinux 0xf98afc2e	die_if_kernel
+EXPORT_SYMBOL vmlinux 0xf9a482f9	msleep
+EXPORT_SYMBOL vmlinux 0xf9b28bac	interruptible_sleep_on
+EXPORT_SYMBOL vmlinux 0xf9d8446f	noop_qdisc
+EXPORT_SYMBOL vmlinux 0xf9dac734	fbcon_set_tileops
+EXPORT_SYMBOL vmlinux 0xf9e56fc8	__insert_inode_hash
+EXPORT_SYMBOL vmlinux 0xf9f52acc	pci_find_device
+EXPORT_SYMBOL vmlinux 0xf9fe2074	drm_vblank_get
+EXPORT_SYMBOL vmlinux 0xfa042e6a	gnet_stats_copy_rate_est
+EXPORT_SYMBOL vmlinux 0xfa195e15	tcp_sendmsg
+EXPORT_SYMBOL vmlinux 0xfa205c9c	fifo_set_limit
+EXPORT_SYMBOL vmlinux 0xfa22bb42	mdiobus_alloc
+EXPORT_SYMBOL vmlinux 0xfa34410a	inet_csk_destroy_sock
+EXPORT_SYMBOL vmlinux 0xfa449400	vfs_quota_off
+EXPORT_SYMBOL vmlinux 0xfa47c3a8	xfrm_state_walk
+EXPORT_SYMBOL vmlinux 0xfa7bc0c7	blk_queue_stack_limits
+EXPORT_SYMBOL vmlinux 0xfa908648	sysctl_jiffies
+EXPORT_SYMBOL vmlinux 0xfaa53cca	netif_device_detach
+EXPORT_SYMBOL vmlinux 0xfac61963	blk_free_tags
+EXPORT_SYMBOL vmlinux 0xfad37866	jbd2_journal_init_jbd_inode
+EXPORT_SYMBOL vmlinux 0xfaf98462	bitrev32
+EXPORT_SYMBOL vmlinux 0xfafaaefa	mdio_bus_type
+EXPORT_SYMBOL vmlinux 0xfb0cf2e9	touch_all_softlockup_watchdogs
+EXPORT_SYMBOL vmlinux 0xfb26cec1	netif_device_attach
+EXPORT_SYMBOL vmlinux 0xfb326a5d	down
+EXPORT_SYMBOL vmlinux 0xfb5346c0	usb_gadget_register_driver
+EXPORT_SYMBOL vmlinux 0xfb58121b	__init_waitqueue_head
+EXPORT_SYMBOL vmlinux 0xfb595663	key_negate_and_link
+EXPORT_SYMBOL vmlinux 0xfb6af58d	recalc_sigpending
+EXPORT_SYMBOL vmlinux 0xfb7601d9	truncate_inode_pages_range
+EXPORT_SYMBOL vmlinux 0xfb77c5c2	open_bdev_exclusive
+EXPORT_SYMBOL vmlinux 0xfb7c49c8	idr_replace
+EXPORT_SYMBOL vmlinux 0xfb844248	skb_copy_and_csum_bits
+EXPORT_SYMBOL vmlinux 0xfbe27a1c	rb_first
+EXPORT_SYMBOL vmlinux 0xfbe3bd60	input_inject_event
+EXPORT_SYMBOL vmlinux 0xfc02b7ad	sysctl_tcp_wmem
+EXPORT_SYMBOL vmlinux 0xfc121677	sbusfb_mmap_helper
+EXPORT_SYMBOL vmlinux 0xfc21e5b2	uart_update_timeout
+EXPORT_SYMBOL vmlinux 0xfc250a29	of_find_device_by_node
+EXPORT_SYMBOL vmlinux 0xfc2a11a8	tty_termios_copy_hw
+EXPORT_SYMBOL vmlinux 0xfc39e32f	ioport_unmap
+EXPORT_SYMBOL vmlinux 0xfc71acc4	rtnetlink_put_metrics
+EXPORT_SYMBOL vmlinux 0xfc7de809	ip_queue_xmit
+EXPORT_SYMBOL vmlinux 0xfca5a3d2	pci_unregister_driver
+EXPORT_SYMBOL vmlinux 0xfca5c12b	inet_csk_init_xmit_timers
+EXPORT_SYMBOL vmlinux 0xfcaa04a0	out_of_line_wait_on_bit_lock
+EXPORT_SYMBOL vmlinux 0xfcc2a43c	utf32_to_utf8
+EXPORT_SYMBOL vmlinux 0xfcd60d5e	register_sysctl_table
+EXPORT_SYMBOL vmlinux 0xfcda63a3	node_states
+EXPORT_SYMBOL vmlinux 0xfcec0987	enable_irq
+EXPORT_SYMBOL vmlinux 0xfcecee15	xfrm_init_state
+EXPORT_SYMBOL vmlinux 0xfcf95011	is_bad_inode
+EXPORT_SYMBOL vmlinux 0xfcfa03ff	fb_videomode_to_modelist
+EXPORT_SYMBOL vmlinux 0xfd059806	dmam_alloc_coherent
+EXPORT_SYMBOL vmlinux 0xfd08e39e	input_register_handler
+EXPORT_SYMBOL vmlinux 0xfd201145	dm_table_unplug_all
+EXPORT_SYMBOL vmlinux 0xfd30bb35	neigh_event_ns
+EXPORT_SYMBOL vmlinux 0xfd51b3f9	sock_i_uid
+EXPORT_SYMBOL vmlinux 0xfd5515a1	fd_install
+EXPORT_SYMBOL vmlinux 0xfd5804d9	sync_blockdev
+EXPORT_SYMBOL vmlinux 0xfd5940e0	mpage_readpage
+EXPORT_SYMBOL vmlinux 0xfd79bc2c	sbusfb_fill_var
+EXPORT_SYMBOL vmlinux 0xfd8dba4c	add_wait_queue
+EXPORT_SYMBOL vmlinux 0xfda85a7d	request_threaded_irq
+EXPORT_SYMBOL vmlinux 0xfdeeaa91	inode_add_rsv_space
+EXPORT_SYMBOL vmlinux 0xfdfbad19	drm_sman_alloc
+EXPORT_SYMBOL vmlinux 0xfdfc0b3b	fiemap_fill_next_extent
+EXPORT_SYMBOL vmlinux 0xfe187b83	blk_queue_free_tags
+EXPORT_SYMBOL vmlinux 0xfe1f2905	compat_sock_get_timestamp
+EXPORT_SYMBOL vmlinux 0xfe392bcd	generic_segment_checks
+EXPORT_SYMBOL vmlinux 0xfe5d4bb2	sys_tz
+EXPORT_SYMBOL vmlinux 0xfe769456	unregister_netdevice_notifier
+EXPORT_SYMBOL vmlinux 0xfe78010d	xor_niagara_4
+EXPORT_SYMBOL vmlinux 0xfe949291	net2280_set_fifo_mode
+EXPORT_SYMBOL vmlinux 0xfea24c8e	lro_vlan_hwaccel_receive_frags
+EXPORT_SYMBOL vmlinux 0xfeaad502	__alloc_skb
+EXPORT_SYMBOL vmlinux 0xfec05366	sun_do_break
+EXPORT_SYMBOL vmlinux 0xfec3c2f2	bcd2bin
+EXPORT_SYMBOL vmlinux 0xfed3b5da	drm_idlelock_take
+EXPORT_SYMBOL vmlinux 0xfedd35fc	console_suspend_enabled
+EXPORT_SYMBOL vmlinux 0xfee51e03	input_flush_device
+EXPORT_SYMBOL vmlinux 0xfef5adc6	uart_match_port
+EXPORT_SYMBOL vmlinux 0xfefc701b	ilookup5_nowait
+EXPORT_SYMBOL vmlinux 0xfeff2267	write_inode_now
+EXPORT_SYMBOL vmlinux 0xfeffe295	locks_init_lock
+EXPORT_SYMBOL vmlinux 0xff1e9dd8	seq_list_start
+EXPORT_SYMBOL vmlinux 0xff41a2ac	iget_failed
+EXPORT_SYMBOL vmlinux 0xff6878cf	fb_default_cmap
+EXPORT_SYMBOL vmlinux 0xff7559e4	ioport_resource
+EXPORT_SYMBOL vmlinux 0xff964b25	param_set_int
+EXPORT_SYMBOL vmlinux 0xff9ca065	fb_edid_to_monspecs
+EXPORT_SYMBOL vmlinux 0xffbb194f	__lookup_one_len
+EXPORT_SYMBOL vmlinux 0xffd5a395	default_wake_function
+EXPORT_SYMBOL vmlinux 0xffeeb56c	blk_sync_queue
+EXPORT_SYMBOL vmlinux 0xfffbbd62	__kill_fasync
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x0cc1e40f	crypto_it_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x24aac4d9	crypto_aes_expand_key
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x3dc916b6	crypto_fl_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x40d46b21	crypto_ft_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x71dc9998	crypto_il_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0xba25219d	crypto_aes_set_key
+EXPORT_SYMBOL_GPL crypto/async_tx/async_memcpy 0x37cd8e08	async_memcpy
+EXPORT_SYMBOL_GPL crypto/async_tx/async_pq 0x09b4bbed	async_gen_syndrome
+EXPORT_SYMBOL_GPL crypto/async_tx/async_pq 0x910d98d4	async_syndrome_val
+EXPORT_SYMBOL_GPL crypto/async_tx/async_raid6_recov 0x39426420	async_raid6_datap_recov
+EXPORT_SYMBOL_GPL crypto/async_tx/async_raid6_recov 0xbd70cb2d	async_raid6_2data_recov
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x4745274f	async_trigger_callback
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x513225e5	async_tx_quiesce
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0xbb52ab4e	async_tx_submit
+EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0x2d8a3681	async_xor
+EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0x576c2785	async_xor_val
+EXPORT_SYMBOL_GPL crypto/cryptd 0x139b4e6b	cryptd_shash_desc
+EXPORT_SYMBOL_GPL crypto/cryptd 0x195cd5e0	cryptd_alloc_ahash
+EXPORT_SYMBOL_GPL crypto/cryptd 0x32e6704f	cryptd_alloc_ablkcipher
+EXPORT_SYMBOL_GPL crypto/cryptd 0x5687dd0d	cryptd_free_ahash
+EXPORT_SYMBOL_GPL crypto/cryptd 0xa5cb0a59	cryptd_free_ablkcipher
+EXPORT_SYMBOL_GPL crypto/cryptd 0xced1dbe5	cryptd_ablkcipher_child
+EXPORT_SYMBOL_GPL crypto/cryptd 0xe8c4f739	cryptd_ahash_child
+EXPORT_SYMBOL_GPL crypto/twofish_common 0xee48ffde	twofish_setkey
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x0067df75	ata_tf_from_fis
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x00c47119	ata_dummy_port_ops
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x00ebcb5d	ata_id_string
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x01871755	ata_host_register
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x03968125	ata_port_start
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x03cdd388	ata_eh_thaw_port
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x03e3686c	ata_timing_cycle2mode
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x03ee65e7	ata_sff_data_xfer_noirq
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x04075f29	sata_scr_read
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x047b5d57	ata_qc_complete_multiple
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x0531dcb8	ata_dev_classify
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x0780ff04	ata_ehi_clear_desc
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x0783cd16	ata_sff_softreset
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x0789500c	dev_attr_em_message
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x08b070bd	ata_sff_prereset
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x0b0dfef0	ata_sff_dumb_qc_prep
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x0c61a8a0	ata_sff_dev_select
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x0e269521	ata_sff_thaw
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x17a03940	ata_host_alloc
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x1ae474d0	ata_sff_dma_pause
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x1ba51d59	ata_dummy_port_info
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x1bd52b1f	ata_port_freeze
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x1e238741	ata_timing_compute
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x1ef90470	ata_sff_drain_fifo
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x1f0009ff	ata_scsi_simulate
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x245595de	ata_std_error_handler
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x259b9197	ata_cable_unknown
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x292802a8	ata_sff_post_internal_cmd
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x35af9b9e	ata_host_init
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x36a9a712	sata_pmp_qc_defer_cmd_switch
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x3714c6d1	ata_sas_scsi_ioctl
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x373c2789	ata_sas_queuecmd
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x3862f874	ata_ehi_push_desc
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x3984bd96	ata_do_dev_read_id
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x3a2d9442	ata_sff_irq_clear
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x3d1f7c42	ata_sg_init
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x40af0dec	ata_xfer_mode2mask
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x4130a17b	ata_host_activate
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x42a26e17	ata_sff_check_status
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x43531252	ata_port_schedule_eh
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x43f56e82	ata_xfer_mode2shift
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x44f444d6	ata_sas_slave_configure
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x481efe2a	ata_dev_disable
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x48f1f43a	ata_cable_sata
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x492e024c	dev_attr_unload_heads
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x4c922876	dev_attr_sw_activity
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x4d2c8540	sata_link_hardreset
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x4ee1e8d6	ata_sff_exec_command
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x4fdc945d	sata_deb_timing_normal
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x51664c66	sata_scr_write_flush
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x5249efb5	sata_scr_write
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x528e55c1	ata_bmdma_start
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x554ab795	ata_do_eh
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x556b16eb	ata_bmdma_stop
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x55e200eb	ata_host_detach
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x56f04124	ata_cable_80wire
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x5857cbc2	ata_sas_port_destroy
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x59c47c34	ata_sff_freeze
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x5aa9b58e	dev_attr_link_power_management_policy
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x5ae8145d	sata_scr_valid
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x5b899cdb	ata_cable_ignore
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x60d7485a	pci_test_config_bits
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x6754b06d	ata_sff_port_start32
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x696c9dd0	ata_bmdma_status
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x69e9a2cb	ata_scsi_slave_config
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x6b633a15	ata_bmdma_port_ops
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x6d9bf073	sata_set_spd
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x6e2915b5	sata_async_notification
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x6f6ac2cd	ata_std_qc_defer
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x707ff1bb	ata_xfer_mask2mode
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x73a48b4a	ata_sff_std_ports
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x73bf6491	sata_sff_hardreset
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x743a165e	ata_pack_xfermask
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x76bfa1f7	ata_std_bios_param
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x79798d91	ata_std_postreset
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x7ba0b52b	ata_link_online
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x806116fc	ata_sff_port_start
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x8149ea54	ata_timing_find_mode
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x81cbe03e	ata_port_pbar_desc
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x821cb30c	ata_sas_port_start
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x836fd1d2	ata_sff_data_xfer32
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x881b2fe5	__ata_ehi_push_desc
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x8aa2f278	ata_bus_reset
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x8b752ac1	ata_tf_to_fis
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x8cf1526f	ata_bmdma_setup
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x8feadfa5	ata_sff_port_ops
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x948a9770	ata_common_sdev_attrs
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x94a68723	ata_scsi_slave_destroy
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x94aea637	ata_sff_lost_interrupt
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x96c0d1c8	ata_pci_sff_init_one
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x9acaab85	ata_host_start
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x9baa3fd0	ata_port_disable
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x9d3d4d20	ata_host_alloc_pinfo
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x9e01e8c4	ata_qc_complete
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x9e460feb	ata_port_abort
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xa2c7056b	ata_pci_sff_activate_host
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xa5240e2f	ata_pio_need_iordy
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xa6520159	ata_sff_postreset
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xa66311ad	ata_scsi_queuecmd
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xa7d31065	ata_scsi_ioctl
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xab1fc05c	ata_pci_remove_one
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xac767336	ata_sff_qc_prep
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xaf3f6fe0	ata_sff_interrupt
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xb052924d	ata_wait_after_reset
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xb16584be	ata_eh_freeze_port
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xb266ead7	sata_port_ops
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xb3151304	ata_link_abort
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xb3595b1f	sata_pmp_port_ops
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xb51f512a	ata_base_port_ops
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xb6332087	sata_link_debounce
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xb66e40e1	ata_sas_port_init
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xb6aeb661	ata_id_c_string
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xb92d9ee5	ata_bmdma32_port_ops
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xb9bbc283	ata_sff_irq_on
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xbaf1dc45	ata_slave_link_init
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xbb5f4900	ata_pio_queue_task
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xbe1887e4	ata_unpack_xfermask
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xbe237cfe	ata_sff_tf_load
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xbfbf36ac	ata_link_offline
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xc0229381	ata_sff_wait_after_reset
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xc11a52d1	ata_dev_next
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xc236bbd0	ata_pci_bmdma_init
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xc428068d	sata_deb_timing_long
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xc48b7ccf	ata_mode_string
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xc673e23e	ata_scsi_change_queue_depth
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xc9db4014	ata_sff_qc_issue
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xca8234fc	ata_sas_port_alloc
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xcab277b8	ata_eh_qc_complete
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xcba7ce3d	ata_sas_port_stop
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xcccfb2fa	sata_deb_timing_hotplug
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xcd4b0bc4	ata_sff_tf_read
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xcf39c114	sata_pmp_error_handler
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xd2a9e783	ata_bmdma_mode_filter
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xd6301180	sata_std_hardreset
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xd9730f39	ata_sff_error_handler
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xdb337aab	ata_port_desc
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xddcbbf8c	ata_dev_pair
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xdf799d07	ata_pci_bmdma_clear_simplex
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xe0f8d77a	ata_std_prereset
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xe21a3798	ata_link_next
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xe4735839	ata_sff_qc_fill_rtf
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xe49ff3b0	ata_wait_register
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xe505d3cc	ata_do_set_mode
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xe7103ef0	ata_sff_dev_classify
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xea404ec4	ata_pci_sff_prepare_host
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xea418e0f	atapi_cmd_type
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xeabb522c	ata_sff_data_xfer
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xeb63aae6	ata_sff_wait_ready
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xebaeb227	ata_sff_host_intr
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xec879e46	ata_sff_pause
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xecbf8400	sata_link_resume
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xee2aef58	ata_eh_qc_retry
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xf5ba7efc	ata_pci_sff_init_host
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xf6e874f5	ata_timing_merge
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xf8f3a0fb	ata_ratelimit
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xf9c56a11	ata_port_probe
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xf9ca3160	ata_id_xfermask
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xfaf0bba9	ata_cable_40wire
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xfc20786a	ata_sff_hsm_move
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xfdab92fb	ata_sff_busy_sleep
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xfe7e6201	dev_attr_em_message_type
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xff4dc101	ata_eh_analyze_ncq_error
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xff81406f	ata_noop_qc_prep
+EXPORT_SYMBOL_GPL drivers/ata/pata_sis 0xf126d58b	sis_info133_for_sata
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x14102f23	ks0108_displaystate
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x48a70518	ks0108_writedata
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x4f506333	ks0108_startline
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x6edae968	ks0108_isinited
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xbf4774db	ks0108_writecontrol
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xedde6df2	ks0108_page
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xfee8ef7b	ks0108_address
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x2fd6c58a	tpm_write
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x3cc9a069	tpm_show_timeouts
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x3f1ab163	tpm_dev_vendor_release
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x457f7c28	tpm_pm_resume
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x4ab9c469	tpm_pm_suspend
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x55652b49	tpm_dev_release
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x76b4cb7d	tpm_release
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x77f9168d	tpm_get_timeouts
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x7acf4d4f	tpm_show_active
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x7cfd87b6	tpm_continue_selftest
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x7fad8115	tpm_read
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x863aa36d	tpm_show_caps
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x8880dfee	tpm_remove_hardware
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x90f79779	tpm_calc_ordinal_duration
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x9324c7f5	tpm_show_pcrs
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x9af354c8	tpm_open
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x9e106621	tpm_register_hardware
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xa8c42963	tpm_show_pubek
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xabbe4d8a	tpm_show_enabled
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xadf6aa4d	tpm_pcr_read
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xbc7a9fcd	tpm_store_cancel
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xbc7d68f3	tpm_show_caps_1_2
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xc18e32e3	tpm_gen_interrupt
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xc37226a5	tpm_pcr_extend
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xd71db00a	tpm_show_owned
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xee599e51	tpm_show_temp_deactivated
+EXPORT_SYMBOL_GPL drivers/connector/cn 0xb10d55bc	cn_netlink_send
+EXPORT_SYMBOL_GPL drivers/connector/cn 0xcf7a962e	cn_add_callback
+EXPORT_SYMBOL_GPL drivers/connector/cn 0xff5a8cfe	cn_del_callback
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x05495392	hid_debug
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x09576fcf	hid_dump_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x12bfff30	hid_report_raw_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x196cec97	hid_set_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x1c083863	hid_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x2c63a0db	hidraw_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x2eba1f02	hid_check_keys_pressed
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x386cf4d7	hid_debug_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x39c429f6	hid_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x3fcf2153	hidinput_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x454f85f1	hidinput_report_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x45752b3a	hid_parse_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x4e25a455	hid_input_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x4fd5a58d	hid_unregister_driver
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x5751cd19	hid_output_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x62baa351	__hid_register_driver
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x66b9034a	hid_add_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x6a0acff6	hid_dump_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x70a714a5	hid_allocate_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x925415ae	hidraw_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x942c9380	hid_destroy_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xb50c3fe8	hid_resolv_usage
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xca6938f0	hid_dump_input
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xd53ab0cf	hidinput_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xe34cd959	hidinput_find_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xfa10e419	hidraw_report_event
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x01fd453e	usbhid_lookup_quirk
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x11d16bcc	usbhid_submit_report
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x5c8bd825	usbhid_set_leds
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x3f1fa0c1	lis3lv02d_poweroff
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x6c33e494	lis3lv02d_joystick_disable
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x7f90c6a9	lis3lv02d_poweron
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x9503ddc5	lis3lv02d_remove_fs
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xbccb5829	lis3lv02d_init_device
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xe6af28c8	lis3lv02d_joystick_enable
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xfa4c65c5	lis3_dev
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0x1c12ee50	hpsb_config_rom_ip1394_add
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0xd98051d7	hpsb_config_rom_ip1394_remove
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0xec8d18cf	hpsb_disable_irm
+EXPORT_SYMBOL_GPL drivers/infiniband/hw/ipath/ib_ipath 0x1514b2b2	ipath_debug
+EXPORT_SYMBOL_GPL drivers/input/ff-memless 0x6218fa30	input_ff_create_memless
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x27ee5905	wm97xx_get_gpio
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x2c33b7ac	wm97xx_register_mach_ops
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x7e0f5cbe	wm9713_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x84399fcc	wm97xx_set_gpio
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x8a9d5e3d	wm97xx_reg_read
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x8d73b293	wm97xx_set_suspend_mode
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xaf1b417a	wm9705_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xb2a55c20	wm9712_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xb3b5c985	wm97xx_unregister_mach_ops
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xbb99b87e	wm97xx_read_aux_adc
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xdb1ee2fb	wm97xx_config_gpio
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xef88e673	wm97xx_reg_write
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x0387121a	gigaset_freedriver
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x14f184a8	gigaset_shutdown
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x175a7476	gigaset_add_event
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x1a28ff57	gigaset_m10x_send_skb
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x2c0979ce	gigaset_dbg_buffer
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x3fb5dc6e	gigaset_if_receive
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x454aa44f	gigaset_debuglevel
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x4b7c77dc	gigaset_freecs
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x5b945fc3	gigaset_blockdriver
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x8583f33f	gigaset_start
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x8b8a1d03	gigaset_skb_sent
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xb23b46a8	gigaset_initcs
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xb241cf3f	gigaset_fill_inbuf
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xe78f6fda	gigaset_handle_modem_response
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xf636c9a3	gigaset_stop
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xf667a3c0	gigaset_m10x_input
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xfc93d573	gigaset_initdriver
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0x3d5da3ca	led_classdev_register
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0x7ab5759c	led_classdev_suspend
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0x87d27972	led_classdev_unregister
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0xeaa696ef	led_classdev_resume
+EXPORT_SYMBOL_GPL drivers/md/dm-multipath 0x193ad7bb	dm_register_path_selector
+EXPORT_SYMBOL_GPL drivers/md/dm-multipath 0x2b774680	dm_unregister_path_selector
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x04707912	dm_rh_inc_pending
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x0a5a7b6f	dm_rh_recovery_in_flight
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x18ae25b2	dm_rh_update_states
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x25d0601e	dm_region_hash_create
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x2bdfc5b6	dm_rh_get_state
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x3318e5b4	dm_rh_recovery_start
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x339a1527	dm_rh_dirty_log
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x484340ba	dm_rh_bio_to_region
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x5a427533	dm_rh_get_region_size
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x5bf091e6	dm_rh_region_context
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x6e4e9798	dm_rh_stop_recovery
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x6fe958b1	dm_rh_recovery_prepare
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x7122402a	dm_rh_recovery_end
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x8aa7ac62	dm_rh_mark_nosync
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x8fffcf57	dm_rh_delay
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xb18ae731	dm_rh_start_recovery
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xb9026332	dm_rh_flush
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xba6b3f18	dm_rh_region_to_sector
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xe0db415a	dm_rh_dec
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xebd31b2d	dm_rh_get_region_key
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xf1d8da02	dm_region_hash_destroy
+EXPORT_SYMBOL_GPL drivers/md/md-mod 0x0658e027	sync_page_io
+EXPORT_SYMBOL_GPL drivers/md/md-mod 0x0b5c473e	md_allow_write
+EXPORT_SYMBOL_GPL drivers/md/md-mod 0x489eaa38	md_new_event
+EXPORT_SYMBOL_GPL drivers/md/md-mod 0xdb3561f0	md_do_sync
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0x24935f26	raid6_call
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0xcdc24ab5	raid6_2data_recov
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0xdbab0c01	raid6_datap_recov
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x0349c9bd	ir_codes_proteus_2309_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x0366dcdf	ir_codes_videomate_s350_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x110b053a	ir_codes_pixelview_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x124cb753	ir_codes_encore_enltv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x183fdfdd	ir_codes_gotview7135_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x19b4d61c	ir_codes_nebula_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x19cd2826	ir_codes_behold_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x1a9009d6	ir_codes_dm1105_nec_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x1cb148f5	ir_extract_bits
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x1d187966	ir_input_nokey
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2456e513	ir_decode_pulsedistance
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2cc459b5	ir_codes_flydvb_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2d0e9a49	ir_codes_em_terratec_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3136d8ff	ir_codes_dntv_live_dvbt_pro_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x32b9033b	ir_codes_apac_viewcomp_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3909f4ad	ir_codes_terratec_cinergy_xs_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3a84be27	ir_codes_avermedia_a16d_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x4267d749	ir_codes_budget_ci_old_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x43c89ef4	ir_decode_biphase
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x4491425d	ir_input_init
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x4c1442c1	ir_codes_real_audio_220_32_keys_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x51ba1643	ir_codes_kworld_plus_tv_analog_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x543db4ff	ir_codes_avermedia_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x5e95da31	ir_codes_tt_1500_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x5fbe6515	ir_codes_pinnacle_color_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x61d039d7	ir_codes_behold_columbus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6427a3fb	ir_codes_pinnacle_grey_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x64b02fed	ir_codes_avermedia_dvbt_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6606596a	ir_rc5_timer_keyup
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6809de82	ir_codes_pctv_sedna_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6d6511e7	ir_dump_samples
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6e1aea8c	ir_input_keydown
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x703fc738	ir_codes_avertv_303_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x7283f81d	ir_codes_purpletv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x72c2992e	ir_codes_powercolor_real_angel_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x76d71b8e	ir_codes_dntv_live_dvb_t_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x784e176d	ir_codes_asus_pc39_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x828b3ce5	ir_codes_encore_enltv_fm53_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x8acae3dd	ir_codes_pinnacle_pctv_hd_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x92d1d181	ir_codes_flyvideo_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x94651dab	ir_codes_ati_tv_wonder_hd_600_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x97c35dab	ir_codes_msi_tvanywhere_plus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x9944e2e5	ir_codes_hauppauge_new_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xa69aa6ad	ir_codes_pv951_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xa95157c5	ir_codes_cinergy_1400_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xac15f6c8	ir_codes_kaiomy_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xaff22e87	ir_codes_pixelview_new_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb01a1998	ir_codes_manli_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb0a8ef38	ir_codes_rc5_tv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb57445f7	ir_codes_eztv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb5adb754	ir_codes_cinergy_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xbd3ce6f0	ir_codes_avermedia_cardbus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xbeaccbdc	ir_codes_gadmei_rm008z_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xcba36c62	ir_codes_videomate_tv_pvr_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xd30c491f	ir_codes_norwood_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xdc23fec4	ir_codes_fusionhdtv_mce_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xdd4c0a07	ir_codes_evga_indtube_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xe1101f4d	ir_codes_avermedia_m135a_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xe4140c60	ir_codes_genius_tvgo_a11mce_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xeb9bb08f	ir_codes_npgtech_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xebf345b4	ir_codes_encore_enltv2_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xeec89db8	ir_codes_empty_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xef29c40d	ir_codes_adstech_dvb_t_pci_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf33c155d	ir_codes_msi_tvanywhere_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf3d619ec	ir_codes_iodata_bctv7e_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf4f7a4d6	ir_rc5_timer_end
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf5e15e65	ir_codes_winfast_table
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x17a22811	saa7146_vfree_destroy_pgtable
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x242c8cbd	saa7146_setgpio
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x2590b473	saa7146_vmalloc_build_pgtable
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x3d600fa9	saa7146_pgtable_build_single
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x437689c2	saa7146_pgtable_free
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x5730bb3a	saa7146_unregister_extension
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x7ef68416	saa7146_devices_lock
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x953010ff	saa7146_register_extension
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xcd824035	saa7146_pgtable_alloc
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xcf683cf2	saa7146_devices
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xe1ed41c8	saa7146_i2c_adapter_prepare
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xe3cd9b5c	saa7146_debug
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xfdb07607	saa7146_wait_for_debi_done
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x29e5dab7	saa7146_register_device
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x61621ced	saa7146_unregister_device
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x887619bc	saa7146_start_preview
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x99e7c5ca	saa7146_vv_release
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x9aa69b2d	saa7146_set_hps_source_and_sync
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xc82cc66e	saa7146_stop_preview
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xe2a5e0bb	saa7146_vv_init
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/mt20xx 0x97b92ad8	microtune_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda8290 0x35442463	tda829x_probe
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda8290 0x5fde57bb	tda829x_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda9887 0x4e0a443f	tda9887_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5761 0xd458a55e	tea5761_autodetection
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5761 0xfbbece2a	tea5761_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5767 0xc1f63080	tea5767_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5767 0xf9e17f02	tea5767_autodetection
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tuner-simple 0x683d7adf	simple_tuner_attach
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x017ea7c7	cx231xx_tuner_callback
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x0c61bba4	cx231xx_send_usb_command
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x32368d37	cx231xx_dev_uninit
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x47b794d4	cx231xx_uninit_vbi_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x50c996c8	cx231xx_uninit_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x55be7cd3	cx231xx_dev_init
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x6efce2f9	cx231xx_init_vbi_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x712ae43f	cx231xx_init_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x8002f226	cx231xx_set_alt_setting
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xb5039baa	cx231xx_send_gpio_cmd
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xb68cd471	cx231xx_set_mode
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xde747ad1	cx231xx_capture_start
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x5f35d5b5	saa7134_s_std_internal
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0xb3e66d88	saa7134_ts_qops
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0xbbd707ac	saa7134_s_ctrl_internal
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0xcc563782	saa7134_queryctrl
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0xe66eabfe	saa7134_g_ctrl_internal
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x11e13cd8	v4l2_i2c_new_subdev_cfg
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x5ffc9679	v4l2_i2c_subdev_addr
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x670b94da	v4l2_i2c_new_subdev_board
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xaa12d897	v4l2_i2c_subdev_init
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xf2a353ac	v4l2_i2c_tuner_addrs
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xf5ef842e	v4l_bound_align_image
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-compat-ioctl32 0x8a504745	v4l2_compat_ioctl32
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x0b45a954	v4l2_int_ioctl_1
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x8b5d0b0c	v4l2_int_device_register
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xa5228b24	v4l2_int_device_try_attach_all
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xc182a964	v4l2_int_ioctl_0
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xf16be282	v4l2_int_device_unregister
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x0e4cd763	videobuf_read_one
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x1dbc13e9	videobuf_reqbufs
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x2c49b716	videobuf_dqbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x3ee5ce24	videobuf_poll_stream
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x402d545e	videobuf_streamon
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x4223b970	videobuf_querybuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x4efddf3c	videobuf_queue_to_vmalloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x515634dd	videobuf_next_field
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x59419a1e	videobuf_read_stream
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x61c02e32	videobuf_queue_is_busy
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x68b0f592	videobuf_queue_cancel
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x69fb2336	videobuf_waiton
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x6e2301c4	videobuf_mmap_setup
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x8656687d	videobuf_mmap_free
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x8e8ce41e	videobuf_read_stop
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x913c9b7f	videobuf_mmap_mapper
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x92a21e2d	__videobuf_mmap_setup
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xbe4bb0c6	videobuf_stop
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xc6c6aa00	videobuf_alloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xd62e3298	videobuf_read_start
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xd67560e9	videobuf_streamoff
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xda6d55dc	videobuf_cgmbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xe68e5bc4	videobuf_qbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xeb1e703a	videobuf_iolock
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xf3ab339a	videobuf_queue_core_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x26ff0a70	videobuf_dma_map
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x3c528b45	videobuf_dma_unmap
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x3f1738f8	videobuf_dma_free
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x43a17a5a	videobuf_dma_init_overlay
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x449a2281	videobuf_to_dma
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x782224b6	videobuf_queue_sg_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x7f30d3be	videobuf_dma_init_user
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xa38faed2	videobuf_sg_alloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xa4dd77eb	videobuf_dma_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xbab3137e	videobuf_sg_dma_map
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xd0a5dfa7	videobuf_sg_dma_unmap
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xd8a5d615	videobuf_dma_sync
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xdb1434d0	videobuf_dma_init_kernel
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xeb1ee151	videobuf_vmalloc_to_sg
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0x9517c699	videobuf_vmalloc_free
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0xbaac6a34	videobuf_to_vmalloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0xd0c7a8a0	videobuf_queue_vmalloc_init
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x388be153	v4l2_device_set_name
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x3aad6bc6	v4l2_device_unregister_subdev
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x40518e62	v4l2_device_register_subdev
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x85a8e5f9	v4l2_device_unregister
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0xa1ce65bc	v4l2_device_register
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0xc9d1d56f	v4l2_device_disconnect
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x24c867f0	i2o_dma_realloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x35e6cbef	i2o_dma_map_single
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x41565427	i2o_dma_alloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x470a3636	i2o_dma_map_sg
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x7986f663	i2o_sg_tablesize
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x87838d11	i2o_dma_free
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xa2f75070	i2o_pool_free
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xf731c018	i2o_pool_alloc
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x2da1d575	mc13783_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x6ffd9b67	mc13783_adc_set_ts_status
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x826f9674	mc13783_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0xab20ddf5	mc13783_adc_do_conversion
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0xae77962b	mc13783_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0xb89ccb36	mc13783_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0xd5469436	mc13783_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-adc 0x04d6950a	pcf50633_adc_async_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-adc 0xa879fd6d	pcf50633_adc_sync_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x4ab7d722	pcf50633_write_block
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x4e3976f1	pcf50633_reg_set_bit_mask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x5b81c918	pcf50633_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x6abeec60	pcf50633_irq_mask_get
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x723eefd3	pcf50633_irq_unmask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x7dc92370	pcf50633_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x85d4e287	pcf50633_irq_mask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x899f4ee1	pcf50633_read_block
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x9eebe5b2	pcf50633_reg_clear_bits
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xcec7246f	pcf50633_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xe8d280e8	pcf50633_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x133cd9f7	pcf50633_gpio_set
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x369c8b14	pcf50633_gpio_invert_set
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x733f6722	pcf50633_gpio_power_supply_set
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0xd4ef3a6c	pcf50633_gpio_invert_get
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0xf7abc5c0	pcf50633_gpio_get
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x358dcb69	sm501_find_clock
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x65666b5c	sm501_set_clock
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x8c369550	sm501_misc_control
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0xaf5ebfb5	sm501_modify_reg
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0xc734f52e	sm501_unit_power
+EXPORT_SYMBOL_GPL drivers/mfd/ucb1400_core 0x49604a75	ucb1400_adc_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x2143913c	wm831x_auxadc_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x2c35ea28	wm831x_enable_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x379edb86	wm831x_reg_unlock
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x4509f171	wm831x_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x5933786d	wm831x_bulk_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x5a7bc7b4	wm831x_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x7bf05a63	wm831x_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x7dab26b6	wm831x_isinkv_values
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x82db3712	wm831x_disable_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x9318e98c	wm831x_reg_lock
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xdc46a20c	wm831x_request_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xe950bd98	wm831x_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xfe810496	wm831x_auxadc_read_uv
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x0143903a	wm8350_device_init
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x04db3c82	wm8350_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x0816432f	wm8350_block_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x12077f1c	wm8350_gpio_config
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x298a84fe	wm8350_reg_unlock
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x396112d6	wm8350_read_auxadc
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x49c981ff	wm8350_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x4be25a29	wm8350_mask_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x50c117cf	wm8350_reg_lock
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x62bc273b	wm8350_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x72a59472	wm8350_clear_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x7cc7f0d0	wm8350_unmask_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xa72b2738	wm8350_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xa9f14783	wm8350_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xd99e3cb0	wm8350_block_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xfe816ab1	wm8350_device_exit
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x05aa56a8	wm8400_block_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x46db7a72	wm8400_reset_codec_reg_cache
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x5216ef89	wm8400_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x9ae8667b	wm8400_reg_read
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x41acb6ef	cb710_pci_update_config_reg
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x4327c52e	cb710_sg_dwiter_write_next_block
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0xa2e472d1	cb710_sg_dwiter_read_next_block
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0xa83ccb68	cb710_set_irq_handler
+EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x2df115d4	eeprom_93cx6_multiread
+EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x63d14d2f	eeprom_93cx6_read
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x00cdf974	sdio_writesb
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x076690f6	sdio_enable_func
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x25f0d2a3	sdio_readsb
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x28b0d638	sdio_claim_host
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x365772d6	sdio_release_host
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x3904724d	sdio_readw
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x40d0a063	sdio_f0_writeb
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x549bf08d	sdio_memcpy_fromio
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x5b7948a2	sdio_unregister_driver
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x62de1166	sdio_claim_irq
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x6f7f7732	sdio_disable_func
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x751ba545	sdio_readb
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x84dd6389	sdio_memcpy_toio
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xb243de46	sdio_f0_readb
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xc2e495f9	sdio_writeb
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xcae21b7c	sdio_release_irq
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xce09977f	sdio_readl
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xda60c9f3	sdio_register_driver
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xdc2a7952	sdio_writel
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xeb80020a	sdio_set_block_size
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xf12c344f	sdio_align_size
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xff60258f	sdio_writew
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x8391b938	sdhci_free_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x9a126c36	sdhci_alloc_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xa2035f69	sdhci_remove_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xf3cd1a0c	sdhci_add_host
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x861eade2	cfi_cmdset_0003
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0xaf045641	cfi_cmdset_0001
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0xf9744514	cfi_cmdset_0200
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0002 0x7f2b5313	cfi_cmdset_0002
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0020 0x19c74019	cfi_cmdset_0020
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x55f25495	cfi_qry_present
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x72dabdec	cfi_qry_mode_on
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x83032b88	cfi_qry_mode_off
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2000 0x8a7f6204	DoC2k_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001 0xdc968a0e	DoCMil_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001plus 0xa9dfd9db	DoCMilPlus_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/docecc 0x45937659	doc_decode_ecc
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x11628324	put_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x334d2088	deregister_mtd_parser
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x51b6a76a	get_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x62a20c88	get_mtd_device_nm
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x7163bbd3	kill_mtd_super
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x73e61502	get_sb_mtd
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xa058891f	register_mtd_parser
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xa1a4f3b1	add_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xa322674e	mtd_table
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xa3f86ade	default_mtd_writev
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xafb1bf2e	unregister_mtd_user
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xb449ed11	mtd_table_mutex
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xc0c73a8a	register_mtd_user
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xd3137735	del_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xdba2e732	parse_mtd_partitions
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xdd7ba305	mtd_erase_callback
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x310496bf	deregister_mtd_blktrans
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x3ef40757	del_mtd_blktrans_dev
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x706ca0c9	register_mtd_blktrans
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0xfe704948	add_mtd_blktrans_dev
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x1dc2df2d	nand_release
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x27748fdc	nand_scan_ident
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x4316add1	nand_scan
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x87fe852b	nand_wait_ready
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xfdf6b1aa	nand_scan_tail
+EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0x44561c7d	onenand_scan
+EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0xc70af798	onenand_release
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x05adf79c	ubi_close_volume
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x1c523eb4	ubi_leb_unmap
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x2b3de4a9	ubi_leb_map
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x3a0f690f	ubi_open_volume_nm
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x3e289e81	ubi_do_get_device_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x42801d20	ubi_sync
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x47c4c577	ubi_is_mapped
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x4d7ea3cf	ubi_leb_write
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x5761e279	ubi_leb_change
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x5f9f3cdc	ubi_leb_read
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x6f09ba8a	ubi_register_volume_notifier
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x785d6529	ubi_open_volume
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x9074510f	ubi_leb_erase
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xa3090cee	ubi_get_volume_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xbc505df4	ubi_get_device_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xfd6f0ef9	ubi_unregister_volume_notifier
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x07056d84	can_get_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x1ec0eefd	close_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x222c75fa	can_put_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x25412424	unregister_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x418768b7	can_bus_off
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x856e36c4	alloc_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xa09b0656	free_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xc04c8170	register_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xe6a3aea0	can_free_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xe7d818cc	open_candev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x0f762ea3	free_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xd9db7292	unregister_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xd9df02a6	alloc_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xdc9bd500	sja1000_interrupt
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xfb099477	register_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x0116aa60	mlx4_free_hwq_res
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x089857b8	mlx4_register_interface
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x101b4e0a	mlx4_alloc_hwq_res
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x111cab5f	mlx4_cq_modify
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1b50d69e	mlx4_srq_query
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1dde6a3c	mlx4_SYNC_TPT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x27e79efc	mlx4_srq_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x2ba22448	mlx4_qp_query
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x2ee08279	mlx4_register_mac
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x2fc4ca2b	mlx4_mr_enable
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x383abb37	mlx4_pd_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x43b2544c	mlx4_qp_to_ready
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x46ab845e	mlx4_srq_arm
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x486410b1	mlx4_mr_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x51656607	mlx4_multicast_attach
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x55d0ea51	mlx4_qp_release_range
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x5f05ad60	mlx4_mtt_addr
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x65c2d45a	mlx4_cq_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x6ed200df	mlx4_cq_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x73ffacd7	mlx4_fmr_unmap
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x761217bc	mlx4_pd_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x7ba84a49	mlx4_map_phys_fmr
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x7e1f1e9c	mlx4_mtt_init
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x81bfcc4d	mlx4_qp_modify
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x884e60f9	mlx4_unregister_mac
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x8f3e24be	mlx4_db_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x8f51bb50	mlx4_qp_reserve_range
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x90e11154	mlx4_fmr_enable
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x92c8febd	__mlx4_cmd
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x95f70427	mlx4_db_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9e024b29	mlx4_qp_remove
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa17674d3	mlx4_srq_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa4b4441c	mlx4_uar_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa9dc903a	mlx4_uar_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb236c91c	mlx4_unregister_interface
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb628b9b0	mlx4_buf_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb7881589	mlx4_write_mtt
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xbd579c39	mlx4_unregister_vlan
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xbf17c1d3	mlx4_free_cmd_mailbox
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc40827b8	mlx4_INIT_PORT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xca638113	mlx4_alloc_cmd_mailbox
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd0967cc4	mlx4_register_vlan
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd0ce4949	mlx4_mtt_cleanup
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd26131cf	mlx4_multicast_detach
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd3f59019	mlx4_qp_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xdb706434	mlx4_buf_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xdf5ae2ab	mlx4_qp_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe19cc17c	mlx4_CLOSE_PORT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe915f605	mlx4_fmr_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe97a7ff0	mlx4_cq_resize
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf7e53e0b	mlx4_fmr_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xfcd4e392	mlx4_mr_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xfd185f4c	mlx4_buf_write_mtt
+EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0x2ee2ccfe	usbnet_cdc_unbind
+EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0x8a52be04	usbnet_generic_cdc_bind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x09c8dfb6	rndis_unbind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x3df462f6	rndis_rx_fixup
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x6bc5f077	rndis_status
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xbe463c50	rndis_command
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xcb793215	rndis_tx_fixup
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xea15ad8e	generic_rndis_bind
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x10347389	usbnet_purge_paused_rxq
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x16fd5718	usbnet_defer_kevent
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x1ddfce96	usbnet_skb_return
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x352c83de	usbnet_tx_timeout
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x3a833dd2	usbnet_get_endpoints
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x42e10bff	usbnet_start_xmit
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x49f663ee	usbnet_nway_reset
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x50efb918	usbnet_unlink_rx_urbs
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x90e360c0	usbnet_disconnect
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x96b64865	usbnet_set_msglevel
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x9f33c1af	usbnet_get_drvinfo
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x9fd56573	usbnet_get_link
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x9fdb8de2	usbnet_get_msglevel
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xa63e48cd	usbnet_get_ethernet_addr
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xacd86a63	usbnet_pause_rx
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xae2d8ce5	usbnet_suspend
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xbe19d429	usbnet_get_settings
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xc15d335c	usbnet_open
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xc7eec1f8	usbnet_set_settings
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xce0c829a	usbnet_resume_rx
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xd1e25071	usbnet_probe
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xe0d2e928	usbnet_stop
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xe2078248	usbnet_resume
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xf605b92a	usbnet_change_mtu
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x0665b012	i2400m_setup
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x345dcb9d	i2400m_queue_work
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x4e6bf8b2	i2400m_netdev_setup
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x55221c8f	i2400m_tx_msg_sent
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x5d5edd9f	i2400m_rx
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x69d9c19b	i2400m_dev_bootstrap
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x6c09ede7	i2400m_cmd_get_state
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x78f054eb	i2400m_dev_reset_handle
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x8a47d930	i2400m_release
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xb00b793c	i2400m_bm_cmd_prepare
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xbfb04f67	i2400m_tx
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xc4f7a530	i2400m_cmd_enter_powersave
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xcb780c63	i2400m_set_init_config
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xea240b3f	i2400m_tx_msg_get
+EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0x201d3462	libipw_rx_any
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x030b081f	lbs_start_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x03e657a7	lbs_send_tx_feedback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x0c6d528b	lbs_remove_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x12750627	lbs_stop_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x30768a0c	lbs_host_to_card_done
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x946126d0	__lbs_cmd
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xa1ea00ee	lbs_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xb6349f47	lbs_process_rxed_packet
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xc93e3ba7	lbs_cmd_802_11_rate_adapt_rateset
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xcac8a10d	lbs_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xcc1ac414	lbs_add_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xd74520e9	lbs_cmd_copyback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xd7c19fb5	lbs_notify_command_response
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf64277de	lbs_debug
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf8b69de9	lbs_host_sleep_cfg
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xfa8e25da	lbs_queue_event
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x3e472685	lbtf_send_tx_feedback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x4e6e5528	__lbtf_cmd
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x84b1418b	lbtf_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xabdb0eae	lbtf_add_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xb591458e	lbtf_cmd_copyback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xdec05db4	lbtf_bcn_sent
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xee8eaa43	lbtf_remove_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xeea946ed	lbtf_cmd_response_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0xaf518366	if_usb_reset_device
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0xf720451e	if_usb_prog_firmware
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x5974e988	p54_parse_eeprom
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x72fc50ca	p54_read_eeprom
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x8665173e	p54_unregister_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xad8e3fc9	p54_parse_firmware
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xb69ef5e8	p54_free_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xb99dbbfa	p54_register_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xbd9e0308	p54_init_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xc3c3e559	p54_free_skb
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xe1d60fe4	p54_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x00cec3da	rt2x00mac_set_key
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x12cbbce2	rt2x00mac_bss_info_changed
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x1ae72dbb	rt2x00lib_beacondone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x291e3312	rt2x00mac_set_tim
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x30d5e1bb	rt2x00mac_rfkill_poll
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x517f3d69	rt2x00lib_rxdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x5314fa53	rt2x00lib_remove_dev
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x565ecce4	rt2x00mac_configure_filter
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x577a407f	rt2x00lib_probe_dev
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x81f93893	rt2x00mac_remove_interface
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x825800d3	rt2x00queue_get_entry
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x8efea87d	rt2x00mac_tx
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x9459765f	rt2x00mac_start
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x9f71d284	rt2x00queue_map_txskb
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xa9f1205e	rt2x00mac_conf_tx
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xb9de38a3	rt2x00lib_txdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xc8982e31	rt2x00mac_stop
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xd0a0933d	rt2x00queue_get_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xdcf26157	rt2x00mac_config
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xe74e3125	rt2x00mac_add_interface
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xe8869e40	rt2x00mac_get_stats
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xf822fba0	rt2x00mac_get_tx_stats
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x1f0c2259	rt2x00pci_rxdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x78647ffe	rt2x00pci_probe
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x8120b2f2	rt2x00pci_remove
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x94b13b32	rt2x00pci_uninitialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xbde28f6d	rt2x00pci_initialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xd1e43880	rt2x00pci_regbusy_read
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xe4afb1fb	rt2x00pci_write_tx_data
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x26722abd	rt2x00usb_disable_radio
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x2925509b	rt2x00usb_regbusy_read
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x48a020ca	rt2x00usb_vendor_request
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x55913797	rt2x00usb_kick_tx_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x6d4da6d7	rt2x00usb_disconnect
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x81da7432	rt2x00usb_vendor_request_buff
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x9afd2653	rt2x00usb_vendor_req_buff_lock
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x9f5e963f	rt2x00usb_uninitialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xa117bc04	rt2x00usb_initialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xbbc0ff6a	rt2x00usb_clear_entry
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xd6137a79	rt2x00usb_vendor_request_large_buff
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xdb7049c9	rt2x00usb_kill_tx_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xec6d3400	rt2x00usb_probe
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xf9661b0c	rt2x00usb_write_tx_data
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0x28854f7b	wl1251_init_ieee80211
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0x43bd975e	wl1251_alloc_hw
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0xe2c9d34f	wl1251_free_hw
+EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0x42c9cd0d	pcf50633_mbc_usb_curlim_set
+EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0x6f5abc88	pcf50633_mbc_get_status
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x07f55c7c	wm8350_ldo_set_slot
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x62bfceca	wm8350_dcdc_set_slot
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x65ab2897	wm8350_register_regulator
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xa2eeaea9	wm8350_dcdc25_set_mode
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xbcea7eee	wm8350_isink_set_flash
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xe8a2c25d	wm8350_register_led
+EXPORT_SYMBOL_GPL drivers/regulator/wm8400-regulator 0x4db17cbb	wm8400_register_regulator
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x027bb96c	scsi_unregister_device_handler
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x18683afb	scsi_register_device_handler
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x561e6634	scsi_dh_activate
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x593a36c2	scsi_dh_handler_exist
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x5f91fd8b	scsi_dh_attach
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0xb2301ed1	scsi_dh_set_params
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0xf3ec11f5	scsi_dh_detach
+EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x374c1e1c	fcoe_wwn_from_mac
+EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0xf5471478	fcoe_libfc_config
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0290f0d5	iscsi_host_remove
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x067e57b4	iscsi_conn_failure
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x12a4a732	iscsi_session_recovery_timedout
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x141b9ef8	iscsi_host_add
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x1806b25d	iscsi_put_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x1a02a818	iscsi_session_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x1a5c1e48	iscsi_itt_to_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x49f03126	iscsi_verify_itt
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x54631079	iscsi_itt_to_ctask
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5580c172	iscsi_requeue_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x642484ea	iscsi_host_set_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x6515aca1	iscsi_suspend_tx
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x6a6e377f	iscsi_set_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x6a984705	iscsi_conn_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x6b167073	iscsi_queuecommand
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x6ca9b32e	iscsi_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x6da05fbb	iscsi_conn_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x7301ae5e	iscsi_suspend_queue
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x81f96564	iscsi_conn_bind
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x821bbd9d	iscsi_conn_send_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x85c39690	iscsi_complete_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x872d8625	iscsi_session_failure
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x93086cea	iscsi_pool_init
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x9491637e	iscsi_host_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x9cb03893	iscsi_change_queue_depth
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xaf3d0dc2	iscsi_session_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb016ea6a	iscsi_session_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xbea76ac0	iscsi_pool_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xc39be002	iscsi_eh_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xc3d1cdc9	iscsi_complete_scsi_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xc5365c04	iscsi_eh_device_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xc5d915a9	iscsi_host_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xc7902792	__iscsi_get_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xc7d55f38	iscsi_prep_data_out_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xcb2fb431	iscsi_conn_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xd320386b	iscsi_host_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe5e39af7	iscsi_conn_stop
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xed1f7cc7	iscsi_eh_target_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xef4f6b06	iscsi_update_cmdsn
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xefa98b2a	iscsi_conn_start
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xefbd8299	__iscsi_complete_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf0e58942	iscsi_conn_queue_work
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x022feeed	iscsi_tcp_recv_segment_is_hdr
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x21435346	iscsi_segment_seek_sg
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x298b1039	iscsi_tcp_r2tpool_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x35080741	iscsi_tcp_task_xmit
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x38bee306	iscsi_tcp_conn_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x438bfae8	iscsi_tcp_segment_done
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x5006592b	iscsi_tcp_conn_get_stats
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x557d594b	iscsi_tcp_hdr_recv_prep
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x59725488	iscsi_segment_init_linear
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x65b8e5d4	iscsi_tcp_cleanup_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x7ed4946e	iscsi_tcp_conn_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x8be63278	iscsi_tcp_recv_skb
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xbe48aa60	iscsi_tcp_r2tpool_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xc6244bf4	iscsi_tcp_task_init
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xcd1997fa	iscsi_tcp_segment_unmap
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xecc8fc79	iscsi_tcp_dgst_header
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x0339572a	sas_eh_device_reset_handler
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x0637c9fc	sas_ioctl
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x0ce0d51d	sas_queuecommand
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x36a36dc5	sas_slave_configure
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x3801dd85	sas_domain_attach_transport
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x5174ebc2	sas_register_ha
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x5b4a4df5	sas_target_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x5c431dd7	sas_ssp_task_response
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x61fad672	sas_unregister_ha
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x6ad6a21e	sas_phy_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x719de837	sas_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x7303137c	sas_task_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x9c8e604d	sas_eh_bus_reset_handler
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xa198a2fb	sas_change_queue_type
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xa3c17abd	sas_slave_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xb5f702d4	sas_domain_release_transport
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xbc3d1bd3	sas_find_local_phy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xc899aeeb	sas_slave_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xd017a44e	sas_request_addr
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xd2ea2ed5	sas_bios_param
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xdabe6ed5	__sas_task_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xde1308c3	sas_change_queue_depth
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xe6513f07	sas_phy_enable
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x7a588384	srp_iu_get
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x8bb0e82e	srp_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x9d2ac84d	srp_target_free
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xb5d17dad	srp_transfer_data
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xcd8b197f	srp_cmd_queue
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xf2725ae7	srp_iu_put
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x011060ec	scsi_schedule_eh
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x01ff2b24	scsi_mode_select
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x170201d8	scsi_flush_work
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x1738f3e8	scsi_bus_type
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x23d49954	scsi_get_vpd_page
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x26c90ea4	scsi_eh_get_sense
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x35d8c94a	sdev_evt_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x3a6540c6	scsi_nl_sock
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x4d341693	__scsi_get_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x50a96572	scsi_target_block
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x5236fb6b	sdev_evt_send
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x57c97517	scsi_target_unblock
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x58150913	scsi_internal_device_block
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x5c630172	scsi_nl_add_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x7e275ea8	scsi_complete_async_scans
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x85789464	scsi_internal_device_unblock
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x9cd612d8	sdev_evt_send_simple
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xa3c4b319	scsi_nl_add_driver
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xbae34c27	scsi_nl_remove_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xbcafdfe0	scsi_queue_work
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xc399468f	scsi_nl_remove_driver
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xd9a8ba55	scsi_eh_ready_devs
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xeae74760	scsi_nl_send_transport_msg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x6049f85a	scsi_tgt_queue_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x646845ae	scsi_host_put_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x87cac7a2	scsi_tgt_it_nexus_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xa7de6b86	scsi_tgt_tsk_mgmt_request
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xa99d9ce9	scsi_tgt_it_nexus_create
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xcc10d5bd	scsi_tgt_alloc_queue
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xf7053647	scsi_tgt_cmd_to_host
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xfbde3165	scsi_tgt_free_queue
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xffb15353	scsi_host_get_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x017b5535	iscsi_unregister_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x04a8ca64	iscsi_recv_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x0d591200	iscsi_offload_mesg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x147cce40	iscsi_destroy_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x22c2d968	iscsi_session_chkready
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x27e9fbf5	iscsi_destroy_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x4761061a	iscsi_create_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x5f51da3b	iscsi_block_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x604ef0e0	iscsi_destroy_conn
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x70b4f922	iscsi_lookup_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x72d8422c	iscsi_remove_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x8a4844c1	iscsi_free_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xa4f8eeb5	iscsi_session_event
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xaf0ca322	iscsi_create_conn
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xb1b510cd	iscsi_register_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xb8cd79b9	iscsi_scan_finished
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xbd14296c	iscsi_host_for_each_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xc5f92f54	iscsi_add_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xd4cc5541	iscsi_conn_error_event
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xed89d74b	iscsi_alloc_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xeffda2cc	iscsi_unblock_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xf0ac086c	iscsi_create_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0x0ef06974	spi_populate_ppr_msg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xa0c71dac	spi_populate_sync_msg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xcffa2aff	spi_populate_width_msg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x705cdcf2	srp_remove_host
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x9cc33093	srp_rport_add
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xbfb52871	srp_rport_del
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xbfe99a7d	srp_release_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xf3eb30ad	srp_attach_transport
+EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0x103d3783	pciserial_resume_ports
+EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0x49636aac	pciserial_suspend_ports
+EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0x700ae3eb	pciserial_remove_ports
+EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0xa03a91c0	pciserial_init_ports
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x1bffef72	spi_bitbang_cleanup
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x6245d7c2	spi_bitbang_start
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x650d3c40	spi_bitbang_stop
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xab1ba80b	spi_bitbang_setup_transfer
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xdddf09fa	spi_bitbang_setup
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xe20ac663	spi_bitbang_transfer
+EXPORT_SYMBOL_GPL drivers/uio/uio 0x2e0bb101	__uio_register_device
+EXPORT_SYMBOL_GPL drivers/uio/uio 0x49bc47f1	uio_unregister_device
+EXPORT_SYMBOL_GPL drivers/uio/uio 0x592e8793	uio_event_notify
+EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0x2238da6c	usbatm_usb_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0xbcac8b11	usbatm_usb_probe
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x01d3379e	usb_hcd_giveback_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x0d697af4	usb_put_hcd
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x0db653a8	usb_driver_set_configuration
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x13209d07	usb_get_intf
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x144b252d	usb_sg_init
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x19518300	usb_interrupt_msg
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x19a304ba	usb_disabled
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x1d05bf06	usb_reset_endpoint
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x20596565	usb_wait_anchor_empty_timeout
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x20d768ee	usb_unanchor_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x2332652e	usb_hcd_pci_shutdown
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x23524a02	usb_buffer_map_sg
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x2569a25a	usb_free_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x26cd741d	usb_deregister_dev
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x31fa671b	usb_mon_register
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x331092fb	usb_deregister
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x39ed9efe	usb_unlink_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x3be57fb8	usb_anchor_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x3be89d3c	usb_register_notify
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x46c72860	usb_bus_list_lock
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x4d905855	usb_driver_claim_interface
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x5281b906	usb_create_hcd
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x5737a493	usb_queue_reset_device
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x5bb3c465	usb_driver_release_interface
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x5d73255d	usb_hc_died
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x7030f3af	usb_string
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x71dbaab3	usb_hub_clear_tt_buffer
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x75c543a2	usb_register_device_driver
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x762f64bf	ehci_cf_port_reset_rwsem
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x7678c83e	usb_alloc_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x7694feba	usb_get_hcd
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x788404a9	usb_ifnum_to_if
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x79d2f8a1	usb_anchor_empty
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x7e64181d	usb_calc_bus_time
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x7ee9f8b3	usb_clear_halt
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x804bbe9c	usb_get_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x83206fbd	usb_hcd_link_urb_to_ep
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x85057958	usb_add_hcd
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x8561cbe9	usb_poison_anchored_urbs
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x860c35c0	usb_get_dev
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x882ca2c0	usb_control_msg
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x8a29eb93	usb_get_current_frame_number
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x8b82cc92	usb_put_intf
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x8d2831ad	usb_unlink_anchored_urbs
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x91c4bd62	usb_init_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x924ea79e	usb_buffer_alloc
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x92873732	usb_deregister_device_driver
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x94a26490	usb_register_dev
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x960ff80b	usb_find_interface
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x96b1e0af	usb_poison_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x987da330	usb_debug_root
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x9924c496	__usb_get_extra_descriptor
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x9bd246a8	usb_hcd_pci_remove
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x9c9c48c5	usb_sg_wait
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xa28144b2	usb_hcd_pci_probe
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xa29a1214	usb_scuttle_anchored_urbs
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xace5c0fc	usb_bus_list
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xadbff6dd	usb_buffer_unmap_sg
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xafe8cc23	usb_hcd_unlink_urb_from_ep
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xb5c1c5ce	usb_hcd_poll_rh_status
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xb5d1af83	usb_ep0_reinit
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xb5ff69d8	usb_reset_device
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xb61d81fe	usb_remove_hcd
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xb7b7cafc	usb_get_descriptor
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xbce69904	usb_sg_cancel
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xbfe7385b	usb_kill_anchored_urbs
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xc17515d7	usb_hcds_loaded
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xc45704ff	usb_register_driver
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xc596d966	usb_lock_device_for_reset
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xcd387ab5	usb_set_interface
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xcf317f3a	usb_put_dev
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xcfcaeab4	usb_unpoison_anchored_urbs
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xd7614fae	usb_get_status
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xdec03ced	usb_set_device_state
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xdf7df2e2	usb_kill_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xe27856f5	usb_get_from_anchor
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xe6e38bae	usb_match_id
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xe80e79b9	usb_buffer_free
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xe9587909	usb_unregister_notify
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xedcd7d8c	usb_altnum_to_altsetting
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xeed511c7	usb_submit_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xf09930c7	usb_hcd_check_unlink_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xf22d2144	usb_hcd_platform_shutdown
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xf2778837	usb_store_new_id
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xf5dcde1d	usb_bulk_msg
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xfc2077c8	usb_reset_configuration
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xfed11ed1	usb_mon_deregister
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xff7fcee9	usb_match_one_id
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xffb1f02b	usb_unpoison_urb
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x102fc55a	usb_ftdi_elan_edset_empty
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x143e968f	usb_ftdi_elan_write_pcimem
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x1e02830e	usb_ftdi_elan_edset_setup
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x1ef5d1d0	usb_ftdi_elan_edset_flush
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x409f27bf	usb_ftdi_elan_edset_single
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x8c257d1d	usb_ftdi_elan_read_pcimem
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xc0d5a468	usb_ftdi_elan_edset_output
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xc28050ad	usb_ftdi_elan_edset_input
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xd2bdc983	ftdi_elan_gone_away
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x06693ec9	usb_serial_generic_open
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x101e65c1	usb_serial_deregister
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x153a86c3	ezusb_writememory
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x1a4fafd7	usb_serial_handle_sysrq_char
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x1b7a31de	usb_serial_register
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x4b7d0ab9	usb_serial_probe
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x6d1f2ba0	usb_serial_generic_write
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x76246c39	ezusb_set_reset
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x7a2d8ec8	usb_serial_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x7caee484	usb_serial_generic_write_bulk_callback
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xc5ec3ce2	usb_serial_handle_dcd_change
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xd627a25a	usb_serial_generic_resume
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xde32497a	usb_serial_generic_read_bulk_callback
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xde510948	usb_serial_port_softint
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xebe494dd	usb_serial_handle_break
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xf8b506bf	usb_serial_generic_resubmit_read_urb
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x0be13004	usb_storage_usb_ids
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x0fe5c6bc	usb_stor_probe1
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x126dc997	usb_stor_ctrl_transfer
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x178aa7ba	usb_stor_CB_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1bc3edc2	usb_stor_sense_invalidCDB
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1ee6b5cc	usb_usual_ignore_device
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x215f17be	usb_stor_probe2
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x342b26d0	usb_stor_clear_halt
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x368c691b	usb_stor_transparent_scsi_command
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x3700a87c	usb_stor_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x3bc540f4	usb_stor_control_msg
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x4f0868e8	usb_stor_bulk_srb
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x68739813	usb_stor_Bulk_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x7d321dce	usb_stor_pre_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x8152d6e9	usb_stor_bulk_transfer_sg
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x96481738	usb_stor_Bulk_transport
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xbb2208ec	usb_stor_post_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xc14a0548	usb_stor_access_xfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xc1db0a13	usb_stor_CB_transport
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xdda5fe22	fill_inquiry_response
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xe57321ab	usb_stor_bulk_transfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xf798cdb5	usb_stor_set_xfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x222143a5	rpipe_ep_disable
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x32d0bc62	wa_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x5b0fc154	wa_urb_enqueue_run
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x8668d134	rpipe_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xdba156ec	__wa_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xe6465b28	wa_urb_enqueue
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xfe25f23f	wa_urb_dequeue
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x05761a10	wusbhc_chid_set
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x0bb6bf5e	wusb_cluster_id_get
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x169e6d01	wusbhc_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x1d7f835f	wusbhc_rh_status_data
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x39e18881	wusbhc_b_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x63ceace2	wusbhc_mmcie_set
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x66f8ea41	wusbhc_giveback_urb
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x676ebe51	wusbhc_rh_control
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x6bc23cd8	wusbhc_rh_suspend
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x6d675f82	__wusb_dev_get_by_usb_dev
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x71234326	wusbhc_mmcie_rm
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x979fd671	wusbhc_handle_dn
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb725d128	wusb_cluster_id_put
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb72be5a8	wusbhc_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xc4b8692c	wusbhc_rh_start_port_reset
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xdd0d5c3a	wusbhc_reset_all
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xdf6e4f08	wusb_dev_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xe8c9a647	wusbhc_b_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xea837974	wusbhc_rh_resume
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf770a6b4	wusbd
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xfe2e17d7	wusb_et_name
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x0406075d	i1480_fw_upload
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x4f8ac08d	i1480_rceb_check
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x604339bb	i1480_cmd
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x76b413fc	uwb_phy_rate_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x79c561b5	uwb_pca_base_priority_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x91b6ddf4	uwb_pca_base_priority_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xa3d55124	uwb_ack_policy_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xafab5c2a	uwb_rts_cts_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xbae79a9b	uwb_ack_policy_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xbbba65da	uwb_rts_cts_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xbe252446	uwb_phy_rate_show
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x02ca7bb6	umc_match_pci_id
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x0a85edc9	umc_driver_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x17af0b85	umc_bus_type
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x6106474b	umc_controller_reset
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x61344699	umc_device_register
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x8740a9c5	umc_device_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xa0c5ed30	__umc_driver_register
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xfabe1ac1	umc_device_create
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x033a03ca	__uwb_rc_try_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0f982d4f	uwb_dev_try_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x16bed7da	uwb_rc_ie_rm
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x177a7274	uwb_notifs_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x18dfefd7	uwb_est_find_size
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x1a068299	uwb_rc_reset_all
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x1d9d21fd	uwb_radio_start
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x298f6286	uwb_rc_cmd_async
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2c60d9a4	uwb_rsv_establish
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x38836eae	uwb_pal_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x3bca92a1	uwb_pal_init
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x3d3f6c44	uwb_rc_add
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x43ab7004	uwb_rc_alloc
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x44a06389	uwb_rc_put
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x464fed40	uwb_rc_get_by_grandpa
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4d57ae3c	uwb_rsv_type_str
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x597d75b2	uwb_notifs_deregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x632c4588	uwb_rsv_get_usable_mas
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6339ccd9	uwb_dev_for_each
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6a981003	uwb_rc_rm
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6b9377c5	uwb_ie_next
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x843e0f05	uwb_rc_cmd
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x8cb42db6	__uwb_addr_print
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x94232a65	uwb_rc_neh_error
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x98413234	uwb_rsv_state_str
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x9d643fd9	uwb_rsv_terminate
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x9e925d7d	uwb_rc_get_by_dev
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xacae2087	uwb_pal_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb86b7a56	uwb_rc_dev_addr_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xba6ab888	uwb_rsv_create
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xbd1a637c	uwb_rsv_accept
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xc65d9cde	uwb_rsv_modify
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xcb97bc73	uwb_rc_ie_add
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xcbbf6fac	uwb_rc_post_reset
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd6f5d73a	uwb_rsv_destroy
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xdbbcd8b5	uwb_rc_mac_addr_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xeb4cab9a	uwb_est_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xee4be536	uwb_rc_pre_reset
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf0354bba	uwb_rc_neh_grok
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf70f5627	uwb_rc_vcmd
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf7ca313a	uwb_est_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf9db277a	uwb_rc_init
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xff842bc4	uwb_radio_stop
+EXPORT_SYMBOL_GPL drivers/uwb/whci 0x95416a47	whci_wait_for
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x0aba9781	wlp_dev_model_nr_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x18f77bc7	wlp_dev_serial_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x19438386	wlp_eda_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x1b3656fd	wlp_prepare_tx_frame
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x216dd1b6	wlp_dev_model_nr_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x2ffa92d8	wlp_wss_activate_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x32914390	wlp_dev_model_name_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x3513e0f6	wlp_dev_name_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x37d6c62f	wlp_dev_serial_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x3e7a69f6	wlp_wss_activate_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x4ae5355d	wlp_uuid_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x4c9c51da	wlp_dev_prim_OUI_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x4e7da66d	wlp_dev_prim_OUI_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x4f8d2134	wlp_dev_prim_subcat_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x561211f8	wlp_dev_prim_category_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x5c5c357d	wlp_dev_name_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x5cea2dbb	wlp_dev_prim_subcat_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x880d7b98	wlp_receive_frame
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x96868ee7	wlp_remove
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x9b6ba999	wlp_dev_prim_OUI_sub_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xa1734fbe	wlp_dev_prim_category_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xb03db69a	wlp_uuid_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xc2942e3f	wlp_eda_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xc4dab120	wlp_reset_all
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xceba412d	wlp_wss_remove
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xdef67319	wlp_neighborhood_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xea26430d	wlp_dev_manufacturer_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xf1602d85	wlp_dev_prim_OUI_sub_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xf17d238a	wlp_dev_manufacturer_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xf5f05b79	wlp_setup
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xf89e920f	wlp_wss_setup
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xfc667224	wlp_dev_model_name_store
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x0b9fca78	ili9320_shutdown
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x6eb4f26b	ili9320_write
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x742f84bb	ili9320_write_regs
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xaec74ee2	ili9320_remove
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xce13840d	ili9320_probe_spi
+EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0x99e8faf4	fb_sys_write
+EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0xa2f5b735	fb_sys_read
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x0ef16075	w1_touch_block
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x3cda263d	w1_read_8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x3f1267a3	w1_next_pullup
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x55f584b6	w1_read_block
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x567eedaa	w1_write_8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x7c2f2afb	w1_calc_crc8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xc2f1edf9	w1_write_block
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xde564bd0	w1_reset_select_slave
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xf0f5263c	w1_reset_bus
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x0864c4a4	dlm_new_lockspace
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x6695472c	dlm_posix_lock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x9321df95	dlm_lock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x9916aa66	dlm_posix_get
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xbcd5c11f	dlm_posix_unlock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xcf9f3328	dlm_release_lockspace
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xdc583c08	dlm_unlock
+EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0x0d3decc8	exportfs_encode_fh
+EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0xbf46f52c	exportfs_decode_fh
+EXPORT_SYMBOL_GPL fs/fat/fat 0x1d001a67	fat_build_inode
+EXPORT_SYMBOL_GPL fs/fat/fat 0x1d1be120	fat_scan
+EXPORT_SYMBOL_GPL fs/fat/fat 0x28415fa9	fat_free_clusters
+EXPORT_SYMBOL_GPL fs/fat/fat 0x3c5708f2	fat_time_unix2fat
+EXPORT_SYMBOL_GPL fs/fat/fat 0x3ea02151	fat_detach
+EXPORT_SYMBOL_GPL fs/fat/fat 0x52eee716	fat_alloc_new_dir
+EXPORT_SYMBOL_GPL fs/fat/fat 0x557e0e52	fat_getattr
+EXPORT_SYMBOL_GPL fs/fat/fat 0x595cb58f	fat_get_dotdot_entry
+EXPORT_SYMBOL_GPL fs/fat/fat 0x6554e7fc	fat_attach
+EXPORT_SYMBOL_GPL fs/fat/fat 0x7466ad99	fat_setattr
+EXPORT_SYMBOL_GPL fs/fat/fat 0x74bf58d8	fat_fill_super
+EXPORT_SYMBOL_GPL fs/fat/fat 0x833355da	fat_dir_empty
+EXPORT_SYMBOL_GPL fs/fat/fat 0x8640dc03	fat_add_entries
+EXPORT_SYMBOL_GPL fs/fat/fat 0xbdfa35bf	fat_search_long
+EXPORT_SYMBOL_GPL fs/fat/fat 0xd02d1b11	fat_sync_inode
+EXPORT_SYMBOL_GPL fs/fat/fat 0xd197f1a5	fat_fs_error
+EXPORT_SYMBOL_GPL fs/fat/fat 0xdf8c58a7	fat_flush_inodes
+EXPORT_SYMBOL_GPL fs/fat/fat 0xdfbffc7e	fat_remove_entries
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x17ce645d	locks_end_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x1a618932	nlmsvc_unlock_all_by_ip
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x1e1cc1cf	nlmsvc_unlock_all_by_sb
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x4c4d9e93	nlmclnt_done
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x6a6c287d	nlmsvc_ops
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x6f959b35	locks_in_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x96877ac4	locks_start_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xa7b91a7b	lockd_down
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xe763d1fd	nlmclnt_init
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xf6933c48	lockd_up
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xfb057eba	nlmclnt_proc
+EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0x1ea72c2d	nfsacl_decode
+EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0xa96f4c0c	nfsacl_encode
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1b89c6ee	o2hb_fill_node_map
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1d747ce3	o2hb_check_node_heartbeating
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x28fa0a5d	o2nm_get_node_by_ip
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x33df6dfe	o2hb_unregister_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x36418553	o2net_send_message
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x4900035b	o2hb_stop_all_regions
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x4f63a416	o2hb_register_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x521e0726	o2net_send_message_vec
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x660afdb9	o2hb_setup_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x6d68e271	o2nm_node_get
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x81a17396	mlog_and_bits
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa82a8645	o2nm_this_node
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa87bc9e7	o2nm_configured_node_map
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xae808bac	o2net_register_handler
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xb69536dc	o2nm_node_put
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xbaeb4700	o2hb_check_node_heartbeating_from_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xd60f2c6c	o2hb_check_local_node_heartbeating
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf1a5611d	o2net_unregister_handler_list
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf1cec04b	o2nm_get_node_by_num
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf56c2017	mlog_not_bits
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x4672f8bc	dlm_register_domain
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x7315fa45	dlmlock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x7a1211f8	dlm_setup_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xa4cd9947	dlm_register_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd7ba575e	dlm_errmsg
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd8fa57a6	dlm_unregister_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xddb9bee4	dlm_print_one_lock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xe0c379d3	dlmunlock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xee335a70	dlm_unregister_domain
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xfb86b96f	dlm_errname
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0562c415	ocfs2_cluster_this_node
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x06379db6	ocfs2_dlm_lvb_valid
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0e27f909	ocfs2_dlm_lock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x1cac63b1	ocfs2_plock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x21db5b88	ocfs2_cluster_disconnect
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4a1f6fe9	ocfs2_cluster_connect
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4d3af7fa	ocfs2_cluster_hangup
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x5840e6c8	ocfs2_stack_glue_register
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x81c85a68	ocfs2_dlm_lock_status
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x91fab465	ocfs2_dlm_lvb
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x963932a3	ocfs2_stack_glue_set_locking_protocol
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xa7d5c1c0	ocfs2_dlm_unlock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xbbc4ef97	ocfs2_stack_supports_plocks
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xd066711e	ocfs2_dlm_dump_lksb
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xf18b85bd	ocfs2_stack_glue_unregister
+EXPORT_SYMBOL_GPL lib/lzo/lzo_compress 0x2e1d43cf	lzo1x_1_compress
+EXPORT_SYMBOL_GPL lib/lzo/lzo_decompress 0x2a1538ca	lzo1x_decompress_safe
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x300d7e57	free_rs
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x6fbb3bd9	init_rs_non_canonical
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xabda1e2e	decode_rs16
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xb050f329	init_rs
+EXPORT_SYMBOL_GPL net/802/garp 0x06b240e9	garp_request_join
+EXPORT_SYMBOL_GPL net/802/garp 0x398e3d92	garp_init_applicant
+EXPORT_SYMBOL_GPL net/802/garp 0x3c2fcd25	garp_request_leave
+EXPORT_SYMBOL_GPL net/802/garp 0x703c0ede	garp_unregister_application
+EXPORT_SYMBOL_GPL net/802/garp 0xca060dca	garp_register_application
+EXPORT_SYMBOL_GPL net/802/garp 0xfe4815c3	garp_uninit_applicant
+EXPORT_SYMBOL_GPL net/802/stp 0xc20d4730	stp_proto_unregister
+EXPORT_SYMBOL_GPL net/802/stp 0xec60bc75	stp_proto_register
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x0cffd6e0	dccp_reqsk_send_ack
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x16ac82c0	dccp_sync_mss
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x1d99d49a	dccp_timestamp
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x214a57be	dccp_poll
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x28c78123	compat_dccp_getsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x34e74bec	dccp_shutdown
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x433441f4	dccp_orphan_count
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x4657b06e	dccp_create_openreq_child
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x4cdd391d	dccp_feat_list_purge
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x4f50103e	dccp_ioctl
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x56ea266a	dccp_state_name
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x5eae4c38	dccp_connect
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x71b2ef70	dccp_recvmsg
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x7266f608	dccp_setsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x765efd1e	dccp_ctl_make_reset
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x789671c3	compat_dccp_setsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x7e91a186	dccp_make_response
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x7fa62bc2	dccp_send_sync
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x86be7924	dccp_packet_name
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x8812b24e	dccp_disconnect
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x89327d44	dccp_reqsk_init
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x8b7d8caf	dccp_statistics
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xa3f5a764	dccp_set_state
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xa61f636d	dccp_rcv_established
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xafec0cae	inet_dccp_listen
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xb5f5a44c	dccp_close
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xb80050c4	dccp_hashinfo
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xba5d756b	dccp_send_ack
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xbdfbb141	dccp_insert_option
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xd45e88b8	dccp_child_process
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xd4f4ca6f	dccp_init_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xd883e132	dccp_check_req
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xd9239c30	dccp_getsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xda691cb0	dccp_sendmsg
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xe019ef10	dccp_done
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xec2e6e67	dccp_rcv_state_process
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xf1827cbd	dccp_death_row
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xf281f02d	dccp_insert_option_elapsed_time
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xf6933b0f	dccp_insert_option_timestamp
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xfa8afe62	dccp_parse_options
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xfd5cfb4a	dccp_destroy_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x2a0e3c50	dccp_invalid_packet
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x6453bdd4	dccp_v4_connect
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x922f192c	dccp_v4_conn_request
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xbb2e0f64	dccp_v4_request_recv_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xd093291a	dccp_v4_do_rcv
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xebf7b3ed	dccp_v4_send_check
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0x11199593	nf_nat_seq_adjust_hook
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0x6d40a921	need_ipv4_conntrack
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_defrag_ipv4 0x6b6c3d10	nf_defrag_ipv4_enable
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x07ae60b6	nf_nat_proto_in_range
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x19ec1bf4	nf_nat_proto_unique_tuple
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x23da5d48	nf_nat_packet
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x5e273c4c	nf_nat_icmp_reply_translation
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x6fada7e0	nf_nat_proto_put
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x71561205	nf_nat_proto_find_get
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x73ce6c08	nf_nat_get_offset
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x94a08134	nf_nat_proto_nlattr_to_range
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xd40de3c3	nf_nat_proto_range_to_nlattr
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat_proto_gre 0x636b12c8	nf_nat_need_gre
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x06d0db4d	tcp_vegas_get_info
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x42b28e80	tcp_vegas_pkts_acked
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x793c836e	tcp_vegas_state
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x7a09d78c	tcp_vegas_cwnd_event
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xc985c590	tcp_vegas_init
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x08a3e5d1	net_ipv6_ctl_path
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x1007b0b1	inet6_csk_reqsk_queue_hash_add
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x175e6003	inet6_sk_rebuild_header
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x23e89dc1	inet6_csk_search_req
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x264265ec	ipv6_opt_accepted
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x81a3141f	inet6_csk_addr2sockaddr
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x85478a0b	inet6_hash_frag
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x8887387b	inet6_destroy_sock
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x903602b4	ip6_dst_lookup
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xa078d7c5	ip6_local_out
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xaf21b2f9	ip6_sk_dst_lookup
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xb625094b	fl6_sock_lookup
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xd243b92e	ip6_dst_blackhole
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xec3431f4	inet6_csk_xmit
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xf02ca0f5	ipv6_find_tlv
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xf8bb02a8	ipv6_dup_options
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xf9b5332c	inet6_csk_bind_conflict
+EXPORT_SYMBOL_GPL net/mac80211/mac80211 0x06be08e7	ieee80211_iterate_active_interfaces_atomic
+EXPORT_SYMBOL_GPL net/mac80211/mac80211 0xdb119471	ieee80211_iterate_active_interfaces
+EXPORT_SYMBOL_GPL net/netfilter/ipvs/ip_vs 0xe6476b4a	net_vs_ctl_path
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x013aef39	__nf_ct_expect_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x045072cd	nf_ct_port_nla_policy
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x04a974d4	nf_conntrack_l4proto_tcp4
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x04c4cfb2	nf_ct_get_tuplepr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x06a5a3dd	nf_ct_expect_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x0963bc61	nf_ct_expect_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x0ac617d3	__nf_ct_kill_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x0e6af174	nf_conntrack_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x17052d3c	nf_ct_deliver_cached_events
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x274e6e83	nf_ct_nat_offset
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x2cbb1e6a	nf_conntrack_l3proto_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x2f54036f	nf_conntrack_unregister_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x34db970b	nf_ct_iterate_cleanup
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x369f1656	nf_conntrack_l4proto_tcp6
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x37516a0b	nf_conntrack_helper_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3f5b1415	nf_ct_port_nlattr_to_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4542b821	__nf_ct_try_assign_helper
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x493aac61	nf_ct_invert_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4b9065a9	nf_ct_alloc_hashtable
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4b95755d	nf_conntrack_l3proto_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4cf7206f	nf_conntrack_l4proto_udp6
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x51eb9d3c	nf_ct_remove_expectations
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x523458d0	nf_ct_expect_alloc
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5882ba33	nf_conntrack_set_hashsize
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x598915d2	nf_conntrack_hash_insert
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5c72cf27	nf_conntrack_register_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5ddffffc	nf_ct_insert_dying_list
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5e516d0a	nf_conntrack_in
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x62813e5c	nf_ct_port_nlattr_tuple_size
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x63fad370	__nf_conntrack_helper_find_byname
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6a0f5cd2	nf_ct_helper_ext_add
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6e224a7a	need_conntrack
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x747a5b95	nf_ct_l3protos
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x74b8065b	nf_conntrack_flush_report
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x77525ab7	nf_ct_expect_register_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x78f9b710	nf_ct_l3proto_try_module_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x7ec142ed	nf_conntrack_l4proto_udp4
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x7ff455de	nf_conntrack_l3proto_generic
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x825f9b80	__nf_conntrack_confirm
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x86797883	nf_conntrack_free
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8b953d7c	nf_conntrack_alter_reply
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8ffe7e89	nf_conntrack_htable_size
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9067606c	nf_conntrack_tuple_taken
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x90ff6c9f	nf_ct_invert_tuplepr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9828b485	seq_print_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9966e1b6	nf_conntrack_alloc
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9af3f6c1	nf_ct_free_hashtable
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9c43e781	nf_ct_l3proto_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xa0d469ab	nf_ct_delete_from_lists
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xaafb8f1a	print_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xab926f57	nf_ct_unexpect_related
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xacfc2f95	nf_ct_l3proto_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xad616c57	nf_ct_expect_init
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb549c0df	__nf_ct_refresh_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb602c57e	nf_ct_l3proto_module_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb98eda4f	nf_conntrack_event_cb
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc18ac88d	nf_ct_expect_hsize
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc2f4e683	nf_conntrack_l4proto_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc7490a6a	nfnetlink_parse_nat_setup_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc758b990	nf_conntrack_untracked
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc79ff43c	nf_conntrack_helper_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xce597eb5	nf_ct_expect_unregister_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xcfab99e9	nf_conntrack_l4proto_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xd3d96685	nf_ct_extend_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xd5af974a	nf_ct_extend_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xd81cf4a8	__nf_conntrack_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xd917b0fb	nf_ct_port_tuple_to_nlattr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xdbef8b57	nf_conntrack_lock
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xe05d3e78	nf_ct_unlink_expect
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xe808dd8c	nf_ct_expect_related_report
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xed333930	nf_ct_get_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf38bcdf3	nf_conntrack_max
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf852ac34	nf_expect_event_cb
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf8f7ab75	__nf_ct_l4proto_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_amanda 0x5f687253	nf_nat_amanda_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_ftp 0x968d8244	nf_nat_ftp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x057f380c	nat_h245_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x1cfe3e80	set_sig_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x316ecc4d	nat_t120_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x3f0abf62	nat_rtp_rtcp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x4a251b50	nat_q931_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x71af97b1	set_h225_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x86fec81f	nat_callforwarding_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x9651c1d3	get_h225_addr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xa81c09cb	set_h245_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xdb5ece1c	set_ras_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_irc 0xf9fe5f57	nf_nat_irc_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x0f1b4159	nf_nat_pptp_hook_expectfn
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0xe13809c7	nf_nat_pptp_hook_exp_gre
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0xef7d1971	nf_nat_pptp_hook_inbound
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0xfe18c392	nf_nat_pptp_hook_outbound
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_proto_gre 0x3cc14252	nf_ct_gre_keymap_destroy
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_proto_gre 0x528830ff	nf_ct_gre_keymap_add
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x08d9e2c4	ct_sip_parse_request
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x2cfb3f65	nf_nat_sip_expect_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x4fe45503	ct_sip_parse_address_param
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x6b81663a	ct_sip_parse_numerical_param
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x76b968b0	ct_sip_get_sdp_header
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x875988a3	nf_nat_sdp_media_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xa9ad0c63	nf_nat_sdp_session_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xb156f233	ct_sip_parse_header_uri
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xbb1d7ac7	nf_nat_sdp_port_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xf7798e0a	ct_sip_get_header
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xfa07424a	nf_nat_sdp_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xffede065	nf_nat_sip_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_tftp 0xbf3f6f63	nf_nat_tftp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_tproxy_core 0xef363740	nf_tproxy_assign_sock
+EXPORT_SYMBOL_GPL net/netfilter/nf_tproxy_core 0xfb65644f	nf_tproxy_get_sock_v4
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x0bfa499d	nfnetlink_subsys_register
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x1f58e71b	nfnl_lock
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x22ffa8e1	nfnetlink_subsys_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x2f9a8bb2	nfnetlink_unicast
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x3895cd7a	nfnl_unlock
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xca12a436	nfnetlink_send
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xeca95329	nfnetlink_has_listeners
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xef9b4bbd	nfnetlink_set_err
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink_log 0xea1b2979	nfulnl_log_packet
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x0717828e	xt_table_unlock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x15fcf822	xt_compat_target_from_user
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x161d1417	xt_compat_unlock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x176366fa	xt_request_find_target
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x1f339142	xt_register_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x3b5fda4e	xt_proto_init
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x40728a63	xt_find_revision
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x5f82f1f7	xt_compat_flush_offsets
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x642e3174	xt_check_target
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x684694c5	xt_compat_add_offset
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x6f9aa2fb	xt_compat_calc_jump
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x73fe1202	xt_compat_match_to_user
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x9ca4662d	xt_compat_match_offset
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xa1cce8f9	per_cpu__xt_info_locks
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xbc437426	xt_replace_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xc46345e3	xt_proto_fini
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xc653adff	xt_compat_target_offset
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xca0a55fb	xt_unregister_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xd4e098a6	xt_compat_target_to_user
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xd6f3547e	xt_find_table_lock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xe0b4971b	xt_compat_lock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xe3e49464	xt_compat_match_from_user
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xedc1951b	xt_check_match
+EXPORT_SYMBOL_GPL net/rds/rds 0x00a467af	rds_wq
+EXPORT_SYMBOL_GPL net/rds/rds 0x032e8bf9	rds_message_unmapped
+EXPORT_SYMBOL_GPL net/rds/rds 0x03cf64a3	rds_page_copy_user
+EXPORT_SYMBOL_GPL net/rds/rds 0x15d5596e	rds_connect_complete
+EXPORT_SYMBOL_GPL net/rds/rds 0x18b71414	rds_info_copy
+EXPORT_SYMBOL_GPL net/rds/rds 0x2bdf8d84	rds_conn_destroy
+EXPORT_SYMBOL_GPL net/rds/rds 0x2c5c5514	rds_message_add_rdma_dest_extension
+EXPORT_SYMBOL_GPL net/rds/rds 0x3101936e	rds_message_add_extension
+EXPORT_SYMBOL_GPL net/rds/rds 0x32499ba9	rds_info_register_func
+EXPORT_SYMBOL_GPL net/rds/rds 0x3eec488d	rds_recv_incoming
+EXPORT_SYMBOL_GPL net/rds/rds 0x522b88c3	rds_trans_register
+EXPORT_SYMBOL_GPL net/rds/rds 0x529ea273	rds_info_deregister_func
+EXPORT_SYMBOL_GPL net/rds/rds 0x73aac73d	rds_message_populate_header
+EXPORT_SYMBOL_GPL net/rds/rds 0x808b5b65	rds_send_drop_acked
+EXPORT_SYMBOL_GPL net/rds/rds 0x81a59d86	rds_cong_map_updated
+EXPORT_SYMBOL_GPL net/rds/rds 0x894d32f9	per_cpu__rds_stats
+EXPORT_SYMBOL_GPL net/rds/rds 0x936ca2bd	rds_conn_create
+EXPORT_SYMBOL_GPL net/rds/rds 0x9fcf3051	rds_conn_drop
+EXPORT_SYMBOL_GPL net/rds/rds 0xae06043a	rds_conn_create_outgoing
+EXPORT_SYMBOL_GPL net/rds/rds 0xaeb9513a	rds_trans_unregister
+EXPORT_SYMBOL_GPL net/rds/rds 0xb8531554	rds_for_each_conn_info
+EXPORT_SYMBOL_GPL net/rds/rds 0xbfd61594	rds_inc_addref
+EXPORT_SYMBOL_GPL net/rds/rds 0xc20d2842	rds_message_addref
+EXPORT_SYMBOL_GPL net/rds/rds 0xc2da8e38	rds_stats_info_copy
+EXPORT_SYMBOL_GPL net/rds/rds 0xc6a7fe14	rds_inc_init
+EXPORT_SYMBOL_GPL net/rds/rds 0xd73a18f6	rds_message_put
+EXPORT_SYMBOL_GPL net/rds/rds 0xd941b585	rds_rdma_send_complete
+EXPORT_SYMBOL_GPL net/rds/rds 0xe79dc365	rds_inc_put
+EXPORT_SYMBOL_GPL net/rds/rds 0xf3abb9bc	rds_send_get_message
+EXPORT_SYMBOL_GPL net/rxrpc/af-rxrpc 0x846b1872	rxrpc_register_security
+EXPORT_SYMBOL_GPL net/rxrpc/af-rxrpc 0xe5078099	rxrpc_unregister_security
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x00c52ef5	g_make_token_header
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x2906653d	gss_pseudoflavor_to_service
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x6bca9945	gss_mech_get_by_name
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x808168f4	gss_mech_get_by_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x89654f43	svcauth_gss_flavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x8d1a827e	svcauth_gss_register_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x91d962d6	gss_mech_get
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xb3e7091b	gss_svc_to_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xb5dea7ef	g_token_size
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xc73f096c	gss_service_to_auth_domain_name
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xdb415343	gss_mech_put
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xdf2c7d2c	gss_mech_register
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xe383990f	svc_gss_principal
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xf8b2ff6e	g_verify_token_header
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xfcf62177	gss_mech_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x000d7999	rpc_destroy_wait_queue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0071cb3b	rpc_lookup_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0264cfdc	svc_proc_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x02a4fe19	rpc_call_null
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x05e807a9	xdr_encode_string
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x065994f1	xdr_encode_opaque_fixed
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x099c620d	svc_reserve
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0e54d85b	rpc_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0efcda21	rpc_pton
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0f668ba9	svc_auth_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0fa95680	xprt_release_xprt_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x11f61624	svc_auth_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x12e280e3	svc_proc_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x15115dca	rpc_bind_new_program
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1582cde1	rpc_lookup_machine_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x15a387c4	cache_check
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x16166299	rpc_force_rebind
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x18f91d87	rpc_alloc_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x192de2df	svcauth_unix_set_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1cae2ec5	cache_purge
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x200c0fd5	rpcb_getport_async
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x20b9bfaf	rpc_call_async
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x226d3b31	xdr_partial_copy_from_skb
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x24de762d	svc_set_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x263b0edb	xprt_wake_pending_tasks
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x28f6478d	svc_wake_up
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2919b156	xdr_decode_string_inplace
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2aa17774	rpc_free_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2eb19e8a	svc_xprt_enqueue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2eec63c9	xdr_encode_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2f5ae144	rpcauth_generic_bind_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2fdcc68d	svc_xprt_names
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x31a89d59	rpc_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3270b911	xdr_encode_array2
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3309add7	rpc_run_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x36e68f0a	sunrpc_cache_pipe_upcall
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3b89814a	xdr_buf_from_iov
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3d6d712d	rpc_shutdown_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3da3721c	xprt_release_rqst_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3f28c2c5	svc_reg_xprt_class
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x451f7574	rpc_put_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x474bc7e3	xprt_reserve_xprt_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x47edd74b	svc_xprt_init
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4968a46b	svc_max_payload
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4b9de6de	rpc_wake_up
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4ea0372f	svc_xprt_copy_addrs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x53445f68	nlm_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x54c75285	auth_domain_find
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x553b19d5	read_bytes_from_xdr_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x581fa536	__rpc_wait_for_completion_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5b14ec1a	rpc_put_mount
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5bd26000	rpc_proc_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5c33b375	rpcauth_lookup_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5fb171de	xdr_shift_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x60dd8e0f	rpc_print_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x62013923	rpc_unlink
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x62c9012a	svc_close_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x64cbf7bf	svc_sock_update_bufs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x675524ec	rpc_sockaddr2uaddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x67c23395	rpc_sleep_on
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x68798202	unix_domain_find
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x688313a3	svc_sock_names
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x690c7f79	xdr_buf_subsegment
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6a01f510	svc_recv
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6abda113	svc_addsock
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6b1948fd	svc_sock_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6b60baac	rpc_queue_upcall
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6b62e822	rpc_wake_up_next
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6bf13cc0	rpc_mkpipe
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6c5304c5	rpcb_getport_sync
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6eea229d	svcauth_unix_purge
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x70850f32	svc_create_pooled
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x71165aeb	xprt_wait_for_buffer_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x71fa908a	cache_flush
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7231219c	rpc_ntop
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7246f2cd	xprt_set_retrans_timeout_def
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x74934ace	svc_unreg_xprt_class
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x775adaf6	rpc_uaddr2sockaddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7855175f	rpcauth_init_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7894d364	rpc_wake_up_queued_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7c0211d4	rpc_restart_call
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7dac8fd0	xprt_set_retrans_timeout_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7dba2a7f	svc_destroy
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7de53067	rpc_init_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7e260568	auth_unix_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8218bc4a	xprt_register_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x871dd7fe	xdr_enter_page
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8a4da709	auth_unix_forget_old
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8c9f7f0b	rpc_init_wait_queue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8ca73fbe	sunrpc_cache_register_pipefs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8e6cf842	rpcauth_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x90d0410a	sunrpc_cache_update
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x948470cc	svc_seq_show
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x949487ae	xdr_read_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9962ce9d	rpc_proc_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9c44b769	xdr_init_decode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9d3490bb	rpc_exit_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa3f6d686	rpc_setbufsize
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa76fa16c	xprt_disconnect_done
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa8cb288c	svc_prepare_thread
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xaf5bf6ef	nfs_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb13241b2	auth_unix_add_addr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb4037b8b	cache_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb43fc49d	xdr_encode_word
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb5b78a15	xdr_inline_decode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb74a7e38	svc_print_addr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb81e8350	cache_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb88dc3b0	rpc_wake_up_status
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb9529856	xprt_unregister_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbb13b4d9	xdr_buf_read_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbc199c76	rpc_max_payload
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbc3dc0e6	svc_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbc7d6d8a	xprt_reserve_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbd787a9d	svc_exit_thread
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbe1e1a25	csum_partial_copy_to_xdr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbf9d1b96	nfsd_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbfa6264e	put_rpccred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc12435e3	rpc_calc_rto
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc195ca32	xdr_reserve_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc1fe7639	rpcauth_destroy_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc24f1ed3	xprt_lookup_rqst
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc2f57ce3	svc_create_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc3880471	xdr_decode_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc485896d	rpcauth_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc572cf85	rpc_restart_call_prepare
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc5e359cf	rpc_clone_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc5f0af9d	xprt_release_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc8e96dea	qword_addhex
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcaf0a3d1	auth_domain_put
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcc72a1fd	rpc_malloc
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcc9be494	xdr_skb_read_bits
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcd15fca8	rpc_call_start
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xce79a250	xdr_inline_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcec5f540	rpcauth_init_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcee467f3	xprt_load_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcf81513c	svc_set_num_threads
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcf882d9f	rpc_killall_tasks
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd0a5bda1	xdr_write_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd15c7a37	sunrpc_cache_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd7ca298e	svc_find_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdb4274c0	xprt_update_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xde1da8fb	xdr_init_encode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdfe05435	rpc_peeraddr2str
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe017e7c9	sunrpc_cache_unregister_pipefs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe04b8bad	xdr_decode_word
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe0e47470	rpc_delay
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe54f9f95	xdr_process_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe5919cb1	xdr_encode_opaque
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe6a8b798	xprt_write_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe85d8de8	svc_xprt_put
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe97f4ce5	qword_get
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xeb21ae9d	rpc_get_mount
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xeb5e9470	xprt_adjust_cwnd
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xebc22d27	xdr_decode_array2
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xec9b2e0c	svc_sock_destroy
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xed8c0297	rpcauth_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xedcf6be4	qword_add
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xee8e0a36	xdr_encode_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xeeacab69	rpc_update_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xeec2026e	svc_drop
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf2d0bf25	rpc_peeraddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf70983d8	svc_xprt_received
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf9d1164c	rpc_free
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfafcdf3e	rpc_call_sync
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfd4bf082	auth_domain_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfd6364f1	svc_authenticate
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfe6268e3	xprt_complete_rqst
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfefb71ca	svc_process
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x0e727ec0	wimax_msg
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x0eac76be	wimax_msg_data
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x1a35a75a	wimax_state_get
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x1f35d61c	wimax_msg_send
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x1fa08b76	wimax_msg_alloc
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x3c663cdb	wimax_report_rfkill_sw
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x3d0d3b5c	wimax_dev_init
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x49a99622	wimax_dev_rm
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x6bc5a6ea	wimax_report_rfkill_hw
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x919325d5	wimax_msg_data_len
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xc13ef9a8	wimax_msg_len
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xe63a2aec	wimax_state_change
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xeb3370c2	wimax_dev_add
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x00c5a55c	cfg80211_wext_giwauth
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x09f77953	cfg80211_wext_giwrate
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x14a8c19a	cfg80211_wext_siwrate
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x17e58dec	cfg80211_wext_giwscan
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x1b1c4a70	cfg80211_wext_giwpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x1d9a1d95	cfg80211_wext_siwauth
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x253e9e5c	cfg80211_wext_giwfrag
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x305a58c0	cfg80211_wext_giwfreq
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x38612695	cfg80211_wext_siwfrag
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x3a424b96	cfg80211_wext_siwscan
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x48215142	cfg80211_wext_giwrts
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x4e9887fd	cfg80211_wext_siwmlme
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x4e9975b3	cfg80211_wext_giwessid
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x4fda1867	cfg80211_wext_siwtxpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x538337d2	cfg80211_wext_giwname
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x5739bd18	cfg80211_wext_giwencode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x5be84f5b	cfg80211_wext_giwmode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x626810e9	cfg80211_wext_giwretry
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x78974abe	cfg80211_wext_siwmode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x80c29a15	cfg80211_wireless_stats
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x80cd3545	cfg80211_wext_siwretry
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x86b3aa97	cfg80211_wext_giwrange
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x88bbf7fe	cfg80211_wext_siwencode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x8ca65c61	cfg80211_wext_siwencodeext
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xa089fc52	cfg80211_wext_siwrts
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xa1007ea1	cfg80211_wext_siwgenie
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xac3c501f	cfg80211_wext_siwessid
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xc6a86c0d	cfg80211_wext_siwap
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xd1f73b01	cfg80211_wext_giwtxpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xd6d14f4a	cfg80211_wext_giwap
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xd8f2f5d0	cfg80211_wext_siwfreq
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xf9b96fdc	cfg80211_wext_siwpower
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x4f138430	ipcomp_init_state
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x8ab1bcee	ipcomp_destroy
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0xb6b3bfbf	ipcomp_input
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0xd5d739fd	ipcomp_output
+EXPORT_SYMBOL_GPL sound/core/snd-pcm 0xa286a234	snd_pcm_format_name
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x019c1bc8	snd_hda_attach_beep_device
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0609975c	snd_hda_multi_out_dig_open
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x07cafcf3	snd_hda_build_controls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x133e67f2	snd_hda_ctl_add
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x16aa2f21	query_amp_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1a3f63fb	snd_hda_get_sub_nodes
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1e85880c	snd_hda_mixer_bind_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1ff0ef6b	snd_hda_multi_out_analog_open
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x20a8e6d5	snd_hda_mixer_amp_switch_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x211271ed	snd_hda_mixer_amp_switch_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x23e8372a	snd_hda_detach_beep_device
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x246ee7a8	snd_hda_build_pcms
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2588c9c3	snd_hda_load_patch
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x25fffb68	snd_hda_create_spdif_share_sw
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2832d299	snd_hda_input_mux_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2998d385	snd_hda_power_up
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x32e310ba	snd_hda_mixer_amp_switch_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x33d42491	snd_hda_multi_out_dig_cleanup
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x35580cf2	snd_hda_codec_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x38024212	snd_hda_bind_sw
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x40328fa7	snd_hda_multi_out_dig_prepare
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x406b789c	snd_hda_get_bool_hint
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x42063c7a	snd_hda_codec_amp_update
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x447cd032	snd_hda_queue_unsol_event
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x484f3364	snd_hda_create_spdif_out_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x50240de5	snd_hda_add_new_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x528fe30c	snd_hda_ch_mode_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x58927948	snd_hda_is_supported_format
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x59877c2a	snd_hda_delete_codec_preset
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5ae76f73	auto_pin_cfg_labels
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x62391e13	snd_hda_codec_configure
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x63cabebc	snd_hda_bind_vol
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x65e1d311	snd_hda_check_board_codec_sid_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x67b4b9be	snd_hda_get_hint
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6c0a05ea	snd_hda_codec_write
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6cc874a0	snd_hda_add_codec_preset
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x73f7efc7	snd_hda_multi_out_analog_prepare
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x763e9ee6	snd_hda_ch_mode_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x77974079	snd_hda_add_vmaster
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x79ba655c	snd_hda_bus_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7a5c5c5e	snd_hda_codec_cleanup_stream
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7c3879a7	snd_hda_query_pin_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x86eaf8ea	snd_hda_mixer_amp_volume_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x87506fd2	snd_hda_mixer_amp_volume_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x879a35cb	snd_hda_create_spdif_in_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8847cabc	snd_hda_mixer_bind_switch_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x946a558e	snd_hda_parse_pin_def_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x94a10e85	snd_hda_mixer_amp_volume_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9a0c3cd3	snd_hda_mixer_bind_switch_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9a71fac0	snd_hda_codec_read
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9a8e1877	snd_array_free
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa25c7318	snd_hda_sequence_write
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa2827d76	snd_hda_get_jack_location
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa82472a5	snd_hda_codec_write_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xad87613e	snd_print_pcm_rates
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb4a88661	snd_hda_find_mixer_ctl
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb5da70c5	snd_hda_sequence_write_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb61839f0	snd_hda_codec_amp_read
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb7986dfe	snd_hda_codec_amp_stereo
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb9f56eca	snd_hda_codec_resume_amp
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbe7dd7dc	snd_array_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc17617b5	snd_hda_set_vmaster_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc34a54c6	snd_hda_calc_stream_format
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc652fd69	snd_hda_get_jack_connectivity
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc6f23573	snd_hda_mixer_bind_ctls_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcb301b6e	snd_hda_get_jack_type
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcb6841dc	snd_hda_codec_setup_stream
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcce27eb0	snd_hda_input_mux_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xce4a8e19	snd_hda_check_amp_list_power
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd0bc82c5	snd_hda_codec_get_pincfg
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd4b9c31c	snd_hda_mixer_bind_ctls_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd5035424	snd_hda_mixer_bind_ctls_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xdda71ae4	snd_hda_check_board_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe211701c	snd_hda_multi_out_dig_close
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe7ad1abc	snd_hda_power_down
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeae5bf7d	snd_hda_get_connections
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeda3a721	snd_print_pcm_bits
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xef9ea74f	snd_hda_codec_set_pincfg
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf10f337a	snd_hda_codec_resume_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf75c89e3	snd_hda_mixer_amp_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf7e70e78	snd_hda_ch_mode_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xfb51e861	snd_hda_override_amp_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xfd162c2f	snd_hda_multi_out_analog_cleanup
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1836 0x525af50b	soc_codec_dev_ad1836
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1836 0xa43faf6f	ad1836_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1938 0x529fce81	ad1938_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1938 0x7465bfe0	soc_codec_dev_ad1938
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0x8250ee4c	ad73311_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0x89f3aba1	soc_codec_dev_ad73311
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4104 0x678b1fd0	soc_codec_device_ak4104
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0x0232d6d2	ak4535_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0xb2ab43b0	soc_codec_dev_ak4535
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4642 0x541fdf07	ak4642_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4642 0xea106c1c	soc_codec_dev_ak4642
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0x6c07f260	soc_codec_device_cs4270
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0xc06012b6	cs4270_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-l3 0x78c84c7e	l3_write
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-max9877 0x0db47fbc	max9877_add_controls
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0x93e5f19b	soc_codec_dev_pcm3008
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0x9d171142	pcm3008_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-spdif 0xe8bded3b	dit_stub_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0x34f039db	ssm2602_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0x9850f450	soc_codec_dev_ssm2602
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0x0782983e	soc_codec_dev_tlv320aic23
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0x67cd7885	tlv320aic23_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0x81ea743a	aic26_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0x935e1269	aic26_soc_codec_dev
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x12cf1492	aic3x_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x451d128c	aic3x_headset_detected
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x4fe58253	soc_codec_dev_aic3x
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x80aed92e	aic3x_get_gpio
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xb0f4a7fe	aic3x_set_gpio
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xb5cae91f	aic3x_set_headset_detection
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xd0a73d0b	aic3x_button_pressed
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0x37dd7c58	soc_codec_dev_twl4030
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0x8615bf57	twl4030_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda134x 0xf6651a5d	soc_codec_dev_uda134x
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x3455ca80	uda1380_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0xc7df2634	soc_codec_dev_uda1380
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0x0b4ab80b	wm_hubs_add_analogue_controls
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0x757206d5	wm_hubs_spkmix_tlv
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0xa0102e20	wm_hubs_add_analogue_routes
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x29bf9127	wm8350_hp_jack_detect
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x9e3a4bfe	soc_codec_dev_wm8350
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0xcbb9ffc7	wm8350_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x0526b1ac	soc_codec_dev_wm8400
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x9344d979	wm8400_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0x6809db93	wm8510_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0xdbffc473	soc_codec_dev_wm8510
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8523 0xdf75b3a0	wm8523_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8523 0xf29429e9	soc_codec_dev_wm8523
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0xd42efffc	soc_codec_dev_wm8580
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0xf6b1eab3	wm8580_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0xbb6938a9	soc_codec_dev_wm8728
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0xf797441e	wm8728_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x6b69e9d7	soc_codec_dev_wm8731
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x76ef1e62	wm8731_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x76ffa424	soc_codec_dev_wm8750
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0xde63f8fd	wm8750_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0x480c80f4	wm8753_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0x5dd2f7e7	soc_codec_dev_wm8753
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8776 0x2321d7cc	soc_codec_dev_wm8776
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8776 0x846cf0ad	wm8776_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0x90eb11fc	soc_codec_dev_wm8900
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0x99d1c568	wm8900_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0x1f45b7c6	wm8903_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0xbbc6423f	soc_codec_dev_wm8903
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0x6d9ee17b	wm8940_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0x97e2b920	soc_codec_dev_wm8940
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0x94666d4e	soc_codec_dev_wm8960
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0xfa01f052	wm8960_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8961 0x315d23f7	wm8961_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8961 0x8d7d5c0f	soc_codec_dev_wm8961
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0x8cbf3638	soc_codec_dev_wm8971
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0x972a2843	wm8971_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8974 0xc7e7b9f0	wm8974_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8974 0xf1c8c27d	soc_codec_dev_wm8974
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0x466d0962	wm8988_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0x5621ca4c	soc_codec_dev_wm8988
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0x0c4980bb	wm8990_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0x9f3a2a73	soc_codec_dev_wm8990
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8993 0x8addf215	wm8993_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8993 0xb41779b0	soc_codec_dev_wm8993
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0x695657c2	wm9081_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0xc78b173f	soc_codec_dev_wm9081
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x010c5698	snd_soc_free_pcms
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x029bc619	snd_soc_unregister_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0c2b5582	snd_soc_dapm_put_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x11d7492d	snd_soc_init_card
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x154c12e1	snd_soc_unregister_dai
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x15b2f7a9	dapm_reg_event
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x161ceee2	snd_soc_put_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x19b08ee7	snd_soc_dai_set_fmt
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2610023e	snd_soc_dapm_stream_event
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x287f2fa4	snd_soc_jack_add_gpios
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2af86865	snd_soc_unregister_dais
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2da7f76a	snd_soc_info_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x353f1b8f	snd_soc_update_bits
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3573aab9	snd_soc_dapm_get_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3caa094c	snd_soc_jack_report
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x411cd60e	snd_soc_dapm_new_controls
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4482171e	snd_soc_register_platform
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4d32c4b5	snd_soc_info_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4f353038	snd_soc_cnew
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x50d80a05	snd_soc_jack_new
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x52e47ab9	snd_soc_register_dai
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x554e7138	snd_soc_info_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x57a4b0af	snd_soc_dapm_sync
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x58077cb8	snd_soc_dapm_get_pin_status
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5a229a01	snd_soc_info_enum_ext
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x616aaef5	snd_soc_dapm_info_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x68281a75	snd_soc_dapm_new_widgets
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x69188c50	snd_soc_get_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6d0ac3da	snd_soc_put_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7617edff	snd_soc_dai_set_clkdiv
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7700186c	snd_soc_dai_digital_mute
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x77f1fe14	snd_soc_dai_set_tdm_slot
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x780d4ffa	snd_soc_jack_add_pins
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7996d6fe	snd_soc_dapm_nc_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7cac489f	snd_soc_dai_set_pll
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7f14d626	snd_soc_get_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7fe435a8	snd_soc_codec_volatile_register
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x835bd740	snd_soc_dapm_new_control
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8c8e4e9b	snd_soc_dapm_disable_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x91643691	snd_soc_dai_set_sysclk
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x971b62bc	snd_soc_dapm_enable_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9b37d760	snd_soc_free_ac97_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9bb65035	snd_soc_dai_set_tristate
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9e5f4cd3	snd_soc_get_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9f843aab	snd_soc_register_dais
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa62c6115	snd_soc_dapm_free
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa845bb13	snd_soc_add_controls
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb7711dd7	snd_soc_set_runtime_hwparams
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc30982f7	snd_soc_new_pcms
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc480991e	snd_soc_register_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc6201a89	snd_soc_jack_free_gpios
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc8732c4b	snd_soc_dapm_get_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xcae09e71	snd_soc_dapm_add_routes
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xce5ec2eb	snd_soc_test_bits
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd2cc0f34	snd_soc_dapm_put_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd7d93799	snd_soc_info_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd9bc1a40	snd_soc_info_volsw_ext
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xdf41bb1a	snd_soc_dapm_put_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xe04a4ca6	snd_soc_new_ac97_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xe4bddfeb	snd_soc_put_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xef344901	snd_soc_get_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf089b5ee	snd_soc_dapm_put_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf1a34b6f	snd_soc_get_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf1fe45d0	snd_soc_unregister_platform
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf2b1859d	snd_soc_put_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf532bc8a	snd_soc_codec_set_cache_io
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf7013fe0	snd_soc_dapm_get_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf806de50	snd_soc_put_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xff7eda8b	snd_soc_dapm_get_value_enum_double
+EXPORT_SYMBOL_GPL vmlinux 0x000f0223	find_module
+EXPORT_SYMBOL_GPL vmlinux 0x004151ca	crypto_create_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x00566d8f	inotify_get_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x007b5eec	debugfs_create_u32
+EXPORT_SYMBOL_GPL vmlinux 0x0086f700	input_ff_create
+EXPORT_SYMBOL_GPL vmlinux 0x0096ddba	fb_ddc_read
+EXPORT_SYMBOL_GPL vmlinux 0x00b8ecf8	__iowrite32_copy
+EXPORT_SYMBOL_GPL vmlinux 0x00bc3a1d	inet_csk_addr2sockaddr
+EXPORT_SYMBOL_GPL vmlinux 0x00c73daf	regulator_set_current_limit
+EXPORT_SYMBOL_GPL vmlinux 0x00e20e71	ring_buffer_overrun_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x0106e2e2	crypto_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0x016b9869	xfrm_calg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0x01a4ea6d	unregister_die_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x01a5af2b	ring_buffer_empty_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x01a92bdc	aead_geniv_exit
+EXPORT_SYMBOL_GPL vmlinux 0x01cb8473	inet_twsk_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x01e6013a	scatterwalk_done
+EXPORT_SYMBOL_GPL vmlinux 0x020d80e6	input_event_from_user
+EXPORT_SYMBOL_GPL vmlinux 0x024bf15f	rtc_irq_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x02858f3a	platform_get_irq_byname
+EXPORT_SYMBOL_GPL vmlinux 0x02e96e59	inet_hashinfo_init
+EXPORT_SYMBOL_GPL vmlinux 0x02f80bd9	regulator_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x0343bdf1	__i2c_board_list
+EXPORT_SYMBOL_GPL vmlinux 0x038485be	queue_delayed_work_on
+EXPORT_SYMBOL_GPL vmlinux 0x04069b1d	set_irq_nested_thread
+EXPORT_SYMBOL_GPL vmlinux 0x04486e88	rcu_batches_completed
+EXPORT_SYMBOL_GPL vmlinux 0x0456c521	__blk_put_request
+EXPORT_SYMBOL_GPL vmlinux 0x04ea8706	__iowrite64_copy
+EXPORT_SYMBOL_GPL vmlinux 0x052f7ab3	klist_add_tail
+EXPORT_SYMBOL_GPL vmlinux 0x054e550b	kernel_halt
+EXPORT_SYMBOL_GPL vmlinux 0x0619ca8a	getboottime
+EXPORT_SYMBOL_GPL vmlinux 0x06360b8f	fib_rules_cleanup_ops
+EXPORT_SYMBOL_GPL vmlinux 0x064db9a5	mark_mounts_for_expiry
+EXPORT_SYMBOL_GPL vmlinux 0x065ffd7e	crypto_aead_setauthsize
+EXPORT_SYMBOL_GPL vmlinux 0x0680e8f5	remove_irq
+EXPORT_SYMBOL_GPL vmlinux 0x076629d6	fib_rules_register
+EXPORT_SYMBOL_GPL vmlinux 0x0771c307	drm_class_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x07b52e38	rtnl_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x07e17385	generic_fh_to_parent
+EXPORT_SYMBOL_GPL vmlinux 0x07e78378	sysfs_put
+EXPORT_SYMBOL_GPL vmlinux 0x07eedb95	platform_bus
+EXPORT_SYMBOL_GPL vmlinux 0x07f74407	eventfd_ctx_put
+EXPORT_SYMBOL_GPL vmlinux 0x0818d86f	tty_ldisc_deref
+EXPORT_SYMBOL_GPL vmlinux 0x087892d1	blk_abort_queue
+EXPORT_SYMBOL_GPL vmlinux 0x08d8708f	cancel_work_sync
+EXPORT_SYMBOL_GPL vmlinux 0x091eb9b4	round_jiffies
+EXPORT_SYMBOL_GPL vmlinux 0x092b5a22	fuse_sync_release
+EXPORT_SYMBOL_GPL vmlinux 0x09a6db47	fib_rules_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x09b64f8e	bus_find_device
+EXPORT_SYMBOL_GPL vmlinux 0x0a76d4c0	devres_remove
+EXPORT_SYMBOL_GPL vmlinux 0x0ac111d8	ring_buffer_record_disable_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x0af414a1	platform_get_irq
+EXPORT_SYMBOL_GPL vmlinux 0x0b034c0d	fb_deferred_io_init
+EXPORT_SYMBOL_GPL vmlinux 0x0b07abe2	unshare_fs_struct
+EXPORT_SYMBOL_GPL vmlinux 0x0ba2ada6	init_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0x0bd1a1e4	tty_wakeup
+EXPORT_SYMBOL_GPL vmlinux 0x0bd57f78	vma_kernel_pagesize
+EXPORT_SYMBOL_GPL vmlinux 0x0bfbc96c	power_supply_class
+EXPORT_SYMBOL_GPL vmlinux 0x0c068934	pcr_ops
+EXPORT_SYMBOL_GPL vmlinux 0x0c0ed53f	fuse_put_request
+EXPORT_SYMBOL_GPL vmlinux 0x0c2cdbf1	synchronize_sched
+EXPORT_SYMBOL_GPL vmlinux 0x0c4a2097	platform_device_add_data
+EXPORT_SYMBOL_GPL vmlinux 0x0c4d8d97	regulator_set_optimum_mode
+EXPORT_SYMBOL_GPL vmlinux 0x0cb88680	__tracepoint_block_rq_remap
+EXPORT_SYMBOL_GPL vmlinux 0x0ce133f0	crypto_alloc_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0x0d17fe87	tty_prepare_flip_string_flags
+EXPORT_SYMBOL_GPL vmlinux 0x0d3abc4b	fuse_conn_init
+EXPORT_SYMBOL_GPL vmlinux 0x0db5a95d	__blk_end_request_err
+EXPORT_SYMBOL_GPL vmlinux 0x0db98489	platform_get_resource
+EXPORT_SYMBOL_GPL vmlinux 0x0e21aed2	br_handle_frame_hook
+EXPORT_SYMBOL_GPL vmlinux 0x0e8b9fab	rt_mutex_lock_interruptible
+EXPORT_SYMBOL_GPL vmlinux 0x0f548d8e	xattr_getsecurity
+EXPORT_SYMBOL_GPL vmlinux 0x10138352	tracing_on
+EXPORT_SYMBOL_GPL vmlinux 0x101c923e	__tracepoint_power_start
+EXPORT_SYMBOL_GPL vmlinux 0x102705e1	__rtnl_link_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x107d3a2b	sysdev_store_ulong
+EXPORT_SYMBOL_GPL vmlinux 0x10939cfe	ring_buffer_commit_overrun_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x109ed2d9	anon_inode_getfile
+EXPORT_SYMBOL_GPL vmlinux 0x10c45f24	devres_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x11205e08	relay_buf_full
+EXPORT_SYMBOL_GPL vmlinux 0x11b2ddc6	tcp_reno_min_cwnd
+EXPORT_SYMBOL_GPL vmlinux 0x11f447ce	__gpio_to_irq
+EXPORT_SYMBOL_GPL vmlinux 0x123f6d94	crypto_alg_mod_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x124f2056	crypto_get_attr_type
+EXPORT_SYMBOL_GPL vmlinux 0x1251d30f	call_rcu
+EXPORT_SYMBOL_GPL vmlinux 0x12b54f81	__audit_inode_child
+EXPORT_SYMBOL_GPL vmlinux 0x12c6713f	generic_detach_inode
+EXPORT_SYMBOL_GPL vmlinux 0x1306724a	crypto_chain
+EXPORT_SYMBOL_GPL vmlinux 0x1335fcbf	shash_ahash_update
+EXPORT_SYMBOL_GPL vmlinux 0x133ac1a7	device_release_driver
+EXPORT_SYMBOL_GPL vmlinux 0x13b2a946	register_keyboard_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x14465782	fb_deferred_io_cleanup
+EXPORT_SYMBOL_GPL vmlinux 0x144ca71b	klist_iter_init_node
+EXPORT_SYMBOL_GPL vmlinux 0x14673963	da903x_read
+EXPORT_SYMBOL_GPL vmlinux 0x149db923	selinux_string_to_sid
+EXPORT_SYMBOL_GPL vmlinux 0x14a84b51	securityfs_remove
+EXPORT_SYMBOL_GPL vmlinux 0x14b14d18	spi_sync
+EXPORT_SYMBOL_GPL vmlinux 0x14f49715	register_ftrace_event
+EXPORT_SYMBOL_GPL vmlinux 0x15800d8e	blk_rq_unprep_clone
+EXPORT_SYMBOL_GPL vmlinux 0x15892417	async_synchronize_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x1598b39d	sysfs_notify
+EXPORT_SYMBOL_GPL vmlinux 0x1598dc9d	unregister_netevent_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x15d57521	filter_current_check_discard
+EXPORT_SYMBOL_GPL vmlinux 0x1683c54e	inet_csk_listen_start
+EXPORT_SYMBOL_GPL vmlinux 0x16974abc	ring_buffer_free_read_page
+EXPORT_SYMBOL_GPL vmlinux 0x1699bcfd	debugfs_create_symlink
+EXPORT_SYMBOL_GPL vmlinux 0x16bd43fe	bus_get_kset
+EXPORT_SYMBOL_GPL vmlinux 0x16fb347b	__blocking_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x172da441	__module_text_address
+EXPORT_SYMBOL_GPL vmlinux 0x17a92b76	debugfs_rename
+EXPORT_SYMBOL_GPL vmlinux 0x17bcfe0c	crypto_register_template
+EXPORT_SYMBOL_GPL vmlinux 0x17c9ce95	rtnl_link_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x17efa6d6	trace_define_common_fields
+EXPORT_SYMBOL_GPL vmlinux 0x1804c203	sysfs_schedule_callback
+EXPORT_SYMBOL_GPL vmlinux 0x1833d76e	ring_buffer_iter_peek
+EXPORT_SYMBOL_GPL vmlinux 0x18526147	bus_for_each_dev
+EXPORT_SYMBOL_GPL vmlinux 0x18fe24ac	inotify_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x19029c7c	drm_class_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x1909f3d2	user_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x191fb096	srcu_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x19b70ac1	perf_tp_event
+EXPORT_SYMBOL_GPL vmlinux 0x19c43fc0	init_user_ns
+EXPORT_SYMBOL_GPL vmlinux 0x19c5b14c	class_compat_remove_link
+EXPORT_SYMBOL_GPL vmlinux 0x1a323362	__ftrace_vbprintk
+EXPORT_SYMBOL_GPL vmlinux 0x1a474901	tracepoint_probe_unregister_noupdate
+EXPORT_SYMBOL_GPL vmlinux 0x1aa7bf08	sysdev_show_int
+EXPORT_SYMBOL_GPL vmlinux 0x1aad86c2	elv_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x1afa6ce9	kernel_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x1b7f9f8a	klist_add_head
+EXPORT_SYMBOL_GPL vmlinux 0x1b9aca3f	jprobe_return
+EXPORT_SYMBOL_GPL vmlinux 0x1bfbf918	eventfd_ctx_fileget
+EXPORT_SYMBOL_GPL vmlinux 0x1c3af716	execute_in_process_context
+EXPORT_SYMBOL_GPL vmlinux 0x1c3e755d	fuse_do_open
+EXPORT_SYMBOL_GPL vmlinux 0x1c852e7c	xfrm_calg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x1c87a811	__round_jiffies_up
+EXPORT_SYMBOL_GPL vmlinux 0x1d3f7437	device_schedule_callback_owner
+EXPORT_SYMBOL_GPL vmlinux 0x1d64c713	ring_buffer_discard_commit
+EXPORT_SYMBOL_GPL vmlinux 0x1d8f8059	__tracepoint_power_end
+EXPORT_SYMBOL_GPL vmlinux 0x1d9af88d	platform_driver_probe
+EXPORT_SYMBOL_GPL vmlinux 0x1db21d74	__tracepoint_kfree_skb
+EXPORT_SYMBOL_GPL vmlinux 0x1dee2629	trace_current_buffer_lock_reserve
+EXPORT_SYMBOL_GPL vmlinux 0x1e085d75	inet_csk_compat_getsockopt
+EXPORT_SYMBOL_GPL vmlinux 0x1e14303a	mm_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x1e7bbcb3	kernel_restart
+EXPORT_SYMBOL_GPL vmlinux 0x1eb9516e	round_jiffies_relative
+EXPORT_SYMBOL_GPL vmlinux 0x1ebf6c2a	pci_power_names
+EXPORT_SYMBOL_GPL vmlinux 0x1ec1f540	spi_async
+EXPORT_SYMBOL_GPL vmlinux 0x1ec31790	sock_prot_inuse_add
+EXPORT_SYMBOL_GPL vmlinux 0x1f5dc691	inet6_hash_connect
+EXPORT_SYMBOL_GPL vmlinux 0x1f7eac43	i2c_new_probed_device
+EXPORT_SYMBOL_GPL vmlinux 0x1f8fa165	fsnotify
+EXPORT_SYMBOL_GPL vmlinux 0x1fcece42	inet_twdr_twcal_tick
+EXPORT_SYMBOL_GPL vmlinux 0x20012b15	ahash_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0x205a3faf	i2c_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x20bc3470	orderly_poweroff
+EXPORT_SYMBOL_GPL vmlinux 0x20f6b1bf	disk_part_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0x215bcbe0	klist_next
+EXPORT_SYMBOL_GPL vmlinux 0x215db6e9	tracepoint_probe_register_noupdate
+EXPORT_SYMBOL_GPL vmlinux 0x22244d7c	gpiochip_is_requested
+EXPORT_SYMBOL_GPL vmlinux 0x2245b2b2	tty_get_pgrp
+EXPORT_SYMBOL_GPL vmlinux 0x2296c00d	crypto_attr_u32
+EXPORT_SYMBOL_GPL vmlinux 0x22d7fdce	platform_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x22e2c20b	atomic_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x231d50bc	driver_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x231f6b43	tcp_reno_ssthresh
+EXPORT_SYMBOL_GPL vmlinux 0x23864ce7	cpuset_mem_spread_node
+EXPORT_SYMBOL_GPL vmlinux 0x23fef771	vfs_test_lock
+EXPORT_SYMBOL_GPL vmlinux 0x2404a7e3	get_cpu_sysdev
+EXPORT_SYMBOL_GPL vmlinux 0x24227c0f	platform_driver_register
+EXPORT_SYMBOL_GPL vmlinux 0x2447533c	ktime_get_real
+EXPORT_SYMBOL_GPL vmlinux 0x24eb7e32	leds_list
+EXPORT_SYMBOL_GPL vmlinux 0x26089005	ip_route_output_flow
+EXPORT_SYMBOL_GPL vmlinux 0x265db448	crypto_init_spawn2
+EXPORT_SYMBOL_GPL vmlinux 0x2662efcb	class_dev_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0x2689cb1a	crypto_alloc_shash
+EXPORT_SYMBOL_GPL vmlinux 0x26951ce6	bus_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x26ad44b4	inode_add_to_lists
+EXPORT_SYMBOL_GPL vmlinux 0x271eba8f	tcp_set_state
+EXPORT_SYMBOL_GPL vmlinux 0x274dc648	flush_workqueue
+EXPORT_SYMBOL_GPL vmlinux 0x278fdc2e	tracepoint_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0x27adf232	tracing_generic_entry_update
+EXPORT_SYMBOL_GPL vmlinux 0x27b63291	class_compat_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x27f2cfe9	apply_to_page_range
+EXPORT_SYMBOL_GPL vmlinux 0x282e0105	ring_buffer_entries
+EXPORT_SYMBOL_GPL vmlinux 0x284116bd	nf_unregister_afinfo
+EXPORT_SYMBOL_GPL vmlinux 0x28705f5c	crypto_ahash_finup
+EXPORT_SYMBOL_GPL vmlinux 0x28756a99	blkdev_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x28b2cc80	atomic_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x28d664ff	__raw_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x28e23139	xfrm_probe_algs
+EXPORT_SYMBOL_GPL vmlinux 0x28f3053b	platform_device_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x2957d131	user_read
+EXPORT_SYMBOL_GPL vmlinux 0x299de8a1	disk_part_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0x29bdef6d	class_dev_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0x29c9b209	ring_buffer_entries_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x2ab27cde	regulator_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x2b2366db	blk_update_request
+EXPORT_SYMBOL_GPL vmlinux 0x2b9f8e23	nf_net_ipv4_netfilter_sysctl_path
+EXPORT_SYMBOL_GPL vmlinux 0x2baccbba	inet_csk_route_req
+EXPORT_SYMBOL_GPL vmlinux 0x2bca18b2	debugfs_create_u64
+EXPORT_SYMBOL_GPL vmlinux 0x2bcaa8e3	flush_work
+EXPORT_SYMBOL_GPL vmlinux 0x2bfc4d7f	tracepoint_get_iter_range
+EXPORT_SYMBOL_GPL vmlinux 0x2c208607	power_supply_is_system_supplied
+EXPORT_SYMBOL_GPL vmlinux 0x2c2174e2	regulator_get_exclusive
+EXPORT_SYMBOL_GPL vmlinux 0x2ce80d33	filter_match_preds
+EXPORT_SYMBOL_GPL vmlinux 0x2ce98559	kcrypto_wq
+EXPORT_SYMBOL_GPL vmlinux 0x2d2174dc	sysdev_driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x2da8ad21	vfs_setlease
+EXPORT_SYMBOL_GPL vmlinux 0x2db7f505	platform_get_resource_byname
+EXPORT_SYMBOL_GPL vmlinux 0x2e3dadf8	rtc_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x2e47f677	xfrm_aalg_get_byidx
+EXPORT_SYMBOL_GPL vmlinux 0x2e5716ee	enable_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0x2eee9db2	sk_setup_caps
+EXPORT_SYMBOL_GPL vmlinux 0x2efcf783	save_stack_trace_tsk
+EXPORT_SYMBOL_GPL vmlinux 0x2f3d0904	gpiochip_remove
+EXPORT_SYMBOL_GPL vmlinux 0x2facc843	device_reprobe
+EXPORT_SYMBOL_GPL vmlinux 0x30c262e8	task_current_syscall
+EXPORT_SYMBOL_GPL vmlinux 0x3120fa0c	register_pernet_gen_subsys
+EXPORT_SYMBOL_GPL vmlinux 0x31522e71	crypto_lookup_template
+EXPORT_SYMBOL_GPL vmlinux 0x318da3b8	power_supply_get_by_name
+EXPORT_SYMBOL_GPL vmlinux 0x31c79a01	tcp_death_row
+EXPORT_SYMBOL_GPL vmlinux 0x31da884a	register_pernet_device
+EXPORT_SYMBOL_GPL vmlinux 0x32a6b165	bsg_unregister_queue
+EXPORT_SYMBOL_GPL vmlinux 0x32d5e7fc	xfrm_aalg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x32f17454	ring_buffer_event_data
+EXPORT_SYMBOL_GPL vmlinux 0x334d5242	gpiochip_add
+EXPORT_SYMBOL_GPL vmlinux 0x3362f065	ring_buffer_peek
+EXPORT_SYMBOL_GPL vmlinux 0x33a646b8	xfrm_audit_state_notfound
+EXPORT_SYMBOL_GPL vmlinux 0x33bf8961	raw_seq_next
+EXPORT_SYMBOL_GPL vmlinux 0x33d3a89c	netlink_has_listeners
+EXPORT_SYMBOL_GPL vmlinux 0x33f57f8b	tty_ldisc_ref
+EXPORT_SYMBOL_GPL vmlinux 0x34275124	trace_current_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0x34309407	da903x_update
+EXPORT_SYMBOL_GPL vmlinux 0x3441c3d6	gpio_set_value_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x348378a5	rt_mutex_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x34cdf54d	devres_release_group
+EXPORT_SYMBOL_GPL vmlinux 0x34fe5fc7	setup_irq
+EXPORT_SYMBOL_GPL vmlinux 0x3525046d	device_rename
+EXPORT_SYMBOL_GPL vmlinux 0x3615423a	single_release_net
+EXPORT_SYMBOL_GPL vmlinux 0x361e2bcc	save_stack_trace
+EXPORT_SYMBOL_GPL vmlinux 0x362e23ec	call_rcu_bh
+EXPORT_SYMBOL_GPL vmlinux 0x36a049aa	skb_icv_walk
+EXPORT_SYMBOL_GPL vmlinux 0x36a55400	tty_mode_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x36c1bf10	bus_register
+EXPORT_SYMBOL_GPL vmlinux 0x370afd64	sysdev_class_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x37308d1b	crypto_mod_put
+EXPORT_SYMBOL_GPL vmlinux 0x374cf513	rtc_update_irq
+EXPORT_SYMBOL_GPL vmlinux 0x3783641d	spi_get_device_id
+EXPORT_SYMBOL_GPL vmlinux 0x37ad4176	__tracepoint_block_bio_complete
+EXPORT_SYMBOL_GPL vmlinux 0x38e05a5c	driver_register
+EXPORT_SYMBOL_GPL vmlinux 0x393e6e9a	eventfd_signal
+EXPORT_SYMBOL_GPL vmlinux 0x39819646	atomic_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x39afb465	tcp_get_info
+EXPORT_SYMBOL_GPL vmlinux 0x39b5ee89	rtc_irq_register
+EXPORT_SYMBOL_GPL vmlinux 0x39b732d8	single_open_net
+EXPORT_SYMBOL_GPL vmlinux 0x3a99b1b9	crypto_init_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x3aa3ebe7	tty_encode_baud_rate
+EXPORT_SYMBOL_GPL vmlinux 0x3ada5777	relay_switch_subbuf
+EXPORT_SYMBOL_GPL vmlinux 0x3adb362c	eventfd_ctx_fdget
+EXPORT_SYMBOL_GPL vmlinux 0x3aff6e37	ring_buffer_size
+EXPORT_SYMBOL_GPL vmlinux 0x3b525ea6	regulator_enable
+EXPORT_SYMBOL_GPL vmlinux 0x3bb0c836	fb_bl_default_curve
+EXPORT_SYMBOL_GPL vmlinux 0x3bc33f65	cleanup_srcu_struct
+EXPORT_SYMBOL_GPL vmlinux 0x3bcb0715	xfrm_audit_state_notfound_simple
+EXPORT_SYMBOL_GPL vmlinux 0x3be7af02	get_max_files
+EXPORT_SYMBOL_GPL vmlinux 0x3c27f4a6	regulator_force_disable
+EXPORT_SYMBOL_GPL vmlinux 0x3c6c45ca	__tracepoint_power_frequency
+EXPORT_SYMBOL_GPL vmlinux 0x3c83e164	devm_kzalloc
+EXPORT_SYMBOL_GPL vmlinux 0x3cc86f7c	crypto_init_ahash_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x3cd06035	add_input_randomness
+EXPORT_SYMBOL_GPL vmlinux 0x3cead838	class_interface_register
+EXPORT_SYMBOL_GPL vmlinux 0x3cfdfae5	trace_current_buffer_discard_commit
+EXPORT_SYMBOL_GPL vmlinux 0x3d4ee9fa	fuse_conn_put
+EXPORT_SYMBOL_GPL vmlinux 0x3d6dec0f	xfrm_audit_state_icvfail
+EXPORT_SYMBOL_GPL vmlinux 0x3dbf3968	__ring_buffer_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x3dc86319	sysfs_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x3ea019b2	class_compat_register
+EXPORT_SYMBOL_GPL vmlinux 0x3eca555e	simple_attr_release
+EXPORT_SYMBOL_GPL vmlinux 0x3f5249ee	spi_write_then_read
+EXPORT_SYMBOL_GPL vmlinux 0x3f822a14	use_module
+EXPORT_SYMBOL_GPL vmlinux 0x3f937cf4	register_kprobes
+EXPORT_SYMBOL_GPL vmlinux 0x3fc1481c	dev_change_net_namespace
+EXPORT_SYMBOL_GPL vmlinux 0x3fdd9505	crypto_alloc_ahash
+EXPORT_SYMBOL_GPL vmlinux 0x3ff3abb7	kset_create_and_add
+EXPORT_SYMBOL_GPL vmlinux 0x3ff616a6	proc_net_remove
+EXPORT_SYMBOL_GPL vmlinux 0x4024a4aa	dma_get_required_mask
+EXPORT_SYMBOL_GPL vmlinux 0x4034e7df	regulator_get_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0x40402e40	inotify_init_watch
+EXPORT_SYMBOL_GPL vmlinux 0x40450286	sysfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x4055c683	each_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x409d6f9f	debugfs_create_size_t
+EXPORT_SYMBOL_GPL vmlinux 0x40ad078a	attribute_container_classdev_to_container
+EXPORT_SYMBOL_GPL vmlinux 0x41071852	mnt_want_write
+EXPORT_SYMBOL_GPL vmlinux 0x4171af0a	crypto_register_alg
+EXPORT_SYMBOL_GPL vmlinux 0x41960a6c	xfrm_audit_policy_delete
+EXPORT_SYMBOL_GPL vmlinux 0x419923aa	sk_clone
+EXPORT_SYMBOL_GPL vmlinux 0x4223fb40	lookup_instantiate_filp
+EXPORT_SYMBOL_GPL vmlinux 0x42418e52	kobject_uevent
+EXPORT_SYMBOL_GPL vmlinux 0x42494cea	ring_buffer_event_length
+EXPORT_SYMBOL_GPL vmlinux 0x429db46e	br_fdb_test_addr_hook
+EXPORT_SYMBOL_GPL vmlinux 0x42a16723	led_trigger_register_simple
+EXPORT_SYMBOL_GPL vmlinux 0x42a286d3	ring_buffer_alloc_read_page
+EXPORT_SYMBOL_GPL vmlinux 0x42a57394	tracepoint_iter_reset
+EXPORT_SYMBOL_GPL vmlinux 0x42cfa37e	page_cache_sync_readahead
+EXPORT_SYMBOL_GPL vmlinux 0x4301ab52	proc_net_mkdir
+EXPORT_SYMBOL_GPL vmlinux 0x431b1005	kill_pid_info_as_uid
+EXPORT_SYMBOL_GPL vmlinux 0x432fd7f6	__gpio_set_value
+EXPORT_SYMBOL_GPL vmlinux 0x43555391	dm_requeue_unmapped_request
+EXPORT_SYMBOL_GPL vmlinux 0x441a046d	dm_get_rq_mapinfo
+EXPORT_SYMBOL_GPL vmlinux 0x445441f2	device_remove_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0x4484a5a4	wait_for_device_probe
+EXPORT_SYMBOL_GPL vmlinux 0x44b7f899	ring_buffer_read
+EXPORT_SYMBOL_GPL vmlinux 0x44d2680b	relay_flush
+EXPORT_SYMBOL_GPL vmlinux 0x44da82e2	find_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x45668e5d	shash_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0x457594fa	crypto_alg_list
+EXPORT_SYMBOL_GPL vmlinux 0x45bf1ff3	crypto_inc
+EXPORT_SYMBOL_GPL vmlinux 0x45fe7de8	bus_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x46266f60	anon_transport_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x46651e97	__sock_recv_timestamp
+EXPORT_SYMBOL_GPL vmlinux 0x4672e88b	__crypto_dequeue_request
+EXPORT_SYMBOL_GPL vmlinux 0x46b0fc07	blkcipher_walk_virt
+EXPORT_SYMBOL_GPL vmlinux 0x47229b5c	gpio_request
+EXPORT_SYMBOL_GPL vmlinux 0x47355ea6	raw_seq_open
+EXPORT_SYMBOL_GPL vmlinux 0x479b72e5	console_drivers
+EXPORT_SYMBOL_GPL vmlinux 0x479d6ea9	find_get_pid
+EXPORT_SYMBOL_GPL vmlinux 0x4807fd5a	class_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x48735d3a	generic_drop_inode
+EXPORT_SYMBOL_GPL vmlinux 0x4887f980	sock_prot_inuse_get
+EXPORT_SYMBOL_GPL vmlinux 0x488f5c75	pci_set_pcie_reset_state
+EXPORT_SYMBOL_GPL vmlinux 0x493de8f5	sysfs_notify_dirent
+EXPORT_SYMBOL_GPL vmlinux 0x497c535b	crypto_shash_setkey
+EXPORT_SYMBOL_GPL vmlinux 0x499043d3	crypto_init_queue
+EXPORT_SYMBOL_GPL vmlinux 0x4992e11b	sysfs_add_file_to_group
+EXPORT_SYMBOL_GPL vmlinux 0x499b61ce	inet_hash
+EXPORT_SYMBOL_GPL vmlinux 0x49a246b4	skb_segment
+EXPORT_SYMBOL_GPL vmlinux 0x49c4417b	i2c_add_numbered_adapter
+EXPORT_SYMBOL_GPL vmlinux 0x49cdd9cc	__module_address
+EXPORT_SYMBOL_GPL vmlinux 0x4a3221e4	crypto_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x4a3c9715	bus_sort_breadthfirst
+EXPORT_SYMBOL_GPL vmlinux 0x4a916cf3	rtc_irq_set_state
+EXPORT_SYMBOL_GPL vmlinux 0x4a9a5f1e	crypto_shoot_alg
+EXPORT_SYMBOL_GPL vmlinux 0x4a9f9086	crypto_nivaead_type
+EXPORT_SYMBOL_GPL vmlinux 0x4b1febe5	device_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x4b5cfe56	ring_buffer_consume
+EXPORT_SYMBOL_GPL vmlinux 0x4b60dc60	ahash_free_instance
+EXPORT_SYMBOL_GPL vmlinux 0x4c27d15d	sysdev_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x4c72c022	leds_list_lock
+EXPORT_SYMBOL_GPL vmlinux 0x4c759827	byte_rev_table
+EXPORT_SYMBOL_GPL vmlinux 0x4c848371	tcp_orphan_count
+EXPORT_SYMBOL_GPL vmlinux 0x4d8f4c15	klist_add_before
+EXPORT_SYMBOL_GPL vmlinux 0x4db31320	regulator_set_mode
+EXPORT_SYMBOL_GPL vmlinux 0x4dff4262	user_match
+EXPORT_SYMBOL_GPL vmlinux 0x4e6e8d34	driver_for_each_device
+EXPORT_SYMBOL_GPL vmlinux 0x4ee05be7	blk_rq_err_bytes
+EXPORT_SYMBOL_GPL vmlinux 0x4ee4cd2b	debugfs_create_u16
+EXPORT_SYMBOL_GPL vmlinux 0x4efbd1fd	blocking_notifier_chain_cond_register
+EXPORT_SYMBOL_GPL vmlinux 0x4f12aba6	led_trigger_register
+EXPORT_SYMBOL_GPL vmlinux 0x4f1eb8a6	__inet_twsk_hashdance
+EXPORT_SYMBOL_GPL vmlinux 0x4f668719	tty_ldisc_ref_wait
+EXPORT_SYMBOL_GPL vmlinux 0x4fae2093	user_describe
+EXPORT_SYMBOL_GPL vmlinux 0x4fd35bbd	mnt_want_write_file
+EXPORT_SYMBOL_GPL vmlinux 0x50069d4b	inet6_lookup_listener
+EXPORT_SYMBOL_GPL vmlinux 0x5022d98c	simple_attr_open
+EXPORT_SYMBOL_GPL vmlinux 0x50326ca7	__rtnl_link_register
+EXPORT_SYMBOL_GPL vmlinux 0x504419db	pci_bus_add_device
+EXPORT_SYMBOL_GPL vmlinux 0x505ab317	class_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x5086ac3a	alg_test
+EXPORT_SYMBOL_GPL vmlinux 0x508ed241	security_inode_create
+EXPORT_SYMBOL_GPL vmlinux 0x508fb20c	spi_setup
+EXPORT_SYMBOL_GPL vmlinux 0x50be58e8	mnt_clone_write
+EXPORT_SYMBOL_GPL vmlinux 0x50e7193a	__i2c_first_dynamic_bus_num
+EXPORT_SYMBOL_GPL vmlinux 0x50f5e532	call_rcu_sched
+EXPORT_SYMBOL_GPL vmlinux 0x50f69c47	regulator_bulk_get
+EXPORT_SYMBOL_GPL vmlinux 0x50fad434	round_jiffies_up
+EXPORT_SYMBOL_GPL vmlinux 0x515a94ef	dm_kill_unmapped_request
+EXPORT_SYMBOL_GPL vmlinux 0x5190015b	__rt_mutex_init
+EXPORT_SYMBOL_GPL vmlinux 0x52392653	inotify_rm_watch
+EXPORT_SYMBOL_GPL vmlinux 0x52d111ea	pm_qos_update_requirement
+EXPORT_SYMBOL_GPL vmlinux 0x5324d04f	bstr_printf
+EXPORT_SYMBOL_GPL vmlinux 0x53614269	get_cpu_idle_time_us
+EXPORT_SYMBOL_GPL vmlinux 0x5362a4cd	da903x_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5371afd7	elv_register
+EXPORT_SYMBOL_GPL vmlinux 0x53814f6a	unregister_pernet_device
+EXPORT_SYMBOL_GPL vmlinux 0x53986488	register_die_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x54393751	inotify_inode_queue_event
+EXPORT_SYMBOL_GPL vmlinux 0x543ab112	inet6_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x5460c8d8	fsnotify_get_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x548aee9c	da903x_writes
+EXPORT_SYMBOL_GPL vmlinux 0x549525ef	handle_nested_irq
+EXPORT_SYMBOL_GPL vmlinux 0x54a8c84d	__fsnotify_inode_delete
+EXPORT_SYMBOL_GPL vmlinux 0x54cb106d	inverse_translate
+EXPORT_SYMBOL_GPL vmlinux 0x54cf5ec8	uhci_check_and_reset_hc
+EXPORT_SYMBOL_GPL vmlinux 0x54d284ec	class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x550a3077	spi_new_device
+EXPORT_SYMBOL_GPL vmlinux 0x55b1e7e1	synchronize_srcu
+EXPORT_SYMBOL_GPL vmlinux 0x55d0d168	bus_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x56310925	regulator_mode_to_status
+EXPORT_SYMBOL_GPL vmlinux 0x563fb5c8	__trace_bprintk
+EXPORT_SYMBOL_GPL vmlinux 0x5678d54b	skb_morph
+EXPORT_SYMBOL_GPL vmlinux 0x567c7f09	relay_file_operations
+EXPORT_SYMBOL_GPL vmlinux 0x569633e1	device_create_vargs
+EXPORT_SYMBOL_GPL vmlinux 0x571198f0	fs_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x573ca15c	vfs_listxattr
+EXPORT_SYMBOL_GPL vmlinux 0x57713ec1	__pneigh_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x577b599e	ring_buffer_write
+EXPORT_SYMBOL_GPL vmlinux 0x579e0bf5	rtnl_unregister_all
+EXPORT_SYMBOL_GPL vmlinux 0x5884f5c6	bus_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x5a1080de	crypto_register_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0x5a3a31e2	rt_mutex_trylock
+EXPORT_SYMBOL_GPL vmlinux 0x5a418857	tcp_init_congestion_ops
+EXPORT_SYMBOL_GPL vmlinux 0x5a7bfe41	crypto_probing_notify
+EXPORT_SYMBOL_GPL vmlinux 0x5aa4f795	skcipher_geniv_free
+EXPORT_SYMBOL_GPL vmlinux 0x5abbdbc4	sysfs_create_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0x5ac8e6db	__ip_route_output_key
+EXPORT_SYMBOL_GPL vmlinux 0x5b0022eb	device_initialize
+EXPORT_SYMBOL_GPL vmlinux 0x5b6114c4	fsstack_copy_inode_size
+EXPORT_SYMBOL_GPL vmlinux 0x5b7b8fca	skb_gro_receive
+EXPORT_SYMBOL_GPL vmlinux 0x5bac7788	register_jprobes
+EXPORT_SYMBOL_GPL vmlinux 0x5bfc03c3	unregister_keyboard_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5c2db73d	__inet_lookup_listener
+EXPORT_SYMBOL_GPL vmlinux 0x5c4c2bcc	tty_termios_encode_baud_rate
+EXPORT_SYMBOL_GPL vmlinux 0x5cefbe9e	anon_transport_class_register
+EXPORT_SYMBOL_GPL vmlinux 0x5d0f6f57	kbd_table
+EXPORT_SYMBOL_GPL vmlinux 0x5d730e7b	raw_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x5dd67618	register_netevent_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5e51e988	hrtimer_start_range_ns
+EXPORT_SYMBOL_GPL vmlinux 0x5eb0fca1	page_cache_async_readahead
+EXPORT_SYMBOL_GPL vmlinux 0x5fa69f09	get_inotify_watch
+EXPORT_SYMBOL_GPL vmlinux 0x5fcdec5d	xfrm_ealg_get_byidx
+EXPORT_SYMBOL_GPL vmlinux 0x5feb5095	pci_enable_rom
+EXPORT_SYMBOL_GPL vmlinux 0x60289d3b	ring_buffer_free
+EXPORT_SYMBOL_GPL vmlinux 0x6099729d	fuse_direct_io
+EXPORT_SYMBOL_GPL vmlinux 0x609dba63	__mnt_is_readonly
+EXPORT_SYMBOL_GPL vmlinux 0x60a13e90	rcu_barrier
+EXPORT_SYMBOL_GPL vmlinux 0x60a72f48	fuse_conn_get
+EXPORT_SYMBOL_GPL vmlinux 0x60db568b	debugfs_remove_recursive
+EXPORT_SYMBOL_GPL vmlinux 0x60f0b9d2	attribute_container_find_class_device
+EXPORT_SYMBOL_GPL vmlinux 0x611e756d	crypto_hash_walk_done
+EXPORT_SYMBOL_GPL vmlinux 0x61693711	pci_find_ext_capability
+EXPORT_SYMBOL_GPL vmlinux 0x61a7acb8	devres_close_group
+EXPORT_SYMBOL_GPL vmlinux 0x61d0c980	vfs_lock_file
+EXPORT_SYMBOL_GPL vmlinux 0x622b3e2c	srcu_read_lock
+EXPORT_SYMBOL_GPL vmlinux 0x626b4cfa	device_create_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0x629a7f6e	do_posix_clock_nonanosleep
+EXPORT_SYMBOL_GPL vmlinux 0x62c70569	fuse_get_req
+EXPORT_SYMBOL_GPL vmlinux 0x62ebfff6	simple_attr_read
+EXPORT_SYMBOL_GPL vmlinux 0x63e5747b	device_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x63f4dc09	bprintf
+EXPORT_SYMBOL_GPL vmlinux 0x640beb03	bsg_register_queue
+EXPORT_SYMBOL_GPL vmlinux 0x644101e6	put_driver
+EXPORT_SYMBOL_GPL vmlinux 0x647f9377	find_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0x649e9592	klist_init
+EXPORT_SYMBOL_GPL vmlinux 0x64e1bd3f	input_class
+EXPORT_SYMBOL_GPL vmlinux 0x64fbe59a	queue_work
+EXPORT_SYMBOL_GPL vmlinux 0x65253fd2	free_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0x6549df2a	vfs_kern_mount
+EXPORT_SYMBOL_GPL vmlinux 0x65bbbc78	schedule_hrtimeout_range
+EXPORT_SYMBOL_GPL vmlinux 0x65c86d86	device_add
+EXPORT_SYMBOL_GPL vmlinux 0x65cbc02a	ring_buffer_reset
+EXPORT_SYMBOL_GPL vmlinux 0x65ccb6f0	call_netevent_notifiers
+EXPORT_SYMBOL_GPL vmlinux 0x65d6d0f0	gpio_direction_input
+EXPORT_SYMBOL_GPL vmlinux 0x661601de	sprint_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x6642039e	tty_buffer_request_room
+EXPORT_SYMBOL_GPL vmlinux 0x66754452	spi_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0x667a21a6	pci_create_slot
+EXPORT_SYMBOL_GPL vmlinux 0x667fc3ea	blk_queue_lld_busy
+EXPORT_SYMBOL_GPL vmlinux 0x668402aa	crypto_put_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x6692cd7e	of_modalias_node
+EXPORT_SYMBOL_GPL vmlinux 0x66b2a859	nr_free_buffer_pages
+EXPORT_SYMBOL_GPL vmlinux 0x66d87d38	symbol_put_addr
+EXPORT_SYMBOL_GPL vmlinux 0x66e7e223	power_supply_am_i_supplied
+EXPORT_SYMBOL_GPL vmlinux 0x66f03065	sysdev_show_ulong
+EXPORT_SYMBOL_GPL vmlinux 0x6727e699	devres_find
+EXPORT_SYMBOL_GPL vmlinux 0x678f6348	rdev_get_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0x6836a082	register_posix_clock
+EXPORT_SYMBOL_GPL vmlinux 0x686c703f	xfrm_count_auth_supported
+EXPORT_SYMBOL_GPL vmlinux 0x6901119a	trace_nowake_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0x69a961bc	dequeue_signal
+EXPORT_SYMBOL_GPL vmlinux 0x69bfb5e3	securityfs_create_dir
+EXPORT_SYMBOL_GPL vmlinux 0x69df6c6c	bdi_writeout_inc
+EXPORT_SYMBOL_GPL vmlinux 0x69e8a0dd	securityfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x6a1ac352	__get_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0x6ab7b758	dm_dispatch_request
+EXPORT_SYMBOL_GPL vmlinux 0x6ad8ff0d	disable_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0x6b1247ce	hwmon_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x6be62dfd	probe_kernel_read
+EXPORT_SYMBOL_GPL vmlinux 0x6c49c4f2	clockevents_notify
+EXPORT_SYMBOL_GPL vmlinux 0x6c79adcd	macvlan_handle_frame_hook
+EXPORT_SYMBOL_GPL vmlinux 0x6c8d5ae8	__gpio_get_value
+EXPORT_SYMBOL_GPL vmlinux 0x6c8eb98f	xfrm_aalg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0x6c91004d	kobject_init_and_add
+EXPORT_SYMBOL_GPL vmlinux 0x6ce2f647	skcipher_geniv_init
+EXPORT_SYMBOL_GPL vmlinux 0x6d2fc5a6	net_namespace_list
+EXPORT_SYMBOL_GPL vmlinux 0x6e7474fc	xfrm_ealg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x6ea08b65	aead_geniv_init
+EXPORT_SYMBOL_GPL vmlinux 0x6ec8e53a	hwmon_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x6f4816ff	page_mkclean
+EXPORT_SYMBOL_GPL vmlinux 0x6fb9af9c	blk_trace_remove
+EXPORT_SYMBOL_GPL vmlinux 0x6fe3d8cf	ktime_add_safe
+EXPORT_SYMBOL_GPL vmlinux 0x6ff06504	unregister_ftrace_event
+EXPORT_SYMBOL_GPL vmlinux 0x6ff607b6	crypto_get_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x705b2b54	da903x_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x70763bc8	anon_inode_getfd
+EXPORT_SYMBOL_GPL vmlinux 0x7084379a	tcp_is_cwnd_limited
+EXPORT_SYMBOL_GPL vmlinux 0x70e24321	kobject_create_and_add
+EXPORT_SYMBOL_GPL vmlinux 0x71357fb1	__mmdrop
+EXPORT_SYMBOL_GPL vmlinux 0x716265c7	debugfs_initialized
+EXPORT_SYMBOL_GPL vmlinux 0x7168048b	ring_buffer_record_enable
+EXPORT_SYMBOL_GPL vmlinux 0x719c5f5d	crypto_ahash_type
+EXPORT_SYMBOL_GPL vmlinux 0x7268ab9e	regulator_put
+EXPORT_SYMBOL_GPL vmlinux 0x72741f25	trace_vbprintk
+EXPORT_SYMBOL_GPL vmlinux 0x7278d328	all_vm_events
+EXPORT_SYMBOL_GPL vmlinux 0x7288c24a	crypto_shash_final
+EXPORT_SYMBOL_GPL vmlinux 0x728b35a3	drop_file_write_access
+EXPORT_SYMBOL_GPL vmlinux 0x742b1fe4	da903x_write
+EXPORT_SYMBOL_GPL vmlinux 0x744f89c8	inotify_find_update_watch
+EXPORT_SYMBOL_GPL vmlinux 0x746ddd9b	sysfs_update_group
+EXPORT_SYMBOL_GPL vmlinux 0x74baf17a	tracing_is_on
+EXPORT_SYMBOL_GPL vmlinux 0x75413e0c	device_attach
+EXPORT_SYMBOL_GPL vmlinux 0x759704e9	user_instantiate
+EXPORT_SYMBOL_GPL vmlinux 0x75b0cbff	nf_unregister_queue_handlers
+EXPORT_SYMBOL_GPL vmlinux 0x75e8f3c3	crypto_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x760e102c	crypto_rng_type
+EXPORT_SYMBOL_GPL vmlinux 0x76249884	root_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x77372dad	default_backing_dev_info
+EXPORT_SYMBOL_GPL vmlinux 0x773ca527	init_uts_ns
+EXPORT_SYMBOL_GPL vmlinux 0x774b2fa9	add_to_page_cache_lru
+EXPORT_SYMBOL_GPL vmlinux 0x77d1427c	platform_device_add_resources
+EXPORT_SYMBOL_GPL vmlinux 0x77fda026	device_register
+EXPORT_SYMBOL_GPL vmlinux 0x784b4d34	platform_device_register_simple
+EXPORT_SYMBOL_GPL vmlinux 0x785e3a2a	class_for_each_device
+EXPORT_SYMBOL_GPL vmlinux 0x787a96e6	device_find_child
+EXPORT_SYMBOL_GPL vmlinux 0x7889c130	rtc_set_mmss
+EXPORT_SYMBOL_GPL vmlinux 0x78af7c8f	init_srcu_struct
+EXPORT_SYMBOL_GPL vmlinux 0x78e4a4ee	klist_add_after
+EXPORT_SYMBOL_GPL vmlinux 0x793b894f	crypto_alg_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x7944e0fc	tracing_off
+EXPORT_SYMBOL_GPL vmlinux 0x7948d109	srcu_read_unlock
+EXPORT_SYMBOL_GPL vmlinux 0x79f093bd	uart_console_write
+EXPORT_SYMBOL_GPL vmlinux 0x7a1c4be6	nmi_adjust_hz
+EXPORT_SYMBOL_GPL vmlinux 0x7a443882	mnt_drop_write
+EXPORT_SYMBOL_GPL vmlinux 0x7a9fcfe2	sysdev_class_register
+EXPORT_SYMBOL_GPL vmlinux 0x7ac5ccce	dm_noflush_suspending
+EXPORT_SYMBOL_GPL vmlinux 0x7b2d4d12	do_sync_mapping_range
+EXPORT_SYMBOL_GPL vmlinux 0x7b4b596c	__inet_hash_nolisten
+EXPORT_SYMBOL_GPL vmlinux 0x7c28ba8b	ring_buffer_record_disable
+EXPORT_SYMBOL_GPL vmlinux 0x7c300324	ring_buffer_read_page
+EXPORT_SYMBOL_GPL vmlinux 0x7d8341fc	hrtimer_forward
+EXPORT_SYMBOL_GPL vmlinux 0x7da5135b	regulator_get_voltage
+EXPORT_SYMBOL_GPL vmlinux 0x7daf0726	rt_mutex_timed_lock
+EXPORT_SYMBOL_GPL vmlinux 0x7dc5d0b6	crypto_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x7e1183c9	async_schedule
+EXPORT_SYMBOL_GPL vmlinux 0x7e78aa8d	raw_seq_start
+EXPORT_SYMBOL_GPL vmlinux 0x7eb82bbd	crypto_larval_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x7edd12a6	led_trigger_set_default
+EXPORT_SYMBOL_GPL vmlinux 0x7f8e43d9	transport_remove_device
+EXPORT_SYMBOL_GPL vmlinux 0x7ff10ccf	raw_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x8022abff	register_pernet_gen_device
+EXPORT_SYMBOL_GPL vmlinux 0x8039d043	selinux_secmark_relabel_packet_permission
+EXPORT_SYMBOL_GPL vmlinux 0x80639c05	kern_mount_data
+EXPORT_SYMBOL_GPL vmlinux 0x808ec1a3	crypto_alg_tested
+EXPORT_SYMBOL_GPL vmlinux 0x80ee55c3	selinux_secmark_refcount_inc
+EXPORT_SYMBOL_GPL vmlinux 0x81034ae3	crypto_alloc_base
+EXPORT_SYMBOL_GPL vmlinux 0x812048c6	register_net_sysctl_rotable
+EXPORT_SYMBOL_GPL vmlinux 0x8168cb26	fb_deferred_io_open
+EXPORT_SYMBOL_GPL vmlinux 0x81bfc8bb	raw_hash_sk
+EXPORT_SYMBOL_GPL vmlinux 0x8203e9bb	relay_close
+EXPORT_SYMBOL_GPL vmlinux 0x8226642f	__gpio_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x82845f2e	posix_timer_event
+EXPORT_SYMBOL_GPL vmlinux 0x828ba808	regulator_get_mode
+EXPORT_SYMBOL_GPL vmlinux 0x82939ebd	rcu_batches_completed_sched
+EXPORT_SYMBOL_GPL vmlinux 0x82d79b51	sysctl_vfs_cache_pressure
+EXPORT_SYMBOL_GPL vmlinux 0x82f776b7	gpio_export
+EXPORT_SYMBOL_GPL vmlinux 0x836e2174	crypto_spawn_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x83774c03	inet_csk_search_req
+EXPORT_SYMBOL_GPL vmlinux 0x8412e3c5	srcu_batches_completed
+EXPORT_SYMBOL_GPL vmlinux 0x841c9e35	shmem_file_setup
+EXPORT_SYMBOL_GPL vmlinux 0x843567ce	debugfs_remove
+EXPORT_SYMBOL_GPL vmlinux 0x8505d388	scatterwalk_copychunks
+EXPORT_SYMBOL_GPL vmlinux 0x857e629f	class_interface_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x85a078b5	fuse_conn_kill
+EXPORT_SYMBOL_GPL vmlinux 0x85c10896	rcu_batches_completed_bh
+EXPORT_SYMBOL_GPL vmlinux 0x85fcbfa6	crypto_givcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0x860b9b02	handle_level_irq
+EXPORT_SYMBOL_GPL vmlinux 0x8621c382	rtc_alarm_irq_enable
+EXPORT_SYMBOL_GPL vmlinux 0x86432922	regulator_get_current_limit
+EXPORT_SYMBOL_GPL vmlinux 0x868784cb	__symbol_get
+EXPORT_SYMBOL_GPL vmlinux 0x8689e200	inet_twsk_purge
+EXPORT_SYMBOL_GPL vmlinux 0x86b1667d	hwrng_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x86f6b99d	synchronize_rcu_expedited
+EXPORT_SYMBOL_GPL vmlinux 0x87129cdf	debugfs_create_x32
+EXPORT_SYMBOL_GPL vmlinux 0x87578a06	tty_ldisc_flush
+EXPORT_SYMBOL_GPL vmlinux 0x87754115	raw_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x87997daf	__class_create
+EXPORT_SYMBOL_GPL vmlinux 0x87ac1bc6	klist_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0x87ee1a0d	pci_find_next_ht_capability
+EXPORT_SYMBOL_GPL vmlinux 0x880082b4	driver_add_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x8810ad5e	crypto_xor
+EXPORT_SYMBOL_GPL vmlinux 0x885142a6	nf_net_netfilter_sysctl_path
+EXPORT_SYMBOL_GPL vmlinux 0x8871dbac	dm_device_name
+EXPORT_SYMBOL_GPL vmlinux 0x88831ef5	crypto_register_ahash
+EXPORT_SYMBOL_GPL vmlinux 0x88c04047	blk_add_driver_data
+EXPORT_SYMBOL_GPL vmlinux 0x893549af	fixed_phy_set_link_update
+EXPORT_SYMBOL_GPL vmlinux 0x89bc548c	bus_rescan_devices
+EXPORT_SYMBOL_GPL vmlinux 0x8a9cb4db	pci_ioremap_bar
+EXPORT_SYMBOL_GPL vmlinux 0x8b8d157a	crypto_spawn_tfm2
+EXPORT_SYMBOL_GPL vmlinux 0x8bdc530f	uhci_reset_hc
+EXPORT_SYMBOL_GPL vmlinux 0x8c3469dd	clockevents_register_device
+EXPORT_SYMBOL_GPL vmlinux 0x8ca34781	crypto_find_alg
+EXPORT_SYMBOL_GPL vmlinux 0x8cf3c172	disk_part_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0x8d033df4	klist_node_attached
+EXPORT_SYMBOL_GPL vmlinux 0x8d35b397	crypto_shash_digest
+EXPORT_SYMBOL_GPL vmlinux 0x8d72dc7f	device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x8db092d3	crypto_shash_update
+EXPORT_SYMBOL_GPL vmlinux 0x8dc5131a	regulator_bulk_enable
+EXPORT_SYMBOL_GPL vmlinux 0x8de66638	register_kretprobes
+EXPORT_SYMBOL_GPL vmlinux 0x8e0368a2	tcp_done
+EXPORT_SYMBOL_GPL vmlinux 0x8e36d178	__rtnl_register
+EXPORT_SYMBOL_GPL vmlinux 0x8e908efd	transport_class_register
+EXPORT_SYMBOL_GPL vmlinux 0x8f6cee77	__round_jiffies_relative
+EXPORT_SYMBOL_GPL vmlinux 0x8fa74514	sysdev_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x8fc0cc2d	vfs_cancel_lock
+EXPORT_SYMBOL_GPL vmlinux 0x90157348	cpu_bit_bitmap
+EXPORT_SYMBOL_GPL vmlinux 0x90407712	dm_path_uevent
+EXPORT_SYMBOL_GPL vmlinux 0x90a1004a	crypto_has_alg
+EXPORT_SYMBOL_GPL vmlinux 0x910c9455	sysdev_class_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x911d264d	eventfd_fget
+EXPORT_SYMBOL_GPL vmlinux 0x91690f52	inotify_remove_watch_locked
+EXPORT_SYMBOL_GPL vmlinux 0x91c16125	seq_open_net
+EXPORT_SYMBOL_GPL vmlinux 0x91c2c350	task_active_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0x91c92246	scatterwalk_start
+EXPORT_SYMBOL_GPL vmlinux 0x91fc1f09	crypto_unregister_template
+EXPORT_SYMBOL_GPL vmlinux 0x9226de04	simple_attr_write
+EXPORT_SYMBOL_GPL vmlinux 0x92297c6d	__set_irq_handler
+EXPORT_SYMBOL_GPL vmlinux 0x926126d8	__pci_complete_power_transition
+EXPORT_SYMBOL_GPL vmlinux 0x9273f55e	get_net_ns_by_pid
+EXPORT_SYMBOL_GPL vmlinux 0x9291f27e	vfs_getxattr
+EXPORT_SYMBOL_GPL vmlinux 0x92d31cfb	fixed_phy_add
+EXPORT_SYMBOL_GPL vmlinux 0x9323afba	da903x_reads
+EXPORT_SYMBOL_GPL vmlinux 0x93293350	crypto_alloc_instance2
+EXPORT_SYMBOL_GPL vmlinux 0x9354f8ad	led_trigger_remove
+EXPORT_SYMBOL_GPL vmlinux 0x936fd83d	blk_queue_dma_drain
+EXPORT_SYMBOL_GPL vmlinux 0x93c695d6	inet_csk_bind_conflict
+EXPORT_SYMBOL_GPL vmlinux 0x93d2422d	snmp_mib_free
+EXPORT_SYMBOL_GPL vmlinux 0x93d28710	nf_register_afinfo
+EXPORT_SYMBOL_GPL vmlinux 0x94028a37	pci_rescan_bus
+EXPORT_SYMBOL_GPL vmlinux 0x94030cc7	__create_workqueue_key
+EXPORT_SYMBOL_GPL vmlinux 0x94155ad1	pci_find_ht_capability
+EXPORT_SYMBOL_GPL vmlinux 0x9456d918	ring_buffer_normalize_time_stamp
+EXPORT_SYMBOL_GPL vmlinux 0x9459e32b	__pci_reset_function
+EXPORT_SYMBOL_GPL vmlinux 0x94f1059c	spi_alloc_device
+EXPORT_SYMBOL_GPL vmlinux 0x952664c5	do_exit
+EXPORT_SYMBOL_GPL vmlinux 0x956a91ba	gpio_get_value_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x95836c82	__class_register
+EXPORT_SYMBOL_GPL vmlinux 0x9593e0c9	proc_net_fops_create
+EXPORT_SYMBOL_GPL vmlinux 0x96118268	device_for_each_child
+EXPORT_SYMBOL_GPL vmlinux 0x962f66e6	fuse_dev_operations
+EXPORT_SYMBOL_GPL vmlinux 0x96533a1c	blocking_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x96cbcf31	pm_qos_add_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x96e56c24	dm_put
+EXPORT_SYMBOL_GPL vmlinux 0x9794fb4e	tcp_reno_cong_avoid
+EXPORT_SYMBOL_GPL vmlinux 0x97d8f541	security_inode_setattr
+EXPORT_SYMBOL_GPL vmlinux 0x97dcac63	spi_alloc_master
+EXPORT_SYMBOL_GPL vmlinux 0x97ec9055	rtnl_register
+EXPORT_SYMBOL_GPL vmlinux 0x982879f3	crypto_ahash_digest
+EXPORT_SYMBOL_GPL vmlinux 0x986d6965	spi_unregister_master
+EXPORT_SYMBOL_GPL vmlinux 0x98742567	xfrm_output_resume
+EXPORT_SYMBOL_GPL vmlinux 0x9898bf7f	lookup_create
+EXPORT_SYMBOL_GPL vmlinux 0x98deb6ba	module_mutex
+EXPORT_SYMBOL_GPL vmlinux 0x9906c714	inet_twsk_schedule
+EXPORT_SYMBOL_GPL vmlinux 0x990ef13d	unregister_kprobes
+EXPORT_SYMBOL_GPL vmlinux 0x995e7490	tcp_unregister_congestion_control
+EXPORT_SYMBOL_GPL vmlinux 0x997dacf0	sysdev_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x99955a69	register_kretprobe
+EXPORT_SYMBOL_GPL vmlinux 0x9a11a0fc	crypto_attr_alg_name
+EXPORT_SYMBOL_GPL vmlinux 0x9a33af92	inet_diag_register
+EXPORT_SYMBOL_GPL vmlinux 0x9ba0501e	unregister_vt_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x9c612e29	regulator_bulk_free
+EXPORT_SYMBOL_GPL vmlinux 0x9c6999ed	tcp_cong_avoid_ai
+EXPORT_SYMBOL_GPL vmlinux 0x9c83ffa2	regulator_set_voltage
+EXPORT_SYMBOL_GPL vmlinux 0x9cb8037b	xfrm_count_enc_supported
+EXPORT_SYMBOL_GPL vmlinux 0x9d7a412e	trace_seq_vprintf
+EXPORT_SYMBOL_GPL vmlinux 0x9e153ed1	__inet_lookup_established
+EXPORT_SYMBOL_GPL vmlinux 0x9e230675	rtc_set_alarm
+EXPORT_SYMBOL_GPL vmlinux 0x9e711ad2	pm_qos_requirement
+EXPORT_SYMBOL_GPL vmlinux 0x9e7f815f	debugfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x9ed21e86	queue_work_on
+EXPORT_SYMBOL_GPL vmlinux 0x9ee43886	crypto_alloc_instance
+EXPORT_SYMBOL_GPL vmlinux 0x9f3e4372	ip_build_and_send_pkt
+EXPORT_SYMBOL_GPL vmlinux 0x9f40a6d6	async_synchronize_full_domain
+EXPORT_SYMBOL_GPL vmlinux 0x9f51ac86	ring_buffer_read_finish
+EXPORT_SYMBOL_GPL vmlinux 0x9f85ed90	klist_remove
+EXPORT_SYMBOL_GPL vmlinux 0x9fce80db	fb_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xa0255440	net_ipv4_ctl_path
+EXPORT_SYMBOL_GPL vmlinux 0xa03f1197	skb_tstamp_tx
+EXPORT_SYMBOL_GPL vmlinux 0xa0421488	device_del
+EXPORT_SYMBOL_GPL vmlinux 0xa0714a8e	crypto_unregister_alg
+EXPORT_SYMBOL_GPL vmlinux 0xa0803bfe	tcp_twsk_destructor
+EXPORT_SYMBOL_GPL vmlinux 0xa08e1bf5	crypto_alg_sem
+EXPORT_SYMBOL_GPL vmlinux 0xa10798ac	regulator_bulk_disable
+EXPORT_SYMBOL_GPL vmlinux 0xa1d983b1	get_task_mm
+EXPORT_SYMBOL_GPL vmlinux 0xa20fc740	i2c_unregister_device
+EXPORT_SYMBOL_GPL vmlinux 0xa23fb028	user_update
+EXPORT_SYMBOL_GPL vmlinux 0xa280fac9	inet_unhash
+EXPORT_SYMBOL_GPL vmlinux 0xa291c7e4	set_task_ioprio
+EXPORT_SYMBOL_GPL vmlinux 0xa38b7f90	__i2c_board_lock
+EXPORT_SYMBOL_GPL vmlinux 0xa3b23ce2	fb_deferred_io_fsync
+EXPORT_SYMBOL_GPL vmlinux 0xa3b4cf19	attribute_container_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xa3d959b5	debugfs_create_blob
+EXPORT_SYMBOL_GPL vmlinux 0xa441af51	ahash_attr_alg
+EXPORT_SYMBOL_GPL vmlinux 0xa4700382	destroy_workqueue
+EXPORT_SYMBOL_GPL vmlinux 0xa48a4f71	unregister_pernet_subsys
+EXPORT_SYMBOL_GPL vmlinux 0xa49fda9e	blk_rq_prep_clone
+EXPORT_SYMBOL_GPL vmlinux 0xa4a42813	vbin_printf
+EXPORT_SYMBOL_GPL vmlinux 0xa4a8c73e	power_supply_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xa508e79c	crypto_dequeue_request
+EXPORT_SYMBOL_GPL vmlinux 0xa53ea7dd	uart_set_options
+EXPORT_SYMBOL_GPL vmlinux 0xa5b5f1b7	put_pid
+EXPORT_SYMBOL_GPL vmlinux 0xa5bf5c3e	pm_qos_add_requirement
+EXPORT_SYMBOL_GPL vmlinux 0xa5c36cec	inotify_unmount_inodes
+EXPORT_SYMBOL_GPL vmlinux 0xa5cc5b6b	skb_to_sgvec
+EXPORT_SYMBOL_GPL vmlinux 0xa5e1d4ef	ring_buffer_read_start
+EXPORT_SYMBOL_GPL vmlinux 0xa5efbf4c	async_synchronize_full
+EXPORT_SYMBOL_GPL vmlinux 0xa601c7b6	led_trigger_set
+EXPORT_SYMBOL_GPL vmlinux 0xa6191dd1	skcipher_geniv_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xa634c59c	inet_hash_connect
+EXPORT_SYMBOL_GPL vmlinux 0xa69015f9	dev_set_name
+EXPORT_SYMBOL_GPL vmlinux 0xa701a40b	blk_queue_rq_timeout
+EXPORT_SYMBOL_GPL vmlinux 0xa722263e	blkcipher_walk_done
+EXPORT_SYMBOL_GPL vmlinux 0xa77937b7	hrtimer_get_remaining
+EXPORT_SYMBOL_GPL vmlinux 0xa7870bbc	generic_fh_to_dentry
+EXPORT_SYMBOL_GPL vmlinux 0xa7f5ecad	fsstack_copy_attr_all
+EXPORT_SYMBOL_GPL vmlinux 0xa89443cb	crypto_unregister_ahash
+EXPORT_SYMBOL_GPL vmlinux 0xa8957b05	transport_configure_device
+EXPORT_SYMBOL_GPL vmlinux 0xa8988c57	do_add_mount
+EXPORT_SYMBOL_GPL vmlinux 0xa89d1915	input_event_to_user
+EXPORT_SYMBOL_GPL vmlinux 0xa8cb2613	relay_reset
+EXPORT_SYMBOL_GPL vmlinux 0xa8da34ea	regulator_get_init_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0xa8f59416	gpio_direction_output
+EXPORT_SYMBOL_GPL vmlinux 0xa921a69d	sysfs_remove_group
+EXPORT_SYMBOL_GPL vmlinux 0xa92d18cf	fuse_dev_release
+EXPORT_SYMBOL_GPL vmlinux 0xa9419e3e	blk_rq_check_limits
+EXPORT_SYMBOL_GPL vmlinux 0xa962a00e	debugfs_create_dir
+EXPORT_SYMBOL_GPL vmlinux 0xa9a540e4	led_trigger_unregister_simple
+EXPORT_SYMBOL_GPL vmlinux 0xa9c530b8	unregister_oom_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xaa5310f9	__tracepoint_napi_poll
+EXPORT_SYMBOL_GPL vmlinux 0xaa5f5e45	inet_csk_get_port
+EXPORT_SYMBOL_GPL vmlinux 0xaa6c528c	crypto_larval_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xaa7ba4f5	class_dev_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0xaa8c4696	cpu_clock
+EXPORT_SYMBOL_GPL vmlinux 0xaaf36ecd	blk_queue_rq_timed_out
+EXPORT_SYMBOL_GPL vmlinux 0xaaf976d3	platform_driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xab20a860	crypto_aead_type
+EXPORT_SYMBOL_GPL vmlinux 0xab57e311	tracepoint_probe_register
+EXPORT_SYMBOL_GPL vmlinux 0xace021e4	xfrm_inner_extract_output
+EXPORT_SYMBOL_GPL vmlinux 0xacf31133	ring_buffer_empty
+EXPORT_SYMBOL_GPL vmlinux 0xad34a745	i2c_new_device
+EXPORT_SYMBOL_GPL vmlinux 0xae0c87ee	pm_qos_remove_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xafa89ffa	sysdev_driver_register
+EXPORT_SYMBOL_GPL vmlinux 0xafe0af7d	__wake_up_sync_key
+EXPORT_SYMBOL_GPL vmlinux 0xaff8002e	find_vpid
+EXPORT_SYMBOL_GPL vmlinux 0xb029ed4b	tty_init_termios
+EXPORT_SYMBOL_GPL vmlinux 0xb02b7c79	do_kern_mount
+EXPORT_SYMBOL_GPL vmlinux 0xb041d3ef	i2c_new_dummy
+EXPORT_SYMBOL_GPL vmlinux 0xb07a8e1d	rtc_class_open
+EXPORT_SYMBOL_GPL vmlinux 0xb0856e58	crypto_destroy_tfm
+EXPORT_SYMBOL_GPL vmlinux 0xb0a192e5	inotify_rm_wd
+EXPORT_SYMBOL_GPL vmlinux 0xb0aa812e	fips_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xb0df8ae3	blk_trace_setup
+EXPORT_SYMBOL_GPL vmlinux 0xb143aef6	xfrm_output
+EXPORT_SYMBOL_GPL vmlinux 0xb146c1d8	gpio_export_link
+EXPORT_SYMBOL_GPL vmlinux 0xb19455c4	sysdev_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0xb1a9d076	bus_find_device_by_name
+EXPORT_SYMBOL_GPL vmlinux 0xb1acbcce	rcu_barrier_sched
+EXPORT_SYMBOL_GPL vmlinux 0xb1e35a60	ring_buffer_iter_reset
+EXPORT_SYMBOL_GPL vmlinux 0xb29dc3b2	dm_underlying_device_busy
+EXPORT_SYMBOL_GPL vmlinux 0xb2f124dc	key_type_user
+EXPORT_SYMBOL_GPL vmlinux 0xb38763ee	regulator_set_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0xb38efa06	inotify_init
+EXPORT_SYMBOL_GPL vmlinux 0xb3f68f5d	bd_claim_by_disk
+EXPORT_SYMBOL_GPL vmlinux 0xb3f71549	__lock_page_killable
+EXPORT_SYMBOL_GPL vmlinux 0xb3fe380c	driver_attach
+EXPORT_SYMBOL_GPL vmlinux 0xb4248d13	pci_slots_kset
+EXPORT_SYMBOL_GPL vmlinux 0xb4330223	input_ff_event
+EXPORT_SYMBOL_GPL vmlinux 0xb4689763	ring_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0xb4a22454	kobject_uevent_env
+EXPORT_SYMBOL_GPL vmlinux 0xb4f06827	kallsyms_on_each_symbol
+EXPORT_SYMBOL_GPL vmlinux 0xb56d1ec6	transport_destroy_device
+EXPORT_SYMBOL_GPL vmlinux 0xb575e030	sysfs_chmod_file
+EXPORT_SYMBOL_GPL vmlinux 0xb5838116	inotify_find_watch
+EXPORT_SYMBOL_GPL vmlinux 0xb58dcfa2	synchronize_sched_expedited
+EXPORT_SYMBOL_GPL vmlinux 0xb5b38fe4	devres_get
+EXPORT_SYMBOL_GPL vmlinux 0xb612444d	snmp_mib_init
+EXPORT_SYMBOL_GPL vmlinux 0xb62e642a	unregister_jprobe
+EXPORT_SYMBOL_GPL vmlinux 0xb65091b3	selinux_secmark_refcount_dec
+EXPORT_SYMBOL_GPL vmlinux 0xb6f0b5ec	crypto_mod_get
+EXPORT_SYMBOL_GPL vmlinux 0xb71fc35a	inotify_dentry_parent_queue_event
+EXPORT_SYMBOL_GPL vmlinux 0xb744fa43	xfrm_ealg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0xb79d6529	driver_find
+EXPORT_SYMBOL_GPL vmlinux 0xb7d94421	pci_disable_rom
+EXPORT_SYMBOL_GPL vmlinux 0xb81e0e59	rtc_read_time
+EXPORT_SYMBOL_GPL vmlinux 0xb8759c2c	srcu_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0xb89a861d	rtc_read_alarm
+EXPORT_SYMBOL_GPL vmlinux 0xb8a4fafd	devres_open_group
+EXPORT_SYMBOL_GPL vmlinux 0xb91934aa	spi_busnum_to_master
+EXPORT_SYMBOL_GPL vmlinux 0xb9257c3e	security_inode_mkdir
+EXPORT_SYMBOL_GPL vmlinux 0xb93d4dfa	transport_setup_device
+EXPORT_SYMBOL_GPL vmlinux 0xb9562902	blocking_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xb99d7f9f	d_materialise_unique
+EXPORT_SYMBOL_GPL vmlinux 0xb9eb3aa9	add_uevent_var
+EXPORT_SYMBOL_GPL vmlinux 0xba368de6	get_driver
+EXPORT_SYMBOL_GPL vmlinux 0xba5f2e88	platform_device_add
+EXPORT_SYMBOL_GPL vmlinux 0xbb16ffe7	real_hard_smp_processor_id
+EXPORT_SYMBOL_GPL vmlinux 0xbb757edc	shash_attr_alg
+EXPORT_SYMBOL_GPL vmlinux 0xbb85b030	invalidate_inode_pages2
+EXPORT_SYMBOL_GPL vmlinux 0xbc29b560	debugfs_create_x8
+EXPORT_SYMBOL_GPL vmlinux 0xbc4e60da	inet_diag_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xbca0f8d5	net_assign_generic
+EXPORT_SYMBOL_GPL vmlinux 0xbd85a2a8	spi_register_master
+EXPORT_SYMBOL_GPL vmlinux 0xbd957827	transport_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xbdd295f0	trace_vprintk
+EXPORT_SYMBOL_GPL vmlinux 0xbe116723	do_posix_clock_nosettime
+EXPORT_SYMBOL_GPL vmlinux 0xbe2c9199	xfrm_audit_state_delete
+EXPORT_SYMBOL_GPL vmlinux 0xbe57ce39	__inet_inherit_port
+EXPORT_SYMBOL_GPL vmlinux 0xbe78c6e8	driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xbedcef9f	led_trigger_show
+EXPORT_SYMBOL_GPL vmlinux 0xbee2c056	screen_glyph
+EXPORT_SYMBOL_GPL vmlinux 0xbeea7a2b	srcu_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xbef03c60	inet_twsk_put
+EXPORT_SYMBOL_GPL vmlinux 0xbf176d8f	raw_seq_stop
+EXPORT_SYMBOL_GPL vmlinux 0xbf2f5809	pci_intx
+EXPORT_SYMBOL_GPL vmlinux 0xbf74eb20	probe_kernel_write
+EXPORT_SYMBOL_GPL vmlinux 0xbffde8ec	compat_alloc_user_space
+EXPORT_SYMBOL_GPL vmlinux 0xc03aeb10	ring_buffer_resize
+EXPORT_SYMBOL_GPL vmlinux 0xc065c16c	sysfs_remove_file_from_group
+EXPORT_SYMBOL_GPL vmlinux 0xc072e1b8	devm_kfree
+EXPORT_SYMBOL_GPL vmlinux 0xc1001cad	sysdev_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xc126e890	klist_del
+EXPORT_SYMBOL_GPL vmlinux 0xc12f7e0d	trace_profile_buf_nmi
+EXPORT_SYMBOL_GPL vmlinux 0xc189e936	tcp_slow_start
+EXPORT_SYMBOL_GPL vmlinux 0xc1f3a9e4	crypto_blkcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0xc1f3dd5e	rdev_get_dev
+EXPORT_SYMBOL_GPL vmlinux 0xc22a3091	vm_unmap_aliases
+EXPORT_SYMBOL_GPL vmlinux 0xc22da9fa	ring_buffer_record_enable_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xc250ba25	tracepoint_iter_start
+EXPORT_SYMBOL_GPL vmlinux 0xc2a55bfe	scatterwalk_map
+EXPORT_SYMBOL_GPL vmlinux 0xc2cc5fa7	__root_device_register
+EXPORT_SYMBOL_GPL vmlinux 0xc2eafb04	rtnl_put_cacheinfo
+EXPORT_SYMBOL_GPL vmlinux 0xc2f7be3a	fuse_request_send
+EXPORT_SYMBOL_GPL vmlinux 0xc30aa755	__fsnotify_parent
+EXPORT_SYMBOL_GPL vmlinux 0xc3301f02	rcu_expedited_torture_stats
+EXPORT_SYMBOL_GPL vmlinux 0xc34efe27	snmp_fold_field
+EXPORT_SYMBOL_GPL vmlinux 0xc3545901	fuse_file_poll
+EXPORT_SYMBOL_GPL vmlinux 0xc400fe1f	invalidate_inode_pages2_range
+EXPORT_SYMBOL_GPL vmlinux 0xc4248104	driver_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xc45d6e25	disk_get_part
+EXPORT_SYMBOL_GPL vmlinux 0xc4b33aa6	tracepoint_probe_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xc4e11991	fuse_request_send_background
+EXPORT_SYMBOL_GPL vmlinux 0xc4e497b3	blkdev_aio_write
+EXPORT_SYMBOL_GPL vmlinux 0xc53cb1c4	blk_execute_rq_nowait
+EXPORT_SYMBOL_GPL vmlinux 0xc54d0008	input_ff_erase
+EXPORT_SYMBOL_GPL vmlinux 0xc55dc4fb	unregister_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0xc56b04bb	bd_release_from_disk
+EXPORT_SYMBOL_GPL vmlinux 0xc56e5ac4	sysfs_get_dirent
+EXPORT_SYMBOL_GPL vmlinux 0xc57bed26	hrtimer_start
+EXPORT_SYMBOL_GPL vmlinux 0xc589ce6d	sysfs_get
+EXPORT_SYMBOL_GPL vmlinux 0xc5f78779	dm_set_device_limits
+EXPORT_SYMBOL_GPL vmlinux 0xc60f75ec	__ftrace_vprintk
+EXPORT_SYMBOL_GPL vmlinux 0xc62bd896	rtnl_link_register
+EXPORT_SYMBOL_GPL vmlinux 0xc6878b5a	platform_device_del
+EXPORT_SYMBOL_GPL vmlinux 0xc6953780	put_inotify_watch
+EXPORT_SYMBOL_GPL vmlinux 0xc6d18851	register_pernet_subsys
+EXPORT_SYMBOL_GPL vmlinux 0xc6daef34	rtc_update_irq_enable
+EXPORT_SYMBOL_GPL vmlinux 0xc7eef0f6	tcp_twsk_unique
+EXPORT_SYMBOL_GPL vmlinux 0xc87c1f84	ktime_get
+EXPORT_SYMBOL_GPL vmlinux 0xc8f69a98	aead_geniv_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xc9561772	fb_destroy_modelist
+EXPORT_SYMBOL_GPL vmlinux 0xc9611201	bus_get_device_klist
+EXPORT_SYMBOL_GPL vmlinux 0xc965062b	crypto_shash_finup
+EXPORT_SYMBOL_GPL vmlinux 0xc966f4ab	unregister_kretprobe
+EXPORT_SYMBOL_GPL vmlinux 0xc98d0f18	debugfs_create_x16
+EXPORT_SYMBOL_GPL vmlinux 0xc9e5d4fc	register_dimm_printer
+EXPORT_SYMBOL_GPL vmlinux 0xc9ef121b	sysfs_remove_link
+EXPORT_SYMBOL_GPL vmlinux 0xca3c30e4	power_supply_changed
+EXPORT_SYMBOL_GPL vmlinux 0xca85d8cf	tracepoint_probe_update_all
+EXPORT_SYMBOL_GPL vmlinux 0xcab7f75b	crypto_grab_skcipher
+EXPORT_SYMBOL_GPL vmlinux 0xcb0c2ebf	__srcu_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xcb1cc1e8	device_move
+EXPORT_SYMBOL_GPL vmlinux 0xcb51cabe	klist_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0xcb588d8f	get_current_tty
+EXPORT_SYMBOL_GPL vmlinux 0xcbc0e2bd	platform_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xcc1f1c3d	inet_twdr_hangman
+EXPORT_SYMBOL_GPL vmlinux 0xccf8f0a9	map_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0xcd8f9afd	sysfs_create_link
+EXPORT_SYMBOL_GPL vmlinux 0xcd940bc8	relay_subbufs_consumed
+EXPORT_SYMBOL_GPL vmlinux 0xcdb60c72	sg_scsi_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xcdca3691	nr_irqs
+EXPORT_SYMBOL_GPL vmlinux 0xcdd488d0	inet_csk_reqsk_queue_hash_add
+EXPORT_SYMBOL_GPL vmlinux 0xcde2dee8	rtnl_kill_links
+EXPORT_SYMBOL_GPL vmlinux 0xcdf8d647	regulator_count_voltages
+EXPORT_SYMBOL_GPL vmlinux 0xcdfed241	blocking_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xceef52d7	inotify_inode_is_dead
+EXPORT_SYMBOL_GPL vmlinux 0xcf3af966	inet_csk_listen_stop
+EXPORT_SYMBOL_GPL vmlinux 0xcf4cd5dd	regulator_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xcf6d7647	__blkdev_driver_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xcf76e078	blkcipher_walk_virt_block
+EXPORT_SYMBOL_GPL vmlinux 0xcf8af983	trace_profile_buf
+EXPORT_SYMBOL_GPL vmlinux 0xcf9cbc44	dm_send_uevents
+EXPORT_SYMBOL_GPL vmlinux 0xcfc15613	debugfs_create_u8
+EXPORT_SYMBOL_GPL vmlinux 0xcfc68341	synchronize_rcu_bh
+EXPORT_SYMBOL_GPL vmlinux 0xcfcc83ad	register_vt_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xcfd9a2c0	des_ekey
+EXPORT_SYMBOL_GPL vmlinux 0xcfe4bca3	crypto_register_shash
+EXPORT_SYMBOL_GPL vmlinux 0xd0350fc8	blk_trace_startstop
+EXPORT_SYMBOL_GPL vmlinux 0xd03c7700	secure_ipv4_port_ephemeral
+EXPORT_SYMBOL_GPL vmlinux 0xd0c05159	emergency_restart
+EXPORT_SYMBOL_GPL vmlinux 0xd1107472	rt_mutex_lock
+EXPORT_SYMBOL_GPL vmlinux 0xd16712f3	crypto_check_attr_type
+EXPORT_SYMBOL_GPL vmlinux 0xd1e629cf	rt_mutex_unlock
+EXPORT_SYMBOL_GPL vmlinux 0xd20f2033	hrtimer_init_sleeper
+EXPORT_SYMBOL_GPL vmlinux 0xd2154e28	shash_ahash_digest
+EXPORT_SYMBOL_GPL vmlinux 0xd260b462	shash_free_instance
+EXPORT_SYMBOL_GPL vmlinux 0xd273b1b1	__round_jiffies_up_relative
+EXPORT_SYMBOL_GPL vmlinux 0xd2968a65	alloc_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0xd3005157	trace_define_field
+EXPORT_SYMBOL_GPL vmlinux 0xd3239723	get_user_pages_fast
+EXPORT_SYMBOL_GPL vmlinux 0xd36e33d4	k_handler
+EXPORT_SYMBOL_GPL vmlinux 0xd40977a7	tasklet_hrtimer_init
+EXPORT_SYMBOL_GPL vmlinux 0xd4be1478	skcipher_geniv_exit
+EXPORT_SYMBOL_GPL vmlinux 0xd4df1379	xfrm_audit_state_add
+EXPORT_SYMBOL_GPL vmlinux 0xd5041664	crypto_ahash_setkey
+EXPORT_SYMBOL_GPL vmlinux 0xd522dc52	ring_buffer_overruns
+EXPORT_SYMBOL_GPL vmlinux 0xd54f3702	disk_map_sector_rcu
+EXPORT_SYMBOL_GPL vmlinux 0xd5cdfcce	firmware_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xd5ff79f6	add_page_wait_queue
+EXPORT_SYMBOL_GPL vmlinux 0xd623cef6	input_ff_upload
+EXPORT_SYMBOL_GPL vmlinux 0xd65450a1	power_supply_register
+EXPORT_SYMBOL_GPL vmlinux 0xd695cc77	__trace_note_message
+EXPORT_SYMBOL_GPL vmlinux 0xd6cfc2e3	ring_buffer_reset_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xd705b4c7	schedule_hrtimeout
+EXPORT_SYMBOL_GPL vmlinux 0xd7096ccd	fuse_request_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xd73ef534	sysdev_resume
+EXPORT_SYMBOL_GPL vmlinux 0xd768e985	regulator_has_full_constraints
+EXPORT_SYMBOL_GPL vmlinux 0xd80cfee9	fuse_do_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xd821964e	add_timer_on
+EXPORT_SYMBOL_GPL vmlinux 0xd8360087	crypto_attr_alg2
+EXPORT_SYMBOL_GPL vmlinux 0xd8526f28	blkcipher_walk_phys
+EXPORT_SYMBOL_GPL vmlinux 0xd954a319	aead_geniv_free
+EXPORT_SYMBOL_GPL vmlinux 0xd954c569	pci_renumber_slot
+EXPORT_SYMBOL_GPL vmlinux 0xd980ae4b	tracepoint_iter_stop
+EXPORT_SYMBOL_GPL vmlinux 0xd9edc2ae	inet_csk_clone
+EXPORT_SYMBOL_GPL vmlinux 0xd9ee62bd	xfrm_audit_state_replay_overflow
+EXPORT_SYMBOL_GPL vmlinux 0xda1220df	crypto_alloc_tfm
+EXPORT_SYMBOL_GPL vmlinux 0xda128fe7	pci_destroy_slot
+EXPORT_SYMBOL_GPL vmlinux 0xda1be8e1	async_synchronize_cookie_domain
+EXPORT_SYMBOL_GPL vmlinux 0xda8808ce	regulator_get
+EXPORT_SYMBOL_GPL vmlinux 0xdaf4dfb3	fb_mode_option
+EXPORT_SYMBOL_GPL vmlinux 0xdb274e52	monotonic_to_bootbased
+EXPORT_SYMBOL_GPL vmlinux 0xdbc22c59	regulator_register
+EXPORT_SYMBOL_GPL vmlinux 0xdc4674d6	rtc_irq_set_freq
+EXPORT_SYMBOL_GPL vmlinux 0xdca276bd	ring_buffer_lock_reserve
+EXPORT_SYMBOL_GPL vmlinux 0xdcccbbb0	debugfs_create_bool
+EXPORT_SYMBOL_GPL vmlinux 0xdce620b3	ip_local_out
+EXPORT_SYMBOL_GPL vmlinux 0xdd32b4ce	fib_rules_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xddd56124	platform_device_register
+EXPORT_SYMBOL_GPL vmlinux 0xde417b81	async_schedule_domain
+EXPORT_SYMBOL_GPL vmlinux 0xde700c87	queue_delayed_work
+EXPORT_SYMBOL_GPL vmlinux 0xde72f0cf	device_bind_driver
+EXPORT_SYMBOL_GPL vmlinux 0xde80aec3	led_trigger_store
+EXPORT_SYMBOL_GPL vmlinux 0xde886220	seq_release_net
+EXPORT_SYMBOL_GPL vmlinux 0xdec72e59	crypto_unregister_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0xded197d6	register_net_sysctl_table
+EXPORT_SYMBOL_GPL vmlinux 0xdf313106	blk_insert_cloned_request
+EXPORT_SYMBOL_GPL vmlinux 0xdfd6ac63	register_jprobe
+EXPORT_SYMBOL_GPL vmlinux 0xdff1b0b3	__crypto_alloc_tfm
+EXPORT_SYMBOL_GPL vmlinux 0xe0477b60	class_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0xe04eb25b	pci_unblock_user_cfg_access
+EXPORT_SYMBOL_GPL vmlinux 0xe0a0a12c	crypto_enqueue_request
+EXPORT_SYMBOL_GPL vmlinux 0xe0cca33e	xfrm_aead_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0xe0efb886	bus_for_each_drv
+EXPORT_SYMBOL_GPL vmlinux 0xe1447e22	power_supply_set_battery_charged
+EXPORT_SYMBOL_GPL vmlinux 0xe156fa05	get_device
+EXPORT_SYMBOL_GPL vmlinux 0xe1828d80	tty_put_char
+EXPORT_SYMBOL_GPL vmlinux 0xe1eb1d04	sysfs_remove_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0xe231557a	vfs_setxattr
+EXPORT_SYMBOL_GPL vmlinux 0xe2a72c2e	input_ff_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xe2db9b7f	relay_open
+EXPORT_SYMBOL_GPL vmlinux 0xe2e07ffc	xfrm_audit_policy_add
+EXPORT_SYMBOL_GPL vmlinux 0xe306066a	scatterwalk_map_and_copy
+EXPORT_SYMBOL_GPL vmlinux 0xe33acb47	tcp_register_congestion_control
+EXPORT_SYMBOL_GPL vmlinux 0xe36aa96d	inet_csk_compat_setsockopt
+EXPORT_SYMBOL_GPL vmlinux 0xe44e2141	devres_add
+EXPORT_SYMBOL_GPL vmlinux 0xe4619e18	led_trigger_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xe4b93786	skb_cow_data
+EXPORT_SYMBOL_GPL vmlinux 0xe4fe7652	rtc_class_close
+EXPORT_SYMBOL_GPL vmlinux 0xe51c623e	sync_filesystem
+EXPORT_SYMBOL_GPL vmlinux 0xe530071c	pm_qos_remove_requirement
+EXPORT_SYMBOL_GPL vmlinux 0xe532f184	sysfs_create_group
+EXPORT_SYMBOL_GPL vmlinux 0xe55520f4	dm_disk
+EXPORT_SYMBOL_GPL vmlinux 0xe57c3a46	da903x_clr_bits
+EXPORT_SYMBOL_GPL vmlinux 0xe6045129	driver_find_device
+EXPORT_SYMBOL_GPL vmlinux 0xe61a6d2f	gpio_unexport
+EXPORT_SYMBOL_GPL vmlinux 0xe651f76e	selinux_is_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xe653028a	transport_add_device
+EXPORT_SYMBOL_GPL vmlinux 0xe65f45e8	crypto_tfm_in_queue
+EXPORT_SYMBOL_GPL vmlinux 0xe66673e2	unregister_pernet_gen_subsys
+EXPORT_SYMBOL_GPL vmlinux 0xe6dd0d21	platform_device_put
+EXPORT_SYMBOL_GPL vmlinux 0xe7915935	clockevent_delta2ns
+EXPORT_SYMBOL_GPL vmlinux 0xe7b0dcce	crypto_unregister_shash
+EXPORT_SYMBOL_GPL vmlinux 0xe7f6c71d	pci_bus_max_busnr
+EXPORT_SYMBOL_GPL vmlinux 0xe8013fb8	crypto_ablkcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0xe8582bd2	shash_ahash_finup
+EXPORT_SYMBOL_GPL vmlinux 0xe8620b77	pci_scan_child_bus
+EXPORT_SYMBOL_GPL vmlinux 0xe87133eb	hrtimer_init
+EXPORT_SYMBOL_GPL vmlinux 0xe8789a12	eventfd_ctx_get
+EXPORT_SYMBOL_GPL vmlinux 0xe8fd63ee	unregister_pernet_gen_device
+EXPORT_SYMBOL_GPL vmlinux 0xe901175f	__dev_addr_unsync
+EXPORT_SYMBOL_GPL vmlinux 0xe93e49c3	devres_free
+EXPORT_SYMBOL_GPL vmlinux 0xe98eff2a	pci_block_user_cfg_access
+EXPORT_SYMBOL_GPL vmlinux 0xe9ae6ebe	inet_csk_reqsk_queue_prune
+EXPORT_SYMBOL_GPL vmlinux 0xe9e53e94	skb_pull_rcsum
+EXPORT_SYMBOL_GPL vmlinux 0xea124bd1	gcd
+EXPORT_SYMBOL_GPL vmlinux 0xea7480c4	locks_release_private
+EXPORT_SYMBOL_GPL vmlinux 0xeb45cd21	blk_lld_busy
+EXPORT_SYMBOL_GPL vmlinux 0xeb4c1fc8	__tracepoint_block_remap
+EXPORT_SYMBOL_GPL vmlinux 0xec00a867	skb_partial_csum_set
+EXPORT_SYMBOL_GPL vmlinux 0xec1a75a9	__dev_addr_sync
+EXPORT_SYMBOL_GPL vmlinux 0xec1b043e	regulator_suspend_prepare
+EXPORT_SYMBOL_GPL vmlinux 0xec371b56	trace_seq_printf
+EXPORT_SYMBOL_GPL vmlinux 0xec9022c2	regulator_list_voltage
+EXPORT_SYMBOL_GPL vmlinux 0xeceac1d4	inotify_add_watch
+EXPORT_SYMBOL_GPL vmlinux 0xed4417b8	pci_find_next_capability
+EXPORT_SYMBOL_GPL vmlinux 0xed621562	crypto_alloc_aead
+EXPORT_SYMBOL_GPL vmlinux 0xedf3bcd8	platform_add_devices
+EXPORT_SYMBOL_GPL vmlinux 0xeef11ea5	mmput
+EXPORT_SYMBOL_GPL vmlinux 0xef1014d7	blk_abort_request
+EXPORT_SYMBOL_GPL vmlinux 0xef4e963e	__atomic_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xef6c3f70	round_jiffies_up_relative
+EXPORT_SYMBOL_GPL vmlinux 0xef82fdba	srcu_init_notifier_head
+EXPORT_SYMBOL_GPL vmlinux 0xefdd5a63	ktime_get_ts
+EXPORT_SYMBOL_GPL vmlinux 0xf0702464	alloc_page_buffers
+EXPORT_SYMBOL_GPL vmlinux 0xf081e77f	ring_buffer_time_stamp
+EXPORT_SYMBOL_GPL vmlinux 0xf109c194	inet_ctl_sock_create
+EXPORT_SYMBOL_GPL vmlinux 0xf11fd5a5	tty_prepare_flip_string
+EXPORT_SYMBOL_GPL vmlinux 0xf17b7686	regulator_disable
+EXPORT_SYMBOL_GPL vmlinux 0xf184d189	kernel_power_off
+EXPORT_SYMBOL_GPL vmlinux 0xf29272f1	register_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0xf2a4e653	udp4_lib_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xf2e12f15	hrtimer_cancel
+EXPORT_SYMBOL_GPL vmlinux 0xf2fb9159	rtc_set_time
+EXPORT_SYMBOL_GPL vmlinux 0xf2fca922	uart_parse_options
+EXPORT_SYMBOL_GPL vmlinux 0xf34806ec	hrtimer_get_res
+EXPORT_SYMBOL_GPL vmlinux 0xf3744d82	device_create
+EXPORT_SYMBOL_GPL vmlinux 0xf37e0d73	pci_msi_off
+EXPORT_SYMBOL_GPL vmlinux 0xf3801b11	ring_buffer_iter_empty
+EXPORT_SYMBOL_GPL vmlinux 0xf3a33b6c	da903x_set_bits
+EXPORT_SYMBOL_GPL vmlinux 0xf3efcc67	pskb_put
+EXPORT_SYMBOL_GPL vmlinux 0xf409b7e4	crypto_ahash_final
+EXPORT_SYMBOL_GPL vmlinux 0xf43f2ffc	hrtimer_try_to_cancel
+EXPORT_SYMBOL_GPL vmlinux 0xf44ac1fb	spi_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0xf499fdb2	rcu_barrier_bh
+EXPORT_SYMBOL_GPL vmlinux 0xf4a31a32	crypto_grab_aead
+EXPORT_SYMBOL_GPL vmlinux 0xf5384ac1	__trace_printk
+EXPORT_SYMBOL_GPL vmlinux 0xf54bd49b	lcm
+EXPORT_SYMBOL_GPL vmlinux 0xf5522288	rdev_get_id
+EXPORT_SYMBOL_GPL vmlinux 0xf55c65aa	crypto_hash_walk_first
+EXPORT_SYMBOL_GPL vmlinux 0xf589b391	inet_twdr_twkill_work
+EXPORT_SYMBOL_GPL vmlinux 0xf58b7669	regulator_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xf5a691cd	invalidate_bh_lrus
+EXPORT_SYMBOL_GPL vmlinux 0xf5cb6891	regulator_is_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xf61564dc	sched_setscheduler
+EXPORT_SYMBOL_GPL vmlinux 0xf61a2e84	crypto_larval_kill
+EXPORT_SYMBOL_GPL vmlinux 0xf66d53b8	unregister_net_sysctl_table
+EXPORT_SYMBOL_GPL vmlinux 0xf6bcbd73	hwrng_register
+EXPORT_SYMBOL_GPL vmlinux 0xf706c480	class_compat_create_link
+EXPORT_SYMBOL_GPL vmlinux 0xf78d9761	devres_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xf7bceab1	pci_add_dynid
+EXPORT_SYMBOL_GPL vmlinux 0xf7c7f284	device_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xf805c9cc	class_find_device
+EXPORT_SYMBOL_GPL vmlinux 0xf8802492	print_stack_trace
+EXPORT_SYMBOL_GPL vmlinux 0xf881485d	sysdev_register
+EXPORT_SYMBOL_GPL vmlinux 0xf8b4b47a	unregister_jprobes
+EXPORT_SYMBOL_GPL vmlinux 0xf8c36c24	part_round_stats
+EXPORT_SYMBOL_GPL vmlinux 0xf8fa4806	crypto_init_shash_spawn
+EXPORT_SYMBOL_GPL vmlinux 0xf91ed7a1	bus_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0xf92859ba	init_dummy_netdev
+EXPORT_SYMBOL_GPL vmlinux 0xf9539cf6	blk_end_request_err
+EXPORT_SYMBOL_GPL vmlinux 0xf9a054b5	__round_jiffies
+EXPORT_SYMBOL_GPL vmlinux 0xf9bd4867	attribute_container_register
+EXPORT_SYMBOL_GPL vmlinux 0xfa565479	put_device
+EXPORT_SYMBOL_GPL vmlinux 0xfa7dba7f	crypto_drop_spawn
+EXPORT_SYMBOL_GPL vmlinux 0xfac05b23	zap_vma_ptes
+EXPORT_SYMBOL_GPL vmlinux 0xfb0e60d3	rtc_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xfb4ad7d6	kobject_get_path
+EXPORT_SYMBOL_GPL vmlinux 0xfb9d0677	kobject_rename
+EXPORT_SYMBOL_GPL vmlinux 0xfbf9be5d	register_oom_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xfc86517e	devres_remove_group
+EXPORT_SYMBOL_GPL vmlinux 0xfd0890fb	unregister_kretprobes
+EXPORT_SYMBOL_GPL vmlinux 0xfd151f2f	pid_vnr
+EXPORT_SYMBOL_GPL vmlinux 0xfd3ce2b3	tty_perform_flush
+EXPORT_SYMBOL_GPL vmlinux 0xfd5ee72d	vfs_removexattr
+EXPORT_SYMBOL_GPL vmlinux 0xfdd3d71f	raw_unhash_sk
+EXPORT_SYMBOL_GPL vmlinux 0xfde0b92c	crypto_larval_error
+EXPORT_SYMBOL_GPL vmlinux 0xfdf459bf	pci_stop_bus_device
+EXPORT_SYMBOL_GPL vmlinux 0xfe167436	led_trigger_event
+EXPORT_SYMBOL_GPL vmlinux 0xfe990052	gpio_free
+EXPORT_SYMBOL_GPL vmlinux 0xfeb5f7c3	fuse_abort_conn
+EXPORT_SYMBOL_GPL vmlinux 0xfef0b2ab	spi_add_device
+EXPORT_SYMBOL_GPL vmlinux 0xfefa2adb	input_ff_effect_from_user
+EXPORT_SYMBOL_GPL vmlinux 0xff0347f0	sysdev_store_int
+EXPORT_SYMBOL_GPL vmlinux 0xff462096	crypto_alloc_ablkcipher
+EXPORT_SYMBOL_GPL vmlinux 0xff8f6f13	file_ra_state_init
+EXPORT_SYMBOL_GPL vmlinux 0xffaf7bbb	__wake_up_sync
+EXPORT_SYMBOL_GPL vmlinux 0xffc04543	unregister_dimm_printer
+EXPORT_SYMBOL_GPL vmlinux 0xffd894db	pci_reset_function
+EXPORT_UNUSED_SYMBOL vmlinux 0x00000000	simple_prepare_write
--- linux-mvl-dove-2.6.32.orig/debian.master/abi/2.6.32-34.73/sparc/sparc64-smp
+++ linux-mvl-dove-2.6.32/debian.master/abi/2.6.32-34.73/sparc/sparc64-smp
@@ -0,0 +1,8578 @@
+EXPORT_SYMBOL crypto/gf128mul 0x0c2f123f	gf128mul_4k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x1068004b	gf128mul_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x2f2889a0	gf128mul_init_64k_lle
+EXPORT_SYMBOL crypto/gf128mul 0x3755f990	gf128mul_init_64k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x384ef9ce	gf128mul_64k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x56af0dbd	gf128mul_x_ble
+EXPORT_SYMBOL crypto/gf128mul 0x83581089	gf128mul_init_4k_lle
+EXPORT_SYMBOL crypto/gf128mul 0x9b2560b9	gf128mul_init_4k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x9e13f6f6	gf128mul_lle
+EXPORT_SYMBOL crypto/gf128mul 0xbd17a0df	gf128mul_4k_lle
+EXPORT_SYMBOL crypto/gf128mul 0xc0890413	gf128mul_64k_lle
+EXPORT_SYMBOL crypto/gf128mul 0xd60736ec	gf128mul_free_64k
+EXPORT_SYMBOL crypto/xor 0x5b6c00e6	xor_blocks
+EXPORT_SYMBOL drivers/atm/suni 0x985f8cd5	suni_init
+EXPORT_SYMBOL drivers/block/paride/paride 0x093a63ac	pi_connect
+EXPORT_SYMBOL drivers/block/paride/paride 0x2f76076c	pi_init
+EXPORT_SYMBOL drivers/block/paride/paride 0x36883fff	pi_read_block
+EXPORT_SYMBOL drivers/block/paride/paride 0x3e5d6742	pi_write_block
+EXPORT_SYMBOL drivers/block/paride/paride 0x41d59af1	pi_disconnect
+EXPORT_SYMBOL drivers/block/paride/paride 0x53a69176	pi_read_regr
+EXPORT_SYMBOL drivers/block/paride/paride 0x5c756070	pi_schedule_claimed
+EXPORT_SYMBOL drivers/block/paride/paride 0x6a2313f4	pi_write_regr
+EXPORT_SYMBOL drivers/block/paride/paride 0x8c0ec9b0	pi_release
+EXPORT_SYMBOL drivers/block/paride/paride 0xb5bfee6d	pi_do_claimed
+EXPORT_SYMBOL drivers/block/paride/paride 0xd996cacd	paride_unregister
+EXPORT_SYMBOL drivers/block/paride/paride 0xf7094503	paride_register
+EXPORT_SYMBOL drivers/cdrom/cdrom 0x2b677ed1	cdrom_get_last_written
+EXPORT_SYMBOL drivers/cdrom/cdrom 0x344adbd5	init_cdrom_command
+EXPORT_SYMBOL drivers/cdrom/cdrom 0x40a9ec49	cdrom_ioctl
+EXPORT_SYMBOL drivers/cdrom/cdrom 0x42c4ca36	cdrom_release
+EXPORT_SYMBOL drivers/cdrom/cdrom 0x43df4d6e	cdrom_get_media_event
+EXPORT_SYMBOL drivers/cdrom/cdrom 0x48c7bf91	cdrom_mode_select
+EXPORT_SYMBOL drivers/cdrom/cdrom 0x517d79eb	cdrom_media_changed
+EXPORT_SYMBOL drivers/cdrom/cdrom 0x6d395653	cdrom_open
+EXPORT_SYMBOL drivers/cdrom/cdrom 0x6de89868	cdrom_mode_sense
+EXPORT_SYMBOL drivers/cdrom/cdrom 0x7484e997	cdrom_number_of_slots
+EXPORT_SYMBOL drivers/cdrom/cdrom 0x87b6e0b2	register_cdrom
+EXPORT_SYMBOL drivers/cdrom/cdrom 0xbb61a347	unregister_cdrom
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x0cf6071a	ipmi_create_user
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x195c3a93	ipmi_request_supply_msgs
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x2a23977b	ipmi_set_my_LUN
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x32bca123	ipmi_set_maintenance_mode
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x3568cfd2	ipmi_smi_watcher_unregister
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x40f2b10c	ipmi_alloc_smi_msg
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x47304002	ipmi_request_settime
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x507748f6	ipmi_get_my_address
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x51a78a0d	ipmi_set_my_address
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x5300206b	ipmi_smi_watchdog_pretimeout
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x563d8048	ipmi_poll_interface
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x66fc2e79	ipmi_register_for_cmd
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x724df0b9	ipmi_set_gets_events
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x751d00aa	ipmi_smi_add_proc_entry
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x771260db	ipmi_smi_msg_received
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x7eeb35ce	ipmi_get_my_LUN
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x804f922a	ipmi_addr_length
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x81667ac9	ipmi_unregister_smi
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x8a86af80	ipmi_smi_watcher_register
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x9859e953	ipmi_destroy_user
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xacc89ac5	ipmi_register_smi
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xb03a39bd	ipmi_get_maintenance_mode
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xba2de359	ipmi_free_recv_msg
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xca19b8a6	ipmi_unregister_for_cmd
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe16be253	ipmi_get_version
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe4f4665b	ipmi_validate_addr
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x012c33d6	drm_fb_helper_pan_display
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x0495fa6f	i2c_dp_aux_add_bus
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x0765c0fb	drm_fb_helper_fill_fix
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x144469c6	drm_fb_helper_setcolreg
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x4e03fb71	drm_fb_helper_blank
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x4fd01a21	drm_fb_helper_init_crtc_count
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x6090136a	drm_fb_helper_add_connector
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x76f7c256	drm_helper_mode_fill_fb_struct
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x7fd52e13	drm_helper_hotplug_stage_two
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x8b863552	drm_helper_encoder_in_use
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x96fd3cc5	drm_helper_disable_unused_functions
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x990ab592	drm_helper_connector_dpms
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x9d251144	drm_fb_helper_panic
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x9fb8d3db	drm_fb_helper_fill_var
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x9ffc3e13	drm_helper_crtc_in_use
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xace48566	drm_fb_helper_single_fb_probe
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xad24038c	drm_helper_resume_force_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xb0ae396b	drm_fb_helper_set_par
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xb4fa7018	drm_fb_helper_check_var
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xc469c244	drm_fb_helper_restore
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xdb7c3131	drm_helper_initial_config
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xe8b120a1	drm_crtc_helper_set_config
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xe91f2b33	drm_fb_helper_setcmap
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xe9cdced3	drm_fb_helper_free
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xf1c7e9f9	drm_helper_probe_single_connector_modes
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xf6027ca0	drm_crtc_helper_set_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xfb8f8315	drm_helper_probe_connector_modes
+EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0x6cb42317	radeonfb_remove
+EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0xa0b47255	radeonfb_resize
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x022b0971	ttm_read_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x06426136	ttm_bo_wait_unreserved
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x073c60d5	ttm_ref_object_base_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x0d888984	ttm_bo_kunmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x0f20efc3	ttm_object_file_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x104f75a6	ttm_tt_bind
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x1301299e	ttm_bo_move_accel_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x171f88f2	ttm_bo_synccpu_write_grab
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x19330e93	ttm_bo_unmap_virtual
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x1d8a8bb2	ttm_bo_wait
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x1fec7b67	ttm_base_object_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x253a3786	ttm_ref_object_add
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x2a8cdc55	ttm_suspend_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x2b9f936e	ttm_bo_init_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x2edc66ab	ttm_bo_move_ttm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x30d44a8d	ttm_object_device_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x31150c95	ttm_bo_wait_cpu
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x365feb2e	ttm_eu_reserve_buffers
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x37cfecd6	ttm_bo_device_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x42c32660	ttm_object_file_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x44409a13	ttm_global_item_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x4cd37a4f	ttm_vt_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x4f0a949b	ttm_bo_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x53a18d79	ttm_mem_global_alloc
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x5c0edc79	ttm_mem_global_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x5ca5cb47	ttm_global_item_ref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x61bdb34f	ttm_eu_fence_buffer_objects
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x6265cc32	ttm_lock_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x64f17908	ttm_bo_mmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x69f68c4c	ttm_bo_clean_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x6d8374a8	ttm_mem_global_free
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x7080b062	ttm_tt_populate
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x70bab644	ttm_bo_move_memcpy
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x74b7dc8a	ttm_fbdev_mmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x86a4066d	ttm_eu_backoff_reservation
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x8ae685b9	ttm_io_prot
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x8d901b99	ttm_bo_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x91a82017	ttm_read_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x9303f402	ttm_bo_device_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x963ae60d	ttm_write_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x98361475	ttm_mem_global_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xa36fa700	ttm_tt_set_placement_caching
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xa6c4b6c0	ttm_bo_unreserve
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xaaea0488	ttm_bo_kmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xac0e50d1	ttm_round_pot
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xacba21f6	ttm_bo_synccpu_write_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb7ad380d	ttm_vt_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb8ed44aa	ttm_bo_validate
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc0822cd4	ttm_object_device_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc64022a6	ttm_bo_global_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xd1db4ef1	ttm_suspend_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xdf12278e	ttm_bo_reserve
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xe0d6d395	ttm_write_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xe129946a	ttm_bo_swapout_all
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xe6688a8a	ttm_bo_mem_space
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xf08604be	ttm_base_object_lookup
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xf6b7b297	ttm_base_object_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xfcce372b	ttm_bo_global_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xfcdc3cd0	ttm_bo_evict_mm
+EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0x0903c239	vid_from_reg
+EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0xef1c781c	vid_which_vrm
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0x92f866bc	i2c_pca_add_bus
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0xe73b3410	i2c_pca_add_numbered_bus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0082de07	hpsb_lock
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x07cae6e1	hpsb_create_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x129bdffc	hpsb_unregister_protocol
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1a200e5a	csr1212_release_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2161fbc4	hpsb_make_writepacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x219cbabe	dma_region_offset_to_bus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x253a5398	dma_region_mmap
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2a4cc36b	csr1212_attach_keyval_to_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3d25c3f3	hpsb_read_cycle_timer
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x44fc9af5	hpsb_iso_recv_release_packets
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x45f25af8	hpsb_packet_sent
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x49a95dc4	csr1212_get_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4a9cd770	csr1212_parse_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4f50e823	hpsb_iso_packet_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5085dca9	hpsb_node_write
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x50f1013a	hpsb_update_config_rom_image
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x562815b7	hpsb_iso_wake
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x564cd395	hpsb_send_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x58440cb1	hpsb_get_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5f22c551	hpsb_node_fill_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5f5fdd2f	csr1212_new_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x62bf4a3e	hpsb_bus_reset
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x633a5e73	hpsb_iso_stop
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x63c50d63	hpsb_make_phypacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6634e0c3	hpsb_reset_bus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x672ad148	dma_region_sync_for_device
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x68b51e47	csr1212_read
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6df3ee6d	hpsb_add_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x722b0576	hpsb_set_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x76bc1a5c	dma_region_free
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x76c6a7ea	hpsb_iso_recv_listen_channel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8157a209	hpsb_iso_recv_start
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x84476694	hpsb_free_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8879f8f0	dma_region_sync_for_cpu
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x899b2138	hpsb_get_tlabel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8ec2b312	dma_region_alloc
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x93aeb44d	hpsb_iso_xmit_queue_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x94b8eb82	hpsb_alloc_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x957a2fba	hpsb_unregister_highlevel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x979b3052	dma_prog_region_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9d53efad	hpsb_iso_n_ready
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa0421d6d	hpsb_make_lockpacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa1936b85	hpsb_protocol_class
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa924dac6	dma_prog_region_alloc
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa9f0799a	hpsb_set_hostinfo_key
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xab72660e	hpsb_iso_recv_flush
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xac972948	hpsb_selfid_complete
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaef57bb5	csr1212_detach_keyval_from_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaf49aae5	hpsb_free_tlabel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb3421e58	hpsb_make_readpacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb491b136	hpsb_update_config_rom
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb5be23ba	hpsb_iso_xmit_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb663d391	hpsb_iso_shutdown
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xba4d9dbf	hpsb_packet_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbba70620	dma_prog_region_free
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc26a0ca8	hpsb_iso_recv_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc4e4c118	hpsb_write
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc725ec5d	hpsb_iso_xmit_start
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc7c0c42d	hpsb_iso_packet_sent
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc9780955	hpsb_remove_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xccdd9bd7	__hpsb_register_protocol
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xccf078c3	hpsb_iso_recv_unlisten_channel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xcf53e906	hpsb_resume_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd0041185	hpsb_register_highlevel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd1b716db	hpsb_iso_recv_set_channel_mask
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd749d83b	hpsb_make_lock64packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe5175bfc	hpsb_alloc_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe5a433d0	hpsb_iso_xmit_sync
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe6fb5f5a	hpsb_allocate_and_register_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xea4152ff	dma_region_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xec6201cc	hpsb_set_packet_complete_task
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xeec3566c	hpsb_destroy_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf1c0240a	hpsb_make_streampacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf81e1463	hpsb_get_hostinfo_bykey
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfa967f54	hpsb_read
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfba57f51	hpsb_speedto_str
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfbd6f836	hpsb_unregister_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfc522431	hpsb_selfid_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfe183479	hpsb_register_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xffe7ba36	hpsb_packet_success
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x1d5aeebc	ohci1394_init_iso_tasklet
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x59745748	ohci1394_unregister_iso_tasklet
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x7105b356	ohci1394_stop_context
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x88340c69	ohci1394_register_iso_tasklet
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x427f7a7e	rdma_addr_cancel
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x7eeff7de	rdma_addr_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x8804b684	rdma_copy_addr
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xef7df3c6	rdma_translate_ip
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xf3ddfccc	rdma_resolve_ip
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xfe13d5c7	rdma_addr_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x08140dbe	ib_send_cm_req
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x08f563f2	ib_send_cm_rej
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x27f945de	ib_send_cm_rtu
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x2b4c42e9	ib_send_cm_mra
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x2d05f9bf	ib_send_cm_drep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x389d486b	ib_cm_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x447987c5	cm_class
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x65dc6ca8	ib_send_cm_sidr_req
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x7c44a694	ib_create_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x80ebf24d	ib_send_cm_lap
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x8fe58707	ib_send_cm_rep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x933886fc	ib_cm_notify
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x99aabbe4	ib_send_cm_sidr_rep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xe2b74807	ib_send_cm_dreq
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xeabc7910	ib_destroy_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xec034716	ib_cm_listen
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xf4d38175	ib_send_cm_apr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x02c583a1	ib_query_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x066fccc2	ib_get_dma_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x06830b9a	ib_pack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0a44268c	ib_create_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0cb8117a	ib_get_client_data
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x12e1e68e	ib_register_event_handler
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x163bedea	ib_query_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1704ee9d	ib_destroy_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1e491a04	ib_unmap_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x27eecf01	ib_alloc_pd
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2aad1ccd	ib_query_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2f90860b	ib_find_cached_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2fac1bf1	ib_get_cached_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x343c0d47	ib_find_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x39bc6ecd	ib_unregister_event_handler
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3b0b35f2	ib_attach_mcast
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3e0e64c5	ib_modify_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3f7567fd	ib_rate_to_mult
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4c694584	ib_modify_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5169c6a9	ib_umem_page_count
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x53e1c7df	ib_find_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5432f96b	ib_flush_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x550e3a3b	ib_dealloc_mw
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x56b874f8	ib_reg_phys_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5bf790df	ib_destroy_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5c92fd83	ib_dereg_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x63135323	ib_umem_release
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x63e91971	ib_create_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x64371e5f	ib_modify_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x67bfd973	ib_modify_port
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x695ce81e	ib_fmr_pool_map_phys
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6c323deb	ib_detach_mcast
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6f658583	ib_destroy_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x71b140a1	ib_alloc_fast_reg_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x75706814	ib_dealloc_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x77825ca0	ib_umem_get
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7dbf0d10	ib_find_cached_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x80026303	ib_alloc_mw
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8640eaeb	ib_modify_qp_is_ok
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x87582c09	ib_alloc_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x87b614d8	ib_ud_header_pack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8d315d88	ib_modify_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x94aa3d74	ib_destroy_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x96ce6c46	rdma_node_get_transport
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x96fca436	ib_create_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x974e9a53	ib_resize_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9c106d08	ib_dealloc_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9d804fa1	mult_to_ib_rate
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa642de91	ib_query_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb2cc57de	ib_dispatch_event
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb3ac38c4	ib_query_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb3d8562d	ib_register_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xbc052852	ib_query_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc0a1bcd0	ib_modify_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc4b5f911	ib_query_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc5ed0b48	ib_get_cached_lmc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xcc5bf86c	ib_create_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd0bfa766	ib_free_fast_reg_page_list
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd15dbff1	ib_create_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd17ba9d1	ib_ud_header_init
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd881222c	ib_set_client_data
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd8cbb1fb	ib_unregister_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xda980f08	ib_query_port
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xddc1ef78	ib_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe15a15cf	ib_destroy_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe2f7ab72	ib_fmr_pool_unmap
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe40a531e	ib_dealloc_pd
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe5288917	ib_init_ah_from_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe8e36203	ib_create_ah_from_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xef776bc8	ib_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf36498b9	ib_ud_header_unpack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf5f17146	ib_get_cached_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf66d05bd	ib_alloc_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf96fc9de	ib_unpack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xfae84bae	ib_rereg_phys_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xfcbbc99b	ib_alloc_fast_reg_page_list
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x1bc9b2ea	ib_post_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x2d7ed21c	ib_unregister_mad_agent
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x41ae4473	ib_redirect_mad_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x48de1532	ib_get_rmpp_segment
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x5cd661db	ib_create_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6ef787ed	ib_response_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6f077fcf	ib_get_mad_data_offset
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x7a99cfc9	ib_register_mad_agent
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x7b5d4b7a	ib_is_mad_class_rmpp
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xbec2779e	ib_modify_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xc01858a5	ib_process_mad_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xc4b2d56e	ib_free_recv_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xd9dd3a3a	ib_free_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xf1491db5	ib_cancel_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xf90a279f	ib_register_mad_snoop
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x010b40e1	ib_init_ah_from_path
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x1d471861	ib_sa_path_rec_get
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x576fdbac	ib_sa_free_multicast
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x70d693c0	ib_sa_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xa3a08b5d	ib_sa_get_mcmember_rec
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xd61d8ecf	ib_sa_join_multicast
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xd81ad496	ib_sa_cancel_query
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xe0b7c7a9	ib_init_ah_from_mcmember
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xe6307f78	ib_sa_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xfb8b6ee4	ib_sa_service_rec_query
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x02f847bc	ib_copy_path_rec_from_user
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x07cf5a51	ib_copy_ah_attr_to_user
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x18382f6a	ib_copy_path_rec_to_user
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x184f3575	ib_copy_qp_attr_to_user
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x060b9a04	iw_cm_accept
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x3ee42d34	iw_cm_disconnect
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x839e9498	iw_cm_connect
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xacf35576	iw_destroy_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xbe63a86b	iw_create_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xe5b1e20d	iw_cm_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xec7547c4	iw_cm_listen
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xf016d9bb	iw_cm_reject
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x0234ffc9	rdma_destroy_id
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x101e3099	rdma_join_multicast
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x103b8a5e	rdma_accept
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x1744c6c3	rdma_notify
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x30e62255	rdma_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x3103a476	rdma_disconnect
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x407540b4	rdma_resolve_route
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x7ef2121a	rdma_listen
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x9a3736cb	rdma_create_id
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xaed6248d	rdma_reject
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xb0c8cffa	rdma_set_ib_paths
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xceab3321	rdma_destroy_qp
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xdbe12c45	rdma_set_service_type
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xe0bcab1f	rdma_create_qp
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xe4c26749	rdma_resolve_addr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xeb07e729	rdma_bind_addr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xec074a36	rdma_leave_multicast
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xed3233e6	rdma_connect
+EXPORT_SYMBOL drivers/input/input-polldev 0x384ce7d3	input_register_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0xcf42edf0	input_unregister_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0xedabaf87	input_free_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0xf935510e	input_allocate_polled_device
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x04403fcf	unregister_capi_driver
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x14f2aa5a	capi20_get_version
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2b8eab1f	capilib_free_ncci
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2baa6586	capilib_new_ncci
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x31c24aa4	capi20_isinstalled
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x419ef434	capi_ctr_handle_message
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x47d3fc51	capi_info2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x47dbfa0a	capi_message2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x50b33ca4	capi_cmsg2message
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x591d6b43	capi_ctr_down
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x6057c6f3	capi_message2cmsg
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x62e32d43	capilib_data_b3_conf
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x68562e68	capi_ctr_ready
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x6ec78505	capi20_release
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x71e8d5ba	capilib_data_b3_req
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x788d398c	capi_cmsg2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7a33596c	capi20_get_serial
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7e6f1307	capi20_get_manufacturer
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x85bb3eea	capi20_register
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x8f699913	capilib_release
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x9f823278	register_capi_driver
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xa7f01afc	capi_ctr_suspend_output
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xa9b8bd14	capi20_set_callback
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xaa165d27	capilib_release_appl
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb19fda8d	capi_cmd2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb60e5e5f	capi_cmsg_header
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xcb8273d7	capi_ctr_resume_output
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xd1625c19	capi20_put_message
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xdfac858a	attach_capi_ctr
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe19a11ac	capi20_get_profile
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe9f62f29	cdebbuf_free
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xed061606	capi20_manufacturer
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xf3ca97b0	detach_capi_ctr
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNipac 0x1459b9e4	mISDNisac_irq
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNipac 0x1b04d81b	mISDNipac_init
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNipac 0x4dd2641f	mISDNisac_init
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNipac 0x5cee00c5	mISDNipac_irq
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNisar 0x5adcfd47	mISDNisar_init
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNisar 0x5b72e222	mISDNisar_irq
+EXPORT_SYMBOL drivers/isdn/i4l/isdn 0xc8517c0d	register_isdn
+EXPORT_SYMBOL drivers/isdn/i4l/isdnhdlc 0x3b71e4fc	isdnhdlc_decode
+EXPORT_SYMBOL drivers/isdn/i4l/isdnhdlc 0x59cc8a7e	isdnhdlc_out_init
+EXPORT_SYMBOL drivers/isdn/i4l/isdnhdlc 0x8ee38862	isdnhdlc_rcv_init
+EXPORT_SYMBOL drivers/isdn/i4l/isdnhdlc 0xfd9d4c09	isdnhdlc_encode
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x18311090	bchannel_senddata
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x19f8feeb	dchannel_senddata
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x1c0893da	mISDN_unregister_Bprotocol
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x2348cc3c	mISDN_FsmFree
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3ea336fd	mISDN_FsmAddTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x429129f2	mISDN_FsmRestartTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x4c1ec7ff	queue_ch_frame
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x4de79647	get_next_bframe
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x50c2230c	mISDN_FsmChangeState
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x69e30e8b	mISDN_initdchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x7142c1f2	recv_Bchannel_skb
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x75849d07	confirm_Bsend
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x8da7e2a0	mISDN_freedchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x98a380ca	mISDN_freebchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x98acf00f	recv_Bchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x9fddb0ad	mISDN_clock_update
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xa63c8fce	recv_Echannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xace35cae	mISDN_FsmDelTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xaf030d3d	mISDN_unregister_device
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xb64b0406	create_l1
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc00efa5a	mISDN_register_Bprotocol
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc3401729	mISDN_register_clock
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc3d278c7	recv_Dchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc535bad6	recv_Dchannel_skb
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd285995f	mISDN_clock_get
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd460d0a1	mISDN_clear_bchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd5145151	mISDN_FsmEvent
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd9a7fbfd	mISDN_FsmInitTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xdc41bd17	l1_event
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xddd3d738	mISDN_initbchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe8f617eb	mISDN_unregister_clock
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe9da0cda	get_next_dframe
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf2d0436c	mISDN_register_device
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf9e7832f	mISDN_FsmNew
+EXPORT_SYMBOL drivers/md/dm-log 0x0bc4e596	dm_dirty_log_create
+EXPORT_SYMBOL drivers/md/dm-log 0x59b53188	dm_dirty_log_type_unregister
+EXPORT_SYMBOL drivers/md/dm-log 0x7cfe6865	dm_dirty_log_destroy
+EXPORT_SYMBOL drivers/md/dm-log 0xb07631f9	dm_dirty_log_type_register
+EXPORT_SYMBOL drivers/md/dm-snapshot 0x0b10c926	dm_exception_store_type_register
+EXPORT_SYMBOL drivers/md/dm-snapshot 0x365bba24	dm_exception_store_create
+EXPORT_SYMBOL drivers/md/dm-snapshot 0xaecfaecc	dm_exception_store_destroy
+EXPORT_SYMBOL drivers/md/dm-snapshot 0xc14e7ad4	dm_exception_store_type_unregister
+EXPORT_SYMBOL drivers/md/md-mod 0x02931cbc	unregister_md_personality
+EXPORT_SYMBOL drivers/md/md-mod 0x09eaa1fc	bitmap_cond_end_sync
+EXPORT_SYMBOL drivers/md/md-mod 0x20d73fb4	md_register_thread
+EXPORT_SYMBOL drivers/md/md-mod 0x29ce8af3	md_check_recovery
+EXPORT_SYMBOL drivers/md/md-mod 0x3368c315	md_unregister_thread
+EXPORT_SYMBOL drivers/md/md-mod 0x37257d02	bitmap_startwrite
+EXPORT_SYMBOL drivers/md/md-mod 0x41d51bac	md_integrity_add_rdev
+EXPORT_SYMBOL drivers/md/md-mod 0x51e6d966	bitmap_close_sync
+EXPORT_SYMBOL drivers/md/md-mod 0x6207944e	bitmap_end_sync
+EXPORT_SYMBOL drivers/md/md-mod 0x7a2986ee	md_error
+EXPORT_SYMBOL drivers/md/md-mod 0x7a691b9f	md_check_no_bitmap
+EXPORT_SYMBOL drivers/md/md-mod 0x7ef028c4	md_write_start
+EXPORT_SYMBOL drivers/md/md-mod 0x8059d073	bitmap_endwrite
+EXPORT_SYMBOL drivers/md/md-mod 0x92b0bf21	bitmap_unplug
+EXPORT_SYMBOL drivers/md/md-mod 0x9eb72277	md_write_end
+EXPORT_SYMBOL drivers/md/md-mod 0xa1d12a8b	register_md_personality
+EXPORT_SYMBOL drivers/md/md-mod 0xb439f083	md_wakeup_thread
+EXPORT_SYMBOL drivers/md/md-mod 0xb57e3d33	md_done_sync
+EXPORT_SYMBOL drivers/md/md-mod 0xcc48e0fa	md_set_array_sectors
+EXPORT_SYMBOL drivers/md/md-mod 0xdf19c4c4	bitmap_start_sync
+EXPORT_SYMBOL drivers/md/md-mod 0xeda9a59b	md_integrity_register
+EXPORT_SYMBOL drivers/md/md-mod 0xf423b6f3	mddev_congested
+EXPORT_SYMBOL drivers/md/md-mod 0xf55b9cfb	md_wait_for_blocked_rdev
+EXPORT_SYMBOL drivers/md/raid6_pq 0x0bd662f6	raid6_gfmul
+EXPORT_SYMBOL drivers/md/raid6_pq 0x15fe0cd3	raid6_gfexp
+EXPORT_SYMBOL drivers/md/raid6_pq 0x5ba93f9d	raid6_gfinv
+EXPORT_SYMBOL drivers/md/raid6_pq 0x7b85d712	raid6_empty_zero_page
+EXPORT_SYMBOL drivers/md/raid6_pq 0xce45a6f1	raid6_gfexi
+EXPORT_SYMBOL drivers/media/common/tuners/mc44s803 0xacb7741a	mc44s803_attach
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0x0cb4b189	tuners
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0xc2821775	tuner_count
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-xc2028 0xbcf823a6	xc2028_attach
+EXPORT_SYMBOL drivers/media/common/tuners/xc5000 0xcd693a19	xc5000_attach
+EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0x0c35d97c	cx231xx_register_extension
+EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0x36be0b3f	cx231xx_unregister_extension
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x155650f3	cx2341x_ctrl_get_menu
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x1ca0c084	cx2341x_log_status
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x2f25eee2	cx2341x_update
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x5b88faf6	cx2341x_ext_ctrls
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf76ce95	cx2341x_fill_defaults
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf8b77a4	cx2341x_mpeg_ctrls
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xe2c2b5eb	cx2341x_ctrl_query
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x308d9865	gspca_frame_add
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x732c0c33	gspca_disconnect
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x9670af2c	gspca_debug
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xb6f6d49d	gspca_auto_gain_n_exposure
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xdd7d7053	gspca_get_i_frame
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xee4f191d	gspca_dev_probe
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x04e83446	saa7134_tuner_callback
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x054b337a	saa7134_pgtable_free
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x1211df5d	saa7134_devlist
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x14dfecc6	saa7134_boards
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x30ecfc6b	saa7134_devlist_lock
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x3c937197	saa7134_ts_register
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x47a17008	saa7134_tvaudio_setmute
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x47d9c87d	saa7134_pgtable_build
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x4b3d61d2	saa7134_set_dmabits
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x4dd1eb20	saa7134_set_gpio
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x9780d6fc	saa7134_dmasound_init
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x98696ee1	saa7134_pgtable_alloc
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xe519aade	saa7134_ts_unregister
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xeab1bab2	saa7134_dmasound_exit
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xf646f236	saa_dsp_writel
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x00eb338d	soc_camera_format_by_fourcc
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x2e34ee12	soc_camera_xlate_by_fourcc
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x9cb8a06e	soc_camera_host_register
+EXPORT_SYMBOL drivers/media/video/soc_camera 0xd44b7cfa	soc_camera_host_unregister
+EXPORT_SYMBOL drivers/media/video/soc_camera 0xefb92baa	soc_camera_apply_sensor_flags
+EXPORT_SYMBOL drivers/media/video/tveeprom 0x5839615c	tveeprom_hauppauge_analog
+EXPORT_SYMBOL drivers/media/video/tveeprom 0xc06ee781	tveeprom_read
+EXPORT_SYMBOL drivers/media/video/v4l1-compat 0x28205b7a	v4l_compat_translate_ioctl
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x03165a85	v4l2_ctrl_get_menu
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x0b43fc7e	v4l2_chip_ident_i2c_client
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1dcaa0c8	v4l2_prio_max
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1e326b97	v4l2_ctrl_query_fill
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x2f639468	v4l2_prio_check
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x42c8e001	v4l2_ctrl_next
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x495426ee	v4l2_ctrl_get_name
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x4ed5e0d7	v4l2_chip_match_host
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x50766d69	v4l2_ctrl_query_menu_valid_items
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x592d8b6c	v4l2_chip_match_i2c_client
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x76ba9a9a	v4l2_prio_open
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x95284709	v4l2_prio_close
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9c7de443	v4l2_prio_change
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9eb43ee2	v4l2_ctrl_check
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0xbecd2858	v4l2_prio_init
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0xd9ee1e3f	v4l2_ctrl_query_menu
+EXPORT_SYMBOL drivers/media/video/videodev 0x027f4d45	video_usercopy
+EXPORT_SYMBOL drivers/media/video/videodev 0x0614dd5a	v4l2_video_std_frame_period
+EXPORT_SYMBOL drivers/media/video/videodev 0x0fdcf8b2	video_device_alloc
+EXPORT_SYMBOL drivers/media/video/videodev 0x123959a1	v4l2_type_names
+EXPORT_SYMBOL drivers/media/video/videodev 0x2d88f592	video_device_release
+EXPORT_SYMBOL drivers/media/video/videodev 0x3adbd595	v4l2_field_names
+EXPORT_SYMBOL drivers/media/video/videodev 0x3f95c4da	video_register_device_no_warn
+EXPORT_SYMBOL drivers/media/video/videodev 0x4b515806	video_device_release_empty
+EXPORT_SYMBOL drivers/media/video/videodev 0x5ebefe4b	v4l_printk_ioctl
+EXPORT_SYMBOL drivers/media/video/videodev 0x7fe730ca	video_unregister_device
+EXPORT_SYMBOL drivers/media/video/videodev 0xa093d6dd	video_devdata
+EXPORT_SYMBOL drivers/media/video/videodev 0xc7ec0c75	video_register_device
+EXPORT_SYMBOL drivers/media/video/videodev 0xdfb3d6d9	video_ioctl2
+EXPORT_SYMBOL drivers/media/video/videodev 0xe2b92059	v4l2_video_std_construct
+EXPORT_SYMBOL drivers/media/video/videodev 0xf3251e7b	v4l2_norm_to_name
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x0207cb54	mpt_raid_phys_disk_get_num_paths
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x179bfef4	mpt_send_handshake_request
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x25e265ba	mpt_config
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x2b508d14	mpt_reset_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x2cac3b86	mpt_put_msg_frame_hi_pri
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x32d556b3	mpt_set_taskmgmt_in_progress_flag
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x3609d714	mpt_put_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x3b255521	mpt_print_ioc_summary
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x3eab7349	mpt_detach
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4526289b	mpt_event_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x452b8582	mpt_attach
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x502108d0	mpt_fwfault_debug
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x653b7781	mpt_event_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x72d17254	mpt_device_driver_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x7f218e8e	mpt_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x814c70c8	mpt_free_fw_memory
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x914866c2	mpt_halt_firmware
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x96beaa6d	mpt_get_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xa54ef6bb	mptbase_sas_persist_operation
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xac05c9ae	mpt_raid_phys_disk_pg1
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xac135551	mpt_clear_taskmgmt_in_progress_flag
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xb91bdbfd	mpt_GetIocState
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc0e69f82	mpt_device_driver_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc47c22e8	mpt_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd236176b	mpt_free_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd4ea399b	mpt_HardResetHandler
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd9a92a75	mpt_reset_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xdd805159	ioc_list
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xe0f58b0f	mpt_alloc_fw_memory
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xe8b4c774	mpt_raid_phys_disk_pg0
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xeacac3ed	mpt_findImVolumes
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xfb1336c7	mpt_verify_adapter
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x18b87eea	mptscsih_slave_destroy
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x21fb9c52	mptscsih_scandv_complete
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x38def3b1	mptscsih_get_scsi_lookup
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x3e1fe58d	mptscsih_taskmgmt_response_code
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x4436617b	mptscsih_proc_info
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x446918f2	mptscsih_is_phys_disk
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x50cf7fa8	mptscsih_info
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x58f2050f	mptscsih_shutdown
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x5b3ea562	mptscsih_ioc_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x793ea823	mptscsih_bios_param
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x7f4d3c68	mptscsih_abort
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x80bfbce8	mptscsih_event_process
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x82c787fa	mptscsih_host_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x9806acb8	mptscsih_io_done
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xacd8801a	mptscsih_change_queue_depth
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xd2f26692	mptscsih_qcmd
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xd796ebba	mptscsih_remove
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xdfa53ed1	mptscsih_bus_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xe3e46635	mptscsih_host_attrs
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xeb00e334	mptscsih_raid_id_to_num
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xee874c68	mptscsih_taskmgmt_complete
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xf2993523	mptscsih_IssueTaskMgmt
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xf3137ccc	mptscsih_slave_configure
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xf70bb509	mptscsih_dev_reset
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x02f6245f	i2o_driver_notify_controller_remove_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x0511f144	i2o_parm_issue
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x075b0944	i2o_device_claim
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x0a1956d9	i2o_event_register
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x0caa563f	i2o_cntxt_list_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x19140405	i2o_parm_field_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x26265814	i2o_device_claim_release
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2a843bef	i2o_dump_message
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x40ffcc0f	i2o_find_iop
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x47a6507a	i2o_msg_post_wait_mem
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x4b28fade	i2o_msg_get_wait
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x4cf2828c	i2o_cntxt_list_remove
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x567b59dc	i2o_driver_unregister
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x5afc93be	i2o_status_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x8719bb30	i2o_parm_table_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x949cd2a9	i2o_exec_lct_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x9909b04a	i2o_driver_notify_controller_add_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xa4d845b2	i2o_iop_find_device
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xa8feb85f	i2o_driver_register
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb4c00dcf	i2o_controllers
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xd0e430ad	i2o_driver_notify_device_remove_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xd2bc28ee	i2o_cntxt_list_get_ptr
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xfb8782b8	i2o_cntxt_list_add
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xfeca47f6	i2o_driver_notify_device_add_all
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x37165bff	ab3100_event_unregister
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x407fe282	ab3100_mask_and_set_register_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x5229b6cc	ab3100_event_register
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x6dd7374a	ab3100_event_registers_startup_state_get
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x7e0691a3	ab3100_get_chip_type
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x85e2b1cb	ab3100_get_register_page_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xb0632ac6	ab3100_set_register_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xb65d5a7c	ab3100_get_register_interruptible
+EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x279a97c8	pasic3_read_register
+EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x7ec399d2	pasic3_write_register
+EXPORT_SYMBOL drivers/mfd/mfd-core 0x06fd3838	mfd_remove_devices
+EXPORT_SYMBOL drivers/mfd/mfd-core 0x2f43f519	mfd_add_devices
+EXPORT_SYMBOL drivers/mfd/tps65010 0x02d4ad0f	tps65013_set_low_pwr
+EXPORT_SYMBOL drivers/mfd/tps65010 0x28485130	tps65010_config_vregs1
+EXPORT_SYMBOL drivers/mfd/tps65010 0x33739de7	tps65010_set_vib
+EXPORT_SYMBOL drivers/mfd/tps65010 0x9fd44c69	tps65010_set_led
+EXPORT_SYMBOL drivers/mfd/tps65010 0xb14080cc	tps65010_set_low_pwr
+EXPORT_SYMBOL drivers/mfd/tps65010 0xd5bb106d	tps65010_set_vbus_draw
+EXPORT_SYMBOL drivers/mfd/tps65010 0xe99b3f36	tps65010_set_gpio_out_value
+EXPORT_SYMBOL drivers/misc/c2port/core 0x421a327f	c2port_device_register
+EXPORT_SYMBOL drivers/misc/c2port/core 0xc6dce79c	c2port_device_unregister
+EXPORT_SYMBOL drivers/misc/ioc4 0x01b65b6e	ioc4_unregister_submodule
+EXPORT_SYMBOL drivers/misc/ioc4 0xeea459b4	ioc4_register_submodule
+EXPORT_SYMBOL drivers/misc/tifm_core 0x14ca6afb	tifm_free_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0x1b256402	tifm_register_driver
+EXPORT_SYMBOL drivers/misc/tifm_core 0x422bb45b	tifm_unmap_sg
+EXPORT_SYMBOL drivers/misc/tifm_core 0x4a94a4ed	tifm_alloc_device
+EXPORT_SYMBOL drivers/misc/tifm_core 0x5e9392e2	tifm_has_ms_pif
+EXPORT_SYMBOL drivers/misc/tifm_core 0x93810980	tifm_eject
+EXPORT_SYMBOL drivers/misc/tifm_core 0x94375c6b	tifm_map_sg
+EXPORT_SYMBOL drivers/misc/tifm_core 0x98966747	tifm_free_device
+EXPORT_SYMBOL drivers/misc/tifm_core 0xa01ee4c3	tifm_remove_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0xc4a1aeca	tifm_add_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0xcd153284	tifm_queue_work
+EXPORT_SYMBOL drivers/misc/tifm_core 0xd9bbd8c7	tifm_alloc_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0xec8b2bbe	tifm_unregister_driver
+EXPORT_SYMBOL drivers/mmc/card/mmc_block 0xd32fb8fb	mmc_cleanup_queue
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x0f1e23b2	mmc_add_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x0f7b6950	mmc_card_can_sleep
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x101029f7	mmc_wait_for_req
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x1521b3fc	__mmc_claim_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x17545af0	mmc_register_driver
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x184b82fb	mmc_vddrange_to_ocrmask
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x18f77508	mmc_release_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x21c01878	mmc_wait_for_cmd
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x24f7334d	mmc_remove_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x2e0c1244	mmc_card_sleep
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x49d70005	mmc_wait_for_app_cmd
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x4f64beb6	mmc_try_claim_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x56df5a59	mmc_regulator_set_ocr
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x631c7654	mmc_set_data_timeout
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x663a2c1c	mmc_request_done
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x7a9c7c4c	mmc_power_save_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x7cb7148c	mmc_free_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x98dd1d22	mmc_detect_change
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xb60869ad	mmc_host_enable
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xc2030c30	mmc_unregister_driver
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xd10d90a8	mmc_alloc_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xda01b2b3	mmc_card_awake
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xe14e8f82	mmc_align_data_size
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xf494f618	mmc_regulator_get_ocrmask
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xfa9c8b0b	mmc_host_disable
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xfada5834	mmc_host_lazy_disable
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xfb95bbd3	mmc_power_restore_host
+EXPORT_SYMBOL drivers/mmc/host/of_mmc_spi 0x54b227a7	mmc_spi_put_pdata
+EXPORT_SYMBOL drivers/mmc/host/of_mmc_spi 0x575fd322	mmc_spi_get_pdata
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x317ce82b	cfi_fixup
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0xcbcb93e7	cfi_read_pri
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0xe4d602c2	cfi_varsize_frob
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x22d1b868	map_destroy
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x71b819d9	register_mtd_chip_driver
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x97b9fa49	unregister_mtd_chip_driver
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0xcbad78ce	do_map_probe
+EXPORT_SYMBOL drivers/mtd/chips/gen_probe 0x6c9593ab	mtd_do_chip_probe
+EXPORT_SYMBOL drivers/mtd/lpddr/lpddr_cmds 0x333ba302	lpddr_cmdset
+EXPORT_SYMBOL drivers/mtd/maps/map_funcs 0xc449a1ae	simple_map_init
+EXPORT_SYMBOL drivers/mtd/mtd 0xbec9b28b	add_mtd_partitions
+EXPORT_SYMBOL drivers/mtd/mtd 0xfcf0c525	del_mtd_partitions
+EXPORT_SYMBOL drivers/mtd/mtdconcat 0x6388d0ae	mtd_concat_create
+EXPORT_SYMBOL drivers/mtd/mtdconcat 0x9ba0ae89	mtd_concat_destroy
+EXPORT_SYMBOL drivers/mtd/nand/nand 0x652987ef	nand_default_bbt
+EXPORT_SYMBOL drivers/mtd/nand/nand 0xa9437c3c	nand_scan_bbt
+EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0x72e0ac30	nand_calculate_ecc
+EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0xaa02cabc	nand_correct_data
+EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0xb4b94377	__nand_correct_data
+EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0x836bdb72	nand_flash_ids
+EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0xa336feb7	nand_manuf_ids
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x7081a0a6	flexonenand_region
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x87d10526	onenand_addr
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0xd11a4770	onenand_default_bbt
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0xd9f449c0	onenand_scan_bbt
+EXPORT_SYMBOL drivers/net/8390 0x0feb4f04	__alloc_ei_netdev
+EXPORT_SYMBOL drivers/net/8390 0x114ec1e4	ei_poll
+EXPORT_SYMBOL drivers/net/8390 0x12b63acc	ei_set_multicast_list
+EXPORT_SYMBOL drivers/net/8390 0x1e3a66c4	ei_tx_timeout
+EXPORT_SYMBOL drivers/net/8390 0x1e9b6558	ei_get_stats
+EXPORT_SYMBOL drivers/net/8390 0x5337ba00	ei_close
+EXPORT_SYMBOL drivers/net/8390 0x7a617798	NS8390_init
+EXPORT_SYMBOL drivers/net/8390 0x898debae	ei_netdev_ops
+EXPORT_SYMBOL drivers/net/8390 0xa955e951	ei_start_xmit
+EXPORT_SYMBOL drivers/net/8390 0xdd365790	ei_interrupt
+EXPORT_SYMBOL drivers/net/8390 0xdee1e46b	ei_open
+EXPORT_SYMBOL drivers/net/bnx2 0xcea3e369	bnx2_cnic_probe
+EXPORT_SYMBOL drivers/net/cnic 0x636af174	cnic_unregister_driver
+EXPORT_SYMBOL drivers/net/cnic 0xc63a8eb4	cnic_register_driver
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x07be9158	cxgb3_free_stid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x130a19cc	cxgb3_register_client
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x358ccf70	t3_l2t_send_event
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x49d203c4	dev2t3cdev
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x4f9584ab	t3_l2t_send_slow
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x594bbcc3	cxgb3_alloc_stid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x655adaf0	cxgb3_unregister_client
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x75902f50	t3_register_cpl_handler
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x778997ab	cxgb3_alloc_atid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x8148a7cd	cxgb3_ofld_send
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x9f9f19e7	cxgb3_queue_tid_release
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xa720a22e	t3_l2e_free
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xbb9e91e9	cxgb3_free_atid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xd34a9ceb	cxgb3_remove_tid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xf08aace0	cxgb3_insert_tid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xf270c5a7	t3_l2t_get
+EXPORT_SYMBOL drivers/net/mdio 0x0f934475	mdio45_ethtool_gset_npage
+EXPORT_SYMBOL drivers/net/mdio 0x22bce513	mdio_mii_ioctl
+EXPORT_SYMBOL drivers/net/mdio 0x43e4defc	mdio45_nway_restart
+EXPORT_SYMBOL drivers/net/mdio 0x7577f992	mdio_set_flag
+EXPORT_SYMBOL drivers/net/mdio 0xa1a29548	mdio45_probe
+EXPORT_SYMBOL drivers/net/mdio 0xb34a7575	mdio45_ethtool_spauseparam_an
+EXPORT_SYMBOL drivers/net/mdio 0xc6b1163f	mdio45_links_ok
+EXPORT_SYMBOL drivers/net/mii 0x257953f1	mii_check_media
+EXPORT_SYMBOL drivers/net/mii 0x44d32887	generic_mii_ioctl
+EXPORT_SYMBOL drivers/net/mii 0x4d8ee7ad	mii_ethtool_gset
+EXPORT_SYMBOL drivers/net/mii 0x73c95f49	mii_nway_restart
+EXPORT_SYMBOL drivers/net/mii 0x992b9dae	mii_ethtool_sset
+EXPORT_SYMBOL drivers/net/mii 0xc8cfee3a	mii_link_ok
+EXPORT_SYMBOL drivers/net/mii 0xd7429348	mii_check_gmii_support
+EXPORT_SYMBOL drivers/net/mii 0xe458d142	mii_check_link
+EXPORT_SYMBOL drivers/net/phy/mdio-bitbang 0x0628d9c7	free_mdio_bitbang
+EXPORT_SYMBOL drivers/net/phy/mdio-bitbang 0x2735e9fb	alloc_mdio_bitbang
+EXPORT_SYMBOL drivers/net/ppp_generic 0x0536f517	ppp_unit_number
+EXPORT_SYMBOL drivers/net/ppp_generic 0x11504dc0	ppp_register_channel
+EXPORT_SYMBOL drivers/net/ppp_generic 0x2fc94ebc	ppp_input
+EXPORT_SYMBOL drivers/net/ppp_generic 0x3dc6b2e6	ppp_output_wakeup
+EXPORT_SYMBOL drivers/net/ppp_generic 0x47b04dc7	ppp_unregister_channel
+EXPORT_SYMBOL drivers/net/ppp_generic 0x48bebe52	ppp_unregister_compressor
+EXPORT_SYMBOL drivers/net/ppp_generic 0x4f8ac207	ppp_channel_index
+EXPORT_SYMBOL drivers/net/ppp_generic 0xa096a5fb	ppp_input_error
+EXPORT_SYMBOL drivers/net/ppp_generic 0xccce2f31	ppp_register_compressor
+EXPORT_SYMBOL drivers/net/ppp_generic 0xce7deaca	ppp_register_net_channel
+EXPORT_SYMBOL drivers/net/pppox 0x96285d7d	register_pppox_proto
+EXPORT_SYMBOL drivers/net/pppox 0x975b4588	pppox_ioctl
+EXPORT_SYMBOL drivers/net/pppox 0x98b378ac	pppox_unbind_sock
+EXPORT_SYMBOL drivers/net/pppox 0xe0ff7a18	unregister_pppox_proto
+EXPORT_SYMBOL drivers/net/slhc 0x2278e94b	slhc_remember
+EXPORT_SYMBOL drivers/net/slhc 0x26b760c4	slhc_init
+EXPORT_SYMBOL drivers/net/slhc 0x3fe0d1c0	slhc_free
+EXPORT_SYMBOL drivers/net/slhc 0x62538167	slhc_toss
+EXPORT_SYMBOL drivers/net/slhc 0x7e87227e	slhc_compress
+EXPORT_SYMBOL drivers/net/slhc 0xa78d9eb7	slhc_uncompress
+EXPORT_SYMBOL drivers/net/wireless/airo 0x025581ba	stop_airo_card
+EXPORT_SYMBOL drivers/net/wireless/airo 0x12d584e4	init_airo_card
+EXPORT_SYMBOL drivers/net/wireless/airo 0xe1a48a80	reset_airo_card
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x31219afb	ath_is_world_regd
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xbe25b39d	ath_regd_get_band_ctl
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xccbc8daa	ath_rxbuf_alloc
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xceace99f	ath_regd_init
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xda8a0419	ath_reg_notifier_apply
+EXPORT_SYMBOL drivers/net/wireless/atmel 0x6ab986d3	atmel_open
+EXPORT_SYMBOL drivers/net/wireless/atmel 0x9ce72839	init_atmel_card
+EXPORT_SYMBOL drivers/net/wireless/atmel 0xacdb4707	stop_atmel_card
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x069f8f92	hostap_setup_dev
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x078c6eb3	hostap_set_multicast_list_queue
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x1261369a	hostap_init_ap_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x35e8d22a	prism2_update_comms_qual
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x387b2aa4	hostap_set_auth_algs
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x3a9ae8ae	hostap_set_string
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x3b9ff695	hostap_info_init
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x3c0e847b	hostap_check_sta_fw_version
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x3cf8cddf	hostap_set_roaming
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x3e7c7eae	hostap_info_process
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x4a58b3b5	hostap_set_encryption
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x5b0a1bd4	hostap_init_data
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x5f96e828	hostap_remove_interface
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x6bf464de	hostap_remove_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x8c909f87	hostap_80211_ops
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x90740398	hostap_set_word
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x9b79dbee	hostap_80211_rx
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa12ad27f	hostap_dump_tx_header
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa86ff9dd	hostap_free_data
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb2a945e0	hostap_dump_rx_header
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb4b77c8b	hostap_80211_get_hdrlen
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb618ecd0	hostap_get_porttype
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xbc6a5f67	hostap_set_hostapd
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xcbde64d0	hostap_handle_sta_tx_exc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xd0bbc6f0	hostap_add_interface
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xdd582a8a	hostap_set_hostapd_sta
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xdd5c2f53	hostap_set_antsel
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xe16868d9	hostap_init_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xec06c477	hostap_master_start_xmit
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x09921661	libipw_networks_age
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x0f14457a	libipw_change_mtu
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x10eb3355	libipw_xmit
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x113d0dbc	libipw_get_channel_flags
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x1bd63d8c	libipw_txb_free
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x1da02e28	libipw_wx_get_scan
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x27543cab	libipw_wx_set_encodeext
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x33573269	libipw_rx
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x3a0cffde	libipw_rx_mgt
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x3bc8af7d	libipw_wx_get_encode
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x5b1a542f	libipw_wx_set_encode
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x60fa4e4d	free_ieee80211
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x64a7fb3e	libipw_get_geo
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x65e1ea66	libipw_is_valid_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x7b8ef929	alloc_ieee80211
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xa6403c63	libipw_get_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xc720a72f	libipw_channel_to_freq
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xd767b993	libipw_set_geo
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xd7f94d9b	libipw_wx_get_encodeext
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xf5f954e7	libipw_channel_to_index
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xfaf4c2f7	libipw_freq_to_channel
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x00d949ef	iwlcore_eeprom_query_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x05777227	iwl_tx_agg_start
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x066885fe	iwl_free_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x126ef402	iwl_send_calib_results
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x14159143	iwlcore_eeprom_enhanced_txpower
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x14806530	iwl_power_initialize
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x16d72c5b	iwl_alloc_all
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x19454fc6	iwl_clear_stations_table
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x19f0e900	iwl_debug_level
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1a027b73	iwl_rx_statistics
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1a976165	iwl_send_lq_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1abd3156	iwl_tt_exit
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1b8c1a87	iwl_remove_default_wep_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d77b399	iwl_bcast_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1faa94de	iwl_tx_queue_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1fdf2ffd	iwl_set_rxon_hwcrypto
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2034c58d	iwl_eeprom_check_version
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x214c2e2c	iwl_txq_update_write_ptr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x217565f7	iwl_hwrate_to_tx_control
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x21f4fdcf	iwl_tt_handler
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x27ab83cb	iwl_send_cmd_pdu
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x27bf3e3c	iwl_eeprom_get_mac
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x27d28793	iwl_tx_cmd_complete
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2bd8fd8c	iwl_bss_info_changed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2ed6ad30	iwl_activate_qos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2f6fbbdd	iwl_set_default_wep_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x32543c77	iwl_update_tkip_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x34740c2e	iwl_bg_scan_check
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x34d168ea	iwl_leds_register
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x36de5ac5	iwl_setup_rx_scan_handlers
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x37978c4b	iwl_set_decrypted_flag
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x38ee12f7	iwl_mac_beacon_update
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3de6d47a	iwl_reset_qos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4008c77d	iwl_verify_ucode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x42cb6ca2	iwl_rx_csa
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x43441177	iwl_rx_queue_alloc
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x457b282d	iwl_get_passive_dwell_time
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x459a47d3	iwl_send_static_wepkey_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4656fe04	iwl_full_rxon_required
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4a19b7fd	iwl_cmd_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4a280b92	iwl_mac_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4daf64ba	iwl_txq_ctx_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4eb8751f	iwl_send_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4f69295a	iwl_is_monitor_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x502bfbef	iwl_scan_cancel_timeout
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x51453486	iwl_ht_enabled
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x530583b9	iwl_rx_reply_error
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x56abfbc0	iwl_rxon_add_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x57279d1d	iwl_mac_add_interface
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x57cbf908	iwl_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x581ed720	iwl_alloc_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5b06ef6e	iwl_chain_noise_calibration
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5df4554d	iwl_rx_pm_debug_statistics_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5f0a07b7	iwl_set_tx_power
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5f1050a8	iwl_mac_get_tx_stats
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x61b3a46c	iwl_tx_queue_reclaim
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x622df053	iwl_setup_rxon_timing
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6792ade4	iwl_bg_abort_scan
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x67ae6ad6	iwl_send_bt_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6a690bfd	iwl_send_add_sta
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6ad93703	iwl_disable_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6bb33d10	iwl_remove_dynamic_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6d1af633	iwl_find_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6e26fc86	iwl_eeprom_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6ea9390c	iwlcore_eeprom_verify_signature
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7496427d	iwl_get_channel_info
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x74e38a6b	iwl_mac_remove_interface
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7559fa3d	iwl_uninit_drv
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7574e504	iwl_rate_get_lowest_plcp
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x76dc2366	iwl_tx_agg_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x78976e61	iwl_isr_legacy
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x79301576	iwl_set_hw_params
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x79bc1095	iwl_rf_kill_ct_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7b5d400b	iwl_hw_txq_ctx_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7d08721d	iwl_rx_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7dd5aa43	iwl_leds_unregister
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7de6cd8f	iwl_eeprom_query_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x83f3fa59	iwl_mac_hw_scan
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x842a3877	iwlcore_eeprom_acquire_semaphore
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x85a4f8ed	iwl_scan_cancel
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x863bda99	iwl_set_rxon_chain
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8670273d	iwl_hwrate_to_plcp_idx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8745227a	iwl_hw_detect
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x88b39c08	iwl_send_cmd_sync
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8ad39e8d	iwl_rx_reply_compressed_ba
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8afd4cba	iwl_hw_nic_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8bad5ad4	iwl_sta_rx_agg_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8c630fe9	iwl_fill_probe_req
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8fd32f13	iwl_power_update_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x90381c4f	iwl_rx_queue_space
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9134ddf5	iwl_free_tfds_in_queue
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x93ea3857	iwl_rx_replenish
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x97f0cff0	iwl_set_rxon_channel
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9928c5f3	iwl_tx_skb
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9c5cdddd	iwl_rx_queue_restock
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9cde1f24	iwl_queue_space
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9da33ba3	iwl_mac_reset_tsf
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9e817266	iwl_eeprom_query16
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9f380e39	iwl_tt_initialize
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9faced57	iwl_calib_set
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9fc83d52	iwl_rx_replenish_now
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9fec98d9	iwl_rxq_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa0c7f241	iwl_tx_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa34fdcb2	iwlcore_free_geos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa50682b1	iwl_sta_tx_modify_enable_tid
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa8bcb997	iwl_setup_scan_deferred_work
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb2dc2da1	iwl_tx_ant_restriction
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb485fb00	iwl_configure_filter
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb621f8b1	iwl_rx_missed_beacon_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb8d5a6b7	iwl_is_ht40_tx_allowed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbc56b007	iwl_tt_exit_ct_kill
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbdf62186	iwl_reset_run_time_calib
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbfcc1656	iwl_get_free_ucode_key_index
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbfdcfeab	iwl_rx_reply_rx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc231f808	iwl_init_drv
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc36276a5	iwl_connection_init_rx_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc51a5abf	iwl_free_channel_map
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc7794b30	iwl_bg_scan_completed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc7f4c628	iwl_reset_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc940cf9e	iwl_set_rxon_ht
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xca038d9a	iwl_add_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcbaf4931	get_cmd_string
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd0c9b9a1	iwl_check_rxon_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd1de6171	iwl_sta_rx_agg_start
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd2d17a4a	iwl_get_ra_sta_id
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd53eeca4	iwl_rx_queue_update_write_ptr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd6618563	iwlcore_eeprom_release_semaphore
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd6731f65	iwl_txq_check_empty
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd85cd3ea	iwl_send_cmd_pdu_async
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdb336fea	iwl_rx_pm_sleep_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xddba583e	iwl_tt_enter_ct_kill
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe015864f	iwl_irq_handle_error
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe039665b	iwl_set_dynamic_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe1073727	iwlcore_init_geos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe1f809b2	iwl_mac_conf_tx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe20e17d6	iwl_rx_reply_rx_phy
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe2102257	iwl_eeprom_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe5d325f4	iwl_init_sensitivity
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe7ce5d70	iwl_rates
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xed081f7b	iwl_send_statistics_request
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xee78da8b	iwl_sensitivity_calibration
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf5aaa5f6	iwl_get_sta_id
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf93845d4	iwl_init_channel_map
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfdfac952	iwl_setup_mac
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xff0ef732	iwl_get_active_dwell_time
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xff31be66	iwl_set_mode
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x0cc4b2bc	orinoco_up
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x332580ac	alloc_orinocodev
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x4196c38b	hermes_write_ltv
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x6a927e18	orinoco_interrupt
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x7859af31	orinoco_init
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x82080afa	orinoco_if_del
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x90b54940	orinoco_if_add
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xa031d8e4	hermes_doicmd_wait
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc60b5e9e	hermes_bap_pwrite
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc96e8d23	orinoco_down
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd38d8ae2	hermes_read_ltv
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd3f714e5	hermes_bap_pread
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5168829	hermes_allocate
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5336e5d	hermes_init
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd54e219d	hermes_docmd_wait
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xdd7526c8	free_orinocodev
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xed47b224	hermes_struct_init
+EXPORT_SYMBOL drivers/parport/parport 0x0283cabb	parport_find_base
+EXPORT_SYMBOL drivers/parport/parport 0x04d4677d	parport_claim_or_block
+EXPORT_SYMBOL drivers/parport/parport 0x1c3805fe	parport_ieee1284_ecp_read_data
+EXPORT_SYMBOL drivers/parport/parport 0x201010b3	parport_register_driver
+EXPORT_SYMBOL drivers/parport/parport 0x2962fde2	parport_put_port
+EXPORT_SYMBOL drivers/parport/parport 0x2a295fd3	parport_read
+EXPORT_SYMBOL drivers/parport/parport 0x32cf6261	parport_ieee1284_epp_read_data
+EXPORT_SYMBOL drivers/parport/parport 0x3ab680c1	parport_negotiate
+EXPORT_SYMBOL drivers/parport/parport 0x3c465ab5	parport_ieee1284_epp_read_addr
+EXPORT_SYMBOL drivers/parport/parport 0x43ca2a92	parport_write
+EXPORT_SYMBOL drivers/parport/parport 0x4d2a941b	parport_ieee1284_interrupt
+EXPORT_SYMBOL drivers/parport/parport 0x52069c1b	parport_ieee1284_epp_write_addr
+EXPORT_SYMBOL drivers/parport/parport 0x66bf88a9	parport_ieee1284_ecp_write_data
+EXPORT_SYMBOL drivers/parport/parport 0x6707412f	parport_unregister_device
+EXPORT_SYMBOL drivers/parport/parport 0x73818dd6	parport_find_number
+EXPORT_SYMBOL drivers/parport/parport 0x7eccde78	parport_set_timeout
+EXPORT_SYMBOL drivers/parport/parport 0x7fa02cb0	parport_unregister_driver
+EXPORT_SYMBOL drivers/parport/parport 0x85f0725d	parport_ieee1284_read_byte
+EXPORT_SYMBOL drivers/parport/parport 0x87fcdb47	parport_claim
+EXPORT_SYMBOL drivers/parport/parport 0x9d5eff70	parport_irq_handler
+EXPORT_SYMBOL drivers/parport/parport 0xad311bd0	parport_wait_event
+EXPORT_SYMBOL drivers/parport/parport 0xc5c2e69b	parport_get_port
+EXPORT_SYMBOL drivers/parport/parport 0xd037e5de	parport_ieee1284_epp_write_data
+EXPORT_SYMBOL drivers/parport/parport 0xd064b17c	parport_remove_port
+EXPORT_SYMBOL drivers/parport/parport 0xd5a4234a	parport_wait_peripheral
+EXPORT_SYMBOL drivers/parport/parport 0xd654102b	parport_release
+EXPORT_SYMBOL drivers/parport/parport 0xe48ef16c	parport_ieee1284_ecp_write_addr
+EXPORT_SYMBOL drivers/parport/parport 0xe6a0b4b9	parport_ieee1284_read_nibble
+EXPORT_SYMBOL drivers/parport/parport 0xe6e72727	parport_announce_port
+EXPORT_SYMBOL drivers/parport/parport 0xedf3d6a6	parport_ieee1284_write_compat
+EXPORT_SYMBOL drivers/parport/parport 0xf874d32d	parport_register_port
+EXPORT_SYMBOL drivers/parport/parport 0xfed63343	parport_register_device
+EXPORT_SYMBOL drivers/parport/parport_pc 0x162a3ee0	parport_pc_probe_port
+EXPORT_SYMBOL drivers/parport/parport_pc 0xae917369	parport_pc_unregister_port
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x061f9f37	pcmcia_request_irq
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x13730bad	pcmcia_modify_configuration
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x48a1125f	pcmcia_register_driver
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4e91595d	pcmcia_disable_device
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4fd033a0	pcmcia_error_func
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x6474a63f	pcmcia_unregister_driver
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x64945ded	pcmcia_get_mem_page
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x6540e51e	pcmcia_request_configuration
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x70184f4e	pcmcia_request_io
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x709b327d	pcmcia_dev_present
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x7ba5ba43	pcmcia_release_window
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x90ca5af7	pcmcia_map_mem_page
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xa4d1fb43	pcmcia_access_configuration_register
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xb6358f62	pcmcia_loop_config
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xc76cff67	pcmcia_request_window
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf0a25e12	pcmcia_error_ret
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf9948d89	pcmcia_get_window
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x0b4f7344	pcmcia_find_mem_region
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x0b5f6f5a	pcmcia_read_cis_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x0fda9fc4	pcmcia_socket_class
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x10a75a02	pccard_get_next_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x12d5dd7d	pcmcia_unregister_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x177755cc	pcmcia_get_socket_by_nr
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x1e064b34	pcmcia_parse_events
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x1fc5331b	pccard_validate_cis
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x20e499ea	pccard_get_first_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x212db8d2	pcmcia_socket_list
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x255765c2	pccard_get_tuple_data
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x2bf1c060	pcmcia_socket_list_rwsem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x31824c20	pcmcia_eject_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x330f4f12	pcmcia_socket_dev_late_resume
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x3adc0b7a	pcmcia_socket_dev_suspend
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x47dae6d9	pccard_static_ops
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x49953c6b	pcmcia_resume_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x52eccead	pcmcia_register_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x52f82c1a	pcmcia_find_io_region
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x7c8b000c	pcmcia_put_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x7ce44e05	pccard_register_pcmcia
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x7fc91b21	pcmcia_write_cis_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x85a0e19d	pcmcia_insert_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x883c3ab0	pcmcia_reset_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x9d66f5a6	pcmcia_replace_cis
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x9f59cc36	pcmcia_adjust_io_region
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xa587ca4c	pcmcia_socket_dev_resume
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xaf8dd83c	pcmcia_validate_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xb9ce31b7	destroy_cis_cache
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc02ef2c8	pcmcia_parse_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcf97f3bd	dead_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xe0601045	pcmcia_suspend_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xe241fbb9	release_cis_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf51f4e41	pccard_read_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xfc0837b4	pcmcia_socket_dev_early_resume
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xfe5074ad	pcmcia_get_socket
+EXPORT_SYMBOL drivers/pcmcia/rsrc_nonstatic 0x0024e66f	pccard_nonstatic_ops
+EXPORT_SYMBOL drivers/pps/pps_core 0x177b6f93	pps_register_source
+EXPORT_SYMBOL drivers/pps/pps_core 0x1e145952	pps_unregister_source
+EXPORT_SYMBOL drivers/pps/pps_core 0xe6a16116	pps_event
+EXPORT_SYMBOL drivers/sbus/char/bbc 0x1c4b27f3	bbc_i2c_writeb
+EXPORT_SYMBOL drivers/sbus/char/bbc 0x27eeb76e	bbc_i2c_write_buf
+EXPORT_SYMBOL drivers/sbus/char/bbc 0x35859e57	bbc_i2c_attach
+EXPORT_SYMBOL drivers/sbus/char/bbc 0x371b2b7c	bbc_i2c_detach
+EXPORT_SYMBOL drivers/sbus/char/bbc 0x72a66afb	bbc_i2c_read_buf
+EXPORT_SYMBOL drivers/sbus/char/bbc 0xacf2f0d0	bbc_i2c_getdev
+EXPORT_SYMBOL drivers/sbus/char/bbc 0xe899f9ef	bbc_i2c_readb
+EXPORT_SYMBOL drivers/scsi/esp_scsi 0x160873dc	scsi_esp_register
+EXPORT_SYMBOL drivers/scsi/esp_scsi 0x1bd4d271	scsi_esp_template
+EXPORT_SYMBOL drivers/scsi/esp_scsi 0x658a76c9	scsi_esp_intr
+EXPORT_SYMBOL drivers/scsi/esp_scsi 0x68a66a7b	scsi_esp_cmd
+EXPORT_SYMBOL drivers/scsi/esp_scsi 0x6a8a0f5b	scsi_esp_unregister
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x363514cf	fcoe_ctlr_recv
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x6228018f	fcoe_ctlr_destroy
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x7b25b3d7	fcoe_ctlr_recv_flogi
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xb999c60f	fcoe_ctlr_link_down
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xbac40b98	fcoe_ctlr_init
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xbeba8a19	fcoe_ctlr_els_send
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xf95d151b	fcoe_ctlr_link_up
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x076a0909	fc_seq_start_next
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x097e4af4	fc_exch_mgr_free
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1222882c	fc_lport_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1b21c0b0	fc_rport_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x2391f725	fc_fcp_destroy
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x24009b82	fc_exch_mgr_del
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x27841488	fc_linkdown
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x312d6d3c	fc_get_host_speed
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x32a479ca	fc_exch_recv
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x35ebbe04	fc_seq_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x36e5fbaf	fc_cpu_mask
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x418a144f	fc_queuecommand
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x45eceaf5	fc_change_queue_depth
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x56183917	fc_destroy_rport
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x57069fdc	fc_eh_device_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x58924fdd	fc_lport_destroy
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x5e228773	fc_elsct_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6292acda	fc_exch_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x67750428	fc_exch_done
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6977aa9c	fc_eh_abort
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6df4ce29	fc_lport_config
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x7913c6ba	fc_exch_mgr_add
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x7b05cbd6	fc_seq_els_rsp_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x9322effd	fc_exch_mgr_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x98fd5e5b	fc_exch_seq_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x9af13fa9	fc_exch_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x9b8b1c3e	fc_change_queue_type
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa19b43c4	fc_lport_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa7536443	fc_eh_host_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xac238a7a	fc_frame_crc_check
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb15cbe66	fc_fabric_login
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb1bafcf4	fc_get_host_port_type
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb77347a0	fc_fabric_logoff
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xc0ea5b14	fc_fcp_complete
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xc58fcc69	fc_get_host_port_state
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xc6189362	fc_fcp_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xce2f779a	fc_exch_mgr_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd2a262dd	fc_linkup
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd6cb3359	fc_setup_rport
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe0967dda	fc_get_host_stats
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe1d29d63	fc_slave_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe20a82d0	fc_set_rport_loss_tmo
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xeca3f586	fc_set_mfs
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xee445814	__fc_frame_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf18b1af5	fc_disc_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf7365d60	fc_seq_exch_abort
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xfac33f83	fc_fcp_ddp_setup
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xfb37cc53	fc_rport_terminate_io
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x2250c66e	mraid_mm_adapter_app_handle
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x512c956d	mraid_mm_unregister_adp
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x956bab4c	mraid_mm_register_adp
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0b704473	osd_req_write
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0c17edb1	osd_sec_init_nosec_doall_caps
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0d92af6f	osd_dev_fini
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x13d9fa7e	osd_req_create_object
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x14808c0b	osd_req_add_get_attr_page
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x199e7c7e	osd_req_remove_partition
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x25677e7b	osd_req_add_set_attr_list
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x286bff20	osd_start_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x30cb3e31	osd_req_read_kern
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x38e182f0	osd_req_flush_partition
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x4004bba3	osd_req_decode_get_attr_list
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x49a1e255	osd_req_set_attributes
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x4b5c3fea	osd_finalize_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x65aa505d	osd_req_list_partition_collections
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x67c9b875	osd_auto_detect_ver
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x73e2439d	osd_end_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x73ed3158	osd_req_list_partition_objects
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x7eb0242d	osd_req_flush_obsd
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x80acc878	osd_req_flush_object
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x82228a04	osd_execute_request_async
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x8c6b5c2a	osd_req_read
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x978c7030	osd_req_list_dev_partitions
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x98d7de5f	osd_req_create_partition
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x9b4dfefb	osd_req_list_collection_objects
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x9d3db4c9	osd_req_write_kern
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xad516838	osd_req_decode_sense_full
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xb2bd050a	osd_dev_init
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xc06d6e6e	osd_req_format
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xcdf37aaf	osd_req_flush_collection
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xd8a31041	osd_req_add_get_attr_list
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe19884c6	osd_req_get_attributes
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xf384e5d5	osd_req_remove_object
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xf9248e91	osd_execute_request
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x176886de	osduld_register_test
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x31508290	osduld_path_lookup
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x5f15ff93	osduld_put_device
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x5fc48609	osduld_unregister_test
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x093aa3a4	qlogicfas408_abort
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x27b09778	qlogicfas408_bus_reset
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x3fd8cd71	qlogicfas408_detect
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x55dba9a2	qlogicfas408_queuecommand
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x99c5bf38	qlogicfas408_biosparam
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xb9bbf5ea	qlogicfas408_disable_ints
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xccc75843	qlogicfas408_info
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xdc310b12	qlogicfas408_ihandl
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xe76b3b20	qlogicfas408_get_chip_type
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xf2b95199	qlogicfas408_setup
+EXPORT_SYMBOL drivers/scsi/raid_class 0x1ca031c1	raid_component_add
+EXPORT_SYMBOL drivers/scsi/raid_class 0x2e2049ca	raid_class_release
+EXPORT_SYMBOL drivers/scsi/raid_class 0x477d5afa	raid_class_attach
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x03df28d6	scsi_get_host_dev
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x07d9b783	scsi_nl_send_vendor_msg
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x0c65e73c	scsi_normalize_sense
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x0c8c9e99	scsi_show_extd_sense
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x0e7b07a6	scsi_add_device
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x11267875	scsi_extd_sense_format
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x151f1b21	scsi_test_unit_ready
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x1af54827	scsi_print_result
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x1b9e0ff1	scsilun_to_int
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x1db0d6b6	scsicam_bios_param
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x1e31435e	scsi_device_get
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x1fa41f69	scsi_dma_map
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x2506022c	scsi_add_host_with_dma
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x26127c05	scsi_rescan_device
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x28a2ed02	scsi_build_sense_buffer
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x2a4d28ce	scsi_device_lookup_by_target
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x2b0ba2b0	scsi_sense_desc_find
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x2d89342a	scsi_show_sense_hdr
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x2f7dc177	scsi_register_driver
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x35efa140	scsi_remove_target
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x3a363843	scsi_scan_target
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x3a3f989a	scsi_command_normalize_sense
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x40a27c37	scsi_dev_info_remove_list
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x4489d651	scsi_execute_req
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x4afe9a77	scsi_partsize
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x50d1835a	scsi_device_put
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x54b1a135	scsi_host_set_state
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x56c67386	scsi_calculate_bounce_limit
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x56c8799d	scsi_kunmap_atomic_sg
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x5745c86e	scsi_target_resume
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x5865261f	__scsi_device_lookup_by_target
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x591f3303	scsi_device_resume
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x5a653e8c	scsi_dma_unmap
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x5ac437df	scsi_cmd_print_sense_hdr
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x6149b2dd	scsi_track_queue_full
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x6324af4b	scsi_host_lookup
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x65457c06	scsi_block_requests
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x67a62a96	scsi_device_set_state
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x67d632e2	scsi_eh_restore_cmnd
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x69d38ed9	__scsi_print_sense
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x6c8896ec	scsi_get_device_flags_keyed
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x6dd8e3a6	scsi_set_medium_removal
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x7183723f	scsi_release_buffers
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x71f80904	scsi_init_io
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x72ea7b2d	scsi_device_type
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x7445e9cb	scsi_print_sense
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x795e0eef	scsi_nonblockable_ioctl
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x796fc5ce	scsi_get_sense_info_fld
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x797145b0	__scsi_iterate_devices
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x79a03dfe	__scsi_add_device
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x7ad5ba7b	scsi_register
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x7f27d822	scsi_prep_return
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x7f5d6c73	scsi_is_sdev_device
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x82a43cb3	scsi_remove_host
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x861e35db	scsi_setup_fs_cmnd
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x8bf7c326	scsi_host_put
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x8c7f9b60	__starget_for_each_device
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x8eb81e60	scsi_eh_prep_cmnd
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x939c698a	scsi_register_interface
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x96cd2b04	scsi_sense_key_string
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x9b2969f2	__scsi_put_command
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x9cfd56c5	scsi_print_status
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x9f6b5c55	scsi_finish_command
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xa00525a6	__scsi_alloc_queue
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xa0e13271	scsi_unblock_requests
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xa109d2f5	scsi_bios_ptable
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xa4c382e5	scsi_allocate_command
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xa534b467	scsi_setup_blk_pc_cmnd
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xa8831426	scsi_prep_state_check
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xaaa85e1a	scsi_put_command
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xac8b0d7a	scsi_device_lookup
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xb0211f9d	scsi_get_command
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xb23e316e	scsi_block_when_processing_errors
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xb28dba79	scsi_execute
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xb4709322	scsi_dev_info_add_list
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xb6c5a973	scsi_show_result
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xba7aa42c	scsi_report_device_reset
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xc1317f65	scsi_free_host_dev
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xc1da50f7	starget_for_each_device
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xca5dbc50	scsi_print_sense_hdr
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xcadda4e1	scsi_mode_sense
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xcb79eddf	scsi_host_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xce3f61af	scsi_print_command
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xd310a60b	__scsi_device_lookup
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xd4c47057	scsi_eh_finish_cmd
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xd7fa0b1e	scsi_unregister
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xda2ed566	scsi_target_quiesce
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xdc047fc4	scsi_dev_info_list_add_keyed
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xdcaafcea	scsi_device_quiesce
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xdfb7aca4	scsi_is_host_device
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xe5e04b1d	scsi_host_get
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xe888ec34	scsi_ioctl
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xe94e91e3	scsi_reset_provider
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xea10212a	int_to_scsilun
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xea7d8ca1	scsi_report_bus_reset
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xee49b9ea	scsi_remove_device
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xf1d38543	scsi_is_target_device
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xf4031d00	scsi_free_command
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xf4e966f7	scsi_prep_fn
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xf811e69d	scsi_eh_flush_done_q
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xf9236d99	scsi_adjust_queue_depth
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xfbaa41e3	scsi_kmap_atomic_sg
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xfded5cef	scsi_scan_host
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xfef96e23	__scsi_print_command
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x0363ab62	fc_attach_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x088d40d5	fc_vport_create
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x51187544	fc_vport_terminate
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x58cb8047	fc_remote_port_rolechg
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x7954b1ea	fc_get_event_number
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xad131fd7	fc_remove_host
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xc35dea08	fc_remote_port_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xca6836c0	scsi_is_fc_rport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xd8db0f6f	fc_release_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xdedcb4bd	fc_remote_port_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xe6f651ac	fc_host_post_event
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xf87af474	scsi_is_fc_vport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xfa97e6d6	fc_host_post_vendor_event
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x1c54091a	sas_port_alloc_num
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x3b77c314	sas_attach_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x3d12ae1e	sas_port_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x3d6ac0d9	sas_port_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x49e43f3b	scsi_is_sas_rphy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x4e94bb2d	sas_rphy_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x63c8647a	sas_end_device_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x66617388	sas_remove_host
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x785243a2	scsi_is_sas_port
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x83c5b153	sas_phy_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x86e4d094	sas_port_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x9492a415	sas_expander_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x9cacd42c	sas_port_add_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xa22fca6e	sas_rphy_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xab95c41a	sas_phy_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xabc7dd6d	sas_read_port_mode_page
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xaf37efc3	scsi_is_sas_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xb6e5e7a3	sas_port_delete_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xd4906a0e	sas_rphy_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xd531f4ca	sas_port_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xd573241d	sas_port_mark_backlink
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xdb233827	sas_release_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xe1769126	sas_remove_children
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xe6c9ff76	sas_phy_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xed64754f	sas_phy_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xf3ac4d56	sas_rphy_remove
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x29610671	spi_release_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x3686ea09	spi_print_msg
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x9fea20d2	spi_dv_device
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0xb6e50399	spi_attach_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0xc7f4711c	spi_display_xfer_agreement
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0xd7846c6f	spi_schedule_dv_device
+EXPORT_SYMBOL drivers/serial/8250 0x26df8bc4	serial8250_register_port
+EXPORT_SYMBOL drivers/serial/8250 0xc7208c3a	serial8250_resume_port
+EXPORT_SYMBOL drivers/serial/8250 0xcc248d26	serial8250_suspend_port
+EXPORT_SYMBOL drivers/serial/8250 0xcefcd99a	serial8250_unregister_port
+EXPORT_SYMBOL drivers/ssb/ssb 0x008c83c2	ssb_device_is_enabled
+EXPORT_SYMBOL drivers/ssb/ssb 0x0e3f4450	ssb_device_enable
+EXPORT_SYMBOL drivers/ssb/ssb 0x3808881a	ssb_device_disable
+EXPORT_SYMBOL drivers/ssb/ssb 0x415ff2a7	ssb_bus_pcibus_register
+EXPORT_SYMBOL drivers/ssb/ssb 0x4b81a98f	ssb_pmu_set_ldo_voltage
+EXPORT_SYMBOL drivers/ssb/ssb 0x4e4ac173	ssb_dma_free_consistent
+EXPORT_SYMBOL drivers/ssb/ssb 0x55c56298	ssb_bus_sdiobus_register
+EXPORT_SYMBOL drivers/ssb/ssb 0x586f18f9	ssb_clockspeed
+EXPORT_SYMBOL drivers/ssb/ssb 0x88bcb8b3	ssb_pcicore_dev_irqvecs_enable
+EXPORT_SYMBOL drivers/ssb/ssb 0x9b43c518	ssb_bus_unregister
+EXPORT_SYMBOL drivers/ssb/ssb 0xa0b03f82	ssb_set_devtypedata
+EXPORT_SYMBOL drivers/ssb/ssb 0xade20427	ssb_pmu_set_ldo_paref
+EXPORT_SYMBOL drivers/ssb/ssb 0xb525a46b	ssb_dma_set_mask
+EXPORT_SYMBOL drivers/ssb/ssb 0xc0512e0f	ssb_admatch_base
+EXPORT_SYMBOL drivers/ssb/ssb 0xcb726397	ssb_bus_suspend
+EXPORT_SYMBOL drivers/ssb/ssb 0xcd59525e	ssb_bus_resume
+EXPORT_SYMBOL drivers/ssb/ssb 0xd481192b	ssb_admatch_size
+EXPORT_SYMBOL drivers/ssb/ssb 0xd66046e2	ssb_bus_powerup
+EXPORT_SYMBOL drivers/ssb/ssb 0xe33acd79	__ssb_driver_register
+EXPORT_SYMBOL drivers/ssb/ssb 0xe7b625b1	ssb_pcihost_register
+EXPORT_SYMBOL drivers/ssb/ssb 0xeecb726b	ssb_dma_translation
+EXPORT_SYMBOL drivers/ssb/ssb 0xf0640511	ssb_driver_unregister
+EXPORT_SYMBOL drivers/ssb/ssb 0xf2d4b3a7	ssb_dma_alloc_consistent
+EXPORT_SYMBOL drivers/ssb/ssb 0xfb09de9f	ssb_bus_may_powerdown
+EXPORT_SYMBOL drivers/telephony/ixj 0x7bb4a1d9	ixj_pcmcia_probe
+EXPORT_SYMBOL drivers/telephony/phonedev 0x1c2f48e2	phone_unregister_device
+EXPORT_SYMBOL drivers/telephony/phonedev 0x836ff779	phone_register_device
+EXPORT_SYMBOL drivers/usb/host/sl811-hcd 0x3db9734f	sl811h_driver
+EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xa64a4cea	usb_nop_xceiv_unregister
+EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xd0e43207	usb_nop_xceiv_register
+EXPORT_SYMBOL drivers/usb/serial/usbserial 0x32a5424f	usb_serial_suspend
+EXPORT_SYMBOL drivers/usb/serial/usbserial 0x6bf22d94	usb_serial_resume
+EXPORT_SYMBOL drivers/video/backlight/generic_bl 0xc86baa7c	corgibl_limit_intensity
+EXPORT_SYMBOL drivers/video/backlight/lcd 0x6fdd8e62	lcd_device_register
+EXPORT_SYMBOL drivers/video/backlight/lcd 0x7d1457e7	lcd_device_unregister
+EXPORT_SYMBOL drivers/video/display/display 0xc3c8e7ff	display_device_register
+EXPORT_SYMBOL drivers/video/display/display 0xfd0ff3c2	display_device_unregister
+EXPORT_SYMBOL drivers/video/output 0x2cafc35a	video_output_register
+EXPORT_SYMBOL drivers/video/output 0x327e8b32	video_output_unregister
+EXPORT_SYMBOL drivers/video/svgalib 0x00d1fce9	svga_set_default_seq_regs
+EXPORT_SYMBOL drivers/video/svgalib 0x07b3da30	svga_wseq_multi
+EXPORT_SYMBOL drivers/video/svgalib 0x1b95c56a	svga_check_timings
+EXPORT_SYMBOL drivers/video/svgalib 0x1d6ccf72	svga_tilecursor
+EXPORT_SYMBOL drivers/video/svgalib 0x2841413a	svga_tileblit
+EXPORT_SYMBOL drivers/video/svgalib 0x50c2fb08	svga_get_caps
+EXPORT_SYMBOL drivers/video/svgalib 0x5269d749	svga_get_tilemax
+EXPORT_SYMBOL drivers/video/svgalib 0x63e898d1	svga_set_default_crt_regs
+EXPORT_SYMBOL drivers/video/svgalib 0x7a3ae959	svga_wcrt_multi
+EXPORT_SYMBOL drivers/video/svgalib 0x80408443	svga_set_timings
+EXPORT_SYMBOL drivers/video/svgalib 0x8519c966	svga_tilefill
+EXPORT_SYMBOL drivers/video/svgalib 0x8fa8438b	svga_set_textmode_vga_regs
+EXPORT_SYMBOL drivers/video/svgalib 0xab3b22ad	svga_set_default_gfx_regs
+EXPORT_SYMBOL drivers/video/svgalib 0xdad682b1	svga_set_default_atc_regs
+EXPORT_SYMBOL drivers/video/svgalib 0xeab2db1d	svga_settile
+EXPORT_SYMBOL drivers/video/svgalib 0xec83c473	svga_match_format
+EXPORT_SYMBOL drivers/video/svgalib 0xef774f5d	svga_compute_pll
+EXPORT_SYMBOL drivers/video/svgalib 0xfadff5d1	svga_tilecopy
+EXPORT_SYMBOL drivers/video/syscopyarea 0xc5089a0d	sys_copyarea
+EXPORT_SYMBOL drivers/video/sysfillrect 0xa7ae1174	sys_fillrect
+EXPORT_SYMBOL drivers/video/sysimgblt 0x5000610b	sys_imageblit
+EXPORT_SYMBOL drivers/video/vgastate 0x686de290	restore_vga
+EXPORT_SYMBOL drivers/video/vgastate 0xe7a2620e	save_vga
+EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x0d747eb1	w1_bq27000_read
+EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0xf0c8ec4f	w1_bq27000_write
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x0b32bd5a	w1_ds2760_store_eeprom
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x8ac6e380	w1_ds2760_write
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0xdf0416bc	w1_ds2760_recall_eeprom
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0xe2f43e92	w1_ds2760_read
+EXPORT_SYMBOL drivers/w1/wire 0x16e10a43	w1_register_family
+EXPORT_SYMBOL drivers/w1/wire 0x41abacd5	w1_remove_master_device
+EXPORT_SYMBOL drivers/w1/wire 0xe7b101b5	w1_add_master_device
+EXPORT_SYMBOL drivers/w1/wire 0xfc63fec3	w1_unregister_family
+EXPORT_SYMBOL fs/configfs/configfs 0x2bcc496d	configfs_depend_item
+EXPORT_SYMBOL fs/configfs/configfs 0x30d38db4	config_group_find_item
+EXPORT_SYMBOL fs/configfs/configfs 0x39eb1fc2	config_group_init_type_name
+EXPORT_SYMBOL fs/configfs/configfs 0x3c5c8f6f	config_item_get
+EXPORT_SYMBOL fs/configfs/configfs 0x5ebc1c2e	config_item_init_type_name
+EXPORT_SYMBOL fs/configfs/configfs 0x75ae754d	config_group_init
+EXPORT_SYMBOL fs/configfs/configfs 0x94159cd5	configfs_register_subsystem
+EXPORT_SYMBOL fs/configfs/configfs 0xa37cab97	config_item_init
+EXPORT_SYMBOL fs/configfs/configfs 0xab3ef527	configfs_unregister_subsystem
+EXPORT_SYMBOL fs/configfs/configfs 0xb9ee1b40	configfs_undepend_item
+EXPORT_SYMBOL fs/configfs/configfs 0xcb06e22e	config_item_set_name
+EXPORT_SYMBOL fs/configfs/configfs 0xe279a668	config_item_put
+EXPORT_SYMBOL fs/fscache/fscache 0x00fb541b	__fscache_read_or_alloc_page
+EXPORT_SYMBOL fs/fscache/fscache 0x0318534f	fscache_object_slow_work_ops
+EXPORT_SYMBOL fs/fscache/fscache 0x0715171b	__fscache_register_netfs
+EXPORT_SYMBOL fs/fscache/fscache 0x07844452	__fscache_relinquish_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0x07d9b576	fscache_wait_bit_interruptible
+EXPORT_SYMBOL fs/fscache/fscache 0x089c45c5	fscache_fsdef_index
+EXPORT_SYMBOL fs/fscache/fscache 0x0e4dcb6b	__fscache_update_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0x171ec69c	fscache_withdraw_cache
+EXPORT_SYMBOL fs/fscache/fscache 0x23a86085	__fscache_check_page_write
+EXPORT_SYMBOL fs/fscache/fscache 0x2c9c919a	__fscache_attr_changed
+EXPORT_SYMBOL fs/fscache/fscache 0x3174fe23	fscache_object_lookup_negative
+EXPORT_SYMBOL fs/fscache/fscache 0x367c9082	fscache_add_cache
+EXPORT_SYMBOL fs/fscache/fscache 0x3fc23318	fscache_wait_bit
+EXPORT_SYMBOL fs/fscache/fscache 0x496932b9	fscache_op_debug_id
+EXPORT_SYMBOL fs/fscache/fscache 0x78647568	__fscache_maybe_release_page
+EXPORT_SYMBOL fs/fscache/fscache 0x81d48035	fscache_mark_pages_cached
+EXPORT_SYMBOL fs/fscache/fscache 0x82f53aee	fscache_cache_cleared_wq
+EXPORT_SYMBOL fs/fscache/fscache 0x869cf3b6	fscache_check_aux
+EXPORT_SYMBOL fs/fscache/fscache 0x86f8894f	fscache_object_states
+EXPORT_SYMBOL fs/fscache/fscache 0x8b8cb716	fscache_io_error
+EXPORT_SYMBOL fs/fscache/fscache 0x960885fe	__fscache_wait_on_page_write
+EXPORT_SYMBOL fs/fscache/fscache 0x9766baa6	__fscache_acquire_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0x9ec24b11	fscache_init_cache
+EXPORT_SYMBOL fs/fscache/fscache 0x9f5c2ad8	__fscache_write_page
+EXPORT_SYMBOL fs/fscache/fscache 0xa45d8f17	__fscache_unregister_netfs
+EXPORT_SYMBOL fs/fscache/fscache 0xac9ec6e1	fscache_enqueue_operation
+EXPORT_SYMBOL fs/fscache/fscache 0xadb44a4e	__fscache_alloc_page
+EXPORT_SYMBOL fs/fscache/fscache 0xae926023	fscache_obtained_object
+EXPORT_SYMBOL fs/fscache/fscache 0xba395499	fscache_put_operation
+EXPORT_SYMBOL fs/fscache/fscache 0xbd452124	__fscache_uncache_page
+EXPORT_SYMBOL fs/fscache/fscache 0xfcf412aa	__fscache_read_or_alloc_pages
+EXPORT_SYMBOL fs/nfsd/nfsd 0x1f573533	nfs4_acl_posix_to_nfsv4
+EXPORT_SYMBOL fs/nfsd/nfsd 0x35e33c1e	nfs4_acl_write_who
+EXPORT_SYMBOL fs/nfsd/nfsd 0x5a157ae4	nfs4_acl_get_whotype
+EXPORT_SYMBOL fs/nfsd/nfsd 0x96ce9bb4	nfs4_acl_new
+EXPORT_SYMBOL fs/nfsd/nfsd 0xdb389aec	nfs4_acl_nfsv4_to_posix
+EXPORT_SYMBOL fs/quota/quota_tree 0x0b0a9f89	qtree_read_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0x15394529	qtree_write_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0x3a6feb17	qtree_entry_unused
+EXPORT_SYMBOL fs/quota/quota_tree 0x8638d03f	qtree_delete_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0xfd791dfe	qtree_release_dquot
+EXPORT_SYMBOL lib/crc-ccitt 0x651c2313	crc_ccitt
+EXPORT_SYMBOL lib/crc-ccitt 0x75811312	crc_ccitt_table
+EXPORT_SYMBOL lib/crc-itu-t 0x276c7e62	crc_itu_t
+EXPORT_SYMBOL lib/crc-itu-t 0xd29b009f	crc_itu_t_table
+EXPORT_SYMBOL lib/crc-t10dif 0x782acba5	crc_t10dif
+EXPORT_SYMBOL lib/crc7 0xc086bfba	crc7
+EXPORT_SYMBOL lib/crc7 0xd80c3603	crc7_syndrome_table
+EXPORT_SYMBOL lib/libcrc32c 0x27000b29	crc32c
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x315c65fd	zlib_deflateInit2
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x48034724	zlib_deflateReset
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xaf64ad0d	zlib_deflate
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf0caf44b	zlib_deflate_workspacesize
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf741c793	zlib_deflateEnd
+EXPORT_SYMBOL net/802/p8022 0xad65c0ee	unregister_8022_client
+EXPORT_SYMBOL net/802/p8022 0xbd202bbe	register_8022_client
+EXPORT_SYMBOL net/802/p8023 0x54a32702	make_8023_client
+EXPORT_SYMBOL net/802/p8023 0xbdfd6b36	destroy_8023_client
+EXPORT_SYMBOL net/802/psnap 0x23433d89	register_snap_client
+EXPORT_SYMBOL net/802/psnap 0x9e49ecfa	unregister_snap_client
+EXPORT_SYMBOL net/9p/9pnet 0x0212b365	p9_idpool_put
+EXPORT_SYMBOL net/9p/9pnet 0x03fad81b	p9_client_attach
+EXPORT_SYMBOL net/9p/9pnet 0x04dcb2e6	p9_client_walk
+EXPORT_SYMBOL net/9p/9pnet 0x0b3ac49a	p9pdu_dump
+EXPORT_SYMBOL net/9p/9pnet 0x14e4362a	p9_client_open
+EXPORT_SYMBOL net/9p/9pnet 0x3529a5f9	p9_client_write
+EXPORT_SYMBOL net/9p/9pnet 0x37e76543	v9fs_get_default_trans
+EXPORT_SYMBOL net/9p/9pnet 0x3a2abad6	p9_idpool_check
+EXPORT_SYMBOL net/9p/9pnet 0x3d73a797	p9_errstr2errno
+EXPORT_SYMBOL net/9p/9pnet 0x3dc1b9c2	v9fs_unregister_trans
+EXPORT_SYMBOL net/9p/9pnet 0x3facc993	p9_client_remove
+EXPORT_SYMBOL net/9p/9pnet 0x41e6bc51	p9_parse_header
+EXPORT_SYMBOL net/9p/9pnet 0x5850a5d8	p9_client_destroy
+EXPORT_SYMBOL net/9p/9pnet 0x58d58859	p9_client_version
+EXPORT_SYMBOL net/9p/9pnet 0x59747bd3	p9_tag_lookup
+EXPORT_SYMBOL net/9p/9pnet 0x5e898ad8	v9fs_get_trans_by_name
+EXPORT_SYMBOL net/9p/9pnet 0x61a4f886	p9_client_auth
+EXPORT_SYMBOL net/9p/9pnet 0x62055a12	p9_client_wstat
+EXPORT_SYMBOL net/9p/9pnet 0x71234f5c	p9_client_read
+EXPORT_SYMBOL net/9p/9pnet 0x7223f192	p9_client_cb
+EXPORT_SYMBOL net/9p/9pnet 0x72fc195f	p9_idpool_create
+EXPORT_SYMBOL net/9p/9pnet 0x76b79bf1	p9stat_read
+EXPORT_SYMBOL net/9p/9pnet 0x905a1456	p9_client_disconnect
+EXPORT_SYMBOL net/9p/9pnet 0x93fc0406	p9_client_stat
+EXPORT_SYMBOL net/9p/9pnet 0x9c964743	p9stat_free
+EXPORT_SYMBOL net/9p/9pnet 0xb1968e77	p9_idpool_destroy
+EXPORT_SYMBOL net/9p/9pnet 0xe58a3360	p9_error_init
+EXPORT_SYMBOL net/9p/9pnet 0xefeda01f	p9_client_clunk
+EXPORT_SYMBOL net/9p/9pnet 0xf057e14e	p9_client_fcreate
+EXPORT_SYMBOL net/9p/9pnet 0xf4181eee	p9_idpool_get
+EXPORT_SYMBOL net/9p/9pnet 0xf44eac0b	p9_client_create
+EXPORT_SYMBOL net/9p/9pnet 0xfa89b649	v9fs_register_trans
+EXPORT_SYMBOL net/appletalk/appletalk 0x0507f1de	atalk_find_dev_addr
+EXPORT_SYMBOL net/appletalk/appletalk 0x053df6da	atrtr_get_dev
+EXPORT_SYMBOL net/appletalk/appletalk 0x845810f3	aarp_send_ddp
+EXPORT_SYMBOL net/appletalk/appletalk 0xec725fc0	alloc_ltalkdev
+EXPORT_SYMBOL net/atm/atm 0x0b03de2c	atm_dev_lookup
+EXPORT_SYMBOL net/atm/atm 0x109fc54d	vcc_insert_socket
+EXPORT_SYMBOL net/atm/atm 0x1a24e5e2	sonet_subtract_stats
+EXPORT_SYMBOL net/atm/atm 0x1e0dfcf0	vcc_sklist_lock
+EXPORT_SYMBOL net/atm/atm 0x2cc2d52d	vcc_hash
+EXPORT_SYMBOL net/atm/atm 0x658fbae3	atm_dev_deregister
+EXPORT_SYMBOL net/atm/atm 0x87b8fc5e	atm_proc_root
+EXPORT_SYMBOL net/atm/atm 0x89195dc3	sonet_copy_stats
+EXPORT_SYMBOL net/atm/atm 0x94116a9d	vcc_release_async
+EXPORT_SYMBOL net/atm/atm 0xb24bdcce	atm_init_aal5
+EXPORT_SYMBOL net/atm/atm 0xbb39f9d9	atm_alloc_charge
+EXPORT_SYMBOL net/atm/atm 0xbf3fa6fc	register_atm_ioctl
+EXPORT_SYMBOL net/atm/atm 0xc44bc5e6	deregister_atm_ioctl
+EXPORT_SYMBOL net/atm/atm 0xcb36e918	atm_charge
+EXPORT_SYMBOL net/atm/atm 0xf49bc67a	atm_pcr_goal
+EXPORT_SYMBOL net/atm/atm 0xff3011a8	atm_dev_register
+EXPORT_SYMBOL net/bridge/bridge 0xe3d70749	br_should_route_hook
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x050078bb	ebt_do_table
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x1715969a	ebt_register_table
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x4a586dae	ebt_unregister_table
+EXPORT_SYMBOL net/can/can 0x3872be93	can_proto_unregister
+EXPORT_SYMBOL net/can/can 0x51c896d0	can_rx_register
+EXPORT_SYMBOL net/can/can 0x55078541	can_send
+EXPORT_SYMBOL net/can/can 0xb38e54bd	can_rx_unregister
+EXPORT_SYMBOL net/can/can 0xbd603567	can_proto_register
+EXPORT_SYMBOL net/ieee802154/nl802154 0x0407ad42	ieee802154_nl_disassoc_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0x4ac4756f	ieee802154_nl_scan_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0x55b6c280	ieee802154_nl_beacon_indic
+EXPORT_SYMBOL net/ieee802154/nl802154 0x7ef5f1eb	ieee802154_nl_assoc_indic
+EXPORT_SYMBOL net/ieee802154/nl802154 0xab80d45b	ieee802154_nl_start_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0xdc79dc5c	ieee802154_nl_assoc_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0xed86916e	ieee802154_nl_disassoc_indic
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x280b0837	wpan_phy_register
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x44985952	wpan_phy_unregister
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x663edf8a	wpan_phy_free
+EXPORT_SYMBOL net/ieee802154/wpan-class 0xb464a4c1	wpan_phy_find
+EXPORT_SYMBOL net/ieee802154/wpan-class 0xb5e60f7d	wpan_phy_alloc
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x59949155	arpt_register_table
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xb0961d2f	arpt_do_table
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xe146fa6a	arpt_unregister_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x4082f818	ipt_unregister_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0xcbbf4cd5	ipt_do_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0xd0aae863	ipt_register_table
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x145aac92	nf_nat_mangle_udp_packet
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x1c91bbc3	nf_nat_used_tuple
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x26651b81	nf_nat_follow_master
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x75124c14	nf_nat_protocol_register
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x7ecea06f	nf_nat_mangle_tcp_packet
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x917c2321	nf_nat_setup_info
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xaf7872ea	nf_nat_protocol_unregister
+EXPORT_SYMBOL net/ipv4/tunnel4 0x1e16f494	xfrm4_tunnel_register
+EXPORT_SYMBOL net/ipv4/tunnel4 0x41f27f7a	xfrm4_tunnel_deregister
+EXPORT_SYMBOL net/ipv6/ipv6 0x0b0d888b	icmpv6_err_convert
+EXPORT_SYMBOL net/ipv6/ipv6 0x13135c97	ipv6_dev_get_saddr
+EXPORT_SYMBOL net/ipv6/ipv6 0x1def2b64	compat_ipv6_getsockopt
+EXPORT_SYMBOL net/ipv6/ipv6 0x25c55d83	xfrm6_rcv
+EXPORT_SYMBOL net/ipv6/ipv6 0x28bf098c	inet6_register_protosw
+EXPORT_SYMBOL net/ipv6/ipv6 0x2a090ee1	ipv6_getsockopt
+EXPORT_SYMBOL net/ipv6/ipv6 0x30123eb5	icmpv6_statistics
+EXPORT_SYMBOL net/ipv6/ipv6 0x323208ff	compat_ipv6_setsockopt
+EXPORT_SYMBOL net/ipv6/ipv6 0x37f7e96b	inet6_bind
+EXPORT_SYMBOL net/ipv6/ipv6 0x3dcdf0ec	ndisc_build_skb
+EXPORT_SYMBOL net/ipv6/ipv6 0x47cdf7bc	ndisc_send_skb
+EXPORT_SYMBOL net/ipv6/ipv6 0x4ba3772a	xfrm6_input_addr
+EXPORT_SYMBOL net/ipv6/ipv6 0x4f2ae445	inet6_del_protocol
+EXPORT_SYMBOL net/ipv6/ipv6 0x5251236b	inet6_ioctl
+EXPORT_SYMBOL net/ipv6/ipv6 0x538383c0	unregister_inet6addr_notifier
+EXPORT_SYMBOL net/ipv6/ipv6 0x5682407d	inet6_getname
+EXPORT_SYMBOL net/ipv6/ipv6 0x67eb3700	xfrm6_find_1stfragopt
+EXPORT_SYMBOL net/ipv6/ipv6 0x68564939	nf_ip6_checksum
+EXPORT_SYMBOL net/ipv6/ipv6 0x6c950b96	rt6_lookup
+EXPORT_SYMBOL net/ipv6/ipv6 0x740dfaf6	ndisc_mc_map
+EXPORT_SYMBOL net/ipv6/ipv6 0x7515ab48	ipv6_setsockopt
+EXPORT_SYMBOL net/ipv6/ipv6 0x77eff6db	xfrm6_prepare_output
+EXPORT_SYMBOL net/ipv6/ipv6 0x794f85ce	ipv6_chk_prefix
+EXPORT_SYMBOL net/ipv6/ipv6 0x7d7efa80	inet6_release
+EXPORT_SYMBOL net/ipv6/ipv6 0x83b9af13	ipv6_chk_addr
+EXPORT_SYMBOL net/ipv6/ipv6 0x8e3f2757	ip6_xmit
+EXPORT_SYMBOL net/ipv6/ipv6 0x93eaab2b	ip6_frag_match
+EXPORT_SYMBOL net/ipv6/ipv6 0xa2e71b70	inet6_add_protocol
+EXPORT_SYMBOL net/ipv6/ipv6 0xa3606eb7	inet6_unregister_protosw
+EXPORT_SYMBOL net/ipv6/ipv6 0xa5b08049	ip6_route_output
+EXPORT_SYMBOL net/ipv6/ipv6 0xa765ed93	ipv6_push_nfrag_opts
+EXPORT_SYMBOL net/ipv6/ipv6 0xb92b8187	icmpv6_send
+EXPORT_SYMBOL net/ipv6/ipv6 0xc3781942	xfrm6_rcv_spi
+EXPORT_SYMBOL net/ipv6/ipv6 0xc73a713a	ip6_frag_init
+EXPORT_SYMBOL net/ipv6/ipv6 0xce19bac5	register_inet6addr_notifier
+EXPORT_SYMBOL net/ipv6/ipv6 0xe1a81c3a	icmpv6msg_statistics
+EXPORT_SYMBOL net/ipv6/ipv6 0xe607eb73	in6_dev_finish_destroy
+EXPORT_SYMBOL net/ipv6/ipv6 0xe690b8fd	__ipv6_isatap_ifid
+EXPORT_SYMBOL net/ipv6/ipv6 0xed6222f2	ip6_route_me_harder
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x5ac9ce88	ip6t_do_table
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x91522a38	ip6t_register_table
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xb8bddf33	ip6t_ext_hdr
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xecde25dd	ip6t_unregister_table
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xf38aa321	ipv6_find_hdr
+EXPORT_SYMBOL net/ipv6/tunnel6 0x34594aea	xfrm6_tunnel_deregister
+EXPORT_SYMBOL net/ipv6/tunnel6 0x6d995adb	xfrm6_tunnel_register
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0x9cd013f2	xfrm6_tunnel_alloc_spi
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xab14e193	xfrm6_tunnel_free_spi
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xdb1b42d1	xfrm6_tunnel_spi_lookup
+EXPORT_SYMBOL net/llc/llc 0x38b92846	llc_remove_pack
+EXPORT_SYMBOL net/llc/llc 0x38dee7e6	llc_build_and_send_ui_pkt
+EXPORT_SYMBOL net/llc/llc 0x52d7b2fd	llc_sap_list
+EXPORT_SYMBOL net/llc/llc 0x5f69c2db	llc_sap_list_lock
+EXPORT_SYMBOL net/llc/llc 0x61ccf8bc	llc_sap_find
+EXPORT_SYMBOL net/llc/llc 0x672cfdd7	llc_set_station_handler
+EXPORT_SYMBOL net/llc/llc 0x7fab398a	llc_sap_close
+EXPORT_SYMBOL net/llc/llc 0xabdb5c4b	llc_mac_hdr_init
+EXPORT_SYMBOL net/llc/llc 0xafad66c2	llc_add_pack
+EXPORT_SYMBOL net/llc/llc 0xe4ff8651	llc_sap_open
+EXPORT_SYMBOL net/mac80211/mac80211 0x0fb1a35e	ieee80211_queue_stopped
+EXPORT_SYMBOL net/mac80211/mac80211 0x1ab7d65a	ieee80211_stop_queues
+EXPORT_SYMBOL net/mac80211/mac80211 0x20811074	ieee80211_free_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x240a8b13	ieee80211_scan_completed
+EXPORT_SYMBOL net/mac80211/mac80211 0x241be634	ieee80211_stop_tx_ba_session
+EXPORT_SYMBOL net/mac80211/mac80211 0x272c3749	ieee80211_rx
+EXPORT_SYMBOL net/mac80211/mac80211 0x48e2f72f	ieee80211_stop_tx_ba_cb_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0x4c73ba68	wiphy_to_ieee80211_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x547f5d93	ieee80211_rx_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0x58132d7b	ieee80211_ctstoself_get
+EXPORT_SYMBOL net/mac80211/mac80211 0x598005c2	ieee80211_wake_queues
+EXPORT_SYMBOL net/mac80211/mac80211 0x599d87c1	ieee80211_rate_control_register
+EXPORT_SYMBOL net/mac80211/mac80211 0x5a93700a	ieee80211_tx_status
+EXPORT_SYMBOL net/mac80211/mac80211 0x5b4a6eca	ieee80211_rts_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0x5d576705	ieee80211_start_tx_ba_cb_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0x685ed06a	ieee80211_restart_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x6b28d63c	ieee80211_stop_tx_ba_cb
+EXPORT_SYMBOL net/mac80211/mac80211 0x6b97d807	ieee80211_unregister_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x80966912	ieee80211_start_tx_ba_session
+EXPORT_SYMBOL net/mac80211/mac80211 0x81a4a453	ieee80211_beacon_get
+EXPORT_SYMBOL net/mac80211/mac80211 0x981f56b4	ieee80211_tx_status_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0x983b767b	ieee80211_queue_delayed_work
+EXPORT_SYMBOL net/mac80211/mac80211 0x9ccf5701	__ieee80211_get_radio_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0xa3b7078c	ieee80211_start_tx_ba_cb
+EXPORT_SYMBOL net/mac80211/mac80211 0xb0e13fe9	__ieee80211_get_tx_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0xb3d06be5	ieee80211_register_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xb54e000f	ieee80211_find_sta
+EXPORT_SYMBOL net/mac80211/mac80211 0xb9e4868d	ieee80211_get_tkip_key
+EXPORT_SYMBOL net/mac80211/mac80211 0xbb77eddb	ieee80211_queue_work
+EXPORT_SYMBOL net/mac80211/mac80211 0xcbe9abaf	ieee80211_ctstoself_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0xcdd407ee	ieee80211_wake_queue
+EXPORT_SYMBOL net/mac80211/mac80211 0xd526b02a	ieee80211_alloc_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xd8f20f63	rate_control_send_low
+EXPORT_SYMBOL net/mac80211/mac80211 0xdac184aa	ieee80211_get_buffered_bc
+EXPORT_SYMBOL net/mac80211/mac80211 0xdc221eef	ieee80211_rate_control_unregister
+EXPORT_SYMBOL net/mac80211/mac80211 0xe233929b	ieee80211_stop_queue
+EXPORT_SYMBOL net/mac80211/mac80211 0xe5aca8a5	__ieee80211_get_rx_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0xe7e0d3ec	__ieee80211_get_assoc_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0xe8abe42d	ieee80211_beacon_loss
+EXPORT_SYMBOL net/mac80211/mac80211 0xeb148781	ieee80211_generic_frame_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0xfdcdc071	ieee80211_rts_get
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x1c38f969	ip_vs_conn_put
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x205e0084	register_ip_vs_app_inc
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x2245bd46	register_ip_vs_scheduler
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x507a6e9e	ip_vs_tcp_conn_listen
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x88a12977	ip_vs_conn_out_get
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x8c74b3d0	register_ip_vs_app
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x8dcf21a6	ip_vs_skb_replace
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xa1dbc2d8	ip_vs_proto_name
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xb3625d49	ip_vs_conn_in_get
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xb6a6c91b	ip_vs_conn_new
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xc9ba5892	unregister_ip_vs_scheduler
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xf218fb92	unregister_ip_vs_app
+EXPORT_SYMBOL net/netfilter/nf_conntrack 0xe658833b	__nf_ct_ext_destroy
+EXPORT_SYMBOL net/netfilter/nf_conntrack 0xf1e263a8	__nf_ct_ext_add
+EXPORT_SYMBOL net/netfilter/nf_conntrack_proto_gre 0x442add1f	nf_ct_gre_keymap_flush
+EXPORT_SYMBOL net/netfilter/x_tables 0x081b25e7	xt_register_match
+EXPORT_SYMBOL net/netfilter/x_tables 0x131c23ba	xt_unregister_targets
+EXPORT_SYMBOL net/netfilter/x_tables 0x16a5e826	xt_free_table_info
+EXPORT_SYMBOL net/netfilter/x_tables 0x24188fd5	xt_register_target
+EXPORT_SYMBOL net/netfilter/x_tables 0x48e29fe6	xt_find_target
+EXPORT_SYMBOL net/netfilter/x_tables 0x4989d274	xt_unregister_matches
+EXPORT_SYMBOL net/netfilter/x_tables 0x4da3ba77	xt_register_matches
+EXPORT_SYMBOL net/netfilter/x_tables 0x5d849aa6	xt_unregister_match
+EXPORT_SYMBOL net/netfilter/x_tables 0xc23f16ac	xt_find_match
+EXPORT_SYMBOL net/netfilter/x_tables 0xc3ff5dff	xt_alloc_table_info
+EXPORT_SYMBOL net/netfilter/x_tables 0xcf63b8ce	xt_register_targets
+EXPORT_SYMBOL net/netfilter/x_tables 0xea921d85	xt_unregister_target
+EXPORT_SYMBOL net/phonet/phonet 0x10786fbb	phonet_proto_unregister
+EXPORT_SYMBOL net/phonet/phonet 0x17795a83	phonet_stream_ops
+EXPORT_SYMBOL net/phonet/phonet 0x428e7d50	pn_sock_get_port
+EXPORT_SYMBOL net/phonet/phonet 0x73b1beab	pn_sock_unhash
+EXPORT_SYMBOL net/phonet/phonet 0x7aa7fae3	pn_sock_hash
+EXPORT_SYMBOL net/phonet/phonet 0xabee397d	phonet_proto_register
+EXPORT_SYMBOL net/phonet/phonet 0xd8922981	phonet_header_ops
+EXPORT_SYMBOL net/phonet/phonet 0xefefe64c	pn_skb_send
+EXPORT_SYMBOL net/rfkill/rfkill 0x0021364a	rfkill_alloc
+EXPORT_SYMBOL net/rfkill/rfkill 0x0ae368c3	rfkill_destroy
+EXPORT_SYMBOL net/rfkill/rfkill 0x2ace7b1a	rfkill_set_sw_state
+EXPORT_SYMBOL net/rfkill/rfkill 0x2f6f9db1	rfkill_register
+EXPORT_SYMBOL net/rfkill/rfkill 0x33e0a12a	rfkill_get_led_trigger_name
+EXPORT_SYMBOL net/rfkill/rfkill 0x4579d5f7	rfkill_unregister
+EXPORT_SYMBOL net/rfkill/rfkill 0x5ff3cf13	rfkill_pause_polling
+EXPORT_SYMBOL net/rfkill/rfkill 0x659c813e	rfkill_set_hw_state
+EXPORT_SYMBOL net/rfkill/rfkill 0x7a88130a	rfkill_init_sw_state
+EXPORT_SYMBOL net/rfkill/rfkill 0x8bf2f28b	rfkill_set_led_trigger_name
+EXPORT_SYMBOL net/rfkill/rfkill 0x8f7e286a	rfkill_resume_polling
+EXPORT_SYMBOL net/rfkill/rfkill 0xaed76af4	rfkill_blocked
+EXPORT_SYMBOL net/rfkill/rfkill 0xf2b54e01	rfkill_set_states
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x15a68e3e	rxrpc_kernel_abort_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x1e2e149f	rxrpc_get_null_key
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x25c0bafe	rxrpc_kernel_end_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x7bbd9c8b	rxrpc_get_server_data_key
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x85b2f571	rxrpc_kernel_begin_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x8e2091f3	key_type_rxrpc
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x99d79ae4	rxrpc_kernel_reject_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xa3fa4313	rxrpc_kernel_accept_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xd2bf72a5	rxrpc_kernel_get_abort_code
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xd47150b7	rxrpc_kernel_data_delivered
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xe26f558b	rxrpc_kernel_intercept_rx_messages
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xea4a7338	rxrpc_kernel_free_skb
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xee90be18	rxrpc_kernel_get_error_number
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xef86f998	rxrpc_kernel_send_data
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xf8d528e5	rxrpc_kernel_is_data_last
+EXPORT_SYMBOL net/sunrpc/sunrpc 0x77de6fa1	svc_pool_stats_open
+EXPORT_SYMBOL net/tipc/tipc 0x08acf310	tipc_available_nodes
+EXPORT_SYMBOL net/tipc/tipc 0x0b074a7b	tipc_multicast
+EXPORT_SYMBOL net/tipc/tipc 0x10d40fcd	tipc_isconnected
+EXPORT_SYMBOL net/tipc/tipc 0x124b5a83	tipc_send_buf_fast
+EXPORT_SYMBOL net/tipc/tipc 0x12b84474	tipc_recv_msg
+EXPORT_SYMBOL net/tipc/tipc 0x1472b270	tipc_disconnect
+EXPORT_SYMBOL net/tipc/tipc 0x1479cb03	tipc_deleteport
+EXPORT_SYMBOL net/tipc/tipc 0x15b5ecde	tipc_set_portunreliable
+EXPORT_SYMBOL net/tipc/tipc 0x16f27683	tipc_block_bearer
+EXPORT_SYMBOL net/tipc/tipc 0x23daecbd	tipc_send
+EXPORT_SYMBOL net/tipc/tipc 0x259b74f9	tipc_acknowledge
+EXPORT_SYMBOL net/tipc/tipc 0x2a504a1b	tipc_send_buf2name
+EXPORT_SYMBOL net/tipc/tipc 0x310d1bc9	tipc_detach
+EXPORT_SYMBOL net/tipc/tipc 0x3712e340	tipc_portunreliable
+EXPORT_SYMBOL net/tipc/tipc 0x3923a1eb	tipc_send_buf2port
+EXPORT_SYMBOL net/tipc/tipc 0x3976041f	tipc_set_portimportance
+EXPORT_SYMBOL net/tipc/tipc 0x419b02fc	tipc_send2port
+EXPORT_SYMBOL net/tipc/tipc 0x493f4148	tipc_createport_raw
+EXPORT_SYMBOL net/tipc/tipc 0x495800c1	tipc_register_media
+EXPORT_SYMBOL net/tipc/tipc 0x4b2243c6	tipc_portimportance
+EXPORT_SYMBOL net/tipc/tipc 0x538b228a	tipc_withdraw
+EXPORT_SYMBOL net/tipc/tipc 0x5637ed44	tipc_get_mode
+EXPORT_SYMBOL net/tipc/tipc 0x5c0d4b5c	tipc_ref_valid
+EXPORT_SYMBOL net/tipc/tipc 0x62a681a3	tipc_portunreturnable
+EXPORT_SYMBOL net/tipc/tipc 0x6d64d0c8	tipc_reject_msg
+EXPORT_SYMBOL net/tipc/tipc 0x6e5c43d5	tipc_forward_buf2name
+EXPORT_SYMBOL net/tipc/tipc 0x6ee4cb03	tipc_send_buf
+EXPORT_SYMBOL net/tipc/tipc 0x88b73627	tipc_get_addr
+EXPORT_SYMBOL net/tipc/tipc 0x9c45558e	tipc_enable_bearer
+EXPORT_SYMBOL net/tipc/tipc 0xa1b42d32	tipc_forward2port
+EXPORT_SYMBOL net/tipc/tipc 0xadd203d0	tipc_connect2port
+EXPORT_SYMBOL net/tipc/tipc 0xae0103c3	tipc_shutdown
+EXPORT_SYMBOL net/tipc/tipc 0xaf37f87d	tipc_continue
+EXPORT_SYMBOL net/tipc/tipc 0xb1f8eacc	tipc_send2name
+EXPORT_SYMBOL net/tipc/tipc 0xb35b672c	tipc_publish
+EXPORT_SYMBOL net/tipc/tipc 0xb3aa17ad	tipc_forward_buf2port
+EXPORT_SYMBOL net/tipc/tipc 0xcec8514a	tipc_set_portunreturnable
+EXPORT_SYMBOL net/tipc/tipc 0xcee290be	tipc_forward2name
+EXPORT_SYMBOL net/tipc/tipc 0xd0037e9d	tipc_createport
+EXPORT_SYMBOL net/tipc/tipc 0xd44731e5	tipc_ownidentity
+EXPORT_SYMBOL net/tipc/tipc 0xd81f72e4	tipc_get_port
+EXPORT_SYMBOL net/tipc/tipc 0xda7f9d3f	tipc_attach
+EXPORT_SYMBOL net/tipc/tipc 0xdf5008fc	tipc_peer
+EXPORT_SYMBOL net/tipc/tipc 0xe7aece47	tipc_ispublished
+EXPORT_SYMBOL net/tipc/tipc 0xeefd49b3	tipc_get_handle
+EXPORT_SYMBOL net/tipc/tipc 0xef50a1ef	tipc_disable_bearer
+EXPORT_SYMBOL net/wimax/wimax 0x2711fefb	wimax_rfkill
+EXPORT_SYMBOL net/wimax/wimax 0x92dc6549	wimax_reset
+EXPORT_SYMBOL net/wireless/cfg80211 0x07599873	cfg80211_disconnected
+EXPORT_SYMBOL net/wireless/cfg80211 0x07e7ac5a	ieee80211_radiotap_iterator_init
+EXPORT_SYMBOL net/wireless/cfg80211 0x09c64fbd	ieee80211_frequency_to_channel
+EXPORT_SYMBOL net/wireless/cfg80211 0x1879fcbd	bridge_tunnel_header
+EXPORT_SYMBOL net/wireless/cfg80211 0x1aa4883a	cfg80211_send_rx_auth
+EXPORT_SYMBOL net/wireless/cfg80211 0x1f375c26	freq_reg_info
+EXPORT_SYMBOL net/wireless/cfg80211 0x28cd72b8	ieee80211_get_hdrlen_from_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0x2e9fbe16	ieee80211_data_from_8023
+EXPORT_SYMBOL net/wireless/cfg80211 0x33c6dda2	wiphy_apply_custom_regulatory
+EXPORT_SYMBOL net/wireless/cfg80211 0x37ac8d05	ieee80211_get_response_rate
+EXPORT_SYMBOL net/wireless/cfg80211 0x48cd375d	ieee80211_data_to_8023
+EXPORT_SYMBOL net/wireless/cfg80211 0x4c0288ac	regulatory_hint
+EXPORT_SYMBOL net/wireless/cfg80211 0x4cc2983b	wiphy_free
+EXPORT_SYMBOL net/wireless/cfg80211 0x50f8f611	cfg80211_get_mesh
+EXPORT_SYMBOL net/wireless/cfg80211 0x51a30ff9	cfg80211_classify8021d
+EXPORT_SYMBOL net/wireless/cfg80211 0x56215ecc	wiphy_rfkill_start_polling
+EXPORT_SYMBOL net/wireless/cfg80211 0x5ae7ec2f	cfg80211_inform_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0x5b3e973a	cfg80211_send_disassoc
+EXPORT_SYMBOL net/wireless/cfg80211 0x5e995ecb	cfg80211_send_deauth
+EXPORT_SYMBOL net/wireless/cfg80211 0x5f3bae7d	cfg80211_michael_mic_failure
+EXPORT_SYMBOL net/wireless/cfg80211 0x69b18f43	rfc1042_header
+EXPORT_SYMBOL net/wireless/cfg80211 0x6e0bd3e8	wiphy_new
+EXPORT_SYMBOL net/wireless/cfg80211 0x70d91f0a	cfg80211_scan_done
+EXPORT_SYMBOL net/wireless/cfg80211 0x7c3fddc1	ieee80211_bss_get_ie
+EXPORT_SYMBOL net/wireless/cfg80211 0x7e70bb11	cfg80211_connect_result
+EXPORT_SYMBOL net/wireless/cfg80211 0x86e9215a	wiphy_register
+EXPORT_SYMBOL net/wireless/cfg80211 0x89bd19e2	cfg80211_roamed
+EXPORT_SYMBOL net/wireless/cfg80211 0x8c35d732	ieee80211_hdrlen
+EXPORT_SYMBOL net/wireless/cfg80211 0x9ad84fb9	cfg80211_testmode_alloc_reply_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0x9b59c61c	cfg80211_get_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0xa580d850	cfg80211_testmode_alloc_event_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0xa712c326	cfg80211_send_assoc_timeout
+EXPORT_SYMBOL net/wireless/cfg80211 0xb0baae7f	cfg80211_ibss_joined
+EXPORT_SYMBOL net/wireless/cfg80211 0xb2ed57c0	cfg80211_send_rx_assoc
+EXPORT_SYMBOL net/wireless/cfg80211 0xb51189f8	cfg80211_unlink_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0xc4e85ec5	ieee80211_radiotap_iterator_next
+EXPORT_SYMBOL net/wireless/cfg80211 0xcaf5eda5	cfg80211_send_auth_timeout
+EXPORT_SYMBOL net/wireless/cfg80211 0xccc291b3	ieee80211_channel_to_frequency
+EXPORT_SYMBOL net/wireless/cfg80211 0xde7ff2a1	cfg80211_inform_bss_frame
+EXPORT_SYMBOL net/wireless/cfg80211 0xe0816b12	wiphy_rfkill_set_hw_state
+EXPORT_SYMBOL net/wireless/cfg80211 0xe49f8244	cfg80211_put_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0xe67a8661	cfg80211_testmode_event
+EXPORT_SYMBOL net/wireless/cfg80211 0xeb0182df	__ieee80211_get_channel
+EXPORT_SYMBOL net/wireless/cfg80211 0xf11de8b8	cfg80211_testmode_reply
+EXPORT_SYMBOL net/wireless/cfg80211 0xf606d81a	wiphy_rfkill_stop_polling
+EXPORT_SYMBOL net/wireless/cfg80211 0xf7af7e55	wiphy_unregister
+EXPORT_SYMBOL net/wireless/lib80211 0x0c47ad45	lib80211_register_crypto_ops
+EXPORT_SYMBOL net/wireless/lib80211 0x230f3ffb	lib80211_crypt_deinit_handler
+EXPORT_SYMBOL net/wireless/lib80211 0x2d0f99e5	print_ssid
+EXPORT_SYMBOL net/wireless/lib80211 0x32ab74f9	lib80211_crypt_info_init
+EXPORT_SYMBOL net/wireless/lib80211 0x46d752f6	lib80211_unregister_crypto_ops
+EXPORT_SYMBOL net/wireless/lib80211 0x4be82a1a	lib80211_crypt_delayed_deinit
+EXPORT_SYMBOL net/wireless/lib80211 0x678e1518	lib80211_crypt_info_free
+EXPORT_SYMBOL net/wireless/lib80211 0x8cc4ff98	lib80211_crypt_quiescing
+EXPORT_SYMBOL net/wireless/lib80211 0xaee54c4c	lib80211_get_crypto_ops
+EXPORT_SYMBOL net/wireless/lib80211 0xcb5f591d	lib80211_crypt_deinit_entries
+EXPORT_SYMBOL sound/ac97_bus 0xe53fe246	ac97_bus_type
+EXPORT_SYMBOL sound/core/oss/snd-mixer-oss 0x9969df29	snd_mixer_oss_ioctl_card
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x158a9c4f	snd_seq_kernel_client_enqueue_blocking
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x1a724fcc	snd_seq_kernel_client_ctl
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x3fb4d161	snd_seq_kernel_client_dispatch
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x6bb71038	snd_seq_delete_kernel_client
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x7ac2f329	snd_seq_expand_var_event
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x7b8699eb	snd_seq_event_port_detach
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x89947013	snd_use_lock_sync_helper
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x9f37d23a	snd_seq_create_kernel_client
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xb8e448a0	snd_seq_set_queue_tempo
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xcac0a3be	snd_seq_kernel_client_enqueue
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xe8a2739e	snd_seq_event_port_attach
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xe934da1d	snd_seq_dump_var_event
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xfa455443	snd_seq_kernel_client_write_poll
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x1f523156	snd_seq_device_new
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x2ccc4828	snd_seq_device_register_driver
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x3a57f235	snd_seq_autoload_unlock
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x6339b6d0	snd_seq_device_load_drivers
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xb90668b2	snd_seq_autoload_lock
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xc622fb29	snd_seq_device_unregister_driver
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x6ea09972	snd_midi_channel_alloc_set
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x833a3e07	snd_midi_channel_set_clear
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xb9948d2c	snd_midi_channel_free_set
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xf0a1fdb3	snd_midi_process_event
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x22b99667	snd_midi_event_new
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x42a6fdda	snd_midi_event_reset_encode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x48f7eed6	snd_midi_event_free
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x521cf955	snd_midi_event_no_status
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x81942dc7	snd_midi_event_reset_decode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x8c05c55e	snd_midi_event_encode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xd7f93dcb	snd_midi_event_decode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xed92fb9a	snd_midi_event_encode_byte
+EXPORT_SYMBOL sound/core/seq/snd-seq-virmidi 0x5d333cd4	snd_virmidi_new
+EXPORT_SYMBOL sound/core/snd 0x044fead1	snd_card_free_when_closed
+EXPORT_SYMBOL sound/core/snd 0x0499cc5a	snd_ctl_remove
+EXPORT_SYMBOL sound/core/snd 0x1868c74c	snd_ctl_rename_id
+EXPORT_SYMBOL sound/core/snd 0x18ac0313	snd_ctl_unregister_ioctl_compat
+EXPORT_SYMBOL sound/core/snd 0x191afed8	snd_card_register
+EXPORT_SYMBOL sound/core/snd 0x198788b4	snd_lookup_oss_minor_data
+EXPORT_SYMBOL sound/core/snd 0x1b16edcd	snd_ctl_add
+EXPORT_SYMBOL sound/core/snd 0x1e8f7823	snd_card_file_add
+EXPORT_SYMBOL sound/core/snd 0x1f58242d	snd_device_free
+EXPORT_SYMBOL sound/core/snd 0x1fdca98d	snd_ctl_find_numid
+EXPORT_SYMBOL sound/core/snd 0x24a94b26	snd_info_get_line
+EXPORT_SYMBOL sound/core/snd 0x265fff5b	snd_ctl_register_ioctl_compat
+EXPORT_SYMBOL sound/core/snd 0x2ae3deaa	release_and_free_resource
+EXPORT_SYMBOL sound/core/snd 0x3085f9d9	snd_card_free
+EXPORT_SYMBOL sound/core/snd 0x35695d7c	snd_ctl_remove_id
+EXPORT_SYMBOL sound/core/snd 0x3971b4df	snd_ecards_limit
+EXPORT_SYMBOL sound/core/snd 0x424b9c19	snd_ctl_free_one
+EXPORT_SYMBOL sound/core/snd 0x426b1dd6	snd_ctl_make_virtual_master
+EXPORT_SYMBOL sound/core/snd 0x479b4d4f	snd_ctl_unregister_ioctl
+EXPORT_SYMBOL sound/core/snd 0x4a3ea5c0	snd_request_card
+EXPORT_SYMBOL sound/core/snd 0x518bb7f8	copy_from_user_toio
+EXPORT_SYMBOL sound/core/snd 0x5751f461	snd_ctl_boolean_mono_info
+EXPORT_SYMBOL sound/core/snd 0x584d95f1	snd_add_device_sysfs_file
+EXPORT_SYMBOL sound/core/snd 0x5d7e4263	snd_cards
+EXPORT_SYMBOL sound/core/snd 0x63dde881	snd_card_create
+EXPORT_SYMBOL sound/core/snd 0x65c90c06	snd_ctl_boolean_stereo_info
+EXPORT_SYMBOL sound/core/snd 0x73e80964	snd_jack_report
+EXPORT_SYMBOL sound/core/snd 0x744bc23b	snd_ctl_find_id
+EXPORT_SYMBOL sound/core/snd 0x7560c174	snd_pci_quirk_lookup
+EXPORT_SYMBOL sound/core/snd 0x7b91d2a6	snd_device_new
+EXPORT_SYMBOL sound/core/snd 0x824c8f2e	snd_ctl_new1
+EXPORT_SYMBOL sound/core/snd 0x8ada0adc	snd_register_device_for_dev
+EXPORT_SYMBOL sound/core/snd 0x8b4cc267	snd_ctl_notify
+EXPORT_SYMBOL sound/core/snd 0x8df3789f	snd_oss_info_register
+EXPORT_SYMBOL sound/core/snd 0x8f595b11	snd_major
+EXPORT_SYMBOL sound/core/snd 0x927749fb	snd_info_register
+EXPORT_SYMBOL sound/core/snd 0x9e6d79f8	snd_info_get_str
+EXPORT_SYMBOL sound/core/snd 0xa2c9a4bf	snd_card_proc_new
+EXPORT_SYMBOL sound/core/snd 0xa82bd016	snd_seq_root
+EXPORT_SYMBOL sound/core/snd 0xa895aa7c	snd_mixer_oss_notify_callback
+EXPORT_SYMBOL sound/core/snd 0xb2e5ae4a	snd_lookup_minor_data
+EXPORT_SYMBOL sound/core/snd 0xb4600d51	snd_unregister_device
+EXPORT_SYMBOL sound/core/snd 0xb669c882	_snd_ctl_add_slave
+EXPORT_SYMBOL sound/core/snd 0xbaf48a15	snd_card_file_remove
+EXPORT_SYMBOL sound/core/snd 0xbbd4514a	snd_jack_set_parent
+EXPORT_SYMBOL sound/core/snd 0xc07394ea	snd_info_create_card_entry
+EXPORT_SYMBOL sound/core/snd 0xc2ca983f	snd_component_add
+EXPORT_SYMBOL sound/core/snd 0xd5081295	snd_device_register
+EXPORT_SYMBOL sound/core/snd 0xd50dcc48	snd_register_oss_device
+EXPORT_SYMBOL sound/core/snd 0xdc6ffe4f	snd_jack_new
+EXPORT_SYMBOL sound/core/snd 0xe09f7ed6	snd_card_disconnect
+EXPORT_SYMBOL sound/core/snd 0xe148c1dc	snd_unregister_oss_device
+EXPORT_SYMBOL sound/core/snd 0xe20c9214	snd_iprintf
+EXPORT_SYMBOL sound/core/snd 0xe243dde3	copy_to_user_fromio
+EXPORT_SYMBOL sound/core/snd 0xe92840ec	snd_info_create_module_entry
+EXPORT_SYMBOL sound/core/snd 0xebd4836f	snd_info_free_entry
+EXPORT_SYMBOL sound/core/snd 0xebdc0c48	snd_card_set_id
+EXPORT_SYMBOL sound/core/snd 0xf33c199a	snd_ctl_register_ioctl
+EXPORT_SYMBOL sound/core/snd-hwdep 0xf5209bc6	snd_hwdep_new
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x19cc2ce3	snd_free_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x5dc86bdb	snd_dma_alloc_pages_fallback
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xafbd6f13	snd_dma_alloc_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xc6829020	snd_malloc_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xea03bb99	snd_dma_free_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xf23fe363	snd_dma_reserve_buf
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xfce9d091	snd_dma_get_reserved_buf
+EXPORT_SYMBOL sound/core/snd-pcm 0x00cea80b	snd_pcm_set_sync
+EXPORT_SYMBOL sound/core/snd-pcm 0x0283dfe3	_snd_pcm_hw_params_any
+EXPORT_SYMBOL sound/core/snd-pcm 0x04cda566	snd_interval_refine
+EXPORT_SYMBOL sound/core/snd-pcm 0x04efd520	snd_pcm_hw_param_first
+EXPORT_SYMBOL sound/core/snd-pcm 0x0bb6c18a	snd_pcm_lib_write
+EXPORT_SYMBOL sound/core/snd-pcm 0x10959ff6	snd_pcm_lib_ioctl
+EXPORT_SYMBOL sound/core/snd-pcm 0x1d027e4b	snd_pcm_format_signed
+EXPORT_SYMBOL sound/core/snd-pcm 0x2a703864	snd_pcm_hw_constraint_minmax
+EXPORT_SYMBOL sound/core/snd-pcm 0x2aa2c827	snd_pcm_hw_constraint_integer
+EXPORT_SYMBOL sound/core/snd-pcm 0x2e1ecd42	snd_pcm_new
+EXPORT_SYMBOL sound/core/snd-pcm 0x3796bdcc	snd_pcm_format_little_endian
+EXPORT_SYMBOL sound/core/snd-pcm 0x380d4a09	snd_pcm_lib_preallocate_free_for_all
+EXPORT_SYMBOL sound/core/snd-pcm 0x39bf9301	_snd_pcm_hw_param_setempty
+EXPORT_SYMBOL sound/core/snd-pcm 0x41333e8b	snd_pcm_hw_rule_add
+EXPORT_SYMBOL sound/core/snd-pcm 0x433fdcc4	snd_pcm_limit_hw_rates
+EXPORT_SYMBOL sound/core/snd-pcm 0x45771794	snd_pcm_hw_constraint_msbits
+EXPORT_SYMBOL sound/core/snd-pcm 0x47f683b8	snd_pcm_hw_constraint_list
+EXPORT_SYMBOL sound/core/snd-pcm 0x4f816e9b	snd_pcm_format_big_endian
+EXPORT_SYMBOL sound/core/snd-pcm 0x52e3e4a5	snd_pcm_hw_param_value
+EXPORT_SYMBOL sound/core/snd-pcm 0x53f09cf2	snd_pcm_hw_refine
+EXPORT_SYMBOL sound/core/snd-pcm 0x551345b0	snd_pcm_hw_constraint_ratnums
+EXPORT_SYMBOL sound/core/snd-pcm 0x5df3953e	snd_pcm_notify
+EXPORT_SYMBOL sound/core/snd-pcm 0x5e7f4920	snd_pcm_format_set_silence
+EXPORT_SYMBOL sound/core/snd-pcm 0x604d82ca	snd_pcm_lib_preallocate_pages_for_all
+EXPORT_SYMBOL sound/core/snd-pcm 0x650f8603	snd_pcm_format_silence_64
+EXPORT_SYMBOL sound/core/snd-pcm 0x68a24153	snd_pcm_format_physical_width
+EXPORT_SYMBOL sound/core/snd-pcm 0x6ef8fcd8	snd_pcm_format_linear
+EXPORT_SYMBOL sound/core/snd-pcm 0x85922faf	snd_pcm_new_stream
+EXPORT_SYMBOL sound/core/snd-pcm 0x88a0a078	snd_pcm_lib_readv
+EXPORT_SYMBOL sound/core/snd-pcm 0x8eecd957	snd_pcm_set_ops
+EXPORT_SYMBOL sound/core/snd-pcm 0x939f52bd	snd_pcm_kernel_ioctl
+EXPORT_SYMBOL sound/core/snd-pcm 0x98d7eb5b	snd_pcm_lib_free_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0x9d37edd4	snd_pcm_period_elapsed
+EXPORT_SYMBOL sound/core/snd-pcm 0xa1f8566d	snd_pcm_hw_constraint_pow2
+EXPORT_SYMBOL sound/core/snd-pcm 0xa615cf15	snd_pcm_hw_constraint_step
+EXPORT_SYMBOL sound/core/snd-pcm 0xa61aa028	snd_pcm_format_unsigned
+EXPORT_SYMBOL sound/core/snd-pcm 0xb47e2d3d	snd_pcm_link_rwlock
+EXPORT_SYMBOL sound/core/snd-pcm 0xb87c52bb	snd_pcm_stop
+EXPORT_SYMBOL sound/core/snd-pcm 0xb9638db4	snd_pcm_rate_to_rate_bit
+EXPORT_SYMBOL sound/core/snd-pcm 0xbdff8f82	snd_pcm_release_substream
+EXPORT_SYMBOL sound/core/snd-pcm 0xc3797019	snd_pcm_mmap_data
+EXPORT_SYMBOL sound/core/snd-pcm 0xd0b9b8b8	snd_interval_list
+EXPORT_SYMBOL sound/core/snd-pcm 0xd48c5628	snd_pcm_lib_malloc_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0xd71fd203	snd_pcm_hw_constraint_ratdens
+EXPORT_SYMBOL sound/core/snd-pcm 0xd946bc4f	snd_pcm_lib_preallocate_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0xe1bff8a1	snd_pcm_lib_writev
+EXPORT_SYMBOL sound/core/snd-pcm 0xe2369e67	snd_pcm_lib_read
+EXPORT_SYMBOL sound/core/snd-pcm 0xe51a1c64	snd_pcm_format_size
+EXPORT_SYMBOL sound/core/snd-pcm 0xe56a9336	snd_pcm_format_width
+EXPORT_SYMBOL sound/core/snd-pcm 0xf3797152	snd_interval_ratnum
+EXPORT_SYMBOL sound/core/snd-pcm 0xf4d0e61f	snd_pcm_hw_param_last
+EXPORT_SYMBOL sound/core/snd-pcm 0xfd95bfbf	snd_pcm_open_substream
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x0b51a0ef	snd_rawmidi_drain_output
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x1d24745f	snd_rawmidi_kernel_write
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x21f04d36	snd_rawmidi_transmit_empty
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x31d52a69	snd_rawmidi_drain_input
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x371cd0ed	snd_rawmidi_info_select
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x4a138936	snd_rawmidi_output_params
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x6336bcb7	snd_rawmidi_new
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xa22d4aa5	snd_rawmidi_receive
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xaf43b68c	snd_rawmidi_drop_output
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xb09ebcce	snd_rawmidi_kernel_open
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xb23396e6	snd_rawmidi_transmit
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xb86d79c1	snd_rawmidi_set_ops
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xbe437af7	snd_rawmidi_transmit_peek
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xbf3283dc	snd_rawmidi_kernel_release
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xc6aa7402	snd_rawmidi_input_params
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xe8a93b61	snd_rawmidi_transmit_ack
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xffef7314	snd_rawmidi_kernel_read
+EXPORT_SYMBOL sound/core/snd-timer 0x0442bc99	snd_timer_global_register
+EXPORT_SYMBOL sound/core/snd-timer 0x4f2c5c58	snd_timer_stop
+EXPORT_SYMBOL sound/core/snd-timer 0x5c6b1775	snd_timer_resolution
+EXPORT_SYMBOL sound/core/snd-timer 0x63e7f404	snd_timer_global_new
+EXPORT_SYMBOL sound/core/snd-timer 0x6a4fc617	snd_timer_start
+EXPORT_SYMBOL sound/core/snd-timer 0x8a4c5403	snd_timer_continue
+EXPORT_SYMBOL sound/core/snd-timer 0x9c93928e	snd_timer_global_free
+EXPORT_SYMBOL sound/core/snd-timer 0xd3e53948	snd_timer_pause
+EXPORT_SYMBOL sound/core/snd-timer 0xdb4446a5	snd_timer_notify
+EXPORT_SYMBOL sound/core/snd-timer 0xebde2b39	snd_timer_open
+EXPORT_SYMBOL sound/core/snd-timer 0xec44498d	snd_timer_interrupt
+EXPORT_SYMBOL sound/core/snd-timer 0xf1f1c1d9	snd_timer_close
+EXPORT_SYMBOL sound/core/snd-timer 0xf5621192	snd_timer_new
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x4bbb7f27	snd_mpu401_uart_interrupt_tx
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xc43a3940	snd_mpu401_uart_interrupt
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xe6bae3ce	snd_mpu401_uart_new
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x05060a19	snd_opl3_regmap
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x250a2f90	snd_opl3_timer_new
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x28b3dc0b	snd_opl3_hwdep_new
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x3775427f	snd_opl3_new
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x96fda9d5	snd_opl3_reset
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xa6b94d8f	snd_opl3_create
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xbfa3ac91	snd_opl3_load_patch
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xd7ded643	snd_opl3_init
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xdb8706aa	snd_opl3_find_patch
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xe47e9b8c	snd_opl3_interrupt
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x40f215ae	snd_vx_free_firmware
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x4a5c92eb	snd_vx_dsp_load
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x7b824725	snd_vx_setup_firmware
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x7e88f6af	snd_vx_dsp_boot
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x99b88ede	snd_vx_irq_handler
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xaa0c2455	snd_vx_create
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xed69aaa9	snd_vx_check_reg_bit
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xf8dc5f13	snd_vx_load_boot_image
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x0067c27a	snd_ak4114_build
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x3396b078	snd_ak4114_reg_write
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x9409f2c9	snd_ak4114_create
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x9fa69ae1	snd_ak4114_check_rate_and_errors
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xa6b4832f	snd_ak4114_external_rate
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xef9ac14d	snd_ak4114_reinit
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x5c117b20	snd_ak4117_reinit
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x6d2b5563	snd_ak4117_create
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x8ccdda97	snd_ak4117_check_rate_and_errors
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x9ef14952	snd_ak4117_external_rate
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xac70f50d	snd_ak4117_build
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xb063e0da	snd_ak4117_reg_write
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x1dd78aac	snd_akm4xxx_build_controls
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x31a1cb81	snd_akm4xxx_write
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x6b1ac96e	snd_akm4xxx_reset
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x86aa936e	snd_akm4xxx_init
+EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0x51c51f6f	snd_pt2258_build_controls
+EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0xf8e866db	snd_pt2258_reset
+EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0x98c54b9d	snd_tea575x_exit
+EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0xd2b5c5bb	snd_tea575x_init
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x216754c8	snd_cs8427_iec958_build
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x2bf110e5	snd_cs8427_iec958_active
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x4b057929	snd_cs8427_create
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x6e33ceab	snd_cs8427_iec958_pcm
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x748bfc7b	snd_cs8427_reg_write
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x63ad0eb8	snd_i2c_sendbytes
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x824596cf	snd_i2c_probeaddr
+EXPORT_SYMBOL sound/i2c/snd-i2c 0xdea538c5	snd_i2c_device_free
+EXPORT_SYMBOL sound/i2c/snd-i2c 0xe139cd3b	snd_i2c_device_create
+EXPORT_SYMBOL sound/i2c/snd-i2c 0xe59a31ec	snd_i2c_bus_create
+EXPORT_SYMBOL sound/i2c/snd-i2c 0xf858b036	snd_i2c_readbytes
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x02d29e50	snd_ac97_set_rate
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x2eb2c8d8	snd_ac97_pcm_double_rate_rules
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x610fdb71	snd_ac97_read
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xa90c1289	snd_ac97_write_cache
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xb03157dc	snd_ac97_pcm_open
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xb9cdbe74	snd_ac97_tune_hardware
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xc843dee0	snd_ac97_update
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xce50012c	snd_ac97_mixer
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xdc084b61	snd_ac97_pcm_assign
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xe3fb41a3	snd_ac97_write
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xe770a665	snd_ac97_get_short_name
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xec191d5b	snd_ac97_pcm_close
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xec3bd816	snd_ac97_update_bits
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xf75a8e5b	snd_ac97_update_power
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xfa3b5d7c	snd_ac97_bus
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x0daec5f9	snd_emu10k1_ptr_read
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x273de0e1	snd_emu10k1_ptr_write
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x3347840c	snd_emu10k1_voice_free
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x616b362e	snd_emu10k1_synth_alloc
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x7edd07e6	snd_emu10k1_synth_copy_from_user
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xa2c13058	snd_emu10k1_synth_bzero
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xad196993	snd_emu10k1_memblk_map
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xc7898569	snd_emu10k1_voice_alloc
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xd642c039	snd_emu10k1_synth_free
+EXPORT_SYMBOL sound/pci/hda/snd-hda-codec 0xe8500aa2	snd_hda_parse_generic_codec
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x57483ce6	snd_ice1712_akm4xxx_free
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x6031ebc0	snd_ice1712_akm4xxx_build_controls
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x79e43841	snd_ice1712_akm4xxx_init
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x2e799c01	snd_trident_write_voice_regs
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x539fbea9	snd_trident_start_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x87936830	snd_trident_alloc_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x9e4dc9ef	snd_trident_free_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0xd359e372	snd_trident_stop_voice
+EXPORT_SYMBOL sound/soc/codecs/snd-soc-uda134x 0xd974a12f	uda134x_dai
+EXPORT_SYMBOL sound/sound_firmware 0x39e3dd23	mod_firmware_load
+EXPORT_SYMBOL sound/soundcore 0x0a83d34c	register_sound_dsp
+EXPORT_SYMBOL sound/soundcore 0x4ea0fdad	register_sound_midi
+EXPORT_SYMBOL sound/soundcore 0x4f2436dc	register_sound_special_device
+EXPORT_SYMBOL sound/soundcore 0x525c4704	register_sound_mixer
+EXPORT_SYMBOL sound/soundcore 0x7afc9d8a	unregister_sound_mixer
+EXPORT_SYMBOL sound/soundcore 0x7cb2af90	register_sound_special
+EXPORT_SYMBOL sound/soundcore 0x99c95fa5	unregister_sound_special
+EXPORT_SYMBOL sound/soundcore 0xcd083b10	unregister_sound_dsp
+EXPORT_SYMBOL sound/soundcore 0xf420daf4	sound_class
+EXPORT_SYMBOL sound/soundcore 0xfdab6de3	unregister_sound_midi
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x0195118c	snd_emux_unlock_voice
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x0743bc60	snd_emux_new
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x1bd0f3c8	snd_emux_free
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x655cb202	snd_sf_linear_to_log
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x68c29f0a	snd_emux_terminate_all
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xd25cafd9	snd_emux_lock_voice
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xf7854e22	snd_emux_register
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x0c1042b4	snd_util_mem_avail
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x15bceb30	__snd_util_mem_alloc
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x381a4ce8	snd_util_mem_free
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x56485a21	__snd_util_memblk_new
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x5abd7e4e	snd_util_memhdr_free
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x6659d896	snd_util_memhdr_new
+EXPORT_SYMBOL sound/synth/snd-util-mem 0xb2692585	snd_util_mem_alloc
+EXPORT_SYMBOL sound/synth/snd-util-mem 0xbf4d317f	__snd_util_mem_free
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0x01dc8239	snd_usb_create_midi_interface
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0x16756dc0	snd_usbmidi_input_start
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0x63343b1d	snd_usbmidi_input_stop
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0xd9d2bb03	snd_usbmidi_disconnect
+EXPORT_SYMBOL vmlinux 0x00000000	per_cpu__softirq_work_list
+EXPORT_SYMBOL vmlinux 0x003335f8	skb_kill_datagram
+EXPORT_SYMBOL vmlinux 0x00369826	mutex_lock_interruptible
+EXPORT_SYMBOL vmlinux 0x00546817	prepare_kernel_cred
+EXPORT_SYMBOL vmlinux 0x007edc34	neigh_update
+EXPORT_SYMBOL vmlinux 0x00801678	flush_scheduled_work
+EXPORT_SYMBOL vmlinux 0x0082632f	drm_sysfs_connector_add
+EXPORT_SYMBOL vmlinux 0x008d6d34	seq_lseek
+EXPORT_SYMBOL vmlinux 0x00947c05	unlock_super
+EXPORT_SYMBOL vmlinux 0x00947ec6	mark_buffer_dirty
+EXPORT_SYMBOL vmlinux 0x00c4dc87	timecounter_init
+EXPORT_SYMBOL vmlinux 0x00d25427	dev_get_flags
+EXPORT_SYMBOL vmlinux 0x01000e51	schedule
+EXPORT_SYMBOL vmlinux 0x010b3f80	tcp_init_xmit_timers
+EXPORT_SYMBOL vmlinux 0x01106336	path_lookup
+EXPORT_SYMBOL vmlinux 0x012c9f8f	dquot_acquire
+EXPORT_SYMBOL vmlinux 0x014004d2	____pagevec_lru_add
+EXPORT_SYMBOL vmlinux 0x0150d4cf	unbind_con_driver
+EXPORT_SYMBOL vmlinux 0x015d6e18	i2c_smbus_read_byte
+EXPORT_SYMBOL vmlinux 0x018dad0d	journal_get_create_access
+EXPORT_SYMBOL vmlinux 0x01902adf	netpoll_trap
+EXPORT_SYMBOL vmlinux 0x019a4fa1	dmam_alloc_noncoherent
+EXPORT_SYMBOL vmlinux 0x01a4aab6	set_irq_chip_data
+EXPORT_SYMBOL vmlinux 0x01ab0f38	dev_base_lock
+EXPORT_SYMBOL vmlinux 0x01d711de	__up_write
+EXPORT_SYMBOL vmlinux 0x01f228ae	tty_get_baud_rate
+EXPORT_SYMBOL vmlinux 0x01f67911	___copy_in_user
+EXPORT_SYMBOL vmlinux 0x020adf4d	d_move
+EXPORT_SYMBOL vmlinux 0x021a295d	d_alloc_root
+EXPORT_SYMBOL vmlinux 0x0230aab3	sock_no_shutdown
+EXPORT_SYMBOL vmlinux 0x024a4a9c	xfrm_dst_ifdown
+EXPORT_SYMBOL vmlinux 0x024e72df	unmap_underlying_metadata
+EXPORT_SYMBOL vmlinux 0x026294d4	unregister_key_type
+EXPORT_SYMBOL vmlinux 0x02632788	pci_write_vpd
+EXPORT_SYMBOL vmlinux 0x02649054	security_sock_rcv_skb
+EXPORT_SYMBOL vmlinux 0x02696dec	d_validate
+EXPORT_SYMBOL vmlinux 0x027046b8	setup_arg_pages
+EXPORT_SYMBOL vmlinux 0x0286a988	input_release_device
+EXPORT_SYMBOL vmlinux 0x02a6ce5a	crc16_table
+EXPORT_SYMBOL vmlinux 0x02b706f0	dst_discard
+EXPORT_SYMBOL vmlinux 0x02cdcdfc	bdput
+EXPORT_SYMBOL vmlinux 0x02ce362f	ip_getsockopt
+EXPORT_SYMBOL vmlinux 0x02ce37c1	kfree_skb
+EXPORT_SYMBOL vmlinux 0x02d51915	jbd2_journal_get_create_access
+EXPORT_SYMBOL vmlinux 0x02d81845	audit_log_task_context
+EXPORT_SYMBOL vmlinux 0x02ddef58	tcf_exts_dump_stats
+EXPORT_SYMBOL vmlinux 0x02e36c59	dev_kfree_skb_any
+EXPORT_SYMBOL vmlinux 0x02fb211a	prepare_to_wait_exclusive
+EXPORT_SYMBOL vmlinux 0x031ee678	xor_niagara_2
+EXPORT_SYMBOL vmlinux 0x0334da4e	scsi_command_size_tbl
+EXPORT_SYMBOL vmlinux 0x0337faf3	__brelse
+EXPORT_SYMBOL vmlinux 0x0340e0ae	schedule_delayed_work
+EXPORT_SYMBOL vmlinux 0x035ad971	iunique
+EXPORT_SYMBOL vmlinux 0x03747a34	call_usermodehelper_setup
+EXPORT_SYMBOL vmlinux 0x037a0cba	kfree
+EXPORT_SYMBOL vmlinux 0x038589c9	__inc_zone_page_state
+EXPORT_SYMBOL vmlinux 0x0395f03d	mb_cache_entry_find_next
+EXPORT_SYMBOL vmlinux 0x03a22ad4	get_unmapped_area_prot
+EXPORT_SYMBOL vmlinux 0x03b92598	_spin_lock
+EXPORT_SYMBOL vmlinux 0x03c06156	bitmap_fold
+EXPORT_SYMBOL vmlinux 0x03d59d61	ethtool_op_set_tx_ipv6_csum
+EXPORT_SYMBOL vmlinux 0x03d81967	serio_unregister_driver
+EXPORT_SYMBOL vmlinux 0x03d9b36b	page_put_link
+EXPORT_SYMBOL vmlinux 0x03e8f1f4	pipe_lock
+EXPORT_SYMBOL vmlinux 0x03ea9cf3	sun4v_hvapi_get
+EXPORT_SYMBOL vmlinux 0x03fb6d3e	vga_tryget
+EXPORT_SYMBOL vmlinux 0x03fd2571	vm_unmap_ram
+EXPORT_SYMBOL vmlinux 0x03ff41b1	neigh_for_each
+EXPORT_SYMBOL vmlinux 0x040d8d70	jbd2_journal_release_jbd_inode
+EXPORT_SYMBOL vmlinux 0x041d69d0	inode_change_ok
+EXPORT_SYMBOL vmlinux 0x0422fe4a	inet_csk_timer_bug_msg
+EXPORT_SYMBOL vmlinux 0x042fbf98	phy_ethtool_gset
+EXPORT_SYMBOL vmlinux 0x0430c5f5	inet_release
+EXPORT_SYMBOL vmlinux 0x04384112	is_bad_inode
+EXPORT_SYMBOL vmlinux 0x044b6dca	blk_queue_update_dma_alignment
+EXPORT_SYMBOL vmlinux 0x0467944e	journal_update_format
+EXPORT_SYMBOL vmlinux 0x046c4df6	dev_disable_lro
+EXPORT_SYMBOL vmlinux 0x046ee767	ftrace_print_symbols_seq
+EXPORT_SYMBOL vmlinux 0x0481b101	d_instantiate
+EXPORT_SYMBOL vmlinux 0x0484d318	blk_stop_queue
+EXPORT_SYMBOL vmlinux 0x0487f831	fb_find_best_display
+EXPORT_SYMBOL vmlinux 0x04927208	cpu_active_mask
+EXPORT_SYMBOL vmlinux 0x04b617b8	sg_miter_stop
+EXPORT_SYMBOL vmlinux 0x04cd0dad	input_register_handler
+EXPORT_SYMBOL vmlinux 0x04e46bdb	up_read
+EXPORT_SYMBOL vmlinux 0x04f3c434	tty_unregister_driver
+EXPORT_SYMBOL vmlinux 0x04fb3c6e	pci_scan_bridge
+EXPORT_SYMBOL vmlinux 0x050d9201	tcp_v4_syn_recv_sock
+EXPORT_SYMBOL vmlinux 0x05186ca4	flush_icache_range
+EXPORT_SYMBOL vmlinux 0x05240ee7	percpu_counter_batch
+EXPORT_SYMBOL vmlinux 0x0533106d	install_exec_creds
+EXPORT_SYMBOL vmlinux 0x055208ee	blk_integrity_unregister
+EXPORT_SYMBOL vmlinux 0x055794f7	nf_reinject
+EXPORT_SYMBOL vmlinux 0x05586bd5	tcf_em_register
+EXPORT_SYMBOL vmlinux 0x0560fd8f	atomic_sub_ret
+EXPORT_SYMBOL vmlinux 0x056f25e4	fib_default_rule_add
+EXPORT_SYMBOL vmlinux 0x058fead7	dm_get_mapinfo
+EXPORT_SYMBOL vmlinux 0x05aa4498	vlan_dev_real_dev
+EXPORT_SYMBOL vmlinux 0x05ba8ede	tcp_sync_mss
+EXPORT_SYMBOL vmlinux 0x05bf9165	tcf_hash_lookup
+EXPORT_SYMBOL vmlinux 0x05de9716	uart_resume_port
+EXPORT_SYMBOL vmlinux 0x0613724d	phy_driver_unregister
+EXPORT_SYMBOL vmlinux 0x061651be	strcat
+EXPORT_SYMBOL vmlinux 0x064136e2	pci_scan_slot
+EXPORT_SYMBOL vmlinux 0x065e8a2e	profile_pc
+EXPORT_SYMBOL vmlinux 0x067d8d35	security_release_secctx
+EXPORT_SYMBOL vmlinux 0x06a485f2	__krealloc
+EXPORT_SYMBOL vmlinux 0x06d567c7	drm_i2c_encoder_init
+EXPORT_SYMBOL vmlinux 0x06e43648	migrate_page
+EXPORT_SYMBOL vmlinux 0x06eaacdd	mb_cache_entry_insert
+EXPORT_SYMBOL vmlinux 0x06f7ac34	phy_start_interrupts
+EXPORT_SYMBOL vmlinux 0x06fe3b14	default_grn
+EXPORT_SYMBOL vmlinux 0x0716b627	init_timer_deferrable_key
+EXPORT_SYMBOL vmlinux 0x07202496	skb_copy_datagram_iovec
+EXPORT_SYMBOL vmlinux 0x0799aca4	local_bh_enable
+EXPORT_SYMBOL vmlinux 0x0799c50a	param_set_ulong
+EXPORT_SYMBOL vmlinux 0x07a890c8	fb_alloc_cmap
+EXPORT_SYMBOL vmlinux 0x07bf560d	of_get_next_child
+EXPORT_SYMBOL vmlinux 0x07cc4a5d	printk_timed_ratelimit
+EXPORT_SYMBOL vmlinux 0x07d1fbfa	key_put
+EXPORT_SYMBOL vmlinux 0x07d3f6d1	vfs_quota_disable
+EXPORT_SYMBOL vmlinux 0x07eef621	ip_ct_attach
+EXPORT_SYMBOL vmlinux 0x0806f690	blkdev_get
+EXPORT_SYMBOL vmlinux 0x081ee25f	force_sig
+EXPORT_SYMBOL vmlinux 0x0826b0dc	__flush_dcache_range
+EXPORT_SYMBOL vmlinux 0x0827db21	unregister_framebuffer
+EXPORT_SYMBOL vmlinux 0x082a57cc	inet_twsk_deschedule
+EXPORT_SYMBOL vmlinux 0x082c3213	pci_root_buses
+EXPORT_SYMBOL vmlinux 0x083250da	qdisc_tree_decrease_qlen
+EXPORT_SYMBOL vmlinux 0x0836695c	drm_sman_takedown
+EXPORT_SYMBOL vmlinux 0x0837afb0	redirty_page_for_writepage
+EXPORT_SYMBOL vmlinux 0x083f050d	__ps2_command
+EXPORT_SYMBOL vmlinux 0x084c664b	skb_clone
+EXPORT_SYMBOL vmlinux 0x087715c3	ethtool_op_set_tx_hw_csum
+EXPORT_SYMBOL vmlinux 0x088e9af3	blkdev_put
+EXPORT_SYMBOL vmlinux 0x08ae5314	drm_ioctl
+EXPORT_SYMBOL vmlinux 0x08bd0818	nf_register_queue_handler
+EXPORT_SYMBOL vmlinux 0x08d66a3a	warn_slowpath_fmt
+EXPORT_SYMBOL vmlinux 0x08dc1200	__rta_fill
+EXPORT_SYMBOL vmlinux 0x08ed0b62	mac_vmode_to_var
+EXPORT_SYMBOL vmlinux 0x09089987	follow_up
+EXPORT_SYMBOL vmlinux 0x0913662e	inc_zone_page_state
+EXPORT_SYMBOL vmlinux 0x093a5657	cdev_del
+EXPORT_SYMBOL vmlinux 0x0948cde9	num_physpages
+EXPORT_SYMBOL vmlinux 0x094a7619	blk_remove_plug
+EXPORT_SYMBOL vmlinux 0x0952a8ab	address_space_init_once
+EXPORT_SYMBOL vmlinux 0x09742bc8	page_symlink
+EXPORT_SYMBOL vmlinux 0x098b71c6	fb_dealloc_cmap
+EXPORT_SYMBOL vmlinux 0x09a39a7b	dma_pool_free
+EXPORT_SYMBOL vmlinux 0x09c55cec	schedule_timeout_interruptible
+EXPORT_SYMBOL vmlinux 0x09c8eb55	font_vga_8x16
+EXPORT_SYMBOL vmlinux 0x09d44df9	in_lock_functions
+EXPORT_SYMBOL vmlinux 0x09e2f2ba	_write_lock_irq
+EXPORT_SYMBOL vmlinux 0x0a1bdb8d	dquot_destroy
+EXPORT_SYMBOL vmlinux 0x0a2487e0	unblock_all_signals
+EXPORT_SYMBOL vmlinux 0x0a4d2486	xfrm_state_register_afinfo
+EXPORT_SYMBOL vmlinux 0x0a5d21e8	dev_set_allmulti
+EXPORT_SYMBOL vmlinux 0x0a70353f	pci_get_subsys
+EXPORT_SYMBOL vmlinux 0x0a7b4a0e	seq_open
+EXPORT_SYMBOL vmlinux 0x0aa35ff9	release_sock
+EXPORT_SYMBOL vmlinux 0x0abf4913	phy_register_fixup
+EXPORT_SYMBOL vmlinux 0x0acb1a3c	__bitmap_shift_right
+EXPORT_SYMBOL vmlinux 0x0ad16bf3	netlink_kernel_release
+EXPORT_SYMBOL vmlinux 0x0adc864d	drm_init
+EXPORT_SYMBOL vmlinux 0x0ae807b4	__sk_mem_reclaim
+EXPORT_SYMBOL vmlinux 0x0b1beb31	vmalloc_32_user
+EXPORT_SYMBOL vmlinux 0x0b4b2ae4	journal_abort
+EXPORT_SYMBOL vmlinux 0x0b4cfc33	vfs_getattr
+EXPORT_SYMBOL vmlinux 0x0b742fd7	simple_strtol
+EXPORT_SYMBOL vmlinux 0x0b7d2c7f	drm_core_ioremap_wc
+EXPORT_SYMBOL vmlinux 0x0b84fe88	pci_release_regions
+EXPORT_SYMBOL vmlinux 0x0b8785aa	vfs_writev
+EXPORT_SYMBOL vmlinux 0x0bcd22a5	dev_mc_sync
+EXPORT_SYMBOL vmlinux 0x0be2aa84	posix_acl_permission
+EXPORT_SYMBOL vmlinux 0x0bfd7ec1	input_unregister_handle
+EXPORT_SYMBOL vmlinux 0x0c0bef35	module_put
+EXPORT_SYMBOL vmlinux 0x0c226659	___pskb_trim
+EXPORT_SYMBOL vmlinux 0x0c27263b	pcim_iounmap
+EXPORT_SYMBOL vmlinux 0x0c5c45fe	sk_free
+EXPORT_SYMBOL vmlinux 0x0c60874a	sock_create_kern
+EXPORT_SYMBOL vmlinux 0x0c62db80	dev_trans_start
+EXPORT_SYMBOL vmlinux 0x0c94de03	security_path_unlink
+EXPORT_SYMBOL vmlinux 0x0cae232b	utf16s_to_utf8s
+EXPORT_SYMBOL vmlinux 0x0cc83329	inode_get_bytes
+EXPORT_SYMBOL vmlinux 0x0cda0ff9	ip_xfrm_me_harder
+EXPORT_SYMBOL vmlinux 0x0d1d61d9	put_mnt_ns
+EXPORT_SYMBOL vmlinux 0x0d303c84	netpoll_print_options
+EXPORT_SYMBOL vmlinux 0x0d4e60ff	blk_queue_max_segment_size
+EXPORT_SYMBOL vmlinux 0x0d542439	__ipv6_addr_type
+EXPORT_SYMBOL vmlinux 0x0d7b7bfe	blk_register_region
+EXPORT_SYMBOL vmlinux 0x0da10ec3	security_sock_graft
+EXPORT_SYMBOL vmlinux 0x0da3b830	drm_framebuffer_init
+EXPORT_SYMBOL vmlinux 0x0dba47a5	jbd2_journal_unlock_updates
+EXPORT_SYMBOL vmlinux 0x0e1f5f76	truncate_inode_pages
+EXPORT_SYMBOL vmlinux 0x0e447e72	drm_mm_put_block
+EXPORT_SYMBOL vmlinux 0x0e52592a	panic
+EXPORT_SYMBOL vmlinux 0x0e5ccc8d	sync_mapping_buffers
+EXPORT_SYMBOL vmlinux 0x0e713337	sg_init_table
+EXPORT_SYMBOL vmlinux 0x0e863664	mb_cache_create
+EXPORT_SYMBOL vmlinux 0x0e8c8eb9	sock_no_sendpage
+EXPORT_SYMBOL vmlinux 0x0ea1af0f	_spin_unlock_irqrestore
+EXPORT_SYMBOL vmlinux 0x0ea4cf63	eth_rebuild_header
+EXPORT_SYMBOL vmlinux 0x0eefd6af	block_invalidatepage
+EXPORT_SYMBOL vmlinux 0x0f030312	journal_forget
+EXPORT_SYMBOL vmlinux 0x0f1ef871	posix_acl_alloc
+EXPORT_SYMBOL vmlinux 0x0f299931	neigh_table_init
+EXPORT_SYMBOL vmlinux 0x0f378a1e	___copy_from_user
+EXPORT_SYMBOL vmlinux 0x0f3c50e3	blk_queue_bounce_limit
+EXPORT_SYMBOL vmlinux 0x0f41bd8a	complete_all
+EXPORT_SYMBOL vmlinux 0x0f5ae830	set_bdi_congested
+EXPORT_SYMBOL vmlinux 0x0f635c52	end_buffer_read_sync
+EXPORT_SYMBOL vmlinux 0x0fbe837c	writeback_inodes_sb_if_idle
+EXPORT_SYMBOL vmlinux 0x0fc5e8eb	radix_tree_gang_lookup_slot
+EXPORT_SYMBOL vmlinux 0x0fdc57a1	simple_empty
+EXPORT_SYMBOL vmlinux 0x0fe22693	dquot_initialize
+EXPORT_SYMBOL vmlinux 0x0ffbab4a	register_sysctl_paths
+EXPORT_SYMBOL vmlinux 0x0ffcb12f	pci_lost_interrupt
+EXPORT_SYMBOL vmlinux 0x1002ca65	dev_load
+EXPORT_SYMBOL vmlinux 0x10387f05	nf_log_unregister
+EXPORT_SYMBOL vmlinux 0x104c9060	per_cpu____cpu_data
+EXPORT_SYMBOL vmlinux 0x104e8c3b	journal_init_dev
+EXPORT_SYMBOL vmlinux 0x105e2727	__tracepoint_kmalloc
+EXPORT_SYMBOL vmlinux 0x10686e76	register_sysctl_table
+EXPORT_SYMBOL vmlinux 0x108e8985	param_get_uint
+EXPORT_SYMBOL vmlinux 0x10902bf7	insb
+EXPORT_SYMBOL vmlinux 0x10b31f7d	drm_core_ioremapfree
+EXPORT_SYMBOL vmlinux 0x10b5bcd4	nf_ip_checksum
+EXPORT_SYMBOL vmlinux 0x10ee20bb	default_blu
+EXPORT_SYMBOL vmlinux 0x1101f513	bio_integrity_free
+EXPORT_SYMBOL vmlinux 0x111f67af	atomic64_add_ret
+EXPORT_SYMBOL vmlinux 0x11408c60	block_read_full_page
+EXPORT_SYMBOL vmlinux 0x11499d0e	unregister_netdev
+EXPORT_SYMBOL vmlinux 0x114ed1ce	schedule_work_on
+EXPORT_SYMBOL vmlinux 0x1163f0a7	blk_max_low_pfn
+EXPORT_SYMBOL vmlinux 0x1169823a	ip_generic_getfrag
+EXPORT_SYMBOL vmlinux 0x117093be	qdisc_class_hash_init
+EXPORT_SYMBOL vmlinux 0x11793d13	ebus_dma_unregister
+EXPORT_SYMBOL vmlinux 0x118f01ea	putname
+EXPORT_SYMBOL vmlinux 0x119b75f8	journal_invalidatepage
+EXPORT_SYMBOL vmlinux 0x11f2814c	key_instantiate_and_link
+EXPORT_SYMBOL vmlinux 0x1216bed2	aio_put_req
+EXPORT_SYMBOL vmlinux 0x12293c08	per_cpu____irq_regs
+EXPORT_SYMBOL vmlinux 0x1235e0ce	unregister_nls
+EXPORT_SYMBOL vmlinux 0x1243ff30	blkdev_issue_flush
+EXPORT_SYMBOL vmlinux 0x1248542e	should_remove_suid
+EXPORT_SYMBOL vmlinux 0x1251bd63	sock_no_socketpair
+EXPORT_SYMBOL vmlinux 0x129a6f91	datagram_poll
+EXPORT_SYMBOL vmlinux 0x129c267d	framebuffer_alloc
+EXPORT_SYMBOL vmlinux 0x12bb2452	up
+EXPORT_SYMBOL vmlinux 0x12bd5c52	devm_request_threaded_irq
+EXPORT_SYMBOL vmlinux 0x12d09a67	sun4v_hvapi_unregister
+EXPORT_SYMBOL vmlinux 0x12da3d9b	lock_super
+EXPORT_SYMBOL vmlinux 0x12da3e39	skb_checksum
+EXPORT_SYMBOL vmlinux 0x12ea337e	outsb
+EXPORT_SYMBOL vmlinux 0x12f31318	_spin_unlock_bh
+EXPORT_SYMBOL vmlinux 0x130270b1	down_killable
+EXPORT_SYMBOL vmlinux 0x13058ef4	pcim_iomap_regions_request_all
+EXPORT_SYMBOL vmlinux 0x131884da	irq_of_parse_and_map
+EXPORT_SYMBOL vmlinux 0x133278de	__inet6_hash
+EXPORT_SYMBOL vmlinux 0x134422d7	bio_copy_user
+EXPORT_SYMBOL vmlinux 0x13577eb0	pcim_iomap_table
+EXPORT_SYMBOL vmlinux 0x136f7671	blk_alloc_queue_node
+EXPORT_SYMBOL vmlinux 0x138a78d1	set_current_groups
+EXPORT_SYMBOL vmlinux 0x13a41146	inet_stream_ops
+EXPORT_SYMBOL vmlinux 0x13a7e6b5	__generic_file_aio_write
+EXPORT_SYMBOL vmlinux 0x13d6032e	pcim_iomap
+EXPORT_SYMBOL vmlinux 0x13ed4b6f	bio_sector_offset
+EXPORT_SYMBOL vmlinux 0x13f784f8	tcp_v4_md5_lookup
+EXPORT_SYMBOL vmlinux 0x13fc14f4	pci_bus_type
+EXPORT_SYMBOL vmlinux 0x140d3cc8	unregister_netdevice
+EXPORT_SYMBOL vmlinux 0x1427f7c3	of_release_dev
+EXPORT_SYMBOL vmlinux 0x1436bead	inet_add_protocol
+EXPORT_SYMBOL vmlinux 0x143c49d4	inet_select_addr
+EXPORT_SYMBOL vmlinux 0x145593f4	tty_hangup
+EXPORT_SYMBOL vmlinux 0x149598f0	pci_remove_bus
+EXPORT_SYMBOL vmlinux 0x14d053f4	drm_core_reclaim_buffers
+EXPORT_SYMBOL vmlinux 0x14d2d25d	blk_dump_rq_flags
+EXPORT_SYMBOL vmlinux 0x14f514c9	generic_file_llseek
+EXPORT_SYMBOL vmlinux 0x150fd856	nf_log_bind_pf
+EXPORT_SYMBOL vmlinux 0x152c2d5e	sk_stream_wait_memory
+EXPORT_SYMBOL vmlinux 0x1551dc51	bitmap_find_free_region
+EXPORT_SYMBOL vmlinux 0x1559acde	find_get_pages_contig
+EXPORT_SYMBOL vmlinux 0x1598a37e	skb_recv_datagram
+EXPORT_SYMBOL vmlinux 0x15d66a91	ps2_end_command
+EXPORT_SYMBOL vmlinux 0x161605c3	idr_replace
+EXPORT_SYMBOL vmlinux 0x1619c5ef	shrink_dcache_sb
+EXPORT_SYMBOL vmlinux 0x16305289	warn_slowpath_null
+EXPORT_SYMBOL vmlinux 0x163c5e39	twl4030_i2c_read
+EXPORT_SYMBOL vmlinux 0x1645782d	neigh_lookup
+EXPORT_SYMBOL vmlinux 0x16e8a4b5	__devm_request_region
+EXPORT_SYMBOL vmlinux 0x16e8b7e2	get_io_context
+EXPORT_SYMBOL vmlinux 0x17078803	xfrm_policy_byid
+EXPORT_SYMBOL vmlinux 0x1738949b	i2c_del_driver
+EXPORT_SYMBOL vmlinux 0x1748319b	numa_cpumask_lookup_table
+EXPORT_SYMBOL vmlinux 0x178f9f64	aio_complete
+EXPORT_SYMBOL vmlinux 0x17a9af43	nla_reserve
+EXPORT_SYMBOL vmlinux 0x17b6a54e	fifo_create_dflt
+EXPORT_SYMBOL vmlinux 0x17c85a66	radix_tree_tagged
+EXPORT_SYMBOL vmlinux 0x17d1b701	iget5_locked
+EXPORT_SYMBOL vmlinux 0x17df17bc	sysctl_tcp_ecn
+EXPORT_SYMBOL vmlinux 0x17f341a0	i8042_lock_chip
+EXPORT_SYMBOL vmlinux 0x17faaca5	tcp_enter_memory_pressure
+EXPORT_SYMBOL vmlinux 0x18098978	dst_destroy
+EXPORT_SYMBOL vmlinux 0x180a443f	skb_over_panic
+EXPORT_SYMBOL vmlinux 0x180bfa86	mod_timer_pending
+EXPORT_SYMBOL vmlinux 0x180f7668	__set_page_dirty_buffers
+EXPORT_SYMBOL vmlinux 0x181ae2bd	mdiobus_alloc
+EXPORT_SYMBOL vmlinux 0x183fa88b	mempool_alloc_slab
+EXPORT_SYMBOL vmlinux 0x184152c7	xfrm_stateonly_find
+EXPORT_SYMBOL vmlinux 0x1876c9ad	kfifo_free
+EXPORT_SYMBOL vmlinux 0x187a20eb	input_unfilter_device
+EXPORT_SYMBOL vmlinux 0x1889e911	request_key_async_with_auxdata
+EXPORT_SYMBOL vmlinux 0x189b6bac	memory_read_from_buffer
+EXPORT_SYMBOL vmlinux 0x189ee2ad	vlan_gro_receive
+EXPORT_SYMBOL vmlinux 0x18bef9d9	mdesc_node_by_name
+EXPORT_SYMBOL vmlinux 0x18c01bf8	dev_set_promiscuity
+EXPORT_SYMBOL vmlinux 0x18dd699b	phy_connect_direct
+EXPORT_SYMBOL vmlinux 0x18e16db6	netpoll_poll
+EXPORT_SYMBOL vmlinux 0x18e8401d	proc_dointvec_jiffies
+EXPORT_SYMBOL vmlinux 0x192d356c	journal_errno
+EXPORT_SYMBOL vmlinux 0x19391763	iov_iter_fault_in_readable
+EXPORT_SYMBOL vmlinux 0x1945f989	xfrm_state_lookup_byaddr
+EXPORT_SYMBOL vmlinux 0x1976bc16	__tracepoint_kmem_cache_free
+EXPORT_SYMBOL vmlinux 0x1981fca3	seq_putc
+EXPORT_SYMBOL vmlinux 0x19866e69	fb_blank
+EXPORT_SYMBOL vmlinux 0x1989e9f3	sock_no_bind
+EXPORT_SYMBOL vmlinux 0x199ed0cd	net_disable_timestamp
+EXPORT_SYMBOL vmlinux 0x19cc8cf1	blk_integrity_compare
+EXPORT_SYMBOL vmlinux 0x19e75f0c	drm_rmmap
+EXPORT_SYMBOL vmlinux 0x19fd140e	__invalidate_device
+EXPORT_SYMBOL vmlinux 0x1a35bcbc	VISenter
+EXPORT_SYMBOL vmlinux 0x1a4eedd1	simple_transaction_set
+EXPORT_SYMBOL vmlinux 0x1a531fb1	otg_get_transceiver
+EXPORT_SYMBOL vmlinux 0x1aa759d0	ns_to_timeval
+EXPORT_SYMBOL vmlinux 0x1ab311fa	sock_map_fd
+EXPORT_SYMBOL vmlinux 0x1ace138d	bitmap_allocate_region
+EXPORT_SYMBOL vmlinux 0x1ad17b27	locks_init_lock
+EXPORT_SYMBOL vmlinux 0x1ad9f95a	prom_finddevice
+EXPORT_SYMBOL vmlinux 0x1ae2e519	proto_unregister
+EXPORT_SYMBOL vmlinux 0x1b015d25	bitmap_parselist
+EXPORT_SYMBOL vmlinux 0x1b04bd6d	bdev_read_only
+EXPORT_SYMBOL vmlinux 0x1b3d6896	pci_pme_capable
+EXPORT_SYMBOL vmlinux 0x1b4ddb84	genphy_suspend
+EXPORT_SYMBOL vmlinux 0x1b5b1649	vfs_set_dqinfo
+EXPORT_SYMBOL vmlinux 0x1b6314fd	in_aton
+EXPORT_SYMBOL vmlinux 0x1b69793d	file_update_time
+EXPORT_SYMBOL vmlinux 0x1b6c53c9	blk_execute_rq
+EXPORT_SYMBOL vmlinux 0x1b6e4165	sock_setsockopt
+EXPORT_SYMBOL vmlinux 0x1b749747	drm_mm_debug_table
+EXPORT_SYMBOL vmlinux 0x1b82af08	tcp_tso_segment
+EXPORT_SYMBOL vmlinux 0x1b89d3e0	security_sb_clone_mnt_opts
+EXPORT_SYMBOL vmlinux 0x1b8b95ad	i8042_unlock_chip
+EXPORT_SYMBOL vmlinux 0x1b9981cc	set_irq_wake
+EXPORT_SYMBOL vmlinux 0x1ba11f45	sleep_on
+EXPORT_SYMBOL vmlinux 0x1bce8c24	xfrm_input_resume
+EXPORT_SYMBOL vmlinux 0x1be26c02	nobh_write_end
+EXPORT_SYMBOL vmlinux 0x1c196dbe	ethtool_op_set_flags
+EXPORT_SYMBOL vmlinux 0x1c1af916	set_normalized_timespec
+EXPORT_SYMBOL vmlinux 0x1c25f858	request_key_with_auxdata
+EXPORT_SYMBOL vmlinux 0x1c38e284	blk_insert_request
+EXPORT_SYMBOL vmlinux 0x1c52de8b	pci_clear_mwi
+EXPORT_SYMBOL vmlinux 0x1c5a0089	__alloc_skb
+EXPORT_SYMBOL vmlinux 0x1c80de9c	ip_send_check
+EXPORT_SYMBOL vmlinux 0x1c887354	dev_mc_unsync
+EXPORT_SYMBOL vmlinux 0x1c934a12	tcp_md5_hash_skb_data
+EXPORT_SYMBOL vmlinux 0x1c94fbe0	skb_dequeue_tail
+EXPORT_SYMBOL vmlinux 0x1cb2f990	__xfrm_state_destroy
+EXPORT_SYMBOL vmlinux 0x1cc6719a	register_reboot_notifier
+EXPORT_SYMBOL vmlinux 0x1cd2f856	revalidate_disk
+EXPORT_SYMBOL vmlinux 0x1d08b5ce	generic_file_aio_read
+EXPORT_SYMBOL vmlinux 0x1d4bbc05	pci_dev_put
+EXPORT_SYMBOL vmlinux 0x1d5747af	tty_shutdown
+EXPORT_SYMBOL vmlinux 0x1d7939e0	input_allocate_device
+EXPORT_SYMBOL vmlinux 0x1d8f31c5	lro_vlan_hwaccel_receive_frags
+EXPORT_SYMBOL vmlinux 0x1dc36131	fb_destroy_modedb
+EXPORT_SYMBOL vmlinux 0x1dca9ae9	kernel_connect
+EXPORT_SYMBOL vmlinux 0x1dd571e6	fb_copy_cmap
+EXPORT_SYMBOL vmlinux 0x1df009f3	percpu_counter_set
+EXPORT_SYMBOL vmlinux 0x1e005469	kobject_put
+EXPORT_SYMBOL vmlinux 0x1e199b07	drm_vblank_put
+EXPORT_SYMBOL vmlinux 0x1e1e5632	d_delete
+EXPORT_SYMBOL vmlinux 0x1e3d8df9	skb_append_datato_frags
+EXPORT_SYMBOL vmlinux 0x1e409c4e	mod_timer_pinned
+EXPORT_SYMBOL vmlinux 0x1e4715b1	sk_stream_wait_connect
+EXPORT_SYMBOL vmlinux 0x1e471a14	dentry_unhash
+EXPORT_SYMBOL vmlinux 0x1e5b22e1	__break_lease
+EXPORT_SYMBOL vmlinux 0x1e6d26a8	strstr
+EXPORT_SYMBOL vmlinux 0x1e6fb3b4	down_write
+EXPORT_SYMBOL vmlinux 0x1eadb57e	elv_rb_add
+EXPORT_SYMBOL vmlinux 0x1eb75979	pagevec_lookup_tag
+EXPORT_SYMBOL vmlinux 0x1ed8982f	__nla_reserve
+EXPORT_SYMBOL vmlinux 0x1ed8a36f	inet_addr_type
+EXPORT_SYMBOL vmlinux 0x1efe283f	__cap_full_set
+EXPORT_SYMBOL vmlinux 0x1f072c59	drm_property_add_enum
+EXPORT_SYMBOL vmlinux 0x1f163643	blk_queue_io_opt
+EXPORT_SYMBOL vmlinux 0x1f4b7850	try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0x1f4c5f4b	ipv4_specific
+EXPORT_SYMBOL vmlinux 0x1f68e900	xfrm_bundle_ok
+EXPORT_SYMBOL vmlinux 0x1f77cfa5	insert_inode_locked
+EXPORT_SYMBOL vmlinux 0x1f787924	__ip_select_ident
+EXPORT_SYMBOL vmlinux 0x1f8116f6	mdiobus_unregister
+EXPORT_SYMBOL vmlinux 0x1f9da12e	dma_supported
+EXPORT_SYMBOL vmlinux 0x1fa36302	drm_addbufs_pci
+EXPORT_SYMBOL vmlinux 0x1fa3e68e	splice_direct_to_actor
+EXPORT_SYMBOL vmlinux 0x1faba368	neigh_create
+EXPORT_SYMBOL vmlinux 0x1fe48383	dqget
+EXPORT_SYMBOL vmlinux 0x1fedf0f4	__request_region
+EXPORT_SYMBOL vmlinux 0x1ffa9cbd	vfs_quota_enable
+EXPORT_SYMBOL vmlinux 0x20000329	simple_strtoul
+EXPORT_SYMBOL vmlinux 0x20341349	kernel_sock_shutdown
+EXPORT_SYMBOL vmlinux 0x20385c58	genl_register_mc_group
+EXPORT_SYMBOL vmlinux 0x203cfea9	ps2_command
+EXPORT_SYMBOL vmlinux 0x204857ac	proc_dostring
+EXPORT_SYMBOL vmlinux 0x2053484b	soft_cursor
+EXPORT_SYMBOL vmlinux 0x20645642	drm_debug
+EXPORT_SYMBOL vmlinux 0x2068ca8c	nobh_write_begin
+EXPORT_SYMBOL vmlinux 0x20759b44	generic_read_dir
+EXPORT_SYMBOL vmlinux 0x20934cfe	blk_queue_max_phys_segments
+EXPORT_SYMBOL vmlinux 0x20a773c0	blkdev_issue_discard
+EXPORT_SYMBOL vmlinux 0x20aa5532	inode_set_bytes
+EXPORT_SYMBOL vmlinux 0x20dbb9a0	vfs_readlink
+EXPORT_SYMBOL vmlinux 0x20ed1039	notify_change
+EXPORT_SYMBOL vmlinux 0x20f3b729	release_firmware
+EXPORT_SYMBOL vmlinux 0x20fc2434	xfrm_state_lookup
+EXPORT_SYMBOL vmlinux 0x210601cd	flush_old_exec
+EXPORT_SYMBOL vmlinux 0x2125fe99	drm_open
+EXPORT_SYMBOL vmlinux 0x2140dc32	journal_flush
+EXPORT_SYMBOL vmlinux 0x21451ac4	drm_sman_owner_cleanup
+EXPORT_SYMBOL vmlinux 0x214a167c	eth_header_parse
+EXPORT_SYMBOL vmlinux 0x2155dbf0	pci_target_state
+EXPORT_SYMBOL vmlinux 0x215ebd78	bitrev16
+EXPORT_SYMBOL vmlinux 0x217edf97	ll_rw_block
+EXPORT_SYMBOL vmlinux 0x2197e53e	udp_flush_pending_frames
+EXPORT_SYMBOL vmlinux 0x21ca744f	jbd2_journal_lock_updates
+EXPORT_SYMBOL vmlinux 0x21d2dcab	input_set_keycode
+EXPORT_SYMBOL vmlinux 0x21ee52a7	xfrm_state_delete_tunnel
+EXPORT_SYMBOL vmlinux 0x222e7ce2	sysfs_streq
+EXPORT_SYMBOL vmlinux 0x2238d081	nf_ct_attach
+EXPORT_SYMBOL vmlinux 0x226e86a9	audit_log
+EXPORT_SYMBOL vmlinux 0x2288378f	system_state
+EXPORT_SYMBOL vmlinux 0x228f405f	mpage_readpages
+EXPORT_SYMBOL vmlinux 0x22a73912	__tcp_put_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x22b325d5	kd_mksound
+EXPORT_SYMBOL vmlinux 0x22b6533b	xfrm_sad_getinfo
+EXPORT_SYMBOL vmlinux 0x22ca0838	tcp_check_req
+EXPORT_SYMBOL vmlinux 0x22d3de1e	security_d_instantiate
+EXPORT_SYMBOL vmlinux 0x22e809ee	ilookup5
+EXPORT_SYMBOL vmlinux 0x22eba4a8	__skb_warn_lro_forwarding
+EXPORT_SYMBOL vmlinux 0x22ec3a78	genl_register_ops
+EXPORT_SYMBOL vmlinux 0x230ab4c9	_spin_lock_irq
+EXPORT_SYMBOL vmlinux 0x230c3269	kmem_cache_size
+EXPORT_SYMBOL vmlinux 0x23269a13	strict_strtoul
+EXPORT_SYMBOL vmlinux 0x234509f3	strncat
+EXPORT_SYMBOL vmlinux 0x2354ef37	uart_unregister_driver
+EXPORT_SYMBOL vmlinux 0x23577023	wait_for_completion_timeout
+EXPORT_SYMBOL vmlinux 0x23584c08	proc_mkdir
+EXPORT_SYMBOL vmlinux 0x237cf73e	of_find_device_by_node
+EXPORT_SYMBOL vmlinux 0x237e3903	drm_poll
+EXPORT_SYMBOL vmlinux 0x2382abf6	blk_end_request_cur
+EXPORT_SYMBOL vmlinux 0x238f235e	vfs_mknod
+EXPORT_SYMBOL vmlinux 0x23904889	ethtool_op_get_flags
+EXPORT_SYMBOL vmlinux 0x23f1d9b5	bioset_integrity_create
+EXPORT_SYMBOL vmlinux 0x23fd3028	vmalloc_node
+EXPORT_SYMBOL vmlinux 0x24116dd1	i2c_smbus_read_i2c_block_data
+EXPORT_SYMBOL vmlinux 0x2459bbcc	console_set_on_cmdline
+EXPORT_SYMBOL vmlinux 0x245d3d86	pci_enable_device_mem
+EXPORT_SYMBOL vmlinux 0x24686293	proc_doulongvec_minmax
+EXPORT_SYMBOL vmlinux 0x2483f6c4	tcf_exts_validate
+EXPORT_SYMBOL vmlinux 0x248ed51f	vfs_quota_on
+EXPORT_SYMBOL vmlinux 0x24bc9b39	clear_page_dirty_for_io
+EXPORT_SYMBOL vmlinux 0x24bd930a	outsl
+EXPORT_SYMBOL vmlinux 0x24e8278e	neigh_sysctl_unregister
+EXPORT_SYMBOL vmlinux 0x24ec4ee1	cont_write_begin
+EXPORT_SYMBOL vmlinux 0x24fdac79	wake_bit_function
+EXPORT_SYMBOL vmlinux 0x250c3849	netif_rx_ni
+EXPORT_SYMBOL vmlinux 0x252310a5	bioset_integrity_free
+EXPORT_SYMBOL vmlinux 0x25253505	bio_put
+EXPORT_SYMBOL vmlinux 0x252dea42	touch_atime
+EXPORT_SYMBOL vmlinux 0x256acdb9	tty_insert_flip_string
+EXPORT_SYMBOL vmlinux 0x257430f9	pneigh_enqueue
+EXPORT_SYMBOL vmlinux 0x25820c64	fs_overflowuid
+EXPORT_SYMBOL vmlinux 0x258355b4	fb_find_best_mode
+EXPORT_SYMBOL vmlinux 0x25ae5170	kset_unregister
+EXPORT_SYMBOL vmlinux 0x25c3dbca	prom_nextprop
+EXPORT_SYMBOL vmlinux 0x25db74e7	mdesc_node_name
+EXPORT_SYMBOL vmlinux 0x25dff29e	vfs_write
+EXPORT_SYMBOL vmlinux 0x25ec6431	__mutex_init
+EXPORT_SYMBOL vmlinux 0x25ffe8e9	tty_termios_hw_change
+EXPORT_SYMBOL vmlinux 0x2624ab1c	km_state_expired
+EXPORT_SYMBOL vmlinux 0x263ee19b	sg_init_one
+EXPORT_SYMBOL vmlinux 0x263f78d6	iw_handler_get_thrspy
+EXPORT_SYMBOL vmlinux 0x2676b371	blk_unplug
+EXPORT_SYMBOL vmlinux 0x267fc65b	__tasklet_hi_schedule
+EXPORT_SYMBOL vmlinux 0x26c05ded	dput
+EXPORT_SYMBOL vmlinux 0x26cd0e9a	eth_change_mtu
+EXPORT_SYMBOL vmlinux 0x26d4f4a8	sock_i_uid
+EXPORT_SYMBOL vmlinux 0x26e76fb8	sysctl_udp_wmem_min
+EXPORT_SYMBOL vmlinux 0x270232de	create_empty_buffers
+EXPORT_SYMBOL vmlinux 0x271cc07f	mem_section
+EXPORT_SYMBOL vmlinux 0x2748a9ba	have_submounts
+EXPORT_SYMBOL vmlinux 0x275713bb	find_vma
+EXPORT_SYMBOL vmlinux 0x2762e143	pagecache_write_end
+EXPORT_SYMBOL vmlinux 0x277635da	tcp_proc_register
+EXPORT_SYMBOL vmlinux 0x27777a8f	dqput
+EXPORT_SYMBOL vmlinux 0x278177f4	pskb_copy
+EXPORT_SYMBOL vmlinux 0x27864d57	memparse
+EXPORT_SYMBOL vmlinux 0x278c8d5e	inet_dgram_connect
+EXPORT_SYMBOL vmlinux 0x27a7ba23	elv_abort_queue
+EXPORT_SYMBOL vmlinux 0x27a914a3	input_get_keycode
+EXPORT_SYMBOL vmlinux 0x27b81daa	xor_niagara_3
+EXPORT_SYMBOL vmlinux 0x27b8fe45	seq_escape
+EXPORT_SYMBOL vmlinux 0x27bbf221	disable_irq_nosync
+EXPORT_SYMBOL vmlinux 0x27c4bcc7	xfrm_state_insert
+EXPORT_SYMBOL vmlinux 0x27c61ece	qdisc_put_stab
+EXPORT_SYMBOL vmlinux 0x27cc9e3a	dev_unicast_unsync
+EXPORT_SYMBOL vmlinux 0x27ec9698	override_creds
+EXPORT_SYMBOL vmlinux 0x284850e4	blk_recount_segments
+EXPORT_SYMBOL vmlinux 0x28543a84	phy_device_register
+EXPORT_SYMBOL vmlinux 0x285ac517	strict_strtoll
+EXPORT_SYMBOL vmlinux 0x286806b9	dm_io_client_resize
+EXPORT_SYMBOL vmlinux 0x2876a6d3	memcpy_toiovec
+EXPORT_SYMBOL vmlinux 0x28d30f2e	create_proc_entry
+EXPORT_SYMBOL vmlinux 0x28e27922	ida_init
+EXPORT_SYMBOL vmlinux 0x29166aec	ip_route_output_key
+EXPORT_SYMBOL vmlinux 0x2916bf63	drm_sman_cleanup
+EXPORT_SYMBOL vmlinux 0x292c0bef	sock_no_accept
+EXPORT_SYMBOL vmlinux 0x292c6964	tcp4_gro_complete
+EXPORT_SYMBOL vmlinux 0x29537c9e	alloc_chrdev_region
+EXPORT_SYMBOL vmlinux 0x297d772e	add_disk
+EXPORT_SYMBOL vmlinux 0x29ae3296	proc_net_netfilter
+EXPORT_SYMBOL vmlinux 0x29bd4c46	__cap_init_eff_set
+EXPORT_SYMBOL vmlinux 0x29dc4be7	of_console_options
+EXPORT_SYMBOL vmlinux 0x2a195f8c	qdisc_class_hash_grow
+EXPORT_SYMBOL vmlinux 0x2a6b02b0	generic_file_aio_write
+EXPORT_SYMBOL vmlinux 0x2ae446b5	unlock_buffer
+EXPORT_SYMBOL vmlinux 0x2af34252	dmam_pool_create
+EXPORT_SYMBOL vmlinux 0x2af91a30	slow_work_enqueue
+EXPORT_SYMBOL vmlinux 0x2b0218a2	inode_add_rsv_space
+EXPORT_SYMBOL vmlinux 0x2b33874a	inet_proto_csum_replace4
+EXPORT_SYMBOL vmlinux 0x2b4a8fea	__nla_put
+EXPORT_SYMBOL vmlinux 0x2b59917d	sock_alloc_send_pskb
+EXPORT_SYMBOL vmlinux 0x2b609edc	generic_splice_sendpage
+EXPORT_SYMBOL vmlinux 0x2b6ab843	compat_nf_getsockopt
+EXPORT_SYMBOL vmlinux 0x2b6fc928	napi_frags_finish
+EXPORT_SYMBOL vmlinux 0x2b937a6f	__ret_efault
+EXPORT_SYMBOL vmlinux 0x2b9b9b79	journal_init_inode
+EXPORT_SYMBOL vmlinux 0x2b9dfc0f	cpu_core_map
+EXPORT_SYMBOL vmlinux 0x2ba707a8	sysctl_tcp_low_latency
+EXPORT_SYMBOL vmlinux 0x2bbade10	journal_wipe
+EXPORT_SYMBOL vmlinux 0x2bcd84aa	do_munmap
+EXPORT_SYMBOL vmlinux 0x2bd701b9	page_readlink
+EXPORT_SYMBOL vmlinux 0x2be2f4a8	locks_mandatory_area
+EXPORT_SYMBOL vmlinux 0x2be32652	i2c_smbus_write_block_data
+EXPORT_SYMBOL vmlinux 0x2c09b834	check_disk_size_change
+EXPORT_SYMBOL vmlinux 0x2c2c007c	wireless_spy_update
+EXPORT_SYMBOL vmlinux 0x2c788588	tcp_mtup_init
+EXPORT_SYMBOL vmlinux 0x2c86014b	vfs_readv
+EXPORT_SYMBOL vmlinux 0x2c927938	nf_afinfo
+EXPORT_SYMBOL vmlinux 0x2ca4b92b	invalidate_inodes
+EXPORT_SYMBOL vmlinux 0x2ca7be64	napi_get_frags
+EXPORT_SYMBOL vmlinux 0x2cdebd59	__insert_inode_hash
+EXPORT_SYMBOL vmlinux 0x2d0dbd99	kthread_create
+EXPORT_SYMBOL vmlinux 0x2d3ace4f	napi_gro_receive
+EXPORT_SYMBOL vmlinux 0x2d6a1d18	bio_integrity_set_tag
+EXPORT_SYMBOL vmlinux 0x2d7f9374	task_nice
+EXPORT_SYMBOL vmlinux 0x2d953cf8	__blockdev_direct_IO
+EXPORT_SYMBOL vmlinux 0x2d96f187	blk_peek_request
+EXPORT_SYMBOL vmlinux 0x2daa7939	xor_vis_4
+EXPORT_SYMBOL vmlinux 0x2de7fc0f	kobject_get
+EXPORT_SYMBOL vmlinux 0x2dec2b99	pci_pme_active
+EXPORT_SYMBOL vmlinux 0x2deee191	tcf_em_tree_validate
+EXPORT_SYMBOL vmlinux 0x2df51934	kill_anon_super
+EXPORT_SYMBOL vmlinux 0x2e123eb9	devm_ioport_map
+EXPORT_SYMBOL vmlinux 0x2e149d27	ida_pre_get
+EXPORT_SYMBOL vmlinux 0x2e1f45c0	vio_validate_sid
+EXPORT_SYMBOL vmlinux 0x2e2ce9e0	sysctl_tcp_syncookies
+EXPORT_SYMBOL vmlinux 0x2e313208	abort_exclusive_wait
+EXPORT_SYMBOL vmlinux 0x2e34e934	pci_remove_behind_bridge
+EXPORT_SYMBOL vmlinux 0x2e4a39f8	sysctl_udp_mem
+EXPORT_SYMBOL vmlinux 0x2e5c5341	tcp_md5_hash_key
+EXPORT_SYMBOL vmlinux 0x2e5e0426	tty_driver_flush_buffer
+EXPORT_SYMBOL vmlinux 0x2e79dbb3	ps2_init
+EXPORT_SYMBOL vmlinux 0x2e8194cf	tc_classify
+EXPORT_SYMBOL vmlinux 0x2eb2f903	drm_sman_free_key
+EXPORT_SYMBOL vmlinux 0x2eb4612b	netdev_class_remove_file
+EXPORT_SYMBOL vmlinux 0x2eb76dc0	bdi_set_max_ratio
+EXPORT_SYMBOL vmlinux 0x2ec01fe4	mb_cache_entry_get
+EXPORT_SYMBOL vmlinux 0x2f09d875	lro_receive_frags
+EXPORT_SYMBOL vmlinux 0x2f53038c	set_user_nice
+EXPORT_SYMBOL vmlinux 0x2f7cd09c	misc_register
+EXPORT_SYMBOL vmlinux 0x2fc19959	ida_get_new
+EXPORT_SYMBOL vmlinux 0x2fcae806	sb_min_blocksize
+EXPORT_SYMBOL vmlinux 0x2fec6dc3	bio_map_kern
+EXPORT_SYMBOL vmlinux 0x2ff493cb	mb_cache_entry_release
+EXPORT_SYMBOL vmlinux 0x300b2000	of_find_in_proplist
+EXPORT_SYMBOL vmlinux 0x3029b088	map_to_cpu
+EXPORT_SYMBOL vmlinux 0x30482488	remove_proc_entry
+EXPORT_SYMBOL vmlinux 0x304a011a	dma_pool_create
+EXPORT_SYMBOL vmlinux 0x304bc578	tc_classify_compat
+EXPORT_SYMBOL vmlinux 0x304ffb24	sock_create_lite
+EXPORT_SYMBOL vmlinux 0x30595f10	dst_alloc
+EXPORT_SYMBOL vmlinux 0x3074f033	drm_order
+EXPORT_SYMBOL vmlinux 0x307df1c1	tcf_unregister_action
+EXPORT_SYMBOL vmlinux 0x307f7776	timecompare_offset
+EXPORT_SYMBOL vmlinux 0x30820bdd	idr_get_new_above
+EXPORT_SYMBOL vmlinux 0x309943a0	wait_for_completion_killable
+EXPORT_SYMBOL vmlinux 0x30998a30	input_unregister_device
+EXPORT_SYMBOL vmlinux 0x309c9a60	sock_no_ioctl
+EXPORT_SYMBOL vmlinux 0x30c9c475	blk_rq_unmap_user
+EXPORT_SYMBOL vmlinux 0x30ff14a9	security_path_mkdir
+EXPORT_SYMBOL vmlinux 0x30ffe1f7	cancel_delayed_work_sync
+EXPORT_SYMBOL vmlinux 0x31121fe1	genl_unregister_mc_group
+EXPORT_SYMBOL vmlinux 0x312ba318	rwsem_wake
+EXPORT_SYMBOL vmlinux 0x3145216f	pci_dev_present
+EXPORT_SYMBOL vmlinux 0x3147857d	default_red
+EXPORT_SYMBOL vmlinux 0x3150e2af	pcim_iounmap_regions
+EXPORT_SYMBOL vmlinux 0x315140ea	sock_no_poll
+EXPORT_SYMBOL vmlinux 0x315d9bba	xfrm_find_acq_byseq
+EXPORT_SYMBOL vmlinux 0x316095cf	inode_claim_rsv_space
+EXPORT_SYMBOL vmlinux 0x3186bdad	pci_dma_sync_single_for_cpu
+EXPORT_SYMBOL vmlinux 0x3193ba08	__page_cache_alloc
+EXPORT_SYMBOL vmlinux 0x31955756	generic_writepages
+EXPORT_SYMBOL vmlinux 0x319cc2ae	tcp_proc_unregister
+EXPORT_SYMBOL vmlinux 0x31a2e826	tty_termios_baud_rate
+EXPORT_SYMBOL vmlinux 0x31b31f5c	csum_partial_copy_nocheck
+EXPORT_SYMBOL vmlinux 0x31d321cc	drm_idlelock_release
+EXPORT_SYMBOL vmlinux 0x31ebadcd	in_group_p
+EXPORT_SYMBOL vmlinux 0x3209ef54	pfifo_qdisc_ops
+EXPORT_SYMBOL vmlinux 0x322f2602	blk_queue_io_min
+EXPORT_SYMBOL vmlinux 0x323cefec	copy_from_user_fixup
+EXPORT_SYMBOL vmlinux 0x3271fc15	pci_reenable_device
+EXPORT_SYMBOL vmlinux 0x3285cc48	param_set_uint
+EXPORT_SYMBOL vmlinux 0x32905468	mempool_create
+EXPORT_SYMBOL vmlinux 0x32a65cfe	put_page
+EXPORT_SYMBOL vmlinux 0x32ae8b2e	key_unlink
+EXPORT_SYMBOL vmlinux 0x32bade9e	generic_file_llseek_unlocked
+EXPORT_SYMBOL vmlinux 0x32bc559f	dget_locked
+EXPORT_SYMBOL vmlinux 0x32debb16	cpumask_next_and
+EXPORT_SYMBOL vmlinux 0x32e11467	tcp_setsockopt
+EXPORT_SYMBOL vmlinux 0x32e28c0c	tty_pair_get_pty
+EXPORT_SYMBOL vmlinux 0x32f70728	drm_getsarea
+EXPORT_SYMBOL vmlinux 0x330078ac	set_page_dirty_lock
+EXPORT_SYMBOL vmlinux 0x330c571b	drm_get_resource_len
+EXPORT_SYMBOL vmlinux 0x330e70e4	sg_free_table
+EXPORT_SYMBOL vmlinux 0x33134f61	jiffies_to_timeval
+EXPORT_SYMBOL vmlinux 0x3325a691	fifo_set_limit
+EXPORT_SYMBOL vmlinux 0x332a1620	kernel_sendpage
+EXPORT_SYMBOL vmlinux 0x332c1b69	skb_queue_tail
+EXPORT_SYMBOL vmlinux 0x33316e08	mb_cache_entry_find_first
+EXPORT_SYMBOL vmlinux 0x3331b26e	flush_dcache_page
+EXPORT_SYMBOL vmlinux 0x3357c54b	netpoll_send_udp
+EXPORT_SYMBOL vmlinux 0x3364f439	dm_table_get_mode
+EXPORT_SYMBOL vmlinux 0x3372e9fb	tcp_timewait_state_process
+EXPORT_SYMBOL vmlinux 0x3399991e	file_remove_suid
+EXPORT_SYMBOL vmlinux 0x33ac453b	__xfrm_lookup
+EXPORT_SYMBOL vmlinux 0x33d7ccaf	pneigh_lookup
+EXPORT_SYMBOL vmlinux 0x33edf5ac	blk_rq_map_sg
+EXPORT_SYMBOL vmlinux 0x33f178a2	jbd2_journal_check_available_features
+EXPORT_SYMBOL vmlinux 0x33f7d5d8	generic_file_splice_read
+EXPORT_SYMBOL vmlinux 0x341154db	pci_enable_device
+EXPORT_SYMBOL vmlinux 0x341cbed2	cpu_present_mask
+EXPORT_SYMBOL vmlinux 0x34357878	tty_pair_get_tty
+EXPORT_SYMBOL vmlinux 0x3435fd73	grab_cache_page_nowait
+EXPORT_SYMBOL vmlinux 0x34572eec	key_link
+EXPORT_SYMBOL vmlinux 0x3457cb68	param_set_long
+EXPORT_SYMBOL vmlinux 0x348eff1c	filemap_fdatawait_range
+EXPORT_SYMBOL vmlinux 0x349cba85	strchr
+EXPORT_SYMBOL vmlinux 0x34a3dd45	phy_mii_ioctl
+EXPORT_SYMBOL vmlinux 0x3504f6a5	kernel_read
+EXPORT_SYMBOL vmlinux 0x352df8d0	xfrm_policy_insert
+EXPORT_SYMBOL vmlinux 0x355edd6c	generic_show_options
+EXPORT_SYMBOL vmlinux 0x357aab56	bh_submit_read
+EXPORT_SYMBOL vmlinux 0x3582ed17	vfs_stat
+EXPORT_SYMBOL vmlinux 0x358bb7da	neigh_table_clear
+EXPORT_SYMBOL vmlinux 0x35b0650f	vsnprintf
+EXPORT_SYMBOL vmlinux 0x35c2ba9e	refrigerator
+EXPORT_SYMBOL vmlinux 0x35d84066	ebus_dma_prepare
+EXPORT_SYMBOL vmlinux 0x35d91f0c	generic_file_readonly_mmap
+EXPORT_SYMBOL vmlinux 0x35f9bcb5	tty_set_operations
+EXPORT_SYMBOL vmlinux 0x360f7a7e	generic_removexattr
+EXPORT_SYMBOL vmlinux 0x36139a51	memcpy_fromiovec
+EXPORT_SYMBOL vmlinux 0x3656bf5a	lock_kernel
+EXPORT_SYMBOL vmlinux 0x36792e5c	__kfifo_put
+EXPORT_SYMBOL vmlinux 0x36875389	__timecompare_update
+EXPORT_SYMBOL vmlinux 0x36887a31	ldc_map_sg
+EXPORT_SYMBOL vmlinux 0x36a6dbc3	__set_page_dirty_nobuffers
+EXPORT_SYMBOL vmlinux 0x36df0dc3	vio_register_driver
+EXPORT_SYMBOL vmlinux 0x3707e579	__breadahead
+EXPORT_SYMBOL vmlinux 0x37242a8f	seq_path
+EXPORT_SYMBOL vmlinux 0x3744cf36	vmalloc_to_pfn
+EXPORT_SYMBOL vmlinux 0x375465a7	radix_tree_gang_lookup_tag_slot
+EXPORT_SYMBOL vmlinux 0x37781685	journal_revoke
+EXPORT_SYMBOL vmlinux 0x37a2180d	drm_sysfs_connector_remove
+EXPORT_SYMBOL vmlinux 0x37befc70	jiffies_to_msecs
+EXPORT_SYMBOL vmlinux 0x37d8dfaa	tcp_v4_md5_hash_skb
+EXPORT_SYMBOL vmlinux 0x380eb7ae	pci_find_bus
+EXPORT_SYMBOL vmlinux 0x384c4a73	kmem_cache_free
+EXPORT_SYMBOL vmlinux 0x38569593	down_read
+EXPORT_SYMBOL vmlinux 0x3864cccb	gnet_stats_finish_copy
+EXPORT_SYMBOL vmlinux 0x38710749	vfs_quota_on_path
+EXPORT_SYMBOL vmlinux 0x3880401a	__register_binfmt
+EXPORT_SYMBOL vmlinux 0x38822f97	copy_user_page
+EXPORT_SYMBOL vmlinux 0x388f9128	xfrm_state_walk_done
+EXPORT_SYMBOL vmlinux 0x3898cbb0	percpu_counter_destroy
+EXPORT_SYMBOL vmlinux 0x38ad45f5	journal_blocks_per_page
+EXPORT_SYMBOL vmlinux 0x38c62089	pci_get_bus_and_slot
+EXPORT_SYMBOL vmlinux 0x38e0a699	pcibios_bus_to_resource
+EXPORT_SYMBOL vmlinux 0x3980aac1	unregister_reboot_notifier
+EXPORT_SYMBOL vmlinux 0x39a6895b	skb_checksum_help
+EXPORT_SYMBOL vmlinux 0x39d389be	ip4_datagram_connect
+EXPORT_SYMBOL vmlinux 0x39e14282	rwsem_down_read_failed
+EXPORT_SYMBOL vmlinux 0x39e22e68	tty_port_close_start
+EXPORT_SYMBOL vmlinux 0x3a19b6aa	drm_core_get_reg_ofs
+EXPORT_SYMBOL vmlinux 0x3a2204c6	security_netlink_recv
+EXPORT_SYMBOL vmlinux 0x3a27aa6b	drm_vblank_pre_modeset
+EXPORT_SYMBOL vmlinux 0x3a5ffc92	xfrm4_rcv
+EXPORT_SYMBOL vmlinux 0x3a7a125d	gen_replace_estimator
+EXPORT_SYMBOL vmlinux 0x3a7de31a	__downgrade_write
+EXPORT_SYMBOL vmlinux 0x3a8a6f73	dquot_release
+EXPORT_SYMBOL vmlinux 0x3a919d40	gen_pool_free
+EXPORT_SYMBOL vmlinux 0x3a9a6b21	del_timer_sync
+EXPORT_SYMBOL vmlinux 0x3a9aa54d	clear_bit
+EXPORT_SYMBOL vmlinux 0x3a9b6fb9	blk_unregister_region
+EXPORT_SYMBOL vmlinux 0x3a9e50be	atomic64_sub
+EXPORT_SYMBOL vmlinux 0x3aa1bfc3	of_console_device
+EXPORT_SYMBOL vmlinux 0x3ae831b6	kref_init
+EXPORT_SYMBOL vmlinux 0x3afd87aa	kblockd_schedule_work
+EXPORT_SYMBOL vmlinux 0x3b03a24a	alloc_netdev_mq
+EXPORT_SYMBOL vmlinux 0x3b1c9147	blk_complete_request
+EXPORT_SYMBOL vmlinux 0x3b2ab3e6	of_match_device
+EXPORT_SYMBOL vmlinux 0x3b3fe8cb	prom_getsibling
+EXPORT_SYMBOL vmlinux 0x3b5e6592	fb_get_mode
+EXPORT_SYMBOL vmlinux 0x3b6d992e	dev_driver_string
+EXPORT_SYMBOL vmlinux 0x3b969b14	inode_init_once
+EXPORT_SYMBOL vmlinux 0x3bc49923	seq_bitmap_list
+EXPORT_SYMBOL vmlinux 0x3bd1b1f6	msecs_to_jiffies
+EXPORT_SYMBOL vmlinux 0x3bda1a7d	__find_get_block
+EXPORT_SYMBOL vmlinux 0x3bee03f3	generic_unplug_device
+EXPORT_SYMBOL vmlinux 0x3c02de13	mb_cache_entry_free
+EXPORT_SYMBOL vmlinux 0x3c2591d3	igrab
+EXPORT_SYMBOL vmlinux 0x3c2c5af5	sprintf
+EXPORT_SYMBOL vmlinux 0x3c533f48	generic_write_checks
+EXPORT_SYMBOL vmlinux 0x3c6f5c2c	d_lookup
+EXPORT_SYMBOL vmlinux 0x3c87a202	compat_tcp_setsockopt
+EXPORT_SYMBOL vmlinux 0x3c9a1409	drm_ht_just_insert_please
+EXPORT_SYMBOL vmlinux 0x3c9d1211	string_get_size
+EXPORT_SYMBOL vmlinux 0x3cc0a3bb	xfrm_spd_getinfo
+EXPORT_SYMBOL vmlinux 0x3cdfc582	journal_destroy
+EXPORT_SYMBOL vmlinux 0x3ce4ca6f	disable_irq
+EXPORT_SYMBOL vmlinux 0x3ce896b4	drm_do_probe_ddc_edid
+EXPORT_SYMBOL vmlinux 0x3cf44187	input_inject_event
+EXPORT_SYMBOL vmlinux 0x3d0b6b2a	of_platform_bus_type
+EXPORT_SYMBOL vmlinux 0x3d1f16d0	bio_init
+EXPORT_SYMBOL vmlinux 0x3d22a6e6	new_inode
+EXPORT_SYMBOL vmlinux 0x3d4342be	find_lock_page
+EXPORT_SYMBOL vmlinux 0x3d44f5e1	pci_claim_resource
+EXPORT_SYMBOL vmlinux 0x3d49f799	lock_sock_nested
+EXPORT_SYMBOL vmlinux 0x3d68bd4b	flow_cache_genid
+EXPORT_SYMBOL vmlinux 0x3d79772f	__getblk
+EXPORT_SYMBOL vmlinux 0x3d8728bb	memcpy_toiovecend
+EXPORT_SYMBOL vmlinux 0x3db2e258	radix_tree_gang_lookup
+EXPORT_SYMBOL vmlinux 0x3dbc000b	xfrm_init_state
+EXPORT_SYMBOL vmlinux 0x3ddf3f33	ip_mc_dec_group
+EXPORT_SYMBOL vmlinux 0x3dea224b	lock_may_read
+EXPORT_SYMBOL vmlinux 0x3e257839	update_region
+EXPORT_SYMBOL vmlinux 0x3e383385	nf_hooks
+EXPORT_SYMBOL vmlinux 0x3e45e9ff	register_inetaddr_notifier
+EXPORT_SYMBOL vmlinux 0x3e576fc4	__percpu_counter_init
+EXPORT_SYMBOL vmlinux 0x3e6cd3cc	mpage_writepage
+EXPORT_SYMBOL vmlinux 0x3e6f095a	fb_show_logo
+EXPORT_SYMBOL vmlinux 0x3e6fb4b1	pci_bus_write_config_dword
+EXPORT_SYMBOL vmlinux 0x3e746e60	cfb_imageblit
+EXPORT_SYMBOL vmlinux 0x3e7ab681	xfrm_policy_alloc
+EXPORT_SYMBOL vmlinux 0x3e84ff64	fb_get_buffer_offset
+EXPORT_SYMBOL vmlinux 0x3e899c9d	blk_limits_io_min
+EXPORT_SYMBOL vmlinux 0x3eacc3bf	generic_file_direct_write
+EXPORT_SYMBOL vmlinux 0x3ed63055	zlib_inflateReset
+EXPORT_SYMBOL vmlinux 0x3ed8aaaf	vfs_dq_transfer
+EXPORT_SYMBOL vmlinux 0x3ee4e3aa	key_revoke
+EXPORT_SYMBOL vmlinux 0x3ee75e03	_read_lock
+EXPORT_SYMBOL vmlinux 0x3ef29772	file_fsync
+EXPORT_SYMBOL vmlinux 0x3efbb736	elv_add_request
+EXPORT_SYMBOL vmlinux 0x3f2fb803	sock_wmalloc
+EXPORT_SYMBOL vmlinux 0x3f4547a7	put_unused_fd
+EXPORT_SYMBOL vmlinux 0x3f68850e	vm_map_ram
+EXPORT_SYMBOL vmlinux 0x3f88604f	of_get_parent
+EXPORT_SYMBOL vmlinux 0x3f93784a	jbd2_journal_start
+EXPORT_SYMBOL vmlinux 0x3f9a705e	bd_release
+EXPORT_SYMBOL vmlinux 0x3fa03a97	memset
+EXPORT_SYMBOL vmlinux 0x3fa913da	strspn
+EXPORT_SYMBOL vmlinux 0x3fc993fa	key_payload_reserve
+EXPORT_SYMBOL vmlinux 0x3fd88df0	mdiobus_write
+EXPORT_SYMBOL vmlinux 0x3ff62317	local_bh_disable
+EXPORT_SYMBOL vmlinux 0x4015ca78	journal_create
+EXPORT_SYMBOL vmlinux 0x402693e0	ftrace_print_flags_seq
+EXPORT_SYMBOL vmlinux 0x405c1144	get_seconds
+EXPORT_SYMBOL vmlinux 0x406f9f52	console_stop
+EXPORT_SYMBOL vmlinux 0x409f435b	make_EII_client
+EXPORT_SYMBOL vmlinux 0x40d0b0d9	lease_modify
+EXPORT_SYMBOL vmlinux 0x40d1bed3	blk_rq_map_kern
+EXPORT_SYMBOL vmlinux 0x40e2a0f3	blk_integrity_register
+EXPORT_SYMBOL vmlinux 0x4101bbde	param_set_copystring
+EXPORT_SYMBOL vmlinux 0x4108e69a	fb_match_mode
+EXPORT_SYMBOL vmlinux 0x41116f2a	sock_kmalloc
+EXPORT_SYMBOL vmlinux 0x41166725	inet_frags_init_net
+EXPORT_SYMBOL vmlinux 0x41344088	param_get_charp
+EXPORT_SYMBOL vmlinux 0x41482d8b	strndup_user
+EXPORT_SYMBOL vmlinux 0x414d4afc	i2c_smbus_read_byte_data
+EXPORT_SYMBOL vmlinux 0x415c26ee	arp_find
+EXPORT_SYMBOL vmlinux 0x416983d9	netdev_fix_features
+EXPORT_SYMBOL vmlinux 0x417883b2	drm_exit
+EXPORT_SYMBOL vmlinux 0x4188d439	neigh_rand_reach_time
+EXPORT_SYMBOL vmlinux 0x418ae1ea	vm_insert_pfn
+EXPORT_SYMBOL vmlinux 0x41bd4961	pipe_unlock
+EXPORT_SYMBOL vmlinux 0x41f4d788	tcp_parse_options
+EXPORT_SYMBOL vmlinux 0x41f8cfe8	__devm_release_region
+EXPORT_SYMBOL vmlinux 0x4211c3c1	zlib_inflateInit2
+EXPORT_SYMBOL vmlinux 0x4217a5d6	commit_creds
+EXPORT_SYMBOL vmlinux 0x421d8984	jbd2_journal_restart
+EXPORT_SYMBOL vmlinux 0x42224298	sscanf
+EXPORT_SYMBOL vmlinux 0x4236bb73	__put_cred
+EXPORT_SYMBOL vmlinux 0x42603efa	invalidate_bdev
+EXPORT_SYMBOL vmlinux 0x42609ae1	journal_clear_err
+EXPORT_SYMBOL vmlinux 0x4269c712	simple_rename
+EXPORT_SYMBOL vmlinux 0x42754ea7	dm_table_get_size
+EXPORT_SYMBOL vmlinux 0x427df405	unregister_console
+EXPORT_SYMBOL vmlinux 0x4285cd43	drm_connector_init
+EXPORT_SYMBOL vmlinux 0x428e5885	call_usermodehelper_setkeys
+EXPORT_SYMBOL vmlinux 0x42a4bdf2	in_egroup_p
+EXPORT_SYMBOL vmlinux 0x42acbf72	posix_acl_from_xattr
+EXPORT_SYMBOL vmlinux 0x42fbfcea	compat_sock_get_timestampns
+EXPORT_SYMBOL vmlinux 0x4302d0eb	free_pages
+EXPORT_SYMBOL vmlinux 0x430550da	tty_vhangup
+EXPORT_SYMBOL vmlinux 0x430826d5	netlink_set_err
+EXPORT_SYMBOL vmlinux 0x430946c0	unlock_new_inode
+EXPORT_SYMBOL vmlinux 0x431f71d1	dmam_free_coherent
+EXPORT_SYMBOL vmlinux 0x4333eadb	param_set_short
+EXPORT_SYMBOL vmlinux 0x433ab4a0	gen_pool_add
+EXPORT_SYMBOL vmlinux 0x434fa55c	release_console_sem
+EXPORT_SYMBOL vmlinux 0x4355e1e4	vfs_rmdir
+EXPORT_SYMBOL vmlinux 0x43714373	per_cpu__ftrace_event_seq
+EXPORT_SYMBOL vmlinux 0x439090b9	kernel_thread
+EXPORT_SYMBOL vmlinux 0x4390963e	may_umount_tree
+EXPORT_SYMBOL vmlinux 0x43a4938f	vm_get_page_prot
+EXPORT_SYMBOL vmlinux 0x43a93d44	clip_tbl_hook
+EXPORT_SYMBOL vmlinux 0x43ab66c3	param_array_get
+EXPORT_SYMBOL vmlinux 0x43bd951d	__dec_zone_page_state
+EXPORT_SYMBOL vmlinux 0x43bea045	auxio_register
+EXPORT_SYMBOL vmlinux 0x43d0a104	pci_unmap_single
+EXPORT_SYMBOL vmlinux 0x43e9880f	netdev_set_master
+EXPORT_SYMBOL vmlinux 0x43ec913a	put_cmsg
+EXPORT_SYMBOL vmlinux 0x43ff30cd	sg_alloc_table
+EXPORT_SYMBOL vmlinux 0x44161c19	unregister_shrinker
+EXPORT_SYMBOL vmlinux 0x441ba981	ip_nat_decode_session
+EXPORT_SYMBOL vmlinux 0x44201218	pci_unregister_driver
+EXPORT_SYMBOL vmlinux 0x4444d916	__dst_free
+EXPORT_SYMBOL vmlinux 0x444779c4	nla_find
+EXPORT_SYMBOL vmlinux 0x44491fb5	input_free_device
+EXPORT_SYMBOL vmlinux 0x444decf4	sock_create
+EXPORT_SYMBOL vmlinux 0x44587b3a	security_path_rmdir
+EXPORT_SYMBOL vmlinux 0x447d4184	kobject_add
+EXPORT_SYMBOL vmlinux 0x447f7e18	sun4v_niagara2_getperf
+EXPORT_SYMBOL vmlinux 0x448597d2	__mod_zone_page_state
+EXPORT_SYMBOL vmlinux 0x44b17c21	phy_register_fixup_for_uid
+EXPORT_SYMBOL vmlinux 0x44b911c3	rb_replace_node
+EXPORT_SYMBOL vmlinux 0x44c44ea0	skb_pad
+EXPORT_SYMBOL vmlinux 0x44cbd604	kernel_recvmsg
+EXPORT_SYMBOL vmlinux 0x44dda878	jbd2_journal_dirty_metadata
+EXPORT_SYMBOL vmlinux 0x44e4f529	netlink_kernel_create
+EXPORT_SYMBOL vmlinux 0x44e5490a	drm_pci_alloc
+EXPORT_SYMBOL vmlinux 0x44e9a829	match_token
+EXPORT_SYMBOL vmlinux 0x44f1ba03	backlight_device_register
+EXPORT_SYMBOL vmlinux 0x450d39ec	pci_fixup_cardbus
+EXPORT_SYMBOL vmlinux 0x45203045	dm_get_device
+EXPORT_SYMBOL vmlinux 0x453cfa57	nf_hook_slow
+EXPORT_SYMBOL vmlinux 0x454cbd8e	mdesc_release
+EXPORT_SYMBOL vmlinux 0x4550ba8a	register_cpu_notifier
+EXPORT_SYMBOL vmlinux 0x45704798	print_hex_dump_bytes
+EXPORT_SYMBOL vmlinux 0x4575315d	utf8s_to_utf16s
+EXPORT_SYMBOL vmlinux 0x4576ae13	rtnl_unicast
+EXPORT_SYMBOL vmlinux 0x4588b7f0	tcp4_gro_receive
+EXPORT_SYMBOL vmlinux 0x45947727	param_array_set
+EXPORT_SYMBOL vmlinux 0x45b085f7	security_path_symlink
+EXPORT_SYMBOL vmlinux 0x45dff93f	tcp_poll
+EXPORT_SYMBOL vmlinux 0x4604267c	phy_connect
+EXPORT_SYMBOL vmlinux 0x4616e126	pci_set_dma_max_seg_size
+EXPORT_SYMBOL vmlinux 0x462ec101	vfsmount_lock
+EXPORT_SYMBOL vmlinux 0x466c14a7	__delay
+EXPORT_SYMBOL vmlinux 0x46e9bd57	phy_attach
+EXPORT_SYMBOL vmlinux 0x46f9d217	dquot_transfer
+EXPORT_SYMBOL vmlinux 0x470e1f9b	dev_gro_receive
+EXPORT_SYMBOL vmlinux 0x472e70dd	kmem_cache_alloc_node
+EXPORT_SYMBOL vmlinux 0x475100c2	inet_get_local_port_range
+EXPORT_SYMBOL vmlinux 0x475f00db	blk_plug_device
+EXPORT_SYMBOL vmlinux 0x479c3c86	find_next_zero_bit
+EXPORT_SYMBOL vmlinux 0x47c054db	wake_up_process
+EXPORT_SYMBOL vmlinux 0x4841c196	generic_file_buffered_write
+EXPORT_SYMBOL vmlinux 0x48427c09	I_BDEV
+EXPORT_SYMBOL vmlinux 0x4859b8bb	rtc_year_days
+EXPORT_SYMBOL vmlinux 0x486b6407	hweight64
+EXPORT_SYMBOL vmlinux 0x487bafa9	drm_gem_handle_create
+EXPORT_SYMBOL vmlinux 0x487fea2d	inet_csk_clear_xmit_timers
+EXPORT_SYMBOL vmlinux 0x48845b65	pipe_to_file
+EXPORT_SYMBOL vmlinux 0x48a11e3d	tty_port_tty_set
+EXPORT_SYMBOL vmlinux 0x48a830cc	invalidate_inode_buffers
+EXPORT_SYMBOL vmlinux 0x48abea31	xfrm_policy_bysel_ctx
+EXPORT_SYMBOL vmlinux 0x48c1d080	tcp_parse_md5sig_option
+EXPORT_SYMBOL vmlinux 0x48d27561	nf_unregister_queue_handler
+EXPORT_SYMBOL vmlinux 0x48d3597b	vio_control_pkt_engine
+EXPORT_SYMBOL vmlinux 0x48e20899	journal_lock_updates
+EXPORT_SYMBOL vmlinux 0x4904c516	bio_unmap_user
+EXPORT_SYMBOL vmlinux 0x490816d5	i2c_smbus_read_block_data
+EXPORT_SYMBOL vmlinux 0x492a35c2	dcache_dir_close
+EXPORT_SYMBOL vmlinux 0x492b7afa	dec_zone_page_state
+EXPORT_SYMBOL vmlinux 0x49439411	genl_unregister_family
+EXPORT_SYMBOL vmlinux 0x494630c8	blk_make_request
+EXPORT_SYMBOL vmlinux 0x49491891	drm_gem_object_alloc
+EXPORT_SYMBOL vmlinux 0x49582b39	netdev_class_create_file
+EXPORT_SYMBOL vmlinux 0x495f800a	delayed_slow_work_enqueue
+EXPORT_SYMBOL vmlinux 0x49603fb8	security_sb_copy_data
+EXPORT_SYMBOL vmlinux 0x497186d8	__init_rwsem
+EXPORT_SYMBOL vmlinux 0x49e182c0	param_get_string
+EXPORT_SYMBOL vmlinux 0x4a12b958	fb_set_cmap
+EXPORT_SYMBOL vmlinux 0x4a142d5c	rwsem_down_write_failed
+EXPORT_SYMBOL vmlinux 0x4a15ae23	prom_node_has_property
+EXPORT_SYMBOL vmlinux 0x4a1e8e95	pid_task
+EXPORT_SYMBOL vmlinux 0x4a2a5504	lock_fb_info
+EXPORT_SYMBOL vmlinux 0x4a358252	__bitmap_subset
+EXPORT_SYMBOL vmlinux 0x4a825254	vfs_create
+EXPORT_SYMBOL vmlinux 0x4a93acd7	tcf_em_tree_destroy
+EXPORT_SYMBOL vmlinux 0x4a952fba	drm_add_edid_modes
+EXPORT_SYMBOL vmlinux 0x4ac951a7	pci_fixup_device
+EXPORT_SYMBOL vmlinux 0x4acd93d3	release_resource
+EXPORT_SYMBOL vmlinux 0x4ad42e66	dm_io_client_create
+EXPORT_SYMBOL vmlinux 0x4ae4c4c4	user_path_at
+EXPORT_SYMBOL vmlinux 0x4ae53432	drm_crtc_cleanup
+EXPORT_SYMBOL vmlinux 0x4b22c4f3	block_truncate_page
+EXPORT_SYMBOL vmlinux 0x4b355190	inet_frags_exit_net
+EXPORT_SYMBOL vmlinux 0x4b481d2e	ethtool_op_set_ufo
+EXPORT_SYMBOL vmlinux 0x4b4d5848	xfrm_state_delete
+EXPORT_SYMBOL vmlinux 0x4ba22ce5	dquot_free_space
+EXPORT_SYMBOL vmlinux 0x4ba71229	__skb_recv_datagram
+EXPORT_SYMBOL vmlinux 0x4bbc0db8	simple_lookup
+EXPORT_SYMBOL vmlinux 0x4bde5ddf	block_write_end
+EXPORT_SYMBOL vmlinux 0x4be43967	blk_sync_queue
+EXPORT_SYMBOL vmlinux 0x4be9371f	of_phy_connect_fixed_link
+EXPORT_SYMBOL vmlinux 0x4bf46b56	per_cpu__softnet_data
+EXPORT_SYMBOL vmlinux 0x4c1182cb	bitmap_scnprintf
+EXPORT_SYMBOL vmlinux 0x4c366183	i2c_smbus_write_byte
+EXPORT_SYMBOL vmlinux 0x4c4c956e	nla_memcmp
+EXPORT_SYMBOL vmlinux 0x4c58cebb	skb_unlink
+EXPORT_SYMBOL vmlinux 0x4ca942d5	kfifo_alloc
+EXPORT_SYMBOL vmlinux 0x4cab3e2e	skb_queue_head
+EXPORT_SYMBOL vmlinux 0x4cb14aca	block_write_full_page_endio
+EXPORT_SYMBOL vmlinux 0x4cbbd171	__bitmap_weight
+EXPORT_SYMBOL vmlinux 0x4cbda2bf	prom_setprop
+EXPORT_SYMBOL vmlinux 0x4cf17492	of_dev_get
+EXPORT_SYMBOL vmlinux 0x4cf6cf22	stop_tty
+EXPORT_SYMBOL vmlinux 0x4d0a82f3	simple_fill_super
+EXPORT_SYMBOL vmlinux 0x4d0d3a48	xfrm_state_alloc
+EXPORT_SYMBOL vmlinux 0x4d25c04e	drm_gem_mmap
+EXPORT_SYMBOL vmlinux 0x4d374a8d	register_gifconf
+EXPORT_SYMBOL vmlinux 0x4d921195	__vlan_hwaccel_rx
+EXPORT_SYMBOL vmlinux 0x4db59d18	seq_release_private
+EXPORT_SYMBOL vmlinux 0x4db9efc9	i2c_register_driver
+EXPORT_SYMBOL vmlinux 0x4dc45be9	nf_log_unbind_pf
+EXPORT_SYMBOL vmlinux 0x4dda726b	match_strlcpy
+EXPORT_SYMBOL vmlinux 0x4ddddd7f	inet_csk_delete_keepalive_timer
+EXPORT_SYMBOL vmlinux 0x4de2c8be	generic_block_bmap
+EXPORT_SYMBOL vmlinux 0x4df119fa	__bitmap_parse
+EXPORT_SYMBOL vmlinux 0x4e069249	security_tun_dev_post_create
+EXPORT_SYMBOL vmlinux 0x4e0a5be1	of_register_driver
+EXPORT_SYMBOL vmlinux 0x4e3567f7	match_int
+EXPORT_SYMBOL vmlinux 0x4e5d5f82	napi_frags_skb
+EXPORT_SYMBOL vmlinux 0x4e6e8ea7	fg_console
+EXPORT_SYMBOL vmlinux 0x4e72d780	jbd2_journal_start_commit
+EXPORT_SYMBOL vmlinux 0x4e9dffb5	ip_fast_csum
+EXPORT_SYMBOL vmlinux 0x4eab2faa	simple_sync_file
+EXPORT_SYMBOL vmlinux 0x4eb2b85a	__skb_checksum_complete_head
+EXPORT_SYMBOL vmlinux 0x4ec1a123	simple_write_end
+EXPORT_SYMBOL vmlinux 0x4edd72f7	block_all_signals
+EXPORT_SYMBOL vmlinux 0x4ef860f6	genphy_read_status
+EXPORT_SYMBOL vmlinux 0x4f1cd128	security_tun_dev_create
+EXPORT_SYMBOL vmlinux 0x4f371cd6	posix_lock_file
+EXPORT_SYMBOL vmlinux 0x4f563f4f	qdisc_create_dflt
+EXPORT_SYMBOL vmlinux 0x4f7c699d	get_sb_pseudo
+EXPORT_SYMBOL vmlinux 0x4f8cee0c	mdiobus_read
+EXPORT_SYMBOL vmlinux 0x4fb8606e	open_exec
+EXPORT_SYMBOL vmlinux 0x4fbaa13a	__wait_on_buffer
+EXPORT_SYMBOL vmlinux 0x4fdee897	i8042_command
+EXPORT_SYMBOL vmlinux 0x4ff975b3	elv_dispatch_sort
+EXPORT_SYMBOL vmlinux 0x5007241e	filp_close
+EXPORT_SYMBOL vmlinux 0x501378f6	set_create_files_as
+EXPORT_SYMBOL vmlinux 0x50211ee3	tcp_free_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x503fd781	redraw_screen
+EXPORT_SYMBOL vmlinux 0x506746b6	getrawmonotonic
+EXPORT_SYMBOL vmlinux 0x507feef4	dquot_mark_dquot_dirty
+EXPORT_SYMBOL vmlinux 0x5083e778	drm_lock_free
+EXPORT_SYMBOL vmlinux 0x50a5e82f	of_set_property
+EXPORT_SYMBOL vmlinux 0x50d56018	posix_acl_equiv_mode
+EXPORT_SYMBOL vmlinux 0x50da30a2	dcache_lock
+EXPORT_SYMBOL vmlinux 0x5118c382	secure_dccp_sequence_number
+EXPORT_SYMBOL vmlinux 0x513107be	sock_no_setsockopt
+EXPORT_SYMBOL vmlinux 0x513332b2	bio_integrity_clone
+EXPORT_SYMBOL vmlinux 0x513c6e64	tcp_make_synack
+EXPORT_SYMBOL vmlinux 0x513cf2c4	phy_stop_interrupts
+EXPORT_SYMBOL vmlinux 0x51991db0	iget_failed
+EXPORT_SYMBOL vmlinux 0x5199af4d	bdi_register
+EXPORT_SYMBOL vmlinux 0x51bc5ae3	i2c_bit_add_bus
+EXPORT_SYMBOL vmlinux 0x51dce73b	xfrm_state_walk_init
+EXPORT_SYMBOL vmlinux 0x52026cdf	security_sb_parse_opts_str
+EXPORT_SYMBOL vmlinux 0x52046e13	atomic_sub
+EXPORT_SYMBOL vmlinux 0x5208d2a1	journal_get_undo_access
+EXPORT_SYMBOL vmlinux 0x5251cae4	prom_getbool
+EXPORT_SYMBOL vmlinux 0x5262bbac	uart_remove_one_port
+EXPORT_SYMBOL vmlinux 0x52760ca9	getnstimeofday
+EXPORT_SYMBOL vmlinux 0x52a58c24	ifla_policy
+EXPORT_SYMBOL vmlinux 0x52c37c6a	vfs_llseek
+EXPORT_SYMBOL vmlinux 0x52c9e538	ip_mc_join_group
+EXPORT_SYMBOL vmlinux 0x52e93605	filemap_flush
+EXPORT_SYMBOL vmlinux 0x52ebb126	param_get_ushort
+EXPORT_SYMBOL vmlinux 0x53154cb4	neigh_seq_stop
+EXPORT_SYMBOL vmlinux 0x53326531	mempool_alloc_pages
+EXPORT_SYMBOL vmlinux 0x533903d8	outsw
+EXPORT_SYMBOL vmlinux 0x5345a508	drm_connector_property_set_value
+EXPORT_SYMBOL vmlinux 0x5355776c	drm_master_put
+EXPORT_SYMBOL vmlinux 0x535bbc4c	netpoll_setup
+EXPORT_SYMBOL vmlinux 0x536a8239	qdisc_calculate_pkt_len
+EXPORT_SYMBOL vmlinux 0x5385e5dd	inode_needs_sync
+EXPORT_SYMBOL vmlinux 0x538ef4a9	bfifo_qdisc_ops
+EXPORT_SYMBOL vmlinux 0x53b09143	tcp_v4_remember_stamp
+EXPORT_SYMBOL vmlinux 0x53c0767c	sk_chk_filter
+EXPORT_SYMBOL vmlinux 0x53e0ea85	brioctl_set
+EXPORT_SYMBOL vmlinux 0x53e5eaa7	tty_port_init
+EXPORT_SYMBOL vmlinux 0x53f823a0	loop_register_transfer
+EXPORT_SYMBOL vmlinux 0x540c861f	sk_stream_wait_close
+EXPORT_SYMBOL vmlinux 0x5424c3c2	udplite_prot
+EXPORT_SYMBOL vmlinux 0x54290dc9	nla_validate
+EXPORT_SYMBOL vmlinux 0x5447c48c	mem_map_zero
+EXPORT_SYMBOL vmlinux 0x544f520b	jbd2_journal_init_inode
+EXPORT_SYMBOL vmlinux 0x5467508e	deny_write_access
+EXPORT_SYMBOL vmlinux 0x5492c604	prepare_to_wait
+EXPORT_SYMBOL vmlinux 0x54c96418	iput
+EXPORT_SYMBOL vmlinux 0x54e6fcdd	net_enable_timestamp
+EXPORT_SYMBOL vmlinux 0x55131238	kern_path
+EXPORT_SYMBOL vmlinux 0x55205c45	vfs_unlink
+EXPORT_SYMBOL vmlinux 0x5530c9b4	cdev_init
+EXPORT_SYMBOL vmlinux 0x554f0a48	groups_alloc
+EXPORT_SYMBOL vmlinux 0x5553a283	blk_init_queue_node
+EXPORT_SYMBOL vmlinux 0x555cfde4	tcf_hash_insert
+EXPORT_SYMBOL vmlinux 0x556db901	xor_vis_5
+EXPORT_SYMBOL vmlinux 0x558bdb1d	dquot_alloc_space
+EXPORT_SYMBOL vmlinux 0x558be663	of_find_node_by_name
+EXPORT_SYMBOL vmlinux 0x5591a74f	sock_tx_timestamp
+EXPORT_SYMBOL vmlinux 0x5594be03	bitmap_remap
+EXPORT_SYMBOL vmlinux 0x55a286bf	proc_dointvec_minmax
+EXPORT_SYMBOL vmlinux 0x55af4621	revert_creds
+EXPORT_SYMBOL vmlinux 0x55e43a74	sock_recvmsg
+EXPORT_SYMBOL vmlinux 0x55f060ee	drm_sman_set_range
+EXPORT_SYMBOL vmlinux 0x5600904f	fb_get_color_depth
+EXPORT_SYMBOL vmlinux 0x5603cf43	do_settimeofday
+EXPORT_SYMBOL vmlinux 0x56073ca1	pci_prepare_to_sleep
+EXPORT_SYMBOL vmlinux 0x5614b010	xfrm_policy_walk_done
+EXPORT_SYMBOL vmlinux 0x5635a60a	vmalloc_user
+EXPORT_SYMBOL vmlinux 0x563b659a	d_find_alias
+EXPORT_SYMBOL vmlinux 0x566f7c4d	jbd2_log_start_commit
+EXPORT_SYMBOL vmlinux 0x56791257	ebus_dma_enable
+EXPORT_SYMBOL vmlinux 0x5687958e	gen_pool_create
+EXPORT_SYMBOL vmlinux 0x5688db69	qdisc_watchdog_schedule
+EXPORT_SYMBOL vmlinux 0x568dabf9	vfs_path_lookup
+EXPORT_SYMBOL vmlinux 0x56b491ad	tty_driver_kref_put
+EXPORT_SYMBOL vmlinux 0x56bb97b8	of_phy_connect
+EXPORT_SYMBOL vmlinux 0x56cda35a	sun4v_niagara2_setperf
+EXPORT_SYMBOL vmlinux 0x56def783	journal_force_commit_nested
+EXPORT_SYMBOL vmlinux 0x56f38712	schedule_delayed_work_on
+EXPORT_SYMBOL vmlinux 0x56f494e0	smp_call_function
+EXPORT_SYMBOL vmlinux 0x570368be	netdev_features_change
+EXPORT_SYMBOL vmlinux 0x570f0f41	_atomic_dec_and_lock
+EXPORT_SYMBOL vmlinux 0x57128b9a	seq_puts
+EXPORT_SYMBOL vmlinux 0x5715991d	skb_queue_purge
+EXPORT_SYMBOL vmlinux 0x572e85d4	blk_lookup_devt
+EXPORT_SYMBOL vmlinux 0x57610f72	blk_queue_logical_block_size
+EXPORT_SYMBOL vmlinux 0x577f4bff	do_BUG
+EXPORT_SYMBOL vmlinux 0x57b57ebe	jiffies_to_timespec
+EXPORT_SYMBOL vmlinux 0x57ce0aaa	drm_vblank_cleanup
+EXPORT_SYMBOL vmlinux 0x57db7242	mangle_path
+EXPORT_SYMBOL vmlinux 0x57f7c686	sparc64_valid_addr_bitmap
+EXPORT_SYMBOL vmlinux 0x57fd3d96	invalidate_mapping_pages
+EXPORT_SYMBOL vmlinux 0x5804b593	kthread_stop
+EXPORT_SYMBOL vmlinux 0x580830f0	drm_mode_set_name
+EXPORT_SYMBOL vmlinux 0x582fef16	auxio_set_lte
+EXPORT_SYMBOL vmlinux 0x5838f6c9	rtc_valid_tm
+EXPORT_SYMBOL vmlinux 0x58713c0f	drm_mode_create_dvi_i_properties
+EXPORT_SYMBOL vmlinux 0x589db653	cdev_index
+EXPORT_SYMBOL vmlinux 0x58b032d5	phy_start
+EXPORT_SYMBOL vmlinux 0x58f2e183	bio_free
+EXPORT_SYMBOL vmlinux 0x590185ed	pcibios_resource_to_bus
+EXPORT_SYMBOL vmlinux 0x59245a7b	vm_insert_page
+EXPORT_SYMBOL vmlinux 0x592da168	vfs_symlink
+EXPORT_SYMBOL vmlinux 0x5934392b	fb_register_client
+EXPORT_SYMBOL vmlinux 0x59353640	dquot_alloc_inode
+EXPORT_SYMBOL vmlinux 0x593ea8f7	__wait_on_bit
+EXPORT_SYMBOL vmlinux 0x594bf15b	ioport_map
+EXPORT_SYMBOL vmlinux 0x599ac0ce	bmap
+EXPORT_SYMBOL vmlinux 0x59c2d144	filemap_write_and_wait
+EXPORT_SYMBOL vmlinux 0x59d696b6	register_module_notifier
+EXPORT_SYMBOL vmlinux 0x59f11799	registered_fb
+EXPORT_SYMBOL vmlinux 0x59fd859c	inet_frag_find
+EXPORT_SYMBOL vmlinux 0x5a34a45c	__kmalloc
+EXPORT_SYMBOL vmlinux 0x5a56a66f	kmem_ptr_validate
+EXPORT_SYMBOL vmlinux 0x5a59581d	remap_vmalloc_range
+EXPORT_SYMBOL vmlinux 0x5a5e7ea3	simple_read_from_buffer
+EXPORT_SYMBOL vmlinux 0x5a634dce	wait_for_completion_interruptible_timeout
+EXPORT_SYMBOL vmlinux 0x5a65ea88	lro_flush_pkt
+EXPORT_SYMBOL vmlinux 0x5a744b86	netlink_set_nonroot
+EXPORT_SYMBOL vmlinux 0x5a779140	__up_read
+EXPORT_SYMBOL vmlinux 0x5a9fb8a2	devm_ioremap_nocache
+EXPORT_SYMBOL vmlinux 0x5ab259b2	sock_wake_async
+EXPORT_SYMBOL vmlinux 0x5aca6798	dev_mc_delete
+EXPORT_SYMBOL vmlinux 0x5adfe1a1	drm_mm_get_block_range_generic
+EXPORT_SYMBOL vmlinux 0x5afc5b07	generic_setxattr
+EXPORT_SYMBOL vmlinux 0x5b0e981b	wait_for_completion
+EXPORT_SYMBOL vmlinux 0x5b172115	uart_write_wakeup
+EXPORT_SYMBOL vmlinux 0x5b27bcec	sysctl_intvec
+EXPORT_SYMBOL vmlinux 0x5b646444	jbd2_journal_clear_features
+EXPORT_SYMBOL vmlinux 0x5b68b60d	__xfrm_route_forward
+EXPORT_SYMBOL vmlinux 0x5b781bda	call_usermodehelper_exec
+EXPORT_SYMBOL vmlinux 0x5b7fb520	filemap_fdatawait
+EXPORT_SYMBOL vmlinux 0x5b9c4444	xfrm_state_add
+EXPORT_SYMBOL vmlinux 0x5ba4ad73	get_sb_single
+EXPORT_SYMBOL vmlinux 0x5baa5800	tty_termios_input_baud_rate
+EXPORT_SYMBOL vmlinux 0x5bb114a7	shrink_dcache_parent
+EXPORT_SYMBOL vmlinux 0x5bf30054	dentry_open
+EXPORT_SYMBOL vmlinux 0x5c109caf	journal_restart
+EXPORT_SYMBOL vmlinux 0x5c2b2c44	blk_init_queue
+EXPORT_SYMBOL vmlinux 0x5c63c642	__locks_copy_lock
+EXPORT_SYMBOL vmlinux 0x5c7d7674	ps2_handle_ack
+EXPORT_SYMBOL vmlinux 0x5c88c283	km_new_mapping
+EXPORT_SYMBOL vmlinux 0x5c93ef10	d_splice_alias
+EXPORT_SYMBOL vmlinux 0x5ca4a0a8	dump_fpu
+EXPORT_SYMBOL vmlinux 0x5ca530d5	__lookup_one_len
+EXPORT_SYMBOL vmlinux 0x5cbdf77f	gnet_stats_copy_basic
+EXPORT_SYMBOL vmlinux 0x5cc8e015	iov_iter_single_seg_count
+EXPORT_SYMBOL vmlinux 0x5ce875cf	prom_root_node
+EXPORT_SYMBOL vmlinux 0x5d0aca72	phy_device_create
+EXPORT_SYMBOL vmlinux 0x5d12b3fc	twl4030_i2c_write_u8
+EXPORT_SYMBOL vmlinux 0x5d4d0e26	__csum_partial_copy_from_user
+EXPORT_SYMBOL vmlinux 0x5d5e6dd8	netdev_state_change
+EXPORT_SYMBOL vmlinux 0x5d8eee79	inet_getname
+EXPORT_SYMBOL vmlinux 0x5d970715	serio_open
+EXPORT_SYMBOL vmlinux 0x5dbbe98e	memmove
+EXPORT_SYMBOL vmlinux 0x5dc75a22	block_write_full_page
+EXPORT_SYMBOL vmlinux 0x5dcdcd0b	jbd2_journal_errno
+EXPORT_SYMBOL vmlinux 0x5dcfa8bb	jbd2_journal_abort
+EXPORT_SYMBOL vmlinux 0x5de23bf9	netif_device_attach
+EXPORT_SYMBOL vmlinux 0x5dfb248f	bh_uptodate_or_lock
+EXPORT_SYMBOL vmlinux 0x5e0f1ee1	inet_ioctl
+EXPORT_SYMBOL vmlinux 0x5e282522	tcp_rcv_established
+EXPORT_SYMBOL vmlinux 0x5e4bef15	seq_release
+EXPORT_SYMBOL vmlinux 0x5e85bb7f	eth_type_trans
+EXPORT_SYMBOL vmlinux 0x5e95b1cd	current_umask
+EXPORT_SYMBOL vmlinux 0x5ea520c5	tcp_select_initial_window
+EXPORT_SYMBOL vmlinux 0x5ea565bb	set_page_dirty
+EXPORT_SYMBOL vmlinux 0x5ec0e2a4	sg_copy_to_buffer
+EXPORT_SYMBOL vmlinux 0x5ec64b99	netdev_bonding_change
+EXPORT_SYMBOL vmlinux 0x5ec91030	unregister_qdisc
+EXPORT_SYMBOL vmlinux 0x5ed040b0	pm_set_vt_switch
+EXPORT_SYMBOL vmlinux 0x5ed14607	i2c_add_adapter
+EXPORT_SYMBOL vmlinux 0x5ed52c2d	clear_user_page
+EXPORT_SYMBOL vmlinux 0x5edd0762	bin2bcd
+EXPORT_SYMBOL vmlinux 0x5ee0a984	prom_getchild
+EXPORT_SYMBOL vmlinux 0x5ee606ac	save_mount_options
+EXPORT_SYMBOL vmlinux 0x5ef954dc	__bforget
+EXPORT_SYMBOL vmlinux 0x5f1c5e9d	vio_link_state_change
+EXPORT_SYMBOL vmlinux 0x5f227e48	nf_register_sockopt
+EXPORT_SYMBOL vmlinux 0x5f2d1f55	simple_transaction_read
+EXPORT_SYMBOL vmlinux 0x5f619c78	__netdev_alloc_page
+EXPORT_SYMBOL vmlinux 0x5f75e1ca	__bio_clone
+EXPORT_SYMBOL vmlinux 0x5fbb2089	pcix_get_mmrbc
+EXPORT_SYMBOL vmlinux 0x5fbd8363	lock_rename
+EXPORT_SYMBOL vmlinux 0x5fd372f8	genphy_config_aneg
+EXPORT_SYMBOL vmlinux 0x5fe12acf	drm_mm_clean
+EXPORT_SYMBOL vmlinux 0x600683d3	do_unblank_screen
+EXPORT_SYMBOL vmlinux 0x60230fab	ip_setsockopt
+EXPORT_SYMBOL vmlinux 0x605c8bde	radix_tree_delete
+EXPORT_SYMBOL vmlinux 0x6067a146	memcpy
+EXPORT_SYMBOL vmlinux 0x6072b5ac	bio_kmalloc
+EXPORT_SYMBOL vmlinux 0x6087983a	journal_check_used_features
+EXPORT_SYMBOL vmlinux 0x608fd39b	blk_get_backing_dev_info
+EXPORT_SYMBOL vmlinux 0x609f1c7e	synchronize_net
+EXPORT_SYMBOL vmlinux 0x60a0ebad	__tracepoint_kmem_cache_alloc_node
+EXPORT_SYMBOL vmlinux 0x60a32ea9	pm_power_off
+EXPORT_SYMBOL vmlinux 0x60bef811	security_task_getsecid
+EXPORT_SYMBOL vmlinux 0x612390ad	netpoll_set_trap
+EXPORT_SYMBOL vmlinux 0x61240d43	__sg_free_table
+EXPORT_SYMBOL vmlinux 0x61492452	do_SAK
+EXPORT_SYMBOL vmlinux 0x614d53bd	mnt_unpin
+EXPORT_SYMBOL vmlinux 0x615e7697	blk_put_request
+EXPORT_SYMBOL vmlinux 0x61631977	__pci_register_driver
+EXPORT_SYMBOL vmlinux 0x6178cb06	inet_put_port
+EXPORT_SYMBOL vmlinux 0x618d8299	set_notify_swap_entry_free
+EXPORT_SYMBOL vmlinux 0x61938b97	blk_get_request
+EXPORT_SYMBOL vmlinux 0x61a2b67f	vga_client_register
+EXPORT_SYMBOL vmlinux 0x61ab7ee8	try_to_release_page
+EXPORT_SYMBOL vmlinux 0x61ac35ac	ida_destroy
+EXPORT_SYMBOL vmlinux 0x61b7b126	simple_strtoull
+EXPORT_SYMBOL vmlinux 0x61d20038	netlink_ack
+EXPORT_SYMBOL vmlinux 0x61f337f2	dm_table_unplug_all
+EXPORT_SYMBOL vmlinux 0x6226efbb	neigh_parms_alloc
+EXPORT_SYMBOL vmlinux 0x62380a26	xfrm_user_policy
+EXPORT_SYMBOL vmlinux 0x626f3349	neigh_parms_release
+EXPORT_SYMBOL vmlinux 0x62737e1d	sock_unregister
+EXPORT_SYMBOL vmlinux 0x62827bec	security_secctx_to_secid
+EXPORT_SYMBOL vmlinux 0x62a9293f	_clear_page
+EXPORT_SYMBOL vmlinux 0x6351f01e	bio_alloc
+EXPORT_SYMBOL vmlinux 0x63648635	ldc_disconnect
+EXPORT_SYMBOL vmlinux 0x6366b551	vio_ldc_send
+EXPORT_SYMBOL vmlinux 0x6367c9f8	inet_frags_fini
+EXPORT_SYMBOL vmlinux 0x63ecad53	register_netdevice_notifier
+EXPORT_SYMBOL vmlinux 0x6403e338	tcp_memory_pressure
+EXPORT_SYMBOL vmlinux 0x64092060	sbus_set_sbus64
+EXPORT_SYMBOL vmlinux 0x640aedca	audit_log_format
+EXPORT_SYMBOL vmlinux 0x643ceefa	mempool_destroy
+EXPORT_SYMBOL vmlinux 0x644ee963	skb_add_rx_frag
+EXPORT_SYMBOL vmlinux 0x64774cde	ldc_free_exp_dring
+EXPORT_SYMBOL vmlinux 0x64999478	congestion_wait
+EXPORT_SYMBOL vmlinux 0x64b4e8d3	bioset_free
+EXPORT_SYMBOL vmlinux 0x64b7875c	netif_notify_peers
+EXPORT_SYMBOL vmlinux 0x64cc4c53	ethtool_op_get_tx_csum
+EXPORT_SYMBOL vmlinux 0x64d067c0	kfifo_init
+EXPORT_SYMBOL vmlinux 0x64d4c1b0	dm_io_client_destroy
+EXPORT_SYMBOL vmlinux 0x64f77d0c	xfrm_policy_walk
+EXPORT_SYMBOL vmlinux 0x64fdaf9e	generic_shutdown_super
+EXPORT_SYMBOL vmlinux 0x65022a24	radix_tree_prev_hole
+EXPORT_SYMBOL vmlinux 0x651a4139	test_taint
+EXPORT_SYMBOL vmlinux 0x65312fc8	sync_inode
+EXPORT_SYMBOL vmlinux 0x65373b2f	get_fb_unmapped_area
+EXPORT_SYMBOL vmlinux 0x653b6898	inode_setattr
+EXPORT_SYMBOL vmlinux 0x65408378	zlib_inflate_blob
+EXPORT_SYMBOL vmlinux 0x65414e67	dev_valid_name
+EXPORT_SYMBOL vmlinux 0x6575fe51	find_inode_number
+EXPORT_SYMBOL vmlinux 0x659585e7	textsearch_find_continuous
+EXPORT_SYMBOL vmlinux 0x659ef057	kmem_cache_name
+EXPORT_SYMBOL vmlinux 0x65b0a97e	_PAGE_IE
+EXPORT_SYMBOL vmlinux 0x65e048c9	of_device_is_available
+EXPORT_SYMBOL vmlinux 0x65e25826	blk_plug_device_unlocked
+EXPORT_SYMBOL vmlinux 0x65f14fcf	netif_receive_skb
+EXPORT_SYMBOL vmlinux 0x65fa0ff8	textsearch_prepare
+EXPORT_SYMBOL vmlinux 0x661a5783	proc_dointvec_userhz_jiffies
+EXPORT_SYMBOL vmlinux 0x661c2acf	io_remap_pfn_range
+EXPORT_SYMBOL vmlinux 0x6654c8e8	up_write
+EXPORT_SYMBOL vmlinux 0x6666c945	generic_block_fiemap
+EXPORT_SYMBOL vmlinux 0x66686518	idr_remove
+EXPORT_SYMBOL vmlinux 0x668da8d5	zlib_inflateIncomp
+EXPORT_SYMBOL vmlinux 0x66993a25	udp_lib_getsockopt
+EXPORT_SYMBOL vmlinux 0x66bdb9c4	put_disk
+EXPORT_SYMBOL vmlinux 0x66be9333	drm_mm_get_block_generic
+EXPORT_SYMBOL vmlinux 0x66cae227	stop_a_enabled
+EXPORT_SYMBOL vmlinux 0x67053080	current_kernel_time
+EXPORT_SYMBOL vmlinux 0x671470be	neigh_destroy
+EXPORT_SYMBOL vmlinux 0x672144bd	strlcpy
+EXPORT_SYMBOL vmlinux 0x672f4eaa	nf_unregister_sockopt
+EXPORT_SYMBOL vmlinux 0x67497a67	inet_shutdown
+EXPORT_SYMBOL vmlinux 0x6755c96b	i2c_master_send
+EXPORT_SYMBOL vmlinux 0x677eea7d	ns87303_lock
+EXPORT_SYMBOL vmlinux 0x67881bd6	ebus_dma_register
+EXPORT_SYMBOL vmlinux 0x67b4f676	xfrm_unregister_type
+EXPORT_SYMBOL vmlinux 0x67c51101	tty_register_driver
+EXPORT_SYMBOL vmlinux 0x67c80c9a	drm_mm_takedown
+EXPORT_SYMBOL vmlinux 0x6823863c	idr_remove_all
+EXPORT_SYMBOL vmlinux 0x686ab769	ps2_handle_response
+EXPORT_SYMBOL vmlinux 0x687c2f32	__down_write
+EXPORT_SYMBOL vmlinux 0x687ce72a	jbd2_journal_ack_err
+EXPORT_SYMBOL vmlinux 0x687e28f9	ethtool_op_set_tx_csum
+EXPORT_SYMBOL vmlinux 0x68924a29	dev_get_by_index
+EXPORT_SYMBOL vmlinux 0x6894855e	vfs_mkdir
+EXPORT_SYMBOL vmlinux 0x689fb80b	sk_stream_error
+EXPORT_SYMBOL vmlinux 0x68aad78c	tcp_sendpage
+EXPORT_SYMBOL vmlinux 0x68ab8310	write_inode_now
+EXPORT_SYMBOL vmlinux 0x68fb74ca	timeval_to_jiffies
+EXPORT_SYMBOL vmlinux 0x69010b06	insw
+EXPORT_SYMBOL vmlinux 0x690f5efb	set_groups
+EXPORT_SYMBOL vmlinux 0x6971447a	rtc_month_days
+EXPORT_SYMBOL vmlinux 0x69786433	nf_setsockopt
+EXPORT_SYMBOL vmlinux 0x697cb0a0	sysctl_ms_jiffies
+EXPORT_SYMBOL vmlinux 0x6980fe91	param_get_int
+EXPORT_SYMBOL vmlinux 0x6984db74	mdesc_get_property
+EXPORT_SYMBOL vmlinux 0x6988bb82	user_revoke
+EXPORT_SYMBOL vmlinux 0x698cd519	pci_find_next_bus
+EXPORT_SYMBOL vmlinux 0x69927dff	try_acquire_console_sem
+EXPORT_SYMBOL vmlinux 0x69a358a6	iomem_resource
+EXPORT_SYMBOL vmlinux 0x69b9cfa4	seq_bitmap
+EXPORT_SYMBOL vmlinux 0x69c1cd46	cancel_dirty_page
+EXPORT_SYMBOL vmlinux 0x69c8c1d5	security_req_classify_flow
+EXPORT_SYMBOL vmlinux 0x69e27c7a	bitmap_copy_le
+EXPORT_SYMBOL vmlinux 0x6a037cf1	mempool_kfree
+EXPORT_SYMBOL vmlinux 0x6a0f6919	inet_register_protosw
+EXPORT_SYMBOL vmlinux 0x6a33553b	of_n_size_cells
+EXPORT_SYMBOL vmlinux 0x6a38532b	wait_for_completion_interruptible
+EXPORT_SYMBOL vmlinux 0x6a47571d	__set_personality
+EXPORT_SYMBOL vmlinux 0x6a49b9bf	bd_set_size
+EXPORT_SYMBOL vmlinux 0x6a5fa363	sigprocmask
+EXPORT_SYMBOL vmlinux 0x6a76f3ac	blk_iopoll_enable
+EXPORT_SYMBOL vmlinux 0x6a7ed36a	__init_waitqueue_head
+EXPORT_SYMBOL vmlinux 0x6aac842f	udp_disconnect
+EXPORT_SYMBOL vmlinux 0x6acaa065	tcp_read_sock
+EXPORT_SYMBOL vmlinux 0x6acbed88	load_nls
+EXPORT_SYMBOL vmlinux 0x6ad065f4	param_set_charp
+EXPORT_SYMBOL vmlinux 0x6ad727d2	ip_mc_inc_group
+EXPORT_SYMBOL vmlinux 0x6adeb83c	tcf_register_action
+EXPORT_SYMBOL vmlinux 0x6afeea8b	__blk_run_queue
+EXPORT_SYMBOL vmlinux 0x6b1b67d3	__bdevname
+EXPORT_SYMBOL vmlinux 0x6b24da21	mdiobus_free
+EXPORT_SYMBOL vmlinux 0x6b2dc060	dump_stack
+EXPORT_SYMBOL vmlinux 0x6b4389b4	journal_check_available_features
+EXPORT_SYMBOL vmlinux 0x6b4e5a52	radix_tree_lookup_slot
+EXPORT_SYMBOL vmlinux 0x6b9922c4	idr_pre_get
+EXPORT_SYMBOL vmlinux 0x6bbdae2c	bio_split
+EXPORT_SYMBOL vmlinux 0x6bc3fbc0	__unregister_chrdev
+EXPORT_SYMBOL vmlinux 0x6bc47fe3	drm_mode_create_tv_properties
+EXPORT_SYMBOL vmlinux 0x6bc56c67	radix_tree_next_hole
+EXPORT_SYMBOL vmlinux 0x6bc646c2	__wait_on_bit_lock
+EXPORT_SYMBOL vmlinux 0x6bdcfd99	qdisc_class_hash_remove
+EXPORT_SYMBOL vmlinux 0x6bdd27f2	sock_no_listen
+EXPORT_SYMBOL vmlinux 0x6bfa9571	dm_table_event
+EXPORT_SYMBOL vmlinux 0x6bfe993d	_write_trylock
+EXPORT_SYMBOL vmlinux 0x6c0c16b6	arp_xmit
+EXPORT_SYMBOL vmlinux 0x6c1dda26	journal_dirty_data
+EXPORT_SYMBOL vmlinux 0x6c518ad1	ethtool_op_get_link
+EXPORT_SYMBOL vmlinux 0x6c570965	jbd2_journal_init_dev
+EXPORT_SYMBOL vmlinux 0x6c61ce70	num_registered_fb
+EXPORT_SYMBOL vmlinux 0x6c702af7	sysctl_udp_rmem_min
+EXPORT_SYMBOL vmlinux 0x6cee7d17	blk_queue_init_tags
+EXPORT_SYMBOL vmlinux 0x6cef40aa	netif_napi_del
+EXPORT_SYMBOL vmlinux 0x6cf233a8	vc_cons
+EXPORT_SYMBOL vmlinux 0x6cfc719d	uart_update_timeout
+EXPORT_SYMBOL vmlinux 0x6d04cf78	skb_find_text
+EXPORT_SYMBOL vmlinux 0x6d0b77fe	sysctl_data
+EXPORT_SYMBOL vmlinux 0x6d0e3039	vfs_fstatat
+EXPORT_SYMBOL vmlinux 0x6d27ef64	__bitmap_empty
+EXPORT_SYMBOL vmlinux 0x6d294e43	clock_t_to_jiffies
+EXPORT_SYMBOL vmlinux 0x6d2e5837	drm_ut_debug_printk
+EXPORT_SYMBOL vmlinux 0x6d48cc0f	journal_try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0x6d6cbadc	rb_last
+EXPORT_SYMBOL vmlinux 0x6d7c9571	compat_mc_getsockopt
+EXPORT_SYMBOL vmlinux 0x6d93e82e	complete_and_exit
+EXPORT_SYMBOL vmlinux 0x6d95ec3a	tty_port_lower_dtr_rts
+EXPORT_SYMBOL vmlinux 0x6de375c1	xor_niagara_5
+EXPORT_SYMBOL vmlinux 0x6de6bf83	radix_tree_lookup
+EXPORT_SYMBOL vmlinux 0x6def2db2	half_md4_transform
+EXPORT_SYMBOL vmlinux 0x6e170c86	iget_locked
+EXPORT_SYMBOL vmlinux 0x6e1ce0a9	fb_set_var
+EXPORT_SYMBOL vmlinux 0x6e1e1c55	tty_port_carrier_raised
+EXPORT_SYMBOL vmlinux 0x6e331945	down
+EXPORT_SYMBOL vmlinux 0x6e481da0	xfrm_state_flush
+EXPORT_SYMBOL vmlinux 0x6e5ca739	simple_statfs
+EXPORT_SYMBOL vmlinux 0x6e5d50fe	pci_unmap_rom
+EXPORT_SYMBOL vmlinux 0x6e5e075b	vfs_quota_off
+EXPORT_SYMBOL vmlinux 0x6e720ff2	rtnl_unlock
+EXPORT_SYMBOL vmlinux 0x6e802324	radix_tree_tag_get
+EXPORT_SYMBOL vmlinux 0x6e8ac1d6	phy_device_free
+EXPORT_SYMBOL vmlinux 0x6e90e561	xfrm_lookup
+EXPORT_SYMBOL vmlinux 0x6e9dd606	__symbol_put
+EXPORT_SYMBOL vmlinux 0x6ea18db5	drm_gem_vm_close
+EXPORT_SYMBOL vmlinux 0x6eb882d7	arp_create
+EXPORT_SYMBOL vmlinux 0x6ec3c95e	tty_unregister_device
+EXPORT_SYMBOL vmlinux 0x6ed8956c	drm_get_drawable_info
+EXPORT_SYMBOL vmlinux 0x6eee8308	tcp_gro_complete
+EXPORT_SYMBOL vmlinux 0x6ef74b4a	pci_scan_bus_parented
+EXPORT_SYMBOL vmlinux 0x6f0687ec	devm_ioremap
+EXPORT_SYMBOL vmlinux 0x6fc30481	drm_mode_hsync
+EXPORT_SYMBOL vmlinux 0x6fc94154	dma_ops
+EXPORT_SYMBOL vmlinux 0x6fcb87a1	touch_softlockup_watchdog
+EXPORT_SYMBOL vmlinux 0x6fd79cf9	bio_integrity_get_tag
+EXPORT_SYMBOL vmlinux 0x6ff2e575	blk_queue_end_tag
+EXPORT_SYMBOL vmlinux 0x6fff393f	time_to_tm
+EXPORT_SYMBOL vmlinux 0x702073dd	tcp_disconnect
+EXPORT_SYMBOL vmlinux 0x702f162c	__memscan_generic
+EXPORT_SYMBOL vmlinux 0x7044c3ca	vfs_link
+EXPORT_SYMBOL vmlinux 0x704757bb	blk_queue_physical_block_size
+EXPORT_SYMBOL vmlinux 0x70523a7a	__cond_resched_softirq
+EXPORT_SYMBOL vmlinux 0x70536053	jbd2_journal_force_commit_nested
+EXPORT_SYMBOL vmlinux 0x705c78db	dev_set_drvdata
+EXPORT_SYMBOL vmlinux 0x7060e337	down_timeout
+EXPORT_SYMBOL vmlinux 0x70765d1c	vfs_lstat
+EXPORT_SYMBOL vmlinux 0x70b201ac	drm_add_modes_noedid
+EXPORT_SYMBOL vmlinux 0x70b5dafe	dmam_free_noncoherent
+EXPORT_SYMBOL vmlinux 0x70b730d3	simple_rmdir
+EXPORT_SYMBOL vmlinux 0x70bc17d7	inode_wait
+EXPORT_SYMBOL vmlinux 0x712730a7	__flushw_user
+EXPORT_SYMBOL vmlinux 0x7129e5f8	hex_asc
+EXPORT_SYMBOL vmlinux 0x7131f16e	tty_mutex
+EXPORT_SYMBOL vmlinux 0x7144b3ce	open_bdev_exclusive
+EXPORT_SYMBOL vmlinux 0x71639324	drm_i2c_encoder_destroy
+EXPORT_SYMBOL vmlinux 0x7171121c	overflowgid
+EXPORT_SYMBOL vmlinux 0x71792bb1	splice_from_pipe_feed
+EXPORT_SYMBOL vmlinux 0x71a50dbc	register_blkdev
+EXPORT_SYMBOL vmlinux 0x71b0dc17	__neigh_for_each_release
+EXPORT_SYMBOL vmlinux 0x71b24c10	__nla_put_nohdr
+EXPORT_SYMBOL vmlinux 0x71c02438	sg_next
+EXPORT_SYMBOL vmlinux 0x721fe6bd	unregister_quota_format
+EXPORT_SYMBOL vmlinux 0x7242e96d	strnchr
+EXPORT_SYMBOL vmlinux 0x72437064	send_sig
+EXPORT_SYMBOL vmlinux 0x72440da2	skb_dma_unmap
+EXPORT_SYMBOL vmlinux 0x724742fc	clocksource_unregister
+EXPORT_SYMBOL vmlinux 0x7284c6fb	neigh_changeaddr
+EXPORT_SYMBOL vmlinux 0x728bd861	i2c_smbus_write_i2c_block_data
+EXPORT_SYMBOL vmlinux 0x72aadbf4	lookup_bdev
+EXPORT_SYMBOL vmlinux 0x72c3be87	param_set_byte
+EXPORT_SYMBOL vmlinux 0x72ebbfe2	fddi_type_trans
+EXPORT_SYMBOL vmlinux 0x72ebe44a	__wake_up
+EXPORT_SYMBOL vmlinux 0x7313042a	dev_open
+EXPORT_SYMBOL vmlinux 0x7317eff2	xfrm_register_mode
+EXPORT_SYMBOL vmlinux 0x732e2713	create_mnt_ns
+EXPORT_SYMBOL vmlinux 0x734ed005	inet_frag_destroy
+EXPORT_SYMBOL vmlinux 0x735be4ac	set_device_ro
+EXPORT_SYMBOL vmlinux 0x73830f65	security_inode_setsecctx
+EXPORT_SYMBOL vmlinux 0x73e0877a	insl
+EXPORT_SYMBOL vmlinux 0x7405886e	vfs_read
+EXPORT_SYMBOL vmlinux 0x740a0696	pcix_get_max_mmrbc
+EXPORT_SYMBOL vmlinux 0x744c0c68	param_get_byte
+EXPORT_SYMBOL vmlinux 0x745018a1	buffer_migrate_page
+EXPORT_SYMBOL vmlinux 0x747843c4	tcp_initialize_rcv_mss
+EXPORT_SYMBOL vmlinux 0x7485e15e	unregister_chrdev_region
+EXPORT_SYMBOL vmlinux 0x74954462	timecounter_read
+EXPORT_SYMBOL vmlinux 0x74bfc369	__tracepoint_kmem_cache_alloc
+EXPORT_SYMBOL vmlinux 0x74cc1cbe	unregister_cpu_notifier
+EXPORT_SYMBOL vmlinux 0x74cc8444	pci_request_region_exclusive
+EXPORT_SYMBOL vmlinux 0x7535d6b8	directly_mappable_cdev_bdi
+EXPORT_SYMBOL vmlinux 0x75425ddf	nlmsg_notify
+EXPORT_SYMBOL vmlinux 0x7549db45	generic_fillattr
+EXPORT_SYMBOL vmlinux 0x756e6992	strnicmp
+EXPORT_SYMBOL vmlinux 0x75bdea12	iommu_area_alloc
+EXPORT_SYMBOL vmlinux 0x75defd38	tcp_simple_retransmit
+EXPORT_SYMBOL vmlinux 0x75e0ffd5	_read_trylock
+EXPORT_SYMBOL vmlinux 0x760a0f4f	yield
+EXPORT_SYMBOL vmlinux 0x760b437a	unregister_inetaddr_notifier
+EXPORT_SYMBOL vmlinux 0x7616304e	napi_gro_flush
+EXPORT_SYMBOL vmlinux 0x76246cf6	mac_find_mode
+EXPORT_SYMBOL vmlinux 0x7626d1fd	pci_bus_alloc_resource
+EXPORT_SYMBOL vmlinux 0x7632fff0	default_llseek
+EXPORT_SYMBOL vmlinux 0x764bd77c	request_resource
+EXPORT_SYMBOL vmlinux 0x7687d2b0	get_empty_filp
+EXPORT_SYMBOL vmlinux 0x76b5cb66	tcf_hash_destroy
+EXPORT_SYMBOL vmlinux 0x76bf656d	__bitmap_shift_left
+EXPORT_SYMBOL vmlinux 0x76d3cd60	laptop_mode
+EXPORT_SYMBOL vmlinux 0x76de18df	cdev_alloc
+EXPORT_SYMBOL vmlinux 0x76f2e30c	pci_unmap_sg
+EXPORT_SYMBOL vmlinux 0x773a9c94	blk_iopoll_enabled
+EXPORT_SYMBOL vmlinux 0x7789bb91	skb_append
+EXPORT_SYMBOL vmlinux 0x77946e27	fb_set_suspend
+EXPORT_SYMBOL vmlinux 0x7796fb36	net2280_set_fifo_mode
+EXPORT_SYMBOL vmlinux 0x77c4b129	of_device_register
+EXPORT_SYMBOL vmlinux 0x77c9c866	drm_ati_pcigart_cleanup
+EXPORT_SYMBOL vmlinux 0x77cfcfde	__tracepoint_kmalloc_node
+EXPORT_SYMBOL vmlinux 0x77e86ff7	generic_file_open
+EXPORT_SYMBOL vmlinux 0x77ecac9f	zlib_inflateEnd
+EXPORT_SYMBOL vmlinux 0x77ed905c	pci_save_state
+EXPORT_SYMBOL vmlinux 0x77fa5d1f	ns_to_timespec
+EXPORT_SYMBOL vmlinux 0x7807dbe1	genphy_restart_aneg
+EXPORT_SYMBOL vmlinux 0x7808cf3d	security_inode_init_security
+EXPORT_SYMBOL vmlinux 0x7808db44	_spin_trylock
+EXPORT_SYMBOL vmlinux 0x78280ab9	journal_load
+EXPORT_SYMBOL vmlinux 0x782cb47d	_spin_trylock_bh
+EXPORT_SYMBOL vmlinux 0x78423447	do_mmap_pgoff
+EXPORT_SYMBOL vmlinux 0x784915eb	drm_mode_vrefresh
+EXPORT_SYMBOL vmlinux 0x786e8b33	balance_dirty_pages_ratelimited_nr
+EXPORT_SYMBOL vmlinux 0x78855285	sk_filter
+EXPORT_SYMBOL vmlinux 0x78bbb2d7	dev_change_flags
+EXPORT_SYMBOL vmlinux 0x78df6bd7	no_pci_devices
+EXPORT_SYMBOL vmlinux 0x79232236	fsync_bdev
+EXPORT_SYMBOL vmlinux 0x79312247	mntput_no_expire
+EXPORT_SYMBOL vmlinux 0x793b7e70	netlink_rcv_skb
+EXPORT_SYMBOL vmlinux 0x7983f166	drm_property_destroy
+EXPORT_SYMBOL vmlinux 0x799cd83f	of_find_property
+EXPORT_SYMBOL vmlinux 0x79aa04a2	get_random_bytes
+EXPORT_SYMBOL vmlinux 0x79ad224b	tasklet_kill
+EXPORT_SYMBOL vmlinux 0x79e9e23b	simple_pin_fs
+EXPORT_SYMBOL vmlinux 0x79fd21e7	phy_disconnect
+EXPORT_SYMBOL vmlinux 0x7a024f9f	wireless_send_event
+EXPORT_SYMBOL vmlinux 0x7a07c387	generic_file_mmap
+EXPORT_SYMBOL vmlinux 0x7a2a837d	strict_strtol
+EXPORT_SYMBOL vmlinux 0x7a3744fc	sock_common_getsockopt
+EXPORT_SYMBOL vmlinux 0x7a4497db	kzfree
+EXPORT_SYMBOL vmlinux 0x7a6bb613	idr_init
+EXPORT_SYMBOL vmlinux 0x7a83bbb1	dev_get_drvdata
+EXPORT_SYMBOL vmlinux 0x7a9f1fd7	bio_integrity_trim
+EXPORT_SYMBOL vmlinux 0x7ae65f80	tty_port_alloc_xmit_buf
+EXPORT_SYMBOL vmlinux 0x7ae73de1	alloc_pages_exact
+EXPORT_SYMBOL vmlinux 0x7b03be9a	phy_sanitize_settings
+EXPORT_SYMBOL vmlinux 0x7b0a7dc8	udp_ioctl
+EXPORT_SYMBOL vmlinux 0x7b1e1ca5	qdisc_watchdog_cancel
+EXPORT_SYMBOL vmlinux 0x7b1f0872	xfrm_policy_flush
+EXPORT_SYMBOL vmlinux 0x7b36abaf	skb_abort_seq_read
+EXPORT_SYMBOL vmlinux 0x7b5c3f7c	elv_rb_find
+EXPORT_SYMBOL vmlinux 0x7b8f4c40	key_create_or_update
+EXPORT_SYMBOL vmlinux 0x7bc4a74e	__tcf_em_tree_match
+EXPORT_SYMBOL vmlinux 0x7becf9f2	drm_gem_object_handle_free
+EXPORT_SYMBOL vmlinux 0x7bff3be7	iov_iter_advance
+EXPORT_SYMBOL vmlinux 0x7c1019a1	free_netdev
+EXPORT_SYMBOL vmlinux 0x7c1cde82	proc_dointvec_ms_jiffies
+EXPORT_SYMBOL vmlinux 0x7c1fd6c8	drm_mode_equal
+EXPORT_SYMBOL vmlinux 0x7c24506a	tty_port_hangup
+EXPORT_SYMBOL vmlinux 0x7c2aa5b1	drm_mmap
+EXPORT_SYMBOL vmlinux 0x7c3f9dd6	__xfrm_policy_check
+EXPORT_SYMBOL vmlinux 0x7c60d66e	getname
+EXPORT_SYMBOL vmlinux 0x7c61340c	__release_region
+EXPORT_SYMBOL vmlinux 0x7c6a5c6d	dm_kcopyd_client_destroy
+EXPORT_SYMBOL vmlinux 0x7c7a4ef4	tty_register_device
+EXPORT_SYMBOL vmlinux 0x7c8d1077	tcf_hash_create
+EXPORT_SYMBOL vmlinux 0x7c904ded	unregister_module_notifier
+EXPORT_SYMBOL vmlinux 0x7ca8577a	cpu_sysdev_class
+EXPORT_SYMBOL vmlinux 0x7cb1ae69	cpu_down
+EXPORT_SYMBOL vmlinux 0x7cc1dbd3	elevator_init
+EXPORT_SYMBOL vmlinux 0x7cfdb49b	drm_read
+EXPORT_SYMBOL vmlinux 0x7d092cf5	blk_rq_map_user
+EXPORT_SYMBOL vmlinux 0x7d102793	generic_write_sync
+EXPORT_SYMBOL vmlinux 0x7d11c268	jiffies
+EXPORT_SYMBOL vmlinux 0x7d2f4de0	page_follow_link_light
+EXPORT_SYMBOL vmlinux 0x7d37dc70	load_nls_default
+EXPORT_SYMBOL vmlinux 0x7d7729c2	block_page_mkwrite
+EXPORT_SYMBOL vmlinux 0x7da5be2a	inet_csk_init_xmit_timers
+EXPORT_SYMBOL vmlinux 0x7dcb3137	register_framebuffer
+EXPORT_SYMBOL vmlinux 0x7dcb97ba	i2c_smbus_write_byte_data
+EXPORT_SYMBOL vmlinux 0x7dceceac	capable
+EXPORT_SYMBOL vmlinux 0x7e12bd60	skb_copy_datagram_const_iovec
+EXPORT_SYMBOL vmlinux 0x7e253b30	mempool_create_node
+EXPORT_SYMBOL vmlinux 0x7e313e1c	drm_vblank_init
+EXPORT_SYMBOL vmlinux 0x7e38d78f	register_qdisc
+EXPORT_SYMBOL vmlinux 0x7e44f0bd	netif_device_detach
+EXPORT_SYMBOL vmlinux 0x7e61c823	neigh_sysctl_register
+EXPORT_SYMBOL vmlinux 0x7e6ba92a	pci_map_rom
+EXPORT_SYMBOL vmlinux 0x7e6f3a98	get_phy_device
+EXPORT_SYMBOL vmlinux 0x7e8c5808	sk_stream_kill_queues
+EXPORT_SYMBOL vmlinux 0x7e9e75fc	drm_gem_object_lookup
+EXPORT_SYMBOL vmlinux 0x7ec9bfbc	strncpy
+EXPORT_SYMBOL vmlinux 0x7ee9938d	_write_lock_bh
+EXPORT_SYMBOL vmlinux 0x7efa8507	bio_map_user
+EXPORT_SYMBOL vmlinux 0x7f1475e7	i2c_release_client
+EXPORT_SYMBOL vmlinux 0x7f24de73	jiffies_to_usecs
+EXPORT_SYMBOL vmlinux 0x7f45ad6d	of_find_node_by_phandle
+EXPORT_SYMBOL vmlinux 0x7f5df572	drm_connector_attach_property
+EXPORT_SYMBOL vmlinux 0x7f600bc4	remove_arg_zero
+EXPORT_SYMBOL vmlinux 0x7f67ee22	drm_mm_init_scan
+EXPORT_SYMBOL vmlinux 0x7f67fbb8	journal_extend
+EXPORT_SYMBOL vmlinux 0x7fb0a4ff	dev_addr_del_multiple
+EXPORT_SYMBOL vmlinux 0x7fd9a88d	vmtruncate
+EXPORT_SYMBOL vmlinux 0x800086e1	i2c_verify_client
+EXPORT_SYMBOL vmlinux 0x8004a9c9	dev_set_mac_address
+EXPORT_SYMBOL vmlinux 0x8005989c	generic_listxattr
+EXPORT_SYMBOL vmlinux 0x80210dfb	sync_dirty_buffer
+EXPORT_SYMBOL vmlinux 0x802f3798	mapping_tagged
+EXPORT_SYMBOL vmlinux 0x8031f38e	neigh_ifdown
+EXPORT_SYMBOL vmlinux 0x80622c7a	poll_schedule_timeout
+EXPORT_SYMBOL vmlinux 0x8079c872	init_special_inode
+EXPORT_SYMBOL vmlinux 0x807b7089	prom_firstprop
+EXPORT_SYMBOL vmlinux 0x80b01953	compat_ip_getsockopt
+EXPORT_SYMBOL vmlinux 0x80b6001f	generic_make_request
+EXPORT_SYMBOL vmlinux 0x80bf3bc5	sun4v_niagara_getperf
+EXPORT_SYMBOL vmlinux 0x80c63be4	d_path
+EXPORT_SYMBOL vmlinux 0x80f2f9e3	end_page_writeback
+EXPORT_SYMBOL vmlinux 0x813b0461	set_irq_chip
+EXPORT_SYMBOL vmlinux 0x813d02d2	mark_info_dirty
+EXPORT_SYMBOL vmlinux 0x815b5dd4	match_octal
+EXPORT_SYMBOL vmlinux 0x8186100f	pcie_get_readrq
+EXPORT_SYMBOL vmlinux 0x819ff9ea	i8042_check_port_owner
+EXPORT_SYMBOL vmlinux 0x81b96965	bio_uncopy_user
+EXPORT_SYMBOL vmlinux 0x81c806c9	get_user_pages
+EXPORT_SYMBOL vmlinux 0x81cb03ab	drm_crtc_init
+EXPORT_SYMBOL vmlinux 0x81dcd5c2	idr_get_new
+EXPORT_SYMBOL vmlinux 0x81e40b91	linkwatch_fire_event
+EXPORT_SYMBOL vmlinux 0x8208a25c	vc_resize
+EXPORT_SYMBOL vmlinux 0x820d225f	print_mac
+EXPORT_SYMBOL vmlinux 0x8228c7d2	blk_queue_ordered
+EXPORT_SYMBOL vmlinux 0x822f98e8	bio_integrity_tag_size
+EXPORT_SYMBOL vmlinux 0x8251bcc3	bitmap_release_region
+EXPORT_SYMBOL vmlinux 0x82692209	kref_set
+EXPORT_SYMBOL vmlinux 0x828fcd70	elv_rb_former_request
+EXPORT_SYMBOL vmlinux 0x82a86b37	node_data
+EXPORT_SYMBOL vmlinux 0x82acfb70	blk_iopoll_sched
+EXPORT_SYMBOL vmlinux 0x82b1de01	ida_remove
+EXPORT_SYMBOL vmlinux 0x82c5abf8	blk_requeue_request
+EXPORT_SYMBOL vmlinux 0x82e9c083	csum_partial_copy_fromiovecend
+EXPORT_SYMBOL vmlinux 0x8326d702	tcf_action_exec
+EXPORT_SYMBOL vmlinux 0x836d0439	__scm_send
+EXPORT_SYMBOL vmlinux 0x83a476ce	bitmap_scnlistprintf
+EXPORT_SYMBOL vmlinux 0x83b508ca	skb_put
+EXPORT_SYMBOL vmlinux 0x83c43dc1	posix_acl_chmod_masq
+EXPORT_SYMBOL vmlinux 0x83e714fd	input_set_capability
+EXPORT_SYMBOL vmlinux 0x83ec1385	gnet_stats_start_copy
+EXPORT_SYMBOL vmlinux 0x83f0791b	d_instantiate_unique
+EXPORT_SYMBOL vmlinux 0x8400e6b2	tcp_md5_hash_header
+EXPORT_SYMBOL vmlinux 0x840e4d9e	generic_readlink
+EXPORT_SYMBOL vmlinux 0x84113169	unregister_tcf_proto_ops
+EXPORT_SYMBOL vmlinux 0x84b572e4	phy_enable_interrupts
+EXPORT_SYMBOL vmlinux 0x84b6c341	request_key_async
+EXPORT_SYMBOL vmlinux 0x84ba88c4	__mark_inode_dirty
+EXPORT_SYMBOL vmlinux 0x851dbd61	scsi_cmd_ioctl
+EXPORT_SYMBOL vmlinux 0x8521ddc8	xfrm_register_km
+EXPORT_SYMBOL vmlinux 0x8546df4a	drm_mode_detachmode_crtc
+EXPORT_SYMBOL vmlinux 0x854e53c8	udp_prot
+EXPORT_SYMBOL vmlinux 0x85670f1d	rtnl_is_locked
+EXPORT_SYMBOL vmlinux 0x856783eb	xfrm_policy_destroy
+EXPORT_SYMBOL vmlinux 0x856c9fe3	idr_destroy
+EXPORT_SYMBOL vmlinux 0x8571baf7	pci_bus_read_config_dword
+EXPORT_SYMBOL vmlinux 0x857277bb	con_set_default_unimap
+EXPORT_SYMBOL vmlinux 0x8575b970	dev_set_mtu
+EXPORT_SYMBOL vmlinux 0x858ef85e	tcp_v4_do_rcv
+EXPORT_SYMBOL vmlinux 0x858f85fc	__serio_register_driver
+EXPORT_SYMBOL vmlinux 0x85abc85f	strncmp
+EXPORT_SYMBOL vmlinux 0x85b62013	genlmsg_multicast_allns
+EXPORT_SYMBOL vmlinux 0x85c1de0c	keyring_search
+EXPORT_SYMBOL vmlinux 0x85de09f5	drm_mode_width
+EXPORT_SYMBOL vmlinux 0x85df9b6c	strsep
+EXPORT_SYMBOL vmlinux 0x85fbb0c4	security_path_mknod
+EXPORT_SYMBOL vmlinux 0x8631f188	radix_tree_tag_set
+EXPORT_SYMBOL vmlinux 0x86424fca	dm_put_device
+EXPORT_SYMBOL vmlinux 0x8648e0b7	dquot_free_inode
+EXPORT_SYMBOL vmlinux 0x864988e7	bio_endio
+EXPORT_SYMBOL vmlinux 0x868acba5	get_options
+EXPORT_SYMBOL vmlinux 0x869379d1	alloc_disk_node
+EXPORT_SYMBOL vmlinux 0x86ad73f3	jbd2_journal_revoke
+EXPORT_SYMBOL vmlinux 0x86bfb512	drm_mode_destroy
+EXPORT_SYMBOL vmlinux 0x86c7146d	vfs_fstat
+EXPORT_SYMBOL vmlinux 0x86d68001	tty_unthrottle
+EXPORT_SYMBOL vmlinux 0x86da295b	generic_getxattr
+EXPORT_SYMBOL vmlinux 0x86de552b	pci_release_selected_regions
+EXPORT_SYMBOL vmlinux 0x86fb9b05	bitmap_parse_user
+EXPORT_SYMBOL vmlinux 0x871c0a7e	fiemap_check_flags
+EXPORT_SYMBOL vmlinux 0x872bd087	suncore_mouse_baud_detection
+EXPORT_SYMBOL vmlinux 0x873eb066	seq_read
+EXPORT_SYMBOL vmlinux 0x8759135d	skb_push
+EXPORT_SYMBOL vmlinux 0x876ff9d5	blk_queue_dma_pad
+EXPORT_SYMBOL vmlinux 0x8786e38f	pci_wake_from_d3
+EXPORT_SYMBOL vmlinux 0x878ab3ce	sysctl_tcp_adv_win_scale
+EXPORT_SYMBOL vmlinux 0x87971c5e	zero_fill_bio
+EXPORT_SYMBOL vmlinux 0x87cef075	udp_poll
+EXPORT_SYMBOL vmlinux 0x87d6e7ef	drm_detect_hdmi_monitor
+EXPORT_SYMBOL vmlinux 0x87e905f3	proc_create_data
+EXPORT_SYMBOL vmlinux 0x87f00746	d_rehash
+EXPORT_SYMBOL vmlinux 0x881039d0	zlib_inflate
+EXPORT_SYMBOL vmlinux 0x881428af	complete
+EXPORT_SYMBOL vmlinux 0x881dfa8d	dev_unicast_delete
+EXPORT_SYMBOL vmlinux 0x883b24fb	sun4v_niagara_setperf
+EXPORT_SYMBOL vmlinux 0x883d5f6c	unregister_sysctl_table
+EXPORT_SYMBOL vmlinux 0x883d6fa3	sk_dst_check
+EXPORT_SYMBOL vmlinux 0x8859e0bc	pci_set_power_state
+EXPORT_SYMBOL vmlinux 0x886aa274	posix_acl_create_masq
+EXPORT_SYMBOL vmlinux 0x88864265	__xfrm_state_delete
+EXPORT_SYMBOL vmlinux 0x88970282	jbd2_journal_update_format
+EXPORT_SYMBOL vmlinux 0x88bda706	d_add_ci
+EXPORT_SYMBOL vmlinux 0x88d2dc40	bio_integrity_prep
+EXPORT_SYMBOL vmlinux 0x88dc1e96	down_read_trylock
+EXPORT_SYMBOL vmlinux 0x88dcfffd	read_cache_page
+EXPORT_SYMBOL vmlinux 0x8902f1af	of_console_path
+EXPORT_SYMBOL vmlinux 0x8938ae18	single_release
+EXPORT_SYMBOL vmlinux 0x894273ea	filemap_fault
+EXPORT_SYMBOL vmlinux 0x894932ad	register_nls
+EXPORT_SYMBOL vmlinux 0x895577b0	numa_cpu_lookup_table
+EXPORT_SYMBOL vmlinux 0x895ad09b	grab_cache_page_write_begin
+EXPORT_SYMBOL vmlinux 0x89713fbf	ldc_alloc_exp_dring
+EXPORT_SYMBOL vmlinux 0x897473df	mktime
+EXPORT_SYMBOL vmlinux 0x8985ba71	drm_handle_vblank
+EXPORT_SYMBOL vmlinux 0x89a526b2	inet_sock_destruct
+EXPORT_SYMBOL vmlinux 0x89d5538d	fb_pad_aligned_buffer
+EXPORT_SYMBOL vmlinux 0x89d66811	build_ehash_secret
+EXPORT_SYMBOL vmlinux 0x89f7eb22	tcp_v4_connect
+EXPORT_SYMBOL vmlinux 0x89f9f664	drm_mode_crtc_set_gamma_size
+EXPORT_SYMBOL vmlinux 0x8a1203a9	kref_get
+EXPORT_SYMBOL vmlinux 0x8a15304b	napi_complete
+EXPORT_SYMBOL vmlinux 0x8a373fd7	twl4030_i2c_write
+EXPORT_SYMBOL vmlinux 0x8a5ec699	sbusfb_ioctl_helper
+EXPORT_SYMBOL vmlinux 0x8a61a1cc	default_unplug_io_fn
+EXPORT_SYMBOL vmlinux 0x8a747fc8	xfrm_find_acq
+EXPORT_SYMBOL vmlinux 0x8a7d1c31	high_memory
+EXPORT_SYMBOL vmlinux 0x8a99a016	mempool_free_slab
+EXPORT_SYMBOL vmlinux 0x8ac40297	iommu_area_free
+EXPORT_SYMBOL vmlinux 0x8ace5c6a	slow_work_register_user
+EXPORT_SYMBOL vmlinux 0x8ada93fb	input_register_handle
+EXPORT_SYMBOL vmlinux 0x8ae2d891	log_start_commit
+EXPORT_SYMBOL vmlinux 0x8aeda633	skb_copy_expand
+EXPORT_SYMBOL vmlinux 0x8b0403e6	prom_getproperty
+EXPORT_SYMBOL vmlinux 0x8b182d85	mark_buffer_dirty_inode
+EXPORT_SYMBOL vmlinux 0x8b31524d	vio_ldc_free
+EXPORT_SYMBOL vmlinux 0x8b3419f0	tcf_em_unregister
+EXPORT_SYMBOL vmlinux 0x8b4d94cb	ldc_read
+EXPORT_SYMBOL vmlinux 0x8b5fb000	tcf_hash_check
+EXPORT_SYMBOL vmlinux 0x8b618d08	overflowuid
+EXPORT_SYMBOL vmlinux 0x8b6d6be9	drm_mode_create_dithering_property
+EXPORT_SYMBOL vmlinux 0x8b7fe311	kmemdup
+EXPORT_SYMBOL vmlinux 0x8b918cd5	tcp_recvmsg
+EXPORT_SYMBOL vmlinux 0x8b922c0f	__strnlen_user
+EXPORT_SYMBOL vmlinux 0x8bcd9823	simple_link
+EXPORT_SYMBOL vmlinux 0x8bd313b8	__tracepoint_kfree
+EXPORT_SYMBOL vmlinux 0x8bd5b603	param_get_long
+EXPORT_SYMBOL vmlinux 0x8bedabbe	sunserial_console_match
+EXPORT_SYMBOL vmlinux 0x8bf87169	__bzero
+EXPORT_SYMBOL vmlinux 0x8bfa5eb4	dst_release
+EXPORT_SYMBOL vmlinux 0x8c075a91	simple_transaction_get
+EXPORT_SYMBOL vmlinux 0x8c338bcc	skb_recycle_check
+EXPORT_SYMBOL vmlinux 0x8c3ebc72	saved_command_line
+EXPORT_SYMBOL vmlinux 0x8c405821	skb_copy_datagram_from_iovec
+EXPORT_SYMBOL vmlinux 0x8c537c45	posix_acl_from_mode
+EXPORT_SYMBOL vmlinux 0x8c5a1876	bdget_disk
+EXPORT_SYMBOL vmlinux 0x8c64fd2c	skb_trim
+EXPORT_SYMBOL vmlinux 0x8c89f4c9	tcp_gro_receive
+EXPORT_SYMBOL vmlinux 0x8cae2208	simple_set_mnt
+EXPORT_SYMBOL vmlinux 0x8cf8097b	inet_csk_destroy_sock
+EXPORT_SYMBOL vmlinux 0x8cfab70e	vio_unregister_driver
+EXPORT_SYMBOL vmlinux 0x8cfb1c79	dm_table_put
+EXPORT_SYMBOL vmlinux 0x8d3894f2	_ctype
+EXPORT_SYMBOL vmlinux 0x8d3f6f90	dm_io
+EXPORT_SYMBOL vmlinux 0x8d4950ce	tcf_destroy_chain
+EXPORT_SYMBOL vmlinux 0x8d551bef	sysctl_tcp_rmem
+EXPORT_SYMBOL vmlinux 0x8d5c6a47	sock_queue_rcv_skb
+EXPORT_SYMBOL vmlinux 0x8d913bf9	dev_get_by_flags
+EXPORT_SYMBOL vmlinux 0x8dfe8fb9	tcf_action_dump_1
+EXPORT_SYMBOL vmlinux 0x8e0b7743	ipv6_ext_hdr
+EXPORT_SYMBOL vmlinux 0x8e136312	mb_cache_entry_alloc
+EXPORT_SYMBOL vmlinux 0x8e3c9cc3	vprintk
+EXPORT_SYMBOL vmlinux 0x8e527c53	interruptible_sleep_on_timeout
+EXPORT_SYMBOL vmlinux 0x8e736367	tty_kref_put
+EXPORT_SYMBOL vmlinux 0x8e763ae1	send_remote_softirq
+EXPORT_SYMBOL vmlinux 0x8e879bb7	__vmalloc
+EXPORT_SYMBOL vmlinux 0x8e90ffcb	elv_queue_empty
+EXPORT_SYMBOL vmlinux 0x8eb8d098	sync_blockdev
+EXPORT_SYMBOL vmlinux 0x8ebc7e8e	drm_sg_alloc
+EXPORT_SYMBOL vmlinux 0x8ee88d1c	__down_read_trylock
+EXPORT_SYMBOL vmlinux 0x8ef22876	arp_broken_ops
+EXPORT_SYMBOL vmlinux 0x8f48679a	rb_prev
+EXPORT_SYMBOL vmlinux 0x8f593407	i2c_transfer
+EXPORT_SYMBOL vmlinux 0x8f6b7950	set_irq_data
+EXPORT_SYMBOL vmlinux 0x8f6ce54e	drm_mm_dump_table
+EXPORT_SYMBOL vmlinux 0x8fca34f5	ebus_dma_residue
+EXPORT_SYMBOL vmlinux 0x8ff2fdd9	phy_start_aneg
+EXPORT_SYMBOL vmlinux 0x90035333	secure_tcpv6_sequence_number
+EXPORT_SYMBOL vmlinux 0x9023e32a	fb_validate_mode
+EXPORT_SYMBOL vmlinux 0x90306266	posix_test_lock
+EXPORT_SYMBOL vmlinux 0x904b6f05	fd_install
+EXPORT_SYMBOL vmlinux 0x906c1929	tty_check_change
+EXPORT_SYMBOL vmlinux 0x90d4dbbe	drm_mode_probed_add
+EXPORT_SYMBOL vmlinux 0x91038401	eth_header_cache
+EXPORT_SYMBOL vmlinux 0x9107cf2a	pci_enable_wake
+EXPORT_SYMBOL vmlinux 0x9111e704	sock_rfree
+EXPORT_SYMBOL vmlinux 0x9117a881	prom_getstring
+EXPORT_SYMBOL vmlinux 0x912b1434	skb_copy_bits
+EXPORT_SYMBOL vmlinux 0x91481982	__ratelimit
+EXPORT_SYMBOL vmlinux 0x915aff25	alloc_etherdev_mq
+EXPORT_SYMBOL vmlinux 0x916faa5e	drm_ati_pcigart_init
+EXPORT_SYMBOL vmlinux 0x91766c09	param_get_ulong
+EXPORT_SYMBOL vmlinux 0x9180da63	nf_unregister_hook
+EXPORT_SYMBOL vmlinux 0x91ea48b2	genphy_update_link
+EXPORT_SYMBOL vmlinux 0x92109464	blk_queue_max_discard_sectors
+EXPORT_SYMBOL vmlinux 0x9214ed8a	param_get_bool
+EXPORT_SYMBOL vmlinux 0x921f4390	atomic_add
+EXPORT_SYMBOL vmlinux 0x92392cd9	iov_shorten
+EXPORT_SYMBOL vmlinux 0x923d277c	dev_get_by_name
+EXPORT_SYMBOL vmlinux 0x925a9dbf	pci_request_selected_regions_exclusive
+EXPORT_SYMBOL vmlinux 0x926ea0bf	devm_free_irq
+EXPORT_SYMBOL vmlinux 0x9272e81f	serio_close
+EXPORT_SYMBOL vmlinux 0x92a39b67	jbd2_journal_get_undo_access
+EXPORT_SYMBOL vmlinux 0x92aa5ee1	jbd2_journal_try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0x92c26ff4	xrlim_allow
+EXPORT_SYMBOL vmlinux 0x92d0d1f4	_write_lock
+EXPORT_SYMBOL vmlinux 0x92e23633	register_quota_format
+EXPORT_SYMBOL vmlinux 0x92ea4ae4	crc32_le
+EXPORT_SYMBOL vmlinux 0x92f2b270	neigh_connected_output
+EXPORT_SYMBOL vmlinux 0x930735be	nf_log_register
+EXPORT_SYMBOL vmlinux 0x930d3732	bio_copy_kern
+EXPORT_SYMBOL vmlinux 0x93185a2b	bdev_stack_limits
+EXPORT_SYMBOL vmlinux 0x93553d25	set_security_override
+EXPORT_SYMBOL vmlinux 0x935f684a	tcp_close
+EXPORT_SYMBOL vmlinux 0x93639f64	register_con_driver
+EXPORT_SYMBOL vmlinux 0x9377299e	dcache_dir_open
+EXPORT_SYMBOL vmlinux 0x938e201c	xfrm_policy_register_afinfo
+EXPORT_SYMBOL vmlinux 0x93a2187e	ilookup5_nowait
+EXPORT_SYMBOL vmlinux 0x93a6e0b2	io_schedule
+EXPORT_SYMBOL vmlinux 0x93a7d58c	tty_wait_until_sent
+EXPORT_SYMBOL vmlinux 0x93aa0230	bdi_destroy
+EXPORT_SYMBOL vmlinux 0x93b6b402	ldc_unmap
+EXPORT_SYMBOL vmlinux 0x93d89410	sock_common_setsockopt
+EXPORT_SYMBOL vmlinux 0x93f7e653	__generic_block_fiemap
+EXPORT_SYMBOL vmlinux 0x93fca811	__get_free_pages
+EXPORT_SYMBOL vmlinux 0x94005fd4	submit_bh
+EXPORT_SYMBOL vmlinux 0x9427851e	get_phy_id
+EXPORT_SYMBOL vmlinux 0x942ca482	find_get_page
+EXPORT_SYMBOL vmlinux 0x9443289e	set_bit
+EXPORT_SYMBOL vmlinux 0x94483b6d	downgrade_write
+EXPORT_SYMBOL vmlinux 0x945dc000	writeback_inodes_sb
+EXPORT_SYMBOL vmlinux 0x94663e5b	of_device_is_compatible
+EXPORT_SYMBOL vmlinux 0x946b6c9f	pci_set_dma_mask
+EXPORT_SYMBOL vmlinux 0x94847b23	nf_ct_destroy
+EXPORT_SYMBOL vmlinux 0x94961283	vunmap
+EXPORT_SYMBOL vmlinux 0x9496c23c	sunserial_register_minors
+EXPORT_SYMBOL vmlinux 0x94a13d24	audit_log_start
+EXPORT_SYMBOL vmlinux 0x94fb25cc	dmam_alloc_coherent
+EXPORT_SYMBOL vmlinux 0x950b0b51	test_and_set_bit
+EXPORT_SYMBOL vmlinux 0x9514151a	_mcount
+EXPORT_SYMBOL vmlinux 0x9524e414	slow_work_unregister_user
+EXPORT_SYMBOL vmlinux 0x95415266	bit_waitqueue
+EXPORT_SYMBOL vmlinux 0x954488a4	syncookie_secret
+EXPORT_SYMBOL vmlinux 0x954b57df	disk_stack_limits
+EXPORT_SYMBOL vmlinux 0x954cbb26	vsprintf
+EXPORT_SYMBOL vmlinux 0x956c5b59	sock_register
+EXPORT_SYMBOL vmlinux 0x959321e7	qdisc_destroy
+EXPORT_SYMBOL vmlinux 0x95a4f1c0	pci_bus_read_config_byte
+EXPORT_SYMBOL vmlinux 0x95ceb864	key_update
+EXPORT_SYMBOL vmlinux 0x960700f3	pci_find_parent_resource
+EXPORT_SYMBOL vmlinux 0x962504e9	nla_reserve_nohdr
+EXPORT_SYMBOL vmlinux 0x96484ea1	phy_disable_interrupts
+EXPORT_SYMBOL vmlinux 0x9650b8a4	phy_detach
+EXPORT_SYMBOL vmlinux 0x9658c136	destroy_EII_client
+EXPORT_SYMBOL vmlinux 0x96ac0440	ldc_free
+EXPORT_SYMBOL vmlinux 0x96c1bcc9	f_setown
+EXPORT_SYMBOL vmlinux 0x96d95f03	of_find_compatible_node
+EXPORT_SYMBOL vmlinux 0x96e17585	xfrm_policy_delete
+EXPORT_SYMBOL vmlinux 0x9710c39f	blk_stack_limits
+EXPORT_SYMBOL vmlinux 0x97206e15	uart_add_one_port
+EXPORT_SYMBOL vmlinux 0x972edb0e	blk_queue_find_tag
+EXPORT_SYMBOL vmlinux 0x9753be0f	tty_free_termios
+EXPORT_SYMBOL vmlinux 0x9754ec10	radix_tree_preload
+EXPORT_SYMBOL vmlinux 0x97839d35	drm_irq_uninstall
+EXPORT_SYMBOL vmlinux 0x97a7dace	__module_put_and_exit
+EXPORT_SYMBOL vmlinux 0x97b97a7b	check_disk_change
+EXPORT_SYMBOL vmlinux 0x97f5fe2d	register_key_type
+EXPORT_SYMBOL vmlinux 0x97fb4a35	pci_restore_state
+EXPORT_SYMBOL vmlinux 0x980285f2	tty_flip_buffer_push
+EXPORT_SYMBOL vmlinux 0x98169352	lookup_one_len
+EXPORT_SYMBOL vmlinux 0x98211d55	lro_flush_all
+EXPORT_SYMBOL vmlinux 0x9856b43e	is_container_init
+EXPORT_SYMBOL vmlinux 0x986e6135	fb_pad_unaligned_buffer
+EXPORT_SYMBOL vmlinux 0x9872d116	cmos_regs
+EXPORT_SYMBOL vmlinux 0x98ab0d76	blk_start_queue
+EXPORT_SYMBOL vmlinux 0x98ab88de	jbd2_journal_file_inode
+EXPORT_SYMBOL vmlinux 0x98cc7b86	blk_rq_map_integrity_sg
+EXPORT_SYMBOL vmlinux 0x9939baaf	sk_stream_write_space
+EXPORT_SYMBOL vmlinux 0x993c1f3f	inet_unregister_protosw
+EXPORT_SYMBOL vmlinux 0x994c197b	iw_handler_get_spy
+EXPORT_SYMBOL vmlinux 0x9975597e	drm_mode_validate_size
+EXPORT_SYMBOL vmlinux 0x998bec5b	blk_queue_max_sectors
+EXPORT_SYMBOL vmlinux 0x9994c0ca	ps2_is_keyboard_id
+EXPORT_SYMBOL vmlinux 0x999ac16d	phy_ethtool_sset
+EXPORT_SYMBOL vmlinux 0x999e6202	bio_alloc_bioset
+EXPORT_SYMBOL vmlinux 0x999e8297	vfree
+EXPORT_SYMBOL vmlinux 0x99bfbe39	get_unused_fd
+EXPORT_SYMBOL vmlinux 0x99c7a8b8	jbd2_dev_to_name
+EXPORT_SYMBOL vmlinux 0x99cdc86b	sysctl_tcp_reordering
+EXPORT_SYMBOL vmlinux 0x99d24b0b	neigh_event_ns
+EXPORT_SYMBOL vmlinux 0x99dfa408	dmam_pool_destroy
+EXPORT_SYMBOL vmlinux 0x99ea12ce	panic_blink
+EXPORT_SYMBOL vmlinux 0x9a1dfd65	strpbrk
+EXPORT_SYMBOL vmlinux 0x9a632156	iov_iter_copy_from_user_atomic
+EXPORT_SYMBOL vmlinux 0x9a7b8694	phy_attach_direct
+EXPORT_SYMBOL vmlinux 0x9a995304	seq_open_private
+EXPORT_SYMBOL vmlinux 0x9aaa2ad6	add_to_page_cache_locked
+EXPORT_SYMBOL vmlinux 0x9aabc564	crc16
+EXPORT_SYMBOL vmlinux 0x9aacd62b	prom_getintdefault
+EXPORT_SYMBOL vmlinux 0x9ab087ca	security_file_permission
+EXPORT_SYMBOL vmlinux 0x9abc452f	sock_sendmsg
+EXPORT_SYMBOL vmlinux 0x9abfa266	kobject_init
+EXPORT_SYMBOL vmlinux 0x9ac4030d	generic_error_remove_page
+EXPORT_SYMBOL vmlinux 0x9ac53886	mark_buffer_async_write
+EXPORT_SYMBOL vmlinux 0x9b077342	do_sync_read
+EXPORT_SYMBOL vmlinux 0x9b0c46be	dev_addr_add_multiple
+EXPORT_SYMBOL vmlinux 0x9b2c273a	nonseekable_open
+EXPORT_SYMBOL vmlinux 0x9b388444	get_zeroed_page
+EXPORT_SYMBOL vmlinux 0x9b4eb684	vfs_set_dqblk
+EXPORT_SYMBOL vmlinux 0x9b5951b9	ip_queue_xmit
+EXPORT_SYMBOL vmlinux 0x9b7d3310	nf_register_hooks
+EXPORT_SYMBOL vmlinux 0x9b8fd796	tty_port_block_til_ready
+EXPORT_SYMBOL vmlinux 0x9b95e37d	input_open_device
+EXPORT_SYMBOL vmlinux 0x9b9eebab	km_state_notify
+EXPORT_SYMBOL vmlinux 0x9ba7089d	argv_split
+EXPORT_SYMBOL vmlinux 0x9baa4a08	pci_release_region
+EXPORT_SYMBOL vmlinux 0x9baae69e	__sk_dst_check
+EXPORT_SYMBOL vmlinux 0x9bd006fb	elv_rb_del
+EXPORT_SYMBOL vmlinux 0x9bd2b28a	lookup_hash
+EXPORT_SYMBOL vmlinux 0x9c012508	fb_parse_edid
+EXPORT_SYMBOL vmlinux 0x9c0ea3cd	memscan
+EXPORT_SYMBOL vmlinux 0x9c32096b	kmem_cache_destroy
+EXPORT_SYMBOL vmlinux 0x9c3c5dee	get_sb_nodev
+EXPORT_SYMBOL vmlinux 0x9c703ae6	_spin_lock_irqsave
+EXPORT_SYMBOL vmlinux 0x9c71e738	per_cpu__vm_event_states
+EXPORT_SYMBOL vmlinux 0x9c75a81a	otg_set_transceiver
+EXPORT_SYMBOL vmlinux 0x9ca95a0e	sort
+EXPORT_SYMBOL vmlinux 0x9cac705a	__kfifo_get
+EXPORT_SYMBOL vmlinux 0x9cb46e7e	blk_run_queue
+EXPORT_SYMBOL vmlinux 0x9cb96e92	qdisc_put_rtab
+EXPORT_SYMBOL vmlinux 0x9cdd3867	sock_get_timestamp
+EXPORT_SYMBOL vmlinux 0x9ce0e280	fb_pan_display
+EXPORT_SYMBOL vmlinux 0x9d09b6b4	unmap_mapping_range
+EXPORT_SYMBOL vmlinux 0x9d0a1b88	dm_register_target
+EXPORT_SYMBOL vmlinux 0x9d0e73f8	key_alloc
+EXPORT_SYMBOL vmlinux 0x9d3aa376	blk_iopoll_init
+EXPORT_SYMBOL vmlinux 0x9d727768	nla_put_nohdr
+EXPORT_SYMBOL vmlinux 0x9d9086e3	skb_free_datagram
+EXPORT_SYMBOL vmlinux 0x9db21624	hex_dump_to_buffer
+EXPORT_SYMBOL vmlinux 0x9db37875	change_bit
+EXPORT_SYMBOL vmlinux 0x9dbd93d4	lro_vlan_hwaccel_receive_skb
+EXPORT_SYMBOL vmlinux 0x9dc26264	block_fsync
+EXPORT_SYMBOL vmlinux 0x9dc6728d	ethtool_op_get_rx_csum
+EXPORT_SYMBOL vmlinux 0x9dd2363c	elv_dispatch_add_tail
+EXPORT_SYMBOL vmlinux 0x9ddcf0ed	no_llseek
+EXPORT_SYMBOL vmlinux 0x9de35cb6	jbd2_journal_forget
+EXPORT_SYMBOL vmlinux 0x9df9bb70	pci_request_regions
+EXPORT_SYMBOL vmlinux 0x9e10e9e2	skb_dequeue
+EXPORT_SYMBOL vmlinux 0x9e34d147	blk_cleanup_queue
+EXPORT_SYMBOL vmlinux 0x9e3c07e6	jbd2_journal_set_features
+EXPORT_SYMBOL vmlinux 0x9e53883d	da903x_query_status
+EXPORT_SYMBOL vmlinux 0x9e771285	_PAGE_E
+EXPORT_SYMBOL vmlinux 0x9e9f1714	__bitmap_andnot
+EXPORT_SYMBOL vmlinux 0x9ebd4c04	adjust_resource
+EXPORT_SYMBOL vmlinux 0x9ed53cc3	framebuffer_release
+EXPORT_SYMBOL vmlinux 0x9edbecae	snprintf
+EXPORT_SYMBOL vmlinux 0x9eecde16	do_brk
+EXPORT_SYMBOL vmlinux 0x9eecfc4e	elevator_exit
+EXPORT_SYMBOL vmlinux 0x9f100139	jiffies_to_clock_t
+EXPORT_SYMBOL vmlinux 0x9f25ac28	generic_permission
+EXPORT_SYMBOL vmlinux 0x9f2bdaac	__bitmap_or
+EXPORT_SYMBOL vmlinux 0x9f2d549d	write_one_page
+EXPORT_SYMBOL vmlinux 0x9f2d613e	param_set_bool
+EXPORT_SYMBOL vmlinux 0x9f62bfc5	remove_wait_queue
+EXPORT_SYMBOL vmlinux 0x9f668ef8	inet_stream_connect
+EXPORT_SYMBOL vmlinux 0x9f9756d7	tcf_exts_dump
+EXPORT_SYMBOL vmlinux 0x9f984513	strrchr
+EXPORT_SYMBOL vmlinux 0x9faf7627	tcp_v4_md5_do_add
+EXPORT_SYMBOL vmlinux 0x9fe26f49	splice_from_pipe_end
+EXPORT_SYMBOL vmlinux 0xa004d9a7	km_policy_notify
+EXPORT_SYMBOL vmlinux 0xa0079717	of_unregister_driver
+EXPORT_SYMBOL vmlinux 0xa00b268c	fbcon_set_tileops
+EXPORT_SYMBOL vmlinux 0xa03523d5	security_unix_stream_connect
+EXPORT_SYMBOL vmlinux 0xa03b7485	vio_send_sid
+EXPORT_SYMBOL vmlinux 0xa03f7187	tcf_hash_search
+EXPORT_SYMBOL vmlinux 0xa04a01bd	qdisc_class_hash_insert
+EXPORT_SYMBOL vmlinux 0xa056a190	kernel_sock_ioctl
+EXPORT_SYMBOL vmlinux 0xa058064c	__blk_end_request_all
+EXPORT_SYMBOL vmlinux 0xa05c03df	mempool_kmalloc
+EXPORT_SYMBOL vmlinux 0xa05eb6aa	get_sb_bdev
+EXPORT_SYMBOL vmlinux 0xa068db9b	tcp_sendmsg
+EXPORT_SYMBOL vmlinux 0xa0787447	get_disk
+EXPORT_SYMBOL vmlinux 0xa07cb26a	inode_add_bytes
+EXPORT_SYMBOL vmlinux 0xa08f56c5	page_zero_new_buffers
+EXPORT_SYMBOL vmlinux 0xa0b04675	vmalloc_32
+EXPORT_SYMBOL vmlinux 0xa0b2735b	km_query
+EXPORT_SYMBOL vmlinux 0xa0ceef51	out_of_line_wait_on_bit
+EXPORT_SYMBOL vmlinux 0xa0d3d560	ksize
+EXPORT_SYMBOL vmlinux 0xa0ebb2ba	_PAGE_CACHE
+EXPORT_SYMBOL vmlinux 0xa0ecae4a	__free_pages
+EXPORT_SYMBOL vmlinux 0xa0fbac79	wake_up_bit
+EXPORT_SYMBOL vmlinux 0xa10167e7	blk_start_request
+EXPORT_SYMBOL vmlinux 0xa108eb4d	sysctl_optmem_max
+EXPORT_SYMBOL vmlinux 0xa120d33c	tty_unregister_ldisc
+EXPORT_SYMBOL vmlinux 0xa13798f8	printk_ratelimit
+EXPORT_SYMBOL vmlinux 0xa145dc4b	vga_set_legacy_decoding
+EXPORT_SYMBOL vmlinux 0xa1685504	unlock_rename
+EXPORT_SYMBOL vmlinux 0xa170ffa4	sock_no_sendmsg
+EXPORT_SYMBOL vmlinux 0xa183c901	free_buffer_head
+EXPORT_SYMBOL vmlinux 0xa194bdba	call_usermodehelper_stdinpipe
+EXPORT_SYMBOL vmlinux 0xa19a01eb	tcp_create_openreq_child
+EXPORT_SYMBOL vmlinux 0xa1b759ce	fb_add_videomode
+EXPORT_SYMBOL vmlinux 0xa1ba4b95	memcpy_fromiovecend
+EXPORT_SYMBOL vmlinux 0xa1bc123c	kset_register
+EXPORT_SYMBOL vmlinux 0xa1c76e0a	_cond_resched
+EXPORT_SYMBOL vmlinux 0xa1cea0b8	proc_dointvec
+EXPORT_SYMBOL vmlinux 0xa1d08c82	key_task_permission
+EXPORT_SYMBOL vmlinux 0xa1de13d5	__neigh_event_send
+EXPORT_SYMBOL vmlinux 0xa1eabd87	drm_mode_list_concat
+EXPORT_SYMBOL vmlinux 0xa1f0c542	pci_iounmap
+EXPORT_SYMBOL vmlinux 0xa20ce1b8	net_msg_warn
+EXPORT_SYMBOL vmlinux 0xa20e82c8	drm_pci_free
+EXPORT_SYMBOL vmlinux 0xa218f413	pci_bus_read_config_word
+EXPORT_SYMBOL vmlinux 0xa2230181	add_wait_queue_exclusive
+EXPORT_SYMBOL vmlinux 0xa23abdad	kernel_sendmsg
+EXPORT_SYMBOL vmlinux 0xa272ee14	block_commit_write
+EXPORT_SYMBOL vmlinux 0xa28cd359	tcf_exts_destroy
+EXPORT_SYMBOL vmlinux 0xa28e76e6	schedule_work
+EXPORT_SYMBOL vmlinux 0xa29b1708	tcp_memory_allocated
+EXPORT_SYMBOL vmlinux 0xa2a5fd77	inet_ehash_secret
+EXPORT_SYMBOL vmlinux 0xa2d0900a	inet_dev_addr_type
+EXPORT_SYMBOL vmlinux 0xa2dc8899	init_file
+EXPORT_SYMBOL vmlinux 0xa2eb0748	pci_alloc_consistent
+EXPORT_SYMBOL vmlinux 0xa2ef1358	napi_gro_frags
+EXPORT_SYMBOL vmlinux 0xa3057aac	jbd2_log_wait_commit
+EXPORT_SYMBOL vmlinux 0xa309073f	pcim_iomap_regions
+EXPORT_SYMBOL vmlinux 0xa30ab236	follow_pfn
+EXPORT_SYMBOL vmlinux 0xa329f07e	register_shrinker
+EXPORT_SYMBOL vmlinux 0xa332cdd1	security_tun_dev_attach
+EXPORT_SYMBOL vmlinux 0xa3396c60	input_flush_device
+EXPORT_SYMBOL vmlinux 0xa33f7c7c	nla_strlcpy
+EXPORT_SYMBOL vmlinux 0xa342c3d8	inetdev_by_index
+EXPORT_SYMBOL vmlinux 0xa34a4aa7	___copy_to_user
+EXPORT_SYMBOL vmlinux 0xa35de80f	ipv4_config
+EXPORT_SYMBOL vmlinux 0xa35e3a92	dquot_commit
+EXPORT_SYMBOL vmlinux 0xa3618c0e	__lock_buffer
+EXPORT_SYMBOL vmlinux 0xa36b533d	inet_csk_accept
+EXPORT_SYMBOL vmlinux 0xa36cbfdd	blk_rq_init
+EXPORT_SYMBOL vmlinux 0xa39b4cf2	udelay
+EXPORT_SYMBOL vmlinux 0xa3a00f4e	pci_bus_set_ops
+EXPORT_SYMBOL vmlinux 0xa3bc6b6d	compat_tcp_getsockopt
+EXPORT_SYMBOL vmlinux 0xa3c9be66	pci_domain_nr
+EXPORT_SYMBOL vmlinux 0xa3f30d20	tty_hung_up_p
+EXPORT_SYMBOL vmlinux 0xa40dd829	get_write_access
+EXPORT_SYMBOL vmlinux 0xa440964c	lease_get_mtime
+EXPORT_SYMBOL vmlinux 0xa46f65c1	nf_log_packet
+EXPORT_SYMBOL vmlinux 0xa47418e5	pci_add_new_bus
+EXPORT_SYMBOL vmlinux 0xa492046c	udp_lib_get_port
+EXPORT_SYMBOL vmlinux 0xa4a69f64	blk_rq_count_integrity_sg
+EXPORT_SYMBOL vmlinux 0xa4c95b70	xfrm4_rcv_encap
+EXPORT_SYMBOL vmlinux 0xa4d0a8e9	init_timer_key
+EXPORT_SYMBOL vmlinux 0xa52a3173	alloc_fddidev
+EXPORT_SYMBOL vmlinux 0xa52dac7c	netif_rx
+EXPORT_SYMBOL vmlinux 0xa5386c7f	kernel_bind
+EXPORT_SYMBOL vmlinux 0xa5671661	blk_queue_merge_bvec
+EXPORT_SYMBOL vmlinux 0xa568a8c9	__napi_complete
+EXPORT_SYMBOL vmlinux 0xa5699c03	pci_find_capability
+EXPORT_SYMBOL vmlinux 0xa576c263	generic_find_next_le_bit
+EXPORT_SYMBOL vmlinux 0xa5808bbf	tasklet_init
+EXPORT_SYMBOL vmlinux 0xa58b6804	nla_parse
+EXPORT_SYMBOL vmlinux 0xa598e29c	vesa_modes
+EXPORT_SYMBOL vmlinux 0xa5a910ee	wait_on_page_bit
+EXPORT_SYMBOL vmlinux 0xa5b8fb62	dev_alloc_name
+EXPORT_SYMBOL vmlinux 0xa5d623df	slow_work_cancel
+EXPORT_SYMBOL vmlinux 0xa5da8250	rtnetlink_put_metrics
+EXPORT_SYMBOL vmlinux 0xa5e4f65c	__next_cpu_nr
+EXPORT_SYMBOL vmlinux 0xa5e68673	tlb_type
+EXPORT_SYMBOL vmlinux 0xa614d17c	of_n_addr_cells
+EXPORT_SYMBOL vmlinux 0xa622bf16	generic_file_splice_write
+EXPORT_SYMBOL vmlinux 0xa62c6511	kill_fasync
+EXPORT_SYMBOL vmlinux 0xa64b4aa2	do_sync_write
+EXPORT_SYMBOL vmlinux 0xa65a78e0	ldc_bind
+EXPORT_SYMBOL vmlinux 0xa68124fa	hweight8
+EXPORT_SYMBOL vmlinux 0xa681fe88	generate_random_uuid
+EXPORT_SYMBOL vmlinux 0xa682be8d	bioset_create
+EXPORT_SYMBOL vmlinux 0xa6860ce0	tcf_hash_release
+EXPORT_SYMBOL vmlinux 0xa68745c4	textsearch_unregister
+EXPORT_SYMBOL vmlinux 0xa69b35ef	pci_vpd_truncate
+EXPORT_SYMBOL vmlinux 0xa6d836d5	sock_no_connect
+EXPORT_SYMBOL vmlinux 0xa6dca2a9	sock_get_timestampns
+EXPORT_SYMBOL vmlinux 0xa6dcc773	rb_insert_color
+EXPORT_SYMBOL vmlinux 0xa702c45a	mdiobus_register
+EXPORT_SYMBOL vmlinux 0xa71a5fb9	drm_mode_connector_update_edid_property
+EXPORT_SYMBOL vmlinux 0xa7222cce	blk_queue_update_dma_pad
+EXPORT_SYMBOL vmlinux 0xa72a0f5b	nr_online_nodes
+EXPORT_SYMBOL vmlinux 0xa74804df	__xfrm_decode_session
+EXPORT_SYMBOL vmlinux 0xa756c496	pci_bus_write_config_word
+EXPORT_SYMBOL vmlinux 0xa75c4f20	sk_wait_data
+EXPORT_SYMBOL vmlinux 0xa76b2945	sbusfb_compat_ioctl
+EXPORT_SYMBOL vmlinux 0xa77dd960	fbcon_set_bitops
+EXPORT_SYMBOL vmlinux 0xa78aa199	sget
+EXPORT_SYMBOL vmlinux 0xa7b75c52	dev_close
+EXPORT_SYMBOL vmlinux 0xa7d37bee	pci_back_from_sleep
+EXPORT_SYMBOL vmlinux 0xa82958af	drm_debugfs_create_files
+EXPORT_SYMBOL vmlinux 0xa8391b66	tty_devnum
+EXPORT_SYMBOL vmlinux 0xa886a958	krealloc
+EXPORT_SYMBOL vmlinux 0xa8877f00	inet_frags_init
+EXPORT_SYMBOL vmlinux 0xa89ab861	pci_request_selected_regions
+EXPORT_SYMBOL vmlinux 0xa8a6f639	__check_region
+EXPORT_SYMBOL vmlinux 0xa8b26c2c	blk_free_tags
+EXPORT_SYMBOL vmlinux 0xa8fef7bb	security_unix_may_send
+EXPORT_SYMBOL vmlinux 0xa9111a47	do_gettimeofday
+EXPORT_SYMBOL vmlinux 0xa922ba6c	ethtool_op_set_tso
+EXPORT_SYMBOL vmlinux 0xa9541f6a	kill_block_super
+EXPORT_SYMBOL vmlinux 0xa955f0cd	add_timer
+EXPORT_SYMBOL vmlinux 0xa965d226	__kill_fasync
+EXPORT_SYMBOL vmlinux 0xa96d0004	nf_getsockopt
+EXPORT_SYMBOL vmlinux 0xa99de769	noop_qdisc
+EXPORT_SYMBOL vmlinux 0xa9a2061c	dm_kcopyd_client_create
+EXPORT_SYMBOL vmlinux 0xa9fa95ac	pci_dev_driver
+EXPORT_SYMBOL vmlinux 0xaa103a1c	con_copy_unimap
+EXPORT_SYMBOL vmlinux 0xaa145ae6	call_usermodehelper_pipe
+EXPORT_SYMBOL vmlinux 0xaa1684a0	xfrm_register_type
+EXPORT_SYMBOL vmlinux 0xaa40b88d	drm_mode_create
+EXPORT_SYMBOL vmlinux 0xaa744a75	bio_integrity_alloc_bioset
+EXPORT_SYMBOL vmlinux 0xaa9b63c3	register_exec_domain
+EXPORT_SYMBOL vmlinux 0xaaccb028	simple_unlink
+EXPORT_SYMBOL vmlinux 0xaacea5fd	__pagevec_release
+EXPORT_SYMBOL vmlinux 0xaad5a4b0	bio_add_pc_page
+EXPORT_SYMBOL vmlinux 0xaafdc258	strcasecmp
+EXPORT_SYMBOL vmlinux 0xab094f59	drm_connector_cleanup
+EXPORT_SYMBOL vmlinux 0xab49431f	block_write_begin
+EXPORT_SYMBOL vmlinux 0xab6a6273	do_splice_from
+EXPORT_SYMBOL vmlinux 0xab74c9a1	bio_phys_segments
+EXPORT_SYMBOL vmlinux 0xab7fcfff	tcf_exts_change
+EXPORT_SYMBOL vmlinux 0xaba9ff34	allocate_resource
+EXPORT_SYMBOL vmlinux 0xabaed4b1	__netdev_alloc_skb
+EXPORT_SYMBOL vmlinux 0xabc9f2f0	drm_mode_prune_invalid
+EXPORT_SYMBOL vmlinux 0xabd0c91c	rtc_time_to_tm
+EXPORT_SYMBOL vmlinux 0xac012829	generic_setlease
+EXPORT_SYMBOL vmlinux 0xac034ffd	dm_table_get_md
+EXPORT_SYMBOL vmlinux 0xac0ba8c1	blk_iopoll_disable
+EXPORT_SYMBOL vmlinux 0xac2dab09	prom_getint
+EXPORT_SYMBOL vmlinux 0xac383451	radix_tree_tag_clear
+EXPORT_SYMBOL vmlinux 0xac5f9b6b	__bread
+EXPORT_SYMBOL vmlinux 0xac6855b0	gen_kill_estimator
+EXPORT_SYMBOL vmlinux 0xaccabc6a	in4_pton
+EXPORT_SYMBOL vmlinux 0xacdeb154	__tracepoint_module_get
+EXPORT_SYMBOL vmlinux 0xace4c8ed	tick_ops
+EXPORT_SYMBOL vmlinux 0xaceaac5b	clear_bdi_congested
+EXPORT_SYMBOL vmlinux 0xacf4d843	match_strdup
+EXPORT_SYMBOL vmlinux 0xad02942c	simple_readpage
+EXPORT_SYMBOL vmlinux 0xad0413d4	match_hex
+EXPORT_SYMBOL vmlinux 0xad1b1058	end_buffer_write_sync
+EXPORT_SYMBOL vmlinux 0xad50b434	gnet_stats_copy_queue
+EXPORT_SYMBOL vmlinux 0xad53db4a	set_blocksize
+EXPORT_SYMBOL vmlinux 0xae330cbe	drm_release
+EXPORT_SYMBOL vmlinux 0xae357354	mii_phy_probe
+EXPORT_SYMBOL vmlinux 0xae5962dc	xfrm_state_check_expire
+EXPORT_SYMBOL vmlinux 0xae6b36b5	drm_mode_config_cleanup
+EXPORT_SYMBOL vmlinux 0xae7d2883	sunserial_unregister_minors
+EXPORT_SYMBOL vmlinux 0xae9309f0	sk_alloc
+EXPORT_SYMBOL vmlinux 0xaed013b9	posix_acl_valid
+EXPORT_SYMBOL vmlinux 0xaef004f3	read_dev_sector
+EXPORT_SYMBOL vmlinux 0xaf2541a5	generic_write_end
+EXPORT_SYMBOL vmlinux 0xaf29788e	drm_sman_init
+EXPORT_SYMBOL vmlinux 0xaf36d193	sg_miter_next
+EXPORT_SYMBOL vmlinux 0xaf61ff06	block_is_partially_uptodate
+EXPORT_SYMBOL vmlinux 0xaf895d22	set_disk_ro
+EXPORT_SYMBOL vmlinux 0xafb93a93	security_inode_permission
+EXPORT_SYMBOL vmlinux 0xafd1b1c0	cad_pid
+EXPORT_SYMBOL vmlinux 0xafe3f6d5	drm_mm_search_free_in_range
+EXPORT_SYMBOL vmlinux 0xafe6583b	sg_last
+EXPORT_SYMBOL vmlinux 0xafe82e10	strcspn
+EXPORT_SYMBOL vmlinux 0xaffb41d6	__wake_up_bit
+EXPORT_SYMBOL vmlinux 0xb0063b36	kill_pgrp
+EXPORT_SYMBOL vmlinux 0xb00ef5ac	proc_doulongvec_ms_jiffies_minmax
+EXPORT_SYMBOL vmlinux 0xb0339784	devcgroup_inode_permission
+EXPORT_SYMBOL vmlinux 0xb039b6ed	inet_listen
+EXPORT_SYMBOL vmlinux 0xb055d8da	posix_acl_to_xattr
+EXPORT_SYMBOL vmlinux 0xb06aee4e	serio_rescan
+EXPORT_SYMBOL vmlinux 0xb09b6a64	__dev_get_by_name
+EXPORT_SYMBOL vmlinux 0xb0b2e9a4	nla_append
+EXPORT_SYMBOL vmlinux 0xb0b847ac	__bitmap_full
+EXPORT_SYMBOL vmlinux 0xb0d2c9fe	pci_free_consistent
+EXPORT_SYMBOL vmlinux 0xb0d715db	idr_for_each
+EXPORT_SYMBOL vmlinux 0xb0e10781	get_option
+EXPORT_SYMBOL vmlinux 0xb0f31b0f	of_find_node_by_path
+EXPORT_SYMBOL vmlinux 0xb11877eb	pci_assign_resource
+EXPORT_SYMBOL vmlinux 0xb118d0fd	cfb_fillrect
+EXPORT_SYMBOL vmlinux 0xb11f4f06	drm_rmmap_locked
+EXPORT_SYMBOL vmlinux 0xb11fa1ce	strlcat
+EXPORT_SYMBOL vmlinux 0xb123e013	d_alloc
+EXPORT_SYMBOL vmlinux 0xb127e033	__percpu_counter_sum
+EXPORT_SYMBOL vmlinux 0xb13f8fb6	_write_unlock_irqrestore
+EXPORT_SYMBOL vmlinux 0xb141dad2	drm_core_ioremap
+EXPORT_SYMBOL vmlinux 0xb1507584	security_path_rename
+EXPORT_SYMBOL vmlinux 0xb18e02c3	radix_tree_gang_lookup_tag
+EXPORT_SYMBOL vmlinux 0xb19760c3	bitmap_onto
+EXPORT_SYMBOL vmlinux 0xb1c3a01a	oops_in_progress
+EXPORT_SYMBOL vmlinux 0xb1ccc5be	pci_set_consistent_dma_mask
+EXPORT_SYMBOL vmlinux 0xb1e6665f	gnet_stats_copy_app
+EXPORT_SYMBOL vmlinux 0xb1f975aa	unlock_kernel
+EXPORT_SYMBOL vmlinux 0xb1fda959	neigh_table_init_no_netlink
+EXPORT_SYMBOL vmlinux 0xb1feae09	prepare_creds
+EXPORT_SYMBOL vmlinux 0xb203bd36	jbd2_journal_begin_ordered_truncate
+EXPORT_SYMBOL vmlinux 0xb2070290	simple_dir_inode_operations
+EXPORT_SYMBOL vmlinux 0xb20acb70	genl_unregister_ops
+EXPORT_SYMBOL vmlinux 0xb20dbe2b	drm_clflush_pages
+EXPORT_SYMBOL vmlinux 0xb224fbe2	param_get_short
+EXPORT_SYMBOL vmlinux 0xb22fe6a3	netdev_increment_features
+EXPORT_SYMBOL vmlinux 0xb24934cc	wait_on_sync_kiocb
+EXPORT_SYMBOL vmlinux 0xb25bffed	km_policy_expired
+EXPORT_SYMBOL vmlinux 0xb263b26e	__alloc_pages_nodemask
+EXPORT_SYMBOL vmlinux 0xb2682405	utf8_to_utf32
+EXPORT_SYMBOL vmlinux 0xb2707e93	iw_handler_set_thrspy
+EXPORT_SYMBOL vmlinux 0xb293da4d	journal_force_commit
+EXPORT_SYMBOL vmlinux 0xb2da6a0f	ebus_dma_request
+EXPORT_SYMBOL vmlinux 0xb2e2edfc	d_obtain_alias
+EXPORT_SYMBOL vmlinux 0xb2ec79c4	udp_lib_setsockopt
+EXPORT_SYMBOL vmlinux 0xb2f1f526	kmem_cache_shrink
+EXPORT_SYMBOL vmlinux 0xb34c7b6c	blk_queue_max_hw_sectors
+EXPORT_SYMBOL vmlinux 0xb35c01a4	input_close_device
+EXPORT_SYMBOL vmlinux 0xb3648baf	pci_enable_bridges
+EXPORT_SYMBOL vmlinux 0xb3785aa8	unlock_page
+EXPORT_SYMBOL vmlinux 0xb380eac5	pci_map_single
+EXPORT_SYMBOL vmlinux 0xb3994c7a	per_cpu__kstat
+EXPORT_SYMBOL vmlinux 0xb39ebaaa	inode_permission
+EXPORT_SYMBOL vmlinux 0xb3a307c6	si_meminfo
+EXPORT_SYMBOL vmlinux 0xb3ff1f69	free_pages_exact
+EXPORT_SYMBOL vmlinux 0xb423dba1	console_blanked
+EXPORT_SYMBOL vmlinux 0xb42453d3	param_get_invbool
+EXPORT_SYMBOL vmlinux 0xb435bd66	mdesc_next_arc
+EXPORT_SYMBOL vmlinux 0xb44d50d9	skb_gso_segment
+EXPORT_SYMBOL vmlinux 0xb47e21e9	tty_port_free_xmit_buf
+EXPORT_SYMBOL vmlinux 0xb4b2ae87	ethtool_op_get_sg
+EXPORT_SYMBOL vmlinux 0xb4b8bff5	jbd2_journal_get_write_access
+EXPORT_SYMBOL vmlinux 0xb4db3099	single_open
+EXPORT_SYMBOL vmlinux 0xb4db7222	genl_register_family_with_ops
+EXPORT_SYMBOL vmlinux 0xb501e547	of_find_matching_node
+EXPORT_SYMBOL vmlinux 0xb5044271	vsscanf
+EXPORT_SYMBOL vmlinux 0xb50b9732	vfs_follow_link
+EXPORT_SYMBOL vmlinux 0xb535bb5a	journal_ack_err
+EXPORT_SYMBOL vmlinux 0xb53cd945	netpoll_cleanup
+EXPORT_SYMBOL vmlinux 0xb54533f7	usecs_to_jiffies
+EXPORT_SYMBOL vmlinux 0xb5491703	dev_alloc_skb
+EXPORT_SYMBOL vmlinux 0xb55095d5	ps2_sendbyte
+EXPORT_SYMBOL vmlinux 0xb55d21a7	_read_lock_irqsave
+EXPORT_SYMBOL vmlinux 0xb5a459dc	unregister_blkdev
+EXPORT_SYMBOL vmlinux 0xb63da9d0	con_is_bound
+EXPORT_SYMBOL vmlinux 0xb63fbd20	tty_port_raise_dtr_rts
+EXPORT_SYMBOL vmlinux 0xb64dab87	do_splice_to
+EXPORT_SYMBOL vmlinux 0xb656e90e	xfrm_state_update
+EXPORT_SYMBOL vmlinux 0xb678366f	int_sqrt
+EXPORT_SYMBOL vmlinux 0xb68af004	log_wait_commit
+EXPORT_SYMBOL vmlinux 0xb68fd831	finish_wait
+EXPORT_SYMBOL vmlinux 0xb692edfa	mempool_free
+EXPORT_SYMBOL vmlinux 0xb6a61a86	qdisc_get_rtab
+EXPORT_SYMBOL vmlinux 0xb6a68816	find_last_bit
+EXPORT_SYMBOL vmlinux 0xb6bffb99	kstat_irqs_cpu
+EXPORT_SYMBOL vmlinux 0xb6d1e295	pci_bus_write_config_byte
+EXPORT_SYMBOL vmlinux 0xb6dfd972	skb_prepare_seq_read
+EXPORT_SYMBOL vmlinux 0xb6e578ce	bio_integrity_enabled
+EXPORT_SYMBOL vmlinux 0xb6f077df	udp_lib_unhash
+EXPORT_SYMBOL vmlinux 0xb714f2b9	pci_read_vpd
+EXPORT_SYMBOL vmlinux 0xb718c29f	pci_set_mwi
+EXPORT_SYMBOL vmlinux 0xb7323d87	truncate_pagecache
+EXPORT_SYMBOL vmlinux 0xb756fd74	filemap_fdatawrite_range
+EXPORT_SYMBOL vmlinux 0xb75dcfee	_read_lock_irq
+EXPORT_SYMBOL vmlinux 0xb77f8b08	dquot_scan_active
+EXPORT_SYMBOL vmlinux 0xb7864119	pci_bus_add_devices
+EXPORT_SYMBOL vmlinux 0xb7871f57	vmap
+EXPORT_SYMBOL vmlinux 0xb798b8e4	flow_cache_lookup
+EXPORT_SYMBOL vmlinux 0xb7a658a0	__register_chrdev
+EXPORT_SYMBOL vmlinux 0xb7a9761e	dev_add_pack
+EXPORT_SYMBOL vmlinux 0xb7ccb3c7	twl4030_i2c_read_u8
+EXPORT_SYMBOL vmlinux 0xb7ce2e9b	alloc_pages_current
+EXPORT_SYMBOL vmlinux 0xb7cf52d3	dev_get_stats
+EXPORT_SYMBOL vmlinux 0xb813ce5a	timecompare_transform
+EXPORT_SYMBOL vmlinux 0xb8164879	blk_end_request
+EXPORT_SYMBOL vmlinux 0xb82dfbb1	elv_rb_latter_request
+EXPORT_SYMBOL vmlinux 0xb82fede6	d_genocide
+EXPORT_SYMBOL vmlinux 0xb83663c6	vio_ldc_alloc
+EXPORT_SYMBOL vmlinux 0xb83ce264	genphy_resume
+EXPORT_SYMBOL vmlinux 0xb86e4ab9	random32
+EXPORT_SYMBOL vmlinux 0xb89af9bf	srandom32
+EXPORT_SYMBOL vmlinux 0xb8ada83d	rtnl_set_sk_err
+EXPORT_SYMBOL vmlinux 0xb8c01b7a	pci_remove_bus_device
+EXPORT_SYMBOL vmlinux 0xb8cb734f	vio_port_up
+EXPORT_SYMBOL vmlinux 0xb8d10ba8	copy_strings_kernel
+EXPORT_SYMBOL vmlinux 0xb8de3100	drm_idlelock_take
+EXPORT_SYMBOL vmlinux 0xb8e22a9a	xfrm_input
+EXPORT_SYMBOL vmlinux 0xb8f41e99	tcp_child_process
+EXPORT_SYMBOL vmlinux 0xb917403a	skb_pull
+EXPORT_SYMBOL vmlinux 0xb9249d16	cpu_possible_mask
+EXPORT_SYMBOL vmlinux 0xb925bf70	key_negate_and_link
+EXPORT_SYMBOL vmlinux 0xb92c8039	of_mdiobus_register
+EXPORT_SYMBOL vmlinux 0xb935ec64	__tcp_get_md5sig_pool
+EXPORT_SYMBOL vmlinux 0xb94bfd8e	pci_dma_sync_sg_for_cpu
+EXPORT_SYMBOL vmlinux 0xb95d46ba	pagecache_write_begin
+EXPORT_SYMBOL vmlinux 0xb9758179	bio_add_page
+EXPORT_SYMBOL vmlinux 0xb98a0185	rtc_tm_to_time
+EXPORT_SYMBOL vmlinux 0xb9b4cfb2	ioctl_by_bdev
+EXPORT_SYMBOL vmlinux 0xb9e02ce9	sk_receive_skb
+EXPORT_SYMBOL vmlinux 0xb9fdabbd	__serio_register_port
+EXPORT_SYMBOL vmlinux 0xba06e15b	keyring_clear
+EXPORT_SYMBOL vmlinux 0xba1b2c7a	pci_scan_single_device
+EXPORT_SYMBOL vmlinux 0xba497f13	loops_per_jiffy
+EXPORT_SYMBOL vmlinux 0xba4eea46	vfs_dq_drop
+EXPORT_SYMBOL vmlinux 0xba866600	find_get_pages_tag
+EXPORT_SYMBOL vmlinux 0xbaa2782a	kstrndup
+EXPORT_SYMBOL vmlinux 0xbaaab8ae	timespec_to_jiffies
+EXPORT_SYMBOL vmlinux 0xbae048da	__secpath_destroy
+EXPORT_SYMBOL vmlinux 0xbaea1451	read_cache_page_gfp
+EXPORT_SYMBOL vmlinux 0xbb0fe302	vmalloc_to_page
+EXPORT_SYMBOL vmlinux 0xbb167766	fb_var_to_videomode
+EXPORT_SYMBOL vmlinux 0xbb189cad	disallow_signal
+EXPORT_SYMBOL vmlinux 0xbb1b64c8	ip_cmsg_recv
+EXPORT_SYMBOL vmlinux 0xbb1fad6a	flush_delayed_work
+EXPORT_SYMBOL vmlinux 0xbb5c6872	inet_frag_kill
+EXPORT_SYMBOL vmlinux 0xbb5d343d	xfrm_get_acqseq
+EXPORT_SYMBOL vmlinux 0xbb99125c	get_default_font
+EXPORT_SYMBOL vmlinux 0xbbbcf67e	unregister_binfmt
+EXPORT_SYMBOL vmlinux 0xbbc8e941	sock_wfree
+EXPORT_SYMBOL vmlinux 0xbbe1ee57	netpoll_parse_options
+EXPORT_SYMBOL vmlinux 0xbbf60ce6	i2c_smbus_xfer
+EXPORT_SYMBOL vmlinux 0xbbfb6b02	kobject_set_name
+EXPORT_SYMBOL vmlinux 0xbc07a333	netif_carrier_on
+EXPORT_SYMBOL vmlinux 0xbc0b077d	ilookup
+EXPORT_SYMBOL vmlinux 0xbc0b1291	unregister_exec_domain
+EXPORT_SYMBOL vmlinux 0xbc2d1cc4	handle_sysrq
+EXPORT_SYMBOL vmlinux 0xbc4aa5e7	mutex_lock
+EXPORT_SYMBOL vmlinux 0xbc4f5043	bio_get_nr_vecs
+EXPORT_SYMBOL vmlinux 0xbc7bd53f	of_phy_find_device
+EXPORT_SYMBOL vmlinux 0xbca32209	compat_ip_setsockopt
+EXPORT_SYMBOL vmlinux 0xbca7fa02	sock_no_getname
+EXPORT_SYMBOL vmlinux 0xbcb12cac	input_grab_device
+EXPORT_SYMBOL vmlinux 0xbcbc0061	down_trylock
+EXPORT_SYMBOL vmlinux 0xbcc1a6b8	splice_from_pipe_next
+EXPORT_SYMBOL vmlinux 0xbcc1af64	inode_init_always
+EXPORT_SYMBOL vmlinux 0xbcc83d2e	blk_queue_make_request
+EXPORT_SYMBOL vmlinux 0xbcd69a26	bdi_unregister
+EXPORT_SYMBOL vmlinux 0xbcf9349c	key_validate
+EXPORT_SYMBOL vmlinux 0xbd0066e9	generic_delete_inode
+EXPORT_SYMBOL vmlinux 0xbd100793	cpu_online_mask
+EXPORT_SYMBOL vmlinux 0xbd19bb76	replace_mount_options
+EXPORT_SYMBOL vmlinux 0xbd2b53a1	drm_mode_remove
+EXPORT_SYMBOL vmlinux 0xbd793053	journal_start
+EXPORT_SYMBOL vmlinux 0xbd97ecd1	km_report
+EXPORT_SYMBOL vmlinux 0xbdbb2fe1	qdisc_list_del
+EXPORT_SYMBOL vmlinux 0xbdbf1b10	remap_pfn_range
+EXPORT_SYMBOL vmlinux 0xbdc63f35	tcp_rcv_state_process
+EXPORT_SYMBOL vmlinux 0xbddd6095	register_tcf_proto_ops
+EXPORT_SYMBOL vmlinux 0xbdf5c25c	rb_next
+EXPORT_SYMBOL vmlinux 0xbdfdb453	vfs_quota_on_mount
+EXPORT_SYMBOL vmlinux 0xbe0f9a07	filp_open
+EXPORT_SYMBOL vmlinux 0xbe122842	_write_unlock_bh
+EXPORT_SYMBOL vmlinux 0xbe15962e	dev_remove_pack
+EXPORT_SYMBOL vmlinux 0xbe18d4ed	d_alloc_name
+EXPORT_SYMBOL vmlinux 0xbe8a966e	blk_alloc_queue
+EXPORT_SYMBOL vmlinux 0xbe9c6c22	xfrm_policy_unregister_afinfo
+EXPORT_SYMBOL vmlinux 0xbea21937	qdisc_warn_nonwc
+EXPORT_SYMBOL vmlinux 0xbea9a478	uart_suspend_port
+EXPORT_SYMBOL vmlinux 0xbed87108	blk_queue_start_tag
+EXPORT_SYMBOL vmlinux 0xbeda4e90	skb_make_writable
+EXPORT_SYMBOL vmlinux 0xbef3d159	deactivate_locked_super
+EXPORT_SYMBOL vmlinux 0xbef43296	console_conditional_schedule
+EXPORT_SYMBOL vmlinux 0xbef7ac00	blk_rq_map_user_iov
+EXPORT_SYMBOL vmlinux 0xbf00d379	alloc_pci_dev
+EXPORT_SYMBOL vmlinux 0xbf1fdaaf	module_refcount
+EXPORT_SYMBOL vmlinux 0xbf3ca09c	seq_printf
+EXPORT_SYMBOL vmlinux 0xbf408010	pci_get_slot
+EXPORT_SYMBOL vmlinux 0xbf71dfd6	get_sb_ns
+EXPORT_SYMBOL vmlinux 0xbf7fd2f5	schedule_timeout_killable
+EXPORT_SYMBOL vmlinux 0xbf8ac1f5	i2c_bit_add_numbered_bus
+EXPORT_SYMBOL vmlinux 0xbf993764	__memscan_zero
+EXPORT_SYMBOL vmlinux 0xbf9bcc8d	__cap_empty_set
+EXPORT_SYMBOL vmlinux 0xbfaf361e	pcix_set_mmrbc
+EXPORT_SYMBOL vmlinux 0xbfb2ad58	gen_pool_alloc
+EXPORT_SYMBOL vmlinux 0xbfe8378a	pci_get_class
+EXPORT_SYMBOL vmlinux 0xbfee3ad5	loop_unregister_transfer
+EXPORT_SYMBOL vmlinux 0xc003c637	__strncpy_from_user
+EXPORT_SYMBOL vmlinux 0xc0044724	blk_set_default_limits
+EXPORT_SYMBOL vmlinux 0xc00b5497	pci_request_regions_exclusive
+EXPORT_SYMBOL vmlinux 0xc00bada3	clear_inode
+EXPORT_SYMBOL vmlinux 0xc01b86db	splice_from_pipe_begin
+EXPORT_SYMBOL vmlinux 0xc04d2037	security_inode_readlink
+EXPORT_SYMBOL vmlinux 0xc0580937	rb_erase
+EXPORT_SYMBOL vmlinux 0xc07844aa	of_match_node
+EXPORT_SYMBOL vmlinux 0xc09651d9	crc32_be
+EXPORT_SYMBOL vmlinux 0xc09ca072	ldc_map_single
+EXPORT_SYMBOL vmlinux 0xc0a3d105	find_next_bit
+EXPORT_SYMBOL vmlinux 0xc0ae4308	__pskb_pull_tail
+EXPORT_SYMBOL vmlinux 0xc0af648d	blk_queue_alignment_offset
+EXPORT_SYMBOL vmlinux 0xc0bf6ead	timecounter_cyc2time
+EXPORT_SYMBOL vmlinux 0xc0c0f3f3	kernel_getsockopt
+EXPORT_SYMBOL vmlinux 0xc0d1bb53	__cond_resched_lock
+EXPORT_SYMBOL vmlinux 0xc0d71b57	fb_firmware_edid
+EXPORT_SYMBOL vmlinux 0xc0dfcd38	udp_proc_register
+EXPORT_SYMBOL vmlinux 0xc129d379	dev_unicast_add
+EXPORT_SYMBOL vmlinux 0xc14b66f6	ida_get_new_above
+EXPORT_SYMBOL vmlinux 0xc15d39b1	inet_del_protocol
+EXPORT_SYMBOL vmlinux 0xc15e073c	generic_find_next_zero_le_bit
+EXPORT_SYMBOL vmlinux 0xc15f0071	audit_log_end
+EXPORT_SYMBOL vmlinux 0xc1658309	compat_sock_common_setsockopt
+EXPORT_SYMBOL vmlinux 0xc16da256	drm_sysfs_hotplug_event
+EXPORT_SYMBOL vmlinux 0xc1787afa	try_to_del_timer_sync
+EXPORT_SYMBOL vmlinux 0xc19180fa	bio_integrity_split
+EXPORT_SYMBOL vmlinux 0xc196001f	security_path_truncate
+EXPORT_SYMBOL vmlinux 0xc1e6f95a	serio_unregister_port
+EXPORT_SYMBOL vmlinux 0xc1ee17ca	test_and_change_bit
+EXPORT_SYMBOL vmlinux 0xc2113ff7	seq_write
+EXPORT_SYMBOL vmlinux 0xc24ea969	dm_unregister_target
+EXPORT_SYMBOL vmlinux 0xc256e762	__bitmap_equal
+EXPORT_SYMBOL vmlinux 0xc26c8fef	sg_miter_start
+EXPORT_SYMBOL vmlinux 0xc273e55f	ps2_cmd_aborted
+EXPORT_SYMBOL vmlinux 0xc2d5336e	tty_name
+EXPORT_SYMBOL vmlinux 0xc2e587d1	reset_devices
+EXPORT_SYMBOL vmlinux 0xc2f48615	kernel_getsockname
+EXPORT_SYMBOL vmlinux 0xc33f6f4c	on_each_cpu
+EXPORT_SYMBOL vmlinux 0xc381a606	usb_gadget_unregister_driver
+EXPORT_SYMBOL vmlinux 0xc38c4ca2	PAGE_SHARED
+EXPORT_SYMBOL vmlinux 0xc39cbd7d	vga_get
+EXPORT_SYMBOL vmlinux 0xc3ab2436	request_firmware_nowait
+EXPORT_SYMBOL vmlinux 0xc3b196d1	block_sync_page
+EXPORT_SYMBOL vmlinux 0xc3b61c7c	ebus_dma_irq_enable
+EXPORT_SYMBOL vmlinux 0xc4182315	blk_queue_stack_limits
+EXPORT_SYMBOL vmlinux 0xc439686f	idr_find
+EXPORT_SYMBOL vmlinux 0xc4471a01	rtnl_notify
+EXPORT_SYMBOL vmlinux 0xc44841f4	sock_release
+EXPORT_SYMBOL vmlinux 0xc49063d1	proto_register
+EXPORT_SYMBOL vmlinux 0xc499ae1e	kstrdup
+EXPORT_SYMBOL vmlinux 0xc4c85500	nobh_writepage
+EXPORT_SYMBOL vmlinux 0xc4eb6683	unregister_filesystem
+EXPORT_SYMBOL vmlinux 0xc4f55737	dev_kfree_skb_irq
+EXPORT_SYMBOL vmlinux 0xc50212bb	skb_free_datagram_locked
+EXPORT_SYMBOL vmlinux 0xc52f5714	fb_videomode_to_var
+EXPORT_SYMBOL vmlinux 0xc57114ec	ethtool_op_get_ufo
+EXPORT_SYMBOL vmlinux 0xc5900df7	drm_addmap
+EXPORT_SYMBOL vmlinux 0xc59ab216	alloc_fcdev
+EXPORT_SYMBOL vmlinux 0xc59ecc3f	__kfree_skb
+EXPORT_SYMBOL vmlinux 0xc5ec0bae	xfrm_state_unregister_afinfo
+EXPORT_SYMBOL vmlinux 0xc6006057	insert_inode_locked4
+EXPORT_SYMBOL vmlinux 0xc622c02e	init_net
+EXPORT_SYMBOL vmlinux 0xc6327b65	sun4v_chip_type
+EXPORT_SYMBOL vmlinux 0xc667f652	request_firmware
+EXPORT_SYMBOL vmlinux 0xc66d907f	generic_ro_fops
+EXPORT_SYMBOL vmlinux 0xc67f2d2a	tcp_prot
+EXPORT_SYMBOL vmlinux 0xc688f786	drm_mode_connector_attach_encoder
+EXPORT_SYMBOL vmlinux 0xc6a0c535	drm_mode_config_init
+EXPORT_SYMBOL vmlinux 0xc6c256d9	netlink_unicast
+EXPORT_SYMBOL vmlinux 0xc6ca1773	__dev_remove_pack
+EXPORT_SYMBOL vmlinux 0xc6d5d95b	compat_mc_setsockopt
+EXPORT_SYMBOL vmlinux 0xc6d96179	sbusfb_fill_var
+EXPORT_SYMBOL vmlinux 0xc6f80559	security_inode_notifysecctx
+EXPORT_SYMBOL vmlinux 0xc6fd5804	del_gendisk
+EXPORT_SYMBOL vmlinux 0xc71152c3	dquot_drop
+EXPORT_SYMBOL vmlinux 0xc722227e	posix_acl_clone
+EXPORT_SYMBOL vmlinux 0xc725689b	set_binfmt
+EXPORT_SYMBOL vmlinux 0xc72a7057	put_io_context
+EXPORT_SYMBOL vmlinux 0xc72fee47	__dev_get_by_index
+EXPORT_SYMBOL vmlinux 0xc740c64a	memchr
+EXPORT_SYMBOL vmlinux 0xc7536bac	of_find_node_with_property
+EXPORT_SYMBOL vmlinux 0xc766bfe1	skb_dma_map
+EXPORT_SYMBOL vmlinux 0xc77da58b	in_dev_finish_destroy
+EXPORT_SYMBOL vmlinux 0xc787b47c	scm_fp_dup
+EXPORT_SYMBOL vmlinux 0xc78ab492	nla_put
+EXPORT_SYMBOL vmlinux 0xc78b2db0	freeze_bdev
+EXPORT_SYMBOL vmlinux 0xc79bcd36	dm_vcalloc
+EXPORT_SYMBOL vmlinux 0xc7a17d5f	tcp_sockets_allocated
+EXPORT_SYMBOL vmlinux 0xc7a24d76	sysfs_format_mac
+EXPORT_SYMBOL vmlinux 0xc7a4fbed	rtnl_lock
+EXPORT_SYMBOL vmlinux 0xc7b595f2	atomic64_add
+EXPORT_SYMBOL vmlinux 0xc7bcabcb	mod_zone_page_state
+EXPORT_SYMBOL vmlinux 0xc7c32e04	register_netdev
+EXPORT_SYMBOL vmlinux 0xc7ec28b0	memcmp
+EXPORT_SYMBOL vmlinux 0xc80ae09c	udp_sendmsg
+EXPORT_SYMBOL vmlinux 0xc82e7045	dma_set_mask
+EXPORT_SYMBOL vmlinux 0xc841e4a0	read_cache_page_async
+EXPORT_SYMBOL vmlinux 0xc84e818c	of_parse_phandles_with_args
+EXPORT_SYMBOL vmlinux 0xc87bd6e2	pci_bus_find_capability
+EXPORT_SYMBOL vmlinux 0xc8911c8a	mark_page_accessed
+EXPORT_SYMBOL vmlinux 0xc8a2a2e6	dma_pool_destroy
+EXPORT_SYMBOL vmlinux 0xc8b57c27	autoremove_wake_function
+EXPORT_SYMBOL vmlinux 0xc8bb0ca2	d_invalidate
+EXPORT_SYMBOL vmlinux 0xc8f99d09	drm_lock_take
+EXPORT_SYMBOL vmlinux 0xc91dcc9e	ip_route_input
+EXPORT_SYMBOL vmlinux 0xc91fb9aa	_read_unlock_irqrestore
+EXPORT_SYMBOL vmlinux 0xc93d8dce	proc_symlink
+EXPORT_SYMBOL vmlinux 0xc9665cea	nf_register_hook
+EXPORT_SYMBOL vmlinux 0xc96cb5af	__dev_getfirstbyhwtype
+EXPORT_SYMBOL vmlinux 0xc97ff64c	vlan_dev_vlan_id
+EXPORT_SYMBOL vmlinux 0xc99625d4	sk_send_sigurg
+EXPORT_SYMBOL vmlinux 0xc998d641	icmp_err_convert
+EXPORT_SYMBOL vmlinux 0xc9d284d2	mpage_writepages
+EXPORT_SYMBOL vmlinux 0xc9fc2903	dev_queue_xmit
+EXPORT_SYMBOL vmlinux 0xca06f233	jbd2_journal_set_triggers
+EXPORT_SYMBOL vmlinux 0xca2a7feb	ip_dev_find
+EXPORT_SYMBOL vmlinux 0xca36bf7b	drm_property_create
+EXPORT_SYMBOL vmlinux 0xca49fe9e	complete_request_key
+EXPORT_SYMBOL vmlinux 0xca57bc67	blk_fetch_request
+EXPORT_SYMBOL vmlinux 0xca641cc4	__blk_end_request
+EXPORT_SYMBOL vmlinux 0xca6cfb60	fail_migrate_page
+EXPORT_SYMBOL vmlinux 0xca802d3c	drm_debugfs_remove_files
+EXPORT_SYMBOL vmlinux 0xcabd7ea5	drm_mode_connector_list_update
+EXPORT_SYMBOL vmlinux 0xcac07678	sbusfb_mmap_helper
+EXPORT_SYMBOL vmlinux 0xcac4d7ff	_read_lock_bh
+EXPORT_SYMBOL vmlinux 0xcac4dca2	skb_copy_and_csum_bits
+EXPORT_SYMBOL vmlinux 0xcae6377b	_spin_lock_bh
+EXPORT_SYMBOL vmlinux 0xcb0b60fb	tty_port_tty_get
+EXPORT_SYMBOL vmlinux 0xcb158627	journal_get_write_access
+EXPORT_SYMBOL vmlinux 0xcb6beb40	hweight32
+EXPORT_SYMBOL vmlinux 0xcb7131fb	fb_get_options
+EXPORT_SYMBOL vmlinux 0xcb8ee5a5	del_timer
+EXPORT_SYMBOL vmlinux 0xcb9cb8b8	eth_header_cache_update
+EXPORT_SYMBOL vmlinux 0xcbb9d7db	groups_free
+EXPORT_SYMBOL vmlinux 0xcbdfde1b	atomic_dec_and_mutex_lock
+EXPORT_SYMBOL vmlinux 0xcbe1e9e7	flush_signals
+EXPORT_SYMBOL vmlinux 0xcbfe6008	cap_netlink_recv
+EXPORT_SYMBOL vmlinux 0xcc001669	per_cpu__cpu_sibling_map
+EXPORT_SYMBOL vmlinux 0xcc07af75	strnlen
+EXPORT_SYMBOL vmlinux 0xcc36f32e	fb_unregister_client
+EXPORT_SYMBOL vmlinux 0xcc5005fe	msleep_interruptible
+EXPORT_SYMBOL vmlinux 0xcc68d8f7	fb_find_mode
+EXPORT_SYMBOL vmlinux 0xcc792f14	xfrm_unregister_mode
+EXPORT_SYMBOL vmlinux 0xcc7fa952	local_bh_enable_ip
+EXPORT_SYMBOL vmlinux 0xcc973fd4	pci_set_dma_seg_boundary
+EXPORT_SYMBOL vmlinux 0xcca572ab	tty_std_termios
+EXPORT_SYMBOL vmlinux 0xccd07921	neigh_seq_start
+EXPORT_SYMBOL vmlinux 0xccd39eaa	vlan_gro_frags
+EXPORT_SYMBOL vmlinux 0xccd78767	setup_new_exec
+EXPORT_SYMBOL vmlinux 0xccd97938	__scm_destroy
+EXPORT_SYMBOL vmlinux 0xcd2e2eba	bdget
+EXPORT_SYMBOL vmlinux 0xcd6fca9b	tcp_v4_send_check
+EXPORT_SYMBOL vmlinux 0xcd920c78	simple_release_fs
+EXPORT_SYMBOL vmlinux 0xcdb3a6bc	remove_inode_hash
+EXPORT_SYMBOL vmlinux 0xcdb65485	vfs_get_dqblk
+EXPORT_SYMBOL vmlinux 0xcdda548c	sk_run_filter
+EXPORT_SYMBOL vmlinux 0xcde0815a	ip_fragment
+EXPORT_SYMBOL vmlinux 0xcdf0235a	bdevname
+EXPORT_SYMBOL vmlinux 0xcdf2eff4	drm_mode_height
+EXPORT_SYMBOL vmlinux 0xcdf8a514	mod_timer
+EXPORT_SYMBOL vmlinux 0xce080a9b	kernel_setsockopt
+EXPORT_SYMBOL vmlinux 0xce22d15d	kernel_listen
+EXPORT_SYMBOL vmlinux 0xce36ded6	sysctl_tcp_mem
+EXPORT_SYMBOL vmlinux 0xce3af35d	drm_mode_create_dirty_info_property
+EXPORT_SYMBOL vmlinux 0xce423826	key_type_keyring
+EXPORT_SYMBOL vmlinux 0xce5ac24f	zlib_inflate_workspacesize
+EXPORT_SYMBOL vmlinux 0xce7a56f0	sock_no_recvmsg
+EXPORT_SYMBOL vmlinux 0xce7d8bf2	give_up_console
+EXPORT_SYMBOL vmlinux 0xceadde03	__elv_add_request
+EXPORT_SYMBOL vmlinux 0xceb27354	dev_unicast_sync
+EXPORT_SYMBOL vmlinux 0xceea6aa5	__skb_checksum_complete
+EXPORT_SYMBOL vmlinux 0xcf0f6081	generic_cont_expand_simple
+EXPORT_SYMBOL vmlinux 0xcf4a5f94	pci_device_to_OF_node
+EXPORT_SYMBOL vmlinux 0xcf5b3278	task_tgid_nr_ns
+EXPORT_SYMBOL vmlinux 0xcf7a8c69	gnet_stats_start_copy_compat
+EXPORT_SYMBOL vmlinux 0xcf9055ff	simple_getattr
+EXPORT_SYMBOL vmlinux 0xcfbf20e6	drm_master_get
+EXPORT_SYMBOL vmlinux 0xcfd8cc36	tcp_splice_read
+EXPORT_SYMBOL vmlinux 0xcfe13710	sparc64_get_clock_tick
+EXPORT_SYMBOL vmlinux 0xcff53400	kref_put
+EXPORT_SYMBOL vmlinux 0xd0145ce9	__destroy_inode
+EXPORT_SYMBOL vmlinux 0xd0181f4f	__bitmap_xor
+EXPORT_SYMBOL vmlinux 0xd033a3b8	unload_nls
+EXPORT_SYMBOL vmlinux 0xd0421014	simple_write_begin
+EXPORT_SYMBOL vmlinux 0xd05bd637	xfrm_state_walk
+EXPORT_SYMBOL vmlinux 0xd0797295	pci_request_region
+EXPORT_SYMBOL vmlinux 0xd08fa3f0	drm_mode_set_crtcinfo
+EXPORT_SYMBOL vmlinux 0xd0907038	udp_proc_unregister
+EXPORT_SYMBOL vmlinux 0xd0be1a2e	__memset
+EXPORT_SYMBOL vmlinux 0xd0ec3eee	panic_notifier_list
+EXPORT_SYMBOL vmlinux 0xd0ee38b8	schedule_timeout_uninterruptible
+EXPORT_SYMBOL vmlinux 0xd0f8c9e0	ldc_alloc
+EXPORT_SYMBOL vmlinux 0xd102e421	d_prune_aliases
+EXPORT_SYMBOL vmlinux 0xd1166c18	__netif_schedule
+EXPORT_SYMBOL vmlinux 0xd16abd27	vfs_statfs
+EXPORT_SYMBOL vmlinux 0xd171ddc0	try_wait_for_completion
+EXPORT_SYMBOL vmlinux 0xd17c0230	inet_accept
+EXPORT_SYMBOL vmlinux 0xd17c43e2	iw_handler_set_spy
+EXPORT_SYMBOL vmlinux 0xd18b9ca6	journal_dirty_metadata
+EXPORT_SYMBOL vmlinux 0xd1a7d79d	eth_mac_addr
+EXPORT_SYMBOL vmlinux 0xd1a88f17	inode_sub_rsv_space
+EXPORT_SYMBOL vmlinux 0xd1c9efd7	ps2_begin_command
+EXPORT_SYMBOL vmlinux 0xd217de62	eth_header
+EXPORT_SYMBOL vmlinux 0xd21af7e5	completion_done
+EXPORT_SYMBOL vmlinux 0xd251d401	tty_insert_flip_string_flags
+EXPORT_SYMBOL vmlinux 0xd251d7b0	security_socket_getpeersec_dgram
+EXPORT_SYMBOL vmlinux 0xd2555f19	jiffies_64_to_clock_t
+EXPORT_SYMBOL vmlinux 0xd255d836	fput
+EXPORT_SYMBOL vmlinux 0xd25d4f74	console_blank_hook
+EXPORT_SYMBOL vmlinux 0xd2633b12	nf_unregister_hooks
+EXPORT_SYMBOL vmlinux 0xd265ed79	blk_queue_dma_alignment
+EXPORT_SYMBOL vmlinux 0xd2775eff	pcim_enable_device
+EXPORT_SYMBOL vmlinux 0xd28cb0ad	drm_cvt_mode
+EXPORT_SYMBOL vmlinux 0xd2965f6f	kthread_should_stop
+EXPORT_SYMBOL vmlinux 0xd2a3da2d	mempool_alloc
+EXPORT_SYMBOL vmlinux 0xd2aa0292	_read_unlock_bh
+EXPORT_SYMBOL vmlinux 0xd2ad1a77	drm_gem_vm_open
+EXPORT_SYMBOL vmlinux 0xd2ae7ffa	compat_sock_get_timestamp
+EXPORT_SYMBOL vmlinux 0xd2b439f0	sk_common_release
+EXPORT_SYMBOL vmlinux 0xd2b5cc84	start_tty
+EXPORT_SYMBOL vmlinux 0xd2b66251	rtnl_create_link
+EXPORT_SYMBOL vmlinux 0xd2df05ec	dquot_release_reserved_space
+EXPORT_SYMBOL vmlinux 0xd2fccf50	skb_split
+EXPORT_SYMBOL vmlinux 0xd3028e75	drm_sman_set_manager
+EXPORT_SYMBOL vmlinux 0xd30c85de	sock_alloc_send_skb
+EXPORT_SYMBOL vmlinux 0xd3155e8d	drm_vblank_count
+EXPORT_SYMBOL vmlinux 0xd3165a87	pci_match_id
+EXPORT_SYMBOL vmlinux 0xd3170c47	kick_iocb
+EXPORT_SYMBOL vmlinux 0xd33b2bea	blk_queue_free_tags
+EXPORT_SYMBOL vmlinux 0xd346cc4d	journal_set_features
+EXPORT_SYMBOL vmlinux 0xd39a1003	mutex_trylock
+EXPORT_SYMBOL vmlinux 0xd39eba46	skb_seq_read
+EXPORT_SYMBOL vmlinux 0xd3af979c	memdup_user
+EXPORT_SYMBOL vmlinux 0xd3be5b84	cfb_copyarea
+EXPORT_SYMBOL vmlinux 0xd3e00934	secpath_dup
+EXPORT_SYMBOL vmlinux 0xd3f97d7b	drm_get_edid
+EXPORT_SYMBOL vmlinux 0xd3ffab51	drm_ht_remove
+EXPORT_SYMBOL vmlinux 0xd403297a	netif_napi_add
+EXPORT_SYMBOL vmlinux 0xd415ff1b	bdi_register_dev
+EXPORT_SYMBOL vmlinux 0xd471b6c9	pci_select_bars
+EXPORT_SYMBOL vmlinux 0xd49f1ef6	test_and_clear_bit
+EXPORT_SYMBOL vmlinux 0xd4a1615f	input_event
+EXPORT_SYMBOL vmlinux 0xd4a9db81	drm_get_dev
+EXPORT_SYMBOL vmlinux 0xd4d7e815	kmem_cache_alloc
+EXPORT_SYMBOL vmlinux 0xd4fa8102	inode_sub_bytes
+EXPORT_SYMBOL vmlinux 0xd5236a11	rtc_dev_update_irq_enable_emul
+EXPORT_SYMBOL vmlinux 0xd5261297	pci_try_set_mwi
+EXPORT_SYMBOL vmlinux 0xd5263820	mb_cache_destroy
+EXPORT_SYMBOL vmlinux 0xd56ba0a0	sun4v_hvapi_register
+EXPORT_SYMBOL vmlinux 0xd57f8789	iommu_num_pages
+EXPORT_SYMBOL vmlinux 0xd5c7c61d	sysctl_string
+EXPORT_SYMBOL vmlinux 0xd62c833f	schedule_timeout
+EXPORT_SYMBOL vmlinux 0xd63d6819	drm_core_get_map_ofs
+EXPORT_SYMBOL vmlinux 0xd657f1d7	phy_stop
+EXPORT_SYMBOL vmlinux 0xd659c2d0	blk_queue_resize_tags
+EXPORT_SYMBOL vmlinux 0xd664cc49	i2c_smbus_write_word_data
+EXPORT_SYMBOL vmlinux 0xd66b2d94	i2c_smbus_read_word_data
+EXPORT_SYMBOL vmlinux 0xd66e34b3	xfrm_unregister_km
+EXPORT_SYMBOL vmlinux 0xd6a78d08	smp_call_function_single
+EXPORT_SYMBOL vmlinux 0xd6baf757	serio_interrupt
+EXPORT_SYMBOL vmlinux 0xd6d68c6b	vm_stat
+EXPORT_SYMBOL vmlinux 0xd6de7d61	journal_stop
+EXPORT_SYMBOL vmlinux 0xd6e4e79a	of_find_node_by_type
+EXPORT_SYMBOL vmlinux 0xd6ee688f	vmalloc
+EXPORT_SYMBOL vmlinux 0xd6f0f559	idprom
+EXPORT_SYMBOL vmlinux 0xd70748b3	alloc_disk
+EXPORT_SYMBOL vmlinux 0xd7171be0	phy_register_fixup_for_id
+EXPORT_SYMBOL vmlinux 0xd7390daa	kernel_accept
+EXPORT_SYMBOL vmlinux 0xd7497319	jbd2_journal_flush
+EXPORT_SYMBOL vmlinux 0xd75d5972	path_put
+EXPORT_SYMBOL vmlinux 0xd76a608b	vfs_dq_quota_on_remount
+EXPORT_SYMBOL vmlinux 0xd77978d8	drm_fasync
+EXPORT_SYMBOL vmlinux 0xd77a5aa5	__bitmap_and
+EXPORT_SYMBOL vmlinux 0xd79b5a02	allow_signal
+EXPORT_SYMBOL vmlinux 0xd81ad466	security_inode_getsecctx
+EXPORT_SYMBOL vmlinux 0xd8229504	bdi_init
+EXPORT_SYMBOL vmlinux 0xd832c9e5	rwsem_downgrade_wake
+EXPORT_SYMBOL vmlinux 0xd83791bc	nf_conntrack_destroy
+EXPORT_SYMBOL vmlinux 0xd83ed31d	xfrm_cfg_mutex
+EXPORT_SYMBOL vmlinux 0xd8959f23	auxio_set_led
+EXPORT_SYMBOL vmlinux 0xd89da37f	movable_zone
+EXPORT_SYMBOL vmlinux 0xd8c19971	alloc_tty_driver
+EXPORT_SYMBOL vmlinux 0xd8e484f0	register_chrdev_region
+EXPORT_SYMBOL vmlinux 0xd911d409	journal_start_commit
+EXPORT_SYMBOL vmlinux 0xd92af799	pcie_set_readrq
+EXPORT_SYMBOL vmlinux 0xd93ce730	pci_clear_master
+EXPORT_SYMBOL vmlinux 0xd985dc99	mempool_free_pages
+EXPORT_SYMBOL vmlinux 0xd98810a6	tcp_v4_conn_request
+EXPORT_SYMBOL vmlinux 0xd9de717d	copy_io_context
+EXPORT_SYMBOL vmlinux 0xd9fa8844	pci_iomap
+EXPORT_SYMBOL vmlinux 0xda0f6669	kill_pid
+EXPORT_SYMBOL vmlinux 0xda1a7335	kasprintf
+EXPORT_SYMBOL vmlinux 0xda2f2ebc	netlink_broadcast
+EXPORT_SYMBOL vmlinux 0xda3d2c3c	prom_feval
+EXPORT_SYMBOL vmlinux 0xda4629e4	radix_tree_insert
+EXPORT_SYMBOL vmlinux 0xda500239	sleep_on_timeout
+EXPORT_SYMBOL vmlinux 0xda7c672d	pci_enable_device_io
+EXPORT_SYMBOL vmlinux 0xda7ca6cb	fb_mode_is_equal
+EXPORT_SYMBOL vmlinux 0xda88fb01	textsearch_register
+EXPORT_SYMBOL vmlinux 0xda8af7ad	fb_find_nearest_mode
+EXPORT_SYMBOL vmlinux 0xda9b3fd4	locks_copy_lock
+EXPORT_SYMBOL vmlinux 0xdab1614f	jbd2_journal_release_buffer
+EXPORT_SYMBOL vmlinux 0xdad4ff27	devm_ioport_unmap
+EXPORT_SYMBOL vmlinux 0xdaeb59b3	inet_bind
+EXPORT_SYMBOL vmlinux 0xdb1f2e8d	register_netdevice
+EXPORT_SYMBOL vmlinux 0xdb286369	dm_table_get
+EXPORT_SYMBOL vmlinux 0xdb294f08	drm_get_resource_start
+EXPORT_SYMBOL vmlinux 0xdb2ad28a	inet_sk_rebuild_header
+EXPORT_SYMBOL vmlinux 0xdb301e71	filemap_fdatawrite
+EXPORT_SYMBOL vmlinux 0xdb6c7252	names_cachep
+EXPORT_SYMBOL vmlinux 0xdb8bfab3	bio_clone
+EXPORT_SYMBOL vmlinux 0xdbc77337	dev_getfirstbyhwtype
+EXPORT_SYMBOL vmlinux 0xdbcbbea7	napi_skb_finish
+EXPORT_SYMBOL vmlinux 0xdbcd416e	sysctl_ip_nonlocal_bind
+EXPORT_SYMBOL vmlinux 0xdc053205	udp_memory_allocated
+EXPORT_SYMBOL vmlinux 0xdc12cea5	sock_kfree_s
+EXPORT_SYMBOL vmlinux 0xdc1341b1	mdesc_arc_target
+EXPORT_SYMBOL vmlinux 0xdc14eda7	pci_pci_problems
+EXPORT_SYMBOL vmlinux 0xdc2adb35	add_taint
+EXPORT_SYMBOL vmlinux 0xdc43a9c8	daemonize
+EXPORT_SYMBOL vmlinux 0xdc5a6a41	simple_dir_operations
+EXPORT_SYMBOL vmlinux 0xdca0e950	genl_register_family
+EXPORT_SYMBOL vmlinux 0xdcb0349b	sys_close
+EXPORT_SYMBOL vmlinux 0xdcb5671d	strlen
+EXPORT_SYMBOL vmlinux 0xdcbc236c	netdev_boot_setup_check
+EXPORT_SYMBOL vmlinux 0xdd0fd6b3	skb_under_panic
+EXPORT_SYMBOL vmlinux 0xdd1197c8	xor_vis_3
+EXPORT_SYMBOL vmlinux 0xdd2af476	page_symlink_inode_operations
+EXPORT_SYMBOL vmlinux 0xdd3febe2	drm_gem_object_free
+EXPORT_SYMBOL vmlinux 0xdd49095c	drm_ht_insert_item
+EXPORT_SYMBOL vmlinux 0xdd6b646b	of_dev_put
+EXPORT_SYMBOL vmlinux 0xdd8c3215	dev_addr_add
+EXPORT_SYMBOL vmlinux 0xdd9c92c8	drm_vblank_post_modeset
+EXPORT_SYMBOL vmlinux 0xddae1ca9	tty_throttle
+EXPORT_SYMBOL vmlinux 0xddb003d5	vfs_get_dqinfo
+EXPORT_SYMBOL vmlinux 0xddbec606	fb_class
+EXPORT_SYMBOL vmlinux 0xde04d73a	drm_i_have_hw_lock
+EXPORT_SYMBOL vmlinux 0xde2708d2	vfs_rename
+EXPORT_SYMBOL vmlinux 0xde2d2e18	search_binary_handler
+EXPORT_SYMBOL vmlinux 0xde31b902	blk_limits_io_opt
+EXPORT_SYMBOL vmlinux 0xde589e60	xor_vis_2
+EXPORT_SYMBOL vmlinux 0xde5f5b1d	truncate_inode_pages_range
+EXPORT_SYMBOL vmlinux 0xde732a2f	xfrm4_prepare_output
+EXPORT_SYMBOL vmlinux 0xde7502a8	PAGE_KERNEL
+EXPORT_SYMBOL vmlinux 0xde75b689	set_irq_type
+EXPORT_SYMBOL vmlinux 0xde9360ba	totalram_pages
+EXPORT_SYMBOL vmlinux 0xde962043	fasync_helper
+EXPORT_SYMBOL vmlinux 0xde983d1e	pci_dma_supported
+EXPORT_SYMBOL vmlinux 0xdeba25a6	drm_encoder_init
+EXPORT_SYMBOL vmlinux 0xdefa1ba7	kernel_getpeername
+EXPORT_SYMBOL vmlinux 0xdf1d963d	tcf_hash_new_index
+EXPORT_SYMBOL vmlinux 0xdf2bb9b1	lock_may_write
+EXPORT_SYMBOL vmlinux 0xdf3dbcaf	__lock_page
+EXPORT_SYMBOL vmlinux 0xdf60cc27	__print_symbol
+EXPORT_SYMBOL vmlinux 0xdf8047ed	blk_queue_max_hw_segments
+EXPORT_SYMBOL vmlinux 0xdf8fef53	prom_getproplen
+EXPORT_SYMBOL vmlinux 0xdf92075a	neigh_lookup_nodev
+EXPORT_SYMBOL vmlinux 0xdf929370	fs_overflowgid
+EXPORT_SYMBOL vmlinux 0xdf98f3f3	journal_unlock_updates
+EXPORT_SYMBOL vmlinux 0xdfa75b18	clocksource_change_rating
+EXPORT_SYMBOL vmlinux 0xdfb7c842	node_states
+EXPORT_SYMBOL vmlinux 0xdfc0363b	dcache_dir_lseek
+EXPORT_SYMBOL vmlinux 0xdfc0b677	i2c_put_adapter
+EXPORT_SYMBOL vmlinux 0xdfeff14d	dq_data_lock
+EXPORT_SYMBOL vmlinux 0xdff83b72	fddi_change_mtu
+EXPORT_SYMBOL vmlinux 0xe02c4906	blk_queue_segment_boundary
+EXPORT_SYMBOL vmlinux 0xe02ed98a	pci_disable_device
+EXPORT_SYMBOL vmlinux 0xe038fa1e	default_file_splice_read
+EXPORT_SYMBOL vmlinux 0xe042c57d	_write_lock_irqsave
+EXPORT_SYMBOL vmlinux 0xe04d26d1	ethtool_op_set_sg
+EXPORT_SYMBOL vmlinux 0xe06e4199	cpu_all_bits
+EXPORT_SYMBOL vmlinux 0xe075d6eb	iter_div_u64_rem
+EXPORT_SYMBOL vmlinux 0xe0809bdc	interruptible_sleep_on
+EXPORT_SYMBOL vmlinux 0xe0919124	dev_mc_add
+EXPORT_SYMBOL vmlinux 0xe0b13336	argv_free
+EXPORT_SYMBOL vmlinux 0xe0b73dc8	udp_table
+EXPORT_SYMBOL vmlinux 0xe0bc24a1	param_set_ushort
+EXPORT_SYMBOL vmlinux 0xe0be173b	textsearch_destroy
+EXPORT_SYMBOL vmlinux 0xe0dcb911	smp_call_function_many
+EXPORT_SYMBOL vmlinux 0xe1075b95	set_security_override_from_ctx
+EXPORT_SYMBOL vmlinux 0xe111bfeb	poll_initwait
+EXPORT_SYMBOL vmlinux 0xe113bbbc	csum_partial
+EXPORT_SYMBOL vmlinux 0xe11cfa4f	genphy_config_advert
+EXPORT_SYMBOL vmlinux 0xe12cf8ec	drm_mode_duplicate
+EXPORT_SYMBOL vmlinux 0xe1321cee	bio_integrity_endio
+EXPORT_SYMBOL vmlinux 0xe1457735	drm_ht_remove_item
+EXPORT_SYMBOL vmlinux 0xe1740127	napi_reuse_skb
+EXPORT_SYMBOL vmlinux 0xe1761617	security_inet_conn_request
+EXPORT_SYMBOL vmlinux 0xe197e76f	mb_cache_shrink
+EXPORT_SYMBOL vmlinux 0xe1bde553	netdev_rx_csum_fault
+EXPORT_SYMBOL vmlinux 0xe1d345ec	pci_map_sg
+EXPORT_SYMBOL vmlinux 0xe1f03f44	follow_down
+EXPORT_SYMBOL vmlinux 0xe207dd50	of_getintprop_default
+EXPORT_SYMBOL vmlinux 0xe216f4ec	drm_connector_property_get_value
+EXPORT_SYMBOL vmlinux 0xe227d368	mpage_readpage
+EXPORT_SYMBOL vmlinux 0xe2304303	mac_map_monitor_sense
+EXPORT_SYMBOL vmlinux 0xe23ae481	blk_iopoll_complete
+EXPORT_SYMBOL vmlinux 0xe24050c7	scnprintf
+EXPORT_SYMBOL vmlinux 0xe24a7b88	drm_ht_find_item
+EXPORT_SYMBOL vmlinux 0xe24d3a97	jiffies_64
+EXPORT_SYMBOL vmlinux 0xe2a76311	ldc_connect
+EXPORT_SYMBOL vmlinux 0xe2a8271f	ip_defrag
+EXPORT_SYMBOL vmlinux 0xe2c5a749	atomic64_sub_ret
+EXPORT_SYMBOL vmlinux 0xe2cb6f07	pci_setup_cardbus
+EXPORT_SYMBOL vmlinux 0xe2d5255a	strcmp
+EXPORT_SYMBOL vmlinux 0xe2dc3055	pci_bus_assign_resources
+EXPORT_SYMBOL vmlinux 0xe32309f9	elv_rq_merge_ok
+EXPORT_SYMBOL vmlinux 0xe33e82e1	skb_store_bits
+EXPORT_SYMBOL vmlinux 0xe35d7db9	drop_super
+EXPORT_SYMBOL vmlinux 0xe3b0192b	vscnprintf
+EXPORT_SYMBOL vmlinux 0xe3debc7b	sb_set_blocksize
+EXPORT_SYMBOL vmlinux 0xe3e12008	__first_cpu
+EXPORT_SYMBOL vmlinux 0xe416edb4	blk_queue_softirq_done
+EXPORT_SYMBOL vmlinux 0xe4201349	xfrm_prepare_input
+EXPORT_SYMBOL vmlinux 0xe4217c03	vio_conn_reset
+EXPORT_SYMBOL vmlinux 0xe42269fa	tty_write_room
+EXPORT_SYMBOL vmlinux 0xe4235c49	netif_carrier_off
+EXPORT_SYMBOL vmlinux 0xe42648bc	drm_mode_attachmode_crtc
+EXPORT_SYMBOL vmlinux 0xe448a1c1	tcp_alloc_md5sig_pool
+EXPORT_SYMBOL vmlinux 0xe44b3d42	vfs_readdir
+EXPORT_SYMBOL vmlinux 0xe46a148b	drm_mode_connector_detach_encoder
+EXPORT_SYMBOL vmlinux 0xe4812f8f	blk_end_request_all
+EXPORT_SYMBOL vmlinux 0xe4891d32	mutex_lock_killable
+EXPORT_SYMBOL vmlinux 0xe4d5e34a	mutex_unlock
+EXPORT_SYMBOL vmlinux 0xe4db3c75	jbd2_journal_extend
+EXPORT_SYMBOL vmlinux 0xe4e50851	drm_mode_validate_clocks
+EXPORT_SYMBOL vmlinux 0xe4ee3f01	tcp_v4_destroy_sock
+EXPORT_SYMBOL vmlinux 0xe4f1695e	cookie_check_timestamp
+EXPORT_SYMBOL vmlinux 0xe4f7a3fc	flock_lock_file_wait
+EXPORT_SYMBOL vmlinux 0xe500c548	gnet_stats_copy_rate_est
+EXPORT_SYMBOL vmlinux 0xe523ad75	synchronize_irq
+EXPORT_SYMBOL vmlinux 0xe52a1a86	kobject_del
+EXPORT_SYMBOL vmlinux 0xe55395b7	arp_tbl
+EXPORT_SYMBOL vmlinux 0xe57878a1	in6_pton
+EXPORT_SYMBOL vmlinux 0xe579f9cf	send_sig_info
+EXPORT_SYMBOL vmlinux 0xe57d3744	dquot_claim_space
+EXPORT_SYMBOL vmlinux 0xe5867808	dlci_ioctl_set
+EXPORT_SYMBOL vmlinux 0xe5910919	jbd2_journal_force_commit
+EXPORT_SYMBOL vmlinux 0xe5bdce7e	drm_mode_debug_printmodeline
+EXPORT_SYMBOL vmlinux 0xe5c78a99	do_blank_screen
+EXPORT_SYMBOL vmlinux 0xe5e08285	down_write_trylock
+EXPORT_SYMBOL vmlinux 0xe5ed5467	xfrm_policy_walk_init
+EXPORT_SYMBOL vmlinux 0xe6053789	uart_get_divisor
+EXPORT_SYMBOL vmlinux 0xe656b16b	sk_stop_timer
+EXPORT_SYMBOL vmlinux 0xe65f1530	jbd2_journal_load
+EXPORT_SYMBOL vmlinux 0xe697d108	__blk_iopoll_complete
+EXPORT_SYMBOL vmlinux 0xe6a58cb7	skb_copy_and_csum_datagram_iovec
+EXPORT_SYMBOL vmlinux 0xe6ac3fa7	bio_pair_release
+EXPORT_SYMBOL vmlinux 0xe6b9b745	security_sb_set_mnt_opts
+EXPORT_SYMBOL vmlinux 0xe6ecbf7a	sk_release_kernel
+EXPORT_SYMBOL vmlinux 0xe6fbe430	can_do_mlock
+EXPORT_SYMBOL vmlinux 0xe70a814d	otg_put_transceiver
+EXPORT_SYMBOL vmlinux 0xe714375c	__tasklet_hi_schedule_first
+EXPORT_SYMBOL vmlinux 0xe714b41a	write_cache_pages
+EXPORT_SYMBOL vmlinux 0xe7169c7a	ldc_state
+EXPORT_SYMBOL vmlinux 0xe7779e26	tcp_connect
+EXPORT_SYMBOL vmlinux 0xe782899e	prom_searchsiblings
+EXPORT_SYMBOL vmlinux 0xe79695e0	find_or_create_page
+EXPORT_SYMBOL vmlinux 0xe7a0c7d2	gen_new_estimator
+EXPORT_SYMBOL vmlinux 0xe7a99fb5	tcp_shutdown
+EXPORT_SYMBOL vmlinux 0xe7baf51c	kthread_bind
+EXPORT_SYMBOL vmlinux 0xe7c734cb	serio_unregister_child_port
+EXPORT_SYMBOL vmlinux 0xe7cdfbcc	sk_reset_timer
+EXPORT_SYMBOL vmlinux 0xe7d2aca1	security_sk_classify_flow
+EXPORT_SYMBOL vmlinux 0xe7d32407	nmi_active
+EXPORT_SYMBOL vmlinux 0xe7d4daac	seq_list_next
+EXPORT_SYMBOL vmlinux 0xe7eed9b4	fget
+EXPORT_SYMBOL vmlinux 0xe80a9e1f	qdisc_watchdog_init
+EXPORT_SYMBOL vmlinux 0xe8116e08	__kmalloc_node
+EXPORT_SYMBOL vmlinux 0xe8269c1c	drm_encoder_cleanup
+EXPORT_SYMBOL vmlinux 0xe874b640	init_buffer
+EXPORT_SYMBOL vmlinux 0xe876706b	poll_freewait
+EXPORT_SYMBOL vmlinux 0xe88bdc28	__down_write_trylock
+EXPORT_SYMBOL vmlinux 0xe89e97d4	pci_set_master
+EXPORT_SYMBOL vmlinux 0xe8ae5ed8	sock_init_data
+EXPORT_SYMBOL vmlinux 0xe8cd902e	hweight16
+EXPORT_SYMBOL vmlinux 0xe8dbafef	__next_cpu
+EXPORT_SYMBOL vmlinux 0xe8dfcdf9	__csum_partial_copy_to_user
+EXPORT_SYMBOL vmlinux 0xe8ecf3c8	tcp_ioctl
+EXPORT_SYMBOL vmlinux 0xe9056126	posix_unblock_lock
+EXPORT_SYMBOL vmlinux 0xe90dcae0	__request_module
+EXPORT_SYMBOL vmlinux 0xe914e41e	strcpy
+EXPORT_SYMBOL vmlinux 0xe919dd5c	drm_sman_owner_clean
+EXPORT_SYMBOL vmlinux 0xe92dea0e	jbd2_journal_invalidatepage
+EXPORT_SYMBOL vmlinux 0xe9423742	__splice_from_pipe
+EXPORT_SYMBOL vmlinux 0xe966e380	drm_mm_scan_remove_block
+EXPORT_SYMBOL vmlinux 0xe96f0f00	__page_symlink
+EXPORT_SYMBOL vmlinux 0xe9b3143f	invalidate_partition
+EXPORT_SYMBOL vmlinux 0xe9cf771c	i2c_use_client
+EXPORT_SYMBOL vmlinux 0xe9d4d894	tcp_v4_md5_do_del
+EXPORT_SYMBOL vmlinux 0xe9fb83ae	sock_common_recvmsg
+EXPORT_SYMBOL vmlinux 0xea03a806	blk_init_tags
+EXPORT_SYMBOL vmlinux 0xea054b22	nla_policy_len
+EXPORT_SYMBOL vmlinux 0xea10655a	__bitmap_intersects
+EXPORT_SYMBOL vmlinux 0xea147363	printk
+EXPORT_SYMBOL vmlinux 0xea20ca6d	drm_mode_create_scaling_mode_property
+EXPORT_SYMBOL vmlinux 0xea91d0ce	devm_iounmap
+EXPORT_SYMBOL vmlinux 0xead58fb9	print_hex_dump
+EXPORT_SYMBOL vmlinux 0xeadc4ee8	input_filter_device
+EXPORT_SYMBOL vmlinux 0xeae2b36c	of_parse_phandle
+EXPORT_SYMBOL vmlinux 0xeaf38ed5	arp_send
+EXPORT_SYMBOL vmlinux 0xeafe94db	bd_claim
+EXPORT_SYMBOL vmlinux 0xeb3d1c7c	compat_nf_setsockopt
+EXPORT_SYMBOL vmlinux 0xeb3ef8bc	__percpu_counter_add
+EXPORT_SYMBOL vmlinux 0xeb4a403f	skb_realloc_headroom
+EXPORT_SYMBOL vmlinux 0xeb5bd36d	thaw_bdev
+EXPORT_SYMBOL vmlinux 0xeb6c43dc	console_start
+EXPORT_SYMBOL vmlinux 0xeb792598	cdev_add
+EXPORT_SYMBOL vmlinux 0xeb8f54b3	strstrip
+EXPORT_SYMBOL vmlinux 0xeb9a86a8	drm_vblank_get
+EXPORT_SYMBOL vmlinux 0xebbf1139	xfrm_alloc_spi
+EXPORT_SYMBOL vmlinux 0xebbf1dba	strncasecmp
+EXPORT_SYMBOL vmlinux 0xebc4bdfb	pci_dev_get
+EXPORT_SYMBOL vmlinux 0xebc66aa9	bio_integrity_add_page
+EXPORT_SYMBOL vmlinux 0xebd273a6	strict_strtoull
+EXPORT_SYMBOL vmlinux 0xebfd721f	make_bad_inode
+EXPORT_SYMBOL vmlinux 0xec47740a	tty_port_close
+EXPORT_SYMBOL vmlinux 0xec59fc54	skb_copy
+EXPORT_SYMBOL vmlinux 0xec794ba0	__send_remote_softirq
+EXPORT_SYMBOL vmlinux 0xec7b2063	ldc_copy
+EXPORT_SYMBOL vmlinux 0xecd82c39	__blk_end_request_cur
+EXPORT_SYMBOL vmlinux 0xed4fe097	mnt_pin
+EXPORT_SYMBOL vmlinux 0xed615b03	down_interruptible
+EXPORT_SYMBOL vmlinux 0xed7f8eba	__f_setown
+EXPORT_SYMBOL vmlinux 0xeda0d76e	gen_estimator_active
+EXPORT_SYMBOL vmlinux 0xedb24292	drm_gtf_mode
+EXPORT_SYMBOL vmlinux 0xedb3e067	drm_get_connector_name
+EXPORT_SYMBOL vmlinux 0xedbaee5e	nla_strcmp
+EXPORT_SYMBOL vmlinux 0xedcf0a8c	__inet6_lookup_established
+EXPORT_SYMBOL vmlinux 0xee052076	ip_mc_rejoin_group
+EXPORT_SYMBOL vmlinux 0xee2d0fc7	_local_bh_enable
+EXPORT_SYMBOL vmlinux 0xee58f336	jbd2_journal_init_jbd_inode
+EXPORT_SYMBOL vmlinux 0xee6c19ec	submit_bio
+EXPORT_SYMBOL vmlinux 0xee74a58e	uart_match_port
+EXPORT_SYMBOL vmlinux 0xeea9dbaf	bitmap_bitremap
+EXPORT_SYMBOL vmlinux 0xeed82a7e	dquot_commit_info
+EXPORT_SYMBOL vmlinux 0xeedab57f	__napi_schedule
+EXPORT_SYMBOL vmlinux 0xef335d40	mdesc_grab
+EXPORT_SYMBOL vmlinux 0xef55d53c	vio_driver_init
+EXPORT_SYMBOL vmlinux 0xef6abe50	tty_register_ldisc
+EXPORT_SYMBOL vmlinux 0xef6ed1ba	param_set_invbool
+EXPORT_SYMBOL vmlinux 0xefa25fb0	call_usermodehelper_freeinfo
+EXPORT_SYMBOL vmlinux 0xefa354b0	drm_framebuffer_cleanup
+EXPORT_SYMBOL vmlinux 0xefc009ab	phy_driver_register
+EXPORT_SYMBOL vmlinux 0xefcb137e	test_set_page_writeback
+EXPORT_SYMBOL vmlinux 0xefdd70ce	security_secid_to_secctx
+EXPORT_SYMBOL vmlinux 0xeffd447b	tty_schedule_flip
+EXPORT_SYMBOL vmlinux 0xf0009fee	put_pages_list
+EXPORT_SYMBOL vmlinux 0xf0087d4c	eth_validate_addr
+EXPORT_SYMBOL vmlinux 0xf0798ce1	of_ioremap
+EXPORT_SYMBOL vmlinux 0xf0a72c51	jbd2_journal_stop
+EXPORT_SYMBOL vmlinux 0xf0a9f1d2	ether_setup
+EXPORT_SYMBOL vmlinux 0xf0ef15b4	list_sort
+EXPORT_SYMBOL vmlinux 0xf0f1246c	kvasprintf
+EXPORT_SYMBOL vmlinux 0xf0f8db3e	tcp_hashinfo
+EXPORT_SYMBOL vmlinux 0xf127d8dd	usb_gadget_register_driver
+EXPORT_SYMBOL vmlinux 0xf13bab5b	kill_litter_super
+EXPORT_SYMBOL vmlinux 0xf140c685	get_super
+EXPORT_SYMBOL vmlinux 0xf1421d13	drm_mode_sort
+EXPORT_SYMBOL vmlinux 0xf1509c98	jbd2_journal_check_used_features
+EXPORT_SYMBOL vmlinux 0xf174c825	backlight_force_update
+EXPORT_SYMBOL vmlinux 0xf174ed48	acquire_console_sem
+EXPORT_SYMBOL vmlinux 0xf17bc662	security_path_link
+EXPORT_SYMBOL vmlinux 0xf18293e1	inode_newsize_ok
+EXPORT_SYMBOL vmlinux 0xf188f68f	set_anon_super
+EXPORT_SYMBOL vmlinux 0xf195c682	fb_invert_cmaps
+EXPORT_SYMBOL vmlinux 0xf1aec4d4	inet_dgram_ops
+EXPORT_SYMBOL vmlinux 0xf1b36342	ip_route_me_harder
+EXPORT_SYMBOL vmlinux 0xf1c3b00e	copy_in_user_fixup
+EXPORT_SYMBOL vmlinux 0xf1db1704	nla_memcpy
+EXPORT_SYMBOL vmlinux 0xf1e98c74	avenrun
+EXPORT_SYMBOL vmlinux 0xf20dabd8	free_irq
+EXPORT_SYMBOL vmlinux 0xf238a3c9	abort_creds
+EXPORT_SYMBOL vmlinux 0xf265c1cd	sock_i_ino
+EXPORT_SYMBOL vmlinux 0xf29f32ec	sg_copy_from_buffer
+EXPORT_SYMBOL vmlinux 0xf2ba8ad1	uart_register_driver
+EXPORT_SYMBOL vmlinux 0xf2c099d0	pskb_expand_head
+EXPORT_SYMBOL vmlinux 0xf2d34d50	compat_sock_common_getsockopt
+EXPORT_SYMBOL vmlinux 0xf2de707c	drm_compat_ioctl
+EXPORT_SYMBOL vmlinux 0xf2f45b2b	bio_integrity_alloc
+EXPORT_SYMBOL vmlinux 0xf313da4e	sha_transform
+EXPORT_SYMBOL vmlinux 0xf31a1e22	pagevec_lookup
+EXPORT_SYMBOL vmlinux 0xf3341268	__clear_user
+EXPORT_SYMBOL vmlinux 0xf338d4c3	netlink_unregister_notifier
+EXPORT_SYMBOL vmlinux 0xf346231f	seq_list_start_head
+EXPORT_SYMBOL vmlinux 0xf373be30	vfs_fsync
+EXPORT_SYMBOL vmlinux 0xf3796c09	current_fs_time
+EXPORT_SYMBOL vmlinux 0xf391314a	qdisc_reset
+EXPORT_SYMBOL vmlinux 0xf397b9aa	__tasklet_schedule
+EXPORT_SYMBOL vmlinux 0xf39ef360	clocksource_register
+EXPORT_SYMBOL vmlinux 0xf3ac20d4	drm_mode_object_find
+EXPORT_SYMBOL vmlinux 0xf3bf0bce	__bitmap_complement
+EXPORT_SYMBOL vmlinux 0xf3c3a801	thaw_process
+EXPORT_SYMBOL vmlinux 0xf3d236cf	drm_get_encoder_name
+EXPORT_SYMBOL vmlinux 0xf3d9e3c1	tty_chars_in_buffer
+EXPORT_SYMBOL vmlinux 0xf3ef2793	i2c_smbus_process_call
+EXPORT_SYMBOL vmlinux 0xf3f8c8cb	drm_irq_install
+EXPORT_SYMBOL vmlinux 0xf41a34fd	i2c_get_adapter
+EXPORT_SYMBOL vmlinux 0xf42a2b26	drm_ht_create
+EXPORT_SYMBOL vmlinux 0xf4940512	skb_tx_hash
+EXPORT_SYMBOL vmlinux 0xf4abbc96	icmp_send
+EXPORT_SYMBOL vmlinux 0xf4bdc5e9	read_cache_pages
+EXPORT_SYMBOL vmlinux 0xf4cac472	vfs_quota_sync
+EXPORT_SYMBOL vmlinux 0xf4e14efc	iov_iter_copy_from_user
+EXPORT_SYMBOL vmlinux 0xf4f14de6	rtnl_trylock
+EXPORT_SYMBOL vmlinux 0xf4f52f93	dqstats
+EXPORT_SYMBOL vmlinux 0xf4f7c763	input_register_device
+EXPORT_SYMBOL vmlinux 0xf4f9dc33	pci_choose_state
+EXPORT_SYMBOL vmlinux 0xf50f72e1	alloc_file
+EXPORT_SYMBOL vmlinux 0xf51ae235	touch_nmi_watchdog
+EXPORT_SYMBOL vmlinux 0xf532f7ca	of_set_property_mutex
+EXPORT_SYMBOL vmlinux 0xf534a5c0	jbd2_journal_clear_err
+EXPORT_SYMBOL vmlinux 0xf53aa448	jbd2_journal_blocks_per_page
+EXPORT_SYMBOL vmlinux 0xf53d4c26	qdisc_class_hash_destroy
+EXPORT_SYMBOL vmlinux 0xf5652051	register_sysrq_key
+EXPORT_SYMBOL vmlinux 0xf5787dd7	file_permission
+EXPORT_SYMBOL vmlinux 0xf5796870	dev_getbyhwaddr
+EXPORT_SYMBOL vmlinux 0xf5915dda	sock_no_getsockopt
+EXPORT_SYMBOL vmlinux 0xf59649f8	skb_insert
+EXPORT_SYMBOL vmlinux 0xf5bfe6f2	skb_copy_and_csum_dev
+EXPORT_SYMBOL vmlinux 0xf5c01729	prepare_binprm
+EXPORT_SYMBOL vmlinux 0xf5c9012e	timespec_trunc
+EXPORT_SYMBOL vmlinux 0xf5eb86ea	blk_verify_command
+EXPORT_SYMBOL vmlinux 0xf5ed93f5	register_console
+EXPORT_SYMBOL vmlinux 0xf5ffab8e	pci_find_device
+EXPORT_SYMBOL vmlinux 0xf60efa23	__sg_alloc_table
+EXPORT_SYMBOL vmlinux 0xf61bf03e	ethtool_op_get_tso
+EXPORT_SYMBOL vmlinux 0xf6310b3a	lro_receive_skb
+EXPORT_SYMBOL vmlinux 0xf632f5e6	of_iounmap
+EXPORT_SYMBOL vmlinux 0xf63a60d7	skb_gro_reset_offset
+EXPORT_SYMBOL vmlinux 0xf64fa211	vga_put
+EXPORT_SYMBOL vmlinux 0xf650c38d	free_task
+EXPORT_SYMBOL vmlinux 0xf665ae89	deactivate_super
+EXPORT_SYMBOL vmlinux 0xf6722448	dquot_alloc
+EXPORT_SYMBOL vmlinux 0xf681193d	ps2_drain
+EXPORT_SYMBOL vmlinux 0xf697d794	__task_pid_nr_ns
+EXPORT_SYMBOL vmlinux 0xf69b131d	mdiobus_scan
+EXPORT_SYMBOL vmlinux 0xf6aeeb15	suncore_mouse_baud_cflag_next
+EXPORT_SYMBOL vmlinux 0xf6bb4729	color_table
+EXPORT_SYMBOL vmlinux 0xf6cb65ac	simple_transaction_release
+EXPORT_SYMBOL vmlinux 0xf6cfe594	blk_queue_invalidate_tags
+EXPORT_SYMBOL vmlinux 0xf6ebc03b	net_ratelimit
+EXPORT_SYMBOL vmlinux 0xf7451cd2	phy_print_status
+EXPORT_SYMBOL vmlinux 0xf7506c41	__any_online_cpu
+EXPORT_SYMBOL vmlinux 0xf7584a9c	find_font
+EXPORT_SYMBOL vmlinux 0xf758e05e	__seq_open_private
+EXPORT_SYMBOL vmlinux 0xf759f959	neigh_seq_next
+EXPORT_SYMBOL vmlinux 0xf75b8e70	module_layout
+EXPORT_SYMBOL vmlinux 0xf761c3ae	copy_to_user_fixup
+EXPORT_SYMBOL vmlinux 0xf78b83d3	__down_read
+EXPORT_SYMBOL vmlinux 0xf78d04ab	netlink_register_notifier
+EXPORT_SYMBOL vmlinux 0xf7c138f3	neigh_resolve_output
+EXPORT_SYMBOL vmlinux 0xf7d76317	serio_reconnect
+EXPORT_SYMBOL vmlinux 0xf7fd1eb1	neigh_compat_output
+EXPORT_SYMBOL vmlinux 0xf804bbb8	inet_frag_evictor
+EXPORT_SYMBOL vmlinux 0xf80c69d2	__strlen_user
+EXPORT_SYMBOL vmlinux 0xf8191240	add_wait_queue
+EXPORT_SYMBOL vmlinux 0xf81a99d0	journal_release_buffer
+EXPORT_SYMBOL vmlinux 0xf82abc1d	isa_dma_bridge_buggy
+EXPORT_SYMBOL vmlinux 0xf84b38c3	atomic_add_ret
+EXPORT_SYMBOL vmlinux 0xf85bd32b	kmem_cache_create
+EXPORT_SYMBOL vmlinux 0xf85cbfff	set_bh_page
+EXPORT_SYMBOL vmlinux 0xf890277c	unregister_sysrq_key
+EXPORT_SYMBOL vmlinux 0xf89094bd	i2c_del_adapter
+EXPORT_SYMBOL vmlinux 0xf894a803	ldc_write
+EXPORT_SYMBOL vmlinux 0xf899b265	request_key
+EXPORT_SYMBOL vmlinux 0xf8ce879d	tcf_em_tree_dump
+EXPORT_SYMBOL vmlinux 0xf8e8afae	drm_vblank_off
+EXPORT_SYMBOL vmlinux 0xf946a3b7	uart_get_baud_rate
+EXPORT_SYMBOL vmlinux 0xf969593a	close_bdev_exclusive
+EXPORT_SYMBOL vmlinux 0xf98afc2e	die_if_kernel
+EXPORT_SYMBOL vmlinux 0xf98e2e25	may_umount
+EXPORT_SYMBOL vmlinux 0xf9a482f9	msleep
+EXPORT_SYMBOL vmlinux 0xf9ae2dc8	end_buffer_async_write
+EXPORT_SYMBOL vmlinux 0xf9c32069	put_tty_driver
+EXPORT_SYMBOL vmlinux 0xf9c69c35	jbd2_journal_wipe
+EXPORT_SYMBOL vmlinux 0xf9c740fc	tcp_getsockopt
+EXPORT_SYMBOL vmlinux 0xf9dc1fac	pcim_pin_device
+EXPORT_SYMBOL vmlinux 0xf9ea733c	slow_work_sleep_till_thread_needed
+EXPORT_SYMBOL vmlinux 0xf9f0d5aa	dcache_readdir
+EXPORT_SYMBOL vmlinux 0xfa13dfbc	i2c_clients_command
+EXPORT_SYMBOL vmlinux 0xfa2af0bc	posix_lock_file_wait
+EXPORT_SYMBOL vmlinux 0xfa40f4df	ipv6_skip_exthdr
+EXPORT_SYMBOL vmlinux 0xfa5cc96e	__nla_reserve_nohdr
+EXPORT_SYMBOL vmlinux 0xfa5f4046	__sk_mem_schedule
+EXPORT_SYMBOL vmlinux 0xfa6fedd0	jbd2_journal_destroy
+EXPORT_SYMBOL vmlinux 0xfa77fa84	locks_remove_posix
+EXPORT_SYMBOL vmlinux 0xfa7a9847	filemap_write_and_wait_range
+EXPORT_SYMBOL vmlinux 0xfa811c58	trap_block
+EXPORT_SYMBOL vmlinux 0xfa908648	sysctl_jiffies
+EXPORT_SYMBOL vmlinux 0xfaa6eaa0	block_prepare_write
+EXPORT_SYMBOL vmlinux 0xfab53d97	simple_fsync
+EXPORT_SYMBOL vmlinux 0xfacb5d2b	sock_no_mmap
+EXPORT_SYMBOL vmlinux 0xfad16907	mempool_resize
+EXPORT_SYMBOL vmlinux 0xfaf0f1da	unregister_con_driver
+EXPORT_SYMBOL vmlinux 0xfaf98462	bitrev32
+EXPORT_SYMBOL vmlinux 0xfb065305	netlink_dump_start
+EXPORT_SYMBOL vmlinux 0xfb0cf2e9	touch_all_softlockup_watchdogs
+EXPORT_SYMBOL vmlinux 0xfb208d5b	call_usermodehelper_setcleanup
+EXPORT_SYMBOL vmlinux 0xfb253508	n_tty_ioctl_helper
+EXPORT_SYMBOL vmlinux 0xfb290493	dquot_reserve_space
+EXPORT_SYMBOL vmlinux 0xfb4d87f6	pci_bus_size_bridges
+EXPORT_SYMBOL vmlinux 0xfb6af58d	recalc_sigpending
+EXPORT_SYMBOL vmlinux 0xfb870e32	of_device_unregister
+EXPORT_SYMBOL vmlinux 0xfb9ce651	of_get_property
+EXPORT_SYMBOL vmlinux 0xfba1144b	consume_skb
+EXPORT_SYMBOL vmlinux 0xfba3715e	blk_queue_prep_rq
+EXPORT_SYMBOL vmlinux 0xfba95a53	alloc_buffer_head
+EXPORT_SYMBOL vmlinux 0xfbc8bc3b	dev_addr_del
+EXPORT_SYMBOL vmlinux 0xfbe27a1c	rb_first
+EXPORT_SYMBOL vmlinux 0xfbe62c7a	dm_kcopyd_copy
+EXPORT_SYMBOL vmlinux 0xfbffc023	kmalloc_caches
+EXPORT_SYMBOL vmlinux 0xfc02b7ad	sysctl_tcp_wmem
+EXPORT_SYMBOL vmlinux 0xfc13ef05	scm_detach_fds
+EXPORT_SYMBOL vmlinux 0xfc2a11a8	tty_termios_copy_hw
+EXPORT_SYMBOL vmlinux 0xfc2f28d7	inet_csk_reset_keepalive_timer
+EXPORT_SYMBOL vmlinux 0xfc30de78	get_fs_type
+EXPORT_SYMBOL vmlinux 0xfc39e32f	ioport_unmap
+EXPORT_SYMBOL vmlinux 0xfc7267cd	dma_pool_alloc
+EXPORT_SYMBOL vmlinux 0xfc97e45e	boot_tvec_bases
+EXPORT_SYMBOL vmlinux 0xfcaa04a0	out_of_line_wait_on_bit_lock
+EXPORT_SYMBOL vmlinux 0xfcae50ba	i2c_master_recv
+EXPORT_SYMBOL vmlinux 0xfcb1bd2e	pci_get_device
+EXPORT_SYMBOL vmlinux 0xfcc2a43c	utf32_to_utf8
+EXPORT_SYMBOL vmlinux 0xfcc86368	sockfd_lookup
+EXPORT_SYMBOL vmlinux 0xfcc93b31	bio_integrity_advance
+EXPORT_SYMBOL vmlinux 0xfce1e8c6	drm_mm_init
+EXPORT_SYMBOL vmlinux 0xfcec0987	enable_irq
+EXPORT_SYMBOL vmlinux 0xfcfa03ff	fb_videomode_to_modelist
+EXPORT_SYMBOL vmlinux 0xfcfebea0	phy_scan_fixups
+EXPORT_SYMBOL vmlinux 0xfd052132	misc_deregister
+EXPORT_SYMBOL vmlinux 0xfd24dd77	nobh_truncate_page
+EXPORT_SYMBOL vmlinux 0xfd2bb9cc	do_truncate
+EXPORT_SYMBOL vmlinux 0xfd2d8d5a	drm_mm_search_free
+EXPORT_SYMBOL vmlinux 0xfd5a9e00	pcibus_to_node
+EXPORT_SYMBOL vmlinux 0xfd5e31bd	udplite_table
+EXPORT_SYMBOL vmlinux 0xfd9d067c	vm_insert_mixed
+EXPORT_SYMBOL vmlinux 0xfda65869	inet_sendmsg
+EXPORT_SYMBOL vmlinux 0xfda85a7d	request_threaded_irq
+EXPORT_SYMBOL vmlinux 0xfdb96c84	init_task
+EXPORT_SYMBOL vmlinux 0xfdc162a1	drm_put_dev
+EXPORT_SYMBOL vmlinux 0xfdcedd94	sync_inodes_sb
+EXPORT_SYMBOL vmlinux 0xfdd6d736	take_over_console
+EXPORT_SYMBOL vmlinux 0xfdfbad19	drm_sman_alloc
+EXPORT_SYMBOL vmlinux 0xfdfc0b3b	fiemap_fill_next_extent
+EXPORT_SYMBOL vmlinux 0xfe2094ae	wait_for_key_construction
+EXPORT_SYMBOL vmlinux 0xfe26fc7c	nr_node_ids
+EXPORT_SYMBOL vmlinux 0xfe26fdff	vfs_fsync_range
+EXPORT_SYMBOL vmlinux 0xfe392bcd	generic_segment_checks
+EXPORT_SYMBOL vmlinux 0xfe4aedd0	open_by_devnum
+EXPORT_SYMBOL vmlinux 0xfe5d4bb2	sys_tz
+EXPORT_SYMBOL vmlinux 0xfe769456	unregister_netdevice_notifier
+EXPORT_SYMBOL vmlinux 0xfe78010d	xor_niagara_4
+EXPORT_SYMBOL vmlinux 0xfe7c4287	nr_cpu_ids
+EXPORT_SYMBOL vmlinux 0xfec05366	sun_do_break
+EXPORT_SYMBOL vmlinux 0xfec3c2f2	bcd2bin
+EXPORT_SYMBOL vmlinux 0xfec43b56	backlight_device_unregister
+EXPORT_SYMBOL vmlinux 0xfedd35fc	console_suspend_enabled
+EXPORT_SYMBOL vmlinux 0xfeea700c	ebus_dma_addr
+EXPORT_SYMBOL vmlinux 0xff1e9dd8	seq_list_start
+EXPORT_SYMBOL vmlinux 0xff420ca3	tty_port_close_end
+EXPORT_SYMBOL vmlinux 0xff6878cf	fb_default_cmap
+EXPORT_SYMBOL vmlinux 0xff6b770e	gen_pool_destroy
+EXPORT_SYMBOL vmlinux 0xff7559e4	ioport_resource
+EXPORT_SYMBOL vmlinux 0xff772c6e	drm_mm_scan_add_block
+EXPORT_SYMBOL vmlinux 0xff7e4dd0	vlan_ioctl_set
+EXPORT_SYMBOL vmlinux 0xff8307ad	drm_mm_pre_get
+EXPORT_SYMBOL vmlinux 0xff85e8ff	path_get
+EXPORT_SYMBOL vmlinux 0xff964b25	param_set_int
+EXPORT_SYMBOL vmlinux 0xff9ca065	fb_edid_to_monspecs
+EXPORT_SYMBOL vmlinux 0xffb1876d	tcf_generic_walker
+EXPORT_SYMBOL vmlinux 0xffd5a395	default_wake_function
+EXPORT_SYMBOL vmlinux 0xffdfcc36	input_unregister_handler
+EXPORT_SYMBOL vmlinux 0xffe711b3	register_filesystem
+EXPORT_SYMBOL vmlinux 0xfffb6692	mdio_bus_type
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x0cc1e40f	crypto_it_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x24aac4d9	crypto_aes_expand_key
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x3dc916b6	crypto_fl_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x40d46b21	crypto_ft_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x71dc9998	crypto_il_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0xb6e55df1	crypto_aes_set_key
+EXPORT_SYMBOL_GPL crypto/async_tx/async_memcpy 0x27a41514	async_memcpy
+EXPORT_SYMBOL_GPL crypto/async_tx/async_pq 0x8f8d8478	async_syndrome_val
+EXPORT_SYMBOL_GPL crypto/async_tx/async_pq 0xad60354c	async_gen_syndrome
+EXPORT_SYMBOL_GPL crypto/async_tx/async_raid6_recov 0x006c4c76	async_raid6_2data_recov
+EXPORT_SYMBOL_GPL crypto/async_tx/async_raid6_recov 0xede9734c	async_raid6_datap_recov
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x954a9358	async_trigger_callback
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0xd9d3c727	async_tx_submit
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0xe0a0c463	async_tx_quiesce
+EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0x9ef779cd	async_xor
+EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0xb4d2dc88	async_xor_val
+EXPORT_SYMBOL_GPL crypto/cryptd 0x0412f65c	cryptd_ahash_child
+EXPORT_SYMBOL_GPL crypto/cryptd 0x0aa2be47	cryptd_shash_desc
+EXPORT_SYMBOL_GPL crypto/cryptd 0x4adfa4b4	cryptd_ablkcipher_child
+EXPORT_SYMBOL_GPL crypto/cryptd 0xa20291f6	cryptd_alloc_ahash
+EXPORT_SYMBOL_GPL crypto/cryptd 0xb68f2fdd	cryptd_free_ahash
+EXPORT_SYMBOL_GPL crypto/cryptd 0xb8351d67	cryptd_alloc_ablkcipher
+EXPORT_SYMBOL_GPL crypto/cryptd 0xed540d2d	cryptd_free_ablkcipher
+EXPORT_SYMBOL_GPL crypto/twofish_common 0x3adf6ab2	twofish_setkey
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x0067df75	ata_tf_from_fis
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x00ae02ee	ata_bmdma_stop
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x00ebcb5d	ata_id_string
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x0131d2ac	dev_attr_sw_activity
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x01ca07e0	ata_qc_complete
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x0208bd65	ata_sff_tf_read
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x03054957	ata_bmdma_start
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x0377f64a	ata_ehi_push_desc
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x03c3bad2	ata_host_activate
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x03e3686c	ata_timing_cycle2mode
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x0531dcb8	ata_dev_classify
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x1013ac1a	ata_port_disable
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x104573f5	ata_std_postreset
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x10640a7b	sata_link_hardreset
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x1612d26c	dev_attr_em_message
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x1ad97fed	ata_pci_bmdma_clear_simplex
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x1c05ea52	ata_pci_sff_init_one
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x1d86fe5b	ata_sff_data_xfer32
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x1dd33621	ata_eh_thaw_port
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x20359d7f	ata_port_start
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x223d3ad1	ata_port_desc
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x22f73897	sata_scr_read
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x23149a72	ata_sff_port_start
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x246e9816	ata_pio_need_iordy
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x286ac959	ata_port_abort
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x2905ef59	ata_sff_dev_select
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x2c983f45	ata_host_alloc_pinfo
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x2d321e36	__ata_ehi_push_desc
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x2e81c8e0	ata_link_next
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x2f659a7c	dev_attr_unload_heads
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x3396cd72	ata_sas_port_alloc
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x342cf82e	ata_sff_tf_load
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x34cc8397	sata_link_debounce
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x3b7774a0	ata_dev_pair
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x3e38c6fd	ata_sff_dma_pause
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x3f08e804	ata_port_freeze
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x40af0dec	ata_xfer_mode2mask
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x410b306a	ata_sff_dev_classify
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x43f56e82	ata_xfer_mode2shift
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x4429d80b	sata_pmp_port_ops
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x47443fc3	ata_sff_freeze
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x49aa377c	sata_pmp_error_handler
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x4b01b5e5	sata_link_resume
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x4b8f7ae8	ata_host_init
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x4f0cdd5f	ata_slave_link_init
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x4fdc945d	sata_deb_timing_normal
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x4fee48a5	ata_dev_next
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x50491f7f	ata_sff_check_status
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x5687c03e	ata_do_eh
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x5785e6a6	ata_wait_after_reset
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x59a80f57	ata_sas_port_start
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x5b288b17	ata_qc_complete_multiple
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x5c825378	ata_sff_wait_ready
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x5cc698a1	ata_sff_busy_sleep
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x5ebc130e	ata_host_register
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x61805732	ata_sff_hsm_move
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x6582e253	ata_eh_freeze_port
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x65a8b391	ata_pio_queue_task
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x67dc58a4	ata_base_port_ops
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x69b717b3	ata_noop_qc_prep
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x69e9a2cb	ata_scsi_slave_config
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x6da2eec8	ata_pci_sff_init_host
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x6e545d5a	ata_sff_host_intr
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x6e5d8bac	sata_scr_write_flush
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x7041d626	ata_eh_analyze_ncq_error
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x707ff1bb	ata_xfer_mask2mode
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x714e9eeb	ata_bmdma_port_ops
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x71c994a2	ata_common_sdev_attrs
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x720e5ab8	ata_do_dev_read_id
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x7243be9b	ata_bmdma_status
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x734b5314	ata_sff_drain_fifo
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x7380696e	ata_sff_data_xfer_noirq
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x73a48b4a	ata_sff_std_ports
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x742c3a41	ata_sff_postreset
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x743a165e	ata_pack_xfermask
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x78a0d1bd	ata_sff_pause
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x79f6ab6b	sata_scr_valid
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x7a839c91	ata_eh_qc_complete
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x7b3f3a14	ata_link_online
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x7c04325a	ata_std_bios_param
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x8149ea54	ata_timing_find_mode
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x82587ed7	ata_pci_bmdma_init
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x82831ffd	dev_attr_em_message_type
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x874f7e4a	ata_cable_40wire
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x8935f425	ata_pci_sff_prepare_host
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x8b752ac1	ata_tf_to_fis
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x919c0c7d	sata_sff_hardreset
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x9436bd0c	ata_sff_dumb_qc_prep
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x94a68723	ata_scsi_slave_destroy
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x95abba13	ata_eh_qc_retry
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x9608ae27	ata_sas_queuecmd
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x9643ec42	ata_dummy_port_info
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x96527ecb	ata_port_probe
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x99dbb6ea	ata_host_alloc
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x9b4262ac	ata_cable_80wire
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x9d16911b	ata_sff_prereset
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x9d3e9631	ata_sff_port_ops
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x9ea32bf7	ata_sas_port_destroy
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x9ec42cbc	ata_ehi_clear_desc
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xa03ead34	ata_scsi_queuecmd
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xa05ce146	ata_sff_qc_fill_rtf
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xa3de33aa	ata_host_start
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xa46483eb	ata_link_offline
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xaedc0e05	ata_sas_port_init
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xaf3f6fe0	ata_sff_interrupt
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xafd277d6	ata_sg_init
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xb01ebf8a	ata_do_set_mode
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xb32344b8	ata_dev_disable
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xb4d30824	ata_std_prereset
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xb6aeb661	ata_id_c_string
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xb6e14497	sata_async_notification
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xb8e4c351	ata_cable_unknown
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xbd127b22	ata_port_schedule_eh
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xbe1887e4	ata_unpack_xfermask
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xbe42327e	ata_sas_scsi_ioctl
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xc0a83ba5	sata_std_hardreset
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xc428068d	sata_deb_timing_long
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xc48b7ccf	ata_mode_string
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xc5a2ceb6	sata_scr_write
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xc65bfd49	ata_bus_reset
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xc673e23e	ata_scsi_change_queue_depth
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xc98ae792	ata_pci_sff_activate_host
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xcc7c27d2	ata_cable_sata
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xcccfb2fa	sata_deb_timing_hotplug
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xccd14e94	pci_test_config_bits
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xcce907e8	ata_sff_post_internal_cmd
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xce20e2e1	ata_sff_exec_command
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xce4a9a81	dev_attr_link_power_management_policy
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xcf9951c7	ata_sff_irq_clear
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xcfaf2a63	ata_sff_lost_interrupt
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xd07d75ae	ata_port_pbar_desc
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xd1f57640	ata_host_detach
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xd29117ec	ata_sff_softreset
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xd293c984	ata_bmdma_setup
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xd86a8a09	sata_set_spd
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xdb72b876	ata_cable_ignore
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xdbe08777	ata_sff_thaw
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xdbfc0c9d	ata_sff_error_handler
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xdec2de69	ata_scsi_simulate
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xe0115c43	ata_sas_slave_configure
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xe1a590a2	ata_sff_qc_prep
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xe2a92f0a	ata_bmdma32_port_ops
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xe49ff3b0	ata_wait_register
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xe74dedeb	sata_port_ops
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xea418e0f	atapi_cmd_type
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xeaca9a7b	ata_dummy_port_ops
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xec2d67bf	ata_sff_port_start32
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xef7a0a1d	ata_pci_remove_one
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xf2107ccc	ata_timing_compute
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xf2a94fcc	ata_sas_port_stop
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xf2b10cf0	ata_sff_wait_after_reset
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xf3745a6d	ata_link_abort
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xf4dfdd27	ata_bmdma_mode_filter
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xf67ff126	ata_sff_irq_on
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xf6e874f5	ata_timing_merge
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xf6f76168	ata_sff_qc_issue
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xf726582a	ata_sff_data_xfer
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xf7f787bb	ata_std_qc_defer
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xf815d9d1	ata_scsi_ioctl
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xf8f3a0fb	ata_ratelimit
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xf9ca3160	ata_id_xfermask
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xfc7e24f1	ata_std_error_handler
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xff1e0bcd	sata_pmp_qc_defer_cmd_switch
+EXPORT_SYMBOL_GPL drivers/ata/pata_sis 0x5f8cec13	sis_info133_for_sata
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x14102f23	ks0108_displaystate
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x48a70518	ks0108_writedata
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x4f506333	ks0108_startline
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x6edae968	ks0108_isinited
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xbf4774db	ks0108_writecontrol
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xedde6df2	ks0108_page
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xfee8ef7b	ks0108_address
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x0526d4ae	tpm_read
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x12ad5df4	tpm_get_timeouts
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x1a96f238	tpm_open
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x2a4201a4	tpm_write
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x37197561	tpm_dev_release
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x4187619b	tpm_release
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x4a1d08f0	tpm_show_pubek
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x59fcf858	tpm_show_enabled
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x6a00160d	tpm_pm_resume
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x8c1d4b96	tpm_store_cancel
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x937b58dd	tpm_gen_interrupt
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x939efe0e	tpm_remove_hardware
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x99e868e4	tpm_show_owned
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xa2956960	tpm_show_caps
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xa49a52ad	tpm_show_pcrs
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xadf6aa4d	tpm_pcr_read
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xbc8a28bb	tpm_continue_selftest
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xc13e5e80	tpm_dev_vendor_release
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xc37226a5	tpm_pcr_extend
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xc3db84e2	tpm_register_hardware
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xd59c580d	tpm_show_timeouts
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xe2671fa0	tpm_show_caps_1_2
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xe2bb0f3f	tpm_pm_suspend
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xeae00bd1	tpm_show_temp_deactivated
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xec191889	tpm_calc_ordinal_duration
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xffd00a33	tpm_show_active
+EXPORT_SYMBOL_GPL drivers/connector/cn 0xb10d55bc	cn_netlink_send
+EXPORT_SYMBOL_GPL drivers/connector/cn 0xcf7a962e	cn_add_callback
+EXPORT_SYMBOL_GPL drivers/connector/cn 0xff5a8cfe	cn_del_callback
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x05495392	hid_debug
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x067ac5bb	hidinput_find_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x092536d0	hid_add_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x1432b3d5	hidraw_report_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x23580bf5	hid_set_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x3d17084c	hidinput_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x455c2cdf	hid_allocate_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x49306081	hid_dump_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x4d6bfd43	hidraw_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x4e54d0f0	hidraw_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x575a688e	hid_report_raw_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x58d88671	__hid_register_driver
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x64a95472	hid_check_keys_pressed
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x67a525b3	hid_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x69a9c092	hid_debug_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x7f7f2f2a	hid_dump_input
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x817b4d61	hid_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x96b6f4fe	hid_destroy_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xa488598c	hid_output_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xa4ce4094	hid_unregister_driver
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xa5889772	hid_dump_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xc53012fc	hid_resolv_usage
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xccbca677	hid_input_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xcd8b6ae3	hid_parse_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xea449ff3	hidinput_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xef74c85c	hidinput_report_event
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x01fd453e	usbhid_lookup_quirk
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x34a99b72	usbhid_submit_report
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x943cfdc8	usbhid_set_leds
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x1b2f6253	lis3lv02d_poweroff
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x6504db92	lis3_dev
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x6c33e494	lis3lv02d_joystick_disable
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xab22855d	lis3lv02d_remove_fs
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xb2ddc16b	lis3lv02d_poweron
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xe6af28c8	lis3lv02d_joystick_enable
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xf1176e66	lis3lv02d_init_device
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0x04ed84b4	hpsb_config_rom_ip1394_remove
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0xe6288a11	hpsb_config_rom_ip1394_add
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0xec8d18cf	hpsb_disable_irm
+EXPORT_SYMBOL_GPL drivers/infiniband/hw/ipath/ib_ipath 0x1514b2b2	ipath_debug
+EXPORT_SYMBOL_GPL drivers/input/ff-memless 0x7ce65677	input_ff_create_memless
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x5c7d6327	wm97xx_read_aux_adc
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x612c028a	wm97xx_reg_read
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x62a66985	wm9705_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x63abf880	wm97xx_register_mach_ops
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x7f1874df	wm9712_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x814ad8fc	wm97xx_reg_write
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x89ed79f2	wm97xx_set_suspend_mode
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x90748d70	wm97xx_config_gpio
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xaa45bb26	wm97xx_unregister_mach_ops
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xaa754fed	wm97xx_get_gpio
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xb3b27441	wm9713_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xda77556b	wm97xx_set_gpio
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x089e0ae4	gigaset_shutdown
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x2c0979ce	gigaset_dbg_buffer
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x2d1265e4	gigaset_m10x_send_skb
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x40269faf	gigaset_freecs
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x454aa44f	gigaset_debuglevel
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x46cdc75c	gigaset_stop
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x4bed8349	gigaset_handle_modem_response
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x52ae67e7	gigaset_add_event
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x5b1d4572	gigaset_start
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x5f233c2e	gigaset_freedriver
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x924cb798	gigaset_initdriver
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x9943a00b	gigaset_initcs
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xa226fdaf	gigaset_skb_sent
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xa640602f	gigaset_fill_inbuf
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xdf026743	gigaset_m10x_input
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xea7fb191	gigaset_if_receive
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xf022d199	gigaset_blockdriver
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0x3fc1c581	led_classdev_register
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0x4d6b0e93	led_classdev_unregister
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0xbd6d28b5	led_classdev_suspend
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0xc05e2fee	led_classdev_resume
+EXPORT_SYMBOL_GPL drivers/md/dm-multipath 0x30647e8b	dm_unregister_path_selector
+EXPORT_SYMBOL_GPL drivers/md/dm-multipath 0x6333990b	dm_register_path_selector
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x11addce4	dm_rh_update_states
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x1745135b	dm_rh_dec
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x20880330	dm_rh_stop_recovery
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x2259618f	dm_rh_start_recovery
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x484ca062	dm_rh_flush
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x5d2b0bf7	dm_rh_delay
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x5d575666	dm_region_hash_destroy
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x61ddedf5	dm_rh_inc_pending
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x64263ac5	dm_rh_get_region_key
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x649a0478	dm_rh_region_to_sector
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x68f8a692	dm_rh_dirty_log
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x6dd4bbeb	dm_rh_get_region_size
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x6e1b142e	dm_rh_recovery_prepare
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x6fbbbadb	dm_rh_region_context
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x708e07a4	dm_rh_recovery_start
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x82140cec	dm_rh_bio_to_region
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x91fd0421	dm_rh_get_state
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xb4ee6b13	dm_rh_recovery_end
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xea4cb699	dm_rh_mark_nosync
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xec0ff747	dm_rh_recovery_in_flight
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xf384748f	dm_region_hash_create
+EXPORT_SYMBOL_GPL drivers/md/md-mod 0x9c4b7bbe	sync_page_io
+EXPORT_SYMBOL_GPL drivers/md/md-mod 0xa03500d1	md_do_sync
+EXPORT_SYMBOL_GPL drivers/md/md-mod 0xa6ec8d0b	md_allow_write
+EXPORT_SYMBOL_GPL drivers/md/md-mod 0xe0f66f31	md_new_event
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0x24935f26	raid6_call
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0xcdc24ab5	raid6_2data_recov
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0xdbab0c01	raid6_datap_recov
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x0349c9bd	ir_codes_proteus_2309_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x0366dcdf	ir_codes_videomate_s350_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x110b053a	ir_codes_pixelview_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x124cb753	ir_codes_encore_enltv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x183fdfdd	ir_codes_gotview7135_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x19b4d61c	ir_codes_nebula_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x19cd2826	ir_codes_behold_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x1a9009d6	ir_codes_dm1105_nec_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x1cb148f5	ir_extract_bits
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2456e513	ir_decode_pulsedistance
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2cc459b5	ir_codes_flydvb_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2d0e9a49	ir_codes_em_terratec_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3136d8ff	ir_codes_dntv_live_dvbt_pro_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x32b9033b	ir_codes_apac_viewcomp_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3909f4ad	ir_codes_terratec_cinergy_xs_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3a84be27	ir_codes_avermedia_a16d_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x4267d749	ir_codes_budget_ci_old_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x43c89ef4	ir_decode_biphase
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x4c1442c1	ir_codes_real_audio_220_32_keys_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x51ba1643	ir_codes_kworld_plus_tv_analog_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x543db4ff	ir_codes_avermedia_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x5e95da31	ir_codes_tt_1500_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x5fbe6515	ir_codes_pinnacle_color_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x61d039d7	ir_codes_behold_columbus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6427a3fb	ir_codes_pinnacle_grey_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x64b02fed	ir_codes_avermedia_dvbt_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6606596a	ir_rc5_timer_keyup
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6809de82	ir_codes_pctv_sedna_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6d6511e7	ir_dump_samples
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x703fc738	ir_codes_avertv_303_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x7283f81d	ir_codes_purpletv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x72c2992e	ir_codes_powercolor_real_angel_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x76d71b8e	ir_codes_dntv_live_dvb_t_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x784e176d	ir_codes_asus_pc39_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x828b3ce5	ir_codes_encore_enltv_fm53_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x8acae3dd	ir_codes_pinnacle_pctv_hd_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x90243e94	ir_input_keydown
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x92d1d181	ir_codes_flyvideo_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x94651dab	ir_codes_ati_tv_wonder_hd_600_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x97c35dab	ir_codes_msi_tvanywhere_plus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x9944e2e5	ir_codes_hauppauge_new_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xa69aa6ad	ir_codes_pv951_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xa95157c5	ir_codes_cinergy_1400_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xac15f6c8	ir_codes_kaiomy_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xaff22e87	ir_codes_pixelview_new_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb01a1998	ir_codes_manli_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb0a8ef38	ir_codes_rc5_tv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb57445f7	ir_codes_eztv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb5adb754	ir_codes_cinergy_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xbd3ce6f0	ir_codes_avermedia_cardbus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xbeaccbdc	ir_codes_gadmei_rm008z_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xc8a32c44	ir_input_init
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xcba36c62	ir_codes_videomate_tv_pvr_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xd30c491f	ir_codes_norwood_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xdc23fec4	ir_codes_fusionhdtv_mce_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xdd4c0a07	ir_codes_evga_indtube_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xe1101f4d	ir_codes_avermedia_m135a_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xe4140c60	ir_codes_genius_tvgo_a11mce_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xeb9bb08f	ir_codes_npgtech_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xebf345b4	ir_codes_encore_enltv2_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xeec89db8	ir_codes_empty_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xef29c40d	ir_codes_adstech_dvb_t_pci_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf19208f4	ir_input_nokey
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf33c155d	ir_codes_msi_tvanywhere_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf3d619ec	ir_codes_iodata_bctv7e_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf4f7a4d6	ir_rc5_timer_end
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf5e15e65	ir_codes_winfast_table
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x1257b444	saa7146_wait_for_debi_done
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x14175dd4	saa7146_i2c_adapter_prepare
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x25d9229f	saa7146_unregister_extension
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x45f80218	saa7146_vfree_destroy_pgtable
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x69e7f277	saa7146_devices_lock
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xb72aea9a	saa7146_vmalloc_build_pgtable
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xb8259fff	saa7146_pgtable_alloc
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xc272cf26	saa7146_setgpio
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xc95c3c13	saa7146_pgtable_free
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xcf683cf2	saa7146_devices
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xd393f104	saa7146_pgtable_build_single
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xe3cd9b5c	saa7146_debug
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xf3e6627e	saa7146_register_extension
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x1594caa1	saa7146_unregister_device
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x255bf8e6	saa7146_vv_release
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x2e0ef2fd	saa7146_vv_init
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x68bf2048	saa7146_start_preview
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x8131a176	saa7146_set_hps_source_and_sync
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x87409003	saa7146_stop_preview
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xa8923cbd	saa7146_register_device
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/mt20xx 0x11b1ddce	microtune_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda8290 0x2dbda3cb	tda829x_probe
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda8290 0x438e1578	tda829x_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda9887 0x73833ffc	tda9887_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5761 0x3d920e4d	tea5761_autodetection
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5761 0x65b5c800	tea5761_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5767 0x5ffd36aa	tea5767_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5767 0x76e4e008	tea5767_autodetection
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tuner-simple 0x36801bcc	simple_tuner_attach
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x017ea7c7	cx231xx_tuner_callback
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x04563cf8	cx231xx_uninit_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x1bff8381	cx231xx_send_gpio_cmd
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x23258e8a	cx231xx_init_vbi_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x2fea00c8	cx231xx_uninit_vbi_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x5bdfbf27	cx231xx_dev_init
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xa4d3bcf4	cx231xx_set_mode
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xaa76d54f	cx231xx_init_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xb16935a3	cx231xx_send_usb_command
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xc85de3f7	cx231xx_set_alt_setting
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xe9b6c9b0	cx231xx_capture_start
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xef190c42	cx231xx_dev_uninit
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x122bc105	saa7134_s_std_internal
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x1377314f	saa7134_s_ctrl_internal
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x705e0cbd	saa7134_ts_qops
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x7ba05a9b	saa7134_g_ctrl_internal
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x87a32860	saa7134_queryctrl
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x0faf1b5f	v4l2_i2c_new_subdev_cfg
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x59e62cd3	v4l2_i2c_subdev_addr
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xa17e92e7	v4l2_i2c_new_subdev_board
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xdda003e9	v4l2_i2c_subdev_init
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xf2a353ac	v4l2_i2c_tuner_addrs
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xf5ef842e	v4l_bound_align_image
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-compat-ioctl32 0x718e8dcb	v4l2_compat_ioctl32
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x48fa4a52	v4l2_int_ioctl_1
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x885f6769	v4l2_int_ioctl_0
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x9a19e379	v4l2_int_device_unregister
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xa5228b24	v4l2_int_device_try_attach_all
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xef72dfce	v4l2_int_device_register
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x04839e8b	videobuf_mmap_mapper
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x0b8ef5c9	videobuf_queue_is_busy
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x13dfbd06	videobuf_stop
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x1ef5deee	videobuf_next_field
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x2196796d	videobuf_queue_cancel
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x2ea69b32	videobuf_waiton
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x33c45ee6	videobuf_read_stream
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x3da5ad64	videobuf_queue_core_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x49463b4e	videobuf_mmap_free
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x4a79b691	videobuf_qbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x66aef395	videobuf_iolock
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x67b8c613	videobuf_cgmbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x78caf28b	videobuf_dqbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x87fca580	videobuf_poll_stream
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x90a3e7e7	videobuf_read_one
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x95295d47	videobuf_alloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xa24434ba	videobuf_read_stop
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xba24473b	videobuf_queue_to_vmalloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xba688f9c	videobuf_read_start
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xc6a18dcb	videobuf_reqbufs
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xda07f16e	videobuf_streamon
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xe2947d28	__videobuf_mmap_setup
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xf48d14cb	videobuf_streamoff
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xf58db9f1	videobuf_querybuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xfd74d3d9	videobuf_mmap_setup
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x1ab43391	videobuf_dma_init_overlay
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x2467ad71	videobuf_sg_dma_map
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x34663daa	videobuf_dma_init_kernel
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x562b3cbe	videobuf_dma_sync
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x630b36fe	videobuf_dma_unmap
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x6c07745e	videobuf_dma_free
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x6e22e9f3	videobuf_dma_map
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x8b7a21b9	videobuf_dma_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x9e3592b0	videobuf_queue_sg_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xa38faed2	videobuf_sg_alloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xb27e6f66	videobuf_to_dma
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xc9859dec	videobuf_dma_init_user
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xeb1ee151	videobuf_vmalloc_to_sg
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xefac0bcc	videobuf_sg_dma_unmap
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0x43882d74	videobuf_vmalloc_free
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0xb0d4d5ed	videobuf_to_vmalloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0xeefb18c7	videobuf_queue_vmalloc_init
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x19420494	v4l2_device_set_name
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x1e244748	v4l2_device_register_subdev
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x50c09f8e	v4l2_device_register
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x5ddd4f50	v4l2_device_unregister_subdev
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x6ddd6d07	v4l2_device_disconnect
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x6e2b1d3d	v4l2_device_unregister
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x01b73533	i2o_dma_map_single
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x18cc155a	i2o_pool_free
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x4f7ac49a	i2o_dma_free
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x579cc53b	i2o_dma_alloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x5beddeab	i2o_dma_map_sg
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x61c9e2bf	i2o_sg_tablesize
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x92da2fbc	i2o_dma_realloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xcd2ec762	i2o_pool_alloc
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x19d9f271	mc13783_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x3004573f	mc13783_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x34a4660f	mc13783_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x37f152fe	mc13783_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x3d0a699c	mc13783_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x5ef91551	mc13783_adc_set_ts_status
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x8841edf9	mc13783_adc_do_conversion
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-adc 0x2d76c9de	pcf50633_adc_sync_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-adc 0x6977a126	pcf50633_adc_async_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x0482df24	pcf50633_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x0f18ed41	pcf50633_write_block
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x12abd223	pcf50633_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x2b3b3405	pcf50633_reg_set_bit_mask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x4c7d0c67	pcf50633_irq_mask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x71893bfe	pcf50633_read_block
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x9b3afa3d	pcf50633_irq_unmask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xcccd5a82	pcf50633_irq_mask_get
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xd567e527	pcf50633_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xdbe66747	pcf50633_reg_clear_bits
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xf784ffce	pcf50633_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x026f2e24	pcf50633_gpio_power_supply_set
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x1d89c6d0	pcf50633_gpio_invert_set
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x2a9f8d54	pcf50633_gpio_get
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x7824e15a	pcf50633_gpio_invert_get
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0xa6b8ef63	pcf50633_gpio_set
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x49f0d957	sm501_modify_reg
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x5c19a7b0	sm501_set_clock
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x6f82fa9a	sm501_unit_power
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x90f79e8c	sm501_misc_control
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0xa2d27a6d	sm501_find_clock
+EXPORT_SYMBOL_GPL drivers/mfd/ucb1400_core 0x83580660	ucb1400_adc_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x26a03e42	wm831x_reg_unlock
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x28bf6d44	wm831x_auxadc_read_uv
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x34681162	wm831x_auxadc_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x47967695	wm831x_reg_lock
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x4d4e2a3c	wm831x_bulk_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x7dab26b6	wm831x_isinkv_values
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x9219a4c4	wm831x_enable_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x99244820	wm831x_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xb88f7c95	wm831x_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xd1705477	wm831x_disable_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xd666fcb9	wm831x_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xd9c71298	wm831x_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xee68fd14	wm831x_request_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x027ea3d2	wm8350_reg_lock
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x034cce71	wm8350_read_auxadc
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x07c937e1	wm8350_gpio_config
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x13abaece	wm8350_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x17b3ee0d	wm8350_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x1d76fd64	wm8350_block_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x2086d7dc	wm8350_device_exit
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x23525a29	wm8350_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x6a86ff44	wm8350_block_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x8dfe84bf	wm8350_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xa133a707	wm8350_reg_unlock
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xa25d787b	wm8350_device_init
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xc299a00f	wm8350_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xe225af3c	wm8350_unmask_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xe667bd67	wm8350_clear_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xef737c1e	wm8350_mask_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x3afb2c54	wm8400_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x4eb2b335	wm8400_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x7dae6247	wm8400_reset_codec_reg_cache
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0xfd1b1731	wm8400_block_read
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x62c04943	cb710_sg_dwiter_read_next_block
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x8413184c	cb710_set_irq_handler
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0xde75924b	cb710_sg_dwiter_write_next_block
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0xf42c55ac	cb710_pci_update_config_reg
+EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x2df115d4	eeprom_93cx6_multiread
+EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x63d14d2f	eeprom_93cx6_read
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x0524a15b	sdio_readl
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x081c47c5	sdio_writew
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x149e2967	sdio_release_irq
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x16f961ca	sdio_readsb
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x17ef9f6e	sdio_writeb
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x1dcc9bc9	sdio_enable_func
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x3b5a6f51	sdio_memcpy_fromio
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x5ae8c45d	sdio_claim_host
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x5eee5f4b	sdio_writel
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x5fc15017	sdio_writesb
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x774a9862	sdio_readw
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x849f5b6a	sdio_claim_irq
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x8535ca98	sdio_memcpy_toio
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x85c39d8e	sdio_align_size
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x9cc57d52	sdio_f0_writeb
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xb6b7350a	sdio_release_host
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xd6a2b478	sdio_set_block_size
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xd7a7f553	sdio_readb
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xdaed1b68	sdio_disable_func
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xec039d7b	sdio_unregister_driver
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xedd8c695	sdio_register_driver
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xf76b7a4b	sdio_f0_readb
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x03591de4	sdhci_free_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x0814ae00	sdhci_alloc_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x1710ab0f	sdhci_remove_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x3539a313	sdhci_add_host
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x0d62669f	cfi_cmdset_0003
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x24789d3c	cfi_cmdset_0001
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x72088e69	cfi_cmdset_0200
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0002 0xf457986e	cfi_cmdset_0002
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0020 0x92bb8b64	cfi_cmdset_0020
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x37a47023	cfi_qry_mode_off
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0xcaf87665	cfi_qry_present
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0xd755aaa9	cfi_qry_mode_on
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2000 0x998d8e48	DoC2k_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001 0xf2761f14	DoCMil_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001plus 0xb0280dc2	DoCMilPlus_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/docecc 0x45937659	doc_decode_ecc
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x1061ecfe	default_mtd_writev
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x13cf7056	kill_mtd_super
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x2cb59c4f	deregister_mtd_parser
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x3d6af62b	get_sb_mtd
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x42666caf	mtd_table_mutex
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x6854dbd5	register_mtd_user
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x7cfdfac3	del_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x86b14a24	register_mtd_parser
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xb3ff045c	unregister_mtd_user
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xc39edce6	add_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xd4b3c66f	get_mtd_device_nm
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xd7c56e23	put_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xe616cda8	mtd_erase_callback
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xe7c3675d	get_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xef01767b	mtd_table
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xf89ba89c	parse_mtd_partitions
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x0fce7ef5	add_mtd_blktrans_dev
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x1522af3b	register_mtd_blktrans
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x4569c23c	del_mtd_blktrans_dev
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0xb0431c64	deregister_mtd_blktrans
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x396e3b66	nand_release
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x3f6bbc02	nand_scan
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x786f2dd2	nand_scan_ident
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x7b28b5a3	nand_wait_ready
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x91ba2b3a	nand_scan_tail
+EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0x4f13c186	onenand_release
+EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0x8c7927bf	onenand_scan
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x005a1e07	ubi_leb_write
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x2c1aec2c	ubi_leb_erase
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x2d2d33d2	ubi_leb_map
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x42801d20	ubi_sync
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x48f82c7b	ubi_open_volume_nm
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x5e2d20d1	ubi_do_get_device_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x69bb8c63	ubi_is_mapped
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x6a107d1d	ubi_get_volume_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x6a9684a1	ubi_leb_unmap
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x6b5f7db8	ubi_open_volume
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x6f09ba8a	ubi_register_volume_notifier
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x7e235060	ubi_leb_read
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x8d6dddec	ubi_leb_change
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xbc505df4	ubi_get_device_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xddca27e0	ubi_close_volume
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xfd6f0ef9	ubi_unregister_volume_notifier
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x12543732	can_put_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x285eea21	open_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x3c478dba	can_bus_off
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x5a65f265	alloc_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x83621233	can_get_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x9e7ea61f	free_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x9f8395a5	unregister_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xad7fc513	register_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xca918ae0	can_free_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xd9cd1dfb	close_candev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x132ff25c	register_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xa2feadb5	alloc_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xb34e2c9e	unregister_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xbd53a842	free_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xdc9bd500	sja1000_interrupt
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x00fec394	mlx4_cq_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x0352b0f7	mlx4_fmr_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x09b2e477	mlx4_srq_arm
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x155fc506	mlx4_fmr_enable
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1729f882	mlx4_qp_query
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x22757c08	mlx4_INIT_PORT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x227a0953	mlx4_qp_remove
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x26ef044d	mlx4_register_vlan
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x27d3cb90	mlx4_fmr_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x287c0d7a	mlx4_alloc_hwq_res
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x2bef2f1e	mlx4_srq_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x32b9fdb7	mlx4_multicast_attach
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x353785e1	mlx4_pd_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x4307716f	mlx4_mtt_init
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x43f37d96	mlx4_cq_resize
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x44717f85	mlx4_cq_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x48f77dfa	mlx4_mtt_cleanup
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x4ec92f6b	mlx4_cq_modify
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x51fe6446	mlx4_qp_reserve_range
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x528284fa	mlx4_qp_release_range
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x53acc981	mlx4_qp_to_ready
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x555238c4	mlx4_buf_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x58d47226	mlx4_srq_query
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x5f41426a	mlx4_CLOSE_PORT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x6b050565	mlx4_free_cmd_mailbox
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x6bcd32b1	__mlx4_cmd
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x6e95c85b	mlx4_write_mtt
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x86467531	mlx4_pd_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x873306ee	mlx4_register_interface
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x8ca57db0	mlx4_mr_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9537b5dc	mlx4_qp_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa41b2b72	mlx4_srq_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa8af59c6	mlx4_mtt_addr
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa90df296	mlx4_uar_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xab26e1bb	mlx4_multicast_detach
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xadd0c8f1	mlx4_alloc_cmd_mailbox
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc2bf0ab4	mlx4_mr_enable
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc4d8f1f8	mlx4_unregister_vlan
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc54e4db5	mlx4_qp_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc5778dbd	mlx4_buf_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc5a3d878	mlx4_fmr_unmap
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc5e97965	mlx4_unregister_interface
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xca121056	mlx4_unregister_mac
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xcbdc1763	mlx4_free_hwq_res
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd0053c68	mlx4_buf_write_mtt
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd0aff039	mlx4_SYNC_TPT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd345f6ec	mlx4_register_mac
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xdab1eeb6	mlx4_db_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe205e452	mlx4_db_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf1f03564	mlx4_uar_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf2bdefff	mlx4_mr_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf45d25a1	mlx4_map_phys_fmr
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf4b92747	mlx4_qp_modify
+EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0x69c113f5	usbnet_generic_cdc_bind
+EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0xf1548cfd	usbnet_cdc_unbind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x4dd99a87	rndis_tx_fixup
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x8f738c51	rndis_unbind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x9ac929ed	rndis_status
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xc0e99037	generic_rndis_bind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xcab32dbe	rndis_rx_fixup
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xf0ad59de	rndis_command
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x0d8a830b	usbnet_get_msglevel
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x12f160a0	usbnet_suspend
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x17de84ad	usbnet_open
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x22e0254a	usbnet_resume
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x25f1b313	usbnet_stop
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x269f5533	usbnet_get_link
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x2786d984	usbnet_get_drvinfo
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x39f7abd0	usbnet_start_xmit
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x47bf05d7	usbnet_tx_timeout
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x5f722aef	usbnet_disconnect
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x7e1acde8	usbnet_defer_kevent
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x956f0bf3	usbnet_set_settings
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xa225b037	usbnet_pause_rx
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xa31cfa92	usbnet_get_ethernet_addr
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xb69d72f9	usbnet_get_settings
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xb82dedc1	usbnet_nway_reset
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xbeea8d6c	usbnet_unlink_rx_urbs
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xc2e52156	usbnet_purge_paused_rxq
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xc8b4485f	usbnet_skb_return
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xca0910e3	usbnet_resume_rx
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xd8c4bc85	usbnet_set_msglevel
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xf5fbe4b1	usbnet_probe
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xf8bbfce7	usbnet_change_mtu
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xffae204d	usbnet_get_endpoints
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x233de56b	i2400m_tx
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x319d7f45	i2400m_cmd_get_state
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x48ca2001	i2400m_release
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x5835f1a0	i2400m_setup
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x893950a9	i2400m_tx_msg_sent
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x8f010069	i2400m_cmd_enter_powersave
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x92930aa3	i2400m_queue_work
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xa1999ecf	i2400m_netdev_setup
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xaebb63f1	i2400m_dev_reset_handle
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xb00b793c	i2400m_bm_cmd_prepare
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xc9ead954	i2400m_tx_msg_get
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xcd2547af	i2400m_rx
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xd6783fe1	i2400m_dev_bootstrap
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xfce2de84	i2400m_set_init_config
+EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0xf6cebda7	libipw_rx_any
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x1118f8d3	__lbs_cmd
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x136b7bf1	lbs_queue_event
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x341adbeb	lbs_start_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x3deb87e7	lbs_notify_command_response
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x5b2fdf37	lbs_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x5d588d68	lbs_remove_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x68c1f333	lbs_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x6db0603d	lbs_host_to_card_done
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x855b3f05	lbs_cmd_copyback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x952031c7	lbs_add_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xbd97eee7	lbs_send_tx_feedback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xc1f10c16	lbs_process_rxed_packet
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xd5a917cc	lbs_cmd_802_11_rate_adapt_rateset
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xd7b526a7	lbs_stop_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xe66ca78b	lbs_host_sleep_cfg
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf64277de	lbs_debug
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x14f15895	lbtf_bcn_sent
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x3e861563	lbtf_cmd_response_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x43c4b6a0	lbtf_remove_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x957952ff	lbtf_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xa68b3236	lbtf_add_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xcbe8a4dd	lbtf_cmd_copyback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xf8888efb	__lbtf_cmd
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xfb04dda1	lbtf_send_tx_feedback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0x88b66df7	if_usb_prog_firmware
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0xfa62bc60	if_usb_reset_device
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x099a35f2	p54_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x65a7e840	p54_parse_eeprom
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x6f674a94	p54_free_skb
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x9524ec88	p54_free_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x9581b555	p54_parse_firmware
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xb444cae2	p54_read_eeprom
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xe51aa7fe	p54_unregister_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xe65fe9be	p54_init_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xf96bff3b	p54_register_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x029e4da7	rt2x00mac_add_interface
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x0816b4c0	rt2x00mac_bss_info_changed
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x1556cdc0	rt2x00mac_rfkill_poll
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x1a8e45fd	rt2x00lib_probe_dev
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x29e099f3	rt2x00queue_get_entry
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x48120f1c	rt2x00lib_beacondone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x495e51de	rt2x00mac_set_tim
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x5b0de09c	rt2x00lib_remove_dev
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x6b4d19a4	rt2x00mac_tx
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x6cace95d	rt2x00lib_rxdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x72806498	rt2x00mac_conf_tx
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x7ba94376	rt2x00mac_get_stats
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x8b4ebbf6	rt2x00mac_configure_filter
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x91f97b08	rt2x00mac_set_key
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x937409be	rt2x00mac_config
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xa18a1e1b	rt2x00mac_stop
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xb52eac2f	rt2x00mac_start
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xc95b4bde	rt2x00mac_get_tx_stats
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xca9c5809	rt2x00queue_map_txskb
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xcb5d5432	rt2x00mac_remove_interface
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xd63cb00e	rt2x00queue_get_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xe35755b7	rt2x00lib_txdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x010a9084	rt2x00pci_remove
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x588eac01	rt2x00pci_uninitialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x63282f36	rt2x00pci_rxdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x783cb250	rt2x00pci_regbusy_read
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x8070f51d	rt2x00pci_probe
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xd84c5581	rt2x00pci_initialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xdec8ed4e	rt2x00pci_write_tx_data
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x0e1f548f	rt2x00usb_uninitialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x5ea226a4	rt2x00usb_vendor_request_buff
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x6ddb6d1a	rt2x00usb_clear_entry
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x798c644c	rt2x00usb_vendor_request
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x7cfed572	rt2x00usb_vendor_req_buff_lock
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x8409bad5	rt2x00usb_kill_tx_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x87697b27	rt2x00usb_disconnect
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x94ce010b	rt2x00usb_probe
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xbca2c64a	rt2x00usb_disable_radio
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xc8ae7434	rt2x00usb_write_tx_data
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xe2787aea	rt2x00usb_kick_tx_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xe6f7d937	rt2x00usb_initialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xf13f1b7e	rt2x00usb_regbusy_read
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xffb33139	rt2x00usb_vendor_request_large_buff
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0x62499259	wl1251_init_ieee80211
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0x65b02499	wl1251_free_hw
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0xdd95468d	wl1251_alloc_hw
+EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0xd7ef3d38	pcf50633_mbc_get_status
+EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0xd9cbbc84	pcf50633_mbc_usb_curlim_set
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x04c7f86b	wm8350_ldo_set_slot
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x504ef404	wm8350_register_regulator
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x619c53d5	wm8350_register_led
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x9fbae018	wm8350_dcdc25_set_mode
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xbb7b71f6	wm8350_isink_set_flash
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xc6e3b908	wm8350_dcdc_set_slot
+EXPORT_SYMBOL_GPL drivers/regulator/wm8400-regulator 0x24f741a5	wm8400_register_regulator
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x1e7c3b67	scsi_register_device_handler
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x2e6113ba	scsi_dh_detach
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x2fc2b2c4	scsi_unregister_device_handler
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x593a36c2	scsi_dh_handler_exist
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x5f5588ca	scsi_dh_attach
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x9073b83e	scsi_dh_set_params
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0xfa9bfd1e	scsi_dh_activate
+EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x374c1e1c	fcoe_wwn_from_mac
+EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x90a8f630	fcoe_libfc_config
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x04127cd0	iscsi_conn_bind
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0503d951	iscsi_conn_queue_work
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x11f9308a	iscsi_conn_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x21e2d366	iscsi_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x25020495	iscsi_itt_to_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x3147f3b8	iscsi_pool_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x33d5be62	iscsi_eh_target_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x40eee67c	iscsi_session_recovery_timedout
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x45f7f8bf	iscsi_change_queue_depth
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4641032a	iscsi_host_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x47dace08	iscsi_suspend_tx
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4cad726a	iscsi_update_cmdsn
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4d40721f	iscsi_eh_device_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x54aa6034	iscsi_conn_start
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x58372e76	iscsi_host_set_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x66d0dad9	iscsi_conn_send_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x68048a99	iscsi_complete_scsi_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x6db3cc2d	__iscsi_get_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x7051dc87	iscsi_requeue_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x74d1b738	iscsi_pool_init
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x76370d3e	iscsi_conn_stop
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x7ec631a5	iscsi_put_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x7f91812c	iscsi_host_add
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x8bf9245c	iscsi_host_remove
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x8dea4529	iscsi_host_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xa7e7943f	iscsi_queuecommand
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xa96353d6	iscsi_eh_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xac3ee00a	iscsi_itt_to_ctask
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb0617310	iscsi_conn_failure
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb81f3769	iscsi_conn_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xc2e792ae	iscsi_host_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xc651c4b8	iscsi_complete_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xcadf5850	iscsi_session_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xdbc67441	iscsi_session_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe24655c9	__iscsi_complete_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe4686eee	iscsi_set_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe83019fe	iscsi_suspend_queue
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe8fc59b3	iscsi_verify_itt
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe9b8efb0	iscsi_session_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf175aad5	iscsi_conn_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf7885e1c	iscsi_prep_data_out_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xfb9cf6d8	iscsi_session_failure
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x085249ac	iscsi_tcp_recv_skb
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x167634ef	iscsi_tcp_conn_get_stats
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x21de6bb2	iscsi_tcp_segment_unmap
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x30c08db5	iscsi_tcp_dgst_header
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x399aaa77	iscsi_tcp_hdr_recv_prep
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x844f922c	iscsi_tcp_r2tpool_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x9b818230	iscsi_tcp_conn_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xb4bdf800	iscsi_tcp_conn_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xb9c0fd10	iscsi_segment_seek_sg
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xd19b1ba8	iscsi_tcp_task_xmit
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xd8a5b90e	iscsi_tcp_recv_segment_is_hdr
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xdc822de5	iscsi_tcp_task_init
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xe08842b9	iscsi_tcp_segment_done
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xe4013bee	iscsi_tcp_cleanup_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xf84045ac	iscsi_tcp_r2tpool_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xfa8dc386	iscsi_segment_init_linear
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x02b0d9c0	sas_slave_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x045665f4	sas_change_queue_type
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x2ccdd0eb	sas_domain_attach_transport
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x3155208d	sas_slave_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x34024341	sas_unregister_ha
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x4346eb05	sas_ioctl
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x46307a05	sas_phy_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x4fdb6e81	sas_eh_bus_reset_handler
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x518ec63d	sas_domain_release_transport
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x708688c3	sas_register_ha
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x7517b05f	sas_target_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x779422ec	sas_queuecommand
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x826bf9ac	sas_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x88bfa0b2	sas_task_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x8a11ca7d	sas_ssp_task_response
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x8c33bdf8	sas_find_local_phy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x965eb624	sas_bios_param
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xa6123390	sas_change_queue_depth
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xb5b0d9e2	sas_phy_enable
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xbd4be750	sas_request_addr
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xd3e74235	sas_eh_device_reset_handler
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xf2dccc93	sas_slave_configure
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xf65ab3a1	__sas_task_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x272bcd0a	srp_iu_put
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x2ceac349	srp_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x3556d16b	srp_cmd_queue
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x5fc19dae	srp_target_free
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x911bb426	srp_iu_get
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xc3fceafd	srp_transfer_data
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x0d584645	__scsi_get_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x1b29c3a9	scsi_target_block
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x2027ad3c	scsi_nl_add_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x2339c4e2	scsi_nl_sock
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x26c90ea4	scsi_eh_get_sense
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x286f94ca	scsi_bus_type
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x35d8c94a	sdev_evt_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x3d94857e	scsi_flush_work
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x5deda958	scsi_target_unblock
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x69b5d6ff	scsi_internal_device_block
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x6b2c39b9	scsi_internal_device_unblock
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x7dfeefc9	scsi_mode_select
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x7e275ea8	scsi_complete_async_scans
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x920e77e7	scsi_get_vpd_page
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x9d8d0605	sdev_evt_send
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x9dcc70ff	scsi_queue_work
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xba76d794	scsi_nl_add_driver
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xbae34c27	scsi_nl_remove_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xc399468f	scsi_nl_remove_driver
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xe2e1b8d8	scsi_eh_ready_devs
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xeae74760	scsi_nl_send_transport_msg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xf5dc2a81	sdev_evt_send_simple
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xf81f4561	scsi_schedule_eh
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x2e629ef5	scsi_host_put_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x55aeba28	scsi_tgt_it_nexus_create
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x7553d302	scsi_tgt_tsk_mgmt_request
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x8e231de0	scsi_tgt_cmd_to_host
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x953d0401	scsi_tgt_alloc_queue
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xa0afe24b	scsi_tgt_queue_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xcb9a44d5	scsi_host_get_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xe83d7e30	scsi_tgt_it_nexus_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xe9b81eda	scsi_tgt_free_queue
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x15c2c07e	iscsi_free_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x1fda800c	iscsi_destroy_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x3047bb8e	iscsi_destroy_conn
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x3b4407dc	iscsi_add_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x4f328f6e	iscsi_unregister_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x576365b5	iscsi_create_conn
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x617ef8fb	iscsi_block_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x65370d4f	iscsi_create_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x696e16a2	iscsi_offload_mesg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x7d224421	iscsi_session_chkready
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x8b3cf84f	iscsi_destroy_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xac70f058	iscsi_create_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xb0312d0f	iscsi_scan_finished
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xc75520a0	iscsi_alloc_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xc8df2521	iscsi_recv_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xcb69669d	iscsi_unblock_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xcbcc31ac	iscsi_conn_error_event
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xcce18572	iscsi_host_for_each_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xe0e12a5f	iscsi_session_event
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xe52ffc01	iscsi_lookup_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xf047e62a	iscsi_register_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xf8b788d9	iscsi_remove_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0x0ef06974	spi_populate_ppr_msg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xa0c71dac	spi_populate_sync_msg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xcffa2aff	spi_populate_width_msg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x0e189145	srp_remove_host
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x12cc0e18	srp_release_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x359d9091	srp_rport_add
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x3ab99ab0	srp_attach_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x497a9c25	srp_rport_del
+EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0x4b144b06	pciserial_resume_ports
+EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0x51f67edf	pciserial_init_ports
+EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0x789e47ac	pciserial_suspend_ports
+EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0xac27b8d4	pciserial_remove_ports
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x41e0ad20	spi_bitbang_start
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x4a315d72	spi_bitbang_setup_transfer
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xa42a3bae	spi_bitbang_transfer
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xc308327e	spi_bitbang_setup
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xcdcac6f9	spi_bitbang_cleanup
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xcee07ffe	spi_bitbang_stop
+EXPORT_SYMBOL_GPL drivers/uio/uio 0x44597fe5	__uio_register_device
+EXPORT_SYMBOL_GPL drivers/uio/uio 0x47fb9502	uio_event_notify
+EXPORT_SYMBOL_GPL drivers/uio/uio 0xdd7fa7fa	uio_unregister_device
+EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0xaff5d26f	usbatm_usb_probe
+EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0xf9e1cf17	usbatm_usb_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x00a27160	usb_get_from_anchor
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x0101f5d2	usb_kill_anchored_urbs
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x08b5e86f	usb_reset_endpoint
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x092196b0	usb_unlink_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x0f2501a4	usb_anchor_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x11f657a4	usb_put_dev
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x16a29b30	usb_sg_init
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x18a18f00	usb_driver_set_configuration
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x19a304ba	usb_disabled
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x20e37bc0	usb_hub_clear_tt_buffer
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x250def72	usb_unanchor_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x2fc82869	usb_get_current_frame_number
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x30798895	usb_hcd_giveback_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x376e31bb	usb_reset_configuration
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x3be89d3c	usb_register_notify
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x435711ac	usb_hcd_pci_shutdown
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x4ca61464	usb_hcd_link_urb_to_ep
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x4d88b234	usb_submit_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x4fc87875	usb_interrupt_msg
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x511f184c	usb_register_dev
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x51c55229	usb_ep0_reinit
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x52d378b1	usb_get_dev
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x55818ad8	usb_match_id
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x5c30a841	usb_free_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x67bc01ef	usb_poison_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x6d0a91e4	usb_queue_reset_device
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x6e283573	ehci_cf_port_reset_rwsem
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x6e2d1c51	usb_register_driver
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x7a800098	usb_buffer_free
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x7c4ce4bf	usb_unlink_anchored_urbs
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x7e64181d	usb_calc_bus_time
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x7ee8d935	usb_hcd_pci_probe
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x83c9d302	usb_get_intf
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x84d84b31	usb_driver_claim_interface
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x8562dc0c	usb_driver_release_interface
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x88cccd43	usb_buffer_map_sg
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x88e143e5	usb_unpoison_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x8992a53a	usb_hcd_pci_remove
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x8a807e79	usb_alloc_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x90966dc8	usb_match_one_id
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x91911fdc	usb_set_interface
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x93812d6e	usb_remove_hcd
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x9454080a	usb_bulk_msg
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x95c1bf34	usb_poison_anchored_urbs
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x96a0e119	usb_control_msg
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x9924c496	__usb_get_extra_descriptor
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x99301946	usb_hcd_unlink_urb_from_ep
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x9d40eaf0	usb_sg_cancel
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x9d8a3829	usb_altnum_to_altsetting
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x9e4f3109	usb_get_descriptor
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x9f11f9ba	usb_buffer_unmap_sg
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xa011fae2	usb_kill_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xa1390014	usb_wait_anchor_empty_timeout
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xa99dbcfd	usb_add_hcd
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xace5c0fc	usb_bus_list
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xaefd530e	usb_string
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xb0a7566e	usb_get_status
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xb3061608	usb_lock_device_for_reset
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xbfb9a2ca	usb_debug_root
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xc17515d7	usb_hcds_loaded
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xc17585c7	usb_get_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xc24acc80	usb_deregister_dev
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xc315de2a	usb_store_new_id
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xc3d976b0	usb_clear_halt
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xc3fca094	usb_deregister_device_driver
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xc82119fe	usb_bus_list_lock
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xc85dedc7	usb_anchor_empty
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xcb8844de	usb_init_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xcd53acae	usb_deregister
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xcf7e3a39	usb_create_hcd
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xcff0634b	usb_put_hcd
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xd53e0ed2	usb_reset_device
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xd77c3fc1	usb_hcd_check_unlink_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xda0c7899	usb_put_intf
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xdccede6d	usb_ifnum_to_if
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xdeb4bbb2	usb_hc_died
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xe11b0fdb	usb_buffer_alloc
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xe39748cb	usb_unpoison_anchored_urbs
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xe4e3c581	usb_hcd_poll_rh_status
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xe60dfe4c	usb_find_interface
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xe8a3747b	usb_hcd_platform_shutdown
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xe9587909	usb_unregister_notify
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xec704b19	usb_register_device_driver
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xecca7fde	usb_sg_wait
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xf3ce0669	usb_scuttle_anchored_urbs
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xf3e789fc	usb_get_hcd
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xf7007e3a	usb_mon_register
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xfab0e7f3	usb_set_device_state
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xfed11ed1	usb_mon_deregister
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x061ed06d	usb_ftdi_elan_read_pcimem
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x0e5f17ef	usb_ftdi_elan_edset_empty
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x1957c0d4	usb_ftdi_elan_write_pcimem
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x2b58e8ec	usb_ftdi_elan_edset_input
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x31d19faa	ftdi_elan_gone_away
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x9401cf6c	usb_ftdi_elan_edset_output
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xa019b0ac	usb_ftdi_elan_edset_setup
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xb3390ef7	usb_ftdi_elan_edset_flush
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xe3a05d0c	usb_ftdi_elan_edset_single
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x03f759c9	usb_serial_generic_open
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x13b74c5f	ezusb_set_reset
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x15103c50	usb_serial_generic_resubmit_read_urb
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x27de0fe3	usb_serial_generic_resume
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x3fdb3fb0	usb_serial_handle_sysrq_char
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x43bcaf6c	usb_serial_probe
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x443335c6	usb_serial_handle_break
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x57a96c62	usb_serial_register
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x64596022	usb_serial_deregister
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x72e9069c	usb_serial_generic_read_bulk_callback
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x9f0c44b9	usb_serial_generic_write_bulk_callback
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xbcaa7bb6	ezusb_writememory
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xbd26d9c7	usb_serial_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xbd404ccc	usb_serial_handle_dcd_change
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xc2f546ce	usb_serial_generic_write
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xff57e3ae	usb_serial_port_softint
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x08a4d09b	usb_stor_access_xfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x0be13004	usb_storage_usb_ids
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x11d15501	usb_stor_probe1
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x15d85dd7	usb_stor_probe2
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1a7b0afc	usb_stor_clear_halt
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1aa5ed01	usb_stor_CB_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1bc3edc2	usb_stor_sense_invalidCDB
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1e4bfcec	usb_stor_transparent_scsi_command
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x27dbbcc7	usb_stor_Bulk_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x3615154d	fill_inquiry_response
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x4208f1b1	usb_stor_CB_transport
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x4422faf1	usb_usual_ignore_device
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x590bbe07	usb_stor_post_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x6064ba0f	usb_stor_control_msg
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x70dfbee8	usb_stor_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x90ab703a	usb_stor_pre_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xa1fb71ee	usb_stor_bulk_srb
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xa32999fd	usb_stor_set_xfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xb1f050b2	usb_stor_bulk_transfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xdeb4fcd2	usb_stor_bulk_transfer_sg
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xdfca7c08	usb_stor_Bulk_transport
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xeaf4e6bf	usb_stor_ctrl_transfer
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x075a350e	wa_urb_dequeue
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x237ebca2	rpipe_ep_disable
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x2de49a99	wa_urb_enqueue
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x5b0fc154	wa_urb_enqueue_run
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x8668d134	rpipe_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xb070900e	wa_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xf389bf6b	__wa_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x02eff49b	wusbhc_rh_resume
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x09e5469e	wusbhc_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x0bb6bf5e	wusb_cluster_id_get
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x2543f5fa	wusbhc_rh_start_port_reset
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x404ec678	wusbhc_b_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x53f10067	wusbhc_mmcie_rm
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x5b882323	__wusb_dev_get_by_usb_dev
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x60050037	wusbhc_giveback_urb
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x6358d673	wusbhc_reset_all
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x9e5f1ce6	wusbhc_rh_control
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xa8da09e7	wusbhc_mmcie_set
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb725d128	wusb_cluster_id_put
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xbda8f19c	wusbhc_rh_status_data
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xc273d81a	wusbhc_b_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xc327808f	wusbhc_rh_suspend
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xc36911fa	wusbhc_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xdf6e4f08	wusb_dev_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xe0fd7f37	wusbhc_chid_set
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xe4729ea0	wusbhc_handle_dn
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf770a6b4	wusbd
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xfe2e17d7	wusb_et_name
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x945f961a	i1480_fw_upload
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0xcb61f042	i1480_rceb_check
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0xd3b53bd9	i1480_cmd
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x503d45e7	uwb_phy_rate_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x54b7cb3f	uwb_pca_base_priority_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x74e4cc16	uwb_rts_cts_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x7c1972b7	uwb_pca_base_priority_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x8a72d1c3	uwb_ack_policy_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xcbb0e378	uwb_phy_rate_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xcd823341	uwb_rts_cts_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xfc13e3fa	uwb_ack_policy_store
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x1a7d6268	umc_device_create
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x2984e195	umc_device_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x44540d9d	umc_device_register
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x99c453d1	umc_driver_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xa4ce6786	__umc_driver_register
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xb03db483	umc_controller_reset
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xc58ef485	umc_bus_type
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xd426b4e5	umc_match_pci_id
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0550c2c9	uwb_pal_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0d973e67	uwb_rc_alloc
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x11d0f351	uwb_rsv_destroy
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x16fca6e6	uwb_rc_post_reset
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x17df280f	uwb_pal_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x17eb317f	uwb_rsv_create
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x3369132d	uwb_dev_for_each
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x33fee928	uwb_rsv_get_usable_mas
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x3551cef1	uwb_notifs_deregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x431e27cb	uwb_rc_neh_grok
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4341e531	uwb_rc_reset_all
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4af3180f	uwb_rc_put
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4d57ae3c	uwb_rsv_type_str
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x53610d38	uwb_est_find_size
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x58a6a456	uwb_rc_ie_add
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x59359207	uwb_notifs_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6b9377c5	uwb_ie_next
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x86573bdb	uwb_rsv_accept
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x88780e0e	uwb_radio_stop
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x8b988075	uwb_rc_ie_rm
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x8cb42db6	__uwb_addr_print
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x98413234	uwb_rsv_state_str
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x9c2ab801	uwb_rsv_terminate
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x9e430614	uwb_rc_dev_addr_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x9ecabe1b	__uwb_rc_try_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa35685f8	uwb_rc_neh_error
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa60d2e93	uwb_rc_cmd
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xaf647e2c	uwb_pal_init
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb51efb1a	uwb_rc_mac_addr_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xbd33aaa1	uwb_rc_get_by_dev
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xc8bfe94b	uwb_rc_init
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xcb6d4706	uwb_radio_start
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd1e5b808	uwb_rc_get_by_grandpa
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd2cd758a	uwb_rc_pre_reset
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd434aad2	uwb_rc_rm
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xdb71adbc	uwb_rsv_modify
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe026aba8	uwb_rc_cmd_async
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe062cef3	uwb_rc_vcmd
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xeb4cab9a	uwb_est_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf0488203	uwb_dev_try_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf7ca313a	uwb_est_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xfab90866	uwb_rc_add
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xfc0a382c	uwb_rsv_establish
+EXPORT_SYMBOL_GPL drivers/uwb/whci 0x94a43ca8	whci_wait_for
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x06330e27	wlp_wss_activate_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x08482a59	wlp_dev_prim_OUI_sub_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x19ccdb22	wlp_remove
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x1b82d7f1	wlp_dev_prim_subcat_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x31c2671d	wlp_dev_model_name_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x3902cbb5	wlp_receive_frame
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x424773a9	wlp_eda_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x43316fdc	wlp_uuid_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x46143f18	wlp_wss_setup
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x4a73c09b	wlp_dev_model_name_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x5c3e8472	wlp_dev_model_nr_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x63d1dfa8	wlp_dev_manufacturer_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x63fa68ad	wlp_eda_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x6bfb07f4	wlp_prepare_tx_frame
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x6fca9e7a	wlp_reset_all
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x7af66f57	wlp_dev_name_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x88c6d73b	wlp_dev_serial_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x908d79a5	wlp_setup
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xa363b3fa	wlp_dev_manufacturer_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xa396775e	wlp_uuid_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xb444cb8c	wlp_dev_prim_subcat_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xb5d7cea3	wlp_dev_serial_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xc4c98cf8	wlp_dev_prim_category_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xcc37b9ad	wlp_dev_name_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xcf52bf35	wlp_dev_prim_category_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xdc9910e4	wlp_dev_prim_OUI_sub_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xe4a24daa	wlp_wss_activate_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xe9d05a75	wlp_wss_remove
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xeeb2b669	wlp_dev_model_nr_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xf19df817	wlp_neighborhood_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xf277273b	wlp_dev_prim_OUI_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xf8a96cf6	wlp_dev_prim_OUI_show
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x1db8f64d	ili9320_shutdown
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x300e30ed	ili9320_write_regs
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x56c5e63e	ili9320_write
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x601c4203	ili9320_probe_spi
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x8bb129c8	ili9320_remove
+EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0x1adabd4d	fb_sys_write
+EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0xa3bdc88d	fb_sys_read
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x224dcdb6	w1_touch_block
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x3470c06e	w1_next_pullup
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x474b6c6c	w1_write_8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x4f1279c2	w1_read_8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x569434d3	w1_write_block
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x79a3d62b	w1_reset_select_slave
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x7c2f2afb	w1_calc_crc8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x7ed6fea8	w1_reset_bus
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xd8dd292c	w1_read_block
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x028e474a	dlm_posix_get
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x0864c4a4	dlm_new_lockspace
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x19d94a07	dlm_posix_lock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x7306506f	dlm_posix_unlock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x9321df95	dlm_lock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xcf9f3328	dlm_release_lockspace
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xdc583c08	dlm_unlock
+EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0x6c320807	exportfs_decode_fh
+EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0xb3bf3a95	exportfs_encode_fh
+EXPORT_SYMBOL_GPL fs/fat/fat 0x044fa7fc	fat_flush_inodes
+EXPORT_SYMBOL_GPL fs/fat/fat 0x33535b02	fat_fill_super
+EXPORT_SYMBOL_GPL fs/fat/fat 0x36c7ff90	fat_free_clusters
+EXPORT_SYMBOL_GPL fs/fat/fat 0x521094dd	fat_add_entries
+EXPORT_SYMBOL_GPL fs/fat/fat 0x56b808b0	fat_detach
+EXPORT_SYMBOL_GPL fs/fat/fat 0x6e3c6b05	fat_setattr
+EXPORT_SYMBOL_GPL fs/fat/fat 0x7ae91c2c	fat_sync_inode
+EXPORT_SYMBOL_GPL fs/fat/fat 0x8234c9fc	fat_get_dotdot_entry
+EXPORT_SYMBOL_GPL fs/fat/fat 0x87e1c503	fat_alloc_new_dir
+EXPORT_SYMBOL_GPL fs/fat/fat 0x8f1239f4	fat_fs_error
+EXPORT_SYMBOL_GPL fs/fat/fat 0x98a5c430	fat_attach
+EXPORT_SYMBOL_GPL fs/fat/fat 0x9ff5c35d	fat_getattr
+EXPORT_SYMBOL_GPL fs/fat/fat 0xc5b77c80	fat_build_inode
+EXPORT_SYMBOL_GPL fs/fat/fat 0xd66f0beb	fat_time_unix2fat
+EXPORT_SYMBOL_GPL fs/fat/fat 0xe22e192f	fat_dir_empty
+EXPORT_SYMBOL_GPL fs/fat/fat 0xec36f2c9	fat_scan
+EXPORT_SYMBOL_GPL fs/fat/fat 0xfd4a8f41	fat_search_long
+EXPORT_SYMBOL_GPL fs/fat/fat 0xffa0bc46	fat_remove_entries
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x17ce645d	locks_end_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x1a618932	nlmsvc_unlock_all_by_ip
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x3b043c77	nlmclnt_done
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x43424f36	nlmclnt_init
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x6f959b35	locks_in_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x8ba85c1d	nlmsvc_ops
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x96877ac4	locks_start_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xa7b91a7b	lockd_down
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xcd7de660	nlmsvc_unlock_all_by_sb
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xe80fbb44	nlmclnt_proc
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xf6933c48	lockd_up
+EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0x81b2747d	nfsacl_encode
+EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0xa5f96000	nfsacl_decode
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1b89c6ee	o2hb_fill_node_map
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1d747ce3	o2hb_check_node_heartbeating
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x36418553	o2net_send_message
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x3f29cb0a	o2nm_get_node_by_num
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x47f5117a	o2nm_get_node_by_ip
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x4900035b	o2hb_stop_all_regions
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x521e0726	o2net_send_message_vec
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x6ac7a365	o2nm_node_put
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x81a17396	mlog_and_bits
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x86609413	o2hb_setup_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x90f497a5	o2hb_register_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa82a8645	o2nm_this_node
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa87bc9e7	o2nm_configured_node_map
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xae808bac	o2net_register_handler
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xb463df7e	o2hb_unregister_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xbaeb4700	o2hb_check_node_heartbeating_from_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xd60f2c6c	o2hb_check_local_node_heartbeating
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf1a5611d	o2net_unregister_handler_list
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf2ac64a2	o2nm_node_get
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf56c2017	mlog_not_bits
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x0a816b65	dlm_unregister_domain
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x1837d105	dlmlock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x3026be3d	dlm_register_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x408b07ac	dlm_register_domain
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x42eda2f0	dlmunlock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x7a1211f8	dlm_setup_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xacbbb3f9	dlm_print_one_lock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd7ba575e	dlm_errmsg
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd8fa57a6	dlm_unregister_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xfb86b96f	dlm_errname
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0562c415	ocfs2_cluster_this_node
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x06379db6	ocfs2_dlm_lvb_valid
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0e27f909	ocfs2_dlm_lock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x21db5b88	ocfs2_cluster_disconnect
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4a1f6fe9	ocfs2_cluster_connect
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4d3af7fa	ocfs2_cluster_hangup
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x5f24da1e	ocfs2_plock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x690218e7	ocfs2_stack_glue_unregister
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x81c85a68	ocfs2_dlm_lock_status
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x91fab465	ocfs2_dlm_lvb
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x963932a3	ocfs2_stack_glue_set_locking_protocol
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xa7d5c1c0	ocfs2_dlm_unlock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xb9ee861d	ocfs2_stack_glue_register
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xbbc4ef97	ocfs2_stack_supports_plocks
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xd066711e	ocfs2_dlm_dump_lksb
+EXPORT_SYMBOL_GPL lib/lzo/lzo_compress 0x2e1d43cf	lzo1x_1_compress
+EXPORT_SYMBOL_GPL lib/lzo/lzo_decompress 0x2a1538ca	lzo1x_decompress_safe
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x300d7e57	free_rs
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x6fbb3bd9	init_rs_non_canonical
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xabda1e2e	decode_rs16
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xb050f329	init_rs
+EXPORT_SYMBOL_GPL net/802/garp 0x67a8a958	garp_request_join
+EXPORT_SYMBOL_GPL net/802/garp 0x744e80e2	garp_init_applicant
+EXPORT_SYMBOL_GPL net/802/garp 0x8c2ffeea	garp_uninit_applicant
+EXPORT_SYMBOL_GPL net/802/garp 0x99b64b0e	garp_register_application
+EXPORT_SYMBOL_GPL net/802/garp 0xabfbd3f6	garp_request_leave
+EXPORT_SYMBOL_GPL net/802/garp 0xec7b55fe	garp_unregister_application
+EXPORT_SYMBOL_GPL net/802/stp 0x9560a10d	stp_proto_register
+EXPORT_SYMBOL_GPL net/802/stp 0x98064f8f	stp_proto_unregister
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x0cdda124	dccp_rcv_state_process
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x164bbb0a	dccp_setsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x1915a97b	inet_dccp_listen
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x1d99d49a	dccp_timestamp
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x26f345cb	compat_dccp_setsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x2b54a91d	dccp_make_response
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x2ddc2f4f	dccp_sendmsg
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x361a0494	dccp_sync_mss
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x3a22085e	dccp_send_sync
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x3b1cc11a	dccp_done
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x3bbc1d33	dccp_send_ack
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x3bf2cabc	dccp_destroy_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x3c3545f5	dccp_parse_options
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x3df7b7cd	dccp_ioctl
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x427bd317	dccp_poll
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x4cdd391d	dccp_feat_list_purge
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x56ea266a	dccp_state_name
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x66e6751c	dccp_insert_option_elapsed_time
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x67e55f7e	dccp_disconnect
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x774274b6	dccp_check_req
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x7d1bd9bb	dccp_child_process
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x86be7924	dccp_packet_name
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x8b7d8caf	dccp_statistics
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x90b9d53b	dccp_orphan_count
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x9210f93b	dccp_insert_option
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x999ecc23	dccp_hashinfo
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xa15edcaf	dccp_death_row
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xa57a2cb5	dccp_shutdown
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xa57cb872	dccp_reqsk_init
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xaf3c2359	dccp_connect
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xaf742ee7	dccp_rcv_established
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xaf832683	dccp_recvmsg
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xbd8e0812	dccp_getsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xc0b0c4cd	dccp_set_state
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xc7abfbfe	dccp_insert_option_timestamp
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xc885e5bb	dccp_reqsk_send_ack
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xc8f88b5c	dccp_close
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xdef8be34	dccp_init_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xe8622a2d	dccp_create_openreq_child
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xeb8e7037	dccp_ctl_make_reset
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xf4195d9f	compat_dccp_getsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x33e25656	dccp_invalid_packet
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x3b3c62f4	dccp_v4_request_recv_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x4d02ea16	dccp_v4_connect
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x6d15edeb	dccp_v4_do_rcv
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xa0c5a612	dccp_v4_send_check
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xf63f6d2f	dccp_v4_conn_request
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0x6d40a921	need_ipv4_conntrack
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0xae0580a7	nf_nat_seq_adjust_hook
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_defrag_ipv4 0x6b6c3d10	nf_defrag_ipv4_enable
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x07ae60b6	nf_nat_proto_in_range
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x0c777535	nf_nat_proto_find_get
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x0d69ae35	nf_nat_proto_range_to_nlattr
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x2b4a7c50	nf_nat_proto_unique_tuple
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x4a513381	nf_nat_proto_put
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x94a08134	nf_nat_proto_nlattr_to_range
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x9c7cc257	nf_nat_get_offset
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xad39b85d	nf_nat_icmp_reply_translation
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xd93be466	nf_nat_packet
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat_proto_gre 0x636b12c8	nf_nat_need_gre
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x20d46f81	tcp_vegas_init
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x297e0e84	tcp_vegas_cwnd_event
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x3908ae75	tcp_vegas_pkts_acked
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x62e08287	tcp_vegas_state
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xf70a6744	tcp_vegas_get_info
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x08a3e5d1	net_ipv6_ctl_path
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x325fc0ce	ip6_dst_blackhole
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x38c92588	inet6_csk_search_req
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x74b78ace	inet6_destroy_sock
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x7be9436b	ipv6_opt_accepted
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x81a0318f	inet6_csk_addr2sockaddr
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x85478a0b	inet6_hash_frag
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x8a2e7349	inet6_csk_reqsk_queue_hash_add
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x8cac4516	ip6_sk_dst_lookup
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xabb5931c	ip6_local_out
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xac2b06f2	inet6_csk_xmit
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xcc517f21	ip6_dst_lookup
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xdf3f3cbd	inet6_csk_bind_conflict
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xe2c90b82	fl6_sock_lookup
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xec792b67	ipv6_find_tlv
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xeff58719	inet6_sk_rebuild_header
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xf22973e2	ipv6_dup_options
+EXPORT_SYMBOL_GPL net/mac80211/mac80211 0x8cefa72b	ieee80211_iterate_active_interfaces_atomic
+EXPORT_SYMBOL_GPL net/mac80211/mac80211 0x97266602	ieee80211_iterate_active_interfaces
+EXPORT_SYMBOL_GPL net/netfilter/ipvs/ip_vs 0xe6476b4a	net_vs_ctl_path
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x045072cd	nf_ct_port_nla_policy
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x084adc00	nf_ct_l3protos
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x09404e28	nf_conntrack_l4proto_tcp4
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x11c70ed8	nf_ct_delete_from_lists
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x1388364e	nf_conntrack_lock
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x1a8a3df1	nf_conntrack_register_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x1f5cccfe	nf_conntrack_alloc
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x20cdf412	__nf_conntrack_helper_find_byname
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x26f16a69	__nf_conntrack_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x2a350259	nf_ct_insert_dying_list
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3133394d	nf_ct_get_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x33614983	nf_ct_unlink_expect
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x34c0200f	nf_conntrack_event_cb
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x34e5c954	print_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3609a6f7	__nf_ct_l4proto_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3b762caa	nf_conntrack_l4proto_tcp6
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3bd59ba7	nf_conntrack_helper_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3f5b1415	nf_ct_port_nlattr_to_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x45322a07	nf_ct_expect_register_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x46b66cef	nf_ct_port_tuple_to_nlattr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4b9065a9	nf_ct_alloc_hashtable
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4d69d135	__nf_ct_kill_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4de4f52f	nf_conntrack_hash_insert
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4e03b77f	nf_conntrack_helper_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4ea09fe8	nf_ct_extend_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x504f4211	nf_ct_nat_offset
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5085162f	nf_ct_expect_alloc
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x55199a92	nf_ct_l3proto_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5645bce9	nfnetlink_parse_nat_setup_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5882ba33	nf_conntrack_set_hashsize
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5b446e96	__nf_conntrack_confirm
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6180d258	nf_ct_invert_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x62813e5c	nf_ct_port_nlattr_tuple_size
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x63a91d1d	nf_ct_expect_unregister_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6929a4ab	nf_conntrack_l3proto_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6e224a7a	need_conntrack
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x78f9b710	nf_ct_l3proto_try_module_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x794c3f19	seq_print_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x80a1a3ab	nf_ct_get_tuplepr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8508a6d1	nf_ct_expect_init
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8a778c88	nf_conntrack_in
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8ffe7e89	nf_conntrack_htable_size
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x90ff6c9f	nf_ct_invert_tuplepr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x91db8b53	nf_conntrack_flush_report
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x933ee44f	nf_conntrack_l4proto_udp6
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x958a1078	nf_ct_l3proto_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x963cedd5	nf_expect_event_cb
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x98f5e774	nf_conntrack_unregister_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x990db82e	nf_conntrack_l3proto_generic
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9af3f6c1	nf_ct_free_hashtable
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xa0c47820	nf_conntrack_l3proto_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xa10886cd	nf_conntrack_l4proto_udp4
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xa6be298d	nf_ct_expect_related_report
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb602c57e	nf_ct_l3proto_module_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb81c3748	nf_conntrack_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xba99a84a	nf_conntrack_untracked
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xbb305fa0	nf_ct_extend_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xbd09d710	nf_ct_iterate_cleanup
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc18ac88d	nf_ct_expect_hsize
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc7402569	nf_ct_deliver_cached_events
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xcb9afb30	nf_conntrack_free
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xce8deeb9	nf_conntrack_tuple_taken
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xcfb4096a	__nf_ct_expect_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xd19c3b35	nf_ct_expect_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xd6213e18	nf_conntrack_l4proto_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xd78a0ae4	nf_ct_unexpect_related
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xdaea5ef9	nf_ct_expect_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xdd694694	nf_conntrack_alter_reply
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xe3989faa	nf_conntrack_l4proto_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xe8a39756	__nf_ct_refresh_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xedddb39d	nf_ct_remove_expectations
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf38bcdf3	nf_conntrack_max
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf9c2780a	nf_ct_helper_ext_add
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xfaf08a70	__nf_ct_try_assign_helper
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_amanda 0x8a62205c	nf_nat_amanda_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_ftp 0xf9899195	nf_nat_ftp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x03b153aa	set_ras_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x1efc8dbc	set_h225_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x26596fcc	nat_t120_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x3c672b01	nat_h245_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x4471134b	nat_q931_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x53272aed	nat_rtp_rtcp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x91d839a8	nat_callforwarding_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xa2a2e013	set_h245_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xc6fc67b6	set_sig_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xec134245	get_h225_addr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_irc 0xa7ea8323	nf_nat_irc_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x1e139a6b	nf_nat_pptp_hook_expectfn
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x9134d7be	nf_nat_pptp_hook_inbound
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x9a4b5185	nf_nat_pptp_hook_outbound
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0xd15ed00c	nf_nat_pptp_hook_exp_gre
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_proto_gre 0x0f2f81c1	nf_ct_gre_keymap_destroy
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_proto_gre 0x5310b885	nf_ct_gre_keymap_add
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x185c52da	nf_nat_sip_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x36c92fa3	ct_sip_parse_header_uri
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x4479e379	ct_sip_parse_numerical_param
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x4a02b03a	nf_nat_sdp_media_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x651edcd6	nf_nat_sdp_session_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x7526edc3	nf_nat_sip_expect_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x9049d746	ct_sip_parse_request
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x92b0c0cf	ct_sip_parse_address_param
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xb950881b	ct_sip_get_header
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xc0ecb5e1	nf_nat_sdp_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xeb5aaf8c	ct_sip_get_sdp_header
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xefb253f6	nf_nat_sdp_port_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_tftp 0x045cfa9b	nf_nat_tftp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_tproxy_core 0x58af07ae	nf_tproxy_assign_sock
+EXPORT_SYMBOL_GPL net/netfilter/nf_tproxy_core 0xd29b6c41	nf_tproxy_get_sock_v4
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x1f58e71b	nfnl_lock
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x2a9ef967	nfnetlink_subsys_register
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x3895cd7a	nfnl_unlock
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x835016a9	nfnetlink_unicast
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xcf037dc9	nfnetlink_subsys_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xd41fd1d9	nfnetlink_send
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xeca95329	nfnetlink_has_listeners
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xef9b4bbd	nfnetlink_set_err
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink_log 0xb826b425	nfulnl_log_packet
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x04c93706	xt_compat_match_offset
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x1304da37	xt_register_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x161d1417	xt_compat_unlock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x28e2013f	xt_compat_match_from_user
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x2dbdb5e4	xt_compat_target_offset
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x3755249b	xt_compat_match_to_user
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x40728a63	xt_find_revision
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x4c7d16d5	xt_check_target
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x4fbeafb4	xt_check_match
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x5e6e6f56	xt_request_find_target
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x5f82f1f7	xt_compat_flush_offsets
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x684694c5	xt_compat_add_offset
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x6f9aa2fb	xt_compat_calc_jump
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x81f66dad	xt_compat_target_to_user
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x92ba32ab	xt_table_unlock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xb840b8d9	xt_unregister_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xc32d7267	per_cpu__xt_info_locks
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xcd8db781	xt_proto_fini
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xd8412c80	xt_proto_init
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xe0b4971b	xt_compat_lock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xe3b48cff	xt_find_table_lock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xee622649	xt_compat_target_from_user
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xf8edd4a4	xt_replace_table
+EXPORT_SYMBOL_GPL net/rds/rds 0x00a467af	rds_wq
+EXPORT_SYMBOL_GPL net/rds/rds 0x1f438b07	rds_conn_destroy
+EXPORT_SYMBOL_GPL net/rds/rds 0x2c5c5514	rds_message_add_rdma_dest_extension
+EXPORT_SYMBOL_GPL net/rds/rds 0x2d05a167	rds_trans_register
+EXPORT_SYMBOL_GPL net/rds/rds 0x3101936e	rds_message_add_extension
+EXPORT_SYMBOL_GPL net/rds/rds 0x34eaca1b	rds_page_copy_user
+EXPORT_SYMBOL_GPL net/rds/rds 0x3aa103df	rds_connect_complete
+EXPORT_SYMBOL_GPL net/rds/rds 0x502e882e	rds_send_get_message
+EXPORT_SYMBOL_GPL net/rds/rds 0x504af318	rds_cong_map_updated
+EXPORT_SYMBOL_GPL net/rds/rds 0x551cd9a0	rds_for_each_conn_info
+EXPORT_SYMBOL_GPL net/rds/rds 0x574f3469	rds_message_unmapped
+EXPORT_SYMBOL_GPL net/rds/rds 0x6c616ffb	rds_conn_create_outgoing
+EXPORT_SYMBOL_GPL net/rds/rds 0x6ff4d14d	rds_rdma_send_complete
+EXPORT_SYMBOL_GPL net/rds/rds 0x73aac73d	rds_message_populate_header
+EXPORT_SYMBOL_GPL net/rds/rds 0x784c70b4	rds_conn_drop
+EXPORT_SYMBOL_GPL net/rds/rds 0x81ee4b9b	rds_inc_addref
+EXPORT_SYMBOL_GPL net/rds/rds 0x8c362c91	rds_info_deregister_func
+EXPORT_SYMBOL_GPL net/rds/rds 0x918109ac	rds_message_put
+EXPORT_SYMBOL_GPL net/rds/rds 0x9b3e6113	per_cpu__rds_stats
+EXPORT_SYMBOL_GPL net/rds/rds 0xa4a856c3	rds_trans_unregister
+EXPORT_SYMBOL_GPL net/rds/rds 0xb2f89ccc	rds_info_copy
+EXPORT_SYMBOL_GPL net/rds/rds 0xc2da8e38	rds_stats_info_copy
+EXPORT_SYMBOL_GPL net/rds/rds 0xdd001cdd	rds_message_addref
+EXPORT_SYMBOL_GPL net/rds/rds 0xded17eac	rds_send_drop_acked
+EXPORT_SYMBOL_GPL net/rds/rds 0xe50e0878	rds_info_register_func
+EXPORT_SYMBOL_GPL net/rds/rds 0xee17a164	rds_inc_put
+EXPORT_SYMBOL_GPL net/rds/rds 0xefa075b6	rds_inc_init
+EXPORT_SYMBOL_GPL net/rds/rds 0xf040a12d	rds_conn_create
+EXPORT_SYMBOL_GPL net/rds/rds 0xf42f26cd	rds_recv_incoming
+EXPORT_SYMBOL_GPL net/rxrpc/af-rxrpc 0x04c62377	rxrpc_unregister_security
+EXPORT_SYMBOL_GPL net/rxrpc/af-rxrpc 0xcc2ccf9e	rxrpc_register_security
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x00c52ef5	g_make_token_header
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x32a1da13	gss_mech_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x5baf64e5	gss_svc_to_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x5f30112c	gss_pseudoflavor_to_service
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x8658585c	gss_mech_get_by_name
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x8b1ecb2a	gss_mech_put
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x8d1a827e	svcauth_gss_register_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xa42ae920	gss_mech_register
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xaac35174	gss_mech_get_by_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xadae5286	gss_service_to_auth_domain_name
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xb2099e2f	svcauth_gss_flavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xb5dea7ef	g_token_size
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xb73268f9	svc_gss_principal
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xf55f58d7	gss_mech_get
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xf8b2ff6e	g_verify_token_header
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x023a896d	xdr_encode_word
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x04ec2d4f	svc_create_pooled
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x05e807a9	xdr_encode_string
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x065994f1	xdr_encode_opaque_fixed
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x068fec9b	read_bytes_from_xdr_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x08a87586	auth_unix_forget_old
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x08e707f2	rpc_call_async
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x09d15477	rpc_delay
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0a0e086c	cache_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0aecbcf1	rpcauth_generic_bind_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0b37def5	rpcauth_init_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0cc804e1	rpc_alloc_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0dc43d57	rpc_print_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0efcda21	rpc_pton
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0f668ba9	svc_auth_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0f9f69da	rpc_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x12e280e3	svc_proc_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x15bee381	rpc_put_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1ab59804	auth_domain_put
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1ae0d8d0	rpc_exit_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1b5c9c77	xdr_read_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1d4a0e1c	svc_sock_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1e932700	xdr_reserve_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x210b2caf	rpc_unlink
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x218dd5c4	svc_wake_up
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x23634576	svc_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x24ebefd6	xdr_encode_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x25682031	rpc_force_rebind
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2834007a	svc_proc_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2919b156	xdr_decode_string_inplace
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2aa17774	rpc_free_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2ba8d327	sunrpc_cache_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2c26ac6e	xdr_process_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2ca6be99	rpc_queue_upcall
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2dd4a950	rpc_destroy_wait_queue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2e527bc1	xprt_write_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2eec63c9	xdr_encode_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x31a89d59	rpc_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x32a819cc	xdr_buf_subsegment
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3418273b	svc_sock_names
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x347537b9	auth_domain_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x352d7578	sunrpc_cache_pipe_upcall
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3753f434	xprt_update_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3b1afa47	svc_sock_update_bufs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3b1ffc48	unix_domain_find
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3be1628a	xdr_inline_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3c43d05c	svc_xprt_init
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3d5b50d1	svc_drop
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3d605f07	cache_check
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x432c9ef6	rpc_sleep_on
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x44a5f733	svc_set_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x488c6d7f	svc_auth_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4911bf02	rpc_peeraddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4aa60608	xdr_enter_page
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4bc2b737	xprt_set_retrans_timeout_def
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4c11e52e	xdr_skb_read_bits
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4ca21b15	svc_xprt_names
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x512b1816	svc_xprt_received
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x53445f68	nlm_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x540c2402	sunrpc_cache_register_pipefs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5497fb0e	rpc_restart_call_prepare
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x55b1d652	xprt_wake_pending_tasks
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5691fd23	auth_unix_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x574874ee	svc_reserve
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5864742b	__rpc_wait_for_completion_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x58c6ed0b	rpcauth_init_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5b14ec1a	rpc_put_mount
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5bd26000	rpc_proc_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5c1dfa00	auth_domain_find
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5ea60728	xdr_partial_copy_from_skb
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x62174f7f	xdr_buf_from_iov
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x675524ec	rpc_sockaddr2uaddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x676c5fbf	svc_xprt_enqueue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6921dd96	xprt_set_retrans_timeout_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6c5304c5	rpcb_getport_sync
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6c843fea	xprt_adjust_cwnd
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6cc7fc47	xprt_release_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6d739b09	xprt_wait_for_buffer_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6dc0a5b7	rpc_get_mount
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6eea229d	svcauth_unix_purge
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6f1ac6ca	rpc_shutdown_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6f8e5e80	rpc_run_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x71fa908a	cache_flush
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7231219c	rpc_ntop
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x739a93a6	svc_unreg_xprt_class
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x73d884ce	rpc_wake_up_status
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7401b36b	xdr_decode_array2
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x74259285	rpc_wake_up_queued_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x775adaf6	rpc_uaddr2sockaddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x776b9519	rpc_killall_tasks
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x77f41e34	rpcauth_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x78c570b9	xdr_init_encode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7b0afc02	xdr_inline_decode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7de53067	rpc_init_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x80cda217	sunrpc_cache_update
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x82ac3898	rpc_lookup_machine_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x82fc2e96	svc_create_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x86c5d301	xdr_write_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8841d7e2	rpc_wake_up_next
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x891d7aa6	svc_set_num_threads
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x895aad21	rpc_setbufsize
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8b3da652	xprt_release_xprt_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8b6909dc	svc_find_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8bbe3ca6	rpcauth_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8db3e5b2	cache_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9371d478	svc_sock_destroy
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9559eea5	svc_destroy
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9703bb16	svc_reg_xprt_class
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x97117b15	rpc_init_wait_queue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9b4adaa3	xprt_reserve_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9e9c6a2a	rpc_proc_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9ee36aa3	svc_xprt_copy_addrs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa09f3f17	put_rpccred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa1886a67	rpc_max_payload
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa2f5b290	xprt_release_rqst_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa40d900c	svc_authenticate
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa425d79c	xprt_reserve_xprt_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa533c599	rpc_wake_up
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa53e167a	xprt_disconnect_done
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xaa509d1d	xdr_encode_array2
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xabd6606f	rpc_lookup_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xac99fabe	xdr_init_decode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xacaf8c1c	rpc_mkpipe
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xaf5bf6ef	nfs_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb0f16da4	rpc_peeraddr2str
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb19510eb	rpcb_getport_async
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb21d69f4	sunrpc_cache_unregister_pipefs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb34c25e1	xdr_decode_word
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb3adda6e	rpc_bind_new_program
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb9371a46	svc_addsock
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbf9d1b96	nfsd_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc12435e3	rpc_calc_rto
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc376b715	xprt_unregister_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc3880471	xdr_decode_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc8be33d8	rpc_call_null
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc8e96dea	qword_addhex
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xca3da587	rpc_call_start
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcbda4ee4	svc_print_addr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcc1089d4	rpc_restart_call
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcc5f5075	xprt_lookup_rqst
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xccb1bf6d	svc_max_payload
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcee467f3	xprt_load_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd03dc7c3	csum_partial_copy_to_xdr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd0481802	xprt_complete_rqst
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd1dba94d	auth_unix_add_addr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd2d6bdcc	svc_prepare_thread
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd4dcd2bb	svc_close_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd65899d5	svc_recv
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd850d279	rpc_malloc
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd915bc20	svc_exit_thread
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdbdc6273	svc_process
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdc3e777a	rpcauth_lookup_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdcd47680	cache_purge
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdd34396c	rpc_call_sync
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe4ad3a89	svc_seq_show
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe5919cb1	xdr_encode_opaque
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe9206bb9	rpcauth_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe97f4ce5	qword_get
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xedcf6be4	qword_add
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xeeacab69	rpc_update_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf22d1d3a	xdr_buf_read_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf2448250	svc_xprt_put
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf27f723e	rpc_clone_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf4010f0a	xdr_shift_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf44868fd	xprt_register_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf9d1164c	rpc_free
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfc65a604	rpcauth_destroy_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfd9a7a05	svcauth_unix_set_client
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x085a9d4e	wimax_msg
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x4203645a	wimax_msg_alloc
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x45a0e72e	wimax_msg_data_len
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x5c0918ae	wimax_state_get
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x7c88547c	wimax_msg_send
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x82d02a83	wimax_report_rfkill_hw
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x82e0ee97	wimax_dev_rm
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x885da9cc	wimax_report_rfkill_sw
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x97a0f469	wimax_msg_data
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xbe88c0fc	wimax_dev_init
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xc46f7fb5	wimax_state_change
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xdc1e06b3	wimax_msg_len
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xe6b31167	wimax_dev_add
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x0faa3f13	cfg80211_wext_siwfrag
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x255b1ff9	cfg80211_wext_siwtxpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x3ae946b9	cfg80211_wext_siwscan
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x3fe0099a	cfg80211_wext_siwencode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x4beecda2	cfg80211_wext_giwfrag
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x59d270fb	cfg80211_wext_giwpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x5b9682ca	cfg80211_wireless_stats
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x5cfea0dc	cfg80211_wext_giwretry
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x60c51baf	cfg80211_wext_siwmlme
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x68ee2a2b	cfg80211_wext_giwessid
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x6d332704	cfg80211_wext_giwap
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x6dfa2dee	cfg80211_wext_siwap
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x7d244af9	cfg80211_wext_siwgenie
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x918d4117	cfg80211_wext_giwencode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x943e9d41	cfg80211_wext_giwfreq
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x9476065c	cfg80211_wext_siwauth
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xa0638105	cfg80211_wext_siwrate
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xa52b04d5	cfg80211_wext_siwencodeext
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xba1fa56a	cfg80211_wext_siwrts
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xc16dcff1	cfg80211_wext_giwmode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xcc6d60e3	cfg80211_wext_giwname
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xd032f4ed	cfg80211_wext_giwauth
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xd3719e30	cfg80211_wext_giwtxpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xd4ccedc3	cfg80211_wext_siwessid
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xd4e15f2d	cfg80211_wext_siwfreq
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xdb810f40	cfg80211_wext_giwrange
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xdc863f8a	cfg80211_wext_giwscan
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xe0dc6734	cfg80211_wext_siwretry
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xe2415d22	cfg80211_wext_siwmode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xe42773b4	cfg80211_wext_giwrate
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xe5f0b713	cfg80211_wext_siwpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xfac06706	cfg80211_wext_giwrts
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x15bd7367	ipcomp_output
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x55309881	ipcomp_init_state
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x7bcdbfa2	ipcomp_destroy
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0xd385b120	ipcomp_input
+EXPORT_SYMBOL_GPL sound/core/snd-pcm 0xa286a234	snd_pcm_format_name
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x066b8396	snd_hda_detach_beep_device
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x093f9ee9	snd_hda_queue_unsol_event
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0949ed66	snd_hda_input_mux_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1098297e	snd_hda_codec_write
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1688f6f3	snd_hda_check_board_codec_sid_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1cf90921	snd_hda_bind_sw
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1db71dfa	snd_hda_mixer_bind_ctls_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x205c7f8d	snd_hda_create_spdif_out_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x25fa18d5	snd_hda_power_up
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2a328337	snd_hda_codec_setup_stream
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2cd7e5a3	snd_hda_codec_get_pincfg
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2d557084	snd_hda_mixer_amp_switch_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x305afb34	snd_hda_multi_out_analog_prepare
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x32bf04bc	snd_hda_ctl_add
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x398ce8b0	snd_hda_mixer_amp_switch_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3b20dcee	snd_hda_codec_set_pincfg
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3b8c809c	snd_hda_multi_out_analog_open
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3bd569b2	snd_hda_get_sub_nodes
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3c1591c4	snd_hda_find_mixer_ctl
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3d3e8690	snd_hda_check_amp_list_power
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3d4e7e36	snd_hda_build_pcms
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3dc99416	snd_hda_ch_mode_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4356f8e3	snd_hda_codec_write_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x44ab952f	snd_hda_mixer_bind_ctls_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4cef8052	snd_hda_get_bool_hint
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x50720d1b	snd_hda_mixer_bind_ctls_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5ae76f73	auto_pin_cfg_labels
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5b9b1f0f	snd_hda_power_down
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x603697f3	snd_hda_get_connections
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x60906065	snd_hda_mixer_amp_switch_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x64fc046e	snd_hda_ch_mode_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6858940f	snd_hda_sequence_write_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x716e9bb3	snd_hda_ch_mode_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7367698e	snd_hda_mixer_bind_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x73b20493	snd_hda_multi_out_dig_cleanup
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x79da84b0	snd_hda_create_spdif_share_sw
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7cdf647f	snd_hda_codec_amp_stereo
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7f5679f9	snd_hda_codec_resume_amp
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x823a726b	snd_hda_add_new_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x85add1e7	snd_hda_mixer_bind_switch_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x86d48ce0	snd_hda_mixer_amp_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x908fda87	snd_hda_mixer_amp_volume_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x93610a72	snd_hda_parse_pin_def_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x97943f9c	snd_hda_codec_configure
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x997539cb	snd_hda_sequence_write
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x99b846b1	snd_hda_get_hint
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9a8e1877	snd_array_free
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9b90d24d	snd_hda_codec_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9bf09744	query_amp_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa1406874	snd_hda_attach_beep_device
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa2827d76	snd_hda_get_jack_location
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa42fb446	snd_hda_create_spdif_in_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa696fdfa	snd_hda_set_vmaster_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xad87613e	snd_print_pcm_rates
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb4c904ab	snd_hda_multi_out_dig_open
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb6dba79d	snd_hda_codec_amp_update
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbe7dd7dc	snd_array_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbea3c8f9	snd_hda_codec_amp_read
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc22623e7	snd_hda_build_controls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc2c7a0fc	snd_hda_multi_out_analog_cleanup
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc34a54c6	snd_hda_calc_stream_format
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc652fd69	snd_hda_get_jack_connectivity
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc87734bb	snd_hda_multi_out_dig_prepare
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc91e7bbd	snd_hda_multi_out_dig_close
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc9935252	snd_hda_mixer_amp_volume_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcb301b6e	snd_hda_get_jack_type
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcce27eb0	snd_hda_input_mux_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd35b574d	snd_hda_codec_resume_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd7df5db8	snd_hda_add_vmaster
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xda784ec8	snd_hda_codec_read
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xdc3e24e1	snd_hda_bind_vol
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xdcb15932	snd_hda_mixer_bind_switch_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xdd4aca66	snd_hda_mixer_amp_volume_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xde642c78	snd_hda_query_pin_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe0b54a42	snd_hda_codec_cleanup_stream
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe2283eca	snd_hda_override_amp_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe9fcf8af	snd_hda_add_codec_preset
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xed85264c	snd_hda_delete_codec_preset
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeda3a721	snd_print_pcm_bits
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeffc1f27	snd_hda_load_patch
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf0449dad	snd_hda_is_supported_format
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf117c4ae	snd_hda_check_board_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xfdded4d9	snd_hda_bus_new
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1836 0x06b2f293	ad1836_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1836 0x5ac63dc6	soc_codec_dev_ad1836
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1938 0x7cf9772d	soc_codec_dev_ad1938
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1938 0xf012937d	ad1938_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0x36f9dd26	ad73311_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0x6c2e8964	soc_codec_dev_ad73311
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4104 0x046698e2	soc_codec_device_ak4104
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0xa0bf8b2e	ak4535_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0xba378b7d	soc_codec_dev_ak4535
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4642 0xe28ca4d1	soc_codec_dev_ak4642
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4642 0xf69282fb	ak4642_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0x0fea7552	soc_codec_device_cs4270
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0x62ed4f4a	cs4270_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-l3 0x78c84c7e	l3_write
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-max9877 0x3994c4c8	max9877_add_controls
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0x29be2228	pcm3008_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0x7638d35e	soc_codec_dev_pcm3008
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-spdif 0x456ecc4e	dit_stub_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0x7d8dd695	soc_codec_dev_ssm2602
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0x80590ab1	ssm2602_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0x992eb921	soc_codec_dev_tlv320aic23
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0xa6b2441e	tlv320aic23_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0x62abf224	aic26_soc_codec_dev
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0x6bc6fa19	aic26_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x030f239f	aic3x_set_gpio
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x459f00ea	aic3x_headset_detected
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x4aaa60c2	aic3x_get_gpio
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xbc4ec9aa	aic3x_set_headset_detection
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xbe10621e	soc_codec_dev_aic3x
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xcd6bcd54	aic3x_button_pressed
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xf8e39ab1	aic3x_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0x3bcf517e	twl4030_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0xd2005e9d	soc_codec_dev_twl4030
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda134x 0x13b83898	soc_codec_dev_uda134x
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x220204f1	soc_codec_dev_uda1380
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x898f24a9	uda1380_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0x757206d5	wm_hubs_spkmix_tlv
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0xb8b9327a	wm_hubs_add_analogue_controls
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0xdd56bd39	wm_hubs_add_analogue_routes
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x56aa9ba9	wm8350_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0xa316535c	wm8350_hp_jack_detect
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0xe8b69ee4	soc_codec_dev_wm8350
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x0e57bd17	wm8400_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x73aa64b6	soc_codec_dev_wm8400
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0xca84866f	wm8510_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0xd3630cbe	soc_codec_dev_wm8510
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8523 0x7df8ee5c	wm8523_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8523 0xfa08e124	soc_codec_dev_wm8523
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0xdcb23731	soc_codec_dev_wm8580
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0xe890da8d	wm8580_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0x551a19e2	wm8728_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0xb3f5f064	soc_codec_dev_wm8728
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x63f5211a	soc_codec_dev_wm8731
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0xd462439e	wm8731_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x7ceea501	wm8750_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x7e636ce9	soc_codec_dev_wm8750
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0x2f10b504	wm8753_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0x554e3f2a	soc_codec_dev_wm8753
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8776 0x2bbd1f01	soc_codec_dev_wm8776
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8776 0x9a4dc093	wm8776_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0x3b5c9894	wm8900_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0x9877d931	soc_codec_dev_wm8900
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0xb35a8af2	soc_codec_dev_wm8903
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0xbdc8ea3a	wm8903_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0x9f7e71ed	soc_codec_dev_wm8940
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0xcf13bc87	wm8940_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0x588cadae	wm8960_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0x9cfaa583	soc_codec_dev_wm8960
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8961 0x85e194c2	soc_codec_dev_wm8961
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8961 0x93d07e0b	wm8961_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0x35a775bf	wm8971_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0x8423fef5	soc_codec_dev_wm8971
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8974 0x656ae40c	wm8974_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8974 0xf9540ab0	soc_codec_dev_wm8974
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0x5ebd0281	soc_codec_dev_wm8988
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0xe4e0549e	wm8988_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0x97a6e2be	soc_codec_dev_wm8990
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0xaec4dd47	wm8990_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8993 0x2850afe9	wm8993_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8993 0xbc8bb17d	soc_codec_dev_wm8993
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0xcbdb0a3e	wm9081_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0xcf17dff2	soc_codec_dev_wm9081
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x011064ab	snd_soc_dai_set_clkdiv
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x03fbffd0	snd_soc_new_pcms
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0ea4610a	snd_soc_init_card
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x10ad62f1	snd_soc_dai_digital_mute
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x176d35ef	snd_soc_unregister_dais
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x18f64336	snd_soc_dai_set_tdm_slot
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1c325550	snd_soc_dapm_get_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x205e3491	snd_soc_dapm_put_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x28a0ea1e	snd_soc_dai_set_pll
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2ebf44fa	snd_soc_jack_report
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x35ac8b3c	snd_soc_jack_add_gpios
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x38c39672	snd_soc_get_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3ca46677	snd_soc_codec_volatile_register
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x40e4dd54	snd_soc_get_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x42921397	snd_soc_dai_set_fmt
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x44b65be2	snd_soc_info_volsw_ext
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x45fa7f49	snd_soc_dapm_stream_event
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x47e5291e	snd_soc_info_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x485dc774	snd_soc_dapm_nc_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4cc142ef	snd_soc_update_bits
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x50fc6bfd	snd_soc_unregister_platform
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5325e056	snd_soc_free_ac97_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x58994ecc	snd_soc_dapm_get_pin_status
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x59089a0a	snd_soc_jack_add_pins
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x59bf2ecb	snd_soc_put_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5c39202d	snd_soc_info_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5d5df542	snd_soc_new_ac97_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5ed39fd9	snd_soc_dapm_put_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x612851d2	dapm_reg_event
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6d40c229	snd_soc_jack_new
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6dfcc262	snd_soc_info_enum_ext
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x70032e8c	snd_soc_dapm_add_routes
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7436fd46	snd_soc_test_bits
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8b5ceea2	snd_soc_dapm_enable_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8cd4f2cc	snd_soc_info_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x90dc7a1d	snd_soc_free_pcms
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9229a3fb	snd_soc_dapm_new_controls
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x956f1e8c	snd_soc_get_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x99ab4429	snd_soc_dai_set_tristate
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9c137466	snd_soc_get_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa008db5a	snd_soc_put_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa1f4b242	snd_soc_add_controls
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa5268bd9	snd_soc_dapm_put_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa77ee8cd	snd_soc_cnew
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xae5ddf27	snd_soc_unregister_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xaf70220d	snd_soc_register_dai
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb16682a2	snd_soc_dapm_get_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb1f3fc87	snd_soc_dai_set_sysclk
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb28c019e	snd_soc_dapm_get_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb34e6fc4	snd_soc_dapm_new_widgets
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb74f0b39	snd_soc_dapm_new_control
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb8427cee	snd_soc_dapm_sync
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb8c54f8c	snd_soc_register_platform
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xbc7d7846	snd_soc_dapm_get_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc81e5979	snd_soc_put_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd3eee1f3	snd_soc_put_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd49c0835	snd_soc_put_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd557c937	snd_soc_codec_set_cache_io
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd9da6bc9	snd_soc_register_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xdd8bc67e	snd_soc_jack_free_gpios
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xdffe25cc	snd_soc_dapm_free
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xe0850f02	snd_soc_info_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xe15d6f3f	snd_soc_dapm_disable_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xe9eea2b9	snd_soc_set_runtime_hwparams
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf3cedd1c	snd_soc_dapm_info_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xfcf635d6	snd_soc_unregister_dai
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xfd799caf	snd_soc_get_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xfe9b1737	snd_soc_dapm_put_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xff54119e	snd_soc_register_dais
+EXPORT_SYMBOL_GPL vmlinux 0x000262c3	blkcipher_walk_virt
+EXPORT_SYMBOL_GPL vmlinux 0x00566d8f	inotify_get_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x00650cf1	blocking_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x006f9ece	kallsyms_on_each_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x00b8ecf8	__iowrite32_copy
+EXPORT_SYMBOL_GPL vmlinux 0x00f23478	kick_process
+EXPORT_SYMBOL_GPL vmlinux 0x016b9869	xfrm_calg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0x016e185b	ring_buffer_lock_reserve
+EXPORT_SYMBOL_GPL vmlinux 0x01a4ea6d	unregister_die_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x01b6a9af	input_ff_create
+EXPORT_SYMBOL_GPL vmlinux 0x01e6013a	scatterwalk_done
+EXPORT_SYMBOL_GPL vmlinux 0x01f5d6fc	unregister_pernet_subsys
+EXPORT_SYMBOL_GPL vmlinux 0x020d80e6	input_event_from_user
+EXPORT_SYMBOL_GPL vmlinux 0x025215cc	fib_rules_cleanup_ops
+EXPORT_SYMBOL_GPL vmlinux 0x02687087	user_read
+EXPORT_SYMBOL_GPL vmlinux 0x027ba732	ring_buffer_write
+EXPORT_SYMBOL_GPL vmlinux 0x0343bdf1	__i2c_board_list
+EXPORT_SYMBOL_GPL vmlinux 0x03c21b94	ring_buffer_iter_empty
+EXPORT_SYMBOL_GPL vmlinux 0x03e482e6	pci_create_slot
+EXPORT_SYMBOL_GPL vmlinux 0x03fe14fc	ahash_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0x04069b1d	set_irq_nested_thread
+EXPORT_SYMBOL_GPL vmlinux 0x04486e88	rcu_batches_completed
+EXPORT_SYMBOL_GPL vmlinux 0x04c0f13d	crypto_destroy_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x04ea8706	__iowrite64_copy
+EXPORT_SYMBOL_GPL vmlinux 0x0521c712	nf_unregister_queue_handlers
+EXPORT_SYMBOL_GPL vmlinux 0x0533f83a	blk_rq_err_bytes
+EXPORT_SYMBOL_GPL vmlinux 0x054e550b	kernel_halt
+EXPORT_SYMBOL_GPL vmlinux 0x05b42e60	crypto_mod_put
+EXPORT_SYMBOL_GPL vmlinux 0x05e08185	hrtimer_try_to_cancel
+EXPORT_SYMBOL_GPL vmlinux 0x0619ca8a	getboottime
+EXPORT_SYMBOL_GPL vmlinux 0x062da966	inet_twsk_schedule
+EXPORT_SYMBOL_GPL vmlinux 0x062f527f	srcu_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x064db9a5	mark_mounts_for_expiry
+EXPORT_SYMBOL_GPL vmlinux 0x0689e1bf	rtc_class_open
+EXPORT_SYMBOL_GPL vmlinux 0x06a9e71f	class_compat_register
+EXPORT_SYMBOL_GPL vmlinux 0x06d7ae25	rtc_set_time
+EXPORT_SYMBOL_GPL vmlinux 0x074bdb3c	crypto_unregister_ahash
+EXPORT_SYMBOL_GPL vmlinux 0x0790662d	sync_filesystem
+EXPORT_SYMBOL_GPL vmlinux 0x07ab0c8f	__blk_end_request_err
+EXPORT_SYMBOL_GPL vmlinux 0x07b52e38	rtnl_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x07d31ae8	crypto_ablkcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0x07e363d7	device_move
+EXPORT_SYMBOL_GPL vmlinux 0x0837d948	klist_iter_init_node
+EXPORT_SYMBOL_GPL vmlinux 0x0886c06c	regulator_count_voltages
+EXPORT_SYMBOL_GPL vmlinux 0x08899deb	led_trigger_store
+EXPORT_SYMBOL_GPL vmlinux 0x08c0f760	fuse_direct_io
+EXPORT_SYMBOL_GPL vmlinux 0x08d8708f	cancel_work_sync
+EXPORT_SYMBOL_GPL vmlinux 0x091d2dc3	raw_seq_next
+EXPORT_SYMBOL_GPL vmlinux 0x091eb9b4	round_jiffies
+EXPORT_SYMBOL_GPL vmlinux 0x0945312c	__module_text_address
+EXPORT_SYMBOL_GPL vmlinux 0x0953694e	tty_mode_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x096b7847	ip_build_and_send_pkt
+EXPORT_SYMBOL_GPL vmlinux 0x096da79e	ring_buffer_size
+EXPORT_SYMBOL_GPL vmlinux 0x097cce5b	xfrm_output_resume
+EXPORT_SYMBOL_GPL vmlinux 0x09da890f	relay_open
+EXPORT_SYMBOL_GPL vmlinux 0x09ec9485	class_for_each_device
+EXPORT_SYMBOL_GPL vmlinux 0x09ef84ed	alloc_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0x0a4b7b97	crypto_shash_final
+EXPORT_SYMBOL_GPL vmlinux 0x0a733f9c	map_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0x0a76d56d	anon_inode_getfile
+EXPORT_SYMBOL_GPL vmlinux 0x0abf3717	class_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x0b07abe2	unshare_fs_struct
+EXPORT_SYMBOL_GPL vmlinux 0x0b3131d5	inet_csk_listen_stop
+EXPORT_SYMBOL_GPL vmlinux 0x0b4cefb5	pci_stop_bus_device
+EXPORT_SYMBOL_GPL vmlinux 0x0bf862aa	dm_path_uevent
+EXPORT_SYMBOL_GPL vmlinux 0x0c068934	pcr_ops
+EXPORT_SYMBOL_GPL vmlinux 0x0c2cdbf1	synchronize_sched
+EXPORT_SYMBOL_GPL vmlinux 0x0c604d00	led_trigger_set
+EXPORT_SYMBOL_GPL vmlinux 0x0cb0517f	platform_driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x0cb66088	regulator_bulk_disable
+EXPORT_SYMBOL_GPL vmlinux 0x0cb88680	__tracepoint_block_rq_remap
+EXPORT_SYMBOL_GPL vmlinux 0x0d80b95a	device_for_each_child
+EXPORT_SYMBOL_GPL vmlinux 0x0daf74ca	disk_map_sector_rcu
+EXPORT_SYMBOL_GPL vmlinux 0x0db19a3b	led_trigger_register_simple
+EXPORT_SYMBOL_GPL vmlinux 0x0e022a69	lookup_instantiate_filp
+EXPORT_SYMBOL_GPL vmlinux 0x0e2ad49f	spi_new_device
+EXPORT_SYMBOL_GPL vmlinux 0x0e3124c4	ring_buffer_consume
+EXPORT_SYMBOL_GPL vmlinux 0x0e6e31b5	hwmon_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x0f3498de	fuse_dev_release
+EXPORT_SYMBOL_GPL vmlinux 0x0fd38769	ring_buffer_overrun_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x0fd90f8c	blk_queue_lld_busy
+EXPORT_SYMBOL_GPL vmlinux 0x10138352	tracing_on
+EXPORT_SYMBOL_GPL vmlinux 0x101c923e	__tracepoint_power_start
+EXPORT_SYMBOL_GPL vmlinux 0x10360280	skcipher_geniv_free
+EXPORT_SYMBOL_GPL vmlinux 0x108adee2	xfrm_audit_policy_add
+EXPORT_SYMBOL_GPL vmlinux 0x10da58b9	shmem_file_setup
+EXPORT_SYMBOL_GPL vmlinux 0x112d8680	platform_bus
+EXPORT_SYMBOL_GPL vmlinux 0x119af014	cpu_bit_bitmap
+EXPORT_SYMBOL_GPL vmlinux 0x11f447ce	__gpio_to_irq
+EXPORT_SYMBOL_GPL vmlinux 0x12321dfc	pci_find_ext_capability
+EXPORT_SYMBOL_GPL vmlinux 0x124f2056	crypto_get_attr_type
+EXPORT_SYMBOL_GPL vmlinux 0x1251d30f	call_rcu
+EXPORT_SYMBOL_GPL vmlinux 0x12aa7ec7	device_register
+EXPORT_SYMBOL_GPL vmlinux 0x13b2a946	register_keyboard_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x13dd7dbc	debugfs_create_symlink
+EXPORT_SYMBOL_GPL vmlinux 0x142dd488	regulator_get_mode
+EXPORT_SYMBOL_GPL vmlinux 0x14536b8d	crypto_init_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x1479a543	blk_queue_rq_timed_out
+EXPORT_SYMBOL_GPL vmlinux 0x149db923	selinux_string_to_sid
+EXPORT_SYMBOL_GPL vmlinux 0x14f64b92	crypto_grab_skcipher
+EXPORT_SYMBOL_GPL vmlinux 0x150d8a60	inet_csk_addr2sockaddr
+EXPORT_SYMBOL_GPL vmlinux 0x1521d2b2	xfrm_audit_policy_delete
+EXPORT_SYMBOL_GPL vmlinux 0x152ef267	sysfs_create_link
+EXPORT_SYMBOL_GPL vmlinux 0x15760314	key_type_user
+EXPORT_SYMBOL_GPL vmlinux 0x15892417	async_synchronize_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x1598dc9d	unregister_netevent_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x15c7f229	sk_setup_caps
+EXPORT_SYMBOL_GPL vmlinux 0x15e408da	crypto_hash_walk_done
+EXPORT_SYMBOL_GPL vmlinux 0x160ac68b	posix_timer_event
+EXPORT_SYMBOL_GPL vmlinux 0x16c52e3c	device_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x16c9ead7	rtc_irq_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x16dbd1de	crypto_init_ahash_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x16ee34d3	xfrm_audit_state_delete
+EXPORT_SYMBOL_GPL vmlinux 0x17cd9cd6	inet_csk_compat_setsockopt
+EXPORT_SYMBOL_GPL vmlinux 0x17e4b716	tcp_orphan_count
+EXPORT_SYMBOL_GPL vmlinux 0x18cc11cf	root_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x18ed61a5	do_kern_mount
+EXPORT_SYMBOL_GPL vmlinux 0x199ce082	each_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x19a88adb	relay_switch_subbuf
+EXPORT_SYMBOL_GPL vmlinux 0x19abf76a	pskb_put
+EXPORT_SYMBOL_GPL vmlinux 0x19b70ac1	perf_tp_event
+EXPORT_SYMBOL_GPL vmlinux 0x19c610b9	fuse_conn_kill
+EXPORT_SYMBOL_GPL vmlinux 0x19d6b4cc	led_trigger_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x1a0d8fb5	generic_fh_to_dentry
+EXPORT_SYMBOL_GPL vmlinux 0x1a173a31	debugfs_create_u32
+EXPORT_SYMBOL_GPL vmlinux 0x1a323362	__ftrace_vbprintk
+EXPORT_SYMBOL_GPL vmlinux 0x1a3fe449	inet_csk_get_port
+EXPORT_SYMBOL_GPL vmlinux 0x1a474901	tracepoint_probe_unregister_noupdate
+EXPORT_SYMBOL_GPL vmlinux 0x1a4cc1a3	ring_buffer_overruns
+EXPORT_SYMBOL_GPL vmlinux 0x1aa5cc45	__pci_reset_function
+EXPORT_SYMBOL_GPL vmlinux 0x1adc988d	attribute_container_classdev_to_container
+EXPORT_SYMBOL_GPL vmlinux 0x1b46a9b6	destroy_workqueue
+EXPORT_SYMBOL_GPL vmlinux 0x1b9aca3f	jprobe_return
+EXPORT_SYMBOL_GPL vmlinux 0x1c19e412	__atomic_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x1c3af716	execute_in_process_context
+EXPORT_SYMBOL_GPL vmlinux 0x1c852e7c	xfrm_calg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x1c87a811	__round_jiffies_up
+EXPORT_SYMBOL_GPL vmlinux 0x1c9f2fa3	register_ftrace_event
+EXPORT_SYMBOL_GPL vmlinux 0x1d6af584	platform_get_resource
+EXPORT_SYMBOL_GPL vmlinux 0x1d8f8059	__tracepoint_power_end
+EXPORT_SYMBOL_GPL vmlinux 0x1db21d74	__tracepoint_kfree_skb
+EXPORT_SYMBOL_GPL vmlinux 0x1db49e37	pci_block_user_cfg_access
+EXPORT_SYMBOL_GPL vmlinux 0x1dc51689	tty_get_pgrp
+EXPORT_SYMBOL_GPL vmlinux 0x1dee2629	trace_current_buffer_lock_reserve
+EXPORT_SYMBOL_GPL vmlinux 0x1e532bf7	vfs_removexattr
+EXPORT_SYMBOL_GPL vmlinux 0x1e7bbcb3	kernel_restart
+EXPORT_SYMBOL_GPL vmlinux 0x1e9a2592	tasklet_hrtimer_init
+EXPORT_SYMBOL_GPL vmlinux 0x1eb9516e	round_jiffies_relative
+EXPORT_SYMBOL_GPL vmlinux 0x1ebf6c2a	pci_power_names
+EXPORT_SYMBOL_GPL vmlinux 0x1efd19ec	i2c_add_numbered_adapter
+EXPORT_SYMBOL_GPL vmlinux 0x1f06cf79	find_module
+EXPORT_SYMBOL_GPL vmlinux 0x1fcece42	inet_twdr_twcal_tick
+EXPORT_SYMBOL_GPL vmlinux 0x1fe48b60	put_pid
+EXPORT_SYMBOL_GPL vmlinux 0x202123f5	dm_get_rq_mapinfo
+EXPORT_SYMBOL_GPL vmlinux 0x20bc3470	orderly_poweroff
+EXPORT_SYMBOL_GPL vmlinux 0x20ddef74	spi_busnum_to_master
+EXPORT_SYMBOL_GPL vmlinux 0x215db6e9	tracepoint_probe_register_noupdate
+EXPORT_SYMBOL_GPL vmlinux 0x21870e7d	tcp_reno_cong_avoid
+EXPORT_SYMBOL_GPL vmlinux 0x219760ff	__inet_lookup_listener
+EXPORT_SYMBOL_GPL vmlinux 0x219e1349	crypto_hash_walk_first
+EXPORT_SYMBOL_GPL vmlinux 0x21db5796	blkdev_aio_write
+EXPORT_SYMBOL_GPL vmlinux 0x22181c4f	k_handler
+EXPORT_SYMBOL_GPL vmlinux 0x225f65a1	regulator_get_current_limit
+EXPORT_SYMBOL_GPL vmlinux 0x2296c00d	crypto_attr_u32
+EXPORT_SYMBOL_GPL vmlinux 0x22da6f7c	rdev_get_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0x23864ce7	cpuset_mem_spread_node
+EXPORT_SYMBOL_GPL vmlinux 0x23b3ec7a	bsg_register_queue
+EXPORT_SYMBOL_GPL vmlinux 0x23eec149	crypto_shash_setkey
+EXPORT_SYMBOL_GPL vmlinux 0x24011d37	sock_prot_inuse_get
+EXPORT_SYMBOL_GPL vmlinux 0x24019a4e	crypto_dequeue_request
+EXPORT_SYMBOL_GPL vmlinux 0x2447533c	ktime_get_real
+EXPORT_SYMBOL_GPL vmlinux 0x24556783	blk_abort_queue
+EXPORT_SYMBOL_GPL vmlinux 0x24aea70a	driver_for_each_device
+EXPORT_SYMBOL_GPL vmlinux 0x24b479bd	debugfs_create_bool
+EXPORT_SYMBOL_GPL vmlinux 0x24c0d1d0	blk_trace_setup
+EXPORT_SYMBOL_GPL vmlinux 0x24e55104	sysdev_show_ulong
+EXPORT_SYMBOL_GPL vmlinux 0x24eb7e32	leds_list
+EXPORT_SYMBOL_GPL vmlinux 0x2538a629	blk_abort_request
+EXPORT_SYMBOL_GPL vmlinux 0x254c9666	blocking_notifier_chain_cond_register
+EXPORT_SYMBOL_GPL vmlinux 0x254f53f4	crypto_shash_finup
+EXPORT_SYMBOL_GPL vmlinux 0x2572293d	ring_buffer_free_read_page
+EXPORT_SYMBOL_GPL vmlinux 0x258b8bbd	sysfs_remove_link
+EXPORT_SYMBOL_GPL vmlinux 0x25a75dbf	crypto_alg_sem
+EXPORT_SYMBOL_GPL vmlinux 0x260c306f	device_rename
+EXPORT_SYMBOL_GPL vmlinux 0x26e9831a	bus_rescan_devices
+EXPORT_SYMBOL_GPL vmlinux 0x2708ae7e	inotify_find_watch
+EXPORT_SYMBOL_GPL vmlinux 0x279dd646	inet6_hash_connect
+EXPORT_SYMBOL_GPL vmlinux 0x27adf232	tracing_generic_entry_update
+EXPORT_SYMBOL_GPL vmlinux 0x27c7be71	regulator_get_exclusive
+EXPORT_SYMBOL_GPL vmlinux 0x2866ac7f	crypto_alloc_instance2
+EXPORT_SYMBOL_GPL vmlinux 0x288e4fb9	tty_ldisc_deref
+EXPORT_SYMBOL_GPL vmlinux 0x28aa305e	blk_queue_rq_timeout
+EXPORT_SYMBOL_GPL vmlinux 0x28d0a849	sysdev_show_int
+EXPORT_SYMBOL_GPL vmlinux 0x28d664ff	__raw_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x28e23139	xfrm_probe_algs
+EXPORT_SYMBOL_GPL vmlinux 0x2958338e	__wake_up_sync
+EXPORT_SYMBOL_GPL vmlinux 0x296388ac	bus_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x29922158	bus_sort_breadthfirst
+EXPORT_SYMBOL_GPL vmlinux 0x2a0d8296	device_create_vargs
+EXPORT_SYMBOL_GPL vmlinux 0x2a3be824	crypto_alloc_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x2af0a232	gpiochip_is_requested
+EXPORT_SYMBOL_GPL vmlinux 0x2af9cbce	__rtnl_link_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x2b13dd26	uhci_check_and_reset_hc
+EXPORT_SYMBOL_GPL vmlinux 0x2b70d61f	platform_device_register_simple
+EXPORT_SYMBOL_GPL vmlinux 0x2b9f8e23	nf_net_ipv4_netfilter_sysctl_path
+EXPORT_SYMBOL_GPL vmlinux 0x2ba40ae2	kset_create_and_add
+EXPORT_SYMBOL_GPL vmlinux 0x2bb36e90	attribute_container_register
+EXPORT_SYMBOL_GPL vmlinux 0x2bcaa8e3	flush_work
+EXPORT_SYMBOL_GPL vmlinux 0x2bcd239b	pci_find_next_capability
+EXPORT_SYMBOL_GPL vmlinux 0x2bfc4d7f	tracepoint_get_iter_range
+EXPORT_SYMBOL_GPL vmlinux 0x2c208607	power_supply_is_system_supplied
+EXPORT_SYMBOL_GPL vmlinux 0x2cd213fe	crypto_register_ahash
+EXPORT_SYMBOL_GPL vmlinux 0x2ce98559	kcrypto_wq
+EXPORT_SYMBOL_GPL vmlinux 0x2cf07f36	skb_morph
+EXPORT_SYMBOL_GPL vmlinux 0x2d171cda	sysdev_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x2dccc595	fib_rules_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x2ded24d4	page_cache_sync_readahead
+EXPORT_SYMBOL_GPL vmlinux 0x2df5b80a	fuse_put_request
+EXPORT_SYMBOL_GPL vmlinux 0x2e1660ea	pci_bus_add_device
+EXPORT_SYMBOL_GPL vmlinux 0x2e221b3e	netlink_has_listeners
+EXPORT_SYMBOL_GPL vmlinux 0x2e47f677	xfrm_aalg_get_byidx
+EXPORT_SYMBOL_GPL vmlinux 0x2e5716ee	enable_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0x2e81d225	add_page_wait_queue
+EXPORT_SYMBOL_GPL vmlinux 0x2ea5431a	bus_get_device_klist
+EXPORT_SYMBOL_GPL vmlinux 0x2ead7716	hrtimer_start
+EXPORT_SYMBOL_GPL vmlinux 0x2f06e640	inet_twsk_purge
+EXPORT_SYMBOL_GPL vmlinux 0x2f6c37aa	crypto_init_spawn2
+EXPORT_SYMBOL_GPL vmlinux 0x2fc06741	ring_buffer_record_disable
+EXPORT_SYMBOL_GPL vmlinux 0x305ab6aa	class_dev_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0x305de697	fuse_conn_put
+EXPORT_SYMBOL_GPL vmlinux 0x30f1b15b	bus_for_each_drv
+EXPORT_SYMBOL_GPL vmlinux 0x311c9f02	crypto_chain
+EXPORT_SYMBOL_GPL vmlinux 0x31522e95	transport_add_device
+EXPORT_SYMBOL_GPL vmlinux 0x31a67c6f	debugfs_create_u64
+EXPORT_SYMBOL_GPL vmlinux 0x31fc70dd	tty_put_char
+EXPORT_SYMBOL_GPL vmlinux 0x3233582f	blk_add_driver_data
+EXPORT_SYMBOL_GPL vmlinux 0x324cdb4b	relay_buf_full
+EXPORT_SYMBOL_GPL vmlinux 0x32d5e7fc	xfrm_aalg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x32f17454	ring_buffer_event_data
+EXPORT_SYMBOL_GPL vmlinux 0x32f240fe	sysfs_remove_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0x33025188	tcp_done
+EXPORT_SYMBOL_GPL vmlinux 0x339b6961	sysfs_schedule_callback
+EXPORT_SYMBOL_GPL vmlinux 0x33aa084a	file_ra_state_init
+EXPORT_SYMBOL_GPL vmlinux 0x33d3d9f8	rtc_read_alarm
+EXPORT_SYMBOL_GPL vmlinux 0x3404a8d1	user_match
+EXPORT_SYMBOL_GPL vmlinux 0x341a99c9	regulator_register
+EXPORT_SYMBOL_GPL vmlinux 0x34275124	trace_current_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0x342fc7da	transport_destroy_device
+EXPORT_SYMBOL_GPL vmlinux 0x3441c3d6	gpio_set_value_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x34d34734	devres_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x34e45a90	regulator_bulk_free
+EXPORT_SYMBOL_GPL vmlinux 0x3520b2e0	ahash_free_instance
+EXPORT_SYMBOL_GPL vmlinux 0x352adfb2	drop_file_write_access
+EXPORT_SYMBOL_GPL vmlinux 0x358d7e2f	dm_kill_unmapped_request
+EXPORT_SYMBOL_GPL vmlinux 0x359b2bf3	ring_buffer_reset_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x361e2bcc	save_stack_trace
+EXPORT_SYMBOL_GPL vmlinux 0x362e23ec	call_rcu_bh
+EXPORT_SYMBOL_GPL vmlinux 0x36a2b993	__i2c_board_lock
+EXPORT_SYMBOL_GPL vmlinux 0x3725b7a8	shash_ahash_digest
+EXPORT_SYMBOL_GPL vmlinux 0x376a130d	tty_encode_baud_rate
+EXPORT_SYMBOL_GPL vmlinux 0x377094aa	power_supply_class
+EXPORT_SYMBOL_GPL vmlinux 0x37ad4176	__tracepoint_block_bio_complete
+EXPORT_SYMBOL_GPL vmlinux 0x37baa3ad	mnt_drop_write
+EXPORT_SYMBOL_GPL vmlinux 0x37bee57f	pci_find_ht_capability
+EXPORT_SYMBOL_GPL vmlinux 0x37fb1625	set_task_ioprio
+EXPORT_SYMBOL_GPL vmlinux 0x382c0ed7	rtc_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x38886770	driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x38d1b8ba	crypto_register_template
+EXPORT_SYMBOL_GPL vmlinux 0x38db95cf	aead_geniv_free
+EXPORT_SYMBOL_GPL vmlinux 0x38ede830	sysdev_class_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x3950f4da	ring_buffer_read_finish
+EXPORT_SYMBOL_GPL vmlinux 0x397e9f19	regulator_enable
+EXPORT_SYMBOL_GPL vmlinux 0x3983a3cf	ring_buffer_record_enable
+EXPORT_SYMBOL_GPL vmlinux 0x3988fdd6	spi_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0x39c0ca72	transport_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x3a639c3c	crypto_alloc_ablkcipher
+EXPORT_SYMBOL_GPL vmlinux 0x3b418ebc	skb_tstamp_tx
+EXPORT_SYMBOL_GPL vmlinux 0x3ba1a99e	unregister_net_sysctl_table
+EXPORT_SYMBOL_GPL vmlinux 0x3bcebe81	kobject_uevent
+EXPORT_SYMBOL_GPL vmlinux 0x3be7af02	get_max_files
+EXPORT_SYMBOL_GPL vmlinux 0x3c0b560e	debugfs_rename
+EXPORT_SYMBOL_GPL vmlinux 0x3c428d8a	of_modalias_node
+EXPORT_SYMBOL_GPL vmlinux 0x3c687e27	inotify_dentry_parent_queue_event
+EXPORT_SYMBOL_GPL vmlinux 0x3c6c45ca	__tracepoint_power_frequency
+EXPORT_SYMBOL_GPL vmlinux 0x3cd06035	add_input_randomness
+EXPORT_SYMBOL_GPL vmlinux 0x3cfdfae5	trace_current_buffer_discard_commit
+EXPORT_SYMBOL_GPL vmlinux 0x3d202619	da903x_set_bits
+EXPORT_SYMBOL_GPL vmlinux 0x3d8fd9bb	class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x3df2e11c	__rtnl_register
+EXPORT_SYMBOL_GPL vmlinux 0x3e8142eb	inotify_init
+EXPORT_SYMBOL_GPL vmlinux 0x3ee2c899	driver_register
+EXPORT_SYMBOL_GPL vmlinux 0x3efb35c9	get_online_cpus
+EXPORT_SYMBOL_GPL vmlinux 0x3f0d19fb	ring_buffer_peek
+EXPORT_SYMBOL_GPL vmlinux 0x3f136a36	ring_buffer_discard_commit
+EXPORT_SYMBOL_GPL vmlinux 0x3f3177ec	register_pernet_device
+EXPORT_SYMBOL_GPL vmlinux 0x3f4e16c3	inet6_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x3f6ce160	rtc_set_alarm
+EXPORT_SYMBOL_GPL vmlinux 0x3f937cf4	register_kprobes
+EXPORT_SYMBOL_GPL vmlinux 0x3ffe2a54	register_kretprobes
+EXPORT_SYMBOL_GPL vmlinux 0x403ff92f	fb_deferred_io_cleanup
+EXPORT_SYMBOL_GPL vmlinux 0x40827c5f	fb_deferred_io_fsync
+EXPORT_SYMBOL_GPL vmlinux 0x4134ec00	da903x_writes
+EXPORT_SYMBOL_GPL vmlinux 0x413b650e	tty_perform_flush
+EXPORT_SYMBOL_GPL vmlinux 0x413e1e43	dm_send_uevents
+EXPORT_SYMBOL_GPL vmlinux 0x4187043d	get_driver
+EXPORT_SYMBOL_GPL vmlinux 0x41ad7533	inet_csk_reqsk_queue_prune
+EXPORT_SYMBOL_GPL vmlinux 0x41d127cb	rtc_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x41f1ae2b	ring_buffer_record_disable_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x41fa8f8b	class_interface_register
+EXPORT_SYMBOL_GPL vmlinux 0x420529ea	eventfd_signal
+EXPORT_SYMBOL_GPL vmlinux 0x42494cea	ring_buffer_event_length
+EXPORT_SYMBOL_GPL vmlinux 0x431deb2e	inet_csk_bind_conflict
+EXPORT_SYMBOL_GPL vmlinux 0x43264b4a	disk_part_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0x432fd7f6	__gpio_set_value
+EXPORT_SYMBOL_GPL vmlinux 0x43c0209a	inotify_inode_queue_event
+EXPORT_SYMBOL_GPL vmlinux 0x43dea370	pci_set_pcie_reset_state
+EXPORT_SYMBOL_GPL vmlinux 0x444f5d72	sysdev_register
+EXPORT_SYMBOL_GPL vmlinux 0x446642b6	rt_mutex_lock
+EXPORT_SYMBOL_GPL vmlinux 0x4484a5a4	wait_for_device_probe
+EXPORT_SYMBOL_GPL vmlinux 0x457594fa	crypto_alg_list
+EXPORT_SYMBOL_GPL vmlinux 0x459a22d0	regulator_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x45ae490b	fuse_do_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x45bf1ff3	crypto_inc
+EXPORT_SYMBOL_GPL vmlinux 0x4672e88b	__crypto_dequeue_request
+EXPORT_SYMBOL_GPL vmlinux 0x4692bfde	spi_register_master
+EXPORT_SYMBOL_GPL vmlinux 0x46b2e374	hrtimer_forward
+EXPORT_SYMBOL_GPL vmlinux 0x46b329ce	blk_lld_busy
+EXPORT_SYMBOL_GPL vmlinux 0x46d9b7df	__lock_page_killable
+EXPORT_SYMBOL_GPL vmlinux 0x47229b5c	gpio_request
+EXPORT_SYMBOL_GPL vmlinux 0x47b4ad1d	ahash_attr_alg
+EXPORT_SYMBOL_GPL vmlinux 0x480bd398	sysfs_update_group
+EXPORT_SYMBOL_GPL vmlinux 0x485e1fc2	add_timer_on
+EXPORT_SYMBOL_GPL vmlinux 0x48aea7af	platform_device_add
+EXPORT_SYMBOL_GPL vmlinux 0x48b66422	rtc_update_irq
+EXPORT_SYMBOL_GPL vmlinux 0x48e767a6	__class_register
+EXPORT_SYMBOL_GPL vmlinux 0x490db982	platform_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x492de706	part_round_stats
+EXPORT_SYMBOL_GPL vmlinux 0x497bd280	atomic_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x499043d3	crypto_init_queue
+EXPORT_SYMBOL_GPL vmlinux 0x49e31603	kernel_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x4b11a12f	class_compat_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x4b2ae7de	crypto_ahash_setkey
+EXPORT_SYMBOL_GPL vmlinux 0x4bd1c2e1	rtnl_kill_links
+EXPORT_SYMBOL_GPL vmlinux 0x4c759827	byte_rev_table
+EXPORT_SYMBOL_GPL vmlinux 0x4d4eecab	locks_release_private
+EXPORT_SYMBOL_GPL vmlinux 0x4d6994f4	crypto_lookup_template
+EXPORT_SYMBOL_GPL vmlinux 0x4d7cef74	crypto_attr_alg2
+EXPORT_SYMBOL_GPL vmlinux 0x4d8f4c15	klist_add_before
+EXPORT_SYMBOL_GPL vmlinux 0x4ea9bb2a	ring_buffer_read_start
+EXPORT_SYMBOL_GPL vmlinux 0x4f1972db	ring_buffer_read_page
+EXPORT_SYMBOL_GPL vmlinux 0x4fdcd026	spi_unregister_master
+EXPORT_SYMBOL_GPL vmlinux 0x5086ac3a	alg_test
+EXPORT_SYMBOL_GPL vmlinux 0x50e7193a	__i2c_first_dynamic_bus_num
+EXPORT_SYMBOL_GPL vmlinux 0x50f5e532	call_rcu_sched
+EXPORT_SYMBOL_GPL vmlinux 0x50fad434	round_jiffies_up
+EXPORT_SYMBOL_GPL vmlinux 0x51ad74d7	net_assign_generic
+EXPORT_SYMBOL_GPL vmlinux 0x51f21a05	led_trigger_unregister_simple
+EXPORT_SYMBOL_GPL vmlinux 0x51f6cec6	pci_ioremap_bar
+EXPORT_SYMBOL_GPL vmlinux 0x51fc5e09	power_supply_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x52630215	ring_buffer_iter_reset
+EXPORT_SYMBOL_GPL vmlinux 0x52a03897	da903x_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x52d111ea	pm_qos_update_requirement
+EXPORT_SYMBOL_GPL vmlinux 0x5324d04f	bstr_printf
+EXPORT_SYMBOL_GPL vmlinux 0x53614269	get_cpu_idle_time_us
+EXPORT_SYMBOL_GPL vmlinux 0x53986488	register_die_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x54042972	dm_underlying_device_busy
+EXPORT_SYMBOL_GPL vmlinux 0x540b5cdd	i2c_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x5453dc6e	crypto_ahash_type
+EXPORT_SYMBOL_GPL vmlinux 0x5460c8d8	fsnotify_get_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x547df0db	ring_buffer_normalize_time_stamp
+EXPORT_SYMBOL_GPL vmlinux 0x5488a9f6	debugfs_create_u16
+EXPORT_SYMBOL_GPL vmlinux 0x549525ef	handle_nested_irq
+EXPORT_SYMBOL_GPL vmlinux 0x5519c050	kill_pid_info_as_uid
+EXPORT_SYMBOL_GPL vmlinux 0x553cf6b8	da903x_clr_bits
+EXPORT_SYMBOL_GPL vmlinux 0x554bd211	unregister_pernet_device
+EXPORT_SYMBOL_GPL vmlinux 0x555bc3b0	console_drivers
+EXPORT_SYMBOL_GPL vmlinux 0x556e791e	device_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x557d20ed	rtc_read_time
+EXPORT_SYMBOL_GPL vmlinux 0x55ddc2c1	tcp_init_congestion_ops
+EXPORT_SYMBOL_GPL vmlinux 0x55f2580b	__alloc_percpu
+EXPORT_SYMBOL_GPL vmlinux 0x56310925	regulator_mode_to_status
+EXPORT_SYMBOL_GPL vmlinux 0x563fb5c8	__trace_bprintk
+EXPORT_SYMBOL_GPL vmlinux 0x566460bb	inet_ctl_sock_create
+EXPORT_SYMBOL_GPL vmlinux 0x56745d59	raw_hash_sk
+EXPORT_SYMBOL_GPL vmlinux 0x569caaf9	crypto_unregister_template
+EXPORT_SYMBOL_GPL vmlinux 0x56f3adc0	get_inotify_watch
+EXPORT_SYMBOL_GPL vmlinux 0x579e0bf5	rtnl_unregister_all
+EXPORT_SYMBOL_GPL vmlinux 0x57a0dff1	kobject_get_path
+EXPORT_SYMBOL_GPL vmlinux 0x57f17efc	crypto_register_shash
+EXPORT_SYMBOL_GPL vmlinux 0x581eeef3	task_active_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0x582e9654	skb_to_sgvec
+EXPORT_SYMBOL_GPL vmlinux 0x5879e91b	blkcipher_walk_phys
+EXPORT_SYMBOL_GPL vmlinux 0x588cfb8a	__inet_lookup_established
+EXPORT_SYMBOL_GPL vmlinux 0x5917b7c4	eventfd_ctx_put
+EXPORT_SYMBOL_GPL vmlinux 0x598d1c95	devres_close_group
+EXPORT_SYMBOL_GPL vmlinux 0x59d16e96	da903x_read
+EXPORT_SYMBOL_GPL vmlinux 0x59dae5ff	vfs_lock_file
+EXPORT_SYMBOL_GPL vmlinux 0x5a2842f5	d_materialise_unique
+EXPORT_SYMBOL_GPL vmlinux 0x5a7bfe41	crypto_probing_notify
+EXPORT_SYMBOL_GPL vmlinux 0x5a7f12b3	inet_csk_clone
+EXPORT_SYMBOL_GPL vmlinux 0x5a88324c	skcipher_geniv_exit
+EXPORT_SYMBOL_GPL vmlinux 0x5acf6804	atomic_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x5b06797b	inet_diag_register
+EXPORT_SYMBOL_GPL vmlinux 0x5b0be1e4	__fsnotify_inode_delete
+EXPORT_SYMBOL_GPL vmlinux 0x5b9445d6	crypto_shash_update
+EXPORT_SYMBOL_GPL vmlinux 0x5bac7788	register_jprobes
+EXPORT_SYMBOL_GPL vmlinux 0x5bc3e6c1	bus_for_each_dev
+EXPORT_SYMBOL_GPL vmlinux 0x5bc8c657	xfrm_audit_state_notfound_simple
+EXPORT_SYMBOL_GPL vmlinux 0x5bfc03c3	unregister_keyboard_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5c2314ae	mmput
+EXPORT_SYMBOL_GPL vmlinux 0x5c231e1d	sysfs_get_dirent
+EXPORT_SYMBOL_GPL vmlinux 0x5c2cf957	blk_trace_remove
+EXPORT_SYMBOL_GPL vmlinux 0x5c4c2bcc	tty_termios_encode_baud_rate
+EXPORT_SYMBOL_GPL vmlinux 0x5c519cc9	user_instantiate
+EXPORT_SYMBOL_GPL vmlinux 0x5c6c059d	power_supply_am_i_supplied
+EXPORT_SYMBOL_GPL vmlinux 0x5d0f6f57	kbd_table
+EXPORT_SYMBOL_GPL vmlinux 0x5d70d957	inotify_rm_wd
+EXPORT_SYMBOL_GPL vmlinux 0x5d730e7b	raw_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x5dac2334	da903x_write
+EXPORT_SYMBOL_GPL vmlinux 0x5dd67618	register_netevent_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5ef139f1	debugfs_remove_recursive
+EXPORT_SYMBOL_GPL vmlinux 0x5f1ed2dd	get_net_ns_by_pid
+EXPORT_SYMBOL_GPL vmlinux 0x5f1fb93e	crypto_ahash_final
+EXPORT_SYMBOL_GPL vmlinux 0x5f31d376	dm_device_name
+EXPORT_SYMBOL_GPL vmlinux 0x5f79e9b8	pci_find_next_ht_capability
+EXPORT_SYMBOL_GPL vmlinux 0x5f9bae9a	__rtnl_link_register
+EXPORT_SYMBOL_GPL vmlinux 0x5fc59a75	devres_release_group
+EXPORT_SYMBOL_GPL vmlinux 0x5fcdec5d	xfrm_ealg_get_byidx
+EXPORT_SYMBOL_GPL vmlinux 0x5fe9792b	debugfs_create_dir
+EXPORT_SYMBOL_GPL vmlinux 0x60248cbd	klist_add_head
+EXPORT_SYMBOL_GPL vmlinux 0x60a13e90	rcu_barrier
+EXPORT_SYMBOL_GPL vmlinux 0x60dbaaa3	tty_ldisc_ref_wait
+EXPORT_SYMBOL_GPL vmlinux 0x60f2b7b9	bsg_unregister_queue
+EXPORT_SYMBOL_GPL vmlinux 0x61fdfe0f	platform_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x629a7f6e	do_posix_clock_nonanosleep
+EXPORT_SYMBOL_GPL vmlinux 0x62e5bfc3	device_attach
+EXPORT_SYMBOL_GPL vmlinux 0x637f615f	rtc_class_close
+EXPORT_SYMBOL_GPL vmlinux 0x63a55ac1	sysdev_driver_register
+EXPORT_SYMBOL_GPL vmlinux 0x63f4dc09	bprintf
+EXPORT_SYMBOL_GPL vmlinux 0x64f71306	unregister_pernet_gen_subsys
+EXPORT_SYMBOL_GPL vmlinux 0x65635cd5	__ip_route_output_key
+EXPORT_SYMBOL_GPL vmlinux 0x65789eea	ring_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0x657f6425	anon_inode_getfd
+EXPORT_SYMBOL_GPL vmlinux 0x65a59211	regulator_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x65bbbc78	schedule_hrtimeout_range
+EXPORT_SYMBOL_GPL vmlinux 0x65ccb6f0	call_netevent_notifiers
+EXPORT_SYMBOL_GPL vmlinux 0x65d6d0f0	gpio_direction_input
+EXPORT_SYMBOL_GPL vmlinux 0x661601de	sprint_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x662c8872	device_reprobe
+EXPORT_SYMBOL_GPL vmlinux 0x668402aa	crypto_put_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x66b2a859	nr_free_buffer_pages
+EXPORT_SYMBOL_GPL vmlinux 0x66c63d28	task_current_syscall
+EXPORT_SYMBOL_GPL vmlinux 0x66d87d38	symbol_put_addr
+EXPORT_SYMBOL_GPL vmlinux 0x66f08dbc	atomic_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x673e9b18	find_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0x67d7eaaa	rt_mutex_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x686c703f	xfrm_count_auth_supported
+EXPORT_SYMBOL_GPL vmlinux 0x688a11b1	mnt_want_write
+EXPORT_SYMBOL_GPL vmlinux 0x68c6adb4	seq_release_net
+EXPORT_SYMBOL_GPL vmlinux 0x6901119a	trace_nowake_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0x69741400	fuse_get_req
+EXPORT_SYMBOL_GPL vmlinux 0x69c5eae4	mnt_want_write_file
+EXPORT_SYMBOL_GPL vmlinux 0x6ad8ff0d	disable_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0x6b8e9d92	crypto_register_alg
+EXPORT_SYMBOL_GPL vmlinux 0x6b8f7301	register_pernet_subsys
+EXPORT_SYMBOL_GPL vmlinux 0x6bbc2e5d	pci_slots_kset
+EXPORT_SYMBOL_GPL vmlinux 0x6be62dfd	probe_kernel_read
+EXPORT_SYMBOL_GPL vmlinux 0x6c354408	sysfs_put
+EXPORT_SYMBOL_GPL vmlinux 0x6c49c4f2	clockevents_notify
+EXPORT_SYMBOL_GPL vmlinux 0x6c65bab8	__set_irq_handler
+EXPORT_SYMBOL_GPL vmlinux 0x6c6f56e6	inet_hash_connect
+EXPORT_SYMBOL_GPL vmlinux 0x6c8d5ae8	__gpio_get_value
+EXPORT_SYMBOL_GPL vmlinux 0x6c8eb98f	xfrm_aalg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0x6cc3e9e3	i2c_new_probed_device
+EXPORT_SYMBOL_GPL vmlinux 0x6cdfc62e	crypto_aead_setauthsize
+EXPORT_SYMBOL_GPL vmlinux 0x6d0fcadc	pci_add_dynid
+EXPORT_SYMBOL_GPL vmlinux 0x6d2fc5a6	net_namespace_list
+EXPORT_SYMBOL_GPL vmlinux 0x6db9b913	raw_seq_start
+EXPORT_SYMBOL_GPL vmlinux 0x6e08c317	dm_dispatch_request
+EXPORT_SYMBOL_GPL vmlinux 0x6e17d0b9	init_user_ns
+EXPORT_SYMBOL_GPL vmlinux 0x6e2156c5	rtnl_put_cacheinfo
+EXPORT_SYMBOL_GPL vmlinux 0x6e6260ff	hrtimer_get_remaining
+EXPORT_SYMBOL_GPL vmlinux 0x6e7474fc	xfrm_ealg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x6eab7611	hrtimer_start_range_ns
+EXPORT_SYMBOL_GPL vmlinux 0x6ecdc5d5	__mnt_is_readonly
+EXPORT_SYMBOL_GPL vmlinux 0x6f1ceaf0	fsstack_copy_attr_all
+EXPORT_SYMBOL_GPL vmlinux 0x6f569805	ring_buffer_read
+EXPORT_SYMBOL_GPL vmlinux 0x6fd3eaa2	platform_device_put
+EXPORT_SYMBOL_GPL vmlinux 0x6fe3d8cf	ktime_add_safe
+EXPORT_SYMBOL_GPL vmlinux 0x6ff607b6	crypto_get_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x700bb158	__audit_inode_child
+EXPORT_SYMBOL_GPL vmlinux 0x705c46df	relay_file_operations
+EXPORT_SYMBOL_GPL vmlinux 0x7081b8cf	default_backing_dev_info
+EXPORT_SYMBOL_GPL vmlinux 0x70a73332	tracepoint_iter_reset
+EXPORT_SYMBOL_GPL vmlinux 0x71232888	inet_twsk_put
+EXPORT_SYMBOL_GPL vmlinux 0x716265c7	debugfs_initialized
+EXPORT_SYMBOL_GPL vmlinux 0x71e02a03	handle_level_irq
+EXPORT_SYMBOL_GPL vmlinux 0x721bdffd	fuse_conn_init
+EXPORT_SYMBOL_GPL vmlinux 0x723fae07	init_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0x72591f08	remove_irq
+EXPORT_SYMBOL_GPL vmlinux 0x72741f25	trace_vbprintk
+EXPORT_SYMBOL_GPL vmlinux 0x7278d328	all_vm_events
+EXPORT_SYMBOL_GPL vmlinux 0x7283677b	shash_free_instance
+EXPORT_SYMBOL_GPL vmlinux 0x728e8aa9	ring_buffer_entries
+EXPORT_SYMBOL_GPL vmlinux 0x72b4c2f5	disk_part_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0x72dc7eff	fs_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x72e03bae	stop_machine_create
+EXPORT_SYMBOL_GPL vmlinux 0x72e51a47	pci_renumber_slot
+EXPORT_SYMBOL_GPL vmlinux 0x72f469d7	input_ff_erase
+EXPORT_SYMBOL_GPL vmlinux 0x7303c4a7	bd_claim_by_disk
+EXPORT_SYMBOL_GPL vmlinux 0x743c93d0	crypto_ahash_digest
+EXPORT_SYMBOL_GPL vmlinux 0x748e6574	tty_init_termios
+EXPORT_SYMBOL_GPL vmlinux 0x74baf17a	tracing_is_on
+EXPORT_SYMBOL_GPL vmlinux 0x74cadd34	find_vpid
+EXPORT_SYMBOL_GPL vmlinux 0x759a75b4	crypto_alloc_shash
+EXPORT_SYMBOL_GPL vmlinux 0x75e8f3c3	crypto_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x7600f987	platform_device_del
+EXPORT_SYMBOL_GPL vmlinux 0x76533deb	spi_write_then_read
+EXPORT_SYMBOL_GPL vmlinux 0x76837e28	fuse_sync_release
+EXPORT_SYMBOL_GPL vmlinux 0x76a059ad	platform_get_irq_byname
+EXPORT_SYMBOL_GPL vmlinux 0x76c1ed92	transport_configure_device
+EXPORT_SYMBOL_GPL vmlinux 0x773ca527	init_uts_ns
+EXPORT_SYMBOL_GPL vmlinux 0x77eb5086	klist_init
+EXPORT_SYMBOL_GPL vmlinux 0x78074cf2	tcp_reno_min_cwnd
+EXPORT_SYMBOL_GPL vmlinux 0x782a9117	vfs_getxattr
+EXPORT_SYMBOL_GPL vmlinux 0x78540ee8	crypto_spawn_tfm2
+EXPORT_SYMBOL_GPL vmlinux 0x786b4b68	crypto_aead_type
+EXPORT_SYMBOL_GPL vmlinux 0x78833cf5	bus_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x78c0289d	filter_match_preds
+EXPORT_SYMBOL_GPL vmlinux 0x78da79c4	platform_device_add_resources
+EXPORT_SYMBOL_GPL vmlinux 0x78e4a4ee	klist_add_after
+EXPORT_SYMBOL_GPL vmlinux 0x78f1cd18	platform_device_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x7944e0fc	tracing_off
+EXPORT_SYMBOL_GPL vmlinux 0x7a1c4be6	nmi_adjust_hz
+EXPORT_SYMBOL_GPL vmlinux 0x7acdd560	disk_get_part
+EXPORT_SYMBOL_GPL vmlinux 0x7bb56b32	spi_setup
+EXPORT_SYMBOL_GPL vmlinux 0x7bfbcc97	dm_disk
+EXPORT_SYMBOL_GPL vmlinux 0x7c1e488d	shash_attr_alg
+EXPORT_SYMBOL_GPL vmlinux 0x7cc064a0	bus_get_kset
+EXPORT_SYMBOL_GPL vmlinux 0x7cedf4df	driver_find
+EXPORT_SYMBOL_GPL vmlinux 0x7d538b56	regulator_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x7d6b0031	crypto_mod_get
+EXPORT_SYMBOL_GPL vmlinux 0x7d948d04	clockevents_register_device
+EXPORT_SYMBOL_GPL vmlinux 0x7dc5d0b6	crypto_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x7e028f4d	sk_clone
+EXPORT_SYMBOL_GPL vmlinux 0x7e1183c9	async_schedule
+EXPORT_SYMBOL_GPL vmlinux 0x7e3201b3	spi_get_device_id
+EXPORT_SYMBOL_GPL vmlinux 0x7e669212	raw_seq_stop
+EXPORT_SYMBOL_GPL vmlinux 0x7eb6089e	device_create
+EXPORT_SYMBOL_GPL vmlinux 0x7edd92cd	sched_setscheduler
+EXPORT_SYMBOL_GPL vmlinux 0x7eedc295	inotify_inode_is_dead
+EXPORT_SYMBOL_GPL vmlinux 0x7ef0e5fc	pci_disable_rom
+EXPORT_SYMBOL_GPL vmlinux 0x7f0ab5cf	crypto_alg_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x7f45fee8	led_trigger_show
+EXPORT_SYMBOL_GPL vmlinux 0x7ff10ccf	raw_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x80204295	hrtimer_init_sleeper
+EXPORT_SYMBOL_GPL vmlinux 0x8039d043	selinux_secmark_relabel_packet_permission
+EXPORT_SYMBOL_GPL vmlinux 0x808ec1a3	crypto_alg_tested
+EXPORT_SYMBOL_GPL vmlinux 0x80a03712	vma_kernel_pagesize
+EXPORT_SYMBOL_GPL vmlinux 0x80ee55c3	selinux_secmark_refcount_inc
+EXPORT_SYMBOL_GPL vmlinux 0x80faf3d7	srcu_read_lock
+EXPORT_SYMBOL_GPL vmlinux 0x80fbb6e3	crypto_unregister_shash
+EXPORT_SYMBOL_GPL vmlinux 0x81a9750f	__create_workqueue_key
+EXPORT_SYMBOL_GPL vmlinux 0x81f25063	blk_execute_rq_nowait
+EXPORT_SYMBOL_GPL vmlinux 0x8226642f	__gpio_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x82939ebd	rcu_batches_completed_sched
+EXPORT_SYMBOL_GPL vmlinux 0x8296dcc9	crypto_create_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x82c9c5e5	crypto_givcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0x82d79b51	sysctl_vfs_cache_pressure
+EXPORT_SYMBOL_GPL vmlinux 0x82f776b7	gpio_export
+EXPORT_SYMBOL_GPL vmlinux 0x830528c8	save_stack_trace_tsk
+EXPORT_SYMBOL_GPL vmlinux 0x832f6b05	trace_define_common_fields
+EXPORT_SYMBOL_GPL vmlinux 0x8366793e	crypto_larval_kill
+EXPORT_SYMBOL_GPL vmlinux 0x83ac4def	pci_bus_max_busnr
+EXPORT_SYMBOL_GPL vmlinux 0x83bc804e	sysdev_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x83f0246d	klist_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0x83f2c943	devres_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x83f33aba	device_bind_driver
+EXPORT_SYMBOL_GPL vmlinux 0x84201fd2	unregister_kretprobe
+EXPORT_SYMBOL_GPL vmlinux 0x843a9acf	i2c_new_device
+EXPORT_SYMBOL_GPL vmlinux 0x845eebfd	sysfs_create_group
+EXPORT_SYMBOL_GPL vmlinux 0x8465de11	fuse_abort_conn
+EXPORT_SYMBOL_GPL vmlinux 0x84954d01	tty_prepare_flip_string_flags
+EXPORT_SYMBOL_GPL vmlinux 0x849e78bb	class_find_device
+EXPORT_SYMBOL_GPL vmlinux 0x84b1a0fe	blkcipher_walk_done
+EXPORT_SYMBOL_GPL vmlinux 0x84e43ac6	put_driver
+EXPORT_SYMBOL_GPL vmlinux 0x84ee54ca	crypto_larval_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x8505d388	scatterwalk_copychunks
+EXPORT_SYMBOL_GPL vmlinux 0x8583b843	eventfd_ctx_fdget
+EXPORT_SYMBOL_GPL vmlinux 0x85c10896	rcu_batches_completed_bh
+EXPORT_SYMBOL_GPL vmlinux 0x85d62249	inotify_add_watch
+EXPORT_SYMBOL_GPL vmlinux 0x8608b5d3	vfs_setlease
+EXPORT_SYMBOL_GPL vmlinux 0x86444887	fib_rules_register
+EXPORT_SYMBOL_GPL vmlinux 0x864f02e4	get_device
+EXPORT_SYMBOL_GPL vmlinux 0x8666e94c	pci_scan_child_bus
+EXPORT_SYMBOL_GPL vmlinux 0x868784cb	__symbol_get
+EXPORT_SYMBOL_GPL vmlinux 0x86b1667d	hwrng_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x86eb332c	raw_seq_open
+EXPORT_SYMBOL_GPL vmlinux 0x86f6b99d	synchronize_rcu_expedited
+EXPORT_SYMBOL_GPL vmlinux 0x873431f0	alloc_page_buffers
+EXPORT_SYMBOL_GPL vmlinux 0x874be1f6	user_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x87754115	raw_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x879a434c	rdev_get_dev
+EXPORT_SYMBOL_GPL vmlinux 0x87a94578	register_net_sysctl_table
+EXPORT_SYMBOL_GPL vmlinux 0x87b6d8cf	bd_release_from_disk
+EXPORT_SYMBOL_GPL vmlinux 0x87e4a35b	inverse_translate
+EXPORT_SYMBOL_GPL vmlinux 0x8810ad5e	crypto_xor
+EXPORT_SYMBOL_GPL vmlinux 0x8827e7e4	driver_attach
+EXPORT_SYMBOL_GPL vmlinux 0x885142a6	nf_net_netfilter_sysctl_path
+EXPORT_SYMBOL_GPL vmlinux 0x88524fce	devres_find
+EXPORT_SYMBOL_GPL vmlinux 0x88a9dc8b	inet_unhash
+EXPORT_SYMBOL_GPL vmlinux 0x88cb1446	shash_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0x88eef298	gpiochip_remove
+EXPORT_SYMBOL_GPL vmlinux 0x8909ecf1	platform_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x89a7690c	tcp_get_info
+EXPORT_SYMBOL_GPL vmlinux 0x89ee6975	xfrm_audit_state_notfound
+EXPORT_SYMBOL_GPL vmlinux 0x89eeb172	regulator_list_voltage
+EXPORT_SYMBOL_GPL vmlinux 0x8a19fdb4	generic_detach_inode
+EXPORT_SYMBOL_GPL vmlinux 0x8a3e3b20	relay_flush
+EXPORT_SYMBOL_GPL vmlinux 0x8a51d132	crypto_rng_type
+EXPORT_SYMBOL_GPL vmlinux 0x8adc8dc1	proc_net_mkdir
+EXPORT_SYMBOL_GPL vmlinux 0x8bf2fc19	device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x8c6646a5	__inet_inherit_port
+EXPORT_SYMBOL_GPL vmlinux 0x8c7a4947	sysfs_create_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0x8cd35406	aead_geniv_init
+EXPORT_SYMBOL_GPL vmlinux 0x8ce5f919	tty_ldisc_flush
+EXPORT_SYMBOL_GPL vmlinux 0x8d033df4	klist_node_attached
+EXPORT_SYMBOL_GPL vmlinux 0x8d208d5f	ring_buffer_resize
+EXPORT_SYMBOL_GPL vmlinux 0x8d3a53ec	fuse_conn_get
+EXPORT_SYMBOL_GPL vmlinux 0x8dc90b78	class_dev_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0x8e69fe0b	get_current_tty
+EXPORT_SYMBOL_GPL vmlinux 0x8ec66300	power_supply_get_by_name
+EXPORT_SYMBOL_GPL vmlinux 0x8ee5f057	drm_class_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x8f2491f0	kobject_uevent_env
+EXPORT_SYMBOL_GPL vmlinux 0x8f6cee77	__round_jiffies_relative
+EXPORT_SYMBOL_GPL vmlinux 0x8fa74514	sysdev_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x8fcda7ae	inotify_find_update_watch
+EXPORT_SYMBOL_GPL vmlinux 0x8fcf1b5b	regulator_get_voltage
+EXPORT_SYMBOL_GPL vmlinux 0x90a1004a	crypto_has_alg
+EXPORT_SYMBOL_GPL vmlinux 0x90cc9a92	crypto_drop_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x91b09d4c	fb_ddc_read
+EXPORT_SYMBOL_GPL vmlinux 0x91c92246	scatterwalk_start
+EXPORT_SYMBOL_GPL vmlinux 0x92c93adf	anon_transport_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x92cf91bb	invalidate_inode_pages2
+EXPORT_SYMBOL_GPL vmlinux 0x92d31cfb	fixed_phy_add
+EXPORT_SYMBOL_GPL vmlinux 0x93be15ce	use_module
+EXPORT_SYMBOL_GPL vmlinux 0x93d2422d	snmp_mib_free
+EXPORT_SYMBOL_GPL vmlinux 0x93da44fa	raw_unhash_sk
+EXPORT_SYMBOL_GPL vmlinux 0x93e89acd	pid_vnr
+EXPORT_SYMBOL_GPL vmlinux 0x93f33042	tracepoint_iter_start
+EXPORT_SYMBOL_GPL vmlinux 0x949aa8e3	sysdev_store_ulong
+EXPORT_SYMBOL_GPL vmlinux 0x94ae394a	devres_open_group
+EXPORT_SYMBOL_GPL vmlinux 0x952664c5	do_exit
+EXPORT_SYMBOL_GPL vmlinux 0x956a91ba	gpio_get_value_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x95772086	crypto_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x957cab82	regulator_is_enabled
+EXPORT_SYMBOL_GPL vmlinux 0x95867f73	register_kretprobe
+EXPORT_SYMBOL_GPL vmlinux 0x95bccae3	zap_vma_ptes
+EXPORT_SYMBOL_GPL vmlinux 0x96450ed2	ring_buffer_reset
+EXPORT_SYMBOL_GPL vmlinux 0x96a314a3	inet6_lookup_listener
+EXPORT_SYMBOL_GPL vmlinux 0x96cbcf31	pm_qos_add_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x96d28b6c	dev_change_net_namespace
+EXPORT_SYMBOL_GPL vmlinux 0x97c6b3bf	fuse_request_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x990ef13d	unregister_kprobes
+EXPORT_SYMBOL_GPL vmlinux 0x991a279b	device_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x9937d59f	input_class
+EXPORT_SYMBOL_GPL vmlinux 0x997f3063	ip_route_output_flow
+EXPORT_SYMBOL_GPL vmlinux 0x99bd801c	class_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x99e22dcc	da903x_update
+EXPORT_SYMBOL_GPL vmlinux 0x99ff28c9	fuse_request_send
+EXPORT_SYMBOL_GPL vmlinux 0x9a11a0fc	crypto_attr_alg_name
+EXPORT_SYMBOL_GPL vmlinux 0x9ab7eccb	da903x_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x9b1e9592	inet_diag_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x9ba0501e	unregister_vt_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x9bf47b01	debugfs_create_u8
+EXPORT_SYMBOL_GPL vmlinux 0x9c937feb	init_srcu_struct
+EXPORT_SYMBOL_GPL vmlinux 0x9cb8037b	xfrm_count_enc_supported
+EXPORT_SYMBOL_GPL vmlinux 0x9cc0ef67	skb_icv_walk
+EXPORT_SYMBOL_GPL vmlinux 0x9cdf1d31	skcipher_geniv_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x9d7a412e	trace_seq_vprintf
+EXPORT_SYMBOL_GPL vmlinux 0x9d7ef802	debugfs_create_x32
+EXPORT_SYMBOL_GPL vmlinux 0x9dd152c2	sysdev_driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x9e15eb35	pci_intx
+EXPORT_SYMBOL_GPL vmlinux 0x9e711ad2	pm_qos_requirement
+EXPORT_SYMBOL_GPL vmlinux 0x9ed58518	skb_gro_receive
+EXPORT_SYMBOL_GPL vmlinux 0x9ee94ebe	class_compat_remove_link
+EXPORT_SYMBOL_GPL vmlinux 0x9f2f75f0	__module_address
+EXPORT_SYMBOL_GPL vmlinux 0x9f40a6d6	async_synchronize_full_domain
+EXPORT_SYMBOL_GPL vmlinux 0x9f4602f7	synchronize_srcu
+EXPORT_SYMBOL_GPL vmlinux 0x9f6dfe88	ring_buffer_empty_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x9f7c30df	spi_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x9f85ed90	klist_remove
+EXPORT_SYMBOL_GPL vmlinux 0x9fce80db	fb_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xa0122055	filter_current_check_discard
+EXPORT_SYMBOL_GPL vmlinux 0xa0255440	net_ipv4_ctl_path
+EXPORT_SYMBOL_GPL vmlinux 0xa09d7cca	fb_bl_default_curve
+EXPORT_SYMBOL_GPL vmlinux 0xa0ca3213	i2c_unregister_device
+EXPORT_SYMBOL_GPL vmlinux 0xa0ca3ff5	bus_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xa13f63f2	led_trigger_remove
+EXPORT_SYMBOL_GPL vmlinux 0xa19ae207	pci_rescan_bus
+EXPORT_SYMBOL_GPL vmlinux 0xa2701e25	put_device
+EXPORT_SYMBOL_GPL vmlinux 0xa2d1357d	trace_define_field
+EXPORT_SYMBOL_GPL vmlinux 0xa2d45c2b	simple_attr_release
+EXPORT_SYMBOL_GPL vmlinux 0xa2e6b3de	blk_trace_startstop
+EXPORT_SYMBOL_GPL vmlinux 0xa3606f4b	tty_wakeup
+EXPORT_SYMBOL_GPL vmlinux 0xa3a581f3	inet_csk_reqsk_queue_hash_add
+EXPORT_SYMBOL_GPL vmlinux 0xa3c100b3	free_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0xa42d944b	vfs_cancel_lock
+EXPORT_SYMBOL_GPL vmlinux 0xa493e7bc	crypto_shoot_alg
+EXPORT_SYMBOL_GPL vmlinux 0xa49b3f8e	tty_ldisc_ref
+EXPORT_SYMBOL_GPL vmlinux 0xa4a42813	vbin_printf
+EXPORT_SYMBOL_GPL vmlinux 0xa4ed435f	mm_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xa57465e6	led_trigger_set_default
+EXPORT_SYMBOL_GPL vmlinux 0xa5b316cc	blk_update_request
+EXPORT_SYMBOL_GPL vmlinux 0xa5bf5c3e	pm_qos_add_requirement
+EXPORT_SYMBOL_GPL vmlinux 0xa5c36cec	inotify_unmount_inodes
+EXPORT_SYMBOL_GPL vmlinux 0xa5efbf4c	async_synchronize_full
+EXPORT_SYMBOL_GPL vmlinux 0xa5f5a077	udp4_lib_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xa65a36b8	eventfd_fget
+EXPORT_SYMBOL_GPL vmlinux 0xa702fbbf	elv_register
+EXPORT_SYMBOL_GPL vmlinux 0xa7045f9a	kobject_init_and_add
+EXPORT_SYMBOL_GPL vmlinux 0xa730b180	uart_console_write
+EXPORT_SYMBOL_GPL vmlinux 0xa747643c	power_supply_changed
+EXPORT_SYMBOL_GPL vmlinux 0xa881f6f4	proc_net_fops_create
+EXPORT_SYMBOL_GPL vmlinux 0xa89d1915	input_event_to_user
+EXPORT_SYMBOL_GPL vmlinux 0xa8aa18dc	blk_queue_dma_drain
+EXPORT_SYMBOL_GPL vmlinux 0xa8e7867d	pci_msi_off
+EXPORT_SYMBOL_GPL vmlinux 0xa8f59416	gpio_direction_output
+EXPORT_SYMBOL_GPL vmlinux 0xa94d7f56	nf_register_afinfo
+EXPORT_SYMBOL_GPL vmlinux 0xa9bd5846	crypto_alloc_ahash
+EXPORT_SYMBOL_GPL vmlinux 0xa9c530b8	unregister_oom_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xaa01d64a	debugfs_remove
+EXPORT_SYMBOL_GPL vmlinux 0xaa3a22f6	inotify_rm_watch
+EXPORT_SYMBOL_GPL vmlinux 0xaa5054ed	pci_enable_rom
+EXPORT_SYMBOL_GPL vmlinux 0xaa5310f9	__tracepoint_napi_poll
+EXPORT_SYMBOL_GPL vmlinux 0xaa549c6a	sock_prot_inuse_add
+EXPORT_SYMBOL_GPL vmlinux 0xaa6da206	find_get_pid
+EXPORT_SYMBOL_GPL vmlinux 0xaa8c4696	cpu_clock
+EXPORT_SYMBOL_GPL vmlinux 0xaaa63129	crypto_enqueue_request
+EXPORT_SYMBOL_GPL vmlinux 0xaacae488	module_mutex
+EXPORT_SYMBOL_GPL vmlinux 0xab57e311	tracepoint_probe_register
+EXPORT_SYMBOL_GPL vmlinux 0xabfa190b	securityfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xac104957	pci_reset_function
+EXPORT_SYMBOL_GPL vmlinux 0xac2c781a	device_del
+EXPORT_SYMBOL_GPL vmlinux 0xac5fe2f3	kobject_rename
+EXPORT_SYMBOL_GPL vmlinux 0xacca0c8f	devres_remove_group
+EXPORT_SYMBOL_GPL vmlinux 0xadb5025f	unregister_pernet_gen_device
+EXPORT_SYMBOL_GPL vmlinux 0xae0c87ee	pm_qos_remove_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xaf5c05bf	fsstack_copy_inode_size
+EXPORT_SYMBOL_GPL vmlinux 0xafe54655	input_ff_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xb071cde9	__inet_twsk_hashdance
+EXPORT_SYMBOL_GPL vmlinux 0xb0841a14	user_update
+EXPORT_SYMBOL_GPL vmlinux 0xb08d87c6	srcu_read_unlock
+EXPORT_SYMBOL_GPL vmlinux 0xb0aa812e	fips_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xb0bf49d7	rt_mutex_trylock
+EXPORT_SYMBOL_GPL vmlinux 0xb0f34341	sysdev_class_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0xb126d7ec	crypto_spawn_tfm
+EXPORT_SYMBOL_GPL vmlinux 0xb13f5dfe	hwmon_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xb18e17d2	inet_csk_search_req
+EXPORT_SYMBOL_GPL vmlinux 0xb1acbcce	rcu_barrier_sched
+EXPORT_SYMBOL_GPL vmlinux 0xb2215027	rt_mutex_timed_lock
+EXPORT_SYMBOL_GPL vmlinux 0xb2327ff9	device_find_child
+EXPORT_SYMBOL_GPL vmlinux 0xb2f03af0	tcp_set_state
+EXPORT_SYMBOL_GPL vmlinux 0xb2f7635f	sysfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xb2fbf8b0	aead_geniv_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xb31bdfb9	elv_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xb323cce2	sysfs_notify_dirent
+EXPORT_SYMBOL_GPL vmlinux 0xb454d331	rt_mutex_lock_interruptible
+EXPORT_SYMBOL_GPL vmlinux 0xb462f2fe	get_user_pages_fast
+EXPORT_SYMBOL_GPL vmlinux 0xb4759adc	stop_machine
+EXPORT_SYMBOL_GPL vmlinux 0xb480e199	sysfs_add_file_to_group
+EXPORT_SYMBOL_GPL vmlinux 0xb4a23d13	regulator_put
+EXPORT_SYMBOL_GPL vmlinux 0xb520ecad	crypto_find_alg
+EXPORT_SYMBOL_GPL vmlinux 0xb575f930	spi_alloc_device
+EXPORT_SYMBOL_GPL vmlinux 0xb58dcfa2	synchronize_sched_expedited
+EXPORT_SYMBOL_GPL vmlinux 0xb612444d	snmp_mib_init
+EXPORT_SYMBOL_GPL vmlinux 0xb62e642a	unregister_jprobe
+EXPORT_SYMBOL_GPL vmlinux 0xb65091b3	selinux_secmark_refcount_dec
+EXPORT_SYMBOL_GPL vmlinux 0xb6ce41d5	__ring_buffer_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xb6ef702f	nf_unregister_afinfo
+EXPORT_SYMBOL_GPL vmlinux 0xb717ad9e	regulator_get
+EXPORT_SYMBOL_GPL vmlinux 0xb744fa43	xfrm_ealg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0xb7aab441	relay_subbufs_consumed
+EXPORT_SYMBOL_GPL vmlinux 0xb8432167	put_inotify_watch
+EXPORT_SYMBOL_GPL vmlinux 0xb84594a2	rtnl_link_register
+EXPORT_SYMBOL_GPL vmlinux 0xb8649db5	sysfs_remove_group
+EXPORT_SYMBOL_GPL vmlinux 0xb89acf29	ip_local_out
+EXPORT_SYMBOL_GPL vmlinux 0xb91fc639	invalidate_inode_pages2_range
+EXPORT_SYMBOL_GPL vmlinux 0xb92bed0e	sysdev_class_register
+EXPORT_SYMBOL_GPL vmlinux 0xb95d47e9	set_cpus_allowed_ptr
+EXPORT_SYMBOL_GPL vmlinux 0xb99828cd	pci_unblock_user_cfg_access
+EXPORT_SYMBOL_GPL vmlinux 0xb9ac1293	srcu_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xb9eb3aa9	add_uevent_var
+EXPORT_SYMBOL_GPL vmlinux 0xba03571c	kern_mount_data
+EXPORT_SYMBOL_GPL vmlinux 0xba136370	platform_add_devices
+EXPORT_SYMBOL_GPL vmlinux 0xba28b893	devm_kfree
+EXPORT_SYMBOL_GPL vmlinux 0xba6bf78c	generic_fh_to_parent
+EXPORT_SYMBOL_GPL vmlinux 0xba7907b6	srcu_batches_completed
+EXPORT_SYMBOL_GPL vmlinux 0xbaeb6bcf	led_trigger_register
+EXPORT_SYMBOL_GPL vmlinux 0xbb098762	tcp_unregister_congestion_control
+EXPORT_SYMBOL_GPL vmlinux 0xbb16ffe7	real_hard_smp_processor_id
+EXPORT_SYMBOL_GPL vmlinux 0xbb463fc6	__class_create
+EXPORT_SYMBOL_GPL vmlinux 0xbb5f82a1	srcu_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0xbb7bc7a2	tcp_slow_start
+EXPORT_SYMBOL_GPL vmlinux 0xbbc9aae3	regulator_set_mode
+EXPORT_SYMBOL_GPL vmlinux 0xbc9b6cc2	__blk_put_request
+EXPORT_SYMBOL_GPL vmlinux 0xbcceb10c	unregister_ftrace_event
+EXPORT_SYMBOL_GPL vmlinux 0xbd91fe79	spi_async
+EXPORT_SYMBOL_GPL vmlinux 0xbda049fe	crypto_larval_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xbdcc0837	__wake_up_sync_key
+EXPORT_SYMBOL_GPL vmlinux 0xbdd295f0	trace_vprintk
+EXPORT_SYMBOL_GPL vmlinux 0xbddad1b5	power_supply_set_battery_charged
+EXPORT_SYMBOL_GPL vmlinux 0xbe116723	do_posix_clock_nosettime
+EXPORT_SYMBOL_GPL vmlinux 0xbe7b9715	regulator_get_init_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0xbeb4008b	init_dummy_netdev
+EXPORT_SYMBOL_GPL vmlinux 0xbee0e444	regulator_disable
+EXPORT_SYMBOL_GPL vmlinux 0xbf74eb20	probe_kernel_write
+EXPORT_SYMBOL_GPL vmlinux 0xbfb570ae	blkdev_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xbff349f6	inet_csk_route_req
+EXPORT_SYMBOL_GPL vmlinux 0xbff58d93	tracepoint_iter_stop
+EXPORT_SYMBOL_GPL vmlinux 0xbffde8ec	compat_alloc_user_space
+EXPORT_SYMBOL_GPL vmlinux 0xc0160968	platform_driver_probe
+EXPORT_SYMBOL_GPL vmlinux 0xc021cdf1	rdev_get_id
+EXPORT_SYMBOL_GPL vmlinux 0xc126e890	klist_del
+EXPORT_SYMBOL_GPL vmlinux 0xc12f7e0d	trace_profile_buf_nmi
+EXPORT_SYMBOL_GPL vmlinux 0xc1597e52	device_add
+EXPORT_SYMBOL_GPL vmlinux 0xc19748c6	__inet_hash_nolisten
+EXPORT_SYMBOL_GPL vmlinux 0xc22a3091	vm_unmap_aliases
+EXPORT_SYMBOL_GPL vmlinux 0xc2550b5d	inet_hash
+EXPORT_SYMBOL_GPL vmlinux 0xc271de8e	tty_prepare_flip_string
+EXPORT_SYMBOL_GPL vmlinux 0xc298a13f	mnt_clone_write
+EXPORT_SYMBOL_GPL vmlinux 0xc2a55bfe	scatterwalk_map
+EXPORT_SYMBOL_GPL vmlinux 0xc3301f02	rcu_expedited_torture_stats
+EXPORT_SYMBOL_GPL vmlinux 0xc34efe27	snmp_fold_field
+EXPORT_SYMBOL_GPL vmlinux 0xc3c3752a	__rt_mutex_init
+EXPORT_SYMBOL_GPL vmlinux 0xc3c6b37e	blocking_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xc44207ea	br_handle_frame_hook
+EXPORT_SYMBOL_GPL vmlinux 0xc453f25e	lookup_create
+EXPORT_SYMBOL_GPL vmlinux 0xc47808a2	bus_find_device_by_name
+EXPORT_SYMBOL_GPL vmlinux 0xc4b33aa6	tracepoint_probe_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xc4dd936f	xfrm_output
+EXPORT_SYMBOL_GPL vmlinux 0xc4edc33f	vfs_test_lock
+EXPORT_SYMBOL_GPL vmlinux 0xc52aa56d	inotify_init_watch
+EXPORT_SYMBOL_GPL vmlinux 0xc55dc4fb	unregister_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0xc56426f2	inotify_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xc56af859	firmware_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xc5ad347e	uart_set_options
+EXPORT_SYMBOL_GPL vmlinux 0xc60f75ec	__ftrace_vprintk
+EXPORT_SYMBOL_GPL vmlinux 0xc69318a4	queue_work_on
+EXPORT_SYMBOL_GPL vmlinux 0xc6c6d3a7	crypto_blkcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0xc71c4408	bdi_writeout_inc
+EXPORT_SYMBOL_GPL vmlinux 0xc73b9722	driver_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xc76d6c88	hrtimer_init
+EXPORT_SYMBOL_GPL vmlinux 0xc78c1fe8	skb_cow_data
+EXPORT_SYMBOL_GPL vmlinux 0xc7ab30a0	bus_find_device
+EXPORT_SYMBOL_GPL vmlinux 0xc81f8d78	inode_add_to_lists
+EXPORT_SYMBOL_GPL vmlinux 0xc86c733b	__blocking_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xc87c1f84	ktime_get
+EXPORT_SYMBOL_GPL vmlinux 0xc8a29fd0	rtc_irq_set_freq
+EXPORT_SYMBOL_GPL vmlinux 0xc8a5368b	vfs_listxattr
+EXPORT_SYMBOL_GPL vmlinux 0xc8ad4ebe	class_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0xc8f18b40	blk_end_request_err
+EXPORT_SYMBOL_GPL vmlinux 0xc927b675	dm_noflush_suspending
+EXPORT_SYMBOL_GPL vmlinux 0xc9561772	fb_destroy_modelist
+EXPORT_SYMBOL_GPL vmlinux 0xc95b8668	leds_list_lock
+EXPORT_SYMBOL_GPL vmlinux 0xc980b481	crypto_shash_digest
+EXPORT_SYMBOL_GPL vmlinux 0xc9e5d4fc	register_dimm_printer
+EXPORT_SYMBOL_GPL vmlinux 0xc9ec4e21	free_percpu
+EXPORT_SYMBOL_GPL vmlinux 0xc9ff7e9b	sysfs_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0xca32d4d2	register_pernet_gen_device
+EXPORT_SYMBOL_GPL vmlinux 0xca4b3323	crypto_alloc_instance
+EXPORT_SYMBOL_GPL vmlinux 0xca85d8cf	tracepoint_probe_update_all
+EXPORT_SYMBOL_GPL vmlinux 0xca8e02c9	platform_get_resource_byname
+EXPORT_SYMBOL_GPL vmlinux 0xca9751a8	simple_attr_read
+EXPORT_SYMBOL_GPL vmlinux 0xcaffb000	queue_work
+EXPORT_SYMBOL_GPL vmlinux 0xcb0bad3a	__trace_note_message
+EXPORT_SYMBOL_GPL vmlinux 0xcbe38e6c	__crypto_alloc_tfm
+EXPORT_SYMBOL_GPL vmlinux 0xcbfbdb7f	register_pernet_gen_subsys
+EXPORT_SYMBOL_GPL vmlinux 0xcc1f1c3d	inet_twdr_hangman
+EXPORT_SYMBOL_GPL vmlinux 0xcc7308ce	__srcu_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xcc7aaa33	xfrm_audit_state_add
+EXPORT_SYMBOL_GPL vmlinux 0xcc7e30dd	dequeue_signal
+EXPORT_SYMBOL_GPL vmlinux 0xcc9be911	attribute_container_find_class_device
+EXPORT_SYMBOL_GPL vmlinux 0xcca8cd6c	crypto_alloc_base
+EXPORT_SYMBOL_GPL vmlinux 0xcd4daa52	__pneigh_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xcd97159a	dma_get_required_mask
+EXPORT_SYMBOL_GPL vmlinux 0xcdbbae5e	devres_get
+EXPORT_SYMBOL_GPL vmlinux 0xcdbe65f2	simple_attr_open
+EXPORT_SYMBOL_GPL vmlinux 0xcdca3691	nr_irqs
+EXPORT_SYMBOL_GPL vmlinux 0xcdeaafe9	clockevent_delta2ns
+EXPORT_SYMBOL_GPL vmlinux 0xce2d04c3	security_inode_mkdir
+EXPORT_SYMBOL_GPL vmlinux 0xce620d9c	led_trigger_event
+EXPORT_SYMBOL_GPL vmlinux 0xce680c07	devres_add
+EXPORT_SYMBOL_GPL vmlinux 0xcea76202	dm_requeue_unmapped_request
+EXPORT_SYMBOL_GPL vmlinux 0xcf8af983	trace_profile_buf
+EXPORT_SYMBOL_GPL vmlinux 0xcfc68341	synchronize_rcu_bh
+EXPORT_SYMBOL_GPL vmlinux 0xcfcc83ad	register_vt_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xcfd9a2c0	des_ekey
+EXPORT_SYMBOL_GPL vmlinux 0xd0144095	page_mkclean
+EXPORT_SYMBOL_GPL vmlinux 0xd03c7700	secure_ipv4_port_ephemeral
+EXPORT_SYMBOL_GPL vmlinux 0xd07152ab	queue_delayed_work
+EXPORT_SYMBOL_GPL vmlinux 0xd0a8ddba	ring_buffer_entries_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xd0b7f867	__blkdev_driver_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xd0c05159	emergency_restart
+EXPORT_SYMBOL_GPL vmlinux 0xd0c71f40	blkcipher_walk_virt_block
+EXPORT_SYMBOL_GPL vmlinux 0xd0d1f9da	crypto_nivaead_type
+EXPORT_SYMBOL_GPL vmlinux 0xd0e5482a	rtnl_link_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xd0fd1209	simple_attr_write
+EXPORT_SYMBOL_GPL vmlinux 0xd1640af9	ring_buffer_free
+EXPORT_SYMBOL_GPL vmlinux 0xd16712f3	crypto_check_attr_type
+EXPORT_SYMBOL_GPL vmlinux 0xd1beca35	class_compat_create_link
+EXPORT_SYMBOL_GPL vmlinux 0xd1f8bd22	hrtimer_cancel
+EXPORT_SYMBOL_GPL vmlinux 0xd240376c	fib_rules_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xd273b1b1	__round_jiffies_up_relative
+EXPORT_SYMBOL_GPL vmlinux 0xd2a8caf0	work_on_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xd2de2544	xfrm_audit_state_icvfail
+EXPORT_SYMBOL_GPL vmlinux 0xd31e453b	regulator_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xd3e16bc5	debugfs_create_x16
+EXPORT_SYMBOL_GPL vmlinux 0xd425573b	dm_set_device_limits
+EXPORT_SYMBOL_GPL vmlinux 0xd4419956	xattr_getsecurity
+EXPORT_SYMBOL_GPL vmlinux 0xd448110a	pci_destroy_slot
+EXPORT_SYMBOL_GPL vmlinux 0xd470f016	ring_buffer_iter_peek
+EXPORT_SYMBOL_GPL vmlinux 0xd4b7e86f	klist_next
+EXPORT_SYMBOL_GPL vmlinux 0xd5a6ef67	sysfs_remove_file_from_group
+EXPORT_SYMBOL_GPL vmlinux 0xd5df043a	regulator_set_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0xd60f6f13	crypto_alloc_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0xd64e0458	platform_get_irq
+EXPORT_SYMBOL_GPL vmlinux 0xd686a1d6	dm_put
+EXPORT_SYMBOL_GPL vmlinux 0xd6d355b1	inet_twsk_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xd6dc08ba	find_symbol
+EXPORT_SYMBOL_GPL vmlinux 0xd6dca524	blocking_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0xd6ed6001	device_release_driver
+EXPORT_SYMBOL_GPL vmlinux 0xd705b4c7	schedule_hrtimeout
+EXPORT_SYMBOL_GPL vmlinux 0xd73ef534	sysdev_resume
+EXPORT_SYMBOL_GPL vmlinux 0xd767d348	device_initialize
+EXPORT_SYMBOL_GPL vmlinux 0xd768e985	regulator_has_full_constraints
+EXPORT_SYMBOL_GPL vmlinux 0xd7b8cc6d	security_inode_create
+EXPORT_SYMBOL_GPL vmlinux 0xd7d79132	put_online_cpus
+EXPORT_SYMBOL_GPL vmlinux 0xd7f848e0	rtc_alarm_irq_enable
+EXPORT_SYMBOL_GPL vmlinux 0xd849ba57	sg_scsi_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xd8f83084	tty_buffer_request_room
+EXPORT_SYMBOL_GPL vmlinux 0xd8f93bec	skcipher_geniv_init
+EXPORT_SYMBOL_GPL vmlinux 0xd96f5d2c	do_sync_mapping_range
+EXPORT_SYMBOL_GPL vmlinux 0xd98e76da	flush_workqueue
+EXPORT_SYMBOL_GPL vmlinux 0xd9db9de4	sysfs_chmod_file
+EXPORT_SYMBOL_GPL vmlinux 0xd9ee1ab3	attribute_container_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xda1be8e1	async_synchronize_cookie_domain
+EXPORT_SYMBOL_GPL vmlinux 0xda877d11	fb_deferred_io_open
+EXPORT_SYMBOL_GPL vmlinux 0xdad367fd	klist_add_tail
+EXPORT_SYMBOL_GPL vmlinux 0xdaf4dfb3	fb_mode_option
+EXPORT_SYMBOL_GPL vmlinux 0xdb1661b0	bus_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xdb274e52	monotonic_to_bootbased
+EXPORT_SYMBOL_GPL vmlinux 0xdb9c3ebb	proc_net_remove
+EXPORT_SYMBOL_GPL vmlinux 0xdbd3dc45	cleanup_srcu_struct
+EXPORT_SYMBOL_GPL vmlinux 0xdc9530a4	driver_add_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xdca765ef	driver_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0xdce3872b	ring_buffer_empty
+EXPORT_SYMBOL_GPL vmlinux 0xdd268e0b	fuse_request_send_background
+EXPORT_SYMBOL_GPL vmlinux 0xdd8709fa	gpiochip_add
+EXPORT_SYMBOL_GPL vmlinux 0xdd9019c4	setup_irq
+EXPORT_SYMBOL_GPL vmlinux 0xde259773	regulator_set_current_limit
+EXPORT_SYMBOL_GPL vmlinux 0xde417b81	async_schedule_domain
+EXPORT_SYMBOL_GPL vmlinux 0xdf35e219	__mmdrop
+EXPORT_SYMBOL_GPL vmlinux 0xdf85496c	srcu_init_notifier_head
+EXPORT_SYMBOL_GPL vmlinux 0xdf9d05f8	tcp_cong_avoid_ai
+EXPORT_SYMBOL_GPL vmlinux 0xdfd6ac63	register_jprobe
+EXPORT_SYMBOL_GPL vmlinux 0xe06fc459	screen_glyph
+EXPORT_SYMBOL_GPL vmlinux 0xe0cca33e	xfrm_aead_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0xe11956c9	class_interface_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xe14f1550	regulator_set_voltage
+EXPORT_SYMBOL_GPL vmlinux 0xe1744b3e	rtc_irq_set_state
+EXPORT_SYMBOL_GPL vmlinux 0xe19e01fe	inotify_remove_watch_locked
+EXPORT_SYMBOL_GPL vmlinux 0xe1bf92c1	spi_sync
+EXPORT_SYMBOL_GPL vmlinux 0xe26fa512	device_remove_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0xe2cedffe	debugfs_create_size_t
+EXPORT_SYMBOL_GPL vmlinux 0xe306066a	scatterwalk_map_and_copy
+EXPORT_SYMBOL_GPL vmlinux 0xe31577ea	debugfs_create_blob
+EXPORT_SYMBOL_GPL vmlinux 0xe3bb3b18	crypto_unregister_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0xe3d58487	eventfd_ctx_get
+EXPORT_SYMBOL_GPL vmlinux 0xe42c2896	security_inode_setattr
+EXPORT_SYMBOL_GPL vmlinux 0xe498f2f5	platform_device_add_data
+EXPORT_SYMBOL_GPL vmlinux 0xe5011aa6	rt_mutex_unlock
+EXPORT_SYMBOL_GPL vmlinux 0xe530071c	pm_qos_remove_requirement
+EXPORT_SYMBOL_GPL vmlinux 0xe54b3827	rtc_irq_register
+EXPORT_SYMBOL_GPL vmlinux 0xe578ab75	class_dev_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0xe5b9b3ce	transport_remove_device
+EXPORT_SYMBOL_GPL vmlinux 0xe617c4e9	relay_reset
+EXPORT_SYMBOL_GPL vmlinux 0xe61a6d2f	gpio_unexport
+EXPORT_SYMBOL_GPL vmlinux 0xe6221876	input_ff_event
+EXPORT_SYMBOL_GPL vmlinux 0xe651f76e	selinux_is_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xe67165a7	i2c_new_dummy
+EXPORT_SYMBOL_GPL vmlinux 0xe6e6c093	regulator_set_optimum_mode
+EXPORT_SYMBOL_GPL vmlinux 0xe6ef1751	securityfs_remove
+EXPORT_SYMBOL_GPL vmlinux 0xe70931b4	single_release_net
+EXPORT_SYMBOL_GPL vmlinux 0xe755478b	device_create_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0xe77ddbce	sysfs_get
+EXPORT_SYMBOL_GPL vmlinux 0xe7b86512	sysdev_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0xe7c04bdd	regulator_force_disable
+EXPORT_SYMBOL_GPL vmlinux 0xe7ffe877	pcpu_base_addr
+EXPORT_SYMBOL_GPL vmlinux 0xe80bb3e2	crypto_alloc_aead
+EXPORT_SYMBOL_GPL vmlinux 0xe816b471	tcp_death_row
+EXPORT_SYMBOL_GPL vmlinux 0xe81c9872	debugfs_create_x8
+EXPORT_SYMBOL_GPL vmlinux 0xe830855d	single_open_net
+EXPORT_SYMBOL_GPL vmlinux 0xe901175f	__dev_addr_unsync
+EXPORT_SYMBOL_GPL vmlinux 0xe93e49c3	devres_free
+EXPORT_SYMBOL_GPL vmlinux 0xe942e3bc	__get_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0xe9543f29	shash_ahash_update
+EXPORT_SYMBOL_GPL vmlinux 0xe9a135e6	crypto_tfm_in_queue
+EXPORT_SYMBOL_GPL vmlinux 0xe9d96be3	ring_buffer_alloc_read_page
+EXPORT_SYMBOL_GPL vmlinux 0xe9e7f957	regulator_bulk_enable
+EXPORT_SYMBOL_GPL vmlinux 0xe9efae44	crypto_ahash_finup
+EXPORT_SYMBOL_GPL vmlinux 0xea124bd1	gcd
+EXPORT_SYMBOL_GPL vmlinux 0xea25dba4	platform_driver_register
+EXPORT_SYMBOL_GPL vmlinux 0xea5c5eb7	register_net_sysctl_rotable
+EXPORT_SYMBOL_GPL vmlinux 0xea795724	kobject_create_and_add
+EXPORT_SYMBOL_GPL vmlinux 0xeafcaa13	shash_ahash_finup
+EXPORT_SYMBOL_GPL vmlinux 0xeb0da1ae	anon_transport_class_register
+EXPORT_SYMBOL_GPL vmlinux 0xeb115c00	tcp_is_cwnd_limited
+EXPORT_SYMBOL_GPL vmlinux 0xeb3490c3	bus_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xeb4c1fc8	__tracepoint_block_remap
+EXPORT_SYMBOL_GPL vmlinux 0xeb652c5b	regulator_get_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0xeb726d86	register_posix_clock
+EXPORT_SYMBOL_GPL vmlinux 0xeb94ddc5	blk_rq_check_limits
+EXPORT_SYMBOL_GPL vmlinux 0xebae9d35	uhci_reset_hc
+EXPORT_SYMBOL_GPL vmlinux 0xec1a75a9	__dev_addr_sync
+EXPORT_SYMBOL_GPL vmlinux 0xec1b043e	regulator_suspend_prepare
+EXPORT_SYMBOL_GPL vmlinux 0xec29b4af	drm_class_device_register
+EXPORT_SYMBOL_GPL vmlinux 0xec371b56	trace_seq_printf
+EXPORT_SYMBOL_GPL vmlinux 0xecc88a21	vfs_kern_mount
+EXPORT_SYMBOL_GPL vmlinux 0xed0c11bf	skb_segment
+EXPORT_SYMBOL_GPL vmlinux 0xedba0b14	user_describe
+EXPORT_SYMBOL_GPL vmlinux 0xee1d14f7	inet_csk_listen_start
+EXPORT_SYMBOL_GPL vmlinux 0xee2a4f95	seq_open_net
+EXPORT_SYMBOL_GPL vmlinux 0xee3278dd	tcp_register_congestion_control
+EXPORT_SYMBOL_GPL vmlinux 0xee532e0e	debugfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xee8b58a2	fsnotify
+EXPORT_SYMBOL_GPL vmlinux 0xeec661af	regulator_bulk_get
+EXPORT_SYMBOL_GPL vmlinux 0xeeef2342	power_supply_register
+EXPORT_SYMBOL_GPL vmlinux 0xeefd98e8	transport_class_register
+EXPORT_SYMBOL_GPL vmlinux 0xef6c3f70	round_jiffies_up_relative
+EXPORT_SYMBOL_GPL vmlinux 0xefdd5a63	ktime_get_ts
+EXPORT_SYMBOL_GPL vmlinux 0xeff25090	xfrm_audit_state_replay_overflow
+EXPORT_SYMBOL_GPL vmlinux 0xf03b2b2a	unregister_kretprobes
+EXPORT_SYMBOL_GPL vmlinux 0xf09ecefe	inet_hashinfo_init
+EXPORT_SYMBOL_GPL vmlinux 0xf0c0f3cb	rtc_set_mmss
+EXPORT_SYMBOL_GPL vmlinux 0xf1727729	transport_setup_device
+EXPORT_SYMBOL_GPL vmlinux 0xf17c6166	rtnl_register
+EXPORT_SYMBOL_GPL vmlinux 0xf184d189	kernel_power_off
+EXPORT_SYMBOL_GPL vmlinux 0xf1f84c45	page_cache_async_readahead
+EXPORT_SYMBOL_GPL vmlinux 0xf208970c	__root_device_register
+EXPORT_SYMBOL_GPL vmlinux 0xf29272f1	register_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0xf2c50832	fuse_do_open
+EXPORT_SYMBOL_GPL vmlinux 0xf2de632f	tracepoint_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0xf2ea1650	sysfs_notify
+EXPORT_SYMBOL_GPL vmlinux 0xf2fca922	uart_parse_options
+EXPORT_SYMBOL_GPL vmlinux 0xf30b5877	spi_alloc_master
+EXPORT_SYMBOL_GPL vmlinux 0xf34806ec	hrtimer_get_res
+EXPORT_SYMBOL_GPL vmlinux 0xf36dd108	skb_partial_csum_set
+EXPORT_SYMBOL_GPL vmlinux 0xf3a3360a	spi_add_device
+EXPORT_SYMBOL_GPL vmlinux 0xf3e85a21	aead_geniv_exit
+EXPORT_SYMBOL_GPL vmlinux 0xf40ad903	fb_deferred_io_init
+EXPORT_SYMBOL_GPL vmlinux 0xf450df1d	eventfd_ctx_fileget
+EXPORT_SYMBOL_GPL vmlinux 0xf499fdb2	rcu_barrier_bh
+EXPORT_SYMBOL_GPL vmlinux 0xf4a8e899	tcp_twsk_destructor
+EXPORT_SYMBOL_GPL vmlinux 0xf4ae579c	klist_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0xf502265d	__pci_complete_power_transition
+EXPORT_SYMBOL_GPL vmlinux 0xf50562f0	crypto_register_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0xf5384ac1	__trace_printk
+EXPORT_SYMBOL_GPL vmlinux 0xf54bd49b	lcm
+EXPORT_SYMBOL_GPL vmlinux 0xf5799f7a	stop_machine_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xf589b391	inet_twdr_twkill_work
+EXPORT_SYMBOL_GPL vmlinux 0xf5a691cd	invalidate_bh_lrus
+EXPORT_SYMBOL_GPL vmlinux 0xf5be3b5a	sysdev_store_int
+EXPORT_SYMBOL_GPL vmlinux 0xf5d3f4d1	inet_csk_compat_getsockopt
+EXPORT_SYMBOL_GPL vmlinux 0xf5ef9ecc	securityfs_create_dir
+EXPORT_SYMBOL_GPL vmlinux 0xf680dd2c	sysdev_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xf68bda83	br_fdb_test_addr_hook
+EXPORT_SYMBOL_GPL vmlinux 0xf6bcbd73	hwrng_register
+EXPORT_SYMBOL_GPL vmlinux 0xf6cff439	__fsnotify_parent
+EXPORT_SYMBOL_GPL vmlinux 0xf6db42c8	relay_close
+EXPORT_SYMBOL_GPL vmlinux 0xf718bce6	crypto_init_shash_spawn
+EXPORT_SYMBOL_GPL vmlinux 0xf76a3345	add_to_page_cache_lru
+EXPORT_SYMBOL_GPL vmlinux 0xf7f50bae	rtc_update_irq_enable
+EXPORT_SYMBOL_GPL vmlinux 0xf7fc7e51	dev_set_name
+EXPORT_SYMBOL_GPL vmlinux 0xf846a201	generic_drop_inode
+EXPORT_SYMBOL_GPL vmlinux 0xf87b1ae7	devm_kzalloc
+EXPORT_SYMBOL_GPL vmlinux 0xf8802492	print_stack_trace
+EXPORT_SYMBOL_GPL vmlinux 0xf8a50fb4	crypto_unregister_alg
+EXPORT_SYMBOL_GPL vmlinux 0xf8b4b47a	unregister_jprobes
+EXPORT_SYMBOL_GPL vmlinux 0xf90163e3	tcp_reno_ssthresh
+EXPORT_SYMBOL_GPL vmlinux 0xf906fb74	vfs_setxattr
+EXPORT_SYMBOL_GPL vmlinux 0xf93051ae	blk_rq_prep_clone
+EXPORT_SYMBOL_GPL vmlinux 0xf9453685	macvlan_handle_frame_hook
+EXPORT_SYMBOL_GPL vmlinux 0xf94c0c33	ring_buffer_commit_overrun_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xf9549e48	crypto_grab_aead
+EXPORT_SYMBOL_GPL vmlinux 0xf9a054b5	__round_jiffies
+EXPORT_SYMBOL_GPL vmlinux 0xf9b5c670	driver_find_device
+EXPORT_SYMBOL_GPL vmlinux 0xf9d6a53f	get_cpu_sysdev
+EXPORT_SYMBOL_GPL vmlinux 0xfbe5347a	blk_insert_cloned_request
+EXPORT_SYMBOL_GPL vmlinux 0xfbf9be5d	register_oom_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xfc43cfcb	fuse_dev_operations
+EXPORT_SYMBOL_GPL vmlinux 0xfc903019	skb_pull_rcsum
+EXPORT_SYMBOL_GPL vmlinux 0xfcb0eb37	bus_register
+EXPORT_SYMBOL_GPL vmlinux 0xfcd82dff	input_ff_upload
+EXPORT_SYMBOL_GPL vmlinux 0xfcde7aca	da903x_reads
+EXPORT_SYMBOL_GPL vmlinux 0xfceb547d	gpio_export_link
+EXPORT_SYMBOL_GPL vmlinux 0xfceb7dea	blk_rq_unprep_clone
+EXPORT_SYMBOL_GPL vmlinux 0xfd2965dc	crypto_alg_mod_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xfd30c3eb	queue_delayed_work_on
+EXPORT_SYMBOL_GPL vmlinux 0xfd6180f3	get_task_mm
+EXPORT_SYMBOL_GPL vmlinux 0xfd69ea92	fixed_phy_set_link_update
+EXPORT_SYMBOL_GPL vmlinux 0xfd892ae6	crypto_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0xfd99e4d6	apply_to_page_range
+EXPORT_SYMBOL_GPL vmlinux 0xfdaed9b6	fuse_file_poll
+EXPORT_SYMBOL_GPL vmlinux 0xfde0b92c	crypto_larval_error
+EXPORT_SYMBOL_GPL vmlinux 0xfe8524e6	xfrm_inner_extract_output
+EXPORT_SYMBOL_GPL vmlinux 0xfe990052	gpio_free
+EXPORT_SYMBOL_GPL vmlinux 0xfe99cbfe	devres_remove
+EXPORT_SYMBOL_GPL vmlinux 0xfefa2adb	input_ff_effect_from_user
+EXPORT_SYMBOL_GPL vmlinux 0xff05495a	tcp_twsk_unique
+EXPORT_SYMBOL_GPL vmlinux 0xff0aa927	ring_buffer_record_enable_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xff4b6d99	do_add_mount
+EXPORT_SYMBOL_GPL vmlinux 0xff6c8da0	__sock_recv_timestamp
+EXPORT_SYMBOL_GPL vmlinux 0xff87e221	ring_buffer_time_stamp
+EXPORT_SYMBOL_GPL vmlinux 0xffacc2b6	device_schedule_callback_owner
+EXPORT_SYMBOL_GPL vmlinux 0xffbd1337	disk_part_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0xffc04543	unregister_dimm_printer
+EXPORT_UNUSED_SYMBOL vmlinux 0x00000000	simple_prepare_write
--- linux-mvl-dove-2.6.32.orig/debian.master/abi/2.6.32-34.73/sparc/sparc64-smp.modules
+++ linux-mvl-dove-2.6.32/debian.master/abi/2.6.32-34.73/sparc/sparc64-smp.modules
@@ -0,0 +1,1752 @@
+3c574_cs
+3c589_cs
+3c59x
+3w-9xxx
+3w-xxxx
+8021q
+8139cp
+8139too
+8250
+8250_pci
+8390
+9p
+9pnet
+9pnet_rdma
+a100u2w
+aacraid
+ab3100
+ab3100-core
+ab3100-otp
+ac97_bus
+acecad
+acenic
+act_gact
+act_ipt
+act_mirred
+act_nat
+act_pedit
+act_police
+act_simple
+act_skbedit
+ad7414
+ad7418
+ad7877
+ad7879
+adcxx
+adfs
+adm1026
+adm1029
+adm8211
+adm9240
+adp5588-keys
+ads7846
+adt7462
+adt7470
+adt7475
+adutux
+adv7180
+adv7343
+aes_generic
+af_802154
+affs
+af_key
+af-rxrpc
+ah4
+ah6
+ahci
+aic79xx
+aic94xx
+aiptek
+aircable
+airo
+airo_cs
+alauda
+alim7101_wdt
+ansi_cprng
+anubis
+aoe
+appledisplay
+appletalk
+appletouch
+applicom
+ar7part
+ar9170usb
+arc4
+arcmsr
+ark3116
+arkfb
+arptable_filter
+arp_tables
+arpt_mangle
+asix
+async_memcpy
+async_pq
+async_raid6_recov
+async_tx
+async_xor
+at24
+at25
+at76c50x-usb
+ata_generic
+ata_piix
+aten
+ath
+ath9k
+ati_remote
+ati_remote2
+atl1
+atl1c
+atl1e
+atl2
+atm
+atmel
+atmel_cs
+atmel_pci
+atmtcp
+atp870u
+atxp1
+authenc
+auth_rpcgss
+autofs
+autofs4
+avmfritz
+axnet_cs
+b43
+b43legacy
+b44
+bbc
+bcm5974
+be2iscsi
+be2net
+befs
+belkin_sa
+berry_charge
+bfa
+bfs
+binfmt_misc
+block2mtd
+blowfish
+bnx2
+bnx2i
+bonding
+bpck
+bq24022
+bq27x00_battery
+br2684
+bridge
+broadcom
+broadsheetfb
+bsd_comp
+bt8xxgpio
+btrfs
+c67x00
+cachefiles
+cafe_ccic
+cafe_nand
+camellia
+can
+can-bcm
+can-dev
+can-raw
+carminefb
+cassini
+cast5
+cast6
+catc
+cb710
+cb710-mmc
+cbc
+cciss
+cdc-acm
+cdc_eem
+cdc_ether
+cdc-phonet
+cdc_subset
+cdc-wdm
+cdrom
+cfg80211
+cfi_cmdset_0001
+cfi_cmdset_0002
+cfi_cmdset_0020
+cfi_probe
+cfi_util
+ch341
+chipreg
+chmc
+cicada
+cifs
+clip
+cls_basic
+cls_flow
+cls_fw
+cls_route
+cls_rsvp
+cls_rsvp6
+cls_tcindex
+cls_u32
+cm109
+cn
+cnic
+coda
+comm
+configfs
+core
+cp210x
+cpwd
+cramfs
+crc32c
+crc7
+crc-ccitt
+crc-itu-t
+crc-t10dif
+cryptd
+cryptoloop
+crypto_null
+cs53l32a
+cts
+cuse
+cx231xx
+cx231xx-alsa
+cx2341x
+cx25840
+cxacru
+cxgb
+cxgb3
+cxgb3i
+cyberjack
+cyclades
+cypress_cy7c63
+cypress_m8
+cytherm
+da9030_battery
+da9034-ts
+da903x
+da903x_bl
+DAC960
+davicom
+dc395x
+dccp
+dccp_diag
+dccp_ipv4
+dccp_ipv6
+dccp_probe
+de600
+de620
+decnet
+deflate
+digi_acceleport
+diskonchip
+display
+display7seg
+dl2k
+dlm
+dm9601
+dm-crypt
+dme1737
+dm-log
+dm-mirror
+dm-multipath
+dm-queue-length
+dm-region-hash
+dm-round-robin
+dm-service-time
+dm-snapshot
+dmx3191d
+dm-zero
+dnet
+dn_rtmsg
+doc2000
+doc2001
+doc2001plus
+docecc
+docprobe
+drm_kms_helper
+ds1682
+ds2482
+ds2490
+ds2760_battery
+ds2782_battery
+dsbr100
+dstr
+dummy
+dv1394
+e100
+e1000
+e1000e
+ebt_802_3
+ebtable_broute
+ebtable_filter
+ebtable_nat
+ebtables
+ebt_among
+ebt_arp
+ebt_arpreply
+ebt_dnat
+ebt_ip
+ebt_ip6
+ebt_limit
+ebt_log
+ebt_mark
+ebt_mark_m
+ebt_nflog
+ebt_pkttype
+ebt_redirect
+ebt_snat
+ebt_stp
+ebt_ulog
+ebt_vlan
+ecb
+ecryptfs
+eeprom
+eeprom_93cx6
+eeti_ts
+efs
+ehci-hcd
+elo
+em_cmp
+emi26
+emi62
+em_meta
+em_nbyte
+empeg
+ems_pci
+ems_usb
+em_text
+em_u32
+eni
+enic
+envctrl
+epat
+epca
+epia
+epic100
+eql
+esp4
+esp6
+esp_scsi
+et1011c
+et61x251
+eth1394
+ethoc
+evdev
+exofs
+exportfs
+f71805f
+f71882fg
+f75375s
+fat
+faulty
+fb_sys_fops
+fcoe
+fcrypt
+fdomain_cs
+fealnx
+ff-memless
+fit2
+fit3
+flash
+fmvj18x_cs
+fore_200e
+freevxfs
+friq
+frpw
+fscache
+ftdi-elan
+ftdi_sio
+ftl
+fujitsu_ts
+funsoft
+g760a
+gadgetfs
+garmin_gps
+garp
+g_audio
+g_cdc
+generic
+generic_bl
+gen_probe
+g_ether
+gf128mul
+g_file_storage
+gfs2
+ghash-generic
+gigaset
+gl520sm
+gl620a
+gluebi
+g_midi
+gpio-addr-flash
+gpio_keys
+gpio_mouse
+gpio_vbus
+g_printer
+g_serial
+gspca_conex
+gspca_etoms
+gspca_finepix
+gspca_gl860
+gspca_jeilinj
+gspca_m5602
+gspca_main
+gspca_mars
+gspca_mr97310a
+gspca_ov519
+gspca_ov534
+gspca_pac207
+gspca_pac7311
+gspca_sn9c20x
+gspca_sonixb
+gspca_sonixj
+gspca_spca500
+gspca_spca501
+gspca_spca505
+gspca_spca506
+gspca_spca508
+gspca_spca561
+gspca_sq905
+gspca_sq905c
+gspca_stk014
+gspca_stv06xx
+gspca_sunplus
+gspca_t613
+gspca_tv8532
+gspca_vc032x
+gspca_zc3xx
+gtco
+gunze
+g_zero
+hdpvr
+he
+hexium_gemini
+hexium_orion
+hfs
+hfsplus
+hid
+hid-3m-pct
+hid-a4tech
+hid-apple
+hid-belkin
+hid-cherry
+hid-chicony
+hid-cypress
+hid-drff
+hid-ezkey
+hid-gaff
+hid-gyration
+hid-kensington
+hid-kye
+hid-logitech
+hid-microsoft
+hid-monterey
+hid-mosart
+hid-ntrig
+hid-ortek
+hid-petalynx
+hid-pl
+hid-quanta
+hid-samsung
+hid-sjoy
+hid-sony
+hid-stantum
+hid-sunplus
+hid-tmff
+hid-topseed
+hid-twinhan
+hid-zpff
+hostap
+hostap_cs
+hostap_pci
+hostap_plx
+hp4x
+hpfs
+hptiop
+hso
+htc-pasic3
+hwa-hc
+hwa-rc
+hwmon-vid
+i1480-dfu-usb
+i1480-est
+i1480u-wlp
+i2400m
+i2400m-sdio
+i2400m-usb
+i2c-algo-pca
+i2c-dev
+i2c-gpio
+i2c-isch
+i2c-ocores
+i2c-parport
+i2c-parport-light
+i2c-pca-platform
+i2c-piix4
+i2c-simtec
+i2c-stub
+i2c-taos-evm
+i2c-tiny-usb
+i2o_block
+i2o_bus
+i2o_core
+i2o_proc
+i2o_scsi
+i5k_amb
+i82092
+ib_addr
+ib_cm
+ib_core
+ib_ipath
+ib_ipoib
+ib_iser
+ib_mad
+ibmaem
+ibmpex
+ib_mthca
+ib_sa
+ib_srp
+ib_ucm
+ib_umad
+ib_uverbs
+icplus
+ics932s401
+idmouse
+idt77252
+ieee1394
+ifb
+igbvf
+ili9320
+imm
+inexio
+inftl
+initio
+input-polldev
+int51x1
+intel_vr_nor
+ioc4
+io_edgeport
+io_ti
+iowarrior
+ip2
+ip6_queue
+ip6table_filter
+ip6table_mangle
+ip6table_raw
+ip6_tables
+ip6table_security
+ip6t_ah
+ip6t_eui64
+ip6t_frag
+ip6t_hbh
+ip6t_ipv6header
+ip6t_LOG
+ip6t_mh
+ip6t_REJECT
+ip6t_rt
+ip6_tunnel
+ipaq
+ipcomp
+ipcomp6
+ipg
+iphase
+ipip
+ipmi_devintf
+ipmi_msghandler
+ipmi_si
+ipmi_watchdog
+ip_queue
+ipr
+iptable_filter
+iptable_mangle
+iptable_nat
+iptable_raw
+ip_tables
+iptable_security
+ipt_addrtype
+ipt_ah
+ipt_CLUSTERIP
+ipt_ecn
+ipt_ECN
+ipt_LOG
+ipt_MASQUERADE
+ipt_NETMAP
+ipt_REDIRECT
+ipt_REJECT
+ipt_ULOG
+ipv6
+ip_vs
+ip_vs_dh
+ip_vs_ftp
+ip_vs_lblc
+ip_vs_lblcr
+ip_vs_lc
+ip_vs_nq
+ip_vs_rr
+ip_vs_sed
+ip_vs_sh
+ip_vs_wlc
+ip_vs_wrr
+ipw
+ipw2100
+ipw2200
+ipx
+ir-common
+ir-kbd-i2c
+ir-usb
+iscsi_tcp
+isdn
+isdnhdlc
+isight_firmware
+isl29003
+isofs
+isp116x-hcd
+isp1362-hcd
+isp1760
+istallion
+iuu_phoenix
+iw_c2
+iw_cm
+iw_cxgb3
+iwlagn
+iwlcore
+iwmc3200wifi
+ixgb
+ixgbe
+ixj
+ixj_pcmcia
+jedec_probe
+jffs2
+jfs
+jme
+jsm
+kafs
+kaweth
+kbic
+kbtab
+kernelcapi
+keyspan
+keyspan_pda
+keyspan_remote
+khazad
+kl5kusb105
+kobil_sct
+ks0108
+ks8842
+ks8851
+ks8851_mll
+ktti
+kvaser_pci
+lanai
+lcd
+ldusb
+lec
+led-class
+leds-bd2802
+leds-da903x
+leds-dac124s085
+leds-lp3944
+leds-pca9532
+leds-pca955x
+leds-sunfire
+leds-wm831x-status
+leds-wm8350
+ledtrig-backlight
+ledtrig-gpio
+legousbtower
+lib80211
+lib80211_crypt_ccmp
+lib80211_crypt_tkip
+lib80211_crypt_wep
+libata
+libcrc32c
+libertas
+libertas_cs
+libertas_sdio
+libertas_spi
+libertas_tf
+libertas_tf_usb
+libfc
+libfcoe
+libipw
+libiscsi
+libiscsi_tcp
+libosd
+libsas
+libsrp
+linear
+lis3lv02d
+lis3lv02d_spi
+lkkbd
+llc
+llc2
+lm63
+lm70
+lm8323
+lm87
+lm92
+lm93
+lm95241
+lms283gf05
+lockd
+lp
+lp3971
+lpddr_cmds
+lpfc
+lrw
+ltc4215
+ltc4245
+ltv350qv
+lxt
+lzo
+lzo_compress
+lzo_decompress
+m25p80
+mac80211
+mac80211_hwsim
+macvlan
+map_absent
+map_funcs
+map_ram
+map_rom
+marvell
+matrix_keypad
+matrox_w1
+max1111
+max1586
+max17040_battery
+max3100
+max6650
+max6875
+max7301
+max732x
+max7359_keypad
+mb862xxfb
+mc13783
+mc13783-core
+mc33880
+mc44s803
+mcp23s08
+mcs5000_ts
+mcs7830
+mct_u232
+md4
+mdc800
+mdio
+mdio-bitbang
+mdio-gpio
+md-mod
+megaraid
+megaraid_mbox
+megaraid_mm
+megaraid_sas
+metronomefb
+mfd-core
+mga
+michael_mic
+microtek
+mii
+minix
+mISDN_core
+mISDNinfineon
+mISDNipac
+mISDNisar
+mk712
+mlx4_core
+mlx4_en
+mlx4_ib
+mmc_block
+mmc_core
+mmc_spi
+mos7720
+mos7840
+moto_modem
+moxa
+mpoa
+mpt2sas
+mptbase
+mptctl
+mptfc
+mptlan
+mptsas
+mptscsih
+mptspi
+msdos
+msp3400
+mt20xx
+mt9m001
+mt9m111
+mt9t031
+mt9v011
+mt9v022
+mtd
+mtd_blkdevs
+mtdblock
+mtdblock_ro
+mtdchar
+mtdconcat
+mtd_dataflash
+mtd_oobtest
+mtdoops
+mtd_pagetest
+mtdram
+mtd_readtest
+mtd_speedtest
+mtd_stresstest
+mtd_subpagetest
+mtd_torturetest
+mtouch
+multipath
+mwl8k
+myri10ge
+myri_sbus
+nand
+nand_ecc
+nand_ids
+nandsim
+national
+natsemi
+navman
+nbd
+ncpfs
+ne2k-pci
+net1080
+netconsole
+netjet
+netwave_cs
+netxen_nic
+nf_conntrack
+nf_conntrack_amanda
+nf_conntrack_ftp
+nf_conntrack_h323
+nf_conntrack_ipv4
+nf_conntrack_ipv6
+nf_conntrack_irc
+nf_conntrack_netbios_ns
+nf_conntrack_netlink
+nf_conntrack_pptp
+nf_conntrack_proto_dccp
+nf_conntrack_proto_gre
+nf_conntrack_proto_sctp
+nf_conntrack_proto_udplite
+nf_conntrack_sane
+nf_conntrack_sip
+nf_conntrack_tftp
+nf_defrag_ipv4
+nf_nat
+nf_nat_amanda
+nf_nat_ftp
+nf_nat_h323
+nf_nat_irc
+nf_nat_pptp
+nf_nat_proto_dccp
+nf_nat_proto_gre
+nf_nat_proto_sctp
+nf_nat_proto_udplite
+nf_nat_sip
+nf_nat_snmp_basic
+nf_nat_tftp
+nfnetlink
+nfnetlink_log
+nfnetlink_queue
+nfs
+nfs_acl
+nfsd
+nftl
+nf_tproxy_core
+n_hdlc
+nilfs2
+niu
+nl802154
+nls_ascii
+nls_cp1250
+nls_cp1251
+nls_cp1255
+nls_cp437
+nls_cp737
+nls_cp775
+nls_cp850
+nls_cp852
+nls_cp855
+nls_cp857
+nls_cp860
+nls_cp861
+nls_cp862
+nls_cp863
+nls_cp864
+nls_cp865
+nls_cp866
+nls_cp869
+nls_cp874
+nls_cp932
+nls_cp936
+nls_cp949
+nls_cp950
+nls_euc-jp
+nls_iso8859-1
+nls_iso8859-13
+nls_iso8859-14
+nls_iso8859-15
+nls_iso8859-2
+nls_iso8859-3
+nls_iso8859-4
+nls_iso8859-5
+nls_iso8859-6
+nls_iso8859-7
+nls_iso8859-9
+nls_koi8-r
+nls_koi8-ru
+nls_koi8-u
+nls_utf8
+nmclan_cs
+nop-usb-xceiv
+n_r3964
+ns83820
+ntfs
+nvidiafb
+ocfs2
+ocfs2_dlm
+ocfs2_dlmfs
+ocfs2_nodemanager
+ocfs2_stackglue
+ocfs2_stack_o2cb
+ocfs2_stack_user
+of_mmc_spi
+ohci1394
+ohci-hcd
+omfs
+omninet
+on20
+on26
+onenand
+onenand_sim
+opencores-kbd
+openpromfs
+opticon
+option
+orinoco
+orinoco_cs
+osd
+osdblk
+osst
+oti6858
+output
+ov7670
+ov772x
+oxu210hp-hcd
+p54common
+p54pci
+p54spi
+p54usb
+p8022
+p8023
+paride
+parport
+parport_ax88796
+parport_cs
+parport_pc
+parport_serial
+parport_sunbpp
+pata_amd
+pata_atp867x
+pata_cs5520
+pata_efar
+pata_it8213
+pata_it821x
+pata_jmicron
+pata_marvell
+pata_mpiix
+pata_netcell
+pata_ninja32
+pata_oldpiix
+pata_pcmcia
+pata_pdc2027x
+pata_rdc
+pata_rz1000
+pata_sch
+pata_serverworks
+pata_sil680
+pata_sis
+pata_sl82c105
+pata_triflex
+pata_via
+pc87360
+pc87427
+pca953x
+pcbc
+pcd
+pcf50633-adc
+pcf50633-charger
+pcf50633-core
+pcf50633-gpio
+pcf50633-input
+pcf50633-regulator
+pcf857x
+pci
+pcilynx
+pcmcia
+pcmcia_core
+pcnet32
+pcnet_cs
+pcwd_pci
+pcwd_usb
+pd
+pd6729
+pda_power
+pdc_adma
+pegasus
+penmount
+pf
+pg
+phantom
+phonedev
+phonet
+phram
+physmap
+pktcdvd
+pl2303
+platform_lcd
+plat_nand
+plat-ram
+plip
+plusb
+pm3fb
+pmc551
+pmcraid
+pn_pep
+powermate
+ppa
+ppdev
+ppp_async
+ppp_deflate
+ppp_generic
+ppp_mppe
+pppoatm
+pppoe
+pppol2tp
+pppox
+ppp_synctty
+pps_core
+psmouse
+psnap
+pt
+pvrusb2
+qcserial
+qinfo_probe
+qla1280
+qla2xxx
+qla3xxx
+qla4xxx
+qlge
+qlogic_cs
+qlogicfas408
+qlogicpti
+qnx4
+qsemi
+quota_tree
+quota_v2
+r128
+r8a66597-hcd
+radeon
+radio-gemtek-pci
+radio-i2c-si470x
+radio-maestro
+radio-maxiradio
+radio-mr800
+radio-si4713
+radio-tea5764
+raid0
+raid1
+raid10
+raid456
+raid6_pq
+raid6test
+raid_class
+raw
+raw1394
+ray_cs
+rdma_cm
+rdma_ucm
+rds
+rds_rdma
+rds_tcp
+redboot
+reed_solomon
+reiserfs
+rfd_ftl
+rfkill
+ricoh_mmc
+rio500
+riowd
+rmd128
+rmd160
+rmd256
+rmd320
+rndis_host
+rocket
+romfs
+rotary_encoder
+rpcsec_gss_krb5
+rpcsec_gss_spkm3
+rsrc_nonstatic
+rt2400pci
+rt2500pci
+rt2500usb
+rt2800usb
+rt2x00lib
+rt2x00pci
+rt2x00usb
+rt61pci
+rt73usb
+rtc-ab3100
+rtc-ds1286
+rtc-ds1305
+rtc-ds1307
+rtc-ds1374
+rtc-ds1390
+rtc-ds1511
+rtc-ds1553
+rtc-ds1672
+rtc-ds1742
+rtc-ds3234
+rtc-fm3130
+rtc-isl1208
+rtc-m41t80
+rtc-m41t94
+rtc-m48t35
+rtc-m48t86
+rtc-max6900
+rtc-max6902
+rtc-pcf2123
+rtc-pcf50633
+rtc-pcf8563
+rtc-pcf8583
+rtc-r9701
+rtc-rs5c348
+rtc-rs5c372
+rtc-rx8025
+rtc-rx8581
+rtc-s35390a
+rtc-stk17ta8
+rtc-test
+rtc-twl4030
+rtc-v3020
+rtc-wm831x
+rtc-wm8350
+rtc-x1205
+rtl8150
+rtl8187
+rxkad
+s1d13xxxfb
+s2255drv
+s2io
+s3fb
+saa5246a
+saa6588
+saa6752hs
+saa7115
+saa7127
+saa7134
+saa7134-alsa
+saa7134-empress
+saa7146
+saa7146_vv
+saa717x
+safe_serial
+sata_inic162x
+sata_mv
+sata_nv
+sata_promise
+sata_qstor
+sata_sil
+sata_sil24
+sata_sis
+sata_svw
+sata_sx4
+sata_uli
+sata_via
+sata_vsc
+savage
+savagefb
+sbp2
+sc92031
+sch_atm
+sch_cbq
+sch_drr
+sch_dsmark
+sch_gred
+sch_hfsc
+sch_htb
+sch_ingress
+sch_multiq
+sch_netem
+sch_prio
+sch_red
+sch_sfq
+sch_tbf
+sch_teql
+scsi_dh
+scsi_dh_alua
+scsi_dh_emc
+scsi_dh_hp_sw
+scsi_dh_rdac
+scsi_mod
+scsi_tgt
+scsi_transport_fc
+scsi_transport_iscsi
+scsi_transport_sas
+scsi_transport_spi
+scsi_transport_srp
+scsi_wait_scan
+sctp
+sdhci
+sdhci-pci
+sdhci-pltfm
+sdio_uart
+sd_mod
+sdricoh_cs
+seed
+serial_cs
+serio_raw
+serpent
+serport
+sfc
+sg
+sha1_generic
+sha256_generic
+sha512_generic
+sht15
+si4713-i2c
+siemens_mpi
+sierra
+sis190
+sis5595
+sis900
+sisusbvga
+sit
+sja1000
+sja1000_platform
+skfp
+skge
+sky2
+sl811_cs
+sl811-hcd
+slhc
+slip
+slram
+sm501
+sm501fb
+smbfs
+smc91c92_cs
+smsc
+smsc47b397
+smsc47m1
+smsc47m192
+smsc9420
+smsc95xx
+sn9c102
+snd
+snd-ac97-codec
+snd-ad1889
+snd-ak4114
+snd-ak4117
+snd-ak4xxx-adda
+snd-ali5451
+snd-als300
+snd-atiixp
+snd-atiixp-modem
+snd-au8810
+snd-au8820
+snd-au8830
+snd-aw2
+snd-azt3328
+snd-bt87x
+snd-ca0106
+snd-cmipci
+snd-cs4281
+snd-cs46xx
+snd-cs5535audio
+snd-cs8427
+snd-ctxfi
+snd-darla20
+snd-darla24
+snd-dummy
+snd-echo3g
+snd-emu10k1
+snd-emu10k1-synth
+snd-emu10k1x
+snd-emux-synth
+snd-ens1370
+snd-ens1371
+snd-es1938
+snd-es1968
+snd-fm801
+snd-gina20
+snd-gina24
+snd-hda-codec
+snd-hda-codec-analog
+snd-hda-codec-atihdmi
+snd-hda-codec-ca0110
+snd-hda-codec-cirrus
+snd-hda-codec-cmedia
+snd-hda-codec-conexant
+snd-hda-codec-idt
+snd-hda-codec-intelhdmi
+snd-hda-codec-nvhdmi
+snd-hda-codec-realtek
+snd-hda-codec-si3054
+snd-hda-codec-via
+snd-hda-intel
+snd-hdsp
+snd-hdspm
+snd-hrtimer
+snd-hwdep
+snd-i2c
+snd-ice1712
+snd-ice1724
+snd-ice17xx-ak4xxx
+snd-indigo
+snd-indigodj
+snd-indigodjx
+snd-indigoio
+snd-indigoiox
+snd-intel8x0
+snd-intel8x0m
+snd-korg1212
+snd-layla20
+snd-layla24
+snd-lx6464es
+snd-maestro3
+snd-mia
+snd-mixart
+snd-mixer-oss
+snd-mona
+snd-mpu401
+snd-mpu401-uart
+snd-mtpav
+snd-mts64
+snd-nm256
+snd-opl3-lib
+snd-opl3-synth
+snd-page-alloc
+snd-pcm
+snd-pcm-oss
+snd-pcxhr
+snd-pdaudiocf
+snd-portman2x4
+snd-pt2258
+snd-rawmidi
+snd-riptide
+snd-rme32
+snd-rme96
+snd-rme9652
+snd-seq
+snd-seq-device
+snd-seq-dummy
+snd-seq-midi
+snd-seq-midi-emul
+snd-seq-midi-event
+snd-seq-oss
+snd-seq-virmidi
+snd-serial-u16550
+snd-soc-ad1836
+snd-soc-ad1938
+snd-soc-ad73311
+snd-soc-ak4104
+snd-soc-ak4535
+snd-soc-ak4642
+snd-soc-core
+snd-soc-cs4270
+snd-soc-l3
+snd-soc-max9877
+snd-soc-pcm3008
+snd-soc-spdif
+snd-soc-ssm2602
+snd-soc-tlv320aic23
+snd-soc-tlv320aic26
+snd-soc-tlv320aic3x
+snd-soc-twl4030
+snd-soc-uda134x
+snd-soc-uda1380
+snd-soc-wm8350
+snd-soc-wm8400
+snd-soc-wm8510
+snd-soc-wm8523
+snd-soc-wm8580
+snd-soc-wm8728
+snd-soc-wm8731
+snd-soc-wm8750
+snd-soc-wm8753
+snd-soc-wm8776
+snd-soc-wm8900
+snd-soc-wm8903
+snd-soc-wm8940
+snd-soc-wm8960
+snd-soc-wm8961
+snd-soc-wm8971
+snd-soc-wm8974
+snd-soc-wm8988
+snd-soc-wm8990
+snd-soc-wm8993
+snd-soc-wm9081
+snd-soc-wm-hubs
+snd-sonicvibes
+snd-sun-amd7930
+snd-sun-cs4231
+snd-sun-dbri
+snd-tea575x-tuner
+snd-timer
+snd-trident
+snd-usb-audio
+snd-usb-caiaq
+snd-usb-lib
+snd-util-mem
+snd-via82xx
+snd-via82xx-modem
+snd-virmidi
+snd-vx222
+snd-vx-lib
+snd-vxpocket
+snd-ymfpci
+soc_camera
+soc_camera_platform
+softdog
+solos-pci
+soundcore
+sound_firmware
+spcp8x5
+spectrum_cs
+speedfax
+speedtch
+spi_bitbang
+spi_butterfly
+spidev
+spi_gpio
+spi_lm70llp
+squashfs
+sr_mod
+ssb
+ssfdc
+sst25l
+st
+stallion
+starfire
+ste10Xp
+stex
+stowaway
+stp
+strip
+sunbmac
+sundance
+sun_esp
+suni
+sunlance
+sunqe
+sunrpc
+sun_uflash
+sunvdc
+sunvnet
+svcrdma
+svgalib
+sx8
+sym53c500_cs
+sym53c8xx
+symbolserial
+synaptics_i2c
+synclink_cs
+synclink_gt
+synclinkmp
+syscopyarea
+sysfillrect
+sysimgblt
+sysv
+tcm825x
+tcp_bic
+tcp_highspeed
+tcp_htcp
+tcp_hybla
+tcp_illinois
+tcp_lp
+tcp_probe
+tcp_scalable
+tcp_vegas
+tcp_veno
+tcp_westwood
+tcp_yeah
+tda8290
+tda9840
+tda9887
+tdfx
+tdo24m
+tea
+tea5761
+tea5767
+tea6415c
+tea6420
+tehuti
+tg3
+tgr192
+thmc50
+ths7303
+tifm_7xx1
+tifm_core
+tifm_sd
+timeriomem-rng
+tipc
+ti_usb_3410_5052
+tlan
+tle62x0
+tlv320aic23b
+tmiofb
+tmp401
+tmp421
+touchit213
+touchright
+touchwin
+tpm
+tpm_atmel
+tpm_nsc
+tps65010
+tps65023-regulator
+tps6507x-regulator
+trancevibrator
+ts_bm
+tsc2007
+ts_fsm
+ts_kmp
+tsl2550
+ttm
+tulip
+tuner
+tuner-simple
+tuner-types
+tuner-xc2028
+tunnel4
+tunnel6
+tveeprom
+tvp514x
+tvp5150
+tw9910
+twl4030-gpio
+twl4030_keypad
+twl4030-pwrbutton
+twl4030-usb
+twl4030_wdt
+twofish
+twofish_common
+typhoon
+u132-hcd
+ubi
+ubifs
+ucb1400_core
+ucb1400_ts
+uctrl
+udf
+ueagle-atm
+ufs
+uhci-hcd
+uio
+uio_aec
+uio_cif
+uio_pci_generic
+uio_pdrv
+uio_pdrv_genirq
+uio_sercos3
+uio_smx
+uli526x
+ultra45_env
+umc
+umem
+ums-alauda
+ums-cypress
+ums-datafab
+ums-freecom
+ums-isd200
+ums-jumpshot
+ums-karma
+ums-onetouch
+ums-sddr09
+ums-sddr55
+ums-usbat
+upd64031a
+upd64083
+usb8xxx
+usbatm
+usbcore
+usb_debug
+usbhid
+usblcd
+usbled
+usblp
+usbmon
+usbnet
+usbserial
+usbsevseg
+usb-storage
+usbtest
+usbtmc
+usbtouchscreen
+usbvision
+userspace-consumer
+uss720
+uvcvideo
+uvesafb
+uwb
+v4l1-compat
+v4l2-common
+v4l2-compat-ioctl32
+v4l2-int-device
+vcan
+veth
+vfat
+vgastate
+vgg2432a4
+via
+viafb
+via-rhine
+via-sdmmc
+via-velocity
+video1394
+videobuf-core
+videobuf-dma-sg
+videobuf-vmalloc
+videodev
+virtual
+visor
+vitesse
+vmac
+vp27smpx
+vstusb
+vt1211
+vt8231
+vt8623fb
+vxge
+w1_bq27000
+w1_ds2431
+w1_ds2433
+w1_ds2760
+w1-gpio
+w1_smem
+w1_therm
+w6692
+w83627ehf
+w83791d
+w83792d
+w83793
+wacom_w8001
+wavelan_cs
+wdt_pci
+whci
+whci-hcd
+whc-rc
+whiteheat
+wimax
+winbond-840
+wire
+wl1251
+wl1251_sdio
+wl1251_spi
+wl1271
+wl3501_cs
+wlp
+wm831x
+wm831x_bl
+wm831x-dcdc
+wm831x-gpio
+wm831x-hwmon
+wm831x-isink
+wm831x-ldo
+wm831x-on
+wm831x_power
+wm831x_wdt
+wm8350
+wm8350-hwmon
+wm8350-i2c
+wm8350_power
+wm8350-regulator
+wm8350_wdt
+wm8400-core
+wm8400-regulator
+wm8739
+wm8775
+wm97xx-ts
+wp512
+wpan-class
+wusb-cbaf
+wusbcore
+wusb-wa
+xc5000
+xcbc
+xfrm4_mode_beet
+xfrm4_mode_transport
+xfrm4_mode_tunnel
+xfrm4_tunnel
+xfrm6_mode_beet
+xfrm6_mode_ro
+xfrm6_mode_transport
+xfrm6_mode_tunnel
+xfrm6_tunnel
+xfrm_ipcomp
+xfrm_user
+xfs
+xhci
+xirc2ps_cs
+xircom_cb
+xor
+xprtrdma
+x_tables
+xt_CLASSIFY
+xt_cluster
+xt_comment
+xt_connbytes
+xt_connlimit
+xt_connmark
+xt_CONNMARK
+xt_CONNSECMARK
+xt_conntrack
+xt_dccp
+xt_dscp
+xt_DSCP
+xt_esp
+xt_hashlimit
+xt_helper
+xt_hl
+xt_HL
+xt_LED
+xt_length
+xt_limit
+xt_mac
+xt_mark
+xt_MARK
+xt_multiport
+xt_NFLOG
+xt_NFQUEUE
+xt_NOTRACK
+xt_osf
+xt_physdev
+xt_pkttype
+xt_policy
+xt_quota
+xt_realm
+xt_recent
+xts
+xt_sctp
+xt_SECMARK
+xt_socket
+xt_state
+xt_statistic
+xt_string
+xt_tcpmss
+xt_TCPMSS
+xt_tcpudp
+xt_time
+xt_TPROXY
+xt_TRACE
+xt_u32
+xusbatm
+yealink
+yellowfin
+yenta_socket
+zc0301
+zd1201
+zd1211rw
+zlib
+zlib_deflate
+zr364xx
--- linux-mvl-dove-2.6.32.orig/debian.master/abi/2.6.32-34.73/sparc/sparc64.modules
+++ linux-mvl-dove-2.6.32/debian.master/abi/2.6.32-34.73/sparc/sparc64.modules
@@ -0,0 +1,1752 @@
+3c574_cs
+3c589_cs
+3c59x
+3w-9xxx
+3w-xxxx
+8021q
+8139cp
+8139too
+8250
+8250_pci
+8390
+9p
+9pnet
+9pnet_rdma
+a100u2w
+aacraid
+ab3100
+ab3100-core
+ab3100-otp
+ac97_bus
+acecad
+acenic
+act_gact
+act_ipt
+act_mirred
+act_nat
+act_pedit
+act_police
+act_simple
+act_skbedit
+ad7414
+ad7418
+ad7877
+ad7879
+adcxx
+adfs
+adm1026
+adm1029
+adm8211
+adm9240
+adp5588-keys
+ads7846
+adt7462
+adt7470
+adt7475
+adutux
+adv7180
+adv7343
+aes_generic
+af_802154
+affs
+af_key
+af-rxrpc
+ah4
+ah6
+ahci
+aic79xx
+aic94xx
+aiptek
+aircable
+airo
+airo_cs
+alauda
+alim7101_wdt
+ansi_cprng
+anubis
+aoe
+appledisplay
+appletalk
+appletouch
+applicom
+ar7part
+ar9170usb
+arc4
+arcmsr
+ark3116
+arkfb
+arptable_filter
+arp_tables
+arpt_mangle
+asix
+async_memcpy
+async_pq
+async_raid6_recov
+async_tx
+async_xor
+at24
+at25
+at76c50x-usb
+ata_generic
+ata_piix
+aten
+ath
+ath9k
+ati_remote
+ati_remote2
+atl1
+atl1c
+atl1e
+atl2
+atm
+atmel
+atmel_cs
+atmel_pci
+atmtcp
+atp870u
+atxp1
+authenc
+auth_rpcgss
+autofs
+autofs4
+avmfritz
+axnet_cs
+b43
+b43legacy
+b44
+bbc
+bcm5974
+be2iscsi
+be2net
+befs
+belkin_sa
+berry_charge
+bfa
+bfs
+binfmt_misc
+block2mtd
+blowfish
+bnx2
+bnx2i
+bonding
+bpck
+bq24022
+bq27x00_battery
+br2684
+bridge
+broadcom
+broadsheetfb
+bsd_comp
+bt8xxgpio
+btrfs
+c67x00
+cachefiles
+cafe_ccic
+cafe_nand
+camellia
+can
+can-bcm
+can-dev
+can-raw
+carminefb
+cassini
+cast5
+cast6
+catc
+cb710
+cb710-mmc
+cbc
+cciss
+cdc-acm
+cdc_eem
+cdc_ether
+cdc-phonet
+cdc_subset
+cdc-wdm
+cdrom
+cfg80211
+cfi_cmdset_0001
+cfi_cmdset_0002
+cfi_cmdset_0020
+cfi_probe
+cfi_util
+ch341
+chipreg
+chmc
+cicada
+cifs
+clip
+cls_basic
+cls_flow
+cls_fw
+cls_route
+cls_rsvp
+cls_rsvp6
+cls_tcindex
+cls_u32
+cm109
+cn
+cnic
+coda
+comm
+configfs
+core
+cp210x
+cpwd
+cramfs
+crc32c
+crc7
+crc-ccitt
+crc-itu-t
+crc-t10dif
+cryptd
+cryptoloop
+crypto_null
+cs53l32a
+cts
+cuse
+cx231xx
+cx231xx-alsa
+cx2341x
+cx25840
+cxacru
+cxgb
+cxgb3
+cxgb3i
+cyberjack
+cyclades
+cypress_cy7c63
+cypress_m8
+cytherm
+da9030_battery
+da9034-ts
+da903x
+da903x_bl
+DAC960
+davicom
+dc395x
+dccp
+dccp_diag
+dccp_ipv4
+dccp_ipv6
+dccp_probe
+de600
+de620
+decnet
+deflate
+digi_acceleport
+diskonchip
+display
+display7seg
+dl2k
+dlm
+dm9601
+dm-crypt
+dme1737
+dm-log
+dm-mirror
+dm-multipath
+dm-queue-length
+dm-region-hash
+dm-round-robin
+dm-service-time
+dm-snapshot
+dmx3191d
+dm-zero
+dnet
+dn_rtmsg
+doc2000
+doc2001
+doc2001plus
+docecc
+docprobe
+drm_kms_helper
+ds1682
+ds2482
+ds2490
+ds2760_battery
+ds2782_battery
+dsbr100
+dstr
+dummy
+dv1394
+e100
+e1000
+e1000e
+ebt_802_3
+ebtable_broute
+ebtable_filter
+ebtable_nat
+ebtables
+ebt_among
+ebt_arp
+ebt_arpreply
+ebt_dnat
+ebt_ip
+ebt_ip6
+ebt_limit
+ebt_log
+ebt_mark
+ebt_mark_m
+ebt_nflog
+ebt_pkttype
+ebt_redirect
+ebt_snat
+ebt_stp
+ebt_ulog
+ebt_vlan
+ecb
+ecryptfs
+eeprom
+eeprom_93cx6
+eeti_ts
+efs
+ehci-hcd
+elo
+em_cmp
+emi26
+emi62
+em_meta
+em_nbyte
+empeg
+ems_pci
+ems_usb
+em_text
+em_u32
+eni
+enic
+envctrl
+epat
+epca
+epia
+epic100
+eql
+esp4
+esp6
+esp_scsi
+et1011c
+et61x251
+eth1394
+ethoc
+evdev
+exofs
+exportfs
+f71805f
+f71882fg
+f75375s
+fat
+faulty
+fb_sys_fops
+fcoe
+fcrypt
+fdomain_cs
+fealnx
+ff-memless
+fit2
+fit3
+flash
+fmvj18x_cs
+fore_200e
+freevxfs
+friq
+frpw
+fscache
+ftdi-elan
+ftdi_sio
+ftl
+fujitsu_ts
+funsoft
+g760a
+gadgetfs
+garmin_gps
+garp
+g_audio
+g_cdc
+generic
+generic_bl
+gen_probe
+g_ether
+gf128mul
+g_file_storage
+gfs2
+ghash-generic
+gigaset
+gl520sm
+gl620a
+gluebi
+g_midi
+gpio-addr-flash
+gpio_keys
+gpio_mouse
+gpio_vbus
+g_printer
+g_serial
+gspca_conex
+gspca_etoms
+gspca_finepix
+gspca_gl860
+gspca_jeilinj
+gspca_m5602
+gspca_main
+gspca_mars
+gspca_mr97310a
+gspca_ov519
+gspca_ov534
+gspca_pac207
+gspca_pac7311
+gspca_sn9c20x
+gspca_sonixb
+gspca_sonixj
+gspca_spca500
+gspca_spca501
+gspca_spca505
+gspca_spca506
+gspca_spca508
+gspca_spca561
+gspca_sq905
+gspca_sq905c
+gspca_stk014
+gspca_stv06xx
+gspca_sunplus
+gspca_t613
+gspca_tv8532
+gspca_vc032x
+gspca_zc3xx
+gtco
+gunze
+g_zero
+hdpvr
+he
+hexium_gemini
+hexium_orion
+hfs
+hfsplus
+hid
+hid-3m-pct
+hid-a4tech
+hid-apple
+hid-belkin
+hid-cherry
+hid-chicony
+hid-cypress
+hid-drff
+hid-ezkey
+hid-gaff
+hid-gyration
+hid-kensington
+hid-kye
+hid-logitech
+hid-microsoft
+hid-monterey
+hid-mosart
+hid-ntrig
+hid-ortek
+hid-petalynx
+hid-pl
+hid-quanta
+hid-samsung
+hid-sjoy
+hid-sony
+hid-stantum
+hid-sunplus
+hid-tmff
+hid-topseed
+hid-twinhan
+hid-zpff
+hostap
+hostap_cs
+hostap_pci
+hostap_plx
+hp4x
+hpfs
+hptiop
+hso
+htc-pasic3
+hwa-hc
+hwa-rc
+hwmon-vid
+i1480-dfu-usb
+i1480-est
+i1480u-wlp
+i2400m
+i2400m-sdio
+i2400m-usb
+i2c-algo-pca
+i2c-dev
+i2c-gpio
+i2c-isch
+i2c-ocores
+i2c-parport
+i2c-parport-light
+i2c-pca-platform
+i2c-piix4
+i2c-simtec
+i2c-stub
+i2c-taos-evm
+i2c-tiny-usb
+i2o_block
+i2o_bus
+i2o_core
+i2o_proc
+i2o_scsi
+i5k_amb
+i82092
+ib_addr
+ib_cm
+ib_core
+ib_ipath
+ib_ipoib
+ib_iser
+ib_mad
+ibmaem
+ibmpex
+ib_mthca
+ib_sa
+ib_srp
+ib_ucm
+ib_umad
+ib_uverbs
+icplus
+ics932s401
+idmouse
+idt77252
+ieee1394
+ifb
+igbvf
+ili9320
+imm
+inexio
+inftl
+initio
+input-polldev
+int51x1
+intel_vr_nor
+ioc4
+io_edgeport
+io_ti
+iowarrior
+ip2
+ip6_queue
+ip6table_filter
+ip6table_mangle
+ip6table_raw
+ip6_tables
+ip6table_security
+ip6t_ah
+ip6t_eui64
+ip6t_frag
+ip6t_hbh
+ip6t_ipv6header
+ip6t_LOG
+ip6t_mh
+ip6t_REJECT
+ip6t_rt
+ip6_tunnel
+ipaq
+ipcomp
+ipcomp6
+ipg
+iphase
+ipip
+ipmi_devintf
+ipmi_msghandler
+ipmi_si
+ipmi_watchdog
+ip_queue
+ipr
+iptable_filter
+iptable_mangle
+iptable_nat
+iptable_raw
+ip_tables
+iptable_security
+ipt_addrtype
+ipt_ah
+ipt_CLUSTERIP
+ipt_ecn
+ipt_ECN
+ipt_LOG
+ipt_MASQUERADE
+ipt_NETMAP
+ipt_REDIRECT
+ipt_REJECT
+ipt_ULOG
+ipv6
+ip_vs
+ip_vs_dh
+ip_vs_ftp
+ip_vs_lblc
+ip_vs_lblcr
+ip_vs_lc
+ip_vs_nq
+ip_vs_rr
+ip_vs_sed
+ip_vs_sh
+ip_vs_wlc
+ip_vs_wrr
+ipw
+ipw2100
+ipw2200
+ipx
+ir-common
+ir-kbd-i2c
+ir-usb
+iscsi_tcp
+isdn
+isdnhdlc
+isight_firmware
+isl29003
+isofs
+isp116x-hcd
+isp1362-hcd
+isp1760
+istallion
+iuu_phoenix
+iw_c2
+iw_cm
+iw_cxgb3
+iwlagn
+iwlcore
+iwmc3200wifi
+ixgb
+ixgbe
+ixj
+ixj_pcmcia
+jedec_probe
+jffs2
+jfs
+jme
+jsm
+kafs
+kaweth
+kbic
+kbtab
+kernelcapi
+keyspan
+keyspan_pda
+keyspan_remote
+khazad
+kl5kusb105
+kobil_sct
+ks0108
+ks8842
+ks8851
+ks8851_mll
+ktti
+kvaser_pci
+lanai
+lcd
+ldusb
+lec
+led-class
+leds-bd2802
+leds-da903x
+leds-dac124s085
+leds-lp3944
+leds-pca9532
+leds-pca955x
+leds-sunfire
+leds-wm831x-status
+leds-wm8350
+ledtrig-backlight
+ledtrig-gpio
+legousbtower
+lib80211
+lib80211_crypt_ccmp
+lib80211_crypt_tkip
+lib80211_crypt_wep
+libata
+libcrc32c
+libertas
+libertas_cs
+libertas_sdio
+libertas_spi
+libertas_tf
+libertas_tf_usb
+libfc
+libfcoe
+libipw
+libiscsi
+libiscsi_tcp
+libosd
+libsas
+libsrp
+linear
+lis3lv02d
+lis3lv02d_spi
+lkkbd
+llc
+llc2
+lm63
+lm70
+lm8323
+lm87
+lm92
+lm93
+lm95241
+lms283gf05
+lockd
+lp
+lp3971
+lpddr_cmds
+lpfc
+lrw
+ltc4215
+ltc4245
+ltv350qv
+lxt
+lzo
+lzo_compress
+lzo_decompress
+m25p80
+mac80211
+mac80211_hwsim
+macvlan
+map_absent
+map_funcs
+map_ram
+map_rom
+marvell
+matrix_keypad
+matrox_w1
+max1111
+max1586
+max17040_battery
+max3100
+max6650
+max6875
+max7301
+max732x
+max7359_keypad
+mb862xxfb
+mc13783
+mc13783-core
+mc33880
+mc44s803
+mcp23s08
+mcs5000_ts
+mcs7830
+mct_u232
+md4
+mdc800
+mdio
+mdio-bitbang
+mdio-gpio
+md-mod
+megaraid
+megaraid_mbox
+megaraid_mm
+megaraid_sas
+metronomefb
+mfd-core
+mga
+michael_mic
+microtek
+mii
+minix
+mISDN_core
+mISDNinfineon
+mISDNipac
+mISDNisar
+mk712
+mlx4_core
+mlx4_en
+mlx4_ib
+mmc_block
+mmc_core
+mmc_spi
+mos7720
+mos7840
+moto_modem
+moxa
+mpoa
+mpt2sas
+mptbase
+mptctl
+mptfc
+mptlan
+mptsas
+mptscsih
+mptspi
+msdos
+msp3400
+mt20xx
+mt9m001
+mt9m111
+mt9t031
+mt9v011
+mt9v022
+mtd
+mtd_blkdevs
+mtdblock
+mtdblock_ro
+mtdchar
+mtdconcat
+mtd_dataflash
+mtd_oobtest
+mtdoops
+mtd_pagetest
+mtdram
+mtd_readtest
+mtd_speedtest
+mtd_stresstest
+mtd_subpagetest
+mtd_torturetest
+mtouch
+multipath
+mwl8k
+myri10ge
+myri_sbus
+nand
+nand_ecc
+nand_ids
+nandsim
+national
+natsemi
+navman
+nbd
+ncpfs
+ne2k-pci
+net1080
+netconsole
+netjet
+netwave_cs
+netxen_nic
+nf_conntrack
+nf_conntrack_amanda
+nf_conntrack_ftp
+nf_conntrack_h323
+nf_conntrack_ipv4
+nf_conntrack_ipv6
+nf_conntrack_irc
+nf_conntrack_netbios_ns
+nf_conntrack_netlink
+nf_conntrack_pptp
+nf_conntrack_proto_dccp
+nf_conntrack_proto_gre
+nf_conntrack_proto_sctp
+nf_conntrack_proto_udplite
+nf_conntrack_sane
+nf_conntrack_sip
+nf_conntrack_tftp
+nf_defrag_ipv4
+nf_nat
+nf_nat_amanda
+nf_nat_ftp
+nf_nat_h323
+nf_nat_irc
+nf_nat_pptp
+nf_nat_proto_dccp
+nf_nat_proto_gre
+nf_nat_proto_sctp
+nf_nat_proto_udplite
+nf_nat_sip
+nf_nat_snmp_basic
+nf_nat_tftp
+nfnetlink
+nfnetlink_log
+nfnetlink_queue
+nfs
+nfs_acl
+nfsd
+nftl
+nf_tproxy_core
+n_hdlc
+nilfs2
+niu
+nl802154
+nls_ascii
+nls_cp1250
+nls_cp1251
+nls_cp1255
+nls_cp437
+nls_cp737
+nls_cp775
+nls_cp850
+nls_cp852
+nls_cp855
+nls_cp857
+nls_cp860
+nls_cp861
+nls_cp862
+nls_cp863
+nls_cp864
+nls_cp865
+nls_cp866
+nls_cp869
+nls_cp874
+nls_cp932
+nls_cp936
+nls_cp949
+nls_cp950
+nls_euc-jp
+nls_iso8859-1
+nls_iso8859-13
+nls_iso8859-14
+nls_iso8859-15
+nls_iso8859-2
+nls_iso8859-3
+nls_iso8859-4
+nls_iso8859-5
+nls_iso8859-6
+nls_iso8859-7
+nls_iso8859-9
+nls_koi8-r
+nls_koi8-ru
+nls_koi8-u
+nls_utf8
+nmclan_cs
+nop-usb-xceiv
+n_r3964
+ns83820
+ntfs
+nvidiafb
+ocfs2
+ocfs2_dlm
+ocfs2_dlmfs
+ocfs2_nodemanager
+ocfs2_stackglue
+ocfs2_stack_o2cb
+ocfs2_stack_user
+of_mmc_spi
+ohci1394
+ohci-hcd
+omfs
+omninet
+on20
+on26
+onenand
+onenand_sim
+opencores-kbd
+openpromfs
+opticon
+option
+orinoco
+orinoco_cs
+osd
+osdblk
+osst
+oti6858
+output
+ov7670
+ov772x
+oxu210hp-hcd
+p54common
+p54pci
+p54spi
+p54usb
+p8022
+p8023
+paride
+parport
+parport_ax88796
+parport_cs
+parport_pc
+parport_serial
+parport_sunbpp
+pata_amd
+pata_atp867x
+pata_cs5520
+pata_efar
+pata_it8213
+pata_it821x
+pata_jmicron
+pata_marvell
+pata_mpiix
+pata_netcell
+pata_ninja32
+pata_oldpiix
+pata_pcmcia
+pata_pdc2027x
+pata_rdc
+pata_rz1000
+pata_sch
+pata_serverworks
+pata_sil680
+pata_sis
+pata_sl82c105
+pata_triflex
+pata_via
+pc87360
+pc87427
+pca953x
+pcbc
+pcd
+pcf50633-adc
+pcf50633-charger
+pcf50633-core
+pcf50633-gpio
+pcf50633-input
+pcf50633-regulator
+pcf857x
+pci
+pcilynx
+pcmcia
+pcmcia_core
+pcnet32
+pcnet_cs
+pcwd_pci
+pcwd_usb
+pd
+pd6729
+pda_power
+pdc_adma
+pegasus
+penmount
+pf
+pg
+phantom
+phonedev
+phonet
+phram
+physmap
+pktcdvd
+pl2303
+platform_lcd
+plat_nand
+plat-ram
+plip
+plusb
+pm3fb
+pmc551
+pmcraid
+pn_pep
+powermate
+ppa
+ppdev
+ppp_async
+ppp_deflate
+ppp_generic
+ppp_mppe
+pppoatm
+pppoe
+pppol2tp
+pppox
+ppp_synctty
+pps_core
+psmouse
+psnap
+pt
+pvrusb2
+qcserial
+qinfo_probe
+qla1280
+qla2xxx
+qla3xxx
+qla4xxx
+qlge
+qlogic_cs
+qlogicfas408
+qlogicpti
+qnx4
+qsemi
+quota_tree
+quota_v2
+r128
+r8a66597-hcd
+radeon
+radio-gemtek-pci
+radio-i2c-si470x
+radio-maestro
+radio-maxiradio
+radio-mr800
+radio-si4713
+radio-tea5764
+raid0
+raid1
+raid10
+raid456
+raid6_pq
+raid6test
+raid_class
+raw
+raw1394
+ray_cs
+rdma_cm
+rdma_ucm
+rds
+rds_rdma
+rds_tcp
+redboot
+reed_solomon
+reiserfs
+rfd_ftl
+rfkill
+ricoh_mmc
+rio500
+riowd
+rmd128
+rmd160
+rmd256
+rmd320
+rndis_host
+rocket
+romfs
+rotary_encoder
+rpcsec_gss_krb5
+rpcsec_gss_spkm3
+rsrc_nonstatic
+rt2400pci
+rt2500pci
+rt2500usb
+rt2800usb
+rt2x00lib
+rt2x00pci
+rt2x00usb
+rt61pci
+rt73usb
+rtc-ab3100
+rtc-ds1286
+rtc-ds1305
+rtc-ds1307
+rtc-ds1374
+rtc-ds1390
+rtc-ds1511
+rtc-ds1553
+rtc-ds1672
+rtc-ds1742
+rtc-ds3234
+rtc-fm3130
+rtc-isl1208
+rtc-m41t80
+rtc-m41t94
+rtc-m48t35
+rtc-m48t86
+rtc-max6900
+rtc-max6902
+rtc-pcf2123
+rtc-pcf50633
+rtc-pcf8563
+rtc-pcf8583
+rtc-r9701
+rtc-rs5c348
+rtc-rs5c372
+rtc-rx8025
+rtc-rx8581
+rtc-s35390a
+rtc-stk17ta8
+rtc-test
+rtc-twl4030
+rtc-v3020
+rtc-wm831x
+rtc-wm8350
+rtc-x1205
+rtl8150
+rtl8187
+rxkad
+s1d13xxxfb
+s2255drv
+s2io
+s3fb
+saa5246a
+saa6588
+saa6752hs
+saa7115
+saa7127
+saa7134
+saa7134-alsa
+saa7134-empress
+saa7146
+saa7146_vv
+saa717x
+safe_serial
+sata_inic162x
+sata_mv
+sata_nv
+sata_promise
+sata_qstor
+sata_sil
+sata_sil24
+sata_sis
+sata_svw
+sata_sx4
+sata_uli
+sata_via
+sata_vsc
+savage
+savagefb
+sbp2
+sc92031
+sch_atm
+sch_cbq
+sch_drr
+sch_dsmark
+sch_gred
+sch_hfsc
+sch_htb
+sch_ingress
+sch_multiq
+sch_netem
+sch_prio
+sch_red
+sch_sfq
+sch_tbf
+sch_teql
+scsi_dh
+scsi_dh_alua
+scsi_dh_emc
+scsi_dh_hp_sw
+scsi_dh_rdac
+scsi_mod
+scsi_tgt
+scsi_transport_fc
+scsi_transport_iscsi
+scsi_transport_sas
+scsi_transport_spi
+scsi_transport_srp
+scsi_wait_scan
+sctp
+sdhci
+sdhci-pci
+sdhci-pltfm
+sdio_uart
+sd_mod
+sdricoh_cs
+seed
+serial_cs
+serio_raw
+serpent
+serport
+sfc
+sg
+sha1_generic
+sha256_generic
+sha512_generic
+sht15
+si4713-i2c
+siemens_mpi
+sierra
+sis190
+sis5595
+sis900
+sisusbvga
+sit
+sja1000
+sja1000_platform
+skfp
+skge
+sky2
+sl811_cs
+sl811-hcd
+slhc
+slip
+slram
+sm501
+sm501fb
+smbfs
+smc91c92_cs
+smsc
+smsc47b397
+smsc47m1
+smsc47m192
+smsc9420
+smsc95xx
+sn9c102
+snd
+snd-ac97-codec
+snd-ad1889
+snd-ak4114
+snd-ak4117
+snd-ak4xxx-adda
+snd-ali5451
+snd-als300
+snd-atiixp
+snd-atiixp-modem
+snd-au8810
+snd-au8820
+snd-au8830
+snd-aw2
+snd-azt3328
+snd-bt87x
+snd-ca0106
+snd-cmipci
+snd-cs4281
+snd-cs46xx
+snd-cs5535audio
+snd-cs8427
+snd-ctxfi
+snd-darla20
+snd-darla24
+snd-dummy
+snd-echo3g
+snd-emu10k1
+snd-emu10k1-synth
+snd-emu10k1x
+snd-emux-synth
+snd-ens1370
+snd-ens1371
+snd-es1938
+snd-es1968
+snd-fm801
+snd-gina20
+snd-gina24
+snd-hda-codec
+snd-hda-codec-analog
+snd-hda-codec-atihdmi
+snd-hda-codec-ca0110
+snd-hda-codec-cirrus
+snd-hda-codec-cmedia
+snd-hda-codec-conexant
+snd-hda-codec-idt
+snd-hda-codec-intelhdmi
+snd-hda-codec-nvhdmi
+snd-hda-codec-realtek
+snd-hda-codec-si3054
+snd-hda-codec-via
+snd-hda-intel
+snd-hdsp
+snd-hdspm
+snd-hrtimer
+snd-hwdep
+snd-i2c
+snd-ice1712
+snd-ice1724
+snd-ice17xx-ak4xxx
+snd-indigo
+snd-indigodj
+snd-indigodjx
+snd-indigoio
+snd-indigoiox
+snd-intel8x0
+snd-intel8x0m
+snd-korg1212
+snd-layla20
+snd-layla24
+snd-lx6464es
+snd-maestro3
+snd-mia
+snd-mixart
+snd-mixer-oss
+snd-mona
+snd-mpu401
+snd-mpu401-uart
+snd-mtpav
+snd-mts64
+snd-nm256
+snd-opl3-lib
+snd-opl3-synth
+snd-page-alloc
+snd-pcm
+snd-pcm-oss
+snd-pcxhr
+snd-pdaudiocf
+snd-portman2x4
+snd-pt2258
+snd-rawmidi
+snd-riptide
+snd-rme32
+snd-rme96
+snd-rme9652
+snd-seq
+snd-seq-device
+snd-seq-dummy
+snd-seq-midi
+snd-seq-midi-emul
+snd-seq-midi-event
+snd-seq-oss
+snd-seq-virmidi
+snd-serial-u16550
+snd-soc-ad1836
+snd-soc-ad1938
+snd-soc-ad73311
+snd-soc-ak4104
+snd-soc-ak4535
+snd-soc-ak4642
+snd-soc-core
+snd-soc-cs4270
+snd-soc-l3
+snd-soc-max9877
+snd-soc-pcm3008
+snd-soc-spdif
+snd-soc-ssm2602
+snd-soc-tlv320aic23
+snd-soc-tlv320aic26
+snd-soc-tlv320aic3x
+snd-soc-twl4030
+snd-soc-uda134x
+snd-soc-uda1380
+snd-soc-wm8350
+snd-soc-wm8400
+snd-soc-wm8510
+snd-soc-wm8523
+snd-soc-wm8580
+snd-soc-wm8728
+snd-soc-wm8731
+snd-soc-wm8750
+snd-soc-wm8753
+snd-soc-wm8776
+snd-soc-wm8900
+snd-soc-wm8903
+snd-soc-wm8940
+snd-soc-wm8960
+snd-soc-wm8961
+snd-soc-wm8971
+snd-soc-wm8974
+snd-soc-wm8988
+snd-soc-wm8990
+snd-soc-wm8993
+snd-soc-wm9081
+snd-soc-wm-hubs
+snd-sonicvibes
+snd-sun-amd7930
+snd-sun-cs4231
+snd-sun-dbri
+snd-tea575x-tuner
+snd-timer
+snd-trident
+snd-usb-audio
+snd-usb-caiaq
+snd-usb-lib
+snd-util-mem
+snd-via82xx
+snd-via82xx-modem
+snd-virmidi
+snd-vx222
+snd-vx-lib
+snd-vxpocket
+snd-ymfpci
+soc_camera
+soc_camera_platform
+softdog
+solos-pci
+soundcore
+sound_firmware
+spcp8x5
+spectrum_cs
+speedfax
+speedtch
+spi_bitbang
+spi_butterfly
+spidev
+spi_gpio
+spi_lm70llp
+squashfs
+sr_mod
+ssb
+ssfdc
+sst25l
+st
+stallion
+starfire
+ste10Xp
+stex
+stowaway
+stp
+strip
+sunbmac
+sundance
+sun_esp
+suni
+sunlance
+sunqe
+sunrpc
+sun_uflash
+sunvdc
+sunvnet
+svcrdma
+svgalib
+sx8
+sym53c500_cs
+sym53c8xx
+symbolserial
+synaptics_i2c
+synclink_cs
+synclink_gt
+synclinkmp
+syscopyarea
+sysfillrect
+sysimgblt
+sysv
+tcm825x
+tcp_bic
+tcp_highspeed
+tcp_htcp
+tcp_hybla
+tcp_illinois
+tcp_lp
+tcp_probe
+tcp_scalable
+tcp_vegas
+tcp_veno
+tcp_westwood
+tcp_yeah
+tda8290
+tda9840
+tda9887
+tdfx
+tdo24m
+tea
+tea5761
+tea5767
+tea6415c
+tea6420
+tehuti
+tg3
+tgr192
+thmc50
+ths7303
+tifm_7xx1
+tifm_core
+tifm_sd
+timeriomem-rng
+tipc
+ti_usb_3410_5052
+tlan
+tle62x0
+tlv320aic23b
+tmiofb
+tmp401
+tmp421
+touchit213
+touchright
+touchwin
+tpm
+tpm_atmel
+tpm_nsc
+tps65010
+tps65023-regulator
+tps6507x-regulator
+trancevibrator
+ts_bm
+tsc2007
+ts_fsm
+ts_kmp
+tsl2550
+ttm
+tulip
+tuner
+tuner-simple
+tuner-types
+tuner-xc2028
+tunnel4
+tunnel6
+tveeprom
+tvp514x
+tvp5150
+tw9910
+twl4030-gpio
+twl4030_keypad
+twl4030-pwrbutton
+twl4030-usb
+twl4030_wdt
+twofish
+twofish_common
+typhoon
+u132-hcd
+ubi
+ubifs
+ucb1400_core
+ucb1400_ts
+uctrl
+udf
+ueagle-atm
+ufs
+uhci-hcd
+uio
+uio_aec
+uio_cif
+uio_pci_generic
+uio_pdrv
+uio_pdrv_genirq
+uio_sercos3
+uio_smx
+uli526x
+ultra45_env
+umc
+umem
+ums-alauda
+ums-cypress
+ums-datafab
+ums-freecom
+ums-isd200
+ums-jumpshot
+ums-karma
+ums-onetouch
+ums-sddr09
+ums-sddr55
+ums-usbat
+upd64031a
+upd64083
+usb8xxx
+usbatm
+usbcore
+usb_debug
+usbhid
+usblcd
+usbled
+usblp
+usbmon
+usbnet
+usbserial
+usbsevseg
+usb-storage
+usbtest
+usbtmc
+usbtouchscreen
+usbvision
+userspace-consumer
+uss720
+uvcvideo
+uvesafb
+uwb
+v4l1-compat
+v4l2-common
+v4l2-compat-ioctl32
+v4l2-int-device
+vcan
+veth
+vfat
+vgastate
+vgg2432a4
+via
+viafb
+via-rhine
+via-sdmmc
+via-velocity
+video1394
+videobuf-core
+videobuf-dma-sg
+videobuf-vmalloc
+videodev
+virtual
+visor
+vitesse
+vmac
+vp27smpx
+vstusb
+vt1211
+vt8231
+vt8623fb
+vxge
+w1_bq27000
+w1_ds2431
+w1_ds2433
+w1_ds2760
+w1-gpio
+w1_smem
+w1_therm
+w6692
+w83627ehf
+w83791d
+w83792d
+w83793
+wacom_w8001
+wavelan_cs
+wdt_pci
+whci
+whci-hcd
+whc-rc
+whiteheat
+wimax
+winbond-840
+wire
+wl1251
+wl1251_sdio
+wl1251_spi
+wl1271
+wl3501_cs
+wlp
+wm831x
+wm831x_bl
+wm831x-dcdc
+wm831x-gpio
+wm831x-hwmon
+wm831x-isink
+wm831x-ldo
+wm831x-on
+wm831x_power
+wm831x_wdt
+wm8350
+wm8350-hwmon
+wm8350-i2c
+wm8350_power
+wm8350-regulator
+wm8350_wdt
+wm8400-core
+wm8400-regulator
+wm8739
+wm8775
+wm97xx-ts
+wp512
+wpan-class
+wusb-cbaf
+wusbcore
+wusb-wa
+xc5000
+xcbc
+xfrm4_mode_beet
+xfrm4_mode_transport
+xfrm4_mode_tunnel
+xfrm4_tunnel
+xfrm6_mode_beet
+xfrm6_mode_ro
+xfrm6_mode_transport
+xfrm6_mode_tunnel
+xfrm6_tunnel
+xfrm_ipcomp
+xfrm_user
+xfs
+xhci
+xirc2ps_cs
+xircom_cb
+xor
+xprtrdma
+x_tables
+xt_CLASSIFY
+xt_cluster
+xt_comment
+xt_connbytes
+xt_connlimit
+xt_connmark
+xt_CONNMARK
+xt_CONNSECMARK
+xt_conntrack
+xt_dccp
+xt_dscp
+xt_DSCP
+xt_esp
+xt_hashlimit
+xt_helper
+xt_hl
+xt_HL
+xt_LED
+xt_length
+xt_limit
+xt_mac
+xt_mark
+xt_MARK
+xt_multiport
+xt_NFLOG
+xt_NFQUEUE
+xt_NOTRACK
+xt_osf
+xt_physdev
+xt_pkttype
+xt_policy
+xt_quota
+xt_realm
+xt_recent
+xts
+xt_sctp
+xt_SECMARK
+xt_socket
+xt_state
+xt_statistic
+xt_string
+xt_tcpmss
+xt_TCPMSS
+xt_tcpudp
+xt_time
+xt_TPROXY
+xt_TRACE
+xt_u32
+xusbatm
+yealink
+yellowfin
+yenta_socket
+zc0301
+zd1201
+zd1211rw
+zlib
+zlib_deflate
+zr364xx
--- linux-mvl-dove-2.6.32.orig/debian.master/abi/2.6.32-34.73/amd64/preempt
+++ linux-mvl-dove-2.6.32/debian.master/abi/2.6.32-34.73/amd64/preempt
@@ -0,0 +1,10359 @@
+EXPORT_SYMBOL arch/x86/kvm/kvm 0x24fd4a7a	kvm_cpu_has_pending_timer
+EXPORT_SYMBOL arch/x86/kvm/kvm 0x610075bd	kvm_read_guest_atomic
+EXPORT_SYMBOL crypto/gf128mul 0x0c2f123f	gf128mul_4k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x1068004b	gf128mul_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x2f2889a0	gf128mul_init_64k_lle
+EXPORT_SYMBOL crypto/gf128mul 0x3755f990	gf128mul_init_64k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x384ef9ce	gf128mul_64k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x56af0dbd	gf128mul_x_ble
+EXPORT_SYMBOL crypto/gf128mul 0x83581089	gf128mul_init_4k_lle
+EXPORT_SYMBOL crypto/gf128mul 0x9b2560b9	gf128mul_init_4k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x9e13f6f6	gf128mul_lle
+EXPORT_SYMBOL crypto/gf128mul 0xbd17a0df	gf128mul_4k_lle
+EXPORT_SYMBOL crypto/gf128mul 0xc0890413	gf128mul_64k_lle
+EXPORT_SYMBOL crypto/gf128mul 0xd60736ec	gf128mul_free_64k
+EXPORT_SYMBOL crypto/xor 0x5b6c00e6	xor_blocks
+EXPORT_SYMBOL drivers/acpi/video 0x7a45377b	acpi_video_unregister
+EXPORT_SYMBOL drivers/acpi/video 0x8826c13b	acpi_video_register
+EXPORT_SYMBOL drivers/atm/suni 0x4fc83196	suni_init
+EXPORT_SYMBOL drivers/atm/uPD98402 0x91a5fb16	uPD98402_init
+EXPORT_SYMBOL drivers/block/paride/paride 0x1e546445	pi_init
+EXPORT_SYMBOL drivers/block/paride/paride 0x291ca06e	pi_read_block
+EXPORT_SYMBOL drivers/block/paride/paride 0x59af8d33	pi_connect
+EXPORT_SYMBOL drivers/block/paride/paride 0x877b6bc1	pi_release
+EXPORT_SYMBOL drivers/block/paride/paride 0x9cae3f1e	paride_register
+EXPORT_SYMBOL drivers/block/paride/paride 0xa08db81d	pi_schedule_claimed
+EXPORT_SYMBOL drivers/block/paride/paride 0xc0a288c7	pi_do_claimed
+EXPORT_SYMBOL drivers/block/paride/paride 0xd1024898	pi_read_regr
+EXPORT_SYMBOL drivers/block/paride/paride 0xd39500f0	pi_disconnect
+EXPORT_SYMBOL drivers/block/paride/paride 0xe0a6e0e3	paride_unregister
+EXPORT_SYMBOL drivers/block/paride/paride 0xf481afe1	pi_write_block
+EXPORT_SYMBOL drivers/block/paride/paride 0xfe135228	pi_write_regr
+EXPORT_SYMBOL drivers/char/agp/intel-agp 0x7b9a6116	intel_agp_enabled
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x0177f5c8	ipmi_unregister_smi
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x14974879	ipmi_destroy_user
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x15b255cf	ipmi_register_for_cmd
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x26ff333f	ipmi_free_recv_msg
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x2908b9b7	ipmi_smi_watcher_unregister
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x30127ee6	ipmi_get_version
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x32dc302f	ipmi_set_my_address
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x37f5990b	ipmi_request_settime
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x40f2b10c	ipmi_alloc_smi_msg
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x4a46cbb3	ipmi_get_maintenance_mode
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x4f5c3b53	ipmi_smi_add_proc_entry
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x59b92e48	ipmi_request_supply_msgs
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x601acbbc	ipmi_get_my_LUN
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x62484bfd	ipmi_register_smi
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x73fb56c4	ipmi_unregister_for_cmd
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x804f922a	ipmi_addr_length
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x883bc92d	ipmi_set_gets_events
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x939bef0b	ipmi_smi_msg_received
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xa02d802d	ipmi_create_user
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xd10103a2	ipmi_set_my_LUN
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xd298a996	ipmi_smi_watchdog_pretimeout
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe41172c4	ipmi_set_maintenance_mode
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe4f4665b	ipmi_validate_addr
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe6a5a068	ipmi_smi_watcher_register
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xee680a8d	ipmi_poll_interface
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xf7a8dbde	ipmi_get_my_address
+EXPORT_SYMBOL drivers/char/nsc_gpio 0x52336830	nsc_gpio_dump
+EXPORT_SYMBOL drivers/char/nsc_gpio 0x709c3192	nsc_gpio_write
+EXPORT_SYMBOL drivers/char/nsc_gpio 0x8f7adfd1	nsc_gpio_read
+EXPORT_SYMBOL drivers/char/nvram 0x0f28cb91	nvram_read_byte
+EXPORT_SYMBOL drivers/char/nvram 0x17ff2c1d	__nvram_read_byte
+EXPORT_SYMBOL drivers/char/nvram 0x2adec1e0	__nvram_check_checksum
+EXPORT_SYMBOL drivers/char/nvram 0x7da28f12	nvram_check_checksum
+EXPORT_SYMBOL drivers/char/nvram 0x9ce3f83f	nvram_write_byte
+EXPORT_SYMBOL drivers/char/nvram 0xa8813189	__nvram_write_byte
+EXPORT_SYMBOL drivers/edac/edac_core 0x07d282da	edac_mc_find
+EXPORT_SYMBOL drivers/edac/edac_core 0x2a6fe144	edac_mc_handle_fbd_ue
+EXPORT_SYMBOL drivers/edac/edac_core 0xef490ea8	edac_mc_handle_fbd_ce
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x195a66a0	fw_core_remove_address_handler
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x2b2e6006	fw_core_add_address_handler
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x2ea76786	fw_iso_buffer_init
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x3452fbe4	fw_device_enable_phys_dma
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x49a29946	fw_core_remove_descriptor
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x4bedc53d	fw_send_response
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x4e86dd83	fw_core_add_descriptor
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x529ea96f	fw_iso_context_stop
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x6acce7b8	fw_core_handle_response
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x6b584dc3	fw_iso_context_queue
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x6c45a310	fw_iso_context_destroy
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x79f2de8f	fw_iso_context_create
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x7d1878f4	fw_cancel_transaction
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x89e66aba	fw_iso_buffer_destroy
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x90863005	fw_high_memory_region
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xa7fbf147	fw_core_handle_request
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xae2baf1e	fw_card_initialize
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xafc1c793	fw_csr_iterator_next
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xb047a2c6	fw_csr_iterator_init
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xb6bf45f6	fw_card_add
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xba1b8230	fw_run_transaction
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xc6c2584c	fw_bus_type
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xcb547411	fw_core_initiate_bus_reset
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xd569457e	fw_send_request
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xdd9afce5	fw_fill_response
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xf163bd46	fw_core_handle_bus_reset
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xfc0da2f2	fw_core_remove_card
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xfcb3dfe3	fw_iso_context_start
+EXPORT_SYMBOL drivers/firmware/dcdbas 0xa75079d6	dcdbas_smi_request
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x015c3c3b	drm_vblank_off
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0836695c	drm_sman_takedown
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0a4a0e8c	drm_master_put
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0ab6b877	drm_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x106f214b	drm_get_dev
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x13b5dafe	drm_mm_dump_table
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x16b25521	drm_get_edid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x193e6f90	drm_free_agp
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x199ecc36	drm_compat_ioctl
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1f072c59	drm_property_add_enum
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x20645642	drm_debug
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x21451ac4	drm_sman_owner_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2152e43a	drm_pci_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2215c8cb	drm_mode_connector_detach_encoder
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x25cd5254	drm_agp_chipset_flush
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x266a10fe	drm_sg_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2673f4ce	drm_crtc_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x27d05283	drm_property_destroy
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2916bf63	drm_sman_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x291707f1	drm_vblank_pre_modeset
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2eb2f903	drm_sman_free_key
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3074f033	drm_order
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x314594e0	drm_unbind_agp
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x32ff25c8	drm_exit
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x33125503	drm_ati_pcigart_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x342d3908	drm_mode_attachmode_crtc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x35f63f8b	drm_mode_config_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3a2f21a8	drm_mm_search_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3a30180e	drm_agp_enable
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3a8d2758	drm_mode_connector_update_edid_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3c9a1409	drm_ht_just_insert_please
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3d289d78	drm_framebuffer_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3d618bce	drm_get_connector_name
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x40911aaf	drm_mm_debug_table
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4791691d	drm_get_resource_len
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x47e5b0da	drm_connector_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x480230ff	drm_mode_object_find
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4a4acd1d	drm_agp_info
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4a4f45b2	drm_sysfs_hotplug_event
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4be8a07e	drm_gem_handle_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4c26967a	drm_fasync
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x50e8e5ba	drm_addmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x51b3425d	drm_connector_property_set_value
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5460f61d	drm_poll
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x547c0f42	drm_agp_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x54d61c9d	drm_core_ioremapfree
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x55977653	drm_agp_bind
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x55cca65e	drm_addbufs_agp
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x55f060ee	drm_sman_set_range
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x56217ed2	drm_mm_clean
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5630b5c9	drm_mode_validate_clocks
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x575af9fc	drm_gem_mmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x57f7dbe6	drm_mm_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x580830f0	drm_mode_set_name
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x59fd469b	drm_mode_detachmode_crtc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x59ff4f49	drm_lock_take
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5d86bd5b	drm_mode_probed_add
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5fcd4eb9	drm_agp_bind_pages
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5ff52fc7	drm_vblank_put
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6030ca27	drm_sysfs_connector_remove
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x623c8e9c	drm_mode_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x631e3b31	drm_gem_object_lookup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x63a293a3	drm_addbufs_pci
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6518c19a	drm_mm_get_block_range_generic
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x669755c7	drm_add_modes_noedid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x66da35a5	drm_connector_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x68dff059	drm_gtf_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6990194a	drm_debugfs_remove_files
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x69cf99aa	drm_mode_create_tv_properties
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6cffa244	drm_gem_vm_close
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6d2e5837	drm_ut_debug_printk
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6f5aa232	drm_mode_create_dvi_i_properties
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6fc30481	drm_mode_hsync
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x701e3f89	drm_i2c_encoder_destroy
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x718cc2ae	drm_framebuffer_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7299e2ac	drm_open
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x76195c06	drm_connector_property_get_value
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x76863e24	drm_mm_pre_get
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x784915eb	drm_mode_vrefresh
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x78f546bc	drm_clflush_pages
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7a1243bb	drm_mode_create_dirty_info_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7becf9f2	drm_gem_object_handle_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7c1fd6c8	drm_mode_equal
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7e5ec9ef	drm_idlelock_take
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x849241ac	drm_mm_put_block
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x85de09f5	drm_mode_width
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x87d6e7ef	drm_detect_hdmi_monitor
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x89721e89	drm_lock_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x899758f0	drm_read
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8e62d513	drm_mm_search_free_in_range
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8e822cac	drm_cvt_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x93764b34	drm_agp_acquire
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9766af6e	drm_debugfs_create_files
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x98746a54	drm_encoder_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x99d70454	drm_get_drawable_info
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9d32d125	drm_release
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9d3b01a2	drm_vblank_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa1eabd87	drm_mode_list_concat
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa37a15f1	drm_mode_prune_invalid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa433988c	drm_rmmap_locked
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa58849a8	drm_mode_config_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa74940a4	drm_sysfs_connector_add
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa81bb222	drm_mode_validate_size
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa963963f	drm_get_encoder_name
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa9d7e77b	drm_pci_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xab628336	drm_put_dev
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xabb7e4db	drm_agp_unbind
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xac051f70	drm_mode_connector_attach_encoder
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xac7ffe3b	drm_mode_create_dithering_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xad6f95d3	drm_agp_release
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xaf29788e	drm_sman_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb1249a09	drm_irq_uninstall
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb196dfa4	drm_ioctl
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb1b17618	drm_getsarea
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb60a528d	drm_mmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb64e4cd5	drm_mm_init_scan
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb8109826	drm_property_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb9517358	drm_gem_vm_open
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xbc9bdf26	drm_ati_pcigart_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xbcdb5f92	drm_mode_connector_list_update
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xbe3ff597	drm_vblank_get
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xbf62f1a1	drm_vblank_post_modeset
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc4ea85d8	drm_mm_scan_remove_block
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc71d4465	drm_mode_duplicate
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xca14e1e8	drm_i_have_hw_lock
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcbd851bd	drm_master_get
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcd64a331	drm_core_get_reg_ofs
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcdf2eff4	drm_mode_height
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcfb4f4ef	drm_mm_scan_add_block
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd0535816	drm_mode_destroy
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd08fa3f0	drm_mode_set_crtcinfo
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd21ad287	drm_mode_crtc_set_gamma_size
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3028e75	drm_sman_set_manager
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3a1f2b6	drm_irq_install
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3cd6920	drm_core_ioremap_wc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3ffab51	drm_ht_remove
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd4a9e454	drm_connector_attach_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd4c8a354	drm_mm_get_block_generic
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd63d6819	drm_core_get_map_ofs
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd8afc1b6	drm_core_reclaim_buffers
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xda52a4ea	drm_vblank_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdcba6a5d	drm_agp_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd3febe2	drm_gem_object_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd49095c	drm_ht_insert_item
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xde8c1af6	drm_rmmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdf809d4e	drm_crtc_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe1457735	drm_ht_remove_item
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe24a7b88	drm_ht_find_item
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe5bdce7e	drm_mode_debug_printmodeline
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe69400eb	drm_handle_vblank
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe7052610	drm_i2c_encoder_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe919dd5c	drm_sman_owner_clean
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe9a66b03	drm_get_resource_start
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xea322a3a	drm_core_ioremap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xed359582	drm_vblank_count
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xedd4d5ff	drm_encoder_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xef07f86d	drm_add_edid_modes
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf1421d13	drm_mode_sort
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf16def2f	drm_idlelock_release
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf2777be9	drm_mode_create_scaling_mode_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf42a2b26	drm_ht_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf4a65f7e	drm_do_probe_ddc_edid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf83e3758	drm_gem_object_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfa769c65	drm_mm_takedown
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfdaa7eeb	drm_mode_remove
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfdfbad19	drm_sman_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x07adfe71	i2c_dp_aux_add_bus
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x12b5b444	drm_helper_connector_dpms
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x174343bd	drm_fb_helper_setcolreg
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x185bdd35	drm_fb_helper_init_crtc_count
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x349c9caf	drm_fb_helper_single_fb_probe
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x394df66f	drm_helper_encoder_in_use
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x50428889	drm_helper_probe_connector_modes
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x7b052cbd	drm_helper_disable_unused_functions
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x7b87082e	drm_fb_helper_add_connector
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x7e673a32	drm_fb_helper_free
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x93642035	drm_fb_helper_check_var
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x9d251144	drm_fb_helper_panic
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x9ed860f7	drm_fb_helper_set_par
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xa644d4cc	drm_helper_hotplug_stage_two
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xa67056ac	drm_helper_initial_config
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xa76b28f0	drm_fb_helper_fill_var
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xbc6151ba	drm_fb_helper_fill_fix
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xc469c244	drm_fb_helper_restore
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xc78154c9	drm_helper_probe_single_connector_modes
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xce2f3b0d	drm_crtc_helper_set_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xd18467a8	drm_helper_mode_fill_fb_struct
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xe0e13584	drm_fb_helper_setcmap
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xe7f3c07a	drm_helper_resume_force_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xedec85f1	drm_fb_helper_pan_display
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xf1826ed3	drm_crtc_helper_set_config
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xfcd95f74	drm_fb_helper_blank
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xfd8c1dba	drm_helper_crtc_in_use
+EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x36b09d1a	intelfb_remove
+EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x8ca67677	intelfb_probe
+EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x938ae15c	intelfb_resize
+EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0x1405c426	radeonfb_resize
+EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0x7a2f3769	radeonfb_remove
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x01c99cb0	ttm_write_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x0f111a83	ttm_mem_global_alloc
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x1a7d4fb3	ttm_bo_reserve
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x1ba8c0ef	ttm_lock_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x1d455396	ttm_ref_object_add
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x1dab216b	ttm_mem_global_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x261df01f	ttm_bo_kunmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x2a074206	ttm_tt_bind
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x2d673efd	ttm_vt_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x2e87eac2	ttm_bo_evict_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x35d54bb3	ttm_bo_synccpu_write_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x365feb2e	ttm_eu_reserve_buffers
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x37c55af9	ttm_bo_kmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x3ade5cfc	ttm_base_object_lookup
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x3b79b5f6	ttm_bo_init_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x3df39355	ttm_object_device_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x3e863634	ttm_bo_unreserve
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x44409a13	ttm_global_item_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x4d9b60de	ttm_bo_swapout_all
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x52ba9bf0	ttm_object_device_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x56c42d22	ttm_suspend_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x5ca5cb47	ttm_global_item_ref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x61bdb34f	ttm_eu_fence_buffer_objects
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x69313066	ttm_agp_backend_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x69d81dd8	ttm_object_file_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x765cbc82	ttm_read_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x7f8879de	ttm_vt_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x80807e63	ttm_bo_synccpu_write_grab
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x83878306	ttm_bo_move_ttm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x86a4066d	ttm_eu_backoff_reservation
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x8db796d4	ttm_write_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x8e14b57f	ttm_tt_populate
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x91114fc6	ttm_bo_unmap_virtual
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x913b7875	ttm_bo_mem_space
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x97d5ca21	ttm_base_object_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x98f8f0e5	ttm_bo_clean_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xa5437f2e	ttm_base_object_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xac0e50d1	ttm_round_pot
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb13ca61c	ttm_bo_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb17a9f94	ttm_tt_set_placement_caching
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb2d91509	ttm_mem_global_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb5cf2fe9	ttm_suspend_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb64dd919	ttm_ref_object_base_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xbadc1e27	ttm_bo_move_accel_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xbba2ecf9	ttm_read_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc00a8e96	ttm_bo_mmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc2058ac0	ttm_io_prot
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc3cc0f6a	ttm_bo_wait_cpu
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc524755f	ttm_mem_global_free
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc64022a6	ttm_bo_global_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xcbd90e38	ttm_fbdev_mmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xcc761edf	ttm_bo_validate
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xcf9a2b18	ttm_object_file_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xdd3eedda	ttm_bo_device_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xe3f7a3b1	ttm_bo_move_memcpy
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xe9cc7363	ttm_bo_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xf08835ed	ttm_bo_wait_unreserved
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xf9a2aa41	ttm_bo_device_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xfcce372b	ttm_bo_global_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xfd113d23	ttm_bo_wait
+EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0x0903c239	vid_from_reg
+EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0xef1c781c	vid_which_vrm
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-bit 0x0f3fd0c0	i2c_bit_add_bus
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-bit 0xc157864c	i2c_bit_add_numbered_bus
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0xa3d46422	i2c_pca_add_bus
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0xe852d404	i2c_pca_add_numbered_bus
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pcf 0xb589c12c	i2c_pcf_add_bus
+EXPORT_SYMBOL drivers/i2c/busses/i2c-amd756 0x73c7ba5c	amd756_smbus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x01542a0b	hpsb_selfid_complete
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x04251aee	hpsb_unregister_protocol
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x061f4017	hpsb_read_cycle_timer
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x06ba2667	hpsb_iso_xmit_start
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x07f6ab4e	hpsb_get_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0b234c4e	dma_prog_region_alloc
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0be348c4	hpsb_iso_recv_listen_channel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0c46a2dc	hpsb_iso_recv_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x158ac548	dma_region_offset_to_bus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1a200e5a	csr1212_release_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1be77d17	hpsb_destroy_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1caef759	hpsb_iso_wake
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1d4e1f64	hpsb_iso_xmit_sync
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x23d40200	hpsb_iso_packet_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2a4cc36b	csr1212_attach_keyval_to_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2ebf6e5a	dma_prog_region_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x302d6c0c	hpsb_get_hostinfo_bykey
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x38513a7c	hpsb_make_lockpacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3fad3339	hpsb_send_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x49a95dc4	csr1212_get_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4a7f927f	hpsb_free_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4a9cd770	csr1212_parse_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4e5782ba	dma_region_mmap
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4f5aff2a	hpsb_make_lock64packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4fa20139	hpsb_get_tlabel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x54f63252	hpsb_create_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x584bcf10	hpsb_make_streampacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5f5fdd2f	csr1212_new_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x64c2baa5	hpsb_node_fill_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x66209812	hpsb_register_highlevel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x672ad148	dma_region_sync_for_device
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x68b51e47	csr1212_read
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6cd685bc	hpsb_iso_shutdown
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6e029432	hpsb_unregister_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6f35c5c7	hpsb_unregister_highlevel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7401440f	hpsb_set_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x757e7a76	hpsb_iso_recv_start
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x76bc1a5c	dma_region_free
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x78361836	hpsb_iso_recv_unlisten_channel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7959cd05	hpsb_iso_recv_set_channel_mask
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7b258975	hpsb_update_config_rom_image
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7b928dce	hpsb_iso_xmit_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7f63be1a	__hpsb_register_protocol
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8879f8f0	dma_region_sync_for_cpu
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8d3eee26	hpsb_packet_success
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8da5e80b	hpsb_write
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8ec2b312	dma_region_alloc
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8f89db39	hpsb_bus_reset
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x98f25701	hpsb_alloc_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9caaab96	hpsb_iso_xmit_queue_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9f4acd06	hpsb_resume_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa369cf8d	hpsb_packet_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa5fdb5c5	hpsb_register_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa8a51988	hpsb_node_write
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xacb089eb	hpsb_iso_n_ready
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xacda6e7c	hpsb_lock
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaef57bb5	csr1212_detach_keyval_from_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb56b103b	hpsb_iso_recv_flush
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc214a502	hpsb_protocol_class
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc44d880f	hpsb_iso_recv_release_packets
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc4fd3d36	hpsb_make_writepacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc53ae4d1	hpsb_allocate_and_register_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xcd9e772b	dma_prog_region_free
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xcfc529c1	hpsb_read
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xcfe65671	hpsb_iso_stop
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd03c8f5c	hpsb_set_hostinfo_key
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd3621003	hpsb_free_tlabel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd364eb95	hpsb_iso_packet_sent
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd4a9db64	hpsb_add_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xde516294	hpsb_remove_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe4f61ea1	hpsb_alloc_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe64e0f7a	hpsb_make_readpacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe8485522	hpsb_packet_sent
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xea4152ff	dma_region_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xeded944d	hpsb_update_config_rom
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xee171f2d	hpsb_selfid_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfba57f51	hpsb_speedto_str
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfcfe4e98	hpsb_make_phypacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfd5660eb	hpsb_reset_bus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfe08d84e	hpsb_set_packet_complete_task
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x177a9edb	ohci1394_stop_context
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x1d5aeebc	ohci1394_init_iso_tasklet
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x99ef30cb	ohci1394_register_iso_tasklet
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0xf8bc2d51	ohci1394_unregister_iso_tasklet
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x12963a43	rdma_addr_cancel
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x2accdc14	rdma_translate_ip
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x844887be	rdma_resolve_ip
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x8a721ed9	rdma_addr_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xc91bb9d3	rdma_addr_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xcc1b93a7	rdma_copy_addr
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x1476652a	ib_send_cm_apr
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x16c8ed70	ib_send_cm_rtu
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x206aeb46	ib_cm_notify
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x293e06e7	ib_cm_listen
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x3c2dab21	ib_destroy_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x465a9385	ib_send_cm_mra
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x498c932d	cm_class
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x59f0a7f6	ib_create_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x631e66a5	ib_send_cm_sidr_req
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x77b26517	ib_send_cm_dreq
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x853dbbb1	ib_send_cm_sidr_rep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x899f797b	ib_send_cm_drep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x8e5b2525	ib_send_cm_lap
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xbb6e70dc	ib_send_cm_rep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xcbdccfa8	ib_send_cm_req
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xe1216bc0	ib_send_cm_rej
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xf931b89a	ib_cm_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x05485629	ib_register_event_handler
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x059cdd1d	ib_dealloc_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x06830b9a	ib_pack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0cf0c282	ib_reg_phys_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0ebee9cb	ib_register_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x14346e25	ib_modify_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x166031de	ib_get_dma_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1ae700e9	ib_fmr_pool_unmap
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1e491a04	ib_unmap_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1e94a1b2	ib_dealloc_pd
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1eb0fe14	ib_modify_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x312260f9	ib_alloc_mw
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x346bb6c8	ib_umem_release
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3805571f	ib_get_client_data
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3bd48ff6	ib_query_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3cbfe9e3	ib_query_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3db811e7	ib_create_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3f7567fd	ib_rate_to_mult
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3fd5af67	ib_find_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x416dd18d	ib_alloc_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x437536c9	ib_alloc_pd
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x48875294	ib_query_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x49d78b9f	ib_get_cached_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4ef9645f	ib_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x54b112d4	ib_create_ah_from_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5894754b	ib_query_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5f6b346b	ib_alloc_fast_reg_page_list
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6495e295	ib_set_client_data
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x64ec2878	ib_attach_mcast
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x683d1ad4	ib_create_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x68ec6d4f	ib_resize_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x694476a8	ib_unregister_event_handler
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6bf1d1cc	ib_modify_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6c54ffef	ib_destroy_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6d1f8e68	ib_dispatch_event
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6d27d1a4	ib_dealloc_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6f0e2491	ib_query_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6f8aff33	ib_destroy_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x75e7579c	ib_destroy_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8640eaeb	ib_modify_qp_is_ok
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x87b614d8	ib_ud_header_pack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x894b3a87	ib_query_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x908662bd	ib_query_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x947e70f6	ib_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x94ef3b93	ib_unregister_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x96ce6c46	rdma_node_get_transport
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9d804fa1	mult_to_ib_rate
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9f7806bf	ib_destroy_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9fa54389	ib_get_cached_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa57f1b70	ib_flush_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa5ea8808	ib_create_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa74c1506	ib_free_fast_reg_page_list
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xaa8a7c92	ib_alloc_fast_reg_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xad5a4ca7	ib_get_cached_lmc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xad6093c8	ib_dereg_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb3606270	ib_create_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb4aca4cd	ib_dealloc_mw
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb792dc87	ib_init_ah_from_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xba3234c3	ib_modify_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xbb517af6	ib_find_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xbf2c376b	ib_destroy_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc1b62195	ib_umem_page_count
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc1f99faa	ib_detach_mcast
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd17ba9d1	ib_ud_header_init
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd27797af	ib_umem_get
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xdd1797dd	ib_alloc_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe03b2bf1	ib_fmr_pool_map_phys
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe2c70d37	ib_create_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe343a690	ib_find_cached_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xeda3535d	ib_rereg_phys_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf36498b9	ib_ud_header_unpack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf5e86c98	ib_query_port
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf96fc9de	ib_unpack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf9a8899c	ib_find_cached_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xfd530f08	ib_modify_port
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xff8c5a0a	ib_modify_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x0615bdb4	ib_unregister_mad_agent
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x1016dc37	ib_redirect_mad_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6ef787ed	ib_response_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6f077fcf	ib_get_mad_data_offset
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x712be06e	ib_register_mad_snoop
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x7b5d4b7a	ib_is_mad_class_rmpp
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x81b10eb1	ib_get_rmpp_segment
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x848fae62	ib_modify_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x85ed21d3	ib_free_recv_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x93137686	ib_post_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xa9679b4d	ib_process_mad_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xbd8ab287	ib_register_mad_agent
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xc0591fda	ib_create_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xe5ca7e7e	ib_free_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xf3972e29	ib_cancel_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x05d7b6a4	ib_sa_cancel_query
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x0d2d056b	ib_sa_join_multicast
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x505a8989	ib_sa_get_mcmember_rec
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x576fdbac	ib_sa_free_multicast
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x6041fc7b	ib_init_ah_from_mcmember
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x8f19ce24	ib_sa_service_rec_query
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x92ea5ae3	ib_sa_path_rec_get
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x9c56fd34	ib_sa_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xc86c562c	ib_init_ah_from_path
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xf520d09e	ib_sa_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x02f847bc	ib_copy_path_rec_from_user
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x07cf5a51	ib_copy_ah_attr_to_user
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x18382f6a	ib_copy_path_rec_to_user
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x184f3575	ib_copy_qp_attr_to_user
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x199a1865	iw_cm_disconnect
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x2318cdb2	iw_cm_listen
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x34363c6d	iw_destroy_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x3e77a640	iw_create_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x517a1125	iw_cm_reject
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x5ac0ddff	iw_cm_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x9f63767f	iw_cm_connect
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xeecb7c94	iw_cm_accept
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x2e65f0fb	rdma_bind_addr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x33a3b17d	rdma_destroy_id
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x416031f2	rdma_join_multicast
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x509dd0bd	rdma_resolve_addr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x5d295a12	rdma_accept
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x5d7d33d4	rdma_connect
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x7310e4f1	rdma_leave_multicast
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x7a53d246	rdma_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x7de8e368	rdma_reject
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x7f59d51a	rdma_destroy_qp
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x913515fb	rdma_notify
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x9fc88f7b	rdma_set_service_type
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xaa530f9e	rdma_create_id
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xb55ad60d	rdma_set_ib_paths
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xcb3b88eb	rdma_listen
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xcf3efa26	rdma_disconnect
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xd5b82222	rdma_resolve_route
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xef70c4b9	rdma_create_qp
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x1696e30e	__gameport_register_driver
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x52143bce	gameport_start_polling
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x5c240a09	gameport_unregister_driver
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x66948b79	gameport_open
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x72ba4b85	gameport_set_phys
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x8cefc5b6	__gameport_register_port
+EXPORT_SYMBOL drivers/input/gameport/gameport 0xa560e4a2	gameport_stop_polling
+EXPORT_SYMBOL drivers/input/gameport/gameport 0xd52fc73f	gameport_close
+EXPORT_SYMBOL drivers/input/gameport/gameport 0xeb250a0b	gameport_unregister_port
+EXPORT_SYMBOL drivers/input/input-polldev 0x0d90e2ae	input_unregister_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0x3be2cee6	input_free_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0x59722f0a	input_register_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0xc5138f6f	input_allocate_polled_device
+EXPORT_SYMBOL drivers/isdn/capi/capifs 0x2c54c957	capifs_free_ncci
+EXPORT_SYMBOL drivers/isdn/capi/capifs 0xd0bc06ce	capifs_new_ncci
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x04403fcf	unregister_capi_driver
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x14f2aa5a	capi20_get_version
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x260b0572	capi_ctr_suspend_output
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2b8eab1f	capilib_free_ncci
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2baa6586	capilib_new_ncci
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x31c24aa4	capi20_isinstalled
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x3aa4d902	detach_capi_ctr
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x3bbb55c7	capi20_put_message
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x47d3fc51	capi_info2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x47dbfa0a	capi_message2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x4a95d529	capi_ctr_down
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x50b33ca4	capi_cmsg2message
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x6057c6f3	capi_message2cmsg
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x62e32d43	capilib_data_b3_conf
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x71e8d5ba	capilib_data_b3_req
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x73232f99	capi20_set_callback
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x788d398c	capi_cmsg2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7a33596c	capi20_get_serial
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7d8c86e1	capi_ctr_resume_output
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7e6f1307	capi20_get_manufacturer
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x8f699913	capilib_release
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x9f823278	register_capi_driver
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xaa165d27	capilib_release_appl
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb19fda8d	capi_cmd2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb60e5e5f	capi_cmsg_header
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xbb4e0fe5	capi20_register
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xc467bdc8	capi_ctr_ready
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xcd4ebba1	capi_ctr_handle_message
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xdf0a2003	attach_capi_ctr
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe19a11ac	capi20_get_profile
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe9f62f29	cdebbuf_free
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xed061606	capi20_manufacturer
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xf08d5d96	capi20_release
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x040edf12	b1ctl_read_proc
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x0e989d5c	b1_load_config
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x23b85a32	b1_loaded
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x2c1b702a	b1_alloc_card
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x36b188d8	b1_interrupt
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x50534671	avmcard_dma_free
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x52b92128	b1_release_appl
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x58142b51	b1_load_t4file
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x85f09690	b1_irq_table
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x8ad8c1d7	b1_free_card
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x93601c08	b1_parse_version
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xa5fd669f	b1_reset_ctr
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xafcfc266	b1_send_message
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xcbdb2601	b1_load_firmware
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xdfd28376	b1_detect
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xe3fc1bac	b1_getrevision
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xeae60e7b	avmcard_dma_alloc
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xfc4074c7	b1_register_appl
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x0a9c1888	b1dmactl_read_proc
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x0cfe0846	b1dma_release_appl
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x1a197ddf	b1dma_register_appl
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x233ca0dc	b1dma_interrupt
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x28410ca7	b1dma_send_message
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x3e156064	t1pci_detect
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x6dc06526	b1dma_reset_ctr
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x8940f18d	b1dma_reset
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x909fc596	b1dma_load_firmware
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xe9aa50b6	b1pciv4_detect
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0x29562993	b1pcmcia_delcard
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xaec3240e	b1pcmcia_addcard_m1
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xea620116	b1pcmcia_addcard_m2
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xf14bf8b1	b1pcmcia_addcard_b1
+EXPORT_SYMBOL drivers/isdn/hardware/eicon/divadidd 0x2974ead1	DIVA_DIDD_Read
+EXPORT_SYMBOL drivers/isdn/hardware/eicon/divadidd 0xad1b9446	proc_net_eicon
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNipac 0x1842c9d4	mISDNisac_irq
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNipac 0x2e88e654	mISDNisac_init
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNipac 0x78f7e1d4	mISDNipac_irq
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNipac 0x93ed06ad	mISDNipac_init
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNisar 0x091a43fa	mISDNisar_irq
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNisar 0xa937c725	mISDNisar_init
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x07f4f2ce	hisax_unregister
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x148f0c99	FsmFree
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x2844a899	FsmInitTimer
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x70c626f1	hisax_init_pcmcia
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x93a64734	FsmChangeState
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x9df0cd27	FsmEvent
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xc0c558f9	FsmRestartTimer
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xd94696e8	FsmDelTimer
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xee93522c	hisax_register
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xf0a16657	FsmNew
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xfc27303b	HiSax_closecard
+EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x3f3b323a	isac_d_l2l1
+EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x475e54a9	isacsx_irq
+EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x5032013a	isac_init
+EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x67329326	isac_setup
+EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x8775108c	isac_irq
+EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0xfe700663	isacsx_setup
+EXPORT_SYMBOL drivers/isdn/i4l/isdn 0x7928ddcb	register_isdn
+EXPORT_SYMBOL drivers/isdn/i4l/isdn 0x918a75f4	isdn_ppp_unregister_compressor
+EXPORT_SYMBOL drivers/isdn/i4l/isdn 0xb3977649	isdn_ppp_register_compressor
+EXPORT_SYMBOL drivers/isdn/i4l/isdn 0xfa06820f	isdn_register_divert
+EXPORT_SYMBOL drivers/isdn/i4l/isdnhdlc 0x3b71e4fc	isdnhdlc_decode
+EXPORT_SYMBOL drivers/isdn/i4l/isdnhdlc 0x59cc8a7e	isdnhdlc_out_init
+EXPORT_SYMBOL drivers/isdn/i4l/isdnhdlc 0x8ee38862	isdnhdlc_rcv_init
+EXPORT_SYMBOL drivers/isdn/i4l/isdnhdlc 0xfd9d4c09	isdnhdlc_encode
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x1ba33c63	recv_Dchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x2348cc3c	mISDN_FsmFree
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x31a264c1	l1_event
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x327a191b	mISDN_unregister_Bprotocol
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x36bc6737	queue_ch_frame
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3ea336fd	mISDN_FsmAddTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x429129f2	mISDN_FsmRestartTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x4e39ac6e	recv_Bchannel_skb
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x50c2230c	mISDN_FsmChangeState
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x51ec1944	get_next_dframe
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x5dc7400a	mISDN_clock_update
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x6447c7d6	mISDN_initdchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x759d5882	mISDN_initbchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x8393ffbd	mISDN_unregister_device
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x8811aa26	mISDN_register_Bprotocol
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x8ccac7ec	bchannel_senddata
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x944d7f16	mISDN_freedchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x9ab6ebba	recv_Echannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xa23cde94	create_l1
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xa2ceba90	dchannel_senddata
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xace35cae	mISDN_FsmDelTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc3401729	mISDN_register_clock
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd140e23c	recv_Dchannel_skb
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd285995f	mISDN_clock_get
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd5145151	mISDN_FsmEvent
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd732602f	get_next_bframe
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd9a7fbfd	mISDN_FsmInitTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe4aefd1c	confirm_Bsend
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe7e3bda0	mISDN_clear_bchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe8820268	mISDN_register_device
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe8f617eb	mISDN_unregister_clock
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf09f4a20	mISDN_freebchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf57e62c8	recv_Bchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf9e7832f	mISDN_FsmNew
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0x01087af0	mISDN_dsp_element_unregister
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0x60721da7	dsp_audio_law_to_s32
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0xa215f1b2	dsp_audio_s16_to_law
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0xb98308d8	mISDN_dsp_element_register
+EXPORT_SYMBOL drivers/md/raid6_pq 0x0bd662f6	raid6_gfmul
+EXPORT_SYMBOL drivers/md/raid6_pq 0x15fe0cd3	raid6_gfexp
+EXPORT_SYMBOL drivers/md/raid6_pq 0x5ba93f9d	raid6_gfinv
+EXPORT_SYMBOL drivers/md/raid6_pq 0xb0d904b7	raid6_empty_zero_page
+EXPORT_SYMBOL drivers/md/raid6_pq 0xce45a6f1	raid6_gfexi
+EXPORT_SYMBOL drivers/media/common/tuners/mc44s803 0xf8746d41	mc44s803_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mt2060 0x1668a99e	mt2060_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mt2131 0x0de0c47e	mt2131_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mt2266 0x30edf27e	mt2266_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mxl5005s 0x6c01f358	mxl5005s_attach
+EXPORT_SYMBOL drivers/media/common/tuners/qt1010 0x79cc1897	qt1010_attach
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0x0cb4b189	tuners
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0xc2821775	tuner_count
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-xc2028 0xfc3ac884	xc2028_attach
+EXPORT_SYMBOL drivers/media/common/tuners/xc5000 0x3bdf7033	xc5000_attach
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x097a3e2d	flexcop_device_kfree
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x241b4965	flexcop_device_initialize
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x3c383804	flexcop_dma_xfer_control
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x6b2363b1	flexcop_eeprom_check_mac_addr
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x7405ee0b	flexcop_device_kmalloc
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x775dfd88	flexcop_pid_feed_control
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x79b7cea5	flexcop_device_exit
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x890fd59a	flexcop_dma_control_size_irq
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x94575496	flexcop_dma_free
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x9469d8f8	flexcop_pass_dmx_data
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xa7d52045	flexcop_sram_ctrl
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xafde7489	flexcop_dma_config
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xb135df5c	flexcop_wan_set_speed
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xc0633374	flexcop_dma_config_timer
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xc0b76e5f	flexcop_sram_set_dest
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xc9f9efd5	flexcop_dma_control_timer_irq
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xd3ae79c6	flexcop_i2c_request
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xd3ea79dd	flexcop_pass_dmx_packets
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xf23ead83	flexcop_dma_allocate
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xf8a785aa	flexcop_dump_reg
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x2aeb5986	bt878_device_control
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x74412387	bt878
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x7fa1ca10	bt878_stop
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xc9f8d763	bt878_start
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xd5d0bdef	bt878_num
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x253aa5dd	dst_wait_dst_ready
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x27f7d8c8	dst_pio_disable
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x33ae4708	write_dst
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x69bf67e9	dst_comm_init
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x72c686cf	rdc_reset_state
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xa3142d6b	dst_error_recovery
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xcb6ddf38	dst_error_bailout
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xe94b8c9c	dst_check_sum
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xef12fd14	read_dst
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xfd761997	dst_attach
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst_ca 0x6f02510c	dst_ca_attach
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0785ea3e	dvb_net_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0b6167b0	dvb_dmxdev_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0c457c5c	dvb_ringbuffer_flush_spinlock_wakeup
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0c4d4a14	dvb_frontend_sleep_until
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0c747de8	dvb_ca_en50221_camready_irq
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0db24447	dvb_frontend_reinitialise
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x1f1f869d	dvb_generic_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x29390c1d	dvb_dmx_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x2d62a8c4	dvb_unregister_frontend
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x33f9fa79	dvb_unregister_device
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x3825511f	dvb_register_device
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x3fd4d1ea	dvb_frontend_detach
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x489f644f	dvb_dmx_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x511eb6f4	dvb_dmx_swfilter_204
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x51f3767c	dvb_ringbuffer_read
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x5da7f79a	dvb_dmx_swfilter
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x66d9a772	dvb_register_frontend
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6988f784	dvb_ringbuffer_read_user
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6ca29c7a	dvb_net_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x74a5a698	dvb_filter_pes2ts_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x76813e0c	dvb_generic_ioctl
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x798cdb07	dvb_dmx_swfilter_packets
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x80e3832d	dvb_filter_get_ac3info
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x89d5f637	dvb_ca_en50221_camchange_irq
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x9d0783c3	dvb_dmxdev_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x9dbba37b	dvb_generic_open
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xac4ca1b0	intlog2
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb801e348	dvb_ca_en50221_frda_irq
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xbc0d91e1	timeval_usec_diff
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xcb89fc7d	dvb_ringbuffer_free
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xcca08cb5	dvb_ringbuffer_avail
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xcce0eeed	dvb_ringbuffer_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xcd9f0ab5	dvb_ca_en50221_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xd3455a35	dvb_register_adapter
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xd639b9bc	dvb_ringbuffer_write
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xd7765e69	dvb_ringbuffer_empty
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xd98a8606	dvb_unregister_adapter
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe5ae8707	intlog10
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xef62320b	dvb_ca_en50221_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf826deb0	dvb_filter_pes2ts
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x0149bc16	dvb_usb_nec_rc_key_to_event
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x1b87310c	dvb_usb_device_exit
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x407ed773	dvb_usb_get_hexline
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x5db4942a	dvb_usb_generic_rw
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xa4ca3058	dvb_usb_generic_write
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xca8eb857	usb_cypress_load_firmware
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xe967ed75	dvb_usb_device_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x3693500b	af9005_rc_keys
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0xbf19e5d7	af9005_rc_decode
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0xd3383957	af9005_rc_keys_size
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x02285efc	dibusb_pid_filter
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x222f5faa	dibusb_dib3000mc_tuner_attach
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x33d27a9e	dibusb_streaming_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x3ec28e86	dibusb2_0_streaming_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x579c7e3f	dibusb_power_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x62b3362b	dibusb_dib3000mc_frontend_attach
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x64c6ccaa	dibusb_rc_query
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x811cee7f	dibusb_i2c_algo
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x90dcb9b2	dibusb_pid_filter_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x9d5c88c2	dibusb_read_eeprom_byte
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xcc9ccaff	dibusb_rc_keys
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xe04496e1	dibusb2_0_power_ctrl
+EXPORT_SYMBOL drivers/media/dvb/frontends/af9013 0x26467d2a	af9013_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/au8522 0xbc8aec3c	au8522_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/bcm3510 0x02a36d27	bcm3510_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx22700 0x923218d3	cx22700_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx22702 0x272d45f3	cx22702_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24110 0x6083ca1c	cx24110_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0xb6d3385c	cx24113_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0xe3b10ec4	cx24113_agc_callback
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24116 0xa0dce90b	cx24116_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0x075339ac	cx24123_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0x5aa2e14d	cx24123_get_tuner_i2c_adapter
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0x73e8664e	dib0070_wbd_offset
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0xe049f1c2	dib0070_ctrl_agc_filter
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0xf6bcbe70	dib0070_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mb 0x0f4c7177	dib3000mb_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x36e6c062	dib3000mc_i2c_enumeration
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x4025ab11	dib3000mc_set_config
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x5cadb2c2	dib3000mc_pid_control
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x9fdd0760	dib3000mc_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xbe7298b5	dib3000mc_get_tuner_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xd8cd2267	dib3000mc_pid_parse
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0xbaa44a22	dib7000m_get_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0xc98dafb7	dib7000m_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x3bf6a6b3	dib7000p_set_wbd_ref
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x55c4e495	dib7000pc_detection
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x7254b87a	dib7000p_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xa60e8544	dib7000p_set_gpio
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xdfdf7de1	dib7000p_i2c_enumeration
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xe08714ba	dib7000p_get_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x085b6e4e	dib8000_i2c_enumeration
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x3edb9179	dib8000_set_wbd_ref
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x51ef6908	dib8000_set_gpio
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0xc48cff01	dib8000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0xd284be30	dib8000_get_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x00e36c15	dibx000_get_i2c_adapter
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x672a7896	dibx000_init_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0xcd5aeece	dibx000_exit_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0xe1905694	dibx000_reset_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dvb-pll 0xdf73bbd0	dvb_pll_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/isl6405 0x1c8c5dee	isl6405_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/isl6421 0x9595f18d	isl6421_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/isl6423 0xa92502e1	isl6423_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/itd1000 0xa2252afe	itd1000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/l64781 0x7e36839a	l64781_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt3305 0xc8494fa2	lgdt3305_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt330x 0x06f472cf	lgdt330x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lgs8gxx 0x8b4c9772	lgs8gxx_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0xec0d2e61	lnbp21_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0xf3203458	lnbh24_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/mt312 0x35f0400d	mt312_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/mt352 0x3f8b6e3a	mt352_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/nxt200x 0x659f0969	nxt200x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/nxt6000 0x2ca3f43f	nxt6000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/or51132 0x75d6a228	or51132_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/or51211 0xf1dfbeb0	or51211_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1409 0xbe68b9ec	s5h1409_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1411 0xa7928cd3	s5h1411_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0x893b18f0	s5h1420_get_tuner_i2c_adapter
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0xa44e0bb4	s5h1420_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/si21xx 0x29f1e858	si21xx_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/sp8870 0x5a11d0cb	sp8870_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/sp887x 0xce2df379	sp887x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stb0899 0x5bdf3808	stb0899_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stb6000 0xf0573d3f	stb6000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stb6100 0x232a0a03	stb6100_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0288 0x125518ea	stv0288_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0297 0x7e9a138f	stv0297_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0299 0xafdcfae1	stv0299_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0900 0xa9a0a062	stv0900_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv090x 0xed86260b	stv090x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv6110 0x050669bf	stv6110_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv6110x 0x91aae439	stv6110x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10021 0x3660b97f	tda10021_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10023 0xfb3e2a87	tda10023_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10048 0xa05730a7	tda10048_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0xacc1916b	tda10046_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0xcda56561	tda10045_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10086 0x73955abe	tda10086_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda8083 0xbdf411e6	tda8083_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda8261 0x1d8c550f	tda8261_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda826x 0x149a3ad2	tda826x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tua6100 0x2b5b1e41	tua6100_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/ves1820 0x95ca1d85	ves1820_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/ves1x93 0x9f2cd8d4	ves1x93_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/zl10036 0x37235bb2	zl10036_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/zl10039 0xe6f0d092	zl10039_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/zl10353 0x19f056a0	zl10353_attach
+EXPORT_SYMBOL drivers/media/dvb/ttpci/ttpci-eeprom 0xea1e1539	ttpci_eeprom_parse_mac
+EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0x94ce69db	ttusbdecfe_dvbs_attach
+EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0xbf096811	ttusbdecfe_dvbt_attach
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x11dc4b6d	bttv_gpio_enable
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x5e03eb46	bttv_get_pcidev
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x8ecf4acc	bttv_write_gpio
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xbcf2d2fb	bttv_read_gpio
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xd8a5d871	bttv_sub_unregister
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xf06f5357	bttv_sub_register
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0x0c2e93e4	btcx_riscmem_free
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0x495e4b0c	btcx_calc_skips
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0x4a746929	btcx_riscmem_alloc
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xad2fe38b	btcx_sort_clips
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xc368f8e6	btcx_align
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xcda0ded2	btcx_screen_clips
+EXPORT_SYMBOL drivers/media/video/cpia 0x218eb985	cpia_unregister_camera
+EXPORT_SYMBOL drivers/media/video/cpia 0xd1b61c3f	cpia_register_camera
+EXPORT_SYMBOL drivers/media/video/cx18/cx18 0x2cdea06d	cx18_reset_ir_gpio
+EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0x2f83f63f	cx231xx_register_extension
+EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0xf4e0a841	cx231xx_unregister_extension
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x155650f3	cx2341x_ctrl_get_menu
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x1ca0c084	cx2341x_log_status
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x2f25eee2	cx2341x_update
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x5b88faf6	cx2341x_ext_ctrls
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf76ce95	cx2341x_fill_defaults
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf8b77a4	cx2341x_mpeg_ctrls
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xe2c2b5eb	cx2341x_ctrl_query
+EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0x50b96a9c	vp3054_i2c_remove
+EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0xe5e08a67	vp3054_i2c_probe
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x14a9e839	cx88_get_control
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x66fd0140	cx88_set_control
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xa732dce7	cx88_video_mux
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xa99e757e	cx88_set_freq
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xac4e53b9	cx88_user_ctrls
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xb13dd880	cx8800_ctrl_query
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xb3a0ccf8	cx88_enum_input
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x0d7840fc	cx8802_buf_queue
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x4d4e898b	cx8802_unregister_driver
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x6653b126	cx8802_get_device
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x8f3a7d4a	cx8802_get_driver
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xa7a67cb7	cx8802_register_driver
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xc3594653	cx8802_buf_prepare
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xf7bb6a0c	cx8802_cancel_buffers
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x00860d11	cx88_wakeup
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x098a9487	cx88_get_stereo
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x11260e67	cx88_core_get
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x16d15ebe	cx88_vdev_init
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x22d2636a	cx88_ir_stop
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x27f2d51f	cx88_core_put
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x39cd7839	cx88_ir_start
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x53e0c65f	cx88_shutdown
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x59be3619	cx88_dsp_detect_stereo_sap
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x6141c8c5	cx88_tuner_callback
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x740f6b50	cx88_risc_stopper
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x7f832b96	cx88_sram_channel_setup
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x8ac395ce	cx88_core_irq
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x8b24d641	cx88_risc_databuffer
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x8b87c9c3	cx88_set_tvaudio
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x904b8696	cx88_audio_thread
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x9153534a	cx88_free_buffer
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x9b140fff	cx88_sram_channels
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xa603766e	cx88_set_tvnorm
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xa6558f1f	cx88_set_scale
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xac4ae13c	cx88_reset
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb47f6cda	cx88_print_irqbits
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xbc1c0d40	cx88_sram_channel_dump
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xc38be7c4	cx88_risc_buffer
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xdd593fa0	cx88_set_stereo
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xf4c1582d	cx88_newstation
+EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0x803d9d4c	em28xx_register_extension
+EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0x9b52a023	em28xx_unregister_extension
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x10122486	gspca_dev_probe
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x14458158	gspca_frame_add
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x85925d2a	gspca_auto_gain_n_exposure
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x9670af2c	gspca_debug
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xa3c31e61	gspca_resume
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xb79cf698	gspca_get_i_frame
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xc4c2f5c2	gspca_disconnect
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xff5cf025	gspca_suspend
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x14f67530	ivtv_debug
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x2daf8d64	ivtv_vapi
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x328aaf7e	ivtv_api
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x4048a547	ivtv_udma_alloc
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x4edd381b	ivtv_udma_unmap
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x562cc74e	ivtv_clear_irq_mask
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x717aa809	ivtv_reset_ir_gpio
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x8301f23e	ivtv_vapi_result
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x8cea1a93	ivtv_init_on_first_open
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x9f6f45a8	ivtv_set_irq_mask
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xd9ee1901	ivtv_udma_setup
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xdb8b066a	ivtv_udma_prepare
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x04e83446	saa7134_tuner_callback
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x1211df5d	saa7134_devlist
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x14dfecc6	saa7134_boards
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x258abeab	saa7134_dmasound_init
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x2b33282d	saa7134_pgtable_free
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x40d97368	saa7134_set_gpio
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x43ab21cd	saa7134_set_dmabits
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x4780dce6	saa7134_pgtable_alloc
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x5ef696e9	saa7134_tvaudio_setmute
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x6d455358	saa_dsp_writel
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x7da1656c	saa7134_dmasound_exit
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x7ee44b90	saa7134_devlist_lock
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xaebf6d1c	saa7134_ts_unregister
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xdaa76b58	saa7134_ts_register
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xfdee1e08	saa7134_pgtable_build
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x63717cb1	soc_camera_xlate_by_fourcc
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x7b99773d	soc_camera_host_register
+EXPORT_SYMBOL drivers/media/video/soc_camera 0xd1d2a161	soc_camera_format_by_fourcc
+EXPORT_SYMBOL drivers/media/video/soc_camera 0xdab1b5eb	soc_camera_host_unregister
+EXPORT_SYMBOL drivers/media/video/soc_camera 0xe3111867	soc_camera_apply_sensor_flags
+EXPORT_SYMBOL drivers/media/video/tveeprom 0x36ef9f70	tveeprom_hauppauge_analog
+EXPORT_SYMBOL drivers/media/video/tveeprom 0x3710fb84	tveeprom_read
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x16a2915c	RingQueue_Dequeue
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x407a321c	RingQueue_WakeUpInterruptible
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x72d5ce30	usbvideo_AllocateDevice
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x744efb34	usbvideo_TestPattern
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xb2854686	usbvideo_register
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xcd774978	usbvideo_Deregister
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xddecac6d	RingQueue_Enqueue
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xf03cc6f1	usbvideo_RegisterVideoDevice
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xf3074c2a	usbvideo_DeinterlaceFrame
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xf5011f67	RingQueue_Flush
+EXPORT_SYMBOL drivers/media/video/v4l1-compat 0xf3c587e9	v4l_compat_translate_ioctl
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x03165a85	v4l2_ctrl_get_menu
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x0b4985d3	v4l2_chip_match_i2c_client
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1dcaa0c8	v4l2_prio_max
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1e326b97	v4l2_ctrl_query_fill
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x2f639468	v4l2_prio_check
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x42c8e001	v4l2_ctrl_next
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x495426ee	v4l2_ctrl_get_name
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x4ed5e0d7	v4l2_chip_match_host
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x50766d69	v4l2_ctrl_query_menu_valid_items
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x76ba9a9a	v4l2_prio_open
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x95284709	v4l2_prio_close
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9c7de443	v4l2_prio_change
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9eb43ee2	v4l2_ctrl_check
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0xa1edf614	v4l2_chip_ident_i2c_client
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0xbecd2858	v4l2_prio_init
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0xd9ee1e3f	v4l2_ctrl_query_menu
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x09db2b16	videobuf_dvb_dealloc_frontends
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x1818ce75	videobuf_dvb_find_frontend
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x19e77b36	videobuf_dvb_alloc_frontend
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x786256fe	videobuf_dvb_get_frontend
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x7de7fdb1	videobuf_dvb_register_bus
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x9b0e5809	videobuf_dvb_unregister_bus
+EXPORT_SYMBOL drivers/media/video/videodev 0x013fa876	video_register_device
+EXPORT_SYMBOL drivers/media/video/videodev 0x0614dd5a	v4l2_video_std_frame_period
+EXPORT_SYMBOL drivers/media/video/videodev 0x123959a1	v4l2_type_names
+EXPORT_SYMBOL drivers/media/video/videodev 0x2001c659	video_usercopy
+EXPORT_SYMBOL drivers/media/video/videodev 0x322a5757	video_device_alloc
+EXPORT_SYMBOL drivers/media/video/videodev 0x3adbd595	v4l2_field_names
+EXPORT_SYMBOL drivers/media/video/videodev 0x5ebefe4b	v4l_printk_ioctl
+EXPORT_SYMBOL drivers/media/video/videodev 0x6fe0c2ee	video_device_release_empty
+EXPORT_SYMBOL drivers/media/video/videodev 0x80a952d2	video_ioctl2
+EXPORT_SYMBOL drivers/media/video/videodev 0x899877a0	video_devdata
+EXPORT_SYMBOL drivers/media/video/videodev 0x97aebee4	video_register_device_no_warn
+EXPORT_SYMBOL drivers/media/video/videodev 0xbb2e28bd	video_unregister_device
+EXPORT_SYMBOL drivers/media/video/videodev 0xe092efab	video_device_release
+EXPORT_SYMBOL drivers/media/video/videodev 0xe2b92059	v4l2_video_std_construct
+EXPORT_SYMBOL drivers/media/video/videodev 0xf3251e7b	v4l2_norm_to_name
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x1614552d	videocodec_detach
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x4e8e259b	videocodec_unregister
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x9fd9c1a4	videocodec_attach
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0xeb068661	videocodec_register
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x20513fe9	memstick_add_host
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x3f25aeb4	memstick_unregister_driver
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x4e1d69c7	memstick_suspend_host
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x5b392d71	memstick_next_req
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x5d820a02	memstick_init_req_sg
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x70e61b7b	memstick_set_rw_addr
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x71bacaf2	memstick_free_host
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x90810e8a	memstick_init_req
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x99c0ae61	memstick_register_driver
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xa5c4f45d	memstick_remove_host
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xa6803e7c	memstick_new_req
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xc145c619	memstick_detect_change
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xcf794ea2	memstick_alloc_host
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xdafb83ab	memstick_resume_host
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x01783ca6	mpt_print_ioc_summary
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x065538fb	mpt_reset_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x08d3a533	mpt_findImVolumes
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x0cb0238b	mpt_set_taskmgmt_in_progress_flag
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x136aab74	mpt_put_msg_frame_hi_pri
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x1681e210	mpt_clear_taskmgmt_in_progress_flag
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x182f18ad	mpt_detach
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x1933c1d2	mpt_GetIocState
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x1d936544	mpt_attach
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x218d0fdb	mpt_put_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x28422892	mpt_verify_adapter
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x2fbfe95b	mptbase_sas_persist_operation
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4526289b	mpt_event_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x47d6e364	mpt_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4bb83eca	mpt_event_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x502108d0	mpt_fwfault_debug
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x60032608	mpt_alloc_fw_memory
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x6259f086	mpt_raid_phys_disk_get_num_paths
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x7c664591	mpt_raid_phys_disk_pg1
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x828f52af	mpt_free_fw_memory
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x841ffc07	mpt_config
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x852c47e0	mpt_get_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x89365c0d	mpt_halt_firmware
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x8f430e97	mpt_HardResetHandler
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x9b15f6e6	mpt_device_driver_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x9dbc7155	mpt_send_handshake_request
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xaf73a170	mpt_free_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc0e69f82	mpt_device_driver_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc47c22e8	mpt_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd9a92a75	mpt_reset_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xdbf2295c	mpt_resume
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xdd805159	ioc_list
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xe03d5e3f	mpt_raid_phys_disk_pg0
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xf26de885	mpt_suspend
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x0479144a	mptscsih_resume
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x052dbafb	mptscsih_suspend
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x098b362b	mptscsih_dev_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x0a467cc2	mptscsih_taskmgmt_complete
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x27a33c7e	mptscsih_host_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x441364a8	mptscsih_shutdown
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x58a1d805	mptscsih_scandv_complete
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x63fb49f1	mptscsih_taskmgmt_response_code
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x73c8f4d9	mptscsih_is_phys_disk
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x7de12cc9	mptscsih_qcmd
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x7fc0c5ce	mptscsih_remove
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x82607d2b	mptscsih_slave_configure
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x871bbae7	mptscsih_bios_param
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x8847e2c2	mptscsih_host_attrs
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x8c2e97fc	mptscsih_event_process
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x93c10eb2	mptscsih_abort
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x9af9cabd	mptscsih_change_queue_depth
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xa9e5d6f3	mptscsih_IssueTaskMgmt
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xac7eeb73	mptscsih_slave_destroy
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xbf1ff828	mptscsih_proc_info
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xc82d5203	mptscsih_bus_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xcd83b197	mptscsih_info
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xe82bcf11	mptscsih_io_done
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xf7b471b8	mptscsih_raid_id_to_num
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xfedc6703	mptscsih_get_scsi_lookup
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xffba26a1	mptscsih_ioc_reset
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x0a393174	i2o_driver_notify_device_remove_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x0c77d26e	i2o_cntxt_list_get_ptr
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x24e47fa3	i2o_find_iop
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2a843bef	i2o_dump_message
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2e3d0adc	i2o_msg_get_wait
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x3383e9a6	i2o_iop_find_device
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x428b2ad9	i2o_driver_unregister
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x6a56224c	i2o_exec_lct_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x72d0bfa0	i2o_parm_field_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x73dc0fa1	i2o_driver_notify_controller_remove_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x746d621a	i2o_status_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x85e79ca9	i2o_cntxt_list_remove
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xa9389e4e	i2o_device_claim_release
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xaa3950d0	i2o_cntxt_list_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xaf830d47	i2o_driver_notify_controller_add_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb4c00dcf	i2o_controllers
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb73bb859	i2o_msg_post_wait_mem
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xbafdc00a	i2o_device_claim
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xbf8cff87	i2o_driver_register
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xc1bc86f6	i2o_driver_notify_device_add_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xc9929944	i2o_cntxt_list_add
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xd825f731	i2o_parm_issue
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xf3410340	i2o_parm_table_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xf94e55dc	i2o_event_register
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x01eae48a	ab3100_event_unregister
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x020962a0	ab3100_event_registers_startup_state_get
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x4ae19175	ab3100_mask_and_set_register_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x845b791f	ab3100_event_register
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x91fcb3ff	ab3100_get_register_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x99161e3a	ab3100_set_register_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xb8cc188d	ab3100_get_chip_type
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xc8b5ffde	ab3100_get_register_page_interruptible
+EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x730cb5a7	pasic3_read_register
+EXPORT_SYMBOL drivers/mfd/htc-pasic3 0xe787eac9	pasic3_write_register
+EXPORT_SYMBOL drivers/mfd/mfd-core 0xa6e9d06e	mfd_remove_devices
+EXPORT_SYMBOL drivers/mfd/mfd-core 0xb3c9a67e	mfd_add_devices
+EXPORT_SYMBOL drivers/mfd/tps65010 0x02d4ad0f	tps65013_set_low_pwr
+EXPORT_SYMBOL drivers/mfd/tps65010 0x28485130	tps65010_config_vregs1
+EXPORT_SYMBOL drivers/mfd/tps65010 0x33739de7	tps65010_set_vib
+EXPORT_SYMBOL drivers/mfd/tps65010 0x9fd44c69	tps65010_set_led
+EXPORT_SYMBOL drivers/mfd/tps65010 0xb14080cc	tps65010_set_low_pwr
+EXPORT_SYMBOL drivers/mfd/tps65010 0xd5bb106d	tps65010_set_vbus_draw
+EXPORT_SYMBOL drivers/mfd/tps65010 0xe99b3f36	tps65010_set_gpio_out_value
+EXPORT_SYMBOL drivers/misc/c2port/core 0x4b5bee71	c2port_device_unregister
+EXPORT_SYMBOL drivers/misc/c2port/core 0xdd74875d	c2port_device_register
+EXPORT_SYMBOL drivers/misc/ioc4 0x62991089	ioc4_unregister_submodule
+EXPORT_SYMBOL drivers/misc/ioc4 0xe0d70e71	ioc4_register_submodule
+EXPORT_SYMBOL drivers/misc/tifm_core 0x21996d6f	tifm_add_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0x3f7939e0	tifm_free_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0x545549df	tifm_register_driver
+EXPORT_SYMBOL drivers/misc/tifm_core 0x5ca49266	tifm_alloc_device
+EXPORT_SYMBOL drivers/misc/tifm_core 0x7385b510	tifm_map_sg
+EXPORT_SYMBOL drivers/misc/tifm_core 0x88e0ca2a	tifm_free_device
+EXPORT_SYMBOL drivers/misc/tifm_core 0x9e697f51	tifm_remove_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0xb35270c8	tifm_unmap_sg
+EXPORT_SYMBOL drivers/misc/tifm_core 0xcd153284	tifm_queue_work
+EXPORT_SYMBOL drivers/misc/tifm_core 0xd05c8357	tifm_alloc_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0xeaa2dc0f	tifm_has_ms_pif
+EXPORT_SYMBOL drivers/misc/tifm_core 0xf981b884	tifm_eject
+EXPORT_SYMBOL drivers/misc/tifm_core 0xfd476601	tifm_unregister_driver
+EXPORT_SYMBOL drivers/mmc/card/mmc_block 0x810cb0c9	mmc_cleanup_queue
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x07a4c8dc	cfi_read_pri
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x0b39bc28	cfi_fixup
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x741b19f1	cfi_varsize_frob
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x4ac80313	unregister_mtd_chip_driver
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x50034f9c	map_destroy
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0xb4cfe262	do_map_probe
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0xc9611e42	register_mtd_chip_driver
+EXPORT_SYMBOL drivers/mtd/chips/gen_probe 0x17a28caa	mtd_do_chip_probe
+EXPORT_SYMBOL drivers/mtd/lpddr/lpddr_cmds 0xe89442cc	lpddr_cmdset
+EXPORT_SYMBOL drivers/mtd/maps/map_funcs 0x443ea61d	simple_map_init
+EXPORT_SYMBOL drivers/mtd/mtd 0x4088585d	add_mtd_partitions
+EXPORT_SYMBOL drivers/mtd/mtd 0xe9ce2acf	del_mtd_partitions
+EXPORT_SYMBOL drivers/mtd/mtdconcat 0x656e5efb	mtd_concat_create
+EXPORT_SYMBOL drivers/mtd/mtdconcat 0x6fa1fe33	mtd_concat_destroy
+EXPORT_SYMBOL drivers/mtd/nand/nand 0x6506f560	nand_default_bbt
+EXPORT_SYMBOL drivers/mtd/nand/nand 0x947076fd	nand_scan_bbt
+EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0x68d35fec	nand_calculate_ecc
+EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0xb4b94377	__nand_correct_data
+EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0xf7485e59	nand_correct_data
+EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0x836bdb72	nand_flash_ids
+EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0xa336feb7	nand_manuf_ids
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x3b6b40c6	onenand_default_bbt
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x75453508	onenand_addr
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x8735d33d	flexonenand_region
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0xe3475f00	onenand_scan_bbt
+EXPORT_SYMBOL drivers/net/8390 0x02285a2f	__alloc_ei_netdev
+EXPORT_SYMBOL drivers/net/8390 0x0f2af69d	ei_close
+EXPORT_SYMBOL drivers/net/8390 0x1c14de9a	ei_poll
+EXPORT_SYMBOL drivers/net/8390 0x2c5574ae	ei_start_xmit
+EXPORT_SYMBOL drivers/net/8390 0x7c199f7d	NS8390_init
+EXPORT_SYMBOL drivers/net/8390 0xbf7dbb89	ei_netdev_ops
+EXPORT_SYMBOL drivers/net/8390 0xd786d28f	ei_set_multicast_list
+EXPORT_SYMBOL drivers/net/8390 0xd9ecdf01	ei_get_stats
+EXPORT_SYMBOL drivers/net/8390 0xdd365790	ei_interrupt
+EXPORT_SYMBOL drivers/net/8390 0xdd80b765	ei_tx_timeout
+EXPORT_SYMBOL drivers/net/8390 0xe8bfc377	ei_open
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x0b0855c9	arcnet_close
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x10e372dd	arcnet_unregister_proto
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x12dfef33	arcnet_open
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x23f86078	arcnet_interrupt
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x256999a2	arcnet_timeout
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x2aeaa267	alloc_arcdev
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x5dc1a621	arcnet_send_packet
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x6534792a	arcnet_debug
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x69151386	arc_bcast_proto
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xa1a34207	arc_raw_proto
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xba29b52b	arc_proto_default
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xf319ddff	arc_proto_map
+EXPORT_SYMBOL drivers/net/arcnet/com20020 0x18187be8	com20020_netdev_ops
+EXPORT_SYMBOL drivers/net/arcnet/com20020 0xc22dd34f	com20020_check
+EXPORT_SYMBOL drivers/net/arcnet/com20020 0xc4b095f6	com20020_found
+EXPORT_SYMBOL drivers/net/bnx2 0xe9e77c62	bnx2_cnic_probe
+EXPORT_SYMBOL drivers/net/cnic 0x636af174	cnic_unregister_driver
+EXPORT_SYMBOL drivers/net/cnic 0xd9ad2294	cnic_register_driver
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x044c0cd6	dev2t3cdev
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x19c1b895	t3_l2t_get
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x2395d1d5	t3_l2e_free
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x27951942	cxgb3_alloc_atid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x3ab3e270	cxgb3_unregister_client
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x4a76c0b6	cxgb3_register_client
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x5cdc1e03	cxgb3_insert_tid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x603bb830	cxgb3_remove_tid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x6af88513	t3_l2t_send_slow
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x80786bd8	cxgb3_alloc_stid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xa1c6ef0e	cxgb3_free_atid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xb1df382e	t3_l2t_send_event
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xb6004501	t3_register_cpl_handler
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xc5a96bc3	cxgb3_free_stid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xd5d3fa9f	cxgb3_queue_tid_release
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xeeed015a	cxgb3_ofld_send
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x54cee9fd	hdlcdrv_transmitter
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x767e9712	hdlcdrv_unregister
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xb194df03	hdlcdrv_receiver
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xbfabc5a5	hdlcdrv_arbitrate
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xe6ebd59a	hdlcdrv_register
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x1d3aaaaa	sirdev_set_dongle
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x42d7390e	sirdev_write_complete
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x457725fd	irda_unregister_dongle
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x9608b9a9	irda_register_dongle
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x9645a28c	sirdev_raw_write
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xaf1255dd	sirdev_set_dtr_rts
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xaf5e1561	sirdev_raw_read
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xb8bce509	sirdev_receive
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xf1061a42	sirdev_put_instance
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xfae183d6	sirdev_get_instance
+EXPORT_SYMBOL drivers/net/mdio 0x0f934475	mdio45_ethtool_gset_npage
+EXPORT_SYMBOL drivers/net/mdio 0x22bce513	mdio_mii_ioctl
+EXPORT_SYMBOL drivers/net/mdio 0x43e4defc	mdio45_nway_restart
+EXPORT_SYMBOL drivers/net/mdio 0x7577f992	mdio_set_flag
+EXPORT_SYMBOL drivers/net/mdio 0xa1a29548	mdio45_probe
+EXPORT_SYMBOL drivers/net/mdio 0xb34a7575	mdio45_ethtool_spauseparam_an
+EXPORT_SYMBOL drivers/net/mdio 0xc6b1163f	mdio45_links_ok
+EXPORT_SYMBOL drivers/net/mii 0x0368b360	mii_link_ok
+EXPORT_SYMBOL drivers/net/mii 0x43ef9390	mii_check_link
+EXPORT_SYMBOL drivers/net/mii 0x5402a503	generic_mii_ioctl
+EXPORT_SYMBOL drivers/net/mii 0x692b2072	mii_ethtool_gset
+EXPORT_SYMBOL drivers/net/mii 0x88d5db8e	mii_ethtool_sset
+EXPORT_SYMBOL drivers/net/mii 0xa5d37ffa	mii_nway_restart
+EXPORT_SYMBOL drivers/net/mii 0xbc427540	mii_check_gmii_support
+EXPORT_SYMBOL drivers/net/mii 0xd1bfb3f3	mii_check_media
+EXPORT_SYMBOL drivers/net/pppox 0x705e6e71	register_pppox_proto
+EXPORT_SYMBOL drivers/net/pppox 0xabafdad5	pppox_ioctl
+EXPORT_SYMBOL drivers/net/pppox 0xe0ff7a18	unregister_pppox_proto
+EXPORT_SYMBOL drivers/net/pppox 0xfdb0adb9	pppox_unbind_sock
+EXPORT_SYMBOL drivers/net/sungem_phy 0x6a19437e	mii_phy_probe
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x0622e7eb	tms380tr_open
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x1c4d4248	tmsdev_term
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x54067bca	tmsdev_init
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xcabff295	tms380tr_netdev_ops
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd2328794	tms380tr_wait
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd49af46e	tms380tr_interrupt
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xf67db4d6	tms380tr_close
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x38da4725	cycx_intr
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x62be23ea	cycx_setup
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x66a4c4e6	cycx_down
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x968458a6	cycx_peek
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xb6f383de	cycx_poke
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xfe7cd576	cycx_exec
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x2653445b	detach_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x2784b8c0	register_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x37603b29	unregister_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x4f367952	hdlc_close
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x70304a75	alloc_hdlcdev
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x74c4bad5	attach_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x7eee097b	hdlc_start_xmit
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xb7cdd9e8	unregister_hdlc_device
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xc21df801	hdlc_open
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xd7817338	hdlc_change_mtu
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xf32ce7b9	hdlc_ioctl
+EXPORT_SYMBOL drivers/net/wireless/airo 0x2fa414dc	init_airo_card
+EXPORT_SYMBOL drivers/net/wireless/airo 0x57585f1d	reset_airo_card
+EXPORT_SYMBOL drivers/net/wireless/airo 0xff05bd0c	stop_airo_card
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x2243ffa5	ath_reg_notifier_apply
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x31219afb	ath_is_world_regd
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x58a2c7c2	ath_regd_init
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xbe25b39d	ath_regd_get_band_ctl
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xd729b160	ath_rxbuf_alloc
+EXPORT_SYMBOL drivers/net/wireless/atmel 0x233b62d1	init_atmel_card
+EXPORT_SYMBOL drivers/net/wireless/atmel 0x8f87d11c	stop_atmel_card
+EXPORT_SYMBOL drivers/net/wireless/atmel 0xebbbb68d	atmel_open
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x078c6eb3	hostap_set_multicast_list_queue
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x0e530507	hostap_set_hostapd_sta
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x1067fe4e	hostap_handle_sta_tx_exc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x118b5dd1	hostap_80211_rx
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x16de686f	hostap_info_process
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x25778a05	hostap_remove_interface
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x29e2435d	hostap_init_data
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x4cb34aec	hostap_set_auth_algs
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x4ce894b9	hostap_set_encryption
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x536fa190	hostap_init_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x5560c9d6	hostap_master_start_xmit
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x5a581712	hostap_80211_ops
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x6f41d449	hostap_add_interface
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x792be0be	prism2_update_comms_qual
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x93eafdda	hostap_init_ap_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x9ac63d81	hostap_check_sta_fw_version
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x9eb74f5d	hostap_set_antsel
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa12ad27f	hostap_dump_tx_header
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa72c508d	hostap_set_roaming
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb2a945e0	hostap_dump_rx_header
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb4b77c8b	hostap_80211_get_hdrlen
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xbd2f320a	hostap_set_string
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xcaaffcb5	hostap_get_porttype
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xe48fb826	hostap_info_init
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xec6c115a	hostap_free_data
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xecfc6613	hostap_setup_dev
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf2b0e477	hostap_remove_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf2bbc65b	hostap_set_hostapd
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf84c4745	hostap_set_word
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x047b14ad	libipw_rx_mgt
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x07bcec16	libipw_get_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x0eafeb2b	libipw_xmit
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x2136be0d	alloc_ieee80211
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x233cc5a5	libipw_channel_to_index
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x28631ec9	libipw_channel_to_freq
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x30502193	libipw_wx_set_encodeext
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x435cd5a5	libipw_change_mtu
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x4d2fff12	libipw_networks_age
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x568cf5ae	libipw_wx_get_encode
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x6fb8c4a2	libipw_wx_get_encodeext
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x71ced517	libipw_get_channel_flags
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x80514c10	libipw_set_geo
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x8cd4918c	libipw_wx_set_encode
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x8e75bc56	libipw_get_geo
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x9b3c934a	libipw_is_valid_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x9d07fdfa	libipw_wx_get_scan
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xa11a15aa	libipw_rx
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xae1549a4	libipw_txb_free
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xe6ce1b2d	libipw_freq_to_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xed992833	free_ieee80211
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x03bb5936	iwl_scan_cancel_timeout
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x040f2b49	iwl_tt_enter_ct_kill
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0a87e766	iwl_cmd_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0a9c3a42	iwl_eeprom_query16
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0afee4bc	iwl_rx_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0ba46a4b	iwl_get_sta_id
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0cc6a6ce	iwl_full_rxon_required
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0cd386ba	iwl_check_rxon_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0f343c39	iwl_send_bt_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0f3a458f	iwl_mac_add_interface
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x10889ceb	iwl_set_tx_power
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1294797d	iwl_verify_ucode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x12f37bfa	iwl_init_channel_map
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1321a8ae	iwl_send_statistics_request
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x15daa550	iwl_rx_queue_space
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x18b17696	iwl_rx_pm_debug_statistics_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x19f0e900	iwl_debug_level
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1ae108a8	iwl_mac_beacon_update
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1c287a66	iwl_free_tfds_in_queue
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1cab172a	iwlcore_free_geos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d77b399	iwl_bcast_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1dd80be4	iwl_sta_rx_agg_start
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1e305413	iwl_update_tkip_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1e854eea	iwl_tx_ant_restriction
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1f605cbc	iwl_setup_rxon_timing
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x21c4792e	iwl_setup_mac
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x225b7fa5	iwl_rx_pm_sleep_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x226e4da1	iwl_txq_ctx_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x24589a6b	iwl_eeprom_check_version
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x24a95f48	iwlcore_eeprom_acquire_semaphore
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x24cb3189	iwlcore_eeprom_enhanced_txpower
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2500336e	iwl_rx_reply_rx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2501a114	iwl_mac_get_tx_stats
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x279fbd96	iwl_mac_remove_interface
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2ee2353f	iwl_txq_check_empty
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x30917005	iwl_configure_filter
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x34740c2e	iwl_bg_scan_check
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x355a7816	iwl_tx_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x396f4f68	iwl_ht_enabled
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3a654b40	iwl_hw_nic_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3abea2d0	iwl_uninit_drv
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4158ff98	iwl_free_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x43b4b6d5	iwl_add_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x44790077	iwl_send_cmd_pdu
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x464cc6a7	iwlcore_eeprom_query_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x47ad74bf	iwl_is_monitor_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x49109265	iwl_rxon_add_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4a8c7383	iwl_send_lq_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4c7ca92b	iwl_rx_reply_error
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4cc1087e	iwl_reset_run_time_calib
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4cf3b655	iwl_setup_rx_scan_handlers
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4eade525	iwl_rx_reply_rx_phy
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4ec076c6	iwl_hw_txq_ctx_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5065c5ba	iwl_connection_init_rx_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5140a7ce	iwl_rx_csa
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x573aff19	iwl_power_initialize
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x57cbf908	iwl_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5b37346d	iwl_rx_replenish
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5c6c945e	iwl_eeprom_query_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5de4f4d3	iwl_tt_exit_ct_kill
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x60774702	iwl_queue_space
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6166e8a4	iwl_sta_tx_modify_enable_tid
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6792ade4	iwl_bg_abort_scan
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x69382eb9	iwl_clear_stations_table
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6bf84507	iwl_get_passive_dwell_time
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6bfd77c4	iwl_reset_qos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6daf369a	iwl_tt_exit
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x710c7ce7	iwl_irq_handle_error
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7135c088	iwl_rxq_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7586a7d2	iwl_free_channel_map
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7866f38f	iwl_set_rxon_hwcrypto
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x78976e61	iwl_isr_legacy
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7972446d	iwl_mac_reset_tsf
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7b620d4e	iwl_set_dynamic_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7b650610	iwl_alloc_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7f0f2db3	iwl_mac_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7f5cf9ec	iwl_is_ht40_tx_allowed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8432e566	iwl_reset_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8670273d	iwl_hwrate_to_plcp_idx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8736f61d	iwl_rx_queue_restock
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8c6008c3	iwl_sta_rx_agg_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8c729d6c	iwl_init_sensitivity
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8fd79d21	iwl_disable_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x908d1e74	iwl_send_cmd_sync
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9231f530	iwl_tx_queue_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x999140d2	iwl_alloc_all
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9b1b06a7	iwl_pci_resume
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9b1b977a	iwl_txq_update_write_ptr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9d570387	iwl_tt_handler
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9da3e43d	iwl_fill_probe_req
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9df5c30e	iwl_set_decrypted_flag
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9faced57	iwl_calib_set
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa39d9677	iwl_eeprom_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa408dbde	iwl_tx_queue_reclaim
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa4a9aa87	iwl_set_rxon_ht
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa852f2d7	iwl_remove_default_wep_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa88cb74e	iwl_rx_replenish_now
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaa35bd8f	iwl_eeprom_get_mac
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xac417a0a	iwl_leds_register
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaf2a1fd1	iwl_scan_cancel
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaf2f2966	iwl_set_hw_params
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb52da533	iwl_sensitivity_calibration
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb6c579c0	iwl_leds_unregister
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb6f95fa6	iwl_activate_qos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb771aa97	iwl_eeprom_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb78b46d6	iwl_tx_skb
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb8ee263f	iwl_set_default_wep_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbe367511	iwl_mac_hw_scan
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbe52b3dc	iwl_rx_queue_update_write_ptr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbe93cea8	iwl_get_active_dwell_time
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbfed8ec1	iwl_get_ra_sta_id
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc0a5e52e	iwl_set_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc21e2cdc	iwl_rx_queue_alloc
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc4b28ff8	iwl_find_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc6395287	iwl_setup_scan_deferred_work
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc75d5470	iwlcore_eeprom_verify_signature
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc7794b30	iwl_bg_scan_completed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcbaf4931	get_cmd_string
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcd58bb0f	iwl_send_static_wepkey_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcea9323c	iwl_send_cmd_pdu_async
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcf8dbfa3	iwl_bss_info_changed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd0643dac	iwl_send_add_sta
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd133759b	iwl_tx_agg_start
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd5a3dbd0	iwl_remove_dynamic_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd5f155a4	iwl_rf_kill_ct_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd7bfd8a6	iwl_power_update_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd8a84cfa	iwl_tx_cmd_complete
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd9648504	iwlcore_init_geos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd97b443e	iwl_rx_missed_beacon_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xda55255d	iwl_rx_reply_compressed_ba
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe12394ab	iwl_tt_initialize
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe34703e9	iwl_mac_conf_tx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe380f90e	iwl_set_rxon_chain
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe7ce5d70	iwl_rates
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xea01039a	iwl_rate_get_lowest_plcp
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xec3249e6	iwl_send_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xee679fa5	iwl_init_drv
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xef26d878	iwl_rx_statistics
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf0a503ba	iwl_set_rxon_channel
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf23b85d5	iwl_get_free_ucode_key_index
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf43cbcb7	iwl_send_calib_results
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf5774d2d	iwlcore_eeprom_release_semaphore
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf6e47b1e	iwl_chain_noise_calibration
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf76314ed	iwl_hwrate_to_tx_control
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf8afe32a	iwl_hw_detect
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf9bb89f3	iwl_tx_agg_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf9ec3b6f	iwl_pci_suspend
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfd6a3a18	iwl_get_channel_info
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x0ce702d8	orinoco_up
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x27987b57	orinoco_init
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x2cf2c77b	alloc_orinocodev
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x3785aa92	orinoco_down
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x3d484541	free_orinocodev
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x4196c38b	hermes_write_ltv
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x6a927e18	orinoco_interrupt
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x934b1b91	orinoco_if_del
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xa031d8e4	hermes_doicmd_wait
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc60b5e9e	hermes_bap_pwrite
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd38d8ae2	hermes_read_ltv
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd3f714e5	hermes_bap_pread
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5168829	hermes_allocate
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5336e5d	hermes_init
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd54e219d	hermes_docmd_wait
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xed47b224	hermes_struct_init
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xf4f8870e	orinoco_if_add
+EXPORT_SYMBOL drivers/parport/parport 0x0215ec48	parport_read
+EXPORT_SYMBOL drivers/parport/parport 0x041bcb1c	parport_ieee1284_ecp_read_data
+EXPORT_SYMBOL drivers/parport/parport 0x0d52f84c	parport_wait_event
+EXPORT_SYMBOL drivers/parport/parport 0x1daec37a	parport_ieee1284_read_nibble
+EXPORT_SYMBOL drivers/parport/parport 0x241a5b79	parport_unregister_driver
+EXPORT_SYMBOL drivers/parport/parport 0x2947ce64	parport_unregister_device
+EXPORT_SYMBOL drivers/parport/parport 0x29a02bc9	parport_get_port
+EXPORT_SYMBOL drivers/parport/parport 0x3d168fa7	parport_ieee1284_ecp_write_data
+EXPORT_SYMBOL drivers/parport/parport 0x3eaaf719	parport_ieee1284_ecp_write_addr
+EXPORT_SYMBOL drivers/parport/parport 0x4048e90f	parport_claim_or_block
+EXPORT_SYMBOL drivers/parport/parport 0x40570739	parport_ieee1284_epp_write_data
+EXPORT_SYMBOL drivers/parport/parport 0x43eb7f87	parport_ieee1284_epp_write_addr
+EXPORT_SYMBOL drivers/parport/parport 0x4d2a941b	parport_ieee1284_interrupt
+EXPORT_SYMBOL drivers/parport/parport 0x50ce5119	parport_release
+EXPORT_SYMBOL drivers/parport/parport 0x567af616	parport_write
+EXPORT_SYMBOL drivers/parport/parport 0x693952ab	parport_set_timeout
+EXPORT_SYMBOL drivers/parport/parport 0x6a7d7b2f	parport_wait_peripheral
+EXPORT_SYMBOL drivers/parport/parport 0x70cfb32c	parport_find_number
+EXPORT_SYMBOL drivers/parport/parport 0x76a4cb5a	parport_register_device
+EXPORT_SYMBOL drivers/parport/parport 0x8e8b582f	parport_ieee1284_epp_read_addr
+EXPORT_SYMBOL drivers/parport/parport 0x93d46b7e	parport_negotiate
+EXPORT_SYMBOL drivers/parport/parport 0x9d5eff70	parport_irq_handler
+EXPORT_SYMBOL drivers/parport/parport 0xa0e2216e	parport_ieee1284_read_byte
+EXPORT_SYMBOL drivers/parport/parport 0xb0d9dfc3	parport_remove_port
+EXPORT_SYMBOL drivers/parport/parport 0xc7001878	parport_claim
+EXPORT_SYMBOL drivers/parport/parport 0xc9c18a68	parport_announce_port
+EXPORT_SYMBOL drivers/parport/parport 0xdee150c4	parport_register_port
+EXPORT_SYMBOL drivers/parport/parport 0xe6860dfa	parport_find_base
+EXPORT_SYMBOL drivers/parport/parport 0xef85a42a	parport_put_port
+EXPORT_SYMBOL drivers/parport/parport 0xefdad503	parport_ieee1284_epp_read_data
+EXPORT_SYMBOL drivers/parport/parport 0xfc2e4ae7	parport_register_driver
+EXPORT_SYMBOL drivers/parport/parport 0xfe69ae5b	parport_ieee1284_write_compat
+EXPORT_SYMBOL drivers/parport/parport_pc 0xcf45a167	parport_pc_probe_port
+EXPORT_SYMBOL drivers/parport/parport_pc 0xe3aa7e7e	parport_pc_unregister_port
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x0dfb6dab	pcmcia_loop_config
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x2bddeb14	pcmcia_request_window
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x3baf653d	pcmcia_request_irq
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x448e58c8	pcmcia_get_mem_page
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x480bf463	pcmcia_map_mem_page
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4fd033a0	pcmcia_error_func
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x549023d5	pcmcia_disable_device
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x8490f25e	pcmcia_release_window
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x9c4199c5	pcmcia_modify_configuration
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xa3fb2dc7	pcmcia_get_window
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xb05e4c5d	pcmcia_request_configuration
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xbc55b37a	pcmcia_access_configuration_register
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xc0e38af9	pcmcia_request_io
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xc6d687cf	pcmcia_unregister_driver
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xc7ce2006	pcmcia_dev_present
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xdd65c4fa	pcmcia_register_driver
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf0a25e12	pcmcia_error_ret
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x0055c5ec	pcmcia_socket_dev_resume
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x089893ca	pcmcia_replace_cis
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x0ba6bdc2	pcmcia_register_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x172ec6bd	pcmcia_socket_class
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x189d24ca	pccard_get_tuple_data
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x1e8cdbee	pcmcia_resume_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x1f4a02b6	pcmcia_adjust_io_region
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x212db8d2	pcmcia_socket_list
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x265f0bc7	pcmcia_find_mem_region
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x27a887ea	pcmcia_insert_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x2b98d8d9	pccard_get_next_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x2e8d088f	pccard_static_ops
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x490b50e6	pccard_get_first_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x576c6a39	pcmcia_socket_dev_early_resume
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x5d77b759	pccard_validate_cis
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x5f42a69d	pcmcia_socket_list_rwsem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x613e0a37	pcmcia_parse_events
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x657a9a49	pccard_register_pcmcia
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x78caa674	pcmcia_suspend_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x7fe02acc	pcmcia_get_socket_by_nr
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x8d0a6217	destroy_cis_cache
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x96f66f34	pcmcia_reset_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xa58738b6	pcmcia_read_cis_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xafa27882	pcmcia_write_cis_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xb2420fe4	pcmcia_socket_dev_late_resume
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xb2cb766d	release_cis_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xb2f6e098	pcmcia_validate_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc02ef2c8	pcmcia_parse_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc1ab7076	pcmcia_put_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc7770b48	pcmcia_unregister_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc9cae055	pcmcia_eject_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcf97f3bd	dead_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xdc94ae77	pcmcia_get_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xe6c992ed	pcmcia_find_io_region
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf300a5cc	pcmcia_socket_dev_suspend
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xff579c70	pccard_read_tuple
+EXPORT_SYMBOL drivers/pcmcia/rsrc_nonstatic 0x6ff0008e	pccard_nonstatic_ops
+EXPORT_SYMBOL drivers/platform/x86/sony-laptop 0x5bb1e117	sony_pic_camera_command
+EXPORT_SYMBOL drivers/pps/pps_core 0x1e145952	pps_unregister_source
+EXPORT_SYMBOL drivers/pps/pps_core 0xa7859d2c	pps_register_source
+EXPORT_SYMBOL drivers/pps/pps_core 0xe6a16116	pps_event
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x1aa1b27a	fcoe_ctlr_link_up
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x40e1e180	fcoe_ctlr_recv_flogi
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x478cebd8	fcoe_ctlr_link_down
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x746605e9	fcoe_ctlr_destroy
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x96bbe928	fcoe_ctlr_init
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xbd52a808	fcoe_ctlr_els_send
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xfdce82d1	fcoe_ctlr_recv
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x02f884ee	fc_fcp_complete
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x05ac2fa2	fc_frame_crc_check
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x06581ba9	fc_rport_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x06829a17	fc_set_mfs
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x076a0909	fc_seq_start_next
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0af357c3	fc_rport_terminate_io
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0d6a644a	fc_lport_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0e1aa9bd	fc_seq_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1e89b531	fc_get_host_port_type
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1f34c1a0	fc_linkdown
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x23d7bcc2	fc_exch_mgr_free
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x2f3f87b5	fc_exch_recv
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x36e5fbaf	fc_cpu_mask
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x38e450c3	fc_seq_els_rsp_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x4d84b5cd	fc_queuecommand
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x4e4971df	fc_lport_destroy
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x56183917	fc_destroy_rport
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x5a992a4f	fc_fcp_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x5c6ce5ad	fc_disc_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x5e1c4e43	fc_get_host_stats
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x67750428	fc_exch_done
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x76635229	fc_exch_mgr_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x7dec5eea	fc_get_host_port_state
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x7e89dec2	fc_fabric_login
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x99a612ce	fc_change_queue_depth
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa04fcaa9	fc_fcp_ddp_setup
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa086d6d9	fc_lport_config
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa1452125	fc_get_host_speed
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xacaa9653	fc_elsct_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xaf9e09ef	fc_lport_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xbfb26569	fc_linkup
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xc3e5d63b	fc_set_rport_loss_tmo
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xcbb7300c	fc_fabric_logoff
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xcbe26a04	fc_exch_mgr_add
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xcc6bedd9	fc_fcp_destroy
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xce97a6b8	fc_change_queue_type
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd2ecab45	fc_exch_mgr_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd382d183	fc_exch_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd6cb3359	fc_setup_rport
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xdc3ec222	fc_exch_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xde048c89	fc_exch_seq_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe1f6301d	fc_eh_host_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe335ad6e	fc_eh_device_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xeb6b61ba	fc_exch_mgr_del
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xedfa2b49	__fc_frame_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf7365d60	fc_seq_exch_abort
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xfd52d26f	fc_eh_abort
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xfdba77ec	fc_slave_alloc
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x11311100	mraid_mm_register_adp
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x2250c66e	mraid_mm_adapter_app_handle
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x512c956d	mraid_mm_unregister_adp
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x010d2654	osd_req_add_set_attr_list
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0c17edb1	osd_sec_init_nosec_doall_caps
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x263fb76c	osd_req_decode_get_attr_list
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x266354a6	osd_req_list_partition_objects
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x2e2d8dea	osd_req_set_attributes
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x3035aca6	osd_req_list_dev_partitions
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x34e7dc3d	osd_req_read
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x3aa08c4c	osd_execute_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x4038b612	osd_req_flush_collection
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x53168d1e	osd_req_create_partition
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x5c678449	osd_start_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x6434fb11	osd_auto_detect_ver
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x71474668	osd_req_remove_object
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x79bd067f	osd_req_add_get_attr_page
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x7c1739cc	osd_req_list_partition_collections
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x7d10dc4e	osd_req_remove_partition
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x811bb697	osd_dev_fini
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x839f5f87	osd_req_flush_object
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x8cf44704	osd_req_format
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x995f89e4	osd_finalize_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x9c2f1602	osd_req_decode_sense_full
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xa13c6c6f	osd_req_add_get_attr_list
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xaa05631c	osd_req_get_attributes
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xaa43625d	osd_req_flush_partition
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xac498aa9	osd_req_write
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xad4e07c2	osd_end_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xc2830054	osd_req_read_kern
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xc80ae2aa	osd_dev_init
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xcf65e36f	osd_execute_request_async
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xd6b82347	osd_req_create_object
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xd8e94c9e	osd_req_list_collection_objects
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xea8b0a1d	osd_req_write_kern
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xf421e97a	osd_req_flush_obsd
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x11bb3e0e	osduld_put_device
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x41c83dcd	osduld_path_lookup
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x5fc48609	osduld_unregister_test
+EXPORT_SYMBOL drivers/scsi/osd/osd 0xf038a93a	osduld_register_test
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x1a553651	qlogicfas408_info
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x30980b2d	qlogicfas408_biosparam
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x3fd8cd71	qlogicfas408_detect
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x43165783	qlogicfas408_disable_ints
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x7c6b0ff3	qlogicfas408_bus_reset
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xc3fc9fdd	qlogicfas408_abort
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xdc310b12	qlogicfas408_ihandl
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xe76b3b20	qlogicfas408_get_chip_type
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xf2b95199	qlogicfas408_setup
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xfb981d3b	qlogicfas408_queuecommand
+EXPORT_SYMBOL drivers/scsi/raid_class 0x68190eb6	raid_class_attach
+EXPORT_SYMBOL drivers/scsi/raid_class 0xd33820f0	raid_class_release
+EXPORT_SYMBOL drivers/scsi/raid_class 0xedc76326	raid_component_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x0725e25e	fc_vport_create
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x1433ac50	scsi_is_fc_rport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x39aa8028	fc_vport_terminate
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x3b4b2703	fc_remote_port_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x4c65ca51	fc_release_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x5f36369c	fc_remote_port_rolechg
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x7954b1ea	fc_get_event_number
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x939ff279	scsi_is_fc_vport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xafec3f02	fc_host_post_vendor_event
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xd52764e8	fc_remove_host
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xd6942034	fc_attach_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xf27eb2da	fc_host_post_event
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xfcb72d1b	fc_remote_port_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x10656e7b	sas_port_mark_backlink
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x154865bf	scsi_is_sas_rphy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x1a4a8648	sas_rphy_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x1cc60632	sas_remove_children
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x23c058c1	sas_expander_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x3158a624	scsi_is_sas_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x325d1cfb	sas_port_alloc_num
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x347ed3ff	sas_rphy_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x41fe7981	sas_port_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x46728972	sas_remove_host
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x53aa0048	sas_rphy_remove
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x74af1b3f	sas_phy_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x7754f0cd	sas_release_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x7d9983d6	sas_rphy_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x8d4ee569	sas_port_delete_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xa21e32f3	sas_phy_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xa6c8e46c	sas_port_add_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xc24fd6ca	sas_read_port_mode_page
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xc4307b21	sas_attach_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xd1198793	sas_port_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xdd674a39	sas_end_device_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xf013aecc	sas_port_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xf5b5a48b	sas_phy_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xfaae359e	scsi_is_sas_port
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xfcc4bec5	sas_phy_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xff89fc85	sas_port_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x15fdee01	spi_release_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x1e130a84	spi_dv_device
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x22e4aa90	spi_display_xfer_agreement
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x3686ea09	spi_print_msg
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x8bcba099	spi_schedule_dv_device
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0xfd6cb7f6	spi_attach_transport
+EXPORT_SYMBOL drivers/ssb/ssb 0x0831f90a	ssb_dma_translation
+EXPORT_SYMBOL drivers/ssb/ssb 0x08b715a5	ssb_bus_suspend
+EXPORT_SYMBOL drivers/ssb/ssb 0x1079447f	ssb_pcihost_register
+EXPORT_SYMBOL drivers/ssb/ssb 0x1e744b9d	ssb_pmu_set_ldo_paref
+EXPORT_SYMBOL drivers/ssb/ssb 0x3c25ea66	__ssb_driver_register
+EXPORT_SYMBOL drivers/ssb/ssb 0x4c436954	ssb_driver_unregister
+EXPORT_SYMBOL drivers/ssb/ssb 0x4d6ee1ef	ssb_bus_pcibus_register
+EXPORT_SYMBOL drivers/ssb/ssb 0x710c7468	ssb_dma_alloc_consistent
+EXPORT_SYMBOL drivers/ssb/ssb 0xa6cbf0ac	ssb_clockspeed
+EXPORT_SYMBOL drivers/ssb/ssb 0xb052b1c0	ssb_pmu_set_ldo_voltage
+EXPORT_SYMBOL drivers/ssb/ssb 0xc0447183	ssb_bus_may_powerdown
+EXPORT_SYMBOL drivers/ssb/ssb 0xc0512e0f	ssb_admatch_base
+EXPORT_SYMBOL drivers/ssb/ssb 0xc0dc93e5	ssb_bus_resume
+EXPORT_SYMBOL drivers/ssb/ssb 0xc6f0461a	ssb_device_enable
+EXPORT_SYMBOL drivers/ssb/ssb 0xc7eb942e	ssb_set_devtypedata
+EXPORT_SYMBOL drivers/ssb/ssb 0xd382e400	ssb_dma_free_consistent
+EXPORT_SYMBOL drivers/ssb/ssb 0xd481192b	ssb_admatch_size
+EXPORT_SYMBOL drivers/ssb/ssb 0xe28cb7a8	ssb_device_is_enabled
+EXPORT_SYMBOL drivers/ssb/ssb 0xe4c02de8	ssb_dma_set_mask
+EXPORT_SYMBOL drivers/ssb/ssb 0xf0ebb89a	ssb_pcicore_dev_irqvecs_enable
+EXPORT_SYMBOL drivers/ssb/ssb 0xf2e79232	ssb_bus_powerup
+EXPORT_SYMBOL drivers/ssb/ssb 0xf3536af4	ssb_bus_unregister
+EXPORT_SYMBOL drivers/ssb/ssb 0xf3751ce5	ssb_bus_sdiobus_register
+EXPORT_SYMBOL drivers/ssb/ssb 0xfa40b2a9	ssb_device_disable
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x0cd330f4	range_unknown
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x195cf162	check_chanlist
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x2c242af0	comedi_get_subdevice_runflags
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x2f0ad9d3	range_bipolar5
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x3123c4f9	comedi_buf_write_alloc
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x491418e3	comedi_buf_read_free
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x4fd9d954	comedi_set_subdevice_runflags
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x4fe634f3	range_bipolar2_5
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x56f8a5a7	comedi_reset_async_buf
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x786160f4	comedi_buf_read_n_available
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x8113872c	range_unipolar10
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x8531c662	comedi_buf_get
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x9380a2b5	comedi_buf_memcpy_to
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x93a09c29	comedi_buf_read_alloc
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x97320e03	comedi_buf_put
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x992b10e4	comedi_event
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xaca2c440	comedi_driver_register
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xb2d558a9	comedi_driver_unregister
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xbb52fc7f	range_bipolar10
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xbb83f6ad	comedi_buf_write_free
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xcb92918a	comedi_error
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xdb2044b2	range_unipolar5
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xe9021ffe	comedi_buf_memcpy_from
+EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0x333224f8	subdev_8255_interrupt
+EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0xb102fbe4	subdev_8255_cleanup
+EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0xb5aa36bf	subdev_8255_init_irq
+EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0xf8d6c38a	subdev_8255_init
+EXPORT_SYMBOL drivers/staging/comedi/drivers/comedi_fc 0x4b43044a	cfc_write_array_to_buffer
+EXPORT_SYMBOL drivers/staging/comedi/drivers/comedi_fc 0xc344be4c	cfc_handle_events
+EXPORT_SYMBOL drivers/staging/comedi/drivers/comedi_fc 0xe6764634	cfc_read_array_from_buffer
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x08194808	mite_request_channel_in_range
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x0be10fda	mite_setup
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x2b65ecb3	mite_bytes_written_to_memory_ub
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x33436e50	mite_bytes_written_to_memory_lb
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x40de2a9d	mite_prep_dma
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x4fcf3649	mite_release_channel
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x5b0e4868	mite_dma_disarm
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x6e070b61	mite_bytes_read_from_memory_lb
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x6e5e8073	mite_buf_change
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x76218982	mite_bytes_read_from_memory_ub
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x76e6775f	mite_bytes_in_transit
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x7d74152b	mite_sync_output_dma
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x897f2949	mite_dma_arm
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x95cdab7e	mite_dma_tcr
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xac237ad7	mite_devices
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xacdc8b80	mite_setup2
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xc3da04f7	mite_get_status
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xceb7d91c	mite_sync_input_dma
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xe01674a1	mite_unsetup
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xfb3ba025	mite_list_devices
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xffdbc294	mite_done
+EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0x73472d88	subdev_700_cleanup
+EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0x77dced41	subdev_700_init_irq
+EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0x800e19eb	subdev_700_interrupt
+EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0xe21008be	subdev_700_init
+EXPORT_SYMBOL drivers/staging/comedi/drivers/pcm_common 0x54fd0d6d	comedi_pcm_cmdtest
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x042d55f4	comedi_loglevel
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x0488ce0e	comedi_get_n_ranges
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x0cad1c36	comedi_get_subdevice_type
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x13e3042c	comedi_command
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x194eb4ae	comedi_get_n_channels
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x1c5555d9	comedi_cancel
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x1ec0e2d3	comedi_get_buf_head_pos
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x22318694	comedi_set_user_int_count
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x262e9c18	comedi_dio_write
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x370d69d5	comedi_dio_read
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x3cb614fc	comedi_data_write
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x3db41e4f	comedi_poll
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x3de6a4a3	comedi_get_buffer_offset
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x409d3263	comedi_do_insn
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x51da786d	comedi_register_callback
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x52769094	comedi_find_subdevice_by_type
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x628ed463	comedi_get_n_subdevices
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x671c2623	comedi_get_buffer_size
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x696272c9	comedi_unlock
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x826bd656	comedi_data_read_delayed
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x8e199bbf	comedi_perror
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x8fb4413e	comedi_data_read_hint
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x9b266320	comedi_get_krange
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x9dde39b5	comedi_strerror
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xa0334b40	comedi_get_driver_name
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xa094eab0	comedi_get_board_name
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xa7c55c52	comedi_open
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xaa456501	comedi_mark_buffer_read
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xb45b8b7b	comedi_mark_buffer_written
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xb5396dad	comedi_get_maxdata
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xb5c3ac2a	comedi_map
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xc4ec62b3	comedi_get_len_chanlist
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xc7d949df	comedi_lock
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xd2a9a259	comedi_get_version_code
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xd46a9468	comedi_dio_config
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xd48facbb	comedi_command_test
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xddd89421	comedi_close
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xe2208940	comedi_data_read
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xe38c6fb4	comedi_unmap
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xed5731a4	comedi_get_subdevice_flags
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xefd0c778	comedi_fileno
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xf17e03df	comedi_dio_bitfield
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xf71581db	comedi_get_buffer_contents
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x15b3f68d	cx25821_set_gpiopin_direction
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x3eb4ae46	cx25821_sram_channel_setup_audio
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x471e1cfb	cx25821_devlist
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x67cc5b8b	cx25821_sram_channels
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x784853c3	cx25821_print_irqbits
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x91d2ff8c	cx25821_sram_channel_setup
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0xb82d7880	cx25821_dev_get
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0xbe18dbe5	cx25821_risc_databuffer_audio
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0xd8407070	cx25821_dev_unregister
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0xeb5cd569	cx25821_sram_channel_dump_audio
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0xfbfad699	cx25821_sram_channel_dump
+EXPORT_SYMBOL drivers/staging/hv/hv_vmbus 0x11012a10	vmbus_child_driver_unregister
+EXPORT_SYMBOL drivers/staging/hv/hv_vmbus 0x253f3d14	vmbus_get_interface
+EXPORT_SYMBOL drivers/staging/hv/hv_vmbus 0x7335fe53	vmbus_child_driver_register
+EXPORT_SYMBOL drivers/staging/hv/hv_vmbus 0xdf1a5ef6	vmbus_loglevel
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x151918d6	iio_device_unregister
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x19bb3244	iio_remove_event_from_list
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x2e8ef98f	__iio_push_event
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x3f512fe9	iio_unregister_interrupt_line
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x6b43f4bd	iio_register_interrupt_line
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x739ae300	iio_devt
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x77941afa	iio_allocate_device
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x77a91284	iio_class
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x89b73dcf	iio_read_const_attr
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xb214a551	iio_device_register
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xcb842df9	__iio_change_event
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xd92f55db	iio_add_event_to_list
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xdaa508a5	iio_push_event
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xea831a6b	iio_get_new_idr_val
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xf57a4aa3	iio_free_device
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xfcfb4aae	iio_free_idr_val
+EXPORT_SYMBOL drivers/staging/line6/line6usb 0x350703f2	variax_create_files
+EXPORT_SYMBOL drivers/staging/line6/line6usb 0x35def164	pod_create_files
+EXPORT_SYMBOL drivers/staging/line6/line6usb 0x62664f49	variax_remove_files
+EXPORT_SYMBOL drivers/staging/line6/line6usb 0xa2b2144a	pod_remove_files
+EXPORT_SYMBOL drivers/staging/rar/rar_driver 0xf8017f03	get_rar_address
+EXPORT_SYMBOL drivers/staging/vme/vme 0x00d7e722	vme_lm_count
+EXPORT_SYMBOL drivers/staging/vme/vme 0x072f901c	vme_master_rmw
+EXPORT_SYMBOL drivers/staging/vme/vme 0x0b40a8b6	vme_request_irq
+EXPORT_SYMBOL drivers/staging/vme/vme 0x0e10859d	vme_lm_get
+EXPORT_SYMBOL drivers/staging/vme/vme 0x0ec5babe	vme_dma_free
+EXPORT_SYMBOL drivers/staging/vme/vme 0x24a0b450	vme_new_dma_list
+EXPORT_SYMBOL drivers/staging/vme/vme 0x2b67d0bd	vme_free_irq
+EXPORT_SYMBOL drivers/staging/vme/vme 0x3f68d4cf	vme_lm_set
+EXPORT_SYMBOL drivers/staging/vme/vme 0x41e1ed5e	vme_dma_list_add
+EXPORT_SYMBOL drivers/staging/vme/vme 0x43e2f154	vme_master_read
+EXPORT_SYMBOL drivers/staging/vme/vme 0x45f6f50b	vme_register_bridge
+EXPORT_SYMBOL drivers/staging/vme/vme 0x48b99a13	vme_lm_free
+EXPORT_SYMBOL drivers/staging/vme/vme 0x5162936c	vme_slave_request
+EXPORT_SYMBOL drivers/staging/vme/vme 0x5ac5be6e	vme_master_request
+EXPORT_SYMBOL drivers/staging/vme/vme 0x6666140f	vme_dma_pci_attribute
+EXPORT_SYMBOL drivers/staging/vme/vme 0x74a43c8c	vme_request_dma
+EXPORT_SYMBOL drivers/staging/vme/vme 0x76bab4d4	vme_master_set
+EXPORT_SYMBOL drivers/staging/vme/vme 0x7754663b	vme_alloc_consistent
+EXPORT_SYMBOL drivers/staging/vme/vme 0x7797a741	vme_dma_vme_attribute
+EXPORT_SYMBOL drivers/staging/vme/vme 0x7cf35220	vme_master_free
+EXPORT_SYMBOL drivers/staging/vme/vme 0x849ba619	vme_bus_type
+EXPORT_SYMBOL drivers/staging/vme/vme 0x92fa5abb	vme_lm_detach
+EXPORT_SYMBOL drivers/staging/vme/vme 0x9aeb07e8	vme_lm_attach
+EXPORT_SYMBOL drivers/staging/vme/vme 0x9d279035	vme_master_write
+EXPORT_SYMBOL drivers/staging/vme/vme 0x9e4b2a7e	vme_dma_list_free
+EXPORT_SYMBOL drivers/staging/vme/vme 0xa09d045f	vme_get_size
+EXPORT_SYMBOL drivers/staging/vme/vme 0xa3e23c16	vme_register_driver
+EXPORT_SYMBOL drivers/staging/vme/vme 0xab5f1531	vme_dma_list_exec
+EXPORT_SYMBOL drivers/staging/vme/vme 0xb6b428ac	vme_unregister_driver
+EXPORT_SYMBOL drivers/staging/vme/vme 0xc8352002	vme_dma_pattern_attribute
+EXPORT_SYMBOL drivers/staging/vme/vme 0xcc5b0af0	vme_slave_set
+EXPORT_SYMBOL drivers/staging/vme/vme 0xdff905e5	vme_slave_free
+EXPORT_SYMBOL drivers/staging/vme/vme 0xe30d6ff5	vme_generate_irq
+EXPORT_SYMBOL drivers/staging/vme/vme 0xe60cbb2f	vme_master_get
+EXPORT_SYMBOL drivers/staging/vme/vme 0xe61b1e0b	vme_slave_get
+EXPORT_SYMBOL drivers/staging/vme/vme 0xe74820b9	vme_lm_request
+EXPORT_SYMBOL drivers/staging/vme/vme 0xeccbeafc	vme_dma_free_attribute
+EXPORT_SYMBOL drivers/staging/vme/vme 0xf1b1bb11	vme_free_consistent
+EXPORT_SYMBOL drivers/staging/vme/vme 0xfe212bd2	vme_slot_get
+EXPORT_SYMBOL drivers/staging/vme/vme 0xfee9f88f	vme_unregister_bridge
+EXPORT_SYMBOL drivers/telephony/ixj 0x40c61efd	ixj_pcmcia_probe
+EXPORT_SYMBOL drivers/telephony/phonedev 0x6861c3f2	phone_unregister_device
+EXPORT_SYMBOL drivers/telephony/phonedev 0x93e2965b	phone_register_device
+EXPORT_SYMBOL drivers/usb/gadget/dummy_hcd 0x6ac227f6	usb_gadget_register_driver
+EXPORT_SYMBOL drivers/usb/gadget/dummy_hcd 0x8ac78cdc	net2280_set_fifo_mode
+EXPORT_SYMBOL drivers/usb/gadget/dummy_hcd 0xef07c11f	usb_gadget_unregister_driver
+EXPORT_SYMBOL drivers/usb/host/sl811-hcd 0x9ddc6a05	sl811h_driver
+EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xa64a4cea	usb_nop_xceiv_unregister
+EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xd0e43207	usb_nop_xceiv_register
+EXPORT_SYMBOL drivers/usb/serial/usbserial 0x4166125b	usb_serial_suspend
+EXPORT_SYMBOL drivers/usb/serial/usbserial 0x8739a679	usb_serial_resume
+EXPORT_SYMBOL drivers/video/backlight/generic_bl 0xc86baa7c	corgibl_limit_intensity
+EXPORT_SYMBOL drivers/video/backlight/lcd 0x0c33df67	lcd_device_register
+EXPORT_SYMBOL drivers/video/backlight/lcd 0x44173d99	lcd_device_unregister
+EXPORT_SYMBOL drivers/video/console/bitblit 0x603bb13a	fbcon_set_bitops
+EXPORT_SYMBOL drivers/video/console/font 0x09c8eb55	font_vga_8x16
+EXPORT_SYMBOL drivers/video/console/font 0xbb99125c	get_default_font
+EXPORT_SYMBOL drivers/video/console/font 0xf7584a9c	find_font
+EXPORT_SYMBOL drivers/video/console/softcursor 0x2e7441a9	soft_cursor
+EXPORT_SYMBOL drivers/video/console/tileblit 0xedf445e5	fbcon_set_tileops
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x0b899388	cyber2000fb_attach
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x0c3b23f1	cyber2000fb_enable_extregs
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x0cc3ede5	cyber2000fb_detach
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x72663af7	cyber2000fb_get_fb_var
+EXPORT_SYMBOL drivers/video/cyber2000fb 0xaf5beef9	cyber2000fb_disable_extregs
+EXPORT_SYMBOL drivers/video/display/display 0x4a368e2d	display_device_unregister
+EXPORT_SYMBOL drivers/video/display/display 0x4d297708	display_device_register
+EXPORT_SYMBOL drivers/video/macmodes 0x08ed0b62	mac_vmode_to_var
+EXPORT_SYMBOL drivers/video/macmodes 0x67f3d0ac	mac_find_mode
+EXPORT_SYMBOL drivers/video/macmodes 0xe2304303	mac_map_monitor_sense
+EXPORT_SYMBOL drivers/video/matrox/g450_pll 0x3efd0081	matroxfb_g450_setpll_cond
+EXPORT_SYMBOL drivers/video/matrox/g450_pll 0x66c4d744	g450_mnp2f
+EXPORT_SYMBOL drivers/video/matrox/g450_pll 0xe20fb6df	matroxfb_g450_setclk
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0x1bb43698	matrox_mystique
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0x232f651a	matrox_G100
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0xd083e88e	DAC1064_global_init
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0xf8d56be4	DAC1064_global_restore
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_Ti3026 0x25fea07e	matrox_millennium
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_accel 0x64202541	matrox_cfbX_init
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0x01c64582	matroxfb_enable_irq
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0x6f44e40c	matroxfb_wait_for_sync
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0x6f886bfe	matroxfb_unregister_driver
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0xf7374fb0	matroxfb_register_driver
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_g450 0x68509f40	matroxfb_g450_shutdown
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_g450 0xc7c29ca7	matroxfb_g450_connect
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x209cec96	matroxfb_read_pins
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x25cf8049	matroxfb_PLL_calcclock
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x3bdee0c1	matroxfb_vgaHWrestore
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x450010c8	matroxfb_DAC_out
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x60691a1b	matroxfb_DAC_in
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0xabd8e427	matroxfb_var2my
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0xda94dfa9	matroxfb_vgaHWinit
+EXPORT_SYMBOL drivers/video/output 0xb6246a13	video_output_unregister
+EXPORT_SYMBOL drivers/video/output 0xda86c6dc	video_output_register
+EXPORT_SYMBOL drivers/video/sis/sisfb 0x3037658e	sis_malloc
+EXPORT_SYMBOL drivers/video/sis/sisfb 0x454a3cf0	sis_free
+EXPORT_SYMBOL drivers/video/svgalib 0x00d1fce9	svga_set_default_seq_regs
+EXPORT_SYMBOL drivers/video/svgalib 0x063d828d	svga_settile
+EXPORT_SYMBOL drivers/video/svgalib 0x06b1ca12	svga_tilecopy
+EXPORT_SYMBOL drivers/video/svgalib 0x07b3da30	svga_wseq_multi
+EXPORT_SYMBOL drivers/video/svgalib 0x1b95c56a	svga_check_timings
+EXPORT_SYMBOL drivers/video/svgalib 0x63e898d1	svga_set_default_crt_regs
+EXPORT_SYMBOL drivers/video/svgalib 0x7a3ae959	svga_wcrt_multi
+EXPORT_SYMBOL drivers/video/svgalib 0x80373a6d	svga_tileblit
+EXPORT_SYMBOL drivers/video/svgalib 0x80408443	svga_set_timings
+EXPORT_SYMBOL drivers/video/svgalib 0x85bbada0	svga_tilefill
+EXPORT_SYMBOL drivers/video/svgalib 0x8fa8438b	svga_set_textmode_vga_regs
+EXPORT_SYMBOL drivers/video/svgalib 0x8fcf383d	svga_tilecursor
+EXPORT_SYMBOL drivers/video/svgalib 0xab3b22ad	svga_set_default_gfx_regs
+EXPORT_SYMBOL drivers/video/svgalib 0xcfb8352f	svga_get_tilemax
+EXPORT_SYMBOL drivers/video/svgalib 0xdad682b1	svga_set_default_atc_regs
+EXPORT_SYMBOL drivers/video/svgalib 0xe07aba44	svga_get_caps
+EXPORT_SYMBOL drivers/video/svgalib 0xec83c473	svga_match_format
+EXPORT_SYMBOL drivers/video/svgalib 0xef774f5d	svga_compute_pll
+EXPORT_SYMBOL drivers/video/syscopyarea 0x8c65e61a	sys_copyarea
+EXPORT_SYMBOL drivers/video/sysfillrect 0x50545516	sys_fillrect
+EXPORT_SYMBOL drivers/video/sysimgblt 0x93198ff2	sys_imageblit
+EXPORT_SYMBOL drivers/video/vgastate 0x686de290	restore_vga
+EXPORT_SYMBOL drivers/video/vgastate 0xe7a2620e	save_vga
+EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x13b00025	w1_bq27000_write
+EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x5be93165	w1_bq27000_read
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x0261b073	w1_ds2760_read
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x0ed22a33	w1_ds2760_store_eeprom
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x17543457	w1_ds2760_write
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x5918c1d5	w1_ds2760_recall_eeprom
+EXPORT_SYMBOL drivers/w1/wire 0x285f95a6	w1_add_master_device
+EXPORT_SYMBOL drivers/w1/wire 0x8dacbeee	w1_unregister_family
+EXPORT_SYMBOL drivers/w1/wire 0x9ac36368	w1_remove_master_device
+EXPORT_SYMBOL drivers/w1/wire 0xb988e1d8	w1_register_family
+EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0x04e133fc	iTCO_vendor_check_noreboot_on
+EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0x672c9d44	iTCO_vendor_pre_keepalive
+EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xa78bd894	iTCO_vendor_pre_set_heartbeat
+EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xa8d6daac	iTCO_vendor_pre_start
+EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xd0efe320	iTCO_vendor_pre_stop
+EXPORT_SYMBOL fs/configfs/configfs 0x02b180d6	config_group_init_type_name
+EXPORT_SYMBOL fs/configfs/configfs 0x07ae6098	config_item_put
+EXPORT_SYMBOL fs/configfs/configfs 0x31ce428c	configfs_register_subsystem
+EXPORT_SYMBOL fs/configfs/configfs 0x6030c8ff	config_group_init
+EXPORT_SYMBOL fs/configfs/configfs 0x6b64dfed	configfs_unregister_subsystem
+EXPORT_SYMBOL fs/configfs/configfs 0x7935d7eb	configfs_undepend_item
+EXPORT_SYMBOL fs/configfs/configfs 0x7994fd20	config_group_find_item
+EXPORT_SYMBOL fs/configfs/configfs 0xa0683287	config_item_init_type_name
+EXPORT_SYMBOL fs/configfs/configfs 0xa9468e4c	config_item_get
+EXPORT_SYMBOL fs/configfs/configfs 0xb702caf3	configfs_depend_item
+EXPORT_SYMBOL fs/configfs/configfs 0xf11e92b0	config_item_set_name
+EXPORT_SYMBOL fs/configfs/configfs 0xf17ac4dd	config_item_init
+EXPORT_SYMBOL fs/fscache/fscache 0x0173969d	fscache_mark_pages_cached
+EXPORT_SYMBOL fs/fscache/fscache 0x06b56372	__fscache_wait_on_page_write
+EXPORT_SYMBOL fs/fscache/fscache 0x07d9b576	fscache_wait_bit_interruptible
+EXPORT_SYMBOL fs/fscache/fscache 0x100f309e	fscache_add_cache
+EXPORT_SYMBOL fs/fscache/fscache 0x128d16f0	__fscache_relinquish_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0x1767c331	fscache_withdraw_cache
+EXPORT_SYMBOL fs/fscache/fscache 0x1854c780	__fscache_check_page_write
+EXPORT_SYMBOL fs/fscache/fscache 0x1ec6b509	fscache_object_lookup_negative
+EXPORT_SYMBOL fs/fscache/fscache 0x3fc23318	fscache_wait_bit
+EXPORT_SYMBOL fs/fscache/fscache 0x44917f66	fscache_io_error
+EXPORT_SYMBOL fs/fscache/fscache 0x496932b9	fscache_op_debug_id
+EXPORT_SYMBOL fs/fscache/fscache 0x5331ea08	__fscache_read_or_alloc_pages
+EXPORT_SYMBOL fs/fscache/fscache 0x549dbbbd	fscache_enqueue_operation
+EXPORT_SYMBOL fs/fscache/fscache 0x63f96884	fscache_cache_cleared_wq
+EXPORT_SYMBOL fs/fscache/fscache 0x698a4e97	__fscache_maybe_release_page
+EXPORT_SYMBOL fs/fscache/fscache 0x6ec49bee	fscache_obtained_object
+EXPORT_SYMBOL fs/fscache/fscache 0x82775ec1	fscache_check_aux
+EXPORT_SYMBOL fs/fscache/fscache 0x86f8894f	fscache_object_states
+EXPORT_SYMBOL fs/fscache/fscache 0x94603545	__fscache_alloc_page
+EXPORT_SYMBOL fs/fscache/fscache 0xaedc0f28	__fscache_read_or_alloc_page
+EXPORT_SYMBOL fs/fscache/fscache 0xb504e0f5	__fscache_register_netfs
+EXPORT_SYMBOL fs/fscache/fscache 0xb702edd9	__fscache_write_page
+EXPORT_SYMBOL fs/fscache/fscache 0xb7444b3d	__fscache_update_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0xc46b380c	__fscache_attr_changed
+EXPORT_SYMBOL fs/fscache/fscache 0xd3912021	__fscache_uncache_page
+EXPORT_SYMBOL fs/fscache/fscache 0xd9c8edd5	fscache_init_cache
+EXPORT_SYMBOL fs/fscache/fscache 0xda1693e7	fscache_fsdef_index
+EXPORT_SYMBOL fs/fscache/fscache 0xf11d9a9f	fscache_put_operation
+EXPORT_SYMBOL fs/fscache/fscache 0xf6ba2722	fscache_object_slow_work_ops
+EXPORT_SYMBOL fs/fscache/fscache 0xf96676f0	__fscache_acquire_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0xfee4810d	__fscache_unregister_netfs
+EXPORT_SYMBOL fs/nfsd/nfsd 0x1f573533	nfs4_acl_posix_to_nfsv4
+EXPORT_SYMBOL fs/nfsd/nfsd 0x35e33c1e	nfs4_acl_write_who
+EXPORT_SYMBOL fs/nfsd/nfsd 0x5a157ae4	nfs4_acl_get_whotype
+EXPORT_SYMBOL fs/nfsd/nfsd 0x96ce9bb4	nfs4_acl_new
+EXPORT_SYMBOL fs/nfsd/nfsd 0xdb389aec	nfs4_acl_nfsv4_to_posix
+EXPORT_SYMBOL fs/quota/quota_tree 0x23da5e85	qtree_write_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0x31035955	qtree_entry_unused
+EXPORT_SYMBOL fs/quota/quota_tree 0x7596d97d	qtree_release_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0xaaaec9ca	qtree_read_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0xaec9027f	qtree_delete_dquot
+EXPORT_SYMBOL lib/crc-ccitt 0x651c2313	crc_ccitt
+EXPORT_SYMBOL lib/crc-ccitt 0x75811312	crc_ccitt_table
+EXPORT_SYMBOL lib/crc-itu-t 0x276c7e62	crc_itu_t
+EXPORT_SYMBOL lib/crc-itu-t 0xd29b009f	crc_itu_t_table
+EXPORT_SYMBOL lib/crc7 0xc086bfba	crc7
+EXPORT_SYMBOL lib/crc7 0xd80c3603	crc7_syndrome_table
+EXPORT_SYMBOL lib/libcrc32c 0x27000b29	crc32c
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x315c65fd	zlib_deflateInit2
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x48034724	zlib_deflateReset
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xaf64ad0d	zlib_deflate
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf0caf44b	zlib_deflate_workspacesize
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf741c793	zlib_deflateEnd
+EXPORT_SYMBOL net/802/p8023 0x3e3c8040	make_8023_client
+EXPORT_SYMBOL net/802/p8023 0x7df10841	destroy_8023_client
+EXPORT_SYMBOL net/9p/9pnet 0x0b3ac49a	p9pdu_dump
+EXPORT_SYMBOL net/9p/9pnet 0x0c08973f	p9_client_destroy
+EXPORT_SYMBOL net/9p/9pnet 0x1221f95e	p9_client_walk
+EXPORT_SYMBOL net/9p/9pnet 0x19cb7d2a	p9_client_wstat
+EXPORT_SYMBOL net/9p/9pnet 0x1c3b51e4	p9_client_fcreate
+EXPORT_SYMBOL net/9p/9pnet 0x2160ec26	p9_client_clunk
+EXPORT_SYMBOL net/9p/9pnet 0x244c6d40	p9_idpool_get
+EXPORT_SYMBOL net/9p/9pnet 0x2b560613	v9fs_get_trans_by_name
+EXPORT_SYMBOL net/9p/9pnet 0x3c9d0405	p9_tag_lookup
+EXPORT_SYMBOL net/9p/9pnet 0x3d73a797	p9_errstr2errno
+EXPORT_SYMBOL net/9p/9pnet 0x3da35774	v9fs_unregister_trans
+EXPORT_SYMBOL net/9p/9pnet 0x41e6bc51	p9_parse_header
+EXPORT_SYMBOL net/9p/9pnet 0x4a27e92e	p9_client_create
+EXPORT_SYMBOL net/9p/9pnet 0x5e0ef374	p9_idpool_check
+EXPORT_SYMBOL net/9p/9pnet 0x61852dea	p9_idpool_put
+EXPORT_SYMBOL net/9p/9pnet 0x683efc21	v9fs_register_trans
+EXPORT_SYMBOL net/9p/9pnet 0x6c5e479c	p9_idpool_create
+EXPORT_SYMBOL net/9p/9pnet 0x76b79bf1	p9stat_read
+EXPORT_SYMBOL net/9p/9pnet 0x7cbbdb91	p9_client_disconnect
+EXPORT_SYMBOL net/9p/9pnet 0x85bd8fc3	p9_client_attach
+EXPORT_SYMBOL net/9p/9pnet 0x85cfa6ec	p9_client_cb
+EXPORT_SYMBOL net/9p/9pnet 0x906bd673	p9_client_auth
+EXPORT_SYMBOL net/9p/9pnet 0x93fc0779	p9_client_write
+EXPORT_SYMBOL net/9p/9pnet 0x9c964743	p9stat_free
+EXPORT_SYMBOL net/9p/9pnet 0x9ec9a221	p9_client_remove
+EXPORT_SYMBOL net/9p/9pnet 0xaa08b09a	p9_client_stat
+EXPORT_SYMBOL net/9p/9pnet 0xbaa17b44	p9_idpool_destroy
+EXPORT_SYMBOL net/9p/9pnet 0xc1c4fa03	p9_client_open
+EXPORT_SYMBOL net/9p/9pnet 0xc32e8895	p9_client_read
+EXPORT_SYMBOL net/9p/9pnet 0xd0af5654	v9fs_get_default_trans
+EXPORT_SYMBOL net/9p/9pnet 0xe58a3360	p9_error_init
+EXPORT_SYMBOL net/9p/9pnet 0xf199a8a0	p9_client_version
+EXPORT_SYMBOL net/appletalk/appletalk 0x42d8fd28	alloc_ltalkdev
+EXPORT_SYMBOL net/appletalk/appletalk 0x6b9233f4	atrtr_get_dev
+EXPORT_SYMBOL net/appletalk/appletalk 0xc26d7db9	atalk_find_dev_addr
+EXPORT_SYMBOL net/appletalk/appletalk 0xf37915c7	aarp_send_ddp
+EXPORT_SYMBOL net/atm/atm 0x04198198	atm_dev_lookup
+EXPORT_SYMBOL net/atm/atm 0x1a24e5e2	sonet_subtract_stats
+EXPORT_SYMBOL net/atm/atm 0x2cc2d52d	vcc_hash
+EXPORT_SYMBOL net/atm/atm 0x64331d4b	atm_alloc_charge
+EXPORT_SYMBOL net/atm/atm 0x6d1ced27	vcc_sklist_lock
+EXPORT_SYMBOL net/atm/atm 0x767fb343	register_atm_ioctl
+EXPORT_SYMBOL net/atm/atm 0x89195dc3	sonet_copy_stats
+EXPORT_SYMBOL net/atm/atm 0xb48f72a6	atm_dev_deregister
+EXPORT_SYMBOL net/atm/atm 0xb6f3d77e	vcc_insert_socket
+EXPORT_SYMBOL net/atm/atm 0xbf7837f0	vcc_release_async
+EXPORT_SYMBOL net/atm/atm 0xc67412b5	atm_init_aal5
+EXPORT_SYMBOL net/atm/atm 0xe1c470ec	deregister_atm_ioctl
+EXPORT_SYMBOL net/atm/atm 0xe50867ac	atm_charge
+EXPORT_SYMBOL net/atm/atm 0xf1fe79ae	atm_dev_register
+EXPORT_SYMBOL net/atm/atm 0xf3a08f80	atm_proc_root
+EXPORT_SYMBOL net/atm/atm 0xf49bc67a	atm_pcr_goal
+EXPORT_SYMBOL net/ax25/ax25 0x1e08634e	ax25_rebuild_header
+EXPORT_SYMBOL net/ax25/ax25 0x22afff56	ax25_linkfail_register
+EXPORT_SYMBOL net/ax25/ax25 0x242852b9	ax25_uid_policy
+EXPORT_SYMBOL net/ax25/ax25 0x3c886070	ax25_send_frame
+EXPORT_SYMBOL net/ax25/ax25 0x3d2d82ec	ax25_display_timer
+EXPORT_SYMBOL net/ax25/ax25 0x3eecf9e1	ax25_header_ops
+EXPORT_SYMBOL net/ax25/ax25 0x4502c65a	asc2ax
+EXPORT_SYMBOL net/ax25/ax25 0x53dea1ff	ax2asc
+EXPORT_SYMBOL net/ax25/ax25 0x5fc6280f	ax25_findbyuid
+EXPORT_SYMBOL net/ax25/ax25 0x6082e041	ax25_listen_release
+EXPORT_SYMBOL net/ax25/ax25 0x6c9a8825	ax25_hard_header
+EXPORT_SYMBOL net/ax25/ax25 0x8ede9e26	ax25_protocol_release
+EXPORT_SYMBOL net/ax25/ax25 0xa1a98c19	ax25_linkfail_release
+EXPORT_SYMBOL net/ax25/ax25 0xb06876a7	ax25_find_cb
+EXPORT_SYMBOL net/ax25/ax25 0xc1444946	ax25cmp
+EXPORT_SYMBOL net/ax25/ax25 0xcdd17d7a	ax25_listen_register
+EXPORT_SYMBOL net/ax25/ax25 0xd43ecbf1	null_ax25_address
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x093d4d62	bt_sock_poll
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x0be7d7e4	bt_accept_enqueue
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x137d1b13	hci_recv_fragment
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x289173d6	hci_free_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x28c77c8e	hci_register_cb
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x2d60baca	hci_unregister_cb
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x34114672	hci_connect
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x34918d00	hci_unregister_proto
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x3579aa42	hci_get_route
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x41fd739f	bt_sock_recvmsg
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x42be10a9	bt_accept_unlink
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x477ec1ee	bt_sock_wait_state
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x530e45d7	hci_conn_security
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x630f0509	hci_conn_put_device
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x644c359a	hci_alloc_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x67c0006c	hci_send_acl
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x7094f8ae	bt_err
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x75e435ff	hci_register_proto
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x779523d9	hci_resume_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x7e7aa242	hci_send_sco
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x93424761	hci_register_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x9f2b7e25	bt_accept_dequeue
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xab72757e	hci_conn_hold_device
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xbc0f2ffb	hci_suspend_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xc14e9245	hci_conn_change_link_key
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xc2066af0	batostr
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xca799621	bt_sock_ioctl
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xcc1fb551	baswap
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xd1707136	bt_sock_register
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xd54aa4a2	bt_sock_unlink
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xdbd6fa96	bt_sock_link
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xe0b5df99	hci_conn_switch_role
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xe31efbd0	hci_conn_check_link_mode
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xf19294db	bt_sock_unregister
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xf643f965	hci_unregister_dev
+EXPORT_SYMBOL net/bluetooth/l2cap 0xfc31fe88	l2cap_load
+EXPORT_SYMBOL net/bridge/bridge 0xe342960c	br_should_route_hook
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x16990ede	ebt_do_table
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x65fdbafe	ebt_register_table
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x7788a5e0	ebt_unregister_table
+EXPORT_SYMBOL net/can/can 0x23e29062	can_send
+EXPORT_SYMBOL net/can/can 0x4a4c89c0	can_rx_unregister
+EXPORT_SYMBOL net/can/can 0x65d81571	can_rx_register
+EXPORT_SYMBOL net/can/can 0xb0ca9aee	can_proto_register
+EXPORT_SYMBOL net/can/can 0xdd693d68	can_proto_unregister
+EXPORT_SYMBOL net/ieee802154/nl802154 0x627347d4	ieee802154_nl_beacon_indic
+EXPORT_SYMBOL net/ieee802154/nl802154 0x72bcd155	ieee802154_nl_assoc_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0x95342a2c	ieee802154_nl_scan_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0x9e67e639	ieee802154_nl_assoc_indic
+EXPORT_SYMBOL net/ieee802154/nl802154 0xe1b692fc	ieee802154_nl_disassoc_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0xed1a05fa	ieee802154_nl_start_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0xfce00c6c	ieee802154_nl_disassoc_indic
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x518cc964	wpan_phy_free
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x5739776a	wpan_phy_register
+EXPORT_SYMBOL net/ieee802154/wpan-class 0xc97e23f0	wpan_phy_find
+EXPORT_SYMBOL net/ieee802154/wpan-class 0xf05e7c2f	wpan_phy_alloc
+EXPORT_SYMBOL net/ieee802154/wpan-class 0xf38de59e	wpan_phy_unregister
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x5c3ef2bd	arpt_register_table
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xafebb7ca	arpt_unregister_table
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xfd91fecf	arpt_do_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0xd00cb7eb	ipt_register_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0xd17d23fd	ipt_do_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0xec132b30	ipt_unregister_table
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x58cc5ada	nf_nat_mangle_udp_packet
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x7ee730f0	nf_nat_setup_info
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x9a813051	nf_nat_mangle_tcp_packet
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xa3bc2463	nf_nat_protocol_register
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xaad93b97	nf_nat_used_tuple
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xc84393e9	nf_nat_protocol_unregister
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xcff5068a	nf_nat_follow_master
+EXPORT_SYMBOL net/ipv4/tunnel4 0x85993e4c	xfrm4_tunnel_deregister
+EXPORT_SYMBOL net/ipv4/tunnel4 0x8fb3c57a	xfrm4_tunnel_register
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x539bddcd	ip6t_do_table
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x718c8783	ipv6_find_hdr
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xb8bddf33	ip6t_ext_hdr
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xe977196c	ip6t_unregister_table
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xf220f30d	ip6t_register_table
+EXPORT_SYMBOL net/ipv6/tunnel6 0x19eec443	xfrm6_tunnel_register
+EXPORT_SYMBOL net/ipv6/tunnel6 0xbca538af	xfrm6_tunnel_deregister
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0x9cd013f2	xfrm6_tunnel_alloc_spi
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xab14e193	xfrm6_tunnel_free_spi
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xdb1b42d1	xfrm6_tunnel_spi_lookup
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x11d65a03	ircomm_flow_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x6c7e85f6	ircomm_connect_response
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0xa339e80a	ircomm_connect_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0xa6c331b6	ircomm_control_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0xbebc7d4b	ircomm_open
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0xd7c87de8	ircomm_disconnect_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0xdbe67175	ircomm_close
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0xfb561b11	ircomm_data_request
+EXPORT_SYMBOL net/irda/irda 0x01d1fcdb	hashbin_delete
+EXPORT_SYMBOL net/irda/irda 0x06a3ee58	irias_new_integer_value
+EXPORT_SYMBOL net/irda/irda 0x072e026f	irias_add_octseq_attrib
+EXPORT_SYMBOL net/irda/irda 0x076ca56f	async_wrap_skb
+EXPORT_SYMBOL net/irda/irda 0x07d3647c	irlmp_register_service
+EXPORT_SYMBOL net/irda/irda 0x1071f17d	async_unwrap_char
+EXPORT_SYMBOL net/irda/irda 0x1a00aee0	irlmp_connect_request
+EXPORT_SYMBOL net/irda/irda 0x2036ad06	irda_param_insert
+EXPORT_SYMBOL net/irda/irda 0x317a5969	irttp_connect_request
+EXPORT_SYMBOL net/irda/irda 0x319349b6	irlap_open
+EXPORT_SYMBOL net/irda/irda 0x3462950f	hashbin_remove
+EXPORT_SYMBOL net/irda/irda 0x38a20e5b	irda_debug
+EXPORT_SYMBOL net/irda/irda 0x448b8aaa	irda_qos_bits_to_value
+EXPORT_SYMBOL net/irda/irda 0x45a43d84	alloc_irdadev
+EXPORT_SYMBOL net/irda/irda 0x46c1c4a2	irlmp_unregister_service
+EXPORT_SYMBOL net/irda/irda 0x53514298	irlap_close
+EXPORT_SYMBOL net/irda/irda 0x5512e318	irlmp_data_request
+EXPORT_SYMBOL net/irda/irda 0x5a28cd7a	irttp_udata_request
+EXPORT_SYMBOL net/irda/irda 0x603be8f7	proc_irda
+EXPORT_SYMBOL net/irda/irda 0x6758f8ac	irias_new_object
+EXPORT_SYMBOL net/irda/irda 0x67d6ec52	irttp_dup
+EXPORT_SYMBOL net/irda/irda 0x68b7447c	hashbin_find
+EXPORT_SYMBOL net/irda/irda 0x6b043eba	irda_init_max_qos_capabilies
+EXPORT_SYMBOL net/irda/irda 0x7042bc54	irlmp_register_client
+EXPORT_SYMBOL net/irda/irda 0x714b4a37	irttp_close_tsap
+EXPORT_SYMBOL net/irda/irda 0x747d6779	irias_delete_object
+EXPORT_SYMBOL net/irda/irda 0x7621e908	hashbin_insert
+EXPORT_SYMBOL net/irda/irda 0x76243bc9	irias_insert_object
+EXPORT_SYMBOL net/irda/irda 0x763e54a4	irlmp_unregister_client
+EXPORT_SYMBOL net/irda/irda 0x781e2db5	irias_find_object
+EXPORT_SYMBOL net/irda/irda 0x7957f728	irlmp_update_client
+EXPORT_SYMBOL net/irda/irda 0x7a4cec41	irttp_open_tsap
+EXPORT_SYMBOL net/irda/irda 0x7a4f842f	irda_device_set_media_busy
+EXPORT_SYMBOL net/irda/irda 0x7a57b6f3	hashbin_remove_this
+EXPORT_SYMBOL net/irda/irda 0x804e61a7	irttp_connect_response
+EXPORT_SYMBOL net/irda/irda 0x91815586	irda_param_pack
+EXPORT_SYMBOL net/irda/irda 0x993ad14b	irda_param_extract_all
+EXPORT_SYMBOL net/irda/irda 0xb887260d	iriap_open
+EXPORT_SYMBOL net/irda/irda 0xb9394173	irias_delete_value
+EXPORT_SYMBOL net/irda/irda 0xbcd3ef13	irias_object_change_attribute
+EXPORT_SYMBOL net/irda/irda 0xbe40ace9	irlmp_discovery_request
+EXPORT_SYMBOL net/irda/irda 0xc14e9b6a	hashbin_get_next
+EXPORT_SYMBOL net/irda/irda 0xc6004df9	irlmp_close_lsap
+EXPORT_SYMBOL net/irda/irda 0xcbfe743d	irttp_disconnect_request
+EXPORT_SYMBOL net/irda/irda 0xcd41236c	hashbin_new
+EXPORT_SYMBOL net/irda/irda 0xced8d4b2	iriap_close
+EXPORT_SYMBOL net/irda/irda 0xcfc0e5f0	irlmp_disconnect_request
+EXPORT_SYMBOL net/irda/irda 0xd61caacb	irttp_data_request
+EXPORT_SYMBOL net/irda/irda 0xd6deeaae	irda_setup_dma
+EXPORT_SYMBOL net/irda/irda 0xd7172ff4	hashbin_get_first
+EXPORT_SYMBOL net/irda/irda 0xd71b9719	irda_notify_init
+EXPORT_SYMBOL net/irda/irda 0xd8bfb6d4	hashbin_lock_find
+EXPORT_SYMBOL net/irda/irda 0xde4c6b3c	irlmp_service_to_hint
+EXPORT_SYMBOL net/irda/irda 0xe08a345e	iriap_getvaluebyclass_request
+EXPORT_SYMBOL net/irda/irda 0xe11431b9	irttp_flow_request
+EXPORT_SYMBOL net/irda/irda 0xe5260e0e	irias_add_integer_attrib
+EXPORT_SYMBOL net/irda/irda 0xec41fe7f	irias_add_string_attrib
+EXPORT_SYMBOL net/irda/irda 0xedd521c2	irlmp_get_discoveries
+EXPORT_SYMBOL net/irda/irda 0xf43e5ef2	irlmp_open_lsap
+EXPORT_SYMBOL net/irda/irda 0xf5385483	irlmp_connect_response
+EXPORT_SYMBOL net/lapb/lapb 0x15c915a4	lapb_data_received
+EXPORT_SYMBOL net/lapb/lapb 0x1f1cda13	lapb_setparms
+EXPORT_SYMBOL net/lapb/lapb 0x31d58997	lapb_unregister
+EXPORT_SYMBOL net/lapb/lapb 0x449442e5	lapb_disconnect_request
+EXPORT_SYMBOL net/lapb/lapb 0x5409433b	lapb_data_request
+EXPORT_SYMBOL net/lapb/lapb 0x6f395e03	lapb_connect_request
+EXPORT_SYMBOL net/lapb/lapb 0x73cc71f3	lapb_register
+EXPORT_SYMBOL net/lapb/lapb 0xf06d8795	lapb_getparms
+EXPORT_SYMBOL net/mac80211/mac80211 0x150d3c41	ieee80211_wake_queues
+EXPORT_SYMBOL net/mac80211/mac80211 0x174c6f96	ieee80211_beacon_get
+EXPORT_SYMBOL net/mac80211/mac80211 0x1ab4eab4	ieee80211_find_sta
+EXPORT_SYMBOL net/mac80211/mac80211 0x1bdbbd87	__ieee80211_get_tx_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0x29689039	ieee80211_stop_queues
+EXPORT_SYMBOL net/mac80211/mac80211 0x5490b2bc	ieee80211_rate_control_unregister
+EXPORT_SYMBOL net/mac80211/mac80211 0x550a4282	ieee80211_queue_stopped
+EXPORT_SYMBOL net/mac80211/mac80211 0x574bc1f2	ieee80211_wake_queue
+EXPORT_SYMBOL net/mac80211/mac80211 0x630705e8	ieee80211_free_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x6a8ba01c	__ieee80211_get_rx_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0x6e78a406	ieee80211_tx_status
+EXPORT_SYMBOL net/mac80211/mac80211 0x83d72650	ieee80211_rts_get
+EXPORT_SYMBOL net/mac80211/mac80211 0x85c87c1c	ieee80211_alloc_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x8729e30e	ieee80211_generic_frame_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0x8eeb266e	ieee80211_tx_status_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0x91f4a221	ieee80211_rx
+EXPORT_SYMBOL net/mac80211/mac80211 0x92a322df	ieee80211_rts_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0xa03d429a	ieee80211_start_tx_ba_session
+EXPORT_SYMBOL net/mac80211/mac80211 0xa42fc5cb	ieee80211_register_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xa4bbbc75	ieee80211_stop_queue
+EXPORT_SYMBOL net/mac80211/mac80211 0xa65e6765	ieee80211_queue_delayed_work
+EXPORT_SYMBOL net/mac80211/mac80211 0xad53720f	ieee80211_unregister_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xb242d3cf	__ieee80211_get_radio_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0xb3f256cf	wiphy_to_ieee80211_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xb4f87a47	ieee80211_scan_completed
+EXPORT_SYMBOL net/mac80211/mac80211 0xb704670b	ieee80211_ctstoself_get
+EXPORT_SYMBOL net/mac80211/mac80211 0xbd9e6b34	ieee80211_rx_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0xc6075bfc	__ieee80211_get_assoc_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0xcd66674e	ieee80211_rate_control_register
+EXPORT_SYMBOL net/mac80211/mac80211 0xce36febc	ieee80211_queue_work
+EXPORT_SYMBOL net/mac80211/mac80211 0xd2b2e19b	ieee80211_stop_tx_ba_cb_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0xd2c49314	ieee80211_ctstoself_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0xda409481	ieee80211_stop_tx_ba_session
+EXPORT_SYMBOL net/mac80211/mac80211 0xda922682	ieee80211_get_buffered_bc
+EXPORT_SYMBOL net/mac80211/mac80211 0xe39e18a4	ieee80211_stop_tx_ba_cb
+EXPORT_SYMBOL net/mac80211/mac80211 0xe8abe42d	ieee80211_beacon_loss
+EXPORT_SYMBOL net/mac80211/mac80211 0xf0834e04	ieee80211_restart_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xf2a0ce3e	ieee80211_start_tx_ba_cb
+EXPORT_SYMBOL net/mac80211/mac80211 0xf608f1a5	rate_control_send_low
+EXPORT_SYMBOL net/mac80211/mac80211 0xf7659612	ieee80211_get_tkip_key
+EXPORT_SYMBOL net/mac80211/mac80211 0xf80e4692	ieee80211_start_tx_ba_cb_irqsafe
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x20b63339	ip_vs_conn_out_get
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x618a9a95	register_ip_vs_app
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xa1dbc2d8	ip_vs_proto_name
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xaa885666	ip_vs_skb_replace
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xb677fe13	register_ip_vs_app_inc
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xc3a746e4	ip_vs_conn_in_get
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xc772c5aa	ip_vs_conn_put
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xd2c8c2c5	unregister_ip_vs_app
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xd9d36fad	ip_vs_conn_new
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xec7c07ad	unregister_ip_vs_scheduler
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xed0a6725	register_ip_vs_scheduler
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xf6591469	ip_vs_tcp_conn_listen
+EXPORT_SYMBOL net/netfilter/nf_conntrack 0x9b3d6ba0	__nf_ct_ext_add
+EXPORT_SYMBOL net/netfilter/nf_conntrack 0xc4f5c947	__nf_ct_ext_destroy
+EXPORT_SYMBOL net/netfilter/nf_conntrack_proto_gre 0x6948b228	nf_ct_gre_keymap_flush
+EXPORT_SYMBOL net/netfilter/x_tables 0x16a5e826	xt_free_table_info
+EXPORT_SYMBOL net/netfilter/x_tables 0x1b136f9e	xt_register_targets
+EXPORT_SYMBOL net/netfilter/x_tables 0x35bc8d07	xt_unregister_matches
+EXPORT_SYMBOL net/netfilter/x_tables 0x37748cfc	xt_register_matches
+EXPORT_SYMBOL net/netfilter/x_tables 0x8ea2ae26	xt_find_target
+EXPORT_SYMBOL net/netfilter/x_tables 0x95da7fbc	xt_unregister_match
+EXPORT_SYMBOL net/netfilter/x_tables 0x990d7742	xt_register_target
+EXPORT_SYMBOL net/netfilter/x_tables 0xa1aaf226	xt_unregister_target
+EXPORT_SYMBOL net/netfilter/x_tables 0xaadc6a88	xt_find_match
+EXPORT_SYMBOL net/netfilter/x_tables 0xb1453111	xt_register_match
+EXPORT_SYMBOL net/netfilter/x_tables 0xc3ff5dff	xt_alloc_table_info
+EXPORT_SYMBOL net/netfilter/x_tables 0xfdc3e316	xt_unregister_targets
+EXPORT_SYMBOL net/phonet/phonet 0x0c232d11	pn_sock_hash
+EXPORT_SYMBOL net/phonet/phonet 0x66b250fb	phonet_proto_unregister
+EXPORT_SYMBOL net/phonet/phonet 0x89579c74	pn_sock_unhash
+EXPORT_SYMBOL net/phonet/phonet 0x8df6c733	pn_skb_send
+EXPORT_SYMBOL net/phonet/phonet 0x9bea8435	pn_sock_get_port
+EXPORT_SYMBOL net/phonet/phonet 0xc90d6f5c	phonet_proto_register
+EXPORT_SYMBOL net/phonet/phonet 0xde26f4d2	phonet_stream_ops
+EXPORT_SYMBOL net/phonet/phonet 0xe53fd988	phonet_header_ops
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x2839a900	rxrpc_kernel_accept_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x4925db0f	rxrpc_kernel_send_data
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x4f453987	rxrpc_kernel_abort_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x6950cfbc	rxrpc_get_null_key
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x88215826	rxrpc_kernel_intercept_rx_messages
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x8d9a7bc6	rxrpc_kernel_free_skb
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x9e8ddcd8	rxrpc_kernel_get_error_number
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xa10bb4af	rxrpc_kernel_data_delivered
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xa2e94f31	rxrpc_get_server_data_key
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xa59d373f	rxrpc_kernel_is_data_last
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xacaedfe6	rxrpc_kernel_end_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xc32e6edb	rxrpc_kernel_reject_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xc8c59a35	rxrpc_kernel_get_abort_code
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xcfdf84b6	key_type_rxrpc
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xe88d98ab	rxrpc_kernel_begin_call
+EXPORT_SYMBOL net/sunrpc/sunrpc 0x59f479c8	svc_pool_stats_open
+EXPORT_SYMBOL net/tipc/tipc 0x08acf310	tipc_available_nodes
+EXPORT_SYMBOL net/tipc/tipc 0x0b074a7b	tipc_multicast
+EXPORT_SYMBOL net/tipc/tipc 0x10d40fcd	tipc_isconnected
+EXPORT_SYMBOL net/tipc/tipc 0x1472b270	tipc_disconnect
+EXPORT_SYMBOL net/tipc/tipc 0x1479cb03	tipc_deleteport
+EXPORT_SYMBOL net/tipc/tipc 0x15b5ecde	tipc_set_portunreliable
+EXPORT_SYMBOL net/tipc/tipc 0x16f27683	tipc_block_bearer
+EXPORT_SYMBOL net/tipc/tipc 0x23daecbd	tipc_send
+EXPORT_SYMBOL net/tipc/tipc 0x259b74f9	tipc_acknowledge
+EXPORT_SYMBOL net/tipc/tipc 0x310d1bc9	tipc_detach
+EXPORT_SYMBOL net/tipc/tipc 0x3712e340	tipc_portunreliable
+EXPORT_SYMBOL net/tipc/tipc 0x3976041f	tipc_set_portimportance
+EXPORT_SYMBOL net/tipc/tipc 0x419b02fc	tipc_send2port
+EXPORT_SYMBOL net/tipc/tipc 0x4b2243c6	tipc_portimportance
+EXPORT_SYMBOL net/tipc/tipc 0x538b228a	tipc_withdraw
+EXPORT_SYMBOL net/tipc/tipc 0x5637ed44	tipc_get_mode
+EXPORT_SYMBOL net/tipc/tipc 0x56e52bc1	tipc_continue
+EXPORT_SYMBOL net/tipc/tipc 0x5c0d4b5c	tipc_ref_valid
+EXPORT_SYMBOL net/tipc/tipc 0x62a681a3	tipc_portunreturnable
+EXPORT_SYMBOL net/tipc/tipc 0x6c9a34d5	tipc_forward_buf2port
+EXPORT_SYMBOL net/tipc/tipc 0x7a89e76a	tipc_forward_buf2name
+EXPORT_SYMBOL net/tipc/tipc 0x88b73627	tipc_get_addr
+EXPORT_SYMBOL net/tipc/tipc 0x9c45558e	tipc_enable_bearer
+EXPORT_SYMBOL net/tipc/tipc 0x9d8df234	tipc_send_buf
+EXPORT_SYMBOL net/tipc/tipc 0x9e1486d2	tipc_send_buf_fast
+EXPORT_SYMBOL net/tipc/tipc 0xa1b42d32	tipc_forward2port
+EXPORT_SYMBOL net/tipc/tipc 0xa6e1908b	tipc_send_buf2name
+EXPORT_SYMBOL net/tipc/tipc 0xa7d193d1	tipc_register_media
+EXPORT_SYMBOL net/tipc/tipc 0xa936a24b	tipc_get_port
+EXPORT_SYMBOL net/tipc/tipc 0xadd203d0	tipc_connect2port
+EXPORT_SYMBOL net/tipc/tipc 0xae0103c3	tipc_shutdown
+EXPORT_SYMBOL net/tipc/tipc 0xb1f8eacc	tipc_send2name
+EXPORT_SYMBOL net/tipc/tipc 0xb35b672c	tipc_publish
+EXPORT_SYMBOL net/tipc/tipc 0xc65bc96e	tipc_recv_msg
+EXPORT_SYMBOL net/tipc/tipc 0xcec8514a	tipc_set_portunreturnable
+EXPORT_SYMBOL net/tipc/tipc 0xcee290be	tipc_forward2name
+EXPORT_SYMBOL net/tipc/tipc 0xd354f1b8	tipc_createport
+EXPORT_SYMBOL net/tipc/tipc 0xd44731e5	tipc_ownidentity
+EXPORT_SYMBOL net/tipc/tipc 0xd4d18bfe	tipc_send_buf2port
+EXPORT_SYMBOL net/tipc/tipc 0xd7a9d9e2	tipc_createport_raw
+EXPORT_SYMBOL net/tipc/tipc 0xda7f9d3f	tipc_attach
+EXPORT_SYMBOL net/tipc/tipc 0xdf5008fc	tipc_peer
+EXPORT_SYMBOL net/tipc/tipc 0xe7aece47	tipc_ispublished
+EXPORT_SYMBOL net/tipc/tipc 0xeefd49b3	tipc_get_handle
+EXPORT_SYMBOL net/tipc/tipc 0xef50a1ef	tipc_disable_bearer
+EXPORT_SYMBOL net/tipc/tipc 0xefaa7e55	tipc_reject_msg
+EXPORT_SYMBOL net/wanrouter/wanrouter 0x0ebe03d1	unregister_wan_device
+EXPORT_SYMBOL net/wanrouter/wanrouter 0x61f6a45f	register_wan_device
+EXPORT_SYMBOL net/wimax/wimax 0x2659edf0	wimax_rfkill
+EXPORT_SYMBOL net/wimax/wimax 0x6c2a69e5	wimax_reset
+EXPORT_SYMBOL net/wireless/cfg80211 0x07e7ac5a	ieee80211_radiotap_iterator_init
+EXPORT_SYMBOL net/wireless/cfg80211 0x09c64fbd	ieee80211_frequency_to_channel
+EXPORT_SYMBOL net/wireless/cfg80211 0x0ec4dfd0	wiphy_rfkill_stop_polling
+EXPORT_SYMBOL net/wireless/cfg80211 0x1183c6d6	__ieee80211_get_channel
+EXPORT_SYMBOL net/wireless/cfg80211 0x1879fcbd	bridge_tunnel_header
+EXPORT_SYMBOL net/wireless/cfg80211 0x187fc8a9	cfg80211_get_mesh
+EXPORT_SYMBOL net/wireless/cfg80211 0x1894b042	wiphy_rfkill_start_polling
+EXPORT_SYMBOL net/wireless/cfg80211 0x1926b0cd	wiphy_new
+EXPORT_SYMBOL net/wireless/cfg80211 0x212966a0	ieee80211_data_from_8023
+EXPORT_SYMBOL net/wireless/cfg80211 0x214d9c70	cfg80211_testmode_event
+EXPORT_SYMBOL net/wireless/cfg80211 0x315770a1	cfg80211_testmode_reply
+EXPORT_SYMBOL net/wireless/cfg80211 0x33e44d2f	wiphy_unregister
+EXPORT_SYMBOL net/wireless/cfg80211 0x36d326f3	freq_reg_info
+EXPORT_SYMBOL net/wireless/cfg80211 0x37ac8d05	ieee80211_get_response_rate
+EXPORT_SYMBOL net/wireless/cfg80211 0x38ecb7f8	cfg80211_inform_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0x45d9a9a3	regulatory_hint
+EXPORT_SYMBOL net/wireless/cfg80211 0x4866e84b	wiphy_rfkill_set_hw_state
+EXPORT_SYMBOL net/wireless/cfg80211 0x4d833e33	cfg80211_testmode_alloc_reply_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0x4e1c5734	ieee80211_get_hdrlen_from_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0x51ae93e5	wiphy_register
+EXPORT_SYMBOL net/wireless/cfg80211 0x5406f8c2	cfg80211_send_deauth
+EXPORT_SYMBOL net/wireless/cfg80211 0x5a307978	cfg80211_get_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0x6046889e	cfg80211_scan_done
+EXPORT_SYMBOL net/wireless/cfg80211 0x617c258e	wiphy_free
+EXPORT_SYMBOL net/wireless/cfg80211 0x69b18f43	rfc1042_header
+EXPORT_SYMBOL net/wireless/cfg80211 0x70f8c1a0	cfg80211_testmode_alloc_event_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0x7c3fddc1	ieee80211_bss_get_ie
+EXPORT_SYMBOL net/wireless/cfg80211 0x7c6e6479	cfg80211_classify8021d
+EXPORT_SYMBOL net/wireless/cfg80211 0x802ba054	cfg80211_ibss_joined
+EXPORT_SYMBOL net/wireless/cfg80211 0x8429e7d7	cfg80211_michael_mic_failure
+EXPORT_SYMBOL net/wireless/cfg80211 0x84dfe6d7	cfg80211_send_disassoc
+EXPORT_SYMBOL net/wireless/cfg80211 0x8c35d732	ieee80211_hdrlen
+EXPORT_SYMBOL net/wireless/cfg80211 0x95c4921c	cfg80211_roamed
+EXPORT_SYMBOL net/wireless/cfg80211 0x973c30b5	cfg80211_send_assoc_timeout
+EXPORT_SYMBOL net/wireless/cfg80211 0x9ca903a3	wiphy_apply_custom_regulatory
+EXPORT_SYMBOL net/wireless/cfg80211 0xa7403751	ieee80211_data_to_8023
+EXPORT_SYMBOL net/wireless/cfg80211 0xb4835560	cfg80211_send_rx_assoc
+EXPORT_SYMBOL net/wireless/cfg80211 0xbf131e5b	cfg80211_unlink_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0xc4e85ec5	ieee80211_radiotap_iterator_next
+EXPORT_SYMBOL net/wireless/cfg80211 0xccc291b3	ieee80211_channel_to_frequency
+EXPORT_SYMBOL net/wireless/cfg80211 0xcedd4bd3	cfg80211_inform_bss_frame
+EXPORT_SYMBOL net/wireless/cfg80211 0xd137e810	cfg80211_connect_result
+EXPORT_SYMBOL net/wireless/cfg80211 0xd198b1d9	cfg80211_disconnected
+EXPORT_SYMBOL net/wireless/cfg80211 0xe49f8244	cfg80211_put_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0xf5567ff2	cfg80211_send_rx_auth
+EXPORT_SYMBOL net/wireless/cfg80211 0xf6abce08	cfg80211_send_auth_timeout
+EXPORT_SYMBOL net/wireless/lib80211 0x1bbff969	lib80211_get_crypto_ops
+EXPORT_SYMBOL net/wireless/lib80211 0x230f3ffb	lib80211_crypt_deinit_handler
+EXPORT_SYMBOL net/wireless/lib80211 0x264ac0f8	lib80211_crypt_deinit_entries
+EXPORT_SYMBOL net/wireless/lib80211 0x2d0f99e5	print_ssid
+EXPORT_SYMBOL net/wireless/lib80211 0x8c877de4	lib80211_crypt_info_free
+EXPORT_SYMBOL net/wireless/lib80211 0x8d1d7491	lib80211_register_crypto_ops
+EXPORT_SYMBOL net/wireless/lib80211 0x8e671760	lib80211_crypt_quiescing
+EXPORT_SYMBOL net/wireless/lib80211 0x9af551b7	lib80211_crypt_delayed_deinit
+EXPORT_SYMBOL net/wireless/lib80211 0xbb8a17ee	lib80211_crypt_info_init
+EXPORT_SYMBOL net/wireless/lib80211 0xf49a15c2	lib80211_unregister_crypto_ops
+EXPORT_SYMBOL sound/ac97_bus 0xf8f9396b	ac97_bus_type
+EXPORT_SYMBOL sound/core/oss/snd-mixer-oss 0x8b477344	snd_mixer_oss_ioctl_card
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x08c19977	snd_seq_event_port_attach
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x1a724fcc	snd_seq_kernel_client_ctl
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x3fb4d161	snd_seq_kernel_client_dispatch
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x6bb71038	snd_seq_delete_kernel_client
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x71be03e8	snd_seq_create_kernel_client
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x7ac2f329	snd_seq_expand_var_event
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x7b8699eb	snd_seq_event_port_detach
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x89947013	snd_use_lock_sync_helper
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x9cab330a	snd_seq_kernel_client_write_poll
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xb8e448a0	snd_seq_set_queue_tempo
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xba1c116c	snd_seq_kernel_client_enqueue_blocking
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xcac0a3be	snd_seq_kernel_client_enqueue
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xe934da1d	snd_seq_dump_var_event
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x3278b576	snd_seq_device_new
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x3a57f235	snd_seq_autoload_unlock
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x6339b6d0	snd_seq_device_load_drivers
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xb90668b2	snd_seq_autoload_lock
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xc622fb29	snd_seq_device_unregister_driver
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xf3c2fd5b	snd_seq_device_register_driver
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x6ea09972	snd_midi_channel_alloc_set
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x833a3e07	snd_midi_channel_set_clear
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xb9948d2c	snd_midi_channel_free_set
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xf0a1fdb3	snd_midi_process_event
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x17c15809	snd_midi_event_decode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x4ad3f518	snd_midi_event_reset_decode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x62384d3a	snd_midi_event_encode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x8a348811	snd_midi_event_reset_encode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x9df7af8b	snd_midi_event_free
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xc482499d	snd_midi_event_new
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xd9072e1a	snd_midi_event_no_status
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xe6df29c7	snd_midi_event_encode_byte
+EXPORT_SYMBOL sound/core/seq/snd-seq-virmidi 0x012e620d	snd_virmidi_new
+EXPORT_SYMBOL sound/core/snd 0x04d6e4b7	snd_jack_report
+EXPORT_SYMBOL sound/core/snd 0x060271d8	snd_ctl_find_id
+EXPORT_SYMBOL sound/core/snd 0x06ff859a	snd_ctl_remove
+EXPORT_SYMBOL sound/core/snd 0x1432ff46	snd_ctl_remove_id
+EXPORT_SYMBOL sound/core/snd 0x1514e213	snd_mixer_oss_notify_callback
+EXPORT_SYMBOL sound/core/snd 0x15a47d8b	snd_ctl_boolean_mono_info
+EXPORT_SYMBOL sound/core/snd 0x18e1683f	snd_dma_program
+EXPORT_SYMBOL sound/core/snd 0x191e88cf	snd_dma_pointer
+EXPORT_SYMBOL sound/core/snd 0x198788b4	snd_lookup_oss_minor_data
+EXPORT_SYMBOL sound/core/snd 0x1f0439e0	snd_ctl_unregister_ioctl_compat
+EXPORT_SYMBOL sound/core/snd 0x21b83a38	snd_card_file_add
+EXPORT_SYMBOL sound/core/snd 0x239970da	snd_pci_quirk_lookup
+EXPORT_SYMBOL sound/core/snd 0x24a94b26	snd_info_get_line
+EXPORT_SYMBOL sound/core/snd 0x24af89ea	snd_ctl_find_numid
+EXPORT_SYMBOL sound/core/snd 0x2ae3deaa	release_and_free_resource
+EXPORT_SYMBOL sound/core/snd 0x2e5933bb	snd_unregister_device
+EXPORT_SYMBOL sound/core/snd 0x3971b4df	snd_ecards_limit
+EXPORT_SYMBOL sound/core/snd 0x3998b0cc	snd_ctl_boolean_stereo_info
+EXPORT_SYMBOL sound/core/snd 0x3f1221c6	snd_add_device_sysfs_file
+EXPORT_SYMBOL sound/core/snd 0x40c21b7d	snd_unregister_oss_device
+EXPORT_SYMBOL sound/core/snd 0x42dd7daa	snd_device_new
+EXPORT_SYMBOL sound/core/snd 0x44085c85	snd_power_wait
+EXPORT_SYMBOL sound/core/snd 0x4a3ea5c0	snd_request_card
+EXPORT_SYMBOL sound/core/snd 0x4f59af6a	snd_info_create_module_entry
+EXPORT_SYMBOL sound/core/snd 0x51878392	snd_device_register
+EXPORT_SYMBOL sound/core/snd 0x518bb7f8	copy_from_user_toio
+EXPORT_SYMBOL sound/core/snd 0x5520d398	snd_ctl_rename_id
+EXPORT_SYMBOL sound/core/snd 0x578b1e10	snd_card_register
+EXPORT_SYMBOL sound/core/snd 0x5a133c59	snd_card_file_remove
+EXPORT_SYMBOL sound/core/snd 0x5def3443	snd_card_proc_new
+EXPORT_SYMBOL sound/core/snd 0x5e5086bc	snd_seq_root
+EXPORT_SYMBOL sound/core/snd 0x66027b6c	snd_info_create_card_entry
+EXPORT_SYMBOL sound/core/snd 0x70c15ac1	snd_dma_disable
+EXPORT_SYMBOL sound/core/snd 0x71afc379	snd_card_free_when_closed
+EXPORT_SYMBOL sound/core/snd 0x71b2a89c	snd_cards
+EXPORT_SYMBOL sound/core/snd 0x72acd6da	snd_register_oss_device
+EXPORT_SYMBOL sound/core/snd 0x80f153e2	snd_jack_set_parent
+EXPORT_SYMBOL sound/core/snd 0x8750eb59	snd_card_set_id
+EXPORT_SYMBOL sound/core/snd 0x8df3789f	snd_oss_info_register
+EXPORT_SYMBOL sound/core/snd 0x8f595b11	snd_major
+EXPORT_SYMBOL sound/core/snd 0x90213d37	snd_device_free
+EXPORT_SYMBOL sound/core/snd 0x9065c0b3	snd_ctl_register_ioctl_compat
+EXPORT_SYMBOL sound/core/snd 0x91df0bda	snd_register_device_for_dev
+EXPORT_SYMBOL sound/core/snd 0x9790e213	snd_card_free
+EXPORT_SYMBOL sound/core/snd 0x983891ec	snd_ctl_new1
+EXPORT_SYMBOL sound/core/snd 0x9e6d79f8	snd_info_get_str
+EXPORT_SYMBOL sound/core/snd 0xa387cf17	snd_ctl_unregister_ioctl
+EXPORT_SYMBOL sound/core/snd 0xa7fed0ad	snd_ctl_free_one
+EXPORT_SYMBOL sound/core/snd 0xb2e5ae4a	snd_lookup_minor_data
+EXPORT_SYMBOL sound/core/snd 0xbd54290e	snd_ctl_add
+EXPORT_SYMBOL sound/core/snd 0xbe6dce37	snd_jack_new
+EXPORT_SYMBOL sound/core/snd 0xc023fd2e	snd_ctl_notify
+EXPORT_SYMBOL sound/core/snd 0xc5cea39f	snd_ctl_register_ioctl
+EXPORT_SYMBOL sound/core/snd 0xc73b84ab	snd_card_create
+EXPORT_SYMBOL sound/core/snd 0xca5d8a54	snd_info_register
+EXPORT_SYMBOL sound/core/snd 0xd5f49463	snd_component_add
+EXPORT_SYMBOL sound/core/snd 0xd8f2fcf3	snd_info_free_entry
+EXPORT_SYMBOL sound/core/snd 0xdd23d712	_snd_ctl_add_slave
+EXPORT_SYMBOL sound/core/snd 0xe20c9214	snd_iprintf
+EXPORT_SYMBOL sound/core/snd 0xe243dde3	copy_to_user_fromio
+EXPORT_SYMBOL sound/core/snd 0xf5966f36	snd_ctl_make_virtual_master
+EXPORT_SYMBOL sound/core/snd 0xfeb0a8e7	snd_card_disconnect
+EXPORT_SYMBOL sound/core/snd-hwdep 0x8c502437	snd_hwdep_new
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x12279bbd	snd_dma_get_reserved_buf
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x19cc2ce3	snd_free_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x2612abbb	snd_dma_alloc_pages_fallback
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x43bfaadc	snd_dma_free_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xb124abd0	snd_dma_alloc_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xc4ab3a19	snd_dma_reserve_buf
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xc6829020	snd_malloc_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0x0283dfe3	_snd_pcm_hw_params_any
+EXPORT_SYMBOL sound/core/snd-pcm 0x040004fd	snd_pcm_limit_hw_rates
+EXPORT_SYMBOL sound/core/snd-pcm 0x04cda566	snd_interval_refine
+EXPORT_SYMBOL sound/core/snd-pcm 0x1683097c	snd_pcm_hw_constraint_pow2
+EXPORT_SYMBOL sound/core/snd-pcm 0x18d53057	snd_pcm_lib_read
+EXPORT_SYMBOL sound/core/snd-pcm 0x1a74028c	snd_pcm_new_stream
+EXPORT_SYMBOL sound/core/snd-pcm 0x1d027e4b	snd_pcm_format_signed
+EXPORT_SYMBOL sound/core/snd-pcm 0x1f46793f	snd_pcm_lib_preallocate_free_for_all
+EXPORT_SYMBOL sound/core/snd-pcm 0x206512fd	snd_pcm_mmap_data
+EXPORT_SYMBOL sound/core/snd-pcm 0x24b8a0d2	snd_pcm_hw_constraint_step
+EXPORT_SYMBOL sound/core/snd-pcm 0x29e53037	snd_pcm_suspend
+EXPORT_SYMBOL sound/core/snd-pcm 0x2b348e61	snd_pcm_hw_constraint_ratdens
+EXPORT_SYMBOL sound/core/snd-pcm 0x2eab6079	snd_pcm_hw_param_first
+EXPORT_SYMBOL sound/core/snd-pcm 0x30d0582f	snd_pcm_hw_constraint_msbits
+EXPORT_SYMBOL sound/core/snd-pcm 0x34fce7e7	snd_pcm_hw_constraint_minmax
+EXPORT_SYMBOL sound/core/snd-pcm 0x356a876a	snd_pcm_sgbuf_get_chunk_size
+EXPORT_SYMBOL sound/core/snd-pcm 0x376c41cf	snd_pcm_lib_preallocate_pages_for_all
+EXPORT_SYMBOL sound/core/snd-pcm 0x3796bdcc	snd_pcm_format_little_endian
+EXPORT_SYMBOL sound/core/snd-pcm 0x3893f055	snd_pcm_lib_ioctl
+EXPORT_SYMBOL sound/core/snd-pcm 0x38f41d6b	snd_pcm_sgbuf_ops_page
+EXPORT_SYMBOL sound/core/snd-pcm 0x39bf9301	_snd_pcm_hw_param_setempty
+EXPORT_SYMBOL sound/core/snd-pcm 0x46cf1c52	snd_pcm_hw_constraint_list
+EXPORT_SYMBOL sound/core/snd-pcm 0x4f816e9b	snd_pcm_format_big_endian
+EXPORT_SYMBOL sound/core/snd-pcm 0x52e3e4a5	snd_pcm_hw_param_value
+EXPORT_SYMBOL sound/core/snd-pcm 0x5e7f4920	snd_pcm_format_set_silence
+EXPORT_SYMBOL sound/core/snd-pcm 0x62d67ef9	snd_pcm_hw_rule_add
+EXPORT_SYMBOL sound/core/snd-pcm 0x650f8603	snd_pcm_format_silence_64
+EXPORT_SYMBOL sound/core/snd-pcm 0x67bb761e	snd_pcm_period_elapsed
+EXPORT_SYMBOL sound/core/snd-pcm 0x68a24153	snd_pcm_format_physical_width
+EXPORT_SYMBOL sound/core/snd-pcm 0x69b252fe	snd_pcm_hw_constraint_integer
+EXPORT_SYMBOL sound/core/snd-pcm 0x6ef8fcd8	snd_pcm_format_linear
+EXPORT_SYMBOL sound/core/snd-pcm 0x75a66b25	snd_pcm_suspend_all
+EXPORT_SYMBOL sound/core/snd-pcm 0x7fe9d245	snd_pcm_hw_refine
+EXPORT_SYMBOL sound/core/snd-pcm 0x88cc66cc	snd_pcm_link_rwlock
+EXPORT_SYMBOL sound/core/snd-pcm 0x90847d7d	snd_pcm_kernel_ioctl
+EXPORT_SYMBOL sound/core/snd-pcm 0x9460ab89	snd_pcm_lib_writev
+EXPORT_SYMBOL sound/core/snd-pcm 0x94fcac3a	snd_pcm_lib_readv
+EXPORT_SYMBOL sound/core/snd-pcm 0x9e0e463a	snd_pcm_hw_constraint_ratnums
+EXPORT_SYMBOL sound/core/snd-pcm 0xa61aa028	snd_pcm_format_unsigned
+EXPORT_SYMBOL sound/core/snd-pcm 0xa63ccb3f	snd_pcm_lib_mmap_iomem
+EXPORT_SYMBOL sound/core/snd-pcm 0xa7f51ca1	snd_pcm_new
+EXPORT_SYMBOL sound/core/snd-pcm 0xacd70302	snd_pcm_set_ops
+EXPORT_SYMBOL sound/core/snd-pcm 0xaf688240	snd_pcm_notify
+EXPORT_SYMBOL sound/core/snd-pcm 0xb090229e	snd_pcm_lib_write
+EXPORT_SYMBOL sound/core/snd-pcm 0xb2973a04	snd_pcm_lib_free_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0xb6ceeb17	snd_pcm_lib_preallocate_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0xb9638db4	snd_pcm_rate_to_rate_bit
+EXPORT_SYMBOL sound/core/snd-pcm 0xbea50746	snd_pcm_open_substream
+EXPORT_SYMBOL sound/core/snd-pcm 0xd0b9b8b8	snd_interval_list
+EXPORT_SYMBOL sound/core/snd-pcm 0xd5fce656	snd_pcm_release_substream
+EXPORT_SYMBOL sound/core/snd-pcm 0xdc05be0e	snd_pcm_stop
+EXPORT_SYMBOL sound/core/snd-pcm 0xe3cc35a0	snd_pcm_set_sync
+EXPORT_SYMBOL sound/core/snd-pcm 0xe51a1c64	snd_pcm_format_size
+EXPORT_SYMBOL sound/core/snd-pcm 0xe56a9336	snd_pcm_format_width
+EXPORT_SYMBOL sound/core/snd-pcm 0xf2259604	snd_pcm_hw_param_last
+EXPORT_SYMBOL sound/core/snd-pcm 0xf3797152	snd_interval_ratnum
+EXPORT_SYMBOL sound/core/snd-pcm 0xf9ce912b	snd_pcm_lib_malloc_pages
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x1787e34a	snd_rawmidi_new
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x2e00af4d	snd_rawmidi_transmit_empty
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x3a5600d9	snd_rawmidi_kernel_write
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x454b9d55	snd_rawmidi_input_params
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x53b448a7	snd_rawmidi_drop_output
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x54beb4b5	snd_rawmidi_transmit_peek
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x70aa263d	snd_rawmidi_kernel_release
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x89b1c75c	snd_rawmidi_kernel_open
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xb7fd3abe	snd_rawmidi_drain_output
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xcbbca1d9	snd_rawmidi_receive
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xd1637bbf	snd_rawmidi_output_params
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xd3a95a9e	snd_rawmidi_transmit
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xd479fc7e	snd_rawmidi_transmit_ack
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xe827385e	snd_rawmidi_info_select
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xec5c92b0	snd_rawmidi_set_ops
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xf5a6cf34	snd_rawmidi_drain_input
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xfa2ffee5	snd_rawmidi_kernel_read
+EXPORT_SYMBOL sound/core/snd-timer 0x03d0eb56	snd_timer_start
+EXPORT_SYMBOL sound/core/snd-timer 0x254752bd	snd_timer_global_new
+EXPORT_SYMBOL sound/core/snd-timer 0x5d41e132	snd_timer_continue
+EXPORT_SYMBOL sound/core/snd-timer 0x6faf941a	snd_timer_resolution
+EXPORT_SYMBOL sound/core/snd-timer 0x7eafbcd3	snd_timer_pause
+EXPORT_SYMBOL sound/core/snd-timer 0x8d9517e5	snd_timer_global_free
+EXPORT_SYMBOL sound/core/snd-timer 0x8dc5b226	snd_timer_open
+EXPORT_SYMBOL sound/core/snd-timer 0x9f02a328	snd_timer_interrupt
+EXPORT_SYMBOL sound/core/snd-timer 0xaa42013d	snd_timer_new
+EXPORT_SYMBOL sound/core/snd-timer 0xaeb22275	snd_timer_global_register
+EXPORT_SYMBOL sound/core/snd-timer 0xb7d8f257	snd_timer_notify
+EXPORT_SYMBOL sound/core/snd-timer 0xc4e05ffb	snd_timer_stop
+EXPORT_SYMBOL sound/core/snd-timer 0xe2134a36	snd_timer_close
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x4bbb7f27	snd_mpu401_uart_interrupt_tx
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x9c10da48	snd_mpu401_uart_new
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xc43a3940	snd_mpu401_uart_interrupt
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x05060a19	snd_opl3_regmap
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x1219681c	snd_opl3_load_patch
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x1d6f0a0e	snd_opl3_new
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x33735df1	snd_opl3_init
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x3839820b	snd_opl3_interrupt
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x89b20acf	snd_opl3_timer_new
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x8f3fb07b	snd_opl3_find_patch
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xc41cb331	snd_opl3_create
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xd6ac17b5	snd_opl3_reset
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xef9b206d	snd_opl3_hwdep_new
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x3c6cb6c6	snd_vx_create
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x433e8a4a	snd_vx_suspend
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x4a42185e	snd_vx_dsp_boot
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x56b7d4e7	snd_vx_resume
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x78eda936	snd_vx_setup_firmware
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x99b88ede	snd_vx_irq_handler
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x9abe68f8	snd_vx_dsp_load
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x9dabc3c4	snd_vx_check_reg_bit
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xab3e9673	snd_vx_free_firmware
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xaea9272c	snd_vx_load_boot_image
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x00e8c4e1	snd_ak4114_reinit
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x027fd52e	snd_ak4114_create
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x0e89c41f	snd_ak4114_check_rate_and_errors
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x165c755e	snd_ak4114_external_rate
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x65222667	snd_ak4114_build
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x8443b0f8	snd_ak4114_reg_write
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x8f651ef6	snd_ak4117_build
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x9b5dd47c	snd_ak4117_external_rate
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xaf6fa81d	snd_ak4117_check_rate_and_errors
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xb43b3462	snd_ak4117_create
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xb60adcda	snd_ak4117_reg_write
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xc7e3c698	snd_ak4117_reinit
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x41508940	snd_akm4xxx_reset
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x4bae2a92	snd_akm4xxx_write
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x5a10576e	snd_akm4xxx_build_controls
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xb803915a	snd_akm4xxx_init
+EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0xe68fd919	snd_pt2258_reset
+EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0xf563dc16	snd_pt2258_build_controls
+EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0xa1755e64	snd_tea575x_exit
+EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0xfc2eeab0	snd_tea575x_init
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x2d322a76	snd_cs8427_reg_write
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x4e78ff91	snd_cs8427_create
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x63ccc3ff	snd_cs8427_iec958_build
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x7a690bd1	snd_cs8427_iec958_active
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0xe6414ff6	snd_cs8427_iec958_pcm
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x024f7166	snd_i2c_bus_create
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x1819aab7	snd_i2c_probeaddr
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x25101743	snd_i2c_device_create
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x2dfa02c8	snd_i2c_sendbytes
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x4b7901c3	snd_i2c_device_free
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x5df8b763	snd_i2c_readbytes
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x215c99a8	snd_sbdsp_command
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x394cecbb	snd_sbmixer_read
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x47b1c563	snd_sbdsp_get_byte
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x6365d972	snd_sbmixer_resume
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x8c7610b3	snd_sbdsp_create
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x9aeec75c	snd_sbdsp_reset
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xa4afe3e0	snd_sbmixer_write
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xdf026940	snd_sbmixer_add_ctl
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xe0392085	snd_sbmixer_new
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xe9336750	snd_sbmixer_suspend
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0x3088f7fb	snd_sb16dsp_pcm
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0x42365acf	snd_sb16dsp_configure
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xc57f5b54	snd_sb16dsp_interrupt
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xfd052a53	snd_sb16dsp_get_pcm_ops
+EXPORT_SYMBOL sound/oss/ad1848 0x26c427ee	ad1848_detect
+EXPORT_SYMBOL sound/oss/ad1848 0x55262c70	probe_ms_sound
+EXPORT_SYMBOL sound/oss/ad1848 0x607f59cc	ad1848_init
+EXPORT_SYMBOL sound/oss/ad1848 0x720507e3	attach_ms_sound
+EXPORT_SYMBOL sound/oss/ad1848 0x9bf1cc62	ad1848_unload
+EXPORT_SYMBOL sound/oss/ad1848 0xb29a9148	unload_ms_sound
+EXPORT_SYMBOL sound/oss/ad1848 0xc04f6f67	ad1848_control
+EXPORT_SYMBOL sound/oss/mpu401 0x5febf284	unload_mpu401
+EXPORT_SYMBOL sound/oss/mpu401 0xd9ec5db4	probe_mpu401
+EXPORT_SYMBOL sound/oss/mpu401 0xee271d56	attach_mpu401
+EXPORT_SYMBOL sound/oss/sb_lib 0x42424109	sb_be_quiet
+EXPORT_SYMBOL sound/oss/sb_lib 0x450f9aea	smw_free
+EXPORT_SYMBOL sound/oss/sb_lib 0x4ccfe4ac	sb_dsp_init
+EXPORT_SYMBOL sound/oss/sb_lib 0x74afd69c	unload_sbmpu
+EXPORT_SYMBOL sound/oss/sb_lib 0xc4884969	sb_dsp_unload
+EXPORT_SYMBOL sound/oss/sb_lib 0xd8a2731c	sb_dsp_detect
+EXPORT_SYMBOL sound/oss/sb_lib 0xf3b6feb8	probe_sbmpu
+EXPORT_SYMBOL sound/oss/sound 0x04c87ec8	compute_finetune
+EXPORT_SYMBOL sound/oss/sound 0x06339815	sound_unload_synthdev
+EXPORT_SYMBOL sound/oss/sound 0x0a2b8461	midi_devs
+EXPORT_SYMBOL sound/oss/sound 0x0e1a0924	sound_install_mixer
+EXPORT_SYMBOL sound/oss/sound 0x0f280035	conf_printf
+EXPORT_SYMBOL sound/oss/sound 0x17ba231d	seq_input_event
+EXPORT_SYMBOL sound/oss/sound 0x1b3df3cf	sound_alloc_mixerdev
+EXPORT_SYMBOL sound/oss/sound 0x1f395686	MIDIbuf_avail
+EXPORT_SYMBOL sound/oss/sound 0x2161d5e8	sound_timer_init
+EXPORT_SYMBOL sound/oss/sound 0x2aa31695	midi_synth_kill_note
+EXPORT_SYMBOL sound/oss/sound 0x394cb088	sound_free_dma
+EXPORT_SYMBOL sound/oss/sound 0x3f0e15d8	synth_devs
+EXPORT_SYMBOL sound/oss/sound 0x418f5fbe	sound_close_dma
+EXPORT_SYMBOL sound/oss/sound 0x4cd01bdd	num_audiodevs
+EXPORT_SYMBOL sound/oss/sound 0x4f6e5cff	audio_devs
+EXPORT_SYMBOL sound/oss/sound 0x4ff47e9d	midi_synth_setup_voice
+EXPORT_SYMBOL sound/oss/sound 0x51e354b2	sound_alloc_timerdev
+EXPORT_SYMBOL sound/oss/sound 0x56504ca2	midi_synth_reset
+EXPORT_SYMBOL sound/oss/sound 0x56d7aec8	sound_install_audiodrv
+EXPORT_SYMBOL sound/oss/sound 0x5c8aea6d	mixer_devs
+EXPORT_SYMBOL sound/oss/sound 0x5d986fc9	note_to_freq
+EXPORT_SYMBOL sound/oss/sound 0x7679ee76	seq_copy_to_input
+EXPORT_SYMBOL sound/oss/sound 0x7bdf0907	conf_printf2
+EXPORT_SYMBOL sound/oss/sound 0x892093e0	midi_synth_controller
+EXPORT_SYMBOL sound/oss/sound 0x90bd9714	sequencer_timer
+EXPORT_SYMBOL sound/oss/sound 0x987bcf12	DMAbuf_outputintr
+EXPORT_SYMBOL sound/oss/sound 0x9a95733f	sound_alloc_dma
+EXPORT_SYMBOL sound/oss/sound 0x9bdaf24d	midi_synth_start_note
+EXPORT_SYMBOL sound/oss/sound 0x9d845b18	num_mixers
+EXPORT_SYMBOL sound/oss/sound 0xa1d5f04f	load_mixer_volumes
+EXPORT_SYMBOL sound/oss/sound 0xa1eae7cf	num_midis
+EXPORT_SYMBOL sound/oss/sound 0xa41ead5f	sound_unload_timerdev
+EXPORT_SYMBOL sound/oss/sound 0xa51c913b	sound_unload_mixerdev
+EXPORT_SYMBOL sound/oss/sound 0xa6bb414c	sound_unload_mididev
+EXPORT_SYMBOL sound/oss/sound 0xa948751e	sound_unload_audiodev
+EXPORT_SYMBOL sound/oss/sound 0xad45df73	midi_synth_close
+EXPORT_SYMBOL sound/oss/sound 0xaef743b2	midi_synth_ioctl
+EXPORT_SYMBOL sound/oss/sound 0xb14b22cd	midi_synth_hw_control
+EXPORT_SYMBOL sound/oss/sound 0xb51587f6	do_midi_msg
+EXPORT_SYMBOL sound/oss/sound 0xba413f87	sound_alloc_mididev
+EXPORT_SYMBOL sound/oss/sound 0xba7dd041	midi_synth_bender
+EXPORT_SYMBOL sound/oss/sound 0xc748d109	sound_alloc_synthdev
+EXPORT_SYMBOL sound/oss/sound 0xcab4d5bf	midi_synth_load_patch
+EXPORT_SYMBOL sound/oss/sound 0xcc4b8797	sound_open_dma
+EXPORT_SYMBOL sound/oss/sound 0xd85be938	midi_synth_set_instr
+EXPORT_SYMBOL sound/oss/sound 0xdb400afa	midi_synth_panning
+EXPORT_SYMBOL sound/oss/sound 0xe056b71c	DMAbuf_start_dma
+EXPORT_SYMBOL sound/oss/sound 0xe2675a79	sound_timer_interrupt
+EXPORT_SYMBOL sound/oss/sound 0xe7147a54	sound_timer_devs
+EXPORT_SYMBOL sound/oss/sound 0xeb315d99	DMAbuf_inputintr
+EXPORT_SYMBOL sound/oss/sound 0xf1ea8a20	midi_synth_aftertouch
+EXPORT_SYMBOL sound/oss/sound 0xf6b3a2fb	midi_synth_open
+EXPORT_SYMBOL sound/oss/sound 0xf78f6363	sequencer_init
+EXPORT_SYMBOL sound/oss/sound 0xfa6871be	sound_timer_syncinterval
+EXPORT_SYMBOL sound/oss/sound 0xfddcbfb3	midi_synth_send_sysex
+EXPORT_SYMBOL sound/oss/uart401 0x049cd8b7	uart401intr
+EXPORT_SYMBOL sound/oss/uart401 0x8568ad36	probe_uart401
+EXPORT_SYMBOL sound/oss/uart401 0xecfdd9c9	unload_uart401
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x0910ee91	snd_ac97_mixer
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x1b3778d7	snd_ac97_pcm_double_rate_rules
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x1b41ed9a	snd_ac97_write
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x6e0cc209	snd_ac97_read
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x70bc8119	snd_ac97_update_bits
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x7115c08f	snd_ac97_set_rate
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x75784cd3	snd_ac97_bus
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x7f85672a	snd_ac97_resume
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x916e2abe	snd_ac97_update_power
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x9313b9af	snd_ac97_tune_hardware
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x94e2fa41	snd_ac97_pcm_close
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xa8073da0	snd_ac97_suspend
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xb070b092	snd_ac97_update
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xb531df07	snd_ac97_get_short_name
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xe5dc8e07	snd_ac97_pcm_assign
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xeb3eb3f4	snd_ac97_pcm_open
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xfd873bbe	snd_ac97_write_cache
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x31743777	snd_emu10k1_ptr_read
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x7bd0b82f	snd_emu10k1_memblk_map
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x9b405650	snd_emu10k1_voice_alloc
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xc2c97e05	snd_emu10k1_synth_alloc
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xcf3c6498	snd_emu10k1_voice_free
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xd0bb9e0a	snd_emu10k1_synth_free
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xd5330641	snd_emu10k1_synth_copy_from_user
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xdc0e29d1	snd_emu10k1_synth_bzero
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xf7432c20	snd_emu10k1_ptr_write
+EXPORT_SYMBOL sound/pci/hda/snd-hda-codec 0x80b5117b	snd_hda_parse_generic_codec
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x52fc594c	snd_ice1712_akm4xxx_free
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x9292ca25	snd_ice1712_akm4xxx_init
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0xf17f3b6d	snd_ice1712_akm4xxx_build_controls
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x012b72a3	oxygen_read32
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x1d9aa543	oxygen_write16_masked
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x1fd8e490	oxygen_reset_uart
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x2ad68a39	oxygen_write_ac97
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x457c2154	oxygen_read16
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x58aaad0c	oxygen_write_spi
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x5b4f3702	oxygen_pci_remove
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x5b53040e	oxygen_write_i2c
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x63f03d34	oxygen_write_ac97_masked
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x90e6a81b	oxygen_write16
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x9f02b7f3	oxygen_write8
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xa2c0af7f	oxygen_write8_masked
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xa42da045	oxygen_write_uart
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xa48cf7a3	oxygen_read8
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xbb623ee2	oxygen_write32_masked
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xd9ff9f15	oxygen_pci_probe
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xe472d2fd	oxygen_pci_resume
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xecd558ed	oxygen_pci_suspend
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xf5b40a18	oxygen_read_ac97
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xfbb0611b	oxygen_write32
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x06d4e9ef	snd_trident_write_voice_regs
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x3e9dbcfe	snd_trident_free_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x68da0971	snd_trident_start_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0xa4b0a4b0	snd_trident_alloc_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0xee26c14b	snd_trident_stop_voice
+EXPORT_SYMBOL sound/soc/codecs/snd-soc-uda134x 0xea85cdd5	uda134x_dai
+EXPORT_SYMBOL sound/sound_firmware 0x39e3dd23	mod_firmware_load
+EXPORT_SYMBOL sound/soundcore 0x06fb3be6	register_sound_special_device
+EXPORT_SYMBOL sound/soundcore 0x1df82141	register_sound_mixer
+EXPORT_SYMBOL sound/soundcore 0x49aef193	register_sound_special
+EXPORT_SYMBOL sound/soundcore 0x6913b239	sound_class
+EXPORT_SYMBOL sound/soundcore 0x6f49f6dc	register_sound_dsp
+EXPORT_SYMBOL sound/soundcore 0x7afc9d8a	unregister_sound_mixer
+EXPORT_SYMBOL sound/soundcore 0x99c95fa5	unregister_sound_special
+EXPORT_SYMBOL sound/soundcore 0xaba54682	register_sound_midi
+EXPORT_SYMBOL sound/soundcore 0xcd083b10	unregister_sound_dsp
+EXPORT_SYMBOL sound/soundcore 0xfdab6de3	unregister_sound_midi
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x162035ac	snd_emux_terminate_all
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x655cb202	snd_sf_linear_to_log
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xa0493727	snd_emux_register
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xc3e9fdd0	snd_emux_new
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xcda77f2f	snd_emux_lock_voice
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xd265b413	snd_emux_unlock_voice
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xdd8a86b5	snd_emux_free
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x131fbd17	snd_util_mem_alloc
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x3f835418	__snd_util_memblk_new
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x5e2a5655	snd_util_memhdr_new
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x9f2c299c	snd_util_mem_free
+EXPORT_SYMBOL sound/synth/snd-util-mem 0xb9bdb5f8	__snd_util_mem_free
+EXPORT_SYMBOL sound/synth/snd-util-mem 0xc60284be	snd_util_memhdr_free
+EXPORT_SYMBOL sound/synth/snd-util-mem 0xf02dfdcb	__snd_util_mem_alloc
+EXPORT_SYMBOL sound/synth/snd-util-mem 0xf39b8b68	snd_util_mem_avail
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0x16756dc0	snd_usbmidi_input_start
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0x63343b1d	snd_usbmidi_input_stop
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0x9c7e3221	snd_usb_create_midi_interface
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0xd9d2bb03	snd_usbmidi_disconnect
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x1bb5e46f	dm_mem_cache_alloc
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x1ed16c40	dm_mem_cache_client_create
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x5bf6330b	dm_mem_cache_client_destroy
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x729e1a76	dm_mem_cache_free
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x920a7a41	dm_message_parse
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x96944a3d	dm_mem_cache_grow
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0xa16c6711	dm_mem_cache_shrink
+EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x04dca738	lirc_unregister_driver
+EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x793238f1	lirc_get_pdata
+EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x9b2782c8	lirc_register_driver
+EXPORT_SYMBOL vmlinux 0x00000000	per_cpu__softirq_work_list
+EXPORT_SYMBOL vmlinux 0x002852b3	locks_init_lock
+EXPORT_SYMBOL vmlinux 0x002e62fd	i2c_smbus_process_call
+EXPORT_SYMBOL vmlinux 0x00388c79	fddi_type_trans
+EXPORT_SYMBOL vmlinux 0x00393203	ps2_begin_command
+EXPORT_SYMBOL vmlinux 0x0043022e	tcp_getsockopt
+EXPORT_SYMBOL vmlinux 0x004bc308	jbd2_journal_load
+EXPORT_SYMBOL vmlinux 0x006c5cd4	scsi_track_queue_full
+EXPORT_SYMBOL vmlinux 0x00801678	flush_scheduled_work
+EXPORT_SYMBOL vmlinux 0x00978af1	blk_queue_max_hw_sectors
+EXPORT_SYMBOL vmlinux 0x009d258f	_write_lock
+EXPORT_SYMBOL vmlinux 0x00b0983f	blk_register_region
+EXPORT_SYMBOL vmlinux 0x00be7052	__scm_send
+EXPORT_SYMBOL vmlinux 0x00c4dc87	timecounter_init
+EXPORT_SYMBOL vmlinux 0x00e75bb8	alloc_hippi_dev
+EXPORT_SYMBOL vmlinux 0x01000e51	schedule
+EXPORT_SYMBOL vmlinux 0x010fc41e	uart_suspend_port
+EXPORT_SYMBOL vmlinux 0x01257259	dev_unicast_sync
+EXPORT_SYMBOL vmlinux 0x0132d7ba	dcache_dir_open
+EXPORT_SYMBOL vmlinux 0x01358170	sock_no_connect
+EXPORT_SYMBOL vmlinux 0x016a08fd	rdmsr_on_cpus
+EXPORT_SYMBOL vmlinux 0x016c29a8	open_by_devnum
+EXPORT_SYMBOL vmlinux 0x0186d073	percpu_counter_set
+EXPORT_SYMBOL vmlinux 0x018a8eca	compat_ip_setsockopt
+EXPORT_SYMBOL vmlinux 0x01902adf	netpoll_trap
+EXPORT_SYMBOL vmlinux 0x01a4aab6	set_irq_chip_data
+EXPORT_SYMBOL vmlinux 0x01b0bf82	register_sysrq_key
+EXPORT_SYMBOL vmlinux 0x01d19038	acpi_enable_subsystem
+EXPORT_SYMBOL vmlinux 0x01e2c600	genl_unregister_ops
+EXPORT_SYMBOL vmlinux 0x01fa4c96	tcp_sendmsg
+EXPORT_SYMBOL vmlinux 0x020a9adf	sock_recvmsg
+EXPORT_SYMBOL vmlinux 0x02124474	ip_send_check
+EXPORT_SYMBOL vmlinux 0x0237b57a	arch_unregister_cpu
+EXPORT_SYMBOL vmlinux 0x0256389f	bit_waitqueue
+EXPORT_SYMBOL vmlinux 0x02649054	security_sock_rcv_skb
+EXPORT_SYMBOL vmlinux 0x0272ff3d	keyring_clear
+EXPORT_SYMBOL vmlinux 0x029444f0	native_read_tsc
+EXPORT_SYMBOL vmlinux 0x0298d368	kobject_init
+EXPORT_SYMBOL vmlinux 0x02a6ce5a	crc16_table
+EXPORT_SYMBOL vmlinux 0x02aff2f4	acpi_install_gpe_handler
+EXPORT_SYMBOL vmlinux 0x02b0d359	mmc_request_done
+EXPORT_SYMBOL vmlinux 0x02b3575c	sock_no_socketpair
+EXPORT_SYMBOL vmlinux 0x02b82f04	blk_queue_resize_tags
+EXPORT_SYMBOL vmlinux 0x02c40853	textsearch_unregister
+EXPORT_SYMBOL vmlinux 0x02cf663d	eth_change_mtu
+EXPORT_SYMBOL vmlinux 0x02d81845	audit_log_task_context
+EXPORT_SYMBOL vmlinux 0x02e05da7	mark_buffer_dirty_inode
+EXPORT_SYMBOL vmlinux 0x032ba55e	simple_write_begin
+EXPORT_SYMBOL vmlinux 0x0334da4e	scsi_command_size_tbl
+EXPORT_SYMBOL vmlinux 0x033631f9	tcp_hashinfo
+EXPORT_SYMBOL vmlinux 0x033fdf0a	bio_integrity_tag_size
+EXPORT_SYMBOL vmlinux 0x0340d0e1	acpi_pci_osc_control_set
+EXPORT_SYMBOL vmlinux 0x0340e0ae	schedule_delayed_work
+EXPORT_SYMBOL vmlinux 0x03442c61	blk_dump_rq_flags
+EXPORT_SYMBOL vmlinux 0x034e0218	dma_pool_free
+EXPORT_SYMBOL vmlinux 0x034f959c	sock_register
+EXPORT_SYMBOL vmlinux 0x037a0cba	kfree
+EXPORT_SYMBOL vmlinux 0x03c06156	bitmap_fold
+EXPORT_SYMBOL vmlinux 0x03c54ba1	pci_remove_bus_device
+EXPORT_SYMBOL vmlinux 0x03e7e7fe	ip_fragment
+EXPORT_SYMBOL vmlinux 0x03fd2571	vm_unmap_ram
+EXPORT_SYMBOL vmlinux 0x0407543f	vlan_dev_vlan_id
+EXPORT_SYMBOL vmlinux 0x04077247	journal_start
+EXPORT_SYMBOL vmlinux 0x041cb456	vfs_symlink
+EXPORT_SYMBOL vmlinux 0x0422fe4a	inet_csk_timer_bug_msg
+EXPORT_SYMBOL vmlinux 0x047fff6e	force_sig
+EXPORT_SYMBOL vmlinux 0x0487f831	fb_find_best_display
+EXPORT_SYMBOL vmlinux 0x04b3026e	vga_client_register
+EXPORT_SYMBOL vmlinux 0x04d073c5	get_io_context
+EXPORT_SYMBOL vmlinux 0x04d727ca	skb_seq_read
+EXPORT_SYMBOL vmlinux 0x04d8c750	release_perfctr_nmi
+EXPORT_SYMBOL vmlinux 0x04e1b5ce	kmem_cache_size
+EXPORT_SYMBOL vmlinux 0x0517b727	kern_path
+EXPORT_SYMBOL vmlinux 0x05240ee7	percpu_counter_batch
+EXPORT_SYMBOL vmlinux 0x05436508	ip_getsockopt
+EXPORT_SYMBOL vmlinux 0x055611e8	pcim_iomap_table
+EXPORT_SYMBOL vmlinux 0x0568fe9a	key_negate_and_link
+EXPORT_SYMBOL vmlinux 0x05859a14	compat_sock_common_setsockopt
+EXPORT_SYMBOL vmlinux 0x058666b1	pci_disable_msix
+EXPORT_SYMBOL vmlinux 0x0587956c	nobh_writepage
+EXPORT_SYMBOL vmlinux 0x058c2449	tty_register_driver
+EXPORT_SYMBOL vmlinux 0x05aab3a0	qdisc_warn_nonwc
+EXPORT_SYMBOL vmlinux 0x05e28d43	__first_cpu
+EXPORT_SYMBOL vmlinux 0x06124bd5	unlock_new_inode
+EXPORT_SYMBOL vmlinux 0x061651be	strcat
+EXPORT_SYMBOL vmlinux 0x0664857e	genphy_suspend
+EXPORT_SYMBOL vmlinux 0x067c8388	dquot_drop
+EXPORT_SYMBOL vmlinux 0x067d8d35	security_release_secctx
+EXPORT_SYMBOL vmlinux 0x0685d6d5	swiotlb_map_sg_attrs
+EXPORT_SYMBOL vmlinux 0x068c7263	ioremap_cache
+EXPORT_SYMBOL vmlinux 0x06a485f2	__krealloc
+EXPORT_SYMBOL vmlinux 0x06a9a527	jbd2_journal_init_jbd_inode
+EXPORT_SYMBOL vmlinux 0x06acc8aa	get_unmapped_area_prot
+EXPORT_SYMBOL vmlinux 0x06d728b1	tcp_parse_md5sig_option
+EXPORT_SYMBOL vmlinux 0x06fab991	alloc_pages_current
+EXPORT_SYMBOL vmlinux 0x06fe3b14	default_grn
+EXPORT_SYMBOL vmlinux 0x06fe8ef2	find_or_create_page
+EXPORT_SYMBOL vmlinux 0x0727c4f3	iowrite8
+EXPORT_SYMBOL vmlinux 0x073dfa12	generate_resume_trace
+EXPORT_SYMBOL vmlinux 0x076fc4e5	generic_writepages
+EXPORT_SYMBOL vmlinux 0x07824f24	dma_pool_alloc
+EXPORT_SYMBOL vmlinux 0x078be046	nf_register_sockopt
+EXPORT_SYMBOL vmlinux 0x0796125f	loop_register_transfer
+EXPORT_SYMBOL vmlinux 0x0799aca4	local_bh_enable
+EXPORT_SYMBOL vmlinux 0x0799c50a	param_set_ulong
+EXPORT_SYMBOL vmlinux 0x07a890c8	fb_alloc_cmap
+EXPORT_SYMBOL vmlinux 0x07ad7ea3	tty_hung_up_p
+EXPORT_SYMBOL vmlinux 0x07b95dad	bioset_create
+EXPORT_SYMBOL vmlinux 0x07cc4a5d	printk_timed_ratelimit
+EXPORT_SYMBOL vmlinux 0x07d9b783	scsi_nl_send_vendor_msg
+EXPORT_SYMBOL vmlinux 0x07f3c3e7	tcp_make_synack
+EXPORT_SYMBOL vmlinux 0x080c5546	key_task_permission
+EXPORT_SYMBOL vmlinux 0x0824d939	gnet_stats_copy_app
+EXPORT_SYMBOL vmlinux 0x082c3213	pci_root_buses
+EXPORT_SYMBOL vmlinux 0x0830e278	read_dev_sector
+EXPORT_SYMBOL vmlinux 0x083ead0d	sk_stop_timer
+EXPORT_SYMBOL vmlinux 0x084fd1cd	grab_cache_page_write_begin
+EXPORT_SYMBOL vmlinux 0x0861931f	tty_throttle
+EXPORT_SYMBOL vmlinux 0x08631fa9	bio_integrity_alloc_bioset
+EXPORT_SYMBOL vmlinux 0x08687f62	rfkill_blocked
+EXPORT_SYMBOL vmlinux 0x086d6f66	swiotlb_dma_mapping_error
+EXPORT_SYMBOL vmlinux 0x088cfd52	mutex_unlock
+EXPORT_SYMBOL vmlinux 0x08a9d7b8	__netdev_alloc_skb
+EXPORT_SYMBOL vmlinux 0x08d5ddec	register_snap_client
+EXPORT_SYMBOL vmlinux 0x08d66a3a	warn_slowpath_fmt
+EXPORT_SYMBOL vmlinux 0x0902d72c	i2c_smbus_write_word_data
+EXPORT_SYMBOL vmlinux 0x09050a97	pci_pme_capable
+EXPORT_SYMBOL vmlinux 0x0933aae1	efi_enabled
+EXPORT_SYMBOL vmlinux 0x0948cde9	num_physpages
+EXPORT_SYMBOL vmlinux 0x0952d527	jbd2_log_wait_commit
+EXPORT_SYMBOL vmlinux 0x098431ba	acpi_get_current_resources
+EXPORT_SYMBOL vmlinux 0x098926af	sock_wake_async
+EXPORT_SYMBOL vmlinux 0x098b71c6	fb_dealloc_cmap
+EXPORT_SYMBOL vmlinux 0x09aaff40	md_write_end
+EXPORT_SYMBOL vmlinux 0x09c55cec	schedule_timeout_interruptible
+EXPORT_SYMBOL vmlinux 0x09d44df9	in_lock_functions
+EXPORT_SYMBOL vmlinux 0x09db5c4c	kset_unregister
+EXPORT_SYMBOL vmlinux 0x0a188cbe	skb_store_bits
+EXPORT_SYMBOL vmlinux 0x0a2487e0	unblock_all_signals
+EXPORT_SYMBOL vmlinux 0x0a2ba577	tcp_rcv_established
+EXPORT_SYMBOL vmlinux 0x0a347d61	rfkill_set_led_trigger_name
+EXPORT_SYMBOL vmlinux 0x0a47b9ee	compat_tcp_getsockopt
+EXPORT_SYMBOL vmlinux 0x0a7ad07a	dev_get_by_index
+EXPORT_SYMBOL vmlinux 0x0acb1a3c	__bitmap_shift_right
+EXPORT_SYMBOL vmlinux 0x0acf7679	dma_issue_pending_all
+EXPORT_SYMBOL vmlinux 0x0ad569b6	tcp_md5_hash_skb_data
+EXPORT_SYMBOL vmlinux 0x0ae7508b	scsi_setup_fs_cmnd
+EXPORT_SYMBOL vmlinux 0x0b0cedab	agp_generic_type_to_mask_type
+EXPORT_SYMBOL vmlinux 0x0b0d888b	icmpv6_err_convert
+EXPORT_SYMBOL vmlinux 0x0b1beb31	vmalloc_32_user
+EXPORT_SYMBOL vmlinux 0x0b271877	mb_cache_shrink
+EXPORT_SYMBOL vmlinux 0x0b39b6b4	dev_queue_xmit
+EXPORT_SYMBOL vmlinux 0x0b3b5f40	pci_dev_driver
+EXPORT_SYMBOL vmlinux 0x0b61bd0b	security_inode_init_security
+EXPORT_SYMBOL vmlinux 0x0b742fd7	simple_strtol
+EXPORT_SYMBOL vmlinux 0x0ba92977	sk_reset_timer
+EXPORT_SYMBOL vmlinux 0x0bb03d71	dev_getbyhwaddr
+EXPORT_SYMBOL vmlinux 0x0be15aaf	ppp_unregister_compressor
+EXPORT_SYMBOL vmlinux 0x0c1606f8	udp_sendmsg
+EXPORT_SYMBOL vmlinux 0x0c278d59	scsi_print_command
+EXPORT_SYMBOL vmlinux 0x0c3204c9	pci_find_device
+EXPORT_SYMBOL vmlinux 0x0c38207a	have_submounts
+EXPORT_SYMBOL vmlinux 0x0c3efe93	pnp_register_driver
+EXPORT_SYMBOL vmlinux 0x0c3f8bb6	dst_discard
+EXPORT_SYMBOL vmlinux 0x0c502002	rwsem_wake
+EXPORT_SYMBOL vmlinux 0x0c637b70	__blk_end_request
+EXPORT_SYMBOL vmlinux 0x0c65e73c	scsi_normalize_sense
+EXPORT_SYMBOL vmlinux 0x0c6e8beb	kmem_cache_create
+EXPORT_SYMBOL vmlinux 0x0c8c9e99	scsi_show_extd_sense
+EXPORT_SYMBOL vmlinux 0x0c923b7b	mark_buffer_async_write
+EXPORT_SYMBOL vmlinux 0x0ca7b7a8	acpi_check_region
+EXPORT_SYMBOL vmlinux 0x0ca80d3b	read_cache_page
+EXPORT_SYMBOL vmlinux 0x0cae232b	utf16s_to_utf8s
+EXPORT_SYMBOL vmlinux 0x0cb83f6d	fb_set_suspend
+EXPORT_SYMBOL vmlinux 0x0cc24803	dm_table_get_md
+EXPORT_SYMBOL vmlinux 0x0cccaa92	sget
+EXPORT_SYMBOL vmlinux 0x0cd7a14f	end_page_writeback
+EXPORT_SYMBOL vmlinux 0x0d26a76d	_write_lock_irq
+EXPORT_SYMBOL vmlinux 0x0d3dda14	acpi_get_type
+EXPORT_SYMBOL vmlinux 0x0d542439	__ipv6_addr_type
+EXPORT_SYMBOL vmlinux 0x0d648f7e	acpi_unlock_ac_dir
+EXPORT_SYMBOL vmlinux 0x0d8251df	mmc_wait_for_cmd
+EXPORT_SYMBOL vmlinux 0x0d9e36e6	misc_deregister
+EXPORT_SYMBOL vmlinux 0x0da10ec3	security_sock_graft
+EXPORT_SYMBOL vmlinux 0x0da94fd2	per_cpu__softnet_data
+EXPORT_SYMBOL vmlinux 0x0dbf8cda	splice_from_pipe_feed
+EXPORT_SYMBOL vmlinux 0x0dccfd57	dcache_dir_close
+EXPORT_SYMBOL vmlinux 0x0e1ce6a9	acpi_get_hp_hw_control_from_firmware
+EXPORT_SYMBOL vmlinux 0x0e20e5d4	framebuffer_release
+EXPORT_SYMBOL vmlinux 0x0e34944a	blk_queue_merge_bvec
+EXPORT_SYMBOL vmlinux 0x0e52592a	panic
+EXPORT_SYMBOL vmlinux 0x0e6ce457	__skb_checksum_complete_head
+EXPORT_SYMBOL vmlinux 0x0e73c19b	journal_lock_updates
+EXPORT_SYMBOL vmlinux 0x0e808c8d	phy_disconnect
+EXPORT_SYMBOL vmlinux 0x0e83fea1	del_timer_sync
+EXPORT_SYMBOL vmlinux 0x0e8eb347	serio_open
+EXPORT_SYMBOL vmlinux 0x0ecc21df	dma_supported
+EXPORT_SYMBOL vmlinux 0x0ecfb721	ioctl_by_bdev
+EXPORT_SYMBOL vmlinux 0x0f01e39d	ps2_handle_ack
+EXPORT_SYMBOL vmlinux 0x0f0c57eb	pci_iounmap
+EXPORT_SYMBOL vmlinux 0x0f1ef871	posix_acl_alloc
+EXPORT_SYMBOL vmlinux 0x0f233373	__scsi_put_command
+EXPORT_SYMBOL vmlinux 0x0f67cc99	ethtool_op_get_link
+EXPORT_SYMBOL vmlinux 0x0f837d91	sock_create_kern
+EXPORT_SYMBOL vmlinux 0x0f96f0e1	scsi_free_host_dev
+EXPORT_SYMBOL vmlinux 0x0faf0e4e	generic_file_direct_write
+EXPORT_SYMBOL vmlinux 0x0fb5d293	phy_scan_fixups
+EXPORT_SYMBOL vmlinux 0x0fc5e8eb	radix_tree_gang_lookup_slot
+EXPORT_SYMBOL vmlinux 0x0fcab50e	blk_rq_map_sg
+EXPORT_SYMBOL vmlinux 0x0fcb36e0	neigh_sysctl_unregister
+EXPORT_SYMBOL vmlinux 0x0fcb91bc	skb_add_rx_frag
+EXPORT_SYMBOL vmlinux 0x0fd00a68	acpi_clear_event
+EXPORT_SYMBOL vmlinux 0x0ff09672	take_over_console
+EXPORT_SYMBOL vmlinux 0x0ff2b602	slhc_compress
+EXPORT_SYMBOL vmlinux 0x0ffc29c3	ip4_datagram_connect
+EXPORT_SYMBOL vmlinux 0x10091b4c	lro_receive_skb
+EXPORT_SYMBOL vmlinux 0x100f98c6	compat_tcp_setsockopt
+EXPORT_SYMBOL vmlinux 0x102928f4	lease_modify
+EXPORT_SYMBOL vmlinux 0x1055423e	bioset_integrity_free
+EXPORT_SYMBOL vmlinux 0x105e2727	__tracepoint_kmalloc
+EXPORT_SYMBOL vmlinux 0x1072a394	csum_partial_copy_from_user
+EXPORT_SYMBOL vmlinux 0x1076ba27	__inet6_lookup_established
+EXPORT_SYMBOL vmlinux 0x107d5757	textsearch_destroy
+EXPORT_SYMBOL vmlinux 0x108e8985	param_get_uint
+EXPORT_SYMBOL vmlinux 0x109018ca	dm_kcopyd_client_destroy
+EXPORT_SYMBOL vmlinux 0x109d0645	dst_alloc
+EXPORT_SYMBOL vmlinux 0x10b56734	__xfrm_state_delete
+EXPORT_SYMBOL vmlinux 0x10bb7461	__nla_reserve
+EXPORT_SYMBOL vmlinux 0x10ee20bb	default_blu
+EXPORT_SYMBOL vmlinux 0x1106dbe9	should_remove_suid
+EXPORT_SYMBOL vmlinux 0x1113c9e0	i2c_smbus_write_byte_data
+EXPORT_SYMBOL vmlinux 0x11267875	scsi_extd_sense_format
+EXPORT_SYMBOL vmlinux 0x114ed1ce	schedule_work_on
+EXPORT_SYMBOL vmlinux 0x1163f0a7	blk_max_low_pfn
+EXPORT_SYMBOL vmlinux 0x116c586a	dquot_alloc
+EXPORT_SYMBOL vmlinux 0x117093be	qdisc_class_hash_init
+EXPORT_SYMBOL vmlinux 0x1181084f	splice_from_pipe_begin
+EXPORT_SYMBOL vmlinux 0x118f01ea	putname
+EXPORT_SYMBOL vmlinux 0x119863a3	sync_inodes_sb
+EXPORT_SYMBOL vmlinux 0x11a18b14	__wake_up_bit
+EXPORT_SYMBOL vmlinux 0x11b0d555	pci_target_state
+EXPORT_SYMBOL vmlinux 0x11b2c3b7	kmem_cache_destroy
+EXPORT_SYMBOL vmlinux 0x12087346	register_netdev
+EXPORT_SYMBOL vmlinux 0x12189893	sk_stream_write_space
+EXPORT_SYMBOL vmlinux 0x122106a3	elv_dispatch_add_tail
+EXPORT_SYMBOL vmlinux 0x12304d6e	hippi_type_trans
+EXPORT_SYMBOL vmlinux 0x12368737	iunique
+EXPORT_SYMBOL vmlinux 0x12860698	input_free_device
+EXPORT_SYMBOL vmlinux 0x129bb39e	bdi_set_max_ratio
+EXPORT_SYMBOL vmlinux 0x12ac13fb	unregister_filesystem
+EXPORT_SYMBOL vmlinux 0x12d0fd87	swiotlb_map_sg
+EXPORT_SYMBOL vmlinux 0x12f10736	udplite_table
+EXPORT_SYMBOL vmlinux 0x12f2b4be	d_prune_aliases
+EXPORT_SYMBOL vmlinux 0x12fe7dcb	dentry_unhash
+EXPORT_SYMBOL vmlinux 0x134019cb	directly_mappable_cdev_bdi
+EXPORT_SYMBOL vmlinux 0x134816fa	kset_register
+EXPORT_SYMBOL vmlinux 0x135b2c47	netif_notify_peers
+EXPORT_SYMBOL vmlinux 0x135c2168	make_bad_inode
+EXPORT_SYMBOL vmlinux 0x1378e714	acpi_video_display_switch_support
+EXPORT_SYMBOL vmlinux 0x138a78d1	set_current_groups
+EXPORT_SYMBOL vmlinux 0x13d08da4	i2c_put_adapter
+EXPORT_SYMBOL vmlinux 0x13dc46eb	genphy_read_status
+EXPORT_SYMBOL vmlinux 0x13e5019d	scsi_host_set_state
+EXPORT_SYMBOL vmlinux 0x13f14cb3	bio_pair_release
+EXPORT_SYMBOL vmlinux 0x13f42152	system_entering_hibernation
+EXPORT_SYMBOL vmlinux 0x14105c88	bdput
+EXPORT_SYMBOL vmlinux 0x1418593c	ip_route_me_harder
+EXPORT_SYMBOL vmlinux 0x1430e6e0	unregister_acpi_notifier
+EXPORT_SYMBOL vmlinux 0x143ed8d9	generic_setlease
+EXPORT_SYMBOL vmlinux 0x143f79d7	invalidate_inode_buffers
+EXPORT_SYMBOL vmlinux 0x14af0cf7	gen_pool_destroy
+EXPORT_SYMBOL vmlinux 0x14d4539f	pskb_expand_head
+EXPORT_SYMBOL vmlinux 0x1551dc51	bitmap_find_free_region
+EXPORT_SYMBOL vmlinux 0x15592650	scsi_register_interface
+EXPORT_SYMBOL vmlinux 0x1577d989	bio_integrity_get_tag
+EXPORT_SYMBOL vmlinux 0x15801eda	input_set_capability
+EXPORT_SYMBOL vmlinux 0x15ac1ccc	cad_pid
+EXPORT_SYMBOL vmlinux 0x15c4ebb4	current_fs_time
+EXPORT_SYMBOL vmlinux 0x15cd37e1	neigh_resolve_output
+EXPORT_SYMBOL vmlinux 0x15e8ac92	journal_ack_err
+EXPORT_SYMBOL vmlinux 0x15ef2dd9	kfifo_free
+EXPORT_SYMBOL vmlinux 0x160ea4c8	sfi_disabled
+EXPORT_SYMBOL vmlinux 0x1615d15e	nf_setsockopt
+EXPORT_SYMBOL vmlinux 0x1624b3af	call_usermodehelper_exec
+EXPORT_SYMBOL vmlinux 0x16305289	warn_slowpath_null
+EXPORT_SYMBOL vmlinux 0x16368146	sk_free
+EXPORT_SYMBOL vmlinux 0x163c5e39	twl4030_i2c_read
+EXPORT_SYMBOL vmlinux 0x1675606f	bad_dma_address
+EXPORT_SYMBOL vmlinux 0x167aae04	clear_page_dirty_for_io
+EXPORT_SYMBOL vmlinux 0x167e7f9d	__get_user_1
+EXPORT_SYMBOL vmlinux 0x16857729	ip6_route_me_harder
+EXPORT_SYMBOL vmlinux 0x1691f558	i2c_smbus_write_i2c_block_data
+EXPORT_SYMBOL vmlinux 0x169a6438	bioset_free
+EXPORT_SYMBOL vmlinux 0x16a35878	_read_unlock
+EXPORT_SYMBOL vmlinux 0x16c3506a	lock_sock_nested
+EXPORT_SYMBOL vmlinux 0x16d4b1ad	fifo_set_limit
+EXPORT_SYMBOL vmlinux 0x16eaa758	blk_queue_update_dma_alignment
+EXPORT_SYMBOL vmlinux 0x16f4c6f0	km_query
+EXPORT_SYMBOL vmlinux 0x170c25ee	acpi_get_next_object
+EXPORT_SYMBOL vmlinux 0x175b816c	dquot_free_space
+EXPORT_SYMBOL vmlinux 0x1781d28e	sock_alloc_send_skb
+EXPORT_SYMBOL vmlinux 0x178c8fa6	xfrm_policy_alloc
+EXPORT_SYMBOL vmlinux 0x178d5adf	node_data
+EXPORT_SYMBOL vmlinux 0x17c115ae	scsi_eh_finish_cmd
+EXPORT_SYMBOL vmlinux 0x17c85a66	radix_tree_tagged
+EXPORT_SYMBOL vmlinux 0x17cd2672	tcp_gro_receive
+EXPORT_SYMBOL vmlinux 0x17d0ef2d	set_page_dirty_lock
+EXPORT_SYMBOL vmlinux 0x17df17bc	sysctl_tcp_ecn
+EXPORT_SYMBOL vmlinux 0x17f341a0	i8042_lock_chip
+EXPORT_SYMBOL vmlinux 0x17ff4469	bitmap_unplug
+EXPORT_SYMBOL vmlinux 0x1813dfe0	inet_sendmsg
+EXPORT_SYMBOL vmlinux 0x181b6ff2	mempool_resize
+EXPORT_SYMBOL vmlinux 0x18389a08	__dev_remove_pack
+EXPORT_SYMBOL vmlinux 0x183fa88b	mempool_alloc_slab
+EXPORT_SYMBOL vmlinux 0x184b82fb	mmc_vddrange_to_ocrmask
+EXPORT_SYMBOL vmlinux 0x18502252	sock_kmalloc
+EXPORT_SYMBOL vmlinux 0x18602107	scsi_mode_sense
+EXPORT_SYMBOL vmlinux 0x186d64a4	inet_frags_exit_net
+EXPORT_SYMBOL vmlinux 0x18771395	blk_get_request
+EXPORT_SYMBOL vmlinux 0x188eaa57	vm_map_ram
+EXPORT_SYMBOL vmlinux 0x189b6bac	memory_read_from_buffer
+EXPORT_SYMBOL vmlinux 0x18ac8118	simple_release_fs
+EXPORT_SYMBOL vmlinux 0x18b72573	register_kmmio_probe
+EXPORT_SYMBOL vmlinux 0x18baa56a	blk_queue_invalidate_tags
+EXPORT_SYMBOL vmlinux 0x18cc50e1	k8_northbridges
+EXPORT_SYMBOL vmlinux 0x18e8401d	proc_dointvec_jiffies
+EXPORT_SYMBOL vmlinux 0x19005e68	llc_sap_find
+EXPORT_SYMBOL vmlinux 0x190c3d2b	dmam_alloc_noncoherent
+EXPORT_SYMBOL vmlinux 0x19391763	iov_iter_fault_in_readable
+EXPORT_SYMBOL vmlinux 0x1943386e	journal_invalidatepage
+EXPORT_SYMBOL vmlinux 0x19723ba3	rfkill_set_sw_state
+EXPORT_SYMBOL vmlinux 0x1976bc16	__tracepoint_kmem_cache_free
+EXPORT_SYMBOL vmlinux 0x1985ed3c	prepare_to_wait_exclusive
+EXPORT_SYMBOL vmlinux 0x199ed0cd	net_disable_timestamp
+EXPORT_SYMBOL vmlinux 0x19b4bb0a	dm_table_unplug_all
+EXPORT_SYMBOL vmlinux 0x19cbf9ba	kmem_cache_name
+EXPORT_SYMBOL vmlinux 0x19d03262	inet6_add_protocol
+EXPORT_SYMBOL vmlinux 0x19d5d20a	acpi_walk_namespace
+EXPORT_SYMBOL vmlinux 0x1a218de6	fb_show_logo
+EXPORT_SYMBOL vmlinux 0x1a45cb6c	acpi_disabled
+EXPORT_SYMBOL vmlinux 0x1a75caa3	_read_lock
+EXPORT_SYMBOL vmlinux 0x1a7cd831	tcp_check_req
+EXPORT_SYMBOL vmlinux 0x1a893cb6	__scsi_device_lookup
+EXPORT_SYMBOL vmlinux 0x1a8a845e	idle_nomwait
+EXPORT_SYMBOL vmlinux 0x1abe5069	simple_write_end
+EXPORT_SYMBOL vmlinux 0x1ace138d	bitmap_allocate_region
+EXPORT_SYMBOL vmlinux 0x1aec7e67	inet_del_protocol
+EXPORT_SYMBOL vmlinux 0x1aed4297	tcp_parse_options
+EXPORT_SYMBOL vmlinux 0x1afec1b6	add_to_page_cache_locked
+EXPORT_SYMBOL vmlinux 0x1b015d25	bitmap_parselist
+EXPORT_SYMBOL vmlinux 0x1b0c7ebd	backlight_force_update
+EXPORT_SYMBOL vmlinux 0x1b4809a0	get_fs_type
+EXPORT_SYMBOL vmlinux 0x1b626b5e	neigh_destroy
+EXPORT_SYMBOL vmlinux 0x1b6314fd	in_aton
+EXPORT_SYMBOL vmlinux 0x1b753783	kmem_cache_alloc_node
+EXPORT_SYMBOL vmlinux 0x1b84993a	netdev_rx_csum_fault
+EXPORT_SYMBOL vmlinux 0x1b89419f	add_wait_queue_exclusive
+EXPORT_SYMBOL vmlinux 0x1b8b95ad	i8042_unlock_chip
+EXPORT_SYMBOL vmlinux 0x1b9981cc	set_irq_wake
+EXPORT_SYMBOL vmlinux 0x1b9c88a5	mutex_lock_interruptible
+EXPORT_SYMBOL vmlinux 0x1b9e0ff1	scsilun_to_int
+EXPORT_SYMBOL vmlinux 0x1baafc36	sk_wait_data
+EXPORT_SYMBOL vmlinux 0x1bade9ea	uart_unregister_driver
+EXPORT_SYMBOL vmlinux 0x1baf36cb	inode_needs_sync
+EXPORT_SYMBOL vmlinux 0x1bc947e9	dev_get_by_name
+EXPORT_SYMBOL vmlinux 0x1bcc1369	pipe_lock
+EXPORT_SYMBOL vmlinux 0x1bd53af4	mb_cache_entry_alloc
+EXPORT_SYMBOL vmlinux 0x1c1af916	set_normalized_timespec
+EXPORT_SYMBOL vmlinux 0x1c5f1281	d_alloc_name
+EXPORT_SYMBOL vmlinux 0x1c8a04b0	acpi_reset
+EXPORT_SYMBOL vmlinux 0x1c8a5d6b	default_file_splice_read
+EXPORT_SYMBOL vmlinux 0x1cae83f1	phy_register_fixup_for_uid
+EXPORT_SYMBOL vmlinux 0x1cb01d7b	dquot_claim_space
+EXPORT_SYMBOL vmlinux 0x1cc6719a	register_reboot_notifier
+EXPORT_SYMBOL vmlinux 0x1ccc8a2b	set_page_dirty
+EXPORT_SYMBOL vmlinux 0x1ceddff2	tcp_connect
+EXPORT_SYMBOL vmlinux 0x1cefe352	wait_for_completion
+EXPORT_SYMBOL vmlinux 0x1cfdffdf	pcie_port_service_register
+EXPORT_SYMBOL vmlinux 0x1d0bb228	dev_unicast_add
+EXPORT_SYMBOL vmlinux 0x1d2b6b8a	journal_start_commit
+EXPORT_SYMBOL vmlinux 0x1d2e87c6	do_gettimeofday
+EXPORT_SYMBOL vmlinux 0x1d6d1737	dm_unregister_target
+EXPORT_SYMBOL vmlinux 0x1d759f26	xfrm_unregister_km
+EXPORT_SYMBOL vmlinux 0x1db7706b	__copy_user_nocache
+EXPORT_SYMBOL vmlinux 0x1dc36131	fb_destroy_modedb
+EXPORT_SYMBOL vmlinux 0x1dca153d	bio_endio
+EXPORT_SYMBOL vmlinux 0x1dd571e6	fb_copy_cmap
+EXPORT_SYMBOL vmlinux 0x1df320bc	sock_sendmsg
+EXPORT_SYMBOL vmlinux 0x1dffd862	dma_pool_create
+EXPORT_SYMBOL vmlinux 0x1e0125de	d_delete
+EXPORT_SYMBOL vmlinux 0x1e0c2be4	ioremap_wc
+EXPORT_SYMBOL vmlinux 0x1e2e427f	cpumask_next_and
+EXPORT_SYMBOL vmlinux 0x1e41a689	writeback_inodes_sb_if_idle
+EXPORT_SYMBOL vmlinux 0x1e49255a	iov_iter_copy_from_user
+EXPORT_SYMBOL vmlinux 0x1e66f167	pci_match_id
+EXPORT_SYMBOL vmlinux 0x1e684874	thaw_bdev
+EXPORT_SYMBOL vmlinux 0x1e6d26a8	strstr
+EXPORT_SYMBOL vmlinux 0x1e72b042	complete_request_key
+EXPORT_SYMBOL vmlinux 0x1e9e1211	tty_driver_flush_buffer
+EXPORT_SYMBOL vmlinux 0x1ea59331	__ps2_command
+EXPORT_SYMBOL vmlinux 0x1efe283f	__cap_full_set
+EXPORT_SYMBOL vmlinux 0x1f0768db	input_unregister_device
+EXPORT_SYMBOL vmlinux 0x1f22a46a	xfrm_state_lookup
+EXPORT_SYMBOL vmlinux 0x1f2527f7	sock_map_fd
+EXPORT_SYMBOL vmlinux 0x1f27d6d7	_write_unlock
+EXPORT_SYMBOL vmlinux 0x1f75e552	pnp_stop_dev
+EXPORT_SYMBOL vmlinux 0x1f7f72d6	inet_frag_evictor
+EXPORT_SYMBOL vmlinux 0x1fae143d	jbd2_journal_extend
+EXPORT_SYMBOL vmlinux 0x1fc3de7d	napi_gro_frags
+EXPORT_SYMBOL vmlinux 0x1fe4cae6	unregister_8022_client
+EXPORT_SYMBOL vmlinux 0x1fe99a03	i2c_del_adapter
+EXPORT_SYMBOL vmlinux 0x1fedf0f4	__request_region
+EXPORT_SYMBOL vmlinux 0x20000329	simple_strtoul
+EXPORT_SYMBOL vmlinux 0x2005e68a	acpi_remove_fixed_event_handler
+EXPORT_SYMBOL vmlinux 0x20092385	acpi_enter_sleep_state_s4bios
+EXPORT_SYMBOL vmlinux 0x200effc8	inet_frags_fini
+EXPORT_SYMBOL vmlinux 0x202c1bc1	__pskb_pull_tail
+EXPORT_SYMBOL vmlinux 0x20385c58	genl_register_mc_group
+EXPORT_SYMBOL vmlinux 0x204857ac	proc_dostring
+EXPORT_SYMBOL vmlinux 0x204ce359	unmap_mapping_range
+EXPORT_SYMBOL vmlinux 0x207f0596	inet_sock_destruct
+EXPORT_SYMBOL vmlinux 0x208739f6	acpi_load_table
+EXPORT_SYMBOL vmlinux 0x20a1bc75	vfs_dq_drop
+EXPORT_SYMBOL vmlinux 0x20eadeb6	ip_compute_csum
+EXPORT_SYMBOL vmlinux 0x20f9322a	idr_pre_get
+EXPORT_SYMBOL vmlinux 0x212983e7	d_path
+EXPORT_SYMBOL vmlinux 0x213532a0	phy_start
+EXPORT_SYMBOL vmlinux 0x2136b299	compat_nf_setsockopt
+EXPORT_SYMBOL vmlinux 0x213bed38	ip_mc_inc_group
+EXPORT_SYMBOL vmlinux 0x2158f747	i2c_master_recv
+EXPORT_SYMBOL vmlinux 0x215ebd78	bitrev16
+EXPORT_SYMBOL vmlinux 0x21b33761	i8042_check_port_owner
+EXPORT_SYMBOL vmlinux 0x21bd42c1	netdev_class_create_file
+EXPORT_SYMBOL vmlinux 0x21c0be6f	jbd2_journal_init_inode
+EXPORT_SYMBOL vmlinux 0x21d50a51	tcf_hash_release
+EXPORT_SYMBOL vmlinux 0x21e0ea22	acpi_get_id
+EXPORT_SYMBOL vmlinux 0x21e5679c	copy_user_generic
+EXPORT_SYMBOL vmlinux 0x21e56b79	serio_rescan
+EXPORT_SYMBOL vmlinux 0x21e80207	netdev_features_change
+EXPORT_SYMBOL vmlinux 0x22136fcc	pagevec_lookup
+EXPORT_SYMBOL vmlinux 0x222e7ce2	sysfs_streq
+EXPORT_SYMBOL vmlinux 0x2232cc29	tty_port_block_til_ready
+EXPORT_SYMBOL vmlinux 0x2259a882	bitmap_cond_end_sync
+EXPORT_SYMBOL vmlinux 0x225ee95f	genphy_restart_aneg
+EXPORT_SYMBOL vmlinux 0x226d4cd2	unload_nls
+EXPORT_SYMBOL vmlinux 0x226e86a9	audit_log
+EXPORT_SYMBOL vmlinux 0x227b58eb	tcp_v4_md5_hash_skb
+EXPORT_SYMBOL vmlinux 0x228426af	nla_reserve
+EXPORT_SYMBOL vmlinux 0x2286a483	elv_queue_empty
+EXPORT_SYMBOL vmlinux 0x2288378f	system_state
+EXPORT_SYMBOL vmlinux 0x22a73912	__tcp_put_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x22b325d5	kd_mksound
+EXPORT_SYMBOL vmlinux 0x22b6533b	xfrm_sad_getinfo
+EXPORT_SYMBOL vmlinux 0x22c26756	skb_make_writable
+EXPORT_SYMBOL vmlinux 0x232170c4	inode_setattr
+EXPORT_SYMBOL vmlinux 0x23269a13	strict_strtoul
+EXPORT_SYMBOL vmlinux 0x233c22cc	simple_dir_inode_operations
+EXPORT_SYMBOL vmlinux 0x234509f3	strncat
+EXPORT_SYMBOL vmlinux 0x23498e11	agp_generic_alloc_pages
+EXPORT_SYMBOL vmlinux 0x235d16e0	i2c_del_driver
+EXPORT_SYMBOL vmlinux 0x236c8c64	memcpy
+EXPORT_SYMBOL vmlinux 0x23b99e92	node_states
+EXPORT_SYMBOL vmlinux 0x23c8f257	slhc_uncompress
+EXPORT_SYMBOL vmlinux 0x23fd3028	vmalloc_node
+EXPORT_SYMBOL vmlinux 0x24428be5	strncpy_from_user
+EXPORT_SYMBOL vmlinux 0x244695f9	__locks_copy_lock
+EXPORT_SYMBOL vmlinux 0x2459bbcc	console_set_on_cmdline
+EXPORT_SYMBOL vmlinux 0x24624544	ftrace_print_flags_seq
+EXPORT_SYMBOL vmlinux 0x2467db4e	proto_register
+EXPORT_SYMBOL vmlinux 0x24686293	proc_doulongvec_minmax
+EXPORT_SYMBOL vmlinux 0x24a4c5d8	xfrm6_prepare_output
+EXPORT_SYMBOL vmlinux 0x24a96205	mb_cache_entry_release
+EXPORT_SYMBOL vmlinux 0x24cc5485	inode_sub_bytes
+EXPORT_SYMBOL vmlinux 0x24d3f093	dev_driver_string
+EXPORT_SYMBOL vmlinux 0x24dff693	phy_sanitize_settings
+EXPORT_SYMBOL vmlinux 0x24e4bb01	down_write_trylock
+EXPORT_SYMBOL vmlinux 0x24fdac79	wake_bit_function
+EXPORT_SYMBOL vmlinux 0x2501563d	simple_lookup
+EXPORT_SYMBOL vmlinux 0x25098555	fb_set_cmap
+EXPORT_SYMBOL vmlinux 0x250c6e93	xfrm_state_check_expire
+EXPORT_SYMBOL vmlinux 0x250cebd8	pci_clear_mwi
+EXPORT_SYMBOL vmlinux 0x2540cc90	sock_tx_timestamp
+EXPORT_SYMBOL vmlinux 0x254a4fe5	unlock_super
+EXPORT_SYMBOL vmlinux 0x25820c64	fs_overflowuid
+EXPORT_SYMBOL vmlinux 0x258355b4	fb_find_best_mode
+EXPORT_SYMBOL vmlinux 0x2591994c	tcp_prot
+EXPORT_SYMBOL vmlinux 0x259d0854	security_task_getsecid
+EXPORT_SYMBOL vmlinux 0x25e1bbfc	try_to_release_page
+EXPORT_SYMBOL vmlinux 0x25ec1b28	strlen
+EXPORT_SYMBOL vmlinux 0x25ef726e	md_wait_for_blocked_rdev
+EXPORT_SYMBOL vmlinux 0x26513c12	register_console
+EXPORT_SYMBOL vmlinux 0x266c7f28	uart_register_driver
+EXPORT_SYMBOL vmlinux 0x266e5f40	__blockdev_direct_IO
+EXPORT_SYMBOL vmlinux 0x267fc65b	__tasklet_hi_schedule
+EXPORT_SYMBOL vmlinux 0x26800b88	__wait_on_buffer
+EXPORT_SYMBOL vmlinux 0x2684029f	phy_start_aneg
+EXPORT_SYMBOL vmlinux 0x2685c3d7	__sg_alloc_table
+EXPORT_SYMBOL vmlinux 0x269118dc	sk_stream_wait_memory
+EXPORT_SYMBOL vmlinux 0x26abea19	tcp_proc_unregister
+EXPORT_SYMBOL vmlinux 0x26c9d933	ppp_register_net_channel
+EXPORT_SYMBOL vmlinux 0x26e76fb8	sysctl_udp_wmem_min
+EXPORT_SYMBOL vmlinux 0x2702bb70	qdisc_list_del
+EXPORT_SYMBOL vmlinux 0x271cba95	acpi_bus_private_data_handler
+EXPORT_SYMBOL vmlinux 0x2727da5d	_atomic_dec_and_lock
+EXPORT_SYMBOL vmlinux 0x272d394e	mtrr_del
+EXPORT_SYMBOL vmlinux 0x273f066e	_write_unlock_irq
+EXPORT_SYMBOL vmlinux 0x27710f55	tcp_gro_complete
+EXPORT_SYMBOL vmlinux 0x27864d57	memparse
+EXPORT_SYMBOL vmlinux 0x278a7b10	sync_dirty_buffer
+EXPORT_SYMBOL vmlinux 0x27aeea2b	set_security_override
+EXPORT_SYMBOL vmlinux 0x27b35c51	tcp_sockets_allocated
+EXPORT_SYMBOL vmlinux 0x27bbf221	disable_irq_nosync
+EXPORT_SYMBOL vmlinux 0x27c33efe	csum_ipv6_magic
+EXPORT_SYMBOL vmlinux 0x27c61ece	qdisc_put_stab
+EXPORT_SYMBOL vmlinux 0x27d298ee	setup_arg_pages
+EXPORT_SYMBOL vmlinux 0x27d52d5c	blk_requeue_request
+EXPORT_SYMBOL vmlinux 0x2804ea8f	__free_pages
+EXPORT_SYMBOL vmlinux 0x28278703	jbd2_journal_unlock_updates
+EXPORT_SYMBOL vmlinux 0x28475687	shrink_dcache_parent
+EXPORT_SYMBOL vmlinux 0x28495076	misc_register
+EXPORT_SYMBOL vmlinux 0x2849f477	blk_queue_end_tag
+EXPORT_SYMBOL vmlinux 0x285135e6	acpi_evaluate_integer
+EXPORT_SYMBOL vmlinux 0x285ac517	strict_strtoll
+EXPORT_SYMBOL vmlinux 0x28760b98	security_inode_setsecctx
+EXPORT_SYMBOL vmlinux 0x2876a6d3	memcpy_toiovec
+EXPORT_SYMBOL vmlinux 0x28a2ed02	scsi_build_sense_buffer
+EXPORT_SYMBOL vmlinux 0x28b530df	bio_integrity_advance
+EXPORT_SYMBOL vmlinux 0x290ff5f2	mmc_release_host
+EXPORT_SYMBOL vmlinux 0x292093f4	native_rdmsr_safe_regs
+EXPORT_SYMBOL vmlinux 0x2931df20	unlock_buffer
+EXPORT_SYMBOL vmlinux 0x29537c9e	alloc_chrdev_region
+EXPORT_SYMBOL vmlinux 0x297305f6	vfs_dq_transfer
+EXPORT_SYMBOL vmlinux 0x2997f4ea	tty_chars_in_buffer
+EXPORT_SYMBOL vmlinux 0x29bd4c46	__cap_init_eff_set
+EXPORT_SYMBOL vmlinux 0x29d799ba	eth_header
+EXPORT_SYMBOL vmlinux 0x29efe000	pcim_iomap
+EXPORT_SYMBOL vmlinux 0x2a09737f	remove_proc_entry
+EXPORT_SYMBOL vmlinux 0x2a0a80f0	blk_run_queue
+EXPORT_SYMBOL vmlinux 0x2a1f81f0	generic_readlink
+EXPORT_SYMBOL vmlinux 0x2a25ca34	inet_frag_find
+EXPORT_SYMBOL vmlinux 0x2a2f9534	dma_async_memcpy_buf_to_buf
+EXPORT_SYMBOL vmlinux 0x2a303d4d	check_signature
+EXPORT_SYMBOL vmlinux 0x2a3720f6	__breadahead
+EXPORT_SYMBOL vmlinux 0x2a53fa0b	journal_check_used_features
+EXPORT_SYMBOL vmlinux 0x2a62bba9	get_sb_ns
+EXPORT_SYMBOL vmlinux 0x2a9df173	generic_setxattr
+EXPORT_SYMBOL vmlinux 0x2ae1c533	skb_split
+EXPORT_SYMBOL vmlinux 0x2ae232ad	vc_resize
+EXPORT_SYMBOL vmlinux 0x2ae2b523	mdiobus_unregister
+EXPORT_SYMBOL vmlinux 0x2aeb2800	mempool_create_node
+EXPORT_SYMBOL vmlinux 0x2b006994	netdev_class_remove_file
+EXPORT_SYMBOL vmlinux 0x2b0ba2b0	scsi_sense_desc_find
+EXPORT_SYMBOL vmlinux 0x2b2392a6	deactivate_locked_super
+EXPORT_SYMBOL vmlinux 0x2b321440	pci_find_bus
+EXPORT_SYMBOL vmlinux 0x2b34b998	fb_get_buffer_offset
+EXPORT_SYMBOL vmlinux 0x2b368814	swiotlb_dma_supported
+EXPORT_SYMBOL vmlinux 0x2b5cb285	__insert_inode_hash
+EXPORT_SYMBOL vmlinux 0x2b65d485	pfifo_qdisc_ops
+EXPORT_SYMBOL vmlinux 0x2b6cd28e	scsi_device_resume
+EXPORT_SYMBOL vmlinux 0x2b92e326	blk_plug_device
+EXPORT_SYMBOL vmlinux 0x2ba1d9e0	fb_set_var
+EXPORT_SYMBOL vmlinux 0x2ba707a8	sysctl_tcp_low_latency
+EXPORT_SYMBOL vmlinux 0x2bb55d6e	acpi_remove_notify_handler
+EXPORT_SYMBOL vmlinux 0x2bb6fde2	__kfifo_put
+EXPORT_SYMBOL vmlinux 0x2bfeb410	acpi_get_handle
+EXPORT_SYMBOL vmlinux 0x2c23f3b4	simple_rmdir
+EXPORT_SYMBOL vmlinux 0x2c5749e6	acpi_clear_gpe
+EXPORT_SYMBOL vmlinux 0x2c5fe1aa	scsi_is_host_device
+EXPORT_SYMBOL vmlinux 0x2c985869	names_cachep
+EXPORT_SYMBOL vmlinux 0x2ca1c669	__page_symlink
+EXPORT_SYMBOL vmlinux 0x2cbf5cb6	file_fsync
+EXPORT_SYMBOL vmlinux 0x2d43e70e	swiotlb_sync_single_for_device
+EXPORT_SYMBOL vmlinux 0x2d47717f	scsi_calculate_bounce_limit
+EXPORT_SYMBOL vmlinux 0x2d4adb2c	netif_napi_add
+EXPORT_SYMBOL vmlinux 0x2d4c9b46	dma_async_tx_descriptor_init
+EXPORT_SYMBOL vmlinux 0x2d5528c9	sg_copy_to_buffer
+EXPORT_SYMBOL vmlinux 0x2d89342a	scsi_show_sense_hdr
+EXPORT_SYMBOL vmlinux 0x2da28dce	serial8250_register_port
+EXPORT_SYMBOL vmlinux 0x2da8454b	skb_kill_datagram
+EXPORT_SYMBOL vmlinux 0x2dac0496	neigh_for_each
+EXPORT_SYMBOL vmlinux 0x2dbafbe3	pcibios_align_resource
+EXPORT_SYMBOL vmlinux 0x2dc01232	__inet6_hash
+EXPORT_SYMBOL vmlinux 0x2dd16564	arch_register_cpu
+EXPORT_SYMBOL vmlinux 0x2de0ba4b	bio_free
+EXPORT_SYMBOL vmlinux 0x2de89f56	__mark_inode_dirty
+EXPORT_SYMBOL vmlinux 0x2dedc4c2	acpi_format_exception
+EXPORT_SYMBOL vmlinux 0x2def7f76	rtc_cmos_write
+EXPORT_SYMBOL vmlinux 0x2dfd8797	qdisc_watchdog_schedule
+EXPORT_SYMBOL vmlinux 0x2e06111d	cpu_present_mask
+EXPORT_SYMBOL vmlinux 0x2e0d0a45	inet6_bind
+EXPORT_SYMBOL vmlinux 0x2e2ce9e0	sysctl_tcp_syncookies
+EXPORT_SYMBOL vmlinux 0x2e308acb	mmc_host_disable
+EXPORT_SYMBOL vmlinux 0x2e4a39f8	sysctl_udp_mem
+EXPORT_SYMBOL vmlinux 0x2e4f0cfd	sock_wmalloc
+EXPORT_SYMBOL vmlinux 0x2e599889	vfs_rmdir
+EXPORT_SYMBOL vmlinux 0x2e78088c	truncate_inode_pages_range
+EXPORT_SYMBOL vmlinux 0x2e97a729	idr_remove
+EXPORT_SYMBOL vmlinux 0x2e9d18d6	__nla_put_nohdr
+EXPORT_SYMBOL vmlinux 0x2e9ee68c	pneigh_enqueue
+EXPORT_SYMBOL vmlinux 0x2eaeceba	arp_send
+EXPORT_SYMBOL vmlinux 0x2eb9a0e8	_read_lock_irq
+EXPORT_SYMBOL vmlinux 0x2ed2b791	truncate_inode_pages
+EXPORT_SYMBOL vmlinux 0x2f02625c	tcf_hash_check
+EXPORT_SYMBOL vmlinux 0x2f10fa6d	pci_do_scan_bus
+EXPORT_SYMBOL vmlinux 0x2f1801cc	input_unfilter_device
+EXPORT_SYMBOL vmlinux 0x2f254985	tcp_initialize_rcv_mss
+EXPORT_SYMBOL vmlinux 0x2f368959	inet_add_protocol
+EXPORT_SYMBOL vmlinux 0x2f55c0f1	inet_dev_addr_type
+EXPORT_SYMBOL vmlinux 0x2f61773a	lro_vlan_hwaccel_receive_skb
+EXPORT_SYMBOL vmlinux 0x2f7bae72	sk_common_release
+EXPORT_SYMBOL vmlinux 0x2f7fbcc2	vfs_statfs
+EXPORT_SYMBOL vmlinux 0x2f9877ca	scsi_register
+EXPORT_SYMBOL vmlinux 0x2f9905c0	vfs_path_lookup
+EXPORT_SYMBOL vmlinux 0x2fa5a500	memcmp
+EXPORT_SYMBOL vmlinux 0x2fa94957	cfb_copyarea
+EXPORT_SYMBOL vmlinux 0x2fc52982	tty_get_baud_rate
+EXPORT_SYMBOL vmlinux 0x2fd1d7ad	__blk_end_request_all
+EXPORT_SYMBOL vmlinux 0x2ff063b5	acpi_get_name
+EXPORT_SYMBOL vmlinux 0x300b49bf	__dev_getfirstbyhwtype
+EXPORT_SYMBOL vmlinux 0x30123eb5	icmpv6_statistics
+EXPORT_SYMBOL vmlinux 0x3017ab92	pci_save_state
+EXPORT_SYMBOL vmlinux 0x30226ddf	agp_device_command
+EXPORT_SYMBOL vmlinux 0x306ea15f	security_file_permission
+EXPORT_SYMBOL vmlinux 0x307f7776	timecompare_offset
+EXPORT_SYMBOL vmlinux 0x309ea809	journal_wipe
+EXPORT_SYMBOL vmlinux 0x30bb765e	elv_rb_find
+EXPORT_SYMBOL vmlinux 0x30c5e4e5	load_nls_default
+EXPORT_SYMBOL vmlinux 0x30e6f25c	pci_select_bars
+EXPORT_SYMBOL vmlinux 0x30e74134	tty_termios_copy_hw
+EXPORT_SYMBOL vmlinux 0x30fa6542	generic_shutdown_super
+EXPORT_SYMBOL vmlinux 0x30ffe1f7	cancel_delayed_work_sync
+EXPORT_SYMBOL vmlinux 0x31121fe1	genl_unregister_mc_group
+EXPORT_SYMBOL vmlinux 0x31445261	fb_firmware_edid
+EXPORT_SYMBOL vmlinux 0x3145216f	pci_dev_present
+EXPORT_SYMBOL vmlinux 0x3147857d	default_red
+EXPORT_SYMBOL vmlinux 0x317fbf4d	bio_unmap_user
+EXPORT_SYMBOL vmlinux 0x3186c922	journal_get_create_access
+EXPORT_SYMBOL vmlinux 0x318e0d53	journal_dirty_data
+EXPORT_SYMBOL vmlinux 0x31941e95	scsi_cmd_ioctl
+EXPORT_SYMBOL vmlinux 0x3199b435	jbd2_journal_get_create_access
+EXPORT_SYMBOL vmlinux 0x319a7d71	cdrom_mode_select
+EXPORT_SYMBOL vmlinux 0x31ae5aa6	audit_log_format
+EXPORT_SYMBOL vmlinux 0x31afbb5a	lookup_bdev
+EXPORT_SYMBOL vmlinux 0x31b31f5c	csum_partial_copy_nocheck
+EXPORT_SYMBOL vmlinux 0x31de2e3a	neigh_compat_output
+EXPORT_SYMBOL vmlinux 0x31e76b57	recalibrate_cpu_khz
+EXPORT_SYMBOL vmlinux 0x31ebadcd	in_group_p
+EXPORT_SYMBOL vmlinux 0x31f12a0b	tty_pair_get_tty
+EXPORT_SYMBOL vmlinux 0x31f570ca	skb_pad
+EXPORT_SYMBOL vmlinux 0x320e567e	dquot_initialize
+EXPORT_SYMBOL vmlinux 0x3285cc48	param_set_uint
+EXPORT_SYMBOL vmlinux 0x328bd7ce	set_pages_array_wb
+EXPORT_SYMBOL vmlinux 0x32a5d712	scsi_device_put
+EXPORT_SYMBOL vmlinux 0x32f48972	bio_map_kern
+EXPORT_SYMBOL vmlinux 0x32fd3957	skb_free_datagram_locked
+EXPORT_SYMBOL vmlinux 0x33325024	dquot_destroy
+EXPORT_SYMBOL vmlinux 0x334d793b	___pskb_trim
+EXPORT_SYMBOL vmlinux 0x33723412	dma_pool_destroy
+EXPORT_SYMBOL vmlinux 0x338a5d85	blk_queue_dma_alignment
+EXPORT_SYMBOL vmlinux 0x338e0a94	journal_force_commit_nested
+EXPORT_SYMBOL vmlinux 0x339e93ab	thermal_zone_device_unregister
+EXPORT_SYMBOL vmlinux 0x33b84f74	copy_page
+EXPORT_SYMBOL vmlinux 0x33c0014f	register_sysctl_paths
+EXPORT_SYMBOL vmlinux 0x33ccdbc9	find_get_pages_contig
+EXPORT_SYMBOL vmlinux 0x33d92f9a	prepare_to_wait
+EXPORT_SYMBOL vmlinux 0x33e23104	eth_header_cache
+EXPORT_SYMBOL vmlinux 0x33f3890e	icmp_send
+EXPORT_SYMBOL vmlinux 0x342c6161	seq_read
+EXPORT_SYMBOL vmlinux 0x3457cb68	param_set_long
+EXPORT_SYMBOL vmlinux 0x345cb14f	skb_find_text
+EXPORT_SYMBOL vmlinux 0x348f1ebb	tty_kref_put
+EXPORT_SYMBOL vmlinux 0x349cba85	strchr
+EXPORT_SYMBOL vmlinux 0x34a3da5d	tcp_md5_hash_key
+EXPORT_SYMBOL vmlinux 0x34a68c6d	llc_build_and_send_ui_pkt
+EXPORT_SYMBOL vmlinux 0x34b068b4	dma_async_memcpy_buf_to_pg
+EXPORT_SYMBOL vmlinux 0x34b1a873	rfkill_unregister
+EXPORT_SYMBOL vmlinux 0x34c87e78	pci_request_regions
+EXPORT_SYMBOL vmlinux 0x3506ff98	block_write_full_page_endio
+EXPORT_SYMBOL vmlinux 0x351b9245	find_inode_number
+EXPORT_SYMBOL vmlinux 0x352acc59	vm_insert_page
+EXPORT_SYMBOL vmlinux 0x3534c07e	rtnetlink_put_metrics
+EXPORT_SYMBOL vmlinux 0x35370a79	scsi_setup_blk_pc_cmnd
+EXPORT_SYMBOL vmlinux 0x3540685f	tty_write_room
+EXPORT_SYMBOL vmlinux 0x35767e28	dma_sync_wait
+EXPORT_SYMBOL vmlinux 0x357a6a68	release_firmware
+EXPORT_SYMBOL vmlinux 0x3582ed17	vfs_stat
+EXPORT_SYMBOL vmlinux 0x35890fbe	unregister_qdisc
+EXPORT_SYMBOL vmlinux 0x359be1b0	inet_dgram_ops
+EXPORT_SYMBOL vmlinux 0x359ed64f	qdisc_watchdog_init
+EXPORT_SYMBOL vmlinux 0x35a617f8	ethtool_op_get_tx_csum
+EXPORT_SYMBOL vmlinux 0x35aca67b	disk_stack_limits
+EXPORT_SYMBOL vmlinux 0x35b0650f	vsnprintf
+EXPORT_SYMBOL vmlinux 0x35bb63d5	security_path_rename
+EXPORT_SYMBOL vmlinux 0x35c2ba9e	refrigerator
+EXPORT_SYMBOL vmlinux 0x360b1afe	probe_irq_mask
+EXPORT_SYMBOL vmlinux 0x36139a51	memcpy_fromiovec
+EXPORT_SYMBOL vmlinux 0x3622a25f	tcp_setsockopt
+EXPORT_SYMBOL vmlinux 0x364e987b	simple_set_mnt
+EXPORT_SYMBOL vmlinux 0x3656bf5a	lock_kernel
+EXPORT_SYMBOL vmlinux 0x36875389	__timecompare_update
+EXPORT_SYMBOL vmlinux 0x369ab685	tty_unregister_driver
+EXPORT_SYMBOL vmlinux 0x36cc5d18	blk_queue_bounce_limit
+EXPORT_SYMBOL vmlinux 0x36e2a902	write_inode_now
+EXPORT_SYMBOL vmlinux 0x36e6596a	posix_acl_permission
+EXPORT_SYMBOL vmlinux 0x36f254f1	pci_request_regions_exclusive
+EXPORT_SYMBOL vmlinux 0x36fd13d8	dev_close
+EXPORT_SYMBOL vmlinux 0x36ffcadb	scsi_ioctl
+EXPORT_SYMBOL vmlinux 0x3701a196	csum_partial_copy_to_user
+EXPORT_SYMBOL vmlinux 0x370961e2	kill_pid
+EXPORT_SYMBOL vmlinux 0x37237d01	vfs_quota_disable
+EXPORT_SYMBOL vmlinux 0x37267678	pci_set_dma_seg_boundary
+EXPORT_SYMBOL vmlinux 0x3726de7f	tty_pair_get_pty
+EXPORT_SYMBOL vmlinux 0x372baafb	get_super
+EXPORT_SYMBOL vmlinux 0x3744cf36	vmalloc_to_pfn
+EXPORT_SYMBOL vmlinux 0x374ffc99	pv_cpu_ops
+EXPORT_SYMBOL vmlinux 0x375107cc	inode_get_bytes
+EXPORT_SYMBOL vmlinux 0x375450f4	alloc_tty_driver
+EXPORT_SYMBOL vmlinux 0x375465a7	radix_tree_gang_lookup_tag_slot
+EXPORT_SYMBOL vmlinux 0x377c39e2	tcf_register_action
+EXPORT_SYMBOL vmlinux 0x37b17ce6	pcie_get_readrq
+EXPORT_SYMBOL vmlinux 0x37bdc039	mark_info_dirty
+EXPORT_SYMBOL vmlinux 0x37befc70	jiffies_to_msecs
+EXPORT_SYMBOL vmlinux 0x37cbfe63	check_disk_size_change
+EXPORT_SYMBOL vmlinux 0x37db8f19	dmi_get_date
+EXPORT_SYMBOL vmlinux 0x37fd2fa7	genl_register_ops
+EXPORT_SYMBOL vmlinux 0x38119ddc	seq_release
+EXPORT_SYMBOL vmlinux 0x381c965f	__netif_schedule
+EXPORT_SYMBOL vmlinux 0x3824b191	jbd2_journal_file_inode
+EXPORT_SYMBOL vmlinux 0x383eb3f8	dm_table_event
+EXPORT_SYMBOL vmlinux 0x3842f1c4	pci_scan_bridge
+EXPORT_SYMBOL vmlinux 0x384de3c1	pcim_iounmap_regions
+EXPORT_SYMBOL vmlinux 0x3859349b	agp_generic_alloc_page
+EXPORT_SYMBOL vmlinux 0x387b2072	block_read_full_page
+EXPORT_SYMBOL vmlinux 0x388f9128	xfrm_state_walk_done
+EXPORT_SYMBOL vmlinux 0x38aacb00	bd_set_size
+EXPORT_SYMBOL vmlinux 0x38b92846	llc_remove_pack
+EXPORT_SYMBOL vmlinux 0x38cab31c	init_timer_deferrable_key
+EXPORT_SYMBOL vmlinux 0x38f33bed	dump_fpu
+EXPORT_SYMBOL vmlinux 0x38f86aab	put_page
+EXPORT_SYMBOL vmlinux 0x390b2713	xfrm_prepare_input
+EXPORT_SYMBOL vmlinux 0x3927cca9	ip_defrag
+EXPORT_SYMBOL vmlinux 0x394d3a06	serio_unregister_driver
+EXPORT_SYMBOL vmlinux 0x39808c97	vfs_getattr
+EXPORT_SYMBOL vmlinux 0x3980aac1	unregister_reboot_notifier
+EXPORT_SYMBOL vmlinux 0x39e0b4ad	cpufreq_global_kobject
+EXPORT_SYMBOL vmlinux 0x39f9b80f	file_permission
+EXPORT_SYMBOL vmlinux 0x3a066d96	thermal_zone_device_register
+EXPORT_SYMBOL vmlinux 0x3a2204c6	security_netlink_recv
+EXPORT_SYMBOL vmlinux 0x3a2fc53e	arp_create
+EXPORT_SYMBOL vmlinux 0x3a347929	scsi_release_buffers
+EXPORT_SYMBOL vmlinux 0x3a39f0f6	__xfrm_decode_session
+EXPORT_SYMBOL vmlinux 0x3a541329	uart_remove_one_port
+EXPORT_SYMBOL vmlinux 0x3a691b88	generic_splice_sendpage
+EXPORT_SYMBOL vmlinux 0x3a71bc4e	kernel_sendmsg
+EXPORT_SYMBOL vmlinux 0x3a934e48	dev_set_drvdata
+EXPORT_SYMBOL vmlinux 0x3a93b91d	tty_port_hangup
+EXPORT_SYMBOL vmlinux 0x3a9b6fb9	blk_unregister_region
+EXPORT_SYMBOL vmlinux 0x3aa1dbcf	_spin_unlock_bh
+EXPORT_SYMBOL vmlinux 0x3ae831b6	kref_init
+EXPORT_SYMBOL vmlinux 0x3b0d63c8	agp_find_bridge
+EXPORT_SYMBOL vmlinux 0x3b27f527	slow_work_enqueue
+EXPORT_SYMBOL vmlinux 0x3b3016d3	cpufreq_unregister_notifier
+EXPORT_SYMBOL vmlinux 0x3b745a37	slow_work_register_user
+EXPORT_SYMBOL vmlinux 0x3b761450	__nla_reserve_nohdr
+EXPORT_SYMBOL vmlinux 0x3b80b9b4	generic_file_mmap
+EXPORT_SYMBOL vmlinux 0x3b94f41d	key_instantiate_and_link
+EXPORT_SYMBOL vmlinux 0x3bb3aca3	udp_ioctl
+EXPORT_SYMBOL vmlinux 0x3bb5556c	mb_cache_entry_find_next
+EXPORT_SYMBOL vmlinux 0x3bc89f66	path_put
+EXPORT_SYMBOL vmlinux 0x3bd1b1f6	msecs_to_jiffies
+EXPORT_SYMBOL vmlinux 0x3bf79888	dm_io_client_resize
+EXPORT_SYMBOL vmlinux 0x3bf9118b	generic_listxattr
+EXPORT_SYMBOL vmlinux 0x3bfa14eb	tcp_v4_md5_do_add
+EXPORT_SYMBOL vmlinux 0x3c2c5af5	sprintf
+EXPORT_SYMBOL vmlinux 0x3c57e352	journal_unlock_updates
+EXPORT_SYMBOL vmlinux 0x3c67b4c6	unregister_netdevice
+EXPORT_SYMBOL vmlinux 0x3c7227bf	complete_all
+EXPORT_SYMBOL vmlinux 0x3c87116b	scsi_report_bus_reset
+EXPORT_SYMBOL vmlinux 0x3c8cb552	cdrom_open
+EXPORT_SYMBOL vmlinux 0x3c9377bd	dev_addr_del
+EXPORT_SYMBOL vmlinux 0x3c9d1211	string_get_size
+EXPORT_SYMBOL vmlinux 0x3cc0a3bb	xfrm_spd_getinfo
+EXPORT_SYMBOL vmlinux 0x3ce4ca6f	disable_irq
+EXPORT_SYMBOL vmlinux 0x3d01485a	sock_alloc_send_pskb
+EXPORT_SYMBOL vmlinux 0x3d13668a	scsi_device_lookup_by_target
+EXPORT_SYMBOL vmlinux 0x3d23e3a0	register_cdrom
+EXPORT_SYMBOL vmlinux 0x3d3b780b	i2c_smbus_read_block_data
+EXPORT_SYMBOL vmlinux 0x3d4031ca	__devm_release_region
+EXPORT_SYMBOL vmlinux 0x3d611620	dev_kfree_skb_any
+EXPORT_SYMBOL vmlinux 0x3d68bd4b	flow_cache_genid
+EXPORT_SYMBOL vmlinux 0x3d6f47c3	security_inode_getsecctx
+EXPORT_SYMBOL vmlinux 0x3d7c1ed7	msrs_alloc
+EXPORT_SYMBOL vmlinux 0x3d8728bb	memcpy_toiovecend
+EXPORT_SYMBOL vmlinux 0x3d9b438b	pci_get_class
+EXPORT_SYMBOL vmlinux 0x3d9ee9f0	clear_page
+EXPORT_SYMBOL vmlinux 0x3da171f9	pci_mem_start
+EXPORT_SYMBOL vmlinux 0x3da3436d	register_netdevice
+EXPORT_SYMBOL vmlinux 0x3da5eb6d	kfifo_alloc
+EXPORT_SYMBOL vmlinux 0x3db2e258	radix_tree_gang_lookup
+EXPORT_SYMBOL vmlinux 0x3dbba24a	inode_init_always
+EXPORT_SYMBOL vmlinux 0x3e1f073d	wait_for_completion_timeout
+EXPORT_SYMBOL vmlinux 0x3e219de6	try_wait_for_completion
+EXPORT_SYMBOL vmlinux 0x3e2401fe	acpi_lock_ac_dir
+EXPORT_SYMBOL vmlinux 0x3e2452f2	flush_signals
+EXPORT_SYMBOL vmlinux 0x3e2ae3a8	acpi_release_global_lock
+EXPORT_SYMBOL vmlinux 0x3e348ae2	skb_queue_head
+EXPORT_SYMBOL vmlinux 0x3e383385	nf_hooks
+EXPORT_SYMBOL vmlinux 0x3e3abf82	bitmap_startwrite
+EXPORT_SYMBOL vmlinux 0x3e45e9ff	register_inetaddr_notifier
+EXPORT_SYMBOL vmlinux 0x3e899c9d	blk_limits_io_min
+EXPORT_SYMBOL vmlinux 0x3eab3156	journal_set_features
+EXPORT_SYMBOL vmlinux 0x3ec1d14e	tcf_hash_destroy
+EXPORT_SYMBOL vmlinux 0x3ed63055	zlib_inflateReset
+EXPORT_SYMBOL vmlinux 0x3ef801f4	km_policy_notify
+EXPORT_SYMBOL vmlinux 0x3efd3426	dm_table_put
+EXPORT_SYMBOL vmlinux 0x3f0546a8	ioread32_rep
+EXPORT_SYMBOL vmlinux 0x3f0b911e	sock_create
+EXPORT_SYMBOL vmlinux 0x3f1899f1	up
+EXPORT_SYMBOL vmlinux 0x3f3fcfba	pci_release_selected_regions
+EXPORT_SYMBOL vmlinux 0x3f4547a7	put_unused_fd
+EXPORT_SYMBOL vmlinux 0x3f5fe308	dquot_acquire
+EXPORT_SYMBOL vmlinux 0x3f659ea3	read_cache_page_async
+EXPORT_SYMBOL vmlinux 0x3f6b7809	dev_set_mac_address
+EXPORT_SYMBOL vmlinux 0x3f877bd6	alloc_disk_node
+EXPORT_SYMBOL vmlinux 0x3f8b4b53	netlink_rcv_skb
+EXPORT_SYMBOL vmlinux 0x3f9bd5fe	__register_binfmt
+EXPORT_SYMBOL vmlinux 0x3fa1e9ec	vfs_readlink
+EXPORT_SYMBOL vmlinux 0x3fa913da	strspn
+EXPORT_SYMBOL vmlinux 0x3fbeb8e6	__secpath_destroy
+EXPORT_SYMBOL vmlinux 0x3fcf826d	bio_integrity_split
+EXPORT_SYMBOL vmlinux 0x3fe0e66c	netif_rx_ni
+EXPORT_SYMBOL vmlinux 0x3fec048f	sg_next
+EXPORT_SYMBOL vmlinux 0x3ff62317	local_bh_disable
+EXPORT_SYMBOL vmlinux 0x40303005	phy_start_interrupts
+EXPORT_SYMBOL vmlinux 0x40576574	open_exec
+EXPORT_SYMBOL vmlinux 0x405c1144	get_seconds
+EXPORT_SYMBOL vmlinux 0x4084f5eb	ethtool_op_set_flags
+EXPORT_SYMBOL vmlinux 0x4097fa45	acpi_read_bit_register
+EXPORT_SYMBOL vmlinux 0x409873e3	tty_termios_baud_rate
+EXPORT_SYMBOL vmlinux 0x40a27c37	scsi_dev_info_remove_list
+EXPORT_SYMBOL vmlinux 0x40a992a3	unregister_console
+EXPORT_SYMBOL vmlinux 0x40c89d46	acpi_get_table_by_index
+EXPORT_SYMBOL vmlinux 0x40d13c06	call_usermodehelper_setkeys
+EXPORT_SYMBOL vmlinux 0x4101bbde	param_set_copystring
+EXPORT_SYMBOL vmlinux 0x4108e69a	fb_match_mode
+EXPORT_SYMBOL vmlinux 0x41166725	inet_frags_init_net
+EXPORT_SYMBOL vmlinux 0x41286647	set_pages_x
+EXPORT_SYMBOL vmlinux 0x41344088	param_get_charp
+EXPORT_SYMBOL vmlinux 0x41446b33	do_munmap
+EXPORT_SYMBOL vmlinux 0x41482d8b	strndup_user
+EXPORT_SYMBOL vmlinux 0x414b09c5	alloc_fddidev
+EXPORT_SYMBOL vmlinux 0x415ebde5	page_follow_link_light
+EXPORT_SYMBOL vmlinux 0x416983d9	netdev_fix_features
+EXPORT_SYMBOL vmlinux 0x4188d439	neigh_rand_reach_time
+EXPORT_SYMBOL vmlinux 0x4197ced1	netlink_ack
+EXPORT_SYMBOL vmlinux 0x41a9c68d	_spin_trylock_bh
+EXPORT_SYMBOL vmlinux 0x41fdf1e7	ip_mc_dec_group
+EXPORT_SYMBOL vmlinux 0x420df9e7	netif_carrier_off
+EXPORT_SYMBOL vmlinux 0x4211c3c1	zlib_inflateInit2
+EXPORT_SYMBOL vmlinux 0x42224298	sscanf
+EXPORT_SYMBOL vmlinux 0x422ff42c	sg_miter_start
+EXPORT_SYMBOL vmlinux 0x4232ef57	dev_addr_add_multiple
+EXPORT_SYMBOL vmlinux 0x42595e58	vgacon_text_force
+EXPORT_SYMBOL vmlinux 0x4259dd5e	ethtool_op_set_tso
+EXPORT_SYMBOL vmlinux 0x426ae686	__set_page_dirty_buffers
+EXPORT_SYMBOL vmlinux 0x4273d97b	posix_test_lock
+EXPORT_SYMBOL vmlinux 0x427ef691	sk_alloc
+EXPORT_SYMBOL vmlinux 0x428f1877	flush_old_exec
+EXPORT_SYMBOL vmlinux 0x4294beb0	blk_make_request
+EXPORT_SYMBOL vmlinux 0x42981799	get_sb_pseudo
+EXPORT_SYMBOL vmlinux 0x42a4bdf2	in_egroup_p
+EXPORT_SYMBOL vmlinux 0x42aa2e12	redraw_screen
+EXPORT_SYMBOL vmlinux 0x42acbf72	posix_acl_from_xattr
+EXPORT_SYMBOL vmlinux 0x42be8e30	generic_file_splice_read
+EXPORT_SYMBOL vmlinux 0x42c8de35	ioremap_nocache
+EXPORT_SYMBOL vmlinux 0x42d0ed3a	nf_reinject
+EXPORT_SYMBOL vmlinux 0x42d71be2	kobject_set_name
+EXPORT_SYMBOL vmlinux 0x42d95895	kill_fasync
+EXPORT_SYMBOL vmlinux 0x42e0c277	scsi_get_host_dev
+EXPORT_SYMBOL vmlinux 0x42e4c8eb	scsi_is_target_device
+EXPORT_SYMBOL vmlinux 0x42f89056	skb_recv_datagram
+EXPORT_SYMBOL vmlinux 0x4302d0eb	free_pages
+EXPORT_SYMBOL vmlinux 0x431310d5	__register_chrdev
+EXPORT_SYMBOL vmlinux 0x43262ada	dev_getfirstbyhwtype
+EXPORT_SYMBOL vmlinux 0x4327f0d5	memset_io
+EXPORT_SYMBOL vmlinux 0x4333eadb	param_set_short
+EXPORT_SYMBOL vmlinux 0x43385ad9	acpi_pci_unregister_driver
+EXPORT_SYMBOL vmlinux 0x434fa55c	release_console_sem
+EXPORT_SYMBOL vmlinux 0x435b566d	_spin_unlock
+EXPORT_SYMBOL vmlinux 0x436c2179	iowrite32
+EXPORT_SYMBOL vmlinux 0x43827980	mmc_align_data_size
+EXPORT_SYMBOL vmlinux 0x439d0346	__seq_open_private
+EXPORT_SYMBOL vmlinux 0x439f0a09	sk_receive_skb
+EXPORT_SYMBOL vmlinux 0x43ab66c3	param_array_get
+EXPORT_SYMBOL vmlinux 0x43b0c9c3	preempt_schedule
+EXPORT_SYMBOL vmlinux 0x43b22ac1	get_phy_device
+EXPORT_SYMBOL vmlinux 0x43b877d8	xfrm_policy_unregister_afinfo
+EXPORT_SYMBOL vmlinux 0x43c58227	pci_restore_state
+EXPORT_SYMBOL vmlinux 0x43ce22d2	bio_integrity_set_tag
+EXPORT_SYMBOL vmlinux 0x43eb904e	pnp_get_resource
+EXPORT_SYMBOL vmlinux 0x43ec913a	put_cmsg
+EXPORT_SYMBOL vmlinux 0x4411b530	inet_dgram_connect
+EXPORT_SYMBOL vmlinux 0x4414b83f	ethtool_op_get_rx_csum
+EXPORT_SYMBOL vmlinux 0x44161c19	unregister_shrinker
+EXPORT_SYMBOL vmlinux 0x442ab7b1	__skb_warn_lro_forwarding
+EXPORT_SYMBOL vmlinux 0x4435b030	agp_backend_release
+EXPORT_SYMBOL vmlinux 0x444779c4	nla_find
+EXPORT_SYMBOL vmlinux 0x4469cc40	inet_sk_rebuild_header
+EXPORT_SYMBOL vmlinux 0x446e49a0	journal_force_commit
+EXPORT_SYMBOL vmlinux 0x4492f454	xfrm_policy_byid
+EXPORT_SYMBOL vmlinux 0x449739f5	thermal_cooling_device_register
+EXPORT_SYMBOL vmlinux 0x44aaf30f	tsc_khz
+EXPORT_SYMBOL vmlinux 0x44b1d0a9	scsi_set_medium_removal
+EXPORT_SYMBOL vmlinux 0x44b911c3	rb_replace_node
+EXPORT_SYMBOL vmlinux 0x44d560e3	init_level4_pgt
+EXPORT_SYMBOL vmlinux 0x44e2a393	pid_task
+EXPORT_SYMBOL vmlinux 0x44e9a829	match_token
+EXPORT_SYMBOL vmlinux 0x44fe8d48	blk_rq_count_integrity_sg
+EXPORT_SYMBOL vmlinux 0x452f2279	tty_register_ldisc
+EXPORT_SYMBOL vmlinux 0x4537067e	skb_put
+EXPORT_SYMBOL vmlinux 0x453c8403	pci_msi_enabled
+EXPORT_SYMBOL vmlinux 0x45450063	mod_timer
+EXPORT_SYMBOL vmlinux 0x4550ba8a	register_cpu_notifier
+EXPORT_SYMBOL vmlinux 0x455f4f99	pci_scan_slot
+EXPORT_SYMBOL vmlinux 0x45704798	print_hex_dump_bytes
+EXPORT_SYMBOL vmlinux 0x4575315d	utf8s_to_utf16s
+EXPORT_SYMBOL vmlinux 0x458a8e3f	devm_ioremap
+EXPORT_SYMBOL vmlinux 0x459040f4	sock_no_accept
+EXPORT_SYMBOL vmlinux 0x45947727	param_array_set
+EXPORT_SYMBOL vmlinux 0x45ab9e4a	skb_prepare_seq_read
+EXPORT_SYMBOL vmlinux 0x45ad7443	kmem_cache_free
+EXPORT_SYMBOL vmlinux 0x45d11c43	down_interruptible
+EXPORT_SYMBOL vmlinux 0x45d55543	down_write
+EXPORT_SYMBOL vmlinux 0x46085e4f	add_timer
+EXPORT_SYMBOL vmlinux 0x4659b3ef	ps2_sendbyte
+EXPORT_SYMBOL vmlinux 0x465a8156	scsi_adjust_queue_depth
+EXPORT_SYMBOL vmlinux 0x4663f862	__dev_get_by_index
+EXPORT_SYMBOL vmlinux 0x4664daf6	filp_close
+EXPORT_SYMBOL vmlinux 0x466c14a7	__delay
+EXPORT_SYMBOL vmlinux 0x468cc6b1	kernel_read
+EXPORT_SYMBOL vmlinux 0x46b5dba9	input_unregister_handler
+EXPORT_SYMBOL vmlinux 0x46bb60b8	open_bdev_exclusive
+EXPORT_SYMBOL vmlinux 0x46c47fb6	__node_distance
+EXPORT_SYMBOL vmlinux 0x46ede823	ipv6_getsockopt
+EXPORT_SYMBOL vmlinux 0x46f0c15a	generic_file_readonly_mmap
+EXPORT_SYMBOL vmlinux 0x471b65f1	md_done_sync
+EXPORT_SYMBOL vmlinux 0x4749be77	devm_free_irq
+EXPORT_SYMBOL vmlinux 0x475100c2	inet_get_local_port_range
+EXPORT_SYMBOL vmlinux 0x475f010b	acpi_purge_cached_objects
+EXPORT_SYMBOL vmlinux 0x4760b653	xfrm_state_flush
+EXPORT_SYMBOL vmlinux 0x477df28a	jbd2_journal_abort
+EXPORT_SYMBOL vmlinux 0x4785dea0	pcix_get_mmrbc
+EXPORT_SYMBOL vmlinux 0x478d10b2	ht_destroy_irq
+EXPORT_SYMBOL vmlinux 0x479c3c86	find_next_zero_bit
+EXPORT_SYMBOL vmlinux 0x47cb2f10	clear_inode
+EXPORT_SYMBOL vmlinux 0x47e12960	dmam_free_noncoherent
+EXPORT_SYMBOL vmlinux 0x47e8ea9f	sk_stream_error
+EXPORT_SYMBOL vmlinux 0x4813aaa6	vfs_mknod
+EXPORT_SYMBOL vmlinux 0x48193639	acpi_lid_open
+EXPORT_SYMBOL vmlinux 0x481a4709	default_llseek
+EXPORT_SYMBOL vmlinux 0x481cb9ab	acpi_enter_sleep_state_prep
+EXPORT_SYMBOL vmlinux 0x4856b288	dm_table_get_mode
+EXPORT_SYMBOL vmlinux 0x4859b8bb	rtc_year_days
+EXPORT_SYMBOL vmlinux 0x486b6407	hweight64
+EXPORT_SYMBOL vmlinux 0x488f412a	jbd2_journal_stop
+EXPORT_SYMBOL vmlinux 0x489ec0b4	scsi_prep_fn
+EXPORT_SYMBOL vmlinux 0x48b751e6	pci_set_consistent_dma_mask
+EXPORT_SYMBOL vmlinux 0x48d688e9	setup_new_exec
+EXPORT_SYMBOL vmlinux 0x48d93400	alloc_pci_dev
+EXPORT_SYMBOL vmlinux 0x48d934f7	con_set_default_unimap
+EXPORT_SYMBOL vmlinux 0x4913ab7f	simple_dir_operations
+EXPORT_SYMBOL vmlinux 0x49439411	genl_unregister_family
+EXPORT_SYMBOL vmlinux 0x494b277b	nla_put
+EXPORT_SYMBOL vmlinux 0x494e3393	vm_get_page_prot
+EXPORT_SYMBOL vmlinux 0x49603fb8	security_sb_copy_data
+EXPORT_SYMBOL vmlinux 0x49da9a9a	_read_unlock_bh
+EXPORT_SYMBOL vmlinux 0x49db4787	scsi_scan_target
+EXPORT_SYMBOL vmlinux 0x49e182c0	param_get_string
+EXPORT_SYMBOL vmlinux 0x49e2d2e8	tcp_rcv_state_process
+EXPORT_SYMBOL vmlinux 0x4a358252	__bitmap_subset
+EXPORT_SYMBOL vmlinux 0x4a3d9696	wait_on_sync_kiocb
+EXPORT_SYMBOL vmlinux 0x4a415e1d	eth_rebuild_header
+EXPORT_SYMBOL vmlinux 0x4a44fadb	journal_get_undo_access
+EXPORT_SYMBOL vmlinux 0x4a6b5675	skb_dequeue_tail
+EXPORT_SYMBOL vmlinux 0x4aa3af9b	serio_interrupt
+EXPORT_SYMBOL vmlinux 0x4acd93d3	release_resource
+EXPORT_SYMBOL vmlinux 0x4ad68c44	compat_ipv6_getsockopt
+EXPORT_SYMBOL vmlinux 0x4adbf5f0	xfrm_register_km
+EXPORT_SYMBOL vmlinux 0x4ae2cf78	bfifo_qdisc_ops
+EXPORT_SYMBOL vmlinux 0x4afe9a77	scsi_partsize
+EXPORT_SYMBOL vmlinux 0x4afebbfc	task_nice
+EXPORT_SYMBOL vmlinux 0x4aff3068	tty_insert_flip_string
+EXPORT_SYMBOL vmlinux 0x4b07e779	_spin_unlock_irqrestore
+EXPORT_SYMBOL vmlinux 0x4b085dbf	agp3_generic_configure
+EXPORT_SYMBOL vmlinux 0x4b2e66ad	skb_tx_hash
+EXPORT_SYMBOL vmlinux 0x4b37574f	journal_flush
+EXPORT_SYMBOL vmlinux 0x4b8d21ee	tcf_hash_lookup
+EXPORT_SYMBOL vmlinux 0x4ba5baa0	load_gs_index
+EXPORT_SYMBOL vmlinux 0x4bb56d0c	pci_set_master
+EXPORT_SYMBOL vmlinux 0x4bbc3e5f	pm_flags
+EXPORT_SYMBOL vmlinux 0x4bdf028e	idr_find
+EXPORT_SYMBOL vmlinux 0x4bfa779a	d_obtain_alias
+EXPORT_SYMBOL vmlinux 0x4bfc38f9	xfrm_input
+EXPORT_SYMBOL vmlinux 0x4c1182cb	bitmap_scnprintf
+EXPORT_SYMBOL vmlinux 0x4c1b965c	gen_replace_estimator
+EXPORT_SYMBOL vmlinux 0x4c32b628	udp_lib_unhash
+EXPORT_SYMBOL vmlinux 0x4c4c956e	nla_memcmp
+EXPORT_SYMBOL vmlinux 0x4c5a6774	acpi_bus_add
+EXPORT_SYMBOL vmlinux 0x4c6223ea	pci_bus_read_config_word
+EXPORT_SYMBOL vmlinux 0x4c6ff041	add_preempt_count
+EXPORT_SYMBOL vmlinux 0x4c7c8889	tcf_action_dump_1
+EXPORT_SYMBOL vmlinux 0x4c86c2bd	scsi_host_lookup
+EXPORT_SYMBOL vmlinux 0x4cbbd171	__bitmap_weight
+EXPORT_SYMBOL vmlinux 0x4cc1b29a	dev_mc_unsync
+EXPORT_SYMBOL vmlinux 0x4cec48eb	xfrm_state_unregister_afinfo
+EXPORT_SYMBOL vmlinux 0x4d07bdfd	tty_port_tty_set
+EXPORT_SYMBOL vmlinux 0x4d15ee74	bdi_register
+EXPORT_SYMBOL vmlinux 0x4d79000e	skb_queue_purge
+EXPORT_SYMBOL vmlinux 0x4d7f6065	tcp_v4_send_check
+EXPORT_SYMBOL vmlinux 0x4d8e1a60	ps2_init
+EXPORT_SYMBOL vmlinux 0x4d958d78	__serio_register_port
+EXPORT_SYMBOL vmlinux 0x4dab273e	rtnl_set_sk_err
+EXPORT_SYMBOL vmlinux 0x4db35772	mark_page_accessed
+EXPORT_SYMBOL vmlinux 0x4dbf3a42	xfrm6_find_1stfragopt
+EXPORT_SYMBOL vmlinux 0x4dc45be9	nf_log_unbind_pf
+EXPORT_SYMBOL vmlinux 0x4dda726b	match_strlcpy
+EXPORT_SYMBOL vmlinux 0x4deaff18	llc_mac_hdr_init
+EXPORT_SYMBOL vmlinux 0x4df119fa	__bitmap_parse
+EXPORT_SYMBOL vmlinux 0x4e069249	security_tun_dev_post_create
+EXPORT_SYMBOL vmlinux 0x4e100f60	_spin_unlock_irq
+EXPORT_SYMBOL vmlinux 0x4e3567f7	match_int
+EXPORT_SYMBOL vmlinux 0x4e52ab00	blk_queue_make_request
+EXPORT_SYMBOL vmlinux 0x4e652525	blk_rq_map_kern
+EXPORT_SYMBOL vmlinux 0x4e6e8ea7	fg_console
+EXPORT_SYMBOL vmlinux 0x4e79a42b	blk_queue_physical_block_size
+EXPORT_SYMBOL vmlinux 0x4ec7b977	scsi_add_host_with_dma
+EXPORT_SYMBOL vmlinux 0x4edd72f7	block_all_signals
+EXPORT_SYMBOL vmlinux 0x4edf8824	otg_get_transceiver
+EXPORT_SYMBOL vmlinux 0x4ee8263d	register_quota_format
+EXPORT_SYMBOL vmlinux 0x4f095458	mntput_no_expire
+EXPORT_SYMBOL vmlinux 0x4f1cd128	security_tun_dev_create
+EXPORT_SYMBOL vmlinux 0x4f379b69	pcie_set_readrq
+EXPORT_SYMBOL vmlinux 0x4f4446b3	qdisc_create_dflt
+EXPORT_SYMBOL vmlinux 0x4f476e96	init_cdrom_command
+EXPORT_SYMBOL vmlinux 0x4f5438c1	idle_halt
+EXPORT_SYMBOL vmlinux 0x4f668780	inet6_ioctl
+EXPORT_SYMBOL vmlinux 0x4f67091e	send_sig_info
+EXPORT_SYMBOL vmlinux 0x4f783f30	acpi_read
+EXPORT_SYMBOL vmlinux 0x4fd3a29f	tty_unregister_device
+EXPORT_SYMBOL vmlinux 0x4fdee897	i8042_command
+EXPORT_SYMBOL vmlinux 0x4fedf2eb	tty_driver_kref_put
+EXPORT_SYMBOL vmlinux 0x5007d144	scsi_nonblockable_ioctl
+EXPORT_SYMBOL vmlinux 0x501e36f6	dquot_mark_dquot_dirty
+EXPORT_SYMBOL vmlinux 0x50211ee3	tcp_free_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x502bd3b0	netpoll_setup
+EXPORT_SYMBOL vmlinux 0x5030350a	blk_queue_segment_boundary
+EXPORT_SYMBOL vmlinux 0x50405b06	otg_set_transceiver
+EXPORT_SYMBOL vmlinux 0x505c6c31	splice_direct_to_actor
+EXPORT_SYMBOL vmlinux 0x505d70ff	sock_no_shutdown
+EXPORT_SYMBOL vmlinux 0x506746b6	getrawmonotonic
+EXPORT_SYMBOL vmlinux 0x50713101	kthread_create
+EXPORT_SYMBOL vmlinux 0x507efb6b	kill_litter_super
+EXPORT_SYMBOL vmlinux 0x50b5cb2d	idr_get_new_above
+EXPORT_SYMBOL vmlinux 0x50bf49df	vfs_quota_sync
+EXPORT_SYMBOL vmlinux 0x50bfd97b	i2c_verify_client
+EXPORT_SYMBOL vmlinux 0x50c467b8	scsi_eh_prep_cmnd
+EXPORT_SYMBOL vmlinux 0x50d56018	posix_acl_equiv_mode
+EXPORT_SYMBOL vmlinux 0x50dc4e9c	pci_assign_resource
+EXPORT_SYMBOL vmlinux 0x50f27781	vfs_set_dqinfo
+EXPORT_SYMBOL vmlinux 0x5118c382	secure_dccp_sequence_number
+EXPORT_SYMBOL vmlinux 0x51523189	vfs_write
+EXPORT_SYMBOL vmlinux 0x5187ac4b	xen_store_evtchn
+EXPORT_SYMBOL vmlinux 0x51af954e	security_path_link
+EXPORT_SYMBOL vmlinux 0x51be8827	tc_classify_compat
+EXPORT_SYMBOL vmlinux 0x51d12d4e	acpi_pci_disabled
+EXPORT_SYMBOL vmlinux 0x51dce73b	xfrm_state_walk_init
+EXPORT_SYMBOL vmlinux 0x51e40e68	tcf_exts_validate
+EXPORT_SYMBOL vmlinux 0x51fc9993	lease_get_mtime
+EXPORT_SYMBOL vmlinux 0x52026cdf	security_sb_parse_opts_str
+EXPORT_SYMBOL vmlinux 0x52095e19	acpi_get_data
+EXPORT_SYMBOL vmlinux 0x521cc32a	tcp_v4_syn_recv_sock
+EXPORT_SYMBOL vmlinux 0x5252f304	__memcpy_toio
+EXPORT_SYMBOL vmlinux 0x52760ca9	getnstimeofday
+EXPORT_SYMBOL vmlinux 0x52a58c24	ifla_policy
+EXPORT_SYMBOL vmlinux 0x52d46635	devcgroup_inode_permission
+EXPORT_SYMBOL vmlinux 0x52d7b2fd	llc_sap_list
+EXPORT_SYMBOL vmlinux 0x52df2e98	security_path_unlink
+EXPORT_SYMBOL vmlinux 0x52e1ba21	cdev_del
+EXPORT_SYMBOL vmlinux 0x52ebb126	param_get_ushort
+EXPORT_SYMBOL vmlinux 0x530b1e98	pm_suspend
+EXPORT_SYMBOL vmlinux 0x531b604e	__virt_addr_valid
+EXPORT_SYMBOL vmlinux 0x53326531	mempool_alloc_pages
+EXPORT_SYMBOL vmlinux 0x53583f05	do_truncate
+EXPORT_SYMBOL vmlinux 0x5364ce10	kblockd_schedule_work
+EXPORT_SYMBOL vmlinux 0x536ac0a0	generic_file_aio_write
+EXPORT_SYMBOL vmlinux 0x538383c0	unregister_inet6addr_notifier
+EXPORT_SYMBOL vmlinux 0x5389992b	pci_enable_bridges
+EXPORT_SYMBOL vmlinux 0x53942098	poll_freewait
+EXPORT_SYMBOL vmlinux 0x53a5962c	scsi_host_put
+EXPORT_SYMBOL vmlinux 0x53af7761	__bforget
+EXPORT_SYMBOL vmlinux 0x53bcc899	bdget_disk
+EXPORT_SYMBOL vmlinux 0x53c0767c	sk_chk_filter
+EXPORT_SYMBOL vmlinux 0x53c8a218	jbd2_journal_clear_err
+EXPORT_SYMBOL vmlinux 0x53e3bd90	__page_cache_alloc
+EXPORT_SYMBOL vmlinux 0x53f43186	sk_release_kernel
+EXPORT_SYMBOL vmlinux 0x54290dc9	nla_validate
+EXPORT_SYMBOL vmlinux 0x5460aa83	log_start_commit
+EXPORT_SYMBOL vmlinux 0x54782a2c	mpage_readpage
+EXPORT_SYMBOL vmlinux 0x54790ab3	i2c_register_driver
+EXPORT_SYMBOL vmlinux 0x54c49771	agp_bind_memory
+EXPORT_SYMBOL vmlinux 0x54c93718	napi_complete
+EXPORT_SYMBOL vmlinux 0x54cb57c6	remap_vmalloc_range
+EXPORT_SYMBOL vmlinux 0x54d0d132	nobh_write_begin
+EXPORT_SYMBOL vmlinux 0x54e6fcdd	net_enable_timestamp
+EXPORT_SYMBOL vmlinux 0x54e8030e	tcp4_gro_receive
+EXPORT_SYMBOL vmlinux 0x5502647f	input_unregister_handle
+EXPORT_SYMBOL vmlinux 0x551b3ed4	dma_async_memcpy_pg_to_pg
+EXPORT_SYMBOL vmlinux 0x5531234c	thermal_zone_device_update
+EXPORT_SYMBOL vmlinux 0x55434722	scsi_remove_target
+EXPORT_SYMBOL vmlinux 0x554f0a48	groups_alloc
+EXPORT_SYMBOL vmlinux 0x555164c5	bdi_unregister
+EXPORT_SYMBOL vmlinux 0x557f1fb4	tcp_child_process
+EXPORT_SYMBOL vmlinux 0x55819767	ilookup5
+EXPORT_SYMBOL vmlinux 0x5594be03	bitmap_remap
+EXPORT_SYMBOL vmlinux 0x55a286bf	proc_dointvec_minmax
+EXPORT_SYMBOL vmlinux 0x55a3a393	journal_revoke
+EXPORT_SYMBOL vmlinux 0x55f32425	input_allocate_device
+EXPORT_SYMBOL vmlinux 0x55fb814b	blk_queue_start_tag
+EXPORT_SYMBOL vmlinux 0x55ff3fc4	iw_handler_set_thrspy
+EXPORT_SYMBOL vmlinux 0x5600904f	fb_get_color_depth
+EXPORT_SYMBOL vmlinux 0x5603cf43	do_settimeofday
+EXPORT_SYMBOL vmlinux 0x5614b010	xfrm_policy_walk_done
+EXPORT_SYMBOL vmlinux 0x562b1074	__kfree_skb
+EXPORT_SYMBOL vmlinux 0x562b73fa	truncate_pagecache
+EXPORT_SYMBOL vmlinux 0x563326d6	inet6_getname
+EXPORT_SYMBOL vmlinux 0x56342af1	create_empty_buffers
+EXPORT_SYMBOL vmlinux 0x5635a60a	vmalloc_user
+EXPORT_SYMBOL vmlinux 0x56383341	pnp_unregister_driver
+EXPORT_SYMBOL vmlinux 0x563bc1d6	wait_for_key_construction
+EXPORT_SYMBOL vmlinux 0x563c5a3b	acpi_is_video_device
+EXPORT_SYMBOL vmlinux 0x569a8ba3	blk_queue_max_discard_sectors
+EXPORT_SYMBOL vmlinux 0x56b03ac9	skb_copy_datagram_iovec
+EXPORT_SYMBOL vmlinux 0x56c8799d	scsi_kunmap_atomic_sg
+EXPORT_SYMBOL vmlinux 0x56d462f7	cfb_imageblit
+EXPORT_SYMBOL vmlinux 0x56df5a59	mmc_regulator_set_ocr
+EXPORT_SYMBOL vmlinux 0x56f38712	schedule_delayed_work_on
+EXPORT_SYMBOL vmlinux 0x56f494e0	smp_call_function
+EXPORT_SYMBOL vmlinux 0x570eacd6	neigh_create
+EXPORT_SYMBOL vmlinux 0x5713c1d0	bh_submit_read
+EXPORT_SYMBOL vmlinux 0x572e85d4	blk_lookup_devt
+EXPORT_SYMBOL vmlinux 0x5730ebd6	pci_enable_device_mem
+EXPORT_SYMBOL vmlinux 0x57575f08	dmaengine_put
+EXPORT_SYMBOL vmlinux 0x5787f84a	pcix_get_max_mmrbc
+EXPORT_SYMBOL vmlinux 0x57adf756	per_cpu__this_cpu_off
+EXPORT_SYMBOL vmlinux 0x57b57ebe	jiffies_to_timespec
+EXPORT_SYMBOL vmlinux 0x57c7576e	call_usermodehelper_stdinpipe
+EXPORT_SYMBOL vmlinux 0x57db7242	mangle_path
+EXPORT_SYMBOL vmlinux 0x57ecb61f	set_pages_nx
+EXPORT_SYMBOL vmlinux 0x581175d0	tcp_v4_destroy_sock
+EXPORT_SYMBOL vmlinux 0x5812bb27	__scsi_add_device
+EXPORT_SYMBOL vmlinux 0x5838f6c9	rtc_valid_tm
+EXPORT_SYMBOL vmlinux 0x584738f9	rdmsr_safe_on_cpu
+EXPORT_SYMBOL vmlinux 0x5857b225	ioread16_rep
+EXPORT_SYMBOL vmlinux 0x5878596a	update_region
+EXPORT_SYMBOL vmlinux 0x5881384d	insert_inode_locked4
+EXPORT_SYMBOL vmlinux 0x5887468b	skb_under_panic
+EXPORT_SYMBOL vmlinux 0x588aaa26	filemap_fault
+EXPORT_SYMBOL vmlinux 0x5899abb2	tty_vhangup
+EXPORT_SYMBOL vmlinux 0x58f12017	blk_queue_alignment_offset
+EXPORT_SYMBOL vmlinux 0x58fab378	netlink_kernel_create
+EXPORT_SYMBOL vmlinux 0x591f6c87	nf_afinfo
+EXPORT_SYMBOL vmlinux 0x5934392b	fb_register_client
+EXPORT_SYMBOL vmlinux 0x5944d97d	pci_request_selected_regions_exclusive
+EXPORT_SYMBOL vmlinux 0x594bf15b	ioport_map
+EXPORT_SYMBOL vmlinux 0x596903e5	kmem_cache_alloc
+EXPORT_SYMBOL vmlinux 0x5970d999	pci_vpd_truncate
+EXPORT_SYMBOL vmlinux 0x59bc9609	acpi_write_bit_register
+EXPORT_SYMBOL vmlinux 0x59bf8122	inet_stream_ops
+EXPORT_SYMBOL vmlinux 0x59bfd1b2	pci_bus_write_config_word
+EXPORT_SYMBOL vmlinux 0x59cdbb03	xfrm_find_acq_byseq
+EXPORT_SYMBOL vmlinux 0x59d696b6	register_module_notifier
+EXPORT_SYMBOL vmlinux 0x5a26e9f8	pnp_is_active
+EXPORT_SYMBOL vmlinux 0x5a34a45c	__kmalloc
+EXPORT_SYMBOL vmlinux 0x5a3aa2a4	tcp_v4_do_rcv
+EXPORT_SYMBOL vmlinux 0x5a4896a8	__put_user_2
+EXPORT_SYMBOL vmlinux 0x5a57d155	__percpu_counter_init
+EXPORT_SYMBOL vmlinux 0x5a5e7ea3	simple_read_from_buffer
+EXPORT_SYMBOL vmlinux 0x5a67e40d	mark_buffer_dirty
+EXPORT_SYMBOL vmlinux 0x5a744b86	netlink_set_nonroot
+EXPORT_SYMBOL vmlinux 0x5a779394	pci_bus_type
+EXPORT_SYMBOL vmlinux 0x5a872763	pci_iomap
+EXPORT_SYMBOL vmlinux 0x5a9b549c	unregister_exec_domain
+EXPORT_SYMBOL vmlinux 0x5ab6137c	end_buffer_read_sync
+EXPORT_SYMBOL vmlinux 0x5ac376a5	acpi_install_fixed_event_handler
+EXPORT_SYMBOL vmlinux 0x5b069b91	jbd2_journal_release_jbd_inode
+EXPORT_SYMBOL vmlinux 0x5b27bcec	sysctl_intvec
+EXPORT_SYMBOL vmlinux 0x5b3fe59f	thaw_process
+EXPORT_SYMBOL vmlinux 0x5b51a5d2	agp_free_memory
+EXPORT_SYMBOL vmlinux 0x5b51c6a7	acpi_walk_resources
+EXPORT_SYMBOL vmlinux 0x5b5a2a32	smp_call_function_many
+EXPORT_SYMBOL vmlinux 0x5b820f43	read_cache_page_gfp
+EXPORT_SYMBOL vmlinux 0x5b9ab11f	i2c_smbus_write_block_data
+EXPORT_SYMBOL vmlinux 0x5bae2eac	acpi_extract_package
+EXPORT_SYMBOL vmlinux 0x5bbfafb9	gnet_stats_start_copy_compat
+EXPORT_SYMBOL vmlinux 0x5be89166	block_write_begin
+EXPORT_SYMBOL vmlinux 0x5bf0d2d5	ll_rw_block
+EXPORT_SYMBOL vmlinux 0x5c0a2534	__tcf_em_tree_match
+EXPORT_SYMBOL vmlinux 0x5c277cab	mmc_set_data_timeout
+EXPORT_SYMBOL vmlinux 0x5c28617b	__task_pid_nr_ns
+EXPORT_SYMBOL vmlinux 0x5c2ae97f	bioset_integrity_create
+EXPORT_SYMBOL vmlinux 0x5c371229	dev_get_stats
+EXPORT_SYMBOL vmlinux 0x5c39ca61	__getblk
+EXPORT_SYMBOL vmlinux 0x5c4efcdd	vfs_quota_on
+EXPORT_SYMBOL vmlinux 0x5c5054f2	slow_work_sleep_till_thread_needed
+EXPORT_SYMBOL vmlinux 0x5c58e451	init_special_inode
+EXPORT_SYMBOL vmlinux 0x5c5b2d12	per_cpu__cpu_info
+EXPORT_SYMBOL vmlinux 0x5c7f9576	netlink_broadcast
+EXPORT_SYMBOL vmlinux 0x5c872fce	inode_sub_rsv_space
+EXPORT_SYMBOL vmlinux 0x5ca7efce	pci_try_set_mwi
+EXPORT_SYMBOL vmlinux 0x5cad67e8	invalidate_partition
+EXPORT_SYMBOL vmlinux 0x5cc8e015	iov_iter_single_seg_count
+EXPORT_SYMBOL vmlinux 0x5ce0e013	pipe_to_file
+EXPORT_SYMBOL vmlinux 0x5d12b3fc	twl4030_i2c_write_u8
+EXPORT_SYMBOL vmlinux 0x5d14d7d7	__scsi_device_lookup_by_target
+EXPORT_SYMBOL vmlinux 0x5d4c09f2	mpage_writepage
+EXPORT_SYMBOL vmlinux 0x5d5fc5af	scsi_get_device_flags_keyed
+EXPORT_SYMBOL vmlinux 0x5d647993	journal_load
+EXPORT_SYMBOL vmlinux 0x5d74dbcf	pnp_range_reserved
+EXPORT_SYMBOL vmlinux 0x5d8feeb3	splice_from_pipe_next
+EXPORT_SYMBOL vmlinux 0x5dadad02	pci_lost_interrupt
+EXPORT_SYMBOL vmlinux 0x5daef1fe	revert_creds
+EXPORT_SYMBOL vmlinux 0x5dc18de8	bio_phys_segments
+EXPORT_SYMBOL vmlinux 0x5deb4259	pnp_possible_config
+EXPORT_SYMBOL vmlinux 0x5df04936	rfkill_pause_polling
+EXPORT_SYMBOL vmlinux 0x5e1bfd74	tcp4_gro_complete
+EXPORT_SYMBOL vmlinux 0x5e21f413	kobject_get
+EXPORT_SYMBOL vmlinux 0x5e419272	arp_broken_ops
+EXPORT_SYMBOL vmlinux 0x5e4307a0	kobject_add
+EXPORT_SYMBOL vmlinux 0x5e659ac8	generic_permission
+EXPORT_SYMBOL vmlinux 0x5e778e4a	napi_reuse_skb
+EXPORT_SYMBOL vmlinux 0x5e95b1cd	current_umask
+EXPORT_SYMBOL vmlinux 0x5e9c2845	tcp_disconnect
+EXPORT_SYMBOL vmlinux 0x5ea40aba	dev_unicast_delete
+EXPORT_SYMBOL vmlinux 0x5ea520c5	tcp_select_initial_window
+EXPORT_SYMBOL vmlinux 0x5eadb1cc	ppp_register_channel
+EXPORT_SYMBOL vmlinux 0x5ed040b0	pm_set_vt_switch
+EXPORT_SYMBOL vmlinux 0x5edd0762	bin2bcd
+EXPORT_SYMBOL vmlinux 0x5ee07793	neigh_lookup
+EXPORT_SYMBOL vmlinux 0x5f56db66	per_cpu__ftrace_event_seq
+EXPORT_SYMBOL vmlinux 0x5f896fe0	dev_addr_del_multiple
+EXPORT_SYMBOL vmlinux 0x5f92295a	nf_unregister_sockopt
+EXPORT_SYMBOL vmlinux 0x5f932297	aio_complete
+EXPORT_SYMBOL vmlinux 0x5f9c24b9	blk_queue_dma_pad
+EXPORT_SYMBOL vmlinux 0x5f9e904d	free_task
+EXPORT_SYMBOL vmlinux 0x5fa4402f	deactivate_super
+EXPORT_SYMBOL vmlinux 0x5fa96dd9	uart_get_baud_rate
+EXPORT_SYMBOL vmlinux 0x5faeaa13	vfs_get_dqinfo
+EXPORT_SYMBOL vmlinux 0x5fb70900	tcf_destroy_chain
+EXPORT_SYMBOL vmlinux 0x5fc42492	netlink_kernel_release
+EXPORT_SYMBOL vmlinux 0x5fc5e12a	get_disk
+EXPORT_SYMBOL vmlinux 0x5fc61b20	____pagevec_lru_add
+EXPORT_SYMBOL vmlinux 0x5fdee4bb	xrlim_allow
+EXPORT_SYMBOL vmlinux 0x5fe8ce7e	tty_port_raise_dtr_rts
+EXPORT_SYMBOL vmlinux 0x5febbf5e	pci_dev_put
+EXPORT_SYMBOL vmlinux 0x5ff42b08	acpi_video_get_capabilities
+EXPORT_SYMBOL vmlinux 0x600683d3	do_unblank_screen
+EXPORT_SYMBOL vmlinux 0x600c81c3	dump_trace
+EXPORT_SYMBOL vmlinux 0x600d64e8	blkdev_issue_flush
+EXPORT_SYMBOL vmlinux 0x601d7be1	write_one_page
+EXPORT_SYMBOL vmlinux 0x602ed00d	acpi_current_gpe_count
+EXPORT_SYMBOL vmlinux 0x60449d42	pci_bus_read_config_byte
+EXPORT_SYMBOL vmlinux 0x605c8bde	radix_tree_delete
+EXPORT_SYMBOL vmlinux 0x605dc838	netif_receive_skb
+EXPORT_SYMBOL vmlinux 0x609f1c7e	synchronize_net
+EXPORT_SYMBOL vmlinux 0x60a0ebad	__tracepoint_kmem_cache_alloc_node
+EXPORT_SYMBOL vmlinux 0x60a32ea9	pm_power_off
+EXPORT_SYMBOL vmlinux 0x6103c4c7	per_cpu__irq_stat
+EXPORT_SYMBOL vmlinux 0x612390ad	netpoll_set_trap
+EXPORT_SYMBOL vmlinux 0x615a6e74	key_payload_reserve
+EXPORT_SYMBOL vmlinux 0x6184296a	agp_generic_enable
+EXPORT_SYMBOL vmlinux 0x618d8299	set_notify_swap_entry_free
+EXPORT_SYMBOL vmlinux 0x61b7b126	simple_strtoull
+EXPORT_SYMBOL vmlinux 0x61b9c35a	datagram_poll
+EXPORT_SYMBOL vmlinux 0x61c717b7	ipv6_skip_exthdr
+EXPORT_SYMBOL vmlinux 0x61ea1964	tcp_v4_connect
+EXPORT_SYMBOL vmlinux 0x62049256	acpi_disable
+EXPORT_SYMBOL vmlinux 0x620a341f	lro_vlan_hwaccel_receive_frags
+EXPORT_SYMBOL vmlinux 0x620dc275	pci_write_vpd
+EXPORT_SYMBOL vmlinux 0x6229483a	scsi_execute
+EXPORT_SYMBOL vmlinux 0x6237f6b5	acpi_enable_event
+EXPORT_SYMBOL vmlinux 0x62447f77	seq_open
+EXPORT_SYMBOL vmlinux 0x625d5847	netpoll_cleanup
+EXPORT_SYMBOL vmlinux 0x62737e1d	sock_unregister
+EXPORT_SYMBOL vmlinux 0x62748e70	acpi_set_current_resources
+EXPORT_SYMBOL vmlinux 0x62827bec	security_secctx_to_secid
+EXPORT_SYMBOL vmlinux 0x62af9753	scsi_get_command
+EXPORT_SYMBOL vmlinux 0x62ee9e6b	compat_sock_get_timestamp
+EXPORT_SYMBOL vmlinux 0x6307fc98	del_timer
+EXPORT_SYMBOL vmlinux 0x6324ec3f	bio_map_user
+EXPORT_SYMBOL vmlinux 0x632afea0	d_move
+EXPORT_SYMBOL vmlinux 0x6333a1b6	phy_disable_interrupts
+EXPORT_SYMBOL vmlinux 0x636a5691	acpi_register_ioapic
+EXPORT_SYMBOL vmlinux 0x6388baf7	phy_enable_interrupts
+EXPORT_SYMBOL vmlinux 0x63906414	devm_iounmap
+EXPORT_SYMBOL vmlinux 0x6396ed69	i2c_get_adapter
+EXPORT_SYMBOL vmlinux 0x639848b5	scm_detach_fds
+EXPORT_SYMBOL vmlinux 0x639be7df	inet_unregister_protosw
+EXPORT_SYMBOL vmlinux 0x63a56d30	set_anon_super
+EXPORT_SYMBOL vmlinux 0x63b41449	replace_mount_options
+EXPORT_SYMBOL vmlinux 0x63ddcba6	inet6_del_protocol
+EXPORT_SYMBOL vmlinux 0x63ecad53	register_netdevice_notifier
+EXPORT_SYMBOL vmlinux 0x63fc232f	strlen_user
+EXPORT_SYMBOL vmlinux 0x6403e338	tcp_memory_pressure
+EXPORT_SYMBOL vmlinux 0x6429ee07	mpage_readpages
+EXPORT_SYMBOL vmlinux 0x642bc034	cdrom_get_last_written
+EXPORT_SYMBOL vmlinux 0x642e54ac	__wake_up
+EXPORT_SYMBOL vmlinux 0x644b6cea	vga_put
+EXPORT_SYMBOL vmlinux 0x6466a1e6	mempool_alloc
+EXPORT_SYMBOL vmlinux 0x6478134c	ec_burst_enable
+EXPORT_SYMBOL vmlinux 0x64999478	congestion_wait
+EXPORT_SYMBOL vmlinux 0x64d452cd	blk_queue_softirq_done
+EXPORT_SYMBOL vmlinux 0x64eae7ad	set_memory_array_wb
+EXPORT_SYMBOL vmlinux 0x64ef6d9b	follow_pfn
+EXPORT_SYMBOL vmlinux 0x64ff7d9e	call_usermodehelper_freeinfo
+EXPORT_SYMBOL vmlinux 0x65020739	tty_unthrottle
+EXPORT_SYMBOL vmlinux 0x65022a24	radix_tree_prev_hole
+EXPORT_SYMBOL vmlinux 0x650dca72	journal_forget
+EXPORT_SYMBOL vmlinux 0x650fb346	add_wait_queue
+EXPORT_SYMBOL vmlinux 0x65134050	sock_get_timestamp
+EXPORT_SYMBOL vmlinux 0x651a4139	test_taint
+EXPORT_SYMBOL vmlinux 0x65408378	zlib_inflate_blob
+EXPORT_SYMBOL vmlinux 0x65414e67	dev_valid_name
+EXPORT_SYMBOL vmlinux 0x654910d5	kernel_accept
+EXPORT_SYMBOL vmlinux 0x655b204c	get_write_access
+EXPORT_SYMBOL vmlinux 0x65658bda	is_container_init
+EXPORT_SYMBOL vmlinux 0x658447c8	consume_skb
+EXPORT_SYMBOL vmlinux 0x6597c30a	__put_cred
+EXPORT_SYMBOL vmlinux 0x6600ae8f	dev_open
+EXPORT_SYMBOL vmlinux 0x661a5783	proc_dointvec_userhz_jiffies
+EXPORT_SYMBOL vmlinux 0x662bd099	kill_block_super
+EXPORT_SYMBOL vmlinux 0x66483623	phy_connect
+EXPORT_SYMBOL vmlinux 0x66816e8f	ps2_cmd_aborted
+EXPORT_SYMBOL vmlinux 0x668da8d5	zlib_inflateIncomp
+EXPORT_SYMBOL vmlinux 0x66909110	tty_flip_buffer_push
+EXPORT_SYMBOL vmlinux 0x66a4e453	ethtool_op_get_sg
+EXPORT_SYMBOL vmlinux 0x66ac054f	xfrm_policy_destroy
+EXPORT_SYMBOL vmlinux 0x66bbf829	xfrm_stateonly_find
+EXPORT_SYMBOL vmlinux 0x66cd9e5b	unregister_cdrom
+EXPORT_SYMBOL vmlinux 0x66d2dc73	tcf_exts_dump_stats
+EXPORT_SYMBOL vmlinux 0x66d97b75	lookup_one_len
+EXPORT_SYMBOL vmlinux 0x66fcf589	kill_anon_super
+EXPORT_SYMBOL vmlinux 0x67053080	current_kernel_time
+EXPORT_SYMBOL vmlinux 0x671544ca	compat_nf_getsockopt
+EXPORT_SYMBOL vmlinux 0x672144bd	strlcpy
+EXPORT_SYMBOL vmlinux 0x6729d3df	__get_user_4
+EXPORT_SYMBOL vmlinux 0x672c8b15	dcache_readdir
+EXPORT_SYMBOL vmlinux 0x67353ca4	scsi_allocate_command
+EXPORT_SYMBOL vmlinux 0x673a5946	inet_csk_accept
+EXPORT_SYMBOL vmlinux 0x673f815e	agp_bridges
+EXPORT_SYMBOL vmlinux 0x6749db1f	set_pages_wb
+EXPORT_SYMBOL vmlinux 0x676a9b5d	bio_integrity_trim
+EXPORT_SYMBOL vmlinux 0x677a9595	bd_release
+EXPORT_SYMBOL vmlinux 0x67a321e0	netif_device_attach
+EXPORT_SYMBOL vmlinux 0x67af5383	scsi_block_when_processing_errors
+EXPORT_SYMBOL vmlinux 0x67b27ec1	tty_std_termios
+EXPORT_SYMBOL vmlinux 0x67e17a92	blk_free_tags
+EXPORT_SYMBOL vmlinux 0x67f1bef7	seq_lseek
+EXPORT_SYMBOL vmlinux 0x683835a4	skb_dma_unmap
+EXPORT_SYMBOL vmlinux 0x68432bf0	pnp_device_detach
+EXPORT_SYMBOL vmlinux 0x684a32ca	put_disk
+EXPORT_SYMBOL vmlinux 0x689b4c9d	eth_mac_addr
+EXPORT_SYMBOL vmlinux 0x68b838c6	udp_proc_unregister
+EXPORT_SYMBOL vmlinux 0x68dd5e79	ipv6_push_nfrag_opts
+EXPORT_SYMBOL vmlinux 0x68e858b3	genl_register_family_with_ops
+EXPORT_SYMBOL vmlinux 0x69007a83	pci_disable_msi
+EXPORT_SYMBOL vmlinux 0x6907d4e9	idr_for_each
+EXPORT_SYMBOL vmlinux 0x695bc6bb	__ip_select_ident
+EXPORT_SYMBOL vmlinux 0x6971447a	rtc_month_days
+EXPORT_SYMBOL vmlinux 0x697cb0a0	sysctl_ms_jiffies
+EXPORT_SYMBOL vmlinux 0x6980fe91	param_get_int
+EXPORT_SYMBOL vmlinux 0x69927dff	try_acquire_console_sem
+EXPORT_SYMBOL vmlinux 0x69a0ca7d	iowrite16be
+EXPORT_SYMBOL vmlinux 0x69a358a6	iomem_resource
+EXPORT_SYMBOL vmlinux 0x69ba7d51	mmc_unregister_driver
+EXPORT_SYMBOL vmlinux 0x69c03dbd	migrate_page
+EXPORT_SYMBOL vmlinux 0x69c8c1d5	security_req_classify_flow
+EXPORT_SYMBOL vmlinux 0x69d2575f	efi
+EXPORT_SYMBOL vmlinux 0x69d38ed9	__scsi_print_sense
+EXPORT_SYMBOL vmlinux 0x69d959da	alloc_fcdev
+EXPORT_SYMBOL vmlinux 0x69de0edf	neigh_parms_release
+EXPORT_SYMBOL vmlinux 0x69e27c7a	bitmap_copy_le
+EXPORT_SYMBOL vmlinux 0x69e3ee19	set_device_ro
+EXPORT_SYMBOL vmlinux 0x69eb1ec0	journal_abort
+EXPORT_SYMBOL vmlinux 0x6a037cf1	mempool_kfree
+EXPORT_SYMBOL vmlinux 0x6a278a84	acpi_unlock_battery_dir
+EXPORT_SYMBOL vmlinux 0x6a3979b3	bio_copy_kern
+EXPORT_SYMBOL vmlinux 0x6a3b9b12	serio_unregister_port
+EXPORT_SYMBOL vmlinux 0x6a44c773	set_pages_uc
+EXPORT_SYMBOL vmlinux 0x6a47571d	__set_personality
+EXPORT_SYMBOL vmlinux 0x6a5ccfbc	__xfrm_lookup
+EXPORT_SYMBOL vmlinux 0x6a5f98a0	ida_get_new_above
+EXPORT_SYMBOL vmlinux 0x6a5fa363	sigprocmask
+EXPORT_SYMBOL vmlinux 0x6a76f3ac	blk_iopoll_enable
+EXPORT_SYMBOL vmlinux 0x6a8222a0	simple_transaction_read
+EXPORT_SYMBOL vmlinux 0x6a9f26c9	init_timer_key
+EXPORT_SYMBOL vmlinux 0x6abd84b8	blkdev_get
+EXPORT_SYMBOL vmlinux 0x6acb973d	iowrite32be
+EXPORT_SYMBOL vmlinux 0x6ad065f4	param_set_charp
+EXPORT_SYMBOL vmlinux 0x6ad85887	acpi_enable_gpe
+EXPORT_SYMBOL vmlinux 0x6add5c9a	dmi_find_device
+EXPORT_SYMBOL vmlinux 0x6ae80dc0	iw_handler_get_thrspy
+EXPORT_SYMBOL vmlinux 0x6b169811	pcim_pin_device
+EXPORT_SYMBOL vmlinux 0x6b1b67d3	__bdevname
+EXPORT_SYMBOL vmlinux 0x6b1d1b6d	scsi_device_quiesce
+EXPORT_SYMBOL vmlinux 0x6b2dc060	dump_stack
+EXPORT_SYMBOL vmlinux 0x6b4a1336	bdi_destroy
+EXPORT_SYMBOL vmlinux 0x6b4e5a52	radix_tree_lookup_slot
+EXPORT_SYMBOL vmlinux 0x6b54f453	give_up_console
+EXPORT_SYMBOL vmlinux 0x6b83c96e	tcf_exts_dump
+EXPORT_SYMBOL vmlinux 0x6b96d7bd	pci_set_dma_max_seg_size
+EXPORT_SYMBOL vmlinux 0x6b9b88f3	sleep_on
+EXPORT_SYMBOL vmlinux 0x6bb91410	pci_add_new_bus
+EXPORT_SYMBOL vmlinux 0x6bc1451d	lock_super
+EXPORT_SYMBOL vmlinux 0x6bc3fbc0	__unregister_chrdev
+EXPORT_SYMBOL vmlinux 0x6bc56c67	radix_tree_next_hole
+EXPORT_SYMBOL vmlinux 0x6bdcfd99	qdisc_class_hash_remove
+EXPORT_SYMBOL vmlinux 0x6bf2eadd	unbind_con_driver
+EXPORT_SYMBOL vmlinux 0x6c389761	acpi_bus_get_private_data
+EXPORT_SYMBOL vmlinux 0x6c3f033b	blk_insert_request
+EXPORT_SYMBOL vmlinux 0x6c61ce70	num_registered_fb
+EXPORT_SYMBOL vmlinux 0x6c6a6432	skb_copy
+EXPORT_SYMBOL vmlinux 0x6c702af7	sysctl_udp_rmem_min
+EXPORT_SYMBOL vmlinux 0x6c7789cd	register_con_driver
+EXPORT_SYMBOL vmlinux 0x6c9364ee	kfree_skb
+EXPORT_SYMBOL vmlinux 0x6cc36a46	pv_mmu_ops
+EXPORT_SYMBOL vmlinux 0x6cf8f709	i2c_master_send
+EXPORT_SYMBOL vmlinux 0x6d00446c	sock_setsockopt
+EXPORT_SYMBOL vmlinux 0x6d0b77fe	sysctl_data
+EXPORT_SYMBOL vmlinux 0x6d0e3039	vfs_fstatat
+EXPORT_SYMBOL vmlinux 0x6d27ef64	__bitmap_empty
+EXPORT_SYMBOL vmlinux 0x6d294e43	clock_t_to_jiffies
+EXPORT_SYMBOL vmlinux 0x6d334118	__get_user_8
+EXPORT_SYMBOL vmlinux 0x6d340f64	tty_termios_input_baud_rate
+EXPORT_SYMBOL vmlinux 0x6d35e4e9	nla_append
+EXPORT_SYMBOL vmlinux 0x6d6cbadc	rb_last
+EXPORT_SYMBOL vmlinux 0x6daba8f9	journal_clear_err
+EXPORT_SYMBOL vmlinux 0x6db42067	balance_dirty_pages_ratelimited_nr
+EXPORT_SYMBOL vmlinux 0x6dc0c24b	complete_and_exit
+EXPORT_SYMBOL vmlinux 0x6dcaeb88	per_cpu__kernel_stack
+EXPORT_SYMBOL vmlinux 0x6dd8d3bd	neigh_table_init_no_netlink
+EXPORT_SYMBOL vmlinux 0x6de6bf83	radix_tree_lookup
+EXPORT_SYMBOL vmlinux 0x6def2db2	half_md4_transform
+EXPORT_SYMBOL vmlinux 0x6e07a54e	acpi_get_gpe_status
+EXPORT_SYMBOL vmlinux 0x6e566b0d	task_tgid_nr_ns
+EXPORT_SYMBOL vmlinux 0x6e696892	fd_install
+EXPORT_SYMBOL vmlinux 0x6e720ff2	rtnl_unlock
+EXPORT_SYMBOL vmlinux 0x6e74041b	d_validate
+EXPORT_SYMBOL vmlinux 0x6e802324	radix_tree_tag_get
+EXPORT_SYMBOL vmlinux 0x6e9dd606	__symbol_put
+EXPORT_SYMBOL vmlinux 0x6eb0fdf3	__cond_resched_lock
+EXPORT_SYMBOL vmlinux 0x6ed5c961	cdev_init
+EXPORT_SYMBOL vmlinux 0x6ef1ae6f	sock_no_ioctl
+EXPORT_SYMBOL vmlinux 0x6ef5565e	nf_register_hook
+EXPORT_SYMBOL vmlinux 0x6f18f34a	make_EII_client
+EXPORT_SYMBOL vmlinux 0x6f370d15	jbd2_journal_forget
+EXPORT_SYMBOL vmlinux 0x6f4d53b4	dma_async_device_unregister
+EXPORT_SYMBOL vmlinux 0x6f556bdb	acpi_get_gpe_device
+EXPORT_SYMBOL vmlinux 0x6f5fb62d	xfrm_register_mode
+EXPORT_SYMBOL vmlinux 0x6f671b65	request_key
+EXPORT_SYMBOL vmlinux 0x6f6b08fa	vfs_get_dqblk
+EXPORT_SYMBOL vmlinux 0x6f7288ad	__alloc_skb
+EXPORT_SYMBOL vmlinux 0x6fbc143d	blk_stop_queue
+EXPORT_SYMBOL vmlinux 0x6fbeccd3	secpath_dup
+EXPORT_SYMBOL vmlinux 0x6fcb87a1	touch_softlockup_watchdog
+EXPORT_SYMBOL vmlinux 0x6fd5d7ed	put_mnt_ns
+EXPORT_SYMBOL vmlinux 0x6feb2039	acpi_write
+EXPORT_SYMBOL vmlinux 0x6fff393f	time_to_tm
+EXPORT_SYMBOL vmlinux 0x700936f7	gnet_stats_copy_rate_est
+EXPORT_SYMBOL vmlinux 0x701d7d78	jbd2_journal_errno
+EXPORT_SYMBOL vmlinux 0x70334f2b	generic_delete_inode
+EXPORT_SYMBOL vmlinux 0x70523a7a	__cond_resched_softirq
+EXPORT_SYMBOL vmlinux 0x7054a3e4	request_dma
+EXPORT_SYMBOL vmlinux 0x70765d1c	vfs_lstat
+EXPORT_SYMBOL vmlinux 0x709ca4b1	security_inode_notifysecctx
+EXPORT_SYMBOL vmlinux 0x70aed7cd	set_disk_ro
+EXPORT_SYMBOL vmlinux 0x70b54744	locks_mandatory_area
+EXPORT_SYMBOL vmlinux 0x70bc17d7	inode_wait
+EXPORT_SYMBOL vmlinux 0x70bf9865	security_d_instantiate
+EXPORT_SYMBOL vmlinux 0x70cf90c0	generic_file_open
+EXPORT_SYMBOL vmlinux 0x70d8ab82	acpi_acquire_global_lock
+EXPORT_SYMBOL vmlinux 0x70de2916	netpoll_poll
+EXPORT_SYMBOL vmlinux 0x70e0d61f	cpu_all_bits
+EXPORT_SYMBOL vmlinux 0x70e5d8cc	jbd2_journal_get_undo_access
+EXPORT_SYMBOL vmlinux 0x711aab76	journal_create
+EXPORT_SYMBOL vmlinux 0x7129e5f8	hex_asc
+EXPORT_SYMBOL vmlinux 0x712aa29b	_spin_lock_irqsave
+EXPORT_SYMBOL vmlinux 0x71320d43	vfs_fsync_range
+EXPORT_SYMBOL vmlinux 0x71356fba	remove_wait_queue
+EXPORT_SYMBOL vmlinux 0x71659c10	get_sb_single
+EXPORT_SYMBOL vmlinux 0x7171121c	overflowgid
+EXPORT_SYMBOL vmlinux 0x71771e6d	dev_gro_receive
+EXPORT_SYMBOL vmlinux 0x718eb65b	input_get_keycode
+EXPORT_SYMBOL vmlinux 0x71a50dbc	register_blkdev
+EXPORT_SYMBOL vmlinux 0x71b765a2	pcim_iounmap
+EXPORT_SYMBOL vmlinux 0x71bb41e4	wrmsr_on_cpus
+EXPORT_SYMBOL vmlinux 0x71d95e02	alloc_mdio_bitbang
+EXPORT_SYMBOL vmlinux 0x71eec426	ethtool_op_set_tx_ipv6_csum
+EXPORT_SYMBOL vmlinux 0x71f6eb38	sg_copy_from_buffer
+EXPORT_SYMBOL vmlinux 0x7209736e	abort_creds
+EXPORT_SYMBOL vmlinux 0x721fd550	__destroy_inode
+EXPORT_SYMBOL vmlinux 0x723e177d	inet_frag_kill
+EXPORT_SYMBOL vmlinux 0x7242e96d	strnchr
+EXPORT_SYMBOL vmlinux 0x72747f73	phy_mii_ioctl
+EXPORT_SYMBOL vmlinux 0x7292c11d	agp_generic_free_gatt_table
+EXPORT_SYMBOL vmlinux 0x72b243d4	free_dma
+EXPORT_SYMBOL vmlinux 0x72bf2140	mtrr_add
+EXPORT_SYMBOL vmlinux 0x72c3be87	param_set_byte
+EXPORT_SYMBOL vmlinux 0x72ea7b2d	scsi_device_type
+EXPORT_SYMBOL vmlinux 0x73299395	tty_insert_flip_string_flags
+EXPORT_SYMBOL vmlinux 0x7333b753	input_open_device
+EXPORT_SYMBOL vmlinux 0x733b4d82	inet_getname
+EXPORT_SYMBOL vmlinux 0x734265da	mdiobus_scan
+EXPORT_SYMBOL vmlinux 0x735a0bd5	native_io_delay
+EXPORT_SYMBOL vmlinux 0x736210f4	simple_unlink
+EXPORT_SYMBOL vmlinux 0x7364d9e8	lro_receive_frags
+EXPORT_SYMBOL vmlinux 0x736d0d9e	gnet_stats_copy_queue
+EXPORT_SYMBOL vmlinux 0x73745f28	seq_bitmap
+EXPORT_SYMBOL vmlinux 0x7389c9a8	acpi_bus_get_power
+EXPORT_SYMBOL vmlinux 0x739ee22d	gen_pool_add
+EXPORT_SYMBOL vmlinux 0x73d47708	inet_frags_init
+EXPORT_SYMBOL vmlinux 0x74000e85	dmam_pool_create
+EXPORT_SYMBOL vmlinux 0x740a1b95	reserve_evntsel_nmi
+EXPORT_SYMBOL vmlinux 0x7432f326	cdev_add
+EXPORT_SYMBOL vmlinux 0x744c0c68	param_get_byte
+EXPORT_SYMBOL vmlinux 0x747e1729	mmc_register_driver
+EXPORT_SYMBOL vmlinux 0x7485e15e	unregister_chrdev_region
+EXPORT_SYMBOL vmlinux 0x748caf40	down
+EXPORT_SYMBOL vmlinux 0x74954462	timecounter_read
+EXPORT_SYMBOL vmlinux 0x74aa4f9c	md_integrity_add_rdev
+EXPORT_SYMBOL vmlinux 0x74bc61d0	dqget
+EXPORT_SYMBOL vmlinux 0x74be5608	pci_bus_write_config_dword
+EXPORT_SYMBOL vmlinux 0x74bfc369	__tracepoint_kmem_cache_alloc
+EXPORT_SYMBOL vmlinux 0x74cc1cbe	unregister_cpu_notifier
+EXPORT_SYMBOL vmlinux 0x74ce972f	key_revoke
+EXPORT_SYMBOL vmlinux 0x74fe71b2	sg_miter_stop
+EXPORT_SYMBOL vmlinux 0x752dcee2	sock_queue_rcv_skb
+EXPORT_SYMBOL vmlinux 0x7538b132	agp_off
+EXPORT_SYMBOL vmlinux 0x756e6992	strnicmp
+EXPORT_SYMBOL vmlinux 0x7575158d	pci_bus_size_bridges
+EXPORT_SYMBOL vmlinux 0x7581df49	cpu_sysdev_class
+EXPORT_SYMBOL vmlinux 0x75990145	blk_end_request_all
+EXPORT_SYMBOL vmlinux 0x75bdea12	iommu_area_alloc
+EXPORT_SYMBOL vmlinux 0x75c62cd0	acpi_processor_unregister_performance
+EXPORT_SYMBOL vmlinux 0x76093d8a	acpi_lock_battery_dir
+EXPORT_SYMBOL vmlinux 0x760a0f4f	yield
+EXPORT_SYMBOL vmlinux 0x760b437a	unregister_inetaddr_notifier
+EXPORT_SYMBOL vmlinux 0x760f35f1	cdev_alloc
+EXPORT_SYMBOL vmlinux 0x764bd77c	request_resource
+EXPORT_SYMBOL vmlinux 0x76624318	dm_register_target
+EXPORT_SYMBOL vmlinux 0x767dd8fd	acpi_get_irq_routing_table
+EXPORT_SYMBOL vmlinux 0x767ddb02	set_memory_wc
+EXPORT_SYMBOL vmlinux 0x768fa6bd	vfs_link
+EXPORT_SYMBOL vmlinux 0x76987e82	nf_log_register
+EXPORT_SYMBOL vmlinux 0x769e16c0	pci_bus_find_capability
+EXPORT_SYMBOL vmlinux 0x76bf656d	__bitmap_shift_left
+EXPORT_SYMBOL vmlinux 0x76c690d3	sock_no_poll
+EXPORT_SYMBOL vmlinux 0x76d3cd60	laptop_mode
+EXPORT_SYMBOL vmlinux 0x76d4dce1	tcf_hash_create
+EXPORT_SYMBOL vmlinux 0x76eb6137	__tcp_get_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x76f3f8a5	num_k8_northbridges
+EXPORT_SYMBOL vmlinux 0x770ff22f	jbd2_journal_begin_ordered_truncate
+EXPORT_SYMBOL vmlinux 0x7736d3f1	neigh_event_ns
+EXPORT_SYMBOL vmlinux 0x773a9c94	blk_iopoll_enabled
+EXPORT_SYMBOL vmlinux 0x776bb0d1	per_cpu__cpu_core_map
+EXPORT_SYMBOL vmlinux 0x778cded6	dev_trans_start
+EXPORT_SYMBOL vmlinux 0x77959d5d	dqput
+EXPORT_SYMBOL vmlinux 0x77a108df	_write_unlock_irqrestore
+EXPORT_SYMBOL vmlinux 0x77a6c0a0	kill_pgrp
+EXPORT_SYMBOL vmlinux 0x77a70f6f	pagevec_lookup_tag
+EXPORT_SYMBOL vmlinux 0x77cfcfde	__tracepoint_kmalloc_node
+EXPORT_SYMBOL vmlinux 0x77ecac9f	zlib_inflateEnd
+EXPORT_SYMBOL vmlinux 0x77f1f45f	ndisc_build_skb
+EXPORT_SYMBOL vmlinux 0x77f53abc	acpi_get_vendor_resource
+EXPORT_SYMBOL vmlinux 0x77fa5d1f	ns_to_timespec
+EXPORT_SYMBOL vmlinux 0x78029542	skb_realloc_headroom
+EXPORT_SYMBOL vmlinux 0x782acba5	crc_t10dif
+EXPORT_SYMBOL vmlinux 0x785148a3	idr_destroy
+EXPORT_SYMBOL vmlinux 0x78764f4e	pv_irq_ops
+EXPORT_SYMBOL vmlinux 0x789300e7	follow_down
+EXPORT_SYMBOL vmlinux 0x78a484c9	_read_unlock_irqrestore
+EXPORT_SYMBOL vmlinux 0x78c05f40	mb_cache_create
+EXPORT_SYMBOL vmlinux 0x78c5f560	jbd2_journal_flush
+EXPORT_SYMBOL vmlinux 0x78d64363	jbd2_log_start_commit
+EXPORT_SYMBOL vmlinux 0x78df6bd7	no_pci_devices
+EXPORT_SYMBOL vmlinux 0x78fbb0f7	__serio_register_driver
+EXPORT_SYMBOL vmlinux 0x79068fda	acpi_install_method
+EXPORT_SYMBOL vmlinux 0x792cea90	blk_queue_update_dma_pad
+EXPORT_SYMBOL vmlinux 0x793db228	neigh_ifdown
+EXPORT_SYMBOL vmlinux 0x7945045a	unregister_sysrq_key
+EXPORT_SYMBOL vmlinux 0x7955bbb8	generic_file_llseek
+EXPORT_SYMBOL vmlinux 0x796c774b	input_close_device
+EXPORT_SYMBOL vmlinux 0x796fc5ce	scsi_get_sense_info_fld
+EXPORT_SYMBOL vmlinux 0x798e6b63	ppp_unit_number
+EXPORT_SYMBOL vmlinux 0x79988de0	llc_sap_close
+EXPORT_SYMBOL vmlinux 0x79aa04a2	get_random_bytes
+EXPORT_SYMBOL vmlinux 0x79ad224b	tasklet_kill
+EXPORT_SYMBOL vmlinux 0x79f82ed1	gnet_stats_copy_basic
+EXPORT_SYMBOL vmlinux 0x7a142de0	security_path_truncate
+EXPORT_SYMBOL vmlinux 0x7a2a4ad5	prepare_creds
+EXPORT_SYMBOL vmlinux 0x7a2a837d	strict_strtol
+EXPORT_SYMBOL vmlinux 0x7a2f5a71	register_tcf_proto_ops
+EXPORT_SYMBOL vmlinux 0x7a4497db	kzfree
+EXPORT_SYMBOL vmlinux 0x7a6e3f1b	xfrm_user_policy
+EXPORT_SYMBOL vmlinux 0x7a848702	_read_lock_irqsave
+EXPORT_SYMBOL vmlinux 0x7a944a8e	audit_log_end
+EXPORT_SYMBOL vmlinux 0x7aa9b9f6	blk_queue_stack_limits
+EXPORT_SYMBOL vmlinux 0x7aaa899f	sock_no_recvmsg
+EXPORT_SYMBOL vmlinux 0x7acc529b	__scm_destroy
+EXPORT_SYMBOL vmlinux 0x7adb0b6d	aio_put_req
+EXPORT_SYMBOL vmlinux 0x7ae73de1	alloc_pages_exact
+EXPORT_SYMBOL vmlinux 0x7aebc111	km_state_expired
+EXPORT_SYMBOL vmlinux 0x7aec9089	clear_user
+EXPORT_SYMBOL vmlinux 0x7b0c84c4	acpi_remove_table_handler
+EXPORT_SYMBOL vmlinux 0x7b0f47e8	pci_find_capability
+EXPORT_SYMBOL vmlinux 0x7b15227b	ip_route_output_key
+EXPORT_SYMBOL vmlinux 0x7b18ef33	mddev_congested
+EXPORT_SYMBOL vmlinux 0x7b227b00	unlock_page
+EXPORT_SYMBOL vmlinux 0x7b52a859	wrmsr_safe_on_cpu
+EXPORT_SYMBOL vmlinux 0x7b56bd05	acpi_lid_notifier_register
+EXPORT_SYMBOL vmlinux 0x7b6ce00f	pnp_activate_dev
+EXPORT_SYMBOL vmlinux 0x7b6cfcb4	mmc_try_claim_host
+EXPORT_SYMBOL vmlinux 0x7b771c9c	d_rehash
+EXPORT_SYMBOL vmlinux 0x7b84560b	agp_put_bridge
+EXPORT_SYMBOL vmlinux 0x7b8f4c40	key_create_or_update
+EXPORT_SYMBOL vmlinux 0x7ba065e4	tcf_em_unregister
+EXPORT_SYMBOL vmlinux 0x7ba9528e	blk_queue_max_hw_segments
+EXPORT_SYMBOL vmlinux 0x7be22d36	i2c_add_adapter
+EXPORT_SYMBOL vmlinux 0x7be41077	blk_queue_max_segment_size
+EXPORT_SYMBOL vmlinux 0x7bff3be7	iov_iter_advance
+EXPORT_SYMBOL vmlinux 0x7c0e3172	nf_hook_slow
+EXPORT_SYMBOL vmlinux 0x7c15af1e	dquot_alloc_inode
+EXPORT_SYMBOL vmlinux 0x7c1cde82	proc_dointvec_ms_jiffies
+EXPORT_SYMBOL vmlinux 0x7c46233a	cpufreq_quick_get
+EXPORT_SYMBOL vmlinux 0x7c4ba0de	block_commit_write
+EXPORT_SYMBOL vmlinux 0x7c59d7d5	I_BDEV
+EXPORT_SYMBOL vmlinux 0x7c60d66e	getname
+EXPORT_SYMBOL vmlinux 0x7c61340c	__release_region
+EXPORT_SYMBOL vmlinux 0x7c8c2c31	put_tty_driver
+EXPORT_SYMBOL vmlinux 0x7c904ded	unregister_module_notifier
+EXPORT_SYMBOL vmlinux 0x7ca2b206	sk_dst_check
+EXPORT_SYMBOL vmlinux 0x7cb1ae69	cpu_down
+EXPORT_SYMBOL vmlinux 0x7cc8a6a1	i2c_smbus_read_i2c_block_data
+EXPORT_SYMBOL vmlinux 0x7d11c268	jiffies
+EXPORT_SYMBOL vmlinux 0x7d55a9f2	brioctl_set
+EXPORT_SYMBOL vmlinux 0x7d5fb2bd	prepare_kernel_cred
+EXPORT_SYMBOL vmlinux 0x7d6055c5	sock_i_ino
+EXPORT_SYMBOL vmlinux 0x7d64a0fa	dm_exception_store_type_register
+EXPORT_SYMBOL vmlinux 0x7d6bb587	cpu_online_mask
+EXPORT_SYMBOL vmlinux 0x7d6c9536	bitmap_endwrite
+EXPORT_SYMBOL vmlinux 0x7d7631f5	unregister_md_personality
+EXPORT_SYMBOL vmlinux 0x7d7b8b79	bdevname
+EXPORT_SYMBOL vmlinux 0x7d7e7a6e	dcache_dir_lseek
+EXPORT_SYMBOL vmlinux 0x7d94f746	acpi_os_write_port
+EXPORT_SYMBOL vmlinux 0x7daf71bd	xfrm6_rcv_spi
+EXPORT_SYMBOL vmlinux 0x7daf7486	inet_frag_destroy
+EXPORT_SYMBOL vmlinux 0x7dc09f30	xfrm_unregister_mode
+EXPORT_SYMBOL vmlinux 0x7dcc1ed9	block_is_partially_uptodate
+EXPORT_SYMBOL vmlinux 0x7dce8895	slow_work_unregister_user
+EXPORT_SYMBOL vmlinux 0x7dceceac	capable
+EXPORT_SYMBOL vmlinux 0x7dd554fc	unregister_kmmio_probe
+EXPORT_SYMBOL vmlinux 0x7de9f6f5	mdio_bus_type
+EXPORT_SYMBOL vmlinux 0x7df1186d	genphy_config_aneg
+EXPORT_SYMBOL vmlinux 0x7df16b89	locks_copy_lock
+EXPORT_SYMBOL vmlinux 0x7df97bc5	submit_bh
+EXPORT_SYMBOL vmlinux 0x7dfc6395	neigh_connected_output
+EXPORT_SYMBOL vmlinux 0x7dfe2451	generic_read_dir
+EXPORT_SYMBOL vmlinux 0x7e299735	agp_create_memory
+EXPORT_SYMBOL vmlinux 0x7e5a5c6e	get_sb_bdev
+EXPORT_SYMBOL vmlinux 0x7e6ad4b7	eth_header_parse
+EXPORT_SYMBOL vmlinux 0x7e862ad7	dm_exception_store_create
+EXPORT_SYMBOL vmlinux 0x7e9ebb05	kernel_thread
+EXPORT_SYMBOL vmlinux 0x7ec9bfbc	strncpy
+EXPORT_SYMBOL vmlinux 0x7ee91c1d	_spin_trylock
+EXPORT_SYMBOL vmlinux 0x7ef967b3	d_alloc
+EXPORT_SYMBOL vmlinux 0x7f24de73	jiffies_to_usecs
+EXPORT_SYMBOL vmlinux 0x7f261948	kernel_getsockname
+EXPORT_SYMBOL vmlinux 0x7f4f4ae0	pnp_request_card_device
+EXPORT_SYMBOL vmlinux 0x7f61fb79	md_check_recovery
+EXPORT_SYMBOL vmlinux 0x7f62effb	unregister_key_type
+EXPORT_SYMBOL vmlinux 0x7f6c3e80	block_page_mkwrite
+EXPORT_SYMBOL vmlinux 0x7f77b6df	scsi_unregister
+EXPORT_SYMBOL vmlinux 0x7fd59dad	md_write_start
+EXPORT_SYMBOL vmlinux 0x7fde05c3	sock_no_mmap
+EXPORT_SYMBOL vmlinux 0x7fdfbc30	dquot_alloc_space
+EXPORT_SYMBOL vmlinux 0x802809fb	i2c_transfer
+EXPORT_SYMBOL vmlinux 0x802c4cc7	path_lookup
+EXPORT_SYMBOL vmlinux 0x8031bef8	bdi_register_dev
+EXPORT_SYMBOL vmlinux 0x8057f8b3	ether_setup
+EXPORT_SYMBOL vmlinux 0x8065f901	netpoll_send_udp
+EXPORT_SYMBOL vmlinux 0x807ea8d3	blk_cleanup_queue
+EXPORT_SYMBOL vmlinux 0x80c81df3	dmam_alloc_coherent
+EXPORT_SYMBOL vmlinux 0x80ceeef2	remove_inode_hash
+EXPORT_SYMBOL vmlinux 0x80d0e680	rt6_lookup
+EXPORT_SYMBOL vmlinux 0x80d5cff0	per_cpu__irq_regs
+EXPORT_SYMBOL vmlinux 0x80e36042	skb_dma_map
+EXPORT_SYMBOL vmlinux 0x81150f3b	icmpv6_send
+EXPORT_SYMBOL vmlinux 0x812f480a	jbd2_journal_force_commit_nested
+EXPORT_SYMBOL vmlinux 0x81390c59	otg_put_transceiver
+EXPORT_SYMBOL vmlinux 0x81472677	acpi_get_table
+EXPORT_SYMBOL vmlinux 0x8147766e	blk_plug_device_unlocked
+EXPORT_SYMBOL vmlinux 0x81488aa0	d_splice_alias
+EXPORT_SYMBOL vmlinux 0x814984e3	wireless_spy_update
+EXPORT_SYMBOL vmlinux 0x815b5dd4	match_octal
+EXPORT_SYMBOL vmlinux 0x815f2897	empty_zero_page
+EXPORT_SYMBOL vmlinux 0x8168a918	generic_file_llseek_unlocked
+EXPORT_SYMBOL vmlinux 0x817c715a	in_dev_finish_destroy
+EXPORT_SYMBOL vmlinux 0x8182a48e	neigh_parms_alloc
+EXPORT_SYMBOL vmlinux 0x818f7c6d	tcf_em_tree_destroy
+EXPORT_SYMBOL vmlinux 0x81a1b699	input_inject_event
+EXPORT_SYMBOL vmlinux 0x81afa0c7	cdev_index
+EXPORT_SYMBOL vmlinux 0x81dce01b	d_add_ci
+EXPORT_SYMBOL vmlinux 0x81e6b37f	dmi_get_system_info
+EXPORT_SYMBOL vmlinux 0x81fbc67d	simple_empty
+EXPORT_SYMBOL vmlinux 0x820d225f	print_mac
+EXPORT_SYMBOL vmlinux 0x820fc63c	vfsmount_lock
+EXPORT_SYMBOL vmlinux 0x8212721d	xenbus_dev_request_and_reply
+EXPORT_SYMBOL vmlinux 0x82130130	bio_integrity_add_page
+EXPORT_SYMBOL vmlinux 0x824144b5	proc_net_netfilter
+EXPORT_SYMBOL vmlinux 0x8247bf68	generic_fillattr
+EXPORT_SYMBOL vmlinux 0x8251bcc3	bitmap_release_region
+EXPORT_SYMBOL vmlinux 0x82650b03	mutex_lock_killable
+EXPORT_SYMBOL vmlinux 0x82692209	kref_set
+EXPORT_SYMBOL vmlinux 0x8280d559	udp_lib_get_port
+EXPORT_SYMBOL vmlinux 0x8286e845	dm_dirty_log_destroy
+EXPORT_SYMBOL vmlinux 0x828910ab	get_empty_filp
+EXPORT_SYMBOL vmlinux 0x828d704c	scsi_print_result
+EXPORT_SYMBOL vmlinux 0x828e320f	blk_queue_init_tags
+EXPORT_SYMBOL vmlinux 0x82a28dba	ethtool_op_get_ufo
+EXPORT_SYMBOL vmlinux 0x82acfb70	blk_iopoll_sched
+EXPORT_SYMBOL vmlinux 0x82d3e07d	gnet_stats_start_copy
+EXPORT_SYMBOL vmlinux 0x82d55273	call_usermodehelper_setcleanup
+EXPORT_SYMBOL vmlinux 0x82daeb4f	block_write_end
+EXPORT_SYMBOL vmlinux 0x82e9c083	csum_partial_copy_fromiovecend
+EXPORT_SYMBOL vmlinux 0x82f50fc5	vfs_readdir
+EXPORT_SYMBOL vmlinux 0x830e547b	ioremap_prot
+EXPORT_SYMBOL vmlinux 0x830f8d69	bio_integrity_alloc
+EXPORT_SYMBOL vmlinux 0x8317e20a	completion_done
+EXPORT_SYMBOL vmlinux 0x834942e0	sk_stream_kill_queues
+EXPORT_SYMBOL vmlinux 0x837b98f8	register_exec_domain
+EXPORT_SYMBOL vmlinux 0x837fe8d9	agp_generic_mask_memory
+EXPORT_SYMBOL vmlinux 0x83879b9f	bio_integrity_clone
+EXPORT_SYMBOL vmlinux 0x83a476ce	bitmap_scnlistprintf
+EXPORT_SYMBOL vmlinux 0x83c43dc1	posix_acl_chmod_masq
+EXPORT_SYMBOL vmlinux 0x83ea776c	test_set_page_writeback
+EXPORT_SYMBOL vmlinux 0x83fc98e9	bio_split
+EXPORT_SYMBOL vmlinux 0x8405c9a8	request_firmware
+EXPORT_SYMBOL vmlinux 0x84069277	tcf_action_exec
+EXPORT_SYMBOL vmlinux 0x841185a3	wait_on_page_bit
+EXPORT_SYMBOL vmlinux 0x842bc2d7	audit_log_start
+EXPORT_SYMBOL vmlinux 0x8441e725	skb_checksum
+EXPORT_SYMBOL vmlinux 0x847ec116	vga_tryget
+EXPORT_SYMBOL vmlinux 0x84f255c7	pci_read_vpd
+EXPORT_SYMBOL vmlinux 0x8527cda3	lro_flush_pkt
+EXPORT_SYMBOL vmlinux 0x8533e05a	scsi_reset_provider
+EXPORT_SYMBOL vmlinux 0x854c5636	__pci_register_driver
+EXPORT_SYMBOL vmlinux 0x855eb993	netpoll_parse_options
+EXPORT_SYMBOL vmlinux 0x85670f1d	rtnl_is_locked
+EXPORT_SYMBOL vmlinux 0x85abc85f	strncmp
+EXPORT_SYMBOL vmlinux 0x85cb3672	acpi_bus_register_driver
+EXPORT_SYMBOL vmlinux 0x85d4b12b	blk_queue_ordered
+EXPORT_SYMBOL vmlinux 0x85df9b6c	strsep
+EXPORT_SYMBOL vmlinux 0x86126a09	tcp_mtup_init
+EXPORT_SYMBOL vmlinux 0x8618bcdf	tty_port_lower_dtr_rts
+EXPORT_SYMBOL vmlinux 0x8631f188	radix_tree_tag_set
+EXPORT_SYMBOL vmlinux 0x86460e74	mdiobus_write
+EXPORT_SYMBOL vmlinux 0x8664f62e	cpufreq_update_policy
+EXPORT_SYMBOL vmlinux 0x8689160e	dev_unicast_unsync
+EXPORT_SYMBOL vmlinux 0x868acba5	get_options
+EXPORT_SYMBOL vmlinux 0x869a944a	hippi_mac_addr
+EXPORT_SYMBOL vmlinux 0x86a9d4d0	dm_kcopyd_client_create
+EXPORT_SYMBOL vmlinux 0x86ab6f7e	ethtool_op_set_tx_csum
+EXPORT_SYMBOL vmlinux 0x86c7146d	vfs_fstat
+EXPORT_SYMBOL vmlinux 0x86e9b06c	__napi_schedule
+EXPORT_SYMBOL vmlinux 0x86fb9b05	bitmap_parse_user
+EXPORT_SYMBOL vmlinux 0x86fe69dd	jbd2_journal_set_triggers
+EXPORT_SYMBOL vmlinux 0x871043fb	pci_request_selected_regions
+EXPORT_SYMBOL vmlinux 0x871c0a7e	fiemap_check_flags
+EXPORT_SYMBOL vmlinux 0x871d06b5	__bread
+EXPORT_SYMBOL vmlinux 0x8725b236	thermal_zone_unbind_cooling_device
+EXPORT_SYMBOL vmlinux 0x87327ac3	inet_csk_init_xmit_timers
+EXPORT_SYMBOL vmlinux 0x8733e9a3	sleep_on_timeout
+EXPORT_SYMBOL vmlinux 0x8740668e	may_umount_tree
+EXPORT_SYMBOL vmlinux 0x874bc019	__rta_fill
+EXPORT_SYMBOL vmlinux 0x874e2146	__brelse
+EXPORT_SYMBOL vmlinux 0x876c3de6	kernel_sock_shutdown
+EXPORT_SYMBOL vmlinux 0x876dafc3	ec_write
+EXPORT_SYMBOL vmlinux 0x8785333f	console_start
+EXPORT_SYMBOL vmlinux 0x878ab3ce	sysctl_tcp_adv_win_scale
+EXPORT_SYMBOL vmlinux 0x8794de44	alloc_trdev
+EXPORT_SYMBOL vmlinux 0x87a7112b	blk_queue_free_tags
+EXPORT_SYMBOL vmlinux 0x87aaddf8	wrmsr_safe_regs_on_cpu
+EXPORT_SYMBOL vmlinux 0x87cb81e6	framebuffer_alloc
+EXPORT_SYMBOL vmlinux 0x87df4f9e	__generic_file_aio_write
+EXPORT_SYMBOL vmlinux 0x881039d0	zlib_inflate
+EXPORT_SYMBOL vmlinux 0x881fded6	bmap
+EXPORT_SYMBOL vmlinux 0x8850afa5	mnt_unpin
+EXPORT_SYMBOL vmlinux 0x8862d6ff	ethtool_op_set_sg
+EXPORT_SYMBOL vmlinux 0x886aa274	posix_acl_create_masq
+EXPORT_SYMBOL vmlinux 0x889733a4	phy_register_fixup_for_id
+EXPORT_SYMBOL vmlinux 0x88993257	skb_gso_segment
+EXPORT_SYMBOL vmlinux 0x889da329	seq_bitmap_list
+EXPORT_SYMBOL vmlinux 0x88abcd10	pipe_unlock
+EXPORT_SYMBOL vmlinux 0x88b7700b	end_buffer_write_sync
+EXPORT_SYMBOL vmlinux 0x88c195b2	pci_get_device
+EXPORT_SYMBOL vmlinux 0x88d46264	dma_find_channel
+EXPORT_SYMBOL vmlinux 0x88f2e2c1	default_unplug_io_fn
+EXPORT_SYMBOL vmlinux 0x88ffca4c	register_key_type
+EXPORT_SYMBOL vmlinux 0x891f7742	journal_errno
+EXPORT_SYMBOL vmlinux 0x892b26a0	set_memory_nx
+EXPORT_SYMBOL vmlinux 0x897473df	mktime
+EXPORT_SYMBOL vmlinux 0x89915a0f	i2c_smbus_xfer
+EXPORT_SYMBOL vmlinux 0x89949018	down_timeout
+EXPORT_SYMBOL vmlinux 0x89bf099f	blk_complete_request
+EXPORT_SYMBOL vmlinux 0x89d5538d	fb_pad_aligned_buffer
+EXPORT_SYMBOL vmlinux 0x89d66811	build_ehash_secret
+EXPORT_SYMBOL vmlinux 0x8a1203a9	kref_get
+EXPORT_SYMBOL vmlinux 0x8a373fd7	twl4030_i2c_write
+EXPORT_SYMBOL vmlinux 0x8a3eabf0	__wait_on_bit
+EXPORT_SYMBOL vmlinux 0x8a763823	send_sig
+EXPORT_SYMBOL vmlinux 0x8a7d1c31	high_memory
+EXPORT_SYMBOL vmlinux 0x8a99a016	mempool_free_slab
+EXPORT_SYMBOL vmlinux 0x8aad1913	unlock_rename
+EXPORT_SYMBOL vmlinux 0x8abbdb5b	__devm_request_region
+EXPORT_SYMBOL vmlinux 0x8abfba3e	__lock_page
+EXPORT_SYMBOL vmlinux 0x8ac108ba	sync_inode
+EXPORT_SYMBOL vmlinux 0x8ac40297	iommu_area_free
+EXPORT_SYMBOL vmlinux 0x8b01f2c2	alloc_file
+EXPORT_SYMBOL vmlinux 0x8b17e475	agp_copy_info
+EXPORT_SYMBOL vmlinux 0x8b2ff50a	tcp_read_sock
+EXPORT_SYMBOL vmlinux 0x8b35e873	sg_last
+EXPORT_SYMBOL vmlinux 0x8b5f4a2e	IO_APIC_get_PCI_irq_vector
+EXPORT_SYMBOL vmlinux 0x8b618d08	overflowuid
+EXPORT_SYMBOL vmlinux 0x8b72e49a	pci_scan_single_device
+EXPORT_SYMBOL vmlinux 0x8b7fe311	kmemdup
+EXPORT_SYMBOL vmlinux 0x8b922c0f	__strnlen_user
+EXPORT_SYMBOL vmlinux 0x8b989cf9	acpi_bus_can_wakeup
+EXPORT_SYMBOL vmlinux 0x8bacdd06	register_nls
+EXPORT_SYMBOL vmlinux 0x8bb15a0a	bio_sector_offset
+EXPORT_SYMBOL vmlinux 0x8bba85ac	blk_fetch_request
+EXPORT_SYMBOL vmlinux 0x8bc727ce	tcp_simple_retransmit
+EXPORT_SYMBOL vmlinux 0x8bd313b8	__tracepoint_kfree
+EXPORT_SYMBOL vmlinux 0x8bd5b603	param_get_long
+EXPORT_SYMBOL vmlinux 0x8bf7d1b0	per_cpu__current_task
+EXPORT_SYMBOL vmlinux 0x8c183cbe	iowrite16
+EXPORT_SYMBOL vmlinux 0x8c36120b	netdev_state_change
+EXPORT_SYMBOL vmlinux 0x8c537c45	posix_acl_from_mode
+EXPORT_SYMBOL vmlinux 0x8c5b143e	kmem_ptr_validate
+EXPORT_SYMBOL vmlinux 0x8c65230d	acpi_processor_register_performance
+EXPORT_SYMBOL vmlinux 0x8c7023e7	napi_get_frags
+EXPORT_SYMBOL vmlinux 0x8c7fee9f	arch_acpi_processor_cleanup_pdc
+EXPORT_SYMBOL vmlinux 0x8cac23ea	inode_add_rsv_space
+EXPORT_SYMBOL vmlinux 0x8cb9cb0b	jbd2_journal_clear_features
+EXPORT_SYMBOL vmlinux 0x8cc79cab	iowrite16_rep
+EXPORT_SYMBOL vmlinux 0x8cf03378	skb_copy_and_csum_dev
+EXPORT_SYMBOL vmlinux 0x8cf8619c	xfrm4_rcv_encap
+EXPORT_SYMBOL vmlinux 0x8d0a46c0	ps2_drain
+EXPORT_SYMBOL vmlinux 0x8d1a0ad3	nf_register_queue_handler
+EXPORT_SYMBOL vmlinux 0x8d29a8aa	nf_getsockopt
+EXPORT_SYMBOL vmlinux 0x8d3894f2	_ctype
+EXPORT_SYMBOL vmlinux 0x8d551bef	sysctl_tcp_rmem
+EXPORT_SYMBOL vmlinux 0x8d8c6f1c	bio_integrity_endio
+EXPORT_SYMBOL vmlinux 0x8d8d96c6	acpi_get_sleep_type_data
+EXPORT_SYMBOL vmlinux 0x8da016a4	generic_ro_fops
+EXPORT_SYMBOL vmlinux 0x8db07a82	phy_device_create
+EXPORT_SYMBOL vmlinux 0x8dbbe355	pneigh_lookup
+EXPORT_SYMBOL vmlinux 0x8dbc3fe3	tcf_exts_destroy
+EXPORT_SYMBOL vmlinux 0x8dca832f	__percpu_counter_sum
+EXPORT_SYMBOL vmlinux 0x8deed0f5	blkdev_put
+EXPORT_SYMBOL vmlinux 0x8e002cda	acpi_remove_gpe_block
+EXPORT_SYMBOL vmlinux 0x8e0637ba	i8253_lock
+EXPORT_SYMBOL vmlinux 0x8e0b7743	ipv6_ext_hdr
+EXPORT_SYMBOL vmlinux 0x8e1d681c	tcf_em_tree_validate
+EXPORT_SYMBOL vmlinux 0x8e2d96c4	pci_bus_assign_resources
+EXPORT_SYMBOL vmlinux 0x8e3c9cc3	vprintk
+EXPORT_SYMBOL vmlinux 0x8e3fb7c5	security_inode_readlink
+EXPORT_SYMBOL vmlinux 0x8e49f4de	module_layout
+EXPORT_SYMBOL vmlinux 0x8e63e246	ethtool_op_set_tx_hw_csum
+EXPORT_SYMBOL vmlinux 0x8e763ae1	send_remote_softirq
+EXPORT_SYMBOL vmlinux 0x8e7ef552	__invalidate_device
+EXPORT_SYMBOL vmlinux 0x8e8049aa	netdev_boot_setup_check
+EXPORT_SYMBOL vmlinux 0x8e8199bf	copy_strings_kernel
+EXPORT_SYMBOL vmlinux 0x8e83107a	generic_getxattr
+EXPORT_SYMBOL vmlinux 0x8e9cf319	dm_get_device
+EXPORT_SYMBOL vmlinux 0x8ea383d4	dev_remove_pack
+EXPORT_SYMBOL vmlinux 0x8eb20493	tty_port_tty_get
+EXPORT_SYMBOL vmlinux 0x8ec1a23c	override_creds
+EXPORT_SYMBOL vmlinux 0x8ec5c3f6	kthread_stop
+EXPORT_SYMBOL vmlinux 0x8ee69235	timeval_to_jiffies
+EXPORT_SYMBOL vmlinux 0x8ef9ca9f	swiotlb_free_coherent
+EXPORT_SYMBOL vmlinux 0x8f1e66df	dm_get_mapinfo
+EXPORT_SYMBOL vmlinux 0x8f2703b7	wbinvd_on_all_cpus
+EXPORT_SYMBOL vmlinux 0x8f466e99	page_put_link
+EXPORT_SYMBOL vmlinux 0x8f46cd63	set_bdi_congested
+EXPORT_SYMBOL vmlinux 0x8f48679a	rb_prev
+EXPORT_SYMBOL vmlinux 0x8f4da4fd	unregister_netdev
+EXPORT_SYMBOL vmlinux 0x8f634ae8	__dec_zone_page_state
+EXPORT_SYMBOL vmlinux 0x8f63795f	bio_uncopy_user
+EXPORT_SYMBOL vmlinux 0x8f6b7950	set_irq_data
+EXPORT_SYMBOL vmlinux 0x8f915ce6	agp_backend_acquire
+EXPORT_SYMBOL vmlinux 0x8f9c199c	__get_user_2
+EXPORT_SYMBOL vmlinux 0x8fd5da89	cdrom_release
+EXPORT_SYMBOL vmlinux 0x8fd80892	request_key_async_with_auxdata
+EXPORT_SYMBOL vmlinux 0x8fe8ad1a	rwsem_downgrade_wake
+EXPORT_SYMBOL vmlinux 0x90035333	secure_tcpv6_sequence_number
+EXPORT_SYMBOL vmlinux 0x90144bfa	linkwatch_fire_event
+EXPORT_SYMBOL vmlinux 0x902daea9	scsi_command_normalize_sense
+EXPORT_SYMBOL vmlinux 0x904409c6	acpi_set_firmware_waking_vector
+EXPORT_SYMBOL vmlinux 0x904b5f18	md_set_array_sectors
+EXPORT_SYMBOL vmlinux 0x9052096e	skb_trim
+EXPORT_SYMBOL vmlinux 0x90658f14	pci_enable_msix
+EXPORT_SYMBOL vmlinux 0x909eb440	dev_mc_add
+EXPORT_SYMBOL vmlinux 0x90a1601f	dmi_check_system
+EXPORT_SYMBOL vmlinux 0x90a21b2c	kernel_bind
+EXPORT_SYMBOL vmlinux 0x90a38d5f	fib_default_rule_add
+EXPORT_SYMBOL vmlinux 0x90a4943a	register_gifconf
+EXPORT_SYMBOL vmlinux 0x90ceef80	pci_unmap_rom
+EXPORT_SYMBOL vmlinux 0x90ea10a0	scsi_print_sense
+EXPORT_SYMBOL vmlinux 0x90eaba31	dm_io_client_create
+EXPORT_SYMBOL vmlinux 0x90ef520d	neigh_table_init
+EXPORT_SYMBOL vmlinux 0x90f65e98	tcf_unregister_action
+EXPORT_SYMBOL vmlinux 0x90fefcf2	security_sb_clone_mnt_opts
+EXPORT_SYMBOL vmlinux 0x910ea45a	dquot_scan_active
+EXPORT_SYMBOL vmlinux 0x91433fac	dev_set_allmulti
+EXPORT_SYMBOL vmlinux 0x9144a8e2	ec_burst_disable
+EXPORT_SYMBOL vmlinux 0x91481982	__ratelimit
+EXPORT_SYMBOL vmlinux 0x91607d95	set_memory_wb
+EXPORT_SYMBOL vmlinux 0x91766c09	param_get_ulong
+EXPORT_SYMBOL vmlinux 0x917b8968	scsi_prep_state_check
+EXPORT_SYMBOL vmlinux 0x91862f73	nf_log_unregister
+EXPORT_SYMBOL vmlinux 0x91b2e03a	mdiobus_free
+EXPORT_SYMBOL vmlinux 0x91bc3d61	blk_integrity_register
+EXPORT_SYMBOL vmlinux 0x9207748b	dev_mc_delete
+EXPORT_SYMBOL vmlinux 0x920b15c8	bio_integrity_free
+EXPORT_SYMBOL vmlinux 0x9214ed8a	param_get_bool
+EXPORT_SYMBOL vmlinux 0x92320f44	sock_release
+EXPORT_SYMBOL vmlinux 0x92392cd9	iov_shorten
+EXPORT_SYMBOL vmlinux 0x923b1276	dmaengine_get
+EXPORT_SYMBOL vmlinux 0x9245cb04	blk_execute_rq
+EXPORT_SYMBOL vmlinux 0x92752c9b	unregister_snap_client
+EXPORT_SYMBOL vmlinux 0x927e989f	gen_pool_alloc
+EXPORT_SYMBOL vmlinux 0x9293cb9e	search_binary_handler
+EXPORT_SYMBOL vmlinux 0x929506ff	skb_checksum_help
+EXPORT_SYMBOL vmlinux 0x92e81a3a	touch_atime
+EXPORT_SYMBOL vmlinux 0x92ea4ae4	crc32_le
+EXPORT_SYMBOL vmlinux 0x9305f8e6	cpufreq_get
+EXPORT_SYMBOL vmlinux 0x934ee78e	skb_queue_tail
+EXPORT_SYMBOL vmlinux 0x9385667d	down_read_trylock
+EXPORT_SYMBOL vmlinux 0x93a1d001	dm_io_client_destroy
+EXPORT_SYMBOL vmlinux 0x93a6e0b2	io_schedule
+EXPORT_SYMBOL vmlinux 0x93c651be	acpi_info
+EXPORT_SYMBOL vmlinux 0x93c6b85d	pci_reenable_device
+EXPORT_SYMBOL vmlinux 0x93cbd1ec	_spin_lock_bh
+EXPORT_SYMBOL vmlinux 0x93d3281e	bio_clone
+EXPORT_SYMBOL vmlinux 0x93fca811	__get_free_pages
+EXPORT_SYMBOL vmlinux 0x9407a4cf	sockfd_lookup
+EXPORT_SYMBOL vmlinux 0x941f5ebb	fb_validate_mode
+EXPORT_SYMBOL vmlinux 0x942e8e46	ndisc_send_skb
+EXPORT_SYMBOL vmlinux 0x943e868f	ida_get_new
+EXPORT_SYMBOL vmlinux 0x944832d6	ftrace_print_symbols_seq
+EXPORT_SYMBOL vmlinux 0x9448f902	__xfrm_policy_check
+EXPORT_SYMBOL vmlinux 0x945bc6a7	copy_from_user
+EXPORT_SYMBOL vmlinux 0x94847b23	nf_ct_destroy
+EXPORT_SYMBOL vmlinux 0x948dbae9	unregister_framebuffer
+EXPORT_SYMBOL vmlinux 0x948de0d8	compat_sock_common_getsockopt
+EXPORT_SYMBOL vmlinux 0x94961283	vunmap
+EXPORT_SYMBOL vmlinux 0x94991ef8	blk_init_tags
+EXPORT_SYMBOL vmlinux 0x94b689a2	proc_symlink
+EXPORT_SYMBOL vmlinux 0x94ef5b9d	remap_pfn_range
+EXPORT_SYMBOL vmlinux 0x94f32beb	__blk_run_queue
+EXPORT_SYMBOL vmlinux 0x951edd94	fifo_create_dflt
+EXPORT_SYMBOL vmlinux 0x9531af67	find_get_pages_tag
+EXPORT_SYMBOL vmlinux 0x95352ea9	acpi_check_mem_region
+EXPORT_SYMBOL vmlinux 0x954488a4	syncookie_secret
+EXPORT_SYMBOL vmlinux 0x954cbb26	vsprintf
+EXPORT_SYMBOL vmlinux 0x9554165c	blk_queue_prep_rq
+EXPORT_SYMBOL vmlinux 0x95783dd4	jbd2_journal_start
+EXPORT_SYMBOL vmlinux 0x95ceb864	key_update
+EXPORT_SYMBOL vmlinux 0x95f40e6e	sock_get_timestampns
+EXPORT_SYMBOL vmlinux 0x95f6270c	tty_shutdown
+EXPORT_SYMBOL vmlinux 0x96120102	nobh_truncate_page
+EXPORT_SYMBOL vmlinux 0x9629486a	per_cpu__cpu_number
+EXPORT_SYMBOL vmlinux 0x96476765	acpi_processor_preregister_performance
+EXPORT_SYMBOL vmlinux 0x964833b7	uart_update_timeout
+EXPORT_SYMBOL vmlinux 0x965b6929	ndisc_mc_map
+EXPORT_SYMBOL vmlinux 0x9680cbfc	d_alloc_root
+EXPORT_SYMBOL vmlinux 0x9682eae9	proc_mkdir
+EXPORT_SYMBOL vmlinux 0x968a93cb	dm_dirty_log_create
+EXPORT_SYMBOL vmlinux 0x968b47ff	tty_mutex
+EXPORT_SYMBOL vmlinux 0x96cd2b04	scsi_sense_key_string
+EXPORT_SYMBOL vmlinux 0x970b3dde	block_fsync
+EXPORT_SYMBOL vmlinux 0x9710c39f	blk_stack_limits
+EXPORT_SYMBOL vmlinux 0x9715fa2c	module_put
+EXPORT_SYMBOL vmlinux 0x97193e7d	xfrm_policy_insert
+EXPORT_SYMBOL vmlinux 0x97212e23	inc_zone_page_state
+EXPORT_SYMBOL vmlinux 0x9734e569	mmc_remove_host
+EXPORT_SYMBOL vmlinux 0x973873ab	_spin_lock
+EXPORT_SYMBOL vmlinux 0x9754ec10	radix_tree_preload
+EXPORT_SYMBOL vmlinux 0x9757e099	ppp_channel_index
+EXPORT_SYMBOL vmlinux 0x97b2ce7b	i2c_smbus_read_byte
+EXPORT_SYMBOL vmlinux 0x97de0ddd	acpi_install_gpe_block
+EXPORT_SYMBOL vmlinux 0x981f4ec8	compat_ipv6_setsockopt
+EXPORT_SYMBOL vmlinux 0x98248028	fb_class
+EXPORT_SYMBOL vmlinux 0x983235b9	mmc_add_host
+EXPORT_SYMBOL vmlinux 0x986e6135	fb_pad_unaligned_buffer
+EXPORT_SYMBOL vmlinux 0x988863e1	scsi_scan_host
+EXPORT_SYMBOL vmlinux 0x988ed85d	set_memory_x
+EXPORT_SYMBOL vmlinux 0x98a32d41	unregister_quota_format
+EXPORT_SYMBOL vmlinux 0x98ba3b81	tcf_hash_new_index
+EXPORT_SYMBOL vmlinux 0x98d0c1dc	km_new_mapping
+EXPORT_SYMBOL vmlinux 0x98fa0611	unregister_nls
+EXPORT_SYMBOL vmlinux 0x98fe61c1	__skb_recv_datagram
+EXPORT_SYMBOL vmlinux 0x992beada	tcf_generic_walker
+EXPORT_SYMBOL vmlinux 0x998e60e7	da903x_query_status
+EXPORT_SYMBOL vmlinux 0x9994c0ca	ps2_is_keyboard_id
+EXPORT_SYMBOL vmlinux 0x999d40a9	journal_update_format
+EXPORT_SYMBOL vmlinux 0x999e8297	vfree
+EXPORT_SYMBOL vmlinux 0x99bfbe39	get_unused_fd
+EXPORT_SYMBOL vmlinux 0x99c7a8b8	jbd2_dev_to_name
+EXPORT_SYMBOL vmlinux 0x99cdc86b	sysctl_tcp_reordering
+EXPORT_SYMBOL vmlinux 0x99d70464	ipv6_dev_get_saddr
+EXPORT_SYMBOL vmlinux 0x99dbdc02	lock_may_write
+EXPORT_SYMBOL vmlinux 0x99dcafae	rfkill_set_states
+EXPORT_SYMBOL vmlinux 0x99ea12ce	panic_blink
+EXPORT_SYMBOL vmlinux 0x9a0ce4e6	jbd2_journal_destroy
+EXPORT_SYMBOL vmlinux 0x9a1dfd65	strpbrk
+EXPORT_SYMBOL vmlinux 0x9a4ee44b	nlmsg_notify
+EXPORT_SYMBOL vmlinux 0x9a9985be	percpu_counter_destroy
+EXPORT_SYMBOL vmlinux 0x9aabc564	crc16
+EXPORT_SYMBOL vmlinux 0x9abd939e	sock_no_setsockopt
+EXPORT_SYMBOL vmlinux 0x9abf53bb	vmtruncate
+EXPORT_SYMBOL vmlinux 0x9ad3562a	rfkill_destroy
+EXPORT_SYMBOL vmlinux 0x9af21719	address_space_init_once
+EXPORT_SYMBOL vmlinux 0x9aff8937	scsi_unblock_requests
+EXPORT_SYMBOL vmlinux 0x9b0a5bcd	register_qdisc
+EXPORT_SYMBOL vmlinux 0x9b23fdfb	md_error
+EXPORT_SYMBOL vmlinux 0x9b36a6f8	pci_get_subsys
+EXPORT_SYMBOL vmlinux 0x9b388444	get_zeroed_page
+EXPORT_SYMBOL vmlinux 0x9b6f658a	tcp_tso_segment
+EXPORT_SYMBOL vmlinux 0x9ba7089d	argv_split
+EXPORT_SYMBOL vmlinux 0x9badd74d	dentry_open
+EXPORT_SYMBOL vmlinux 0x9bbbf2aa	inet_twsk_deschedule
+EXPORT_SYMBOL vmlinux 0x9bde0d3e	mmc_alloc_host
+EXPORT_SYMBOL vmlinux 0x9bf85a0d	vfs_readv
+EXPORT_SYMBOL vmlinux 0x9c012508	fb_parse_edid
+EXPORT_SYMBOL vmlinux 0x9c0ea3cd	memscan
+EXPORT_SYMBOL vmlinux 0x9c40d06e	neigh_seq_start
+EXPORT_SYMBOL vmlinux 0x9c46574a	pci_bus_write_config_byte
+EXPORT_SYMBOL vmlinux 0x9c491f60	sg_alloc_table
+EXPORT_SYMBOL vmlinux 0x9c5ef7a0	tty_port_alloc_xmit_buf
+EXPORT_SYMBOL vmlinux 0x9c71e738	per_cpu__vm_event_states
+EXPORT_SYMBOL vmlinux 0x9ca95a0e	sort
+EXPORT_SYMBOL vmlinux 0x9cad14f7	tc_classify
+EXPORT_SYMBOL vmlinux 0x9caf02ed	put_io_context
+EXPORT_SYMBOL vmlinux 0x9cb96e92	qdisc_put_rtab
+EXPORT_SYMBOL vmlinux 0x9cc8958b	request_key_async
+EXPORT_SYMBOL vmlinux 0x9ccb2622	finish_wait
+EXPORT_SYMBOL vmlinux 0x9ccf9d31	ip6_frag_match
+EXPORT_SYMBOL vmlinux 0x9cd51849	__pagevec_release
+EXPORT_SYMBOL vmlinux 0x9cdfd1ef	tcp_sendpage
+EXPORT_SYMBOL vmlinux 0x9ced38aa	down_trylock
+EXPORT_SYMBOL vmlinux 0x9cefa1c3	jbd2_journal_get_write_access
+EXPORT_SYMBOL vmlinux 0x9cf6eff8	elv_dispatch_sort
+EXPORT_SYMBOL vmlinux 0x9cfd56c5	scsi_print_status
+EXPORT_SYMBOL vmlinux 0x9d2b5eda	ppp_register_compressor
+EXPORT_SYMBOL vmlinux 0x9d33ef5e	acpi_enable
+EXPORT_SYMBOL vmlinux 0x9d343c25	destroy_EII_client
+EXPORT_SYMBOL vmlinux 0x9d35f5a9	save_mount_options
+EXPORT_SYMBOL vmlinux 0x9d3aa376	blk_iopoll_init
+EXPORT_SYMBOL vmlinux 0x9d57531d	pnp_release_card_device
+EXPORT_SYMBOL vmlinux 0x9d7caf66	journal_get_write_access
+EXPORT_SYMBOL vmlinux 0x9d85c068	commit_creds
+EXPORT_SYMBOL vmlinux 0x9da659fe	bdev_read_only
+EXPORT_SYMBOL vmlinux 0x9db21624	hex_dump_to_buffer
+EXPORT_SYMBOL vmlinux 0x9dd18764	lookup_hash
+EXPORT_SYMBOL vmlinux 0x9e04525b	pagecache_write_end
+EXPORT_SYMBOL vmlinux 0x9e19f169	poll_schedule_timeout
+EXPORT_SYMBOL vmlinux 0x9e1e6083	bh_uptodate_or_lock
+EXPORT_SYMBOL vmlinux 0x9e363b6b	acpi_disable_gpe
+EXPORT_SYMBOL vmlinux 0x9e447b7e	tty_free_termios
+EXPORT_SYMBOL vmlinux 0x9e64fbfe	rtc_cmos_read
+EXPORT_SYMBOL vmlinux 0x9e7d6bd0	__udelay
+EXPORT_SYMBOL vmlinux 0x9e9f1714	__bitmap_andnot
+EXPORT_SYMBOL vmlinux 0x9ea0ad49	__sg_free_table
+EXPORT_SYMBOL vmlinux 0x9ea28ec7	acpi_evaluate_object
+EXPORT_SYMBOL vmlinux 0x9ea4ecdc	xfrm_state_lookup_byaddr
+EXPORT_SYMBOL vmlinux 0x9eb65d33	xfrm_policy_flush
+EXPORT_SYMBOL vmlinux 0x9ebd4c04	adjust_resource
+EXPORT_SYMBOL vmlinux 0x9ec65d8e	xfrm_init_state
+EXPORT_SYMBOL vmlinux 0x9ec7c2de	file_remove_suid
+EXPORT_SYMBOL vmlinux 0x9edbecae	snprintf
+EXPORT_SYMBOL vmlinux 0x9ee22b6b	no_llseek
+EXPORT_SYMBOL vmlinux 0x9eecde16	do_brk
+EXPORT_SYMBOL vmlinux 0x9ef33171	jbd2_journal_invalidatepage
+EXPORT_SYMBOL vmlinux 0x9efe84c2	tty_devnum
+EXPORT_SYMBOL vmlinux 0x9f0aa9fb	mb_cache_entry_insert
+EXPORT_SYMBOL vmlinux 0x9f0e037c	call_usermodehelper_pipe
+EXPORT_SYMBOL vmlinux 0x9f100139	jiffies_to_clock_t
+EXPORT_SYMBOL vmlinux 0x9f2811c1	jbd2_journal_ack_err
+EXPORT_SYMBOL vmlinux 0x9f2bdaac	__bitmap_or
+EXPORT_SYMBOL vmlinux 0x9f2d613e	param_set_bool
+EXPORT_SYMBOL vmlinux 0x9f424093	free_user_ns
+EXPORT_SYMBOL vmlinux 0x9f4c13b8	key_alloc
+EXPORT_SYMBOL vmlinux 0x9f636ca6	dquot_release
+EXPORT_SYMBOL vmlinux 0x9f698679	blk_get_backing_dev_info
+EXPORT_SYMBOL vmlinux 0x9f87bf5f	blk_rq_unmap_user
+EXPORT_SYMBOL vmlinux 0x9f8dba0d	key_unlink
+EXPORT_SYMBOL vmlinux 0x9f92efc4	mmiotrace_printk
+EXPORT_SYMBOL vmlinux 0x9f93c80e	pci_bus_alloc_resource
+EXPORT_SYMBOL vmlinux 0x9f984513	strrchr
+EXPORT_SYMBOL vmlinux 0x9fa274b4	dq_data_lock
+EXPORT_SYMBOL vmlinux 0x9fd04470	netpoll_print_options
+EXPORT_SYMBOL vmlinux 0xa02d1971	sock_no_listen
+EXPORT_SYMBOL vmlinux 0xa03523d5	security_unix_stream_connect
+EXPORT_SYMBOL vmlinux 0xa0366540	md_integrity_register
+EXPORT_SYMBOL vmlinux 0xa04a01bd	qdisc_class_hash_insert
+EXPORT_SYMBOL vmlinux 0xa05c03df	mempool_kmalloc
+EXPORT_SYMBOL vmlinux 0xa06a46d3	nf_unregister_queue_handler
+EXPORT_SYMBOL vmlinux 0xa0799345	iget_failed
+EXPORT_SYMBOL vmlinux 0xa08b8c42	dquot_transfer
+EXPORT_SYMBOL vmlinux 0xa08c6a7a	create_mnt_ns
+EXPORT_SYMBOL vmlinux 0xa09e4602	inet_accept
+EXPORT_SYMBOL vmlinux 0xa0a3103e	d_instantiate
+EXPORT_SYMBOL vmlinux 0xa0a474a7	journal_try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0xa0a4ac21	tcf_hash_insert
+EXPORT_SYMBOL vmlinux 0xa0b04675	vmalloc_32
+EXPORT_SYMBOL vmlinux 0xa0b4a6a1	remove_arg_zero
+EXPORT_SYMBOL vmlinux 0xa0c36e83	is_bad_inode
+EXPORT_SYMBOL vmlinux 0xa0ceef51	out_of_line_wait_on_bit
+EXPORT_SYMBOL vmlinux 0xa0d3d560	ksize
+EXPORT_SYMBOL vmlinux 0xa0df3e70	xfrm_policy_delete
+EXPORT_SYMBOL vmlinux 0xa0ecb649	locks_remove_posix
+EXPORT_SYMBOL vmlinux 0xa0fbac79	wake_up_bit
+EXPORT_SYMBOL vmlinux 0xa1012177	mb_cache_entry_free
+EXPORT_SYMBOL vmlinux 0xa1034176	acpi_match_device_ids
+EXPORT_SYMBOL vmlinux 0xa108eb4d	sysctl_optmem_max
+EXPORT_SYMBOL vmlinux 0xa120d33c	tty_unregister_ldisc
+EXPORT_SYMBOL vmlinux 0xa13798f8	printk_ratelimit
+EXPORT_SYMBOL vmlinux 0xa171b92f	f_setown
+EXPORT_SYMBOL vmlinux 0xa18ccfbb	udp_lib_getsockopt
+EXPORT_SYMBOL vmlinux 0xa18d6a1c	jbd2_journal_revoke
+EXPORT_SYMBOL vmlinux 0xa1b759ce	fb_add_videomode
+EXPORT_SYMBOL vmlinux 0xa1ba4b95	memcpy_fromiovecend
+EXPORT_SYMBOL vmlinux 0xa1c76e0a	_cond_resched
+EXPORT_SYMBOL vmlinux 0xa1ce4c2d	blk_end_request_cur
+EXPORT_SYMBOL vmlinux 0xa1cea0b8	proc_dointvec
+EXPORT_SYMBOL vmlinux 0xa207c239	bio_copy_user
+EXPORT_SYMBOL vmlinux 0xa20ce1b8	net_msg_warn
+EXPORT_SYMBOL vmlinux 0xa21d2345	stop_tty
+EXPORT_SYMBOL vmlinux 0xa2263d7c	generic_unplug_device
+EXPORT_SYMBOL vmlinux 0xa246b161	jbd2_journal_set_features
+EXPORT_SYMBOL vmlinux 0xa2576d65	prepare_binprm
+EXPORT_SYMBOL vmlinux 0xa268a4d1	input_register_handle
+EXPORT_SYMBOL vmlinux 0xa2782320	dm_put_device
+EXPORT_SYMBOL vmlinux 0xa28e76e6	schedule_work
+EXPORT_SYMBOL vmlinux 0xa29b1708	tcp_memory_allocated
+EXPORT_SYMBOL vmlinux 0xa2a1e5c9	_write_lock_bh
+EXPORT_SYMBOL vmlinux 0xa2a5fd77	inet_ehash_secret
+EXPORT_SYMBOL vmlinux 0xa2b8a2ba	__init_rwsem
+EXPORT_SYMBOL vmlinux 0xa2c55528	dma_async_device_register
+EXPORT_SYMBOL vmlinux 0xa2ccf767	blk_queue_bounce
+EXPORT_SYMBOL vmlinux 0xa31f172d	__copy_from_user_inatomic
+EXPORT_SYMBOL vmlinux 0xa324bc31	elevator_init
+EXPORT_SYMBOL vmlinux 0xa329f07e	register_shrinker
+EXPORT_SYMBOL vmlinux 0xa332cdd1	security_tun_dev_attach
+EXPORT_SYMBOL vmlinux 0xa33f7c7c	nla_strlcpy
+EXPORT_SYMBOL vmlinux 0xa350a8f8	set_memory_array_uc
+EXPORT_SYMBOL vmlinux 0xa35de80f	ipv4_config
+EXPORT_SYMBOL vmlinux 0xa373570e	dm_dirty_log_type_register
+EXPORT_SYMBOL vmlinux 0xa3749cab	unregister_sysctl_table
+EXPORT_SYMBOL vmlinux 0xa39fbd35	simple_fsync
+EXPORT_SYMBOL vmlinux 0xa3a5be95	memmove
+EXPORT_SYMBOL vmlinux 0xa3bbcd80	acpi_set_gpe_type
+EXPORT_SYMBOL vmlinux 0xa3d0d641	blk_init_queue_node
+EXPORT_SYMBOL vmlinux 0xa3ec8b90	__nla_put
+EXPORT_SYMBOL vmlinux 0xa3f02fec	ethtool_op_get_tso
+EXPORT_SYMBOL vmlinux 0xa415b384	try_to_del_timer_sync
+EXPORT_SYMBOL vmlinux 0xa41996db	pci_enable_device_io
+EXPORT_SYMBOL vmlinux 0xa41f9a8f	igrab
+EXPORT_SYMBOL vmlinux 0xa444a70a	agp_bridge
+EXPORT_SYMBOL vmlinux 0xa449798a	neigh_table_clear
+EXPORT_SYMBOL vmlinux 0xa44ad274	wait_for_completion_interruptible_timeout
+EXPORT_SYMBOL vmlinux 0xa47b47fc	module_refcount
+EXPORT_SYMBOL vmlinux 0xa480d2a4	clip_tbl_hook
+EXPORT_SYMBOL vmlinux 0xa4b94fea	iowrite8_rep
+EXPORT_SYMBOL vmlinux 0xa4bde9e5	key_type_keyring
+EXPORT_SYMBOL vmlinux 0xa4d4f0e6	global_cache_flush
+EXPORT_SYMBOL vmlinux 0xa4df7f60	pci_unregister_driver
+EXPORT_SYMBOL vmlinux 0xa4eb6c8b	sock_i_uid
+EXPORT_SYMBOL vmlinux 0xa50a9ee0	pci_dev_get
+EXPORT_SYMBOL vmlinux 0xa56e02ae	nla_reserve_nohdr
+EXPORT_SYMBOL vmlinux 0xa56f1315	mempool_free
+EXPORT_SYMBOL vmlinux 0xa5808bbf	tasklet_init
+EXPORT_SYMBOL vmlinux 0xa58b6804	nla_parse
+EXPORT_SYMBOL vmlinux 0xa5922bb1	kfifo_init
+EXPORT_SYMBOL vmlinux 0xa598e29c	vesa_modes
+EXPORT_SYMBOL vmlinux 0xa5adbe8c	ida_destroy
+EXPORT_SYMBOL vmlinux 0xa5bbf77f	d_lookup
+EXPORT_SYMBOL vmlinux 0xa5f73da7	noop_qdisc
+EXPORT_SYMBOL vmlinux 0xa5f7c25a	journal_dirty_metadata
+EXPORT_SYMBOL vmlinux 0xa5fc1b2c	install_exec_creds
+EXPORT_SYMBOL vmlinux 0xa5fc669d	input_flush_device
+EXPORT_SYMBOL vmlinux 0xa617b15f	simple_sync_file
+EXPORT_SYMBOL vmlinux 0xa626b73e	dget_locked
+EXPORT_SYMBOL vmlinux 0xa63d85ab	slhc_remember
+EXPORT_SYMBOL vmlinux 0xa65070bc	inet_listen
+EXPORT_SYMBOL vmlinux 0xa650efe9	pci_back_from_sleep
+EXPORT_SYMBOL vmlinux 0xa65869bc	netif_device_detach
+EXPORT_SYMBOL vmlinux 0xa663ddef	blk_queue_find_tag
+EXPORT_SYMBOL vmlinux 0xa68124fa	hweight8
+EXPORT_SYMBOL vmlinux 0xa681fe88	generate_random_uuid
+EXPORT_SYMBOL vmlinux 0xa6b64078	vfs_read
+EXPORT_SYMBOL vmlinux 0xa6cc0e5f	blk_init_queue
+EXPORT_SYMBOL vmlinux 0xa6dcc773	rb_insert_color
+EXPORT_SYMBOL vmlinux 0xa6ec6f2d	blk_integrity_compare
+EXPORT_SYMBOL vmlinux 0xa6fc8e0a	dquot_free_inode
+EXPORT_SYMBOL vmlinux 0xa7052f9f	acpi_root_dir
+EXPORT_SYMBOL vmlinux 0xa70913e8	textsearch_find_continuous
+EXPORT_SYMBOL vmlinux 0xa70fabbe	release_evntsel_nmi
+EXPORT_SYMBOL vmlinux 0xa7100878	vfs_quota_enable
+EXPORT_SYMBOL vmlinux 0xa71f8cde	do_splice_from
+EXPORT_SYMBOL vmlinux 0xa72a0f5b	nr_online_nodes
+EXPORT_SYMBOL vmlinux 0xa786950e	get_user_pages
+EXPORT_SYMBOL vmlinux 0xa78b569e	__lock_buffer
+EXPORT_SYMBOL vmlinux 0xa7949cd9	pci_bus_set_ops
+EXPORT_SYMBOL vmlinux 0xa7a358f2	blk_sync_queue
+EXPORT_SYMBOL vmlinux 0xa7aa1548	swiotlb_sync_single_for_cpu
+EXPORT_SYMBOL vmlinux 0xa7aaeea1	mb_cache_entry_get
+EXPORT_SYMBOL vmlinux 0xa7c221ce	tty_hangup
+EXPORT_SYMBOL vmlinux 0xa7ca9322	do_sync_read
+EXPORT_SYMBOL vmlinux 0xa7e69a48	tcp_init_xmit_timers
+EXPORT_SYMBOL vmlinux 0xa835ae44	tty_port_close
+EXPORT_SYMBOL vmlinux 0xa8532866	vm_insert_pfn
+EXPORT_SYMBOL vmlinux 0xa869bab8	neigh_seq_stop
+EXPORT_SYMBOL vmlinux 0xa8850c29	journal_init_dev
+EXPORT_SYMBOL vmlinux 0xa886a958	krealloc
+EXPORT_SYMBOL vmlinux 0xa888b302	tty_set_operations
+EXPORT_SYMBOL vmlinux 0xa8a6f639	__check_region
+EXPORT_SYMBOL vmlinux 0xa8ac2ac3	udplite_prot
+EXPORT_SYMBOL vmlinux 0xa8bf6889	registered_fb
+EXPORT_SYMBOL vmlinux 0xa8caca96	key_put
+EXPORT_SYMBOL vmlinux 0xa8d22cd3	keyring_search
+EXPORT_SYMBOL vmlinux 0xa8d68abd	acpi_warning
+EXPORT_SYMBOL vmlinux 0xa8d7a5f1	__kill_fasync
+EXPORT_SYMBOL vmlinux 0xa8fbb54c	journal_stop
+EXPORT_SYMBOL vmlinux 0xa8fbf582	idr_replace
+EXPORT_SYMBOL vmlinux 0xa8fef7bb	security_unix_may_send
+EXPORT_SYMBOL vmlinux 0xa9012f32	scsi_init_io
+EXPORT_SYMBOL vmlinux 0xa90c4971	unregister_binfmt
+EXPORT_SYMBOL vmlinux 0xa91b5561	acpi_video_backlight_support
+EXPORT_SYMBOL vmlinux 0xa990a71f	__neigh_event_send
+EXPORT_SYMBOL vmlinux 0xa999a985	dev_set_mtu
+EXPORT_SYMBOL vmlinux 0xa99ce956	init_buffer
+EXPORT_SYMBOL vmlinux 0xa9bd2676	__vmalloc
+EXPORT_SYMBOL vmlinux 0xa9d59dcb	__module_put_and_exit
+EXPORT_SYMBOL vmlinux 0xa9d70ae5	qdisc_watchdog_cancel
+EXPORT_SYMBOL vmlinux 0xa9f847ee	kernel_sock_ioctl
+EXPORT_SYMBOL vmlinux 0xa9f9d067	block_prepare_write
+EXPORT_SYMBOL vmlinux 0xa9fafcb2	scsi_device_lookup
+EXPORT_SYMBOL vmlinux 0xa9fcf31d	wait_for_completion_interruptible
+EXPORT_SYMBOL vmlinux 0xaa1be8f6	tty_port_close_end
+EXPORT_SYMBOL vmlinux 0xaa4f7fbc	dst_release
+EXPORT_SYMBOL vmlinux 0xaa5075d7	netlink_unicast
+EXPORT_SYMBOL vmlinux 0xaa53d16e	register_sysctl_table
+EXPORT_SYMBOL vmlinux 0xaa6a3e8c	__set_page_dirty_nobuffers
+EXPORT_SYMBOL vmlinux 0xaa837e88	qdisc_destroy
+EXPORT_SYMBOL vmlinux 0xaa84a8ae	acpi_processor_power_init_bm_check
+EXPORT_SYMBOL vmlinux 0xaab06af8	_write_lock_irqsave
+EXPORT_SYMBOL vmlinux 0xaabb6bea	tty_port_init
+EXPORT_SYMBOL vmlinux 0xaaca670e	filemap_write_and_wait
+EXPORT_SYMBOL vmlinux 0xaae8ab0e	acpi_bus_power_manageable
+EXPORT_SYMBOL vmlinux 0xaaf45875	acpi_lid_notifier_unregister
+EXPORT_SYMBOL vmlinux 0xaafdc258	strcasecmp
+EXPORT_SYMBOL vmlinux 0xab2ce17c	tcp_shutdown
+EXPORT_SYMBOL vmlinux 0xab600421	probe_irq_off
+EXPORT_SYMBOL vmlinux 0xab65ed80	set_memory_uc
+EXPORT_SYMBOL vmlinux 0xab770678	rdmsr_safe_regs_on_cpu
+EXPORT_SYMBOL vmlinux 0xaba77086	pci_set_mwi
+EXPORT_SYMBOL vmlinux 0xaba9ff34	allocate_resource
+EXPORT_SYMBOL vmlinux 0xabb50bdb	agp_generic_destroy_page
+EXPORT_SYMBOL vmlinux 0xabd0c91c	rtc_time_to_tm
+EXPORT_SYMBOL vmlinux 0xabd159cb	__scsi_alloc_queue
+EXPORT_SYMBOL vmlinux 0xabd3ffb9	agp_generic_create_gatt_table
+EXPORT_SYMBOL vmlinux 0xabe85a21	idr_init
+EXPORT_SYMBOL vmlinux 0xabef257b	jbd2_journal_release_buffer
+EXPORT_SYMBOL vmlinux 0xac0ba8c1	blk_iopoll_disable
+EXPORT_SYMBOL vmlinux 0xac383451	radix_tree_tag_clear
+EXPORT_SYMBOL vmlinux 0xac58ea5e	acpi_unload_table_id
+EXPORT_SYMBOL vmlinux 0xac6794a7	seq_write
+EXPORT_SYMBOL vmlinux 0xac6855b0	gen_kill_estimator
+EXPORT_SYMBOL vmlinux 0xac76fb11	pcim_iomap_regions
+EXPORT_SYMBOL vmlinux 0xac8fb3b4	__neigh_for_each_release
+EXPORT_SYMBOL vmlinux 0xac97fe6e	journal_release_buffer
+EXPORT_SYMBOL vmlinux 0xaccabc6a	in4_pton
+EXPORT_SYMBOL vmlinux 0xaccc929f	blk_rq_map_user
+EXPORT_SYMBOL vmlinux 0xacd7db36	inet6_release
+EXPORT_SYMBOL vmlinux 0xacdeb154	__tracepoint_module_get
+EXPORT_SYMBOL vmlinux 0xacf4d843	match_strdup
+EXPORT_SYMBOL vmlinux 0xacf565ba	load_nls
+EXPORT_SYMBOL vmlinux 0xad0413d4	match_hex
+EXPORT_SYMBOL vmlinux 0xad100f0b	sk_stream_wait_connect
+EXPORT_SYMBOL vmlinux 0xad13c689	acpi_os_execute
+EXPORT_SYMBOL vmlinux 0xad25fb12	__memcpy
+EXPORT_SYMBOL vmlinux 0xad6b0d82	kmem_cache_shrink
+EXPORT_SYMBOL vmlinux 0xad6bc591	fput
+EXPORT_SYMBOL vmlinux 0xad8a034f	llc_add_pack
+EXPORT_SYMBOL vmlinux 0xad8de1b3	acpi_remove_address_space_handler
+EXPORT_SYMBOL vmlinux 0xad8f6e10	generic_block_fiemap
+EXPORT_SYMBOL vmlinux 0xad94a4e3	phy_driver_register
+EXPORT_SYMBOL vmlinux 0xada8058f	vfs_quota_off
+EXPORT_SYMBOL vmlinux 0xadaa2657	cpufreq_register_notifier
+EXPORT_SYMBOL vmlinux 0xaddd4bd2	rtnl_create_link
+EXPORT_SYMBOL vmlinux 0xadeb98b7	tcp_ioctl
+EXPORT_SYMBOL vmlinux 0xae4f209c	skb_recycle_check
+EXPORT_SYMBOL vmlinux 0xae890ad2	ip6_xmit
+EXPORT_SYMBOL vmlinux 0xae8e83e9	simple_transaction_get
+EXPORT_SYMBOL vmlinux 0xaec41102	agp_collect_device_status
+EXPORT_SYMBOL vmlinux 0xaec62b16	phy_connect_direct
+EXPORT_SYMBOL vmlinux 0xaed013b9	posix_acl_valid
+EXPORT_SYMBOL vmlinux 0xaf3dd7dc	scsi_logging_level
+EXPORT_SYMBOL vmlinux 0xaf6e5e61	gnet_stats_finish_copy
+EXPORT_SYMBOL vmlinux 0xaf73f1b4	__break_lease
+EXPORT_SYMBOL vmlinux 0xaf98a8e3	dev_add_pack
+EXPORT_SYMBOL vmlinux 0xafe82e10	strcspn
+EXPORT_SYMBOL vmlinux 0xb00ef5ac	proc_doulongvec_ms_jiffies_minmax
+EXPORT_SYMBOL vmlinux 0xb0114f5a	simple_link
+EXPORT_SYMBOL vmlinux 0xb014ac10	do_SAK
+EXPORT_SYMBOL vmlinux 0xb02b866c	uart_match_port
+EXPORT_SYMBOL vmlinux 0xb04ea8f0	agp_rebind_memory
+EXPORT_SYMBOL vmlinux 0xb051909f	ida_init
+EXPORT_SYMBOL vmlinux 0xb055d8da	posix_acl_to_xattr
+EXPORT_SYMBOL vmlinux 0xb06f37c8	swiotlb_sync_sg_for_device
+EXPORT_SYMBOL vmlinux 0xb070777f	pci_pme_active
+EXPORT_SYMBOL vmlinux 0xb07dfb3d	acpi_remove_gpe_handler
+EXPORT_SYMBOL vmlinux 0xb08b8827	inet_register_protosw
+EXPORT_SYMBOL vmlinux 0xb09486f3	km_policy_expired
+EXPORT_SYMBOL vmlinux 0xb097a68c	unmap_underlying_metadata
+EXPORT_SYMBOL vmlinux 0xb0a5091a	dev_disable_lro
+EXPORT_SYMBOL vmlinux 0xb0a94457	generic_write_end
+EXPORT_SYMBOL vmlinux 0xb0b847ac	__bitmap_full
+EXPORT_SYMBOL vmlinux 0xb0b8f4c4	__sk_dst_check
+EXPORT_SYMBOL vmlinux 0xb0baeaed	set_user_nice
+EXPORT_SYMBOL vmlinux 0xb0ce26b3	generic_file_buffered_write
+EXPORT_SYMBOL vmlinux 0xb0df0f46	vfs_quota_on_mount
+EXPORT_SYMBOL vmlinux 0xb0e10781	get_option
+EXPORT_SYMBOL vmlinux 0xb0fe5e63	eth_header_cache_update
+EXPORT_SYMBOL vmlinux 0xb1096f88	kick_iocb
+EXPORT_SYMBOL vmlinux 0xb111be59	scsi_host_get
+EXPORT_SYMBOL vmlinux 0xb11fa1ce	strlcat
+EXPORT_SYMBOL vmlinux 0xb121390a	probe_irq_on
+EXPORT_SYMBOL vmlinux 0xb133fdeb	__alloc_pages_nodemask
+EXPORT_SYMBOL vmlinux 0xb1355634	qdisc_calculate_pkt_len
+EXPORT_SYMBOL vmlinux 0xb1612c9d	ip_mc_join_group
+EXPORT_SYMBOL vmlinux 0xb1645a2e	sg_free_table
+EXPORT_SYMBOL vmlinux 0xb165ceb1	path_get
+EXPORT_SYMBOL vmlinux 0xb175ff39	inet_csk_clear_xmit_timers
+EXPORT_SYMBOL vmlinux 0xb18e02c3	radix_tree_gang_lookup_tag
+EXPORT_SYMBOL vmlinux 0xb19760c3	bitmap_onto
+EXPORT_SYMBOL vmlinux 0xb1984ace	compat_sock_get_timestampns
+EXPORT_SYMBOL vmlinux 0xb1c3a01a	oops_in_progress
+EXPORT_SYMBOL vmlinux 0xb1cfad22	rdmsr_on_cpu
+EXPORT_SYMBOL vmlinux 0xb1d78986	page_symlink_inode_operations
+EXPORT_SYMBOL vmlinux 0xb1f975aa	unlock_kernel
+EXPORT_SYMBOL vmlinux 0xb20cd9e3	tcp_proc_register
+EXPORT_SYMBOL vmlinux 0xb20ecf88	acpi_run_osc
+EXPORT_SYMBOL vmlinux 0xb219d56c	wbinvd_on_cpu
+EXPORT_SYMBOL vmlinux 0xb224fbe2	param_get_short
+EXPORT_SYMBOL vmlinux 0xb22fe6a3	netdev_increment_features
+EXPORT_SYMBOL vmlinux 0xb2531113	phy_register_fixup
+EXPORT_SYMBOL vmlinux 0xb2682405	utf8_to_utf32
+EXPORT_SYMBOL vmlinux 0xb279da12	pv_lock_ops
+EXPORT_SYMBOL vmlinux 0xb28c8229	sync_blockdev
+EXPORT_SYMBOL vmlinux 0xb2b14a77	netif_carrier_on
+EXPORT_SYMBOL vmlinux 0xb2e55898	cpu_possible_mask
+EXPORT_SYMBOL vmlinux 0xb2ecb7f2	udp_disconnect
+EXPORT_SYMBOL vmlinux 0xb2fd5ceb	__put_user_4
+EXPORT_SYMBOL vmlinux 0xb30d3c96	blk_queue_max_sectors
+EXPORT_SYMBOL vmlinux 0xb3205415	wait_for_completion_killable
+EXPORT_SYMBOL vmlinux 0xb3284531	acpi_dbg_layer
+EXPORT_SYMBOL vmlinux 0xb34d4c2e	acpi_terminate
+EXPORT_SYMBOL vmlinux 0xb34f9d88	xfrm_lookup
+EXPORT_SYMBOL vmlinux 0xb352177e	find_first_bit
+EXPORT_SYMBOL vmlinux 0xb3687af3	netdev_bonding_change
+EXPORT_SYMBOL vmlinux 0xb36d0e7f	acpi_bus_get_status
+EXPORT_SYMBOL vmlinux 0xb3946ef3	mmc_card_can_sleep
+EXPORT_SYMBOL vmlinux 0xb397e54e	swiotlb_alloc_coherent
+EXPORT_SYMBOL vmlinux 0xb3994c7a	per_cpu__kstat
+EXPORT_SYMBOL vmlinux 0xb3a307c6	si_meminfo
+EXPORT_SYMBOL vmlinux 0xb3c42c94	per_cpu__x86_bios_cpu_apicid
+EXPORT_SYMBOL vmlinux 0xb3d89a96	dm_dirty_log_type_unregister
+EXPORT_SYMBOL vmlinux 0xb3ff1f69	free_pages_exact
+EXPORT_SYMBOL vmlinux 0xb423dba1	console_blanked
+EXPORT_SYMBOL vmlinux 0xb42453d3	param_get_invbool
+EXPORT_SYMBOL vmlinux 0xb4279ab7	downgrade_write
+EXPORT_SYMBOL vmlinux 0xb4390f9a	mcount
+EXPORT_SYMBOL vmlinux 0xb44212f9	acpi_device_hid
+EXPORT_SYMBOL vmlinux 0xb44fb4cf	phy_device_register
+EXPORT_SYMBOL vmlinux 0xb45b24f6	k8_nb_ids
+EXPORT_SYMBOL vmlinux 0xb4709322	scsi_dev_info_add_list
+EXPORT_SYMBOL vmlinux 0xb48783a4	call_usermodehelper_setup
+EXPORT_SYMBOL vmlinux 0xb49d3bce	vga_set_legacy_decoding
+EXPORT_SYMBOL vmlinux 0xb4b0ee4e	down_read
+EXPORT_SYMBOL vmlinux 0xb4b491f6	__starget_for_each_device
+EXPORT_SYMBOL vmlinux 0xb4c36c1d	phy_attach
+EXPORT_SYMBOL vmlinux 0xb4ca9447	__kfifo_get
+EXPORT_SYMBOL vmlinux 0xb4cc9939	md_register_thread
+EXPORT_SYMBOL vmlinux 0xb4def5ac	simple_rename
+EXPORT_SYMBOL vmlinux 0xb5044271	vsscanf
+EXPORT_SYMBOL vmlinux 0xb50d3e56	agp_alloc_bridge
+EXPORT_SYMBOL vmlinux 0xb512c036	read_cache_pages
+EXPORT_SYMBOL vmlinux 0xb523ecaa	seq_printf
+EXPORT_SYMBOL vmlinux 0xb54533f7	usecs_to_jiffies
+EXPORT_SYMBOL vmlinux 0xb596f91c	skb_append
+EXPORT_SYMBOL vmlinux 0xb59e0375	vfs_create
+EXPORT_SYMBOL vmlinux 0xb5a459dc	unregister_blkdev
+EXPORT_SYMBOL vmlinux 0xb5c2b94c	bitmap_start_sync
+EXPORT_SYMBOL vmlinux 0xb5ca1c46	slhc_free
+EXPORT_SYMBOL vmlinux 0xb5cc0828	mmc_host_enable
+EXPORT_SYMBOL vmlinux 0xb5cef264	journal_check_available_features
+EXPORT_SYMBOL vmlinux 0xb5d52c27	ec_transaction
+EXPORT_SYMBOL vmlinux 0xb5f28b5f	__any_online_cpu
+EXPORT_SYMBOL vmlinux 0xb611fb71	generic_file_aio_read
+EXPORT_SYMBOL vmlinux 0xb6244511	sg_init_one
+EXPORT_SYMBOL vmlinux 0xb6327ff2	vm_insert_mixed
+EXPORT_SYMBOL vmlinux 0xb6353555	per_cpu__x86_cpu_to_apicid
+EXPORT_SYMBOL vmlinux 0xb656ef05	bio_kmalloc
+EXPORT_SYMBOL vmlinux 0xb678366f	int_sqrt
+EXPORT_SYMBOL vmlinux 0xb68cc290	simple_transaction_set
+EXPORT_SYMBOL vmlinux 0xb6a61a86	qdisc_get_rtab
+EXPORT_SYMBOL vmlinux 0xb6a68816	find_last_bit
+EXPORT_SYMBOL vmlinux 0xb6bffb99	kstat_irqs_cpu
+EXPORT_SYMBOL vmlinux 0xb6c5a973	scsi_show_result
+EXPORT_SYMBOL vmlinux 0xb6cbe886	acpi_get_node
+EXPORT_SYMBOL vmlinux 0xb6d08113	compat_mc_getsockopt
+EXPORT_SYMBOL vmlinux 0xb6e227aa	rtc_lock
+EXPORT_SYMBOL vmlinux 0xb6e49692	pci_release_region
+EXPORT_SYMBOL vmlinux 0xb719e602	nf_ip6_checksum
+EXPORT_SYMBOL vmlinux 0xb7256063	posix_lock_file_wait
+EXPORT_SYMBOL vmlinux 0xb73e42fa	starget_for_each_device
+EXPORT_SYMBOL vmlinux 0xb758b225	acpi_disable_event
+EXPORT_SYMBOL vmlinux 0xb76c56f6	mmc_wait_for_req
+EXPORT_SYMBOL vmlinux 0xb79254a5	scsi_eh_restore_cmnd
+EXPORT_SYMBOL vmlinux 0xb7942e31	dev_get_flags
+EXPORT_SYMBOL vmlinux 0xb798b8e4	flow_cache_lookup
+EXPORT_SYMBOL vmlinux 0xb7c6a8c9	bdev_stack_limits
+EXPORT_SYMBOL vmlinux 0xb7ccb3c7	twl4030_i2c_read_u8
+EXPORT_SYMBOL vmlinux 0xb7d7c136	close_bdev_exclusive
+EXPORT_SYMBOL vmlinux 0xb7f14362	__skb_checksum_complete
+EXPORT_SYMBOL vmlinux 0xb807c6c5	submit_bio
+EXPORT_SYMBOL vmlinux 0xb811c171	security_inode_permission
+EXPORT_SYMBOL vmlinux 0xb813ce5a	timecompare_transform
+EXPORT_SYMBOL vmlinux 0xb81cf266	filemap_fdatawait_range
+EXPORT_SYMBOL vmlinux 0xb81d3926	bio_init
+EXPORT_SYMBOL vmlinux 0xb8320d02	udp_flush_pending_frames
+EXPORT_SYMBOL vmlinux 0xb839029c	elv_rb_add
+EXPORT_SYMBOL vmlinux 0xb86e4ab9	random32
+EXPORT_SYMBOL vmlinux 0xb88568ba	swiotlb_unmap_sg
+EXPORT_SYMBOL vmlinux 0xb893e46c	tty_port_carrier_raised
+EXPORT_SYMBOL vmlinux 0xb89af9bf	srandom32
+EXPORT_SYMBOL vmlinux 0xb8af87a0	mpage_writepages
+EXPORT_SYMBOL vmlinux 0xb8b1d78a	blk_put_request
+EXPORT_SYMBOL vmlinux 0xb8bd6293	fb_pan_display
+EXPORT_SYMBOL vmlinux 0xb8cf4ac8	jbd2_journal_restart
+EXPORT_SYMBOL vmlinux 0xb8e7ce2c	__put_user_8
+EXPORT_SYMBOL vmlinux 0xb8f6bc42	scsi_add_device
+EXPORT_SYMBOL vmlinux 0xb904be71	uart_write_wakeup
+EXPORT_SYMBOL vmlinux 0xb90f78a0	devm_ioport_map
+EXPORT_SYMBOL vmlinux 0xb91c1a83	scsi_free_command
+EXPORT_SYMBOL vmlinux 0xb98298f2	pcix_set_mmrbc
+EXPORT_SYMBOL vmlinux 0xb98a0185	rtc_tm_to_time
+EXPORT_SYMBOL vmlinux 0xb9af4775	alloc_etherdev_mq
+EXPORT_SYMBOL vmlinux 0xb9fd2205	add_efi_memmap
+EXPORT_SYMBOL vmlinux 0xba03ab8e	xfrm_input_resume
+EXPORT_SYMBOL vmlinux 0xba2d8594	ec_read
+EXPORT_SYMBOL vmlinux 0xba497f13	loops_per_jiffy
+EXPORT_SYMBOL vmlinux 0xba7b2290	zero_fill_bio
+EXPORT_SYMBOL vmlinux 0xba855fe1	tcp_md5_hash_header
+EXPORT_SYMBOL vmlinux 0xba8f2735	inet_release
+EXPORT_SYMBOL vmlinux 0xbaa2782a	kstrndup
+EXPORT_SYMBOL vmlinux 0xbaaab8ae	timespec_to_jiffies
+EXPORT_SYMBOL vmlinux 0xbb06b8d1	agp_alloc_page_array
+EXPORT_SYMBOL vmlinux 0xbb167766	fb_var_to_videomode
+EXPORT_SYMBOL vmlinux 0xbb189cad	disallow_signal
+EXPORT_SYMBOL vmlinux 0xbb1fad6a	flush_delayed_work
+EXPORT_SYMBOL vmlinux 0xbb251839	generic_cont_expand_simple
+EXPORT_SYMBOL vmlinux 0xbb458f82	x86_dma_fallback_dev
+EXPORT_SYMBOL vmlinux 0xbb5bd648	pci_get_bus_and_slot
+EXPORT_SYMBOL vmlinux 0xbb5d343d	xfrm_get_acqseq
+EXPORT_SYMBOL vmlinux 0xbb6dcf7c	napi_frags_finish
+EXPORT_SYMBOL vmlinux 0xbb783d89	scsi_remove_device
+EXPORT_SYMBOL vmlinux 0xbb8a4129	vlan_gro_frags
+EXPORT_SYMBOL vmlinux 0xbbe0aefc	dmam_free_coherent
+EXPORT_SYMBOL vmlinux 0xbbe39037	journal_extend
+EXPORT_SYMBOL vmlinux 0xbc7c41d5	xfrm_state_delete_tunnel
+EXPORT_SYMBOL vmlinux 0xbc948572	__vlan_hwaccel_rx
+EXPORT_SYMBOL vmlinux 0xbcc308bb	strnlen_user
+EXPORT_SYMBOL vmlinux 0xbccbb49c	idr_remove_all
+EXPORT_SYMBOL vmlinux 0xbccdb1d2	blk_rq_map_user_iov
+EXPORT_SYMBOL vmlinux 0xbcd9fbeb	vfs_rename
+EXPORT_SYMBOL vmlinux 0xbcec0aa8	d_instantiate_unique
+EXPORT_SYMBOL vmlinux 0xbd0cd6a8	mmc_suspend_host
+EXPORT_SYMBOL vmlinux 0xbd270894	rfkill_set_hw_state
+EXPORT_SYMBOL vmlinux 0xbd2fd04e	__xfrm_state_destroy
+EXPORT_SYMBOL vmlinux 0xbd3505f8	scsi_remove_host
+EXPORT_SYMBOL vmlinux 0xbd4e6b8f	nobh_write_end
+EXPORT_SYMBOL vmlinux 0xbd6af209	phy_stop_interrupts
+EXPORT_SYMBOL vmlinux 0xbdaf5b07	acpi_os_read_port
+EXPORT_SYMBOL vmlinux 0xbdbe0e56	dma_set_mask
+EXPORT_SYMBOL vmlinux 0xbdc984d5	bdget
+EXPORT_SYMBOL vmlinux 0xbdf5c25c	rb_next
+EXPORT_SYMBOL vmlinux 0xbe05113d	genphy_config_advert
+EXPORT_SYMBOL vmlinux 0xbe1e3c58	udp_lib_setsockopt
+EXPORT_SYMBOL vmlinux 0xbe3bce03	xfrm_state_delete
+EXPORT_SYMBOL vmlinux 0xbe3f4b94	agp_free_page_array
+EXPORT_SYMBOL vmlinux 0xbe499d81	copy_to_user
+EXPORT_SYMBOL vmlinux 0xbe4be58e	scsi_target_quiesce
+EXPORT_SYMBOL vmlinux 0xbe58e340	agp_generic_insert_memory
+EXPORT_SYMBOL vmlinux 0xbe59127f	splice_from_pipe_end
+EXPORT_SYMBOL vmlinux 0xbe6565ea	tcp_splice_read
+EXPORT_SYMBOL vmlinux 0xbe6b17f7	textsearch_prepare
+EXPORT_SYMBOL vmlinux 0xbe78411d	km_state_notify
+EXPORT_SYMBOL vmlinux 0xbeb66826	posix_unblock_lock
+EXPORT_SYMBOL vmlinux 0xbecdce74	ida_pre_get
+EXPORT_SYMBOL vmlinux 0xbed60566	sub_preempt_count
+EXPORT_SYMBOL vmlinux 0xbed7552b	pnp_start_dev
+EXPORT_SYMBOL vmlinux 0xbef43296	console_conditional_schedule
+EXPORT_SYMBOL vmlinux 0xbf2a8d08	skb_pull
+EXPORT_SYMBOL vmlinux 0xbf2d3d9e	rfkill_get_led_trigger_name
+EXPORT_SYMBOL vmlinux 0xbf3c582a	sb_min_blocksize
+EXPORT_SYMBOL vmlinux 0xbf3e005b	mb_cache_entry_find_first
+EXPORT_SYMBOL vmlinux 0xbf4cfeb9	neigh_sysctl_register
+EXPORT_SYMBOL vmlinux 0xbf7fd2f5	schedule_timeout_killable
+EXPORT_SYMBOL vmlinux 0xbf8ce7a2	boot_cpu_data
+EXPORT_SYMBOL vmlinux 0xbf9bcc8d	__cap_empty_set
+EXPORT_SYMBOL vmlinux 0xbfbe725e	agp_generic_remove_memory
+EXPORT_SYMBOL vmlinux 0xbfc177bc	iowrite32_rep
+EXPORT_SYMBOL vmlinux 0xbfcd5404	generic_file_splice_write
+EXPORT_SYMBOL vmlinux 0xbfd37413	llc_set_station_handler
+EXPORT_SYMBOL vmlinux 0xbfd8cf1f	vfs_fsync
+EXPORT_SYMBOL vmlinux 0xbfd99069	netif_rx
+EXPORT_SYMBOL vmlinux 0xbfee3ad5	loop_unregister_transfer
+EXPORT_SYMBOL vmlinux 0xc001aca7	rfkill_alloc
+EXPORT_SYMBOL vmlinux 0xc003c637	__strncpy_from_user
+EXPORT_SYMBOL vmlinux 0xc0044724	blk_set_default_limits
+EXPORT_SYMBOL vmlinux 0xc00486c8	scsi_target_resume
+EXPORT_SYMBOL vmlinux 0xc011ec72	textsearch_register
+EXPORT_SYMBOL vmlinux 0xc0580937	rb_erase
+EXPORT_SYMBOL vmlinux 0xc05ef80e	cap_netlink_recv
+EXPORT_SYMBOL vmlinux 0xc06509d1	init_file
+EXPORT_SYMBOL vmlinux 0xc07d43ae	acpi_evaluate_reference
+EXPORT_SYMBOL vmlinux 0xc09651d9	crc32_be
+EXPORT_SYMBOL vmlinux 0xc09acf5c	scsi_dma_unmap
+EXPORT_SYMBOL vmlinux 0xc0a3d105	find_next_bit
+EXPORT_SYMBOL vmlinux 0xc0bf6ead	timecounter_cyc2time
+EXPORT_SYMBOL vmlinux 0xc0c55ce0	kernel_sendpage
+EXPORT_SYMBOL vmlinux 0xc0d15904	inode_permission
+EXPORT_SYMBOL vmlinux 0xc10d4f6b	agp_generic_destroy_pages
+EXPORT_SYMBOL vmlinux 0xc1314170	tr_type_trans
+EXPORT_SYMBOL vmlinux 0xc1396280	pci_enable_device
+EXPORT_SYMBOL vmlinux 0xc13bcae4	fb_blank
+EXPORT_SYMBOL vmlinux 0xc149c79b	ip_cmsg_recv
+EXPORT_SYMBOL vmlinux 0xc14c3f52	set_blocksize
+EXPORT_SYMBOL vmlinux 0xc18fa079	slow_work_cancel
+EXPORT_SYMBOL vmlinux 0xc1d2f9ac	inet6_register_protosw
+EXPORT_SYMBOL vmlinux 0xc2235a57	register_8022_client
+EXPORT_SYMBOL vmlinux 0xc235eb34	ilookup
+EXPORT_SYMBOL vmlinux 0xc2424641	agp3_generic_cleanup
+EXPORT_SYMBOL vmlinux 0xc254af48	dcache_lock
+EXPORT_SYMBOL vmlinux 0xc256e762	__bitmap_equal
+EXPORT_SYMBOL vmlinux 0xc25704d9	iput
+EXPORT_SYMBOL vmlinux 0xc2a1873b	d_find_alias
+EXPORT_SYMBOL vmlinux 0xc2be9086	copy_io_context
+EXPORT_SYMBOL vmlinux 0xc2cd3a0a	scsicam_bios_param
+EXPORT_SYMBOL vmlinux 0xc2dab4a8	cdrom_get_media_event
+EXPORT_SYMBOL vmlinux 0xc2e463d3	rtnl_notify
+EXPORT_SYMBOL vmlinux 0xc2e587d1	reset_devices
+EXPORT_SYMBOL vmlinux 0xc32871e9	elv_rb_latter_request
+EXPORT_SYMBOL vmlinux 0xc33f6f4c	on_each_cpu
+EXPORT_SYMBOL vmlinux 0xc34a8df5	buffer_migrate_page
+EXPORT_SYMBOL vmlinux 0xc3654cf7	pci_request_region_exclusive
+EXPORT_SYMBOL vmlinux 0xc37038fa	tty_check_change
+EXPORT_SYMBOL vmlinux 0xc382660a	acpi_notifier_call_chain
+EXPORT_SYMBOL vmlinux 0xc390e690	md_wakeup_thread
+EXPORT_SYMBOL vmlinux 0xc394e3d6	skb_append_datato_frags
+EXPORT_SYMBOL vmlinux 0xc3a5c220	scsi_finish_command
+EXPORT_SYMBOL vmlinux 0xc3aaf0a9	__put_user_1
+EXPORT_SYMBOL vmlinux 0xc3aec665	bdi_init
+EXPORT_SYMBOL vmlinux 0xc3c6033a	pci_remove_bus
+EXPORT_SYMBOL vmlinux 0xc3db1ee1	start_tty
+EXPORT_SYMBOL vmlinux 0xc3f02a34	ip6_route_output
+EXPORT_SYMBOL vmlinux 0xc3f5cdb9	lock_rename
+EXPORT_SYMBOL vmlinux 0xc402cc99	register_acpi_notifier
+EXPORT_SYMBOL vmlinux 0xc420081d	blk_start_request
+EXPORT_SYMBOL vmlinux 0xc42765b4	elv_rq_merge_ok
+EXPORT_SYMBOL vmlinux 0xc427f37d	vfs_set_dqblk
+EXPORT_SYMBOL vmlinux 0xc43ab43d	nla_put_nohdr
+EXPORT_SYMBOL vmlinux 0xc456e061	cdrom_media_changed
+EXPORT_SYMBOL vmlinux 0xc464cc8f	cdrom_ioctl
+EXPORT_SYMBOL vmlinux 0xc46a6543	xfrm_unregister_type
+EXPORT_SYMBOL vmlinux 0xc499ae1e	kstrdup
+EXPORT_SYMBOL vmlinux 0xc4c04046	pci_get_slot
+EXPORT_SYMBOL vmlinux 0xc4c4708d	__inc_zone_page_state
+EXPORT_SYMBOL vmlinux 0xc4d4584d	input_release_device
+EXPORT_SYMBOL vmlinux 0xc4d55a2c	blk_peek_request
+EXPORT_SYMBOL vmlinux 0xc4d73567	qdisc_tree_decrease_qlen
+EXPORT_SYMBOL vmlinux 0xc4d89569	vfs_follow_link
+EXPORT_SYMBOL vmlinux 0xc4e9c01c	cpu_active_mask
+EXPORT_SYMBOL vmlinux 0xc5230f65	register_md_personality
+EXPORT_SYMBOL vmlinux 0xc52db613	skb_push
+EXPORT_SYMBOL vmlinux 0xc52f5714	fb_videomode_to_var
+EXPORT_SYMBOL vmlinux 0xc536dfd5	find_vma
+EXPORT_SYMBOL vmlinux 0xc53c882d	idr_get_new
+EXPORT_SYMBOL vmlinux 0xc5534d64	ioread16
+EXPORT_SYMBOL vmlinux 0xc558530d	profile_pc
+EXPORT_SYMBOL vmlinux 0xc55f7dc7	_write_trylock
+EXPORT_SYMBOL vmlinux 0xc580cbbf	cont_write_begin
+EXPORT_SYMBOL vmlinux 0xc5824a1f	wireless_send_event
+EXPORT_SYMBOL vmlinux 0xc5844fb8	__per_cpu_offset
+EXPORT_SYMBOL vmlinux 0xc5a3176c	ppp_output_wakeup
+EXPORT_SYMBOL vmlinux 0xc5a597ca	posix_lock_file
+EXPORT_SYMBOL vmlinux 0xc5b41c34	lro_flush_all
+EXPORT_SYMBOL vmlinux 0xc5d9c46c	agp_try_unsupported_boot
+EXPORT_SYMBOL vmlinux 0xc5fb3dd6	mutex_lock
+EXPORT_SYMBOL vmlinux 0xc60da3b0	tcf_em_register
+EXPORT_SYMBOL vmlinux 0xc610db98	pci_fixup_cardbus
+EXPORT_SYMBOL vmlinux 0xc622b297	ethtool_op_set_ufo
+EXPORT_SYMBOL vmlinux 0xc640e152	alloc_disk
+EXPORT_SYMBOL vmlinux 0xc64b6508	jbd2_journal_init_dev
+EXPORT_SYMBOL vmlinux 0xc65abeb7	agp3_generic_sizes
+EXPORT_SYMBOL vmlinux 0xc691b895	jbd2_journal_check_used_features
+EXPORT_SYMBOL vmlinux 0xc69afcf6	ipv6_chk_prefix
+EXPORT_SYMBOL vmlinux 0xc6b8fdb1	add_disk
+EXPORT_SYMBOL vmlinux 0xc6ba6a7f	bio_get_nr_vecs
+EXPORT_SYMBOL vmlinux 0xc6c3835a	do_sync_write
+EXPORT_SYMBOL vmlinux 0xc7167e26	generic_make_request
+EXPORT_SYMBOL vmlinux 0xc7208c3a	serial8250_resume_port
+EXPORT_SYMBOL vmlinux 0xc722227e	posix_acl_clone
+EXPORT_SYMBOL vmlinux 0xc72f55f8	phy_print_status
+EXPORT_SYMBOL vmlinux 0xc740c64a	memchr
+EXPORT_SYMBOL vmlinux 0xc799fd0a	sock_common_getsockopt
+EXPORT_SYMBOL vmlinux 0xc79bcd36	dm_vcalloc
+EXPORT_SYMBOL vmlinux 0xc7a24d76	sysfs_format_mac
+EXPORT_SYMBOL vmlinux 0xc7a4fbed	rtnl_lock
+EXPORT_SYMBOL vmlinux 0xc7b59c3c	pnp_unregister_card_driver
+EXPORT_SYMBOL vmlinux 0xc7d57979	alloc_netdev_mq
+EXPORT_SYMBOL vmlinux 0xc833c2a1	mdiobus_register
+EXPORT_SYMBOL vmlinux 0xc856f189	vfs_quota_on_path
+EXPORT_SYMBOL vmlinux 0xc85ad975	simple_readpage
+EXPORT_SYMBOL vmlinux 0xc85f3e07	vga_get
+EXPORT_SYMBOL vmlinux 0xc863806a	security_sb_set_mnt_opts
+EXPORT_SYMBOL vmlinux 0xc8694c74	acpi_bus_generate_proc_event
+EXPORT_SYMBOL vmlinux 0xc872d82a	redirty_page_for_writepage
+EXPORT_SYMBOL vmlinux 0xc897c382	sg_init_table
+EXPORT_SYMBOL vmlinux 0xc8abf2fd	neigh_lookup_nodev
+EXPORT_SYMBOL vmlinux 0xc8b57c27	autoremove_wake_function
+EXPORT_SYMBOL vmlinux 0xc8ca3e25	acpi_get_child
+EXPORT_SYMBOL vmlinux 0xc8d17a65	thermal_cooling_device_unregister
+EXPORT_SYMBOL vmlinux 0xc8d526f5	__ht_create_irq
+EXPORT_SYMBOL vmlinux 0xc90b7716	drop_super
+EXPORT_SYMBOL vmlinux 0xc917e655	debug_smp_processor_id
+EXPORT_SYMBOL vmlinux 0xc92e1750	netlink_set_err
+EXPORT_SYMBOL vmlinux 0xc971d43b	blk_alloc_queue_node
+EXPORT_SYMBOL vmlinux 0xc98ce8c2	journal_destroy
+EXPORT_SYMBOL vmlinux 0xc998d641	icmp_err_convert
+EXPORT_SYMBOL vmlinux 0xc9ab2eef	acpi_os_wait_events_complete
+EXPORT_SYMBOL vmlinux 0xc9c246dd	km_report
+EXPORT_SYMBOL vmlinux 0xc9e0c9dc	pci_release_regions
+EXPORT_SYMBOL vmlinux 0xc9e194e6	netif_napi_del
+EXPORT_SYMBOL vmlinux 0xc9e90e0f	xfrm4_prepare_output
+EXPORT_SYMBOL vmlinux 0xc9e9db44	pci_claim_resource
+EXPORT_SYMBOL vmlinux 0xc9ec8704	udp_table
+EXPORT_SYMBOL vmlinux 0xca388711	vlan_gro_receive
+EXPORT_SYMBOL vmlinux 0xca490833	sock_common_setsockopt
+EXPORT_SYMBOL vmlinux 0xca5dbc50	scsi_print_sense_hdr
+EXPORT_SYMBOL vmlinux 0xca6b74b2	blk_integrity_unregister
+EXPORT_SYMBOL vmlinux 0xca7f8b41	jbd2_journal_dirty_metadata
+EXPORT_SYMBOL vmlinux 0xca8acc78	acpi_dbg_level
+EXPORT_SYMBOL vmlinux 0xcabdc0ac	simple_pin_fs
+EXPORT_SYMBOL vmlinux 0xcac440a1	vfs_unlink
+EXPORT_SYMBOL vmlinux 0xcac946bd	vfs_writev
+EXPORT_SYMBOL vmlinux 0xcaeac8bf	tty_port_free_xmit_buf
+EXPORT_SYMBOL vmlinux 0xcaf9ab85	nf_log_bind_pf
+EXPORT_SYMBOL vmlinux 0xcaff14a1	scsi_prep_return
+EXPORT_SYMBOL vmlinux 0xcb0a54e5	ppp_input_error
+EXPORT_SYMBOL vmlinux 0xcb319c7c	security_path_mkdir
+EXPORT_SYMBOL vmlinux 0xcb559bcf	inode_change_ok
+EXPORT_SYMBOL vmlinux 0xcb6beb40	hweight32
+EXPORT_SYMBOL vmlinux 0xcb7131fb	fb_get_options
+EXPORT_SYMBOL vmlinux 0xcb733bf2	acpi_bus_set_power
+EXPORT_SYMBOL vmlinux 0xcb8a4d75	ilookup5_nowait
+EXPORT_SYMBOL vmlinux 0xcbb9d7db	groups_free
+EXPORT_SYMBOL vmlinux 0xcbcc61d4	create_proc_entry
+EXPORT_SYMBOL vmlinux 0xcbd162a0	generic_show_options
+EXPORT_SYMBOL vmlinux 0xcbe23a13	dquot_release_reserved_space
+EXPORT_SYMBOL vmlinux 0xcbfba3bb	mdiobus_alloc
+EXPORT_SYMBOL vmlinux 0xcbfcf2ca	tty_name
+EXPORT_SYMBOL vmlinux 0xcc07af75	strnlen
+EXPORT_SYMBOL vmlinux 0xcc08196a	scsi_cmd_print_sense_hdr
+EXPORT_SYMBOL vmlinux 0xcc248d26	serial8250_suspend_port
+EXPORT_SYMBOL vmlinux 0xcc33d0b8	inode_set_bytes
+EXPORT_SYMBOL vmlinux 0xcc36f32e	fb_unregister_client
+EXPORT_SYMBOL vmlinux 0xcc3f176f	per_cpu__x86_cpu_to_node_map
+EXPORT_SYMBOL vmlinux 0xcc5005fe	msleep_interruptible
+EXPORT_SYMBOL vmlinux 0xcc51ee50	dma_spin_lock
+EXPORT_SYMBOL vmlinux 0xcc52d4e8	rwsem_down_read_failed
+EXPORT_SYMBOL vmlinux 0xcc714941	end_buffer_async_write
+EXPORT_SYMBOL vmlinux 0xcc7fa952	local_bh_enable_ip
+EXPORT_SYMBOL vmlinux 0xcc80ff0a	swiotlb_sync_sg_for_cpu
+EXPORT_SYMBOL vmlinux 0xcc8a8718	dm_table_get_size
+EXPORT_SYMBOL vmlinux 0xccb6062c	key_link
+EXPORT_SYMBOL vmlinux 0xccd373d7	agp_generic_alloc_by_type
+EXPORT_SYMBOL vmlinux 0xccd675fc	i2c_release_client
+EXPORT_SYMBOL vmlinux 0xccdc409a	__xfrm_route_forward
+EXPORT_SYMBOL vmlinux 0xccf437f7	sock_init_data
+EXPORT_SYMBOL vmlinux 0xcd8ae5d6	phy_detach
+EXPORT_SYMBOL vmlinux 0xcd90fe6b	init_net
+EXPORT_SYMBOL vmlinux 0xcda4a65c	udp_prot
+EXPORT_SYMBOL vmlinux 0xcdf9e930	lock_fb_info
+EXPORT_SYMBOL vmlinux 0xcdfbee7b	rtc_dev_update_irq_enable_emul
+EXPORT_SYMBOL vmlinux 0xce19bac5	register_inet6addr_notifier
+EXPORT_SYMBOL vmlinux 0xce28ffd0	__mod_zone_page_state
+EXPORT_SYMBOL vmlinux 0xce36ded6	sysctl_tcp_mem
+EXPORT_SYMBOL vmlinux 0xce3cd445	pcim_enable_device
+EXPORT_SYMBOL vmlinux 0xce4904a4	acpi_leave_sleep_state
+EXPORT_SYMBOL vmlinux 0xce5ac24f	zlib_inflate_workspacesize
+EXPORT_SYMBOL vmlinux 0xce774c7c	dev_load
+EXPORT_SYMBOL vmlinux 0xce9079e2	nf_log_packet
+EXPORT_SYMBOL vmlinux 0xcef5f72e	bio_add_pc_page
+EXPORT_SYMBOL vmlinux 0xcef90d6e	fail_migrate_page
+EXPORT_SYMBOL vmlinux 0xcefcd99a	serial8250_unregister_port
+EXPORT_SYMBOL vmlinux 0xcf02ed49	ethtool_op_get_flags
+EXPORT_SYMBOL vmlinux 0xcf137365	set_binfmt
+EXPORT_SYMBOL vmlinux 0xcf1d28ab	acpi_error
+EXPORT_SYMBOL vmlinux 0xcf202b30	inet_stream_connect
+EXPORT_SYMBOL vmlinux 0xcf5cd00b	xfrm4_rcv
+EXPORT_SYMBOL vmlinux 0xcf6cfe1f	msrs_free
+EXPORT_SYMBOL vmlinux 0xcf6f73a8	ps2_end_command
+EXPORT_SYMBOL vmlinux 0xcf75808c	xfrm_state_update
+EXPORT_SYMBOL vmlinux 0xcf7f5b79	proc_create_data
+EXPORT_SYMBOL vmlinux 0xcfadd723	__percpu_counter_add
+EXPORT_SYMBOL vmlinux 0xcfb9006e	jiffies_to_timeval
+EXPORT_SYMBOL vmlinux 0xcfc4ac73	sb_set_blocksize
+EXPORT_SYMBOL vmlinux 0xcff53400	kref_put
+EXPORT_SYMBOL vmlinux 0xcfffc0ce	xfrm_cfg_mutex
+EXPORT_SYMBOL vmlinux 0xd00e8140	generic_write_sync
+EXPORT_SYMBOL vmlinux 0xd0181f4f	__bitmap_xor
+EXPORT_SYMBOL vmlinux 0xd08197fa	acpi_load_tables
+EXPORT_SYMBOL vmlinux 0xd0e12d9b	inet_csk_destroy_sock
+EXPORT_SYMBOL vmlinux 0xd0ee38b8	schedule_timeout_uninterruptible
+EXPORT_SYMBOL vmlinux 0xd0fa0528	nf_ip_checksum
+EXPORT_SYMBOL vmlinux 0xd0fef3b2	agp_free_key
+EXPORT_SYMBOL vmlinux 0xd12398d6	ip_route_input
+EXPORT_SYMBOL vmlinux 0xd12f0ee7	dev_addr_add
+EXPORT_SYMBOL vmlinux 0xd139eaa5	grab_cache_page_nowait
+EXPORT_SYMBOL vmlinux 0xd1472061	acpi_pci_register_driver
+EXPORT_SYMBOL vmlinux 0xd1648503	tty_port_close_start
+EXPORT_SYMBOL vmlinux 0xd1757c80	tcp_recvmsg
+EXPORT_SYMBOL vmlinux 0xd1878c8c	mmc_power_save_host
+EXPORT_SYMBOL vmlinux 0xd18b6eb2	acpi_unmap_lsapic
+EXPORT_SYMBOL vmlinux 0xd19bb294	acpi_install_address_space_handler
+EXPORT_SYMBOL vmlinux 0xd1a51de8	generic_block_bmap
+EXPORT_SYMBOL vmlinux 0xd1c25efd	ip_queue_xmit
+EXPORT_SYMBOL vmlinux 0xd1f6c5f3	smp_num_siblings
+EXPORT_SYMBOL vmlinux 0xd1f91bcd	dev_base_lock
+EXPORT_SYMBOL vmlinux 0xd209994b	genphy_resume
+EXPORT_SYMBOL vmlinux 0xd210c441	pci_enable_msi_block
+EXPORT_SYMBOL vmlinux 0xd2235d73	clocksource_register
+EXPORT_SYMBOL vmlinux 0xd22c2144	generic_error_remove_page
+EXPORT_SYMBOL vmlinux 0xd22cc1f4	kernel_setsockopt
+EXPORT_SYMBOL vmlinux 0xd23945c4	ip_nat_decode_session
+EXPORT_SYMBOL vmlinux 0xd251d7b0	security_socket_getpeersec_dgram
+EXPORT_SYMBOL vmlinux 0xd2555f19	jiffies_64_to_clock_t
+EXPORT_SYMBOL vmlinux 0xd25d4f74	console_blank_hook
+EXPORT_SYMBOL vmlinux 0xd26254c9	napi_gro_flush
+EXPORT_SYMBOL vmlinux 0xd267d42c	down_killable
+EXPORT_SYMBOL vmlinux 0xd2707e27	xfrm_register_type
+EXPORT_SYMBOL vmlinux 0xd2858060	vc_cons
+EXPORT_SYMBOL vmlinux 0xd2965f6f	kthread_should_stop
+EXPORT_SYMBOL vmlinux 0xd2a75ee0	dmi_first_match
+EXPORT_SYMBOL vmlinux 0xd2a77c05	inet_shutdown
+EXPORT_SYMBOL vmlinux 0xd2b094e5	sock_no_sendpage
+EXPORT_SYMBOL vmlinux 0xd2bddf4f	block_truncate_page
+EXPORT_SYMBOL vmlinux 0xd2f1e5cd	jbd2_journal_lock_updates
+EXPORT_SYMBOL vmlinux 0xd344c780	phy_driver_unregister
+EXPORT_SYMBOL vmlinux 0xd34f0c62	gen_pool_create
+EXPORT_SYMBOL vmlinux 0xd3729966	scsi_host_alloc
+EXPORT_SYMBOL vmlinux 0xd3951da4	acpi_resource_to_address64
+EXPORT_SYMBOL vmlinux 0xd3996f0d	page_readlink
+EXPORT_SYMBOL vmlinux 0xd39b7027	inet_put_port
+EXPORT_SYMBOL vmlinux 0xd3a3df8a	proto_unregister
+EXPORT_SYMBOL vmlinux 0xd3a870da	input_event
+EXPORT_SYMBOL vmlinux 0xd3af979c	memdup_user
+EXPORT_SYMBOL vmlinux 0xd3f74cf1	interruptible_sleep_on_timeout
+EXPORT_SYMBOL vmlinux 0xd4140ffa	unregister_con_driver
+EXPORT_SYMBOL vmlinux 0xd42b7232	_write_unlock_bh
+EXPORT_SYMBOL vmlinux 0xd42c2b39	skb_free_datagram
+EXPORT_SYMBOL vmlinux 0xd44d4907	block_sync_page
+EXPORT_SYMBOL vmlinux 0xd4596a0f	simple_transaction_release
+EXPORT_SYMBOL vmlinux 0xd4752913	new_inode
+EXPORT_SYMBOL vmlinux 0xd488f642	do_splice_to
+EXPORT_SYMBOL vmlinux 0xd4c4ce79	simple_fill_super
+EXPORT_SYMBOL vmlinux 0xd4d7205d	clocksource_change_rating
+EXPORT_SYMBOL vmlinux 0xd504feb3	inode_newsize_ok
+EXPORT_SYMBOL vmlinux 0xd50fef48	acpi_detach_data
+EXPORT_SYMBOL vmlinux 0xd51cc572	scsi_bios_ptable
+EXPORT_SYMBOL vmlinux 0xd51fd7e7	bio_integrity_prep
+EXPORT_SYMBOL vmlinux 0xd5263820	mb_cache_destroy
+EXPORT_SYMBOL vmlinux 0xd5296b60	dev_get_drvdata
+EXPORT_SYMBOL vmlinux 0xd55b3a1a	cpufreq_get_policy
+EXPORT_SYMBOL vmlinux 0xd56b0f72	simple_getattr
+EXPORT_SYMBOL vmlinux 0xd57f8789	iommu_num_pages
+EXPORT_SYMBOL vmlinux 0xd5840104	dquot_reserve_space
+EXPORT_SYMBOL vmlinux 0xd58cfa61	console_stop
+EXPORT_SYMBOL vmlinux 0xd5c7c61d	sysctl_string
+EXPORT_SYMBOL vmlinux 0xd5d6b881	input_filter_device
+EXPORT_SYMBOL vmlinux 0xd5ea4462	__lookup_one_len
+EXPORT_SYMBOL vmlinux 0xd60c69e0	udp_proc_register
+EXPORT_SYMBOL vmlinux 0xd60d7af4	ida_remove
+EXPORT_SYMBOL vmlinux 0xd61d42a8	dmam_pool_destroy
+EXPORT_SYMBOL vmlinux 0xd62c833f	schedule_timeout
+EXPORT_SYMBOL vmlinux 0xd63a37da	dquot_commit
+EXPORT_SYMBOL vmlinux 0xd6574d39	iov_iter_copy_from_user_atomic
+EXPORT_SYMBOL vmlinux 0xd66fa85c	acpi_bus_get_device
+EXPORT_SYMBOL vmlinux 0xd699167a	ppp_input
+EXPORT_SYMBOL vmlinux 0xd6a78d08	smp_call_function_single
+EXPORT_SYMBOL vmlinux 0xd6b33026	cpu_khz
+EXPORT_SYMBOL vmlinux 0xd6c26b7e	do_mmap_pgoff
+EXPORT_SYMBOL vmlinux 0xd6cc2780	invalidate_bdev
+EXPORT_SYMBOL vmlinux 0xd6d68c6b	vm_stat
+EXPORT_SYMBOL vmlinux 0xd6ee688f	vmalloc
+EXPORT_SYMBOL vmlinux 0xd6fb3735	bitmap_end_sync
+EXPORT_SYMBOL vmlinux 0xd727f7d5	acpi_bus_start
+EXPORT_SYMBOL vmlinux 0xd76bcc41	phy_ethtool_gset
+EXPORT_SYMBOL vmlinux 0xd776d599	set_create_files_as
+EXPORT_SYMBOL vmlinux 0xd77a5aa5	__bitmap_and
+EXPORT_SYMBOL vmlinux 0xd79b5a02	allow_signal
+EXPORT_SYMBOL vmlinux 0xd7a1ab79	kernel_getpeername
+EXPORT_SYMBOL vmlinux 0xd7a6fafa	panic_notifier_list
+EXPORT_SYMBOL vmlinux 0xd7b6e501	skb_unlink
+EXPORT_SYMBOL vmlinux 0xd7cd7c2f	__sk_mem_reclaim
+EXPORT_SYMBOL vmlinux 0xd7d1b856	skb_insert
+EXPORT_SYMBOL vmlinux 0xd7d65f2a	pci_prepare_to_sleep
+EXPORT_SYMBOL vmlinux 0xd7dbc82d	dm_table_get
+EXPORT_SYMBOL vmlinux 0xd7dd777b	reserve_perfctr_nmi
+EXPORT_SYMBOL vmlinux 0xd804f3c7	file_update_time
+EXPORT_SYMBOL vmlinux 0xd826a0a9	sg_miter_next
+EXPORT_SYMBOL vmlinux 0xd835a869	shrink_dcache_sb
+EXPORT_SYMBOL vmlinux 0xd8366486	compat_ip_getsockopt
+EXPORT_SYMBOL vmlinux 0xd83791bc	nf_conntrack_destroy
+EXPORT_SYMBOL vmlinux 0xd844f466	scsi_device_set_state
+EXPORT_SYMBOL vmlinux 0xd84f1ad6	__splice_from_pipe
+EXPORT_SYMBOL vmlinux 0xd851af78	up_write
+EXPORT_SYMBOL vmlinux 0xd869ad84	napi_gro_receive
+EXPORT_SYMBOL vmlinux 0xd8730dd2	mmc_free_host
+EXPORT_SYMBOL vmlinux 0xd8739cb7	sk_send_sigurg
+EXPORT_SYMBOL vmlinux 0xd87f23f2	dev_kfree_skb_irq
+EXPORT_SYMBOL vmlinux 0xd89da37f	movable_zone
+EXPORT_SYMBOL vmlinux 0xd8b89a0b	thermal_zone_bind_cooling_device
+EXPORT_SYMBOL vmlinux 0xd8c185f1	vmap
+EXPORT_SYMBOL vmlinux 0xd8e484f0	register_chrdev_region
+EXPORT_SYMBOL vmlinux 0xd9091363	acpi_install_notify_handler
+EXPORT_SYMBOL vmlinux 0xd916ef76	dma_ops
+EXPORT_SYMBOL vmlinux 0xd917c158	per_cpu__node_number
+EXPORT_SYMBOL vmlinux 0xd922ee1a	journal_restart
+EXPORT_SYMBOL vmlinux 0xd92e3d96	set_irq_chip
+EXPORT_SYMBOL vmlinux 0xd9356a4b	sock_no_getname
+EXPORT_SYMBOL vmlinux 0xd94c47c0	ipv6_setsockopt
+EXPORT_SYMBOL vmlinux 0xd985dc99	mempool_free_pages
+EXPORT_SYMBOL vmlinux 0xd9a22672	rfkill_register
+EXPORT_SYMBOL vmlinux 0xd9d07303	phy_ethtool_sset
+EXPORT_SYMBOL vmlinux 0xd9d80c2a	get_sb_nodev
+EXPORT_SYMBOL vmlinux 0xda082d8c	n_tty_ioctl_helper
+EXPORT_SYMBOL vmlinux 0xda084d3f	filp_open
+EXPORT_SYMBOL vmlinux 0xda0a6b0e	acpi_map_lsapic
+EXPORT_SYMBOL vmlinux 0xda0be3dd	tcp_enter_memory_pressure
+EXPORT_SYMBOL vmlinux 0xda1a7335	kasprintf
+EXPORT_SYMBOL vmlinux 0xda329064	tcp_v4_conn_request
+EXPORT_SYMBOL vmlinux 0xda347bd5	ip_dev_find
+EXPORT_SYMBOL vmlinux 0xda4107f1	flock_lock_file_wait
+EXPORT_SYMBOL vmlinux 0xda44360c	may_umount
+EXPORT_SYMBOL vmlinux 0xda4629e4	radix_tree_insert
+EXPORT_SYMBOL vmlinux 0xda4ff5f5	tcp_create_openreq_child
+EXPORT_SYMBOL vmlinux 0xda619fd5	vmalloc_to_page
+EXPORT_SYMBOL vmlinux 0xda70582c	mapping_tagged
+EXPORT_SYMBOL vmlinux 0xda7ca6cb	fb_mode_is_equal
+EXPORT_SYMBOL vmlinux 0xda8af7ad	fb_find_nearest_mode
+EXPORT_SYMBOL vmlinux 0xda928914	nmi_watchdog
+EXPORT_SYMBOL vmlinux 0xdabf256b	fsync_bdev
+EXPORT_SYMBOL vmlinux 0xdb069365	pci_find_parent_resource
+EXPORT_SYMBOL vmlinux 0xdb11a1a2	pci_choose_state
+EXPORT_SYMBOL vmlinux 0xdb75a855	dev_alloc_name
+EXPORT_SYMBOL vmlinux 0xdba0a2ae	request_firmware_nowait
+EXPORT_SYMBOL vmlinux 0xdbb5ad5c	node_to_cpumask_map
+EXPORT_SYMBOL vmlinux 0xdbcd416e	sysctl_ip_nonlocal_bind
+EXPORT_SYMBOL vmlinux 0xdbf7e56d	arp_tbl
+EXPORT_SYMBOL vmlinux 0xdc047fc4	scsi_dev_info_list_add_keyed
+EXPORT_SYMBOL vmlinux 0xdc053205	udp_memory_allocated
+EXPORT_SYMBOL vmlinux 0xdc0b5767	vlan_dev_real_dev
+EXPORT_SYMBOL vmlinux 0xdc14eda7	pci_pci_problems
+EXPORT_SYMBOL vmlinux 0xdc181d79	scsi_report_device_reset
+EXPORT_SYMBOL vmlinux 0xdc2adb35	add_taint
+EXPORT_SYMBOL vmlinux 0xdc43a9c8	daemonize
+EXPORT_SYMBOL vmlinux 0xdc5630f9	skb_copy_and_csum_bits
+EXPORT_SYMBOL vmlinux 0xdc70df8a	seq_release_private
+EXPORT_SYMBOL vmlinux 0xdc861446	dec_zone_page_state
+EXPORT_SYMBOL vmlinux 0xdc873a70	screen_info
+EXPORT_SYMBOL vmlinux 0xdc8eb984	mmc_card_sleep
+EXPORT_SYMBOL vmlinux 0xdca0e950	genl_register_family
+EXPORT_SYMBOL vmlinux 0xdcb0349b	sys_close
+EXPORT_SYMBOL vmlinux 0xdcb6651c	dev_change_flags
+EXPORT_SYMBOL vmlinux 0xdcc32409	tcf_hash_search
+EXPORT_SYMBOL vmlinux 0xdcc3bd9e	arch_debugfs_dir
+EXPORT_SYMBOL vmlinux 0xdcc77f06	clear_bdi_congested
+EXPORT_SYMBOL vmlinux 0xdcf3a97e	skb_abort_seq_read
+EXPORT_SYMBOL vmlinux 0xdcfd6b6a	scsi_rescan_device
+EXPORT_SYMBOL vmlinux 0xdd05bac3	jbd2_journal_start_commit
+EXPORT_SYMBOL vmlinux 0xdd23a2cc	arp_find
+EXPORT_SYMBOL vmlinux 0xdd4d7969	tcp_timewait_state_process
+EXPORT_SYMBOL vmlinux 0xdd56dbac	agp_allocate_memory
+EXPORT_SYMBOL vmlinux 0xdd68bda0	ht_create_irq
+EXPORT_SYMBOL vmlinux 0xdd6db170	phy_attach_direct
+EXPORT_SYMBOL vmlinux 0xdd773d8b	pci_enable_wake
+EXPORT_SYMBOL vmlinux 0xdd77b7df	inode_init_once
+EXPORT_SYMBOL vmlinux 0xddb13e7e	skb_copy_expand
+EXPORT_SYMBOL vmlinux 0xddc1a46b	write_cache_pages
+EXPORT_SYMBOL vmlinux 0xdddf28d0	inet_csk_delete_keepalive_timer
+EXPORT_SYMBOL vmlinux 0xdded2d28	neigh_seq_next
+EXPORT_SYMBOL vmlinux 0xddf34887	pci_disable_device
+EXPORT_SYMBOL vmlinux 0xde0bdcff	memset
+EXPORT_SYMBOL vmlinux 0xde137fe7	deny_write_access
+EXPORT_SYMBOL vmlinux 0xde20a7d2	arch_acpi_processor_init_pdc
+EXPORT_SYMBOL vmlinux 0xde31b902	blk_limits_io_opt
+EXPORT_SYMBOL vmlinux 0xde42dbc0	cdrom_number_of_slots
+EXPORT_SYMBOL vmlinux 0xde463f98	elevator_exit
+EXPORT_SYMBOL vmlinux 0xde691076	blk_end_request
+EXPORT_SYMBOL vmlinux 0xde75b689	set_irq_type
+EXPORT_SYMBOL vmlinux 0xde7b4ef5	dst_destroy
+EXPORT_SYMBOL vmlinux 0xde8346c5	input_register_device
+EXPORT_SYMBOL vmlinux 0xde8b75b3	iget_locked
+EXPORT_SYMBOL vmlinux 0xde912e0d	mmc_resume_host
+EXPORT_SYMBOL vmlinux 0xde9360ba	totalram_pages
+EXPORT_SYMBOL vmlinux 0xde9b17ed	agp3_generic_fetch_size
+EXPORT_SYMBOL vmlinux 0xdec8df7c	tcp_v4_md5_lookup
+EXPORT_SYMBOL vmlinux 0xdecb3b21	sk_filter
+EXPORT_SYMBOL vmlinux 0xdeecdac5	sock_rfree
+EXPORT_SYMBOL vmlinux 0xdefac810	skb_copy_datagram_from_iovec
+EXPORT_SYMBOL vmlinux 0xdf0ac4a2	scsi_dma_map
+EXPORT_SYMBOL vmlinux 0xdf0da3cc	acpi_get_devices
+EXPORT_SYMBOL vmlinux 0xdf3a01ee	skb_clone
+EXPORT_SYMBOL vmlinux 0xdf4c8767	ns_to_timeval
+EXPORT_SYMBOL vmlinux 0xdf4da263	nonseekable_open
+EXPORT_SYMBOL vmlinux 0xdf55611b	dev_set_promiscuity
+EXPORT_SYMBOL vmlinux 0xdf60cc27	__print_symbol
+EXPORT_SYMBOL vmlinux 0xdf79edc8	check_disk_change
+EXPORT_SYMBOL vmlinux 0xdf8762fa	swiotlb_unmap_sg_attrs
+EXPORT_SYMBOL vmlinux 0xdf87ff99	con_copy_unimap
+EXPORT_SYMBOL vmlinux 0xdf8c695a	__ndelay
+EXPORT_SYMBOL vmlinux 0xdf929370	fs_overflowgid
+EXPORT_SYMBOL vmlinux 0xdfb7bada	acpi_check_resource_conflict
+EXPORT_SYMBOL vmlinux 0xdfb9c719	xfrm_policy_walk
+EXPORT_SYMBOL vmlinux 0xdfbb65b9	filemap_write_and_wait_range
+EXPORT_SYMBOL vmlinux 0xdfc5169b	slhc_init
+EXPORT_SYMBOL vmlinux 0xdfd3a5a1	inetdev_by_index
+EXPORT_SYMBOL vmlinux 0xdfd79ec4	backlight_device_unregister
+EXPORT_SYMBOL vmlinux 0xdfdff17b	seq_putc
+EXPORT_SYMBOL vmlinux 0xdfed7968	xfrm_bundle_ok
+EXPORT_SYMBOL vmlinux 0xe02633f9	uart_resume_port
+EXPORT_SYMBOL vmlinux 0xe03e445c	__netdev_alloc_page
+EXPORT_SYMBOL vmlinux 0xe0436b5b	pcie_port_service_unregister
+EXPORT_SYMBOL vmlinux 0xe05181cb	agp3_generic_tlbflush
+EXPORT_SYMBOL vmlinux 0xe05f0864	__sk_mem_schedule
+EXPORT_SYMBOL vmlinux 0xe075d6eb	iter_div_u64_rem
+EXPORT_SYMBOL vmlinux 0xe085caca	inet_bind
+EXPORT_SYMBOL vmlinux 0xe0ac8bd2	acpi_bus_generate_netlink_event
+EXPORT_SYMBOL vmlinux 0xe0b13336	argv_free
+EXPORT_SYMBOL vmlinux 0xe0bc24a1	param_set_ushort
+EXPORT_SYMBOL vmlinux 0xe0c9e9a5	dm_kcopyd_copy
+EXPORT_SYMBOL vmlinux 0xe0d56478	filemap_fdatawrite_range
+EXPORT_SYMBOL vmlinux 0xe113bbbc	csum_partial
+EXPORT_SYMBOL vmlinux 0xe12efbb1	bio_put
+EXPORT_SYMBOL vmlinux 0xe13cd8a7	dmi_name_in_vendors
+EXPORT_SYMBOL vmlinux 0xe141aa6d	insert_inode_locked
+EXPORT_SYMBOL vmlinux 0xe1761617	security_inet_conn_request
+EXPORT_SYMBOL vmlinux 0xe18a394b	neigh_update
+EXPORT_SYMBOL vmlinux 0xe18c52a3	i2c_smbus_read_word_data
+EXPORT_SYMBOL vmlinux 0xe1a81c3a	icmpv6msg_statistics
+EXPORT_SYMBOL vmlinux 0xe2096960	phy_device_free
+EXPORT_SYMBOL vmlinux 0xe23ae481	blk_iopoll_complete
+EXPORT_SYMBOL vmlinux 0xe23d7acb	up_read
+EXPORT_SYMBOL vmlinux 0xe24050c7	scnprintf
+EXPORT_SYMBOL vmlinux 0xe2474ef3	find_lock_page
+EXPORT_SYMBOL vmlinux 0xe24d3a97	jiffies_64
+EXPORT_SYMBOL vmlinux 0xe255cf38	__generic_block_fiemap
+EXPORT_SYMBOL vmlinux 0xe26cf493	block_invalidatepage
+EXPORT_SYMBOL vmlinux 0xe29a938a	nf_unregister_hook
+EXPORT_SYMBOL vmlinux 0xe29b04e9	acpi_set_firmware_waking_vector64
+EXPORT_SYMBOL vmlinux 0xe2aaaa4e	i2c_clients_command
+EXPORT_SYMBOL vmlinux 0xe2be8e30	input_grab_device
+EXPORT_SYMBOL vmlinux 0xe2d5255a	strcmp
+EXPORT_SYMBOL vmlinux 0xe2d9735b	neigh_changeaddr
+EXPORT_SYMBOL vmlinux 0xe2da4868	pci_request_region
+EXPORT_SYMBOL vmlinux 0xe2e301ae	serio_close
+EXPORT_SYMBOL vmlinux 0xe2e5b9d1	__blk_end_request_cur
+EXPORT_SYMBOL vmlinux 0xe2e704d1	tcp_alloc_md5sig_pool
+EXPORT_SYMBOL vmlinux 0xe2e98cdb	page_zero_new_buffers
+EXPORT_SYMBOL vmlinux 0xe30f294c	scsi_is_sdev_device
+EXPORT_SYMBOL vmlinux 0xe3539982	xfrm_policy_register_afinfo
+EXPORT_SYMBOL vmlinux 0xe36b2aaa	__elv_add_request
+EXPORT_SYMBOL vmlinux 0xe38d4458	d_invalidate
+EXPORT_SYMBOL vmlinux 0xe3b0192b	vscnprintf
+EXPORT_SYMBOL vmlinux 0xe3d0b157	skb_gro_reset_offset
+EXPORT_SYMBOL vmlinux 0xe3eefcdc	log_wait_commit
+EXPORT_SYMBOL vmlinux 0xe3f19e37	skb_copy_bits
+EXPORT_SYMBOL vmlinux 0xe3fbe148	acpi_install_table_handler
+EXPORT_SYMBOL vmlinux 0xe43617f7	acpi_gbl_FADT
+EXPORT_SYMBOL vmlinux 0xe456bd3a	complete
+EXPORT_SYMBOL vmlinux 0xe473d896	jbd2_journal_force_commit
+EXPORT_SYMBOL vmlinux 0xe484e35f	ioread32
+EXPORT_SYMBOL vmlinux 0xe4870354	_read_trylock
+EXPORT_SYMBOL vmlinux 0xe49b8e34	security_path_symlink
+EXPORT_SYMBOL vmlinux 0xe4a46fcc	pnp_register_card_driver
+EXPORT_SYMBOL vmlinux 0xe4a9c49c	xfrm_dst_ifdown
+EXPORT_SYMBOL vmlinux 0xe4b24b8c	__next_cpu
+EXPORT_SYMBOL vmlinux 0xe4c1df3e	_read_lock_bh
+EXPORT_SYMBOL vmlinux 0xe4f1695e	cookie_check_timestamp
+EXPORT_SYMBOL vmlinux 0xe511c3ab	backlight_device_register
+EXPORT_SYMBOL vmlinux 0xe523ad75	synchronize_irq
+EXPORT_SYMBOL vmlinux 0xe52947e7	__phys_addr
+EXPORT_SYMBOL vmlinux 0xe52bdfdd	fb_find_mode
+EXPORT_SYMBOL vmlinux 0xe5446f2e	pci_wake_from_d3
+EXPORT_SYMBOL vmlinux 0xe5623e7f	ip_mc_rejoin_group
+EXPORT_SYMBOL vmlinux 0xe571b36f	iw_handler_get_spy
+EXPORT_SYMBOL vmlinux 0xe57708fe	generic_write_checks
+EXPORT_SYMBOL vmlinux 0xe57878a1	in6_pton
+EXPORT_SYMBOL vmlinux 0xe57b14d4	user_revoke
+EXPORT_SYMBOL vmlinux 0xe5867808	dlci_ioctl_set
+EXPORT_SYMBOL vmlinux 0xe5a35bf3	filemap_flush
+EXPORT_SYMBOL vmlinux 0xe5a5a203	skb_dequeue
+EXPORT_SYMBOL vmlinux 0xe5a8c133	pci_scan_bus_parented
+EXPORT_SYMBOL vmlinux 0xe5b34589	elv_abort_queue
+EXPORT_SYMBOL vmlinux 0xe5bd367a	filemap_fdatawait
+EXPORT_SYMBOL vmlinux 0xe5c01c7f	__bio_clone
+EXPORT_SYMBOL vmlinux 0xe5c78a99	do_blank_screen
+EXPORT_SYMBOL vmlinux 0xe5df07a5	ppp_unregister_channel
+EXPORT_SYMBOL vmlinux 0xe5ed5467	xfrm_policy_walk_init
+EXPORT_SYMBOL vmlinux 0xe631ee2a	llc_sap_open
+EXPORT_SYMBOL vmlinux 0xe64864d9	init_task
+EXPORT_SYMBOL vmlinux 0xe690b8fd	__ipv6_isatap_ifid
+EXPORT_SYMBOL vmlinux 0xe697d108	__blk_iopoll_complete
+EXPORT_SYMBOL vmlinux 0xe6e0c892	vlan_ioctl_set
+EXPORT_SYMBOL vmlinux 0xe6f570f5	jbd2_journal_blocks_per_page
+EXPORT_SYMBOL vmlinux 0xe6fbe430	can_do_mlock
+EXPORT_SYMBOL vmlinux 0xe714375c	__tasklet_hi_schedule_first
+EXPORT_SYMBOL vmlinux 0xe7160b5c	free_buffer_head
+EXPORT_SYMBOL vmlinux 0xe716baed	acpi_unregister_ioapic
+EXPORT_SYMBOL vmlinux 0xe7346c9e	sock_common_recvmsg
+EXPORT_SYMBOL vmlinux 0xe74b9a17	jbd2_journal_update_format
+EXPORT_SYMBOL vmlinux 0xe7698c13	blk_recount_segments
+EXPORT_SYMBOL vmlinux 0xe7795ed6	ip_xfrm_me_harder
+EXPORT_SYMBOL vmlinux 0xe786168c	rwsem_down_write_failed
+EXPORT_SYMBOL vmlinux 0xe78960b9	acpi_get_physical_device
+EXPORT_SYMBOL vmlinux 0xe7ba9a55	xfrm_policy_bysel_ctx
+EXPORT_SYMBOL vmlinux 0xe7bd98e6	agp_flush_chipset
+EXPORT_SYMBOL vmlinux 0xe7d15971	sk_stream_wait_close
+EXPORT_SYMBOL vmlinux 0xe7d2aca1	security_sk_classify_flow
+EXPORT_SYMBOL vmlinux 0xe7d32407	nmi_active
+EXPORT_SYMBOL vmlinux 0xe7d4daac	seq_list_next
+EXPORT_SYMBOL vmlinux 0xe7f06ac7	skb_over_panic
+EXPORT_SYMBOL vmlinux 0xe7f08233	bio_add_page
+EXPORT_SYMBOL vmlinux 0xe803c7df	ip_generic_getfrag
+EXPORT_SYMBOL vmlinux 0xe80ce219	sysctl_tcp_dma_copybreak
+EXPORT_SYMBOL vmlinux 0xe80ec852	mmc_power_restore_host
+EXPORT_SYMBOL vmlinux 0xe8116e08	__kmalloc_node
+EXPORT_SYMBOL vmlinux 0xe811ce38	i2c_smbus_write_byte
+EXPORT_SYMBOL vmlinux 0xe823b624	xfrm_state_alloc
+EXPORT_SYMBOL vmlinux 0xe8281e1b	sock_wfree
+EXPORT_SYMBOL vmlinux 0xe85060c1	kobject_del
+EXPORT_SYMBOL vmlinux 0xe8734cd0	register_framebuffer
+EXPORT_SYMBOL vmlinux 0xe8794ce1	slhc_toss
+EXPORT_SYMBOL vmlinux 0xe8967cb7	bio_integrity_enabled
+EXPORT_SYMBOL vmlinux 0xe899f7cc	udp_poll
+EXPORT_SYMBOL vmlinux 0xe8a3605f	acpi_processor_set_thermal_limit
+EXPORT_SYMBOL vmlinux 0xe8c8592d	agp_enable
+EXPORT_SYMBOL vmlinux 0xe8c9aaf3	sock_kfree_s
+EXPORT_SYMBOL vmlinux 0xe8cd902e	hweight16
+EXPORT_SYMBOL vmlinux 0xe90dcae0	__request_module
+EXPORT_SYMBOL vmlinux 0xe914e41e	strcpy
+EXPORT_SYMBOL vmlinux 0xe957bc06	vfs_llseek
+EXPORT_SYMBOL vmlinux 0xe96a82b5	set_bh_page
+EXPORT_SYMBOL vmlinux 0xe997667b	wrmsr_on_cpu
+EXPORT_SYMBOL vmlinux 0xe99c6b22	mmc_card_awake
+EXPORT_SYMBOL vmlinux 0xea054b22	nla_policy_len
+EXPORT_SYMBOL vmlinux 0xea10212a	int_to_scsilun
+EXPORT_SYMBOL vmlinux 0xea10655a	__bitmap_intersects
+EXPORT_SYMBOL vmlinux 0xea147363	printk
+EXPORT_SYMBOL vmlinux 0xea376094	simple_statfs
+EXPORT_SYMBOL vmlinux 0xea59bc83	pagecache_write_begin
+EXPORT_SYMBOL vmlinux 0xea629e92	free_netdev
+EXPORT_SYMBOL vmlinux 0xea73195a	journal_blocks_per_page
+EXPORT_SYMBOL vmlinux 0xea7518f1	filemap_fdatawrite
+EXPORT_SYMBOL vmlinux 0xea90bdd3	acpi_attach_data
+EXPORT_SYMBOL vmlinux 0xea9b2393	genphy_update_link
+EXPORT_SYMBOL vmlinux 0xead58fb9	print_hex_dump
+EXPORT_SYMBOL vmlinux 0xead8e285	eth_type_trans
+EXPORT_SYMBOL vmlinux 0xeae3dfd6	__const_udelay
+EXPORT_SYMBOL vmlinux 0xeaf140f0	scsi_register_driver
+EXPORT_SYMBOL vmlinux 0xeb1fabf6	interruptible_sleep_on
+EXPORT_SYMBOL vmlinux 0xeb444b6f	__napi_complete
+EXPORT_SYMBOL vmlinux 0xeb6ceeba	mmc_host_lazy_disable
+EXPORT_SYMBOL vmlinux 0xeb74d733	rfkill_resume_polling
+EXPORT_SYMBOL vmlinux 0xeb7bb9b6	kernel_recvmsg
+EXPORT_SYMBOL vmlinux 0xeb7c1057	block_write_full_page
+EXPORT_SYMBOL vmlinux 0xeb8f54b3	strstrip
+EXPORT_SYMBOL vmlinux 0xeb986265	tcf_exts_change
+EXPORT_SYMBOL vmlinux 0xeba3ef1b	jbd2_journal_check_available_features
+EXPORT_SYMBOL vmlinux 0xeba8f555	kernel_getsockopt
+EXPORT_SYMBOL vmlinux 0xebbf1dba	strncasecmp
+EXPORT_SYMBOL vmlinux 0xebc8c88f	md_check_no_bitmap
+EXPORT_SYMBOL vmlinux 0xebd273a6	strict_strtoull
+EXPORT_SYMBOL vmlinux 0xebda04e6	pci_bus_read_config_dword
+EXPORT_SYMBOL vmlinux 0xebf1509b	clocksource_unregister
+EXPORT_SYMBOL vmlinux 0xec074bf0	register_filesystem
+EXPORT_SYMBOL vmlinux 0xec71ac98	pcim_iomap_regions_request_all
+EXPORT_SYMBOL vmlinux 0xec794ba0	__send_remote_softirq
+EXPORT_SYMBOL vmlinux 0xec7d0569	tty_wait_until_sent
+EXPORT_SYMBOL vmlinux 0xecde1418	_spin_lock_irq
+EXPORT_SYMBOL vmlinux 0xecf43c07	kmalloc_caches
+EXPORT_SYMBOL vmlinux 0xed16390c	sock_create_lite
+EXPORT_SYMBOL vmlinux 0xed35942c	pci_fixup_device
+EXPORT_SYMBOL vmlinux 0xed3c7156	xfrm_alloc_spi
+EXPORT_SYMBOL vmlinux 0xed3f6556	sock_no_sendmsg
+EXPORT_SYMBOL vmlinux 0xed557f14	input_register_handler
+EXPORT_SYMBOL vmlinux 0xed5a2710	dev_alloc_skb
+EXPORT_SYMBOL vmlinux 0xed65b053	__find_get_block
+EXPORT_SYMBOL vmlinux 0xed7c1245	xfrm_state_register_afinfo
+EXPORT_SYMBOL vmlinux 0xeda0d76e	gen_estimator_active
+EXPORT_SYMBOL vmlinux 0xeda62f20	__f_setown
+EXPORT_SYMBOL vmlinux 0xeda7d47d	atomic_dec_and_mutex_lock
+EXPORT_SYMBOL vmlinux 0xedb601c7	tcp_v4_md5_do_del
+EXPORT_SYMBOL vmlinux 0xedbaee5e	nla_strcmp
+EXPORT_SYMBOL vmlinux 0xedc03953	iounmap
+EXPORT_SYMBOL vmlinux 0xede9ab28	vfs_mkdir
+EXPORT_SYMBOL vmlinux 0xedf8a16f	__mmc_claim_host
+EXPORT_SYMBOL vmlinux 0xee296b19	sock_no_getsockopt
+EXPORT_SYMBOL vmlinux 0xee2ae5da	inode_add_bytes
+EXPORT_SYMBOL vmlinux 0xee2d0fc7	_local_bh_enable
+EXPORT_SYMBOL vmlinux 0xee7eb9e1	pnp_platform_devices
+EXPORT_SYMBOL vmlinux 0xee8ac201	napi_frags_skb
+EXPORT_SYMBOL vmlinux 0xeea7a2be	compat_mc_setsockopt
+EXPORT_SYMBOL vmlinux 0xeea9dbaf	bitmap_bitremap
+EXPORT_SYMBOL vmlinux 0xeec1e161	revalidate_disk
+EXPORT_SYMBOL vmlinux 0xeec7d768	pci_set_dma_mask
+EXPORT_SYMBOL vmlinux 0xef3234d9	wake_up_process
+EXPORT_SYMBOL vmlinux 0xef3815a6	phy_stop
+EXPORT_SYMBOL vmlinux 0xef4376e4	seq_open_private
+EXPORT_SYMBOL vmlinux 0xef458902	devm_ioport_unmap
+EXPORT_SYMBOL vmlinux 0xef6ed1ba	param_set_invbool
+EXPORT_SYMBOL vmlinux 0xef9aedfc	boot_option_idle_override
+EXPORT_SYMBOL vmlinux 0xefad9741	nf_unregister_hooks
+EXPORT_SYMBOL vmlinux 0xefb93069	generic_removexattr
+EXPORT_SYMBOL vmlinux 0xefc2a227	set_pages_array_uc
+EXPORT_SYMBOL vmlinux 0xefda3731	pci_setup_cardbus
+EXPORT_SYMBOL vmlinux 0xefdd70ce	security_secid_to_secctx
+EXPORT_SYMBOL vmlinux 0xefe099c3	acpi_get_event_status
+EXPORT_SYMBOL vmlinux 0xeff1f3e7	acpi_bus_unregister_driver
+EXPORT_SYMBOL vmlinux 0xeff52ee9	inet_csk_reset_keepalive_timer
+EXPORT_SYMBOL vmlinux 0xeffaf6d0	mod_zone_page_state
+EXPORT_SYMBOL vmlinux 0xeffb8bcb	qdisc_class_hash_grow
+EXPORT_SYMBOL vmlinux 0xf0009fee	put_pages_list
+EXPORT_SYMBOL vmlinux 0xf0189889	vfs_dq_quota_on_remount
+EXPORT_SYMBOL vmlinux 0xf01c1fdf	fget
+EXPORT_SYMBOL vmlinux 0xf0408743	devm_ioremap_nocache
+EXPORT_SYMBOL vmlinux 0xf051d70c	napi_skb_finish
+EXPORT_SYMBOL vmlinux 0xf065f629	ioread16be
+EXPORT_SYMBOL vmlinux 0xf086ec71	agp_unbind_memory
+EXPORT_SYMBOL vmlinux 0xf08dfc22	blk_queue_max_phys_segments
+EXPORT_SYMBOL vmlinux 0xf0906e5a	bitmap_close_sync
+EXPORT_SYMBOL vmlinux 0xf0b3f396	key_validate
+EXPORT_SYMBOL vmlinux 0xf0ca23b9	invalidate_inodes
+EXPORT_SYMBOL vmlinux 0xf0cd0281	__mutex_init
+EXPORT_SYMBOL vmlinux 0xf0cf2a2e	find_get_page
+EXPORT_SYMBOL vmlinux 0xf0d93f3e	pci_map_rom
+EXPORT_SYMBOL vmlinux 0xf0ef15b4	list_sort
+EXPORT_SYMBOL vmlinux 0xf0f1246c	kvasprintf
+EXPORT_SYMBOL vmlinux 0xf0f71051	pskb_copy
+EXPORT_SYMBOL vmlinux 0xf0fdf6cb	__stack_chk_fail
+EXPORT_SYMBOL vmlinux 0xf106ecb3	acpi_evaluate_object_typed
+EXPORT_SYMBOL vmlinux 0xf1079b3c	kthread_bind
+EXPORT_SYMBOL vmlinux 0xf10de535	ioread8
+EXPORT_SYMBOL vmlinux 0xf11543ff	find_first_zero_bit
+EXPORT_SYMBOL vmlinux 0xf116d4b5	copy_in_user
+EXPORT_SYMBOL vmlinux 0xf11ffc97	__dev_get_by_name
+EXPORT_SYMBOL vmlinux 0xf1317029	dev_get_by_flags
+EXPORT_SYMBOL vmlinux 0xf15a23a3	ipv6_chk_addr
+EXPORT_SYMBOL vmlinux 0xf16a6941	set_trace_device
+EXPORT_SYMBOL vmlinux 0xf16da094	uart_add_one_port
+EXPORT_SYMBOL vmlinux 0xf174ed48	acquire_console_sem
+EXPORT_SYMBOL vmlinux 0xf195c682	fb_invert_cmaps
+EXPORT_SYMBOL vmlinux 0xf1b17a02	scsi_put_command
+EXPORT_SYMBOL vmlinux 0xf1b7e360	per_cpu__cpu_sibling_map
+EXPORT_SYMBOL vmlinux 0xf1d34abd	i2c_smbus_read_byte_data
+EXPORT_SYMBOL vmlinux 0xf1d64416	gen_new_estimator
+EXPORT_SYMBOL vmlinux 0xf1db1704	nla_memcpy
+EXPORT_SYMBOL vmlinux 0xf1e2d1f5	inet_ioctl
+EXPORT_SYMBOL vmlinux 0xf1e98c74	avenrun
+EXPORT_SYMBOL vmlinux 0xf206fc24	ps2_handle_response
+EXPORT_SYMBOL vmlinux 0xf20dabd8	free_irq
+EXPORT_SYMBOL vmlinux 0xf20e73c9	single_open
+EXPORT_SYMBOL vmlinux 0xf21685d3	dquot_commit_info
+EXPORT_SYMBOL vmlinux 0xf221b71e	free_mdio_bitbang
+EXPORT_SYMBOL vmlinux 0xf223262d	tty_schedule_flip
+EXPORT_SYMBOL vmlinux 0xf23a63e1	fb_get_mode
+EXPORT_SYMBOL vmlinux 0xf27a0469	elv_add_request
+EXPORT_SYMBOL vmlinux 0xf28973eb	xfrm_state_walk
+EXPORT_SYMBOL vmlinux 0xf2997713	tty_termios_hw_change
+EXPORT_SYMBOL vmlinux 0xf2ac99ee	netdev_set_master
+EXPORT_SYMBOL vmlinux 0xf2c023e4	xfrm_state_add
+EXPORT_SYMBOL vmlinux 0xf2c19f85	writeback_inodes_sb
+EXPORT_SYMBOL vmlinux 0xf2fcbfb5	security_path_mknod
+EXPORT_SYMBOL vmlinux 0xf303793a	dput
+EXPORT_SYMBOL vmlinux 0xf310ae77	sk_run_filter
+EXPORT_SYMBOL vmlinux 0xf313da4e	sha_transform
+EXPORT_SYMBOL vmlinux 0xf3145c2b	xfrm_state_insert
+EXPORT_SYMBOL vmlinux 0xf31ae2f5	tcp_close
+EXPORT_SYMBOL vmlinux 0xf3331545	security_path_rmdir
+EXPORT_SYMBOL vmlinux 0xf3341268	__clear_user
+EXPORT_SYMBOL vmlinux 0xf338d4c3	netlink_unregister_notifier
+EXPORT_SYMBOL vmlinux 0xf33c5800	hippi_neigh_setup_dev
+EXPORT_SYMBOL vmlinux 0xf33fa27b	dm_exception_store_destroy
+EXPORT_SYMBOL vmlinux 0xf346231f	seq_list_start_head
+EXPORT_SYMBOL vmlinux 0xf36fadfb	inet_addr_type
+EXPORT_SYMBOL vmlinux 0xf37329ca	inode_claim_rsv_space
+EXPORT_SYMBOL vmlinux 0xf397b9aa	__tasklet_schedule
+EXPORT_SYMBOL vmlinux 0xf398fa5b	cfb_fillrect
+EXPORT_SYMBOL vmlinux 0xf3ac6d5e	con_is_bound
+EXPORT_SYMBOL vmlinux 0xf3bf0bce	__bitmap_complement
+EXPORT_SYMBOL vmlinux 0xf3bf633e	serio_unregister_child_port
+EXPORT_SYMBOL vmlinux 0xf3ef69be	blk_queue_logical_block_size
+EXPORT_SYMBOL vmlinux 0xf41011f6	rfkill_init_sw_state
+EXPORT_SYMBOL vmlinux 0xf430c480	release_sock
+EXPORT_SYMBOL vmlinux 0xf441ac43	ioread8_rep
+EXPORT_SYMBOL vmlinux 0xf4528073	scsi_kmap_atomic_sg
+EXPORT_SYMBOL vmlinux 0xf4607155	pnp_disable_dev
+EXPORT_SYMBOL vmlinux 0xf48ed526	xfrm_find_acq
+EXPORT_SYMBOL vmlinux 0xf49436bd	inet_select_addr
+EXPORT_SYMBOL vmlinux 0xf494f618	mmc_regulator_get_ocrmask
+EXPORT_SYMBOL vmlinux 0xf4a5c213	avail_to_resrv_perfctr_nmi_bit
+EXPORT_SYMBOL vmlinux 0xf4ae60de	acpi_processor_notify_smm
+EXPORT_SYMBOL vmlinux 0xf4d66985	pci_remove_behind_bridge
+EXPORT_SYMBOL vmlinux 0xf4f14de6	rtnl_trylock
+EXPORT_SYMBOL vmlinux 0xf4f49c0a	try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0xf4f52f93	dqstats
+EXPORT_SYMBOL vmlinux 0xf5044c9f	blk_alloc_queue
+EXPORT_SYMBOL vmlinux 0xf5197dda	cancel_dirty_page
+EXPORT_SYMBOL vmlinux 0xf51ae235	touch_nmi_watchdog
+EXPORT_SYMBOL vmlinux 0xf53b9788	tcf_em_tree_dump
+EXPORT_SYMBOL vmlinux 0xf53d4c26	qdisc_class_hash_destroy
+EXPORT_SYMBOL vmlinux 0xf57682c8	acpi_get_object_info
+EXPORT_SYMBOL vmlinux 0xf588aeb4	elv_rb_del
+EXPORT_SYMBOL vmlinux 0xf5c9012e	timespec_trunc
+EXPORT_SYMBOL vmlinux 0xf5e1efe3	bio_alloc_bioset
+EXPORT_SYMBOL vmlinux 0xf5eb86ea	blk_verify_command
+EXPORT_SYMBOL vmlinux 0xf5fae172	notify_change
+EXPORT_SYMBOL vmlinux 0xf6315bb9	tcp_sync_mss
+EXPORT_SYMBOL vmlinux 0xf63393e5	ipv4_specific
+EXPORT_SYMBOL vmlinux 0xf643eaac	handle_sysrq
+EXPORT_SYMBOL vmlinux 0xf666cbb3	__memcpy_fromio
+EXPORT_SYMBOL vmlinux 0xf67fe8d2	jbd2_journal_try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0xf6939ac4	get_agp_version
+EXPORT_SYMBOL vmlinux 0xf6bb4729	color_table
+EXPORT_SYMBOL vmlinux 0xf6ebc03b	net_ratelimit
+EXPORT_SYMBOL vmlinux 0xf70d0e45	rtnl_unicast
+EXPORT_SYMBOL vmlinux 0xf72c97fe	iget5_locked
+EXPORT_SYMBOL vmlinux 0xf749534a	gen_pool_free
+EXPORT_SYMBOL vmlinux 0xf74a63b5	x86_mce_decode_callback
+EXPORT_SYMBOL vmlinux 0xf77b2ccb	sync_mapping_buffers
+EXPORT_SYMBOL vmlinux 0xf78d04ab	netlink_register_notifier
+EXPORT_SYMBOL vmlinux 0xf7969df4	seq_path
+EXPORT_SYMBOL vmlinux 0xf7d4e192	xfrm6_rcv
+EXPORT_SYMBOL vmlinux 0xf7ecf6e5	freeze_bdev
+EXPORT_SYMBOL vmlinux 0xf7f3c23b	ip_setsockopt
+EXPORT_SYMBOL vmlinux 0xf7f8d104	blk_remove_plug
+EXPORT_SYMBOL vmlinux 0xf8101e4d	bio_alloc
+EXPORT_SYMBOL vmlinux 0xf811e69d	scsi_eh_flush_done_q
+EXPORT_SYMBOL vmlinux 0xf82abc1d	isa_dma_bridge_buggy
+EXPORT_SYMBOL vmlinux 0xf82e3d47	acpi_initialize_objects
+EXPORT_SYMBOL vmlinux 0xf8341911	seq_puts
+EXPORT_SYMBOL vmlinux 0xf85a6c28	nf_register_hooks
+EXPORT_SYMBOL vmlinux 0xf8714142	follow_up
+EXPORT_SYMBOL vmlinux 0xf88753e5	devm_request_threaded_irq
+EXPORT_SYMBOL vmlinux 0xf88e0ee2	acpi_get_table_header
+EXPORT_SYMBOL vmlinux 0xf890fe7f	pm_idle
+EXPORT_SYMBOL vmlinux 0xf8b30e93	mempool_create
+EXPORT_SYMBOL vmlinux 0xf8be16d3	scsi_device_get
+EXPORT_SYMBOL vmlinux 0xf8cf9ee5	abort_exclusive_wait
+EXPORT_SYMBOL vmlinux 0xf8ea5a1b	serio_reconnect
+EXPORT_SYMBOL vmlinux 0xf9017427	ip_ct_attach
+EXPORT_SYMBOL vmlinux 0xf92fca8b	pci_set_power_state
+EXPORT_SYMBOL vmlinux 0xf93b5ad3	blk_queue_io_opt
+EXPORT_SYMBOL vmlinux 0xf9567e60	ps2_command
+EXPORT_SYMBOL vmlinux 0xf96214a6	mutex_trylock
+EXPORT_SYMBOL vmlinux 0xf986fac8	request_key_with_auxdata
+EXPORT_SYMBOL vmlinux 0xf9899664	mod_timer_pinned
+EXPORT_SYMBOL vmlinux 0xf98a4728	elv_rb_former_request
+EXPORT_SYMBOL vmlinux 0xf9a482f9	msleep
+EXPORT_SYMBOL vmlinux 0xf9ae3ea6	bd_claim
+EXPORT_SYMBOL vmlinux 0xf9b50079	kobject_put
+EXPORT_SYMBOL vmlinux 0xf9c5b219	i2c_use_client
+EXPORT_SYMBOL vmlinux 0xf9c82a29	blk_queue_io_min
+EXPORT_SYMBOL vmlinux 0xf9c907d5	tcp_poll
+EXPORT_SYMBOL vmlinux 0xf9cf1780	pci_clear_master
+EXPORT_SYMBOL vmlinux 0xf9ecb00a	skb_copy_and_csum_datagram_iovec
+EXPORT_SYMBOL vmlinux 0xfa023d36	d_genocide
+EXPORT_SYMBOL vmlinux 0xfa0564fc	__wait_on_bit_lock
+EXPORT_SYMBOL vmlinux 0xfa1603f2	dm_exception_store_type_unregister
+EXPORT_SYMBOL vmlinux 0xfa3d51f4	pci_bus_add_devices
+EXPORT_SYMBOL vmlinux 0xfa47635c	scm_fp_dup
+EXPORT_SYMBOL vmlinux 0xfa4eb046	inet_proto_csum_replace4
+EXPORT_SYMBOL vmlinux 0xfa5a2ed8	dev_mc_sync
+EXPORT_SYMBOL vmlinux 0xfa84a8e4	qdisc_reset
+EXPORT_SYMBOL vmlinux 0xfa908648	sysctl_jiffies
+EXPORT_SYMBOL vmlinux 0xfaa08da0	blkdev_issue_discard
+EXPORT_SYMBOL vmlinux 0xfac95b55	tty_register_device
+EXPORT_SYMBOL vmlinux 0xfaca791b	seq_escape
+EXPORT_SYMBOL vmlinux 0xfad4daae	blk_rq_init
+EXPORT_SYMBOL vmlinux 0xfade665f	pnp_device_attach
+EXPORT_SYMBOL vmlinux 0xfade81ed	invalidate_mapping_pages
+EXPORT_SYMBOL vmlinux 0xfaf3f28b	fddi_change_mtu
+EXPORT_SYMBOL vmlinux 0xfaf98462	bitrev32
+EXPORT_SYMBOL vmlinux 0xfb0443fb	acpi_get_parent
+EXPORT_SYMBOL vmlinux 0xfb06f93c	scsi_execute_req
+EXPORT_SYMBOL vmlinux 0xfb0bc752	genlmsg_multicast_allns
+EXPORT_SYMBOL vmlinux 0xfb0cf2e9	touch_all_softlockup_watchdogs
+EXPORT_SYMBOL vmlinux 0xfb44763a	mnt_pin
+EXPORT_SYMBOL vmlinux 0xfb46e4b7	netlink_dump_start
+EXPORT_SYMBOL vmlinux 0xfb6af58d	recalc_sigpending
+EXPORT_SYMBOL vmlinux 0xfba0c2e0	llc_sap_list_lock
+EXPORT_SYMBOL vmlinux 0xfbbc0c2d	md_unregister_thread
+EXPORT_SYMBOL vmlinux 0xfbc5c6ec	cdrom_mode_sense
+EXPORT_SYMBOL vmlinux 0xfbd55365	mdiobus_read
+EXPORT_SYMBOL vmlinux 0xfbd9af7f	nf_ct_attach
+EXPORT_SYMBOL vmlinux 0xfbe27a1c	rb_first
+EXPORT_SYMBOL vmlinux 0xfbf7051c	page_symlink
+EXPORT_SYMBOL vmlinux 0xfc02b7ad	sysctl_tcp_wmem
+EXPORT_SYMBOL vmlinux 0xfc086db6	user_path_at
+EXPORT_SYMBOL vmlinux 0xfc0b9194	blk_start_queue
+EXPORT_SYMBOL vmlinux 0xfc1bcd32	scsi_test_unit_ready
+EXPORT_SYMBOL vmlinux 0xfc2e2f1f	dm_io
+EXPORT_SYMBOL vmlinux 0xfc394b16	skb_copy_datagram_const_iovec
+EXPORT_SYMBOL vmlinux 0xfc39e32f	ioport_unmap
+EXPORT_SYMBOL vmlinux 0xfc4897cd	uart_get_divisor
+EXPORT_SYMBOL vmlinux 0xfc6256b9	boot_tvec_bases
+EXPORT_SYMBOL vmlinux 0xfc778de6	__scsi_iterate_devices
+EXPORT_SYMBOL vmlinux 0xfc7b737f	journal_init_inode
+EXPORT_SYMBOL vmlinux 0xfc964c09	kernel_connect
+EXPORT_SYMBOL vmlinux 0xfcaa04a0	out_of_line_wait_on_bit_lock
+EXPORT_SYMBOL vmlinux 0xfcaa2afb	ip6_frag_init
+EXPORT_SYMBOL vmlinux 0xfcb0019a	input_set_keycode
+EXPORT_SYMBOL vmlinux 0xfcc2a43c	utf32_to_utf8
+EXPORT_SYMBOL vmlinux 0xfcc4d4e4	mod_timer_pending
+EXPORT_SYMBOL vmlinux 0xfccd0fae	lock_may_read
+EXPORT_SYMBOL vmlinux 0xfcec0987	enable_irq
+EXPORT_SYMBOL vmlinux 0xfcefd18a	mem_section
+EXPORT_SYMBOL vmlinux 0xfcfa03ff	fb_videomode_to_modelist
+EXPORT_SYMBOL vmlinux 0xfd0f64c3	xfrm6_input_addr
+EXPORT_SYMBOL vmlinux 0xfd4203cc	agp_generic_alloc_user
+EXPORT_SYMBOL vmlinux 0xfd5583c5	in6_dev_finish_destroy
+EXPORT_SYMBOL vmlinux 0xfd6f4850	native_wrmsr_safe_regs
+EXPORT_SYMBOL vmlinux 0xfd7d7713	acpi_exception
+EXPORT_SYMBOL vmlinux 0xfd7f8b3a	fasync_helper
+EXPORT_SYMBOL vmlinux 0xfd9128ca	pci_find_next_bus
+EXPORT_SYMBOL vmlinux 0xfd96b57c	get_phy_id
+EXPORT_SYMBOL vmlinux 0xfda85a7d	request_threaded_irq
+EXPORT_SYMBOL vmlinux 0xfdb6a98b	inet6_unregister_protosw
+EXPORT_SYMBOL vmlinux 0xfdb9b629	ioread32be
+EXPORT_SYMBOL vmlinux 0xfdbd38c4	set_security_override_from_ctx
+EXPORT_SYMBOL vmlinux 0xfdd80b07	sock_no_bind
+EXPORT_SYMBOL vmlinux 0xfddcb78a	del_gendisk
+EXPORT_SYMBOL vmlinux 0xfdfc0b3b	fiemap_fill_next_extent
+EXPORT_SYMBOL vmlinux 0xfe013b6b	delayed_slow_work_enqueue
+EXPORT_SYMBOL vmlinux 0xfe047ce6	acpi_enter_sleep_state
+EXPORT_SYMBOL vmlinux 0xfe26fc7c	nr_node_ids
+EXPORT_SYMBOL vmlinux 0xfe33b03c	alloc_buffer_head
+EXPORT_SYMBOL vmlinux 0xfe36a09d	iw_handler_set_spy
+EXPORT_SYMBOL vmlinux 0xfe392bcd	generic_segment_checks
+EXPORT_SYMBOL vmlinux 0xfe5020b6	__dst_free
+EXPORT_SYMBOL vmlinux 0xfe5d4bb2	sys_tz
+EXPORT_SYMBOL vmlinux 0xfe5fec35	hippi_change_mtu
+EXPORT_SYMBOL vmlinux 0xfe69bffc	set_groups
+EXPORT_SYMBOL vmlinux 0xfe709597	agp_generic_free_by_type
+EXPORT_SYMBOL vmlinux 0xfe769456	unregister_netdevice_notifier
+EXPORT_SYMBOL vmlinux 0xfe7c4287	nr_cpu_ids
+EXPORT_SYMBOL vmlinux 0xfe8945ac	mmc_wait_for_app_cmd
+EXPORT_SYMBOL vmlinux 0xfea1155b	tcp_v4_remember_stamp
+EXPORT_SYMBOL vmlinux 0xfec3c2f2	bcd2bin
+EXPORT_SYMBOL vmlinux 0xfec6c4db	poll_initwait
+EXPORT_SYMBOL vmlinux 0xfec6ce4c	eth_validate_addr
+EXPORT_SYMBOL vmlinux 0xfedd35fc	console_suspend_enabled
+EXPORT_SYMBOL vmlinux 0xfedd96ba	unregister_tcf_proto_ops
+EXPORT_SYMBOL vmlinux 0xfee836f6	single_release
+EXPORT_SYMBOL vmlinux 0xfef96e23	__scsi_print_command
+EXPORT_SYMBOL vmlinux 0xff171041	blk_unplug
+EXPORT_SYMBOL vmlinux 0xff1e9dd8	seq_list_start
+EXPORT_SYMBOL vmlinux 0xff6878cf	fb_default_cmap
+EXPORT_SYMBOL vmlinux 0xff708fd3	mempool_destroy
+EXPORT_SYMBOL vmlinux 0xff7559e4	ioport_resource
+EXPORT_SYMBOL vmlinux 0xff8f22b0	scsi_block_requests
+EXPORT_SYMBOL vmlinux 0xff964b25	param_set_int
+EXPORT_SYMBOL vmlinux 0xff9ca065	fb_edid_to_monspecs
+EXPORT_SYMBOL vmlinux 0xffad4b37	jbd2_journal_wipe
+EXPORT_SYMBOL vmlinux 0xffafdc5c	_read_unlock_irq
+EXPORT_SYMBOL vmlinux 0xffba1b72	arp_xmit
+EXPORT_SYMBOL vmlinux 0xffbb9480	kernel_listen
+EXPORT_SYMBOL vmlinux 0xffbbfdd4	mmc_detect_change
+EXPORT_SYMBOL vmlinux 0xffc51b58	blk_rq_map_integrity_sg
+EXPORT_SYMBOL vmlinux 0xffc7c184	__init_waitqueue_head
+EXPORT_SYMBOL vmlinux 0xffd5a395	default_wake_function
+EXPORT_SYMBOL_GPL arch/x86/crypto/aes-x86_64 0x7060bf0a	crypto_aes_encrypt_x86
+EXPORT_SYMBOL_GPL arch/x86/crypto/aes-x86_64 0xe409b491	crypto_aes_decrypt_x86
+EXPORT_SYMBOL_GPL arch/x86/kernel/cpu/cpufreq/speedstep-lib 0x16836e04	speedstep_detect_processor
+EXPORT_SYMBOL_GPL arch/x86/kernel/cpu/cpufreq/speedstep-lib 0x2af90271	speedstep_get_frequency
+EXPORT_SYMBOL_GPL arch/x86/kernel/cpu/cpufreq/speedstep-lib 0xd494ee54	speedstep_get_freqs
+EXPORT_SYMBOL_GPL arch/x86/kernel/microcode 0xdf66ca81	ucode_cpu_info
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x00aaf935	kvm_disable_tdp
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x02206d9d	__kvm_set_memory_region
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x094ac8f4	kvm_get_pfn
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x09518019	emulate_instruction
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x0ab1c07d	kvm_set_page_dirty
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x0c4fcce2	kvm_report_emulation_failure
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x0d4c47ae	kvm_read_guest_page
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x12d1b23b	kvm_release_pfn_clean
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x17c162b5	kvm_set_cr3
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1997ae42	kvm_mmu_unprotect_page_virt
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1a9df35f	__tracepoint_kvm_msr
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1e4580bb	kvm_release_pfn_dirty
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x20de5193	kvm_disable_largepages
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x2322e039	kvm_set_pfn_accessed
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x238d2466	kvm_is_visible_gfn
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x27046576	kvm_exit
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x28800dc8	kvm_set_memory_region
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x317f9e6b	kvm_enable_efer_bits
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x31f65011	kvm_vcpu_init
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x37c86750	kvm_mmu_invlpg
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x38483c8a	kvm_vcpu_on_spin
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x3b7706d2	__tracepoint_kvm_exit
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x3bf67a66	kvm_task_switch
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x3e3dd82f	kvm_get_kvm
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x3fbae73b	kvm_clear_guest
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x426da3e1	is_error_page
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x438a9fbc	kvm_emulate_pio
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x46889c51	kvm_cpu_get_interrupt
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x4a7cbe69	is_error_pfn
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x4e26219a	gfn_to_pfn
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x59379d89	kvm_resched
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x5aca020c	kvm_get_cr8
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x5c9accf0	kvm_get_cs_db_l_bits
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x5d33f088	kvm_queue_exception_e
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x5d9a4900	gfn_to_hva
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x5fa46ff1	kvm_emulate_hypercall
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x62cb80e6	kvm_mmu_reset_context
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x63c62ae0	emulator_write_emulated
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x665c4c1f	kvm_cpu_has_interrupt
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x6d8aa1d7	load_pdptrs
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x778eb921	kvm_emulate_pio_string
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x7b2338c9	kvm_emulate_halt
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x7d962708	kvm_queue_exception
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8021006e	kvm_load_guest_fpu
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x82f6b1a9	gfn_to_memslot_unaliased
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8ce4f3ab	kvm_enable_tdp
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8e7f9b47	segment_base
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8fbbcf2e	kvm_require_cpl
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x93c776ae	kvm_set_cr0
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x9a2e7b69	kvm_get_apic_base
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x9d30bcc8	kvm_mmu_page_fault
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x9e37c700	kvm_init
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa361bc65	kvm_set_pfn_dirty
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa40b2afd	kvm_mmu_load
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa46806dc	fx_init
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa7ed34a9	kvm_clear_guest_page
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xab7f3b9e	kvm_lmsw
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xad6e20e2	kvm_put_guest_fpu
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xb4f81b04	kvm_x86_ops
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xb8be40cb	kvm_set_cr4
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbb00c069	kvm_inject_pending_timer_irqs
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbc809db3	kvm_read_guest
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbd377dc9	kvm_mmu_set_nonpresent_ptes
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbd86163a	kvm_handle_fault_on_reboot
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbd94103b	kvm_mmu_set_base_ptes
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbdd03f4a	kvm_release_page_clean
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xc2784de6	kvm_vcpu_uninit
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xc5351a64	kvm_set_cr8
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xc8e02b25	kvm_inject_nmi
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xc90fae55	kvm_set_msr_common
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xcd7b041f	kvm_get_guest_memory_type
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xcea5bf57	__tracepoint_kvm_page_fault
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd0b2727a	kvm_mmu_set_mask_ptes
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd296def9	kvm_is_error_hva
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd3c0a6da	__tracepoint_kvm_inj_virq
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd9d3d08e	kvm_vcpu_cache
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xda606bc2	kvm_write_guest_page
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xdcde2537	kvm_set_apic_base
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xdd6ca399	kvm_put_kvm
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xdead7e81	__tracepoint_kvm_cr
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xe656f5db	kvm_mmu_get_spte_hierarchy
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xebbfe9d3	kvm_release_page_dirty
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xef6e0663	gfn_to_page
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xf48ed9e2	kvm_emulate_cpuid
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xfacc2ba7	kvm_get_msr_common
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x0cc1e40f	crypto_it_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x24aac4d9	crypto_aes_expand_key
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x3dc916b6	crypto_fl_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x40d46b21	crypto_ft_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x71dc9998	crypto_il_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0xff0cee2c	crypto_aes_set_key
+EXPORT_SYMBOL_GPL crypto/async_tx/async_memcpy 0xdaebe90f	async_memcpy
+EXPORT_SYMBOL_GPL crypto/async_tx/async_pq 0x78606e8b	async_syndrome_val
+EXPORT_SYMBOL_GPL crypto/async_tx/async_pq 0xfdc27c4b	async_gen_syndrome
+EXPORT_SYMBOL_GPL crypto/async_tx/async_raid6_recov 0x402d7327	async_raid6_2data_recov
+EXPORT_SYMBOL_GPL crypto/async_tx/async_raid6_recov 0xc3423d9b	async_raid6_datap_recov
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x45b4c9f6	async_tx_quiesce
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x9a812628	__async_tx_find_channel
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x9dc8726a	async_trigger_callback
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0xbe712bc7	async_tx_submit
+EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0x06cd3dd4	async_xor_val
+EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0xc8ce7499	async_xor
+EXPORT_SYMBOL_GPL crypto/cryptd 0x04fd2aea	cryptd_free_ablkcipher
+EXPORT_SYMBOL_GPL crypto/cryptd 0x182c7c6b	cryptd_ablkcipher_child
+EXPORT_SYMBOL_GPL crypto/cryptd 0x34b4736a	cryptd_alloc_ahash
+EXPORT_SYMBOL_GPL crypto/cryptd 0x63b22f38	cryptd_shash_desc
+EXPORT_SYMBOL_GPL crypto/cryptd 0x7894c995	cryptd_ahash_child
+EXPORT_SYMBOL_GPL crypto/cryptd 0x964a0f67	cryptd_free_ahash
+EXPORT_SYMBOL_GPL crypto/cryptd 0xa4c38057	cryptd_alloc_ablkcipher
+EXPORT_SYMBOL_GPL crypto/des_generic 0xcfd9a2c0	des_ekey
+EXPORT_SYMBOL_GPL crypto/twofish_common 0x68da9166	twofish_setkey
+EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x02ff9464	cfag12864b_isinited
+EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x0ecb2e5d	cfag12864b_disable
+EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x305dc3c6	cfag12864b_isenabled
+EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x3389f926	cfag12864b_enable
+EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x9522a342	cfag12864b_getrate
+EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0xc48e9d95	cfag12864b_buffer
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x14102f23	ks0108_displaystate
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x48a70518	ks0108_writedata
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x4f506333	ks0108_startline
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x6edae968	ks0108_isinited
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xbf4774db	ks0108_writecontrol
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xedde6df2	ks0108_page
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xfee8ef7b	ks0108_address
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0x16b05dd3	btmrvl_send_module_cfg_cmd
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0x43d5f33c	btmrvl_process_event
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0xaf6e60be	btmrvl_check_evtpkt
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0xb04a8a34	btmrvl_interrupt
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0xcbdf1d5a	btmrvl_remove_card
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0xfde3c99c	btmrvl_add_card
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x04915628	tpm_remove_hardware
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x1223233c	tpm_open
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x1915c757	tpm_release
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x1d763d0f	tpm_register_hardware
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x3f65178b	tpm_calc_ordinal_duration
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x4657a928	tpm_show_owned
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x525e60bc	tpm_read
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x558e1287	tpm_show_temp_deactivated
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x583397da	tpm_continue_selftest
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x723b8594	tpm_dev_release
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x7ef8ba3a	tpm_show_pubek
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x80110594	tpm_show_caps
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x855afb0c	tpm_get_timeouts
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x8a612f4d	tpm_pm_suspend
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x900a5baa	tpm_show_pcrs
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x90da7ede	tpm_show_active
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x91e1fbad	tpm_store_cancel
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x930255dd	tpm_dev_vendor_release
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x94be2f7c	tpm_show_enabled
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x9e2382ce	tpm_show_caps_1_2
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xa76fd600	tpm_show_timeouts
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xadf6aa4d	tpm_pcr_read
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xaedd7763	tpm_gen_interrupt
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xba295d0f	tpm_write
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xc37226a5	tpm_pcr_extend
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xe7714672	tpm_pm_resume
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm_bios 0x13f9a680	tpm_bios_log_teardown
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm_bios 0xfce943f5	tpm_bios_log_setup
+EXPORT_SYMBOL_GPL drivers/dca/dca 0x0ccb465b	dca_remove_requester
+EXPORT_SYMBOL_GPL drivers/dca/dca 0x2e471f01	dca_register_notify
+EXPORT_SYMBOL_GPL drivers/dca/dca 0x2ebb035f	unregister_dca_provider
+EXPORT_SYMBOL_GPL drivers/dca/dca 0x31a2c8df	dca_get_tag
+EXPORT_SYMBOL_GPL drivers/dca/dca 0x6a72ced2	dca_add_requester
+EXPORT_SYMBOL_GPL drivers/dca/dca 0x8006c614	dca_unregister_notify
+EXPORT_SYMBOL_GPL drivers/dca/dca 0xc82b32d0	free_dca_provider
+EXPORT_SYMBOL_GPL drivers/dca/dca 0xd33880dd	dca3_get_tag
+EXPORT_SYMBOL_GPL drivers/dca/dca 0xddbf4f00	register_dca_provider
+EXPORT_SYMBOL_GPL drivers/dca/dca 0xe616c173	alloc_dca_provider
+EXPORT_SYMBOL_GPL drivers/edac/amd64_edac_mod 0xc923da92	amd64_get_dram_hole_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x06147dae	edac_pci_create_generic_ctl
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x09576082	edac_pci_alloc_ctl_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x0c32ff8a	edac_pci_alloc_index
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x25ff8968	edac_mc_find_csrow_by_page
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x297826df	edac_device_add_device
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x325a1250	edac_device_handle_ue
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x3a66e14a	edac_device_handle_ce
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x3c2d455d	edac_pci_release_generic_ctl
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x43e28449	edac_pci_del_device
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x472f8140	edac_mc_alloc
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x4cde21e3	edac_mc_free
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x51cae0be	edac_mc_handle_ce_no_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x57e2cff1	edac_pci_reset_delay_period
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x676afd64	edac_pci_handle_npe
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x6e3ff83a	edac_device_alloc_index
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x8790f601	edac_pci_add_device
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x8da9ff7c	edac_mc_handle_ce
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x8e1b635d	edac_mc_add_mc
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xaf38253c	edac_mc_handle_ue_no_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xbde70b8c	edac_device_alloc_ctl_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xbfa5033d	edac_device_del_device
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xc689b62e	edac_pci_free_ctl_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xce6c7c7b	edac_mc_handle_ue
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xcf2fbbcc	edac_mc_del_mc
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xdd75498d	edac_device_free_ctl_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xf1b72fd7	edac_pci_handle_pe
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0x0f0ba55e	ii_msgs
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0x14878009	amd_report_gart_errors
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0x1823885a	amd_register_ecc_decoder
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0x4b01887d	pp_msgs
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0x7509830f	to_msgs
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0x955c1f76	amd_decode_nb_mce
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0xb98537cb	rrrr_msgs
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0xc2e765d2	amd_unregister_ecc_decoder
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0xd0f094a0	ext_msgs
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0xe6ff7e0c	ll_msgs
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0xf8dec080	tt_msgs
+EXPORT_SYMBOL_GPL drivers/gpu/drm/drm 0x02a45ecc	drm_class_device_register
+EXPORT_SYMBOL_GPL drivers/gpu/drm/drm 0x98f18613	drm_class_device_unregister
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x02ecf57a	hid_check_keys_pressed
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x05495392	hid_debug
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x08a74ff0	hidinput_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x105b4fe1	hidinput_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x161580fb	hid_unregister_driver
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x171495d1	hid_debug_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x1e953bcd	hid_input_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x21c23f6d	hidinput_report_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x562538fc	hid_report_raw_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x5dd1dad4	hid_add_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x7457b6b7	hid_dump_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x797a48f5	hid_resolv_usage
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x96ee021e	hid_set_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x979986eb	hid_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x9e428b98	hid_dump_input
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xb8a77437	hid_output_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xbf360363	hidraw_report_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xc3219735	hid_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xc56fc6e6	hid_dump_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xcc7efd29	hid_allocate_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xd2b5fd3c	hid_destroy_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xdcf9ed76	hidraw_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xe48cd3b4	__hid_register_driver
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xe9dd48b8	hidinput_find_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xeffc349a	hid_parse_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xf586324d	hidraw_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x01fd453e	usbhid_lookup_quirk
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x56cdb771	usbhid_set_leds
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x5fcc6bfc	hiddev_hid_event
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x954da911	usbhid_submit_report
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x1c1ca961	lis3_dev
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x312e6a17	lis3lv02d_poweron
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x3babe982	lis3lv02d_poweroff
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x4e1bfabf	lis3lv02d_remove_fs
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x6c33e494	lis3lv02d_joystick_disable
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x897e4370	lis3lv02d_init_device
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xe6af28c8	lis3lv02d_joystick_enable
+EXPORT_SYMBOL_GPL drivers/i2c/busses/i2c-nforce2 0xc81ea176	nforce2_smbus
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0x0e88018f	hpsb_config_rom_ip1394_add
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0x281a7e04	hpsb_config_rom_ip1394_remove
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0xec8d18cf	hpsb_disable_irm
+EXPORT_SYMBOL_GPL drivers/infiniband/hw/ipath/ib_ipath 0x1514b2b2	ipath_debug
+EXPORT_SYMBOL_GPL drivers/input/ff-memless 0xa95e6ba9	input_ff_create_memless
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x05072dd9	wm97xx_config_gpio
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x0db30a48	wm97xx_get_gpio
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x1ce2b1c1	wm97xx_reg_read
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x26023823	wm9705_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x3bbc2579	wm9712_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x3f29c278	wm97xx_register_mach_ops
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x66078f16	wm97xx_read_aux_adc
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x68992697	wm97xx_reg_write
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x6c8e7282	wm97xx_unregister_mach_ops
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xa8d99b7f	wm97xx_set_suspend_mode
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xabe676a3	wm97xx_set_gpio
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xf71625e7	wm9713_codec
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x03e78b09	gigaset_add_event
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x04dd100a	gigaset_initcs
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x2c0979ce	gigaset_dbg_buffer
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x412b1b11	gigaset_stop
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x44c480e3	gigaset_freecs
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x454aa44f	gigaset_debuglevel
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x4dd65f7d	gigaset_if_receive
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x6d6da509	gigaset_shutdown
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x7b5df267	gigaset_m10x_send_skb
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x7cb1f931	gigaset_freedriver
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x7da92126	gigaset_initdriver
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x825cc85d	gigaset_skb_sent
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x8e9d0777	gigaset_blockdriver
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x914ec063	gigaset_fill_inbuf
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x9fa20eeb	gigaset_m10x_input
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xd61ba332	gigaset_start
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xe6cb4795	gigaset_handle_modem_response
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0x87400e7f	led_classdev_unregister
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0xe1b7c35e	led_classdev_suspend
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0xeb1d3441	led_classdev_register
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0xfd2270df	led_classdev_resume
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0x24935f26	raid6_call
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0xcdc24ab5	raid6_2data_recov
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0xdbab0c01	raid6_datap_recov
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x00f78dd1	ir_input_keydown
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x0349c9bd	ir_codes_proteus_2309_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x0366dcdf	ir_codes_videomate_s350_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x110b053a	ir_codes_pixelview_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x124cb753	ir_codes_encore_enltv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x183fdfdd	ir_codes_gotview7135_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x19b4d61c	ir_codes_nebula_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x19cd2826	ir_codes_behold_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x1a9009d6	ir_codes_dm1105_nec_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x1cb148f5	ir_extract_bits
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2456e513	ir_decode_pulsedistance
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2cc459b5	ir_codes_flydvb_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2d0e9a49	ir_codes_em_terratec_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3136d8ff	ir_codes_dntv_live_dvbt_pro_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x32b9033b	ir_codes_apac_viewcomp_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3909f4ad	ir_codes_terratec_cinergy_xs_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3a84be27	ir_codes_avermedia_a16d_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x4267d749	ir_codes_budget_ci_old_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x43c89ef4	ir_decode_biphase
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x4c1442c1	ir_codes_real_audio_220_32_keys_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x51ba1643	ir_codes_kworld_plus_tv_analog_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x543db4ff	ir_codes_avermedia_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x5e95da31	ir_codes_tt_1500_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x5fbe6515	ir_codes_pinnacle_color_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x61d039d7	ir_codes_behold_columbus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6427a3fb	ir_codes_pinnacle_grey_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x64b02fed	ir_codes_avermedia_dvbt_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6606596a	ir_rc5_timer_keyup
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6809de82	ir_codes_pctv_sedna_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6d6511e7	ir_dump_samples
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x703fc738	ir_codes_avertv_303_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x7283f81d	ir_codes_purpletv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x72c2992e	ir_codes_powercolor_real_angel_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x76d71b8e	ir_codes_dntv_live_dvb_t_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x784e176d	ir_codes_asus_pc39_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x828b3ce5	ir_codes_encore_enltv_fm53_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x8acae3dd	ir_codes_pinnacle_pctv_hd_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x91b5b1b6	ir_input_nokey
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x92d1d181	ir_codes_flyvideo_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x94651dab	ir_codes_ati_tv_wonder_hd_600_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x97c35dab	ir_codes_msi_tvanywhere_plus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x9944e2e5	ir_codes_hauppauge_new_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xa69aa6ad	ir_codes_pv951_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xa95157c5	ir_codes_cinergy_1400_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xac15f6c8	ir_codes_kaiomy_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xaff22e87	ir_codes_pixelview_new_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb01a1998	ir_codes_manli_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb0a8ef38	ir_codes_rc5_tv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb57445f7	ir_codes_eztv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb5adb754	ir_codes_cinergy_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xbd3ce6f0	ir_codes_avermedia_cardbus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xbeaccbdc	ir_codes_gadmei_rm008z_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xc946b8eb	ir_input_init
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xcba36c62	ir_codes_videomate_tv_pvr_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xd30c491f	ir_codes_norwood_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xdc23fec4	ir_codes_fusionhdtv_mce_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xdd4c0a07	ir_codes_evga_indtube_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xe1101f4d	ir_codes_avermedia_m135a_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xe4140c60	ir_codes_genius_tvgo_a11mce_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xeb9bb08f	ir_codes_npgtech_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xebf345b4	ir_codes_encore_enltv2_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xeec89db8	ir_codes_empty_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xef29c40d	ir_codes_adstech_dvb_t_pci_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf33c155d	ir_codes_msi_tvanywhere_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf3d619ec	ir_codes_iodata_bctv7e_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf4f7a4d6	ir_rc5_timer_end
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf5e15e65	ir_codes_winfast_table
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x39616934	saa7146_register_extension
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x51091a1a	saa7146_vfree_destroy_pgtable
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x5ebb0e45	saa7146_pgtable_free
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x7ddd7f4c	saa7146_i2c_adapter_prepare
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xb6765efa	saa7146_unregister_extension
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xcf683cf2	saa7146_devices
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xe31f8ed5	saa7146_setgpio
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xe3cd9b5c	saa7146_debug
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xe5afeee9	saa7146_devices_lock
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xea762426	saa7146_vmalloc_build_pgtable
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xf31079e3	saa7146_pgtable_alloc
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xfd24551a	saa7146_wait_for_debi_done
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xfec7e35c	saa7146_pgtable_build_single
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x19f09cf0	saa7146_unregister_device
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x3b722beb	saa7146_set_hps_source_and_sync
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x426a627f	saa7146_register_device
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xbc4047eb	saa7146_start_preview
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xbf5dec5b	saa7146_vv_release
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xc6eee3ea	saa7146_vv_init
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xfc4790e3	saa7146_stop_preview
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/mt20xx 0x3bcd387f	microtune_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/mxl5007t 0xd3879f2c	mxl5007t_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda18271 0x0175de09	tda18271_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda827x 0xec4afeed	tda827x_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda8290 0x6c0570ca	tda829x_probe
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda8290 0xc57239ec	tda829x_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda9887 0x838cf6e5	tda9887_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5761 0x5b1b93ce	tea5761_autodetection
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5761 0xc7086518	tea5761_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5767 0x88c645df	tea5767_autodetection
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5767 0xfd409bb2	tea5767_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tuner-simple 0x0fe7554b	simple_tuner_attach
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x01a74e25	smscore_unregister_client
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x030eb1ad	sms_board_event
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x058face4	smscore_register_device
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x21e36bf2	smscore_registry_getmode
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x2a86d56a	sms_board_setup
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x320b35c0	smscore_getbuffer
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x37d91069	smsendian_handle_tx_message
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x3b7a87fa	smscore_unregister_device
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x3dfa939c	smscore_unregister_hotplug
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x45284ae9	smsendian_handle_rx_message
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x4d40eb7f	smscore_get_board_id
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x529cf73f	sms_board_lna_control
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x74ee9098	sms_board_load_modules
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x7c576277	smsendian_handle_message_header
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x7dda6e4f	smscore_register_client
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x822f7948	sms_board_power
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x97310f9d	smscore_putbuffer
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x9a163a16	smscore_onresponse
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xa3a2b042	sms_board_led_feedback
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xa8024569	smscore_register_hotplug
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xe19a36c3	smscore_get_device_mode
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xeb9018a2	smscore_set_board_id
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xefaab494	smsclient_sendrequest
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xfad8cce2	smscore_start_device
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xfda878c5	sms_get_board
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x0cadcd12	ttpci_budget_irq10_handler
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x27ff499b	ttpci_budget_set_video_port
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x7948c222	budget_debug
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x9baa2c5c	ttpci_budget_init_hooks
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0xc5a12b19	ttpci_budget_init
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0xe1eb943f	ttpci_budget_debiwrite
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0xec8277ef	ttpci_budget_debiread
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0xff4b87e2	ttpci_budget_deinit
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x017ea7c7	cx231xx_tuner_callback
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x5f7e8419	cx231xx_send_usb_command
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x6f46a773	cx231xx_uninit_vbi_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x98179ae9	cx231xx_dev_init
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xb5045d6d	cx231xx_send_gpio_cmd
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xbec92317	cx231xx_uninit_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xc4c29a75	cx231xx_init_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xe05f71b5	cx231xx_init_vbi_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xe62db725	cx231xx_dev_uninit
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xecf5e01d	cx231xx_set_alt_setting
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xf60a1b7f	cx231xx_capture_start
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xf7ac6fb0	cx231xx_set_mode
+EXPORT_SYMBOL_GPL drivers/media/video/cx88/cx88xx 0x582975e7	cx88_setup_xc3028
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x15714476	em28xx_uninit_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x15a7b92b	em28xx_init_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x1d97eb9f	em28xx_set_mode
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x5fe31c2e	em28xx_isoc_dvb_max_packetsize
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x7fc8652c	em28xx_tuner_callback
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x911cc8d2	em28xx_audio_analog_set
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0xab12f4ca	em28xx_audio_setup
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x155cfb79	saa7134_s_std_internal
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x20c779d5	saa7134_ts_qops
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x9002dff0	saa7134_s_ctrl_internal
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0xad8a6f3e	saa7134_g_ctrl_internal
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0xf9c56b49	saa7134_queryctrl
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x1e270b74	v4l2_i2c_new_subdev_cfg
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x2d7f29ea	v4l2_i2c_subdev_addr
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x97fb6a9f	v4l2_i2c_subdev_init
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xf22049dc	v4l2_i2c_new_subdev_board
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xf2a353ac	v4l2_i2c_tuner_addrs
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xf5ef842e	v4l_bound_align_image
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-compat-ioctl32 0xbdd5900d	v4l2_compat_ioctl32
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x2d22e054	v4l2_int_device_unregister
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x40f3af06	v4l2_int_ioctl_1
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x854b312a	v4l2_int_ioctl_0
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xa5228b24	v4l2_int_device_try_attach_all
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xe9899e3a	v4l2_int_device_register
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x02cf66d7	__videobuf_mmap_setup
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x31b6c42e	videobuf_streamoff
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x3ea8a2ec	videobuf_cgmbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x44cd3bb4	videobuf_mmap_free
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x4556ad9c	videobuf_dqbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x4a7301cf	videobuf_stop
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x53a88498	videobuf_waiton
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x5ff8a6c1	videobuf_qbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x6a53242c	videobuf_read_stop
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x719eb95e	videobuf_queue_is_busy
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x87ec15a0	videobuf_querybuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x89c3ad2f	videobuf_alloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x8fd21938	videobuf_queue_core_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x965c91dc	videobuf_next_field
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xa31a1580	videobuf_iolock
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xa86fadec	videobuf_mmap_setup
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xafd8c671	videobuf_read_start
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xbde50717	videobuf_queue_cancel
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xc009477e	videobuf_read_one
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xc6b2c00a	videobuf_queue_to_vmalloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xc86219ef	videobuf_read_stream
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xd3ee8dca	videobuf_poll_stream
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xd69d98af	videobuf_streamon
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xe0d9f6c3	videobuf_reqbufs
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xe9ed7b52	videobuf_mmap_mapper
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x2cfd90cb	videobuf_to_dma
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x4eb8a5e4	videobuf_dma_init_kernel
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x6da23ab4	videobuf_dma_sync
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x73a22249	videobuf_dma_free
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x7ad3fde5	videobuf_sg_dma_unmap
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x861cd06d	videobuf_dma_unmap
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x8edb8ed2	videobuf_dma_init_user
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x8f1daf2a	videobuf_queue_sg_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x933dfb43	videobuf_vmalloc_to_sg
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x94759a4e	videobuf_sg_dma_map
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xa38faed2	videobuf_sg_alloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xc3292bf7	videobuf_dma_map
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xc69dc7ed	videobuf_dma_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xe82bee02	videobuf_dma_init_overlay
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0x253e805d	videobuf_vmalloc_free
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0x27f12084	videobuf_queue_vmalloc_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0x328ec215	videobuf_to_vmalloc
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x020c7243	v4l2_device_set_name
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x18751877	v4l2_device_register
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x27f29e5d	v4l2_device_disconnect
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x51dec2fc	v4l2_device_register_subdev
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0xc2f6e870	v4l2_device_unregister
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0xfad49154	v4l2_device_unregister_subdev
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x0d371681	i2o_dma_free
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x17c084c3	i2o_pool_alloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x1d5bfe44	i2o_dma_realloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x40aa2246	i2o_sg_tablesize
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x497f0e67	i2o_pool_free
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x5535d7f2	i2o_dma_alloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xf4db7227	i2o_dma_map_sg
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xfae6ab72	i2o_dma_map_single
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x54221a82	mc13783_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x62b1ee45	mc13783_adc_do_conversion
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x8759a5fe	mc13783_adc_set_ts_status
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0xbb81efb3	mc13783_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0xbea3f1b5	mc13783_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0xc52e47c4	mc13783_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0xebbc22a7	mc13783_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-adc 0x43e47afd	pcf50633_adc_sync_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-adc 0xee5eb9c1	pcf50633_adc_async_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x015981f7	pcf50633_reg_set_bit_mask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x291493ec	pcf50633_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x467cb980	pcf50633_reg_clear_bits
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x71806410	pcf50633_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x7d2b1f70	pcf50633_irq_mask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x98ac91da	pcf50633_irq_mask_get
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xc08d6a2a	pcf50633_write_block
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xc885731a	pcf50633_irq_unmask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xea388498	pcf50633_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xf5633356	pcf50633_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xf812a3ee	pcf50633_read_block
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x0db357ae	pcf50633_gpio_power_supply_set
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x263340a6	pcf50633_gpio_get
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x739cd9b9	pcf50633_gpio_invert_set
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x94629afd	pcf50633_gpio_invert_get
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0xeedec6b6	pcf50633_gpio_set
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x129b5768	sm501_set_clock
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x636d3734	sm501_modify_reg
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x716d47d8	sm501_misc_control
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x90a29ef4	sm501_unit_power
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0xad2cce50	sm501_find_clock
+EXPORT_SYMBOL_GPL drivers/mfd/ucb1400_core 0xa3150324	ucb1400_adc_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x01c7cb35	wm831x_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x125737ec	wm831x_auxadc_read_uv
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x13322e66	wm831x_bulk_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x3189089e	wm831x_enable_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x3b234f58	wm831x_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x75574058	wm831x_reg_lock
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x7dab26b6	wm831x_isinkv_values
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xb0cd3098	wm831x_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xb77bb434	wm831x_reg_unlock
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xc7f26726	wm831x_request_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xe0376c9d	wm831x_disable_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xe9510aa9	wm831x_auxadc_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xf78c7ebe	wm831x_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x01795b4a	wm8350_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x198c13d3	wm8350_read_auxadc
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x1e473574	wm8350_block_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x3fcf4c1e	wm8350_unmask_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x4e73f9e9	wm8350_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x56502f77	wm8350_device_init
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x64a4ea3b	wm8350_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x684566ec	wm8350_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x813271ec	wm8350_mask_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x836087ef	wm8350_block_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xab14ed0e	wm8350_gpio_config
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xb67cc4e0	wm8350_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xc1af5f48	wm8350_device_exit
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xd0d53d16	wm8350_clear_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xe73e6117	wm8350_reg_unlock
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xf5a61210	wm8350_reg_lock
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x432e2768	wm8400_reset_codec_reg_cache
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x738ce78d	wm8400_block_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0xc6a3b512	wm8400_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0xcd857e18	wm8400_set_bits
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x6d8ccc38	cb710_sg_dwiter_write_next_block
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x97f772d7	cb710_sg_dwiter_read_next_block
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0xd5bfb5c1	cb710_set_irq_handler
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0xfafb31a7	cb710_pci_update_config_reg
+EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x2df115d4	eeprom_93cx6_multiread
+EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x63d14d2f	eeprom_93cx6_read
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x03e69bb3	enclosure_register
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x0f68ded9	enclosure_find
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x1f2f1489	enclosure_unregister
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x29cda097	enclosure_component_register
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x5e787db4	enclosure_for_each_device
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x788c9b53	enclosure_remove_device
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0xb6143123	enclosure_add_device
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x12256658	sdhci_suspend_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x204a30e9	sdhci_alloc_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x261f0660	sdhci_resume_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x3f2c09d8	sdhci_remove_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x748dc0f9	sdhci_free_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xa9ad070d	sdhci_add_host
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x90558c06	cfi_cmdset_0003
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0xb94f77a5	cfi_cmdset_0001
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0xef3f64f0	cfi_cmdset_0200
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0002 0x696072f7	cfi_cmdset_0002
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0020 0x0f8c61fd	cfi_cmdset_0020
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x09079df5	cfi_qry_mode_off
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x5243f04a	cfi_qry_present
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0xb0e10076	cfi_qry_mode_on
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2000 0x1c20ce28	DoC2k_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001 0x7dfdcb61	DoCMil_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001plus 0x2478d4b9	DoCMilPlus_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/docecc 0x45937659	doc_decode_ecc
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x0a52c284	mtd_table
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x119a31e9	register_mtd_user
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x1f218d2c	mtd_erase_callback
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x43a3e2b4	get_sb_mtd
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x43c38d9b	del_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x6301c2f3	parse_mtd_partitions
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x6b16202b	get_mtd_device_nm
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x74019900	register_mtd_parser
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x93391c66	mtd_table_mutex
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x946a26ab	kill_mtd_super
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x9ad75845	default_mtd_writev
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xa72a685a	put_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xc2ad2803	unregister_mtd_user
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xcf0be395	deregister_mtd_parser
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xf12227ff	get_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xf46f19f6	add_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x031c679e	add_mtd_blktrans_dev
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x17e6c03b	register_mtd_blktrans
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x356adccd	deregister_mtd_blktrans
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0xa2300cf7	del_mtd_blktrans_dev
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x05da2fc3	nand_wait_ready
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x65c1b1d0	nand_scan_ident
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x73f009ae	nand_release
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xa668dae6	nand_scan_tail
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xa7db3817	nand_scan
+EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0x559afa58	onenand_scan
+EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0xdba4bb09	onenand_release
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x0416469f	ubi_is_mapped
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x2cbf016d	ubi_leb_map
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x37719650	ubi_get_volume_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x3ae5f2c7	ubi_leb_unmap
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x42801d20	ubi_sync
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x4a9626b7	ubi_do_get_device_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x570f50a9	ubi_leb_change
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x578732d9	ubi_close_volume
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x5e5cbdf7	ubi_leb_read
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x6f09ba8a	ubi_register_volume_notifier
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xa1d0189d	ubi_leb_erase
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xa3ec0b91	ubi_open_volume
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xbc505df4	ubi_get_device_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xbd29c4c8	ubi_open_volume_nm
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xe3d290ce	ubi_leb_write
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xfd6f0ef9	ubi_unregister_volume_notifier
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x19ce8a54	can_put_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x1e26e4c2	open_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x24e97e93	unregister_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x39eebaee	alloc_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x6a858770	register_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x812150fd	can_get_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x9ac076cc	free_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xc5bd4aea	can_bus_off
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xf7939517	close_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xf922591a	can_free_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x0c81b83f	alloc_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x14bf413e	free_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x2b6d310f	unregister_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xa0d0c47c	register_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xdc9bd500	sja1000_interrupt
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x03b0ed66	mlx4_unregister_vlan
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x073a399d	mlx4_free_hwq_res
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x0f7fbcd4	mlx4_SYNC_TPT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1048f6f5	mlx4_cq_resize
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x15c69541	mlx4_cq_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x17d19903	mlx4_register_mac
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x19f73935	mlx4_cq_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x254424a0	mlx4_uar_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x26ef34b1	mlx4_fmr_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x2c26bd25	mlx4_qp_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x3083db95	mlx4_qp_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x347aefc1	mlx4_mtt_addr
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x37baa3c9	mlx4_unregister_mac
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x39bc2772	mlx4_db_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x42286458	mlx4_srq_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x42308f79	mlx4_qp_release_range
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x4650076d	mlx4_qp_to_ready
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x4e1a4b12	mlx4_db_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x515e3158	mlx4_write_mtt
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x60e31521	mlx4_qp_modify
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x63bb0897	mlx4_multicast_attach
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x6587eb08	mlx4_mr_enable
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x7399f15c	mlx4_qp_remove
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x87091679	mlx4_fmr_enable
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x8fc42637	mlx4_register_interface
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9432f8e3	mlx4_qp_reserve_range
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa104e979	mlx4_buf_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa3654d2b	mlx4_register_vlan
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa3b0e6be	mlx4_buf_write_mtt
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa58636ee	mlx4_CLOSE_PORT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa63ce300	mlx4_alloc_hwq_res
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa6f67407	mlx4_srq_arm
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb053ec65	mlx4_multicast_detach
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb5445565	mlx4_INIT_PORT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb9270548	mlx4_fmr_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xbe201514	mlx4_qp_query
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc1297eb1	__mlx4_cmd
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc4adf1cd	mlx4_mr_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc705914e	mlx4_fmr_unmap
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc9ca9ed9	mlx4_free_cmd_mailbox
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xcc6a7325	mlx4_unregister_interface
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xcc9dd121	mlx4_srq_query
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xcd97916c	mlx4_srq_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd1cd0935	mlx4_uar_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd9adde32	mlx4_cq_modify
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xdc59920b	mlx4_mtt_cleanup
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe22cc9af	mlx4_pd_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xeb5f02ce	mlx4_alloc_cmd_mailbox
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf36f03fc	mlx4_buf_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf6333fd0	mlx4_mtt_init
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf6cd28b4	mlx4_map_phys_fmr
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf98d14da	mlx4_mr_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xfd6e17a3	mlx4_pd_free
+EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0xa9b4f1f7	usbnet_cdc_unbind
+EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0xcdd75f05	usbnet_generic_cdc_bind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x69a440a1	rndis_tx_fixup
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x9bdeb874	rndis_rx_fixup
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xa33ade33	generic_rndis_bind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xb4b34b27	rndis_unbind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xc3710a0b	rndis_status
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xf2567f95	rndis_command
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x149d3e52	usbnet_purge_paused_rxq
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x194e8317	usbnet_stop
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x19e96083	usbnet_disconnect
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x2312c256	usbnet_get_settings
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x289cb719	usbnet_defer_kevent
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x2db984de	usbnet_nway_reset
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x336b0dc4	usbnet_get_drvinfo
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x47aafc8d	usbnet_resume_rx
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x56267b01	usbnet_unlink_rx_urbs
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x6380df68	usbnet_get_msglevel
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x7b524127	usbnet_open
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x7c180d40	usbnet_change_mtu
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x7cde2afe	usbnet_skb_return
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x8ef2dc4c	usbnet_tx_timeout
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x97d7146d	usbnet_get_link
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x9ee3b332	usbnet_get_endpoints
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x9fff8a35	usbnet_set_msglevel
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xa72ad795	usbnet_set_settings
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xb1935e2a	usbnet_get_ethernet_addr
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xcdb6aa74	usbnet_suspend
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xcfaeb14f	usbnet_resume
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xd2128c35	usbnet_pause_rx
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xd7795c6d	usbnet_start_xmit
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xfa0f1e9f	usbnet_probe
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x05d60be3	i2400m_tx_msg_sent
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x182f25aa	i2400m_cmd_enter_powersave
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x2bdf9cd9	i2400m_cmd_get_state
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x3038bead	i2400m_queue_work
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x61716109	i2400m_netdev_setup
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x632b51a7	i2400m_tx
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x657e1562	i2400m_release
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x6a8c3e35	i2400m_rx
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x7721dee0	i2400m_setup
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x9c20237e	i2400m_dev_bootstrap
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xb00b793c	i2400m_bm_cmd_prepare
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xc96f66be	i2400m_set_init_config
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xe44b286b	i2400m_tx_msg_get
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xe54f8fd2	i2400m_dev_reset_handle
+EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0x1c820b19	libipw_debug_level
+EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0x8dd9b3cc	libipw_rx_any
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x1400ab91	lbs_add_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x274f129d	lbs_cmd_802_11_rate_adapt_rateset
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x4922eeb7	lbs_notify_command_response
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x87f6f519	lbs_cmd_copyback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x8e4f6ce4	lbs_stop_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xa1c0e001	lbs_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xac9aac01	lbs_remove_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xb27fb0cb	lbs_host_sleep_cfg
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xc8b2a8eb	lbs_host_to_card_done
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xca355799	__lbs_cmd
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xe244c06f	lbs_send_tx_feedback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xe6d3af27	lbs_process_rxed_packet
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf275f40c	lbs_queue_event
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf64277de	lbs_debug
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf7219360	lbs_start_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf8d771d5	lbs_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x72dd49de	lbtf_bcn_sent
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x7da5df86	lbtf_remove_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x7e00b7a3	lbtf_cmd_response_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x93cac9a3	lbtf_cmd_copyback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xd295ebf5	lbtf_add_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xd3eda44e	__lbtf_cmd
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xded94cd5	lbtf_send_tx_feedback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xf18b3633	lbtf_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0x65ad821e	if_usb_reset_device
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0xddfd3e16	if_usb_prog_firmware
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x0ab2d172	p54_parse_eeprom
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x12fd110b	p54_unregister_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x2c34ff76	p54_read_eeprom
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x4e2bab8a	p54_free_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x948bdd69	p54_init_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x99cd34d1	p54_free_skb
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xc3b68731	p54_parse_firmware
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xc937f7df	p54_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xd720ad3f	p54_register_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x064023f8	rt2x00lib_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x0e4a66e8	rt2x00mac_rfkill_poll
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x14a5956e	rt2x00mac_set_key
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x1771eb8c	rt2x00lib_beacondone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x1d5fed69	rt2x00queue_get_entry
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x2082c611	rt2x00lib_rxdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x231b799e	rt2x00mac_start
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x251682e3	rt2x00mac_bss_info_changed
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x350ccfe6	rt2x00mac_remove_interface
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x54ef840c	rt2x00lib_probe_dev
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x65ec4ad3	rt2x00mac_set_tim
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x76286938	rt2x00mac_get_tx_stats
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x7b135acc	rt2x00mac_stop
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x7cc72466	rt2x00queue_get_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x8091d69f	rt2x00mac_configure_filter
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x8d91b1d8	rt2x00mac_config
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x9d4af1d6	rt2x00mac_get_stats
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xa29c9fb8	rt2x00mac_conf_tx
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xaaa16f37	rt2x00lib_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xbb4bf520	rt2x00mac_tx
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xc347f335	rt2x00lib_txdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xc8e70673	rt2x00lib_remove_dev
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xcf563f47	rt2x00mac_add_interface
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xf73330a1	rt2x00queue_map_txskb
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x31b84cac	rt2x00pci_rxdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x47bdc1c4	rt2x00pci_uninitialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x49aca75f	rt2x00pci_write_tx_data
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x4c9bcd49	rt2x00pci_initialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x6055c550	rt2x00pci_remove
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x95f18e4e	rt2x00pci_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xb42a1deb	rt2x00pci_regbusy_read
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xd58ed3cf	rt2x00pci_probe
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xe75adf1e	rt2x00pci_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x0ab4a811	rt2x00usb_vendor_request
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x14239042	rt2x00usb_initialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x39bd7318	rt2x00usb_vendor_request_large_buff
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x3ff25237	rt2x00usb_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x5ef1f5a7	rt2x00usb_vendor_request_buff
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x5ef55984	rt2x00usb_vendor_req_buff_lock
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x65ad23ea	rt2x00usb_kick_tx_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x6c9d78bc	rt2x00usb_disable_radio
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x6d4f9f0c	rt2x00usb_probe
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x7d0479d3	rt2x00usb_regbusy_read
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x7eed3b75	rt2x00usb_clear_entry
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x9925ed8c	rt2x00usb_kill_tx_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xb1936dfe	rt2x00usb_uninitialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xb36560cb	rt2x00usb_write_tx_data
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xc433d82b	rt2x00usb_disconnect
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xece6ed28	rt2x00usb_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0x58337bea	wl1251_alloc_hw
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0x846eb461	wl1251_init_ieee80211
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0xc0acc9c0	wl1251_free_hw
+EXPORT_SYMBOL_GPL drivers/pci/hotplug/acpiphp 0x3c3f5419	acpiphp_register_attention
+EXPORT_SYMBOL_GPL drivers/pci/hotplug/acpiphp 0xce81142c	acpiphp_unregister_attention
+EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0xd6483f43	pcf50633_mbc_get_status
+EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0xd6bd3c56	pcf50633_mbc_usb_curlim_set
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x1653410f	wm8350_isink_set_flash
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x360b3e32	wm8350_ldo_set_slot
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x6311d258	wm8350_register_led
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x703956ec	wm8350_register_regulator
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x9a8d886e	wm8350_dcdc_set_slot
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xd9976fd5	wm8350_dcdc25_set_mode
+EXPORT_SYMBOL_GPL drivers/regulator/wm8400-regulator 0x8d521125	wm8400_register_regulator
+EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x374c1e1c	fcoe_wwn_from_mac
+EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0xf3066304	fcoe_libfc_config
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0233f349	iscsi_pool_init
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0725d1ed	iscsi_itt_to_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0acb5438	iscsi_conn_start
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0bf54feb	iscsi_conn_send_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0e46105b	iscsi_suspend_tx
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x2f133447	iscsi_put_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x312fe715	iscsi_verify_itt
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x36097422	iscsi_conn_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x374e0b35	iscsi_host_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x3f9f3ef9	iscsi_session_recovery_timedout
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x41ba1d14	iscsi_pool_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x46a3b5f2	__iscsi_complete_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4ae9c094	iscsi_session_failure
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4e4e2166	__iscsi_get_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5162ce08	iscsi_eh_device_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5956b6f1	iscsi_conn_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x59b9f1c0	iscsi_change_queue_depth
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5d89ba19	iscsi_host_remove
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x6914808e	iscsi_complete_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x6a700a0e	iscsi_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x73df0a49	iscsi_conn_stop
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x770572fc	iscsi_queuecommand
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x77cdb621	iscsi_set_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x7b2aaa3f	iscsi_host_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x7c6cea27	iscsi_eh_target_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x7e2aad19	iscsi_complete_scsi_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x86b03f51	iscsi_requeue_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x9565ab99	iscsi_host_set_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xac37e383	iscsi_suspend_queue
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xac8a6027	iscsi_session_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xba3e21f7	iscsi_eh_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xc7af8bc2	iscsi_conn_failure
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xc7fca8af	iscsi_session_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xc8465d47	iscsi_session_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xdb0e71a4	iscsi_conn_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe2e90df1	iscsi_conn_bind
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe888705b	iscsi_conn_queue_work
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe8a99d5f	iscsi_prep_data_out_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xeda7f709	iscsi_host_add
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf2c23ed1	iscsi_itt_to_ctask
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf653ccfa	iscsi_update_cmdsn
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xff139145	iscsi_host_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x1e31ad5a	iscsi_tcp_task_init
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x2786cba2	iscsi_tcp_conn_get_stats
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x2fb8e9b5	iscsi_segment_seek_sg
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x328d13c3	iscsi_tcp_segment_unmap
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x506662bd	iscsi_segment_init_linear
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x63192cee	iscsi_tcp_task_xmit
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x7107aea1	iscsi_tcp_r2tpool_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x7248b7ae	iscsi_tcp_hdr_recv_prep
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x803a7212	iscsi_tcp_segment_done
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x812c03e1	iscsi_tcp_conn_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x81b51324	iscsi_tcp_cleanup_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x84defd80	iscsi_tcp_recv_segment_is_hdr
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xb2379ebd	iscsi_tcp_recv_skb
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xc566a271	iscsi_tcp_r2tpool_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xe4e89d01	iscsi_tcp_conn_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xe71c0fff	iscsi_tcp_dgst_header
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x02b4a935	sas_slave_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x1b4d323b	sas_target_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x3469ad0f	sas_queuecommand
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x3a04680d	sas_eh_device_reset_handler
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x3f54d550	__sas_task_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x638385e5	sas_unregister_ha
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x63d38fb7	sas_phy_enable
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x6f6d3605	sas_task_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x7ee5e537	sas_slave_configure
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x8072dd1c	sas_change_queue_type
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x849104c4	sas_eh_bus_reset_handler
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x9158bd45	sas_domain_release_transport
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x945ed8d4	sas_phy_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x9cd116a3	sas_domain_attach_transport
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xa0c7f792	sas_ioctl
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xa3091d5f	sas_ssp_task_response
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xb8e8d070	sas_register_ha
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xc53cf23c	sas_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xc5f9162d	sas_bios_param
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xc9d0cfea	sas_request_addr
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xce24934a	sas_change_queue_depth
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xe07c25f5	sas_find_local_phy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xefe0da61	sas_slave_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x5736d74e	srp_cmd_queue
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x624a17fc	srp_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x7a83613c	srp_iu_get
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x9f4bc0a7	srp_transfer_data
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xe90ae256	srp_iu_put
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xf49c1a84	srp_target_free
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x115c5550	scsi_tgt_tsk_mgmt_request
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x3c28758b	scsi_tgt_queue_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x6404eccf	scsi_host_put_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x8882e1a8	scsi_tgt_alloc_queue
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x89dd2a0a	scsi_tgt_it_nexus_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x9d64442a	scsi_tgt_cmd_to_host
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xbcbeab1f	scsi_host_get_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xf2b66570	scsi_tgt_it_nexus_create
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xfebd2a57	scsi_tgt_free_queue
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x11d78e90	iscsi_offload_mesg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x2a91cd3a	iscsi_conn_error_event
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x33e1949c	iscsi_destroy_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x45b6b915	iscsi_create_conn
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x4db01c01	iscsi_alloc_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x788f4d12	iscsi_host_for_each_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x7f160eb1	iscsi_lookup_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x8e898e8a	iscsi_unregister_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x95ddf05b	iscsi_session_event
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x98aa165b	iscsi_destroy_conn
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x9a2f6767	iscsi_register_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x9b3f11b2	iscsi_add_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x9efc80db	iscsi_remove_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xb2755f3b	iscsi_scan_finished
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xb9a3da5b	iscsi_recv_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xd1b0b2e2	iscsi_create_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xd435dbe0	iscsi_session_chkready
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xd8fd4f88	iscsi_unblock_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xeb81f0bb	iscsi_free_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xef23ac41	iscsi_destroy_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xfe0db61b	iscsi_block_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xff0effff	iscsi_create_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0x0ef06974	spi_populate_ppr_msg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xa0c71dac	spi_populate_sync_msg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xcffa2aff	spi_populate_width_msg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x1a095dfa	srp_rport_add
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x342e798f	srp_rport_del
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x53328b63	srp_remove_host
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x887e30cd	srp_attach_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xa3d81d2e	srp_release_transport
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x10417133	spi_bitbang_setup
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x3fb2ca50	spi_bitbang_transfer
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x4b7a8cca	spi_bitbang_setup_transfer
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x8d341833	spi_bitbang_cleanup
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x959ed4e3	spi_bitbang_stop
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xfdb3a61c	spi_bitbang_start
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x4740fc22	comedi_usb_auto_config
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x4e4b42d1	comedi_free_board_minor
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x656c3316	comedi_alloc_board_minor
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x813c41b0	comedi_pci_auto_unconfig
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xa940cf72	comedi_get_device_file_info
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xb5725623	comedi_usb_auto_unconfig
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xc57fdaf4	comedi_pci_auto_config
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/das08 0x86fcde20	das08_cs_boards
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/das08 0xa8403a06	das08_common_detach
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/das08 0xbd5c7f77	das08_common_attach
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0x25e55b95	labpc_1200_is_unipolar
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0x74f4cde2	labpc_common_attach
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0x8285332a	range_labpc_1200_ai
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0xa300db0f	labpc_common_detach
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0xaf1e4347	labpc_1200_ai_gain_bits
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x72d1ecfc	ni_tio_init_counter
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x88e18c67	ni_tio_insn_config
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x8de73efb	ni_tio_set_gate_src
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xbc603c7b	ni_tio_rinsn
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xcb918584	ni_tio_arm
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xda8e3743	ni_tio_winsn
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xe7bb07e7	ni_gpct_device_construct
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xf63a1706	ni_gpct_device_destroy
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x0881c06a	ni_tio_acknowledge_and_confirm
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x1ae54024	ni_tio_set_mite_channel
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x6960325b	ni_tio_cancel
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0xb020fb42	ni_tio_cmdtest
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0xe564e1a6	ni_tio_handle_interrupt
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0xf84c460c	ni_tio_cmd
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x2468ed34	oslec_hpf_tx
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x579d2806	oslec_snapshot
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x587711de	oslec_create
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x882d5f27	oslec_adaption_mode
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xf828c15b	oslec_flush
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xf923a5b1	oslec_free
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xfabc3747	oslec_update
+EXPORT_SYMBOL_GPL drivers/staging/hv/hv_vmbus 0x0a1ee779	osd_WaitEventWait
+EXPORT_SYMBOL_GPL drivers/staging/hv/hv_vmbus 0x4cc1b61c	osd_WaitEventCreate
+EXPORT_SYMBOL_GPL drivers/staging/hv/hv_vmbus 0x5432d87a	osd_WaitEventSet
+EXPORT_SYMBOL_GPL drivers/staging/hv/hv_vmbus 0x746d1786	osd_PageAlloc
+EXPORT_SYMBOL_GPL drivers/staging/hv/hv_vmbus 0x83911c38	osd_PageFree
+EXPORT_SYMBOL_GPL drivers/staging/hv/hv_vmbus 0xa1b8d1ad	osd_WaitEventWaitEx
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x000b9d38	usbip_event_happened
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x17db25c4	usbip_start_threads
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x187caa54	dev_attr_usbip_debug
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x243ef0a3	usbip_xmit
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x33ed1c6b	usbip_pack_pdu
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x53bc8597	usbip_start_eh
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x646f4737	usbip_recv_xbuff
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x730aa269	usbip_stop_threads
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x78b72f44	usbip_debug_flag
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xa9b854a6	usbip_pad_iso
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xb13b3d55	usbip_dump_urb
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xb60c874a	usbip_stop_eh
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xcc575f6e	usbip_recv_iso
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xd02753dc	usbip_header_correct_endian
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xd51168f0	usbip_task_init
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xda0da877	usbip_alloc_iso_desc_pdu
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xdf2531ad	sockfd_to_socket
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xe1ea0586	usbip_dump_header
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xff18ad38	usbip_event_add
+EXPORT_SYMBOL_GPL drivers/uio/uio 0x09fe0eda	uio_unregister_device
+EXPORT_SYMBOL_GPL drivers/uio/uio 0xc3cd2c4e	__uio_register_device
+EXPORT_SYMBOL_GPL drivers/uio/uio 0xedd4ae42	uio_event_notify
+EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0x62260897	usbatm_usb_probe
+EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0xf2ad58a3	usbatm_usb_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x01566150	usb_ftdi_elan_edset_single
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x0e1e554e	usb_ftdi_elan_edset_flush
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x2a7f9a7d	usb_ftdi_elan_edset_output
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x54409de9	ftdi_elan_gone_away
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x965ec5c4	usb_ftdi_elan_edset_empty
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xb77509e5	usb_ftdi_elan_edset_input
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xd45791fd	usb_ftdi_elan_write_pcimem
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xde11f8b1	usb_ftdi_elan_edset_setup
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xfbccb9f8	usb_ftdi_elan_read_pcimem
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x09c752ff	usb_serial_probe
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x1a89145f	usb_serial_port_softint
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x2ec6cb33	usb_serial_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x31ee8cc8	usb_serial_generic_resume
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x420634cb	usb_serial_generic_write
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x572cf866	ezusb_set_reset
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x5da541fa	ezusb_writememory
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x673c46b1	usb_serial_generic_resubmit_read_urb
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x7b984931	usb_serial_deregister
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x85ed1847	usb_serial_register
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x9947f9b0	usb_serial_generic_read_bulk_callback
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xab8399e1	usb_serial_handle_break
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xac255683	usb_serial_handle_dcd_change
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xc2b90686	usb_serial_generic_open
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xcc8e57c5	usb_serial_handle_sysrq_char
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xf55e5c01	usb_serial_generic_write_bulk_callback
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x0be13004	usb_storage_usb_ids
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x10e26bc1	usb_stor_suspend
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1bc3edc2	usb_stor_sense_invalidCDB
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1c33ac90	usb_stor_transparent_scsi_command
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x278a9162	usb_stor_clear_halt
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x38158265	usb_stor_Bulk_transport
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x527ee8bc	fill_inquiry_response
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x5813887a	usb_stor_probe1
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x5b889a3f	usb_stor_CB_transport
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x5d2c09ef	usb_stor_pre_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x6f7f00fd	usb_stor_reset_resume
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x837b7df2	usb_usual_ignore_device
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x8b646c07	usb_stor_ctrl_transfer
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xa42eac36	usb_stor_resume
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xb0883d95	usb_stor_Bulk_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xb4f39b03	usb_stor_bulk_transfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xbee68a2e	usb_stor_probe2
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xc56a8188	usb_stor_post_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xc99b1456	usb_stor_set_xfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xd7e4184f	usb_stor_bulk_srb
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xe33537bd	usb_stor_control_msg
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xec21447b	usb_stor_bulk_transfer_sg
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xf3089095	usb_stor_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xf6a4bce1	usb_stor_access_xfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xfab087ce	usb_stor_CB_reset
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x55ac5608	wa_urb_dequeue
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x5b0fc154	wa_urb_enqueue_run
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x5c763594	wa_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x8668d134	rpipe_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x9fcf8265	__wa_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xa2a79ba9	rpipe_ep_disable
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xec5cc785	wa_urb_enqueue
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x0bb6bf5e	wusb_cluster_id_get
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x182bb06e	__wusb_dev_get_by_usb_dev
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x1cf62d01	wusbhc_rh_start_port_reset
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x52510d61	wusbhc_b_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x6a60b756	wusbhc_chid_set
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x6cad9a0d	wusbhc_reset_all
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x71675aa9	wusbhc_rh_status_data
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x8a9e30a9	wusbhc_rh_resume
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xa75d65ea	wusbhc_mmcie_set
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xa9e49217	wusbhc_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb016365a	wusbhc_rh_suspend
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb725d128	wusb_cluster_id_put
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xc08cd390	wusbhc_handle_dn
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xd1d1a05f	wusbhc_b_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xd45d8296	wusbhc_rh_control
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xdf6e4f08	wusb_dev_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xe996affc	wusbhc_giveback_urb
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf770a6b4	wusbd
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf7cf8d9a	wusbhc_mmcie_rm
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf90067c8	wusbhc_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xfe2e17d7	wusb_et_name
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x1ec38ee5	i1480_rceb_check
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x4fa3fc9c	i1480_cmd
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0xea7f0e2a	i1480_fw_upload
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x1baa5ae4	uwb_pca_base_priority_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x4accec22	uwb_rts_cts_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x5e666737	uwb_phy_rate_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x9607cca3	uwb_ack_policy_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x9a2524f8	uwb_rts_cts_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xbb27f85a	uwb_phy_rate_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xeb45e333	uwb_pca_base_priority_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xf625bd31	uwb_ack_policy_store
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x113eb73a	umc_match_pci_id
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x3862039e	umc_device_create
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xa9470df0	umc_bus_type
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xb3c183b2	umc_device_register
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xbe705fa5	umc_driver_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xc458ba3a	umc_device_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xde2af4c3	__umc_driver_register
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xfd65029d	umc_controller_reset
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x02e16a09	uwb_radio_start
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x05f05757	uwb_rsv_destroy
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0af9fb31	uwb_rc_init
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x128ae03e	uwb_rsv_modify
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x1d0f80a8	uwb_rc_pre_reset
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2075ba81	uwb_pal_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x22dc0c80	uwb_radio_stop
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x235bb961	uwb_rsv_create
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2400fa97	uwb_rc_rm
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2cb8fcbf	uwb_dev_try_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2f58a2a4	uwb_rc_dev_addr_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x449cac9b	uwb_rc_ie_rm
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x469c5f2d	uwb_rc_reset_all
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4d57ae3c	uwb_rsv_type_str
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x51d1fd37	__uwb_rc_try_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5596a9f6	uwb_rc_cmd_async
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x58554226	uwb_rc_cmd
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x58eff876	uwb_notifs_deregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5c091b6f	uwb_rc_alloc
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x63dce779	uwb_rc_ie_add
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6b9377c5	uwb_ie_next
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6bcd28f0	uwb_rc_neh_error
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6dd7d926	uwb_dev_for_each
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x7f1e50ca	uwb_est_find_size
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x85417e20	uwb_notifs_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x87f472d4	uwb_rc_mac_addr_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x8cb42db6	__uwb_addr_print
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x969f738b	uwb_pal_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x98413234	uwb_rsv_state_str
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa5fd908c	uwb_rc_get_by_grandpa
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xafb014ec	uwb_pal_init
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb0a09251	uwb_rsv_get_usable_mas
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb56d816f	uwb_rc_vcmd
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb94bcc7e	uwb_rc_post_reset
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xbbb96d89	uwb_rsv_accept
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xbc96fded	uwb_rsv_establish
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xca3ff44b	uwb_rc_add
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd15729f4	uwb_rc_neh_grok
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd2e46760	uwb_rc_put
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd7692b0c	uwb_rc_get_by_dev
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xeb4cab9a	uwb_est_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf7ca313a	uwb_est_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xfa22f860	uwb_rsv_terminate
+EXPORT_SYMBOL_GPL drivers/uwb/whci 0x5408e067	whci_wait_for
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x072df01c	wlp_dev_model_nr_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x0e373e90	wlp_wss_setup
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x14fa380b	wlp_remove
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x176e71cb	wlp_wss_activate_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x179c9689	wlp_dev_manufacturer_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x1df82cb9	wlp_dev_model_name_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x3033c682	wlp_dev_name_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x386c86ae	wlp_wss_activate_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x391e4929	wlp_dev_model_nr_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x3ea1dbb4	wlp_dev_prim_OUI_sub_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x41bc13d4	wlp_setup
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x446cc1da	wlp_reset_all
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x44c93a42	wlp_receive_frame
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x5666393e	wlp_wss_remove
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x5acee9b1	wlp_dev_prim_subcat_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x5f886bb3	wlp_dev_serial_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x69c0cfe4	wlp_dev_model_name_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x6d68664d	wlp_uuid_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x7aa25990	wlp_dev_prim_subcat_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x7e944187	wlp_dev_prim_OUI_sub_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x842217d0	wlp_dev_name_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x8573e9ba	wlp_dev_prim_category_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x8614c1a6	wlp_uuid_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x8fa0615a	wlp_neighborhood_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x91b57649	wlp_dev_prim_category_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x94026039	wlp_dev_prim_OUI_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x9534fd3e	wlp_eda_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xc2867679	wlp_dev_manufacturer_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xdb0494fd	wlp_prepare_tx_frame
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xe95a9091	wlp_eda_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xf0b98c9f	wlp_dev_prim_OUI_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xf4546370	wlp_dev_serial_show
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x11450619	ili9320_write_regs
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x213c6dc7	ili9320_shutdown
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x4683efae	ili9320_write
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x54d46523	ili9320_probe_spi
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xbf2fe6e8	ili9320_suspend
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xbfe08c7d	ili9320_remove
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xeec84eea	ili9320_resume
+EXPORT_SYMBOL_GPL drivers/video/fb_ddc 0xef688fda	fb_ddc_read
+EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0x6844a775	fb_sys_read
+EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0x97d30a82	fb_sys_write
+EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0x75258e81	sis_malloc_new
+EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0x8ae0a91a	sis_free_new
+EXPORT_SYMBOL_GPL drivers/video/vermilion/vmlfb 0x016e6c20	vmlfb_unregister_subsys
+EXPORT_SYMBOL_GPL drivers/video/vermilion/vmlfb 0x90c018c6	vmlfb_register_subsys
+EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x541f96d4	register_virtio_device
+EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x612db4f9	unregister_virtio_driver
+EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x866e4528	register_virtio_driver
+EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x8dd9d7f4	unregister_virtio_device
+EXPORT_SYMBOL_GPL drivers/virtio/virtio 0xec83e87f	virtio_check_driver_offered_feature
+EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x0ac0ab25	vring_interrupt
+EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x667e4758	vring_new_virtqueue
+EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x668d2276	vring_transport_features
+EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x68c71d40	vring_del_virtqueue
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x03d3d720	w1_next_pullup
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x05f85617	w1_touch_block
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x1e04bf02	w1_read_block
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x7c2f2afb	w1_calc_crc8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x9db4ab79	w1_reset_select_slave
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xe63ddb0e	w1_write_8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xee7f1cce	w1_reset_bus
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xf19fb0d9	w1_read_8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xfbebaec5	w1_write_block
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x0864c4a4	dlm_new_lockspace
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x0de5ddea	dlm_posix_unlock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x9321df95	dlm_lock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xa8343212	dlm_posix_lock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xcf9f3328	dlm_release_lockspace
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xdc583c08	dlm_unlock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xf24e636c	dlm_posix_get
+EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0x0f21b73b	exportfs_decode_fh
+EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0x699686e4	exportfs_encode_fh
+EXPORT_SYMBOL_GPL fs/fat/fat 0x043b28e1	fat_attach
+EXPORT_SYMBOL_GPL fs/fat/fat 0x09b502fd	fat_time_unix2fat
+EXPORT_SYMBOL_GPL fs/fat/fat 0x3468d170	fat_free_clusters
+EXPORT_SYMBOL_GPL fs/fat/fat 0x4e566f1b	fat_sync_inode
+EXPORT_SYMBOL_GPL fs/fat/fat 0x52ba06c2	fat_add_entries
+EXPORT_SYMBOL_GPL fs/fat/fat 0x58b76c98	fat_getattr
+EXPORT_SYMBOL_GPL fs/fat/fat 0x5f7805cf	fat_fill_super
+EXPORT_SYMBOL_GPL fs/fat/fat 0x62d021f6	fat_scan
+EXPORT_SYMBOL_GPL fs/fat/fat 0x7a1a3b30	fat_remove_entries
+EXPORT_SYMBOL_GPL fs/fat/fat 0x7c7e5fc0	fat_get_dotdot_entry
+EXPORT_SYMBOL_GPL fs/fat/fat 0x7d9f2372	fat_flush_inodes
+EXPORT_SYMBOL_GPL fs/fat/fat 0x9b7020fa	fat_fs_error
+EXPORT_SYMBOL_GPL fs/fat/fat 0x9fb395db	fat_setattr
+EXPORT_SYMBOL_GPL fs/fat/fat 0xa32f4394	fat_alloc_new_dir
+EXPORT_SYMBOL_GPL fs/fat/fat 0xb4ac2004	fat_build_inode
+EXPORT_SYMBOL_GPL fs/fat/fat 0xe69adb0c	fat_search_long
+EXPORT_SYMBOL_GPL fs/fat/fat 0xedf2aa3e	fat_dir_empty
+EXPORT_SYMBOL_GPL fs/fat/fat 0xfbbf2232	fat_detach
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x17ce645d	locks_end_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x1a618932	nlmsvc_unlock_all_by_ip
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x22b7c27a	nlmsvc_unlock_all_by_sb
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x433b2a2c	nlmclnt_done
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x4a3ed85f	nlmclnt_init
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x6f959b35	locks_in_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x96877ac4	locks_start_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xa7b91a7b	lockd_down
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xcf05ee15	nlmclnt_proc
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xf6933c48	lockd_up
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xf93fd837	nlmsvc_ops
+EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0x0310380f	nfsacl_decode
+EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0xb389ad43	nfsacl_encode
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1b89c6ee	o2hb_fill_node_map
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1d747ce3	o2hb_check_node_heartbeating
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x2b6b2db6	o2nm_node_put
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x36418553	o2net_send_message
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x45d0b066	o2hb_unregister_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x4900035b	o2hb_stop_all_regions
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x521e0726	o2net_send_message_vec
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x81a17396	mlog_and_bits
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x9e80bf02	o2nm_node_get
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa82a8645	o2nm_this_node
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa87bc9e7	o2nm_configured_node_map
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xad834f8e	o2nm_get_node_by_ip
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xae808bac	o2net_register_handler
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xb70536a7	o2nm_get_node_by_num
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xbaeb4700	o2hb_check_node_heartbeating_from_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xd26bb346	o2hb_register_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xd60f2c6c	o2hb_check_local_node_heartbeating
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf1a5611d	o2net_unregister_handler_list
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf56c2017	mlog_not_bits
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf88c724e	o2hb_setup_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x0cebb6e1	dlm_register_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x328717ed	dlm_register_domain
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x4b38cf12	dlmunlock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x7a1211f8	dlm_setup_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x83921c03	dlm_unregister_domain
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x8680f9c5	dlmlock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd7ba575e	dlm_errmsg
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd8fa57a6	dlm_unregister_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xdb802f89	dlm_print_one_lock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xfb86b96f	dlm_errname
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0562c415	ocfs2_cluster_this_node
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x06379db6	ocfs2_dlm_lvb_valid
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0b5fee49	ocfs2_stack_glue_unregister
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0e27f909	ocfs2_dlm_lock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x21db5b88	ocfs2_cluster_disconnect
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x233078e9	ocfs2_plock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4a1f6fe9	ocfs2_cluster_connect
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4d3af7fa	ocfs2_cluster_hangup
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x81c85a68	ocfs2_dlm_lock_status
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x882a3d27	ocfs2_stack_glue_register
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x91fab465	ocfs2_dlm_lvb
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x963932a3	ocfs2_stack_glue_set_locking_protocol
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xa7d5c1c0	ocfs2_dlm_unlock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xbbc4ef97	ocfs2_stack_supports_plocks
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xd066711e	ocfs2_dlm_dump_lksb
+EXPORT_SYMBOL_GPL lib/lzo/lzo_compress 0x2e1d43cf	lzo1x_1_compress
+EXPORT_SYMBOL_GPL lib/lzo/lzo_decompress 0x2a1538ca	lzo1x_decompress_safe
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x300d7e57	free_rs
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x6fbb3bd9	init_rs_non_canonical
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xabda1e2e	decode_rs16
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xb050f329	init_rs
+EXPORT_SYMBOL_GPL net/802/garp 0x5b68b857	garp_register_application
+EXPORT_SYMBOL_GPL net/802/garp 0x965fa84c	garp_unregister_application
+EXPORT_SYMBOL_GPL net/802/garp 0xb0619288	garp_init_applicant
+EXPORT_SYMBOL_GPL net/802/garp 0xbba01a2f	garp_request_join
+EXPORT_SYMBOL_GPL net/802/garp 0xdc2f2252	garp_uninit_applicant
+EXPORT_SYMBOL_GPL net/802/garp 0xf6e716f2	garp_request_leave
+EXPORT_SYMBOL_GPL net/802/stp 0x6f6f3ed3	stp_proto_unregister
+EXPORT_SYMBOL_GPL net/802/stp 0xc5bd0753	stp_proto_register
+EXPORT_SYMBOL_GPL net/ax25/ax25 0x77874b50	ax25_register_pid
+EXPORT_SYMBOL_GPL net/ax25/ax25 0xac93ae05	ax25_bcast
+EXPORT_SYMBOL_GPL net/ax25/ax25 0xaeb7451e	ax25_defaddr
+EXPORT_SYMBOL_GPL net/bluetooth/bluetooth 0xa8a98916	bt_class
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x0cb87407	dccp_rcv_established
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x0ea67ac2	dccp_check_req
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x11f798ee	dccp_getsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x16f5da87	dccp_ioctl
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x1d99d49a	dccp_timestamp
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x22ae8d61	dccp_reqsk_init
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x260d385f	dccp_send_ack
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x2e47fd4a	dccp_reqsk_send_ack
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x34e98bc7	compat_dccp_setsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x36687a6c	dccp_insert_option_elapsed_time
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x4614ea95	dccp_death_row
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x4768d704	dccp_set_state
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x4b96bd86	dccp_destroy_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x4cdd391d	dccp_feat_list_purge
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x51905f57	dccp_parse_options
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x55371007	dccp_child_process
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x56ea266a	dccp_state_name
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x5a895ef2	dccp_insert_option
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x5b0df908	dccp_close
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x6447a5b0	dccp_rcv_state_process
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x70b1d967	dccp_orphan_count
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x70daa304	dccp_ctl_make_reset
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x77d265f7	dccp_disconnect
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x79a62dcc	compat_dccp_getsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x86be7924	dccp_packet_name
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x8b7d8caf	dccp_statistics
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x8f69e660	dccp_shutdown
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x91a96fba	dccp_create_openreq_child
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x9c6d55da	dccp_hashinfo
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xa140c039	dccp_insert_option_timestamp
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xa4b4a52a	dccp_poll
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xb6c54765	dccp_sync_mss
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xbe15de7d	dccp_done
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xbf8a1e7f	dccp_connect
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xce835693	inet_dccp_listen
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xd78317a0	dccp_send_sync
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xd8551117	dccp_make_response
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xdd2d1823	dccp_setsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xee6754ca	dccp_sendmsg
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xf78c2ef6	dccp_recvmsg
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xfc0130f7	dccp_init_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x0339f119	dccp_v4_send_check
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x168216f2	dccp_v4_request_recv_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x3204f226	dccp_v4_do_rcv
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xc4132825	dccp_v4_connect
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xde96a45a	dccp_invalid_packet
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xe769ff76	dccp_v4_conn_request
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0x30329378	nf_nat_seq_adjust_hook
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0x6d40a921	need_ipv4_conntrack
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_defrag_ipv4 0x6b6c3d10	nf_defrag_ipv4_enable
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x07ae60b6	nf_nat_proto_in_range
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x0f25d432	nf_nat_proto_unique_tuple
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x5d0f0fe6	nf_nat_packet
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x67238ea3	nf_nat_proto_put
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x7977f0ed	nf_nat_get_offset
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x94a08134	nf_nat_proto_nlattr_to_range
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x98f5b728	nf_nat_proto_find_get
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xcb9bb464	nf_nat_proto_range_to_nlattr
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xf0b14bfa	nf_nat_icmp_reply_translation
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat_proto_gre 0x636b12c8	nf_nat_need_gre
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x229ebeba	tcp_vegas_pkts_acked
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x3a59868e	tcp_vegas_init
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x7954b537	tcp_vegas_get_info
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x93c24e36	tcp_vegas_cwnd_event
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xaf161426	tcp_vegas_state
+EXPORT_SYMBOL_GPL net/mac80211/mac80211 0x3259bf4d	ieee80211_iterate_active_interfaces
+EXPORT_SYMBOL_GPL net/mac80211/mac80211 0x92383faa	ieee80211_iterate_active_interfaces_atomic
+EXPORT_SYMBOL_GPL net/netfilter/ipvs/ip_vs 0xe6476b4a	net_vs_ctl_path
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x041013fd	nf_conntrack_lock
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x045072cd	nf_ct_port_nla_policy
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x154a292e	nf_conntrack_event_cb
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x2077b1d2	nf_conntrack_in
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x28f4ec26	nf_ct_l3proto_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x299046f1	nf_ct_expect_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x309ca94a	nf_conntrack_l4proto_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x31d7a7f0	nf_ct_expect_alloc
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x37d53f5a	nf_ct_get_tuplepr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3976a429	nf_conntrack_alter_reply
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3cd25e28	nf_ct_delete_from_lists
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3d20a943	nf_ct_expect_register_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3e7743ee	__nf_ct_expect_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3f5b1415	nf_ct_port_nlattr_to_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x40840727	nf_ct_nat_offset
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x428686b9	nf_conntrack_hash_insert
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4a867991	nf_conntrack_tuple_taken
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4b9065a9	nf_ct_alloc_hashtable
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x54580728	nf_ct_l3proto_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5882ba33	nf_conntrack_set_hashsize
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x59b8df88	nf_ct_remove_expectations
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x62813e5c	nf_ct_port_nlattr_tuple_size
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x63183b81	nf_ct_expect_unregister_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6b16c523	print_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6e224a7a	need_conntrack
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x71bba362	nf_conntrack_register_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x7309d6b2	nfnetlink_parse_nat_setup_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x78f9b710	nf_ct_l3proto_try_module_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8033d2b8	nf_conntrack_unregister_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x86e5a3a9	__nf_ct_kill_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x89dd373b	nf_conntrack_untracked
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8b94d4cd	nf_conntrack_l3proto_generic
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8d0b2045	nf_ct_extend_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8d2a946d	nf_conntrack_l4proto_tcp6
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8e5bc8fb	__nf_conntrack_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8ffe7e89	nf_conntrack_htable_size
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x90ff6c9f	nf_ct_invert_tuplepr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x936a1c51	nf_conntrack_helper_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x96a9ae5e	nf_conntrack_l3proto_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x979574a3	nf_conntrack_alloc
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9af3f6c1	nf_ct_free_hashtable
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9bd99000	nf_conntrack_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9eab639e	nf_ct_helper_ext_add
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xad24d83f	nf_ct_iterate_cleanup
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb602c57e	nf_ct_l3proto_module_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb676a7bb	nf_ct_deliver_cached_events
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb7385828	nf_ct_l3protos
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb874454e	nf_expect_event_cb
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xbe97395d	nf_conntrack_l3proto_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xbf1cf6ef	nf_conntrack_l4proto_tcp4
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xbf9a7ab1	nf_ct_expect_init
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc114900c	nf_ct_expect_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc18ac88d	nf_ct_expect_hsize
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xcd130ea3	nf_conntrack_l4proto_udp4
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xdaa6958c	nf_ct_unlink_expect
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xdc6d183c	__nf_conntrack_confirm
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xdc937347	__nf_ct_try_assign_helper
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xdd6f7a2b	nf_ct_invert_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xe3f09b8c	nf_ct_port_tuple_to_nlattr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xe5dd8622	seq_print_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xec784b37	__nf_conntrack_helper_find_byname
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf1d8a4af	nf_conntrack_l4proto_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf20e40e9	nf_ct_unexpect_related
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf38bcdf3	nf_conntrack_max
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf5059e17	nf_conntrack_free
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf78630ec	nf_ct_get_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf7ac1c09	nf_ct_insert_dying_list
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf7b16b06	nf_conntrack_helper_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf98bfd29	__nf_ct_l4proto_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xfd88c384	__nf_ct_refresh_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xfe924a5e	nf_ct_extend_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xfee2c47d	nf_ct_expect_related_report
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xff256c21	nf_conntrack_l4proto_udp6
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xffd006f1	nf_conntrack_flush_report
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_amanda 0xee062e75	nf_nat_amanda_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_ftp 0x79f922f1	nf_nat_ftp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x1aa6ccb3	set_h245_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x1fd415fe	set_sig_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x2a5b4aed	nat_rtp_rtcp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x461d9c45	set_h225_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x4fd989d9	set_ras_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xcad5788d	nat_t120_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xd0c28db8	nat_callforwarding_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xd8f32b48	get_h225_addr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xe5ba412b	nat_q931_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xf9d48b91	nat_h245_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_irc 0x25a4456c	nf_nat_irc_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x8c9ed242	nf_nat_pptp_hook_expectfn
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x9f97e732	nf_nat_pptp_hook_outbound
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0xbbf81833	nf_nat_pptp_hook_inbound
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0xef4ecfb6	nf_nat_pptp_hook_exp_gre
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_proto_gre 0x694cfa36	nf_ct_gre_keymap_add
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_proto_gre 0x97025e07	nf_ct_gre_keymap_destroy
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x191a1e02	nf_nat_sdp_media_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x550bf04e	nf_nat_sip_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x577b912a	ct_sip_get_header
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x6fc59583	ct_sip_parse_numerical_param
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x8835e61d	nf_nat_sip_expect_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x8c22bc74	ct_sip_parse_request
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xb32e9258	nf_nat_sdp_port_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xc9884685	ct_sip_get_sdp_header
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xc9c5fea0	nf_nat_sdp_session_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xcbe20bb4	ct_sip_parse_header_uri
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xed3ac1c8	nf_nat_sdp_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xfa8b732c	ct_sip_parse_address_param
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_tftp 0xc8190272	nf_nat_tftp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_tproxy_core 0x67919705	nf_tproxy_get_sock_v4
+EXPORT_SYMBOL_GPL net/netfilter/nf_tproxy_core 0xb91b8590	nf_tproxy_assign_sock
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x1f58e71b	nfnl_lock
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x2a95cb90	nfnetlink_subsys_register
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x3895cd7a	nfnl_unlock
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x81266848	nfnetlink_send
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x9fdcd051	nfnetlink_subsys_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xb1313202	nfnetlink_unicast
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xeca95329	nfnetlink_has_listeners
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xef9b4bbd	nfnetlink_set_err
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink_log 0x82bffa64	nfulnl_log_packet
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x0461861b	xt_proto_fini
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x0ff4c887	xt_proto_init
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x161d1417	xt_compat_unlock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x40728a63	xt_find_revision
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x43d19190	xt_request_find_target
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x469a21e9	xt_table_unlock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x4f432b51	per_cpu__xt_info_locks
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x4f5f999a	xt_compat_match_offset
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x532d245b	xt_find_table_lock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x588ab925	xt_replace_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x5f82f1f7	xt_compat_flush_offsets
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x617408f6	xt_compat_match_to_user
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x684694c5	xt_compat_add_offset
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x6f9aa2fb	xt_compat_calc_jump
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x8ea0f27f	xt_check_match
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x9f5c1656	xt_compat_target_from_user
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xa39adff3	xt_compat_target_offset
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xac9ff578	xt_compat_target_to_user
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xb0d16ab7	xt_unregister_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xded6fbf1	xt_check_target
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xe03b1c81	xt_register_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xe0b4971b	xt_compat_lock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xf5c8286a	xt_compat_match_from_user
+EXPORT_SYMBOL_GPL net/netfilter/xt_RATEEST 0xc2429b63	xt_rateest_lookup
+EXPORT_SYMBOL_GPL net/netfilter/xt_RATEEST 0xfc852663	xt_rateest_put
+EXPORT_SYMBOL_GPL net/rds/rds 0x00a467af	rds_wq
+EXPORT_SYMBOL_GPL net/rds/rds 0x2c5c5514	rds_message_add_rdma_dest_extension
+EXPORT_SYMBOL_GPL net/rds/rds 0x2d0ff6e2	rds_message_put
+EXPORT_SYMBOL_GPL net/rds/rds 0x3101936e	rds_message_add_extension
+EXPORT_SYMBOL_GPL net/rds/rds 0x3e6e753e	rds_info_copy
+EXPORT_SYMBOL_GPL net/rds/rds 0x48f3f275	rds_page_copy_user
+EXPORT_SYMBOL_GPL net/rds/rds 0x4b7fdf43	rds_send_get_message
+EXPORT_SYMBOL_GPL net/rds/rds 0x57dec865	rds_conn_create
+EXPORT_SYMBOL_GPL net/rds/rds 0x62cc24cf	rds_message_addref
+EXPORT_SYMBOL_GPL net/rds/rds 0x708efe06	rds_conn_drop
+EXPORT_SYMBOL_GPL net/rds/rds 0x73aac73d	rds_message_populate_header
+EXPORT_SYMBOL_GPL net/rds/rds 0x7d615943	rds_conn_create_outgoing
+EXPORT_SYMBOL_GPL net/rds/rds 0x85844b66	rds_rdma_send_complete
+EXPORT_SYMBOL_GPL net/rds/rds 0x87eae598	rds_trans_unregister
+EXPORT_SYMBOL_GPL net/rds/rds 0x885b03db	rds_cong_map_updated
+EXPORT_SYMBOL_GPL net/rds/rds 0x90a7c3f9	rds_info_register_func
+EXPORT_SYMBOL_GPL net/rds/rds 0x9b3e6113	per_cpu__rds_stats
+EXPORT_SYMBOL_GPL net/rds/rds 0xa9a697cc	rds_info_deregister_func
+EXPORT_SYMBOL_GPL net/rds/rds 0xb41161b8	rds_connect_complete
+EXPORT_SYMBOL_GPL net/rds/rds 0xbfd2ef6a	rds_conn_destroy
+EXPORT_SYMBOL_GPL net/rds/rds 0xc2da8e38	rds_stats_info_copy
+EXPORT_SYMBOL_GPL net/rds/rds 0xc68fd6b6	rds_inc_addref
+EXPORT_SYMBOL_GPL net/rds/rds 0xc7e4e60f	rds_recv_incoming
+EXPORT_SYMBOL_GPL net/rds/rds 0xcadc9a40	rds_message_unmapped
+EXPORT_SYMBOL_GPL net/rds/rds 0xd3e001b1	rds_for_each_conn_info
+EXPORT_SYMBOL_GPL net/rds/rds 0xd8b66752	rds_inc_put
+EXPORT_SYMBOL_GPL net/rds/rds 0xd9dad4b6	rds_inc_init
+EXPORT_SYMBOL_GPL net/rds/rds 0xdcd92242	rds_trans_register
+EXPORT_SYMBOL_GPL net/rds/rds 0xeba93fc1	rds_send_drop_acked
+EXPORT_SYMBOL_GPL net/rxrpc/af-rxrpc 0x64760b1f	rxrpc_unregister_security
+EXPORT_SYMBOL_GPL net/rxrpc/af-rxrpc 0x77c8519c	rxrpc_register_security
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x00c52ef5	g_make_token_header
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x021b9b27	svcauth_gss_flavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x06863eaf	gss_mech_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x2a404825	gss_mech_put
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x3848a457	gss_mech_get
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x467c46b9	gss_pseudoflavor_to_service
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x46a24ba9	gss_mech_get_by_name
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x69881eba	gss_service_to_auth_domain_name
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x6c2ff54b	gss_mech_register
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x8d1a827e	svcauth_gss_register_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xb5dea7ef	g_token_size
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xb64bf8fb	svc_gss_principal
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xc73bec46	gss_svc_to_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xeabc090b	gss_mech_get_by_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xf8b2ff6e	g_verify_token_header
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x02d6f23a	xprt_set_retrans_timeout_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x036edf7e	svc_xprt_put
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x03dc05be	svc_unreg_xprt_class
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x047cd06a	cache_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x057a2788	rpc_wake_up_queued_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x05e807a9	xdr_encode_string
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x065994f1	xdr_encode_opaque_fixed
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x06d9bd07	svc_sock_update_bufs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0b62ee93	svc_wake_up
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0efcda21	rpc_pton
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0f0e27b2	svc_sock_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0f668ba9	svc_auth_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x10b80c8f	rpc_alloc_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x12e280e3	svc_proc_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x13a9503a	xprt_release_rqst_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x159fff37	rpc_killall_tasks
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1746ef59	rpc_malloc
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1d86f32a	svc_close_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1f8e8a7c	xdr_decode_word
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x21e5e742	xdr_skb_read_bits
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x23aeb317	xdr_encode_word
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x23e180b0	rpcauth_lookup_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2474a65b	unix_domain_find
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2588f3f8	rpc_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x27d02c02	rpcauth_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2919b156	xdr_decode_string_inplace
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2a964844	xdr_encode_array2
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2aa17774	rpc_free_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2b5974ab	svc_set_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2d32d62b	rpc_bind_new_program
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2d4b7939	svc_exit_thread
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2edf64b3	auth_unix_add_addr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2eec63c9	xdr_encode_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2ef4f372	sunrpc_cache_register_pipefs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x30a6df09	svc_print_addr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x31a89d59	rpc_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x37635301	rpc_lookup_machine_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3be016ae	xdr_buf_from_iov
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3cbb932d	sunrpc_cache_pipe_upcall
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3d33629f	svc_recv
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3d775970	rpc_restart_call_prepare
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x401b28e1	xdr_shift_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x41cf8258	svc_xprt_copy_addrs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x42636af0	rpc_peeraddr2str
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x48dd60f1	svc_destroy
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4ad2e218	xdr_inline_decode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4b941b16	svc_drop
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x51ac0206	xprt_register_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5235548a	rpc_queue_upcall
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x53445f68	nlm_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5495fef5	xprt_set_retrans_timeout_def
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x550547a3	rpc_destroy_wait_queue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x56f33620	svc_set_num_threads
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x58619f21	svc_xprt_names
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x58c861d4	rpcauth_generic_bind_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5b14ec1a	rpc_put_mount
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5b65960a	xprt_reserve_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5bd26000	rpc_proc_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5d0f96f0	rpc_print_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5d91eca0	xdr_process_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5f0db6ec	xdr_decode_array2
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x60c2503f	xprt_reserve_xprt_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x625c8d9a	rpc_unlink
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x62fbbe35	svc_create_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x63b77690	svc_create_pooled
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x675524ec	rpc_sockaddr2uaddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x67933a64	read_bytes_from_xdr_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x67e57eab	xprt_update_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x681e91cb	rpc_clone_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x69040610	auth_domain_find
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6b93b9c0	rpc_call_async
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6c5304c5	rpcb_getport_sync
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6c7eaa83	rpc_restart_call
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6d923f0d	rpc_lookup_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6eea229d	svcauth_unix_purge
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7179676a	xprt_wait_for_buffer_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x71fa908a	cache_flush
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7231219c	rpc_ntop
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x726a961e	rpc_setbufsize
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x763139e5	svc_max_payload
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x775adaf6	rpc_uaddr2sockaddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x78456da9	svc_seq_show
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7bc83bc9	svc_xprt_received
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7bcc5d65	__rpc_wait_for_completion_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7db2d1a1	rpc_sleep_on
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7de53067	rpc_init_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7e02cf0e	rpc_max_payload
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7ed114dd	cache_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8228bf3a	xprt_wake_pending_tasks
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x832368b6	xdr_partial_copy_from_skb
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x834f5aea	xprt_release_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x83833618	svc_sock_names
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x83b448a3	xprt_write_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x846a9530	xprt_disconnect_done
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x84ed8835	svc_find_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x85871cc4	svc_auth_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8604984d	xdr_read_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8c632ea5	svcauth_unix_set_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x91c182c1	xprt_complete_rqst
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x91c96d7d	xdr_inline_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9bfd7f9b	xdr_buf_read_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9c53f5f3	rpc_get_mount
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9d33b43b	svc_reg_xprt_class
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9d93a4f5	auth_unix_forget_old
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9e5be81f	csum_partial_copy_to_xdr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9e82784b	rpcb_getport_async
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9f5b3163	rpcauth_init_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9f9039c2	svc_authenticate
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9fb4ec69	xdr_encode_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa0975289	sunrpc_cache_unregister_pipefs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa2a1662c	rpc_put_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa4ed9e7e	xdr_buf_subsegment
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa7ecf948	xprt_release_xprt_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa9a4cfcc	svc_process
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa9c87b97	svc_reserve
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xab46efab	cache_check
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xaca90452	rpc_proc_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xaf10d86e	rpc_shutdown_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xaf5bf6ef	nfs_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb0b856d0	rpc_peeraddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb0c48571	rpc_wake_up_next
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb1adda67	svc_xprt_enqueue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb387b246	rpc_wake_up_status
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb38dddba	svc_prepare_thread
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb41e7596	auth_unix_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb5de6b1b	xprt_lookup_rqst
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb7a3432e	rpc_call_start
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb9584646	sunrpc_cache_update
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbd3587c1	svc_addsock
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbf9d1b96	nfsd_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbf9e74b0	rpc_delay
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc100319d	xprt_unregister_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc12435e3	rpc_calc_rto
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc3880471	xdr_decode_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc38a4f5f	rpcauth_init_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc554b883	cache_purge
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc664cf21	xdr_enter_page
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc7869a25	xdr_init_decode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc8761037	auth_domain_put
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc8d6ef87	svc_proc_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc8e96dea	qword_addhex
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcaa74e20	xdr_init_encode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcbfe48bc	rpc_force_rebind
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xccef8807	rpcauth_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcde83c52	auth_domain_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xced50705	svc_sock_destroy
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcee467f3	xprt_load_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd35c871d	rpc_exit_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd3a9f354	put_rpccred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd82c728e	rpc_init_wait_queue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdc71c4e3	svc_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdd535ff5	rpcauth_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdf5125e3	xdr_write_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe54fe3a1	rpc_call_sync
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe5919cb1	xdr_encode_opaque
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe97f4ce5	qword_get
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe9839b2c	rpc_run_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xea1c12be	sunrpc_cache_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xebae78dd	xdr_reserve_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xebee6055	svc_xprt_init
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xed053c75	rpcauth_destroy_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xedcf6be4	qword_add
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xedd1ba52	rpc_wake_up
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xeeacab69	rpc_update_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf792d4ad	rpc_call_null
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf9003938	xprt_adjust_cwnd
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf90bb2b1	rpc_mkpipe
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf9d1164c	rpc_free
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x265857da	wimax_dev_rm
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x3d75ac8f	wimax_msg_data_len
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x7df1b9bf	wimax_dev_add
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x87fa3f13	wimax_report_rfkill_sw
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x94c8847b	wimax_report_rfkill_hw
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x997fc740	wimax_msg_alloc
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xc703a434	wimax_state_get
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xcc3f7b14	wimax_msg_send
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xe103f8c2	wimax_msg_data
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xe45f3849	wimax_msg_len
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xe70f392c	wimax_dev_init
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xed06a05e	wimax_state_change
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xf026300d	wimax_msg
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x07906932	cfg80211_wext_giwauth
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x16ababcf	cfg80211_wext_giwretry
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x184b5d6c	cfg80211_wext_siwretry
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x220fb6da	cfg80211_wext_siwscan
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x256ba6e8	cfg80211_wext_giwap
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x3b7cf5bd	cfg80211_wext_giwname
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x3ceef83a	cfg80211_wext_siwauth
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x3ea9b01a	cfg80211_wext_giwrange
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x423ea11f	cfg80211_wext_siwfrag
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x4ed1dc72	cfg80211_wext_siwap
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x5355ec00	cfg80211_wext_giwscan
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x79403017	cfg80211_wext_giwfrag
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x8480954c	cfg80211_wext_giwessid
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x8632f7e5	cfg80211_wext_siwtxpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x8a6063ef	cfg80211_wext_siwessid
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xa1e8a59b	cfg80211_wext_siwencode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xa25d2315	cfg80211_wext_siwmode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xa4b0790e	cfg80211_wireless_stats
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xa817f67e	cfg80211_wext_giwmode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xaf65b0fc	cfg80211_wext_siwgenie
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xbc0d44c7	cfg80211_wext_siwmlme
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xbfe0b091	cfg80211_wext_giwtxpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xc157eb32	cfg80211_wext_siwpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xc6e4fea4	cfg80211_wext_giwfreq
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xcfb71d91	cfg80211_wext_giwpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xd6553e84	cfg80211_wext_siwfreq
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xde8bdd96	cfg80211_wext_giwrate
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xe5743af3	cfg80211_wext_giwrts
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xe5f54c9e	cfg80211_wext_siwrate
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xee39b73f	cfg80211_wext_giwencode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xf5c5fad3	cfg80211_wext_siwrts
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xfe304ef6	cfg80211_wext_siwencodeext
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x64b33586	ipcomp_output
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x8c3f3363	ipcomp_init_state
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x983d40e5	ipcomp_destroy
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0xf68ddfb3	ipcomp_input
+EXPORT_SYMBOL_GPL sound/core/snd-pcm 0xa286a234	snd_pcm_format_name
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x07c43a2c	snd_hda_codec_write_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0a2373e5	snd_hda_add_vmaster
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0e4ba444	snd_hda_delete_codec_preset
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0ec2a7ad	snd_hda_set_vmaster_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0f0a04ca	snd_hda_get_bool_hint
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x10c46707	snd_hda_parse_pin_def_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x11643473	snd_hda_check_board_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x14fe9803	snd_hda_multi_out_dig_prepare
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1690c8d4	snd_hda_suspend
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x202866b2	snd_hda_mixer_bind_ctls_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x21da4a16	snd_hda_load_patch
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x230463dc	snd_hda_create_spdif_out_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x25eac466	snd_hda_codec_set_pincfg
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2a5d831a	snd_hda_add_new_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2d3880fb	snd_hda_create_spdif_in_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2e3f071b	snd_hda_mixer_bind_ctls_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x30334364	snd_hda_codec_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x33a2a126	snd_hda_ch_mode_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x351f13da	snd_hda_mixer_bind_ctls_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x36059787	snd_hda_multi_out_analog_cleanup
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x37452116	snd_hda_codec_read
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3a828410	snd_hda_input_mux_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4068e9c8	snd_hda_codec_setup_stream
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x42341f89	snd_hda_get_hint
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x52f4f343	snd_hda_is_supported_format
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5418a47d	snd_hda_find_mixer_ctl
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x592bb274	snd_hda_queue_unsol_event
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5a4550a4	snd_hda_power_up
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5ae76f73	auto_pin_cfg_labels
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5d2a4fd9	snd_hda_codec_write
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6b733560	snd_hda_codec_cleanup_stream
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x719ed6d3	snd_hda_mixer_bind_switch_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x725267da	snd_hda_build_pcms
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x72e5fec0	snd_hda_attach_beep_device
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7a7dc76e	snd_hda_check_amp_list_power
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7f778e1b	snd_hda_sequence_write
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7f89b77a	snd_hda_mixer_bind_switch_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x826986d3	snd_hda_multi_out_analog_open
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x834299ea	snd_hda_codec_amp_update
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x85dbeaf3	snd_hda_mixer_amp_switch_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x867abf95	snd_hda_mixer_amp_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8abacbb9	snd_hda_codec_amp_read
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8bcc8b5a	snd_hda_mixer_amp_switch_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x90ec9f9b	snd_hda_mixer_amp_switch_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9735cf5d	query_amp_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9a8e1877	snd_array_free
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9ab6e63f	snd_hda_build_controls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9f34a8d6	snd_hda_multi_out_analog_prepare
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa2827d76	snd_hda_get_jack_location
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa3c85f00	snd_hda_ch_mode_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xad7b01a3	snd_hda_override_amp_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xad87613e	snd_print_pcm_rates
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xae946acd	snd_hda_codec_configure
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb960132f	snd_hda_power_down
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbde0da61	snd_hda_mixer_bind_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbe7dd7dc	snd_array_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbf2aadb2	snd_hda_multi_out_dig_cleanup
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc0f9baf1	snd_hda_sequence_write_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc34a54c6	snd_hda_calc_stream_format
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc4340b19	snd_hda_create_spdif_share_sw
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc4f4a28a	snd_hda_add_codec_preset
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc652fd69	snd_hda_get_jack_connectivity
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc827e637	snd_hda_ch_mode_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcb301b6e	snd_hda_get_jack_type
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcc70694e	snd_hda_get_sub_nodes
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcce27eb0	snd_hda_input_mux_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcfc2ceb8	snd_hda_bus_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xda30fc0f	snd_hda_multi_out_dig_open
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xdd11cbca	snd_hda_multi_out_dig_close
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xdf717d3f	snd_hda_bind_vol
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe1a27286	snd_hda_ctl_add
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe542dba3	snd_hda_bind_sw
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe63f17be	snd_hda_mixer_amp_volume_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe6b9cd29	snd_hda_get_connections
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe8287617	snd_hda_mixer_amp_volume_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe9459eb8	snd_hda_resume
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe9491229	snd_hda_codec_resume_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xed9e91cf	snd_hda_codec_amp_stereo
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeda3a721	snd_print_pcm_bits
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf228d1bc	snd_hda_codec_get_pincfg
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf30862d6	snd_hda_mixer_amp_volume_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf3246d78	snd_hda_query_pin_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf8692cdd	snd_hda_codec_resume_amp
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xfada5061	snd_hda_detach_beep_device
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xfe114af2	snd_hda_check_board_codec_sid_config
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1836 0x1bceb0d6	soc_codec_dev_ad1836
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1836 0xf4c3edfe	ad1836_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1938 0x02638c10	ad1938_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1938 0x3df1fa3d	soc_codec_dev_ad1938
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0x0508b1dc	ad73311_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0x71d8918d	soc_codec_dev_ad73311
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4104 0x98b655e7	soc_codec_device_ak4104
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0x52ce9443	ak4535_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0xfb3f066d	soc_codec_dev_ak4535
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4642 0x04e39d96	ak4642_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4642 0xa38429c1	soc_codec_dev_ak4642
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0x909c5027	cs4270_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0x933ab857	soc_codec_device_cs4270
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-l3 0x78c84c7e	l3_write
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-max9877 0x97923f80	max9877_add_controls
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0x1a4f4ed2	pcm3008_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0x6bcecbb7	soc_codec_dev_pcm3008
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-spdif 0x18352620	dit_stub_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0x607bce7c	soc_codec_dev_ssm2602
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0xb3a8664b	ssm2602_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0x018c6fb9	soc_codec_dev_tlv320aic23
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0xbcd33173	tlv320aic23_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0x6e5c828f	aic26_soc_codec_dev
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0x78d9d94a	aic26_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x6b25e128	aic3x_button_pressed
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x98a4f81b	aic3x_set_gpio
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xb2e712b5	soc_codec_dev_aic3x
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xd3db0b4f	aic3x_get_gpio
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xd6c0eba4	aic3x_headset_detected
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xd8045078	aic3x_set_headset_detection
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xebfcb9e2	aic3x_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0xcbf3db46	twl4030_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0xcff64674	soc_codec_dev_twl4030
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda134x 0x0e4e2071	soc_codec_dev_uda134x
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x3ff41c18	soc_codec_dev_uda1380
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x79b3ae91	uda1380_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0x4fb2913c	wm_hubs_add_analogue_routes
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0x757206d5	wm_hubs_spkmix_tlv
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0xeee2e821	wm_hubs_add_analogue_controls
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x18517fba	wm8350_hp_jack_detect
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x22333b0a	wm8350_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x9b9804ea	soc_codec_dev_wm8350
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x0084feb8	soc_codec_dev_wm8400
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x7ace1db4	wm8400_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0x38f59902	wm8510_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0x926b81ae	soc_codec_dev_wm8510
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8523 0x8f89f131	wm8523_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8523 0xbb006c34	soc_codec_dev_wm8523
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0x5331ca99	wm8580_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0x9dbaba21	soc_codec_dev_wm8580
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0xa76b068f	wm8728_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0xf2fd7d74	soc_codec_dev_wm8728
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x22fdac0a	soc_codec_dev_wm8731
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x26135cf3	wm8731_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x3f6be1f9	soc_codec_dev_wm8750
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x8e9fba6c	wm8750_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0x1446b23a	soc_codec_dev_wm8753
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0x1c09c994	wm8753_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8776 0x21ecd087	wm8776_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8776 0x6ab59211	soc_codec_dev_wm8776
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0xc92d87f9	wm8900_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0xd97f5421	soc_codec_dev_wm8900
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0x4fb9f557	wm8903_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0xf25207e2	soc_codec_dev_wm8903
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0x3d62a3ea	wm8940_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0xde76fcfd	soc_codec_dev_wm8940
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0xaafdb2c3	wm8960_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0xddf22893	soc_codec_dev_wm8960
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8961 0x61a16166	wm8961_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8961 0xc4e919d2	soc_codec_dev_wm8961
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0xc52b73e5	soc_codec_dev_wm8971
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0xc7d66ad2	wm8971_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8974 0x971bfb61	wm8974_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8974 0xb85c87a0	soc_codec_dev_wm8974
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0x16914bf3	wm8988_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0x1fb58f91	soc_codec_dev_wm8988
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0x5cb5c22a	wm8990_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0xd6ae6fae	soc_codec_dev_wm8990
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8993 0xda21b084	wm8993_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8993 0xfd833c6d	soc_codec_dev_wm8993
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0x39aa1553	wm9081_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0x8e1f52e2	soc_codec_dev_wm9081
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x00a82ea3	snd_soc_register_dais
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x02c1ae18	snd_soc_jack_free_gpios
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x081fcf22	snd_soc_put_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x08adf469	snd_soc_dai_set_sysclk
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x096b8e4b	snd_soc_get_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x09bb5b30	snd_soc_info_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0e79fc27	snd_soc_dapm_new_widgets
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x13ac02f5	snd_soc_dapm_put_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x154f5fef	snd_soc_update_bits
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1bb142f2	snd_soc_info_volsw_ext
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1c9b5f09	snd_soc_dapm_put_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x207f057d	snd_soc_put_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x23aa8d0d	snd_soc_codec_set_cache_io
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x25f76426	snd_soc_dapm_stream_event
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x26594bb4	snd_soc_free_pcms
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x27dbfe76	snd_soc_jack_report
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x27dfa763	snd_soc_dai_set_fmt
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2fc590b8	snd_soc_dai_set_pll
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x332d3b02	snd_soc_dapm_put_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x38a893ad	snd_soc_dapm_disable_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3a9a0bad	snd_soc_register_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3ae5b8d7	snd_soc_register_platform
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3b833d47	snd_soc_info_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4199a190	snd_soc_register_dai
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x43f334f9	snd_soc_set_runtime_hwparams
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x448f785e	snd_soc_dapm_get_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4550b23c	snd_soc_new_pcms
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x477e90d5	snd_soc_jack_add_gpios
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4dfe5a8d	snd_soc_get_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x52c703bb	snd_soc_dapm_get_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x539a7d45	snd_soc_init_card
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x55c2ea56	snd_soc_jack_new
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x55f942cc	snd_soc_new_ac97_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5b4f33b9	snd_soc_info_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5c15fefd	snd_soc_unregister_dais
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5dc6ed5c	snd_soc_free_ac97_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x66586889	snd_soc_unregister_platform
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6833f7fb	snd_soc_dapm_sync
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6d5d1def	dapm_reg_event
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x793c2fc7	snd_soc_get_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7a6a6ad7	snd_soc_add_controls
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7b0e397b	snd_soc_dai_digital_mute
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7fbd8c7e	snd_soc_get_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x80354793	snd_soc_dai_set_tristate
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x83ad8674	snd_soc_get_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x859fcc23	snd_soc_dai_set_clkdiv
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8777b5c1	snd_soc_dapm_new_controls
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8fdac8f1	snd_soc_dapm_get_pin_status
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xae73ae43	snd_soc_test_bits
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb160deb1	snd_soc_suspend_device
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb8ce837f	snd_soc_dai_set_tdm_slot
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xba6d8b80	snd_soc_put_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xbbd1129a	snd_soc_unregister_dai
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xbf30e45a	snd_soc_codec_volatile_register
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc16f47bb	snd_soc_dapm_get_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc4bb17ce	snd_soc_dapm_add_routes
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc51763b7	snd_soc_dapm_free
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xcb19182f	snd_soc_dapm_new_control
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xcb4ffddd	snd_soc_info_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xcd9da781	snd_soc_resume_device
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd9571ef5	snd_soc_info_enum_ext
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xdba8cb05	snd_soc_put_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xdfcafb4e	snd_soc_dapm_get_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xe0ebd735	snd_soc_dapm_info_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xee2cd984	snd_soc_put_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf3611682	snd_soc_cnew
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf5eccb12	snd_soc_dapm_enable_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf6f9d35c	snd_soc_dapm_nc_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf7b4c9ba	snd_soc_dapm_put_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf7f7758f	snd_soc_unregister_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xfb1d7ec1	snd_soc_jack_add_pins
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x15e0620c	xv_destroy_pool
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x4803223f	xv_malloc
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x57e771ba	xv_get_total_size_bytes
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x88072f01	xv_create_pool
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0xaf69699e	xv_get_object_size
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0xe878f8f2	xv_free
+EXPORT_SYMBOL_GPL vmlinux 0x003dbce0	cpufreq_frequency_table_target
+EXPORT_SYMBOL_GPL vmlinux 0x003ed6a6	hpet_unregister_irq_handler
+EXPORT_SYMBOL_GPL vmlinux 0x00465c94	dm_rh_mark_nosync
+EXPORT_SYMBOL_GPL vmlinux 0x00566d8f	inotify_get_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x0058d2cf	apic
+EXPORT_SYMBOL_GPL vmlinux 0x005d161d	sata_pmp_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x0067df75	ata_tf_from_fis
+EXPORT_SYMBOL_GPL vmlinux 0x009a5a62	device_move
+EXPORT_SYMBOL_GPL vmlinux 0x00a5cbe1	iommu_iova_to_phys
+EXPORT_SYMBOL_GPL vmlinux 0x00ab0d45	xenbus_map_ring_valloc
+EXPORT_SYMBOL_GPL vmlinux 0x00b7201f	device_bind_driver
+EXPORT_SYMBOL_GPL vmlinux 0x00b8ecf8	__iowrite32_copy
+EXPORT_SYMBOL_GPL vmlinux 0x00dc7989	fuse_conn_get
+EXPORT_SYMBOL_GPL vmlinux 0x00ebcb5d	ata_id_string
+EXPORT_SYMBOL_GPL vmlinux 0x00f94fde	register_jprobes
+EXPORT_SYMBOL_GPL vmlinux 0x0110b3d1	register_hotplug_dock_device
+EXPORT_SYMBOL_GPL vmlinux 0x016b9869	xfrm_calg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0x016f00ad	ata_scsi_queuecmd
+EXPORT_SYMBOL_GPL vmlinux 0x01848a8e	local_apic_timer_c2_ok
+EXPORT_SYMBOL_GPL vmlinux 0x01a4ea6d	unregister_die_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x01bf2e74	platform_driver_register
+EXPORT_SYMBOL_GPL vmlinux 0x01e1a8de	kgdb_breakpoint
+EXPORT_SYMBOL_GPL vmlinux 0x01e9acda	usb_altnum_to_altsetting
+EXPORT_SYMBOL_GPL vmlinux 0x0243a3fd	__class_register
+EXPORT_SYMBOL_GPL vmlinux 0x02578683	crypto_hash_walk_first
+EXPORT_SYMBOL_GPL vmlinux 0x027c35a8	dm_rh_inc_pending
+EXPORT_SYMBOL_GPL vmlinux 0x02828a8f	rtnl_kill_links
+EXPORT_SYMBOL_GPL vmlinux 0x029235c4	ata_std_error_handler
+EXPORT_SYMBOL_GPL vmlinux 0x02a430cb	ata_sff_wait_ready
+EXPORT_SYMBOL_GPL vmlinux 0x02b25430	inode_add_to_lists
+EXPORT_SYMBOL_GPL vmlinux 0x02ccea56	lock_policy_rwsem_write
+EXPORT_SYMBOL_GPL vmlinux 0x02de62c4	dev_attr_link_power_management_policy
+EXPORT_SYMBOL_GPL vmlinux 0x02ee9194	ata_bus_reset
+EXPORT_SYMBOL_GPL vmlinux 0x033921a1	shash_ahash_update
+EXPORT_SYMBOL_GPL vmlinux 0x0343bdf1	__i2c_board_list
+EXPORT_SYMBOL_GPL vmlinux 0x039622db	file_ra_state_init
+EXPORT_SYMBOL_GPL vmlinux 0x03a3f86d	unregister_jprobe
+EXPORT_SYMBOL_GPL vmlinux 0x03cf3600	unregister_pernet_device
+EXPORT_SYMBOL_GPL vmlinux 0x03e0be38	user_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x03e3686c	ata_timing_cycle2mode
+EXPORT_SYMBOL_GPL vmlinux 0x04069b1d	set_irq_nested_thread
+EXPORT_SYMBOL_GPL vmlinux 0x0415d56c	__pm_runtime_put
+EXPORT_SYMBOL_GPL vmlinux 0x04486e88	rcu_batches_completed
+EXPORT_SYMBOL_GPL vmlinux 0x04634238	da903x_set_bits
+EXPORT_SYMBOL_GPL vmlinux 0x0482d837	usb_hub_clear_tt_buffer
+EXPORT_SYMBOL_GPL vmlinux 0x049cb438	usb_reset_endpoint
+EXPORT_SYMBOL_GPL vmlinux 0x04c3f2c1	gnttab_empty_grant_references
+EXPORT_SYMBOL_GPL vmlinux 0x04e32934	__rt_mutex_init
+EXPORT_SYMBOL_GPL vmlinux 0x04ea8706	__iowrite64_copy
+EXPORT_SYMBOL_GPL vmlinux 0x0531dcb8	ata_dev_classify
+EXPORT_SYMBOL_GPL vmlinux 0x0533f438	debugfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x054e550b	kernel_halt
+EXPORT_SYMBOL_GPL vmlinux 0x05a896ab	usb_deregister_dev
+EXPORT_SYMBOL_GPL vmlinux 0x05c7ef21	usb_hcd_giveback_urb
+EXPORT_SYMBOL_GPL vmlinux 0x06009be9	srcu_init_notifier_head
+EXPORT_SYMBOL_GPL vmlinux 0x060d1064	set_memory_ro
+EXPORT_SYMBOL_GPL vmlinux 0x0619ca8a	getboottime
+EXPORT_SYMBOL_GPL vmlinux 0x06388092	ring_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0x0638c0d0	pci_configure_slot
+EXPORT_SYMBOL_GPL vmlinux 0x064db9a5	mark_mounts_for_expiry
+EXPORT_SYMBOL_GPL vmlinux 0x06601a60	udp4_lib_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x06ad0b21	usb_buffer_unmap_sg
+EXPORT_SYMBOL_GPL vmlinux 0x071f1ed6	platform_get_irq
+EXPORT_SYMBOL_GPL vmlinux 0x074fb645	__pci_complete_power_transition
+EXPORT_SYMBOL_GPL vmlinux 0x075ffe8c	power_supply_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x077bb459	pci_hp_deregister
+EXPORT_SYMBOL_GPL vmlinux 0x078993b9	blk_trace_startstop
+EXPORT_SYMBOL_GPL vmlinux 0x07a13f3a	rtc_read_alarm
+EXPORT_SYMBOL_GPL vmlinux 0x07b52e38	rtnl_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x07ce7344	trace_seq_vprintf
+EXPORT_SYMBOL_GPL vmlinux 0x07ff4aea	xenbus_scanf
+EXPORT_SYMBOL_GPL vmlinux 0x0832ede9	inet_csk_reqsk_queue_hash_add
+EXPORT_SYMBOL_GPL vmlinux 0x0846d8f1	hwmon_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x0853a467	dm_rh_stop_recovery
+EXPORT_SYMBOL_GPL vmlinux 0x085607be	ipv6_opt_accepted
+EXPORT_SYMBOL_GPL vmlinux 0x085db0e4	device_initialize
+EXPORT_SYMBOL_GPL vmlinux 0x08830850	da903x_reads
+EXPORT_SYMBOL_GPL vmlinux 0x0899da9f	bus_get_kset
+EXPORT_SYMBOL_GPL vmlinux 0x08a3e5d1	net_ipv6_ctl_path
+EXPORT_SYMBOL_GPL vmlinux 0x08d8708f	cancel_work_sync
+EXPORT_SYMBOL_GPL vmlinux 0x091eb9b4	round_jiffies
+EXPORT_SYMBOL_GPL vmlinux 0x095dc7fa	each_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x09dc4765	pci_slots_kset
+EXPORT_SYMBOL_GPL vmlinux 0x0a023b28	usb_ifnum_to_if
+EXPORT_SYMBOL_GPL vmlinux 0x0a199eff	relay_subbufs_consumed
+EXPORT_SYMBOL_GPL vmlinux 0x0a1a2ef4	bus_register
+EXPORT_SYMBOL_GPL vmlinux 0x0a770fa6	default_backing_dev_info
+EXPORT_SYMBOL_GPL vmlinux 0x0ab16640	pci_scan_child_bus
+EXPORT_SYMBOL_GPL vmlinux 0x0aca3a40	sdev_evt_send
+EXPORT_SYMBOL_GPL vmlinux 0x0b07abe2	unshare_fs_struct
+EXPORT_SYMBOL_GPL vmlinux 0x0b4c2e73	ata_port_desc
+EXPORT_SYMBOL_GPL vmlinux 0x0b5b6a57	put_pid
+EXPORT_SYMBOL_GPL vmlinux 0x0bce9d80	blk_trace_setup
+EXPORT_SYMBOL_GPL vmlinux 0x0bd34ba4	xenbus_bind_evtchn
+EXPORT_SYMBOL_GPL vmlinux 0x0c15deb2	task_current_syscall
+EXPORT_SYMBOL_GPL vmlinux 0x0c2cdbf1	synchronize_sched
+EXPORT_SYMBOL_GPL vmlinux 0x0c524a33	page_mkclean
+EXPORT_SYMBOL_GPL vmlinux 0x0c624a4d	eventfd_ctx_fileget
+EXPORT_SYMBOL_GPL vmlinux 0x0c73004b	ata_port_disable
+EXPORT_SYMBOL_GPL vmlinux 0x0c7db5a3	crypto_unregister_alg
+EXPORT_SYMBOL_GPL vmlinux 0x0c805f93	clflush_cache_range
+EXPORT_SYMBOL_GPL vmlinux 0x0cb88680	__tracepoint_block_rq_remap
+EXPORT_SYMBOL_GPL vmlinux 0x0cc2c21a	ata_sas_port_start
+EXPORT_SYMBOL_GPL vmlinux 0x0d05b522	crypto_alloc_ahash
+EXPORT_SYMBOL_GPL vmlinux 0x0d125d1c	ata_bmdma_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x0d200e8e	aead_geniv_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x0d9f9322	usb_hcd_pci_pm_ops
+EXPORT_SYMBOL_GPL vmlinux 0x0dbe54f4	input_ff_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x0df5e5d7	regulator_set_current_limit
+EXPORT_SYMBOL_GPL vmlinux 0x0e32299a	xenbus_switch_state
+EXPORT_SYMBOL_GPL vmlinux 0x0e5b03e6	ring_buffer_commit_overrun_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x0e77d09e	bus_get_device_klist
+EXPORT_SYMBOL_GPL vmlinux 0x0ec210b8	xen_start_info
+EXPORT_SYMBOL_GPL vmlinux 0x0f0eeee1	ata_sff_dumb_qc_prep
+EXPORT_SYMBOL_GPL vmlinux 0x0f0f6453	pci_unblock_user_cfg_access
+EXPORT_SYMBOL_GPL vmlinux 0x0f203f81	sata_async_notification
+EXPORT_SYMBOL_GPL vmlinux 0x0f22c2e8	aead_geniv_init
+EXPORT_SYMBOL_GPL vmlinux 0x0f72403b	crypto_alloc_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0x0f73520f	klist_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0x0fa3757f	inet6_destroy_sock
+EXPORT_SYMBOL_GPL vmlinux 0x0fb1e7c0	queue_work
+EXPORT_SYMBOL_GPL vmlinux 0x0fda3774	__inet_lookup_established
+EXPORT_SYMBOL_GPL vmlinux 0x0fe2d570	xenbus_directory
+EXPORT_SYMBOL_GPL vmlinux 0x0fea00d5	fsstack_copy_attr_all
+EXPORT_SYMBOL_GPL vmlinux 0x100c13c6	usb_kill_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0x100c48a2	unregister_dock_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x10138352	tracing_on
+EXPORT_SYMBOL_GPL vmlinux 0x101c923e	__tracepoint_power_start
+EXPORT_SYMBOL_GPL vmlinux 0x10621889	hpet_rtc_interrupt
+EXPORT_SYMBOL_GPL vmlinux 0x1080b36f	skb_morph
+EXPORT_SYMBOL_GPL vmlinux 0x10a9c8f5	tty_prepare_flip_string
+EXPORT_SYMBOL_GPL vmlinux 0x10ff9e31	regulator_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x115f9a05	ata_host_init
+EXPORT_SYMBOL_GPL vmlinux 0x1176d0d0	driver_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x11bc6660	sdio_writesb
+EXPORT_SYMBOL_GPL vmlinux 0x11f447ce	__gpio_to_irq
+EXPORT_SYMBOL_GPL vmlinux 0x1243f03d	ata_sff_drain_fifo
+EXPORT_SYMBOL_GPL vmlinux 0x124bb3b4	dev_set_name
+EXPORT_SYMBOL_GPL vmlinux 0x124f2056	crypto_get_attr_type
+EXPORT_SYMBOL_GPL vmlinux 0x1251d30f	call_rcu
+EXPORT_SYMBOL_GPL vmlinux 0x1268f357	resume_device_irqs
+EXPORT_SYMBOL_GPL vmlinux 0x12c9d44f	device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x13142672	trace_define_field
+EXPORT_SYMBOL_GPL vmlinux 0x1356a2fa	pskb_put
+EXPORT_SYMBOL_GPL vmlinux 0x1360fcd2	usb_autopm_put_interface_async
+EXPORT_SYMBOL_GPL vmlinux 0x13780514	__lock_page_killable
+EXPORT_SYMBOL_GPL vmlinux 0x1381a048	iommu_map_range
+EXPORT_SYMBOL_GPL vmlinux 0x13b2a946	register_keyboard_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x13cfb36f	ata_scsi_simulate
+EXPORT_SYMBOL_GPL vmlinux 0x13ed245e	vfs_setlease
+EXPORT_SYMBOL_GPL vmlinux 0x13ee9a02	ata_sas_scsi_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x13f21aa5	sdio_readsb
+EXPORT_SYMBOL_GPL vmlinux 0x13f81879	regulator_register
+EXPORT_SYMBOL_GPL vmlinux 0x1424d598	inotify_init_watch
+EXPORT_SYMBOL_GPL vmlinux 0x145d1dc2	tcp_twsk_destructor
+EXPORT_SYMBOL_GPL vmlinux 0x148f06c3	ata_sff_dev_select
+EXPORT_SYMBOL_GPL vmlinux 0x149db923	selinux_string_to_sid
+EXPORT_SYMBOL_GPL vmlinux 0x14a049c8	dm_dispatch_request
+EXPORT_SYMBOL_GPL vmlinux 0x14b2392b	devres_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x15118c94	pci_hp_remove_module_link
+EXPORT_SYMBOL_GPL vmlinux 0x152eda33	pci_find_next_ht_capability
+EXPORT_SYMBOL_GPL vmlinux 0x153f0693	usb_sg_init
+EXPORT_SYMBOL_GPL vmlinux 0x154a8f0c	kobject_uevent_env
+EXPORT_SYMBOL_GPL vmlinux 0x1550d408	acpi_smbus_unregister_callback
+EXPORT_SYMBOL_GPL vmlinux 0x15892417	async_synchronize_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x1598dc9d	unregister_netevent_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x15b0606e	e820_any_mapped
+EXPORT_SYMBOL_GPL vmlinux 0x15b8174d	sysfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x16143092	kill_pid_info_as_uid
+EXPORT_SYMBOL_GPL vmlinux 0x16356357	pm_request_idle
+EXPORT_SYMBOL_GPL vmlinux 0x1640954a	class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x165137a7	ata_sff_dev_classify
+EXPORT_SYMBOL_GPL vmlinux 0x16788d5b	bus_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x1697136d	hrtimer_init
+EXPORT_SYMBOL_GPL vmlinux 0x16da3868	__ata_ehi_push_desc
+EXPORT_SYMBOL_GPL vmlinux 0x171741fc	bd_release_from_disk
+EXPORT_SYMBOL_GPL vmlinux 0x177c9f20	xenbus_alloc_evtchn
+EXPORT_SYMBOL_GPL vmlinux 0x179f6aef	rtc_set_time
+EXPORT_SYMBOL_GPL vmlinux 0x17cdf383	kset_create_and_add
+EXPORT_SYMBOL_GPL vmlinux 0x185a0b9e	__ip_route_output_key
+EXPORT_SYMBOL_GPL vmlinux 0x1878f62b	edac_err_assert
+EXPORT_SYMBOL_GPL vmlinux 0x188f05ec	__mmdrop
+EXPORT_SYMBOL_GPL vmlinux 0x18ca71c1	rtc_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x18d53420	kgdb_register_io_module
+EXPORT_SYMBOL_GPL vmlinux 0x18efafe5	ata_host_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x18f83fab	gnttab_grant_foreign_access_ref
+EXPORT_SYMBOL_GPL vmlinux 0x1903a7bd	usb_reset_device
+EXPORT_SYMBOL_GPL vmlinux 0x19373794	init_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0x19a304ba	usb_disabled
+EXPORT_SYMBOL_GPL vmlinux 0x19a77686	ata_eh_freeze_port
+EXPORT_SYMBOL_GPL vmlinux 0x19b0e167	tty_put_char
+EXPORT_SYMBOL_GPL vmlinux 0x19b70ac1	perf_tp_event
+EXPORT_SYMBOL_GPL vmlinux 0x1a0d897f	tcp_death_row
+EXPORT_SYMBOL_GPL vmlinux 0x1a323362	__ftrace_vbprintk
+EXPORT_SYMBOL_GPL vmlinux 0x1a474901	tracepoint_probe_unregister_noupdate
+EXPORT_SYMBOL_GPL vmlinux 0x1a5037ad	usb_get_status
+EXPORT_SYMBOL_GPL vmlinux 0x1a7d447c	pci_enable_pcie_error_reporting
+EXPORT_SYMBOL_GPL vmlinux 0x1a81f961	ata_sff_qc_issue
+EXPORT_SYMBOL_GPL vmlinux 0x1a93017c	rtc_irq_register
+EXPORT_SYMBOL_GPL vmlinux 0x1a938737	atomic_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x1a9b538e	ehci_cf_port_reset_rwsem
+EXPORT_SYMBOL_GPL vmlinux 0x1aa8dbd5	sata_set_spd
+EXPORT_SYMBOL_GPL vmlinux 0x1acda5b2	atomic_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x1ad94a98	device_find_child
+EXPORT_SYMBOL_GPL vmlinux 0x1b36ea45	tcp_done
+EXPORT_SYMBOL_GPL vmlinux 0x1b9aca3f	jprobe_return
+EXPORT_SYMBOL_GPL vmlinux 0x1bc6d562	inotify_remove_watch_locked
+EXPORT_SYMBOL_GPL vmlinux 0x1bcde060	rt_mutex_timed_lock
+EXPORT_SYMBOL_GPL vmlinux 0x1c309769	class_compat_create_link
+EXPORT_SYMBOL_GPL vmlinux 0x1c3af716	execute_in_process_context
+EXPORT_SYMBOL_GPL vmlinux 0x1c7b6c2a	eventfd_ctx_fdget
+EXPORT_SYMBOL_GPL vmlinux 0x1c7e64d1	__cpufreq_driver_getavg
+EXPORT_SYMBOL_GPL vmlinux 0x1c852e7c	xfrm_calg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x1c87a811	__round_jiffies_up
+EXPORT_SYMBOL_GPL vmlinux 0x1c8c9676	net_assign_generic
+EXPORT_SYMBOL_GPL vmlinux 0x1cd45ecb	add_page_wait_queue
+EXPORT_SYMBOL_GPL vmlinux 0x1cdd5293	i2c_add_numbered_adapter
+EXPORT_SYMBOL_GPL vmlinux 0x1cfbf182	scsi_mode_select
+EXPORT_SYMBOL_GPL vmlinux 0x1d0df04b	ata_host_alloc_pinfo
+EXPORT_SYMBOL_GPL vmlinux 0x1d3b9373	pci_destroy_slot
+EXPORT_SYMBOL_GPL vmlinux 0x1d8f8059	__tracepoint_power_end
+EXPORT_SYMBOL_GPL vmlinux 0x1d9316a9	regulator_enable
+EXPORT_SYMBOL_GPL vmlinux 0x1daac14a	pci_bus_max_busnr
+EXPORT_SYMBOL_GPL vmlinux 0x1db21d74	__tracepoint_kfree_skb
+EXPORT_SYMBOL_GPL vmlinux 0x1dee2629	trace_current_buffer_lock_reserve
+EXPORT_SYMBOL_GPL vmlinux 0x1e10c2b7	tty_ldisc_ref_wait
+EXPORT_SYMBOL_GPL vmlinux 0x1e5f82de	platform_device_add_data
+EXPORT_SYMBOL_GPL vmlinux 0x1e69f12e	blk_execute_rq_nowait
+EXPORT_SYMBOL_GPL vmlinux 0x1e7bbcb3	kernel_restart
+EXPORT_SYMBOL_GPL vmlinux 0x1eb9516e	round_jiffies_relative
+EXPORT_SYMBOL_GPL vmlinux 0x1ebf6c2a	pci_power_names
+EXPORT_SYMBOL_GPL vmlinux 0x1ee28364	register_pernet_device
+EXPORT_SYMBOL_GPL vmlinux 0x1ef3b12e	dm_disk
+EXPORT_SYMBOL_GPL vmlinux 0x1ef5e83e	led_trigger_show
+EXPORT_SYMBOL_GPL vmlinux 0x1f3d1b77	crypto_alg_sem
+EXPORT_SYMBOL_GPL vmlinux 0x1f42ba38	srcu_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x1f498899	pci_rescan_bus
+EXPORT_SYMBOL_GPL vmlinux 0x1f4ca7bc	ata_sas_port_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x1f77ffbf	per_cpu__gdt_page
+EXPORT_SYMBOL_GPL vmlinux 0x1f8ec1b3	acpi_get_pci_rootbridge_handle
+EXPORT_SYMBOL_GPL vmlinux 0x1f9b4299	ip_build_and_send_pkt
+EXPORT_SYMBOL_GPL vmlinux 0x1fae7955	bus_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x1fb22f70	usb_register_device_driver
+EXPORT_SYMBOL_GPL vmlinux 0x1fb47573	invalidate_inode_pages2_range
+EXPORT_SYMBOL_GPL vmlinux 0x1fcece42	inet_twdr_twcal_tick
+EXPORT_SYMBOL_GPL vmlinux 0x1ff4aa42	flush_workqueue
+EXPORT_SYMBOL_GPL vmlinux 0x203dc661	gpiochip_remove
+EXPORT_SYMBOL_GPL vmlinux 0x205dcd7a	klist_add_tail
+EXPORT_SYMBOL_GPL vmlinux 0x20bc3470	orderly_poweroff
+EXPORT_SYMBOL_GPL vmlinux 0x20d22764	iommu_found
+EXPORT_SYMBOL_GPL vmlinux 0x2100c724	debugfs_rename
+EXPORT_SYMBOL_GPL vmlinux 0x215db6e9	tracepoint_probe_register_noupdate
+EXPORT_SYMBOL_GPL vmlinux 0x21da516f	class_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x222fbcd3	xfrm_output
+EXPORT_SYMBOL_GPL vmlinux 0x22399730	find_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0x2296c00d	crypto_attr_u32
+EXPORT_SYMBOL_GPL vmlinux 0x2349826a	kick_process
+EXPORT_SYMBOL_GPL vmlinux 0x234e4c9d	transport_configure_device
+EXPORT_SYMBOL_GPL vmlinux 0x235ac6ca	platform_add_devices
+EXPORT_SYMBOL_GPL vmlinux 0x23864ce7	cpuset_mem_spread_node
+EXPORT_SYMBOL_GPL vmlinux 0x23933a2f	register_pernet_gen_subsys
+EXPORT_SYMBOL_GPL vmlinux 0x23a08794	queue_work_on
+EXPORT_SYMBOL_GPL vmlinux 0x23d11587	generic_fh_to_dentry
+EXPORT_SYMBOL_GPL vmlinux 0x2447533c	ktime_get_real
+EXPORT_SYMBOL_GPL vmlinux 0x244ad23f	xenbus_frontend_closed
+EXPORT_SYMBOL_GPL vmlinux 0x246f4153	pv_time_ops
+EXPORT_SYMBOL_GPL vmlinux 0x24a72637	usb_get_current_frame_number
+EXPORT_SYMBOL_GPL vmlinux 0x24aba469	gpio_export_link
+EXPORT_SYMBOL_GPL vmlinux 0x24c33079	ata_pci_device_do_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x24c7698a	xenbus_write
+EXPORT_SYMBOL_GPL vmlinux 0x24eb7e32	leds_list
+EXPORT_SYMBOL_GPL vmlinux 0x25041dad	input_ff_event
+EXPORT_SYMBOL_GPL vmlinux 0x2508d93a	sync_page_io
+EXPORT_SYMBOL_GPL vmlinux 0x2545c170	unregister_xenbus_watch
+EXPORT_SYMBOL_GPL vmlinux 0x25c25102	ata_acpi_cbl_80wire
+EXPORT_SYMBOL_GPL vmlinux 0x25f19d19	rdev_get_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0x2646d1f8	dm_underlying_device_busy
+EXPORT_SYMBOL_GPL vmlinux 0x26bc56ab	xenbus_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0x26c0d9a1	simple_attr_read
+EXPORT_SYMBOL_GPL vmlinux 0x26c90ea4	scsi_eh_get_sense
+EXPORT_SYMBOL_GPL vmlinux 0x26df275e	regulator_get_mode
+EXPORT_SYMBOL_GPL vmlinux 0x2746fb7f	cpuidle_register_device
+EXPORT_SYMBOL_GPL vmlinux 0x27708c0c	usb_autopm_get_interface_async
+EXPORT_SYMBOL_GPL vmlinux 0x278458cc	dm_region_hash_create
+EXPORT_SYMBOL_GPL vmlinux 0x279265f5	dm_rh_region_context
+EXPORT_SYMBOL_GPL vmlinux 0x27adf232	tracing_generic_entry_update
+EXPORT_SYMBOL_GPL vmlinux 0x27b87606	do_add_mount
+EXPORT_SYMBOL_GPL vmlinux 0x284d8883	inet6_csk_reqsk_queue_hash_add
+EXPORT_SYMBOL_GPL vmlinux 0x2850f2e6	get_device
+EXPORT_SYMBOL_GPL vmlinux 0x285e7e89	platform_get_irq_byname
+EXPORT_SYMBOL_GPL vmlinux 0x28d664ff	__raw_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x28e23139	xfrm_probe_algs
+EXPORT_SYMBOL_GPL vmlinux 0x28fb8e09	ring_buffer_record_disable
+EXPORT_SYMBOL_GPL vmlinux 0x28ff0dc1	pci_find_ht_capability
+EXPORT_SYMBOL_GPL vmlinux 0x293736f7	sysdev_class_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x29428260	dm_send_uevents
+EXPORT_SYMBOL_GPL vmlinux 0x29501527	klist_iter_init_node
+EXPORT_SYMBOL_GPL vmlinux 0x295b0340	pm_schedule_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x29c8f19d	ata_host_resume
+EXPORT_SYMBOL_GPL vmlinux 0x29ddd2c6	tracepoint_iter_stop
+EXPORT_SYMBOL_GPL vmlinux 0x29e6ac7d	crypto_init_spawn2
+EXPORT_SYMBOL_GPL vmlinux 0x2a0a4724	bind_evtchn_to_irqhandler
+EXPORT_SYMBOL_GPL vmlinux 0x2a678a13	__suspend_report_result
+EXPORT_SYMBOL_GPL vmlinux 0x2b09d67f	dm_rh_start_recovery
+EXPORT_SYMBOL_GPL vmlinux 0x2b32dd06	ata_pci_bmdma_init
+EXPORT_SYMBOL_GPL vmlinux 0x2b9f8e23	nf_net_ipv4_netfilter_sysctl_path
+EXPORT_SYMBOL_GPL vmlinux 0x2bcaa8e3	flush_work
+EXPORT_SYMBOL_GPL vmlinux 0x2bfc4d7f	tracepoint_get_iter_range
+EXPORT_SYMBOL_GPL vmlinux 0x2c208607	power_supply_is_system_supplied
+EXPORT_SYMBOL_GPL vmlinux 0x2c2cb9c6	devm_kfree
+EXPORT_SYMBOL_GPL vmlinux 0x2cc266b9	da903x_write
+EXPORT_SYMBOL_GPL vmlinux 0x2ce98559	kcrypto_wq
+EXPORT_SYMBOL_GPL vmlinux 0x2d160c75	sata_scr_valid
+EXPORT_SYMBOL_GPL vmlinux 0x2d40faa2	simple_attr_open
+EXPORT_SYMBOL_GPL vmlinux 0x2d5dbeec	crypto_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x2d85e769	usb_queue_reset_device
+EXPORT_SYMBOL_GPL vmlinux 0x2d992fe8	debugfs_create_u16
+EXPORT_SYMBOL_GPL vmlinux 0x2d9f2ce3	sched_clock_idle_wakeup_event
+EXPORT_SYMBOL_GPL vmlinux 0x2dd8444c	trace_seq_printf
+EXPORT_SYMBOL_GPL vmlinux 0x2ded931b	nf_unregister_queue_handlers
+EXPORT_SYMBOL_GPL vmlinux 0x2e0df1ce	fb_deferred_io_init
+EXPORT_SYMBOL_GPL vmlinux 0x2e2292e0	__get_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0x2e47f677	xfrm_aalg_get_byidx
+EXPORT_SYMBOL_GPL vmlinux 0x2e9ad101	pciserial_suspend_ports
+EXPORT_SYMBOL_GPL vmlinux 0x2ec92012	scatterwalk_copychunks
+EXPORT_SYMBOL_GPL vmlinux 0x2eed2630	iommu_domain_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x2f0f795b	bus_rescan_devices
+EXPORT_SYMBOL_GPL vmlinux 0x2f3aeb7c	inet_twsk_schedule
+EXPORT_SYMBOL_GPL vmlinux 0x2f47d8c7	cpufreq_frequency_get_table
+EXPORT_SYMBOL_GPL vmlinux 0x2f857551	machine_check_poll
+EXPORT_SYMBOL_GPL vmlinux 0x2f9a3671	skcipher_geniv_exit
+EXPORT_SYMBOL_GPL vmlinux 0x2fb39b0c	__audit_inode_child
+EXPORT_SYMBOL_GPL vmlinux 0x2fbc1675	ata_sff_freeze
+EXPORT_SYMBOL_GPL vmlinux 0x2fcd9e17	dpm_resume_noirq
+EXPORT_SYMBOL_GPL vmlinux 0x300155d0	pm_runtime_barrier
+EXPORT_SYMBOL_GPL vmlinux 0x302e9ca5	__cpufreq_driver_target
+EXPORT_SYMBOL_GPL vmlinux 0x304012dd	pci_find_ext_capability
+EXPORT_SYMBOL_GPL vmlinux 0x307abea5	crypto_shoot_alg
+EXPORT_SYMBOL_GPL vmlinux 0x310eecc9	__sock_recv_timestamp
+EXPORT_SYMBOL_GPL vmlinux 0x311312da	input_class
+EXPORT_SYMBOL_GPL vmlinux 0x318920b1	register_dock_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x318b6aba	inet_twsk_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x31d84d7b	usb_get_dev
+EXPORT_SYMBOL_GPL vmlinux 0x31e10192	ring_buffer_read_start
+EXPORT_SYMBOL_GPL vmlinux 0x31fccf26	pciserial_remove_ports
+EXPORT_SYMBOL_GPL vmlinux 0x32109dc7	disk_get_part
+EXPORT_SYMBOL_GPL vmlinux 0x325e677c	gnttab_grant_foreign_transfer_ref
+EXPORT_SYMBOL_GPL vmlinux 0x327e93b8	crypto_ahash_type
+EXPORT_SYMBOL_GPL vmlinux 0x32d5e7fc	xfrm_aalg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x32f17454	ring_buffer_event_data
+EXPORT_SYMBOL_GPL vmlinux 0x33262a75	sysfs_create_group
+EXPORT_SYMBOL_GPL vmlinux 0x33532f53	ata_bmdma_start
+EXPORT_SYMBOL_GPL vmlinux 0x337c18da	crypto_init_shash_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x338d3dce	dm_rh_recovery_in_flight
+EXPORT_SYMBOL_GPL vmlinux 0x33a6d8b2	platform_get_resource_byname
+EXPORT_SYMBOL_GPL vmlinux 0x33d3f03b	blkcipher_walk_phys
+EXPORT_SYMBOL_GPL vmlinux 0x33d4bfa1	bus_sort_breadthfirst
+EXPORT_SYMBOL_GPL vmlinux 0x34275124	trace_current_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0x3441c3d6	gpio_set_value_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x34454312	ata_pci_sff_prepare_host
+EXPORT_SYMBOL_GPL vmlinux 0x346835bc	devres_close_group
+EXPORT_SYMBOL_GPL vmlinux 0x347afd5a	rdev_get_id
+EXPORT_SYMBOL_GPL vmlinux 0x348b1863	ahash_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0x34c24076	bus_find_device
+EXPORT_SYMBOL_GPL vmlinux 0x34da6aa1	usb_match_one_id
+EXPORT_SYMBOL_GPL vmlinux 0x34dc79ff	led_trigger_remove
+EXPORT_SYMBOL_GPL vmlinux 0x34dee8bc	regulator_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x34fd3f9a	ring_buffer_normalize_time_stamp
+EXPORT_SYMBOL_GPL vmlinux 0x35213407	transport_class_register
+EXPORT_SYMBOL_GPL vmlinux 0x3527f0c5	inet6_sk_rebuild_header
+EXPORT_SYMBOL_GPL vmlinux 0x354502c6	ata_bmdma_status
+EXPORT_SYMBOL_GPL vmlinux 0x356c1403	invalidate_inode_pages2
+EXPORT_SYMBOL_GPL vmlinux 0x35c802ba	sysfs_get
+EXPORT_SYMBOL_GPL vmlinux 0x35d8c94a	sdev_evt_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x35fd0312	per_cpu__injectm
+EXPORT_SYMBOL_GPL vmlinux 0x36046280	ata_eh_qc_complete
+EXPORT_SYMBOL_GPL vmlinux 0x3612bacf	user_update
+EXPORT_SYMBOL_GPL vmlinux 0x361e2bcc	save_stack_trace
+EXPORT_SYMBOL_GPL vmlinux 0x362e23ec	call_rcu_bh
+EXPORT_SYMBOL_GPL vmlinux 0x3657d666	ata_sff_post_internal_cmd
+EXPORT_SYMBOL_GPL vmlinux 0x36602883	unregister_kretprobe
+EXPORT_SYMBOL_GPL vmlinux 0x368711e0	ata_sff_wait_after_reset
+EXPORT_SYMBOL_GPL vmlinux 0x36c09916	raw_seq_start
+EXPORT_SYMBOL_GPL vmlinux 0x37470338	inet6_lookup_listener
+EXPORT_SYMBOL_GPL vmlinux 0x37ad4176	__tracepoint_block_bio_complete
+EXPORT_SYMBOL_GPL vmlinux 0x37d573f6	cpufreq_cpu_put
+EXPORT_SYMBOL_GPL vmlinux 0x37e1670b	scsi_dh_attach
+EXPORT_SYMBOL_GPL vmlinux 0x37e31358	ata_sff_error_handler
+EXPORT_SYMBOL_GPL vmlinux 0x384958ff	sysfs_update_group
+EXPORT_SYMBOL_GPL vmlinux 0x38650514	sata_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x38712717	relay_switch_subbuf
+EXPORT_SYMBOL_GPL vmlinux 0x3879d0b6	crypto_alloc_shash
+EXPORT_SYMBOL_GPL vmlinux 0x387c34ac	power_supply_set_battery_charged
+EXPORT_SYMBOL_GPL vmlinux 0x38b43abf	rtnl_link_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x38ea936e	__memory_failure
+EXPORT_SYMBOL_GPL vmlinux 0x390c640f	hvc_instantiate
+EXPORT_SYMBOL_GPL vmlinux 0x397b9bfb	dm_rh_update_states
+EXPORT_SYMBOL_GPL vmlinux 0x399f628f	scsi_unregister_device_handler
+EXPORT_SYMBOL_GPL vmlinux 0x39ad4f6b	fuse_request_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x39bf90fa	ring_buffer_alloc_read_page
+EXPORT_SYMBOL_GPL vmlinux 0x39c6dd54	sysdev_store_ulong
+EXPORT_SYMBOL_GPL vmlinux 0x39c95518	swiotlb_sync_single_range_for_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x39cd85e6	ata_sff_dma_pause
+EXPORT_SYMBOL_GPL vmlinux 0x3a13f9e8	inotify_init
+EXPORT_SYMBOL_GPL vmlinux 0x3a3e5e8a	ata_sff_qc_fill_rtf
+EXPORT_SYMBOL_GPL vmlinux 0x3a6de86a	power_supply_get_by_name
+EXPORT_SYMBOL_GPL vmlinux 0x3a7a761a	skb_segment
+EXPORT_SYMBOL_GPL vmlinux 0x3a9eabb0	rt_mutex_lock
+EXPORT_SYMBOL_GPL vmlinux 0x3ab9aa04	fb_deferred_io_fsync
+EXPORT_SYMBOL_GPL vmlinux 0x3ae71e92	nf_unregister_afinfo
+EXPORT_SYMBOL_GPL vmlinux 0x3af833c3	ata_cable_ignore
+EXPORT_SYMBOL_GPL vmlinux 0x3b09fdc3	led_trigger_store
+EXPORT_SYMBOL_GPL vmlinux 0x3b7b114e	dm_device_name
+EXPORT_SYMBOL_GPL vmlinux 0x3b7ea06f	__fsnotify_inode_delete
+EXPORT_SYMBOL_GPL vmlinux 0x3b7fdb6f	shash_attr_alg
+EXPORT_SYMBOL_GPL vmlinux 0x3be7af02	get_max_files
+EXPORT_SYMBOL_GPL vmlinux 0x3be89d3c	usb_register_notify
+EXPORT_SYMBOL_GPL vmlinux 0x3c307dcb	skcipher_geniv_free
+EXPORT_SYMBOL_GPL vmlinux 0x3c6488c3	usb_buffer_map_sg
+EXPORT_SYMBOL_GPL vmlinux 0x3c6c45ca	__tracepoint_power_frequency
+EXPORT_SYMBOL_GPL vmlinux 0x3c7d8eda	devres_add
+EXPORT_SYMBOL_GPL vmlinux 0x3c7fa7a7	usb_kill_urb
+EXPORT_SYMBOL_GPL vmlinux 0x3c942368	profile_event_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x3c9cab97	tty_find_polling_driver
+EXPORT_SYMBOL_GPL vmlinux 0x3cb3950a	class_interface_register
+EXPORT_SYMBOL_GPL vmlinux 0x3ccb6c30	firmware_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x3cd06035	add_input_randomness
+EXPORT_SYMBOL_GPL vmlinux 0x3cfdfae5	trace_current_buffer_discard_commit
+EXPORT_SYMBOL_GPL vmlinux 0x3cfe9e79	do_sync_mapping_range
+EXPORT_SYMBOL_GPL vmlinux 0x3cfedb3f	register_pm_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x3d100a0e	ata_sff_thaw
+EXPORT_SYMBOL_GPL vmlinux 0x3d18a025	vfs_kern_mount
+EXPORT_SYMBOL_GPL vmlinux 0x3d381b7b	i2c_new_probed_device
+EXPORT_SYMBOL_GPL vmlinux 0x3d388324	dpm_resume_end
+EXPORT_SYMBOL_GPL vmlinux 0x3d5f392d	acpi_os_unmap_memory
+EXPORT_SYMBOL_GPL vmlinux 0x3d6d0225	transport_add_device
+EXPORT_SYMBOL_GPL vmlinux 0x3d7ea99a	gnttab_grant_foreign_transfer
+EXPORT_SYMBOL_GPL vmlinux 0x3dc4e2e5	usb_put_hcd
+EXPORT_SYMBOL_GPL vmlinux 0x3dd5d829	add_timer_on
+EXPORT_SYMBOL_GPL vmlinux 0x3dde0e07	amd_get_nb_id
+EXPORT_SYMBOL_GPL vmlinux 0x3de34bfd	security_inode_setattr
+EXPORT_SYMBOL_GPL vmlinux 0x3e90049c	usb_clear_halt
+EXPORT_SYMBOL_GPL vmlinux 0x3ecf6cfc	wmi_install_notify_handler
+EXPORT_SYMBOL_GPL vmlinux 0x3efb35c9	get_online_cpus
+EXPORT_SYMBOL_GPL vmlinux 0x3f093a1f	spi_sync
+EXPORT_SYMBOL_GPL vmlinux 0x3f238101	dcookie_register
+EXPORT_SYMBOL_GPL vmlinux 0x3f2f0897	ata_sff_tf_load
+EXPORT_SYMBOL_GPL vmlinux 0x3f7b4e68	rtc_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x3f84d4c9	gnttab_release_grant_reference
+EXPORT_SYMBOL_GPL vmlinux 0x3f9b256b	inet_csk_listen_stop
+EXPORT_SYMBOL_GPL vmlinux 0x3faa08c4	simple_attr_write
+EXPORT_SYMBOL_GPL vmlinux 0x3fbca532	crypto_attr_alg2
+EXPORT_SYMBOL_GPL vmlinux 0x40101f26	cpufreq_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0x40164d85	da903x_update
+EXPORT_SYMBOL_GPL vmlinux 0x40258e27	crypto_unregister_ahash
+EXPORT_SYMBOL_GPL vmlinux 0x402a8664	filter_current_check_discard
+EXPORT_SYMBOL_GPL vmlinux 0x405211cb	sync_filesystem
+EXPORT_SYMBOL_GPL vmlinux 0x405f6eeb	ata_port_start
+EXPORT_SYMBOL_GPL vmlinux 0x40af0dec	ata_xfer_mode2mask
+EXPORT_SYMBOL_GPL vmlinux 0x40be2c41	blocking_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x40d3007c	ata_sas_slave_configure
+EXPORT_SYMBOL_GPL vmlinux 0x40eb7312	spi_alloc_device
+EXPORT_SYMBOL_GPL vmlinux 0x4220181b	xenbus_dev_changed
+EXPORT_SYMBOL_GPL vmlinux 0x42494cea	ring_buffer_event_length
+EXPORT_SYMBOL_GPL vmlinux 0x424acc6d	scatterwalk_done
+EXPORT_SYMBOL_GPL vmlinux 0x425d2633	sysdev_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x426f13b9	e820_all_mapped
+EXPORT_SYMBOL_GPL vmlinux 0x427dd702	pci_bus_add_device
+EXPORT_SYMBOL_GPL vmlinux 0x42acfea4	cpci_hp_register_bus
+EXPORT_SYMBOL_GPL vmlinux 0x42eee679	stop_machine
+EXPORT_SYMBOL_GPL vmlinux 0x4304c1f9	ata_noop_qc_prep
+EXPORT_SYMBOL_GPL vmlinux 0x432fd7f6	__gpio_set_value
+EXPORT_SYMBOL_GPL vmlinux 0x43f56e82	ata_xfer_mode2shift
+EXPORT_SYMBOL_GPL vmlinux 0x43fc6c6b	drop_file_write_access
+EXPORT_SYMBOL_GPL vmlinux 0x440dbee6	fuse_do_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x44661518	add_to_page_cache_lru
+EXPORT_SYMBOL_GPL vmlinux 0x44683e2d	fib_rules_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x4484a5a4	wait_for_device_probe
+EXPORT_SYMBOL_GPL vmlinux 0x44a120f8	__inet_inherit_port
+EXPORT_SYMBOL_GPL vmlinux 0x44a65d5c	lock_policy_rwsem_read
+EXPORT_SYMBOL_GPL vmlinux 0x44abb265	device_create
+EXPORT_SYMBOL_GPL vmlinux 0x44b6f080	pci_set_pcie_reset_state
+EXPORT_SYMBOL_GPL vmlinux 0x4541fe0d	mtrr_state
+EXPORT_SYMBOL_GPL vmlinux 0x454d5c01	blocking_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x457594fa	crypto_alg_list
+EXPORT_SYMBOL_GPL vmlinux 0x4598ffe3	ip_local_out
+EXPORT_SYMBOL_GPL vmlinux 0x45bf1ff3	crypto_inc
+EXPORT_SYMBOL_GPL vmlinux 0x45ce97f6	vfs_setxattr
+EXPORT_SYMBOL_GPL vmlinux 0x45d14bdf	hypercall_page
+EXPORT_SYMBOL_GPL vmlinux 0x45f74c02	sdio_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0x46007a8d	debugfs_create_x8
+EXPORT_SYMBOL_GPL vmlinux 0x460f31aa	rodata_test_data
+EXPORT_SYMBOL_GPL vmlinux 0x463629cd	regulator_list_voltage
+EXPORT_SYMBOL_GPL vmlinux 0x464b22fb	scsi_nl_sock
+EXPORT_SYMBOL_GPL vmlinux 0x4672e88b	__crypto_dequeue_request
+EXPORT_SYMBOL_GPL vmlinux 0x468b6545	regulator_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x46dc6a84	ata_link_offline
+EXPORT_SYMBOL_GPL vmlinux 0x46eac552	__blkdev_driver_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x470503bc	pci_enable_sriov
+EXPORT_SYMBOL_GPL vmlinux 0x470ce480	get_user_pages_fast
+EXPORT_SYMBOL_GPL vmlinux 0x47229b5c	gpio_request
+EXPORT_SYMBOL_GPL vmlinux 0x475c3565	kobject_get_path
+EXPORT_SYMBOL_GPL vmlinux 0x47b4e363	disk_map_sector_rcu
+EXPORT_SYMBOL_GPL vmlinux 0x4834d9e1	ata_ehi_push_desc
+EXPORT_SYMBOL_GPL vmlinux 0x48615514	blk_trace_remove
+EXPORT_SYMBOL_GPL vmlinux 0x48aec5eb	usb_deregister_device_driver
+EXPORT_SYMBOL_GPL vmlinux 0x48b7fa71	debugfs_create_u64
+EXPORT_SYMBOL_GPL vmlinux 0x490780ff	find_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x497de026	sysfs_create_link
+EXPORT_SYMBOL_GPL vmlinux 0x4985d4b5	sis_info133_for_sata
+EXPORT_SYMBOL_GPL vmlinux 0x499043d3	crypto_init_queue
+EXPORT_SYMBOL_GPL vmlinux 0x4995f903	spi_setup
+EXPORT_SYMBOL_GPL vmlinux 0x49ec9877	crypto_find_alg
+EXPORT_SYMBOL_GPL vmlinux 0x4a0cebc9	cpufreq_unregister_governor
+EXPORT_SYMBOL_GPL vmlinux 0x4a577562	blk_rq_err_bytes
+EXPORT_SYMBOL_GPL vmlinux 0x4a734efa	dma_wait_for_async_tx
+EXPORT_SYMBOL_GPL vmlinux 0x4aa4591f	sock_prot_inuse_add
+EXPORT_SYMBOL_GPL vmlinux 0x4af9d82c	class_dev_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0x4afcdb09	usb_register_dev
+EXPORT_SYMBOL_GPL vmlinux 0x4b33177c	pci_renumber_slot
+EXPORT_SYMBOL_GPL vmlinux 0x4b3f7cc7	sdio_readl
+EXPORT_SYMBOL_GPL vmlinux 0x4b580715	single_release_net
+EXPORT_SYMBOL_GPL vmlinux 0x4b762828	start_thread
+EXPORT_SYMBOL_GPL vmlinux 0x4b859bc1	fib_rules_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x4bb3867b	ring_buffer_read_page
+EXPORT_SYMBOL_GPL vmlinux 0x4be479b5	proc_net_fops_create
+EXPORT_SYMBOL_GPL vmlinux 0x4bee02f0	cpci_hp_unregister_bus
+EXPORT_SYMBOL_GPL vmlinux 0x4bf3351e	usb_driver_claim_interface
+EXPORT_SYMBOL_GPL vmlinux 0x4c1e3853	debugfs_create_u8
+EXPORT_SYMBOL_GPL vmlinux 0x4c759827	byte_rev_table
+EXPORT_SYMBOL_GPL vmlinux 0x4c967e29	inet_csk_addr2sockaddr
+EXPORT_SYMBOL_GPL vmlinux 0x4cec82ee	crypto_chain
+EXPORT_SYMBOL_GPL vmlinux 0x4d282023	blk_abort_request
+EXPORT_SYMBOL_GPL vmlinux 0x4d2c9a35	anon_inode_getfile
+EXPORT_SYMBOL_GPL vmlinux 0x4d3970eb	power_supply_register
+EXPORT_SYMBOL_GPL vmlinux 0x4d4e4610	posix_timer_event
+EXPORT_SYMBOL_GPL vmlinux 0x4d8f4c15	klist_add_before
+EXPORT_SYMBOL_GPL vmlinux 0x4d902f43	ata_acpi_gtm
+EXPORT_SYMBOL_GPL vmlinux 0x4e424cb4	sk_clone
+EXPORT_SYMBOL_GPL vmlinux 0x4ea226d7	ring_buffer_entries_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x4ed4d7c5	spi_new_device
+EXPORT_SYMBOL_GPL vmlinux 0x4eebbf49	scsi_dh_detach
+EXPORT_SYMBOL_GPL vmlinux 0x4f1ff8f4	usb_hcd_poll_rh_status
+EXPORT_SYMBOL_GPL vmlinux 0x4f2dd2c2	screen_glyph
+EXPORT_SYMBOL_GPL vmlinux 0x4f3537f6	crypto_ahash_final
+EXPORT_SYMBOL_GPL vmlinux 0x4f502ba6	device_del
+EXPORT_SYMBOL_GPL vmlinux 0x4f6a2efb	usb_put_dev
+EXPORT_SYMBOL_GPL vmlinux 0x4f6d1236	crypto_alloc_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x4fc39726	sdio_memcpy_toio
+EXPORT_SYMBOL_GPL vmlinux 0x4fc56cce	iommu_detach_device
+EXPORT_SYMBOL_GPL vmlinux 0x4fdc945d	sata_deb_timing_normal
+EXPORT_SYMBOL_GPL vmlinux 0x5014b118	sysfs_add_file_to_group
+EXPORT_SYMBOL_GPL vmlinux 0x50184142	pci_get_hp_params
+EXPORT_SYMBOL_GPL vmlinux 0x504a2533	sysfs_schedule_callback
+EXPORT_SYMBOL_GPL vmlinux 0x504b4d51	xenbus_map_ring
+EXPORT_SYMBOL_GPL vmlinux 0x50598efd	ata_sas_port_init
+EXPORT_SYMBOL_GPL vmlinux 0x506a697e	sysfs_chmod_file
+EXPORT_SYMBOL_GPL vmlinux 0x506e12df	platform_driver_probe
+EXPORT_SYMBOL_GPL vmlinux 0x5086ac3a	alg_test
+EXPORT_SYMBOL_GPL vmlinux 0x50b319ce	cpu_bit_bitmap
+EXPORT_SYMBOL_GPL vmlinux 0x50b44651	crypto_alloc_instance
+EXPORT_SYMBOL_GPL vmlinux 0x50d1f870	pgprot_writecombine
+EXPORT_SYMBOL_GPL vmlinux 0x50e7193a	__i2c_first_dynamic_bus_num
+EXPORT_SYMBOL_GPL vmlinux 0x50f5e532	call_rcu_sched
+EXPORT_SYMBOL_GPL vmlinux 0x50fad434	round_jiffies_up
+EXPORT_SYMBOL_GPL vmlinux 0x513172a3	srcu_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x51602ba6	sysfs_remove_link
+EXPORT_SYMBOL_GPL vmlinux 0x516e7df8	da903x_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5172ff4c	rtc_update_irq
+EXPORT_SYMBOL_GPL vmlinux 0x518c2fc6	hpet_rtc_dropped_irq
+EXPORT_SYMBOL_GPL vmlinux 0x51b94f4c	dm_rh_recovery_end
+EXPORT_SYMBOL_GPL vmlinux 0x5255894b	clockevents_register_device
+EXPORT_SYMBOL_GPL vmlinux 0x527cc9c8	shash_free_instance
+EXPORT_SYMBOL_GPL vmlinux 0x52948366	regulator_bulk_get
+EXPORT_SYMBOL_GPL vmlinux 0x52ab2b4c	inet_csk_route_req
+EXPORT_SYMBOL_GPL vmlinux 0x52d111ea	pm_qos_update_requirement
+EXPORT_SYMBOL_GPL vmlinux 0x52d671eb	sysfs_put
+EXPORT_SYMBOL_GPL vmlinux 0x5324d04f	bstr_printf
+EXPORT_SYMBOL_GPL vmlinux 0x53614269	get_cpu_idle_time_us
+EXPORT_SYMBOL_GPL vmlinux 0x5372dede	unregister_acpi_bus_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x53986488	register_die_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x539eda8d	ata_pci_device_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x53b36db6	inverse_translate
+EXPORT_SYMBOL_GPL vmlinux 0x54150661	tcp_get_info
+EXPORT_SYMBOL_GPL vmlinux 0x54397bcd	generic_detach_inode
+EXPORT_SYMBOL_GPL vmlinux 0x5460c8d8	fsnotify_get_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x549525ef	handle_nested_irq
+EXPORT_SYMBOL_GPL vmlinux 0x549fe6a9	class_find_device
+EXPORT_SYMBOL_GPL vmlinux 0x5519bea2	ata_base_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x551d0a94	crypto_spawn_tfm2
+EXPORT_SYMBOL_GPL vmlinux 0x55358d7a	ip6_dst_blackhole
+EXPORT_SYMBOL_GPL vmlinux 0x55526907	xen_features
+EXPORT_SYMBOL_GPL vmlinux 0x55787585	__rtnl_register
+EXPORT_SYMBOL_GPL vmlinux 0x55f2580b	__alloc_percpu
+EXPORT_SYMBOL_GPL vmlinux 0x561c634a	wmi_evaluate_method
+EXPORT_SYMBOL_GPL vmlinux 0x56310925	regulator_mode_to_status
+EXPORT_SYMBOL_GPL vmlinux 0x56319a02	debugfs_create_size_t
+EXPORT_SYMBOL_GPL vmlinux 0x56398615	mark_tsc_unstable
+EXPORT_SYMBOL_GPL vmlinux 0x563fb5c8	__trace_bprintk
+EXPORT_SYMBOL_GPL vmlinux 0x5641485b	tty_termios_encode_baud_rate
+EXPORT_SYMBOL_GPL vmlinux 0x564f2252	shmem_file_setup
+EXPORT_SYMBOL_GPL vmlinux 0x568de4ee	ata_pci_device_do_resume
+EXPORT_SYMBOL_GPL vmlinux 0x56947347	dmi_walk
+EXPORT_SYMBOL_GPL vmlinux 0x569c1779	xfrm_audit_state_notfound_simple
+EXPORT_SYMBOL_GPL vmlinux 0x56f80e49	xfrm_audit_policy_delete
+EXPORT_SYMBOL_GPL vmlinux 0x57157c6d	ring_buffer_peek
+EXPORT_SYMBOL_GPL vmlinux 0x57217448	ata_port_schedule_eh
+EXPORT_SYMBOL_GPL vmlinux 0x572623cd	inet_csk_clone
+EXPORT_SYMBOL_GPL vmlinux 0x5779d445	xenbus_exists
+EXPORT_SYMBOL_GPL vmlinux 0x579e0bf5	rtnl_unregister_all
+EXPORT_SYMBOL_GPL vmlinux 0x57d232e3	dma_run_dependencies
+EXPORT_SYMBOL_GPL vmlinux 0x583b845a	__trace_note_message
+EXPORT_SYMBOL_GPL vmlinux 0x583db1a5	ata_port_abort
+EXPORT_SYMBOL_GPL vmlinux 0x584b943b	ata_do_set_mode
+EXPORT_SYMBOL_GPL vmlinux 0x5882f459	ata_ehi_clear_desc
+EXPORT_SYMBOL_GPL vmlinux 0x58f3c8a8	tty_buffer_request_room
+EXPORT_SYMBOL_GPL vmlinux 0x593a36c2	scsi_dh_handler_exist
+EXPORT_SYMBOL_GPL vmlinux 0x5948fa18	scsi_nl_add_driver
+EXPORT_SYMBOL_GPL vmlinux 0x59c752a3	xfrm_output_resume
+EXPORT_SYMBOL_GPL vmlinux 0x5a0ae43d	attribute_container_classdev_to_container
+EXPORT_SYMBOL_GPL vmlinux 0x5a2b1b67	gnttab_free_grant_reference
+EXPORT_SYMBOL_GPL vmlinux 0x5a48fba2	disable_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0x5a6b9919	__ring_buffer_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x5a7bfe41	crypto_probing_notify
+EXPORT_SYMBOL_GPL vmlinux 0x5ac94ec9	inet6_csk_search_req
+EXPORT_SYMBOL_GPL vmlinux 0x5ae74e31	raw_hash_sk
+EXPORT_SYMBOL_GPL vmlinux 0x5af03a28	gnttab_claim_grant_reference
+EXPORT_SYMBOL_GPL vmlinux 0x5b013610	ata_sas_queuecmd
+EXPORT_SYMBOL_GPL vmlinux 0x5b435139	unregister_jprobes
+EXPORT_SYMBOL_GPL vmlinux 0x5b835e9d	relay_buf_full
+EXPORT_SYMBOL_GPL vmlinux 0x5bfc03c3	unregister_keyboard_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5c1efd0a	alloc_page_buffers
+EXPORT_SYMBOL_GPL vmlinux 0x5c268ced	register_pernet_gen_device
+EXPORT_SYMBOL_GPL vmlinux 0x5c3f52e6	regulator_bulk_disable
+EXPORT_SYMBOL_GPL vmlinux 0x5c967b9f	cpuidle_enable_device
+EXPORT_SYMBOL_GPL vmlinux 0x5cbfd21e	ata_sff_port_start32
+EXPORT_SYMBOL_GPL vmlinux 0x5d0f6f57	kbd_table
+EXPORT_SYMBOL_GPL vmlinux 0x5d2b7649	aead_geniv_free
+EXPORT_SYMBOL_GPL vmlinux 0x5d366dec	gnttab_cancel_free_callback
+EXPORT_SYMBOL_GPL vmlinux 0x5d46fd2b	bdi_writeout_inc
+EXPORT_SYMBOL_GPL vmlinux 0x5d6cff5a	__dma_request_channel
+EXPORT_SYMBOL_GPL vmlinux 0x5d730e7b	raw_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x5d87c067	register_acpi_bus_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5d8c1cae	mmput
+EXPORT_SYMBOL_GPL vmlinux 0x5dd67618	register_netevent_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5de1686a	class_for_each_device
+EXPORT_SYMBOL_GPL vmlinux 0x5e04125e	regulator_bulk_free
+EXPORT_SYMBOL_GPL vmlinux 0x5e1b382a	crypto_tfm_in_queue
+EXPORT_SYMBOL_GPL vmlinux 0x5e5f964c	elv_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x5e910695	crypto_unregister_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0x5efa1c4a	usb_find_interface
+EXPORT_SYMBOL_GPL vmlinux 0x5f11781c	debugfs_remove_recursive
+EXPORT_SYMBOL_GPL vmlinux 0x5f2da8c4	check_tsc_unstable
+EXPORT_SYMBOL_GPL vmlinux 0x5f8553e4	sata_scr_write_flush
+EXPORT_SYMBOL_GPL vmlinux 0x5fa611ee	debugfs_create_symlink
+EXPORT_SYMBOL_GPL vmlinux 0x5fca4d68	unregister_pernet_gen_device
+EXPORT_SYMBOL_GPL vmlinux 0x5fcdec5d	xfrm_ealg_get_byidx
+EXPORT_SYMBOL_GPL vmlinux 0x6028dd49	skb_pull_rcsum
+EXPORT_SYMBOL_GPL vmlinux 0x603ab8dd	devres_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x6058e1f3	sdio_claim_host
+EXPORT_SYMBOL_GPL vmlinux 0x60838daf	sdio_align_size
+EXPORT_SYMBOL_GPL vmlinux 0x60a13e90	rcu_barrier
+EXPORT_SYMBOL_GPL vmlinux 0x60a38293	xfrm_audit_policy_add
+EXPORT_SYMBOL_GPL vmlinux 0x60bafed5	ata_pci_sff_init_one
+EXPORT_SYMBOL_GPL vmlinux 0x60cd73ed	pv_apic_ops
+EXPORT_SYMBOL_GPL vmlinux 0x60d55416	usb_interrupt_msg
+EXPORT_SYMBOL_GPL vmlinux 0x60f94558	sg_scsi_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x60fa50f9	put_device
+EXPORT_SYMBOL_GPL vmlinux 0x60fba751	uhci_check_and_reset_hc
+EXPORT_SYMBOL_GPL vmlinux 0x61747e09	blocking_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x6194ffea	do_machine_check
+EXPORT_SYMBOL_GPL vmlinux 0x619f70b9	spi_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x61abe2de	tty_ldisc_ref
+EXPORT_SYMBOL_GPL vmlinux 0x61b5cd98	module_mutex
+EXPORT_SYMBOL_GPL vmlinux 0x61b7aba2	blk_add_driver_data
+EXPORT_SYMBOL_GPL vmlinux 0x61c6f8bf	power_supply_am_i_supplied
+EXPORT_SYMBOL_GPL vmlinux 0x62211d33	bd_claim_by_disk
+EXPORT_SYMBOL_GPL vmlinux 0x62319cfc	sysdev_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x6242e2ad	page_cache_async_readahead
+EXPORT_SYMBOL_GPL vmlinux 0x627ce53a	cpci_hp_register_controller
+EXPORT_SYMBOL_GPL vmlinux 0x62960cdf	crypto_alg_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x6298cad9	sdio_disable_func
+EXPORT_SYMBOL_GPL vmlinux 0x629a7f6e	do_posix_clock_nonanosleep
+EXPORT_SYMBOL_GPL vmlinux 0x62d9a7d2	ata_pci_remove_one
+EXPORT_SYMBOL_GPL vmlinux 0x6301d114	device_add
+EXPORT_SYMBOL_GPL vmlinux 0x6306bc2f	debugfs_create_u32
+EXPORT_SYMBOL_GPL vmlinux 0x631350d4	skb_to_sgvec
+EXPORT_SYMBOL_GPL vmlinux 0x631fe87f	skcipher_geniv_init
+EXPORT_SYMBOL_GPL vmlinux 0x6324e79d	sysdev_class_register
+EXPORT_SYMBOL_GPL vmlinux 0x63583f91	hrtimer_cancel
+EXPORT_SYMBOL_GPL vmlinux 0x635d1370	usb_hcd_check_unlink_urb
+EXPORT_SYMBOL_GPL vmlinux 0x637c0561	fuse_file_poll
+EXPORT_SYMBOL_GPL vmlinux 0x6388b1dd	br_fdb_test_addr_hook
+EXPORT_SYMBOL_GPL vmlinux 0x6393d52c	vfs_listxattr
+EXPORT_SYMBOL_GPL vmlinux 0x639ec36f	ring_buffer_record_disable_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x63ca2edb	sysdev_driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x63f139d8	device_release_driver
+EXPORT_SYMBOL_GPL vmlinux 0x63f4dc09	bprintf
+EXPORT_SYMBOL_GPL vmlinux 0x640ee24f	get_inotify_watch
+EXPORT_SYMBOL_GPL vmlinux 0x64f17343	tcp_is_cwnd_limited
+EXPORT_SYMBOL_GPL vmlinux 0x65036d45	ata_wait_after_reset
+EXPORT_SYMBOL_GPL vmlinux 0x652249a4	usb_hcd_unlink_urb_from_ep
+EXPORT_SYMBOL_GPL vmlinux 0x65343146	d_materialise_unique
+EXPORT_SYMBOL_GPL vmlinux 0x654c49e2	aer_irq
+EXPORT_SYMBOL_GPL vmlinux 0x65589219	usb_debug_root
+EXPORT_SYMBOL_GPL vmlinux 0x6565b802	device_register
+EXPORT_SYMBOL_GPL vmlinux 0x656d4891	fuse_dev_release
+EXPORT_SYMBOL_GPL vmlinux 0x65b3ae79	transport_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x65b95540	dm_requeue_unmapped_request
+EXPORT_SYMBOL_GPL vmlinux 0x65bbbc78	schedule_hrtimeout_range
+EXPORT_SYMBOL_GPL vmlinux 0x65ccb6f0	call_netevent_notifiers
+EXPORT_SYMBOL_GPL vmlinux 0x65d6d0f0	gpio_direction_input
+EXPORT_SYMBOL_GPL vmlinux 0x6604454d	sysdev_show_ulong
+EXPORT_SYMBOL_GPL vmlinux 0x661601de	sprint_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x6657779c	swiotlb_sync_single_range_for_device
+EXPORT_SYMBOL_GPL vmlinux 0x668402aa	crypto_put_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x669c87a4	filter_match_preds
+EXPORT_SYMBOL_GPL vmlinux 0x66b2a859	nr_free_buffer_pages
+EXPORT_SYMBOL_GPL vmlinux 0x66d75abe	scsi_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x66d87d38	symbol_put_addr
+EXPORT_SYMBOL_GPL vmlinux 0x66ea1170	__blk_put_request
+EXPORT_SYMBOL_GPL vmlinux 0x66eab7f1	sched_setscheduler
+EXPORT_SYMBOL_GPL vmlinux 0x67254173	crypto_grab_aead
+EXPORT_SYMBOL_GPL vmlinux 0x6752c243	inet_diag_register
+EXPORT_SYMBOL_GPL vmlinux 0x6790f512	ring_buffer_iter_empty
+EXPORT_SYMBOL_GPL vmlinux 0x67955ce6	profile_hits
+EXPORT_SYMBOL_GPL vmlinux 0x67af831d	crypto_drop_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x67e06492	inotify_find_update_watch
+EXPORT_SYMBOL_GPL vmlinux 0x68018218	rt_mutex_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x686c703f	xfrm_count_auth_supported
+EXPORT_SYMBOL_GPL vmlinux 0x6892088c	unregister_pm_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x68a668cb	hrtimer_forward
+EXPORT_SYMBOL_GPL vmlinux 0x68f09f86	ata_sff_tf_read
+EXPORT_SYMBOL_GPL vmlinux 0x6901119a	trace_nowake_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0x69109b31	crypto_shash_setkey
+EXPORT_SYMBOL_GPL vmlinux 0x691b8d3d	device_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x6993ea46	tcp_set_state
+EXPORT_SYMBOL_GPL vmlinux 0x6994c26a	bsg_register_queue
+EXPORT_SYMBOL_GPL vmlinux 0x69b6d2ff	relay_flush
+EXPORT_SYMBOL_GPL vmlinux 0x69c27f29	vfs_lock_file
+EXPORT_SYMBOL_GPL vmlinux 0x69e5a3ee	rtc_irq_set_state
+EXPORT_SYMBOL_GPL vmlinux 0x69e5fc45	find_module
+EXPORT_SYMBOL_GPL vmlinux 0x69e9a2cb	ata_scsi_slave_config
+EXPORT_SYMBOL_GPL vmlinux 0x69f0032a	inet_csk_reqsk_queue_prune
+EXPORT_SYMBOL_GPL vmlinux 0x6a11a720	__inet_lookup_listener
+EXPORT_SYMBOL_GPL vmlinux 0x6a15fb96	crypto_shash_digest
+EXPORT_SYMBOL_GPL vmlinux 0x6a21cb8c	ata_sas_port_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x6a273798	sysfs_notify_dirent
+EXPORT_SYMBOL_GPL vmlinux 0x6a373360	dm_rh_bio_to_region
+EXPORT_SYMBOL_GPL vmlinux 0x6a3d9322	dm_kill_unmapped_request
+EXPORT_SYMBOL_GPL vmlinux 0x6a8441be	cpci_hp_start
+EXPORT_SYMBOL_GPL vmlinux 0x6a8dc705	da903x_clr_bits
+EXPORT_SYMBOL_GPL vmlinux 0x6adf5eab	preempt_notifier_register
+EXPORT_SYMBOL_GPL vmlinux 0x6ae11d26	crypto_mod_get
+EXPORT_SYMBOL_GPL vmlinux 0x6b3b7167	fb_deferred_io_cleanup
+EXPORT_SYMBOL_GPL vmlinux 0x6b7ab588	trace_define_common_fields
+EXPORT_SYMBOL_GPL vmlinux 0x6b83ef55	ata_link_online
+EXPORT_SYMBOL_GPL vmlinux 0x6b87e3b1	sata_std_hardreset
+EXPORT_SYMBOL_GPL vmlinux 0x6b9178b3	xenbus_strstate
+EXPORT_SYMBOL_GPL vmlinux 0x6be62dfd	probe_kernel_read
+EXPORT_SYMBOL_GPL vmlinux 0x6bfd2188	fuse_request_send
+EXPORT_SYMBOL_GPL vmlinux 0x6c0b5808	fuse_request_send_background
+EXPORT_SYMBOL_GPL vmlinux 0x6c404e4c	led_trigger_register
+EXPORT_SYMBOL_GPL vmlinux 0x6c49c4f2	clockevents_notify
+EXPORT_SYMBOL_GPL vmlinux 0x6c807758	sysfs_get_dirent
+EXPORT_SYMBOL_GPL vmlinux 0x6c8d5ae8	__gpio_get_value
+EXPORT_SYMBOL_GPL vmlinux 0x6c8eb98f	xfrm_aalg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0x6ce031b4	i2c_new_device
+EXPORT_SYMBOL_GPL vmlinux 0x6d12a543	device_create_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0x6d2fc5a6	net_namespace_list
+EXPORT_SYMBOL_GPL vmlinux 0x6d38200d	crypto_larval_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x6d56594d	skb_icv_walk
+EXPORT_SYMBOL_GPL vmlinux 0x6d7d4f95	ip6_sk_dst_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x6d99bebe	sysfs_remove_file_from_group
+EXPORT_SYMBOL_GPL vmlinux 0x6dac1f9a	led_trigger_set_default
+EXPORT_SYMBOL_GPL vmlinux 0x6e58ddf0	gnttab_end_foreign_transfer_ref
+EXPORT_SYMBOL_GPL vmlinux 0x6e6089f0	crypto_nivaead_type
+EXPORT_SYMBOL_GPL vmlinux 0x6e7474fc	xfrm_ealg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x6e990eb1	ata_pio_need_iordy
+EXPORT_SYMBOL_GPL vmlinux 0x6eb787ee	klist_add_head
+EXPORT_SYMBOL_GPL vmlinux 0x6eeedc32	cleanup_srcu_struct
+EXPORT_SYMBOL_GPL vmlinux 0x6f5041c9	seq_open_net
+EXPORT_SYMBOL_GPL vmlinux 0x6f52a62e	register_kretprobe
+EXPORT_SYMBOL_GPL vmlinux 0x6f6ce32b	rtc_class_close
+EXPORT_SYMBOL_GPL vmlinux 0x6f8547b7	sysfs_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x6fbed5b4	device_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x6fe3d8cf	ktime_add_safe
+EXPORT_SYMBOL_GPL vmlinux 0x6ff607b6	crypto_get_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x7037d79d	k8_flush_garts
+EXPORT_SYMBOL_GPL vmlinux 0x704cdfc0	put_inotify_watch
+EXPORT_SYMBOL_GPL vmlinux 0x706b3a33	cpufreq_frequency_table_get_attr
+EXPORT_SYMBOL_GPL vmlinux 0x7074e30c	securityfs_create_dir
+EXPORT_SYMBOL_GPL vmlinux 0x707ff1bb	ata_xfer_mask2mode
+EXPORT_SYMBOL_GPL vmlinux 0x708837c5	ring_buffer_resize
+EXPORT_SYMBOL_GPL vmlinux 0x716265c7	debugfs_initialized
+EXPORT_SYMBOL_GPL vmlinux 0x7195f3c7	rtnl_register
+EXPORT_SYMBOL_GPL vmlinux 0x71b65ef2	ata_sff_irq_clear
+EXPORT_SYMBOL_GPL vmlinux 0x71c8bc95	kgdb_unregister_io_module
+EXPORT_SYMBOL_GPL vmlinux 0x721babaa	sdio_enable_func
+EXPORT_SYMBOL_GPL vmlinux 0x722c4f65	usb_scuttle_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0x72741f25	trace_vbprintk
+EXPORT_SYMBOL_GPL vmlinux 0x7278d328	all_vm_events
+EXPORT_SYMBOL_GPL vmlinux 0x728583ea	sdio_readw
+EXPORT_SYMBOL_GPL vmlinux 0x729ab9c7	seq_release_net
+EXPORT_SYMBOL_GPL vmlinux 0x72d94949	crypto_alloc_aead
+EXPORT_SYMBOL_GPL vmlinux 0x72e03bae	stop_machine_create
+EXPORT_SYMBOL_GPL vmlinux 0x731433ee	unregister_timer_hook
+EXPORT_SYMBOL_GPL vmlinux 0x731a8eab	queue_delayed_work_on
+EXPORT_SYMBOL_GPL vmlinux 0x731dba7a	xen_domain_type
+EXPORT_SYMBOL_GPL vmlinux 0x733e4a90	__class_create
+EXPORT_SYMBOL_GPL vmlinux 0x73a48b4a	ata_sff_std_ports
+EXPORT_SYMBOL_GPL vmlinux 0x73e4678a	ata_dev_pair
+EXPORT_SYMBOL_GPL vmlinux 0x73fcc540	sdio_readb
+EXPORT_SYMBOL_GPL vmlinux 0x742985c2	crypto_hash_walk_done
+EXPORT_SYMBOL_GPL vmlinux 0x743a165e	ata_pack_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0x74814733	tcp_twsk_unique
+EXPORT_SYMBOL_GPL vmlinux 0x7484075a	inotify_inode_queue_event
+EXPORT_SYMBOL_GPL vmlinux 0x74abdafa	task_handoff_register
+EXPORT_SYMBOL_GPL vmlinux 0x74baf17a	tracing_is_on
+EXPORT_SYMBOL_GPL vmlinux 0x74deb10c	used_vectors
+EXPORT_SYMBOL_GPL vmlinux 0x74f0ae80	ring_buffer_time_stamp
+EXPORT_SYMBOL_GPL vmlinux 0x7521afb6	leave_mm
+EXPORT_SYMBOL_GPL vmlinux 0x7534cdfd	ata_sff_qc_prep
+EXPORT_SYMBOL_GPL vmlinux 0x7549636b	scsi_queue_work
+EXPORT_SYMBOL_GPL vmlinux 0x757dc815	root_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x75d97d04	xenbus_free_evtchn
+EXPORT_SYMBOL_GPL vmlinux 0x75e8f3c3	crypto_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x760ead7f	sdio_writeb
+EXPORT_SYMBOL_GPL vmlinux 0x761188fd	dpm_suspend_noirq
+EXPORT_SYMBOL_GPL vmlinux 0x7648ee0c	cpufreq_frequency_table_verify
+EXPORT_SYMBOL_GPL vmlinux 0x7685c882	blk_lld_busy
+EXPORT_SYMBOL_GPL vmlinux 0x768a0302	sata_pmp_error_handler
+EXPORT_SYMBOL_GPL vmlinux 0x76b3246d	xenbus_watch_path
+EXPORT_SYMBOL_GPL vmlinux 0x770dc8b4	sysfs_remove_group
+EXPORT_SYMBOL_GPL vmlinux 0x7712771a	unbind_from_irqhandler
+EXPORT_SYMBOL_GPL vmlinux 0x77127d5e	crypto_ahash_digest
+EXPORT_SYMBOL_GPL vmlinux 0x77295421	rt_mutex_lock_interruptible
+EXPORT_SYMBOL_GPL vmlinux 0x773ca527	init_uts_ns
+EXPORT_SYMBOL_GPL vmlinux 0x776760f9	dm_noflush_suspending
+EXPORT_SYMBOL_GPL vmlinux 0x777721f1	rtc_irq_set_freq
+EXPORT_SYMBOL_GPL vmlinux 0x77b0ebeb	driver_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x77d241d9	blkcipher_walk_virt
+EXPORT_SYMBOL_GPL vmlinux 0x780eed89	acpi_processor_ffh_cstate_enter
+EXPORT_SYMBOL_GPL vmlinux 0x781f4ba2	vfs_getxattr
+EXPORT_SYMBOL_GPL vmlinux 0x78309e2e	i2c_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x7840ede6	key_type_user
+EXPORT_SYMBOL_GPL vmlinux 0x7885c1ed	usb_hcd_pci_shutdown
+EXPORT_SYMBOL_GPL vmlinux 0x788c852b	ring_buffer_overrun_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x78cf003f	ring_buffer_reset
+EXPORT_SYMBOL_GPL vmlinux 0x78e4a4ee	klist_add_after
+EXPORT_SYMBOL_GPL vmlinux 0x792c05f7	fsnotify
+EXPORT_SYMBOL_GPL vmlinux 0x793a329a	sysfs_remove_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0x7944e0fc	tracing_off
+EXPORT_SYMBOL_GPL vmlinux 0x79808b10	regulator_disable
+EXPORT_SYMBOL_GPL vmlinux 0x79bc6fc8	spi_busnum_to_master
+EXPORT_SYMBOL_GPL vmlinux 0x79cda9a0	ata_sff_softreset
+EXPORT_SYMBOL_GPL vmlinux 0x79e36091	fuse_dev_operations
+EXPORT_SYMBOL_GPL vmlinux 0x79eb6e3d	acpi_smbus_read
+EXPORT_SYMBOL_GPL vmlinux 0x7a243bce	ata_bmdma_stop
+EXPORT_SYMBOL_GPL vmlinux 0x7a285450	xfrm_inner_extract_output
+EXPORT_SYMBOL_GPL vmlinux 0x7a3c156a	sock_prot_inuse_get
+EXPORT_SYMBOL_GPL vmlinux 0x7a40ad4e	hwmon_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x7a47cf8a	device_remove_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0x7a4bc1aa	dm_rh_get_region_key
+EXPORT_SYMBOL_GPL vmlinux 0x7a4c1438	pv_info
+EXPORT_SYMBOL_GPL vmlinux 0x7ab3c122	edac_handlers
+EXPORT_SYMBOL_GPL vmlinux 0x7ae1ae8e	cpufreq_frequency_table_put_attr
+EXPORT_SYMBOL_GPL vmlinux 0x7b1d544d	edac_handler_set
+EXPORT_SYMBOL_GPL vmlinux 0x7b1d9dfa	blk_insert_cloned_request
+EXPORT_SYMBOL_GPL vmlinux 0x7b4e7638	dev_change_net_namespace
+EXPORT_SYMBOL_GPL vmlinux 0x7b8adfca	fl6_sock_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x7bcd2ded	klist_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0x7bcebd33	usb_get_intf
+EXPORT_SYMBOL_GPL vmlinux 0x7bd7c566	put_driver
+EXPORT_SYMBOL_GPL vmlinux 0x7bee2635	cpufreq_frequency_table_cpuinfo
+EXPORT_SYMBOL_GPL vmlinux 0x7c3ff30d	inet_hashinfo_init
+EXPORT_SYMBOL_GPL vmlinux 0x7c4228a0	get_dcookie
+EXPORT_SYMBOL_GPL vmlinux 0x7d8922f3	sdio_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0x7dc5d0b6	crypto_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x7e1183c9	async_schedule
+EXPORT_SYMBOL_GPL vmlinux 0x7e275ea8	scsi_complete_async_scans
+EXPORT_SYMBOL_GPL vmlinux 0x7e2d7ad6	blk_abort_queue
+EXPORT_SYMBOL_GPL vmlinux 0x7e5e301f	unregister_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0x7e64181d	usb_calc_bus_time
+EXPORT_SYMBOL_GPL vmlinux 0x7e6f2d92	fuse_do_open
+EXPORT_SYMBOL_GPL vmlinux 0x7ecf71bb	single_open_net
+EXPORT_SYMBOL_GPL vmlinux 0x7efef236	ahash_free_instance
+EXPORT_SYMBOL_GPL vmlinux 0x7f19c836	unlock_policy_rwsem_write
+EXPORT_SYMBOL_GPL vmlinux 0x7fbe01cf	anon_transport_class_register
+EXPORT_SYMBOL_GPL vmlinux 0x7ff10ccf	raw_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x8014b6af	input_event_from_user
+EXPORT_SYMBOL_GPL vmlinux 0x80189a41	ata_qc_complete_multiple
+EXPORT_SYMBOL_GPL vmlinux 0x80373203	ata_sff_irq_on
+EXPORT_SYMBOL_GPL vmlinux 0x8039d043	selinux_secmark_relabel_packet_permission
+EXPORT_SYMBOL_GPL vmlinux 0x80417404	ata_host_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x808ec1a3	crypto_alg_tested
+EXPORT_SYMBOL_GPL vmlinux 0x80bcd3fe	set_task_ioprio
+EXPORT_SYMBOL_GPL vmlinux 0x80c6e9ee	spi_write_then_read
+EXPORT_SYMBOL_GPL vmlinux 0x80ee55c3	selinux_secmark_refcount_inc
+EXPORT_SYMBOL_GPL vmlinux 0x80f03143	usb_autopm_put_interface
+EXPORT_SYMBOL_GPL vmlinux 0x8106d775	cpci_hp_unregister_controller
+EXPORT_SYMBOL_GPL vmlinux 0x8149ea54	ata_timing_find_mode
+EXPORT_SYMBOL_GPL vmlinux 0x81524162	fuse_put_request
+EXPORT_SYMBOL_GPL vmlinux 0x8164859c	rtc_read_time
+EXPORT_SYMBOL_GPL vmlinux 0x81683107	ring_buffer_size
+EXPORT_SYMBOL_GPL vmlinux 0x8199a905	xenbus_unmap_ring_vfree
+EXPORT_SYMBOL_GPL vmlinux 0x8226642f	__gpio_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x824b8cec	pci_restore_msi_state
+EXPORT_SYMBOL_GPL vmlinux 0x82923f4e	acpi_bus_trim
+EXPORT_SYMBOL_GPL vmlinux 0x82939ebd	rcu_batches_completed_sched
+EXPORT_SYMBOL_GPL vmlinux 0x82ad1f61	mnt_want_write_file
+EXPORT_SYMBOL_GPL vmlinux 0x82af8b9a	devres_open_group
+EXPORT_SYMBOL_GPL vmlinux 0x82b2ee72	inet6_hash_connect
+EXPORT_SYMBOL_GPL vmlinux 0x82cd19f3	register_xenstore_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x82d79b51	sysctl_vfs_cache_pressure
+EXPORT_SYMBOL_GPL vmlinux 0x82f776b7	gpio_export
+EXPORT_SYMBOL_GPL vmlinux 0x8310e141	disk_part_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0x8333bfde	crypto_ahash_setkey
+EXPORT_SYMBOL_GPL vmlinux 0x833e051c	init_srcu_struct
+EXPORT_SYMBOL_GPL vmlinux 0x83b76dbe	generic_fh_to_parent
+EXPORT_SYMBOL_GPL vmlinux 0x83bc5dac	inotify_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x83c67ec2	raw_seq_stop
+EXPORT_SYMBOL_GPL vmlinux 0x83d4cd9c	inet_hash_connect
+EXPORT_SYMBOL_GPL vmlinux 0x83e52c00	power_supply_class
+EXPORT_SYMBOL_GPL vmlinux 0x840722da	dev_attr_unload_heads
+EXPORT_SYMBOL_GPL vmlinux 0x842a07ae	crypto_rng_type
+EXPORT_SYMBOL_GPL vmlinux 0x8436a9ba	zap_vma_ptes
+EXPORT_SYMBOL_GPL vmlinux 0x843d70ef	acpi_is_root_bridge
+EXPORT_SYMBOL_GPL vmlinux 0x845cc2c4	unregister_pernet_gen_subsys
+EXPORT_SYMBOL_GPL vmlinux 0x847f2091	sysfs_notify
+EXPORT_SYMBOL_GPL vmlinux 0x84b149e9	hypervisor_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x84bd9e00	cpufreq_freq_attr_scaling_available_freqs
+EXPORT_SYMBOL_GPL vmlinux 0x850af9da	ata_acpi_stm
+EXPORT_SYMBOL_GPL vmlinux 0x85291f80	ata_host_activate
+EXPORT_SYMBOL_GPL vmlinux 0x852e6ee2	xenbus_unmap_ring
+EXPORT_SYMBOL_GPL vmlinux 0x85478a0b	inet6_hash_frag
+EXPORT_SYMBOL_GPL vmlinux 0x85bcad38	__pci_hp_register
+EXPORT_SYMBOL_GPL vmlinux 0x85c10896	rcu_batches_completed_bh
+EXPORT_SYMBOL_GPL vmlinux 0x85cb1c9d	get_current_tty
+EXPORT_SYMBOL_GPL vmlinux 0x85cf26a8	ata_port_pbar_desc
+EXPORT_SYMBOL_GPL vmlinux 0x85d7edfd	hpet_set_periodic_freq
+EXPORT_SYMBOL_GPL vmlinux 0x85ec6388	fuse_conn_kill
+EXPORT_SYMBOL_GPL vmlinux 0x86072866	sdio_set_block_size
+EXPORT_SYMBOL_GPL vmlinux 0x863ddddc	ip_route_output_flow
+EXPORT_SYMBOL_GPL vmlinux 0x863e3a8c	scsi_get_vpd_page
+EXPORT_SYMBOL_GPL vmlinux 0x86623fd7	notify_remote_via_irq
+EXPORT_SYMBOL_GPL vmlinux 0x867c684a	setup_APIC_eilvt_ibs
+EXPORT_SYMBOL_GPL vmlinux 0x868784cb	__symbol_get
+EXPORT_SYMBOL_GPL vmlinux 0x86a51007	gnttab_end_foreign_transfer
+EXPORT_SYMBOL_GPL vmlinux 0x86a5469d	ring_buffer_empty
+EXPORT_SYMBOL_GPL vmlinux 0x86b1667d	hwrng_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x86f6b99d	synchronize_rcu_expedited
+EXPORT_SYMBOL_GPL vmlinux 0x873fbaea	edac_atomic_assert_error
+EXPORT_SYMBOL_GPL vmlinux 0x876d29f1	wmi_get_event_data
+EXPORT_SYMBOL_GPL vmlinux 0x8774f5ef	pm_runtime_idle
+EXPORT_SYMBOL_GPL vmlinux 0x87754115	raw_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x878cc5de	sdio_release_host
+EXPORT_SYMBOL_GPL vmlinux 0x87a79b40	ata_pci_device_resume
+EXPORT_SYMBOL_GPL vmlinux 0x880b189a	__atomic_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x8810ad5e	crypto_xor
+EXPORT_SYMBOL_GPL vmlinux 0x88406680	ata_std_qc_defer
+EXPORT_SYMBOL_GPL vmlinux 0x885142a6	nf_net_netfilter_sysctl_path
+EXPORT_SYMBOL_GPL vmlinux 0x886dec05	usb_hcd_pci_probe
+EXPORT_SYMBOL_GPL vmlinux 0x891e02b1	find_vpid
+EXPORT_SYMBOL_GPL vmlinux 0x897dcf87	cpufreq_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0x89ececdf	rtc_irq_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x8a38b4f3	input_ff_erase
+EXPORT_SYMBOL_GPL vmlinux 0x8a4bdf5f	unregister_net_sysctl_table
+EXPORT_SYMBOL_GPL vmlinux 0x8a70ea0e	inet_csk_search_req
+EXPORT_SYMBOL_GPL vmlinux 0x8a72be8e	power_supply_changed
+EXPORT_SYMBOL_GPL vmlinux 0x8a78989f	irq_from_evtchn
+EXPORT_SYMBOL_GPL vmlinux 0x8aa9abca	sdev_evt_send_simple
+EXPORT_SYMBOL_GPL vmlinux 0x8ab65efd	ring_buffer_reset_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x8ae1ad66	register_pernet_subsys
+EXPORT_SYMBOL_GPL vmlinux 0x8ae8f1f9	tasklet_hrtimer_init
+EXPORT_SYMBOL_GPL vmlinux 0x8b0eb79e	__blk_end_request_err
+EXPORT_SYMBOL_GPL vmlinux 0x8b39cf9d	unregister_kprobes
+EXPORT_SYMBOL_GPL vmlinux 0x8b4660ee	usb_init_urb
+EXPORT_SYMBOL_GPL vmlinux 0x8b57f997	driver_attach
+EXPORT_SYMBOL_GPL vmlinux 0x8b752ac1	ata_tf_to_fis
+EXPORT_SYMBOL_GPL vmlinux 0x8b9200fd	lookup_address
+EXPORT_SYMBOL_GPL vmlinux 0x8c06a108	xenbus_transaction_start
+EXPORT_SYMBOL_GPL vmlinux 0x8c38074a	unregister_xenstore_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x8c3ad43d	__rtnl_link_register
+EXPORT_SYMBOL_GPL vmlinux 0x8c88f0ea	pm_runtime_resume
+EXPORT_SYMBOL_GPL vmlinux 0x8c9d686d	__wake_up_sync_key
+EXPORT_SYMBOL_GPL vmlinux 0x8cd14218	rt_mutex_unlock
+EXPORT_SYMBOL_GPL vmlinux 0x8ce008ff	security_inode_mkdir
+EXPORT_SYMBOL_GPL vmlinux 0x8d033df4	klist_node_attached
+EXPORT_SYMBOL_GPL vmlinux 0x8d109544	transport_setup_device
+EXPORT_SYMBOL_GPL vmlinux 0x8d21e4df	da903x_read
+EXPORT_SYMBOL_GPL vmlinux 0x8d2e698c	regulator_force_disable
+EXPORT_SYMBOL_GPL vmlinux 0x8d411d0b	unregister_ftrace_event
+EXPORT_SYMBOL_GPL vmlinux 0x8d8afc7b	tcp_reno_cong_avoid
+EXPORT_SYMBOL_GPL vmlinux 0x8d952dc7	usb_remove_hcd
+EXPORT_SYMBOL_GPL vmlinux 0x8da23728	aead_geniv_exit
+EXPORT_SYMBOL_GPL vmlinux 0x8da67bf9	usb_bus_list_lock
+EXPORT_SYMBOL_GPL vmlinux 0x8db1a37e	cpuidle_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0x8db89810	device_for_each_child
+EXPORT_SYMBOL_GPL vmlinux 0x8deb6e3c	usb_deregister
+EXPORT_SYMBOL_GPL vmlinux 0x8df632ae	pciserial_resume_ports
+EXPORT_SYMBOL_GPL vmlinux 0x8dfad02f	pid_vnr
+EXPORT_SYMBOL_GPL vmlinux 0x8e3f58df	proc_net_mkdir
+EXPORT_SYMBOL_GPL vmlinux 0x8e558dd7	regulator_set_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0x8e5c0783	blk_update_request
+EXPORT_SYMBOL_GPL vmlinux 0x8eabc8bd	setup_irq
+EXPORT_SYMBOL_GPL vmlinux 0x8eb58c6e	__wake_up_sync
+EXPORT_SYMBOL_GPL vmlinux 0x8efe0116	led_trigger_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x8f6cee77	__round_jiffies_relative
+EXPORT_SYMBOL_GPL vmlinux 0x8f9c4889	ata_sff_data_xfer
+EXPORT_SYMBOL_GPL vmlinux 0x8fa74514	sysdev_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x8fd922f3	blk_rq_prep_clone
+EXPORT_SYMBOL_GPL vmlinux 0x9009602a	acpi_bus_get_ejd
+EXPORT_SYMBOL_GPL vmlinux 0x903e3a0c	br_handle_frame_hook
+EXPORT_SYMBOL_GPL vmlinux 0x9044591d	crypto_larval_kill
+EXPORT_SYMBOL_GPL vmlinux 0x90540857	tcp_unregister_congestion_control
+EXPORT_SYMBOL_GPL vmlinux 0x90a1004a	crypto_has_alg
+EXPORT_SYMBOL_GPL vmlinux 0x90f3c78e	queue_delayed_work
+EXPORT_SYMBOL_GPL vmlinux 0x90f409ea	fib_rules_cleanup_ops
+EXPORT_SYMBOL_GPL vmlinux 0x91346b63	sdio_release_irq
+EXPORT_SYMBOL_GPL vmlinux 0x91482eef	usb_anchor_empty
+EXPORT_SYMBOL_GPL vmlinux 0x9159b9d6	profile_event_register
+EXPORT_SYMBOL_GPL vmlinux 0x91640f16	dm_rh_get_region_size
+EXPORT_SYMBOL_GPL vmlinux 0x91a456a6	usb_autopm_get_interface
+EXPORT_SYMBOL_GPL vmlinux 0x91ff1264	platform_device_del
+EXPORT_SYMBOL_GPL vmlinux 0x9244c614	platform_get_resource
+EXPORT_SYMBOL_GPL vmlinux 0x9249b012	task_active_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0x92778d56	kern_mount_data
+EXPORT_SYMBOL_GPL vmlinux 0x929b13fc	pci_disable_rom
+EXPORT_SYMBOL_GPL vmlinux 0x92d31cfb	fixed_phy_add
+EXPORT_SYMBOL_GPL vmlinux 0x92e33582	crypto_create_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x92fb217b	dcookie_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x93260715	register_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0x935893b2	blk_rq_unprep_clone
+EXPORT_SYMBOL_GPL vmlinux 0x935a7c48	usb_hcd_pci_remove
+EXPORT_SYMBOL_GPL vmlinux 0x93aa2bb2	acpi_get_pci_dev
+EXPORT_SYMBOL_GPL vmlinux 0x93be3c37	sysdev_register
+EXPORT_SYMBOL_GPL vmlinux 0x93d2422d	snmp_mib_free
+EXPORT_SYMBOL_GPL vmlinux 0x93ebe3f5	usb_create_hcd
+EXPORT_SYMBOL_GPL vmlinux 0x9418bbb8	sdio_memcpy_fromio
+EXPORT_SYMBOL_GPL vmlinux 0x942a41f4	iommu_unmap_range
+EXPORT_SYMBOL_GPL vmlinux 0x94326e33	ata_std_prereset
+EXPORT_SYMBOL_GPL vmlinux 0x944561ea	ata_slave_link_init
+EXPORT_SYMBOL_GPL vmlinux 0x94a3bf70	regulator_put
+EXPORT_SYMBOL_GPL vmlinux 0x94a68723	ata_scsi_slave_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x94bef61c	lookup_instantiate_filp
+EXPORT_SYMBOL_GPL vmlinux 0x94df3ab0	crypto_destroy_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x94ef4d05	cpci_hp_stop
+EXPORT_SYMBOL_GPL vmlinux 0x94f728e2	hrtimer_init_sleeper
+EXPORT_SYMBOL_GPL vmlinux 0x9505e567	usb_poison_urb
+EXPORT_SYMBOL_GPL vmlinux 0x952664c5	do_exit
+EXPORT_SYMBOL_GPL vmlinux 0x9556688b	user_read
+EXPORT_SYMBOL_GPL vmlinux 0x956a91ba	gpio_get_value_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x95758050	__blocking_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x957a53b0	sk_setup_caps
+EXPORT_SYMBOL_GPL vmlinux 0x95cdc22f	ata_sff_busy_sleep
+EXPORT_SYMBOL_GPL vmlinux 0x961a8cd3	unlock_policy_rwsem_read
+EXPORT_SYMBOL_GPL vmlinux 0x961e714a	crypto_blkcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0x964d5c39	acpi_os_map_memory
+EXPORT_SYMBOL_GPL vmlinux 0x966eb1e0	mnt_clone_write
+EXPORT_SYMBOL_GPL vmlinux 0x96b7d4e5	get_task_mm
+EXPORT_SYMBOL_GPL vmlinux 0x96cbcf31	pm_qos_add_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x970c8daa	fixed_phy_set_link_update
+EXPORT_SYMBOL_GPL vmlinux 0x9724f911	crypto_shash_finup
+EXPORT_SYMBOL_GPL vmlinux 0x972f2ebd	shash_ahash_finup
+EXPORT_SYMBOL_GPL vmlinux 0x97982542	hrtimer_start_range_ns
+EXPORT_SYMBOL_GPL vmlinux 0x97afc880	__crypto_alloc_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x97c1c194	vfs_cancel_lock
+EXPORT_SYMBOL_GPL vmlinux 0x97cc1802	unregister_pernet_subsys
+EXPORT_SYMBOL_GPL vmlinux 0x980fa92e	__pm_runtime_set_status
+EXPORT_SYMBOL_GPL vmlinux 0x98215d8d	device_rename
+EXPORT_SYMBOL_GPL vmlinux 0x9827f7f6	blk_queue_rq_timeout
+EXPORT_SYMBOL_GPL vmlinux 0x9833bc0c	hvc_kick
+EXPORT_SYMBOL_GPL vmlinux 0x9841a4b9	scsi_dh_activate
+EXPORT_SYMBOL_GPL vmlinux 0x984cecb0	__pm_runtime_get
+EXPORT_SYMBOL_GPL vmlinux 0x9855875a	input_ff_upload
+EXPORT_SYMBOL_GPL vmlinux 0x98cdfc38	acpi_pci_check_ejectable
+EXPORT_SYMBOL_GPL vmlinux 0x98ef3fdf	usb_root_hub_lost_power
+EXPORT_SYMBOL_GPL vmlinux 0x98fc63fc	__fsnotify_parent
+EXPORT_SYMBOL_GPL vmlinux 0x9924c496	__usb_get_extra_descriptor
+EXPORT_SYMBOL_GPL vmlinux 0x99286626	fuse_abort_conn
+EXPORT_SYMBOL_GPL vmlinux 0x9930ed80	__create_workqueue_key
+EXPORT_SYMBOL_GPL vmlinux 0x995d1071	prof_on
+EXPORT_SYMBOL_GPL vmlinux 0x995d38f8	attribute_container_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x9984c858	usb_unpoison_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0x99d3375b	crypto_alloc_instance2
+EXPORT_SYMBOL_GPL vmlinux 0x9a11a0fc	crypto_attr_alg_name
+EXPORT_SYMBOL_GPL vmlinux 0x9a4d1034	idle_notifier_register
+EXPORT_SYMBOL_GPL vmlinux 0x9ad56f09	usb_bulk_msg
+EXPORT_SYMBOL_GPL vmlinux 0x9ae2a3ec	pci_hp_create_module_link
+EXPORT_SYMBOL_GPL vmlinux 0x9b784fce	inet6_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x9b8b3e51	acpi_processor_ffh_cstate_probe
+EXPORT_SYMBOL_GPL vmlinux 0x9ba0501e	unregister_vt_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x9bb94403	usb_lock_device_for_reset
+EXPORT_SYMBOL_GPL vmlinux 0x9be34dea	bsg_unregister_queue
+EXPORT_SYMBOL_GPL vmlinux 0x9c0cbc89	ata_cable_sata
+EXPORT_SYMBOL_GPL vmlinux 0x9c447323	ata_sff_check_status
+EXPORT_SYMBOL_GPL vmlinux 0x9c5a5292	crypto_shash_final
+EXPORT_SYMBOL_GPL vmlinux 0x9c926be4	xfrm_audit_state_delete
+EXPORT_SYMBOL_GPL vmlinux 0x9cb18781	dm_rh_get_state
+EXPORT_SYMBOL_GPL vmlinux 0x9cb8037b	xfrm_count_enc_supported
+EXPORT_SYMBOL_GPL vmlinux 0x9d06688b	register_xenbus_watch
+EXPORT_SYMBOL_GPL vmlinux 0x9d2ac309	platform_device_add
+EXPORT_SYMBOL_GPL vmlinux 0x9d2b6a58	hpet_register_irq_handler
+EXPORT_SYMBOL_GPL vmlinux 0x9d308c4d	hrtimer_try_to_cancel
+EXPORT_SYMBOL_GPL vmlinux 0x9d381449	vfs_removexattr
+EXPORT_SYMBOL_GPL vmlinux 0x9d3850e1	gnttab_alloc_grant_references
+EXPORT_SYMBOL_GPL vmlinux 0x9d4287a7	platform_bus
+EXPORT_SYMBOL_GPL vmlinux 0x9d741a89	user_instantiate
+EXPORT_SYMBOL_GPL vmlinux 0x9da688ea	pci_disable_pcie_error_reporting
+EXPORT_SYMBOL_GPL vmlinux 0x9dca1d7c	usb_set_interface
+EXPORT_SYMBOL_GPL vmlinux 0x9dcec942	skcipher_geniv_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x9de06849	ipv6_dup_options
+EXPORT_SYMBOL_GPL vmlinux 0x9df1e5f9	scsi_internal_device_unblock
+EXPORT_SYMBOL_GPL vmlinux 0x9dfa0f9f	usb_reset_configuration
+EXPORT_SYMBOL_GPL vmlinux 0x9e01f6d4	eventfd_signal
+EXPORT_SYMBOL_GPL vmlinux 0x9e3dda60	mnt_want_write
+EXPORT_SYMBOL_GPL vmlinux 0x9e6b50ce	pm_runtime_enable
+EXPORT_SYMBOL_GPL vmlinux 0x9e711ad2	pm_qos_requirement
+EXPORT_SYMBOL_GPL vmlinux 0x9e8811d5	macvlan_handle_frame_hook
+EXPORT_SYMBOL_GPL vmlinux 0x9e95459a	transport_remove_device
+EXPORT_SYMBOL_GPL vmlinux 0x9ea08a44	__module_address
+EXPORT_SYMBOL_GPL vmlinux 0x9efc7366	cpuidle_disable_device
+EXPORT_SYMBOL_GPL vmlinux 0x9f074685	elv_register
+EXPORT_SYMBOL_GPL vmlinux 0x9f1c9fd2	fb_deferred_io_open
+EXPORT_SYMBOL_GPL vmlinux 0x9f34e098	usb_add_hcd
+EXPORT_SYMBOL_GPL vmlinux 0x9f3eca38	crypto_register_alg
+EXPORT_SYMBOL_GPL vmlinux 0x9f40a6d6	async_synchronize_full_domain
+EXPORT_SYMBOL_GPL vmlinux 0x9f4d98f2	inet_hash
+EXPORT_SYMBOL_GPL vmlinux 0x9f6aeb41	blk_queue_rq_timed_out
+EXPORT_SYMBOL_GPL vmlinux 0x9f85ed90	klist_remove
+EXPORT_SYMBOL_GPL vmlinux 0x9f944337	agp_remove_bridge
+EXPORT_SYMBOL_GPL vmlinux 0x9fce80db	fb_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x9fed8187	inet_unhash
+EXPORT_SYMBOL_GPL vmlinux 0xa0255440	net_ipv4_ctl_path
+EXPORT_SYMBOL_GPL vmlinux 0xa0686e82	ata_cable_80wire
+EXPORT_SYMBOL_GPL vmlinux 0xa07c16ae	ata_eh_thaw_port
+EXPORT_SYMBOL_GPL vmlinux 0xa0b7de80	crypto_unregister_template
+EXPORT_SYMBOL_GPL vmlinux 0xa0d10520	debugfs_create_blob
+EXPORT_SYMBOL_GPL vmlinux 0xa1091707	proc_net_remove
+EXPORT_SYMBOL_GPL vmlinux 0xa11c5004	__set_irq_handler
+EXPORT_SYMBOL_GPL vmlinux 0xa186c8f6	lookup_create
+EXPORT_SYMBOL_GPL vmlinux 0xa1b6754a	uhci_reset_hc
+EXPORT_SYMBOL_GPL vmlinux 0xa219ae66	regulator_bulk_enable
+EXPORT_SYMBOL_GPL vmlinux 0xa2294b4c	ata_pio_queue_task
+EXPORT_SYMBOL_GPL vmlinux 0xa23e6b2b	blkcipher_walk_done
+EXPORT_SYMBOL_GPL vmlinux 0xa248a773	dm_rh_recovery_prepare
+EXPORT_SYMBOL_GPL vmlinux 0xa288efcf	unregister_kretprobes
+EXPORT_SYMBOL_GPL vmlinux 0xa28d8527	usb_poison_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0xa29f2d12	rtc_set_alarm
+EXPORT_SYMBOL_GPL vmlinux 0xa2e67f08	acpi_bus_generate_proc_event4
+EXPORT_SYMBOL_GPL vmlinux 0xa307bd10	driver_find
+EXPORT_SYMBOL_GPL vmlinux 0xa353fffc	xenbus_rm
+EXPORT_SYMBOL_GPL vmlinux 0xa3e76b4b	inet6_csk_xmit
+EXPORT_SYMBOL_GPL vmlinux 0xa40a8590	input_event_to_user
+EXPORT_SYMBOL_GPL vmlinux 0xa413530f	ata_bmdma_mode_filter
+EXPORT_SYMBOL_GPL vmlinux 0xa4465963	dm_unregister_path_selector
+EXPORT_SYMBOL_GPL vmlinux 0xa452c297	hpet_mask_rtc_irq_bit
+EXPORT_SYMBOL_GPL vmlinux 0xa4849d12	crypto_aead_type
+EXPORT_SYMBOL_GPL vmlinux 0xa4a42813	vbin_printf
+EXPORT_SYMBOL_GPL vmlinux 0xa4b24ba1	usb_put_intf
+EXPORT_SYMBOL_GPL vmlinux 0xa4d58669	math_state_restore
+EXPORT_SYMBOL_GPL vmlinux 0xa4e08dca	usb_hcd_link_urb_to_ep
+EXPORT_SYMBOL_GPL vmlinux 0xa50c2f9f	class_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xa50ffe56	tty_init_termios
+EXPORT_SYMBOL_GPL vmlinux 0xa51105bf	spi_async
+EXPORT_SYMBOL_GPL vmlinux 0xa53e6027	rtc_set_mmss
+EXPORT_SYMBOL_GPL vmlinux 0xa5597e1c	cpuidle_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0xa5a2b238	sdio_writew
+EXPORT_SYMBOL_GPL vmlinux 0xa5aa55fa	destroy_workqueue
+EXPORT_SYMBOL_GPL vmlinux 0xa5acc907	relay_file_operations
+EXPORT_SYMBOL_GPL vmlinux 0xa5bf5c3e	pm_qos_add_requirement
+EXPORT_SYMBOL_GPL vmlinux 0xa5c36cec	inotify_unmount_inodes
+EXPORT_SYMBOL_GPL vmlinux 0xa5efbf4c	async_synchronize_full
+EXPORT_SYMBOL_GPL vmlinux 0xa60926cc	platform_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0xa6473125	pci_enable_rom
+EXPORT_SYMBOL_GPL vmlinux 0xa651d22f	sdio_claim_irq
+EXPORT_SYMBOL_GPL vmlinux 0xa665a7b1	srcu_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xa765601d	ata_pci_sff_init_host
+EXPORT_SYMBOL_GPL vmlinux 0xa7680fc4	do_kern_mount
+EXPORT_SYMBOL_GPL vmlinux 0xa78a2da9	platform_device_register_simple
+EXPORT_SYMBOL_GPL vmlinux 0xa78e60a3	fuse_sync_release
+EXPORT_SYMBOL_GPL vmlinux 0xa79cec1c	usb_store_new_id
+EXPORT_SYMBOL_GPL vmlinux 0xa7e6d095	agp_add_bridge
+EXPORT_SYMBOL_GPL vmlinux 0xa87ae87e	bus_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xa891a223	ata_eh_qc_retry
+EXPORT_SYMBOL_GPL vmlinux 0xa8b7ca6b	ipv6_find_tlv
+EXPORT_SYMBOL_GPL vmlinux 0xa8ca6e89	regulator_set_voltage
+EXPORT_SYMBOL_GPL vmlinux 0xa8f59416	gpio_direction_output
+EXPORT_SYMBOL_GPL vmlinux 0xa9126bff	hpet_set_rtc_irq_bit
+EXPORT_SYMBOL_GPL vmlinux 0xa9167685	blkdev_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xa94fea41	crypto_grab_skcipher
+EXPORT_SYMBOL_GPL vmlinux 0xa9816fb8	scsi_flush_work
+EXPORT_SYMBOL_GPL vmlinux 0xa9c530b8	unregister_oom_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xa9d5e788	inotify_add_watch
+EXPORT_SYMBOL_GPL vmlinux 0xaa0c6338	console_drivers
+EXPORT_SYMBOL_GPL vmlinux 0xaa17a6dc	usb_get_descriptor
+EXPORT_SYMBOL_GPL vmlinux 0xaa3e3aea	__i2c_board_lock
+EXPORT_SYMBOL_GPL vmlinux 0xaa5310f9	__tracepoint_napi_poll
+EXPORT_SYMBOL_GPL vmlinux 0xaa8c4696	cpu_clock
+EXPORT_SYMBOL_GPL vmlinux 0xaa91a180	crypto_init_spawn
+EXPORT_SYMBOL_GPL vmlinux 0xaaa530c3	regulator_get
+EXPORT_SYMBOL_GPL vmlinux 0xaac98eb5	scsi_register_device_handler
+EXPORT_SYMBOL_GPL vmlinux 0xaad47370	crypto_init_ahash_spawn
+EXPORT_SYMBOL_GPL vmlinux 0xaaddf6ca	blocking_notifier_chain_cond_register
+EXPORT_SYMBOL_GPL vmlinux 0xaae8e85e	acpi_ec_add_query_handler
+EXPORT_SYMBOL_GPL vmlinux 0xaaf0eddb	debugfs_create_x16
+EXPORT_SYMBOL_GPL vmlinux 0xaaf253a0	class_dev_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0xab01acbe	gnttab_request_free_callback
+EXPORT_SYMBOL_GPL vmlinux 0xab2c5681	gpiochip_add
+EXPORT_SYMBOL_GPL vmlinux 0xab57e311	tracepoint_probe_register
+EXPORT_SYMBOL_GPL vmlinux 0xab67f0f3	anon_transport_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xab69b31f	save_stack_trace_tsk
+EXPORT_SYMBOL_GPL vmlinux 0xab707c8e	scsi_internal_device_block
+EXPORT_SYMBOL_GPL vmlinux 0xaba8ea48	usb_unpoison_urb
+EXPORT_SYMBOL_GPL vmlinux 0xac8e3b2f	usb_ep0_reinit
+EXPORT_SYMBOL_GPL vmlinux 0xaca2d970	usb_hcd_resume_root_hub
+EXPORT_SYMBOL_GPL vmlinux 0xacafa8e7	vector_used_by_percpu_irq
+EXPORT_SYMBOL_GPL vmlinux 0xacb71686	usb_unlink_urb
+EXPORT_SYMBOL_GPL vmlinux 0xacbc35db	__inet_hash_nolisten
+EXPORT_SYMBOL_GPL vmlinux 0xacc19485	ibft_addr
+EXPORT_SYMBOL_GPL vmlinux 0xaccf754e	sysfs_create_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0xace5c0fc	usb_bus_list
+EXPORT_SYMBOL_GPL vmlinux 0xad096363	xenbus_printf
+EXPORT_SYMBOL_GPL vmlinux 0xad18f941	__inet_twsk_hashdance
+EXPORT_SYMBOL_GPL vmlinux 0xad792548	pci_create_slot
+EXPORT_SYMBOL_GPL vmlinux 0xad927df0	ring_buffer_iter_peek
+EXPORT_SYMBOL_GPL vmlinux 0xada76147	__rtnl_link_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xaddc6dd7	tty_encode_baud_rate
+EXPORT_SYMBOL_GPL vmlinux 0xadf3aa47	inet_twsk_purge
+EXPORT_SYMBOL_GPL vmlinux 0xae0c87ee	pm_qos_remove_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xae528a75	srcu_read_lock
+EXPORT_SYMBOL_GPL vmlinux 0xae6d3fc9	sata_link_resume
+EXPORT_SYMBOL_GPL vmlinux 0xae8e9d00	ata_cable_40wire
+EXPORT_SYMBOL_GPL vmlinux 0xaeb2c45c	fuse_conn_init
+EXPORT_SYMBOL_GPL vmlinux 0xaed831be	rtc_alarm_irq_enable
+EXPORT_SYMBOL_GPL vmlinux 0xaf3f6fe0	ata_sff_interrupt
+EXPORT_SYMBOL_GPL vmlinux 0xaf5eb06d	crypto_alloc_base
+EXPORT_SYMBOL_GPL vmlinux 0xaf75725f	input_ff_create
+EXPORT_SYMBOL_GPL vmlinux 0xaf8a4c74	inotify_rm_wd
+EXPORT_SYMBOL_GPL vmlinux 0xafa9bc79	ata_dummy_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0xafc7c996	usb_unlink_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0xafe845e8	iommu_attach_device
+EXPORT_SYMBOL_GPL vmlinux 0xafefd48e	ata_dev_next
+EXPORT_SYMBOL_GPL vmlinux 0xb0223109	klist_next
+EXPORT_SYMBOL_GPL vmlinux 0xb0348a4f	rt_mutex_trylock
+EXPORT_SYMBOL_GPL vmlinux 0xb08e5620	simple_attr_release
+EXPORT_SYMBOL_GPL vmlinux 0xb0aa812e	fips_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xb0ac5ea0	led_trigger_register_simple
+EXPORT_SYMBOL_GPL vmlinux 0xb0cf522f	devres_get
+EXPORT_SYMBOL_GPL vmlinux 0xb0eedea9	usb_wait_anchor_empty_timeout
+EXPORT_SYMBOL_GPL vmlinux 0xb104c61e	ata_sff_exec_command
+EXPORT_SYMBOL_GPL vmlinux 0xb10d55bc	cn_netlink_send
+EXPORT_SYMBOL_GPL vmlinux 0xb131ff95	pci_stop_bus_device
+EXPORT_SYMBOL_GPL vmlinux 0xb13239b6	anon_inode_getfd
+EXPORT_SYMBOL_GPL vmlinux 0xb15c20c5	ata_port_freeze
+EXPORT_SYMBOL_GPL vmlinux 0xb16f8453	uart_console_write
+EXPORT_SYMBOL_GPL vmlinux 0xb18429eb	suspend_device_irqs
+EXPORT_SYMBOL_GPL vmlinux 0xb1acbcce	rcu_barrier_sched
+EXPORT_SYMBOL_GPL vmlinux 0xb1e3a2d6	regulator_get_voltage
+EXPORT_SYMBOL_GPL vmlinux 0xb219e9b7	dm_region_hash_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xb21d19bb	ata_eh_analyze_ncq_error
+EXPORT_SYMBOL_GPL vmlinux 0xb29f433d	register_posix_clock
+EXPORT_SYMBOL_GPL vmlinux 0xb2b42d83	dev_attr_sw_activity
+EXPORT_SYMBOL_GPL vmlinux 0xb2fab611	rdev_get_dev
+EXPORT_SYMBOL_GPL vmlinux 0xb320cf44	sata_link_debounce
+EXPORT_SYMBOL_GPL vmlinux 0xb3253ed9	hpet_rtc_timer_init
+EXPORT_SYMBOL_GPL vmlinux 0xb33b0067	pci_block_user_cfg_access
+EXPORT_SYMBOL_GPL vmlinux 0xb34b37d7	sata_pmp_qc_defer_cmd_switch
+EXPORT_SYMBOL_GPL vmlinux 0xb37fd83b	ata_pci_sff_activate_host
+EXPORT_SYMBOL_GPL vmlinux 0xb38e9a9c	class_interface_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xb3ba5c02	vfs_test_lock
+EXPORT_SYMBOL_GPL vmlinux 0xb42f2903	relay_close
+EXPORT_SYMBOL_GPL vmlinux 0xb42f491f	inet_ctl_sock_create
+EXPORT_SYMBOL_GPL vmlinux 0xb43dc474	inet_csk_bind_conflict
+EXPORT_SYMBOL_GPL vmlinux 0xb4534729	regulator_set_mode
+EXPORT_SYMBOL_GPL vmlinux 0xb482d36e	crypto_register_template
+EXPORT_SYMBOL_GPL vmlinux 0xb4960db2	ata_sff_hsm_move
+EXPORT_SYMBOL_GPL vmlinux 0xb49b346a	apply_to_page_range
+EXPORT_SYMBOL_GPL vmlinux 0xb4e14553	gnttab_query_foreign_access
+EXPORT_SYMBOL_GPL vmlinux 0xb4ea7cf7	kgdb_connected
+EXPORT_SYMBOL_GPL vmlinux 0xb50bfaca	regulator_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xb5100fec	dm_path_uevent
+EXPORT_SYMBOL_GPL vmlinux 0xb51fbd64	edac_op_state
+EXPORT_SYMBOL_GPL vmlinux 0xb53ae573	cpu_idle_wait
+EXPORT_SYMBOL_GPL vmlinux 0xb58dcfa2	synchronize_sched_expedited
+EXPORT_SYMBOL_GPL vmlinux 0xb5a0275b	devres_release_group
+EXPORT_SYMBOL_GPL vmlinux 0xb5a6ebe2	wmi_remove_notify_handler
+EXPORT_SYMBOL_GPL vmlinux 0xb5c69426	sata_scr_read
+EXPORT_SYMBOL_GPL vmlinux 0xb612444d	snmp_mib_init
+EXPORT_SYMBOL_GPL vmlinux 0xb6230f1f	gnttab_grant_foreign_access
+EXPORT_SYMBOL_GPL vmlinux 0xb6247301	blkdev_aio_write
+EXPORT_SYMBOL_GPL vmlinux 0xb62e3e9d	xfrm_audit_state_add
+EXPORT_SYMBOL_GPL vmlinux 0xb6416c0d	__srcu_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xb65091b3	selinux_secmark_refcount_dec
+EXPORT_SYMBOL_GPL vmlinux 0xb66f9f1c	dm_rh_recovery_start
+EXPORT_SYMBOL_GPL vmlinux 0xb6aeb661	ata_id_c_string
+EXPORT_SYMBOL_GPL vmlinux 0xb71615f3	tcp_slow_start
+EXPORT_SYMBOL_GPL vmlinux 0xb718f2f9	sfi_table_parse
+EXPORT_SYMBOL_GPL vmlinux 0xb73c90b4	xenbus_dev_fatal
+EXPORT_SYMBOL_GPL vmlinux 0xb744fa43	xfrm_ealg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0xb760aaa7	usb_set_device_state
+EXPORT_SYMBOL_GPL vmlinux 0xb7918e19	usb_control_msg
+EXPORT_SYMBOL_GPL vmlinux 0xb7931560	inet_csk_get_port
+EXPORT_SYMBOL_GPL vmlinux 0xb795637c	regulator_is_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xb7d7c12e	hpet_set_alarm_time
+EXPORT_SYMBOL_GPL vmlinux 0xb7e2eb91	mce_cpu_specific_poll
+EXPORT_SYMBOL_GPL vmlinux 0xb7fc2f64	usb_driver_release_interface
+EXPORT_SYMBOL_GPL vmlinux 0xb7fdd0df	eventfd_ctx_put
+EXPORT_SYMBOL_GPL vmlinux 0xb815e909	dm_register_path_selector
+EXPORT_SYMBOL_GPL vmlinux 0xb841bf22	cpuidle_unregister_device
+EXPORT_SYMBOL_GPL vmlinux 0xb858b265	debugfs_remove
+EXPORT_SYMBOL_GPL vmlinux 0xb87dd3df	kobject_create_and_add
+EXPORT_SYMBOL_GPL vmlinux 0xb8baa9e2	skb_tstamp_tx
+EXPORT_SYMBOL_GPL vmlinux 0xb8d8958d	securityfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xb903674c	scatterwalk_map_and_copy
+EXPORT_SYMBOL_GPL vmlinux 0xb92d5c88	driver_add_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xb9397589	part_round_stats
+EXPORT_SYMBOL_GPL vmlinux 0xb94db510	register_jprobe
+EXPORT_SYMBOL_GPL vmlinux 0xb99d5837	xenbus_read
+EXPORT_SYMBOL_GPL vmlinux 0xb9b9c1b4	usb_free_urb
+EXPORT_SYMBOL_GPL vmlinux 0xb9e52dbf	pci_cleanup_aer_uncorrect_error_status
+EXPORT_SYMBOL_GPL vmlinux 0xb9eb3aa9	add_uevent_var
+EXPORT_SYMBOL_GPL vmlinux 0xb9f8736a	pm_request_resume
+EXPORT_SYMBOL_GPL vmlinux 0xba06c695	pm_runtime_suspend
+EXPORT_SYMBOL_GPL vmlinux 0xba30d904	regulator_set_optimum_mode
+EXPORT_SYMBOL_GPL vmlinux 0xba57a9ec	blk_queue_lld_busy
+EXPORT_SYMBOL_GPL vmlinux 0xba8979e4	class_compat_register
+EXPORT_SYMBOL_GPL vmlinux 0xbaa6d11b	ata_std_bios_param
+EXPORT_SYMBOL_GPL vmlinux 0xbac57201	ring_buffer_overruns
+EXPORT_SYMBOL_GPL vmlinux 0xbae34c27	scsi_nl_remove_transport
+EXPORT_SYMBOL_GPL vmlinux 0xbae42212	pci_disable_sriov
+EXPORT_SYMBOL_GPL vmlinux 0xbb08e82f	ata_sff_data_xfer_noirq
+EXPORT_SYMBOL_GPL vmlinux 0xbb39b726	ata_bmdma32_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0xbb3a3268	tracepoint_iter_start
+EXPORT_SYMBOL_GPL vmlinux 0xbb4a1408	klist_init
+EXPORT_SYMBOL_GPL vmlinux 0xbb7ecba1	ata_link_next
+EXPORT_SYMBOL_GPL vmlinux 0xbb802181	kobject_init_and_add
+EXPORT_SYMBOL_GPL vmlinux 0xbbb98859	edid_info
+EXPORT_SYMBOL_GPL vmlinux 0xbbcc8be3	spi_register_master
+EXPORT_SYMBOL_GPL vmlinux 0xbbd26fce	xattr_getsecurity
+EXPORT_SYMBOL_GPL vmlinux 0xbc0760a4	relay_reset
+EXPORT_SYMBOL_GPL vmlinux 0xbc46d5fd	usb_match_id
+EXPORT_SYMBOL_GPL vmlinux 0xbc4ac256	dm_rh_region_to_sector
+EXPORT_SYMBOL_GPL vmlinux 0xbc6ba3aa	scsi_eh_ready_devs
+EXPORT_SYMBOL_GPL vmlinux 0xbcac4276	ip6_local_out
+EXPORT_SYMBOL_GPL vmlinux 0xbd09b571	ata_host_register
+EXPORT_SYMBOL_GPL vmlinux 0xbd184340	relay_open
+EXPORT_SYMBOL_GPL vmlinux 0xbd1bc65b	pci_add_dynid
+EXPORT_SYMBOL_GPL vmlinux 0xbd506a46	unregister_hotplug_dock_device
+EXPORT_SYMBOL_GPL vmlinux 0xbdd295f0	trace_vprintk
+EXPORT_SYMBOL_GPL vmlinux 0xbddbe90d	disk_part_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0xbdf996cd	ata_sff_postreset
+EXPORT_SYMBOL_GPL vmlinux 0xbe116723	do_posix_clock_nosettime
+EXPORT_SYMBOL_GPL vmlinux 0xbe1887e4	ata_unpack_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0xbe1ed72b	usb_anchor_urb
+EXPORT_SYMBOL_GPL vmlinux 0xbe608951	smp_ops
+EXPORT_SYMBOL_GPL vmlinux 0xbe7889b1	sata_sff_hardreset
+EXPORT_SYMBOL_GPL vmlinux 0xbe851485	__pneigh_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xbeb4cb93	bus_for_each_drv
+EXPORT_SYMBOL_GPL vmlinux 0xbef8a262	pcie_port_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0xbf56ad1b	dm_rh_flush
+EXPORT_SYMBOL_GPL vmlinux 0xbf74eb20	probe_kernel_write
+EXPORT_SYMBOL_GPL vmlinux 0xbf8f237a	raw_seq_next
+EXPORT_SYMBOL_GPL vmlinux 0xbfa5f898	tty_perform_flush
+EXPORT_SYMBOL_GPL vmlinux 0xbfbb1aad	ata_do_dev_read_id
+EXPORT_SYMBOL_GPL vmlinux 0xbfbf1d80	ata_sff_pause
+EXPORT_SYMBOL_GPL vmlinux 0xbfd94bb0	bind_virq_to_irqhandler
+EXPORT_SYMBOL_GPL vmlinux 0xbffde8ec	compat_alloc_user_space
+EXPORT_SYMBOL_GPL vmlinux 0xc00f413d	driver_register
+EXPORT_SYMBOL_GPL vmlinux 0xc0a72b6b	inotify_dentry_parent_queue_event
+EXPORT_SYMBOL_GPL vmlinux 0xc12414e5	pci_find_next_capability
+EXPORT_SYMBOL_GPL vmlinux 0xc126e890	klist_del
+EXPORT_SYMBOL_GPL vmlinux 0xc12f7e0d	trace_profile_buf_nmi
+EXPORT_SYMBOL_GPL vmlinux 0xc136d9da	usb_submit_urb
+EXPORT_SYMBOL_GPL vmlinux 0xc156b663	md_do_sync
+EXPORT_SYMBOL_GPL vmlinux 0xc17515d7	usb_hcds_loaded
+EXPORT_SYMBOL_GPL vmlinux 0xc175f4f5	__module_text_address
+EXPORT_SYMBOL_GPL vmlinux 0xc213f313	ring_buffer_read
+EXPORT_SYMBOL_GPL vmlinux 0xc22a3091	vm_unmap_aliases
+EXPORT_SYMBOL_GPL vmlinux 0xc22d3a34	regulator_get_exclusive
+EXPORT_SYMBOL_GPL vmlinux 0xc238c221	fib_rules_register
+EXPORT_SYMBOL_GPL vmlinux 0xc26351f8	bind_evtchn_to_irq
+EXPORT_SYMBOL_GPL vmlinux 0xc3014865	security_inode_create
+EXPORT_SYMBOL_GPL vmlinux 0xc3301f02	rcu_expedited_torture_stats
+EXPORT_SYMBOL_GPL vmlinux 0xc34203bb	cpufreq_register_governor
+EXPORT_SYMBOL_GPL vmlinux 0xc34efe27	snmp_fold_field
+EXPORT_SYMBOL_GPL vmlinux 0xc399468f	scsi_nl_remove_driver
+EXPORT_SYMBOL_GPL vmlinux 0xc39f3e6c	crypto_lookup_template
+EXPORT_SYMBOL_GPL vmlinux 0xc4034caa	enable_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0xc40f2959	usb_sg_cancel
+EXPORT_SYMBOL_GPL vmlinux 0xc4118e57	__pm_runtime_disable
+EXPORT_SYMBOL_GPL vmlinux 0xc428068d	sata_deb_timing_long
+EXPORT_SYMBOL_GPL vmlinux 0xc42f2f94	xenbus_read_driver_state
+EXPORT_SYMBOL_GPL vmlinux 0xc48b7ccf	ata_mode_string
+EXPORT_SYMBOL_GPL vmlinux 0xc4b33aa6	tracepoint_probe_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xc4ce6189	idle_notifier_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xc4d3e76d	xenbus_grant_ring
+EXPORT_SYMBOL_GPL vmlinux 0xc50393df	regulator_get_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0xc512626a	__supported_pte_mask
+EXPORT_SYMBOL_GPL vmlinux 0xc52ac5c4	mnt_drop_write
+EXPORT_SYMBOL_GPL vmlinux 0xc5397da6	xenbus_mkdir
+EXPORT_SYMBOL_GPL vmlinux 0xc544c01f	ring_buffer_write
+EXPORT_SYMBOL_GPL vmlinux 0xc561fff8	fuse_direct_io
+EXPORT_SYMBOL_GPL vmlinux 0xc58eb212	set_cpus_allowed_ptr
+EXPORT_SYMBOL_GPL vmlinux 0xc60f75ec	__ftrace_vprintk
+EXPORT_SYMBOL_GPL vmlinux 0xc6252011	driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xc6724081	kobject_rename
+EXPORT_SYMBOL_GPL vmlinux 0xc673e23e	ata_scsi_change_queue_depth
+EXPORT_SYMBOL_GPL vmlinux 0xc6d9dd4e	vma_kernel_pagesize
+EXPORT_SYMBOL_GPL vmlinux 0xc6e2b37a	mmu_notifier_register
+EXPORT_SYMBOL_GPL vmlinux 0xc76fdfb3	sysdev_store_int
+EXPORT_SYMBOL_GPL vmlinux 0xc78984e3	attribute_container_register
+EXPORT_SYMBOL_GPL vmlinux 0xc7aedf1a	scsi_target_unblock
+EXPORT_SYMBOL_GPL vmlinux 0xc7bff67e	shash_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0xc7ec11f6	atomic_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xc7ed43f9	hvc_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xc8254262	blk_end_request_err
+EXPORT_SYMBOL_GPL vmlinux 0xc87c1f84	ktime_get
+EXPORT_SYMBOL_GPL vmlinux 0xc87e487a	sched_clock_idle_sleep_event
+EXPORT_SYMBOL_GPL vmlinux 0xc94c1a4d	register_ftrace_event
+EXPORT_SYMBOL_GPL vmlinux 0xc9561772	fb_destroy_modelist
+EXPORT_SYMBOL_GPL vmlinux 0xc9c210e8	inet_diag_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xc9d4b23f	kernel_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xc9d4d6d1	wmi_has_guid
+EXPORT_SYMBOL_GPL vmlinux 0xc9ec4e21	free_percpu
+EXPORT_SYMBOL_GPL vmlinux 0xca01f51c	tcp_orphan_count
+EXPORT_SYMBOL_GPL vmlinux 0xca0701e4	devres_remove_group
+EXPORT_SYMBOL_GPL vmlinux 0xca295f03	led_trigger_event
+EXPORT_SYMBOL_GPL vmlinux 0xca81ea9a	xenbus_transaction_end
+EXPORT_SYMBOL_GPL vmlinux 0xca85d8cf	tracepoint_probe_update_all
+EXPORT_SYMBOL_GPL vmlinux 0xca8db48d	find_get_pid
+EXPORT_SYMBOL_GPL vmlinux 0xcaae1e7d	sata_link_hardreset
+EXPORT_SYMBOL_GPL vmlinux 0xcab3abea	pciserial_init_ports
+EXPORT_SYMBOL_GPL vmlinux 0xcabe04de	cpuidle_resume_and_unlock
+EXPORT_SYMBOL_GPL vmlinux 0xcacdc03b	remove_irq
+EXPORT_SYMBOL_GPL vmlinux 0xcb3079d1	dm_put
+EXPORT_SYMBOL_GPL vmlinux 0xcbf202df	driver_for_each_device
+EXPORT_SYMBOL_GPL vmlinux 0xcc1f1c3d	inet_twdr_hangman
+EXPORT_SYMBOL_GPL vmlinux 0xcc6ab305	is_dock_device
+EXPORT_SYMBOL_GPL vmlinux 0xcc83d0db	__pci_reset_function
+EXPORT_SYMBOL_GPL vmlinux 0xccb3fc48	tracepoint_iter_reset
+EXPORT_SYMBOL_GPL vmlinux 0xcccfb2fa	sata_deb_timing_hotplug
+EXPORT_SYMBOL_GPL vmlinux 0xcd1ca2cb	iommu_domain_has_cap
+EXPORT_SYMBOL_GPL vmlinux 0xcda7eb6b	swiotlb_map_page
+EXPORT_SYMBOL_GPL vmlinux 0xcdb8547e	ring_buffer_iter_reset
+EXPORT_SYMBOL_GPL vmlinux 0xcdca3691	nr_irqs
+EXPORT_SYMBOL_GPL vmlinux 0xcdce59a5	ata_port_probe
+EXPORT_SYMBOL_GPL vmlinux 0xcdd79cab	bus_for_each_dev
+EXPORT_SYMBOL_GPL vmlinux 0xce310761	pci_intx
+EXPORT_SYMBOL_GPL vmlinux 0xce34fd32	devm_kzalloc
+EXPORT_SYMBOL_GPL vmlinux 0xce61006c	register_net_sysctl_table
+EXPORT_SYMBOL_GPL vmlinux 0xceae11e0	inet_csk_compat_getsockopt
+EXPORT_SYMBOL_GPL vmlinux 0xceb24a2a	get_cpu_sysdev
+EXPORT_SYMBOL_GPL vmlinux 0xcf2fd976	tracepoint_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0xcf563700	usb_get_hcd
+EXPORT_SYMBOL_GPL vmlinux 0xcf7a962e	cn_add_callback
+EXPORT_SYMBOL_GPL vmlinux 0xcf8af983	trace_profile_buf
+EXPORT_SYMBOL_GPL vmlinux 0xcf909837	generic_drop_inode
+EXPORT_SYMBOL_GPL vmlinux 0xcfbfa60e	rtc_update_irq_enable
+EXPORT_SYMBOL_GPL vmlinux 0xcfc68341	synchronize_rcu_bh
+EXPORT_SYMBOL_GPL vmlinux 0xcfcc83ad	register_vt_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xcfdc749f	tty_wakeup
+EXPORT_SYMBOL_GPL vmlinux 0xd0352d12	inet_csk_listen_start
+EXPORT_SYMBOL_GPL vmlinux 0xd03c7700	secure_ipv4_port_ephemeral
+EXPORT_SYMBOL_GPL vmlinux 0xd03fdcc0	hrtimer_start
+EXPORT_SYMBOL_GPL vmlinux 0xd0c05159	emergency_restart
+EXPORT_SYMBOL_GPL vmlinux 0xd0d61a40	dev_attr_em_message_type
+EXPORT_SYMBOL_GPL vmlinux 0xd0f85d32	mm_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xd0fc1e13	ring_buffer_swap_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xd12d0023	mce_chrdev_ops
+EXPORT_SYMBOL_GPL vmlinux 0xd134fd42	get_driver
+EXPORT_SYMBOL_GPL vmlinux 0xd16712f3	crypto_check_attr_type
+EXPORT_SYMBOL_GPL vmlinux 0xd175ab60	pci_ioremap_bar
+EXPORT_SYMBOL_GPL vmlinux 0xd179f2fd	tty_ldisc_deref
+EXPORT_SYMBOL_GPL vmlinux 0xd18b7de0	ahash_attr_alg
+EXPORT_SYMBOL_GPL vmlinux 0xd1ba1939	acpi_pci_find_root
+EXPORT_SYMBOL_GPL vmlinux 0xd1bd2102	xfrm_audit_state_notfound
+EXPORT_SYMBOL_GPL vmlinux 0xd1cee293	dma_get_required_mask
+EXPORT_SYMBOL_GPL vmlinux 0xd1e33201	md_allow_write
+EXPORT_SYMBOL_GPL vmlinux 0xd205041e	ata_sas_port_stop
+EXPORT_SYMBOL_GPL vmlinux 0xd2116708	crypto_givcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0xd273b1b1	__round_jiffies_up_relative
+EXPORT_SYMBOL_GPL vmlinux 0xd284a7be	ring_buffer_lock_reserve
+EXPORT_SYMBOL_GPL vmlinux 0xd2a8caf0	work_on_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xd2fc29a7	usb_alloc_urb
+EXPORT_SYMBOL_GPL vmlinux 0xd315b003	scsi_target_block
+EXPORT_SYMBOL_GPL vmlinux 0xd3471369	acpi_smbus_write
+EXPORT_SYMBOL_GPL vmlinux 0xd348165a	ata_scsi_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xd3f3263e	ata_dev_disable
+EXPORT_SYMBOL_GPL vmlinux 0xd41993a4	ata_sff_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0xd44997e3	fb_bl_default_curve
+EXPORT_SYMBOL_GPL vmlinux 0xd493d9c9	pci_reset_function
+EXPORT_SYMBOL_GPL vmlinux 0xd49f4dd4	gpiochip_is_requested
+EXPORT_SYMBOL_GPL vmlinux 0xd4f7b079	scsi_nl_add_transport
+EXPORT_SYMBOL_GPL vmlinux 0xd521967e	skb_cow_data
+EXPORT_SYMBOL_GPL vmlinux 0xd5460733	ring_buffer_free_read_page
+EXPORT_SYMBOL_GPL vmlinux 0xd56e4afa	usb_get_urb
+EXPORT_SYMBOL_GPL vmlinux 0xd59351de	platform_device_put
+EXPORT_SYMBOL_GPL vmlinux 0xd5ba8d20	sysdev_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xd5c8ad5f	class_compat_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xd5f1f3b6	sdio_f0_readb
+EXPORT_SYMBOL_GPL vmlinux 0xd5f621f8	rtnl_put_cacheinfo
+EXPORT_SYMBOL_GPL vmlinux 0xd620b72a	xenbus_dev_error
+EXPORT_SYMBOL_GPL vmlinux 0xd624ba84	ring_buffer_read_finish
+EXPORT_SYMBOL_GPL vmlinux 0xd62b6993	init_user_ns
+EXPORT_SYMBOL_GPL vmlinux 0xd69cf070	__mmu_notifier_register
+EXPORT_SYMBOL_GPL vmlinux 0xd69d988e	ata_pci_bmdma_clear_simplex
+EXPORT_SYMBOL_GPL vmlinux 0xd6b103e9	crypto_register_shash
+EXPORT_SYMBOL_GPL vmlinux 0xd6c69b0c	xfrm_audit_state_icvfail
+EXPORT_SYMBOL_GPL vmlinux 0xd6cb0582	synchronize_srcu
+EXPORT_SYMBOL_GPL vmlinux 0xd6cbb428	sdio_f0_writeb
+EXPORT_SYMBOL_GPL vmlinux 0xd6dcdd7a	skb_gro_receive
+EXPORT_SYMBOL_GPL vmlinux 0xd6e15aa6	cpufreq_driver_target
+EXPORT_SYMBOL_GPL vmlinux 0xd6fc18c3	inotify_find_watch
+EXPORT_SYMBOL_GPL vmlinux 0xd6feefa5	agp_num_entries
+EXPORT_SYMBOL_GPL vmlinux 0xd7020cf1	uart_set_options
+EXPORT_SYMBOL_GPL vmlinux 0xd705b4c7	schedule_hrtimeout
+EXPORT_SYMBOL_GPL vmlinux 0xd727628a	ata_sff_prereset
+EXPORT_SYMBOL_GPL vmlinux 0xd73ef534	sysdev_resume
+EXPORT_SYMBOL_GPL vmlinux 0xd7432550	da903x_writes
+EXPORT_SYMBOL_GPL vmlinux 0xd768e985	regulator_has_full_constraints
+EXPORT_SYMBOL_GPL vmlinux 0xd7893db1	platform_driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xd7d79132	put_online_cpus
+EXPORT_SYMBOL_GPL vmlinux 0xd8b8c91f	crypto_register_ahash
+EXPORT_SYMBOL_GPL vmlinux 0xd8dd22fd	ata_sff_host_intr
+EXPORT_SYMBOL_GPL vmlinux 0xd9042fa8	scatterwalk_map
+EXPORT_SYMBOL_GPL vmlinux 0xd92fbcd4	led_trigger_set
+EXPORT_SYMBOL_GPL vmlinux 0xd9385c8f	crypto_ablkcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0xd94d5e13	crypto_alg_mod_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xd9a5c3c3	crypto_dequeue_request
+EXPORT_SYMBOL_GPL vmlinux 0xd9a6ebe0	i2c_unregister_device
+EXPORT_SYMBOL_GPL vmlinux 0xd9d5bead	usb_driver_set_configuration
+EXPORT_SYMBOL_GPL vmlinux 0xd9f825ec	tcp_reno_ssthresh
+EXPORT_SYMBOL_GPL vmlinux 0xda1be8e1	async_synchronize_cookie_domain
+EXPORT_SYMBOL_GPL vmlinux 0xda2068ee	ata_do_eh
+EXPORT_SYMBOL_GPL vmlinux 0xda29f8b0	wmi_set_block
+EXPORT_SYMBOL_GPL vmlinux 0xda39a88d	ata_common_sdev_attrs
+EXPORT_SYMBOL_GPL vmlinux 0xda546148	ata_sff_port_start
+EXPORT_SYMBOL_GPL vmlinux 0xda565ad2	da903x_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xdac774c9	__xenbus_register_frontend
+EXPORT_SYMBOL_GPL vmlinux 0xdaf4dfb3	fb_mode_option
+EXPORT_SYMBOL_GPL vmlinux 0xdb14a4c2	tty_get_pgrp
+EXPORT_SYMBOL_GPL vmlinux 0xdb274e52	monotonic_to_bootbased
+EXPORT_SYMBOL_GPL vmlinux 0xdb3fffa2	xenbus_watch_pathfmt
+EXPORT_SYMBOL_GPL vmlinux 0xdb77aac1	__mnt_is_readonly
+EXPORT_SYMBOL_GPL vmlinux 0xdb8405a2	nf_register_afinfo
+EXPORT_SYMBOL_GPL vmlinux 0xdba64f1c	eventfd_ctx_get
+EXPORT_SYMBOL_GPL vmlinux 0xdbd848ed	spi_get_device_id
+EXPORT_SYMBOL_GPL vmlinux 0xdbe41538	pci_test_config_bits
+EXPORT_SYMBOL_GPL vmlinux 0xdbf3c557	acpi_ec_remove_query_handler
+EXPORT_SYMBOL_GPL vmlinux 0xdc1f8f2e	register_timer_hook
+EXPORT_SYMBOL_GPL vmlinux 0xdc393143	regulator_count_voltages
+EXPORT_SYMBOL_GPL vmlinux 0xdc3bd177	skb_partial_csum_set
+EXPORT_SYMBOL_GPL vmlinux 0xdc47bd0b	fs_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xdc77be9e	hvc_poll
+EXPORT_SYMBOL_GPL vmlinux 0xdcd30e0f	device_attach
+EXPORT_SYMBOL_GPL vmlinux 0xdcede68b	sysdev_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0xdd15bf63	sysdev_driver_register
+EXPORT_SYMBOL_GPL vmlinux 0xddb346f4	inet6_csk_bind_conflict
+EXPORT_SYMBOL_GPL vmlinux 0xde009228	cpufreq_cpu_get
+EXPORT_SYMBOL_GPL vmlinux 0xde417b81	async_schedule_domain
+EXPORT_SYMBOL_GPL vmlinux 0xde846cf4	pci_hp_change_slot_info
+EXPORT_SYMBOL_GPL vmlinux 0xdec25558	debugfs_create_bool
+EXPORT_SYMBOL_GPL vmlinux 0xdeccd66a	ring_buffer_record_enable_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xdee00ca0	usb_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0xdf1bdb7a	usb_sg_wait
+EXPORT_SYMBOL_GPL vmlinux 0xdf2809f7	crypto_ahash_finup
+EXPORT_SYMBOL_GPL vmlinux 0xdf445388	map_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0xdf4c6435	kallsyms_on_each_symbol
+EXPORT_SYMBOL_GPL vmlinux 0xdfca5641	ata_std_postreset
+EXPORT_SYMBOL_GPL vmlinux 0xdfd6ce8b	__scsi_get_command
+EXPORT_SYMBOL_GPL vmlinux 0xdfd72a48	rtc_class_open
+EXPORT_SYMBOL_GPL vmlinux 0xdff565fb	xfrm_audit_state_replay_overflow
+EXPORT_SYMBOL_GPL vmlinux 0xe0012341	handle_level_irq
+EXPORT_SYMBOL_GPL vmlinux 0xe045c5d6	ring_buffer_free
+EXPORT_SYMBOL_GPL vmlinux 0xe061c5ab	usb_buffer_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xe089cfcc	agp_memory_reserved
+EXPORT_SYMBOL_GPL vmlinux 0xe0ae754c	crypto_mod_put
+EXPORT_SYMBOL_GPL vmlinux 0xe0bdf160	dm_get_rq_mapinfo
+EXPORT_SYMBOL_GPL vmlinux 0xe0c77bb5	mce_notify_irq
+EXPORT_SYMBOL_GPL vmlinux 0xe0cca33e	xfrm_aead_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0xe1854364	pci_sriov_migration
+EXPORT_SYMBOL_GPL vmlinux 0xe1c2b9f2	ata_host_detach
+EXPORT_SYMBOL_GPL vmlinux 0xe1dd668b	dma_release_channel
+EXPORT_SYMBOL_GPL vmlinux 0xe1e0ca57	ata_timing_compute
+EXPORT_SYMBOL_GPL vmlinux 0xe218a679	raw_seq_open
+EXPORT_SYMBOL_GPL vmlinux 0xe247343b	hrtimer_get_remaining
+EXPORT_SYMBOL_GPL vmlinux 0xe2870474	register_net_sysctl_rotable
+EXPORT_SYMBOL_GPL vmlinux 0xe295c0ff	is_hpet_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xe2cbeeba	user_describe
+EXPORT_SYMBOL_GPL vmlinux 0xe2ef9767	class_dev_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0xe350ee6d	ring_buffer_record_enable
+EXPORT_SYMBOL_GPL vmlinux 0xe3aa4891	get_net_ns_by_pid
+EXPORT_SYMBOL_GPL vmlinux 0xe3f1bfa5	ata_sg_init
+EXPORT_SYMBOL_GPL vmlinux 0xe404e4a0	usb_string
+EXPORT_SYMBOL_GPL vmlinux 0xe42ad5be	alloc_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0xe441d07c	dm_rh_delay
+EXPORT_SYMBOL_GPL vmlinux 0xe4428977	register_kprobes
+EXPORT_SYMBOL_GPL vmlinux 0xe46f7e1c	debugfs_create_x32
+EXPORT_SYMBOL_GPL vmlinux 0xe47b92db	regulator_get_current_limit
+EXPORT_SYMBOL_GPL vmlinux 0xe49a9344	usb_hc_died
+EXPORT_SYMBOL_GPL vmlinux 0xe49cb4b1	platform_device_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xe49ff3b0	ata_wait_register
+EXPORT_SYMBOL_GPL vmlinux 0xe4b15954	dm_set_device_limits
+EXPORT_SYMBOL_GPL vmlinux 0xe4c858c2	spi_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0xe4d2d0ab	i2c_new_dummy
+EXPORT_SYMBOL_GPL vmlinux 0xe4d6144d	regulator_get_init_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0xe50782a7	srcu_read_unlock
+EXPORT_SYMBOL_GPL vmlinux 0xe513afc0	cache_k8_northbridges
+EXPORT_SYMBOL_GPL vmlinux 0xe52621fc	sysdev_show_int
+EXPORT_SYMBOL_GPL vmlinux 0xe530071c	pm_qos_remove_requirement
+EXPORT_SYMBOL_GPL vmlinux 0xe58b9ac0	md_new_event
+EXPORT_SYMBOL_GPL vmlinux 0xe5a68061	dm_rh_dirty_log
+EXPORT_SYMBOL_GPL vmlinux 0xe5aff0d8	register_kretprobes
+EXPORT_SYMBOL_GPL vmlinux 0xe5d9e225	fuse_get_req
+EXPORT_SYMBOL_GPL vmlinux 0xe5e51709	usb_hcd_platform_shutdown
+EXPORT_SYMBOL_GPL vmlinux 0xe61a6d2f	gpio_unexport
+EXPORT_SYMBOL_GPL vmlinux 0xe623483e	securityfs_remove
+EXPORT_SYMBOL_GPL vmlinux 0xe62c2187	dm_rh_dec
+EXPORT_SYMBOL_GPL vmlinux 0xe630203b	device_schedule_callback_owner
+EXPORT_SYMBOL_GPL vmlinux 0xe6488b47	cpufreq_notify_transition
+EXPORT_SYMBOL_GPL vmlinux 0xe651f76e	selinux_is_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xe67427eb	sata_scr_write
+EXPORT_SYMBOL_GPL vmlinux 0xe6e8f340	device_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xe7125fe3	tty_mode_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xe744fe8c	inet_twsk_put
+EXPORT_SYMBOL_GPL vmlinux 0xe75b89c3	sdio_writel
+EXPORT_SYMBOL_GPL vmlinux 0xe7a29673	led_trigger_unregister_simple
+EXPORT_SYMBOL_GPL vmlinux 0xe7ffe877	pcpu_base_addr
+EXPORT_SYMBOL_GPL vmlinux 0xe8330866	crypto_larval_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xe862c4b7	dpm_suspend_start
+EXPORT_SYMBOL_GPL vmlinux 0xe86bdbe3	crypto_spawn_tfm
+EXPORT_SYMBOL_GPL vmlinux 0xe8b0a27c	tty_ldisc_flush
+EXPORT_SYMBOL_GPL vmlinux 0xe8ce2630	usb_mon_register
+EXPORT_SYMBOL_GPL vmlinux 0xe8e28dea	ata_host_start
+EXPORT_SYMBOL_GPL vmlinux 0xe901175f	__dev_addr_unsync
+EXPORT_SYMBOL_GPL vmlinux 0xe93e49c3	devres_free
+EXPORT_SYMBOL_GPL vmlinux 0xe9587909	usb_unregister_notify
+EXPORT_SYMBOL_GPL vmlinux 0xe9d38dbb	ata_dummy_port_info
+EXPORT_SYMBOL_GPL vmlinux 0xea065e01	task_handoff_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xea124bd1	gcd
+EXPORT_SYMBOL_GPL vmlinux 0xea418e0f	atapi_cmd_type
+EXPORT_SYMBOL_GPL vmlinux 0xea93796a	usb_unanchor_urb
+EXPORT_SYMBOL_GPL vmlinux 0xead40003	shash_ahash_digest
+EXPORT_SYMBOL_GPL vmlinux 0xeae01e45	attribute_container_find_class_device
+EXPORT_SYMBOL_GPL vmlinux 0xeae74760	scsi_nl_send_transport_msg
+EXPORT_SYMBOL_GPL vmlinux 0xeb4c1fc8	__tracepoint_block_remap
+EXPORT_SYMBOL_GPL vmlinux 0xeb4c70bb	disk_part_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0xeb630e21	crypto_register_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0xeb72461c	usb_autopm_set_interface
+EXPORT_SYMBOL_GPL vmlinux 0xec160f02	pci_msi_off
+EXPORT_SYMBOL_GPL vmlinux 0xec1a75a9	__dev_addr_sync
+EXPORT_SYMBOL_GPL vmlinux 0xec1b043e	regulator_suspend_prepare
+EXPORT_SYMBOL_GPL vmlinux 0xec2f60c0	eventfd_fget
+EXPORT_SYMBOL_GPL vmlinux 0xec60c02d	acpi_smbus_register_callback
+EXPORT_SYMBOL_GPL vmlinux 0xec67fd09	ata_bmdma_setup
+EXPORT_SYMBOL_GPL vmlinux 0xeca68672	spi_unregister_master
+EXPORT_SYMBOL_GPL vmlinux 0xed2041b9	init_dummy_netdev
+EXPORT_SYMBOL_GPL vmlinux 0xedbc6f67	gnttab_end_foreign_access
+EXPORT_SYMBOL_GPL vmlinux 0xede7f414	tcp_init_congestion_ops
+EXPORT_SYMBOL_GPL vmlinux 0xee1f9f6b	crypto_alloc_ablkcipher
+EXPORT_SYMBOL_GPL vmlinux 0xeeaba75f	ata_link_abort
+EXPORT_SYMBOL_GPL vmlinux 0xef30bfc2	ata_acpi_gtm_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0xef65883b	platform_device_register
+EXPORT_SYMBOL_GPL vmlinux 0xef6c3f70	round_jiffies_up_relative
+EXPORT_SYMBOL_GPL vmlinux 0xef99f7e8	ata_cable_unknown
+EXPORT_SYMBOL_GPL vmlinux 0xefae9cbc	platform_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xefb7c31f	transport_destroy_device
+EXPORT_SYMBOL_GPL vmlinux 0xefdd5a63	ktime_get_ts
+EXPORT_SYMBOL_GPL vmlinux 0xf010680e	bus_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xf0469f04	device_reprobe
+EXPORT_SYMBOL_GPL vmlinux 0xf0696401	acpi_pci_detect_ejectable
+EXPORT_SYMBOL_GPL vmlinux 0xf070010f	__hvc_resize
+EXPORT_SYMBOL_GPL vmlinux 0xf0880a91	crypto_shash_update
+EXPORT_SYMBOL_GPL vmlinux 0xf0b45e46	use_module
+EXPORT_SYMBOL_GPL vmlinux 0xf10e1793	ata_qc_complete
+EXPORT_SYMBOL_GPL vmlinux 0xf11e8c14	raw_unhash_sk
+EXPORT_SYMBOL_GPL vmlinux 0xf184d189	kernel_power_off
+EXPORT_SYMBOL_GPL vmlinux 0xf19fa611	scsi_schedule_eh
+EXPORT_SYMBOL_GPL vmlinux 0xf279725f	free_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0xf2bc822e	bus_find_device_by_name
+EXPORT_SYMBOL_GPL vmlinux 0xf2e129d5	ring_buffer_consume
+EXPORT_SYMBOL_GPL vmlinux 0xf2fca922	uart_parse_options
+EXPORT_SYMBOL_GPL vmlinux 0xf31f6128	spi_alloc_master
+EXPORT_SYMBOL_GPL vmlinux 0xf34806ec	hrtimer_get_res
+EXPORT_SYMBOL_GPL vmlinux 0xf3c1c0a0	leds_list_lock
+EXPORT_SYMBOL_GPL vmlinux 0xf44c39f7	platform_device_add_resources
+EXPORT_SYMBOL_GPL vmlinux 0xf45424e5	netlink_has_listeners
+EXPORT_SYMBOL_GPL vmlinux 0xf499fdb2	rcu_barrier_bh
+EXPORT_SYMBOL_GPL vmlinux 0xf4a8385f	iommu_domain_free
+EXPORT_SYMBOL_GPL vmlinux 0xf4ea62d9	tcp_register_congestion_control
+EXPORT_SYMBOL_GPL vmlinux 0xf5072d4e	page_cache_sync_readahead
+EXPORT_SYMBOL_GPL vmlinux 0xf52c643c	rtnl_link_register
+EXPORT_SYMBOL_GPL vmlinux 0xf5384ac1	__trace_printk
+EXPORT_SYMBOL_GPL vmlinux 0xf53adbd2	ata_sff_lost_interrupt
+EXPORT_SYMBOL_GPL vmlinux 0xf540b5aa	devres_remove
+EXPORT_SYMBOL_GPL vmlinux 0xf54bd49b	lcm
+EXPORT_SYMBOL_GPL vmlinux 0xf553318d	cpuidle_pause_and_lock
+EXPORT_SYMBOL_GPL vmlinux 0xf5799f7a	stop_machine_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xf582bc80	blkcipher_walk_virt_block
+EXPORT_SYMBOL_GPL vmlinux 0xf589b391	inet_twdr_twkill_work
+EXPORT_SYMBOL_GPL vmlinux 0xf58c2701	swiotlb_unmap_page
+EXPORT_SYMBOL_GPL vmlinux 0xf5945bac	gnttab_free_grant_references
+EXPORT_SYMBOL_GPL vmlinux 0xf597d394	dev_attr_em_message
+EXPORT_SYMBOL_GPL vmlinux 0xf5a691cd	invalidate_bh_lrus
+EXPORT_SYMBOL_GPL vmlinux 0xf5c01ddf	driver_find_device
+EXPORT_SYMBOL_GPL vmlinux 0xf5dfeb96	crypto_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0xf5f31b1c	dequeue_signal
+EXPORT_SYMBOL_GPL vmlinux 0xf61e43bf	class_compat_remove_link
+EXPORT_SYMBOL_GPL vmlinux 0xf68182f1	ip6_dst_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xf6bcbd73	hwrng_register
+EXPORT_SYMBOL_GPL vmlinux 0xf6c5f396	class_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xf6e874f5	ata_timing_merge
+EXPORT_SYMBOL_GPL vmlinux 0xf7016530	xenbus_gather
+EXPORT_SYMBOL_GPL vmlinux 0xf7937d56	srcu_batches_completed
+EXPORT_SYMBOL_GPL vmlinux 0xf79bc8ec	__root_device_register
+EXPORT_SYMBOL_GPL vmlinux 0xf7a8a150	tcp_cong_avoid_ai
+EXPORT_SYMBOL_GPL vmlinux 0xf84c4cf0	blk_queue_dma_drain
+EXPORT_SYMBOL_GPL vmlinux 0xf8802492	print_stack_trace
+EXPORT_SYMBOL_GPL vmlinux 0xf885c1a2	usb_get_from_anchor
+EXPORT_SYMBOL_GPL vmlinux 0xf8dc68b3	preempt_notifier_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xf8e8262a	scsi_dh_set_params
+EXPORT_SYMBOL_GPL vmlinux 0xf8f3a0fb	ata_ratelimit
+EXPORT_SYMBOL_GPL vmlinux 0xf920ccf8	mmu_notifier_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xf94793ce	inotify_rm_watch
+EXPORT_SYMBOL_GPL vmlinux 0xf9765833	dmi_match
+EXPORT_SYMBOL_GPL vmlinux 0xf97666a0	set_memory_rw
+EXPORT_SYMBOL_GPL vmlinux 0xf9a054b5	__round_jiffies
+EXPORT_SYMBOL_GPL vmlinux 0xf9ca3160	ata_id_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0xfa0c1c84	device_create_vargs
+EXPORT_SYMBOL_GPL vmlinux 0xfa1c0f47	inet6_csk_addr2sockaddr
+EXPORT_SYMBOL_GPL vmlinux 0xfa1f4662	scatterwalk_start
+EXPORT_SYMBOL_GPL vmlinux 0xfa45bdac	sysdev_class_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xfa801799	locks_release_private
+EXPORT_SYMBOL_GPL vmlinux 0xfb388461	debugfs_create_dir
+EXPORT_SYMBOL_GPL vmlinux 0xfb882fb7	wmi_query_block
+EXPORT_SYMBOL_GPL vmlinux 0xfbf9be5d	register_oom_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xfbfbad3e	inotify_inode_is_dead
+EXPORT_SYMBOL_GPL vmlinux 0xfbfd393d	blk_rq_check_limits
+EXPORT_SYMBOL_GPL vmlinux 0xfc1d45a5	usb_buffer_free
+EXPORT_SYMBOL_GPL vmlinux 0xfc2b6a9f	spi_add_device
+EXPORT_SYMBOL_GPL vmlinux 0xfc5766a5	crypto_enqueue_request
+EXPORT_SYMBOL_GPL vmlinux 0xfcaa9a80	ring_buffer_entries
+EXPORT_SYMBOL_GPL vmlinux 0xfcb0fd8a	user_match
+EXPORT_SYMBOL_GPL vmlinux 0xfccd0a07	tcp_reno_min_cwnd
+EXPORT_SYMBOL_GPL vmlinux 0xfcef4631	clockevent_delta2ns
+EXPORT_SYMBOL_GPL vmlinux 0xfd51b281	gnttab_end_foreign_access_ref
+EXPORT_SYMBOL_GPL vmlinux 0xfd55c1d4	ata_sff_data_xfer32
+EXPORT_SYMBOL_GPL vmlinux 0xfdd59511	fuse_conn_put
+EXPORT_SYMBOL_GPL vmlinux 0xfde0b92c	crypto_larval_error
+EXPORT_SYMBOL_GPL vmlinux 0xfe37e54a	crypto_aead_setauthsize
+EXPORT_SYMBOL_GPL vmlinux 0xfe40986d	tty_prepare_flip_string_flags
+EXPORT_SYMBOL_GPL vmlinux 0xfe727411	get_phys_to_machine
+EXPORT_SYMBOL_GPL vmlinux 0xfe93e366	kobject_uevent
+EXPORT_SYMBOL_GPL vmlinux 0xfe990052	gpio_free
+EXPORT_SYMBOL_GPL vmlinux 0xfed11ed1	usb_mon_deregister
+EXPORT_SYMBOL_GPL vmlinux 0xfedb5327	devres_find
+EXPORT_SYMBOL_GPL vmlinux 0xfeef9f6f	bus_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xfefa2adb	input_ff_effect_from_user
+EXPORT_SYMBOL_GPL vmlinux 0xff03c03d	k_handler
+EXPORT_SYMBOL_GPL vmlinux 0xff48c4ac	fsstack_copy_inode_size
+EXPORT_SYMBOL_GPL vmlinux 0xff5a8cfe	cn_del_callback
+EXPORT_SYMBOL_GPL vmlinux 0xff99221b	inet_csk_compat_setsockopt
+EXPORT_SYMBOL_GPL vmlinux 0xffa2a482	crypto_unregister_shash
+EXPORT_SYMBOL_GPL vmlinux 0xffe4a7ca	ring_buffer_discard_commit
+EXPORT_SYMBOL_GPL vmlinux 0xfff9036b	ring_buffer_empty_cpu
+EXPORT_UNUSED_SYMBOL vmlinux 0x00000000	simple_prepare_write
--- linux-mvl-dove-2.6.32.orig/debian.master/abi/2.6.32-34.73/amd64/generic
+++ linux-mvl-dove-2.6.32/debian.master/abi/2.6.32-34.73/amd64/generic
@@ -0,0 +1,10349 @@
+EXPORT_SYMBOL arch/x86/kvm/kvm 0x24fd4a7a	kvm_cpu_has_pending_timer
+EXPORT_SYMBOL arch/x86/kvm/kvm 0x610075bd	kvm_read_guest_atomic
+EXPORT_SYMBOL crypto/gf128mul 0x0c2f123f	gf128mul_4k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x1068004b	gf128mul_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x2f2889a0	gf128mul_init_64k_lle
+EXPORT_SYMBOL crypto/gf128mul 0x3755f990	gf128mul_init_64k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x384ef9ce	gf128mul_64k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x56af0dbd	gf128mul_x_ble
+EXPORT_SYMBOL crypto/gf128mul 0x83581089	gf128mul_init_4k_lle
+EXPORT_SYMBOL crypto/gf128mul 0x9b2560b9	gf128mul_init_4k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x9e13f6f6	gf128mul_lle
+EXPORT_SYMBOL crypto/gf128mul 0xbd17a0df	gf128mul_4k_lle
+EXPORT_SYMBOL crypto/gf128mul 0xc0890413	gf128mul_64k_lle
+EXPORT_SYMBOL crypto/gf128mul 0xd60736ec	gf128mul_free_64k
+EXPORT_SYMBOL crypto/xor 0x5b6c00e6	xor_blocks
+EXPORT_SYMBOL drivers/acpi/video 0x7a45377b	acpi_video_unregister
+EXPORT_SYMBOL drivers/acpi/video 0x8826c13b	acpi_video_register
+EXPORT_SYMBOL drivers/atm/suni 0x4fc83196	suni_init
+EXPORT_SYMBOL drivers/atm/uPD98402 0x91a5fb16	uPD98402_init
+EXPORT_SYMBOL drivers/block/paride/paride 0x1e546445	pi_init
+EXPORT_SYMBOL drivers/block/paride/paride 0x291ca06e	pi_read_block
+EXPORT_SYMBOL drivers/block/paride/paride 0x59af8d33	pi_connect
+EXPORT_SYMBOL drivers/block/paride/paride 0x877b6bc1	pi_release
+EXPORT_SYMBOL drivers/block/paride/paride 0x9cae3f1e	paride_register
+EXPORT_SYMBOL drivers/block/paride/paride 0xa08db81d	pi_schedule_claimed
+EXPORT_SYMBOL drivers/block/paride/paride 0xc0a288c7	pi_do_claimed
+EXPORT_SYMBOL drivers/block/paride/paride 0xd1024898	pi_read_regr
+EXPORT_SYMBOL drivers/block/paride/paride 0xd39500f0	pi_disconnect
+EXPORT_SYMBOL drivers/block/paride/paride 0xe0a6e0e3	paride_unregister
+EXPORT_SYMBOL drivers/block/paride/paride 0xf481afe1	pi_write_block
+EXPORT_SYMBOL drivers/block/paride/paride 0xfe135228	pi_write_regr
+EXPORT_SYMBOL drivers/char/agp/intel-agp 0x7b9a6116	intel_agp_enabled
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x0177f5c8	ipmi_unregister_smi
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x14974879	ipmi_destroy_user
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x15b255cf	ipmi_register_for_cmd
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x26ff333f	ipmi_free_recv_msg
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x2908b9b7	ipmi_smi_watcher_unregister
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x30127ee6	ipmi_get_version
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x32dc302f	ipmi_set_my_address
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x37f5990b	ipmi_request_settime
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x40f2b10c	ipmi_alloc_smi_msg
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x4a46cbb3	ipmi_get_maintenance_mode
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x4f5c3b53	ipmi_smi_add_proc_entry
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x59b92e48	ipmi_request_supply_msgs
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x601acbbc	ipmi_get_my_LUN
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x62484bfd	ipmi_register_smi
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x73fb56c4	ipmi_unregister_for_cmd
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x804f922a	ipmi_addr_length
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x883bc92d	ipmi_set_gets_events
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x939bef0b	ipmi_smi_msg_received
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xa02d802d	ipmi_create_user
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xd10103a2	ipmi_set_my_LUN
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xd298a996	ipmi_smi_watchdog_pretimeout
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe41172c4	ipmi_set_maintenance_mode
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe4f4665b	ipmi_validate_addr
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe6a5a068	ipmi_smi_watcher_register
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xee680a8d	ipmi_poll_interface
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xf7a8dbde	ipmi_get_my_address
+EXPORT_SYMBOL drivers/char/nsc_gpio 0x52336830	nsc_gpio_dump
+EXPORT_SYMBOL drivers/char/nsc_gpio 0x709c3192	nsc_gpio_write
+EXPORT_SYMBOL drivers/char/nsc_gpio 0x8f7adfd1	nsc_gpio_read
+EXPORT_SYMBOL drivers/char/nvram 0x0f28cb91	nvram_read_byte
+EXPORT_SYMBOL drivers/char/nvram 0x17ff2c1d	__nvram_read_byte
+EXPORT_SYMBOL drivers/char/nvram 0x2adec1e0	__nvram_check_checksum
+EXPORT_SYMBOL drivers/char/nvram 0x7da28f12	nvram_check_checksum
+EXPORT_SYMBOL drivers/char/nvram 0x9ce3f83f	nvram_write_byte
+EXPORT_SYMBOL drivers/char/nvram 0xa8813189	__nvram_write_byte
+EXPORT_SYMBOL drivers/edac/edac_core 0x07d282da	edac_mc_find
+EXPORT_SYMBOL drivers/edac/edac_core 0x2a6fe144	edac_mc_handle_fbd_ue
+EXPORT_SYMBOL drivers/edac/edac_core 0xef490ea8	edac_mc_handle_fbd_ce
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x195a66a0	fw_core_remove_address_handler
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x2b2e6006	fw_core_add_address_handler
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x2ea76786	fw_iso_buffer_init
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x3452fbe4	fw_device_enable_phys_dma
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x49a29946	fw_core_remove_descriptor
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x4bedc53d	fw_send_response
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x4e86dd83	fw_core_add_descriptor
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x529ea96f	fw_iso_context_stop
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x6acce7b8	fw_core_handle_response
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x6b584dc3	fw_iso_context_queue
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x6c45a310	fw_iso_context_destroy
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x79f2de8f	fw_iso_context_create
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x7d1878f4	fw_cancel_transaction
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x89e66aba	fw_iso_buffer_destroy
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x90863005	fw_high_memory_region
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xa7fbf147	fw_core_handle_request
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xae2baf1e	fw_card_initialize
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xafc1c793	fw_csr_iterator_next
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xb047a2c6	fw_csr_iterator_init
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xb6bf45f6	fw_card_add
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xba1b8230	fw_run_transaction
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xc6c2584c	fw_bus_type
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xcb547411	fw_core_initiate_bus_reset
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xd569457e	fw_send_request
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xdd9afce5	fw_fill_response
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xf163bd46	fw_core_handle_bus_reset
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xfc0da2f2	fw_core_remove_card
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xfcb3dfe3	fw_iso_context_start
+EXPORT_SYMBOL drivers/firmware/dcdbas 0xa75079d6	dcdbas_smi_request
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x015c3c3b	drm_vblank_off
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0836695c	drm_sman_takedown
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0a4a0e8c	drm_master_put
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0ab6b877	drm_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x106f214b	drm_get_dev
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x13b5dafe	drm_mm_dump_table
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x16b25521	drm_get_edid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x193e6f90	drm_free_agp
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x199ecc36	drm_compat_ioctl
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1f072c59	drm_property_add_enum
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x20645642	drm_debug
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x21451ac4	drm_sman_owner_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2152e43a	drm_pci_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2215c8cb	drm_mode_connector_detach_encoder
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x25cd5254	drm_agp_chipset_flush
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x266a10fe	drm_sg_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2673f4ce	drm_crtc_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x27d05283	drm_property_destroy
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2916bf63	drm_sman_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x291707f1	drm_vblank_pre_modeset
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2eb2f903	drm_sman_free_key
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3074f033	drm_order
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x314594e0	drm_unbind_agp
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x32ff25c8	drm_exit
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x33125503	drm_ati_pcigart_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x342d3908	drm_mode_attachmode_crtc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x35f63f8b	drm_mode_config_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3a2f21a8	drm_mm_search_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3a30180e	drm_agp_enable
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3a8d2758	drm_mode_connector_update_edid_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3c9a1409	drm_ht_just_insert_please
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3d289d78	drm_framebuffer_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3d618bce	drm_get_connector_name
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x40911aaf	drm_mm_debug_table
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4791691d	drm_get_resource_len
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x47e5b0da	drm_connector_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x480230ff	drm_mode_object_find
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4a4acd1d	drm_agp_info
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4a4f45b2	drm_sysfs_hotplug_event
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4be8a07e	drm_gem_handle_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4c26967a	drm_fasync
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x50e8e5ba	drm_addmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x51b3425d	drm_connector_property_set_value
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5460f61d	drm_poll
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x547c0f42	drm_agp_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x54d61c9d	drm_core_ioremapfree
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x55977653	drm_agp_bind
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x55cca65e	drm_addbufs_agp
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x55f060ee	drm_sman_set_range
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x56217ed2	drm_mm_clean
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5630b5c9	drm_mode_validate_clocks
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x575af9fc	drm_gem_mmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x57f7dbe6	drm_mm_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x580830f0	drm_mode_set_name
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x59fd469b	drm_mode_detachmode_crtc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x59ff4f49	drm_lock_take
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5d86bd5b	drm_mode_probed_add
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5fcd4eb9	drm_agp_bind_pages
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5ff52fc7	drm_vblank_put
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6030ca27	drm_sysfs_connector_remove
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x623c8e9c	drm_mode_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x631e3b31	drm_gem_object_lookup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x63a293a3	drm_addbufs_pci
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6518c19a	drm_mm_get_block_range_generic
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x669755c7	drm_add_modes_noedid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x66da35a5	drm_connector_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x68dff059	drm_gtf_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6990194a	drm_debugfs_remove_files
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x69cf99aa	drm_mode_create_tv_properties
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6cffa244	drm_gem_vm_close
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6d2e5837	drm_ut_debug_printk
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6f5aa232	drm_mode_create_dvi_i_properties
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6fc30481	drm_mode_hsync
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x701e3f89	drm_i2c_encoder_destroy
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x718cc2ae	drm_framebuffer_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7299e2ac	drm_open
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x76195c06	drm_connector_property_get_value
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x76863e24	drm_mm_pre_get
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x784915eb	drm_mode_vrefresh
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x78f546bc	drm_clflush_pages
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7a1243bb	drm_mode_create_dirty_info_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7becf9f2	drm_gem_object_handle_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7c1fd6c8	drm_mode_equal
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7e5ec9ef	drm_idlelock_take
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x849241ac	drm_mm_put_block
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x85de09f5	drm_mode_width
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x87d6e7ef	drm_detect_hdmi_monitor
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x89721e89	drm_lock_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x899758f0	drm_read
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8e62d513	drm_mm_search_free_in_range
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8e822cac	drm_cvt_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x93764b34	drm_agp_acquire
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9766af6e	drm_debugfs_create_files
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x98746a54	drm_encoder_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x99d70454	drm_get_drawable_info
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9d32d125	drm_release
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9d3b01a2	drm_vblank_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa1eabd87	drm_mode_list_concat
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa37a15f1	drm_mode_prune_invalid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa433988c	drm_rmmap_locked
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa58849a8	drm_mode_config_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa74940a4	drm_sysfs_connector_add
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa81bb222	drm_mode_validate_size
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa963963f	drm_get_encoder_name
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa9d7e77b	drm_pci_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xab628336	drm_put_dev
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xabb7e4db	drm_agp_unbind
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xac051f70	drm_mode_connector_attach_encoder
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xac7ffe3b	drm_mode_create_dithering_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xad6f95d3	drm_agp_release
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xaf29788e	drm_sman_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb1249a09	drm_irq_uninstall
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb196dfa4	drm_ioctl
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb1b17618	drm_getsarea
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb60a528d	drm_mmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb64e4cd5	drm_mm_init_scan
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb8109826	drm_property_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb9517358	drm_gem_vm_open
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xbc9bdf26	drm_ati_pcigart_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xbcdb5f92	drm_mode_connector_list_update
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xbe3ff597	drm_vblank_get
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xbf62f1a1	drm_vblank_post_modeset
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc4ea85d8	drm_mm_scan_remove_block
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc71d4465	drm_mode_duplicate
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xca14e1e8	drm_i_have_hw_lock
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcbd851bd	drm_master_get
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcd64a331	drm_core_get_reg_ofs
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcdf2eff4	drm_mode_height
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcfb4f4ef	drm_mm_scan_add_block
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd0535816	drm_mode_destroy
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd08fa3f0	drm_mode_set_crtcinfo
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd21ad287	drm_mode_crtc_set_gamma_size
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3028e75	drm_sman_set_manager
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3a1f2b6	drm_irq_install
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3cd6920	drm_core_ioremap_wc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3ffab51	drm_ht_remove
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd4a9e454	drm_connector_attach_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd4c8a354	drm_mm_get_block_generic
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd63d6819	drm_core_get_map_ofs
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd8afc1b6	drm_core_reclaim_buffers
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xda52a4ea	drm_vblank_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdcba6a5d	drm_agp_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd3febe2	drm_gem_object_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd49095c	drm_ht_insert_item
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xde8c1af6	drm_rmmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdf809d4e	drm_crtc_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe1457735	drm_ht_remove_item
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe24a7b88	drm_ht_find_item
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe5bdce7e	drm_mode_debug_printmodeline
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe69400eb	drm_handle_vblank
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe7052610	drm_i2c_encoder_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe919dd5c	drm_sman_owner_clean
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe9a66b03	drm_get_resource_start
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xea322a3a	drm_core_ioremap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xed359582	drm_vblank_count
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xedd4d5ff	drm_encoder_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xef07f86d	drm_add_edid_modes
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf1421d13	drm_mode_sort
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf16def2f	drm_idlelock_release
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf2777be9	drm_mode_create_scaling_mode_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf42a2b26	drm_ht_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf4a65f7e	drm_do_probe_ddc_edid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf83e3758	drm_gem_object_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfa769c65	drm_mm_takedown
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfdaa7eeb	drm_mode_remove
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfdfbad19	drm_sman_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x07adfe71	i2c_dp_aux_add_bus
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x12b5b444	drm_helper_connector_dpms
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x174343bd	drm_fb_helper_setcolreg
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x185bdd35	drm_fb_helper_init_crtc_count
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x349c9caf	drm_fb_helper_single_fb_probe
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x394df66f	drm_helper_encoder_in_use
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x50428889	drm_helper_probe_connector_modes
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x7b052cbd	drm_helper_disable_unused_functions
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x7b87082e	drm_fb_helper_add_connector
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x7e673a32	drm_fb_helper_free
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x93642035	drm_fb_helper_check_var
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x9d251144	drm_fb_helper_panic
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x9ed860f7	drm_fb_helper_set_par
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xa644d4cc	drm_helper_hotplug_stage_two
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xa67056ac	drm_helper_initial_config
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xa76b28f0	drm_fb_helper_fill_var
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xbc6151ba	drm_fb_helper_fill_fix
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xc469c244	drm_fb_helper_restore
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xc78154c9	drm_helper_probe_single_connector_modes
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xce2f3b0d	drm_crtc_helper_set_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xd18467a8	drm_helper_mode_fill_fb_struct
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xe0e13584	drm_fb_helper_setcmap
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xe7f3c07a	drm_helper_resume_force_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xedec85f1	drm_fb_helper_pan_display
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xf1826ed3	drm_crtc_helper_set_config
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xfcd95f74	drm_fb_helper_blank
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xfd8c1dba	drm_helper_crtc_in_use
+EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x36b09d1a	intelfb_remove
+EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x8ca67677	intelfb_probe
+EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x938ae15c	intelfb_resize
+EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0x1405c426	radeonfb_resize
+EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0x7a2f3769	radeonfb_remove
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x01c99cb0	ttm_write_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x0f111a83	ttm_mem_global_alloc
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x1a7d4fb3	ttm_bo_reserve
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x1ba8c0ef	ttm_lock_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x1d455396	ttm_ref_object_add
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x1dab216b	ttm_mem_global_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x261df01f	ttm_bo_kunmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x2a074206	ttm_tt_bind
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x2d673efd	ttm_vt_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x2e87eac2	ttm_bo_evict_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x35d54bb3	ttm_bo_synccpu_write_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x365feb2e	ttm_eu_reserve_buffers
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x37c55af9	ttm_bo_kmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x3ade5cfc	ttm_base_object_lookup
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x3b79b5f6	ttm_bo_init_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x3df39355	ttm_object_device_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x3e863634	ttm_bo_unreserve
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x44409a13	ttm_global_item_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x4d9b60de	ttm_bo_swapout_all
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x52ba9bf0	ttm_object_device_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x56c42d22	ttm_suspend_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x5ca5cb47	ttm_global_item_ref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x61bdb34f	ttm_eu_fence_buffer_objects
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x69313066	ttm_agp_backend_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x69d81dd8	ttm_object_file_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x765cbc82	ttm_read_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x7f8879de	ttm_vt_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x80807e63	ttm_bo_synccpu_write_grab
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x83878306	ttm_bo_move_ttm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x86a4066d	ttm_eu_backoff_reservation
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x8db796d4	ttm_write_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x8e14b57f	ttm_tt_populate
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x91114fc6	ttm_bo_unmap_virtual
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x913b7875	ttm_bo_mem_space
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x97d5ca21	ttm_base_object_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x98f8f0e5	ttm_bo_clean_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xa5437f2e	ttm_base_object_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xac0e50d1	ttm_round_pot
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb13ca61c	ttm_bo_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb17a9f94	ttm_tt_set_placement_caching
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb2d91509	ttm_mem_global_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb5cf2fe9	ttm_suspend_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb64dd919	ttm_ref_object_base_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xbadc1e27	ttm_bo_move_accel_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xbba2ecf9	ttm_read_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc00a8e96	ttm_bo_mmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc2058ac0	ttm_io_prot
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc3cc0f6a	ttm_bo_wait_cpu
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc524755f	ttm_mem_global_free
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc64022a6	ttm_bo_global_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xcbd90e38	ttm_fbdev_mmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xcc761edf	ttm_bo_validate
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xcf9a2b18	ttm_object_file_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xdd3eedda	ttm_bo_device_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xe3f7a3b1	ttm_bo_move_memcpy
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xe9cc7363	ttm_bo_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xf08835ed	ttm_bo_wait_unreserved
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xf9a2aa41	ttm_bo_device_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xfcce372b	ttm_bo_global_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xfd113d23	ttm_bo_wait
+EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0x0903c239	vid_from_reg
+EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0xef1c781c	vid_which_vrm
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-bit 0x0f3fd0c0	i2c_bit_add_bus
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-bit 0xc157864c	i2c_bit_add_numbered_bus
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0xa3d46422	i2c_pca_add_bus
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0xe852d404	i2c_pca_add_numbered_bus
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pcf 0xb589c12c	i2c_pcf_add_bus
+EXPORT_SYMBOL drivers/i2c/busses/i2c-amd756 0x73c7ba5c	amd756_smbus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x01542a0b	hpsb_selfid_complete
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x04251aee	hpsb_unregister_protocol
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x061f4017	hpsb_read_cycle_timer
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x06ba2667	hpsb_iso_xmit_start
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x07f6ab4e	hpsb_get_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0b234c4e	dma_prog_region_alloc
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0be348c4	hpsb_iso_recv_listen_channel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0c46a2dc	hpsb_iso_recv_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x158ac548	dma_region_offset_to_bus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1a200e5a	csr1212_release_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1be77d17	hpsb_destroy_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1caef759	hpsb_iso_wake
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1d4e1f64	hpsb_iso_xmit_sync
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x23d40200	hpsb_iso_packet_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2a4cc36b	csr1212_attach_keyval_to_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2ebf6e5a	dma_prog_region_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x302d6c0c	hpsb_get_hostinfo_bykey
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x38513a7c	hpsb_make_lockpacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3fad3339	hpsb_send_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x49a95dc4	csr1212_get_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4a7f927f	hpsb_free_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4a9cd770	csr1212_parse_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4e5782ba	dma_region_mmap
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4f5aff2a	hpsb_make_lock64packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4fa20139	hpsb_get_tlabel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x54f63252	hpsb_create_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x584bcf10	hpsb_make_streampacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5f5fdd2f	csr1212_new_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x64c2baa5	hpsb_node_fill_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x66209812	hpsb_register_highlevel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x672ad148	dma_region_sync_for_device
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x68b51e47	csr1212_read
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6cd685bc	hpsb_iso_shutdown
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6e029432	hpsb_unregister_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6f35c5c7	hpsb_unregister_highlevel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7401440f	hpsb_set_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x757e7a76	hpsb_iso_recv_start
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x76bc1a5c	dma_region_free
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x78361836	hpsb_iso_recv_unlisten_channel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7959cd05	hpsb_iso_recv_set_channel_mask
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7b258975	hpsb_update_config_rom_image
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7b928dce	hpsb_iso_xmit_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7f63be1a	__hpsb_register_protocol
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8879f8f0	dma_region_sync_for_cpu
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8d3eee26	hpsb_packet_success
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8da5e80b	hpsb_write
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8ec2b312	dma_region_alloc
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8f89db39	hpsb_bus_reset
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x98f25701	hpsb_alloc_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9caaab96	hpsb_iso_xmit_queue_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9f4acd06	hpsb_resume_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa369cf8d	hpsb_packet_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa5fdb5c5	hpsb_register_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa8a51988	hpsb_node_write
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xacb089eb	hpsb_iso_n_ready
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xacda6e7c	hpsb_lock
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaef57bb5	csr1212_detach_keyval_from_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb56b103b	hpsb_iso_recv_flush
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc214a502	hpsb_protocol_class
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc44d880f	hpsb_iso_recv_release_packets
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc4fd3d36	hpsb_make_writepacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc53ae4d1	hpsb_allocate_and_register_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xcd9e772b	dma_prog_region_free
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xcfc529c1	hpsb_read
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xcfe65671	hpsb_iso_stop
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd03c8f5c	hpsb_set_hostinfo_key
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd3621003	hpsb_free_tlabel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd364eb95	hpsb_iso_packet_sent
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd4a9db64	hpsb_add_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xde516294	hpsb_remove_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe4f61ea1	hpsb_alloc_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe64e0f7a	hpsb_make_readpacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe8485522	hpsb_packet_sent
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xea4152ff	dma_region_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xeded944d	hpsb_update_config_rom
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xee171f2d	hpsb_selfid_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfba57f51	hpsb_speedto_str
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfcfe4e98	hpsb_make_phypacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfd5660eb	hpsb_reset_bus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfe08d84e	hpsb_set_packet_complete_task
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x1d5aeebc	ohci1394_init_iso_tasklet
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x8999a4e9	ohci1394_register_iso_tasklet
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0xc477484e	ohci1394_stop_context
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0xf58bfd7e	ohci1394_unregister_iso_tasklet
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x12963a43	rdma_addr_cancel
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x2accdc14	rdma_translate_ip
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x844887be	rdma_resolve_ip
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x8a721ed9	rdma_addr_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xc91bb9d3	rdma_addr_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xcc1b93a7	rdma_copy_addr
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x062d02d7	ib_send_cm_dreq
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x070963e9	ib_send_cm_lap
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x12483b53	ib_send_cm_drep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x50315afb	ib_cm_notify
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x88c434d3	ib_send_cm_sidr_rep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x8e34c2fb	ib_send_cm_apr
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x8e6a5d09	ib_send_cm_req
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x8e939067	ib_send_cm_rep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x953492cc	ib_send_cm_sidr_req
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xa5ff8bbd	ib_create_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xb07ea6d2	ib_send_cm_mra
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xbcd014c8	ib_cm_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xcb9d93b7	ib_cm_listen
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xdc6754c8	ib_send_cm_rej
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xe263b5b4	cm_class
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xf018cdec	ib_destroy_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xf2c36ebf	ib_send_cm_rtu
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x05485629	ib_register_event_handler
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x059cdd1d	ib_dealloc_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x06830b9a	ib_pack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0cf0c282	ib_reg_phys_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0ebee9cb	ib_register_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x14346e25	ib_modify_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x166031de	ib_get_dma_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1ae700e9	ib_fmr_pool_unmap
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1e491a04	ib_unmap_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1e94a1b2	ib_dealloc_pd
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1eb0fe14	ib_modify_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x312260f9	ib_alloc_mw
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x346bb6c8	ib_umem_release
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3805571f	ib_get_client_data
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3bd48ff6	ib_query_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3cbfe9e3	ib_query_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3db811e7	ib_create_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3f7567fd	ib_rate_to_mult
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3fd5af67	ib_find_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x416dd18d	ib_alloc_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x437536c9	ib_alloc_pd
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x48875294	ib_query_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x49d78b9f	ib_get_cached_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4ef9645f	ib_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x54b112d4	ib_create_ah_from_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5894754b	ib_query_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5f6b346b	ib_alloc_fast_reg_page_list
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6495e295	ib_set_client_data
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x64ec2878	ib_attach_mcast
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x683d1ad4	ib_create_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x68ec6d4f	ib_resize_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x694476a8	ib_unregister_event_handler
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6bf1d1cc	ib_modify_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6c54ffef	ib_destroy_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6d1f8e68	ib_dispatch_event
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6d27d1a4	ib_dealloc_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6f0e2491	ib_query_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6f8aff33	ib_destroy_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x75e7579c	ib_destroy_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8640eaeb	ib_modify_qp_is_ok
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x87b614d8	ib_ud_header_pack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x894b3a87	ib_query_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x908662bd	ib_query_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x947e70f6	ib_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x94ef3b93	ib_unregister_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x96ce6c46	rdma_node_get_transport
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9d804fa1	mult_to_ib_rate
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9f7806bf	ib_destroy_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9fa54389	ib_get_cached_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa57f1b70	ib_flush_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa5ea8808	ib_create_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa74c1506	ib_free_fast_reg_page_list
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xaa8a7c92	ib_alloc_fast_reg_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xad5a4ca7	ib_get_cached_lmc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xad6093c8	ib_dereg_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb3606270	ib_create_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb4aca4cd	ib_dealloc_mw
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb792dc87	ib_init_ah_from_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xba3234c3	ib_modify_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xbb517af6	ib_find_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xbf2c376b	ib_destroy_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc1b62195	ib_umem_page_count
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc1f99faa	ib_detach_mcast
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd17ba9d1	ib_ud_header_init
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd27797af	ib_umem_get
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xdd1797dd	ib_alloc_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe03b2bf1	ib_fmr_pool_map_phys
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe2c70d37	ib_create_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe343a690	ib_find_cached_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xeda3535d	ib_rereg_phys_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf36498b9	ib_ud_header_unpack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf5e86c98	ib_query_port
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf96fc9de	ib_unpack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf9a8899c	ib_find_cached_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xfd530f08	ib_modify_port
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xff8c5a0a	ib_modify_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x0615bdb4	ib_unregister_mad_agent
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x1016dc37	ib_redirect_mad_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6ef787ed	ib_response_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6f077fcf	ib_get_mad_data_offset
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x712be06e	ib_register_mad_snoop
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x7b5d4b7a	ib_is_mad_class_rmpp
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x81b10eb1	ib_get_rmpp_segment
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x848fae62	ib_modify_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x85ed21d3	ib_free_recv_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x93137686	ib_post_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xa9679b4d	ib_process_mad_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xbd8ab287	ib_register_mad_agent
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xc0591fda	ib_create_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xe5ca7e7e	ib_free_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xf3972e29	ib_cancel_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x05d7b6a4	ib_sa_cancel_query
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x10db7c03	ib_sa_join_multicast
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x319d5047	ib_init_ah_from_mcmember
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x576fdbac	ib_sa_free_multicast
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x81d580ee	ib_sa_get_mcmember_rec
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x8f19ce24	ib_sa_service_rec_query
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x92ea5ae3	ib_sa_path_rec_get
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x9c56fd34	ib_sa_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xc86c562c	ib_init_ah_from_path
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xf520d09e	ib_sa_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x02f847bc	ib_copy_path_rec_from_user
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x07cf5a51	ib_copy_ah_attr_to_user
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x18382f6a	ib_copy_path_rec_to_user
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x184f3575	ib_copy_qp_attr_to_user
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x199a1865	iw_cm_disconnect
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x2318cdb2	iw_cm_listen
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x34363c6d	iw_destroy_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x3e77a640	iw_create_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x517a1125	iw_cm_reject
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x5ac0ddff	iw_cm_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x9f63767f	iw_cm_connect
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xeecb7c94	iw_cm_accept
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x2e65f0fb	rdma_bind_addr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x33a3b17d	rdma_destroy_id
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x416031f2	rdma_join_multicast
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x509dd0bd	rdma_resolve_addr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x5d295a12	rdma_accept
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x5d7d33d4	rdma_connect
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x7310e4f1	rdma_leave_multicast
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x7a53d246	rdma_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x7de8e368	rdma_reject
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x7f59d51a	rdma_destroy_qp
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x913515fb	rdma_notify
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x9fc88f7b	rdma_set_service_type
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xaa530f9e	rdma_create_id
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xb55ad60d	rdma_set_ib_paths
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xcb3b88eb	rdma_listen
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xcf3efa26	rdma_disconnect
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xd5b82222	rdma_resolve_route
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xef70c4b9	rdma_create_qp
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x1696e30e	__gameport_register_driver
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x52143bce	gameport_start_polling
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x5c240a09	gameport_unregister_driver
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x66948b79	gameport_open
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x72ba4b85	gameport_set_phys
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x8cefc5b6	__gameport_register_port
+EXPORT_SYMBOL drivers/input/gameport/gameport 0xa560e4a2	gameport_stop_polling
+EXPORT_SYMBOL drivers/input/gameport/gameport 0xd52fc73f	gameport_close
+EXPORT_SYMBOL drivers/input/gameport/gameport 0xeb250a0b	gameport_unregister_port
+EXPORT_SYMBOL drivers/input/input-polldev 0x0d90e2ae	input_unregister_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0x3be2cee6	input_free_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0x59722f0a	input_register_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0xc5138f6f	input_allocate_polled_device
+EXPORT_SYMBOL drivers/isdn/capi/capifs 0x2c54c957	capifs_free_ncci
+EXPORT_SYMBOL drivers/isdn/capi/capifs 0xd0bc06ce	capifs_new_ncci
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x04403fcf	unregister_capi_driver
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x14f2aa5a	capi20_get_version
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x260b0572	capi_ctr_suspend_output
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2b8eab1f	capilib_free_ncci
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2baa6586	capilib_new_ncci
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x31c24aa4	capi20_isinstalled
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x3aa4d902	detach_capi_ctr
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x3bbb55c7	capi20_put_message
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x47d3fc51	capi_info2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x47dbfa0a	capi_message2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x4a95d529	capi_ctr_down
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x50b33ca4	capi_cmsg2message
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x6057c6f3	capi_message2cmsg
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x62e32d43	capilib_data_b3_conf
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x71e8d5ba	capilib_data_b3_req
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x73232f99	capi20_set_callback
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x788d398c	capi_cmsg2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7a33596c	capi20_get_serial
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7d8c86e1	capi_ctr_resume_output
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7e6f1307	capi20_get_manufacturer
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x8f699913	capilib_release
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x9f823278	register_capi_driver
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xaa165d27	capilib_release_appl
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb19fda8d	capi_cmd2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb60e5e5f	capi_cmsg_header
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xbb4e0fe5	capi20_register
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xc467bdc8	capi_ctr_ready
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xcd4ebba1	capi_ctr_handle_message
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xdf0a2003	attach_capi_ctr
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe19a11ac	capi20_get_profile
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe9f62f29	cdebbuf_free
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xed061606	capi20_manufacturer
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xf08d5d96	capi20_release
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x25ae483f	b1_free_card
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x27ca418a	b1_register_appl
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x36b188d8	b1_interrupt
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x4fc3e5b3	avmcard_dma_alloc
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x554c3262	b1_reset_ctr
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x599ad73d	b1_loaded
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x74ec8f76	b1_alloc_card
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x85f09690	b1_irq_table
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x8d07621a	b1_load_firmware
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x8ea32010	b1ctl_read_proc
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x91925516	b1_release_appl
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x9b4a41d4	b1_parse_version
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x9e1ca05e	avmcard_dma_free
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xa11c2316	b1_load_t4file
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xb915d4f6	b1_load_config
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xd9778c62	b1_getrevision
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xdfd28376	b1_detect
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xefdb9675	b1_send_message
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x233ca0dc	b1dma_interrupt
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x2d708f49	b1pciv4_detect
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x31c25b40	b1dma_release_appl
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x3bddfa32	b1dma_reset_ctr
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x5b422f49	b1dmactl_read_proc
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x618ae401	b1dma_register_appl
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x7463f15d	b1dma_load_firmware
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xcdde7e46	b1dma_send_message
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xe6d470af	t1pci_detect
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xf3482be2	b1dma_reset
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0x29562993	b1pcmcia_delcard
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xaec3240e	b1pcmcia_addcard_m1
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xea620116	b1pcmcia_addcard_m2
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xf14bf8b1	b1pcmcia_addcard_b1
+EXPORT_SYMBOL drivers/isdn/hardware/eicon/divadidd 0x2974ead1	DIVA_DIDD_Read
+EXPORT_SYMBOL drivers/isdn/hardware/eicon/divadidd 0xad1b9446	proc_net_eicon
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNipac 0x1842c9d4	mISDNisac_irq
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNipac 0x2e88e654	mISDNisac_init
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNipac 0x78f7e1d4	mISDNipac_irq
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNipac 0x93ed06ad	mISDNipac_init
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNisar 0x091a43fa	mISDNisar_irq
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNisar 0xa937c725	mISDNisar_init
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x07f4f2ce	hisax_unregister
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x148f0c99	FsmFree
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x2844a899	FsmInitTimer
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x83bd8c60	hisax_init_pcmcia
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x93a64734	FsmChangeState
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x9df0cd27	FsmEvent
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xc0c558f9	FsmRestartTimer
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xd94696e8	FsmDelTimer
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xee93522c	hisax_register
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xf0a16657	FsmNew
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xfc27303b	HiSax_closecard
+EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x3f3b323a	isac_d_l2l1
+EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x6569dc4c	isac_setup
+EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x6facb6c2	isac_init
+EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x9e12d9b4	isacsx_irq
+EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0xc01260e8	isac_irq
+EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0xc1da9b3c	isacsx_setup
+EXPORT_SYMBOL drivers/isdn/i4l/isdn 0x7928ddcb	register_isdn
+EXPORT_SYMBOL drivers/isdn/i4l/isdn 0x918a75f4	isdn_ppp_unregister_compressor
+EXPORT_SYMBOL drivers/isdn/i4l/isdn 0xb3977649	isdn_ppp_register_compressor
+EXPORT_SYMBOL drivers/isdn/i4l/isdn 0xfa06820f	isdn_register_divert
+EXPORT_SYMBOL drivers/isdn/i4l/isdnhdlc 0x3b71e4fc	isdnhdlc_decode
+EXPORT_SYMBOL drivers/isdn/i4l/isdnhdlc 0x59cc8a7e	isdnhdlc_out_init
+EXPORT_SYMBOL drivers/isdn/i4l/isdnhdlc 0x8ee38862	isdnhdlc_rcv_init
+EXPORT_SYMBOL drivers/isdn/i4l/isdnhdlc 0xfd9d4c09	isdnhdlc_encode
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x1ba33c63	recv_Dchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x2348cc3c	mISDN_FsmFree
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x31a264c1	l1_event
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x327a191b	mISDN_unregister_Bprotocol
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x36bc6737	queue_ch_frame
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3ea336fd	mISDN_FsmAddTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x429129f2	mISDN_FsmRestartTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x4e39ac6e	recv_Bchannel_skb
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x50c2230c	mISDN_FsmChangeState
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x51ec1944	get_next_dframe
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x5dc7400a	mISDN_clock_update
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x6447c7d6	mISDN_initdchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x759d5882	mISDN_initbchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x8393ffbd	mISDN_unregister_device
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x8811aa26	mISDN_register_Bprotocol
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x8ccac7ec	bchannel_senddata
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x944d7f16	mISDN_freedchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x9ab6ebba	recv_Echannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xa23cde94	create_l1
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xa2ceba90	dchannel_senddata
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xace35cae	mISDN_FsmDelTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc3401729	mISDN_register_clock
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd140e23c	recv_Dchannel_skb
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd285995f	mISDN_clock_get
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd5145151	mISDN_FsmEvent
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd732602f	get_next_bframe
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd9a7fbfd	mISDN_FsmInitTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe4aefd1c	confirm_Bsend
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe7e3bda0	mISDN_clear_bchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe8820268	mISDN_register_device
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe8f617eb	mISDN_unregister_clock
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf09f4a20	mISDN_freebchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf57e62c8	recv_Bchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf9e7832f	mISDN_FsmNew
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0x01087af0	mISDN_dsp_element_unregister
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0x60721da7	dsp_audio_law_to_s32
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0xa215f1b2	dsp_audio_s16_to_law
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0xb98308d8	mISDN_dsp_element_register
+EXPORT_SYMBOL drivers/md/raid6_pq 0x0bd662f6	raid6_gfmul
+EXPORT_SYMBOL drivers/md/raid6_pq 0x15fe0cd3	raid6_gfexp
+EXPORT_SYMBOL drivers/md/raid6_pq 0x5ba93f9d	raid6_gfinv
+EXPORT_SYMBOL drivers/md/raid6_pq 0xb0d904b7	raid6_empty_zero_page
+EXPORT_SYMBOL drivers/md/raid6_pq 0xce45a6f1	raid6_gfexi
+EXPORT_SYMBOL drivers/media/common/tuners/mc44s803 0xf8746d41	mc44s803_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mt2060 0x1668a99e	mt2060_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mt2131 0x0de0c47e	mt2131_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mt2266 0x30edf27e	mt2266_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mxl5005s 0x6c01f358	mxl5005s_attach
+EXPORT_SYMBOL drivers/media/common/tuners/qt1010 0x79cc1897	qt1010_attach
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0x0cb4b189	tuners
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0xc2821775	tuner_count
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-xc2028 0xfc3ac884	xc2028_attach
+EXPORT_SYMBOL drivers/media/common/tuners/xc5000 0x3bdf7033	xc5000_attach
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x097a3e2d	flexcop_device_kfree
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x241b4965	flexcop_device_initialize
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x3c383804	flexcop_dma_xfer_control
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x6b2363b1	flexcop_eeprom_check_mac_addr
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x7405ee0b	flexcop_device_kmalloc
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x775dfd88	flexcop_pid_feed_control
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x79b7cea5	flexcop_device_exit
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x890fd59a	flexcop_dma_control_size_irq
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x94575496	flexcop_dma_free
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x9469d8f8	flexcop_pass_dmx_data
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xa7d52045	flexcop_sram_ctrl
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xafde7489	flexcop_dma_config
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xb135df5c	flexcop_wan_set_speed
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xc0633374	flexcop_dma_config_timer
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xc0b76e5f	flexcop_sram_set_dest
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xc9f9efd5	flexcop_dma_control_timer_irq
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xd3ae79c6	flexcop_i2c_request
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xd3ea79dd	flexcop_pass_dmx_packets
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xf23ead83	flexcop_dma_allocate
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xf8a785aa	flexcop_dump_reg
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x2aeb5986	bt878_device_control
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x74412387	bt878
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x7fa1ca10	bt878_stop
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xc9f8d763	bt878_start
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xd5d0bdef	bt878_num
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x253aa5dd	dst_wait_dst_ready
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x27f7d8c8	dst_pio_disable
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x33ae4708	write_dst
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x69bf67e9	dst_comm_init
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x72c686cf	rdc_reset_state
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xa3142d6b	dst_error_recovery
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xcb6ddf38	dst_error_bailout
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xe94b8c9c	dst_check_sum
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xef12fd14	read_dst
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xfd761997	dst_attach
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst_ca 0x6f02510c	dst_ca_attach
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0785ea3e	dvb_net_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0b6167b0	dvb_dmxdev_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0c457c5c	dvb_ringbuffer_flush_spinlock_wakeup
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0c4d4a14	dvb_frontend_sleep_until
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0c747de8	dvb_ca_en50221_camready_irq
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0db24447	dvb_frontend_reinitialise
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x1f1f869d	dvb_generic_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x29390c1d	dvb_dmx_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x2d62a8c4	dvb_unregister_frontend
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x33f9fa79	dvb_unregister_device
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x3825511f	dvb_register_device
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x3fd4d1ea	dvb_frontend_detach
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x489f644f	dvb_dmx_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x511eb6f4	dvb_dmx_swfilter_204
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x51f3767c	dvb_ringbuffer_read
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x5da7f79a	dvb_dmx_swfilter
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x66d9a772	dvb_register_frontend
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6988f784	dvb_ringbuffer_read_user
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6ca29c7a	dvb_net_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x74a5a698	dvb_filter_pes2ts_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x76813e0c	dvb_generic_ioctl
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x798cdb07	dvb_dmx_swfilter_packets
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x80e3832d	dvb_filter_get_ac3info
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x89d5f637	dvb_ca_en50221_camchange_irq
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x9d0783c3	dvb_dmxdev_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x9dbba37b	dvb_generic_open
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xac4ca1b0	intlog2
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb801e348	dvb_ca_en50221_frda_irq
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xbc0d91e1	timeval_usec_diff
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xcb89fc7d	dvb_ringbuffer_free
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xcca08cb5	dvb_ringbuffer_avail
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xcce0eeed	dvb_ringbuffer_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xcd9f0ab5	dvb_ca_en50221_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xd3455a35	dvb_register_adapter
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xd639b9bc	dvb_ringbuffer_write
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xd7765e69	dvb_ringbuffer_empty
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xd98a8606	dvb_unregister_adapter
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe5ae8707	intlog10
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xef62320b	dvb_ca_en50221_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf826deb0	dvb_filter_pes2ts
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x0149bc16	dvb_usb_nec_rc_key_to_event
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x1b87310c	dvb_usb_device_exit
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x407ed773	dvb_usb_get_hexline
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x5db4942a	dvb_usb_generic_rw
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xa4ca3058	dvb_usb_generic_write
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xca8eb857	usb_cypress_load_firmware
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xe967ed75	dvb_usb_device_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x3693500b	af9005_rc_keys
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0xbf19e5d7	af9005_rc_decode
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0xd3383957	af9005_rc_keys_size
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x02285efc	dibusb_pid_filter
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x222f5faa	dibusb_dib3000mc_tuner_attach
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x33d27a9e	dibusb_streaming_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x3ec28e86	dibusb2_0_streaming_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x579c7e3f	dibusb_power_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x62b3362b	dibusb_dib3000mc_frontend_attach
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x64c6ccaa	dibusb_rc_query
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x811cee7f	dibusb_i2c_algo
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x90dcb9b2	dibusb_pid_filter_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x9d5c88c2	dibusb_read_eeprom_byte
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xcc9ccaff	dibusb_rc_keys
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xe04496e1	dibusb2_0_power_ctrl
+EXPORT_SYMBOL drivers/media/dvb/frontends/af9013 0x26467d2a	af9013_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/au8522 0xbc8aec3c	au8522_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/bcm3510 0x02a36d27	bcm3510_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx22700 0x923218d3	cx22700_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx22702 0x272d45f3	cx22702_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24110 0x6083ca1c	cx24110_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0xb6d3385c	cx24113_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0xe3b10ec4	cx24113_agc_callback
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24116 0xa0dce90b	cx24116_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0x075339ac	cx24123_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0x5aa2e14d	cx24123_get_tuner_i2c_adapter
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0x73e8664e	dib0070_wbd_offset
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0xe049f1c2	dib0070_ctrl_agc_filter
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0xf6bcbe70	dib0070_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mb 0x0f4c7177	dib3000mb_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x36e6c062	dib3000mc_i2c_enumeration
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x4025ab11	dib3000mc_set_config
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x5cadb2c2	dib3000mc_pid_control
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x9fdd0760	dib3000mc_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xbe7298b5	dib3000mc_get_tuner_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xd8cd2267	dib3000mc_pid_parse
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0xbaa44a22	dib7000m_get_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0xc98dafb7	dib7000m_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x3bf6a6b3	dib7000p_set_wbd_ref
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x55c4e495	dib7000pc_detection
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x7254b87a	dib7000p_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xa60e8544	dib7000p_set_gpio
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xdfdf7de1	dib7000p_i2c_enumeration
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xe08714ba	dib7000p_get_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x085b6e4e	dib8000_i2c_enumeration
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x3edb9179	dib8000_set_wbd_ref
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x51ef6908	dib8000_set_gpio
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0xc48cff01	dib8000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0xd284be30	dib8000_get_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x00e36c15	dibx000_get_i2c_adapter
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x672a7896	dibx000_init_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0xcd5aeece	dibx000_exit_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0xe1905694	dibx000_reset_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dvb-pll 0xdf73bbd0	dvb_pll_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/isl6405 0x1c8c5dee	isl6405_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/isl6421 0x9595f18d	isl6421_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/isl6423 0xa92502e1	isl6423_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/itd1000 0xa2252afe	itd1000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/l64781 0x7e36839a	l64781_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt3305 0xc8494fa2	lgdt3305_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt330x 0x06f472cf	lgdt330x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lgs8gxx 0x8b4c9772	lgs8gxx_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0xec0d2e61	lnbp21_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0xf3203458	lnbh24_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/mt312 0x35f0400d	mt312_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/mt352 0x3f8b6e3a	mt352_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/nxt200x 0x659f0969	nxt200x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/nxt6000 0x2ca3f43f	nxt6000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/or51132 0x75d6a228	or51132_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/or51211 0xf1dfbeb0	or51211_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1409 0xbe68b9ec	s5h1409_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1411 0xa7928cd3	s5h1411_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0x893b18f0	s5h1420_get_tuner_i2c_adapter
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0xa44e0bb4	s5h1420_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/si21xx 0x29f1e858	si21xx_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/sp8870 0x5a11d0cb	sp8870_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/sp887x 0xce2df379	sp887x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stb0899 0x5bdf3808	stb0899_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stb6000 0xf0573d3f	stb6000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stb6100 0x232a0a03	stb6100_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0288 0x125518ea	stv0288_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0297 0x7e9a138f	stv0297_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0299 0xafdcfae1	stv0299_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0900 0xa9a0a062	stv0900_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv090x 0xed86260b	stv090x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv6110 0x050669bf	stv6110_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv6110x 0x91aae439	stv6110x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10021 0x3660b97f	tda10021_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10023 0xfb3e2a87	tda10023_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10048 0xa05730a7	tda10048_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0xacc1916b	tda10046_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0xcda56561	tda10045_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10086 0x73955abe	tda10086_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda8083 0xbdf411e6	tda8083_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda8261 0x1d8c550f	tda8261_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda826x 0x149a3ad2	tda826x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tua6100 0x2b5b1e41	tua6100_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/ves1820 0x95ca1d85	ves1820_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/ves1x93 0x9f2cd8d4	ves1x93_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/zl10036 0x37235bb2	zl10036_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/zl10039 0xe6f0d092	zl10039_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/zl10353 0x19f056a0	zl10353_attach
+EXPORT_SYMBOL drivers/media/dvb/ttpci/ttpci-eeprom 0xea1e1539	ttpci_eeprom_parse_mac
+EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0x94ce69db	ttusbdecfe_dvbs_attach
+EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0xbf096811	ttusbdecfe_dvbt_attach
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x11dc4b6d	bttv_gpio_enable
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x5e03eb46	bttv_get_pcidev
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x8ecf4acc	bttv_write_gpio
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xbcf2d2fb	bttv_read_gpio
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xd8a5d871	bttv_sub_unregister
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xf06f5357	bttv_sub_register
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0x495e4b0c	btcx_calc_skips
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xa85383ef	btcx_riscmem_alloc
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xad2fe38b	btcx_sort_clips
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xc368f8e6	btcx_align
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xcda0ded2	btcx_screen_clips
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xde7c4335	btcx_riscmem_free
+EXPORT_SYMBOL drivers/media/video/cpia 0x218eb985	cpia_unregister_camera
+EXPORT_SYMBOL drivers/media/video/cpia 0xd1b61c3f	cpia_register_camera
+EXPORT_SYMBOL drivers/media/video/cx18/cx18 0x2cdea06d	cx18_reset_ir_gpio
+EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0x2f83f63f	cx231xx_register_extension
+EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0xf4e0a841	cx231xx_unregister_extension
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x155650f3	cx2341x_ctrl_get_menu
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x1ca0c084	cx2341x_log_status
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x2f25eee2	cx2341x_update
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x5b88faf6	cx2341x_ext_ctrls
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf76ce95	cx2341x_fill_defaults
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf8b77a4	cx2341x_mpeg_ctrls
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xe2c2b5eb	cx2341x_ctrl_query
+EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0x50b96a9c	vp3054_i2c_remove
+EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0xe5e08a67	vp3054_i2c_probe
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x14a9e839	cx88_get_control
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x66fd0140	cx88_set_control
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xa732dce7	cx88_video_mux
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xa99e757e	cx88_set_freq
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xac4e53b9	cx88_user_ctrls
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xb13dd880	cx8800_ctrl_query
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xb3a0ccf8	cx88_enum_input
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x0d7840fc	cx8802_buf_queue
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x4d4e898b	cx8802_unregister_driver
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x6653b126	cx8802_get_device
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x8f3a7d4a	cx8802_get_driver
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xa7a67cb7	cx8802_register_driver
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xc3594653	cx8802_buf_prepare
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xf7bb6a0c	cx8802_cancel_buffers
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x00860d11	cx88_wakeup
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x098a9487	cx88_get_stereo
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x11260e67	cx88_core_get
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x16d15ebe	cx88_vdev_init
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x22d2636a	cx88_ir_stop
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x27f2d51f	cx88_core_put
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x39cd7839	cx88_ir_start
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x53e0c65f	cx88_shutdown
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x59be3619	cx88_dsp_detect_stereo_sap
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x6141c8c5	cx88_tuner_callback
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x740f6b50	cx88_risc_stopper
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x7f832b96	cx88_sram_channel_setup
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x8ac395ce	cx88_core_irq
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x8b24d641	cx88_risc_databuffer
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x8b87c9c3	cx88_set_tvaudio
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x904b8696	cx88_audio_thread
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x9153534a	cx88_free_buffer
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x9b140fff	cx88_sram_channels
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xa603766e	cx88_set_tvnorm
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xa6558f1f	cx88_set_scale
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xac4ae13c	cx88_reset
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb47f6cda	cx88_print_irqbits
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xbc1c0d40	cx88_sram_channel_dump
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xc38be7c4	cx88_risc_buffer
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xdd593fa0	cx88_set_stereo
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xf4c1582d	cx88_newstation
+EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0x803d9d4c	em28xx_register_extension
+EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0x9b52a023	em28xx_unregister_extension
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x10122486	gspca_dev_probe
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x14458158	gspca_frame_add
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x85925d2a	gspca_auto_gain_n_exposure
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x9670af2c	gspca_debug
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xa3c31e61	gspca_resume
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xb79cf698	gspca_get_i_frame
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xc4c2f5c2	gspca_disconnect
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xff5cf025	gspca_suspend
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x14f67530	ivtv_debug
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x2daf8d64	ivtv_vapi
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x328aaf7e	ivtv_api
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x4048a547	ivtv_udma_alloc
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x4edd381b	ivtv_udma_unmap
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x562cc74e	ivtv_clear_irq_mask
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x717aa809	ivtv_reset_ir_gpio
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x8301f23e	ivtv_vapi_result
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x8cea1a93	ivtv_init_on_first_open
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x9f6f45a8	ivtv_set_irq_mask
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xd9ee1901	ivtv_udma_setup
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xdb8b066a	ivtv_udma_prepare
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x04e83446	saa7134_tuner_callback
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x1211df5d	saa7134_devlist
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x14dfecc6	saa7134_boards
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x258abeab	saa7134_dmasound_init
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x2b33282d	saa7134_pgtable_free
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x40d97368	saa7134_set_gpio
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x43ab21cd	saa7134_set_dmabits
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x4780dce6	saa7134_pgtable_alloc
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x5ef696e9	saa7134_tvaudio_setmute
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x6d455358	saa_dsp_writel
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x7da1656c	saa7134_dmasound_exit
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x7ee44b90	saa7134_devlist_lock
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xaebf6d1c	saa7134_ts_unregister
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xdaa76b58	saa7134_ts_register
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xfdee1e08	saa7134_pgtable_build
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x63717cb1	soc_camera_xlate_by_fourcc
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x7b99773d	soc_camera_host_register
+EXPORT_SYMBOL drivers/media/video/soc_camera 0xd1d2a161	soc_camera_format_by_fourcc
+EXPORT_SYMBOL drivers/media/video/soc_camera 0xdab1b5eb	soc_camera_host_unregister
+EXPORT_SYMBOL drivers/media/video/soc_camera 0xe3111867	soc_camera_apply_sensor_flags
+EXPORT_SYMBOL drivers/media/video/tveeprom 0x36ef9f70	tveeprom_hauppauge_analog
+EXPORT_SYMBOL drivers/media/video/tveeprom 0x3710fb84	tveeprom_read
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x16a2915c	RingQueue_Dequeue
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x407a321c	RingQueue_WakeUpInterruptible
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x72d5ce30	usbvideo_AllocateDevice
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x744efb34	usbvideo_TestPattern
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xb2854686	usbvideo_register
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xcd774978	usbvideo_Deregister
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xddecac6d	RingQueue_Enqueue
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xf03cc6f1	usbvideo_RegisterVideoDevice
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xf3074c2a	usbvideo_DeinterlaceFrame
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xf5011f67	RingQueue_Flush
+EXPORT_SYMBOL drivers/media/video/v4l1-compat 0xf3c587e9	v4l_compat_translate_ioctl
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x03165a85	v4l2_ctrl_get_menu
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x0b4985d3	v4l2_chip_match_i2c_client
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1dcaa0c8	v4l2_prio_max
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1e326b97	v4l2_ctrl_query_fill
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x2f639468	v4l2_prio_check
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x42c8e001	v4l2_ctrl_next
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x495426ee	v4l2_ctrl_get_name
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x4ed5e0d7	v4l2_chip_match_host
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x50766d69	v4l2_ctrl_query_menu_valid_items
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x76ba9a9a	v4l2_prio_open
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x95284709	v4l2_prio_close
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9c7de443	v4l2_prio_change
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9eb43ee2	v4l2_ctrl_check
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0xa1edf614	v4l2_chip_ident_i2c_client
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0xbecd2858	v4l2_prio_init
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0xd9ee1e3f	v4l2_ctrl_query_menu
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x09db2b16	videobuf_dvb_dealloc_frontends
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x1818ce75	videobuf_dvb_find_frontend
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x19e77b36	videobuf_dvb_alloc_frontend
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x786256fe	videobuf_dvb_get_frontend
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x7de7fdb1	videobuf_dvb_register_bus
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x9b0e5809	videobuf_dvb_unregister_bus
+EXPORT_SYMBOL drivers/media/video/videodev 0x013fa876	video_register_device
+EXPORT_SYMBOL drivers/media/video/videodev 0x0614dd5a	v4l2_video_std_frame_period
+EXPORT_SYMBOL drivers/media/video/videodev 0x123959a1	v4l2_type_names
+EXPORT_SYMBOL drivers/media/video/videodev 0x2001c659	video_usercopy
+EXPORT_SYMBOL drivers/media/video/videodev 0x322a5757	video_device_alloc
+EXPORT_SYMBOL drivers/media/video/videodev 0x3adbd595	v4l2_field_names
+EXPORT_SYMBOL drivers/media/video/videodev 0x5ebefe4b	v4l_printk_ioctl
+EXPORT_SYMBOL drivers/media/video/videodev 0x6fe0c2ee	video_device_release_empty
+EXPORT_SYMBOL drivers/media/video/videodev 0x80a952d2	video_ioctl2
+EXPORT_SYMBOL drivers/media/video/videodev 0x899877a0	video_devdata
+EXPORT_SYMBOL drivers/media/video/videodev 0x97aebee4	video_register_device_no_warn
+EXPORT_SYMBOL drivers/media/video/videodev 0xbb2e28bd	video_unregister_device
+EXPORT_SYMBOL drivers/media/video/videodev 0xe092efab	video_device_release
+EXPORT_SYMBOL drivers/media/video/videodev 0xe2b92059	v4l2_video_std_construct
+EXPORT_SYMBOL drivers/media/video/videodev 0xf3251e7b	v4l2_norm_to_name
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x1614552d	videocodec_detach
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x4e8e259b	videocodec_unregister
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x9fd9c1a4	videocodec_attach
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0xeb068661	videocodec_register
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x20513fe9	memstick_add_host
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x3f25aeb4	memstick_unregister_driver
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x4e1d69c7	memstick_suspend_host
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x5b392d71	memstick_next_req
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x5d820a02	memstick_init_req_sg
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x70e61b7b	memstick_set_rw_addr
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x71bacaf2	memstick_free_host
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x90810e8a	memstick_init_req
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x99c0ae61	memstick_register_driver
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xa5c4f45d	memstick_remove_host
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xa6803e7c	memstick_new_req
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xc145c619	memstick_detect_change
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xcf794ea2	memstick_alloc_host
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xdafb83ab	memstick_resume_host
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x01783ca6	mpt_print_ioc_summary
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x065538fb	mpt_reset_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x08d3a533	mpt_findImVolumes
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x0cb0238b	mpt_set_taskmgmt_in_progress_flag
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x136aab74	mpt_put_msg_frame_hi_pri
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x1681e210	mpt_clear_taskmgmt_in_progress_flag
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x182f18ad	mpt_detach
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x1933c1d2	mpt_GetIocState
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x1d936544	mpt_attach
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x218d0fdb	mpt_put_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x28422892	mpt_verify_adapter
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x2fbfe95b	mptbase_sas_persist_operation
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4526289b	mpt_event_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x47d6e364	mpt_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4bb83eca	mpt_event_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x502108d0	mpt_fwfault_debug
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x60032608	mpt_alloc_fw_memory
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x6259f086	mpt_raid_phys_disk_get_num_paths
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x7c664591	mpt_raid_phys_disk_pg1
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x828f52af	mpt_free_fw_memory
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x841ffc07	mpt_config
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x852c47e0	mpt_get_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x89365c0d	mpt_halt_firmware
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x8f430e97	mpt_HardResetHandler
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x9b15f6e6	mpt_device_driver_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x9dbc7155	mpt_send_handshake_request
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xaf73a170	mpt_free_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc0e69f82	mpt_device_driver_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc47c22e8	mpt_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd9a92a75	mpt_reset_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xdbf2295c	mpt_resume
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xdd805159	ioc_list
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xe03d5e3f	mpt_raid_phys_disk_pg0
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xf26de885	mpt_suspend
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x0479144a	mptscsih_resume
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x052dbafb	mptscsih_suspend
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x098b362b	mptscsih_dev_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x0a467cc2	mptscsih_taskmgmt_complete
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x27a33c7e	mptscsih_host_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x441364a8	mptscsih_shutdown
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x58a1d805	mptscsih_scandv_complete
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x63fb49f1	mptscsih_taskmgmt_response_code
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x73c8f4d9	mptscsih_is_phys_disk
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x7de12cc9	mptscsih_qcmd
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x7fc0c5ce	mptscsih_remove
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x82607d2b	mptscsih_slave_configure
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x871bbae7	mptscsih_bios_param
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x8847e2c2	mptscsih_host_attrs
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x8c2e97fc	mptscsih_event_process
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x93c10eb2	mptscsih_abort
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x9af9cabd	mptscsih_change_queue_depth
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xa9e5d6f3	mptscsih_IssueTaskMgmt
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xac7eeb73	mptscsih_slave_destroy
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xbf1ff828	mptscsih_proc_info
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xc82d5203	mptscsih_bus_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xcd83b197	mptscsih_info
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xe82bcf11	mptscsih_io_done
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xf7b471b8	mptscsih_raid_id_to_num
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xfedc6703	mptscsih_get_scsi_lookup
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xffba26a1	mptscsih_ioc_reset
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x0a393174	i2o_driver_notify_device_remove_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x0c77d26e	i2o_cntxt_list_get_ptr
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x24e47fa3	i2o_find_iop
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2a843bef	i2o_dump_message
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2e3d0adc	i2o_msg_get_wait
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x3383e9a6	i2o_iop_find_device
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x428b2ad9	i2o_driver_unregister
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x6a56224c	i2o_exec_lct_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x72d0bfa0	i2o_parm_field_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x73dc0fa1	i2o_driver_notify_controller_remove_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x746d621a	i2o_status_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x85e79ca9	i2o_cntxt_list_remove
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xa9389e4e	i2o_device_claim_release
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xaa3950d0	i2o_cntxt_list_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xaf830d47	i2o_driver_notify_controller_add_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb4c00dcf	i2o_controllers
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb73bb859	i2o_msg_post_wait_mem
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xbafdc00a	i2o_device_claim
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xbf8cff87	i2o_driver_register
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xc1bc86f6	i2o_driver_notify_device_add_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xc9929944	i2o_cntxt_list_add
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xd825f731	i2o_parm_issue
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xf3410340	i2o_parm_table_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xf94e55dc	i2o_event_register
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x01eae48a	ab3100_event_unregister
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x020962a0	ab3100_event_registers_startup_state_get
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x4ae19175	ab3100_mask_and_set_register_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x845b791f	ab3100_event_register
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x91fcb3ff	ab3100_get_register_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x99161e3a	ab3100_set_register_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xb8cc188d	ab3100_get_chip_type
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xc8b5ffde	ab3100_get_register_page_interruptible
+EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x03888060	pasic3_write_register
+EXPORT_SYMBOL drivers/mfd/htc-pasic3 0xa7756534	pasic3_read_register
+EXPORT_SYMBOL drivers/mfd/mfd-core 0xa6e9d06e	mfd_remove_devices
+EXPORT_SYMBOL drivers/mfd/mfd-core 0xb3c9a67e	mfd_add_devices
+EXPORT_SYMBOL drivers/mfd/tps65010 0x02d4ad0f	tps65013_set_low_pwr
+EXPORT_SYMBOL drivers/mfd/tps65010 0x28485130	tps65010_config_vregs1
+EXPORT_SYMBOL drivers/mfd/tps65010 0x33739de7	tps65010_set_vib
+EXPORT_SYMBOL drivers/mfd/tps65010 0x9fd44c69	tps65010_set_led
+EXPORT_SYMBOL drivers/mfd/tps65010 0xb14080cc	tps65010_set_low_pwr
+EXPORT_SYMBOL drivers/mfd/tps65010 0xd5bb106d	tps65010_set_vbus_draw
+EXPORT_SYMBOL drivers/mfd/tps65010 0xe99b3f36	tps65010_set_gpio_out_value
+EXPORT_SYMBOL drivers/misc/c2port/core 0x4b5bee71	c2port_device_unregister
+EXPORT_SYMBOL drivers/misc/c2port/core 0xdd74875d	c2port_device_register
+EXPORT_SYMBOL drivers/misc/ioc4 0x61047470	ioc4_unregister_submodule
+EXPORT_SYMBOL drivers/misc/ioc4 0xb503051b	ioc4_register_submodule
+EXPORT_SYMBOL drivers/misc/tifm_core 0x34f91b95	tifm_eject
+EXPORT_SYMBOL drivers/misc/tifm_core 0x3fd292ee	tifm_unmap_sg
+EXPORT_SYMBOL drivers/misc/tifm_core 0x49be84bc	tifm_add_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0x4bfa6006	tifm_free_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0x5aad1c12	tifm_remove_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0x629a44c6	tifm_register_driver
+EXPORT_SYMBOL drivers/misc/tifm_core 0x97ad452b	tifm_has_ms_pif
+EXPORT_SYMBOL drivers/misc/tifm_core 0xa3ea03da	tifm_alloc_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0xb5e53e7a	tifm_free_device
+EXPORT_SYMBOL drivers/misc/tifm_core 0xc30f58a0	tifm_unregister_driver
+EXPORT_SYMBOL drivers/misc/tifm_core 0xc3e19998	tifm_alloc_device
+EXPORT_SYMBOL drivers/misc/tifm_core 0xcd153284	tifm_queue_work
+EXPORT_SYMBOL drivers/misc/tifm_core 0xe83b805c	tifm_map_sg
+EXPORT_SYMBOL drivers/mmc/card/mmc_block 0x810cb0c9	mmc_cleanup_queue
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x07a4c8dc	cfi_read_pri
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x0b39bc28	cfi_fixup
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x741b19f1	cfi_varsize_frob
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x4ac80313	unregister_mtd_chip_driver
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x50034f9c	map_destroy
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0xb4cfe262	do_map_probe
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0xc9611e42	register_mtd_chip_driver
+EXPORT_SYMBOL drivers/mtd/chips/gen_probe 0x17a28caa	mtd_do_chip_probe
+EXPORT_SYMBOL drivers/mtd/lpddr/lpddr_cmds 0xe89442cc	lpddr_cmdset
+EXPORT_SYMBOL drivers/mtd/maps/map_funcs 0x443ea61d	simple_map_init
+EXPORT_SYMBOL drivers/mtd/mtd 0x4088585d	add_mtd_partitions
+EXPORT_SYMBOL drivers/mtd/mtd 0xe9ce2acf	del_mtd_partitions
+EXPORT_SYMBOL drivers/mtd/mtdconcat 0x656e5efb	mtd_concat_create
+EXPORT_SYMBOL drivers/mtd/mtdconcat 0x6fa1fe33	mtd_concat_destroy
+EXPORT_SYMBOL drivers/mtd/nand/nand 0x6506f560	nand_default_bbt
+EXPORT_SYMBOL drivers/mtd/nand/nand 0x947076fd	nand_scan_bbt
+EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0x68d35fec	nand_calculate_ecc
+EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0xb4b94377	__nand_correct_data
+EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0xf7485e59	nand_correct_data
+EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0x836bdb72	nand_flash_ids
+EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0xa336feb7	nand_manuf_ids
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x3b6b40c6	onenand_default_bbt
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x75453508	onenand_addr
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x8735d33d	flexonenand_region
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0xe3475f00	onenand_scan_bbt
+EXPORT_SYMBOL drivers/net/8390 0x3db1c35f	NS8390_init
+EXPORT_SYMBOL drivers/net/8390 0x58ac5ee2	ei_get_stats
+EXPORT_SYMBOL drivers/net/8390 0x6403bc22	ei_tx_timeout
+EXPORT_SYMBOL drivers/net/8390 0xb211ae7e	ei_netdev_ops
+EXPORT_SYMBOL drivers/net/8390 0xc80fd6f8	__alloc_ei_netdev
+EXPORT_SYMBOL drivers/net/8390 0xd5b00f91	ei_start_xmit
+EXPORT_SYMBOL drivers/net/8390 0xdd365790	ei_interrupt
+EXPORT_SYMBOL drivers/net/8390 0xe73fc344	ei_open
+EXPORT_SYMBOL drivers/net/8390 0xeb63c013	ei_poll
+EXPORT_SYMBOL drivers/net/8390 0xebef2b02	ei_set_multicast_list
+EXPORT_SYMBOL drivers/net/8390 0xff23c218	ei_close
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x1111af80	arc_proto_default
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x23f86078	arcnet_interrupt
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x25451ef5	arc_raw_proto
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x2d420980	arc_bcast_proto
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x2e59a3c6	arc_proto_map
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x4ebb2230	arcnet_timeout
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x6534792a	arcnet_debug
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x73f132b2	arcnet_send_packet
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x7f3fcca5	alloc_arcdev
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x81b09f66	arcnet_open
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x889394ef	arcnet_unregister_proto
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xed528f21	arcnet_close
+EXPORT_SYMBOL drivers/net/arcnet/com20020 0x42a700c3	com20020_found
+EXPORT_SYMBOL drivers/net/arcnet/com20020 0x59e83f9b	com20020_check
+EXPORT_SYMBOL drivers/net/arcnet/com20020 0xc1a79153	com20020_netdev_ops
+EXPORT_SYMBOL drivers/net/bnx2 0xe9e77c62	bnx2_cnic_probe
+EXPORT_SYMBOL drivers/net/cnic 0x636af174	cnic_unregister_driver
+EXPORT_SYMBOL drivers/net/cnic 0xd9ad2294	cnic_register_driver
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x044c0cd6	dev2t3cdev
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x19c1b895	t3_l2t_get
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x2395d1d5	t3_l2e_free
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x27951942	cxgb3_alloc_atid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x3ab3e270	cxgb3_unregister_client
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x4a76c0b6	cxgb3_register_client
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x5cdc1e03	cxgb3_insert_tid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x603bb830	cxgb3_remove_tid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x6af88513	t3_l2t_send_slow
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x80786bd8	cxgb3_alloc_stid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xa1c6ef0e	cxgb3_free_atid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xb1df382e	t3_l2t_send_event
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xb6004501	t3_register_cpl_handler
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xc5a96bc3	cxgb3_free_stid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xd5d3fa9f	cxgb3_queue_tid_release
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xeeed015a	cxgb3_ofld_send
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x34ff2d80	hdlcdrv_unregister
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x8075c6e0	hdlcdrv_register
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x86dc20d2	hdlcdrv_receiver
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x9698ebd1	hdlcdrv_arbitrate
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xe3f05192	hdlcdrv_transmitter
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x0ee57e88	sirdev_get_instance
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x17c034a6	sirdev_raw_read
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x27bb6476	sirdev_set_dtr_rts
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x2a5e7b03	sirdev_receive
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x4ef81bfa	sirdev_put_instance
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x4fa317b6	irda_unregister_dongle
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x800a5b9d	irda_register_dongle
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x932cdfa2	sirdev_raw_write
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xf1365653	sirdev_write_complete
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xf7944f2b	sirdev_set_dongle
+EXPORT_SYMBOL drivers/net/mdio 0x0f934475	mdio45_ethtool_gset_npage
+EXPORT_SYMBOL drivers/net/mdio 0x22bce513	mdio_mii_ioctl
+EXPORT_SYMBOL drivers/net/mdio 0x43e4defc	mdio45_nway_restart
+EXPORT_SYMBOL drivers/net/mdio 0x7577f992	mdio_set_flag
+EXPORT_SYMBOL drivers/net/mdio 0xa1a29548	mdio45_probe
+EXPORT_SYMBOL drivers/net/mdio 0xb34a7575	mdio45_ethtool_spauseparam_an
+EXPORT_SYMBOL drivers/net/mdio 0xc6b1163f	mdio45_links_ok
+EXPORT_SYMBOL drivers/net/mii 0x5b138eee	mii_check_link
+EXPORT_SYMBOL drivers/net/mii 0x685bb74d	mii_check_gmii_support
+EXPORT_SYMBOL drivers/net/mii 0x73e74455	generic_mii_ioctl
+EXPORT_SYMBOL drivers/net/mii 0x7a8fd56b	mii_nway_restart
+EXPORT_SYMBOL drivers/net/mii 0x81170238	mii_check_media
+EXPORT_SYMBOL drivers/net/mii 0x846aeb98	mii_link_ok
+EXPORT_SYMBOL drivers/net/mii 0xa4e1c2ae	mii_ethtool_sset
+EXPORT_SYMBOL drivers/net/mii 0xc6fe5ce8	mii_ethtool_gset
+EXPORT_SYMBOL drivers/net/pppox 0x705e6e71	register_pppox_proto
+EXPORT_SYMBOL drivers/net/pppox 0xabafdad5	pppox_ioctl
+EXPORT_SYMBOL drivers/net/pppox 0xe0ff7a18	unregister_pppox_proto
+EXPORT_SYMBOL drivers/net/pppox 0xfdb0adb9	pppox_unbind_sock
+EXPORT_SYMBOL drivers/net/sungem_phy 0x94188824	mii_phy_probe
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x0622e7eb	tms380tr_open
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x1c4d4248	tmsdev_term
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x54067bca	tmsdev_init
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xcabff295	tms380tr_netdev_ops
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd2328794	tms380tr_wait
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd49af46e	tms380tr_interrupt
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xf67db4d6	tms380tr_close
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x38da4725	cycx_intr
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x62be23ea	cycx_setup
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x66a4c4e6	cycx_down
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x968458a6	cycx_peek
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xb6f383de	cycx_poke
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xfe7cd576	cycx_exec
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x3ad929aa	hdlc_ioctl
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x429dd49e	hdlc_change_mtu
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x460191b8	hdlc_open
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x686bf002	hdlc_close
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x6c1ebdba	unregister_hdlc_device
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x8bac1e99	hdlc_start_xmit
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xa40e1094	alloc_hdlcdev
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xa8c92d02	attach_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xc04b93b5	register_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xf0e6a4a6	unregister_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xfe9e027f	detach_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wireless/airo 0x2fa414dc	init_airo_card
+EXPORT_SYMBOL drivers/net/wireless/airo 0x57585f1d	reset_airo_card
+EXPORT_SYMBOL drivers/net/wireless/airo 0xff05bd0c	stop_airo_card
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x2243ffa5	ath_reg_notifier_apply
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x31219afb	ath_is_world_regd
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x58a2c7c2	ath_regd_init
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xbe25b39d	ath_regd_get_band_ctl
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xd729b160	ath_rxbuf_alloc
+EXPORT_SYMBOL drivers/net/wireless/atmel 0x233b62d1	init_atmel_card
+EXPORT_SYMBOL drivers/net/wireless/atmel 0x8f87d11c	stop_atmel_card
+EXPORT_SYMBOL drivers/net/wireless/atmel 0xebbbb68d	atmel_open
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x078c6eb3	hostap_set_multicast_list_queue
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x0e530507	hostap_set_hostapd_sta
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x1067fe4e	hostap_handle_sta_tx_exc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x118b5dd1	hostap_80211_rx
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x16de686f	hostap_info_process
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x25778a05	hostap_remove_interface
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x29e2435d	hostap_init_data
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x4cb34aec	hostap_set_auth_algs
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x4ce894b9	hostap_set_encryption
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x536fa190	hostap_init_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x5560c9d6	hostap_master_start_xmit
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x5a581712	hostap_80211_ops
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x6f41d449	hostap_add_interface
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x792be0be	prism2_update_comms_qual
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x93eafdda	hostap_init_ap_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x9ac63d81	hostap_check_sta_fw_version
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x9eb74f5d	hostap_set_antsel
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa12ad27f	hostap_dump_tx_header
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa72c508d	hostap_set_roaming
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb2a945e0	hostap_dump_rx_header
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb4b77c8b	hostap_80211_get_hdrlen
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xbd2f320a	hostap_set_string
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xcaaffcb5	hostap_get_porttype
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xe48fb826	hostap_info_init
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xec6c115a	hostap_free_data
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xecfc6613	hostap_setup_dev
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf2b0e477	hostap_remove_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf2bbc65b	hostap_set_hostapd
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf84c4745	hostap_set_word
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x047b14ad	libipw_rx_mgt
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x07bcec16	libipw_get_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x0eafeb2b	libipw_xmit
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x2136be0d	alloc_ieee80211
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x233cc5a5	libipw_channel_to_index
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x28631ec9	libipw_channel_to_freq
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x30502193	libipw_wx_set_encodeext
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x435cd5a5	libipw_change_mtu
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x4d2fff12	libipw_networks_age
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x568cf5ae	libipw_wx_get_encode
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x6fb8c4a2	libipw_wx_get_encodeext
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x71ced517	libipw_get_channel_flags
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x80514c10	libipw_set_geo
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x8cd4918c	libipw_wx_set_encode
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x8e75bc56	libipw_get_geo
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x9b3c934a	libipw_is_valid_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x9d07fdfa	libipw_wx_get_scan
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xa11a15aa	libipw_rx
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xae1549a4	libipw_txb_free
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xe6ce1b2d	libipw_freq_to_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xed992833	free_ieee80211
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x03bb5936	iwl_scan_cancel_timeout
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x040f2b49	iwl_tt_enter_ct_kill
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0a87e766	iwl_cmd_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0a9c3a42	iwl_eeprom_query16
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0afee4bc	iwl_rx_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0ba46a4b	iwl_get_sta_id
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0cc6a6ce	iwl_full_rxon_required
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0cd386ba	iwl_check_rxon_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0f343c39	iwl_send_bt_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0f3a458f	iwl_mac_add_interface
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x10889ceb	iwl_set_tx_power
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1294797d	iwl_verify_ucode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x12f37bfa	iwl_init_channel_map
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1321a8ae	iwl_send_statistics_request
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x15daa550	iwl_rx_queue_space
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x18b17696	iwl_rx_pm_debug_statistics_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x19f0e900	iwl_debug_level
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1ae108a8	iwl_mac_beacon_update
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1c287a66	iwl_free_tfds_in_queue
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1cab172a	iwlcore_free_geos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d77b399	iwl_bcast_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1dd80be4	iwl_sta_rx_agg_start
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1e305413	iwl_update_tkip_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1e854eea	iwl_tx_ant_restriction
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1f605cbc	iwl_setup_rxon_timing
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x21c4792e	iwl_setup_mac
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x225b7fa5	iwl_rx_pm_sleep_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x226e4da1	iwl_txq_ctx_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x24589a6b	iwl_eeprom_check_version
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x24a95f48	iwlcore_eeprom_acquire_semaphore
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x24cb3189	iwlcore_eeprom_enhanced_txpower
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2500336e	iwl_rx_reply_rx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2501a114	iwl_mac_get_tx_stats
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x279fbd96	iwl_mac_remove_interface
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2ee2353f	iwl_txq_check_empty
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x30917005	iwl_configure_filter
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x34740c2e	iwl_bg_scan_check
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x355a7816	iwl_tx_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x396f4f68	iwl_ht_enabled
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3a654b40	iwl_hw_nic_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3abea2d0	iwl_uninit_drv
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4158ff98	iwl_free_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x43b4b6d5	iwl_add_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x44790077	iwl_send_cmd_pdu
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x464cc6a7	iwlcore_eeprom_query_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x47ad74bf	iwl_is_monitor_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x49109265	iwl_rxon_add_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4a8c7383	iwl_send_lq_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4c7ca92b	iwl_rx_reply_error
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4cc1087e	iwl_reset_run_time_calib
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4cf3b655	iwl_setup_rx_scan_handlers
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4eade525	iwl_rx_reply_rx_phy
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4ec076c6	iwl_hw_txq_ctx_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5065c5ba	iwl_connection_init_rx_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5140a7ce	iwl_rx_csa
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x573aff19	iwl_power_initialize
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x57cbf908	iwl_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5b37346d	iwl_rx_replenish
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5c6c945e	iwl_eeprom_query_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5de4f4d3	iwl_tt_exit_ct_kill
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x60774702	iwl_queue_space
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6166e8a4	iwl_sta_tx_modify_enable_tid
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6792ade4	iwl_bg_abort_scan
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x69382eb9	iwl_clear_stations_table
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6bf84507	iwl_get_passive_dwell_time
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6bfd77c4	iwl_reset_qos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6daf369a	iwl_tt_exit
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x710c7ce7	iwl_irq_handle_error
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7135c088	iwl_rxq_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7586a7d2	iwl_free_channel_map
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7866f38f	iwl_set_rxon_hwcrypto
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x78976e61	iwl_isr_legacy
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7972446d	iwl_mac_reset_tsf
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7b620d4e	iwl_set_dynamic_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7b650610	iwl_alloc_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7f0f2db3	iwl_mac_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7f5cf9ec	iwl_is_ht40_tx_allowed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8432e566	iwl_reset_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8670273d	iwl_hwrate_to_plcp_idx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8736f61d	iwl_rx_queue_restock
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8c6008c3	iwl_sta_rx_agg_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8c729d6c	iwl_init_sensitivity
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8fd79d21	iwl_disable_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x908d1e74	iwl_send_cmd_sync
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9231f530	iwl_tx_queue_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x999140d2	iwl_alloc_all
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9b1b06a7	iwl_pci_resume
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9b1b977a	iwl_txq_update_write_ptr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9d570387	iwl_tt_handler
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9da3e43d	iwl_fill_probe_req
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9df5c30e	iwl_set_decrypted_flag
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9faced57	iwl_calib_set
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa39d9677	iwl_eeprom_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa408dbde	iwl_tx_queue_reclaim
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa4a9aa87	iwl_set_rxon_ht
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa852f2d7	iwl_remove_default_wep_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa88cb74e	iwl_rx_replenish_now
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaa35bd8f	iwl_eeprom_get_mac
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xac417a0a	iwl_leds_register
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaf2a1fd1	iwl_scan_cancel
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaf2f2966	iwl_set_hw_params
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb52da533	iwl_sensitivity_calibration
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb6c579c0	iwl_leds_unregister
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb6f95fa6	iwl_activate_qos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb771aa97	iwl_eeprom_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb78b46d6	iwl_tx_skb
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb8ee263f	iwl_set_default_wep_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbe367511	iwl_mac_hw_scan
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbe52b3dc	iwl_rx_queue_update_write_ptr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbe93cea8	iwl_get_active_dwell_time
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbfed8ec1	iwl_get_ra_sta_id
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc0a5e52e	iwl_set_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc21e2cdc	iwl_rx_queue_alloc
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc4b28ff8	iwl_find_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc6395287	iwl_setup_scan_deferred_work
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc75d5470	iwlcore_eeprom_verify_signature
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc7794b30	iwl_bg_scan_completed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcbaf4931	get_cmd_string
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcd58bb0f	iwl_send_static_wepkey_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcea9323c	iwl_send_cmd_pdu_async
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcf8dbfa3	iwl_bss_info_changed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd0643dac	iwl_send_add_sta
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd133759b	iwl_tx_agg_start
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd5a3dbd0	iwl_remove_dynamic_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd5f155a4	iwl_rf_kill_ct_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd7bfd8a6	iwl_power_update_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd8a84cfa	iwl_tx_cmd_complete
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd9648504	iwlcore_init_geos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd97b443e	iwl_rx_missed_beacon_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xda55255d	iwl_rx_reply_compressed_ba
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe12394ab	iwl_tt_initialize
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe34703e9	iwl_mac_conf_tx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe380f90e	iwl_set_rxon_chain
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe7ce5d70	iwl_rates
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xea01039a	iwl_rate_get_lowest_plcp
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xec3249e6	iwl_send_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xee679fa5	iwl_init_drv
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xef26d878	iwl_rx_statistics
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf0a503ba	iwl_set_rxon_channel
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf23b85d5	iwl_get_free_ucode_key_index
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf43cbcb7	iwl_send_calib_results
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf5774d2d	iwlcore_eeprom_release_semaphore
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf6e47b1e	iwl_chain_noise_calibration
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf76314ed	iwl_hwrate_to_tx_control
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf8afe32a	iwl_hw_detect
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf9bb89f3	iwl_tx_agg_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf9ec3b6f	iwl_pci_suspend
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfd6a3a18	iwl_get_channel_info
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x0ce702d8	orinoco_up
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x27987b57	orinoco_init
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x2cf2c77b	alloc_orinocodev
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x3785aa92	orinoco_down
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x3d484541	free_orinocodev
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x4196c38b	hermes_write_ltv
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x6a927e18	orinoco_interrupt
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x934b1b91	orinoco_if_del
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xa031d8e4	hermes_doicmd_wait
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc60b5e9e	hermes_bap_pwrite
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd38d8ae2	hermes_read_ltv
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd3f714e5	hermes_bap_pread
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5168829	hermes_allocate
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5336e5d	hermes_init
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd54e219d	hermes_docmd_wait
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xed47b224	hermes_struct_init
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xf4f8870e	orinoco_if_add
+EXPORT_SYMBOL drivers/parport/parport 0x0215ec48	parport_read
+EXPORT_SYMBOL drivers/parport/parport 0x041bcb1c	parport_ieee1284_ecp_read_data
+EXPORT_SYMBOL drivers/parport/parport 0x0d52f84c	parport_wait_event
+EXPORT_SYMBOL drivers/parport/parport 0x1daec37a	parport_ieee1284_read_nibble
+EXPORT_SYMBOL drivers/parport/parport 0x241a5b79	parport_unregister_driver
+EXPORT_SYMBOL drivers/parport/parport 0x2947ce64	parport_unregister_device
+EXPORT_SYMBOL drivers/parport/parport 0x29a02bc9	parport_get_port
+EXPORT_SYMBOL drivers/parport/parport 0x3d168fa7	parport_ieee1284_ecp_write_data
+EXPORT_SYMBOL drivers/parport/parport 0x3eaaf719	parport_ieee1284_ecp_write_addr
+EXPORT_SYMBOL drivers/parport/parport 0x4048e90f	parport_claim_or_block
+EXPORT_SYMBOL drivers/parport/parport 0x40570739	parport_ieee1284_epp_write_data
+EXPORT_SYMBOL drivers/parport/parport 0x43eb7f87	parport_ieee1284_epp_write_addr
+EXPORT_SYMBOL drivers/parport/parport 0x4d2a941b	parport_ieee1284_interrupt
+EXPORT_SYMBOL drivers/parport/parport 0x50ce5119	parport_release
+EXPORT_SYMBOL drivers/parport/parport 0x567af616	parport_write
+EXPORT_SYMBOL drivers/parport/parport 0x693952ab	parport_set_timeout
+EXPORT_SYMBOL drivers/parport/parport 0x6a7d7b2f	parport_wait_peripheral
+EXPORT_SYMBOL drivers/parport/parport 0x70cfb32c	parport_find_number
+EXPORT_SYMBOL drivers/parport/parport 0x76a4cb5a	parport_register_device
+EXPORT_SYMBOL drivers/parport/parport 0x8e8b582f	parport_ieee1284_epp_read_addr
+EXPORT_SYMBOL drivers/parport/parport 0x93d46b7e	parport_negotiate
+EXPORT_SYMBOL drivers/parport/parport 0x9d5eff70	parport_irq_handler
+EXPORT_SYMBOL drivers/parport/parport 0xa0e2216e	parport_ieee1284_read_byte
+EXPORT_SYMBOL drivers/parport/parport 0xb0d9dfc3	parport_remove_port
+EXPORT_SYMBOL drivers/parport/parport 0xc7001878	parport_claim
+EXPORT_SYMBOL drivers/parport/parport 0xc9c18a68	parport_announce_port
+EXPORT_SYMBOL drivers/parport/parport 0xdee150c4	parport_register_port
+EXPORT_SYMBOL drivers/parport/parport 0xe6860dfa	parport_find_base
+EXPORT_SYMBOL drivers/parport/parport 0xef85a42a	parport_put_port
+EXPORT_SYMBOL drivers/parport/parport 0xefdad503	parport_ieee1284_epp_read_data
+EXPORT_SYMBOL drivers/parport/parport 0xfc2e4ae7	parport_register_driver
+EXPORT_SYMBOL drivers/parport/parport 0xfe69ae5b	parport_ieee1284_write_compat
+EXPORT_SYMBOL drivers/parport/parport_pc 0xcf45a167	parport_pc_probe_port
+EXPORT_SYMBOL drivers/parport/parport_pc 0xe3aa7e7e	parport_pc_unregister_port
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x0dfb6dab	pcmcia_loop_config
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x2bddeb14	pcmcia_request_window
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x3baf653d	pcmcia_request_irq
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x448e58c8	pcmcia_get_mem_page
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x480bf463	pcmcia_map_mem_page
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4fd033a0	pcmcia_error_func
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x549023d5	pcmcia_disable_device
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x8490f25e	pcmcia_release_window
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x9c4199c5	pcmcia_modify_configuration
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xa3fb2dc7	pcmcia_get_window
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xb05e4c5d	pcmcia_request_configuration
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xbc55b37a	pcmcia_access_configuration_register
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xc0e38af9	pcmcia_request_io
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xc6d687cf	pcmcia_unregister_driver
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xc7ce2006	pcmcia_dev_present
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xdd65c4fa	pcmcia_register_driver
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf0a25e12	pcmcia_error_ret
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x0055c5ec	pcmcia_socket_dev_resume
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x089893ca	pcmcia_replace_cis
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x0ba6bdc2	pcmcia_register_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x172ec6bd	pcmcia_socket_class
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x189d24ca	pccard_get_tuple_data
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x1e8cdbee	pcmcia_resume_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x1f4a02b6	pcmcia_adjust_io_region
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x212db8d2	pcmcia_socket_list
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x265f0bc7	pcmcia_find_mem_region
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x27a887ea	pcmcia_insert_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x2b98d8d9	pccard_get_next_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x2e8d088f	pccard_static_ops
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x490b50e6	pccard_get_first_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x576c6a39	pcmcia_socket_dev_early_resume
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x5d77b759	pccard_validate_cis
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x5f42a69d	pcmcia_socket_list_rwsem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x613e0a37	pcmcia_parse_events
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x657a9a49	pccard_register_pcmcia
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x78caa674	pcmcia_suspend_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x7fe02acc	pcmcia_get_socket_by_nr
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x8d0a6217	destroy_cis_cache
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x96f66f34	pcmcia_reset_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xa58738b6	pcmcia_read_cis_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xafa27882	pcmcia_write_cis_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xb2420fe4	pcmcia_socket_dev_late_resume
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xb2cb766d	release_cis_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xb2f6e098	pcmcia_validate_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc02ef2c8	pcmcia_parse_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc1ab7076	pcmcia_put_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc7770b48	pcmcia_unregister_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc9cae055	pcmcia_eject_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcf97f3bd	dead_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xdc94ae77	pcmcia_get_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xe6c992ed	pcmcia_find_io_region
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf300a5cc	pcmcia_socket_dev_suspend
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xff579c70	pccard_read_tuple
+EXPORT_SYMBOL drivers/pcmcia/rsrc_nonstatic 0x6ff0008e	pccard_nonstatic_ops
+EXPORT_SYMBOL drivers/platform/x86/sony-laptop 0x5bb1e117	sony_pic_camera_command
+EXPORT_SYMBOL drivers/pps/pps_core 0x1e145952	pps_unregister_source
+EXPORT_SYMBOL drivers/pps/pps_core 0xa7859d2c	pps_register_source
+EXPORT_SYMBOL drivers/pps/pps_core 0xe6a16116	pps_event
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x1aa1b27a	fcoe_ctlr_link_up
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x40e1e180	fcoe_ctlr_recv_flogi
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x478cebd8	fcoe_ctlr_link_down
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x746605e9	fcoe_ctlr_destroy
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x96bbe928	fcoe_ctlr_init
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xbd52a808	fcoe_ctlr_els_send
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xfdce82d1	fcoe_ctlr_recv
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x02f884ee	fc_fcp_complete
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x05ac2fa2	fc_frame_crc_check
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x06581ba9	fc_rport_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x06829a17	fc_set_mfs
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x076a0909	fc_seq_start_next
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0af357c3	fc_rport_terminate_io
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0d6a644a	fc_lport_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0e1aa9bd	fc_seq_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1e89b531	fc_get_host_port_type
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1f34c1a0	fc_linkdown
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x23d7bcc2	fc_exch_mgr_free
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x2f3f87b5	fc_exch_recv
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x36e5fbaf	fc_cpu_mask
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x38e450c3	fc_seq_els_rsp_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x4d84b5cd	fc_queuecommand
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x4e4971df	fc_lport_destroy
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x56183917	fc_destroy_rport
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x5a992a4f	fc_fcp_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x5c6ce5ad	fc_disc_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x5e1c4e43	fc_get_host_stats
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x67750428	fc_exch_done
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x76635229	fc_exch_mgr_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x7dec5eea	fc_get_host_port_state
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x7e89dec2	fc_fabric_login
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x99a612ce	fc_change_queue_depth
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa04fcaa9	fc_fcp_ddp_setup
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa086d6d9	fc_lport_config
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa1452125	fc_get_host_speed
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xacaa9653	fc_elsct_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xaf9e09ef	fc_lport_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xbfb26569	fc_linkup
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xc3e5d63b	fc_set_rport_loss_tmo
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xcbb7300c	fc_fabric_logoff
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xcbe26a04	fc_exch_mgr_add
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xcc6bedd9	fc_fcp_destroy
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xce97a6b8	fc_change_queue_type
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd2ecab45	fc_exch_mgr_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd382d183	fc_exch_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd6cb3359	fc_setup_rport
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xdc3ec222	fc_exch_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xde048c89	fc_exch_seq_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe1f6301d	fc_eh_host_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe335ad6e	fc_eh_device_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xeb6b61ba	fc_exch_mgr_del
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xedfa2b49	__fc_frame_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf7365d60	fc_seq_exch_abort
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xfd52d26f	fc_eh_abort
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xfdba77ec	fc_slave_alloc
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x11311100	mraid_mm_register_adp
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x2250c66e	mraid_mm_adapter_app_handle
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x512c956d	mraid_mm_unregister_adp
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x010d2654	osd_req_add_set_attr_list
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0c17edb1	osd_sec_init_nosec_doall_caps
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x263fb76c	osd_req_decode_get_attr_list
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x266354a6	osd_req_list_partition_objects
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x2e2d8dea	osd_req_set_attributes
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x3035aca6	osd_req_list_dev_partitions
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x34e7dc3d	osd_req_read
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x3aa08c4c	osd_execute_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x4038b612	osd_req_flush_collection
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x53168d1e	osd_req_create_partition
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x5c678449	osd_start_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x6434fb11	osd_auto_detect_ver
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x71474668	osd_req_remove_object
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x79bd067f	osd_req_add_get_attr_page
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x7c1739cc	osd_req_list_partition_collections
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x7d10dc4e	osd_req_remove_partition
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x811bb697	osd_dev_fini
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x839f5f87	osd_req_flush_object
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x8cf44704	osd_req_format
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x995f89e4	osd_finalize_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x9c2f1602	osd_req_decode_sense_full
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xa13c6c6f	osd_req_add_get_attr_list
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xaa05631c	osd_req_get_attributes
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xaa43625d	osd_req_flush_partition
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xac498aa9	osd_req_write
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xad4e07c2	osd_end_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xc2830054	osd_req_read_kern
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xc80ae2aa	osd_dev_init
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xcf65e36f	osd_execute_request_async
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xd6b82347	osd_req_create_object
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xd8e94c9e	osd_req_list_collection_objects
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xea8b0a1d	osd_req_write_kern
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xf421e97a	osd_req_flush_obsd
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x11bb3e0e	osduld_put_device
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x41c83dcd	osduld_path_lookup
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x5fc48609	osduld_unregister_test
+EXPORT_SYMBOL drivers/scsi/osd/osd 0xf038a93a	osduld_register_test
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x1a553651	qlogicfas408_info
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x30980b2d	qlogicfas408_biosparam
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x3fd8cd71	qlogicfas408_detect
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x43165783	qlogicfas408_disable_ints
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x7c6b0ff3	qlogicfas408_bus_reset
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xc3fc9fdd	qlogicfas408_abort
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xdc310b12	qlogicfas408_ihandl
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xe76b3b20	qlogicfas408_get_chip_type
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xf2b95199	qlogicfas408_setup
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xfb981d3b	qlogicfas408_queuecommand
+EXPORT_SYMBOL drivers/scsi/raid_class 0x68190eb6	raid_class_attach
+EXPORT_SYMBOL drivers/scsi/raid_class 0xd33820f0	raid_class_release
+EXPORT_SYMBOL drivers/scsi/raid_class 0xedc76326	raid_component_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x0725e25e	fc_vport_create
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x1433ac50	scsi_is_fc_rport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x39aa8028	fc_vport_terminate
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x3b4b2703	fc_remote_port_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x4c65ca51	fc_release_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x5f36369c	fc_remote_port_rolechg
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x7954b1ea	fc_get_event_number
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x939ff279	scsi_is_fc_vport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xafec3f02	fc_host_post_vendor_event
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xd52764e8	fc_remove_host
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xd6942034	fc_attach_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xf27eb2da	fc_host_post_event
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xfcb72d1b	fc_remote_port_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x10656e7b	sas_port_mark_backlink
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x154865bf	scsi_is_sas_rphy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x1a4a8648	sas_rphy_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x1cc60632	sas_remove_children
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x23c058c1	sas_expander_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x3158a624	scsi_is_sas_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x325d1cfb	sas_port_alloc_num
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x347ed3ff	sas_rphy_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x41fe7981	sas_port_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x46728972	sas_remove_host
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x53aa0048	sas_rphy_remove
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x74af1b3f	sas_phy_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x7754f0cd	sas_release_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x7d9983d6	sas_rphy_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x8d4ee569	sas_port_delete_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xa21e32f3	sas_phy_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xa6c8e46c	sas_port_add_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xc24fd6ca	sas_read_port_mode_page
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xc4307b21	sas_attach_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xd1198793	sas_port_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xdd674a39	sas_end_device_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xf013aecc	sas_port_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xf5b5a48b	sas_phy_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xfaae359e	scsi_is_sas_port
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xfcc4bec5	sas_phy_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xff89fc85	sas_port_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x15fdee01	spi_release_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x1e130a84	spi_dv_device
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x22e4aa90	spi_display_xfer_agreement
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x3686ea09	spi_print_msg
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x8bcba099	spi_schedule_dv_device
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0xfd6cb7f6	spi_attach_transport
+EXPORT_SYMBOL drivers/ssb/ssb 0x0831f90a	ssb_dma_translation
+EXPORT_SYMBOL drivers/ssb/ssb 0x08b715a5	ssb_bus_suspend
+EXPORT_SYMBOL drivers/ssb/ssb 0x1079447f	ssb_pcihost_register
+EXPORT_SYMBOL drivers/ssb/ssb 0x1e744b9d	ssb_pmu_set_ldo_paref
+EXPORT_SYMBOL drivers/ssb/ssb 0x3c25ea66	__ssb_driver_register
+EXPORT_SYMBOL drivers/ssb/ssb 0x4c436954	ssb_driver_unregister
+EXPORT_SYMBOL drivers/ssb/ssb 0x4d6ee1ef	ssb_bus_pcibus_register
+EXPORT_SYMBOL drivers/ssb/ssb 0x710c7468	ssb_dma_alloc_consistent
+EXPORT_SYMBOL drivers/ssb/ssb 0xa6cbf0ac	ssb_clockspeed
+EXPORT_SYMBOL drivers/ssb/ssb 0xb052b1c0	ssb_pmu_set_ldo_voltage
+EXPORT_SYMBOL drivers/ssb/ssb 0xc0447183	ssb_bus_may_powerdown
+EXPORT_SYMBOL drivers/ssb/ssb 0xc0512e0f	ssb_admatch_base
+EXPORT_SYMBOL drivers/ssb/ssb 0xc0dc93e5	ssb_bus_resume
+EXPORT_SYMBOL drivers/ssb/ssb 0xc6f0461a	ssb_device_enable
+EXPORT_SYMBOL drivers/ssb/ssb 0xc7eb942e	ssb_set_devtypedata
+EXPORT_SYMBOL drivers/ssb/ssb 0xd382e400	ssb_dma_free_consistent
+EXPORT_SYMBOL drivers/ssb/ssb 0xd481192b	ssb_admatch_size
+EXPORT_SYMBOL drivers/ssb/ssb 0xe28cb7a8	ssb_device_is_enabled
+EXPORT_SYMBOL drivers/ssb/ssb 0xe4c02de8	ssb_dma_set_mask
+EXPORT_SYMBOL drivers/ssb/ssb 0xf0ebb89a	ssb_pcicore_dev_irqvecs_enable
+EXPORT_SYMBOL drivers/ssb/ssb 0xf2e79232	ssb_bus_powerup
+EXPORT_SYMBOL drivers/ssb/ssb 0xf3536af4	ssb_bus_unregister
+EXPORT_SYMBOL drivers/ssb/ssb 0xf3751ce5	ssb_bus_sdiobus_register
+EXPORT_SYMBOL drivers/ssb/ssb 0xfa40b2a9	ssb_device_disable
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x0cd330f4	range_unknown
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x195cf162	check_chanlist
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x2c242af0	comedi_get_subdevice_runflags
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x2f0ad9d3	range_bipolar5
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x3123c4f9	comedi_buf_write_alloc
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x491418e3	comedi_buf_read_free
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x4fd9d954	comedi_set_subdevice_runflags
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x4fe634f3	range_bipolar2_5
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x56f8a5a7	comedi_reset_async_buf
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x786160f4	comedi_buf_read_n_available
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x8113872c	range_unipolar10
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x8531c662	comedi_buf_get
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x9380a2b5	comedi_buf_memcpy_to
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x93a09c29	comedi_buf_read_alloc
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x97320e03	comedi_buf_put
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x992b10e4	comedi_event
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xaca2c440	comedi_driver_register
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xb2d558a9	comedi_driver_unregister
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xbb52fc7f	range_bipolar10
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xbb83f6ad	comedi_buf_write_free
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xcb92918a	comedi_error
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xdb2044b2	range_unipolar5
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xe9021ffe	comedi_buf_memcpy_from
+EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0x333224f8	subdev_8255_interrupt
+EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0xb102fbe4	subdev_8255_cleanup
+EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0xb5aa36bf	subdev_8255_init_irq
+EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0xf8d6c38a	subdev_8255_init
+EXPORT_SYMBOL drivers/staging/comedi/drivers/comedi_fc 0x4b43044a	cfc_write_array_to_buffer
+EXPORT_SYMBOL drivers/staging/comedi/drivers/comedi_fc 0xc344be4c	cfc_handle_events
+EXPORT_SYMBOL drivers/staging/comedi/drivers/comedi_fc 0xe6764634	cfc_read_array_from_buffer
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x08194808	mite_request_channel_in_range
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x0be10fda	mite_setup
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x2b65ecb3	mite_bytes_written_to_memory_ub
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x33436e50	mite_bytes_written_to_memory_lb
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x40de2a9d	mite_prep_dma
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x4fcf3649	mite_release_channel
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x5b0e4868	mite_dma_disarm
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x6e070b61	mite_bytes_read_from_memory_lb
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x6e5e8073	mite_buf_change
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x76218982	mite_bytes_read_from_memory_ub
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x76e6775f	mite_bytes_in_transit
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x7d74152b	mite_sync_output_dma
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x897f2949	mite_dma_arm
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x95cdab7e	mite_dma_tcr
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xac237ad7	mite_devices
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xacdc8b80	mite_setup2
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xc3da04f7	mite_get_status
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xceb7d91c	mite_sync_input_dma
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xe01674a1	mite_unsetup
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xfb3ba025	mite_list_devices
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xffdbc294	mite_done
+EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0x73472d88	subdev_700_cleanup
+EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0x77dced41	subdev_700_init_irq
+EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0x800e19eb	subdev_700_interrupt
+EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0xe21008be	subdev_700_init
+EXPORT_SYMBOL drivers/staging/comedi/drivers/pcm_common 0x54fd0d6d	comedi_pcm_cmdtest
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x042d55f4	comedi_loglevel
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x0488ce0e	comedi_get_n_ranges
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x0cad1c36	comedi_get_subdevice_type
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x13e3042c	comedi_command
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x194eb4ae	comedi_get_n_channels
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x1c5555d9	comedi_cancel
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x1ec0e2d3	comedi_get_buf_head_pos
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x22318694	comedi_set_user_int_count
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x262e9c18	comedi_dio_write
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x370d69d5	comedi_dio_read
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x3cb614fc	comedi_data_write
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x3db41e4f	comedi_poll
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x3de6a4a3	comedi_get_buffer_offset
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x409d3263	comedi_do_insn
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x51da786d	comedi_register_callback
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x52769094	comedi_find_subdevice_by_type
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x628ed463	comedi_get_n_subdevices
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x671c2623	comedi_get_buffer_size
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x696272c9	comedi_unlock
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x826bd656	comedi_data_read_delayed
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x8e199bbf	comedi_perror
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x8fb4413e	comedi_data_read_hint
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x9b266320	comedi_get_krange
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x9dde39b5	comedi_strerror
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xa0334b40	comedi_get_driver_name
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xa094eab0	comedi_get_board_name
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xa7c55c52	comedi_open
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xaa456501	comedi_mark_buffer_read
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xb45b8b7b	comedi_mark_buffer_written
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xb5396dad	comedi_get_maxdata
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xb5c3ac2a	comedi_map
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xc4ec62b3	comedi_get_len_chanlist
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xc7d949df	comedi_lock
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xd2a9a259	comedi_get_version_code
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xd46a9468	comedi_dio_config
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xd48facbb	comedi_command_test
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xddd89421	comedi_close
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xe2208940	comedi_data_read
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xe38c6fb4	comedi_unmap
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xed5731a4	comedi_get_subdevice_flags
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xefd0c778	comedi_fileno
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xf17e03df	comedi_dio_bitfield
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xf71581db	comedi_get_buffer_contents
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x15b3f68d	cx25821_set_gpiopin_direction
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x3eb4ae46	cx25821_sram_channel_setup_audio
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x471e1cfb	cx25821_devlist
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x67cc5b8b	cx25821_sram_channels
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x784853c3	cx25821_print_irqbits
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x91d2ff8c	cx25821_sram_channel_setup
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0xb82d7880	cx25821_dev_get
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0xbe18dbe5	cx25821_risc_databuffer_audio
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0xd8407070	cx25821_dev_unregister
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0xeb5cd569	cx25821_sram_channel_dump_audio
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0xfbfad699	cx25821_sram_channel_dump
+EXPORT_SYMBOL drivers/staging/hv/hv_vmbus 0x253f3d14	vmbus_get_interface
+EXPORT_SYMBOL drivers/staging/hv/hv_vmbus 0x6730ff1e	vmbus_child_driver_register
+EXPORT_SYMBOL drivers/staging/hv/hv_vmbus 0x91a1e345	vmbus_child_driver_unregister
+EXPORT_SYMBOL drivers/staging/hv/hv_vmbus 0xdf1a5ef6	vmbus_loglevel
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x151918d6	iio_device_unregister
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x19bb3244	iio_remove_event_from_list
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x2e8ef98f	__iio_push_event
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x3f512fe9	iio_unregister_interrupt_line
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x6b43f4bd	iio_register_interrupt_line
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x739ae300	iio_devt
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x77941afa	iio_allocate_device
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x77a91284	iio_class
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x89b73dcf	iio_read_const_attr
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xb214a551	iio_device_register
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xcb842df9	__iio_change_event
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xd92f55db	iio_add_event_to_list
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xdaa508a5	iio_push_event
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xea831a6b	iio_get_new_idr_val
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xf57a4aa3	iio_free_device
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xfcfb4aae	iio_free_idr_val
+EXPORT_SYMBOL drivers/staging/line6/line6usb 0x350703f2	variax_create_files
+EXPORT_SYMBOL drivers/staging/line6/line6usb 0x35def164	pod_create_files
+EXPORT_SYMBOL drivers/staging/line6/line6usb 0x62664f49	variax_remove_files
+EXPORT_SYMBOL drivers/staging/line6/line6usb 0xa2b2144a	pod_remove_files
+EXPORT_SYMBOL drivers/staging/rar/rar_driver 0xf8017f03	get_rar_address
+EXPORT_SYMBOL drivers/staging/vme/vme 0x00d7e722	vme_lm_count
+EXPORT_SYMBOL drivers/staging/vme/vme 0x072f901c	vme_master_rmw
+EXPORT_SYMBOL drivers/staging/vme/vme 0x0e10859d	vme_lm_get
+EXPORT_SYMBOL drivers/staging/vme/vme 0x0ec5babe	vme_dma_free
+EXPORT_SYMBOL drivers/staging/vme/vme 0x1c1e7371	vme_master_request
+EXPORT_SYMBOL drivers/staging/vme/vme 0x20992b00	vme_lm_request
+EXPORT_SYMBOL drivers/staging/vme/vme 0x295ae576	vme_request_irq
+EXPORT_SYMBOL drivers/staging/vme/vme 0x295c6b76	vme_request_dma
+EXPORT_SYMBOL drivers/staging/vme/vme 0x3f68d4cf	vme_lm_set
+EXPORT_SYMBOL drivers/staging/vme/vme 0x43e2f154	vme_master_read
+EXPORT_SYMBOL drivers/staging/vme/vme 0x48b99a13	vme_lm_free
+EXPORT_SYMBOL drivers/staging/vme/vme 0x5c0b200d	vme_bus_type
+EXPORT_SYMBOL drivers/staging/vme/vme 0x5f96b85d	vme_generate_irq
+EXPORT_SYMBOL drivers/staging/vme/vme 0x601e7bc4	vme_slave_request
+EXPORT_SYMBOL drivers/staging/vme/vme 0x6666140f	vme_dma_pci_attribute
+EXPORT_SYMBOL drivers/staging/vme/vme 0x72646cc1	vme_register_bridge
+EXPORT_SYMBOL drivers/staging/vme/vme 0x76bab4d4	vme_master_set
+EXPORT_SYMBOL drivers/staging/vme/vme 0x7754663b	vme_alloc_consistent
+EXPORT_SYMBOL drivers/staging/vme/vme 0x7797a741	vme_dma_vme_attribute
+EXPORT_SYMBOL drivers/staging/vme/vme 0x7cf35220	vme_master_free
+EXPORT_SYMBOL drivers/staging/vme/vme 0x880d8250	vme_new_dma_list
+EXPORT_SYMBOL drivers/staging/vme/vme 0x92fa5abb	vme_lm_detach
+EXPORT_SYMBOL drivers/staging/vme/vme 0x946e5eb2	vme_unregister_bridge
+EXPORT_SYMBOL drivers/staging/vme/vme 0x9aeb07e8	vme_lm_attach
+EXPORT_SYMBOL drivers/staging/vme/vme 0x9d279035	vme_master_write
+EXPORT_SYMBOL drivers/staging/vme/vme 0xa09d045f	vme_get_size
+EXPORT_SYMBOL drivers/staging/vme/vme 0xaba1c4a1	vme_free_irq
+EXPORT_SYMBOL drivers/staging/vme/vme 0xc8352002	vme_dma_pattern_attribute
+EXPORT_SYMBOL drivers/staging/vme/vme 0xcc5b0af0	vme_slave_set
+EXPORT_SYMBOL drivers/staging/vme/vme 0xcd2c5c01	vme_dma_list_add
+EXPORT_SYMBOL drivers/staging/vme/vme 0xd2f453fb	vme_slot_get
+EXPORT_SYMBOL drivers/staging/vme/vme 0xdf6c000d	vme_dma_list_free
+EXPORT_SYMBOL drivers/staging/vme/vme 0xdff905e5	vme_slave_free
+EXPORT_SYMBOL drivers/staging/vme/vme 0xe60cbb2f	vme_master_get
+EXPORT_SYMBOL drivers/staging/vme/vme 0xe61b1e0b	vme_slave_get
+EXPORT_SYMBOL drivers/staging/vme/vme 0xeccbeafc	vme_dma_free_attribute
+EXPORT_SYMBOL drivers/staging/vme/vme 0xeda9cbaa	vme_register_driver
+EXPORT_SYMBOL drivers/staging/vme/vme 0xf1b1bb11	vme_free_consistent
+EXPORT_SYMBOL drivers/staging/vme/vme 0xf5381a81	vme_dma_list_exec
+EXPORT_SYMBOL drivers/staging/vme/vme 0xfaf9c247	vme_unregister_driver
+EXPORT_SYMBOL drivers/telephony/ixj 0x40c61efd	ixj_pcmcia_probe
+EXPORT_SYMBOL drivers/telephony/phonedev 0x6861c3f2	phone_unregister_device
+EXPORT_SYMBOL drivers/telephony/phonedev 0x93e2965b	phone_register_device
+EXPORT_SYMBOL drivers/usb/gadget/dummy_hcd 0x6ac227f6	usb_gadget_register_driver
+EXPORT_SYMBOL drivers/usb/gadget/dummy_hcd 0x8ac78cdc	net2280_set_fifo_mode
+EXPORT_SYMBOL drivers/usb/gadget/dummy_hcd 0xef07c11f	usb_gadget_unregister_driver
+EXPORT_SYMBOL drivers/usb/host/sl811-hcd 0x9ddc6a05	sl811h_driver
+EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xa64a4cea	usb_nop_xceiv_unregister
+EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xd0e43207	usb_nop_xceiv_register
+EXPORT_SYMBOL drivers/usb/serial/usbserial 0x4166125b	usb_serial_suspend
+EXPORT_SYMBOL drivers/usb/serial/usbserial 0x8739a679	usb_serial_resume
+EXPORT_SYMBOL drivers/video/backlight/generic_bl 0xc86baa7c	corgibl_limit_intensity
+EXPORT_SYMBOL drivers/video/backlight/lcd 0x0c33df67	lcd_device_register
+EXPORT_SYMBOL drivers/video/backlight/lcd 0x44173d99	lcd_device_unregister
+EXPORT_SYMBOL drivers/video/console/bitblit 0x603bb13a	fbcon_set_bitops
+EXPORT_SYMBOL drivers/video/console/font 0x09c8eb55	font_vga_8x16
+EXPORT_SYMBOL drivers/video/console/font 0xbb99125c	get_default_font
+EXPORT_SYMBOL drivers/video/console/font 0xf7584a9c	find_font
+EXPORT_SYMBOL drivers/video/console/softcursor 0x2e7441a9	soft_cursor
+EXPORT_SYMBOL drivers/video/console/tileblit 0xedf445e5	fbcon_set_tileops
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x0b899388	cyber2000fb_attach
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x0c3b23f1	cyber2000fb_enable_extregs
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x0cc3ede5	cyber2000fb_detach
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x72663af7	cyber2000fb_get_fb_var
+EXPORT_SYMBOL drivers/video/cyber2000fb 0xaf5beef9	cyber2000fb_disable_extregs
+EXPORT_SYMBOL drivers/video/display/display 0x4a368e2d	display_device_unregister
+EXPORT_SYMBOL drivers/video/display/display 0x4d297708	display_device_register
+EXPORT_SYMBOL drivers/video/macmodes 0x08ed0b62	mac_vmode_to_var
+EXPORT_SYMBOL drivers/video/macmodes 0x67f3d0ac	mac_find_mode
+EXPORT_SYMBOL drivers/video/macmodes 0xe2304303	mac_map_monitor_sense
+EXPORT_SYMBOL drivers/video/matrox/g450_pll 0x3efd0081	matroxfb_g450_setpll_cond
+EXPORT_SYMBOL drivers/video/matrox/g450_pll 0x66c4d744	g450_mnp2f
+EXPORT_SYMBOL drivers/video/matrox/g450_pll 0xe20fb6df	matroxfb_g450_setclk
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0x1bb43698	matrox_mystique
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0x232f651a	matrox_G100
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0xd083e88e	DAC1064_global_init
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0xf8d56be4	DAC1064_global_restore
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_Ti3026 0x25fea07e	matrox_millennium
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_accel 0x64202541	matrox_cfbX_init
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0x01c64582	matroxfb_enable_irq
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0x6f44e40c	matroxfb_wait_for_sync
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0x6f886bfe	matroxfb_unregister_driver
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0xf7374fb0	matroxfb_register_driver
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_g450 0x68509f40	matroxfb_g450_shutdown
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_g450 0xc7c29ca7	matroxfb_g450_connect
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x209cec96	matroxfb_read_pins
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x25cf8049	matroxfb_PLL_calcclock
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x3bdee0c1	matroxfb_vgaHWrestore
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x450010c8	matroxfb_DAC_out
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x60691a1b	matroxfb_DAC_in
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0xabd8e427	matroxfb_var2my
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0xda94dfa9	matroxfb_vgaHWinit
+EXPORT_SYMBOL drivers/video/output 0xb6246a13	video_output_unregister
+EXPORT_SYMBOL drivers/video/output 0xda86c6dc	video_output_register
+EXPORT_SYMBOL drivers/video/sis/sisfb 0x3037658e	sis_malloc
+EXPORT_SYMBOL drivers/video/sis/sisfb 0x454a3cf0	sis_free
+EXPORT_SYMBOL drivers/video/svgalib 0x00d1fce9	svga_set_default_seq_regs
+EXPORT_SYMBOL drivers/video/svgalib 0x063d828d	svga_settile
+EXPORT_SYMBOL drivers/video/svgalib 0x06b1ca12	svga_tilecopy
+EXPORT_SYMBOL drivers/video/svgalib 0x07b3da30	svga_wseq_multi
+EXPORT_SYMBOL drivers/video/svgalib 0x1b95c56a	svga_check_timings
+EXPORT_SYMBOL drivers/video/svgalib 0x63e898d1	svga_set_default_crt_regs
+EXPORT_SYMBOL drivers/video/svgalib 0x7a3ae959	svga_wcrt_multi
+EXPORT_SYMBOL drivers/video/svgalib 0x80373a6d	svga_tileblit
+EXPORT_SYMBOL drivers/video/svgalib 0x80408443	svga_set_timings
+EXPORT_SYMBOL drivers/video/svgalib 0x85bbada0	svga_tilefill
+EXPORT_SYMBOL drivers/video/svgalib 0x8fa8438b	svga_set_textmode_vga_regs
+EXPORT_SYMBOL drivers/video/svgalib 0x8fcf383d	svga_tilecursor
+EXPORT_SYMBOL drivers/video/svgalib 0xab3b22ad	svga_set_default_gfx_regs
+EXPORT_SYMBOL drivers/video/svgalib 0xcfb8352f	svga_get_tilemax
+EXPORT_SYMBOL drivers/video/svgalib 0xdad682b1	svga_set_default_atc_regs
+EXPORT_SYMBOL drivers/video/svgalib 0xe07aba44	svga_get_caps
+EXPORT_SYMBOL drivers/video/svgalib 0xec83c473	svga_match_format
+EXPORT_SYMBOL drivers/video/svgalib 0xef774f5d	svga_compute_pll
+EXPORT_SYMBOL drivers/video/syscopyarea 0x8c65e61a	sys_copyarea
+EXPORT_SYMBOL drivers/video/sysfillrect 0x50545516	sys_fillrect
+EXPORT_SYMBOL drivers/video/sysimgblt 0x93198ff2	sys_imageblit
+EXPORT_SYMBOL drivers/video/vgastate 0x686de290	restore_vga
+EXPORT_SYMBOL drivers/video/vgastate 0xe7a2620e	save_vga
+EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x13b00025	w1_bq27000_write
+EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x5be93165	w1_bq27000_read
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x0261b073	w1_ds2760_read
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x0ed22a33	w1_ds2760_store_eeprom
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x17543457	w1_ds2760_write
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x5918c1d5	w1_ds2760_recall_eeprom
+EXPORT_SYMBOL drivers/w1/wire 0x285f95a6	w1_add_master_device
+EXPORT_SYMBOL drivers/w1/wire 0x8dacbeee	w1_unregister_family
+EXPORT_SYMBOL drivers/w1/wire 0x9ac36368	w1_remove_master_device
+EXPORT_SYMBOL drivers/w1/wire 0xb988e1d8	w1_register_family
+EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0x04e133fc	iTCO_vendor_check_noreboot_on
+EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0x672c9d44	iTCO_vendor_pre_keepalive
+EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xa78bd894	iTCO_vendor_pre_set_heartbeat
+EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xa8d6daac	iTCO_vendor_pre_start
+EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xd0efe320	iTCO_vendor_pre_stop
+EXPORT_SYMBOL fs/configfs/configfs 0x02b180d6	config_group_init_type_name
+EXPORT_SYMBOL fs/configfs/configfs 0x07ae6098	config_item_put
+EXPORT_SYMBOL fs/configfs/configfs 0x31ce428c	configfs_register_subsystem
+EXPORT_SYMBOL fs/configfs/configfs 0x6030c8ff	config_group_init
+EXPORT_SYMBOL fs/configfs/configfs 0x6b64dfed	configfs_unregister_subsystem
+EXPORT_SYMBOL fs/configfs/configfs 0x7935d7eb	configfs_undepend_item
+EXPORT_SYMBOL fs/configfs/configfs 0x7994fd20	config_group_find_item
+EXPORT_SYMBOL fs/configfs/configfs 0xa0683287	config_item_init_type_name
+EXPORT_SYMBOL fs/configfs/configfs 0xa9468e4c	config_item_get
+EXPORT_SYMBOL fs/configfs/configfs 0xb702caf3	configfs_depend_item
+EXPORT_SYMBOL fs/configfs/configfs 0xf11e92b0	config_item_set_name
+EXPORT_SYMBOL fs/configfs/configfs 0xf17ac4dd	config_item_init
+EXPORT_SYMBOL fs/fscache/fscache 0x0173969d	fscache_mark_pages_cached
+EXPORT_SYMBOL fs/fscache/fscache 0x06b56372	__fscache_wait_on_page_write
+EXPORT_SYMBOL fs/fscache/fscache 0x07d9b576	fscache_wait_bit_interruptible
+EXPORT_SYMBOL fs/fscache/fscache 0x100f309e	fscache_add_cache
+EXPORT_SYMBOL fs/fscache/fscache 0x128d16f0	__fscache_relinquish_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0x1767c331	fscache_withdraw_cache
+EXPORT_SYMBOL fs/fscache/fscache 0x1854c780	__fscache_check_page_write
+EXPORT_SYMBOL fs/fscache/fscache 0x1ec6b509	fscache_object_lookup_negative
+EXPORT_SYMBOL fs/fscache/fscache 0x3fc23318	fscache_wait_bit
+EXPORT_SYMBOL fs/fscache/fscache 0x44917f66	fscache_io_error
+EXPORT_SYMBOL fs/fscache/fscache 0x496932b9	fscache_op_debug_id
+EXPORT_SYMBOL fs/fscache/fscache 0x5331ea08	__fscache_read_or_alloc_pages
+EXPORT_SYMBOL fs/fscache/fscache 0x549dbbbd	fscache_enqueue_operation
+EXPORT_SYMBOL fs/fscache/fscache 0x63f96884	fscache_cache_cleared_wq
+EXPORT_SYMBOL fs/fscache/fscache 0x698a4e97	__fscache_maybe_release_page
+EXPORT_SYMBOL fs/fscache/fscache 0x6ec49bee	fscache_obtained_object
+EXPORT_SYMBOL fs/fscache/fscache 0x82775ec1	fscache_check_aux
+EXPORT_SYMBOL fs/fscache/fscache 0x86f8894f	fscache_object_states
+EXPORT_SYMBOL fs/fscache/fscache 0x94603545	__fscache_alloc_page
+EXPORT_SYMBOL fs/fscache/fscache 0xaedc0f28	__fscache_read_or_alloc_page
+EXPORT_SYMBOL fs/fscache/fscache 0xb504e0f5	__fscache_register_netfs
+EXPORT_SYMBOL fs/fscache/fscache 0xb702edd9	__fscache_write_page
+EXPORT_SYMBOL fs/fscache/fscache 0xb7444b3d	__fscache_update_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0xc46b380c	__fscache_attr_changed
+EXPORT_SYMBOL fs/fscache/fscache 0xd3912021	__fscache_uncache_page
+EXPORT_SYMBOL fs/fscache/fscache 0xd9c8edd5	fscache_init_cache
+EXPORT_SYMBOL fs/fscache/fscache 0xda1693e7	fscache_fsdef_index
+EXPORT_SYMBOL fs/fscache/fscache 0xf11d9a9f	fscache_put_operation
+EXPORT_SYMBOL fs/fscache/fscache 0xf6ba2722	fscache_object_slow_work_ops
+EXPORT_SYMBOL fs/fscache/fscache 0xf96676f0	__fscache_acquire_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0xfee4810d	__fscache_unregister_netfs
+EXPORT_SYMBOL fs/nfsd/nfsd 0x1f573533	nfs4_acl_posix_to_nfsv4
+EXPORT_SYMBOL fs/nfsd/nfsd 0x35e33c1e	nfs4_acl_write_who
+EXPORT_SYMBOL fs/nfsd/nfsd 0x5a157ae4	nfs4_acl_get_whotype
+EXPORT_SYMBOL fs/nfsd/nfsd 0x96ce9bb4	nfs4_acl_new
+EXPORT_SYMBOL fs/nfsd/nfsd 0xdb389aec	nfs4_acl_nfsv4_to_posix
+EXPORT_SYMBOL fs/quota/quota_tree 0x23da5e85	qtree_write_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0x31035955	qtree_entry_unused
+EXPORT_SYMBOL fs/quota/quota_tree 0x7596d97d	qtree_release_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0xaaaec9ca	qtree_read_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0xaec9027f	qtree_delete_dquot
+EXPORT_SYMBOL lib/crc-ccitt 0x651c2313	crc_ccitt
+EXPORT_SYMBOL lib/crc-ccitt 0x75811312	crc_ccitt_table
+EXPORT_SYMBOL lib/crc-itu-t 0x276c7e62	crc_itu_t
+EXPORT_SYMBOL lib/crc-itu-t 0xd29b009f	crc_itu_t_table
+EXPORT_SYMBOL lib/crc7 0xc086bfba	crc7
+EXPORT_SYMBOL lib/crc7 0xd80c3603	crc7_syndrome_table
+EXPORT_SYMBOL lib/libcrc32c 0x27000b29	crc32c
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x315c65fd	zlib_deflateInit2
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x48034724	zlib_deflateReset
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xaf64ad0d	zlib_deflate
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf0caf44b	zlib_deflate_workspacesize
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf741c793	zlib_deflateEnd
+EXPORT_SYMBOL net/802/p8023 0x25655f61	make_8023_client
+EXPORT_SYMBOL net/802/p8023 0xca9bfdfa	destroy_8023_client
+EXPORT_SYMBOL net/9p/9pnet 0x0b3ac49a	p9pdu_dump
+EXPORT_SYMBOL net/9p/9pnet 0x0c08973f	p9_client_destroy
+EXPORT_SYMBOL net/9p/9pnet 0x1221f95e	p9_client_walk
+EXPORT_SYMBOL net/9p/9pnet 0x19cb7d2a	p9_client_wstat
+EXPORT_SYMBOL net/9p/9pnet 0x1c3b51e4	p9_client_fcreate
+EXPORT_SYMBOL net/9p/9pnet 0x2160ec26	p9_client_clunk
+EXPORT_SYMBOL net/9p/9pnet 0x244c6d40	p9_idpool_get
+EXPORT_SYMBOL net/9p/9pnet 0x2b560613	v9fs_get_trans_by_name
+EXPORT_SYMBOL net/9p/9pnet 0x3c9d0405	p9_tag_lookup
+EXPORT_SYMBOL net/9p/9pnet 0x3d73a797	p9_errstr2errno
+EXPORT_SYMBOL net/9p/9pnet 0x3da35774	v9fs_unregister_trans
+EXPORT_SYMBOL net/9p/9pnet 0x41e6bc51	p9_parse_header
+EXPORT_SYMBOL net/9p/9pnet 0x4a27e92e	p9_client_create
+EXPORT_SYMBOL net/9p/9pnet 0x5e0ef374	p9_idpool_check
+EXPORT_SYMBOL net/9p/9pnet 0x61852dea	p9_idpool_put
+EXPORT_SYMBOL net/9p/9pnet 0x683efc21	v9fs_register_trans
+EXPORT_SYMBOL net/9p/9pnet 0x6c5e479c	p9_idpool_create
+EXPORT_SYMBOL net/9p/9pnet 0x76b79bf1	p9stat_read
+EXPORT_SYMBOL net/9p/9pnet 0x7cbbdb91	p9_client_disconnect
+EXPORT_SYMBOL net/9p/9pnet 0x85bd8fc3	p9_client_attach
+EXPORT_SYMBOL net/9p/9pnet 0x85cfa6ec	p9_client_cb
+EXPORT_SYMBOL net/9p/9pnet 0x906bd673	p9_client_auth
+EXPORT_SYMBOL net/9p/9pnet 0x93fc0779	p9_client_write
+EXPORT_SYMBOL net/9p/9pnet 0x9c964743	p9stat_free
+EXPORT_SYMBOL net/9p/9pnet 0x9ec9a221	p9_client_remove
+EXPORT_SYMBOL net/9p/9pnet 0xaa08b09a	p9_client_stat
+EXPORT_SYMBOL net/9p/9pnet 0xbaa17b44	p9_idpool_destroy
+EXPORT_SYMBOL net/9p/9pnet 0xc1c4fa03	p9_client_open
+EXPORT_SYMBOL net/9p/9pnet 0xc32e8895	p9_client_read
+EXPORT_SYMBOL net/9p/9pnet 0xd0af5654	v9fs_get_default_trans
+EXPORT_SYMBOL net/9p/9pnet 0xe58a3360	p9_error_init
+EXPORT_SYMBOL net/9p/9pnet 0xf199a8a0	p9_client_version
+EXPORT_SYMBOL net/appletalk/appletalk 0x6180d1ec	alloc_ltalkdev
+EXPORT_SYMBOL net/appletalk/appletalk 0x6b9233f4	atrtr_get_dev
+EXPORT_SYMBOL net/appletalk/appletalk 0xc26d7db9	atalk_find_dev_addr
+EXPORT_SYMBOL net/appletalk/appletalk 0xf37915c7	aarp_send_ddp
+EXPORT_SYMBOL net/atm/atm 0x04198198	atm_dev_lookup
+EXPORT_SYMBOL net/atm/atm 0x1a24e5e2	sonet_subtract_stats
+EXPORT_SYMBOL net/atm/atm 0x2cc2d52d	vcc_hash
+EXPORT_SYMBOL net/atm/atm 0x64331d4b	atm_alloc_charge
+EXPORT_SYMBOL net/atm/atm 0x6d1ced27	vcc_sklist_lock
+EXPORT_SYMBOL net/atm/atm 0x767fb343	register_atm_ioctl
+EXPORT_SYMBOL net/atm/atm 0x89195dc3	sonet_copy_stats
+EXPORT_SYMBOL net/atm/atm 0xb48f72a6	atm_dev_deregister
+EXPORT_SYMBOL net/atm/atm 0xb6f3d77e	vcc_insert_socket
+EXPORT_SYMBOL net/atm/atm 0xbf7837f0	vcc_release_async
+EXPORT_SYMBOL net/atm/atm 0xc67412b5	atm_init_aal5
+EXPORT_SYMBOL net/atm/atm 0xe1c470ec	deregister_atm_ioctl
+EXPORT_SYMBOL net/atm/atm 0xe50867ac	atm_charge
+EXPORT_SYMBOL net/atm/atm 0xf1fe79ae	atm_dev_register
+EXPORT_SYMBOL net/atm/atm 0xf3a08f80	atm_proc_root
+EXPORT_SYMBOL net/atm/atm 0xf49bc67a	atm_pcr_goal
+EXPORT_SYMBOL net/ax25/ax25 0x1e08634e	ax25_rebuild_header
+EXPORT_SYMBOL net/ax25/ax25 0x22afff56	ax25_linkfail_register
+EXPORT_SYMBOL net/ax25/ax25 0x242852b9	ax25_uid_policy
+EXPORT_SYMBOL net/ax25/ax25 0x3c886070	ax25_send_frame
+EXPORT_SYMBOL net/ax25/ax25 0x3d2d82ec	ax25_display_timer
+EXPORT_SYMBOL net/ax25/ax25 0x3eecf9e1	ax25_header_ops
+EXPORT_SYMBOL net/ax25/ax25 0x4502c65a	asc2ax
+EXPORT_SYMBOL net/ax25/ax25 0x53dea1ff	ax2asc
+EXPORT_SYMBOL net/ax25/ax25 0x5fc6280f	ax25_findbyuid
+EXPORT_SYMBOL net/ax25/ax25 0x6082e041	ax25_listen_release
+EXPORT_SYMBOL net/ax25/ax25 0x6c9a8825	ax25_hard_header
+EXPORT_SYMBOL net/ax25/ax25 0x8ede9e26	ax25_protocol_release
+EXPORT_SYMBOL net/ax25/ax25 0xa1a98c19	ax25_linkfail_release
+EXPORT_SYMBOL net/ax25/ax25 0xb06876a7	ax25_find_cb
+EXPORT_SYMBOL net/ax25/ax25 0xc1444946	ax25cmp
+EXPORT_SYMBOL net/ax25/ax25 0xcdd17d7a	ax25_listen_register
+EXPORT_SYMBOL net/ax25/ax25 0xd43ecbf1	null_ax25_address
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x093d4d62	bt_sock_poll
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x0be7d7e4	bt_accept_enqueue
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x137d1b13	hci_recv_fragment
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x289173d6	hci_free_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x28c77c8e	hci_register_cb
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x2d60baca	hci_unregister_cb
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x34114672	hci_connect
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x34918d00	hci_unregister_proto
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x3579aa42	hci_get_route
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x41fd739f	bt_sock_recvmsg
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x42be10a9	bt_accept_unlink
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x477ec1ee	bt_sock_wait_state
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x530e45d7	hci_conn_security
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x630f0509	hci_conn_put_device
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x644c359a	hci_alloc_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x67c0006c	hci_send_acl
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x7094f8ae	bt_err
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x75e435ff	hci_register_proto
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x779523d9	hci_resume_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x7e7aa242	hci_send_sco
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x93424761	hci_register_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x9f2b7e25	bt_accept_dequeue
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xab72757e	hci_conn_hold_device
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xbc0f2ffb	hci_suspend_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xc14e9245	hci_conn_change_link_key
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xc2066af0	batostr
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xca799621	bt_sock_ioctl
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xcc1fb551	baswap
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xd1707136	bt_sock_register
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xd54aa4a2	bt_sock_unlink
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xdbd6fa96	bt_sock_link
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xe0b5df99	hci_conn_switch_role
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xe31efbd0	hci_conn_check_link_mode
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xf19294db	bt_sock_unregister
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xf643f965	hci_unregister_dev
+EXPORT_SYMBOL net/bluetooth/l2cap 0xfc31fe88	l2cap_load
+EXPORT_SYMBOL net/bridge/bridge 0xe342960c	br_should_route_hook
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x16990ede	ebt_do_table
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x65fdbafe	ebt_register_table
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x7788a5e0	ebt_unregister_table
+EXPORT_SYMBOL net/can/can 0x23e29062	can_send
+EXPORT_SYMBOL net/can/can 0x4a4c89c0	can_rx_unregister
+EXPORT_SYMBOL net/can/can 0x65d81571	can_rx_register
+EXPORT_SYMBOL net/can/can 0xb0ca9aee	can_proto_register
+EXPORT_SYMBOL net/can/can 0xdd693d68	can_proto_unregister
+EXPORT_SYMBOL net/ieee802154/nl802154 0x627347d4	ieee802154_nl_beacon_indic
+EXPORT_SYMBOL net/ieee802154/nl802154 0x72bcd155	ieee802154_nl_assoc_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0x95342a2c	ieee802154_nl_scan_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0x9e67e639	ieee802154_nl_assoc_indic
+EXPORT_SYMBOL net/ieee802154/nl802154 0xe1b692fc	ieee802154_nl_disassoc_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0xed1a05fa	ieee802154_nl_start_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0xfce00c6c	ieee802154_nl_disassoc_indic
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x0a291780	wpan_phy_find
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x35949de6	wpan_phy_free
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x58e2da69	wpan_phy_unregister
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x6aa5a496	wpan_phy_register
+EXPORT_SYMBOL net/ieee802154/wpan-class 0xba4f2dc9	wpan_phy_alloc
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x5c3ef2bd	arpt_register_table
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xafebb7ca	arpt_unregister_table
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xfd91fecf	arpt_do_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0xd00cb7eb	ipt_register_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0xd17d23fd	ipt_do_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0xec132b30	ipt_unregister_table
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x58cc5ada	nf_nat_mangle_udp_packet
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x7ee730f0	nf_nat_setup_info
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x9a813051	nf_nat_mangle_tcp_packet
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xa3bc2463	nf_nat_protocol_register
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xaad93b97	nf_nat_used_tuple
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xc84393e9	nf_nat_protocol_unregister
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xcff5068a	nf_nat_follow_master
+EXPORT_SYMBOL net/ipv4/tunnel4 0x85993e4c	xfrm4_tunnel_deregister
+EXPORT_SYMBOL net/ipv4/tunnel4 0x8fb3c57a	xfrm4_tunnel_register
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x539bddcd	ip6t_do_table
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x718c8783	ipv6_find_hdr
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xb8bddf33	ip6t_ext_hdr
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xe977196c	ip6t_unregister_table
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xf220f30d	ip6t_register_table
+EXPORT_SYMBOL net/ipv6/tunnel6 0x19eec443	xfrm6_tunnel_register
+EXPORT_SYMBOL net/ipv6/tunnel6 0xbca538af	xfrm6_tunnel_deregister
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0x9cd013f2	xfrm6_tunnel_alloc_spi
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xab14e193	xfrm6_tunnel_free_spi
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xdb1b42d1	xfrm6_tunnel_spi_lookup
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x01b968da	ircomm_close
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x27c1fc19	ircomm_control_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x3a4f23a6	ircomm_connect_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x5101bab9	ircomm_open
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x913a749e	ircomm_flow_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x938cd1e8	ircomm_disconnect_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0xc2b7f9b6	ircomm_connect_response
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0xffbdea8a	ircomm_data_request
+EXPORT_SYMBOL net/irda/irda 0x01d1fcdb	hashbin_delete
+EXPORT_SYMBOL net/irda/irda 0x06a3ee58	irias_new_integer_value
+EXPORT_SYMBOL net/irda/irda 0x072e026f	irias_add_octseq_attrib
+EXPORT_SYMBOL net/irda/irda 0x07d3647c	irlmp_register_service
+EXPORT_SYMBOL net/irda/irda 0x0b2c21a4	irttp_flow_request
+EXPORT_SYMBOL net/irda/irda 0x11df179c	irlmp_close_lsap
+EXPORT_SYMBOL net/irda/irda 0x12329bdc	irlmp_data_request
+EXPORT_SYMBOL net/irda/irda 0x2036ad06	irda_param_insert
+EXPORT_SYMBOL net/irda/irda 0x258454e5	irttp_data_request
+EXPORT_SYMBOL net/irda/irda 0x2799bdca	irda_notify_init
+EXPORT_SYMBOL net/irda/irda 0x2dc48777	irda_device_set_media_busy
+EXPORT_SYMBOL net/irda/irda 0x3462950f	hashbin_remove
+EXPORT_SYMBOL net/irda/irda 0x38a20e5b	irda_debug
+EXPORT_SYMBOL net/irda/irda 0x43455ab1	irttp_disconnect_request
+EXPORT_SYMBOL net/irda/irda 0x448b8aaa	irda_qos_bits_to_value
+EXPORT_SYMBOL net/irda/irda 0x46c1c4a2	irlmp_unregister_service
+EXPORT_SYMBOL net/irda/irda 0x55e4f37d	irttp_close_tsap
+EXPORT_SYMBOL net/irda/irda 0x5a03fc1a	irttp_dup
+EXPORT_SYMBOL net/irda/irda 0x5e21b5fa	irlap_close
+EXPORT_SYMBOL net/irda/irda 0x6758f8ac	irias_new_object
+EXPORT_SYMBOL net/irda/irda 0x68b7447c	hashbin_find
+EXPORT_SYMBOL net/irda/irda 0x6b043eba	irda_init_max_qos_capabilies
+EXPORT_SYMBOL net/irda/irda 0x6cc6117d	irlmp_disconnect_request
+EXPORT_SYMBOL net/irda/irda 0x7042bc54	irlmp_register_client
+EXPORT_SYMBOL net/irda/irda 0x747d6779	irias_delete_object
+EXPORT_SYMBOL net/irda/irda 0x76076fe7	irttp_connect_request
+EXPORT_SYMBOL net/irda/irda 0x7621e908	hashbin_insert
+EXPORT_SYMBOL net/irda/irda 0x76243bc9	irias_insert_object
+EXPORT_SYMBOL net/irda/irda 0x763e54a4	irlmp_unregister_client
+EXPORT_SYMBOL net/irda/irda 0x781e2db5	irias_find_object
+EXPORT_SYMBOL net/irda/irda 0x7957f728	irlmp_update_client
+EXPORT_SYMBOL net/irda/irda 0x7a57b6f3	hashbin_remove_this
+EXPORT_SYMBOL net/irda/irda 0x8c5d4e2c	iriap_close
+EXPORT_SYMBOL net/irda/irda 0x8e0ad3e2	irlmp_connect_response
+EXPORT_SYMBOL net/irda/irda 0x91815586	irda_param_pack
+EXPORT_SYMBOL net/irda/irda 0x918e918e	irttp_udata_request
+EXPORT_SYMBOL net/irda/irda 0x92661780	irttp_connect_response
+EXPORT_SYMBOL net/irda/irda 0x95691e4e	iriap_open
+EXPORT_SYMBOL net/irda/irda 0x993ad14b	irda_param_extract_all
+EXPORT_SYMBOL net/irda/irda 0x9ced42a8	irttp_open_tsap
+EXPORT_SYMBOL net/irda/irda 0xa3c77939	alloc_irdadev
+EXPORT_SYMBOL net/irda/irda 0xb7ecd175	irlap_open
+EXPORT_SYMBOL net/irda/irda 0xb9394173	irias_delete_value
+EXPORT_SYMBOL net/irda/irda 0xba8b76e0	proc_irda
+EXPORT_SYMBOL net/irda/irda 0xbcd3ef13	irias_object_change_attribute
+EXPORT_SYMBOL net/irda/irda 0xbe40ace9	irlmp_discovery_request
+EXPORT_SYMBOL net/irda/irda 0xc14e9b6a	hashbin_get_next
+EXPORT_SYMBOL net/irda/irda 0xca7c1f42	async_wrap_skb
+EXPORT_SYMBOL net/irda/irda 0xcd41236c	hashbin_new
+EXPORT_SYMBOL net/irda/irda 0xcfc35a47	async_unwrap_char
+EXPORT_SYMBOL net/irda/irda 0xd6deeaae	irda_setup_dma
+EXPORT_SYMBOL net/irda/irda 0xd7172ff4	hashbin_get_first
+EXPORT_SYMBOL net/irda/irda 0xd8bfb6d4	hashbin_lock_find
+EXPORT_SYMBOL net/irda/irda 0xde4c6b3c	irlmp_service_to_hint
+EXPORT_SYMBOL net/irda/irda 0xe486c352	irlmp_open_lsap
+EXPORT_SYMBOL net/irda/irda 0xe5260e0e	irias_add_integer_attrib
+EXPORT_SYMBOL net/irda/irda 0xec41fe7f	irias_add_string_attrib
+EXPORT_SYMBOL net/irda/irda 0xed477e48	irlmp_connect_request
+EXPORT_SYMBOL net/irda/irda 0xedd521c2	irlmp_get_discoveries
+EXPORT_SYMBOL net/irda/irda 0xfd5036c7	iriap_getvaluebyclass_request
+EXPORT_SYMBOL net/lapb/lapb 0x15c915a4	lapb_data_received
+EXPORT_SYMBOL net/lapb/lapb 0x1f1cda13	lapb_setparms
+EXPORT_SYMBOL net/lapb/lapb 0x31d58997	lapb_unregister
+EXPORT_SYMBOL net/lapb/lapb 0x449442e5	lapb_disconnect_request
+EXPORT_SYMBOL net/lapb/lapb 0x5409433b	lapb_data_request
+EXPORT_SYMBOL net/lapb/lapb 0x6f395e03	lapb_connect_request
+EXPORT_SYMBOL net/lapb/lapb 0x73cc71f3	lapb_register
+EXPORT_SYMBOL net/lapb/lapb 0xf06d8795	lapb_getparms
+EXPORT_SYMBOL net/mac80211/mac80211 0x150d3c41	ieee80211_wake_queues
+EXPORT_SYMBOL net/mac80211/mac80211 0x174c6f96	ieee80211_beacon_get
+EXPORT_SYMBOL net/mac80211/mac80211 0x1ab4eab4	ieee80211_find_sta
+EXPORT_SYMBOL net/mac80211/mac80211 0x1bdbbd87	__ieee80211_get_tx_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0x29689039	ieee80211_stop_queues
+EXPORT_SYMBOL net/mac80211/mac80211 0x5490b2bc	ieee80211_rate_control_unregister
+EXPORT_SYMBOL net/mac80211/mac80211 0x550a4282	ieee80211_queue_stopped
+EXPORT_SYMBOL net/mac80211/mac80211 0x574bc1f2	ieee80211_wake_queue
+EXPORT_SYMBOL net/mac80211/mac80211 0x630705e8	ieee80211_free_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x6a8ba01c	__ieee80211_get_rx_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0x6e78a406	ieee80211_tx_status
+EXPORT_SYMBOL net/mac80211/mac80211 0x83d72650	ieee80211_rts_get
+EXPORT_SYMBOL net/mac80211/mac80211 0x85c87c1c	ieee80211_alloc_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x8729e30e	ieee80211_generic_frame_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0x8eeb266e	ieee80211_tx_status_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0x91f4a221	ieee80211_rx
+EXPORT_SYMBOL net/mac80211/mac80211 0x92a322df	ieee80211_rts_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0xa03d429a	ieee80211_start_tx_ba_session
+EXPORT_SYMBOL net/mac80211/mac80211 0xa42fc5cb	ieee80211_register_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xa4bbbc75	ieee80211_stop_queue
+EXPORT_SYMBOL net/mac80211/mac80211 0xa65e6765	ieee80211_queue_delayed_work
+EXPORT_SYMBOL net/mac80211/mac80211 0xad53720f	ieee80211_unregister_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xb242d3cf	__ieee80211_get_radio_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0xb3f256cf	wiphy_to_ieee80211_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xb4f87a47	ieee80211_scan_completed
+EXPORT_SYMBOL net/mac80211/mac80211 0xb704670b	ieee80211_ctstoself_get
+EXPORT_SYMBOL net/mac80211/mac80211 0xbd9e6b34	ieee80211_rx_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0xc6075bfc	__ieee80211_get_assoc_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0xcd66674e	ieee80211_rate_control_register
+EXPORT_SYMBOL net/mac80211/mac80211 0xce36febc	ieee80211_queue_work
+EXPORT_SYMBOL net/mac80211/mac80211 0xd2b2e19b	ieee80211_stop_tx_ba_cb_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0xd2c49314	ieee80211_ctstoself_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0xda409481	ieee80211_stop_tx_ba_session
+EXPORT_SYMBOL net/mac80211/mac80211 0xda922682	ieee80211_get_buffered_bc
+EXPORT_SYMBOL net/mac80211/mac80211 0xe39e18a4	ieee80211_stop_tx_ba_cb
+EXPORT_SYMBOL net/mac80211/mac80211 0xe8abe42d	ieee80211_beacon_loss
+EXPORT_SYMBOL net/mac80211/mac80211 0xf0834e04	ieee80211_restart_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xf2a0ce3e	ieee80211_start_tx_ba_cb
+EXPORT_SYMBOL net/mac80211/mac80211 0xf608f1a5	rate_control_send_low
+EXPORT_SYMBOL net/mac80211/mac80211 0xf7659612	ieee80211_get_tkip_key
+EXPORT_SYMBOL net/mac80211/mac80211 0xf80e4692	ieee80211_start_tx_ba_cb_irqsafe
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x20b63339	ip_vs_conn_out_get
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x618a9a95	register_ip_vs_app
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xa1dbc2d8	ip_vs_proto_name
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xaa885666	ip_vs_skb_replace
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xb677fe13	register_ip_vs_app_inc
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xc3a746e4	ip_vs_conn_in_get
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xc772c5aa	ip_vs_conn_put
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xd2c8c2c5	unregister_ip_vs_app
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xd9d36fad	ip_vs_conn_new
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xec7c07ad	unregister_ip_vs_scheduler
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xed0a6725	register_ip_vs_scheduler
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xf6591469	ip_vs_tcp_conn_listen
+EXPORT_SYMBOL net/netfilter/nf_conntrack 0x9b3d6ba0	__nf_ct_ext_add
+EXPORT_SYMBOL net/netfilter/nf_conntrack 0xc4f5c947	__nf_ct_ext_destroy
+EXPORT_SYMBOL net/netfilter/nf_conntrack_proto_gre 0x6948b228	nf_ct_gre_keymap_flush
+EXPORT_SYMBOL net/netfilter/x_tables 0x16a5e826	xt_free_table_info
+EXPORT_SYMBOL net/netfilter/x_tables 0x1b136f9e	xt_register_targets
+EXPORT_SYMBOL net/netfilter/x_tables 0x35bc8d07	xt_unregister_matches
+EXPORT_SYMBOL net/netfilter/x_tables 0x37748cfc	xt_register_matches
+EXPORT_SYMBOL net/netfilter/x_tables 0x8ea2ae26	xt_find_target
+EXPORT_SYMBOL net/netfilter/x_tables 0x95da7fbc	xt_unregister_match
+EXPORT_SYMBOL net/netfilter/x_tables 0x990d7742	xt_register_target
+EXPORT_SYMBOL net/netfilter/x_tables 0xa1aaf226	xt_unregister_target
+EXPORT_SYMBOL net/netfilter/x_tables 0xaadc6a88	xt_find_match
+EXPORT_SYMBOL net/netfilter/x_tables 0xb1453111	xt_register_match
+EXPORT_SYMBOL net/netfilter/x_tables 0xc3ff5dff	xt_alloc_table_info
+EXPORT_SYMBOL net/netfilter/x_tables 0xfdc3e316	xt_unregister_targets
+EXPORT_SYMBOL net/phonet/phonet 0x0c232d11	pn_sock_hash
+EXPORT_SYMBOL net/phonet/phonet 0x66b250fb	phonet_proto_unregister
+EXPORT_SYMBOL net/phonet/phonet 0x89579c74	pn_sock_unhash
+EXPORT_SYMBOL net/phonet/phonet 0x8df6c733	pn_skb_send
+EXPORT_SYMBOL net/phonet/phonet 0x9bea8435	pn_sock_get_port
+EXPORT_SYMBOL net/phonet/phonet 0xc90d6f5c	phonet_proto_register
+EXPORT_SYMBOL net/phonet/phonet 0xde26f4d2	phonet_stream_ops
+EXPORT_SYMBOL net/phonet/phonet 0xe53fd988	phonet_header_ops
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x2839a900	rxrpc_kernel_accept_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x4925db0f	rxrpc_kernel_send_data
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x4f453987	rxrpc_kernel_abort_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x6950cfbc	rxrpc_get_null_key
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x88215826	rxrpc_kernel_intercept_rx_messages
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x8d9a7bc6	rxrpc_kernel_free_skb
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x9e8ddcd8	rxrpc_kernel_get_error_number
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xa10bb4af	rxrpc_kernel_data_delivered
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xa2e94f31	rxrpc_get_server_data_key
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xa59d373f	rxrpc_kernel_is_data_last
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xacaedfe6	rxrpc_kernel_end_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xc32e6edb	rxrpc_kernel_reject_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xc8c59a35	rxrpc_kernel_get_abort_code
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xcfdf84b6	key_type_rxrpc
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xe88d98ab	rxrpc_kernel_begin_call
+EXPORT_SYMBOL net/sunrpc/sunrpc 0x59f479c8	svc_pool_stats_open
+EXPORT_SYMBOL net/tipc/tipc 0x08acf310	tipc_available_nodes
+EXPORT_SYMBOL net/tipc/tipc 0x0b074a7b	tipc_multicast
+EXPORT_SYMBOL net/tipc/tipc 0x0faa8e94	tipc_forward_buf2port
+EXPORT_SYMBOL net/tipc/tipc 0x10d40fcd	tipc_isconnected
+EXPORT_SYMBOL net/tipc/tipc 0x1472b270	tipc_disconnect
+EXPORT_SYMBOL net/tipc/tipc 0x1479cb03	tipc_deleteport
+EXPORT_SYMBOL net/tipc/tipc 0x15b5ecde	tipc_set_portunreliable
+EXPORT_SYMBOL net/tipc/tipc 0x16f27683	tipc_block_bearer
+EXPORT_SYMBOL net/tipc/tipc 0x23daecbd	tipc_send
+EXPORT_SYMBOL net/tipc/tipc 0x259b74f9	tipc_acknowledge
+EXPORT_SYMBOL net/tipc/tipc 0x310d1bc9	tipc_detach
+EXPORT_SYMBOL net/tipc/tipc 0x3712e340	tipc_portunreliable
+EXPORT_SYMBOL net/tipc/tipc 0x3946fe32	tipc_send_buf
+EXPORT_SYMBOL net/tipc/tipc 0x3976041f	tipc_set_portimportance
+EXPORT_SYMBOL net/tipc/tipc 0x419b02fc	tipc_send2port
+EXPORT_SYMBOL net/tipc/tipc 0x4b2243c6	tipc_portimportance
+EXPORT_SYMBOL net/tipc/tipc 0x538b228a	tipc_withdraw
+EXPORT_SYMBOL net/tipc/tipc 0x53ff1c53	tipc_createport
+EXPORT_SYMBOL net/tipc/tipc 0x5637ed44	tipc_get_mode
+EXPORT_SYMBOL net/tipc/tipc 0x56e52bc1	tipc_continue
+EXPORT_SYMBOL net/tipc/tipc 0x5c0d4b5c	tipc_ref_valid
+EXPORT_SYMBOL net/tipc/tipc 0x62a681a3	tipc_portunreturnable
+EXPORT_SYMBOL net/tipc/tipc 0x67359ade	tipc_send_buf2name
+EXPORT_SYMBOL net/tipc/tipc 0x7d229f4d	tipc_register_media
+EXPORT_SYMBOL net/tipc/tipc 0x87a35ec7	tipc_createport_raw
+EXPORT_SYMBOL net/tipc/tipc 0x88b73627	tipc_get_addr
+EXPORT_SYMBOL net/tipc/tipc 0x9c45558e	tipc_enable_bearer
+EXPORT_SYMBOL net/tipc/tipc 0xa0ef4ebc	tipc_send_buf_fast
+EXPORT_SYMBOL net/tipc/tipc 0xa1b42d32	tipc_forward2port
+EXPORT_SYMBOL net/tipc/tipc 0xa936a24b	tipc_get_port
+EXPORT_SYMBOL net/tipc/tipc 0xadd203d0	tipc_connect2port
+EXPORT_SYMBOL net/tipc/tipc 0xae0103c3	tipc_shutdown
+EXPORT_SYMBOL net/tipc/tipc 0xb0da87df	tipc_reject_msg
+EXPORT_SYMBOL net/tipc/tipc 0xb1f8eacc	tipc_send2name
+EXPORT_SYMBOL net/tipc/tipc 0xb35b672c	tipc_publish
+EXPORT_SYMBOL net/tipc/tipc 0xcec8514a	tipc_set_portunreturnable
+EXPORT_SYMBOL net/tipc/tipc 0xcee290be	tipc_forward2name
+EXPORT_SYMBOL net/tipc/tipc 0xd44731e5	tipc_ownidentity
+EXPORT_SYMBOL net/tipc/tipc 0xda7f9d3f	tipc_attach
+EXPORT_SYMBOL net/tipc/tipc 0xdf5008fc	tipc_peer
+EXPORT_SYMBOL net/tipc/tipc 0xe7aece47	tipc_ispublished
+EXPORT_SYMBOL net/tipc/tipc 0xe7fe2c7d	tipc_recv_msg
+EXPORT_SYMBOL net/tipc/tipc 0xeefd49b3	tipc_get_handle
+EXPORT_SYMBOL net/tipc/tipc 0xef50a1ef	tipc_disable_bearer
+EXPORT_SYMBOL net/tipc/tipc 0xf95f8835	tipc_forward_buf2name
+EXPORT_SYMBOL net/tipc/tipc 0xfd2b4d22	tipc_send_buf2port
+EXPORT_SYMBOL net/wanrouter/wanrouter 0x0ebe03d1	unregister_wan_device
+EXPORT_SYMBOL net/wanrouter/wanrouter 0x61f6a45f	register_wan_device
+EXPORT_SYMBOL net/wimax/wimax 0x2659edf0	wimax_rfkill
+EXPORT_SYMBOL net/wimax/wimax 0x6c2a69e5	wimax_reset
+EXPORT_SYMBOL net/wireless/cfg80211 0x07e7ac5a	ieee80211_radiotap_iterator_init
+EXPORT_SYMBOL net/wireless/cfg80211 0x09c64fbd	ieee80211_frequency_to_channel
+EXPORT_SYMBOL net/wireless/cfg80211 0x0ec4dfd0	wiphy_rfkill_stop_polling
+EXPORT_SYMBOL net/wireless/cfg80211 0x1183c6d6	__ieee80211_get_channel
+EXPORT_SYMBOL net/wireless/cfg80211 0x1879fcbd	bridge_tunnel_header
+EXPORT_SYMBOL net/wireless/cfg80211 0x187fc8a9	cfg80211_get_mesh
+EXPORT_SYMBOL net/wireless/cfg80211 0x1894b042	wiphy_rfkill_start_polling
+EXPORT_SYMBOL net/wireless/cfg80211 0x1926b0cd	wiphy_new
+EXPORT_SYMBOL net/wireless/cfg80211 0x212966a0	ieee80211_data_from_8023
+EXPORT_SYMBOL net/wireless/cfg80211 0x214d9c70	cfg80211_testmode_event
+EXPORT_SYMBOL net/wireless/cfg80211 0x315770a1	cfg80211_testmode_reply
+EXPORT_SYMBOL net/wireless/cfg80211 0x33e44d2f	wiphy_unregister
+EXPORT_SYMBOL net/wireless/cfg80211 0x36d326f3	freq_reg_info
+EXPORT_SYMBOL net/wireless/cfg80211 0x37ac8d05	ieee80211_get_response_rate
+EXPORT_SYMBOL net/wireless/cfg80211 0x38ecb7f8	cfg80211_inform_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0x45d9a9a3	regulatory_hint
+EXPORT_SYMBOL net/wireless/cfg80211 0x4866e84b	wiphy_rfkill_set_hw_state
+EXPORT_SYMBOL net/wireless/cfg80211 0x4d833e33	cfg80211_testmode_alloc_reply_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0x4e1c5734	ieee80211_get_hdrlen_from_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0x51ae93e5	wiphy_register
+EXPORT_SYMBOL net/wireless/cfg80211 0x5406f8c2	cfg80211_send_deauth
+EXPORT_SYMBOL net/wireless/cfg80211 0x5a307978	cfg80211_get_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0x6046889e	cfg80211_scan_done
+EXPORT_SYMBOL net/wireless/cfg80211 0x617c258e	wiphy_free
+EXPORT_SYMBOL net/wireless/cfg80211 0x69b18f43	rfc1042_header
+EXPORT_SYMBOL net/wireless/cfg80211 0x70f8c1a0	cfg80211_testmode_alloc_event_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0x7c3fddc1	ieee80211_bss_get_ie
+EXPORT_SYMBOL net/wireless/cfg80211 0x7c6e6479	cfg80211_classify8021d
+EXPORT_SYMBOL net/wireless/cfg80211 0x802ba054	cfg80211_ibss_joined
+EXPORT_SYMBOL net/wireless/cfg80211 0x8429e7d7	cfg80211_michael_mic_failure
+EXPORT_SYMBOL net/wireless/cfg80211 0x84dfe6d7	cfg80211_send_disassoc
+EXPORT_SYMBOL net/wireless/cfg80211 0x8c35d732	ieee80211_hdrlen
+EXPORT_SYMBOL net/wireless/cfg80211 0x95c4921c	cfg80211_roamed
+EXPORT_SYMBOL net/wireless/cfg80211 0x973c30b5	cfg80211_send_assoc_timeout
+EXPORT_SYMBOL net/wireless/cfg80211 0x9ca903a3	wiphy_apply_custom_regulatory
+EXPORT_SYMBOL net/wireless/cfg80211 0xa7403751	ieee80211_data_to_8023
+EXPORT_SYMBOL net/wireless/cfg80211 0xb4835560	cfg80211_send_rx_assoc
+EXPORT_SYMBOL net/wireless/cfg80211 0xbf131e5b	cfg80211_unlink_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0xc4e85ec5	ieee80211_radiotap_iterator_next
+EXPORT_SYMBOL net/wireless/cfg80211 0xccc291b3	ieee80211_channel_to_frequency
+EXPORT_SYMBOL net/wireless/cfg80211 0xcedd4bd3	cfg80211_inform_bss_frame
+EXPORT_SYMBOL net/wireless/cfg80211 0xd137e810	cfg80211_connect_result
+EXPORT_SYMBOL net/wireless/cfg80211 0xd198b1d9	cfg80211_disconnected
+EXPORT_SYMBOL net/wireless/cfg80211 0xe49f8244	cfg80211_put_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0xf5567ff2	cfg80211_send_rx_auth
+EXPORT_SYMBOL net/wireless/cfg80211 0xf6abce08	cfg80211_send_auth_timeout
+EXPORT_SYMBOL net/wireless/lib80211 0x1bbff969	lib80211_get_crypto_ops
+EXPORT_SYMBOL net/wireless/lib80211 0x230f3ffb	lib80211_crypt_deinit_handler
+EXPORT_SYMBOL net/wireless/lib80211 0x264ac0f8	lib80211_crypt_deinit_entries
+EXPORT_SYMBOL net/wireless/lib80211 0x2d0f99e5	print_ssid
+EXPORT_SYMBOL net/wireless/lib80211 0x8c877de4	lib80211_crypt_info_free
+EXPORT_SYMBOL net/wireless/lib80211 0x8d1d7491	lib80211_register_crypto_ops
+EXPORT_SYMBOL net/wireless/lib80211 0x8e671760	lib80211_crypt_quiescing
+EXPORT_SYMBOL net/wireless/lib80211 0x9af551b7	lib80211_crypt_delayed_deinit
+EXPORT_SYMBOL net/wireless/lib80211 0xbb8a17ee	lib80211_crypt_info_init
+EXPORT_SYMBOL net/wireless/lib80211 0xf49a15c2	lib80211_unregister_crypto_ops
+EXPORT_SYMBOL sound/ac97_bus 0xf8f9396b	ac97_bus_type
+EXPORT_SYMBOL sound/core/oss/snd-mixer-oss 0x8b477344	snd_mixer_oss_ioctl_card
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x08c19977	snd_seq_event_port_attach
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x1a724fcc	snd_seq_kernel_client_ctl
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x3fb4d161	snd_seq_kernel_client_dispatch
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x6bb71038	snd_seq_delete_kernel_client
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x71be03e8	snd_seq_create_kernel_client
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x7ac2f329	snd_seq_expand_var_event
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x7b8699eb	snd_seq_event_port_detach
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x89947013	snd_use_lock_sync_helper
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x9cab330a	snd_seq_kernel_client_write_poll
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xb8e448a0	snd_seq_set_queue_tempo
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xba1c116c	snd_seq_kernel_client_enqueue_blocking
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xcac0a3be	snd_seq_kernel_client_enqueue
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xe934da1d	snd_seq_dump_var_event
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x3278b576	snd_seq_device_new
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x3a57f235	snd_seq_autoload_unlock
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x6339b6d0	snd_seq_device_load_drivers
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xb90668b2	snd_seq_autoload_lock
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xc622fb29	snd_seq_device_unregister_driver
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xf3c2fd5b	snd_seq_device_register_driver
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x6ea09972	snd_midi_channel_alloc_set
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x833a3e07	snd_midi_channel_set_clear
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xb9948d2c	snd_midi_channel_free_set
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xf0a1fdb3	snd_midi_process_event
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x17c15809	snd_midi_event_decode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x4ad3f518	snd_midi_event_reset_decode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x62384d3a	snd_midi_event_encode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x8a348811	snd_midi_event_reset_encode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x9df7af8b	snd_midi_event_free
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xc482499d	snd_midi_event_new
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xd9072e1a	snd_midi_event_no_status
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xe6df29c7	snd_midi_event_encode_byte
+EXPORT_SYMBOL sound/core/seq/snd-seq-virmidi 0x012e620d	snd_virmidi_new
+EXPORT_SYMBOL sound/core/snd 0x04d6e4b7	snd_jack_report
+EXPORT_SYMBOL sound/core/snd 0x060271d8	snd_ctl_find_id
+EXPORT_SYMBOL sound/core/snd 0x06ff859a	snd_ctl_remove
+EXPORT_SYMBOL sound/core/snd 0x1432ff46	snd_ctl_remove_id
+EXPORT_SYMBOL sound/core/snd 0x1514e213	snd_mixer_oss_notify_callback
+EXPORT_SYMBOL sound/core/snd 0x15a47d8b	snd_ctl_boolean_mono_info
+EXPORT_SYMBOL sound/core/snd 0x18e1683f	snd_dma_program
+EXPORT_SYMBOL sound/core/snd 0x191e88cf	snd_dma_pointer
+EXPORT_SYMBOL sound/core/snd 0x198788b4	snd_lookup_oss_minor_data
+EXPORT_SYMBOL sound/core/snd 0x1f0439e0	snd_ctl_unregister_ioctl_compat
+EXPORT_SYMBOL sound/core/snd 0x21b83a38	snd_card_file_add
+EXPORT_SYMBOL sound/core/snd 0x239970da	snd_pci_quirk_lookup
+EXPORT_SYMBOL sound/core/snd 0x24a94b26	snd_info_get_line
+EXPORT_SYMBOL sound/core/snd 0x24af89ea	snd_ctl_find_numid
+EXPORT_SYMBOL sound/core/snd 0x2ae3deaa	release_and_free_resource
+EXPORT_SYMBOL sound/core/snd 0x2e5933bb	snd_unregister_device
+EXPORT_SYMBOL sound/core/snd 0x3971b4df	snd_ecards_limit
+EXPORT_SYMBOL sound/core/snd 0x3998b0cc	snd_ctl_boolean_stereo_info
+EXPORT_SYMBOL sound/core/snd 0x3f1221c6	snd_add_device_sysfs_file
+EXPORT_SYMBOL sound/core/snd 0x40c21b7d	snd_unregister_oss_device
+EXPORT_SYMBOL sound/core/snd 0x42dd7daa	snd_device_new
+EXPORT_SYMBOL sound/core/snd 0x44085c85	snd_power_wait
+EXPORT_SYMBOL sound/core/snd 0x4a3ea5c0	snd_request_card
+EXPORT_SYMBOL sound/core/snd 0x4f59af6a	snd_info_create_module_entry
+EXPORT_SYMBOL sound/core/snd 0x51878392	snd_device_register
+EXPORT_SYMBOL sound/core/snd 0x518bb7f8	copy_from_user_toio
+EXPORT_SYMBOL sound/core/snd 0x5520d398	snd_ctl_rename_id
+EXPORT_SYMBOL sound/core/snd 0x578b1e10	snd_card_register
+EXPORT_SYMBOL sound/core/snd 0x5a133c59	snd_card_file_remove
+EXPORT_SYMBOL sound/core/snd 0x5def3443	snd_card_proc_new
+EXPORT_SYMBOL sound/core/snd 0x5e5086bc	snd_seq_root
+EXPORT_SYMBOL sound/core/snd 0x66027b6c	snd_info_create_card_entry
+EXPORT_SYMBOL sound/core/snd 0x70c15ac1	snd_dma_disable
+EXPORT_SYMBOL sound/core/snd 0x71afc379	snd_card_free_when_closed
+EXPORT_SYMBOL sound/core/snd 0x71b2a89c	snd_cards
+EXPORT_SYMBOL sound/core/snd 0x72acd6da	snd_register_oss_device
+EXPORT_SYMBOL sound/core/snd 0x80f153e2	snd_jack_set_parent
+EXPORT_SYMBOL sound/core/snd 0x8750eb59	snd_card_set_id
+EXPORT_SYMBOL sound/core/snd 0x8df3789f	snd_oss_info_register
+EXPORT_SYMBOL sound/core/snd 0x8f595b11	snd_major
+EXPORT_SYMBOL sound/core/snd 0x90213d37	snd_device_free
+EXPORT_SYMBOL sound/core/snd 0x9065c0b3	snd_ctl_register_ioctl_compat
+EXPORT_SYMBOL sound/core/snd 0x91df0bda	snd_register_device_for_dev
+EXPORT_SYMBOL sound/core/snd 0x9790e213	snd_card_free
+EXPORT_SYMBOL sound/core/snd 0x983891ec	snd_ctl_new1
+EXPORT_SYMBOL sound/core/snd 0x9e6d79f8	snd_info_get_str
+EXPORT_SYMBOL sound/core/snd 0xa387cf17	snd_ctl_unregister_ioctl
+EXPORT_SYMBOL sound/core/snd 0xa7fed0ad	snd_ctl_free_one
+EXPORT_SYMBOL sound/core/snd 0xb2e5ae4a	snd_lookup_minor_data
+EXPORT_SYMBOL sound/core/snd 0xbd54290e	snd_ctl_add
+EXPORT_SYMBOL sound/core/snd 0xbe6dce37	snd_jack_new
+EXPORT_SYMBOL sound/core/snd 0xc023fd2e	snd_ctl_notify
+EXPORT_SYMBOL sound/core/snd 0xc5cea39f	snd_ctl_register_ioctl
+EXPORT_SYMBOL sound/core/snd 0xc73b84ab	snd_card_create
+EXPORT_SYMBOL sound/core/snd 0xca5d8a54	snd_info_register
+EXPORT_SYMBOL sound/core/snd 0xd5f49463	snd_component_add
+EXPORT_SYMBOL sound/core/snd 0xd8f2fcf3	snd_info_free_entry
+EXPORT_SYMBOL sound/core/snd 0xdd23d712	_snd_ctl_add_slave
+EXPORT_SYMBOL sound/core/snd 0xe20c9214	snd_iprintf
+EXPORT_SYMBOL sound/core/snd 0xe243dde3	copy_to_user_fromio
+EXPORT_SYMBOL sound/core/snd 0xf5966f36	snd_ctl_make_virtual_master
+EXPORT_SYMBOL sound/core/snd 0xfeb0a8e7	snd_card_disconnect
+EXPORT_SYMBOL sound/core/snd-hwdep 0x8c502437	snd_hwdep_new
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x12279bbd	snd_dma_get_reserved_buf
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x19cc2ce3	snd_free_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x2612abbb	snd_dma_alloc_pages_fallback
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x43bfaadc	snd_dma_free_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xb124abd0	snd_dma_alloc_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xc4ab3a19	snd_dma_reserve_buf
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xc6829020	snd_malloc_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0x0283dfe3	_snd_pcm_hw_params_any
+EXPORT_SYMBOL sound/core/snd-pcm 0x040004fd	snd_pcm_limit_hw_rates
+EXPORT_SYMBOL sound/core/snd-pcm 0x04cda566	snd_interval_refine
+EXPORT_SYMBOL sound/core/snd-pcm 0x1683097c	snd_pcm_hw_constraint_pow2
+EXPORT_SYMBOL sound/core/snd-pcm 0x18d53057	snd_pcm_lib_read
+EXPORT_SYMBOL sound/core/snd-pcm 0x1a74028c	snd_pcm_new_stream
+EXPORT_SYMBOL sound/core/snd-pcm 0x1d027e4b	snd_pcm_format_signed
+EXPORT_SYMBOL sound/core/snd-pcm 0x1f46793f	snd_pcm_lib_preallocate_free_for_all
+EXPORT_SYMBOL sound/core/snd-pcm 0x206512fd	snd_pcm_mmap_data
+EXPORT_SYMBOL sound/core/snd-pcm 0x24b8a0d2	snd_pcm_hw_constraint_step
+EXPORT_SYMBOL sound/core/snd-pcm 0x29e53037	snd_pcm_suspend
+EXPORT_SYMBOL sound/core/snd-pcm 0x2b348e61	snd_pcm_hw_constraint_ratdens
+EXPORT_SYMBOL sound/core/snd-pcm 0x2eab6079	snd_pcm_hw_param_first
+EXPORT_SYMBOL sound/core/snd-pcm 0x30d0582f	snd_pcm_hw_constraint_msbits
+EXPORT_SYMBOL sound/core/snd-pcm 0x34fce7e7	snd_pcm_hw_constraint_minmax
+EXPORT_SYMBOL sound/core/snd-pcm 0x356a876a	snd_pcm_sgbuf_get_chunk_size
+EXPORT_SYMBOL sound/core/snd-pcm 0x376c41cf	snd_pcm_lib_preallocate_pages_for_all
+EXPORT_SYMBOL sound/core/snd-pcm 0x3796bdcc	snd_pcm_format_little_endian
+EXPORT_SYMBOL sound/core/snd-pcm 0x3893f055	snd_pcm_lib_ioctl
+EXPORT_SYMBOL sound/core/snd-pcm 0x38f41d6b	snd_pcm_sgbuf_ops_page
+EXPORT_SYMBOL sound/core/snd-pcm 0x39bf9301	_snd_pcm_hw_param_setempty
+EXPORT_SYMBOL sound/core/snd-pcm 0x46cf1c52	snd_pcm_hw_constraint_list
+EXPORT_SYMBOL sound/core/snd-pcm 0x4f816e9b	snd_pcm_format_big_endian
+EXPORT_SYMBOL sound/core/snd-pcm 0x52e3e4a5	snd_pcm_hw_param_value
+EXPORT_SYMBOL sound/core/snd-pcm 0x5e7f4920	snd_pcm_format_set_silence
+EXPORT_SYMBOL sound/core/snd-pcm 0x62d67ef9	snd_pcm_hw_rule_add
+EXPORT_SYMBOL sound/core/snd-pcm 0x650f8603	snd_pcm_format_silence_64
+EXPORT_SYMBOL sound/core/snd-pcm 0x67bb761e	snd_pcm_period_elapsed
+EXPORT_SYMBOL sound/core/snd-pcm 0x68a24153	snd_pcm_format_physical_width
+EXPORT_SYMBOL sound/core/snd-pcm 0x69b252fe	snd_pcm_hw_constraint_integer
+EXPORT_SYMBOL sound/core/snd-pcm 0x6ef8fcd8	snd_pcm_format_linear
+EXPORT_SYMBOL sound/core/snd-pcm 0x75a66b25	snd_pcm_suspend_all
+EXPORT_SYMBOL sound/core/snd-pcm 0x7fe9d245	snd_pcm_hw_refine
+EXPORT_SYMBOL sound/core/snd-pcm 0x88cc66cc	snd_pcm_link_rwlock
+EXPORT_SYMBOL sound/core/snd-pcm 0x90847d7d	snd_pcm_kernel_ioctl
+EXPORT_SYMBOL sound/core/snd-pcm 0x9460ab89	snd_pcm_lib_writev
+EXPORT_SYMBOL sound/core/snd-pcm 0x94fcac3a	snd_pcm_lib_readv
+EXPORT_SYMBOL sound/core/snd-pcm 0x9e0e463a	snd_pcm_hw_constraint_ratnums
+EXPORT_SYMBOL sound/core/snd-pcm 0xa61aa028	snd_pcm_format_unsigned
+EXPORT_SYMBOL sound/core/snd-pcm 0xa63ccb3f	snd_pcm_lib_mmap_iomem
+EXPORT_SYMBOL sound/core/snd-pcm 0xa7f51ca1	snd_pcm_new
+EXPORT_SYMBOL sound/core/snd-pcm 0xacd70302	snd_pcm_set_ops
+EXPORT_SYMBOL sound/core/snd-pcm 0xaf688240	snd_pcm_notify
+EXPORT_SYMBOL sound/core/snd-pcm 0xb090229e	snd_pcm_lib_write
+EXPORT_SYMBOL sound/core/snd-pcm 0xb2973a04	snd_pcm_lib_free_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0xb6ceeb17	snd_pcm_lib_preallocate_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0xb9638db4	snd_pcm_rate_to_rate_bit
+EXPORT_SYMBOL sound/core/snd-pcm 0xbea50746	snd_pcm_open_substream
+EXPORT_SYMBOL sound/core/snd-pcm 0xd0b9b8b8	snd_interval_list
+EXPORT_SYMBOL sound/core/snd-pcm 0xd5fce656	snd_pcm_release_substream
+EXPORT_SYMBOL sound/core/snd-pcm 0xdc05be0e	snd_pcm_stop
+EXPORT_SYMBOL sound/core/snd-pcm 0xe3cc35a0	snd_pcm_set_sync
+EXPORT_SYMBOL sound/core/snd-pcm 0xe51a1c64	snd_pcm_format_size
+EXPORT_SYMBOL sound/core/snd-pcm 0xe56a9336	snd_pcm_format_width
+EXPORT_SYMBOL sound/core/snd-pcm 0xf2259604	snd_pcm_hw_param_last
+EXPORT_SYMBOL sound/core/snd-pcm 0xf3797152	snd_interval_ratnum
+EXPORT_SYMBOL sound/core/snd-pcm 0xf9ce912b	snd_pcm_lib_malloc_pages
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x1787e34a	snd_rawmidi_new
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x2e00af4d	snd_rawmidi_transmit_empty
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x3a5600d9	snd_rawmidi_kernel_write
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x454b9d55	snd_rawmidi_input_params
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x53b448a7	snd_rawmidi_drop_output
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x54beb4b5	snd_rawmidi_transmit_peek
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x70aa263d	snd_rawmidi_kernel_release
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x89b1c75c	snd_rawmidi_kernel_open
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xb7fd3abe	snd_rawmidi_drain_output
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xcbbca1d9	snd_rawmidi_receive
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xd1637bbf	snd_rawmidi_output_params
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xd3a95a9e	snd_rawmidi_transmit
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xd479fc7e	snd_rawmidi_transmit_ack
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xe827385e	snd_rawmidi_info_select
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xec5c92b0	snd_rawmidi_set_ops
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xf5a6cf34	snd_rawmidi_drain_input
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xfa2ffee5	snd_rawmidi_kernel_read
+EXPORT_SYMBOL sound/core/snd-timer 0x03d0eb56	snd_timer_start
+EXPORT_SYMBOL sound/core/snd-timer 0x254752bd	snd_timer_global_new
+EXPORT_SYMBOL sound/core/snd-timer 0x5d41e132	snd_timer_continue
+EXPORT_SYMBOL sound/core/snd-timer 0x6faf941a	snd_timer_resolution
+EXPORT_SYMBOL sound/core/snd-timer 0x7eafbcd3	snd_timer_pause
+EXPORT_SYMBOL sound/core/snd-timer 0x8d9517e5	snd_timer_global_free
+EXPORT_SYMBOL sound/core/snd-timer 0x8dc5b226	snd_timer_open
+EXPORT_SYMBOL sound/core/snd-timer 0x9f02a328	snd_timer_interrupt
+EXPORT_SYMBOL sound/core/snd-timer 0xaa42013d	snd_timer_new
+EXPORT_SYMBOL sound/core/snd-timer 0xaeb22275	snd_timer_global_register
+EXPORT_SYMBOL sound/core/snd-timer 0xb7d8f257	snd_timer_notify
+EXPORT_SYMBOL sound/core/snd-timer 0xc4e05ffb	snd_timer_stop
+EXPORT_SYMBOL sound/core/snd-timer 0xe2134a36	snd_timer_close
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x4bbb7f27	snd_mpu401_uart_interrupt_tx
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x9c10da48	snd_mpu401_uart_new
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xc43a3940	snd_mpu401_uart_interrupt
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x05060a19	snd_opl3_regmap
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x1219681c	snd_opl3_load_patch
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x1d6f0a0e	snd_opl3_new
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x33735df1	snd_opl3_init
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x3839820b	snd_opl3_interrupt
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x89b20acf	snd_opl3_timer_new
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x8f3fb07b	snd_opl3_find_patch
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xc41cb331	snd_opl3_create
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xd6ac17b5	snd_opl3_reset
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xef9b206d	snd_opl3_hwdep_new
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x3c6cb6c6	snd_vx_create
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x433e8a4a	snd_vx_suspend
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x4a42185e	snd_vx_dsp_boot
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x56b7d4e7	snd_vx_resume
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x78eda936	snd_vx_setup_firmware
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x99b88ede	snd_vx_irq_handler
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x9abe68f8	snd_vx_dsp_load
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x9dabc3c4	snd_vx_check_reg_bit
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xab3e9673	snd_vx_free_firmware
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xaea9272c	snd_vx_load_boot_image
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x00e8c4e1	snd_ak4114_reinit
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x027fd52e	snd_ak4114_create
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x0e89c41f	snd_ak4114_check_rate_and_errors
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x165c755e	snd_ak4114_external_rate
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x65222667	snd_ak4114_build
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x8443b0f8	snd_ak4114_reg_write
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x8f651ef6	snd_ak4117_build
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x9b5dd47c	snd_ak4117_external_rate
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xaf6fa81d	snd_ak4117_check_rate_and_errors
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xb43b3462	snd_ak4117_create
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xb60adcda	snd_ak4117_reg_write
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xc7e3c698	snd_ak4117_reinit
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x41508940	snd_akm4xxx_reset
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x4bae2a92	snd_akm4xxx_write
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x5a10576e	snd_akm4xxx_build_controls
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xb803915a	snd_akm4xxx_init
+EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0xe68fd919	snd_pt2258_reset
+EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0xf563dc16	snd_pt2258_build_controls
+EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0xa1755e64	snd_tea575x_exit
+EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0xfc2eeab0	snd_tea575x_init
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x2d322a76	snd_cs8427_reg_write
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x4e78ff91	snd_cs8427_create
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x63ccc3ff	snd_cs8427_iec958_build
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x7a690bd1	snd_cs8427_iec958_active
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0xe6414ff6	snd_cs8427_iec958_pcm
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x024f7166	snd_i2c_bus_create
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x1819aab7	snd_i2c_probeaddr
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x25101743	snd_i2c_device_create
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x2dfa02c8	snd_i2c_sendbytes
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x4b7901c3	snd_i2c_device_free
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x5df8b763	snd_i2c_readbytes
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x215c99a8	snd_sbdsp_command
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x394cecbb	snd_sbmixer_read
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x47b1c563	snd_sbdsp_get_byte
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x6365d972	snd_sbmixer_resume
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x8c7610b3	snd_sbdsp_create
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x9aeec75c	snd_sbdsp_reset
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xa4afe3e0	snd_sbmixer_write
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xdf026940	snd_sbmixer_add_ctl
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xe0392085	snd_sbmixer_new
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xe9336750	snd_sbmixer_suspend
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0x3088f7fb	snd_sb16dsp_pcm
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0x42365acf	snd_sb16dsp_configure
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xc57f5b54	snd_sb16dsp_interrupt
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xfd052a53	snd_sb16dsp_get_pcm_ops
+EXPORT_SYMBOL sound/oss/ad1848 0x26c427ee	ad1848_detect
+EXPORT_SYMBOL sound/oss/ad1848 0x55262c70	probe_ms_sound
+EXPORT_SYMBOL sound/oss/ad1848 0x607f59cc	ad1848_init
+EXPORT_SYMBOL sound/oss/ad1848 0x720507e3	attach_ms_sound
+EXPORT_SYMBOL sound/oss/ad1848 0x9bf1cc62	ad1848_unload
+EXPORT_SYMBOL sound/oss/ad1848 0xb29a9148	unload_ms_sound
+EXPORT_SYMBOL sound/oss/ad1848 0xc04f6f67	ad1848_control
+EXPORT_SYMBOL sound/oss/mpu401 0x5febf284	unload_mpu401
+EXPORT_SYMBOL sound/oss/mpu401 0xd9ec5db4	probe_mpu401
+EXPORT_SYMBOL sound/oss/mpu401 0xee271d56	attach_mpu401
+EXPORT_SYMBOL sound/oss/sb_lib 0x42424109	sb_be_quiet
+EXPORT_SYMBOL sound/oss/sb_lib 0x450f9aea	smw_free
+EXPORT_SYMBOL sound/oss/sb_lib 0x4ccfe4ac	sb_dsp_init
+EXPORT_SYMBOL sound/oss/sb_lib 0x74afd69c	unload_sbmpu
+EXPORT_SYMBOL sound/oss/sb_lib 0xc4884969	sb_dsp_unload
+EXPORT_SYMBOL sound/oss/sb_lib 0xd8a2731c	sb_dsp_detect
+EXPORT_SYMBOL sound/oss/sb_lib 0xf3b6feb8	probe_sbmpu
+EXPORT_SYMBOL sound/oss/sound 0x04c87ec8	compute_finetune
+EXPORT_SYMBOL sound/oss/sound 0x06339815	sound_unload_synthdev
+EXPORT_SYMBOL sound/oss/sound 0x0a2b8461	midi_devs
+EXPORT_SYMBOL sound/oss/sound 0x0e1a0924	sound_install_mixer
+EXPORT_SYMBOL sound/oss/sound 0x0f280035	conf_printf
+EXPORT_SYMBOL sound/oss/sound 0x17ba231d	seq_input_event
+EXPORT_SYMBOL sound/oss/sound 0x1b3df3cf	sound_alloc_mixerdev
+EXPORT_SYMBOL sound/oss/sound 0x1f395686	MIDIbuf_avail
+EXPORT_SYMBOL sound/oss/sound 0x2161d5e8	sound_timer_init
+EXPORT_SYMBOL sound/oss/sound 0x2aa31695	midi_synth_kill_note
+EXPORT_SYMBOL sound/oss/sound 0x394cb088	sound_free_dma
+EXPORT_SYMBOL sound/oss/sound 0x3f0e15d8	synth_devs
+EXPORT_SYMBOL sound/oss/sound 0x418f5fbe	sound_close_dma
+EXPORT_SYMBOL sound/oss/sound 0x4cd01bdd	num_audiodevs
+EXPORT_SYMBOL sound/oss/sound 0x4f6e5cff	audio_devs
+EXPORT_SYMBOL sound/oss/sound 0x4ff47e9d	midi_synth_setup_voice
+EXPORT_SYMBOL sound/oss/sound 0x51e354b2	sound_alloc_timerdev
+EXPORT_SYMBOL sound/oss/sound 0x56504ca2	midi_synth_reset
+EXPORT_SYMBOL sound/oss/sound 0x56d7aec8	sound_install_audiodrv
+EXPORT_SYMBOL sound/oss/sound 0x5c8aea6d	mixer_devs
+EXPORT_SYMBOL sound/oss/sound 0x5d986fc9	note_to_freq
+EXPORT_SYMBOL sound/oss/sound 0x7679ee76	seq_copy_to_input
+EXPORT_SYMBOL sound/oss/sound 0x7bdf0907	conf_printf2
+EXPORT_SYMBOL sound/oss/sound 0x892093e0	midi_synth_controller
+EXPORT_SYMBOL sound/oss/sound 0x90bd9714	sequencer_timer
+EXPORT_SYMBOL sound/oss/sound 0x987bcf12	DMAbuf_outputintr
+EXPORT_SYMBOL sound/oss/sound 0x9a95733f	sound_alloc_dma
+EXPORT_SYMBOL sound/oss/sound 0x9bdaf24d	midi_synth_start_note
+EXPORT_SYMBOL sound/oss/sound 0x9d845b18	num_mixers
+EXPORT_SYMBOL sound/oss/sound 0xa1d5f04f	load_mixer_volumes
+EXPORT_SYMBOL sound/oss/sound 0xa1eae7cf	num_midis
+EXPORT_SYMBOL sound/oss/sound 0xa41ead5f	sound_unload_timerdev
+EXPORT_SYMBOL sound/oss/sound 0xa51c913b	sound_unload_mixerdev
+EXPORT_SYMBOL sound/oss/sound 0xa6bb414c	sound_unload_mididev
+EXPORT_SYMBOL sound/oss/sound 0xa948751e	sound_unload_audiodev
+EXPORT_SYMBOL sound/oss/sound 0xad45df73	midi_synth_close
+EXPORT_SYMBOL sound/oss/sound 0xaef743b2	midi_synth_ioctl
+EXPORT_SYMBOL sound/oss/sound 0xb14b22cd	midi_synth_hw_control
+EXPORT_SYMBOL sound/oss/sound 0xb51587f6	do_midi_msg
+EXPORT_SYMBOL sound/oss/sound 0xba413f87	sound_alloc_mididev
+EXPORT_SYMBOL sound/oss/sound 0xba7dd041	midi_synth_bender
+EXPORT_SYMBOL sound/oss/sound 0xc748d109	sound_alloc_synthdev
+EXPORT_SYMBOL sound/oss/sound 0xcab4d5bf	midi_synth_load_patch
+EXPORT_SYMBOL sound/oss/sound 0xcc4b8797	sound_open_dma
+EXPORT_SYMBOL sound/oss/sound 0xd85be938	midi_synth_set_instr
+EXPORT_SYMBOL sound/oss/sound 0xdb400afa	midi_synth_panning
+EXPORT_SYMBOL sound/oss/sound 0xe056b71c	DMAbuf_start_dma
+EXPORT_SYMBOL sound/oss/sound 0xe2675a79	sound_timer_interrupt
+EXPORT_SYMBOL sound/oss/sound 0xe7147a54	sound_timer_devs
+EXPORT_SYMBOL sound/oss/sound 0xeb315d99	DMAbuf_inputintr
+EXPORT_SYMBOL sound/oss/sound 0xf1ea8a20	midi_synth_aftertouch
+EXPORT_SYMBOL sound/oss/sound 0xf6b3a2fb	midi_synth_open
+EXPORT_SYMBOL sound/oss/sound 0xf78f6363	sequencer_init
+EXPORT_SYMBOL sound/oss/sound 0xfa6871be	sound_timer_syncinterval
+EXPORT_SYMBOL sound/oss/sound 0xfddcbfb3	midi_synth_send_sysex
+EXPORT_SYMBOL sound/oss/uart401 0x049cd8b7	uart401intr
+EXPORT_SYMBOL sound/oss/uart401 0x8568ad36	probe_uart401
+EXPORT_SYMBOL sound/oss/uart401 0xecfdd9c9	unload_uart401
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x0910ee91	snd_ac97_mixer
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x1b3778d7	snd_ac97_pcm_double_rate_rules
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x1b41ed9a	snd_ac97_write
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x6e0cc209	snd_ac97_read
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x70bc8119	snd_ac97_update_bits
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x7115c08f	snd_ac97_set_rate
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x75784cd3	snd_ac97_bus
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x7f85672a	snd_ac97_resume
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x916e2abe	snd_ac97_update_power
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x9313b9af	snd_ac97_tune_hardware
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x94e2fa41	snd_ac97_pcm_close
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xa8073da0	snd_ac97_suspend
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xb070b092	snd_ac97_update
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xb531df07	snd_ac97_get_short_name
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xe5dc8e07	snd_ac97_pcm_assign
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xeb3eb3f4	snd_ac97_pcm_open
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xfd873bbe	snd_ac97_write_cache
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x31743777	snd_emu10k1_ptr_read
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x7bd0b82f	snd_emu10k1_memblk_map
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x9b405650	snd_emu10k1_voice_alloc
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xc2c97e05	snd_emu10k1_synth_alloc
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xcf3c6498	snd_emu10k1_voice_free
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xd0bb9e0a	snd_emu10k1_synth_free
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xd5330641	snd_emu10k1_synth_copy_from_user
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xdc0e29d1	snd_emu10k1_synth_bzero
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xf7432c20	snd_emu10k1_ptr_write
+EXPORT_SYMBOL sound/pci/hda/snd-hda-codec 0x80b5117b	snd_hda_parse_generic_codec
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x52fc594c	snd_ice1712_akm4xxx_free
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x9292ca25	snd_ice1712_akm4xxx_init
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0xf17f3b6d	snd_ice1712_akm4xxx_build_controls
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x012b72a3	oxygen_read32
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x1d9aa543	oxygen_write16_masked
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x1fd8e490	oxygen_reset_uart
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x2ad68a39	oxygen_write_ac97
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x457c2154	oxygen_read16
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x58aaad0c	oxygen_write_spi
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x5b4f3702	oxygen_pci_remove
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x5b53040e	oxygen_write_i2c
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x63f03d34	oxygen_write_ac97_masked
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x90e6a81b	oxygen_write16
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x9f02b7f3	oxygen_write8
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xa2c0af7f	oxygen_write8_masked
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xa42da045	oxygen_write_uart
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xa48cf7a3	oxygen_read8
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xbb623ee2	oxygen_write32_masked
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xd9ff9f15	oxygen_pci_probe
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xe472d2fd	oxygen_pci_resume
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xecd558ed	oxygen_pci_suspend
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xf5b40a18	oxygen_read_ac97
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xfbb0611b	oxygen_write32
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x06d4e9ef	snd_trident_write_voice_regs
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x3e9dbcfe	snd_trident_free_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x68da0971	snd_trident_start_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0xa4b0a4b0	snd_trident_alloc_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0xee26c14b	snd_trident_stop_voice
+EXPORT_SYMBOL sound/soc/codecs/snd-soc-uda134x 0xea85cdd5	uda134x_dai
+EXPORT_SYMBOL sound/sound_firmware 0x39e3dd23	mod_firmware_load
+EXPORT_SYMBOL sound/soundcore 0x06fb3be6	register_sound_special_device
+EXPORT_SYMBOL sound/soundcore 0x1df82141	register_sound_mixer
+EXPORT_SYMBOL sound/soundcore 0x49aef193	register_sound_special
+EXPORT_SYMBOL sound/soundcore 0x6913b239	sound_class
+EXPORT_SYMBOL sound/soundcore 0x6f49f6dc	register_sound_dsp
+EXPORT_SYMBOL sound/soundcore 0x7afc9d8a	unregister_sound_mixer
+EXPORT_SYMBOL sound/soundcore 0x99c95fa5	unregister_sound_special
+EXPORT_SYMBOL sound/soundcore 0xaba54682	register_sound_midi
+EXPORT_SYMBOL sound/soundcore 0xcd083b10	unregister_sound_dsp
+EXPORT_SYMBOL sound/soundcore 0xfdab6de3	unregister_sound_midi
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x162035ac	snd_emux_terminate_all
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x655cb202	snd_sf_linear_to_log
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xa0493727	snd_emux_register
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xc3e9fdd0	snd_emux_new
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xcda77f2f	snd_emux_lock_voice
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xd265b413	snd_emux_unlock_voice
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xdd8a86b5	snd_emux_free
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x131fbd17	snd_util_mem_alloc
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x3f835418	__snd_util_memblk_new
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x5e2a5655	snd_util_memhdr_new
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x9f2c299c	snd_util_mem_free
+EXPORT_SYMBOL sound/synth/snd-util-mem 0xb9bdb5f8	__snd_util_mem_free
+EXPORT_SYMBOL sound/synth/snd-util-mem 0xc60284be	snd_util_memhdr_free
+EXPORT_SYMBOL sound/synth/snd-util-mem 0xf02dfdcb	__snd_util_mem_alloc
+EXPORT_SYMBOL sound/synth/snd-util-mem 0xf39b8b68	snd_util_mem_avail
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0x16756dc0	snd_usbmidi_input_start
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0x63343b1d	snd_usbmidi_input_stop
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0x9c7e3221	snd_usb_create_midi_interface
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0xd9d2bb03	snd_usbmidi_disconnect
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x1bb5e46f	dm_mem_cache_alloc
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x1ed16c40	dm_mem_cache_client_create
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x5bf6330b	dm_mem_cache_client_destroy
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x729e1a76	dm_mem_cache_free
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x920a7a41	dm_message_parse
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x96944a3d	dm_mem_cache_grow
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0xa16c6711	dm_mem_cache_shrink
+EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x04dca738	lirc_unregister_driver
+EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x793238f1	lirc_get_pdata
+EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x9b2782c8	lirc_register_driver
+EXPORT_SYMBOL vmlinux 0x00000000	per_cpu__softirq_work_list
+EXPORT_SYMBOL vmlinux 0x002852b3	locks_init_lock
+EXPORT_SYMBOL vmlinux 0x002e62fd	i2c_smbus_process_call
+EXPORT_SYMBOL vmlinux 0x00388c79	fddi_type_trans
+EXPORT_SYMBOL vmlinux 0x00393203	ps2_begin_command
+EXPORT_SYMBOL vmlinux 0x0043022e	tcp_getsockopt
+EXPORT_SYMBOL vmlinux 0x004bc308	jbd2_journal_load
+EXPORT_SYMBOL vmlinux 0x006c5cd4	scsi_track_queue_full
+EXPORT_SYMBOL vmlinux 0x00801678	flush_scheduled_work
+EXPORT_SYMBOL vmlinux 0x00978af1	blk_queue_max_hw_sectors
+EXPORT_SYMBOL vmlinux 0x009d258f	_write_lock
+EXPORT_SYMBOL vmlinux 0x00adfab9	pci_restore_state
+EXPORT_SYMBOL vmlinux 0x00b0983f	blk_register_region
+EXPORT_SYMBOL vmlinux 0x00be7052	__scm_send
+EXPORT_SYMBOL vmlinux 0x00c4dc87	timecounter_init
+EXPORT_SYMBOL vmlinux 0x00e75bb8	alloc_hippi_dev
+EXPORT_SYMBOL vmlinux 0x01000e51	schedule
+EXPORT_SYMBOL vmlinux 0x010fc41e	uart_suspend_port
+EXPORT_SYMBOL vmlinux 0x01257259	dev_unicast_sync
+EXPORT_SYMBOL vmlinux 0x0132d7ba	dcache_dir_open
+EXPORT_SYMBOL vmlinux 0x01358170	sock_no_connect
+EXPORT_SYMBOL vmlinux 0x016a08fd	rdmsr_on_cpus
+EXPORT_SYMBOL vmlinux 0x016c29a8	open_by_devnum
+EXPORT_SYMBOL vmlinux 0x0186d073	percpu_counter_set
+EXPORT_SYMBOL vmlinux 0x018a8eca	compat_ip_setsockopt
+EXPORT_SYMBOL vmlinux 0x01902adf	netpoll_trap
+EXPORT_SYMBOL vmlinux 0x01a4aab6	set_irq_chip_data
+EXPORT_SYMBOL vmlinux 0x01b0bf82	register_sysrq_key
+EXPORT_SYMBOL vmlinux 0x01d19038	acpi_enable_subsystem
+EXPORT_SYMBOL vmlinux 0x01e2c600	genl_unregister_ops
+EXPORT_SYMBOL vmlinux 0x01fa4c96	tcp_sendmsg
+EXPORT_SYMBOL vmlinux 0x020a9adf	sock_recvmsg
+EXPORT_SYMBOL vmlinux 0x02124474	ip_send_check
+EXPORT_SYMBOL vmlinux 0x0237b57a	arch_unregister_cpu
+EXPORT_SYMBOL vmlinux 0x0256389f	bit_waitqueue
+EXPORT_SYMBOL vmlinux 0x02649054	security_sock_rcv_skb
+EXPORT_SYMBOL vmlinux 0x0272ff3d	keyring_clear
+EXPORT_SYMBOL vmlinux 0x029444f0	native_read_tsc
+EXPORT_SYMBOL vmlinux 0x0298d368	kobject_init
+EXPORT_SYMBOL vmlinux 0x02a6ce5a	crc16_table
+EXPORT_SYMBOL vmlinux 0x02aff2f4	acpi_install_gpe_handler
+EXPORT_SYMBOL vmlinux 0x02b0d359	mmc_request_done
+EXPORT_SYMBOL vmlinux 0x02b3575c	sock_no_socketpair
+EXPORT_SYMBOL vmlinux 0x02b82f04	blk_queue_resize_tags
+EXPORT_SYMBOL vmlinux 0x02c40853	textsearch_unregister
+EXPORT_SYMBOL vmlinux 0x02cf663d	eth_change_mtu
+EXPORT_SYMBOL vmlinux 0x02d0a239	genphy_resume
+EXPORT_SYMBOL vmlinux 0x02d81845	audit_log_task_context
+EXPORT_SYMBOL vmlinux 0x02e05da7	mark_buffer_dirty_inode
+EXPORT_SYMBOL vmlinux 0x032ba55e	simple_write_begin
+EXPORT_SYMBOL vmlinux 0x0334da4e	scsi_command_size_tbl
+EXPORT_SYMBOL vmlinux 0x033631f9	tcp_hashinfo
+EXPORT_SYMBOL vmlinux 0x033fdf0a	bio_integrity_tag_size
+EXPORT_SYMBOL vmlinux 0x0340d0e1	acpi_pci_osc_control_set
+EXPORT_SYMBOL vmlinux 0x0340e0ae	schedule_delayed_work
+EXPORT_SYMBOL vmlinux 0x03442c61	blk_dump_rq_flags
+EXPORT_SYMBOL vmlinux 0x034e0218	dma_pool_free
+EXPORT_SYMBOL vmlinux 0x034f959c	sock_register
+EXPORT_SYMBOL vmlinux 0x037a0cba	kfree
+EXPORT_SYMBOL vmlinux 0x03c06156	bitmap_fold
+EXPORT_SYMBOL vmlinux 0x03c54ba1	pci_remove_bus_device
+EXPORT_SYMBOL vmlinux 0x03e7e7fe	ip_fragment
+EXPORT_SYMBOL vmlinux 0x03fd2571	vm_unmap_ram
+EXPORT_SYMBOL vmlinux 0x04077247	journal_start
+EXPORT_SYMBOL vmlinux 0x041cb456	vfs_symlink
+EXPORT_SYMBOL vmlinux 0x0422fe4a	inet_csk_timer_bug_msg
+EXPORT_SYMBOL vmlinux 0x047fff6e	force_sig
+EXPORT_SYMBOL vmlinux 0x0487f831	fb_find_best_display
+EXPORT_SYMBOL vmlinux 0x04b3026e	vga_client_register
+EXPORT_SYMBOL vmlinux 0x04d073c5	get_io_context
+EXPORT_SYMBOL vmlinux 0x04d727ca	skb_seq_read
+EXPORT_SYMBOL vmlinux 0x04d8c750	release_perfctr_nmi
+EXPORT_SYMBOL vmlinux 0x04e1b5ce	kmem_cache_size
+EXPORT_SYMBOL vmlinux 0x0517b727	kern_path
+EXPORT_SYMBOL vmlinux 0x05240ee7	percpu_counter_batch
+EXPORT_SYMBOL vmlinux 0x05436508	ip_getsockopt
+EXPORT_SYMBOL vmlinux 0x054f28b4	pcim_enable_device
+EXPORT_SYMBOL vmlinux 0x055611e8	pcim_iomap_table
+EXPORT_SYMBOL vmlinux 0x0568fe9a	key_negate_and_link
+EXPORT_SYMBOL vmlinux 0x05859a14	compat_sock_common_setsockopt
+EXPORT_SYMBOL vmlinux 0x0587956c	nobh_writepage
+EXPORT_SYMBOL vmlinux 0x058c2449	tty_register_driver
+EXPORT_SYMBOL vmlinux 0x05aab3a0	qdisc_warn_nonwc
+EXPORT_SYMBOL vmlinux 0x05ce3356	pcie_set_readrq
+EXPORT_SYMBOL vmlinux 0x05e28d43	__first_cpu
+EXPORT_SYMBOL vmlinux 0x06124bd5	unlock_new_inode
+EXPORT_SYMBOL vmlinux 0x061651be	strcat
+EXPORT_SYMBOL vmlinux 0x067c8388	dquot_drop
+EXPORT_SYMBOL vmlinux 0x067d8d35	security_release_secctx
+EXPORT_SYMBOL vmlinux 0x0685d6d5	swiotlb_map_sg_attrs
+EXPORT_SYMBOL vmlinux 0x068c7263	ioremap_cache
+EXPORT_SYMBOL vmlinux 0x06a485f2	__krealloc
+EXPORT_SYMBOL vmlinux 0x06a9a527	jbd2_journal_init_jbd_inode
+EXPORT_SYMBOL vmlinux 0x06acc8aa	get_unmapped_area_prot
+EXPORT_SYMBOL vmlinux 0x06d728b1	tcp_parse_md5sig_option
+EXPORT_SYMBOL vmlinux 0x06fab991	alloc_pages_current
+EXPORT_SYMBOL vmlinux 0x06fe3b14	default_grn
+EXPORT_SYMBOL vmlinux 0x06fe8ef2	find_or_create_page
+EXPORT_SYMBOL vmlinux 0x0727c4f3	iowrite8
+EXPORT_SYMBOL vmlinux 0x073dfa12	generate_resume_trace
+EXPORT_SYMBOL vmlinux 0x074a8538	nla_put_nohdr
+EXPORT_SYMBOL vmlinux 0x076fc4e5	generic_writepages
+EXPORT_SYMBOL vmlinux 0x07824f24	dma_pool_alloc
+EXPORT_SYMBOL vmlinux 0x078be046	nf_register_sockopt
+EXPORT_SYMBOL vmlinux 0x0796125f	loop_register_transfer
+EXPORT_SYMBOL vmlinux 0x0799aca4	local_bh_enable
+EXPORT_SYMBOL vmlinux 0x0799c50a	param_set_ulong
+EXPORT_SYMBOL vmlinux 0x07a890c8	fb_alloc_cmap
+EXPORT_SYMBOL vmlinux 0x07ad7ea3	tty_hung_up_p
+EXPORT_SYMBOL vmlinux 0x07b95dad	bioset_create
+EXPORT_SYMBOL vmlinux 0x07cc4a5d	printk_timed_ratelimit
+EXPORT_SYMBOL vmlinux 0x07d9b783	scsi_nl_send_vendor_msg
+EXPORT_SYMBOL vmlinux 0x07e06587	devm_request_threaded_irq
+EXPORT_SYMBOL vmlinux 0x07f3c3e7	tcp_make_synack
+EXPORT_SYMBOL vmlinux 0x080c5546	key_task_permission
+EXPORT_SYMBOL vmlinux 0x0824d939	gnet_stats_copy_app
+EXPORT_SYMBOL vmlinux 0x082c3213	pci_root_buses
+EXPORT_SYMBOL vmlinux 0x0830e278	read_dev_sector
+EXPORT_SYMBOL vmlinux 0x083ead0d	sk_stop_timer
+EXPORT_SYMBOL vmlinux 0x084fd1cd	grab_cache_page_write_begin
+EXPORT_SYMBOL vmlinux 0x0861931f	tty_throttle
+EXPORT_SYMBOL vmlinux 0x08631fa9	bio_integrity_alloc_bioset
+EXPORT_SYMBOL vmlinux 0x08687f62	rfkill_blocked
+EXPORT_SYMBOL vmlinux 0x086d6f66	swiotlb_dma_mapping_error
+EXPORT_SYMBOL vmlinux 0x088cfd52	mutex_unlock
+EXPORT_SYMBOL vmlinux 0x08a9d7b8	__netdev_alloc_skb
+EXPORT_SYMBOL vmlinux 0x08d66a3a	warn_slowpath_fmt
+EXPORT_SYMBOL vmlinux 0x0902d72c	i2c_smbus_write_word_data
+EXPORT_SYMBOL vmlinux 0x0933aae1	efi_enabled
+EXPORT_SYMBOL vmlinux 0x0948cde9	num_physpages
+EXPORT_SYMBOL vmlinux 0x0952d527	jbd2_log_wait_commit
+EXPORT_SYMBOL vmlinux 0x098431ba	acpi_get_current_resources
+EXPORT_SYMBOL vmlinux 0x098926af	sock_wake_async
+EXPORT_SYMBOL vmlinux 0x098b71c6	fb_dealloc_cmap
+EXPORT_SYMBOL vmlinux 0x09aaeaf8	mdiobus_free
+EXPORT_SYMBOL vmlinux 0x09aaff40	md_write_end
+EXPORT_SYMBOL vmlinux 0x09c55cec	schedule_timeout_interruptible
+EXPORT_SYMBOL vmlinux 0x09d44df9	in_lock_functions
+EXPORT_SYMBOL vmlinux 0x09db5c4c	kset_unregister
+EXPORT_SYMBOL vmlinux 0x0a188cbe	skb_store_bits
+EXPORT_SYMBOL vmlinux 0x0a2487e0	unblock_all_signals
+EXPORT_SYMBOL vmlinux 0x0a2ba577	tcp_rcv_established
+EXPORT_SYMBOL vmlinux 0x0a347d61	rfkill_set_led_trigger_name
+EXPORT_SYMBOL vmlinux 0x0a47b9ee	compat_tcp_getsockopt
+EXPORT_SYMBOL vmlinux 0x0a7ad07a	dev_get_by_index
+EXPORT_SYMBOL vmlinux 0x0acb1a3c	__bitmap_shift_right
+EXPORT_SYMBOL vmlinux 0x0acf7679	dma_issue_pending_all
+EXPORT_SYMBOL vmlinux 0x0ad569b6	tcp_md5_hash_skb_data
+EXPORT_SYMBOL vmlinux 0x0ae7508b	scsi_setup_fs_cmnd
+EXPORT_SYMBOL vmlinux 0x0b0cedab	agp_generic_type_to_mask_type
+EXPORT_SYMBOL vmlinux 0x0b0d888b	icmpv6_err_convert
+EXPORT_SYMBOL vmlinux 0x0b1beb31	vmalloc_32_user
+EXPORT_SYMBOL vmlinux 0x0b271877	mb_cache_shrink
+EXPORT_SYMBOL vmlinux 0x0b360a95	ethtool_op_get_flags
+EXPORT_SYMBOL vmlinux 0x0b39b6b4	dev_queue_xmit
+EXPORT_SYMBOL vmlinux 0x0b3b5f40	pci_dev_driver
+EXPORT_SYMBOL vmlinux 0x0b61bd0b	security_inode_init_security
+EXPORT_SYMBOL vmlinux 0x0b742fd7	simple_strtol
+EXPORT_SYMBOL vmlinux 0x0ba92977	sk_reset_timer
+EXPORT_SYMBOL vmlinux 0x0bb03d71	dev_getbyhwaddr
+EXPORT_SYMBOL vmlinux 0x0be15aaf	ppp_unregister_compressor
+EXPORT_SYMBOL vmlinux 0x0c1606f8	udp_sendmsg
+EXPORT_SYMBOL vmlinux 0x0c278d59	scsi_print_command
+EXPORT_SYMBOL vmlinux 0x0c38207a	have_submounts
+EXPORT_SYMBOL vmlinux 0x0c3efe93	pnp_register_driver
+EXPORT_SYMBOL vmlinux 0x0c3f8bb6	dst_discard
+EXPORT_SYMBOL vmlinux 0x0c502002	rwsem_wake
+EXPORT_SYMBOL vmlinux 0x0c637b70	__blk_end_request
+EXPORT_SYMBOL vmlinux 0x0c65e73c	scsi_normalize_sense
+EXPORT_SYMBOL vmlinux 0x0c6e8beb	kmem_cache_create
+EXPORT_SYMBOL vmlinux 0x0c8c9e99	scsi_show_extd_sense
+EXPORT_SYMBOL vmlinux 0x0c923b7b	mark_buffer_async_write
+EXPORT_SYMBOL vmlinux 0x0ca7b7a8	acpi_check_region
+EXPORT_SYMBOL vmlinux 0x0ca80d3b	read_cache_page
+EXPORT_SYMBOL vmlinux 0x0cae232b	utf16s_to_utf8s
+EXPORT_SYMBOL vmlinux 0x0cb83f6d	fb_set_suspend
+EXPORT_SYMBOL vmlinux 0x0cc24803	dm_table_get_md
+EXPORT_SYMBOL vmlinux 0x0cccaa92	sget
+EXPORT_SYMBOL vmlinux 0x0cd7a14f	end_page_writeback
+EXPORT_SYMBOL vmlinux 0x0d26a76d	_write_lock_irq
+EXPORT_SYMBOL vmlinux 0x0d3dda14	acpi_get_type
+EXPORT_SYMBOL vmlinux 0x0d470dee	mdiobus_scan
+EXPORT_SYMBOL vmlinux 0x0d542439	__ipv6_addr_type
+EXPORT_SYMBOL vmlinux 0x0d648f7e	acpi_unlock_ac_dir
+EXPORT_SYMBOL vmlinux 0x0d8251df	mmc_wait_for_cmd
+EXPORT_SYMBOL vmlinux 0x0d9e36e6	misc_deregister
+EXPORT_SYMBOL vmlinux 0x0da10ec3	security_sock_graft
+EXPORT_SYMBOL vmlinux 0x0da94fd2	per_cpu__softnet_data
+EXPORT_SYMBOL vmlinux 0x0dbf8cda	splice_from_pipe_feed
+EXPORT_SYMBOL vmlinux 0x0dccfd57	dcache_dir_close
+EXPORT_SYMBOL vmlinux 0x0e1ce6a9	acpi_get_hp_hw_control_from_firmware
+EXPORT_SYMBOL vmlinux 0x0e20e5d4	framebuffer_release
+EXPORT_SYMBOL vmlinux 0x0e34944a	blk_queue_merge_bvec
+EXPORT_SYMBOL vmlinux 0x0e52592a	panic
+EXPORT_SYMBOL vmlinux 0x0e610cfc	pci_fixup_cardbus
+EXPORT_SYMBOL vmlinux 0x0e6ce457	__skb_checksum_complete_head
+EXPORT_SYMBOL vmlinux 0x0e73c19b	journal_lock_updates
+EXPORT_SYMBOL vmlinux 0x0e83fea1	del_timer_sync
+EXPORT_SYMBOL vmlinux 0x0e8eb347	serio_open
+EXPORT_SYMBOL vmlinux 0x0ecc21df	dma_supported
+EXPORT_SYMBOL vmlinux 0x0ecfb721	ioctl_by_bdev
+EXPORT_SYMBOL vmlinux 0x0f01e39d	ps2_handle_ack
+EXPORT_SYMBOL vmlinux 0x0f0c57eb	pci_iounmap
+EXPORT_SYMBOL vmlinux 0x0f1ef871	posix_acl_alloc
+EXPORT_SYMBOL vmlinux 0x0f233373	__scsi_put_command
+EXPORT_SYMBOL vmlinux 0x0f837d91	sock_create_kern
+EXPORT_SYMBOL vmlinux 0x0f96f0e1	scsi_free_host_dev
+EXPORT_SYMBOL vmlinux 0x0faf0e4e	generic_file_direct_write
+EXPORT_SYMBOL vmlinux 0x0fc5e8eb	radix_tree_gang_lookup_slot
+EXPORT_SYMBOL vmlinux 0x0fcab50e	blk_rq_map_sg
+EXPORT_SYMBOL vmlinux 0x0fcb36e0	neigh_sysctl_unregister
+EXPORT_SYMBOL vmlinux 0x0fcb91bc	skb_add_rx_frag
+EXPORT_SYMBOL vmlinux 0x0fd00a68	acpi_clear_event
+EXPORT_SYMBOL vmlinux 0x0ff09672	take_over_console
+EXPORT_SYMBOL vmlinux 0x0ff2b602	slhc_compress
+EXPORT_SYMBOL vmlinux 0x0ffc29c3	ip4_datagram_connect
+EXPORT_SYMBOL vmlinux 0x10091b4c	lro_receive_skb
+EXPORT_SYMBOL vmlinux 0x100f98c6	compat_tcp_setsockopt
+EXPORT_SYMBOL vmlinux 0x102928f4	lease_modify
+EXPORT_SYMBOL vmlinux 0x1055423e	bioset_integrity_free
+EXPORT_SYMBOL vmlinux 0x105e2727	__tracepoint_kmalloc
+EXPORT_SYMBOL vmlinux 0x1072a394	csum_partial_copy_from_user
+EXPORT_SYMBOL vmlinux 0x1076ba27	__inet6_lookup_established
+EXPORT_SYMBOL vmlinux 0x107d5757	textsearch_destroy
+EXPORT_SYMBOL vmlinux 0x108e8985	param_get_uint
+EXPORT_SYMBOL vmlinux 0x109018ca	dm_kcopyd_client_destroy
+EXPORT_SYMBOL vmlinux 0x109d0645	dst_alloc
+EXPORT_SYMBOL vmlinux 0x10b56734	__xfrm_state_delete
+EXPORT_SYMBOL vmlinux 0x10ee20bb	default_blu
+EXPORT_SYMBOL vmlinux 0x1106dbe9	should_remove_suid
+EXPORT_SYMBOL vmlinux 0x1113c9e0	i2c_smbus_write_byte_data
+EXPORT_SYMBOL vmlinux 0x11267875	scsi_extd_sense_format
+EXPORT_SYMBOL vmlinux 0x114ed1ce	schedule_work_on
+EXPORT_SYMBOL vmlinux 0x115e3197	mdiobus_unregister
+EXPORT_SYMBOL vmlinux 0x1163f0a7	blk_max_low_pfn
+EXPORT_SYMBOL vmlinux 0x116c586a	dquot_alloc
+EXPORT_SYMBOL vmlinux 0x117093be	qdisc_class_hash_init
+EXPORT_SYMBOL vmlinux 0x1181084f	splice_from_pipe_begin
+EXPORT_SYMBOL vmlinux 0x118f01ea	putname
+EXPORT_SYMBOL vmlinux 0x119863a3	sync_inodes_sb
+EXPORT_SYMBOL vmlinux 0x11a18b14	__wake_up_bit
+EXPORT_SYMBOL vmlinux 0x11b2c3b7	kmem_cache_destroy
+EXPORT_SYMBOL vmlinux 0x12087346	register_netdev
+EXPORT_SYMBOL vmlinux 0x12189893	sk_stream_write_space
+EXPORT_SYMBOL vmlinux 0x122106a3	elv_dispatch_add_tail
+EXPORT_SYMBOL vmlinux 0x12304d6e	hippi_type_trans
+EXPORT_SYMBOL vmlinux 0x12368737	iunique
+EXPORT_SYMBOL vmlinux 0x12860698	input_free_device
+EXPORT_SYMBOL vmlinux 0x129bb39e	bdi_set_max_ratio
+EXPORT_SYMBOL vmlinux 0x12d0fd87	swiotlb_map_sg
+EXPORT_SYMBOL vmlinux 0x12f10736	udplite_table
+EXPORT_SYMBOL vmlinux 0x12f2b4be	d_prune_aliases
+EXPORT_SYMBOL vmlinux 0x12fe7dcb	dentry_unhash
+EXPORT_SYMBOL vmlinux 0x13253ac9	pci_request_selected_regions_exclusive
+EXPORT_SYMBOL vmlinux 0x134019cb	directly_mappable_cdev_bdi
+EXPORT_SYMBOL vmlinux 0x134816fa	kset_register
+EXPORT_SYMBOL vmlinux 0x135b2c47	netif_notify_peers
+EXPORT_SYMBOL vmlinux 0x135c2168	make_bad_inode
+EXPORT_SYMBOL vmlinux 0x1378e714	acpi_video_display_switch_support
+EXPORT_SYMBOL vmlinux 0x138a78d1	set_current_groups
+EXPORT_SYMBOL vmlinux 0x13d08da4	i2c_put_adapter
+EXPORT_SYMBOL vmlinux 0x13e5019d	scsi_host_set_state
+EXPORT_SYMBOL vmlinux 0x13f14cb3	bio_pair_release
+EXPORT_SYMBOL vmlinux 0x13f42152	system_entering_hibernation
+EXPORT_SYMBOL vmlinux 0x14105c88	bdput
+EXPORT_SYMBOL vmlinux 0x141138b8	nla_reserve
+EXPORT_SYMBOL vmlinux 0x1418593c	ip_route_me_harder
+EXPORT_SYMBOL vmlinux 0x1430e6e0	unregister_acpi_notifier
+EXPORT_SYMBOL vmlinux 0x143ed8d9	generic_setlease
+EXPORT_SYMBOL vmlinux 0x143f79d7	invalidate_inode_buffers
+EXPORT_SYMBOL vmlinux 0x14af0cf7	gen_pool_destroy
+EXPORT_SYMBOL vmlinux 0x14d4539f	pskb_expand_head
+EXPORT_SYMBOL vmlinux 0x1551dc51	bitmap_find_free_region
+EXPORT_SYMBOL vmlinux 0x15592650	scsi_register_interface
+EXPORT_SYMBOL vmlinux 0x1577d989	bio_integrity_get_tag
+EXPORT_SYMBOL vmlinux 0x15801eda	input_set_capability
+EXPORT_SYMBOL vmlinux 0x15ac1ccc	cad_pid
+EXPORT_SYMBOL vmlinux 0x15c4ebb4	current_fs_time
+EXPORT_SYMBOL vmlinux 0x15cd37e1	neigh_resolve_output
+EXPORT_SYMBOL vmlinux 0x15e8ac92	journal_ack_err
+EXPORT_SYMBOL vmlinux 0x15ef2dd9	kfifo_free
+EXPORT_SYMBOL vmlinux 0x15f81594	llc_sap_find
+EXPORT_SYMBOL vmlinux 0x160ea4c8	sfi_disabled
+EXPORT_SYMBOL vmlinux 0x1615d15e	nf_setsockopt
+EXPORT_SYMBOL vmlinux 0x1624b3af	call_usermodehelper_exec
+EXPORT_SYMBOL vmlinux 0x16305289	warn_slowpath_null
+EXPORT_SYMBOL vmlinux 0x16368146	sk_free
+EXPORT_SYMBOL vmlinux 0x1637d409	vlan_dev_real_dev
+EXPORT_SYMBOL vmlinux 0x163c5e39	twl4030_i2c_read
+EXPORT_SYMBOL vmlinux 0x1675606f	bad_dma_address
+EXPORT_SYMBOL vmlinux 0x167aae04	clear_page_dirty_for_io
+EXPORT_SYMBOL vmlinux 0x167e7f9d	__get_user_1
+EXPORT_SYMBOL vmlinux 0x16857729	ip6_route_me_harder
+EXPORT_SYMBOL vmlinux 0x1691f558	i2c_smbus_write_i2c_block_data
+EXPORT_SYMBOL vmlinux 0x169a6438	bioset_free
+EXPORT_SYMBOL vmlinux 0x16c3506a	lock_sock_nested
+EXPORT_SYMBOL vmlinux 0x16eaa758	blk_queue_update_dma_alignment
+EXPORT_SYMBOL vmlinux 0x16f4c6f0	km_query
+EXPORT_SYMBOL vmlinux 0x170c25ee	acpi_get_next_object
+EXPORT_SYMBOL vmlinux 0x175b816c	dquot_free_space
+EXPORT_SYMBOL vmlinux 0x1781d28e	sock_alloc_send_skb
+EXPORT_SYMBOL vmlinux 0x178c8fa6	xfrm_policy_alloc
+EXPORT_SYMBOL vmlinux 0x178d5adf	node_data
+EXPORT_SYMBOL vmlinux 0x17c115ae	scsi_eh_finish_cmd
+EXPORT_SYMBOL vmlinux 0x17c85a66	radix_tree_tagged
+EXPORT_SYMBOL vmlinux 0x17cd2672	tcp_gro_receive
+EXPORT_SYMBOL vmlinux 0x17d0ef2d	set_page_dirty_lock
+EXPORT_SYMBOL vmlinux 0x17df17bc	sysctl_tcp_ecn
+EXPORT_SYMBOL vmlinux 0x17f341a0	i8042_lock_chip
+EXPORT_SYMBOL vmlinux 0x17ff4469	bitmap_unplug
+EXPORT_SYMBOL vmlinux 0x1813dfe0	inet_sendmsg
+EXPORT_SYMBOL vmlinux 0x181b6ff2	mempool_resize
+EXPORT_SYMBOL vmlinux 0x18389a08	__dev_remove_pack
+EXPORT_SYMBOL vmlinux 0x183fa88b	mempool_alloc_slab
+EXPORT_SYMBOL vmlinux 0x184b82fb	mmc_vddrange_to_ocrmask
+EXPORT_SYMBOL vmlinux 0x18502252	sock_kmalloc
+EXPORT_SYMBOL vmlinux 0x18602107	scsi_mode_sense
+EXPORT_SYMBOL vmlinux 0x186d64a4	inet_frags_exit_net
+EXPORT_SYMBOL vmlinux 0x18771395	blk_get_request
+EXPORT_SYMBOL vmlinux 0x188eaa57	vm_map_ram
+EXPORT_SYMBOL vmlinux 0x189b6bac	memory_read_from_buffer
+EXPORT_SYMBOL vmlinux 0x18ac8118	simple_release_fs
+EXPORT_SYMBOL vmlinux 0x18b72573	register_kmmio_probe
+EXPORT_SYMBOL vmlinux 0x18baa56a	blk_queue_invalidate_tags
+EXPORT_SYMBOL vmlinux 0x18cc50e1	k8_northbridges
+EXPORT_SYMBOL vmlinux 0x18e8401d	proc_dointvec_jiffies
+EXPORT_SYMBOL vmlinux 0x190c3d2b	dmam_alloc_noncoherent
+EXPORT_SYMBOL vmlinux 0x19391763	iov_iter_fault_in_readable
+EXPORT_SYMBOL vmlinux 0x1943386e	journal_invalidatepage
+EXPORT_SYMBOL vmlinux 0x19723ba3	rfkill_set_sw_state
+EXPORT_SYMBOL vmlinux 0x1976bc16	__tracepoint_kmem_cache_free
+EXPORT_SYMBOL vmlinux 0x1985ed3c	prepare_to_wait_exclusive
+EXPORT_SYMBOL vmlinux 0x199ed0cd	net_disable_timestamp
+EXPORT_SYMBOL vmlinux 0x19b4bb0a	dm_table_unplug_all
+EXPORT_SYMBOL vmlinux 0x19c99847	llc_set_station_handler
+EXPORT_SYMBOL vmlinux 0x19cbf9ba	kmem_cache_name
+EXPORT_SYMBOL vmlinux 0x19d03262	inet6_add_protocol
+EXPORT_SYMBOL vmlinux 0x19d5d20a	acpi_walk_namespace
+EXPORT_SYMBOL vmlinux 0x1a218de6	fb_show_logo
+EXPORT_SYMBOL vmlinux 0x1a45cb6c	acpi_disabled
+EXPORT_SYMBOL vmlinux 0x1a67d0a8	phy_print_status
+EXPORT_SYMBOL vmlinux 0x1a75caa3	_read_lock
+EXPORT_SYMBOL vmlinux 0x1a7cd831	tcp_check_req
+EXPORT_SYMBOL vmlinux 0x1a893cb6	__scsi_device_lookup
+EXPORT_SYMBOL vmlinux 0x1a8a845e	idle_nomwait
+EXPORT_SYMBOL vmlinux 0x1abe5069	simple_write_end
+EXPORT_SYMBOL vmlinux 0x1ace138d	bitmap_allocate_region
+EXPORT_SYMBOL vmlinux 0x1aec7e67	inet_del_protocol
+EXPORT_SYMBOL vmlinux 0x1aed4297	tcp_parse_options
+EXPORT_SYMBOL vmlinux 0x1afec1b6	add_to_page_cache_locked
+EXPORT_SYMBOL vmlinux 0x1b015d25	bitmap_parselist
+EXPORT_SYMBOL vmlinux 0x1b0c7ebd	backlight_force_update
+EXPORT_SYMBOL vmlinux 0x1b626b5e	neigh_destroy
+EXPORT_SYMBOL vmlinux 0x1b6314fd	in_aton
+EXPORT_SYMBOL vmlinux 0x1b753783	kmem_cache_alloc_node
+EXPORT_SYMBOL vmlinux 0x1b84993a	netdev_rx_csum_fault
+EXPORT_SYMBOL vmlinux 0x1b89419f	add_wait_queue_exclusive
+EXPORT_SYMBOL vmlinux 0x1b8b95ad	i8042_unlock_chip
+EXPORT_SYMBOL vmlinux 0x1b9981cc	set_irq_wake
+EXPORT_SYMBOL vmlinux 0x1b9c88a5	mutex_lock_interruptible
+EXPORT_SYMBOL vmlinux 0x1b9e0ff1	scsilun_to_int
+EXPORT_SYMBOL vmlinux 0x1baafc36	sk_wait_data
+EXPORT_SYMBOL vmlinux 0x1bade9ea	uart_unregister_driver
+EXPORT_SYMBOL vmlinux 0x1baf36cb	inode_needs_sync
+EXPORT_SYMBOL vmlinux 0x1bc947e9	dev_get_by_name
+EXPORT_SYMBOL vmlinux 0x1bcc1369	pipe_lock
+EXPORT_SYMBOL vmlinux 0x1bd53af4	mb_cache_entry_alloc
+EXPORT_SYMBOL vmlinux 0x1c1af916	set_normalized_timespec
+EXPORT_SYMBOL vmlinux 0x1c5f1281	d_alloc_name
+EXPORT_SYMBOL vmlinux 0x1c6c95f0	pci_get_slot
+EXPORT_SYMBOL vmlinux 0x1c8a04b0	acpi_reset
+EXPORT_SYMBOL vmlinux 0x1c8a5d6b	default_file_splice_read
+EXPORT_SYMBOL vmlinux 0x1c94b464	pcix_get_max_mmrbc
+EXPORT_SYMBOL vmlinux 0x1cb01d7b	dquot_claim_space
+EXPORT_SYMBOL vmlinux 0x1cc6719a	register_reboot_notifier
+EXPORT_SYMBOL vmlinux 0x1ccc8a2b	set_page_dirty
+EXPORT_SYMBOL vmlinux 0x1ceddff2	tcp_connect
+EXPORT_SYMBOL vmlinux 0x1cefe352	wait_for_completion
+EXPORT_SYMBOL vmlinux 0x1cfdffdf	pcie_port_service_register
+EXPORT_SYMBOL vmlinux 0x1d0bb228	dev_unicast_add
+EXPORT_SYMBOL vmlinux 0x1d2b6b8a	journal_start_commit
+EXPORT_SYMBOL vmlinux 0x1d2e87c6	do_gettimeofday
+EXPORT_SYMBOL vmlinux 0x1d6d1737	dm_unregister_target
+EXPORT_SYMBOL vmlinux 0x1d759f26	xfrm_unregister_km
+EXPORT_SYMBOL vmlinux 0x1db7706b	__copy_user_nocache
+EXPORT_SYMBOL vmlinux 0x1dc2d7a7	genphy_restart_aneg
+EXPORT_SYMBOL vmlinux 0x1dc36131	fb_destroy_modedb
+EXPORT_SYMBOL vmlinux 0x1dca153d	bio_endio
+EXPORT_SYMBOL vmlinux 0x1dd571e6	fb_copy_cmap
+EXPORT_SYMBOL vmlinux 0x1df320bc	sock_sendmsg
+EXPORT_SYMBOL vmlinux 0x1dffd862	dma_pool_create
+EXPORT_SYMBOL vmlinux 0x1e0125de	d_delete
+EXPORT_SYMBOL vmlinux 0x1e0c2be4	ioremap_wc
+EXPORT_SYMBOL vmlinux 0x1e2e427f	cpumask_next_and
+EXPORT_SYMBOL vmlinux 0x1e41a689	writeback_inodes_sb_if_idle
+EXPORT_SYMBOL vmlinux 0x1e49255a	iov_iter_copy_from_user
+EXPORT_SYMBOL vmlinux 0x1e66f167	pci_match_id
+EXPORT_SYMBOL vmlinux 0x1e684874	thaw_bdev
+EXPORT_SYMBOL vmlinux 0x1e6d26a8	strstr
+EXPORT_SYMBOL vmlinux 0x1e72b042	complete_request_key
+EXPORT_SYMBOL vmlinux 0x1e9e1211	tty_driver_flush_buffer
+EXPORT_SYMBOL vmlinux 0x1ea59331	__ps2_command
+EXPORT_SYMBOL vmlinux 0x1efe283f	__cap_full_set
+EXPORT_SYMBOL vmlinux 0x1f0768db	input_unregister_device
+EXPORT_SYMBOL vmlinux 0x1f22a46a	xfrm_state_lookup
+EXPORT_SYMBOL vmlinux 0x1f2527f7	sock_map_fd
+EXPORT_SYMBOL vmlinux 0x1f2d78f7	pci_clear_master
+EXPORT_SYMBOL vmlinux 0x1f41f9e7	pci_get_class
+EXPORT_SYMBOL vmlinux 0x1f75e552	pnp_stop_dev
+EXPORT_SYMBOL vmlinux 0x1f7f72d6	inet_frag_evictor
+EXPORT_SYMBOL vmlinux 0x1fae143d	jbd2_journal_extend
+EXPORT_SYMBOL vmlinux 0x1fc3de7d	napi_gro_frags
+EXPORT_SYMBOL vmlinux 0x1fe99a03	i2c_del_adapter
+EXPORT_SYMBOL vmlinux 0x1fedf0f4	__request_region
+EXPORT_SYMBOL vmlinux 0x20000329	simple_strtoul
+EXPORT_SYMBOL vmlinux 0x2005e68a	acpi_remove_fixed_event_handler
+EXPORT_SYMBOL vmlinux 0x20092385	acpi_enter_sleep_state_s4bios
+EXPORT_SYMBOL vmlinux 0x200effc8	inet_frags_fini
+EXPORT_SYMBOL vmlinux 0x202c1bc1	__pskb_pull_tail
+EXPORT_SYMBOL vmlinux 0x20385c58	genl_register_mc_group
+EXPORT_SYMBOL vmlinux 0x204857ac	proc_dostring
+EXPORT_SYMBOL vmlinux 0x204ce359	unmap_mapping_range
+EXPORT_SYMBOL vmlinux 0x207f0596	inet_sock_destruct
+EXPORT_SYMBOL vmlinux 0x208739f6	acpi_load_table
+EXPORT_SYMBOL vmlinux 0x20a1bc75	vfs_dq_drop
+EXPORT_SYMBOL vmlinux 0x20eadeb6	ip_compute_csum
+EXPORT_SYMBOL vmlinux 0x20f9322a	idr_pre_get
+EXPORT_SYMBOL vmlinux 0x212983e7	d_path
+EXPORT_SYMBOL vmlinux 0x2136b299	compat_nf_setsockopt
+EXPORT_SYMBOL vmlinux 0x213bed38	ip_mc_inc_group
+EXPORT_SYMBOL vmlinux 0x2158f747	i2c_master_recv
+EXPORT_SYMBOL vmlinux 0x215ebd78	bitrev16
+EXPORT_SYMBOL vmlinux 0x21bd42c1	netdev_class_create_file
+EXPORT_SYMBOL vmlinux 0x21c0be6f	jbd2_journal_init_inode
+EXPORT_SYMBOL vmlinux 0x21d50a51	tcf_hash_release
+EXPORT_SYMBOL vmlinux 0x21e0ea22	acpi_get_id
+EXPORT_SYMBOL vmlinux 0x21e5679c	copy_user_generic
+EXPORT_SYMBOL vmlinux 0x21e56b79	serio_rescan
+EXPORT_SYMBOL vmlinux 0x21e80207	netdev_features_change
+EXPORT_SYMBOL vmlinux 0x22136fcc	pagevec_lookup
+EXPORT_SYMBOL vmlinux 0x222e7ce2	sysfs_streq
+EXPORT_SYMBOL vmlinux 0x2232cc29	tty_port_block_til_ready
+EXPORT_SYMBOL vmlinux 0x2259a882	bitmap_cond_end_sync
+EXPORT_SYMBOL vmlinux 0x226d4cd2	unload_nls
+EXPORT_SYMBOL vmlinux 0x226e86a9	audit_log
+EXPORT_SYMBOL vmlinux 0x227b58eb	tcp_v4_md5_hash_skb
+EXPORT_SYMBOL vmlinux 0x2286a483	elv_queue_empty
+EXPORT_SYMBOL vmlinux 0x2288378f	system_state
+EXPORT_SYMBOL vmlinux 0x22a73912	__tcp_put_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x22b325d5	kd_mksound
+EXPORT_SYMBOL vmlinux 0x22b6533b	xfrm_sad_getinfo
+EXPORT_SYMBOL vmlinux 0x22c26756	skb_make_writable
+EXPORT_SYMBOL vmlinux 0x232170c4	inode_setattr
+EXPORT_SYMBOL vmlinux 0x23269a13	strict_strtoul
+EXPORT_SYMBOL vmlinux 0x233c22cc	simple_dir_inode_operations
+EXPORT_SYMBOL vmlinux 0x234509f3	strncat
+EXPORT_SYMBOL vmlinux 0x23498e11	agp_generic_alloc_pages
+EXPORT_SYMBOL vmlinux 0x235d16e0	i2c_del_driver
+EXPORT_SYMBOL vmlinux 0x2362e7b9	phy_start_interrupts
+EXPORT_SYMBOL vmlinux 0x236c8c64	memcpy
+EXPORT_SYMBOL vmlinux 0x23b99e92	node_states
+EXPORT_SYMBOL vmlinux 0x23c8f257	slhc_uncompress
+EXPORT_SYMBOL vmlinux 0x23fd3028	vmalloc_node
+EXPORT_SYMBOL vmlinux 0x24428be5	strncpy_from_user
+EXPORT_SYMBOL vmlinux 0x244695f9	__locks_copy_lock
+EXPORT_SYMBOL vmlinux 0x2459bbcc	console_set_on_cmdline
+EXPORT_SYMBOL vmlinux 0x24624544	ftrace_print_flags_seq
+EXPORT_SYMBOL vmlinux 0x2467db4e	proto_register
+EXPORT_SYMBOL vmlinux 0x24686293	proc_doulongvec_minmax
+EXPORT_SYMBOL vmlinux 0x247ec075	phy_device_create
+EXPORT_SYMBOL vmlinux 0x24a4c5d8	xfrm6_prepare_output
+EXPORT_SYMBOL vmlinux 0x24a96205	mb_cache_entry_release
+EXPORT_SYMBOL vmlinux 0x24cc5485	inode_sub_bytes
+EXPORT_SYMBOL vmlinux 0x24d3f093	dev_driver_string
+EXPORT_SYMBOL vmlinux 0x24e4bb01	down_write_trylock
+EXPORT_SYMBOL vmlinux 0x24fdac79	wake_bit_function
+EXPORT_SYMBOL vmlinux 0x2501563d	simple_lookup
+EXPORT_SYMBOL vmlinux 0x25098555	fb_set_cmap
+EXPORT_SYMBOL vmlinux 0x250c6e93	xfrm_state_check_expire
+EXPORT_SYMBOL vmlinux 0x2540cc90	sock_tx_timestamp
+EXPORT_SYMBOL vmlinux 0x254a4fe5	unlock_super
+EXPORT_SYMBOL vmlinux 0x25820c64	fs_overflowuid
+EXPORT_SYMBOL vmlinux 0x258355b4	fb_find_best_mode
+EXPORT_SYMBOL vmlinux 0x2591994c	tcp_prot
+EXPORT_SYMBOL vmlinux 0x259d0854	security_task_getsecid
+EXPORT_SYMBOL vmlinux 0x25c24e7e	ethtool_op_get_rx_csum
+EXPORT_SYMBOL vmlinux 0x25e1bbfc	try_to_release_page
+EXPORT_SYMBOL vmlinux 0x25ec1b28	strlen
+EXPORT_SYMBOL vmlinux 0x25ef726e	md_wait_for_blocked_rdev
+EXPORT_SYMBOL vmlinux 0x26513c12	register_console
+EXPORT_SYMBOL vmlinux 0x266c7f28	uart_register_driver
+EXPORT_SYMBOL vmlinux 0x266e5f40	__blockdev_direct_IO
+EXPORT_SYMBOL vmlinux 0x267fc65b	__tasklet_hi_schedule
+EXPORT_SYMBOL vmlinux 0x26800b88	__wait_on_buffer
+EXPORT_SYMBOL vmlinux 0x2685c3d7	__sg_alloc_table
+EXPORT_SYMBOL vmlinux 0x269118dc	sk_stream_wait_memory
+EXPORT_SYMBOL vmlinux 0x26abea19	tcp_proc_unregister
+EXPORT_SYMBOL vmlinux 0x26c9d933	ppp_register_net_channel
+EXPORT_SYMBOL vmlinux 0x26e76fb8	sysctl_udp_wmem_min
+EXPORT_SYMBOL vmlinux 0x2702bb70	qdisc_list_del
+EXPORT_SYMBOL vmlinux 0x271cba95	acpi_bus_private_data_handler
+EXPORT_SYMBOL vmlinux 0x2727da5d	_atomic_dec_and_lock
+EXPORT_SYMBOL vmlinux 0x272d394e	mtrr_del
+EXPORT_SYMBOL vmlinux 0x27710f55	tcp_gro_complete
+EXPORT_SYMBOL vmlinux 0x27864d57	memparse
+EXPORT_SYMBOL vmlinux 0x278a7b10	sync_dirty_buffer
+EXPORT_SYMBOL vmlinux 0x27aeea2b	set_security_override
+EXPORT_SYMBOL vmlinux 0x27b35c51	tcp_sockets_allocated
+EXPORT_SYMBOL vmlinux 0x27bbf221	disable_irq_nosync
+EXPORT_SYMBOL vmlinux 0x27c33efe	csum_ipv6_magic
+EXPORT_SYMBOL vmlinux 0x27c61ece	qdisc_put_stab
+EXPORT_SYMBOL vmlinux 0x27d298ee	setup_arg_pages
+EXPORT_SYMBOL vmlinux 0x27d52d5c	blk_requeue_request
+EXPORT_SYMBOL vmlinux 0x2804ea8f	__free_pages
+EXPORT_SYMBOL vmlinux 0x28278703	jbd2_journal_unlock_updates
+EXPORT_SYMBOL vmlinux 0x28475687	shrink_dcache_parent
+EXPORT_SYMBOL vmlinux 0x28495076	misc_register
+EXPORT_SYMBOL vmlinux 0x2849f477	blk_queue_end_tag
+EXPORT_SYMBOL vmlinux 0x285135e6	acpi_evaluate_integer
+EXPORT_SYMBOL vmlinux 0x285ac517	strict_strtoll
+EXPORT_SYMBOL vmlinux 0x28760b98	security_inode_setsecctx
+EXPORT_SYMBOL vmlinux 0x2876a6d3	memcpy_toiovec
+EXPORT_SYMBOL vmlinux 0x28a2ed02	scsi_build_sense_buffer
+EXPORT_SYMBOL vmlinux 0x28b530df	bio_integrity_advance
+EXPORT_SYMBOL vmlinux 0x290ff5f2	mmc_release_host
+EXPORT_SYMBOL vmlinux 0x292093f4	native_rdmsr_safe_regs
+EXPORT_SYMBOL vmlinux 0x2931df20	unlock_buffer
+EXPORT_SYMBOL vmlinux 0x29537c9e	alloc_chrdev_region
+EXPORT_SYMBOL vmlinux 0x295b9a4b	i8042_check_port_owner
+EXPORT_SYMBOL vmlinux 0x297305f6	vfs_dq_transfer
+EXPORT_SYMBOL vmlinux 0x2997f4ea	tty_chars_in_buffer
+EXPORT_SYMBOL vmlinux 0x29bd4c46	__cap_init_eff_set
+EXPORT_SYMBOL vmlinux 0x29d799ba	eth_header
+EXPORT_SYMBOL vmlinux 0x29efe000	pcim_iomap
+EXPORT_SYMBOL vmlinux 0x2a09737f	remove_proc_entry
+EXPORT_SYMBOL vmlinux 0x2a0a80f0	blk_run_queue
+EXPORT_SYMBOL vmlinux 0x2a1f81f0	generic_readlink
+EXPORT_SYMBOL vmlinux 0x2a25ca34	inet_frag_find
+EXPORT_SYMBOL vmlinux 0x2a303d4d	check_signature
+EXPORT_SYMBOL vmlinux 0x2a3720f6	__breadahead
+EXPORT_SYMBOL vmlinux 0x2a53fa0b	journal_check_used_features
+EXPORT_SYMBOL vmlinux 0x2a62bba9	get_sb_ns
+EXPORT_SYMBOL vmlinux 0x2a9df173	generic_setxattr
+EXPORT_SYMBOL vmlinux 0x2ae1c533	skb_split
+EXPORT_SYMBOL vmlinux 0x2ae232ad	vc_resize
+EXPORT_SYMBOL vmlinux 0x2aeb2800	mempool_create_node
+EXPORT_SYMBOL vmlinux 0x2b006994	netdev_class_remove_file
+EXPORT_SYMBOL vmlinux 0x2b0ba2b0	scsi_sense_desc_find
+EXPORT_SYMBOL vmlinux 0x2b2392a6	deactivate_locked_super
+EXPORT_SYMBOL vmlinux 0x2b34b998	fb_get_buffer_offset
+EXPORT_SYMBOL vmlinux 0x2b368814	swiotlb_dma_supported
+EXPORT_SYMBOL vmlinux 0x2b5cb285	__insert_inode_hash
+EXPORT_SYMBOL vmlinux 0x2b6cd28e	scsi_device_resume
+EXPORT_SYMBOL vmlinux 0x2b857b05	ethtool_op_set_tso
+EXPORT_SYMBOL vmlinux 0x2b92e326	blk_plug_device
+EXPORT_SYMBOL vmlinux 0x2ba1d9e0	fb_set_var
+EXPORT_SYMBOL vmlinux 0x2ba707a8	sysctl_tcp_low_latency
+EXPORT_SYMBOL vmlinux 0x2bb55d6e	acpi_remove_notify_handler
+EXPORT_SYMBOL vmlinux 0x2bb6fde2	__kfifo_put
+EXPORT_SYMBOL vmlinux 0x2bfeb410	acpi_get_handle
+EXPORT_SYMBOL vmlinux 0x2c23f3b4	simple_rmdir
+EXPORT_SYMBOL vmlinux 0x2c5749e6	acpi_clear_gpe
+EXPORT_SYMBOL vmlinux 0x2c599cfc	pci_disable_device
+EXPORT_SYMBOL vmlinux 0x2c5fe1aa	scsi_is_host_device
+EXPORT_SYMBOL vmlinux 0x2c985869	names_cachep
+EXPORT_SYMBOL vmlinux 0x2ca1c669	__page_symlink
+EXPORT_SYMBOL vmlinux 0x2cbf5cb6	file_fsync
+EXPORT_SYMBOL vmlinux 0x2d43e70e	swiotlb_sync_single_for_device
+EXPORT_SYMBOL vmlinux 0x2d47717f	scsi_calculate_bounce_limit
+EXPORT_SYMBOL vmlinux 0x2d4adb2c	netif_napi_add
+EXPORT_SYMBOL vmlinux 0x2d5528c9	sg_copy_to_buffer
+EXPORT_SYMBOL vmlinux 0x2d89342a	scsi_show_sense_hdr
+EXPORT_SYMBOL vmlinux 0x2da28dce	serial8250_register_port
+EXPORT_SYMBOL vmlinux 0x2da8454b	skb_kill_datagram
+EXPORT_SYMBOL vmlinux 0x2dac0496	neigh_for_each
+EXPORT_SYMBOL vmlinux 0x2dbafbe3	pcibios_align_resource
+EXPORT_SYMBOL vmlinux 0x2dc01232	__inet6_hash
+EXPORT_SYMBOL vmlinux 0x2dd16564	arch_register_cpu
+EXPORT_SYMBOL vmlinux 0x2de0ba4b	bio_free
+EXPORT_SYMBOL vmlinux 0x2de89f56	__mark_inode_dirty
+EXPORT_SYMBOL vmlinux 0x2dedc4c2	acpi_format_exception
+EXPORT_SYMBOL vmlinux 0x2def7f76	rtc_cmos_write
+EXPORT_SYMBOL vmlinux 0x2dfd8797	qdisc_watchdog_schedule
+EXPORT_SYMBOL vmlinux 0x2e06111d	cpu_present_mask
+EXPORT_SYMBOL vmlinux 0x2e0d0a45	inet6_bind
+EXPORT_SYMBOL vmlinux 0x2e2ce9e0	sysctl_tcp_syncookies
+EXPORT_SYMBOL vmlinux 0x2e308acb	mmc_host_disable
+EXPORT_SYMBOL vmlinux 0x2e4a39f8	sysctl_udp_mem
+EXPORT_SYMBOL vmlinux 0x2e4f0cfd	sock_wmalloc
+EXPORT_SYMBOL vmlinux 0x2e599889	vfs_rmdir
+EXPORT_SYMBOL vmlinux 0x2e78088c	truncate_inode_pages_range
+EXPORT_SYMBOL vmlinux 0x2e97a729	idr_remove
+EXPORT_SYMBOL vmlinux 0x2e9ee68c	pneigh_enqueue
+EXPORT_SYMBOL vmlinux 0x2ea8f7b6	pci_request_regions_exclusive
+EXPORT_SYMBOL vmlinux 0x2eaeceba	arp_send
+EXPORT_SYMBOL vmlinux 0x2eb9a0e8	_read_lock_irq
+EXPORT_SYMBOL vmlinux 0x2ed2b791	truncate_inode_pages
+EXPORT_SYMBOL vmlinux 0x2f02625c	tcf_hash_check
+EXPORT_SYMBOL vmlinux 0x2f10fa6d	pci_do_scan_bus
+EXPORT_SYMBOL vmlinux 0x2f1801cc	input_unfilter_device
+EXPORT_SYMBOL vmlinux 0x2f254985	tcp_initialize_rcv_mss
+EXPORT_SYMBOL vmlinux 0x2f368959	inet_add_protocol
+EXPORT_SYMBOL vmlinux 0x2f55c0f1	inet_dev_addr_type
+EXPORT_SYMBOL vmlinux 0x2f61773a	lro_vlan_hwaccel_receive_skb
+EXPORT_SYMBOL vmlinux 0x2f7bae72	sk_common_release
+EXPORT_SYMBOL vmlinux 0x2f7fbcc2	vfs_statfs
+EXPORT_SYMBOL vmlinux 0x2f9877ca	scsi_register
+EXPORT_SYMBOL vmlinux 0x2f9905c0	vfs_path_lookup
+EXPORT_SYMBOL vmlinux 0x2fa5a500	memcmp
+EXPORT_SYMBOL vmlinux 0x2fa94957	cfb_copyarea
+EXPORT_SYMBOL vmlinux 0x2fbd59d0	phy_driver_unregister
+EXPORT_SYMBOL vmlinux 0x2fc52982	tty_get_baud_rate
+EXPORT_SYMBOL vmlinux 0x2fd1d7ad	__blk_end_request_all
+EXPORT_SYMBOL vmlinux 0x2ff063b5	acpi_get_name
+EXPORT_SYMBOL vmlinux 0x300b49bf	__dev_getfirstbyhwtype
+EXPORT_SYMBOL vmlinux 0x30123eb5	icmpv6_statistics
+EXPORT_SYMBOL vmlinux 0x30226ddf	agp_device_command
+EXPORT_SYMBOL vmlinux 0x306ea15f	security_file_permission
+EXPORT_SYMBOL vmlinux 0x307f7776	timecompare_offset
+EXPORT_SYMBOL vmlinux 0x309ea809	journal_wipe
+EXPORT_SYMBOL vmlinux 0x30bb765e	elv_rb_find
+EXPORT_SYMBOL vmlinux 0x30c5e4e5	load_nls_default
+EXPORT_SYMBOL vmlinux 0x30e74134	tty_termios_copy_hw
+EXPORT_SYMBOL vmlinux 0x30fa6542	generic_shutdown_super
+EXPORT_SYMBOL vmlinux 0x30ffe1f7	cancel_delayed_work_sync
+EXPORT_SYMBOL vmlinux 0x310245bf	pci_find_capability
+EXPORT_SYMBOL vmlinux 0x31121fe1	genl_unregister_mc_group
+EXPORT_SYMBOL vmlinux 0x31445261	fb_firmware_edid
+EXPORT_SYMBOL vmlinux 0x3145216f	pci_dev_present
+EXPORT_SYMBOL vmlinux 0x3147857d	default_red
+EXPORT_SYMBOL vmlinux 0x317fbf4d	bio_unmap_user
+EXPORT_SYMBOL vmlinux 0x3186c922	journal_get_create_access
+EXPORT_SYMBOL vmlinux 0x318e0d53	journal_dirty_data
+EXPORT_SYMBOL vmlinux 0x31941e95	scsi_cmd_ioctl
+EXPORT_SYMBOL vmlinux 0x3199b435	jbd2_journal_get_create_access
+EXPORT_SYMBOL vmlinux 0x319a7d71	cdrom_mode_select
+EXPORT_SYMBOL vmlinux 0x31ae5aa6	audit_log_format
+EXPORT_SYMBOL vmlinux 0x31afbb5a	lookup_bdev
+EXPORT_SYMBOL vmlinux 0x31b31f5c	csum_partial_copy_nocheck
+EXPORT_SYMBOL vmlinux 0x31de2e3a	neigh_compat_output
+EXPORT_SYMBOL vmlinux 0x31e76b57	recalibrate_cpu_khz
+EXPORT_SYMBOL vmlinux 0x31ebadcd	in_group_p
+EXPORT_SYMBOL vmlinux 0x31f12a0b	tty_pair_get_tty
+EXPORT_SYMBOL vmlinux 0x31f570ca	skb_pad
+EXPORT_SYMBOL vmlinux 0x320e567e	dquot_initialize
+EXPORT_SYMBOL vmlinux 0x3285cc48	param_set_uint
+EXPORT_SYMBOL vmlinux 0x328bd7ce	set_pages_array_wb
+EXPORT_SYMBOL vmlinux 0x32a5d712	scsi_device_put
+EXPORT_SYMBOL vmlinux 0x32f48972	bio_map_kern
+EXPORT_SYMBOL vmlinux 0x32fd3957	skb_free_datagram_locked
+EXPORT_SYMBOL vmlinux 0x33325024	dquot_destroy
+EXPORT_SYMBOL vmlinux 0x334d793b	___pskb_trim
+EXPORT_SYMBOL vmlinux 0x33723412	dma_pool_destroy
+EXPORT_SYMBOL vmlinux 0x33801c02	genphy_suspend
+EXPORT_SYMBOL vmlinux 0x338a5d85	blk_queue_dma_alignment
+EXPORT_SYMBOL vmlinux 0x338e0a94	journal_force_commit_nested
+EXPORT_SYMBOL vmlinux 0x339e93ab	thermal_zone_device_unregister
+EXPORT_SYMBOL vmlinux 0x33b84f74	copy_page
+EXPORT_SYMBOL vmlinux 0x33c0014f	register_sysctl_paths
+EXPORT_SYMBOL vmlinux 0x33ccdbc9	find_get_pages_contig
+EXPORT_SYMBOL vmlinux 0x33d92f9a	prepare_to_wait
+EXPORT_SYMBOL vmlinux 0x33e23104	eth_header_cache
+EXPORT_SYMBOL vmlinux 0x33ea4d5a	llc_add_pack
+EXPORT_SYMBOL vmlinux 0x33f3890e	icmp_send
+EXPORT_SYMBOL vmlinux 0x33f3c873	unregister_snap_client
+EXPORT_SYMBOL vmlinux 0x342c6161	seq_read
+EXPORT_SYMBOL vmlinux 0x3457cb68	param_set_long
+EXPORT_SYMBOL vmlinux 0x345cb14f	skb_find_text
+EXPORT_SYMBOL vmlinux 0x348f1ebb	tty_kref_put
+EXPORT_SYMBOL vmlinux 0x349cba85	strchr
+EXPORT_SYMBOL vmlinux 0x34a3da5d	tcp_md5_hash_key
+EXPORT_SYMBOL vmlinux 0x34b1a873	rfkill_unregister
+EXPORT_SYMBOL vmlinux 0x3506ff98	block_write_full_page_endio
+EXPORT_SYMBOL vmlinux 0x351b9245	find_inode_number
+EXPORT_SYMBOL vmlinux 0x352acc59	vm_insert_page
+EXPORT_SYMBOL vmlinux 0x3534c07e	rtnetlink_put_metrics
+EXPORT_SYMBOL vmlinux 0x35370a79	scsi_setup_blk_pc_cmnd
+EXPORT_SYMBOL vmlinux 0x3540685f	tty_write_room
+EXPORT_SYMBOL vmlinux 0x35438a1d	ethtool_op_set_tx_hw_csum
+EXPORT_SYMBOL vmlinux 0x357a6a68	release_firmware
+EXPORT_SYMBOL vmlinux 0x3582ed17	vfs_stat
+EXPORT_SYMBOL vmlinux 0x35890fbe	unregister_qdisc
+EXPORT_SYMBOL vmlinux 0x359be1b0	inet_dgram_ops
+EXPORT_SYMBOL vmlinux 0x359ed64f	qdisc_watchdog_init
+EXPORT_SYMBOL vmlinux 0x35aca67b	disk_stack_limits
+EXPORT_SYMBOL vmlinux 0x35b0650f	vsnprintf
+EXPORT_SYMBOL vmlinux 0x35bb63d5	security_path_rename
+EXPORT_SYMBOL vmlinux 0x35c2ba9e	refrigerator
+EXPORT_SYMBOL vmlinux 0x35cbd155	get_fs_type
+EXPORT_SYMBOL vmlinux 0x35dd0be1	nla_reserve_nohdr
+EXPORT_SYMBOL vmlinux 0x36058d52	pci_request_region_exclusive
+EXPORT_SYMBOL vmlinux 0x36068d21	phy_register_fixup
+EXPORT_SYMBOL vmlinux 0x360b1afe	probe_irq_mask
+EXPORT_SYMBOL vmlinux 0x36139a51	memcpy_fromiovec
+EXPORT_SYMBOL vmlinux 0x3622a25f	tcp_setsockopt
+EXPORT_SYMBOL vmlinux 0x364e987b	simple_set_mnt
+EXPORT_SYMBOL vmlinux 0x3656bf5a	lock_kernel
+EXPORT_SYMBOL vmlinux 0x36875389	__timecompare_update
+EXPORT_SYMBOL vmlinux 0x369ab685	tty_unregister_driver
+EXPORT_SYMBOL vmlinux 0x36cc5d18	blk_queue_bounce_limit
+EXPORT_SYMBOL vmlinux 0x36e2a902	write_inode_now
+EXPORT_SYMBOL vmlinux 0x36e6596a	posix_acl_permission
+EXPORT_SYMBOL vmlinux 0x36fd13d8	dev_close
+EXPORT_SYMBOL vmlinux 0x36ffcadb	scsi_ioctl
+EXPORT_SYMBOL vmlinux 0x3701a196	csum_partial_copy_to_user
+EXPORT_SYMBOL vmlinux 0x370961e2	kill_pid
+EXPORT_SYMBOL vmlinux 0x37237d01	vfs_quota_disable
+EXPORT_SYMBOL vmlinux 0x3724db3e	llc_build_and_send_ui_pkt
+EXPORT_SYMBOL vmlinux 0x3726de7f	tty_pair_get_pty
+EXPORT_SYMBOL vmlinux 0x372baafb	get_super
+EXPORT_SYMBOL vmlinux 0x3744cf36	vmalloc_to_pfn
+EXPORT_SYMBOL vmlinux 0x374ffc99	pv_cpu_ops
+EXPORT_SYMBOL vmlinux 0x375107cc	inode_get_bytes
+EXPORT_SYMBOL vmlinux 0x375450f4	alloc_tty_driver
+EXPORT_SYMBOL vmlinux 0x375465a7	radix_tree_gang_lookup_tag_slot
+EXPORT_SYMBOL vmlinux 0x3762a91f	make_EII_client
+EXPORT_SYMBOL vmlinux 0x377c39e2	tcf_register_action
+EXPORT_SYMBOL vmlinux 0x3791d650	pci_set_dma_seg_boundary
+EXPORT_SYMBOL vmlinux 0x37bdc039	mark_info_dirty
+EXPORT_SYMBOL vmlinux 0x37befc70	jiffies_to_msecs
+EXPORT_SYMBOL vmlinux 0x37cbfe63	check_disk_size_change
+EXPORT_SYMBOL vmlinux 0x37db8f19	dmi_get_date
+EXPORT_SYMBOL vmlinux 0x37fd2fa7	genl_register_ops
+EXPORT_SYMBOL vmlinux 0x38119ddc	seq_release
+EXPORT_SYMBOL vmlinux 0x381c965f	__netif_schedule
+EXPORT_SYMBOL vmlinux 0x3824b191	jbd2_journal_file_inode
+EXPORT_SYMBOL vmlinux 0x383eb3f8	dm_table_event
+EXPORT_SYMBOL vmlinux 0x3842f1c4	pci_scan_bridge
+EXPORT_SYMBOL vmlinux 0x384de3c1	pcim_iounmap_regions
+EXPORT_SYMBOL vmlinux 0x3859349b	agp_generic_alloc_page
+EXPORT_SYMBOL vmlinux 0x386897e0	pci_find_parent_resource
+EXPORT_SYMBOL vmlinux 0x387b2072	block_read_full_page
+EXPORT_SYMBOL vmlinux 0x3882fc47	pci_find_device
+EXPORT_SYMBOL vmlinux 0x38831846	pcix_get_mmrbc
+EXPORT_SYMBOL vmlinux 0x388f9128	xfrm_state_walk_done
+EXPORT_SYMBOL vmlinux 0x38aacb00	bd_set_size
+EXPORT_SYMBOL vmlinux 0x38b92846	llc_remove_pack
+EXPORT_SYMBOL vmlinux 0x38cab31c	init_timer_deferrable_key
+EXPORT_SYMBOL vmlinux 0x38f1f2fa	ethtool_op_set_sg
+EXPORT_SYMBOL vmlinux 0x38f33bed	dump_fpu
+EXPORT_SYMBOL vmlinux 0x38f86aab	put_page
+EXPORT_SYMBOL vmlinux 0x38f89d42	pci_set_dma_mask
+EXPORT_SYMBOL vmlinux 0x390b2713	xfrm_prepare_input
+EXPORT_SYMBOL vmlinux 0x3927cca9	ip_defrag
+EXPORT_SYMBOL vmlinux 0x393329f8	dma_async_memcpy_buf_to_pg
+EXPORT_SYMBOL vmlinux 0x394d3a06	serio_unregister_driver
+EXPORT_SYMBOL vmlinux 0x39808c97	vfs_getattr
+EXPORT_SYMBOL vmlinux 0x3980aac1	unregister_reboot_notifier
+EXPORT_SYMBOL vmlinux 0x39f9b80f	file_permission
+EXPORT_SYMBOL vmlinux 0x3a066d96	thermal_zone_device_register
+EXPORT_SYMBOL vmlinux 0x3a2204c6	security_netlink_recv
+EXPORT_SYMBOL vmlinux 0x3a2fc53e	arp_create
+EXPORT_SYMBOL vmlinux 0x3a347929	scsi_release_buffers
+EXPORT_SYMBOL vmlinux 0x3a39f0f6	__xfrm_decode_session
+EXPORT_SYMBOL vmlinux 0x3a541329	uart_remove_one_port
+EXPORT_SYMBOL vmlinux 0x3a691b88	generic_splice_sendpage
+EXPORT_SYMBOL vmlinux 0x3a71bc4e	kernel_sendmsg
+EXPORT_SYMBOL vmlinux 0x3a934e48	dev_set_drvdata
+EXPORT_SYMBOL vmlinux 0x3a93b91d	tty_port_hangup
+EXPORT_SYMBOL vmlinux 0x3a9b6fb9	blk_unregister_region
+EXPORT_SYMBOL vmlinux 0x3aa1dbcf	_spin_unlock_bh
+EXPORT_SYMBOL vmlinux 0x3aaecb02	devm_free_irq
+EXPORT_SYMBOL vmlinux 0x3ae831b6	kref_init
+EXPORT_SYMBOL vmlinux 0x3b27f527	slow_work_enqueue
+EXPORT_SYMBOL vmlinux 0x3b3016d3	cpufreq_unregister_notifier
+EXPORT_SYMBOL vmlinux 0x3b745a37	slow_work_register_user
+EXPORT_SYMBOL vmlinux 0x3b80b9b4	generic_file_mmap
+EXPORT_SYMBOL vmlinux 0x3b94f41d	key_instantiate_and_link
+EXPORT_SYMBOL vmlinux 0x3bb3aca3	udp_ioctl
+EXPORT_SYMBOL vmlinux 0x3bb5556c	mb_cache_entry_find_next
+EXPORT_SYMBOL vmlinux 0x3bc89f66	path_put
+EXPORT_SYMBOL vmlinux 0x3bd1b1f6	msecs_to_jiffies
+EXPORT_SYMBOL vmlinux 0x3bf79888	dm_io_client_resize
+EXPORT_SYMBOL vmlinux 0x3bf9118b	generic_listxattr
+EXPORT_SYMBOL vmlinux 0x3bfa14eb	tcp_v4_md5_do_add
+EXPORT_SYMBOL vmlinux 0x3c2c5af5	sprintf
+EXPORT_SYMBOL vmlinux 0x3c57e352	journal_unlock_updates
+EXPORT_SYMBOL vmlinux 0x3c67b4c6	unregister_netdevice
+EXPORT_SYMBOL vmlinux 0x3c6c4b85	tcf_em_tree_dump
+EXPORT_SYMBOL vmlinux 0x3c7227bf	complete_all
+EXPORT_SYMBOL vmlinux 0x3c87116b	scsi_report_bus_reset
+EXPORT_SYMBOL vmlinux 0x3c8cb552	cdrom_open
+EXPORT_SYMBOL vmlinux 0x3c9377bd	dev_addr_del
+EXPORT_SYMBOL vmlinux 0x3c9d1211	string_get_size
+EXPORT_SYMBOL vmlinux 0x3cc0a3bb	xfrm_spd_getinfo
+EXPORT_SYMBOL vmlinux 0x3ce4ca6f	disable_irq
+EXPORT_SYMBOL vmlinux 0x3d01485a	sock_alloc_send_pskb
+EXPORT_SYMBOL vmlinux 0x3d13668a	scsi_device_lookup_by_target
+EXPORT_SYMBOL vmlinux 0x3d23e3a0	register_cdrom
+EXPORT_SYMBOL vmlinux 0x3d3b780b	i2c_smbus_read_block_data
+EXPORT_SYMBOL vmlinux 0x3d4031ca	__devm_release_region
+EXPORT_SYMBOL vmlinux 0x3d5e9b47	phy_connect
+EXPORT_SYMBOL vmlinux 0x3d611620	dev_kfree_skb_any
+EXPORT_SYMBOL vmlinux 0x3d68bd4b	flow_cache_genid
+EXPORT_SYMBOL vmlinux 0x3d6f47c3	security_inode_getsecctx
+EXPORT_SYMBOL vmlinux 0x3d7c1ed7	msrs_alloc
+EXPORT_SYMBOL vmlinux 0x3d8728bb	memcpy_toiovecend
+EXPORT_SYMBOL vmlinux 0x3d9ee9f0	clear_page
+EXPORT_SYMBOL vmlinux 0x3da171f9	pci_mem_start
+EXPORT_SYMBOL vmlinux 0x3da3436d	register_netdevice
+EXPORT_SYMBOL vmlinux 0x3da5eb6d	kfifo_alloc
+EXPORT_SYMBOL vmlinux 0x3db2e258	radix_tree_gang_lookup
+EXPORT_SYMBOL vmlinux 0x3dbba24a	inode_init_always
+EXPORT_SYMBOL vmlinux 0x3e08e4c5	pci_release_selected_regions
+EXPORT_SYMBOL vmlinux 0x3e1f073d	wait_for_completion_timeout
+EXPORT_SYMBOL vmlinux 0x3e219de6	try_wait_for_completion
+EXPORT_SYMBOL vmlinux 0x3e2401fe	acpi_lock_ac_dir
+EXPORT_SYMBOL vmlinux 0x3e2452f2	flush_signals
+EXPORT_SYMBOL vmlinux 0x3e2ae3a8	acpi_release_global_lock
+EXPORT_SYMBOL vmlinux 0x3e348ae2	skb_queue_head
+EXPORT_SYMBOL vmlinux 0x3e383385	nf_hooks
+EXPORT_SYMBOL vmlinux 0x3e3abf82	bitmap_startwrite
+EXPORT_SYMBOL vmlinux 0x3e45e9ff	register_inetaddr_notifier
+EXPORT_SYMBOL vmlinux 0x3e899c9d	blk_limits_io_min
+EXPORT_SYMBOL vmlinux 0x3eab3156	journal_set_features
+EXPORT_SYMBOL vmlinux 0x3ec1d14e	tcf_hash_destroy
+EXPORT_SYMBOL vmlinux 0x3ed63055	zlib_inflateReset
+EXPORT_SYMBOL vmlinux 0x3ef801f4	km_policy_notify
+EXPORT_SYMBOL vmlinux 0x3efd3426	dm_table_put
+EXPORT_SYMBOL vmlinux 0x3f0546a8	ioread32_rep
+EXPORT_SYMBOL vmlinux 0x3f0b911e	sock_create
+EXPORT_SYMBOL vmlinux 0x3f1899f1	up
+EXPORT_SYMBOL vmlinux 0x3f4547a7	put_unused_fd
+EXPORT_SYMBOL vmlinux 0x3f5fe308	dquot_acquire
+EXPORT_SYMBOL vmlinux 0x3f659ea3	read_cache_page_async
+EXPORT_SYMBOL vmlinux 0x3f6b7809	dev_set_mac_address
+EXPORT_SYMBOL vmlinux 0x3f877bd6	alloc_disk_node
+EXPORT_SYMBOL vmlinux 0x3f8b4b53	netlink_rcv_skb
+EXPORT_SYMBOL vmlinux 0x3f9bd5fe	__register_binfmt
+EXPORT_SYMBOL vmlinux 0x3fa1e9ec	vfs_readlink
+EXPORT_SYMBOL vmlinux 0x3fa913da	strspn
+EXPORT_SYMBOL vmlinux 0x3fbeb8e6	__secpath_destroy
+EXPORT_SYMBOL vmlinux 0x3fcf826d	bio_integrity_split
+EXPORT_SYMBOL vmlinux 0x3fe0e66c	netif_rx_ni
+EXPORT_SYMBOL vmlinux 0x3fec048f	sg_next
+EXPORT_SYMBOL vmlinux 0x3ff62317	local_bh_disable
+EXPORT_SYMBOL vmlinux 0x40576574	open_exec
+EXPORT_SYMBOL vmlinux 0x405c1144	get_seconds
+EXPORT_SYMBOL vmlinux 0x4097fa45	acpi_read_bit_register
+EXPORT_SYMBOL vmlinux 0x409873e3	tty_termios_baud_rate
+EXPORT_SYMBOL vmlinux 0x40a27c37	scsi_dev_info_remove_list
+EXPORT_SYMBOL vmlinux 0x40a992a3	unregister_console
+EXPORT_SYMBOL vmlinux 0x40c89d46	acpi_get_table_by_index
+EXPORT_SYMBOL vmlinux 0x40d13c06	call_usermodehelper_setkeys
+EXPORT_SYMBOL vmlinux 0x40ef437a	__vlan_hwaccel_rx
+EXPORT_SYMBOL vmlinux 0x4101bbde	param_set_copystring
+EXPORT_SYMBOL vmlinux 0x4108e69a	fb_match_mode
+EXPORT_SYMBOL vmlinux 0x41166725	inet_frags_init_net
+EXPORT_SYMBOL vmlinux 0x41286647	set_pages_x
+EXPORT_SYMBOL vmlinux 0x41344088	param_get_charp
+EXPORT_SYMBOL vmlinux 0x41446b33	do_munmap
+EXPORT_SYMBOL vmlinux 0x41482d8b	strndup_user
+EXPORT_SYMBOL vmlinux 0x414b09c5	alloc_fddidev
+EXPORT_SYMBOL vmlinux 0x415ebde5	page_follow_link_light
+EXPORT_SYMBOL vmlinux 0x416983d9	netdev_fix_features
+EXPORT_SYMBOL vmlinux 0x4188d439	neigh_rand_reach_time
+EXPORT_SYMBOL vmlinux 0x4197ced1	netlink_ack
+EXPORT_SYMBOL vmlinux 0x41a9c68d	_spin_trylock_bh
+EXPORT_SYMBOL vmlinux 0x41fdf1e7	ip_mc_dec_group
+EXPORT_SYMBOL vmlinux 0x420df9e7	netif_carrier_off
+EXPORT_SYMBOL vmlinux 0x4211c3c1	zlib_inflateInit2
+EXPORT_SYMBOL vmlinux 0x42224298	sscanf
+EXPORT_SYMBOL vmlinux 0x422ff42c	sg_miter_start
+EXPORT_SYMBOL vmlinux 0x4232ef57	dev_addr_add_multiple
+EXPORT_SYMBOL vmlinux 0x42595e58	vgacon_text_force
+EXPORT_SYMBOL vmlinux 0x426ae686	__set_page_dirty_buffers
+EXPORT_SYMBOL vmlinux 0x4273d97b	posix_test_lock
+EXPORT_SYMBOL vmlinux 0x427ef691	sk_alloc
+EXPORT_SYMBOL vmlinux 0x428f1877	flush_old_exec
+EXPORT_SYMBOL vmlinux 0x4294beb0	blk_make_request
+EXPORT_SYMBOL vmlinux 0x42981799	get_sb_pseudo
+EXPORT_SYMBOL vmlinux 0x42a4bdf2	in_egroup_p
+EXPORT_SYMBOL vmlinux 0x42aa2e12	redraw_screen
+EXPORT_SYMBOL vmlinux 0x42acbf72	posix_acl_from_xattr
+EXPORT_SYMBOL vmlinux 0x42be8e30	generic_file_splice_read
+EXPORT_SYMBOL vmlinux 0x42c8de35	ioremap_nocache
+EXPORT_SYMBOL vmlinux 0x42d0ed3a	nf_reinject
+EXPORT_SYMBOL vmlinux 0x42d71be2	kobject_set_name
+EXPORT_SYMBOL vmlinux 0x42d95895	kill_fasync
+EXPORT_SYMBOL vmlinux 0x42e0c277	scsi_get_host_dev
+EXPORT_SYMBOL vmlinux 0x42e4c8eb	scsi_is_target_device
+EXPORT_SYMBOL vmlinux 0x42f89056	skb_recv_datagram
+EXPORT_SYMBOL vmlinux 0x4302d0eb	free_pages
+EXPORT_SYMBOL vmlinux 0x431310d5	__register_chrdev
+EXPORT_SYMBOL vmlinux 0x43262ada	dev_getfirstbyhwtype
+EXPORT_SYMBOL vmlinux 0x4327f0d5	memset_io
+EXPORT_SYMBOL vmlinux 0x4333eadb	param_set_short
+EXPORT_SYMBOL vmlinux 0x43385ad9	acpi_pci_unregister_driver
+EXPORT_SYMBOL vmlinux 0x434fa55c	release_console_sem
+EXPORT_SYMBOL vmlinux 0x436c2179	iowrite32
+EXPORT_SYMBOL vmlinux 0x43827980	mmc_align_data_size
+EXPORT_SYMBOL vmlinux 0x439d0346	__seq_open_private
+EXPORT_SYMBOL vmlinux 0x439f0a09	sk_receive_skb
+EXPORT_SYMBOL vmlinux 0x43ab66c3	param_array_get
+EXPORT_SYMBOL vmlinux 0x43b877d8	xfrm_policy_unregister_afinfo
+EXPORT_SYMBOL vmlinux 0x43ce22d2	bio_integrity_set_tag
+EXPORT_SYMBOL vmlinux 0x43ec913a	put_cmsg
+EXPORT_SYMBOL vmlinux 0x4411b530	inet_dgram_connect
+EXPORT_SYMBOL vmlinux 0x44161c19	unregister_shrinker
+EXPORT_SYMBOL vmlinux 0x442ab7b1	__skb_warn_lro_forwarding
+EXPORT_SYMBOL vmlinux 0x444779c4	nla_find
+EXPORT_SYMBOL vmlinux 0x4469cc40	inet_sk_rebuild_header
+EXPORT_SYMBOL vmlinux 0x446e49a0	journal_force_commit
+EXPORT_SYMBOL vmlinux 0x4492f454	xfrm_policy_byid
+EXPORT_SYMBOL vmlinux 0x449739f5	thermal_cooling_device_register
+EXPORT_SYMBOL vmlinux 0x44aaf30f	tsc_khz
+EXPORT_SYMBOL vmlinux 0x44b1d0a9	scsi_set_medium_removal
+EXPORT_SYMBOL vmlinux 0x44b911c3	rb_replace_node
+EXPORT_SYMBOL vmlinux 0x44ca5541	set_trace_device
+EXPORT_SYMBOL vmlinux 0x44d560e3	init_level4_pgt
+EXPORT_SYMBOL vmlinux 0x44e2a393	pid_task
+EXPORT_SYMBOL vmlinux 0x44e9a829	match_token
+EXPORT_SYMBOL vmlinux 0x44fe8d48	blk_rq_count_integrity_sg
+EXPORT_SYMBOL vmlinux 0x452f2279	tty_register_ldisc
+EXPORT_SYMBOL vmlinux 0x4537067e	skb_put
+EXPORT_SYMBOL vmlinux 0x453c8403	pci_msi_enabled
+EXPORT_SYMBOL vmlinux 0x45450063	mod_timer
+EXPORT_SYMBOL vmlinux 0x4550ba8a	register_cpu_notifier
+EXPORT_SYMBOL vmlinux 0x455f4f99	pci_scan_slot
+EXPORT_SYMBOL vmlinux 0x45704798	print_hex_dump_bytes
+EXPORT_SYMBOL vmlinux 0x4575315d	utf8s_to_utf16s
+EXPORT_SYMBOL vmlinux 0x458a8e3f	devm_ioremap
+EXPORT_SYMBOL vmlinux 0x459040f4	sock_no_accept
+EXPORT_SYMBOL vmlinux 0x45947727	param_array_set
+EXPORT_SYMBOL vmlinux 0x45ab9e4a	skb_prepare_seq_read
+EXPORT_SYMBOL vmlinux 0x45ad7443	kmem_cache_free
+EXPORT_SYMBOL vmlinux 0x45d11c43	down_interruptible
+EXPORT_SYMBOL vmlinux 0x45d55543	down_write
+EXPORT_SYMBOL vmlinux 0x45dce32c	fifo_set_limit
+EXPORT_SYMBOL vmlinux 0x46085e4f	add_timer
+EXPORT_SYMBOL vmlinux 0x4621a691	dma_sync_wait
+EXPORT_SYMBOL vmlinux 0x4659b3ef	ps2_sendbyte
+EXPORT_SYMBOL vmlinux 0x465a8156	scsi_adjust_queue_depth
+EXPORT_SYMBOL vmlinux 0x4663f862	__dev_get_by_index
+EXPORT_SYMBOL vmlinux 0x4664daf6	filp_close
+EXPORT_SYMBOL vmlinux 0x466c14a7	__delay
+EXPORT_SYMBOL vmlinux 0x468cc6b1	kernel_read
+EXPORT_SYMBOL vmlinux 0x46b5dba9	input_unregister_handler
+EXPORT_SYMBOL vmlinux 0x46bb60b8	open_bdev_exclusive
+EXPORT_SYMBOL vmlinux 0x46c47fb6	__node_distance
+EXPORT_SYMBOL vmlinux 0x46ede823	ipv6_getsockopt
+EXPORT_SYMBOL vmlinux 0x46f0c15a	generic_file_readonly_mmap
+EXPORT_SYMBOL vmlinux 0x471b65f1	md_done_sync
+EXPORT_SYMBOL vmlinux 0x475100c2	inet_get_local_port_range
+EXPORT_SYMBOL vmlinux 0x475f010b	acpi_purge_cached_objects
+EXPORT_SYMBOL vmlinux 0x4760b653	xfrm_state_flush
+EXPORT_SYMBOL vmlinux 0x477df28a	jbd2_journal_abort
+EXPORT_SYMBOL vmlinux 0x478d10b2	ht_destroy_irq
+EXPORT_SYMBOL vmlinux 0x479c3c86	find_next_zero_bit
+EXPORT_SYMBOL vmlinux 0x47cb2f10	clear_inode
+EXPORT_SYMBOL vmlinux 0x47e12960	dmam_free_noncoherent
+EXPORT_SYMBOL vmlinux 0x47e8ea9f	sk_stream_error
+EXPORT_SYMBOL vmlinux 0x4813aaa6	vfs_mknod
+EXPORT_SYMBOL vmlinux 0x48193639	acpi_lid_open
+EXPORT_SYMBOL vmlinux 0x481a4709	default_llseek
+EXPORT_SYMBOL vmlinux 0x481cb9ab	acpi_enter_sleep_state_prep
+EXPORT_SYMBOL vmlinux 0x4836fbcb	phy_ethtool_gset
+EXPORT_SYMBOL vmlinux 0x4856b288	dm_table_get_mode
+EXPORT_SYMBOL vmlinux 0x4859b8bb	rtc_year_days
+EXPORT_SYMBOL vmlinux 0x486b6407	hweight64
+EXPORT_SYMBOL vmlinux 0x488f412a	jbd2_journal_stop
+EXPORT_SYMBOL vmlinux 0x489ec0b4	scsi_prep_fn
+EXPORT_SYMBOL vmlinux 0x48d688e9	setup_new_exec
+EXPORT_SYMBOL vmlinux 0x48d93400	alloc_pci_dev
+EXPORT_SYMBOL vmlinux 0x48d934f7	con_set_default_unimap
+EXPORT_SYMBOL vmlinux 0x48ea4514	pci_disable_msi
+EXPORT_SYMBOL vmlinux 0x4913ab7f	simple_dir_operations
+EXPORT_SYMBOL vmlinux 0x49439411	genl_unregister_family
+EXPORT_SYMBOL vmlinux 0x494e3393	vm_get_page_prot
+EXPORT_SYMBOL vmlinux 0x49603fb8	security_sb_copy_data
+EXPORT_SYMBOL vmlinux 0x49b0f22b	phy_start_aneg
+EXPORT_SYMBOL vmlinux 0x49d2ca11	pci_reenable_device
+EXPORT_SYMBOL vmlinux 0x49da9a9a	_read_unlock_bh
+EXPORT_SYMBOL vmlinux 0x49db4787	scsi_scan_target
+EXPORT_SYMBOL vmlinux 0x49e182c0	param_get_string
+EXPORT_SYMBOL vmlinux 0x49e2d2e8	tcp_rcv_state_process
+EXPORT_SYMBOL vmlinux 0x4a358252	__bitmap_subset
+EXPORT_SYMBOL vmlinux 0x4a3d9696	wait_on_sync_kiocb
+EXPORT_SYMBOL vmlinux 0x4a415e1d	eth_rebuild_header
+EXPORT_SYMBOL vmlinux 0x4a44fadb	journal_get_undo_access
+EXPORT_SYMBOL vmlinux 0x4a69cbd7	__tcf_em_tree_match
+EXPORT_SYMBOL vmlinux 0x4a6b5675	skb_dequeue_tail
+EXPORT_SYMBOL vmlinux 0x4aa3af9b	serio_interrupt
+EXPORT_SYMBOL vmlinux 0x4acd93d3	release_resource
+EXPORT_SYMBOL vmlinux 0x4ad68c44	compat_ipv6_getsockopt
+EXPORT_SYMBOL vmlinux 0x4adbf5f0	xfrm_register_km
+EXPORT_SYMBOL vmlinux 0x4afe9a77	scsi_partsize
+EXPORT_SYMBOL vmlinux 0x4afebbfc	task_nice
+EXPORT_SYMBOL vmlinux 0x4aff3068	tty_insert_flip_string
+EXPORT_SYMBOL vmlinux 0x4b07e779	_spin_unlock_irqrestore
+EXPORT_SYMBOL vmlinux 0x4b085dbf	agp3_generic_configure
+EXPORT_SYMBOL vmlinux 0x4b2e66ad	skb_tx_hash
+EXPORT_SYMBOL vmlinux 0x4b37574f	journal_flush
+EXPORT_SYMBOL vmlinux 0x4b8d21ee	tcf_hash_lookup
+EXPORT_SYMBOL vmlinux 0x4ba5baa0	load_gs_index
+EXPORT_SYMBOL vmlinux 0x4bbc3e5f	pm_flags
+EXPORT_SYMBOL vmlinux 0x4bdf028e	idr_find
+EXPORT_SYMBOL vmlinux 0x4bfa779a	d_obtain_alias
+EXPORT_SYMBOL vmlinux 0x4bfc38f9	xfrm_input
+EXPORT_SYMBOL vmlinux 0x4c1182cb	bitmap_scnprintf
+EXPORT_SYMBOL vmlinux 0x4c1b965c	gen_replace_estimator
+EXPORT_SYMBOL vmlinux 0x4c32b628	udp_lib_unhash
+EXPORT_SYMBOL vmlinux 0x4c4c956e	nla_memcmp
+EXPORT_SYMBOL vmlinux 0x4c5a6774	acpi_bus_add
+EXPORT_SYMBOL vmlinux 0x4c6223ea	pci_bus_read_config_word
+EXPORT_SYMBOL vmlinux 0x4c7c8889	tcf_action_dump_1
+EXPORT_SYMBOL vmlinux 0x4c86c2bd	scsi_host_lookup
+EXPORT_SYMBOL vmlinux 0x4cbbd171	__bitmap_weight
+EXPORT_SYMBOL vmlinux 0x4cc1b29a	dev_mc_unsync
+EXPORT_SYMBOL vmlinux 0x4cec48eb	xfrm_state_unregister_afinfo
+EXPORT_SYMBOL vmlinux 0x4d07bdfd	tty_port_tty_set
+EXPORT_SYMBOL vmlinux 0x4d15ee74	bdi_register
+EXPORT_SYMBOL vmlinux 0x4d79000e	skb_queue_purge
+EXPORT_SYMBOL vmlinux 0x4d7f6065	tcp_v4_send_check
+EXPORT_SYMBOL vmlinux 0x4d8e1a60	ps2_init
+EXPORT_SYMBOL vmlinux 0x4d958d78	__serio_register_port
+EXPORT_SYMBOL vmlinux 0x4dab273e	rtnl_set_sk_err
+EXPORT_SYMBOL vmlinux 0x4db35772	mark_page_accessed
+EXPORT_SYMBOL vmlinux 0x4dbf3a42	xfrm6_find_1stfragopt
+EXPORT_SYMBOL vmlinux 0x4dc45be9	nf_log_unbind_pf
+EXPORT_SYMBOL vmlinux 0x4dda726b	match_strlcpy
+EXPORT_SYMBOL vmlinux 0x4df119fa	__bitmap_parse
+EXPORT_SYMBOL vmlinux 0x4e069249	security_tun_dev_post_create
+EXPORT_SYMBOL vmlinux 0x4e3567f7	match_int
+EXPORT_SYMBOL vmlinux 0x4e52ab00	blk_queue_make_request
+EXPORT_SYMBOL vmlinux 0x4e652525	blk_rq_map_kern
+EXPORT_SYMBOL vmlinux 0x4e6e8ea7	fg_console
+EXPORT_SYMBOL vmlinux 0x4e79a42b	blk_queue_physical_block_size
+EXPORT_SYMBOL vmlinux 0x4ec7b977	scsi_add_host_with_dma
+EXPORT_SYMBOL vmlinux 0x4edd72f7	block_all_signals
+EXPORT_SYMBOL vmlinux 0x4edf8824	otg_get_transceiver
+EXPORT_SYMBOL vmlinux 0x4ee8263d	register_quota_format
+EXPORT_SYMBOL vmlinux 0x4f095458	mntput_no_expire
+EXPORT_SYMBOL vmlinux 0x4f1cd128	security_tun_dev_create
+EXPORT_SYMBOL vmlinux 0x4f4446b3	qdisc_create_dflt
+EXPORT_SYMBOL vmlinux 0x4f476e96	init_cdrom_command
+EXPORT_SYMBOL vmlinux 0x4f5438c1	idle_halt
+EXPORT_SYMBOL vmlinux 0x4f668780	inet6_ioctl
+EXPORT_SYMBOL vmlinux 0x4f67091e	send_sig_info
+EXPORT_SYMBOL vmlinux 0x4f783f30	acpi_read
+EXPORT_SYMBOL vmlinux 0x4fd3a29f	tty_unregister_device
+EXPORT_SYMBOL vmlinux 0x4fdee897	i8042_command
+EXPORT_SYMBOL vmlinux 0x4feccfe1	pci_set_master
+EXPORT_SYMBOL vmlinux 0x4fedf2eb	tty_driver_kref_put
+EXPORT_SYMBOL vmlinux 0x5007d144	scsi_nonblockable_ioctl
+EXPORT_SYMBOL vmlinux 0x501e36f6	dquot_mark_dquot_dirty
+EXPORT_SYMBOL vmlinux 0x50211ee3	tcp_free_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x502bd3b0	netpoll_setup
+EXPORT_SYMBOL vmlinux 0x5030350a	blk_queue_segment_boundary
+EXPORT_SYMBOL vmlinux 0x50405b06	otg_set_transceiver
+EXPORT_SYMBOL vmlinux 0x505c6c31	splice_direct_to_actor
+EXPORT_SYMBOL vmlinux 0x505d70ff	sock_no_shutdown
+EXPORT_SYMBOL vmlinux 0x506746b6	getrawmonotonic
+EXPORT_SYMBOL vmlinux 0x50713101	kthread_create
+EXPORT_SYMBOL vmlinux 0x507efb6b	kill_litter_super
+EXPORT_SYMBOL vmlinux 0x50b5cb2d	idr_get_new_above
+EXPORT_SYMBOL vmlinux 0x50bf49df	vfs_quota_sync
+EXPORT_SYMBOL vmlinux 0x50bfd97b	i2c_verify_client
+EXPORT_SYMBOL vmlinux 0x50c467b8	scsi_eh_prep_cmnd
+EXPORT_SYMBOL vmlinux 0x50d56018	posix_acl_equiv_mode
+EXPORT_SYMBOL vmlinux 0x50f27781	vfs_set_dqinfo
+EXPORT_SYMBOL vmlinux 0x5118c382	secure_dccp_sequence_number
+EXPORT_SYMBOL vmlinux 0x51523189	vfs_write
+EXPORT_SYMBOL vmlinux 0x5187ac4b	xen_store_evtchn
+EXPORT_SYMBOL vmlinux 0x51af954e	security_path_link
+EXPORT_SYMBOL vmlinux 0x51be8827	tc_classify_compat
+EXPORT_SYMBOL vmlinux 0x51d12d4e	acpi_pci_disabled
+EXPORT_SYMBOL vmlinux 0x51dce73b	xfrm_state_walk_init
+EXPORT_SYMBOL vmlinux 0x51e40e68	tcf_exts_validate
+EXPORT_SYMBOL vmlinux 0x51fc9993	lease_get_mtime
+EXPORT_SYMBOL vmlinux 0x52026cdf	security_sb_parse_opts_str
+EXPORT_SYMBOL vmlinux 0x52095e19	acpi_get_data
+EXPORT_SYMBOL vmlinux 0x521cc32a	tcp_v4_syn_recv_sock
+EXPORT_SYMBOL vmlinux 0x5252f304	__memcpy_toio
+EXPORT_SYMBOL vmlinux 0x52760ca9	getnstimeofday
+EXPORT_SYMBOL vmlinux 0x52a58c24	ifla_policy
+EXPORT_SYMBOL vmlinux 0x52d46635	devcgroup_inode_permission
+EXPORT_SYMBOL vmlinux 0x52d7b2fd	llc_sap_list
+EXPORT_SYMBOL vmlinux 0x52df2e98	security_path_unlink
+EXPORT_SYMBOL vmlinux 0x52e1ba21	cdev_del
+EXPORT_SYMBOL vmlinux 0x52ebb126	param_get_ushort
+EXPORT_SYMBOL vmlinux 0x530b1e98	pm_suspend
+EXPORT_SYMBOL vmlinux 0x531b604e	__virt_addr_valid
+EXPORT_SYMBOL vmlinux 0x53326531	mempool_alloc_pages
+EXPORT_SYMBOL vmlinux 0x53583f05	do_truncate
+EXPORT_SYMBOL vmlinux 0x5364ce10	kblockd_schedule_work
+EXPORT_SYMBOL vmlinux 0x536ac0a0	generic_file_aio_write
+EXPORT_SYMBOL vmlinux 0x538383c0	unregister_inet6addr_notifier
+EXPORT_SYMBOL vmlinux 0x5389992b	pci_enable_bridges
+EXPORT_SYMBOL vmlinux 0x53942098	poll_freewait
+EXPORT_SYMBOL vmlinux 0x53a5962c	scsi_host_put
+EXPORT_SYMBOL vmlinux 0x53af7761	__bforget
+EXPORT_SYMBOL vmlinux 0x53bcc899	bdget_disk
+EXPORT_SYMBOL vmlinux 0x53c0767c	sk_chk_filter
+EXPORT_SYMBOL vmlinux 0x53c8a218	jbd2_journal_clear_err
+EXPORT_SYMBOL vmlinux 0x53e3bd90	__page_cache_alloc
+EXPORT_SYMBOL vmlinux 0x53f43186	sk_release_kernel
+EXPORT_SYMBOL vmlinux 0x54290dc9	nla_validate
+EXPORT_SYMBOL vmlinux 0x5460aa83	log_start_commit
+EXPORT_SYMBOL vmlinux 0x54782a2c	mpage_readpage
+EXPORT_SYMBOL vmlinux 0x54790ab3	i2c_register_driver
+EXPORT_SYMBOL vmlinux 0x54c49771	agp_bind_memory
+EXPORT_SYMBOL vmlinux 0x54c93718	napi_complete
+EXPORT_SYMBOL vmlinux 0x54cb57c6	remap_vmalloc_range
+EXPORT_SYMBOL vmlinux 0x54d0d132	nobh_write_begin
+EXPORT_SYMBOL vmlinux 0x54e6fcdd	net_enable_timestamp
+EXPORT_SYMBOL vmlinux 0x54e8030e	tcp4_gro_receive
+EXPORT_SYMBOL vmlinux 0x5502647f	input_unregister_handle
+EXPORT_SYMBOL vmlinux 0x551422de	genphy_read_status
+EXPORT_SYMBOL vmlinux 0x5531234c	thermal_zone_device_update
+EXPORT_SYMBOL vmlinux 0x55434722	scsi_remove_target
+EXPORT_SYMBOL vmlinux 0x554f0a48	groups_alloc
+EXPORT_SYMBOL vmlinux 0x555164c5	bdi_unregister
+EXPORT_SYMBOL vmlinux 0x557c5996	agp_find_bridge
+EXPORT_SYMBOL vmlinux 0x557f1fb4	tcp_child_process
+EXPORT_SYMBOL vmlinux 0x55819767	ilookup5
+EXPORT_SYMBOL vmlinux 0x5594be03	bitmap_remap
+EXPORT_SYMBOL vmlinux 0x55a286bf	proc_dointvec_minmax
+EXPORT_SYMBOL vmlinux 0x55a3a393	journal_revoke
+EXPORT_SYMBOL vmlinux 0x55f32425	input_allocate_device
+EXPORT_SYMBOL vmlinux 0x55fb814b	blk_queue_start_tag
+EXPORT_SYMBOL vmlinux 0x55ff3fc4	iw_handler_set_thrspy
+EXPORT_SYMBOL vmlinux 0x5600904f	fb_get_color_depth
+EXPORT_SYMBOL vmlinux 0x5603cf43	do_settimeofday
+EXPORT_SYMBOL vmlinux 0x5614b010	xfrm_policy_walk_done
+EXPORT_SYMBOL vmlinux 0x562b1074	__kfree_skb
+EXPORT_SYMBOL vmlinux 0x562b73fa	truncate_pagecache
+EXPORT_SYMBOL vmlinux 0x563326d6	inet6_getname
+EXPORT_SYMBOL vmlinux 0x56342af1	create_empty_buffers
+EXPORT_SYMBOL vmlinux 0x5635a60a	vmalloc_user
+EXPORT_SYMBOL vmlinux 0x56383341	pnp_unregister_driver
+EXPORT_SYMBOL vmlinux 0x563bc1d6	wait_for_key_construction
+EXPORT_SYMBOL vmlinux 0x563c5a3b	acpi_is_video_device
+EXPORT_SYMBOL vmlinux 0x569a8ba3	blk_queue_max_discard_sectors
+EXPORT_SYMBOL vmlinux 0x56b03ac9	skb_copy_datagram_iovec
+EXPORT_SYMBOL vmlinux 0x56c8799d	scsi_kunmap_atomic_sg
+EXPORT_SYMBOL vmlinux 0x56d462f7	cfb_imageblit
+EXPORT_SYMBOL vmlinux 0x56df5a59	mmc_regulator_set_ocr
+EXPORT_SYMBOL vmlinux 0x56e0e7db	pci_get_device
+EXPORT_SYMBOL vmlinux 0x56f38712	schedule_delayed_work_on
+EXPORT_SYMBOL vmlinux 0x56f494e0	smp_call_function
+EXPORT_SYMBOL vmlinux 0x570eacd6	neigh_create
+EXPORT_SYMBOL vmlinux 0x5713c1d0	bh_submit_read
+EXPORT_SYMBOL vmlinux 0x572e85d4	blk_lookup_devt
+EXPORT_SYMBOL vmlinux 0x57575f08	dmaengine_put
+EXPORT_SYMBOL vmlinux 0x57adf756	per_cpu__this_cpu_off
+EXPORT_SYMBOL vmlinux 0x57b57ebe	jiffies_to_timespec
+EXPORT_SYMBOL vmlinux 0x57c7576e	call_usermodehelper_stdinpipe
+EXPORT_SYMBOL vmlinux 0x57db7242	mangle_path
+EXPORT_SYMBOL vmlinux 0x57ecb61f	set_pages_nx
+EXPORT_SYMBOL vmlinux 0x580e5946	mdiobus_alloc
+EXPORT_SYMBOL vmlinux 0x581175d0	tcp_v4_destroy_sock
+EXPORT_SYMBOL vmlinux 0x5812bb27	__scsi_add_device
+EXPORT_SYMBOL vmlinux 0x5838f6c9	rtc_valid_tm
+EXPORT_SYMBOL vmlinux 0x584738f9	rdmsr_safe_on_cpu
+EXPORT_SYMBOL vmlinux 0x5857b225	ioread16_rep
+EXPORT_SYMBOL vmlinux 0x5878596a	update_region
+EXPORT_SYMBOL vmlinux 0x5881384d	insert_inode_locked4
+EXPORT_SYMBOL vmlinux 0x5887468b	skb_under_panic
+EXPORT_SYMBOL vmlinux 0x588aaa26	filemap_fault
+EXPORT_SYMBOL vmlinux 0x5899abb2	tty_vhangup
+EXPORT_SYMBOL vmlinux 0x58f12017	blk_queue_alignment_offset
+EXPORT_SYMBOL vmlinux 0x58fab378	netlink_kernel_create
+EXPORT_SYMBOL vmlinux 0x591f6c87	nf_afinfo
+EXPORT_SYMBOL vmlinux 0x5934392b	fb_register_client
+EXPORT_SYMBOL vmlinux 0x594bf15b	ioport_map
+EXPORT_SYMBOL vmlinux 0x596903e5	kmem_cache_alloc
+EXPORT_SYMBOL vmlinux 0x5970d999	pci_vpd_truncate
+EXPORT_SYMBOL vmlinux 0x59a23fb1	pci_enable_wake
+EXPORT_SYMBOL vmlinux 0x59bc9609	acpi_write_bit_register
+EXPORT_SYMBOL vmlinux 0x59bf8122	inet_stream_ops
+EXPORT_SYMBOL vmlinux 0x59bfd1b2	pci_bus_write_config_word
+EXPORT_SYMBOL vmlinux 0x59cdbb03	xfrm_find_acq_byseq
+EXPORT_SYMBOL vmlinux 0x59d696b6	register_module_notifier
+EXPORT_SYMBOL vmlinux 0x5a1e825b	pcix_set_mmrbc
+EXPORT_SYMBOL vmlinux 0x5a26e9f8	pnp_is_active
+EXPORT_SYMBOL vmlinux 0x5a34a45c	__kmalloc
+EXPORT_SYMBOL vmlinux 0x5a3aa2a4	tcp_v4_do_rcv
+EXPORT_SYMBOL vmlinux 0x5a4896a8	__put_user_2
+EXPORT_SYMBOL vmlinux 0x5a57d155	__percpu_counter_init
+EXPORT_SYMBOL vmlinux 0x5a5e7ea3	simple_read_from_buffer
+EXPORT_SYMBOL vmlinux 0x5a67e40d	mark_buffer_dirty
+EXPORT_SYMBOL vmlinux 0x5a744b86	netlink_set_nonroot
+EXPORT_SYMBOL vmlinux 0x5a779394	pci_bus_type
+EXPORT_SYMBOL vmlinux 0x5a872763	pci_iomap
+EXPORT_SYMBOL vmlinux 0x5a9b549c	unregister_exec_domain
+EXPORT_SYMBOL vmlinux 0x5ab6137c	end_buffer_read_sync
+EXPORT_SYMBOL vmlinux 0x5ac376a5	acpi_install_fixed_event_handler
+EXPORT_SYMBOL vmlinux 0x5b069b91	jbd2_journal_release_jbd_inode
+EXPORT_SYMBOL vmlinux 0x5b27bcec	sysctl_intvec
+EXPORT_SYMBOL vmlinux 0x5b3fe59f	thaw_process
+EXPORT_SYMBOL vmlinux 0x5b49ed80	agp_alloc_bridge
+EXPORT_SYMBOL vmlinux 0x5b51a5d2	agp_free_memory
+EXPORT_SYMBOL vmlinux 0x5b51c6a7	acpi_walk_resources
+EXPORT_SYMBOL vmlinux 0x5b5a2a32	smp_call_function_many
+EXPORT_SYMBOL vmlinux 0x5b820f43	read_cache_page_gfp
+EXPORT_SYMBOL vmlinux 0x5b9ab11f	i2c_smbus_write_block_data
+EXPORT_SYMBOL vmlinux 0x5bae2eac	acpi_extract_package
+EXPORT_SYMBOL vmlinux 0x5bbfafb9	gnet_stats_start_copy_compat
+EXPORT_SYMBOL vmlinux 0x5be89166	block_write_begin
+EXPORT_SYMBOL vmlinux 0x5bf0d2d5	ll_rw_block
+EXPORT_SYMBOL vmlinux 0x5bff65bb	genphy_config_aneg
+EXPORT_SYMBOL vmlinux 0x5c277cab	mmc_set_data_timeout
+EXPORT_SYMBOL vmlinux 0x5c28617b	__task_pid_nr_ns
+EXPORT_SYMBOL vmlinux 0x5c2ae97f	bioset_integrity_create
+EXPORT_SYMBOL vmlinux 0x5c371229	dev_get_stats
+EXPORT_SYMBOL vmlinux 0x5c39ca61	__getblk
+EXPORT_SYMBOL vmlinux 0x5c4efcdd	vfs_quota_on
+EXPORT_SYMBOL vmlinux 0x5c5054f2	slow_work_sleep_till_thread_needed
+EXPORT_SYMBOL vmlinux 0x5c58e451	init_special_inode
+EXPORT_SYMBOL vmlinux 0x5c5b2d12	per_cpu__cpu_info
+EXPORT_SYMBOL vmlinux 0x5c7f9576	netlink_broadcast
+EXPORT_SYMBOL vmlinux 0x5c872fce	inode_sub_rsv_space
+EXPORT_SYMBOL vmlinux 0x5cad67e8	invalidate_partition
+EXPORT_SYMBOL vmlinux 0x5cc8e015	iov_iter_single_seg_count
+EXPORT_SYMBOL vmlinux 0x5ce0e013	pipe_to_file
+EXPORT_SYMBOL vmlinux 0x5d12b3fc	twl4030_i2c_write_u8
+EXPORT_SYMBOL vmlinux 0x5d14d7d7	__scsi_device_lookup_by_target
+EXPORT_SYMBOL vmlinux 0x5d239a47	unregister_filesystem
+EXPORT_SYMBOL vmlinux 0x5d4c09f2	mpage_writepage
+EXPORT_SYMBOL vmlinux 0x5d5fc5af	scsi_get_device_flags_keyed
+EXPORT_SYMBOL vmlinux 0x5d647993	journal_load
+EXPORT_SYMBOL vmlinux 0x5d74dbcf	pnp_range_reserved
+EXPORT_SYMBOL vmlinux 0x5d8feeb3	splice_from_pipe_next
+EXPORT_SYMBOL vmlinux 0x5dadad02	pci_lost_interrupt
+EXPORT_SYMBOL vmlinux 0x5daef1fe	revert_creds
+EXPORT_SYMBOL vmlinux 0x5dc18de8	bio_phys_segments
+EXPORT_SYMBOL vmlinux 0x5df04936	rfkill_pause_polling
+EXPORT_SYMBOL vmlinux 0x5e1bfd74	tcp4_gro_complete
+EXPORT_SYMBOL vmlinux 0x5e21f413	kobject_get
+EXPORT_SYMBOL vmlinux 0x5e31b148	tcf_em_tree_validate
+EXPORT_SYMBOL vmlinux 0x5e419272	arp_broken_ops
+EXPORT_SYMBOL vmlinux 0x5e4307a0	kobject_add
+EXPORT_SYMBOL vmlinux 0x5e659ac8	generic_permission
+EXPORT_SYMBOL vmlinux 0x5e778e4a	napi_reuse_skb
+EXPORT_SYMBOL vmlinux 0x5e95b1cd	current_umask
+EXPORT_SYMBOL vmlinux 0x5e9c2845	tcp_disconnect
+EXPORT_SYMBOL vmlinux 0x5ea40aba	dev_unicast_delete
+EXPORT_SYMBOL vmlinux 0x5ea520c5	tcp_select_initial_window
+EXPORT_SYMBOL vmlinux 0x5eadb1cc	ppp_register_channel
+EXPORT_SYMBOL vmlinux 0x5ed040b0	pm_set_vt_switch
+EXPORT_SYMBOL vmlinux 0x5edd0762	bin2bcd
+EXPORT_SYMBOL vmlinux 0x5ee07793	neigh_lookup
+EXPORT_SYMBOL vmlinux 0x5f56db66	per_cpu__ftrace_event_seq
+EXPORT_SYMBOL vmlinux 0x5f896fe0	dev_addr_del_multiple
+EXPORT_SYMBOL vmlinux 0x5f92295a	nf_unregister_sockopt
+EXPORT_SYMBOL vmlinux 0x5f932297	aio_complete
+EXPORT_SYMBOL vmlinux 0x5f9c24b9	blk_queue_dma_pad
+EXPORT_SYMBOL vmlinux 0x5f9e904d	free_task
+EXPORT_SYMBOL vmlinux 0x5fa4402f	deactivate_super
+EXPORT_SYMBOL vmlinux 0x5fa96dd9	uart_get_baud_rate
+EXPORT_SYMBOL vmlinux 0x5faeaa13	vfs_get_dqinfo
+EXPORT_SYMBOL vmlinux 0x5fb70900	tcf_destroy_chain
+EXPORT_SYMBOL vmlinux 0x5fc42492	netlink_kernel_release
+EXPORT_SYMBOL vmlinux 0x5fc5e12a	get_disk
+EXPORT_SYMBOL vmlinux 0x5fc61b20	____pagevec_lru_add
+EXPORT_SYMBOL vmlinux 0x5fdee4bb	xrlim_allow
+EXPORT_SYMBOL vmlinux 0x5fe8ce7e	tty_port_raise_dtr_rts
+EXPORT_SYMBOL vmlinux 0x5febbf5e	pci_dev_put
+EXPORT_SYMBOL vmlinux 0x5ff42b08	acpi_video_get_capabilities
+EXPORT_SYMBOL vmlinux 0x600683d3	do_unblank_screen
+EXPORT_SYMBOL vmlinux 0x600c81c3	dump_trace
+EXPORT_SYMBOL vmlinux 0x600d64e8	blkdev_issue_flush
+EXPORT_SYMBOL vmlinux 0x601d7be1	write_one_page
+EXPORT_SYMBOL vmlinux 0x602ed00d	acpi_current_gpe_count
+EXPORT_SYMBOL vmlinux 0x60449d42	pci_bus_read_config_byte
+EXPORT_SYMBOL vmlinux 0x605c8bde	radix_tree_delete
+EXPORT_SYMBOL vmlinux 0x605dc838	netif_receive_skb
+EXPORT_SYMBOL vmlinux 0x609f1c7e	synchronize_net
+EXPORT_SYMBOL vmlinux 0x60a0ebad	__tracepoint_kmem_cache_alloc_node
+EXPORT_SYMBOL vmlinux 0x60a32ea9	pm_power_off
+EXPORT_SYMBOL vmlinux 0x6103c4c7	per_cpu__irq_stat
+EXPORT_SYMBOL vmlinux 0x612390ad	netpoll_set_trap
+EXPORT_SYMBOL vmlinux 0x615a6e74	key_payload_reserve
+EXPORT_SYMBOL vmlinux 0x6184296a	agp_generic_enable
+EXPORT_SYMBOL vmlinux 0x618d8299	set_notify_swap_entry_free
+EXPORT_SYMBOL vmlinux 0x61b7b126	simple_strtoull
+EXPORT_SYMBOL vmlinux 0x61b9c35a	datagram_poll
+EXPORT_SYMBOL vmlinux 0x61c717b7	ipv6_skip_exthdr
+EXPORT_SYMBOL vmlinux 0x61ea1964	tcp_v4_connect
+EXPORT_SYMBOL vmlinux 0x62049256	acpi_disable
+EXPORT_SYMBOL vmlinux 0x620a341f	lro_vlan_hwaccel_receive_frags
+EXPORT_SYMBOL vmlinux 0x620dc275	pci_write_vpd
+EXPORT_SYMBOL vmlinux 0x6229483a	scsi_execute
+EXPORT_SYMBOL vmlinux 0x6237f6b5	acpi_enable_event
+EXPORT_SYMBOL vmlinux 0x62447f77	seq_open
+EXPORT_SYMBOL vmlinux 0x625d5847	netpoll_cleanup
+EXPORT_SYMBOL vmlinux 0x62737e1d	sock_unregister
+EXPORT_SYMBOL vmlinux 0x62748e70	acpi_set_current_resources
+EXPORT_SYMBOL vmlinux 0x62827bec	security_secctx_to_secid
+EXPORT_SYMBOL vmlinux 0x62af9753	scsi_get_command
+EXPORT_SYMBOL vmlinux 0x62ee9e6b	compat_sock_get_timestamp
+EXPORT_SYMBOL vmlinux 0x6307fc98	del_timer
+EXPORT_SYMBOL vmlinux 0x6324ec3f	bio_map_user
+EXPORT_SYMBOL vmlinux 0x632afea0	d_move
+EXPORT_SYMBOL vmlinux 0x636a5691	acpi_register_ioapic
+EXPORT_SYMBOL vmlinux 0x63906414	devm_iounmap
+EXPORT_SYMBOL vmlinux 0x6396ed69	i2c_get_adapter
+EXPORT_SYMBOL vmlinux 0x639848b5	scm_detach_fds
+EXPORT_SYMBOL vmlinux 0x639be7df	inet_unregister_protosw
+EXPORT_SYMBOL vmlinux 0x63a56d30	set_anon_super
+EXPORT_SYMBOL vmlinux 0x63b41449	replace_mount_options
+EXPORT_SYMBOL vmlinux 0x63ddcba6	inet6_del_protocol
+EXPORT_SYMBOL vmlinux 0x63ecad53	register_netdevice_notifier
+EXPORT_SYMBOL vmlinux 0x63fc232f	strlen_user
+EXPORT_SYMBOL vmlinux 0x6403e338	tcp_memory_pressure
+EXPORT_SYMBOL vmlinux 0x6429ee07	mpage_readpages
+EXPORT_SYMBOL vmlinux 0x642bc034	cdrom_get_last_written
+EXPORT_SYMBOL vmlinux 0x642e54ac	__wake_up
+EXPORT_SYMBOL vmlinux 0x644b6cea	vga_put
+EXPORT_SYMBOL vmlinux 0x6466a1e6	mempool_alloc
+EXPORT_SYMBOL vmlinux 0x6478134c	ec_burst_enable
+EXPORT_SYMBOL vmlinux 0x64999478	congestion_wait
+EXPORT_SYMBOL vmlinux 0x64c9a290	agp_put_bridge
+EXPORT_SYMBOL vmlinux 0x64d452cd	blk_queue_softirq_done
+EXPORT_SYMBOL vmlinux 0x64eae7ad	set_memory_array_wb
+EXPORT_SYMBOL vmlinux 0x64ef6d9b	follow_pfn
+EXPORT_SYMBOL vmlinux 0x64ff7d9e	call_usermodehelper_freeinfo
+EXPORT_SYMBOL vmlinux 0x65020739	tty_unthrottle
+EXPORT_SYMBOL vmlinux 0x65022a24	radix_tree_prev_hole
+EXPORT_SYMBOL vmlinux 0x650dca72	journal_forget
+EXPORT_SYMBOL vmlinux 0x650fb346	add_wait_queue
+EXPORT_SYMBOL vmlinux 0x65134050	sock_get_timestamp
+EXPORT_SYMBOL vmlinux 0x651a4139	test_taint
+EXPORT_SYMBOL vmlinux 0x65408378	zlib_inflate_blob
+EXPORT_SYMBOL vmlinux 0x65414e67	dev_valid_name
+EXPORT_SYMBOL vmlinux 0x654910d5	kernel_accept
+EXPORT_SYMBOL vmlinux 0x655b204c	get_write_access
+EXPORT_SYMBOL vmlinux 0x65658bda	is_container_init
+EXPORT_SYMBOL vmlinux 0x658447c8	consume_skb
+EXPORT_SYMBOL vmlinux 0x6597c30a	__put_cred
+EXPORT_SYMBOL vmlinux 0x6600ae8f	dev_open
+EXPORT_SYMBOL vmlinux 0x661a5783	proc_dointvec_userhz_jiffies
+EXPORT_SYMBOL vmlinux 0x662bd099	kill_block_super
+EXPORT_SYMBOL vmlinux 0x66816e8f	ps2_cmd_aborted
+EXPORT_SYMBOL vmlinux 0x668da8d5	zlib_inflateIncomp
+EXPORT_SYMBOL vmlinux 0x66909110	tty_flip_buffer_push
+EXPORT_SYMBOL vmlinux 0x66ac054f	xfrm_policy_destroy
+EXPORT_SYMBOL vmlinux 0x66bbf829	xfrm_stateonly_find
+EXPORT_SYMBOL vmlinux 0x66cd9e5b	unregister_cdrom
+EXPORT_SYMBOL vmlinux 0x66d2dc73	tcf_exts_dump_stats
+EXPORT_SYMBOL vmlinux 0x66d97b75	lookup_one_len
+EXPORT_SYMBOL vmlinux 0x66fcf589	kill_anon_super
+EXPORT_SYMBOL vmlinux 0x67053080	current_kernel_time
+EXPORT_SYMBOL vmlinux 0x671544ca	compat_nf_getsockopt
+EXPORT_SYMBOL vmlinux 0x672144bd	strlcpy
+EXPORT_SYMBOL vmlinux 0x67248e99	mdiobus_register
+EXPORT_SYMBOL vmlinux 0x6729d3df	__get_user_4
+EXPORT_SYMBOL vmlinux 0x672c8b15	dcache_readdir
+EXPORT_SYMBOL vmlinux 0x67353ca4	scsi_allocate_command
+EXPORT_SYMBOL vmlinux 0x673a5946	inet_csk_accept
+EXPORT_SYMBOL vmlinux 0x673f815e	agp_bridges
+EXPORT_SYMBOL vmlinux 0x6749db1f	set_pages_wb
+EXPORT_SYMBOL vmlinux 0x676a9b5d	bio_integrity_trim
+EXPORT_SYMBOL vmlinux 0x677a9595	bd_release
+EXPORT_SYMBOL vmlinux 0x67a321e0	netif_device_attach
+EXPORT_SYMBOL vmlinux 0x67af5383	scsi_block_when_processing_errors
+EXPORT_SYMBOL vmlinux 0x67b27ec1	tty_std_termios
+EXPORT_SYMBOL vmlinux 0x67e17a92	blk_free_tags
+EXPORT_SYMBOL vmlinux 0x67f1bef7	seq_lseek
+EXPORT_SYMBOL vmlinux 0x683835a4	skb_dma_unmap
+EXPORT_SYMBOL vmlinux 0x68432bf0	pnp_device_detach
+EXPORT_SYMBOL vmlinux 0x684a32ca	put_disk
+EXPORT_SYMBOL vmlinux 0x687eea28	phy_scan_fixups
+EXPORT_SYMBOL vmlinux 0x689b4c9d	eth_mac_addr
+EXPORT_SYMBOL vmlinux 0x68b838c6	udp_proc_unregister
+EXPORT_SYMBOL vmlinux 0x68dd5e79	ipv6_push_nfrag_opts
+EXPORT_SYMBOL vmlinux 0x68e858b3	genl_register_family_with_ops
+EXPORT_SYMBOL vmlinux 0x6907d4e9	idr_for_each
+EXPORT_SYMBOL vmlinux 0x695bc6bb	__ip_select_ident
+EXPORT_SYMBOL vmlinux 0x6971447a	rtc_month_days
+EXPORT_SYMBOL vmlinux 0x697cb0a0	sysctl_ms_jiffies
+EXPORT_SYMBOL vmlinux 0x6980fe91	param_get_int
+EXPORT_SYMBOL vmlinux 0x69927dff	try_acquire_console_sem
+EXPORT_SYMBOL vmlinux 0x69a0ca7d	iowrite16be
+EXPORT_SYMBOL vmlinux 0x69a358a6	iomem_resource
+EXPORT_SYMBOL vmlinux 0x69ba7d51	mmc_unregister_driver
+EXPORT_SYMBOL vmlinux 0x69c03dbd	migrate_page
+EXPORT_SYMBOL vmlinux 0x69c8c1d5	security_req_classify_flow
+EXPORT_SYMBOL vmlinux 0x69d2575f	efi
+EXPORT_SYMBOL vmlinux 0x69d3621f	dma_async_memcpy_buf_to_buf
+EXPORT_SYMBOL vmlinux 0x69d38ed9	__scsi_print_sense
+EXPORT_SYMBOL vmlinux 0x69de0edf	neigh_parms_release
+EXPORT_SYMBOL vmlinux 0x69e27c7a	bitmap_copy_le
+EXPORT_SYMBOL vmlinux 0x69e3ee19	set_device_ro
+EXPORT_SYMBOL vmlinux 0x69eb1ec0	journal_abort
+EXPORT_SYMBOL vmlinux 0x69fcb6f2	agp_backend_acquire
+EXPORT_SYMBOL vmlinux 0x6a037cf1	mempool_kfree
+EXPORT_SYMBOL vmlinux 0x6a11c8c4	pcim_pin_device
+EXPORT_SYMBOL vmlinux 0x6a278a84	acpi_unlock_battery_dir
+EXPORT_SYMBOL vmlinux 0x6a3979b3	bio_copy_kern
+EXPORT_SYMBOL vmlinux 0x6a3b9b12	serio_unregister_port
+EXPORT_SYMBOL vmlinux 0x6a44c773	set_pages_uc
+EXPORT_SYMBOL vmlinux 0x6a47571d	__set_personality
+EXPORT_SYMBOL vmlinux 0x6a5ccfbc	__xfrm_lookup
+EXPORT_SYMBOL vmlinux 0x6a5f98a0	ida_get_new_above
+EXPORT_SYMBOL vmlinux 0x6a5fa363	sigprocmask
+EXPORT_SYMBOL vmlinux 0x6a76f3ac	blk_iopoll_enable
+EXPORT_SYMBOL vmlinux 0x6a8222a0	simple_transaction_read
+EXPORT_SYMBOL vmlinux 0x6a9f26c9	init_timer_key
+EXPORT_SYMBOL vmlinux 0x6abd84b8	blkdev_get
+EXPORT_SYMBOL vmlinux 0x6acb973d	iowrite32be
+EXPORT_SYMBOL vmlinux 0x6ad065f4	param_set_charp
+EXPORT_SYMBOL vmlinux 0x6ad14b4b	cpufreq_global_kobject
+EXPORT_SYMBOL vmlinux 0x6ad85887	acpi_enable_gpe
+EXPORT_SYMBOL vmlinux 0x6add5c9a	dmi_find_device
+EXPORT_SYMBOL vmlinux 0x6ae80dc0	iw_handler_get_thrspy
+EXPORT_SYMBOL vmlinux 0x6b1b67d3	__bdevname
+EXPORT_SYMBOL vmlinux 0x6b1d1b6d	scsi_device_quiesce
+EXPORT_SYMBOL vmlinux 0x6b2dc060	dump_stack
+EXPORT_SYMBOL vmlinux 0x6b4a1336	bdi_destroy
+EXPORT_SYMBOL vmlinux 0x6b4e5a52	radix_tree_lookup_slot
+EXPORT_SYMBOL vmlinux 0x6b54f453	give_up_console
+EXPORT_SYMBOL vmlinux 0x6b83c96e	tcf_exts_dump
+EXPORT_SYMBOL vmlinux 0x6b9b88f3	sleep_on
+EXPORT_SYMBOL vmlinux 0x6bb91410	pci_add_new_bus
+EXPORT_SYMBOL vmlinux 0x6bc1451d	lock_super
+EXPORT_SYMBOL vmlinux 0x6bc3fbc0	__unregister_chrdev
+EXPORT_SYMBOL vmlinux 0x6bc56c67	radix_tree_next_hole
+EXPORT_SYMBOL vmlinux 0x6bcb8ddb	pci_release_region
+EXPORT_SYMBOL vmlinux 0x6bdcfd99	qdisc_class_hash_remove
+EXPORT_SYMBOL vmlinux 0x6bf2eadd	unbind_con_driver
+EXPORT_SYMBOL vmlinux 0x6bfc1b1a	pci_save_state
+EXPORT_SYMBOL vmlinux 0x6c389761	acpi_bus_get_private_data
+EXPORT_SYMBOL vmlinux 0x6c3f033b	blk_insert_request
+EXPORT_SYMBOL vmlinux 0x6c61ce70	num_registered_fb
+EXPORT_SYMBOL vmlinux 0x6c6a6432	skb_copy
+EXPORT_SYMBOL vmlinux 0x6c702af7	sysctl_udp_rmem_min
+EXPORT_SYMBOL vmlinux 0x6c7789cd	register_con_driver
+EXPORT_SYMBOL vmlinux 0x6c9364ee	kfree_skb
+EXPORT_SYMBOL vmlinux 0x6cc36a46	pv_mmu_ops
+EXPORT_SYMBOL vmlinux 0x6cf8f709	i2c_master_send
+EXPORT_SYMBOL vmlinux 0x6d00446c	sock_setsockopt
+EXPORT_SYMBOL vmlinux 0x6d0b77fe	sysctl_data
+EXPORT_SYMBOL vmlinux 0x6d0e3039	vfs_fstatat
+EXPORT_SYMBOL vmlinux 0x6d27ef64	__bitmap_empty
+EXPORT_SYMBOL vmlinux 0x6d294e43	clock_t_to_jiffies
+EXPORT_SYMBOL vmlinux 0x6d334118	__get_user_8
+EXPORT_SYMBOL vmlinux 0x6d340f64	tty_termios_input_baud_rate
+EXPORT_SYMBOL vmlinux 0x6d6cbadc	rb_last
+EXPORT_SYMBOL vmlinux 0x6daba8f9	journal_clear_err
+EXPORT_SYMBOL vmlinux 0x6db42067	balance_dirty_pages_ratelimited_nr
+EXPORT_SYMBOL vmlinux 0x6dc0c24b	complete_and_exit
+EXPORT_SYMBOL vmlinux 0x6dcaeb88	per_cpu__kernel_stack
+EXPORT_SYMBOL vmlinux 0x6dd8d3bd	neigh_table_init_no_netlink
+EXPORT_SYMBOL vmlinux 0x6de6bf83	radix_tree_lookup
+EXPORT_SYMBOL vmlinux 0x6def2db2	half_md4_transform
+EXPORT_SYMBOL vmlinux 0x6e07a54e	acpi_get_gpe_status
+EXPORT_SYMBOL vmlinux 0x6e33a5f8	llc_mac_hdr_init
+EXPORT_SYMBOL vmlinux 0x6e566b0d	task_tgid_nr_ns
+EXPORT_SYMBOL vmlinux 0x6e696892	fd_install
+EXPORT_SYMBOL vmlinux 0x6e720ff2	rtnl_unlock
+EXPORT_SYMBOL vmlinux 0x6e74041b	d_validate
+EXPORT_SYMBOL vmlinux 0x6e802324	radix_tree_tag_get
+EXPORT_SYMBOL vmlinux 0x6e94b103	alloc_fcdev
+EXPORT_SYMBOL vmlinux 0x6e9dd606	__symbol_put
+EXPORT_SYMBOL vmlinux 0x6eb0fdf3	__cond_resched_lock
+EXPORT_SYMBOL vmlinux 0x6ed5c961	cdev_init
+EXPORT_SYMBOL vmlinux 0x6ef1ae6f	sock_no_ioctl
+EXPORT_SYMBOL vmlinux 0x6ef5565e	nf_register_hook
+EXPORT_SYMBOL vmlinux 0x6f370d15	jbd2_journal_forget
+EXPORT_SYMBOL vmlinux 0x6f556bdb	acpi_get_gpe_device
+EXPORT_SYMBOL vmlinux 0x6f5fb62d	xfrm_register_mode
+EXPORT_SYMBOL vmlinux 0x6f671b65	request_key
+EXPORT_SYMBOL vmlinux 0x6f6b08fa	vfs_get_dqblk
+EXPORT_SYMBOL vmlinux 0x6f7288ad	__alloc_skb
+EXPORT_SYMBOL vmlinux 0x6fbc143d	blk_stop_queue
+EXPORT_SYMBOL vmlinux 0x6fbeccd3	secpath_dup
+EXPORT_SYMBOL vmlinux 0x6fcb87a1	touch_softlockup_watchdog
+EXPORT_SYMBOL vmlinux 0x6fd5d7ed	put_mnt_ns
+EXPORT_SYMBOL vmlinux 0x6feb2039	acpi_write
+EXPORT_SYMBOL vmlinux 0x6fff393f	time_to_tm
+EXPORT_SYMBOL vmlinux 0x700936f7	gnet_stats_copy_rate_est
+EXPORT_SYMBOL vmlinux 0x701d7d78	jbd2_journal_errno
+EXPORT_SYMBOL vmlinux 0x70334f2b	generic_delete_inode
+EXPORT_SYMBOL vmlinux 0x70523a7a	__cond_resched_softirq
+EXPORT_SYMBOL vmlinux 0x7054a3e4	request_dma
+EXPORT_SYMBOL vmlinux 0x70574ed6	dma_async_device_register
+EXPORT_SYMBOL vmlinux 0x70765d1c	vfs_lstat
+EXPORT_SYMBOL vmlinux 0x709ca4b1	security_inode_notifysecctx
+EXPORT_SYMBOL vmlinux 0x70aed7cd	set_disk_ro
+EXPORT_SYMBOL vmlinux 0x70b54744	locks_mandatory_area
+EXPORT_SYMBOL vmlinux 0x70bc17d7	inode_wait
+EXPORT_SYMBOL vmlinux 0x70bf9865	security_d_instantiate
+EXPORT_SYMBOL vmlinux 0x70cf90c0	generic_file_open
+EXPORT_SYMBOL vmlinux 0x70d8ab82	acpi_acquire_global_lock
+EXPORT_SYMBOL vmlinux 0x70de2916	netpoll_poll
+EXPORT_SYMBOL vmlinux 0x70e0d61f	cpu_all_bits
+EXPORT_SYMBOL vmlinux 0x70e5d8cc	jbd2_journal_get_undo_access
+EXPORT_SYMBOL vmlinux 0x711aab76	journal_create
+EXPORT_SYMBOL vmlinux 0x7129e5f8	hex_asc
+EXPORT_SYMBOL vmlinux 0x712aa29b	_spin_lock_irqsave
+EXPORT_SYMBOL vmlinux 0x71320d43	vfs_fsync_range
+EXPORT_SYMBOL vmlinux 0x71356fba	remove_wait_queue
+EXPORT_SYMBOL vmlinux 0x71659c10	get_sb_single
+EXPORT_SYMBOL vmlinux 0x7171121c	overflowgid
+EXPORT_SYMBOL vmlinux 0x71771e6d	dev_gro_receive
+EXPORT_SYMBOL vmlinux 0x718eb65b	input_get_keycode
+EXPORT_SYMBOL vmlinux 0x71a50dbc	register_blkdev
+EXPORT_SYMBOL vmlinux 0x71b765a2	pcim_iounmap
+EXPORT_SYMBOL vmlinux 0x71bb41e4	wrmsr_on_cpus
+EXPORT_SYMBOL vmlinux 0x71d95e02	alloc_mdio_bitbang
+EXPORT_SYMBOL vmlinux 0x71f6eb38	sg_copy_from_buffer
+EXPORT_SYMBOL vmlinux 0x7209736e	abort_creds
+EXPORT_SYMBOL vmlinux 0x721fd550	__destroy_inode
+EXPORT_SYMBOL vmlinux 0x723e177d	inet_frag_kill
+EXPORT_SYMBOL vmlinux 0x7242e96d	strnchr
+EXPORT_SYMBOL vmlinux 0x7292c11d	agp_generic_free_gatt_table
+EXPORT_SYMBOL vmlinux 0x72b243d4	free_dma
+EXPORT_SYMBOL vmlinux 0x72bf2140	mtrr_add
+EXPORT_SYMBOL vmlinux 0x72c3be87	param_set_byte
+EXPORT_SYMBOL vmlinux 0x72ea7b2d	scsi_device_type
+EXPORT_SYMBOL vmlinux 0x7308f65e	mdiobus_read
+EXPORT_SYMBOL vmlinux 0x73299395	tty_insert_flip_string_flags
+EXPORT_SYMBOL vmlinux 0x7333b753	input_open_device
+EXPORT_SYMBOL vmlinux 0x733b4d82	inet_getname
+EXPORT_SYMBOL vmlinux 0x735a0bd5	native_io_delay
+EXPORT_SYMBOL vmlinux 0x736210f4	simple_unlink
+EXPORT_SYMBOL vmlinux 0x7364d9e8	lro_receive_frags
+EXPORT_SYMBOL vmlinux 0x736d0d9e	gnet_stats_copy_queue
+EXPORT_SYMBOL vmlinux 0x73745f28	seq_bitmap
+EXPORT_SYMBOL vmlinux 0x7389c9a8	acpi_bus_get_power
+EXPORT_SYMBOL vmlinux 0x739ee22d	gen_pool_add
+EXPORT_SYMBOL vmlinux 0x73aa7c7d	pci_wake_from_d3
+EXPORT_SYMBOL vmlinux 0x73c6ef4b	phy_device_register
+EXPORT_SYMBOL vmlinux 0x73d47708	inet_frags_init
+EXPORT_SYMBOL vmlinux 0x74000e85	dmam_pool_create
+EXPORT_SYMBOL vmlinux 0x740a1b95	reserve_evntsel_nmi
+EXPORT_SYMBOL vmlinux 0x7432f326	cdev_add
+EXPORT_SYMBOL vmlinux 0x744c0c68	param_get_byte
+EXPORT_SYMBOL vmlinux 0x745042f8	pci_enable_msi_block
+EXPORT_SYMBOL vmlinux 0x746126e9	ethtool_op_get_tx_csum
+EXPORT_SYMBOL vmlinux 0x747659c1	vlan_gro_frags
+EXPORT_SYMBOL vmlinux 0x747e1729	mmc_register_driver
+EXPORT_SYMBOL vmlinux 0x7485e15e	unregister_chrdev_region
+EXPORT_SYMBOL vmlinux 0x748caf40	down
+EXPORT_SYMBOL vmlinux 0x74954462	timecounter_read
+EXPORT_SYMBOL vmlinux 0x74aa4f9c	md_integrity_add_rdev
+EXPORT_SYMBOL vmlinux 0x74bc61d0	dqget
+EXPORT_SYMBOL vmlinux 0x74be5608	pci_bus_write_config_dword
+EXPORT_SYMBOL vmlinux 0x74bfc369	__tracepoint_kmem_cache_alloc
+EXPORT_SYMBOL vmlinux 0x74cc1cbe	unregister_cpu_notifier
+EXPORT_SYMBOL vmlinux 0x74ce972f	key_revoke
+EXPORT_SYMBOL vmlinux 0x74fe71b2	sg_miter_stop
+EXPORT_SYMBOL vmlinux 0x752dcee2	sock_queue_rcv_skb
+EXPORT_SYMBOL vmlinux 0x7538b132	agp_off
+EXPORT_SYMBOL vmlinux 0x756e6992	strnicmp
+EXPORT_SYMBOL vmlinux 0x7575158d	pci_bus_size_bridges
+EXPORT_SYMBOL vmlinux 0x7581df49	cpu_sysdev_class
+EXPORT_SYMBOL vmlinux 0x75990145	blk_end_request_all
+EXPORT_SYMBOL vmlinux 0x75bdea12	iommu_area_alloc
+EXPORT_SYMBOL vmlinux 0x75c62cd0	acpi_processor_unregister_performance
+EXPORT_SYMBOL vmlinux 0x75fea76b	phy_stop
+EXPORT_SYMBOL vmlinux 0x76093d8a	acpi_lock_battery_dir
+EXPORT_SYMBOL vmlinux 0x760a0f4f	yield
+EXPORT_SYMBOL vmlinux 0x760b437a	unregister_inetaddr_notifier
+EXPORT_SYMBOL vmlinux 0x760f35f1	cdev_alloc
+EXPORT_SYMBOL vmlinux 0x764bd77c	request_resource
+EXPORT_SYMBOL vmlinux 0x76624318	dm_register_target
+EXPORT_SYMBOL vmlinux 0x767dd8fd	acpi_get_irq_routing_table
+EXPORT_SYMBOL vmlinux 0x767ddb02	set_memory_wc
+EXPORT_SYMBOL vmlinux 0x768fa6bd	vfs_link
+EXPORT_SYMBOL vmlinux 0x76987e82	nf_log_register
+EXPORT_SYMBOL vmlinux 0x76bf656d	__bitmap_shift_left
+EXPORT_SYMBOL vmlinux 0x76c690d3	sock_no_poll
+EXPORT_SYMBOL vmlinux 0x76d3cd60	laptop_mode
+EXPORT_SYMBOL vmlinux 0x76d4dce1	tcf_hash_create
+EXPORT_SYMBOL vmlinux 0x76eb6137	__tcp_get_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x76f3f8a5	num_k8_northbridges
+EXPORT_SYMBOL vmlinux 0x770ff22f	jbd2_journal_begin_ordered_truncate
+EXPORT_SYMBOL vmlinux 0x7736d3f1	neigh_event_ns
+EXPORT_SYMBOL vmlinux 0x773a9c94	blk_iopoll_enabled
+EXPORT_SYMBOL vmlinux 0x776bb0d1	per_cpu__cpu_core_map
+EXPORT_SYMBOL vmlinux 0x778cded6	dev_trans_start
+EXPORT_SYMBOL vmlinux 0x77959d5d	dqput
+EXPORT_SYMBOL vmlinux 0x77a108df	_write_unlock_irqrestore
+EXPORT_SYMBOL vmlinux 0x77a6c0a0	kill_pgrp
+EXPORT_SYMBOL vmlinux 0x77a70f6f	pagevec_lookup_tag
+EXPORT_SYMBOL vmlinux 0x77cfcfde	__tracepoint_kmalloc_node
+EXPORT_SYMBOL vmlinux 0x77ecac9f	zlib_inflateEnd
+EXPORT_SYMBOL vmlinux 0x77f1f45f	ndisc_build_skb
+EXPORT_SYMBOL vmlinux 0x77f53abc	acpi_get_vendor_resource
+EXPORT_SYMBOL vmlinux 0x77fa5d1f	ns_to_timespec
+EXPORT_SYMBOL vmlinux 0x78029542	skb_realloc_headroom
+EXPORT_SYMBOL vmlinux 0x7804fa1a	phy_detach
+EXPORT_SYMBOL vmlinux 0x782acba5	crc_t10dif
+EXPORT_SYMBOL vmlinux 0x785148a3	idr_destroy
+EXPORT_SYMBOL vmlinux 0x78764f4e	pv_irq_ops
+EXPORT_SYMBOL vmlinux 0x789300e7	follow_down
+EXPORT_SYMBOL vmlinux 0x78a484c9	_read_unlock_irqrestore
+EXPORT_SYMBOL vmlinux 0x78c05f40	mb_cache_create
+EXPORT_SYMBOL vmlinux 0x78c5f560	jbd2_journal_flush
+EXPORT_SYMBOL vmlinux 0x78d64363	jbd2_log_start_commit
+EXPORT_SYMBOL vmlinux 0x78df6bd7	no_pci_devices
+EXPORT_SYMBOL vmlinux 0x78fbb0f7	__serio_register_driver
+EXPORT_SYMBOL vmlinux 0x79068fda	acpi_install_method
+EXPORT_SYMBOL vmlinux 0x791ac05c	__nla_put_nohdr
+EXPORT_SYMBOL vmlinux 0x792cea90	blk_queue_update_dma_pad
+EXPORT_SYMBOL vmlinux 0x793db228	neigh_ifdown
+EXPORT_SYMBOL vmlinux 0x7945045a	unregister_sysrq_key
+EXPORT_SYMBOL vmlinux 0x7955bbb8	generic_file_llseek
+EXPORT_SYMBOL vmlinux 0x796c774b	input_close_device
+EXPORT_SYMBOL vmlinux 0x796fc5ce	scsi_get_sense_info_fld
+EXPORT_SYMBOL vmlinux 0x798e6b63	ppp_unit_number
+EXPORT_SYMBOL vmlinux 0x79aa04a2	get_random_bytes
+EXPORT_SYMBOL vmlinux 0x79ad224b	tasklet_kill
+EXPORT_SYMBOL vmlinux 0x79f82ed1	gnet_stats_copy_basic
+EXPORT_SYMBOL vmlinux 0x79faecd4	pci_assign_resource
+EXPORT_SYMBOL vmlinux 0x7a142de0	security_path_truncate
+EXPORT_SYMBOL vmlinux 0x7a2a4ad5	prepare_creds
+EXPORT_SYMBOL vmlinux 0x7a2a837d	strict_strtol
+EXPORT_SYMBOL vmlinux 0x7a2f5a71	register_tcf_proto_ops
+EXPORT_SYMBOL vmlinux 0x7a4497db	kzfree
+EXPORT_SYMBOL vmlinux 0x7a6e3f1b	xfrm_user_policy
+EXPORT_SYMBOL vmlinux 0x7a848702	_read_lock_irqsave
+EXPORT_SYMBOL vmlinux 0x7a944a8e	audit_log_end
+EXPORT_SYMBOL vmlinux 0x7aa9b9f6	blk_queue_stack_limits
+EXPORT_SYMBOL vmlinux 0x7aaa899f	sock_no_recvmsg
+EXPORT_SYMBOL vmlinux 0x7acc529b	__scm_destroy
+EXPORT_SYMBOL vmlinux 0x7adb0b6d	aio_put_req
+EXPORT_SYMBOL vmlinux 0x7ae73de1	alloc_pages_exact
+EXPORT_SYMBOL vmlinux 0x7aebc111	km_state_expired
+EXPORT_SYMBOL vmlinux 0x7aec9089	clear_user
+EXPORT_SYMBOL vmlinux 0x7b0c84c4	acpi_remove_table_handler
+EXPORT_SYMBOL vmlinux 0x7b15227b	ip_route_output_key
+EXPORT_SYMBOL vmlinux 0x7b18ef33	mddev_congested
+EXPORT_SYMBOL vmlinux 0x7b227b00	unlock_page
+EXPORT_SYMBOL vmlinux 0x7b52a859	wrmsr_safe_on_cpu
+EXPORT_SYMBOL vmlinux 0x7b56bd05	acpi_lid_notifier_register
+EXPORT_SYMBOL vmlinux 0x7b6ce00f	pnp_activate_dev
+EXPORT_SYMBOL vmlinux 0x7b6cfcb4	mmc_try_claim_host
+EXPORT_SYMBOL vmlinux 0x7b771c9c	d_rehash
+EXPORT_SYMBOL vmlinux 0x7b8f4c40	key_create_or_update
+EXPORT_SYMBOL vmlinux 0x7ba9528e	blk_queue_max_hw_segments
+EXPORT_SYMBOL vmlinux 0x7be22d36	i2c_add_adapter
+EXPORT_SYMBOL vmlinux 0x7be41077	blk_queue_max_segment_size
+EXPORT_SYMBOL vmlinux 0x7bff3be7	iov_iter_advance
+EXPORT_SYMBOL vmlinux 0x7c0e3172	nf_hook_slow
+EXPORT_SYMBOL vmlinux 0x7c15af1e	dquot_alloc_inode
+EXPORT_SYMBOL vmlinux 0x7c1c0c89	pci_request_region
+EXPORT_SYMBOL vmlinux 0x7c1cde82	proc_dointvec_ms_jiffies
+EXPORT_SYMBOL vmlinux 0x7c46233a	cpufreq_quick_get
+EXPORT_SYMBOL vmlinux 0x7c4ba0de	block_commit_write
+EXPORT_SYMBOL vmlinux 0x7c59d7d5	I_BDEV
+EXPORT_SYMBOL vmlinux 0x7c60d66e	getname
+EXPORT_SYMBOL vmlinux 0x7c61340c	__release_region
+EXPORT_SYMBOL vmlinux 0x7c8c2c31	put_tty_driver
+EXPORT_SYMBOL vmlinux 0x7c904ded	unregister_module_notifier
+EXPORT_SYMBOL vmlinux 0x7ca2b206	sk_dst_check
+EXPORT_SYMBOL vmlinux 0x7cb1ae69	cpu_down
+EXPORT_SYMBOL vmlinux 0x7cc8a6a1	i2c_smbus_read_i2c_block_data
+EXPORT_SYMBOL vmlinux 0x7d11c268	jiffies
+EXPORT_SYMBOL vmlinux 0x7d55a9f2	brioctl_set
+EXPORT_SYMBOL vmlinux 0x7d5fb2bd	prepare_kernel_cred
+EXPORT_SYMBOL vmlinux 0x7d6055c5	sock_i_ino
+EXPORT_SYMBOL vmlinux 0x7d64a0fa	dm_exception_store_type_register
+EXPORT_SYMBOL vmlinux 0x7d6bb587	cpu_online_mask
+EXPORT_SYMBOL vmlinux 0x7d6c9536	bitmap_endwrite
+EXPORT_SYMBOL vmlinux 0x7d7631f5	unregister_md_personality
+EXPORT_SYMBOL vmlinux 0x7d7b8b79	bdevname
+EXPORT_SYMBOL vmlinux 0x7d7e7a6e	dcache_dir_lseek
+EXPORT_SYMBOL vmlinux 0x7d851bb7	genphy_config_advert
+EXPORT_SYMBOL vmlinux 0x7d94f746	acpi_os_write_port
+EXPORT_SYMBOL vmlinux 0x7daf71bd	xfrm6_rcv_spi
+EXPORT_SYMBOL vmlinux 0x7daf7486	inet_frag_destroy
+EXPORT_SYMBOL vmlinux 0x7dc09f30	xfrm_unregister_mode
+EXPORT_SYMBOL vmlinux 0x7dcc1ed9	block_is_partially_uptodate
+EXPORT_SYMBOL vmlinux 0x7dce8895	slow_work_unregister_user
+EXPORT_SYMBOL vmlinux 0x7dceceac	capable
+EXPORT_SYMBOL vmlinux 0x7dd554fc	unregister_kmmio_probe
+EXPORT_SYMBOL vmlinux 0x7df16b89	locks_copy_lock
+EXPORT_SYMBOL vmlinux 0x7df97bc5	submit_bh
+EXPORT_SYMBOL vmlinux 0x7dfc6395	neigh_connected_output
+EXPORT_SYMBOL vmlinux 0x7dfe2451	generic_read_dir
+EXPORT_SYMBOL vmlinux 0x7e299735	agp_create_memory
+EXPORT_SYMBOL vmlinux 0x7e5a5c6e	get_sb_bdev
+EXPORT_SYMBOL vmlinux 0x7e6ad4b7	eth_header_parse
+EXPORT_SYMBOL vmlinux 0x7e862ad7	dm_exception_store_create
+EXPORT_SYMBOL vmlinux 0x7e9ebb05	kernel_thread
+EXPORT_SYMBOL vmlinux 0x7ec9bfbc	strncpy
+EXPORT_SYMBOL vmlinux 0x7ee91c1d	_spin_trylock
+EXPORT_SYMBOL vmlinux 0x7ef967b3	d_alloc
+EXPORT_SYMBOL vmlinux 0x7f24de73	jiffies_to_usecs
+EXPORT_SYMBOL vmlinux 0x7f261948	kernel_getsockname
+EXPORT_SYMBOL vmlinux 0x7f4f4ae0	pnp_request_card_device
+EXPORT_SYMBOL vmlinux 0x7f61fb79	md_check_recovery
+EXPORT_SYMBOL vmlinux 0x7f62effb	unregister_key_type
+EXPORT_SYMBOL vmlinux 0x7f6c3e80	block_page_mkwrite
+EXPORT_SYMBOL vmlinux 0x7f77b6df	scsi_unregister
+EXPORT_SYMBOL vmlinux 0x7fd59dad	md_write_start
+EXPORT_SYMBOL vmlinux 0x7fde05c3	sock_no_mmap
+EXPORT_SYMBOL vmlinux 0x7fdfbc30	dquot_alloc_space
+EXPORT_SYMBOL vmlinux 0x802809fb	i2c_transfer
+EXPORT_SYMBOL vmlinux 0x802c4cc7	path_lookup
+EXPORT_SYMBOL vmlinux 0x8031bef8	bdi_register_dev
+EXPORT_SYMBOL vmlinux 0x8057f8b3	ether_setup
+EXPORT_SYMBOL vmlinux 0x8065f901	netpoll_send_udp
+EXPORT_SYMBOL vmlinux 0x807ea8d3	blk_cleanup_queue
+EXPORT_SYMBOL vmlinux 0x80c81df3	dmam_alloc_coherent
+EXPORT_SYMBOL vmlinux 0x80ceeef2	remove_inode_hash
+EXPORT_SYMBOL vmlinux 0x80d0e680	rt6_lookup
+EXPORT_SYMBOL vmlinux 0x80d5cff0	per_cpu__irq_regs
+EXPORT_SYMBOL vmlinux 0x80d9369d	alloc_trdev
+EXPORT_SYMBOL vmlinux 0x80e36042	skb_dma_map
+EXPORT_SYMBOL vmlinux 0x81150f3b	icmpv6_send
+EXPORT_SYMBOL vmlinux 0x812f480a	jbd2_journal_force_commit_nested
+EXPORT_SYMBOL vmlinux 0x81390c59	otg_put_transceiver
+EXPORT_SYMBOL vmlinux 0x814454a8	pci_set_mwi
+EXPORT_SYMBOL vmlinux 0x81472677	acpi_get_table
+EXPORT_SYMBOL vmlinux 0x8147766e	blk_plug_device_unlocked
+EXPORT_SYMBOL vmlinux 0x81488aa0	d_splice_alias
+EXPORT_SYMBOL vmlinux 0x814984e3	wireless_spy_update
+EXPORT_SYMBOL vmlinux 0x815b5dd4	match_octal
+EXPORT_SYMBOL vmlinux 0x815f2897	empty_zero_page
+EXPORT_SYMBOL vmlinux 0x8168a918	generic_file_llseek_unlocked
+EXPORT_SYMBOL vmlinux 0x817c715a	in_dev_finish_destroy
+EXPORT_SYMBOL vmlinux 0x8182a48e	neigh_parms_alloc
+EXPORT_SYMBOL vmlinux 0x81a1b699	input_inject_event
+EXPORT_SYMBOL vmlinux 0x81afa0c7	cdev_index
+EXPORT_SYMBOL vmlinux 0x81dce01b	d_add_ci
+EXPORT_SYMBOL vmlinux 0x81e6b37f	dmi_get_system_info
+EXPORT_SYMBOL vmlinux 0x81fbc67d	simple_empty
+EXPORT_SYMBOL vmlinux 0x820d225f	print_mac
+EXPORT_SYMBOL vmlinux 0x820fc63c	vfsmount_lock
+EXPORT_SYMBOL vmlinux 0x8212721d	xenbus_dev_request_and_reply
+EXPORT_SYMBOL vmlinux 0x82130130	bio_integrity_add_page
+EXPORT_SYMBOL vmlinux 0x824144b5	proc_net_netfilter
+EXPORT_SYMBOL vmlinux 0x8247bf68	generic_fillattr
+EXPORT_SYMBOL vmlinux 0x8251bcc3	bitmap_release_region
+EXPORT_SYMBOL vmlinux 0x82650b03	mutex_lock_killable
+EXPORT_SYMBOL vmlinux 0x82692209	kref_set
+EXPORT_SYMBOL vmlinux 0x8280d559	udp_lib_get_port
+EXPORT_SYMBOL vmlinux 0x8286e845	dm_dirty_log_destroy
+EXPORT_SYMBOL vmlinux 0x828910ab	get_empty_filp
+EXPORT_SYMBOL vmlinux 0x828d704c	scsi_print_result
+EXPORT_SYMBOL vmlinux 0x828e320f	blk_queue_init_tags
+EXPORT_SYMBOL vmlinux 0x82acfb70	blk_iopoll_sched
+EXPORT_SYMBOL vmlinux 0x82ba99d6	pci_get_bus_and_slot
+EXPORT_SYMBOL vmlinux 0x82d3e07d	gnet_stats_start_copy
+EXPORT_SYMBOL vmlinux 0x82d55273	call_usermodehelper_setcleanup
+EXPORT_SYMBOL vmlinux 0x82daeb4f	block_write_end
+EXPORT_SYMBOL vmlinux 0x82e9c083	csum_partial_copy_fromiovecend
+EXPORT_SYMBOL vmlinux 0x82f50fc5	vfs_readdir
+EXPORT_SYMBOL vmlinux 0x830e547b	ioremap_prot
+EXPORT_SYMBOL vmlinux 0x830f8d69	bio_integrity_alloc
+EXPORT_SYMBOL vmlinux 0x8317e20a	completion_done
+EXPORT_SYMBOL vmlinux 0x834942e0	sk_stream_kill_queues
+EXPORT_SYMBOL vmlinux 0x837b98f8	register_exec_domain
+EXPORT_SYMBOL vmlinux 0x837fe8d9	agp_generic_mask_memory
+EXPORT_SYMBOL vmlinux 0x83879b9f	bio_integrity_clone
+EXPORT_SYMBOL vmlinux 0x83a476ce	bitmap_scnlistprintf
+EXPORT_SYMBOL vmlinux 0x83addc52	nla_append
+EXPORT_SYMBOL vmlinux 0x83c43dc1	posix_acl_chmod_masq
+EXPORT_SYMBOL vmlinux 0x83ea776c	test_set_page_writeback
+EXPORT_SYMBOL vmlinux 0x83f99500	pci_request_selected_regions
+EXPORT_SYMBOL vmlinux 0x83fc98e9	bio_split
+EXPORT_SYMBOL vmlinux 0x8405c9a8	request_firmware
+EXPORT_SYMBOL vmlinux 0x84069277	tcf_action_exec
+EXPORT_SYMBOL vmlinux 0x841185a3	wait_on_page_bit
+EXPORT_SYMBOL vmlinux 0x842bc2d7	audit_log_start
+EXPORT_SYMBOL vmlinux 0x8441e725	skb_checksum
+EXPORT_SYMBOL vmlinux 0x847ec116	vga_tryget
+EXPORT_SYMBOL vmlinux 0x84f255c7	pci_read_vpd
+EXPORT_SYMBOL vmlinux 0x8527cda3	lro_flush_pkt
+EXPORT_SYMBOL vmlinux 0x8533e05a	scsi_reset_provider
+EXPORT_SYMBOL vmlinux 0x854c5636	__pci_register_driver
+EXPORT_SYMBOL vmlinux 0x855eb993	netpoll_parse_options
+EXPORT_SYMBOL vmlinux 0x85670f1d	rtnl_is_locked
+EXPORT_SYMBOL vmlinux 0x85abc85f	strncmp
+EXPORT_SYMBOL vmlinux 0x85cb3672	acpi_bus_register_driver
+EXPORT_SYMBOL vmlinux 0x85d4b12b	blk_queue_ordered
+EXPORT_SYMBOL vmlinux 0x85df9b6c	strsep
+EXPORT_SYMBOL vmlinux 0x86126a09	tcp_mtup_init
+EXPORT_SYMBOL vmlinux 0x8618bcdf	tty_port_lower_dtr_rts
+EXPORT_SYMBOL vmlinux 0x8631f188	radix_tree_tag_set
+EXPORT_SYMBOL vmlinux 0x8664f62e	cpufreq_update_policy
+EXPORT_SYMBOL vmlinux 0x8689160e	dev_unicast_unsync
+EXPORT_SYMBOL vmlinux 0x868acba5	get_options
+EXPORT_SYMBOL vmlinux 0x869a944a	hippi_mac_addr
+EXPORT_SYMBOL vmlinux 0x86a9d4d0	dm_kcopyd_client_create
+EXPORT_SYMBOL vmlinux 0x86c7146d	vfs_fstat
+EXPORT_SYMBOL vmlinux 0x86d64aa8	pci_enable_device
+EXPORT_SYMBOL vmlinux 0x86e9b06c	__napi_schedule
+EXPORT_SYMBOL vmlinux 0x86fb9b05	bitmap_parse_user
+EXPORT_SYMBOL vmlinux 0x86fe69dd	jbd2_journal_set_triggers
+EXPORT_SYMBOL vmlinux 0x8710fc19	pci_set_consistent_dma_mask
+EXPORT_SYMBOL vmlinux 0x871c0a7e	fiemap_check_flags
+EXPORT_SYMBOL vmlinux 0x871d06b5	__bread
+EXPORT_SYMBOL vmlinux 0x8725b236	thermal_zone_unbind_cooling_device
+EXPORT_SYMBOL vmlinux 0x87327ac3	inet_csk_init_xmit_timers
+EXPORT_SYMBOL vmlinux 0x8733e9a3	sleep_on_timeout
+EXPORT_SYMBOL vmlinux 0x8740668e	may_umount_tree
+EXPORT_SYMBOL vmlinux 0x874bc019	__rta_fill
+EXPORT_SYMBOL vmlinux 0x874e2146	__brelse
+EXPORT_SYMBOL vmlinux 0x876c3de6	kernel_sock_shutdown
+EXPORT_SYMBOL vmlinux 0x876dafc3	ec_write
+EXPORT_SYMBOL vmlinux 0x8785333f	console_start
+EXPORT_SYMBOL vmlinux 0x878ab3ce	sysctl_tcp_adv_win_scale
+EXPORT_SYMBOL vmlinux 0x87a7112b	blk_queue_free_tags
+EXPORT_SYMBOL vmlinux 0x87aaddf8	wrmsr_safe_regs_on_cpu
+EXPORT_SYMBOL vmlinux 0x87cb81e6	framebuffer_alloc
+EXPORT_SYMBOL vmlinux 0x87df4f9e	__generic_file_aio_write
+EXPORT_SYMBOL vmlinux 0x87f5fcb9	agp_bridge
+EXPORT_SYMBOL vmlinux 0x881039d0	zlib_inflate
+EXPORT_SYMBOL vmlinux 0x881fded6	bmap
+EXPORT_SYMBOL vmlinux 0x8850afa5	mnt_unpin
+EXPORT_SYMBOL vmlinux 0x886aa274	posix_acl_create_masq
+EXPORT_SYMBOL vmlinux 0x88993257	skb_gso_segment
+EXPORT_SYMBOL vmlinux 0x889da329	seq_bitmap_list
+EXPORT_SYMBOL vmlinux 0x88abcd10	pipe_unlock
+EXPORT_SYMBOL vmlinux 0x88b7700b	end_buffer_write_sync
+EXPORT_SYMBOL vmlinux 0x88f2e2c1	default_unplug_io_fn
+EXPORT_SYMBOL vmlinux 0x88ffca4c	register_key_type
+EXPORT_SYMBOL vmlinux 0x891279ae	phy_attach_direct
+EXPORT_SYMBOL vmlinux 0x891f7742	journal_errno
+EXPORT_SYMBOL vmlinux 0x892b26a0	set_memory_nx
+EXPORT_SYMBOL vmlinux 0x897473df	mktime
+EXPORT_SYMBOL vmlinux 0x89915a0f	i2c_smbus_xfer
+EXPORT_SYMBOL vmlinux 0x89949018	down_timeout
+EXPORT_SYMBOL vmlinux 0x89aa963c	phy_connect_direct
+EXPORT_SYMBOL vmlinux 0x89bf099f	blk_complete_request
+EXPORT_SYMBOL vmlinux 0x89d5538d	fb_pad_aligned_buffer
+EXPORT_SYMBOL vmlinux 0x89d66811	build_ehash_secret
+EXPORT_SYMBOL vmlinux 0x8a1203a9	kref_get
+EXPORT_SYMBOL vmlinux 0x8a373fd7	twl4030_i2c_write
+EXPORT_SYMBOL vmlinux 0x8a3eabf0	__wait_on_bit
+EXPORT_SYMBOL vmlinux 0x8a763823	send_sig
+EXPORT_SYMBOL vmlinux 0x8a7d1c31	high_memory
+EXPORT_SYMBOL vmlinux 0x8a99a016	mempool_free_slab
+EXPORT_SYMBOL vmlinux 0x8aad1913	unlock_rename
+EXPORT_SYMBOL vmlinux 0x8abbdb5b	__devm_request_region
+EXPORT_SYMBOL vmlinux 0x8abfba3e	__lock_page
+EXPORT_SYMBOL vmlinux 0x8ac108ba	sync_inode
+EXPORT_SYMBOL vmlinux 0x8ac40297	iommu_area_free
+EXPORT_SYMBOL vmlinux 0x8b01f2c2	alloc_file
+EXPORT_SYMBOL vmlinux 0x8b17e475	agp_copy_info
+EXPORT_SYMBOL vmlinux 0x8b2ff50a	tcp_read_sock
+EXPORT_SYMBOL vmlinux 0x8b35e873	sg_last
+EXPORT_SYMBOL vmlinux 0x8b5f4a2e	IO_APIC_get_PCI_irq_vector
+EXPORT_SYMBOL vmlinux 0x8b618d08	overflowuid
+EXPORT_SYMBOL vmlinux 0x8b72e49a	pci_scan_single_device
+EXPORT_SYMBOL vmlinux 0x8b7fe311	kmemdup
+EXPORT_SYMBOL vmlinux 0x8b922c0f	__strnlen_user
+EXPORT_SYMBOL vmlinux 0x8b989cf9	acpi_bus_can_wakeup
+EXPORT_SYMBOL vmlinux 0x8bacdd06	register_nls
+EXPORT_SYMBOL vmlinux 0x8bb15a0a	bio_sector_offset
+EXPORT_SYMBOL vmlinux 0x8bba85ac	blk_fetch_request
+EXPORT_SYMBOL vmlinux 0x8bc727ce	tcp_simple_retransmit
+EXPORT_SYMBOL vmlinux 0x8bd313b8	__tracepoint_kfree
+EXPORT_SYMBOL vmlinux 0x8bd5b603	param_get_long
+EXPORT_SYMBOL vmlinux 0x8bf7d1b0	per_cpu__current_task
+EXPORT_SYMBOL vmlinux 0x8c183cbe	iowrite16
+EXPORT_SYMBOL vmlinux 0x8c36120b	netdev_state_change
+EXPORT_SYMBOL vmlinux 0x8c4e7d19	pci_enable_device_io
+EXPORT_SYMBOL vmlinux 0x8c537c45	posix_acl_from_mode
+EXPORT_SYMBOL vmlinux 0x8c5b143e	kmem_ptr_validate
+EXPORT_SYMBOL vmlinux 0x8c65230d	acpi_processor_register_performance
+EXPORT_SYMBOL vmlinux 0x8c7023e7	napi_get_frags
+EXPORT_SYMBOL vmlinux 0x8c7fee9f	arch_acpi_processor_cleanup_pdc
+EXPORT_SYMBOL vmlinux 0x8cac23ea	inode_add_rsv_space
+EXPORT_SYMBOL vmlinux 0x8cb9cb0b	jbd2_journal_clear_features
+EXPORT_SYMBOL vmlinux 0x8cc79cab	iowrite16_rep
+EXPORT_SYMBOL vmlinux 0x8cf03378	skb_copy_and_csum_dev
+EXPORT_SYMBOL vmlinux 0x8cf8619c	xfrm4_rcv_encap
+EXPORT_SYMBOL vmlinux 0x8d0a46c0	ps2_drain
+EXPORT_SYMBOL vmlinux 0x8d1a0ad3	nf_register_queue_handler
+EXPORT_SYMBOL vmlinux 0x8d29a8aa	nf_getsockopt
+EXPORT_SYMBOL vmlinux 0x8d3894f2	_ctype
+EXPORT_SYMBOL vmlinux 0x8d551bef	sysctl_tcp_rmem
+EXPORT_SYMBOL vmlinux 0x8d8c6f1c	bio_integrity_endio
+EXPORT_SYMBOL vmlinux 0x8d8d96c6	acpi_get_sleep_type_data
+EXPORT_SYMBOL vmlinux 0x8da016a4	generic_ro_fops
+EXPORT_SYMBOL vmlinux 0x8dbbe355	pneigh_lookup
+EXPORT_SYMBOL vmlinux 0x8dbc3fe3	tcf_exts_destroy
+EXPORT_SYMBOL vmlinux 0x8dca832f	__percpu_counter_sum
+EXPORT_SYMBOL vmlinux 0x8deed0f5	blkdev_put
+EXPORT_SYMBOL vmlinux 0x8e002cda	acpi_remove_gpe_block
+EXPORT_SYMBOL vmlinux 0x8e0637ba	i8253_lock
+EXPORT_SYMBOL vmlinux 0x8e0b7743	ipv6_ext_hdr
+EXPORT_SYMBOL vmlinux 0x8e2d96c4	pci_bus_assign_resources
+EXPORT_SYMBOL vmlinux 0x8e3c9cc3	vprintk
+EXPORT_SYMBOL vmlinux 0x8e3fb7c5	security_inode_readlink
+EXPORT_SYMBOL vmlinux 0x8e49f4de	module_layout
+EXPORT_SYMBOL vmlinux 0x8e763ae1	send_remote_softirq
+EXPORT_SYMBOL vmlinux 0x8e7ef552	__invalidate_device
+EXPORT_SYMBOL vmlinux 0x8e8049aa	netdev_boot_setup_check
+EXPORT_SYMBOL vmlinux 0x8e8199bf	copy_strings_kernel
+EXPORT_SYMBOL vmlinux 0x8e83107a	generic_getxattr
+EXPORT_SYMBOL vmlinux 0x8e9cf319	dm_get_device
+EXPORT_SYMBOL vmlinux 0x8ea383d4	dev_remove_pack
+EXPORT_SYMBOL vmlinux 0x8eb20493	tty_port_tty_get
+EXPORT_SYMBOL vmlinux 0x8ec1a23c	override_creds
+EXPORT_SYMBOL vmlinux 0x8ec5c3f6	kthread_stop
+EXPORT_SYMBOL vmlinux 0x8ee69235	timeval_to_jiffies
+EXPORT_SYMBOL vmlinux 0x8ef9ca9f	swiotlb_free_coherent
+EXPORT_SYMBOL vmlinux 0x8f1e66df	dm_get_mapinfo
+EXPORT_SYMBOL vmlinux 0x8f2703b7	wbinvd_on_all_cpus
+EXPORT_SYMBOL vmlinux 0x8f466e99	page_put_link
+EXPORT_SYMBOL vmlinux 0x8f46cd63	set_bdi_congested
+EXPORT_SYMBOL vmlinux 0x8f48679a	rb_prev
+EXPORT_SYMBOL vmlinux 0x8f4da4fd	unregister_netdev
+EXPORT_SYMBOL vmlinux 0x8f634ae8	__dec_zone_page_state
+EXPORT_SYMBOL vmlinux 0x8f63795f	bio_uncopy_user
+EXPORT_SYMBOL vmlinux 0x8f6b7950	set_irq_data
+EXPORT_SYMBOL vmlinux 0x8f9c199c	__get_user_2
+EXPORT_SYMBOL vmlinux 0x8fd5da89	cdrom_release
+EXPORT_SYMBOL vmlinux 0x8fd80892	request_key_async_with_auxdata
+EXPORT_SYMBOL vmlinux 0x8fe8ad1a	rwsem_downgrade_wake
+EXPORT_SYMBOL vmlinux 0x90035333	secure_tcpv6_sequence_number
+EXPORT_SYMBOL vmlinux 0x90144bfa	linkwatch_fire_event
+EXPORT_SYMBOL vmlinux 0x902daea9	scsi_command_normalize_sense
+EXPORT_SYMBOL vmlinux 0x904409c6	acpi_set_firmware_waking_vector
+EXPORT_SYMBOL vmlinux 0x904b5f18	md_set_array_sectors
+EXPORT_SYMBOL vmlinux 0x9052096e	skb_trim
+EXPORT_SYMBOL vmlinux 0x909eb440	dev_mc_add
+EXPORT_SYMBOL vmlinux 0x90a1601f	dmi_check_system
+EXPORT_SYMBOL vmlinux 0x90a21b2c	kernel_bind
+EXPORT_SYMBOL vmlinux 0x90a38d5f	fib_default_rule_add
+EXPORT_SYMBOL vmlinux 0x90a4943a	register_gifconf
+EXPORT_SYMBOL vmlinux 0x90ceef80	pci_unmap_rom
+EXPORT_SYMBOL vmlinux 0x90ea10a0	scsi_print_sense
+EXPORT_SYMBOL vmlinux 0x90eaba31	dm_io_client_create
+EXPORT_SYMBOL vmlinux 0x90ef520d	neigh_table_init
+EXPORT_SYMBOL vmlinux 0x90f65e98	tcf_unregister_action
+EXPORT_SYMBOL vmlinux 0x90fefcf2	security_sb_clone_mnt_opts
+EXPORT_SYMBOL vmlinux 0x910ea45a	dquot_scan_active
+EXPORT_SYMBOL vmlinux 0x91433fac	dev_set_allmulti
+EXPORT_SYMBOL vmlinux 0x9144a8e2	ec_burst_disable
+EXPORT_SYMBOL vmlinux 0x91481982	__ratelimit
+EXPORT_SYMBOL vmlinux 0x914d55cf	tcf_em_register
+EXPORT_SYMBOL vmlinux 0x91607d95	set_memory_wb
+EXPORT_SYMBOL vmlinux 0x91766c09	param_get_ulong
+EXPORT_SYMBOL vmlinux 0x917b8968	scsi_prep_state_check
+EXPORT_SYMBOL vmlinux 0x91862f73	nf_log_unregister
+EXPORT_SYMBOL vmlinux 0x91acc83d	ethtool_op_get_tso
+EXPORT_SYMBOL vmlinux 0x91bc3d61	blk_integrity_register
+EXPORT_SYMBOL vmlinux 0x9207748b	dev_mc_delete
+EXPORT_SYMBOL vmlinux 0x920b15c8	bio_integrity_free
+EXPORT_SYMBOL vmlinux 0x9214ed8a	param_get_bool
+EXPORT_SYMBOL vmlinux 0x92320f44	sock_release
+EXPORT_SYMBOL vmlinux 0x92392cd9	iov_shorten
+EXPORT_SYMBOL vmlinux 0x923b1276	dmaengine_get
+EXPORT_SYMBOL vmlinux 0x9245cb04	blk_execute_rq
+EXPORT_SYMBOL vmlinux 0x927e989f	gen_pool_alloc
+EXPORT_SYMBOL vmlinux 0x9293cb9e	search_binary_handler
+EXPORT_SYMBOL vmlinux 0x929506ff	skb_checksum_help
+EXPORT_SYMBOL vmlinux 0x92e81a3a	touch_atime
+EXPORT_SYMBOL vmlinux 0x92e8a340	phy_ethtool_sset
+EXPORT_SYMBOL vmlinux 0x92ea4ae4	crc32_le
+EXPORT_SYMBOL vmlinux 0x9305f8e6	cpufreq_get
+EXPORT_SYMBOL vmlinux 0x934ee78e	skb_queue_tail
+EXPORT_SYMBOL vmlinux 0x9385667d	down_read_trylock
+EXPORT_SYMBOL vmlinux 0x93a1d001	dm_io_client_destroy
+EXPORT_SYMBOL vmlinux 0x93a6e0b2	io_schedule
+EXPORT_SYMBOL vmlinux 0x93c651be	acpi_info
+EXPORT_SYMBOL vmlinux 0x93cbd1ec	_spin_lock_bh
+EXPORT_SYMBOL vmlinux 0x93d3281e	bio_clone
+EXPORT_SYMBOL vmlinux 0x93fca811	__get_free_pages
+EXPORT_SYMBOL vmlinux 0x9407a4cf	sockfd_lookup
+EXPORT_SYMBOL vmlinux 0x941f5ebb	fb_validate_mode
+EXPORT_SYMBOL vmlinux 0x942e8e46	ndisc_send_skb
+EXPORT_SYMBOL vmlinux 0x943e868f	ida_get_new
+EXPORT_SYMBOL vmlinux 0x944832d6	ftrace_print_symbols_seq
+EXPORT_SYMBOL vmlinux 0x9448f902	__xfrm_policy_check
+EXPORT_SYMBOL vmlinux 0x945bc6a7	copy_from_user
+EXPORT_SYMBOL vmlinux 0x94847b23	nf_ct_destroy
+EXPORT_SYMBOL vmlinux 0x948dbae9	unregister_framebuffer
+EXPORT_SYMBOL vmlinux 0x948de0d8	compat_sock_common_getsockopt
+EXPORT_SYMBOL vmlinux 0x94961283	vunmap
+EXPORT_SYMBOL vmlinux 0x94991ef8	blk_init_tags
+EXPORT_SYMBOL vmlinux 0x94b689a2	proc_symlink
+EXPORT_SYMBOL vmlinux 0x94ef5b9d	remap_pfn_range
+EXPORT_SYMBOL vmlinux 0x94f32beb	__blk_run_queue
+EXPORT_SYMBOL vmlinux 0x9531af67	find_get_pages_tag
+EXPORT_SYMBOL vmlinux 0x95352ea9	acpi_check_mem_region
+EXPORT_SYMBOL vmlinux 0x954488a4	syncookie_secret
+EXPORT_SYMBOL vmlinux 0x954cbb26	vsprintf
+EXPORT_SYMBOL vmlinux 0x9554165c	blk_queue_prep_rq
+EXPORT_SYMBOL vmlinux 0x95783dd4	jbd2_journal_start
+EXPORT_SYMBOL vmlinux 0x95ceb864	key_update
+EXPORT_SYMBOL vmlinux 0x95f40e6e	sock_get_timestampns
+EXPORT_SYMBOL vmlinux 0x95f6270c	tty_shutdown
+EXPORT_SYMBOL vmlinux 0x96120102	nobh_truncate_page
+EXPORT_SYMBOL vmlinux 0x9629486a	per_cpu__cpu_number
+EXPORT_SYMBOL vmlinux 0x96476765	acpi_processor_preregister_performance
+EXPORT_SYMBOL vmlinux 0x964833b7	uart_update_timeout
+EXPORT_SYMBOL vmlinux 0x965b6929	ndisc_mc_map
+EXPORT_SYMBOL vmlinux 0x9680cbfc	d_alloc_root
+EXPORT_SYMBOL vmlinux 0x9682eae9	proc_mkdir
+EXPORT_SYMBOL vmlinux 0x968a93cb	dm_dirty_log_create
+EXPORT_SYMBOL vmlinux 0x968b0647	register_filesystem
+EXPORT_SYMBOL vmlinux 0x968b47ff	tty_mutex
+EXPORT_SYMBOL vmlinux 0x96cd2b04	scsi_sense_key_string
+EXPORT_SYMBOL vmlinux 0x970b3dde	block_fsync
+EXPORT_SYMBOL vmlinux 0x9710c39f	blk_stack_limits
+EXPORT_SYMBOL vmlinux 0x9715fa2c	module_put
+EXPORT_SYMBOL vmlinux 0x97193e7d	xfrm_policy_insert
+EXPORT_SYMBOL vmlinux 0x97212e23	inc_zone_page_state
+EXPORT_SYMBOL vmlinux 0x9734e569	mmc_remove_host
+EXPORT_SYMBOL vmlinux 0x973873ab	_spin_lock
+EXPORT_SYMBOL vmlinux 0x9754ec10	radix_tree_preload
+EXPORT_SYMBOL vmlinux 0x9757e099	ppp_channel_index
+EXPORT_SYMBOL vmlinux 0x97b2ce7b	i2c_smbus_read_byte
+EXPORT_SYMBOL vmlinux 0x97de0ddd	acpi_install_gpe_block
+EXPORT_SYMBOL vmlinux 0x981f4ec8	compat_ipv6_setsockopt
+EXPORT_SYMBOL vmlinux 0x98248028	fb_class
+EXPORT_SYMBOL vmlinux 0x983235b9	mmc_add_host
+EXPORT_SYMBOL vmlinux 0x986e6135	fb_pad_unaligned_buffer
+EXPORT_SYMBOL vmlinux 0x988863e1	scsi_scan_host
+EXPORT_SYMBOL vmlinux 0x988ed85d	set_memory_x
+EXPORT_SYMBOL vmlinux 0x98a32d41	unregister_quota_format
+EXPORT_SYMBOL vmlinux 0x98ba3b81	tcf_hash_new_index
+EXPORT_SYMBOL vmlinux 0x98d0c1dc	km_new_mapping
+EXPORT_SYMBOL vmlinux 0x98fa0611	unregister_nls
+EXPORT_SYMBOL vmlinux 0x98fe61c1	__skb_recv_datagram
+EXPORT_SYMBOL vmlinux 0x992beada	tcf_generic_walker
+EXPORT_SYMBOL vmlinux 0x998e60e7	da903x_query_status
+EXPORT_SYMBOL vmlinux 0x9994c0ca	ps2_is_keyboard_id
+EXPORT_SYMBOL vmlinux 0x999d40a9	journal_update_format
+EXPORT_SYMBOL vmlinux 0x999e8297	vfree
+EXPORT_SYMBOL vmlinux 0x99a47196	get_phy_id
+EXPORT_SYMBOL vmlinux 0x99bfbe39	get_unused_fd
+EXPORT_SYMBOL vmlinux 0x99c7a8b8	jbd2_dev_to_name
+EXPORT_SYMBOL vmlinux 0x99cdc86b	sysctl_tcp_reordering
+EXPORT_SYMBOL vmlinux 0x99d70464	ipv6_dev_get_saddr
+EXPORT_SYMBOL vmlinux 0x99dbdc02	lock_may_write
+EXPORT_SYMBOL vmlinux 0x99dcafae	rfkill_set_states
+EXPORT_SYMBOL vmlinux 0x99ea12ce	panic_blink
+EXPORT_SYMBOL vmlinux 0x9a0ce4e6	jbd2_journal_destroy
+EXPORT_SYMBOL vmlinux 0x9a1dfd65	strpbrk
+EXPORT_SYMBOL vmlinux 0x9a4ee44b	nlmsg_notify
+EXPORT_SYMBOL vmlinux 0x9a9985be	percpu_counter_destroy
+EXPORT_SYMBOL vmlinux 0x9aabc564	crc16
+EXPORT_SYMBOL vmlinux 0x9abd939e	sock_no_setsockopt
+EXPORT_SYMBOL vmlinux 0x9abf53bb	vmtruncate
+EXPORT_SYMBOL vmlinux 0x9ad3562a	rfkill_destroy
+EXPORT_SYMBOL vmlinux 0x9ae6a108	bfifo_qdisc_ops
+EXPORT_SYMBOL vmlinux 0x9af21719	address_space_init_once
+EXPORT_SYMBOL vmlinux 0x9aff8937	scsi_unblock_requests
+EXPORT_SYMBOL vmlinux 0x9b0a5bcd	register_qdisc
+EXPORT_SYMBOL vmlinux 0x9b23fdfb	md_error
+EXPORT_SYMBOL vmlinux 0x9b388444	get_zeroed_page
+EXPORT_SYMBOL vmlinux 0x9b6f658a	tcp_tso_segment
+EXPORT_SYMBOL vmlinux 0x9ba7089d	argv_split
+EXPORT_SYMBOL vmlinux 0x9badd74d	dentry_open
+EXPORT_SYMBOL vmlinux 0x9bbbf2aa	inet_twsk_deschedule
+EXPORT_SYMBOL vmlinux 0x9bde0d3e	mmc_alloc_host
+EXPORT_SYMBOL vmlinux 0x9bf85a0d	vfs_readv
+EXPORT_SYMBOL vmlinux 0x9c012508	fb_parse_edid
+EXPORT_SYMBOL vmlinux 0x9c0ea3cd	memscan
+EXPORT_SYMBOL vmlinux 0x9c40d06e	neigh_seq_start
+EXPORT_SYMBOL vmlinux 0x9c46574a	pci_bus_write_config_byte
+EXPORT_SYMBOL vmlinux 0x9c491f60	sg_alloc_table
+EXPORT_SYMBOL vmlinux 0x9c5ef7a0	tty_port_alloc_xmit_buf
+EXPORT_SYMBOL vmlinux 0x9c71e738	per_cpu__vm_event_states
+EXPORT_SYMBOL vmlinux 0x9ca95a0e	sort
+EXPORT_SYMBOL vmlinux 0x9cad14f7	tc_classify
+EXPORT_SYMBOL vmlinux 0x9caf02ed	put_io_context
+EXPORT_SYMBOL vmlinux 0x9cb96e92	qdisc_put_rtab
+EXPORT_SYMBOL vmlinux 0x9cc131e2	register_snap_client
+EXPORT_SYMBOL vmlinux 0x9cc8958b	request_key_async
+EXPORT_SYMBOL vmlinux 0x9ccb2622	finish_wait
+EXPORT_SYMBOL vmlinux 0x9ccf9d31	ip6_frag_match
+EXPORT_SYMBOL vmlinux 0x9cd51849	__pagevec_release
+EXPORT_SYMBOL vmlinux 0x9cdfd1ef	tcp_sendpage
+EXPORT_SYMBOL vmlinux 0x9ced38aa	down_trylock
+EXPORT_SYMBOL vmlinux 0x9cefa1c3	jbd2_journal_get_write_access
+EXPORT_SYMBOL vmlinux 0x9cf6eff8	elv_dispatch_sort
+EXPORT_SYMBOL vmlinux 0x9cfd56c5	scsi_print_status
+EXPORT_SYMBOL vmlinux 0x9d2b5eda	ppp_register_compressor
+EXPORT_SYMBOL vmlinux 0x9d33ef5e	acpi_enable
+EXPORT_SYMBOL vmlinux 0x9d35f5a9	save_mount_options
+EXPORT_SYMBOL vmlinux 0x9d3aa376	blk_iopoll_init
+EXPORT_SYMBOL vmlinux 0x9d57531d	pnp_release_card_device
+EXPORT_SYMBOL vmlinux 0x9d7caf66	journal_get_write_access
+EXPORT_SYMBOL vmlinux 0x9d85c068	commit_creds
+EXPORT_SYMBOL vmlinux 0x9da659fe	bdev_read_only
+EXPORT_SYMBOL vmlinux 0x9db21624	hex_dump_to_buffer
+EXPORT_SYMBOL vmlinux 0x9dd18764	lookup_hash
+EXPORT_SYMBOL vmlinux 0x9e04525b	pagecache_write_end
+EXPORT_SYMBOL vmlinux 0x9e19f169	poll_schedule_timeout
+EXPORT_SYMBOL vmlinux 0x9e1e6083	bh_uptodate_or_lock
+EXPORT_SYMBOL vmlinux 0x9e363b6b	acpi_disable_gpe
+EXPORT_SYMBOL vmlinux 0x9e447b7e	tty_free_termios
+EXPORT_SYMBOL vmlinux 0x9e64fbfe	rtc_cmos_read
+EXPORT_SYMBOL vmlinux 0x9e7d6bd0	__udelay
+EXPORT_SYMBOL vmlinux 0x9e9f1714	__bitmap_andnot
+EXPORT_SYMBOL vmlinux 0x9ea0ad49	__sg_free_table
+EXPORT_SYMBOL vmlinux 0x9ea28ec7	acpi_evaluate_object
+EXPORT_SYMBOL vmlinux 0x9ea4ecdc	xfrm_state_lookup_byaddr
+EXPORT_SYMBOL vmlinux 0x9eb65d33	xfrm_policy_flush
+EXPORT_SYMBOL vmlinux 0x9ebd4c04	adjust_resource
+EXPORT_SYMBOL vmlinux 0x9ec65d8e	xfrm_init_state
+EXPORT_SYMBOL vmlinux 0x9ec7c2de	file_remove_suid
+EXPORT_SYMBOL vmlinux 0x9edbecae	snprintf
+EXPORT_SYMBOL vmlinux 0x9ee22b6b	no_llseek
+EXPORT_SYMBOL vmlinux 0x9eecde16	do_brk
+EXPORT_SYMBOL vmlinux 0x9ef33171	jbd2_journal_invalidatepage
+EXPORT_SYMBOL vmlinux 0x9efe84c2	tty_devnum
+EXPORT_SYMBOL vmlinux 0x9f0aa9fb	mb_cache_entry_insert
+EXPORT_SYMBOL vmlinux 0x9f0e037c	call_usermodehelper_pipe
+EXPORT_SYMBOL vmlinux 0x9f100139	jiffies_to_clock_t
+EXPORT_SYMBOL vmlinux 0x9f2811c1	jbd2_journal_ack_err
+EXPORT_SYMBOL vmlinux 0x9f2bdaac	__bitmap_or
+EXPORT_SYMBOL vmlinux 0x9f2d613e	param_set_bool
+EXPORT_SYMBOL vmlinux 0x9f424093	free_user_ns
+EXPORT_SYMBOL vmlinux 0x9f4c13b8	key_alloc
+EXPORT_SYMBOL vmlinux 0x9f59a16e	dma_async_device_unregister
+EXPORT_SYMBOL vmlinux 0x9f636ca6	dquot_release
+EXPORT_SYMBOL vmlinux 0x9f698679	blk_get_backing_dev_info
+EXPORT_SYMBOL vmlinux 0x9f87bf5f	blk_rq_unmap_user
+EXPORT_SYMBOL vmlinux 0x9f8dba0d	key_unlink
+EXPORT_SYMBOL vmlinux 0x9f92efc4	mmiotrace_printk
+EXPORT_SYMBOL vmlinux 0x9f93c80e	pci_bus_alloc_resource
+EXPORT_SYMBOL vmlinux 0x9f984513	strrchr
+EXPORT_SYMBOL vmlinux 0x9fa274b4	dq_data_lock
+EXPORT_SYMBOL vmlinux 0x9fd04470	netpoll_print_options
+EXPORT_SYMBOL vmlinux 0x9fe9da78	ethtool_op_get_ufo
+EXPORT_SYMBOL vmlinux 0xa02d1971	sock_no_listen
+EXPORT_SYMBOL vmlinux 0xa03523d5	security_unix_stream_connect
+EXPORT_SYMBOL vmlinux 0xa0366540	md_integrity_register
+EXPORT_SYMBOL vmlinux 0xa04a01bd	qdisc_class_hash_insert
+EXPORT_SYMBOL vmlinux 0xa05c03df	mempool_kmalloc
+EXPORT_SYMBOL vmlinux 0xa06a46d3	nf_unregister_queue_handler
+EXPORT_SYMBOL vmlinux 0xa0799345	iget_failed
+EXPORT_SYMBOL vmlinux 0xa08b8c42	dquot_transfer
+EXPORT_SYMBOL vmlinux 0xa08c6a7a	create_mnt_ns
+EXPORT_SYMBOL vmlinux 0xa09e4602	inet_accept
+EXPORT_SYMBOL vmlinux 0xa0a3103e	d_instantiate
+EXPORT_SYMBOL vmlinux 0xa0a474a7	journal_try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0xa0a4ac21	tcf_hash_insert
+EXPORT_SYMBOL vmlinux 0xa0b04675	vmalloc_32
+EXPORT_SYMBOL vmlinux 0xa0b4a6a1	remove_arg_zero
+EXPORT_SYMBOL vmlinux 0xa0c36e83	is_bad_inode
+EXPORT_SYMBOL vmlinux 0xa0ceef51	out_of_line_wait_on_bit
+EXPORT_SYMBOL vmlinux 0xa0d3d560	ksize
+EXPORT_SYMBOL vmlinux 0xa0df3e70	xfrm_policy_delete
+EXPORT_SYMBOL vmlinux 0xa0ecb649	locks_remove_posix
+EXPORT_SYMBOL vmlinux 0xa0fbac79	wake_up_bit
+EXPORT_SYMBOL vmlinux 0xa1012177	mb_cache_entry_free
+EXPORT_SYMBOL vmlinux 0xa1034176	acpi_match_device_ids
+EXPORT_SYMBOL vmlinux 0xa108eb4d	sysctl_optmem_max
+EXPORT_SYMBOL vmlinux 0xa120d33c	tty_unregister_ldisc
+EXPORT_SYMBOL vmlinux 0xa13798f8	printk_ratelimit
+EXPORT_SYMBOL vmlinux 0xa171b92f	f_setown
+EXPORT_SYMBOL vmlinux 0xa18ccfbb	udp_lib_getsockopt
+EXPORT_SYMBOL vmlinux 0xa18d6a1c	jbd2_journal_revoke
+EXPORT_SYMBOL vmlinux 0xa18ef6f2	pci_enable_device_mem
+EXPORT_SYMBOL vmlinux 0xa1b759ce	fb_add_videomode
+EXPORT_SYMBOL vmlinux 0xa1ba4b95	memcpy_fromiovecend
+EXPORT_SYMBOL vmlinux 0xa1c76e0a	_cond_resched
+EXPORT_SYMBOL vmlinux 0xa1ce4c2d	blk_end_request_cur
+EXPORT_SYMBOL vmlinux 0xa1cea0b8	proc_dointvec
+EXPORT_SYMBOL vmlinux 0xa207c239	bio_copy_user
+EXPORT_SYMBOL vmlinux 0xa20ce1b8	net_msg_warn
+EXPORT_SYMBOL vmlinux 0xa21d2345	stop_tty
+EXPORT_SYMBOL vmlinux 0xa2263d7c	generic_unplug_device
+EXPORT_SYMBOL vmlinux 0xa246b161	jbd2_journal_set_features
+EXPORT_SYMBOL vmlinux 0xa2576d65	prepare_binprm
+EXPORT_SYMBOL vmlinux 0xa268a4d1	input_register_handle
+EXPORT_SYMBOL vmlinux 0xa2782320	dm_put_device
+EXPORT_SYMBOL vmlinux 0xa28e76e6	schedule_work
+EXPORT_SYMBOL vmlinux 0xa29b1708	tcp_memory_allocated
+EXPORT_SYMBOL vmlinux 0xa2a1e5c9	_write_lock_bh
+EXPORT_SYMBOL vmlinux 0xa2a5fd77	inet_ehash_secret
+EXPORT_SYMBOL vmlinux 0xa2b8a2ba	__init_rwsem
+EXPORT_SYMBOL vmlinux 0xa2ccf767	blk_queue_bounce
+EXPORT_SYMBOL vmlinux 0xa31f172d	__copy_from_user_inatomic
+EXPORT_SYMBOL vmlinux 0xa324bc31	elevator_init
+EXPORT_SYMBOL vmlinux 0xa329f07e	register_shrinker
+EXPORT_SYMBOL vmlinux 0xa332cdd1	security_tun_dev_attach
+EXPORT_SYMBOL vmlinux 0xa33f7c7c	nla_strlcpy
+EXPORT_SYMBOL vmlinux 0xa350a8f8	set_memory_array_uc
+EXPORT_SYMBOL vmlinux 0xa35de80f	ipv4_config
+EXPORT_SYMBOL vmlinux 0xa373570e	dm_dirty_log_type_register
+EXPORT_SYMBOL vmlinux 0xa3749cab	unregister_sysctl_table
+EXPORT_SYMBOL vmlinux 0xa39fbd35	simple_fsync
+EXPORT_SYMBOL vmlinux 0xa3a5be95	memmove
+EXPORT_SYMBOL vmlinux 0xa3bbcd80	acpi_set_gpe_type
+EXPORT_SYMBOL vmlinux 0xa3d0d641	blk_init_queue_node
+EXPORT_SYMBOL vmlinux 0xa415b384	try_to_del_timer_sync
+EXPORT_SYMBOL vmlinux 0xa41f9a8f	igrab
+EXPORT_SYMBOL vmlinux 0xa449798a	neigh_table_clear
+EXPORT_SYMBOL vmlinux 0xa44ad274	wait_for_completion_interruptible_timeout
+EXPORT_SYMBOL vmlinux 0xa47b47fc	module_refcount
+EXPORT_SYMBOL vmlinux 0xa480d2a4	clip_tbl_hook
+EXPORT_SYMBOL vmlinux 0xa4b94fea	iowrite8_rep
+EXPORT_SYMBOL vmlinux 0xa4bde9e5	key_type_keyring
+EXPORT_SYMBOL vmlinux 0xa4d4f0e6	global_cache_flush
+EXPORT_SYMBOL vmlinux 0xa4df7f60	pci_unregister_driver
+EXPORT_SYMBOL vmlinux 0xa4eb6c8b	sock_i_uid
+EXPORT_SYMBOL vmlinux 0xa50a9ee0	pci_dev_get
+EXPORT_SYMBOL vmlinux 0xa56f1315	mempool_free
+EXPORT_SYMBOL vmlinux 0xa5808bbf	tasklet_init
+EXPORT_SYMBOL vmlinux 0xa58b6804	nla_parse
+EXPORT_SYMBOL vmlinux 0xa5922bb1	kfifo_init
+EXPORT_SYMBOL vmlinux 0xa598e29c	vesa_modes
+EXPORT_SYMBOL vmlinux 0xa59dbbdc	vlan_dev_vlan_id
+EXPORT_SYMBOL vmlinux 0xa5adbe8c	ida_destroy
+EXPORT_SYMBOL vmlinux 0xa5bbf77f	d_lookup
+EXPORT_SYMBOL vmlinux 0xa5f73da7	noop_qdisc
+EXPORT_SYMBOL vmlinux 0xa5f7c25a	journal_dirty_metadata
+EXPORT_SYMBOL vmlinux 0xa5fc1b2c	install_exec_creds
+EXPORT_SYMBOL vmlinux 0xa5fc669d	input_flush_device
+EXPORT_SYMBOL vmlinux 0xa61055ce	dma_find_channel
+EXPORT_SYMBOL vmlinux 0xa617b15f	simple_sync_file
+EXPORT_SYMBOL vmlinux 0xa626b73e	dget_locked
+EXPORT_SYMBOL vmlinux 0xa63d85ab	slhc_remember
+EXPORT_SYMBOL vmlinux 0xa65070bc	inet_listen
+EXPORT_SYMBOL vmlinux 0xa65869bc	netif_device_detach
+EXPORT_SYMBOL vmlinux 0xa663ddef	blk_queue_find_tag
+EXPORT_SYMBOL vmlinux 0xa68124fa	hweight8
+EXPORT_SYMBOL vmlinux 0xa681fe88	generate_random_uuid
+EXPORT_SYMBOL vmlinux 0xa6b64078	vfs_read
+EXPORT_SYMBOL vmlinux 0xa6cc0e5f	blk_init_queue
+EXPORT_SYMBOL vmlinux 0xa6dcc773	rb_insert_color
+EXPORT_SYMBOL vmlinux 0xa6ec6f2d	blk_integrity_compare
+EXPORT_SYMBOL vmlinux 0xa6fc8e0a	dquot_free_inode
+EXPORT_SYMBOL vmlinux 0xa7052f9f	acpi_root_dir
+EXPORT_SYMBOL vmlinux 0xa70913e8	textsearch_find_continuous
+EXPORT_SYMBOL vmlinux 0xa70fabbe	release_evntsel_nmi
+EXPORT_SYMBOL vmlinux 0xa7100878	vfs_quota_enable
+EXPORT_SYMBOL vmlinux 0xa71f8cde	do_splice_from
+EXPORT_SYMBOL vmlinux 0xa72a0f5b	nr_online_nodes
+EXPORT_SYMBOL vmlinux 0xa773d207	ethtool_op_set_tx_ipv6_csum
+EXPORT_SYMBOL vmlinux 0xa786950e	get_user_pages
+EXPORT_SYMBOL vmlinux 0xa78b569e	__lock_buffer
+EXPORT_SYMBOL vmlinux 0xa7949cd9	pci_bus_set_ops
+EXPORT_SYMBOL vmlinux 0xa7a358f2	blk_sync_queue
+EXPORT_SYMBOL vmlinux 0xa7aa1548	swiotlb_sync_single_for_cpu
+EXPORT_SYMBOL vmlinux 0xa7aaeea1	mb_cache_entry_get
+EXPORT_SYMBOL vmlinux 0xa7c221ce	tty_hangup
+EXPORT_SYMBOL vmlinux 0xa7ca9322	do_sync_read
+EXPORT_SYMBOL vmlinux 0xa7e69a48	tcp_init_xmit_timers
+EXPORT_SYMBOL vmlinux 0xa835ae44	tty_port_close
+EXPORT_SYMBOL vmlinux 0xa8532866	vm_insert_pfn
+EXPORT_SYMBOL vmlinux 0xa869bab8	neigh_seq_stop
+EXPORT_SYMBOL vmlinux 0xa8850c29	journal_init_dev
+EXPORT_SYMBOL vmlinux 0xa886a958	krealloc
+EXPORT_SYMBOL vmlinux 0xa888b302	tty_set_operations
+EXPORT_SYMBOL vmlinux 0xa8a6f639	__check_region
+EXPORT_SYMBOL vmlinux 0xa8ac2ac3	udplite_prot
+EXPORT_SYMBOL vmlinux 0xa8bf6889	registered_fb
+EXPORT_SYMBOL vmlinux 0xa8caca96	key_put
+EXPORT_SYMBOL vmlinux 0xa8d22cd3	keyring_search
+EXPORT_SYMBOL vmlinux 0xa8d68abd	acpi_warning
+EXPORT_SYMBOL vmlinux 0xa8d7a5f1	__kill_fasync
+EXPORT_SYMBOL vmlinux 0xa8fbb54c	journal_stop
+EXPORT_SYMBOL vmlinux 0xa8fbf582	idr_replace
+EXPORT_SYMBOL vmlinux 0xa8fef7bb	security_unix_may_send
+EXPORT_SYMBOL vmlinux 0xa9012f32	scsi_init_io
+EXPORT_SYMBOL vmlinux 0xa90c4971	unregister_binfmt
+EXPORT_SYMBOL vmlinux 0xa91b5561	acpi_video_backlight_support
+EXPORT_SYMBOL vmlinux 0xa990a71f	__neigh_event_send
+EXPORT_SYMBOL vmlinux 0xa999a985	dev_set_mtu
+EXPORT_SYMBOL vmlinux 0xa99ce956	init_buffer
+EXPORT_SYMBOL vmlinux 0xa9bd2676	__vmalloc
+EXPORT_SYMBOL vmlinux 0xa9d59dcb	__module_put_and_exit
+EXPORT_SYMBOL vmlinux 0xa9d70ae5	qdisc_watchdog_cancel
+EXPORT_SYMBOL vmlinux 0xa9f847ee	kernel_sock_ioctl
+EXPORT_SYMBOL vmlinux 0xa9f9d067	block_prepare_write
+EXPORT_SYMBOL vmlinux 0xa9fafcb2	scsi_device_lookup
+EXPORT_SYMBOL vmlinux 0xa9fcf31d	wait_for_completion_interruptible
+EXPORT_SYMBOL vmlinux 0xaa0902cb	phy_attach
+EXPORT_SYMBOL vmlinux 0xaa1be8f6	tty_port_close_end
+EXPORT_SYMBOL vmlinux 0xaa4f7fbc	dst_release
+EXPORT_SYMBOL vmlinux 0xaa5075d7	netlink_unicast
+EXPORT_SYMBOL vmlinux 0xaa53d16e	register_sysctl_table
+EXPORT_SYMBOL vmlinux 0xaa6a3e8c	__set_page_dirty_nobuffers
+EXPORT_SYMBOL vmlinux 0xaa837e88	qdisc_destroy
+EXPORT_SYMBOL vmlinux 0xaa84a8ae	acpi_processor_power_init_bm_check
+EXPORT_SYMBOL vmlinux 0xaab06af8	_write_lock_irqsave
+EXPORT_SYMBOL vmlinux 0xaabb6bea	tty_port_init
+EXPORT_SYMBOL vmlinux 0xaabbbc4f	phy_stop_interrupts
+EXPORT_SYMBOL vmlinux 0xaaca670e	filemap_write_and_wait
+EXPORT_SYMBOL vmlinux 0xaae8ab0e	acpi_bus_power_manageable
+EXPORT_SYMBOL vmlinux 0xaaf45875	acpi_lid_notifier_unregister
+EXPORT_SYMBOL vmlinux 0xaafdc258	strcasecmp
+EXPORT_SYMBOL vmlinux 0xab2ce17c	tcp_shutdown
+EXPORT_SYMBOL vmlinux 0xab600421	probe_irq_off
+EXPORT_SYMBOL vmlinux 0xab65ed80	set_memory_uc
+EXPORT_SYMBOL vmlinux 0xab770678	rdmsr_safe_regs_on_cpu
+EXPORT_SYMBOL vmlinux 0xaba9ff34	allocate_resource
+EXPORT_SYMBOL vmlinux 0xabb50bdb	agp_generic_destroy_page
+EXPORT_SYMBOL vmlinux 0xabd0c91c	rtc_time_to_tm
+EXPORT_SYMBOL vmlinux 0xabd159cb	__scsi_alloc_queue
+EXPORT_SYMBOL vmlinux 0xabd360db	pci_set_power_state
+EXPORT_SYMBOL vmlinux 0xabd3ffb9	agp_generic_create_gatt_table
+EXPORT_SYMBOL vmlinux 0xabe85a21	idr_init
+EXPORT_SYMBOL vmlinux 0xabef257b	jbd2_journal_release_buffer
+EXPORT_SYMBOL vmlinux 0xac0ba8c1	blk_iopoll_disable
+EXPORT_SYMBOL vmlinux 0xac383451	radix_tree_tag_clear
+EXPORT_SYMBOL vmlinux 0xac58ea5e	acpi_unload_table_id
+EXPORT_SYMBOL vmlinux 0xac6794a7	seq_write
+EXPORT_SYMBOL vmlinux 0xac6855b0	gen_kill_estimator
+EXPORT_SYMBOL vmlinux 0xac76fb11	pcim_iomap_regions
+EXPORT_SYMBOL vmlinux 0xac8fb3b4	__neigh_for_each_release
+EXPORT_SYMBOL vmlinux 0xac97fe6e	journal_release_buffer
+EXPORT_SYMBOL vmlinux 0xaccabc6a	in4_pton
+EXPORT_SYMBOL vmlinux 0xaccc929f	blk_rq_map_user
+EXPORT_SYMBOL vmlinux 0xacd7db36	inet6_release
+EXPORT_SYMBOL vmlinux 0xacdeb154	__tracepoint_module_get
+EXPORT_SYMBOL vmlinux 0xacf4d843	match_strdup
+EXPORT_SYMBOL vmlinux 0xacf565ba	load_nls
+EXPORT_SYMBOL vmlinux 0xad0413d4	match_hex
+EXPORT_SYMBOL vmlinux 0xad100f0b	sk_stream_wait_connect
+EXPORT_SYMBOL vmlinux 0xad13c689	acpi_os_execute
+EXPORT_SYMBOL vmlinux 0xad25fb12	__memcpy
+EXPORT_SYMBOL vmlinux 0xad6b0d82	kmem_cache_shrink
+EXPORT_SYMBOL vmlinux 0xad6bc591	fput
+EXPORT_SYMBOL vmlinux 0xad8de1b3	acpi_remove_address_space_handler
+EXPORT_SYMBOL vmlinux 0xad8f6e10	generic_block_fiemap
+EXPORT_SYMBOL vmlinux 0xad9f4db6	pci_get_subsys
+EXPORT_SYMBOL vmlinux 0xada8058f	vfs_quota_off
+EXPORT_SYMBOL vmlinux 0xadaa2657	cpufreq_register_notifier
+EXPORT_SYMBOL vmlinux 0xaddd4bd2	rtnl_create_link
+EXPORT_SYMBOL vmlinux 0xadeb98b7	tcp_ioctl
+EXPORT_SYMBOL vmlinux 0xae4f209c	skb_recycle_check
+EXPORT_SYMBOL vmlinux 0xae890ad2	ip6_xmit
+EXPORT_SYMBOL vmlinux 0xae8e83e9	simple_transaction_get
+EXPORT_SYMBOL vmlinux 0xaec41102	agp_collect_device_status
+EXPORT_SYMBOL vmlinux 0xaed013b9	posix_acl_valid
+EXPORT_SYMBOL vmlinux 0xaf3dd7dc	scsi_logging_level
+EXPORT_SYMBOL vmlinux 0xaf6e5e61	gnet_stats_finish_copy
+EXPORT_SYMBOL vmlinux 0xaf73f1b4	__break_lease
+EXPORT_SYMBOL vmlinux 0xaf98a8e3	dev_add_pack
+EXPORT_SYMBOL vmlinux 0xafe82e10	strcspn
+EXPORT_SYMBOL vmlinux 0xaff90e09	pci_back_from_sleep
+EXPORT_SYMBOL vmlinux 0xb00ef5ac	proc_doulongvec_ms_jiffies_minmax
+EXPORT_SYMBOL vmlinux 0xb0114f5a	simple_link
+EXPORT_SYMBOL vmlinux 0xb014ac10	do_SAK
+EXPORT_SYMBOL vmlinux 0xb0203ac9	pci_pme_active
+EXPORT_SYMBOL vmlinux 0xb02b866c	uart_match_port
+EXPORT_SYMBOL vmlinux 0xb04ea8f0	agp_rebind_memory
+EXPORT_SYMBOL vmlinux 0xb051909f	ida_init
+EXPORT_SYMBOL vmlinux 0xb055d8da	posix_acl_to_xattr
+EXPORT_SYMBOL vmlinux 0xb06f37c8	swiotlb_sync_sg_for_device
+EXPORT_SYMBOL vmlinux 0xb07dfb3d	acpi_remove_gpe_handler
+EXPORT_SYMBOL vmlinux 0xb08b8827	inet_register_protosw
+EXPORT_SYMBOL vmlinux 0xb09486f3	km_policy_expired
+EXPORT_SYMBOL vmlinux 0xb097a68c	unmap_underlying_metadata
+EXPORT_SYMBOL vmlinux 0xb0a5091a	dev_disable_lro
+EXPORT_SYMBOL vmlinux 0xb0a94457	generic_write_end
+EXPORT_SYMBOL vmlinux 0xb0b847ac	__bitmap_full
+EXPORT_SYMBOL vmlinux 0xb0b8f4c4	__sk_dst_check
+EXPORT_SYMBOL vmlinux 0xb0baeaed	set_user_nice
+EXPORT_SYMBOL vmlinux 0xb0ce26b3	generic_file_buffered_write
+EXPORT_SYMBOL vmlinux 0xb0df0f46	vfs_quota_on_mount
+EXPORT_SYMBOL vmlinux 0xb0e10781	get_option
+EXPORT_SYMBOL vmlinux 0xb0fe5e63	eth_header_cache_update
+EXPORT_SYMBOL vmlinux 0xb101037b	mdio_bus_type
+EXPORT_SYMBOL vmlinux 0xb1096f88	kick_iocb
+EXPORT_SYMBOL vmlinux 0xb111be59	scsi_host_get
+EXPORT_SYMBOL vmlinux 0xb11fa1ce	strlcat
+EXPORT_SYMBOL vmlinux 0xb121390a	probe_irq_on
+EXPORT_SYMBOL vmlinux 0xb133fdeb	__alloc_pages_nodemask
+EXPORT_SYMBOL vmlinux 0xb1355634	qdisc_calculate_pkt_len
+EXPORT_SYMBOL vmlinux 0xb1612c9d	ip_mc_join_group
+EXPORT_SYMBOL vmlinux 0xb1645a2e	sg_free_table
+EXPORT_SYMBOL vmlinux 0xb165ceb1	path_get
+EXPORT_SYMBOL vmlinux 0xb175ff39	inet_csk_clear_xmit_timers
+EXPORT_SYMBOL vmlinux 0xb17a36bc	__nla_put
+EXPORT_SYMBOL vmlinux 0xb18e02c3	radix_tree_gang_lookup_tag
+EXPORT_SYMBOL vmlinux 0xb1907b70	destroy_EII_client
+EXPORT_SYMBOL vmlinux 0xb19760c3	bitmap_onto
+EXPORT_SYMBOL vmlinux 0xb1984ace	compat_sock_get_timestampns
+EXPORT_SYMBOL vmlinux 0xb1c3a01a	oops_in_progress
+EXPORT_SYMBOL vmlinux 0xb1cfad22	rdmsr_on_cpu
+EXPORT_SYMBOL vmlinux 0xb1d78986	page_symlink_inode_operations
+EXPORT_SYMBOL vmlinux 0xb1f975aa	unlock_kernel
+EXPORT_SYMBOL vmlinux 0xb20cd9e3	tcp_proc_register
+EXPORT_SYMBOL vmlinux 0xb20ecf88	acpi_run_osc
+EXPORT_SYMBOL vmlinux 0xb219d56c	wbinvd_on_cpu
+EXPORT_SYMBOL vmlinux 0xb224fbe2	param_get_short
+EXPORT_SYMBOL vmlinux 0xb22fe6a3	netdev_increment_features
+EXPORT_SYMBOL vmlinux 0xb2682405	utf8_to_utf32
+EXPORT_SYMBOL vmlinux 0xb279da12	pv_lock_ops
+EXPORT_SYMBOL vmlinux 0xb28c8229	sync_blockdev
+EXPORT_SYMBOL vmlinux 0xb2b14a77	netif_carrier_on
+EXPORT_SYMBOL vmlinux 0xb2e55898	cpu_possible_mask
+EXPORT_SYMBOL vmlinux 0xb2ecb7f2	udp_disconnect
+EXPORT_SYMBOL vmlinux 0xb2fd5ceb	__put_user_4
+EXPORT_SYMBOL vmlinux 0xb30d3c96	blk_queue_max_sectors
+EXPORT_SYMBOL vmlinux 0xb3205415	wait_for_completion_killable
+EXPORT_SYMBOL vmlinux 0xb3284531	acpi_dbg_layer
+EXPORT_SYMBOL vmlinux 0xb34d4c2e	acpi_terminate
+EXPORT_SYMBOL vmlinux 0xb34f9d88	xfrm_lookup
+EXPORT_SYMBOL vmlinux 0xb352177e	find_first_bit
+EXPORT_SYMBOL vmlinux 0xb3687af3	netdev_bonding_change
+EXPORT_SYMBOL vmlinux 0xb36d0e7f	acpi_bus_get_status
+EXPORT_SYMBOL vmlinux 0xb3946ef3	mmc_card_can_sleep
+EXPORT_SYMBOL vmlinux 0xb397e54e	swiotlb_alloc_coherent
+EXPORT_SYMBOL vmlinux 0xb3994c7a	per_cpu__kstat
+EXPORT_SYMBOL vmlinux 0xb3a307c6	si_meminfo
+EXPORT_SYMBOL vmlinux 0xb3c42c94	per_cpu__x86_bios_cpu_apicid
+EXPORT_SYMBOL vmlinux 0xb3d89a96	dm_dirty_log_type_unregister
+EXPORT_SYMBOL vmlinux 0xb3ff1f69	free_pages_exact
+EXPORT_SYMBOL vmlinux 0xb423dba1	console_blanked
+EXPORT_SYMBOL vmlinux 0xb42453d3	param_get_invbool
+EXPORT_SYMBOL vmlinux 0xb4279ab7	downgrade_write
+EXPORT_SYMBOL vmlinux 0xb4390f9a	mcount
+EXPORT_SYMBOL vmlinux 0xb44212f9	acpi_device_hid
+EXPORT_SYMBOL vmlinux 0xb45b24f6	k8_nb_ids
+EXPORT_SYMBOL vmlinux 0xb4709322	scsi_dev_info_add_list
+EXPORT_SYMBOL vmlinux 0xb48783a4	call_usermodehelper_setup
+EXPORT_SYMBOL vmlinux 0xb49d3bce	vga_set_legacy_decoding
+EXPORT_SYMBOL vmlinux 0xb4b0ee4e	down_read
+EXPORT_SYMBOL vmlinux 0xb4b491f6	__starget_for_each_device
+EXPORT_SYMBOL vmlinux 0xb4ca9447	__kfifo_get
+EXPORT_SYMBOL vmlinux 0xb4cc9939	md_register_thread
+EXPORT_SYMBOL vmlinux 0xb4def5ac	simple_rename
+EXPORT_SYMBOL vmlinux 0xb5044271	vsscanf
+EXPORT_SYMBOL vmlinux 0xb512c036	read_cache_pages
+EXPORT_SYMBOL vmlinux 0xb523ecaa	seq_printf
+EXPORT_SYMBOL vmlinux 0xb54533f7	usecs_to_jiffies
+EXPORT_SYMBOL vmlinux 0xb596f91c	skb_append
+EXPORT_SYMBOL vmlinux 0xb59e0375	vfs_create
+EXPORT_SYMBOL vmlinux 0xb5a459dc	unregister_blkdev
+EXPORT_SYMBOL vmlinux 0xb5c2b94c	bitmap_start_sync
+EXPORT_SYMBOL vmlinux 0xb5ca1c46	slhc_free
+EXPORT_SYMBOL vmlinux 0xb5cc0828	mmc_host_enable
+EXPORT_SYMBOL vmlinux 0xb5cef264	journal_check_available_features
+EXPORT_SYMBOL vmlinux 0xb5d52c27	ec_transaction
+EXPORT_SYMBOL vmlinux 0xb5f28b5f	__any_online_cpu
+EXPORT_SYMBOL vmlinux 0xb611fb71	generic_file_aio_read
+EXPORT_SYMBOL vmlinux 0xb6244511	sg_init_one
+EXPORT_SYMBOL vmlinux 0xb6327ff2	vm_insert_mixed
+EXPORT_SYMBOL vmlinux 0xb6353555	per_cpu__x86_cpu_to_apicid
+EXPORT_SYMBOL vmlinux 0xb656ef05	bio_kmalloc
+EXPORT_SYMBOL vmlinux 0xb678366f	int_sqrt
+EXPORT_SYMBOL vmlinux 0xb68cc290	simple_transaction_set
+EXPORT_SYMBOL vmlinux 0xb6a61a86	qdisc_get_rtab
+EXPORT_SYMBOL vmlinux 0xb6a68816	find_last_bit
+EXPORT_SYMBOL vmlinux 0xb6bffb99	kstat_irqs_cpu
+EXPORT_SYMBOL vmlinux 0xb6c5a973	scsi_show_result
+EXPORT_SYMBOL vmlinux 0xb6cbe886	acpi_get_node
+EXPORT_SYMBOL vmlinux 0xb6d08113	compat_mc_getsockopt
+EXPORT_SYMBOL vmlinux 0xb6e227aa	rtc_lock
+EXPORT_SYMBOL vmlinux 0xb719e602	nf_ip6_checksum
+EXPORT_SYMBOL vmlinux 0xb7256063	posix_lock_file_wait
+EXPORT_SYMBOL vmlinux 0xb73e42fa	starget_for_each_device
+EXPORT_SYMBOL vmlinux 0xb758b225	acpi_disable_event
+EXPORT_SYMBOL vmlinux 0xb76c56f6	mmc_wait_for_req
+EXPORT_SYMBOL vmlinux 0xb79254a5	scsi_eh_restore_cmnd
+EXPORT_SYMBOL vmlinux 0xb7942e31	dev_get_flags
+EXPORT_SYMBOL vmlinux 0xb798b8e4	flow_cache_lookup
+EXPORT_SYMBOL vmlinux 0xb7c6a8c9	bdev_stack_limits
+EXPORT_SYMBOL vmlinux 0xb7ccb3c7	twl4030_i2c_read_u8
+EXPORT_SYMBOL vmlinux 0xb7d7c136	close_bdev_exclusive
+EXPORT_SYMBOL vmlinux 0xb7f14362	__skb_checksum_complete
+EXPORT_SYMBOL vmlinux 0xb807c6c5	submit_bio
+EXPORT_SYMBOL vmlinux 0xb811c171	security_inode_permission
+EXPORT_SYMBOL vmlinux 0xb813ce5a	timecompare_transform
+EXPORT_SYMBOL vmlinux 0xb81cf266	filemap_fdatawait_range
+EXPORT_SYMBOL vmlinux 0xb81d3926	bio_init
+EXPORT_SYMBOL vmlinux 0xb8320d02	udp_flush_pending_frames
+EXPORT_SYMBOL vmlinux 0xb839029c	elv_rb_add
+EXPORT_SYMBOL vmlinux 0xb86e4ab9	random32
+EXPORT_SYMBOL vmlinux 0xb88568ba	swiotlb_unmap_sg
+EXPORT_SYMBOL vmlinux 0xb893e46c	tty_port_carrier_raised
+EXPORT_SYMBOL vmlinux 0xb89af9bf	srandom32
+EXPORT_SYMBOL vmlinux 0xb8af87a0	mpage_writepages
+EXPORT_SYMBOL vmlinux 0xb8b1d78a	blk_put_request
+EXPORT_SYMBOL vmlinux 0xb8bd6293	fb_pan_display
+EXPORT_SYMBOL vmlinux 0xb8cf4ac8	jbd2_journal_restart
+EXPORT_SYMBOL vmlinux 0xb8e7ce2c	__put_user_8
+EXPORT_SYMBOL vmlinux 0xb8f6bc42	scsi_add_device
+EXPORT_SYMBOL vmlinux 0xb904be71	uart_write_wakeup
+EXPORT_SYMBOL vmlinux 0xb90f78a0	devm_ioport_map
+EXPORT_SYMBOL vmlinux 0xb91c1a83	scsi_free_command
+EXPORT_SYMBOL vmlinux 0xb94f671f	genphy_update_link
+EXPORT_SYMBOL vmlinux 0xb98a0185	rtc_tm_to_time
+EXPORT_SYMBOL vmlinux 0xb9af4775	alloc_etherdev_mq
+EXPORT_SYMBOL vmlinux 0xb9b2e986	phy_register_fixup_for_uid
+EXPORT_SYMBOL vmlinux 0xb9fd2205	add_efi_memmap
+EXPORT_SYMBOL vmlinux 0xb9fe8e20	ethtool_op_get_link
+EXPORT_SYMBOL vmlinux 0xba03ab8e	xfrm_input_resume
+EXPORT_SYMBOL vmlinux 0xba2d8594	ec_read
+EXPORT_SYMBOL vmlinux 0xba497f13	loops_per_jiffy
+EXPORT_SYMBOL vmlinux 0xba7b2290	zero_fill_bio
+EXPORT_SYMBOL vmlinux 0xba855fe1	tcp_md5_hash_header
+EXPORT_SYMBOL vmlinux 0xba8f2735	inet_release
+EXPORT_SYMBOL vmlinux 0xbaa2782a	kstrndup
+EXPORT_SYMBOL vmlinux 0xbaaab8ae	timespec_to_jiffies
+EXPORT_SYMBOL vmlinux 0xbb06b8d1	agp_alloc_page_array
+EXPORT_SYMBOL vmlinux 0xbb167766	fb_var_to_videomode
+EXPORT_SYMBOL vmlinux 0xbb189cad	disallow_signal
+EXPORT_SYMBOL vmlinux 0xbb1fad6a	flush_delayed_work
+EXPORT_SYMBOL vmlinux 0xbb251839	generic_cont_expand_simple
+EXPORT_SYMBOL vmlinux 0xbb3a24ff	pcie_get_readrq
+EXPORT_SYMBOL vmlinux 0xbb458f82	x86_dma_fallback_dev
+EXPORT_SYMBOL vmlinux 0xbb5d343d	xfrm_get_acqseq
+EXPORT_SYMBOL vmlinux 0xbb6dcf7c	napi_frags_finish
+EXPORT_SYMBOL vmlinux 0xbb783d89	scsi_remove_device
+EXPORT_SYMBOL vmlinux 0xbbe0aefc	dmam_free_coherent
+EXPORT_SYMBOL vmlinux 0xbbe39037	journal_extend
+EXPORT_SYMBOL vmlinux 0xbbf14e59	get_phy_device
+EXPORT_SYMBOL vmlinux 0xbc7c41d5	xfrm_state_delete_tunnel
+EXPORT_SYMBOL vmlinux 0xbcc308bb	strnlen_user
+EXPORT_SYMBOL vmlinux 0xbccbb49c	idr_remove_all
+EXPORT_SYMBOL vmlinux 0xbccdb1d2	blk_rq_map_user_iov
+EXPORT_SYMBOL vmlinux 0xbcd9fbeb	vfs_rename
+EXPORT_SYMBOL vmlinux 0xbcec0aa8	d_instantiate_unique
+EXPORT_SYMBOL vmlinux 0xbd0cd6a8	mmc_suspend_host
+EXPORT_SYMBOL vmlinux 0xbd270894	rfkill_set_hw_state
+EXPORT_SYMBOL vmlinux 0xbd2fd04e	__xfrm_state_destroy
+EXPORT_SYMBOL vmlinux 0xbd3505f8	scsi_remove_host
+EXPORT_SYMBOL vmlinux 0xbd4e6b8f	nobh_write_end
+EXPORT_SYMBOL vmlinux 0xbdaf5b07	acpi_os_read_port
+EXPORT_SYMBOL vmlinux 0xbdbe0e56	dma_set_mask
+EXPORT_SYMBOL vmlinux 0xbdc984d5	bdget
+EXPORT_SYMBOL vmlinux 0xbdf5c25c	rb_next
+EXPORT_SYMBOL vmlinux 0xbe1e3c58	udp_lib_setsockopt
+EXPORT_SYMBOL vmlinux 0xbe3bce03	xfrm_state_delete
+EXPORT_SYMBOL vmlinux 0xbe3f4b94	agp_free_page_array
+EXPORT_SYMBOL vmlinux 0xbe499d81	copy_to_user
+EXPORT_SYMBOL vmlinux 0xbe4be58e	scsi_target_quiesce
+EXPORT_SYMBOL vmlinux 0xbe58e340	agp_generic_insert_memory
+EXPORT_SYMBOL vmlinux 0xbe59127f	splice_from_pipe_end
+EXPORT_SYMBOL vmlinux 0xbe6565ea	tcp_splice_read
+EXPORT_SYMBOL vmlinux 0xbe6b17f7	textsearch_prepare
+EXPORT_SYMBOL vmlinux 0xbe78411d	km_state_notify
+EXPORT_SYMBOL vmlinux 0xbeb66826	posix_unblock_lock
+EXPORT_SYMBOL vmlinux 0xbecdce74	ida_pre_get
+EXPORT_SYMBOL vmlinux 0xbed7552b	pnp_start_dev
+EXPORT_SYMBOL vmlinux 0xbed89fe1	ethtool_op_set_ufo
+EXPORT_SYMBOL vmlinux 0xbef43296	console_conditional_schedule
+EXPORT_SYMBOL vmlinux 0xbf2a8d08	skb_pull
+EXPORT_SYMBOL vmlinux 0xbf2d3d9e	rfkill_get_led_trigger_name
+EXPORT_SYMBOL vmlinux 0xbf3c582a	sb_min_blocksize
+EXPORT_SYMBOL vmlinux 0xbf3e005b	mb_cache_entry_find_first
+EXPORT_SYMBOL vmlinux 0xbf4cfeb9	neigh_sysctl_register
+EXPORT_SYMBOL vmlinux 0xbf7fd2f5	schedule_timeout_killable
+EXPORT_SYMBOL vmlinux 0xbf8ce7a2	boot_cpu_data
+EXPORT_SYMBOL vmlinux 0xbf9bcc8d	__cap_empty_set
+EXPORT_SYMBOL vmlinux 0xbfbe725e	agp_generic_remove_memory
+EXPORT_SYMBOL vmlinux 0xbfc177bc	iowrite32_rep
+EXPORT_SYMBOL vmlinux 0xbfcd5404	generic_file_splice_write
+EXPORT_SYMBOL vmlinux 0xbfd8cf1f	vfs_fsync
+EXPORT_SYMBOL vmlinux 0xbfd99069	netif_rx
+EXPORT_SYMBOL vmlinux 0xbfee3ad5	loop_unregister_transfer
+EXPORT_SYMBOL vmlinux 0xc001aca7	rfkill_alloc
+EXPORT_SYMBOL vmlinux 0xc003c637	__strncpy_from_user
+EXPORT_SYMBOL vmlinux 0xc0044724	blk_set_default_limits
+EXPORT_SYMBOL vmlinux 0xc00486c8	scsi_target_resume
+EXPORT_SYMBOL vmlinux 0xc011ec72	textsearch_register
+EXPORT_SYMBOL vmlinux 0xc0580937	rb_erase
+EXPORT_SYMBOL vmlinux 0xc05ef80e	cap_netlink_recv
+EXPORT_SYMBOL vmlinux 0xc06509d1	init_file
+EXPORT_SYMBOL vmlinux 0xc07d43ae	acpi_evaluate_reference
+EXPORT_SYMBOL vmlinux 0xc09651d9	crc32_be
+EXPORT_SYMBOL vmlinux 0xc09acf5c	scsi_dma_unmap
+EXPORT_SYMBOL vmlinux 0xc0a3d105	find_next_bit
+EXPORT_SYMBOL vmlinux 0xc0bf6ead	timecounter_cyc2time
+EXPORT_SYMBOL vmlinux 0xc0c55ce0	kernel_sendpage
+EXPORT_SYMBOL vmlinux 0xc0d15904	inode_permission
+EXPORT_SYMBOL vmlinux 0xc10d4f6b	agp_generic_destroy_pages
+EXPORT_SYMBOL vmlinux 0xc10debed	ethtool_op_set_tx_csum
+EXPORT_SYMBOL vmlinux 0xc13bcae4	fb_blank
+EXPORT_SYMBOL vmlinux 0xc149c79b	ip_cmsg_recv
+EXPORT_SYMBOL vmlinux 0xc14c3f52	set_blocksize
+EXPORT_SYMBOL vmlinux 0xc18fa079	slow_work_cancel
+EXPORT_SYMBOL vmlinux 0xc1b8be14	phy_start
+EXPORT_SYMBOL vmlinux 0xc1d2f9ac	inet6_register_protosw
+EXPORT_SYMBOL vmlinux 0xc1f18cc5	pci_disable_msix
+EXPORT_SYMBOL vmlinux 0xc235eb34	ilookup
+EXPORT_SYMBOL vmlinux 0xc2424641	agp3_generic_cleanup
+EXPORT_SYMBOL vmlinux 0xc254af48	dcache_lock
+EXPORT_SYMBOL vmlinux 0xc256e762	__bitmap_equal
+EXPORT_SYMBOL vmlinux 0xc25704d9	iput
+EXPORT_SYMBOL vmlinux 0xc2a1873b	d_find_alias
+EXPORT_SYMBOL vmlinux 0xc2be9086	copy_io_context
+EXPORT_SYMBOL vmlinux 0xc2cd3a0a	scsicam_bios_param
+EXPORT_SYMBOL vmlinux 0xc2dab4a8	cdrom_get_media_event
+EXPORT_SYMBOL vmlinux 0xc2e463d3	rtnl_notify
+EXPORT_SYMBOL vmlinux 0xc2e587d1	reset_devices
+EXPORT_SYMBOL vmlinux 0xc32871e9	elv_rb_latter_request
+EXPORT_SYMBOL vmlinux 0xc33f6f4c	on_each_cpu
+EXPORT_SYMBOL vmlinux 0xc34a8df5	buffer_migrate_page
+EXPORT_SYMBOL vmlinux 0xc37038fa	tty_check_change
+EXPORT_SYMBOL vmlinux 0xc37e1d0a	__nla_reserve_nohdr
+EXPORT_SYMBOL vmlinux 0xc382660a	acpi_notifier_call_chain
+EXPORT_SYMBOL vmlinux 0xc390e690	md_wakeup_thread
+EXPORT_SYMBOL vmlinux 0xc394e3d6	skb_append_datato_frags
+EXPORT_SYMBOL vmlinux 0xc3a5c220	scsi_finish_command
+EXPORT_SYMBOL vmlinux 0xc3aaf0a9	__put_user_1
+EXPORT_SYMBOL vmlinux 0xc3aec665	bdi_init
+EXPORT_SYMBOL vmlinux 0xc3c6033a	pci_remove_bus
+EXPORT_SYMBOL vmlinux 0xc3db1ee1	start_tty
+EXPORT_SYMBOL vmlinux 0xc3f02a34	ip6_route_output
+EXPORT_SYMBOL vmlinux 0xc3f5cdb9	lock_rename
+EXPORT_SYMBOL vmlinux 0xc402cc99	register_acpi_notifier
+EXPORT_SYMBOL vmlinux 0xc420081d	blk_start_request
+EXPORT_SYMBOL vmlinux 0xc42765b4	elv_rq_merge_ok
+EXPORT_SYMBOL vmlinux 0xc427f37d	vfs_set_dqblk
+EXPORT_SYMBOL vmlinux 0xc456e061	cdrom_media_changed
+EXPORT_SYMBOL vmlinux 0xc464cc8f	cdrom_ioctl
+EXPORT_SYMBOL vmlinux 0xc46a6543	xfrm_unregister_type
+EXPORT_SYMBOL vmlinux 0xc499ae1e	kstrdup
+EXPORT_SYMBOL vmlinux 0xc4c4708d	__inc_zone_page_state
+EXPORT_SYMBOL vmlinux 0xc4d4584d	input_release_device
+EXPORT_SYMBOL vmlinux 0xc4d55a2c	blk_peek_request
+EXPORT_SYMBOL vmlinux 0xc4d73567	qdisc_tree_decrease_qlen
+EXPORT_SYMBOL vmlinux 0xc4d89569	vfs_follow_link
+EXPORT_SYMBOL vmlinux 0xc4e9c01c	cpu_active_mask
+EXPORT_SYMBOL vmlinux 0xc5230f65	register_md_personality
+EXPORT_SYMBOL vmlinux 0xc52db613	skb_push
+EXPORT_SYMBOL vmlinux 0xc52f5714	fb_videomode_to_var
+EXPORT_SYMBOL vmlinux 0xc536dfd5	find_vma
+EXPORT_SYMBOL vmlinux 0xc53c882d	idr_get_new
+EXPORT_SYMBOL vmlinux 0xc5534d64	ioread16
+EXPORT_SYMBOL vmlinux 0xc558530d	profile_pc
+EXPORT_SYMBOL vmlinux 0xc55f7dc7	_write_trylock
+EXPORT_SYMBOL vmlinux 0xc580cbbf	cont_write_begin
+EXPORT_SYMBOL vmlinux 0xc5824a1f	wireless_send_event
+EXPORT_SYMBOL vmlinux 0xc5844fb8	__per_cpu_offset
+EXPORT_SYMBOL vmlinux 0xc5a3176c	ppp_output_wakeup
+EXPORT_SYMBOL vmlinux 0xc5a597ca	posix_lock_file
+EXPORT_SYMBOL vmlinux 0xc5b41c34	lro_flush_all
+EXPORT_SYMBOL vmlinux 0xc5d9c46c	agp_try_unsupported_boot
+EXPORT_SYMBOL vmlinux 0xc5fb3dd6	mutex_lock
+EXPORT_SYMBOL vmlinux 0xc640e152	alloc_disk
+EXPORT_SYMBOL vmlinux 0xc64b6508	jbd2_journal_init_dev
+EXPORT_SYMBOL vmlinux 0xc65abeb7	agp3_generic_sizes
+EXPORT_SYMBOL vmlinux 0xc691b895	jbd2_journal_check_used_features
+EXPORT_SYMBOL vmlinux 0xc69afcf6	ipv6_chk_prefix
+EXPORT_SYMBOL vmlinux 0xc6b8fdb1	add_disk
+EXPORT_SYMBOL vmlinux 0xc6ba6a7f	bio_get_nr_vecs
+EXPORT_SYMBOL vmlinux 0xc6c3835a	do_sync_write
+EXPORT_SYMBOL vmlinux 0xc7167e26	generic_make_request
+EXPORT_SYMBOL vmlinux 0xc7208c3a	serial8250_resume_port
+EXPORT_SYMBOL vmlinux 0xc722227e	posix_acl_clone
+EXPORT_SYMBOL vmlinux 0xc73d3483	pci_request_regions
+EXPORT_SYMBOL vmlinux 0xc740c64a	memchr
+EXPORT_SYMBOL vmlinux 0xc799fd0a	sock_common_getsockopt
+EXPORT_SYMBOL vmlinux 0xc79bcd36	dm_vcalloc
+EXPORT_SYMBOL vmlinux 0xc7a24d76	sysfs_format_mac
+EXPORT_SYMBOL vmlinux 0xc7a4fbed	rtnl_lock
+EXPORT_SYMBOL vmlinux 0xc7b59c3c	pnp_unregister_card_driver
+EXPORT_SYMBOL vmlinux 0xc7d57979	alloc_netdev_mq
+EXPORT_SYMBOL vmlinux 0xc819f8ce	pnp_possible_config
+EXPORT_SYMBOL vmlinux 0xc856f189	vfs_quota_on_path
+EXPORT_SYMBOL vmlinux 0xc85ad975	simple_readpage
+EXPORT_SYMBOL vmlinux 0xc85f3e07	vga_get
+EXPORT_SYMBOL vmlinux 0xc863806a	security_sb_set_mnt_opts
+EXPORT_SYMBOL vmlinux 0xc8694c74	acpi_bus_generate_proc_event
+EXPORT_SYMBOL vmlinux 0xc872d82a	redirty_page_for_writepage
+EXPORT_SYMBOL vmlinux 0xc897c382	sg_init_table
+EXPORT_SYMBOL vmlinux 0xc8abf2fd	neigh_lookup_nodev
+EXPORT_SYMBOL vmlinux 0xc8b57c27	autoremove_wake_function
+EXPORT_SYMBOL vmlinux 0xc8ca3e25	acpi_get_child
+EXPORT_SYMBOL vmlinux 0xc8d17a65	thermal_cooling_device_unregister
+EXPORT_SYMBOL vmlinux 0xc8d526f5	__ht_create_irq
+EXPORT_SYMBOL vmlinux 0xc90b7716	drop_super
+EXPORT_SYMBOL vmlinux 0xc92e1750	netlink_set_err
+EXPORT_SYMBOL vmlinux 0xc971d43b	blk_alloc_queue_node
+EXPORT_SYMBOL vmlinux 0xc98ce8c2	journal_destroy
+EXPORT_SYMBOL vmlinux 0xc998d641	icmp_err_convert
+EXPORT_SYMBOL vmlinux 0xc9ab2eef	acpi_os_wait_events_complete
+EXPORT_SYMBOL vmlinux 0xc9c246dd	km_report
+EXPORT_SYMBOL vmlinux 0xc9e194e6	netif_napi_del
+EXPORT_SYMBOL vmlinux 0xc9e90e0f	xfrm4_prepare_output
+EXPORT_SYMBOL vmlinux 0xc9e9db44	pci_claim_resource
+EXPORT_SYMBOL vmlinux 0xc9ec8704	udp_table
+EXPORT_SYMBOL vmlinux 0xca490833	sock_common_setsockopt
+EXPORT_SYMBOL vmlinux 0xca5dbc50	scsi_print_sense_hdr
+EXPORT_SYMBOL vmlinux 0xca6b74b2	blk_integrity_unregister
+EXPORT_SYMBOL vmlinux 0xca7f8b41	jbd2_journal_dirty_metadata
+EXPORT_SYMBOL vmlinux 0xca8acc78	acpi_dbg_level
+EXPORT_SYMBOL vmlinux 0xcabdc0ac	simple_pin_fs
+EXPORT_SYMBOL vmlinux 0xcac440a1	vfs_unlink
+EXPORT_SYMBOL vmlinux 0xcac946bd	vfs_writev
+EXPORT_SYMBOL vmlinux 0xcaeac8bf	tty_port_free_xmit_buf
+EXPORT_SYMBOL vmlinux 0xcaf9ab85	nf_log_bind_pf
+EXPORT_SYMBOL vmlinux 0xcaff14a1	scsi_prep_return
+EXPORT_SYMBOL vmlinux 0xcb0a54e5	ppp_input_error
+EXPORT_SYMBOL vmlinux 0xcb319c7c	security_path_mkdir
+EXPORT_SYMBOL vmlinux 0xcb559bcf	inode_change_ok
+EXPORT_SYMBOL vmlinux 0xcb6beb40	hweight32
+EXPORT_SYMBOL vmlinux 0xcb7131fb	fb_get_options
+EXPORT_SYMBOL vmlinux 0xcb733bf2	acpi_bus_set_power
+EXPORT_SYMBOL vmlinux 0xcb8a4d75	ilookup5_nowait
+EXPORT_SYMBOL vmlinux 0xcbb9d7db	groups_free
+EXPORT_SYMBOL vmlinux 0xcbcc61d4	create_proc_entry
+EXPORT_SYMBOL vmlinux 0xcbd162a0	generic_show_options
+EXPORT_SYMBOL vmlinux 0xcbe23a13	dquot_release_reserved_space
+EXPORT_SYMBOL vmlinux 0xcbfcf2ca	tty_name
+EXPORT_SYMBOL vmlinux 0xcc07af75	strnlen
+EXPORT_SYMBOL vmlinux 0xcc08196a	scsi_cmd_print_sense_hdr
+EXPORT_SYMBOL vmlinux 0xcc248d26	serial8250_suspend_port
+EXPORT_SYMBOL vmlinux 0xcc33d0b8	inode_set_bytes
+EXPORT_SYMBOL vmlinux 0xcc36f32e	fb_unregister_client
+EXPORT_SYMBOL vmlinux 0xcc3f176f	per_cpu__x86_cpu_to_node_map
+EXPORT_SYMBOL vmlinux 0xcc5005fe	msleep_interruptible
+EXPORT_SYMBOL vmlinux 0xcc51ee50	dma_spin_lock
+EXPORT_SYMBOL vmlinux 0xcc52d4e8	rwsem_down_read_failed
+EXPORT_SYMBOL vmlinux 0xcc714941	end_buffer_async_write
+EXPORT_SYMBOL vmlinux 0xcc7fa952	local_bh_enable_ip
+EXPORT_SYMBOL vmlinux 0xcc80ff0a	swiotlb_sync_sg_for_cpu
+EXPORT_SYMBOL vmlinux 0xcc8a8718	dm_table_get_size
+EXPORT_SYMBOL vmlinux 0xccb6062c	key_link
+EXPORT_SYMBOL vmlinux 0xccd373d7	agp_generic_alloc_by_type
+EXPORT_SYMBOL vmlinux 0xccd675fc	i2c_release_client
+EXPORT_SYMBOL vmlinux 0xccdc409a	__xfrm_route_forward
+EXPORT_SYMBOL vmlinux 0xccf437f7	sock_init_data
+EXPORT_SYMBOL vmlinux 0xcd90fe6b	init_net
+EXPORT_SYMBOL vmlinux 0xcda4a65c	udp_prot
+EXPORT_SYMBOL vmlinux 0xcdf9e930	lock_fb_info
+EXPORT_SYMBOL vmlinux 0xcdfbee7b	rtc_dev_update_irq_enable_emul
+EXPORT_SYMBOL vmlinux 0xce19bac5	register_inet6addr_notifier
+EXPORT_SYMBOL vmlinux 0xce28ffd0	__mod_zone_page_state
+EXPORT_SYMBOL vmlinux 0xce36ded6	sysctl_tcp_mem
+EXPORT_SYMBOL vmlinux 0xce4904a4	acpi_leave_sleep_state
+EXPORT_SYMBOL vmlinux 0xce5ac24f	zlib_inflate_workspacesize
+EXPORT_SYMBOL vmlinux 0xce774c7c	dev_load
+EXPORT_SYMBOL vmlinux 0xce9079e2	nf_log_packet
+EXPORT_SYMBOL vmlinux 0xcef5f72e	bio_add_pc_page
+EXPORT_SYMBOL vmlinux 0xcef90d6e	fail_migrate_page
+EXPORT_SYMBOL vmlinux 0xcefcd99a	serial8250_unregister_port
+EXPORT_SYMBOL vmlinux 0xcf137365	set_binfmt
+EXPORT_SYMBOL vmlinux 0xcf1d28ab	acpi_error
+EXPORT_SYMBOL vmlinux 0xcf202b30	inet_stream_connect
+EXPORT_SYMBOL vmlinux 0xcf2a73d8	nla_put
+EXPORT_SYMBOL vmlinux 0xcf5cd00b	xfrm4_rcv
+EXPORT_SYMBOL vmlinux 0xcf6cfe1f	msrs_free
+EXPORT_SYMBOL vmlinux 0xcf6f73a8	ps2_end_command
+EXPORT_SYMBOL vmlinux 0xcf75808c	xfrm_state_update
+EXPORT_SYMBOL vmlinux 0xcf7f5b79	proc_create_data
+EXPORT_SYMBOL vmlinux 0xcfadd723	__percpu_counter_add
+EXPORT_SYMBOL vmlinux 0xcfb9006e	jiffies_to_timeval
+EXPORT_SYMBOL vmlinux 0xcfc4ac73	sb_set_blocksize
+EXPORT_SYMBOL vmlinux 0xcff53400	kref_put
+EXPORT_SYMBOL vmlinux 0xcfffc0ce	xfrm_cfg_mutex
+EXPORT_SYMBOL vmlinux 0xd00e8140	generic_write_sync
+EXPORT_SYMBOL vmlinux 0xd0181f4f	__bitmap_xor
+EXPORT_SYMBOL vmlinux 0xd08197fa	acpi_load_tables
+EXPORT_SYMBOL vmlinux 0xd0e12d9b	inet_csk_destroy_sock
+EXPORT_SYMBOL vmlinux 0xd0ee38b8	schedule_timeout_uninterruptible
+EXPORT_SYMBOL vmlinux 0xd0fa0528	nf_ip_checksum
+EXPORT_SYMBOL vmlinux 0xd0fef3b2	agp_free_key
+EXPORT_SYMBOL vmlinux 0xd12398d6	ip_route_input
+EXPORT_SYMBOL vmlinux 0xd12f0ee7	dev_addr_add
+EXPORT_SYMBOL vmlinux 0xd139eaa5	grab_cache_page_nowait
+EXPORT_SYMBOL vmlinux 0xd1472061	acpi_pci_register_driver
+EXPORT_SYMBOL vmlinux 0xd15f85d5	pci_set_dma_max_seg_size
+EXPORT_SYMBOL vmlinux 0xd1648503	tty_port_close_start
+EXPORT_SYMBOL vmlinux 0xd1757c80	tcp_recvmsg
+EXPORT_SYMBOL vmlinux 0xd1878c8c	mmc_power_save_host
+EXPORT_SYMBOL vmlinux 0xd18b6eb2	acpi_unmap_lsapic
+EXPORT_SYMBOL vmlinux 0xd19bb294	acpi_install_address_space_handler
+EXPORT_SYMBOL vmlinux 0xd1a51de8	generic_block_bmap
+EXPORT_SYMBOL vmlinux 0xd1c25efd	ip_queue_xmit
+EXPORT_SYMBOL vmlinux 0xd1c98040	cpufreq_get_policy
+EXPORT_SYMBOL vmlinux 0xd1f6c5f3	smp_num_siblings
+EXPORT_SYMBOL vmlinux 0xd1f91bcd	dev_base_lock
+EXPORT_SYMBOL vmlinux 0xd2235d73	clocksource_register
+EXPORT_SYMBOL vmlinux 0xd22c2144	generic_error_remove_page
+EXPORT_SYMBOL vmlinux 0xd22cc1f4	kernel_setsockopt
+EXPORT_SYMBOL vmlinux 0xd23945c4	ip_nat_decode_session
+EXPORT_SYMBOL vmlinux 0xd251d7b0	security_socket_getpeersec_dgram
+EXPORT_SYMBOL vmlinux 0xd2555f19	jiffies_64_to_clock_t
+EXPORT_SYMBOL vmlinux 0xd25d4f74	console_blank_hook
+EXPORT_SYMBOL vmlinux 0xd26254c9	napi_gro_flush
+EXPORT_SYMBOL vmlinux 0xd267d42c	down_killable
+EXPORT_SYMBOL vmlinux 0xd2707e27	xfrm_register_type
+EXPORT_SYMBOL vmlinux 0xd2858060	vc_cons
+EXPORT_SYMBOL vmlinux 0xd2965f6f	kthread_should_stop
+EXPORT_SYMBOL vmlinux 0xd2a75ee0	dmi_first_match
+EXPORT_SYMBOL vmlinux 0xd2a77c05	inet_shutdown
+EXPORT_SYMBOL vmlinux 0xd2b094e5	sock_no_sendpage
+EXPORT_SYMBOL vmlinux 0xd2bddf4f	block_truncate_page
+EXPORT_SYMBOL vmlinux 0xd2ea5006	tcf_em_tree_destroy
+EXPORT_SYMBOL vmlinux 0xd2f1e5cd	jbd2_journal_lock_updates
+EXPORT_SYMBOL vmlinux 0xd2f71c4f	pci_find_bus
+EXPORT_SYMBOL vmlinux 0xd34f0c62	gen_pool_create
+EXPORT_SYMBOL vmlinux 0xd3729966	scsi_host_alloc
+EXPORT_SYMBOL vmlinux 0xd3951da4	acpi_resource_to_address64
+EXPORT_SYMBOL vmlinux 0xd3996f0d	page_readlink
+EXPORT_SYMBOL vmlinux 0xd39b7027	inet_put_port
+EXPORT_SYMBOL vmlinux 0xd3a3df8a	proto_unregister
+EXPORT_SYMBOL vmlinux 0xd3a870da	input_event
+EXPORT_SYMBOL vmlinux 0xd3af979c	memdup_user
+EXPORT_SYMBOL vmlinux 0xd3f74cf1	interruptible_sleep_on_timeout
+EXPORT_SYMBOL vmlinux 0xd4140ffa	unregister_con_driver
+EXPORT_SYMBOL vmlinux 0xd42b7232	_write_unlock_bh
+EXPORT_SYMBOL vmlinux 0xd42c2b39	skb_free_datagram
+EXPORT_SYMBOL vmlinux 0xd44d4907	block_sync_page
+EXPORT_SYMBOL vmlinux 0xd4596a0f	simple_transaction_release
+EXPORT_SYMBOL vmlinux 0xd4752913	new_inode
+EXPORT_SYMBOL vmlinux 0xd488f642	do_splice_to
+EXPORT_SYMBOL vmlinux 0xd4c4ce79	simple_fill_super
+EXPORT_SYMBOL vmlinux 0xd4d7205d	clocksource_change_rating
+EXPORT_SYMBOL vmlinux 0xd504feb3	inode_newsize_ok
+EXPORT_SYMBOL vmlinux 0xd50fef48	acpi_detach_data
+EXPORT_SYMBOL vmlinux 0xd51cc572	scsi_bios_ptable
+EXPORT_SYMBOL vmlinux 0xd51fd7e7	bio_integrity_prep
+EXPORT_SYMBOL vmlinux 0xd5263820	mb_cache_destroy
+EXPORT_SYMBOL vmlinux 0xd5296b60	dev_get_drvdata
+EXPORT_SYMBOL vmlinux 0xd56b0f72	simple_getattr
+EXPORT_SYMBOL vmlinux 0xd57f8789	iommu_num_pages
+EXPORT_SYMBOL vmlinux 0xd5840104	dquot_reserve_space
+EXPORT_SYMBOL vmlinux 0xd58cfa61	console_stop
+EXPORT_SYMBOL vmlinux 0xd5c7c61d	sysctl_string
+EXPORT_SYMBOL vmlinux 0xd5d6b881	input_filter_device
+EXPORT_SYMBOL vmlinux 0xd5ea4462	__lookup_one_len
+EXPORT_SYMBOL vmlinux 0xd60c69e0	udp_proc_register
+EXPORT_SYMBOL vmlinux 0xd60d7af4	ida_remove
+EXPORT_SYMBOL vmlinux 0xd61d42a8	dmam_pool_destroy
+EXPORT_SYMBOL vmlinux 0xd62c833f	schedule_timeout
+EXPORT_SYMBOL vmlinux 0xd63a37da	dquot_commit
+EXPORT_SYMBOL vmlinux 0xd6574d39	iov_iter_copy_from_user_atomic
+EXPORT_SYMBOL vmlinux 0xd66fa85c	acpi_bus_get_device
+EXPORT_SYMBOL vmlinux 0xd699167a	ppp_input
+EXPORT_SYMBOL vmlinux 0xd6a78d08	smp_call_function_single
+EXPORT_SYMBOL vmlinux 0xd6b33026	cpu_khz
+EXPORT_SYMBOL vmlinux 0xd6c26b7e	do_mmap_pgoff
+EXPORT_SYMBOL vmlinux 0xd6cc2780	invalidate_bdev
+EXPORT_SYMBOL vmlinux 0xd6d68c6b	vm_stat
+EXPORT_SYMBOL vmlinux 0xd6ee688f	vmalloc
+EXPORT_SYMBOL vmlinux 0xd6fb3735	bitmap_end_sync
+EXPORT_SYMBOL vmlinux 0xd727f7d5	acpi_bus_start
+EXPORT_SYMBOL vmlinux 0xd776d599	set_create_files_as
+EXPORT_SYMBOL vmlinux 0xd77a5aa5	__bitmap_and
+EXPORT_SYMBOL vmlinux 0xd79b5a02	allow_signal
+EXPORT_SYMBOL vmlinux 0xd7a1ab79	kernel_getpeername
+EXPORT_SYMBOL vmlinux 0xd7a6fafa	panic_notifier_list
+EXPORT_SYMBOL vmlinux 0xd7b6e501	skb_unlink
+EXPORT_SYMBOL vmlinux 0xd7cd7c2f	__sk_mem_reclaim
+EXPORT_SYMBOL vmlinux 0xd7d1b856	skb_insert
+EXPORT_SYMBOL vmlinux 0xd7dbc82d	dm_table_get
+EXPORT_SYMBOL vmlinux 0xd7dd777b	reserve_perfctr_nmi
+EXPORT_SYMBOL vmlinux 0xd804f3c7	file_update_time
+EXPORT_SYMBOL vmlinux 0xd826a0a9	sg_miter_next
+EXPORT_SYMBOL vmlinux 0xd835a869	shrink_dcache_sb
+EXPORT_SYMBOL vmlinux 0xd8366486	compat_ip_getsockopt
+EXPORT_SYMBOL vmlinux 0xd83791bc	nf_conntrack_destroy
+EXPORT_SYMBOL vmlinux 0xd844f466	scsi_device_set_state
+EXPORT_SYMBOL vmlinux 0xd84f1ad6	__splice_from_pipe
+EXPORT_SYMBOL vmlinux 0xd851af78	up_write
+EXPORT_SYMBOL vmlinux 0xd869ad84	napi_gro_receive
+EXPORT_SYMBOL vmlinux 0xd8730dd2	mmc_free_host
+EXPORT_SYMBOL vmlinux 0xd8739cb7	sk_send_sigurg
+EXPORT_SYMBOL vmlinux 0xd87f23f2	dev_kfree_skb_irq
+EXPORT_SYMBOL vmlinux 0xd89da37f	movable_zone
+EXPORT_SYMBOL vmlinux 0xd8b89a0b	thermal_zone_bind_cooling_device
+EXPORT_SYMBOL vmlinux 0xd8c185f1	vmap
+EXPORT_SYMBOL vmlinux 0xd8e484f0	register_chrdev_region
+EXPORT_SYMBOL vmlinux 0xd9091363	acpi_install_notify_handler
+EXPORT_SYMBOL vmlinux 0xd916ef76	dma_ops
+EXPORT_SYMBOL vmlinux 0xd917c158	per_cpu__node_number
+EXPORT_SYMBOL vmlinux 0xd922ee1a	journal_restart
+EXPORT_SYMBOL vmlinux 0xd92e3d96	set_irq_chip
+EXPORT_SYMBOL vmlinux 0xd9356a4b	sock_no_getname
+EXPORT_SYMBOL vmlinux 0xd94c47c0	ipv6_setsockopt
+EXPORT_SYMBOL vmlinux 0xd985dc99	mempool_free_pages
+EXPORT_SYMBOL vmlinux 0xd9a22672	rfkill_register
+EXPORT_SYMBOL vmlinux 0xd9d80c2a	get_sb_nodev
+EXPORT_SYMBOL vmlinux 0xda082d8c	n_tty_ioctl_helper
+EXPORT_SYMBOL vmlinux 0xda084d3f	filp_open
+EXPORT_SYMBOL vmlinux 0xda0a6b0e	acpi_map_lsapic
+EXPORT_SYMBOL vmlinux 0xda0be3dd	tcp_enter_memory_pressure
+EXPORT_SYMBOL vmlinux 0xda193fb5	vlan_gro_receive
+EXPORT_SYMBOL vmlinux 0xda1a7335	kasprintf
+EXPORT_SYMBOL vmlinux 0xda329064	tcp_v4_conn_request
+EXPORT_SYMBOL vmlinux 0xda347bd5	ip_dev_find
+EXPORT_SYMBOL vmlinux 0xda4107f1	flock_lock_file_wait
+EXPORT_SYMBOL vmlinux 0xda44360c	may_umount
+EXPORT_SYMBOL vmlinux 0xda4629e4	radix_tree_insert
+EXPORT_SYMBOL vmlinux 0xda4ff5f5	tcp_create_openreq_child
+EXPORT_SYMBOL vmlinux 0xda619fd5	vmalloc_to_page
+EXPORT_SYMBOL vmlinux 0xda70582c	mapping_tagged
+EXPORT_SYMBOL vmlinux 0xda7ca6cb	fb_mode_is_equal
+EXPORT_SYMBOL vmlinux 0xda8af7ad	fb_find_nearest_mode
+EXPORT_SYMBOL vmlinux 0xda928914	nmi_watchdog
+EXPORT_SYMBOL vmlinux 0xdabf256b	fsync_bdev
+EXPORT_SYMBOL vmlinux 0xdafcac70	phy_driver_register
+EXPORT_SYMBOL vmlinux 0xdb75a855	dev_alloc_name
+EXPORT_SYMBOL vmlinux 0xdb8d385c	pci_find_next_bus
+EXPORT_SYMBOL vmlinux 0xdba0a2ae	request_firmware_nowait
+EXPORT_SYMBOL vmlinux 0xdbb5ad5c	node_to_cpumask_map
+EXPORT_SYMBOL vmlinux 0xdbcd416e	sysctl_ip_nonlocal_bind
+EXPORT_SYMBOL vmlinux 0xdbf7e56d	arp_tbl
+EXPORT_SYMBOL vmlinux 0xdc01b906	tcf_em_unregister
+EXPORT_SYMBOL vmlinux 0xdc047fc4	scsi_dev_info_list_add_keyed
+EXPORT_SYMBOL vmlinux 0xdc053205	udp_memory_allocated
+EXPORT_SYMBOL vmlinux 0xdc14eda7	pci_pci_problems
+EXPORT_SYMBOL vmlinux 0xdc181d79	scsi_report_device_reset
+EXPORT_SYMBOL vmlinux 0xdc1df76c	pci_prepare_to_sleep
+EXPORT_SYMBOL vmlinux 0xdc2adb35	add_taint
+EXPORT_SYMBOL vmlinux 0xdc43a9c8	daemonize
+EXPORT_SYMBOL vmlinux 0xdc5630f9	skb_copy_and_csum_bits
+EXPORT_SYMBOL vmlinux 0xdc70df8a	seq_release_private
+EXPORT_SYMBOL vmlinux 0xdc861446	dec_zone_page_state
+EXPORT_SYMBOL vmlinux 0xdc873a70	screen_info
+EXPORT_SYMBOL vmlinux 0xdc8eb984	mmc_card_sleep
+EXPORT_SYMBOL vmlinux 0xdca0e950	genl_register_family
+EXPORT_SYMBOL vmlinux 0xdcb0349b	sys_close
+EXPORT_SYMBOL vmlinux 0xdcb6651c	dev_change_flags
+EXPORT_SYMBOL vmlinux 0xdcc32409	tcf_hash_search
+EXPORT_SYMBOL vmlinux 0xdcc3bd9e	arch_debugfs_dir
+EXPORT_SYMBOL vmlinux 0xdcc77f06	clear_bdi_congested
+EXPORT_SYMBOL vmlinux 0xdcf3a97e	skb_abort_seq_read
+EXPORT_SYMBOL vmlinux 0xdcfd6b6a	scsi_rescan_device
+EXPORT_SYMBOL vmlinux 0xdd018cea	agp_backend_release
+EXPORT_SYMBOL vmlinux 0xdd05bac3	jbd2_journal_start_commit
+EXPORT_SYMBOL vmlinux 0xdd23a2cc	arp_find
+EXPORT_SYMBOL vmlinux 0xdd4d7969	tcp_timewait_state_process
+EXPORT_SYMBOL vmlinux 0xdd56dbac	agp_allocate_memory
+EXPORT_SYMBOL vmlinux 0xdd68bda0	ht_create_irq
+EXPORT_SYMBOL vmlinux 0xdd77b7df	inode_init_once
+EXPORT_SYMBOL vmlinux 0xddb13e7e	skb_copy_expand
+EXPORT_SYMBOL vmlinux 0xddc1a46b	write_cache_pages
+EXPORT_SYMBOL vmlinux 0xdddf28d0	inet_csk_delete_keepalive_timer
+EXPORT_SYMBOL vmlinux 0xdded2d28	neigh_seq_next
+EXPORT_SYMBOL vmlinux 0xde0bdcff	memset
+EXPORT_SYMBOL vmlinux 0xde137fe7	deny_write_access
+EXPORT_SYMBOL vmlinux 0xde20a7d2	arch_acpi_processor_init_pdc
+EXPORT_SYMBOL vmlinux 0xde31b902	blk_limits_io_opt
+EXPORT_SYMBOL vmlinux 0xde42dbc0	cdrom_number_of_slots
+EXPORT_SYMBOL vmlinux 0xde463f98	elevator_exit
+EXPORT_SYMBOL vmlinux 0xde691076	blk_end_request
+EXPORT_SYMBOL vmlinux 0xde75b689	set_irq_type
+EXPORT_SYMBOL vmlinux 0xde7b4ef5	dst_destroy
+EXPORT_SYMBOL vmlinux 0xde8346c5	input_register_device
+EXPORT_SYMBOL vmlinux 0xde85b8e9	unregister_8022_client
+EXPORT_SYMBOL vmlinux 0xde8b75b3	iget_locked
+EXPORT_SYMBOL vmlinux 0xde912e0d	mmc_resume_host
+EXPORT_SYMBOL vmlinux 0xde9360ba	totalram_pages
+EXPORT_SYMBOL vmlinux 0xde9b17ed	agp3_generic_fetch_size
+EXPORT_SYMBOL vmlinux 0xdeb8c26e	register_8022_client
+EXPORT_SYMBOL vmlinux 0xdec8df7c	tcp_v4_md5_lookup
+EXPORT_SYMBOL vmlinux 0xdecb3b21	sk_filter
+EXPORT_SYMBOL vmlinux 0xdeecdac5	sock_rfree
+EXPORT_SYMBOL vmlinux 0xdefac810	skb_copy_datagram_from_iovec
+EXPORT_SYMBOL vmlinux 0xdf0ac4a2	scsi_dma_map
+EXPORT_SYMBOL vmlinux 0xdf0da3cc	acpi_get_devices
+EXPORT_SYMBOL vmlinux 0xdf3a01ee	skb_clone
+EXPORT_SYMBOL vmlinux 0xdf4c8767	ns_to_timeval
+EXPORT_SYMBOL vmlinux 0xdf4da263	nonseekable_open
+EXPORT_SYMBOL vmlinux 0xdf55611b	dev_set_promiscuity
+EXPORT_SYMBOL vmlinux 0xdf60cc27	__print_symbol
+EXPORT_SYMBOL vmlinux 0xdf79edc8	check_disk_change
+EXPORT_SYMBOL vmlinux 0xdf8762fa	swiotlb_unmap_sg_attrs
+EXPORT_SYMBOL vmlinux 0xdf87ff99	con_copy_unimap
+EXPORT_SYMBOL vmlinux 0xdf8c695a	__ndelay
+EXPORT_SYMBOL vmlinux 0xdf929370	fs_overflowgid
+EXPORT_SYMBOL vmlinux 0xdfb7bada	acpi_check_resource_conflict
+EXPORT_SYMBOL vmlinux 0xdfb9c719	xfrm_policy_walk
+EXPORT_SYMBOL vmlinux 0xdfbb65b9	filemap_write_and_wait_range
+EXPORT_SYMBOL vmlinux 0xdfc5169b	slhc_init
+EXPORT_SYMBOL vmlinux 0xdfd3a5a1	inetdev_by_index
+EXPORT_SYMBOL vmlinux 0xdfd79ec4	backlight_device_unregister
+EXPORT_SYMBOL vmlinux 0xdfdff17b	seq_putc
+EXPORT_SYMBOL vmlinux 0xdfed7968	xfrm_bundle_ok
+EXPORT_SYMBOL vmlinux 0xe02633f9	uart_resume_port
+EXPORT_SYMBOL vmlinux 0xe03e445c	__netdev_alloc_page
+EXPORT_SYMBOL vmlinux 0xe0436b5b	pcie_port_service_unregister
+EXPORT_SYMBOL vmlinux 0xe05181cb	agp3_generic_tlbflush
+EXPORT_SYMBOL vmlinux 0xe05f0864	__sk_mem_schedule
+EXPORT_SYMBOL vmlinux 0xe075d6eb	iter_div_u64_rem
+EXPORT_SYMBOL vmlinux 0xe085caca	inet_bind
+EXPORT_SYMBOL vmlinux 0xe0ac8bd2	acpi_bus_generate_netlink_event
+EXPORT_SYMBOL vmlinux 0xe0b13336	argv_free
+EXPORT_SYMBOL vmlinux 0xe0bc24a1	param_set_ushort
+EXPORT_SYMBOL vmlinux 0xe0c9e9a5	dm_kcopyd_copy
+EXPORT_SYMBOL vmlinux 0xe0d56478	filemap_fdatawrite_range
+EXPORT_SYMBOL vmlinux 0xe113bbbc	csum_partial
+EXPORT_SYMBOL vmlinux 0xe11e1b58	llc_sap_open
+EXPORT_SYMBOL vmlinux 0xe12efbb1	bio_put
+EXPORT_SYMBOL vmlinux 0xe13cd8a7	dmi_name_in_vendors
+EXPORT_SYMBOL vmlinux 0xe141aa6d	insert_inode_locked
+EXPORT_SYMBOL vmlinux 0xe1761617	security_inet_conn_request
+EXPORT_SYMBOL vmlinux 0xe18a394b	neigh_update
+EXPORT_SYMBOL vmlinux 0xe18c52a3	i2c_smbus_read_word_data
+EXPORT_SYMBOL vmlinux 0xe1a81c3a	icmpv6msg_statistics
+EXPORT_SYMBOL vmlinux 0xe211e02d	pci_enable_msix
+EXPORT_SYMBOL vmlinux 0xe23ae481	blk_iopoll_complete
+EXPORT_SYMBOL vmlinux 0xe23d7acb	up_read
+EXPORT_SYMBOL vmlinux 0xe24050c7	scnprintf
+EXPORT_SYMBOL vmlinux 0xe2474ef3	find_lock_page
+EXPORT_SYMBOL vmlinux 0xe24d3a97	jiffies_64
+EXPORT_SYMBOL vmlinux 0xe255cf38	__generic_block_fiemap
+EXPORT_SYMBOL vmlinux 0xe26cf493	block_invalidatepage
+EXPORT_SYMBOL vmlinux 0xe29a938a	nf_unregister_hook
+EXPORT_SYMBOL vmlinux 0xe29b04e9	acpi_set_firmware_waking_vector64
+EXPORT_SYMBOL vmlinux 0xe2a9f933	phy_enable_interrupts
+EXPORT_SYMBOL vmlinux 0xe2aaaa4e	i2c_clients_command
+EXPORT_SYMBOL vmlinux 0xe2b649da	phy_sanitize_settings
+EXPORT_SYMBOL vmlinux 0xe2be8e30	input_grab_device
+EXPORT_SYMBOL vmlinux 0xe2d5255a	strcmp
+EXPORT_SYMBOL vmlinux 0xe2d9735b	neigh_changeaddr
+EXPORT_SYMBOL vmlinux 0xe2e301ae	serio_close
+EXPORT_SYMBOL vmlinux 0xe2e5b9d1	__blk_end_request_cur
+EXPORT_SYMBOL vmlinux 0xe2e704d1	tcp_alloc_md5sig_pool
+EXPORT_SYMBOL vmlinux 0xe2e98cdb	page_zero_new_buffers
+EXPORT_SYMBOL vmlinux 0xe30f294c	scsi_is_sdev_device
+EXPORT_SYMBOL vmlinux 0xe3539982	xfrm_policy_register_afinfo
+EXPORT_SYMBOL vmlinux 0xe36b2aaa	__elv_add_request
+EXPORT_SYMBOL vmlinux 0xe38d4458	d_invalidate
+EXPORT_SYMBOL vmlinux 0xe3a0847e	pci_choose_state
+EXPORT_SYMBOL vmlinux 0xe3b0192b	vscnprintf
+EXPORT_SYMBOL vmlinux 0xe3d0b157	skb_gro_reset_offset
+EXPORT_SYMBOL vmlinux 0xe3eefcdc	log_wait_commit
+EXPORT_SYMBOL vmlinux 0xe3f19e37	skb_copy_bits
+EXPORT_SYMBOL vmlinux 0xe3fbe148	acpi_install_table_handler
+EXPORT_SYMBOL vmlinux 0xe43617f7	acpi_gbl_FADT
+EXPORT_SYMBOL vmlinux 0xe456bd3a	complete
+EXPORT_SYMBOL vmlinux 0xe473d896	jbd2_journal_force_commit
+EXPORT_SYMBOL vmlinux 0xe484e35f	ioread32
+EXPORT_SYMBOL vmlinux 0xe4870354	_read_trylock
+EXPORT_SYMBOL vmlinux 0xe49b8e34	security_path_symlink
+EXPORT_SYMBOL vmlinux 0xe4a46fcc	pnp_register_card_driver
+EXPORT_SYMBOL vmlinux 0xe4a9c49c	xfrm_dst_ifdown
+EXPORT_SYMBOL vmlinux 0xe4b24b8c	__next_cpu
+EXPORT_SYMBOL vmlinux 0xe4c1df3e	_read_lock_bh
+EXPORT_SYMBOL vmlinux 0xe4f1695e	cookie_check_timestamp
+EXPORT_SYMBOL vmlinux 0xe511c3ab	backlight_device_register
+EXPORT_SYMBOL vmlinux 0xe523ad75	synchronize_irq
+EXPORT_SYMBOL vmlinux 0xe52947e7	__phys_addr
+EXPORT_SYMBOL vmlinux 0xe52bdfdd	fb_find_mode
+EXPORT_SYMBOL vmlinux 0xe5623e7f	ip_mc_rejoin_group
+EXPORT_SYMBOL vmlinux 0xe571b36f	iw_handler_get_spy
+EXPORT_SYMBOL vmlinux 0xe57708fe	generic_write_checks
+EXPORT_SYMBOL vmlinux 0xe57878a1	in6_pton
+EXPORT_SYMBOL vmlinux 0xe57b14d4	user_revoke
+EXPORT_SYMBOL vmlinux 0xe5867808	dlci_ioctl_set
+EXPORT_SYMBOL vmlinux 0xe5911276	pci_pme_capable
+EXPORT_SYMBOL vmlinux 0xe5a35bf3	filemap_flush
+EXPORT_SYMBOL vmlinux 0xe5a5a203	skb_dequeue
+EXPORT_SYMBOL vmlinux 0xe5a8c133	pci_scan_bus_parented
+EXPORT_SYMBOL vmlinux 0xe5b34589	elv_abort_queue
+EXPORT_SYMBOL vmlinux 0xe5bd367a	filemap_fdatawait
+EXPORT_SYMBOL vmlinux 0xe5c01c7f	__bio_clone
+EXPORT_SYMBOL vmlinux 0xe5c78a99	do_blank_screen
+EXPORT_SYMBOL vmlinux 0xe5df07a5	ppp_unregister_channel
+EXPORT_SYMBOL vmlinux 0xe5ed5467	xfrm_policy_walk_init
+EXPORT_SYMBOL vmlinux 0xe64864d9	init_task
+EXPORT_SYMBOL vmlinux 0xe690b8fd	__ipv6_isatap_ifid
+EXPORT_SYMBOL vmlinux 0xe697d108	__blk_iopoll_complete
+EXPORT_SYMBOL vmlinux 0xe6e0c892	vlan_ioctl_set
+EXPORT_SYMBOL vmlinux 0xe6f570f5	jbd2_journal_blocks_per_page
+EXPORT_SYMBOL vmlinux 0xe6fbe430	can_do_mlock
+EXPORT_SYMBOL vmlinux 0xe714375c	__tasklet_hi_schedule_first
+EXPORT_SYMBOL vmlinux 0xe7160b5c	free_buffer_head
+EXPORT_SYMBOL vmlinux 0xe716baed	acpi_unregister_ioapic
+EXPORT_SYMBOL vmlinux 0xe726f39c	llc_sap_close
+EXPORT_SYMBOL vmlinux 0xe7346c9e	sock_common_recvmsg
+EXPORT_SYMBOL vmlinux 0xe74b9a17	jbd2_journal_update_format
+EXPORT_SYMBOL vmlinux 0xe7698c13	blk_recount_segments
+EXPORT_SYMBOL vmlinux 0xe7795ed6	ip_xfrm_me_harder
+EXPORT_SYMBOL vmlinux 0xe786168c	rwsem_down_write_failed
+EXPORT_SYMBOL vmlinux 0xe78960b9	acpi_get_physical_device
+EXPORT_SYMBOL vmlinux 0xe7ba9a55	xfrm_policy_bysel_ctx
+EXPORT_SYMBOL vmlinux 0xe7bd98e6	agp_flush_chipset
+EXPORT_SYMBOL vmlinux 0xe7d15971	sk_stream_wait_close
+EXPORT_SYMBOL vmlinux 0xe7d2aca1	security_sk_classify_flow
+EXPORT_SYMBOL vmlinux 0xe7d32407	nmi_active
+EXPORT_SYMBOL vmlinux 0xe7d4daac	seq_list_next
+EXPORT_SYMBOL vmlinux 0xe7f06ac7	skb_over_panic
+EXPORT_SYMBOL vmlinux 0xe7f08233	bio_add_page
+EXPORT_SYMBOL vmlinux 0xe803c7df	ip_generic_getfrag
+EXPORT_SYMBOL vmlinux 0xe80ce219	sysctl_tcp_dma_copybreak
+EXPORT_SYMBOL vmlinux 0xe80ec852	mmc_power_restore_host
+EXPORT_SYMBOL vmlinux 0xe8116e08	__kmalloc_node
+EXPORT_SYMBOL vmlinux 0xe811ce38	i2c_smbus_write_byte
+EXPORT_SYMBOL vmlinux 0xe823b624	xfrm_state_alloc
+EXPORT_SYMBOL vmlinux 0xe8281e1b	sock_wfree
+EXPORT_SYMBOL vmlinux 0xe85060c1	kobject_del
+EXPORT_SYMBOL vmlinux 0xe8734cd0	register_framebuffer
+EXPORT_SYMBOL vmlinux 0xe8794ce1	slhc_toss
+EXPORT_SYMBOL vmlinux 0xe8967cb7	bio_integrity_enabled
+EXPORT_SYMBOL vmlinux 0xe899f7cc	udp_poll
+EXPORT_SYMBOL vmlinux 0xe8a3605f	acpi_processor_set_thermal_limit
+EXPORT_SYMBOL vmlinux 0xe8c8592d	agp_enable
+EXPORT_SYMBOL vmlinux 0xe8c9aaf3	sock_kfree_s
+EXPORT_SYMBOL vmlinux 0xe8cd902e	hweight16
+EXPORT_SYMBOL vmlinux 0xe90dcae0	__request_module
+EXPORT_SYMBOL vmlinux 0xe914e41e	strcpy
+EXPORT_SYMBOL vmlinux 0xe957bc06	vfs_llseek
+EXPORT_SYMBOL vmlinux 0xe96a82b5	set_bh_page
+EXPORT_SYMBOL vmlinux 0xe997667b	wrmsr_on_cpu
+EXPORT_SYMBOL vmlinux 0xe99c6b22	mmc_card_awake
+EXPORT_SYMBOL vmlinux 0xea054b22	nla_policy_len
+EXPORT_SYMBOL vmlinux 0xea10212a	int_to_scsilun
+EXPORT_SYMBOL vmlinux 0xea10655a	__bitmap_intersects
+EXPORT_SYMBOL vmlinux 0xea147363	printk
+EXPORT_SYMBOL vmlinux 0xea376094	simple_statfs
+EXPORT_SYMBOL vmlinux 0xea3b748b	dma_async_tx_descriptor_init
+EXPORT_SYMBOL vmlinux 0xea59bc83	pagecache_write_begin
+EXPORT_SYMBOL vmlinux 0xea629e92	free_netdev
+EXPORT_SYMBOL vmlinux 0xea73195a	journal_blocks_per_page
+EXPORT_SYMBOL vmlinux 0xea7518f1	filemap_fdatawrite
+EXPORT_SYMBOL vmlinux 0xea7e3e74	__nla_reserve
+EXPORT_SYMBOL vmlinux 0xea90bdd3	acpi_attach_data
+EXPORT_SYMBOL vmlinux 0xead58fb9	print_hex_dump
+EXPORT_SYMBOL vmlinux 0xead8e285	eth_type_trans
+EXPORT_SYMBOL vmlinux 0xeae3dfd6	__const_udelay
+EXPORT_SYMBOL vmlinux 0xeaf140f0	scsi_register_driver
+EXPORT_SYMBOL vmlinux 0xeb1fabf6	interruptible_sleep_on
+EXPORT_SYMBOL vmlinux 0xeb444b6f	__napi_complete
+EXPORT_SYMBOL vmlinux 0xeb6ceeba	mmc_host_lazy_disable
+EXPORT_SYMBOL vmlinux 0xeb74d733	rfkill_resume_polling
+EXPORT_SYMBOL vmlinux 0xeb7bb9b6	kernel_recvmsg
+EXPORT_SYMBOL vmlinux 0xeb7c1057	block_write_full_page
+EXPORT_SYMBOL vmlinux 0xeb8f54b3	strstrip
+EXPORT_SYMBOL vmlinux 0xeb986265	tcf_exts_change
+EXPORT_SYMBOL vmlinux 0xeba3ef1b	jbd2_journal_check_available_features
+EXPORT_SYMBOL vmlinux 0xeba8f555	kernel_getsockopt
+EXPORT_SYMBOL vmlinux 0xebbf1dba	strncasecmp
+EXPORT_SYMBOL vmlinux 0xebc8c88f	md_check_no_bitmap
+EXPORT_SYMBOL vmlinux 0xebd273a6	strict_strtoull
+EXPORT_SYMBOL vmlinux 0xebda04e6	pci_bus_read_config_dword
+EXPORT_SYMBOL vmlinux 0xebf1509b	clocksource_unregister
+EXPORT_SYMBOL vmlinux 0xec71ac98	pcim_iomap_regions_request_all
+EXPORT_SYMBOL vmlinux 0xec794ba0	__send_remote_softirq
+EXPORT_SYMBOL vmlinux 0xec7d0569	tty_wait_until_sent
+EXPORT_SYMBOL vmlinux 0xec8179c7	phy_register_fixup_for_id
+EXPORT_SYMBOL vmlinux 0xecde1418	_spin_lock_irq
+EXPORT_SYMBOL vmlinux 0xecf43c07	kmalloc_caches
+EXPORT_SYMBOL vmlinux 0xed16390c	sock_create_lite
+EXPORT_SYMBOL vmlinux 0xed35942c	pci_fixup_device
+EXPORT_SYMBOL vmlinux 0xed3c7156	xfrm_alloc_spi
+EXPORT_SYMBOL vmlinux 0xed3f6556	sock_no_sendmsg
+EXPORT_SYMBOL vmlinux 0xed557f14	input_register_handler
+EXPORT_SYMBOL vmlinux 0xed5a2710	dev_alloc_skb
+EXPORT_SYMBOL vmlinux 0xed65b053	__find_get_block
+EXPORT_SYMBOL vmlinux 0xed7c1245	xfrm_state_register_afinfo
+EXPORT_SYMBOL vmlinux 0xeda0d76e	gen_estimator_active
+EXPORT_SYMBOL vmlinux 0xeda62f20	__f_setown
+EXPORT_SYMBOL vmlinux 0xeda7d47d	atomic_dec_and_mutex_lock
+EXPORT_SYMBOL vmlinux 0xedb601c7	tcp_v4_md5_do_del
+EXPORT_SYMBOL vmlinux 0xedbaee5e	nla_strcmp
+EXPORT_SYMBOL vmlinux 0xedc03953	iounmap
+EXPORT_SYMBOL vmlinux 0xede9ab28	vfs_mkdir
+EXPORT_SYMBOL vmlinux 0xedf8a16f	__mmc_claim_host
+EXPORT_SYMBOL vmlinux 0xee296b19	sock_no_getsockopt
+EXPORT_SYMBOL vmlinux 0xee2ae5da	inode_add_bytes
+EXPORT_SYMBOL vmlinux 0xee2d0fc7	_local_bh_enable
+EXPORT_SYMBOL vmlinux 0xee7eb9e1	pnp_platform_devices
+EXPORT_SYMBOL vmlinux 0xee8736b7	tr_type_trans
+EXPORT_SYMBOL vmlinux 0xee8ac201	napi_frags_skb
+EXPORT_SYMBOL vmlinux 0xeea7a2be	compat_mc_setsockopt
+EXPORT_SYMBOL vmlinux 0xeea9dbaf	bitmap_bitremap
+EXPORT_SYMBOL vmlinux 0xeec1e161	revalidate_disk
+EXPORT_SYMBOL vmlinux 0xeece3514	phy_disconnect
+EXPORT_SYMBOL vmlinux 0xef3234d9	wake_up_process
+EXPORT_SYMBOL vmlinux 0xef4376e4	seq_open_private
+EXPORT_SYMBOL vmlinux 0xef458902	devm_ioport_unmap
+EXPORT_SYMBOL vmlinux 0xef6ed1ba	param_set_invbool
+EXPORT_SYMBOL vmlinux 0xef9aedfc	boot_option_idle_override
+EXPORT_SYMBOL vmlinux 0xefad9741	nf_unregister_hooks
+EXPORT_SYMBOL vmlinux 0xefb93069	generic_removexattr
+EXPORT_SYMBOL vmlinux 0xefc2a227	set_pages_array_uc
+EXPORT_SYMBOL vmlinux 0xefda3731	pci_setup_cardbus
+EXPORT_SYMBOL vmlinux 0xefdd70ce	security_secid_to_secctx
+EXPORT_SYMBOL vmlinux 0xefe099c3	acpi_get_event_status
+EXPORT_SYMBOL vmlinux 0xeff1f3e7	acpi_bus_unregister_driver
+EXPORT_SYMBOL vmlinux 0xeff52ee9	inet_csk_reset_keepalive_timer
+EXPORT_SYMBOL vmlinux 0xeffaf6d0	mod_zone_page_state
+EXPORT_SYMBOL vmlinux 0xeffb8bcb	qdisc_class_hash_grow
+EXPORT_SYMBOL vmlinux 0xf0009fee	put_pages_list
+EXPORT_SYMBOL vmlinux 0xf0189889	vfs_dq_quota_on_remount
+EXPORT_SYMBOL vmlinux 0xf01c1fdf	fget
+EXPORT_SYMBOL vmlinux 0xf0408743	devm_ioremap_nocache
+EXPORT_SYMBOL vmlinux 0xf051d70c	napi_skb_finish
+EXPORT_SYMBOL vmlinux 0xf065f629	ioread16be
+EXPORT_SYMBOL vmlinux 0xf086ec71	agp_unbind_memory
+EXPORT_SYMBOL vmlinux 0xf08dfc22	blk_queue_max_phys_segments
+EXPORT_SYMBOL vmlinux 0xf0906e5a	bitmap_close_sync
+EXPORT_SYMBOL vmlinux 0xf0b3f396	key_validate
+EXPORT_SYMBOL vmlinux 0xf0ca23b9	invalidate_inodes
+EXPORT_SYMBOL vmlinux 0xf0cd0281	__mutex_init
+EXPORT_SYMBOL vmlinux 0xf0cf2a2e	find_get_page
+EXPORT_SYMBOL vmlinux 0xf0d93f3e	pci_map_rom
+EXPORT_SYMBOL vmlinux 0xf0ef15b4	list_sort
+EXPORT_SYMBOL vmlinux 0xf0f1246c	kvasprintf
+EXPORT_SYMBOL vmlinux 0xf0f71051	pskb_copy
+EXPORT_SYMBOL vmlinux 0xf0fdf6cb	__stack_chk_fail
+EXPORT_SYMBOL vmlinux 0xf106ecb3	acpi_evaluate_object_typed
+EXPORT_SYMBOL vmlinux 0xf1079b3c	kthread_bind
+EXPORT_SYMBOL vmlinux 0xf10de535	ioread8
+EXPORT_SYMBOL vmlinux 0xf11543ff	find_first_zero_bit
+EXPORT_SYMBOL vmlinux 0xf116d4b5	copy_in_user
+EXPORT_SYMBOL vmlinux 0xf11ffc97	__dev_get_by_name
+EXPORT_SYMBOL vmlinux 0xf1317029	dev_get_by_flags
+EXPORT_SYMBOL vmlinux 0xf15a23a3	ipv6_chk_addr
+EXPORT_SYMBOL vmlinux 0xf16da094	uart_add_one_port
+EXPORT_SYMBOL vmlinux 0xf174ed48	acquire_console_sem
+EXPORT_SYMBOL vmlinux 0xf195c682	fb_invert_cmaps
+EXPORT_SYMBOL vmlinux 0xf1b17a02	scsi_put_command
+EXPORT_SYMBOL vmlinux 0xf1b7e360	per_cpu__cpu_sibling_map
+EXPORT_SYMBOL vmlinux 0xf1d34abd	i2c_smbus_read_byte_data
+EXPORT_SYMBOL vmlinux 0xf1d64416	gen_new_estimator
+EXPORT_SYMBOL vmlinux 0xf1db1704	nla_memcpy
+EXPORT_SYMBOL vmlinux 0xf1e2d1f5	inet_ioctl
+EXPORT_SYMBOL vmlinux 0xf1e98c74	avenrun
+EXPORT_SYMBOL vmlinux 0xf206fc24	ps2_handle_response
+EXPORT_SYMBOL vmlinux 0xf20dabd8	free_irq
+EXPORT_SYMBOL vmlinux 0xf20e73c9	single_open
+EXPORT_SYMBOL vmlinux 0xf21685d3	dquot_commit_info
+EXPORT_SYMBOL vmlinux 0xf221b71e	free_mdio_bitbang
+EXPORT_SYMBOL vmlinux 0xf223262d	tty_schedule_flip
+EXPORT_SYMBOL vmlinux 0xf23a63e1	fb_get_mode
+EXPORT_SYMBOL vmlinux 0xf262bbf2	phy_device_free
+EXPORT_SYMBOL vmlinux 0xf27a0469	elv_add_request
+EXPORT_SYMBOL vmlinux 0xf28973eb	xfrm_state_walk
+EXPORT_SYMBOL vmlinux 0xf2997713	tty_termios_hw_change
+EXPORT_SYMBOL vmlinux 0xf2ac99ee	netdev_set_master
+EXPORT_SYMBOL vmlinux 0xf2c023e4	xfrm_state_add
+EXPORT_SYMBOL vmlinux 0xf2c19f85	writeback_inodes_sb
+EXPORT_SYMBOL vmlinux 0xf2fcbfb5	security_path_mknod
+EXPORT_SYMBOL vmlinux 0xf303793a	dput
+EXPORT_SYMBOL vmlinux 0xf310ae77	sk_run_filter
+EXPORT_SYMBOL vmlinux 0xf313da4e	sha_transform
+EXPORT_SYMBOL vmlinux 0xf3145c2b	xfrm_state_insert
+EXPORT_SYMBOL vmlinux 0xf31ae2f5	tcp_close
+EXPORT_SYMBOL vmlinux 0xf3331545	security_path_rmdir
+EXPORT_SYMBOL vmlinux 0xf3341268	__clear_user
+EXPORT_SYMBOL vmlinux 0xf338d4c3	netlink_unregister_notifier
+EXPORT_SYMBOL vmlinux 0xf33c5800	hippi_neigh_setup_dev
+EXPORT_SYMBOL vmlinux 0xf33fa27b	dm_exception_store_destroy
+EXPORT_SYMBOL vmlinux 0xf346231f	seq_list_start_head
+EXPORT_SYMBOL vmlinux 0xf36fadfb	inet_addr_type
+EXPORT_SYMBOL vmlinux 0xf37329ca	inode_claim_rsv_space
+EXPORT_SYMBOL vmlinux 0xf397b9aa	__tasklet_schedule
+EXPORT_SYMBOL vmlinux 0xf398fa5b	cfb_fillrect
+EXPORT_SYMBOL vmlinux 0xf3ac6d5e	con_is_bound
+EXPORT_SYMBOL vmlinux 0xf3bf0bce	__bitmap_complement
+EXPORT_SYMBOL vmlinux 0xf3bf633e	serio_unregister_child_port
+EXPORT_SYMBOL vmlinux 0xf3ef69be	blk_queue_logical_block_size
+EXPORT_SYMBOL vmlinux 0xf40a32fe	pci_select_bars
+EXPORT_SYMBOL vmlinux 0xf41011f6	rfkill_init_sw_state
+EXPORT_SYMBOL vmlinux 0xf430c480	release_sock
+EXPORT_SYMBOL vmlinux 0xf441ac43	ioread8_rep
+EXPORT_SYMBOL vmlinux 0xf449dd90	mdiobus_write
+EXPORT_SYMBOL vmlinux 0xf4528073	scsi_kmap_atomic_sg
+EXPORT_SYMBOL vmlinux 0xf4607155	pnp_disable_dev
+EXPORT_SYMBOL vmlinux 0xf48ed526	xfrm_find_acq
+EXPORT_SYMBOL vmlinux 0xf493bf25	ethtool_op_set_flags
+EXPORT_SYMBOL vmlinux 0xf49436bd	inet_select_addr
+EXPORT_SYMBOL vmlinux 0xf494f618	mmc_regulator_get_ocrmask
+EXPORT_SYMBOL vmlinux 0xf49fe399	pci_bus_find_capability
+EXPORT_SYMBOL vmlinux 0xf4a5c213	avail_to_resrv_perfctr_nmi_bit
+EXPORT_SYMBOL vmlinux 0xf4ae60de	acpi_processor_notify_smm
+EXPORT_SYMBOL vmlinux 0xf4d66985	pci_remove_behind_bridge
+EXPORT_SYMBOL vmlinux 0xf4f14de6	rtnl_trylock
+EXPORT_SYMBOL vmlinux 0xf4f49c0a	try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0xf4f52f93	dqstats
+EXPORT_SYMBOL vmlinux 0xf5044c9f	blk_alloc_queue
+EXPORT_SYMBOL vmlinux 0xf5197dda	cancel_dirty_page
+EXPORT_SYMBOL vmlinux 0xf51ae235	touch_nmi_watchdog
+EXPORT_SYMBOL vmlinux 0xf53d4c26	qdisc_class_hash_destroy
+EXPORT_SYMBOL vmlinux 0xf57682c8	acpi_get_object_info
+EXPORT_SYMBOL vmlinux 0xf588aeb4	elv_rb_del
+EXPORT_SYMBOL vmlinux 0xf5c9012e	timespec_trunc
+EXPORT_SYMBOL vmlinux 0xf5e1efe3	bio_alloc_bioset
+EXPORT_SYMBOL vmlinux 0xf5eb86ea	blk_verify_command
+EXPORT_SYMBOL vmlinux 0xf5fae172	notify_change
+EXPORT_SYMBOL vmlinux 0xf6315bb9	tcp_sync_mss
+EXPORT_SYMBOL vmlinux 0xf63393e5	ipv4_specific
+EXPORT_SYMBOL vmlinux 0xf643eaac	handle_sysrq
+EXPORT_SYMBOL vmlinux 0xf666cbb3	__memcpy_fromio
+EXPORT_SYMBOL vmlinux 0xf67fe8d2	jbd2_journal_try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0xf6939ac4	get_agp_version
+EXPORT_SYMBOL vmlinux 0xf6bb4729	color_table
+EXPORT_SYMBOL vmlinux 0xf6d89afd	fifo_create_dflt
+EXPORT_SYMBOL vmlinux 0xf6ebc03b	net_ratelimit
+EXPORT_SYMBOL vmlinux 0xf6ff1143	phy_disable_interrupts
+EXPORT_SYMBOL vmlinux 0xf70d0e45	rtnl_unicast
+EXPORT_SYMBOL vmlinux 0xf72c97fe	iget5_locked
+EXPORT_SYMBOL vmlinux 0xf749534a	gen_pool_free
+EXPORT_SYMBOL vmlinux 0xf74a63b5	x86_mce_decode_callback
+EXPORT_SYMBOL vmlinux 0xf77b2ccb	sync_mapping_buffers
+EXPORT_SYMBOL vmlinux 0xf78d04ab	netlink_register_notifier
+EXPORT_SYMBOL vmlinux 0xf7969df4	seq_path
+EXPORT_SYMBOL vmlinux 0xf7d4e192	xfrm6_rcv
+EXPORT_SYMBOL vmlinux 0xf7ecf6e5	freeze_bdev
+EXPORT_SYMBOL vmlinux 0xf7f3c23b	ip_setsockopt
+EXPORT_SYMBOL vmlinux 0xf7f8d104	blk_remove_plug
+EXPORT_SYMBOL vmlinux 0xf8101e4d	bio_alloc
+EXPORT_SYMBOL vmlinux 0xf811e69d	scsi_eh_flush_done_q
+EXPORT_SYMBOL vmlinux 0xf82abc1d	isa_dma_bridge_buggy
+EXPORT_SYMBOL vmlinux 0xf82e3d47	acpi_initialize_objects
+EXPORT_SYMBOL vmlinux 0xf8341911	seq_puts
+EXPORT_SYMBOL vmlinux 0xf843b6e3	pci_release_regions
+EXPORT_SYMBOL vmlinux 0xf85a6c28	nf_register_hooks
+EXPORT_SYMBOL vmlinux 0xf8714142	follow_up
+EXPORT_SYMBOL vmlinux 0xf873bd2a	pci_target_state
+EXPORT_SYMBOL vmlinux 0xf88e0ee2	acpi_get_table_header
+EXPORT_SYMBOL vmlinux 0xf890fe7f	pm_idle
+EXPORT_SYMBOL vmlinux 0xf8b30e93	mempool_create
+EXPORT_SYMBOL vmlinux 0xf8be16d3	scsi_device_get
+EXPORT_SYMBOL vmlinux 0xf8cf9ee5	abort_exclusive_wait
+EXPORT_SYMBOL vmlinux 0xf8ea5a1b	serio_reconnect
+EXPORT_SYMBOL vmlinux 0xf9017427	ip_ct_attach
+EXPORT_SYMBOL vmlinux 0xf93b5ad3	blk_queue_io_opt
+EXPORT_SYMBOL vmlinux 0xf9567e60	ps2_command
+EXPORT_SYMBOL vmlinux 0xf96214a6	mutex_trylock
+EXPORT_SYMBOL vmlinux 0xf986fac8	request_key_with_auxdata
+EXPORT_SYMBOL vmlinux 0xf9899664	mod_timer_pinned
+EXPORT_SYMBOL vmlinux 0xf98a4728	elv_rb_former_request
+EXPORT_SYMBOL vmlinux 0xf9a482f9	msleep
+EXPORT_SYMBOL vmlinux 0xf9ae3ea6	bd_claim
+EXPORT_SYMBOL vmlinux 0xf9b50079	kobject_put
+EXPORT_SYMBOL vmlinux 0xf9c5b219	i2c_use_client
+EXPORT_SYMBOL vmlinux 0xf9c82a29	blk_queue_io_min
+EXPORT_SYMBOL vmlinux 0xf9c907d5	tcp_poll
+EXPORT_SYMBOL vmlinux 0xf9ecb00a	skb_copy_and_csum_datagram_iovec
+EXPORT_SYMBOL vmlinux 0xfa023d36	d_genocide
+EXPORT_SYMBOL vmlinux 0xfa0564fc	__wait_on_bit_lock
+EXPORT_SYMBOL vmlinux 0xfa1603f2	dm_exception_store_type_unregister
+EXPORT_SYMBOL vmlinux 0xfa3d51f4	pci_bus_add_devices
+EXPORT_SYMBOL vmlinux 0xfa47635c	scm_fp_dup
+EXPORT_SYMBOL vmlinux 0xfa4eb046	inet_proto_csum_replace4
+EXPORT_SYMBOL vmlinux 0xfa5a2ed8	dev_mc_sync
+EXPORT_SYMBOL vmlinux 0xfa84a8e4	qdisc_reset
+EXPORT_SYMBOL vmlinux 0xfa908648	sysctl_jiffies
+EXPORT_SYMBOL vmlinux 0xfaa08da0	blkdev_issue_discard
+EXPORT_SYMBOL vmlinux 0xfac95b55	tty_register_device
+EXPORT_SYMBOL vmlinux 0xfaca791b	seq_escape
+EXPORT_SYMBOL vmlinux 0xfad4daae	blk_rq_init
+EXPORT_SYMBOL vmlinux 0xfade665f	pnp_device_attach
+EXPORT_SYMBOL vmlinux 0xfade81ed	invalidate_mapping_pages
+EXPORT_SYMBOL vmlinux 0xfaf3f28b	fddi_change_mtu
+EXPORT_SYMBOL vmlinux 0xfaf98462	bitrev32
+EXPORT_SYMBOL vmlinux 0xfb0443fb	acpi_get_parent
+EXPORT_SYMBOL vmlinux 0xfb06f93c	scsi_execute_req
+EXPORT_SYMBOL vmlinux 0xfb0bc752	genlmsg_multicast_allns
+EXPORT_SYMBOL vmlinux 0xfb0cf2e9	touch_all_softlockup_watchdogs
+EXPORT_SYMBOL vmlinux 0xfb44763a	mnt_pin
+EXPORT_SYMBOL vmlinux 0xfb46e4b7	netlink_dump_start
+EXPORT_SYMBOL vmlinux 0xfb61baf5	pfifo_qdisc_ops
+EXPORT_SYMBOL vmlinux 0xfb6af58d	recalc_sigpending
+EXPORT_SYMBOL vmlinux 0xfba0c2e0	llc_sap_list_lock
+EXPORT_SYMBOL vmlinux 0xfbbc0c2d	md_unregister_thread
+EXPORT_SYMBOL vmlinux 0xfbc5c6ec	cdrom_mode_sense
+EXPORT_SYMBOL vmlinux 0xfbc69b2a	ethtool_op_get_sg
+EXPORT_SYMBOL vmlinux 0xfbcaae2e	phy_mii_ioctl
+EXPORT_SYMBOL vmlinux 0xfbd9af7f	nf_ct_attach
+EXPORT_SYMBOL vmlinux 0xfbe27a1c	rb_first
+EXPORT_SYMBOL vmlinux 0xfbf7051c	page_symlink
+EXPORT_SYMBOL vmlinux 0xfc02b7ad	sysctl_tcp_wmem
+EXPORT_SYMBOL vmlinux 0xfc086db6	user_path_at
+EXPORT_SYMBOL vmlinux 0xfc0b9194	blk_start_queue
+EXPORT_SYMBOL vmlinux 0xfc1bcd32	scsi_test_unit_ready
+EXPORT_SYMBOL vmlinux 0xfc2e2f1f	dm_io
+EXPORT_SYMBOL vmlinux 0xfc394b16	skb_copy_datagram_const_iovec
+EXPORT_SYMBOL vmlinux 0xfc39e32f	ioport_unmap
+EXPORT_SYMBOL vmlinux 0xfc4897cd	uart_get_divisor
+EXPORT_SYMBOL vmlinux 0xfc6256b9	boot_tvec_bases
+EXPORT_SYMBOL vmlinux 0xfc778de6	__scsi_iterate_devices
+EXPORT_SYMBOL vmlinux 0xfc7b737f	journal_init_inode
+EXPORT_SYMBOL vmlinux 0xfc964c09	kernel_connect
+EXPORT_SYMBOL vmlinux 0xfcaa04a0	out_of_line_wait_on_bit_lock
+EXPORT_SYMBOL vmlinux 0xfcaa2afb	ip6_frag_init
+EXPORT_SYMBOL vmlinux 0xfcb0019a	input_set_keycode
+EXPORT_SYMBOL vmlinux 0xfcc2a43c	utf32_to_utf8
+EXPORT_SYMBOL vmlinux 0xfcc4d4e4	mod_timer_pending
+EXPORT_SYMBOL vmlinux 0xfccd0fae	lock_may_read
+EXPORT_SYMBOL vmlinux 0xfcec0987	enable_irq
+EXPORT_SYMBOL vmlinux 0xfcefd18a	mem_section
+EXPORT_SYMBOL vmlinux 0xfcfa03ff	fb_videomode_to_modelist
+EXPORT_SYMBOL vmlinux 0xfd0f64c3	xfrm6_input_addr
+EXPORT_SYMBOL vmlinux 0xfd3486a1	dma_async_memcpy_pg_to_pg
+EXPORT_SYMBOL vmlinux 0xfd4203cc	agp_generic_alloc_user
+EXPORT_SYMBOL vmlinux 0xfd5583c5	in6_dev_finish_destroy
+EXPORT_SYMBOL vmlinux 0xfd6f4850	native_wrmsr_safe_regs
+EXPORT_SYMBOL vmlinux 0xfd7d7713	acpi_exception
+EXPORT_SYMBOL vmlinux 0xfd7f8b3a	fasync_helper
+EXPORT_SYMBOL vmlinux 0xfda85a7d	request_threaded_irq
+EXPORT_SYMBOL vmlinux 0xfdb6a98b	inet6_unregister_protosw
+EXPORT_SYMBOL vmlinux 0xfdb9b629	ioread32be
+EXPORT_SYMBOL vmlinux 0xfdbd38c4	set_security_override_from_ctx
+EXPORT_SYMBOL vmlinux 0xfdd80b07	sock_no_bind
+EXPORT_SYMBOL vmlinux 0xfddcb78a	del_gendisk
+EXPORT_SYMBOL vmlinux 0xfdfc0b3b	fiemap_fill_next_extent
+EXPORT_SYMBOL vmlinux 0xfe013b6b	delayed_slow_work_enqueue
+EXPORT_SYMBOL vmlinux 0xfe029bae	pci_try_set_mwi
+EXPORT_SYMBOL vmlinux 0xfe047ce6	acpi_enter_sleep_state
+EXPORT_SYMBOL vmlinux 0xfe26fc7c	nr_node_ids
+EXPORT_SYMBOL vmlinux 0xfe33b03c	alloc_buffer_head
+EXPORT_SYMBOL vmlinux 0xfe36a09d	iw_handler_set_spy
+EXPORT_SYMBOL vmlinux 0xfe392bcd	generic_segment_checks
+EXPORT_SYMBOL vmlinux 0xfe5020b6	__dst_free
+EXPORT_SYMBOL vmlinux 0xfe5d4bb2	sys_tz
+EXPORT_SYMBOL vmlinux 0xfe5fec35	hippi_change_mtu
+EXPORT_SYMBOL vmlinux 0xfe678338	pci_clear_mwi
+EXPORT_SYMBOL vmlinux 0xfe69bffc	set_groups
+EXPORT_SYMBOL vmlinux 0xfe709597	agp_generic_free_by_type
+EXPORT_SYMBOL vmlinux 0xfe769456	unregister_netdevice_notifier
+EXPORT_SYMBOL vmlinux 0xfe7c4287	nr_cpu_ids
+EXPORT_SYMBOL vmlinux 0xfe8945ac	mmc_wait_for_app_cmd
+EXPORT_SYMBOL vmlinux 0xfe96c4ce	pnp_get_resource
+EXPORT_SYMBOL vmlinux 0xfea1155b	tcp_v4_remember_stamp
+EXPORT_SYMBOL vmlinux 0xfec3c2f2	bcd2bin
+EXPORT_SYMBOL vmlinux 0xfec6c4db	poll_initwait
+EXPORT_SYMBOL vmlinux 0xfec6ce4c	eth_validate_addr
+EXPORT_SYMBOL vmlinux 0xfedd35fc	console_suspend_enabled
+EXPORT_SYMBOL vmlinux 0xfedd96ba	unregister_tcf_proto_ops
+EXPORT_SYMBOL vmlinux 0xfee836f6	single_release
+EXPORT_SYMBOL vmlinux 0xfef96e23	__scsi_print_command
+EXPORT_SYMBOL vmlinux 0xff171041	blk_unplug
+EXPORT_SYMBOL vmlinux 0xff1e9dd8	seq_list_start
+EXPORT_SYMBOL vmlinux 0xff6878cf	fb_default_cmap
+EXPORT_SYMBOL vmlinux 0xff708fd3	mempool_destroy
+EXPORT_SYMBOL vmlinux 0xff7559e4	ioport_resource
+EXPORT_SYMBOL vmlinux 0xff8f22b0	scsi_block_requests
+EXPORT_SYMBOL vmlinux 0xff964b25	param_set_int
+EXPORT_SYMBOL vmlinux 0xff9ca065	fb_edid_to_monspecs
+EXPORT_SYMBOL vmlinux 0xffad4b37	jbd2_journal_wipe
+EXPORT_SYMBOL vmlinux 0xffba1b72	arp_xmit
+EXPORT_SYMBOL vmlinux 0xffbb9480	kernel_listen
+EXPORT_SYMBOL vmlinux 0xffbbfdd4	mmc_detect_change
+EXPORT_SYMBOL vmlinux 0xffc51b58	blk_rq_map_integrity_sg
+EXPORT_SYMBOL vmlinux 0xffc7c184	__init_waitqueue_head
+EXPORT_SYMBOL vmlinux 0xffd5a395	default_wake_function
+EXPORT_SYMBOL_GPL arch/x86/crypto/aes-x86_64 0x7060bf0a	crypto_aes_encrypt_x86
+EXPORT_SYMBOL_GPL arch/x86/crypto/aes-x86_64 0xe409b491	crypto_aes_decrypt_x86
+EXPORT_SYMBOL_GPL arch/x86/kernel/cpu/cpufreq/speedstep-lib 0x16836e04	speedstep_detect_processor
+EXPORT_SYMBOL_GPL arch/x86/kernel/cpu/cpufreq/speedstep-lib 0x2af90271	speedstep_get_frequency
+EXPORT_SYMBOL_GPL arch/x86/kernel/cpu/cpufreq/speedstep-lib 0xd494ee54	speedstep_get_freqs
+EXPORT_SYMBOL_GPL arch/x86/kernel/microcode 0xdf66ca81	ucode_cpu_info
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x00aaf935	kvm_disable_tdp
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x02206d9d	__kvm_set_memory_region
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x094ac8f4	kvm_get_pfn
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x09518019	emulate_instruction
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x0ab1c07d	kvm_set_page_dirty
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x0c4fcce2	kvm_report_emulation_failure
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x0d4c47ae	kvm_read_guest_page
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x12d1b23b	kvm_release_pfn_clean
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x17c162b5	kvm_set_cr3
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1997ae42	kvm_mmu_unprotect_page_virt
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1a9df35f	__tracepoint_kvm_msr
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1e4580bb	kvm_release_pfn_dirty
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x20de5193	kvm_disable_largepages
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x2322e039	kvm_set_pfn_accessed
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x238d2466	kvm_is_visible_gfn
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x27046576	kvm_exit
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x28800dc8	kvm_set_memory_region
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x317f9e6b	kvm_enable_efer_bits
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x31f65011	kvm_vcpu_init
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x37c86750	kvm_mmu_invlpg
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x38483c8a	kvm_vcpu_on_spin
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x3b7706d2	__tracepoint_kvm_exit
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x3bf67a66	kvm_task_switch
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x3e3dd82f	kvm_get_kvm
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x3fbae73b	kvm_clear_guest
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x426da3e1	is_error_page
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x438a9fbc	kvm_emulate_pio
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x46889c51	kvm_cpu_get_interrupt
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x4a7cbe69	is_error_pfn
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x4e26219a	gfn_to_pfn
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x59379d89	kvm_resched
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x5aca020c	kvm_get_cr8
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x5c9accf0	kvm_get_cs_db_l_bits
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x5d33f088	kvm_queue_exception_e
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x5d9a4900	gfn_to_hva
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x5fa46ff1	kvm_emulate_hypercall
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x62cb80e6	kvm_mmu_reset_context
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x63c62ae0	emulator_write_emulated
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x665c4c1f	kvm_cpu_has_interrupt
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x6d8aa1d7	load_pdptrs
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x778eb921	kvm_emulate_pio_string
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x7b2338c9	kvm_emulate_halt
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x7d962708	kvm_queue_exception
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8021006e	kvm_load_guest_fpu
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x82f6b1a9	gfn_to_memslot_unaliased
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8ce4f3ab	kvm_enable_tdp
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8e7f9b47	segment_base
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8fbbcf2e	kvm_require_cpl
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x93c776ae	kvm_set_cr0
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x9a2e7b69	kvm_get_apic_base
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x9d30bcc8	kvm_mmu_page_fault
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x9e37c700	kvm_init
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa361bc65	kvm_set_pfn_dirty
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa40b2afd	kvm_mmu_load
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa46806dc	fx_init
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa7ed34a9	kvm_clear_guest_page
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xab7f3b9e	kvm_lmsw
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xad6e20e2	kvm_put_guest_fpu
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xb4f81b04	kvm_x86_ops
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xb8be40cb	kvm_set_cr4
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbb00c069	kvm_inject_pending_timer_irqs
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbc809db3	kvm_read_guest
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbd377dc9	kvm_mmu_set_nonpresent_ptes
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbd86163a	kvm_handle_fault_on_reboot
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbd94103b	kvm_mmu_set_base_ptes
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbdd03f4a	kvm_release_page_clean
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xc2784de6	kvm_vcpu_uninit
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xc5351a64	kvm_set_cr8
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xc8e02b25	kvm_inject_nmi
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xc90fae55	kvm_set_msr_common
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xcd7b041f	kvm_get_guest_memory_type
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xcea5bf57	__tracepoint_kvm_page_fault
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd0b2727a	kvm_mmu_set_mask_ptes
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd296def9	kvm_is_error_hva
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd3c0a6da	__tracepoint_kvm_inj_virq
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd9d3d08e	kvm_vcpu_cache
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xda606bc2	kvm_write_guest_page
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xdcde2537	kvm_set_apic_base
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xdd6ca399	kvm_put_kvm
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xdead7e81	__tracepoint_kvm_cr
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xe656f5db	kvm_mmu_get_spte_hierarchy
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xebbfe9d3	kvm_release_page_dirty
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xef6e0663	gfn_to_page
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xf48ed9e2	kvm_emulate_cpuid
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xfacc2ba7	kvm_get_msr_common
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x0cc1e40f	crypto_it_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x24aac4d9	crypto_aes_expand_key
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x3dc916b6	crypto_fl_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x40d46b21	crypto_ft_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x71dc9998	crypto_il_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0xff0cee2c	crypto_aes_set_key
+EXPORT_SYMBOL_GPL crypto/async_tx/async_memcpy 0xe4767216	async_memcpy
+EXPORT_SYMBOL_GPL crypto/async_tx/async_pq 0x78606e8b	async_syndrome_val
+EXPORT_SYMBOL_GPL crypto/async_tx/async_pq 0xfdc27c4b	async_gen_syndrome
+EXPORT_SYMBOL_GPL crypto/async_tx/async_raid6_recov 0x402d7327	async_raid6_2data_recov
+EXPORT_SYMBOL_GPL crypto/async_tx/async_raid6_recov 0xc3423d9b	async_raid6_datap_recov
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x2fd504b2	async_tx_submit
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x7ad2cc39	async_tx_quiesce
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x9f9f77d9	async_trigger_callback
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0xb3523910	__async_tx_find_channel
+EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0xbccb5ab6	async_xor_val
+EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0xd3fca047	async_xor
+EXPORT_SYMBOL_GPL crypto/cryptd 0x04fd2aea	cryptd_free_ablkcipher
+EXPORT_SYMBOL_GPL crypto/cryptd 0x182c7c6b	cryptd_ablkcipher_child
+EXPORT_SYMBOL_GPL crypto/cryptd 0x34b4736a	cryptd_alloc_ahash
+EXPORT_SYMBOL_GPL crypto/cryptd 0x63b22f38	cryptd_shash_desc
+EXPORT_SYMBOL_GPL crypto/cryptd 0x7894c995	cryptd_ahash_child
+EXPORT_SYMBOL_GPL crypto/cryptd 0x964a0f67	cryptd_free_ahash
+EXPORT_SYMBOL_GPL crypto/cryptd 0xa4c38057	cryptd_alloc_ablkcipher
+EXPORT_SYMBOL_GPL crypto/des_generic 0xcfd9a2c0	des_ekey
+EXPORT_SYMBOL_GPL crypto/twofish_common 0x68da9166	twofish_setkey
+EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x02ff9464	cfag12864b_isinited
+EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x0ecb2e5d	cfag12864b_disable
+EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x305dc3c6	cfag12864b_isenabled
+EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x3389f926	cfag12864b_enable
+EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x9522a342	cfag12864b_getrate
+EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0xc48e9d95	cfag12864b_buffer
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x14102f23	ks0108_displaystate
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x48a70518	ks0108_writedata
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x4f506333	ks0108_startline
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x6edae968	ks0108_isinited
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xbf4774db	ks0108_writecontrol
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xedde6df2	ks0108_page
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xfee8ef7b	ks0108_address
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0x16b05dd3	btmrvl_send_module_cfg_cmd
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0x43d5f33c	btmrvl_process_event
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0xaf6e60be	btmrvl_check_evtpkt
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0xb04a8a34	btmrvl_interrupt
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0xcbdf1d5a	btmrvl_remove_card
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0xfde3c99c	btmrvl_add_card
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x04915628	tpm_remove_hardware
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x1223233c	tpm_open
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x1915c757	tpm_release
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x1d763d0f	tpm_register_hardware
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x3f65178b	tpm_calc_ordinal_duration
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x4657a928	tpm_show_owned
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x525e60bc	tpm_read
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x558e1287	tpm_show_temp_deactivated
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x583397da	tpm_continue_selftest
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x723b8594	tpm_dev_release
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x7ef8ba3a	tpm_show_pubek
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x80110594	tpm_show_caps
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x855afb0c	tpm_get_timeouts
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x8a612f4d	tpm_pm_suspend
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x900a5baa	tpm_show_pcrs
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x90da7ede	tpm_show_active
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x91e1fbad	tpm_store_cancel
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x930255dd	tpm_dev_vendor_release
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x94be2f7c	tpm_show_enabled
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x9e2382ce	tpm_show_caps_1_2
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xa76fd600	tpm_show_timeouts
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xadf6aa4d	tpm_pcr_read
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xaedd7763	tpm_gen_interrupt
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xba295d0f	tpm_write
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xc37226a5	tpm_pcr_extend
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xe7714672	tpm_pm_resume
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm_bios 0x13f9a680	tpm_bios_log_teardown
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm_bios 0xfce943f5	tpm_bios_log_setup
+EXPORT_SYMBOL_GPL drivers/dca/dca 0x0ccb465b	dca_remove_requester
+EXPORT_SYMBOL_GPL drivers/dca/dca 0x2e471f01	dca_register_notify
+EXPORT_SYMBOL_GPL drivers/dca/dca 0x2ebb035f	unregister_dca_provider
+EXPORT_SYMBOL_GPL drivers/dca/dca 0x31a2c8df	dca_get_tag
+EXPORT_SYMBOL_GPL drivers/dca/dca 0x6a72ced2	dca_add_requester
+EXPORT_SYMBOL_GPL drivers/dca/dca 0x8006c614	dca_unregister_notify
+EXPORT_SYMBOL_GPL drivers/dca/dca 0xc82b32d0	free_dca_provider
+EXPORT_SYMBOL_GPL drivers/dca/dca 0xd33880dd	dca3_get_tag
+EXPORT_SYMBOL_GPL drivers/dca/dca 0xddbf4f00	register_dca_provider
+EXPORT_SYMBOL_GPL drivers/dca/dca 0xe616c173	alloc_dca_provider
+EXPORT_SYMBOL_GPL drivers/edac/amd64_edac_mod 0xc923da92	amd64_get_dram_hole_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x06147dae	edac_pci_create_generic_ctl
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x09576082	edac_pci_alloc_ctl_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x0c32ff8a	edac_pci_alloc_index
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x25ff8968	edac_mc_find_csrow_by_page
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x297826df	edac_device_add_device
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x325a1250	edac_device_handle_ue
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x3a66e14a	edac_device_handle_ce
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x3c2d455d	edac_pci_release_generic_ctl
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x43e28449	edac_pci_del_device
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x472f8140	edac_mc_alloc
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x4cde21e3	edac_mc_free
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x51cae0be	edac_mc_handle_ce_no_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x57e2cff1	edac_pci_reset_delay_period
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x676afd64	edac_pci_handle_npe
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x6e3ff83a	edac_device_alloc_index
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x8790f601	edac_pci_add_device
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x8da9ff7c	edac_mc_handle_ce
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x8e1b635d	edac_mc_add_mc
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xaf38253c	edac_mc_handle_ue_no_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xbde70b8c	edac_device_alloc_ctl_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xbfa5033d	edac_device_del_device
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xc689b62e	edac_pci_free_ctl_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xce6c7c7b	edac_mc_handle_ue
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xcf2fbbcc	edac_mc_del_mc
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xdd75498d	edac_device_free_ctl_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xf1b72fd7	edac_pci_handle_pe
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0x0f0ba55e	ii_msgs
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0x14878009	amd_report_gart_errors
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0x1823885a	amd_register_ecc_decoder
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0x4b01887d	pp_msgs
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0x7509830f	to_msgs
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0x955c1f76	amd_decode_nb_mce
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0xb98537cb	rrrr_msgs
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0xc2e765d2	amd_unregister_ecc_decoder
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0xd0f094a0	ext_msgs
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0xe6ff7e0c	ll_msgs
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0xf8dec080	tt_msgs
+EXPORT_SYMBOL_GPL drivers/gpu/drm/drm 0x02a45ecc	drm_class_device_register
+EXPORT_SYMBOL_GPL drivers/gpu/drm/drm 0x98f18613	drm_class_device_unregister
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x02ecf57a	hid_check_keys_pressed
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x05495392	hid_debug
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x08a74ff0	hidinput_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x105b4fe1	hidinput_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x161580fb	hid_unregister_driver
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x171495d1	hid_debug_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x1e953bcd	hid_input_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x21c23f6d	hidinput_report_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x562538fc	hid_report_raw_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x5dd1dad4	hid_add_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x7457b6b7	hid_dump_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x797a48f5	hid_resolv_usage
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x96ee021e	hid_set_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x979986eb	hid_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x9e428b98	hid_dump_input
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xb8a77437	hid_output_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xbf360363	hidraw_report_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xc3219735	hid_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xc56fc6e6	hid_dump_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xcc7efd29	hid_allocate_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xd2b5fd3c	hid_destroy_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xdcf9ed76	hidraw_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xe48cd3b4	__hid_register_driver
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xe9dd48b8	hidinput_find_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xeffc349a	hid_parse_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xf586324d	hidraw_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x01fd453e	usbhid_lookup_quirk
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x56cdb771	usbhid_set_leds
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x5fcc6bfc	hiddev_hid_event
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x954da911	usbhid_submit_report
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x1c1ca961	lis3_dev
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x312e6a17	lis3lv02d_poweron
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x3babe982	lis3lv02d_poweroff
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x4e1bfabf	lis3lv02d_remove_fs
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x6c33e494	lis3lv02d_joystick_disable
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x897e4370	lis3lv02d_init_device
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xe6af28c8	lis3lv02d_joystick_enable
+EXPORT_SYMBOL_GPL drivers/i2c/busses/i2c-nforce2 0xc81ea176	nforce2_smbus
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0x2badb07b	hpsb_config_rom_ip1394_add
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0x3cd50152	hpsb_config_rom_ip1394_remove
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0xec8d18cf	hpsb_disable_irm
+EXPORT_SYMBOL_GPL drivers/infiniband/hw/ipath/ib_ipath 0x1514b2b2	ipath_debug
+EXPORT_SYMBOL_GPL drivers/input/ff-memless 0xa95e6ba9	input_ff_create_memless
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x05072dd9	wm97xx_config_gpio
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x0db30a48	wm97xx_get_gpio
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x1ce2b1c1	wm97xx_reg_read
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x26023823	wm9705_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x3bbc2579	wm9712_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x3f29c278	wm97xx_register_mach_ops
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x66078f16	wm97xx_read_aux_adc
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x68992697	wm97xx_reg_write
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x6c8e7282	wm97xx_unregister_mach_ops
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xa8d99b7f	wm97xx_set_suspend_mode
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xabe676a3	wm97xx_set_gpio
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xf71625e7	wm9713_codec
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x03e78b09	gigaset_add_event
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x04dd100a	gigaset_initcs
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x2c0979ce	gigaset_dbg_buffer
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x412b1b11	gigaset_stop
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x44c480e3	gigaset_freecs
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x454aa44f	gigaset_debuglevel
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x4dd65f7d	gigaset_if_receive
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x6d6da509	gigaset_shutdown
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x7b5df267	gigaset_m10x_send_skb
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x7cb1f931	gigaset_freedriver
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x7da92126	gigaset_initdriver
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x825cc85d	gigaset_skb_sent
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x8e9d0777	gigaset_blockdriver
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x914ec063	gigaset_fill_inbuf
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x9fa20eeb	gigaset_m10x_input
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xd61ba332	gigaset_start
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xe6cb4795	gigaset_handle_modem_response
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0x87400e7f	led_classdev_unregister
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0xe1b7c35e	led_classdev_suspend
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0xeb1d3441	led_classdev_register
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0xfd2270df	led_classdev_resume
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0x24935f26	raid6_call
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0xcdc24ab5	raid6_2data_recov
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0xdbab0c01	raid6_datap_recov
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x0349c9bd	ir_codes_proteus_2309_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x0366dcdf	ir_codes_videomate_s350_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x110b053a	ir_codes_pixelview_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x124cb753	ir_codes_encore_enltv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x183fdfdd	ir_codes_gotview7135_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x19b4d61c	ir_codes_nebula_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x19cd2826	ir_codes_behold_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x1a9009d6	ir_codes_dm1105_nec_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x1cb148f5	ir_extract_bits
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x219b69fa	ir_input_keydown
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2456e513	ir_decode_pulsedistance
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2cc459b5	ir_codes_flydvb_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2d0e9a49	ir_codes_em_terratec_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3136d8ff	ir_codes_dntv_live_dvbt_pro_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x32b9033b	ir_codes_apac_viewcomp_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3909f4ad	ir_codes_terratec_cinergy_xs_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3a84be27	ir_codes_avermedia_a16d_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x4267d749	ir_codes_budget_ci_old_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x43c89ef4	ir_decode_biphase
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x4c1442c1	ir_codes_real_audio_220_32_keys_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x51ba1643	ir_codes_kworld_plus_tv_analog_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x543db4ff	ir_codes_avermedia_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x5e95da31	ir_codes_tt_1500_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x5fbe6515	ir_codes_pinnacle_color_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x61d039d7	ir_codes_behold_columbus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6427a3fb	ir_codes_pinnacle_grey_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x64b02fed	ir_codes_avermedia_dvbt_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6606596a	ir_rc5_timer_keyup
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6809de82	ir_codes_pctv_sedna_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6d6511e7	ir_dump_samples
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x703fc738	ir_codes_avertv_303_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x7283f81d	ir_codes_purpletv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x72c2992e	ir_codes_powercolor_real_angel_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x76d71b8e	ir_codes_dntv_live_dvb_t_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x784e176d	ir_codes_asus_pc39_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x828b3ce5	ir_codes_encore_enltv_fm53_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x87a7deb6	ir_input_nokey
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x8acae3dd	ir_codes_pinnacle_pctv_hd_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x92d1d181	ir_codes_flyvideo_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x94651dab	ir_codes_ati_tv_wonder_hd_600_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x97c35dab	ir_codes_msi_tvanywhere_plus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x9944e2e5	ir_codes_hauppauge_new_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xa69aa6ad	ir_codes_pv951_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xa95157c5	ir_codes_cinergy_1400_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xac15f6c8	ir_codes_kaiomy_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xaff22e87	ir_codes_pixelview_new_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb01a1998	ir_codes_manli_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb0a8ef38	ir_codes_rc5_tv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb57445f7	ir_codes_eztv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb5adb754	ir_codes_cinergy_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xbd3ce6f0	ir_codes_avermedia_cardbus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xbeaccbdc	ir_codes_gadmei_rm008z_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xcba36c62	ir_codes_videomate_tv_pvr_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xd30c491f	ir_codes_norwood_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xdc23fec4	ir_codes_fusionhdtv_mce_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xdd4c0a07	ir_codes_evga_indtube_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xe1101f4d	ir_codes_avermedia_m135a_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xe4140c60	ir_codes_genius_tvgo_a11mce_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xea623b68	ir_input_init
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xeb9bb08f	ir_codes_npgtech_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xebf345b4	ir_codes_encore_enltv2_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xeec89db8	ir_codes_empty_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xef29c40d	ir_codes_adstech_dvb_t_pci_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf33c155d	ir_codes_msi_tvanywhere_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf3d619ec	ir_codes_iodata_bctv7e_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf4f7a4d6	ir_rc5_timer_end
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf5e15e65	ir_codes_winfast_table
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x39616934	saa7146_register_extension
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x51091a1a	saa7146_vfree_destroy_pgtable
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x5ebb0e45	saa7146_pgtable_free
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x7ddd7f4c	saa7146_i2c_adapter_prepare
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xb6765efa	saa7146_unregister_extension
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xcf683cf2	saa7146_devices
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xe31f8ed5	saa7146_setgpio
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xe3cd9b5c	saa7146_debug
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xe5afeee9	saa7146_devices_lock
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xea762426	saa7146_vmalloc_build_pgtable
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xf31079e3	saa7146_pgtable_alloc
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xfd24551a	saa7146_wait_for_debi_done
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xfec7e35c	saa7146_pgtable_build_single
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x19f09cf0	saa7146_unregister_device
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x3b722beb	saa7146_set_hps_source_and_sync
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x426a627f	saa7146_register_device
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xbc4047eb	saa7146_start_preview
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xbf5dec5b	saa7146_vv_release
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xc6eee3ea	saa7146_vv_init
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xfc4790e3	saa7146_stop_preview
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/mt20xx 0x3bcd387f	microtune_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/mxl5007t 0xd3879f2c	mxl5007t_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda18271 0x0175de09	tda18271_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda827x 0xec4afeed	tda827x_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda8290 0x6c0570ca	tda829x_probe
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda8290 0xc57239ec	tda829x_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda9887 0x838cf6e5	tda9887_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5761 0x5b1b93ce	tea5761_autodetection
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5761 0xc7086518	tea5761_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5767 0x88c645df	tea5767_autodetection
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5767 0xfd409bb2	tea5767_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tuner-simple 0x0fe7554b	simple_tuner_attach
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x01a74e25	smscore_unregister_client
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x030eb1ad	sms_board_event
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x058face4	smscore_register_device
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x21e36bf2	smscore_registry_getmode
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x2a86d56a	sms_board_setup
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x320b35c0	smscore_getbuffer
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x37d91069	smsendian_handle_tx_message
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x3b7a87fa	smscore_unregister_device
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x3dfa939c	smscore_unregister_hotplug
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x45284ae9	smsendian_handle_rx_message
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x4d40eb7f	smscore_get_board_id
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x529cf73f	sms_board_lna_control
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x74ee9098	sms_board_load_modules
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x7c576277	smsendian_handle_message_header
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x7dda6e4f	smscore_register_client
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x822f7948	sms_board_power
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x97310f9d	smscore_putbuffer
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x9a163a16	smscore_onresponse
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xa3a2b042	sms_board_led_feedback
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xa8024569	smscore_register_hotplug
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xe19a36c3	smscore_get_device_mode
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xeb9018a2	smscore_set_board_id
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xefaab494	smsclient_sendrequest
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xfad8cce2	smscore_start_device
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xfda878c5	sms_get_board
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x0cadcd12	ttpci_budget_irq10_handler
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x27ff499b	ttpci_budget_set_video_port
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x7948c222	budget_debug
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x9baa2c5c	ttpci_budget_init_hooks
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0xc5a12b19	ttpci_budget_init
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0xe1eb943f	ttpci_budget_debiwrite
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0xec8277ef	ttpci_budget_debiread
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0xff4b87e2	ttpci_budget_deinit
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x017ea7c7	cx231xx_tuner_callback
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x5f7e8419	cx231xx_send_usb_command
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x6f46a773	cx231xx_uninit_vbi_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x98179ae9	cx231xx_dev_init
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xb5045d6d	cx231xx_send_gpio_cmd
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xbec92317	cx231xx_uninit_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xc4c29a75	cx231xx_init_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xe05f71b5	cx231xx_init_vbi_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xe62db725	cx231xx_dev_uninit
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xecf5e01d	cx231xx_set_alt_setting
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xf60a1b7f	cx231xx_capture_start
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xf7ac6fb0	cx231xx_set_mode
+EXPORT_SYMBOL_GPL drivers/media/video/cx88/cx88xx 0x582975e7	cx88_setup_xc3028
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x15714476	em28xx_uninit_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x15a7b92b	em28xx_init_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x1d97eb9f	em28xx_set_mode
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x5fe31c2e	em28xx_isoc_dvb_max_packetsize
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x7fc8652c	em28xx_tuner_callback
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x911cc8d2	em28xx_audio_analog_set
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0xab12f4ca	em28xx_audio_setup
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x155cfb79	saa7134_s_std_internal
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x20c779d5	saa7134_ts_qops
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x9002dff0	saa7134_s_ctrl_internal
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0xad8a6f3e	saa7134_g_ctrl_internal
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0xf9c56b49	saa7134_queryctrl
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x1e270b74	v4l2_i2c_new_subdev_cfg
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x2d7f29ea	v4l2_i2c_subdev_addr
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x97fb6a9f	v4l2_i2c_subdev_init
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xf22049dc	v4l2_i2c_new_subdev_board
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xf2a353ac	v4l2_i2c_tuner_addrs
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xf5ef842e	v4l_bound_align_image
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-compat-ioctl32 0xbdd5900d	v4l2_compat_ioctl32
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x2d22e054	v4l2_int_device_unregister
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x40f3af06	v4l2_int_ioctl_1
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x854b312a	v4l2_int_ioctl_0
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xa5228b24	v4l2_int_device_try_attach_all
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xe9899e3a	v4l2_int_device_register
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x02cf66d7	__videobuf_mmap_setup
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x31b6c42e	videobuf_streamoff
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x3ea8a2ec	videobuf_cgmbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x44cd3bb4	videobuf_mmap_free
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x4556ad9c	videobuf_dqbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x4a7301cf	videobuf_stop
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x53a88498	videobuf_waiton
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x5ff8a6c1	videobuf_qbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x6a53242c	videobuf_read_stop
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x719eb95e	videobuf_queue_is_busy
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x87ec15a0	videobuf_querybuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x89c3ad2f	videobuf_alloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x8fd21938	videobuf_queue_core_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x965c91dc	videobuf_next_field
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xa31a1580	videobuf_iolock
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xa86fadec	videobuf_mmap_setup
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xafd8c671	videobuf_read_start
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xbde50717	videobuf_queue_cancel
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xc009477e	videobuf_read_one
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xc6b2c00a	videobuf_queue_to_vmalloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xc86219ef	videobuf_read_stream
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xd3ee8dca	videobuf_poll_stream
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xd69d98af	videobuf_streamon
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xe0d9f6c3	videobuf_reqbufs
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xe9ed7b52	videobuf_mmap_mapper
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x2cfd90cb	videobuf_to_dma
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x4eb8a5e4	videobuf_dma_init_kernel
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x6da23ab4	videobuf_dma_sync
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x73a22249	videobuf_dma_free
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x7ad3fde5	videobuf_sg_dma_unmap
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x861cd06d	videobuf_dma_unmap
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x8edb8ed2	videobuf_dma_init_user
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x8f1daf2a	videobuf_queue_sg_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x933dfb43	videobuf_vmalloc_to_sg
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x94759a4e	videobuf_sg_dma_map
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xa38faed2	videobuf_sg_alloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xc3292bf7	videobuf_dma_map
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xc69dc7ed	videobuf_dma_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xe82bee02	videobuf_dma_init_overlay
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0x035d2a2a	videobuf_queue_vmalloc_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0x76b341b2	videobuf_to_vmalloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0x98d767ce	videobuf_vmalloc_free
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x020c7243	v4l2_device_set_name
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x18751877	v4l2_device_register
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x27f29e5d	v4l2_device_disconnect
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x51dec2fc	v4l2_device_register_subdev
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0xc2f6e870	v4l2_device_unregister
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0xfad49154	v4l2_device_unregister_subdev
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x0d371681	i2o_dma_free
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x17c084c3	i2o_pool_alloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x1d5bfe44	i2o_dma_realloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x40aa2246	i2o_sg_tablesize
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x497f0e67	i2o_pool_free
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x5535d7f2	i2o_dma_alloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xf4db7227	i2o_dma_map_sg
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xfae6ab72	i2o_dma_map_single
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x0019c9a9	mc13783_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x41e442b9	mc13783_adc_set_ts_status
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x5259475f	mc13783_adc_do_conversion
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x55afd13d	mc13783_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x86cef259	mc13783_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0xc532891c	mc13783_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0xdda368ba	mc13783_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-adc 0x43e47afd	pcf50633_adc_sync_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-adc 0xee5eb9c1	pcf50633_adc_async_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x015981f7	pcf50633_reg_set_bit_mask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x291493ec	pcf50633_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x467cb980	pcf50633_reg_clear_bits
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x71806410	pcf50633_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x7d2b1f70	pcf50633_irq_mask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x98ac91da	pcf50633_irq_mask_get
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xc08d6a2a	pcf50633_write_block
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xc885731a	pcf50633_irq_unmask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xea388498	pcf50633_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xf5633356	pcf50633_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xf812a3ee	pcf50633_read_block
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x0db357ae	pcf50633_gpio_power_supply_set
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x263340a6	pcf50633_gpio_get
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x739cd9b9	pcf50633_gpio_invert_set
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x94629afd	pcf50633_gpio_invert_get
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0xeedec6b6	pcf50633_gpio_set
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x129b5768	sm501_set_clock
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x636d3734	sm501_modify_reg
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x716d47d8	sm501_misc_control
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x90a29ef4	sm501_unit_power
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0xad2cce50	sm501_find_clock
+EXPORT_SYMBOL_GPL drivers/mfd/ucb1400_core 0xa3150324	ucb1400_adc_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x01c7cb35	wm831x_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x125737ec	wm831x_auxadc_read_uv
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x13322e66	wm831x_bulk_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x3189089e	wm831x_enable_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x3b234f58	wm831x_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x75574058	wm831x_reg_lock
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x7dab26b6	wm831x_isinkv_values
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xb0cd3098	wm831x_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xb77bb434	wm831x_reg_unlock
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xc7f26726	wm831x_request_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xe0376c9d	wm831x_disable_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xe9510aa9	wm831x_auxadc_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xf78c7ebe	wm831x_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x01795b4a	wm8350_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x198c13d3	wm8350_read_auxadc
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x1e473574	wm8350_block_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x3fcf4c1e	wm8350_unmask_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x4e73f9e9	wm8350_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x56502f77	wm8350_device_init
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x64a4ea3b	wm8350_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x684566ec	wm8350_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x813271ec	wm8350_mask_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x836087ef	wm8350_block_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xab14ed0e	wm8350_gpio_config
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xb67cc4e0	wm8350_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xc1af5f48	wm8350_device_exit
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xd0d53d16	wm8350_clear_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xe73e6117	wm8350_reg_unlock
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xf5a61210	wm8350_reg_lock
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x432e2768	wm8400_reset_codec_reg_cache
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x738ce78d	wm8400_block_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0xc6a3b512	wm8400_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0xcd857e18	wm8400_set_bits
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x6d8ccc38	cb710_sg_dwiter_write_next_block
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x97f772d7	cb710_sg_dwiter_read_next_block
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0xd5bfb5c1	cb710_set_irq_handler
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0xfafb31a7	cb710_pci_update_config_reg
+EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x2df115d4	eeprom_93cx6_multiread
+EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x63d14d2f	eeprom_93cx6_read
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x03e69bb3	enclosure_register
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x0f68ded9	enclosure_find
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x1f2f1489	enclosure_unregister
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x29cda097	enclosure_component_register
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x5e787db4	enclosure_for_each_device
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x788c9b53	enclosure_remove_device
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0xb6143123	enclosure_add_device
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x12256658	sdhci_suspend_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x204a30e9	sdhci_alloc_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x261f0660	sdhci_resume_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x3f2c09d8	sdhci_remove_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x748dc0f9	sdhci_free_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xa9ad070d	sdhci_add_host
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x90558c06	cfi_cmdset_0003
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0xb94f77a5	cfi_cmdset_0001
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0xef3f64f0	cfi_cmdset_0200
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0002 0x696072f7	cfi_cmdset_0002
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0020 0x0f8c61fd	cfi_cmdset_0020
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x09079df5	cfi_qry_mode_off
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x5243f04a	cfi_qry_present
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0xb0e10076	cfi_qry_mode_on
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2000 0x1c20ce28	DoC2k_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001 0x7dfdcb61	DoCMil_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001plus 0x2478d4b9	DoCMilPlus_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/docecc 0x45937659	doc_decode_ecc
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x0a52c284	mtd_table
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x119a31e9	register_mtd_user
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x1f218d2c	mtd_erase_callback
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x43a3e2b4	get_sb_mtd
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x43c38d9b	del_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x6301c2f3	parse_mtd_partitions
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x6b16202b	get_mtd_device_nm
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x74019900	register_mtd_parser
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x93391c66	mtd_table_mutex
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x946a26ab	kill_mtd_super
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x9ad75845	default_mtd_writev
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xa72a685a	put_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xc2ad2803	unregister_mtd_user
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xcf0be395	deregister_mtd_parser
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xf12227ff	get_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xf46f19f6	add_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x031c679e	add_mtd_blktrans_dev
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x17e6c03b	register_mtd_blktrans
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x356adccd	deregister_mtd_blktrans
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0xa2300cf7	del_mtd_blktrans_dev
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x05da2fc3	nand_wait_ready
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x65c1b1d0	nand_scan_ident
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x73f009ae	nand_release
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xa668dae6	nand_scan_tail
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xa7db3817	nand_scan
+EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0x559afa58	onenand_scan
+EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0xdba4bb09	onenand_release
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x0416469f	ubi_is_mapped
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x2cbf016d	ubi_leb_map
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x37719650	ubi_get_volume_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x3ae5f2c7	ubi_leb_unmap
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x42801d20	ubi_sync
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x4a9626b7	ubi_do_get_device_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x570f50a9	ubi_leb_change
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x578732d9	ubi_close_volume
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x5e5cbdf7	ubi_leb_read
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x6f09ba8a	ubi_register_volume_notifier
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xa1d0189d	ubi_leb_erase
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xa3ec0b91	ubi_open_volume
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xbc505df4	ubi_get_device_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xbd29c4c8	ubi_open_volume_nm
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xe3d290ce	ubi_leb_write
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xfd6f0ef9	ubi_unregister_volume_notifier
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x1a6f59f5	can_put_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x1ed1938f	unregister_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x26d40263	free_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x41ce90e7	register_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x4ed909c1	close_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x5d7dd2a8	can_get_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x5f5528a0	alloc_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x66655a5c	can_bus_off
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x79efeb8a	open_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x85016956	can_free_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x0c81b83f	alloc_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x14bf413e	free_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x2b6d310f	unregister_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xa0d0c47c	register_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xdc9bd500	sja1000_interrupt
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x03b0ed66	mlx4_unregister_vlan
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x073a399d	mlx4_free_hwq_res
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x0f7fbcd4	mlx4_SYNC_TPT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x17d19903	mlx4_register_mac
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x254424a0	mlx4_uar_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x26ef34b1	mlx4_fmr_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x2c26bd25	mlx4_qp_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x3083db95	mlx4_qp_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x347aefc1	mlx4_mtt_addr
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x37baa3c9	mlx4_unregister_mac
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x38b7318b	mlx4_cq_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x39bc2772	mlx4_db_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x40cde3c8	mlx4_cq_resize
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x42286458	mlx4_srq_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x42308f79	mlx4_qp_release_range
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x4650076d	mlx4_qp_to_ready
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x4e1a4b12	mlx4_db_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x4e683ae4	mlx4_cq_modify
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x515e3158	mlx4_write_mtt
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x60e31521	mlx4_qp_modify
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x63bb0897	mlx4_multicast_attach
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x6587eb08	mlx4_mr_enable
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x7399f15c	mlx4_qp_remove
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x87091679	mlx4_fmr_enable
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x8fc42637	mlx4_register_interface
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9432f8e3	mlx4_qp_reserve_range
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa104e979	mlx4_buf_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa3654d2b	mlx4_register_vlan
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa3b0e6be	mlx4_buf_write_mtt
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa58636ee	mlx4_CLOSE_PORT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa63ce300	mlx4_alloc_hwq_res
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa6f67407	mlx4_srq_arm
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb053ec65	mlx4_multicast_detach
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb5445565	mlx4_INIT_PORT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb9270548	mlx4_fmr_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xbe201514	mlx4_qp_query
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc1297eb1	__mlx4_cmd
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc4adf1cd	mlx4_mr_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc705914e	mlx4_fmr_unmap
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc9ca9ed9	mlx4_free_cmd_mailbox
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xcc6a7325	mlx4_unregister_interface
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xcc9dd121	mlx4_srq_query
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xcd97916c	mlx4_srq_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd1cd0935	mlx4_uar_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xdc59920b	mlx4_mtt_cleanup
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe22cc9af	mlx4_pd_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe99fc09a	mlx4_cq_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xeb5f02ce	mlx4_alloc_cmd_mailbox
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf36f03fc	mlx4_buf_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf6333fd0	mlx4_mtt_init
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf6cd28b4	mlx4_map_phys_fmr
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf98d14da	mlx4_mr_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xfd6e17a3	mlx4_pd_free
+EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0xa9b4f1f7	usbnet_cdc_unbind
+EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0xcdd75f05	usbnet_generic_cdc_bind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x69a440a1	rndis_tx_fixup
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x9bdeb874	rndis_rx_fixup
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xa33ade33	generic_rndis_bind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xb4b34b27	rndis_unbind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xc3710a0b	rndis_status
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xf2567f95	rndis_command
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x149d3e52	usbnet_purge_paused_rxq
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x194e8317	usbnet_stop
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x19e96083	usbnet_disconnect
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x2312c256	usbnet_get_settings
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x289cb719	usbnet_defer_kevent
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x2db984de	usbnet_nway_reset
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x336b0dc4	usbnet_get_drvinfo
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x47aafc8d	usbnet_resume_rx
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x56267b01	usbnet_unlink_rx_urbs
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x6380df68	usbnet_get_msglevel
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x7b524127	usbnet_open
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x7c180d40	usbnet_change_mtu
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x7cde2afe	usbnet_skb_return
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x8ef2dc4c	usbnet_tx_timeout
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x97d7146d	usbnet_get_link
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x9ee3b332	usbnet_get_endpoints
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x9fff8a35	usbnet_set_msglevel
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xa72ad795	usbnet_set_settings
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xb1935e2a	usbnet_get_ethernet_addr
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xcdb6aa74	usbnet_suspend
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xcfaeb14f	usbnet_resume
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xd2128c35	usbnet_pause_rx
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xd7795c6d	usbnet_start_xmit
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xfa0f1e9f	usbnet_probe
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x05d60be3	i2400m_tx_msg_sent
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x182f25aa	i2400m_cmd_enter_powersave
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x2bdf9cd9	i2400m_cmd_get_state
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x3038bead	i2400m_queue_work
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x61716109	i2400m_netdev_setup
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x632b51a7	i2400m_tx
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x657e1562	i2400m_release
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x6a8c3e35	i2400m_rx
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x7721dee0	i2400m_setup
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x9c20237e	i2400m_dev_bootstrap
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xb00b793c	i2400m_bm_cmd_prepare
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xc96f66be	i2400m_set_init_config
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xe44b286b	i2400m_tx_msg_get
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xe54f8fd2	i2400m_dev_reset_handle
+EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0x1c820b19	libipw_debug_level
+EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0x8dd9b3cc	libipw_rx_any
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x1400ab91	lbs_add_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x274f129d	lbs_cmd_802_11_rate_adapt_rateset
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x4922eeb7	lbs_notify_command_response
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x87f6f519	lbs_cmd_copyback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x8e4f6ce4	lbs_stop_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xa1c0e001	lbs_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xac9aac01	lbs_remove_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xb27fb0cb	lbs_host_sleep_cfg
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xc8b2a8eb	lbs_host_to_card_done
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xca355799	__lbs_cmd
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xe244c06f	lbs_send_tx_feedback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xe6d3af27	lbs_process_rxed_packet
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf275f40c	lbs_queue_event
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf64277de	lbs_debug
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf7219360	lbs_start_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf8d771d5	lbs_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x72dd49de	lbtf_bcn_sent
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x7da5df86	lbtf_remove_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x7e00b7a3	lbtf_cmd_response_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x93cac9a3	lbtf_cmd_copyback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xd295ebf5	lbtf_add_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xd3eda44e	__lbtf_cmd
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xded94cd5	lbtf_send_tx_feedback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xf18b3633	lbtf_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0x65ad821e	if_usb_reset_device
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0xddfd3e16	if_usb_prog_firmware
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x0ab2d172	p54_parse_eeprom
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x12fd110b	p54_unregister_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x2c34ff76	p54_read_eeprom
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x4e2bab8a	p54_free_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x948bdd69	p54_init_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x99cd34d1	p54_free_skb
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xc3b68731	p54_parse_firmware
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xc937f7df	p54_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xd720ad3f	p54_register_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x064023f8	rt2x00lib_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x0e4a66e8	rt2x00mac_rfkill_poll
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x14a5956e	rt2x00mac_set_key
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x1771eb8c	rt2x00lib_beacondone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x1d5fed69	rt2x00queue_get_entry
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x2082c611	rt2x00lib_rxdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x231b799e	rt2x00mac_start
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x251682e3	rt2x00mac_bss_info_changed
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x350ccfe6	rt2x00mac_remove_interface
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x54ef840c	rt2x00lib_probe_dev
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x65ec4ad3	rt2x00mac_set_tim
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x76286938	rt2x00mac_get_tx_stats
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x7b135acc	rt2x00mac_stop
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x7cc72466	rt2x00queue_get_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x8091d69f	rt2x00mac_configure_filter
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x8d91b1d8	rt2x00mac_config
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x9d4af1d6	rt2x00mac_get_stats
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xa29c9fb8	rt2x00mac_conf_tx
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xaaa16f37	rt2x00lib_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xbb4bf520	rt2x00mac_tx
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xc347f335	rt2x00lib_txdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xc8e70673	rt2x00lib_remove_dev
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xcf563f47	rt2x00mac_add_interface
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xf73330a1	rt2x00queue_map_txskb
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x31b84cac	rt2x00pci_rxdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x47bdc1c4	rt2x00pci_uninitialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x49aca75f	rt2x00pci_write_tx_data
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x4c9bcd49	rt2x00pci_initialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x6055c550	rt2x00pci_remove
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x95f18e4e	rt2x00pci_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xb42a1deb	rt2x00pci_regbusy_read
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xd58ed3cf	rt2x00pci_probe
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xe75adf1e	rt2x00pci_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x0ab4a811	rt2x00usb_vendor_request
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x14239042	rt2x00usb_initialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x39bd7318	rt2x00usb_vendor_request_large_buff
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x3ff25237	rt2x00usb_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x5ef1f5a7	rt2x00usb_vendor_request_buff
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x5ef55984	rt2x00usb_vendor_req_buff_lock
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x65ad23ea	rt2x00usb_kick_tx_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x6c9d78bc	rt2x00usb_disable_radio
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x6d4f9f0c	rt2x00usb_probe
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x7d0479d3	rt2x00usb_regbusy_read
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x7eed3b75	rt2x00usb_clear_entry
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x9925ed8c	rt2x00usb_kill_tx_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xb1936dfe	rt2x00usb_uninitialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xb36560cb	rt2x00usb_write_tx_data
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xc433d82b	rt2x00usb_disconnect
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xece6ed28	rt2x00usb_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0x58337bea	wl1251_alloc_hw
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0x846eb461	wl1251_init_ieee80211
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0xc0acc9c0	wl1251_free_hw
+EXPORT_SYMBOL_GPL drivers/pci/hotplug/acpiphp 0x3c3f5419	acpiphp_register_attention
+EXPORT_SYMBOL_GPL drivers/pci/hotplug/acpiphp 0xce81142c	acpiphp_unregister_attention
+EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0xd6483f43	pcf50633_mbc_get_status
+EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0xd6bd3c56	pcf50633_mbc_usb_curlim_set
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x1653410f	wm8350_isink_set_flash
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x360b3e32	wm8350_ldo_set_slot
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x6311d258	wm8350_register_led
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x703956ec	wm8350_register_regulator
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x9a8d886e	wm8350_dcdc_set_slot
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xd9976fd5	wm8350_dcdc25_set_mode
+EXPORT_SYMBOL_GPL drivers/regulator/wm8400-regulator 0x8d521125	wm8400_register_regulator
+EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x374c1e1c	fcoe_wwn_from_mac
+EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0xf3066304	fcoe_libfc_config
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0233f349	iscsi_pool_init
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0725d1ed	iscsi_itt_to_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0acb5438	iscsi_conn_start
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0bf54feb	iscsi_conn_send_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0e46105b	iscsi_suspend_tx
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x2f133447	iscsi_put_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x312fe715	iscsi_verify_itt
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x36097422	iscsi_conn_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x374e0b35	iscsi_host_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x3f9f3ef9	iscsi_session_recovery_timedout
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x41ba1d14	iscsi_pool_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x46a3b5f2	__iscsi_complete_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4ae9c094	iscsi_session_failure
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4e4e2166	__iscsi_get_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5162ce08	iscsi_eh_device_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5956b6f1	iscsi_conn_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x59b9f1c0	iscsi_change_queue_depth
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5d89ba19	iscsi_host_remove
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x6914808e	iscsi_complete_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x6a700a0e	iscsi_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x73df0a49	iscsi_conn_stop
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x770572fc	iscsi_queuecommand
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x77cdb621	iscsi_set_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x7b2aaa3f	iscsi_host_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x7c6cea27	iscsi_eh_target_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x7e2aad19	iscsi_complete_scsi_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x86b03f51	iscsi_requeue_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x9565ab99	iscsi_host_set_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xac37e383	iscsi_suspend_queue
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xac8a6027	iscsi_session_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xba3e21f7	iscsi_eh_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xc7af8bc2	iscsi_conn_failure
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xc7fca8af	iscsi_session_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xc8465d47	iscsi_session_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xdb0e71a4	iscsi_conn_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe2e90df1	iscsi_conn_bind
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe888705b	iscsi_conn_queue_work
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe8a99d5f	iscsi_prep_data_out_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xeda7f709	iscsi_host_add
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf2c23ed1	iscsi_itt_to_ctask
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf653ccfa	iscsi_update_cmdsn
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xff139145	iscsi_host_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x1e31ad5a	iscsi_tcp_task_init
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x2786cba2	iscsi_tcp_conn_get_stats
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x2fb8e9b5	iscsi_segment_seek_sg
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x328d13c3	iscsi_tcp_segment_unmap
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x506662bd	iscsi_segment_init_linear
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x63192cee	iscsi_tcp_task_xmit
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x7107aea1	iscsi_tcp_r2tpool_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x7248b7ae	iscsi_tcp_hdr_recv_prep
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x803a7212	iscsi_tcp_segment_done
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x812c03e1	iscsi_tcp_conn_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x81b51324	iscsi_tcp_cleanup_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x84defd80	iscsi_tcp_recv_segment_is_hdr
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xb2379ebd	iscsi_tcp_recv_skb
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xc566a271	iscsi_tcp_r2tpool_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xe4e89d01	iscsi_tcp_conn_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xe71c0fff	iscsi_tcp_dgst_header
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x02b4a935	sas_slave_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x1b4d323b	sas_target_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x3469ad0f	sas_queuecommand
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x3a04680d	sas_eh_device_reset_handler
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x3f54d550	__sas_task_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x638385e5	sas_unregister_ha
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x63d38fb7	sas_phy_enable
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x6f6d3605	sas_task_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x7ee5e537	sas_slave_configure
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x8072dd1c	sas_change_queue_type
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x849104c4	sas_eh_bus_reset_handler
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x9158bd45	sas_domain_release_transport
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x945ed8d4	sas_phy_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x9cd116a3	sas_domain_attach_transport
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xa0c7f792	sas_ioctl
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xa3091d5f	sas_ssp_task_response
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xb8e8d070	sas_register_ha
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xc53cf23c	sas_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xc5f9162d	sas_bios_param
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xc9d0cfea	sas_request_addr
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xce24934a	sas_change_queue_depth
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xe07c25f5	sas_find_local_phy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xefe0da61	sas_slave_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x5736d74e	srp_cmd_queue
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x624a17fc	srp_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x7a83613c	srp_iu_get
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x9f4bc0a7	srp_transfer_data
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xe90ae256	srp_iu_put
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xf49c1a84	srp_target_free
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x115c5550	scsi_tgt_tsk_mgmt_request
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x3c28758b	scsi_tgt_queue_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x6404eccf	scsi_host_put_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x8882e1a8	scsi_tgt_alloc_queue
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x89dd2a0a	scsi_tgt_it_nexus_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x9d64442a	scsi_tgt_cmd_to_host
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xbcbeab1f	scsi_host_get_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xf2b66570	scsi_tgt_it_nexus_create
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xfebd2a57	scsi_tgt_free_queue
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x11d78e90	iscsi_offload_mesg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x2a91cd3a	iscsi_conn_error_event
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x33e1949c	iscsi_destroy_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x45b6b915	iscsi_create_conn
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x4db01c01	iscsi_alloc_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x788f4d12	iscsi_host_for_each_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x7f160eb1	iscsi_lookup_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x8e898e8a	iscsi_unregister_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x95ddf05b	iscsi_session_event
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x98aa165b	iscsi_destroy_conn
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x9a2f6767	iscsi_register_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x9b3f11b2	iscsi_add_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x9efc80db	iscsi_remove_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xb2755f3b	iscsi_scan_finished
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xb9a3da5b	iscsi_recv_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xd1b0b2e2	iscsi_create_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xd435dbe0	iscsi_session_chkready
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xd8fd4f88	iscsi_unblock_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xeb81f0bb	iscsi_free_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xef23ac41	iscsi_destroy_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xfe0db61b	iscsi_block_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xff0effff	iscsi_create_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0x0ef06974	spi_populate_ppr_msg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xa0c71dac	spi_populate_sync_msg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xcffa2aff	spi_populate_width_msg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x1a095dfa	srp_rport_add
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x342e798f	srp_rport_del
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x53328b63	srp_remove_host
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x887e30cd	srp_attach_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xa3d81d2e	srp_release_transport
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x466cc29d	spi_bitbang_setup_transfer
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x4a96c561	spi_bitbang_stop
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x655ced4a	spi_bitbang_setup
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xc18d11a7	spi_bitbang_cleanup
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xdb59fc02	spi_bitbang_start
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xff163e8b	spi_bitbang_transfer
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x4740fc22	comedi_usb_auto_config
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x4e4b42d1	comedi_free_board_minor
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x656c3316	comedi_alloc_board_minor
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x813c41b0	comedi_pci_auto_unconfig
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xa940cf72	comedi_get_device_file_info
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xb5725623	comedi_usb_auto_unconfig
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xc57fdaf4	comedi_pci_auto_config
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/das08 0x86fcde20	das08_cs_boards
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/das08 0xa8403a06	das08_common_detach
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/das08 0xbd5c7f77	das08_common_attach
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0x10252a12	labpc_common_attach
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0x25e55b95	labpc_1200_is_unipolar
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0x8285332a	range_labpc_1200_ai
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0xaf1e4347	labpc_1200_ai_gain_bits
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0xb2df656a	labpc_common_detach
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x72d1ecfc	ni_tio_init_counter
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x88e18c67	ni_tio_insn_config
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x8de73efb	ni_tio_set_gate_src
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xbc603c7b	ni_tio_rinsn
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xcb918584	ni_tio_arm
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xda8e3743	ni_tio_winsn
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xe7bb07e7	ni_gpct_device_construct
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xf63a1706	ni_gpct_device_destroy
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x0881c06a	ni_tio_acknowledge_and_confirm
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x1ae54024	ni_tio_set_mite_channel
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x6960325b	ni_tio_cancel
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0xb020fb42	ni_tio_cmdtest
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0xe564e1a6	ni_tio_handle_interrupt
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0xf84c460c	ni_tio_cmd
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x2468ed34	oslec_hpf_tx
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x579d2806	oslec_snapshot
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x587711de	oslec_create
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x882d5f27	oslec_adaption_mode
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xf828c15b	oslec_flush
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xf923a5b1	oslec_free
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xfabc3747	oslec_update
+EXPORT_SYMBOL_GPL drivers/staging/hv/hv_vmbus 0x0a1ee779	osd_WaitEventWait
+EXPORT_SYMBOL_GPL drivers/staging/hv/hv_vmbus 0x4cc1b61c	osd_WaitEventCreate
+EXPORT_SYMBOL_GPL drivers/staging/hv/hv_vmbus 0x5432d87a	osd_WaitEventSet
+EXPORT_SYMBOL_GPL drivers/staging/hv/hv_vmbus 0x746d1786	osd_PageAlloc
+EXPORT_SYMBOL_GPL drivers/staging/hv/hv_vmbus 0x83911c38	osd_PageFree
+EXPORT_SYMBOL_GPL drivers/staging/hv/hv_vmbus 0xa1b8d1ad	osd_WaitEventWaitEx
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x000b9d38	usbip_event_happened
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x17db25c4	usbip_start_threads
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x187caa54	dev_attr_usbip_debug
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x243ef0a3	usbip_xmit
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x33ed1c6b	usbip_pack_pdu
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x53bc8597	usbip_start_eh
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x646f4737	usbip_recv_xbuff
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x730aa269	usbip_stop_threads
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x78b72f44	usbip_debug_flag
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xa9b854a6	usbip_pad_iso
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xb13b3d55	usbip_dump_urb
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xb60c874a	usbip_stop_eh
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xcc575f6e	usbip_recv_iso
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xd02753dc	usbip_header_correct_endian
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xd51168f0	usbip_task_init
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xda0da877	usbip_alloc_iso_desc_pdu
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xdf2531ad	sockfd_to_socket
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xe1ea0586	usbip_dump_header
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xff18ad38	usbip_event_add
+EXPORT_SYMBOL_GPL drivers/uio/uio 0x09fe0eda	uio_unregister_device
+EXPORT_SYMBOL_GPL drivers/uio/uio 0xc3cd2c4e	__uio_register_device
+EXPORT_SYMBOL_GPL drivers/uio/uio 0xedd4ae42	uio_event_notify
+EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0x62260897	usbatm_usb_probe
+EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0xf2ad58a3	usbatm_usb_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x01566150	usb_ftdi_elan_edset_single
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x0e1e554e	usb_ftdi_elan_edset_flush
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x2a7f9a7d	usb_ftdi_elan_edset_output
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x54409de9	ftdi_elan_gone_away
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x965ec5c4	usb_ftdi_elan_edset_empty
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xb77509e5	usb_ftdi_elan_edset_input
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xd45791fd	usb_ftdi_elan_write_pcimem
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xde11f8b1	usb_ftdi_elan_edset_setup
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xfbccb9f8	usb_ftdi_elan_read_pcimem
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x09c752ff	usb_serial_probe
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x1a89145f	usb_serial_port_softint
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x2ec6cb33	usb_serial_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x31ee8cc8	usb_serial_generic_resume
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x420634cb	usb_serial_generic_write
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x572cf866	ezusb_set_reset
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x5da541fa	ezusb_writememory
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x673c46b1	usb_serial_generic_resubmit_read_urb
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x7b984931	usb_serial_deregister
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x85ed1847	usb_serial_register
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x9947f9b0	usb_serial_generic_read_bulk_callback
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xab8399e1	usb_serial_handle_break
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xac255683	usb_serial_handle_dcd_change
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xc2b90686	usb_serial_generic_open
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xcc8e57c5	usb_serial_handle_sysrq_char
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xf55e5c01	usb_serial_generic_write_bulk_callback
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x0be13004	usb_storage_usb_ids
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x10e26bc1	usb_stor_suspend
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1bc3edc2	usb_stor_sense_invalidCDB
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1c33ac90	usb_stor_transparent_scsi_command
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x278a9162	usb_stor_clear_halt
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x38158265	usb_stor_Bulk_transport
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x527ee8bc	fill_inquiry_response
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x5813887a	usb_stor_probe1
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x5b889a3f	usb_stor_CB_transport
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x5d2c09ef	usb_stor_pre_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x6f7f00fd	usb_stor_reset_resume
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x837b7df2	usb_usual_ignore_device
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x8b646c07	usb_stor_ctrl_transfer
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xa42eac36	usb_stor_resume
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xb0883d95	usb_stor_Bulk_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xb4f39b03	usb_stor_bulk_transfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xbee68a2e	usb_stor_probe2
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xc56a8188	usb_stor_post_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xc99b1456	usb_stor_set_xfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xd7e4184f	usb_stor_bulk_srb
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xe33537bd	usb_stor_control_msg
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xec21447b	usb_stor_bulk_transfer_sg
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xf3089095	usb_stor_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xf6a4bce1	usb_stor_access_xfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xfab087ce	usb_stor_CB_reset
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x55ac5608	wa_urb_dequeue
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x5b0fc154	wa_urb_enqueue_run
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x5c763594	wa_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x8668d134	rpipe_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x9fcf8265	__wa_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xa2a79ba9	rpipe_ep_disable
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xec5cc785	wa_urb_enqueue
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x0bb6bf5e	wusb_cluster_id_get
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x182bb06e	__wusb_dev_get_by_usb_dev
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x1cf62d01	wusbhc_rh_start_port_reset
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x52510d61	wusbhc_b_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x6a60b756	wusbhc_chid_set
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x6cad9a0d	wusbhc_reset_all
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x71675aa9	wusbhc_rh_status_data
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x8a9e30a9	wusbhc_rh_resume
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xa75d65ea	wusbhc_mmcie_set
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xa9e49217	wusbhc_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb016365a	wusbhc_rh_suspend
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb725d128	wusb_cluster_id_put
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xc08cd390	wusbhc_handle_dn
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xd1d1a05f	wusbhc_b_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xd45d8296	wusbhc_rh_control
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xdf6e4f08	wusb_dev_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xe996affc	wusbhc_giveback_urb
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf770a6b4	wusbd
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf7cf8d9a	wusbhc_mmcie_rm
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf90067c8	wusbhc_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xfe2e17d7	wusb_et_name
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x1ec38ee5	i1480_rceb_check
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x4fa3fc9c	i1480_cmd
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0xea7f0e2a	i1480_fw_upload
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x1baa5ae4	uwb_pca_base_priority_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x4accec22	uwb_rts_cts_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x5e666737	uwb_phy_rate_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x9607cca3	uwb_ack_policy_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x9a2524f8	uwb_rts_cts_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xbb27f85a	uwb_phy_rate_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xeb45e333	uwb_pca_base_priority_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xf625bd31	uwb_ack_policy_store
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x113eb73a	umc_match_pci_id
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x3862039e	umc_device_create
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xa9470df0	umc_bus_type
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xb3c183b2	umc_device_register
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xbe705fa5	umc_driver_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xc458ba3a	umc_device_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xde2af4c3	__umc_driver_register
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xfd65029d	umc_controller_reset
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x02e16a09	uwb_radio_start
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x05f05757	uwb_rsv_destroy
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0af9fb31	uwb_rc_init
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x128ae03e	uwb_rsv_modify
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x1d0f80a8	uwb_rc_pre_reset
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2075ba81	uwb_pal_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x22dc0c80	uwb_radio_stop
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x235bb961	uwb_rsv_create
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2400fa97	uwb_rc_rm
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2cb8fcbf	uwb_dev_try_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x449cac9b	uwb_rc_ie_rm
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x469c5f2d	uwb_rc_reset_all
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4d57ae3c	uwb_rsv_type_str
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x51d1fd37	__uwb_rc_try_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5596a9f6	uwb_rc_cmd_async
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x58554226	uwb_rc_cmd
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x58eff876	uwb_notifs_deregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5c091b6f	uwb_rc_alloc
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x63dce779	uwb_rc_ie_add
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6b9377c5	uwb_ie_next
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6bcd28f0	uwb_rc_neh_error
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6dd7d926	uwb_dev_for_each
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x7f1e50ca	uwb_est_find_size
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x8244afea	uwb_rc_mac_addr_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x85417e20	uwb_notifs_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x8cb42db6	__uwb_addr_print
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x969f738b	uwb_pal_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x98413234	uwb_rsv_state_str
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa5fd908c	uwb_rc_get_by_grandpa
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xafb014ec	uwb_pal_init
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb0a09251	uwb_rsv_get_usable_mas
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb56d816f	uwb_rc_vcmd
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb94bcc7e	uwb_rc_post_reset
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xbbb96d89	uwb_rsv_accept
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xbc96fded	uwb_rsv_establish
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xca3ff44b	uwb_rc_add
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd15729f4	uwb_rc_neh_grok
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd2e46760	uwb_rc_put
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd7692b0c	uwb_rc_get_by_dev
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xdb4f63df	uwb_rc_dev_addr_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xeb4cab9a	uwb_est_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf7ca313a	uwb_est_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xfa22f860	uwb_rsv_terminate
+EXPORT_SYMBOL_GPL drivers/uwb/whci 0x5408e067	whci_wait_for
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x0bce370f	wlp_dev_serial_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x0dd49b3e	wlp_neighborhood_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x12a31680	wlp_dev_model_name_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x1b36cfd0	wlp_dev_prim_subcat_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x1c8df7b0	wlp_dev_model_name_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x1d6589a6	wlp_dev_prim_subcat_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x32af0d9f	wlp_dev_manufacturer_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x40c61528	wlp_dev_name_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x42cc6b54	wlp_remove
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x52e6ad78	wlp_dev_model_nr_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x5a0c753c	wlp_eda_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x64599ec5	wlp_dev_prim_OUI_sub_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x689ec505	wlp_dev_prim_OUI_sub_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x6d43218b	wlp_wss_setup
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x76d1fede	wlp_prepare_tx_frame
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x78ebad88	wlp_receive_frame
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x7a0b3d3b	wlp_dev_prim_OUI_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x7a8cf3f8	wlp_dev_name_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x82ba0175	wlp_wss_activate_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x943c6c45	wlp_dev_prim_OUI_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x94661b4f	wlp_eda_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x996b06bc	wlp_uuid_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x9dfdd324	wlp_setup
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xa015dd8d	wlp_wss_remove
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xa70323b4	wlp_dev_manufacturer_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xac2c45b5	wlp_dev_prim_category_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xb26b9182	wlp_dev_prim_category_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xb8e56245	wlp_uuid_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xc2a8add4	wlp_wss_activate_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xc846c9b1	wlp_dev_model_nr_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xee02cf65	wlp_reset_all
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xf711cb48	wlp_dev_serial_store
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x11450619	ili9320_write_regs
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x213c6dc7	ili9320_shutdown
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x4683efae	ili9320_write
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x54d46523	ili9320_probe_spi
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xbf2fe6e8	ili9320_suspend
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xbfe08c7d	ili9320_remove
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xeec84eea	ili9320_resume
+EXPORT_SYMBOL_GPL drivers/video/fb_ddc 0xef688fda	fb_ddc_read
+EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0x6844a775	fb_sys_read
+EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0x97d30a82	fb_sys_write
+EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0x75258e81	sis_malloc_new
+EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0x8ae0a91a	sis_free_new
+EXPORT_SYMBOL_GPL drivers/video/vermilion/vmlfb 0x016e6c20	vmlfb_unregister_subsys
+EXPORT_SYMBOL_GPL drivers/video/vermilion/vmlfb 0x90c018c6	vmlfb_register_subsys
+EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x541f96d4	register_virtio_device
+EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x612db4f9	unregister_virtio_driver
+EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x866e4528	register_virtio_driver
+EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x8dd9d7f4	unregister_virtio_device
+EXPORT_SYMBOL_GPL drivers/virtio/virtio 0xec83e87f	virtio_check_driver_offered_feature
+EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x0ac0ab25	vring_interrupt
+EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x667e4758	vring_new_virtqueue
+EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x668d2276	vring_transport_features
+EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x68c71d40	vring_del_virtqueue
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x03d3d720	w1_next_pullup
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x05f85617	w1_touch_block
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x1e04bf02	w1_read_block
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x7c2f2afb	w1_calc_crc8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x9db4ab79	w1_reset_select_slave
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xe63ddb0e	w1_write_8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xee7f1cce	w1_reset_bus
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xf19fb0d9	w1_read_8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xfbebaec5	w1_write_block
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x0864c4a4	dlm_new_lockspace
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x0de5ddea	dlm_posix_unlock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x9321df95	dlm_lock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xa8343212	dlm_posix_lock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xcf9f3328	dlm_release_lockspace
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xdc583c08	dlm_unlock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xf24e636c	dlm_posix_get
+EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0x0f21b73b	exportfs_decode_fh
+EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0x699686e4	exportfs_encode_fh
+EXPORT_SYMBOL_GPL fs/fat/fat 0x043b28e1	fat_attach
+EXPORT_SYMBOL_GPL fs/fat/fat 0x08ede489	fat_fs_error
+EXPORT_SYMBOL_GPL fs/fat/fat 0x3468d170	fat_free_clusters
+EXPORT_SYMBOL_GPL fs/fat/fat 0x4e566f1b	fat_sync_inode
+EXPORT_SYMBOL_GPL fs/fat/fat 0x52ba06c2	fat_add_entries
+EXPORT_SYMBOL_GPL fs/fat/fat 0x58b76c98	fat_getattr
+EXPORT_SYMBOL_GPL fs/fat/fat 0x5f7805cf	fat_fill_super
+EXPORT_SYMBOL_GPL fs/fat/fat 0x62058865	fat_time_unix2fat
+EXPORT_SYMBOL_GPL fs/fat/fat 0x62d021f6	fat_scan
+EXPORT_SYMBOL_GPL fs/fat/fat 0x7a1a3b30	fat_remove_entries
+EXPORT_SYMBOL_GPL fs/fat/fat 0x7c7e5fc0	fat_get_dotdot_entry
+EXPORT_SYMBOL_GPL fs/fat/fat 0x7d9f2372	fat_flush_inodes
+EXPORT_SYMBOL_GPL fs/fat/fat 0x9fb395db	fat_setattr
+EXPORT_SYMBOL_GPL fs/fat/fat 0xa32f4394	fat_alloc_new_dir
+EXPORT_SYMBOL_GPL fs/fat/fat 0xb4ac2004	fat_build_inode
+EXPORT_SYMBOL_GPL fs/fat/fat 0xe69adb0c	fat_search_long
+EXPORT_SYMBOL_GPL fs/fat/fat 0xedf2aa3e	fat_dir_empty
+EXPORT_SYMBOL_GPL fs/fat/fat 0xfbbf2232	fat_detach
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x17ce645d	locks_end_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x1a618932	nlmsvc_unlock_all_by_ip
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x22b7c27a	nlmsvc_unlock_all_by_sb
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x433b2a2c	nlmclnt_done
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x4a3ed85f	nlmclnt_init
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x6f959b35	locks_in_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x96877ac4	locks_start_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xa7b91a7b	lockd_down
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xcf05ee15	nlmclnt_proc
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xf6933c48	lockd_up
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xf93fd837	nlmsvc_ops
+EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0x0310380f	nfsacl_decode
+EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0xb389ad43	nfsacl_encode
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1b89c6ee	o2hb_fill_node_map
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1d747ce3	o2hb_check_node_heartbeating
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x2b6b2db6	o2nm_node_put
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x36418553	o2net_send_message
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x45d0b066	o2hb_unregister_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x4900035b	o2hb_stop_all_regions
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x521e0726	o2net_send_message_vec
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x81a17396	mlog_and_bits
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x9e80bf02	o2nm_node_get
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa82a8645	o2nm_this_node
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa87bc9e7	o2nm_configured_node_map
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xad834f8e	o2nm_get_node_by_ip
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xae808bac	o2net_register_handler
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xb70536a7	o2nm_get_node_by_num
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xbaeb4700	o2hb_check_node_heartbeating_from_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xd26bb346	o2hb_register_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xd60f2c6c	o2hb_check_local_node_heartbeating
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf1a5611d	o2net_unregister_handler_list
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf56c2017	mlog_not_bits
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf88c724e	o2hb_setup_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x0cebb6e1	dlm_register_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x328717ed	dlm_register_domain
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x4b38cf12	dlmunlock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x7a1211f8	dlm_setup_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x83921c03	dlm_unregister_domain
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x8680f9c5	dlmlock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd7ba575e	dlm_errmsg
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd8fa57a6	dlm_unregister_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xdb802f89	dlm_print_one_lock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xfb86b96f	dlm_errname
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0562c415	ocfs2_cluster_this_node
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x06379db6	ocfs2_dlm_lvb_valid
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0b5fee49	ocfs2_stack_glue_unregister
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0e27f909	ocfs2_dlm_lock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x21db5b88	ocfs2_cluster_disconnect
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x233078e9	ocfs2_plock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4a1f6fe9	ocfs2_cluster_connect
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4d3af7fa	ocfs2_cluster_hangup
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x81c85a68	ocfs2_dlm_lock_status
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x882a3d27	ocfs2_stack_glue_register
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x91fab465	ocfs2_dlm_lvb
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x963932a3	ocfs2_stack_glue_set_locking_protocol
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xa7d5c1c0	ocfs2_dlm_unlock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xbbc4ef97	ocfs2_stack_supports_plocks
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xd066711e	ocfs2_dlm_dump_lksb
+EXPORT_SYMBOL_GPL lib/lzo/lzo_compress 0x2e1d43cf	lzo1x_1_compress
+EXPORT_SYMBOL_GPL lib/lzo/lzo_decompress 0x2a1538ca	lzo1x_decompress_safe
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x300d7e57	free_rs
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x6fbb3bd9	init_rs_non_canonical
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xabda1e2e	decode_rs16
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xb050f329	init_rs
+EXPORT_SYMBOL_GPL net/802/garp 0x2df795cb	garp_request_join
+EXPORT_SYMBOL_GPL net/802/garp 0x6855e2a4	garp_request_leave
+EXPORT_SYMBOL_GPL net/802/garp 0xadf765f3	garp_init_applicant
+EXPORT_SYMBOL_GPL net/802/garp 0xf6653d70	garp_register_application
+EXPORT_SYMBOL_GPL net/802/garp 0xfd4f0cc7	garp_uninit_applicant
+EXPORT_SYMBOL_GPL net/802/garp 0xffae2fd7	garp_unregister_application
+EXPORT_SYMBOL_GPL net/802/stp 0x99a9415e	stp_proto_unregister
+EXPORT_SYMBOL_GPL net/802/stp 0xfcde0b76	stp_proto_register
+EXPORT_SYMBOL_GPL net/ax25/ax25 0x77874b50	ax25_register_pid
+EXPORT_SYMBOL_GPL net/ax25/ax25 0xac93ae05	ax25_bcast
+EXPORT_SYMBOL_GPL net/ax25/ax25 0xaeb7451e	ax25_defaddr
+EXPORT_SYMBOL_GPL net/bluetooth/bluetooth 0xa8a98916	bt_class
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x0cb87407	dccp_rcv_established
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x0ea67ac2	dccp_check_req
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x11f798ee	dccp_getsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x16f5da87	dccp_ioctl
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x1d99d49a	dccp_timestamp
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x22ae8d61	dccp_reqsk_init
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x260d385f	dccp_send_ack
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x2e47fd4a	dccp_reqsk_send_ack
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x34e98bc7	compat_dccp_setsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x36687a6c	dccp_insert_option_elapsed_time
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x4614ea95	dccp_death_row
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x4768d704	dccp_set_state
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x4b96bd86	dccp_destroy_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x4cdd391d	dccp_feat_list_purge
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x51905f57	dccp_parse_options
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x55371007	dccp_child_process
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x56ea266a	dccp_state_name
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x5a895ef2	dccp_insert_option
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x5b0df908	dccp_close
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x6447a5b0	dccp_rcv_state_process
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x70b1d967	dccp_orphan_count
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x70daa304	dccp_ctl_make_reset
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x77d265f7	dccp_disconnect
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x79a62dcc	compat_dccp_getsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x86be7924	dccp_packet_name
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x8b7d8caf	dccp_statistics
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x8f69e660	dccp_shutdown
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x91a96fba	dccp_create_openreq_child
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x9c6d55da	dccp_hashinfo
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xa140c039	dccp_insert_option_timestamp
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xa4b4a52a	dccp_poll
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xb6c54765	dccp_sync_mss
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xbe15de7d	dccp_done
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xbf8a1e7f	dccp_connect
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xce835693	inet_dccp_listen
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xd78317a0	dccp_send_sync
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xd8551117	dccp_make_response
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xdd2d1823	dccp_setsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xee6754ca	dccp_sendmsg
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xf78c2ef6	dccp_recvmsg
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xfc0130f7	dccp_init_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x0339f119	dccp_v4_send_check
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x168216f2	dccp_v4_request_recv_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x3204f226	dccp_v4_do_rcv
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xc4132825	dccp_v4_connect
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xde96a45a	dccp_invalid_packet
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xe769ff76	dccp_v4_conn_request
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0x30329378	nf_nat_seq_adjust_hook
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0x6d40a921	need_ipv4_conntrack
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_defrag_ipv4 0x6b6c3d10	nf_defrag_ipv4_enable
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x07ae60b6	nf_nat_proto_in_range
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x0f25d432	nf_nat_proto_unique_tuple
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x5d0f0fe6	nf_nat_packet
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x67238ea3	nf_nat_proto_put
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x7977f0ed	nf_nat_get_offset
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x94a08134	nf_nat_proto_nlattr_to_range
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x98f5b728	nf_nat_proto_find_get
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xcb9bb464	nf_nat_proto_range_to_nlattr
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xf0b14bfa	nf_nat_icmp_reply_translation
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat_proto_gre 0x636b12c8	nf_nat_need_gre
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x229ebeba	tcp_vegas_pkts_acked
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x3a59868e	tcp_vegas_init
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x7954b537	tcp_vegas_get_info
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x93c24e36	tcp_vegas_cwnd_event
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xaf161426	tcp_vegas_state
+EXPORT_SYMBOL_GPL net/mac80211/mac80211 0x3259bf4d	ieee80211_iterate_active_interfaces
+EXPORT_SYMBOL_GPL net/mac80211/mac80211 0x92383faa	ieee80211_iterate_active_interfaces_atomic
+EXPORT_SYMBOL_GPL net/netfilter/ipvs/ip_vs 0xe6476b4a	net_vs_ctl_path
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x041013fd	nf_conntrack_lock
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x045072cd	nf_ct_port_nla_policy
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x154a292e	nf_conntrack_event_cb
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x2077b1d2	nf_conntrack_in
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x28f4ec26	nf_ct_l3proto_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x299046f1	nf_ct_expect_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x309ca94a	nf_conntrack_l4proto_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x31d7a7f0	nf_ct_expect_alloc
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x37d53f5a	nf_ct_get_tuplepr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3976a429	nf_conntrack_alter_reply
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3cd25e28	nf_ct_delete_from_lists
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3d20a943	nf_ct_expect_register_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3e7743ee	__nf_ct_expect_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3f5b1415	nf_ct_port_nlattr_to_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x40840727	nf_ct_nat_offset
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x428686b9	nf_conntrack_hash_insert
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4a867991	nf_conntrack_tuple_taken
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4b9065a9	nf_ct_alloc_hashtable
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x54580728	nf_ct_l3proto_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5882ba33	nf_conntrack_set_hashsize
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x59b8df88	nf_ct_remove_expectations
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x62813e5c	nf_ct_port_nlattr_tuple_size
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x63183b81	nf_ct_expect_unregister_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6b16c523	print_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6e224a7a	need_conntrack
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x71bba362	nf_conntrack_register_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x7309d6b2	nfnetlink_parse_nat_setup_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x78f9b710	nf_ct_l3proto_try_module_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8033d2b8	nf_conntrack_unregister_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x86e5a3a9	__nf_ct_kill_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x89dd373b	nf_conntrack_untracked
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8b94d4cd	nf_conntrack_l3proto_generic
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8d0b2045	nf_ct_extend_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8d2a946d	nf_conntrack_l4proto_tcp6
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8e5bc8fb	__nf_conntrack_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8ffe7e89	nf_conntrack_htable_size
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x90ff6c9f	nf_ct_invert_tuplepr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x936a1c51	nf_conntrack_helper_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x96a9ae5e	nf_conntrack_l3proto_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x979574a3	nf_conntrack_alloc
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9af3f6c1	nf_ct_free_hashtable
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9bd99000	nf_conntrack_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9eab639e	nf_ct_helper_ext_add
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xad24d83f	nf_ct_iterate_cleanup
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb602c57e	nf_ct_l3proto_module_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb676a7bb	nf_ct_deliver_cached_events
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb7385828	nf_ct_l3protos
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb874454e	nf_expect_event_cb
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xbe97395d	nf_conntrack_l3proto_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xbf1cf6ef	nf_conntrack_l4proto_tcp4
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xbf9a7ab1	nf_ct_expect_init
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc114900c	nf_ct_expect_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc18ac88d	nf_ct_expect_hsize
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xcd130ea3	nf_conntrack_l4proto_udp4
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xdaa6958c	nf_ct_unlink_expect
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xdc6d183c	__nf_conntrack_confirm
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xdc937347	__nf_ct_try_assign_helper
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xdd6f7a2b	nf_ct_invert_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xe3f09b8c	nf_ct_port_tuple_to_nlattr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xe5dd8622	seq_print_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xec784b37	__nf_conntrack_helper_find_byname
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf1d8a4af	nf_conntrack_l4proto_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf20e40e9	nf_ct_unexpect_related
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf38bcdf3	nf_conntrack_max
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf5059e17	nf_conntrack_free
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf78630ec	nf_ct_get_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf7ac1c09	nf_ct_insert_dying_list
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf7b16b06	nf_conntrack_helper_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf98bfd29	__nf_ct_l4proto_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xfd88c384	__nf_ct_refresh_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xfe924a5e	nf_ct_extend_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xfee2c47d	nf_ct_expect_related_report
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xff256c21	nf_conntrack_l4proto_udp6
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xffd006f1	nf_conntrack_flush_report
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_amanda 0xee062e75	nf_nat_amanda_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_ftp 0x79f922f1	nf_nat_ftp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x1aa6ccb3	set_h245_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x1fd415fe	set_sig_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x2a5b4aed	nat_rtp_rtcp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x461d9c45	set_h225_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x4fd989d9	set_ras_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xcad5788d	nat_t120_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xd0c28db8	nat_callforwarding_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xd8f32b48	get_h225_addr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xe5ba412b	nat_q931_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xf9d48b91	nat_h245_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_irc 0x25a4456c	nf_nat_irc_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x8c9ed242	nf_nat_pptp_hook_expectfn
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x9f97e732	nf_nat_pptp_hook_outbound
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0xbbf81833	nf_nat_pptp_hook_inbound
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0xef4ecfb6	nf_nat_pptp_hook_exp_gre
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_proto_gre 0x694cfa36	nf_ct_gre_keymap_add
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_proto_gre 0x97025e07	nf_ct_gre_keymap_destroy
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x191a1e02	nf_nat_sdp_media_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x550bf04e	nf_nat_sip_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x577b912a	ct_sip_get_header
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x6fc59583	ct_sip_parse_numerical_param
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x8835e61d	nf_nat_sip_expect_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x8c22bc74	ct_sip_parse_request
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xb32e9258	nf_nat_sdp_port_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xc9884685	ct_sip_get_sdp_header
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xc9c5fea0	nf_nat_sdp_session_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xcbe20bb4	ct_sip_parse_header_uri
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xed3ac1c8	nf_nat_sdp_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xfa8b732c	ct_sip_parse_address_param
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_tftp 0xc8190272	nf_nat_tftp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_tproxy_core 0x67919705	nf_tproxy_get_sock_v4
+EXPORT_SYMBOL_GPL net/netfilter/nf_tproxy_core 0xb91b8590	nf_tproxy_assign_sock
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x1f58e71b	nfnl_lock
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x2a95cb90	nfnetlink_subsys_register
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x3895cd7a	nfnl_unlock
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x81266848	nfnetlink_send
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x9fdcd051	nfnetlink_subsys_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xb1313202	nfnetlink_unicast
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xeca95329	nfnetlink_has_listeners
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xef9b4bbd	nfnetlink_set_err
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink_log 0x82bffa64	nfulnl_log_packet
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x0461861b	xt_proto_fini
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x0ff4c887	xt_proto_init
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x161d1417	xt_compat_unlock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x40728a63	xt_find_revision
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x43d19190	xt_request_find_target
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x469a21e9	xt_table_unlock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x4f432b51	per_cpu__xt_info_locks
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x4f5f999a	xt_compat_match_offset
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x532d245b	xt_find_table_lock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x588ab925	xt_replace_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x5f82f1f7	xt_compat_flush_offsets
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x617408f6	xt_compat_match_to_user
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x684694c5	xt_compat_add_offset
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x6f9aa2fb	xt_compat_calc_jump
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x8ea0f27f	xt_check_match
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x9f5c1656	xt_compat_target_from_user
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xa39adff3	xt_compat_target_offset
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xac9ff578	xt_compat_target_to_user
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xb0d16ab7	xt_unregister_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xded6fbf1	xt_check_target
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xe03b1c81	xt_register_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xe0b4971b	xt_compat_lock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xf5c8286a	xt_compat_match_from_user
+EXPORT_SYMBOL_GPL net/netfilter/xt_RATEEST 0xc2429b63	xt_rateest_lookup
+EXPORT_SYMBOL_GPL net/netfilter/xt_RATEEST 0xfc852663	xt_rateest_put
+EXPORT_SYMBOL_GPL net/rds/rds 0x00a467af	rds_wq
+EXPORT_SYMBOL_GPL net/rds/rds 0x2c5c5514	rds_message_add_rdma_dest_extension
+EXPORT_SYMBOL_GPL net/rds/rds 0x2d0ff6e2	rds_message_put
+EXPORT_SYMBOL_GPL net/rds/rds 0x3101936e	rds_message_add_extension
+EXPORT_SYMBOL_GPL net/rds/rds 0x3e6e753e	rds_info_copy
+EXPORT_SYMBOL_GPL net/rds/rds 0x48f3f275	rds_page_copy_user
+EXPORT_SYMBOL_GPL net/rds/rds 0x4b7fdf43	rds_send_get_message
+EXPORT_SYMBOL_GPL net/rds/rds 0x57dec865	rds_conn_create
+EXPORT_SYMBOL_GPL net/rds/rds 0x62cc24cf	rds_message_addref
+EXPORT_SYMBOL_GPL net/rds/rds 0x708efe06	rds_conn_drop
+EXPORT_SYMBOL_GPL net/rds/rds 0x73aac73d	rds_message_populate_header
+EXPORT_SYMBOL_GPL net/rds/rds 0x7d615943	rds_conn_create_outgoing
+EXPORT_SYMBOL_GPL net/rds/rds 0x85844b66	rds_rdma_send_complete
+EXPORT_SYMBOL_GPL net/rds/rds 0x87eae598	rds_trans_unregister
+EXPORT_SYMBOL_GPL net/rds/rds 0x885b03db	rds_cong_map_updated
+EXPORT_SYMBOL_GPL net/rds/rds 0x90a7c3f9	rds_info_register_func
+EXPORT_SYMBOL_GPL net/rds/rds 0x9b3e6113	per_cpu__rds_stats
+EXPORT_SYMBOL_GPL net/rds/rds 0xa9a697cc	rds_info_deregister_func
+EXPORT_SYMBOL_GPL net/rds/rds 0xb41161b8	rds_connect_complete
+EXPORT_SYMBOL_GPL net/rds/rds 0xbfd2ef6a	rds_conn_destroy
+EXPORT_SYMBOL_GPL net/rds/rds 0xc2da8e38	rds_stats_info_copy
+EXPORT_SYMBOL_GPL net/rds/rds 0xc68fd6b6	rds_inc_addref
+EXPORT_SYMBOL_GPL net/rds/rds 0xc7e4e60f	rds_recv_incoming
+EXPORT_SYMBOL_GPL net/rds/rds 0xcadc9a40	rds_message_unmapped
+EXPORT_SYMBOL_GPL net/rds/rds 0xd3e001b1	rds_for_each_conn_info
+EXPORT_SYMBOL_GPL net/rds/rds 0xd8b66752	rds_inc_put
+EXPORT_SYMBOL_GPL net/rds/rds 0xd9dad4b6	rds_inc_init
+EXPORT_SYMBOL_GPL net/rds/rds 0xdcd92242	rds_trans_register
+EXPORT_SYMBOL_GPL net/rds/rds 0xeba93fc1	rds_send_drop_acked
+EXPORT_SYMBOL_GPL net/rxrpc/af-rxrpc 0x64760b1f	rxrpc_unregister_security
+EXPORT_SYMBOL_GPL net/rxrpc/af-rxrpc 0x77c8519c	rxrpc_register_security
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x00c52ef5	g_make_token_header
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x021b9b27	svcauth_gss_flavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x06863eaf	gss_mech_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x2a404825	gss_mech_put
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x3848a457	gss_mech_get
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x467c46b9	gss_pseudoflavor_to_service
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x46a24ba9	gss_mech_get_by_name
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x69881eba	gss_service_to_auth_domain_name
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x6c2ff54b	gss_mech_register
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x8d1a827e	svcauth_gss_register_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xb5dea7ef	g_token_size
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xb64bf8fb	svc_gss_principal
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xc73bec46	gss_svc_to_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xeabc090b	gss_mech_get_by_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xf8b2ff6e	g_verify_token_header
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x02d6f23a	xprt_set_retrans_timeout_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x036edf7e	svc_xprt_put
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x03dc05be	svc_unreg_xprt_class
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x047cd06a	cache_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x057a2788	rpc_wake_up_queued_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x05e807a9	xdr_encode_string
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x065994f1	xdr_encode_opaque_fixed
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x06d9bd07	svc_sock_update_bufs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0b62ee93	svc_wake_up
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0b8f8ac6	xdr_encode_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0efcda21	rpc_pton
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0f0e27b2	svc_sock_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0f668ba9	svc_auth_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x104edd8e	xdr_buf_subsegment
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x10b80c8f	rpc_alloc_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x12e280e3	svc_proc_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x13a9503a	xprt_release_rqst_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x159fff37	rpc_killall_tasks
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1746ef59	rpc_malloc
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1d86f32a	svc_close_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x21e5e742	xdr_skb_read_bits
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x23e180b0	rpcauth_lookup_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2474a65b	unix_domain_find
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2588f3f8	rpc_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x27284360	xdr_buf_read_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x27d02c02	rpcauth_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2919b156	xdr_decode_string_inplace
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2a432b3b	xdr_encode_array2
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2aa17774	rpc_free_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2b3c27b2	xdr_enter_page
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2b5974ab	svc_set_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2d32d62b	rpc_bind_new_program
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2d4b7939	svc_exit_thread
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2edf64b3	auth_unix_add_addr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2eec63c9	xdr_encode_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2ef4f372	sunrpc_cache_register_pipefs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x30a6df09	svc_print_addr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x31a89d59	rpc_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x37635301	rpc_lookup_machine_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3a22f40c	xdr_shift_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3cbb932d	sunrpc_cache_pipe_upcall
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3d33629f	svc_recv
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3d775970	rpc_restart_call_prepare
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x41cf8258	svc_xprt_copy_addrs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x42636af0	rpc_peeraddr2str
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x43199ef4	xdr_inline_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x48dd60f1	svc_destroy
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4b941b16	svc_drop
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x51ac0206	xprt_register_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5235548a	rpc_queue_upcall
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x53445f68	nlm_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5401b44d	xdr_write_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5495fef5	xprt_set_retrans_timeout_def
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x550547a3	rpc_destroy_wait_queue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x56f33620	svc_set_num_threads
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x58619f21	svc_xprt_names
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x58c861d4	rpcauth_generic_bind_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5b14ec1a	rpc_put_mount
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5b65960a	xprt_reserve_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5bd26000	rpc_proc_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5c01d94d	xdr_process_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5d0f96f0	rpc_print_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x60c2503f	xprt_reserve_xprt_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x625c8d9a	rpc_unlink
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x62fbbe35	svc_create_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x63b77690	svc_create_pooled
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x675524ec	rpc_sockaddr2uaddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x67e57eab	xprt_update_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x681e91cb	rpc_clone_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x69040610	auth_domain_find
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6b93b9c0	rpc_call_async
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6c5304c5	rpcb_getport_sync
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6c7eaa83	rpc_restart_call
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6d923f0d	rpc_lookup_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6eea229d	svcauth_unix_purge
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7179676a	xprt_wait_for_buffer_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x71fa908a	cache_flush
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7231219c	rpc_ntop
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x726a961e	rpc_setbufsize
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x763139e5	svc_max_payload
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x775adaf6	rpc_uaddr2sockaddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x78456da9	svc_seq_show
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7bc83bc9	svc_xprt_received
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7bcc5d65	__rpc_wait_for_completion_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7db2d1a1	rpc_sleep_on
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7de53067	rpc_init_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7e02cf0e	rpc_max_payload
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7ed114dd	cache_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8228bf3a	xprt_wake_pending_tasks
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x832368b6	xdr_partial_copy_from_skb
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x834ab254	xdr_read_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x834f5aea	xprt_release_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x83833618	svc_sock_names
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x83b448a3	xprt_write_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x83d1e3e0	xdr_encode_word
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x846a9530	xprt_disconnect_done
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x84ed8835	svc_find_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x85871cc4	svc_auth_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8c632ea5	svcauth_unix_set_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x91c182c1	xprt_complete_rqst
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9c53f5f3	rpc_get_mount
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9d33b43b	svc_reg_xprt_class
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9d93a4f5	auth_unix_forget_old
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9e5be81f	csum_partial_copy_to_xdr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9e82784b	rpcb_getport_async
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9f5b3163	rpcauth_init_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9f9039c2	svc_authenticate
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa0975289	sunrpc_cache_unregister_pipefs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa2a1662c	rpc_put_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa7ecf948	xprt_release_xprt_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa9a4cfcc	svc_process
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa9c87b97	svc_reserve
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xab0aec83	xdr_reserve_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xab46efab	cache_check
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xaca90452	rpc_proc_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xaf10d86e	rpc_shutdown_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xaf5bf6ef	nfs_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb0b856d0	rpc_peeraddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb0c48571	rpc_wake_up_next
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb1adda67	svc_xprt_enqueue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb387b246	rpc_wake_up_status
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb38dddba	svc_prepare_thread
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb41e7596	auth_unix_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb5de6b1b	xprt_lookup_rqst
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb7a3432e	rpc_call_start
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb9584646	sunrpc_cache_update
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbd3587c1	svc_addsock
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbf9d1b96	nfsd_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbf9e74b0	rpc_delay
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc0ab7006	xdr_buf_from_iov
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc100319d	xprt_unregister_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc12435e3	rpc_calc_rto
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc3880471	xdr_decode_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc38a4f5f	rpcauth_init_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc554b883	cache_purge
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc8761037	auth_domain_put
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc8d6ef87	svc_proc_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc8e96dea	qword_addhex
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcbfe48bc	rpc_force_rebind
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xccef8807	rpcauth_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcde83c52	auth_domain_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xced50705	svc_sock_destroy
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcee467f3	xprt_load_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd0660354	xdr_decode_word
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd35c871d	rpc_exit_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd3a9f354	put_rpccred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd82c728e	rpc_init_wait_queue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd954f8db	xdr_init_encode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd9584b4a	xdr_init_decode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdaa1c475	xdr_inline_decode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdc71c4e3	svc_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdd535ff5	rpcauth_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe54fe3a1	rpc_call_sync
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe5919cb1	xdr_encode_opaque
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe97f4ce5	qword_get
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe9839b2c	rpc_run_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe987dcec	xdr_decode_array2
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xea1c12be	sunrpc_cache_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xebee6055	svc_xprt_init
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xed053c75	rpcauth_destroy_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xedcf6be4	qword_add
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xedd1ba52	rpc_wake_up
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xeeacab69	rpc_update_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf100a801	read_bytes_from_xdr_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf792d4ad	rpc_call_null
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf9003938	xprt_adjust_cwnd
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf90bb2b1	rpc_mkpipe
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf9d1164c	rpc_free
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x08bac80f	wimax_state_get
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x0de583f8	wimax_dev_rm
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x3d75ac8f	wimax_msg_data_len
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x6ca02d67	wimax_dev_add
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x87fa3f13	wimax_report_rfkill_sw
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x94c8847b	wimax_report_rfkill_hw
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x997fc740	wimax_msg_alloc
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x9f0d0082	wimax_dev_init
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xae49eb02	wimax_state_change
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xcc3f7b14	wimax_msg_send
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xe103f8c2	wimax_msg_data
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xe45f3849	wimax_msg_len
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xf026300d	wimax_msg
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x07906932	cfg80211_wext_giwauth
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x16ababcf	cfg80211_wext_giwretry
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x184b5d6c	cfg80211_wext_siwretry
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x220fb6da	cfg80211_wext_siwscan
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x256ba6e8	cfg80211_wext_giwap
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x3b7cf5bd	cfg80211_wext_giwname
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x3ceef83a	cfg80211_wext_siwauth
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x3ea9b01a	cfg80211_wext_giwrange
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x423ea11f	cfg80211_wext_siwfrag
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x4ed1dc72	cfg80211_wext_siwap
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x5355ec00	cfg80211_wext_giwscan
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x79403017	cfg80211_wext_giwfrag
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x8480954c	cfg80211_wext_giwessid
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x8632f7e5	cfg80211_wext_siwtxpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x8a6063ef	cfg80211_wext_siwessid
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xa1e8a59b	cfg80211_wext_siwencode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xa25d2315	cfg80211_wext_siwmode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xa4b0790e	cfg80211_wireless_stats
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xa817f67e	cfg80211_wext_giwmode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xaf65b0fc	cfg80211_wext_siwgenie
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xbc0d44c7	cfg80211_wext_siwmlme
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xbfe0b091	cfg80211_wext_giwtxpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xc157eb32	cfg80211_wext_siwpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xc6e4fea4	cfg80211_wext_giwfreq
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xcfb71d91	cfg80211_wext_giwpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xd6553e84	cfg80211_wext_siwfreq
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xde8bdd96	cfg80211_wext_giwrate
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xe5743af3	cfg80211_wext_giwrts
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xe5f54c9e	cfg80211_wext_siwrate
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xee39b73f	cfg80211_wext_giwencode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xf5c5fad3	cfg80211_wext_siwrts
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xfe304ef6	cfg80211_wext_siwencodeext
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x64b33586	ipcomp_output
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x8c3f3363	ipcomp_init_state
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x983d40e5	ipcomp_destroy
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0xf68ddfb3	ipcomp_input
+EXPORT_SYMBOL_GPL sound/core/snd-pcm 0xa286a234	snd_pcm_format_name
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x07c43a2c	snd_hda_codec_write_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0a2373e5	snd_hda_add_vmaster
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0e4ba444	snd_hda_delete_codec_preset
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0ec2a7ad	snd_hda_set_vmaster_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0f0a04ca	snd_hda_get_bool_hint
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x10c46707	snd_hda_parse_pin_def_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x11643473	snd_hda_check_board_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x14fe9803	snd_hda_multi_out_dig_prepare
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1690c8d4	snd_hda_suspend
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x202866b2	snd_hda_mixer_bind_ctls_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x21da4a16	snd_hda_load_patch
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x230463dc	snd_hda_create_spdif_out_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x25eac466	snd_hda_codec_set_pincfg
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2a5d831a	snd_hda_add_new_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2d3880fb	snd_hda_create_spdif_in_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2e3f071b	snd_hda_mixer_bind_ctls_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x30334364	snd_hda_codec_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x33a2a126	snd_hda_ch_mode_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x351f13da	snd_hda_mixer_bind_ctls_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x36059787	snd_hda_multi_out_analog_cleanup
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x37452116	snd_hda_codec_read
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3a828410	snd_hda_input_mux_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4068e9c8	snd_hda_codec_setup_stream
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x42341f89	snd_hda_get_hint
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x52f4f343	snd_hda_is_supported_format
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5418a47d	snd_hda_find_mixer_ctl
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x592bb274	snd_hda_queue_unsol_event
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5a4550a4	snd_hda_power_up
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5ae76f73	auto_pin_cfg_labels
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5d2a4fd9	snd_hda_codec_write
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6b733560	snd_hda_codec_cleanup_stream
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x719ed6d3	snd_hda_mixer_bind_switch_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x725267da	snd_hda_build_pcms
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x72e5fec0	snd_hda_attach_beep_device
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7a7dc76e	snd_hda_check_amp_list_power
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7f778e1b	snd_hda_sequence_write
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7f89b77a	snd_hda_mixer_bind_switch_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x826986d3	snd_hda_multi_out_analog_open
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x834299ea	snd_hda_codec_amp_update
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x85dbeaf3	snd_hda_mixer_amp_switch_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x867abf95	snd_hda_mixer_amp_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8abacbb9	snd_hda_codec_amp_read
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8bcc8b5a	snd_hda_mixer_amp_switch_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x90ec9f9b	snd_hda_mixer_amp_switch_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9735cf5d	query_amp_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9a8e1877	snd_array_free
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9ab6e63f	snd_hda_build_controls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9f34a8d6	snd_hda_multi_out_analog_prepare
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa2827d76	snd_hda_get_jack_location
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa3c85f00	snd_hda_ch_mode_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xad7b01a3	snd_hda_override_amp_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xad87613e	snd_print_pcm_rates
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xae946acd	snd_hda_codec_configure
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb960132f	snd_hda_power_down
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbde0da61	snd_hda_mixer_bind_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbe7dd7dc	snd_array_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbf2aadb2	snd_hda_multi_out_dig_cleanup
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc0f9baf1	snd_hda_sequence_write_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc34a54c6	snd_hda_calc_stream_format
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc4340b19	snd_hda_create_spdif_share_sw
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc4f4a28a	snd_hda_add_codec_preset
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc652fd69	snd_hda_get_jack_connectivity
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc827e637	snd_hda_ch_mode_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcb301b6e	snd_hda_get_jack_type
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcc70694e	snd_hda_get_sub_nodes
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcce27eb0	snd_hda_input_mux_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcfc2ceb8	snd_hda_bus_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xda30fc0f	snd_hda_multi_out_dig_open
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xdd11cbca	snd_hda_multi_out_dig_close
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xdf717d3f	snd_hda_bind_vol
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe1a27286	snd_hda_ctl_add
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe542dba3	snd_hda_bind_sw
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe63f17be	snd_hda_mixer_amp_volume_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe6b9cd29	snd_hda_get_connections
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe8287617	snd_hda_mixer_amp_volume_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe9459eb8	snd_hda_resume
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe9491229	snd_hda_codec_resume_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xed9e91cf	snd_hda_codec_amp_stereo
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeda3a721	snd_print_pcm_bits
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf228d1bc	snd_hda_codec_get_pincfg
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf30862d6	snd_hda_mixer_amp_volume_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf3246d78	snd_hda_query_pin_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf8692cdd	snd_hda_codec_resume_amp
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xfada5061	snd_hda_detach_beep_device
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xfe114af2	snd_hda_check_board_codec_sid_config
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1836 0x1bceb0d6	soc_codec_dev_ad1836
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1836 0xf4c3edfe	ad1836_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1938 0x02638c10	ad1938_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1938 0x3df1fa3d	soc_codec_dev_ad1938
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0x0508b1dc	ad73311_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0x71d8918d	soc_codec_dev_ad73311
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4104 0x98b655e7	soc_codec_device_ak4104
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0x52ce9443	ak4535_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0xfb3f066d	soc_codec_dev_ak4535
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4642 0x04e39d96	ak4642_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4642 0xa38429c1	soc_codec_dev_ak4642
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0x909c5027	cs4270_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0x933ab857	soc_codec_device_cs4270
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-l3 0x78c84c7e	l3_write
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-max9877 0x97923f80	max9877_add_controls
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0x1a4f4ed2	pcm3008_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0x6bcecbb7	soc_codec_dev_pcm3008
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-spdif 0x18352620	dit_stub_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0x607bce7c	soc_codec_dev_ssm2602
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0xb3a8664b	ssm2602_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0x018c6fb9	soc_codec_dev_tlv320aic23
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0xbcd33173	tlv320aic23_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0x6e5c828f	aic26_soc_codec_dev
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0x78d9d94a	aic26_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x6b25e128	aic3x_button_pressed
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x98a4f81b	aic3x_set_gpio
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xb2e712b5	soc_codec_dev_aic3x
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xd3db0b4f	aic3x_get_gpio
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xd6c0eba4	aic3x_headset_detected
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xd8045078	aic3x_set_headset_detection
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xebfcb9e2	aic3x_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0xcbf3db46	twl4030_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0xcff64674	soc_codec_dev_twl4030
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda134x 0x0e4e2071	soc_codec_dev_uda134x
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x3ff41c18	soc_codec_dev_uda1380
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x79b3ae91	uda1380_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0x4fb2913c	wm_hubs_add_analogue_routes
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0x757206d5	wm_hubs_spkmix_tlv
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0xeee2e821	wm_hubs_add_analogue_controls
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x18517fba	wm8350_hp_jack_detect
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x22333b0a	wm8350_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x9b9804ea	soc_codec_dev_wm8350
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x0084feb8	soc_codec_dev_wm8400
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x7ace1db4	wm8400_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0x38f59902	wm8510_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0x926b81ae	soc_codec_dev_wm8510
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8523 0x8f89f131	wm8523_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8523 0xbb006c34	soc_codec_dev_wm8523
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0x5331ca99	wm8580_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0x9dbaba21	soc_codec_dev_wm8580
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0xa76b068f	wm8728_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0xf2fd7d74	soc_codec_dev_wm8728
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x22fdac0a	soc_codec_dev_wm8731
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x26135cf3	wm8731_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x3f6be1f9	soc_codec_dev_wm8750
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x8e9fba6c	wm8750_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0x1446b23a	soc_codec_dev_wm8753
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0x1c09c994	wm8753_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8776 0x21ecd087	wm8776_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8776 0x6ab59211	soc_codec_dev_wm8776
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0xc92d87f9	wm8900_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0xd97f5421	soc_codec_dev_wm8900
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0x4fb9f557	wm8903_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0xf25207e2	soc_codec_dev_wm8903
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0x3d62a3ea	wm8940_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0xde76fcfd	soc_codec_dev_wm8940
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0xaafdb2c3	wm8960_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0xddf22893	soc_codec_dev_wm8960
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8961 0x61a16166	wm8961_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8961 0xc4e919d2	soc_codec_dev_wm8961
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0xc52b73e5	soc_codec_dev_wm8971
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0xc7d66ad2	wm8971_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8974 0x971bfb61	wm8974_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8974 0xb85c87a0	soc_codec_dev_wm8974
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0x16914bf3	wm8988_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0x1fb58f91	soc_codec_dev_wm8988
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0x5cb5c22a	wm8990_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0xd6ae6fae	soc_codec_dev_wm8990
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8993 0xda21b084	wm8993_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8993 0xfd833c6d	soc_codec_dev_wm8993
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0x39aa1553	wm9081_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0x8e1f52e2	soc_codec_dev_wm9081
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x00a82ea3	snd_soc_register_dais
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x02c1ae18	snd_soc_jack_free_gpios
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x081fcf22	snd_soc_put_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x08adf469	snd_soc_dai_set_sysclk
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x096b8e4b	snd_soc_get_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x09bb5b30	snd_soc_info_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0e79fc27	snd_soc_dapm_new_widgets
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x13ac02f5	snd_soc_dapm_put_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x154f5fef	snd_soc_update_bits
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1bb142f2	snd_soc_info_volsw_ext
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1c9b5f09	snd_soc_dapm_put_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x207f057d	snd_soc_put_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x23aa8d0d	snd_soc_codec_set_cache_io
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x25f76426	snd_soc_dapm_stream_event
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x26594bb4	snd_soc_free_pcms
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x27dbfe76	snd_soc_jack_report
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x27dfa763	snd_soc_dai_set_fmt
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2fc590b8	snd_soc_dai_set_pll
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x332d3b02	snd_soc_dapm_put_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x38a893ad	snd_soc_dapm_disable_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3a9a0bad	snd_soc_register_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3ae5b8d7	snd_soc_register_platform
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3b833d47	snd_soc_info_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4199a190	snd_soc_register_dai
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x43f334f9	snd_soc_set_runtime_hwparams
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x448f785e	snd_soc_dapm_get_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4550b23c	snd_soc_new_pcms
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x477e90d5	snd_soc_jack_add_gpios
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4dfe5a8d	snd_soc_get_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x52c703bb	snd_soc_dapm_get_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x539a7d45	snd_soc_init_card
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x55c2ea56	snd_soc_jack_new
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x55f942cc	snd_soc_new_ac97_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5b4f33b9	snd_soc_info_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5c15fefd	snd_soc_unregister_dais
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5dc6ed5c	snd_soc_free_ac97_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x66586889	snd_soc_unregister_platform
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6833f7fb	snd_soc_dapm_sync
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6d5d1def	dapm_reg_event
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x793c2fc7	snd_soc_get_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7a6a6ad7	snd_soc_add_controls
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7b0e397b	snd_soc_dai_digital_mute
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7fbd8c7e	snd_soc_get_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x80354793	snd_soc_dai_set_tristate
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x83ad8674	snd_soc_get_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x859fcc23	snd_soc_dai_set_clkdiv
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8777b5c1	snd_soc_dapm_new_controls
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8fdac8f1	snd_soc_dapm_get_pin_status
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xae73ae43	snd_soc_test_bits
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb160deb1	snd_soc_suspend_device
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb8ce837f	snd_soc_dai_set_tdm_slot
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xba6d8b80	snd_soc_put_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xbbd1129a	snd_soc_unregister_dai
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xbf30e45a	snd_soc_codec_volatile_register
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc16f47bb	snd_soc_dapm_get_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc4bb17ce	snd_soc_dapm_add_routes
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc51763b7	snd_soc_dapm_free
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xcb19182f	snd_soc_dapm_new_control
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xcb4ffddd	snd_soc_info_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xcd9da781	snd_soc_resume_device
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd9571ef5	snd_soc_info_enum_ext
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xdba8cb05	snd_soc_put_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xdfcafb4e	snd_soc_dapm_get_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xe0ebd735	snd_soc_dapm_info_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xee2cd984	snd_soc_put_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf3611682	snd_soc_cnew
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf5eccb12	snd_soc_dapm_enable_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf6f9d35c	snd_soc_dapm_nc_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf7b4c9ba	snd_soc_dapm_put_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf7f7758f	snd_soc_unregister_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xfb1d7ec1	snd_soc_jack_add_pins
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x15e0620c	xv_destroy_pool
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x4803223f	xv_malloc
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x57e771ba	xv_get_total_size_bytes
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x88072f01	xv_create_pool
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0xaf69699e	xv_get_object_size
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0xe878f8f2	xv_free
+EXPORT_SYMBOL_GPL vmlinux 0x003dbce0	cpufreq_frequency_table_target
+EXPORT_SYMBOL_GPL vmlinux 0x003ed6a6	hpet_unregister_irq_handler
+EXPORT_SYMBOL_GPL vmlinux 0x00465c94	dm_rh_mark_nosync
+EXPORT_SYMBOL_GPL vmlinux 0x00566d8f	inotify_get_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x0058d2cf	apic
+EXPORT_SYMBOL_GPL vmlinux 0x005d161d	sata_pmp_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x0067df75	ata_tf_from_fis
+EXPORT_SYMBOL_GPL vmlinux 0x009a5a62	device_move
+EXPORT_SYMBOL_GPL vmlinux 0x00a5cbe1	iommu_iova_to_phys
+EXPORT_SYMBOL_GPL vmlinux 0x00b7201f	device_bind_driver
+EXPORT_SYMBOL_GPL vmlinux 0x00b8ecf8	__iowrite32_copy
+EXPORT_SYMBOL_GPL vmlinux 0x00dc7989	fuse_conn_get
+EXPORT_SYMBOL_GPL vmlinux 0x00ebcb5d	ata_id_string
+EXPORT_SYMBOL_GPL vmlinux 0x00f94fde	register_jprobes
+EXPORT_SYMBOL_GPL vmlinux 0x0110b3d1	register_hotplug_dock_device
+EXPORT_SYMBOL_GPL vmlinux 0x016b9869	xfrm_calg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0x016f00ad	ata_scsi_queuecmd
+EXPORT_SYMBOL_GPL vmlinux 0x01848a8e	local_apic_timer_c2_ok
+EXPORT_SYMBOL_GPL vmlinux 0x01a4ea6d	unregister_die_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x01bf2e74	platform_driver_register
+EXPORT_SYMBOL_GPL vmlinux 0x01e1a8de	kgdb_breakpoint
+EXPORT_SYMBOL_GPL vmlinux 0x01e9acda	usb_altnum_to_altsetting
+EXPORT_SYMBOL_GPL vmlinux 0x0243a3fd	__class_register
+EXPORT_SYMBOL_GPL vmlinux 0x02578683	crypto_hash_walk_first
+EXPORT_SYMBOL_GPL vmlinux 0x027c35a8	dm_rh_inc_pending
+EXPORT_SYMBOL_GPL vmlinux 0x02828a8f	rtnl_kill_links
+EXPORT_SYMBOL_GPL vmlinux 0x029235c4	ata_std_error_handler
+EXPORT_SYMBOL_GPL vmlinux 0x02a430cb	ata_sff_wait_ready
+EXPORT_SYMBOL_GPL vmlinux 0x02b25430	inode_add_to_lists
+EXPORT_SYMBOL_GPL vmlinux 0x02ccea56	lock_policy_rwsem_write
+EXPORT_SYMBOL_GPL vmlinux 0x02de62c4	dev_attr_link_power_management_policy
+EXPORT_SYMBOL_GPL vmlinux 0x02ee9194	ata_bus_reset
+EXPORT_SYMBOL_GPL vmlinux 0x033921a1	shash_ahash_update
+EXPORT_SYMBOL_GPL vmlinux 0x0343bdf1	__i2c_board_list
+EXPORT_SYMBOL_GPL vmlinux 0x039622db	file_ra_state_init
+EXPORT_SYMBOL_GPL vmlinux 0x03a3f86d	unregister_jprobe
+EXPORT_SYMBOL_GPL vmlinux 0x03b2ef7d	crypto_drop_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x03cf3600	unregister_pernet_device
+EXPORT_SYMBOL_GPL vmlinux 0x03e0be38	user_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x03e3686c	ata_timing_cycle2mode
+EXPORT_SYMBOL_GPL vmlinux 0x04069b1d	set_irq_nested_thread
+EXPORT_SYMBOL_GPL vmlinux 0x0415d56c	__pm_runtime_put
+EXPORT_SYMBOL_GPL vmlinux 0x04486e88	rcu_batches_completed
+EXPORT_SYMBOL_GPL vmlinux 0x04634238	da903x_set_bits
+EXPORT_SYMBOL_GPL vmlinux 0x0482d837	usb_hub_clear_tt_buffer
+EXPORT_SYMBOL_GPL vmlinux 0x049cb438	usb_reset_endpoint
+EXPORT_SYMBOL_GPL vmlinux 0x04c3f2c1	gnttab_empty_grant_references
+EXPORT_SYMBOL_GPL vmlinux 0x04e32934	__rt_mutex_init
+EXPORT_SYMBOL_GPL vmlinux 0x04ea8706	__iowrite64_copy
+EXPORT_SYMBOL_GPL vmlinux 0x0531dcb8	ata_dev_classify
+EXPORT_SYMBOL_GPL vmlinux 0x0533f438	debugfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x054e550b	kernel_halt
+EXPORT_SYMBOL_GPL vmlinux 0x05a896ab	usb_deregister_dev
+EXPORT_SYMBOL_GPL vmlinux 0x05c7ef21	usb_hcd_giveback_urb
+EXPORT_SYMBOL_GPL vmlinux 0x06009be9	srcu_init_notifier_head
+EXPORT_SYMBOL_GPL vmlinux 0x060d1064	set_memory_ro
+EXPORT_SYMBOL_GPL vmlinux 0x0619ca8a	getboottime
+EXPORT_SYMBOL_GPL vmlinux 0x06388092	ring_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0x0638c0d0	pci_configure_slot
+EXPORT_SYMBOL_GPL vmlinux 0x064db9a5	mark_mounts_for_expiry
+EXPORT_SYMBOL_GPL vmlinux 0x06601a60	udp4_lib_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x06ad0b21	usb_buffer_unmap_sg
+EXPORT_SYMBOL_GPL vmlinux 0x071f1ed6	platform_get_irq
+EXPORT_SYMBOL_GPL vmlinux 0x075ffe8c	power_supply_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x077bb459	pci_hp_deregister
+EXPORT_SYMBOL_GPL vmlinux 0x078993b9	blk_trace_startstop
+EXPORT_SYMBOL_GPL vmlinux 0x07a13f3a	rtc_read_alarm
+EXPORT_SYMBOL_GPL vmlinux 0x07a17fe5	cpufreq_cpu_put
+EXPORT_SYMBOL_GPL vmlinux 0x07b52e38	rtnl_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x07ce7344	trace_seq_vprintf
+EXPORT_SYMBOL_GPL vmlinux 0x07ff4aea	xenbus_scanf
+EXPORT_SYMBOL_GPL vmlinux 0x0832ede9	inet_csk_reqsk_queue_hash_add
+EXPORT_SYMBOL_GPL vmlinux 0x0846d8f1	hwmon_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x0853a467	dm_rh_stop_recovery
+EXPORT_SYMBOL_GPL vmlinux 0x085607be	ipv6_opt_accepted
+EXPORT_SYMBOL_GPL vmlinux 0x085db0e4	device_initialize
+EXPORT_SYMBOL_GPL vmlinux 0x08830850	da903x_reads
+EXPORT_SYMBOL_GPL vmlinux 0x0899da9f	bus_get_kset
+EXPORT_SYMBOL_GPL vmlinux 0x08a3e5d1	net_ipv6_ctl_path
+EXPORT_SYMBOL_GPL vmlinux 0x08d8708f	cancel_work_sync
+EXPORT_SYMBOL_GPL vmlinux 0x091eb9b4	round_jiffies
+EXPORT_SYMBOL_GPL vmlinux 0x095dc7fa	each_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x09dc4765	pci_slots_kset
+EXPORT_SYMBOL_GPL vmlinux 0x0a023b28	usb_ifnum_to_if
+EXPORT_SYMBOL_GPL vmlinux 0x0a199eff	relay_subbufs_consumed
+EXPORT_SYMBOL_GPL vmlinux 0x0a1a2ef4	bus_register
+EXPORT_SYMBOL_GPL vmlinux 0x0a770fa6	default_backing_dev_info
+EXPORT_SYMBOL_GPL vmlinux 0x0ab16640	pci_scan_child_bus
+EXPORT_SYMBOL_GPL vmlinux 0x0aca3a40	sdev_evt_send
+EXPORT_SYMBOL_GPL vmlinux 0x0b07abe2	unshare_fs_struct
+EXPORT_SYMBOL_GPL vmlinux 0x0b4c2e73	ata_port_desc
+EXPORT_SYMBOL_GPL vmlinux 0x0b5b6a57	put_pid
+EXPORT_SYMBOL_GPL vmlinux 0x0bce9d80	blk_trace_setup
+EXPORT_SYMBOL_GPL vmlinux 0x0c15deb2	task_current_syscall
+EXPORT_SYMBOL_GPL vmlinux 0x0c2cdbf1	synchronize_sched
+EXPORT_SYMBOL_GPL vmlinux 0x0c524a33	page_mkclean
+EXPORT_SYMBOL_GPL vmlinux 0x0c624a4d	eventfd_ctx_fileget
+EXPORT_SYMBOL_GPL vmlinux 0x0c73004b	ata_port_disable
+EXPORT_SYMBOL_GPL vmlinux 0x0c805f93	clflush_cache_range
+EXPORT_SYMBOL_GPL vmlinux 0x0cb88680	__tracepoint_block_rq_remap
+EXPORT_SYMBOL_GPL vmlinux 0x0cc2c21a	ata_sas_port_start
+EXPORT_SYMBOL_GPL vmlinux 0x0d05b522	crypto_alloc_ahash
+EXPORT_SYMBOL_GPL vmlinux 0x0d125d1c	ata_bmdma_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x0d200e8e	aead_geniv_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x0d9f9322	usb_hcd_pci_pm_ops
+EXPORT_SYMBOL_GPL vmlinux 0x0dbe54f4	input_ff_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x0dc1b770	debugfs_create_x16
+EXPORT_SYMBOL_GPL vmlinux 0x0df5e5d7	regulator_set_current_limit
+EXPORT_SYMBOL_GPL vmlinux 0x0e5b03e6	ring_buffer_commit_overrun_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x0e77d09e	bus_get_device_klist
+EXPORT_SYMBOL_GPL vmlinux 0x0ec210b8	xen_start_info
+EXPORT_SYMBOL_GPL vmlinux 0x0ecaf541	cpufreq_cpu_get
+EXPORT_SYMBOL_GPL vmlinux 0x0f0eeee1	ata_sff_dumb_qc_prep
+EXPORT_SYMBOL_GPL vmlinux 0x0f0f6453	pci_unblock_user_cfg_access
+EXPORT_SYMBOL_GPL vmlinux 0x0f203f81	sata_async_notification
+EXPORT_SYMBOL_GPL vmlinux 0x0f22c2e8	aead_geniv_init
+EXPORT_SYMBOL_GPL vmlinux 0x0f73520f	klist_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0x0f8bfa2a	dma_release_channel
+EXPORT_SYMBOL_GPL vmlinux 0x0fa3757f	inet6_destroy_sock
+EXPORT_SYMBOL_GPL vmlinux 0x0fb1e7c0	queue_work
+EXPORT_SYMBOL_GPL vmlinux 0x0fda3774	__inet_lookup_established
+EXPORT_SYMBOL_GPL vmlinux 0x0fe2d570	xenbus_directory
+EXPORT_SYMBOL_GPL vmlinux 0x0fea00d5	fsstack_copy_attr_all
+EXPORT_SYMBOL_GPL vmlinux 0x100c13c6	usb_kill_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0x100c48a2	unregister_dock_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x10138352	tracing_on
+EXPORT_SYMBOL_GPL vmlinux 0x101c923e	__tracepoint_power_start
+EXPORT_SYMBOL_GPL vmlinux 0x10621889	hpet_rtc_interrupt
+EXPORT_SYMBOL_GPL vmlinux 0x1080b36f	skb_morph
+EXPORT_SYMBOL_GPL vmlinux 0x10a9c8f5	tty_prepare_flip_string
+EXPORT_SYMBOL_GPL vmlinux 0x10ff9e31	regulator_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x115f9a05	ata_host_init
+EXPORT_SYMBOL_GPL vmlinux 0x1176d0d0	driver_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x11bc6660	sdio_writesb
+EXPORT_SYMBOL_GPL vmlinux 0x11f447ce	__gpio_to_irq
+EXPORT_SYMBOL_GPL vmlinux 0x1243f03d	ata_sff_drain_fifo
+EXPORT_SYMBOL_GPL vmlinux 0x124bb3b4	dev_set_name
+EXPORT_SYMBOL_GPL vmlinux 0x124f2056	crypto_get_attr_type
+EXPORT_SYMBOL_GPL vmlinux 0x1251d30f	call_rcu
+EXPORT_SYMBOL_GPL vmlinux 0x1268f357	resume_device_irqs
+EXPORT_SYMBOL_GPL vmlinux 0x12c9d44f	device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x13142672	trace_define_field
+EXPORT_SYMBOL_GPL vmlinux 0x1356a2fa	pskb_put
+EXPORT_SYMBOL_GPL vmlinux 0x1360fcd2	usb_autopm_put_interface_async
+EXPORT_SYMBOL_GPL vmlinux 0x13780514	__lock_page_killable
+EXPORT_SYMBOL_GPL vmlinux 0x1381a048	iommu_map_range
+EXPORT_SYMBOL_GPL vmlinux 0x13b2a946	register_keyboard_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x13cfb36f	ata_scsi_simulate
+EXPORT_SYMBOL_GPL vmlinux 0x13ed245e	vfs_setlease
+EXPORT_SYMBOL_GPL vmlinux 0x13ee9a02	ata_sas_scsi_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x13f21aa5	sdio_readsb
+EXPORT_SYMBOL_GPL vmlinux 0x13f81879	regulator_register
+EXPORT_SYMBOL_GPL vmlinux 0x1424d598	inotify_init_watch
+EXPORT_SYMBOL_GPL vmlinux 0x145d1dc2	tcp_twsk_destructor
+EXPORT_SYMBOL_GPL vmlinux 0x148f06c3	ata_sff_dev_select
+EXPORT_SYMBOL_GPL vmlinux 0x149db923	selinux_string_to_sid
+EXPORT_SYMBOL_GPL vmlinux 0x14a049c8	dm_dispatch_request
+EXPORT_SYMBOL_GPL vmlinux 0x14b2392b	devres_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x15118c94	pci_hp_remove_module_link
+EXPORT_SYMBOL_GPL vmlinux 0x153f0693	usb_sg_init
+EXPORT_SYMBOL_GPL vmlinux 0x154a8f0c	kobject_uevent_env
+EXPORT_SYMBOL_GPL vmlinux 0x1550d408	acpi_smbus_unregister_callback
+EXPORT_SYMBOL_GPL vmlinux 0x15892417	async_synchronize_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x1598dc9d	unregister_netevent_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x15b0606e	e820_any_mapped
+EXPORT_SYMBOL_GPL vmlinux 0x15b8174d	sysfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x16143092	kill_pid_info_as_uid
+EXPORT_SYMBOL_GPL vmlinux 0x16356357	pm_request_idle
+EXPORT_SYMBOL_GPL vmlinux 0x1640954a	class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x165137a7	ata_sff_dev_classify
+EXPORT_SYMBOL_GPL vmlinux 0x16788d5b	bus_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x1697136d	hrtimer_init
+EXPORT_SYMBOL_GPL vmlinux 0x16da3868	__ata_ehi_push_desc
+EXPORT_SYMBOL_GPL vmlinux 0x171741fc	bd_release_from_disk
+EXPORT_SYMBOL_GPL vmlinux 0x179f6aef	rtc_set_time
+EXPORT_SYMBOL_GPL vmlinux 0x17cdf383	kset_create_and_add
+EXPORT_SYMBOL_GPL vmlinux 0x185a0b9e	__ip_route_output_key
+EXPORT_SYMBOL_GPL vmlinux 0x186f0d2c	crypto_init_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x1878f62b	edac_err_assert
+EXPORT_SYMBOL_GPL vmlinux 0x188f05ec	__mmdrop
+EXPORT_SYMBOL_GPL vmlinux 0x18d53420	kgdb_register_io_module
+EXPORT_SYMBOL_GPL vmlinux 0x18efafe5	ata_host_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x18f83fab	gnttab_grant_foreign_access_ref
+EXPORT_SYMBOL_GPL vmlinux 0x1903a7bd	usb_reset_device
+EXPORT_SYMBOL_GPL vmlinux 0x19373794	init_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0x19a304ba	usb_disabled
+EXPORT_SYMBOL_GPL vmlinux 0x19a77686	ata_eh_freeze_port
+EXPORT_SYMBOL_GPL vmlinux 0x19b0e167	tty_put_char
+EXPORT_SYMBOL_GPL vmlinux 0x19b70ac1	perf_tp_event
+EXPORT_SYMBOL_GPL vmlinux 0x1a0d897f	tcp_death_row
+EXPORT_SYMBOL_GPL vmlinux 0x1a323362	__ftrace_vbprintk
+EXPORT_SYMBOL_GPL vmlinux 0x1a474901	tracepoint_probe_unregister_noupdate
+EXPORT_SYMBOL_GPL vmlinux 0x1a5037ad	usb_get_status
+EXPORT_SYMBOL_GPL vmlinux 0x1a5424fa	crypto_lookup_template
+EXPORT_SYMBOL_GPL vmlinux 0x1a7d447c	pci_enable_pcie_error_reporting
+EXPORT_SYMBOL_GPL vmlinux 0x1a81f961	ata_sff_qc_issue
+EXPORT_SYMBOL_GPL vmlinux 0x1a93017c	rtc_irq_register
+EXPORT_SYMBOL_GPL vmlinux 0x1a938737	atomic_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x1a9b538e	ehci_cf_port_reset_rwsem
+EXPORT_SYMBOL_GPL vmlinux 0x1aa8dbd5	sata_set_spd
+EXPORT_SYMBOL_GPL vmlinux 0x1acda5b2	atomic_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x1ad94a98	device_find_child
+EXPORT_SYMBOL_GPL vmlinux 0x1b36ea45	tcp_done
+EXPORT_SYMBOL_GPL vmlinux 0x1b9aca3f	jprobe_return
+EXPORT_SYMBOL_GPL vmlinux 0x1bc6d562	inotify_remove_watch_locked
+EXPORT_SYMBOL_GPL vmlinux 0x1bcde060	rt_mutex_timed_lock
+EXPORT_SYMBOL_GPL vmlinux 0x1c309769	class_compat_create_link
+EXPORT_SYMBOL_GPL vmlinux 0x1c3af716	execute_in_process_context
+EXPORT_SYMBOL_GPL vmlinux 0x1c7b6c2a	eventfd_ctx_fdget
+EXPORT_SYMBOL_GPL vmlinux 0x1c852e7c	xfrm_calg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x1c87a811	__round_jiffies_up
+EXPORT_SYMBOL_GPL vmlinux 0x1c8b0961	crypto_alloc_instance2
+EXPORT_SYMBOL_GPL vmlinux 0x1c8c9676	net_assign_generic
+EXPORT_SYMBOL_GPL vmlinux 0x1cd45ecb	add_page_wait_queue
+EXPORT_SYMBOL_GPL vmlinux 0x1cdd5293	i2c_add_numbered_adapter
+EXPORT_SYMBOL_GPL vmlinux 0x1cfbf182	scsi_mode_select
+EXPORT_SYMBOL_GPL vmlinux 0x1d0df04b	ata_host_alloc_pinfo
+EXPORT_SYMBOL_GPL vmlinux 0x1d3b9373	pci_destroy_slot
+EXPORT_SYMBOL_GPL vmlinux 0x1d8f8059	__tracepoint_power_end
+EXPORT_SYMBOL_GPL vmlinux 0x1d9316a9	regulator_enable
+EXPORT_SYMBOL_GPL vmlinux 0x1db21d74	__tracepoint_kfree_skb
+EXPORT_SYMBOL_GPL vmlinux 0x1dee2629	trace_current_buffer_lock_reserve
+EXPORT_SYMBOL_GPL vmlinux 0x1e10c2b7	tty_ldisc_ref_wait
+EXPORT_SYMBOL_GPL vmlinux 0x1e5f82de	platform_device_add_data
+EXPORT_SYMBOL_GPL vmlinux 0x1e69f12e	blk_execute_rq_nowait
+EXPORT_SYMBOL_GPL vmlinux 0x1e7bbcb3	kernel_restart
+EXPORT_SYMBOL_GPL vmlinux 0x1eb9516e	round_jiffies_relative
+EXPORT_SYMBOL_GPL vmlinux 0x1ebf6c2a	pci_power_names
+EXPORT_SYMBOL_GPL vmlinux 0x1ec284c0	get_dcookie
+EXPORT_SYMBOL_GPL vmlinux 0x1ee28364	register_pernet_device
+EXPORT_SYMBOL_GPL vmlinux 0x1ef3b12e	dm_disk
+EXPORT_SYMBOL_GPL vmlinux 0x1ef5e83e	led_trigger_show
+EXPORT_SYMBOL_GPL vmlinux 0x1f3d1b77	crypto_alg_sem
+EXPORT_SYMBOL_GPL vmlinux 0x1f42ba38	srcu_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x1f498899	pci_rescan_bus
+EXPORT_SYMBOL_GPL vmlinux 0x1f4ca7bc	ata_sas_port_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x1f77ffbf	per_cpu__gdt_page
+EXPORT_SYMBOL_GPL vmlinux 0x1f8ec1b3	acpi_get_pci_rootbridge_handle
+EXPORT_SYMBOL_GPL vmlinux 0x1f9b4299	ip_build_and_send_pkt
+EXPORT_SYMBOL_GPL vmlinux 0x1fae7955	bus_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x1fb22f70	usb_register_device_driver
+EXPORT_SYMBOL_GPL vmlinux 0x1fb47573	invalidate_inode_pages2_range
+EXPORT_SYMBOL_GPL vmlinux 0x1fcece42	inet_twdr_twcal_tick
+EXPORT_SYMBOL_GPL vmlinux 0x1ff4aa42	flush_workqueue
+EXPORT_SYMBOL_GPL vmlinux 0x205dcd7a	klist_add_tail
+EXPORT_SYMBOL_GPL vmlinux 0x20bc3470	orderly_poweroff
+EXPORT_SYMBOL_GPL vmlinux 0x20d22764	iommu_found
+EXPORT_SYMBOL_GPL vmlinux 0x2100c724	debugfs_rename
+EXPORT_SYMBOL_GPL vmlinux 0x215db6e9	tracepoint_probe_register_noupdate
+EXPORT_SYMBOL_GPL vmlinux 0x21da516f	class_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x222fbcd3	xfrm_output
+EXPORT_SYMBOL_GPL vmlinux 0x22399730	find_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0x2296c00d	crypto_attr_u32
+EXPORT_SYMBOL_GPL vmlinux 0x22f96dde	pci_intx
+EXPORT_SYMBOL_GPL vmlinux 0x2349826a	kick_process
+EXPORT_SYMBOL_GPL vmlinux 0x234e4c9d	transport_configure_device
+EXPORT_SYMBOL_GPL vmlinux 0x235ac6ca	platform_add_devices
+EXPORT_SYMBOL_GPL vmlinux 0x23864ce7	cpuset_mem_spread_node
+EXPORT_SYMBOL_GPL vmlinux 0x23933a2f	register_pernet_gen_subsys
+EXPORT_SYMBOL_GPL vmlinux 0x23a08794	queue_work_on
+EXPORT_SYMBOL_GPL vmlinux 0x23d11587	generic_fh_to_dentry
+EXPORT_SYMBOL_GPL vmlinux 0x2447533c	ktime_get_real
+EXPORT_SYMBOL_GPL vmlinux 0x246f4153	pv_time_ops
+EXPORT_SYMBOL_GPL vmlinux 0x24a72637	usb_get_current_frame_number
+EXPORT_SYMBOL_GPL vmlinux 0x24c33079	ata_pci_device_do_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x24c7698a	xenbus_write
+EXPORT_SYMBOL_GPL vmlinux 0x24eb7e32	leds_list
+EXPORT_SYMBOL_GPL vmlinux 0x25041dad	input_ff_event
+EXPORT_SYMBOL_GPL vmlinux 0x2508d93a	sync_page_io
+EXPORT_SYMBOL_GPL vmlinux 0x2545c170	unregister_xenbus_watch
+EXPORT_SYMBOL_GPL vmlinux 0x25b53b6e	__cpufreq_driver_getavg
+EXPORT_SYMBOL_GPL vmlinux 0x25c25102	ata_acpi_cbl_80wire
+EXPORT_SYMBOL_GPL vmlinux 0x25f19d19	rdev_get_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0x261aad74	rtc_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x2646d1f8	dm_underlying_device_busy
+EXPORT_SYMBOL_GPL vmlinux 0x267f4ded	rtc_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x26bc56ab	xenbus_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0x26c0d9a1	simple_attr_read
+EXPORT_SYMBOL_GPL vmlinux 0x26c90ea4	scsi_eh_get_sense
+EXPORT_SYMBOL_GPL vmlinux 0x26df275e	regulator_get_mode
+EXPORT_SYMBOL_GPL vmlinux 0x2746fb7f	cpuidle_register_device
+EXPORT_SYMBOL_GPL vmlinux 0x27708c0c	usb_autopm_get_interface_async
+EXPORT_SYMBOL_GPL vmlinux 0x278458cc	dm_region_hash_create
+EXPORT_SYMBOL_GPL vmlinux 0x279265f5	dm_rh_region_context
+EXPORT_SYMBOL_GPL vmlinux 0x27adf232	tracing_generic_entry_update
+EXPORT_SYMBOL_GPL vmlinux 0x27b87606	do_add_mount
+EXPORT_SYMBOL_GPL vmlinux 0x27bd87ad	sysdev_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x28048b61	pci_msi_off
+EXPORT_SYMBOL_GPL vmlinux 0x284d8883	inet6_csk_reqsk_queue_hash_add
+EXPORT_SYMBOL_GPL vmlinux 0x2850f2e6	get_device
+EXPORT_SYMBOL_GPL vmlinux 0x285e7e89	platform_get_irq_byname
+EXPORT_SYMBOL_GPL vmlinux 0x28d664ff	__raw_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x28e23139	xfrm_probe_algs
+EXPORT_SYMBOL_GPL vmlinux 0x28fb8e09	ring_buffer_record_disable
+EXPORT_SYMBOL_GPL vmlinux 0x29428260	dm_send_uevents
+EXPORT_SYMBOL_GPL vmlinux 0x29501527	klist_iter_init_node
+EXPORT_SYMBOL_GPL vmlinux 0x295b0340	pm_schedule_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x29b50d25	crypto_init_spawn2
+EXPORT_SYMBOL_GPL vmlinux 0x29c8f19d	ata_host_resume
+EXPORT_SYMBOL_GPL vmlinux 0x29ddd2c6	tracepoint_iter_stop
+EXPORT_SYMBOL_GPL vmlinux 0x2a0a4724	bind_evtchn_to_irqhandler
+EXPORT_SYMBOL_GPL vmlinux 0x2a678a13	__suspend_report_result
+EXPORT_SYMBOL_GPL vmlinux 0x2b09d67f	dm_rh_start_recovery
+EXPORT_SYMBOL_GPL vmlinux 0x2b32dd06	ata_pci_bmdma_init
+EXPORT_SYMBOL_GPL vmlinux 0x2b9f8e23	nf_net_ipv4_netfilter_sysctl_path
+EXPORT_SYMBOL_GPL vmlinux 0x2bcaa8e3	flush_work
+EXPORT_SYMBOL_GPL vmlinux 0x2bfc4d7f	tracepoint_get_iter_range
+EXPORT_SYMBOL_GPL vmlinux 0x2c208607	power_supply_is_system_supplied
+EXPORT_SYMBOL_GPL vmlinux 0x2c2cb9c6	devm_kfree
+EXPORT_SYMBOL_GPL vmlinux 0x2cc266b9	da903x_write
+EXPORT_SYMBOL_GPL vmlinux 0x2ce98559	kcrypto_wq
+EXPORT_SYMBOL_GPL vmlinux 0x2d160c75	sata_scr_valid
+EXPORT_SYMBOL_GPL vmlinux 0x2d40faa2	simple_attr_open
+EXPORT_SYMBOL_GPL vmlinux 0x2d5dbeec	crypto_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x2d85e769	usb_queue_reset_device
+EXPORT_SYMBOL_GPL vmlinux 0x2d9f2ce3	sched_clock_idle_wakeup_event
+EXPORT_SYMBOL_GPL vmlinux 0x2dd8444c	trace_seq_printf
+EXPORT_SYMBOL_GPL vmlinux 0x2ded931b	nf_unregister_queue_handlers
+EXPORT_SYMBOL_GPL vmlinux 0x2e0df1ce	fb_deferred_io_init
+EXPORT_SYMBOL_GPL vmlinux 0x2e2292e0	__get_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0x2e47f677	xfrm_aalg_get_byidx
+EXPORT_SYMBOL_GPL vmlinux 0x2e9ad101	pciserial_suspend_ports
+EXPORT_SYMBOL_GPL vmlinux 0x2ec92012	scatterwalk_copychunks
+EXPORT_SYMBOL_GPL vmlinux 0x2eed2630	iommu_domain_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x2f0f795b	bus_rescan_devices
+EXPORT_SYMBOL_GPL vmlinux 0x2f3aeb7c	inet_twsk_schedule
+EXPORT_SYMBOL_GPL vmlinux 0x2f47d8c7	cpufreq_frequency_get_table
+EXPORT_SYMBOL_GPL vmlinux 0x2f857551	machine_check_poll
+EXPORT_SYMBOL_GPL vmlinux 0x2f9a3671	skcipher_geniv_exit
+EXPORT_SYMBOL_GPL vmlinux 0x2fb39b0c	__audit_inode_child
+EXPORT_SYMBOL_GPL vmlinux 0x2fbc1675	ata_sff_freeze
+EXPORT_SYMBOL_GPL vmlinux 0x2fcd9e17	dpm_resume_noirq
+EXPORT_SYMBOL_GPL vmlinux 0x2fd41090	xenbus_alloc_evtchn
+EXPORT_SYMBOL_GPL vmlinux 0x300155d0	pm_runtime_barrier
+EXPORT_SYMBOL_GPL vmlinux 0x307abea5	crypto_shoot_alg
+EXPORT_SYMBOL_GPL vmlinux 0x310eecc9	__sock_recv_timestamp
+EXPORT_SYMBOL_GPL vmlinux 0x311312da	input_class
+EXPORT_SYMBOL_GPL vmlinux 0x318920b1	register_dock_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x318b6aba	inet_twsk_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x31d84d7b	usb_get_dev
+EXPORT_SYMBOL_GPL vmlinux 0x31e10192	ring_buffer_read_start
+EXPORT_SYMBOL_GPL vmlinux 0x31fccf26	pciserial_remove_ports
+EXPORT_SYMBOL_GPL vmlinux 0x32109dc7	disk_get_part
+EXPORT_SYMBOL_GPL vmlinux 0x325e677c	gnttab_grant_foreign_transfer_ref
+EXPORT_SYMBOL_GPL vmlinux 0x3274abbb	crypto_register_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0x327e93b8	crypto_ahash_type
+EXPORT_SYMBOL_GPL vmlinux 0x32d5e7fc	xfrm_aalg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x32f17454	ring_buffer_event_data
+EXPORT_SYMBOL_GPL vmlinux 0x33262a75	sysfs_create_group
+EXPORT_SYMBOL_GPL vmlinux 0x33532f53	ata_bmdma_start
+EXPORT_SYMBOL_GPL vmlinux 0x337c18da	crypto_init_shash_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x338d3dce	dm_rh_recovery_in_flight
+EXPORT_SYMBOL_GPL vmlinux 0x33a6d8b2	platform_get_resource_byname
+EXPORT_SYMBOL_GPL vmlinux 0x33d3f03b	blkcipher_walk_phys
+EXPORT_SYMBOL_GPL vmlinux 0x33d4bfa1	bus_sort_breadthfirst
+EXPORT_SYMBOL_GPL vmlinux 0x34275124	trace_current_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0x3441c3d6	gpio_set_value_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x34454312	ata_pci_sff_prepare_host
+EXPORT_SYMBOL_GPL vmlinux 0x346835bc	devres_close_group
+EXPORT_SYMBOL_GPL vmlinux 0x347afd5a	rdev_get_id
+EXPORT_SYMBOL_GPL vmlinux 0x348b1863	ahash_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0x34c24076	bus_find_device
+EXPORT_SYMBOL_GPL vmlinux 0x34da6aa1	usb_match_one_id
+EXPORT_SYMBOL_GPL vmlinux 0x34dc79ff	led_trigger_remove
+EXPORT_SYMBOL_GPL vmlinux 0x34dee8bc	regulator_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x34fd3f9a	ring_buffer_normalize_time_stamp
+EXPORT_SYMBOL_GPL vmlinux 0x35213407	transport_class_register
+EXPORT_SYMBOL_GPL vmlinux 0x3527f0c5	inet6_sk_rebuild_header
+EXPORT_SYMBOL_GPL vmlinux 0x354502c6	ata_bmdma_status
+EXPORT_SYMBOL_GPL vmlinux 0x356c1403	invalidate_inode_pages2
+EXPORT_SYMBOL_GPL vmlinux 0x35d8c94a	sdev_evt_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x35fd0312	per_cpu__injectm
+EXPORT_SYMBOL_GPL vmlinux 0x36046280	ata_eh_qc_complete
+EXPORT_SYMBOL_GPL vmlinux 0x3612bacf	user_update
+EXPORT_SYMBOL_GPL vmlinux 0x361e2bcc	save_stack_trace
+EXPORT_SYMBOL_GPL vmlinux 0x362e23ec	call_rcu_bh
+EXPORT_SYMBOL_GPL vmlinux 0x3657d666	ata_sff_post_internal_cmd
+EXPORT_SYMBOL_GPL vmlinux 0x36602883	unregister_kretprobe
+EXPORT_SYMBOL_GPL vmlinux 0x368711e0	ata_sff_wait_after_reset
+EXPORT_SYMBOL_GPL vmlinux 0x36c09916	raw_seq_start
+EXPORT_SYMBOL_GPL vmlinux 0x37470338	inet6_lookup_listener
+EXPORT_SYMBOL_GPL vmlinux 0x37ad4176	__tracepoint_block_bio_complete
+EXPORT_SYMBOL_GPL vmlinux 0x37e1670b	scsi_dh_attach
+EXPORT_SYMBOL_GPL vmlinux 0x37e31358	ata_sff_error_handler
+EXPORT_SYMBOL_GPL vmlinux 0x38225c25	crypto_tfm_in_queue
+EXPORT_SYMBOL_GPL vmlinux 0x384958ff	sysfs_update_group
+EXPORT_SYMBOL_GPL vmlinux 0x38650514	sata_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x38712717	relay_switch_subbuf
+EXPORT_SYMBOL_GPL vmlinux 0x3879d0b6	crypto_alloc_shash
+EXPORT_SYMBOL_GPL vmlinux 0x387c34ac	power_supply_set_battery_charged
+EXPORT_SYMBOL_GPL vmlinux 0x38b43abf	rtnl_link_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x38ea936e	__memory_failure
+EXPORT_SYMBOL_GPL vmlinux 0x390c640f	hvc_instantiate
+EXPORT_SYMBOL_GPL vmlinux 0x392a643e	sysdev_class_register
+EXPORT_SYMBOL_GPL vmlinux 0x397b9bfb	dm_rh_update_states
+EXPORT_SYMBOL_GPL vmlinux 0x399f628f	scsi_unregister_device_handler
+EXPORT_SYMBOL_GPL vmlinux 0x39ad4f6b	fuse_request_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x39b64e26	sysdev_register
+EXPORT_SYMBOL_GPL vmlinux 0x39bf90fa	ring_buffer_alloc_read_page
+EXPORT_SYMBOL_GPL vmlinux 0x39c95518	swiotlb_sync_single_range_for_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x39cd85e6	ata_sff_dma_pause
+EXPORT_SYMBOL_GPL vmlinux 0x3a13f9e8	inotify_init
+EXPORT_SYMBOL_GPL vmlinux 0x3a3e5e8a	ata_sff_qc_fill_rtf
+EXPORT_SYMBOL_GPL vmlinux 0x3a6de86a	power_supply_get_by_name
+EXPORT_SYMBOL_GPL vmlinux 0x3a7a761a	skb_segment
+EXPORT_SYMBOL_GPL vmlinux 0x3a9eabb0	rt_mutex_lock
+EXPORT_SYMBOL_GPL vmlinux 0x3ab9aa04	fb_deferred_io_fsync
+EXPORT_SYMBOL_GPL vmlinux 0x3ae71e92	nf_unregister_afinfo
+EXPORT_SYMBOL_GPL vmlinux 0x3af833c3	ata_cable_ignore
+EXPORT_SYMBOL_GPL vmlinux 0x3b09fdc3	led_trigger_store
+EXPORT_SYMBOL_GPL vmlinux 0x3b7b114e	dm_device_name
+EXPORT_SYMBOL_GPL vmlinux 0x3b7ea06f	__fsnotify_inode_delete
+EXPORT_SYMBOL_GPL vmlinux 0x3b7fdb6f	shash_attr_alg
+EXPORT_SYMBOL_GPL vmlinux 0x3be7af02	get_max_files
+EXPORT_SYMBOL_GPL vmlinux 0x3be89d3c	usb_register_notify
+EXPORT_SYMBOL_GPL vmlinux 0x3c307dcb	skcipher_geniv_free
+EXPORT_SYMBOL_GPL vmlinux 0x3c6488c3	usb_buffer_map_sg
+EXPORT_SYMBOL_GPL vmlinux 0x3c6c45ca	__tracepoint_power_frequency
+EXPORT_SYMBOL_GPL vmlinux 0x3c7d8eda	devres_add
+EXPORT_SYMBOL_GPL vmlinux 0x3c7fa7a7	usb_kill_urb
+EXPORT_SYMBOL_GPL vmlinux 0x3c942368	profile_event_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x3c9cab97	tty_find_polling_driver
+EXPORT_SYMBOL_GPL vmlinux 0x3cb3950a	class_interface_register
+EXPORT_SYMBOL_GPL vmlinux 0x3cc42d71	xenbus_map_ring_valloc
+EXPORT_SYMBOL_GPL vmlinux 0x3ccb6c30	firmware_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x3cd06035	add_input_randomness
+EXPORT_SYMBOL_GPL vmlinux 0x3cfdfae5	trace_current_buffer_discard_commit
+EXPORT_SYMBOL_GPL vmlinux 0x3cfe9e79	do_sync_mapping_range
+EXPORT_SYMBOL_GPL vmlinux 0x3cfedb3f	register_pm_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x3d100a0e	ata_sff_thaw
+EXPORT_SYMBOL_GPL vmlinux 0x3d18a025	vfs_kern_mount
+EXPORT_SYMBOL_GPL vmlinux 0x3d381b7b	i2c_new_probed_device
+EXPORT_SYMBOL_GPL vmlinux 0x3d388324	dpm_resume_end
+EXPORT_SYMBOL_GPL vmlinux 0x3d5acc58	sysdev_driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x3d5f392d	acpi_os_unmap_memory
+EXPORT_SYMBOL_GPL vmlinux 0x3d6d0225	transport_add_device
+EXPORT_SYMBOL_GPL vmlinux 0x3d7ea99a	gnttab_grant_foreign_transfer
+EXPORT_SYMBOL_GPL vmlinux 0x3dc4e2e5	usb_put_hcd
+EXPORT_SYMBOL_GPL vmlinux 0x3dd5d829	add_timer_on
+EXPORT_SYMBOL_GPL vmlinux 0x3dde0e07	amd_get_nb_id
+EXPORT_SYMBOL_GPL vmlinux 0x3de34bfd	security_inode_setattr
+EXPORT_SYMBOL_GPL vmlinux 0x3e4c44c2	pci_find_ext_capability
+EXPORT_SYMBOL_GPL vmlinux 0x3e90049c	usb_clear_halt
+EXPORT_SYMBOL_GPL vmlinux 0x3ea6ec5d	pci_bus_max_busnr
+EXPORT_SYMBOL_GPL vmlinux 0x3ecf6cfc	wmi_install_notify_handler
+EXPORT_SYMBOL_GPL vmlinux 0x3efb35c9	get_online_cpus
+EXPORT_SYMBOL_GPL vmlinux 0x3f0348ec	crypto_dequeue_request
+EXPORT_SYMBOL_GPL vmlinux 0x3f093a1f	spi_sync
+EXPORT_SYMBOL_GPL vmlinux 0x3f238101	dcookie_register
+EXPORT_SYMBOL_GPL vmlinux 0x3f2f0897	ata_sff_tf_load
+EXPORT_SYMBOL_GPL vmlinux 0x3f75805e	sysfs_put
+EXPORT_SYMBOL_GPL vmlinux 0x3f84d4c9	gnttab_release_grant_reference
+EXPORT_SYMBOL_GPL vmlinux 0x3f9b256b	inet_csk_listen_stop
+EXPORT_SYMBOL_GPL vmlinux 0x3faa08c4	simple_attr_write
+EXPORT_SYMBOL_GPL vmlinux 0x40164d85	da903x_update
+EXPORT_SYMBOL_GPL vmlinux 0x40258e27	crypto_unregister_ahash
+EXPORT_SYMBOL_GPL vmlinux 0x402a8664	filter_current_check_discard
+EXPORT_SYMBOL_GPL vmlinux 0x405211cb	sync_filesystem
+EXPORT_SYMBOL_GPL vmlinux 0x405f6eeb	ata_port_start
+EXPORT_SYMBOL_GPL vmlinux 0x40af0dec	ata_xfer_mode2mask
+EXPORT_SYMBOL_GPL vmlinux 0x40be2c41	blocking_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x40d3007c	ata_sas_slave_configure
+EXPORT_SYMBOL_GPL vmlinux 0x40e2477d	pci_ioremap_bar
+EXPORT_SYMBOL_GPL vmlinux 0x40eb7312	spi_alloc_device
+EXPORT_SYMBOL_GPL vmlinux 0x4220181b	xenbus_dev_changed
+EXPORT_SYMBOL_GPL vmlinux 0x42494cea	ring_buffer_event_length
+EXPORT_SYMBOL_GPL vmlinux 0x424acc6d	scatterwalk_done
+EXPORT_SYMBOL_GPL vmlinux 0x426f13b9	e820_all_mapped
+EXPORT_SYMBOL_GPL vmlinux 0x427dd702	pci_bus_add_device
+EXPORT_SYMBOL_GPL vmlinux 0x42a18c66	__dma_request_channel
+EXPORT_SYMBOL_GPL vmlinux 0x42acfea4	cpci_hp_register_bus
+EXPORT_SYMBOL_GPL vmlinux 0x42eee679	stop_machine
+EXPORT_SYMBOL_GPL vmlinux 0x4304c1f9	ata_noop_qc_prep
+EXPORT_SYMBOL_GPL vmlinux 0x432fd7f6	__gpio_set_value
+EXPORT_SYMBOL_GPL vmlinux 0x435e24b7	debugfs_create_x32
+EXPORT_SYMBOL_GPL vmlinux 0x437b4ba0	sysdev_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x43f56e82	ata_xfer_mode2shift
+EXPORT_SYMBOL_GPL vmlinux 0x43fc6c6b	drop_file_write_access
+EXPORT_SYMBOL_GPL vmlinux 0x440dbee6	fuse_do_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x44661518	add_to_page_cache_lru
+EXPORT_SYMBOL_GPL vmlinux 0x44683e2d	fib_rules_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x4484a5a4	wait_for_device_probe
+EXPORT_SYMBOL_GPL vmlinux 0x44a120f8	__inet_inherit_port
+EXPORT_SYMBOL_GPL vmlinux 0x44a65d5c	lock_policy_rwsem_read
+EXPORT_SYMBOL_GPL vmlinux 0x44abb265	device_create
+EXPORT_SYMBOL_GPL vmlinux 0x4541fe0d	mtrr_state
+EXPORT_SYMBOL_GPL vmlinux 0x454d5c01	blocking_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x4566c152	__pci_reset_function
+EXPORT_SYMBOL_GPL vmlinux 0x457594fa	crypto_alg_list
+EXPORT_SYMBOL_GPL vmlinux 0x4598ffe3	ip_local_out
+EXPORT_SYMBOL_GPL vmlinux 0x45bf1ff3	crypto_inc
+EXPORT_SYMBOL_GPL vmlinux 0x45ce97f6	vfs_setxattr
+EXPORT_SYMBOL_GPL vmlinux 0x45d14bdf	hypercall_page
+EXPORT_SYMBOL_GPL vmlinux 0x460f31aa	rodata_test_data
+EXPORT_SYMBOL_GPL vmlinux 0x463629cd	regulator_list_voltage
+EXPORT_SYMBOL_GPL vmlinux 0x464b22fb	scsi_nl_sock
+EXPORT_SYMBOL_GPL vmlinux 0x4672e88b	__crypto_dequeue_request
+EXPORT_SYMBOL_GPL vmlinux 0x468b6545	regulator_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x46dc6a84	ata_link_offline
+EXPORT_SYMBOL_GPL vmlinux 0x46eac552	__blkdev_driver_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x470503bc	pci_enable_sriov
+EXPORT_SYMBOL_GPL vmlinux 0x470ce480	get_user_pages_fast
+EXPORT_SYMBOL_GPL vmlinux 0x47229b5c	gpio_request
+EXPORT_SYMBOL_GPL vmlinux 0x475c3565	kobject_get_path
+EXPORT_SYMBOL_GPL vmlinux 0x47b4e363	disk_map_sector_rcu
+EXPORT_SYMBOL_GPL vmlinux 0x4834d9e1	ata_ehi_push_desc
+EXPORT_SYMBOL_GPL vmlinux 0x48615514	blk_trace_remove
+EXPORT_SYMBOL_GPL vmlinux 0x48aec5eb	usb_deregister_device_driver
+EXPORT_SYMBOL_GPL vmlinux 0x490780ff	find_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x497de026	sysfs_create_link
+EXPORT_SYMBOL_GPL vmlinux 0x4985d4b5	sis_info133_for_sata
+EXPORT_SYMBOL_GPL vmlinux 0x499043d3	crypto_init_queue
+EXPORT_SYMBOL_GPL vmlinux 0x4995f903	spi_setup
+EXPORT_SYMBOL_GPL vmlinux 0x49ec9877	crypto_find_alg
+EXPORT_SYMBOL_GPL vmlinux 0x4a577562	blk_rq_err_bytes
+EXPORT_SYMBOL_GPL vmlinux 0x4aa4591f	sock_prot_inuse_add
+EXPORT_SYMBOL_GPL vmlinux 0x4af9d82c	class_dev_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0x4afcdb09	usb_register_dev
+EXPORT_SYMBOL_GPL vmlinux 0x4b33177c	pci_renumber_slot
+EXPORT_SYMBOL_GPL vmlinux 0x4b3f7cc7	sdio_readl
+EXPORT_SYMBOL_GPL vmlinux 0x4b580715	single_release_net
+EXPORT_SYMBOL_GPL vmlinux 0x4b762828	start_thread
+EXPORT_SYMBOL_GPL vmlinux 0x4b859bc1	fib_rules_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x4bb3867b	ring_buffer_read_page
+EXPORT_SYMBOL_GPL vmlinux 0x4be479b5	proc_net_fops_create
+EXPORT_SYMBOL_GPL vmlinux 0x4bee02f0	cpci_hp_unregister_bus
+EXPORT_SYMBOL_GPL vmlinux 0x4bf3351e	usb_driver_claim_interface
+EXPORT_SYMBOL_GPL vmlinux 0x4c759827	byte_rev_table
+EXPORT_SYMBOL_GPL vmlinux 0x4c967e29	inet_csk_addr2sockaddr
+EXPORT_SYMBOL_GPL vmlinux 0x4cec82ee	crypto_chain
+EXPORT_SYMBOL_GPL vmlinux 0x4cff5e3f	sdio_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0x4d282023	blk_abort_request
+EXPORT_SYMBOL_GPL vmlinux 0x4d2c9a35	anon_inode_getfile
+EXPORT_SYMBOL_GPL vmlinux 0x4d3970eb	power_supply_register
+EXPORT_SYMBOL_GPL vmlinux 0x4d4e4610	posix_timer_event
+EXPORT_SYMBOL_GPL vmlinux 0x4d8f4c15	klist_add_before
+EXPORT_SYMBOL_GPL vmlinux 0x4d902f43	ata_acpi_gtm
+EXPORT_SYMBOL_GPL vmlinux 0x4e424cb4	sk_clone
+EXPORT_SYMBOL_GPL vmlinux 0x4ea226d7	ring_buffer_entries_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x4eb0c7b0	sysdev_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x4ed4d7c5	spi_new_device
+EXPORT_SYMBOL_GPL vmlinux 0x4eebbf49	scsi_dh_detach
+EXPORT_SYMBOL_GPL vmlinux 0x4f1ff8f4	usb_hcd_poll_rh_status
+EXPORT_SYMBOL_GPL vmlinux 0x4f2dd2c2	screen_glyph
+EXPORT_SYMBOL_GPL vmlinux 0x4f3537f6	crypto_ahash_final
+EXPORT_SYMBOL_GPL vmlinux 0x4f502ba6	device_del
+EXPORT_SYMBOL_GPL vmlinux 0x4f6a2efb	usb_put_dev
+EXPORT_SYMBOL_GPL vmlinux 0x4f6d1236	crypto_alloc_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x4fc39726	sdio_memcpy_toio
+EXPORT_SYMBOL_GPL vmlinux 0x4fc56cce	iommu_detach_device
+EXPORT_SYMBOL_GPL vmlinux 0x4fdc945d	sata_deb_timing_normal
+EXPORT_SYMBOL_GPL vmlinux 0x5014b118	sysfs_add_file_to_group
+EXPORT_SYMBOL_GPL vmlinux 0x50184142	pci_get_hp_params
+EXPORT_SYMBOL_GPL vmlinux 0x504a2533	sysfs_schedule_callback
+EXPORT_SYMBOL_GPL vmlinux 0x50598efd	ata_sas_port_init
+EXPORT_SYMBOL_GPL vmlinux 0x506a697e	sysfs_chmod_file
+EXPORT_SYMBOL_GPL vmlinux 0x506e12df	platform_driver_probe
+EXPORT_SYMBOL_GPL vmlinux 0x5086ac3a	alg_test
+EXPORT_SYMBOL_GPL vmlinux 0x50b319ce	cpu_bit_bitmap
+EXPORT_SYMBOL_GPL vmlinux 0x50d1f870	pgprot_writecombine
+EXPORT_SYMBOL_GPL vmlinux 0x50e7193a	__i2c_first_dynamic_bus_num
+EXPORT_SYMBOL_GPL vmlinux 0x50f5e532	call_rcu_sched
+EXPORT_SYMBOL_GPL vmlinux 0x50fad434	round_jiffies_up
+EXPORT_SYMBOL_GPL vmlinux 0x513172a3	srcu_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x51602ba6	sysfs_remove_link
+EXPORT_SYMBOL_GPL vmlinux 0x516e7df8	da903x_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5172ff4c	rtc_update_irq
+EXPORT_SYMBOL_GPL vmlinux 0x518c2fc6	hpet_rtc_dropped_irq
+EXPORT_SYMBOL_GPL vmlinux 0x51b94f4c	dm_rh_recovery_end
+EXPORT_SYMBOL_GPL vmlinux 0x5255894b	clockevents_register_device
+EXPORT_SYMBOL_GPL vmlinux 0x527cc9c8	shash_free_instance
+EXPORT_SYMBOL_GPL vmlinux 0x52948366	regulator_bulk_get
+EXPORT_SYMBOL_GPL vmlinux 0x52ab2b4c	inet_csk_route_req
+EXPORT_SYMBOL_GPL vmlinux 0x52d111ea	pm_qos_update_requirement
+EXPORT_SYMBOL_GPL vmlinux 0x5324d04f	bstr_printf
+EXPORT_SYMBOL_GPL vmlinux 0x53614269	get_cpu_idle_time_us
+EXPORT_SYMBOL_GPL vmlinux 0x5372dede	unregister_acpi_bus_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x53986488	register_die_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x539eda8d	ata_pci_device_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x53b36db6	inverse_translate
+EXPORT_SYMBOL_GPL vmlinux 0x54150661	tcp_get_info
+EXPORT_SYMBOL_GPL vmlinux 0x54397bcd	generic_detach_inode
+EXPORT_SYMBOL_GPL vmlinux 0x5460c8d8	fsnotify_get_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x549525ef	handle_nested_irq
+EXPORT_SYMBOL_GPL vmlinux 0x549fe6a9	class_find_device
+EXPORT_SYMBOL_GPL vmlinux 0x5519bea2	ata_base_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x55358d7a	ip6_dst_blackhole
+EXPORT_SYMBOL_GPL vmlinux 0x55526907	xen_features
+EXPORT_SYMBOL_GPL vmlinux 0x556d11df	gpiochip_remove
+EXPORT_SYMBOL_GPL vmlinux 0x55787585	__rtnl_register
+EXPORT_SYMBOL_GPL vmlinux 0x55dc0a63	sysdev_store_ulong
+EXPORT_SYMBOL_GPL vmlinux 0x55f2580b	__alloc_percpu
+EXPORT_SYMBOL_GPL vmlinux 0x561c634a	wmi_evaluate_method
+EXPORT_SYMBOL_GPL vmlinux 0x56310925	regulator_mode_to_status
+EXPORT_SYMBOL_GPL vmlinux 0x56398615	mark_tsc_unstable
+EXPORT_SYMBOL_GPL vmlinux 0x563fb5c8	__trace_bprintk
+EXPORT_SYMBOL_GPL vmlinux 0x5641485b	tty_termios_encode_baud_rate
+EXPORT_SYMBOL_GPL vmlinux 0x564f2252	shmem_file_setup
+EXPORT_SYMBOL_GPL vmlinux 0x568de4ee	ata_pci_device_do_resume
+EXPORT_SYMBOL_GPL vmlinux 0x56947347	dmi_walk
+EXPORT_SYMBOL_GPL vmlinux 0x569c1779	xfrm_audit_state_notfound_simple
+EXPORT_SYMBOL_GPL vmlinux 0x56f80e49	xfrm_audit_policy_delete
+EXPORT_SYMBOL_GPL vmlinux 0x57157c6d	ring_buffer_peek
+EXPORT_SYMBOL_GPL vmlinux 0x57217448	ata_port_schedule_eh
+EXPORT_SYMBOL_GPL vmlinux 0x572623cd	inet_csk_clone
+EXPORT_SYMBOL_GPL vmlinux 0x5779d445	xenbus_exists
+EXPORT_SYMBOL_GPL vmlinux 0x579e0bf5	rtnl_unregister_all
+EXPORT_SYMBOL_GPL vmlinux 0x583b845a	__trace_note_message
+EXPORT_SYMBOL_GPL vmlinux 0x583db1a5	ata_port_abort
+EXPORT_SYMBOL_GPL vmlinux 0x584b943b	ata_do_set_mode
+EXPORT_SYMBOL_GPL vmlinux 0x5882f459	ata_ehi_clear_desc
+EXPORT_SYMBOL_GPL vmlinux 0x58f3c8a8	tty_buffer_request_room
+EXPORT_SYMBOL_GPL vmlinux 0x593a36c2	scsi_dh_handler_exist
+EXPORT_SYMBOL_GPL vmlinux 0x5948fa18	scsi_nl_add_driver
+EXPORT_SYMBOL_GPL vmlinux 0x59c752a3	xfrm_output_resume
+EXPORT_SYMBOL_GPL vmlinux 0x5a0ae43d	attribute_container_classdev_to_container
+EXPORT_SYMBOL_GPL vmlinux 0x5a2b1b67	gnttab_free_grant_reference
+EXPORT_SYMBOL_GPL vmlinux 0x5a48fba2	disable_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0x5a6b9919	__ring_buffer_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x5a7bfe41	crypto_probing_notify
+EXPORT_SYMBOL_GPL vmlinux 0x5ac94ec9	inet6_csk_search_req
+EXPORT_SYMBOL_GPL vmlinux 0x5ae74e31	raw_hash_sk
+EXPORT_SYMBOL_GPL vmlinux 0x5af03a28	gnttab_claim_grant_reference
+EXPORT_SYMBOL_GPL vmlinux 0x5b013610	ata_sas_queuecmd
+EXPORT_SYMBOL_GPL vmlinux 0x5b435139	unregister_jprobes
+EXPORT_SYMBOL_GPL vmlinux 0x5b835e9d	relay_buf_full
+EXPORT_SYMBOL_GPL vmlinux 0x5bfc03c3	unregister_keyboard_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5c1efd0a	alloc_page_buffers
+EXPORT_SYMBOL_GPL vmlinux 0x5c268ced	register_pernet_gen_device
+EXPORT_SYMBOL_GPL vmlinux 0x5c3f52e6	regulator_bulk_disable
+EXPORT_SYMBOL_GPL vmlinux 0x5c8cb862	sysdev_class_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x5c967b9f	cpuidle_enable_device
+EXPORT_SYMBOL_GPL vmlinux 0x5c9cec05	__pci_complete_power_transition
+EXPORT_SYMBOL_GPL vmlinux 0x5cbfd21e	ata_sff_port_start32
+EXPORT_SYMBOL_GPL vmlinux 0x5cd1db01	xenbus_bind_evtchn
+EXPORT_SYMBOL_GPL vmlinux 0x5d0f6f57	kbd_table
+EXPORT_SYMBOL_GPL vmlinux 0x5d297383	cpufreq_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0x5d2b7649	aead_geniv_free
+EXPORT_SYMBOL_GPL vmlinux 0x5d366dec	gnttab_cancel_free_callback
+EXPORT_SYMBOL_GPL vmlinux 0x5d46fd2b	bdi_writeout_inc
+EXPORT_SYMBOL_GPL vmlinux 0x5d730e7b	raw_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x5d87c067	register_acpi_bus_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5d8c1cae	mmput
+EXPORT_SYMBOL_GPL vmlinux 0x5dd46994	xenbus_watch_pathfmt
+EXPORT_SYMBOL_GPL vmlinux 0x5dd67618	register_netevent_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5de1686a	class_for_each_device
+EXPORT_SYMBOL_GPL vmlinux 0x5df32a65	crypto_spawn_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x5e04125e	regulator_bulk_free
+EXPORT_SYMBOL_GPL vmlinux 0x5e5f964c	elv_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x5efa1c4a	usb_find_interface
+EXPORT_SYMBOL_GPL vmlinux 0x5f11781c	debugfs_remove_recursive
+EXPORT_SYMBOL_GPL vmlinux 0x5f2da8c4	check_tsc_unstable
+EXPORT_SYMBOL_GPL vmlinux 0x5f8553e4	sata_scr_write_flush
+EXPORT_SYMBOL_GPL vmlinux 0x5fa611ee	debugfs_create_symlink
+EXPORT_SYMBOL_GPL vmlinux 0x5fca4d68	unregister_pernet_gen_device
+EXPORT_SYMBOL_GPL vmlinux 0x5fcdec5d	xfrm_ealg_get_byidx
+EXPORT_SYMBOL_GPL vmlinux 0x6028dd49	skb_pull_rcsum
+EXPORT_SYMBOL_GPL vmlinux 0x603ab8dd	devres_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x6058e1f3	sdio_claim_host
+EXPORT_SYMBOL_GPL vmlinux 0x60838daf	sdio_align_size
+EXPORT_SYMBOL_GPL vmlinux 0x60a13e90	rcu_barrier
+EXPORT_SYMBOL_GPL vmlinux 0x60a38293	xfrm_audit_policy_add
+EXPORT_SYMBOL_GPL vmlinux 0x60bafed5	ata_pci_sff_init_one
+EXPORT_SYMBOL_GPL vmlinux 0x60cd73ed	pv_apic_ops
+EXPORT_SYMBOL_GPL vmlinux 0x60d55416	usb_interrupt_msg
+EXPORT_SYMBOL_GPL vmlinux 0x60f94558	sg_scsi_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x60fa50f9	put_device
+EXPORT_SYMBOL_GPL vmlinux 0x60fba751	uhci_check_and_reset_hc
+EXPORT_SYMBOL_GPL vmlinux 0x61747e09	blocking_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x6194ffea	do_machine_check
+EXPORT_SYMBOL_GPL vmlinux 0x619f70b9	spi_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x61a1808a	sysdev_class_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x61abe2de	tty_ldisc_ref
+EXPORT_SYMBOL_GPL vmlinux 0x61b5cd98	module_mutex
+EXPORT_SYMBOL_GPL vmlinux 0x61b7aba2	blk_add_driver_data
+EXPORT_SYMBOL_GPL vmlinux 0x61c6f8bf	power_supply_am_i_supplied
+EXPORT_SYMBOL_GPL vmlinux 0x62211d33	bd_claim_by_disk
+EXPORT_SYMBOL_GPL vmlinux 0x6242e2ad	page_cache_async_readahead
+EXPORT_SYMBOL_GPL vmlinux 0x627ce53a	cpci_hp_register_controller
+EXPORT_SYMBOL_GPL vmlinux 0x62960cdf	crypto_alg_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x6298cad9	sdio_disable_func
+EXPORT_SYMBOL_GPL vmlinux 0x629a7f6e	do_posix_clock_nonanosleep
+EXPORT_SYMBOL_GPL vmlinux 0x62d9a7d2	ata_pci_remove_one
+EXPORT_SYMBOL_GPL vmlinux 0x6301d114	device_add
+EXPORT_SYMBOL_GPL vmlinux 0x631350d4	skb_to_sgvec
+EXPORT_SYMBOL_GPL vmlinux 0x631fe87f	skcipher_geniv_init
+EXPORT_SYMBOL_GPL vmlinux 0x63583f91	hrtimer_cancel
+EXPORT_SYMBOL_GPL vmlinux 0x635d1370	usb_hcd_check_unlink_urb
+EXPORT_SYMBOL_GPL vmlinux 0x637c0561	fuse_file_poll
+EXPORT_SYMBOL_GPL vmlinux 0x6388b1dd	br_fdb_test_addr_hook
+EXPORT_SYMBOL_GPL vmlinux 0x6393d52c	vfs_listxattr
+EXPORT_SYMBOL_GPL vmlinux 0x639ec36f	ring_buffer_record_disable_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x63dbe800	sysdev_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x63f139d8	device_release_driver
+EXPORT_SYMBOL_GPL vmlinux 0x63f4dc09	bprintf
+EXPORT_SYMBOL_GPL vmlinux 0x6408368d	crypto_alloc_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0x640ee24f	get_inotify_watch
+EXPORT_SYMBOL_GPL vmlinux 0x64f17343	tcp_is_cwnd_limited
+EXPORT_SYMBOL_GPL vmlinux 0x65036d45	ata_wait_after_reset
+EXPORT_SYMBOL_GPL vmlinux 0x652249a4	usb_hcd_unlink_urb_from_ep
+EXPORT_SYMBOL_GPL vmlinux 0x65343146	d_materialise_unique
+EXPORT_SYMBOL_GPL vmlinux 0x654c49e2	aer_irq
+EXPORT_SYMBOL_GPL vmlinux 0x65589219	usb_debug_root
+EXPORT_SYMBOL_GPL vmlinux 0x6565b802	device_register
+EXPORT_SYMBOL_GPL vmlinux 0x656d4891	fuse_dev_release
+EXPORT_SYMBOL_GPL vmlinux 0x65b3ae79	transport_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x65b95540	dm_requeue_unmapped_request
+EXPORT_SYMBOL_GPL vmlinux 0x65bbbc78	schedule_hrtimeout_range
+EXPORT_SYMBOL_GPL vmlinux 0x65ccb6f0	call_netevent_notifiers
+EXPORT_SYMBOL_GPL vmlinux 0x65d6d0f0	gpio_direction_input
+EXPORT_SYMBOL_GPL vmlinux 0x661601de	sprint_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x6657779c	swiotlb_sync_single_range_for_device
+EXPORT_SYMBOL_GPL vmlinux 0x668402aa	crypto_put_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x669c87a4	filter_match_preds
+EXPORT_SYMBOL_GPL vmlinux 0x66b2a859	nr_free_buffer_pages
+EXPORT_SYMBOL_GPL vmlinux 0x66d75abe	scsi_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x66d87d38	symbol_put_addr
+EXPORT_SYMBOL_GPL vmlinux 0x66ea1170	__blk_put_request
+EXPORT_SYMBOL_GPL vmlinux 0x66eab7f1	sched_setscheduler
+EXPORT_SYMBOL_GPL vmlinux 0x67254173	crypto_grab_aead
+EXPORT_SYMBOL_GPL vmlinux 0x6752c243	inet_diag_register
+EXPORT_SYMBOL_GPL vmlinux 0x6790f512	ring_buffer_iter_empty
+EXPORT_SYMBOL_GPL vmlinux 0x67955ce6	profile_hits
+EXPORT_SYMBOL_GPL vmlinux 0x67e06492	inotify_find_update_watch
+EXPORT_SYMBOL_GPL vmlinux 0x68018218	rt_mutex_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x686c703f	xfrm_count_auth_supported
+EXPORT_SYMBOL_GPL vmlinux 0x6892088c	unregister_pm_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x68a668cb	hrtimer_forward
+EXPORT_SYMBOL_GPL vmlinux 0x68f09f86	ata_sff_tf_read
+EXPORT_SYMBOL_GPL vmlinux 0x6901119a	trace_nowake_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0x69109b31	crypto_shash_setkey
+EXPORT_SYMBOL_GPL vmlinux 0x691b8d3d	device_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x695533ad	crypto_unregister_template
+EXPORT_SYMBOL_GPL vmlinux 0x6993ea46	tcp_set_state
+EXPORT_SYMBOL_GPL vmlinux 0x6994c26a	bsg_register_queue
+EXPORT_SYMBOL_GPL vmlinux 0x69b6d2ff	relay_flush
+EXPORT_SYMBOL_GPL vmlinux 0x69c27f29	vfs_lock_file
+EXPORT_SYMBOL_GPL vmlinux 0x69e5a3ee	rtc_irq_set_state
+EXPORT_SYMBOL_GPL vmlinux 0x69e5fc45	find_module
+EXPORT_SYMBOL_GPL vmlinux 0x69e9a2cb	ata_scsi_slave_config
+EXPORT_SYMBOL_GPL vmlinux 0x69f0032a	inet_csk_reqsk_queue_prune
+EXPORT_SYMBOL_GPL vmlinux 0x6a11a720	__inet_lookup_listener
+EXPORT_SYMBOL_GPL vmlinux 0x6a15fb96	crypto_shash_digest
+EXPORT_SYMBOL_GPL vmlinux 0x6a21cb8c	ata_sas_port_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x6a273798	sysfs_notify_dirent
+EXPORT_SYMBOL_GPL vmlinux 0x6a373360	dm_rh_bio_to_region
+EXPORT_SYMBOL_GPL vmlinux 0x6a3d9322	dm_kill_unmapped_request
+EXPORT_SYMBOL_GPL vmlinux 0x6a8441be	cpci_hp_start
+EXPORT_SYMBOL_GPL vmlinux 0x6a8dc705	da903x_clr_bits
+EXPORT_SYMBOL_GPL vmlinux 0x6adf5eab	preempt_notifier_register
+EXPORT_SYMBOL_GPL vmlinux 0x6ae11d26	crypto_mod_get
+EXPORT_SYMBOL_GPL vmlinux 0x6b3b7167	fb_deferred_io_cleanup
+EXPORT_SYMBOL_GPL vmlinux 0x6b7ab588	trace_define_common_fields
+EXPORT_SYMBOL_GPL vmlinux 0x6b83ef55	ata_link_online
+EXPORT_SYMBOL_GPL vmlinux 0x6b87e3b1	sata_std_hardreset
+EXPORT_SYMBOL_GPL vmlinux 0x6b9178b3	xenbus_strstate
+EXPORT_SYMBOL_GPL vmlinux 0x6ba7f27a	handle_level_irq
+EXPORT_SYMBOL_GPL vmlinux 0x6be62dfd	probe_kernel_read
+EXPORT_SYMBOL_GPL vmlinux 0x6bfd2188	fuse_request_send
+EXPORT_SYMBOL_GPL vmlinux 0x6c0b5808	fuse_request_send_background
+EXPORT_SYMBOL_GPL vmlinux 0x6c404e4c	led_trigger_register
+EXPORT_SYMBOL_GPL vmlinux 0x6c49c4f2	clockevents_notify
+EXPORT_SYMBOL_GPL vmlinux 0x6c807758	sysfs_get_dirent
+EXPORT_SYMBOL_GPL vmlinux 0x6c8d5ae8	__gpio_get_value
+EXPORT_SYMBOL_GPL vmlinux 0x6c8eb98f	xfrm_aalg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0x6ca6c67a	gpiochip_is_requested
+EXPORT_SYMBOL_GPL vmlinux 0x6ce031b4	i2c_new_device
+EXPORT_SYMBOL_GPL vmlinux 0x6d12a543	device_create_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0x6d2fc5a6	net_namespace_list
+EXPORT_SYMBOL_GPL vmlinux 0x6d38200d	crypto_larval_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x6d56594d	skb_icv_walk
+EXPORT_SYMBOL_GPL vmlinux 0x6d7d4f95	ip6_sk_dst_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x6d99bebe	sysfs_remove_file_from_group
+EXPORT_SYMBOL_GPL vmlinux 0x6dac1f9a	led_trigger_set_default
+EXPORT_SYMBOL_GPL vmlinux 0x6e58ddf0	gnttab_end_foreign_transfer_ref
+EXPORT_SYMBOL_GPL vmlinux 0x6e6089f0	crypto_nivaead_type
+EXPORT_SYMBOL_GPL vmlinux 0x6e7474fc	xfrm_ealg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x6e990eb1	ata_pio_need_iordy
+EXPORT_SYMBOL_GPL vmlinux 0x6eb787ee	klist_add_head
+EXPORT_SYMBOL_GPL vmlinux 0x6eeedc32	cleanup_srcu_struct
+EXPORT_SYMBOL_GPL vmlinux 0x6f5041c9	seq_open_net
+EXPORT_SYMBOL_GPL vmlinux 0x6f52a62e	register_kretprobe
+EXPORT_SYMBOL_GPL vmlinux 0x6f6ce32b	rtc_class_close
+EXPORT_SYMBOL_GPL vmlinux 0x6f8547b7	sysfs_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x6fbed5b4	device_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x6fe3d8cf	ktime_add_safe
+EXPORT_SYMBOL_GPL vmlinux 0x6ff607b6	crypto_get_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x7037d79d	k8_flush_garts
+EXPORT_SYMBOL_GPL vmlinux 0x704cdfc0	put_inotify_watch
+EXPORT_SYMBOL_GPL vmlinux 0x706b3a33	cpufreq_frequency_table_get_attr
+EXPORT_SYMBOL_GPL vmlinux 0x7074e30c	securityfs_create_dir
+EXPORT_SYMBOL_GPL vmlinux 0x707ff1bb	ata_xfer_mask2mode
+EXPORT_SYMBOL_GPL vmlinux 0x708837c5	ring_buffer_resize
+EXPORT_SYMBOL_GPL vmlinux 0x716265c7	debugfs_initialized
+EXPORT_SYMBOL_GPL vmlinux 0x7195f3c7	rtnl_register
+EXPORT_SYMBOL_GPL vmlinux 0x71b65ef2	ata_sff_irq_clear
+EXPORT_SYMBOL_GPL vmlinux 0x71c8bc95	kgdb_unregister_io_module
+EXPORT_SYMBOL_GPL vmlinux 0x721babaa	sdio_enable_func
+EXPORT_SYMBOL_GPL vmlinux 0x722c4f65	usb_scuttle_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0x72741f25	trace_vbprintk
+EXPORT_SYMBOL_GPL vmlinux 0x7278d328	all_vm_events
+EXPORT_SYMBOL_GPL vmlinux 0x728583ea	sdio_readw
+EXPORT_SYMBOL_GPL vmlinux 0x729ab9c7	seq_release_net
+EXPORT_SYMBOL_GPL vmlinux 0x72c55186	xenbus_grant_ring
+EXPORT_SYMBOL_GPL vmlinux 0x72d94949	crypto_alloc_aead
+EXPORT_SYMBOL_GPL vmlinux 0x72e03bae	stop_machine_create
+EXPORT_SYMBOL_GPL vmlinux 0x731433ee	unregister_timer_hook
+EXPORT_SYMBOL_GPL vmlinux 0x731a8eab	queue_delayed_work_on
+EXPORT_SYMBOL_GPL vmlinux 0x731dba7a	xen_domain_type
+EXPORT_SYMBOL_GPL vmlinux 0x733e4a90	__class_create
+EXPORT_SYMBOL_GPL vmlinux 0x73645832	sysdev_driver_register
+EXPORT_SYMBOL_GPL vmlinux 0x73a48b4a	ata_sff_std_ports
+EXPORT_SYMBOL_GPL vmlinux 0x73e4678a	ata_dev_pair
+EXPORT_SYMBOL_GPL vmlinux 0x73fcc540	sdio_readb
+EXPORT_SYMBOL_GPL vmlinux 0x742985c2	crypto_hash_walk_done
+EXPORT_SYMBOL_GPL vmlinux 0x743a165e	ata_pack_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0x74814733	tcp_twsk_unique
+EXPORT_SYMBOL_GPL vmlinux 0x7484075a	inotify_inode_queue_event
+EXPORT_SYMBOL_GPL vmlinux 0x74abdafa	task_handoff_register
+EXPORT_SYMBOL_GPL vmlinux 0x74baf17a	tracing_is_on
+EXPORT_SYMBOL_GPL vmlinux 0x74deb10c	used_vectors
+EXPORT_SYMBOL_GPL vmlinux 0x74f0ae80	ring_buffer_time_stamp
+EXPORT_SYMBOL_GPL vmlinux 0x7521afb6	leave_mm
+EXPORT_SYMBOL_GPL vmlinux 0x7534cdfd	ata_sff_qc_prep
+EXPORT_SYMBOL_GPL vmlinux 0x7549636b	scsi_queue_work
+EXPORT_SYMBOL_GPL vmlinux 0x757dc815	root_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x75e8f3c3	crypto_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x760ead7f	sdio_writeb
+EXPORT_SYMBOL_GPL vmlinux 0x761188fd	dpm_suspend_noirq
+EXPORT_SYMBOL_GPL vmlinux 0x7648ee0c	cpufreq_frequency_table_verify
+EXPORT_SYMBOL_GPL vmlinux 0x7685c882	blk_lld_busy
+EXPORT_SYMBOL_GPL vmlinux 0x768a0302	sata_pmp_error_handler
+EXPORT_SYMBOL_GPL vmlinux 0x770dc8b4	sysfs_remove_group
+EXPORT_SYMBOL_GPL vmlinux 0x7712771a	unbind_from_irqhandler
+EXPORT_SYMBOL_GPL vmlinux 0x77127d5e	crypto_ahash_digest
+EXPORT_SYMBOL_GPL vmlinux 0x77295421	rt_mutex_lock_interruptible
+EXPORT_SYMBOL_GPL vmlinux 0x773ca527	init_uts_ns
+EXPORT_SYMBOL_GPL vmlinux 0x776760f9	dm_noflush_suspending
+EXPORT_SYMBOL_GPL vmlinux 0x777721f1	rtc_irq_set_freq
+EXPORT_SYMBOL_GPL vmlinux 0x77b0ebeb	driver_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x77d241d9	blkcipher_walk_virt
+EXPORT_SYMBOL_GPL vmlinux 0x780eed89	acpi_processor_ffh_cstate_enter
+EXPORT_SYMBOL_GPL vmlinux 0x781f4ba2	vfs_getxattr
+EXPORT_SYMBOL_GPL vmlinux 0x78309e2e	i2c_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x7840ede6	key_type_user
+EXPORT_SYMBOL_GPL vmlinux 0x78546758	crypto_enqueue_request
+EXPORT_SYMBOL_GPL vmlinux 0x7885c1ed	usb_hcd_pci_shutdown
+EXPORT_SYMBOL_GPL vmlinux 0x788c852b	ring_buffer_overrun_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x78cf003f	ring_buffer_reset
+EXPORT_SYMBOL_GPL vmlinux 0x78e4a4ee	klist_add_after
+EXPORT_SYMBOL_GPL vmlinux 0x792c05f7	fsnotify
+EXPORT_SYMBOL_GPL vmlinux 0x793a329a	sysfs_remove_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0x7944e0fc	tracing_off
+EXPORT_SYMBOL_GPL vmlinux 0x79808b10	regulator_disable
+EXPORT_SYMBOL_GPL vmlinux 0x79bc6fc8	spi_busnum_to_master
+EXPORT_SYMBOL_GPL vmlinux 0x79cda9a0	ata_sff_softreset
+EXPORT_SYMBOL_GPL vmlinux 0x79d66d78	xenbus_dev_error
+EXPORT_SYMBOL_GPL vmlinux 0x79e36091	fuse_dev_operations
+EXPORT_SYMBOL_GPL vmlinux 0x79eb6e3d	acpi_smbus_read
+EXPORT_SYMBOL_GPL vmlinux 0x7a0f736b	agp_add_bridge
+EXPORT_SYMBOL_GPL vmlinux 0x7a243bce	ata_bmdma_stop
+EXPORT_SYMBOL_GPL vmlinux 0x7a285450	xfrm_inner_extract_output
+EXPORT_SYMBOL_GPL vmlinux 0x7a3c156a	sock_prot_inuse_get
+EXPORT_SYMBOL_GPL vmlinux 0x7a40ad4e	hwmon_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x7a47cf8a	device_remove_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0x7a4bc1aa	dm_rh_get_region_key
+EXPORT_SYMBOL_GPL vmlinux 0x7a4c1438	pv_info
+EXPORT_SYMBOL_GPL vmlinux 0x7ab3c122	edac_handlers
+EXPORT_SYMBOL_GPL vmlinux 0x7ae1ae8e	cpufreq_frequency_table_put_attr
+EXPORT_SYMBOL_GPL vmlinux 0x7b1d544d	edac_handler_set
+EXPORT_SYMBOL_GPL vmlinux 0x7b1d9dfa	blk_insert_cloned_request
+EXPORT_SYMBOL_GPL vmlinux 0x7b4e7638	dev_change_net_namespace
+EXPORT_SYMBOL_GPL vmlinux 0x7b8adfca	fl6_sock_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x7bcd2ded	klist_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0x7bcebd33	usb_get_intf
+EXPORT_SYMBOL_GPL vmlinux 0x7bd7c566	put_driver
+EXPORT_SYMBOL_GPL vmlinux 0x7bee2635	cpufreq_frequency_table_cpuinfo
+EXPORT_SYMBOL_GPL vmlinux 0x7c3ff30d	inet_hashinfo_init
+EXPORT_SYMBOL_GPL vmlinux 0x7c821c56	crypto_spawn_tfm2
+EXPORT_SYMBOL_GPL vmlinux 0x7dc5d0b6	crypto_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x7e1183c9	async_schedule
+EXPORT_SYMBOL_GPL vmlinux 0x7e275ea8	scsi_complete_async_scans
+EXPORT_SYMBOL_GPL vmlinux 0x7e2d7ad6	blk_abort_queue
+EXPORT_SYMBOL_GPL vmlinux 0x7e5e301f	unregister_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0x7e64181d	usb_calc_bus_time
+EXPORT_SYMBOL_GPL vmlinux 0x7e6f2d92	fuse_do_open
+EXPORT_SYMBOL_GPL vmlinux 0x7ecf71bb	single_open_net
+EXPORT_SYMBOL_GPL vmlinux 0x7efef236	ahash_free_instance
+EXPORT_SYMBOL_GPL vmlinux 0x7f19c836	unlock_policy_rwsem_write
+EXPORT_SYMBOL_GPL vmlinux 0x7fbe01cf	anon_transport_class_register
+EXPORT_SYMBOL_GPL vmlinux 0x7ff10ccf	raw_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x8014b6af	input_event_from_user
+EXPORT_SYMBOL_GPL vmlinux 0x80189a41	ata_qc_complete_multiple
+EXPORT_SYMBOL_GPL vmlinux 0x80373203	ata_sff_irq_on
+EXPORT_SYMBOL_GPL vmlinux 0x8039d043	selinux_secmark_relabel_packet_permission
+EXPORT_SYMBOL_GPL vmlinux 0x80417404	ata_host_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x8085c9d3	gpiochip_add
+EXPORT_SYMBOL_GPL vmlinux 0x808ec1a3	crypto_alg_tested
+EXPORT_SYMBOL_GPL vmlinux 0x80bcd3fe	set_task_ioprio
+EXPORT_SYMBOL_GPL vmlinux 0x80c6e9ee	spi_write_then_read
+EXPORT_SYMBOL_GPL vmlinux 0x80ee55c3	selinux_secmark_refcount_inc
+EXPORT_SYMBOL_GPL vmlinux 0x80f03143	usb_autopm_put_interface
+EXPORT_SYMBOL_GPL vmlinux 0x8106d775	cpci_hp_unregister_controller
+EXPORT_SYMBOL_GPL vmlinux 0x8149ea54	ata_timing_find_mode
+EXPORT_SYMBOL_GPL vmlinux 0x81524162	fuse_put_request
+EXPORT_SYMBOL_GPL vmlinux 0x8164859c	rtc_read_time
+EXPORT_SYMBOL_GPL vmlinux 0x81683107	ring_buffer_size
+EXPORT_SYMBOL_GPL vmlinux 0x8226642f	__gpio_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x82923f4e	acpi_bus_trim
+EXPORT_SYMBOL_GPL vmlinux 0x82939ebd	rcu_batches_completed_sched
+EXPORT_SYMBOL_GPL vmlinux 0x82ad1f61	mnt_want_write_file
+EXPORT_SYMBOL_GPL vmlinux 0x82af8b9a	devres_open_group
+EXPORT_SYMBOL_GPL vmlinux 0x82b2ee72	inet6_hash_connect
+EXPORT_SYMBOL_GPL vmlinux 0x82cd19f3	register_xenstore_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x82d79b51	sysctl_vfs_cache_pressure
+EXPORT_SYMBOL_GPL vmlinux 0x82f776b7	gpio_export
+EXPORT_SYMBOL_GPL vmlinux 0x8310e141	disk_part_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0x8333bfde	crypto_ahash_setkey
+EXPORT_SYMBOL_GPL vmlinux 0x833e051c	init_srcu_struct
+EXPORT_SYMBOL_GPL vmlinux 0x83b76dbe	generic_fh_to_parent
+EXPORT_SYMBOL_GPL vmlinux 0x83bc5dac	inotify_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x83c67ec2	raw_seq_stop
+EXPORT_SYMBOL_GPL vmlinux 0x83d4cd9c	inet_hash_connect
+EXPORT_SYMBOL_GPL vmlinux 0x83e52c00	power_supply_class
+EXPORT_SYMBOL_GPL vmlinux 0x83f240e4	xenbus_dev_fatal
+EXPORT_SYMBOL_GPL vmlinux 0x840722da	dev_attr_unload_heads
+EXPORT_SYMBOL_GPL vmlinux 0x842a07ae	crypto_rng_type
+EXPORT_SYMBOL_GPL vmlinux 0x8436a9ba	zap_vma_ptes
+EXPORT_SYMBOL_GPL vmlinux 0x843d70ef	acpi_is_root_bridge
+EXPORT_SYMBOL_GPL vmlinux 0x845cc2c4	unregister_pernet_gen_subsys
+EXPORT_SYMBOL_GPL vmlinux 0x847f2091	sysfs_notify
+EXPORT_SYMBOL_GPL vmlinux 0x84b149e9	hypervisor_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x84bd9e00	cpufreq_freq_attr_scaling_available_freqs
+EXPORT_SYMBOL_GPL vmlinux 0x850af9da	ata_acpi_stm
+EXPORT_SYMBOL_GPL vmlinux 0x85291f80	ata_host_activate
+EXPORT_SYMBOL_GPL vmlinux 0x85478a0b	inet6_hash_frag
+EXPORT_SYMBOL_GPL vmlinux 0x85bcad38	__pci_hp_register
+EXPORT_SYMBOL_GPL vmlinux 0x85c10896	rcu_batches_completed_bh
+EXPORT_SYMBOL_GPL vmlinux 0x85cb1c9d	get_current_tty
+EXPORT_SYMBOL_GPL vmlinux 0x85cf26a8	ata_port_pbar_desc
+EXPORT_SYMBOL_GPL vmlinux 0x85d7edfd	hpet_set_periodic_freq
+EXPORT_SYMBOL_GPL vmlinux 0x85ec6388	fuse_conn_kill
+EXPORT_SYMBOL_GPL vmlinux 0x86072866	sdio_set_block_size
+EXPORT_SYMBOL_GPL vmlinux 0x863ddddc	ip_route_output_flow
+EXPORT_SYMBOL_GPL vmlinux 0x863e3a8c	scsi_get_vpd_page
+EXPORT_SYMBOL_GPL vmlinux 0x86623fd7	notify_remote_via_irq
+EXPORT_SYMBOL_GPL vmlinux 0x867c684a	setup_APIC_eilvt_ibs
+EXPORT_SYMBOL_GPL vmlinux 0x868784cb	__symbol_get
+EXPORT_SYMBOL_GPL vmlinux 0x86a51007	gnttab_end_foreign_transfer
+EXPORT_SYMBOL_GPL vmlinux 0x86a5469d	ring_buffer_empty
+EXPORT_SYMBOL_GPL vmlinux 0x86b1667d	hwrng_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x86f6b99d	synchronize_rcu_expedited
+EXPORT_SYMBOL_GPL vmlinux 0x873fbaea	edac_atomic_assert_error
+EXPORT_SYMBOL_GPL vmlinux 0x876d29f1	wmi_get_event_data
+EXPORT_SYMBOL_GPL vmlinux 0x8774f5ef	pm_runtime_idle
+EXPORT_SYMBOL_GPL vmlinux 0x87754115	raw_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x878cc5de	sdio_release_host
+EXPORT_SYMBOL_GPL vmlinux 0x87a79b40	ata_pci_device_resume
+EXPORT_SYMBOL_GPL vmlinux 0x880b189a	__atomic_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x8810ad5e	crypto_xor
+EXPORT_SYMBOL_GPL vmlinux 0x88406680	ata_std_qc_defer
+EXPORT_SYMBOL_GPL vmlinux 0x885142a6	nf_net_netfilter_sysctl_path
+EXPORT_SYMBOL_GPL vmlinux 0x886dec05	usb_hcd_pci_probe
+EXPORT_SYMBOL_GPL vmlinux 0x88f8be1e	sysdev_show_int
+EXPORT_SYMBOL_GPL vmlinux 0x891e02b1	find_vpid
+EXPORT_SYMBOL_GPL vmlinux 0x89ececdf	rtc_irq_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x8a38b4f3	input_ff_erase
+EXPORT_SYMBOL_GPL vmlinux 0x8a4bdf5f	unregister_net_sysctl_table
+EXPORT_SYMBOL_GPL vmlinux 0x8a4f84f7	pci_restore_msi_state
+EXPORT_SYMBOL_GPL vmlinux 0x8a70ea0e	inet_csk_search_req
+EXPORT_SYMBOL_GPL vmlinux 0x8a72be8e	power_supply_changed
+EXPORT_SYMBOL_GPL vmlinux 0x8a78989f	irq_from_evtchn
+EXPORT_SYMBOL_GPL vmlinux 0x8aa87543	debugfs_create_u16
+EXPORT_SYMBOL_GPL vmlinux 0x8aa9abca	sdev_evt_send_simple
+EXPORT_SYMBOL_GPL vmlinux 0x8ab65efd	ring_buffer_reset_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x8ae1ad66	register_pernet_subsys
+EXPORT_SYMBOL_GPL vmlinux 0x8ae8f1f9	tasklet_hrtimer_init
+EXPORT_SYMBOL_GPL vmlinux 0x8b0eb79e	__blk_end_request_err
+EXPORT_SYMBOL_GPL vmlinux 0x8b39cf9d	unregister_kprobes
+EXPORT_SYMBOL_GPL vmlinux 0x8b4660ee	usb_init_urb
+EXPORT_SYMBOL_GPL vmlinux 0x8b57f997	driver_attach
+EXPORT_SYMBOL_GPL vmlinux 0x8b752ac1	ata_tf_to_fis
+EXPORT_SYMBOL_GPL vmlinux 0x8b9200fd	lookup_address
+EXPORT_SYMBOL_GPL vmlinux 0x8c06a108	xenbus_transaction_start
+EXPORT_SYMBOL_GPL vmlinux 0x8c38074a	unregister_xenstore_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x8c3ad43d	__rtnl_link_register
+EXPORT_SYMBOL_GPL vmlinux 0x8c88f0ea	pm_runtime_resume
+EXPORT_SYMBOL_GPL vmlinux 0x8c9d686d	__wake_up_sync_key
+EXPORT_SYMBOL_GPL vmlinux 0x8cd14218	rt_mutex_unlock
+EXPORT_SYMBOL_GPL vmlinux 0x8ce008ff	security_inode_mkdir
+EXPORT_SYMBOL_GPL vmlinux 0x8d033df4	klist_node_attached
+EXPORT_SYMBOL_GPL vmlinux 0x8d109544	transport_setup_device
+EXPORT_SYMBOL_GPL vmlinux 0x8d21e4df	da903x_read
+EXPORT_SYMBOL_GPL vmlinux 0x8d2e698c	regulator_force_disable
+EXPORT_SYMBOL_GPL vmlinux 0x8d411d0b	unregister_ftrace_event
+EXPORT_SYMBOL_GPL vmlinux 0x8d8afc7b	tcp_reno_cong_avoid
+EXPORT_SYMBOL_GPL vmlinux 0x8d952dc7	usb_remove_hcd
+EXPORT_SYMBOL_GPL vmlinux 0x8da23728	aead_geniv_exit
+EXPORT_SYMBOL_GPL vmlinux 0x8da67bf9	usb_bus_list_lock
+EXPORT_SYMBOL_GPL vmlinux 0x8db1a37e	cpuidle_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0x8db89810	device_for_each_child
+EXPORT_SYMBOL_GPL vmlinux 0x8deb6e3c	usb_deregister
+EXPORT_SYMBOL_GPL vmlinux 0x8df632ae	pciserial_resume_ports
+EXPORT_SYMBOL_GPL vmlinux 0x8dfad02f	pid_vnr
+EXPORT_SYMBOL_GPL vmlinux 0x8e3f58df	proc_net_mkdir
+EXPORT_SYMBOL_GPL vmlinux 0x8e558dd7	regulator_set_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0x8e5c0783	blk_update_request
+EXPORT_SYMBOL_GPL vmlinux 0x8eabc8bd	setup_irq
+EXPORT_SYMBOL_GPL vmlinux 0x8eb58c6e	__wake_up_sync
+EXPORT_SYMBOL_GPL vmlinux 0x8efe0116	led_trigger_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x8f6cee77	__round_jiffies_relative
+EXPORT_SYMBOL_GPL vmlinux 0x8f8932fa	xenbus_switch_state
+EXPORT_SYMBOL_GPL vmlinux 0x8f9c4889	ata_sff_data_xfer
+EXPORT_SYMBOL_GPL vmlinux 0x8fa74514	sysdev_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x8fd922f3	blk_rq_prep_clone
+EXPORT_SYMBOL_GPL vmlinux 0x9009602a	acpi_bus_get_ejd
+EXPORT_SYMBOL_GPL vmlinux 0x903e3a0c	br_handle_frame_hook
+EXPORT_SYMBOL_GPL vmlinux 0x9044591d	crypto_larval_kill
+EXPORT_SYMBOL_GPL vmlinux 0x90540857	tcp_unregister_congestion_control
+EXPORT_SYMBOL_GPL vmlinux 0x9078bc46	__cpufreq_driver_target
+EXPORT_SYMBOL_GPL vmlinux 0x90a1004a	crypto_has_alg
+EXPORT_SYMBOL_GPL vmlinux 0x90f3c78e	queue_delayed_work
+EXPORT_SYMBOL_GPL vmlinux 0x90f409ea	fib_rules_cleanup_ops
+EXPORT_SYMBOL_GPL vmlinux 0x91346b63	sdio_release_irq
+EXPORT_SYMBOL_GPL vmlinux 0x91482eef	usb_anchor_empty
+EXPORT_SYMBOL_GPL vmlinux 0x9159b9d6	profile_event_register
+EXPORT_SYMBOL_GPL vmlinux 0x91640f16	dm_rh_get_region_size
+EXPORT_SYMBOL_GPL vmlinux 0x91a456a6	usb_autopm_get_interface
+EXPORT_SYMBOL_GPL vmlinux 0x91ff1264	platform_device_del
+EXPORT_SYMBOL_GPL vmlinux 0x9244c614	platform_get_resource
+EXPORT_SYMBOL_GPL vmlinux 0x9249b012	task_active_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0x92778d56	kern_mount_data
+EXPORT_SYMBOL_GPL vmlinux 0x929b13fc	pci_disable_rom
+EXPORT_SYMBOL_GPL vmlinux 0x92d31cfb	fixed_phy_add
+EXPORT_SYMBOL_GPL vmlinux 0x92e33582	crypto_create_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x92fb217b	dcookie_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x93260715	register_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0x935893b2	blk_rq_unprep_clone
+EXPORT_SYMBOL_GPL vmlinux 0x935a7c48	usb_hcd_pci_remove
+EXPORT_SYMBOL_GPL vmlinux 0x93aa2bb2	acpi_get_pci_dev
+EXPORT_SYMBOL_GPL vmlinux 0x93d2422d	snmp_mib_free
+EXPORT_SYMBOL_GPL vmlinux 0x93ebe3f5	usb_create_hcd
+EXPORT_SYMBOL_GPL vmlinux 0x9418bbb8	sdio_memcpy_fromio
+EXPORT_SYMBOL_GPL vmlinux 0x942a41f4	iommu_unmap_range
+EXPORT_SYMBOL_GPL vmlinux 0x94326e33	ata_std_prereset
+EXPORT_SYMBOL_GPL vmlinux 0x944561ea	ata_slave_link_init
+EXPORT_SYMBOL_GPL vmlinux 0x94a3bf70	regulator_put
+EXPORT_SYMBOL_GPL vmlinux 0x94a68723	ata_scsi_slave_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x94bef61c	lookup_instantiate_filp
+EXPORT_SYMBOL_GPL vmlinux 0x94df3ab0	crypto_destroy_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x94ef4d05	cpci_hp_stop
+EXPORT_SYMBOL_GPL vmlinux 0x94f728e2	hrtimer_init_sleeper
+EXPORT_SYMBOL_GPL vmlinux 0x9505e567	usb_poison_urb
+EXPORT_SYMBOL_GPL vmlinux 0x952391e8	dma_run_dependencies
+EXPORT_SYMBOL_GPL vmlinux 0x952664c5	do_exit
+EXPORT_SYMBOL_GPL vmlinux 0x9556688b	user_read
+EXPORT_SYMBOL_GPL vmlinux 0x956a91ba	gpio_get_value_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x957323d7	cpufreq_unregister_governor
+EXPORT_SYMBOL_GPL vmlinux 0x95758050	__blocking_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x957a53b0	sk_setup_caps
+EXPORT_SYMBOL_GPL vmlinux 0x95cdc22f	ata_sff_busy_sleep
+EXPORT_SYMBOL_GPL vmlinux 0x961a8cd3	unlock_policy_rwsem_read
+EXPORT_SYMBOL_GPL vmlinux 0x961e714a	crypto_blkcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0x964d5c39	acpi_os_map_memory
+EXPORT_SYMBOL_GPL vmlinux 0x966eb1e0	mnt_clone_write
+EXPORT_SYMBOL_GPL vmlinux 0x96b7d4e5	get_task_mm
+EXPORT_SYMBOL_GPL vmlinux 0x96cbcf31	pm_qos_add_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x970c8daa	fixed_phy_set_link_update
+EXPORT_SYMBOL_GPL vmlinux 0x9724f911	crypto_shash_finup
+EXPORT_SYMBOL_GPL vmlinux 0x972f2ebd	shash_ahash_finup
+EXPORT_SYMBOL_GPL vmlinux 0x97982542	hrtimer_start_range_ns
+EXPORT_SYMBOL_GPL vmlinux 0x97afc880	__crypto_alloc_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x97c1c194	vfs_cancel_lock
+EXPORT_SYMBOL_GPL vmlinux 0x97cc1802	unregister_pernet_subsys
+EXPORT_SYMBOL_GPL vmlinux 0x980fa92e	__pm_runtime_set_status
+EXPORT_SYMBOL_GPL vmlinux 0x98215d8d	device_rename
+EXPORT_SYMBOL_GPL vmlinux 0x9827f7f6	blk_queue_rq_timeout
+EXPORT_SYMBOL_GPL vmlinux 0x9833bc0c	hvc_kick
+EXPORT_SYMBOL_GPL vmlinux 0x9841a4b9	scsi_dh_activate
+EXPORT_SYMBOL_GPL vmlinux 0x984cecb0	__pm_runtime_get
+EXPORT_SYMBOL_GPL vmlinux 0x9855875a	input_ff_upload
+EXPORT_SYMBOL_GPL vmlinux 0x98cdfc38	acpi_pci_check_ejectable
+EXPORT_SYMBOL_GPL vmlinux 0x98ef3fdf	usb_root_hub_lost_power
+EXPORT_SYMBOL_GPL vmlinux 0x98fc63fc	__fsnotify_parent
+EXPORT_SYMBOL_GPL vmlinux 0x9924c496	__usb_get_extra_descriptor
+EXPORT_SYMBOL_GPL vmlinux 0x99286626	fuse_abort_conn
+EXPORT_SYMBOL_GPL vmlinux 0x9930ed80	__create_workqueue_key
+EXPORT_SYMBOL_GPL vmlinux 0x995d1071	prof_on
+EXPORT_SYMBOL_GPL vmlinux 0x995d38f8	attribute_container_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x9984c858	usb_unpoison_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0x9a11a0fc	crypto_attr_alg_name
+EXPORT_SYMBOL_GPL vmlinux 0x9a369bbd	debugfs_create_x8
+EXPORT_SYMBOL_GPL vmlinux 0x9a4d1034	idle_notifier_register
+EXPORT_SYMBOL_GPL vmlinux 0x9ad56f09	usb_bulk_msg
+EXPORT_SYMBOL_GPL vmlinux 0x9ae2a3ec	pci_hp_create_module_link
+EXPORT_SYMBOL_GPL vmlinux 0x9b784fce	inet6_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x9b8b3e51	acpi_processor_ffh_cstate_probe
+EXPORT_SYMBOL_GPL vmlinux 0x9ba0501e	unregister_vt_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x9bb94403	usb_lock_device_for_reset
+EXPORT_SYMBOL_GPL vmlinux 0x9be34dea	bsg_unregister_queue
+EXPORT_SYMBOL_GPL vmlinux 0x9c0cbc89	ata_cable_sata
+EXPORT_SYMBOL_GPL vmlinux 0x9c447323	ata_sff_check_status
+EXPORT_SYMBOL_GPL vmlinux 0x9c5a5292	crypto_shash_final
+EXPORT_SYMBOL_GPL vmlinux 0x9c926be4	xfrm_audit_state_delete
+EXPORT_SYMBOL_GPL vmlinux 0x9cb18781	dm_rh_get_state
+EXPORT_SYMBOL_GPL vmlinux 0x9cb8037b	xfrm_count_enc_supported
+EXPORT_SYMBOL_GPL vmlinux 0x9cfb6d62	pci_reset_function
+EXPORT_SYMBOL_GPL vmlinux 0x9d06688b	register_xenbus_watch
+EXPORT_SYMBOL_GPL vmlinux 0x9d2ac309	platform_device_add
+EXPORT_SYMBOL_GPL vmlinux 0x9d2b6a58	hpet_register_irq_handler
+EXPORT_SYMBOL_GPL vmlinux 0x9d308c4d	hrtimer_try_to_cancel
+EXPORT_SYMBOL_GPL vmlinux 0x9d381449	vfs_removexattr
+EXPORT_SYMBOL_GPL vmlinux 0x9d3850e1	gnttab_alloc_grant_references
+EXPORT_SYMBOL_GPL vmlinux 0x9d4287a7	platform_bus
+EXPORT_SYMBOL_GPL vmlinux 0x9d741a89	user_instantiate
+EXPORT_SYMBOL_GPL vmlinux 0x9da688ea	pci_disable_pcie_error_reporting
+EXPORT_SYMBOL_GPL vmlinux 0x9dca1d7c	usb_set_interface
+EXPORT_SYMBOL_GPL vmlinux 0x9dcec942	skcipher_geniv_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x9de06849	ipv6_dup_options
+EXPORT_SYMBOL_GPL vmlinux 0x9df1e5f9	scsi_internal_device_unblock
+EXPORT_SYMBOL_GPL vmlinux 0x9dfa0f9f	usb_reset_configuration
+EXPORT_SYMBOL_GPL vmlinux 0x9e01f6d4	eventfd_signal
+EXPORT_SYMBOL_GPL vmlinux 0x9e3dda60	mnt_want_write
+EXPORT_SYMBOL_GPL vmlinux 0x9e6b50ce	pm_runtime_enable
+EXPORT_SYMBOL_GPL vmlinux 0x9e711ad2	pm_qos_requirement
+EXPORT_SYMBOL_GPL vmlinux 0x9e8811d5	macvlan_handle_frame_hook
+EXPORT_SYMBOL_GPL vmlinux 0x9e95459a	transport_remove_device
+EXPORT_SYMBOL_GPL vmlinux 0x9ea08a44	__module_address
+EXPORT_SYMBOL_GPL vmlinux 0x9efc7366	cpuidle_disable_device
+EXPORT_SYMBOL_GPL vmlinux 0x9f074685	elv_register
+EXPORT_SYMBOL_GPL vmlinux 0x9f1c9fd2	fb_deferred_io_open
+EXPORT_SYMBOL_GPL vmlinux 0x9f34e098	usb_add_hcd
+EXPORT_SYMBOL_GPL vmlinux 0x9f40a6d6	async_synchronize_full_domain
+EXPORT_SYMBOL_GPL vmlinux 0x9f4d98f2	inet_hash
+EXPORT_SYMBOL_GPL vmlinux 0x9f611e62	debugfs_create_bool
+EXPORT_SYMBOL_GPL vmlinux 0x9f6aeb41	blk_queue_rq_timed_out
+EXPORT_SYMBOL_GPL vmlinux 0x9f85ed90	klist_remove
+EXPORT_SYMBOL_GPL vmlinux 0x9fb073e5	cpufreq_register_governor
+EXPORT_SYMBOL_GPL vmlinux 0x9fce80db	fb_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x9fed8187	inet_unhash
+EXPORT_SYMBOL_GPL vmlinux 0xa0255440	net_ipv4_ctl_path
+EXPORT_SYMBOL_GPL vmlinux 0xa0686e82	ata_cable_80wire
+EXPORT_SYMBOL_GPL vmlinux 0xa07c16ae	ata_eh_thaw_port
+EXPORT_SYMBOL_GPL vmlinux 0xa1091707	proc_net_remove
+EXPORT_SYMBOL_GPL vmlinux 0xa157ae34	xenbus_map_ring
+EXPORT_SYMBOL_GPL vmlinux 0xa186c8f6	lookup_create
+EXPORT_SYMBOL_GPL vmlinux 0xa1b6754a	uhci_reset_hc
+EXPORT_SYMBOL_GPL vmlinux 0xa219ae66	regulator_bulk_enable
+EXPORT_SYMBOL_GPL vmlinux 0xa2294b4c	ata_pio_queue_task
+EXPORT_SYMBOL_GPL vmlinux 0xa23e6b2b	blkcipher_walk_done
+EXPORT_SYMBOL_GPL vmlinux 0xa248a773	dm_rh_recovery_prepare
+EXPORT_SYMBOL_GPL vmlinux 0xa288efcf	unregister_kretprobes
+EXPORT_SYMBOL_GPL vmlinux 0xa28d8527	usb_poison_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0xa29f2d12	rtc_set_alarm
+EXPORT_SYMBOL_GPL vmlinux 0xa2e67f08	acpi_bus_generate_proc_event4
+EXPORT_SYMBOL_GPL vmlinux 0xa307bd10	driver_find
+EXPORT_SYMBOL_GPL vmlinux 0xa353fffc	xenbus_rm
+EXPORT_SYMBOL_GPL vmlinux 0xa3e76b4b	inet6_csk_xmit
+EXPORT_SYMBOL_GPL vmlinux 0xa40a8590	input_event_to_user
+EXPORT_SYMBOL_GPL vmlinux 0xa413530f	ata_bmdma_mode_filter
+EXPORT_SYMBOL_GPL vmlinux 0xa4465963	dm_unregister_path_selector
+EXPORT_SYMBOL_GPL vmlinux 0xa452c297	hpet_mask_rtc_irq_bit
+EXPORT_SYMBOL_GPL vmlinux 0xa4849d12	crypto_aead_type
+EXPORT_SYMBOL_GPL vmlinux 0xa4a42813	vbin_printf
+EXPORT_SYMBOL_GPL vmlinux 0xa4b24ba1	usb_put_intf
+EXPORT_SYMBOL_GPL vmlinux 0xa4d58669	math_state_restore
+EXPORT_SYMBOL_GPL vmlinux 0xa4e08dca	usb_hcd_link_urb_to_ep
+EXPORT_SYMBOL_GPL vmlinux 0xa50c2f9f	class_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xa50ffe56	tty_init_termios
+EXPORT_SYMBOL_GPL vmlinux 0xa51105bf	spi_async
+EXPORT_SYMBOL_GPL vmlinux 0xa519a3eb	xenbus_watch_path
+EXPORT_SYMBOL_GPL vmlinux 0xa53e6027	rtc_set_mmss
+EXPORT_SYMBOL_GPL vmlinux 0xa5597e1c	cpuidle_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0xa5a2b238	sdio_writew
+EXPORT_SYMBOL_GPL vmlinux 0xa5aa55fa	destroy_workqueue
+EXPORT_SYMBOL_GPL vmlinux 0xa5acc907	relay_file_operations
+EXPORT_SYMBOL_GPL vmlinux 0xa5bf5c3e	pm_qos_add_requirement
+EXPORT_SYMBOL_GPL vmlinux 0xa5c36cec	inotify_unmount_inodes
+EXPORT_SYMBOL_GPL vmlinux 0xa5efbf4c	async_synchronize_full
+EXPORT_SYMBOL_GPL vmlinux 0xa60926cc	platform_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0xa6473125	pci_enable_rom
+EXPORT_SYMBOL_GPL vmlinux 0xa651d22f	sdio_claim_irq
+EXPORT_SYMBOL_GPL vmlinux 0xa665a7b1	srcu_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xa765601d	ata_pci_sff_init_host
+EXPORT_SYMBOL_GPL vmlinux 0xa7680fc4	do_kern_mount
+EXPORT_SYMBOL_GPL vmlinux 0xa78a2da9	platform_device_register_simple
+EXPORT_SYMBOL_GPL vmlinux 0xa78e60a3	fuse_sync_release
+EXPORT_SYMBOL_GPL vmlinux 0xa79cec1c	usb_store_new_id
+EXPORT_SYMBOL_GPL vmlinux 0xa87ae87e	bus_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xa891a223	ata_eh_qc_retry
+EXPORT_SYMBOL_GPL vmlinux 0xa8b7ca6b	ipv6_find_tlv
+EXPORT_SYMBOL_GPL vmlinux 0xa8ca6e89	regulator_set_voltage
+EXPORT_SYMBOL_GPL vmlinux 0xa8f59416	gpio_direction_output
+EXPORT_SYMBOL_GPL vmlinux 0xa9126bff	hpet_set_rtc_irq_bit
+EXPORT_SYMBOL_GPL vmlinux 0xa9167685	blkdev_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xa94fea41	crypto_grab_skcipher
+EXPORT_SYMBOL_GPL vmlinux 0xa9816fb8	scsi_flush_work
+EXPORT_SYMBOL_GPL vmlinux 0xa9c530b8	unregister_oom_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xa9d5e788	inotify_add_watch
+EXPORT_SYMBOL_GPL vmlinux 0xaa0c6338	console_drivers
+EXPORT_SYMBOL_GPL vmlinux 0xaa17a6dc	usb_get_descriptor
+EXPORT_SYMBOL_GPL vmlinux 0xaa3e3aea	__i2c_board_lock
+EXPORT_SYMBOL_GPL vmlinux 0xaa5310f9	__tracepoint_napi_poll
+EXPORT_SYMBOL_GPL vmlinux 0xaa8c4696	cpu_clock
+EXPORT_SYMBOL_GPL vmlinux 0xaaa530c3	regulator_get
+EXPORT_SYMBOL_GPL vmlinux 0xaac98eb5	scsi_register_device_handler
+EXPORT_SYMBOL_GPL vmlinux 0xaad47370	crypto_init_ahash_spawn
+EXPORT_SYMBOL_GPL vmlinux 0xaaddf6ca	blocking_notifier_chain_cond_register
+EXPORT_SYMBOL_GPL vmlinux 0xaae8e85e	acpi_ec_add_query_handler
+EXPORT_SYMBOL_GPL vmlinux 0xaaf253a0	class_dev_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0xab01acbe	gnttab_request_free_callback
+EXPORT_SYMBOL_GPL vmlinux 0xab57e311	tracepoint_probe_register
+EXPORT_SYMBOL_GPL vmlinux 0xab67f0f3	anon_transport_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xab69b31f	save_stack_trace_tsk
+EXPORT_SYMBOL_GPL vmlinux 0xab707c8e	scsi_internal_device_block
+EXPORT_SYMBOL_GPL vmlinux 0xaba8ea48	usb_unpoison_urb
+EXPORT_SYMBOL_GPL vmlinux 0xabf5287d	pci_find_next_ht_capability
+EXPORT_SYMBOL_GPL vmlinux 0xac8e3b2f	usb_ep0_reinit
+EXPORT_SYMBOL_GPL vmlinux 0xaca2d970	usb_hcd_resume_root_hub
+EXPORT_SYMBOL_GPL vmlinux 0xacafa8e7	vector_used_by_percpu_irq
+EXPORT_SYMBOL_GPL vmlinux 0xacb71686	usb_unlink_urb
+EXPORT_SYMBOL_GPL vmlinux 0xacbc35db	__inet_hash_nolisten
+EXPORT_SYMBOL_GPL vmlinux 0xacc19485	ibft_addr
+EXPORT_SYMBOL_GPL vmlinux 0xaccf754e	sysfs_create_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0xace5c0fc	usb_bus_list
+EXPORT_SYMBOL_GPL vmlinux 0xad096363	xenbus_printf
+EXPORT_SYMBOL_GPL vmlinux 0xad18f941	__inet_twsk_hashdance
+EXPORT_SYMBOL_GPL vmlinux 0xad2ecd8a	pci_set_pcie_reset_state
+EXPORT_SYMBOL_GPL vmlinux 0xad792548	pci_create_slot
+EXPORT_SYMBOL_GPL vmlinux 0xad927df0	ring_buffer_iter_peek
+EXPORT_SYMBOL_GPL vmlinux 0xada76147	__rtnl_link_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xaddc6dd7	tty_encode_baud_rate
+EXPORT_SYMBOL_GPL vmlinux 0xadf3aa47	inet_twsk_purge
+EXPORT_SYMBOL_GPL vmlinux 0xae0c87ee	pm_qos_remove_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xae528a75	srcu_read_lock
+EXPORT_SYMBOL_GPL vmlinux 0xae6d3fc9	sata_link_resume
+EXPORT_SYMBOL_GPL vmlinux 0xae8e9d00	ata_cable_40wire
+EXPORT_SYMBOL_GPL vmlinux 0xaeb2c45c	fuse_conn_init
+EXPORT_SYMBOL_GPL vmlinux 0xaed1d450	sysfs_get
+EXPORT_SYMBOL_GPL vmlinux 0xaed831be	rtc_alarm_irq_enable
+EXPORT_SYMBOL_GPL vmlinux 0xaf3f6fe0	ata_sff_interrupt
+EXPORT_SYMBOL_GPL vmlinux 0xaf5eb06d	crypto_alloc_base
+EXPORT_SYMBOL_GPL vmlinux 0xaf75725f	input_ff_create
+EXPORT_SYMBOL_GPL vmlinux 0xaf8a4c74	inotify_rm_wd
+EXPORT_SYMBOL_GPL vmlinux 0xafa9bc79	ata_dummy_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0xafc7c996	usb_unlink_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0xafe845e8	iommu_attach_device
+EXPORT_SYMBOL_GPL vmlinux 0xafefd48e	ata_dev_next
+EXPORT_SYMBOL_GPL vmlinux 0xb0223109	klist_next
+EXPORT_SYMBOL_GPL vmlinux 0xb0348a4f	rt_mutex_trylock
+EXPORT_SYMBOL_GPL vmlinux 0xb08e5620	simple_attr_release
+EXPORT_SYMBOL_GPL vmlinux 0xb0aa812e	fips_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xb0ac5ea0	led_trigger_register_simple
+EXPORT_SYMBOL_GPL vmlinux 0xb0cf522f	devres_get
+EXPORT_SYMBOL_GPL vmlinux 0xb0eedea9	usb_wait_anchor_empty_timeout
+EXPORT_SYMBOL_GPL vmlinux 0xb104c61e	ata_sff_exec_command
+EXPORT_SYMBOL_GPL vmlinux 0xb10d55bc	cn_netlink_send
+EXPORT_SYMBOL_GPL vmlinux 0xb131ff95	pci_stop_bus_device
+EXPORT_SYMBOL_GPL vmlinux 0xb13239b6	anon_inode_getfd
+EXPORT_SYMBOL_GPL vmlinux 0xb15c20c5	ata_port_freeze
+EXPORT_SYMBOL_GPL vmlinux 0xb16f8453	uart_console_write
+EXPORT_SYMBOL_GPL vmlinux 0xb18429eb	suspend_device_irqs
+EXPORT_SYMBOL_GPL vmlinux 0xb1acbcce	rcu_barrier_sched
+EXPORT_SYMBOL_GPL vmlinux 0xb1e3a2d6	regulator_get_voltage
+EXPORT_SYMBOL_GPL vmlinux 0xb219e9b7	dm_region_hash_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xb21d19bb	ata_eh_analyze_ncq_error
+EXPORT_SYMBOL_GPL vmlinux 0xb29f433d	register_posix_clock
+EXPORT_SYMBOL_GPL vmlinux 0xb2b42d83	dev_attr_sw_activity
+EXPORT_SYMBOL_GPL vmlinux 0xb2fab611	rdev_get_dev
+EXPORT_SYMBOL_GPL vmlinux 0xb320cf44	sata_link_debounce
+EXPORT_SYMBOL_GPL vmlinux 0xb3253ed9	hpet_rtc_timer_init
+EXPORT_SYMBOL_GPL vmlinux 0xb33b0067	pci_block_user_cfg_access
+EXPORT_SYMBOL_GPL vmlinux 0xb34b37d7	sata_pmp_qc_defer_cmd_switch
+EXPORT_SYMBOL_GPL vmlinux 0xb37fd83b	ata_pci_sff_activate_host
+EXPORT_SYMBOL_GPL vmlinux 0xb38e9a9c	class_interface_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xb3ba5c02	vfs_test_lock
+EXPORT_SYMBOL_GPL vmlinux 0xb3d7e262	pci_find_next_capability
+EXPORT_SYMBOL_GPL vmlinux 0xb42941ee	dma_wait_for_async_tx
+EXPORT_SYMBOL_GPL vmlinux 0xb42f2903	relay_close
+EXPORT_SYMBOL_GPL vmlinux 0xb42f491f	inet_ctl_sock_create
+EXPORT_SYMBOL_GPL vmlinux 0xb43dc474	inet_csk_bind_conflict
+EXPORT_SYMBOL_GPL vmlinux 0xb4534729	regulator_set_mode
+EXPORT_SYMBOL_GPL vmlinux 0xb4960db2	ata_sff_hsm_move
+EXPORT_SYMBOL_GPL vmlinux 0xb49b346a	apply_to_page_range
+EXPORT_SYMBOL_GPL vmlinux 0xb4e14553	gnttab_query_foreign_access
+EXPORT_SYMBOL_GPL vmlinux 0xb4ea7cf7	kgdb_connected
+EXPORT_SYMBOL_GPL vmlinux 0xb50bfaca	regulator_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xb5100fec	dm_path_uevent
+EXPORT_SYMBOL_GPL vmlinux 0xb51fbd64	edac_op_state
+EXPORT_SYMBOL_GPL vmlinux 0xb53ae573	cpu_idle_wait
+EXPORT_SYMBOL_GPL vmlinux 0xb58dcfa2	synchronize_sched_expedited
+EXPORT_SYMBOL_GPL vmlinux 0xb5a0275b	devres_release_group
+EXPORT_SYMBOL_GPL vmlinux 0xb5a6ebe2	wmi_remove_notify_handler
+EXPORT_SYMBOL_GPL vmlinux 0xb5c69426	sata_scr_read
+EXPORT_SYMBOL_GPL vmlinux 0xb612444d	snmp_mib_init
+EXPORT_SYMBOL_GPL vmlinux 0xb6230f1f	gnttab_grant_foreign_access
+EXPORT_SYMBOL_GPL vmlinux 0xb6247301	blkdev_aio_write
+EXPORT_SYMBOL_GPL vmlinux 0xb62e3e9d	xfrm_audit_state_add
+EXPORT_SYMBOL_GPL vmlinux 0xb6416c0d	__srcu_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xb65091b3	selinux_secmark_refcount_dec
+EXPORT_SYMBOL_GPL vmlinux 0xb66f9f1c	dm_rh_recovery_start
+EXPORT_SYMBOL_GPL vmlinux 0xb6aeb661	ata_id_c_string
+EXPORT_SYMBOL_GPL vmlinux 0xb71615f3	tcp_slow_start
+EXPORT_SYMBOL_GPL vmlinux 0xb718f2f9	sfi_table_parse
+EXPORT_SYMBOL_GPL vmlinux 0xb744fa43	xfrm_ealg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0xb760aaa7	usb_set_device_state
+EXPORT_SYMBOL_GPL vmlinux 0xb7918e19	usb_control_msg
+EXPORT_SYMBOL_GPL vmlinux 0xb7931560	inet_csk_get_port
+EXPORT_SYMBOL_GPL vmlinux 0xb795637c	regulator_is_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xb7d7c12e	hpet_set_alarm_time
+EXPORT_SYMBOL_GPL vmlinux 0xb7e2eb91	mce_cpu_specific_poll
+EXPORT_SYMBOL_GPL vmlinux 0xb7fc2f64	usb_driver_release_interface
+EXPORT_SYMBOL_GPL vmlinux 0xb7fdd0df	eventfd_ctx_put
+EXPORT_SYMBOL_GPL vmlinux 0xb815e909	dm_register_path_selector
+EXPORT_SYMBOL_GPL vmlinux 0xb841bf22	cpuidle_unregister_device
+EXPORT_SYMBOL_GPL vmlinux 0xb858b265	debugfs_remove
+EXPORT_SYMBOL_GPL vmlinux 0xb87dd3df	kobject_create_and_add
+EXPORT_SYMBOL_GPL vmlinux 0xb8baa9e2	skb_tstamp_tx
+EXPORT_SYMBOL_GPL vmlinux 0xb8d8958d	securityfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xb903674c	scatterwalk_map_and_copy
+EXPORT_SYMBOL_GPL vmlinux 0xb92d5c88	driver_add_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xb9397589	part_round_stats
+EXPORT_SYMBOL_GPL vmlinux 0xb94db510	register_jprobe
+EXPORT_SYMBOL_GPL vmlinux 0xb99d5837	xenbus_read
+EXPORT_SYMBOL_GPL vmlinux 0xb9b9c1b4	usb_free_urb
+EXPORT_SYMBOL_GPL vmlinux 0xb9e52dbf	pci_cleanup_aer_uncorrect_error_status
+EXPORT_SYMBOL_GPL vmlinux 0xb9eb3aa9	add_uevent_var
+EXPORT_SYMBOL_GPL vmlinux 0xb9f8736a	pm_request_resume
+EXPORT_SYMBOL_GPL vmlinux 0xba06c695	pm_runtime_suspend
+EXPORT_SYMBOL_GPL vmlinux 0xba30d904	regulator_set_optimum_mode
+EXPORT_SYMBOL_GPL vmlinux 0xba57a9ec	blk_queue_lld_busy
+EXPORT_SYMBOL_GPL vmlinux 0xba8979e4	class_compat_register
+EXPORT_SYMBOL_GPL vmlinux 0xbaa6d11b	ata_std_bios_param
+EXPORT_SYMBOL_GPL vmlinux 0xbac57201	ring_buffer_overruns
+EXPORT_SYMBOL_GPL vmlinux 0xbae34c27	scsi_nl_remove_transport
+EXPORT_SYMBOL_GPL vmlinux 0xbae42212	pci_disable_sriov
+EXPORT_SYMBOL_GPL vmlinux 0xbb08e82f	ata_sff_data_xfer_noirq
+EXPORT_SYMBOL_GPL vmlinux 0xbb3507a9	xenbus_frontend_closed
+EXPORT_SYMBOL_GPL vmlinux 0xbb39b726	ata_bmdma32_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0xbb3a3268	tracepoint_iter_start
+EXPORT_SYMBOL_GPL vmlinux 0xbb4a1408	klist_init
+EXPORT_SYMBOL_GPL vmlinux 0xbb7ecba1	ata_link_next
+EXPORT_SYMBOL_GPL vmlinux 0xbb802181	kobject_init_and_add
+EXPORT_SYMBOL_GPL vmlinux 0xbba00578	sysdev_show_ulong
+EXPORT_SYMBOL_GPL vmlinux 0xbbb98859	edid_info
+EXPORT_SYMBOL_GPL vmlinux 0xbbcc8be3	spi_register_master
+EXPORT_SYMBOL_GPL vmlinux 0xbbd26fce	xattr_getsecurity
+EXPORT_SYMBOL_GPL vmlinux 0xbc0760a4	relay_reset
+EXPORT_SYMBOL_GPL vmlinux 0xbc46d5fd	usb_match_id
+EXPORT_SYMBOL_GPL vmlinux 0xbc4ac256	dm_rh_region_to_sector
+EXPORT_SYMBOL_GPL vmlinux 0xbc6ba3aa	scsi_eh_ready_devs
+EXPORT_SYMBOL_GPL vmlinux 0xbcac4276	ip6_local_out
+EXPORT_SYMBOL_GPL vmlinux 0xbd09b571	ata_host_register
+EXPORT_SYMBOL_GPL vmlinux 0xbd184340	relay_open
+EXPORT_SYMBOL_GPL vmlinux 0xbd1bc65b	pci_add_dynid
+EXPORT_SYMBOL_GPL vmlinux 0xbd506a46	unregister_hotplug_dock_device
+EXPORT_SYMBOL_GPL vmlinux 0xbdd295f0	trace_vprintk
+EXPORT_SYMBOL_GPL vmlinux 0xbddbe90d	disk_part_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0xbdf996cd	ata_sff_postreset
+EXPORT_SYMBOL_GPL vmlinux 0xbe116723	do_posix_clock_nosettime
+EXPORT_SYMBOL_GPL vmlinux 0xbe1887e4	ata_unpack_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0xbe1ed72b	usb_anchor_urb
+EXPORT_SYMBOL_GPL vmlinux 0xbe608951	smp_ops
+EXPORT_SYMBOL_GPL vmlinux 0xbe7889b1	sata_sff_hardreset
+EXPORT_SYMBOL_GPL vmlinux 0xbe851485	__pneigh_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xbeb4cb93	bus_for_each_drv
+EXPORT_SYMBOL_GPL vmlinux 0xbeda71b4	crypto_alloc_instance
+EXPORT_SYMBOL_GPL vmlinux 0xbef8a262	pcie_port_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0xbf56ad1b	dm_rh_flush
+EXPORT_SYMBOL_GPL vmlinux 0xbf74eb20	probe_kernel_write
+EXPORT_SYMBOL_GPL vmlinux 0xbf8f237a	raw_seq_next
+EXPORT_SYMBOL_GPL vmlinux 0xbfa5f898	tty_perform_flush
+EXPORT_SYMBOL_GPL vmlinux 0xbfbb1aad	ata_do_dev_read_id
+EXPORT_SYMBOL_GPL vmlinux 0xbfbf1d80	ata_sff_pause
+EXPORT_SYMBOL_GPL vmlinux 0xbfd94bb0	bind_virq_to_irqhandler
+EXPORT_SYMBOL_GPL vmlinux 0xbffde8ec	compat_alloc_user_space
+EXPORT_SYMBOL_GPL vmlinux 0xc00f413d	driver_register
+EXPORT_SYMBOL_GPL vmlinux 0xc0a72b6b	inotify_dentry_parent_queue_event
+EXPORT_SYMBOL_GPL vmlinux 0xc126e890	klist_del
+EXPORT_SYMBOL_GPL vmlinux 0xc12f7e0d	trace_profile_buf_nmi
+EXPORT_SYMBOL_GPL vmlinux 0xc136d9da	usb_submit_urb
+EXPORT_SYMBOL_GPL vmlinux 0xc156b663	md_do_sync
+EXPORT_SYMBOL_GPL vmlinux 0xc17515d7	usb_hcds_loaded
+EXPORT_SYMBOL_GPL vmlinux 0xc175f4f5	__module_text_address
+EXPORT_SYMBOL_GPL vmlinux 0xc213f313	ring_buffer_read
+EXPORT_SYMBOL_GPL vmlinux 0xc22a3091	vm_unmap_aliases
+EXPORT_SYMBOL_GPL vmlinux 0xc22d3a34	regulator_get_exclusive
+EXPORT_SYMBOL_GPL vmlinux 0xc238c221	fib_rules_register
+EXPORT_SYMBOL_GPL vmlinux 0xc26351f8	bind_evtchn_to_irq
+EXPORT_SYMBOL_GPL vmlinux 0xc3014865	security_inode_create
+EXPORT_SYMBOL_GPL vmlinux 0xc3301f02	rcu_expedited_torture_stats
+EXPORT_SYMBOL_GPL vmlinux 0xc34efe27	snmp_fold_field
+EXPORT_SYMBOL_GPL vmlinux 0xc399468f	scsi_nl_remove_driver
+EXPORT_SYMBOL_GPL vmlinux 0xc3e97864	debugfs_create_size_t
+EXPORT_SYMBOL_GPL vmlinux 0xc4034caa	enable_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0xc40f2959	usb_sg_cancel
+EXPORT_SYMBOL_GPL vmlinux 0xc4118e57	__pm_runtime_disable
+EXPORT_SYMBOL_GPL vmlinux 0xc428068d	sata_deb_timing_long
+EXPORT_SYMBOL_GPL vmlinux 0xc42f2f94	xenbus_read_driver_state
+EXPORT_SYMBOL_GPL vmlinux 0xc437e684	debugfs_create_u32
+EXPORT_SYMBOL_GPL vmlinux 0xc46a79e2	cpufreq_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0xc48b7ccf	ata_mode_string
+EXPORT_SYMBOL_GPL vmlinux 0xc4b33aa6	tracepoint_probe_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xc4ce6189	idle_notifier_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xc50393df	regulator_get_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0xc512626a	__supported_pte_mask
+EXPORT_SYMBOL_GPL vmlinux 0xc52ac5c4	mnt_drop_write
+EXPORT_SYMBOL_GPL vmlinux 0xc5397da6	xenbus_mkdir
+EXPORT_SYMBOL_GPL vmlinux 0xc544c01f	ring_buffer_write
+EXPORT_SYMBOL_GPL vmlinux 0xc561fff8	fuse_direct_io
+EXPORT_SYMBOL_GPL vmlinux 0xc58eb212	set_cpus_allowed_ptr
+EXPORT_SYMBOL_GPL vmlinux 0xc60f75ec	__ftrace_vprintk
+EXPORT_SYMBOL_GPL vmlinux 0xc6252011	driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xc6724081	kobject_rename
+EXPORT_SYMBOL_GPL vmlinux 0xc673e23e	ata_scsi_change_queue_depth
+EXPORT_SYMBOL_GPL vmlinux 0xc687220f	pci_find_ht_capability
+EXPORT_SYMBOL_GPL vmlinux 0xc6d9dd4e	vma_kernel_pagesize
+EXPORT_SYMBOL_GPL vmlinux 0xc6e2b37a	mmu_notifier_register
+EXPORT_SYMBOL_GPL vmlinux 0xc78984e3	attribute_container_register
+EXPORT_SYMBOL_GPL vmlinux 0xc7aedf1a	scsi_target_unblock
+EXPORT_SYMBOL_GPL vmlinux 0xc7bff67e	shash_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0xc7ec11f6	atomic_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xc7ed43f9	hvc_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xc8254262	blk_end_request_err
+EXPORT_SYMBOL_GPL vmlinux 0xc87c1f84	ktime_get
+EXPORT_SYMBOL_GPL vmlinux 0xc87e487a	sched_clock_idle_sleep_event
+EXPORT_SYMBOL_GPL vmlinux 0xc94c1a4d	register_ftrace_event
+EXPORT_SYMBOL_GPL vmlinux 0xc9561772	fb_destroy_modelist
+EXPORT_SYMBOL_GPL vmlinux 0xc9c210e8	inet_diag_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xc9d4b23f	kernel_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xc9d4d6d1	wmi_has_guid
+EXPORT_SYMBOL_GPL vmlinux 0xc9ec4e21	free_percpu
+EXPORT_SYMBOL_GPL vmlinux 0xca01f51c	tcp_orphan_count
+EXPORT_SYMBOL_GPL vmlinux 0xca0701e4	devres_remove_group
+EXPORT_SYMBOL_GPL vmlinux 0xca295f03	led_trigger_event
+EXPORT_SYMBOL_GPL vmlinux 0xca81ea9a	xenbus_transaction_end
+EXPORT_SYMBOL_GPL vmlinux 0xca85d8cf	tracepoint_probe_update_all
+EXPORT_SYMBOL_GPL vmlinux 0xca8db48d	find_get_pid
+EXPORT_SYMBOL_GPL vmlinux 0xcaae1e7d	sata_link_hardreset
+EXPORT_SYMBOL_GPL vmlinux 0xcab3abea	pciserial_init_ports
+EXPORT_SYMBOL_GPL vmlinux 0xcabe04de	cpuidle_resume_and_unlock
+EXPORT_SYMBOL_GPL vmlinux 0xcacdc03b	remove_irq
+EXPORT_SYMBOL_GPL vmlinux 0xcb3079d1	dm_put
+EXPORT_SYMBOL_GPL vmlinux 0xcbf202df	driver_for_each_device
+EXPORT_SYMBOL_GPL vmlinux 0xcc15647b	xenbus_unmap_ring
+EXPORT_SYMBOL_GPL vmlinux 0xcc1f1c3d	inet_twdr_hangman
+EXPORT_SYMBOL_GPL vmlinux 0xcc6ab305	is_dock_device
+EXPORT_SYMBOL_GPL vmlinux 0xccb3fc48	tracepoint_iter_reset
+EXPORT_SYMBOL_GPL vmlinux 0xcccfb2fa	sata_deb_timing_hotplug
+EXPORT_SYMBOL_GPL vmlinux 0xcd1ca2cb	iommu_domain_has_cap
+EXPORT_SYMBOL_GPL vmlinux 0xcda7eb6b	swiotlb_map_page
+EXPORT_SYMBOL_GPL vmlinux 0xcdb8547e	ring_buffer_iter_reset
+EXPORT_SYMBOL_GPL vmlinux 0xcdca3691	nr_irqs
+EXPORT_SYMBOL_GPL vmlinux 0xcdce59a5	ata_port_probe
+EXPORT_SYMBOL_GPL vmlinux 0xcdd79cab	bus_for_each_dev
+EXPORT_SYMBOL_GPL vmlinux 0xce34fd32	devm_kzalloc
+EXPORT_SYMBOL_GPL vmlinux 0xce4cb094	sdio_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0xce61006c	register_net_sysctl_table
+EXPORT_SYMBOL_GPL vmlinux 0xceae11e0	inet_csk_compat_getsockopt
+EXPORT_SYMBOL_GPL vmlinux 0xceb24a2a	get_cpu_sysdev
+EXPORT_SYMBOL_GPL vmlinux 0xcf2fd976	tracepoint_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0xcf563700	usb_get_hcd
+EXPORT_SYMBOL_GPL vmlinux 0xcf7a962e	cn_add_callback
+EXPORT_SYMBOL_GPL vmlinux 0xcf8af983	trace_profile_buf
+EXPORT_SYMBOL_GPL vmlinux 0xcf909837	generic_drop_inode
+EXPORT_SYMBOL_GPL vmlinux 0xcfbfa60e	rtc_update_irq_enable
+EXPORT_SYMBOL_GPL vmlinux 0xcfc68341	synchronize_rcu_bh
+EXPORT_SYMBOL_GPL vmlinux 0xcfcc83ad	register_vt_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xcfdc749f	tty_wakeup
+EXPORT_SYMBOL_GPL vmlinux 0xd0352d12	inet_csk_listen_start
+EXPORT_SYMBOL_GPL vmlinux 0xd03c7700	secure_ipv4_port_ephemeral
+EXPORT_SYMBOL_GPL vmlinux 0xd03fdcc0	hrtimer_start
+EXPORT_SYMBOL_GPL vmlinux 0xd054873c	crypto_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0xd0552737	debugfs_create_blob
+EXPORT_SYMBOL_GPL vmlinux 0xd0c05159	emergency_restart
+EXPORT_SYMBOL_GPL vmlinux 0xd0d61a40	dev_attr_em_message_type
+EXPORT_SYMBOL_GPL vmlinux 0xd0f85d32	mm_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xd0fc1e13	ring_buffer_swap_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xd12d0023	mce_chrdev_ops
+EXPORT_SYMBOL_GPL vmlinux 0xd134fd42	get_driver
+EXPORT_SYMBOL_GPL vmlinux 0xd16712f3	crypto_check_attr_type
+EXPORT_SYMBOL_GPL vmlinux 0xd179f2fd	tty_ldisc_deref
+EXPORT_SYMBOL_GPL vmlinux 0xd18b7de0	ahash_attr_alg
+EXPORT_SYMBOL_GPL vmlinux 0xd1ba1939	acpi_pci_find_root
+EXPORT_SYMBOL_GPL vmlinux 0xd1bd2102	xfrm_audit_state_notfound
+EXPORT_SYMBOL_GPL vmlinux 0xd1cee293	dma_get_required_mask
+EXPORT_SYMBOL_GPL vmlinux 0xd1e33201	md_allow_write
+EXPORT_SYMBOL_GPL vmlinux 0xd205041e	ata_sas_port_stop
+EXPORT_SYMBOL_GPL vmlinux 0xd2116708	crypto_givcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0xd273b1b1	__round_jiffies_up_relative
+EXPORT_SYMBOL_GPL vmlinux 0xd284a7be	ring_buffer_lock_reserve
+EXPORT_SYMBOL_GPL vmlinux 0xd2a8caf0	work_on_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xd2fc29a7	usb_alloc_urb
+EXPORT_SYMBOL_GPL vmlinux 0xd315b003	scsi_target_block
+EXPORT_SYMBOL_GPL vmlinux 0xd3471369	acpi_smbus_write
+EXPORT_SYMBOL_GPL vmlinux 0xd348165a	ata_scsi_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xd3f3263e	ata_dev_disable
+EXPORT_SYMBOL_GPL vmlinux 0xd41993a4	ata_sff_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0xd44997e3	fb_bl_default_curve
+EXPORT_SYMBOL_GPL vmlinux 0xd46f3e8d	crypto_unregister_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0xd4f7b079	scsi_nl_add_transport
+EXPORT_SYMBOL_GPL vmlinux 0xd521967e	skb_cow_data
+EXPORT_SYMBOL_GPL vmlinux 0xd5460733	ring_buffer_free_read_page
+EXPORT_SYMBOL_GPL vmlinux 0xd56e4afa	usb_get_urb
+EXPORT_SYMBOL_GPL vmlinux 0xd59351de	platform_device_put
+EXPORT_SYMBOL_GPL vmlinux 0xd5c8ad5f	class_compat_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xd5f1f3b6	sdio_f0_readb
+EXPORT_SYMBOL_GPL vmlinux 0xd5f621f8	rtnl_put_cacheinfo
+EXPORT_SYMBOL_GPL vmlinux 0xd5ff0c51	crypto_register_template
+EXPORT_SYMBOL_GPL vmlinux 0xd624ba84	ring_buffer_read_finish
+EXPORT_SYMBOL_GPL vmlinux 0xd62b6993	init_user_ns
+EXPORT_SYMBOL_GPL vmlinux 0xd69cf070	__mmu_notifier_register
+EXPORT_SYMBOL_GPL vmlinux 0xd69d988e	ata_pci_bmdma_clear_simplex
+EXPORT_SYMBOL_GPL vmlinux 0xd6b103e9	crypto_register_shash
+EXPORT_SYMBOL_GPL vmlinux 0xd6c69b0c	xfrm_audit_state_icvfail
+EXPORT_SYMBOL_GPL vmlinux 0xd6cb0582	synchronize_srcu
+EXPORT_SYMBOL_GPL vmlinux 0xd6cbb428	sdio_f0_writeb
+EXPORT_SYMBOL_GPL vmlinux 0xd6dcdd7a	skb_gro_receive
+EXPORT_SYMBOL_GPL vmlinux 0xd6fc18c3	inotify_find_watch
+EXPORT_SYMBOL_GPL vmlinux 0xd6feefa5	agp_num_entries
+EXPORT_SYMBOL_GPL vmlinux 0xd7020cf1	uart_set_options
+EXPORT_SYMBOL_GPL vmlinux 0xd705b4c7	schedule_hrtimeout
+EXPORT_SYMBOL_GPL vmlinux 0xd727628a	ata_sff_prereset
+EXPORT_SYMBOL_GPL vmlinux 0xd73ef534	sysdev_resume
+EXPORT_SYMBOL_GPL vmlinux 0xd7432550	da903x_writes
+EXPORT_SYMBOL_GPL vmlinux 0xd768e985	regulator_has_full_constraints
+EXPORT_SYMBOL_GPL vmlinux 0xd7893db1	platform_driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xd7d79132	put_online_cpus
+EXPORT_SYMBOL_GPL vmlinux 0xd8b8c91f	crypto_register_ahash
+EXPORT_SYMBOL_GPL vmlinux 0xd8dd22fd	ata_sff_host_intr
+EXPORT_SYMBOL_GPL vmlinux 0xd9042fa8	scatterwalk_map
+EXPORT_SYMBOL_GPL vmlinux 0xd92fbcd4	led_trigger_set
+EXPORT_SYMBOL_GPL vmlinux 0xd9385c8f	crypto_ablkcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0xd94d5e13	crypto_alg_mod_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xd9a6ebe0	i2c_unregister_device
+EXPORT_SYMBOL_GPL vmlinux 0xd9d5bead	usb_driver_set_configuration
+EXPORT_SYMBOL_GPL vmlinux 0xd9f825ec	tcp_reno_ssthresh
+EXPORT_SYMBOL_GPL vmlinux 0xda1be8e1	async_synchronize_cookie_domain
+EXPORT_SYMBOL_GPL vmlinux 0xda2068ee	ata_do_eh
+EXPORT_SYMBOL_GPL vmlinux 0xda29f8b0	wmi_set_block
+EXPORT_SYMBOL_GPL vmlinux 0xda39a88d	ata_common_sdev_attrs
+EXPORT_SYMBOL_GPL vmlinux 0xda3bdd9c	sysdev_store_int
+EXPORT_SYMBOL_GPL vmlinux 0xda546148	ata_sff_port_start
+EXPORT_SYMBOL_GPL vmlinux 0xda565ad2	da903x_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xdac774c9	__xenbus_register_frontend
+EXPORT_SYMBOL_GPL vmlinux 0xdaf4dfb3	fb_mode_option
+EXPORT_SYMBOL_GPL vmlinux 0xdb14a4c2	tty_get_pgrp
+EXPORT_SYMBOL_GPL vmlinux 0xdb274e52	monotonic_to_bootbased
+EXPORT_SYMBOL_GPL vmlinux 0xdb77aac1	__mnt_is_readonly
+EXPORT_SYMBOL_GPL vmlinux 0xdb8405a2	nf_register_afinfo
+EXPORT_SYMBOL_GPL vmlinux 0xdba64f1c	eventfd_ctx_get
+EXPORT_SYMBOL_GPL vmlinux 0xdbd848ed	spi_get_device_id
+EXPORT_SYMBOL_GPL vmlinux 0xdbe41538	pci_test_config_bits
+EXPORT_SYMBOL_GPL vmlinux 0xdbf2ee5f	gpio_export_link
+EXPORT_SYMBOL_GPL vmlinux 0xdbf3c557	acpi_ec_remove_query_handler
+EXPORT_SYMBOL_GPL vmlinux 0xdc1f8f2e	register_timer_hook
+EXPORT_SYMBOL_GPL vmlinux 0xdc393143	regulator_count_voltages
+EXPORT_SYMBOL_GPL vmlinux 0xdc3bd177	skb_partial_csum_set
+EXPORT_SYMBOL_GPL vmlinux 0xdc47bd0b	fs_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xdc77be9e	hvc_poll
+EXPORT_SYMBOL_GPL vmlinux 0xdcd30e0f	device_attach
+EXPORT_SYMBOL_GPL vmlinux 0xddb346f4	inet6_csk_bind_conflict
+EXPORT_SYMBOL_GPL vmlinux 0xddfac67a	crypto_unregister_alg
+EXPORT_SYMBOL_GPL vmlinux 0xde417b81	async_schedule_domain
+EXPORT_SYMBOL_GPL vmlinux 0xde846cf4	pci_hp_change_slot_info
+EXPORT_SYMBOL_GPL vmlinux 0xdeccd66a	ring_buffer_record_enable_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xdee00ca0	usb_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0xdf1bdb7a	usb_sg_wait
+EXPORT_SYMBOL_GPL vmlinux 0xdf2809f7	crypto_ahash_finup
+EXPORT_SYMBOL_GPL vmlinux 0xdf445388	map_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0xdf4c6435	kallsyms_on_each_symbol
+EXPORT_SYMBOL_GPL vmlinux 0xdfca5641	ata_std_postreset
+EXPORT_SYMBOL_GPL vmlinux 0xdfd6ce8b	__scsi_get_command
+EXPORT_SYMBOL_GPL vmlinux 0xdfd72a48	rtc_class_open
+EXPORT_SYMBOL_GPL vmlinux 0xdff565fb	xfrm_audit_state_replay_overflow
+EXPORT_SYMBOL_GPL vmlinux 0xe045c5d6	ring_buffer_free
+EXPORT_SYMBOL_GPL vmlinux 0xe061c5ab	usb_buffer_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xe089cfcc	agp_memory_reserved
+EXPORT_SYMBOL_GPL vmlinux 0xe0ae754c	crypto_mod_put
+EXPORT_SYMBOL_GPL vmlinux 0xe0bdf160	dm_get_rq_mapinfo
+EXPORT_SYMBOL_GPL vmlinux 0xe0c77bb5	mce_notify_irq
+EXPORT_SYMBOL_GPL vmlinux 0xe0cca33e	xfrm_aead_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0xe1854364	pci_sriov_migration
+EXPORT_SYMBOL_GPL vmlinux 0xe1c2b9f2	ata_host_detach
+EXPORT_SYMBOL_GPL vmlinux 0xe1e0ca57	ata_timing_compute
+EXPORT_SYMBOL_GPL vmlinux 0xe218a679	raw_seq_open
+EXPORT_SYMBOL_GPL vmlinux 0xe247343b	hrtimer_get_remaining
+EXPORT_SYMBOL_GPL vmlinux 0xe2870474	register_net_sysctl_rotable
+EXPORT_SYMBOL_GPL vmlinux 0xe295c0ff	is_hpet_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xe2cbeeba	user_describe
+EXPORT_SYMBOL_GPL vmlinux 0xe2ef9767	class_dev_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0xe350ee6d	ring_buffer_record_enable
+EXPORT_SYMBOL_GPL vmlinux 0xe3aa4891	get_net_ns_by_pid
+EXPORT_SYMBOL_GPL vmlinux 0xe3f1bfa5	ata_sg_init
+EXPORT_SYMBOL_GPL vmlinux 0xe404e4a0	usb_string
+EXPORT_SYMBOL_GPL vmlinux 0xe42ad5be	alloc_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0xe441d07c	dm_rh_delay
+EXPORT_SYMBOL_GPL vmlinux 0xe4428977	register_kprobes
+EXPORT_SYMBOL_GPL vmlinux 0xe47b92db	regulator_get_current_limit
+EXPORT_SYMBOL_GPL vmlinux 0xe49a9344	usb_hc_died
+EXPORT_SYMBOL_GPL vmlinux 0xe49cb4b1	platform_device_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xe49ff3b0	ata_wait_register
+EXPORT_SYMBOL_GPL vmlinux 0xe4b15954	dm_set_device_limits
+EXPORT_SYMBOL_GPL vmlinux 0xe4c858c2	spi_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0xe4d2d0ab	i2c_new_dummy
+EXPORT_SYMBOL_GPL vmlinux 0xe4d6144d	regulator_get_init_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0xe50782a7	srcu_read_unlock
+EXPORT_SYMBOL_GPL vmlinux 0xe513afc0	cache_k8_northbridges
+EXPORT_SYMBOL_GPL vmlinux 0xe530071c	pm_qos_remove_requirement
+EXPORT_SYMBOL_GPL vmlinux 0xe58b9ac0	md_new_event
+EXPORT_SYMBOL_GPL vmlinux 0xe5a68061	dm_rh_dirty_log
+EXPORT_SYMBOL_GPL vmlinux 0xe5aff0d8	register_kretprobes
+EXPORT_SYMBOL_GPL vmlinux 0xe5d9e225	fuse_get_req
+EXPORT_SYMBOL_GPL vmlinux 0xe5e51709	usb_hcd_platform_shutdown
+EXPORT_SYMBOL_GPL vmlinux 0xe61a6d2f	gpio_unexport
+EXPORT_SYMBOL_GPL vmlinux 0xe623483e	securityfs_remove
+EXPORT_SYMBOL_GPL vmlinux 0xe62c2187	dm_rh_dec
+EXPORT_SYMBOL_GPL vmlinux 0xe630203b	device_schedule_callback_owner
+EXPORT_SYMBOL_GPL vmlinux 0xe6488b47	cpufreq_notify_transition
+EXPORT_SYMBOL_GPL vmlinux 0xe651f76e	selinux_is_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xe67427eb	sata_scr_write
+EXPORT_SYMBOL_GPL vmlinux 0xe6e8f340	device_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xe7125fe3	tty_mode_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xe744fe8c	inet_twsk_put
+EXPORT_SYMBOL_GPL vmlinux 0xe75b89c3	sdio_writel
+EXPORT_SYMBOL_GPL vmlinux 0xe7a29673	led_trigger_unregister_simple
+EXPORT_SYMBOL_GPL vmlinux 0xe7ffe877	pcpu_base_addr
+EXPORT_SYMBOL_GPL vmlinux 0xe8330866	crypto_larval_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xe862c4b7	dpm_suspend_start
+EXPORT_SYMBOL_GPL vmlinux 0xe8b0a27c	tty_ldisc_flush
+EXPORT_SYMBOL_GPL vmlinux 0xe8ce2630	usb_mon_register
+EXPORT_SYMBOL_GPL vmlinux 0xe8e28dea	ata_host_start
+EXPORT_SYMBOL_GPL vmlinux 0xe901175f	__dev_addr_unsync
+EXPORT_SYMBOL_GPL vmlinux 0xe93e49c3	devres_free
+EXPORT_SYMBOL_GPL vmlinux 0xe9587909	usb_unregister_notify
+EXPORT_SYMBOL_GPL vmlinux 0xe9d38dbb	ata_dummy_port_info
+EXPORT_SYMBOL_GPL vmlinux 0xe9de78ce	debugfs_create_u8
+EXPORT_SYMBOL_GPL vmlinux 0xe9e0b191	cpufreq_driver_target
+EXPORT_SYMBOL_GPL vmlinux 0xea065e01	task_handoff_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xea124bd1	gcd
+EXPORT_SYMBOL_GPL vmlinux 0xea418e0f	atapi_cmd_type
+EXPORT_SYMBOL_GPL vmlinux 0xea93796a	usb_unanchor_urb
+EXPORT_SYMBOL_GPL vmlinux 0xead40003	shash_ahash_digest
+EXPORT_SYMBOL_GPL vmlinux 0xeae01e45	attribute_container_find_class_device
+EXPORT_SYMBOL_GPL vmlinux 0xeae74760	scsi_nl_send_transport_msg
+EXPORT_SYMBOL_GPL vmlinux 0xeb4c1fc8	__tracepoint_block_remap
+EXPORT_SYMBOL_GPL vmlinux 0xeb4c70bb	disk_part_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0xeb72461c	usb_autopm_set_interface
+EXPORT_SYMBOL_GPL vmlinux 0xec1a75a9	__dev_addr_sync
+EXPORT_SYMBOL_GPL vmlinux 0xec1b043e	regulator_suspend_prepare
+EXPORT_SYMBOL_GPL vmlinux 0xec2f60c0	eventfd_fget
+EXPORT_SYMBOL_GPL vmlinux 0xec60c02d	acpi_smbus_register_callback
+EXPORT_SYMBOL_GPL vmlinux 0xec67fd09	ata_bmdma_setup
+EXPORT_SYMBOL_GPL vmlinux 0xeca40cb4	xenbus_free_evtchn
+EXPORT_SYMBOL_GPL vmlinux 0xeca68672	spi_unregister_master
+EXPORT_SYMBOL_GPL vmlinux 0xed2041b9	init_dummy_netdev
+EXPORT_SYMBOL_GPL vmlinux 0xedbc6f67	gnttab_end_foreign_access
+EXPORT_SYMBOL_GPL vmlinux 0xede7f414	tcp_init_congestion_ops
+EXPORT_SYMBOL_GPL vmlinux 0xee1f9f6b	crypto_alloc_ablkcipher
+EXPORT_SYMBOL_GPL vmlinux 0xeeaba75f	ata_link_abort
+EXPORT_SYMBOL_GPL vmlinux 0xef30bfc2	ata_acpi_gtm_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0xef570c48	xenbus_unmap_ring_vfree
+EXPORT_SYMBOL_GPL vmlinux 0xef65883b	platform_device_register
+EXPORT_SYMBOL_GPL vmlinux 0xef6c3f70	round_jiffies_up_relative
+EXPORT_SYMBOL_GPL vmlinux 0xef86a0da	debugfs_create_u64
+EXPORT_SYMBOL_GPL vmlinux 0xef99f7e8	ata_cable_unknown
+EXPORT_SYMBOL_GPL vmlinux 0xefae9cbc	platform_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xefb7c31f	transport_destroy_device
+EXPORT_SYMBOL_GPL vmlinux 0xefdd5a63	ktime_get_ts
+EXPORT_SYMBOL_GPL vmlinux 0xf010680e	bus_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xf0469f04	device_reprobe
+EXPORT_SYMBOL_GPL vmlinux 0xf0696401	acpi_pci_detect_ejectable
+EXPORT_SYMBOL_GPL vmlinux 0xf070010f	__hvc_resize
+EXPORT_SYMBOL_GPL vmlinux 0xf0880a91	crypto_shash_update
+EXPORT_SYMBOL_GPL vmlinux 0xf0b45e46	use_module
+EXPORT_SYMBOL_GPL vmlinux 0xf10e1793	ata_qc_complete
+EXPORT_SYMBOL_GPL vmlinux 0xf11e8c14	raw_unhash_sk
+EXPORT_SYMBOL_GPL vmlinux 0xf184d189	kernel_power_off
+EXPORT_SYMBOL_GPL vmlinux 0xf19fa611	scsi_schedule_eh
+EXPORT_SYMBOL_GPL vmlinux 0xf279725f	free_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0xf2bc822e	bus_find_device_by_name
+EXPORT_SYMBOL_GPL vmlinux 0xf2c0535f	crypto_register_alg
+EXPORT_SYMBOL_GPL vmlinux 0xf2e129d5	ring_buffer_consume
+EXPORT_SYMBOL_GPL vmlinux 0xf2fca922	uart_parse_options
+EXPORT_SYMBOL_GPL vmlinux 0xf31f6128	spi_alloc_master
+EXPORT_SYMBOL_GPL vmlinux 0xf33ebce6	__set_irq_handler
+EXPORT_SYMBOL_GPL vmlinux 0xf34806ec	hrtimer_get_res
+EXPORT_SYMBOL_GPL vmlinux 0xf39cae32	crypto_attr_alg2
+EXPORT_SYMBOL_GPL vmlinux 0xf3c1c0a0	leds_list_lock
+EXPORT_SYMBOL_GPL vmlinux 0xf44c39f7	platform_device_add_resources
+EXPORT_SYMBOL_GPL vmlinux 0xf45424e5	netlink_has_listeners
+EXPORT_SYMBOL_GPL vmlinux 0xf499fdb2	rcu_barrier_bh
+EXPORT_SYMBOL_GPL vmlinux 0xf4a8385f	iommu_domain_free
+EXPORT_SYMBOL_GPL vmlinux 0xf4ea62d9	tcp_register_congestion_control
+EXPORT_SYMBOL_GPL vmlinux 0xf5072d4e	page_cache_sync_readahead
+EXPORT_SYMBOL_GPL vmlinux 0xf52c643c	rtnl_link_register
+EXPORT_SYMBOL_GPL vmlinux 0xf5384ac1	__trace_printk
+EXPORT_SYMBOL_GPL vmlinux 0xf53adbd2	ata_sff_lost_interrupt
+EXPORT_SYMBOL_GPL vmlinux 0xf540b5aa	devres_remove
+EXPORT_SYMBOL_GPL vmlinux 0xf54bd49b	lcm
+EXPORT_SYMBOL_GPL vmlinux 0xf553318d	cpuidle_pause_and_lock
+EXPORT_SYMBOL_GPL vmlinux 0xf5799f7a	stop_machine_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xf582bc80	blkcipher_walk_virt_block
+EXPORT_SYMBOL_GPL vmlinux 0xf589b391	inet_twdr_twkill_work
+EXPORT_SYMBOL_GPL vmlinux 0xf58c2701	swiotlb_unmap_page
+EXPORT_SYMBOL_GPL vmlinux 0xf5945bac	gnttab_free_grant_references
+EXPORT_SYMBOL_GPL vmlinux 0xf597d394	dev_attr_em_message
+EXPORT_SYMBOL_GPL vmlinux 0xf5a691cd	invalidate_bh_lrus
+EXPORT_SYMBOL_GPL vmlinux 0xf5c01ddf	driver_find_device
+EXPORT_SYMBOL_GPL vmlinux 0xf5f31b1c	dequeue_signal
+EXPORT_SYMBOL_GPL vmlinux 0xf61e43bf	class_compat_remove_link
+EXPORT_SYMBOL_GPL vmlinux 0xf68182f1	ip6_dst_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xf6bcbd73	hwrng_register
+EXPORT_SYMBOL_GPL vmlinux 0xf6c5f396	class_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xf6e874f5	ata_timing_merge
+EXPORT_SYMBOL_GPL vmlinux 0xf7016530	xenbus_gather
+EXPORT_SYMBOL_GPL vmlinux 0xf7937d56	srcu_batches_completed
+EXPORT_SYMBOL_GPL vmlinux 0xf79bc8ec	__root_device_register
+EXPORT_SYMBOL_GPL vmlinux 0xf7a8a150	tcp_cong_avoid_ai
+EXPORT_SYMBOL_GPL vmlinux 0xf84c4cf0	blk_queue_dma_drain
+EXPORT_SYMBOL_GPL vmlinux 0xf8802492	print_stack_trace
+EXPORT_SYMBOL_GPL vmlinux 0xf885c1a2	usb_get_from_anchor
+EXPORT_SYMBOL_GPL vmlinux 0xf8dc68b3	preempt_notifier_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xf8e8262a	scsi_dh_set_params
+EXPORT_SYMBOL_GPL vmlinux 0xf8f3a0fb	ata_ratelimit
+EXPORT_SYMBOL_GPL vmlinux 0xf920ccf8	mmu_notifier_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xf94793ce	inotify_rm_watch
+EXPORT_SYMBOL_GPL vmlinux 0xf9765833	dmi_match
+EXPORT_SYMBOL_GPL vmlinux 0xf97666a0	set_memory_rw
+EXPORT_SYMBOL_GPL vmlinux 0xf9a054b5	__round_jiffies
+EXPORT_SYMBOL_GPL vmlinux 0xf9ca3160	ata_id_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0xfa0c1c84	device_create_vargs
+EXPORT_SYMBOL_GPL vmlinux 0xfa1c0f47	inet6_csk_addr2sockaddr
+EXPORT_SYMBOL_GPL vmlinux 0xfa1f4662	scatterwalk_start
+EXPORT_SYMBOL_GPL vmlinux 0xfa801799	locks_release_private
+EXPORT_SYMBOL_GPL vmlinux 0xfb388461	debugfs_create_dir
+EXPORT_SYMBOL_GPL vmlinux 0xfb882fb7	wmi_query_block
+EXPORT_SYMBOL_GPL vmlinux 0xfbf9be5d	register_oom_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xfbfbad3e	inotify_inode_is_dead
+EXPORT_SYMBOL_GPL vmlinux 0xfbfd393d	blk_rq_check_limits
+EXPORT_SYMBOL_GPL vmlinux 0xfc1d45a5	usb_buffer_free
+EXPORT_SYMBOL_GPL vmlinux 0xfc2b6a9f	spi_add_device
+EXPORT_SYMBOL_GPL vmlinux 0xfcaa9a80	ring_buffer_entries
+EXPORT_SYMBOL_GPL vmlinux 0xfcb0fd8a	user_match
+EXPORT_SYMBOL_GPL vmlinux 0xfccd0a07	tcp_reno_min_cwnd
+EXPORT_SYMBOL_GPL vmlinux 0xfcef4631	clockevent_delta2ns
+EXPORT_SYMBOL_GPL vmlinux 0xfd51b281	gnttab_end_foreign_access_ref
+EXPORT_SYMBOL_GPL vmlinux 0xfd55c1d4	ata_sff_data_xfer32
+EXPORT_SYMBOL_GPL vmlinux 0xfdd59511	fuse_conn_put
+EXPORT_SYMBOL_GPL vmlinux 0xfde0b92c	crypto_larval_error
+EXPORT_SYMBOL_GPL vmlinux 0xfe37e54a	crypto_aead_setauthsize
+EXPORT_SYMBOL_GPL vmlinux 0xfe40986d	tty_prepare_flip_string_flags
+EXPORT_SYMBOL_GPL vmlinux 0xfe727411	get_phys_to_machine
+EXPORT_SYMBOL_GPL vmlinux 0xfe93e366	kobject_uevent
+EXPORT_SYMBOL_GPL vmlinux 0xfe990052	gpio_free
+EXPORT_SYMBOL_GPL vmlinux 0xfed11ed1	usb_mon_deregister
+EXPORT_SYMBOL_GPL vmlinux 0xfedb5327	devres_find
+EXPORT_SYMBOL_GPL vmlinux 0xfeef9f6f	bus_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xfefa2adb	input_ff_effect_from_user
+EXPORT_SYMBOL_GPL vmlinux 0xff03c03d	k_handler
+EXPORT_SYMBOL_GPL vmlinux 0xff48c4ac	fsstack_copy_inode_size
+EXPORT_SYMBOL_GPL vmlinux 0xff5a8cfe	cn_del_callback
+EXPORT_SYMBOL_GPL vmlinux 0xff6229d5	agp_remove_bridge
+EXPORT_SYMBOL_GPL vmlinux 0xff99221b	inet_csk_compat_setsockopt
+EXPORT_SYMBOL_GPL vmlinux 0xffa2a482	crypto_unregister_shash
+EXPORT_SYMBOL_GPL vmlinux 0xffe4a7ca	ring_buffer_discard_commit
+EXPORT_SYMBOL_GPL vmlinux 0xfff9036b	ring_buffer_empty_cpu
+EXPORT_UNUSED_SYMBOL vmlinux 0x00000000	simple_prepare_write
--- linux-mvl-dove-2.6.32.orig/debian.master/abi/2.6.32-34.73/amd64/preempt.modules
+++ linux-mvl-dove-2.6.32/debian.master/abi/2.6.32-34.73/amd64/preempt.modules
@@ -0,0 +1,2605 @@
+3c359
+3c574_cs
+3c589_cs
+3c59x
+3w-9xxx
+3w-xxxx
+6pack
+8021q
+8139cp
+8139too
+8255
+8390
+9p
+9pnet
+9pnet_rdma
+9pnet_virtio
+a100u2w
+a3d
+aacraid
+ab3100
+ab3100-core
+ab3100-otp
+abituguru
+abituguru3
+abyss
+ac97_bus
+acecad
+acenic
+acerhdf
+acer-wmi
+acl7225b
+acpi_pad
+acpiphp
+acpiphp_ibm
+acquirewdt
+act200l-sir
+act_gact
+act_ipt
+actisys-sir
+act_mirred
+act_nat
+act_pedit
+act_police
+act_simple
+act_skbedit
+ad1848
+ad7414
+ad7418
+ad7877
+ad7879
+adcxx
+addi_apci_035
+addi_apci_1032
+addi_apci_1500
+addi_apci_1516
+addi_apci_1564
+addi_apci_16xx
+addi_apci_2016
+addi_apci_2032
+addi_apci_2200
+addi_apci_3001
+addi_apci_3120
+addi_apci_3501
+addi_apci_3xxx
+adfs
+adi
+adl_pci6208
+adl_pci7296
+adl_pci7432
+adl_pci8164
+adl_pci9111
+adl_pci9118
+adm1021
+adm1025
+adm1026
+adm1029
+adm1031
+adm8211
+adm9240
+adp5588-keys
+adq12b
+ads7828
+ads7846
+adt7462
+adt7470
+adt7473
+adt7475
+adutux
+adv7170
+adv7175
+advansys
+advantechwdt
+adv_pci1710
+adv_pci1723
+adv_pci_dio
+aedsp16
+aes_generic
+aesni-intel
+aes-x86_64
+af_802154
+af9013
+affs
+af_key
+af-rxrpc
+ah4
+ah6
+ahci
+aic79xx
+aic7xxx
+aic94xx
+aio_aio12_8
+aio_iiro_16
+aiptek
+aircable
+airo
+airo_cs
+alauda
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+alphatrack
+altpciechdma
+ambassador
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+amd76xrom
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+amplc_dio200
+amplc_pc236
+amplc_pc263
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+amplc_pci230
+analog
+ansi_cprng
+anubis
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+appledisplay
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+appletalk
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+applicom
+ar7part
+ar9170usb
+arc4
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+arcmsr
+arcnet
+arc-rawmode
+arc-rimi
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+arkfb
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+asb100
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+asus_atk0110
+asus-laptop
+asus_oled
+async_memcpy
+async_pq
+async_raid6_recov
+async_tx
+async_xor
+at24
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+at76c50x-usb
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+au0828
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+authenc
+auth_rpcgss
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+autofs4
+av5100
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+ax25
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+b1
+b1dma
+b1pci
+b1pcmcia
+b2c2-flexcop
+b2c2-flexcop-pci
+b2c2-flexcop-usb
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+b44
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+belkin_sa
+berry_charge
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+bq27x00_battery
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+broadsheetfb
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+bt819
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+btsdio
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+btuart_cs
+btusb
+budget
+budget-av
+budget-ci
+budget-core
+budget-patch
+BusLogic
+bw-qcam
+c2port-duramar2150
+c4
+c67x00
+c6xdigio
+cachefiles
+cafe_ccic
+cafe_nand
+camellia
+can
+can-bcm
+can-dev
+can-raw
+capi
+capidrv
+capifs
+capmode
+carminefb
+cassini
+cast5
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+catc
+cb710
+cb710-mmc
+cb_das16_cs
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+cb_pcidda
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+cb_pcimdas
+cb_pcimdda
+cciss
+ccm
+cdc-acm
+cdc_eem
+cdc_ether
+cdc-phonet
+cdc_subset
+cdc-wdm
+cfag12864b
+cfag12864bfb
+cfg80211
+cfi_cmdset_0001
+cfi_cmdset_0002
+cfi_cmdset_0020
+cfi_probe
+cfi_util
+ch
+ch341
+ch7006
+chipreg
+cifs
+cirrusfb
+ck804xrom
+clip
+cls_basic
+cls_flow
+cls_fw
+cls_route
+cls_rsvp
+cls_rsvp6
+cls_tcindex
+cls_u32
+cm109
+cm4000_cs
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+cmtp
+cnic
+cobra
+coda
+com20020
+com20020_cs
+com20020-pci
+com90io
+com90xx
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+comedi_bond
+comedi_fc
+comedi_parport
+comedi_test
+comm
+compal-laptop
+configfs
+contec_pci_dio
+core
+coretemp
+cp210x
+cpcihp_generic
+cpcihp_zt5550
+cpia
+cpia2
+cpia_pp
+cpia_usb
+cpqarray
+cpu5wdt
+cpuid
+c-qcam
+cramfs
+cr_bllcd
+crc32c
+crc32c-intel
+crc7
+crc-ccitt
+crc-itu-t
+crvml
+cryptd
+cryptoloop
+crypto_null
+cs5345
+cs53l32a
+ct82c710
+ctr
+cts
+cuse
+cx18
+cx22700
+cx22702
+cx231xx
+cx231xx-alsa
+cx231xx-dvb
+cx2341x
+cx23885
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+cx24116
+cx24123
+cx25821
+cx25821-alsa
+cx25840
+cx8800
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+cx88-blackbird
+cx88-dvb
+cx88-vp3054-i2c
+cx88xx
+cxacru
+cxgb
+cxgb3
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+cyber2000fb
+cyberjack
+cyclades
+cyclomx
+cycx_drv
+cypress_cy7c63
+cypress_m8
+cytherm
+da9030_battery
+da9034-ts
+da903x
+da903x_bl
+dabusb
+DAC960
+daqboard2000
+das08
+das08_cs
+das16
+das16m1
+das1800
+das6402
+das800
+db9
+dc395x
+dca
+dccp
+dccp_diag
+dccp_ipv4
+dccp_ipv6
+dccp_probe
+dcdbas
+de2104x
+de4x5
+de600
+de620
+decnet
+deflate
+defxx
+dell-laptop
+dell-led
+dell_rbu
+dell-wmi
+des_generic
+dib0070
+dib3000mb
+dib3000mc
+dib7000m
+dib7000p
+dib8000
+dibx000_common
+digi_acceleport
+diskonchip
+display
+divacapi
+divadidd
+diva_idi
+diva_mnt
+divas
+dlci
+dlm
+dm1105
+dm9601
+dm-crypt
+dme1737
+dmfe
+dmm32at
+dm-queue-length
+dm-raid45
+dm-service-time
+dmx3191d
+dm-zero
+dnet
+dn_rtmsg
+doc2000
+doc2001
+doc2001plus
+docecc
+docprobe
+dpt_i2o
+drm
+drm_kms_helper
+ds1621
+ds1682
+ds2482
+ds2490
+ds2760_battery
+ds2782_battery
+dsbr100
+dscc4
+dss1_divert
+dst
+dst_ca
+dstr
+dt2801
+dt2811
+dt2814
+dt2815
+dt2817
+dt282x
+dt3000
+dt9812
+dtl1_cs
+dummy
+dummy_hcd
+dv1394
+dvb-bt8xx
+dvb-core
+dvb-pll
+dvb-ttpci
+dvb-ttusb-budget
+dvb-usb
+dvb-usb-a800
+dvb-usb-af9005
+dvb-usb-af9005-remote
+dvb-usb-af9015
+dvb-usb-anysee
+dvb-usb-au6610
+dvb-usb-ce6230
+dvb-usb-cinergyT2
+dvb-usb-cxusb
+dvb-usb-dib0700
+dvb-usb-dibusb-common
+dvb-usb-dibusb-mb
+dvb-usb-dibusb-mc
+dvb-usb-digitv
+dvb-usb-dtt200u
+dvb-usb-dtv5100
+dvb-usb-dw2102
+dvb-usb-friio
+dvb-usb-gl861
+dvb-usb-gp8psk
+dvb-usb-m920x
+dvb-usb-nova-t-usb2
+dvb-usb-opera
+dvb-usb-ttusb2
+dvb-usb-umt-010
+dvb-usb-vp702x
+dvb-usb-vp7045
+e100
+e1000
+e1000e
+e752x_edac
+earth-pt1
+eata
+ebt_802_3
+ebtable_broute
+ebtable_filter
+ebtable_nat
+ebtables
+ebt_among
+ebt_arp
+ebt_arpreply
+ebt_dnat
+ebt_ip
+ebt_ip6
+ebt_limit
+ebt_log
+ebt_mark
+ebt_mark_m
+ebt_nflog
+ebt_pkttype
+ebt_redirect
+ebt_snat
+ebt_stp
+ebt_ulog
+ebt_vlan
+echo
+econet
+edac_core
+edac_mce_amd
+eeepc-laptop
+eeprom
+eeprom_93cx6
+eeti_ts
+efs
+elo
+elsa_cs
+em28xx
+em28xx-alsa
+em28xx-dvb
+em_cmp
+emi26
+emi62
+em_meta
+em_nbyte
+empeg
+ems_pci
+ems_usb
+em_text
+emu10k1-gp
+em_u32
+enclosure
+eni
+enic
+epat
+epca
+epia
+epic100
+eql
+esb2rom
+esi-sir
+esp4
+esp6
+et131x
+et61x251
+eth1394
+ethoc
+eurotechwdt
+evbug
+evtchn
+exofs
+exportfs
+f71805f
+f71882fg
+f75375s
+fakephp
+farsync
+fat
+faulty
+fbcon
+fb_ddc
+fb_sys_fops
+fcoe
+fcrypt
+fdomain
+fdomain_cs
+fealnx
+ff-memless
+firedtv
+firestream
+firewire-core
+firewire-net
+firewire-ohci
+firewire-sbp2
+fit2
+fit3
+fl512
+floppy
+fm801-gp
+fmvj18x_cs
+fnic
+font
+forcedeth
+fore_200e
+fpu
+freevxfs
+friq
+frpw
+fsam7400
+fscache
+fschmd
+ftdi-elan
+ftdi_sio
+ftl
+fujitsu-laptop
+fujitsu_ts
+funsoft
+g450_pll
+g760a
+gadgetfs
+gamecon
+gameport
+garmin_gps
+garp
+g_audio
+g_cdc
+gcm
+gdth
+generic
+generic_bl
+gen_probe
+g_ether
+gf128mul
+gf2k
+g_file_storage
+gfs2
+ghash-clmulni-intel
+ghash-generic
+gigaset
+girbil-sir
+gl518sm
+gl520sm
+gl620a
+gluebi
+g_midi
+gpio-addr-flash
+gpio_keys
+gpio_mouse
+gpio_vbus
+g_printer
+grip
+grip_mp
+gsc_hpdi
+g_serial
+gspca_conex
+gspca_etoms
+gspca_finepix
+gspca_gl860
+gspca_jeilinj
+gspca_m5602
+gspca_main
+gspca_mars
+gspca_mr97310a
+gspca_ov519
+gspca_ov534
+gspca_pac207
+gspca_pac7311
+gspca_sn9c20x
+gspca_sonixb
+gspca_sonixj
+gspca_spca500
+gspca_spca501
+gspca_spca505
+gspca_spca506
+gspca_spca508
+gspca_spca561
+gspca_sq905
+gspca_sq905c
+gspca_stk014
+gspca_stv06xx
+gspca_sunplus
+gspca_t613
+gspca_tv8532
+gspca_vc032x
+gspca_zc3xx
+gtco
+guillemot
+gunze
+gx1fb
+gxfb
+g_zero
+hamachi
+hangcheck-timer
+hci_uart
+hci_vhci
+hdaps
+hdlc
+hdlc_cisco
+hdlcdrv
+hdlc_fr
+hdlc_ppp
+hdlc_raw
+hdlc_raw_eth
+hdlc_x25
+hdpvr
+he
+hecubafb
+hexium_gemini
+hexium_orion
+hfc4s8s_l1
+hfcmulti
+hfcpci
+hfcsusb
+hfc_usb
+hfs
+hfsplus
+hgafb
+hid
+hid-3m-pct
+hid-a4tech
+hid-apple
+hid-belkin
+hid-cherry
+hid-chicony
+hid-cypress
+hid-drff
+hid-ezkey
+hid-gaff
+hid-gyration
+hid-kensington
+hid-kye
+hid-logitech
+hid-microsoft
+hid-monterey
+hid-mosart
+hid-ntrig
+hid-ortek
+hidp
+hid-petalynx
+hid-pl
+hid-quanta
+hid-samsung
+hid-sjoy
+hid-sony
+hid-stantum
+hid-sunplus
+hid-tmff
+hid-topseed
+hid-twinhan
+hid-wacom
+hid-zpff
+hifn_795x
+hisax
+hisax_fcpcipnp
+hisax_isac
+hisax_st5481
+horizon
+hostap
+hostap_cs
+hostap_pci
+hostap_plx
+hp100
+hp4x
+hp_accel
+hpfs
+hpilo
+hptiop
+hp-wmi
+hso
+htc-pasic3
+hv_blkvsc
+hv_netvsc
+hv_storvsc
+hv_vmbus
+hwa-hc
+hwa-rc
+hwmon-vid
+hysdn
+i1480-dfu-usb
+i1480-est
+i1480u-wlp
+i2400m
+i2400m-sdio
+i2400m-usb
+i2c-algo-bit
+i2c-algo-pca
+i2c-algo-pcf
+i2c-ali1535
+i2c-ali1563
+i2c-ali15x3
+i2c-amd756
+i2c-amd756-s4882
+i2c-amd8111
+i2c-dev
+i2c-gpio
+i2c-i801
+i2c-isch
+i2c-matroxfb
+i2c-nforce2
+i2c-nforce2-s4985
+i2c-ocores
+i2c-parport
+i2c-parport-light
+i2c-pca-platform
+i2c-piix4
+i2c-scmi
+i2c-simtec
+i2c-sis5595
+i2c-sis630
+i2c-sis96x
+i2c-stub
+i2c-taos-evm
+i2c-tiny-usb
+i2c-via
+i2c-viapro
+i2c-voodoo3
+i2o_block
+i2o_bus
+i2o_config
+i2o_core
+i2o_proc
+i2o_scsi
+i3000_edac
+i3200_edac
+i5000_edac
+i5100_edac
+i5400_edac
+i5k_amb
+i6300esb
+i7300_idle
+i810
+i82092
+i82975x_edac
+i830
+i8k
+i915
+ib700wdt
+ib_addr
+ib_cm
+ib_core
+ib_ipath
+ib_ipoib
+ib_iser
+ib_mad
+ibmaem
+ibmasm
+ibmasr
+ibmcam
+ibmpex
+ib_mthca
+ibmtr_cs
+ib_sa
+ib_srp
+ib_ucm
+ib_umad
+ib_uverbs
+ichxrom
+icp_multi
+ics932s401
+idmouse
+idt77252
+ieee1394
+ifb
+iforce
+igb
+igbvf
+ii_pci20kc
+ili9320
+imm
+industrialio
+inexio
+inftl
+initio
+input-polldev
+int51x1
+intel-agp
+intel_menlow
+intel-rng
+intel_vr_nor
+interact
+ioatdma
+ioc4
+io_edgeport
+io_ti
+iowarrior
+ip2
+ip6_queue
+ip6table_filter
+ip6table_mangle
+ip6table_raw
+ip6_tables
+ip6table_security
+ip6t_ah
+ip6t_eui64
+ip6t_frag
+ip6t_hbh
+ip6t_ipv6header
+ip6t_LOG
+ip6t_mh
+ip6t_REJECT
+ip6t_rt
+ip6_tunnel
+ipaq
+ipcomp
+ipcomp6
+ipddp
+ipg
+ip_gre
+iphase
+ipip
+ipmi_devintf
+ipmi_msghandler
+ipmi_poweroff
+ipmi_si
+ipmi_watchdog
+ip_queue
+ipr
+ips
+iptable_filter
+iptable_mangle
+iptable_nat
+iptable_raw
+ip_tables
+iptable_security
+ipt_addrtype
+ipt_ah
+ipt_CLUSTERIP
+ipt_ecn
+ipt_ECN
+ipt_LOG
+ipt_MASQUERADE
+ipt_NETMAP
+ipt_REDIRECT
+ipt_REJECT
+ipt_ULOG
+ip_vs
+ip_vs_dh
+ip_vs_ftp
+ip_vs_lblc
+ip_vs_lblcr
+ip_vs_lc
+ip_vs_nq
+ip_vs_rr
+ip_vs_sed
+ip_vs_sh
+ip_vs_wlc
+ip_vs_wrr
+ipw
+ipw2100
+ipw2200
+ipwireless
+ipx
+ircomm
+ir-common
+ircomm-tty
+irda
+irda-usb
+ir-kbd-i2c
+irlan
+irnet
+irtty-sir
+ir-usb
+iscsi_ibft
+iscsi_tcp
+iscsi_trgt
+isdn
+isdn_bsdcomp
+isdnhdlc
+isight_firmware
+isl29003
+isl6405
+isl6421
+isl6423
+isofs
+isp116x-hcd
+isp1362-hcd
+isp1760
+istallion
+it87
+it8712f_wdt
+it87_wdt
+iTCO_vendor_support
+iTCO_wdt
+itd1000
+iuu_phoenix
+ivtv
+ivtvfb
+iw_c2
+iw_cm
+iw_cxgb3
+iwl3945
+iwlagn
+iwlcore
+iwmc3200wifi
+ixgb
+ixgbe
+ixj
+ixj_pcmcia
+jedec_probe
+jffs2
+jfs
+jmb38x_ms
+jme
+joydev
+joydump
+jr3_pci
+jsm
+k8temp
+kafs
+kahlua
+kaweth
+kb3886_bl
+kbic
+kbtab
+kcomedilib
+ke_counter
+kernelcapi
+keyspan
+keyspan_pda
+keyspan_remote
+khazad
+kingsun-sir
+kl5kusb105
+kobil_sct
+konicawc
+ks0108
+ks0127
+ks8842
+ks8851
+ks8851_mll
+ks959-sir
+ksdazzle-sir
+ktti
+kvaser_pci
+kvm
+kvm-amd
+kvm-intel
+kxsd9
+kyrofb
+l1oip
+l2cap
+l440gx
+l64781
+lanai
+lapb
+lapbether
+lcd
+ldusb
+lec
+led-class
+leds-alix2
+leds-bd2802
+leds-da903x
+leds-dac124s085
+leds-gpio
+leds-lp3944
+leds-pca9532
+leds-pca955x
+leds-wm831x-status
+leds-wm8350
+ledtrig-backlight
+ledtrig-default-on
+ledtrig-gpio
+ledtrig-heartbeat
+ledtrig-timer
+legousbtower
+lgdt3305
+lgdt330x
+lgs8gxx
+lib80211
+lib80211_crypt_ccmp
+lib80211_crypt_tkip
+lib80211_crypt_wep
+libcrc32c
+libertas
+libertas_cs
+libertas_sdio
+libertas_spi
+libertas_tf
+libertas_tf_usb
+libfc
+libfcoe
+libipw
+libiscsi
+libiscsi_tcp
+libosd
+libsas
+libsrp
+lightning
+line6usb
+linear
+lirc_atiusb
+lirc_bt829
+lirc_dev
+lirc_ene0100
+lirc_i2c
+lirc_igorplugusb
+lirc_imon
+lirc_it87
+lirc_ite8709
+lirc_mceusb
+lirc_sasem
+lirc_serial
+lirc_sir
+lirc_streamzap
+lirc_ttusbir
+lis3l02dq
+lis3lv02d
+litelink-sir
+lkkbd
+llc2
+lm63
+lm70
+lm75
+lm77
+lm78
+lm80
+lm83
+lm8323
+lm85
+lm87
+lm90
+lm92
+lm93
+lm95241
+lmc
+lms283gf05
+lnbp21
+lockd
+lp
+lp3971
+lpddr_cmds
+lpfc
+lrw
+ltc4215
+ltc4245
+ltv350qv
+lxfb
+lzo
+lzo_compress
+lzo_decompress
+m25p80
+m52790
+ma600-sir
+mac80211
+mac80211_hwsim
+machzwd
+macmodes
+macvlan
+magellan
+map_absent
+map_funcs
+map_ram
+map_rom
+matrix_keypad
+matroxfb_accel
+matroxfb_base
+matroxfb_crtc2
+matroxfb_DAC1064
+matroxfb_g450
+matroxfb_maven
+matroxfb_misc
+matroxfb_Ti3026
+matrox_w1
+max1111
+max1363
+max1586
+max1619
+max17040_battery
+max3100
+max6650
+max6875
+max7301
+max732x
+max7359_keypad
+mb862xxfb
+mbp_nvidia_bl
+mc13783
+mc13783-core
+mc33880
+mc44s803
+mce-inject
+mce-xeon75xx
+mcp2120-sir
+mcp23s08
+mcs5000_ts
+mcs7780
+mcs7830
+mct_u232
+md4
+mdc800
+mdio
+me4000
+me_daq
+megaraid
+megaraid_mbox
+megaraid_mm
+megaraid_sas
+memstick
+metronomefb
+meye
+mfd-core
+mga
+michael_mic
+microcode
+microtek
+mii
+minix
+mISDN_core
+mISDN_dsp
+mISDNinfineon
+mISDNipac
+mISDNisar
+mite
+mk712
+mkiss
+mlx4_core
+mlx4_en
+mlx4_ib
+mmc_block
+mmc_spi
+mos7720
+mos7840
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+mtdoops
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+mtdram
+mtd_readtest
+mtd_speedtest
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+mtd_torturetest
+mtouch
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+mwave
+mwl8k
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+myri10ge
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+navman
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+ndiswrapper
+ne2k-pci
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+net1080
+netconsole
+netjet
+netrom
+netsc520
+nettel
+netwave_cs
+netxen_nic
+newtonkbd
+nf_conntrack
+nf_conntrack_amanda
+nf_conntrack_ftp
+nf_conntrack_h323
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+nf_conntrack_ipv6
+nf_conntrack_irc
+nf_conntrack_netbios_ns
+nf_conntrack_netlink
+nf_conntrack_pptp
+nf_conntrack_proto_dccp
+nf_conntrack_proto_gre
+nf_conntrack_proto_sctp
+nf_conntrack_proto_udplite
+nf_conntrack_sane
+nf_conntrack_sip
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+nf_defrag_ipv4
+nf_nat
+nf_nat_amanda
+nf_nat_ftp
+nf_nat_h323
+nf_nat_irc
+nf_nat_pptp
+nf_nat_proto_dccp
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+nf_nat_snmp_basic
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+nfnetlink
+nfnetlink_log
+nfnetlink_queue
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+nfsd
+nftl
+nf_tproxy_core
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+nilfs2
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+ni_pcidio
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+niu
+nl802154
+nls_ascii
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+ocfs2_nodemanager
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+omnibook
+omninet
+on20
+on26
+onenand
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+opl3
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+oti6858
+output
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+oxu210hp-hcd
+p4-clockmod
+p54common
+p54pci
+p54spi
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+p9auth
+padlock-aes
+padlock-sha
+panasonic-laptop
+panel
+paride
+parkbd
+parport
+parport_ax88796
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+parport_pc
+parport_serial
+pas2
+pata_ali
+pata_amd
+pata_artop
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+pata_atp867x
+pata_cmd640
+pata_cmd64x
+pata_cs5520
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+pata_efar
+pata_hpt366
+pata_hpt37x
+pata_hpt3x2n
+pata_hpt3x3
+pata_it8213
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+pata_mpiix
+pata_netcell
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+pata_ns87415
+pata_oldpiix
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+pata_optidma
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+pata_rz1000
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+pc87427
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+pcd
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+pcf50633-input
+pcf50633-regulator
+pcf857x
+pcf8591
+pci
+pci200syn
+pcilynx
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+pci-stub
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+pcmcia_core
+pcm_common
+pcmda12
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+pcspkr
+pcwd_pci
+pcwd_usb
+pd
+pd6729
+pda_power
+pegasus
+penmount
+pf
+pg
+phantom
+phison
+phonedev
+phonet
+phram
+physmap
+pktgen
+pl2303
+platform_lcd
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+plip
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+pluto2
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+poc
+poch
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+power_meter
+ppa
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+pppox
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+pps_core
+prism2_usb
+prism54
+progear_bl
+psmouse
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+pwc
+qcserial
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+qla1280
+qla2xxx
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+qlge
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+qlogicfas408
+qnx4
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+quickcam_messenger
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+r8192se_pci
+r8192s_usb
+r8a66597-hcd
+radeon
+radeonfb
+radio-gemtek-pci
+radio-i2c-si470x
+radio-maestro
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+radio-mr800
+radio-si4713
+radio-tea5764
+radio-usb-si470x
+raid0
+raid1
+raid10
+raid456
+raid6_pq
+raid6test
+raid_class
+ramzswap
+rar_driver
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+ray_cs
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+rds
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+rds_tcp
+redboot
+reed_solomon
+reiserfs
+rfc1051
+rfc1201
+rfcomm
+rfd_ftl
+ricoh_mmc
+rio500
+riscom8
+rivafb
+rmd128
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+rndis_host
+rndis_wlan
+rocket
+romfs
+rose
+rotary_encoder
+rpcsec_gss_krb5
+rpcsec_gss_spkm3
+rrunner
+rsrc_nonstatic
+rt2400pci
+rt2500pci
+rt2500usb
+rt2800usb
+rt2860sta
+rt2870sta
+rt2x00lib
+rt2x00pci
+rt2x00usb
+rt3090sta
+rt61pci
+rt73usb
+rtc-ab3100
+rtc-bq4802
+rtc-ds1286
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+rtc-ds1511
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+rtc-pcf2123
+rtc-pcf50633
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+rtc-pcf8583
+rtc-r9701
+rtc-rs5c348
+rtc-rs5c372
+rtc-rx8025
+rtc-rx8581
+rtc-s35390a
+rtc-stk17ta8
+rtc-test
+rtc-twl4030
+rtc-v3020
+rtc-wm831x
+rtc-wm8350
+rtc-x1205
+rtd520
+rti800
+rti802
+rtl8150
+rtl8180
+rtl8187
+rtl8187se
+rxkad
+s1d13xxxfb
+s2255drv
+s2io
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+s526
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+saa7134-empress
+saa7146
+saa7146_vv
+saa7164
+saa717x
+saa7185
+safe_serial
+salsa20_generic
+salsa20-x86_64
+sata_inic162x
+sata_mv
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+sata_sil24
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+sata_svw
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+savage
+savagefb
+sb
+sb1000
+sbc60xxwdt
+sbc8360
+sbc_epx_c3
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+sb_lib
+sbni
+sbp2
+sc1200wdt
+sc520cdp
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+sc92031
+scb2_flash
+sch311x_wdt
+sch_atm
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+sch_multiq
+sch_netem
+sch_prio
+sch_red
+sch_sfq
+sch_tbf
+sch_teql
+sco
+scsi_debug
+scsi_dh_alua
+scsi_dh_emc
+scsi_dh_hp_sw
+scsi_dh_rdac
+scsi_tgt
+scsi_transport_fc
+scsi_transport_iscsi
+scsi_transport_sas
+scsi_transport_spi
+scsi_transport_srp
+scsi_wait_scan
+sctp
+sdhci
+sdhci-pci
+sdhci-pltfm
+sdio_uart
+sdricoh_cs
+se401
+sedlbauer_cs
+seed
+sep_driver
+seqiv
+ser_gigaset
+serial2002
+serial_cs
+serio_raw
+sermouse
+serpent
+serport
+serqt_usb2
+ses
+sfc
+sha1_generic
+sha256_generic
+sha512_generic
+shpchp
+sht15
+si21xx
+si4713-i2c
+sidewinder
+siemens_mpi
+sierra
+sir-dev
+sis
+sis190
+sis5595
+sis900
+sis-agp
+sisfb
+sisusbvga
+sit
+sja1000
+sja1000_platform
+skel
+skfp
+skge
+sky2
+sl811_cs
+sl811-hcd
+slicoss
+slip
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+sm501fb
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+smsc47m192
+smsc9420
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+smsmdtv
+smssdio
+smsusb
+sn9c102
+snd
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+snd-ad1889
+snd-ak4114
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+snd-ak4xxx-adda
+snd-ali5451
+snd-als300
+snd-als4000
+snd-atiixp
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+snd-cs5535audio
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+snd-hda-codec-analog
+snd-hda-codec-atihdmi
+snd-hda-codec-ca0110
+snd-hda-codec-cirrus
+snd-hda-codec-cmedia
+snd-hda-codec-conexant
+snd-hda-codec-idt
+snd-hda-codec-intelhdmi
+snd-hda-codec-nvhdmi
+snd-hda-codec-realtek
+snd-hda-codec-si3054
+snd-hda-codec-via
+snd-hda-intel
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+snd-hifier
+snd-hrtimer
+snd-hwdep
+snd-i2c
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+snd-ice1724
+snd-ice17xx-ak4xxx
+snd-indigo
+snd-indigodj
+snd-indigodjx
+snd-indigoio
+snd-indigoiox
+snd-intel8x0
+snd-intel8x0m
+snd-korg1212
+snd-layla20
+snd-layla24
+snd-lx6464es
+snd-maestro3
+snd-mia
+snd-mixart
+snd-mixer-oss
+snd-mona
+snd-mpu401
+snd-mpu401-uart
+snd-mtpav
+snd-mts64
+snd-nm256
+snd-opl3-lib
+snd-opl3-synth
+snd-oxygen
+snd-oxygen-lib
+snd-page-alloc
+snd-pcm
+snd-pcm-oss
+snd-pcsp
+snd-pcxhr
+snd-pdaudiocf
+snd-portman2x4
+snd-pt2258
+snd-rawmidi
+snd-riptide
+snd-rme32
+snd-rme96
+snd-rme9652
+snd-sb16-dsp
+snd-sb-common
+snd-seq
+snd-seq-device
+snd-seq-dummy
+snd-seq-midi
+snd-seq-midi-emul
+snd-seq-midi-event
+snd-seq-oss
+snd-seq-virmidi
+snd-serial-u16550
+snd-soc-ad1836
+snd-soc-ad1938
+snd-soc-ad73311
+snd-soc-ak4104
+snd-soc-ak4535
+snd-soc-ak4642
+snd-soc-core
+snd-soc-cs4270
+snd-soc-l3
+snd-soc-max9877
+snd-soc-pcm3008
+snd-soc-spdif
+snd-soc-ssm2602
+snd-soc-tlv320aic23
+snd-soc-tlv320aic26
+snd-soc-tlv320aic3x
+snd-soc-twl4030
+snd-soc-uda134x
+snd-soc-uda1380
+snd-soc-wm8350
+snd-soc-wm8400
+snd-soc-wm8510
+snd-soc-wm8523
+snd-soc-wm8580
+snd-soc-wm8728
+snd-soc-wm8731
+snd-soc-wm8750
+snd-soc-wm8753
+snd-soc-wm8776
+snd-soc-wm8900
+snd-soc-wm8903
+snd-soc-wm8940
+snd-soc-wm8960
+snd-soc-wm8961
+snd-soc-wm8971
+snd-soc-wm8974
+snd-soc-wm8988
+snd-soc-wm8990
+snd-soc-wm8993
+snd-soc-wm9081
+snd-soc-wm-hubs
+snd-sonicvibes
+snd-tea575x-tuner
+snd-timer
+snd-trident
+snd-usb-audio
+snd-usb-caiaq
+snd-usb-lib
+snd-usb-us122l
+snd-usb-usx2y
+snd-util-mem
+snd-via82xx
+snd-via82xx-modem
+snd-virmidi
+snd-virtuoso
+snd-vx222
+snd-vx-lib
+snd-vxpocket
+snd-ymfpci
+soc_camera
+soc_camera_platform
+softcursor
+softdog
+solos-pci
+sony-laptop
+sound
+soundcore
+sound_firmware
+sp8870
+sp887x
+spaceball
+spaceorb
+spcp8x5
+specialix
+spectrum_cs
+speedfax
+speedstep-lib
+speedtch
+spi_bitbang
+spi_butterfly
+spidev
+spi_gpio
+spi_lm70llp
+squashfs
+ssb
+sscape
+ssfdc
+sst25l
+sstfb
+ssv_dnp
+st
+stallion
+starfire
+stb0899
+stb6000
+stb6100
+stex
+stinger
+stir4200
+stkwebcam
+stowaway
+stp
+stradis
+strip
+stv0288
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+stv0299
+stv0900
+stv090x
+stv6110
+stv6110x
+stv680
+sundance
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+sunhme
+suni
+sunkbd
+sunrpc
+svcrdma
+svgalib
+sx8
+sym53c500_cs
+sym53c8xx
+symbolserial
+synaptics_i2c
+synclink
+synclink_cs
+synclink_gt
+synclinkmp
+syscopyarea
+sysfillrect
+sysimgblt
+sysv
+t1pci
+tcp_bic
+tcp_highspeed
+tcp_htcp
+tcp_hybla
+tcp_illinois
+tcp_lp
+tcp_probe
+tcp_scalable
+tcp_vegas
+tcp_veno
+tcp_westwood
+tcp_yeah
+tcrypt
+tda10021
+tda10023
+tda10048
+tda1004x
+tda10086
+tda18271
+tda7432
+tda8083
+tda8261
+tda826x
+tda827x
+tda8290
+tda9840
+tda9887
+tdfx
+tdfxfb
+tdo24m
+tea
+tea5761
+tea5767
+tea6415c
+tea6420
+tehuti
+tekram-sir
+teles_cs
+tg3
+tgr192
+thinkpad_acpi
+thmc50
+tifm_7xx1
+tifm_core
+tifm_ms
+tifm_sd
+tileblit
+timeriomem-rng
+tipc
+ti_usb_3410_5052
+tlan
+tlclk
+tle62x0
+tmdc
+tmiofb
+tmp401
+tmp421
+tms380tr
+tmscsim
+tmspci
+toim3232-sir
+topstar-laptop
+toshiba_acpi
+touchit213
+touchright
+touchwin
+tpm
+tpm_atmel
+tpm_bios
+tpm_infineon
+tpm_nsc
+tpm_tis
+tps65010
+tps65023-regulator
+tps6507x-regulator
+trancevibrator
+tranzport
+tridentfb
+trix
+ts5500_flash
+ts_bm
+tsc2007
+ts_fsm
+ts_kmp
+tsl2550
+tsl2561
+ttm
+ttpci-eeprom
+ttusb_dec
+ttusbdecfe
+tua6100
+tulip
+tuner
+tuner-simple
+tuner-types
+tuner-xc2028
+tunnel4
+tunnel6
+turbografx
+tvaudio
+tveeprom
+tvp5150
+tw9910
+twidjoy
+twl4030-gpio
+twl4030_keypad
+twl4030-pwrbutton
+twl4030-usb
+twl4030_wdt
+twofish
+twofish_common
+twofish-x86_64
+typhoon
+u132-hcd
+uart401
+uart6850
+ubi
+ubifs
+ucb1400_core
+ucb1400_ts
+udf
+udlfb
+ueagle-atm
+ufs
+uinput
+uio
+uio_aec
+uio_cif
+uio_pci_generic
+uio_pdrv
+uio_pdrv_genirq
+uio_sercos3
+uio_smx
+uli526x
+ultracam
+umc
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+ums-alauda
+ums-cypress
+ums-datafab
+ums-freecom
+ums-isd200
+ums-jumpshot
+ums-karma
+ums-onetouch
+ums-sddr09
+ums-sddr55
+ums-usbat
+unioxx5
+upd64031a
+upd64083
+uPD98402
+usb8xxx
+usbatm
+usb_debug
+usbdux
+usbduxfast
+usb_gigaset
+usbhid
+usbip
+usbip_common_mod
+usblcd
+usbled
+usblp
+usbnet
+usbserial
+usbsevseg
+usb-storage
+usbtest
+usbtmc
+usbtouchscreen
+usbvideo
+usbvision
+userspace-consumer
+uss720
+uvcvideo
+uvesafb
+uwb
+v4l1-compat
+v4l2-common
+v4l2-compat-ioctl32
+v4l2-int-device
+vcan
+ves1820
+ves1x93
+vesafb
+veth
+vfat
+vga16fb
+vgastate
+vgg2432a4
+vhci-hcd
+via
+via686a
+via-agp
+viafb
+via-ircc
+via-rhine
+via-rng
+via-sdmmc
+via-velocity
+vicam
+video
+video1394
+videobuf-core
+videobuf-dma-sg
+videobuf-dvb
+videobuf-vmalloc
+videocodec
+videodev
+virtio
+virtio_balloon
+virtio_blk
+virtio_console
+virtio_net
+virtio_pci
+virtio_ring
+virtio-rng
+virtual
+visor
+vivi
+vlsi_ir
+vmac
+vme
+vme_ca91cx42
+vme_tsi148
+vme_user
+v_midi
+vmk80xx
+vmlfb
+vmw_pvscsi
+vmxnet3
+vp27smpx
+vpx3220
+vstusb
+vsxxxaa
+vt1211
+vt6656_stage
+vt8231
+vt8623fb
+vxge
+w1_bq27000
+w1_ds2431
+w1_ds2433
+w1_ds2760
+w1-gpio
+w1_smem
+w1_therm
+w6692
+w83627ehf
+w83627hf
+w83627hf_wdt
+w83697hf_wdt
+w83697ug_wdt
+w83781d
+w83791d
+w83792d
+w83793
+w83877f_wdt
+w83977af_ir
+w83977f_wdt
+w83l785ts
+w83l786ng
+w9966
+w9968cf
+wacom
+wacom_w8001
+wafer5823wdt
+walkera0701
+wanrouter
+wanxl
+warrior
+wavelan_cs
+wbsd
+wdt_pci
+whci
+whci-hcd
+whc-rc
+whiteheat
+wimax
+winbond-840
+winbond-cir
+wire
+wl1251
+wl1251_sdio
+wl1251_spi
+wl1271
+wl3501_cs
+wlp
+wm831x
+wm831x_bl
+wm831x-dcdc
+wm831x-gpio
+wm831x-hwmon
+wm831x-isink
+wm831x-ldo
+wm831x-on
+wm831x_power
+wm831x_wdt
+wm8350
+wm8350-hwmon
+wm8350-i2c
+wm8350_power
+wm8350-regulator
+wm8350_wdt
+wm8400-core
+wm8400-regulator
+wm8739
+wm8775
+wm97xx-ts
+wp512
+wpan-class
+wusb-cbaf
+wusbcore
+wusb-wa
+x25
+x25_asy
+x38_edac
+xc5000
+xcbc
+xen-blkfront
+xen-fbfront
+xenfs
+xen-kbdfront
+xen-netfront
+xfrm4_mode_beet
+xfrm4_mode_transport
+xfrm4_mode_tunnel
+xfrm4_tunnel
+xfrm6_mode_beet
+xfrm6_mode_ro
+xfrm6_mode_transport
+xfrm6_mode_tunnel
+xfrm6_tunnel
+xfrm_ipcomp
+xfrm_user
+xfs
+xhci
+xirc2ps_cs
+xircom_cb
+xor
+xpad
+xprtrdma
+x_tables
+xt_CLASSIFY
+xt_cluster
+xt_comment
+xt_connbytes
+xt_connlimit
+xt_connmark
+xt_CONNMARK
+xt_CONNSECMARK
+xt_conntrack
+xt_dccp
+xt_dscp
+xt_DSCP
+xt_esp
+xt_hashlimit
+xt_helper
+xt_hl
+xt_HL
+xt_iprange
+xtkbd
+xt_LED
+xt_length
+xt_limit
+xt_mac
+xt_mark
+xt_MARK
+xt_multiport
+xt_NFLOG
+xt_NFQUEUE
+xt_NOTRACK
+xt_osf
+xt_owner
+xt_physdev
+xt_pkttype
+xt_policy
+xt_quota
+xt_rateest
+xt_RATEEST
+xt_realm
+xt_recent
+xts
+xt_sctp
+xt_SECMARK
+xt_socket
+xt_state
+xt_statistic
+xt_string
+xt_tcpmss
+xt_TCPMSS
+xt_tcpudp
+xt_time
+xt_TPROXY
+xt_TRACE
+xt_u32
+xusbatm
+xvmalloc
+yam
+yealink
+yellowfin
+yenta_socket
+zatm
+zaurus
+zc0301
+zd1201
+zd1211rw
+zhenhua
+zl10036
+zl10039
+zl10353
+zlib
+zlib_deflate
+zr36016
+zr36050
+zr36060
+zr36067
+zr364xx
--- linux-mvl-dove-2.6.32.orig/debian.master/abi/2.6.32-34.73/amd64/server.modules
+++ linux-mvl-dove-2.6.32/debian.master/abi/2.6.32-34.73/amd64/server.modules
@@ -0,0 +1,2599 @@
+3c359
+3c574_cs
+3c589_cs
+3c59x
+3w-9xxx
+3w-xxxx
+6pack
+8021q
+8139cp
+8139too
+8255
+8390
+9p
+9pnet
+9pnet_rdma
+9pnet_virtio
+a100u2w
+a3d
+aacraid
+ab3100
+ab3100-core
+ab3100-otp
+abituguru
+abituguru3
+abyss
+ac97_bus
+acecad
+acenic
+acerhdf
+acer-wmi
+acl7225b
+acpi_memhotplug
+acpi_pad
+acpiphp
+acpiphp_ibm
+acquirewdt
+act200l-sir
+act_gact
+act_ipt
+actisys-sir
+act_mirred
+act_nat
+act_pedit
+act_police
+act_simple
+act_skbedit
+ad1848
+ad7414
+ad7418
+ad7877
+ad7879
+adcxx
+addi_apci_035
+addi_apci_1032
+addi_apci_1500
+addi_apci_1516
+addi_apci_1564
+addi_apci_16xx
+addi_apci_2016
+addi_apci_2032
+addi_apci_2200
+addi_apci_3001
+addi_apci_3120
+addi_apci_3501
+addi_apci_3xxx
+adfs
+adi
+adl_pci6208
+adl_pci7296
+adl_pci7432
+adl_pci8164
+adl_pci9111
+adl_pci9118
+adm1021
+adm1025
+adm1026
+adm1029
+adm1031
+adm8211
+adm9240
+adp5588-keys
+adq12b
+ads7828
+ads7846
+adt7462
+adt7470
+adt7473
+adt7475
+adutux
+adv7170
+adv7175
+advansys
+advantechwdt
+adv_pci1710
+adv_pci1723
+adv_pci_dio
+aedsp16
+aes_generic
+aesni-intel
+aes-x86_64
+af_802154
+af9013
+affs
+af_key
+af-rxrpc
+ah4
+ah6
+ahci
+aic79xx
+aic7xxx
+aic94xx
+aio_aio12_8
+aio_iiro_16
+aiptek
+aircable
+airo
+airo_cs
+alauda
+ali-ircc
+alim1535_wdt
+alim7101_wdt
+alphatrack
+altpciechdma
+ambassador
+amd64_edac_mod
+amd76xrom
+amd8111e
+amd-rng
+amplc_dio200
+amplc_pc236
+amplc_pc263
+amplc_pci224
+amplc_pci230
+analog
+ansi_cprng
+anubis
+aoe
+appledisplay
+applesmc
+appletalk
+appletouch
+applicom
+ar7part
+ar9170usb
+arc4
+arcfb
+arcmsr
+arcnet
+arc-rawmode
+arc-rimi
+ark3116
+arkfb
+arptable_filter
+arp_tables
+arpt_mangle
+asb100
+asix
+asus_atk0110
+asus-laptop
+asus_oled
+async_memcpy
+async_pq
+async_raid6_recov
+async_tx
+async_xor
+at24
+at25
+at76c50x-usb
+aten
+ath
+ath5k
+ath9k
+ati_remote
+ati_remote2
+atl1
+atl1c
+atl1e
+atl2
+atlas_btns
+atm
+atmel
+atmel_cs
+atmel_pci
+atmtcp
+atp
+atp870u
+atxp1
+aty128fb
+atyfb
+au0828
+au8522
+aufs
+authenc
+auth_rpcgss
+autofs
+autofs4
+av5100
+avma1_cs
+avm_cs
+avmfritz
+ax25
+axnet_cs
+b1
+b1dma
+b1pci
+b1pcmcia
+b2c2-flexcop
+b2c2-flexcop-pci
+b2c2-flexcop-usb
+b3dfg
+b43
+b43legacy
+b44
+bas_gigaset
+baycom_par
+baycom_ser_fdx
+baycom_ser_hdx
+bcm203x
+bcm3510
+bcm5974
+be2iscsi
+be2net
+befs
+belkin_sa
+berry_charge
+bfa
+bfs
+bfusb
+binfmt_misc
+bitblit
+block2mtd
+blowfish
+bluecard_cs
+bluetooth
+bnep
+bnx2
+bnx2i
+bnx2x
+bonding
+bpa10x
+bpck
+bpqether
+bq24022
+bq27x00_battery
+br2684
+bridge
+broadsheetfb
+bsd_comp
+bt3c_cs
+bt819
+bt856
+bt866
+bt878
+btcx-risc
+btmrvl
+btmrvl_sdio
+btrfs
+btsdio
+bttv
+btuart_cs
+btusb
+budget
+budget-av
+budget-ci
+budget-core
+budget-patch
+BusLogic
+bw-qcam
+c2port-duramar2150
+c4
+c67x00
+c6xdigio
+cachefiles
+cafe_ccic
+cafe_nand
+camellia
+can
+can-bcm
+can-dev
+can-raw
+capi
+capidrv
+capifs
+capmode
+carminefb
+cassini
+cast5
+cast6
+catc
+cb710
+cb710-mmc
+cb_das16_cs
+cb_pcidas
+cb_pcidas64
+cb_pcidda
+cb_pcidio
+cb_pcimdas
+cb_pcimdda
+cciss
+ccm
+cdc-acm
+cdc_eem
+cdc_ether
+cdc-phonet
+cdc_subset
+cdc-wdm
+cfag12864b
+cfag12864bfb
+cfg80211
+cfi_cmdset_0001
+cfi_cmdset_0002
+cfi_cmdset_0020
+cfi_probe
+cfi_util
+ch
+ch341
+ch7006
+chipreg
+cifs
+cirrusfb
+ck804xrom
+clip
+cls_basic
+cls_flow
+cls_fw
+cls_route
+cls_rsvp
+cls_rsvp6
+cls_tcindex
+cls_u32
+cm109
+cm4000_cs
+cm4040_cs
+cmtp
+cnic
+cobra
+coda
+com20020
+com20020_cs
+com20020-pci
+com90io
+com90xx
+comedi
+comedi_bond
+comedi_fc
+comedi_parport
+comedi_test
+comm
+compal-laptop
+configfs
+contec_pci_dio
+core
+coretemp
+cp210x
+cpcihp_generic
+cpcihp_zt5550
+cpia
+cpia2
+cpia_pp
+cpia_usb
+cpqarray
+cpu5wdt
+cpuid
+c-qcam
+cramfs
+cr_bllcd
+crc32c
+crc32c-intel
+crc7
+crc-ccitt
+crc-itu-t
+crvml
+cryptd
+cryptoloop
+crypto_null
+cs5345
+cs53l32a
+ct82c710
+ctr
+cts
+cuse
+cx18
+cx22700
+cx22702
+cx231xx
+cx231xx-alsa
+cx231xx-dvb
+cx2341x
+cx23885
+cx24110
+cx24113
+cx24116
+cx24123
+cx25821
+cx25821-alsa
+cx25840
+cx8800
+cx8802
+cx88-alsa
+cx88-blackbird
+cx88-dvb
+cx88-vp3054-i2c
+cx88xx
+cxacru
+cxgb
+cxgb3
+cxgb3i
+cyber2000fb
+cyberjack
+cyclades
+cyclomx
+cycx_drv
+cypress_cy7c63
+cypress_m8
+cytherm
+da9030_battery
+da9034-ts
+da903x
+da903x_bl
+dabusb
+DAC960
+daqboard2000
+das08
+das08_cs
+das16
+das16m1
+das1800
+das6402
+das800
+db9
+dc395x
+dca
+dccp
+dccp_diag
+dccp_ipv4
+dccp_ipv6
+dccp_probe
+dcdbas
+de2104x
+de4x5
+de600
+de620
+decnet
+deflate
+defxx
+dell-laptop
+dell-led
+dell_rbu
+dell-wmi
+des_generic
+dib0070
+dib3000mb
+dib3000mc
+dib7000m
+dib7000p
+dib8000
+dibx000_common
+digi_acceleport
+diskonchip
+display
+divacapi
+divadidd
+diva_idi
+diva_mnt
+divas
+dlci
+dlm
+dm1105
+dm9601
+dm-crypt
+dme1737
+dmfe
+dmm32at
+dm-queue-length
+dm-raid45
+dm-service-time
+dmx3191d
+dm-zero
+dnet
+dn_rtmsg
+doc2000
+doc2001
+doc2001plus
+docecc
+docprobe
+dpt_i2o
+drm
+drm_kms_helper
+ds1621
+ds1682
+ds2482
+ds2490
+ds2760_battery
+ds2782_battery
+dsbr100
+dscc4
+dss1_divert
+dst
+dst_ca
+dstr
+dt2801
+dt2811
+dt2814
+dt2815
+dt2817
+dt282x
+dt3000
+dt9812
+dtl1_cs
+dummy
+dummy_hcd
+dv1394
+dvb-bt8xx
+dvb-core
+dvb-pll
+dvb-ttpci
+dvb-ttusb-budget
+dvb-usb
+dvb-usb-a800
+dvb-usb-af9005
+dvb-usb-af9005-remote
+dvb-usb-af9015
+dvb-usb-anysee
+dvb-usb-au6610
+dvb-usb-ce6230
+dvb-usb-cinergyT2
+dvb-usb-cxusb
+dvb-usb-dib0700
+dvb-usb-dibusb-common
+dvb-usb-dibusb-mb
+dvb-usb-dibusb-mc
+dvb-usb-digitv
+dvb-usb-dtt200u
+dvb-usb-dtv5100
+dvb-usb-dw2102
+dvb-usb-friio
+dvb-usb-gl861
+dvb-usb-gp8psk
+dvb-usb-m920x
+dvb-usb-nova-t-usb2
+dvb-usb-opera
+dvb-usb-ttusb2
+dvb-usb-umt-010
+dvb-usb-vp702x
+dvb-usb-vp7045
+e100
+e1000
+e1000e
+e752x_edac
+earth-pt1
+eata
+ebt_802_3
+ebtable_broute
+ebtable_filter
+ebtable_nat
+ebtables
+ebt_among
+ebt_arp
+ebt_arpreply
+ebt_dnat
+ebt_ip
+ebt_ip6
+ebt_limit
+ebt_log
+ebt_mark
+ebt_mark_m
+ebt_nflog
+ebt_pkttype
+ebt_redirect
+ebt_snat
+ebt_stp
+ebt_ulog
+ebt_vlan
+echo
+econet
+edac_core
+edac_mce_amd
+eeepc-laptop
+eeprom
+eeprom_93cx6
+eeti_ts
+efs
+elo
+elsa_cs
+em28xx
+em28xx-alsa
+em28xx-dvb
+em_cmp
+emi26
+emi62
+em_meta
+em_nbyte
+empeg
+ems_pci
+ems_usb
+em_text
+emu10k1-gp
+em_u32
+enclosure
+eni
+enic
+epat
+epca
+epia
+epic100
+eql
+esb2rom
+esi-sir
+esp4
+esp6
+et131x
+et61x251
+eth1394
+ethoc
+eurotechwdt
+evbug
+evtchn
+exofs
+exportfs
+f71805f
+f71882fg
+f75375s
+fakephp
+farsync
+fat
+faulty
+fbcon
+fb_ddc
+fb_sys_fops
+fcoe
+fcrypt
+fdomain
+fdomain_cs
+fealnx
+ff-memless
+firedtv
+firestream
+firewire-core
+firewire-net
+firewire-ohci
+firewire-sbp2
+fit2
+fit3
+fl512
+floppy
+fm801-gp
+fmvj18x_cs
+fnic
+font
+forcedeth
+fore_200e
+fpu
+freevxfs
+friq
+frpw
+fsam7400
+fscache
+fschmd
+ftdi-elan
+ftdi_sio
+ftl
+fujitsu-laptop
+fujitsu_ts
+funsoft
+g450_pll
+g760a
+gadgetfs
+gamecon
+gameport
+garmin_gps
+garp
+g_audio
+g_cdc
+gcm
+gdth
+generic
+generic_bl
+gen_probe
+g_ether
+gf128mul
+gf2k
+g_file_storage
+gfs2
+ghash-clmulni-intel
+ghash-generic
+gigaset
+girbil-sir
+gl518sm
+gl520sm
+gl620a
+gluebi
+g_midi
+gpio-addr-flash
+gpio_keys
+gpio_mouse
+gpio_vbus
+g_printer
+grip
+grip_mp
+gsc_hpdi
+g_serial
+gspca_conex
+gspca_etoms
+gspca_finepix
+gspca_gl860
+gspca_jeilinj
+gspca_m5602
+gspca_main
+gspca_mars
+gspca_mr97310a
+gspca_ov519
+gspca_ov534
+gspca_pac207
+gspca_pac7311
+gspca_sn9c20x
+gspca_sonixb
+gspca_sonixj
+gspca_spca500
+gspca_spca501
+gspca_spca505
+gspca_spca506
+gspca_spca508
+gspca_spca561
+gspca_sq905
+gspca_sq905c
+gspca_stk014
+gspca_stv06xx
+gspca_sunplus
+gspca_t613
+gspca_tv8532
+gspca_vc032x
+gspca_zc3xx
+gtco
+guillemot
+gunze
+gx1fb
+gxfb
+g_zero
+hamachi
+hangcheck-timer
+hci_uart
+hci_vhci
+hdaps
+hdlc
+hdlc_cisco
+hdlcdrv
+hdlc_fr
+hdlc_ppp
+hdlc_raw
+hdlc_raw_eth
+hdlc_x25
+hdpvr
+he
+hecubafb
+hexium_gemini
+hexium_orion
+hfc4s8s_l1
+hfcmulti
+hfcpci
+hfcsusb
+hfc_usb
+hfs
+hfsplus
+hgafb
+hid
+hid-3m-pct
+hid-a4tech
+hid-apple
+hid-belkin
+hid-cherry
+hid-chicony
+hid-cypress
+hid-drff
+hid-ezkey
+hid-gaff
+hid-gyration
+hid-kensington
+hid-kye
+hid-logitech
+hid-microsoft
+hid-monterey
+hid-mosart
+hid-ntrig
+hid-ortek
+hidp
+hid-petalynx
+hid-pl
+hid-quanta
+hid-samsung
+hid-sjoy
+hid-sony
+hid-stantum
+hid-sunplus
+hid-tmff
+hid-topseed
+hid-twinhan
+hid-wacom
+hid-zpff
+hifn_795x
+hisax
+hisax_fcpcipnp
+hisax_isac
+hisax_st5481
+horizon
+hostap
+hostap_cs
+hostap_pci
+hostap_plx
+hp100
+hp4x
+hp_accel
+hpfs
+hpilo
+hptiop
+hp-wmi
+hso
+htc-pasic3
+hv_blkvsc
+hv_netvsc
+hv_storvsc
+hv_vmbus
+hwa-hc
+hwa-rc
+hwmon-vid
+hysdn
+i1480-dfu-usb
+i1480-est
+i1480u-wlp
+i2400m
+i2400m-sdio
+i2400m-usb
+i2c-algo-bit
+i2c-algo-pca
+i2c-algo-pcf
+i2c-ali1535
+i2c-ali1563
+i2c-ali15x3
+i2c-amd756
+i2c-amd756-s4882
+i2c-amd8111
+i2c-dev
+i2c-gpio
+i2c-i801
+i2c-isch
+i2c-matroxfb
+i2c-nforce2
+i2c-nforce2-s4985
+i2c-ocores
+i2c-parport
+i2c-parport-light
+i2c-pca-platform
+i2c-piix4
+i2c-scmi
+i2c-simtec
+i2c-sis5595
+i2c-sis630
+i2c-sis96x
+i2c-stub
+i2c-taos-evm
+i2c-tiny-usb
+i2c-via
+i2c-viapro
+i2c-voodoo3
+i2o_block
+i2o_bus
+i2o_config
+i2o_core
+i2o_proc
+i2o_scsi
+i3000_edac
+i3200_edac
+i5000_edac
+i5100_edac
+i5400_edac
+i5k_amb
+i6300esb
+i7300_idle
+i810
+i82092
+i82975x_edac
+i830
+i8k
+i915
+ib700wdt
+ib_addr
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+ib_ipoib
+ib_iser
+ib_mad
+ibmaem
+ibmasm
+ibmasr
+ibmcam
+ibmpex
+ib_mthca
+ibmtr_cs
+ib_sa
+ib_srp
+ib_ucm
+ib_umad
+ib_uverbs
+ichxrom
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+ics932s401
+idmouse
+idt77252
+ieee1394
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+iforce
+igb
+igbvf
+ii_pci20kc
+ili9320
+imm
+industrialio
+inexio
+inftl
+initio
+input-polldev
+int51x1
+intel-agp
+intel_menlow
+intel-rng
+intel_vr_nor
+interact
+ioatdma
+ioc4
+io_edgeport
+io_ti
+iowarrior
+ip2
+ip6_queue
+ip6table_filter
+ip6table_mangle
+ip6table_raw
+ip6_tables
+ip6table_security
+ip6t_ah
+ip6t_eui64
+ip6t_frag
+ip6t_hbh
+ip6t_ipv6header
+ip6t_LOG
+ip6t_mh
+ip6t_REJECT
+ip6t_rt
+ip6_tunnel
+ipaq
+ipcomp
+ipcomp6
+ipddp
+ipg
+ip_gre
+iphase
+ipip
+ipmi_devintf
+ipmi_msghandler
+ipmi_poweroff
+ipmi_si
+ipmi_watchdog
+ip_queue
+ipr
+ips
+iptable_filter
+iptable_mangle
+iptable_nat
+iptable_raw
+ip_tables
+iptable_security
+ipt_addrtype
+ipt_ah
+ipt_CLUSTERIP
+ipt_ecn
+ipt_ECN
+ipt_LOG
+ipt_MASQUERADE
+ipt_NETMAP
+ipt_REDIRECT
+ipt_REJECT
+ipt_ULOG
+ip_vs
+ip_vs_dh
+ip_vs_ftp
+ip_vs_lblc
+ip_vs_lblcr
+ip_vs_lc
+ip_vs_nq
+ip_vs_rr
+ip_vs_sed
+ip_vs_sh
+ip_vs_wlc
+ip_vs_wrr
+ipw
+ipw2100
+ipw2200
+ipwireless
+ipx
+ircomm
+ir-common
+ircomm-tty
+irda
+irda-usb
+ir-kbd-i2c
+irlan
+irnet
+irtty-sir
+ir-usb
+iscsi_ibft
+iscsi_tcp
+iscsi_trgt
+isdn
+isdn_bsdcomp
+isdnhdlc
+isight_firmware
+isl29003
+isl6405
+isl6421
+isl6423
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+isp116x-hcd
+isp1362-hcd
+isp1760
+istallion
+it87
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+it87_wdt
+iTCO_vendor_support
+iTCO_wdt
+itd1000
+iuu_phoenix
+ivtv
+ivtvfb
+iw_c2
+iw_cm
+iw_cxgb3
+iwl3945
+iwlagn
+iwlcore
+iwmc3200wifi
+ixgb
+ixgbe
+ixj
+ixj_pcmcia
+jedec_probe
+jffs2
+jfs
+jmb38x_ms
+jme
+joydev
+joydump
+jr3_pci
+jsm
+k8temp
+kafs
+kahlua
+kaweth
+kb3886_bl
+kbic
+kbtab
+kcomedilib
+ke_counter
+kernelcapi
+keyspan
+keyspan_pda
+keyspan_remote
+khazad
+kingsun-sir
+kl5kusb105
+kobil_sct
+konicawc
+ks0108
+ks0127
+ks8842
+ks8851
+ks8851_mll
+ks959-sir
+ksdazzle-sir
+ktti
+kvaser_pci
+kvm
+kvm-amd
+kvm-intel
+kxsd9
+kyrofb
+l1oip
+l2cap
+l440gx
+l64781
+lanai
+lapb
+lapbether
+lcd
+ldusb
+lec
+led-class
+leds-alix2
+leds-bd2802
+leds-da903x
+leds-dac124s085
+leds-gpio
+leds-lp3944
+leds-pca9532
+leds-pca955x
+leds-wm831x-status
+leds-wm8350
+ledtrig-backlight
+ledtrig-default-on
+ledtrig-gpio
+ledtrig-heartbeat
+ledtrig-timer
+legousbtower
+lgdt3305
+lgdt330x
+lgs8gxx
+lib80211
+lib80211_crypt_ccmp
+lib80211_crypt_tkip
+lib80211_crypt_wep
+libcrc32c
+libertas
+libertas_cs
+libertas_sdio
+libertas_spi
+libertas_tf
+libertas_tf_usb
+libfc
+libfcoe
+libipw
+libiscsi
+libiscsi_tcp
+libosd
+libsas
+libsrp
+lightning
+line6usb
+linear
+lirc_atiusb
+lirc_bt829
+lirc_dev
+lirc_ene0100
+lirc_i2c
+lirc_igorplugusb
+lirc_imon
+lirc_it87
+lirc_ite8709
+lirc_mceusb
+lirc_sasem
+lirc_serial
+lirc_sir
+lirc_streamzap
+lirc_ttusbir
+lis3l02dq
+lis3lv02d
+litelink-sir
+lkkbd
+llc2
+lm63
+lm70
+lm75
+lm77
+lm78
+lm80
+lm83
+lm8323
+lm85
+lm87
+lm90
+lm92
+lm93
+lm95241
+lmc
+lms283gf05
+lnbp21
+lockd
+lp
+lp3971
+lpddr_cmds
+lpfc
+lrw
+ltc4215
+ltc4245
+ltv350qv
+lxfb
+lzo
+lzo_compress
+lzo_decompress
+m25p80
+m52790
+ma600-sir
+mac80211
+mac80211_hwsim
+machzwd
+macmodes
+macvlan
+magellan
+map_absent
+map_funcs
+map_ram
+map_rom
+matrix_keypad
+matroxfb_accel
+matroxfb_base
+matroxfb_crtc2
+matroxfb_DAC1064
+matroxfb_g450
+matroxfb_maven
+matroxfb_misc
+matroxfb_Ti3026
+matrox_w1
+max1111
+max1363
+max1586
+max1619
+max17040_battery
+max3100
+max6650
+max6875
+max7301
+max732x
+max7359_keypad
+mb862xxfb
+mbp_nvidia_bl
+mc13783
+mc13783-core
+mc33880
+mc44s803
+mce-inject
+mce-xeon75xx
+mcp2120-sir
+mcp23s08
+mcs5000_ts
+mcs7780
+mcs7830
+mct_u232
+md4
+mdc800
+mdio
+me4000
+me_daq
+megaraid
+megaraid_mbox
+megaraid_mm
+megaraid_sas
+memstick
+metronomefb
+meye
+mfd-core
+mga
+michael_mic
+microcode
+microtek
+mii
+minix
+mISDN_core
+mISDN_dsp
+mISDNinfineon
+mISDNipac
+mISDNisar
+mite
+mk712
+mkiss
+mlx4_core
+mlx4_en
+mlx4_ib
+mmc_block
+mmc_spi
+mos7720
+mos7840
+moto_modem
+moxa
+mpc624
+mpoa
+mpt2sas
+mptbase
+mptctl
+mptfc
+mptlan
+mptsas
+mptscsih
+mptspi
+mpu401
+msdos
+msi-laptop
+msp3400
+mspro_block
+msr
+mt2060
+mt20xx
+mt2131
+mt2266
+mt312
+mt352
+mt9m001
+mt9m111
+mt9t031
+mt9v011
+mt9v022
+mtd
+mtd_blkdevs
+mtdblock
+mtdblock_ro
+mtdchar
+mtdconcat
+mtd_dataflash
+mtd_oobtest
+mtdoops
+mtd_pagetest
+mtdram
+mtd_readtest
+mtd_speedtest
+mtd_stresstest
+mtd_subpagetest
+mtd_torturetest
+mtouch
+multipath
+multiq3
+mvsas
+mwave
+mwl8k
+mxb
+mxl5005s
+mxl5007t
+mxser
+myri10ge
+n411
+nand
+nand_ecc
+nand_ids
+nandsim
+natsemi
+navman
+nbd
+ncpfs
+ndiswrapper
+ne2k-pci
+neofb
+net1080
+netconsole
+netjet
+netrom
+netsc520
+nettel
+netwave_cs
+netxen_nic
+newtonkbd
+nf_conntrack
+nf_conntrack_amanda
+nf_conntrack_ftp
+nf_conntrack_h323
+nf_conntrack_ipv4
+nf_conntrack_ipv6
+nf_conntrack_irc
+nf_conntrack_netbios_ns
+nf_conntrack_netlink
+nf_conntrack_pptp
+nf_conntrack_proto_dccp
+nf_conntrack_proto_gre
+nf_conntrack_proto_sctp
+nf_conntrack_proto_udplite
+nf_conntrack_sane
+nf_conntrack_sip
+nf_conntrack_tftp
+nf_defrag_ipv4
+nf_nat
+nf_nat_amanda
+nf_nat_ftp
+nf_nat_h323
+nf_nat_irc
+nf_nat_pptp
+nf_nat_proto_dccp
+nf_nat_proto_gre
+nf_nat_proto_sctp
+nf_nat_proto_udplite
+nf_nat_sip
+nf_nat_snmp_basic
+nf_nat_tftp
+nfnetlink
+nfnetlink_log
+nfnetlink_queue
+nfs
+nfs_acl
+nfsd
+nftl
+nf_tproxy_core
+n_hdlc
+ni_6527
+ni_65xx
+ni_660x
+ni_670x
+ni_at_a2150
+ni_at_ao
+ni_atmio
+ni_atmio16d
+ni_daq_700
+ni_daq_dio24
+ni_labpc
+ni_labpc_cs
+nilfs2
+ni_mio_cs
+ni_pcidio
+ni_pcimio
+ni_tio
+ni_tiocmd
+niu
+nl802154
+nls_ascii
+nls_cp1250
+nls_cp1251
+nls_cp1255
+nls_cp437
+nls_cp737
+nls_cp775
+nls_cp850
+nls_cp852
+nls_cp855
+nls_cp857
+nls_cp860
+nls_cp861
+nls_cp862
+nls_cp863
+nls_cp864
+nls_cp865
+nls_cp866
+nls_cp869
+nls_cp874
+nls_cp932
+nls_cp936
+nls_cp949
+nls_cp950
+nls_euc-jp
+nls_iso8859-1
+nls_iso8859-13
+nls_iso8859-14
+nls_iso8859-15
+nls_iso8859-2
+nls_iso8859-3
+nls_iso8859-4
+nls_iso8859-5
+nls_iso8859-6
+nls_iso8859-7
+nls_iso8859-9
+nls_koi8-r
+nls_koi8-ru
+nls_koi8-u
+nls_utf8
+nmclan_cs
+nop-usb-xceiv
+nouveau
+nozomi
+n_r3964
+ns558
+ns83820
+nsc_gpio
+nsc-ircc
+nst
+ntfs
+nvidiafb
+nvram
+nxt200x
+nxt6000
+ocfs2
+ocfs2_dlm
+ocfs2_dlmfs
+ocfs2_nodemanager
+ocfs2_stackglue
+ocfs2_stack_o2cb
+ocfs2_stack_user
+ohci1394
+old_belkin-sir
+olympic
+omfs
+omnibook
+omninet
+on20
+on26
+onenand
+onenand_sim
+opencores-kbd
+opl3
+oprofile
+opticon
+option
+or51132
+or51211
+orinoco
+orinoco_cs
+orinoco_nortel
+orinoco_pci
+orinoco_plx
+orinoco_tmd
+osd
+osdblk
+osst
+oti6858
+output
+ov7670
+ov772x
+ovcamchip
+oxu210hp-hcd
+p4-clockmod
+p54common
+p54pci
+p54spi
+p54usb
+p8023
+p9auth
+padlock-aes
+padlock-sha
+panasonic-laptop
+panel
+paride
+parkbd
+parport
+parport_ax88796
+parport_cs
+parport_pc
+parport_serial
+pas2
+pata_ali
+pata_amd
+pata_artop
+pata_atiixp
+pata_atp867x
+pata_cmd640
+pata_cmd64x
+pata_cs5520
+pata_cs5530
+pata_cypress
+pata_efar
+pata_hpt366
+pata_hpt37x
+pata_hpt3x2n
+pata_hpt3x3
+pata_it8213
+pata_it821x
+pata_jmicron
+pata_marvell
+pata_mpiix
+pata_netcell
+pata_ninja32
+pata_ns87410
+pata_ns87415
+pata_oldpiix
+pata_opti
+pata_optidma
+pata_pcmcia
+pata_pdc2027x
+pata_pdc202xx_old
+pata_radisys
+pata_rdc
+pata_rz1000
+pata_sc1200
+pata_sch
+pata_serverworks
+pata_sil680
+pata_sl82c105
+pata_triflex
+pata_via
+pbe5
+pc87360
+pc8736x_gpio
+pc87413_wdt
+pc87427
+pca953x
+pcbc
+pcd
+pcf50633-adc
+pcf50633-charger
+pcf50633-core
+pcf50633-gpio
+pcf50633-input
+pcf50633-regulator
+pcf857x
+pcf8591
+pci
+pci200syn
+pcilynx
+pcips2
+pci-stub
+pcl711
+pcl724
+pcl725
+pcl726
+pcl730
+pcl812
+pcl816
+pcl818
+pcm3724
+pcm3730
+pcmad
+pcmcia
+pcmcia_core
+pcm_common
+pcmda12
+pcmmio
+pcmuio
+pcnet32
+pcnet_cs
+pcspkr
+pcwd_pci
+pcwd_usb
+pd
+pd6729
+pda_power
+pegasus
+penmount
+pf
+pg
+phantom
+phison
+phonedev
+phonet
+phram
+physmap
+pktgen
+pl2303
+platform_lcd
+plat_nand
+plat-ram
+plip
+plusb
+pluto2
+pm2fb
+pm3fb
+pmc551
+pmcraid
+pn_pep
+poc
+poch
+pohmelfs
+powermate
+power_meter
+ppa
+ppdev
+ppp_async
+ppp_deflate
+ppp_mppe
+pppoatm
+pppoe
+pppol2tp
+pppox
+ppp_synctty
+pps_core
+prism2_usb
+prism54
+progear_bl
+psmouse
+pss
+pt
+pvrusb2
+pwc
+qcserial
+qinfo_probe
+qla1280
+qla2xxx
+qla3xxx
+qla4xxx
+qlge
+qlogic_cs
+qlogicfas408
+qnx4
+qt1010
+quatech_daqp_cs
+quatech_usb2
+quickcam_messenger
+quota_tree
+quota_v1
+quota_v2
+r128
+r8169
+r8192_pci
+r8192se_pci
+r8192s_usb
+r8a66597-hcd
+radeon
+radeonfb
+radio-gemtek-pci
+radio-i2c-si470x
+radio-maestro
+radio-maxiradio
+radio-mr800
+radio-si4713
+radio-tea5764
+radio-usb-si470x
+raid0
+raid1
+raid10
+raid456
+raid6_pq
+raid6test
+raid_class
+ramzswap
+rar_driver
+raw
+raw1394
+ray_cs
+rdma_cm
+rdma_ucm
+rds
+rds_rdma
+rds_tcp
+redboot
+reed_solomon
+reiserfs
+rfc1051
+rfc1201
+rfcomm
+rfd_ftl
+ricoh_mmc
+rio500
+riscom8
+rivafb
+rmd128
+rmd160
+rmd256
+rmd320
+rndis_host
+rndis_wlan
+rocket
+romfs
+rose
+rotary_encoder
+rpcsec_gss_krb5
+rpcsec_gss_spkm3
+rrunner
+rsrc_nonstatic
+rt2400pci
+rt2500pci
+rt2500usb
+rt2800usb
+rt2860sta
+rt2870sta
+rt2x00lib
+rt2x00pci
+rt2x00usb
+rt3090sta
+rt61pci
+rt73usb
+rtc-ab3100
+rtc-bq4802
+rtc-ds1286
+rtc-ds1305
+rtc-ds1307
+rtc-ds1374
+rtc-ds1390
+rtc-ds1511
+rtc-ds1553
+rtc-ds1672
+rtc-ds1742
+rtc-ds3234
+rtc-fm3130
+rtc-isl1208
+rtc-m41t80
+rtc-m41t94
+rtc-m48t35
+rtc-m48t59
+rtc-m48t86
+rtc-max6900
+rtc-max6902
+rtc-pcf2123
+rtc-pcf50633
+rtc-pcf8563
+rtc-pcf8583
+rtc-r9701
+rtc-rs5c348
+rtc-rs5c372
+rtc-rx8025
+rtc-rx8581
+rtc-s35390a
+rtc-stk17ta8
+rtc-test
+rtc-twl4030
+rtc-v3020
+rtc-wm831x
+rtc-wm8350
+rtc-x1205
+rtd520
+rti800
+rti802
+rtl8150
+rtl8180
+rtl8187
+rtl8187se
+rxkad
+s1d13xxxfb
+s2255drv
+s2io
+s3fb
+s526
+s5h1409
+s5h1411
+s5h1420
+s626
+saa5246a
+saa5249
+saa6588
+saa6752hs
+saa7110
+saa7115
+saa7127
+saa7134
+saa7134-alsa
+saa7134-dvb
+saa7134-empress
+saa7146
+saa7146_vv
+saa7164
+saa717x
+saa7185
+safe_serial
+salsa20_generic
+salsa20-x86_64
+sata_inic162x
+sata_mv
+sata_nv
+sata_promise
+sata_qstor
+sata_sil
+sata_sil24
+sata_sis
+sata_svw
+sata_sx4
+sata_uli
+sata_via
+sata_vsc
+savage
+savagefb
+sb
+sb1000
+sbc60xxwdt
+sbc8360
+sbc_epx_c3
+sbc_fitpc2_wdt
+sbc_gxx
+sb_lib
+sbni
+sbp2
+sc1200wdt
+sc520cdp
+sc520_wdt
+sc92031
+scb2_flash
+sch311x_wdt
+sch_atm
+sch_cbq
+sch_drr
+sch_dsmark
+sch_gred
+sch_hfsc
+sch_htb
+sch_ingress
+sch_multiq
+sch_netem
+sch_prio
+sch_red
+sch_sfq
+sch_tbf
+sch_teql
+sco
+scsi_debug
+scsi_dh_alua
+scsi_dh_emc
+scsi_dh_hp_sw
+scsi_dh_rdac
+scsi_tgt
+scsi_transport_fc
+scsi_transport_iscsi
+scsi_transport_sas
+scsi_transport_srp
+scsi_wait_scan
+sctp
+sdhci
+sdhci-pci
+sdhci-pltfm
+sdio_uart
+sdricoh_cs
+se401
+sedlbauer_cs
+seed
+sep_driver
+seqiv
+ser_gigaset
+serial2002
+serial_cs
+serio_raw
+sermouse
+serpent
+serport
+serqt_usb2
+ses
+sfc
+sha1_generic
+sha256_generic
+sha512_generic
+shpchp
+sht15
+si21xx
+si4713-i2c
+sidewinder
+siemens_mpi
+sierra
+sir-dev
+sis
+sis190
+sis5595
+sis900
+sis-agp
+sisfb
+sisusbvga
+sit
+sja1000
+sja1000_platform
+skel
+skfp
+skge
+sky2
+sl811_cs
+sl811-hcd
+slicoss
+slip
+slram
+sm501
+sm501fb
+smbfs
+smc91c92_cs
+smsc37b787_wdt
+smsc47b397
+smsc47m1
+smsc47m192
+smsc9420
+smsc95xx
+smsc-ircc2
+smsdvb
+smsmdtv
+smssdio
+smsusb
+sn9c102
+snd
+snd-ac97-codec
+snd-ad1889
+snd-ak4114
+snd-ak4117
+snd-ak4xxx-adda
+snd-ali5451
+snd-als300
+snd-als4000
+snd-atiixp
+snd-atiixp-modem
+snd-au8810
+snd-au8820
+snd-au8830
+snd-aw2
+snd-azt3328
+snd-bt87x
+snd-ca0106
+snd-cmipci
+snd-cs4281
+snd-cs46xx
+snd-cs5530
+snd-cs5535audio
+snd-cs8427
+snd-ctxfi
+snd-darla20
+snd-darla24
+snd-dummy
+snd-echo3g
+snd-emu10k1
+snd-emu10k1-synth
+snd-emu10k1x
+snd-emux-synth
+snd-ens1370
+snd-ens1371
+snd-es1938
+snd-es1968
+snd-fm801
+snd-gina20
+snd-gina24
+snd-hda-codec
+snd-hda-codec-analog
+snd-hda-codec-atihdmi
+snd-hda-codec-ca0110
+snd-hda-codec-cirrus
+snd-hda-codec-cmedia
+snd-hda-codec-conexant
+snd-hda-codec-idt
+snd-hda-codec-intelhdmi
+snd-hda-codec-nvhdmi
+snd-hda-codec-realtek
+snd-hda-codec-si3054
+snd-hda-codec-via
+snd-hda-intel
+snd-hdsp
+snd-hdspm
+snd-hifier
+snd-hrtimer
+snd-hwdep
+snd-i2c
+snd-ice1712
+snd-ice1724
+snd-ice17xx-ak4xxx
+snd-indigo
+snd-indigodj
+snd-indigodjx
+snd-indigoio
+snd-indigoiox
+snd-intel8x0
+snd-intel8x0m
+snd-korg1212
+snd-layla20
+snd-layla24
+snd-lx6464es
+snd-maestro3
+snd-mia
+snd-mixart
+snd-mixer-oss
+snd-mona
+snd-mpu401
+snd-mpu401-uart
+snd-mtpav
+snd-mts64
+snd-nm256
+snd-opl3-lib
+snd-opl3-synth
+snd-oxygen
+snd-oxygen-lib
+snd-page-alloc
+snd-pcm
+snd-pcm-oss
+snd-pcsp
+snd-pcxhr
+snd-pdaudiocf
+snd-portman2x4
+snd-pt2258
+snd-rawmidi
+snd-riptide
+snd-rme32
+snd-rme96
+snd-rme9652
+snd-sb16-dsp
+snd-sb-common
+snd-seq
+snd-seq-device
+snd-seq-dummy
+snd-seq-midi
+snd-seq-midi-emul
+snd-seq-midi-event
+snd-seq-oss
+snd-seq-virmidi
+snd-serial-u16550
+snd-soc-ad1836
+snd-soc-ad1938
+snd-soc-ad73311
+snd-soc-ak4104
+snd-soc-ak4535
+snd-soc-ak4642
+snd-soc-core
+snd-soc-cs4270
+snd-soc-l3
+snd-soc-max9877
+snd-soc-pcm3008
+snd-soc-spdif
+snd-soc-ssm2602
+snd-soc-tlv320aic23
+snd-soc-tlv320aic26
+snd-soc-tlv320aic3x
+snd-soc-twl4030
+snd-soc-uda134x
+snd-soc-uda1380
+snd-soc-wm8350
+snd-soc-wm8400
+snd-soc-wm8510
+snd-soc-wm8523
+snd-soc-wm8580
+snd-soc-wm8728
+snd-soc-wm8731
+snd-soc-wm8750
+snd-soc-wm8753
+snd-soc-wm8776
+snd-soc-wm8900
+snd-soc-wm8903
+snd-soc-wm8940
+snd-soc-wm8960
+snd-soc-wm8961
+snd-soc-wm8971
+snd-soc-wm8974
+snd-soc-wm8988
+snd-soc-wm8990
+snd-soc-wm8993
+snd-soc-wm9081
+snd-soc-wm-hubs
+snd-sonicvibes
+snd-tea575x-tuner
+snd-timer
+snd-trident
+snd-usb-audio
+snd-usb-caiaq
+snd-usb-lib
+snd-usb-us122l
+snd-usb-usx2y
+snd-util-mem
+snd-via82xx
+snd-via82xx-modem
+snd-virmidi
+snd-virtuoso
+snd-vx222
+snd-vx-lib
+snd-vxpocket
+snd-ymfpci
+soc_camera
+soc_camera_platform
+softcursor
+softdog
+solos-pci
+sony-laptop
+sound
+soundcore
+sound_firmware
+sp8870
+sp887x
+spaceball
+spaceorb
+spcp8x5
+specialix
+spectrum_cs
+speedfax
+speedstep-lib
+speedtch
+spi_bitbang
+spi_butterfly
+spidev
+spi_gpio
+spi_lm70llp
+squashfs
+ssb
+sscape
+ssfdc
+sst25l
+sstfb
+ssv_dnp
+st
+stallion
+starfire
+stb0899
+stb6000
+stb6100
+stex
+stinger
+stir4200
+stkwebcam
+stowaway
+stp
+stradis
+strip
+stv0288
+stv0297
+stv0299
+stv0900
+stv090x
+stv6110
+stv6110x
+stv680
+sundance
+sungem
+sungem_phy
+sunhme
+suni
+sunkbd
+sunrpc
+svcrdma
+svgalib
+sx8
+sym53c500_cs
+symbolserial
+synaptics_i2c
+synclink
+synclink_cs
+synclink_gt
+synclinkmp
+syscopyarea
+sysfillrect
+sysimgblt
+sysv
+t1pci
+tcp_bic
+tcp_highspeed
+tcp_htcp
+tcp_hybla
+tcp_illinois
+tcp_lp
+tcp_probe
+tcp_scalable
+tcp_vegas
+tcp_veno
+tcp_westwood
+tcp_yeah
+tcrypt
+tda10021
+tda10023
+tda10048
+tda1004x
+tda10086
+tda18271
+tda7432
+tda8083
+tda8261
+tda826x
+tda827x
+tda8290
+tda9840
+tda9887
+tdfx
+tdfxfb
+tdo24m
+tea
+tea5761
+tea5767
+tea6415c
+tea6420
+tehuti
+tekram-sir
+teles_cs
+tg3
+tgr192
+thinkpad_acpi
+thmc50
+tifm_7xx1
+tifm_core
+tifm_ms
+tifm_sd
+tileblit
+timeriomem-rng
+tipc
+ti_usb_3410_5052
+tlan
+tlclk
+tle62x0
+tmdc
+tmiofb
+tmp401
+tmp421
+tms380tr
+tmscsim
+tmspci
+toim3232-sir
+topstar-laptop
+toshiba_acpi
+touchit213
+touchright
+touchwin
+tpm
+tpm_atmel
+tpm_bios
+tpm_infineon
+tpm_nsc
+tpm_tis
+tps65010
+tps65023-regulator
+tps6507x-regulator
+trancevibrator
+tranzport
+tridentfb
+trix
+ts5500_flash
+ts_bm
+tsc2007
+ts_fsm
+ts_kmp
+tsl2550
+tsl2561
+ttm
+ttpci-eeprom
+ttusb_dec
+ttusbdecfe
+tua6100
+tulip
+tuner
+tuner-simple
+tuner-types
+tuner-xc2028
+tunnel4
+tunnel6
+turbografx
+tvaudio
+tveeprom
+tvp5150
+tw9910
+twidjoy
+twl4030-gpio
+twl4030_keypad
+twl4030-pwrbutton
+twl4030-usb
+twl4030_wdt
+twofish
+twofish_common
+twofish-x86_64
+typhoon
+u132-hcd
+uart401
+uart6850
+ubi
+ubifs
+ucb1400_core
+ucb1400_ts
+udf
+udlfb
+ueagle-atm
+ufs
+uinput
+uio
+uio_aec
+uio_cif
+uio_pci_generic
+uio_pdrv
+uio_pdrv_genirq
+uio_sercos3
+uio_smx
+uli526x
+ultracam
+umc
+umem
+ums-alauda
+ums-cypress
+ums-datafab
+ums-freecom
+ums-isd200
+ums-jumpshot
+ums-karma
+ums-onetouch
+ums-sddr09
+ums-sddr55
+ums-usbat
+unioxx5
+upd64031a
+upd64083
+uPD98402
+usb8xxx
+usbatm
+usb_debug
+usbdux
+usbduxfast
+usb_gigaset
+usbhid
+usbip
+usbip_common_mod
+usblcd
+usbled
+usblp
+usbnet
+usbserial
+usbsevseg
+usb-storage
+usbtest
+usbtmc
+usbtouchscreen
+usbvideo
+usbvision
+userspace-consumer
+uss720
+uvcvideo
+uvesafb
+uwb
+v4l1-compat
+v4l2-common
+v4l2-compat-ioctl32
+v4l2-int-device
+vcan
+ves1820
+ves1x93
+vesafb
+veth
+vfat
+vga16fb
+vgastate
+vgg2432a4
+vhci-hcd
+via
+via686a
+via-agp
+viafb
+via-ircc
+via-rhine
+via-rng
+via-sdmmc
+via-velocity
+vicam
+video
+video1394
+videobuf-core
+videobuf-dma-sg
+videobuf-dvb
+videobuf-vmalloc
+videocodec
+videodev
+virtio_balloon
+virtio_console
+virtio-rng
+virtual
+visor
+vivi
+vlsi_ir
+vmac
+vme
+vme_ca91cx42
+vme_tsi148
+vme_user
+v_midi
+vmk80xx
+vmlfb
+vmw_pvscsi
+vmxnet3
+vp27smpx
+vpx3220
+vstusb
+vsxxxaa
+vt1211
+vt6656_stage
+vt8231
+vt8623fb
+vxge
+w1_bq27000
+w1_ds2431
+w1_ds2433
+w1_ds2760
+w1-gpio
+w1_smem
+w1_therm
+w6692
+w83627ehf
+w83627hf
+w83627hf_wdt
+w83697hf_wdt
+w83697ug_wdt
+w83781d
+w83791d
+w83792d
+w83793
+w83877f_wdt
+w83977af_ir
+w83977f_wdt
+w83l785ts
+w83l786ng
+w9966
+w9968cf
+wacom
+wacom_w8001
+wafer5823wdt
+walkera0701
+wanrouter
+wanxl
+warrior
+wavelan_cs
+wbsd
+wdt_pci
+whci
+whci-hcd
+whc-rc
+whiteheat
+wimax
+winbond-840
+winbond-cir
+wire
+wl1251
+wl1251_sdio
+wl1251_spi
+wl1271
+wl3501_cs
+wlp
+wm831x
+wm831x_bl
+wm831x-dcdc
+wm831x-gpio
+wm831x-hwmon
+wm831x-isink
+wm831x-ldo
+wm831x-on
+wm831x_power
+wm831x_wdt
+wm8350
+wm8350-hwmon
+wm8350-i2c
+wm8350_power
+wm8350-regulator
+wm8350_wdt
+wm8400-core
+wm8400-regulator
+wm8739
+wm8775
+wm97xx-ts
+wp512
+wpan-class
+wusb-cbaf
+wusbcore
+wusb-wa
+x25
+x25_asy
+x38_edac
+xc5000
+xcbc
+xen-blkfront
+xen-fbfront
+xenfs
+xen-kbdfront
+xen-netfront
+xfrm4_mode_beet
+xfrm4_mode_transport
+xfrm4_mode_tunnel
+xfrm4_tunnel
+xfrm6_mode_beet
+xfrm6_mode_ro
+xfrm6_mode_transport
+xfrm6_mode_tunnel
+xfrm6_tunnel
+xfrm_ipcomp
+xfrm_user
+xfs
+xhci
+xirc2ps_cs
+xircom_cb
+xor
+xpad
+xprtrdma
+x_tables
+xt_CLASSIFY
+xt_cluster
+xt_comment
+xt_connbytes
+xt_connlimit
+xt_connmark
+xt_CONNMARK
+xt_CONNSECMARK
+xt_conntrack
+xt_dccp
+xt_dscp
+xt_DSCP
+xt_esp
+xt_hashlimit
+xt_helper
+xt_hl
+xt_HL
+xt_iprange
+xtkbd
+xt_LED
+xt_length
+xt_limit
+xt_mac
+xt_mark
+xt_MARK
+xt_multiport
+xt_NFLOG
+xt_NFQUEUE
+xt_NOTRACK
+xt_osf
+xt_owner
+xt_physdev
+xt_pkttype
+xt_policy
+xt_quota
+xt_rateest
+xt_RATEEST
+xt_realm
+xt_recent
+xts
+xt_sctp
+xt_SECMARK
+xt_socket
+xt_state
+xt_statistic
+xt_string
+xt_tcpmss
+xt_TCPMSS
+xt_tcpudp
+xt_time
+xt_TPROXY
+xt_TRACE
+xt_u32
+xusbatm
+xvmalloc
+yam
+yealink
+yellowfin
+yenta_socket
+zatm
+zaurus
+zc0301
+zd1201
+zd1211rw
+zhenhua
+zl10036
+zl10039
+zl10353
+zlib
+zlib_deflate
+zr36016
+zr36050
+zr36060
+zr36067
+zr364xx
--- linux-mvl-dove-2.6.32.orig/debian.master/abi/2.6.32-34.73/amd64/generic.modules
+++ linux-mvl-dove-2.6.32/debian.master/abi/2.6.32-34.73/amd64/generic.modules
@@ -0,0 +1,2605 @@
+3c359
+3c574_cs
+3c589_cs
+3c59x
+3w-9xxx
+3w-xxxx
+6pack
+8021q
+8139cp
+8139too
+8255
+8390
+9p
+9pnet
+9pnet_rdma
+9pnet_virtio
+a100u2w
+a3d
+aacraid
+ab3100
+ab3100-core
+ab3100-otp
+abituguru
+abituguru3
+abyss
+ac97_bus
+acecad
+acenic
+acerhdf
+acer-wmi
+acl7225b
+acpi_pad
+acpiphp
+acpiphp_ibm
+acquirewdt
+act200l-sir
+act_gact
+act_ipt
+actisys-sir
+act_mirred
+act_nat
+act_pedit
+act_police
+act_simple
+act_skbedit
+ad1848
+ad7414
+ad7418
+ad7877
+ad7879
+adcxx
+addi_apci_035
+addi_apci_1032
+addi_apci_1500
+addi_apci_1516
+addi_apci_1564
+addi_apci_16xx
+addi_apci_2016
+addi_apci_2032
+addi_apci_2200
+addi_apci_3001
+addi_apci_3120
+addi_apci_3501
+addi_apci_3xxx
+adfs
+adi
+adl_pci6208
+adl_pci7296
+adl_pci7432
+adl_pci8164
+adl_pci9111
+adl_pci9118
+adm1021
+adm1025
+adm1026
+adm1029
+adm1031
+adm8211
+adm9240
+adp5588-keys
+adq12b
+ads7828
+ads7846
+adt7462
+adt7470
+adt7473
+adt7475
+adutux
+adv7170
+adv7175
+advansys
+advantechwdt
+adv_pci1710
+adv_pci1723
+adv_pci_dio
+aedsp16
+aes_generic
+aesni-intel
+aes-x86_64
+af_802154
+af9013
+affs
+af_key
+af-rxrpc
+ah4
+ah6
+ahci
+aic79xx
+aic7xxx
+aic94xx
+aio_aio12_8
+aio_iiro_16
+aiptek
+aircable
+airo
+airo_cs
+alauda
+ali-ircc
+alim1535_wdt
+alim7101_wdt
+alphatrack
+altpciechdma
+ambassador
+amd64_edac_mod
+amd76xrom
+amd8111e
+amd-rng
+amplc_dio200
+amplc_pc236
+amplc_pc263
+amplc_pci224
+amplc_pci230
+analog
+ansi_cprng
+anubis
+aoe
+appledisplay
+applesmc
+appletalk
+appletouch
+applicom
+ar7part
+ar9170usb
+arc4
+arcfb
+arcmsr
+arcnet
+arc-rawmode
+arc-rimi
+ark3116
+arkfb
+arptable_filter
+arp_tables
+arpt_mangle
+asb100
+asix
+asus_atk0110
+asus-laptop
+asus_oled
+async_memcpy
+async_pq
+async_raid6_recov
+async_tx
+async_xor
+at24
+at25
+at76c50x-usb
+aten
+ath
+ath5k
+ath9k
+ati_remote
+ati_remote2
+atl1
+atl1c
+atl1e
+atl2
+atlas_btns
+atm
+atmel
+atmel_cs
+atmel_pci
+atmtcp
+atp
+atp870u
+atxp1
+aty128fb
+atyfb
+au0828
+au8522
+aufs
+authenc
+auth_rpcgss
+autofs
+autofs4
+av5100
+avma1_cs
+avm_cs
+avmfritz
+ax25
+axnet_cs
+b1
+b1dma
+b1pci
+b1pcmcia
+b2c2-flexcop
+b2c2-flexcop-pci
+b2c2-flexcop-usb
+b3dfg
+b43
+b43legacy
+b44
+bas_gigaset
+baycom_par
+baycom_ser_fdx
+baycom_ser_hdx
+bcm203x
+bcm3510
+bcm5974
+be2iscsi
+be2net
+befs
+belkin_sa
+berry_charge
+bfa
+bfs
+bfusb
+binfmt_misc
+bitblit
+block2mtd
+blowfish
+bluecard_cs
+bluetooth
+bnep
+bnx2
+bnx2i
+bnx2x
+bonding
+bpa10x
+bpck
+bpqether
+bq24022
+bq27x00_battery
+br2684
+bridge
+broadsheetfb
+bsd_comp
+bt3c_cs
+bt819
+bt856
+bt866
+bt878
+btcx-risc
+btmrvl
+btmrvl_sdio
+btrfs
+btsdio
+bttv
+btuart_cs
+btusb
+budget
+budget-av
+budget-ci
+budget-core
+budget-patch
+BusLogic
+bw-qcam
+c2port-duramar2150
+c4
+c67x00
+c6xdigio
+cachefiles
+cafe_ccic
+cafe_nand
+camellia
+can
+can-bcm
+can-dev
+can-raw
+capi
+capidrv
+capifs
+capmode
+carminefb
+cassini
+cast5
+cast6
+catc
+cb710
+cb710-mmc
+cb_das16_cs
+cb_pcidas
+cb_pcidas64
+cb_pcidda
+cb_pcidio
+cb_pcimdas
+cb_pcimdda
+cciss
+ccm
+cdc-acm
+cdc_eem
+cdc_ether
+cdc-phonet
+cdc_subset
+cdc-wdm
+cfag12864b
+cfag12864bfb
+cfg80211
+cfi_cmdset_0001
+cfi_cmdset_0002
+cfi_cmdset_0020
+cfi_probe
+cfi_util
+ch
+ch341
+ch7006
+chipreg
+cifs
+cirrusfb
+ck804xrom
+clip
+cls_basic
+cls_flow
+cls_fw
+cls_route
+cls_rsvp
+cls_rsvp6
+cls_tcindex
+cls_u32
+cm109
+cm4000_cs
+cm4040_cs
+cmtp
+cnic
+cobra
+coda
+com20020
+com20020_cs
+com20020-pci
+com90io
+com90xx
+comedi
+comedi_bond
+comedi_fc
+comedi_parport
+comedi_test
+comm
+compal-laptop
+configfs
+contec_pci_dio
+core
+coretemp
+cp210x
+cpcihp_generic
+cpcihp_zt5550
+cpia
+cpia2
+cpia_pp
+cpia_usb
+cpqarray
+cpu5wdt
+cpuid
+c-qcam
+cramfs
+cr_bllcd
+crc32c
+crc32c-intel
+crc7
+crc-ccitt
+crc-itu-t
+crvml
+cryptd
+cryptoloop
+crypto_null
+cs5345
+cs53l32a
+ct82c710
+ctr
+cts
+cuse
+cx18
+cx22700
+cx22702
+cx231xx
+cx231xx-alsa
+cx231xx-dvb
+cx2341x
+cx23885
+cx24110
+cx24113
+cx24116
+cx24123
+cx25821
+cx25821-alsa
+cx25840
+cx8800
+cx8802
+cx88-alsa
+cx88-blackbird
+cx88-dvb
+cx88-vp3054-i2c
+cx88xx
+cxacru
+cxgb
+cxgb3
+cxgb3i
+cyber2000fb
+cyberjack
+cyclades
+cyclomx
+cycx_drv
+cypress_cy7c63
+cypress_m8
+cytherm
+da9030_battery
+da9034-ts
+da903x
+da903x_bl
+dabusb
+DAC960
+daqboard2000
+das08
+das08_cs
+das16
+das16m1
+das1800
+das6402
+das800
+db9
+dc395x
+dca
+dccp
+dccp_diag
+dccp_ipv4
+dccp_ipv6
+dccp_probe
+dcdbas
+de2104x
+de4x5
+de600
+de620
+decnet
+deflate
+defxx
+dell-laptop
+dell-led
+dell_rbu
+dell-wmi
+des_generic
+dib0070
+dib3000mb
+dib3000mc
+dib7000m
+dib7000p
+dib8000
+dibx000_common
+digi_acceleport
+diskonchip
+display
+divacapi
+divadidd
+diva_idi
+diva_mnt
+divas
+dlci
+dlm
+dm1105
+dm9601
+dm-crypt
+dme1737
+dmfe
+dmm32at
+dm-queue-length
+dm-raid45
+dm-service-time
+dmx3191d
+dm-zero
+dnet
+dn_rtmsg
+doc2000
+doc2001
+doc2001plus
+docecc
+docprobe
+dpt_i2o
+drm
+drm_kms_helper
+ds1621
+ds1682
+ds2482
+ds2490
+ds2760_battery
+ds2782_battery
+dsbr100
+dscc4
+dss1_divert
+dst
+dst_ca
+dstr
+dt2801
+dt2811
+dt2814
+dt2815
+dt2817
+dt282x
+dt3000
+dt9812
+dtl1_cs
+dummy
+dummy_hcd
+dv1394
+dvb-bt8xx
+dvb-core
+dvb-pll
+dvb-ttpci
+dvb-ttusb-budget
+dvb-usb
+dvb-usb-a800
+dvb-usb-af9005
+dvb-usb-af9005-remote
+dvb-usb-af9015
+dvb-usb-anysee
+dvb-usb-au6610
+dvb-usb-ce6230
+dvb-usb-cinergyT2
+dvb-usb-cxusb
+dvb-usb-dib0700
+dvb-usb-dibusb-common
+dvb-usb-dibusb-mb
+dvb-usb-dibusb-mc
+dvb-usb-digitv
+dvb-usb-dtt200u
+dvb-usb-dtv5100
+dvb-usb-dw2102
+dvb-usb-friio
+dvb-usb-gl861
+dvb-usb-gp8psk
+dvb-usb-m920x
+dvb-usb-nova-t-usb2
+dvb-usb-opera
+dvb-usb-ttusb2
+dvb-usb-umt-010
+dvb-usb-vp702x
+dvb-usb-vp7045
+e100
+e1000
+e1000e
+e752x_edac
+earth-pt1
+eata
+ebt_802_3
+ebtable_broute
+ebtable_filter
+ebtable_nat
+ebtables
+ebt_among
+ebt_arp
+ebt_arpreply
+ebt_dnat
+ebt_ip
+ebt_ip6
+ebt_limit
+ebt_log
+ebt_mark
+ebt_mark_m
+ebt_nflog
+ebt_pkttype
+ebt_redirect
+ebt_snat
+ebt_stp
+ebt_ulog
+ebt_vlan
+echo
+econet
+edac_core
+edac_mce_amd
+eeepc-laptop
+eeprom
+eeprom_93cx6
+eeti_ts
+efs
+elo
+elsa_cs
+em28xx
+em28xx-alsa
+em28xx-dvb
+em_cmp
+emi26
+emi62
+em_meta
+em_nbyte
+empeg
+ems_pci
+ems_usb
+em_text
+emu10k1-gp
+em_u32
+enclosure
+eni
+enic
+epat
+epca
+epia
+epic100
+eql
+esb2rom
+esi-sir
+esp4
+esp6
+et131x
+et61x251
+eth1394
+ethoc
+eurotechwdt
+evbug
+evtchn
+exofs
+exportfs
+f71805f
+f71882fg
+f75375s
+fakephp
+farsync
+fat
+faulty
+fbcon
+fb_ddc
+fb_sys_fops
+fcoe
+fcrypt
+fdomain
+fdomain_cs
+fealnx
+ff-memless
+firedtv
+firestream
+firewire-core
+firewire-net
+firewire-ohci
+firewire-sbp2
+fit2
+fit3
+fl512
+floppy
+fm801-gp
+fmvj18x_cs
+fnic
+font
+forcedeth
+fore_200e
+fpu
+freevxfs
+friq
+frpw
+fsam7400
+fscache
+fschmd
+ftdi-elan
+ftdi_sio
+ftl
+fujitsu-laptop
+fujitsu_ts
+funsoft
+g450_pll
+g760a
+gadgetfs
+gamecon
+gameport
+garmin_gps
+garp
+g_audio
+g_cdc
+gcm
+gdth
+generic
+generic_bl
+gen_probe
+g_ether
+gf128mul
+gf2k
+g_file_storage
+gfs2
+ghash-clmulni-intel
+ghash-generic
+gigaset
+girbil-sir
+gl518sm
+gl520sm
+gl620a
+gluebi
+g_midi
+gpio-addr-flash
+gpio_keys
+gpio_mouse
+gpio_vbus
+g_printer
+grip
+grip_mp
+gsc_hpdi
+g_serial
+gspca_conex
+gspca_etoms
+gspca_finepix
+gspca_gl860
+gspca_jeilinj
+gspca_m5602
+gspca_main
+gspca_mars
+gspca_mr97310a
+gspca_ov519
+gspca_ov534
+gspca_pac207
+gspca_pac7311
+gspca_sn9c20x
+gspca_sonixb
+gspca_sonixj
+gspca_spca500
+gspca_spca501
+gspca_spca505
+gspca_spca506
+gspca_spca508
+gspca_spca561
+gspca_sq905
+gspca_sq905c
+gspca_stk014
+gspca_stv06xx
+gspca_sunplus
+gspca_t613
+gspca_tv8532
+gspca_vc032x
+gspca_zc3xx
+gtco
+guillemot
+gunze
+gx1fb
+gxfb
+g_zero
+hamachi
+hangcheck-timer
+hci_uart
+hci_vhci
+hdaps
+hdlc
+hdlc_cisco
+hdlcdrv
+hdlc_fr
+hdlc_ppp
+hdlc_raw
+hdlc_raw_eth
+hdlc_x25
+hdpvr
+he
+hecubafb
+hexium_gemini
+hexium_orion
+hfc4s8s_l1
+hfcmulti
+hfcpci
+hfcsusb
+hfc_usb
+hfs
+hfsplus
+hgafb
+hid
+hid-3m-pct
+hid-a4tech
+hid-apple
+hid-belkin
+hid-cherry
+hid-chicony
+hid-cypress
+hid-drff
+hid-ezkey
+hid-gaff
+hid-gyration
+hid-kensington
+hid-kye
+hid-logitech
+hid-microsoft
+hid-monterey
+hid-mosart
+hid-ntrig
+hid-ortek
+hidp
+hid-petalynx
+hid-pl
+hid-quanta
+hid-samsung
+hid-sjoy
+hid-sony
+hid-stantum
+hid-sunplus
+hid-tmff
+hid-topseed
+hid-twinhan
+hid-wacom
+hid-zpff
+hifn_795x
+hisax
+hisax_fcpcipnp
+hisax_isac
+hisax_st5481
+horizon
+hostap
+hostap_cs
+hostap_pci
+hostap_plx
+hp100
+hp4x
+hp_accel
+hpfs
+hpilo
+hptiop
+hp-wmi
+hso
+htc-pasic3
+hv_blkvsc
+hv_netvsc
+hv_storvsc
+hv_vmbus
+hwa-hc
+hwa-rc
+hwmon-vid
+hysdn
+i1480-dfu-usb
+i1480-est
+i1480u-wlp
+i2400m
+i2400m-sdio
+i2400m-usb
+i2c-algo-bit
+i2c-algo-pca
+i2c-algo-pcf
+i2c-ali1535
+i2c-ali1563
+i2c-ali15x3
+i2c-amd756
+i2c-amd756-s4882
+i2c-amd8111
+i2c-dev
+i2c-gpio
+i2c-i801
+i2c-isch
+i2c-matroxfb
+i2c-nforce2
+i2c-nforce2-s4985
+i2c-ocores
+i2c-parport
+i2c-parport-light
+i2c-pca-platform
+i2c-piix4
+i2c-scmi
+i2c-simtec
+i2c-sis5595
+i2c-sis630
+i2c-sis96x
+i2c-stub
+i2c-taos-evm
+i2c-tiny-usb
+i2c-via
+i2c-viapro
+i2c-voodoo3
+i2o_block
+i2o_bus
+i2o_config
+i2o_core
+i2o_proc
+i2o_scsi
+i3000_edac
+i3200_edac
+i5000_edac
+i5100_edac
+i5400_edac
+i5k_amb
+i6300esb
+i7300_idle
+i810
+i82092
+i82975x_edac
+i830
+i8k
+i915
+ib700wdt
+ib_addr
+ib_cm
+ib_core
+ib_ipath
+ib_ipoib
+ib_iser
+ib_mad
+ibmaem
+ibmasm
+ibmasr
+ibmcam
+ibmpex
+ib_mthca
+ibmtr_cs
+ib_sa
+ib_srp
+ib_ucm
+ib_umad
+ib_uverbs
+ichxrom
+icp_multi
+ics932s401
+idmouse
+idt77252
+ieee1394
+ifb
+iforce
+igb
+igbvf
+ii_pci20kc
+ili9320
+imm
+industrialio
+inexio
+inftl
+initio
+input-polldev
+int51x1
+intel-agp
+intel_menlow
+intel-rng
+intel_vr_nor
+interact
+ioatdma
+ioc4
+io_edgeport
+io_ti
+iowarrior
+ip2
+ip6_queue
+ip6table_filter
+ip6table_mangle
+ip6table_raw
+ip6_tables
+ip6table_security
+ip6t_ah
+ip6t_eui64
+ip6t_frag
+ip6t_hbh
+ip6t_ipv6header
+ip6t_LOG
+ip6t_mh
+ip6t_REJECT
+ip6t_rt
+ip6_tunnel
+ipaq
+ipcomp
+ipcomp6
+ipddp
+ipg
+ip_gre
+iphase
+ipip
+ipmi_devintf
+ipmi_msghandler
+ipmi_poweroff
+ipmi_si
+ipmi_watchdog
+ip_queue
+ipr
+ips
+iptable_filter
+iptable_mangle
+iptable_nat
+iptable_raw
+ip_tables
+iptable_security
+ipt_addrtype
+ipt_ah
+ipt_CLUSTERIP
+ipt_ecn
+ipt_ECN
+ipt_LOG
+ipt_MASQUERADE
+ipt_NETMAP
+ipt_REDIRECT
+ipt_REJECT
+ipt_ULOG
+ip_vs
+ip_vs_dh
+ip_vs_ftp
+ip_vs_lblc
+ip_vs_lblcr
+ip_vs_lc
+ip_vs_nq
+ip_vs_rr
+ip_vs_sed
+ip_vs_sh
+ip_vs_wlc
+ip_vs_wrr
+ipw
+ipw2100
+ipw2200
+ipwireless
+ipx
+ircomm
+ir-common
+ircomm-tty
+irda
+irda-usb
+ir-kbd-i2c
+irlan
+irnet
+irtty-sir
+ir-usb
+iscsi_ibft
+iscsi_tcp
+iscsi_trgt
+isdn
+isdn_bsdcomp
+isdnhdlc
+isight_firmware
+isl29003
+isl6405
+isl6421
+isl6423
+isofs
+isp116x-hcd
+isp1362-hcd
+isp1760
+istallion
+it87
+it8712f_wdt
+it87_wdt
+iTCO_vendor_support
+iTCO_wdt
+itd1000
+iuu_phoenix
+ivtv
+ivtvfb
+iw_c2
+iw_cm
+iw_cxgb3
+iwl3945
+iwlagn
+iwlcore
+iwmc3200wifi
+ixgb
+ixgbe
+ixj
+ixj_pcmcia
+jedec_probe
+jffs2
+jfs
+jmb38x_ms
+jme
+joydev
+joydump
+jr3_pci
+jsm
+k8temp
+kafs
+kahlua
+kaweth
+kb3886_bl
+kbic
+kbtab
+kcomedilib
+ke_counter
+kernelcapi
+keyspan
+keyspan_pda
+keyspan_remote
+khazad
+kingsun-sir
+kl5kusb105
+kobil_sct
+konicawc
+ks0108
+ks0127
+ks8842
+ks8851
+ks8851_mll
+ks959-sir
+ksdazzle-sir
+ktti
+kvaser_pci
+kvm
+kvm-amd
+kvm-intel
+kxsd9
+kyrofb
+l1oip
+l2cap
+l440gx
+l64781
+lanai
+lapb
+lapbether
+lcd
+ldusb
+lec
+led-class
+leds-alix2
+leds-bd2802
+leds-da903x
+leds-dac124s085
+leds-gpio
+leds-lp3944
+leds-pca9532
+leds-pca955x
+leds-wm831x-status
+leds-wm8350
+ledtrig-backlight
+ledtrig-default-on
+ledtrig-gpio
+ledtrig-heartbeat
+ledtrig-timer
+legousbtower
+lgdt3305
+lgdt330x
+lgs8gxx
+lib80211
+lib80211_crypt_ccmp
+lib80211_crypt_tkip
+lib80211_crypt_wep
+libcrc32c
+libertas
+libertas_cs
+libertas_sdio
+libertas_spi
+libertas_tf
+libertas_tf_usb
+libfc
+libfcoe
+libipw
+libiscsi
+libiscsi_tcp
+libosd
+libsas
+libsrp
+lightning
+line6usb
+linear
+lirc_atiusb
+lirc_bt829
+lirc_dev
+lirc_ene0100
+lirc_i2c
+lirc_igorplugusb
+lirc_imon
+lirc_it87
+lirc_ite8709
+lirc_mceusb
+lirc_sasem
+lirc_serial
+lirc_sir
+lirc_streamzap
+lirc_ttusbir
+lis3l02dq
+lis3lv02d
+litelink-sir
+lkkbd
+llc2
+lm63
+lm70
+lm75
+lm77
+lm78
+lm80
+lm83
+lm8323
+lm85
+lm87
+lm90
+lm92
+lm93
+lm95241
+lmc
+lms283gf05
+lnbp21
+lockd
+lp
+lp3971
+lpddr_cmds
+lpfc
+lrw
+ltc4215
+ltc4245
+ltv350qv
+lxfb
+lzo
+lzo_compress
+lzo_decompress
+m25p80
+m52790
+ma600-sir
+mac80211
+mac80211_hwsim
+machzwd
+macmodes
+macvlan
+magellan
+map_absent
+map_funcs
+map_ram
+map_rom
+matrix_keypad
+matroxfb_accel
+matroxfb_base
+matroxfb_crtc2
+matroxfb_DAC1064
+matroxfb_g450
+matroxfb_maven
+matroxfb_misc
+matroxfb_Ti3026
+matrox_w1
+max1111
+max1363
+max1586
+max1619
+max17040_battery
+max3100
+max6650
+max6875
+max7301
+max732x
+max7359_keypad
+mb862xxfb
+mbp_nvidia_bl
+mc13783
+mc13783-core
+mc33880
+mc44s803
+mce-inject
+mce-xeon75xx
+mcp2120-sir
+mcp23s08
+mcs5000_ts
+mcs7780
+mcs7830
+mct_u232
+md4
+mdc800
+mdio
+me4000
+me_daq
+megaraid
+megaraid_mbox
+megaraid_mm
+megaraid_sas
+memstick
+metronomefb
+meye
+mfd-core
+mga
+michael_mic
+microcode
+microtek
+mii
+minix
+mISDN_core
+mISDN_dsp
+mISDNinfineon
+mISDNipac
+mISDNisar
+mite
+mk712
+mkiss
+mlx4_core
+mlx4_en
+mlx4_ib
+mmc_block
+mmc_spi
+mos7720
+mos7840
+moto_modem
+moxa
+mpc624
+mpoa
+mpt2sas
+mptbase
+mptctl
+mptfc
+mptlan
+mptsas
+mptscsih
+mptspi
+mpu401
+msdos
+msi-laptop
+msp3400
+mspro_block
+msr
+mt2060
+mt20xx
+mt2131
+mt2266
+mt312
+mt352
+mt9m001
+mt9m111
+mt9t031
+mt9v011
+mt9v022
+mtd
+mtd_blkdevs
+mtdblock
+mtdblock_ro
+mtdchar
+mtdconcat
+mtd_dataflash
+mtd_oobtest
+mtdoops
+mtd_pagetest
+mtdram
+mtd_readtest
+mtd_speedtest
+mtd_stresstest
+mtd_subpagetest
+mtd_torturetest
+mtouch
+multipath
+multiq3
+mvsas
+mwave
+mwl8k
+mxb
+mxl5005s
+mxl5007t
+mxser
+myri10ge
+n411
+nand
+nand_ecc
+nand_ids
+nandsim
+natsemi
+navman
+nbd
+ncpfs
+ndiswrapper
+ne2k-pci
+neofb
+net1080
+netconsole
+netjet
+netrom
+netsc520
+nettel
+netwave_cs
+netxen_nic
+newtonkbd
+nf_conntrack
+nf_conntrack_amanda
+nf_conntrack_ftp
+nf_conntrack_h323
+nf_conntrack_ipv4
+nf_conntrack_ipv6
+nf_conntrack_irc
+nf_conntrack_netbios_ns
+nf_conntrack_netlink
+nf_conntrack_pptp
+nf_conntrack_proto_dccp
+nf_conntrack_proto_gre
+nf_conntrack_proto_sctp
+nf_conntrack_proto_udplite
+nf_conntrack_sane
+nf_conntrack_sip
+nf_conntrack_tftp
+nf_defrag_ipv4
+nf_nat
+nf_nat_amanda
+nf_nat_ftp
+nf_nat_h323
+nf_nat_irc
+nf_nat_pptp
+nf_nat_proto_dccp
+nf_nat_proto_gre
+nf_nat_proto_sctp
+nf_nat_proto_udplite
+nf_nat_sip
+nf_nat_snmp_basic
+nf_nat_tftp
+nfnetlink
+nfnetlink_log
+nfnetlink_queue
+nfs
+nfs_acl
+nfsd
+nftl
+nf_tproxy_core
+n_hdlc
+ni_6527
+ni_65xx
+ni_660x
+ni_670x
+ni_at_a2150
+ni_at_ao
+ni_atmio
+ni_atmio16d
+ni_daq_700
+ni_daq_dio24
+ni_labpc
+ni_labpc_cs
+nilfs2
+ni_mio_cs
+ni_pcidio
+ni_pcimio
+ni_tio
+ni_tiocmd
+niu
+nl802154
+nls_ascii
+nls_cp1250
+nls_cp1251
+nls_cp1255
+nls_cp437
+nls_cp737
+nls_cp775
+nls_cp850
+nls_cp852
+nls_cp855
+nls_cp857
+nls_cp860
+nls_cp861
+nls_cp862
+nls_cp863
+nls_cp864
+nls_cp865
+nls_cp866
+nls_cp869
+nls_cp874
+nls_cp932
+nls_cp936
+nls_cp949
+nls_cp950
+nls_euc-jp
+nls_iso8859-1
+nls_iso8859-13
+nls_iso8859-14
+nls_iso8859-15
+nls_iso8859-2
+nls_iso8859-3
+nls_iso8859-4
+nls_iso8859-5
+nls_iso8859-6
+nls_iso8859-7
+nls_iso8859-9
+nls_koi8-r
+nls_koi8-ru
+nls_koi8-u
+nls_utf8
+nmclan_cs
+nop-usb-xceiv
+nouveau
+nozomi
+n_r3964
+ns558
+ns83820
+nsc_gpio
+nsc-ircc
+nst
+ntfs
+nvidiafb
+nvram
+nxt200x
+nxt6000
+ocfs2
+ocfs2_dlm
+ocfs2_dlmfs
+ocfs2_nodemanager
+ocfs2_stackglue
+ocfs2_stack_o2cb
+ocfs2_stack_user
+ohci1394
+old_belkin-sir
+olympic
+omfs
+omnibook
+omninet
+on20
+on26
+onenand
+onenand_sim
+opencores-kbd
+opl3
+oprofile
+opticon
+option
+or51132
+or51211
+orinoco
+orinoco_cs
+orinoco_nortel
+orinoco_pci
+orinoco_plx
+orinoco_tmd
+osd
+osdblk
+osst
+oti6858
+output
+ov7670
+ov772x
+ovcamchip
+oxu210hp-hcd
+p4-clockmod
+p54common
+p54pci
+p54spi
+p54usb
+p8023
+p9auth
+padlock-aes
+padlock-sha
+panasonic-laptop
+panel
+paride
+parkbd
+parport
+parport_ax88796
+parport_cs
+parport_pc
+parport_serial
+pas2
+pata_ali
+pata_amd
+pata_artop
+pata_atiixp
+pata_atp867x
+pata_cmd640
+pata_cmd64x
+pata_cs5520
+pata_cs5530
+pata_cypress
+pata_efar
+pata_hpt366
+pata_hpt37x
+pata_hpt3x2n
+pata_hpt3x3
+pata_it8213
+pata_it821x
+pata_jmicron
+pata_marvell
+pata_mpiix
+pata_netcell
+pata_ninja32
+pata_ns87410
+pata_ns87415
+pata_oldpiix
+pata_opti
+pata_optidma
+pata_pcmcia
+pata_pdc2027x
+pata_pdc202xx_old
+pata_radisys
+pata_rdc
+pata_rz1000
+pata_sc1200
+pata_sch
+pata_serverworks
+pata_sil680
+pata_sl82c105
+pata_triflex
+pata_via
+pbe5
+pc87360
+pc8736x_gpio
+pc87413_wdt
+pc87427
+pca953x
+pcbc
+pcd
+pcf50633-adc
+pcf50633-charger
+pcf50633-core
+pcf50633-gpio
+pcf50633-input
+pcf50633-regulator
+pcf857x
+pcf8591
+pci
+pci200syn
+pcilynx
+pcips2
+pci-stub
+pcl711
+pcl724
+pcl725
+pcl726
+pcl730
+pcl812
+pcl816
+pcl818
+pcm3724
+pcm3730
+pcmad
+pcmcia
+pcmcia_core
+pcm_common
+pcmda12
+pcmmio
+pcmuio
+pcnet32
+pcnet_cs
+pcspkr
+pcwd_pci
+pcwd_usb
+pd
+pd6729
+pda_power
+pegasus
+penmount
+pf
+pg
+phantom
+phison
+phonedev
+phonet
+phram
+physmap
+pktgen
+pl2303
+platform_lcd
+plat_nand
+plat-ram
+plip
+plusb
+pluto2
+pm2fb
+pm3fb
+pmc551
+pmcraid
+pn_pep
+poc
+poch
+pohmelfs
+powermate
+power_meter
+ppa
+ppdev
+ppp_async
+ppp_deflate
+ppp_mppe
+pppoatm
+pppoe
+pppol2tp
+pppox
+ppp_synctty
+pps_core
+prism2_usb
+prism54
+progear_bl
+psmouse
+pss
+pt
+pvrusb2
+pwc
+qcserial
+qinfo_probe
+qla1280
+qla2xxx
+qla3xxx
+qla4xxx
+qlge
+qlogic_cs
+qlogicfas408
+qnx4
+qt1010
+quatech_daqp_cs
+quatech_usb2
+quickcam_messenger
+quota_tree
+quota_v1
+quota_v2
+r128
+r8169
+r8192_pci
+r8192se_pci
+r8192s_usb
+r8a66597-hcd
+radeon
+radeonfb
+radio-gemtek-pci
+radio-i2c-si470x
+radio-maestro
+radio-maxiradio
+radio-mr800
+radio-si4713
+radio-tea5764
+radio-usb-si470x
+raid0
+raid1
+raid10
+raid456
+raid6_pq
+raid6test
+raid_class
+ramzswap
+rar_driver
+raw
+raw1394
+ray_cs
+rdma_cm
+rdma_ucm
+rds
+rds_rdma
+rds_tcp
+redboot
+reed_solomon
+reiserfs
+rfc1051
+rfc1201
+rfcomm
+rfd_ftl
+ricoh_mmc
+rio500
+riscom8
+rivafb
+rmd128
+rmd160
+rmd256
+rmd320
+rndis_host
+rndis_wlan
+rocket
+romfs
+rose
+rotary_encoder
+rpcsec_gss_krb5
+rpcsec_gss_spkm3
+rrunner
+rsrc_nonstatic
+rt2400pci
+rt2500pci
+rt2500usb
+rt2800usb
+rt2860sta
+rt2870sta
+rt2x00lib
+rt2x00pci
+rt2x00usb
+rt3090sta
+rt61pci
+rt73usb
+rtc-ab3100
+rtc-bq4802
+rtc-ds1286
+rtc-ds1305
+rtc-ds1307
+rtc-ds1374
+rtc-ds1390
+rtc-ds1511
+rtc-ds1553
+rtc-ds1672
+rtc-ds1742
+rtc-ds3234
+rtc-fm3130
+rtc-isl1208
+rtc-m41t80
+rtc-m41t94
+rtc-m48t35
+rtc-m48t59
+rtc-m48t86
+rtc-max6900
+rtc-max6902
+rtc-pcf2123
+rtc-pcf50633
+rtc-pcf8563
+rtc-pcf8583
+rtc-r9701
+rtc-rs5c348
+rtc-rs5c372
+rtc-rx8025
+rtc-rx8581
+rtc-s35390a
+rtc-stk17ta8
+rtc-test
+rtc-twl4030
+rtc-v3020
+rtc-wm831x
+rtc-wm8350
+rtc-x1205
+rtd520
+rti800
+rti802
+rtl8150
+rtl8180
+rtl8187
+rtl8187se
+rxkad
+s1d13xxxfb
+s2255drv
+s2io
+s3fb
+s526
+s5h1409
+s5h1411
+s5h1420
+s626
+saa5246a
+saa5249
+saa6588
+saa6752hs
+saa7110
+saa7115
+saa7127
+saa7134
+saa7134-alsa
+saa7134-dvb
+saa7134-empress
+saa7146
+saa7146_vv
+saa7164
+saa717x
+saa7185
+safe_serial
+salsa20_generic
+salsa20-x86_64
+sata_inic162x
+sata_mv
+sata_nv
+sata_promise
+sata_qstor
+sata_sil
+sata_sil24
+sata_sis
+sata_svw
+sata_sx4
+sata_uli
+sata_via
+sata_vsc
+savage
+savagefb
+sb
+sb1000
+sbc60xxwdt
+sbc8360
+sbc_epx_c3
+sbc_fitpc2_wdt
+sbc_gxx
+sb_lib
+sbni
+sbp2
+sc1200wdt
+sc520cdp
+sc520_wdt
+sc92031
+scb2_flash
+sch311x_wdt
+sch_atm
+sch_cbq
+sch_drr
+sch_dsmark
+sch_gred
+sch_hfsc
+sch_htb
+sch_ingress
+sch_multiq
+sch_netem
+sch_prio
+sch_red
+sch_sfq
+sch_tbf
+sch_teql
+sco
+scsi_debug
+scsi_dh_alua
+scsi_dh_emc
+scsi_dh_hp_sw
+scsi_dh_rdac
+scsi_tgt
+scsi_transport_fc
+scsi_transport_iscsi
+scsi_transport_sas
+scsi_transport_spi
+scsi_transport_srp
+scsi_wait_scan
+sctp
+sdhci
+sdhci-pci
+sdhci-pltfm
+sdio_uart
+sdricoh_cs
+se401
+sedlbauer_cs
+seed
+sep_driver
+seqiv
+ser_gigaset
+serial2002
+serial_cs
+serio_raw
+sermouse
+serpent
+serport
+serqt_usb2
+ses
+sfc
+sha1_generic
+sha256_generic
+sha512_generic
+shpchp
+sht15
+si21xx
+si4713-i2c
+sidewinder
+siemens_mpi
+sierra
+sir-dev
+sis
+sis190
+sis5595
+sis900
+sis-agp
+sisfb
+sisusbvga
+sit
+sja1000
+sja1000_platform
+skel
+skfp
+skge
+sky2
+sl811_cs
+sl811-hcd
+slicoss
+slip
+slram
+sm501
+sm501fb
+smbfs
+smc91c92_cs
+smsc37b787_wdt
+smsc47b397
+smsc47m1
+smsc47m192
+smsc9420
+smsc95xx
+smsc-ircc2
+smsdvb
+smsmdtv
+smssdio
+smsusb
+sn9c102
+snd
+snd-ac97-codec
+snd-ad1889
+snd-ak4114
+snd-ak4117
+snd-ak4xxx-adda
+snd-ali5451
+snd-als300
+snd-als4000
+snd-atiixp
+snd-atiixp-modem
+snd-au8810
+snd-au8820
+snd-au8830
+snd-aw2
+snd-azt3328
+snd-bt87x
+snd-ca0106
+snd-cmipci
+snd-cs4281
+snd-cs46xx
+snd-cs5530
+snd-cs5535audio
+snd-cs8427
+snd-ctxfi
+snd-darla20
+snd-darla24
+snd-dummy
+snd-echo3g
+snd-emu10k1
+snd-emu10k1-synth
+snd-emu10k1x
+snd-emux-synth
+snd-ens1370
+snd-ens1371
+snd-es1938
+snd-es1968
+snd-fm801
+snd-gina20
+snd-gina24
+snd-hda-codec
+snd-hda-codec-analog
+snd-hda-codec-atihdmi
+snd-hda-codec-ca0110
+snd-hda-codec-cirrus
+snd-hda-codec-cmedia
+snd-hda-codec-conexant
+snd-hda-codec-idt
+snd-hda-codec-intelhdmi
+snd-hda-codec-nvhdmi
+snd-hda-codec-realtek
+snd-hda-codec-si3054
+snd-hda-codec-via
+snd-hda-intel
+snd-hdsp
+snd-hdspm
+snd-hifier
+snd-hrtimer
+snd-hwdep
+snd-i2c
+snd-ice1712
+snd-ice1724
+snd-ice17xx-ak4xxx
+snd-indigo
+snd-indigodj
+snd-indigodjx
+snd-indigoio
+snd-indigoiox
+snd-intel8x0
+snd-intel8x0m
+snd-korg1212
+snd-layla20
+snd-layla24
+snd-lx6464es
+snd-maestro3
+snd-mia
+snd-mixart
+snd-mixer-oss
+snd-mona
+snd-mpu401
+snd-mpu401-uart
+snd-mtpav
+snd-mts64
+snd-nm256
+snd-opl3-lib
+snd-opl3-synth
+snd-oxygen
+snd-oxygen-lib
+snd-page-alloc
+snd-pcm
+snd-pcm-oss
+snd-pcsp
+snd-pcxhr
+snd-pdaudiocf
+snd-portman2x4
+snd-pt2258
+snd-rawmidi
+snd-riptide
+snd-rme32
+snd-rme96
+snd-rme9652
+snd-sb16-dsp
+snd-sb-common
+snd-seq
+snd-seq-device
+snd-seq-dummy
+snd-seq-midi
+snd-seq-midi-emul
+snd-seq-midi-event
+snd-seq-oss
+snd-seq-virmidi
+snd-serial-u16550
+snd-soc-ad1836
+snd-soc-ad1938
+snd-soc-ad73311
+snd-soc-ak4104
+snd-soc-ak4535
+snd-soc-ak4642
+snd-soc-core
+snd-soc-cs4270
+snd-soc-l3
+snd-soc-max9877
+snd-soc-pcm3008
+snd-soc-spdif
+snd-soc-ssm2602
+snd-soc-tlv320aic23
+snd-soc-tlv320aic26
+snd-soc-tlv320aic3x
+snd-soc-twl4030
+snd-soc-uda134x
+snd-soc-uda1380
+snd-soc-wm8350
+snd-soc-wm8400
+snd-soc-wm8510
+snd-soc-wm8523
+snd-soc-wm8580
+snd-soc-wm8728
+snd-soc-wm8731
+snd-soc-wm8750
+snd-soc-wm8753
+snd-soc-wm8776
+snd-soc-wm8900
+snd-soc-wm8903
+snd-soc-wm8940
+snd-soc-wm8960
+snd-soc-wm8961
+snd-soc-wm8971
+snd-soc-wm8974
+snd-soc-wm8988
+snd-soc-wm8990
+snd-soc-wm8993
+snd-soc-wm9081
+snd-soc-wm-hubs
+snd-sonicvibes
+snd-tea575x-tuner
+snd-timer
+snd-trident
+snd-usb-audio
+snd-usb-caiaq
+snd-usb-lib
+snd-usb-us122l
+snd-usb-usx2y
+snd-util-mem
+snd-via82xx
+snd-via82xx-modem
+snd-virmidi
+snd-virtuoso
+snd-vx222
+snd-vx-lib
+snd-vxpocket
+snd-ymfpci
+soc_camera
+soc_camera_platform
+softcursor
+softdog
+solos-pci
+sony-laptop
+sound
+soundcore
+sound_firmware
+sp8870
+sp887x
+spaceball
+spaceorb
+spcp8x5
+specialix
+spectrum_cs
+speedfax
+speedstep-lib
+speedtch
+spi_bitbang
+spi_butterfly
+spidev
+spi_gpio
+spi_lm70llp
+squashfs
+ssb
+sscape
+ssfdc
+sst25l
+sstfb
+ssv_dnp
+st
+stallion
+starfire
+stb0899
+stb6000
+stb6100
+stex
+stinger
+stir4200
+stkwebcam
+stowaway
+stp
+stradis
+strip
+stv0288
+stv0297
+stv0299
+stv0900
+stv090x
+stv6110
+stv6110x
+stv680
+sundance
+sungem
+sungem_phy
+sunhme
+suni
+sunkbd
+sunrpc
+svcrdma
+svgalib
+sx8
+sym53c500_cs
+sym53c8xx
+symbolserial
+synaptics_i2c
+synclink
+synclink_cs
+synclink_gt
+synclinkmp
+syscopyarea
+sysfillrect
+sysimgblt
+sysv
+t1pci
+tcp_bic
+tcp_highspeed
+tcp_htcp
+tcp_hybla
+tcp_illinois
+tcp_lp
+tcp_probe
+tcp_scalable
+tcp_vegas
+tcp_veno
+tcp_westwood
+tcp_yeah
+tcrypt
+tda10021
+tda10023
+tda10048
+tda1004x
+tda10086
+tda18271
+tda7432
+tda8083
+tda8261
+tda826x
+tda827x
+tda8290
+tda9840
+tda9887
+tdfx
+tdfxfb
+tdo24m
+tea
+tea5761
+tea5767
+tea6415c
+tea6420
+tehuti
+tekram-sir
+teles_cs
+tg3
+tgr192
+thinkpad_acpi
+thmc50
+tifm_7xx1
+tifm_core
+tifm_ms
+tifm_sd
+tileblit
+timeriomem-rng
+tipc
+ti_usb_3410_5052
+tlan
+tlclk
+tle62x0
+tmdc
+tmiofb
+tmp401
+tmp421
+tms380tr
+tmscsim
+tmspci
+toim3232-sir
+topstar-laptop
+toshiba_acpi
+touchit213
+touchright
+touchwin
+tpm
+tpm_atmel
+tpm_bios
+tpm_infineon
+tpm_nsc
+tpm_tis
+tps65010
+tps65023-regulator
+tps6507x-regulator
+trancevibrator
+tranzport
+tridentfb
+trix
+ts5500_flash
+ts_bm
+tsc2007
+ts_fsm
+ts_kmp
+tsl2550
+tsl2561
+ttm
+ttpci-eeprom
+ttusb_dec
+ttusbdecfe
+tua6100
+tulip
+tuner
+tuner-simple
+tuner-types
+tuner-xc2028
+tunnel4
+tunnel6
+turbografx
+tvaudio
+tveeprom
+tvp5150
+tw9910
+twidjoy
+twl4030-gpio
+twl4030_keypad
+twl4030-pwrbutton
+twl4030-usb
+twl4030_wdt
+twofish
+twofish_common
+twofish-x86_64
+typhoon
+u132-hcd
+uart401
+uart6850
+ubi
+ubifs
+ucb1400_core
+ucb1400_ts
+udf
+udlfb
+ueagle-atm
+ufs
+uinput
+uio
+uio_aec
+uio_cif
+uio_pci_generic
+uio_pdrv
+uio_pdrv_genirq
+uio_sercos3
+uio_smx
+uli526x
+ultracam
+umc
+umem
+ums-alauda
+ums-cypress
+ums-datafab
+ums-freecom
+ums-isd200
+ums-jumpshot
+ums-karma
+ums-onetouch
+ums-sddr09
+ums-sddr55
+ums-usbat
+unioxx5
+upd64031a
+upd64083
+uPD98402
+usb8xxx
+usbatm
+usb_debug
+usbdux
+usbduxfast
+usb_gigaset
+usbhid
+usbip
+usbip_common_mod
+usblcd
+usbled
+usblp
+usbnet
+usbserial
+usbsevseg
+usb-storage
+usbtest
+usbtmc
+usbtouchscreen
+usbvideo
+usbvision
+userspace-consumer
+uss720
+uvcvideo
+uvesafb
+uwb
+v4l1-compat
+v4l2-common
+v4l2-compat-ioctl32
+v4l2-int-device
+vcan
+ves1820
+ves1x93
+vesafb
+veth
+vfat
+vga16fb
+vgastate
+vgg2432a4
+vhci-hcd
+via
+via686a
+via-agp
+viafb
+via-ircc
+via-rhine
+via-rng
+via-sdmmc
+via-velocity
+vicam
+video
+video1394
+videobuf-core
+videobuf-dma-sg
+videobuf-dvb
+videobuf-vmalloc
+videocodec
+videodev
+virtio
+virtio_balloon
+virtio_blk
+virtio_console
+virtio_net
+virtio_pci
+virtio_ring
+virtio-rng
+virtual
+visor
+vivi
+vlsi_ir
+vmac
+vme
+vme_ca91cx42
+vme_tsi148
+vme_user
+v_midi
+vmk80xx
+vmlfb
+vmw_pvscsi
+vmxnet3
+vp27smpx
+vpx3220
+vstusb
+vsxxxaa
+vt1211
+vt6656_stage
+vt8231
+vt8623fb
+vxge
+w1_bq27000
+w1_ds2431
+w1_ds2433
+w1_ds2760
+w1-gpio
+w1_smem
+w1_therm
+w6692
+w83627ehf
+w83627hf
+w83627hf_wdt
+w83697hf_wdt
+w83697ug_wdt
+w83781d
+w83791d
+w83792d
+w83793
+w83877f_wdt
+w83977af_ir
+w83977f_wdt
+w83l785ts
+w83l786ng
+w9966
+w9968cf
+wacom
+wacom_w8001
+wafer5823wdt
+walkera0701
+wanrouter
+wanxl
+warrior
+wavelan_cs
+wbsd
+wdt_pci
+whci
+whci-hcd
+whc-rc
+whiteheat
+wimax
+winbond-840
+winbond-cir
+wire
+wl1251
+wl1251_sdio
+wl1251_spi
+wl1271
+wl3501_cs
+wlp
+wm831x
+wm831x_bl
+wm831x-dcdc
+wm831x-gpio
+wm831x-hwmon
+wm831x-isink
+wm831x-ldo
+wm831x-on
+wm831x_power
+wm831x_wdt
+wm8350
+wm8350-hwmon
+wm8350-i2c
+wm8350_power
+wm8350-regulator
+wm8350_wdt
+wm8400-core
+wm8400-regulator
+wm8739
+wm8775
+wm97xx-ts
+wp512
+wpan-class
+wusb-cbaf
+wusbcore
+wusb-wa
+x25
+x25_asy
+x38_edac
+xc5000
+xcbc
+xen-blkfront
+xen-fbfront
+xenfs
+xen-kbdfront
+xen-netfront
+xfrm4_mode_beet
+xfrm4_mode_transport
+xfrm4_mode_tunnel
+xfrm4_tunnel
+xfrm6_mode_beet
+xfrm6_mode_ro
+xfrm6_mode_transport
+xfrm6_mode_tunnel
+xfrm6_tunnel
+xfrm_ipcomp
+xfrm_user
+xfs
+xhci
+xirc2ps_cs
+xircom_cb
+xor
+xpad
+xprtrdma
+x_tables
+xt_CLASSIFY
+xt_cluster
+xt_comment
+xt_connbytes
+xt_connlimit
+xt_connmark
+xt_CONNMARK
+xt_CONNSECMARK
+xt_conntrack
+xt_dccp
+xt_dscp
+xt_DSCP
+xt_esp
+xt_hashlimit
+xt_helper
+xt_hl
+xt_HL
+xt_iprange
+xtkbd
+xt_LED
+xt_length
+xt_limit
+xt_mac
+xt_mark
+xt_MARK
+xt_multiport
+xt_NFLOG
+xt_NFQUEUE
+xt_NOTRACK
+xt_osf
+xt_owner
+xt_physdev
+xt_pkttype
+xt_policy
+xt_quota
+xt_rateest
+xt_RATEEST
+xt_realm
+xt_recent
+xts
+xt_sctp
+xt_SECMARK
+xt_socket
+xt_state
+xt_statistic
+xt_string
+xt_tcpmss
+xt_TCPMSS
+xt_tcpudp
+xt_time
+xt_TPROXY
+xt_TRACE
+xt_u32
+xusbatm
+xvmalloc
+yam
+yealink
+yellowfin
+yenta_socket
+zatm
+zaurus
+zc0301
+zd1201
+zd1211rw
+zhenhua
+zl10036
+zl10039
+zl10353
+zlib
+zlib_deflate
+zr36016
+zr36050
+zr36060
+zr36067
+zr364xx
--- linux-mvl-dove-2.6.32.orig/debian.master/abi/2.6.32-34.73/amd64/server
+++ linux-mvl-dove-2.6.32/debian.master/abi/2.6.32-34.73/amd64/server
@@ -0,0 +1,10358 @@
+EXPORT_SYMBOL arch/x86/kvm/kvm 0x05573592	kvm_cpu_has_pending_timer
+EXPORT_SYMBOL arch/x86/kvm/kvm 0x2e69f5c7	kvm_read_guest_atomic
+EXPORT_SYMBOL crypto/gf128mul 0x0c2f123f	gf128mul_4k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x1068004b	gf128mul_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x2f2889a0	gf128mul_init_64k_lle
+EXPORT_SYMBOL crypto/gf128mul 0x3755f990	gf128mul_init_64k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x384ef9ce	gf128mul_64k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x56af0dbd	gf128mul_x_ble
+EXPORT_SYMBOL crypto/gf128mul 0x83581089	gf128mul_init_4k_lle
+EXPORT_SYMBOL crypto/gf128mul 0x9b2560b9	gf128mul_init_4k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x9e13f6f6	gf128mul_lle
+EXPORT_SYMBOL crypto/gf128mul 0xbd17a0df	gf128mul_4k_lle
+EXPORT_SYMBOL crypto/gf128mul 0xc0890413	gf128mul_64k_lle
+EXPORT_SYMBOL crypto/gf128mul 0xd60736ec	gf128mul_free_64k
+EXPORT_SYMBOL crypto/xor 0x5b6c00e6	xor_blocks
+EXPORT_SYMBOL drivers/acpi/video 0x7a45377b	acpi_video_unregister
+EXPORT_SYMBOL drivers/acpi/video 0x8826c13b	acpi_video_register
+EXPORT_SYMBOL drivers/atm/suni 0x365ea50d	suni_init
+EXPORT_SYMBOL drivers/atm/uPD98402 0x766cc885	uPD98402_init
+EXPORT_SYMBOL drivers/block/paride/paride 0x174975c2	pi_do_claimed
+EXPORT_SYMBOL drivers/block/paride/paride 0x20100022	pi_init
+EXPORT_SYMBOL drivers/block/paride/paride 0x25d35605	pi_connect
+EXPORT_SYMBOL drivers/block/paride/paride 0x4a304ca3	pi_release
+EXPORT_SYMBOL drivers/block/paride/paride 0x4a4708d4	pi_schedule_claimed
+EXPORT_SYMBOL drivers/block/paride/paride 0x4f5ecf33	pi_write_regr
+EXPORT_SYMBOL drivers/block/paride/paride 0x50614eda	paride_unregister
+EXPORT_SYMBOL drivers/block/paride/paride 0x560da72f	pi_disconnect
+EXPORT_SYMBOL drivers/block/paride/paride 0x82a283ce	pi_write_block
+EXPORT_SYMBOL drivers/block/paride/paride 0x98039add	pi_read_regr
+EXPORT_SYMBOL drivers/block/paride/paride 0xae06c746	pi_read_block
+EXPORT_SYMBOL drivers/block/paride/paride 0xe71f6267	paride_register
+EXPORT_SYMBOL drivers/char/agp/intel-agp 0x7b9a6116	intel_agp_enabled
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x045d19f9	ipmi_set_maintenance_mode
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x15ae6a67	ipmi_free_recv_msg
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x1e8886e4	ipmi_get_my_LUN
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x1fbfe6f6	ipmi_smi_msg_received
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x2997804b	ipmi_request_supply_msgs
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x2c09520e	ipmi_get_version
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x2e3c16cd	ipmi_smi_watcher_register
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x2f782230	ipmi_create_user
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x40f2b10c	ipmi_alloc_smi_msg
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x41dfb1a0	ipmi_poll_interface
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x4cf7a870	ipmi_smi_watcher_unregister
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x54f40817	ipmi_get_my_address
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x66566931	ipmi_register_smi
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x804f922a	ipmi_addr_length
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x91f2908f	ipmi_set_my_address
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x92929d7b	ipmi_smi_watchdog_pretimeout
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xa00ff442	ipmi_set_my_LUN
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xa9dd4f5a	ipmi_destroy_user
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xb4964228	ipmi_request_settime
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xbb5cc9dd	ipmi_register_for_cmd
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xc1a127e5	ipmi_unregister_for_cmd
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xd4772391	ipmi_unregister_smi
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xd7525772	ipmi_set_gets_events
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xdd65af28	ipmi_smi_add_proc_entry
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe4f4665b	ipmi_validate_addr
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xec79fcd5	ipmi_get_maintenance_mode
+EXPORT_SYMBOL drivers/char/nsc_gpio 0x52336830	nsc_gpio_dump
+EXPORT_SYMBOL drivers/char/nsc_gpio 0x709c3192	nsc_gpio_write
+EXPORT_SYMBOL drivers/char/nsc_gpio 0x8f7adfd1	nsc_gpio_read
+EXPORT_SYMBOL drivers/char/nvram 0x0f28cb91	nvram_read_byte
+EXPORT_SYMBOL drivers/char/nvram 0x17ff2c1d	__nvram_read_byte
+EXPORT_SYMBOL drivers/char/nvram 0x2adec1e0	__nvram_check_checksum
+EXPORT_SYMBOL drivers/char/nvram 0x7da28f12	nvram_check_checksum
+EXPORT_SYMBOL drivers/char/nvram 0x9ce3f83f	nvram_write_byte
+EXPORT_SYMBOL drivers/char/nvram 0xa8813189	__nvram_write_byte
+EXPORT_SYMBOL drivers/edac/edac_core 0x9d36a057	edac_mc_find
+EXPORT_SYMBOL drivers/edac/edac_core 0xaf6a5d24	edac_mc_handle_fbd_ce
+EXPORT_SYMBOL drivers/edac/edac_core 0xdad9dd0c	edac_mc_handle_fbd_ue
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x02d9e16c	fw_device_enable_phys_dma
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x05d2d88a	fw_iso_buffer_init
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x09aa7516	fw_iso_buffer_destroy
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x15ee6bcb	fw_send_response
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x1c732b62	fw_core_add_address_handler
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x36862979	fw_core_handle_response
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x49a29946	fw_core_remove_descriptor
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x4e86dd83	fw_core_add_descriptor
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x5176ac6d	fw_core_handle_request
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x552e5db8	fw_card_add
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x5fb3c6eb	fw_iso_context_start
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x627e3805	fw_core_remove_address_handler
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x770b6bd2	fw_core_handle_bus_reset
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x7838991a	fw_bus_type
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x8022891e	fw_iso_context_queue
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x90863005	fw_high_memory_region
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x94b4fc07	fw_core_initiate_bus_reset
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x9f2b2266	fw_iso_context_create
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xa5364edb	fw_card_initialize
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xafc1c793	fw_csr_iterator_next
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xb047a2c6	fw_csr_iterator_init
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xbaffb68b	fw_core_remove_card
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xbb319d09	fw_iso_context_stop
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xd6dbbc7c	fw_send_request
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xea9dbe29	fw_cancel_transaction
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xf3432ff5	fw_iso_context_destroy
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xf63cdfdc	fw_fill_response
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xf9e0da33	fw_run_transaction
+EXPORT_SYMBOL drivers/firmware/dcdbas 0xa75079d6	dcdbas_smi_request
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x00198412	drm_add_edid_modes
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x00718464	drm_property_destroy
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x05ac9c53	drm_core_get_reg_ofs
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x062f51fc	drm_gem_vm_close
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x06789eb0	drm_agp_unbind
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x07163fb3	drm_framebuffer_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0836695c	drm_sman_takedown
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x08cc1dbe	drm_mode_duplicate
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0f9a1555	drm_vblank_off
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x118c3b4d	drm_gem_vm_open
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x12e588da	drm_read
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x16919b57	drm_agp_enable
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x19310adb	drm_agp_release
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1c973415	drm_property_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1da8cfd5	drm_lock_take
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1f01454a	drm_gem_mmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1f072c59	drm_property_add_enum
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x20645642	drm_debug
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2079228c	drm_compat_ioctl
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x21451ac4	drm_sman_owner_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x229ee383	drm_mode_object_find
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x22a3bcd7	drm_mode_crtc_set_gamma_size
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2916bf63	drm_sman_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2ad70faf	drm_i_have_hw_lock
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2bced59e	drm_mode_validate_size
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2dbca3f3	drm_mode_prune_invalid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2eb2f903	drm_sman_free_key
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2ed9476b	drm_ati_pcigart_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2edb56f9	drm_poll
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2fe91453	drm_mode_attachmode_crtc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3074f033	drm_order
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x313c8de3	drm_pci_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x32965b1d	drm_vblank_count
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x332da493	drm_vblank_put
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x33d70830	drm_mode_destroy
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x35814d06	drm_core_reclaim_buffers
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3980808f	drm_connector_attach_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3a2f21a8	drm_mm_search_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3a877828	drm_get_connector_name
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3c9a1409	drm_ht_just_insert_please
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3e2d744a	drm_core_ioremap_wc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3fc0ecc1	drm_master_get
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x40911aaf	drm_mm_debug_table
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x40bdfbf7	drm_exit
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x466bf066	drm_vblank_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x47ed66de	drm_debugfs_remove_files
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x47f55afb	drm_mode_detachmode_crtc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x493b6beb	drm_agp_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4f29a617	drm_core_ioremapfree
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x55f060ee	drm_sman_set_range
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x55f6caff	drm_mode_create_dithering_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x56217ed2	drm_mm_clean
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x572f1090	drm_addbufs_agp
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x57f7dbe6	drm_mm_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x580830f0	drm_mode_set_name
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5a9f3cfe	drm_mode_config_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5d500fe8	drm_mode_config_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5ee118ab	drm_connector_property_get_value
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x61d5a744	drm_core_ioremap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x61e177f6	drm_vblank_post_modeset
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x62f3b87d	drm_idlelock_release
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6518c19a	drm_mm_get_block_range_generic
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x682196cd	drm_mmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x68f3dbe6	drm_agp_chipset_flush
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6965ae3a	drm_agp_acquire
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6bd039ae	drm_mode_probed_add
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6bf5bac8	drm_rmmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6d2e5837	drm_ut_debug_printk
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6fc30481	drm_mode_hsync
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x704fc8ca	drm_add_modes_noedid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x72593f9d	drm_cvt_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7395417c	drm_gem_object_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x74fde072	drm_unbind_agp
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x76863e24	drm_mm_pre_get
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x771ac60d	drm_gem_object_lookup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x784915eb	drm_mode_vrefresh
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7b0465fd	drm_idlelock_take
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7b2a44c5	drm_mode_create_scaling_mode_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7becf9f2	drm_gem_object_handle_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7c1fd6c8	drm_mode_equal
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x849241ac	drm_mm_put_block
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x84e1fe5e	drm_connector_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x85de09f5	drm_mode_width
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x86d3097d	drm_agp_bind_pages
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x87d6e7ef	drm_detect_hdmi_monitor
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8d78a430	drm_mode_remove
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8defdfae	drm_sg_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8e62d513	drm_mm_search_free_in_range
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8f1c4da5	drm_free_agp
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8f84ebfe	drm_vblank_pre_modeset
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x90570f74	drm_connector_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x90963663	drm_mode_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x91caaf19	drm_crtc_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x91f5097b	drm_debugfs_create_files
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9e24bfc9	drm_gtf_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa08e7d2d	drm_addbufs_pci
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa15504a3	drm_fasync
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa1cd4b05	drm_handle_vblank
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa1eabd87	drm_mode_list_concat
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa3243039	drm_pci_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa4baa738	drm_getsarea
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa511ff3a	drm_mode_connector_attach_encoder
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa8431b6a	drm_mode_create_tv_properties
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa9237a15	drm_sysfs_connector_add
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xaa73b74e	drm_mode_validate_clocks
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xac92a4c1	drm_mm_dump_table
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xad37fd07	drm_mode_connector_list_update
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xad5e9e30	drm_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xaeab1f8c	drm_do_probe_ddc_edid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xaf29788e	drm_sman_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb296d048	drm_release
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb47f476b	drm_i2c_encoder_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb4e01cda	drm_sysfs_connector_remove
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb58d3411	drm_addmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb5b0f139	drm_master_put
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb64e4cd5	drm_mm_init_scan
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb9b97864	drm_agp_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xba97412e	drm_mode_connector_detach_encoder
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xbbe14b87	drm_encoder_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xbd93b307	drm_rmmap_locked
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xbed422c9	drm_get_edid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xbfe9a247	drm_agp_info
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc00b0c16	drm_get_resource_start
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc1d2c109	drm_clflush_pages
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc2a4f16a	drm_framebuffer_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc3c70034	drm_crtc_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc4ea85d8	drm_mm_scan_remove_block
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xca3ea974	drm_lock_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcb47723b	drm_ati_pcigart_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcdf2eff4	drm_mode_height
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xceecbe2e	drm_put_dev
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcfb4f4ef	drm_mm_scan_add_block
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd08fa3f0	drm_mode_set_crtcinfo
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd26d1f0c	drm_irq_install
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3028e75	drm_sman_set_manager
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd34f5a43	drm_encoder_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3ffab51	drm_ht_remove
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd4c8a354	drm_mm_get_block_generic
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd63d6819	drm_core_get_map_ofs
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd7f7b801	drm_connector_property_set_value
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdba54be8	drm_mode_create_dirty_info_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd3febe2	drm_gem_object_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd49095c	drm_ht_insert_item
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdf723e21	drm_get_drawable_info
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe1457735	drm_ht_remove_item
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe14d670f	drm_get_encoder_name
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe24a7b88	drm_ht_find_item
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe30465c9	drm_sysfs_hotplug_event
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe5bdce7e	drm_mode_debug_printmodeline
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe6e9af4c	drm_mode_create_dvi_i_properties
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe7077df7	drm_open
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe7b023c2	drm_ioctl
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe919dd5c	drm_sman_owner_clean
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xeb2380bb	drm_agp_bind
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xed31136d	drm_mode_connector_update_edid_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xef9023c7	drm_vblank_get
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf1421d13	drm_mode_sort
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf2592694	drm_irq_uninstall
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf42a2b26	drm_ht_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf47c4498	drm_gem_handle_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf771f470	drm_vblank_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfa266be4	drm_get_dev
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfa44fcd2	drm_get_resource_len
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfa769c65	drm_mm_takedown
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfcd8ac00	drm_i2c_encoder_destroy
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfdfbad19	drm_sman_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x034f92c8	drm_helper_crtc_in_use
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x10481fb8	drm_fb_helper_add_connector
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x14dafe11	drm_helper_probe_connector_modes
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x1644cb2d	drm_helper_encoder_in_use
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x1e2cbe03	drm_crtc_helper_set_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x38715b6d	drm_crtc_helper_set_config
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x50f291b0	drm_helper_disable_unused_functions
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x5dfad512	drm_fb_helper_free
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x6d0bdc79	drm_helper_connector_dpms
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x6f6ad3dd	i2c_dp_aux_add_bus
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x70986fb8	drm_fb_helper_fill_var
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x724ac382	drm_fb_helper_pan_display
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x7b60f827	drm_fb_helper_check_var
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x7df5e29c	drm_helper_resume_force_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x7fe16928	drm_fb_helper_set_par
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x7ffda27e	drm_fb_helper_fill_fix
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x9bc97b9c	drm_fb_helper_setcmap
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x9d251144	drm_fb_helper_panic
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xb1e7fe14	drm_helper_probe_single_connector_modes
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xb3fbf7f7	drm_helper_initial_config
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xc469c244	drm_fb_helper_restore
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xc56bd40b	drm_fb_helper_single_fb_probe
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xc9239eb1	drm_helper_mode_fill_fb_struct
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xd31ff37d	drm_fb_helper_init_crtc_count
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xd5b07e68	drm_helper_hotplug_stage_two
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xd710364e	drm_fb_helper_setcolreg
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xd929ed9c	drm_fb_helper_blank
+EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x28c99ce4	intelfb_probe
+EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0xd44f7cfd	intelfb_resize
+EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0xf8b548ce	intelfb_remove
+EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0x3ad5bd60	radeonfb_remove
+EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0xe87145a3	radeonfb_resize
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x01c99cb0	ttm_write_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x04932c1b	ttm_bo_synccpu_write_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x1ba8c0ef	ttm_lock_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x1d455396	ttm_ref_object_add
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x1da2b250	ttm_tt_bind
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x2d673efd	ttm_vt_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x365feb2e	ttm_eu_reserve_buffers
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x3994f350	ttm_mem_global_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x3ade5cfc	ttm_base_object_lookup
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x3df39355	ttm_object_device_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x3e5d7ed3	ttm_bo_move_accel_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x3face24c	ttm_bo_wait_cpu
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x44409a13	ttm_global_item_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x46508ef6	ttm_bo_move_memcpy
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x4feba1b2	ttm_mem_global_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x51b6c175	ttm_bo_unmap_virtual
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x52ba9bf0	ttm_object_device_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x56c42d22	ttm_suspend_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x5ca5cb47	ttm_global_item_ref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x5ee52445	ttm_bo_unreserve
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x61bdb34f	ttm_eu_fence_buffer_objects
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x66f3ff27	ttm_bo_device_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x69d81dd8	ttm_object_file_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x6aae5f36	ttm_tt_set_placement_caching
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x6b975e3a	ttm_bo_init_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x72654ef5	ttm_bo_swapout_all
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x765cbc82	ttm_read_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x778d40c8	ttm_agp_backend_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x7f8879de	ttm_vt_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x8500e4c9	ttm_bo_device_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x86a4066d	ttm_eu_backoff_reservation
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x8730a2ea	ttm_mem_global_alloc
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x88035575	ttm_bo_wait
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x8d620636	ttm_bo_wait_unreserved
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x8db796d4	ttm_write_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x9396d199	ttm_tt_populate
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x97d5ca21	ttm_base_object_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xa5437f2e	ttm_base_object_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xac0e50d1	ttm_round_pot
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb4e22451	ttm_bo_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb5cf2fe9	ttm_suspend_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb64dd919	ttm_ref_object_base_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb83ba504	ttm_bo_mmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xbba2ecf9	ttm_read_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc2058ac0	ttm_io_prot
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc64022a6	ttm_bo_global_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc84a06d1	ttm_bo_kunmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc96c5be3	ttm_bo_synccpu_write_grab
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xcc7823da	ttm_bo_reserve
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xcdaa4f42	ttm_fbdev_mmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xcf9a2b18	ttm_object_file_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xd6baf631	ttm_bo_move_ttm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xd80fc2cb	ttm_bo_clean_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xd946828b	ttm_bo_mem_space
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xea98aa2b	ttm_bo_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xf383b066	ttm_bo_kmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xf4c4a8a3	ttm_mem_global_free
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xfc36cbfa	ttm_bo_validate
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xfcce372b	ttm_bo_global_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xffa83fab	ttm_bo_evict_mm
+EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0x0903c239	vid_from_reg
+EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0xef1c781c	vid_which_vrm
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-bit 0x0528c6a2	i2c_bit_add_bus
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-bit 0xe1e861ff	i2c_bit_add_numbered_bus
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0x4b80ae42	i2c_pca_add_bus
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0x99c6ad0f	i2c_pca_add_numbered_bus
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pcf 0xac2edee0	i2c_pcf_add_bus
+EXPORT_SYMBOL drivers/i2c/busses/i2c-amd756 0x2a6c333c	amd756_smbus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x00ef3f3e	hpsb_update_config_rom_image
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0361e549	hpsb_unregister_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x070fffcf	hpsb_allocate_and_register_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0b234c4e	dma_prog_region_alloc
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0bed5322	hpsb_make_lockpacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x11959ab6	hpsb_alloc_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x158ac548	dma_region_offset_to_bus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1a200e5a	csr1212_release_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1b6cc672	hpsb_update_config_rom
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x20347499	hpsb_iso_recv_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x206d4d1a	hpsb_get_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x207ff244	hpsb_iso_packet_sent
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x231d1b65	hpsb_make_readpacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x24a4c0f7	hpsb_destroy_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x264623a5	hpsb_iso_packet_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x26c14220	hpsb_iso_recv_listen_channel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2a4cc36b	csr1212_attach_keyval_to_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2ebf6e5a	dma_prog_region_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x30f95b5b	hpsb_iso_wake
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x356d6e0d	hpsb_set_packet_complete_task
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x39f22e96	hpsb_read
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3d75b26e	hpsb_get_tlabel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x40f6d1af	hpsb_unregister_highlevel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x49a95dc4	csr1212_get_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4a9cd770	csr1212_parse_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x51b77b44	hpsb_iso_n_ready
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x52d393b3	hpsb_packet_sent
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x532f1a1b	hpsb_lock
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x57e05b8b	hpsb_iso_xmit_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x595c8c60	hpsb_iso_recv_flush
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5f5fdd2f	csr1212_new_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x659db551	hpsb_create_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x672ad148	dma_region_sync_for_device
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x68b51e47	csr1212_read
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6b20e33e	hpsb_iso_recv_unlisten_channel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6e7734f0	hpsb_iso_recv_start
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6fbac895	hpsb_make_streampacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x70526317	hpsb_remove_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x71970cce	hpsb_node_write
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x71a876eb	hpsb_read_cycle_timer
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x71c02d2e	hpsb_register_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7261614f	hpsb_reset_bus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x726cd025	hpsb_free_tlabel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x754c74ed	hpsb_resume_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x765d19ba	hpsb_get_hostinfo_bykey
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x76bc1a5c	dma_region_free
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7a93b10d	hpsb_packet_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7b16e17d	hpsb_set_hostinfo_key
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7ce69674	hpsb_make_lock64packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8879f8f0	dma_region_sync_for_cpu
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x89a5a5ce	hpsb_alloc_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8ec2b312	dma_region_alloc
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9b261f6d	hpsb_set_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa83591b6	hpsb_iso_xmit_queue_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa963c4a9	hpsb_register_highlevel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xadfb3c9a	hpsb_iso_shutdown
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaef57bb5	csr1212_detach_keyval_from_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb89a6b8d	hpsb_selfid_complete
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbc62e80d	hpsb_node_fill_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc09a8185	hpsb_packet_success
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc19c5bd5	__hpsb_register_protocol
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc3aa1531	hpsb_unregister_protocol
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xcc75b5c7	hpsb_iso_stop
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xcd9e772b	dma_prog_region_free
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd653837a	hpsb_add_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd74e262c	hpsb_make_writepacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd946fb43	hpsb_bus_reset
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xdeb67429	hpsb_protocol_class
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe19742e6	hpsb_iso_recv_set_channel_mask
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe3201aa8	hpsb_iso_xmit_start
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe3701bf5	hpsb_selfid_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe484a114	hpsb_write
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xea4152ff	dma_region_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf15f73e3	dma_region_mmap
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf2509dce	hpsb_free_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf4c0784f	hpsb_iso_xmit_sync
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf5a293e1	hpsb_send_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf685c9bb	hpsb_iso_recv_release_packets
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfba57f51	hpsb_speedto_str
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfbfe831c	hpsb_make_phypacket
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x097d4f38	ohci1394_stop_context
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x0cee5fac	ohci1394_register_iso_tasklet
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x1d5aeebc	ohci1394_init_iso_tasklet
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x2059d633	ohci1394_unregister_iso_tasklet
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x55ddd2c6	rdma_copy_addr
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x6b9b3e97	rdma_resolve_ip
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x710f2840	rdma_translate_ip
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x8a721ed9	rdma_addr_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xc91bb9d3	rdma_addr_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xcd9c9cc4	rdma_addr_cancel
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x04c15e33	ib_send_cm_rep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x04cd1dc2	ib_send_cm_rej
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x0c76e402	ib_send_cm_sidr_req
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x2084e421	ib_send_cm_rtu
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x42fd128b	ib_send_cm_apr
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x77958ee4	ib_cm_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x79f456df	ib_send_cm_sidr_rep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x7b4de6c7	ib_send_cm_mra
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x7cacb889	ib_destroy_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x9520b89a	ib_send_cm_req
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xa9109c69	ib_create_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xb0e6fdb1	ib_cm_listen
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xc095f9e3	ib_send_cm_lap
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xc94e1d31	ib_send_cm_drep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xc9a4dc13	ib_send_cm_dreq
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xf5a68eab	ib_cm_notify
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xfccf267c	cm_class
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x04764df3	ib_dealloc_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0487449f	ib_destroy_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0593b13b	ib_dereg_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x059cdc7c	ib_destroy_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0623361c	ib_query_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x06830b9a	ib_pack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x070c66fc	ib_alloc_fast_reg_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0dec47c9	ib_fmr_pool_unmap
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x13785d50	ib_modify_port
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x139f2f33	ib_rereg_phys_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1b4af4f7	ib_query_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1babd1b8	ib_find_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1c8e9180	ib_modify_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1e491a04	ib_unmap_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1e4cc422	ib_set_client_data
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2b364e44	ib_detach_mcast
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x30df5e7b	ib_find_cached_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3121d809	ib_query_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x366d567d	ib_get_cached_lmc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3b2b2e03	ib_query_port
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3b67ef92	ib_fmr_pool_map_phys
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3f39994d	ib_query_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3f7567fd	ib_rate_to_mult
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x45a8e7f5	ib_umem_get
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4afbdb51	ib_alloc_fast_reg_page_list
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4dde66d3	ib_create_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x55373772	ib_create_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x57705421	ib_create_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x59bd429d	ib_query_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5a820b73	ib_dispatch_event
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x62824a27	ib_modify_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6c6ad26b	ib_alloc_mw
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6ca1e496	ib_alloc_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x70da4324	ib_get_cached_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x71c4be41	ib_flush_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7529d894	ib_create_ah_from_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7c2118e0	ib_dealloc_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7e022902	ib_resize_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x815f3be0	ib_query_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x85fbf244	ib_create_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8640eaeb	ib_modify_qp_is_ok
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x87b614d8	ib_ud_header_pack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x89261f8c	ib_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8ae201b6	ib_destroy_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8e4fad39	ib_init_ah_from_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9319cc92	ib_modify_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x96ce6c46	rdma_node_get_transport
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9947535f	ib_get_dma_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9d804fa1	mult_to_ib_rate
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9f080e0e	ib_dealloc_pd
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa4fda562	ib_get_client_data
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa6eda28e	ib_free_fast_reg_page_list
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa7243de8	ib_unregister_event_handler
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa9ee14b6	ib_alloc_pd
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xaff7cd73	ib_find_cached_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb41474aa	ib_umem_release
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb7f11413	ib_find_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb9783c26	ib_modify_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xbaa1d8c4	ib_create_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xbed2d826	ib_register_event_handler
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc06d0115	ib_dealloc_mw
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xcb636d71	ib_alloc_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xcd3d6ae3	ib_attach_mcast
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd17ba9d1	ib_ud_header_init
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd56aa489	ib_umem_page_count
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd622af6c	ib_modify_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe81f2e08	ib_unregister_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xea2a036b	ib_destroy_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xec3916d6	ib_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf0d813cd	ib_get_cached_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf14b2d2d	ib_destroy_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf266a50a	ib_query_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf2a0d0fd	ib_register_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf36498b9	ib_ud_header_unpack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf96fc9de	ib_unpack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xffdf57ca	ib_reg_phys_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x01cb68b1	ib_cancel_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x0c078008	ib_register_mad_agent
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x1af59aa6	ib_process_mad_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x2b9176ba	ib_free_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x3699c4df	ib_unregister_mad_agent
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x4355faf6	ib_modify_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x5334a048	ib_register_mad_snoop
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x67a06e27	ib_free_recv_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6e4a430e	ib_redirect_mad_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6ef787ed	ib_response_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6f077fcf	ib_get_mad_data_offset
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x7b5d4b7a	ib_is_mad_class_rmpp
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x8292de56	ib_get_rmpp_segment
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xc6f09280	ib_create_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xf428a1ae	ib_post_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x576fdbac	ib_sa_free_multicast
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x6ccb6df4	ib_sa_get_mcmember_rec
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x9c56fd34	ib_sa_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x9fe689f6	ib_init_ah_from_path
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xa0cd2ec8	ib_init_ah_from_mcmember
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xa8d5f1cd	ib_sa_join_multicast
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xb164920e	ib_sa_path_rec_get
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xd3244450	ib_sa_service_rec_query
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xe117c89c	ib_sa_cancel_query
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xf520d09e	ib_sa_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x02f847bc	ib_copy_path_rec_from_user
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x07cf5a51	ib_copy_ah_attr_to_user
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x18382f6a	ib_copy_path_rec_to_user
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x184f3575	ib_copy_qp_attr_to_user
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x01395805	iw_create_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x1c76ca1f	iw_cm_listen
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x1f0280ca	iw_destroy_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x24b6851e	iw_cm_disconnect
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x9d1a00d7	iw_cm_accept
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x9f4f610a	iw_cm_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xc045b246	iw_cm_connect
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xe7cdd751	iw_cm_reject
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x1001330a	rdma_accept
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x16eb4312	rdma_listen
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x1b0d68eb	rdma_notify
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x26fc87d5	rdma_destroy_id
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x3ad07b60	rdma_resolve_route
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x3cd617a6	rdma_leave_multicast
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x469f930e	rdma_destroy_qp
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x4fce7d24	rdma_resolve_addr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x86f42a48	rdma_create_qp
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x92eda7d0	rdma_create_id
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x9ebd67cf	rdma_disconnect
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xb9cf9a6a	rdma_connect
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xceb1f4e1	rdma_set_ib_paths
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xd60c0228	rdma_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xd8b2af02	rdma_reject
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xdce37624	rdma_bind_addr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xe47f8411	rdma_join_multicast
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xf9ce0858	rdma_set_service_type
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x1893afcb	gameport_stop_polling
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x3e8db5da	gameport_set_phys
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x4c81cd02	gameport_open
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x5c60f667	gameport_start_polling
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x90d9fdaf	__gameport_register_port
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x965d0f11	gameport_close
+EXPORT_SYMBOL drivers/input/gameport/gameport 0xb7d7f169	gameport_unregister_port
+EXPORT_SYMBOL drivers/input/gameport/gameport 0xb9745519	__gameport_register_driver
+EXPORT_SYMBOL drivers/input/gameport/gameport 0xe8490c9d	gameport_unregister_driver
+EXPORT_SYMBOL drivers/input/input-polldev 0x0d90e2ae	input_unregister_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0x3be2cee6	input_free_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0x59722f0a	input_register_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0xc5138f6f	input_allocate_polled_device
+EXPORT_SYMBOL drivers/isdn/capi/capifs 0x2c54c957	capifs_free_ncci
+EXPORT_SYMBOL drivers/isdn/capi/capifs 0xd0bc06ce	capifs_new_ncci
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x04403fcf	unregister_capi_driver
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x0abb15b6	capi_ctr_resume_output
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x14f2aa5a	capi20_get_version
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x24664572	capi_ctr_suspend_output
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2b8eab1f	capilib_free_ncci
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2baa6586	capilib_new_ncci
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2ec6ad41	capi20_set_callback
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x31c24aa4	capi20_isinstalled
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x47d3fc51	capi_info2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x47dbfa0a	capi_message2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x50b33ca4	capi_cmsg2message
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x59462083	attach_capi_ctr
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x6057c6f3	capi_message2cmsg
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x62e32d43	capilib_data_b3_conf
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x6ec7194d	capi_ctr_handle_message
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7128e02b	capi20_register
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x71e8d5ba	capilib_data_b3_req
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x788d398c	capi_cmsg2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7a33596c	capi20_get_serial
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7e6f1307	capi20_get_manufacturer
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x843cbed4	detach_capi_ctr
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x8f699913	capilib_release
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x9f823278	register_capi_driver
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xaa165d27	capilib_release_appl
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb19fda8d	capi_cmd2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb60e5e5f	capi_cmsg_header
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe19a11ac	capi20_get_profile
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe5d6f6e7	capi20_put_message
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe9f62f29	cdebbuf_free
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xed061606	capi20_manufacturer
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xf05fb105	capi20_release
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xfbfa7fa7	capi_ctr_down
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xfff6da92	capi_ctr_ready
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x03786363	b1_free_card
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x0be702b0	avmcard_dma_free
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x313462bb	b1_load_t4file
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x36b188d8	b1_interrupt
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x3cffcda1	b1_load_firmware
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x4c93eee1	b1_load_config
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x51fef300	b1_loaded
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x68f35339	avmcard_dma_alloc
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x70c28539	b1_release_appl
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x85f09690	b1_irq_table
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x87e85271	b1_send_message
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x89067599	b1ctl_read_proc
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x9064ba0a	b1_getrevision
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xba843db4	b1_parse_version
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xcb0197cc	b1_reset_ctr
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xdfd28376	b1_detect
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xe2f90cd8	b1_register_appl
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xf5940cf0	b1_alloc_card
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x233ca0dc	b1dma_interrupt
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x40caf064	b1pciv4_detect
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x65ec8027	t1pci_detect
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x72c05bf4	b1dmactl_read_proc
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x7b9bf2bc	b1dma_release_appl
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x9c325c7f	b1dma_register_appl
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xdc822c8f	b1dma_reset
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xdd527f0e	b1dma_send_message
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xe405ee8b	b1dma_reset_ctr
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xeac12ff9	b1dma_load_firmware
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0x29562993	b1pcmcia_delcard
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xaec3240e	b1pcmcia_addcard_m1
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xea620116	b1pcmcia_addcard_m2
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xf14bf8b1	b1pcmcia_addcard_b1
+EXPORT_SYMBOL drivers/isdn/hardware/eicon/divadidd 0x247f4b21	proc_net_eicon
+EXPORT_SYMBOL drivers/isdn/hardware/eicon/divadidd 0x2974ead1	DIVA_DIDD_Read
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNipac 0x4dd6c07e	mISDNipac_irq
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNipac 0x5f267436	mISDNisac_irq
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNipac 0x7ca189ef	mISDNipac_init
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNipac 0x8785a7e9	mISDNisac_init
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNisar 0x60d811b6	mISDNisar_irq
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNisar 0xbc2ec58e	mISDNisar_init
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x07f4f2ce	hisax_unregister
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x148f0c99	FsmFree
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x2844a899	FsmInitTimer
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x67b3e265	hisax_init_pcmcia
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x93a64734	FsmChangeState
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x9df0cd27	FsmEvent
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xc0c558f9	FsmRestartTimer
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xd94696e8	FsmDelTimer
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xee93522c	hisax_register
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xf0a16657	FsmNew
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xfc27303b	HiSax_closecard
+EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x3f3b323a	isac_d_l2l1
+EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x4020cb1a	isac_setup
+EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x4847fc5c	isac_init
+EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x489ce82b	isac_irq
+EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x87a7c26c	isacsx_setup
+EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0xec2faf5b	isacsx_irq
+EXPORT_SYMBOL drivers/isdn/i4l/isdn 0x139d4cad	register_isdn
+EXPORT_SYMBOL drivers/isdn/i4l/isdn 0x22e21fe0	isdn_ppp_register_compressor
+EXPORT_SYMBOL drivers/isdn/i4l/isdn 0xea80bcb2	isdn_ppp_unregister_compressor
+EXPORT_SYMBOL drivers/isdn/i4l/isdn 0xfa06820f	isdn_register_divert
+EXPORT_SYMBOL drivers/isdn/i4l/isdnhdlc 0x3b71e4fc	isdnhdlc_decode
+EXPORT_SYMBOL drivers/isdn/i4l/isdnhdlc 0x59cc8a7e	isdnhdlc_out_init
+EXPORT_SYMBOL drivers/isdn/i4l/isdnhdlc 0x8ee38862	isdnhdlc_rcv_init
+EXPORT_SYMBOL drivers/isdn/i4l/isdnhdlc 0xfd9d4c09	isdnhdlc_encode
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x05468b8c	recv_Dchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x1d466a74	mISDN_register_device
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x2348cc3c	mISDN_FsmFree
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x363c6e11	recv_Dchannel_skb
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3cc82720	recv_Echannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3ea336fd	mISDN_FsmAddTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x429129f2	mISDN_FsmRestartTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x50c2230c	mISDN_FsmChangeState
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x513e37bc	dchannel_senddata
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x5dc7400a	mISDN_clock_update
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x5ecdc042	l1_event
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x6c89b5b0	mISDN_initbchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x6ff8c8ad	bchannel_senddata
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x7a9739c5	mISDN_unregister_device
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x8ff219f2	mISDN_unregister_Bprotocol
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x9487a7e1	get_next_dframe
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xace35cae	mISDN_FsmDelTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xb5195dc5	mISDN_initdchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xb7720911	mISDN_register_Bprotocol
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xb8db99fb	mISDN_freedchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xbbeccb39	get_next_bframe
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xbc2d4847	recv_Bchannel_skb
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc139726c	confirm_Bsend
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc3401729	mISDN_register_clock
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc3a4fc36	recv_Bchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd285995f	mISDN_clock_get
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd5145151	mISDN_FsmEvent
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd9a7fbfd	mISDN_FsmInitTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe7cf398d	mISDN_freebchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe8f617eb	mISDN_unregister_clock
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe9d70ae3	create_l1
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf689e755	queue_ch_frame
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf9e7832f	mISDN_FsmNew
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xff95d105	mISDN_clear_bchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0x01087af0	mISDN_dsp_element_unregister
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0x60721da7	dsp_audio_law_to_s32
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0xa215f1b2	dsp_audio_s16_to_law
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0xb98308d8	mISDN_dsp_element_register
+EXPORT_SYMBOL drivers/md/raid6_pq 0x0bd662f6	raid6_gfmul
+EXPORT_SYMBOL drivers/md/raid6_pq 0x15fe0cd3	raid6_gfexp
+EXPORT_SYMBOL drivers/md/raid6_pq 0x5ba93f9d	raid6_gfinv
+EXPORT_SYMBOL drivers/md/raid6_pq 0xb0d904b7	raid6_empty_zero_page
+EXPORT_SYMBOL drivers/md/raid6_pq 0xce45a6f1	raid6_gfexi
+EXPORT_SYMBOL drivers/media/common/tuners/mc44s803 0xa54b7c86	mc44s803_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mt2060 0xad12b113	mt2060_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mt2131 0xb69adcf3	mt2131_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mt2266 0xb941d34a	mt2266_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mxl5005s 0x1aabd606	mxl5005s_attach
+EXPORT_SYMBOL drivers/media/common/tuners/qt1010 0xf06039a3	qt1010_attach
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0x0cb4b189	tuners
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0xc2821775	tuner_count
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-xc2028 0xd7ec2b50	xc2028_attach
+EXPORT_SYMBOL drivers/media/common/tuners/xc5000 0x9efc6a59	xc5000_attach
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x0a3ff608	flexcop_dma_config_timer
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x0b971813	flexcop_dma_control_timer_irq
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x1389bee1	flexcop_i2c_request
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x1a956a58	flexcop_sram_set_dest
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x228a0713	flexcop_device_kmalloc
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x26051efa	flexcop_dump_reg
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x27ed57a1	flexcop_dma_config
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x2e240e06	flexcop_device_kfree
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x51109595	flexcop_eeprom_check_mac_addr
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x60c39e94	flexcop_device_exit
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x7f766c71	flexcop_dma_allocate
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xa606592e	flexcop_sram_ctrl
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xa80571a1	flexcop_pass_dmx_data
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xb1bb5762	flexcop_pid_feed_control
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xb62d6706	flexcop_dma_xfer_control
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xb83aad27	flexcop_dma_free
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xba7ad29d	flexcop_dma_control_size_irq
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xd8e502f5	flexcop_device_initialize
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xe12775bb	flexcop_pass_dmx_packets
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xe4f0ce1c	flexcop_wan_set_speed
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x4f7522b7	bt878_device_control
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x87a6e18b	bt878_start
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xb7ecc8df	bt878
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xd5d0bdef	bt878_num
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xf3a267c6	bt878_stop
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x36255908	dst_pio_disable
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x569466a6	dst_wait_dst_ready
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x7516e4cd	write_dst
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x7ed83452	dst_error_recovery
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xb8d53fbe	read_dst
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xbcfdc18c	dst_error_bailout
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xdbf56ab9	dst_attach
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xe164acbe	dst_comm_init
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xe94b8c9c	dst_check_sum
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xf5b7e60d	rdc_reset_state
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst_ca 0x93510736	dst_ca_attach
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0466b1cd	dvb_dmx_swfilter
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0c457c5c	dvb_ringbuffer_flush_spinlock_wakeup
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0c4d4a14	dvb_frontend_sleep_until
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0cb093cc	dvb_unregister_frontend
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x1c91a271	dvb_generic_ioctl
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x1e14d9af	dvb_ca_en50221_frda_irq
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x1fb8626b	dvb_dmxdev_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x2e6e41ce	dvb_frontend_detach
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x36ee3ee8	dvb_dmxdev_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x38db2144	dvb_register_device
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x47a41e77	dvb_net_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x51f3767c	dvb_ringbuffer_read
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6988f784	dvb_ringbuffer_read_user
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x7377c1c7	dvb_ca_en50221_camchange_irq
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x74a5a698	dvb_filter_pes2ts_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x7be586ac	dvb_ca_en50221_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x7d8af1f8	dvb_dmx_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x7e437005	dvb_unregister_adapter
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x80e3832d	dvb_filter_get_ac3info
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x95624cef	dvb_unregister_device
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xa23655a0	dvb_register_frontend
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xa7a46f70	dvb_ca_en50221_camready_irq
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xaa8ff921	dvb_register_adapter
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xac4ca1b0	intlog2
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb5a2d6c7	dvb_frontend_reinitialise
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb66e46e2	dvb_dmx_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb8bc0ece	dvb_generic_open
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xbc0d91e1	timeval_usec_diff
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xcb89fc7d	dvb_ringbuffer_free
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xcca08cb5	dvb_ringbuffer_avail
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xcce0eeed	dvb_ringbuffer_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xd58b349d	dvb_ca_en50221_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xd639b9bc	dvb_ringbuffer_write
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xd7765e69	dvb_ringbuffer_empty
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe5ae8707	intlog10
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xeb10cfe4	dvb_net_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf2510d52	dvb_dmx_swfilter_packets
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf826deb0	dvb_filter_pes2ts
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xfb9c0c47	dvb_generic_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xfec38a5b	dvb_dmx_swfilter_204
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x2520cb16	dvb_usb_device_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x39b36564	dvb_usb_nec_rc_key_to_event
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x6a5be5dc	dvb_usb_device_exit
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x83d12ce0	dvb_usb_get_hexline
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x8ec5d0b8	usb_cypress_load_firmware
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xdad02d75	dvb_usb_generic_rw
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xfe08dc33	dvb_usb_generic_write
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x3693500b	af9005_rc_keys
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x4a984d1a	af9005_rc_decode
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0xd3383957	af9005_rc_keys_size
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x0da0f128	dibusb_power_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x4de1066a	dibusb_dib3000mc_tuner_attach
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x5b173600	dibusb_dib3000mc_frontend_attach
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x5b5af0b7	dibusb_read_eeprom_byte
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x79df0d93	dibusb_pid_filter
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x832627a4	dibusb_i2c_algo
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xbccac42b	dibusb2_0_power_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xc5855deb	dibusb2_0_streaming_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xc5910fe9	dibusb_rc_query
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xc612a50d	dibusb_pid_filter_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xcc9ccaff	dibusb_rc_keys
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xfd4efea7	dibusb_streaming_ctrl
+EXPORT_SYMBOL drivers/media/dvb/frontends/af9013 0x7f442ef7	af9013_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/au8522 0x63af3197	au8522_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/bcm3510 0x2f0b7a12	bcm3510_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx22700 0x05b6411c	cx22700_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx22702 0x57b0f216	cx22702_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24110 0xf70793d3	cx24110_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0x33055bc2	cx24113_agc_callback
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0xc78cb6e9	cx24113_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24116 0xcda7f9bd	cx24116_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0x33202040	cx24123_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0x3964ece3	cx24123_get_tuner_i2c_adapter
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0x911ce671	dib0070_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0x9605f30c	dib0070_ctrl_agc_filter
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0xb1005230	dib0070_wbd_offset
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mb 0x77d7a74c	dib3000mb_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x42840ae0	dib3000mc_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x4affb06b	dib3000mc_i2c_enumeration
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x5abe66ce	dib3000mc_get_tuner_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xdce47b94	dib3000mc_pid_parse
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xf7f2be14	dib3000mc_pid_control
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xfd08c489	dib3000mc_set_config
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0x56865288	dib7000m_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0xec4dc9cc	dib7000m_get_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x9036c39c	dib7000p_set_wbd_ref
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x9455f400	dib7000p_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xaf521e16	dib7000p_set_gpio
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xb3daf8dd	dib7000p_i2c_enumeration
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xb66e9754	dib7000p_get_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xd0e4ea30	dib7000pc_detection
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x199e5c7a	dib8000_set_wbd_ref
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x5a2247ad	dib8000_set_gpio
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x697d6718	dib8000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x88c37305	dib8000_get_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0xf5b4513f	dib8000_i2c_enumeration
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x26af4159	dibx000_reset_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x88f262c2	dibx000_init_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x9d8c347a	dibx000_get_i2c_adapter
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0xad3d330b	dibx000_exit_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dvb-pll 0xbcf4fa07	dvb_pll_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/isl6405 0x79f07b3b	isl6405_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/isl6421 0xf0e9d758	isl6421_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/isl6423 0x72ab6da3	isl6423_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/itd1000 0x556640fb	itd1000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/l64781 0x4db5abaf	l64781_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt3305 0xde6a9afa	lgdt3305_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt330x 0xbf5d308f	lgdt330x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lgs8gxx 0x3999b608	lgs8gxx_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0x3fdf2700	lnbh24_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0x60feff3b	lnbp21_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/mt312 0x30ad280f	mt312_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/mt352 0xf11a8728	mt352_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/nxt200x 0xaf6b0d9d	nxt200x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/nxt6000 0x5a6b4b46	nxt6000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/or51132 0xbf22a6dc	or51132_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/or51211 0x7389867a	or51211_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1409 0xf6cd993b	s5h1409_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1411 0xa58cbf43	s5h1411_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0x6e883d68	s5h1420_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0xeafd155e	s5h1420_get_tuner_i2c_adapter
+EXPORT_SYMBOL drivers/media/dvb/frontends/si21xx 0x596c5fbd	si21xx_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/sp8870 0xa8e570a5	sp8870_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/sp887x 0x3cd95317	sp887x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stb0899 0x7bb759a1	stb0899_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stb6000 0x0b45ef83	stb6000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stb6100 0xcd213647	stb6100_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0288 0xe742235f	stv0288_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0297 0x305c6d7e	stv0297_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0299 0x5cf27b3e	stv0299_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0900 0x301f4268	stv0900_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv090x 0x0d821007	stv090x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv6110 0x631b5381	stv6110_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv6110x 0x066fda81	stv6110x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10021 0x406ce864	tda10021_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10023 0x40c07abf	tda10023_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10048 0x9381dec8	tda10048_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x28bd263a	tda10045_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x49d9d230	tda10046_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10086 0xb270c426	tda10086_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda8083 0x2a704829	tda8083_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda8261 0xb4048845	tda8261_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda826x 0xc926c6c0	tda826x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tua6100 0xd049ccfd	tua6100_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/ves1820 0x54cd1d14	ves1820_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/ves1x93 0xc8261d2e	ves1x93_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/zl10036 0x2c22af68	zl10036_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/zl10039 0x206e09cd	zl10039_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/zl10353 0x8a71abf8	zl10353_attach
+EXPORT_SYMBOL drivers/media/dvb/ttpci/ttpci-eeprom 0x4077693e	ttpci_eeprom_parse_mac
+EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0x1d2f3186	ttusbdecfe_dvbt_attach
+EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0x36e8304c	ttusbdecfe_dvbs_attach
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x11dc4b6d	bttv_gpio_enable
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x274b668c	bttv_sub_register
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x30af47bd	bttv_sub_unregister
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x8ecf4acc	bttv_write_gpio
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xa8f8c766	bttv_get_pcidev
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xbcf2d2fb	bttv_read_gpio
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0x20c5977d	btcx_riscmem_free
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0x38e7f7d2	btcx_riscmem_alloc
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0x495e4b0c	btcx_calc_skips
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xad2fe38b	btcx_sort_clips
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xc368f8e6	btcx_align
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xcda0ded2	btcx_screen_clips
+EXPORT_SYMBOL drivers/media/video/cpia 0x7f126dc0	cpia_unregister_camera
+EXPORT_SYMBOL drivers/media/video/cpia 0xb9ac48b7	cpia_register_camera
+EXPORT_SYMBOL drivers/media/video/cx18/cx18 0x2cdea06d	cx18_reset_ir_gpio
+EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0xc71f00ae	cx231xx_unregister_extension
+EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0xfa70f346	cx231xx_register_extension
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x155650f3	cx2341x_ctrl_get_menu
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x1ca0c084	cx2341x_log_status
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x2f25eee2	cx2341x_update
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x5b88faf6	cx2341x_ext_ctrls
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf76ce95	cx2341x_fill_defaults
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf8b77a4	cx2341x_mpeg_ctrls
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xe2c2b5eb	cx2341x_ctrl_query
+EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0x3f2464b5	vp3054_i2c_probe
+EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0x68660be2	vp3054_i2c_remove
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x3c2727ab	cx8800_ctrl_query
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x80b8308f	cx88_set_freq
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xac4e53b9	cx88_user_ctrls
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xc1113587	cx88_set_control
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xdd0a05e0	cx88_enum_input
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xe63adfb0	cx88_get_control
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xf3d6d8de	cx88_video_mux
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x14cba5eb	cx8802_get_device
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x21c78f9b	cx8802_cancel_buffers
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x2f9d8182	cx8802_get_driver
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x44c3a575	cx8802_unregister_driver
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x7bc26ba8	cx8802_buf_queue
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x9efed28e	cx8802_buf_prepare
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xfae730f1	cx8802_register_driver
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x065b8fde	cx88_set_stereo
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x0aab74dd	cx88_core_get
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x154b5bd0	cx88_core_put
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x21910c8d	cx88_reset
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x2651a969	cx88_free_buffer
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x26bc7199	cx88_sram_channel_dump
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x28252035	cx88_set_tvaudio
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x3efbc981	cx88_set_scale
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x407d3d93	cx88_vdev_init
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x4f8ec9f1	cx88_risc_stopper
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x6141c8c5	cx88_tuner_callback
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x69f6d6c0	cx88_core_irq
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x6fd022c3	cx88_newstation
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x7a832d05	cx88_set_tvnorm
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x7ef03014	cx88_dsp_detect_stereo_sap
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x7f38a48c	cx88_risc_buffer
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x8c715c42	cx88_get_stereo
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x904b8696	cx88_audio_thread
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x9b140fff	cx88_sram_channels
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xaaf81775	cx88_wakeup
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xafc51243	cx88_ir_stop
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb436ce27	cx88_ir_start
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb47f6cda	cx88_print_irqbits
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xca4b7e28	cx88_shutdown
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xdc193ac1	cx88_sram_channel_setup
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xecf4c9e2	cx88_risc_databuffer
+EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0x28f062e0	em28xx_register_extension
+EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0x92fd42f6	em28xx_unregister_extension
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x032db8e0	gspca_suspend
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x4457f2ea	gspca_get_i_frame
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x47b75271	gspca_dev_probe
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x54913f43	gspca_disconnect
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x70fb704c	gspca_auto_gain_n_exposure
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x9670af2c	gspca_debug
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x9e2cba21	gspca_frame_add
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xe6638c98	gspca_resume
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x0613ef39	ivtv_reset_ir_gpio
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x1358540c	ivtv_udma_setup
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x14f67530	ivtv_debug
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x1658c03d	ivtv_udma_alloc
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x215eced6	ivtv_set_irq_mask
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x2accb1f3	ivtv_clear_irq_mask
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x5fd3bf4f	ivtv_vapi_result
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x79adf343	ivtv_udma_prepare
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x7ffcf67b	ivtv_api
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x8ee83309	ivtv_udma_unmap
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xa8d2a299	ivtv_init_on_first_open
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xe4648b39	ivtv_vapi
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x04e83446	saa7134_tuner_callback
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x1211df5d	saa7134_devlist
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x14dfecc6	saa7134_boards
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x1eb45725	saa_dsp_writel
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x351f8bde	saa7134_dmasound_exit
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x4063e79b	saa7134_set_gpio
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x5391e578	saa7134_pgtable_free
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x575f6721	saa7134_tvaudio_setmute
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x64c9eaf1	saa7134_devlist_lock
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x6aab1aec	saa7134_pgtable_build
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x82960778	saa7134_ts_register
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xa0a59920	saa7134_dmasound_init
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xc14fb14b	saa7134_pgtable_alloc
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xf3b2bdf5	saa7134_set_dmabits
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xffe05c54	saa7134_ts_unregister
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x02bc5d98	soc_camera_format_by_fourcc
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x1c757fea	soc_camera_host_register
+EXPORT_SYMBOL drivers/media/video/soc_camera 0xab8743a9	soc_camera_xlate_by_fourcc
+EXPORT_SYMBOL drivers/media/video/soc_camera 0xbe7d1fc7	soc_camera_host_unregister
+EXPORT_SYMBOL drivers/media/video/soc_camera 0xeb3bc5cf	soc_camera_apply_sensor_flags
+EXPORT_SYMBOL drivers/media/video/tveeprom 0x0ffb17c9	tveeprom_read
+EXPORT_SYMBOL drivers/media/video/tveeprom 0x96bd9051	tveeprom_hauppauge_analog
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x16a2915c	RingQueue_Dequeue
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x1fe60416	usbvideo_RegisterVideoDevice
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x407a321c	RingQueue_WakeUpInterruptible
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x489b5754	usbvideo_DeinterlaceFrame
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x4ed9500c	usbvideo_TestPattern
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x564dd09d	usbvideo_Deregister
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x86adff99	usbvideo_register
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xddecac6d	RingQueue_Enqueue
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xf5011f67	RingQueue_Flush
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xf8d31019	usbvideo_AllocateDevice
+EXPORT_SYMBOL drivers/media/video/v4l1-compat 0x90af2467	v4l_compat_translate_ioctl
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x03165a85	v4l2_ctrl_get_menu
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1943d0e3	v4l2_chip_match_i2c_client
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1dcaa0c8	v4l2_prio_max
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1e326b97	v4l2_ctrl_query_fill
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x2f639468	v4l2_prio_check
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x369afcb8	v4l2_chip_ident_i2c_client
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x42c8e001	v4l2_ctrl_next
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x495426ee	v4l2_ctrl_get_name
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x4ed5e0d7	v4l2_chip_match_host
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x50766d69	v4l2_ctrl_query_menu_valid_items
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x76ba9a9a	v4l2_prio_open
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x95284709	v4l2_prio_close
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9c7de443	v4l2_prio_change
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9eb43ee2	v4l2_ctrl_check
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0xbecd2858	v4l2_prio_init
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0xd9ee1e3f	v4l2_ctrl_query_menu
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x0251c051	videobuf_dvb_alloc_frontend
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x2b437ebc	videobuf_dvb_find_frontend
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x5221c3dd	videobuf_dvb_unregister_bus
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x56777f10	videobuf_dvb_dealloc_frontends
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xad0a71ee	videobuf_dvb_register_bus
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xdb223880	videobuf_dvb_get_frontend
+EXPORT_SYMBOL drivers/media/video/videodev 0x0445c910	video_unregister_device
+EXPORT_SYMBOL drivers/media/video/videodev 0x0614dd5a	v4l2_video_std_frame_period
+EXPORT_SYMBOL drivers/media/video/videodev 0x0ad412e8	video_register_device_no_warn
+EXPORT_SYMBOL drivers/media/video/videodev 0x123959a1	v4l2_type_names
+EXPORT_SYMBOL drivers/media/video/videodev 0x1ddd7068	video_device_release
+EXPORT_SYMBOL drivers/media/video/videodev 0x2001c659	video_usercopy
+EXPORT_SYMBOL drivers/media/video/videodev 0x3adbd595	v4l2_field_names
+EXPORT_SYMBOL drivers/media/video/videodev 0x5ebefe4b	v4l_printk_ioctl
+EXPORT_SYMBOL drivers/media/video/videodev 0x80a952d2	video_ioctl2
+EXPORT_SYMBOL drivers/media/video/videodev 0xb064b62c	video_devdata
+EXPORT_SYMBOL drivers/media/video/videodev 0xbd77d9b0	video_register_device
+EXPORT_SYMBOL drivers/media/video/videodev 0xd50c182f	video_device_release_empty
+EXPORT_SYMBOL drivers/media/video/videodev 0xe2b92059	v4l2_video_std_construct
+EXPORT_SYMBOL drivers/media/video/videodev 0xe62567a0	video_device_alloc
+EXPORT_SYMBOL drivers/media/video/videodev 0xf3251e7b	v4l2_norm_to_name
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x1614552d	videocodec_detach
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x4e8e259b	videocodec_unregister
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x9fd9c1a4	videocodec_attach
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0xeb068661	videocodec_register
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x20513fe9	memstick_add_host
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x3f25aeb4	memstick_unregister_driver
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x4e1d69c7	memstick_suspend_host
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x5b392d71	memstick_next_req
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x5d820a02	memstick_init_req_sg
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x70e61b7b	memstick_set_rw_addr
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x71bacaf2	memstick_free_host
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x90810e8a	memstick_init_req
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x99c0ae61	memstick_register_driver
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xa5c4f45d	memstick_remove_host
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xa6803e7c	memstick_new_req
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xc145c619	memstick_detect_change
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xcf794ea2	memstick_alloc_host
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xdafb83ab	memstick_resume_host
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x07b8b516	mpt_set_taskmgmt_in_progress_flag
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x134bad77	mpt_verify_adapter
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x17be567e	mpt_HardResetHandler
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x287e557d	mpt_print_ioc_summary
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x2f7fb3d0	mpt_findImVolumes
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x3794ec73	mpt_event_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x42205243	mpt_suspend
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4526289b	mpt_event_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x502108d0	mpt_fwfault_debug
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x5517dc4f	mpt_put_msg_frame_hi_pri
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x6397c80f	mpt_raid_phys_disk_pg1
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x6753bb27	mpt_attach
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x6d70020a	mpt_raid_phys_disk_pg0
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x796e0ed0	mpt_clear_taskmgmt_in_progress_flag
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x85166d87	mpt_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x916ba46f	mpt_GetIocState
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x932efc74	mpt_config
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xa39e8f7f	mptbase_sas_persist_operation
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xaadb63f0	mpt_halt_firmware
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xad33297f	mpt_put_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xaf0d50ee	mpt_detach
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xb9742979	mpt_send_handshake_request
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc0e69f82	mpt_device_driver_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc47c22e8	mpt_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xcb6e2ba7	mpt_get_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd1529b25	mpt_free_fw_memory
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd1ae4c4c	mpt_free_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd4d28711	mpt_alloc_fw_memory
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd9a92a75	mpt_reset_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xdbbf81b1	mpt_reset_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xdd805159	ioc_list
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xeb75a6ee	mpt_device_driver_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xf363d10b	mpt_raid_phys_disk_get_num_paths
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xf37443f5	mpt_resume
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x057ec2df	mptscsih_slave_destroy
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x07713753	mptscsih_bios_param
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x135e3a15	mptscsih_IssueTaskMgmt
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x137e1748	mptscsih_io_done
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x1f2ba01e	mptscsih_taskmgmt_response_code
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x2488a134	mptscsih_abort
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x32517596	mptscsih_get_scsi_lookup
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x41d2a113	mptscsih_change_queue_depth
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x4ec51ad0	mptscsih_is_phys_disk
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x5a5627c9	mptscsih_remove
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x66e309cb	mptscsih_qcmd
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x6e700dec	mptscsih_slave_configure
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x8582d34a	mptscsih_proc_info
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x8b10dc94	mptscsih_host_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x9a471a73	mptscsih_ioc_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xac09b2b3	mptscsih_dev_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xaff1b3e5	mptscsih_raid_id_to_num
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xbb8b78fe	mptscsih_bus_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xbe03f550	mptscsih_scandv_complete
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xc8204345	mptscsih_shutdown
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xcdaeff99	mptscsih_host_attrs
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xd442c01b	mptscsih_suspend
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xea2ab406	mptscsih_info
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xeb0381cf	mptscsih_taskmgmt_complete
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xed913300	mptscsih_event_process
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xf46de37d	mptscsih_resume
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x0923cf09	i2o_cntxt_list_add
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x1c5e231b	i2o_find_iop
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2002f5cb	i2o_driver_notify_controller_add_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x235b761b	i2o_msg_post_wait_mem
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x26e30126	i2o_parm_field_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2a542ca1	i2o_cntxt_list_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2a843bef	i2o_dump_message
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x3737ead9	i2o_driver_register
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x48bc9a5d	i2o_status_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x677c7858	i2o_iop_find_device
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x73c98f11	i2o_parm_issue
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x73da7bbb	i2o_event_register
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x81387fa8	i2o_device_claim_release
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x87465edc	i2o_cntxt_list_get_ptr
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x9299fa52	i2o_cntxt_list_remove
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x99fe9a9f	i2o_device_claim
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x9b0ca9f5	i2o_parm_table_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xa8d29a48	i2o_msg_get_wait
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb4c00dcf	i2o_controllers
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xbe48abca	i2o_driver_notify_device_add_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xc6281cd2	i2o_driver_notify_controller_remove_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xd2813f24	i2o_exec_lct_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xe2f8bca9	i2o_driver_notify_device_remove_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xe5b6415f	i2o_driver_unregister
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x0cfaf658	ab3100_get_chip_type
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x3338933f	ab3100_get_register_page_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x580fc7d5	ab3100_event_registers_startup_state_get
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x6e49dc06	ab3100_mask_and_set_register_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x7328a183	ab3100_event_register
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xa5b78c00	ab3100_get_register_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xa849e1b4	ab3100_set_register_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xf1a0b594	ab3100_event_unregister
+EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x03888060	pasic3_write_register
+EXPORT_SYMBOL drivers/mfd/htc-pasic3 0xa7756534	pasic3_read_register
+EXPORT_SYMBOL drivers/mfd/mfd-core 0xa6e9d06e	mfd_remove_devices
+EXPORT_SYMBOL drivers/mfd/mfd-core 0xb3c9a67e	mfd_add_devices
+EXPORT_SYMBOL drivers/mfd/tps65010 0x02d4ad0f	tps65013_set_low_pwr
+EXPORT_SYMBOL drivers/mfd/tps65010 0x28485130	tps65010_config_vregs1
+EXPORT_SYMBOL drivers/mfd/tps65010 0x33739de7	tps65010_set_vib
+EXPORT_SYMBOL drivers/mfd/tps65010 0x9fd44c69	tps65010_set_led
+EXPORT_SYMBOL drivers/mfd/tps65010 0xb14080cc	tps65010_set_low_pwr
+EXPORT_SYMBOL drivers/mfd/tps65010 0xd5bb106d	tps65010_set_vbus_draw
+EXPORT_SYMBOL drivers/mfd/tps65010 0xe99b3f36	tps65010_set_gpio_out_value
+EXPORT_SYMBOL drivers/misc/c2port/core 0x6ccfc3cb	c2port_device_register
+EXPORT_SYMBOL drivers/misc/c2port/core 0xf5746f21	c2port_device_unregister
+EXPORT_SYMBOL drivers/misc/ioc4 0x11bad31c	ioc4_register_submodule
+EXPORT_SYMBOL drivers/misc/ioc4 0xb0b1f4dd	ioc4_unregister_submodule
+EXPORT_SYMBOL drivers/misc/tifm_core 0x15fff54a	tifm_register_driver
+EXPORT_SYMBOL drivers/misc/tifm_core 0x24428a3f	tifm_alloc_device
+EXPORT_SYMBOL drivers/misc/tifm_core 0x37402c73	tifm_alloc_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0x8879f509	tifm_add_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0x91c4482b	tifm_has_ms_pif
+EXPORT_SYMBOL drivers/misc/tifm_core 0x937263c9	tifm_free_device
+EXPORT_SYMBOL drivers/misc/tifm_core 0x977d6c22	tifm_unmap_sg
+EXPORT_SYMBOL drivers/misc/tifm_core 0xa3cfeb7f	tifm_free_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0xb18fa43b	tifm_unregister_driver
+EXPORT_SYMBOL drivers/misc/tifm_core 0xb2c55790	tifm_map_sg
+EXPORT_SYMBOL drivers/misc/tifm_core 0xb904687e	tifm_remove_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0xbdbe82fe	tifm_eject
+EXPORT_SYMBOL drivers/misc/tifm_core 0xcd153284	tifm_queue_work
+EXPORT_SYMBOL drivers/mmc/card/mmc_block 0x2f7025d0	mmc_cleanup_queue
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x30cafcfd	cfi_fixup
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x5b3c4817	cfi_read_pri
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0xd176733e	cfi_varsize_frob
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x4ac80313	unregister_mtd_chip_driver
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x50034f9c	map_destroy
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0xb4cfe262	do_map_probe
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0xc9611e42	register_mtd_chip_driver
+EXPORT_SYMBOL drivers/mtd/chips/gen_probe 0x8ff090ea	mtd_do_chip_probe
+EXPORT_SYMBOL drivers/mtd/lpddr/lpddr_cmds 0x0f722d64	lpddr_cmdset
+EXPORT_SYMBOL drivers/mtd/maps/map_funcs 0x443ea61d	simple_map_init
+EXPORT_SYMBOL drivers/mtd/mtd 0x4088585d	add_mtd_partitions
+EXPORT_SYMBOL drivers/mtd/mtd 0xe9ce2acf	del_mtd_partitions
+EXPORT_SYMBOL drivers/mtd/mtdconcat 0x4b908506	mtd_concat_destroy
+EXPORT_SYMBOL drivers/mtd/mtdconcat 0x792a9049	mtd_concat_create
+EXPORT_SYMBOL drivers/mtd/nand/nand 0x6506f560	nand_default_bbt
+EXPORT_SYMBOL drivers/mtd/nand/nand 0x947076fd	nand_scan_bbt
+EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0x68d35fec	nand_calculate_ecc
+EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0xb4b94377	__nand_correct_data
+EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0xf7485e59	nand_correct_data
+EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0x836bdb72	nand_flash_ids
+EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0xa336feb7	nand_manuf_ids
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x1b3fd713	onenand_addr
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x3b6b40c6	onenand_default_bbt
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0xd5c82642	flexonenand_region
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0xe3475f00	onenand_scan_bbt
+EXPORT_SYMBOL drivers/net/8390 0x04d24f58	ei_set_multicast_list
+EXPORT_SYMBOL drivers/net/8390 0x0c20c141	ei_open
+EXPORT_SYMBOL drivers/net/8390 0x1b3b1f89	ei_start_xmit
+EXPORT_SYMBOL drivers/net/8390 0x2179a22b	ei_netdev_ops
+EXPORT_SYMBOL drivers/net/8390 0x5086100e	__alloc_ei_netdev
+EXPORT_SYMBOL drivers/net/8390 0x60d35734	ei_poll
+EXPORT_SYMBOL drivers/net/8390 0x6d29fb93	ei_close
+EXPORT_SYMBOL drivers/net/8390 0x7ac38a44	ei_get_stats
+EXPORT_SYMBOL drivers/net/8390 0x88f4fc62	NS8390_init
+EXPORT_SYMBOL drivers/net/8390 0xdd365790	ei_interrupt
+EXPORT_SYMBOL drivers/net/8390 0xff3de2f1	ei_tx_timeout
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x1ca0f70c	arcnet_open
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x23f86078	arcnet_interrupt
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x45910de4	arcnet_timeout
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x5b307075	arc_raw_proto
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x5bf42e19	arc_proto_default
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x6534792a	arcnet_debug
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xb44b4be1	arcnet_send_packet
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xb846ccea	alloc_arcdev
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xbbe6d378	arc_proto_map
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xbccba3e1	arc_bcast_proto
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xbe2f5248	arcnet_close
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xef6cb29c	arcnet_unregister_proto
+EXPORT_SYMBOL drivers/net/arcnet/com20020 0x576dd568	com20020_found
+EXPORT_SYMBOL drivers/net/arcnet/com20020 0x59d33c53	com20020_netdev_ops
+EXPORT_SYMBOL drivers/net/arcnet/com20020 0xbe8b1871	com20020_check
+EXPORT_SYMBOL drivers/net/bnx2 0x06d4e05e	bnx2_cnic_probe
+EXPORT_SYMBOL drivers/net/cnic 0x01133e3c	cnic_register_driver
+EXPORT_SYMBOL drivers/net/cnic 0x636af174	cnic_unregister_driver
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x0475192c	cxgb3_ofld_send
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x27743365	t3_l2t_get
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x4d021cee	t3_l2t_send_event
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x670fb448	cxgb3_free_stid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x69065ec4	dev2t3cdev
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x6a7eba71	t3_l2e_free
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x777aa476	cxgb3_remove_tid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x80560fbd	cxgb3_insert_tid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x840fb2c9	cxgb3_alloc_stid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x88b94d33	cxgb3_unregister_client
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x9926fa04	cxgb3_queue_tid_release
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xb1aa67a4	cxgb3_alloc_atid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xc0790cda	cxgb3_register_client
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xcfacc6e4	t3_l2t_send_slow
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xf0fcf401	t3_register_cpl_handler
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xf38e3e1d	cxgb3_free_atid
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x4f538172	hdlcdrv_register
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x60f413b7	hdlcdrv_transmitter
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x9014208b	hdlcdrv_arbitrate
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xb78f7834	hdlcdrv_receiver
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xe404cfb4	hdlcdrv_unregister
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x0dcae60f	sirdev_set_dtr_rts
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x35c33dcd	sirdev_raw_write
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x3d81ebce	sirdev_write_complete
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x4011b438	sirdev_raw_read
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x4a296e8d	sirdev_put_instance
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x622a839b	sirdev_get_instance
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x74df2524	irda_unregister_dongle
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x7dc21e82	sirdev_set_dongle
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x7dc51a5f	irda_register_dongle
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x7fbd6a7f	sirdev_receive
+EXPORT_SYMBOL drivers/net/mdio 0x0f934475	mdio45_ethtool_gset_npage
+EXPORT_SYMBOL drivers/net/mdio 0x22bce513	mdio_mii_ioctl
+EXPORT_SYMBOL drivers/net/mdio 0x43e4defc	mdio45_nway_restart
+EXPORT_SYMBOL drivers/net/mdio 0x7577f992	mdio_set_flag
+EXPORT_SYMBOL drivers/net/mdio 0xa1a29548	mdio45_probe
+EXPORT_SYMBOL drivers/net/mdio 0xb34a7575	mdio45_ethtool_spauseparam_an
+EXPORT_SYMBOL drivers/net/mdio 0xc6b1163f	mdio45_links_ok
+EXPORT_SYMBOL drivers/net/mii 0x1c485b6d	mii_ethtool_gset
+EXPORT_SYMBOL drivers/net/mii 0x2d3dbc4e	mii_check_gmii_support
+EXPORT_SYMBOL drivers/net/mii 0x4d5f2dca	mii_nway_restart
+EXPORT_SYMBOL drivers/net/mii 0x8dfaa3a3	mii_check_media
+EXPORT_SYMBOL drivers/net/mii 0xaddc6fb2	mii_ethtool_sset
+EXPORT_SYMBOL drivers/net/mii 0xb3af7cfa	mii_link_ok
+EXPORT_SYMBOL drivers/net/mii 0xf712e824	mii_check_link
+EXPORT_SYMBOL drivers/net/mii 0xfc748529	generic_mii_ioctl
+EXPORT_SYMBOL drivers/net/pppox 0x41ebd127	pppox_ioctl
+EXPORT_SYMBOL drivers/net/pppox 0x4f0a9b1e	pppox_unbind_sock
+EXPORT_SYMBOL drivers/net/pppox 0xe0ff7a18	unregister_pppox_proto
+EXPORT_SYMBOL drivers/net/pppox 0xe2053e75	register_pppox_proto
+EXPORT_SYMBOL drivers/net/sungem_phy 0x1df1fa8b	mii_phy_probe
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x14e05004	tms380tr_open
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x3776f226	tmsdev_term
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x44770ccc	tms380tr_netdev_ops
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x8c6ae8ab	tms380tr_close
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x95f5da85	tmsdev_init
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd2328794	tms380tr_wait
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd49af46e	tms380tr_interrupt
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x38da4725	cycx_intr
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x62be23ea	cycx_setup
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x66a4c4e6	cycx_down
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x968458a6	cycx_peek
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xb6f383de	cycx_poke
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xfe7cd576	cycx_exec
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x15d3c780	hdlc_close
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x2b81a79c	attach_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x314cfe16	hdlc_open
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x31a2da68	unregister_hdlc_device
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x3e23acdd	register_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x86cb01e2	alloc_hdlcdev
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xb952eb6f	hdlc_start_xmit
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xbdc264d5	hdlc_ioctl
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xd9c6e086	hdlc_change_mtu
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xdcf1c5fe	detach_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xe77178ed	unregister_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wireless/airo 0x2827f25e	stop_airo_card
+EXPORT_SYMBOL drivers/net/wireless/airo 0x2d30f605	init_airo_card
+EXPORT_SYMBOL drivers/net/wireless/airo 0x80e84e95	reset_airo_card
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x31219afb	ath_is_world_regd
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xbe25b39d	ath_regd_get_band_ctl
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xc9c28a83	ath_regd_init
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xd729b160	ath_rxbuf_alloc
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xfa1ba304	ath_reg_notifier_apply
+EXPORT_SYMBOL drivers/net/wireless/atmel 0x287f22b0	atmel_open
+EXPORT_SYMBOL drivers/net/wireless/atmel 0x93f3092c	stop_atmel_card
+EXPORT_SYMBOL drivers/net/wireless/atmel 0xe4484772	init_atmel_card
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x072c13e7	hostap_master_start_xmit
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x078c6eb3	hostap_set_multicast_list_queue
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x09f7ba61	hostap_info_process
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x0f00bd27	hostap_init_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x1889cccc	hostap_remove_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x1df5f968	hostap_set_encryption
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x2fedfb37	hostap_add_interface
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x36e61683	hostap_set_antsel
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x3ad6e7f2	hostap_set_roaming
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x3f50edfd	hostap_init_data
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x5e1c21d1	prism2_update_comms_qual
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x674bc7f2	hostap_init_ap_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x888a0e46	hostap_set_hostapd
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x9493b657	hostap_set_word
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x9c049f4a	hostap_handle_sta_tx_exc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x9ce973fc	hostap_set_hostapd_sta
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa12ad27f	hostap_dump_tx_header
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb22f7f2c	hostap_free_data
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb2a945e0	hostap_dump_rx_header
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb4b77c8b	hostap_80211_get_hdrlen
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xbb52aff1	hostap_set_auth_algs
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xbd29df74	hostap_80211_ops
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xc26c8675	hostap_remove_interface
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xd9f4ab39	hostap_info_init
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xe18424c2	hostap_80211_rx
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xe5d8d30c	hostap_set_string
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xe9d37f1f	hostap_check_sta_fw_version
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xebfa72a2	hostap_setup_dev
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf229d949	hostap_get_porttype
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x27b2a6d6	libipw_set_geo
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x313ec5f4	libipw_wx_get_encode
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x32c68415	libipw_change_mtu
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x3dd8f249	libipw_rx_mgt
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x56b54106	libipw_freq_to_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x5a205535	libipw_channel_to_freq
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x63f02dda	alloc_ieee80211
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x790e977c	libipw_get_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x8381b0aa	libipw_networks_age
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x96ece0dc	libipw_txb_free
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x97fc2652	free_ieee80211
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x9ab728df	libipw_channel_to_index
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xb46f380e	libipw_rx
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xc1598b3d	libipw_is_valid_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xcc55b3f6	libipw_wx_get_encodeext
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xda68fd5b	libipw_wx_set_encodeext
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xdb307e58	libipw_get_channel_flags
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xdc53fccd	libipw_wx_set_encode
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xdc55f1b2	libipw_xmit
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xe1321e1d	libipw_wx_get_scan
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xef5cbe8d	libipw_get_geo
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x033b12c0	iwl_set_default_wep_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x04c160d1	iwl_send_calib_results
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x05acf2f3	iwl_rxq_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x070a574b	iwl_mac_beacon_update
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x075ea3ee	iwl_full_rxon_required
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x09198517	iwl_send_lq_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0c0fe7fb	iwl_get_free_ucode_key_index
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0c65ce1d	iwl_reset_qos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0d21da60	iwl_rxon_add_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0ea23c77	iwl_eeprom_query16
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0f1d91d6	iwl_tx_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x119bec22	iwl_get_channel_info
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x11f03770	iwl_set_rxon_channel
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x14226d55	iwl_remove_default_wep_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x148029e8	iwl_eeprom_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1645bce5	iwl_mac_conf_tx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x177405a8	iwl_rx_csa
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x19759e39	iwl_rx_pm_sleep_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x19f0e900	iwl_debug_level
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1c87a857	iwl_set_hw_params
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d77b399	iwl_bcast_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1f0a7ea3	iwl_tx_queue_reclaim
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x251e7a05	iwl_irq_handle_error
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x26d5d7f4	iwl_ht_enabled
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x27ad8fdc	iwl_leds_register
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2986c993	iwl_tt_exit
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2a641415	iwl_init_sensitivity
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2bdb31d9	iwl_tx_skb
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2eab7873	iwlcore_eeprom_verify_signature
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x322c10de	iwl_rx_reply_rx_phy
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x34740c2e	iwl_bg_scan_check
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x36c23e70	iwl_pci_suspend
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x37501cf9	iwl_set_rxon_ht
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3770d783	iwl_set_rxon_chain
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x37883e9a	iwl_sensitivity_calibration
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x38e11b6c	iwl_find_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3acbdfec	iwl_rx_missed_beacon_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3bfad470	iwl_hw_detect
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x433b5f60	iwl_sta_rx_agg_start
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4416e045	iwl_init_channel_map
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x450ba208	iwl_send_statistics_request
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x45d5c180	iwlcore_eeprom_release_semaphore
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4686f25b	iwl_is_ht40_tx_allowed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x473fb03e	iwl_setup_rxon_timing
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4954b934	iwl_hw_txq_ctx_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4c79ad3c	iwl_send_bt_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4e119a5c	iwl_rx_reply_rx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4eaeb568	iwl_rx_reply_compressed_ba
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4f4cb245	iwl_setup_mac
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x51fe4ff0	iwl_add_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x52d894bf	iwl_pci_resume
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x566dbf1d	iwl_rx_replenish_now
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x57cbf908	iwl_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x59a713ca	iwl_is_monitor_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5cd22225	iwl_mac_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x605be248	iwl_cmd_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x60774702	iwl_queue_space
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x60ff549e	iwl_get_active_dwell_time
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6551de5d	iwl_rx_statistics
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6591b26f	iwl_eeprom_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6792ade4	iwl_bg_abort_scan
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6b782574	iwl_rx_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6fb326f8	iwl_disable_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x71e8e29e	iwl_send_cmd_pdu
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x720b0d56	iwl_send_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x72c777db	iwl_rx_queue_alloc
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x73ecfc9c	iwl_remove_dynamic_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x750a4ba7	iwl_sta_tx_modify_enable_tid
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x75aac8a3	iwl_tx_ant_restriction
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x76a9b007	iwl_send_static_wepkey_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x76c9d86f	iwl_chain_noise_calibration
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x77633fc1	iwl_check_rxon_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x78976e61	iwl_isr_legacy
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x78b905b4	iwl_scan_cancel
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7ce5be4d	iwl_hw_nic_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7d57ae08	iwl_tt_exit_ct_kill
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7f358a1e	iwl_rate_get_lowest_plcp
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x80599154	iwl_tt_handler
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x812a0671	iwlcore_free_geos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x84432233	iwl_clear_stations_table
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x84f362da	iwl_fill_probe_req
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8670273d	iwl_hwrate_to_plcp_idx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x885ca06e	iwl_setup_rx_scan_handlers
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8e550dd1	iwl_reset_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8fb1fb26	iwl_leds_unregister
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x93739e85	iwl_txq_check_empty
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x942c38fa	iwlcore_init_geos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x94c27947	iwl_rx_pm_debug_statistics_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x962eb765	iwl_free_channel_map
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x963c372b	iwl_set_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x99a0c939	iwlcore_eeprom_query_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9b17f926	iwl_mac_remove_interface
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9b864447	iwl_tx_cmd_complete
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9c35ab58	iwl_setup_scan_deferred_work
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9c75e95d	iwl_rx_replenish
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9eab727f	iwl_mac_reset_tsf
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9faced57	iwl_calib_set
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa3b46c78	iwl_tx_queue_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa40ec1bf	iwl_eeprom_get_mac
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa87d7ad2	iwl_mac_get_tx_stats
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa999a578	iwl_get_ra_sta_id
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xabe2f93e	iwl_update_tkip_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xae0bea67	iwl_activate_qos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaee6fef4	iwlcore_eeprom_acquire_semaphore
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb37102b5	iwl_mac_add_interface
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb74014bc	iwl_alloc_all
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb757f33d	iwl_scan_cancel_timeout
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb87fc83d	iwl_connection_init_rx_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbcf85a52	iwl_rf_kill_ct_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbdcbeff0	iwl_txq_update_write_ptr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc064434a	iwl_free_tfds_in_queue
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc28b6b9d	iwl_set_tx_power
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc4735d26	iwl_send_cmd_sync
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc620ef36	iwl_rx_queue_restock
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc7794b30	iwl_bg_scan_completed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcbaf4931	get_cmd_string
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xce339f34	iwl_alloc_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcf924791	iwl_get_sta_id
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd2e3c1de	iwl_txq_ctx_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd2f5c3be	iwl_reset_run_time_calib
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd3c5323a	iwl_rx_reply_error
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd4726e50	iwl_uninit_drv
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd5f4b711	iwl_set_rxon_hwcrypto
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd60d54c6	iwlcore_eeprom_enhanced_txpower
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd7038069	iwl_tt_initialize
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd8a4ef77	iwl_set_decrypted_flag
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd9bbb935	iwl_eeprom_query_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xda8e6678	iwl_get_passive_dwell_time
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdb90429a	iwl_power_initialize
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdcd774e0	iwl_mac_hw_scan
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xde527b2b	iwl_init_drv
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdeda8f82	iwl_verify_ucode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdefd1a08	iwl_send_add_sta
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe0436619	iwl_hwrate_to_tx_control
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe0955a36	iwl_tt_enter_ct_kill
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe3686c80	iwl_send_cmd_pdu_async
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe7ce5d70	iwl_rates
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xeaefa895	iwl_sta_rx_agg_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xec45441a	iwl_tx_agg_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf39e8228	iwl_set_dynamic_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf4c1835e	iwl_rx_queue_space
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf604c89d	iwl_bss_info_changed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf6beddf9	iwl_power_update_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf908fdf2	iwl_free_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf940fd0c	iwl_tx_agg_start
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfb41bf5b	iwl_eeprom_check_version
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfb8a3e28	iwl_rx_queue_update_write_ptr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfc59e09d	iwl_configure_filter
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x152b7b71	free_orinocodev
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x18c06c9e	orinoco_if_del
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x4196c38b	hermes_write_ltv
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x5d10afbe	orinoco_up
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x6a927e18	orinoco_interrupt
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x8f8b1889	orinoco_down
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xa031d8e4	hermes_doicmd_wait
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc60b5e9e	hermes_bap_pwrite
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc8d2c9dd	orinoco_init
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd38d8ae2	hermes_read_ltv
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd3f714e5	hermes_bap_pread
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5168829	hermes_allocate
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5336e5d	hermes_init
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd54e219d	hermes_docmd_wait
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd8e5299c	orinoco_if_add
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xed47b224	hermes_struct_init
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xf81be8d8	alloc_orinocodev
+EXPORT_SYMBOL drivers/parport/parport 0x00e42e73	parport_read
+EXPORT_SYMBOL drivers/parport/parport 0x27e17965	parport_write
+EXPORT_SYMBOL drivers/parport/parport 0x2ee37444	parport_remove_port
+EXPORT_SYMBOL drivers/parport/parport 0x3831caeb	parport_find_base
+EXPORT_SYMBOL drivers/parport/parport 0x4d2a941b	parport_ieee1284_interrupt
+EXPORT_SYMBOL drivers/parport/parport 0x5272fbdc	parport_unregister_device
+EXPORT_SYMBOL drivers/parport/parport 0x57e2f4bf	parport_ieee1284_ecp_write_addr
+EXPORT_SYMBOL drivers/parport/parport 0x5b432578	parport_ieee1284_epp_write_addr
+EXPORT_SYMBOL drivers/parport/parport 0x5c87b79c	parport_ieee1284_epp_read_addr
+EXPORT_SYMBOL drivers/parport/parport 0x64155ac3	parport_register_driver
+EXPORT_SYMBOL drivers/parport/parport 0x6688cb09	parport_put_port
+EXPORT_SYMBOL drivers/parport/parport 0x717195d4	parport_claim_or_block
+EXPORT_SYMBOL drivers/parport/parport 0x737a8d3b	parport_ieee1284_ecp_write_data
+EXPORT_SYMBOL drivers/parport/parport 0x7811cd05	parport_announce_port
+EXPORT_SYMBOL drivers/parport/parport 0x7f79817d	parport_get_port
+EXPORT_SYMBOL drivers/parport/parport 0x7fdb5cfc	parport_ieee1284_epp_write_data
+EXPORT_SYMBOL drivers/parport/parport 0x871af0ab	parport_ieee1284_write_compat
+EXPORT_SYMBOL drivers/parport/parport 0x87285a52	parport_find_number
+EXPORT_SYMBOL drivers/parport/parport 0x987440d3	parport_wait_peripheral
+EXPORT_SYMBOL drivers/parport/parport 0x9c3c2e29	parport_ieee1284_read_byte
+EXPORT_SYMBOL drivers/parport/parport 0x9d5eff70	parport_irq_handler
+EXPORT_SYMBOL drivers/parport/parport 0xa8530b3b	parport_release
+EXPORT_SYMBOL drivers/parport/parport 0xaf9cba01	parport_register_port
+EXPORT_SYMBOL drivers/parport/parport 0xb02e17d0	parport_wait_event
+EXPORT_SYMBOL drivers/parport/parport 0xb81338b2	parport_negotiate
+EXPORT_SYMBOL drivers/parport/parport 0xc1ea9ac2	parport_ieee1284_ecp_read_data
+EXPORT_SYMBOL drivers/parport/parport 0xc5b56005	parport_register_device
+EXPORT_SYMBOL drivers/parport/parport 0xdbb53f27	parport_claim
+EXPORT_SYMBOL drivers/parport/parport 0xdc1647ce	parport_set_timeout
+EXPORT_SYMBOL drivers/parport/parport 0xe1670591	parport_unregister_driver
+EXPORT_SYMBOL drivers/parport/parport 0xf6bf42fe	parport_ieee1284_epp_read_data
+EXPORT_SYMBOL drivers/parport/parport 0xfc96c764	parport_ieee1284_read_nibble
+EXPORT_SYMBOL drivers/parport/parport_pc 0x582f35fc	parport_pc_unregister_port
+EXPORT_SYMBOL drivers/parport/parport_pc 0xb87a368f	parport_pc_probe_port
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x0947bb9f	pcmcia_get_window
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x1efd69fe	pcmcia_request_io
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x2a6398ab	pcmcia_loop_config
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x3b8d64bb	pcmcia_release_window
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x40ce98e0	pcmcia_disable_device
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4fd033a0	pcmcia_error_func
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x6f59a4db	pcmcia_access_configuration_register
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x6ff27fc3	pcmcia_map_mem_page
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xa4867be2	pcmcia_register_driver
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xb58a1d65	pcmcia_modify_configuration
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xcf137ca6	pcmcia_request_irq
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xd707e05e	pcmcia_dev_present
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xd8f0339a	pcmcia_request_window
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xe962b2cd	pcmcia_unregister_driver
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf0a25e12	pcmcia_error_ret
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf5ec950b	pcmcia_request_configuration
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xfd61f9a7	pcmcia_get_mem_page
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x1578d7ea	pcmcia_unregister_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x212db8d2	pcmcia_socket_list
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x2173bb55	pcmcia_socket_dev_resume
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x344cce4e	pcmcia_write_cis_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x396a2e47	pcmcia_adjust_io_region
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x397f78f0	pccard_get_first_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x3f7d0075	pcmcia_validate_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x49d5df6d	pcmcia_get_socket_by_nr
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x4fda23c1	release_cis_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x5f324a03	pccard_static_ops
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x5f42a69d	pcmcia_socket_list_rwsem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x64fd5567	pcmcia_parse_events
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x6bf6c7aa	pcmcia_resume_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x6c387b34	pcmcia_replace_cis
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x6d472655	pcmcia_insert_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x7692e741	pcmcia_find_mem_region
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x80d05901	destroy_cis_cache
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x82c23b4d	pccard_get_next_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x902ac01f	pcmcia_find_io_region
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x921ba8e4	pcmcia_socket_dev_late_resume
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x936a62ff	pcmcia_put_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x9895dfca	pccard_get_tuple_data
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x9b55634f	pcmcia_socket_dev_early_resume
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc02ef2c8	pcmcia_parse_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xceeccefd	pcmcia_suspend_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcf97f3bd	dead_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcfc4c37f	pccard_register_pcmcia
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xdc2d15d0	pcmcia_reset_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xddcc8ebb	pcmcia_eject_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xe90c6da1	pccard_read_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf33ed82d	pcmcia_socket_class
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf6167d43	pcmcia_register_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf7c73603	pcmcia_get_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf9450dfa	pcmcia_socket_dev_suspend
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf9ba760c	pcmcia_read_cis_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xfd0f29f1	pccard_validate_cis
+EXPORT_SYMBOL drivers/pcmcia/rsrc_nonstatic 0x37c03614	pccard_nonstatic_ops
+EXPORT_SYMBOL drivers/platform/x86/sony-laptop 0x5bb1e117	sony_pic_camera_command
+EXPORT_SYMBOL drivers/pps/pps_core 0x1e145952	pps_unregister_source
+EXPORT_SYMBOL drivers/pps/pps_core 0x51d00b2c	pps_register_source
+EXPORT_SYMBOL drivers/pps/pps_core 0xe6a16116	pps_event
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x11d047f7	fcoe_ctlr_els_send
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x1339dfcd	fcoe_ctlr_link_up
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x1b0ac9b4	fcoe_ctlr_recv_flogi
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x1c504efc	fcoe_ctlr_destroy
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x670de47d	fcoe_ctlr_init
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x9a91b0eb	fcoe_ctlr_recv
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x9dbfb5db	fcoe_ctlr_link_down
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x05ac2fa2	fc_frame_crc_check
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x076a0909	fc_seq_start_next
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1944e44b	fc_seq_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x258fa46a	fc_slave_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x30815a87	fc_get_host_port_state
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x36e5fbaf	fc_cpu_mask
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x38e450c3	fc_seq_els_rsp_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x3c1a4154	fc_linkdown
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x3e371f0b	fc_lport_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x4134b99e	fc_lport_config
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x45657913	fc_exch_mgr_free
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x52f36eb3	fc_get_host_stats
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x56183917	fc_destroy_rport
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x57c59e2f	fc_fcp_complete
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x5fdcc69c	fc_lport_destroy
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x63d1509b	fc_eh_device_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x65951ec6	fc_get_host_port_type
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x67750428	fc_exch_done
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x73811b8e	fc_change_queue_type
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x77cc7855	fc_rport_terminate_io
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x7831c689	fc_exch_recv
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x9895c1b5	fc_exch_mgr_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xaca6292d	fc_exch_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xaf901369	fc_fcp_ddp_setup
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb5b79890	fc_disc_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb65cadc6	fc_exch_seq_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xba701310	fc_eh_abort
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xbc592102	fc_get_host_speed
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xc39a6f17	fc_set_mfs
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xc6e8e55a	fc_change_queue_depth
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd224d02a	fc_fcp_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd4b4c6e5	fc_exch_mgr_add
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd6cb3359	fc_setup_rport
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xda2be2bb	fc_rport_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xde44e8b6	fc_lport_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xdf1b4004	fc_queuecommand
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe2b7888c	fc_exch_mgr_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe6d92439	fc_fabric_login
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe97d9794	fc_eh_host_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xeb6b61ba	fc_exch_mgr_del
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xebcd93f3	fc_set_rport_loss_tmo
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xedfa2b49	__fc_frame_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf03f3c57	fc_fcp_destroy
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf412a4b8	fc_fabric_logoff
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf68484e3	fc_elsct_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf7365d60	fc_seq_exch_abort
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf799ea24	fc_linkup
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xfd6f3443	fc_exch_alloc
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x2250c66e	mraid_mm_adapter_app_handle
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x43a0c386	mraid_mm_register_adp
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x512c956d	mraid_mm_unregister_adp
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x00e5ef1a	osd_req_get_attributes
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x05b1e276	osd_req_set_attributes
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0af11365	osd_req_flush_partition
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0c17edb1	osd_sec_init_nosec_doall_caps
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0e10434c	osd_req_write_kern
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x21562667	osd_end_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x2947bdf1	osd_req_list_collection_objects
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x31db7976	osd_req_read
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x4854529d	osd_req_remove_object
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x4a169a8b	osd_req_create_partition
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x534cd95d	osd_auto_detect_ver
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x6058c67b	osd_req_add_get_attr_page
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x6270ea71	osd_req_list_partition_collections
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x65bd9f80	osd_start_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x679058d8	osd_req_create_object
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x68e5f6c1	osd_req_flush_collection
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x6d146232	osd_req_list_dev_partitions
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x79c0a54e	osd_req_add_set_attr_list
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x8631c108	osd_dev_init
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x8ecaa18c	osd_finalize_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xa28067d0	osd_req_format
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xa6fe5a07	osd_req_write
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xb6d144eb	osd_req_decode_sense_full
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xb95d7af3	osd_req_flush_obsd
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xbfe3a1e6	osd_execute_request_async
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xc4f9738c	osd_dev_fini
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xce612ecd	osd_req_list_partition_objects
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xcf7e7616	osd_req_read_kern
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xd37b42c9	osd_req_add_get_attr_list
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe504fc6f	osd_req_decode_get_attr_list
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xea2fa4f0	osd_req_flush_object
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xecc188bb	osd_req_remove_partition
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xfe3c5ee4	osd_execute_request
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x5fc48609	osduld_unregister_test
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x9ee6f543	osduld_register_test
+EXPORT_SYMBOL drivers/scsi/osd/osd 0xdcd5aaa7	osduld_path_lookup
+EXPORT_SYMBOL drivers/scsi/osd/osd 0xf016b632	osduld_put_device
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x1a416c0b	qlogicfas408_bus_reset
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x3fd8cd71	qlogicfas408_detect
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x7c3857fb	qlogicfas408_info
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x879ef7b6	qlogicfas408_queuecommand
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x8bfe55c7	qlogicfas408_disable_ints
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xd52ec735	qlogicfas408_biosparam
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xdc310b12	qlogicfas408_ihandl
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xe14949f4	qlogicfas408_abort
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xe76b3b20	qlogicfas408_get_chip_type
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xf2b95199	qlogicfas408_setup
+EXPORT_SYMBOL drivers/scsi/raid_class 0x2b75cd72	raid_class_attach
+EXPORT_SYMBOL drivers/scsi/raid_class 0x5916a2d9	raid_class_release
+EXPORT_SYMBOL drivers/scsi/raid_class 0x967cd416	raid_component_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x00115795	fc_remote_port_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x06b84227	fc_host_post_event
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x079dd0d9	fc_attach_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x2a8644b5	scsi_is_fc_rport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x30e7dbc0	fc_vport_terminate
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x5aa2a5d4	fc_host_post_vendor_event
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x6766f9ba	fc_vport_create
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x7954b1ea	fc_get_event_number
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x7c4c930e	fc_remote_port_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x7fbdcae8	fc_release_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x816ee9b4	fc_remote_port_rolechg
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xc4bb497c	fc_remove_host
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xe2132001	scsi_is_fc_vport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x0853ea9c	sas_release_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x089f4f29	sas_phy_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x0d942807	sas_phy_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x1b5cc435	sas_remove_children
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x41ca1b5f	scsi_is_sas_rphy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x457bfe3c	sas_phy_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x4b153957	sas_end_device_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x528ed339	sas_remove_host
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x71838b71	sas_expander_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x73734176	sas_rphy_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x77a82e83	sas_rphy_remove
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x932e024e	sas_port_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x9d710719	sas_read_port_mode_page
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xa206798a	sas_port_alloc_num
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xa63eb0ae	scsi_is_sas_port
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xb1df3d61	sas_port_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xc0baf501	sas_port_add_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xc3f6f246	sas_rphy_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xcaca1a54	sas_port_delete_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xd112ff94	scsi_is_sas_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xd6e36cbc	sas_phy_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xdc5fe00a	sas_port_mark_backlink
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xe5b9a190	sas_attach_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xecbffab3	sas_port_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xecdb75be	sas_rphy_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xf475b1be	sas_port_alloc
+EXPORT_SYMBOL drivers/ssb/ssb 0x09aeb7ae	ssb_dma_free_consistent
+EXPORT_SYMBOL drivers/ssb/ssb 0x14c50b88	ssb_bus_sdiobus_register
+EXPORT_SYMBOL drivers/ssb/ssb 0x281ce39c	ssb_bus_resume
+EXPORT_SYMBOL drivers/ssb/ssb 0x55bfac71	ssb_bus_may_powerdown
+EXPORT_SYMBOL drivers/ssb/ssb 0x66df93d9	ssb_driver_unregister
+EXPORT_SYMBOL drivers/ssb/ssb 0x67d86a1d	ssb_dma_translation
+EXPORT_SYMBOL drivers/ssb/ssb 0x6a8d325c	ssb_device_is_enabled
+EXPORT_SYMBOL drivers/ssb/ssb 0x6cb62223	ssb_dma_set_mask
+EXPORT_SYMBOL drivers/ssb/ssb 0x72043b04	__ssb_driver_register
+EXPORT_SYMBOL drivers/ssb/ssb 0x75abeb70	ssb_dma_alloc_consistent
+EXPORT_SYMBOL drivers/ssb/ssb 0x835cc432	ssb_pcicore_dev_irqvecs_enable
+EXPORT_SYMBOL drivers/ssb/ssb 0x8c8ed024	ssb_device_disable
+EXPORT_SYMBOL drivers/ssb/ssb 0xb35a3c36	ssb_bus_powerup
+EXPORT_SYMBOL drivers/ssb/ssb 0xb85e77d0	ssb_set_devtypedata
+EXPORT_SYMBOL drivers/ssb/ssb 0xb9f54748	ssb_clockspeed
+EXPORT_SYMBOL drivers/ssb/ssb 0xbb0d3013	ssb_pmu_set_ldo_voltage
+EXPORT_SYMBOL drivers/ssb/ssb 0xbfa4b9bb	ssb_bus_unregister
+EXPORT_SYMBOL drivers/ssb/ssb 0xc0512e0f	ssb_admatch_base
+EXPORT_SYMBOL drivers/ssb/ssb 0xd481192b	ssb_admatch_size
+EXPORT_SYMBOL drivers/ssb/ssb 0xdcbe42e7	ssb_bus_suspend
+EXPORT_SYMBOL drivers/ssb/ssb 0xe52b17b4	ssb_pcihost_register
+EXPORT_SYMBOL drivers/ssb/ssb 0xf35a4f7a	ssb_bus_pcibus_register
+EXPORT_SYMBOL drivers/ssb/ssb 0xf9b627ea	ssb_device_enable
+EXPORT_SYMBOL drivers/ssb/ssb 0xfd348027	ssb_pmu_set_ldo_paref
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x052befd9	comedi_buf_memcpy_from
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x0900f0f7	comedi_buf_put
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x0cd330f4	range_unknown
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x22bd1a96	check_chanlist
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x2f0ad9d3	range_bipolar5
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x37ec58d9	comedi_buf_memcpy_to
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x3ceec4dd	comedi_buf_write_free
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x4fe634f3	range_bipolar2_5
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x5015f6a2	comedi_driver_register
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x5062f102	comedi_buf_write_alloc
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x62a49be7	comedi_reset_async_buf
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x7797e5ba	comedi_buf_read_alloc
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x8113872c	range_unipolar10
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x89dddbe2	comedi_driver_unregister
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x90e8026c	comedi_buf_read_n_available
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xad783fa4	comedi_buf_read_free
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xb4552e9c	comedi_get_subdevice_runflags
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xbb52fc7f	range_bipolar10
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xdb2044b2	range_unipolar5
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xec274cad	comedi_event
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xf09e2d5e	comedi_set_subdevice_runflags
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xf5d468a4	comedi_buf_get
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xf85d89a9	comedi_error
+EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0x9920ad48	subdev_8255_init_irq
+EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0xcfde159e	subdev_8255_init
+EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0xec0f6546	subdev_8255_cleanup
+EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0xf88c09d6	subdev_8255_interrupt
+EXPORT_SYMBOL drivers/staging/comedi/drivers/comedi_fc 0x030eaa2d	cfc_read_array_from_buffer
+EXPORT_SYMBOL drivers/staging/comedi/drivers/comedi_fc 0x347008d9	cfc_handle_events
+EXPORT_SYMBOL drivers/staging/comedi/drivers/comedi_fc 0xb41ec354	cfc_write_array_to_buffer
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x12b13134	mite_bytes_written_to_memory_ub
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x14a25a20	mite_done
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x17ecac26	mite_dma_arm
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x21460e22	mite_buf_change
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x287539c0	mite_get_status
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x421ffa5e	mite_devices
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x4625eb10	mite_setup2
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x544f7c5b	mite_sync_input_dma
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x569ae137	mite_sync_output_dma
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x64546b31	mite_bytes_written_to_memory_lb
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x8310f666	mite_setup
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x845df2ac	mite_dma_tcr
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x87a79a9b	mite_bytes_in_transit
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x880c1518	mite_unsetup
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x9230c76d	mite_prep_dma
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x9ae46763	mite_release_channel
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x9fd1a410	mite_bytes_read_from_memory_lb
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xa1c63a7a	mite_dma_disarm
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xd48089cf	mite_request_channel_in_range
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xe934fe15	mite_bytes_read_from_memory_ub
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xfb3ba025	mite_list_devices
+EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0x33ad6762	subdev_700_init_irq
+EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0x70e9192b	subdev_700_init
+EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0x910940f6	subdev_700_cleanup
+EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0xfe6d7f6e	subdev_700_interrupt
+EXPORT_SYMBOL drivers/staging/comedi/drivers/pcm_common 0x2480c8c7	comedi_pcm_cmdtest
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x042d55f4	comedi_loglevel
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x0488ce0e	comedi_get_n_ranges
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x0cad1c36	comedi_get_subdevice_type
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x13e3042c	comedi_command
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x194eb4ae	comedi_get_n_channels
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x1c5555d9	comedi_cancel
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x1ec0e2d3	comedi_get_buf_head_pos
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x22318694	comedi_set_user_int_count
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x262e9c18	comedi_dio_write
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x370d69d5	comedi_dio_read
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x3cb614fc	comedi_data_write
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x3db41e4f	comedi_poll
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x3de6a4a3	comedi_get_buffer_offset
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x409d3263	comedi_do_insn
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x51da786d	comedi_register_callback
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x52769094	comedi_find_subdevice_by_type
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x628ed463	comedi_get_n_subdevices
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x671c2623	comedi_get_buffer_size
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x696272c9	comedi_unlock
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x826bd656	comedi_data_read_delayed
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x8e199bbf	comedi_perror
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x8fb4413e	comedi_data_read_hint
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x9b266320	comedi_get_krange
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x9dde39b5	comedi_strerror
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xa0334b40	comedi_get_driver_name
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xa094eab0	comedi_get_board_name
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xa7c55c52	comedi_open
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xaa456501	comedi_mark_buffer_read
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xb45b8b7b	comedi_mark_buffer_written
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xb5396dad	comedi_get_maxdata
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xb5c3ac2a	comedi_map
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xc4ec62b3	comedi_get_len_chanlist
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xc7d949df	comedi_lock
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xd2a9a259	comedi_get_version_code
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xd46a9468	comedi_dio_config
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xd48facbb	comedi_command_test
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xddd89421	comedi_close
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xe2208940	comedi_data_read
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xe38c6fb4	comedi_unmap
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xed5731a4	comedi_get_subdevice_flags
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xefd0c778	comedi_fileno
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xf17e03df	comedi_dio_bitfield
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xf71581db	comedi_get_buffer_contents
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x13b05e5e	cx25821_sram_channel_dump_audio
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x1e2519cb	cx25821_dev_unregister
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x2278ff04	cx25821_set_gpiopin_direction
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x471e1cfb	cx25821_devlist
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x582ef98e	cx25821_risc_databuffer_audio
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x67cc5b8b	cx25821_sram_channels
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x784853c3	cx25821_print_irqbits
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x9e05feff	cx25821_sram_channel_dump
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x9f29907c	cx25821_sram_channel_setup
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0xb25061bc	cx25821_sram_channel_setup_audio
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0xd1dea060	cx25821_dev_get
+EXPORT_SYMBOL drivers/staging/hv/hv_vmbus 0x253f3d14	vmbus_get_interface
+EXPORT_SYMBOL drivers/staging/hv/hv_vmbus 0x3fe0717e	vmbus_child_driver_unregister
+EXPORT_SYMBOL drivers/staging/hv/hv_vmbus 0xc3af681e	vmbus_child_driver_register
+EXPORT_SYMBOL drivers/staging/hv/hv_vmbus 0xdf1a5ef6	vmbus_loglevel
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x14d05ef4	iio_class
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x1afa4594	iio_allocate_device
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x3ce8fa88	iio_device_unregister
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x46ea0088	iio_register_interrupt_line
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x739ae300	iio_devt
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x8bcb7b58	iio_read_const_attr
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x8fc02bec	iio_push_event
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x925be768	iio_add_event_to_list
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xb75445d2	iio_remove_event_from_list
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xc333bd58	iio_unregister_interrupt_line
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xcb842df9	__iio_change_event
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xe5a60398	__iio_push_event
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xea831a6b	iio_get_new_idr_val
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xebc5a780	iio_free_device
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xfcfb4aae	iio_free_idr_val
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xfdfa9c38	iio_device_register
+EXPORT_SYMBOL drivers/staging/line6/line6usb 0x2706b069	pod_create_files
+EXPORT_SYMBOL drivers/staging/line6/line6usb 0x2bf523b5	variax_remove_files
+EXPORT_SYMBOL drivers/staging/line6/line6usb 0x53ae0e1c	variax_create_files
+EXPORT_SYMBOL drivers/staging/line6/line6usb 0xfc6138de	pod_remove_files
+EXPORT_SYMBOL drivers/staging/rar/rar_driver 0xf8017f03	get_rar_address
+EXPORT_SYMBOL drivers/staging/vme/vme 0x00d7e722	vme_lm_count
+EXPORT_SYMBOL drivers/staging/vme/vme 0x072f901c	vme_master_rmw
+EXPORT_SYMBOL drivers/staging/vme/vme 0x09c8ee6d	vme_unregister_bridge
+EXPORT_SYMBOL drivers/staging/vme/vme 0x0df85126	vme_generate_irq
+EXPORT_SYMBOL drivers/staging/vme/vme 0x0e10859d	vme_lm_get
+EXPORT_SYMBOL drivers/staging/vme/vme 0x0ec5babe	vme_dma_free
+EXPORT_SYMBOL drivers/staging/vme/vme 0x16acfb28	vme_request_irq
+EXPORT_SYMBOL drivers/staging/vme/vme 0x2b56167f	vme_master_request
+EXPORT_SYMBOL drivers/staging/vme/vme 0x3f68d4cf	vme_lm_set
+EXPORT_SYMBOL drivers/staging/vme/vme 0x435705ec	vme_bus_type
+EXPORT_SYMBOL drivers/staging/vme/vme 0x43e2f154	vme_master_read
+EXPORT_SYMBOL drivers/staging/vme/vme 0x48b99a13	vme_lm_free
+EXPORT_SYMBOL drivers/staging/vme/vme 0x52da85ed	vme_register_bridge
+EXPORT_SYMBOL drivers/staging/vme/vme 0x6666140f	vme_dma_pci_attribute
+EXPORT_SYMBOL drivers/staging/vme/vme 0x76bab4d4	vme_master_set
+EXPORT_SYMBOL drivers/staging/vme/vme 0x7754663b	vme_alloc_consistent
+EXPORT_SYMBOL drivers/staging/vme/vme 0x7797a741	vme_dma_vme_attribute
+EXPORT_SYMBOL drivers/staging/vme/vme 0x7cf35220	vme_master_free
+EXPORT_SYMBOL drivers/staging/vme/vme 0x81d0e2d3	vme_unregister_driver
+EXPORT_SYMBOL drivers/staging/vme/vme 0x8a114893	vme_free_irq
+EXPORT_SYMBOL drivers/staging/vme/vme 0x92fa5abb	vme_lm_detach
+EXPORT_SYMBOL drivers/staging/vme/vme 0x99afb36d	vme_dma_list_free
+EXPORT_SYMBOL drivers/staging/vme/vme 0x9a434b8a	vme_register_driver
+EXPORT_SYMBOL drivers/staging/vme/vme 0x9aeb07e8	vme_lm_attach
+EXPORT_SYMBOL drivers/staging/vme/vme 0x9d279035	vme_master_write
+EXPORT_SYMBOL drivers/staging/vme/vme 0xa09d045f	vme_get_size
+EXPORT_SYMBOL drivers/staging/vme/vme 0xa96b09f0	vme_new_dma_list
+EXPORT_SYMBOL drivers/staging/vme/vme 0xab2d1177	vme_lm_request
+EXPORT_SYMBOL drivers/staging/vme/vme 0xadab3e95	vme_dma_list_exec
+EXPORT_SYMBOL drivers/staging/vme/vme 0xc65963af	vme_slot_get
+EXPORT_SYMBOL drivers/staging/vme/vme 0xc8352002	vme_dma_pattern_attribute
+EXPORT_SYMBOL drivers/staging/vme/vme 0xcc5b0af0	vme_slave_set
+EXPORT_SYMBOL drivers/staging/vme/vme 0xcdf1cd73	vme_slave_request
+EXPORT_SYMBOL drivers/staging/vme/vme 0xdff905e5	vme_slave_free
+EXPORT_SYMBOL drivers/staging/vme/vme 0xe0267ca6	vme_request_dma
+EXPORT_SYMBOL drivers/staging/vme/vme 0xe60cbb2f	vme_master_get
+EXPORT_SYMBOL drivers/staging/vme/vme 0xe61b1e0b	vme_slave_get
+EXPORT_SYMBOL drivers/staging/vme/vme 0xe8e720dc	vme_dma_list_add
+EXPORT_SYMBOL drivers/staging/vme/vme 0xeccbeafc	vme_dma_free_attribute
+EXPORT_SYMBOL drivers/staging/vme/vme 0xf1b1bb11	vme_free_consistent
+EXPORT_SYMBOL drivers/telephony/ixj 0x5ebf4d30	ixj_pcmcia_probe
+EXPORT_SYMBOL drivers/telephony/phonedev 0x1eb0744f	phone_register_device
+EXPORT_SYMBOL drivers/telephony/phonedev 0xe133ef3a	phone_unregister_device
+EXPORT_SYMBOL drivers/usb/gadget/dummy_hcd 0x456d879a	usb_gadget_register_driver
+EXPORT_SYMBOL drivers/usb/gadget/dummy_hcd 0x83b80db7	usb_gadget_unregister_driver
+EXPORT_SYMBOL drivers/usb/gadget/dummy_hcd 0xd796ced3	net2280_set_fifo_mode
+EXPORT_SYMBOL drivers/usb/host/sl811-hcd 0x938c6fed	sl811h_driver
+EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xa64a4cea	usb_nop_xceiv_unregister
+EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xd0e43207	usb_nop_xceiv_register
+EXPORT_SYMBOL drivers/usb/serial/usbserial 0xc3322662	usb_serial_suspend
+EXPORT_SYMBOL drivers/usb/serial/usbserial 0xf07ccf5e	usb_serial_resume
+EXPORT_SYMBOL drivers/video/backlight/generic_bl 0xc86baa7c	corgibl_limit_intensity
+EXPORT_SYMBOL drivers/video/backlight/lcd 0x50bf9440	lcd_device_register
+EXPORT_SYMBOL drivers/video/backlight/lcd 0xf2cfac64	lcd_device_unregister
+EXPORT_SYMBOL drivers/video/console/bitblit 0x45f58f10	fbcon_set_bitops
+EXPORT_SYMBOL drivers/video/console/font 0x09c8eb55	font_vga_8x16
+EXPORT_SYMBOL drivers/video/console/font 0xbb99125c	get_default_font
+EXPORT_SYMBOL drivers/video/console/font 0xf7584a9c	find_font
+EXPORT_SYMBOL drivers/video/console/softcursor 0xc3787796	soft_cursor
+EXPORT_SYMBOL drivers/video/console/tileblit 0x46537efd	fbcon_set_tileops
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x0cc3ede5	cyber2000fb_detach
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x41a649f7	cyber2000fb_get_fb_var
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x81483453	cyber2000fb_disable_extregs
+EXPORT_SYMBOL drivers/video/cyber2000fb 0xa0ecaf53	cyber2000fb_attach
+EXPORT_SYMBOL drivers/video/cyber2000fb 0xac44a336	cyber2000fb_enable_extregs
+EXPORT_SYMBOL drivers/video/display/display 0x4a368e2d	display_device_unregister
+EXPORT_SYMBOL drivers/video/display/display 0x4d297708	display_device_register
+EXPORT_SYMBOL drivers/video/macmodes 0x08ed0b62	mac_vmode_to_var
+EXPORT_SYMBOL drivers/video/macmodes 0x8428e963	mac_find_mode
+EXPORT_SYMBOL drivers/video/macmodes 0xe2304303	mac_map_monitor_sense
+EXPORT_SYMBOL drivers/video/matrox/g450_pll 0x6a123521	matroxfb_g450_setpll_cond
+EXPORT_SYMBOL drivers/video/matrox/g450_pll 0x6c288fb0	matroxfb_g450_setclk
+EXPORT_SYMBOL drivers/video/matrox/g450_pll 0x7a8beffd	g450_mnp2f
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0x01cf477c	DAC1064_global_init
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0x840d4906	matrox_G100
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0xdf2c1150	matrox_mystique
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0xea6c3e9d	DAC1064_global_restore
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_Ti3026 0x83d78ccb	matrox_millennium
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_accel 0x76482121	matrox_cfbX_init
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0x6a2fc114	matroxfb_enable_irq
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0x81e89f1d	matroxfb_wait_for_sync
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0x8580d902	matroxfb_unregister_driver
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0xd779c7e7	matroxfb_register_driver
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_g450 0x12e17af3	matroxfb_g450_connect
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_g450 0x9ad7e1f0	matroxfb_g450_shutdown
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x05dfdf5c	matroxfb_vgaHWinit
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x12401a7b	matroxfb_read_pins
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x25cf8049	matroxfb_PLL_calcclock
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x2cc43dae	matroxfb_DAC_in
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0xabd8e427	matroxfb_var2my
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0xc9e4bf70	matroxfb_DAC_out
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0xee0c8681	matroxfb_vgaHWrestore
+EXPORT_SYMBOL drivers/video/output 0xb6246a13	video_output_unregister
+EXPORT_SYMBOL drivers/video/output 0xda86c6dc	video_output_register
+EXPORT_SYMBOL drivers/video/sis/sisfb 0x3037658e	sis_malloc
+EXPORT_SYMBOL drivers/video/sis/sisfb 0x454a3cf0	sis_free
+EXPORT_SYMBOL drivers/video/svgalib 0x00d1fce9	svga_set_default_seq_regs
+EXPORT_SYMBOL drivers/video/svgalib 0x04baf3a1	svga_tilecopy
+EXPORT_SYMBOL drivers/video/svgalib 0x07b3da30	svga_wseq_multi
+EXPORT_SYMBOL drivers/video/svgalib 0x1b95c56a	svga_check_timings
+EXPORT_SYMBOL drivers/video/svgalib 0x1f9a53e8	svga_get_tilemax
+EXPORT_SYMBOL drivers/video/svgalib 0x2b45580d	svga_settile
+EXPORT_SYMBOL drivers/video/svgalib 0x63e898d1	svga_set_default_crt_regs
+EXPORT_SYMBOL drivers/video/svgalib 0x6740d660	svga_tilefill
+EXPORT_SYMBOL drivers/video/svgalib 0x680adcf0	svga_get_caps
+EXPORT_SYMBOL drivers/video/svgalib 0x7a3ae959	svga_wcrt_multi
+EXPORT_SYMBOL drivers/video/svgalib 0x80408443	svga_set_timings
+EXPORT_SYMBOL drivers/video/svgalib 0x8fa8438b	svga_set_textmode_vga_regs
+EXPORT_SYMBOL drivers/video/svgalib 0xa546349e	svga_tilecursor
+EXPORT_SYMBOL drivers/video/svgalib 0xa74d1f83	svga_tileblit
+EXPORT_SYMBOL drivers/video/svgalib 0xab3b22ad	svga_set_default_gfx_regs
+EXPORT_SYMBOL drivers/video/svgalib 0xdad682b1	svga_set_default_atc_regs
+EXPORT_SYMBOL drivers/video/svgalib 0xec83c473	svga_match_format
+EXPORT_SYMBOL drivers/video/svgalib 0xef774f5d	svga_compute_pll
+EXPORT_SYMBOL drivers/video/syscopyarea 0xab8fdac7	sys_copyarea
+EXPORT_SYMBOL drivers/video/sysfillrect 0xd5b74f65	sys_fillrect
+EXPORT_SYMBOL drivers/video/sysimgblt 0x6d9869b1	sys_imageblit
+EXPORT_SYMBOL drivers/video/vgastate 0x686de290	restore_vga
+EXPORT_SYMBOL drivers/video/vgastate 0xe7a2620e	save_vga
+EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x13b00025	w1_bq27000_write
+EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x5be93165	w1_bq27000_read
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x0261b073	w1_ds2760_read
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x0ed22a33	w1_ds2760_store_eeprom
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x17543457	w1_ds2760_write
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x5918c1d5	w1_ds2760_recall_eeprom
+EXPORT_SYMBOL drivers/w1/wire 0x5f494d3d	w1_unregister_family
+EXPORT_SYMBOL drivers/w1/wire 0x90c7fcfb	w1_register_family
+EXPORT_SYMBOL drivers/w1/wire 0xe2bcaa57	w1_remove_master_device
+EXPORT_SYMBOL drivers/w1/wire 0xe31bb522	w1_add_master_device
+EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0x04e133fc	iTCO_vendor_check_noreboot_on
+EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0x672c9d44	iTCO_vendor_pre_keepalive
+EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xa78bd894	iTCO_vendor_pre_set_heartbeat
+EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xa8d6daac	iTCO_vendor_pre_start
+EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xd0efe320	iTCO_vendor_pre_stop
+EXPORT_SYMBOL fs/configfs/configfs 0x02b180d6	config_group_init_type_name
+EXPORT_SYMBOL fs/configfs/configfs 0x07ae6098	config_item_put
+EXPORT_SYMBOL fs/configfs/configfs 0x31ce428c	configfs_register_subsystem
+EXPORT_SYMBOL fs/configfs/configfs 0x6030c8ff	config_group_init
+EXPORT_SYMBOL fs/configfs/configfs 0x6b64dfed	configfs_unregister_subsystem
+EXPORT_SYMBOL fs/configfs/configfs 0x7935d7eb	configfs_undepend_item
+EXPORT_SYMBOL fs/configfs/configfs 0x7994fd20	config_group_find_item
+EXPORT_SYMBOL fs/configfs/configfs 0xa0683287	config_item_init_type_name
+EXPORT_SYMBOL fs/configfs/configfs 0xa9468e4c	config_item_get
+EXPORT_SYMBOL fs/configfs/configfs 0xb702caf3	configfs_depend_item
+EXPORT_SYMBOL fs/configfs/configfs 0xf11e92b0	config_item_set_name
+EXPORT_SYMBOL fs/configfs/configfs 0xf17ac4dd	config_item_init
+EXPORT_SYMBOL fs/fscache/fscache 0x07d9b576	fscache_wait_bit_interruptible
+EXPORT_SYMBOL fs/fscache/fscache 0x10195bac	__fscache_check_page_write
+EXPORT_SYMBOL fs/fscache/fscache 0x2b065e58	fscache_obtained_object
+EXPORT_SYMBOL fs/fscache/fscache 0x370fecf0	__fscache_read_or_alloc_page
+EXPORT_SYMBOL fs/fscache/fscache 0x399a839b	fscache_enqueue_operation
+EXPORT_SYMBOL fs/fscache/fscache 0x3fc23318	fscache_wait_bit
+EXPORT_SYMBOL fs/fscache/fscache 0x44942984	fscache_io_error
+EXPORT_SYMBOL fs/fscache/fscache 0x475d30d8	__fscache_register_netfs
+EXPORT_SYMBOL fs/fscache/fscache 0x496932b9	fscache_op_debug_id
+EXPORT_SYMBOL fs/fscache/fscache 0x4eef1bf8	fscache_fsdef_index
+EXPORT_SYMBOL fs/fscache/fscache 0x570b2a0f	fscache_mark_pages_cached
+EXPORT_SYMBOL fs/fscache/fscache 0x63631a29	fscache_init_cache
+EXPORT_SYMBOL fs/fscache/fscache 0x63f96884	fscache_cache_cleared_wq
+EXPORT_SYMBOL fs/fscache/fscache 0x73b94e46	fscache_withdraw_cache
+EXPORT_SYMBOL fs/fscache/fscache 0x8528a382	__fscache_relinquish_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0x86f8894f	fscache_object_states
+EXPORT_SYMBOL fs/fscache/fscache 0x98a7354c	fscache_add_cache
+EXPORT_SYMBOL fs/fscache/fscache 0x996b6a1a	__fscache_uncache_page
+EXPORT_SYMBOL fs/fscache/fscache 0x9b3e9a11	__fscache_read_or_alloc_pages
+EXPORT_SYMBOL fs/fscache/fscache 0xa0f53147	__fscache_attr_changed
+EXPORT_SYMBOL fs/fscache/fscache 0xa18d4143	__fscache_unregister_netfs
+EXPORT_SYMBOL fs/fscache/fscache 0xafa4655c	__fscache_update_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0xb42a533d	__fscache_alloc_page
+EXPORT_SYMBOL fs/fscache/fscache 0xc0f3a1fe	__fscache_maybe_release_page
+EXPORT_SYMBOL fs/fscache/fscache 0xd2417065	fscache_put_operation
+EXPORT_SYMBOL fs/fscache/fscache 0xde67194d	__fscache_acquire_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0xe1d6efaf	__fscache_write_page
+EXPORT_SYMBOL fs/fscache/fscache 0xe6ef46be	fscache_object_lookup_negative
+EXPORT_SYMBOL fs/fscache/fscache 0xe728a183	__fscache_wait_on_page_write
+EXPORT_SYMBOL fs/fscache/fscache 0xe903bdc9	fscache_object_slow_work_ops
+EXPORT_SYMBOL fs/fscache/fscache 0xedd353a2	fscache_check_aux
+EXPORT_SYMBOL fs/nfsd/nfsd 0x1f573533	nfs4_acl_posix_to_nfsv4
+EXPORT_SYMBOL fs/nfsd/nfsd 0x35e33c1e	nfs4_acl_write_who
+EXPORT_SYMBOL fs/nfsd/nfsd 0x5a157ae4	nfs4_acl_get_whotype
+EXPORT_SYMBOL fs/nfsd/nfsd 0x96ce9bb4	nfs4_acl_new
+EXPORT_SYMBOL fs/nfsd/nfsd 0xdb389aec	nfs4_acl_nfsv4_to_posix
+EXPORT_SYMBOL fs/quota/quota_tree 0x23da5e85	qtree_write_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0x31035955	qtree_entry_unused
+EXPORT_SYMBOL fs/quota/quota_tree 0x7596d97d	qtree_release_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0xaaaec9ca	qtree_read_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0xaec9027f	qtree_delete_dquot
+EXPORT_SYMBOL lib/crc-ccitt 0x651c2313	crc_ccitt
+EXPORT_SYMBOL lib/crc-ccitt 0x75811312	crc_ccitt_table
+EXPORT_SYMBOL lib/crc-itu-t 0x276c7e62	crc_itu_t
+EXPORT_SYMBOL lib/crc-itu-t 0xd29b009f	crc_itu_t_table
+EXPORT_SYMBOL lib/crc7 0xc086bfba	crc7
+EXPORT_SYMBOL lib/crc7 0xd80c3603	crc7_syndrome_table
+EXPORT_SYMBOL lib/libcrc32c 0x27000b29	crc32c
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x315c65fd	zlib_deflateInit2
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x48034724	zlib_deflateReset
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xaf64ad0d	zlib_deflate
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf0caf44b	zlib_deflate_workspacesize
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf741c793	zlib_deflateEnd
+EXPORT_SYMBOL net/802/p8023 0x463fc76f	make_8023_client
+EXPORT_SYMBOL net/802/p8023 0x6d5cb64d	destroy_8023_client
+EXPORT_SYMBOL net/9p/9pnet 0x00477940	p9_client_disconnect
+EXPORT_SYMBOL net/9p/9pnet 0x0b3ac49a	p9pdu_dump
+EXPORT_SYMBOL net/9p/9pnet 0x0f16d356	p9_client_version
+EXPORT_SYMBOL net/9p/9pnet 0x1212294b	p9_client_create
+EXPORT_SYMBOL net/9p/9pnet 0x244c6d40	p9_idpool_get
+EXPORT_SYMBOL net/9p/9pnet 0x2b560613	v9fs_get_trans_by_name
+EXPORT_SYMBOL net/9p/9pnet 0x31a6ba49	p9_client_walk
+EXPORT_SYMBOL net/9p/9pnet 0x3d73a797	p9_errstr2errno
+EXPORT_SYMBOL net/9p/9pnet 0x3da35774	v9fs_unregister_trans
+EXPORT_SYMBOL net/9p/9pnet 0x41e6bc51	p9_parse_header
+EXPORT_SYMBOL net/9p/9pnet 0x459d9a68	p9_client_open
+EXPORT_SYMBOL net/9p/9pnet 0x46acb4f2	p9_client_cb
+EXPORT_SYMBOL net/9p/9pnet 0x47a4357b	p9_client_remove
+EXPORT_SYMBOL net/9p/9pnet 0x4fa9952f	p9_client_destroy
+EXPORT_SYMBOL net/9p/9pnet 0x5b404193	p9_client_fcreate
+EXPORT_SYMBOL net/9p/9pnet 0x5e0ef374	p9_idpool_check
+EXPORT_SYMBOL net/9p/9pnet 0x61852dea	p9_idpool_put
+EXPORT_SYMBOL net/9p/9pnet 0x683efc21	v9fs_register_trans
+EXPORT_SYMBOL net/9p/9pnet 0x6c5e479c	p9_idpool_create
+EXPORT_SYMBOL net/9p/9pnet 0x76b79bf1	p9stat_read
+EXPORT_SYMBOL net/9p/9pnet 0x7e033f30	p9_client_attach
+EXPORT_SYMBOL net/9p/9pnet 0x99817082	p9_client_clunk
+EXPORT_SYMBOL net/9p/9pnet 0x9c964743	p9stat_free
+EXPORT_SYMBOL net/9p/9pnet 0xbaa17b44	p9_idpool_destroy
+EXPORT_SYMBOL net/9p/9pnet 0xc42255b0	p9_client_stat
+EXPORT_SYMBOL net/9p/9pnet 0xcafe9e7f	p9_client_wstat
+EXPORT_SYMBOL net/9p/9pnet 0xd0af5654	v9fs_get_default_trans
+EXPORT_SYMBOL net/9p/9pnet 0xd4c9b2f6	p9_client_write
+EXPORT_SYMBOL net/9p/9pnet 0xe58a3360	p9_error_init
+EXPORT_SYMBOL net/9p/9pnet 0xe69ae13c	p9_client_read
+EXPORT_SYMBOL net/9p/9pnet 0xf691b9a6	p9_tag_lookup
+EXPORT_SYMBOL net/9p/9pnet 0xf9dcf532	p9_client_auth
+EXPORT_SYMBOL net/appletalk/appletalk 0x5d1daa4e	alloc_ltalkdev
+EXPORT_SYMBOL net/appletalk/appletalk 0x934bee4d	atrtr_get_dev
+EXPORT_SYMBOL net/appletalk/appletalk 0x99328adc	atalk_find_dev_addr
+EXPORT_SYMBOL net/appletalk/appletalk 0xf3964549	aarp_send_ddp
+EXPORT_SYMBOL net/atm/atm 0x06cd7893	atm_dev_deregister
+EXPORT_SYMBOL net/atm/atm 0x132a400d	atm_init_aal5
+EXPORT_SYMBOL net/atm/atm 0x1a24e5e2	sonet_subtract_stats
+EXPORT_SYMBOL net/atm/atm 0x25b4a6ca	atm_dev_register
+EXPORT_SYMBOL net/atm/atm 0x2cc2d52d	vcc_hash
+EXPORT_SYMBOL net/atm/atm 0x302b5faa	vcc_release_async
+EXPORT_SYMBOL net/atm/atm 0x4d4e4676	atm_charge
+EXPORT_SYMBOL net/atm/atm 0x5773de96	register_atm_ioctl
+EXPORT_SYMBOL net/atm/atm 0x69ca4bc5	vcc_insert_socket
+EXPORT_SYMBOL net/atm/atm 0x6d1ced27	vcc_sklist_lock
+EXPORT_SYMBOL net/atm/atm 0x7c817a01	deregister_atm_ioctl
+EXPORT_SYMBOL net/atm/atm 0x89195dc3	sonet_copy_stats
+EXPORT_SYMBOL net/atm/atm 0xa375794d	atm_dev_lookup
+EXPORT_SYMBOL net/atm/atm 0xb39bf74c	atm_alloc_charge
+EXPORT_SYMBOL net/atm/atm 0xf3f64c80	atm_proc_root
+EXPORT_SYMBOL net/atm/atm 0xf49bc67a	atm_pcr_goal
+EXPORT_SYMBOL net/ax25/ax25 0x03db1fb1	ax25_header_ops
+EXPORT_SYMBOL net/ax25/ax25 0x16facd5e	ax25_find_cb
+EXPORT_SYMBOL net/ax25/ax25 0x242852b9	ax25_uid_policy
+EXPORT_SYMBOL net/ax25/ax25 0x2f42401a	ax25_linkfail_register
+EXPORT_SYMBOL net/ax25/ax25 0x3cb5bac0	ax25_listen_register
+EXPORT_SYMBOL net/ax25/ax25 0x3d2d82ec	ax25_display_timer
+EXPORT_SYMBOL net/ax25/ax25 0x4502c65a	asc2ax
+EXPORT_SYMBOL net/ax25/ax25 0x53dea1ff	ax2asc
+EXPORT_SYMBOL net/ax25/ax25 0x5fc6280f	ax25_findbyuid
+EXPORT_SYMBOL net/ax25/ax25 0x8eb91752	ax25_listen_release
+EXPORT_SYMBOL net/ax25/ax25 0x8ede9e26	ax25_protocol_release
+EXPORT_SYMBOL net/ax25/ax25 0x91afb050	ax25_linkfail_release
+EXPORT_SYMBOL net/ax25/ax25 0xa8069978	ax25_hard_header
+EXPORT_SYMBOL net/ax25/ax25 0xab5afca2	ax25_rebuild_header
+EXPORT_SYMBOL net/ax25/ax25 0xc1444946	ax25cmp
+EXPORT_SYMBOL net/ax25/ax25 0xd43ecbf1	null_ax25_address
+EXPORT_SYMBOL net/ax25/ax25 0xf2154f47	ax25_send_frame
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x0250f734	hci_alloc_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x19e6d5ca	hci_send_acl
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x27cb5111	bt_accept_dequeue
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x2beba545	hci_unregister_cb
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x34bee174	hci_register_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x37935aa0	bt_accept_enqueue
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x4530f521	hci_conn_change_link_key
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x47ec07fe	hci_conn_hold_device
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x4e5199f3	bt_sock_ioctl
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x527d8452	hci_resume_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x7094f8ae	bt_err
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x7797518e	hci_conn_put_device
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x7849da31	bt_sock_poll
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x7c0bdffa	hci_unregister_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x7d6870d2	hci_conn_check_link_mode
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x8c237f24	hci_recv_fragment
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x90975409	hci_register_proto
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x99624be4	hci_conn_switch_role
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x9dd4658c	hci_conn_security
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x9fe6522c	bt_sock_register
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xa02f4583	hci_send_sco
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xb018f970	bt_accept_unlink
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xbe8e966d	hci_free_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xc2066af0	batostr
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xc42c5380	bt_sock_wait_state
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xc609d3b0	hci_unregister_proto
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xc9dce180	bt_sock_link
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xcc1fb551	baswap
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xcdf94d66	hci_register_cb
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xdb3832a3	hci_connect
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xe43afabd	hci_get_route
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xe6531491	bt_sock_recvmsg
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xf19294db	bt_sock_unregister
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xfc7945c3	hci_suspend_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xfe256018	bt_sock_unlink
+EXPORT_SYMBOL net/bluetooth/l2cap 0xfc31fe88	l2cap_load
+EXPORT_SYMBOL net/bridge/bridge 0x3a509b16	br_should_route_hook
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x2c832128	ebt_unregister_table
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x9917f8b0	ebt_register_table
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0xf7cf992a	ebt_do_table
+EXPORT_SYMBOL net/can/can 0x6920dca0	can_send
+EXPORT_SYMBOL net/can/can 0x88bfb85f	can_proto_unregister
+EXPORT_SYMBOL net/can/can 0x9b1f0503	can_rx_unregister
+EXPORT_SYMBOL net/can/can 0xadd4dc7a	can_proto_register
+EXPORT_SYMBOL net/can/can 0xf0792ca1	can_rx_register
+EXPORT_SYMBOL net/ieee802154/nl802154 0x0461068f	ieee802154_nl_assoc_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0x2179d819	ieee802154_nl_disassoc_indic
+EXPORT_SYMBOL net/ieee802154/nl802154 0x49ac0791	ieee802154_nl_start_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0x719daa5c	ieee802154_nl_disassoc_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0xa66a18e9	ieee802154_nl_assoc_indic
+EXPORT_SYMBOL net/ieee802154/nl802154 0xb9ab8f2e	ieee802154_nl_beacon_indic
+EXPORT_SYMBOL net/ieee802154/nl802154 0xf50347d7	ieee802154_nl_scan_confirm
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x615a3f51	wpan_phy_register
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x74a150e2	wpan_phy_alloc
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x936ff593	wpan_phy_free
+EXPORT_SYMBOL net/ieee802154/wpan-class 0xc7ccc852	wpan_phy_unregister
+EXPORT_SYMBOL net/ieee802154/wpan-class 0xd36876be	wpan_phy_find
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x8f889c8e	arpt_unregister_table
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xed634a72	arpt_do_table
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xf2779ca8	arpt_register_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x5d74caaa	ipt_register_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x9862092e	ipt_unregister_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0xf585ebaa	ipt_do_table
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x340ce366	nf_nat_protocol_register
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x632bb16e	nf_nat_follow_master
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x7ee730f0	nf_nat_setup_info
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x8cc93b8b	nf_nat_mangle_tcp_packet
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xa065de77	nf_nat_protocol_unregister
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xaad93b97	nf_nat_used_tuple
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xf9d93000	nf_nat_mangle_udp_packet
+EXPORT_SYMBOL net/ipv4/tunnel4 0x6e5bcd0f	xfrm4_tunnel_register
+EXPORT_SYMBOL net/ipv4/tunnel4 0xcd287dc4	xfrm4_tunnel_deregister
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x22f43e8a	ipv6_find_hdr
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x46bb4f92	ip6t_unregister_table
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x70c680a4	ip6t_do_table
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xb8bddf33	ip6t_ext_hdr
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xcaa3d87c	ip6t_register_table
+EXPORT_SYMBOL net/ipv6/tunnel6 0xb3f5adae	xfrm6_tunnel_deregister
+EXPORT_SYMBOL net/ipv6/tunnel6 0xf5350a32	xfrm6_tunnel_register
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0x9cd013f2	xfrm6_tunnel_alloc_spi
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xab14e193	xfrm6_tunnel_free_spi
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xdb1b42d1	xfrm6_tunnel_spi_lookup
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x046ec21d	ircomm_disconnect_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x15e34b06	ircomm_connect_response
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x4c16fad9	ircomm_control_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x4c2bded7	ircomm_connect_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x982b008e	ircomm_close
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0xbeef7e47	ircomm_open
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0xe0c248e5	ircomm_flow_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0xe2ae4e2d	ircomm_data_request
+EXPORT_SYMBOL net/irda/irda 0x01d1fcdb	hashbin_delete
+EXPORT_SYMBOL net/irda/irda 0x06a3ee58	irias_new_integer_value
+EXPORT_SYMBOL net/irda/irda 0x072e026f	irias_add_octseq_attrib
+EXPORT_SYMBOL net/irda/irda 0x07d3647c	irlmp_register_service
+EXPORT_SYMBOL net/irda/irda 0x0937cdb3	async_wrap_skb
+EXPORT_SYMBOL net/irda/irda 0x0adabe7b	irttp_data_request
+EXPORT_SYMBOL net/irda/irda 0x1bcdfe65	irda_notify_init
+EXPORT_SYMBOL net/irda/irda 0x2036ad06	irda_param_insert
+EXPORT_SYMBOL net/irda/irda 0x240c6f0e	irda_device_set_media_busy
+EXPORT_SYMBOL net/irda/irda 0x3462950f	hashbin_remove
+EXPORT_SYMBOL net/irda/irda 0x38a20e5b	irda_debug
+EXPORT_SYMBOL net/irda/irda 0x3af34c00	alloc_irdadev
+EXPORT_SYMBOL net/irda/irda 0x3cc6eb5b	irlmp_close_lsap
+EXPORT_SYMBOL net/irda/irda 0x448b8aaa	irda_qos_bits_to_value
+EXPORT_SYMBOL net/irda/irda 0x46c1c4a2	irlmp_unregister_service
+EXPORT_SYMBOL net/irda/irda 0x4abd8c4e	irlmp_data_request
+EXPORT_SYMBOL net/irda/irda 0x53c5e1d8	irttp_connect_request
+EXPORT_SYMBOL net/irda/irda 0x5dbf591d	irttp_disconnect_request
+EXPORT_SYMBOL net/irda/irda 0x6758f8ac	irias_new_object
+EXPORT_SYMBOL net/irda/irda 0x67dd8e22	irttp_udata_request
+EXPORT_SYMBOL net/irda/irda 0x68b7447c	hashbin_find
+EXPORT_SYMBOL net/irda/irda 0x6b043eba	irda_init_max_qos_capabilies
+EXPORT_SYMBOL net/irda/irda 0x7042bc54	irlmp_register_client
+EXPORT_SYMBOL net/irda/irda 0x737fc2a9	irlmp_connect_response
+EXPORT_SYMBOL net/irda/irda 0x7409adf3	proc_irda
+EXPORT_SYMBOL net/irda/irda 0x747d6779	irias_delete_object
+EXPORT_SYMBOL net/irda/irda 0x7621e908	hashbin_insert
+EXPORT_SYMBOL net/irda/irda 0x76243bc9	irias_insert_object
+EXPORT_SYMBOL net/irda/irda 0x763e54a4	irlmp_unregister_client
+EXPORT_SYMBOL net/irda/irda 0x781e2db5	irias_find_object
+EXPORT_SYMBOL net/irda/irda 0x7957f728	irlmp_update_client
+EXPORT_SYMBOL net/irda/irda 0x7a57b6f3	hashbin_remove_this
+EXPORT_SYMBOL net/irda/irda 0x7c26c4d3	irttp_open_tsap
+EXPORT_SYMBOL net/irda/irda 0x7ef798c0	irlmp_connect_request
+EXPORT_SYMBOL net/irda/irda 0x87fe1741	irttp_dup
+EXPORT_SYMBOL net/irda/irda 0x902da40b	irlmp_open_lsap
+EXPORT_SYMBOL net/irda/irda 0x91815586	irda_param_pack
+EXPORT_SYMBOL net/irda/irda 0x993ad14b	irda_param_extract_all
+EXPORT_SYMBOL net/irda/irda 0x9a1a93d7	irttp_flow_request
+EXPORT_SYMBOL net/irda/irda 0xadc5d6a2	irlap_open
+EXPORT_SYMBOL net/irda/irda 0xb9394173	irias_delete_value
+EXPORT_SYMBOL net/irda/irda 0xbcd3ef13	irias_object_change_attribute
+EXPORT_SYMBOL net/irda/irda 0xbe40ace9	irlmp_discovery_request
+EXPORT_SYMBOL net/irda/irda 0xc14e9b6a	hashbin_get_next
+EXPORT_SYMBOL net/irda/irda 0xca4f37e8	iriap_close
+EXPORT_SYMBOL net/irda/irda 0xcd3c920d	irlap_close
+EXPORT_SYMBOL net/irda/irda 0xcd41236c	hashbin_new
+EXPORT_SYMBOL net/irda/irda 0xcd66120a	irttp_close_tsap
+EXPORT_SYMBOL net/irda/irda 0xcd6b6464	irttp_connect_response
+EXPORT_SYMBOL net/irda/irda 0xd6deeaae	irda_setup_dma
+EXPORT_SYMBOL net/irda/irda 0xd7172ff4	hashbin_get_first
+EXPORT_SYMBOL net/irda/irda 0xd8bfb6d4	hashbin_lock_find
+EXPORT_SYMBOL net/irda/irda 0xd9eff4e0	iriap_getvaluebyclass_request
+EXPORT_SYMBOL net/irda/irda 0xde4c6b3c	irlmp_service_to_hint
+EXPORT_SYMBOL net/irda/irda 0xe5260e0e	irias_add_integer_attrib
+EXPORT_SYMBOL net/irda/irda 0xec41fe7f	irias_add_string_attrib
+EXPORT_SYMBOL net/irda/irda 0xedd521c2	irlmp_get_discoveries
+EXPORT_SYMBOL net/irda/irda 0xf0cc152c	irlmp_disconnect_request
+EXPORT_SYMBOL net/irda/irda 0xf3a527bc	iriap_open
+EXPORT_SYMBOL net/irda/irda 0xfbc6bc27	async_unwrap_char
+EXPORT_SYMBOL net/lapb/lapb 0x06d8871b	lapb_setparms
+EXPORT_SYMBOL net/lapb/lapb 0x0e8167a2	lapb_register
+EXPORT_SYMBOL net/lapb/lapb 0x602fabe5	lapb_connect_request
+EXPORT_SYMBOL net/lapb/lapb 0x6db5fd60	lapb_unregister
+EXPORT_SYMBOL net/lapb/lapb 0x7c0a886d	lapb_disconnect_request
+EXPORT_SYMBOL net/lapb/lapb 0x7edb7aee	lapb_getparms
+EXPORT_SYMBOL net/lapb/lapb 0xa5daa47e	lapb_data_received
+EXPORT_SYMBOL net/lapb/lapb 0xd10b87aa	lapb_data_request
+EXPORT_SYMBOL net/mac80211/mac80211 0x06da3ae2	ieee80211_unregister_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x0e4505c0	ieee80211_rx_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0x0fe80f50	__ieee80211_get_rx_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0x1efa0bce	ieee80211_stop_tx_ba_session
+EXPORT_SYMBOL net/mac80211/mac80211 0x27c72d76	rate_control_send_low
+EXPORT_SYMBOL net/mac80211/mac80211 0x3b4cefed	ieee80211_rate_control_register
+EXPORT_SYMBOL net/mac80211/mac80211 0x3f22b6f8	wiphy_to_ieee80211_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x467cbe46	ieee80211_tx_status_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0x4860df60	ieee80211_stop_tx_ba_cb
+EXPORT_SYMBOL net/mac80211/mac80211 0x487990f6	ieee80211_rts_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0x5f477442	ieee80211_rts_get
+EXPORT_SYMBOL net/mac80211/mac80211 0x669a7af7	ieee80211_start_tx_ba_cb_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0x6cf161c3	__ieee80211_get_radio_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0x70814f02	ieee80211_find_sta
+EXPORT_SYMBOL net/mac80211/mac80211 0x74e231af	ieee80211_queue_delayed_work
+EXPORT_SYMBOL net/mac80211/mac80211 0x7bf97ba4	__ieee80211_get_assoc_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0x84bcb697	ieee80211_ctstoself_get
+EXPORT_SYMBOL net/mac80211/mac80211 0xa6f3516f	ieee80211_wake_queue
+EXPORT_SYMBOL net/mac80211/mac80211 0xad12a06c	ieee80211_queue_work
+EXPORT_SYMBOL net/mac80211/mac80211 0xc1c2acf8	ieee80211_stop_queues
+EXPORT_SYMBOL net/mac80211/mac80211 0xc2f9f5ba	ieee80211_start_tx_ba_cb
+EXPORT_SYMBOL net/mac80211/mac80211 0xc3386972	ieee80211_get_tkip_key
+EXPORT_SYMBOL net/mac80211/mac80211 0xc42d99b4	ieee80211_generic_frame_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0xca41c27e	ieee80211_restart_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xca4b1622	ieee80211_scan_completed
+EXPORT_SYMBOL net/mac80211/mac80211 0xd1742441	ieee80211_alloc_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xd9847502	ieee80211_free_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xdb48b5aa	ieee80211_rx
+EXPORT_SYMBOL net/mac80211/mac80211 0xdc115d0e	ieee80211_ctstoself_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0xe8abe42d	ieee80211_beacon_loss
+EXPORT_SYMBOL net/mac80211/mac80211 0xe8ee5d76	ieee80211_tx_status
+EXPORT_SYMBOL net/mac80211/mac80211 0xeb7fd37f	ieee80211_rate_control_unregister
+EXPORT_SYMBOL net/mac80211/mac80211 0xec9c11c1	ieee80211_start_tx_ba_session
+EXPORT_SYMBOL net/mac80211/mac80211 0xf1194ad9	ieee80211_beacon_get
+EXPORT_SYMBOL net/mac80211/mac80211 0xf58e0e27	ieee80211_get_buffered_bc
+EXPORT_SYMBOL net/mac80211/mac80211 0xf9448ca0	ieee80211_wake_queues
+EXPORT_SYMBOL net/mac80211/mac80211 0xfc4907fb	ieee80211_register_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xfc85a192	ieee80211_stop_queue
+EXPORT_SYMBOL net/mac80211/mac80211 0xfd7df842	ieee80211_queue_stopped
+EXPORT_SYMBOL net/mac80211/mac80211 0xfe5b4108	__ieee80211_get_tx_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0xffeadd49	ieee80211_stop_tx_ba_cb_irqsafe
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x02be25a6	ip_vs_conn_in_get
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x0d3034d1	ip_vs_conn_new
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x467e26ce	register_ip_vs_scheduler
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x64d15749	register_ip_vs_app
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x6c118e18	ip_vs_conn_put
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x7d12d9fc	ip_vs_tcp_conn_listen
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xa1dbc2d8	ip_vs_proto_name
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xb52dc08d	register_ip_vs_app_inc
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xb8a50ae6	ip_vs_conn_out_get
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xbbda6099	unregister_ip_vs_app
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xc14727a3	ip_vs_skb_replace
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xf89654a3	unregister_ip_vs_scheduler
+EXPORT_SYMBOL net/netfilter/nf_conntrack 0x9b3d6ba0	__nf_ct_ext_add
+EXPORT_SYMBOL net/netfilter/nf_conntrack 0xc4f5c947	__nf_ct_ext_destroy
+EXPORT_SYMBOL net/netfilter/nf_conntrack_proto_gre 0x796cc2d2	nf_ct_gre_keymap_flush
+EXPORT_SYMBOL net/netfilter/x_tables 0x068a41ad	xt_find_target
+EXPORT_SYMBOL net/netfilter/x_tables 0x085fdce7	xt_register_target
+EXPORT_SYMBOL net/netfilter/x_tables 0x0ec7d34c	xt_register_targets
+EXPORT_SYMBOL net/netfilter/x_tables 0x1656cd59	xt_register_matches
+EXPORT_SYMBOL net/netfilter/x_tables 0x16a5e826	xt_free_table_info
+EXPORT_SYMBOL net/netfilter/x_tables 0x1993e8d4	xt_unregister_targets
+EXPORT_SYMBOL net/netfilter/x_tables 0x21ff2dff	xt_register_match
+EXPORT_SYMBOL net/netfilter/x_tables 0x941c3d4c	xt_unregister_target
+EXPORT_SYMBOL net/netfilter/x_tables 0x9619c771	xt_unregister_matches
+EXPORT_SYMBOL net/netfilter/x_tables 0xab32a753	xt_unregister_match
+EXPORT_SYMBOL net/netfilter/x_tables 0xc3ff5dff	xt_alloc_table_info
+EXPORT_SYMBOL net/netfilter/x_tables 0xd1864fb4	xt_find_match
+EXPORT_SYMBOL net/phonet/phonet 0x3e2e4ea7	phonet_proto_unregister
+EXPORT_SYMBOL net/phonet/phonet 0x565fa76e	pn_sock_get_port
+EXPORT_SYMBOL net/phonet/phonet 0x608046c0	pn_sock_unhash
+EXPORT_SYMBOL net/phonet/phonet 0x690ee60b	phonet_proto_register
+EXPORT_SYMBOL net/phonet/phonet 0x8008af74	pn_skb_send
+EXPORT_SYMBOL net/phonet/phonet 0x94d6a650	phonet_stream_ops
+EXPORT_SYMBOL net/phonet/phonet 0xc46cdf4c	pn_sock_hash
+EXPORT_SYMBOL net/phonet/phonet 0xe6f89633	phonet_header_ops
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x0a52a81c	rxrpc_kernel_free_skb
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x0d88c7a9	rxrpc_kernel_accept_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x418e6909	rxrpc_kernel_send_data
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x6387ed9e	rxrpc_kernel_reject_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x860e7bd1	rxrpc_get_server_data_key
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x8f74fc23	rxrpc_kernel_begin_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x96a1b29f	rxrpc_kernel_get_error_number
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xa4c37141	rxrpc_kernel_intercept_rx_messages
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xa846ee3c	rxrpc_kernel_abort_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xa895e287	rxrpc_get_null_key
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xb046d754	rxrpc_kernel_is_data_last
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xb5b68b42	rxrpc_kernel_data_delivered
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xc0229f1d	rxrpc_kernel_get_abort_code
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xf1439979	key_type_rxrpc
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xfbc4ecdc	rxrpc_kernel_end_call
+EXPORT_SYMBOL net/sunrpc/sunrpc 0xc2acfbc8	svc_pool_stats_open
+EXPORT_SYMBOL net/tipc/tipc 0x068bdb90	tipc_reject_msg
+EXPORT_SYMBOL net/tipc/tipc 0x0754ab9c	tipc_send_buf2port
+EXPORT_SYMBOL net/tipc/tipc 0x08acf310	tipc_available_nodes
+EXPORT_SYMBOL net/tipc/tipc 0x0b074a7b	tipc_multicast
+EXPORT_SYMBOL net/tipc/tipc 0x0bf8b7d1	tipc_forward_buf2name
+EXPORT_SYMBOL net/tipc/tipc 0x10d40fcd	tipc_isconnected
+EXPORT_SYMBOL net/tipc/tipc 0x11fcb1c4	tipc_recv_msg
+EXPORT_SYMBOL net/tipc/tipc 0x1472b270	tipc_disconnect
+EXPORT_SYMBOL net/tipc/tipc 0x1479cb03	tipc_deleteport
+EXPORT_SYMBOL net/tipc/tipc 0x15b5ecde	tipc_set_portunreliable
+EXPORT_SYMBOL net/tipc/tipc 0x16f27683	tipc_block_bearer
+EXPORT_SYMBOL net/tipc/tipc 0x1ffe9f96	tipc_send_buf
+EXPORT_SYMBOL net/tipc/tipc 0x23daecbd	tipc_send
+EXPORT_SYMBOL net/tipc/tipc 0x259b74f9	tipc_acknowledge
+EXPORT_SYMBOL net/tipc/tipc 0x280e77c6	tipc_forward_buf2port
+EXPORT_SYMBOL net/tipc/tipc 0x310d1bc9	tipc_detach
+EXPORT_SYMBOL net/tipc/tipc 0x3712e340	tipc_portunreliable
+EXPORT_SYMBOL net/tipc/tipc 0x3976041f	tipc_set_portimportance
+EXPORT_SYMBOL net/tipc/tipc 0x419b02fc	tipc_send2port
+EXPORT_SYMBOL net/tipc/tipc 0x4b2243c6	tipc_portimportance
+EXPORT_SYMBOL net/tipc/tipc 0x538b228a	tipc_withdraw
+EXPORT_SYMBOL net/tipc/tipc 0x5637ed44	tipc_get_mode
+EXPORT_SYMBOL net/tipc/tipc 0x56e52bc1	tipc_continue
+EXPORT_SYMBOL net/tipc/tipc 0x5c0d4b5c	tipc_ref_valid
+EXPORT_SYMBOL net/tipc/tipc 0x61d40c6c	tipc_createport_raw
+EXPORT_SYMBOL net/tipc/tipc 0x62a681a3	tipc_portunreturnable
+EXPORT_SYMBOL net/tipc/tipc 0x88b73627	tipc_get_addr
+EXPORT_SYMBOL net/tipc/tipc 0x9c45558e	tipc_enable_bearer
+EXPORT_SYMBOL net/tipc/tipc 0xa12af810	tipc_register_media
+EXPORT_SYMBOL net/tipc/tipc 0xa1b42d32	tipc_forward2port
+EXPORT_SYMBOL net/tipc/tipc 0xa7ead844	tipc_send_buf2name
+EXPORT_SYMBOL net/tipc/tipc 0xa936a24b	tipc_get_port
+EXPORT_SYMBOL net/tipc/tipc 0xaae389d5	tipc_send_buf_fast
+EXPORT_SYMBOL net/tipc/tipc 0xadd203d0	tipc_connect2port
+EXPORT_SYMBOL net/tipc/tipc 0xae0103c3	tipc_shutdown
+EXPORT_SYMBOL net/tipc/tipc 0xb1f8eacc	tipc_send2name
+EXPORT_SYMBOL net/tipc/tipc 0xb35b672c	tipc_publish
+EXPORT_SYMBOL net/tipc/tipc 0xb5f8df38	tipc_createport
+EXPORT_SYMBOL net/tipc/tipc 0xcec8514a	tipc_set_portunreturnable
+EXPORT_SYMBOL net/tipc/tipc 0xcee290be	tipc_forward2name
+EXPORT_SYMBOL net/tipc/tipc 0xd44731e5	tipc_ownidentity
+EXPORT_SYMBOL net/tipc/tipc 0xda7f9d3f	tipc_attach
+EXPORT_SYMBOL net/tipc/tipc 0xdf5008fc	tipc_peer
+EXPORT_SYMBOL net/tipc/tipc 0xe7aece47	tipc_ispublished
+EXPORT_SYMBOL net/tipc/tipc 0xeefd49b3	tipc_get_handle
+EXPORT_SYMBOL net/tipc/tipc 0xef50a1ef	tipc_disable_bearer
+EXPORT_SYMBOL net/wanrouter/wanrouter 0x0ebe03d1	unregister_wan_device
+EXPORT_SYMBOL net/wanrouter/wanrouter 0xe7f6faea	register_wan_device
+EXPORT_SYMBOL net/wimax/wimax 0x25040b8f	wimax_rfkill
+EXPORT_SYMBOL net/wimax/wimax 0x38d27e68	wimax_reset
+EXPORT_SYMBOL net/wireless/cfg80211 0x018fa9fb	cfg80211_testmode_alloc_reply_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0x07e7ac5a	ieee80211_radiotap_iterator_init
+EXPORT_SYMBOL net/wireless/cfg80211 0x09c64fbd	ieee80211_frequency_to_channel
+EXPORT_SYMBOL net/wireless/cfg80211 0x0b309cba	ieee80211_get_hdrlen_from_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0x133d8250	cfg80211_disconnected
+EXPORT_SYMBOL net/wireless/cfg80211 0x13d954d5	cfg80211_michael_mic_failure
+EXPORT_SYMBOL net/wireless/cfg80211 0x1879fcbd	bridge_tunnel_header
+EXPORT_SYMBOL net/wireless/cfg80211 0x1915a0a3	cfg80211_testmode_alloc_event_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0x1d43c441	cfg80211_ibss_joined
+EXPORT_SYMBOL net/wireless/cfg80211 0x25980fe6	cfg80211_connect_result
+EXPORT_SYMBOL net/wireless/cfg80211 0x32eae8f8	wiphy_free
+EXPORT_SYMBOL net/wireless/cfg80211 0x37ac8d05	ieee80211_get_response_rate
+EXPORT_SYMBOL net/wireless/cfg80211 0x38c79671	cfg80211_send_rx_assoc
+EXPORT_SYMBOL net/wireless/cfg80211 0x3eca9e5b	ieee80211_data_to_8023
+EXPORT_SYMBOL net/wireless/cfg80211 0x4bbaec98	wiphy_rfkill_stop_polling
+EXPORT_SYMBOL net/wireless/cfg80211 0x4bdd8765	wiphy_rfkill_set_hw_state
+EXPORT_SYMBOL net/wireless/cfg80211 0x5b2254a0	cfg80211_send_disassoc
+EXPORT_SYMBOL net/wireless/cfg80211 0x5c44f332	cfg80211_inform_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0x60cbfeb0	cfg80211_get_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0x69b18f43	rfc1042_header
+EXPORT_SYMBOL net/wireless/cfg80211 0x7793fceb	cfg80211_scan_done
+EXPORT_SYMBOL net/wireless/cfg80211 0x7c146945	cfg80211_get_mesh
+EXPORT_SYMBOL net/wireless/cfg80211 0x7c3fddc1	ieee80211_bss_get_ie
+EXPORT_SYMBOL net/wireless/cfg80211 0x816a3e57	ieee80211_data_from_8023
+EXPORT_SYMBOL net/wireless/cfg80211 0x81941920	cfg80211_testmode_event
+EXPORT_SYMBOL net/wireless/cfg80211 0x8c35d732	ieee80211_hdrlen
+EXPORT_SYMBOL net/wireless/cfg80211 0x903c7402	cfg80211_testmode_reply
+EXPORT_SYMBOL net/wireless/cfg80211 0x96985f0e	cfg80211_send_deauth
+EXPORT_SYMBOL net/wireless/cfg80211 0x96e17cff	wiphy_register
+EXPORT_SYMBOL net/wireless/cfg80211 0x98d43c34	wiphy_new
+EXPORT_SYMBOL net/wireless/cfg80211 0xa00bf6ea	cfg80211_send_rx_auth
+EXPORT_SYMBOL net/wireless/cfg80211 0xa726e718	wiphy_apply_custom_regulatory
+EXPORT_SYMBOL net/wireless/cfg80211 0xb3f87093	cfg80211_send_assoc_timeout
+EXPORT_SYMBOL net/wireless/cfg80211 0xb8961eea	cfg80211_send_auth_timeout
+EXPORT_SYMBOL net/wireless/cfg80211 0xc4e85ec5	ieee80211_radiotap_iterator_next
+EXPORT_SYMBOL net/wireless/cfg80211 0xc69fdea2	wiphy_unregister
+EXPORT_SYMBOL net/wireless/cfg80211 0xc6eec6d3	__ieee80211_get_channel
+EXPORT_SYMBOL net/wireless/cfg80211 0xc8b0a21c	cfg80211_roamed
+EXPORT_SYMBOL net/wireless/cfg80211 0xcbc0624d	freq_reg_info
+EXPORT_SYMBOL net/wireless/cfg80211 0xccc291b3	ieee80211_channel_to_frequency
+EXPORT_SYMBOL net/wireless/cfg80211 0xd5c06e99	wiphy_rfkill_start_polling
+EXPORT_SYMBOL net/wireless/cfg80211 0xdceaaeca	cfg80211_unlink_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0xe066a9e5	cfg80211_inform_bss_frame
+EXPORT_SYMBOL net/wireless/cfg80211 0xe49f8244	cfg80211_put_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0xe814172e	regulatory_hint
+EXPORT_SYMBOL net/wireless/cfg80211 0xf137fe96	cfg80211_classify8021d
+EXPORT_SYMBOL net/wireless/lib80211 0x1bbff969	lib80211_get_crypto_ops
+EXPORT_SYMBOL net/wireless/lib80211 0x230f3ffb	lib80211_crypt_deinit_handler
+EXPORT_SYMBOL net/wireless/lib80211 0x264ac0f8	lib80211_crypt_deinit_entries
+EXPORT_SYMBOL net/wireless/lib80211 0x2d0f99e5	print_ssid
+EXPORT_SYMBOL net/wireless/lib80211 0x8c877de4	lib80211_crypt_info_free
+EXPORT_SYMBOL net/wireless/lib80211 0x8d1d7491	lib80211_register_crypto_ops
+EXPORT_SYMBOL net/wireless/lib80211 0x8e671760	lib80211_crypt_quiescing
+EXPORT_SYMBOL net/wireless/lib80211 0x9af551b7	lib80211_crypt_delayed_deinit
+EXPORT_SYMBOL net/wireless/lib80211 0xbb8a17ee	lib80211_crypt_info_init
+EXPORT_SYMBOL net/wireless/lib80211 0xf49a15c2	lib80211_unregister_crypto_ops
+EXPORT_SYMBOL sound/ac97_bus 0xf8f9396b	ac97_bus_type
+EXPORT_SYMBOL sound/core/oss/snd-mixer-oss 0xcf3bb328	snd_mixer_oss_ioctl_card
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x1a724fcc	snd_seq_kernel_client_ctl
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x3fb4d161	snd_seq_kernel_client_dispatch
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x57aabdbd	snd_seq_kernel_client_write_poll
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x6bb71038	snd_seq_delete_kernel_client
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x7ac2f329	snd_seq_expand_var_event
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x7b8699eb	snd_seq_event_port_detach
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x89947013	snd_use_lock_sync_helper
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xa09239ef	snd_seq_event_port_attach
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xaf1d016b	snd_seq_create_kernel_client
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xb8e448a0	snd_seq_set_queue_tempo
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xcac0a3be	snd_seq_kernel_client_enqueue
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xe934da1d	snd_seq_dump_var_event
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xf32ae979	snd_seq_kernel_client_enqueue_blocking
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x2f230c3f	snd_seq_device_register_driver
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x3a57f235	snd_seq_autoload_unlock
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x6339b6d0	snd_seq_device_load_drivers
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x99f4012a	snd_seq_device_new
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xb90668b2	snd_seq_autoload_lock
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xc622fb29	snd_seq_device_unregister_driver
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x6ea09972	snd_midi_channel_alloc_set
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x833a3e07	snd_midi_channel_set_clear
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xb9948d2c	snd_midi_channel_free_set
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xf0a1fdb3	snd_midi_process_event
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x17c15809	snd_midi_event_decode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x4ad3f518	snd_midi_event_reset_decode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x62384d3a	snd_midi_event_encode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x8a348811	snd_midi_event_reset_encode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x9df7af8b	snd_midi_event_free
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xc482499d	snd_midi_event_new
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xd9072e1a	snd_midi_event_no_status
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xe6df29c7	snd_midi_event_encode_byte
+EXPORT_SYMBOL sound/core/seq/snd-seq-virmidi 0xc97c2cc6	snd_virmidi_new
+EXPORT_SYMBOL sound/core/snd 0x086657e2	snd_ctl_find_id
+EXPORT_SYMBOL sound/core/snd 0x0fbd6eea	snd_seq_root
+EXPORT_SYMBOL sound/core/snd 0x18e1683f	snd_dma_program
+EXPORT_SYMBOL sound/core/snd 0x191e88cf	snd_dma_pointer
+EXPORT_SYMBOL sound/core/snd 0x198788b4	snd_lookup_oss_minor_data
+EXPORT_SYMBOL sound/core/snd 0x24a94b26	snd_info_get_line
+EXPORT_SYMBOL sound/core/snd 0x2ae3deaa	release_and_free_resource
+EXPORT_SYMBOL sound/core/snd 0x33387554	snd_card_proc_new
+EXPORT_SYMBOL sound/core/snd 0x336b0339	snd_ctl_rename_id
+EXPORT_SYMBOL sound/core/snd 0x356c19de	snd_jack_new
+EXPORT_SYMBOL sound/core/snd 0x35b63635	snd_ctl_add
+EXPORT_SYMBOL sound/core/snd 0x36883d88	snd_card_file_add
+EXPORT_SYMBOL sound/core/snd 0x36f8020a	snd_ctl_remove_id
+EXPORT_SYMBOL sound/core/snd 0x3971b4df	snd_ecards_limit
+EXPORT_SYMBOL sound/core/snd 0x3a414c05	snd_card_free
+EXPORT_SYMBOL sound/core/snd 0x3fd6dd66	snd_ctl_register_ioctl
+EXPORT_SYMBOL sound/core/snd 0x4a3ea5c0	snd_request_card
+EXPORT_SYMBOL sound/core/snd 0x4e9e390f	snd_jack_set_parent
+EXPORT_SYMBOL sound/core/snd 0x518bb7f8	copy_from_user_toio
+EXPORT_SYMBOL sound/core/snd 0x56299560	snd_unregister_device
+EXPORT_SYMBOL sound/core/snd 0x58e4e978	snd_ctl_find_numid
+EXPORT_SYMBOL sound/core/snd 0x67a102f8	snd_card_set_id
+EXPORT_SYMBOL sound/core/snd 0x70c15ac1	snd_dma_disable
+EXPORT_SYMBOL sound/core/snd 0x765d7299	snd_ctl_make_virtual_master
+EXPORT_SYMBOL sound/core/snd 0x7f8796d4	snd_device_register
+EXPORT_SYMBOL sound/core/snd 0x82b2e288	snd_component_add
+EXPORT_SYMBOL sound/core/snd 0x87ab18cf	snd_ctl_unregister_ioctl_compat
+EXPORT_SYMBOL sound/core/snd 0x8888841f	snd_ctl_unregister_ioctl
+EXPORT_SYMBOL sound/core/snd 0x8df3789f	snd_oss_info_register
+EXPORT_SYMBOL sound/core/snd 0x8f595b11	snd_major
+EXPORT_SYMBOL sound/core/snd 0x9272d45c	snd_info_create_card_entry
+EXPORT_SYMBOL sound/core/snd 0x947cda32	snd_pci_quirk_lookup
+EXPORT_SYMBOL sound/core/snd 0x9b1fe530	snd_register_device_for_dev
+EXPORT_SYMBOL sound/core/snd 0x9e6d79f8	snd_info_get_str
+EXPORT_SYMBOL sound/core/snd 0x9f5974dd	snd_info_register
+EXPORT_SYMBOL sound/core/snd 0xa30db9f0	snd_card_file_remove
+EXPORT_SYMBOL sound/core/snd 0xa56761ea	snd_card_register
+EXPORT_SYMBOL sound/core/snd 0xa65948f6	snd_register_oss_device
+EXPORT_SYMBOL sound/core/snd 0xa890453a	_snd_ctl_add_slave
+EXPORT_SYMBOL sound/core/snd 0xb2e5ae4a	snd_lookup_minor_data
+EXPORT_SYMBOL sound/core/snd 0xb8bbef7c	snd_ctl_boolean_stereo_info
+EXPORT_SYMBOL sound/core/snd 0xbb29005a	snd_info_create_module_entry
+EXPORT_SYMBOL sound/core/snd 0xc1237a8e	snd_mixer_oss_notify_callback
+EXPORT_SYMBOL sound/core/snd 0xc599d935	snd_ctl_notify
+EXPORT_SYMBOL sound/core/snd 0xc7799855	snd_info_free_entry
+EXPORT_SYMBOL sound/core/snd 0xc89d0558	snd_device_new
+EXPORT_SYMBOL sound/core/snd 0xd25cd381	snd_ctl_register_ioctl_compat
+EXPORT_SYMBOL sound/core/snd 0xd3479e67	snd_ctl_new1
+EXPORT_SYMBOL sound/core/snd 0xd9fa670d	snd_device_free
+EXPORT_SYMBOL sound/core/snd 0xdc98a912	snd_card_disconnect
+EXPORT_SYMBOL sound/core/snd 0xdf6e82a3	snd_power_wait
+EXPORT_SYMBOL sound/core/snd 0xe11c5317	snd_ctl_free_one
+EXPORT_SYMBOL sound/core/snd 0xe20c9214	snd_iprintf
+EXPORT_SYMBOL sound/core/snd 0xe243dde3	copy_to_user_fromio
+EXPORT_SYMBOL sound/core/snd 0xe256a48f	snd_ctl_boolean_mono_info
+EXPORT_SYMBOL sound/core/snd 0xe33b1431	snd_cards
+EXPORT_SYMBOL sound/core/snd 0xe93a3949	snd_card_free_when_closed
+EXPORT_SYMBOL sound/core/snd 0xef7b4a35	snd_add_device_sysfs_file
+EXPORT_SYMBOL sound/core/snd 0xf8f0987f	snd_card_create
+EXPORT_SYMBOL sound/core/snd 0xfe3c23c9	snd_unregister_oss_device
+EXPORT_SYMBOL sound/core/snd 0xffb5684a	snd_jack_report
+EXPORT_SYMBOL sound/core/snd 0xfffb2d43	snd_ctl_remove
+EXPORT_SYMBOL sound/core/snd-hwdep 0xb6a48e4e	snd_hwdep_new
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x14af11ae	snd_dma_free_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x19cc2ce3	snd_free_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x5543642b	snd_dma_alloc_pages_fallback
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x96cf8962	snd_dma_reserve_buf
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xc6829020	snd_malloc_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xd34a4171	snd_dma_alloc_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xfd75b57d	snd_dma_get_reserved_buf
+EXPORT_SYMBOL sound/core/snd-pcm 0x0283dfe3	_snd_pcm_hw_params_any
+EXPORT_SYMBOL sound/core/snd-pcm 0x04cda566	snd_interval_refine
+EXPORT_SYMBOL sound/core/snd-pcm 0x07cfcab5	snd_pcm_hw_constraint_step
+EXPORT_SYMBOL sound/core/snd-pcm 0x0baff000	snd_pcm_lib_read
+EXPORT_SYMBOL sound/core/snd-pcm 0x11bc5b9e	snd_pcm_hw_param_first
+EXPORT_SYMBOL sound/core/snd-pcm 0x138aba97	snd_pcm_lib_ioctl
+EXPORT_SYMBOL sound/core/snd-pcm 0x1426ad0e	snd_pcm_lib_preallocate_free_for_all
+EXPORT_SYMBOL sound/core/snd-pcm 0x1d027e4b	snd_pcm_format_signed
+EXPORT_SYMBOL sound/core/snd-pcm 0x1db5add3	snd_pcm_lib_write
+EXPORT_SYMBOL sound/core/snd-pcm 0x1e4ae96e	snd_pcm_lib_writev
+EXPORT_SYMBOL sound/core/snd-pcm 0x20b2b856	snd_pcm_hw_constraint_integer
+EXPORT_SYMBOL sound/core/snd-pcm 0x258319ae	snd_pcm_stop
+EXPORT_SYMBOL sound/core/snd-pcm 0x2fe8b1e7	snd_pcm_new_stream
+EXPORT_SYMBOL sound/core/snd-pcm 0x3796bdcc	snd_pcm_format_little_endian
+EXPORT_SYMBOL sound/core/snd-pcm 0x37ae4548	snd_pcm_set_sync
+EXPORT_SYMBOL sound/core/snd-pcm 0x39bf9301	_snd_pcm_hw_param_setempty
+EXPORT_SYMBOL sound/core/snd-pcm 0x467fad41	snd_pcm_hw_refine
+EXPORT_SYMBOL sound/core/snd-pcm 0x4b54677c	snd_pcm_notify
+EXPORT_SYMBOL sound/core/snd-pcm 0x4f816e9b	snd_pcm_format_big_endian
+EXPORT_SYMBOL sound/core/snd-pcm 0x4fc6812a	snd_pcm_lib_readv
+EXPORT_SYMBOL sound/core/snd-pcm 0x52e3e4a5	snd_pcm_hw_param_value
+EXPORT_SYMBOL sound/core/snd-pcm 0x54ebb0dd	snd_pcm_mmap_data
+EXPORT_SYMBOL sound/core/snd-pcm 0x5a519621	snd_pcm_lib_malloc_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0x5af068b9	snd_pcm_sgbuf_ops_page
+EXPORT_SYMBOL sound/core/snd-pcm 0x5e7f4920	snd_pcm_format_set_silence
+EXPORT_SYMBOL sound/core/snd-pcm 0x613fec92	snd_pcm_lib_mmap_iomem
+EXPORT_SYMBOL sound/core/snd-pcm 0x650f8603	snd_pcm_format_silence_64
+EXPORT_SYMBOL sound/core/snd-pcm 0x6708cc85	snd_pcm_lib_free_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0x68a24153	snd_pcm_format_physical_width
+EXPORT_SYMBOL sound/core/snd-pcm 0x6a92b62d	snd_pcm_release_substream
+EXPORT_SYMBOL sound/core/snd-pcm 0x6ef8fcd8	snd_pcm_format_linear
+EXPORT_SYMBOL sound/core/snd-pcm 0x79c46733	snd_pcm_suspend
+EXPORT_SYMBOL sound/core/snd-pcm 0x7ba22132	snd_pcm_new
+EXPORT_SYMBOL sound/core/snd-pcm 0x840b9e14	snd_pcm_hw_constraint_list
+EXPORT_SYMBOL sound/core/snd-pcm 0x88cc66cc	snd_pcm_link_rwlock
+EXPORT_SYMBOL sound/core/snd-pcm 0x8a7f10f7	snd_pcm_set_ops
+EXPORT_SYMBOL sound/core/snd-pcm 0x8da70e50	snd_pcm_open_substream
+EXPORT_SYMBOL sound/core/snd-pcm 0x8e926196	snd_pcm_hw_constraint_ratnums
+EXPORT_SYMBOL sound/core/snd-pcm 0x9392f09f	snd_pcm_limit_hw_rates
+EXPORT_SYMBOL sound/core/snd-pcm 0xa23d5223	snd_pcm_period_elapsed
+EXPORT_SYMBOL sound/core/snd-pcm 0xa61aa028	snd_pcm_format_unsigned
+EXPORT_SYMBOL sound/core/snd-pcm 0xb106ee27	snd_pcm_lib_preallocate_pages_for_all
+EXPORT_SYMBOL sound/core/snd-pcm 0xb65db154	snd_pcm_hw_constraint_pow2
+EXPORT_SYMBOL sound/core/snd-pcm 0xb9638db4	snd_pcm_rate_to_rate_bit
+EXPORT_SYMBOL sound/core/snd-pcm 0xd0b9b8b8	snd_interval_list
+EXPORT_SYMBOL sound/core/snd-pcm 0xd2b12657	snd_pcm_sgbuf_get_chunk_size
+EXPORT_SYMBOL sound/core/snd-pcm 0xd2b13e84	snd_pcm_hw_constraint_minmax
+EXPORT_SYMBOL sound/core/snd-pcm 0xd4376189	snd_pcm_hw_constraint_msbits
+EXPORT_SYMBOL sound/core/snd-pcm 0xddde43b7	snd_pcm_kernel_ioctl
+EXPORT_SYMBOL sound/core/snd-pcm 0xdff3d782	snd_pcm_hw_param_last
+EXPORT_SYMBOL sound/core/snd-pcm 0xe51a1c64	snd_pcm_format_size
+EXPORT_SYMBOL sound/core/snd-pcm 0xe56a9336	snd_pcm_format_width
+EXPORT_SYMBOL sound/core/snd-pcm 0xeb4a0f1e	snd_pcm_lib_preallocate_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0xeccc6e0d	snd_pcm_hw_constraint_ratdens
+EXPORT_SYMBOL sound/core/snd-pcm 0xf3797152	snd_interval_ratnum
+EXPORT_SYMBOL sound/core/snd-pcm 0xf5631218	snd_pcm_hw_rule_add
+EXPORT_SYMBOL sound/core/snd-pcm 0xf5f81e49	snd_pcm_suspend_all
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x0dfc5607	snd_rawmidi_output_params
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x1435550e	snd_rawmidi_set_ops
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x15014a78	snd_rawmidi_transmit
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x1c0fec18	snd_rawmidi_kernel_write
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x1c9fa137	snd_rawmidi_kernel_read
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x24c3ff79	snd_rawmidi_transmit_peek
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x3e868aa6	snd_rawmidi_new
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x3fb48a42	snd_rawmidi_receive
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x43c7ad0e	snd_rawmidi_drain_output
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x4f7c9907	snd_rawmidi_drain_input
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x5fb62ed6	snd_rawmidi_kernel_release
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x66ccf04f	snd_rawmidi_drop_output
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x7c8bafa7	snd_rawmidi_kernel_open
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x9c473ed7	snd_rawmidi_info_select
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xdbd1bb01	snd_rawmidi_transmit_ack
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xe0049e04	snd_rawmidi_input_params
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xfc33e146	snd_rawmidi_transmit_empty
+EXPORT_SYMBOL sound/core/snd-timer 0x0c03d75e	snd_timer_pause
+EXPORT_SYMBOL sound/core/snd-timer 0x238e02a3	snd_timer_resolution
+EXPORT_SYMBOL sound/core/snd-timer 0x4d50cd6f	snd_timer_new
+EXPORT_SYMBOL sound/core/snd-timer 0x5ebc1b54	snd_timer_continue
+EXPORT_SYMBOL sound/core/snd-timer 0x685d7079	snd_timer_stop
+EXPORT_SYMBOL sound/core/snd-timer 0x7bd41b62	snd_timer_close
+EXPORT_SYMBOL sound/core/snd-timer 0x7fb2bd7d	snd_timer_open
+EXPORT_SYMBOL sound/core/snd-timer 0x84d2ad9e	snd_timer_interrupt
+EXPORT_SYMBOL sound/core/snd-timer 0xa982f662	snd_timer_global_new
+EXPORT_SYMBOL sound/core/snd-timer 0xcae90537	snd_timer_start
+EXPORT_SYMBOL sound/core/snd-timer 0xd1517916	snd_timer_global_free
+EXPORT_SYMBOL sound/core/snd-timer 0xe88e69c0	snd_timer_notify
+EXPORT_SYMBOL sound/core/snd-timer 0xf6a31408	snd_timer_global_register
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x4bbb7f27	snd_mpu401_uart_interrupt_tx
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xb7cf2711	snd_mpu401_uart_new
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xc43a3940	snd_mpu401_uart_interrupt
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x0089ddc2	snd_opl3_new
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x05060a19	snd_opl3_regmap
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x262f0de9	snd_opl3_timer_new
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x283d46d0	snd_opl3_init
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x2a218180	snd_opl3_reset
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x30092e60	snd_opl3_interrupt
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x709f48ff	snd_opl3_hwdep_new
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x7142c441	snd_opl3_create
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x8a106199	snd_opl3_load_patch
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xd2496fbb	snd_opl3_find_patch
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x2def93dd	snd_vx_create
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x34a01927	snd_vx_check_reg_bit
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x45f59df7	snd_vx_dsp_boot
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x61ee1548	snd_vx_resume
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x99b88ede	snd_vx_irq_handler
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xc0bc43a8	snd_vx_free_firmware
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xd31f404e	snd_vx_suspend
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xedad2758	snd_vx_dsp_load
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xee9a4f55	snd_vx_load_boot_image
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xfbd40606	snd_vx_setup_firmware
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x5a449905	snd_ak4114_check_rate_and_errors
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x79a562b1	snd_ak4114_external_rate
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x9217b72a	snd_ak4114_create
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xa69e4568	snd_ak4114_reinit
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xcbccc619	snd_ak4114_build
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xd2929df4	snd_ak4114_reg_write
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x158c6808	snd_ak4117_build
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x3d4542bd	snd_ak4117_external_rate
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x761a2844	snd_ak4117_create
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xab5c349c	snd_ak4117_check_rate_and_errors
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xc6a45832	snd_ak4117_reg_write
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xf4ee59a3	snd_ak4117_reinit
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x3c5212a0	snd_akm4xxx_write
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x5051dbeb	snd_akm4xxx_init
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x517dc9f0	snd_akm4xxx_reset
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x71073c98	snd_akm4xxx_build_controls
+EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0x2261511c	snd_pt2258_build_controls
+EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0xb2cda088	snd_pt2258_reset
+EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0x84a5d660	snd_tea575x_exit
+EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0xadfdfcb5	snd_tea575x_init
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x385061b1	snd_cs8427_iec958_pcm
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x9a60e6ff	snd_cs8427_reg_write
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0xa3d90865	snd_cs8427_create
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0xe23a0aa5	snd_cs8427_iec958_build
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0xf3f767ac	snd_cs8427_iec958_active
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x037ec012	snd_i2c_bus_create
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x8b24c059	snd_i2c_readbytes
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x98ff425f	snd_i2c_device_create
+EXPORT_SYMBOL sound/i2c/snd-i2c 0xca50b88c	snd_i2c_sendbytes
+EXPORT_SYMBOL sound/i2c/snd-i2c 0xf5619220	snd_i2c_probeaddr
+EXPORT_SYMBOL sound/i2c/snd-i2c 0xface366e	snd_i2c_device_free
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x03ce20ef	snd_sbmixer_resume
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x3e766e66	snd_sbmixer_add_ctl
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x3f93ada0	snd_sbmixer_read
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x44167b64	snd_sbdsp_get_byte
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x7e137191	snd_sbdsp_command
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x81ae5a0e	snd_sbdsp_create
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x88a57212	snd_sbmixer_suspend
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x9c529e71	snd_sbmixer_new
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xeb2770a8	snd_sbmixer_write
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xf2c6ed2b	snd_sbdsp_reset
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0x36538465	snd_sb16dsp_get_pcm_ops
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xa6947cb1	snd_sb16dsp_pcm
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xa91df509	snd_sb16dsp_configure
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xc57f5b54	snd_sb16dsp_interrupt
+EXPORT_SYMBOL sound/oss/ad1848 0x26c427ee	ad1848_detect
+EXPORT_SYMBOL sound/oss/ad1848 0x4624688c	ad1848_init
+EXPORT_SYMBOL sound/oss/ad1848 0x55262c70	probe_ms_sound
+EXPORT_SYMBOL sound/oss/ad1848 0x9bf1cc62	ad1848_unload
+EXPORT_SYMBOL sound/oss/ad1848 0xb29a9148	unload_ms_sound
+EXPORT_SYMBOL sound/oss/ad1848 0xc04f6f67	ad1848_control
+EXPORT_SYMBOL sound/oss/ad1848 0xd8eb3e68	attach_ms_sound
+EXPORT_SYMBOL sound/oss/mpu401 0x5febf284	unload_mpu401
+EXPORT_SYMBOL sound/oss/mpu401 0xbc3b01cd	attach_mpu401
+EXPORT_SYMBOL sound/oss/mpu401 0xd9ec5db4	probe_mpu401
+EXPORT_SYMBOL sound/oss/sb_lib 0x42424109	sb_be_quiet
+EXPORT_SYMBOL sound/oss/sb_lib 0x450f9aea	smw_free
+EXPORT_SYMBOL sound/oss/sb_lib 0x45c571fc	probe_sbmpu
+EXPORT_SYMBOL sound/oss/sb_lib 0x74afd69c	unload_sbmpu
+EXPORT_SYMBOL sound/oss/sb_lib 0x9609e0aa	sb_dsp_init
+EXPORT_SYMBOL sound/oss/sb_lib 0xc4884969	sb_dsp_unload
+EXPORT_SYMBOL sound/oss/sb_lib 0xd8a2731c	sb_dsp_detect
+EXPORT_SYMBOL sound/oss/sound 0x04c87ec8	compute_finetune
+EXPORT_SYMBOL sound/oss/sound 0x06339815	sound_unload_synthdev
+EXPORT_SYMBOL sound/oss/sound 0x0f280035	conf_printf
+EXPORT_SYMBOL sound/oss/sound 0x17ba231d	seq_input_event
+EXPORT_SYMBOL sound/oss/sound 0x1b3df3cf	sound_alloc_mixerdev
+EXPORT_SYMBOL sound/oss/sound 0x1b8f1435	sound_install_mixer
+EXPORT_SYMBOL sound/oss/sound 0x1f395686	MIDIbuf_avail
+EXPORT_SYMBOL sound/oss/sound 0x2161d5e8	sound_timer_init
+EXPORT_SYMBOL sound/oss/sound 0x2aa31695	midi_synth_kill_note
+EXPORT_SYMBOL sound/oss/sound 0x394cb088	sound_free_dma
+EXPORT_SYMBOL sound/oss/sound 0x418f5fbe	sound_close_dma
+EXPORT_SYMBOL sound/oss/sound 0x4cd01bdd	num_audiodevs
+EXPORT_SYMBOL sound/oss/sound 0x4ff47e9d	midi_synth_setup_voice
+EXPORT_SYMBOL sound/oss/sound 0x51e354b2	sound_alloc_timerdev
+EXPORT_SYMBOL sound/oss/sound 0x56504ca2	midi_synth_reset
+EXPORT_SYMBOL sound/oss/sound 0x5d986fc9	note_to_freq
+EXPORT_SYMBOL sound/oss/sound 0x7679ee76	seq_copy_to_input
+EXPORT_SYMBOL sound/oss/sound 0x7bdf0907	conf_printf2
+EXPORT_SYMBOL sound/oss/sound 0x86ff299d	sound_timer_devs
+EXPORT_SYMBOL sound/oss/sound 0x892093e0	midi_synth_controller
+EXPORT_SYMBOL sound/oss/sound 0x90bd9714	sequencer_timer
+EXPORT_SYMBOL sound/oss/sound 0x987bcf12	DMAbuf_outputintr
+EXPORT_SYMBOL sound/oss/sound 0x9a95733f	sound_alloc_dma
+EXPORT_SYMBOL sound/oss/sound 0x9bdaf24d	midi_synth_start_note
+EXPORT_SYMBOL sound/oss/sound 0x9d845b18	num_mixers
+EXPORT_SYMBOL sound/oss/sound 0xa1d5f04f	load_mixer_volumes
+EXPORT_SYMBOL sound/oss/sound 0xa1eae7cf	num_midis
+EXPORT_SYMBOL sound/oss/sound 0xa41ead5f	sound_unload_timerdev
+EXPORT_SYMBOL sound/oss/sound 0xa51c913b	sound_unload_mixerdev
+EXPORT_SYMBOL sound/oss/sound 0xa6bb414c	sound_unload_mididev
+EXPORT_SYMBOL sound/oss/sound 0xa948751e	sound_unload_audiodev
+EXPORT_SYMBOL sound/oss/sound 0xaacb64b9	audio_devs
+EXPORT_SYMBOL sound/oss/sound 0xad45df73	midi_synth_close
+EXPORT_SYMBOL sound/oss/sound 0xad48861a	synth_devs
+EXPORT_SYMBOL sound/oss/sound 0xaef743b2	midi_synth_ioctl
+EXPORT_SYMBOL sound/oss/sound 0xb14b22cd	midi_synth_hw_control
+EXPORT_SYMBOL sound/oss/sound 0xb51587f6	do_midi_msg
+EXPORT_SYMBOL sound/oss/sound 0xba413f87	sound_alloc_mididev
+EXPORT_SYMBOL sound/oss/sound 0xba7dd041	midi_synth_bender
+EXPORT_SYMBOL sound/oss/sound 0xc748d109	sound_alloc_synthdev
+EXPORT_SYMBOL sound/oss/sound 0xcab4d5bf	midi_synth_load_patch
+EXPORT_SYMBOL sound/oss/sound 0xcc4b8797	sound_open_dma
+EXPORT_SYMBOL sound/oss/sound 0xd85be938	midi_synth_set_instr
+EXPORT_SYMBOL sound/oss/sound 0xd8626d3d	sound_install_audiodrv
+EXPORT_SYMBOL sound/oss/sound 0xdb400afa	midi_synth_panning
+EXPORT_SYMBOL sound/oss/sound 0xe056b71c	DMAbuf_start_dma
+EXPORT_SYMBOL sound/oss/sound 0xe2675a79	sound_timer_interrupt
+EXPORT_SYMBOL sound/oss/sound 0xeb315d99	DMAbuf_inputintr
+EXPORT_SYMBOL sound/oss/sound 0xed565e80	midi_devs
+EXPORT_SYMBOL sound/oss/sound 0xf046b91e	mixer_devs
+EXPORT_SYMBOL sound/oss/sound 0xf1ea8a20	midi_synth_aftertouch
+EXPORT_SYMBOL sound/oss/sound 0xf6b3a2fb	midi_synth_open
+EXPORT_SYMBOL sound/oss/sound 0xf78f6363	sequencer_init
+EXPORT_SYMBOL sound/oss/sound 0xfa6871be	sound_timer_syncinterval
+EXPORT_SYMBOL sound/oss/sound 0xfddcbfb3	midi_synth_send_sysex
+EXPORT_SYMBOL sound/oss/uart401 0x049cd8b7	uart401intr
+EXPORT_SYMBOL sound/oss/uart401 0x12a7b2a9	probe_uart401
+EXPORT_SYMBOL sound/oss/uart401 0xecfdd9c9	unload_uart401
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x08c5c7da	snd_ac97_mixer
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x12952a24	snd_ac97_tune_hardware
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x33634ec3	snd_ac97_write
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x3c82a669	snd_ac97_get_short_name
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x43bab2ea	snd_ac97_pcm_open
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x49efa3fa	snd_ac97_set_rate
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x512cacf7	snd_ac97_pcm_assign
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x79222faf	snd_ac97_update_power
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x81bd7faf	snd_ac97_pcm_close
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x8636c5ff	snd_ac97_read
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x93c01225	snd_ac97_suspend
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xad3b3e42	snd_ac97_write_cache
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xb22daa08	snd_ac97_pcm_double_rate_rules
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xb7e6889a	snd_ac97_update_bits
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xd9120d8c	snd_ac97_resume
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xe68cde03	snd_ac97_bus
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xee6042b3	snd_ac97_update
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x28581cd0	snd_emu10k1_synth_alloc
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x3408bfef	snd_emu10k1_voice_free
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x54187668	snd_emu10k1_memblk_map
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x71c5ad82	snd_emu10k1_synth_bzero
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x9c1eef4b	snd_emu10k1_voice_alloc
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xb736a06d	snd_emu10k1_ptr_write
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xdc132a56	snd_emu10k1_synth_free
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xe45df4a3	snd_emu10k1_synth_copy_from_user
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xf4bbc4fa	snd_emu10k1_ptr_read
+EXPORT_SYMBOL sound/pci/hda/snd-hda-codec 0xa8ab69f7	snd_hda_parse_generic_codec
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0xddc973a1	snd_ice1712_akm4xxx_free
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0xebbe58c7	snd_ice1712_akm4xxx_init
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0xf2eac5b5	snd_ice1712_akm4xxx_build_controls
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x0dfcb762	oxygen_write_i2c
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x16b29596	oxygen_write32
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x59859d13	oxygen_reset_uart
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x5b3300a3	oxygen_write16
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x6613bad2	oxygen_read8
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x6de0b2d2	oxygen_write32_masked
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x7bae6631	oxygen_read16
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x7f61372f	oxygen_read32
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x8c18ee6d	oxygen_write16_masked
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xa1eb6c59	oxygen_write_ac97_masked
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xa9eb5b06	oxygen_pci_remove
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xbba08178	oxygen_write8_masked
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xc7639e24	oxygen_pci_probe
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xd4a971a7	oxygen_write8
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xe2313681	oxygen_write_uart
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xe6f20ae7	oxygen_write_spi
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xeaaf0fbe	oxygen_pci_resume
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xed8e7b07	oxygen_write_ac97
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xedfd3cc4	oxygen_read_ac97
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xfdb298d7	oxygen_pci_suspend
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x0e81e11d	snd_trident_alloc_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x154f0358	snd_trident_stop_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x2b749b35	snd_trident_write_voice_regs
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x63ac2517	snd_trident_free_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0xa559115f	snd_trident_start_voice
+EXPORT_SYMBOL sound/soc/codecs/snd-soc-uda134x 0xfdcbf802	uda134x_dai
+EXPORT_SYMBOL sound/sound_firmware 0x39e3dd23	mod_firmware_load
+EXPORT_SYMBOL sound/soundcore 0x24420355	register_sound_dsp
+EXPORT_SYMBOL sound/soundcore 0x732af479	register_sound_special_device
+EXPORT_SYMBOL sound/soundcore 0x773d64b7	sound_class
+EXPORT_SYMBOL sound/soundcore 0x7afc9d8a	unregister_sound_mixer
+EXPORT_SYMBOL sound/soundcore 0x99c95fa5	unregister_sound_special
+EXPORT_SYMBOL sound/soundcore 0xcb1b04ef	register_sound_midi
+EXPORT_SYMBOL sound/soundcore 0xcd083b10	unregister_sound_dsp
+EXPORT_SYMBOL sound/soundcore 0xcdc7e3db	register_sound_special
+EXPORT_SYMBOL sound/soundcore 0xf81ac2c4	register_sound_mixer
+EXPORT_SYMBOL sound/soundcore 0xfdab6de3	unregister_sound_midi
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x135bbfbc	snd_emux_new
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x1686fedb	snd_emux_terminate_all
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x655cb202	snd_sf_linear_to_log
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x7226fca8	snd_emux_free
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xcfb54cf1	snd_emux_unlock_voice
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xe0c5f2bd	snd_emux_lock_voice
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xeecb9fc6	snd_emux_register
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x1c70e905	snd_util_memhdr_free
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x1edb55af	snd_util_memhdr_new
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x20f5804b	snd_util_mem_alloc
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x3473ceed	__snd_util_mem_free
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x73f507eb	snd_util_mem_avail
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x7e8afa30	snd_util_mem_free
+EXPORT_SYMBOL sound/synth/snd-util-mem 0xaf732cf4	__snd_util_mem_alloc
+EXPORT_SYMBOL sound/synth/snd-util-mem 0xc77893d0	__snd_util_memblk_new
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0x16756dc0	snd_usbmidi_input_start
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0x63343b1d	snd_usbmidi_input_stop
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0xd9d2bb03	snd_usbmidi_disconnect
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0xdc2fa853	snd_usb_create_midi_interface
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x0c90d121	dm_mem_cache_shrink
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x24eba0a3	dm_mem_cache_client_destroy
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x5079558f	dm_mem_cache_client_create
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x707ed102	dm_mem_cache_grow
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x920a7a41	dm_message_parse
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0xa4fcc197	dm_mem_cache_free
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0xf899a65e	dm_mem_cache_alloc
+EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x04dca738	lirc_unregister_driver
+EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0xb971a556	lirc_register_driver
+EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0xcc82c68c	lirc_get_pdata
+EXPORT_SYMBOL vmlinux 0x00000000	per_cpu__softirq_work_list
+EXPORT_SYMBOL vmlinux 0x0000e6ec	__lock_buffer
+EXPORT_SYMBOL vmlinux 0x000ca49d	scsi_device_lookup_by_target
+EXPORT_SYMBOL vmlinux 0x000e4268	devcgroup_inode_permission
+EXPORT_SYMBOL vmlinux 0x002f7245	jbd2_journal_try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0x00502db7	ipv6_chk_addr
+EXPORT_SYMBOL vmlinux 0x0055fdb0	jbd2_journal_unlock_updates
+EXPORT_SYMBOL vmlinux 0x00572541	scsi_remove_target
+EXPORT_SYMBOL vmlinux 0x0062d588	tty_driver_kref_put
+EXPORT_SYMBOL vmlinux 0x00665f64	nf_unregister_sockopt
+EXPORT_SYMBOL vmlinux 0x00801678	flush_scheduled_work
+EXPORT_SYMBOL vmlinux 0x00852045	input_filter_device
+EXPORT_SYMBOL vmlinux 0x0088b956	xfrm_alloc_spi
+EXPORT_SYMBOL vmlinux 0x009c2dbf	scsi_reset_provider
+EXPORT_SYMBOL vmlinux 0x009d258f	_write_lock
+EXPORT_SYMBOL vmlinux 0x00bd82b0	unbind_con_driver
+EXPORT_SYMBOL vmlinux 0x00c4dc87	timecounter_init
+EXPORT_SYMBOL vmlinux 0x00e1091f	set_pages_nx
+EXPORT_SYMBOL vmlinux 0x01000e51	schedule
+EXPORT_SYMBOL vmlinux 0x0101071f	blk_queue_max_hw_segments
+EXPORT_SYMBOL vmlinux 0x011a9842	xfrm_policy_delete
+EXPORT_SYMBOL vmlinux 0x0148d917	eth_header_cache_update
+EXPORT_SYMBOL vmlinux 0x014aa6c8	lro_receive_frags
+EXPORT_SYMBOL vmlinux 0x014d3a73	scsi_dma_unmap
+EXPORT_SYMBOL vmlinux 0x015af3ea	arch_acpi_processor_init_pdc
+EXPORT_SYMBOL vmlinux 0x0186d073	percpu_counter_set
+EXPORT_SYMBOL vmlinux 0x01902adf	netpoll_trap
+EXPORT_SYMBOL vmlinux 0x0198c70f	sock_no_sendpage
+EXPORT_SYMBOL vmlinux 0x019a2353	km_state_notify
+EXPORT_SYMBOL vmlinux 0x01a0bbab	inode_init_once
+EXPORT_SYMBOL vmlinux 0x01a4aab6	set_irq_chip_data
+EXPORT_SYMBOL vmlinux 0x01d19038	acpi_enable_subsystem
+EXPORT_SYMBOL vmlinux 0x01ff7835	bd_claim
+EXPORT_SYMBOL vmlinux 0x02124474	ip_send_check
+EXPORT_SYMBOL vmlinux 0x021de2e3	blk_integrity_register
+EXPORT_SYMBOL vmlinux 0x0237b57a	arch_unregister_cpu
+EXPORT_SYMBOL vmlinux 0x0238950a	dqget
+EXPORT_SYMBOL vmlinux 0x0256389f	bit_waitqueue
+EXPORT_SYMBOL vmlinux 0x02649054	security_sock_rcv_skb
+EXPORT_SYMBOL vmlinux 0x027d4204	security_path_truncate
+EXPORT_SYMBOL vmlinux 0x0280ec8d	dma_pool_free
+EXPORT_SYMBOL vmlinux 0x029444f0	native_read_tsc
+EXPORT_SYMBOL vmlinux 0x0298d368	kobject_init
+EXPORT_SYMBOL vmlinux 0x02a3b2f2	consume_skb
+EXPORT_SYMBOL vmlinux 0x02a6ce5a	crc16_table
+EXPORT_SYMBOL vmlinux 0x02aff2f4	acpi_install_gpe_handler
+EXPORT_SYMBOL vmlinux 0x02c059ac	unregister_filesystem
+EXPORT_SYMBOL vmlinux 0x02c40853	textsearch_unregister
+EXPORT_SYMBOL vmlinux 0x02ccedd8	sock_common_getsockopt
+EXPORT_SYMBOL vmlinux 0x02d81845	audit_log_task_context
+EXPORT_SYMBOL vmlinux 0x02e338c9	tcp_parse_options
+EXPORT_SYMBOL vmlinux 0x02e4b7ef	tcp_v4_connect
+EXPORT_SYMBOL vmlinux 0x02e8a4d8	jbd2_journal_file_inode
+EXPORT_SYMBOL vmlinux 0x02fe0578	inet_put_port
+EXPORT_SYMBOL vmlinux 0x0334da4e	scsi_command_size_tbl
+EXPORT_SYMBOL vmlinux 0x0340d0e1	acpi_pci_osc_control_set
+EXPORT_SYMBOL vmlinux 0x0340e0ae	schedule_delayed_work
+EXPORT_SYMBOL vmlinux 0x0353085e	scsi_block_when_processing_errors
+EXPORT_SYMBOL vmlinux 0x036d0acd	vlan_ioctl_set
+EXPORT_SYMBOL vmlinux 0x037a0cba	kfree
+EXPORT_SYMBOL vmlinux 0x03a0960f	pci_choose_state
+EXPORT_SYMBOL vmlinux 0x03b41135	vc_cons
+EXPORT_SYMBOL vmlinux 0x03c06156	bitmap_fold
+EXPORT_SYMBOL vmlinux 0x03fce771	i2c_smbus_read_byte
+EXPORT_SYMBOL vmlinux 0x03fd2571	vm_unmap_ram
+EXPORT_SYMBOL vmlinux 0x0409e1cf	scsi_add_host_with_dma
+EXPORT_SYMBOL vmlinux 0x0422fe4a	inet_csk_timer_bug_msg
+EXPORT_SYMBOL vmlinux 0x0486e455	kmem_cache_destroy
+EXPORT_SYMBOL vmlinux 0x0487f831	fb_find_best_display
+EXPORT_SYMBOL vmlinux 0x04927208	cpu_active_mask
+EXPORT_SYMBOL vmlinux 0x04a92034	nf_register_sockopt
+EXPORT_SYMBOL vmlinux 0x04b0b0f2	open_bdev_exclusive
+EXPORT_SYMBOL vmlinux 0x04b28e87	tcp_sendpage
+EXPORT_SYMBOL vmlinux 0x04cb4730	swiotlb_unmap_sg_attrs
+EXPORT_SYMBOL vmlinux 0x04d073c5	get_io_context
+EXPORT_SYMBOL vmlinux 0x04d4c837	cdrom_release
+EXPORT_SYMBOL vmlinux 0x04d8c750	release_perfctr_nmi
+EXPORT_SYMBOL vmlinux 0x04de5dfd	dma_pool_destroy
+EXPORT_SYMBOL vmlinux 0x05148d07	__skb_recv_datagram
+EXPORT_SYMBOL vmlinux 0x05240ee7	percpu_counter_batch
+EXPORT_SYMBOL vmlinux 0x054433da	acpi_processor_preregister_performance
+EXPORT_SYMBOL vmlinux 0x0592e13b	iput
+EXPORT_SYMBOL vmlinux 0x05d46a07	pci_wake_from_d3
+EXPORT_SYMBOL vmlinux 0x05dc0c0e	ethtool_op_get_link
+EXPORT_SYMBOL vmlinux 0x05dff25d	input_unregister_handle
+EXPORT_SYMBOL vmlinux 0x061651be	strcat
+EXPORT_SYMBOL vmlinux 0x061f131d	pci_bus_read_config_dword
+EXPORT_SYMBOL vmlinux 0x0631c26b	misc_deregister
+EXPORT_SYMBOL vmlinux 0x0652fba1	pci_write_vpd
+EXPORT_SYMBOL vmlinux 0x06594f52	sk_stream_wait_close
+EXPORT_SYMBOL vmlinux 0x067d8d35	security_release_secctx
+EXPORT_SYMBOL vmlinux 0x068c7263	ioremap_cache
+EXPORT_SYMBOL vmlinux 0x06a485f2	__krealloc
+EXPORT_SYMBOL vmlinux 0x06ca1f8e	inode_set_bytes
+EXPORT_SYMBOL vmlinux 0x06d728b1	tcp_parse_md5sig_option
+EXPORT_SYMBOL vmlinux 0x06f271a7	fb_show_logo
+EXPORT_SYMBOL vmlinux 0x06f4f9cf	blk_rq_map_sg
+EXPORT_SYMBOL vmlinux 0x06f5745f	kernel_sock_ioctl
+EXPORT_SYMBOL vmlinux 0x06fe3b14	default_grn
+EXPORT_SYMBOL vmlinux 0x0706039b	simple_fsync
+EXPORT_SYMBOL vmlinux 0x0716b5d5	truncate_inode_pages
+EXPORT_SYMBOL vmlinux 0x07228a90	dma_find_channel
+EXPORT_SYMBOL vmlinux 0x0727c4f3	iowrite8
+EXPORT_SYMBOL vmlinux 0x0739b7ab	register_filesystem
+EXPORT_SYMBOL vmlinux 0x073dfa12	generate_resume_trace
+EXPORT_SYMBOL vmlinux 0x075583e2	i2c_del_adapter
+EXPORT_SYMBOL vmlinux 0x07794292	bdi_destroy
+EXPORT_SYMBOL vmlinux 0x0791efe6	xfrm_user_policy
+EXPORT_SYMBOL vmlinux 0x0799aca4	local_bh_enable
+EXPORT_SYMBOL vmlinux 0x0799c50a	param_set_ulong
+EXPORT_SYMBOL vmlinux 0x07a079de	security_path_unlink
+EXPORT_SYMBOL vmlinux 0x07a890c8	fb_alloc_cmap
+EXPORT_SYMBOL vmlinux 0x07c84dd6	pci_bus_find_capability
+EXPORT_SYMBOL vmlinux 0x07cc4a5d	printk_timed_ratelimit
+EXPORT_SYMBOL vmlinux 0x07d5c76a	jbd2_journal_release_buffer
+EXPORT_SYMBOL vmlinux 0x07d9b783	scsi_nl_send_vendor_msg
+EXPORT_SYMBOL vmlinux 0x07e06587	devm_request_threaded_irq
+EXPORT_SYMBOL vmlinux 0x07e29b6e	neigh_parms_release
+EXPORT_SYMBOL vmlinux 0x0824d939	gnet_stats_copy_app
+EXPORT_SYMBOL vmlinux 0x0827ca0c	find_inode_number
+EXPORT_SYMBOL vmlinux 0x082c3213	pci_root_buses
+EXPORT_SYMBOL vmlinux 0x0830f841	blkdev_get
+EXPORT_SYMBOL vmlinux 0x08b73cee	i2c_del_driver
+EXPORT_SYMBOL vmlinux 0x08bd486e	d_genocide
+EXPORT_SYMBOL vmlinux 0x08d66a3a	warn_slowpath_fmt
+EXPORT_SYMBOL vmlinux 0x08e3163b	vfs_fsync_range
+EXPORT_SYMBOL vmlinux 0x08ea5b4a	__brelse
+EXPORT_SYMBOL vmlinux 0x09144037	mdiobus_alloc
+EXPORT_SYMBOL vmlinux 0x0933aae1	efi_enabled
+EXPORT_SYMBOL vmlinux 0x0947f954	in6_dev_finish_destroy
+EXPORT_SYMBOL vmlinux 0x0948cde9	num_physpages
+EXPORT_SYMBOL vmlinux 0x095e45c3	unregister_sysrq_key
+EXPORT_SYMBOL vmlinux 0x0980c7cb	md_write_start
+EXPORT_SYMBOL vmlinux 0x098431ba	acpi_get_current_resources
+EXPORT_SYMBOL vmlinux 0x098b71c6	fb_dealloc_cmap
+EXPORT_SYMBOL vmlinux 0x09c55cec	schedule_timeout_interruptible
+EXPORT_SYMBOL vmlinux 0x09d44df9	in_lock_functions
+EXPORT_SYMBOL vmlinux 0x09db5c4c	kset_unregister
+EXPORT_SYMBOL vmlinux 0x0a1c5654	tcp_splice_read
+EXPORT_SYMBOL vmlinux 0x0a2487e0	unblock_all_signals
+EXPORT_SYMBOL vmlinux 0x0a2c080b	pci_claim_resource
+EXPORT_SYMBOL vmlinux 0x0a2f0511	scsi_rescan_device
+EXPORT_SYMBOL vmlinux 0x0a329673	find_get_page
+EXPORT_SYMBOL vmlinux 0x0a5e854c	key_validate
+EXPORT_SYMBOL vmlinux 0x0acb1a3c	__bitmap_shift_right
+EXPORT_SYMBOL vmlinux 0x0accea8f	pci_get_subsys
+EXPORT_SYMBOL vmlinux 0x0acf7679	dma_issue_pending_all
+EXPORT_SYMBOL vmlinux 0x0ad392a9	dev_change_flags
+EXPORT_SYMBOL vmlinux 0x0ad4e45e	netlink_ack
+EXPORT_SYMBOL vmlinux 0x0b0d888b	icmpv6_err_convert
+EXPORT_SYMBOL vmlinux 0x0b1beb31	vmalloc_32_user
+EXPORT_SYMBOL vmlinux 0x0b51064a	scsi_adjust_queue_depth
+EXPORT_SYMBOL vmlinux 0x0b571416	eth_mac_addr
+EXPORT_SYMBOL vmlinux 0x0b7146a2	jbd2_log_start_commit
+EXPORT_SYMBOL vmlinux 0x0b742fd7	simple_strtol
+EXPORT_SYMBOL vmlinux 0x0b7c9d5d	agp_copy_info
+EXPORT_SYMBOL vmlinux 0x0bbfc8fb	dma_pool_alloc
+EXPORT_SYMBOL vmlinux 0x0bc35748	posix_lock_file
+EXPORT_SYMBOL vmlinux 0x0c0d0cc4	ps2_begin_command
+EXPORT_SYMBOL vmlinux 0x0c168781	iget5_locked
+EXPORT_SYMBOL vmlinux 0x0c25f5d7	xfrm_state_insert
+EXPORT_SYMBOL vmlinux 0x0c29bd5b	vfs_create
+EXPORT_SYMBOL vmlinux 0x0c35638b	pci_enable_msix
+EXPORT_SYMBOL vmlinux 0x0c3efe93	pnp_register_driver
+EXPORT_SYMBOL vmlinux 0x0c4f7239	remap_vmalloc_range
+EXPORT_SYMBOL vmlinux 0x0c502002	rwsem_wake
+EXPORT_SYMBOL vmlinux 0x0c59652b	inet_addr_type
+EXPORT_SYMBOL vmlinux 0x0c65e73c	scsi_normalize_sense
+EXPORT_SYMBOL vmlinux 0x0c83db75	__module_put_and_exit
+EXPORT_SYMBOL vmlinux 0x0c8c9e99	scsi_show_extd_sense
+EXPORT_SYMBOL vmlinux 0x0ca29b3f	__mark_inode_dirty
+EXPORT_SYMBOL vmlinux 0x0ca68c83	napi_reuse_skb
+EXPORT_SYMBOL vmlinux 0x0ca7b7a8	acpi_check_region
+EXPORT_SYMBOL vmlinux 0x0cae232b	utf16s_to_utf8s
+EXPORT_SYMBOL vmlinux 0x0cbf3e67	tty_shutdown
+EXPORT_SYMBOL vmlinux 0x0cbf7752	cancel_dirty_page
+EXPORT_SYMBOL vmlinux 0x0cd6d63d	pci_scan_single_device
+EXPORT_SYMBOL vmlinux 0x0cddfd16	__locks_copy_lock
+EXPORT_SYMBOL vmlinux 0x0d09fc10	agp_bridge
+EXPORT_SYMBOL vmlinux 0x0d26a76d	_write_lock_irq
+EXPORT_SYMBOL vmlinux 0x0d3dda14	acpi_get_type
+EXPORT_SYMBOL vmlinux 0x0d542439	__ipv6_addr_type
+EXPORT_SYMBOL vmlinux 0x0d557800	__generic_file_aio_write
+EXPORT_SYMBOL vmlinux 0x0d5c6e16	qdisc_destroy
+EXPORT_SYMBOL vmlinux 0x0da10ec3	security_sock_graft
+EXPORT_SYMBOL vmlinux 0x0db4ee10	ip_mc_dec_group
+EXPORT_SYMBOL vmlinux 0x0dbdbcf3	d_splice_alias
+EXPORT_SYMBOL vmlinux 0x0e0423c7	__bforget
+EXPORT_SYMBOL vmlinux 0x0e1e5bb8	hippi_change_mtu
+EXPORT_SYMBOL vmlinux 0x0e354ce8	unlock_buffer
+EXPORT_SYMBOL vmlinux 0x0e52592a	panic
+EXPORT_SYMBOL vmlinux 0x0e58a209	pci_get_device
+EXPORT_SYMBOL vmlinux 0x0e64f5d8	nf_ip6_checksum
+EXPORT_SYMBOL vmlinux 0x0e6e9078	__find_get_block
+EXPORT_SYMBOL vmlinux 0x0e83fea1	del_timer_sync
+EXPORT_SYMBOL vmlinux 0x0ec1d9ba	pnp_possible_config
+EXPORT_SYMBOL vmlinux 0x0ef35985	sk_reset_timer
+EXPORT_SYMBOL vmlinux 0x0f03d39d	dm_exception_store_type_register
+EXPORT_SYMBOL vmlinux 0x0f04255c	unlock_super
+EXPORT_SYMBOL vmlinux 0x0f198321	journal_abort
+EXPORT_SYMBOL vmlinux 0x0f1ef871	posix_acl_alloc
+EXPORT_SYMBOL vmlinux 0x0f7f4c97	kmem_cache_create
+EXPORT_SYMBOL vmlinux 0x0f8def1d	set_user_nice
+EXPORT_SYMBOL vmlinux 0x0fc5e8eb	radix_tree_gang_lookup_slot
+EXPORT_SYMBOL vmlinux 0x0fd00a68	acpi_clear_event
+EXPORT_SYMBOL vmlinux 0x0fd4c8e2	scsi_release_buffers
+EXPORT_SYMBOL vmlinux 0x0fe875dd	set_bh_page
+EXPORT_SYMBOL vmlinux 0x0ff2b602	slhc_compress
+EXPORT_SYMBOL vmlinux 0x103679e9	aio_put_req
+EXPORT_SYMBOL vmlinux 0x103d77c1	pcim_iounmap_regions
+EXPORT_SYMBOL vmlinux 0x103e4326	journal_force_commit_nested
+EXPORT_SYMBOL vmlinux 0x10481a88	scsi_device_get
+EXPORT_SYMBOL vmlinux 0x105e2727	__tracepoint_kmalloc
+EXPORT_SYMBOL vmlinux 0x1072a394	csum_partial_copy_from_user
+EXPORT_SYMBOL vmlinux 0x1072df39	dquot_acquire
+EXPORT_SYMBOL vmlinux 0x107d5757	textsearch_destroy
+EXPORT_SYMBOL vmlinux 0x108e8985	param_get_uint
+EXPORT_SYMBOL vmlinux 0x10b2a901	agp_generic_destroy_page
+EXPORT_SYMBOL vmlinux 0x10c86b2f	lro_flush_all
+EXPORT_SYMBOL vmlinux 0x10c8d6c9	tty_mutex
+EXPORT_SYMBOL vmlinux 0x10dc2d36	pci_set_dma_mask
+EXPORT_SYMBOL vmlinux 0x10e1e5f7	inet_shutdown
+EXPORT_SYMBOL vmlinux 0x10ee20bb	default_blu
+EXPORT_SYMBOL vmlinux 0x10f4c9b5	audit_log_end
+EXPORT_SYMBOL vmlinux 0x10f78ae9	pci_clear_master
+EXPORT_SYMBOL vmlinux 0x11267875	scsi_extd_sense_format
+EXPORT_SYMBOL vmlinux 0x112682b7	__rta_fill
+EXPORT_SYMBOL vmlinux 0x1148a413	locks_remove_posix
+EXPORT_SYMBOL vmlinux 0x114ed1ce	schedule_work_on
+EXPORT_SYMBOL vmlinux 0x1163f0a7	blk_max_low_pfn
+EXPORT_SYMBOL vmlinux 0x117093be	qdisc_class_hash_init
+EXPORT_SYMBOL vmlinux 0x118f01ea	putname
+EXPORT_SYMBOL vmlinux 0x11a18b14	__wake_up_bit
+EXPORT_SYMBOL vmlinux 0x11c0b195	netif_receive_skb
+EXPORT_SYMBOL vmlinux 0x11e09d4d	agp_alloc_page_array
+EXPORT_SYMBOL vmlinux 0x120659f7	nonseekable_open
+EXPORT_SYMBOL vmlinux 0x1222c1ca	mmc_card_can_sleep
+EXPORT_SYMBOL vmlinux 0x124cda91	pci_request_region_exclusive
+EXPORT_SYMBOL vmlinux 0x126fa21b	con_is_bound
+EXPORT_SYMBOL vmlinux 0x12815e65	key_instantiate_and_link
+EXPORT_SYMBOL vmlinux 0x128db321	tcp_md5_hash_header
+EXPORT_SYMBOL vmlinux 0x128ebd60	simple_statfs
+EXPORT_SYMBOL vmlinux 0x129de341	wrmsr_on_cpus
+EXPORT_SYMBOL vmlinux 0x12f0ae6f	skb_tx_hash
+EXPORT_SYMBOL vmlinux 0x12f10736	udplite_table
+EXPORT_SYMBOL vmlinux 0x1306cf92	block_sync_page
+EXPORT_SYMBOL vmlinux 0x131cb47c	ps2_handle_ack
+EXPORT_SYMBOL vmlinux 0x134816fa	kset_register
+EXPORT_SYMBOL vmlinux 0x135c2168	make_bad_inode
+EXPORT_SYMBOL vmlinux 0x1378e714	acpi_video_display_switch_support
+EXPORT_SYMBOL vmlinux 0x13806862	free_buffer_head
+EXPORT_SYMBOL vmlinux 0x138a78d1	set_current_groups
+EXPORT_SYMBOL vmlinux 0x139ee635	llc_mac_hdr_init
+EXPORT_SYMBOL vmlinux 0x13c17bb7	netif_rx_ni
+EXPORT_SYMBOL vmlinux 0x13f42152	system_entering_hibernation
+EXPORT_SYMBOL vmlinux 0x1423e3b9	pskb_copy
+EXPORT_SYMBOL vmlinux 0x1430e6e0	unregister_acpi_notifier
+EXPORT_SYMBOL vmlinux 0x1449e868	acpi_unlock_battery_dir
+EXPORT_SYMBOL vmlinux 0x144e75ac	pci_select_bars
+EXPORT_SYMBOL vmlinux 0x147a1a9c	ppp_register_channel
+EXPORT_SYMBOL vmlinux 0x148b5cc4	acpi_processor_notify_smm
+EXPORT_SYMBOL vmlinux 0x148c5a11	nlmsg_notify
+EXPORT_SYMBOL vmlinux 0x14a6b5df	tcp_v4_md5_do_add
+EXPORT_SYMBOL vmlinux 0x14af0cf7	gen_pool_destroy
+EXPORT_SYMBOL vmlinux 0x14d95a16	scsi_add_device
+EXPORT_SYMBOL vmlinux 0x14f40287	neigh_seq_start
+EXPORT_SYMBOL vmlinux 0x14fd1dc5	i2c_clients_command
+EXPORT_SYMBOL vmlinux 0x152449b0	journal_init_dev
+EXPORT_SYMBOL vmlinux 0x1551dc51	bitmap_find_free_region
+EXPORT_SYMBOL vmlinux 0x155f423a	pipe_lock
+EXPORT_SYMBOL vmlinux 0x1573e696	netdev_boot_setup_check
+EXPORT_SYMBOL vmlinux 0x159d2032	scsi_prep_fn
+EXPORT_SYMBOL vmlinux 0x15e33b9a	__ip_select_ident
+EXPORT_SYMBOL vmlinux 0x15ef2dd9	kfifo_free
+EXPORT_SYMBOL vmlinux 0x160d105f	arch_debugfs_dir
+EXPORT_SYMBOL vmlinux 0x160ea4c8	sfi_disabled
+EXPORT_SYMBOL vmlinux 0x1610b8d6	sock_no_mmap
+EXPORT_SYMBOL vmlinux 0x16144d0c	devm_ioremap_nocache
+EXPORT_SYMBOL vmlinux 0x16305289	warn_slowpath_null
+EXPORT_SYMBOL vmlinux 0x163c5e39	twl4030_i2c_read
+EXPORT_SYMBOL vmlinux 0x1646e7b0	insert_inode_locked4
+EXPORT_SYMBOL vmlinux 0x1675606f	bad_dma_address
+EXPORT_SYMBOL vmlinux 0x1678399f	splice_from_pipe_end
+EXPORT_SYMBOL vmlinux 0x167dd7bd	unregister_exec_domain
+EXPORT_SYMBOL vmlinux 0x167e7f9d	__get_user_1
+EXPORT_SYMBOL vmlinux 0x16a3a808	locks_init_lock
+EXPORT_SYMBOL vmlinux 0x16be2b02	simple_dir_operations
+EXPORT_SYMBOL vmlinux 0x16c177cd	jbd2_journal_init_jbd_inode
+EXPORT_SYMBOL vmlinux 0x16d6ee84	invalidate_bdev
+EXPORT_SYMBOL vmlinux 0x16e8abdd	generic_write_sync
+EXPORT_SYMBOL vmlinux 0x16fe73d4	pci_request_regions_exclusive
+EXPORT_SYMBOL vmlinux 0x170c25ee	acpi_get_next_object
+EXPORT_SYMBOL vmlinux 0x170d0d83	dev_kfree_skb_irq
+EXPORT_SYMBOL vmlinux 0x172f03bf	acpi_processor_unregister_performance
+EXPORT_SYMBOL vmlinux 0x175341d9	netlink_set_err
+EXPORT_SYMBOL vmlinux 0x1786f577	dma_sync_wait
+EXPORT_SYMBOL vmlinux 0x17c85a66	radix_tree_tagged
+EXPORT_SYMBOL vmlinux 0x17cb0e0f	filemap_fdatawait
+EXPORT_SYMBOL vmlinux 0x17df17bc	sysctl_tcp_ecn
+EXPORT_SYMBOL vmlinux 0x17e8ce2b	pci_unregister_driver
+EXPORT_SYMBOL vmlinux 0x17f341a0	i8042_lock_chip
+EXPORT_SYMBOL vmlinux 0x180012c0	tcf_action_exec
+EXPORT_SYMBOL vmlinux 0x1809e618	udp_proc_register
+EXPORT_SYMBOL vmlinux 0x181b6ff2	mempool_resize
+EXPORT_SYMBOL vmlinux 0x181d587b	send_sig_info
+EXPORT_SYMBOL vmlinux 0x1823e436	kernel_accept
+EXPORT_SYMBOL vmlinux 0x183fa88b	mempool_alloc_slab
+EXPORT_SYMBOL vmlinux 0x184b82fb	mmc_vddrange_to_ocrmask
+EXPORT_SYMBOL vmlinux 0x1859995e	netlink_kernel_release
+EXPORT_SYMBOL vmlinux 0x185b852e	d_move
+EXPORT_SYMBOL vmlinux 0x186d64a4	inet_frags_exit_net
+EXPORT_SYMBOL vmlinux 0x18734964	__mutex_init
+EXPORT_SYMBOL vmlinux 0x187b8303	inc_zone_page_state
+EXPORT_SYMBOL vmlinux 0x189b6bac	memory_read_from_buffer
+EXPORT_SYMBOL vmlinux 0x18aec32d	neigh_ifdown
+EXPORT_SYMBOL vmlinux 0x18b72573	register_kmmio_probe
+EXPORT_SYMBOL vmlinux 0x18cd3c6d	blk_plug_device
+EXPORT_SYMBOL vmlinux 0x18e8401d	proc_dointvec_jiffies
+EXPORT_SYMBOL vmlinux 0x18f81d73	dm_io_client_create
+EXPORT_SYMBOL vmlinux 0x190b2664	set_binfmt
+EXPORT_SYMBOL vmlinux 0x191640a6	input_set_keycode
+EXPORT_SYMBOL vmlinux 0x19391763	iov_iter_fault_in_readable
+EXPORT_SYMBOL vmlinux 0x194dd2ce	security_path_rename
+EXPORT_SYMBOL vmlinux 0x1976bc16	__tracepoint_kmem_cache_free
+EXPORT_SYMBOL vmlinux 0x1985ed3c	prepare_to_wait_exclusive
+EXPORT_SYMBOL vmlinux 0x198ed6d5	proc_create_data
+EXPORT_SYMBOL vmlinux 0x19906a00	bio_endio
+EXPORT_SYMBOL vmlinux 0x199ed0cd	net_disable_timestamp
+EXPORT_SYMBOL vmlinux 0x19be50cb	blk_put_request
+EXPORT_SYMBOL vmlinux 0x19bf01f8	nla_reserve_nohdr
+EXPORT_SYMBOL vmlinux 0x19c910b9	jbd2_journal_flush
+EXPORT_SYMBOL vmlinux 0x19cae78a	neigh_destroy
+EXPORT_SYMBOL vmlinux 0x19d5d20a	acpi_walk_namespace
+EXPORT_SYMBOL vmlinux 0x19fb255f	pci_add_new_bus
+EXPORT_SYMBOL vmlinux 0x19fb9ae9	inet_twsk_deschedule
+EXPORT_SYMBOL vmlinux 0x1a13a66d	qdisc_create_dflt
+EXPORT_SYMBOL vmlinux 0x1a45cb6c	acpi_disabled
+EXPORT_SYMBOL vmlinux 0x1a5b79f8	free_netdev
+EXPORT_SYMBOL vmlinux 0x1a75caa3	_read_lock
+EXPORT_SYMBOL vmlinux 0x1a7616ad	rfkill_get_led_trigger_name
+EXPORT_SYMBOL vmlinux 0x1a8a845e	idle_nomwait
+EXPORT_SYMBOL vmlinux 0x1ac22694	pci_pme_active
+EXPORT_SYMBOL vmlinux 0x1acaa664	may_umount_tree
+EXPORT_SYMBOL vmlinux 0x1ace138d	bitmap_allocate_region
+EXPORT_SYMBOL vmlinux 0x1ada379d	ip_route_input
+EXPORT_SYMBOL vmlinux 0x1adcb9b9	pci_bus_add_devices
+EXPORT_SYMBOL vmlinux 0x1ade34af	put_tty_driver
+EXPORT_SYMBOL vmlinux 0x1ae894e5	find_or_create_page
+EXPORT_SYMBOL vmlinux 0x1afefe99	flock_lock_file_wait
+EXPORT_SYMBOL vmlinux 0x1b015d25	bitmap_parselist
+EXPORT_SYMBOL vmlinux 0x1b059509	pci_vpd_truncate
+EXPORT_SYMBOL vmlinux 0x1b0cca06	get_super
+EXPORT_SYMBOL vmlinux 0x1b114926	mark_buffer_async_write
+EXPORT_SYMBOL vmlinux 0x1b2a2fe9	bd_set_size
+EXPORT_SYMBOL vmlinux 0x1b56d351	i2c_smbus_read_word_data
+EXPORT_SYMBOL vmlinux 0x1b6314fd	in_aton
+EXPORT_SYMBOL vmlinux 0x1b74a5e3	fb_pan_display
+EXPORT_SYMBOL vmlinux 0x1b892b28	phy_stop
+EXPORT_SYMBOL vmlinux 0x1b89419f	add_wait_queue_exclusive
+EXPORT_SYMBOL vmlinux 0x1b8b95ad	i8042_unlock_chip
+EXPORT_SYMBOL vmlinux 0x1b9359c9	register_framebuffer
+EXPORT_SYMBOL vmlinux 0x1b9981cc	set_irq_wake
+EXPORT_SYMBOL vmlinux 0x1b9e0ff1	scsilun_to_int
+EXPORT_SYMBOL vmlinux 0x1bb868a8	ethtool_op_get_ufo
+EXPORT_SYMBOL vmlinux 0x1bba0f18	__serio_register_driver
+EXPORT_SYMBOL vmlinux 0x1bd0556b	slow_work_cancel
+EXPORT_SYMBOL vmlinux 0x1c0ae878	tcp_ioctl
+EXPORT_SYMBOL vmlinux 0x1c0c1825	register_sysrq_key
+EXPORT_SYMBOL vmlinux 0x1c101caa	tty_hangup
+EXPORT_SYMBOL vmlinux 0x1c1af916	set_normalized_timespec
+EXPORT_SYMBOL vmlinux 0x1c8a04b0	acpi_reset
+EXPORT_SYMBOL vmlinux 0x1ca03058	scsi_dma_map
+EXPORT_SYMBOL vmlinux 0x1cc52f26	netif_notify_peers
+EXPORT_SYMBOL vmlinux 0x1cc6719a	register_reboot_notifier
+EXPORT_SYMBOL vmlinux 0x1cefe352	wait_for_completion
+EXPORT_SYMBOL vmlinux 0x1cfeae11	i2c_smbus_write_word_data
+EXPORT_SYMBOL vmlinux 0x1d1f9fb7	__inet6_lookup_established
+EXPORT_SYMBOL vmlinux 0x1d2c5c26	names_cachep
+EXPORT_SYMBOL vmlinux 0x1d2e87c6	do_gettimeofday
+EXPORT_SYMBOL vmlinux 0x1d724631	wait_on_sync_kiocb
+EXPORT_SYMBOL vmlinux 0x1d872048	bh_uptodate_or_lock
+EXPORT_SYMBOL vmlinux 0x1d876ac8	follow_down
+EXPORT_SYMBOL vmlinux 0x1d8da520	dquot_free_space
+EXPORT_SYMBOL vmlinux 0x1da4b71d	security_path_mkdir
+EXPORT_SYMBOL vmlinux 0x1db7706b	__copy_user_nocache
+EXPORT_SYMBOL vmlinux 0x1dc36131	fb_destroy_modedb
+EXPORT_SYMBOL vmlinux 0x1dcf8dfc	write_inode_now
+EXPORT_SYMBOL vmlinux 0x1dd1890f	__skb_checksum_complete
+EXPORT_SYMBOL vmlinux 0x1dd571e6	fb_copy_cmap
+EXPORT_SYMBOL vmlinux 0x1de5d49f	blk_queue_max_segment_size
+EXPORT_SYMBOL vmlinux 0x1e079033	__destroy_inode
+EXPORT_SYMBOL vmlinux 0x1e0c2be4	ioremap_wc
+EXPORT_SYMBOL vmlinux 0x1e5b92e2	bitmap_unplug
+EXPORT_SYMBOL vmlinux 0x1e6196b2	xfrm_state_flush
+EXPORT_SYMBOL vmlinux 0x1e6d26a8	strstr
+EXPORT_SYMBOL vmlinux 0x1ea0d6e2	generic_file_direct_write
+EXPORT_SYMBOL vmlinux 0x1ec0101c	ip_nat_decode_session
+EXPORT_SYMBOL vmlinux 0x1ec9661a	rtnl_notify
+EXPORT_SYMBOL vmlinux 0x1eda3b1f	sock_get_timestampns
+EXPORT_SYMBOL vmlinux 0x1eddf952	acpi_get_physical_device
+EXPORT_SYMBOL vmlinux 0x1efe283f	__cap_full_set
+EXPORT_SYMBOL vmlinux 0x1f0248d5	dma_async_device_register
+EXPORT_SYMBOL vmlinux 0x1f0c39f8	pci_set_mwi
+EXPORT_SYMBOL vmlinux 0x1f150b49	ip_mc_inc_group
+EXPORT_SYMBOL vmlinux 0x1f37fe7b	unregister_netdevice
+EXPORT_SYMBOL vmlinux 0x1f75e552	pnp_stop_dev
+EXPORT_SYMBOL vmlinux 0x1f7f72d6	inet_frag_evictor
+EXPORT_SYMBOL vmlinux 0x1f9c8a05	journal_release_buffer
+EXPORT_SYMBOL vmlinux 0x1fc6a52d	xfrm6_input_addr
+EXPORT_SYMBOL vmlinux 0x1fcbbacd	sock_kmalloc
+EXPORT_SYMBOL vmlinux 0x1fe92690	genphy_read_status
+EXPORT_SYMBOL vmlinux 0x1fedf0f4	__request_region
+EXPORT_SYMBOL vmlinux 0x20000329	simple_strtoul
+EXPORT_SYMBOL vmlinux 0x2005e68a	acpi_remove_fixed_event_handler
+EXPORT_SYMBOL vmlinux 0x20092385	acpi_enter_sleep_state_s4bios
+EXPORT_SYMBOL vmlinux 0x200effc8	inet_frags_fini
+EXPORT_SYMBOL vmlinux 0x20178d74	netdev_bonding_change
+EXPORT_SYMBOL vmlinux 0x2021f373	nobh_write_end
+EXPORT_SYMBOL vmlinux 0x20305190	__dst_free
+EXPORT_SYMBOL vmlinux 0x20385c58	genl_register_mc_group
+EXPORT_SYMBOL vmlinux 0x20389237	tcp_close
+EXPORT_SYMBOL vmlinux 0x20447dbf	get_disk
+EXPORT_SYMBOL vmlinux 0x204857ac	proc_dostring
+EXPORT_SYMBOL vmlinux 0x20810127	md_wait_for_blocked_rdev
+EXPORT_SYMBOL vmlinux 0x208739f6	acpi_load_table
+EXPORT_SYMBOL vmlinux 0x20c5e3d0	tty_hung_up_p
+EXPORT_SYMBOL vmlinux 0x20c69d9a	pci_iomap
+EXPORT_SYMBOL vmlinux 0x20d0162c	blk_rq_map_user_iov
+EXPORT_SYMBOL vmlinux 0x20eadeb6	ip_compute_csum
+EXPORT_SYMBOL vmlinux 0x20f9322a	idr_pre_get
+EXPORT_SYMBOL vmlinux 0x210ba160	dst_release
+EXPORT_SYMBOL vmlinux 0x2130d946	posix_test_lock
+EXPORT_SYMBOL vmlinux 0x215c4bbe	scsi_register_driver
+EXPORT_SYMBOL vmlinux 0x215cb50a	scsi_host_set_state
+EXPORT_SYMBOL vmlinux 0x215ebd78	bitrev16
+EXPORT_SYMBOL vmlinux 0x2162352b	rfkill_alloc
+EXPORT_SYMBOL vmlinux 0x21821794	blk_rq_unmap_user
+EXPORT_SYMBOL vmlinux 0x21984e49	acpi_bus_get_device
+EXPORT_SYMBOL vmlinux 0x21a7bb1d	flush_old_exec
+EXPORT_SYMBOL vmlinux 0x21b41f4c	register_netdev
+EXPORT_SYMBOL vmlinux 0x21d50a51	tcf_hash_release
+EXPORT_SYMBOL vmlinux 0x21d69926	netlink_unicast
+EXPORT_SYMBOL vmlinux 0x21e0ea22	acpi_get_id
+EXPORT_SYMBOL vmlinux 0x21e1bbb7	blkdev_put
+EXPORT_SYMBOL vmlinux 0x21e5679c	copy_user_generic
+EXPORT_SYMBOL vmlinux 0x21e5c71a	journal_set_features
+EXPORT_SYMBOL vmlinux 0x221959d1	pv_mmu_ops
+EXPORT_SYMBOL vmlinux 0x222e7ce2	sysfs_streq
+EXPORT_SYMBOL vmlinux 0x2246a0b2	vfs_dq_drop
+EXPORT_SYMBOL vmlinux 0x2246ebc3	journal_check_used_features
+EXPORT_SYMBOL vmlinux 0x225e03b8	input_register_device
+EXPORT_SYMBOL vmlinux 0x226d4cd2	unload_nls
+EXPORT_SYMBOL vmlinux 0x226e86a9	audit_log
+EXPORT_SYMBOL vmlinux 0x226f9cda	tcp_enter_memory_pressure
+EXPORT_SYMBOL vmlinux 0x2271aa13	sock_recvmsg
+EXPORT_SYMBOL vmlinux 0x2288378f	system_state
+EXPORT_SYMBOL vmlinux 0x2288744d	backlight_device_register
+EXPORT_SYMBOL vmlinux 0x22a73912	__tcp_put_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x22b325d5	kd_mksound
+EXPORT_SYMBOL vmlinux 0x22b6533b	xfrm_sad_getinfo
+EXPORT_SYMBOL vmlinux 0x22c2870c	dquot_commit
+EXPORT_SYMBOL vmlinux 0x22f36f1d	tty_write_room
+EXPORT_SYMBOL vmlinux 0x23269a13	strict_strtoul
+EXPORT_SYMBOL vmlinux 0x23343cac	input_open_device
+EXPORT_SYMBOL vmlinux 0x234509f3	strncat
+EXPORT_SYMBOL vmlinux 0x236c8c64	memcpy
+EXPORT_SYMBOL vmlinux 0x23757082	neigh_seq_stop
+EXPORT_SYMBOL vmlinux 0x239b4777	xfrm_cfg_mutex
+EXPORT_SYMBOL vmlinux 0x23a746c1	agp_allocate_memory
+EXPORT_SYMBOL vmlinux 0x23ae2207	pci_back_from_sleep
+EXPORT_SYMBOL vmlinux 0x23b99e92	node_states
+EXPORT_SYMBOL vmlinux 0x23c8f257	slhc_uncompress
+EXPORT_SYMBOL vmlinux 0x23dfe1ea	dump_trace
+EXPORT_SYMBOL vmlinux 0x23f744d5	input_allocate_device
+EXPORT_SYMBOL vmlinux 0x23fd3028	vmalloc_node
+EXPORT_SYMBOL vmlinux 0x242d203e	bdi_set_max_ratio
+EXPORT_SYMBOL vmlinux 0x243c46ac	sk_stream_wait_connect
+EXPORT_SYMBOL vmlinux 0x243ce8f7	scsi_register
+EXPORT_SYMBOL vmlinux 0x24404ed1	lookup_bdev
+EXPORT_SYMBOL vmlinux 0x2441e883	agp_generic_free_gatt_table
+EXPORT_SYMBOL vmlinux 0x24428be5	strncpy_from_user
+EXPORT_SYMBOL vmlinux 0x2447636d	bdi_register_dev
+EXPORT_SYMBOL vmlinux 0x2459bbcc	console_set_on_cmdline
+EXPORT_SYMBOL vmlinux 0x24624544	ftrace_print_flags_seq
+EXPORT_SYMBOL vmlinux 0x24686293	proc_doulongvec_minmax
+EXPORT_SYMBOL vmlinux 0x246e39b5	__blk_run_queue
+EXPORT_SYMBOL vmlinux 0x24792ea7	journal_init_inode
+EXPORT_SYMBOL vmlinux 0x24976564	blk_queue_end_tag
+EXPORT_SYMBOL vmlinux 0x24d3f093	dev_driver_string
+EXPORT_SYMBOL vmlinux 0x24e4bb01	down_write_trylock
+EXPORT_SYMBOL vmlinux 0x24e97a62	slow_work_enqueue
+EXPORT_SYMBOL vmlinux 0x24fdac79	wake_bit_function
+EXPORT_SYMBOL vmlinux 0x250c9db8	vfs_get_dqblk
+EXPORT_SYMBOL vmlinux 0x2526a8cc	nf_setsockopt
+EXPORT_SYMBOL vmlinux 0x25360fde	slow_work_sleep_till_thread_needed
+EXPORT_SYMBOL vmlinux 0x2537e25d	sock_wfree
+EXPORT_SYMBOL vmlinux 0x253cd86e	lease_get_mtime
+EXPORT_SYMBOL vmlinux 0x256e77f4	blk_remove_plug
+EXPORT_SYMBOL vmlinux 0x25820c64	fs_overflowuid
+EXPORT_SYMBOL vmlinux 0x258355b4	fb_find_best_mode
+EXPORT_SYMBOL vmlinux 0x258a5096	unregister_tcf_proto_ops
+EXPORT_SYMBOL vmlinux 0x25c80ce8	xfrm6_rcv
+EXPORT_SYMBOL vmlinux 0x25d66bde	get_sb_nodev
+EXPORT_SYMBOL vmlinux 0x25da8f24	jbd2_journal_ack_err
+EXPORT_SYMBOL vmlinux 0x25dc0945	pci_disable_msix
+EXPORT_SYMBOL vmlinux 0x25ec1b28	strlen
+EXPORT_SYMBOL vmlinux 0x2608cf90	tcp_v4_remember_stamp
+EXPORT_SYMBOL vmlinux 0x264aa41f	key_unlink
+EXPORT_SYMBOL vmlinux 0x2660f577	xfrm_policy_walk
+EXPORT_SYMBOL vmlinux 0x26624b68	pci_set_dma_max_seg_size
+EXPORT_SYMBOL vmlinux 0x266c82a2	dev_gro_receive
+EXPORT_SYMBOL vmlinux 0x267fc65b	__tasklet_hi_schedule
+EXPORT_SYMBOL vmlinux 0x2685ba4f	vm_insert_page
+EXPORT_SYMBOL vmlinux 0x2685c3d7	__sg_alloc_table
+EXPORT_SYMBOL vmlinux 0x26890a1e	bd_release
+EXPORT_SYMBOL vmlinux 0x26e76fb8	sysctl_udp_wmem_min
+EXPORT_SYMBOL vmlinux 0x26ef4655	kernel_getpeername
+EXPORT_SYMBOL vmlinux 0x26f44f33	ip_mc_rejoin_group
+EXPORT_SYMBOL vmlinux 0x26f77356	dev_get_by_flags
+EXPORT_SYMBOL vmlinux 0x270e59aa	tcp_read_sock
+EXPORT_SYMBOL vmlinux 0x271cba95	acpi_bus_private_data_handler
+EXPORT_SYMBOL vmlinux 0x27214b58	xfrm_state_lookup_byaddr
+EXPORT_SYMBOL vmlinux 0x2727da5d	_atomic_dec_and_lock
+EXPORT_SYMBOL vmlinux 0x272c639a	dev_trans_start
+EXPORT_SYMBOL vmlinux 0x272d394e	mtrr_del
+EXPORT_SYMBOL vmlinux 0x272ed4f4	get_unmapped_area_prot
+EXPORT_SYMBOL vmlinux 0x275337be	pci_setup_cardbus
+EXPORT_SYMBOL vmlinux 0x275e6122	mapping_tagged
+EXPORT_SYMBOL vmlinux 0x27864d57	memparse
+EXPORT_SYMBOL vmlinux 0x278a3ebc	tty_register_ldisc
+EXPORT_SYMBOL vmlinux 0x279ccb32	fasync_helper
+EXPORT_SYMBOL vmlinux 0x27aeea2b	set_security_override
+EXPORT_SYMBOL vmlinux 0x27b35c51	tcp_sockets_allocated
+EXPORT_SYMBOL vmlinux 0x27bbf221	disable_irq_nosync
+EXPORT_SYMBOL vmlinux 0x27c33efe	csum_ipv6_magic
+EXPORT_SYMBOL vmlinux 0x27c61ece	qdisc_put_stab
+EXPORT_SYMBOL vmlinux 0x27d9c162	scsi_scan_target
+EXPORT_SYMBOL vmlinux 0x27e2df9b	napi_skb_finish
+EXPORT_SYMBOL vmlinux 0x27f1096c	skb_push
+EXPORT_SYMBOL vmlinux 0x27fe0c1c	generic_file_open
+EXPORT_SYMBOL vmlinux 0x28185517	generic_file_splice_read
+EXPORT_SYMBOL vmlinux 0x285135e6	acpi_evaluate_integer
+EXPORT_SYMBOL vmlinux 0x285422fe	poll_schedule_timeout
+EXPORT_SYMBOL vmlinux 0x285ac517	strict_strtoll
+EXPORT_SYMBOL vmlinux 0x2869bc21	dma_async_memcpy_buf_to_buf
+EXPORT_SYMBOL vmlinux 0x2876a6d3	memcpy_toiovec
+EXPORT_SYMBOL vmlinux 0x287abd03	scsi_device_quiesce
+EXPORT_SYMBOL vmlinux 0x28a2ed02	scsi_build_sense_buffer
+EXPORT_SYMBOL vmlinux 0x28b4d0ae	phy_device_create
+EXPORT_SYMBOL vmlinux 0x28c97d95	swiotlb_sync_sg_for_device
+EXPORT_SYMBOL vmlinux 0x28ddba35	blk_init_queue
+EXPORT_SYMBOL vmlinux 0x28f0f8ec	dm_table_get_size
+EXPORT_SYMBOL vmlinux 0x292093f4	native_rdmsr_safe_regs
+EXPORT_SYMBOL vmlinux 0x29406477	acpi_root_dir
+EXPORT_SYMBOL vmlinux 0x29537c9e	alloc_chrdev_region
+EXPORT_SYMBOL vmlinux 0x295b9a4b	i8042_check_port_owner
+EXPORT_SYMBOL vmlinux 0x295d7309	mnt_unpin
+EXPORT_SYMBOL vmlinux 0x296b8d74	framebuffer_release
+EXPORT_SYMBOL vmlinux 0x29bd4c46	__cap_init_eff_set
+EXPORT_SYMBOL vmlinux 0x29cdea0a	bio_copy_user
+EXPORT_SYMBOL vmlinux 0x29f24646	filemap_write_and_wait
+EXPORT_SYMBOL vmlinux 0x2a20c466	jbd2_journal_begin_ordered_truncate
+EXPORT_SYMBOL vmlinux 0x2a25ca34	inet_frag_find
+EXPORT_SYMBOL vmlinux 0x2a303d4d	check_signature
+EXPORT_SYMBOL vmlinux 0x2a531136	bio_integrity_endio
+EXPORT_SYMBOL vmlinux 0x2a6939d9	stop_tty
+EXPORT_SYMBOL vmlinux 0x2a7dc9b3	blk_alloc_queue
+EXPORT_SYMBOL vmlinux 0x2a83d158	scsi_set_medium_removal
+EXPORT_SYMBOL vmlinux 0x2a906afb	ethtool_op_set_ufo
+EXPORT_SYMBOL vmlinux 0x2ab9c4dd	input_inject_event
+EXPORT_SYMBOL vmlinux 0x2abbc3c6	i2c_use_client
+EXPORT_SYMBOL vmlinux 0x2abf240e	fifo_set_limit
+EXPORT_SYMBOL vmlinux 0x2ac4fb36	path_lookup
+EXPORT_SYMBOL vmlinux 0x2ac9f02c	input_unregister_device
+EXPORT_SYMBOL vmlinux 0x2ace4469	scsi_register_interface
+EXPORT_SYMBOL vmlinux 0x2acfcba9	tcf_hash_create
+EXPORT_SYMBOL vmlinux 0x2ad91a17	ethtool_op_set_tx_ipv6_csum
+EXPORT_SYMBOL vmlinux 0x2aeb2800	mempool_create_node
+EXPORT_SYMBOL vmlinux 0x2b0ba2b0	scsi_sense_desc_find
+EXPORT_SYMBOL vmlinux 0x2b10fae8	skb_queue_tail
+EXPORT_SYMBOL vmlinux 0x2b1898f3	tcf_exts_change
+EXPORT_SYMBOL vmlinux 0x2b19b3a6	elv_rb_del
+EXPORT_SYMBOL vmlinux 0x2b1bd607	bio_map_user
+EXPORT_SYMBOL vmlinux 0x2b9a0cca	pci_pme_capable
+EXPORT_SYMBOL vmlinux 0x2ba707a8	sysctl_tcp_low_latency
+EXPORT_SYMBOL vmlinux 0x2ba9089a	block_prepare_write
+EXPORT_SYMBOL vmlinux 0x2bb55d6e	acpi_remove_notify_handler
+EXPORT_SYMBOL vmlinux 0x2bb6fde2	__kfifo_put
+EXPORT_SYMBOL vmlinux 0x2bc077b4	rfkill_pause_polling
+EXPORT_SYMBOL vmlinux 0x2bea18ed	pci_bus_read_config_byte
+EXPORT_SYMBOL vmlinux 0x2bec3846	kernel_read
+EXPORT_SYMBOL vmlinux 0x2bfeb410	acpi_get_handle
+EXPORT_SYMBOL vmlinux 0x2c13c6cb	agp_generic_destroy_pages
+EXPORT_SYMBOL vmlinux 0x2c278c8a	tty_port_tty_get
+EXPORT_SYMBOL vmlinux 0x2c3d355a	kill_pid
+EXPORT_SYMBOL vmlinux 0x2c50c8da	inet_listen
+EXPORT_SYMBOL vmlinux 0x2c54f60b	task_tgid_nr_ns
+EXPORT_SYMBOL vmlinux 0x2c5749e6	acpi_clear_gpe
+EXPORT_SYMBOL vmlinux 0x2c68246e	md_integrity_register
+EXPORT_SYMBOL vmlinux 0x2c734141	sock_no_socketpair
+EXPORT_SYMBOL vmlinux 0x2c90a66f	unregister_quota_format
+EXPORT_SYMBOL vmlinux 0x2c924bb9	vfs_path_lookup
+EXPORT_SYMBOL vmlinux 0x2cbca78d	release_firmware
+EXPORT_SYMBOL vmlinux 0x2cc3aa6a	genphy_restart_aneg
+EXPORT_SYMBOL vmlinux 0x2cc8a67e	nobh_write_begin
+EXPORT_SYMBOL vmlinux 0x2cdc477b	file_fsync
+EXPORT_SYMBOL vmlinux 0x2cde6240	inet_add_protocol
+EXPORT_SYMBOL vmlinux 0x2d25b4cb	qdisc_calculate_pkt_len
+EXPORT_SYMBOL vmlinux 0x2d531cda	dev_set_mtu
+EXPORT_SYMBOL vmlinux 0x2d5528c9	sg_copy_to_buffer
+EXPORT_SYMBOL vmlinux 0x2d5c0fc6	nla_reserve
+EXPORT_SYMBOL vmlinux 0x2d5cfaaf	md_error
+EXPORT_SYMBOL vmlinux 0x2d6e96aa	inet6_release
+EXPORT_SYMBOL vmlinux 0x2d76f7be	skb_gso_segment
+EXPORT_SYMBOL vmlinux 0x2d89342a	scsi_show_sense_hdr
+EXPORT_SYMBOL vmlinux 0x2db352b2	tcp_child_process
+EXPORT_SYMBOL vmlinux 0x2db43e20	md_done_sync
+EXPORT_SYMBOL vmlinux 0x2dbafbe3	pcibios_align_resource
+EXPORT_SYMBOL vmlinux 0x2dd16564	arch_register_cpu
+EXPORT_SYMBOL vmlinux 0x2dedc4c2	acpi_format_exception
+EXPORT_SYMBOL vmlinux 0x2def7f76	rtc_cmos_write
+EXPORT_SYMBOL vmlinux 0x2dfdcdc2	__scsi_device_lookup_by_target
+EXPORT_SYMBOL vmlinux 0x2e061c46	sk_free
+EXPORT_SYMBOL vmlinux 0x2e10dd5e	sockfd_lookup
+EXPORT_SYMBOL vmlinux 0x2e126f4e	give_up_console
+EXPORT_SYMBOL vmlinux 0x2e2ce9e0	sysctl_tcp_syncookies
+EXPORT_SYMBOL vmlinux 0x2e4a39f8	sysctl_udp_mem
+EXPORT_SYMBOL vmlinux 0x2e5cc4a0	spi_schedule_dv_device
+EXPORT_SYMBOL vmlinux 0x2e635c11	generic_file_llseek
+EXPORT_SYMBOL vmlinux 0x2e824f02	request_firmware_nowait
+EXPORT_SYMBOL vmlinux 0x2e864cfc	kernel_recvmsg
+EXPORT_SYMBOL vmlinux 0x2e97a729	idr_remove
+EXPORT_SYMBOL vmlinux 0x2e9d3d46	sk_release_kernel
+EXPORT_SYMBOL vmlinux 0x2eb87690	bitmap_cond_end_sync
+EXPORT_SYMBOL vmlinux 0x2eb8bd3f	del_gendisk
+EXPORT_SYMBOL vmlinux 0x2eb9a0e8	_read_lock_irq
+EXPORT_SYMBOL vmlinux 0x2ec54dc4	jbd2_journal_check_available_features
+EXPORT_SYMBOL vmlinux 0x2ecac4ba	scsi_device_put
+EXPORT_SYMBOL vmlinux 0x2f024766	journal_revoke
+EXPORT_SYMBOL vmlinux 0x2f0766ff	inet_dgram_connect
+EXPORT_SYMBOL vmlinux 0x2f3464d5	generic_readlink
+EXPORT_SYMBOL vmlinux 0x2f36aa3f	jbd2_journal_extend
+EXPORT_SYMBOL vmlinux 0x2f380ac1	generic_block_fiemap
+EXPORT_SYMBOL vmlinux 0x2f3e659a	loop_register_transfer
+EXPORT_SYMBOL vmlinux 0x2f4b5584	agp_generic_create_gatt_table
+EXPORT_SYMBOL vmlinux 0x2f815c15	dentry_unhash
+EXPORT_SYMBOL vmlinux 0x2f9a6bc6	i2c_get_adapter
+EXPORT_SYMBOL vmlinux 0x2f9c437b	pci_save_state
+EXPORT_SYMBOL vmlinux 0x2fa5a500	memcmp
+EXPORT_SYMBOL vmlinux 0x2fa79ba9	generic_unplug_device
+EXPORT_SYMBOL vmlinux 0x2fea71af	__tcf_em_tree_match
+EXPORT_SYMBOL vmlinux 0x2ff063b5	acpi_get_name
+EXPORT_SYMBOL vmlinux 0x2ffd2969	pcim_pin_device
+EXPORT_SYMBOL vmlinux 0x30123eb5	icmpv6_statistics
+EXPORT_SYMBOL vmlinux 0x30226ddf	agp_device_command
+EXPORT_SYMBOL vmlinux 0x30321fb9	log_wait_commit
+EXPORT_SYMBOL vmlinux 0x3035d272	qdisc_watchdog_init
+EXPORT_SYMBOL vmlinux 0x3035fab7	__scsi_put_command
+EXPORT_SYMBOL vmlinux 0x30398bec	wireless_send_event
+EXPORT_SYMBOL vmlinux 0x303cfd05	swiotlb_sync_single_for_cpu
+EXPORT_SYMBOL vmlinux 0x307f7776	timecompare_offset
+EXPORT_SYMBOL vmlinux 0x307fca80	bio_integrity_split
+EXPORT_SYMBOL vmlinux 0x3080b147	journal_invalidatepage
+EXPORT_SYMBOL vmlinux 0x30c5e4e5	load_nls_default
+EXPORT_SYMBOL vmlinux 0x30d0f38b	jbd2_journal_wipe
+EXPORT_SYMBOL vmlinux 0x30e74134	tty_termios_copy_hw
+EXPORT_SYMBOL vmlinux 0x30ffe1f7	cancel_delayed_work_sync
+EXPORT_SYMBOL vmlinux 0x3100c588	compat_mc_getsockopt
+EXPORT_SYMBOL vmlinux 0x31121fe1	genl_unregister_mc_group
+EXPORT_SYMBOL vmlinux 0x311c8207	inet_csk_clear_xmit_timers
+EXPORT_SYMBOL vmlinux 0x3145216f	pci_dev_present
+EXPORT_SYMBOL vmlinux 0x3147857d	default_red
+EXPORT_SYMBOL vmlinux 0x314b518d	dev_queue_xmit
+EXPORT_SYMBOL vmlinux 0x315d0641	ip6_route_output
+EXPORT_SYMBOL vmlinux 0x3188027c	pci_find_parent_resource
+EXPORT_SYMBOL vmlinux 0x318bd96b	bitmap_close_sync
+EXPORT_SYMBOL vmlinux 0x31956ef7	xfrm_stateonly_find
+EXPORT_SYMBOL vmlinux 0x319afd50	put_mnt_ns
+EXPORT_SYMBOL vmlinux 0x319f934a	dev_mc_delete
+EXPORT_SYMBOL vmlinux 0x31b31f5c	csum_partial_copy_nocheck
+EXPORT_SYMBOL vmlinux 0x31c4d6c7	scsi_finish_command
+EXPORT_SYMBOL vmlinux 0x31e76b57	recalibrate_cpu_khz
+EXPORT_SYMBOL vmlinux 0x31ebadcd	in_group_p
+EXPORT_SYMBOL vmlinux 0x321e1034	touch_atime
+EXPORT_SYMBOL vmlinux 0x32855b51	netif_device_detach
+EXPORT_SYMBOL vmlinux 0x3285cc48	param_set_uint
+EXPORT_SYMBOL vmlinux 0x3289945b	i2c_smbus_read_block_data
+EXPORT_SYMBOL vmlinux 0x329ff766	thaw_bdev
+EXPORT_SYMBOL vmlinux 0x32c4cbd7	blk_free_tags
+EXPORT_SYMBOL vmlinux 0x32ddf131	blk_queue_max_phys_segments
+EXPORT_SYMBOL vmlinux 0x32debb16	cpumask_next_and
+EXPORT_SYMBOL vmlinux 0x32df4502	bioset_integrity_create
+EXPORT_SYMBOL vmlinux 0x32e08fae	do_splice_from
+EXPORT_SYMBOL vmlinux 0x32e11d4d	input_grab_device
+EXPORT_SYMBOL vmlinux 0x33027c01	pfifo_qdisc_ops
+EXPORT_SYMBOL vmlinux 0x330fbb26	inet_dgram_ops
+EXPORT_SYMBOL vmlinux 0x333d55ad	remove_inode_hash
+EXPORT_SYMBOL vmlinux 0x333ec4b1	agp_generic_alloc_user
+EXPORT_SYMBOL vmlinux 0x3368e884	tty_port_block_til_ready
+EXPORT_SYMBOL vmlinux 0x336b6ff1	serio_unregister_driver
+EXPORT_SYMBOL vmlinux 0x338c7fca	fget
+EXPORT_SYMBOL vmlinux 0x33956340	tcf_action_dump_1
+EXPORT_SYMBOL vmlinux 0x339e93ab	thermal_zone_device_unregister
+EXPORT_SYMBOL vmlinux 0x33b84f74	copy_page
+EXPORT_SYMBOL vmlinux 0x33c36be6	tcf_register_action
+EXPORT_SYMBOL vmlinux 0x33d92f9a	prepare_to_wait
+EXPORT_SYMBOL vmlinux 0x33e2245f	set_pages_wb
+EXPORT_SYMBOL vmlinux 0x34076dfc	mod_zone_page_state
+EXPORT_SYMBOL vmlinux 0x341a521d	sock_map_fd
+EXPORT_SYMBOL vmlinux 0x341cbed2	cpu_present_mask
+EXPORT_SYMBOL vmlinux 0x342c6161	seq_read
+EXPORT_SYMBOL vmlinux 0x343abedb	__kill_fasync
+EXPORT_SYMBOL vmlinux 0x3456b558	lock_super
+EXPORT_SYMBOL vmlinux 0x3457cb68	param_set_long
+EXPORT_SYMBOL vmlinux 0x349cba85	strchr
+EXPORT_SYMBOL vmlinux 0x34bab2f8	sg_miter_next
+EXPORT_SYMBOL vmlinux 0x34bc9fff	dmam_free_noncoherent
+EXPORT_SYMBOL vmlinux 0x35018ce9	arp_tbl
+EXPORT_SYMBOL vmlinux 0x353234a2	dquot_drop
+EXPORT_SYMBOL vmlinux 0x353f24a3	phy_print_status
+EXPORT_SYMBOL vmlinux 0x35477cbe	con_set_default_unimap
+EXPORT_SYMBOL vmlinux 0x355bc8c0	md_check_recovery
+EXPORT_SYMBOL vmlinux 0x3582ed17	vfs_stat
+EXPORT_SYMBOL vmlinux 0x35b0650f	vsnprintf
+EXPORT_SYMBOL vmlinux 0x35c2ba9e	refrigerator
+EXPORT_SYMBOL vmlinux 0x35c5a9eb	tcf_unregister_action
+EXPORT_SYMBOL vmlinux 0x35cda850	qdisc_class_hash_grow
+EXPORT_SYMBOL vmlinux 0x35d7faaf	xfrm6_prepare_output
+EXPORT_SYMBOL vmlinux 0x35e48ba7	mdio_bus_type
+EXPORT_SYMBOL vmlinux 0x35f83303	sget
+EXPORT_SYMBOL vmlinux 0x360b1afe	probe_irq_mask
+EXPORT_SYMBOL vmlinux 0x36139a51	memcpy_fromiovec
+EXPORT_SYMBOL vmlinux 0x36164131	journal_restart
+EXPORT_SYMBOL vmlinux 0x363f7eef	pneigh_lookup
+EXPORT_SYMBOL vmlinux 0x36562f37	i2c_smbus_read_i2c_block_data
+EXPORT_SYMBOL vmlinux 0x3656bf5a	lock_kernel
+EXPORT_SYMBOL vmlinux 0x365dbe57	__page_symlink
+EXPORT_SYMBOL vmlinux 0x3686ea09	spi_print_msg
+EXPORT_SYMBOL vmlinux 0x36875389	__timecompare_update
+EXPORT_SYMBOL vmlinux 0x3701a196	csum_partial_copy_to_user
+EXPORT_SYMBOL vmlinux 0x37058ffc	vmalloc_to_page
+EXPORT_SYMBOL vmlinux 0x3723a0ea	journal_wipe
+EXPORT_SYMBOL vmlinux 0x372d6a69	compat_sock_common_setsockopt
+EXPORT_SYMBOL vmlinux 0x3733cab6	qdisc_list_del
+EXPORT_SYMBOL vmlinux 0x3744cf36	vmalloc_to_pfn
+EXPORT_SYMBOL vmlinux 0x374f8ad8	dm_unregister_target
+EXPORT_SYMBOL vmlinux 0x375465a7	radix_tree_gang_lookup_tag_slot
+EXPORT_SYMBOL vmlinux 0x37befc70	jiffies_to_msecs
+EXPORT_SYMBOL vmlinux 0x37db8f19	dmi_get_date
+EXPORT_SYMBOL vmlinux 0x37efda01	blk_peek_request
+EXPORT_SYMBOL vmlinux 0x38119ddc	seq_release
+EXPORT_SYMBOL vmlinux 0x381987aa	devm_iounmap
+EXPORT_SYMBOL vmlinux 0x3819bbed	dm_io_client_destroy
+EXPORT_SYMBOL vmlinux 0x382b1ee8	get_fs_type
+EXPORT_SYMBOL vmlinux 0x383c2644	sock_no_sendmsg
+EXPORT_SYMBOL vmlinux 0x384d2fc6	elevator_exit
+EXPORT_SYMBOL vmlinux 0x384dce46	tty_port_close_end
+EXPORT_SYMBOL vmlinux 0x3857012f	ip_cmsg_recv
+EXPORT_SYMBOL vmlinux 0x3877432c	phy_detach
+EXPORT_SYMBOL vmlinux 0x388f9128	xfrm_state_walk_done
+EXPORT_SYMBOL vmlinux 0x38b0538d	inet_stream_connect
+EXPORT_SYMBOL vmlinux 0x38b92846	llc_remove_pack
+EXPORT_SYMBOL vmlinux 0x38c3aaa4	bio_integrity_advance
+EXPORT_SYMBOL vmlinux 0x38c89f56	register_quota_format
+EXPORT_SYMBOL vmlinux 0x38cab31c	init_timer_deferrable_key
+EXPORT_SYMBOL vmlinux 0x38e0ca4b	get_phy_device
+EXPORT_SYMBOL vmlinux 0x38e85b81	simple_fill_super
+EXPORT_SYMBOL vmlinux 0x38f33bed	dump_fpu
+EXPORT_SYMBOL vmlinux 0x39032545	__ps2_command
+EXPORT_SYMBOL vmlinux 0x39249d25	dev_getbyhwaddr
+EXPORT_SYMBOL vmlinux 0x3928efe9	__per_cpu_offset
+EXPORT_SYMBOL vmlinux 0x39333ac6	neigh_parms_alloc
+EXPORT_SYMBOL vmlinux 0x393c7ef8	vfs_readlink
+EXPORT_SYMBOL vmlinux 0x395ad2f9	inet6_add_protocol
+EXPORT_SYMBOL vmlinux 0x39690fd7	inode_permission
+EXPORT_SYMBOL vmlinux 0x3980aac1	unregister_reboot_notifier
+EXPORT_SYMBOL vmlinux 0x39a23edc	blk_execute_rq
+EXPORT_SYMBOL vmlinux 0x39c1fce0	__set_page_dirty_nobuffers
+EXPORT_SYMBOL vmlinux 0x39f0d308	clip_tbl_hook
+EXPORT_SYMBOL vmlinux 0x3a0023a8	vfs_quota_disable
+EXPORT_SYMBOL vmlinux 0x3a066d96	thermal_zone_device_register
+EXPORT_SYMBOL vmlinux 0x3a2204c6	security_netlink_recv
+EXPORT_SYMBOL vmlinux 0x3a4b6c1a	input_close_device
+EXPORT_SYMBOL vmlinux 0x3a5517c4	unmap_underlying_metadata
+EXPORT_SYMBOL vmlinux 0x3a98e0b1	skb_dma_unmap
+EXPORT_SYMBOL vmlinux 0x3a9b6fb9	blk_unregister_region
+EXPORT_SYMBOL vmlinux 0x3aa1dbcf	_spin_unlock_bh
+EXPORT_SYMBOL vmlinux 0x3aad2fe5	rfkill_blocked
+EXPORT_SYMBOL vmlinux 0x3aaecb02	devm_free_irq
+EXPORT_SYMBOL vmlinux 0x3ab59dfa	mmc_register_driver
+EXPORT_SYMBOL vmlinux 0x3ae831b6	kref_init
+EXPORT_SYMBOL vmlinux 0x3af40e47	__mmc_claim_host
+EXPORT_SYMBOL vmlinux 0x3afce6a7	bdi_register
+EXPORT_SYMBOL vmlinux 0x3b1565b0	udp_prot
+EXPORT_SYMBOL vmlinux 0x3b1e751b	__alloc_pages_nodemask
+EXPORT_SYMBOL vmlinux 0x3b299980	bioset_create
+EXPORT_SYMBOL vmlinux 0x3b3016d3	cpufreq_unregister_notifier
+EXPORT_SYMBOL vmlinux 0x3b370e38	ppp_register_compressor
+EXPORT_SYMBOL vmlinux 0x3b5d6f7c	bdput
+EXPORT_SYMBOL vmlinux 0x3b5df3d0	dm_table_put
+EXPORT_SYMBOL vmlinux 0x3b6111a3	ndisc_mc_map
+EXPORT_SYMBOL vmlinux 0x3b68b514	block_fsync
+EXPORT_SYMBOL vmlinux 0x3b95acbb	ip6_route_me_harder
+EXPORT_SYMBOL vmlinux 0x3bc0e2e3	block_page_mkwrite
+EXPORT_SYMBOL vmlinux 0x3bcf7bf5	ip_dev_find
+EXPORT_SYMBOL vmlinux 0x3bd1b1f6	msecs_to_jiffies
+EXPORT_SYMBOL vmlinux 0x3beef206	skb_clone
+EXPORT_SYMBOL vmlinux 0x3c154f6d	dma_ops
+EXPORT_SYMBOL vmlinux 0x3c182dcd	scsi_test_unit_ready
+EXPORT_SYMBOL vmlinux 0x3c2c5af5	sprintf
+EXPORT_SYMBOL vmlinux 0x3c4e07ec	acpi_bus_start
+EXPORT_SYMBOL vmlinux 0x3c7227bf	complete_all
+EXPORT_SYMBOL vmlinux 0x3c8154f7	xfrm_policy_byid
+EXPORT_SYMBOL vmlinux 0x3c9d1211	string_get_size
+EXPORT_SYMBOL vmlinux 0x3cb2f7a8	md_write_end
+EXPORT_SYMBOL vmlinux 0x3cc0a3bb	xfrm_spd_getinfo
+EXPORT_SYMBOL vmlinux 0x3cc32f10	skb_put
+EXPORT_SYMBOL vmlinux 0x3cd0d863	scsi_command_normalize_sense
+EXPORT_SYMBOL vmlinux 0x3ce4ca6f	disable_irq
+EXPORT_SYMBOL vmlinux 0x3ce619b2	scsi_free_command
+EXPORT_SYMBOL vmlinux 0x3cec9e12	dcache_dir_lseek
+EXPORT_SYMBOL vmlinux 0x3d4031ca	__devm_release_region
+EXPORT_SYMBOL vmlinux 0x3d41de05	pcim_iounmap
+EXPORT_SYMBOL vmlinux 0x3d457636	kmem_ptr_validate
+EXPORT_SYMBOL vmlinux 0x3d604e65	skb_copy_and_csum_datagram_iovec
+EXPORT_SYMBOL vmlinux 0x3d68bd4b	flow_cache_genid
+EXPORT_SYMBOL vmlinux 0x3d7c1ed7	msrs_alloc
+EXPORT_SYMBOL vmlinux 0x3d8645b9	bio_kmalloc
+EXPORT_SYMBOL vmlinux 0x3d8728bb	memcpy_toiovecend
+EXPORT_SYMBOL vmlinux 0x3d8f2c6b	dev_addr_add_multiple
+EXPORT_SYMBOL vmlinux 0x3d978728	cad_pid
+EXPORT_SYMBOL vmlinux 0x3d9d20b6	arp_broken_ops
+EXPORT_SYMBOL vmlinux 0x3d9ee9f0	clear_page
+EXPORT_SYMBOL vmlinux 0x3da171f9	pci_mem_start
+EXPORT_SYMBOL vmlinux 0x3da5eb6d	kfifo_alloc
+EXPORT_SYMBOL vmlinux 0x3db2e258	radix_tree_gang_lookup
+EXPORT_SYMBOL vmlinux 0x3dbc5adc	pci_reenable_device
+EXPORT_SYMBOL vmlinux 0x3dc3cf5c	security_task_getsecid
+EXPORT_SYMBOL vmlinux 0x3dcf5fea	skb_recv_datagram
+EXPORT_SYMBOL vmlinux 0x3ddd71bd	inode_claim_rsv_space
+EXPORT_SYMBOL vmlinux 0x3e16dd38	mmc_wait_for_app_cmd
+EXPORT_SYMBOL vmlinux 0x3e1f073d	wait_for_completion_timeout
+EXPORT_SYMBOL vmlinux 0x3e219de6	try_wait_for_completion
+EXPORT_SYMBOL vmlinux 0x3e2942c6	xfrm_state_lookup
+EXPORT_SYMBOL vmlinux 0x3e2ae3a8	acpi_release_global_lock
+EXPORT_SYMBOL vmlinux 0x3e32b20d	unregister_netdev
+EXPORT_SYMBOL vmlinux 0x3e383385	nf_hooks
+EXPORT_SYMBOL vmlinux 0x3e424fe2	skb_abort_seq_read
+EXPORT_SYMBOL vmlinux 0x3e45e9ff	register_inetaddr_notifier
+EXPORT_SYMBOL vmlinux 0x3e69f60f	jbd2_journal_clear_features
+EXPORT_SYMBOL vmlinux 0x3e899c9d	blk_limits_io_min
+EXPORT_SYMBOL vmlinux 0x3e8d368c	sync_inodes_sb
+EXPORT_SYMBOL vmlinux 0x3e9be9d1	__dev_remove_pack
+EXPORT_SYMBOL vmlinux 0x3ec1d14e	tcf_hash_destroy
+EXPORT_SYMBOL vmlinux 0x3ed63055	zlib_inflateReset
+EXPORT_SYMBOL vmlinux 0x3ef5ffb4	phy_connect_direct
+EXPORT_SYMBOL vmlinux 0x3efdeba5	sk_common_release
+EXPORT_SYMBOL vmlinux 0x3efec63e	tcp_setsockopt
+EXPORT_SYMBOL vmlinux 0x3f0546a8	ioread32_rep
+EXPORT_SYMBOL vmlinux 0x3f128fc6	sb_min_blocksize
+EXPORT_SYMBOL vmlinux 0x3f1899f1	up
+EXPORT_SYMBOL vmlinux 0x3f1ae08d	cdrom_mode_sense
+EXPORT_SYMBOL vmlinux 0x3f3601e1	__skb_checksum_complete_head
+EXPORT_SYMBOL vmlinux 0x3f4547a7	put_unused_fd
+EXPORT_SYMBOL vmlinux 0x3f61518c	i2c_register_driver
+EXPORT_SYMBOL vmlinux 0x3f6d66e6	__pci_register_driver
+EXPORT_SYMBOL vmlinux 0x3f82f204	sock_register
+EXPORT_SYMBOL vmlinux 0x3f99418f	skb_dequeue
+EXPORT_SYMBOL vmlinux 0x3fa913da	strspn
+EXPORT_SYMBOL vmlinux 0x3fad7e21	unregister_key_type
+EXPORT_SYMBOL vmlinux 0x3fcc51d5	skb_pull
+EXPORT_SYMBOL vmlinux 0x3fec048f	sg_next
+EXPORT_SYMBOL vmlinux 0x3ff62317	local_bh_disable
+EXPORT_SYMBOL vmlinux 0x4011114d	thaw_process
+EXPORT_SYMBOL vmlinux 0x401441cd	bdev_stack_limits
+EXPORT_SYMBOL vmlinux 0x4025d7b6	ps2_end_command
+EXPORT_SYMBOL vmlinux 0x405c1144	get_seconds
+EXPORT_SYMBOL vmlinux 0x40739fdd	key_negate_and_link
+EXPORT_SYMBOL vmlinux 0x40765667	phy_mii_ioctl
+EXPORT_SYMBOL vmlinux 0x4081b12c	security_path_symlink
+EXPORT_SYMBOL vmlinux 0x4087771d	tty_port_close
+EXPORT_SYMBOL vmlinux 0x4097fa45	acpi_read_bit_register
+EXPORT_SYMBOL vmlinux 0x409873e3	tty_termios_baud_rate
+EXPORT_SYMBOL vmlinux 0x40a27c37	scsi_dev_info_remove_list
+EXPORT_SYMBOL vmlinux 0x40a76e26	sk_send_sigurg
+EXPORT_SYMBOL vmlinux 0x40bfe03f	rfkill_destroy
+EXPORT_SYMBOL vmlinux 0x40c89d46	acpi_get_table_by_index
+EXPORT_SYMBOL vmlinux 0x40d52309	inet_stream_ops
+EXPORT_SYMBOL vmlinux 0x40ec7870	vfs_llseek
+EXPORT_SYMBOL vmlinux 0x40f77066	blk_start_queue
+EXPORT_SYMBOL vmlinux 0x40f7a038	register_con_driver
+EXPORT_SYMBOL vmlinux 0x40fa2ced	sock_create_lite
+EXPORT_SYMBOL vmlinux 0x410039a6	d_instantiate_unique
+EXPORT_SYMBOL vmlinux 0x41008b36	rfkill_resume_polling
+EXPORT_SYMBOL vmlinux 0x4101bbde	param_set_copystring
+EXPORT_SYMBOL vmlinux 0x4108e69a	fb_match_mode
+EXPORT_SYMBOL vmlinux 0x4115f84e	dcache_dir_open
+EXPORT_SYMBOL vmlinux 0x41166725	inet_frags_init_net
+EXPORT_SYMBOL vmlinux 0x41344088	param_get_charp
+EXPORT_SYMBOL vmlinux 0x41482d8b	strndup_user
+EXPORT_SYMBOL vmlinux 0x4160ba9a	aio_complete
+EXPORT_SYMBOL vmlinux 0x416983d9	netdev_fix_features
+EXPORT_SYMBOL vmlinux 0x41878723	blk_queue_io_opt
+EXPORT_SYMBOL vmlinux 0x4188d439	neigh_rand_reach_time
+EXPORT_SYMBOL vmlinux 0x41a9c68d	_spin_trylock_bh
+EXPORT_SYMBOL vmlinux 0x41c9ffa4	unregister_framebuffer
+EXPORT_SYMBOL vmlinux 0x41e08408	sock_sendmsg
+EXPORT_SYMBOL vmlinux 0x41e3a3ff	__skb_warn_lro_forwarding
+EXPORT_SYMBOL vmlinux 0x41f09c1c	pskb_expand_head
+EXPORT_SYMBOL vmlinux 0x4211c3c1	zlib_inflateInit2
+EXPORT_SYMBOL vmlinux 0x42224298	sscanf
+EXPORT_SYMBOL vmlinux 0x42595e58	vgacon_text_force
+EXPORT_SYMBOL vmlinux 0x4280add6	__netdev_alloc_skb
+EXPORT_SYMBOL vmlinux 0x42855565	pci_release_regions
+EXPORT_SYMBOL vmlinux 0x428d3e19	pci_try_set_mwi
+EXPORT_SYMBOL vmlinux 0x42a4bdf2	in_egroup_p
+EXPORT_SYMBOL vmlinux 0x42acbf72	posix_acl_from_xattr
+EXPORT_SYMBOL vmlinux 0x42c8de35	ioremap_nocache
+EXPORT_SYMBOL vmlinux 0x42d71be2	kobject_set_name
+EXPORT_SYMBOL vmlinux 0x42e458cf	elv_rb_add
+EXPORT_SYMBOL vmlinux 0x42f8f658	tty_chars_in_buffer
+EXPORT_SYMBOL vmlinux 0x4302d0eb	free_pages
+EXPORT_SYMBOL vmlinux 0x43131003	put_disk
+EXPORT_SYMBOL vmlinux 0x431de7b0	kmem_cache_size
+EXPORT_SYMBOL vmlinux 0x4327f0d5	memset_io
+EXPORT_SYMBOL vmlinux 0x4333eadb	param_set_short
+EXPORT_SYMBOL vmlinux 0x43385ad9	acpi_pci_unregister_driver
+EXPORT_SYMBOL vmlinux 0x434fa55c	release_console_sem
+EXPORT_SYMBOL vmlinux 0x436c2179	iowrite32
+EXPORT_SYMBOL vmlinux 0x43760d77	xfrm_register_type
+EXPORT_SYMBOL vmlinux 0x43837894	create_mnt_ns
+EXPORT_SYMBOL vmlinux 0x439d0346	__seq_open_private
+EXPORT_SYMBOL vmlinux 0x43ab66c3	param_array_get
+EXPORT_SYMBOL vmlinux 0x43ad28f1	rfkill_set_sw_state
+EXPORT_SYMBOL vmlinux 0x43c60dc5	pci_remove_bus_device
+EXPORT_SYMBOL vmlinux 0x43d576ce	fb_set_var
+EXPORT_SYMBOL vmlinux 0x43ec913a	put_cmsg
+EXPORT_SYMBOL vmlinux 0x43ee4fa3	tty_port_carrier_raised
+EXPORT_SYMBOL vmlinux 0x44161c19	unregister_shrinker
+EXPORT_SYMBOL vmlinux 0x44183066	ps2_command
+EXPORT_SYMBOL vmlinux 0x4434503c	inet_sendmsg
+EXPORT_SYMBOL vmlinux 0x443d4d2e	uart_match_port
+EXPORT_SYMBOL vmlinux 0x444779c4	nla_find
+EXPORT_SYMBOL vmlinux 0x446b9ed4	nf_afinfo
+EXPORT_SYMBOL vmlinux 0x446c520a	pcie_port_service_unregister
+EXPORT_SYMBOL vmlinux 0x447be4c2	netif_carrier_off
+EXPORT_SYMBOL vmlinux 0x449739f5	thermal_cooling_device_register
+EXPORT_SYMBOL vmlinux 0x44aaf30f	tsc_khz
+EXPORT_SYMBOL vmlinux 0x44b0a6a9	serio_close
+EXPORT_SYMBOL vmlinux 0x44b911c3	rb_replace_node
+EXPORT_SYMBOL vmlinux 0x44bafe34	swiotlb_sync_sg_for_cpu
+EXPORT_SYMBOL vmlinux 0x44c1d71b	journal_force_commit
+EXPORT_SYMBOL vmlinux 0x44ca5541	set_trace_device
+EXPORT_SYMBOL vmlinux 0x44d560e3	init_level4_pgt
+EXPORT_SYMBOL vmlinux 0x44e9a829	match_token
+EXPORT_SYMBOL vmlinux 0x453c8403	pci_msi_enabled
+EXPORT_SYMBOL vmlinux 0x45450063	mod_timer
+EXPORT_SYMBOL vmlinux 0x4550ba8a	register_cpu_notifier
+EXPORT_SYMBOL vmlinux 0x45704798	print_hex_dump_bytes
+EXPORT_SYMBOL vmlinux 0x4575315d	utf8s_to_utf16s
+EXPORT_SYMBOL vmlinux 0x45947727	param_array_set
+EXPORT_SYMBOL vmlinux 0x4598c9f8	skb_recycle_check
+EXPORT_SYMBOL vmlinux 0x45ad9141	alloc_file
+EXPORT_SYMBOL vmlinux 0x45adf09a	may_umount
+EXPORT_SYMBOL vmlinux 0x45b28caa	kill_litter_super
+EXPORT_SYMBOL vmlinux 0x45becd8b	scsi_unblock_requests
+EXPORT_SYMBOL vmlinux 0x45c89fcb	acpi_notifier_call_chain
+EXPORT_SYMBOL vmlinux 0x45d11c43	down_interruptible
+EXPORT_SYMBOL vmlinux 0x45d55543	down_write
+EXPORT_SYMBOL vmlinux 0x46085e4f	add_timer
+EXPORT_SYMBOL vmlinux 0x461f6fb0	vfs_follow_link
+EXPORT_SYMBOL vmlinux 0x466c14a7	__delay
+EXPORT_SYMBOL vmlinux 0x4695ac19	get_sb_ns
+EXPORT_SYMBOL vmlinux 0x46b2b354	splice_direct_to_actor
+EXPORT_SYMBOL vmlinux 0x46c47fb6	__node_distance
+EXPORT_SYMBOL vmlinux 0x46d107ef	jbd2_journal_init_inode
+EXPORT_SYMBOL vmlinux 0x46d2261e	fput
+EXPORT_SYMBOL vmlinux 0x46e1f55d	cdev_index
+EXPORT_SYMBOL vmlinux 0x473164dd	redraw_screen
+EXPORT_SYMBOL vmlinux 0x473f14f1	inet_getname
+EXPORT_SYMBOL vmlinux 0x474a7dbe	bitmap_end_sync
+EXPORT_SYMBOL vmlinux 0x4750d15b	scsi_prep_state_check
+EXPORT_SYMBOL vmlinux 0x475100c2	inet_get_local_port_range
+EXPORT_SYMBOL vmlinux 0x475f010b	acpi_purge_cached_objects
+EXPORT_SYMBOL vmlinux 0x47884079	dev_alloc_skb
+EXPORT_SYMBOL vmlinux 0x478d10b2	ht_destroy_irq
+EXPORT_SYMBOL vmlinux 0x4792b39c	scsi_cmd_ioctl
+EXPORT_SYMBOL vmlinux 0x47941554	read_cache_page_gfp
+EXPORT_SYMBOL vmlinux 0x479c3c86	find_next_zero_bit
+EXPORT_SYMBOL vmlinux 0x48193639	acpi_lid_open
+EXPORT_SYMBOL vmlinux 0x481cb9ab	acpi_enter_sleep_state_prep
+EXPORT_SYMBOL vmlinux 0x482e9512	lro_flush_pkt
+EXPORT_SYMBOL vmlinux 0x4837a554	request_key
+EXPORT_SYMBOL vmlinux 0x4859b8bb	rtc_year_days
+EXPORT_SYMBOL vmlinux 0x485d8992	have_submounts
+EXPORT_SYMBOL vmlinux 0x486b6407	hweight64
+EXPORT_SYMBOL vmlinux 0x488cc3de	inode_add_rsv_space
+EXPORT_SYMBOL vmlinux 0x48b9291f	dm_exception_store_destroy
+EXPORT_SYMBOL vmlinux 0x48f8745a	__dev_get_by_name
+EXPORT_SYMBOL vmlinux 0x49074354	mdiobus_write
+EXPORT_SYMBOL vmlinux 0x4924164d	security_inode_getsecctx
+EXPORT_SYMBOL vmlinux 0x4939478f	set_create_files_as
+EXPORT_SYMBOL vmlinux 0x493e50cf	udp_flush_pending_frames
+EXPORT_SYMBOL vmlinux 0x49439411	genl_unregister_family
+EXPORT_SYMBOL vmlinux 0x494bbdfc	blk_queue_make_request
+EXPORT_SYMBOL vmlinux 0x494e3393	vm_get_page_prot
+EXPORT_SYMBOL vmlinux 0x494fab2b	udp_lib_setsockopt
+EXPORT_SYMBOL vmlinux 0x49554c57	dm_register_target
+EXPORT_SYMBOL vmlinux 0x4958e8c6	writeback_inodes_sb
+EXPORT_SYMBOL vmlinux 0x495fea53	simple_empty
+EXPORT_SYMBOL vmlinux 0x49603fb8	security_sb_copy_data
+EXPORT_SYMBOL vmlinux 0x4968652d	per_cpu__cpu_sibling_map
+EXPORT_SYMBOL vmlinux 0x4993425d	tty_name
+EXPORT_SYMBOL vmlinux 0x4996e864	nf_log_register
+EXPORT_SYMBOL vmlinux 0x49a7f417	sk_filter
+EXPORT_SYMBOL vmlinux 0x49cf583a	vfs_quota_sync
+EXPORT_SYMBOL vmlinux 0x49da9a9a	_read_unlock_bh
+EXPORT_SYMBOL vmlinux 0x49e182c0	param_get_string
+EXPORT_SYMBOL vmlinux 0x4a358252	__bitmap_subset
+EXPORT_SYMBOL vmlinux 0x4a3ead48	wait_on_page_bit
+EXPORT_SYMBOL vmlinux 0x4a5a6298	vga_client_register
+EXPORT_SYMBOL vmlinux 0x4aa8e451	ipv6_chk_prefix
+EXPORT_SYMBOL vmlinux 0x4ac25120	dma_async_tx_descriptor_init
+EXPORT_SYMBOL vmlinux 0x4acd93d3	release_resource
+EXPORT_SYMBOL vmlinux 0x4afe9a77	scsi_partsize
+EXPORT_SYMBOL vmlinux 0x4b046978	ll_rw_block
+EXPORT_SYMBOL vmlinux 0x4b07e779	_spin_unlock_irqrestore
+EXPORT_SYMBOL vmlinux 0x4b085dbf	agp3_generic_configure
+EXPORT_SYMBOL vmlinux 0x4b19d315	blk_queue_init_tags
+EXPORT_SYMBOL vmlinux 0x4b41668a	simple_rename
+EXPORT_SYMBOL vmlinux 0x4b4500ef	find_get_pages_contig
+EXPORT_SYMBOL vmlinux 0x4b5992c8	generic_file_buffered_write
+EXPORT_SYMBOL vmlinux 0x4b68abfc	blk_queue_free_tags
+EXPORT_SYMBOL vmlinux 0x4b794b2f	iw_handler_get_thrspy
+EXPORT_SYMBOL vmlinux 0x4b8d21ee	tcf_hash_lookup
+EXPORT_SYMBOL vmlinux 0x4b8d69c9	arch_acpi_processor_cleanup_pdc
+EXPORT_SYMBOL vmlinux 0x4ba5baa0	load_gs_index
+EXPORT_SYMBOL vmlinux 0x4bbc3e5f	pm_flags
+EXPORT_SYMBOL vmlinux 0x4bc00e3b	grab_cache_page_write_begin
+EXPORT_SYMBOL vmlinux 0x4bc625d6	dev_add_pack
+EXPORT_SYMBOL vmlinux 0x4bc7b5f5	vmap
+EXPORT_SYMBOL vmlinux 0x4bd4ca32	eth_type_trans
+EXPORT_SYMBOL vmlinux 0x4bdf028e	idr_find
+EXPORT_SYMBOL vmlinux 0x4c1182cb	bitmap_scnprintf
+EXPORT_SYMBOL vmlinux 0x4c1b965c	gen_replace_estimator
+EXPORT_SYMBOL vmlinux 0x4c441f33	xfrm_policy_flush
+EXPORT_SYMBOL vmlinux 0x4c4c956e	nla_memcmp
+EXPORT_SYMBOL vmlinux 0x4c646b3d	blk_queue_prep_rq
+EXPORT_SYMBOL vmlinux 0x4c65e814	pagecache_write_end
+EXPORT_SYMBOL vmlinux 0x4c769a20	ppp_input
+EXPORT_SYMBOL vmlinux 0x4c89165e	blk_end_request_cur
+EXPORT_SYMBOL vmlinux 0x4c9edbe8	shrink_dcache_parent
+EXPORT_SYMBOL vmlinux 0x4c9f1624	user_revoke
+EXPORT_SYMBOL vmlinux 0x4ca5cb70	dma_pool_create
+EXPORT_SYMBOL vmlinux 0x4cbbd171	__bitmap_weight
+EXPORT_SYMBOL vmlinux 0x4cf14772	revalidate_disk
+EXPORT_SYMBOL vmlinux 0x4d102e6d	jbd2_journal_destroy
+EXPORT_SYMBOL vmlinux 0x4d28fa0a	call_usermodehelper_setup
+EXPORT_SYMBOL vmlinux 0x4d3d8525	jbd2_journal_force_commit_nested
+EXPORT_SYMBOL vmlinux 0x4d77e172	pci_bus_write_config_word
+EXPORT_SYMBOL vmlinux 0x4d987cff	find_vma
+EXPORT_SYMBOL vmlinux 0x4dc45be9	nf_log_unbind_pf
+EXPORT_SYMBOL vmlinux 0x4dda726b	match_strlcpy
+EXPORT_SYMBOL vmlinux 0x4ddc024d	dm_get_mapinfo
+EXPORT_SYMBOL vmlinux 0x4ddc5260	request_firmware
+EXPORT_SYMBOL vmlinux 0x4df119fa	__bitmap_parse
+EXPORT_SYMBOL vmlinux 0x4df2f484	agp_generic_alloc_by_type
+EXPORT_SYMBOL vmlinux 0x4e069249	security_tun_dev_post_create
+EXPORT_SYMBOL vmlinux 0x4e0cb106	skb_copy_datagram_const_iovec
+EXPORT_SYMBOL vmlinux 0x4e3567f7	match_int
+EXPORT_SYMBOL vmlinux 0x4e3ffa1b	iw_handler_get_spy
+EXPORT_SYMBOL vmlinux 0x4e6e8ea7	fg_console
+EXPORT_SYMBOL vmlinux 0x4e76c4d5	netlink_rcv_skb
+EXPORT_SYMBOL vmlinux 0x4e825955	jbd2_journal_abort
+EXPORT_SYMBOL vmlinux 0x4ec22b58	inet_del_protocol
+EXPORT_SYMBOL vmlinux 0x4edd72f7	block_all_signals
+EXPORT_SYMBOL vmlinux 0x4edf8824	otg_get_transceiver
+EXPORT_SYMBOL vmlinux 0x4ee359cf	vfs_link
+EXPORT_SYMBOL vmlinux 0x4ef66937	pci_target_state
+EXPORT_SYMBOL vmlinux 0x4ef790d6	bio_integrity_prep
+EXPORT_SYMBOL vmlinux 0x4f0be2a2	vc_resize
+EXPORT_SYMBOL vmlinux 0x4f12ba12	devm_ioremap
+EXPORT_SYMBOL vmlinux 0x4f1cd128	security_tun_dev_create
+EXPORT_SYMBOL vmlinux 0x4f443673	unlock_new_inode
+EXPORT_SYMBOL vmlinux 0x4f44e3da	create_proc_entry
+EXPORT_SYMBOL vmlinux 0x4f476e96	init_cdrom_command
+EXPORT_SYMBOL vmlinux 0x4f5438c1	idle_halt
+EXPORT_SYMBOL vmlinux 0x4f783f30	acpi_read
+EXPORT_SYMBOL vmlinux 0x4f79e43a	xfrm_state_delete
+EXPORT_SYMBOL vmlinux 0x4f883182	__xfrm_decode_session
+EXPORT_SYMBOL vmlinux 0x4f9d916f	kmalloc_caches
+EXPORT_SYMBOL vmlinux 0x4fdee897	i8042_command
+EXPORT_SYMBOL vmlinux 0x4feb8cbe	i2c_put_adapter
+EXPORT_SYMBOL vmlinux 0x50048075	__neigh_for_each_release
+EXPORT_SYMBOL vmlinux 0x5007f7fa	pci_find_device
+EXPORT_SYMBOL vmlinux 0x5017d587	file_permission
+EXPORT_SYMBOL vmlinux 0x50211ee3	tcp_free_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x50405b06	otg_set_transceiver
+EXPORT_SYMBOL vmlinux 0x506746b6	getrawmonotonic
+EXPORT_SYMBOL vmlinux 0x50854af9	netlink_broadcast
+EXPORT_SYMBOL vmlinux 0x508ffa61	skb_copy
+EXPORT_SYMBOL vmlinux 0x50a635b8	bio_free
+EXPORT_SYMBOL vmlinux 0x50b5cb2d	idr_get_new_above
+EXPORT_SYMBOL vmlinux 0x50d56018	posix_acl_equiv_mode
+EXPORT_SYMBOL vmlinux 0x50e1682d	__nla_reserve_nohdr
+EXPORT_SYMBOL vmlinux 0x5118c382	secure_dccp_sequence_number
+EXPORT_SYMBOL vmlinux 0x5123997b	scsi_is_sdev_device
+EXPORT_SYMBOL vmlinux 0x517896be	xfrm_register_mode
+EXPORT_SYMBOL vmlinux 0x51794636	journal_start
+EXPORT_SYMBOL vmlinux 0x51824c76	i2c_add_adapter
+EXPORT_SYMBOL vmlinux 0x5182978b	tcp_v4_send_check
+EXPORT_SYMBOL vmlinux 0x5187ac4b	xen_store_evtchn
+EXPORT_SYMBOL vmlinux 0x5190d92c	mb_cache_entry_free
+EXPORT_SYMBOL vmlinux 0x51b2a87e	blk_queue_update_dma_pad
+EXPORT_SYMBOL vmlinux 0x51c0fc04	journal_dirty_data
+EXPORT_SYMBOL vmlinux 0x51d12d4e	acpi_pci_disabled
+EXPORT_SYMBOL vmlinux 0x51dce73b	xfrm_state_walk_init
+EXPORT_SYMBOL vmlinux 0x51e1c5bb	init_net
+EXPORT_SYMBOL vmlinux 0x52026cdf	security_sb_parse_opts_str
+EXPORT_SYMBOL vmlinux 0x52095e19	acpi_get_data
+EXPORT_SYMBOL vmlinux 0x520a5437	acpi_bus_add
+EXPORT_SYMBOL vmlinux 0x5210aa6c	d_prune_aliases
+EXPORT_SYMBOL vmlinux 0x524f8182	kthread_bind
+EXPORT_SYMBOL vmlinux 0x5252f304	__memcpy_toio
+EXPORT_SYMBOL vmlinux 0x5253c539	mmc_wait_for_req
+EXPORT_SYMBOL vmlinux 0x5265b83a	mmc_detect_change
+EXPORT_SYMBOL vmlinux 0x52717cb7	prepare_kernel_cred
+EXPORT_SYMBOL vmlinux 0x52760ca9	getnstimeofday
+EXPORT_SYMBOL vmlinux 0x527c74c3	pci_scan_bus_parented
+EXPORT_SYMBOL vmlinux 0x528567fc	bfifo_qdisc_ops
+EXPORT_SYMBOL vmlinux 0x52a58c24	ifla_policy
+EXPORT_SYMBOL vmlinux 0x52a6319d	bioset_free
+EXPORT_SYMBOL vmlinux 0x52adf006	inet6_del_protocol
+EXPORT_SYMBOL vmlinux 0x52b5be0e	bio_integrity_clone
+EXPORT_SYMBOL vmlinux 0x52d7b2fd	llc_sap_list
+EXPORT_SYMBOL vmlinux 0x52d9756c	lock_sock_nested
+EXPORT_SYMBOL vmlinux 0x52e5f010	set_disk_ro
+EXPORT_SYMBOL vmlinux 0x52ebb126	param_get_ushort
+EXPORT_SYMBOL vmlinux 0x52ec65c6	set_page_dirty_lock
+EXPORT_SYMBOL vmlinux 0x53032ece	tty_port_close_start
+EXPORT_SYMBOL vmlinux 0x530b1e98	pm_suspend
+EXPORT_SYMBOL vmlinux 0x5312147e	neigh_table_clear
+EXPORT_SYMBOL vmlinux 0x5316e500	deactivate_super
+EXPORT_SYMBOL vmlinux 0x531b604e	__virt_addr_valid
+EXPORT_SYMBOL vmlinux 0x5330fcf7	tty_port_init
+EXPORT_SYMBOL vmlinux 0x53326531	mempool_alloc_pages
+EXPORT_SYMBOL vmlinux 0x535b2770	journal_try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0x53611d53	blk_queue_segment_boundary
+EXPORT_SYMBOL vmlinux 0x536c20b0	unregister_snap_client
+EXPORT_SYMBOL vmlinux 0x538383c0	unregister_inet6addr_notifier
+EXPORT_SYMBOL vmlinux 0x5384cd9f	posix_unblock_lock
+EXPORT_SYMBOL vmlinux 0x53c0767c	sk_chk_filter
+EXPORT_SYMBOL vmlinux 0x53cc994d	scsi_put_command
+EXPORT_SYMBOL vmlinux 0x53dd6ad1	xfrm_prepare_input
+EXPORT_SYMBOL vmlinux 0x541078a8	dev_get_flags
+EXPORT_SYMBOL vmlinux 0x5423719f	blk_queue_merge_bvec
+EXPORT_SYMBOL vmlinux 0x54259b2d	bio_add_page
+EXPORT_SYMBOL vmlinux 0x54290dc9	nla_validate
+EXPORT_SYMBOL vmlinux 0x544866eb	journal_unlock_updates
+EXPORT_SYMBOL vmlinux 0x54644637	pci_disable_device
+EXPORT_SYMBOL vmlinux 0x547858ef	scsi_execute_req
+EXPORT_SYMBOL vmlinux 0x54acaade	do_sync_read
+EXPORT_SYMBOL vmlinux 0x54baecbd	block_read_full_page
+EXPORT_SYMBOL vmlinux 0x54dddcf2	key_task_permission
+EXPORT_SYMBOL vmlinux 0x54de335f	uart_suspend_port
+EXPORT_SYMBOL vmlinux 0x54e6fcdd	net_enable_timestamp
+EXPORT_SYMBOL vmlinux 0x54e74333	generic_read_dir
+EXPORT_SYMBOL vmlinux 0x5513f39a	dm_table_get_mode
+EXPORT_SYMBOL vmlinux 0x552c6693	try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0x5531234c	thermal_zone_device_update
+EXPORT_SYMBOL vmlinux 0x5534394f	arp_find
+EXPORT_SYMBOL vmlinux 0x554f0a48	groups_alloc
+EXPORT_SYMBOL vmlinux 0x5558c077	agp_create_memory
+EXPORT_SYMBOL vmlinux 0x558be55d	i2c_master_send
+EXPORT_SYMBOL vmlinux 0x5594be03	bitmap_remap
+EXPORT_SYMBOL vmlinux 0x55a286bf	proc_dointvec_minmax
+EXPORT_SYMBOL vmlinux 0x55e80503	blk_stop_queue
+EXPORT_SYMBOL vmlinux 0x55f85258	kmem_cache_alloc_node
+EXPORT_SYMBOL vmlinux 0x5600904f	fb_get_color_depth
+EXPORT_SYMBOL vmlinux 0x5603cf43	do_settimeofday
+EXPORT_SYMBOL vmlinux 0x560e7cd8	page_readlink
+EXPORT_SYMBOL vmlinux 0x5614b010	xfrm_policy_walk_done
+EXPORT_SYMBOL vmlinux 0x5633b26d	inode_get_bytes
+EXPORT_SYMBOL vmlinux 0x5635a60a	vmalloc_user
+EXPORT_SYMBOL vmlinux 0x56383341	pnp_unregister_driver
+EXPORT_SYMBOL vmlinux 0x5663e958	security_d_instantiate
+EXPORT_SYMBOL vmlinux 0x56bd1935	dm_io
+EXPORT_SYMBOL vmlinux 0x56c79596	genlmsg_multicast_allns
+EXPORT_SYMBOL vmlinux 0x56c8799d	scsi_kunmap_atomic_sg
+EXPORT_SYMBOL vmlinux 0x56df5a59	mmc_regulator_set_ocr
+EXPORT_SYMBOL vmlinux 0x56e14afc	dev_set_mac_address
+EXPORT_SYMBOL vmlinux 0x56f02a6c	cdev_add
+EXPORT_SYMBOL vmlinux 0x56f38712	schedule_delayed_work_on
+EXPORT_SYMBOL vmlinux 0x56f494e0	smp_call_function
+EXPORT_SYMBOL vmlinux 0x5715b9c4	xfrm_policy_alloc
+EXPORT_SYMBOL vmlinux 0x572e85d4	blk_lookup_devt
+EXPORT_SYMBOL vmlinux 0x572e8700	dev_set_promiscuity
+EXPORT_SYMBOL vmlinux 0x573a0b01	dm_table_event
+EXPORT_SYMBOL vmlinux 0x57432517	blk_init_tags
+EXPORT_SYMBOL vmlinux 0x57575f08	dmaengine_put
+EXPORT_SYMBOL vmlinux 0x57adf756	per_cpu__this_cpu_off
+EXPORT_SYMBOL vmlinux 0x57b57ebe	jiffies_to_timespec
+EXPORT_SYMBOL vmlinux 0x57c509fd	acpi_bus_register_driver
+EXPORT_SYMBOL vmlinux 0x57c8f095	node_data
+EXPORT_SYMBOL vmlinux 0x57db7242	mangle_path
+EXPORT_SYMBOL vmlinux 0x57e150ce	set_pages_array_wb
+EXPORT_SYMBOL vmlinux 0x580c5cbe	inet6_register_protosw
+EXPORT_SYMBOL vmlinux 0x580cedd1	nf_ip_checksum
+EXPORT_SYMBOL vmlinux 0x581eb6b3	tcp_v4_conn_request
+EXPORT_SYMBOL vmlinux 0x5832ec7c	vfs_rename
+EXPORT_SYMBOL vmlinux 0x5838f6c9	rtc_valid_tm
+EXPORT_SYMBOL vmlinux 0x584738f9	rdmsr_safe_on_cpu
+EXPORT_SYMBOL vmlinux 0x5857b225	ioread16_rep
+EXPORT_SYMBOL vmlinux 0x585b6c5d	tcp_getsockopt
+EXPORT_SYMBOL vmlinux 0x58641e0a	vfs_quota_on_mount
+EXPORT_SYMBOL vmlinux 0x587108f2	compat_tcp_setsockopt
+EXPORT_SYMBOL vmlinux 0x588e23b3	dev_set_drvdata
+EXPORT_SYMBOL vmlinux 0x5894db67	inode_sub_bytes
+EXPORT_SYMBOL vmlinux 0x58969bf1	pnp_release_card_device
+EXPORT_SYMBOL vmlinux 0x58b6de31	xrlim_allow
+EXPORT_SYMBOL vmlinux 0x58c2eb0a	submit_bio
+EXPORT_SYMBOL vmlinux 0x58caa715	dmam_alloc_noncoherent
+EXPORT_SYMBOL vmlinux 0x5907c012	input_get_keycode
+EXPORT_SYMBOL vmlinux 0x5934392b	fb_register_client
+EXPORT_SYMBOL vmlinux 0x593583f2	__sk_mem_reclaim
+EXPORT_SYMBOL vmlinux 0x5942707c	xfrm_state_unregister_afinfo
+EXPORT_SYMBOL vmlinux 0x594bf15b	ioport_map
+EXPORT_SYMBOL vmlinux 0x596a49d0	pci_set_master
+EXPORT_SYMBOL vmlinux 0x596e3c5c	dev_mc_unsync
+EXPORT_SYMBOL vmlinux 0x59748f08	splice_from_pipe_next
+EXPORT_SYMBOL vmlinux 0x5978ea34	blk_get_backing_dev_info
+EXPORT_SYMBOL vmlinux 0x59a86dab	alloc_pci_dev
+EXPORT_SYMBOL vmlinux 0x59bc9609	acpi_write_bit_register
+EXPORT_SYMBOL vmlinux 0x59cb4200	agp_free_memory
+EXPORT_SYMBOL vmlinux 0x59d696b6	register_module_notifier
+EXPORT_SYMBOL vmlinux 0x5a0cf4aa	agp_collect_device_status
+EXPORT_SYMBOL vmlinux 0x5a1d0bdf	agp_generic_alloc_pages
+EXPORT_SYMBOL vmlinux 0x5a2260f8	mmc_align_data_size
+EXPORT_SYMBOL vmlinux 0x5a26e9f8	pnp_is_active
+EXPORT_SYMBOL vmlinux 0x5a34a45c	__kmalloc
+EXPORT_SYMBOL vmlinux 0x5a4896a8	__put_user_2
+EXPORT_SYMBOL vmlinux 0x5a57d155	__percpu_counter_init
+EXPORT_SYMBOL vmlinux 0x5a5e7ea3	simple_read_from_buffer
+EXPORT_SYMBOL vmlinux 0x5a744b86	netlink_set_nonroot
+EXPORT_SYMBOL vmlinux 0x5a7eda87	posix_acl_permission
+EXPORT_SYMBOL vmlinux 0x5a800119	sock_create
+EXPORT_SYMBOL vmlinux 0x5aa3cbeb	blk_sync_queue
+EXPORT_SYMBOL vmlinux 0x5aab2064	mutex_lock_interruptible
+EXPORT_SYMBOL vmlinux 0x5ac376a5	acpi_install_fixed_event_handler
+EXPORT_SYMBOL vmlinux 0x5acebd49	dev_unicast_unsync
+EXPORT_SYMBOL vmlinux 0x5aeadad2	set_page_dirty
+EXPORT_SYMBOL vmlinux 0x5aed53e8	alloc_tty_driver
+EXPORT_SYMBOL vmlinux 0x5b1305d8	hippi_type_trans
+EXPORT_SYMBOL vmlinux 0x5b27bcec	sysctl_intvec
+EXPORT_SYMBOL vmlinux 0x5b31c4e7	sock_get_timestamp
+EXPORT_SYMBOL vmlinux 0x5b33b075	tcp_v4_do_rcv
+EXPORT_SYMBOL vmlinux 0x5b51c6a7	acpi_walk_resources
+EXPORT_SYMBOL vmlinux 0x5b665c48	rtnl_create_link
+EXPORT_SYMBOL vmlinux 0x5b7b640a	inetdev_by_index
+EXPORT_SYMBOL vmlinux 0x5b8c3942	md_register_thread
+EXPORT_SYMBOL vmlinux 0x5b958838	generic_show_options
+EXPORT_SYMBOL vmlinux 0x5b97ad34	input_free_device
+EXPORT_SYMBOL vmlinux 0x5b9f79aa	lock_may_read
+EXPORT_SYMBOL vmlinux 0x5bae2eac	acpi_extract_package
+EXPORT_SYMBOL vmlinux 0x5bbaf7d1	__task_pid_nr_ns
+EXPORT_SYMBOL vmlinux 0x5bbfafb9	gnet_stats_start_copy_compat
+EXPORT_SYMBOL vmlinux 0x5bd672d4	elv_rb_former_request
+EXPORT_SYMBOL vmlinux 0x5be3a653	ppp_unit_number
+EXPORT_SYMBOL vmlinux 0x5c205b05	test_set_page_writeback
+EXPORT_SYMBOL vmlinux 0x5c77dc1c	filemap_fdatawait_range
+EXPORT_SYMBOL vmlinux 0x5c7bce10	agp_generic_alloc_page
+EXPORT_SYMBOL vmlinux 0x5c8c4150	netif_device_attach
+EXPORT_SYMBOL vmlinux 0x5c9c686b	mb_cache_entry_find_next
+EXPORT_SYMBOL vmlinux 0x5cc4e7b4	serio_rescan
+EXPORT_SYMBOL vmlinux 0x5cc8e015	iov_iter_single_seg_count
+EXPORT_SYMBOL vmlinux 0x5cdfdd7f	bio_split
+EXPORT_SYMBOL vmlinux 0x5d04df2a	vfs_dq_quota_on_remount
+EXPORT_SYMBOL vmlinux 0x5d12b3fc	twl4030_i2c_write_u8
+EXPORT_SYMBOL vmlinux 0x5d3b0209	slow_work_register_user
+EXPORT_SYMBOL vmlinux 0x5d74dbcf	pnp_range_reserved
+EXPORT_SYMBOL vmlinux 0x5d96df3c	default_unplug_io_fn
+EXPORT_SYMBOL vmlinux 0x5daef1fe	revert_creds
+EXPORT_SYMBOL vmlinux 0x5db41230	nf_getsockopt
+EXPORT_SYMBOL vmlinux 0x5df170d3	dquot_release
+EXPORT_SYMBOL vmlinux 0x5dff0db2	scm_fp_dup
+EXPORT_SYMBOL vmlinux 0x5e118b6d	__sk_mem_schedule
+EXPORT_SYMBOL vmlinux 0x5e17cf95	sock_no_listen
+EXPORT_SYMBOL vmlinux 0x5e21f413	kobject_get
+EXPORT_SYMBOL vmlinux 0x5e346e83	mdiobus_read
+EXPORT_SYMBOL vmlinux 0x5e4307a0	kobject_add
+EXPORT_SYMBOL vmlinux 0x5e4b8ae6	fib_default_rule_add
+EXPORT_SYMBOL vmlinux 0x5e61b330	swiotlb_map_sg
+EXPORT_SYMBOL vmlinux 0x5e639f4c	md_integrity_add_rdev
+EXPORT_SYMBOL vmlinux 0x5e86a929	llc_sap_close
+EXPORT_SYMBOL vmlinux 0x5e95b1cd	current_umask
+EXPORT_SYMBOL vmlinux 0x5ea520c5	tcp_select_initial_window
+EXPORT_SYMBOL vmlinux 0x5eafa6e7	ilookup5_nowait
+EXPORT_SYMBOL vmlinux 0x5ec1ac81	blk_queue_alignment_offset
+EXPORT_SYMBOL vmlinux 0x5ed040b0	pm_set_vt_switch
+EXPORT_SYMBOL vmlinux 0x5ed6899a	scsi_mode_sense
+EXPORT_SYMBOL vmlinux 0x5ed6e1f4	netdev_state_change
+EXPORT_SYMBOL vmlinux 0x5edd0762	bin2bcd
+EXPORT_SYMBOL vmlinux 0x5efc2a92	nf_register_hooks
+EXPORT_SYMBOL vmlinux 0x5f044d2f	end_page_writeback
+EXPORT_SYMBOL vmlinux 0x5f0f1bde	pci_unmap_rom
+EXPORT_SYMBOL vmlinux 0x5f1425f4	sync_mapping_buffers
+EXPORT_SYMBOL vmlinux 0x5f43ab70	redirty_page_for_writepage
+EXPORT_SYMBOL vmlinux 0x5f470e14	pci_disable_msi
+EXPORT_SYMBOL vmlinux 0x5f56db66	per_cpu__ftrace_event_seq
+EXPORT_SYMBOL vmlinux 0x5f5f0b5e	skb_kill_datagram
+EXPORT_SYMBOL vmlinux 0x5fb74fdd	ipv6_skip_exthdr
+EXPORT_SYMBOL vmlinux 0x5fd14731	follow_pfn
+EXPORT_SYMBOL vmlinux 0x5fdaa554	rfkill_init_sw_state
+EXPORT_SYMBOL vmlinux 0x5fdbc801	neigh_lookup_nodev
+EXPORT_SYMBOL vmlinux 0x5fdbf4e9	block_truncate_page
+EXPORT_SYMBOL vmlinux 0x5ff42b08	acpi_video_get_capabilities
+EXPORT_SYMBOL vmlinux 0x600362d9	dqput
+EXPORT_SYMBOL vmlinux 0x6004dc27	phy_stop_interrupts
+EXPORT_SYMBOL vmlinux 0x600683d3	do_unblank_screen
+EXPORT_SYMBOL vmlinux 0x6010a85d	tty_port_hangup
+EXPORT_SYMBOL vmlinux 0x60293958	vfs_symlink
+EXPORT_SYMBOL vmlinux 0x602ed00d	acpi_current_gpe_count
+EXPORT_SYMBOL vmlinux 0x6038849d	scsi_setup_blk_pc_cmnd
+EXPORT_SYMBOL vmlinux 0x6055c5c9	agp_generic_type_to_mask_type
+EXPORT_SYMBOL vmlinux 0x6056c2ba	bdi_init
+EXPORT_SYMBOL vmlinux 0x605c8bde	radix_tree_delete
+EXPORT_SYMBOL vmlinux 0x608b05bb	acpi_is_video_device
+EXPORT_SYMBOL vmlinux 0x609b5000	tcf_em_register
+EXPORT_SYMBOL vmlinux 0x609f1c7e	synchronize_net
+EXPORT_SYMBOL vmlinux 0x60a0ebad	__tracepoint_kmem_cache_alloc_node
+EXPORT_SYMBOL vmlinux 0x60a32ea9	pm_power_off
+EXPORT_SYMBOL vmlinux 0x60e6ea7b	blk_queue_max_hw_sectors
+EXPORT_SYMBOL vmlinux 0x6103c4c7	per_cpu__irq_stat
+EXPORT_SYMBOL vmlinux 0x612390ad	netpoll_set_trap
+EXPORT_SYMBOL vmlinux 0x613e226b	open_by_devnum
+EXPORT_SYMBOL vmlinux 0x61744415	elv_rb_latter_request
+EXPORT_SYMBOL vmlinux 0x618d8299	set_notify_swap_entry_free
+EXPORT_SYMBOL vmlinux 0x61a09ec5	vfs_unlink
+EXPORT_SYMBOL vmlinux 0x61b7b126	simple_strtoull
+EXPORT_SYMBOL vmlinux 0x61c0fe54	nla_put_nohdr
+EXPORT_SYMBOL vmlinux 0x61d1c513	pci_bus_write_config_byte
+EXPORT_SYMBOL vmlinux 0x61d3711c	vga_tryget
+EXPORT_SYMBOL vmlinux 0x62049256	acpi_disable
+EXPORT_SYMBOL vmlinux 0x62067d67	xfrm_state_update
+EXPORT_SYMBOL vmlinux 0x620ae6c0	pv_cpu_ops
+EXPORT_SYMBOL vmlinux 0x621de89e	__scsi_iterate_devices
+EXPORT_SYMBOL vmlinux 0x6237f6b5	acpi_enable_event
+EXPORT_SYMBOL vmlinux 0x62447f77	seq_open
+EXPORT_SYMBOL vmlinux 0x6246e134	pci_get_bus_and_slot
+EXPORT_SYMBOL vmlinux 0x625670f6	lookup_hash
+EXPORT_SYMBOL vmlinux 0x62737e1d	sock_unregister
+EXPORT_SYMBOL vmlinux 0x62748e70	acpi_set_current_resources
+EXPORT_SYMBOL vmlinux 0x62827bec	security_secctx_to_secid
+EXPORT_SYMBOL vmlinux 0x6286816d	framebuffer_alloc
+EXPORT_SYMBOL vmlinux 0x6298782f	dev_mc_sync
+EXPORT_SYMBOL vmlinux 0x62a4ea6d	eth_rebuild_header
+EXPORT_SYMBOL vmlinux 0x62b937f1	netif_napi_del
+EXPORT_SYMBOL vmlinux 0x62cc4119	__sk_dst_check
+EXPORT_SYMBOL vmlinux 0x62d8052e	rfkill_register
+EXPORT_SYMBOL vmlinux 0x62ddee0a	grab_cache_page_nowait
+EXPORT_SYMBOL vmlinux 0x6307fc98	del_timer
+EXPORT_SYMBOL vmlinux 0x631a49b3	kfree_skb
+EXPORT_SYMBOL vmlinux 0x6328d89d	call_usermodehelper_setkeys
+EXPORT_SYMBOL vmlinux 0x636a5691	acpi_register_ioapic
+EXPORT_SYMBOL vmlinux 0x636fcb02	neigh_for_each
+EXPORT_SYMBOL vmlinux 0x63ecad53	register_netdevice_notifier
+EXPORT_SYMBOL vmlinux 0x63ee986f	remove_arg_zero
+EXPORT_SYMBOL vmlinux 0x63f9044a	agp_find_bridge
+EXPORT_SYMBOL vmlinux 0x63fc232f	strlen_user
+EXPORT_SYMBOL vmlinux 0x6403e1e9	generic_file_mmap
+EXPORT_SYMBOL vmlinux 0x6403e338	tcp_memory_pressure
+EXPORT_SYMBOL vmlinux 0x6413b9cf	filemap_fdatawrite
+EXPORT_SYMBOL vmlinux 0x642e54ac	__wake_up
+EXPORT_SYMBOL vmlinux 0x6466a1e6	mempool_alloc
+EXPORT_SYMBOL vmlinux 0x6476a09e	mmc_unregister_driver
+EXPORT_SYMBOL vmlinux 0x6478134c	ec_burst_enable
+EXPORT_SYMBOL vmlinux 0x64999478	congestion_wait
+EXPORT_SYMBOL vmlinux 0x64b524cc	phy_register_fixup_for_uid
+EXPORT_SYMBOL vmlinux 0x64d6103a	phy_disable_interrupts
+EXPORT_SYMBOL vmlinux 0x64eae7ad	set_memory_array_wb
+EXPORT_SYMBOL vmlinux 0x64f30108	pcim_iomap_table
+EXPORT_SYMBOL vmlinux 0x65022a24	radix_tree_prev_hole
+EXPORT_SYMBOL vmlinux 0x650face5	ethtool_op_get_tso
+EXPORT_SYMBOL vmlinux 0x650fb346	add_wait_queue
+EXPORT_SYMBOL vmlinux 0x6510d588	scm_detach_fds
+EXPORT_SYMBOL vmlinux 0x651a4139	test_taint
+EXPORT_SYMBOL vmlinux 0x6525b428	uart_update_timeout
+EXPORT_SYMBOL vmlinux 0x653a7c79	generic_removexattr
+EXPORT_SYMBOL vmlinux 0x65408378	zlib_inflate_blob
+EXPORT_SYMBOL vmlinux 0x65414e67	dev_valid_name
+EXPORT_SYMBOL vmlinux 0x655208d3	follow_up
+EXPORT_SYMBOL vmlinux 0x6574d977	block_invalidatepage
+EXPORT_SYMBOL vmlinux 0x657b589d	dev_get_by_index
+EXPORT_SYMBOL vmlinux 0x6587df3a	mutex_lock_killable
+EXPORT_SYMBOL vmlinux 0x6597c30a	__put_cred
+EXPORT_SYMBOL vmlinux 0x65b03237	mmc_free_host
+EXPORT_SYMBOL vmlinux 0x65dc4039	netpoll_send_udp
+EXPORT_SYMBOL vmlinux 0x66051a8c	napi_gro_frags
+EXPORT_SYMBOL vmlinux 0x660c814d	audit_log_format
+EXPORT_SYMBOL vmlinux 0x661a5783	proc_dointvec_userhz_jiffies
+EXPORT_SYMBOL vmlinux 0x66362e84	inet6_ioctl
+EXPORT_SYMBOL vmlinux 0x6638d0e2	uart_resume_port
+EXPORT_SYMBOL vmlinux 0x66757e59	blk_cleanup_queue
+EXPORT_SYMBOL vmlinux 0x668da8d5	zlib_inflateIncomp
+EXPORT_SYMBOL vmlinux 0x66aa48d0	elv_rq_merge_ok
+EXPORT_SYMBOL vmlinux 0x66ade894	blk_complete_request
+EXPORT_SYMBOL vmlinux 0x66c59092	security_inode_init_security
+EXPORT_SYMBOL vmlinux 0x66d5d675	kernel_sendpage
+EXPORT_SYMBOL vmlinux 0x66e79bb8	__nla_put_nohdr
+EXPORT_SYMBOL vmlinux 0x67053080	current_kernel_time
+EXPORT_SYMBOL vmlinux 0x672144bd	strlcpy
+EXPORT_SYMBOL vmlinux 0x67280a02	journal_flush
+EXPORT_SYMBOL vmlinux 0x6729d3df	__get_user_4
+EXPORT_SYMBOL vmlinux 0x673f815e	agp_bridges
+EXPORT_SYMBOL vmlinux 0x674e5a94	pci_remove_behind_bridge
+EXPORT_SYMBOL vmlinux 0x67527c52	netif_carrier_on
+EXPORT_SYMBOL vmlinux 0x6768c050	scsi_is_target_device
+EXPORT_SYMBOL vmlinux 0x67806e28	pci_enable_device_mem
+EXPORT_SYMBOL vmlinux 0x67b08575	tcp_check_req
+EXPORT_SYMBOL vmlinux 0x67b27ec1	tty_std_termios
+EXPORT_SYMBOL vmlinux 0x67d7c864	fsync_bdev
+EXPORT_SYMBOL vmlinux 0x67e6f480	keyring_clear
+EXPORT_SYMBOL vmlinux 0x67f1bef7	seq_lseek
+EXPORT_SYMBOL vmlinux 0x67fffc97	__breadahead
+EXPORT_SYMBOL vmlinux 0x68021d60	key_link
+EXPORT_SYMBOL vmlinux 0x6812691c	pci_match_id
+EXPORT_SYMBOL vmlinux 0x68432bf0	pnp_device_detach
+EXPORT_SYMBOL vmlinux 0x6858b238	blk_queue_max_sectors
+EXPORT_SYMBOL vmlinux 0x6867aa6d	lro_vlan_hwaccel_receive_frags
+EXPORT_SYMBOL vmlinux 0x686dd14e	i2c_smbus_write_block_data
+EXPORT_SYMBOL vmlinux 0x6893b07b	xfrm_dst_ifdown
+EXPORT_SYMBOL vmlinux 0x69058522	icmpv6_send
+EXPORT_SYMBOL vmlinux 0x6907d4e9	idr_for_each
+EXPORT_SYMBOL vmlinux 0x6913b834	scsi_eh_restore_cmnd
+EXPORT_SYMBOL vmlinux 0x6928fe92	blk_queue_dma_pad
+EXPORT_SYMBOL vmlinux 0x695f5e85	poll_initwait
+EXPORT_SYMBOL vmlinux 0x6971447a	rtc_month_days
+EXPORT_SYMBOL vmlinux 0x697cb0a0	sysctl_ms_jiffies
+EXPORT_SYMBOL vmlinux 0x6980fe91	param_get_int
+EXPORT_SYMBOL vmlinux 0x69927dff	try_acquire_console_sem
+EXPORT_SYMBOL vmlinux 0x69961b32	sk_stream_wait_memory
+EXPORT_SYMBOL vmlinux 0x699a6ebe	shrink_dcache_sb
+EXPORT_SYMBOL vmlinux 0x699bb514	jbd2_journal_init_dev
+EXPORT_SYMBOL vmlinux 0x69a0ca7d	iowrite16be
+EXPORT_SYMBOL vmlinux 0x69a358a6	iomem_resource
+EXPORT_SYMBOL vmlinux 0x69aef723	per_cpu__cpu_info
+EXPORT_SYMBOL vmlinux 0x69b0ade4	security_inode_permission
+EXPORT_SYMBOL vmlinux 0x69b4c948	skb_checksum
+EXPORT_SYMBOL vmlinux 0x69c8c1d5	security_req_classify_flow
+EXPORT_SYMBOL vmlinux 0x69d2575f	efi
+EXPORT_SYMBOL vmlinux 0x69d38ed9	__scsi_print_sense
+EXPORT_SYMBOL vmlinux 0x69d7b27d	__scsi_add_device
+EXPORT_SYMBOL vmlinux 0x69e27c7a	bitmap_copy_le
+EXPORT_SYMBOL vmlinux 0x6a037cf1	mempool_kfree
+EXPORT_SYMBOL vmlinux 0x6a1bc3e0	dev_unicast_add
+EXPORT_SYMBOL vmlinux 0x6a47571d	__set_personality
+EXPORT_SYMBOL vmlinux 0x6a54baea	page_symlink
+EXPORT_SYMBOL vmlinux 0x6a5729b1	alloc_trdev
+EXPORT_SYMBOL vmlinux 0x6a5f98a0	ida_get_new_above
+EXPORT_SYMBOL vmlinux 0x6a5fa363	sigprocmask
+EXPORT_SYMBOL vmlinux 0x6a76f3ac	blk_iopoll_enable
+EXPORT_SYMBOL vmlinux 0x6a96eebc	km_query
+EXPORT_SYMBOL vmlinux 0x6a9f26c9	init_timer_key
+EXPORT_SYMBOL vmlinux 0x6ac2c6a4	elv_abort_queue
+EXPORT_SYMBOL vmlinux 0x6acb973d	iowrite32be
+EXPORT_SYMBOL vmlinux 0x6ad065f4	param_set_charp
+EXPORT_SYMBOL vmlinux 0x6ad14b4b	cpufreq_global_kobject
+EXPORT_SYMBOL vmlinux 0x6ad85887	acpi_enable_gpe
+EXPORT_SYMBOL vmlinux 0x6add5c9a	dmi_find_device
+EXPORT_SYMBOL vmlinux 0x6aeb0696	mmc_card_sleep
+EXPORT_SYMBOL vmlinux 0x6af11c2e	proto_register
+EXPORT_SYMBOL vmlinux 0x6b168185	pcim_iomap
+EXPORT_SYMBOL vmlinux 0x6b1b67d3	__bdevname
+EXPORT_SYMBOL vmlinux 0x6b2dc060	dump_stack
+EXPORT_SYMBOL vmlinux 0x6b4e5a52	radix_tree_lookup_slot
+EXPORT_SYMBOL vmlinux 0x6b5499c8	notify_change
+EXPORT_SYMBOL vmlinux 0x6b66aa4a	module_layout
+EXPORT_SYMBOL vmlinux 0x6b967e02	make_EII_client
+EXPORT_SYMBOL vmlinux 0x6b9b88f3	sleep_on
+EXPORT_SYMBOL vmlinux 0x6ba39619	get_write_access
+EXPORT_SYMBOL vmlinux 0x6baabdc0	bio_init
+EXPORT_SYMBOL vmlinux 0x6bbcf264	blk_init_queue_node
+EXPORT_SYMBOL vmlinux 0x6bc3fbc0	__unregister_chrdev
+EXPORT_SYMBOL vmlinux 0x6bc56c67	radix_tree_next_hole
+EXPORT_SYMBOL vmlinux 0x6bdcfd99	qdisc_class_hash_remove
+EXPORT_SYMBOL vmlinux 0x6be7e998	__pagevec_release
+EXPORT_SYMBOL vmlinux 0x6c041fd5	nf_reinject
+EXPORT_SYMBOL vmlinux 0x6c389761	acpi_bus_get_private_data
+EXPORT_SYMBOL vmlinux 0x6c5837f8	sg_miter_stop
+EXPORT_SYMBOL vmlinux 0x6c5ac193	blk_end_request
+EXPORT_SYMBOL vmlinux 0x6c61ce70	num_registered_fb
+EXPORT_SYMBOL vmlinux 0x6c656ba5	md_unregister_thread
+EXPORT_SYMBOL vmlinux 0x6c702af7	sysctl_udp_rmem_min
+EXPORT_SYMBOL vmlinux 0x6c7a4d86	rfkill_set_hw_state
+EXPORT_SYMBOL vmlinux 0x6c8586ee	inet_register_protosw
+EXPORT_SYMBOL vmlinux 0x6ca27d0a	dm_table_get
+EXPORT_SYMBOL vmlinux 0x6cb84b9e	pipe_to_file
+EXPORT_SYMBOL vmlinux 0x6ce420dc	mmc_release_host
+EXPORT_SYMBOL vmlinux 0x6ce7e6d9	skb_copy_datagram_from_iovec
+EXPORT_SYMBOL vmlinux 0x6cee137f	dm_dirty_log_create
+EXPORT_SYMBOL vmlinux 0x6cf45a10	dquot_mark_dquot_dirty
+EXPORT_SYMBOL vmlinux 0x6cf7bd3d	phy_ethtool_gset
+EXPORT_SYMBOL vmlinux 0x6d01f2ac	skb_realloc_headroom
+EXPORT_SYMBOL vmlinux 0x6d0b77fe	sysctl_data
+EXPORT_SYMBOL vmlinux 0x6d0e3039	vfs_fstatat
+EXPORT_SYMBOL vmlinux 0x6d27ef64	__bitmap_empty
+EXPORT_SYMBOL vmlinux 0x6d294e43	clock_t_to_jiffies
+EXPORT_SYMBOL vmlinux 0x6d2c308f	elv_add_request
+EXPORT_SYMBOL vmlinux 0x6d334118	__get_user_8
+EXPORT_SYMBOL vmlinux 0x6d340f64	tty_termios_input_baud_rate
+EXPORT_SYMBOL vmlinux 0x6d4542ef	tcp_gro_receive
+EXPORT_SYMBOL vmlinux 0x6d5d3586	fb_validate_mode
+EXPORT_SYMBOL vmlinux 0x6d616dd1	unregister_cdrom
+EXPORT_SYMBOL vmlinux 0x6d656eb4	locks_mandatory_area
+EXPORT_SYMBOL vmlinux 0x6d6cbadc	rb_last
+EXPORT_SYMBOL vmlinux 0x6d77b8e9	simple_transaction_release
+EXPORT_SYMBOL vmlinux 0x6dad51b7	rtnl_unicast
+EXPORT_SYMBOL vmlinux 0x6dc0c24b	complete_and_exit
+EXPORT_SYMBOL vmlinux 0x6dcaeb88	per_cpu__kernel_stack
+EXPORT_SYMBOL vmlinux 0x6dd999b0	pci_dev_put
+EXPORT_SYMBOL vmlinux 0x6de6bf83	radix_tree_lookup
+EXPORT_SYMBOL vmlinux 0x6ded4282	inet_unregister_protosw
+EXPORT_SYMBOL vmlinux 0x6deda464	xfrm_state_walk
+EXPORT_SYMBOL vmlinux 0x6def2db2	half_md4_transform
+EXPORT_SYMBOL vmlinux 0x6e063d30	blk_queue_invalidate_tags
+EXPORT_SYMBOL vmlinux 0x6e07a54e	acpi_get_gpe_status
+EXPORT_SYMBOL vmlinux 0x6e082976	swiotlb_free_coherent
+EXPORT_SYMBOL vmlinux 0x6e0f4648	init_special_inode
+EXPORT_SYMBOL vmlinux 0x6e12d158	ppp_unregister_compressor
+EXPORT_SYMBOL vmlinux 0x6e720ff2	rtnl_unlock
+EXPORT_SYMBOL vmlinux 0x6e76e342	register_sysctl_table
+EXPORT_SYMBOL vmlinux 0x6e802324	radix_tree_tag_get
+EXPORT_SYMBOL vmlinux 0x6e82571d	scsi_print_result
+EXPORT_SYMBOL vmlinux 0x6e9dd606	__symbol_put
+EXPORT_SYMBOL vmlinux 0x6eaa06c2	mddev_congested
+EXPORT_SYMBOL vmlinux 0x6eb0fdf3	__cond_resched_lock
+EXPORT_SYMBOL vmlinux 0x6ec1b731	con_copy_unimap
+EXPORT_SYMBOL vmlinux 0x6f03183b	simple_unlink
+EXPORT_SYMBOL vmlinux 0x6f289212	udp_ioctl
+EXPORT_SYMBOL vmlinux 0x6f344d97	bitmap_endwrite
+EXPORT_SYMBOL vmlinux 0x6f424369	tcf_destroy_chain
+EXPORT_SYMBOL vmlinux 0x6f4c508e	blk_queue_logical_block_size
+EXPORT_SYMBOL vmlinux 0x6f556bdb	acpi_get_gpe_device
+EXPORT_SYMBOL vmlinux 0x6f565f52	input_unregister_handler
+EXPORT_SYMBOL vmlinux 0x6f7712d4	agp_bind_memory
+EXPORT_SYMBOL vmlinux 0x6f891462	request_key_async
+EXPORT_SYMBOL vmlinux 0x6f8ac9da	task_nice
+EXPORT_SYMBOL vmlinux 0x6f97a660	alloc_etherdev_mq
+EXPORT_SYMBOL vmlinux 0x6fcb87a1	touch_softlockup_watchdog
+EXPORT_SYMBOL vmlinux 0x6feb2039	acpi_write
+EXPORT_SYMBOL vmlinux 0x6fff393f	time_to_tm
+EXPORT_SYMBOL vmlinux 0x700936f7	gnet_stats_copy_rate_est
+EXPORT_SYMBOL vmlinux 0x703273e5	pci_find_bus
+EXPORT_SYMBOL vmlinux 0x703bc7b5	kthread_stop
+EXPORT_SYMBOL vmlinux 0x70523a7a	__cond_resched_softirq
+EXPORT_SYMBOL vmlinux 0x7054a3e4	request_dma
+EXPORT_SYMBOL vmlinux 0x7074f1cc	__xfrm_state_delete
+EXPORT_SYMBOL vmlinux 0x70765d1c	vfs_lstat
+EXPORT_SYMBOL vmlinux 0x7078dc17	scsi_block_requests
+EXPORT_SYMBOL vmlinux 0x70798d9a	dev_set_allmulti
+EXPORT_SYMBOL vmlinux 0x707b9549	i2c_release_client
+EXPORT_SYMBOL vmlinux 0x70917b83	take_over_console
+EXPORT_SYMBOL vmlinux 0x709c9efc	generic_file_readonly_mmap
+EXPORT_SYMBOL vmlinux 0x70a20009	d_rehash
+EXPORT_SYMBOL vmlinux 0x70aeaadc	jbd2_journal_errno
+EXPORT_SYMBOL vmlinux 0x70af3fd5	tcp_disconnect
+EXPORT_SYMBOL vmlinux 0x70bc17d7	inode_wait
+EXPORT_SYMBOL vmlinux 0x70d8ab82	acpi_acquire_global_lock
+EXPORT_SYMBOL vmlinux 0x711a9560	xfrm_state_alloc
+EXPORT_SYMBOL vmlinux 0x711dfd22	register_netdevice
+EXPORT_SYMBOL vmlinux 0x7129e5f8	hex_asc
+EXPORT_SYMBOL vmlinux 0x712aa29b	_spin_lock_irqsave
+EXPORT_SYMBOL vmlinux 0x71356fba	remove_wait_queue
+EXPORT_SYMBOL vmlinux 0x7171121c	overflowgid
+EXPORT_SYMBOL vmlinux 0x71778e87	___pskb_trim
+EXPORT_SYMBOL vmlinux 0x7177bf78	invalidate_partition
+EXPORT_SYMBOL vmlinux 0x717eb0c7	dcache_dir_close
+EXPORT_SYMBOL vmlinux 0x71a38c2d	__free_pages
+EXPORT_SYMBOL vmlinux 0x71a50dbc	register_blkdev
+EXPORT_SYMBOL vmlinux 0x71af8e01	__xfrm_route_forward
+EXPORT_SYMBOL vmlinux 0x71bde0cd	vga_put
+EXPORT_SYMBOL vmlinux 0x71be426b	mntput_no_expire
+EXPORT_SYMBOL vmlinux 0x71c3775b	rfkill_unregister
+EXPORT_SYMBOL vmlinux 0x71d30e69	uart_unregister_driver
+EXPORT_SYMBOL vmlinux 0x71d95e02	alloc_mdio_bitbang
+EXPORT_SYMBOL vmlinux 0x71e933ae	napi_frags_finish
+EXPORT_SYMBOL vmlinux 0x71f6eb38	sg_copy_from_buffer
+EXPORT_SYMBOL vmlinux 0x7209333f	scsi_device_set_state
+EXPORT_SYMBOL vmlinux 0x7209736e	abort_creds
+EXPORT_SYMBOL vmlinux 0x723e177d	inet_frag_kill
+EXPORT_SYMBOL vmlinux 0x7242e96d	strnchr
+EXPORT_SYMBOL vmlinux 0x72b243d4	free_dma
+EXPORT_SYMBOL vmlinux 0x72bf2140	mtrr_add
+EXPORT_SYMBOL vmlinux 0x72c3be87	param_set_byte
+EXPORT_SYMBOL vmlinux 0x72e147d0	kill_anon_super
+EXPORT_SYMBOL vmlinux 0x72ea7b2d	scsi_device_type
+EXPORT_SYMBOL vmlinux 0x73069c5a	complete_request_key
+EXPORT_SYMBOL vmlinux 0x730868e2	unlock_rename
+EXPORT_SYMBOL vmlinux 0x73197ca9	skb_dma_map
+EXPORT_SYMBOL vmlinux 0x7325487a	netpoll_poll
+EXPORT_SYMBOL vmlinux 0x7326478f	pci_set_consistent_dma_mask
+EXPORT_SYMBOL vmlinux 0x733f95dd	security_path_mknod
+EXPORT_SYMBOL vmlinux 0x734be998	vlan_dev_real_dev
+EXPORT_SYMBOL vmlinux 0x734e53a3	scsi_nonblockable_ioctl
+EXPORT_SYMBOL vmlinux 0x735a0bd5	native_io_delay
+EXPORT_SYMBOL vmlinux 0x736b337e	tty_free_termios
+EXPORT_SYMBOL vmlinux 0x736d0d9e	gnet_stats_copy_queue
+EXPORT_SYMBOL vmlinux 0x73704fb6	generic_ro_fops
+EXPORT_SYMBOL vmlinux 0x73745f28	seq_bitmap
+EXPORT_SYMBOL vmlinux 0x737a6917	send_sig
+EXPORT_SYMBOL vmlinux 0x738176b0	netpoll_print_options
+EXPORT_SYMBOL vmlinux 0x7389c9a8	acpi_bus_get_power
+EXPORT_SYMBOL vmlinux 0x738a2c27	proc_symlink
+EXPORT_SYMBOL vmlinux 0x738c7bcd	alloc_pages_current
+EXPORT_SYMBOL vmlinux 0x739ee22d	gen_pool_add
+EXPORT_SYMBOL vmlinux 0x73cf0c25	vfs_fsync
+EXPORT_SYMBOL vmlinux 0x73d47708	inet_frags_init
+EXPORT_SYMBOL vmlinux 0x73e97df5	inet_dev_addr_type
+EXPORT_SYMBOL vmlinux 0x740a1b95	reserve_evntsel_nmi
+EXPORT_SYMBOL vmlinux 0x741195ea	path_get
+EXPORT_SYMBOL vmlinux 0x744822c4	compat_ip_getsockopt
+EXPORT_SYMBOL vmlinux 0x744c0c68	param_get_byte
+EXPORT_SYMBOL vmlinux 0x7461557d	neigh_sysctl_register
+EXPORT_SYMBOL vmlinux 0x74628101	f_setown
+EXPORT_SYMBOL vmlinux 0x747e69c7	vm_insert_pfn
+EXPORT_SYMBOL vmlinux 0x7485e15e	unregister_chrdev_region
+EXPORT_SYMBOL vmlinux 0x748caf40	down
+EXPORT_SYMBOL vmlinux 0x74954462	timecounter_read
+EXPORT_SYMBOL vmlinux 0x74a0fc6f	pneigh_enqueue
+EXPORT_SYMBOL vmlinux 0x74aed565	vfs_set_dqinfo
+EXPORT_SYMBOL vmlinux 0x74b5b4b7	sock_tx_timestamp
+EXPORT_SYMBOL vmlinux 0x74bfc369	__tracepoint_kmem_cache_alloc
+EXPORT_SYMBOL vmlinux 0x74cc1cbe	unregister_cpu_notifier
+EXPORT_SYMBOL vmlinux 0x7526ee84	compat_nf_setsockopt
+EXPORT_SYMBOL vmlinux 0x7538b132	agp_off
+EXPORT_SYMBOL vmlinux 0x755a15ea	vga_set_legacy_decoding
+EXPORT_SYMBOL vmlinux 0x756e6992	strnicmp
+EXPORT_SYMBOL vmlinux 0x75bdea12	iommu_area_alloc
+EXPORT_SYMBOL vmlinux 0x75c8fab9	splice_from_pipe_begin
+EXPORT_SYMBOL vmlinux 0x760a0f4f	yield
+EXPORT_SYMBOL vmlinux 0x760b437a	unregister_inetaddr_notifier
+EXPORT_SYMBOL vmlinux 0x76254c6a	do_sync_write
+EXPORT_SYMBOL vmlinux 0x764bd77c	request_resource
+EXPORT_SYMBOL vmlinux 0x766226bf	mmc_set_data_timeout
+EXPORT_SYMBOL vmlinux 0x767dd8fd	acpi_get_irq_routing_table
+EXPORT_SYMBOL vmlinux 0x767ddb02	set_memory_wc
+EXPORT_SYMBOL vmlinux 0x7683453b	elv_queue_empty
+EXPORT_SYMBOL vmlinux 0x76869ac8	rdmsr_on_cpus
+EXPORT_SYMBOL vmlinux 0x7695f124	datagram_poll
+EXPORT_SYMBOL vmlinux 0x76b04751	compat_ipv6_setsockopt
+EXPORT_SYMBOL vmlinux 0x76bba302	ethtool_op_get_flags
+EXPORT_SYMBOL vmlinux 0x76bf656d	__bitmap_shift_left
+EXPORT_SYMBOL vmlinux 0x76c188a7	d_path
+EXPORT_SYMBOL vmlinux 0x76c6230d	sock_no_recvmsg
+EXPORT_SYMBOL vmlinux 0x76d3cd60	laptop_mode
+EXPORT_SYMBOL vmlinux 0x76e9fea0	d_add_ci
+EXPORT_SYMBOL vmlinux 0x76f3f8a5	num_k8_northbridges
+EXPORT_SYMBOL vmlinux 0x76fa8bb6	pci_clear_mwi
+EXPORT_SYMBOL vmlinux 0x770be49a	blk_queue_start_tag
+EXPORT_SYMBOL vmlinux 0x77244bd3	kmem_cache_name
+EXPORT_SYMBOL vmlinux 0x772814b8	unmap_mapping_range
+EXPORT_SYMBOL vmlinux 0x77391108	generic_shutdown_super
+EXPORT_SYMBOL vmlinux 0x773a9c94	blk_iopoll_enabled
+EXPORT_SYMBOL vmlinux 0x7742680a	check_disk_change
+EXPORT_SYMBOL vmlinux 0x774efd16	bio_uncopy_user
+EXPORT_SYMBOL vmlinux 0x777d5d99	dev_remove_pack
+EXPORT_SYMBOL vmlinux 0x77912376	blk_queue_find_tag
+EXPORT_SYMBOL vmlinux 0x77a108df	_write_unlock_irqrestore
+EXPORT_SYMBOL vmlinux 0x77a83b04	dquot_commit_info
+EXPORT_SYMBOL vmlinux 0x77cfcfde	__tracepoint_kmalloc_node
+EXPORT_SYMBOL vmlinux 0x77d7b778	sock_wake_async
+EXPORT_SYMBOL vmlinux 0x77e86c2d	fail_migrate_page
+EXPORT_SYMBOL vmlinux 0x77ec97b4	scsi_remove_host
+EXPORT_SYMBOL vmlinux 0x77ecac9f	zlib_inflateEnd
+EXPORT_SYMBOL vmlinux 0x77f53abc	acpi_get_vendor_resource
+EXPORT_SYMBOL vmlinux 0x77f94d08	blk_plug_device_unlocked
+EXPORT_SYMBOL vmlinux 0x77fa5d1f	ns_to_timespec
+EXPORT_SYMBOL vmlinux 0x782acba5	crc_t10dif
+EXPORT_SYMBOL vmlinux 0x783d0c5d	blk_integrity_compare
+EXPORT_SYMBOL vmlinux 0x784dd1d6	tcp_simple_retransmit
+EXPORT_SYMBOL vmlinux 0x785148a3	idr_destroy
+EXPORT_SYMBOL vmlinux 0x785b270a	tcf_exts_dump_stats
+EXPORT_SYMBOL vmlinux 0x78645918	migrate_page
+EXPORT_SYMBOL vmlinux 0x78764f4e	pv_irq_ops
+EXPORT_SYMBOL vmlinux 0x788c580d	pnp_unregister_card_driver
+EXPORT_SYMBOL vmlinux 0x78a484c9	_read_unlock_irqrestore
+EXPORT_SYMBOL vmlinux 0x78cfcf03	tcp_v4_md5_do_del
+EXPORT_SYMBOL vmlinux 0x78df6bd7	no_pci_devices
+EXPORT_SYMBOL vmlinux 0x79068fda	acpi_install_method
+EXPORT_SYMBOL vmlinux 0x790aa7d7	pci_fixup_device
+EXPORT_SYMBOL vmlinux 0x7926b0d8	scsi_get_device_flags_keyed
+EXPORT_SYMBOL vmlinux 0x792cfba1	scsi_eh_prep_cmnd
+EXPORT_SYMBOL vmlinux 0x796157ae	mutex_unlock
+EXPORT_SYMBOL vmlinux 0x796fc5ce	scsi_get_sense_info_fld
+EXPORT_SYMBOL vmlinux 0x79aa04a2	get_random_bytes
+EXPORT_SYMBOL vmlinux 0x79ad224b	tasklet_kill
+EXPORT_SYMBOL vmlinux 0x79b7a431	netdev_set_master
+EXPORT_SYMBOL vmlinux 0x79b7f114	neigh_update
+EXPORT_SYMBOL vmlinux 0x79b91660	lro_receive_skb
+EXPORT_SYMBOL vmlinux 0x79d1c41b	journal_ack_err
+EXPORT_SYMBOL vmlinux 0x79d323f7	create_empty_buffers
+EXPORT_SYMBOL vmlinux 0x79f82ed1	gnet_stats_copy_basic
+EXPORT_SYMBOL vmlinux 0x7a22fb54	ip_queue_xmit
+EXPORT_SYMBOL vmlinux 0x7a2a4ad5	prepare_creds
+EXPORT_SYMBOL vmlinux 0x7a2a837d	strict_strtol
+EXPORT_SYMBOL vmlinux 0x7a311cd4	kernel_bind
+EXPORT_SYMBOL vmlinux 0x7a4497db	kzfree
+EXPORT_SYMBOL vmlinux 0x7a4fb38b	sock_no_getsockopt
+EXPORT_SYMBOL vmlinux 0x7a848702	_read_lock_irqsave
+EXPORT_SYMBOL vmlinux 0x7aaa3085	__dec_zone_page_state
+EXPORT_SYMBOL vmlinux 0x7ae602e3	udp_lib_unhash
+EXPORT_SYMBOL vmlinux 0x7ae73de1	alloc_pages_exact
+EXPORT_SYMBOL vmlinux 0x7aec9089	clear_user
+EXPORT_SYMBOL vmlinux 0x7b0c84c4	acpi_remove_table_handler
+EXPORT_SYMBOL vmlinux 0x7b2b5acc	dquot_destroy
+EXPORT_SYMBOL vmlinux 0x7b342e6f	blk_queue_resize_tags
+EXPORT_SYMBOL vmlinux 0x7b3bf824	copy_strings_kernel
+EXPORT_SYMBOL vmlinux 0x7b460781	skb_queue_purge
+EXPORT_SYMBOL vmlinux 0x7b4dad67	scsi_eh_finish_cmd
+EXPORT_SYMBOL vmlinux 0x7b52a859	wrmsr_safe_on_cpu
+EXPORT_SYMBOL vmlinux 0x7b538e36	set_device_ro
+EXPORT_SYMBOL vmlinux 0x7b56bd05	acpi_lid_notifier_register
+EXPORT_SYMBOL vmlinux 0x7b6ce00f	pnp_activate_dev
+EXPORT_SYMBOL vmlinux 0x7b7fe54c	agp_enable
+EXPORT_SYMBOL vmlinux 0x7b8a5287	deny_write_access
+EXPORT_SYMBOL vmlinux 0x7b8f4c40	key_create_or_update
+EXPORT_SYMBOL vmlinux 0x7ba113ec	vfs_set_dqblk
+EXPORT_SYMBOL vmlinux 0x7bab4675	read_cache_page_async
+EXPORT_SYMBOL vmlinux 0x7bb38a8f	dev_addr_del_multiple
+EXPORT_SYMBOL vmlinux 0x7bb6fcde	ip_defrag
+EXPORT_SYMBOL vmlinux 0x7bb8fc3a	unregister_con_driver
+EXPORT_SYMBOL vmlinux 0x7bc21744	skb_append_datato_frags
+EXPORT_SYMBOL vmlinux 0x7bea32cb	kernel_setsockopt
+EXPORT_SYMBOL vmlinux 0x7bff3be7	iov_iter_advance
+EXPORT_SYMBOL vmlinux 0x7c17c6f1	elv_dispatch_sort
+EXPORT_SYMBOL vmlinux 0x7c1b63bb	skb_unlink
+EXPORT_SYMBOL vmlinux 0x7c1cde82	proc_dointvec_ms_jiffies
+EXPORT_SYMBOL vmlinux 0x7c1dfed8	__page_cache_alloc
+EXPORT_SYMBOL vmlinux 0x7c46233a	cpufreq_quick_get
+EXPORT_SYMBOL vmlinux 0x7c60d66e	getname
+EXPORT_SYMBOL vmlinux 0x7c61340c	__release_region
+EXPORT_SYMBOL vmlinux 0x7c820401	i2c_smbus_write_byte
+EXPORT_SYMBOL vmlinux 0x7c904ded	unregister_module_notifier
+EXPORT_SYMBOL vmlinux 0x7cb1ae69	cpu_down
+EXPORT_SYMBOL vmlinux 0x7cbf7a7a	security_inode_readlink
+EXPORT_SYMBOL vmlinux 0x7ceb77e4	scsicam_bios_param
+EXPORT_SYMBOL vmlinux 0x7cedbb6d	starget_for_each_device
+EXPORT_SYMBOL vmlinux 0x7cf30da6	skb_find_text
+EXPORT_SYMBOL vmlinux 0x7d0d28b8	bio_copy_kern
+EXPORT_SYMBOL vmlinux 0x7d11c268	jiffies
+EXPORT_SYMBOL vmlinux 0x7d207465	deactivate_locked_super
+EXPORT_SYMBOL vmlinux 0x7d4d64f1	cdrom_get_media_event
+EXPORT_SYMBOL vmlinux 0x7d6c7008	mmc_suspend_host
+EXPORT_SYMBOL vmlinux 0x7d6faa1a	block_write_end
+EXPORT_SYMBOL vmlinux 0x7d79a5f2	tcf_exts_validate
+EXPORT_SYMBOL vmlinux 0x7d94f746	acpi_os_write_port
+EXPORT_SYMBOL vmlinux 0x7daf7486	inet_frag_destroy
+EXPORT_SYMBOL vmlinux 0x7dbb15ee	pci_restore_state
+EXPORT_SYMBOL vmlinux 0x7dceceac	capable
+EXPORT_SYMBOL vmlinux 0x7dd1881a	md_wakeup_thread
+EXPORT_SYMBOL vmlinux 0x7dd554fc	unregister_kmmio_probe
+EXPORT_SYMBOL vmlinux 0x7dd89cff	phy_register_fixup_for_id
+EXPORT_SYMBOL vmlinux 0x7dfafffc	per_cpu__softnet_data
+EXPORT_SYMBOL vmlinux 0x7e204359	mdiobus_unregister
+EXPORT_SYMBOL vmlinux 0x7e325dd5	filp_open
+EXPORT_SYMBOL vmlinux 0x7e4bbcd6	nobh_truncate_page
+EXPORT_SYMBOL vmlinux 0x7e7cd0fb	security_inode_notifysecctx
+EXPORT_SYMBOL vmlinux 0x7e9ebb05	kernel_thread
+EXPORT_SYMBOL vmlinux 0x7ec9bfbc	strncpy
+EXPORT_SYMBOL vmlinux 0x7ee91c1d	_spin_trylock
+EXPORT_SYMBOL vmlinux 0x7efdc83d	pci_release_region
+EXPORT_SYMBOL vmlinux 0x7f24de73	jiffies_to_usecs
+EXPORT_SYMBOL vmlinux 0x7f2c7121	bio_clone
+EXPORT_SYMBOL vmlinux 0x7f64abfe	__set_page_dirty_buffers
+EXPORT_SYMBOL vmlinux 0x7f6b2186	dm_table_unplug_all
+EXPORT_SYMBOL vmlinux 0x7f942630	register_md_personality
+EXPORT_SYMBOL vmlinux 0x7fab64b2	phy_attach_direct
+EXPORT_SYMBOL vmlinux 0x7fd6903d	inode_change_ok
+EXPORT_SYMBOL vmlinux 0x801a82d1	mark_buffer_dirty
+EXPORT_SYMBOL vmlinux 0x8068c3ee	generic_permission
+EXPORT_SYMBOL vmlinux 0x806cc33e	__wait_on_buffer
+EXPORT_SYMBOL vmlinux 0x8071d294	pnp_get_resource
+EXPORT_SYMBOL vmlinux 0x8072dbb2	simple_link
+EXPORT_SYMBOL vmlinux 0x80980e39	i2c_smbus_write_i2c_block_data
+EXPORT_SYMBOL vmlinux 0x80b9078e	agp_generic_remove_memory
+EXPORT_SYMBOL vmlinux 0x80d5cff0	per_cpu__irq_regs
+EXPORT_SYMBOL vmlinux 0x80f2eb28	km_state_expired
+EXPORT_SYMBOL vmlinux 0x80fd532f	xfrm_state_add
+EXPORT_SYMBOL vmlinux 0x81251ecb	ilookup5
+EXPORT_SYMBOL vmlinux 0x81390c59	otg_put_transceiver
+EXPORT_SYMBOL vmlinux 0x813b0461	set_irq_chip
+EXPORT_SYMBOL vmlinux 0x8140a3da	bio_alloc
+EXPORT_SYMBOL vmlinux 0x8143f232	journal_get_undo_access
+EXPORT_SYMBOL vmlinux 0x81472677	acpi_get_table
+EXPORT_SYMBOL vmlinux 0x815b5dd4	match_octal
+EXPORT_SYMBOL vmlinux 0x815f2897	empty_zero_page
+EXPORT_SYMBOL vmlinux 0x8166d258	sk_receive_skb
+EXPORT_SYMBOL vmlinux 0x81731082	tcp_v4_md5_hash_skb
+EXPORT_SYMBOL vmlinux 0x81b1124f	add_to_page_cache_locked
+EXPORT_SYMBOL vmlinux 0x81e6b37f	dmi_get_system_info
+EXPORT_SYMBOL vmlinux 0x81f138dd	remap_pfn_range
+EXPORT_SYMBOL vmlinux 0x820d225f	print_mac
+EXPORT_SYMBOL vmlinux 0x820fc63c	vfsmount_lock
+EXPORT_SYMBOL vmlinux 0x82120d1c	pipe_unlock
+EXPORT_SYMBOL vmlinux 0x8212721d	xenbus_dev_request_and_reply
+EXPORT_SYMBOL vmlinux 0x8222c149	bio_alloc_bioset
+EXPORT_SYMBOL vmlinux 0x823d8a44	security_path_rmdir
+EXPORT_SYMBOL vmlinux 0x824767b9	ppp_unregister_channel
+EXPORT_SYMBOL vmlinux 0x824cd281	kernel_connect
+EXPORT_SYMBOL vmlinux 0x8251bcc3	bitmap_release_region
+EXPORT_SYMBOL vmlinux 0x82692209	kref_set
+EXPORT_SYMBOL vmlinux 0x828a9267	blk_make_request
+EXPORT_SYMBOL vmlinux 0x82acfb70	blk_iopoll_sched
+EXPORT_SYMBOL vmlinux 0x82af3b4a	tty_insert_flip_string
+EXPORT_SYMBOL vmlinux 0x82b11262	tty_set_operations
+EXPORT_SYMBOL vmlinux 0x82b43ab7	jbd2_journal_restart
+EXPORT_SYMBOL vmlinux 0x82b5b37d	simple_write_begin
+EXPORT_SYMBOL vmlinux 0x82cad010	sk_run_filter
+EXPORT_SYMBOL vmlinux 0x82d3e07d	gnet_stats_start_copy
+EXPORT_SYMBOL vmlinux 0x82e526e3	register_snap_client
+EXPORT_SYMBOL vmlinux 0x82e9c083	csum_partial_copy_fromiovecend
+EXPORT_SYMBOL vmlinux 0x82f55de6	dev_mc_add
+EXPORT_SYMBOL vmlinux 0x830e547b	ioremap_prot
+EXPORT_SYMBOL vmlinux 0x8311a271	page_symlink_inode_operations
+EXPORT_SYMBOL vmlinux 0x8317e20a	completion_done
+EXPORT_SYMBOL vmlinux 0x83275ba6	dev_addr_del
+EXPORT_SYMBOL vmlinux 0x833f0f4a	qdisc_watchdog_schedule
+EXPORT_SYMBOL vmlinux 0x834257b0	sock_no_ioctl
+EXPORT_SYMBOL vmlinux 0x8374153a	write_one_page
+EXPORT_SYMBOL vmlinux 0x837d10dd	bmap
+EXPORT_SYMBOL vmlinux 0x837fdad2	uart_get_divisor
+EXPORT_SYMBOL vmlinux 0x83811858	__tcp_get_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x83a476ce	bitmap_scnlistprintf
+EXPORT_SYMBOL vmlinux 0x83ab3548	tcp_rcv_established
+EXPORT_SYMBOL vmlinux 0x83ad0131	pci_set_dma_seg_boundary
+EXPORT_SYMBOL vmlinux 0x83c43dc1	posix_acl_chmod_masq
+EXPORT_SYMBOL vmlinux 0x83c4fd75	dev_close
+EXPORT_SYMBOL vmlinux 0x83fbc626	jbd2_journal_set_features
+EXPORT_SYMBOL vmlinux 0x8403c1ed	add_disk
+EXPORT_SYMBOL vmlinux 0x840aca4b	posix_lock_file_wait
+EXPORT_SYMBOL vmlinux 0x841aae2f	alloc_fcdev
+EXPORT_SYMBOL vmlinux 0x8420ed8f	hippi_neigh_setup_dev
+EXPORT_SYMBOL vmlinux 0x84351c57	llc_build_and_send_ui_pkt
+EXPORT_SYMBOL vmlinux 0x8534f0fa	skb_copy_bits
+EXPORT_SYMBOL vmlinux 0x854cd7c2	dm_kcopyd_client_destroy
+EXPORT_SYMBOL vmlinux 0x855ff1e2	scsi_execute
+EXPORT_SYMBOL vmlinux 0x85670f1d	rtnl_is_locked
+EXPORT_SYMBOL vmlinux 0x8582a086	dquot_alloc_space
+EXPORT_SYMBOL vmlinux 0x8582fcbd	read_cache_pages
+EXPORT_SYMBOL vmlinux 0x85a523f6	cont_write_begin
+EXPORT_SYMBOL vmlinux 0x85abc85f	strncmp
+EXPORT_SYMBOL vmlinux 0x85c83ba6	ppp_output_wakeup
+EXPORT_SYMBOL vmlinux 0x85df9b6c	strsep
+EXPORT_SYMBOL vmlinux 0x85e87baa	no_llseek
+EXPORT_SYMBOL vmlinux 0x860359ca	jbd2_journal_get_undo_access
+EXPORT_SYMBOL vmlinux 0x8631f188	radix_tree_tag_set
+EXPORT_SYMBOL vmlinux 0x863b57c6	uart_get_baud_rate
+EXPORT_SYMBOL vmlinux 0x8647b791	lock_rename
+EXPORT_SYMBOL vmlinux 0x865d4a23	serio_open
+EXPORT_SYMBOL vmlinux 0x8664f62e	cpufreq_update_policy
+EXPORT_SYMBOL vmlinux 0x868329b8	tty_unregister_device
+EXPORT_SYMBOL vmlinux 0x868acba5	get_options
+EXPORT_SYMBOL vmlinux 0x8690054f	update_region
+EXPORT_SYMBOL vmlinux 0x86af4751	register_sysctl_paths
+EXPORT_SYMBOL vmlinux 0x86c7146d	vfs_fstat
+EXPORT_SYMBOL vmlinux 0x86db91c6	simple_pin_fs
+EXPORT_SYMBOL vmlinux 0x86e6bc73	swiotlb_dma_supported
+EXPORT_SYMBOL vmlinux 0x86ef8194	serio_unregister_port
+EXPORT_SYMBOL vmlinux 0x86fb9b05	bitmap_parse_user
+EXPORT_SYMBOL vmlinux 0x871c0a7e	fiemap_check_flags
+EXPORT_SYMBOL vmlinux 0x8725b236	thermal_zone_unbind_cooling_device
+EXPORT_SYMBOL vmlinux 0x8733e9a3	sleep_on_timeout
+EXPORT_SYMBOL vmlinux 0x875b1ce0	wireless_spy_update
+EXPORT_SYMBOL vmlinux 0x876a379b	dev_disable_lro
+EXPORT_SYMBOL vmlinux 0x876dafc3	ec_write
+EXPORT_SYMBOL vmlinux 0x877c07e1	ip_route_output_key
+EXPORT_SYMBOL vmlinux 0x878ab3ce	sysctl_tcp_adv_win_scale
+EXPORT_SYMBOL vmlinux 0x8797241f	i2c_transfer
+EXPORT_SYMBOL vmlinux 0x87aaddf8	wrmsr_safe_regs_on_cpu
+EXPORT_SYMBOL vmlinux 0x87b1ff1a	genl_unregister_ops
+EXPORT_SYMBOL vmlinux 0x87e825de	dmam_pool_create
+EXPORT_SYMBOL vmlinux 0x88029aa8	get_agp_version
+EXPORT_SYMBOL vmlinux 0x88044c03	do_truncate
+EXPORT_SYMBOL vmlinux 0x88052cb5	dm_exception_store_type_unregister
+EXPORT_SYMBOL vmlinux 0x881039d0	zlib_inflate
+EXPORT_SYMBOL vmlinux 0x881e1a78	skb_copy_and_csum_bits
+EXPORT_SYMBOL vmlinux 0x8855b661	simple_write_end
+EXPORT_SYMBOL vmlinux 0x886aa274	posix_acl_create_masq
+EXPORT_SYMBOL vmlinux 0x889da329	seq_bitmap_list
+EXPORT_SYMBOL vmlinux 0x88a2e33c	bio_sector_offset
+EXPORT_SYMBOL vmlinux 0x88a8cebb	neigh_connected_output
+EXPORT_SYMBOL vmlinux 0x88c7de6a	unregister_8022_client
+EXPORT_SYMBOL vmlinux 0x88f2f748	read_dev_sector
+EXPORT_SYMBOL vmlinux 0x890353c9	cdev_del
+EXPORT_SYMBOL vmlinux 0x892b26a0	set_memory_nx
+EXPORT_SYMBOL vmlinux 0x897473df	mktime
+EXPORT_SYMBOL vmlinux 0x89949018	down_timeout
+EXPORT_SYMBOL vmlinux 0x89adc8ed	pci_request_selected_regions
+EXPORT_SYMBOL vmlinux 0x89b4827a	netlink_dump_start
+EXPORT_SYMBOL vmlinux 0x89bc2d85	tcp_create_openreq_child
+EXPORT_SYMBOL vmlinux 0x89c3835f	pci_enable_bridges
+EXPORT_SYMBOL vmlinux 0x89d5538d	fb_pad_aligned_buffer
+EXPORT_SYMBOL vmlinux 0x89d66811	build_ehash_secret
+EXPORT_SYMBOL vmlinux 0x8a1203a9	kref_get
+EXPORT_SYMBOL vmlinux 0x8a1d2c1f	dm_table_get_md
+EXPORT_SYMBOL vmlinux 0x8a373fd7	twl4030_i2c_write
+EXPORT_SYMBOL vmlinux 0x8a3eabf0	__wait_on_bit
+EXPORT_SYMBOL vmlinux 0x8a63349d	mpage_readpage
+EXPORT_SYMBOL vmlinux 0x8a707293	acpi_unlock_ac_dir
+EXPORT_SYMBOL vmlinux 0x8a7d1c31	high_memory
+EXPORT_SYMBOL vmlinux 0x8a99a016	mempool_free_slab
+EXPORT_SYMBOL vmlinux 0x8aad6f5f	tty_unregister_driver
+EXPORT_SYMBOL vmlinux 0x8abbdb5b	__devm_request_region
+EXPORT_SYMBOL vmlinux 0x8ac40297	iommu_area_free
+EXPORT_SYMBOL vmlinux 0x8b34b7f6	set_blocksize
+EXPORT_SYMBOL vmlinux 0x8b35e873	sg_last
+EXPORT_SYMBOL vmlinux 0x8b5f4a2e	IO_APIC_get_PCI_irq_vector
+EXPORT_SYMBOL vmlinux 0x8b618d08	overflowuid
+EXPORT_SYMBOL vmlinux 0x8b6cd714	neigh_table_init
+EXPORT_SYMBOL vmlinux 0x8b73ae0b	compat_ip_setsockopt
+EXPORT_SYMBOL vmlinux 0x8b78361b	dquot_reserve_space
+EXPORT_SYMBOL vmlinux 0x8b7fe311	kmemdup
+EXPORT_SYMBOL vmlinux 0x8b87618e	devm_ioport_map
+EXPORT_SYMBOL vmlinux 0x8b922c0f	__strnlen_user
+EXPORT_SYMBOL vmlinux 0x8b989cf9	acpi_bus_can_wakeup
+EXPORT_SYMBOL vmlinux 0x8bacdd06	register_nls
+EXPORT_SYMBOL vmlinux 0x8bc36a94	inode_add_bytes
+EXPORT_SYMBOL vmlinux 0x8bd313b8	__tracepoint_kfree
+EXPORT_SYMBOL vmlinux 0x8bd5b603	param_get_long
+EXPORT_SYMBOL vmlinux 0x8bd90c15	journal_dirty_metadata
+EXPORT_SYMBOL vmlinux 0x8be6d76e	tcp4_gro_receive
+EXPORT_SYMBOL vmlinux 0x8bf508fc	elv_dispatch_add_tail
+EXPORT_SYMBOL vmlinux 0x8c183cbe	iowrite16
+EXPORT_SYMBOL vmlinux 0x8c2bca5b	tcp_proc_register
+EXPORT_SYMBOL vmlinux 0x8c2d1e63	vmtruncate
+EXPORT_SYMBOL vmlinux 0x8c4bc930	iget_locked
+EXPORT_SYMBOL vmlinux 0x8c537c45	posix_acl_from_mode
+EXPORT_SYMBOL vmlinux 0x8c5f5810	bio_integrity_alloc
+EXPORT_SYMBOL vmlinux 0x8c643353	skb_make_writable
+EXPORT_SYMBOL vmlinux 0x8c70347f	filemap_fault
+EXPORT_SYMBOL vmlinux 0x8cc79cab	iowrite16_rep
+EXPORT_SYMBOL vmlinux 0x8cf75bf6	ipv6_push_nfrag_opts
+EXPORT_SYMBOL vmlinux 0x8d0fe0ce	ip_mc_join_group
+EXPORT_SYMBOL vmlinux 0x8d3894f2	_ctype
+EXPORT_SYMBOL vmlinux 0x8d3e8bab	balance_dirty_pages_ratelimited_nr
+EXPORT_SYMBOL vmlinux 0x8d442799	mdiobus_free
+EXPORT_SYMBOL vmlinux 0x8d551bef	sysctl_tcp_rmem
+EXPORT_SYMBOL vmlinux 0x8d5bef2a	bdget_disk
+EXPORT_SYMBOL vmlinux 0x8d6906d4	unregister_memory_notifier
+EXPORT_SYMBOL vmlinux 0x8d8d96c6	acpi_get_sleep_type_data
+EXPORT_SYMBOL vmlinux 0x8da3c09c	tcf_exts_destroy
+EXPORT_SYMBOL vmlinux 0x8dc79fad	generic_cont_expand_simple
+EXPORT_SYMBOL vmlinux 0x8dca832f	__percpu_counter_sum
+EXPORT_SYMBOL vmlinux 0x8dd2469b	check_disk_size_change
+EXPORT_SYMBOL vmlinux 0x8e002cda	acpi_remove_gpe_block
+EXPORT_SYMBOL vmlinux 0x8e0637ba	i8253_lock
+EXPORT_SYMBOL vmlinux 0x8e0b7743	ipv6_ext_hdr
+EXPORT_SYMBOL vmlinux 0x8e157d97	blk_start_request
+EXPORT_SYMBOL vmlinux 0x8e371aa5	inet_csk_accept
+EXPORT_SYMBOL vmlinux 0x8e38903c	pci_set_power_state
+EXPORT_SYMBOL vmlinux 0x8e3c9cc3	vprintk
+EXPORT_SYMBOL vmlinux 0x8e57e141	fddi_change_mtu
+EXPORT_SYMBOL vmlinux 0x8e592377	blk_queue_update_dma_alignment
+EXPORT_SYMBOL vmlinux 0x8e763ae1	send_remote_softirq
+EXPORT_SYMBOL vmlinux 0x8ec1a23c	override_creds
+EXPORT_SYMBOL vmlinux 0x8ec769fe	alloc_disk_node
+EXPORT_SYMBOL vmlinux 0x8ee69235	timeval_to_jiffies
+EXPORT_SYMBOL vmlinux 0x8ee9995d	sock_i_uid
+EXPORT_SYMBOL vmlinux 0x8f191d6d	log_start_commit
+EXPORT_SYMBOL vmlinux 0x8f2703b7	wbinvd_on_all_cpus
+EXPORT_SYMBOL vmlinux 0x8f48679a	rb_prev
+EXPORT_SYMBOL vmlinux 0x8f6b7950	set_irq_data
+EXPORT_SYMBOL vmlinux 0x8f6c05b6	filemap_fdatawrite_range
+EXPORT_SYMBOL vmlinux 0x8f75d141	ip6_xmit
+EXPORT_SYMBOL vmlinux 0x8f9c199c	__get_user_2
+EXPORT_SYMBOL vmlinux 0x8f9d3d34	sock_no_setsockopt
+EXPORT_SYMBOL vmlinux 0x8fc85e44	inet_ioctl
+EXPORT_SYMBOL vmlinux 0x8fc9d840	generic_write_end
+EXPORT_SYMBOL vmlinux 0x8fcf8ea6	security_sb_clone_mnt_opts
+EXPORT_SYMBOL vmlinux 0x8fda3f1f	jbd2_journal_start_commit
+EXPORT_SYMBOL vmlinux 0x8fe8ad1a	rwsem_downgrade_wake
+EXPORT_SYMBOL vmlinux 0x8ff937c9	init_buffer
+EXPORT_SYMBOL vmlinux 0x90035333	secure_tcpv6_sequence_number
+EXPORT_SYMBOL vmlinux 0x9025db0b	scsi_prep_return
+EXPORT_SYMBOL vmlinux 0x903a300f	sk_dst_check
+EXPORT_SYMBOL vmlinux 0x9043df17	bio_pair_release
+EXPORT_SYMBOL vmlinux 0x904409c6	acpi_set_firmware_waking_vector
+EXPORT_SYMBOL vmlinux 0x908d2f9e	rfkill_set_states
+EXPORT_SYMBOL vmlinux 0x908fd708	dm_put_device
+EXPORT_SYMBOL vmlinux 0x90a12997	vfs_rmdir
+EXPORT_SYMBOL vmlinux 0x90a1601f	dmi_check_system
+EXPORT_SYMBOL vmlinux 0x90a21c70	do_SAK
+EXPORT_SYMBOL vmlinux 0x90a30754	pagecache_write_begin
+EXPORT_SYMBOL vmlinux 0x90bc8cf0	skb_insert
+EXPORT_SYMBOL vmlinux 0x90c9d5c8	jbd2_journal_forget
+EXPORT_SYMBOL vmlinux 0x90ee2f27	fb_get_buffer_offset
+EXPORT_SYMBOL vmlinux 0x90f0c03b	request_key_async_with_auxdata
+EXPORT_SYMBOL vmlinux 0x910d852c	blk_rq_count_integrity_sg
+EXPORT_SYMBOL vmlinux 0x912a63e5	swiotlb_alloc_coherent
+EXPORT_SYMBOL vmlinux 0x9144a8e2	ec_burst_disable
+EXPORT_SYMBOL vmlinux 0x91481982	__ratelimit
+EXPORT_SYMBOL vmlinux 0x91607d95	set_memory_wb
+EXPORT_SYMBOL vmlinux 0x9172ab3a	inet_bind
+EXPORT_SYMBOL vmlinux 0x9173b015	uart_register_driver
+EXPORT_SYMBOL vmlinux 0x91766c09	param_get_ulong
+EXPORT_SYMBOL vmlinux 0x917a8872	fifo_create_dflt
+EXPORT_SYMBOL vmlinux 0x9184c095	__alloc_skb
+EXPORT_SYMBOL vmlinux 0x9198f6a7	ilookup
+EXPORT_SYMBOL vmlinux 0x91a2c915	simple_sync_file
+EXPORT_SYMBOL vmlinux 0x91c013b4	bdev_read_only
+EXPORT_SYMBOL vmlinux 0x91c39ca4	page_put_link
+EXPORT_SYMBOL vmlinux 0x91f53df8	compat_nf_getsockopt
+EXPORT_SYMBOL vmlinux 0x9214ed8a	param_get_bool
+EXPORT_SYMBOL vmlinux 0x922b64f7	alloc_hippi_dev
+EXPORT_SYMBOL vmlinux 0x92392cd9	iov_shorten
+EXPORT_SYMBOL vmlinux 0x923b1276	dmaengine_get
+EXPORT_SYMBOL vmlinux 0x923d4df2	dm_kcopyd_copy
+EXPORT_SYMBOL vmlinux 0x92728cd3	dma_async_memcpy_buf_to_pg
+EXPORT_SYMBOL vmlinux 0x927e989f	gen_pool_alloc
+EXPORT_SYMBOL vmlinux 0x92b86f91	ip6_frag_init
+EXPORT_SYMBOL vmlinux 0x92c2aca3	unlock_page
+EXPORT_SYMBOL vmlinux 0x92d2b47d	blk_queue_bounce
+EXPORT_SYMBOL vmlinux 0x92ea4ae4	crc32_le
+EXPORT_SYMBOL vmlinux 0x92eb1702	ip_route_me_harder
+EXPORT_SYMBOL vmlinux 0x92ee4257	ethtool_op_get_sg
+EXPORT_SYMBOL vmlinux 0x92f7bf35	tty_vhangup
+EXPORT_SYMBOL vmlinux 0x93040228	xfrm_policy_bysel_ctx
+EXPORT_SYMBOL vmlinux 0x9305f8e6	cpufreq_get
+EXPORT_SYMBOL vmlinux 0x93223288	mark_buffer_dirty_inode
+EXPORT_SYMBOL vmlinux 0x9331aa8f	dm_dirty_log_type_unregister
+EXPORT_SYMBOL vmlinux 0x933231fc	generic_file_aio_read
+EXPORT_SYMBOL vmlinux 0x934ba8e8	block_write_full_page
+EXPORT_SYMBOL vmlinux 0x93647179	proc_mkdir
+EXPORT_SYMBOL vmlinux 0x937735ba	jbd2_journal_get_write_access
+EXPORT_SYMBOL vmlinux 0x93796757	mutex_lock
+EXPORT_SYMBOL vmlinux 0x9382a13f	tcp_md5_hash_skb_data
+EXPORT_SYMBOL vmlinux 0x9385667d	down_read_trylock
+EXPORT_SYMBOL vmlinux 0x938f66d2	tty_pair_get_tty
+EXPORT_SYMBOL vmlinux 0x93a6e0b2	io_schedule
+EXPORT_SYMBOL vmlinux 0x93a95bed	clear_bdi_congested
+EXPORT_SYMBOL vmlinux 0x93c651be	acpi_info
+EXPORT_SYMBOL vmlinux 0x93cbd1ec	_spin_lock_bh
+EXPORT_SYMBOL vmlinux 0x93f2d0bd	bio_integrity_trim
+EXPORT_SYMBOL vmlinux 0x93fca811	__get_free_pages
+EXPORT_SYMBOL vmlinux 0x9438a28b	qdisc_tree_decrease_qlen
+EXPORT_SYMBOL vmlinux 0x943e868f	ida_get_new
+EXPORT_SYMBOL vmlinux 0x94428de9	open_exec
+EXPORT_SYMBOL vmlinux 0x9442c4fe	agp_generic_enable
+EXPORT_SYMBOL vmlinux 0x944832d6	ftrace_print_symbols_seq
+EXPORT_SYMBOL vmlinux 0x944e9697	blk_integrity_unregister
+EXPORT_SYMBOL vmlinux 0x945bc6a7	copy_from_user
+EXPORT_SYMBOL vmlinux 0x945cfcef	vm_insert_mixed
+EXPORT_SYMBOL vmlinux 0x94847b23	nf_ct_destroy
+EXPORT_SYMBOL vmlinux 0x94961283	vunmap
+EXPORT_SYMBOL vmlinux 0x94a44cc1	registered_fb
+EXPORT_SYMBOL vmlinux 0x94d9edbe	scsi_host_get
+EXPORT_SYMBOL vmlinux 0x94de54b9	kill_fasync
+EXPORT_SYMBOL vmlinux 0x95013060	sk_stream_error
+EXPORT_SYMBOL vmlinux 0x9532269c	mnt_pin
+EXPORT_SYMBOL vmlinux 0x95352ea9	acpi_check_mem_region
+EXPORT_SYMBOL vmlinux 0x954488a4	syncookie_secret
+EXPORT_SYMBOL vmlinux 0x954cbb26	vsprintf
+EXPORT_SYMBOL vmlinux 0x955892a6	tty_pair_get_pty
+EXPORT_SYMBOL vmlinux 0x95ac3b9e	__dev_getfirstbyhwtype
+EXPORT_SYMBOL vmlinux 0x95ceb864	key_update
+EXPORT_SYMBOL vmlinux 0x95ebd84b	mb_cache_entry_find_first
+EXPORT_SYMBOL vmlinux 0x9629486a	per_cpu__cpu_number
+EXPORT_SYMBOL vmlinux 0x966b2db5	d_find_alias
+EXPORT_SYMBOL vmlinux 0x9671b219	elevator_init
+EXPORT_SYMBOL vmlinux 0x96739b8d	journal_load
+EXPORT_SYMBOL vmlinux 0x96b0d797	bdevname
+EXPORT_SYMBOL vmlinux 0x96b809b7	bitmap_startwrite
+EXPORT_SYMBOL vmlinux 0x96cd2b04	scsi_sense_key_string
+EXPORT_SYMBOL vmlinux 0x96f71d43	__inet6_hash
+EXPORT_SYMBOL vmlinux 0x9710c39f	blk_stack_limits
+EXPORT_SYMBOL vmlinux 0x973873ab	_spin_lock
+EXPORT_SYMBOL vmlinux 0x97518d35	blk_register_region
+EXPORT_SYMBOL vmlinux 0x9754ec10	radix_tree_preload
+EXPORT_SYMBOL vmlinux 0x97cc57cd	__blk_end_request_all
+EXPORT_SYMBOL vmlinux 0x97de0ddd	acpi_install_gpe_block
+EXPORT_SYMBOL vmlinux 0x97ff7423	ether_setup
+EXPORT_SYMBOL vmlinux 0x98383b3b	blk_requeue_request
+EXPORT_SYMBOL vmlinux 0x986e6135	fb_pad_unaligned_buffer
+EXPORT_SYMBOL vmlinux 0x988b3d39	sock_no_connect
+EXPORT_SYMBOL vmlinux 0x988ed85d	set_memory_x
+EXPORT_SYMBOL vmlinux 0x9898ff06	acpi_bus_get_status
+EXPORT_SYMBOL vmlinux 0x98ba3b81	tcf_hash_new_index
+EXPORT_SYMBOL vmlinux 0x98e5cb40	pci_get_class
+EXPORT_SYMBOL vmlinux 0x98e73bb7	ps2_drain
+EXPORT_SYMBOL vmlinux 0x98f457e8	blk_rq_map_user
+EXPORT_SYMBOL vmlinux 0x98fa0611	unregister_nls
+EXPORT_SYMBOL vmlinux 0x990780d1	unregister_console
+EXPORT_SYMBOL vmlinux 0x995879ef	xfrm_policy_register_afinfo
+EXPORT_SYMBOL vmlinux 0x998104d1	scsi_report_device_reset
+EXPORT_SYMBOL vmlinux 0x9994c0ca	ps2_is_keyboard_id
+EXPORT_SYMBOL vmlinux 0x999e8297	vfree
+EXPORT_SYMBOL vmlinux 0x99b1f2ec	rtnetlink_put_metrics
+EXPORT_SYMBOL vmlinux 0x99b9d023	pid_task
+EXPORT_SYMBOL vmlinux 0x99bfbe39	get_unused_fd
+EXPORT_SYMBOL vmlinux 0x99c74ba6	call_usermodehelper_exec
+EXPORT_SYMBOL vmlinux 0x99c7a8b8	jbd2_dev_to_name
+EXPORT_SYMBOL vmlinux 0x99cdc86b	sysctl_tcp_reordering
+EXPORT_SYMBOL vmlinux 0x99e225a2	bio_integrity_add_page
+EXPORT_SYMBOL vmlinux 0x99ea12ce	panic_blink
+EXPORT_SYMBOL vmlinux 0x9a1dfd65	strpbrk
+EXPORT_SYMBOL vmlinux 0x9a3bb102	scsi_print_command
+EXPORT_SYMBOL vmlinux 0x9a411deb	fb_set_cmap
+EXPORT_SYMBOL vmlinux 0x9a6e453f	nf_hook_slow
+EXPORT_SYMBOL vmlinux 0x9a8b1125	mmc_power_restore_host
+EXPORT_SYMBOL vmlinux 0x9a9985be	percpu_counter_destroy
+EXPORT_SYMBOL vmlinux 0x9aabc564	crc16
+EXPORT_SYMBOL vmlinux 0x9ad3c607	skb_seq_read
+EXPORT_SYMBOL vmlinux 0x9ad590bf	napi_get_frags
+EXPORT_SYMBOL vmlinux 0x9b10792c	journal_lock_updates
+EXPORT_SYMBOL vmlinux 0x9b2fc920	proto_unregister
+EXPORT_SYMBOL vmlinux 0x9b388444	get_zeroed_page
+EXPORT_SYMBOL vmlinux 0x9b77a0cd	tty_flip_buffer_push
+EXPORT_SYMBOL vmlinux 0x9ba7089d	argv_split
+EXPORT_SYMBOL vmlinux 0x9bcf9d05	splice_from_pipe_feed
+EXPORT_SYMBOL vmlinux 0x9bd968b5	udp_poll
+EXPORT_SYMBOL vmlinux 0x9bf1383e	skb_append
+EXPORT_SYMBOL vmlinux 0x9c012508	fb_parse_edid
+EXPORT_SYMBOL vmlinux 0x9c0ea3cd	memscan
+EXPORT_SYMBOL vmlinux 0x9c48e25e	iunique
+EXPORT_SYMBOL vmlinux 0x9c491f60	sg_alloc_table
+EXPORT_SYMBOL vmlinux 0x9c71e738	per_cpu__vm_event_states
+EXPORT_SYMBOL vmlinux 0x9c74c4b2	acpi_get_hp_hw_control_from_firmware
+EXPORT_SYMBOL vmlinux 0x9c933dcb	tcp_shutdown
+EXPORT_SYMBOL vmlinux 0x9c946d2f	jbd2_journal_blocks_per_page
+EXPORT_SYMBOL vmlinux 0x9ca37eba	kthread_create
+EXPORT_SYMBOL vmlinux 0x9ca95a0e	sort
+EXPORT_SYMBOL vmlinux 0x9caa8365	scsi_is_host_device
+EXPORT_SYMBOL vmlinux 0x9cac90ff	spi_display_xfer_agreement
+EXPORT_SYMBOL vmlinux 0x9caf02ed	put_io_context
+EXPORT_SYMBOL vmlinux 0x9cb96e92	qdisc_put_rtab
+EXPORT_SYMBOL vmlinux 0x9ccb2622	finish_wait
+EXPORT_SYMBOL vmlinux 0x9ced38aa	down_trylock
+EXPORT_SYMBOL vmlinux 0x9cfd56c5	scsi_print_status
+EXPORT_SYMBOL vmlinux 0x9d00d3c3	pci_scan_slot
+EXPORT_SYMBOL vmlinux 0x9d09a4fb	address_space_init_once
+EXPORT_SYMBOL vmlinux 0x9d2bb421	invalidate_inodes
+EXPORT_SYMBOL vmlinux 0x9d33ef5e	acpi_enable
+EXPORT_SYMBOL vmlinux 0x9d3aa376	blk_iopoll_init
+EXPORT_SYMBOL vmlinux 0x9d3ab3c0	kmem_cache_alloc
+EXPORT_SYMBOL vmlinux 0x9d85c068	commit_creds
+EXPORT_SYMBOL vmlinux 0x9db123b4	serio_interrupt
+EXPORT_SYMBOL vmlinux 0x9db21624	hex_dump_to_buffer
+EXPORT_SYMBOL vmlinux 0x9dcf93c8	arp_xmit
+EXPORT_SYMBOL vmlinux 0x9de14b6b	llc_sap_open
+EXPORT_SYMBOL vmlinux 0x9e0fd067	d_lookup
+EXPORT_SYMBOL vmlinux 0x9e2ab2b6	mb_cache_shrink
+EXPORT_SYMBOL vmlinux 0x9e363b6b	acpi_disable_gpe
+EXPORT_SYMBOL vmlinux 0x9e64fbfe	rtc_cmos_read
+EXPORT_SYMBOL vmlinux 0x9e7d6bd0	__udelay
+EXPORT_SYMBOL vmlinux 0x9e837330	kill_block_super
+EXPORT_SYMBOL vmlinux 0x9e94f913	__napi_complete
+EXPORT_SYMBOL vmlinux 0x9e9f1714	__bitmap_andnot
+EXPORT_SYMBOL vmlinux 0x9ea0ad49	__sg_free_table
+EXPORT_SYMBOL vmlinux 0x9ea28ec7	acpi_evaluate_object
+EXPORT_SYMBOL vmlinux 0x9ea3672b	pci_enable_wake
+EXPORT_SYMBOL vmlinux 0x9ebd4c04	adjust_resource
+EXPORT_SYMBOL vmlinux 0x9ebea3a5	xfrm_policy_unregister_afinfo
+EXPORT_SYMBOL vmlinux 0x9ed27bdd	pci_release_selected_regions
+EXPORT_SYMBOL vmlinux 0x9edbecae	snprintf
+EXPORT_SYMBOL vmlinux 0x9ee22602	ip_ct_attach
+EXPORT_SYMBOL vmlinux 0x9ee6cea2	register_exec_domain
+EXPORT_SYMBOL vmlinux 0x9eecde16	do_brk
+EXPORT_SYMBOL vmlinux 0x9f06d786	block_write_begin
+EXPORT_SYMBOL vmlinux 0x9f07346e	bioset_integrity_free
+EXPORT_SYMBOL vmlinux 0x9f100139	jiffies_to_clock_t
+EXPORT_SYMBOL vmlinux 0x9f1a8fbf	skb_under_panic
+EXPORT_SYMBOL vmlinux 0x9f235d7e	ps2_init
+EXPORT_SYMBOL vmlinux 0x9f2bdaac	__bitmap_or
+EXPORT_SYMBOL vmlinux 0x9f2d613e	param_set_bool
+EXPORT_SYMBOL vmlinux 0x9f424093	free_user_ns
+EXPORT_SYMBOL vmlinux 0x9f504c21	inet_sk_rebuild_header
+EXPORT_SYMBOL vmlinux 0x9f56547a	register_tcf_proto_ops
+EXPORT_SYMBOL vmlinux 0x9f6cb336	blk_queue_max_discard_sectors
+EXPORT_SYMBOL vmlinux 0x9f723159	__elv_add_request
+EXPORT_SYMBOL vmlinux 0x9f81e1fc	__blk_end_request
+EXPORT_SYMBOL vmlinux 0x9f92efc4	mmiotrace_printk
+EXPORT_SYMBOL vmlinux 0x9f984513	strrchr
+EXPORT_SYMBOL vmlinux 0x9fa274b4	dq_data_lock
+EXPORT_SYMBOL vmlinux 0x9fd6ece9	__napi_schedule
+EXPORT_SYMBOL vmlinux 0x9ffc9fd5	blk_run_queue
+EXPORT_SYMBOL vmlinux 0xa009f018	d_instantiate
+EXPORT_SYMBOL vmlinux 0xa012b7bc	jbd2_journal_update_format
+EXPORT_SYMBOL vmlinux 0xa01fb2f2	tty_port_alloc_xmit_buf
+EXPORT_SYMBOL vmlinux 0xa0226b81	pci_bus_set_ops
+EXPORT_SYMBOL vmlinux 0xa03523d5	security_unix_stream_connect
+EXPORT_SYMBOL vmlinux 0xa0440d0b	tcp_init_xmit_timers
+EXPORT_SYMBOL vmlinux 0xa04a01bd	qdisc_class_hash_insert
+EXPORT_SYMBOL vmlinux 0xa04f3b65	bio_integrity_alloc_bioset
+EXPORT_SYMBOL vmlinux 0xa05c03df	mempool_kmalloc
+EXPORT_SYMBOL vmlinux 0xa0603367	pci_enable_device_io
+EXPORT_SYMBOL vmlinux 0xa0799345	iget_failed
+EXPORT_SYMBOL vmlinux 0xa07b32b1	secpath_dup
+EXPORT_SYMBOL vmlinux 0xa09b53e6	pcix_get_mmrbc
+EXPORT_SYMBOL vmlinux 0xa0a4ac21	tcf_hash_insert
+EXPORT_SYMBOL vmlinux 0xa0b04675	vmalloc_32
+EXPORT_SYMBOL vmlinux 0xa0b9aa95	agp_generic_mask_memory
+EXPORT_SYMBOL vmlinux 0xa0c36e83	is_bad_inode
+EXPORT_SYMBOL vmlinux 0xa0c8ddb9	pcim_enable_device
+EXPORT_SYMBOL vmlinux 0xa0ceef51	out_of_line_wait_on_bit
+EXPORT_SYMBOL vmlinux 0xa0d3d560	ksize
+EXPORT_SYMBOL vmlinux 0xa0f8a57c	blk_queue_softirq_done
+EXPORT_SYMBOL vmlinux 0xa0fbac79	wake_up_bit
+EXPORT_SYMBOL vmlinux 0xa108eb4d	sysctl_optmem_max
+EXPORT_SYMBOL vmlinux 0xa1109501	sock_no_bind
+EXPORT_SYMBOL vmlinux 0xa120d33c	tty_unregister_ldisc
+EXPORT_SYMBOL vmlinux 0xa13798f8	printk_ratelimit
+EXPORT_SYMBOL vmlinux 0xa141ea66	sock_create_kern
+EXPORT_SYMBOL vmlinux 0xa172a0b5	sk_stream_write_space
+EXPORT_SYMBOL vmlinux 0xa1812524	journal_extend
+EXPORT_SYMBOL vmlinux 0xa1b759ce	fb_add_videomode
+EXPORT_SYMBOL vmlinux 0xa1ba4b95	memcpy_fromiovecend
+EXPORT_SYMBOL vmlinux 0xa1c76e0a	_cond_resched
+EXPORT_SYMBOL vmlinux 0xa1cea0b8	proc_dointvec
+EXPORT_SYMBOL vmlinux 0xa1d14db2	vfs_writev
+EXPORT_SYMBOL vmlinux 0xa1e5ece6	phy_sanitize_settings
+EXPORT_SYMBOL vmlinux 0xa1e62dc4	iov_iter_copy_from_user
+EXPORT_SYMBOL vmlinux 0xa20ce1b8	net_msg_warn
+EXPORT_SYMBOL vmlinux 0xa259f5e8	tcf_em_tree_destroy
+EXPORT_SYMBOL vmlinux 0xa2801b23	scsi_target_resume
+EXPORT_SYMBOL vmlinux 0xa28e76e6	schedule_work
+EXPORT_SYMBOL vmlinux 0xa29b1708	tcp_memory_allocated
+EXPORT_SYMBOL vmlinux 0xa2a1e5c9	_write_lock_bh
+EXPORT_SYMBOL vmlinux 0xa2a5fd77	inet_ehash_secret
+EXPORT_SYMBOL vmlinux 0xa2b8a2ba	__init_rwsem
+EXPORT_SYMBOL vmlinux 0xa2bc60ee	set_anon_super
+EXPORT_SYMBOL vmlinux 0xa2d1e2f7	scsi_free_host_dev
+EXPORT_SYMBOL vmlinux 0xa2dac6f4	mmc_host_disable
+EXPORT_SYMBOL vmlinux 0xa307699c	file_update_time
+EXPORT_SYMBOL vmlinux 0xa307c25c	handle_sysrq
+EXPORT_SYMBOL vmlinux 0xa31f172d	__copy_from_user_inatomic
+EXPORT_SYMBOL vmlinux 0xa31f38c4	jbd2_journal_lock_updates
+EXPORT_SYMBOL vmlinux 0xa329f07e	register_shrinker
+EXPORT_SYMBOL vmlinux 0xa332cdd1	security_tun_dev_attach
+EXPORT_SYMBOL vmlinux 0xa33f7c7c	nla_strlcpy
+EXPORT_SYMBOL vmlinux 0xa34c57da	mb_cache_entry_release
+EXPORT_SYMBOL vmlinux 0xa350a8f8	set_memory_array_uc
+EXPORT_SYMBOL vmlinux 0xa35ba8e0	ht_create_irq
+EXPORT_SYMBOL vmlinux 0xa35de80f	ipv4_config
+EXPORT_SYMBOL vmlinux 0xa36f09ee	install_exec_creds
+EXPORT_SYMBOL vmlinux 0xa370ccde	__nla_reserve
+EXPORT_SYMBOL vmlinux 0xa3922aa9	dmam_pool_destroy
+EXPORT_SYMBOL vmlinux 0xa399d5aa	xfrm_register_km
+EXPORT_SYMBOL vmlinux 0xa3a043f8	xfrm_find_acq
+EXPORT_SYMBOL vmlinux 0xa3a5be95	memmove
+EXPORT_SYMBOL vmlinux 0xa3bbcd80	acpi_set_gpe_type
+EXPORT_SYMBOL vmlinux 0xa3e72343	filp_close
+EXPORT_SYMBOL vmlinux 0xa415b384	try_to_del_timer_sync
+EXPORT_SYMBOL vmlinux 0xa421a52e	generic_file_splice_write
+EXPORT_SYMBOL vmlinux 0xa42c3d72	__inc_zone_page_state
+EXPORT_SYMBOL vmlinux 0xa44ad274	wait_for_completion_interruptible_timeout
+EXPORT_SYMBOL vmlinux 0xa47ffd5b	simple_release_fs
+EXPORT_SYMBOL vmlinux 0xa48ffd73	fb_find_mode
+EXPORT_SYMBOL vmlinux 0xa49a5aef	tty_schedule_flip
+EXPORT_SYMBOL vmlinux 0xa4b94fea	iowrite8_rep
+EXPORT_SYMBOL vmlinux 0xa4d4f0e6	global_cache_flush
+EXPORT_SYMBOL vmlinux 0xa4f46b81	poll_freewait
+EXPORT_SYMBOL vmlinux 0xa530fcb5	ip4_datagram_connect
+EXPORT_SYMBOL vmlinux 0xa56c0c46	inet6_bind
+EXPORT_SYMBOL vmlinux 0xa56f1315	mempool_free
+EXPORT_SYMBOL vmlinux 0xa57850b3	key_payload_reserve
+EXPORT_SYMBOL vmlinux 0xa58060bf	do_munmap
+EXPORT_SYMBOL vmlinux 0xa5808bbf	tasklet_init
+EXPORT_SYMBOL vmlinux 0xa58b6804	nla_parse
+EXPORT_SYMBOL vmlinux 0xa5922bb1	kfifo_init
+EXPORT_SYMBOL vmlinux 0xa598e29c	vesa_modes
+EXPORT_SYMBOL vmlinux 0xa59b0712	journal_start_commit
+EXPORT_SYMBOL vmlinux 0xa5adbe8c	ida_destroy
+EXPORT_SYMBOL vmlinux 0xa5d42d1c	netif_napi_add
+EXPORT_SYMBOL vmlinux 0xa5df9415	dst_alloc
+EXPORT_SYMBOL vmlinux 0xa5e4f65c	__next_cpu_nr
+EXPORT_SYMBOL vmlinux 0xa600a42d	compat_sock_get_timestampns
+EXPORT_SYMBOL vmlinux 0xa617e17f	inet_csk_delete_keepalive_timer
+EXPORT_SYMBOL vmlinux 0xa63d85ab	slhc_remember
+EXPORT_SYMBOL vmlinux 0xa640559b	vfs_mkdir
+EXPORT_SYMBOL vmlinux 0xa64f7ae2	ip_getsockopt
+EXPORT_SYMBOL vmlinux 0xa66913e3	kernel_getsockname
+EXPORT_SYMBOL vmlinux 0xa679bbbd	simple_rmdir
+EXPORT_SYMBOL vmlinux 0xa68124fa	hweight8
+EXPORT_SYMBOL vmlinux 0xa681fe88	generate_random_uuid
+EXPORT_SYMBOL vmlinux 0xa6853aa1	sock_rfree
+EXPORT_SYMBOL vmlinux 0xa6a41e4b	dm_dirty_log_destroy
+EXPORT_SYMBOL vmlinux 0xa6ab9733	inet_csk_reset_keepalive_timer
+EXPORT_SYMBOL vmlinux 0xa6dcc773	rb_insert_color
+EXPORT_SYMBOL vmlinux 0xa6e0eecf	pci_lost_interrupt
+EXPORT_SYMBOL vmlinux 0xa6e24754	inet_accept
+EXPORT_SYMBOL vmlinux 0xa70913e8	textsearch_find_continuous
+EXPORT_SYMBOL vmlinux 0xa70fabbe	release_evntsel_nmi
+EXPORT_SYMBOL vmlinux 0xa71be657	mmc_alloc_host
+EXPORT_SYMBOL vmlinux 0xa72a0f5b	nr_online_nodes
+EXPORT_SYMBOL vmlinux 0xa75994b8	napi_complete
+EXPORT_SYMBOL vmlinux 0xa76faeea	get_sb_bdev
+EXPORT_SYMBOL vmlinux 0xa7924002	igrab
+EXPORT_SYMBOL vmlinux 0xa79645cd	netlink_kernel_create
+EXPORT_SYMBOL vmlinux 0xa79e3097	zero_fill_bio
+EXPORT_SYMBOL vmlinux 0xa7b3e289	rtnl_set_sk_err
+EXPORT_SYMBOL vmlinux 0xa7b54e0c	tcp_gro_complete
+EXPORT_SYMBOL vmlinux 0xa7c62946	tcp_sendmsg
+EXPORT_SYMBOL vmlinux 0xa811a87c	vfs_write
+EXPORT_SYMBOL vmlinux 0xa831f63a	cfb_copyarea
+EXPORT_SYMBOL vmlinux 0xa852e03f	xfrm_init_state
+EXPORT_SYMBOL vmlinux 0xa8700f2f	scsi_allocate_command
+EXPORT_SYMBOL vmlinux 0xa87b9f64	get_phy_id
+EXPORT_SYMBOL vmlinux 0xa87dba0e	simple_getattr
+EXPORT_SYMBOL vmlinux 0xa886a958	krealloc
+EXPORT_SYMBOL vmlinux 0xa8a6f639	__check_region
+EXPORT_SYMBOL vmlinux 0xa8d255f5	setup_arg_pages
+EXPORT_SYMBOL vmlinux 0xa8d68abd	acpi_warning
+EXPORT_SYMBOL vmlinux 0xa8e594fb	ppp_input_error
+EXPORT_SYMBOL vmlinux 0xa8eb9b92	destroy_EII_client
+EXPORT_SYMBOL vmlinux 0xa8fbf582	idr_replace
+EXPORT_SYMBOL vmlinux 0xa8fef7bb	security_unix_may_send
+EXPORT_SYMBOL vmlinux 0xa8ffa664	__register_chrdev
+EXPORT_SYMBOL vmlinux 0xa9123b81	pci_bus_read_config_word
+EXPORT_SYMBOL vmlinux 0xa91b5561	acpi_video_backlight_support
+EXPORT_SYMBOL vmlinux 0xa91ceed2	xfrm_policy_destroy
+EXPORT_SYMBOL vmlinux 0xa93961a3	md_set_array_sectors
+EXPORT_SYMBOL vmlinux 0xa95a1f92	neigh_compat_output
+EXPORT_SYMBOL vmlinux 0xa9bd2676	__vmalloc
+EXPORT_SYMBOL vmlinux 0xa9d72920	slow_work_unregister_user
+EXPORT_SYMBOL vmlinux 0xa9f45f73	dm_kcopyd_client_create
+EXPORT_SYMBOL vmlinux 0xa9fcf31d	wait_for_completion_interruptible
+EXPORT_SYMBOL vmlinux 0xaa0406af	tty_wait_until_sent
+EXPORT_SYMBOL vmlinux 0xaa18656e	bio_phys_segments
+EXPORT_SYMBOL vmlinux 0xaa2e82d8	find_get_pages_tag
+EXPORT_SYMBOL vmlinux 0xaa511a15	freeze_bdev
+EXPORT_SYMBOL vmlinux 0xaa5ff91b	dm_io_client_resize
+EXPORT_SYMBOL vmlinux 0xaa654d7b	input_flush_device
+EXPORT_SYMBOL vmlinux 0xaa84a8ae	acpi_processor_power_init_bm_check
+EXPORT_SYMBOL vmlinux 0xaa85fe22	unregister_binfmt
+EXPORT_SYMBOL vmlinux 0xaa8a30ba	inet_sock_destruct
+EXPORT_SYMBOL vmlinux 0xaa93e339	__blk_end_request_cur
+EXPORT_SYMBOL vmlinux 0xaaa85311	jbd2_journal_force_commit
+EXPORT_SYMBOL vmlinux 0xaab06af8	_write_lock_irqsave
+EXPORT_SYMBOL vmlinux 0xaad82bb7	xfrm_find_acq_byseq
+EXPORT_SYMBOL vmlinux 0xaada4bf5	tcp_md5_hash_key
+EXPORT_SYMBOL vmlinux 0xaae8ab0e	acpi_bus_power_manageable
+EXPORT_SYMBOL vmlinux 0xaaeae669	tcf_em_tree_dump
+EXPORT_SYMBOL vmlinux 0xaaf45875	acpi_lid_notifier_unregister
+EXPORT_SYMBOL vmlinux 0xaafdc258	strcasecmp
+EXPORT_SYMBOL vmlinux 0xab0cd5c4	scsi_remove_device
+EXPORT_SYMBOL vmlinux 0xab13517f	ps2_handle_response
+EXPORT_SYMBOL vmlinux 0xab1c9f58	elv_rb_find
+EXPORT_SYMBOL vmlinux 0xab1d07b4	tcp_prot
+EXPORT_SYMBOL vmlinux 0xab600421	probe_irq_off
+EXPORT_SYMBOL vmlinux 0xab65ed80	set_memory_uc
+EXPORT_SYMBOL vmlinux 0xab770678	rdmsr_safe_regs_on_cpu
+EXPORT_SYMBOL vmlinux 0xab8625f1	close_bdev_exclusive
+EXPORT_SYMBOL vmlinux 0xaba46d5b	qdisc_reset
+EXPORT_SYMBOL vmlinux 0xaba9ff34	allocate_resource
+EXPORT_SYMBOL vmlinux 0xabd0c91c	rtc_time_to_tm
+EXPORT_SYMBOL vmlinux 0xabe85a21	idr_init
+EXPORT_SYMBOL vmlinux 0xabfa9a72	inode_setattr
+EXPORT_SYMBOL vmlinux 0xabfc4365	bio_integrity_tag_size
+EXPORT_SYMBOL vmlinux 0xac0ba8c1	blk_iopoll_disable
+EXPORT_SYMBOL vmlinux 0xac1084e0	filemap_write_and_wait_range
+EXPORT_SYMBOL vmlinux 0xac11d451	skb_dequeue_tail
+EXPORT_SYMBOL vmlinux 0xac28a368	nf_unregister_queue_handler
+EXPORT_SYMBOL vmlinux 0xac383451	radix_tree_tag_clear
+EXPORT_SYMBOL vmlinux 0xac58ea5e	acpi_unload_table_id
+EXPORT_SYMBOL vmlinux 0xac6794a7	seq_write
+EXPORT_SYMBOL vmlinux 0xac6855b0	gen_kill_estimator
+EXPORT_SYMBOL vmlinux 0xac759b02	sg_miter_start
+EXPORT_SYMBOL vmlinux 0xacab679b	audit_log_start
+EXPORT_SYMBOL vmlinux 0xacb781c1	scsi_bios_ptable
+EXPORT_SYMBOL vmlinux 0xaccabc6a	in4_pton
+EXPORT_SYMBOL vmlinux 0xacdeb154	__tracepoint_module_get
+EXPORT_SYMBOL vmlinux 0xaced0868	jbd2_journal_get_create_access
+EXPORT_SYMBOL vmlinux 0xacf4d843	match_strdup
+EXPORT_SYMBOL vmlinux 0xacf565ba	load_nls
+EXPORT_SYMBOL vmlinux 0xad0413d4	match_hex
+EXPORT_SYMBOL vmlinux 0xad04c822	agp_backend_acquire
+EXPORT_SYMBOL vmlinux 0xad13c689	acpi_os_execute
+EXPORT_SYMBOL vmlinux 0xad1f02b1	tcp_poll
+EXPORT_SYMBOL vmlinux 0xad25fb12	__memcpy
+EXPORT_SYMBOL vmlinux 0xad2f2749	phy_disconnect
+EXPORT_SYMBOL vmlinux 0xad3add6a	fd_install
+EXPORT_SYMBOL vmlinux 0xad8de1b3	acpi_remove_address_space_handler
+EXPORT_SYMBOL vmlinux 0xadaa2657	cpufreq_register_notifier
+EXPORT_SYMBOL vmlinux 0xadc8cd85	jbd2_journal_invalidatepage
+EXPORT_SYMBOL vmlinux 0xae01e626	generic_listxattr
+EXPORT_SYMBOL vmlinux 0xae3f56e0	input_register_handle
+EXPORT_SYMBOL vmlinux 0xae4c452e	set_bdi_congested
+EXPORT_SYMBOL vmlinux 0xae565f65	kill_pgrp
+EXPORT_SYMBOL vmlinux 0xae76ecb7	dcache_readdir
+EXPORT_SYMBOL vmlinux 0xae9a8f9e	in_dev_finish_destroy
+EXPORT_SYMBOL vmlinux 0xaead7eb6	mpage_readpages
+EXPORT_SYMBOL vmlinux 0xaec225c4	drop_super
+EXPORT_SYMBOL vmlinux 0xaed013b9	posix_acl_valid
+EXPORT_SYMBOL vmlinux 0xaedbb7e2	tcp_sync_mss
+EXPORT_SYMBOL vmlinux 0xaedc7a3f	phy_attach
+EXPORT_SYMBOL vmlinux 0xaef8b3d3	fb_class
+EXPORT_SYMBOL vmlinux 0xaeff6d8f	invalidate_inode_buffers
+EXPORT_SYMBOL vmlinux 0xaf0bc1a8	phy_device_free
+EXPORT_SYMBOL vmlinux 0xaf3dd7dc	scsi_logging_level
+EXPORT_SYMBOL vmlinux 0xaf5220e5	locks_copy_lock
+EXPORT_SYMBOL vmlinux 0xaf6e5e61	gnet_stats_finish_copy
+EXPORT_SYMBOL vmlinux 0xaf74553c	km_new_mapping
+EXPORT_SYMBOL vmlinux 0xaf7659cc	keyring_search
+EXPORT_SYMBOL vmlinux 0xaf877d99	mb_cache_create
+EXPORT_SYMBOL vmlinux 0xaf8b30ff	tcp_timewait_state_process
+EXPORT_SYMBOL vmlinux 0xafe82e10	strcspn
+EXPORT_SYMBOL vmlinux 0xafef8fa9	register_memory_notifier
+EXPORT_SYMBOL vmlinux 0xaffd5411	tty_register_device
+EXPORT_SYMBOL vmlinux 0xaffd8f95	neigh_resolve_output
+EXPORT_SYMBOL vmlinux 0xb007ff05	tc_classify
+EXPORT_SYMBOL vmlinux 0xb00ef5ac	proc_doulongvec_ms_jiffies_minmax
+EXPORT_SYMBOL vmlinux 0xb0232186	simple_transaction_read
+EXPORT_SYMBOL vmlinux 0xb03f2c80	backlight_force_update
+EXPORT_SYMBOL vmlinux 0xb04ea8f0	agp_rebind_memory
+EXPORT_SYMBOL vmlinux 0xb051909f	ida_init
+EXPORT_SYMBOL vmlinux 0xb055d8da	posix_acl_to_xattr
+EXPORT_SYMBOL vmlinux 0xb07dfb3d	acpi_remove_gpe_handler
+EXPORT_SYMBOL vmlinux 0xb0a53aad	ethtool_op_set_sg
+EXPORT_SYMBOL vmlinux 0xb0b847ac	__bitmap_full
+EXPORT_SYMBOL vmlinux 0xb0d2be78	inode_sub_rsv_space
+EXPORT_SYMBOL vmlinux 0xb0dac753	dquot_initialize
+EXPORT_SYMBOL vmlinux 0xb0e10781	get_option
+EXPORT_SYMBOL vmlinux 0xb0ea492a	uart_write_wakeup
+EXPORT_SYMBOL vmlinux 0xb0fd2ba7	acpi_bus_unregister_driver
+EXPORT_SYMBOL vmlinux 0xb0fde061	pci_get_slot
+EXPORT_SYMBOL vmlinux 0xb11fa1ce	strlcat
+EXPORT_SYMBOL vmlinux 0xb121390a	probe_irq_on
+EXPORT_SYMBOL vmlinux 0xb12c096a	jbd2_log_wait_commit
+EXPORT_SYMBOL vmlinux 0xb1645a2e	sg_free_table
+EXPORT_SYMBOL vmlinux 0xb18e02c3	radix_tree_gang_lookup_tag
+EXPORT_SYMBOL vmlinux 0xb19760c3	bitmap_onto
+EXPORT_SYMBOL vmlinux 0xb1a00ec1	sock_setsockopt
+EXPORT_SYMBOL vmlinux 0xb1c3a01a	oops_in_progress
+EXPORT_SYMBOL vmlinux 0xb1cfad22	rdmsr_on_cpu
+EXPORT_SYMBOL vmlinux 0xb1d921df	simple_lookup
+EXPORT_SYMBOL vmlinux 0xb1f975aa	unlock_kernel
+EXPORT_SYMBOL vmlinux 0xb20ecf88	acpi_run_osc
+EXPORT_SYMBOL vmlinux 0xb219d56c	wbinvd_on_cpu
+EXPORT_SYMBOL vmlinux 0xb224fbe2	param_get_short
+EXPORT_SYMBOL vmlinux 0xb22fe6a3	netdev_increment_features
+EXPORT_SYMBOL vmlinux 0xb2682405	utf8_to_utf32
+EXPORT_SYMBOL vmlinux 0xb279da12	pv_lock_ops
+EXPORT_SYMBOL vmlinux 0xb2dbc0a2	journal_destroy
+EXPORT_SYMBOL vmlinux 0xb2f36160	fddi_type_trans
+EXPORT_SYMBOL vmlinux 0xb2fd5ceb	__put_user_4
+EXPORT_SYMBOL vmlinux 0xb316f1e0	clear_inode
+EXPORT_SYMBOL vmlinux 0xb31b2298	mmc_try_claim_host
+EXPORT_SYMBOL vmlinux 0xb3205415	wait_for_completion_killable
+EXPORT_SYMBOL vmlinux 0xb3284531	acpi_dbg_layer
+EXPORT_SYMBOL vmlinux 0xb34d4c2e	acpi_terminate
+EXPORT_SYMBOL vmlinux 0xb352177e	find_first_bit
+EXPORT_SYMBOL vmlinux 0xb3622330	xfrm6_rcv_spi
+EXPORT_SYMBOL vmlinux 0xb363f4be	netdev_class_remove_file
+EXPORT_SYMBOL vmlinux 0xb37bd635	dm_exception_store_create
+EXPORT_SYMBOL vmlinux 0xb3994c7a	per_cpu__kstat
+EXPORT_SYMBOL vmlinux 0xb3a307c6	si_meminfo
+EXPORT_SYMBOL vmlinux 0xb3a52741	qdisc_watchdog_cancel
+EXPORT_SYMBOL vmlinux 0xb3b7721f	bitmap_start_sync
+EXPORT_SYMBOL vmlinux 0xb3c42c94	per_cpu__x86_bios_cpu_apicid
+EXPORT_SYMBOL vmlinux 0xb3cd49f8	tcp_v4_destroy_sock
+EXPORT_SYMBOL vmlinux 0xb3d0e116	d_validate
+EXPORT_SYMBOL vmlinux 0xb3ff1f69	free_pages_exact
+EXPORT_SYMBOL vmlinux 0xb423dba1	console_blanked
+EXPORT_SYMBOL vmlinux 0xb42453d3	param_get_invbool
+EXPORT_SYMBOL vmlinux 0xb4279ab7	downgrade_write
+EXPORT_SYMBOL vmlinux 0xb432ab59	replace_mount_options
+EXPORT_SYMBOL vmlinux 0xb4390f9a	mcount
+EXPORT_SYMBOL vmlinux 0xb43ff95a	__dev_get_by_index
+EXPORT_SYMBOL vmlinux 0xb444fabc	generic_setlease
+EXPORT_SYMBOL vmlinux 0xb455277e	insert_inode_locked
+EXPORT_SYMBOL vmlinux 0xb45b24f6	k8_nb_ids
+EXPORT_SYMBOL vmlinux 0xb45e0071	d_delete
+EXPORT_SYMBOL vmlinux 0xb4709322	scsi_dev_info_add_list
+EXPORT_SYMBOL vmlinux 0xb4782fd3	sock_no_poll
+EXPORT_SYMBOL vmlinux 0xb48758f4	__scm_send
+EXPORT_SYMBOL vmlinux 0xb4953ab7	default_llseek
+EXPORT_SYMBOL vmlinux 0xb49d03c8	register_cdrom
+EXPORT_SYMBOL vmlinux 0xb4ae698f	serio_unregister_child_port
+EXPORT_SYMBOL vmlinux 0xb4b0ee4e	down_read
+EXPORT_SYMBOL vmlinux 0xb4b4d1c9	xfrm_policy_insert
+EXPORT_SYMBOL vmlinux 0xb4ca9447	__kfifo_get
+EXPORT_SYMBOL vmlinux 0xb4ec3610	swiotlb_unmap_sg
+EXPORT_SYMBOL vmlinux 0xb5044271	vsscanf
+EXPORT_SYMBOL vmlinux 0xb5103b97	release_sock
+EXPORT_SYMBOL vmlinux 0xb523ecaa	seq_printf
+EXPORT_SYMBOL vmlinux 0xb52463a7	nf_log_packet
+EXPORT_SYMBOL vmlinux 0xb5263bc8	vfs_quota_on_path
+EXPORT_SYMBOL vmlinux 0xb5278e28	vfs_statfs
+EXPORT_SYMBOL vmlinux 0xb54533f7	usecs_to_jiffies
+EXPORT_SYMBOL vmlinux 0xb5488a6b	bio_integrity_enabled
+EXPORT_SYMBOL vmlinux 0xb565de56	udp_sendmsg
+EXPORT_SYMBOL vmlinux 0xb567a501	get_user_pages
+EXPORT_SYMBOL vmlinux 0xb5a459dc	unregister_blkdev
+EXPORT_SYMBOL vmlinux 0xb5b11990	inode_needs_sync
+EXPORT_SYMBOL vmlinux 0xb5bec777	vfs_quota_on
+EXPORT_SYMBOL vmlinux 0xb5ca1c46	slhc_free
+EXPORT_SYMBOL vmlinux 0xb5d52c27	ec_transaction
+EXPORT_SYMBOL vmlinux 0xb5dc4da7	setup_new_exec
+EXPORT_SYMBOL vmlinux 0xb6045f07	sync_inode
+EXPORT_SYMBOL vmlinux 0xb61c93de	i2c_smbus_write_byte_data
+EXPORT_SYMBOL vmlinux 0xb6244511	sg_init_one
+EXPORT_SYMBOL vmlinux 0xb6353555	per_cpu__x86_cpu_to_apicid
+EXPORT_SYMBOL vmlinux 0xb64ba53b	sk_alloc
+EXPORT_SYMBOL vmlinux 0xb65013d3	compat_sock_get_timestamp
+EXPORT_SYMBOL vmlinux 0xb678366f	int_sqrt
+EXPORT_SYMBOL vmlinux 0xb6a2cbfd	pci_request_regions
+EXPORT_SYMBOL vmlinux 0xb6a61a86	qdisc_get_rtab
+EXPORT_SYMBOL vmlinux 0xb6a68816	find_last_bit
+EXPORT_SYMBOL vmlinux 0xb6b02960	lro_vlan_hwaccel_receive_skb
+EXPORT_SYMBOL vmlinux 0xb6bc5c04	module_put
+EXPORT_SYMBOL vmlinux 0xb6bffb99	kstat_irqs_cpu
+EXPORT_SYMBOL vmlinux 0xb6c5a973	scsi_show_result
+EXPORT_SYMBOL vmlinux 0xb6cbe886	acpi_get_node
+EXPORT_SYMBOL vmlinux 0xb6ccb53b	eth_header_cache
+EXPORT_SYMBOL vmlinux 0xb6e227aa	rtc_lock
+EXPORT_SYMBOL vmlinux 0xb6e8aead	phy_driver_register
+EXPORT_SYMBOL vmlinux 0xb728841b	llc_add_pack
+EXPORT_SYMBOL vmlinux 0xb750542c	dma_supported
+EXPORT_SYMBOL vmlinux 0xb758b225	acpi_disable_event
+EXPORT_SYMBOL vmlinux 0xb798b8e4	flow_cache_lookup
+EXPORT_SYMBOL vmlinux 0xb7ccb3c7	twl4030_i2c_read_u8
+EXPORT_SYMBOL vmlinux 0xb7e5ef2f	ethtool_op_set_tso
+EXPORT_SYMBOL vmlinux 0xb8032053	eth_header_parse
+EXPORT_SYMBOL vmlinux 0xb813ce5a	timecompare_transform
+EXPORT_SYMBOL vmlinux 0xb850d1e6	bio_integrity_get_tag
+EXPORT_SYMBOL vmlinux 0xb85a8092	agp_free_page_array
+EXPORT_SYMBOL vmlinux 0xb86a6de3	start_tty
+EXPORT_SYMBOL vmlinux 0xb86e4ab9	random32
+EXPORT_SYMBOL vmlinux 0xb86f1aab	generic_writepages
+EXPORT_SYMBOL vmlinux 0xb88459b5	boot_cpu_data
+EXPORT_SYMBOL vmlinux 0xb89af9bf	srandom32
+EXPORT_SYMBOL vmlinux 0xb8a8b02b	noop_qdisc
+EXPORT_SYMBOL vmlinux 0xb8c77e10	ip_fragment
+EXPORT_SYMBOL vmlinux 0xb8d0a533	qdisc_warn_nonwc
+EXPORT_SYMBOL vmlinux 0xb8d8452d	tcp_connect
+EXPORT_SYMBOL vmlinux 0xb8e7ce2c	__put_user_8
+EXPORT_SYMBOL vmlinux 0xb9090a88	kernel_getsockopt
+EXPORT_SYMBOL vmlinux 0xb9145a92	sock_queue_rcv_skb
+EXPORT_SYMBOL vmlinux 0xb9249d16	cpu_possible_mask
+EXPORT_SYMBOL vmlinux 0xb9707913	dm_get_device
+EXPORT_SYMBOL vmlinux 0xb98a0185	rtc_tm_to_time
+EXPORT_SYMBOL vmlinux 0xb9a7fdaf	__insert_inode_hash
+EXPORT_SYMBOL vmlinux 0xb9fd2205	add_efi_memmap
+EXPORT_SYMBOL vmlinux 0xba112c1a	clear_page_dirty_for_io
+EXPORT_SYMBOL vmlinux 0xba2d8594	ec_read
+EXPORT_SYMBOL vmlinux 0xba37d2cc	end_buffer_read_sync
+EXPORT_SYMBOL vmlinux 0xba430d41	pci_bus_size_bridges
+EXPORT_SYMBOL vmlinux 0xba497f13	loops_per_jiffy
+EXPORT_SYMBOL vmlinux 0xba4ad9d5	register_qdisc
+EXPORT_SYMBOL vmlinux 0xba802258	ethtool_op_get_rx_csum
+EXPORT_SYMBOL vmlinux 0xbaa2782a	kstrndup
+EXPORT_SYMBOL vmlinux 0xbaa328d6	cdev_init
+EXPORT_SYMBOL vmlinux 0xbaaab8ae	timespec_to_jiffies
+EXPORT_SYMBOL vmlinux 0xbad0417d	bh_submit_read
+EXPORT_SYMBOL vmlinux 0xbae8c342	writeback_inodes_sb_if_idle
+EXPORT_SYMBOL vmlinux 0xbaf3b929	pcie_get_readrq
+EXPORT_SYMBOL vmlinux 0xbb1304cb	tcp_rcv_state_process
+EXPORT_SYMBOL vmlinux 0xbb167766	fb_var_to_videomode
+EXPORT_SYMBOL vmlinux 0xbb189cad	disallow_signal
+EXPORT_SYMBOL vmlinux 0xbb1fad6a	flush_delayed_work
+EXPORT_SYMBOL vmlinux 0xbb5d343d	xfrm_get_acqseq
+EXPORT_SYMBOL vmlinux 0xbb7db6b0	mdiobus_register
+EXPORT_SYMBOL vmlinux 0xbbd0d0a2	simple_transaction_get
+EXPORT_SYMBOL vmlinux 0xbbe09284	xfrm6_find_1stfragopt
+EXPORT_SYMBOL vmlinux 0xbc43326f	proc_net_netfilter
+EXPORT_SYMBOL vmlinux 0xbc5c84b9	iov_iter_copy_from_user_atomic
+EXPORT_SYMBOL vmlinux 0xbc5d32d1	swiotlb_dma_mapping_error
+EXPORT_SYMBOL vmlinux 0xbc86ba9f	sync_dirty_buffer
+EXPORT_SYMBOL vmlinux 0xbcc308bb	strnlen_user
+EXPORT_SYMBOL vmlinux 0xbccbb49c	idr_remove_all
+EXPORT_SYMBOL vmlinux 0xbcd394b0	compat_ipv6_getsockopt
+EXPORT_SYMBOL vmlinux 0xbd100793	cpu_online_mask
+EXPORT_SYMBOL vmlinux 0xbd17f8d7	kernel_sock_shutdown
+EXPORT_SYMBOL vmlinux 0xbd33425d	is_container_init
+EXPORT_SYMBOL vmlinux 0xbd5c73fc	blk_get_request
+EXPORT_SYMBOL vmlinux 0xbd6a7a1d	inode_newsize_ok
+EXPORT_SYMBOL vmlinux 0xbdaf5b07	acpi_os_read_port
+EXPORT_SYMBOL vmlinux 0xbdf5c25c	rb_next
+EXPORT_SYMBOL vmlinux 0xbdfb6f10	kernel_listen
+EXPORT_SYMBOL vmlinux 0xbe1d0a7f	blk_end_request_all
+EXPORT_SYMBOL vmlinux 0xbe499d81	copy_to_user
+EXPORT_SYMBOL vmlinux 0xbe670618	call_usermodehelper_pipe
+EXPORT_SYMBOL vmlinux 0xbe681232	ethtool_op_set_flags
+EXPORT_SYMBOL vmlinux 0xbe6b17f7	textsearch_prepare
+EXPORT_SYMBOL vmlinux 0xbe95c537	dquot_free_inode
+EXPORT_SYMBOL vmlinux 0xbecdce74	ida_pre_get
+EXPORT_SYMBOL vmlinux 0xbed7552b	pnp_start_dev
+EXPORT_SYMBOL vmlinux 0xbeefd7d2	mb_cache_entry_get
+EXPORT_SYMBOL vmlinux 0xbef43296	console_conditional_schedule
+EXPORT_SYMBOL vmlinux 0xbf16aa55	sock_i_ino
+EXPORT_SYMBOL vmlinux 0xbf1acec8	sock_kfree_s
+EXPORT_SYMBOL vmlinux 0xbf204be3	simple_readpage
+EXPORT_SYMBOL vmlinux 0xbf21b9f7	genl_register_ops
+EXPORT_SYMBOL vmlinux 0xbf6303dc	simple_set_mnt
+EXPORT_SYMBOL vmlinux 0xbf6a9a0e	pci_bus_type
+EXPORT_SYMBOL vmlinux 0xbf71ea93	new_inode
+EXPORT_SYMBOL vmlinux 0xbf737449	udp_disconnect
+EXPORT_SYMBOL vmlinux 0xbf7b2047	jbd2_journal_set_triggers
+EXPORT_SYMBOL vmlinux 0xbf7fd2f5	schedule_timeout_killable
+EXPORT_SYMBOL vmlinux 0xbf8b797c	cpu_sysdev_class
+EXPORT_SYMBOL vmlinux 0xbf912749	scsi_device_resume
+EXPORT_SYMBOL vmlinux 0xbf9bcc8d	__cap_empty_set
+EXPORT_SYMBOL vmlinux 0xbfbd9925	sock_common_recvmsg
+EXPORT_SYMBOL vmlinux 0xbfc177bc	iowrite32_rep
+EXPORT_SYMBOL vmlinux 0xbfdca4be	__kfree_skb
+EXPORT_SYMBOL vmlinux 0xbfee3ad5	loop_unregister_transfer
+EXPORT_SYMBOL vmlinux 0xc003c637	__strncpy_from_user
+EXPORT_SYMBOL vmlinux 0xc0044724	blk_set_default_limits
+EXPORT_SYMBOL vmlinux 0xc00a0a1c	save_mount_options
+EXPORT_SYMBOL vmlinux 0xc011ec72	textsearch_register
+EXPORT_SYMBOL vmlinux 0xc054f5ad	module_refcount
+EXPORT_SYMBOL vmlinux 0xc0580937	rb_erase
+EXPORT_SYMBOL vmlinux 0xc05ef80e	cap_netlink_recv
+EXPORT_SYMBOL vmlinux 0xc07561d3	skb_prepare_seq_read
+EXPORT_SYMBOL vmlinux 0xc07d43ae	acpi_evaluate_reference
+EXPORT_SYMBOL vmlinux 0xc09651d9	crc32_be
+EXPORT_SYMBOL vmlinux 0xc0a3d105	find_next_bit
+EXPORT_SYMBOL vmlinux 0xc0acc61f	nf_unregister_hooks
+EXPORT_SYMBOL vmlinux 0xc0b855ea	tty_port_tty_set
+EXPORT_SYMBOL vmlinux 0xc0bf6ead	timecounter_cyc2time
+EXPORT_SYMBOL vmlinux 0xc136502a	key_revoke
+EXPORT_SYMBOL vmlinux 0xc194ec12	kmem_cache_free
+EXPORT_SYMBOL vmlinux 0xc1beac8a	agp_flush_chipset
+EXPORT_SYMBOL vmlinux 0xc1caafa5	tcp_initialize_rcv_mss
+EXPORT_SYMBOL vmlinux 0xc1d3ed88	blk_dump_rq_flags
+EXPORT_SYMBOL vmlinux 0xc212fd64	skb_pad
+EXPORT_SYMBOL vmlinux 0xc2164878	generic_delete_inode
+EXPORT_SYMBOL vmlinux 0xc23b9418	__getblk
+EXPORT_SYMBOL vmlinux 0xc2424641	agp3_generic_cleanup
+EXPORT_SYMBOL vmlinux 0xc24a6172	d_alloc_root
+EXPORT_SYMBOL vmlinux 0xc24cd473	__register_binfmt
+EXPORT_SYMBOL vmlinux 0xc254af48	dcache_lock
+EXPORT_SYMBOL vmlinux 0xc256e762	__bitmap_equal
+EXPORT_SYMBOL vmlinux 0xc27cb64b	remove_proc_entry
+EXPORT_SYMBOL vmlinux 0xc28029b7	bio_get_nr_vecs
+EXPORT_SYMBOL vmlinux 0xc2b0f6a1	jbd2_journal_release_jbd_inode
+EXPORT_SYMBOL vmlinux 0xc2be9086	copy_io_context
+EXPORT_SYMBOL vmlinux 0xc2e587d1	reset_devices
+EXPORT_SYMBOL vmlinux 0xc2f0ca73	blkdev_issue_discard
+EXPORT_SYMBOL vmlinux 0xc3208780	mpage_writepage
+EXPORT_SYMBOL vmlinux 0xc32c3133	free_task
+EXPORT_SYMBOL vmlinux 0xc33f6f4c	on_each_cpu
+EXPORT_SYMBOL vmlinux 0xc3408f42	mutex_trylock
+EXPORT_SYMBOL vmlinux 0xc350f671	default_file_splice_read
+EXPORT_SYMBOL vmlinux 0xc351232f	tty_check_change
+EXPORT_SYMBOL vmlinux 0xc366201b	sk_stream_kill_queues
+EXPORT_SYMBOL vmlinux 0xc36f01ee	call_usermodehelper_freeinfo
+EXPORT_SYMBOL vmlinux 0xc3aaf0a9	__put_user_1
+EXPORT_SYMBOL vmlinux 0xc3c12888	pagevec_lookup
+EXPORT_SYMBOL vmlinux 0xc3d0970d	pci_assign_resource
+EXPORT_SYMBOL vmlinux 0xc3d8cf97	jbd2_journal_start
+EXPORT_SYMBOL vmlinux 0xc3eea92a	dev_open
+EXPORT_SYMBOL vmlinux 0xc402cc99	register_acpi_notifier
+EXPORT_SYMBOL vmlinux 0xc4100e40	jbd2_journal_revoke
+EXPORT_SYMBOL vmlinux 0xc426e5c9	generic_make_request
+EXPORT_SYMBOL vmlinux 0xc499ae1e	kstrdup
+EXPORT_SYMBOL vmlinux 0xc4b1f5df	key_alloc
+EXPORT_SYMBOL vmlinux 0xc4c30829	security_inode_setsecctx
+EXPORT_SYMBOL vmlinux 0xc4c6ba6a	block_is_partially_uptodate
+EXPORT_SYMBOL vmlinux 0xc512bbe2	pnp_register_card_driver
+EXPORT_SYMBOL vmlinux 0xc52f5714	fb_videomode_to_var
+EXPORT_SYMBOL vmlinux 0xc53c882d	idr_get_new
+EXPORT_SYMBOL vmlinux 0xc5534d64	ioread16
+EXPORT_SYMBOL vmlinux 0xc555014c	ip_generic_getfrag
+EXPORT_SYMBOL vmlinux 0xc558530d	profile_pc
+EXPORT_SYMBOL vmlinux 0xc55f7dc7	_write_trylock
+EXPORT_SYMBOL vmlinux 0xc57f2c85	km_policy_expired
+EXPORT_SYMBOL vmlinux 0xc5ac0c5f	swiotlb_sync_single_for_device
+EXPORT_SYMBOL vmlinux 0xc5d9c46c	agp_try_unsupported_boot
+EXPORT_SYMBOL vmlinux 0xc5da49ae	i2c_master_recv
+EXPORT_SYMBOL vmlinux 0xc5dfd34e	generic_setxattr
+EXPORT_SYMBOL vmlinux 0xc5ed3afb	linkwatch_fire_event
+EXPORT_SYMBOL vmlinux 0xc5f08e00	inet_csk_destroy_sock
+EXPORT_SYMBOL vmlinux 0xc5f149e5	rfkill_set_led_trigger_name
+EXPORT_SYMBOL vmlinux 0xc5fb5ad1	security_file_permission
+EXPORT_SYMBOL vmlinux 0xc62080fe	__neigh_event_send
+EXPORT_SYMBOL vmlinux 0xc621aa72	vfs_read
+EXPORT_SYMBOL vmlinux 0xc65abeb7	agp3_generic_sizes
+EXPORT_SYMBOL vmlinux 0xc6e61a50	blk_alloc_queue_node
+EXPORT_SYMBOL vmlinux 0xc6f59d19	xfrm_bundle_ok
+EXPORT_SYMBOL vmlinux 0xc6fd8ef4	dec_zone_page_state
+EXPORT_SYMBOL vmlinux 0xc7208c3a	serial8250_resume_port
+EXPORT_SYMBOL vmlinux 0xc722227e	posix_acl_clone
+EXPORT_SYMBOL vmlinux 0xc73bce54	arp_send
+EXPORT_SYMBOL vmlinux 0xc740c64a	memchr
+EXPORT_SYMBOL vmlinux 0xc77771ed	user_path_at
+EXPORT_SYMBOL vmlinux 0xc79bcd36	dm_vcalloc
+EXPORT_SYMBOL vmlinux 0xc7a24d76	sysfs_format_mac
+EXPORT_SYMBOL vmlinux 0xc7a4fbed	rtnl_lock
+EXPORT_SYMBOL vmlinux 0xc7b534ae	ipv6_setsockopt
+EXPORT_SYMBOL vmlinux 0xc7bbbaea	udp_proc_unregister
+EXPORT_SYMBOL vmlinux 0xc7c04b7d	input_release_device
+EXPORT_SYMBOL vmlinux 0xc7e6909c	alloc_disk
+EXPORT_SYMBOL vmlinux 0xc7e784cf	blk_queue_physical_block_size
+EXPORT_SYMBOL vmlinux 0xc7e9864c	ethtool_op_get_tx_csum
+EXPORT_SYMBOL vmlinux 0xc7f78636	cdrom_get_last_written
+EXPORT_SYMBOL vmlinux 0xc7fac524	ndisc_send_skb
+EXPORT_SYMBOL vmlinux 0xc8609e54	jbd2_journal_clear_err
+EXPORT_SYMBOL vmlinux 0xc86d7b44	md_check_no_bitmap
+EXPORT_SYMBOL vmlinux 0xc87cabb4	__generic_block_fiemap
+EXPORT_SYMBOL vmlinux 0xc8827c22	xfrm_unregister_type
+EXPORT_SYMBOL vmlinux 0xc8862866	tc_classify_compat
+EXPORT_SYMBOL vmlinux 0xc88ad0b3	acpi_bus_generate_proc_event
+EXPORT_SYMBOL vmlinux 0xc897c382	sg_init_table
+EXPORT_SYMBOL vmlinux 0xc8b01743	phy_scan_fixups
+EXPORT_SYMBOL vmlinux 0xc8b57c27	autoremove_wake_function
+EXPORT_SYMBOL vmlinux 0xc8bb4e1b	get_sb_single
+EXPORT_SYMBOL vmlinux 0xc8ca3e25	acpi_get_child
+EXPORT_SYMBOL vmlinux 0xc8d17a65	thermal_cooling_device_unregister
+EXPORT_SYMBOL vmlinux 0xc90cf804	km_policy_notify
+EXPORT_SYMBOL vmlinux 0xc90ef253	d_invalidate
+EXPORT_SYMBOL vmlinux 0xc9539c94	d_alloc_name
+EXPORT_SYMBOL vmlinux 0xc998d641	icmp_err_convert
+EXPORT_SYMBOL vmlinux 0xc9ab2eef	acpi_os_wait_events_complete
+EXPORT_SYMBOL vmlinux 0xc9ec8704	udp_table
+EXPORT_SYMBOL vmlinux 0xc9eea124	init_task
+EXPORT_SYMBOL vmlinux 0xca04064a	__secpath_destroy
+EXPORT_SYMBOL vmlinux 0xca5dbc50	scsi_print_sense_hdr
+EXPORT_SYMBOL vmlinux 0xca78cdaf	directly_mappable_cdev_bdi
+EXPORT_SYMBOL vmlinux 0xca8acc78	acpi_dbg_level
+EXPORT_SYMBOL vmlinux 0xcab11c83	__xfrm_lookup
+EXPORT_SYMBOL vmlinux 0xcab86bc4	backlight_device_unregister
+EXPORT_SYMBOL vmlinux 0xcb024f81	pcim_iomap_regions_request_all
+EXPORT_SYMBOL vmlinux 0xcb1537a2	tcp_v4_md5_lookup
+EXPORT_SYMBOL vmlinux 0xcb1a14c0	I_BDEV
+EXPORT_SYMBOL vmlinux 0xcb295084	journal_get_write_access
+EXPORT_SYMBOL vmlinux 0xcb5a1e50	tcf_em_tree_validate
+EXPORT_SYMBOL vmlinux 0xcb616259	eth_validate_addr
+EXPORT_SYMBOL vmlinux 0xcb6beb40	hweight32
+EXPORT_SYMBOL vmlinux 0xcb702854	bio_integrity_set_tag
+EXPORT_SYMBOL vmlinux 0xcb7131fb	fb_get_options
+EXPORT_SYMBOL vmlinux 0xcb733bf2	acpi_bus_set_power
+EXPORT_SYMBOL vmlinux 0xcbb9d7db	groups_free
+EXPORT_SYMBOL vmlinux 0xcbbb7884	mmc_add_host
+EXPORT_SYMBOL vmlinux 0xcbbe99db	genphy_update_link
+EXPORT_SYMBOL vmlinux 0xcbd8acc3	alloc_buffer_head
+EXPORT_SYMBOL vmlinux 0xcc07af75	strnlen
+EXPORT_SYMBOL vmlinux 0xcc248d26	serial8250_suspend_port
+EXPORT_SYMBOL vmlinux 0xcc36f32e	fb_unregister_client
+EXPORT_SYMBOL vmlinux 0xcc3f176f	per_cpu__x86_cpu_to_node_map
+EXPORT_SYMBOL vmlinux 0xcc40c579	acpi_lock_ac_dir
+EXPORT_SYMBOL vmlinux 0xcc41e716	devm_ioport_unmap
+EXPORT_SYMBOL vmlinux 0xcc5005fe	msleep_interruptible
+EXPORT_SYMBOL vmlinux 0xcc506049	mmc_remove_host
+EXPORT_SYMBOL vmlinux 0xcc51ee50	dma_spin_lock
+EXPORT_SYMBOL vmlinux 0xcc52d4e8	rwsem_down_read_failed
+EXPORT_SYMBOL vmlinux 0xcc598fb7	tty_unthrottle
+EXPORT_SYMBOL vmlinux 0xcc6135c4	phy_connect
+EXPORT_SYMBOL vmlinux 0xcc7fa952	local_bh_enable_ip
+EXPORT_SYMBOL vmlinux 0xccd754a0	blk_rq_map_kern
+EXPORT_SYMBOL vmlinux 0xcd0c8098	scsi_setup_fs_cmnd
+EXPORT_SYMBOL vmlinux 0xcd30b7ea	rt6_lookup
+EXPORT_SYMBOL vmlinux 0xcd7983b3	kern_path
+EXPORT_SYMBOL vmlinux 0xcd8927f5	sock_init_data
+EXPORT_SYMBOL vmlinux 0xcda02a81	scsi_get_host_dev
+EXPORT_SYMBOL vmlinux 0xcddf9cec	request_key_with_auxdata
+EXPORT_SYMBOL vmlinux 0xcded0ed6	dquot_alloc
+EXPORT_SYMBOL vmlinux 0xcdf94117	dmam_free_coherent
+EXPORT_SYMBOL vmlinux 0xce19bac5	register_inet6addr_notifier
+EXPORT_SYMBOL vmlinux 0xce36ded6	sysctl_tcp_mem
+EXPORT_SYMBOL vmlinux 0xce4904a4	acpi_leave_sleep_state
+EXPORT_SYMBOL vmlinux 0xce54c6fc	cfb_imageblit
+EXPORT_SYMBOL vmlinux 0xce5ac24f	zlib_inflate_workspacesize
+EXPORT_SYMBOL vmlinux 0xce62a623	register_8022_client
+EXPORT_SYMBOL vmlinux 0xce76a47a	llc_sap_find
+EXPORT_SYMBOL vmlinux 0xce78c510	scsi_calculate_bounce_limit
+EXPORT_SYMBOL vmlinux 0xce96e359	blk_fetch_request
+EXPORT_SYMBOL vmlinux 0xceb00469	__blockdev_direct_IO
+EXPORT_SYMBOL vmlinux 0xcec3188c	tcf_hash_check
+EXPORT_SYMBOL vmlinux 0xceef667a	force_sig
+EXPORT_SYMBOL vmlinux 0xcef4449d	blk_unplug
+EXPORT_SYMBOL vmlinux 0xcef88b04	journal_check_available_features
+EXPORT_SYMBOL vmlinux 0xcefcd99a	serial8250_unregister_port
+EXPORT_SYMBOL vmlinux 0xcf0eae51	hippi_mac_addr
+EXPORT_SYMBOL vmlinux 0xcf12db13	compat_tcp_getsockopt
+EXPORT_SYMBOL vmlinux 0xcf1d28ab	acpi_error
+EXPORT_SYMBOL vmlinux 0xcf2c2417	phy_register_fixup
+EXPORT_SYMBOL vmlinux 0xcf3a9e39	invalidate_mapping_pages
+EXPORT_SYMBOL vmlinux 0xcf3cb792	i2c_smbus_xfer
+EXPORT_SYMBOL vmlinux 0xcf6cfe1f	msrs_free
+EXPORT_SYMBOL vmlinux 0xcf7953dc	sock_no_shutdown
+EXPORT_SYMBOL vmlinux 0xcf7c043b	dm_dirty_log_type_register
+EXPORT_SYMBOL vmlinux 0xcf827485	__starget_for_each_device
+EXPORT_SYMBOL vmlinux 0xcfadd723	__percpu_counter_add
+EXPORT_SYMBOL vmlinux 0xcfb409d4	unregister_md_personality
+EXPORT_SYMBOL vmlinux 0xcfb9006e	jiffies_to_timeval
+EXPORT_SYMBOL vmlinux 0xcfbb9cc8	vfs_get_dqinfo
+EXPORT_SYMBOL vmlinux 0xcfda1b15	ppp_channel_index
+EXPORT_SYMBOL vmlinux 0xcfe9da68	dev_get_drvdata
+EXPORT_SYMBOL vmlinux 0xcff53400	kref_put
+EXPORT_SYMBOL vmlinux 0xd0181f4f	__bitmap_xor
+EXPORT_SYMBOL vmlinux 0xd018bd0d	scsi_target_quiesce
+EXPORT_SYMBOL vmlinux 0xd020d44a	__ht_create_irq
+EXPORT_SYMBOL vmlinux 0xd0551ab5	skb_copy_datagram_iovec
+EXPORT_SYMBOL vmlinux 0xd05b39d3	dmam_alloc_coherent
+EXPORT_SYMBOL vmlinux 0xd05e5331	__scsi_device_lookup
+EXPORT_SYMBOL vmlinux 0xd08197fa	acpi_load_tables
+EXPORT_SYMBOL vmlinux 0xd0a79f01	wait_for_key_construction
+EXPORT_SYMBOL vmlinux 0xd0c1770a	security_sb_set_mnt_opts
+EXPORT_SYMBOL vmlinux 0xd0c7018b	spi_attach_transport
+EXPORT_SYMBOL vmlinux 0xd0c7c5b3	input_event
+EXPORT_SYMBOL vmlinux 0xd0ee38b8	schedule_timeout_uninterruptible
+EXPORT_SYMBOL vmlinux 0xd0fef3b2	agp_free_key
+EXPORT_SYMBOL vmlinux 0xd130ffa5	phy_ethtool_sset
+EXPORT_SYMBOL vmlinux 0xd1472061	acpi_pci_register_driver
+EXPORT_SYMBOL vmlinux 0xd14def07	ethtool_op_set_tx_csum
+EXPORT_SYMBOL vmlinux 0xd15b6edc	skb_queue_head
+EXPORT_SYMBOL vmlinux 0xd18b6eb2	acpi_unmap_lsapic
+EXPORT_SYMBOL vmlinux 0xd191c408	generic_error_remove_page
+EXPORT_SYMBOL vmlinux 0xd191dddb	tty_devnum
+EXPORT_SYMBOL vmlinux 0xd19bb294	acpi_install_address_space_handler
+EXPORT_SYMBOL vmlinux 0xd1a4fbd2	lease_modify
+EXPORT_SYMBOL vmlinux 0xd1ae50df	dev_alloc_name
+EXPORT_SYMBOL vmlinux 0xd1e41b27	tcp_tso_segment
+EXPORT_SYMBOL vmlinux 0xd1f6c5f3	smp_num_siblings
+EXPORT_SYMBOL vmlinux 0xd1f91bcd	dev_base_lock
+EXPORT_SYMBOL vmlinux 0xd1fb71fa	acpi_match_device_ids
+EXPORT_SYMBOL vmlinux 0xd1fb98c2	scsi_print_sense
+EXPORT_SYMBOL vmlinux 0xd2000c31	spi_release_transport
+EXPORT_SYMBOL vmlinux 0xd2235d73	clocksource_register
+EXPORT_SYMBOL vmlinux 0xd22fb0ae	tcf_hash_search
+EXPORT_SYMBOL vmlinux 0xd251d7b0	security_socket_getpeersec_dgram
+EXPORT_SYMBOL vmlinux 0xd25541de	atomic_dec_and_mutex_lock
+EXPORT_SYMBOL vmlinux 0xd2555f19	jiffies_64_to_clock_t
+EXPORT_SYMBOL vmlinux 0xd25d4f74	console_blank_hook
+EXPORT_SYMBOL vmlinux 0xd25ea439	end_buffer_write_sync
+EXPORT_SYMBOL vmlinux 0xd25ec88e	unregister_qdisc
+EXPORT_SYMBOL vmlinux 0xd267d42c	down_killable
+EXPORT_SYMBOL vmlinux 0xd2965f6f	kthread_should_stop
+EXPORT_SYMBOL vmlinux 0xd2a75ee0	dmi_first_match
+EXPORT_SYMBOL vmlinux 0xd2b521a4	skb_copy_expand
+EXPORT_SYMBOL vmlinux 0xd2b8927d	key_type_keyring
+EXPORT_SYMBOL vmlinux 0xd2c47588	compat_sock_common_getsockopt
+EXPORT_SYMBOL vmlinux 0xd2f3a40d	tcp_hashinfo
+EXPORT_SYMBOL vmlinux 0xd31fdf18	tcf_em_unregister
+EXPORT_SYMBOL vmlinux 0xd326ee94	vfs_readv
+EXPORT_SYMBOL vmlinux 0xd32e65b9	neigh_event_ns
+EXPORT_SYMBOL vmlinux 0xd34283a3	nf_register_queue_handler
+EXPORT_SYMBOL vmlinux 0xd34f0c62	gen_pool_create
+EXPORT_SYMBOL vmlinux 0xd3730689	filemap_flush
+EXPORT_SYMBOL vmlinux 0xd3951da4	acpi_resource_to_address64
+EXPORT_SYMBOL vmlinux 0xd39af39c	skb_add_rx_frag
+EXPORT_SYMBOL vmlinux 0xd3a1a9cb	misc_register
+EXPORT_SYMBOL vmlinux 0xd3af979c	memdup_user
+EXPORT_SYMBOL vmlinux 0xd3d04654	end_buffer_async_write
+EXPORT_SYMBOL vmlinux 0xd3d319ae	tcp_v4_syn_recv_sock
+EXPORT_SYMBOL vmlinux 0xd3e1ffc9	agp_unbind_memory
+EXPORT_SYMBOL vmlinux 0xd3e46ff3	init_file
+EXPORT_SYMBOL vmlinux 0xd3e72f0f	rtc_dev_update_irq_enable_emul
+EXPORT_SYMBOL vmlinux 0xd3f09a65	agp_generic_insert_memory
+EXPORT_SYMBOL vmlinux 0xd3f74cf1	interruptible_sleep_on_timeout
+EXPORT_SYMBOL vmlinux 0xd3f75d78	cdrom_mode_select
+EXPORT_SYMBOL vmlinux 0xd3fc054e	wake_up_process
+EXPORT_SYMBOL vmlinux 0xd42b7232	_write_unlock_bh
+EXPORT_SYMBOL vmlinux 0xd42d0572	pci_iounmap
+EXPORT_SYMBOL vmlinux 0xd437bc18	mark_page_accessed
+EXPORT_SYMBOL vmlinux 0xd43f1f2b	mmc_host_enable
+EXPORT_SYMBOL vmlinux 0xd4447ea4	security_path_link
+EXPORT_SYMBOL vmlinux 0xd44ce8d3	pcim_iomap_regions
+EXPORT_SYMBOL vmlinux 0xd4885b21	pci_do_scan_bus
+EXPORT_SYMBOL vmlinux 0xd48953c8	register_gifconf
+EXPORT_SYMBOL vmlinux 0xd4950509	xfrm4_rcv
+EXPORT_SYMBOL vmlinux 0xd49fd7fc	sock_alloc_send_skb
+EXPORT_SYMBOL vmlinux 0xd4ca9a22	ioctl_by_bdev
+EXPORT_SYMBOL vmlinux 0xd4d7205d	clocksource_change_rating
+EXPORT_SYMBOL vmlinux 0xd50ef5c3	pci_bus_alloc_resource
+EXPORT_SYMBOL vmlinux 0xd50fef48	acpi_detach_data
+EXPORT_SYMBOL vmlinux 0xd51f19d0	acpi_device_hid
+EXPORT_SYMBOL vmlinux 0xd5263820	mb_cache_destroy
+EXPORT_SYMBOL vmlinux 0xd538e196	phy_driver_unregister
+EXPORT_SYMBOL vmlinux 0xd53cfe46	lock_may_write
+EXPORT_SYMBOL vmlinux 0xd556ace5	cpufreq_get_policy
+EXPORT_SYMBOL vmlinux 0xd57f8789	iommu_num_pages
+EXPORT_SYMBOL vmlinux 0xd580274f	compat_mc_setsockopt
+EXPORT_SYMBOL vmlinux 0xd58bab49	__mod_zone_page_state
+EXPORT_SYMBOL vmlinux 0xd58f50d6	mark_info_dirty
+EXPORT_SYMBOL vmlinux 0xd5c17c32	pcix_set_mmrbc
+EXPORT_SYMBOL vmlinux 0xd5c7c61d	sysctl_string
+EXPORT_SYMBOL vmlinux 0xd5e97436	mmc_wait_for_cmd
+EXPORT_SYMBOL vmlinux 0xd5eac736	bio_put
+EXPORT_SYMBOL vmlinux 0xd5fc8a4f	pci_request_selected_regions_exclusive
+EXPORT_SYMBOL vmlinux 0xd604507b	agp_put_bridge
+EXPORT_SYMBOL vmlinux 0xd6096398	cfb_fillrect
+EXPORT_SYMBOL vmlinux 0xd60b76cd	skb_free_datagram
+EXPORT_SYMBOL vmlinux 0xd60d7af4	ida_remove
+EXPORT_SYMBOL vmlinux 0xd61068e2	netpoll_setup
+EXPORT_SYMBOL vmlinux 0xd61a9745	simple_transaction_set
+EXPORT_SYMBOL vmlinux 0xd62c833f	schedule_timeout
+EXPORT_SYMBOL vmlinux 0xd63c6963	sock_no_getname
+EXPORT_SYMBOL vmlinux 0xd64a9518	vlan_gro_frags
+EXPORT_SYMBOL vmlinux 0xd6537632	kick_iocb
+EXPORT_SYMBOL vmlinux 0xd67b01b1	pnp_request_card_device
+EXPORT_SYMBOL vmlinux 0xd6a78d08	smp_call_function_single
+EXPORT_SYMBOL vmlinux 0xd6b33026	cpu_khz
+EXPORT_SYMBOL vmlinux 0xd6d68c6b	vm_stat
+EXPORT_SYMBOL vmlinux 0xd6ee688f	vmalloc
+EXPORT_SYMBOL vmlinux 0xd700b79b	current_fs_time
+EXPORT_SYMBOL vmlinux 0xd7455297	phy_start
+EXPORT_SYMBOL vmlinux 0xd77a5aa5	__bitmap_and
+EXPORT_SYMBOL vmlinux 0xd7873d4b	generic_file_llseek_unlocked
+EXPORT_SYMBOL vmlinux 0xd79b5a02	allow_signal
+EXPORT_SYMBOL vmlinux 0xd79b93b0	vga_get
+EXPORT_SYMBOL vmlinux 0xd7a6fafa	panic_notifier_list
+EXPORT_SYMBOL vmlinux 0xd7d0dbc2	netif_rx
+EXPORT_SYMBOL vmlinux 0xd7dd777b	reserve_perfctr_nmi
+EXPORT_SYMBOL vmlinux 0xd7eee5ed	nobh_writepage
+EXPORT_SYMBOL vmlinux 0xd8045ce7	vfs_getattr
+EXPORT_SYMBOL vmlinux 0xd813ae52	netdev_class_create_file
+EXPORT_SYMBOL vmlinux 0xd83791bc	nf_conntrack_destroy
+EXPORT_SYMBOL vmlinux 0xd849cc9c	sk_wait_data
+EXPORT_SYMBOL vmlinux 0xd849de12	pcix_get_max_mmrbc
+EXPORT_SYMBOL vmlinux 0xd851af78	up_write
+EXPORT_SYMBOL vmlinux 0xd85fea77	journal_forget
+EXPORT_SYMBOL vmlinux 0xd89da37f	movable_zone
+EXPORT_SYMBOL vmlinux 0xd8b89a0b	thermal_zone_bind_cooling_device
+EXPORT_SYMBOL vmlinux 0xd8d61f5f	neigh_seq_next
+EXPORT_SYMBOL vmlinux 0xd8e484f0	register_chrdev_region
+EXPORT_SYMBOL vmlinux 0xd8f9dc63	d_obtain_alias
+EXPORT_SYMBOL vmlinux 0xd9091363	acpi_install_notify_handler
+EXPORT_SYMBOL vmlinux 0xd913e6a7	scsi_device_lookup
+EXPORT_SYMBOL vmlinux 0xd917c158	per_cpu__node_number
+EXPORT_SYMBOL vmlinux 0xd92a54a9	scsi_host_alloc
+EXPORT_SYMBOL vmlinux 0xd92d0bca	pci_bus_write_config_dword
+EXPORT_SYMBOL vmlinux 0xd93ec026	vm_map_ram
+EXPORT_SYMBOL vmlinux 0xd95dbd81	sk_stop_timer
+EXPORT_SYMBOL vmlinux 0xd96a4ba8	skb_split
+EXPORT_SYMBOL vmlinux 0xd985dc99	mempool_free_pages
+EXPORT_SYMBOL vmlinux 0xd99c68db	xfrm_unregister_km
+EXPORT_SYMBOL vmlinux 0xd9e34436	dquot_scan_active
+EXPORT_SYMBOL vmlinux 0xd9e57b4a	scsi_init_io
+EXPORT_SYMBOL vmlinux 0xda084228	page_zero_new_buffers
+EXPORT_SYMBOL vmlinux 0xda0a6b0e	acpi_map_lsapic
+EXPORT_SYMBOL vmlinux 0xda1a7335	kasprintf
+EXPORT_SYMBOL vmlinux 0xda25d19f	ipv4_specific
+EXPORT_SYMBOL vmlinux 0xda4629e4	radix_tree_insert
+EXPORT_SYMBOL vmlinux 0xda577d84	dma_async_device_unregister
+EXPORT_SYMBOL vmlinux 0xda6b758d	kmem_cache_shrink
+EXPORT_SYMBOL vmlinux 0xda721bca	skb_copy_and_csum_dev
+EXPORT_SYMBOL vmlinux 0xda7c8ce8	skb_gro_reset_offset
+EXPORT_SYMBOL vmlinux 0xda7ca6cb	fb_mode_is_equal
+EXPORT_SYMBOL vmlinux 0xda8af7ad	fb_find_nearest_mode
+EXPORT_SYMBOL vmlinux 0xda928914	nmi_watchdog
+EXPORT_SYMBOL vmlinux 0xdada7c00	__break_lease
+EXPORT_SYMBOL vmlinux 0xdadbd1ca	swiotlb_map_sg_attrs
+EXPORT_SYMBOL vmlinux 0xdb23c7e5	tty_port_free_xmit_buf
+EXPORT_SYMBOL vmlinux 0xdb6dbd52	mdiobus_scan
+EXPORT_SYMBOL vmlinux 0xdbcd416e	sysctl_ip_nonlocal_bind
+EXPORT_SYMBOL vmlinux 0xdc047fc4	scsi_dev_info_list_add_keyed
+EXPORT_SYMBOL vmlinux 0xdc053205	udp_memory_allocated
+EXPORT_SYMBOL vmlinux 0xdc09deb5	pcie_set_readrq
+EXPORT_SYMBOL vmlinux 0xdc11b50b	jbd2_journal_load
+EXPORT_SYMBOL vmlinux 0xdc14eda7	pci_pci_problems
+EXPORT_SYMBOL vmlinux 0xdc2adb35	add_taint
+EXPORT_SYMBOL vmlinux 0xdc3a8178	sock_no_accept
+EXPORT_SYMBOL vmlinux 0xdc43a9c8	daemonize
+EXPORT_SYMBOL vmlinux 0xdc4c35fd	xfrm_input_resume
+EXPORT_SYMBOL vmlinux 0xdc52d8d5	dquot_alloc_inode
+EXPORT_SYMBOL vmlinux 0xdc6eef47	uart_remove_one_port
+EXPORT_SYMBOL vmlinux 0xdc70df8a	seq_release_private
+EXPORT_SYMBOL vmlinux 0xdc7c1c0c	fb_blank
+EXPORT_SYMBOL vmlinux 0xdc873a70	screen_info
+EXPORT_SYMBOL vmlinux 0xdca0e950	genl_register_family
+EXPORT_SYMBOL vmlinux 0xdca5fb14	put_page
+EXPORT_SYMBOL vmlinux 0xdcaeb500	vfs_quota_off
+EXPORT_SYMBOL vmlinux 0xdcb0349b	sys_close
+EXPORT_SYMBOL vmlinux 0xdcb0c0aa	ipv6_getsockopt
+EXPORT_SYMBOL vmlinux 0xdccf8e53	simple_dir_inode_operations
+EXPORT_SYMBOL vmlinux 0xdcd59834	tcf_generic_walker
+EXPORT_SYMBOL vmlinux 0xdcf9fb7c	tcp_alloc_md5sig_pool
+EXPORT_SYMBOL vmlinux 0xdcfca25c	pci_scan_bridge
+EXPORT_SYMBOL vmlinux 0xdd19a7ae	x86_dma_fallback_dev
+EXPORT_SYMBOL vmlinux 0xdd2a2937	block_commit_write
+EXPORT_SYMBOL vmlinux 0xdd88dde2	generic_fillattr
+EXPORT_SYMBOL vmlinux 0xdda703a2	journal_create
+EXPORT_SYMBOL vmlinux 0xdda836dd	tcp_proc_unregister
+EXPORT_SYMBOL vmlinux 0xdda85e1e	____pagevec_lru_add
+EXPORT_SYMBOL vmlinux 0xdde25fae	udp_lib_getsockopt
+EXPORT_SYMBOL vmlinux 0xddf66d0c	flush_signals
+EXPORT_SYMBOL vmlinux 0xde0bdcff	memset
+EXPORT_SYMBOL vmlinux 0xde21ee5e	mmc_host_lazy_disable
+EXPORT_SYMBOL vmlinux 0xde2fca97	input_set_capability
+EXPORT_SYMBOL vmlinux 0xde31b902	blk_limits_io_opt
+EXPORT_SYMBOL vmlinux 0xde5b9bb9	phy_start_interrupts
+EXPORT_SYMBOL vmlinux 0xde75b689	set_irq_type
+EXPORT_SYMBOL vmlinux 0xde79ffd9	register_console
+EXPORT_SYMBOL vmlinux 0xde9360ba	totalram_pages
+EXPORT_SYMBOL vmlinux 0xde9b17ed	agp3_generic_fetch_size
+EXPORT_SYMBOL vmlinux 0xdecca77d	skb_free_datagram_locked
+EXPORT_SYMBOL vmlinux 0xdefae4cf	read_cache_page
+EXPORT_SYMBOL vmlinux 0xdf027500	agp_backend_release
+EXPORT_SYMBOL vmlinux 0xdf0da3cc	acpi_get_devices
+EXPORT_SYMBOL vmlinux 0xdf0e597c	pci_dev_driver
+EXPORT_SYMBOL vmlinux 0xdf2001d3	file_remove_suid
+EXPORT_SYMBOL vmlinux 0xdf2d6584	register_key_type
+EXPORT_SYMBOL vmlinux 0xdf4bcd71	bio_add_pc_page
+EXPORT_SYMBOL vmlinux 0xdf4c8767	ns_to_timeval
+EXPORT_SYMBOL vmlinux 0xdf60cc27	__print_symbol
+EXPORT_SYMBOL vmlinux 0xdf6d16bd	uart_add_one_port
+EXPORT_SYMBOL vmlinux 0xdf8c695a	__ndelay
+EXPORT_SYMBOL vmlinux 0xdf929370	fs_overflowgid
+EXPORT_SYMBOL vmlinux 0xdfa89108	scsi_get_command
+EXPORT_SYMBOL vmlinux 0xdfb07805	should_remove_suid
+EXPORT_SYMBOL vmlinux 0xdfb7bada	acpi_check_resource_conflict
+EXPORT_SYMBOL vmlinux 0xdfc5169b	slhc_init
+EXPORT_SYMBOL vmlinux 0xdfdff17b	seq_putc
+EXPORT_SYMBOL vmlinux 0xe0686d3e	__lock_page
+EXPORT_SYMBOL vmlinux 0xe06a710a	sock_alloc_send_pskb
+EXPORT_SYMBOL vmlinux 0xe06e4199	cpu_all_bits
+EXPORT_SYMBOL vmlinux 0xe075d6eb	iter_div_u64_rem
+EXPORT_SYMBOL vmlinux 0xe0a111dd	tty_port_raise_dtr_rts
+EXPORT_SYMBOL vmlinux 0xe0ac8bd2	acpi_bus_generate_netlink_event
+EXPORT_SYMBOL vmlinux 0xe0b13336	argv_free
+EXPORT_SYMBOL vmlinux 0xe0ba3e76	kernel_sendmsg
+EXPORT_SYMBOL vmlinux 0xe0bc24a1	param_set_ushort
+EXPORT_SYMBOL vmlinux 0xe0dcb911	smp_call_function_many
+EXPORT_SYMBOL vmlinux 0xe0e7b70c	__nla_put
+EXPORT_SYMBOL vmlinux 0xe10815fe	nf_unregister_hook
+EXPORT_SYMBOL vmlinux 0xe113bbbc	csum_partial
+EXPORT_SYMBOL vmlinux 0xe114a44d	alloc_netdev_mq
+EXPORT_SYMBOL vmlinux 0xe11ae492	generic_write_checks
+EXPORT_SYMBOL vmlinux 0xe13cd8a7	dmi_name_in_vendors
+EXPORT_SYMBOL vmlinux 0xe149b12a	i2c_smbus_read_byte_data
+EXPORT_SYMBOL vmlinux 0xe14da631	bio_unmap_user
+EXPORT_SYMBOL vmlinux 0xe15c16f5	dquot_transfer
+EXPORT_SYMBOL vmlinux 0xe1761617	security_inet_conn_request
+EXPORT_SYMBOL vmlinux 0xe18f521a	tty_get_baud_rate
+EXPORT_SYMBOL vmlinux 0xe1a81c3a	icmpv6msg_statistics
+EXPORT_SYMBOL vmlinux 0xe1ad5323	agp_alloc_bridge
+EXPORT_SYMBOL vmlinux 0xe1b7f532	dquot_claim_space
+EXPORT_SYMBOL vmlinux 0xe1d6dcb2	__bread
+EXPORT_SYMBOL vmlinux 0xe1ddf621	inet_release
+EXPORT_SYMBOL vmlinux 0xe1ebb496	key_put
+EXPORT_SYMBOL vmlinux 0xe210ac7c	tcp_recvmsg
+EXPORT_SYMBOL vmlinux 0xe2303b47	udp_lib_get_port
+EXPORT_SYMBOL vmlinux 0xe23ae481	blk_iopoll_complete
+EXPORT_SYMBOL vmlinux 0xe23d7acb	up_read
+EXPORT_SYMBOL vmlinux 0xe24050c7	scnprintf
+EXPORT_SYMBOL vmlinux 0xe2494d54	bio_integrity_free
+EXPORT_SYMBOL vmlinux 0xe24d3a97	jiffies_64
+EXPORT_SYMBOL vmlinux 0xe278f861	xfrm_state_register_afinfo
+EXPORT_SYMBOL vmlinux 0xe296402e	bio_map_kern
+EXPORT_SYMBOL vmlinux 0xe2993f38	do_splice_to
+EXPORT_SYMBOL vmlinux 0xe2999f1e	ndisc_build_skb
+EXPORT_SYMBOL vmlinux 0xe29b04e9	acpi_set_firmware_waking_vector64
+EXPORT_SYMBOL vmlinux 0xe2b50b94	dput
+EXPORT_SYMBOL vmlinux 0xe2cafc1f	mb_cache_entry_alloc
+EXPORT_SYMBOL vmlinux 0xe2d5255a	strcmp
+EXPORT_SYMBOL vmlinux 0xe2e12b5c	netdev_rx_csum_fault
+EXPORT_SYMBOL vmlinux 0xe2edb2f4	tr_type_trans
+EXPORT_SYMBOL vmlinux 0xe351d8c8	lock_fb_info
+EXPORT_SYMBOL vmlinux 0xe36e975f	genphy_resume
+EXPORT_SYMBOL vmlinux 0xe39262db	neigh_create
+EXPORT_SYMBOL vmlinux 0xe39add4a	__splice_from_pipe
+EXPORT_SYMBOL vmlinux 0xe3ae89c3	cdrom_ioctl
+EXPORT_SYMBOL vmlinux 0xe3b0192b	vscnprintf
+EXPORT_SYMBOL vmlinux 0xe3d9336f	call_usermodehelper_setcleanup
+EXPORT_SYMBOL vmlinux 0xe3e12008	__first_cpu
+EXPORT_SYMBOL vmlinux 0xe3e44bb0	dev_getfirstbyhwtype
+EXPORT_SYMBOL vmlinux 0xe3fbe148	acpi_install_table_handler
+EXPORT_SYMBOL vmlinux 0xe41c2992	generic_file_aio_write
+EXPORT_SYMBOL vmlinux 0xe4332e96	inet6_getname
+EXPORT_SYMBOL vmlinux 0xe43617f7	acpi_gbl_FADT
+EXPORT_SYMBOL vmlinux 0xe4451bb6	prepare_binprm
+EXPORT_SYMBOL vmlinux 0xe452fdca	genl_register_family_with_ops
+EXPORT_SYMBOL vmlinux 0xe456bd3a	complete
+EXPORT_SYMBOL vmlinux 0xe46236b0	get_sb_pseudo
+EXPORT_SYMBOL vmlinux 0xe471dc1f	journal_stop
+EXPORT_SYMBOL vmlinux 0xe484e35f	ioread32
+EXPORT_SYMBOL vmlinux 0xe4870354	_read_trylock
+EXPORT_SYMBOL vmlinux 0xe4b6d709	do_mmap_pgoff
+EXPORT_SYMBOL vmlinux 0xe4b726cb	blk_recount_segments
+EXPORT_SYMBOL vmlinux 0xe4c1df3e	_read_lock_bh
+EXPORT_SYMBOL vmlinux 0xe4f1695e	cookie_check_timestamp
+EXPORT_SYMBOL vmlinux 0xe5030309	pci_enable_device
+EXPORT_SYMBOL vmlinux 0xe5117eef	netpoll_parse_options
+EXPORT_SYMBOL vmlinux 0xe51336dc	pci_remove_bus
+EXPORT_SYMBOL vmlinux 0xe51c1a55	xfrm_state_delete_tunnel
+EXPORT_SYMBOL vmlinux 0xe523ad75	synchronize_irq
+EXPORT_SYMBOL vmlinux 0xe52947e7	__phys_addr
+EXPORT_SYMBOL vmlinux 0xe5324f5a	generic_block_bmap
+EXPORT_SYMBOL vmlinux 0xe53817d0	phy_enable_interrupts
+EXPORT_SYMBOL vmlinux 0xe5776d22	bdget
+EXPORT_SYMBOL vmlinux 0xe57878a1	in6_pton
+EXPORT_SYMBOL vmlinux 0xe5867808	dlci_ioctl_set
+EXPORT_SYMBOL vmlinux 0xe5a51f6a	blk_rq_init
+EXPORT_SYMBOL vmlinux 0xe5b4c89a	acpi_lock_battery_dir
+EXPORT_SYMBOL vmlinux 0xe5c78a99	do_blank_screen
+EXPORT_SYMBOL vmlinux 0xe5eb5437	dev_unicast_sync
+EXPORT_SYMBOL vmlinux 0xe5ed5467	xfrm_policy_walk_init
+EXPORT_SYMBOL vmlinux 0xe61ea76c	mmc_request_done
+EXPORT_SYMBOL vmlinux 0xe690b8fd	__ipv6_isatap_ifid
+EXPORT_SYMBOL vmlinux 0xe697d108	__blk_iopoll_complete
+EXPORT_SYMBOL vmlinux 0xe6ada18e	xfrm_input
+EXPORT_SYMBOL vmlinux 0xe6bef5b5	skb_trim
+EXPORT_SYMBOL vmlinux 0xe6fb675c	node_to_cpumask_map
+EXPORT_SYMBOL vmlinux 0xe6fbe430	can_do_mlock
+EXPORT_SYMBOL vmlinux 0xe714375c	__tasklet_hi_schedule_first
+EXPORT_SYMBOL vmlinux 0xe716baed	acpi_unregister_ioapic
+EXPORT_SYMBOL vmlinux 0xe7337792	spi_dv_device
+EXPORT_SYMBOL vmlinux 0xe757024a	unregister_sysctl_table
+EXPORT_SYMBOL vmlinux 0xe786168c	rwsem_down_write_failed
+EXPORT_SYMBOL vmlinux 0xe7a7a647	blk_queue_dma_alignment
+EXPORT_SYMBOL vmlinux 0xe7c0d2e0	nla_put
+EXPORT_SYMBOL vmlinux 0xe7c2e0bc	iw_handler_set_thrspy
+EXPORT_SYMBOL vmlinux 0xe7c63588	blk_rq_map_integrity_sg
+EXPORT_SYMBOL vmlinux 0xe7d2aca1	security_sk_classify_flow
+EXPORT_SYMBOL vmlinux 0xe7d32407	nmi_active
+EXPORT_SYMBOL vmlinux 0xe7d4daac	seq_list_next
+EXPORT_SYMBOL vmlinux 0xe7e34570	__f_setown
+EXPORT_SYMBOL vmlinux 0xe7e7c08f	__netif_schedule
+EXPORT_SYMBOL vmlinux 0xe7f3b5ce	kblockd_schedule_work
+EXPORT_SYMBOL vmlinux 0xe80c9622	pci_fixup_cardbus
+EXPORT_SYMBOL vmlinux 0xe80ce219	sysctl_tcp_dma_copybreak
+EXPORT_SYMBOL vmlinux 0xe8116e08	__kmalloc_node
+EXPORT_SYMBOL vmlinux 0xe82ab2e6	pagevec_lookup_tag
+EXPORT_SYMBOL vmlinux 0xe85060c1	kobject_del
+EXPORT_SYMBOL vmlinux 0xe85e3efe	ps2_sendbyte
+EXPORT_SYMBOL vmlinux 0xe8794ce1	slhc_toss
+EXPORT_SYMBOL vmlinux 0xe8a3605f	acpi_processor_set_thermal_limit
+EXPORT_SYMBOL vmlinux 0xe8c49fa6	llc_set_station_handler
+EXPORT_SYMBOL vmlinux 0xe8ca20c9	console_start
+EXPORT_SYMBOL vmlinux 0xe8cd902e	hweight16
+EXPORT_SYMBOL vmlinux 0xe8dbafef	__next_cpu
+EXPORT_SYMBOL vmlinux 0xe8ee56ff	xfrm_state_check_expire
+EXPORT_SYMBOL vmlinux 0xe90dcae0	__request_module
+EXPORT_SYMBOL vmlinux 0xe914e41e	strcpy
+EXPORT_SYMBOL vmlinux 0xe91d2a2f	neigh_sysctl_unregister
+EXPORT_SYMBOL vmlinux 0xe95c7e15	pci_find_next_bus
+EXPORT_SYMBOL vmlinux 0xe997667b	wrmsr_on_cpu
+EXPORT_SYMBOL vmlinux 0xe99976a4	dquot_release_reserved_space
+EXPORT_SYMBOL vmlinux 0xe9a2834b	inet6_unregister_protosw
+EXPORT_SYMBOL vmlinux 0xe9a7ed63	skb_checksum_help
+EXPORT_SYMBOL vmlinux 0xe9b65595	tty_port_lower_dtr_rts
+EXPORT_SYMBOL vmlinux 0xe9e896af	journal_errno
+EXPORT_SYMBOL vmlinux 0xea033859	ip_xfrm_me_harder
+EXPORT_SYMBOL vmlinux 0xea054b22	nla_policy_len
+EXPORT_SYMBOL vmlinux 0xea10212a	int_to_scsilun
+EXPORT_SYMBOL vmlinux 0xea10655a	__bitmap_intersects
+EXPORT_SYMBOL vmlinux 0xea147363	printk
+EXPORT_SYMBOL vmlinux 0xea3f3fea	pci_request_region
+EXPORT_SYMBOL vmlinux 0xea45e9d0	page_follow_link_light
+EXPORT_SYMBOL vmlinux 0xea547374	generic_splice_sendpage
+EXPORT_SYMBOL vmlinux 0xea7cb99e	neigh_lookup
+EXPORT_SYMBOL vmlinux 0xea90bdd3	acpi_attach_data
+EXPORT_SYMBOL vmlinux 0xea99a61f	__lookup_one_len
+EXPORT_SYMBOL vmlinux 0xeaaaca5c	dev_addr_add
+EXPORT_SYMBOL vmlinux 0xead376d5	pci_find_capability
+EXPORT_SYMBOL vmlinux 0xead58fb9	print_hex_dump
+EXPORT_SYMBOL vmlinux 0xeae3dfd6	__const_udelay
+EXPORT_SYMBOL vmlinux 0xeaeaa2ac	tcf_exts_dump
+EXPORT_SYMBOL vmlinux 0xeb07850f	scsi_host_lookup
+EXPORT_SYMBOL vmlinux 0xeb1fabf6	interruptible_sleep_on
+EXPORT_SYMBOL vmlinux 0xeb667aff	vlan_dev_vlan_id
+EXPORT_SYMBOL vmlinux 0xeb888c2b	eth_header
+EXPORT_SYMBOL vmlinux 0xeb8f54b3	strstrip
+EXPORT_SYMBOL vmlinux 0xebaeb27f	pci_map_rom
+EXPORT_SYMBOL vmlinux 0xebbf1dba	strncasecmp
+EXPORT_SYMBOL vmlinux 0xebc1d6af	napi_gro_flush
+EXPORT_SYMBOL vmlinux 0xebc778a2	nf_log_unregister
+EXPORT_SYMBOL vmlinux 0xebd273a6	strict_strtoull
+EXPORT_SYMBOL vmlinux 0xebf1509b	clocksource_unregister
+EXPORT_SYMBOL vmlinux 0xec0b23bd	iw_handler_set_spy
+EXPORT_SYMBOL vmlinux 0xec10e0a5	inet_csk_init_xmit_timers
+EXPORT_SYMBOL vmlinux 0xec2dccbb	call_usermodehelper_stdinpipe
+EXPORT_SYMBOL vmlinux 0xec353249	inet_select_addr
+EXPORT_SYMBOL vmlinux 0xec6510ce	nla_append
+EXPORT_SYMBOL vmlinux 0xec71a622	try_to_release_page
+EXPORT_SYMBOL vmlinux 0xec794ba0	__send_remote_softirq
+EXPORT_SYMBOL vmlinux 0xec7f42c3	blk_queue_ordered
+EXPORT_SYMBOL vmlinux 0xec7f92c7	blkdev_issue_flush
+EXPORT_SYMBOL vmlinux 0xec87b9df	dentry_open
+EXPORT_SYMBOL vmlinux 0xec901038	xfrm4_rcv_encap
+EXPORT_SYMBOL vmlinux 0xeca67051	xfrm_unregister_mode
+EXPORT_SYMBOL vmlinux 0xecd65369	dev_unicast_delete
+EXPORT_SYMBOL vmlinux 0xecde1418	_spin_lock_irq
+EXPORT_SYMBOL vmlinux 0xecdf0905	journal_update_format
+EXPORT_SYMBOL vmlinux 0xece1a4a6	pcie_port_service_register
+EXPORT_SYMBOL vmlinux 0xed0cf782	console_stop
+EXPORT_SYMBOL vmlinux 0xed17f39f	scsi_scan_host
+EXPORT_SYMBOL vmlinux 0xed2360e6	i2c_smbus_process_call
+EXPORT_SYMBOL vmlinux 0xed2abb9b	sync_blockdev
+EXPORT_SYMBOL vmlinux 0xed699583	d_alloc
+EXPORT_SYMBOL vmlinux 0xed925409	blk_queue_stack_limits
+EXPORT_SYMBOL vmlinux 0xeda0d76e	gen_estimator_active
+EXPORT_SYMBOL vmlinux 0xeda88260	__scm_destroy
+EXPORT_SYMBOL vmlinux 0xedbaee5e	nla_strcmp
+EXPORT_SYMBOL vmlinux 0xedc03953	iounmap
+EXPORT_SYMBOL vmlinux 0xedf40cb5	__serio_register_port
+EXPORT_SYMBOL vmlinux 0xee2d0fc7	_local_bh_enable
+EXPORT_SYMBOL vmlinux 0xee4535a4	__bio_clone
+EXPORT_SYMBOL vmlinux 0xee7eb9e1	pnp_platform_devices
+EXPORT_SYMBOL vmlinux 0xeea2a56e	jbd2_journal_dirty_metadata
+EXPORT_SYMBOL vmlinux 0xeea9dbaf	bitmap_bitremap
+EXPORT_SYMBOL vmlinux 0xeeab51b6	set_pages_uc
+EXPORT_SYMBOL vmlinux 0xeebb2f26	sb_set_blocksize
+EXPORT_SYMBOL vmlinux 0xeec1216c	mmc_resume_host
+EXPORT_SYMBOL vmlinux 0xef4376e4	seq_open_private
+EXPORT_SYMBOL vmlinux 0xef45414c	buffer_migrate_page
+EXPORT_SYMBOL vmlinux 0xef49d0cf	pci_bus_assign_resources
+EXPORT_SYMBOL vmlinux 0xef52afb5	nf_register_hook
+EXPORT_SYMBOL vmlinux 0xef6ed1ba	param_set_invbool
+EXPORT_SYMBOL vmlinux 0xef80c3cb	__invalidate_device
+EXPORT_SYMBOL vmlinux 0xef8643b6	input_register_handler
+EXPORT_SYMBOL vmlinux 0xef89e54c	__xfrm_policy_check
+EXPORT_SYMBOL vmlinux 0xef9aedfc	boot_option_idle_override
+EXPORT_SYMBOL vmlinux 0xefb19ce9	dma_async_memcpy_pg_to_pg
+EXPORT_SYMBOL vmlinux 0xefb40ed9	acpi_processor_register_performance
+EXPORT_SYMBOL vmlinux 0xefd41342	netdev_features_change
+EXPORT_SYMBOL vmlinux 0xefdb63aa	genphy_config_aneg
+EXPORT_SYMBOL vmlinux 0xefdd70ce	security_secid_to_secctx
+EXPORT_SYMBOL vmlinux 0xefe099c3	acpi_get_event_status
+EXPORT_SYMBOL vmlinux 0xeffcd465	pci_dev_get
+EXPORT_SYMBOL vmlinux 0xf0009fee	put_pages_list
+EXPORT_SYMBOL vmlinux 0xf042baad	icmp_send
+EXPORT_SYMBOL vmlinux 0xf0508054	fb_get_mode
+EXPORT_SYMBOL vmlinux 0xf05dc059	blk_queue_bounce_limit
+EXPORT_SYMBOL vmlinux 0xf065f629	ioread16be
+EXPORT_SYMBOL vmlinux 0xf06ee499	nf_log_bind_pf
+EXPORT_SYMBOL vmlinux 0xf0a1eb05	__xfrm_state_destroy
+EXPORT_SYMBOL vmlinux 0xf0df80da	neigh_changeaddr
+EXPORT_SYMBOL vmlinux 0xf0ef15b4	list_sort
+EXPORT_SYMBOL vmlinux 0xf0f1246c	kvasprintf
+EXPORT_SYMBOL vmlinux 0xf0f1fd18	phy_start_aneg
+EXPORT_SYMBOL vmlinux 0xf0fdf6cb	__stack_chk_fail
+EXPORT_SYMBOL vmlinux 0xf106ecb3	acpi_evaluate_object_typed
+EXPORT_SYMBOL vmlinux 0xf10de535	ioread8
+EXPORT_SYMBOL vmlinux 0xf10e5c22	skb_over_panic
+EXPORT_SYMBOL vmlinux 0xf11543ff	find_first_zero_bit
+EXPORT_SYMBOL vmlinux 0xf116d4b5	copy_in_user
+EXPORT_SYMBOL vmlinux 0xf141d89d	sock_wmalloc
+EXPORT_SYMBOL vmlinux 0xf14861a9	scsi_cmd_print_sense_hdr
+EXPORT_SYMBOL vmlinux 0xf16dad57	alloc_fddidev
+EXPORT_SYMBOL vmlinux 0xf174ed48	acquire_console_sem
+EXPORT_SYMBOL vmlinux 0xf195c682	fb_invert_cmaps
+EXPORT_SYMBOL vmlinux 0xf1cf0b9e	disk_stack_limits
+EXPORT_SYMBOL vmlinux 0xf1d64416	gen_new_estimator
+EXPORT_SYMBOL vmlinux 0xf1db1704	nla_memcpy
+EXPORT_SYMBOL vmlinux 0xf1e82ecc	fb_firmware_edid
+EXPORT_SYMBOL vmlinux 0xf1e98c74	avenrun
+EXPORT_SYMBOL vmlinux 0xf20dabd8	free_irq
+EXPORT_SYMBOL vmlinux 0xf20e73c9	single_open
+EXPORT_SYMBOL vmlinux 0xf21c6ccd	agp_generic_free_by_type
+EXPORT_SYMBOL vmlinux 0xf221b71e	free_mdio_bitbang
+EXPORT_SYMBOL vmlinux 0xf2997713	tty_termios_hw_change
+EXPORT_SYMBOL vmlinux 0xf2b08b23	dev_kfree_skb_any
+EXPORT_SYMBOL vmlinux 0xf2ec1db0	dget_locked
+EXPORT_SYMBOL vmlinux 0xf305d7bc	genphy_suspend
+EXPORT_SYMBOL vmlinux 0xf313da4e	sha_transform
+EXPORT_SYMBOL vmlinux 0xf3341268	__clear_user
+EXPORT_SYMBOL vmlinux 0xf338d4c3	netlink_unregister_notifier
+EXPORT_SYMBOL vmlinux 0xf346231f	seq_list_start_head
+EXPORT_SYMBOL vmlinux 0xf35f075f	serial8250_register_port
+EXPORT_SYMBOL vmlinux 0xf397b9aa	__tasklet_schedule
+EXPORT_SYMBOL vmlinux 0xf3b62e11	blk_insert_request
+EXPORT_SYMBOL vmlinux 0xf3b9f3fb	cdev_alloc
+EXPORT_SYMBOL vmlinux 0xf3bf0bce	__bitmap_complement
+EXPORT_SYMBOL vmlinux 0xf3e33663	tty_register_driver
+EXPORT_SYMBOL vmlinux 0xf3e9e5a8	sock_common_setsockopt
+EXPORT_SYMBOL vmlinux 0xf3f967fc	per_cpu__current_task
+EXPORT_SYMBOL vmlinux 0xf441ac43	ioread8_rep
+EXPORT_SYMBOL vmlinux 0xf4501a53	set_pages_x
+EXPORT_SYMBOL vmlinux 0xf4528073	scsi_kmap_atomic_sg
+EXPORT_SYMBOL vmlinux 0xf4607155	pnp_disable_dev
+EXPORT_SYMBOL vmlinux 0xf48145b4	mmc_power_save_host
+EXPORT_SYMBOL vmlinux 0xf494f618	mmc_regulator_get_ocrmask
+EXPORT_SYMBOL vmlinux 0xf49ba0a7	tcp_mtup_init
+EXPORT_SYMBOL vmlinux 0xf4a5c213	avail_to_resrv_perfctr_nmi_bit
+EXPORT_SYMBOL vmlinux 0xf4ce9df2	da903x_query_status
+EXPORT_SYMBOL vmlinux 0xf4d356e7	genphy_config_advert
+EXPORT_SYMBOL vmlinux 0xf4f14de6	rtnl_trylock
+EXPORT_SYMBOL vmlinux 0xf4f52f93	dqstats
+EXPORT_SYMBOL vmlinux 0xf4fe06bf	xfrm_lookup
+EXPORT_SYMBOL vmlinux 0xf516372d	neigh_table_init_no_netlink
+EXPORT_SYMBOL vmlinux 0xf51ae235	touch_nmi_watchdog
+EXPORT_SYMBOL vmlinux 0xf53d4c26	qdisc_class_hash_destroy
+EXPORT_SYMBOL vmlinux 0xf57682c8	acpi_get_object_info
+EXPORT_SYMBOL vmlinux 0xf58ac6cd	vlan_gro_receive
+EXPORT_SYMBOL vmlinux 0xf591cf35	vfs_dq_transfer
+EXPORT_SYMBOL vmlinux 0xf5c013a2	delayed_slow_work_enqueue
+EXPORT_SYMBOL vmlinux 0xf5c830ec	truncate_pagecache
+EXPORT_SYMBOL vmlinux 0xf5c9012e	timespec_trunc
+EXPORT_SYMBOL vmlinux 0xf5e5ba8d	vfs_mknod
+EXPORT_SYMBOL vmlinux 0xf5eb86ea	blk_verify_command
+EXPORT_SYMBOL vmlinux 0xf60a342f	n_tty_ioctl_helper
+EXPORT_SYMBOL vmlinux 0xf60ac010	phy_device_register
+EXPORT_SYMBOL vmlinux 0xf6125dfa	__netdev_alloc_page
+EXPORT_SYMBOL vmlinux 0xf63117d9	scsi_report_bus_reset
+EXPORT_SYMBOL vmlinux 0xf666cbb3	__memcpy_fromio
+EXPORT_SYMBOL vmlinux 0xf6892a68	bdi_unregister
+EXPORT_SYMBOL vmlinux 0xf6a8161f	ip6_frag_match
+EXPORT_SYMBOL vmlinux 0xf6bb4729	color_table
+EXPORT_SYMBOL vmlinux 0xf6c0f905	dma_set_mask
+EXPORT_SYMBOL vmlinux 0xf6c207c1	block_write_full_page_endio
+EXPORT_SYMBOL vmlinux 0xf6ebc03b	net_ratelimit
+EXPORT_SYMBOL vmlinux 0xf6f18d82	skb_store_bits
+EXPORT_SYMBOL vmlinux 0xf7093a94	generic_getxattr
+EXPORT_SYMBOL vmlinux 0xf7100595	path_put
+EXPORT_SYMBOL vmlinux 0xf7185f02	xfrm4_prepare_output
+EXPORT_SYMBOL vmlinux 0xf749534a	gen_pool_free
+EXPORT_SYMBOL vmlinux 0xf74a63b5	x86_mce_decode_callback
+EXPORT_SYMBOL vmlinux 0xf7506c41	__any_online_cpu
+EXPORT_SYMBOL vmlinux 0xf7679e06	find_lock_page
+EXPORT_SYMBOL vmlinux 0xf780b769	tcp_make_synack
+EXPORT_SYMBOL vmlinux 0xf7877746	netpoll_cleanup
+EXPORT_SYMBOL vmlinux 0xf78d04ab	netlink_register_notifier
+EXPORT_SYMBOL vmlinux 0xf7969df4	seq_path
+EXPORT_SYMBOL vmlinux 0xf7b95cb7	brioctl_set
+EXPORT_SYMBOL vmlinux 0xf7bc1e99	pci_enable_msi_block
+EXPORT_SYMBOL vmlinux 0xf7c464b6	k8_northbridges
+EXPORT_SYMBOL vmlinux 0xf7efe0eb	input_unfilter_device
+EXPORT_SYMBOL vmlinux 0xf811e69d	scsi_eh_flush_done_q
+EXPORT_SYMBOL vmlinux 0xf81db89d	tty_insert_flip_string_flags
+EXPORT_SYMBOL vmlinux 0xf82abc1d	isa_dma_bridge_buggy
+EXPORT_SYMBOL vmlinux 0xf82e3d47	acpi_initialize_objects
+EXPORT_SYMBOL vmlinux 0xf82f7159	napi_frags_skb
+EXPORT_SYMBOL vmlinux 0xf8324091	set_pages_array_uc
+EXPORT_SYMBOL vmlinux 0xf8341911	seq_puts
+EXPORT_SYMBOL vmlinux 0xf83afd1c	i2c_verify_client
+EXPORT_SYMBOL vmlinux 0xf83e2f69	tty_kref_put
+EXPORT_SYMBOL vmlinux 0xf843e170	jbd2_journal_check_used_features
+EXPORT_SYMBOL vmlinux 0xf88e0ee2	acpi_get_table_header
+EXPORT_SYMBOL vmlinux 0xf88e5477	get_empty_filp
+EXPORT_SYMBOL vmlinux 0xf890fe7f	pm_idle
+EXPORT_SYMBOL vmlinux 0xf8b30e93	mempool_create
+EXPORT_SYMBOL vmlinux 0xf8b5ca2d	journal_clear_err
+EXPORT_SYMBOL vmlinux 0xf8bddc02	scsi_track_queue_full
+EXPORT_SYMBOL vmlinux 0xf8cf9ee5	abort_exclusive_wait
+EXPORT_SYMBOL vmlinux 0xf8e536ad	tty_throttle
+EXPORT_SYMBOL vmlinux 0xf9072413	inet_proto_csum_replace4
+EXPORT_SYMBOL vmlinux 0xf91bfc3d	dev_get_by_name
+EXPORT_SYMBOL vmlinux 0xf95da0a1	__vlan_hwaccel_rx
+EXPORT_SYMBOL vmlinux 0xf9623390	cdrom_number_of_slots
+EXPORT_SYMBOL vmlinux 0xf96477d5	dev_get_stats
+EXPORT_SYMBOL vmlinux 0xf979b202	cdrom_open
+EXPORT_SYMBOL vmlinux 0xf9899664	mod_timer_pinned
+EXPORT_SYMBOL vmlinux 0xf9a482f9	msleep
+EXPORT_SYMBOL vmlinux 0xf9b50079	kobject_put
+EXPORT_SYMBOL vmlinux 0xf9b98b25	arp_create
+EXPORT_SYMBOL vmlinux 0xf9be8535	ip_setsockopt
+EXPORT_SYMBOL vmlinux 0xf9e6a0e4	ps2_cmd_aborted
+EXPORT_SYMBOL vmlinux 0xfa0564fc	__wait_on_bit_lock
+EXPORT_SYMBOL vmlinux 0xfa6b9b13	mmc_card_awake
+EXPORT_SYMBOL vmlinux 0xfa908648	sysctl_jiffies
+EXPORT_SYMBOL vmlinux 0xfaca791b	seq_escape
+EXPORT_SYMBOL vmlinux 0xfade665f	pnp_device_attach
+EXPORT_SYMBOL vmlinux 0xfaf98462	bitrev32
+EXPORT_SYMBOL vmlinux 0xfb0443fb	acpi_get_parent
+EXPORT_SYMBOL vmlinux 0xfb0cf2e9	touch_all_softlockup_watchdogs
+EXPORT_SYMBOL vmlinux 0xfb606d01	vfs_readdir
+EXPORT_SYMBOL vmlinux 0xfb6af58d	recalc_sigpending
+EXPORT_SYMBOL vmlinux 0xfb6f98c2	write_cache_pages
+EXPORT_SYMBOL vmlinux 0xfb868da6	__pskb_pull_tail
+EXPORT_SYMBOL vmlinux 0xfb968024	eth_change_mtu
+EXPORT_SYMBOL vmlinux 0xfba0c2e0	llc_sap_list_lock
+EXPORT_SYMBOL vmlinux 0xfbb8812f	napi_gro_receive
+EXPORT_SYMBOL vmlinux 0xfbbebbc1	scsi_host_put
+EXPORT_SYMBOL vmlinux 0xfbc2bbf4	inode_init_always
+EXPORT_SYMBOL vmlinux 0xfbe27a1c	rb_first
+EXPORT_SYMBOL vmlinux 0xfbeaf41e	fb_set_suspend
+EXPORT_SYMBOL vmlinux 0xfbedb212	journal_get_create_access
+EXPORT_SYMBOL vmlinux 0xfc02b7ad	sysctl_tcp_wmem
+EXPORT_SYMBOL vmlinux 0xfc13e455	dev_load
+EXPORT_SYMBOL vmlinux 0xfc39e32f	ioport_unmap
+EXPORT_SYMBOL vmlinux 0xfc52e64c	dst_destroy
+EXPORT_SYMBOL vmlinux 0xfc6256b9	boot_tvec_bases
+EXPORT_SYMBOL vmlinux 0xfc6acaa5	dst_discard
+EXPORT_SYMBOL vmlinux 0xfc989a49	per_cpu__cpu_core_map
+EXPORT_SYMBOL vmlinux 0xfc9aadf3	truncate_inode_pages_range
+EXPORT_SYMBOL vmlinux 0xfc9b74ea	mb_cache_entry_insert
+EXPORT_SYMBOL vmlinux 0xfcaa04a0	out_of_line_wait_on_bit_lock
+EXPORT_SYMBOL vmlinux 0xfcc2a43c	utf32_to_utf8
+EXPORT_SYMBOL vmlinux 0xfcc4d4e4	mod_timer_pending
+EXPORT_SYMBOL vmlinux 0xfcd9be6a	tty_driver_flush_buffer
+EXPORT_SYMBOL vmlinux 0xfcec0987	enable_irq
+EXPORT_SYMBOL vmlinux 0xfcefd18a	mem_section
+EXPORT_SYMBOL vmlinux 0xfcfa03ff	fb_videomode_to_modelist
+EXPORT_SYMBOL vmlinux 0xfd305ef1	ppp_register_net_channel
+EXPORT_SYMBOL vmlinux 0xfd3827cd	vfs_quota_enable
+EXPORT_SYMBOL vmlinux 0xfd5a09fa	mpage_writepages
+EXPORT_SYMBOL vmlinux 0xfd6f4850	native_wrmsr_safe_regs
+EXPORT_SYMBOL vmlinux 0xfd7d7713	acpi_exception
+EXPORT_SYMBOL vmlinux 0xfd81f8da	nf_ct_attach
+EXPORT_SYMBOL vmlinux 0xfda85a7d	request_threaded_irq
+EXPORT_SYMBOL vmlinux 0xfdb9b629	ioread32be
+EXPORT_SYMBOL vmlinux 0xfdbd38c4	set_security_override_from_ctx
+EXPORT_SYMBOL vmlinux 0xfdcc80ac	journal_blocks_per_page
+EXPORT_SYMBOL vmlinux 0xfdfc0b3b	fiemap_fill_next_extent
+EXPORT_SYMBOL vmlinux 0xfe047ce6	acpi_enter_sleep_state
+EXPORT_SYMBOL vmlinux 0xfe26fc7c	nr_node_ids
+EXPORT_SYMBOL vmlinux 0xfe392bcd	generic_segment_checks
+EXPORT_SYMBOL vmlinux 0xfe5190c4	tcp4_gro_complete
+EXPORT_SYMBOL vmlinux 0xfe5d4bb2	sys_tz
+EXPORT_SYMBOL vmlinux 0xfe69bffc	set_groups
+EXPORT_SYMBOL vmlinux 0xfe769456	unregister_netdevice_notifier
+EXPORT_SYMBOL vmlinux 0xfe7c4287	nr_cpu_ids
+EXPORT_SYMBOL vmlinux 0xfec0c2dc	__scsi_alloc_queue
+EXPORT_SYMBOL vmlinux 0xfec3c2f2	bcd2bin
+EXPORT_SYMBOL vmlinux 0xfec86d98	submit_bh
+EXPORT_SYMBOL vmlinux 0xfec8b4c9	agp3_generic_tlbflush
+EXPORT_SYMBOL vmlinux 0xfedd35fc	console_suspend_enabled
+EXPORT_SYMBOL vmlinux 0xfee836f6	single_release
+EXPORT_SYMBOL vmlinux 0xfeee5d57	km_report
+EXPORT_SYMBOL vmlinux 0xfef96e23	__scsi_print_command
+EXPORT_SYMBOL vmlinux 0xff0ed947	ipv6_dev_get_saddr
+EXPORT_SYMBOL vmlinux 0xff1e9dd8	seq_list_start
+EXPORT_SYMBOL vmlinux 0xff4105a5	scsi_unregister
+EXPORT_SYMBOL vmlinux 0xff44ab3a	ethtool_op_set_tx_hw_csum
+EXPORT_SYMBOL vmlinux 0xff4584b9	pci_prepare_to_sleep
+EXPORT_SYMBOL vmlinux 0xff6878cf	fb_default_cmap
+EXPORT_SYMBOL vmlinux 0xff6ecd7a	lookup_one_len
+EXPORT_SYMBOL vmlinux 0xff708fd3	mempool_destroy
+EXPORT_SYMBOL vmlinux 0xff754d08	cdrom_media_changed
+EXPORT_SYMBOL vmlinux 0xff7559e4	ioport_resource
+EXPORT_SYMBOL vmlinux 0xff8ecbae	jbd2_journal_stop
+EXPORT_SYMBOL vmlinux 0xff964b25	param_set_int
+EXPORT_SYMBOL vmlinux 0xff9ca065	fb_edid_to_monspecs
+EXPORT_SYMBOL vmlinux 0xffa1a725	scsi_ioctl
+EXPORT_SYMBOL vmlinux 0xffa1e8f1	serio_reconnect
+EXPORT_SYMBOL vmlinux 0xffc7c184	__init_waitqueue_head
+EXPORT_SYMBOL vmlinux 0xffd1ffdb	blk_queue_io_min
+EXPORT_SYMBOL vmlinux 0xffd5a395	default_wake_function
+EXPORT_SYMBOL vmlinux 0xffde7737	udplite_prot
+EXPORT_SYMBOL vmlinux 0xffeb7c66	sock_release
+EXPORT_SYMBOL vmlinux 0xfff31926	search_binary_handler
+EXPORT_SYMBOL vmlinux 0xfffa5de5	pci_read_vpd
+EXPORT_SYMBOL_GPL arch/x86/crypto/aes-x86_64 0x7060bf0a	crypto_aes_encrypt_x86
+EXPORT_SYMBOL_GPL arch/x86/crypto/aes-x86_64 0xe409b491	crypto_aes_decrypt_x86
+EXPORT_SYMBOL_GPL arch/x86/kernel/cpu/cpufreq/speedstep-lib 0x16836e04	speedstep_detect_processor
+EXPORT_SYMBOL_GPL arch/x86/kernel/cpu/cpufreq/speedstep-lib 0x2af90271	speedstep_get_frequency
+EXPORT_SYMBOL_GPL arch/x86/kernel/cpu/cpufreq/speedstep-lib 0xd494ee54	speedstep_get_freqs
+EXPORT_SYMBOL_GPL arch/x86/kernel/microcode 0xdf66ca81	ucode_cpu_info
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x00aaf935	kvm_disable_tdp
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x02ee3188	gfn_to_memslot_unaliased
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x05b22eb1	kvm_get_guest_memory_type
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x094ac8f4	kvm_get_pfn
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x0b7da2ca	emulate_instruction
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x0c2536ee	kvm_get_cr8
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x12d1b23b	kvm_release_pfn_clean
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1a9df35f	__tracepoint_kvm_msr
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1b09332b	is_error_page
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1ba3db3b	kvm_get_apic_base
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1c97dd6f	kvm_cpu_get_interrupt
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1e4580bb	kvm_release_pfn_dirty
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1f85974b	kvm_vcpu_uninit
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x20de5193	kvm_disable_largepages
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x2322e039	kvm_set_pfn_accessed
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x27046576	kvm_exit
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x2babec3b	kvm_mmu_invlpg
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x2eb5d46c	kvm_set_page_dirty
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x317f9e6b	kvm_enable_efer_bits
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x34a68b94	kvm_report_emulation_failure
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x3b5582d3	kvm_resched
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x3b7706d2	__tracepoint_kvm_exit
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x42987008	kvm_load_guest_fpu
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x42ec8ff0	kvm_get_msr_common
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x452b5bee	kvm_is_visible_gfn
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x45e707d9	kvm_emulate_pio_string
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x46de2a13	kvm_mmu_page_fault
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x47666178	kvm_set_apic_base
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x4a7cbe69	is_error_pfn
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x4e30ec6c	kvm_get_kvm
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x4eb5ddee	kvm_vcpu_on_spin
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x5af17c2f	gfn_to_hva
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x5b83f42a	kvm_queue_exception
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x5ead160b	kvm_release_page_dirty
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x5f44af72	kvm_put_kvm
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x5fe822d4	kvm_read_guest
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x665ddedd	kvm_mmu_get_spte_hierarchy
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x673ee6c1	kvm_emulate_halt
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x67d28e3f	kvm_queue_exception_e
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x68e6ccac	kvm_set_cr8
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x69d581c3	kvm_inject_pending_timer_irqs
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x6e2568f7	kvm_set_cr0
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x74289971	kvm_mmu_load
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x797bf760	__kvm_set_memory_region
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x7f3ace3d	gfn_to_page
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x80fc39fa	kvm_set_cr4
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8badc5df	kvm_x86_ops
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8ce4f3ab	kvm_enable_tdp
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8e7f9b47	segment_base
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x97c57ae9	kvm_emulate_pio
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x9bfd8696	kvm_get_cs_db_l_bits
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa027d35e	kvm_set_memory_region
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa1103d2f	kvm_write_guest_page
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa28745dd	kvm_require_cpl
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa361bc65	kvm_set_pfn_dirty
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa4441d2e	kvm_inject_nmi
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa6008b72	kvm_release_page_clean
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xabd743f5	kvm_mmu_reset_context
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xb99b5682	kvm_set_cr3
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbc2452b7	kvm_emulate_cpuid
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbd377dc9	kvm_mmu_set_nonpresent_ptes
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbd86163a	kvm_handle_fault_on_reboot
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbd94103b	kvm_mmu_set_base_ptes
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xc8667ee2	gfn_to_pfn
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xca2387a9	kvm_lmsw
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xcb608fdd	kvm_emulate_hypercall
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xcd54b97b	kvm_set_msr_common
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xcea5bf57	__tracepoint_kvm_page_fault
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xcf4b92ca	kvm_read_guest_page
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd0b2727a	kvm_mmu_set_mask_ptes
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd296def9	kvm_is_error_hva
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd3c0a6da	__tracepoint_kvm_inj_virq
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd5432ddb	kvm_task_switch
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd5e5bb69	kvm_mmu_unprotect_page_virt
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd950ea62	kvm_put_guest_fpu
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xdcaf84be	kvm_init
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xdd1804e0	fx_init
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xdead7e81	__tracepoint_kvm_cr
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xe0df1da2	kvm_clear_guest_page
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xe13f7993	kvm_clear_guest
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xe7ba681a	kvm_vcpu_init
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xed8abadb	kvm_vcpu_cache
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xf3115523	load_pdptrs
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xf4be4de4	kvm_cpu_has_interrupt
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xf836fd92	emulator_write_emulated
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x0cc1e40f	crypto_it_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x24aac4d9	crypto_aes_expand_key
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x3dc916b6	crypto_fl_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x40d46b21	crypto_ft_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x71dc9998	crypto_il_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0xff0cee2c	crypto_aes_set_key
+EXPORT_SYMBOL_GPL crypto/async_tx/async_memcpy 0x37e13666	async_memcpy
+EXPORT_SYMBOL_GPL crypto/async_tx/async_pq 0x9112ef79	async_gen_syndrome
+EXPORT_SYMBOL_GPL crypto/async_tx/async_pq 0xd4bff9ac	async_syndrome_val
+EXPORT_SYMBOL_GPL crypto/async_tx/async_raid6_recov 0x0574baca	async_raid6_datap_recov
+EXPORT_SYMBOL_GPL crypto/async_tx/async_raid6_recov 0xc45b8978	async_raid6_2data_recov
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x348bdadd	__async_tx_find_channel
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x528b7d47	async_trigger_callback
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0xb3cae420	async_tx_quiesce
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0xe967a89b	async_tx_submit
+EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0xbb10968a	async_xor_val
+EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0xf600b199	async_xor
+EXPORT_SYMBOL_GPL crypto/cryptd 0x4a01862d	cryptd_free_ahash
+EXPORT_SYMBOL_GPL crypto/cryptd 0x5dc0ad06	cryptd_alloc_ablkcipher
+EXPORT_SYMBOL_GPL crypto/cryptd 0xc5ebf601	cryptd_free_ablkcipher
+EXPORT_SYMBOL_GPL crypto/cryptd 0xd42d55f8	cryptd_ablkcipher_child
+EXPORT_SYMBOL_GPL crypto/cryptd 0xfc86e11d	cryptd_ahash_child
+EXPORT_SYMBOL_GPL crypto/cryptd 0xfe4741b0	cryptd_shash_desc
+EXPORT_SYMBOL_GPL crypto/cryptd 0xff214f15	cryptd_alloc_ahash
+EXPORT_SYMBOL_GPL crypto/des_generic 0xcfd9a2c0	des_ekey
+EXPORT_SYMBOL_GPL crypto/twofish_common 0x68da9166	twofish_setkey
+EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x02ff9464	cfag12864b_isinited
+EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x0ecb2e5d	cfag12864b_disable
+EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x305dc3c6	cfag12864b_isenabled
+EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x3389f926	cfag12864b_enable
+EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x9522a342	cfag12864b_getrate
+EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0xc48e9d95	cfag12864b_buffer
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x14102f23	ks0108_displaystate
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x48a70518	ks0108_writedata
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x4f506333	ks0108_startline
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x6edae968	ks0108_isinited
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xbf4774db	ks0108_writecontrol
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xedde6df2	ks0108_page
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xfee8ef7b	ks0108_address
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0x15eee790	btmrvl_send_module_cfg_cmd
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0x61de4cc9	btmrvl_remove_card
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0xa71584df	btmrvl_check_evtpkt
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0xc7a65053	btmrvl_process_event
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0xf4cb7792	btmrvl_interrupt
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0xf91d3c4a	btmrvl_add_card
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x09026107	tpm_write
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x150d130e	tpm_show_enabled
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x290f8496	tpm_get_timeouts
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x29885414	tpm_store_cancel
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x2f641772	tpm_gen_interrupt
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x334b7600	tpm_show_pubek
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x52e65c9d	tpm_show_timeouts
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x5811b793	tpm_show_caps
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x5c644045	tpm_open
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x6185316c	tpm_read
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x67203739	tpm_register_hardware
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x6b990afc	tpm_show_caps_1_2
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x733499b3	tpm_pm_suspend
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x7d0adf7e	tpm_release
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x8042e87f	tpm_dev_vendor_release
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x9507c006	tpm_show_pcrs
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x9550a863	tpm_show_active
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xadf6aa4d	tpm_pcr_read
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xb4b9719e	tpm_dev_release
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xba2da659	tpm_show_temp_deactivated
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xba691615	tpm_continue_selftest
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xbef023b4	tpm_pm_resume
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xc37226a5	tpm_pcr_extend
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xcf017fa2	tpm_show_owned
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xd5212b1d	tpm_calc_ordinal_duration
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xe31365ee	tpm_remove_hardware
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm_bios 0x20339ec1	tpm_bios_log_teardown
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm_bios 0x445511e9	tpm_bios_log_setup
+EXPORT_SYMBOL_GPL drivers/dca/dca 0x2e471f01	dca_register_notify
+EXPORT_SYMBOL_GPL drivers/dca/dca 0x31a2c8df	dca_get_tag
+EXPORT_SYMBOL_GPL drivers/dca/dca 0x4ba0dfe3	dca_add_requester
+EXPORT_SYMBOL_GPL drivers/dca/dca 0x6f4aaaa1	register_dca_provider
+EXPORT_SYMBOL_GPL drivers/dca/dca 0x8006c614	dca_unregister_notify
+EXPORT_SYMBOL_GPL drivers/dca/dca 0x946de288	unregister_dca_provider
+EXPORT_SYMBOL_GPL drivers/dca/dca 0xa7eea27d	free_dca_provider
+EXPORT_SYMBOL_GPL drivers/dca/dca 0xdfa25def	dca_remove_requester
+EXPORT_SYMBOL_GPL drivers/dca/dca 0xe6e5f124	dca3_get_tag
+EXPORT_SYMBOL_GPL drivers/dca/dca 0xefe1f8b9	alloc_dca_provider
+EXPORT_SYMBOL_GPL drivers/edac/amd64_edac_mod 0x556cd18c	amd64_get_dram_hole_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x0c32ff8a	edac_pci_alloc_index
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x0c957d41	edac_pci_free_ctl_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x0d67b1d9	edac_device_alloc_ctl_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x19f1deb9	edac_pci_alloc_ctl_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x23cec3aa	edac_pci_create_generic_ctl
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x2a1003ed	edac_mc_add_mc
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x2c330e76	edac_pci_release_generic_ctl
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x2daf747e	edac_device_add_device
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x389c8ffb	edac_device_handle_ue
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x48a55147	edac_pci_del_device
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x547d11ab	edac_device_del_device
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x58af4b8c	edac_mc_del_mc
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x5b35257f	edac_mc_handle_ce_no_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x65e4755b	edac_pci_handle_pe
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x6e3ff83a	edac_device_alloc_index
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x782fc36c	edac_device_free_ctl_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x868387d2	edac_mc_find_csrow_by_page
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xac05deba	edac_device_handle_ce
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xb32c906f	edac_mc_alloc
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xb5d65e7b	edac_mc_handle_ue
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xb5e86132	edac_pci_reset_delay_period
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xb98e177b	edac_mc_handle_ue_no_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xbfffd91d	edac_mc_handle_ce
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xc2d1ad05	edac_pci_handle_npe
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xc88462a2	edac_mc_free
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xcaad1c24	edac_pci_add_device
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0x0f0ba55e	ii_msgs
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0x14878009	amd_report_gart_errors
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0x1823885a	amd_register_ecc_decoder
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0x4b01887d	pp_msgs
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0x7509830f	to_msgs
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0x955c1f76	amd_decode_nb_mce
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0xb98537cb	rrrr_msgs
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0xc2e765d2	amd_unregister_ecc_decoder
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0xd0f094a0	ext_msgs
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0xe6ff7e0c	ll_msgs
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0xf8dec080	tt_msgs
+EXPORT_SYMBOL_GPL drivers/gpu/drm/drm 0x7749ee2f	drm_class_device_register
+EXPORT_SYMBOL_GPL drivers/gpu/drm/drm 0xf9e1f74c	drm_class_device_unregister
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x05495392	hid_debug
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x055b75d9	hidraw_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x057ce0ba	hid_output_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x08a74ff0	hidinput_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x105b4fe1	hidinput_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x121f8a8c	__hid_register_driver
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x1a8e1be2	hid_dump_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x1b6e4f66	hid_check_keys_pressed
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x21c23f6d	hidinput_report_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x2f857cdb	hidraw_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x3909a2e2	hidraw_report_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x3a8887be	hid_report_raw_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x3e67c1a1	hid_allocate_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x51e8f454	hid_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x65dc9906	hid_input_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x803bbc65	hid_add_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x853be9bb	hid_unregister_driver
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x8ebfabd4	hid_dump_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x9945218b	hid_set_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xb396ff8e	hid_destroy_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xb9a06a32	hid_parse_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xc09fae01	hid_dump_input
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xc4e3a8b4	hid_debug_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xcf33dd15	hid_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xe9dd48b8	hidinput_find_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xfe734722	hid_resolv_usage
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x01fd453e	usbhid_lookup_quirk
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x391a4895	usbhid_set_leds
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x424e94c1	hiddev_hid_event
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x5bab47ed	usbhid_submit_report
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x51ca9b1b	lis3_dev
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x6a34bd76	lis3lv02d_remove_fs
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x6c33e494	lis3lv02d_joystick_disable
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x8462c1a6	lis3lv02d_poweroff
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x94ebbaba	lis3lv02d_init_device
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xe6af28c8	lis3lv02d_joystick_enable
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xfce567e6	lis3lv02d_poweron
+EXPORT_SYMBOL_GPL drivers/i2c/busses/i2c-nforce2 0x2b8c336d	nforce2_smbus
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0x17ba5e3e	hpsb_config_rom_ip1394_add
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0xec8d18cf	hpsb_disable_irm
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0xef9a55b7	hpsb_config_rom_ip1394_remove
+EXPORT_SYMBOL_GPL drivers/infiniband/hw/ipath/ib_ipath 0x1514b2b2	ipath_debug
+EXPORT_SYMBOL_GPL drivers/input/ff-memless 0xa95e6ba9	input_ff_create_memless
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x22f511a9	wm97xx_set_suspend_mode
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x4a9192ba	wm9712_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x541bdd05	wm97xx_register_mach_ops
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x572f8fe0	wm9705_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x8016b603	wm97xx_unregister_mach_ops
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x8308ef72	wm97xx_reg_read
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x863b9224	wm9713_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x8c10dbe4	wm97xx_read_aux_adc
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x9a7ce5e1	wm97xx_reg_write
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xa2a2fe06	wm97xx_set_gpio
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xcc56202d	wm97xx_get_gpio
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xd1555a28	wm97xx_config_gpio
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x1782a3e2	gigaset_stop
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x17fa5ec0	gigaset_m10x_input
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x28224d09	gigaset_blockdriver
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x2ab04492	gigaset_handle_modem_response
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x2c0979ce	gigaset_dbg_buffer
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x402f5933	gigaset_add_event
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x454aa44f	gigaset_debuglevel
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x4a31aa4b	gigaset_fill_inbuf
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x56d56ffe	gigaset_freecs
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x5a0eb7ef	gigaset_skb_sent
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x64aa2c02	gigaset_if_receive
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x6530d73b	gigaset_initcs
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x6c91780d	gigaset_start
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x761bab71	gigaset_initdriver
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xb9408976	gigaset_shutdown
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xb9ab4925	gigaset_m10x_send_skb
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xd40488bd	gigaset_freedriver
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0x87400e7f	led_classdev_unregister
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0xe1b7c35e	led_classdev_suspend
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0xeb1d3441	led_classdev_register
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0xfd2270df	led_classdev_resume
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0x24935f26	raid6_call
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0xcdc24ab5	raid6_2data_recov
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0xdbab0c01	raid6_datap_recov
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x0349c9bd	ir_codes_proteus_2309_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x0366dcdf	ir_codes_videomate_s350_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x110b053a	ir_codes_pixelview_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x124cb753	ir_codes_encore_enltv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x183fdfdd	ir_codes_gotview7135_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x19b4d61c	ir_codes_nebula_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x19cd2826	ir_codes_behold_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x1a9009d6	ir_codes_dm1105_nec_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x1cb148f5	ir_extract_bits
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x219b69fa	ir_input_keydown
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2456e513	ir_decode_pulsedistance
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2cc459b5	ir_codes_flydvb_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2d0e9a49	ir_codes_em_terratec_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3136d8ff	ir_codes_dntv_live_dvbt_pro_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x32b9033b	ir_codes_apac_viewcomp_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3909f4ad	ir_codes_terratec_cinergy_xs_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3a84be27	ir_codes_avermedia_a16d_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x4267d749	ir_codes_budget_ci_old_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x43c89ef4	ir_decode_biphase
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x4c1442c1	ir_codes_real_audio_220_32_keys_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x51ba1643	ir_codes_kworld_plus_tv_analog_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x543db4ff	ir_codes_avermedia_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x5e95da31	ir_codes_tt_1500_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x5fbe6515	ir_codes_pinnacle_color_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x61d039d7	ir_codes_behold_columbus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6427a3fb	ir_codes_pinnacle_grey_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x64b02fed	ir_codes_avermedia_dvbt_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6606596a	ir_rc5_timer_keyup
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6809de82	ir_codes_pctv_sedna_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6d6511e7	ir_dump_samples
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x703fc738	ir_codes_avertv_303_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x7283f81d	ir_codes_purpletv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x72c2992e	ir_codes_powercolor_real_angel_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x76d71b8e	ir_codes_dntv_live_dvb_t_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x784e176d	ir_codes_asus_pc39_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x828b3ce5	ir_codes_encore_enltv_fm53_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x87a7deb6	ir_input_nokey
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x8acae3dd	ir_codes_pinnacle_pctv_hd_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x92d1d181	ir_codes_flyvideo_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x94651dab	ir_codes_ati_tv_wonder_hd_600_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x97c35dab	ir_codes_msi_tvanywhere_plus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x9944e2e5	ir_codes_hauppauge_new_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xa69aa6ad	ir_codes_pv951_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xa95157c5	ir_codes_cinergy_1400_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xac15f6c8	ir_codes_kaiomy_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xaff22e87	ir_codes_pixelview_new_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb01a1998	ir_codes_manli_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb0a8ef38	ir_codes_rc5_tv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb57445f7	ir_codes_eztv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb5adb754	ir_codes_cinergy_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xbd3ce6f0	ir_codes_avermedia_cardbus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xbeaccbdc	ir_codes_gadmei_rm008z_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xcba36c62	ir_codes_videomate_tv_pvr_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xd30c491f	ir_codes_norwood_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xdc23fec4	ir_codes_fusionhdtv_mce_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xdd4c0a07	ir_codes_evga_indtube_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xe1101f4d	ir_codes_avermedia_m135a_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xe4140c60	ir_codes_genius_tvgo_a11mce_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xea623b68	ir_input_init
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xeb9bb08f	ir_codes_npgtech_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xebf345b4	ir_codes_encore_enltv2_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xeec89db8	ir_codes_empty_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xef29c40d	ir_codes_adstech_dvb_t_pci_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf33c155d	ir_codes_msi_tvanywhere_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf3d619ec	ir_codes_iodata_bctv7e_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf4f7a4d6	ir_rc5_timer_end
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf5e15e65	ir_codes_winfast_table
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x1da227f4	saa7146_vmalloc_build_pgtable
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x45be03bf	saa7146_devices_lock
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x5e6c8cd8	saa7146_setgpio
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x6a7c4f9c	saa7146_vfree_destroy_pgtable
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x7adbf737	saa7146_unregister_extension
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x88adbe7c	saa7146_pgtable_alloc
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x971f27ef	saa7146_register_extension
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xbe91ec27	saa7146_pgtable_free
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xc1da4a66	saa7146_pgtable_build_single
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xc3a85d99	saa7146_i2c_adapter_prepare
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xcf683cf2	saa7146_devices
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xe3cd9b5c	saa7146_debug
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xf73bfcd4	saa7146_wait_for_debi_done
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x1ad50634	saa7146_register_device
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x24a33450	saa7146_stop_preview
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x30543bfd	saa7146_unregister_device
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xb5ab1078	saa7146_vv_release
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xb8a47c08	saa7146_vv_init
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xe86e3535	saa7146_set_hps_source_and_sync
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xf4cdb928	saa7146_start_preview
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/mt20xx 0xf9e1d50a	microtune_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/mxl5007t 0x200f8075	mxl5007t_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda18271 0xe146a46f	tda18271_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda827x 0xb337c4b7	tda827x_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda8290 0x0f863d18	tda829x_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda8290 0xb57cd29a	tda829x_probe
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda9887 0x4f2eae0f	tda9887_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5761 0x0196bc47	tea5761_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5761 0xe8139342	tea5761_autodetection
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5767 0x3bde42ed	tea5767_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5767 0xd47a146e	tea5767_autodetection
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tuner-simple 0xcfc77c9c	simple_tuner_attach
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x03189301	smscore_unregister_client
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x0f9ad691	sms_board_setup
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x18243bfa	smsclient_sendrequest
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x21e36bf2	smscore_registry_getmode
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x2822a6d8	smscore_unregister_hotplug
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x2e595139	smscore_register_hotplug
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x37d91069	smsendian_handle_tx_message
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x3a842123	smscore_start_device
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x45284ae9	smsendian_handle_rx_message
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x5957e568	smscore_getbuffer
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x5991e0c0	smscore_unregister_device
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x5b61d787	smscore_get_board_id
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x5fc66183	smscore_putbuffer
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x713470b3	smscore_register_device
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x74ee9098	sms_board_load_modules
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x7c576277	smsendian_handle_message_header
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x957aa57d	sms_board_event
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xaf95b8c8	smscore_register_client
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xb878fc00	sms_board_lna_control
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xbebb26fa	smscore_set_board_id
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xca51deb6	sms_board_led_feedback
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xd102e907	smscore_onresponse
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xd2066da5	sms_board_power
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xeb733480	smscore_get_device_mode
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xfda878c5	sms_get_board
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x11dd1089	ttpci_budget_debiwrite
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x53a62560	ttpci_budget_set_video_port
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x54f54c09	ttpci_budget_deinit
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x5eace4a2	ttpci_budget_irq10_handler
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x6fb7d1be	ttpci_budget_init_hooks
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x75504297	ttpci_budget_debiread
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x7948c222	budget_debug
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0xb0e4a25e	ttpci_budget_init
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x017ea7c7	cx231xx_tuner_callback
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x17b4b60a	cx231xx_uninit_vbi_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x391dc6b0	cx231xx_send_usb_command
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x4ae34a89	cx231xx_dev_init
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x6873f084	cx231xx_dev_uninit
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x68d50e54	cx231xx_set_mode
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x7261ab4c	cx231xx_uninit_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x83609118	cx231xx_capture_start
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x9597f1ad	cx231xx_init_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xa08db0d3	cx231xx_init_vbi_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xa1bc54c9	cx231xx_send_gpio_cmd
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xc2346fcf	cx231xx_set_alt_setting
+EXPORT_SYMBOL_GPL drivers/media/video/cx88/cx88xx 0x11f4cbca	cx88_setup_xc3028
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x5df70406	em28xx_set_mode
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x73212b22	em28xx_audio_setup
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x7bb30332	em28xx_init_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x7fc8652c	em28xx_tuner_callback
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0xde55f5f2	em28xx_audio_analog_set
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0xe7e28371	em28xx_isoc_dvb_max_packetsize
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0xf030c779	em28xx_uninit_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x6505e99b	saa7134_queryctrl
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x6f96bce9	saa7134_s_ctrl_internal
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x7ad3b190	saa7134_s_std_internal
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x7d8051cc	saa7134_ts_qops
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0xf18ec82d	saa7134_g_ctrl_internal
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x050cde2e	v4l2_i2c_subdev_addr
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x319855c6	v4l2_i2c_new_subdev_board
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x4215a3a8	v4l2_i2c_new_subdev_cfg
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xcdcf7026	v4l2_i2c_subdev_init
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xf2a353ac	v4l2_i2c_tuner_addrs
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xf5ef842e	v4l_bound_align_image
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-compat-ioctl32 0x647c947f	v4l2_compat_ioctl32
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x2d22e054	v4l2_int_device_unregister
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x40f3af06	v4l2_int_ioctl_1
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x854b312a	v4l2_int_ioctl_0
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xa5228b24	v4l2_int_device_try_attach_all
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xe9899e3a	v4l2_int_device_register
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x083b1680	videobuf_qbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x115bf1e0	videobuf_mmap_free
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x1b9c86d1	videobuf_stop
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x25cbd299	videobuf_read_stop
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x26b57644	videobuf_querybuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x4d56df68	videobuf_dqbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x4fb1172a	videobuf_next_field
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x5e8820c9	videobuf_reqbufs
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x64dab75f	videobuf_read_start
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x6ae4b704	videobuf_waiton
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x90affcf0	videobuf_queue_to_vmalloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x9a82594e	videobuf_alloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xa8cec0a0	videobuf_iolock
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xacc889b1	videobuf_queue_core_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xb67c3dd9	videobuf_queue_is_busy
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xb7f70986	videobuf_streamoff
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xbb1e9b65	videobuf_queue_cancel
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xc0b62450	videobuf_cgmbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xd714b77e	videobuf_poll_stream
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xde5857f2	videobuf_mmap_setup
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xe385d3e8	videobuf_read_stream
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xe3ed6933	videobuf_read_one
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xee5c0952	__videobuf_mmap_setup
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xf654c26e	videobuf_mmap_mapper
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xf7b25a78	videobuf_streamon
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x20766be9	videobuf_queue_sg_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x45f5ac91	videobuf_sg_dma_unmap
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x4ba09ff3	videobuf_dma_init_user
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x7a973e2c	videobuf_dma_map
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x89869cf5	videobuf_dma_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x8b7c5b89	videobuf_to_dma
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x933dfb43	videobuf_vmalloc_to_sg
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x938d46d0	videobuf_dma_free
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xa38faed2	videobuf_sg_alloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xc5d82037	videobuf_dma_init_kernel
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xcb73ac93	videobuf_dma_sync
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xcba5d39f	videobuf_dma_init_overlay
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xdb56321d	videobuf_dma_unmap
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xdbd0d3ee	videobuf_sg_dma_map
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0x00ede7dc	videobuf_vmalloc_free
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0x516ababf	videobuf_to_vmalloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0xac280f2b	videobuf_queue_vmalloc_init
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x02a6e473	v4l2_device_disconnect
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x1f081188	v4l2_device_register
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x3c14cb07	v4l2_device_set_name
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x4e2c8ea0	v4l2_device_unregister_subdev
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x9bea8f91	v4l2_device_unregister
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0xa0fd5bf7	v4l2_device_register_subdev
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x1c071602	i2o_dma_realloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x3e4d6e92	i2o_dma_alloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x406a34e4	i2o_sg_tablesize
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x717d4378	i2o_pool_alloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x8f633890	i2o_dma_map_sg
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xda14c568	i2o_dma_map_single
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xf178f4a0	i2o_dma_free
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xf3defe6b	i2o_pool_free
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x0019c9a9	mc13783_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x41e442b9	mc13783_adc_set_ts_status
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x5259475f	mc13783_adc_do_conversion
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x55afd13d	mc13783_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x86cef259	mc13783_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0xc532891c	mc13783_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0xdda368ba	mc13783_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-adc 0xe65aeb4c	pcf50633_adc_sync_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-adc 0xea26cade	pcf50633_adc_async_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x0abf768b	pcf50633_reg_clear_bits
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x0e2ee371	pcf50633_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x0e4c6c62	pcf50633_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x114a0018	pcf50633_read_block
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x184cf49e	pcf50633_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x24425cba	pcf50633_irq_unmask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x5c6450d9	pcf50633_write_block
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x797cadcb	pcf50633_reg_set_bit_mask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xa1bc5889	pcf50633_irq_mask_get
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xd31f5d70	pcf50633_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xff54474a	pcf50633_irq_mask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x07bed7b1	pcf50633_gpio_get
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x68c7e0ca	pcf50633_gpio_power_supply_set
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x7e98e94f	pcf50633_gpio_set
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0xab99f8a1	pcf50633_gpio_invert_set
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0xf7ebedfb	pcf50633_gpio_invert_get
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x193ab60e	sm501_misc_control
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x43f08789	sm501_set_clock
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x63f9f475	sm501_modify_reg
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0xdd632e8b	sm501_unit_power
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0xddbcaf25	sm501_find_clock
+EXPORT_SYMBOL_GPL drivers/mfd/ucb1400_core 0xef629993	ucb1400_adc_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x3be6a959	wm831x_reg_unlock
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x3d78a4f4	wm831x_enable_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x4d1d7170	wm831x_request_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x4dd6e9e1	wm831x_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x5187c89b	wm831x_auxadc_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x57ca7bb9	wm831x_auxadc_read_uv
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x79d6ed8f	wm831x_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x7c19d0c9	wm831x_bulk_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x7dab26b6	wm831x_isinkv_values
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x7f20a8de	wm831x_reg_lock
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xa4a04b2a	wm831x_disable_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xb37d1417	wm831x_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xd15b03c5	wm831x_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x1080d3cb	wm8350_unmask_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x13d16855	wm8350_reg_unlock
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x3324dadc	wm8350_block_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x4eae0819	wm8350_device_init
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x6e62a218	wm8350_mask_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x79dc9d59	wm8350_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x84fec68a	wm8350_block_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x8ffecf2a	wm8350_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x959ccc8c	wm8350_reg_lock
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x9d14f6f1	wm8350_clear_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xaa900f55	wm8350_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xb82f99e1	wm8350_gpio_config
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xd44d332d	wm8350_read_auxadc
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xe935c900	wm8350_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xef9312f4	wm8350_device_exit
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xf076920e	wm8350_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x491d8fed	wm8400_block_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x9a1c5ac2	wm8400_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x9b2cb936	wm8400_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0xc0aab1a4	wm8400_reset_codec_reg_cache
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x391c08a4	cb710_sg_dwiter_read_next_block
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x4fb090c7	cb710_pci_update_config_reg
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x78cb553e	cb710_set_irq_handler
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0xaafb86f3	cb710_sg_dwiter_write_next_block
+EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x2df115d4	eeprom_93cx6_multiread
+EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x63d14d2f	eeprom_93cx6_read
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x03e69bb3	enclosure_register
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x0f68ded9	enclosure_find
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x1f2f1489	enclosure_unregister
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x29cda097	enclosure_component_register
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x5e787db4	enclosure_for_each_device
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x788c9b53	enclosure_remove_device
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0xb6143123	enclosure_add_device
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x01d63331	sdhci_remove_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x06abfe21	sdhci_alloc_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x2fc5e3d0	sdhci_resume_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x8891491e	sdhci_add_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xb1beedb8	sdhci_suspend_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xfd41e794	sdhci_free_host
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x0cd084f6	cfi_cmdset_0001
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x25ca7f55	cfi_cmdset_0003
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x5aa097a3	cfi_cmdset_0200
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0002 0xdcff81a4	cfi_cmdset_0002
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0020 0xba1392ae	cfi_cmdset_0020
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x30958946	cfi_qry_mode_on
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x449dbd41	cfi_qry_mode_off
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0xe1174708	cfi_qry_present
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2000 0xbc3e7002	DoC2k_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001 0x7dfdcb61	DoCMil_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001plus 0x2478d4b9	DoCMilPlus_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/docecc 0x45937659	doc_decode_ecc
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x09292165	get_mtd_device_nm
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x1f218d2c	mtd_erase_callback
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x21b6c8df	mtd_table_mutex
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x43a3e2b4	get_sb_mtd
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x450fda8f	register_mtd_user
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x50483910	add_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x58eff9a1	default_mtd_writev
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x6301c2f3	parse_mtd_partitions
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x74019900	register_mtd_parser
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x75f8d81a	put_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x7779cc0b	del_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x7d9c6dc1	get_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x85f5ba1e	unregister_mtd_user
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x946a26ab	kill_mtd_super
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xcf0be395	deregister_mtd_parser
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xe7aa4b0c	mtd_table
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x2cf4673f	deregister_mtd_blktrans
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x7a135fc7	register_mtd_blktrans
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0xa164e1a2	add_mtd_blktrans_dev
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0xcf3b28b0	del_mtd_blktrans_dev
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x91aa637e	nand_release
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xa2df54bd	nand_wait_ready
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xc29cab16	nand_scan_ident
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xc75ee68c	nand_scan
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xe978320f	nand_scan_tail
+EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0x21cffb4f	onenand_scan
+EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0xd9b00187	onenand_release
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x06d6e57e	ubi_close_volume
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x219de2ab	ubi_leb_map
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x21f99c74	ubi_is_mapped
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x2e7bb462	ubi_leb_change
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x42801d20	ubi_sync
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x574bc8b6	ubi_leb_write
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x6f09ba8a	ubi_register_volume_notifier
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x9f1c27c3	ubi_leb_erase
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x9f97024e	ubi_leb_unmap
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xaf7f8d36	ubi_open_volume
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xbc505df4	ubi_get_device_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xd44cac96	ubi_do_get_device_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xe2bba67d	ubi_open_volume_nm
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xe770333f	ubi_get_volume_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xeddafc84	ubi_leb_read
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xfd6f0ef9	ubi_unregister_volume_notifier
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x2b5930a8	can_get_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x8636ca42	alloc_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x8dba0e58	open_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x9a3e8b27	register_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xa92b5ff5	can_put_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xae13642d	unregister_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xd0332cf4	close_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xdbd0431a	free_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xe6bef051	can_bus_off
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xfdd54ee3	can_free_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x41423c42	unregister_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x88879b59	register_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xd71a751e	free_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xdc9bd500	sja1000_interrupt
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xeeb335f8	alloc_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x02312221	mlx4_register_mac
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x06f54d7d	mlx4_qp_to_ready
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x0ca6e573	mlx4_free_hwq_res
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x0cf70389	mlx4_srq_arm
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x10a050da	mlx4_pd_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x195b3210	mlx4_write_mtt
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x2149db2a	mlx4_unregister_mac
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x28c6f62f	mlx4_mtt_cleanup
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x2bb0653f	mlx4_qp_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x33524a3f	mlx4_mr_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x340a442b	mlx4_free_cmd_mailbox
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x35d9369d	mlx4_fmr_enable
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x35f57d82	mlx4_register_vlan
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x37672c49	mlx4_mtt_addr
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x39d42281	mlx4_map_phys_fmr
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x4256b3c8	mlx4_multicast_attach
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x4c9388d9	mlx4_buf_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x601be2e7	mlx4_srq_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x6841907e	mlx4_multicast_detach
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x743364fa	mlx4_fmr_unmap
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x75c48df7	mlx4_CLOSE_PORT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x75d06a42	mlx4_qp_release_range
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x78bd3164	mlx4_mr_enable
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x7908ec57	mlx4_INIT_PORT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x7a2285fb	mlx4_buf_write_mtt
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x80972ac4	mlx4_mr_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x844f68dd	mlx4_qp_modify
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x8834a3cf	mlx4_db_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x89bef5d7	mlx4_cq_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x90c408ab	mlx4_cq_modify
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9245e68b	mlx4_srq_query
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x932aff9b	__mlx4_cmd
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x94cdcac8	mlx4_cq_resize
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x99b22391	mlx4_unregister_vlan
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9a3d9ef5	mlx4_alloc_hwq_res
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9c68f0b1	mlx4_uar_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa3741143	mlx4_buf_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xaafb8a56	mlx4_register_interface
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xaf5c9247	mlx4_alloc_cmd_mailbox
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb77f1e69	mlx4_qp_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc599a0f4	mlx4_cq_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc6857f10	mlx4_pd_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc90e1c50	mlx4_unregister_interface
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xcb44e97f	mlx4_SYNC_TPT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd5812612	mlx4_uar_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xda60df54	mlx4_mtt_init
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe2199264	mlx4_qp_query
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe39a8bd9	mlx4_fmr_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xea3383f4	mlx4_qp_remove
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xec9582d5	mlx4_qp_reserve_range
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf3509146	mlx4_db_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf50e8465	mlx4_fmr_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xfccdf0dc	mlx4_srq_free
+EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0x25677238	usbnet_cdc_unbind
+EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0x32831b8b	usbnet_generic_cdc_bind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x2db92566	rndis_tx_fixup
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x50016a1a	rndis_command
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x646020f8	rndis_rx_fixup
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x8febf0b2	rndis_unbind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x9c9e7eb1	generic_rndis_bind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xf6eff0f5	rndis_status
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x0b3846d8	usbnet_get_endpoints
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x0c9ac2d6	usbnet_change_mtu
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x186392ed	usbnet_unlink_rx_urbs
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x2c4c46b0	usbnet_get_msglevel
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x2f12cc7e	usbnet_start_xmit
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x4177c74e	usbnet_disconnect
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x44ad1bde	usbnet_tx_timeout
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x486fb89f	usbnet_suspend
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x4c1ab3eb	usbnet_open
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x5d8d5d9a	usbnet_get_link
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x626a89cb	usbnet_nway_reset
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x6dff7424	usbnet_get_settings
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x7ac3c4fe	usbnet_get_drvinfo
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x80908291	usbnet_pause_rx
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x81c593a1	usbnet_defer_kevent
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x8f436bde	usbnet_purge_paused_rxq
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x97f13118	usbnet_set_msglevel
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xac783542	usbnet_get_ethernet_addr
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xbb0d4551	usbnet_skb_return
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xd7ec6b09	usbnet_resume
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xe0f5907a	usbnet_set_settings
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xe6364498	usbnet_stop
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xe90cba0a	usbnet_probe
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xfc8942a5	usbnet_resume_rx
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x0254e495	i2400m_dev_reset_handle
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x05b03bc8	i2400m_queue_work
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x1c1d3b64	i2400m_set_init_config
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x1f415715	i2400m_tx
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x2edc4487	i2400m_tx_msg_sent
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x48f36ae1	i2400m_dev_bootstrap
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x643da8d5	i2400m_setup
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x651eb210	i2400m_cmd_get_state
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x7c73802c	i2400m_netdev_setup
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xab8051fd	i2400m_rx
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xb00b793c	i2400m_bm_cmd_prepare
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xd3b1a0fd	i2400m_cmd_enter_powersave
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xe6739e7f	i2400m_tx_msg_get
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xf64bb046	i2400m_release
+EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0x1c820b19	libipw_debug_level
+EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0xb87dde31	libipw_rx_any
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x06a95caf	lbs_send_tx_feedback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x28b857db	lbs_host_to_card_done
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x33290b40	lbs_stop_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x35344746	lbs_cmd_copyback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x41c4c0ec	lbs_start_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x8b44ec8c	lbs_remove_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x967216b3	lbs_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xa5488129	lbs_queue_event
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xad237919	lbs_host_sleep_cfg
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xb3b882d4	lbs_process_rxed_packet
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xccf0dfda	lbs_notify_command_response
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xe648b099	lbs_cmd_802_11_rate_adapt_rateset
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xe6c0da0a	lbs_add_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xefc9bafe	__lbs_cmd
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf42eec6d	lbs_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf64277de	lbs_debug
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x6624c08d	lbtf_cmd_response_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x879b27ba	lbtf_send_tx_feedback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x94d1b36e	lbtf_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x961f97be	lbtf_cmd_copyback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xa13bd586	__lbtf_cmd
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xa6b014f0	lbtf_bcn_sent
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xad2389ce	lbtf_add_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xcdbefaa5	lbtf_remove_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0xc30c020a	if_usb_reset_device
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0xc902cff5	if_usb_prog_firmware
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x4a768421	p54_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x55abc744	p54_init_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x5686ea75	p54_parse_firmware
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x6b2e86a7	p54_read_eeprom
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x8e2dd35b	p54_parse_eeprom
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xb60d70aa	p54_unregister_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xbf21dfe4	p54_free_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xc68a0a81	p54_register_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xd6986a5f	p54_free_skb
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x008207bd	rt2x00mac_add_interface
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x04f308d7	rt2x00mac_get_tx_stats
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x0774e71f	rt2x00queue_get_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x0a238253	rt2x00mac_remove_interface
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x0d3f28ad	rt2x00mac_rfkill_poll
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x159e511e	rt2x00queue_map_txskb
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x2362bdb8	rt2x00mac_config
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x33e2fa70	rt2x00lib_beacondone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x375c6a03	rt2x00mac_tx
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x484234d0	rt2x00mac_configure_filter
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x4c5c4e44	rt2x00mac_conf_tx
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x5e152112	rt2x00mac_bss_info_changed
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x72e57a5a	rt2x00lib_rxdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x79a53e3b	rt2x00lib_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x7e7d4651	rt2x00lib_remove_dev
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x84c1607a	rt2x00mac_set_tim
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xa6ff01ca	rt2x00lib_txdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xc33945a6	rt2x00mac_set_key
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xd3b8c0d5	rt2x00mac_stop
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xd56c5d6c	rt2x00lib_probe_dev
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xde0677ea	rt2x00lib_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xf35e0f1a	rt2x00queue_get_entry
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xf9188555	rt2x00mac_get_stats
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xf952d679	rt2x00mac_start
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x02f5d641	rt2x00pci_probe
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x0b488b81	rt2x00pci_remove
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x320b1ec6	rt2x00pci_regbusy_read
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x3e07d9e2	rt2x00pci_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x5762076c	rt2x00pci_initialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xa7814e10	rt2x00pci_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xc6b4f617	rt2x00pci_write_tx_data
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xd0f9a667	rt2x00pci_uninitialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xeed4ce50	rt2x00pci_rxdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x078cded1	rt2x00usb_kick_tx_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x2a3061f3	rt2x00usb_uninitialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x3a3b48db	rt2x00usb_regbusy_read
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x48f701cf	rt2x00usb_kill_tx_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x5066d211	rt2x00usb_clear_entry
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x6e42163d	rt2x00usb_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x8558da9f	rt2x00usb_disconnect
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x85a27591	rt2x00usb_disable_radio
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x878f0193	rt2x00usb_vendor_request_large_buff
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xa14cab56	rt2x00usb_initialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xbe7c6eda	rt2x00usb_vendor_req_buff_lock
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xc1821d32	rt2x00usb_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xc98161f2	rt2x00usb_probe
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xd69914d3	rt2x00usb_write_tx_data
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xdfb5f67c	rt2x00usb_vendor_request_buff
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xf4154b8f	rt2x00usb_vendor_request
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0x11c8307a	wl1251_init_ieee80211
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0x5bcf2541	wl1251_alloc_hw
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0x8860f491	wl1251_free_hw
+EXPORT_SYMBOL_GPL drivers/pci/hotplug/acpiphp 0x3ee84ea8	acpiphp_register_attention
+EXPORT_SYMBOL_GPL drivers/pci/hotplug/acpiphp 0xea053f30	acpiphp_unregister_attention
+EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0x288c154c	pcf50633_mbc_get_status
+EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0xaf5b3497	pcf50633_mbc_usb_curlim_set
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x1ecd5975	wm8350_register_led
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x4a89f3c2	wm8350_register_regulator
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x6555168a	wm8350_isink_set_flash
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x71b3b619	wm8350_dcdc_set_slot
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x7df6d077	wm8350_ldo_set_slot
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xf5a25146	wm8350_dcdc25_set_mode
+EXPORT_SYMBOL_GPL drivers/regulator/wm8400-regulator 0x53d5283b	wm8400_register_regulator
+EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x374c1e1c	fcoe_wwn_from_mac
+EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x8ee4af2f	fcoe_libfc_config
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x00bcd540	iscsi_itt_to_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0233f349	iscsi_pool_init
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x04eea475	iscsi_change_queue_depth
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x05e81e53	iscsi_conn_stop
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0b91cb86	iscsi_conn_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x132ac06d	iscsi_eh_target_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x13f4529a	iscsi_conn_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x15bcc55b	iscsi_conn_send_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x195aef7d	iscsi_conn_bind
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x1ada7cde	iscsi_requeue_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x1bdf11a3	iscsi_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x24c5be57	iscsi_host_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x2701a211	iscsi_complete_scsi_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x2a3af79a	iscsi_session_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x2a828680	iscsi_session_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x3d3531df	iscsi_eh_device_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x3f2ecda7	iscsi_session_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x41ba1d14	iscsi_pool_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4b2fa2d2	iscsi_conn_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4b4aad67	iscsi_host_add
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x590b83d3	iscsi_session_failure
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5aa27880	iscsi_itt_to_ctask
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x65d692e1	iscsi_host_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x68e11a41	iscsi_update_cmdsn
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x70d22977	__iscsi_get_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x78e6232c	iscsi_host_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x7bd81666	iscsi_complete_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x7c600dfc	iscsi_host_set_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x80d22d57	iscsi_conn_start
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x816f6450	iscsi_prep_data_out_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x9190b922	iscsi_put_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x94776676	iscsi_suspend_tx
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x9da19bef	iscsi_queuecommand
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x9ea4d818	iscsi_eh_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x9f82fc95	iscsi_conn_failure
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xaee1cb08	__iscsi_complete_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xc5558071	iscsi_verify_itt
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xd9c5e1e0	iscsi_conn_queue_work
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xdfb7c35a	iscsi_session_recovery_timedout
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xee3c7fd1	iscsi_set_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf92228b6	iscsi_suspend_queue
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xfdb1a15f	iscsi_host_remove
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x010c2bff	iscsi_segment_init_linear
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x1b35f9ab	iscsi_tcp_segment_unmap
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x1f669430	iscsi_tcp_conn_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x292c4b01	iscsi_tcp_r2tpool_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x41b6b38f	iscsi_tcp_conn_get_stats
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x4ce6ef7e	iscsi_tcp_hdr_recv_prep
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x788d6fdd	iscsi_tcp_cleanup_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x85b2e0a5	iscsi_tcp_conn_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x8996f4ef	iscsi_tcp_segment_done
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xa1a27654	iscsi_tcp_r2tpool_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xb23ab879	iscsi_tcp_recv_skb
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xbdec32d1	iscsi_segment_seek_sg
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xd1e8b84a	iscsi_tcp_recv_segment_is_hdr
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xd295ffa0	iscsi_tcp_dgst_header
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xe5e83aaa	iscsi_tcp_task_init
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xfffe9f88	iscsi_tcp_task_xmit
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x08e967b8	sas_slave_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x0f476bf7	sas_domain_release_transport
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x1f2047e3	sas_bios_param
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x1f32323a	sas_slave_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x272b06c1	sas_target_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x45287f54	sas_phy_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x526e2152	sas_slave_configure
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x630f18c0	__sas_task_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x70106514	sas_ssp_task_response
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x8554c3b4	sas_change_queue_depth
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x87b9f76d	sas_ioctl
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x970c4bb7	sas_eh_bus_reset_handler
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x9dc0522a	sas_task_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xab4b72cd	sas_unregister_ha
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xb8aac97f	sas_find_local_phy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xbc7c7282	sas_register_ha
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xc930b456	sas_eh_device_reset_handler
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xcee46d55	sas_queuecommand
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xd797b368	sas_domain_attach_transport
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xed1cf704	sas_request_addr
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xf30e8cc7	sas_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xf8d11ba7	sas_change_queue_type
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xfef774ea	sas_phy_enable
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x1eca6b9d	srp_target_free
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x27077de1	srp_iu_get
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x2b1e5d34	srp_cmd_queue
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x7ca26015	srp_transfer_data
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x8be57413	srp_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x9bf82d3b	srp_iu_put
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x3682bc06	scsi_tgt_free_queue
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x9c85fe65	scsi_tgt_it_nexus_create
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xa9102c73	scsi_tgt_alloc_queue
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xb330ee2e	scsi_host_get_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xb75125ad	scsi_tgt_cmd_to_host
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xc2fe1682	scsi_tgt_it_nexus_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xc938311d	scsi_tgt_queue_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xd6abbbf0	scsi_host_put_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xf3b86b83	scsi_tgt_tsk_mgmt_request
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x04e04c53	iscsi_scan_finished
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x08fb3f6f	iscsi_create_conn
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x1244332e	iscsi_create_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x214d40fd	iscsi_create_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x2c87880e	iscsi_destroy_conn
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x4d203653	iscsi_free_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x5a1fdc04	iscsi_offload_mesg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x5dec4b70	iscsi_register_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x78d859b5	iscsi_remove_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x7afd65bb	iscsi_recv_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x7c987b93	iscsi_block_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x7e33398d	iscsi_add_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x91f1ebe0	iscsi_destroy_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xa155b1b3	iscsi_lookup_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xa623f4d5	iscsi_host_for_each_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xb8d37438	iscsi_session_chkready
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xbecbf8bd	iscsi_unregister_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xdac7444d	iscsi_conn_error_event
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xdd3af917	iscsi_destroy_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xe1237005	iscsi_alloc_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xe295ce02	iscsi_unblock_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xe6808587	iscsi_session_event
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x29597ae2	srp_rport_del
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x67b42da7	srp_release_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x84e73f8d	srp_remove_host
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xcd6552f7	srp_rport_add
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xeaadde1c	srp_attach_transport
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x466cc29d	spi_bitbang_setup_transfer
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x4a96c561	spi_bitbang_stop
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x655ced4a	spi_bitbang_setup
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xc18d11a7	spi_bitbang_cleanup
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xdb59fc02	spi_bitbang_start
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xff163e8b	spi_bitbang_transfer
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x0249c24f	comedi_get_device_file_info
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x4740fc22	comedi_usb_auto_config
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x4e4b42d1	comedi_free_board_minor
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x813c41b0	comedi_pci_auto_unconfig
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xb5725623	comedi_usb_auto_unconfig
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xc57fdaf4	comedi_pci_auto_config
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xd7a6c7b7	comedi_alloc_board_minor
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/das08 0x2ec4023c	das08_common_detach
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/das08 0x86fcde20	das08_cs_boards
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/das08 0xf86744c0	das08_common_attach
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0x25e55b95	labpc_1200_is_unipolar
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0x6adab010	labpc_common_detach
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0x8285332a	range_labpc_1200_ai
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0xaf1e4347	labpc_1200_ai_gain_bits
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0xb3b1885c	labpc_common_attach
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x08b31ab3	ni_tio_init_counter
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x0b7a0464	ni_gpct_device_destroy
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x2f6a2c41	ni_tio_arm
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x530c4823	ni_gpct_device_construct
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x846497af	ni_tio_rinsn
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x90514a50	ni_tio_insn_config
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xac00c13a	ni_tio_winsn
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xac14bc93	ni_tio_set_gate_src
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x58821a42	ni_tio_handle_interrupt
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x76f69816	ni_tio_set_mite_channel
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x7b4e1221	ni_tio_acknowledge_and_confirm
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x9cf6e967	ni_tio_cmd
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0xd6150c2f	ni_tio_cancel
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0xe23b6fc1	ni_tio_cmdtest
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x2468ed34	oslec_hpf_tx
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x579d2806	oslec_snapshot
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x587711de	oslec_create
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x882d5f27	oslec_adaption_mode
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xf828c15b	oslec_flush
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xf923a5b1	oslec_free
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xfabc3747	oslec_update
+EXPORT_SYMBOL_GPL drivers/staging/hv/hv_vmbus 0x0a1ee779	osd_WaitEventWait
+EXPORT_SYMBOL_GPL drivers/staging/hv/hv_vmbus 0x4cc1b61c	osd_WaitEventCreate
+EXPORT_SYMBOL_GPL drivers/staging/hv/hv_vmbus 0x5432d87a	osd_WaitEventSet
+EXPORT_SYMBOL_GPL drivers/staging/hv/hv_vmbus 0x746d1786	osd_PageAlloc
+EXPORT_SYMBOL_GPL drivers/staging/hv/hv_vmbus 0x83911c38	osd_PageFree
+EXPORT_SYMBOL_GPL drivers/staging/hv/hv_vmbus 0xa1b8d1ad	osd_WaitEventWaitEx
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x07a50dfd	usbip_event_happened
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x0bbd8aa4	usbip_recv_iso
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x1b604e6f	usbip_task_init
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x3d56663a	usbip_start_eh
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x557838a8	dev_attr_usbip_debug
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x73a85cd7	usbip_recv_xbuff
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x78b72f44	usbip_debug_flag
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x8ac5ae01	usbip_event_add
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x9a539a30	usbip_pack_pdu
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x9e4f7289	usbip_xmit
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x9f4c6b85	usbip_pad_iso
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xa37accad	usbip_start_threads
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xc5616431	sockfd_to_socket
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xc7f91cbd	usbip_dump_urb
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xcb0f7c5b	usbip_stop_threads
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xd02753dc	usbip_header_correct_endian
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xe1ea0586	usbip_dump_header
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xe40fae65	usbip_alloc_iso_desc_pdu
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xe7ce59f4	usbip_stop_eh
+EXPORT_SYMBOL_GPL drivers/uio/uio 0x213ecb81	uio_unregister_device
+EXPORT_SYMBOL_GPL drivers/uio/uio 0x333f0859	__uio_register_device
+EXPORT_SYMBOL_GPL drivers/uio/uio 0x4e708c51	uio_event_notify
+EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0x02866289	usbatm_usb_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0x183af492	usbatm_usb_probe
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x2448ec78	usb_ftdi_elan_edset_output
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x2e0db62a	usb_ftdi_elan_edset_single
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x83cad316	usb_ftdi_elan_edset_flush
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x97e33547	ftdi_elan_gone_away
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xbe106c55	usb_ftdi_elan_read_pcimem
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xc2bc4b6f	usb_ftdi_elan_write_pcimem
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xe0bb8020	usb_ftdi_elan_edset_setup
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xea9b09cd	usb_ftdi_elan_edset_empty
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xf4d6b39e	usb_ftdi_elan_edset_input
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x0382a877	ezusb_set_reset
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x05d61f6b	usb_serial_generic_open
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x1695ece5	usb_serial_generic_write
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x2189cfde	ezusb_writememory
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x74c4b91d	usb_serial_generic_resubmit_read_urb
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x779fa664	usb_serial_probe
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x8080e236	usb_serial_handle_break
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x91151d80	usb_serial_register
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x9e741b63	usb_serial_port_softint
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xaed32268	usb_serial_generic_read_bulk_callback
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xb4430e3b	usb_serial_generic_resume
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xc9e9dccb	usb_serial_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xd36bea06	usb_serial_handle_dcd_change
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xf41c5ce7	usb_serial_deregister
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xf5b186ef	usb_serial_generic_write_bulk_callback
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xf6a01d74	usb_serial_handle_sysrq_char
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x03076779	usb_stor_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x073444c0	usb_usual_ignore_device
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x0be13004	usb_storage_usb_ids
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x19860572	usb_stor_suspend
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x19e71cc9	usb_stor_Bulk_transport
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1bc3edc2	usb_stor_sense_invalidCDB
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x23fca9a9	usb_stor_CB_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x406f2945	usb_stor_clear_halt
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x47385c6e	usb_stor_control_msg
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x4adf52dc	usb_stor_CB_transport
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x51073d9c	usb_stor_Bulk_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x524a07c6	usb_stor_probe1
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x5e2c89e5	usb_stor_reset_resume
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x5f0473c1	usb_stor_pre_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x657a08b8	usb_stor_ctrl_transfer
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x8cb5492f	usb_stor_bulk_transfer_sg
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x96db1df5	usb_stor_post_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x997ef96b	usb_stor_bulk_transfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xa171e243	usb_stor_access_xfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xa942a3f2	usb_stor_resume
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xd662e508	fill_inquiry_response
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xe334cada	usb_stor_probe2
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xe3e71b5e	usb_stor_set_xfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xefe6515b	usb_stor_transparent_scsi_command
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xfca66cdd	usb_stor_bulk_srb
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x329e393d	rpipe_ep_disable
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x512a967f	__wa_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x5b0fc154	wa_urb_enqueue_run
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x68852e78	wa_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x73d4650a	wa_urb_enqueue
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x8668d134	rpipe_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xdb580afe	wa_urb_dequeue
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x02e0c410	wusbhc_reset_all
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x0bb6bf5e	wusb_cluster_id_get
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x2efc3567	wusbhc_rh_control
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x4c619f08	wusbhc_b_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x57c4c9fb	wusbhc_giveback_urb
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x5889f7c5	__wusb_dev_get_by_usb_dev
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x662434d2	wusbhc_rh_suspend
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x7761fc17	wusbhc_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x793fead6	wusbhc_chid_set
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x8ff9b608	wusbhc_rh_start_port_reset
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xa5c3d8a0	wusbhc_b_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb0d61911	wusbhc_rh_resume
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb725d128	wusb_cluster_id_put
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xbaa972e2	wusbhc_mmcie_rm
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xbc1673b0	wusbhc_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xdb1a6cf0	wusbhc_rh_status_data
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xdf6e4f08	wusb_dev_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xe6cf3066	wusbhc_handle_dn
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf6f045e4	wusbhc_mmcie_set
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf770a6b4	wusbd
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xfe2e17d7	wusb_et_name
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x0630023e	i1480_cmd
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x36ae2d65	i1480_rceb_check
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x7b817d6f	i1480_fw_upload
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x1539c0c8	uwb_rts_cts_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x23ca0c43	uwb_rts_cts_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x44f34021	uwb_pca_base_priority_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x5e49905a	uwb_ack_policy_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xb68edf20	uwb_phy_rate_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xdef6da2b	uwb_phy_rate_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xe0ac934b	uwb_pca_base_priority_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xe2a7223f	uwb_ack_policy_show
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x18330f0d	umc_device_register
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x3c59558b	__umc_driver_register
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x85d6b1d6	umc_match_pci_id
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xaa095419	umc_driver_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xb3ac96d5	umc_controller_reset
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xcd73d3c0	umc_bus_type
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xf21618d4	umc_device_create
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xfb279d26	umc_device_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x02e16a09	uwb_radio_start
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x05f05757	uwb_rsv_destroy
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x128ae03e	uwb_rsv_modify
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x14dfc9c3	uwb_rc_rm
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x1d0f80a8	uwb_rc_pre_reset
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2075ba81	uwb_pal_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x22dc0c80	uwb_radio_stop
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x235bb961	uwb_rsv_create
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2c3bece3	uwb_rc_add
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2cb8fcbf	uwb_dev_try_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x449cac9b	uwb_rc_ie_rm
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x469c5f2d	uwb_rc_reset_all
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4d57ae3c	uwb_rsv_type_str
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5596a9f6	uwb_rc_cmd_async
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x58554226	uwb_rc_cmd
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x58eff876	uwb_notifs_deregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x618912e1	uwb_rc_mac_addr_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x626e8a87	__uwb_rc_try_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x63cea5d0	uwb_rc_alloc
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x63dce779	uwb_rc_ie_add
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6b9377c5	uwb_ie_next
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6bcd28f0	uwb_rc_neh_error
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6dd7d926	uwb_dev_for_each
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6f1f3831	uwb_rc_get_by_dev
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x727c2b3c	uwb_rc_get_by_grandpa
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x7f1e50ca	uwb_est_find_size
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x85417e20	uwb_notifs_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x8cb42db6	__uwb_addr_print
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x969f738b	uwb_pal_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x98413234	uwb_rsv_state_str
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x9b85ccc3	uwb_rc_init
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xafb014ec	uwb_pal_init
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb0a09251	uwb_rsv_get_usable_mas
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb56d816f	uwb_rc_vcmd
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb94bcc7e	uwb_rc_post_reset
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xbbb96d89	uwb_rsv_accept
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xbc96fded	uwb_rsv_establish
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xc19ca7a4	uwb_rc_put
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xccaed364	uwb_rc_dev_addr_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd15729f4	uwb_rc_neh_grok
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xeb4cab9a	uwb_est_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf7ca313a	uwb_est_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xfa22f860	uwb_rsv_terminate
+EXPORT_SYMBOL_GPL drivers/uwb/whci 0x24c44a8f	whci_wait_for
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x114b0f88	wlp_dev_name_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x141eb357	wlp_eda_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x26cd82ae	wlp_dev_model_name_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x2f9049f0	wlp_eda_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x481ac694	wlp_dev_serial_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x488960fd	wlp_uuid_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x48a04406	wlp_dev_prim_OUI_sub_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x4b6f77be	wlp_receive_frame
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x4c8ce537	wlp_dev_name_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x52beec61	wlp_uuid_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x55ec8318	wlp_prepare_tx_frame
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x587b1621	wlp_wss_setup
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x636ac21b	wlp_dev_model_nr_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x67275667	wlp_dev_prim_category_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x82ba0175	wlp_wss_activate_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x8457e81c	wlp_setup
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x85a38099	wlp_dev_prim_subcat_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x8d406435	wlp_dev_prim_OUI_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xa015dd8d	wlp_wss_remove
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xa17b8218	wlp_remove
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xa61bc35a	wlp_dev_model_nr_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xb506edbf	wlp_dev_prim_OUI_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xb69d4e95	wlp_reset_all
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xbb103a3a	wlp_dev_model_name_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xc2a8add4	wlp_wss_activate_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xcb5400da	wlp_dev_manufacturer_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xcf82e172	wlp_neighborhood_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xd6bf0f19	wlp_dev_serial_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xe308ac7e	wlp_dev_prim_category_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xea754554	wlp_dev_prim_OUI_sub_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xf4643777	wlp_dev_manufacturer_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xf6efeeb8	wlp_dev_prim_subcat_store
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x05aec9e1	ili9320_probe_spi
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x0c79c765	ili9320_suspend
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x42581a85	ili9320_shutdown
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x8a7edfbb	ili9320_write
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x8b7f1085	ili9320_remove
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xc015feec	ili9320_resume
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xd062b5a2	ili9320_write_regs
+EXPORT_SYMBOL_GPL drivers/video/fb_ddc 0x3b78ba8f	fb_ddc_read
+EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0xa52d52c7	fb_sys_write
+EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0xee01b47c	fb_sys_read
+EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0x832e4f5e	sis_free_new
+EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0xdfd71082	sis_malloc_new
+EXPORT_SYMBOL_GPL drivers/video/vermilion/vmlfb 0x016e6c20	vmlfb_unregister_subsys
+EXPORT_SYMBOL_GPL drivers/video/vermilion/vmlfb 0x90c018c6	vmlfb_register_subsys
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x03d3d720	w1_next_pullup
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x05f85617	w1_touch_block
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x1e04bf02	w1_read_block
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x7c2f2afb	w1_calc_crc8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x9db4ab79	w1_reset_select_slave
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xe63ddb0e	w1_write_8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xee7f1cce	w1_reset_bus
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xf19fb0d9	w1_read_8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xfbebaec5	w1_write_block
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x0864c4a4	dlm_new_lockspace
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x9321df95	dlm_lock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xba2c94d1	dlm_posix_get
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xcf9f3328	dlm_release_lockspace
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xdc583c08	dlm_unlock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xec962b4e	dlm_posix_lock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xfb2cca3c	dlm_posix_unlock
+EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0x50a25645	exportfs_encode_fh
+EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0xd8abc92a	exportfs_decode_fh
+EXPORT_SYMBOL_GPL fs/fat/fat 0x0ddfc890	fat_setattr
+EXPORT_SYMBOL_GPL fs/fat/fat 0x1bdbc703	fat_search_long
+EXPORT_SYMBOL_GPL fs/fat/fat 0x2fd63d20	fat_flush_inodes
+EXPORT_SYMBOL_GPL fs/fat/fat 0x340d87da	fat_alloc_new_dir
+EXPORT_SYMBOL_GPL fs/fat/fat 0x3fc59266	fat_fs_error
+EXPORT_SYMBOL_GPL fs/fat/fat 0x454679d4	fat_add_entries
+EXPORT_SYMBOL_GPL fs/fat/fat 0x56b325ec	fat_attach
+EXPORT_SYMBOL_GPL fs/fat/fat 0x5e186d0c	fat_free_clusters
+EXPORT_SYMBOL_GPL fs/fat/fat 0x7cd80dad	fat_dir_empty
+EXPORT_SYMBOL_GPL fs/fat/fat 0x8dda0060	fat_get_dotdot_entry
+EXPORT_SYMBOL_GPL fs/fat/fat 0x952d16df	fat_scan
+EXPORT_SYMBOL_GPL fs/fat/fat 0xa7d5b6e4	fat_remove_entries
+EXPORT_SYMBOL_GPL fs/fat/fat 0xb0c3475c	fat_time_unix2fat
+EXPORT_SYMBOL_GPL fs/fat/fat 0xb3054069	fat_getattr
+EXPORT_SYMBOL_GPL fs/fat/fat 0xb6c60c2b	fat_detach
+EXPORT_SYMBOL_GPL fs/fat/fat 0xcc764984	fat_fill_super
+EXPORT_SYMBOL_GPL fs/fat/fat 0xd3032d7e	fat_build_inode
+EXPORT_SYMBOL_GPL fs/fat/fat 0xfaed1b04	fat_sync_inode
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x01178aef	nlmsvc_ops
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x09e8e028	nlmclnt_init
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x17ce645d	locks_end_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x1a618932	nlmsvc_unlock_all_by_ip
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x3e63c6ae	nlmclnt_proc
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x4c684586	nlmclnt_done
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x650e7a1f	nlmsvc_unlock_all_by_sb
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x6f959b35	locks_in_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x96877ac4	locks_start_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xa7b91a7b	lockd_down
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xf6933c48	lockd_up
+EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0x2c32ccbb	nfsacl_decode
+EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0x524236c7	nfsacl_encode
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1206f9df	o2nm_node_put
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x14a87767	o2nm_get_node_by_ip
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1b89c6ee	o2hb_fill_node_map
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1d747ce3	o2hb_check_node_heartbeating
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x22767630	o2hb_unregister_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x2efb9493	o2hb_register_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x36418553	o2net_send_message
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x4900035b	o2hb_stop_all_regions
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x521e0726	o2net_send_message_vec
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x740c7dad	o2hb_setup_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x81a17396	mlog_and_bits
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x8caed5e0	o2nm_node_get
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa82a8645	o2nm_this_node
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa87bc9e7	o2nm_configured_node_map
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xae808bac	o2net_register_handler
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xbaeb4700	o2hb_check_node_heartbeating_from_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xd60f2c6c	o2hb_check_local_node_heartbeating
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xe8d258df	o2nm_get_node_by_num
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf1a5611d	o2net_unregister_handler_list
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf56c2017	mlog_not_bits
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x09c33d57	dlm_register_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x0a2362db	dlm_unregister_domain
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x12f420dd	dlmlock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x52f56f8e	dlmunlock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x7a1211f8	dlm_setup_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd7ba575e	dlm_errmsg
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd8fa57a6	dlm_unregister_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xdcf24bed	dlm_register_domain
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xe39d7295	dlm_print_one_lock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xfb86b96f	dlm_errname
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0562c415	ocfs2_cluster_this_node
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x06379db6	ocfs2_dlm_lvb_valid
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0b5fee49	ocfs2_stack_glue_unregister
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0e27f909	ocfs2_dlm_lock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x21db5b88	ocfs2_cluster_disconnect
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x233078e9	ocfs2_plock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4a1f6fe9	ocfs2_cluster_connect
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4d3af7fa	ocfs2_cluster_hangup
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x81c85a68	ocfs2_dlm_lock_status
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x882a3d27	ocfs2_stack_glue_register
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x91fab465	ocfs2_dlm_lvb
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x963932a3	ocfs2_stack_glue_set_locking_protocol
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xa7d5c1c0	ocfs2_dlm_unlock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xbbc4ef97	ocfs2_stack_supports_plocks
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xd066711e	ocfs2_dlm_dump_lksb
+EXPORT_SYMBOL_GPL lib/lzo/lzo_compress 0x2e1d43cf	lzo1x_1_compress
+EXPORT_SYMBOL_GPL lib/lzo/lzo_decompress 0x2a1538ca	lzo1x_decompress_safe
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x300d7e57	free_rs
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x6fbb3bd9	init_rs_non_canonical
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xabda1e2e	decode_rs16
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xb050f329	init_rs
+EXPORT_SYMBOL_GPL net/802/garp 0x09bcaaef	garp_uninit_applicant
+EXPORT_SYMBOL_GPL net/802/garp 0x45675421	garp_unregister_application
+EXPORT_SYMBOL_GPL net/802/garp 0x49501063	garp_request_join
+EXPORT_SYMBOL_GPL net/802/garp 0x5798068c	garp_register_application
+EXPORT_SYMBOL_GPL net/802/garp 0x6554c636	garp_request_leave
+EXPORT_SYMBOL_GPL net/802/garp 0x86f8d05c	garp_init_applicant
+EXPORT_SYMBOL_GPL net/802/stp 0x084a5215	stp_proto_unregister
+EXPORT_SYMBOL_GPL net/802/stp 0xc31e3146	stp_proto_register
+EXPORT_SYMBOL_GPL net/ax25/ax25 0x2464d0c8	ax25_register_pid
+EXPORT_SYMBOL_GPL net/ax25/ax25 0xac93ae05	ax25_bcast
+EXPORT_SYMBOL_GPL net/ax25/ax25 0xaeb7451e	ax25_defaddr
+EXPORT_SYMBOL_GPL net/bluetooth/bluetooth 0x5354dd68	bt_class
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x0efcdc4b	dccp_rcv_state_process
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x107aaa2e	dccp_sendmsg
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x1d99d49a	dccp_timestamp
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x266ca64a	dccp_hashinfo
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x2d2766d7	dccp_ioctl
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x33ef6c0a	dccp_create_openreq_child
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x39cbd274	dccp_insert_option_elapsed_time
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x3eae0da7	dccp_poll
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x40de1efc	dccp_parse_options
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x4cdd391d	dccp_feat_list_purge
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x52468486	dccp_rcv_established
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x53ee48e7	dccp_send_sync
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x56ea266a	dccp_state_name
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x59b840e2	dccp_set_state
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x658173c4	dccp_getsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x6ac41024	dccp_insert_option
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x70b1d967	dccp_orphan_count
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x723e44bf	dccp_reqsk_send_ack
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x729ee7ac	dccp_death_row
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x72e4b210	dccp_child_process
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x79381ab6	compat_dccp_getsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x7f6a3316	dccp_check_req
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x854b4079	dccp_insert_option_timestamp
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x86be7924	dccp_packet_name
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x88018a2e	dccp_recvmsg
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x881641e6	dccp_ctl_make_reset
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x89340ec6	dccp_init_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x8a3412f5	dccp_shutdown
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x8b7d8caf	dccp_statistics
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x96378952	compat_dccp_setsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x96f3af50	dccp_close
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x9757214a	dccp_sync_mss
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x9d1fcab2	dccp_send_ack
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xacc9b21f	dccp_reqsk_init
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xb1a1bb19	dccp_make_response
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xc0852409	dccp_disconnect
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xc5239480	dccp_setsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xca93ea2f	dccp_destroy_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xd43c6c54	inet_dccp_listen
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xda96f26a	dccp_connect
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xe9601738	dccp_done
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x39ed7376	dccp_v4_do_rcv
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x55004ce5	dccp_v4_send_check
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xa366212a	dccp_v4_request_recv_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xba586c68	dccp_v4_connect
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xe7e1f035	dccp_invalid_packet
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xfde787f2	dccp_v4_conn_request
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0x6d40a921	need_ipv4_conntrack
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0xfa010b45	nf_nat_seq_adjust_hook
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_defrag_ipv4 0x6b6c3d10	nf_defrag_ipv4_enable
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x07ae60b6	nf_nat_proto_in_range
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x0f25d432	nf_nat_proto_unique_tuple
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x45eb096e	nf_nat_packet
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x6faf60e6	nf_nat_proto_find_get
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x7977f0ed	nf_nat_get_offset
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x94a08134	nf_nat_proto_nlattr_to_range
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xb57343dc	nf_nat_proto_range_to_nlattr
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xc9f5ba41	nf_nat_proto_put
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xd22d7c04	nf_nat_icmp_reply_translation
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat_proto_gre 0x636b12c8	nf_nat_need_gre
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x0a2470d4	tcp_vegas_state
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x29e5bc33	tcp_vegas_init
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x92c200e3	tcp_vegas_pkts_acked
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xdb7c1e08	tcp_vegas_get_info
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xf5cf36c7	tcp_vegas_cwnd_event
+EXPORT_SYMBOL_GPL net/mac80211/mac80211 0x0f5e4fc2	ieee80211_iterate_active_interfaces
+EXPORT_SYMBOL_GPL net/mac80211/mac80211 0xf3d909a8	ieee80211_iterate_active_interfaces_atomic
+EXPORT_SYMBOL_GPL net/netfilter/ipvs/ip_vs 0xe6476b4a	net_vs_ctl_path
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x041013fd	nf_conntrack_lock
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x045072cd	nf_ct_port_nla_policy
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x080bfc4c	nf_conntrack_l4proto_tcp4
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x0d55b86a	nf_conntrack_helper_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x154a292e	nf_conntrack_event_cb
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x1f58f01d	nf_ct_l3proto_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x24705d51	nf_ct_expect_init
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x252ae018	nf_conntrack_l3proto_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x2ccb6e61	nf_ct_iterate_cleanup
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x345e8f03	nf_ct_expect_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x36cef3bd	nf_conntrack_helper_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3976a429	nf_conntrack_alter_reply
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3a3d9ece	nf_conntrack_l4proto_tcp6
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3b59f7e7	__nf_ct_expect_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3bacfca2	nf_conntrack_l4proto_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3cd25e28	nf_ct_delete_from_lists
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3d20a943	nf_ct_expect_register_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3f5b1415	nf_ct_port_nlattr_to_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x40840727	nf_ct_nat_offset
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x428686b9	nf_conntrack_hash_insert
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x45a91c48	nf_conntrack_alloc
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4a867991	nf_conntrack_tuple_taken
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4b9065a9	nf_ct_alloc_hashtable
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4fc322cc	nf_conntrack_l4proto_udp4
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5882ba33	nf_conntrack_set_hashsize
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x59b8df88	nf_ct_remove_expectations
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5d72a6d8	nf_ct_helper_ext_add
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5ef5083b	nf_conntrack_flush_report
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x606c9d02	nf_conntrack_l3proto_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x62813e5c	nf_ct_port_nlattr_tuple_size
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x63183b81	nf_ct_expect_unregister_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x64f24002	nf_ct_get_tuplepr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x658ccac2	nf_ct_unexpect_related
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x661446f2	nf_conntrack_l4proto_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x67a3bf23	nf_conntrack_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6e224a7a	need_conntrack
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x71bba362	nf_conntrack_register_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x7309d6b2	nfnetlink_parse_nat_setup_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x76c93ebf	__nf_conntrack_confirm
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x78f9b710	nf_ct_l3proto_try_module_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x7df5404e	nf_conntrack_l4proto_udp6
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8033d2b8	nf_conntrack_unregister_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x86fa3c3d	nf_ct_get_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x89dd373b	nf_conntrack_untracked
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8a72268d	nf_ct_l3protos
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8bbf5bd3	nf_ct_unlink_expect
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8d0b2045	nf_ct_extend_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8d3d5124	nf_ct_l3proto_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8ffe7e89	nf_conntrack_htable_size
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x90ff6c9f	nf_ct_invert_tuplepr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9af3f6c1	nf_ct_free_hashtable
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9ba9212e	__nf_ct_l4proto_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9e9cbc4e	nf_conntrack_l3proto_generic
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xa0ce3008	nf_ct_expect_alloc
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb201b772	nf_conntrack_in
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb602c57e	nf_ct_l3proto_module_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb676a7bb	nf_ct_deliver_cached_events
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb874454e	nf_expect_event_cb
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xbdf93936	nf_ct_invert_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc0562ca5	nf_ct_expect_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc18ac88d	nf_ct_expect_hsize
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xd3f3459c	__nf_conntrack_helper_find_byname
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xd710b1eb	nf_ct_expect_related_report
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xd953a50c	__nf_ct_kill_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xdc937347	__nf_ct_try_assign_helper
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xeb079be3	seq_print_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf38bcdf3	nf_conntrack_max
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf3d786b1	print_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf43b4209	__nf_ct_refresh_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf5059e17	nf_conntrack_free
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf55b4b11	__nf_conntrack_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf7ac1c09	nf_ct_insert_dying_list
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xfe924a5e	nf_ct_extend_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xfe92f167	nf_ct_port_tuple_to_nlattr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_amanda 0x42454a4b	nf_nat_amanda_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_ftp 0x41c4841a	nf_nat_ftp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x0ba151ee	set_h245_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x13daf9c9	set_h225_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x404cda5e	nat_rtp_rtcp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x50eeabdf	nat_t120_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x6e135336	nat_callforwarding_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x9201fe8f	set_ras_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xb17dc388	set_sig_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xb38ddbb8	nat_q931_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xc33640fe	nat_h245_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xd8f32b48	get_h225_addr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_irc 0x90f01340	nf_nat_irc_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x7cf6848b	nf_nat_pptp_hook_expectfn
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x9465873f	nf_nat_pptp_hook_outbound
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0xa07c7d9c	nf_nat_pptp_hook_inbound
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0xa6dca852	nf_nat_pptp_hook_exp_gre
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_proto_gre 0x694cfa36	nf_ct_gre_keymap_add
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_proto_gre 0x97025e07	nf_ct_gre_keymap_destroy
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x1b7c56f9	nf_nat_sdp_port_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x1f33f563	nf_nat_sdp_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x577b912a	ct_sip_get_header
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x6fc59583	ct_sip_parse_numerical_param
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x807543a6	nf_nat_sip_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x8c22bc74	ct_sip_parse_request
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x90246147	nf_nat_sip_expect_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xb755d461	nf_nat_sdp_media_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xc9884685	ct_sip_get_sdp_header
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xcbe20bb4	ct_sip_parse_header_uri
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xfa8b732c	ct_sip_parse_address_param
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xfe07f773	nf_nat_sdp_session_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_tftp 0x02a22150	nf_nat_tftp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_tproxy_core 0x100f2c83	nf_tproxy_assign_sock
+EXPORT_SYMBOL_GPL net/netfilter/nf_tproxy_core 0x7dca4a08	nf_tproxy_get_sock_v4
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x1f58e71b	nfnl_lock
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x2725a110	nfnetlink_subsys_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x3895cd7a	nfnl_unlock
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x553f14f7	nfnetlink_send
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x7fa13bba	nfnetlink_subsys_register
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xba391a01	nfnetlink_unicast
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xeca95329	nfnetlink_has_listeners
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xef9b4bbd	nfnetlink_set_err
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink_log 0x97c9b64b	nfulnl_log_packet
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x0438588f	xt_compat_target_to_user
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x0bccc7b8	xt_compat_match_to_user
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x0feb64ad	xt_proto_fini
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x12355fd8	xt_unregister_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x161d1417	xt_compat_unlock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x2185b9bf	xt_compat_match_offset
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x2d8c5253	xt_compat_target_offset
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x363cd1a2	xt_compat_target_from_user
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x3a4f93e9	xt_check_target
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x40728a63	xt_find_revision
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x437bc6b9	xt_proto_init
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x4c85c154	xt_find_table_lock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x4f432b51	per_cpu__xt_info_locks
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x5f82f1f7	xt_compat_flush_offsets
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x684694c5	xt_compat_add_offset
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x6d1f406a	xt_replace_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x6f9aa2fb	xt_compat_calc_jump
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x71b97bd1	xt_check_match
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xd201a2ea	xt_request_find_target
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xd7034151	xt_table_unlock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xe0b4971b	xt_compat_lock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xed56b6da	xt_compat_match_from_user
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xee7c9768	xt_register_table
+EXPORT_SYMBOL_GPL net/netfilter/xt_RATEEST 0xc2429b63	xt_rateest_lookup
+EXPORT_SYMBOL_GPL net/netfilter/xt_RATEEST 0xfc852663	xt_rateest_put
+EXPORT_SYMBOL_GPL net/rds/rds 0x00a467af	rds_wq
+EXPORT_SYMBOL_GPL net/rds/rds 0x03ea42e8	rds_conn_create
+EXPORT_SYMBOL_GPL net/rds/rds 0x0a6c8fd0	rds_send_get_message
+EXPORT_SYMBOL_GPL net/rds/rds 0x251e1321	rds_trans_register
+EXPORT_SYMBOL_GPL net/rds/rds 0x28f8611b	rds_message_addref
+EXPORT_SYMBOL_GPL net/rds/rds 0x2bf77fa8	rds_info_copy
+EXPORT_SYMBOL_GPL net/rds/rds 0x2c5c5514	rds_message_add_rdma_dest_extension
+EXPORT_SYMBOL_GPL net/rds/rds 0x2f41c61a	rds_recv_incoming
+EXPORT_SYMBOL_GPL net/rds/rds 0x3101936e	rds_message_add_extension
+EXPORT_SYMBOL_GPL net/rds/rds 0x46d35cf2	rds_rdma_send_complete
+EXPORT_SYMBOL_GPL net/rds/rds 0x59608517	rds_for_each_conn_info
+EXPORT_SYMBOL_GPL net/rds/rds 0x5bc93294	rds_trans_unregister
+EXPORT_SYMBOL_GPL net/rds/rds 0x5f9be975	rds_conn_destroy
+EXPORT_SYMBOL_GPL net/rds/rds 0x600fc7cf	rds_message_put
+EXPORT_SYMBOL_GPL net/rds/rds 0x62d351e0	rds_inc_addref
+EXPORT_SYMBOL_GPL net/rds/rds 0x73aac73d	rds_message_populate_header
+EXPORT_SYMBOL_GPL net/rds/rds 0x78b1ebae	rds_info_register_func
+EXPORT_SYMBOL_GPL net/rds/rds 0x865726e3	rds_page_copy_user
+EXPORT_SYMBOL_GPL net/rds/rds 0x885b03db	rds_cong_map_updated
+EXPORT_SYMBOL_GPL net/rds/rds 0x9b3e6113	per_cpu__rds_stats
+EXPORT_SYMBOL_GPL net/rds/rds 0xb68685f4	rds_info_deregister_func
+EXPORT_SYMBOL_GPL net/rds/rds 0xb83ad304	rds_message_unmapped
+EXPORT_SYMBOL_GPL net/rds/rds 0xbf81e1cd	rds_connect_complete
+EXPORT_SYMBOL_GPL net/rds/rds 0xc2da8e38	rds_stats_info_copy
+EXPORT_SYMBOL_GPL net/rds/rds 0xe3b3ece9	rds_conn_create_outgoing
+EXPORT_SYMBOL_GPL net/rds/rds 0xe4a7fa2b	rds_inc_put
+EXPORT_SYMBOL_GPL net/rds/rds 0xe7844104	rds_send_drop_acked
+EXPORT_SYMBOL_GPL net/rds/rds 0xfae8bfa9	rds_inc_init
+EXPORT_SYMBOL_GPL net/rds/rds 0xfc632270	rds_conn_drop
+EXPORT_SYMBOL_GPL net/rxrpc/af-rxrpc 0x2c33b010	rxrpc_register_security
+EXPORT_SYMBOL_GPL net/rxrpc/af-rxrpc 0xb723d0cc	rxrpc_unregister_security
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x00c52ef5	g_make_token_header
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x032a03b1	gss_mech_put
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x3cd3d24e	gss_pseudoflavor_to_service
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x4d84ccc6	gss_mech_register
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x60ac4078	gss_mech_get
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x7667022a	gss_service_to_auth_domain_name
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x7b208bbf	gss_mech_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x8d1a827e	svcauth_gss_register_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x91fec755	gss_mech_get_by_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x99f4e48d	gss_svc_to_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xb5dea7ef	g_token_size
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xca0a7594	gss_mech_get_by_name
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xcff9799f	svc_gss_principal
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xdf67966b	svcauth_gss_flavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xf8b2ff6e	g_verify_token_header
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x00c3cc44	svc_close_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x011943ab	xdr_init_encode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0478b132	auth_domain_put
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x05e807a9	xdr_encode_string
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x060786b2	auth_unix_forget_old
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x065994f1	xdr_encode_opaque_fixed
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x07a6c94b	svc_xprt_enqueue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x09050be4	svc_xprt_init
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x091bd510	xprt_complete_rqst
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0e3fb172	rpcb_getport_async
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0efcda21	rpc_pton
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0f668ba9	svc_auth_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1203e337	rpc_killall_tasks
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x12e280e3	svc_proc_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x16bb1f9e	xdr_encode_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x180bb248	xdr_encode_word
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x18dce94d	rpcauth_lookup_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1a9b53c1	rpc_wake_up_queued_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1f7acdda	svc_seq_show
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1f8285bf	cache_check
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x20783deb	xdr_decode_array2
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2147daec	rpc_unlink
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x21c6d4d1	xprt_update_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x235d778b	rpc_get_mount
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2505edc8	xdr_reserve_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2919b156	xdr_decode_string_inplace
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2aa17774	rpc_free_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2b2c95d2	auth_unix_add_addr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2b5fb15b	csum_partial_copy_to_xdr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2d277eac	rpcauth_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2d28e271	svc_unreg_xprt_class
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2dd69066	rpc_setbufsize
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2e30c829	svc_set_num_threads
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2eec63c9	xdr_encode_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x306dab33	rpc_proc_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x30eea69e	svc_create_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x31a89d59	rpc_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x35eb30f9	xdr_skb_read_bits
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x36ced7e0	svc_authenticate
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x372efd28	rpc_shutdown_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x380b0fb3	xprt_reserve_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3a4ee997	svc_destroy
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3b2b1aca	xdr_init_decode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3d605bd9	xdr_buf_subsegment
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x403c90f9	rpc_print_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4061bb88	sunrpc_cache_update
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x42301850	unix_domain_find
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x42be8a93	rpcauth_destroy_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4693739c	cache_purge
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4702dd7e	xdr_enter_page
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4bc4e982	svc_auth_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4d4d34d3	svc_create_pooled
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4ea0deb8	xprt_write_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x525672a2	xdr_inline_decode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x53445f68	nlm_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x542ac3c0	xprt_unregister_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x550547a3	rpc_destroy_wait_queue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5610e401	put_rpccred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x58bca4d8	rpc_run_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5983d1cb	svc_addsock
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5a22ce50	xdr_inline_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5b084ae2	rpc_delay
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5b14ec1a	rpc_put_mount
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5bd26000	rpc_proc_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5d67d1bf	svc_sock_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5ed952be	sunrpc_cache_register_pipefs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5f9cdf4e	xdr_buf_read_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6176631f	xprt_release_xprt_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x62525d6d	rpc_restart_call
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x630ac4de	svc_drop
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x65e12165	auth_domain_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x675524ec	rpc_sockaddr2uaddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x67850d2a	svc_wake_up
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6c5304c5	rpcb_getport_sync
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6c6c9d81	rpcauth_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6c7faf22	svc_sock_names
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6eea229d	svcauth_unix_purge
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x70fe4221	svc_prepare_thread
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x71fa908a	cache_flush
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7231219c	rpc_ntop
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x742fad1f	rpc_force_rebind
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x77005973	rpc_alloc_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x775adaf6	rpc_uaddr2sockaddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x78a31ac1	xdr_partial_copy_from_skb
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x78ad0c4d	xprt_wait_for_buffer_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x794f61ab	xprt_register_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x79771dbc	rpc_restart_call_prepare
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7de53067	rpc_init_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x80ca4fc1	svc_sock_update_bufs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x81d09a18	xdr_buf_from_iov
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x81f03eea	auth_domain_find
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x88341da8	rpc_wake_up_next
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x891b9fb7	rpc_call_null
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8a46137b	cache_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8dbfc185	xdr_write_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x90d68d21	xprt_adjust_cwnd
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x90f4fa63	svc_max_payload
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x92fab26f	auth_unix_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9451739d	rpc_peeraddr2str
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x953b5415	svcauth_unix_set_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x954a1609	xprt_release_rqst_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x99631db6	svc_process
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x99f192e9	svc_print_addr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9b07d8e0	xprt_lookup_rqst
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9c66e1ff	xprt_wake_pending_tasks
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9cf33ec7	rpc_queue_upcall
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa02d1ec8	rpc_call_start
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa44d5112	svc_xprt_names
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa77f9367	sunrpc_cache_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa80f117f	svc_sock_destroy
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa9cf165b	rpc_lookup_machine_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xad92c5b2	xprt_set_retrans_timeout_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xaf5bf6ef	nfs_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xaf9acc61	svc_reserve
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb1b3c5a8	rpcauth_init_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb2986b85	xprt_release_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb3045d7d	rpcauth_generic_bind_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb387b246	rpc_wake_up_status
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb9b5fc56	rpc_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xba673181	svc_find_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xba6a1369	xdr_shift_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbacb9f20	svc_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbdcb5700	cache_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbe177e25	read_bytes_from_xdr_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbf9d1b96	nfsd_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc0ea73e3	rpc_sleep_on
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc12435e3	rpc_calc_rto
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc195b502	svc_proc_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc3880471	xdr_decode_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc8e96dea	qword_addhex
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc9f25e3f	rpc_call_async
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcac589d2	rpc_mkpipe
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcdd8ca48	xdr_encode_array2
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcee467f3	xprt_load_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcf4346a9	xdr_read_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcfb5264c	sunrpc_cache_pipe_upcall
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcfdce9f3	rpc_exit_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd0236889	svc_xprt_copy_addrs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd100c25a	rpc_max_payload
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd2aa9a18	svc_exit_thread
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd45bf282	xdr_process_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd7ba938a	svc_reg_xprt_class
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd7ecb35b	svc_set_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd82c728e	rpc_init_wait_queue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xde8c4d52	rpc_put_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe02f40a7	svc_xprt_received
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe0699a29	rpc_malloc
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe2544d30	rpc_bind_new_program
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe4620404	xdr_decode_word
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe4d948b2	rpcauth_init_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe5919cb1	xdr_encode_opaque
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe5e6d8a2	rpc_clone_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe7b2a96a	rpc_peeraddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe83d9127	xprt_reserve_xprt_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe846145b	xprt_set_retrans_timeout_def
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe97f4ce5	qword_get
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xecaeaed6	xprt_disconnect_done
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xeccc261f	svc_xprt_put
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xedcf6be4	qword_add
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xedd1ba52	rpc_wake_up
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xeddc64a6	svc_recv
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xeeacab69	rpc_update_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf2b99aa4	rpc_lookup_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf722b3a7	__rpc_wait_for_completion_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf9d1164c	rpc_free
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfc395677	rpc_call_sync
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfca3f5b3	sunrpc_cache_unregister_pipefs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfe9d30fe	rpcauth_register
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x0737b31e	wimax_state_get
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x0917408c	wimax_msg_send
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x16adbbc4	wimax_msg_len
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x388ab9fb	wimax_report_rfkill_sw
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x55be3da8	wimax_msg_data
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x6f847990	wimax_msg_alloc
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x7f99460a	wimax_dev_rm
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x89779f1f	wimax_state_change
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xb0e04c31	wimax_msg
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xb7282449	wimax_msg_data_len
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xc91d2162	wimax_report_rfkill_hw
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xdef89704	wimax_dev_init
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xdf085284	wimax_dev_add
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x00a94919	cfg80211_wireless_stats
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x05199cb8	cfg80211_wext_giwessid
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x07f4d33f	cfg80211_wext_giwrts
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x0914259c	cfg80211_wext_siwrts
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x0a32ab66	cfg80211_wext_siwencodeext
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x211000f9	cfg80211_wext_giwrate
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x22fb4c2e	cfg80211_wext_siwretry
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x2301b24e	cfg80211_wext_giwmode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x24c1f351	cfg80211_wext_siwpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x2777d79a	cfg80211_wext_giwauth
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x2cba07f7	cfg80211_wext_siwmlme
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x3a097254	cfg80211_wext_giwname
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x421fc8de	cfg80211_wext_giwscan
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x49fb4871	cfg80211_wext_siwscan
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x52453597	cfg80211_wext_giwap
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x53b12c33	cfg80211_wext_siwmode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x6647b4cb	cfg80211_wext_giwtxpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x68a6c53e	cfg80211_wext_siwauth
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x693ba49f	cfg80211_wext_siwap
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x6ec1125d	cfg80211_wext_siwrate
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x92e28259	cfg80211_wext_siwfrag
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xa2fc0804	cfg80211_wext_giwrange
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xaad8cda2	cfg80211_wext_siwgenie
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xc0e432cd	cfg80211_wext_siwfreq
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xc5ace5d8	cfg80211_wext_siwtxpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xce04c46e	cfg80211_wext_giwfreq
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xd46b9dd0	cfg80211_wext_giwencode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xd4ed2a5b	cfg80211_wext_siwessid
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xdd3390fd	cfg80211_wext_giwfrag
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xedb9daa4	cfg80211_wext_siwencode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xf30ffacd	cfg80211_wext_giwretry
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xf53545b2	cfg80211_wext_giwpower
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x4d5d3871	ipcomp_destroy
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x4ebc6390	ipcomp_input
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0xac52387e	ipcomp_output
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0xe9883338	ipcomp_init_state
+EXPORT_SYMBOL_GPL sound/core/snd-pcm 0xa286a234	snd_pcm_format_name
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x057f2055	snd_hda_check_board_codec_sid_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x068a14d1	snd_hda_codec_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0707f878	snd_hda_codec_setup_stream
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x078f3bfa	snd_hda_attach_beep_device
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0cf48cac	snd_hda_multi_out_dig_cleanup
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0dfb2a9a	snd_hda_codec_cleanup_stream
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x153d7788	snd_hda_mixer_bind_switch_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x165a33f8	snd_hda_codec_read
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1b04e663	snd_hda_ch_mode_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1cce7889	snd_hda_ch_mode_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1d3fc358	snd_hda_codec_amp_read
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2008f45e	snd_hda_multi_out_analog_prepare
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x23f17a70	snd_hda_mixer_bind_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x24457803	snd_hda_create_spdif_in_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2867fb03	query_amp_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x290d07e5	snd_hda_mixer_amp_volume_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2e02033c	snd_hda_sequence_write
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2e4ce61b	snd_hda_build_pcms
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3b8a7dbd	snd_hda_queue_unsol_event
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x41f35821	snd_hda_multi_out_dig_open
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x48d1e966	snd_hda_get_sub_nodes
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4ed9e266	snd_hda_multi_out_analog_open
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4f096159	snd_hda_codec_amp_stereo
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4fc3d904	snd_hda_multi_out_dig_close
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x504d2ff1	snd_hda_mixer_bind_switch_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5ae76f73	auto_pin_cfg_labels
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5e938063	snd_hda_codec_resume_amp
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6117bdce	snd_hda_mixer_amp_switch_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x68c91e87	snd_hda_multi_out_analog_cleanup
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6bc80e7f	snd_hda_add_codec_preset
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6c7ba972	snd_hda_mixer_bind_ctls_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6c7d5f9c	snd_hda_mixer_amp_volume_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6edb0dfc	snd_hda_detach_beep_device
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6ef9f084	snd_hda_mixer_amp_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7b4624a0	snd_hda_add_new_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7eb2944d	snd_hda_create_spdif_share_sw
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x83381bc2	snd_hda_codec_set_pincfg
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x87111fb3	snd_hda_codec_get_pincfg
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8857d733	snd_hda_codec_amp_update
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8bed90bf	snd_hda_ch_mode_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8bee206a	snd_hda_codec_configure
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8d83e7fb	snd_hda_override_amp_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8e7ce7cc	snd_hda_get_connections
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8e7e52df	snd_hda_get_bool_hint
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8edec569	snd_hda_ctl_add
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8fb7809c	snd_hda_set_vmaster_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x905a3a11	snd_hda_check_board_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x91475dd2	snd_hda_add_vmaster
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x97fabae0	snd_hda_build_controls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9a2d7788	snd_hda_query_pin_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9a8e1877	snd_array_free
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9b77fbb8	snd_hda_find_mixer_ctl
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa2827d76	snd_hda_get_jack_location
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa2bacf54	snd_hda_mixer_bind_ctls_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa74ad678	snd_hda_check_amp_list_power
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xab275361	snd_hda_sequence_write_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xad87613e	snd_print_pcm_rates
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xafd6dbe8	snd_hda_mixer_amp_switch_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb2bdcec8	snd_hda_bind_vol
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb99614ec	snd_hda_codec_write_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbde63e91	snd_hda_resume
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbdfdaa97	snd_hda_load_patch
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbe7dd7dc	snd_array_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc34a54c6	snd_hda_calc_stream_format
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc652fd69	snd_hda_get_jack_connectivity
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc7837798	snd_hda_create_spdif_out_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcb301b6e	snd_hda_get_jack_type
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcce27eb0	snd_hda_input_mux_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xce7f6f68	snd_hda_power_down
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd3761934	snd_hda_is_supported_format
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd7d29b35	snd_hda_delete_codec_preset
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xde1d9d83	snd_hda_parse_pin_def_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xdf4fcacb	snd_hda_get_hint
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe7ca972d	snd_hda_mixer_bind_ctls_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe7cc61c3	snd_hda_mixer_amp_volume_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe9ac5a52	snd_hda_bus_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeaa68391	snd_hda_mixer_amp_switch_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeda3a721	snd_print_pcm_bits
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xef22a851	snd_hda_codec_resume_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf032de49	snd_hda_codec_write
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf415c7b6	snd_hda_bind_sw
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf6a6112e	snd_hda_suspend
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf9dddde7	snd_hda_power_up
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xfa9e7e62	snd_hda_multi_out_dig_prepare
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xff9b758e	snd_hda_input_mux_put
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1836 0x0d487960	ad1836_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1836 0x76fbb284	soc_codec_dev_ad1836
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1938 0x50c4f86f	soc_codec_dev_ad1938
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1938 0xfbe8188e	ad1938_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0x1246840b	ad73311_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0xf4d09457	soc_codec_dev_ad73311
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4104 0x930b09f5	soc_codec_device_ak4104
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0x960a043f	soc_codec_dev_ak4535
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0xab4500dd	ak4535_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4642 0xceb12b93	soc_codec_dev_ak4642
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4642 0xfd680908	ak4642_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0x6917c4b9	cs4270_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0x9887e445	soc_codec_device_cs4270
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-l3 0x78c84c7e	l3_write
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-max9877 0xa92d478c	max9877_add_controls
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0x0d017b05	pcm3008_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0xeec6ce6d	soc_codec_dev_pcm3008
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-spdif 0x00952f62	dit_stub_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0xa4e6539c	ssm2602_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0xe573cba6	soc_codec_dev_ssm2602
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0x1ba50908	soc_codec_dev_tlv320aic23
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0xc8d97064	tlv320aic23_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0x4a9228d6	aic26_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0x86ba3b9a	aic26_soc_codec_dev
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x5a01aba0	soc_codec_dev_aic3x
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xae987209	aic3x_button_pressed
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xb5ec6916	aic3x_set_gpio
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xb6be9029	aic3x_set_headset_detection
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xd97bf1b5	aic3x_headset_detected
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xd9b7487e	aic3x_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xe8e2be4a	aic3x_get_gpio
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0x4afe43ae	soc_codec_dev_twl4030
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0xcfab5adc	twl4030_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda134x 0x8b4625ab	soc_codec_dev_uda134x
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x7deb2f0b	uda1380_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0xbafc19c2	soc_codec_dev_uda1380
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0x0686f423	wm_hubs_add_analogue_controls
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0x5b47d599	wm_hubs_add_analogue_routes
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0x757206d5	wm_hubs_spkmix_tlv
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x7263c328	wm8350_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x8f70cded	wm8350_hp_jack_detect
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0xc37bec5f	soc_codec_dev_wm8350
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x2a9ee596	wm8400_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x5867160d	soc_codec_dev_wm8400
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0xc17e0d9c	wm8510_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0xff5e83fc	soc_codec_dev_wm8510
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8523 0x760265af	wm8523_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8523 0xd6356e66	soc_codec_dev_wm8523
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0xe8a2471a	wm8580_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0xf08fb873	soc_codec_dev_wm8580
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0x5ee09211	wm8728_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0x9fc87f26	soc_codec_dev_wm8728
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x4fc8ae58	soc_codec_dev_wm8731
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0xdf98c86d	wm8731_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x525ee3ab	soc_codec_dev_wm8750
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x77142ef2	wm8750_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0x7973b068	soc_codec_dev_wm8753
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0x9fae4612	wm8753_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8776 0x07809043	soc_codec_dev_wm8776
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8776 0x9a7f5d04	wm8776_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0x30a61367	wm8900_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0xb44a5673	soc_codec_dev_wm8900
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0x9f6705b0	soc_codec_dev_wm8903
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0xb63261c9	wm8903_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0xb343feaf	soc_codec_dev_wm8940
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0xc4e93774	wm8940_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0x5376265d	wm8960_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0xb0c72ac1	soc_codec_dev_wm8960
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8961 0x982af5f8	wm8961_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8961 0xa9dc1b80	soc_codec_dev_wm8961
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0x3e5dfe4c	wm8971_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0xa81e71b7	soc_codec_dev_wm8971
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8974 0x6e906fff	wm8974_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8974 0xd56985f2	soc_codec_dev_wm8974
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0x72808dc3	soc_codec_dev_wm8988
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0xef1adf6d	wm8988_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0xa53e56b4	wm8990_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0xbb9b6dfc	soc_codec_dev_wm8990
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8993 0x23aa241a	wm8993_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8993 0x90b63e3f	soc_codec_dev_wm8993
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0xc02181cd	wm9081_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0xe32a50b0	soc_codec_dev_wm9081
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0096794b	snd_soc_codec_set_cache_io
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x013e0fb3	snd_soc_dapm_nc_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x09b55d59	snd_soc_unregister_platform
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0c38df26	snd_soc_get_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1026fdb6	snd_soc_get_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x131a6b64	snd_soc_new_ac97_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x23bd2783	snd_soc_dapm_put_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x24ca1795	snd_soc_dai_set_pll
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2586500b	snd_soc_unregister_dai
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x26c1c9d8	snd_soc_get_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2efdc15e	snd_soc_info_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x316bf47d	snd_soc_init_card
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3cb2601a	snd_soc_jack_free_gpios
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3e3791b2	snd_soc_info_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4623d57e	snd_soc_get_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4762bccc	snd_soc_resume_device
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4837cbd8	snd_soc_add_controls
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4842b4ba	snd_soc_put_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4a066743	snd_soc_dapm_new_widgets
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4a20dc55	snd_soc_dai_set_clkdiv
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4a776c78	snd_soc_jack_add_pins
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4aa3ce2e	snd_soc_info_enum_ext
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4d3e5ae1	snd_soc_dapm_get_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x53b0104a	snd_soc_info_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x56ffa5cc	snd_soc_set_runtime_hwparams
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5c1928fa	snd_soc_get_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x60dfffcd	snd_soc_dapm_new_controls
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x63e15ac8	snd_soc_dapm_info_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x673f87d0	snd_soc_info_volsw_ext
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x70675e64	snd_soc_cnew
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x734d016f	snd_soc_dapm_get_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7438f85b	dapm_reg_event
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7487cc3f	snd_soc_dai_set_tdm_slot
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x786af8e1	snd_soc_put_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x78edbbd5	snd_soc_update_bits
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x791395d1	snd_soc_unregister_dais
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7a45508e	snd_soc_dapm_disable_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7ca8f67b	snd_soc_dapm_enable_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8387910d	snd_soc_jack_add_gpios
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8a9674bf	snd_soc_dapm_put_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8d01a0ff	snd_soc_register_dai
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8e39b36f	snd_soc_dai_set_fmt
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8e6eab4c	snd_soc_dapm_put_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8f0b6d54	snd_soc_dapm_stream_event
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x90f27dd8	snd_soc_dapm_get_pin_status
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9793b83a	snd_soc_dapm_get_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa5c25d2a	snd_soc_put_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa8b344de	snd_soc_register_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa94b1527	snd_soc_put_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xab5ea3ea	snd_soc_register_platform
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb0e53186	snd_soc_test_bits
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb1fd3f5a	snd_soc_suspend_device
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb36391c5	snd_soc_jack_report
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb8bc93a8	snd_soc_unregister_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xcc3adec6	snd_soc_dapm_new_control
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd7d9b666	snd_soc_dai_set_tristate
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xda67e30c	snd_soc_jack_new
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xdbf86b62	snd_soc_register_dais
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xe3501f7f	snd_soc_put_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xe60dbf6f	snd_soc_dapm_add_routes
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xe622ae1b	snd_soc_dapm_get_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xec7db433	snd_soc_free_ac97_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xedeedcac	snd_soc_dapm_free
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xefe2cb5c	snd_soc_codec_volatile_register
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf0595292	snd_soc_dapm_sync
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf376c4db	snd_soc_free_pcms
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf53907a6	snd_soc_dapm_put_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf6c36882	snd_soc_dai_digital_mute
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf6e48938	snd_soc_new_pcms
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf7a7381d	snd_soc_dai_set_sysclk
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xfa9888d6	snd_soc_info_volsw_s8
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x15e0620c	xv_destroy_pool
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x4803223f	xv_malloc
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x57e771ba	xv_get_total_size_bytes
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x88072f01	xv_create_pool
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0xaf69699e	xv_get_object_size
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0xe878f8f2	xv_free
+EXPORT_SYMBOL_GPL vmlinux 0x000902a2	ata_sas_port_stop
+EXPORT_SYMBOL_GPL vmlinux 0x003ed6a6	hpet_unregister_irq_handler
+EXPORT_SYMBOL_GPL vmlinux 0x00566d8f	inotify_get_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x0067df75	ata_tf_from_fis
+EXPORT_SYMBOL_GPL vmlinux 0x009a5a62	device_move
+EXPORT_SYMBOL_GPL vmlinux 0x00a5cbe1	iommu_iova_to_phys
+EXPORT_SYMBOL_GPL vmlinux 0x00abeb09	rtc_read_time
+EXPORT_SYMBOL_GPL vmlinux 0x00b8ecf8	__iowrite32_copy
+EXPORT_SYMBOL_GPL vmlinux 0x00bdc5c0	dm_rh_mark_nosync
+EXPORT_SYMBOL_GPL vmlinux 0x00ebcb5d	ata_id_string
+EXPORT_SYMBOL_GPL vmlinux 0x00f03c43	bdi_writeout_inc
+EXPORT_SYMBOL_GPL vmlinux 0x00f94fde	register_jprobes
+EXPORT_SYMBOL_GPL vmlinux 0x0110b3d1	register_hotplug_dock_device
+EXPORT_SYMBOL_GPL vmlinux 0x0113e98d	blk_queue_rq_timeout
+EXPORT_SYMBOL_GPL vmlinux 0x016b9869	xfrm_calg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0x01848a8e	local_apic_timer_c2_ok
+EXPORT_SYMBOL_GPL vmlinux 0x019d0e23	fl6_sock_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x01a4ea6d	unregister_die_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x01e1a8de	kgdb_breakpoint
+EXPORT_SYMBOL_GPL vmlinux 0x0243a3fd	__class_register
+EXPORT_SYMBOL_GPL vmlinux 0x02b8b299	dm_path_uevent
+EXPORT_SYMBOL_GPL vmlinux 0x02ccea56	lock_policy_rwsem_write
+EXPORT_SYMBOL_GPL vmlinux 0x02dcb7d3	cpufreq_register_governor
+EXPORT_SYMBOL_GPL vmlinux 0x02f15a4d	ata_port_start
+EXPORT_SYMBOL_GPL vmlinux 0x0343bdf1	__i2c_board_list
+EXPORT_SYMBOL_GPL vmlinux 0x03a3f86d	unregister_jprobe
+EXPORT_SYMBOL_GPL vmlinux 0x03b2ef7d	crypto_drop_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x03d9f7ff	register_ftrace_event
+EXPORT_SYMBOL_GPL vmlinux 0x03e3686c	ata_timing_cycle2mode
+EXPORT_SYMBOL_GPL vmlinux 0x04069b1d	set_irq_nested_thread
+EXPORT_SYMBOL_GPL vmlinux 0x04486e88	rcu_batches_completed
+EXPORT_SYMBOL_GPL vmlinux 0x04ac5693	sysfs_get_dirent
+EXPORT_SYMBOL_GPL vmlinux 0x04b2f770	scsi_nl_add_transport
+EXPORT_SYMBOL_GPL vmlinux 0x04bb8cfa	sysfs_add_file_to_group
+EXPORT_SYMBOL_GPL vmlinux 0x04c3f2c1	gnttab_empty_grant_references
+EXPORT_SYMBOL_GPL vmlinux 0x04ea8706	__iowrite64_copy
+EXPORT_SYMBOL_GPL vmlinux 0x050d4503	da903x_read
+EXPORT_SYMBOL_GPL vmlinux 0x0531dcb8	ata_dev_classify
+EXPORT_SYMBOL_GPL vmlinux 0x054e550b	kernel_halt
+EXPORT_SYMBOL_GPL vmlinux 0x055496e5	simple_attr_write
+EXPORT_SYMBOL_GPL vmlinux 0x055b3ccf	register_kretprobes
+EXPORT_SYMBOL_GPL vmlinux 0x05804015	bd_claim_by_disk
+EXPORT_SYMBOL_GPL vmlinux 0x0586a855	sysfs_remove_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0x05ae1cac	ata_dummy_port_info
+EXPORT_SYMBOL_GPL vmlinux 0x060d1064	set_memory_ro
+EXPORT_SYMBOL_GPL vmlinux 0x0619ca8a	getboottime
+EXPORT_SYMBOL_GPL vmlinux 0x06354dae	xfrm_audit_state_notfound_simple
+EXPORT_SYMBOL_GPL vmlinux 0x06411731	sched_setscheduler
+EXPORT_SYMBOL_GPL vmlinux 0x064db9a5	mark_mounts_for_expiry
+EXPORT_SYMBOL_GPL vmlinux 0x06822a9f	set_task_ioprio
+EXPORT_SYMBOL_GPL vmlinux 0x0695cdcc	ata_dummy_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x06a86c73	__blk_put_request
+EXPORT_SYMBOL_GPL vmlinux 0x06b84abb	dm_get_rq_mapinfo
+EXPORT_SYMBOL_GPL vmlinux 0x06fce6d7	ata_port_disable
+EXPORT_SYMBOL_GPL vmlinux 0x0732ebb7	dm_set_device_limits
+EXPORT_SYMBOL_GPL vmlinux 0x07435329	usb_put_hcd
+EXPORT_SYMBOL_GPL vmlinux 0x07454eb6	pci_find_ext_capability
+EXPORT_SYMBOL_GPL vmlinux 0x0748e067	ata_host_detach
+EXPORT_SYMBOL_GPL vmlinux 0x075ffe8c	power_supply_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x0783d0ac	ring_buffer_overrun_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x078bdaf2	drop_file_write_access
+EXPORT_SYMBOL_GPL vmlinux 0x07a78577	fuse_abort_conn
+EXPORT_SYMBOL_GPL vmlinux 0x07b52e38	rtnl_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x07ce7344	trace_seq_vprintf
+EXPORT_SYMBOL_GPL vmlinux 0x07d64618	usb_ifnum_to_if
+EXPORT_SYMBOL_GPL vmlinux 0x07f91aa7	inotify_add_watch
+EXPORT_SYMBOL_GPL vmlinux 0x07ff4aea	xenbus_scanf
+EXPORT_SYMBOL_GPL vmlinux 0x080a6b9f	get_current_tty
+EXPORT_SYMBOL_GPL vmlinux 0x080f43cf	usb_autopm_put_interface_async
+EXPORT_SYMBOL_GPL vmlinux 0x08519258	rtc_irq_register
+EXPORT_SYMBOL_GPL vmlinux 0x085db0e4	device_initialize
+EXPORT_SYMBOL_GPL vmlinux 0x086aa988	sysfs_create_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0x0899da9f	bus_get_kset
+EXPORT_SYMBOL_GPL vmlinux 0x08a3e5d1	net_ipv6_ctl_path
+EXPORT_SYMBOL_GPL vmlinux 0x08d8708f	cancel_work_sync
+EXPORT_SYMBOL_GPL vmlinux 0x08e82552	fuse_sync_release
+EXPORT_SYMBOL_GPL vmlinux 0x09020208	crypto_grab_skcipher
+EXPORT_SYMBOL_GPL vmlinux 0x091eb9b4	round_jiffies
+EXPORT_SYMBOL_GPL vmlinux 0x092d25ec	shash_ahash_finup
+EXPORT_SYMBOL_GPL vmlinux 0x094cf2d6	pci_hp_deregister
+EXPORT_SYMBOL_GPL vmlinux 0x0969f242	ata_sff_busy_sleep
+EXPORT_SYMBOL_GPL vmlinux 0x0974dd91	__cpufreq_driver_getavg
+EXPORT_SYMBOL_GPL vmlinux 0x09dc4765	pci_slots_kset
+EXPORT_SYMBOL_GPL vmlinux 0x0a1a2ef4	bus_register
+EXPORT_SYMBOL_GPL vmlinux 0x0a549819	pci_configure_slot
+EXPORT_SYMBOL_GPL vmlinux 0x0ac0ab25	vring_interrupt
+EXPORT_SYMBOL_GPL vmlinux 0x0ae53984	device_release_driver
+EXPORT_SYMBOL_GPL vmlinux 0x0b07abe2	unshare_fs_struct
+EXPORT_SYMBOL_GPL vmlinux 0x0b8f99d2	scsi_mode_select
+EXPORT_SYMBOL_GPL vmlinux 0x0c2aebc4	tty_put_char
+EXPORT_SYMBOL_GPL vmlinux 0x0c2cdbf1	synchronize_sched
+EXPORT_SYMBOL_GPL vmlinux 0x0c48d5f3	inet_hashinfo_init
+EXPORT_SYMBOL_GPL vmlinux 0x0c805f93	clflush_cache_range
+EXPORT_SYMBOL_GPL vmlinux 0x0c8480e4	blk_end_request_err
+EXPORT_SYMBOL_GPL vmlinux 0x0cb88680	__tracepoint_block_rq_remap
+EXPORT_SYMBOL_GPL vmlinux 0x0ccf3180	generic_fh_to_dentry
+EXPORT_SYMBOL_GPL vmlinux 0x0d1bf8fd	usb_get_status
+EXPORT_SYMBOL_GPL vmlinux 0x0d1bfb00	pci_scan_child_bus
+EXPORT_SYMBOL_GPL vmlinux 0x0d9ebb9f	tty_ldisc_deref
+EXPORT_SYMBOL_GPL vmlinux 0x0da26049	debugfs_create_u32
+EXPORT_SYMBOL_GPL vmlinux 0x0dd101b1	blk_update_request
+EXPORT_SYMBOL_GPL vmlinux 0x0e77d09e	bus_get_device_klist
+EXPORT_SYMBOL_GPL vmlinux 0x0eb3636d	usb_driver_claim_interface
+EXPORT_SYMBOL_GPL vmlinux 0x0ec210b8	xen_start_info
+EXPORT_SYMBOL_GPL vmlinux 0x0ed70eea	ata_sff_data_xfer32
+EXPORT_SYMBOL_GPL vmlinux 0x0ef06974	spi_populate_ppr_msg
+EXPORT_SYMBOL_GPL vmlinux 0x0f467b8e	crypto_alloc_ahash
+EXPORT_SYMBOL_GPL vmlinux 0x0f73520f	klist_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0x0f834dc3	usb_control_msg
+EXPORT_SYMBOL_GPL vmlinux 0x0f86288e	device_bind_driver
+EXPORT_SYMBOL_GPL vmlinux 0x0fbd44ae	inotify_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x0fbe6f33	ata_host_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x0fe04ada	usb_interrupt_msg
+EXPORT_SYMBOL_GPL vmlinux 0x0fe2d570	xenbus_directory
+EXPORT_SYMBOL_GPL vmlinux 0x0fea00d5	fsstack_copy_attr_all
+EXPORT_SYMBOL_GPL vmlinux 0x100c13c6	usb_kill_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0x100c48a2	unregister_dock_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x10138352	tracing_on
+EXPORT_SYMBOL_GPL vmlinux 0x101c923e	__tracepoint_power_start
+EXPORT_SYMBOL_GPL vmlinux 0x103d0a0d	ata_base_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x10621889	hpet_rtc_interrupt
+EXPORT_SYMBOL_GPL vmlinux 0x107e5392	pid_vnr
+EXPORT_SYMBOL_GPL vmlinux 0x11030694	ring_buffer_commit_overrun_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x113215bb	ata_sff_prereset
+EXPORT_SYMBOL_GPL vmlinux 0x11344e97	crypto_blkcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0x1176d0d0	driver_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x119af014	cpu_bit_bitmap
+EXPORT_SYMBOL_GPL vmlinux 0x11e16d45	ata_sff_postreset
+EXPORT_SYMBOL_GPL vmlinux 0x11f447ce	__gpio_to_irq
+EXPORT_SYMBOL_GPL vmlinux 0x11f9c899	sdio_readw
+EXPORT_SYMBOL_GPL vmlinux 0x122545fd	ata_host_init
+EXPORT_SYMBOL_GPL vmlinux 0x122d9ff5	bd_release_from_disk
+EXPORT_SYMBOL_GPL vmlinux 0x124bb3b4	dev_set_name
+EXPORT_SYMBOL_GPL vmlinux 0x124f2056	crypto_get_attr_type
+EXPORT_SYMBOL_GPL vmlinux 0x1251d30f	call_rcu
+EXPORT_SYMBOL_GPL vmlinux 0x126655a1	inet_diag_register
+EXPORT_SYMBOL_GPL vmlinux 0x1268f357	resume_device_irqs
+EXPORT_SYMBOL_GPL vmlinux 0x12b419d9	__rtnl_link_register
+EXPORT_SYMBOL_GPL vmlinux 0x12c9d44f	device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x12ed5cc4	device_attach
+EXPORT_SYMBOL_GPL vmlinux 0x12f73f2c	skb_tstamp_tx
+EXPORT_SYMBOL_GPL vmlinux 0x13227cf4	usb_get_urb
+EXPORT_SYMBOL_GPL vmlinux 0x135833fa	pci_msi_off
+EXPORT_SYMBOL_GPL vmlinux 0x1362c9a3	cpuidle_enable_device
+EXPORT_SYMBOL_GPL vmlinux 0x1381a048	iommu_map_range
+EXPORT_SYMBOL_GPL vmlinux 0x139c27c6	ata_bmdma_stop
+EXPORT_SYMBOL_GPL vmlinux 0x13b2a946	register_keyboard_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x13b33183	sdio_release_irq
+EXPORT_SYMBOL_GPL vmlinux 0x13ce6c07	sysfs_put
+EXPORT_SYMBOL_GPL vmlinux 0x13df2dbc	ring_buffer_read_start
+EXPORT_SYMBOL_GPL vmlinux 0x13e5b376	register_pernet_gen_device
+EXPORT_SYMBOL_GPL vmlinux 0x147e698a	raw_seq_start
+EXPORT_SYMBOL_GPL vmlinux 0x149db923	selinux_string_to_sid
+EXPORT_SYMBOL_GPL vmlinux 0x14b0d37d	inet_csk_compat_setsockopt
+EXPORT_SYMBOL_GPL vmlinux 0x14b2392b	devres_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x154f051a	regulator_get_mode
+EXPORT_SYMBOL_GPL vmlinux 0x15769c29	page_cache_async_readahead
+EXPORT_SYMBOL_GPL vmlinux 0x15892417	async_synchronize_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x1598dc9d	unregister_netevent_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x15b0606e	e820_any_mapped
+EXPORT_SYMBOL_GPL vmlinux 0x1640954a	class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x16627ee4	ata_sas_port_start
+EXPORT_SYMBOL_GPL vmlinux 0x167301bb	dev_attr_link_power_management_policy
+EXPORT_SYMBOL_GPL vmlinux 0x16788d5b	bus_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x16881e82	usb_hcd_unlink_urb_from_ep
+EXPORT_SYMBOL_GPL vmlinux 0x1697136d	hrtimer_init
+EXPORT_SYMBOL_GPL vmlinux 0x16c2a2b4	pci_enable_pcie_error_reporting
+EXPORT_SYMBOL_GPL vmlinux 0x16e7784c	pci_find_next_capability
+EXPORT_SYMBOL_GPL vmlinux 0x17cdf383	kset_create_and_add
+EXPORT_SYMBOL_GPL vmlinux 0x17efb4cd	fuse_do_open
+EXPORT_SYMBOL_GPL vmlinux 0x1848796a	inet_csk_listen_start
+EXPORT_SYMBOL_GPL vmlinux 0x186f0d2c	crypto_init_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x1878f62b	edac_err_assert
+EXPORT_SYMBOL_GPL vmlinux 0x1882f804	__pm_runtime_disable
+EXPORT_SYMBOL_GPL vmlinux 0x18d53420	kgdb_register_io_module
+EXPORT_SYMBOL_GPL vmlinux 0x18f83fab	gnttab_grant_foreign_access_ref
+EXPORT_SYMBOL_GPL vmlinux 0x1990c1e4	fsnotify
+EXPORT_SYMBOL_GPL vmlinux 0x199aba35	__create_workqueue_key
+EXPORT_SYMBOL_GPL vmlinux 0x19a304ba	usb_disabled
+EXPORT_SYMBOL_GPL vmlinux 0x19b70ac1	perf_tp_event
+EXPORT_SYMBOL_GPL vmlinux 0x1a2901a8	ata_host_activate
+EXPORT_SYMBOL_GPL vmlinux 0x1a323362	__ftrace_vbprintk
+EXPORT_SYMBOL_GPL vmlinux 0x1a474901	tracepoint_probe_unregister_noupdate
+EXPORT_SYMBOL_GPL vmlinux 0x1a535fd1	pci_rescan_bus
+EXPORT_SYMBOL_GPL vmlinux 0x1a5424fa	crypto_lookup_template
+EXPORT_SYMBOL_GPL vmlinux 0x1a938737	atomic_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x1a9b538e	ehci_cf_port_reset_rwsem
+EXPORT_SYMBOL_GPL vmlinux 0x1acda5b2	atomic_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x1ad94a98	device_find_child
+EXPORT_SYMBOL_GPL vmlinux 0x1b582928	ata_pci_device_do_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x1b9aca3f	jprobe_return
+EXPORT_SYMBOL_GPL vmlinux 0x1bcee3d7	tty_prepare_flip_string_flags
+EXPORT_SYMBOL_GPL vmlinux 0x1c309769	class_compat_create_link
+EXPORT_SYMBOL_GPL vmlinux 0x1c3af716	execute_in_process_context
+EXPORT_SYMBOL_GPL vmlinux 0x1c7b6c2a	eventfd_ctx_fdget
+EXPORT_SYMBOL_GPL vmlinux 0x1c852e7c	xfrm_calg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x1c87a811	__round_jiffies_up
+EXPORT_SYMBOL_GPL vmlinux 0x1c8919f2	tracepoint_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0x1c8b0961	crypto_alloc_instance2
+EXPORT_SYMBOL_GPL vmlinux 0x1c9b8685	usb_poison_urb
+EXPORT_SYMBOL_GPL vmlinux 0x1cd666e0	sysfs_get
+EXPORT_SYMBOL_GPL vmlinux 0x1d0d0e2c	scsi_dh_set_params
+EXPORT_SYMBOL_GPL vmlinux 0x1d8f8059	__tracepoint_power_end
+EXPORT_SYMBOL_GPL vmlinux 0x1db21d74	__tracepoint_kfree_skb
+EXPORT_SYMBOL_GPL vmlinux 0x1ddc05ff	usb_sg_init
+EXPORT_SYMBOL_GPL vmlinux 0x1dee2629	trace_current_buffer_lock_reserve
+EXPORT_SYMBOL_GPL vmlinux 0x1defc477	pm_runtime_enable
+EXPORT_SYMBOL_GPL vmlinux 0x1e14e7e7	scsi_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x1e7bbcb3	kernel_restart
+EXPORT_SYMBOL_GPL vmlinux 0x1eb9516e	round_jiffies_relative
+EXPORT_SYMBOL_GPL vmlinux 0x1ebf6c2a	pci_power_names
+EXPORT_SYMBOL_GPL vmlinux 0x1ef06a7e	console_drivers
+EXPORT_SYMBOL_GPL vmlinux 0x1ef5e83e	led_trigger_show
+EXPORT_SYMBOL_GPL vmlinux 0x1ef726b1	regulator_count_voltages
+EXPORT_SYMBOL_GPL vmlinux 0x1f3d1b77	crypto_alg_sem
+EXPORT_SYMBOL_GPL vmlinux 0x1f4957fc	platform_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x1f6c4916	regulator_enable
+EXPORT_SYMBOL_GPL vmlinux 0x1f77ffbf	per_cpu__gdt_page
+EXPORT_SYMBOL_GPL vmlinux 0x1f8031c8	ring_buffer_iter_empty
+EXPORT_SYMBOL_GPL vmlinux 0x1f8ec1b3	acpi_get_pci_rootbridge_handle
+EXPORT_SYMBOL_GPL vmlinux 0x1fae7955	bus_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x1fcece42	inet_twdr_twcal_tick
+EXPORT_SYMBOL_GPL vmlinux 0x1ff7e1aa	inet6_csk_xmit
+EXPORT_SYMBOL_GPL vmlinux 0x1ffa1a39	usb_deregister_dev
+EXPORT_SYMBOL_GPL vmlinux 0x205dcd7a	klist_add_tail
+EXPORT_SYMBOL_GPL vmlinux 0x20621851	inotify_init_watch
+EXPORT_SYMBOL_GPL vmlinux 0x2074687d	acpi_smbus_read
+EXPORT_SYMBOL_GPL vmlinux 0x20a49ab2	sk_clone
+EXPORT_SYMBOL_GPL vmlinux 0x20bbe6e7	ata_sff_drain_fifo
+EXPORT_SYMBOL_GPL vmlinux 0x20bc3470	orderly_poweroff
+EXPORT_SYMBOL_GPL vmlinux 0x20d22764	iommu_found
+EXPORT_SYMBOL_GPL vmlinux 0x20f85373	usb_deregister_device_driver
+EXPORT_SYMBOL_GPL vmlinux 0x212ce570	inet6_csk_reqsk_queue_hash_add
+EXPORT_SYMBOL_GPL vmlinux 0x213d1d84	scsi_schedule_eh
+EXPORT_SYMBOL_GPL vmlinux 0x2154e796	ata_acpi_cbl_80wire
+EXPORT_SYMBOL_GPL vmlinux 0x215db6e9	tracepoint_probe_register_noupdate
+EXPORT_SYMBOL_GPL vmlinux 0x21602a38	agp_remove_bridge
+EXPORT_SYMBOL_GPL vmlinux 0x2193ac3a	tcp_cong_avoid_ai
+EXPORT_SYMBOL_GPL vmlinux 0x21da516f	class_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x21ddd8d9	crypto_ablkcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0x21fec306	pm_runtime_resume
+EXPORT_SYMBOL_GPL vmlinux 0x22969fac	usb_sg_wait
+EXPORT_SYMBOL_GPL vmlinux 0x2296c00d	crypto_attr_u32
+EXPORT_SYMBOL_GPL vmlinux 0x22acefcd	shmem_file_setup
+EXPORT_SYMBOL_GPL vmlinux 0x22b89781	vfs_kern_mount
+EXPORT_SYMBOL_GPL vmlinux 0x231abe45	platform_get_irq
+EXPORT_SYMBOL_GPL vmlinux 0x234e4c9d	transport_configure_device
+EXPORT_SYMBOL_GPL vmlinux 0x23864ce7	cpuset_mem_spread_node
+EXPORT_SYMBOL_GPL vmlinux 0x23af9be7	ata_sff_error_handler
+EXPORT_SYMBOL_GPL vmlinux 0x23bf3750	usb_hcd_pci_shutdown
+EXPORT_SYMBOL_GPL vmlinux 0x23d97b01	usb_ep0_reinit
+EXPORT_SYMBOL_GPL vmlinux 0x2447533c	ktime_get_real
+EXPORT_SYMBOL_GPL vmlinux 0x246f4153	pv_time_ops
+EXPORT_SYMBOL_GPL vmlinux 0x24c7698a	xenbus_write
+EXPORT_SYMBOL_GPL vmlinux 0x24eb7e32	leds_list
+EXPORT_SYMBOL_GPL vmlinux 0x24fa04f7	vfs_cancel_lock
+EXPORT_SYMBOL_GPL vmlinux 0x2545c170	unregister_xenbus_watch
+EXPORT_SYMBOL_GPL vmlinux 0x26132617	debugfs_create_u64
+EXPORT_SYMBOL_GPL vmlinux 0x261aad74	rtc_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x267f4ded	rtc_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x269eef25	sdio_memcpy_toio
+EXPORT_SYMBOL_GPL vmlinux 0x26b0d2bd	__pm_runtime_get
+EXPORT_SYMBOL_GPL vmlinux 0x26c90ea4	scsi_eh_get_sense
+EXPORT_SYMBOL_GPL vmlinux 0x273c4ebc	fuse_conn_kill
+EXPORT_SYMBOL_GPL vmlinux 0x278473ef	inet_ctl_sock_create
+EXPORT_SYMBOL_GPL vmlinux 0x278b6dd3	ata_sff_tf_read
+EXPORT_SYMBOL_GPL vmlinux 0x27a8d660	kernel_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x27adf232	tracing_generic_entry_update
+EXPORT_SYMBOL_GPL vmlinux 0x27bd87ad	sysdev_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x2803515b	ata_pio_need_iordy
+EXPORT_SYMBOL_GPL vmlinux 0x28070d13	usb_set_interface
+EXPORT_SYMBOL_GPL vmlinux 0x282d519f	unregister_kretprobe
+EXPORT_SYMBOL_GPL vmlinux 0x2850f2e6	get_device
+EXPORT_SYMBOL_GPL vmlinux 0x285df492	regulator_set_voltage
+EXPORT_SYMBOL_GPL vmlinux 0x28d664ff	__raw_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x28e23139	xfrm_probe_algs
+EXPORT_SYMBOL_GPL vmlinux 0x29501527	klist_iter_init_node
+EXPORT_SYMBOL_GPL vmlinux 0x29636644	pci_disable_rom
+EXPORT_SYMBOL_GPL vmlinux 0x296b83c1	tty_ldisc_ref
+EXPORT_SYMBOL_GPL vmlinux 0x29b50d25	crypto_init_spawn2
+EXPORT_SYMBOL_GPL vmlinux 0x29c54ee0	xfrm_audit_state_add
+EXPORT_SYMBOL_GPL vmlinux 0x2a0a4724	bind_evtchn_to_irqhandler
+EXPORT_SYMBOL_GPL vmlinux 0x2a25344c	pci_unblock_user_cfg_access
+EXPORT_SYMBOL_GPL vmlinux 0x2a678a13	__suspend_report_result
+EXPORT_SYMBOL_GPL vmlinux 0x2a77e33b	sdio_readb
+EXPORT_SYMBOL_GPL vmlinux 0x2af24443	scsi_flush_work
+EXPORT_SYMBOL_GPL vmlinux 0x2b034a23	crypto_alloc_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x2b2eb2f7	pci_add_dynid
+EXPORT_SYMBOL_GPL vmlinux 0x2b5771aa	ata_pci_device_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x2b5cbc4e	ata_sff_irq_on
+EXPORT_SYMBOL_GPL vmlinux 0x2b5d39c6	swiotlb_sync_single_range_for_device
+EXPORT_SYMBOL_GPL vmlinux 0x2b636cfb	pskb_put
+EXPORT_SYMBOL_GPL vmlinux 0x2b932905	sata_pmp_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x2b9f8e23	nf_net_ipv4_netfilter_sysctl_path
+EXPORT_SYMBOL_GPL vmlinux 0x2ba1a3dc	sata_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x2bcaa8e3	flush_work
+EXPORT_SYMBOL_GPL vmlinux 0x2bfc4d7f	tracepoint_get_iter_range
+EXPORT_SYMBOL_GPL vmlinux 0x2c208607	power_supply_is_system_supplied
+EXPORT_SYMBOL_GPL vmlinux 0x2c2cb9c6	devm_kfree
+EXPORT_SYMBOL_GPL vmlinux 0x2c50a827	inet_twsk_purge
+EXPORT_SYMBOL_GPL vmlinux 0x2ce98559	kcrypto_wq
+EXPORT_SYMBOL_GPL vmlinux 0x2d3b48f7	skb_to_sgvec
+EXPORT_SYMBOL_GPL vmlinux 0x2d3cee35	bsg_register_queue
+EXPORT_SYMBOL_GPL vmlinux 0x2d5dbeec	crypto_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x2d98d076	get_cpu_sysdev
+EXPORT_SYMBOL_GPL vmlinux 0x2d9f2ce3	sched_clock_idle_wakeup_event
+EXPORT_SYMBOL_GPL vmlinux 0x2dcde57a	scsi_dh_detach
+EXPORT_SYMBOL_GPL vmlinux 0x2dd8444c	trace_seq_printf
+EXPORT_SYMBOL_GPL vmlinux 0x2e30dd44	alloc_page_buffers
+EXPORT_SYMBOL_GPL vmlinux 0x2e47f677	xfrm_aalg_get_byidx
+EXPORT_SYMBOL_GPL vmlinux 0x2e62b085	do_sync_mapping_range
+EXPORT_SYMBOL_GPL vmlinux 0x2e7d3283	ata_qc_complete_multiple
+EXPORT_SYMBOL_GPL vmlinux 0x2e932207	ring_buffer_consume
+EXPORT_SYMBOL_GPL vmlinux 0x2ec92012	scatterwalk_copychunks
+EXPORT_SYMBOL_GPL vmlinux 0x2ee78cd3	mce_chrdev_ops
+EXPORT_SYMBOL_GPL vmlinux 0x2ee8f885	tcp_set_state
+EXPORT_SYMBOL_GPL vmlinux 0x2eed2630	iommu_domain_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x2f0f795b	bus_rescan_devices
+EXPORT_SYMBOL_GPL vmlinux 0x2f47d8c7	cpufreq_frequency_get_table
+EXPORT_SYMBOL_GPL vmlinux 0x2f8370d0	crypto_alloc_aead
+EXPORT_SYMBOL_GPL vmlinux 0x2f857551	machine_check_poll
+EXPORT_SYMBOL_GPL vmlinux 0x2fcd9e17	dpm_resume_noirq
+EXPORT_SYMBOL_GPL vmlinux 0x2fd41090	xenbus_alloc_evtchn
+EXPORT_SYMBOL_GPL vmlinux 0x2fefefeb	pci_create_slot
+EXPORT_SYMBOL_GPL vmlinux 0x3005efa8	md_allow_write
+EXPORT_SYMBOL_GPL vmlinux 0x30086ac4	usb_root_hub_lost_power
+EXPORT_SYMBOL_GPL vmlinux 0x301a7556	blk_abort_queue
+EXPORT_SYMBOL_GPL vmlinux 0x301c3622	ip_route_output_flow
+EXPORT_SYMBOL_GPL vmlinux 0x30ed7a9d	__rt_mutex_init
+EXPORT_SYMBOL_GPL vmlinux 0x3142d42f	dm_send_uevents
+EXPORT_SYMBOL_GPL vmlinux 0x31514d35	sata_scr_write
+EXPORT_SYMBOL_GPL vmlinux 0x318920b1	register_dock_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x31c7bf44	do_kern_mount
+EXPORT_SYMBOL_GPL vmlinux 0x3227bdcf	blkdev_aio_write
+EXPORT_SYMBOL_GPL vmlinux 0x325e677c	gnttab_grant_foreign_transfer_ref
+EXPORT_SYMBOL_GPL vmlinux 0x3274abbb	crypto_register_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0x328f92ac	crypto_find_alg
+EXPORT_SYMBOL_GPL vmlinux 0x32d5e7fc	xfrm_aalg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x32f17454	ring_buffer_event_data
+EXPORT_SYMBOL_GPL vmlinux 0x33262a75	sysfs_create_group
+EXPORT_SYMBOL_GPL vmlinux 0x334aca5b	ring_buffer_alloc_read_page
+EXPORT_SYMBOL_GPL vmlinux 0x33ab8564	relay_reset
+EXPORT_SYMBOL_GPL vmlinux 0x33d4bfa1	bus_sort_breadthfirst
+EXPORT_SYMBOL_GPL vmlinux 0x340ca82e	rtc_set_time
+EXPORT_SYMBOL_GPL vmlinux 0x34204a36	relay_file_operations
+EXPORT_SYMBOL_GPL vmlinux 0x34275124	trace_current_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0x3441c3d6	gpio_set_value_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x346835bc	devres_close_group
+EXPORT_SYMBOL_GPL vmlinux 0x347a9949	usb_anchor_urb
+EXPORT_SYMBOL_GPL vmlinux 0x348d9f4e	inet_csk_addr2sockaddr
+EXPORT_SYMBOL_GPL vmlinux 0x34c24076	bus_find_device
+EXPORT_SYMBOL_GPL vmlinux 0x34dc79ff	led_trigger_remove
+EXPORT_SYMBOL_GPL vmlinux 0x34e03b53	pci_stop_bus_device
+EXPORT_SYMBOL_GPL vmlinux 0x34efcb18	usb_add_hcd
+EXPORT_SYMBOL_GPL vmlinux 0x34f8d695	vfs_lock_file
+EXPORT_SYMBOL_GPL vmlinux 0x35213407	transport_class_register
+EXPORT_SYMBOL_GPL vmlinux 0x353361b4	ata_bmdma32_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x35824896	usb_alloc_urb
+EXPORT_SYMBOL_GPL vmlinux 0x35c4bcda	input_ff_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x35d8c94a	sdev_evt_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x35fd0312	per_cpu__injectm
+EXPORT_SYMBOL_GPL vmlinux 0x361e2bcc	save_stack_trace
+EXPORT_SYMBOL_GPL vmlinux 0x362068fb	vfs_removexattr
+EXPORT_SYMBOL_GPL vmlinux 0x362e23ec	call_rcu_bh
+EXPORT_SYMBOL_GPL vmlinux 0x3666b0f7	usb_queue_reset_device
+EXPORT_SYMBOL_GPL vmlinux 0x36794556	fb_deferred_io_init
+EXPORT_SYMBOL_GPL vmlinux 0x36b7ad49	user_match
+EXPORT_SYMBOL_GPL vmlinux 0x371bf9f4	crypto_ahash_final
+EXPORT_SYMBOL_GPL vmlinux 0x372565e1	regulator_force_disable
+EXPORT_SYMBOL_GPL vmlinux 0x37482deb	inet_diag_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x3750b2e0	da903x_write
+EXPORT_SYMBOL_GPL vmlinux 0x3799fc3d	sysfs_chmod_file
+EXPORT_SYMBOL_GPL vmlinux 0x37ad4176	__tracepoint_block_bio_complete
+EXPORT_SYMBOL_GPL vmlinux 0x3807c66e	xfrm_output_resume
+EXPORT_SYMBOL_GPL vmlinux 0x38225c25	crypto_tfm_in_queue
+EXPORT_SYMBOL_GPL vmlinux 0x384958ff	sysfs_update_group
+EXPORT_SYMBOL_GPL vmlinux 0x3879f331	dm_rh_dec
+EXPORT_SYMBOL_GPL vmlinux 0x387c34ac	power_supply_set_battery_charged
+EXPORT_SYMBOL_GPL vmlinux 0x387cfdb9	skb_morph
+EXPORT_SYMBOL_GPL vmlinux 0x38d36765	free_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0x38ea936e	__memory_failure
+EXPORT_SYMBOL_GPL vmlinux 0x38f3300b	usb_find_interface
+EXPORT_SYMBOL_GPL vmlinux 0x38f4c7b0	sdio_disable_func
+EXPORT_SYMBOL_GPL vmlinux 0x392a643e	sysdev_class_register
+EXPORT_SYMBOL_GPL vmlinux 0x3984642e	register_kretprobe
+EXPORT_SYMBOL_GPL vmlinux 0x39b64e26	sysdev_register
+EXPORT_SYMBOL_GPL vmlinux 0x39bd4382	ata_ehi_clear_desc
+EXPORT_SYMBOL_GPL vmlinux 0x39d70bc0	relay_flush
+EXPORT_SYMBOL_GPL vmlinux 0x3a18a981	ata_dev_next
+EXPORT_SYMBOL_GPL vmlinux 0x3a6de86a	power_supply_get_by_name
+EXPORT_SYMBOL_GPL vmlinux 0x3ad53a01	ata_sff_host_intr
+EXPORT_SYMBOL_GPL vmlinux 0x3ae91615	md_new_event
+EXPORT_SYMBOL_GPL vmlinux 0x3b09fdc3	led_trigger_store
+EXPORT_SYMBOL_GPL vmlinux 0x3bdc3755	crypto_register_shash
+EXPORT_SYMBOL_GPL vmlinux 0x3be79c19	__trace_note_message
+EXPORT_SYMBOL_GPL vmlinux 0x3be7af02	get_max_files
+EXPORT_SYMBOL_GPL vmlinux 0x3be89d3c	usb_register_notify
+EXPORT_SYMBOL_GPL vmlinux 0x3c6a0a82	find_get_pid
+EXPORT_SYMBOL_GPL vmlinux 0x3c6c45ca	__tracepoint_power_frequency
+EXPORT_SYMBOL_GPL vmlinux 0x3c6ec20a	blk_queue_lld_busy
+EXPORT_SYMBOL_GPL vmlinux 0x3c7d4499	inet_hash_connect
+EXPORT_SYMBOL_GPL vmlinux 0x3c7d8eda	devres_add
+EXPORT_SYMBOL_GPL vmlinux 0x3c942368	profile_event_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x3cb2d902	elv_register
+EXPORT_SYMBOL_GPL vmlinux 0x3cb3950a	class_interface_register
+EXPORT_SYMBOL_GPL vmlinux 0x3cc42d71	xenbus_map_ring_valloc
+EXPORT_SYMBOL_GPL vmlinux 0x3ccb6c30	firmware_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x3cd06035	add_input_randomness
+EXPORT_SYMBOL_GPL vmlinux 0x3cd5dc42	fuse_file_poll
+EXPORT_SYMBOL_GPL vmlinux 0x3cd6edf1	generic_drop_inode
+EXPORT_SYMBOL_GPL vmlinux 0x3cdaca33	rtc_update_irq
+EXPORT_SYMBOL_GPL vmlinux 0x3cfdfae5	trace_current_buffer_discard_commit
+EXPORT_SYMBOL_GPL vmlinux 0x3cfedb3f	register_pm_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x3d0bad52	ipv6_find_tlv
+EXPORT_SYMBOL_GPL vmlinux 0x3d13a11c	cpufreq_frequency_table_verify
+EXPORT_SYMBOL_GPL vmlinux 0x3d1c5f99	xenbus_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0x3d388324	dpm_resume_end
+EXPORT_SYMBOL_GPL vmlinux 0x3d5acc58	sysdev_driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x3d5f392d	acpi_os_unmap_memory
+EXPORT_SYMBOL_GPL vmlinux 0x3d61c0e2	unregister_pernet_subsys
+EXPORT_SYMBOL_GPL vmlinux 0x3d6d0225	transport_add_device
+EXPORT_SYMBOL_GPL vmlinux 0x3d7ea99a	gnttab_grant_foreign_transfer
+EXPORT_SYMBOL_GPL vmlinux 0x3d95e2bc	sdio_memcpy_fromio
+EXPORT_SYMBOL_GPL vmlinux 0x3dd5d829	add_timer_on
+EXPORT_SYMBOL_GPL vmlinux 0x3dde0e07	amd_get_nb_id
+EXPORT_SYMBOL_GPL vmlinux 0x3de73cc3	ata_cable_sata
+EXPORT_SYMBOL_GPL vmlinux 0x3eb0bde8	put_pid
+EXPORT_SYMBOL_GPL vmlinux 0x3eb7adb6	ata_pci_device_resume
+EXPORT_SYMBOL_GPL vmlinux 0x3ecf6cfc	wmi_install_notify_handler
+EXPORT_SYMBOL_GPL vmlinux 0x3eef875c	tty_prepare_flip_string
+EXPORT_SYMBOL_GPL vmlinux 0x3efb35c9	get_online_cpus
+EXPORT_SYMBOL_GPL vmlinux 0x3f0348ec	crypto_dequeue_request
+EXPORT_SYMBOL_GPL vmlinux 0x3f093a1f	spi_sync
+EXPORT_SYMBOL_GPL vmlinux 0x3f21b77f	ata_sff_wait_after_reset
+EXPORT_SYMBOL_GPL vmlinux 0x3f238101	dcookie_register
+EXPORT_SYMBOL_GPL vmlinux 0x3f84d4c9	gnttab_release_grant_reference
+EXPORT_SYMBOL_GPL vmlinux 0x3fb2a814	inet6_csk_bind_conflict
+EXPORT_SYMBOL_GPL vmlinux 0x3fc7f7e0	ata_bmdma_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x407f6f82	usb_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0x4085208e	ata_sff_dma_pause
+EXPORT_SYMBOL_GPL vmlinux 0x40af0dec	ata_xfer_mode2mask
+EXPORT_SYMBOL_GPL vmlinux 0x40be2c41	blocking_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x40eb7312	spi_alloc_device
+EXPORT_SYMBOL_GPL vmlinux 0x41397b76	disk_get_part
+EXPORT_SYMBOL_GPL vmlinux 0x416d7824	dev_attr_unload_heads
+EXPORT_SYMBOL_GPL vmlinux 0x417928f1	usb_altnum_to_altsetting
+EXPORT_SYMBOL_GPL vmlinux 0x418515b2	xfrm_inner_extract_output
+EXPORT_SYMBOL_GPL vmlinux 0x4241f555	get_dcookie
+EXPORT_SYMBOL_GPL vmlinux 0x42494cea	ring_buffer_event_length
+EXPORT_SYMBOL_GPL vmlinux 0x424acc6d	scatterwalk_done
+EXPORT_SYMBOL_GPL vmlinux 0x426f13b9	e820_all_mapped
+EXPORT_SYMBOL_GPL vmlinux 0x429d3c62	tcp_init_congestion_ops
+EXPORT_SYMBOL_GPL vmlinux 0x42c85552	cpci_hp_unregister_controller
+EXPORT_SYMBOL_GPL vmlinux 0x432fd7f6	__gpio_set_value
+EXPORT_SYMBOL_GPL vmlinux 0x433df38e	debugfs_create_u16
+EXPORT_SYMBOL_GPL vmlinux 0x435c5da4	file_ra_state_init
+EXPORT_SYMBOL_GPL vmlinux 0x435f297c	inet_twsk_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x4364d0ae	pciserial_init_ports
+EXPORT_SYMBOL_GPL vmlinux 0x437b4ba0	sysdev_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x4387f891	sdio_writel
+EXPORT_SYMBOL_GPL vmlinux 0x43907971	vma_kernel_pagesize
+EXPORT_SYMBOL_GPL vmlinux 0x43f1483e	kick_process
+EXPORT_SYMBOL_GPL vmlinux 0x43f56e82	ata_xfer_mode2shift
+EXPORT_SYMBOL_GPL vmlinux 0x4446b96a	platform_device_add_data
+EXPORT_SYMBOL_GPL vmlinux 0x4484a5a4	wait_for_device_probe
+EXPORT_SYMBOL_GPL vmlinux 0x44a65d5c	lock_policy_rwsem_read
+EXPORT_SYMBOL_GPL vmlinux 0x44abb265	device_create
+EXPORT_SYMBOL_GPL vmlinux 0x44c970e9	pci_renumber_slot
+EXPORT_SYMBOL_GPL vmlinux 0x44d98c65	debugfs_create_size_t
+EXPORT_SYMBOL_GPL vmlinux 0x44fd4442	ata_common_sdev_attrs
+EXPORT_SYMBOL_GPL vmlinux 0x451f5b12	usb_hcd_pci_remove
+EXPORT_SYMBOL_GPL vmlinux 0x4541fe0d	mtrr_state
+EXPORT_SYMBOL_GPL vmlinux 0x454d5c01	blocking_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x456c94b3	synchronize_srcu
+EXPORT_SYMBOL_GPL vmlinux 0x457594fa	crypto_alg_list
+EXPORT_SYMBOL_GPL vmlinux 0x458cdc5d	cpufreq_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0x45a57820	crypto_larval_kill
+EXPORT_SYMBOL_GPL vmlinux 0x45b7ec22	acpi_pci_check_ejectable
+EXPORT_SYMBOL_GPL vmlinux 0x45bf1ff3	crypto_inc
+EXPORT_SYMBOL_GPL vmlinux 0x45d14bdf	hypercall_page
+EXPORT_SYMBOL_GPL vmlinux 0x45e4b06f	rtnl_register
+EXPORT_SYMBOL_GPL vmlinux 0x45ec4404	sata_link_debounce
+EXPORT_SYMBOL_GPL vmlinux 0x45ed73e9	ata_link_abort
+EXPORT_SYMBOL_GPL vmlinux 0x460e62a8	tcp_slow_start
+EXPORT_SYMBOL_GPL vmlinux 0x460f31aa	rodata_test_data
+EXPORT_SYMBOL_GPL vmlinux 0x464468d5	elv_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x464808f7	inotify_remove_watch_locked
+EXPORT_SYMBOL_GPL vmlinux 0x4660ecdb	tcp_register_congestion_control
+EXPORT_SYMBOL_GPL vmlinux 0x4672e88b	__crypto_dequeue_request
+EXPORT_SYMBOL_GPL vmlinux 0x469b2e96	shash_free_instance
+EXPORT_SYMBOL_GPL vmlinux 0x46a19c9a	dma_wait_for_async_tx
+EXPORT_SYMBOL_GPL vmlinux 0x46d74efa	ring_buffer_time_stamp
+EXPORT_SYMBOL_GPL vmlinux 0x47229b5c	gpio_request
+EXPORT_SYMBOL_GPL vmlinux 0x4756d4a4	ata_bus_reset
+EXPORT_SYMBOL_GPL vmlinux 0x475c3565	kobject_get_path
+EXPORT_SYMBOL_GPL vmlinux 0x4762e164	regulator_get_init_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0x479b400a	__fsnotify_inode_delete
+EXPORT_SYMBOL_GPL vmlinux 0x47a48684	ahash_attr_alg
+EXPORT_SYMBOL_GPL vmlinux 0x47b1ee72	usb_autopm_get_interface_async
+EXPORT_SYMBOL_GPL vmlinux 0x483a4da4	input_ff_event
+EXPORT_SYMBOL_GPL vmlinux 0x48521ffd	ata_acpi_gtm_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0x496f2168	kill_pid_info_as_uid
+EXPORT_SYMBOL_GPL vmlinux 0x499043d3	crypto_init_queue
+EXPORT_SYMBOL_GPL vmlinux 0x4995f903	spi_setup
+EXPORT_SYMBOL_GPL vmlinux 0x499917e9	br_handle_frame_hook
+EXPORT_SYMBOL_GPL vmlinux 0x49d77916	add_to_page_cache_lru
+EXPORT_SYMBOL_GPL vmlinux 0x4a2c1e48	mnt_clone_write
+EXPORT_SYMBOL_GPL vmlinux 0x4a4edbf7	ring_buffer_peek
+EXPORT_SYMBOL_GPL vmlinux 0x4a76a309	ata_cable_ignore
+EXPORT_SYMBOL_GPL vmlinux 0x4a9c068e	destroy_workqueue
+EXPORT_SYMBOL_GPL vmlinux 0x4aa965f7	crypto_register_ahash
+EXPORT_SYMBOL_GPL vmlinux 0x4ad6c07e	hvc_poll
+EXPORT_SYMBOL_GPL vmlinux 0x4ae0b66a	queue_delayed_work
+EXPORT_SYMBOL_GPL vmlinux 0x4af9d82c	class_dev_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0x4b432f30	pci_test_config_bits
+EXPORT_SYMBOL_GPL vmlinux 0x4b4bc965	acpi_get_pci_dev
+EXPORT_SYMBOL_GPL vmlinux 0x4b762828	start_thread
+EXPORT_SYMBOL_GPL vmlinux 0x4baf507a	inet_twsk_schedule
+EXPORT_SYMBOL_GPL vmlinux 0x4bfd9f73	scsi_get_vpd_page
+EXPORT_SYMBOL_GPL vmlinux 0x4c4bc8bd	scsi_nl_sock
+EXPORT_SYMBOL_GPL vmlinux 0x4c759827	byte_rev_table
+EXPORT_SYMBOL_GPL vmlinux 0x4cec82ee	crypto_chain
+EXPORT_SYMBOL_GPL vmlinux 0x4cff5e3f	sdio_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0x4d3970eb	power_supply_register
+EXPORT_SYMBOL_GPL vmlinux 0x4d4c38cc	__sock_recv_timestamp
+EXPORT_SYMBOL_GPL vmlinux 0x4d76c314	uhci_reset_hc
+EXPORT_SYMBOL_GPL vmlinux 0x4d7b031e	find_vpid
+EXPORT_SYMBOL_GPL vmlinux 0x4d8f4c15	klist_add_before
+EXPORT_SYMBOL_GPL vmlinux 0x4d935305	fuse_do_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x4e07b5e6	tcp_unregister_congestion_control
+EXPORT_SYMBOL_GPL vmlinux 0x4e422a76	__audit_inode_child
+EXPORT_SYMBOL_GPL vmlinux 0x4eb0c7b0	sysdev_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x4ed4d7c5	spi_new_device
+EXPORT_SYMBOL_GPL vmlinux 0x4f502ba6	device_del
+EXPORT_SYMBOL_GPL vmlinux 0x4f6944d9	ata_sff_qc_issue
+EXPORT_SYMBOL_GPL vmlinux 0x4f84579b	ring_buffer_record_disable
+EXPORT_SYMBOL_GPL vmlinux 0x4f8ac95c	mnt_drop_write
+EXPORT_SYMBOL_GPL vmlinux 0x4fb3d80d	usb_kill_urb
+EXPORT_SYMBOL_GPL vmlinux 0x4fc56cce	iommu_detach_device
+EXPORT_SYMBOL_GPL vmlinux 0x4fdc945d	sata_deb_timing_normal
+EXPORT_SYMBOL_GPL vmlinux 0x4ffc2279	ring_buffer_read_page
+EXPORT_SYMBOL_GPL vmlinux 0x500498d4	simple_attr_release
+EXPORT_SYMBOL_GPL vmlinux 0x5005832a	ip6_local_out
+EXPORT_SYMBOL_GPL vmlinux 0x5029c884	apply_to_page_range
+EXPORT_SYMBOL_GPL vmlinux 0x504153f2	dm_rh_inc_pending
+EXPORT_SYMBOL_GPL vmlinux 0x506012be	inet_hash
+EXPORT_SYMBOL_GPL vmlinux 0x507de8c6	add_memory
+EXPORT_SYMBOL_GPL vmlinux 0x5086ac3a	alg_test
+EXPORT_SYMBOL_GPL vmlinux 0x508c5831	usb_unanchor_urb
+EXPORT_SYMBOL_GPL vmlinux 0x509717f3	raw_hash_sk
+EXPORT_SYMBOL_GPL vmlinux 0x50d1f870	pgprot_writecombine
+EXPORT_SYMBOL_GPL vmlinux 0x50e7193a	__i2c_first_dynamic_bus_num
+EXPORT_SYMBOL_GPL vmlinux 0x50f5e532	call_rcu_sched
+EXPORT_SYMBOL_GPL vmlinux 0x50fad434	round_jiffies_up
+EXPORT_SYMBOL_GPL vmlinux 0x5122d798	srcu_read_unlock
+EXPORT_SYMBOL_GPL vmlinux 0x518c2fc6	hpet_rtc_dropped_irq
+EXPORT_SYMBOL_GPL vmlinux 0x519fcb8c	pm_runtime_idle
+EXPORT_SYMBOL_GPL vmlinux 0x51ae7ca4	input_ff_erase
+EXPORT_SYMBOL_GPL vmlinux 0x51f0af9c	da903x_update
+EXPORT_SYMBOL_GPL vmlinux 0x5247a60f	debugfs_remove
+EXPORT_SYMBOL_GPL vmlinux 0x528edff0	init_srcu_struct
+EXPORT_SYMBOL_GPL vmlinux 0x52a7f5dc	cpufreq_cpu_get
+EXPORT_SYMBOL_GPL vmlinux 0x52aac8f6	debugfs_rename
+EXPORT_SYMBOL_GPL vmlinux 0x52afdcd7	ata_pci_remove_one
+EXPORT_SYMBOL_GPL vmlinux 0x52d111ea	pm_qos_update_requirement
+EXPORT_SYMBOL_GPL vmlinux 0x52e00443	crypto_aead_type
+EXPORT_SYMBOL_GPL vmlinux 0x5300d26f	usb_string
+EXPORT_SYMBOL_GPL vmlinux 0x5324d04f	bstr_printf
+EXPORT_SYMBOL_GPL vmlinux 0x5326873c	ata_eh_analyze_ncq_error
+EXPORT_SYMBOL_GPL vmlinux 0x53614269	get_cpu_idle_time_us
+EXPORT_SYMBOL_GPL vmlinux 0x5372dede	unregister_acpi_bus_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5388f501	acpi_smbus_register_callback
+EXPORT_SYMBOL_GPL vmlinux 0x53986488	register_die_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x53c070c8	rtc_irq_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x5404a695	regulator_set_mode
+EXPORT_SYMBOL_GPL vmlinux 0x541f96d4	register_virtio_device
+EXPORT_SYMBOL_GPL vmlinux 0x544a4b4b	ata_scsi_simulate
+EXPORT_SYMBOL_GPL vmlinux 0x5460c8d8	fsnotify_get_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x549525ef	handle_nested_irq
+EXPORT_SYMBOL_GPL vmlinux 0x5498c36b	blk_insert_cloned_request
+EXPORT_SYMBOL_GPL vmlinux 0x549fe6a9	class_find_device
+EXPORT_SYMBOL_GPL vmlinux 0x54abc45c	ring_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0x54ae4432	scsi_queue_work
+EXPORT_SYMBOL_GPL vmlinux 0x54e9ae2c	pci_destroy_slot
+EXPORT_SYMBOL_GPL vmlinux 0x553b58d5	crypto_givcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0x55526907	xen_features
+EXPORT_SYMBOL_GPL vmlinux 0x556d11df	gpiochip_remove
+EXPORT_SYMBOL_GPL vmlinux 0x5592985f	dm_rh_start_recovery
+EXPORT_SYMBOL_GPL vmlinux 0x55b2ed7a	inet6_sk_rebuild_header
+EXPORT_SYMBOL_GPL vmlinux 0x55c435ac	ata_do_set_mode
+EXPORT_SYMBOL_GPL vmlinux 0x55dc0a63	sysdev_store_ulong
+EXPORT_SYMBOL_GPL vmlinux 0x55f2580b	__alloc_percpu
+EXPORT_SYMBOL_GPL vmlinux 0x561c634a	wmi_evaluate_method
+EXPORT_SYMBOL_GPL vmlinux 0x56310925	regulator_mode_to_status
+EXPORT_SYMBOL_GPL vmlinux 0x56398615	mark_tsc_unstable
+EXPORT_SYMBOL_GPL vmlinux 0x563fb5c8	__trace_bprintk
+EXPORT_SYMBOL_GPL vmlinux 0x5641485b	tty_termios_encode_baud_rate
+EXPORT_SYMBOL_GPL vmlinux 0x56947347	dmi_walk
+EXPORT_SYMBOL_GPL vmlinux 0x56a69eac	get_inotify_watch
+EXPORT_SYMBOL_GPL vmlinux 0x56ff7528	xfrm_audit_policy_delete
+EXPORT_SYMBOL_GPL vmlinux 0x577642b2	user_update
+EXPORT_SYMBOL_GPL vmlinux 0x5779d445	xenbus_exists
+EXPORT_SYMBOL_GPL vmlinux 0x579e0bf5	rtnl_unregister_all
+EXPORT_SYMBOL_GPL vmlinux 0x57d78b75	crypto_shoot_alg
+EXPORT_SYMBOL_GPL vmlinux 0x57fa2e39	blkdev_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x58722048	hrtimer_init_sleeper
+EXPORT_SYMBOL_GPL vmlinux 0x589eb980	usb_submit_urb
+EXPORT_SYMBOL_GPL vmlinux 0x58bb7493	ring_buffer_empty_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x58d9634a	dm_rh_delay
+EXPORT_SYMBOL_GPL vmlinux 0x593a36c2	scsi_dh_handler_exist
+EXPORT_SYMBOL_GPL vmlinux 0x5a0ae43d	attribute_container_classdev_to_container
+EXPORT_SYMBOL_GPL vmlinux 0x5a2b1b67	gnttab_free_grant_reference
+EXPORT_SYMBOL_GPL vmlinux 0x5a37893c	ata_do_dev_read_id
+EXPORT_SYMBOL_GPL vmlinux 0x5a48fba2	disable_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0x5a7bfe41	crypto_probing_notify
+EXPORT_SYMBOL_GPL vmlinux 0x5aa8cda5	scsi_nl_add_driver
+EXPORT_SYMBOL_GPL vmlinux 0x5aa93a9a	nf_unregister_queue_handlers
+EXPORT_SYMBOL_GPL vmlinux 0x5aee526d	cpci_hp_unregister_bus
+EXPORT_SYMBOL_GPL vmlinux 0x5af03a28	gnttab_claim_grant_reference
+EXPORT_SYMBOL_GPL vmlinux 0x5b435139	unregister_jprobes
+EXPORT_SYMBOL_GPL vmlinux 0x5bfc03c3	unregister_keyboard_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5c4cb1e3	blkcipher_walk_virt
+EXPORT_SYMBOL_GPL vmlinux 0x5c8cb862	sysdev_class_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x5c92beaf	dev_change_net_namespace
+EXPORT_SYMBOL_GPL vmlinux 0x5cb398e1	rtnl_link_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x5cd1db01	xenbus_bind_evtchn
+EXPORT_SYMBOL_GPL vmlinux 0x5d0f6f57	kbd_table
+EXPORT_SYMBOL_GPL vmlinux 0x5d366dec	gnttab_cancel_free_callback
+EXPORT_SYMBOL_GPL vmlinux 0x5d730e7b	raw_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x5d87c067	register_acpi_bus_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5da8d577	xfrm_audit_state_replay_overflow
+EXPORT_SYMBOL_GPL vmlinux 0x5dcde6de	platform_driver_register
+EXPORT_SYMBOL_GPL vmlinux 0x5dd46994	xenbus_watch_pathfmt
+EXPORT_SYMBOL_GPL vmlinux 0x5dd67618	register_netevent_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5dde433c	pci_bus_add_device
+EXPORT_SYMBOL_GPL vmlinux 0x5de1686a	class_for_each_device
+EXPORT_SYMBOL_GPL vmlinux 0x5df32a65	crypto_spawn_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x5e1464c4	sdio_readsb
+EXPORT_SYMBOL_GPL vmlinux 0x5e2f98db	platform_driver_probe
+EXPORT_SYMBOL_GPL vmlinux 0x5e3f6b3f	crypto_shash_setkey
+EXPORT_SYMBOL_GPL vmlinux 0x5e41b7b4	pci_enable_sriov
+EXPORT_SYMBOL_GPL vmlinux 0x5ec6fc5b	ata_pci_sff_prepare_host
+EXPORT_SYMBOL_GPL vmlinux 0x5ee7eaef	inet6_hash_connect
+EXPORT_SYMBOL_GPL vmlinux 0x5f2da8c4	check_tsc_unstable
+EXPORT_SYMBOL_GPL vmlinux 0x5f46849f	regulator_bulk_get
+EXPORT_SYMBOL_GPL vmlinux 0x5faf077e	ata_host_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x5fcdec5d	xfrm_ealg_get_byidx
+EXPORT_SYMBOL_GPL vmlinux 0x603309eb	acpi_ec_remove_query_handler
+EXPORT_SYMBOL_GPL vmlinux 0x603ab8dd	devres_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x60a13e90	rcu_barrier
+EXPORT_SYMBOL_GPL vmlinux 0x60cd73ed	pv_apic_ops
+EXPORT_SYMBOL_GPL vmlinux 0x60cf0ab7	crypto_destroy_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x60fa50f9	put_device
+EXPORT_SYMBOL_GPL vmlinux 0x612db4f9	unregister_virtio_driver
+EXPORT_SYMBOL_GPL vmlinux 0x61747e09	blocking_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x6194ffea	do_machine_check
+EXPORT_SYMBOL_GPL vmlinux 0x619c4110	pci_set_pcie_reset_state
+EXPORT_SYMBOL_GPL vmlinux 0x619f70b9	spi_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x61a1808a	sysdev_class_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x61c6f8bf	power_supply_am_i_supplied
+EXPORT_SYMBOL_GPL vmlinux 0x61e1ca5c	usb_buffer_unmap_sg
+EXPORT_SYMBOL_GPL vmlinux 0x6203ffa2	eventfd_fget
+EXPORT_SYMBOL_GPL vmlinux 0x621b8fdc	cpufreq_frequency_table_cpuinfo
+EXPORT_SYMBOL_GPL vmlinux 0x6258e56f	proc_net_remove
+EXPORT_SYMBOL_GPL vmlinux 0x6279ef6b	dma_release_channel
+EXPORT_SYMBOL_GPL vmlinux 0x627c89ba	usb_create_hcd
+EXPORT_SYMBOL_GPL vmlinux 0x629a7f6e	do_posix_clock_nonanosleep
+EXPORT_SYMBOL_GPL vmlinux 0x62d1c8d0	__scsi_get_command
+EXPORT_SYMBOL_GPL vmlinux 0x62d56d3b	dev_attr_sw_activity
+EXPORT_SYMBOL_GPL vmlinux 0x6301d114	device_add
+EXPORT_SYMBOL_GPL vmlinux 0x6334ee6d	shash_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0x63583f91	hrtimer_cancel
+EXPORT_SYMBOL_GPL vmlinux 0x63dbe800	sysdev_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x63f4dc09	bprintf
+EXPORT_SYMBOL_GPL vmlinux 0x6408368d	crypto_alloc_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0x646fb998	i2c_unregister_device
+EXPORT_SYMBOL_GPL vmlinux 0x64a85ce9	rtc_irq_set_state
+EXPORT_SYMBOL_GPL vmlinux 0x64ade6ba	ata_scsi_queuecmd
+EXPORT_SYMBOL_GPL vmlinux 0x6534fa73	rtc_set_alarm
+EXPORT_SYMBOL_GPL vmlinux 0x654c49e2	aer_irq
+EXPORT_SYMBOL_GPL vmlinux 0x6565b802	device_register
+EXPORT_SYMBOL_GPL vmlinux 0x65896c00	crypto_ahash_setkey
+EXPORT_SYMBOL_GPL vmlinux 0x65b3ae79	transport_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x65bbbc78	schedule_hrtimeout_range
+EXPORT_SYMBOL_GPL vmlinux 0x65ccb6f0	call_netevent_notifiers
+EXPORT_SYMBOL_GPL vmlinux 0x65d6d0f0	gpio_direction_input
+EXPORT_SYMBOL_GPL vmlinux 0x661601de	sprint_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x661cf965	disk_part_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0x6634e498	inet6_csk_addr2sockaddr
+EXPORT_SYMBOL_GPL vmlinux 0x6643376d	inet_unhash
+EXPORT_SYMBOL_GPL vmlinux 0x667e4758	vring_new_virtqueue
+EXPORT_SYMBOL_GPL vmlinux 0x668402aa	crypto_put_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x6685eabf	crypto_alloc_shash
+EXPORT_SYMBOL_GPL vmlinux 0x668d2276	vring_transport_features
+EXPORT_SYMBOL_GPL vmlinux 0x66a9f2dc	tty_perform_flush
+EXPORT_SYMBOL_GPL vmlinux 0x66b2a859	nr_free_buffer_pages
+EXPORT_SYMBOL_GPL vmlinux 0x66cd6a83	srcu_read_lock
+EXPORT_SYMBOL_GPL vmlinux 0x66d87d38	symbol_put_addr
+EXPORT_SYMBOL_GPL vmlinux 0x66f67792	crypto_init_ahash_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x6729e306	udp4_lib_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x672d7bb8	ring_buffer_read
+EXPORT_SYMBOL_GPL vmlinux 0x6752dbea	scsi_internal_device_unblock
+EXPORT_SYMBOL_GPL vmlinux 0x67955ce6	profile_hits
+EXPORT_SYMBOL_GPL vmlinux 0x679fbe7f	tcp_reno_min_cwnd
+EXPORT_SYMBOL_GPL vmlinux 0x67bb6d6d	netlink_has_listeners
+EXPORT_SYMBOL_GPL vmlinux 0x6853a640	crypto_shash_digest
+EXPORT_SYMBOL_GPL vmlinux 0x686c703f	xfrm_count_auth_supported
+EXPORT_SYMBOL_GPL vmlinux 0x6873af1c	trace_define_common_fields
+EXPORT_SYMBOL_GPL vmlinux 0x687f6f36	regulator_bulk_enable
+EXPORT_SYMBOL_GPL vmlinux 0x6892088c	unregister_pm_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x68a668cb	hrtimer_forward
+EXPORT_SYMBOL_GPL vmlinux 0x68c71d40	vring_del_virtqueue
+EXPORT_SYMBOL_GPL vmlinux 0x68cc0ec2	cpufreq_cpu_put
+EXPORT_SYMBOL_GPL vmlinux 0x6901119a	trace_nowake_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0x6905d974	ata_noop_qc_prep
+EXPORT_SYMBOL_GPL vmlinux 0x69065210	tcp_get_info
+EXPORT_SYMBOL_GPL vmlinux 0x690ad8a4	register_posix_clock
+EXPORT_SYMBOL_GPL vmlinux 0x691562f6	ring_buffer_free_read_page
+EXPORT_SYMBOL_GPL vmlinux 0x691b8d3d	device_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x691bcf21	register_pernet_device
+EXPORT_SYMBOL_GPL vmlinux 0x692a1cd5	ring_buffer_overruns
+EXPORT_SYMBOL_GPL vmlinux 0x695533ad	crypto_unregister_template
+EXPORT_SYMBOL_GPL vmlinux 0x695b6e86	ata_pci_bmdma_clear_simplex
+EXPORT_SYMBOL_GPL vmlinux 0x6982334c	dm_rh_stop_recovery
+EXPORT_SYMBOL_GPL vmlinux 0x69e9a2cb	ata_scsi_slave_config
+EXPORT_SYMBOL_GPL vmlinux 0x69efea1e	ata_sff_port_start32
+EXPORT_SYMBOL_GPL vmlinux 0x69fde8e6	dm_disk
+EXPORT_SYMBOL_GPL vmlinux 0x6a19f629	aead_geniv_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x6a1a8328	crypto_alg_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x6a8441be	cpci_hp_start
+EXPORT_SYMBOL_GPL vmlinux 0x6aacccf8	raw_seq_stop
+EXPORT_SYMBOL_GPL vmlinux 0x6ad2bd12	dm_put
+EXPORT_SYMBOL_GPL vmlinux 0x6ad8b8e9	mmu_notifier_register
+EXPORT_SYMBOL_GPL vmlinux 0x6b08cc6b	usb_init_urb
+EXPORT_SYMBOL_GPL vmlinux 0x6b82061c	sata_scr_valid
+EXPORT_SYMBOL_GPL vmlinux 0x6b9178b3	xenbus_strstate
+EXPORT_SYMBOL_GPL vmlinux 0x6b972bcf	tty_buffer_request_room
+EXPORT_SYMBOL_GPL vmlinux 0x6bd89ac1	usb_hcd_platform_shutdown
+EXPORT_SYMBOL_GPL vmlinux 0x6be62dfd	probe_kernel_read
+EXPORT_SYMBOL_GPL vmlinux 0x6c04403c	skb_icv_walk
+EXPORT_SYMBOL_GPL vmlinux 0x6c404e4c	led_trigger_register
+EXPORT_SYMBOL_GPL vmlinux 0x6c49c4f2	clockevents_notify
+EXPORT_SYMBOL_GPL vmlinux 0x6c4bb9ba	ata_host_register
+EXPORT_SYMBOL_GPL vmlinux 0x6c59b789	sysfs_remove_file_from_group
+EXPORT_SYMBOL_GPL vmlinux 0x6c74b50c	crypto_alloc_base
+EXPORT_SYMBOL_GPL vmlinux 0x6c85aac4	map_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0x6c8d5ae8	__gpio_get_value
+EXPORT_SYMBOL_GPL vmlinux 0x6c8eb98f	xfrm_aalg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0x6c958a6b	platform_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x6ca6c67a	gpiochip_is_requested
+EXPORT_SYMBOL_GPL vmlinux 0x6d12a543	device_create_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0x6d2fc5a6	net_namespace_list
+EXPORT_SYMBOL_GPL vmlinux 0x6d866a8f	preempt_notifier_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x6d8c7b42	fuse_request_send
+EXPORT_SYMBOL_GPL vmlinux 0x6dac1f9a	led_trigger_set_default
+EXPORT_SYMBOL_GPL vmlinux 0x6dcc8ee9	srcu_init_notifier_head
+EXPORT_SYMBOL_GPL vmlinux 0x6de797ea	ata_pci_sff_activate_host
+EXPORT_SYMBOL_GPL vmlinux 0x6e58ddf0	gnttab_end_foreign_transfer_ref
+EXPORT_SYMBOL_GPL vmlinux 0x6e7474fc	xfrm_ealg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x6eb18150	skcipher_geniv_init
+EXPORT_SYMBOL_GPL vmlinux 0x6eb787ee	klist_add_head
+EXPORT_SYMBOL_GPL vmlinux 0x6ed05176	usb_get_hcd
+EXPORT_SYMBOL_GPL vmlinux 0x6f34e508	da903x_writes
+EXPORT_SYMBOL_GPL vmlinux 0x6f66ba97	inet_csk_compat_getsockopt
+EXPORT_SYMBOL_GPL vmlinux 0x6fbeb53e	__inet_lookup_listener
+EXPORT_SYMBOL_GPL vmlinux 0x6fbed5b4	device_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x6fd10e67	sysfs_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x6fe3d8cf	ktime_add_safe
+EXPORT_SYMBOL_GPL vmlinux 0x6feb2525	da903x_reads
+EXPORT_SYMBOL_GPL vmlinux 0x6ff607b6	crypto_get_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x7037d79d	k8_flush_garts
+EXPORT_SYMBOL_GPL vmlinux 0x706b3a33	cpufreq_frequency_table_get_attr
+EXPORT_SYMBOL_GPL vmlinux 0x707ff1bb	ata_xfer_mask2mode
+EXPORT_SYMBOL_GPL vmlinux 0x708b782a	fb_bl_default_curve
+EXPORT_SYMBOL_GPL vmlinux 0x70ad3fc6	remove_memory
+EXPORT_SYMBOL_GPL vmlinux 0x70c2f26d	da903x_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x70c73797	vfs_listxattr
+EXPORT_SYMBOL_GPL vmlinux 0x70c90b20	fuse_direct_io
+EXPORT_SYMBOL_GPL vmlinux 0x7113fa43	ata_sff_exec_command
+EXPORT_SYMBOL_GPL vmlinux 0x711c938b	pci_reset_function
+EXPORT_SYMBOL_GPL vmlinux 0x713a9326	__pci_reset_function
+EXPORT_SYMBOL_GPL vmlinux 0x716265c7	debugfs_initialized
+EXPORT_SYMBOL_GPL vmlinux 0x71c48c34	tcp_reno_ssthresh
+EXPORT_SYMBOL_GPL vmlinux 0x71c8bc95	kgdb_unregister_io_module
+EXPORT_SYMBOL_GPL vmlinux 0x71dde159	__ip_route_output_key
+EXPORT_SYMBOL_GPL vmlinux 0x71ff9fc0	usb_hcd_link_urb_to_ep
+EXPORT_SYMBOL_GPL vmlinux 0x72021272	screen_glyph
+EXPORT_SYMBOL_GPL vmlinux 0x720c2be5	key_type_user
+EXPORT_SYMBOL_GPL vmlinux 0x722c4f65	usb_scuttle_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0x72741f25	trace_vbprintk
+EXPORT_SYMBOL_GPL vmlinux 0x7278d328	all_vm_events
+EXPORT_SYMBOL_GPL vmlinux 0x72a2c255	usb_deregister
+EXPORT_SYMBOL_GPL vmlinux 0x72c55186	xenbus_grant_ring
+EXPORT_SYMBOL_GPL vmlinux 0x72cf047e	inet_csk_reqsk_queue_hash_add
+EXPORT_SYMBOL_GPL vmlinux 0x72e03bae	stop_machine_create
+EXPORT_SYMBOL_GPL vmlinux 0x7306a062	rtc_alarm_irq_enable
+EXPORT_SYMBOL_GPL vmlinux 0x731433ee	unregister_timer_hook
+EXPORT_SYMBOL_GPL vmlinux 0x731aef58	dm_rh_region_to_sector
+EXPORT_SYMBOL_GPL vmlinux 0x731dba7a	xen_domain_type
+EXPORT_SYMBOL_GPL vmlinux 0x733e4a90	__class_create
+EXPORT_SYMBOL_GPL vmlinux 0x73645832	sysdev_driver_register
+EXPORT_SYMBOL_GPL vmlinux 0x7373efbd	hvc_instantiate
+EXPORT_SYMBOL_GPL vmlinux 0x7383a136	sdio_f0_readb
+EXPORT_SYMBOL_GPL vmlinux 0x7384a5f2	eventfd_ctx_fileget
+EXPORT_SYMBOL_GPL vmlinux 0x73a48b4a	ata_sff_std_ports
+EXPORT_SYMBOL_GPL vmlinux 0x73b15760	usb_bulk_msg
+EXPORT_SYMBOL_GPL vmlinux 0x73ef2dd8	ata_sff_freeze
+EXPORT_SYMBOL_GPL vmlinux 0x743a165e	ata_pack_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0x74abdafa	task_handoff_register
+EXPORT_SYMBOL_GPL vmlinux 0x74baf17a	tracing_is_on
+EXPORT_SYMBOL_GPL vmlinux 0x74deb10c	used_vectors
+EXPORT_SYMBOL_GPL vmlinux 0x74e51c57	rdev_get_id
+EXPORT_SYMBOL_GPL vmlinux 0x7521afb6	leave_mm
+EXPORT_SYMBOL_GPL vmlinux 0x753d84ef	tcp_is_cwnd_limited
+EXPORT_SYMBOL_GPL vmlinux 0x755f370f	usb_autopm_get_interface
+EXPORT_SYMBOL_GPL vmlinux 0x757dc815	root_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x75804f96	security_inode_mkdir
+EXPORT_SYMBOL_GPL vmlinux 0x758d40e9	__pci_complete_power_transition
+EXPORT_SYMBOL_GPL vmlinux 0x75b4dfdb	ata_std_bios_param
+EXPORT_SYMBOL_GPL vmlinux 0x75ce4fa2	single_open_net
+EXPORT_SYMBOL_GPL vmlinux 0x75e8f3c3	crypto_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x760f7bdf	regulator_set_current_limit
+EXPORT_SYMBOL_GPL vmlinux 0x761188fd	dpm_suspend_noirq
+EXPORT_SYMBOL_GPL vmlinux 0x7632910c	scsi_unregister_device_handler
+EXPORT_SYMBOL_GPL vmlinux 0x765ddee1	__remove_pages
+EXPORT_SYMBOL_GPL vmlinux 0x767afb5e	locks_release_private
+EXPORT_SYMBOL_GPL vmlinux 0x767c4d53	sata_link_resume
+EXPORT_SYMBOL_GPL vmlinux 0x76c21b8f	usb_autopm_set_interface
+EXPORT_SYMBOL_GPL vmlinux 0x76ea20d9	ata_wait_after_reset
+EXPORT_SYMBOL_GPL vmlinux 0x770dc8b4	sysfs_remove_group
+EXPORT_SYMBOL_GPL vmlinux 0x7712771a	unbind_from_irqhandler
+EXPORT_SYMBOL_GPL vmlinux 0x773ca527	init_uts_ns
+EXPORT_SYMBOL_GPL vmlinux 0x777252c6	rt_mutex_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x777c637d	ata_sff_lost_interrupt
+EXPORT_SYMBOL_GPL vmlinux 0x7782f454	lookup_instantiate_filp
+EXPORT_SYMBOL_GPL vmlinux 0x77914ee5	i2c_new_probed_device
+EXPORT_SYMBOL_GPL vmlinux 0x77968206	rt_mutex_unlock
+EXPORT_SYMBOL_GPL vmlinux 0x77b0ebeb	driver_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x77c3e7d0	sdev_evt_send
+EXPORT_SYMBOL_GPL vmlinux 0x780eed89	acpi_processor_ffh_cstate_enter
+EXPORT_SYMBOL_GPL vmlinux 0x78374aef	ata_sas_port_init
+EXPORT_SYMBOL_GPL vmlinux 0x78546758	crypto_enqueue_request
+EXPORT_SYMBOL_GPL vmlinux 0x78aaf4b1	inet6_csk_search_req
+EXPORT_SYMBOL_GPL vmlinux 0x78b2147c	blk_rq_unprep_clone
+EXPORT_SYMBOL_GPL vmlinux 0x78dea77f	sysfs_notify
+EXPORT_SYMBOL_GPL vmlinux 0x78e4a4ee	klist_add_after
+EXPORT_SYMBOL_GPL vmlinux 0x7918b361	usb_buffer_map_sg
+EXPORT_SYMBOL_GPL vmlinux 0x7944e0fc	tracing_off
+EXPORT_SYMBOL_GPL vmlinux 0x7947aeeb	debugfs_create_dir
+EXPORT_SYMBOL_GPL vmlinux 0x7995bbac	sdio_set_block_size
+EXPORT_SYMBOL_GPL vmlinux 0x79ba96ce	page_cache_sync_readahead
+EXPORT_SYMBOL_GPL vmlinux 0x79bc6fc8	spi_busnum_to_master
+EXPORT_SYMBOL_GPL vmlinux 0x79d66d78	xenbus_dev_error
+EXPORT_SYMBOL_GPL vmlinux 0x7a0280b1	pci_get_hp_params
+EXPORT_SYMBOL_GPL vmlinux 0x7a474c96	init_dummy_netdev
+EXPORT_SYMBOL_GPL vmlinux 0x7a47cf8a	device_remove_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0x7a4c1438	pv_info
+EXPORT_SYMBOL_GPL vmlinux 0x7a67efe1	ata_port_abort
+EXPORT_SYMBOL_GPL vmlinux 0x7a7d35e9	debugfs_create_bool
+EXPORT_SYMBOL_GPL vmlinux 0x7ab3c122	edac_handlers
+EXPORT_SYMBOL_GPL vmlinux 0x7ab95b63	ata_port_schedule_eh
+EXPORT_SYMBOL_GPL vmlinux 0x7acc42a8	inode_add_to_lists
+EXPORT_SYMBOL_GPL vmlinux 0x7ae1ae8e	cpufreq_frequency_table_put_attr
+EXPORT_SYMBOL_GPL vmlinux 0x7b1d544d	edac_handler_set
+EXPORT_SYMBOL_GPL vmlinux 0x7b30b753	blkcipher_walk_done
+EXPORT_SYMBOL_GPL vmlinux 0x7b51bf3e	fuse_request_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x7b6e7556	dm_rh_get_state
+EXPORT_SYMBOL_GPL vmlinux 0x7bc7a124	input_ff_create
+EXPORT_SYMBOL_GPL vmlinux 0x7bc7f7ca	regulator_get_voltage
+EXPORT_SYMBOL_GPL vmlinux 0x7bcd2ded	klist_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0x7bce10a7	smp_ops
+EXPORT_SYMBOL_GPL vmlinux 0x7bd36a34	xattr_getsecurity
+EXPORT_SYMBOL_GPL vmlinux 0x7bd7c566	put_driver
+EXPORT_SYMBOL_GPL vmlinux 0x7c36b616	ip6_dst_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x7c4248b1	k_handler
+EXPORT_SYMBOL_GPL vmlinux 0x7c6fee3b	__rtnl_link_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x7c7166c4	platform_device_register_simple
+EXPORT_SYMBOL_GPL vmlinux 0x7c821c56	crypto_spawn_tfm2
+EXPORT_SYMBOL_GPL vmlinux 0x7c83caa0	acpi_ec_add_query_handler
+EXPORT_SYMBOL_GPL vmlinux 0x7cf61d5f	unregister_ftrace_event
+EXPORT_SYMBOL_GPL vmlinux 0x7d358ea4	ata_sff_wait_ready
+EXPORT_SYMBOL_GPL vmlinux 0x7d7fa840	ring_buffer_write
+EXPORT_SYMBOL_GPL vmlinux 0x7d948d04	clockevents_register_device
+EXPORT_SYMBOL_GPL vmlinux 0x7daf2703	ahash_free_instance
+EXPORT_SYMBOL_GPL vmlinux 0x7dc5d0b6	crypto_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x7dea8bb8	register_net_sysctl_rotable
+EXPORT_SYMBOL_GPL vmlinux 0x7e1183c9	async_schedule
+EXPORT_SYMBOL_GPL vmlinux 0x7e24c32b	seq_release_net
+EXPORT_SYMBOL_GPL vmlinux 0x7e275ea8	scsi_complete_async_scans
+EXPORT_SYMBOL_GPL vmlinux 0x7e5e301f	unregister_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0x7e64181d	usb_calc_bus_time
+EXPORT_SYMBOL_GPL vmlinux 0x7e839409	inotify_inode_queue_event
+EXPORT_SYMBOL_GPL vmlinux 0x7ebe3c4b	__pm_runtime_set_status
+EXPORT_SYMBOL_GPL vmlinux 0x7f19c836	unlock_policy_rwsem_write
+EXPORT_SYMBOL_GPL vmlinux 0x7f2898a4	tty_ldisc_flush
+EXPORT_SYMBOL_GPL vmlinux 0x7f2ab4fc	ata_sff_irq_clear
+EXPORT_SYMBOL_GPL vmlinux 0x7f4ade3c	usb_unlink_urb
+EXPORT_SYMBOL_GPL vmlinux 0x7f6c812e	ata_sff_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x7fa0ce99	cpufreq_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0x7fbe01cf	anon_transport_class_register
+EXPORT_SYMBOL_GPL vmlinux 0x7fd62d67	fuse_request_send_background
+EXPORT_SYMBOL_GPL vmlinux 0x7fe25037	__mmu_notifier_register
+EXPORT_SYMBOL_GPL vmlinux 0x7fe5f136	shash_ahash_update
+EXPORT_SYMBOL_GPL vmlinux 0x7fe8e556	usb_clear_halt
+EXPORT_SYMBOL_GPL vmlinux 0x7ff10ccf	raw_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x7ff49c8d	cpufreq_frequency_table_target
+EXPORT_SYMBOL_GPL vmlinux 0x8014b6af	input_event_from_user
+EXPORT_SYMBOL_GPL vmlinux 0x8039d043	selinux_secmark_relabel_packet_permission
+EXPORT_SYMBOL_GPL vmlinux 0x8085c9d3	gpiochip_add
+EXPORT_SYMBOL_GPL vmlinux 0x808ec1a3	crypto_alg_tested
+EXPORT_SYMBOL_GPL vmlinux 0x80c6e9ee	spi_write_then_read
+EXPORT_SYMBOL_GPL vmlinux 0x80ee55c3	selinux_secmark_refcount_inc
+EXPORT_SYMBOL_GPL vmlinux 0x8149ea54	ata_timing_find_mode
+EXPORT_SYMBOL_GPL vmlinux 0x81618786	usb_hcd_pci_pm_ops
+EXPORT_SYMBOL_GPL vmlinux 0x8170c890	crypto_create_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x818ff77d	sata_async_notification
+EXPORT_SYMBOL_GPL vmlinux 0x81f003af	part_round_stats
+EXPORT_SYMBOL_GPL vmlinux 0x81fa2eb6	queue_work_on
+EXPORT_SYMBOL_GPL vmlinux 0x8220ef9b	inverse_translate
+EXPORT_SYMBOL_GPL vmlinux 0x8226642f	__gpio_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x82939ebd	rcu_batches_completed_sched
+EXPORT_SYMBOL_GPL vmlinux 0x829f6e77	simple_attr_open
+EXPORT_SYMBOL_GPL vmlinux 0x82a5a399	rt_mutex_trylock
+EXPORT_SYMBOL_GPL vmlinux 0x82af8b9a	devres_open_group
+EXPORT_SYMBOL_GPL vmlinux 0x82bf79c7	dev_attr_em_message_type
+EXPORT_SYMBOL_GPL vmlinux 0x82cd19f3	register_xenstore_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x82d79b51	sysctl_vfs_cache_pressure
+EXPORT_SYMBOL_GPL vmlinux 0x82f776b7	gpio_export
+EXPORT_SYMBOL_GPL vmlinux 0x83577711	simple_attr_read
+EXPORT_SYMBOL_GPL vmlinux 0x836775e9	aead_geniv_free
+EXPORT_SYMBOL_GPL vmlinux 0x83709f10	__rtnl_register
+EXPORT_SYMBOL_GPL vmlinux 0x83a3a0ce	usb_hub_clear_tt_buffer
+EXPORT_SYMBOL_GPL vmlinux 0x83b16f92	kern_mount_data
+EXPORT_SYMBOL_GPL vmlinux 0x83e52c00	power_supply_class
+EXPORT_SYMBOL_GPL vmlinux 0x83f240e4	xenbus_dev_fatal
+EXPORT_SYMBOL_GPL vmlinux 0x842a07ae	crypto_rng_type
+EXPORT_SYMBOL_GPL vmlinux 0x843d70ef	acpi_is_root_bridge
+EXPORT_SYMBOL_GPL vmlinux 0x8480b8cb	proc_net_fops_create
+EXPORT_SYMBOL_GPL vmlinux 0x84afebd3	fuse_put_request
+EXPORT_SYMBOL_GPL vmlinux 0x84b149e9	hypervisor_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x84cd41bc	__inet_twsk_hashdance
+EXPORT_SYMBOL_GPL vmlinux 0x84e98f8c	pci_hp_create_module_link
+EXPORT_SYMBOL_GPL vmlinux 0x851d36c5	ring_buffer_record_enable_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x85478a0b	inet6_hash_frag
+EXPORT_SYMBOL_GPL vmlinux 0x8580d509	usb_autopm_put_interface
+EXPORT_SYMBOL_GPL vmlinux 0x85a09e24	tty_encode_baud_rate
+EXPORT_SYMBOL_GPL vmlinux 0x85a60edf	crypto_larval_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x85aadb52	skb_gro_receive
+EXPORT_SYMBOL_GPL vmlinux 0x85b4e4e5	platform_bus
+EXPORT_SYMBOL_GPL vmlinux 0x85c10896	rcu_batches_completed_bh
+EXPORT_SYMBOL_GPL vmlinux 0x85d7edfd	hpet_set_periodic_freq
+EXPORT_SYMBOL_GPL vmlinux 0x8614227d	blk_rq_prep_clone
+EXPORT_SYMBOL_GPL vmlinux 0x862c16bc	ata_scsi_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x86623fd7	notify_remote_via_irq
+EXPORT_SYMBOL_GPL vmlinux 0x866e4528	register_virtio_driver
+EXPORT_SYMBOL_GPL vmlinux 0x867c684a	setup_APIC_eilvt_ibs
+EXPORT_SYMBOL_GPL vmlinux 0x868784cb	__symbol_get
+EXPORT_SYMBOL_GPL vmlinux 0x86a51007	gnttab_end_foreign_transfer
+EXPORT_SYMBOL_GPL vmlinux 0x86b1667d	hwrng_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x86f6b99d	synchronize_rcu_expedited
+EXPORT_SYMBOL_GPL vmlinux 0x8722e5ea	hvc_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x873fbaea	edac_atomic_assert_error
+EXPORT_SYMBOL_GPL vmlinux 0x876d29f1	wmi_get_event_data
+EXPORT_SYMBOL_GPL vmlinux 0x87754115	raw_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x87ee2265	fuse_dev_operations
+EXPORT_SYMBOL_GPL vmlinux 0x87fb346f	register_pernet_subsys
+EXPORT_SYMBOL_GPL vmlinux 0x880b189a	__atomic_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x8810ad5e	crypto_xor
+EXPORT_SYMBOL_GPL vmlinux 0x88509c0d	tcp_twsk_destructor
+EXPORT_SYMBOL_GPL vmlinux 0x885142a6	nf_net_netfilter_sysctl_path
+EXPORT_SYMBOL_GPL vmlinux 0x886b0bf1	acpi_smbus_write
+EXPORT_SYMBOL_GPL vmlinux 0x8884ff37	rdev_get_dev
+EXPORT_SYMBOL_GPL vmlinux 0x88e3a7cf	fb_deferred_io_fsync
+EXPORT_SYMBOL_GPL vmlinux 0x88f22377	security_inode_create
+EXPORT_SYMBOL_GPL vmlinux 0x88f8be1e	sysdev_show_int
+EXPORT_SYMBOL_GPL vmlinux 0x8902a8a2	save_stack_trace_tsk
+EXPORT_SYMBOL_GPL vmlinux 0x8982c123	crypto_hash_walk_done
+EXPORT_SYMBOL_GPL vmlinux 0x8a72be8e	power_supply_changed
+EXPORT_SYMBOL_GPL vmlinux 0x8a78989f	irq_from_evtchn
+EXPORT_SYMBOL_GPL vmlinux 0x8a8dd834	usb_free_urb
+EXPORT_SYMBOL_GPL vmlinux 0x8abb0c6c	fuse_conn_get
+EXPORT_SYMBOL_GPL vmlinux 0x8acba27a	debugfs_create_x32
+EXPORT_SYMBOL_GPL vmlinux 0x8ada53b2	fuse_conn_init
+EXPORT_SYMBOL_GPL vmlinux 0x8ae8f1f9	tasklet_hrtimer_init
+EXPORT_SYMBOL_GPL vmlinux 0x8b0a3866	aead_geniv_init
+EXPORT_SYMBOL_GPL vmlinux 0x8b1e7748	blk_rq_err_bytes
+EXPORT_SYMBOL_GPL vmlinux 0x8b39cf9d	unregister_kprobes
+EXPORT_SYMBOL_GPL vmlinux 0x8b55a287	ata_slave_link_init
+EXPORT_SYMBOL_GPL vmlinux 0x8b752ac1	ata_tf_to_fis
+EXPORT_SYMBOL_GPL vmlinux 0x8b83ccd6	inet_csk_reqsk_queue_prune
+EXPORT_SYMBOL_GPL vmlinux 0x8b9200fd	lookup_address
+EXPORT_SYMBOL_GPL vmlinux 0x8ba6b62b	usb_register_dev
+EXPORT_SYMBOL_GPL vmlinux 0x8c04837a	ata_sg_init
+EXPORT_SYMBOL_GPL vmlinux 0x8c06a108	xenbus_transaction_start
+EXPORT_SYMBOL_GPL vmlinux 0x8c0b9c12	queue_delayed_work_on
+EXPORT_SYMBOL_GPL vmlinux 0x8c38074a	unregister_xenstore_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x8c5cfec9	ring_buffer_resize
+EXPORT_SYMBOL_GPL vmlinux 0x8c62e796	blkcipher_walk_phys
+EXPORT_SYMBOL_GPL vmlinux 0x8c9d686d	__wake_up_sync_key
+EXPORT_SYMBOL_GPL vmlinux 0x8c9d7a3b	uhci_check_and_reset_hc
+EXPORT_SYMBOL_GPL vmlinux 0x8cc1ebf6	dm_underlying_device_busy
+EXPORT_SYMBOL_GPL vmlinux 0x8d033df4	klist_node_attached
+EXPORT_SYMBOL_GPL vmlinux 0x8d109544	transport_setup_device
+EXPORT_SYMBOL_GPL vmlinux 0x8d1bb101	md_do_sync
+EXPORT_SYMBOL_GPL vmlinux 0x8d2609ba	sdio_readl
+EXPORT_SYMBOL_GPL vmlinux 0x8d276b3b	aead_geniv_exit
+EXPORT_SYMBOL_GPL vmlinux 0x8d9ff945	inet_csk_get_port
+EXPORT_SYMBOL_GPL vmlinux 0x8db1a37e	cpuidle_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0x8db89810	device_for_each_child
+EXPORT_SYMBOL_GPL vmlinux 0x8dd0f28b	unregister_kretprobes
+EXPORT_SYMBOL_GPL vmlinux 0x8dd9d7f4	unregister_virtio_device
+EXPORT_SYMBOL_GPL vmlinux 0x8df671ab	ata_sff_pause
+EXPORT_SYMBOL_GPL vmlinux 0x8e0a9a44	debugfs_create_symlink
+EXPORT_SYMBOL_GPL vmlinux 0x8e22df51	__dma_request_channel
+EXPORT_SYMBOL_GPL vmlinux 0x8e3f58df	proc_net_mkdir
+EXPORT_SYMBOL_GPL vmlinux 0x8e50a52a	sdio_f0_writeb
+EXPORT_SYMBOL_GPL vmlinux 0x8e53dc6c	shash_attr_alg
+EXPORT_SYMBOL_GPL vmlinux 0x8e78458a	platform_add_devices
+EXPORT_SYMBOL_GPL vmlinux 0x8eb502e6	cleanup_srcu_struct
+EXPORT_SYMBOL_GPL vmlinux 0x8eb58c6e	__wake_up_sync
+EXPORT_SYMBOL_GPL vmlinux 0x8efc73df	ring_buffer_discard_commit
+EXPORT_SYMBOL_GPL vmlinux 0x8efe0116	led_trigger_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x8eff29ba	scsi_internal_device_block
+EXPORT_SYMBOL_GPL vmlinux 0x8f68fe64	ata_sff_hsm_move
+EXPORT_SYMBOL_GPL vmlinux 0x8f6cee77	__round_jiffies_relative
+EXPORT_SYMBOL_GPL vmlinux 0x8f88b4a6	alloc_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0x8f8932fa	xenbus_switch_state
+EXPORT_SYMBOL_GPL vmlinux 0x8f9cd9bd	sata_scr_read
+EXPORT_SYMBOL_GPL vmlinux 0x8fa74514	sysdev_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x8fd3ccbd	regulator_set_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0x9009602a	acpi_bus_get_ejd
+EXPORT_SYMBOL_GPL vmlinux 0x900edab2	inet6_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x9049a5c0	scsi_dh_attach
+EXPORT_SYMBOL_GPL vmlinux 0x90a1004a	crypto_has_alg
+EXPORT_SYMBOL_GPL vmlinux 0x90bfb2b3	ip6_dst_blackhole
+EXPORT_SYMBOL_GPL vmlinux 0x911a2a42	sock_prot_inuse_add
+EXPORT_SYMBOL_GPL vmlinux 0x91482eef	usb_anchor_empty
+EXPORT_SYMBOL_GPL vmlinux 0x91591f88	skcipher_geniv_exit
+EXPORT_SYMBOL_GPL vmlinux 0x9159b9d6	profile_event_register
+EXPORT_SYMBOL_GPL vmlinux 0x91a2b170	usb_hcd_pci_probe
+EXPORT_SYMBOL_GPL vmlinux 0x91de7c9d	page_mkclean
+EXPORT_SYMBOL_GPL vmlinux 0x91ef82f8	uart_set_options
+EXPORT_SYMBOL_GPL vmlinux 0x92010bb7	set_cpus_allowed_ptr
+EXPORT_SYMBOL_GPL vmlinux 0x92015f33	usb_driver_set_configuration
+EXPORT_SYMBOL_GPL vmlinux 0x9230d1ef	usb_match_id
+EXPORT_SYMBOL_GPL vmlinux 0x9261be00	inet_csk_route_req
+EXPORT_SYMBOL_GPL vmlinux 0x926be658	crypto_ahash_type
+EXPORT_SYMBOL_GPL vmlinux 0x92a422ca	inotify_dentry_parent_queue_event
+EXPORT_SYMBOL_GPL vmlinux 0x92d31cfb	fixed_phy_add
+EXPORT_SYMBOL_GPL vmlinux 0x92fb217b	dcookie_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x93260715	register_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0x9370c643	crypto_larval_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x93d2422d	snmp_mib_free
+EXPORT_SYMBOL_GPL vmlinux 0x93d40a17	dm_rh_flush
+EXPORT_SYMBOL_GPL vmlinux 0x93dcc8e2	find_module
+EXPORT_SYMBOL_GPL vmlinux 0x93f24427	tty_find_polling_driver
+EXPORT_SYMBOL_GPL vmlinux 0x94120777	__module_text_address
+EXPORT_SYMBOL_GPL vmlinux 0x942a41f4	iommu_unmap_range
+EXPORT_SYMBOL_GPL vmlinux 0x943f5b10	ring_buffer_size
+EXPORT_SYMBOL_GPL vmlinux 0x94a68723	ata_scsi_slave_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x94b4b1a4	pm_request_idle
+EXPORT_SYMBOL_GPL vmlinux 0x94ef4d05	cpci_hp_stop
+EXPORT_SYMBOL_GPL vmlinux 0x950cc8ec	sdio_writeb
+EXPORT_SYMBOL_GPL vmlinux 0x952664c5	do_exit
+EXPORT_SYMBOL_GPL vmlinux 0x9528c6e2	blk_execute_rq_nowait
+EXPORT_SYMBOL_GPL vmlinux 0x95490884	get_net_ns_by_pid
+EXPORT_SYMBOL_GPL vmlinux 0x956695aa	securityfs_remove
+EXPORT_SYMBOL_GPL vmlinux 0x956944de	kobject_uevent_env
+EXPORT_SYMBOL_GPL vmlinux 0x956a91ba	gpio_get_value_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x9573578b	ring_buffer_record_disable_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x95758050	__blocking_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x95a664be	ata_sff_data_xfer
+EXPORT_SYMBOL_GPL vmlinux 0x961a8cd3	unlock_policy_rwsem_read
+EXPORT_SYMBOL_GPL vmlinux 0x96255823	default_backing_dev_info
+EXPORT_SYMBOL_GPL vmlinux 0x964d5c39	acpi_os_map_memory
+EXPORT_SYMBOL_GPL vmlinux 0x96a6be62	rtc_set_mmss
+EXPORT_SYMBOL_GPL vmlinux 0x96cbcf31	pm_qos_add_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x96cc1bad	sata_pmp_error_handler
+EXPORT_SYMBOL_GPL vmlinux 0x970c8daa	fixed_phy_set_link_update
+EXPORT_SYMBOL_GPL vmlinux 0x973f5c94	platform_device_del
+EXPORT_SYMBOL_GPL vmlinux 0x975d4675	usb_hc_died
+EXPORT_SYMBOL_GPL vmlinux 0x978caf9c	platform_get_irq_byname
+EXPORT_SYMBOL_GPL vmlinux 0x97982542	hrtimer_start_range_ns
+EXPORT_SYMBOL_GPL vmlinux 0x97ed5fd6	debugfs_create_x8
+EXPORT_SYMBOL_GPL vmlinux 0x98215d8d	device_rename
+EXPORT_SYMBOL_GPL vmlinux 0x9833bc0c	hvc_kick
+EXPORT_SYMBOL_GPL vmlinux 0x98723d44	ip6_sk_dst_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x988cffc4	blk_trace_remove
+EXPORT_SYMBOL_GPL vmlinux 0x9890ddc4	crypto_hash_walk_first
+EXPORT_SYMBOL_GPL vmlinux 0x9892cef5	ata_port_freeze
+EXPORT_SYMBOL_GPL vmlinux 0x98d80248	d_materialise_unique
+EXPORT_SYMBOL_GPL vmlinux 0x98f77350	i2c_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x9917f97b	usb_reset_device
+EXPORT_SYMBOL_GPL vmlinux 0x9924c496	__usb_get_extra_descriptor
+EXPORT_SYMBOL_GPL vmlinux 0x993f8ef2	ata_do_eh
+EXPORT_SYMBOL_GPL vmlinux 0x995d1071	prof_on
+EXPORT_SYMBOL_GPL vmlinux 0x995d38f8	attribute_container_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x9977ed70	acpi_pci_find_root
+EXPORT_SYMBOL_GPL vmlinux 0x9984c858	usb_unpoison_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0x99a79fb2	ata_qc_complete
+EXPORT_SYMBOL_GPL vmlinux 0x99cb0dbb	platform_get_resource_byname
+EXPORT_SYMBOL_GPL vmlinux 0x99e96caa	dm_noflush_suspending
+EXPORT_SYMBOL_GPL vmlinux 0x99f37dce	filter_current_check_discard
+EXPORT_SYMBOL_GPL vmlinux 0x9a11a0fc	crypto_attr_alg_name
+EXPORT_SYMBOL_GPL vmlinux 0x9a28eac2	invalidate_inode_pages2_range
+EXPORT_SYMBOL_GPL vmlinux 0x9a4d1034	idle_notifier_register
+EXPORT_SYMBOL_GPL vmlinux 0x9a74d59f	find_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x9aa79db3	__srcu_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x9b07fc24	dma_get_required_mask
+EXPORT_SYMBOL_GPL vmlinux 0x9b3d37be	dm_rh_get_region_key
+EXPORT_SYMBOL_GPL vmlinux 0x9b8b3e51	acpi_processor_ffh_cstate_probe
+EXPORT_SYMBOL_GPL vmlinux 0x9ba0501e	unregister_vt_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x9bc0829f	regulator_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x9bcf3d1d	ata_cable_40wire
+EXPORT_SYMBOL_GPL vmlinux 0x9c289f32	__fsnotify_parent
+EXPORT_SYMBOL_GPL vmlinux 0x9c2de449	memory_add_physaddr_to_nid
+EXPORT_SYMBOL_GPL vmlinux 0x9c7ed5bb	__set_irq_handler
+EXPORT_SYMBOL_GPL vmlinux 0x9cb8037b	xfrm_count_enc_supported
+EXPORT_SYMBOL_GPL vmlinux 0x9d06688b	register_xenbus_watch
+EXPORT_SYMBOL_GPL vmlinux 0x9d2a96a7	ata_host_resume
+EXPORT_SYMBOL_GPL vmlinux 0x9d2b6a58	hpet_register_irq_handler
+EXPORT_SYMBOL_GPL vmlinux 0x9d308c4d	hrtimer_try_to_cancel
+EXPORT_SYMBOL_GPL vmlinux 0x9d3850e1	gnttab_alloc_grant_references
+EXPORT_SYMBOL_GPL vmlinux 0x9d960d41	debugfs_create_blob
+EXPORT_SYMBOL_GPL vmlinux 0x9d99b7ec	fib_rules_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x9e01f6d4	eventfd_signal
+EXPORT_SYMBOL_GPL vmlinux 0x9e160494	use_module
+EXPORT_SYMBOL_GPL vmlinux 0x9e243645	kallsyms_on_each_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x9e26281d	flush_workqueue
+EXPORT_SYMBOL_GPL vmlinux 0x9e389dd4	usb_unpoison_urb
+EXPORT_SYMBOL_GPL vmlinux 0x9e711ad2	pm_qos_requirement
+EXPORT_SYMBOL_GPL vmlinux 0x9e95459a	transport_remove_device
+EXPORT_SYMBOL_GPL vmlinux 0x9ea13d09	__ata_ehi_push_desc
+EXPORT_SYMBOL_GPL vmlinux 0x9ea46db6	ip_local_out
+EXPORT_SYMBOL_GPL vmlinux 0x9ec90efe	dm_dispatch_request
+EXPORT_SYMBOL_GPL vmlinux 0x9f40a6d6	async_synchronize_full_domain
+EXPORT_SYMBOL_GPL vmlinux 0x9f85ed90	klist_remove
+EXPORT_SYMBOL_GPL vmlinux 0x9f9424d2	dm_rh_recovery_in_flight
+EXPORT_SYMBOL_GPL vmlinux 0x9fce80db	fb_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xa00f8da8	ata_cable_unknown
+EXPORT_SYMBOL_GPL vmlinux 0xa0255440	net_ipv4_ctl_path
+EXPORT_SYMBOL_GPL vmlinux 0xa081eaca	do_add_mount
+EXPORT_SYMBOL_GPL vmlinux 0xa087769d	unregister_net_sysctl_table
+EXPORT_SYMBOL_GPL vmlinux 0xa0c44211	sysfs_notify_dirent
+EXPORT_SYMBOL_GPL vmlinux 0xa0c71dac	spi_populate_sync_msg
+EXPORT_SYMBOL_GPL vmlinux 0xa0d332ac	add_page_wait_queue
+EXPORT_SYMBOL_GPL vmlinux 0xa0f01f94	module_mutex
+EXPORT_SYMBOL_GPL vmlinux 0xa0fa393a	find_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0xa12e646f	ring_buffer_reset
+EXPORT_SYMBOL_GPL vmlinux 0xa14c2555	usb_store_new_id
+EXPORT_SYMBOL_GPL vmlinux 0xa157ae34	xenbus_map_ring
+EXPORT_SYMBOL_GPL vmlinux 0xa1a907f3	scsi_eh_ready_devs
+EXPORT_SYMBOL_GPL vmlinux 0xa1adc04f	ata_dev_disable
+EXPORT_SYMBOL_GPL vmlinux 0xa1ba648c	skcipher_geniv_free
+EXPORT_SYMBOL_GPL vmlinux 0xa1d27af3	swiotlb_sync_single_range_for_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xa1d9003f	platform_device_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xa20e30c5	usb_put_dev
+EXPORT_SYMBOL_GPL vmlinux 0xa28555c1	ring_buffer_free
+EXPORT_SYMBOL_GPL vmlinux 0xa28cddbe	fib_rules_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xa28d8527	usb_poison_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0xa2c1a9d3	acpi_bus_trim
+EXPORT_SYMBOL_GPL vmlinux 0xa2e2f876	inotify_rm_wd
+EXPORT_SYMBOL_GPL vmlinux 0xa2e67f08	acpi_bus_generate_proc_event4
+EXPORT_SYMBOL_GPL vmlinux 0xa307bd10	driver_find
+EXPORT_SYMBOL_GPL vmlinux 0xa30b8668	pci_disable_pcie_error_reporting
+EXPORT_SYMBOL_GPL vmlinux 0xa34f1aea	tty_get_pgrp
+EXPORT_SYMBOL_GPL vmlinux 0xa353fffc	xenbus_rm
+EXPORT_SYMBOL_GPL vmlinux 0xa3809732	pci_intx
+EXPORT_SYMBOL_GPL vmlinux 0xa3d7114f	mmu_notifier_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xa3ed920b	ata_ehi_push_desc
+EXPORT_SYMBOL_GPL vmlinux 0xa40484e0	fb_deferred_io_cleanup
+EXPORT_SYMBOL_GPL vmlinux 0xa40a8590	input_event_to_user
+EXPORT_SYMBOL_GPL vmlinux 0xa42b9cc1	lookup_create
+EXPORT_SYMBOL_GPL vmlinux 0xa43094a0	platform_device_add
+EXPORT_SYMBOL_GPL vmlinux 0xa44b53db	inet_csk_bind_conflict
+EXPORT_SYMBOL_GPL vmlinux 0xa452b68a	ring_buffer_normalize_time_stamp
+EXPORT_SYMBOL_GPL vmlinux 0xa452c297	hpet_mask_rtc_irq_bit
+EXPORT_SYMBOL_GPL vmlinux 0xa4a42813	vbin_printf
+EXPORT_SYMBOL_GPL vmlinux 0xa4b1bdda	tty_wakeup
+EXPORT_SYMBOL_GPL vmlinux 0xa4d58669	math_state_restore
+EXPORT_SYMBOL_GPL vmlinux 0xa4d5d70d	regulator_disable
+EXPORT_SYMBOL_GPL vmlinux 0xa4e785ab	ata_host_start
+EXPORT_SYMBOL_GPL vmlinux 0xa4e82fa2	dm_unregister_path_selector
+EXPORT_SYMBOL_GPL vmlinux 0xa50c2f9f	class_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xa51105bf	spi_async
+EXPORT_SYMBOL_GPL vmlinux 0xa519a3eb	xenbus_watch_path
+EXPORT_SYMBOL_GPL vmlinux 0xa5597e1c	cpuidle_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0xa576e273	crypto_grab_aead
+EXPORT_SYMBOL_GPL vmlinux 0xa585b901	raw_seq_open
+EXPORT_SYMBOL_GPL vmlinux 0xa5995bfe	ata_std_postreset
+EXPORT_SYMBOL_GPL vmlinux 0xa5bf5c3e	pm_qos_add_requirement
+EXPORT_SYMBOL_GPL vmlinux 0xa5c36cec	inotify_unmount_inodes
+EXPORT_SYMBOL_GPL vmlinux 0xa5ed94aa	inet_twsk_put
+EXPORT_SYMBOL_GPL vmlinux 0xa5efbf4c	async_synchronize_full
+EXPORT_SYMBOL_GPL vmlinux 0xa656d156	cpuidle_unregister_device
+EXPORT_SYMBOL_GPL vmlinux 0xa675461c	sdio_release_host
+EXPORT_SYMBOL_GPL vmlinux 0xa6a1cba9	sis_info133_for_sata
+EXPORT_SYMBOL_GPL vmlinux 0xa6f8d4c7	__inet_inherit_port
+EXPORT_SYMBOL_GPL vmlinux 0xa7804eed	br_fdb_test_addr_hook
+EXPORT_SYMBOL_GPL vmlinux 0xa80e3287	usb_buffer_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xa84ddee4	each_symbol
+EXPORT_SYMBOL_GPL vmlinux 0xa869c055	ata_sff_softreset
+EXPORT_SYMBOL_GPL vmlinux 0xa87ae87e	bus_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xa895515a	sysfs_schedule_callback
+EXPORT_SYMBOL_GPL vmlinux 0xa8ca38cd	blkcipher_walk_virt_block
+EXPORT_SYMBOL_GPL vmlinux 0xa8f59416	gpio_direction_output
+EXPORT_SYMBOL_GPL vmlinux 0xa9126bff	hpet_set_rtc_irq_bit
+EXPORT_SYMBOL_GPL vmlinux 0xa949157b	__pm_runtime_put
+EXPORT_SYMBOL_GPL vmlinux 0xa9c530b8	unregister_oom_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xa9f8fb98	usb_hcd_poll_rh_status
+EXPORT_SYMBOL_GPL vmlinux 0xaa1eb3c1	regulator_get_exclusive
+EXPORT_SYMBOL_GPL vmlinux 0xaa3e3aea	__i2c_board_lock
+EXPORT_SYMBOL_GPL vmlinux 0xaa44aee9	rtc_irq_set_freq
+EXPORT_SYMBOL_GPL vmlinux 0xaa527a9b	relay_open
+EXPORT_SYMBOL_GPL vmlinux 0xaa5310f9	__tracepoint_napi_poll
+EXPORT_SYMBOL_GPL vmlinux 0xaa646e4d	tty_mode_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xaa8c4696	cpu_clock
+EXPORT_SYMBOL_GPL vmlinux 0xaaddf6ca	blocking_notifier_chain_cond_register
+EXPORT_SYMBOL_GPL vmlinux 0xaaf253a0	class_dev_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0xab01acbe	gnttab_request_free_callback
+EXPORT_SYMBOL_GPL vmlinux 0xab25c306	ata_sff_thaw
+EXPORT_SYMBOL_GPL vmlinux 0xab2a7a79	usb_remove_hcd
+EXPORT_SYMBOL_GPL vmlinux 0xab39ba0e	blk_add_driver_data
+EXPORT_SYMBOL_GPL vmlinux 0xab57e311	tracepoint_probe_register
+EXPORT_SYMBOL_GPL vmlinux 0xab67f0f3	anon_transport_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xab8e3571	srcu_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xabaacc97	skb_cow_data
+EXPORT_SYMBOL_GPL vmlinux 0xabf2039c	da903x_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xabf9c391	ata_sff_post_internal_cmd
+EXPORT_SYMBOL_GPL vmlinux 0xac8daac8	crypto_init_shash_spawn
+EXPORT_SYMBOL_GPL vmlinux 0xaca949b9	generic_fh_to_parent
+EXPORT_SYMBOL_GPL vmlinux 0xacafa8e7	vector_used_by_percpu_irq
+EXPORT_SYMBOL_GPL vmlinux 0xacc19485	ibft_addr
+EXPORT_SYMBOL_GPL vmlinux 0xace5c0fc	usb_bus_list
+EXPORT_SYMBOL_GPL vmlinux 0xacf96d2a	pci_enable_rom
+EXPORT_SYMBOL_GPL vmlinux 0xad096363	xenbus_printf
+EXPORT_SYMBOL_GPL vmlinux 0xad430213	inet6_lookup_listener
+EXPORT_SYMBOL_GPL vmlinux 0xad728ced	rt_mutex_timed_lock
+EXPORT_SYMBOL_GPL vmlinux 0xad769421	sata_std_hardreset
+EXPORT_SYMBOL_GPL vmlinux 0xad79b20d	sk_setup_caps
+EXPORT_SYMBOL_GPL vmlinux 0xadbd8d1c	ata_pci_sff_init_host
+EXPORT_SYMBOL_GPL vmlinux 0xadc7a072	da903x_set_bits
+EXPORT_SYMBOL_GPL vmlinux 0xae0c87ee	pm_qos_remove_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xae5660a4	mmput
+EXPORT_SYMBOL_GPL vmlinux 0xae733573	blk_trace_setup
+EXPORT_SYMBOL_GPL vmlinux 0xae9de67e	__xenbus_register_frontend
+EXPORT_SYMBOL_GPL vmlinux 0xaf11d14b	scsi_target_block
+EXPORT_SYMBOL_GPL vmlinux 0xaf23c335	securityfs_create_dir
+EXPORT_SYMBOL_GPL vmlinux 0xaf2de635	rt_mutex_lock
+EXPORT_SYMBOL_GPL vmlinux 0xaf3f6fe0	ata_sff_interrupt
+EXPORT_SYMBOL_GPL vmlinux 0xaf69ecec	sync_filesystem
+EXPORT_SYMBOL_GPL vmlinux 0xaf701f15	ata_bmdma_mode_filter
+EXPORT_SYMBOL_GPL vmlinux 0xafbdd6ee	shash_ahash_digest
+EXPORT_SYMBOL_GPL vmlinux 0xafc7c996	usb_unlink_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0xafe845e8	iommu_attach_device
+EXPORT_SYMBOL_GPL vmlinux 0xb0223109	klist_next
+EXPORT_SYMBOL_GPL vmlinux 0xb02959a5	sata_link_hardreset
+EXPORT_SYMBOL_GPL vmlinux 0xb0aa812e	fips_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xb0ac5ea0	led_trigger_register_simple
+EXPORT_SYMBOL_GPL vmlinux 0xb0b82393	ata_acpi_stm
+EXPORT_SYMBOL_GPL vmlinux 0xb0cf522f	devres_get
+EXPORT_SYMBOL_GPL vmlinux 0xb0eedea9	usb_wait_anchor_empty_timeout
+EXPORT_SYMBOL_GPL vmlinux 0xb0f4d9ef	skb_partial_csum_set
+EXPORT_SYMBOL_GPL vmlinux 0xb10d55bc	cn_netlink_send
+EXPORT_SYMBOL_GPL vmlinux 0xb15b05e0	ata_pci_bmdma_init
+EXPORT_SYMBOL_GPL vmlinux 0xb17475b8	usb_match_one_id
+EXPORT_SYMBOL_GPL vmlinux 0xb17873c5	crypto_alg_mod_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xb18429eb	suspend_device_irqs
+EXPORT_SYMBOL_GPL vmlinux 0xb1acbcce	rcu_barrier_sched
+EXPORT_SYMBOL_GPL vmlinux 0xb1c7caa4	user_describe
+EXPORT_SYMBOL_GPL vmlinux 0xb2d5427b	put_inotify_watch
+EXPORT_SYMBOL_GPL vmlinux 0xb313fb5b	cpuidle_register_device
+EXPORT_SYMBOL_GPL vmlinux 0xb3141b81	scsi_dh_activate
+EXPORT_SYMBOL_GPL vmlinux 0xb3253ed9	hpet_rtc_timer_init
+EXPORT_SYMBOL_GPL vmlinux 0xb3291acf	ata_sff_qc_prep
+EXPORT_SYMBOL_GPL vmlinux 0xb38e9a9c	class_interface_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xb3e4d130	tty_init_termios
+EXPORT_SYMBOL_GPL vmlinux 0xb3ef4bf5	__lock_page_killable
+EXPORT_SYMBOL_GPL vmlinux 0xb4524d5a	__get_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0xb45464e4	disk_part_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0xb4759adc	stop_machine
+EXPORT_SYMBOL_GPL vmlinux 0xb4e14553	gnttab_query_foreign_access
+EXPORT_SYMBOL_GPL vmlinux 0xb4ea7cf7	kgdb_connected
+EXPORT_SYMBOL_GPL vmlinux 0xb51fbd64	edac_op_state
+EXPORT_SYMBOL_GPL vmlinux 0xb53ae573	cpu_idle_wait
+EXPORT_SYMBOL_GPL vmlinux 0xb58dcfa2	synchronize_sched_expedited
+EXPORT_SYMBOL_GPL vmlinux 0xb58e95a2	crypto_unregister_ahash
+EXPORT_SYMBOL_GPL vmlinux 0xb5a0275b	devres_release_group
+EXPORT_SYMBOL_GPL vmlinux 0xb5a6ebe2	wmi_remove_notify_handler
+EXPORT_SYMBOL_GPL vmlinux 0xb5f0a83f	rtnl_put_cacheinfo
+EXPORT_SYMBOL_GPL vmlinux 0xb60d65c4	inet_csk_clone
+EXPORT_SYMBOL_GPL vmlinux 0xb612444d	snmp_mib_init
+EXPORT_SYMBOL_GPL vmlinux 0xb615e6f2	platform_driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xb6230f1f	gnttab_grant_foreign_access
+EXPORT_SYMBOL_GPL vmlinux 0xb65091b3	selinux_secmark_refcount_dec
+EXPORT_SYMBOL_GPL vmlinux 0xb69c413d	ata_port_pbar_desc
+EXPORT_SYMBOL_GPL vmlinux 0xb6aeb661	ata_id_c_string
+EXPORT_SYMBOL_GPL vmlinux 0xb6ce6a94	ata_cable_80wire
+EXPORT_SYMBOL_GPL vmlinux 0xb6db2061	relay_buf_full
+EXPORT_SYMBOL_GPL vmlinux 0xb718f2f9	sfi_table_parse
+EXPORT_SYMBOL_GPL vmlinux 0xb744fa43	xfrm_ealg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0xb7d45a52	sdio_align_size
+EXPORT_SYMBOL_GPL vmlinux 0xb7d7c12e	hpet_set_alarm_time
+EXPORT_SYMBOL_GPL vmlinux 0xb7d97627	ring_buffer_iter_peek
+EXPORT_SYMBOL_GPL vmlinux 0xb7e2eb91	mce_cpu_specific_poll
+EXPORT_SYMBOL_GPL vmlinux 0xb7e36fec	raw_seq_next
+EXPORT_SYMBOL_GPL vmlinux 0xb7fdd0df	eventfd_ctx_put
+EXPORT_SYMBOL_GPL vmlinux 0xb8409063	pci_disable_sriov
+EXPORT_SYMBOL_GPL vmlinux 0xb87dd3df	kobject_create_and_add
+EXPORT_SYMBOL_GPL vmlinux 0xb903674c	scatterwalk_map_and_copy
+EXPORT_SYMBOL_GPL vmlinux 0xb92d5c88	driver_add_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xb94db510	register_jprobe
+EXPORT_SYMBOL_GPL vmlinux 0xb963bdc5	disk_part_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0xb9722eb2	unregister_pernet_gen_device
+EXPORT_SYMBOL_GPL vmlinux 0xb97f3a65	cpufreq_freq_attr_scaling_available_freqs
+EXPORT_SYMBOL_GPL vmlinux 0xb97f7471	sdio_writesb
+EXPORT_SYMBOL_GPL vmlinux 0xb99d5837	xenbus_read
+EXPORT_SYMBOL_GPL vmlinux 0xb9e3d1e4	dm_rh_recovery_end
+EXPORT_SYMBOL_GPL vmlinux 0xb9eb3aa9	add_uevent_var
+EXPORT_SYMBOL_GPL vmlinux 0xba2ea519	driver_attach
+EXPORT_SYMBOL_GPL vmlinux 0xba51780a	ata_sff_qc_fill_rtf
+EXPORT_SYMBOL_GPL vmlinux 0xba677f43	ata_std_prereset
+EXPORT_SYMBOL_GPL vmlinux 0xba7e5534	usb_hcd_resume_root_hub
+EXPORT_SYMBOL_GPL vmlinux 0xba8979e4	class_compat_register
+EXPORT_SYMBOL_GPL vmlinux 0xbae34c27	scsi_nl_remove_transport
+EXPORT_SYMBOL_GPL vmlinux 0xbaf2eac1	xfrm_audit_state_icvfail
+EXPORT_SYMBOL_GPL vmlinux 0xbb081a9b	ata_bmdma_status
+EXPORT_SYMBOL_GPL vmlinux 0xbb08208f	nf_unregister_afinfo
+EXPORT_SYMBOL_GPL vmlinux 0xbb13fb01	dm_rh_region_context
+EXPORT_SYMBOL_GPL vmlinux 0xbb2de8ad	ata_sff_data_xfer_noirq
+EXPORT_SYMBOL_GPL vmlinux 0xbb3507a9	xenbus_frontend_closed
+EXPORT_SYMBOL_GPL vmlinux 0xbb4a1408	klist_init
+EXPORT_SYMBOL_GPL vmlinux 0xbb802181	kobject_init_and_add
+EXPORT_SYMBOL_GPL vmlinux 0xbba00578	sysdev_show_ulong
+EXPORT_SYMBOL_GPL vmlinux 0xbbacc529	uart_console_write
+EXPORT_SYMBOL_GPL vmlinux 0xbbb98859	edid_info
+EXPORT_SYMBOL_GPL vmlinux 0xbbcc8be3	spi_register_master
+EXPORT_SYMBOL_GPL vmlinux 0xbc4161f1	__inet_hash_nolisten
+EXPORT_SYMBOL_GPL vmlinux 0xbccf6a45	platform_device_put
+EXPORT_SYMBOL_GPL vmlinux 0xbcd068fd	pcie_port_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0xbd37d077	regulator_bulk_free
+EXPORT_SYMBOL_GPL vmlinux 0xbd506a46	unregister_hotplug_dock_device
+EXPORT_SYMBOL_GPL vmlinux 0xbdc5a167	skb_pull_rcsum
+EXPORT_SYMBOL_GPL vmlinux 0xbdd295f0	trace_vprintk
+EXPORT_SYMBOL_GPL vmlinux 0xbdf25b2c	crypto_mod_get
+EXPORT_SYMBOL_GPL vmlinux 0xbe100fb8	ring_buffer_lock_reserve
+EXPORT_SYMBOL_GPL vmlinux 0xbe116723	do_posix_clock_nosettime
+EXPORT_SYMBOL_GPL vmlinux 0xbe1887e4	ata_unpack_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0xbe35a192	dm_rh_get_region_size
+EXPORT_SYMBOL_GPL vmlinux 0xbe6b92d9	ata_port_desc
+EXPORT_SYMBOL_GPL vmlinux 0xbe72f5f0	seq_open_net
+EXPORT_SYMBOL_GPL vmlinux 0xbeb4cb93	bus_for_each_drv
+EXPORT_SYMBOL_GPL vmlinux 0xbeb5bb6f	srcu_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0xbeda71b4	crypto_alloc_instance
+EXPORT_SYMBOL_GPL vmlinux 0xbefe5188	__mnt_is_readonly
+EXPORT_SYMBOL_GPL vmlinux 0xbf03f599	ata_sff_check_status
+EXPORT_SYMBOL_GPL vmlinux 0xbf58947a	ata_sas_queuecmd
+EXPORT_SYMBOL_GPL vmlinux 0xbf63e1c3	blk_abort_request
+EXPORT_SYMBOL_GPL vmlinux 0xbf74eb20	probe_kernel_write
+EXPORT_SYMBOL_GPL vmlinux 0xbf9805f5	task_current_syscall
+EXPORT_SYMBOL_GPL vmlinux 0xbfd94bb0	bind_virq_to_irqhandler
+EXPORT_SYMBOL_GPL vmlinux 0xbfe1e585	usb_get_intf
+EXPORT_SYMBOL_GPL vmlinux 0xbffde8ec	compat_alloc_user_space
+EXPORT_SYMBOL_GPL vmlinux 0xc00f413d	driver_register
+EXPORT_SYMBOL_GPL vmlinux 0xc0a2adeb	ring_buffer_read_finish
+EXPORT_SYMBOL_GPL vmlinux 0xc0cee202	rtnl_link_register
+EXPORT_SYMBOL_GPL vmlinux 0xc0de0438	sata_sff_hardreset
+EXPORT_SYMBOL_GPL vmlinux 0xc11f1495	ata_sas_scsi_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xc126e890	klist_del
+EXPORT_SYMBOL_GPL vmlinux 0xc12f7e0d	trace_profile_buf_nmi
+EXPORT_SYMBOL_GPL vmlinux 0xc17515d7	usb_hcds_loaded
+EXPORT_SYMBOL_GPL vmlinux 0xc179f4d2	usb_put_intf
+EXPORT_SYMBOL_GPL vmlinux 0xc1ce8e09	ata_eh_freeze_port
+EXPORT_SYMBOL_GPL vmlinux 0xc1fe3c6d	usb_debug_root
+EXPORT_SYMBOL_GPL vmlinux 0xc21472c5	ata_acpi_gtm
+EXPORT_SYMBOL_GPL vmlinux 0xc22a3091	vm_unmap_aliases
+EXPORT_SYMBOL_GPL vmlinux 0xc22d2e70	ahash_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0xc2399354	ip_build_and_send_pkt
+EXPORT_SYMBOL_GPL vmlinux 0xc254b983	usb_hcd_check_unlink_urb
+EXPORT_SYMBOL_GPL vmlinux 0xc26351f8	bind_evtchn_to_irq
+EXPORT_SYMBOL_GPL vmlinux 0xc272284b	skcipher_geniv_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xc27b5c5d	pci_cleanup_aer_uncorrect_error_status
+EXPORT_SYMBOL_GPL vmlinux 0xc2b91f9b	dm_kill_unmapped_request
+EXPORT_SYMBOL_GPL vmlinux 0xc2f47947	ata_link_offline
+EXPORT_SYMBOL_GPL vmlinux 0xc3301f02	rcu_expedited_torture_stats
+EXPORT_SYMBOL_GPL vmlinux 0xc34c57f9	regulator_is_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xc34c7c07	zap_vma_ptes
+EXPORT_SYMBOL_GPL vmlinux 0xc34efe27	snmp_fold_field
+EXPORT_SYMBOL_GPL vmlinux 0xc399468f	scsi_nl_remove_driver
+EXPORT_SYMBOL_GPL vmlinux 0xc3ba77b9	sysfs_remove_link
+EXPORT_SYMBOL_GPL vmlinux 0xc4034caa	enable_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0xc428068d	sata_deb_timing_long
+EXPORT_SYMBOL_GPL vmlinux 0xc42f2f94	xenbus_read_driver_state
+EXPORT_SYMBOL_GPL vmlinux 0xc45431bd	debugfs_create_x16
+EXPORT_SYMBOL_GPL vmlinux 0xc48b7ccf	ata_mode_string
+EXPORT_SYMBOL_GPL vmlinux 0xc4b33aa6	tracepoint_probe_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xc4ce6189	idle_notifier_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xc4f3da06	srcu_batches_completed
+EXPORT_SYMBOL_GPL vmlinux 0xc5036f70	__hvc_resize
+EXPORT_SYMBOL_GPL vmlinux 0xc512626a	__supported_pte_mask
+EXPORT_SYMBOL_GPL vmlinux 0xc5397da6	xenbus_mkdir
+EXPORT_SYMBOL_GPL vmlinux 0xc5461004	regulator_get
+EXPORT_SYMBOL_GPL vmlinux 0xc60f75ec	__ftrace_vprintk
+EXPORT_SYMBOL_GPL vmlinux 0xc6252011	driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xc6692f96	ata_eh_qc_retry
+EXPORT_SYMBOL_GPL vmlinux 0xc6724081	kobject_rename
+EXPORT_SYMBOL_GPL vmlinux 0xc673e23e	ata_scsi_change_queue_depth
+EXPORT_SYMBOL_GPL vmlinux 0xc6779eb8	pci_restore_msi_state
+EXPORT_SYMBOL_GPL vmlinux 0xc6899714	ata_sas_slave_configure
+EXPORT_SYMBOL_GPL vmlinux 0xc6906117	dequeue_signal
+EXPORT_SYMBOL_GPL vmlinux 0xc6c79870	unregister_pernet_gen_subsys
+EXPORT_SYMBOL_GPL vmlinux 0xc705d7e9	ata_link_online
+EXPORT_SYMBOL_GPL vmlinux 0xc727ebe8	i2c_new_dummy
+EXPORT_SYMBOL_GPL vmlinux 0xc73d46d5	cpufreq_driver_target
+EXPORT_SYMBOL_GPL vmlinux 0xc7842b70	ata_sff_dev_classify
+EXPORT_SYMBOL_GPL vmlinux 0xc78984e3	attribute_container_register
+EXPORT_SYMBOL_GPL vmlinux 0xc7cc5fbc	crypto_ahash_digest
+EXPORT_SYMBOL_GPL vmlinux 0xc7ec11f6	atomic_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xc82b6fb6	register_pernet_gen_subsys
+EXPORT_SYMBOL_GPL vmlinux 0xc862c0b7	user_instantiate
+EXPORT_SYMBOL_GPL vmlinux 0xc87c1f84	ktime_get
+EXPORT_SYMBOL_GPL vmlinux 0xc87e487a	sched_clock_idle_sleep_event
+EXPORT_SYMBOL_GPL vmlinux 0xc8af0121	user_read
+EXPORT_SYMBOL_GPL vmlinux 0xc8c783de	tcp_reno_cong_avoid
+EXPORT_SYMBOL_GPL vmlinux 0xc8deced8	pci_hp_remove_module_link
+EXPORT_SYMBOL_GPL vmlinux 0xc926a1ed	xfrm_audit_policy_add
+EXPORT_SYMBOL_GPL vmlinux 0xc9561772	fb_destroy_modelist
+EXPORT_SYMBOL_GPL vmlinux 0xc9b84e5f	ata_host_alloc_pinfo
+EXPORT_SYMBOL_GPL vmlinux 0xc9d4d6d1	wmi_has_guid
+EXPORT_SYMBOL_GPL vmlinux 0xc9ec4e21	free_percpu
+EXPORT_SYMBOL_GPL vmlinux 0xca012503	cpufreq_unregister_governor
+EXPORT_SYMBOL_GPL vmlinux 0xca01f51c	tcp_orphan_count
+EXPORT_SYMBOL_GPL vmlinux 0xca0701e4	devres_remove_group
+EXPORT_SYMBOL_GPL vmlinux 0xca10a64d	anon_inode_getfd
+EXPORT_SYMBOL_GPL vmlinux 0xca295f03	led_trigger_event
+EXPORT_SYMBOL_GPL vmlinux 0xca3547b5	pciserial_suspend_ports
+EXPORT_SYMBOL_GPL vmlinux 0xca81ea9a	xenbus_transaction_end
+EXPORT_SYMBOL_GPL vmlinux 0xca85d8cf	tracepoint_probe_update_all
+EXPORT_SYMBOL_GPL vmlinux 0xcabe04de	cpuidle_resume_and_unlock
+EXPORT_SYMBOL_GPL vmlinux 0xcafd09ce	fib_rules_cleanup_ops
+EXPORT_SYMBOL_GPL vmlinux 0xcb496241	usb_buffer_free
+EXPORT_SYMBOL_GPL vmlinux 0xcb58fd7d	sdio_writew
+EXPORT_SYMBOL_GPL vmlinux 0xcb9a4b78	usb_get_current_frame_number
+EXPORT_SYMBOL_GPL vmlinux 0xcbd080af	rtc_read_alarm
+EXPORT_SYMBOL_GPL vmlinux 0xcbf202df	driver_for_each_device
+EXPORT_SYMBOL_GPL vmlinux 0xcc15647b	xenbus_unmap_ring
+EXPORT_SYMBOL_GPL vmlinux 0xcc1aa1db	anon_inode_getfile
+EXPORT_SYMBOL_GPL vmlinux 0xcc1f1c3d	inet_twdr_hangman
+EXPORT_SYMBOL_GPL vmlinux 0xcc390398	xfrm_audit_state_delete
+EXPORT_SYMBOL_GPL vmlinux 0xcc3c0add	acpi_smbus_unregister_callback
+EXPORT_SYMBOL_GPL vmlinux 0xcc6ab305	is_dock_device
+EXPORT_SYMBOL_GPL vmlinux 0xcc7330a5	pm_request_resume
+EXPORT_SYMBOL_GPL vmlinux 0xcccfb2fa	sata_deb_timing_hotplug
+EXPORT_SYMBOL_GPL vmlinux 0xcd0a23d6	crypto_alloc_ablkcipher
+EXPORT_SYMBOL_GPL vmlinux 0xcd0ecf71	raw_unhash_sk
+EXPORT_SYMBOL_GPL vmlinux 0xcd1ca2cb	iommu_domain_has_cap
+EXPORT_SYMBOL_GPL vmlinux 0xcd282a2e	inotify_find_watch
+EXPORT_SYMBOL_GPL vmlinux 0xcd49ee65	inotify_init
+EXPORT_SYMBOL_GPL vmlinux 0xcda94e9b	ata_bmdma_start
+EXPORT_SYMBOL_GPL vmlinux 0xcdbf3614	ata_dev_pair
+EXPORT_SYMBOL_GPL vmlinux 0xcdca3691	nr_irqs
+EXPORT_SYMBOL_GPL vmlinux 0xcdd79cab	bus_for_each_dev
+EXPORT_SYMBOL_GPL vmlinux 0xcdeaafe9	clockevent_delta2ns
+EXPORT_SYMBOL_GPL vmlinux 0xce34fd32	devm_kzalloc
+EXPORT_SYMBOL_GPL vmlinux 0xce3c3cf4	regulator_list_voltage
+EXPORT_SYMBOL_GPL vmlinux 0xce4cb094	sdio_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0xce898156	ata_pci_device_do_resume
+EXPORT_SYMBOL_GPL vmlinux 0xcebeb5d2	ata_sff_dev_select
+EXPORT_SYMBOL_GPL vmlinux 0xcecdeb58	regulator_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xcf67040c	filter_match_preds
+EXPORT_SYMBOL_GPL vmlinux 0xcf7a962e	cn_add_callback
+EXPORT_SYMBOL_GPL vmlinux 0xcf8af983	trace_profile_buf
+EXPORT_SYMBOL_GPL vmlinux 0xcf8c60e9	usb_sg_cancel
+EXPORT_SYMBOL_GPL vmlinux 0xcf8e686e	inotify_find_update_watch
+EXPORT_SYMBOL_GPL vmlinux 0xcfbaddc4	input_class
+EXPORT_SYMBOL_GPL vmlinux 0xcfbb62a7	__blkdev_driver_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xcfc68341	synchronize_rcu_bh
+EXPORT_SYMBOL_GPL vmlinux 0xcfcc83ad	register_vt_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xcfd8b1fa	usb_lock_device_for_reset
+EXPORT_SYMBOL_GPL vmlinux 0xcffa2aff	spi_populate_width_msg
+EXPORT_SYMBOL_GPL vmlinux 0xd03c7700	secure_ipv4_port_ephemeral
+EXPORT_SYMBOL_GPL vmlinux 0xd03fdcc0	hrtimer_start
+EXPORT_SYMBOL_GPL vmlinux 0xd054873c	crypto_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0xd0989489	agp_add_bridge
+EXPORT_SYMBOL_GPL vmlinux 0xd0b73b98	dm_device_name
+EXPORT_SYMBOL_GPL vmlinux 0xd0c05159	emergency_restart
+EXPORT_SYMBOL_GPL vmlinux 0xd0f85d32	mm_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xd121f820	ata_eh_thaw_port
+EXPORT_SYMBOL_GPL vmlinux 0xd134fd42	get_driver
+EXPORT_SYMBOL_GPL vmlinux 0xd142ab42	dm_rh_recovery_start
+EXPORT_SYMBOL_GPL vmlinux 0xd154f359	__crypto_alloc_tfm
+EXPORT_SYMBOL_GPL vmlinux 0xd16712f3	crypto_check_attr_type
+EXPORT_SYMBOL_GPL vmlinux 0xd17a06cf	crypto_shash_final
+EXPORT_SYMBOL_GPL vmlinux 0xd1f6bc2c	dm_region_hash_create
+EXPORT_SYMBOL_GPL vmlinux 0xd273b1b1	__round_jiffies_up_relative
+EXPORT_SYMBOL_GPL vmlinux 0xd2a8caf0	work_on_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xd2b590a4	blk_rq_check_limits
+EXPORT_SYMBOL_GPL vmlinux 0xd2d0b82f	dm_rh_bio_to_region
+EXPORT_SYMBOL_GPL vmlinux 0xd36150ff	fuse_conn_put
+EXPORT_SYMBOL_GPL vmlinux 0xd3813bac	unregister_pernet_device
+EXPORT_SYMBOL_GPL vmlinux 0xd3cc2924	xenbus_dev_changed
+EXPORT_SYMBOL_GPL vmlinux 0xd3e7e3d2	ata_sas_port_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xd40524be	pm_schedule_suspend
+EXPORT_SYMBOL_GPL vmlinux 0xd465051a	vfs_getxattr
+EXPORT_SYMBOL_GPL vmlinux 0xd46709d7	usb_get_dev
+EXPORT_SYMBOL_GPL vmlinux 0xd46f3e8d	crypto_unregister_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0xd495bcc3	inotify_inode_is_dead
+EXPORT_SYMBOL_GPL vmlinux 0xd4b0063f	ring_buffer_entries_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xd4b61058	ata_port_probe
+EXPORT_SYMBOL_GPL vmlinux 0xd4d9b092	regulator_register
+EXPORT_SYMBOL_GPL vmlinux 0xd4dd083c	crypto_mod_put
+EXPORT_SYMBOL_GPL vmlinux 0xd5072980	fuse_dev_release
+EXPORT_SYMBOL_GPL vmlinux 0xd585c6f0	blk_queue_dma_drain
+EXPORT_SYMBOL_GPL vmlinux 0xd5c8ad5f	class_compat_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xd5ff0c51	crypto_register_template
+EXPORT_SYMBOL_GPL vmlinux 0xd5ff0d3b	usb_hcd_giveback_urb
+EXPORT_SYMBOL_GPL vmlinux 0xd62b6993	init_user_ns
+EXPORT_SYMBOL_GPL vmlinux 0xd63117ac	usb_reset_endpoint
+EXPORT_SYMBOL_GPL vmlinux 0xd63501cf	tty_ldisc_ref_wait
+EXPORT_SYMBOL_GPL vmlinux 0xd64ae663	inet6_destroy_sock
+EXPORT_SYMBOL_GPL vmlinux 0xd6a8dd46	platform_device_add_resources
+EXPORT_SYMBOL_GPL vmlinux 0xd6feefa5	agp_num_entries
+EXPORT_SYMBOL_GPL vmlinux 0xd705b4c7	schedule_hrtimeout
+EXPORT_SYMBOL_GPL vmlinux 0xd70ba857	debugfs_remove_recursive
+EXPORT_SYMBOL_GPL vmlinux 0xd70e5875	tracepoint_iter_stop
+EXPORT_SYMBOL_GPL vmlinux 0xd73819d7	get_user_pages_fast
+EXPORT_SYMBOL_GPL vmlinux 0xd73ef534	sysdev_resume
+EXPORT_SYMBOL_GPL vmlinux 0xd7667411	ata_sff_port_start
+EXPORT_SYMBOL_GPL vmlinux 0xd768e985	regulator_has_full_constraints
+EXPORT_SYMBOL_GPL vmlinux 0xd7c1e913	cpuidle_disable_device
+EXPORT_SYMBOL_GPL vmlinux 0xd7d79132	put_online_cpus
+EXPORT_SYMBOL_GPL vmlinux 0xd8279c99	ata_eh_qc_complete
+EXPORT_SYMBOL_GPL vmlinux 0xd883c186	invalidate_inode_pages2
+EXPORT_SYMBOL_GPL vmlinux 0xd9042fa8	scatterwalk_map
+EXPORT_SYMBOL_GPL vmlinux 0xd926826b	srcu_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xd92fbcd4	led_trigger_set
+EXPORT_SYMBOL_GPL vmlinux 0xd95d2c8c	usb_mon_register
+EXPORT_SYMBOL_GPL vmlinux 0xd9708a1e	xfrm_output
+EXPORT_SYMBOL_GPL vmlinux 0xda1be8e1	async_synchronize_cookie_domain
+EXPORT_SYMBOL_GPL vmlinux 0xda2511dc	__ring_buffer_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xda29f8b0	wmi_set_block
+EXPORT_SYMBOL_GPL vmlinux 0xda3bdd9c	sysdev_store_int
+EXPORT_SYMBOL_GPL vmlinux 0xda68eb28	sata_pmp_qc_defer_cmd_switch
+EXPORT_SYMBOL_GPL vmlinux 0xdaa9f73d	pciserial_resume_ports
+EXPORT_SYMBOL_GPL vmlinux 0xdab9c602	sock_prot_inuse_get
+EXPORT_SYMBOL_GPL vmlinux 0xdaf4dfb3	fb_mode_option
+EXPORT_SYMBOL_GPL vmlinux 0xdb274e52	monotonic_to_bootbased
+EXPORT_SYMBOL_GPL vmlinux 0xdb45fd36	inotify_rm_watch
+EXPORT_SYMBOL_GPL vmlinux 0xdba64f1c	eventfd_ctx_get
+EXPORT_SYMBOL_GPL vmlinux 0xdbd0dece	pci_block_user_cfg_access
+EXPORT_SYMBOL_GPL vmlinux 0xdbd848ed	spi_get_device_id
+EXPORT_SYMBOL_GPL vmlinux 0xdbf2ee5f	gpio_export_link
+EXPORT_SYMBOL_GPL vmlinux 0xdc02f715	fuse_get_req
+EXPORT_SYMBOL_GPL vmlinux 0xdc0ead78	usb_driver_release_interface
+EXPORT_SYMBOL_GPL vmlinux 0xdc1f8f2e	register_timer_hook
+EXPORT_SYMBOL_GPL vmlinux 0xdc53b4c9	trace_define_field
+EXPORT_SYMBOL_GPL vmlinux 0xdc6daa07	pci_hp_change_slot_info
+EXPORT_SYMBOL_GPL vmlinux 0xdccf3450	xfrm_audit_state_notfound
+EXPORT_SYMBOL_GPL vmlinux 0xdd32ca3c	sata_set_spd
+EXPORT_SYMBOL_GPL vmlinux 0xdd94aa78	ring_buffer_iter_reset
+EXPORT_SYMBOL_GPL vmlinux 0xddc0db13	pci_find_ht_capability
+EXPORT_SYMBOL_GPL vmlinux 0xddeb987c	tracepoint_iter_reset
+EXPORT_SYMBOL_GPL vmlinux 0xddfac67a	crypto_unregister_alg
+EXPORT_SYMBOL_GPL vmlinux 0xde251fb8	dm_rh_recovery_prepare
+EXPORT_SYMBOL_GPL vmlinux 0xde417b81	async_schedule_domain
+EXPORT_SYMBOL_GPL vmlinux 0xde4c8375	usb_get_from_anchor
+EXPORT_SYMBOL_GPL vmlinux 0xde5c9c72	vfs_test_lock
+EXPORT_SYMBOL_GPL vmlinux 0xdeae85f2	skb_segment
+EXPORT_SYMBOL_GPL vmlinux 0xdeffdf21	bsg_unregister_queue
+EXPORT_SYMBOL_GPL vmlinux 0xdf0a9256	ata_link_next
+EXPORT_SYMBOL_GPL vmlinux 0xdf41c1ed	__mmdrop
+EXPORT_SYMBOL_GPL vmlinux 0xdf4ae6c4	ata_std_qc_defer
+EXPORT_SYMBOL_GPL vmlinux 0xdf630f87	ipv6_dup_options
+EXPORT_SYMBOL_GPL vmlinux 0xdf72b7e2	mnt_want_write
+EXPORT_SYMBOL_GPL vmlinux 0xdf9708f5	inet_csk_listen_stop
+EXPORT_SYMBOL_GPL vmlinux 0xdfe0497d	sdev_evt_send_simple
+EXPORT_SYMBOL_GPL vmlinux 0xdff399af	__cpufreq_driver_target
+EXPORT_SYMBOL_GPL vmlinux 0xe089cfcc	agp_memory_reserved
+EXPORT_SYMBOL_GPL vmlinux 0xe09ca53c	regulator_put
+EXPORT_SYMBOL_GPL vmlinux 0xe0c77bb5	mce_notify_irq
+EXPORT_SYMBOL_GPL vmlinux 0xe0cca33e	xfrm_aead_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0xe0d77134	dm_region_hash_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xe14c9fa3	security_inode_setattr
+EXPORT_SYMBOL_GPL vmlinux 0xe172219d	pm_runtime_suspend
+EXPORT_SYMBOL_GPL vmlinux 0xe1a15d2e	sata_scr_write_flush
+EXPORT_SYMBOL_GPL vmlinux 0xe1f3c3ff	single_release_net
+EXPORT_SYMBOL_GPL vmlinux 0xe2037042	rdev_get_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0xe215735f	swiotlb_map_page
+EXPORT_SYMBOL_GPL vmlinux 0xe2238cad	tcp_twsk_unique
+EXPORT_SYMBOL_GPL vmlinux 0xe22be551	tcp_done
+EXPORT_SYMBOL_GPL vmlinux 0xe247343b	hrtimer_get_remaining
+EXPORT_SYMBOL_GPL vmlinux 0xe28e64cd	sg_scsi_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xe295c0ff	is_hpet_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xe2ef9767	class_dev_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0xe34dce4d	sdio_claim_host
+EXPORT_SYMBOL_GPL vmlinux 0xe34f585e	apic
+EXPORT_SYMBOL_GPL vmlinux 0xe3e4c625	vfs_setxattr
+EXPORT_SYMBOL_GPL vmlinux 0xe405bca5	debugfs_create_u8
+EXPORT_SYMBOL_GPL vmlinux 0xe42b51ac	debugfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xe4428977	register_kprobes
+EXPORT_SYMBOL_GPL vmlinux 0xe49ff3b0	ata_wait_register
+EXPORT_SYMBOL_GPL vmlinux 0xe4c858c2	spi_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0xe502e3a3	queue_work
+EXPORT_SYMBOL_GPL vmlinux 0xe513afc0	cache_k8_northbridges
+EXPORT_SYMBOL_GPL vmlinux 0xe5209789	ata_bmdma_setup
+EXPORT_SYMBOL_GPL vmlinux 0xe52f05fb	input_ff_upload
+EXPORT_SYMBOL_GPL vmlinux 0xe530071c	pm_qos_remove_requirement
+EXPORT_SYMBOL_GPL vmlinux 0xe59c1a1b	swiotlb_unmap_page
+EXPORT_SYMBOL_GPL vmlinux 0xe5c523dd	user_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xe61a6d2f	gpio_unexport
+EXPORT_SYMBOL_GPL vmlinux 0xe630203b	device_schedule_callback_owner
+EXPORT_SYMBOL_GPL vmlinux 0xe6488b47	cpufreq_notify_transition
+EXPORT_SYMBOL_GPL vmlinux 0xe651f76e	selinux_is_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xe6e4df5e	ring_buffer_entries
+EXPORT_SYMBOL_GPL vmlinux 0xe6e8f340	device_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xe6f2317a	tracepoint_iter_start
+EXPORT_SYMBOL_GPL vmlinux 0xe74e9311	pm_runtime_barrier
+EXPORT_SYMBOL_GPL vmlinux 0xe777c840	dma_run_dependencies
+EXPORT_SYMBOL_GPL vmlinux 0xe78eb8dd	ata_sff_tf_load
+EXPORT_SYMBOL_GPL vmlinux 0xe7a29673	led_trigger_unregister_simple
+EXPORT_SYMBOL_GPL vmlinux 0xe7dca988	__add_pages
+EXPORT_SYMBOL_GPL vmlinux 0xe7f7b76c	regulator_bulk_disable
+EXPORT_SYMBOL_GPL vmlinux 0xe7ffe877	pcpu_base_addr
+EXPORT_SYMBOL_GPL vmlinux 0xe830b724	setup_irq
+EXPORT_SYMBOL_GPL vmlinux 0xe84cba6d	macvlan_handle_frame_hook
+EXPORT_SYMBOL_GPL vmlinux 0xe862c4b7	dpm_suspend_start
+EXPORT_SYMBOL_GPL vmlinux 0xe8b0ecb3	regulator_get_current_limit
+EXPORT_SYMBOL_GPL vmlinux 0xe8c8f5c4	blk_queue_rq_timed_out
+EXPORT_SYMBOL_GPL vmlinux 0xe901175f	__dev_addr_unsync
+EXPORT_SYMBOL_GPL vmlinux 0xe91c1021	scsi_target_unblock
+EXPORT_SYMBOL_GPL vmlinux 0xe93e49c3	devres_free
+EXPORT_SYMBOL_GPL vmlinux 0xe9425993	crypto_nivaead_type
+EXPORT_SYMBOL_GPL vmlinux 0xe9587909	usb_unregister_notify
+EXPORT_SYMBOL_GPL vmlinux 0xe9a59a87	hwmon_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xe9b2f5a4	platform_get_resource
+EXPORT_SYMBOL_GPL vmlinux 0xe9e988b0	regulator_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xe9fd8bc1	rt_mutex_lock_interruptible
+EXPORT_SYMBOL_GPL vmlinux 0xea065e01	task_handoff_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xea124bd1	gcd
+EXPORT_SYMBOL_GPL vmlinux 0xea418e0f	atapi_cmd_type
+EXPORT_SYMBOL_GPL vmlinux 0xea9e7583	__blk_end_request_err
+EXPORT_SYMBOL_GPL vmlinux 0xeae01e45	attribute_container_find_class_device
+EXPORT_SYMBOL_GPL vmlinux 0xeae74760	scsi_nl_send_transport_msg
+EXPORT_SYMBOL_GPL vmlinux 0xeae92c99	sysfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xeaffd7d5	pciserial_remove_ports
+EXPORT_SYMBOL_GPL vmlinux 0xeb01a647	sdio_claim_irq
+EXPORT_SYMBOL_GPL vmlinux 0xeb4030aa	cpci_hp_register_bus
+EXPORT_SYMBOL_GPL vmlinux 0xeb4c1fc8	__tracepoint_block_remap
+EXPORT_SYMBOL_GPL vmlinux 0xeb86ccad	generic_detach_inode
+EXPORT_SYMBOL_GPL vmlinux 0xeb8ea071	fb_deferred_io_open
+EXPORT_SYMBOL_GPL vmlinux 0xec0788e8	rtc_class_close
+EXPORT_SYMBOL_GPL vmlinux 0xec1a75a9	__dev_addr_sync
+EXPORT_SYMBOL_GPL vmlinux 0xec1b043e	regulator_suspend_prepare
+EXPORT_SYMBOL_GPL vmlinux 0xec54a891	ata_std_error_handler
+EXPORT_SYMBOL_GPL vmlinux 0xec6118d4	dm_rh_update_states
+EXPORT_SYMBOL_GPL vmlinux 0xec8114d4	ata_sas_port_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xec83e87f	virtio_check_driver_offered_feature
+EXPORT_SYMBOL_GPL vmlinux 0xeca40cb4	xenbus_free_evtchn
+EXPORT_SYMBOL_GPL vmlinux 0xeca63e71	get_task_mm
+EXPORT_SYMBOL_GPL vmlinux 0xeca68672	spi_unregister_master
+EXPORT_SYMBOL_GPL vmlinux 0xecaff739	remove_irq
+EXPORT_SYMBOL_GPL vmlinux 0xedbc6f67	gnttab_end_foreign_access
+EXPORT_SYMBOL_GPL vmlinux 0xede12d76	preempt_notifier_register
+EXPORT_SYMBOL_GPL vmlinux 0xee2b3ef3	nf_register_afinfo
+EXPORT_SYMBOL_GPL vmlinux 0xee454ebf	fib_rules_register
+EXPORT_SYMBOL_GPL vmlinux 0xee600034	ata_pio_queue_task
+EXPORT_SYMBOL_GPL vmlinux 0xee7ac1a1	crypto_aead_setauthsize
+EXPORT_SYMBOL_GPL vmlinux 0xef32fee0	mnt_want_write_file
+EXPORT_SYMBOL_GPL vmlinux 0xef3fbe92	sync_page_io
+EXPORT_SYMBOL_GPL vmlinux 0xef570c48	xenbus_unmap_ring_vfree
+EXPORT_SYMBOL_GPL vmlinux 0xef614503	crypto_ahash_finup
+EXPORT_SYMBOL_GPL vmlinux 0xef6c3f70	round_jiffies_up_relative
+EXPORT_SYMBOL_GPL vmlinux 0xefb7c31f	transport_destroy_device
+EXPORT_SYMBOL_GPL vmlinux 0xefc09d9d	disk_map_sector_rcu
+EXPORT_SYMBOL_GPL vmlinux 0xefdd5a63	ktime_get_ts
+EXPORT_SYMBOL_GPL vmlinux 0xeff65ca8	usb_reset_configuration
+EXPORT_SYMBOL_GPL vmlinux 0xf010680e	bus_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xf03eb97c	__pci_hp_register
+EXPORT_SYMBOL_GPL vmlinux 0xf0469f04	device_reprobe
+EXPORT_SYMBOL_GPL vmlinux 0xf0696401	acpi_pci_detect_ejectable
+EXPORT_SYMBOL_GPL vmlinux 0xf08ff5e1	register_net_sysctl_table
+EXPORT_SYMBOL_GPL vmlinux 0xf09b0350	dm_register_path_selector
+EXPORT_SYMBOL_GPL vmlinux 0xf0a52cc0	hwmon_device_register
+EXPORT_SYMBOL_GPL vmlinux 0xf0a6462c	usb_bus_list_lock
+EXPORT_SYMBOL_GPL vmlinux 0xf0da09f2	fs_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xf184d189	kernel_power_off
+EXPORT_SYMBOL_GPL vmlinux 0xf188419e	sysfs_create_link
+EXPORT_SYMBOL_GPL vmlinux 0xf1a7ff98	__inet_lookup_established
+EXPORT_SYMBOL_GPL vmlinux 0xf1a84ebb	dm_rh_dirty_log
+EXPORT_SYMBOL_GPL vmlinux 0xf1e86457	sdio_enable_func
+EXPORT_SYMBOL_GPL vmlinux 0xf25282f5	ring_buffer_record_enable
+EXPORT_SYMBOL_GPL vmlinux 0xf29b219e	securityfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xf29f34d1	crypto_shash_finup
+EXPORT_SYMBOL_GPL vmlinux 0xf2a4cba2	pci_find_next_ht_capability
+EXPORT_SYMBOL_GPL vmlinux 0xf2bc822e	bus_find_device_by_name
+EXPORT_SYMBOL_GPL vmlinux 0xf2c0535f	crypto_register_alg
+EXPORT_SYMBOL_GPL vmlinux 0xf2fca922	uart_parse_options
+EXPORT_SYMBOL_GPL vmlinux 0xf31f6128	spi_alloc_master
+EXPORT_SYMBOL_GPL vmlinux 0xf34806ec	hrtimer_get_res
+EXPORT_SYMBOL_GPL vmlinux 0xf3710565	handle_level_irq
+EXPORT_SYMBOL_GPL vmlinux 0xf37aa171	ring_buffer_reset_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xf39cae32	crypto_attr_alg2
+EXPORT_SYMBOL_GPL vmlinux 0xf3c1c0a0	leds_list_lock
+EXPORT_SYMBOL_GPL vmlinux 0xf3f3b12a	dm_requeue_unmapped_request
+EXPORT_SYMBOL_GPL vmlinux 0xf499fdb2	rcu_barrier_bh
+EXPORT_SYMBOL_GPL vmlinux 0xf4a8385f	iommu_domain_free
+EXPORT_SYMBOL_GPL vmlinux 0xf4c19c71	dev_attr_em_message
+EXPORT_SYMBOL_GPL vmlinux 0xf4cd81bc	relay_subbufs_consumed
+EXPORT_SYMBOL_GPL vmlinux 0xf5384ac1	__trace_printk
+EXPORT_SYMBOL_GPL vmlinux 0xf540b5aa	devres_remove
+EXPORT_SYMBOL_GPL vmlinux 0xf54bd49b	lcm
+EXPORT_SYMBOL_GPL vmlinux 0xf553318d	cpuidle_pause_and_lock
+EXPORT_SYMBOL_GPL vmlinux 0xf55fa8ce	ipv6_opt_accepted
+EXPORT_SYMBOL_GPL vmlinux 0xf5679a61	crypto_unregister_shash
+EXPORT_SYMBOL_GPL vmlinux 0xf5799f7a	stop_machine_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xf589b391	inet_twdr_twkill_work
+EXPORT_SYMBOL_GPL vmlinux 0xf5945bac	gnttab_free_grant_references
+EXPORT_SYMBOL_GPL vmlinux 0xf5a691cd	invalidate_bh_lrus
+EXPORT_SYMBOL_GPL vmlinux 0xf5b78ea7	platform_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0xf5c01ddf	driver_find_device
+EXPORT_SYMBOL_GPL vmlinux 0xf5c102e6	da903x_clr_bits
+EXPORT_SYMBOL_GPL vmlinux 0xf61e43bf	class_compat_remove_link
+EXPORT_SYMBOL_GPL vmlinux 0xf6319c33	init_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0xf645e2f9	posix_timer_event
+EXPORT_SYMBOL_GPL vmlinux 0xf6bcbd73	hwrng_register
+EXPORT_SYMBOL_GPL vmlinux 0xf6c5f396	class_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xf6e874f5	ata_timing_merge
+EXPORT_SYMBOL_GPL vmlinux 0xf7016530	xenbus_gather
+EXPORT_SYMBOL_GPL vmlinux 0xf7187a11	__pneigh_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xf71b2668	rtnl_kill_links
+EXPORT_SYMBOL_GPL vmlinux 0xf7394cda	ata_sff_dumb_qc_prep
+EXPORT_SYMBOL_GPL vmlinux 0xf74c18a5	ring_buffer_empty
+EXPORT_SYMBOL_GPL vmlinux 0xf759246e	i2c_add_numbered_adapter
+EXPORT_SYMBOL_GPL vmlinux 0xf79bc8ec	__root_device_register
+EXPORT_SYMBOL_GPL vmlinux 0xf7d4ef39	kobject_uevent
+EXPORT_SYMBOL_GPL vmlinux 0xf7edda61	vfs_setlease
+EXPORT_SYMBOL_GPL vmlinux 0xf7f05214	task_active_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0xf8802492	print_stack_trace
+EXPORT_SYMBOL_GPL vmlinux 0xf8f3a0fb	ata_ratelimit
+EXPORT_SYMBOL_GPL vmlinux 0xf90949e3	blk_trace_startstop
+EXPORT_SYMBOL_GPL vmlinux 0xf93c312b	usb_register_device_driver
+EXPORT_SYMBOL_GPL vmlinux 0xf97373cd	net_assign_generic
+EXPORT_SYMBOL_GPL vmlinux 0xf9765833	dmi_match
+EXPORT_SYMBOL_GPL vmlinux 0xf97666a0	set_memory_rw
+EXPORT_SYMBOL_GPL vmlinux 0xf986fd76	regulator_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xf9924426	arch_add_memory
+EXPORT_SYMBOL_GPL vmlinux 0xf9a054b5	__round_jiffies
+EXPORT_SYMBOL_GPL vmlinux 0xf9a8695a	rtc_update_irq_enable
+EXPORT_SYMBOL_GPL vmlinux 0xf9ca3160	ata_id_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0xf9eed2b0	i2c_new_device
+EXPORT_SYMBOL_GPL vmlinux 0xfa0c1c84	device_create_vargs
+EXPORT_SYMBOL_GPL vmlinux 0xfa1f4662	scatterwalk_start
+EXPORT_SYMBOL_GPL vmlinux 0xfa277270	scsi_register_device_handler
+EXPORT_SYMBOL_GPL vmlinux 0xfb68f479	__module_address
+EXPORT_SYMBOL_GPL vmlinux 0xfb7dc381	usb_set_device_state
+EXPORT_SYMBOL_GPL vmlinux 0xfb882fb7	wmi_query_block
+EXPORT_SYMBOL_GPL vmlinux 0xfb9044bc	pci_sriov_migration
+EXPORT_SYMBOL_GPL vmlinux 0xfb92923f	relay_close
+EXPORT_SYMBOL_GPL vmlinux 0xfbdb3859	regulator_get_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0xfbf9be5d	register_oom_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xfc2b6a9f	spi_add_device
+EXPORT_SYMBOL_GPL vmlinux 0xfc4c11dc	usb_get_descriptor
+EXPORT_SYMBOL_GPL vmlinux 0xfc7f723d	crypto_shash_update
+EXPORT_SYMBOL_GPL vmlinux 0xfcbec040	ata_pci_sff_init_one
+EXPORT_SYMBOL_GPL vmlinux 0xfcd65469	ata_timing_compute
+EXPORT_SYMBOL_GPL vmlinux 0xfd11d3d5	pci_ioremap_bar
+EXPORT_SYMBOL_GPL vmlinux 0xfd51b281	gnttab_end_foreign_access_ref
+EXPORT_SYMBOL_GPL vmlinux 0xfde0b92c	crypto_larval_error
+EXPORT_SYMBOL_GPL vmlinux 0xfdfeb462	cpci_hp_register_controller
+EXPORT_SYMBOL_GPL vmlinux 0xfe12ba8d	regulator_set_optimum_mode
+EXPORT_SYMBOL_GPL vmlinux 0xfe1fdcd3	relay_switch_subbuf
+EXPORT_SYMBOL_GPL vmlinux 0xfe727411	get_phys_to_machine
+EXPORT_SYMBOL_GPL vmlinux 0xfe72defe	rtc_class_open
+EXPORT_SYMBOL_GPL vmlinux 0xfe85b2e1	blk_lld_busy
+EXPORT_SYMBOL_GPL vmlinux 0xfe990052	gpio_free
+EXPORT_SYMBOL_GPL vmlinux 0xfea01b8a	inet_csk_search_req
+EXPORT_SYMBOL_GPL vmlinux 0xfed11ed1	usb_mon_deregister
+EXPORT_SYMBOL_GPL vmlinux 0xfed94c16	tcp_death_row
+EXPORT_SYMBOL_GPL vmlinux 0xfedb5327	devres_find
+EXPORT_SYMBOL_GPL vmlinux 0xfeef9f6f	bus_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xfefa2adb	input_ff_effect_from_user
+EXPORT_SYMBOL_GPL vmlinux 0xff15215d	ring_buffer_swap_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xff1ac935	pci_bus_max_busnr
+EXPORT_SYMBOL_GPL vmlinux 0xff48c4ac	fsstack_copy_inode_size
+EXPORT_SYMBOL_GPL vmlinux 0xff5a8cfe	cn_del_callback
+EXPORT_UNUSED_SYMBOL vmlinux 0x00000000	simple_prepare_write
--- linux-mvl-dove-2.6.32.orig/debian.master/abi/2.6.32-34.73/i386/386.modules
+++ linux-mvl-dove-2.6.32/debian.master/abi/2.6.32-34.73/i386/386.modules
@@ -0,0 +1,2799 @@
+3c359
+3c501
+3c503
+3c505
+3c507
+3c509
+3c515
+3c523
+3c527
+3c574_cs
+3c589_cs
+3c59x
+3w-9xxx
+3w-xxxx
+53c700
+6pack
+8021q
+8139cp
+8139too
+8250_accent
+8250_boca
+8250_exar_st16c554
+8250_fourport
+8250_hub6
+8250_mca
+8255
+82596
+8390
+8390p
+9p
+9pnet
+9pnet_rdma
+9pnet_virtio
+a100u2w
+a3d
+aacraid
+ab3100
+ab3100-core
+ab3100-otp
+abituguru
+abituguru3
+abyss
+ac3200
+ac97_bus
+acecad
+acenic
+acerhdf
+acer-wmi
+acl7225b
+acpi_pad
+acpiphp
+acpiphp_ibm
+acquirewdt
+act2000
+act200l-sir
+act_gact
+act_ipt
+actisys-sir
+act_mirred
+act_nat
+act_pedit
+act_police
+act_simple
+act_skbedit
+ad1848
+ad7414
+ad7418
+ad7877
+ad7879
+adcxx
+addi_apci_035
+addi_apci_1032
+addi_apci_1500
+addi_apci_1516
+addi_apci_1564
+addi_apci_16xx
+addi_apci_2016
+addi_apci_2032
+addi_apci_2200
+addi_apci_3001
+addi_apci_3120
+addi_apci_3501
+addi_apci_3xxx
+adfs
+adi
+adl_pci6208
+adl_pci7296
+adl_pci7432
+adl_pci8164
+adl_pci9111
+adl_pci9118
+adm1021
+adm1025
+adm1026
+adm1029
+adm1031
+adm8211
+adm9240
+adp5588-keys
+adq12b
+ads7828
+ads7846
+adt7462
+adt7470
+adt7473
+adt7475
+adutux
+adv7170
+adv7175
+advansys
+advantechwdt
+adv_pci1710
+adv_pci1723
+adv_pci_dio
+aedsp16
+aes_generic
+aes-i586
+af_802154
+af9013
+affs
+af_key
+af-rxrpc
+agpgart
+ah4
+ah6
+aha152x
+aha152x_cs
+aha1542
+aha1740
+ahci
+aic79xx
+aic7xxx
+aic94xx
+aio_aio12_8
+aio_iiro_16
+aiptek
+aircable
+airo
+airo_cs
+alauda
+ali-agp
+ali-ircc
+alim1535_wdt
+alim7101_wdt
+alphatrack
+altpciechdma
+ambassador
+amd64-agp
+amd76x_edac
+amd76xrom
+amd8111e
+amd-k7-agp
+amd-rng
+amplc_dio200
+amplc_pc236
+amplc_pc263
+amplc_pci224
+amplc_pci230
+analog
+ansi_cprng
+anubis
+aoe
+apm
+appledisplay
+applesmc
+appletalk
+appletouch
+applicom
+ar7part
+ar9170usb
+arc4
+arcfb
+arcmsr
+arcnet
+arc-rawmode
+arc-rimi
+ark3116
+arkfb
+arlan
+arptable_filter
+arp_tables
+arpt_mangle
+asb100
+asix
+asus_atk0110
+asus-laptop
+asus_oled
+async_memcpy
+async_pq
+async_raid6_recov
+async_tx
+async_xor
+at1700
+at24
+at25
+at76c50x-usb
+aten
+ath
+ath5k
+ath9k
+ati-agp
+ati_remote
+ati_remote2
+atl1
+atl1c
+atl1e
+atl2
+atlas_btns
+atm
+atmel
+atmel_cs
+atmel_pci
+atmtcp
+atp
+atp870u
+atxp1
+aty128fb
+atyfb
+au0828
+au8522
+aufs
+authenc
+auth_rpcgss
+autofs
+autofs4
+av5100
+avma1_cs
+avm_cs
+avmfritz
+ax25
+axnet_cs
+b1
+b1dma
+b1isa
+b1pci
+b1pcmcia
+b2c2-flexcop
+b2c2-flexcop-pci
+b2c2-flexcop-usb
+b3dfg
+b43
+b43legacy
+b44
+bas_gigaset
+baycom_epp
+baycom_par
+baycom_ser_fdx
+baycom_ser_hdx
+bcm203x
+bcm3510
+bcm5974
+be2iscsi
+be2net
+befs
+belkin_sa
+berry_charge
+bfa
+bfs
+bfusb
+binfmt_aout
+binfmt_misc
+bitblit
+block2mtd
+blowfish
+bluecard_cs
+bluetooth
+bnep
+bnx2
+bnx2i
+bnx2x
+bonding
+bpa10x
+bpck
+bpck6
+bpqether
+bq24022
+bq27x00_battery
+br2684
+bridge
+broadsheetfb
+bsd_comp
+bt3c_cs
+bt819
+bt856
+bt866
+bt878
+btcx-risc
+btmrvl
+btmrvl_sdio
+btrfs
+btsdio
+bttv
+btuart_cs
+btusb
+budget
+budget-av
+budget-ci
+budget-core
+budget-patch
+BusLogic
+bw-qcam
+c101
+c2port-duramar2150
+c4
+c67x00
+c6xdigio
+cachefiles
+cafe_ccic
+cafe_nand
+camellia
+can
+can-bcm
+can-dev
+can-raw
+capi
+capidrv
+capifs
+capmode
+carminefb
+cassini
+cast5
+cast6
+catc
+cb710
+cb710-mmc
+cb_das16_cs
+cb_pcidas
+cb_pcidas64
+cb_pcidda
+cb_pcidio
+cb_pcimdas
+cb_pcimdda
+cciss
+ccm
+cdc-acm
+cdc_eem
+cdc_ether
+cdc-phonet
+cdc_subset
+cdc-wdm
+cfag12864b
+cfag12864bfb
+cfg80211
+cfi_cmdset_0001
+cfi_cmdset_0002
+cfi_cmdset_0020
+cfi_probe
+cfi_util
+ch
+ch341
+ch7006
+chipreg
+cifs
+cirrusfb
+ck804xrom
+clip
+cls_basic
+cls_flow
+cls_fw
+cls_route
+cls_rsvp
+cls_rsvp6
+cls_tcindex
+cls_u32
+cm109
+cm4000_cs
+cm4040_cs
+cmtp
+cnic
+cobra
+coda
+com20020
+com20020_cs
+com20020-isa
+com20020-pci
+com90io
+com90xx
+comedi
+comedi_bond
+comedi_fc
+comedi_parport
+comedi_test
+comm
+compal-laptop
+configfs
+contec_pci_dio
+core
+coretemp
+cosa
+cp210x
+cpcihp_generic
+cpcihp_zt5550
+cpia
+cpia2
+cpia_pp
+cpia_usb
+cpqarray
+cpqphp
+cpu5wdt
+cpuid
+c-qcam
+cramfs
+cr_bllcd
+crc32c
+crc32c-intel
+crc7
+crc-ccitt
+crc-itu-t
+crvml
+cryptd
+cryptoloop
+crypto_null
+cs5345
+cs53l32a
+cs5535_gpio
+cs553x_nand
+cs89x0
+ct82c710
+ctr
+cts
+cuse
+cx18
+cx22700
+cx22702
+cx231xx
+cx231xx-alsa
+cx231xx-dvb
+cx2341x
+cx23885
+cx24110
+cx24113
+cx24116
+cx24123
+cx25821
+cx25821-alsa
+cx25840
+cx8800
+cx8802
+cx88-alsa
+cx88-blackbird
+cx88-dvb
+cx88-vp3054-i2c
+cx88xx
+cxacru
+cxgb
+cxgb3
+cxgb3i
+cyber2000fb
+cyberjack
+cyclades
+cyclomx
+cycx_drv
+cypress_cy7c63
+cypress_m8
+cytherm
+da9030_battery
+da9034-ts
+da903x
+da903x_bl
+dabusb
+DAC960
+daqboard2000
+das08
+das08_cs
+das16
+das16m1
+das1800
+das6402
+das800
+db9
+dc395x
+dca
+dccp
+dccp_diag
+dccp_ipv4
+dccp_ipv6
+dccp_probe
+dcdbas
+de2104x
+de4x5
+de600
+de620
+decnet
+deflate
+defxx
+dell-laptop
+dell-led
+dell_rbu
+dell-wmi
+depca
+des_generic
+dib0070
+dib3000mb
+dib3000mc
+dib7000m
+dib7000p
+dib8000
+dibx000_common
+digi_acceleport
+diskonchip
+display
+divacapi
+divadidd
+diva_idi
+diva_mnt
+divas
+dlci
+dlm
+dm1105
+dm9601
+dm-crypt
+dme1737
+dmfe
+dmm32at
+dm-queue-length
+dm-raid45
+dm-service-time
+dmx3191d
+dm-zero
+dnet
+dn_rtmsg
+doc2000
+doc2001
+doc2001plus
+docecc
+docprobe
+donauboe
+dpt_i2o
+drm
+drm_kms_helper
+ds1621
+ds1682
+ds2482
+ds2490
+ds2760_battery
+ds2782_battery
+dsbr100
+dscc4
+dss1_divert
+dst
+dst_ca
+dstr
+dt2801
+dt2811
+dt2814
+dt2815
+dt2817
+dt282x
+dt3000
+dt9812
+dtc
+dtl1_cs
+dtlk
+dummy
+dummy_hcd
+dv1394
+dvb-bt8xx
+dvb-core
+dvb-pll
+dvb-ttpci
+dvb-ttusb-budget
+dvb-usb
+dvb-usb-a800
+dvb-usb-af9005
+dvb-usb-af9005-remote
+dvb-usb-af9015
+dvb-usb-anysee
+dvb-usb-au6610
+dvb-usb-ce6230
+dvb-usb-cinergyT2
+dvb-usb-cxusb
+dvb-usb-dib0700
+dvb-usb-dibusb-common
+dvb-usb-dibusb-mb
+dvb-usb-dibusb-mc
+dvb-usb-digitv
+dvb-usb-dtt200u
+dvb-usb-dtv5100
+dvb-usb-dw2102
+dvb-usb-friio
+dvb-usb-gl861
+dvb-usb-gp8psk
+dvb-usb-m920x
+dvb-usb-nova-t-usb2
+dvb-usb-opera
+dvb-usb-ttusb2
+dvb-usb-umt-010
+dvb-usb-vp702x
+dvb-usb-vp7045
+e100
+e1000
+e1000e
+e2100
+e752x_edac
+e7xxx_edac
+earth-pt1
+eata
+ebt_802_3
+ebtable_broute
+ebtable_filter
+ebtable_nat
+ebtables
+ebt_among
+ebt_arp
+ebt_arpreply
+ebt_dnat
+ebt_ip
+ebt_ip6
+ebt_limit
+ebt_log
+ebt_mark
+ebt_mark_m
+ebt_nflog
+ebt_pkttype
+ebt_redirect
+ebt_snat
+ebt_stp
+ebt_ulog
+ebt_vlan
+echo
+econet
+edac_core
+edac_mce_amd
+eeepc-laptop
+eepro
+eeprom
+eeprom_93cx6
+eeti_ts
+eexpress
+efficeon-agp
+efs
+elo
+elsa_cs
+em28xx
+em28xx-alsa
+em28xx-dvb
+em_cmp
+emi26
+emi62
+em_meta
+em_nbyte
+empeg
+ems_pci
+ems_usb
+em_text
+emu10k1-gp
+em_u32
+enclosure
+eni
+enic
+epat
+epca
+epia
+epic100
+e_powersaver
+eql
+es3210
+esb2rom
+esi-sir
+esp4
+esp6
+et131x
+et61x251
+eth1394
+eth16i
+ethoc
+eurotechwdt
+evbug
+ewrk3
+exofs
+exportfs
+f71805f
+f71882fg
+f75375s
+fakephp
+farsync
+fat
+faulty
+fbcon
+fb_ddc
+fb_sys_fops
+fcoe
+fcrypt
+fd_mcs
+fdomain
+fdomain_cs
+fealnx
+ff-memless
+firedtv
+firestream
+firewire-core
+firewire-net
+firewire-ohci
+firewire-sbp2
+fit2
+fit3
+fl512
+floppy
+fm801-gp
+fmvj18x_cs
+fnic
+font
+forcedeth
+fore_200e
+freevxfs
+friq
+frpw
+fsam7400
+fscache
+fschmd
+ftdi-elan
+ftdi_sio
+ftl
+fujitsu-laptop
+fujitsu_ts
+funsoft
+g450_pll
+g760a
+gadgetfs
+gamecon
+gameport
+garmin_gps
+garp
+g_audio
+g_cdc
+gcm
+gdth
+generic
+generic_bl
+gen_probe
+geode-aes
+geode-rng
+g_ether
+gf128mul
+gf2k
+g_file_storage
+gfs2
+ghash-generic
+gigaset
+girbil-sir
+gl518sm
+gl520sm
+gl620a
+gluebi
+g_midi
+g_NCR5380
+g_NCR5380_mmio
+gpio-addr-flash
+gpio_keys
+gpio_mouse
+gpio_vbus
+g_printer
+grip
+grip_mp
+gsc_hpdi
+g_serial
+gspca_conex
+gspca_etoms
+gspca_finepix
+gspca_gl860
+gspca_jeilinj
+gspca_m5602
+gspca_main
+gspca_mars
+gspca_mr97310a
+gspca_ov519
+gspca_ov534
+gspca_pac207
+gspca_pac7311
+gspca_sn9c20x
+gspca_sonixb
+gspca_sonixj
+gspca_spca500
+gspca_spca501
+gspca_spca505
+gspca_spca506
+gspca_spca508
+gspca_spca561
+gspca_sq905
+gspca_sq905c
+gspca_stk014
+gspca_stv06xx
+gspca_sunplus
+gspca_t613
+gspca_tv8532
+gspca_vc032x
+gspca_zc3xx
+gtco
+guillemot
+gunze
+gx1fb
+gxfb
+g_zero
+hamachi
+hangcheck-timer
+hci_uart
+hci_vhci
+hdaps
+hdlc
+hdlc_cisco
+hdlcdrv
+hdlc_fr
+hdlc_ppp
+hdlc_raw
+hdlc_raw_eth
+hdlc_x25
+hdpvr
+he
+hecubafb
+hexium_gemini
+hexium_orion
+hfc4s8s_l1
+hfcmulti
+hfcpci
+hfcsusb
+hfc_usb
+hfs
+hfsplus
+hgafb
+hid
+hid-3m-pct
+hid-a4tech
+hid-apple
+hid-belkin
+hid-cherry
+hid-chicony
+hid-cypress
+hid-drff
+hid-ezkey
+hid-gaff
+hid-gyration
+hid-kensington
+hid-kye
+hid-logitech
+hid-microsoft
+hid-monterey
+hid-mosart
+hid-ntrig
+hid-ortek
+hidp
+hid-petalynx
+hid-pl
+hid-quanta
+hid-samsung
+hid-sjoy
+hid-sony
+hid-stantum
+hid-sunplus
+hid-tmff
+hid-topseed
+hid-twinhan
+hid-wacom
+hid-zpff
+hifn_795x
+hisax
+hisax_fcpcipnp
+hisax_isac
+hisax_st5481
+horizon
+hostap
+hostap_cs
+hostap_pci
+hostap_plx
+hostess_sv11
+hp
+hp100
+hp4x
+hp_accel
+hpfs
+hpilo
+hp-plus
+hptiop
+hp-wmi
+hso
+htc-pasic3
+htcpen
+hv_blkvsc
+hv_netvsc
+hv_storvsc
+hv_vmbus
+hwa-hc
+hwa-rc
+hwmon-vid
+hysdn
+i1480-dfu-usb
+i1480-est
+i1480u-wlp
+i2400m
+i2400m-sdio
+i2400m-usb
+i2c-algo-bit
+i2c-algo-pca
+i2c-algo-pcf
+i2c-ali1535
+i2c-ali1563
+i2c-ali15x3
+i2c-amd756
+i2c-amd756-s4882
+i2c-amd8111
+i2c-dev
+i2c-gpio
+i2c-i801
+i2c-isch
+i2c-matroxfb
+i2c-nforce2
+i2c-nforce2-s4985
+i2c-ocores
+i2c-parport
+i2c-parport-light
+i2c-pca-isa
+i2c-pca-platform
+i2c-piix4
+i2c-scmi
+i2c-simtec
+i2c-sis5595
+i2c-sis630
+i2c-sis96x
+i2c-stub
+i2c-taos-evm
+i2c-tiny-usb
+i2c-via
+i2c-viapro
+i2c-voodoo3
+i2o_block
+i2o_bus
+i2o_config
+i2o_core
+i2o_proc
+i2o_scsi
+i3000_edac
+i3200_edac
+i5000_edac
+i5100_edac
+i5400_edac
+i5k_amb
+i6300esb
+i810
+i810fb
+i82092
+i82365
+i82860_edac
+i82875p_edac
+i82975x_edac
+i830
+i8k
+i915
+ib700wdt
+ib_addr
+ib_cm
+ib_core
+ib_ipoib
+ib_iser
+ib_mad
+ibmaem
+ibmasm
+ibmasr
+ibmcam
+ibmlana
+ibmmca
+ibmpex
+ibmphp
+ib_mthca
+ibmtr
+ibmtr_cs
+ib_sa
+ib_srp
+ib_ucm
+ib_umad
+ib_uverbs
+ichxrom
+icn
+icp_multi
+ics932s401
+idmouse
+idt77252
+ieee1394
+ifb
+iforce
+igb
+igbvf
+ii_pci20kc
+ili9320
+imm
+in2000
+industrialio
+inexio
+inftl
+initio
+inport
+input-polldev
+int51x1
+intel-agp
+intel_menlow
+intel-rng
+intel_vr_nor
+interact
+ioatdma
+ioc4
+io_edgeport
+io_ti
+iowarrior
+ip2
+ip6_queue
+ip6table_filter
+ip6table_mangle
+ip6table_raw
+ip6_tables
+ip6table_security
+ip6t_ah
+ip6t_eui64
+ip6t_frag
+ip6t_hbh
+ip6t_ipv6header
+ip6t_LOG
+ip6t_mh
+ip6t_REJECT
+ip6t_rt
+ip6_tunnel
+ipaq
+ipcomp
+ipcomp6
+ipddp
+ipg
+ip_gre
+iphase
+ipip
+ipmi_devintf
+ipmi_msghandler
+ipmi_poweroff
+ipmi_si
+ipmi_watchdog
+ip_queue
+ipr
+ips
+iptable_filter
+iptable_mangle
+iptable_nat
+iptable_raw
+ip_tables
+iptable_security
+ipt_addrtype
+ipt_ah
+ipt_CLUSTERIP
+ipt_ecn
+ipt_ECN
+ipt_LOG
+ipt_MASQUERADE
+ipt_NETMAP
+ipt_REDIRECT
+ipt_REJECT
+ipt_ULOG
+ip_vs
+ip_vs_dh
+ip_vs_ftp
+ip_vs_lblc
+ip_vs_lblcr
+ip_vs_lc
+ip_vs_nq
+ip_vs_rr
+ip_vs_sed
+ip_vs_sh
+ip_vs_wlc
+ip_vs_wrr
+ipw
+ipw2100
+ipw2200
+ipwireless
+ipx
+ircomm
+ir-common
+ircomm-tty
+irda
+irda-usb
+ir-kbd-i2c
+irlan
+irnet
+irtty-sir
+ir-usb
+iscsi_ibft
+iscsi_tcp
+iscsi_trgt
+isdn
+isdn_bsdcomp
+isdnhdlc
+isight_firmware
+isl29003
+isl6405
+isl6421
+isl6423
+isofs
+isp116x-hcd
+isp1362-hcd
+isp1760
+istallion
+it87
+it8712f_wdt
+it87_wdt
+iTCO_vendor_support
+iTCO_wdt
+itd1000
+iuu_phoenix
+ivtv
+ivtvfb
+iw_c2
+iw_cm
+iw_cxgb3
+iwl3945
+iwlagn
+iwlcore
+iwmc3200wifi
+ixgb
+ixgbe
+ixj
+ixj_pcmcia
+jedec_probe
+jffs2
+jfs
+jmb38x_ms
+jme
+joydev
+joydump
+jr3_pci
+jsm
+k8temp
+kafs
+kahlua
+kaweth
+kb3886_bl
+kbic
+kbtab
+kcomedilib
+ke_counter
+kernelcapi
+keyspan
+keyspan_pda
+keyspan_remote
+khazad
+kingsun-sir
+kl5kusb105
+kobil_sct
+konicawc
+ks0108
+ks0127
+ks8842
+ks8851
+ks8851_mll
+ks959-sir
+ksdazzle-sir
+ktti
+kvaser_pci
+kvm
+kvm-amd
+kvm-intel
+kxsd9
+kyrofb
+l1oip
+l2cap
+l440gx
+l64781
+lanai
+lance
+lanstreamer
+lapb
+lapbether
+lcd
+ldusb
+lec
+led-class
+leds-alix2
+leds-bd2802
+leds-da903x
+leds-dac124s085
+leds-gpio
+leds-lp3944
+leds-net48xx
+leds-pca9532
+leds-pca955x
+leds-wm831x-status
+leds-wm8350
+leds-wrap
+ledtrig-backlight
+ledtrig-default-on
+ledtrig-gpio
+ledtrig-heartbeat
+ledtrig-timer
+legousbtower
+lgdt3305
+lgdt330x
+lgs8gxx
+lib80211
+lib80211_crypt_ccmp
+lib80211_crypt_tkip
+lib80211_crypt_wep
+libcrc32c
+libertas
+libertas_cs
+libertas_sdio
+libertas_spi
+libertas_tf
+libertas_tf_usb
+libfc
+libfcoe
+libipw
+libiscsi
+libiscsi_tcp
+libosd
+libsas
+libsrp
+lightning
+line6usb
+linear
+lirc_atiusb
+lirc_bt829
+lirc_dev
+lirc_ene0100
+lirc_i2c
+lirc_igorplugusb
+lirc_imon
+lirc_it87
+lirc_ite8709
+lirc_mceusb
+lirc_sasem
+lirc_serial
+lirc_sir
+lirc_streamzap
+lirc_ttusbir
+lis3l02dq
+lis3lv02d
+litelink-sir
+lkkbd
+llc2
+lm63
+lm70
+lm75
+lm77
+lm78
+lm80
+lm83
+lm8323
+lm85
+lm87
+lm90
+lm92
+lm93
+lm95241
+lmc
+lms283gf05
+lnbp21
+lne390
+lockd
+logibm
+lp
+lp3971
+lp486e
+lpddr_cmds
+lpfc
+lrw
+ltc4215
+ltc4245
+ltpc
+ltv350qv
+lxfb
+lzo
+lzo_compress
+lzo_decompress
+m25p80
+m52790
+ma600-sir
+mac80211
+mac80211_hwsim
+machzwd
+macmodes
+macvlan
+madgemc
+magellan
+map_absent
+map_funcs
+map_ram
+map_rom
+matrix_keypad
+matroxfb_accel
+matroxfb_base
+matroxfb_crtc2
+matroxfb_DAC1064
+matroxfb_g450
+matroxfb_maven
+matroxfb_misc
+matroxfb_Ti3026
+matrox_w1
+max1111
+max1363
+max1586
+max1619
+max17040_battery
+max3100
+max6650
+max6875
+max7301
+max732x
+max7359_keypad
+mb862xxfb
+mbp_nvidia_bl
+mc13783
+mc13783-core
+mc33880
+mc44s803
+mce-inject
+mce-xeon75xx
+mcp2120-sir
+mcp23s08
+mcs5000_ts
+mcs7780
+mcs7830
+mct_u232
+md4
+mdacon
+mdc800
+mdio
+me4000
+me_daq
+megaraid
+megaraid_mbox
+megaraid_mm
+megaraid_sas
+memstick
+metronomefb
+meye
+mfd-core
+mga
+michael_mic
+microcode
+microtek
+mii
+minix
+mISDN_core
+mISDN_dsp
+mISDNinfineon
+mISDNipac
+mISDNisar
+mite
+mixcomwd
+mk712
+mkiss
+mlx4_core
+mlx4_en
+mlx4_ib
+mmc_block
+mos7720
+mos7840
+moto_modem
+moxa
+mpc624
+mpoa
+mpt2sas
+mptbase
+mptctl
+mptfc
+mptlan
+mptsas
+mptscsih
+mptspi
+mpu401
+msdos
+msi-laptop
+msnd
+msnd_classic
+msnd_pinnacle
+msp3400
+mspro_block
+msr
+mt2060
+mt20xx
+mt2131
+mt2266
+mt312
+mt352
+mt9m001
+mt9m111
+mt9t031
+mt9v011
+mt9v022
+mtd
+mtd_blkdevs
+mtdblock
+mtdblock_ro
+mtdchar
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+mtdoops
+mtd_pagetest
+mtdram
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+mtd_subpagetest
+mtd_torturetest
+mtouch
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+mwave
+mwl8k
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+mxl5007t
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+myri10ge
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+natsemi
+navman
+nbd
+ncpfs
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+NCR_D700
+NCR_Q720_mod
+ndiswrapper
+ne
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+ne2k-pci
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+neofb
+net1080
+netconsole
+netjet
+netrom
+netsc520
+nettel
+netwave_cs
+netxen_nic
+newtonkbd
+nf_conntrack
+nf_conntrack_amanda
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+nf_conntrack_ipv4
+nf_conntrack_ipv6
+nf_conntrack_irc
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+nf_conntrack_pptp
+nf_conntrack_proto_dccp
+nf_conntrack_proto_gre
+nf_conntrack_proto_sctp
+nf_conntrack_proto_udplite
+nf_conntrack_sane
+nf_conntrack_sip
+nf_conntrack_tftp
+nf_defrag_ipv4
+nf_nat
+nf_nat_amanda
+nf_nat_ftp
+nf_nat_h323
+nf_nat_irc
+nf_nat_pptp
+nf_nat_proto_dccp
+nf_nat_proto_gre
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+nf_nat_proto_udplite
+nf_nat_sip
+nf_nat_snmp_basic
+nf_nat_tftp
+nfnetlink
+nfnetlink_log
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+nfs_acl
+nfsd
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+nf_tproxy_core
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+ni_atmio16d
+nicstar
+ni_daq_700
+ni_daq_dio24
+ni_labpc
+ni_labpc_cs
+nilfs2
+ni_mio_cs
+ni_pcidio
+ni_pcimio
+ni_tio
+ni_tiocmd
+niu
+nl802154
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+nls_cp1251
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+nls_iso8859-9
+nls_koi8-r
+nls_koi8-ru
+nls_koi8-u
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+nmclan_cs
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+nouveau
+nozomi
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+nsp32
+nsp_cs
+nst
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+nvidia-agp
+nvidiafb
+nvram
+nxt200x
+nxt6000
+ocfs2
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+ocfs2_dlmfs
+ocfs2_nodemanager
+ocfs2_stackglue
+ocfs2_stack_o2cb
+ocfs2_stack_user
+ohci1394
+old_belkin-sir
+olpc_battery
+olympic
+omfs
+omnibook
+omninet
+on20
+on26
+onenand
+onenand_sim
+opencores-kbd
+opl3
+oprofile
+opticon
+option
+or51132
+or51211
+orinoco
+orinoco_cs
+orinoco_nortel
+orinoco_pci
+orinoco_plx
+orinoco_tmd
+osd
+osdblk
+osst
+oti6858
+output
+ov7670
+ov772x
+ovcamchip
+oxu210hp-hcd
+p4-clockmod
+p54common
+p54pci
+p54spi
+p54usb
+p8023
+p9auth
+padlock-aes
+padlock-sha
+panasonic-laptop
+panel
+paride
+parkbd
+parport
+parport_ax88796
+parport_cs
+parport_pc
+parport_serial
+pas16
+pas2
+pata_ali
+pata_amd
+pata_artop
+pata_atiixp
+pata_atp867x
+pata_cmd640
+pata_cmd64x
+pata_cs5520
+pata_cs5530
+pata_cs5535
+pata_cs5536
+pata_cypress
+pata_efar
+pata_hpt366
+pata_hpt37x
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+pata_isapnp
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+pata_it821x
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+pata_marvell
+pata_mpiix
+pata_netcell
+pata_ninja32
+pata_ns87410
+pata_ns87415
+pata_oldpiix
+pata_opti
+pata_optidma
+pata_pcmcia
+pata_pdc2027x
+pata_pdc202xx_old
+pata_qdi
+pata_radisys
+pata_rdc
+pata_rz1000
+pata_sc1200
+pata_sch
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+pata_sil680
+pata_sl82c105
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+pata_winbond
+pbe5
+pc110pad
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+pc87413_wdt
+pc87427
+pca953x
+pcbc
+pcbit
+pcd
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+pcf50633-core
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+pcf50633-input
+pcf50633-regulator
+pcf857x
+pcf8591
+pci
+pci200syn
+pcilynx
+pcips2
+pci-stub
+pcl711
+pcl724
+pcl725
+pcl726
+pcl730
+pcl812
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+pcm3724
+pcm3730
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+pcmcia
+pcmcia_core
+pcm_common
+pcmda12
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+pcnet_cs
+pcspkr
+pcwd
+pcwd_pci
+pcwd_usb
+pd
+pd6729
+pda_power
+pegasus
+penmount
+pf
+pg
+phantom
+phison
+phonedev
+phonet
+phram
+physmap
+pktgen
+pl2303
+platform_lcd
+plat_nand
+plat-ram
+plip
+plusb
+pluto2
+pm2fb
+pm3fb
+pmc551
+pmcraid
+pms
+pn_pep
+poc
+poch
+pohmelfs
+powermate
+power_meter
+ppa
+ppdev
+ppp_async
+ppp_deflate
+ppp_mppe
+pppoatm
+pppoe
+pppol2tp
+pppox
+ppp_synctty
+pps_core
+prism2_usb
+prism54
+progear_bl
+proteon
+psmouse
+pss
+pt
+pvrusb2
+pwc
+qcserial
+qinfo_probe
+qla1280
+qla2xxx
+qla3xxx
+qla4xxx
+qlge
+qlogic_cs
+qlogicfas
+qlogicfas408
+qnx4
+qt1010
+quatech_daqp_cs
+quatech_usb2
+quickcam_messenger
+quota_tree
+quota_v1
+quota_v2
+r128
+r8169
+r8192_pci
+r8192se_pci
+r8192s_usb
+r82600_edac
+r8a66597-hcd
+radeon
+radeonfb
+radio-aimslab
+radio-aztech
+radio-cadet
+radio-gemtek
+radio-gemtek-pci
+radio-i2c-si470x
+radio-maestro
+radio-maxiradio
+radio-mr800
+radio-rtrack2
+radio-sf16fmi
+radio-sf16fmr2
+radio-si4713
+radio-tea5764
+radio-terratec
+radio-trust
+radio-typhoon
+radio-usb-si470x
+radio-zoltrix
+raid0
+raid1
+raid10
+raid456
+raid6_pq
+raid6test
+raid_class
+ramzswap
+rar_driver
+raw
+raw1394
+ray_cs
+rdma_cm
+rdma_ucm
+rds
+rds_rdma
+rds_tcp
+redboot
+reed_solomon
+reiserfs
+rfc1051
+rfc1201
+rfcomm
+rfd_ftl
+ricoh_mmc
+rio500
+riscom8
+rivafb
+rmd128
+rmd160
+rmd256
+rmd320
+rndis_host
+rndis_wlan
+rocket
+romfs
+rose
+rotary_encoder
+rpcsec_gss_krb5
+rpcsec_gss_spkm3
+rrunner
+rsrc_nonstatic
+rt2400pci
+rt2500pci
+rt2500usb
+rt2800usb
+rt2860sta
+rt2870sta
+rt2x00lib
+rt2x00pci
+rt2x00usb
+rt3090sta
+rt61pci
+rt73usb
+rtc-ab3100
+rtc-bq4802
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+rtc-r9701
+rtc-rs5c348
+rtc-rs5c372
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+rtc-rx8581
+rtc-s35390a
+rtc-stk17ta8
+rtc-test
+rtc-twl4030
+rtc-v3020
+rtc-wm831x
+rtc-wm8350
+rtc-x1205
+rtd520
+rti800
+rti802
+rtl8150
+rtl8180
+rtl8187
+rtl8187se
+rxkad
+s1d13xxxfb
+s2255drv
+s2io
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+s526
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+saa6752hs
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+saa7134-dvb
+saa7134-empress
+saa7146
+saa7146_vv
+saa7164
+saa717x
+saa7185
+safe_serial
+salsa20_generic
+salsa20-i586
+sata_inic162x
+sata_mv
+sata_nv
+sata_promise
+sata_qstor
+sata_sil
+sata_sil24
+sata_sis
+sata_svw
+sata_sx4
+sata_uli
+sata_via
+sata_vsc
+savage
+savagefb
+sb
+sb1000
+sbc60xxwdt
+sbc7240_wdt
+sbc8360
+sbc_epx_c3
+sbc_fitpc2_wdt
+sbc_gxx
+sb_lib
+sbni
+sbp2
+sc
+sc1200wdt
+sc520cdp
+sc520_wdt
+sc92031
+scb2_flash
+scc
+sch311x_wdt
+sch_atm
+sch_cbq
+sch_drr
+sch_dsmark
+sch_gred
+sch_hfsc
+sch_htb
+sch_ingress
+sch_multiq
+sch_netem
+sch_prio
+sch_red
+sch_sfq
+sch_tbf
+sch_teql
+sco
+scsi_debug
+scsi_dh_alua
+scsi_dh_emc
+scsi_dh_hp_sw
+scsi_dh_rdac
+scsi_tgt
+scsi_transport_fc
+scsi_transport_iscsi
+scsi_transport_sas
+scsi_transport_spi
+scsi_transport_srp
+scsi_wait_scan
+sctp
+scx200
+scx200_acb
+scx200_docflash
+scx200_gpio
+scx200_hrt
+scx200_i2c
+scx200_wdt
+sdhci
+sdhci-pci
+sdhci-pltfm
+sdio_uart
+sdla
+sdricoh_cs
+se401
+sealevel
+sedlbauer_cs
+seed
+seeq8005
+sep_driver
+seqiv
+ser_gigaset
+serial2002
+serial_cs
+serio_raw
+sermouse
+serpent
+serport
+serqt_usb2
+ses
+sfc
+sha1_generic
+sha256_generic
+sha512_generic
+shpchp
+sht15
+si21xx
+si4713-i2c
+sidewinder
+siemens_mpi
+sierra
+sim710
+sir-dev
+sis
+sis190
+sis5595
+sis900
+sis-agp
+sisfb
+sisusbvga
+sit
+sja1000
+sja1000_isa
+sja1000_platform
+skel
+skfp
+skge
+skisa
+sky2
+sl811_cs
+sl811-hcd
+slicoss
+slip
+slram
+sm501
+sm501fb
+smbfs
+smc9194
+smc91c92_cs
+smc-mca
+smctr
+smc-ultra
+smc-ultra32
+smsc37b787_wdt
+smsc47b397
+smsc47m1
+smsc47m192
+smsc9420
+smsc95xx
+smsc-ircc2
+smsdvb
+smsmdtv
+smssdio
+smsusb
+sn9c102
+snd
+snd-ac97-codec
+snd-ad1816a
+snd-ad1848
+snd-ad1889
+snd-adlib
+snd-ak4114
+snd-ak4117
+snd-ak4xxx-adda
+snd-ali5451
+snd-als100
+snd-als300
+snd-als4000
+snd-atiixp
+snd-atiixp-modem
+snd-au8810
+snd-au8820
+snd-au8830
+snd-aw2
+snd-azt2320
+snd-azt3328
+snd-bt87x
+snd-ca0106
+snd-cmi8330
+snd-cmipci
+snd-cs4231
+snd-cs4236
+snd-cs4281
+snd-cs46xx
+snd-cs5530
+snd-cs5535audio
+snd-cs8427
+snd-ctxfi
+snd-darla20
+snd-darla24
+snd-dt019x
+snd-dummy
+snd-echo3g
+snd-emu10k1
+snd-emu10k1-synth
+snd-emu10k1x
+snd-emu8000-synth
+snd-emux-synth
+snd-ens1370
+snd-ens1371
+snd-es1688
+snd-es1688-lib
+snd-es18xx
+snd-es1938
+snd-es1968
+snd-es968
+snd-fm801
+snd-gina20
+snd-gina24
+snd-gusclassic
+snd-gusextreme
+snd-gus-lib
+snd-gusmax
+snd-hda-codec
+snd-hda-codec-analog
+snd-hda-codec-atihdmi
+snd-hda-codec-ca0110
+snd-hda-codec-cirrus
+snd-hda-codec-cmedia
+snd-hda-codec-conexant
+snd-hda-codec-idt
+snd-hda-codec-intelhdmi
+snd-hda-codec-nvhdmi
+snd-hda-codec-realtek
+snd-hda-codec-si3054
+snd-hda-codec-via
+snd-hda-intel
+snd-hdsp
+snd-hdspm
+snd-hifier
+snd-hrtimer
+snd-hwdep
+snd-i2c
+snd-ice1712
+snd-ice1724
+snd-ice17xx-ak4xxx
+snd-indigo
+snd-indigodj
+snd-indigodjx
+snd-indigoio
+snd-indigoiox
+snd-intel8x0
+snd-intel8x0m
+snd-interwave
+snd-interwave-stb
+snd-korg1212
+snd-layla20
+snd-layla24
+snd-lx6464es
+snd-maestro3
+snd-mia
+snd-miro
+snd-mixart
+snd-mixer-oss
+snd-mona
+snd-mpu401
+snd-mpu401-uart
+snd-msnd-classic
+snd-msnd-lib
+snd-msnd-pinnacle
+snd-mtpav
+snd-mts64
+snd-nm256
+snd-opl3-lib
+snd-opl3sa2
+snd-opl3-synth
+snd-opl4-lib
+snd-opl4-synth
+snd-opti92x-ad1848
+snd-opti92x-cs4231
+snd-opti93x
+snd-oxygen
+snd-oxygen-lib
+snd-page-alloc
+snd-pcm
+snd-pcm-oss
+snd-pcsp
+snd-pcxhr
+snd-pdaudiocf
+snd-portman2x4
+snd-pt2258
+snd-rawmidi
+snd-riptide
+snd-rme32
+snd-rme96
+snd-rme9652
+snd-sb16
+snd-sb16-csp
+snd-sb16-dsp
+snd-sb8
+snd-sb8-dsp
+snd-sbawe
+snd-sb-common
+snd-sc6000
+snd-seq
+snd-seq-device
+snd-seq-dummy
+snd-seq-midi
+snd-seq-midi-emul
+snd-seq-midi-event
+snd-seq-oss
+snd-seq-virmidi
+snd-serial-u16550
+snd-sgalaxy
+snd-sis7019
+snd-soc-ad1836
+snd-soc-ad1938
+snd-soc-ad73311
+snd-soc-ak4104
+snd-soc-ak4535
+snd-soc-ak4642
+snd-soc-core
+snd-soc-cs4270
+snd-soc-l3
+snd-soc-max9877
+snd-soc-pcm3008
+snd-soc-spdif
+snd-soc-ssm2602
+snd-soc-tlv320aic23
+snd-soc-tlv320aic26
+snd-soc-tlv320aic3x
+snd-soc-twl4030
+snd-soc-uda134x
+snd-soc-uda1380
+snd-soc-wm8350
+snd-soc-wm8400
+snd-soc-wm8510
+snd-soc-wm8523
+snd-soc-wm8580
+snd-soc-wm8728
+snd-soc-wm8731
+snd-soc-wm8750
+snd-soc-wm8753
+snd-soc-wm8776
+snd-soc-wm8900
+snd-soc-wm8903
+snd-soc-wm8940
+snd-soc-wm8960
+snd-soc-wm8961
+snd-soc-wm8971
+snd-soc-wm8974
+snd-soc-wm8988
+snd-soc-wm8990
+snd-soc-wm8993
+snd-soc-wm9081
+snd-soc-wm-hubs
+snd-sonicvibes
+snd-sscape
+snd-tea575x-tuner
+snd-tea6330t
+snd-timer
+snd-trident
+snd-usb-audio
+snd-usb-caiaq
+snd-usb-lib
+snd-usb-us122l
+snd-usb-usx2y
+snd-util-mem
+snd-via82xx
+snd-via82xx-modem
+snd-virmidi
+snd-virtuoso
+snd-vx222
+snd-vx-lib
+snd-vxpocket
+snd-wavefront
+snd-wss-lib
+snd-ymfpci
+soc_camera
+soc_camera_platform
+softcursor
+softdog
+solos-pci
+sony-laptop
+sonypi
+sound
+soundcore
+sound_firmware
+sp8870
+sp887x
+spaceball
+spaceorb
+spcp8x5
+specialix
+spectrum_cs
+speedfax
+speedtch
+spi_bitbang
+spi_butterfly
+spidev
+spi_gpio
+spi_lm70llp
+squashfs
+ssb
+sscape
+ssfdc
+sst25l
+sstfb
+ssv_dnp
+st
+stallion
+starfire
+stb0899
+stb6000
+stb6100
+stex
+stinger
+stir4200
+stkwebcam
+stowaway
+stp
+stradis
+strip
+stv0288
+stv0297
+stv0299
+stv0900
+stv090x
+stv6110
+stv6110x
+stv680
+sundance
+sungem
+sungem_phy
+sunhme
+suni
+sunkbd
+sunrpc
+svcrdma
+svgalib
+sworks-agp
+sx8
+sym53c416
+sym53c500_cs
+sym53c8xx
+symbolserial
+synaptics_i2c
+synclink
+synclink_cs
+synclink_gt
+synclinkmp
+syscopyarea
+sysfillrect
+sysimgblt
+sysv
+t128
+t1isa
+t1pci
+tc1100-wmi
+tcic
+tcp_bic
+tcp_highspeed
+tcp_htcp
+tcp_hybla
+tcp_illinois
+tcp_lp
+tcp_probe
+tcp_scalable
+tcp_vegas
+tcp_veno
+tcp_westwood
+tcp_yeah
+tcrypt
+tda10021
+tda10023
+tda10048
+tda1004x
+tda10086
+tda18271
+tda7432
+tda8083
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+tda9887
+tdfx
+tdfxfb
+tdo24m
+tea
+tea5761
+tea5767
+tea6415c
+tea6420
+tehuti
+tekram-sir
+teles_cs
+tg3
+tgr192
+thinkpad_acpi
+thmc50
+tifm_7xx1
+tifm_core
+tifm_ms
+tifm_sd
+tileblit
+timeriomem-rng
+tipc
+ti_usb_3410_5052
+tlan
+tlclk
+tle62x0
+tmdc
+tmiofb
+tmp401
+tmp421
+tms380tr
+tmscsim
+tmspci
+toim3232-sir
+topstar-laptop
+toshiba_acpi
+touchit213
+touchright
+touchwin
+tpm
+tpm_atmel
+tpm_bios
+tpm_infineon
+tpm_nsc
+tpm_tis
+tps65010
+tps65023-regulator
+tps6507x-regulator
+trancevibrator
+tranzport
+tridentfb
+trix
+ts5500_flash
+ts_bm
+tsc2007
+ts_fsm
+ts_kmp
+tsl2550
+tsl2561
+ttm
+ttpci-eeprom
+ttusb_dec
+ttusbdecfe
+tua6100
+tulip
+tuner
+tuner-simple
+tuner-types
+tuner-xc2028
+tunnel4
+tunnel6
+turbografx
+tvaudio
+tveeprom
+tvp5150
+tw9910
+twidjoy
+twl4030-gpio
+twl4030_keypad
+twl4030-pwrbutton
+twl4030-usb
+twl4030_wdt
+twofish
+twofish_common
+twofish-i586
+typhoon
+u132-hcd
+u14-34f
+uart401
+uart6850
+ubi
+ubifs
+ucb1400_core
+ucb1400_ts
+udf
+udlfb
+ueagle-atm
+ufs
+uinput
+uio
+uio_aec
+uio_cif
+uio_pci_generic
+uio_pdrv
+uio_pdrv_genirq
+uio_sercos3
+uio_smx
+uli526x
+ultracam
+ultrastor
+umc
+umem
+ums-alauda
+ums-cypress
+ums-datafab
+ums-freecom
+ums-isd200
+ums-jumpshot
+ums-karma
+ums-onetouch
+ums-sddr09
+ums-sddr55
+ums-usbat
+unioxx5
+upd64031a
+upd64083
+uPD98402
+usb8xxx
+usbatm
+usb_debug
+usbdux
+usbduxfast
+usb_gigaset
+usbhid
+usbip
+usbip_common_mod
+usblcd
+usbled
+usblp
+usbnet
+usbserial
+usbsevseg
+usb-storage
+usbtest
+usbtmc
+usbtouchscreen
+usbvideo
+usbvision
+userspace-consumer
+uss720
+uvcvideo
+uvesafb
+uwb
+v4l1-compat
+v4l2-common
+v4l2-int-device
+vcan
+ves1820
+ves1x93
+vesafb
+veth
+vfat
+vga16fb
+vgastate
+vgg2432a4
+vhci-hcd
+via
+via686a
+via-agp
+viafb
+via-ircc
+via-rhine
+via-rng
+via-sdmmc
+via-velocity
+vicam
+video
+video1394
+videobuf-core
+videobuf-dma-sg
+videobuf-dvb
+videobuf-vmalloc
+videocodec
+videodev
+virtio
+virtio_balloon
+virtio_blk
+virtio_console
+virtio_net
+virtio_pci
+virtio_ring
+virtio-rng
+virtual
+visor
+vivi
+vlsi_ir
+vmac
+vme
+vme_ca91cx42
+vme_tsi148
+vme_user
+v_midi
+vmk80xx
+vmlfb
+vmw_pvscsi
+vmxnet3
+vp27smpx
+vpx3220
+vstusb
+vsxxxaa
+vt1211
+vt6656_stage
+vt8231
+vt8623fb
+vxge
+w1_bq27000
+w1_ds2431
+w1_ds2433
+w1_ds2760
+w1-gpio
+w1_smem
+w1_therm
+w6692
+w83627ehf
+w83627hf
+w83627hf_wdt
+w83697hf_wdt
+w83697ug_wdt
+w83781d
+w83791d
+w83792d
+w83793
+w83877f_wdt
+w83977af_ir
+w83977f_wdt
+w83l785ts
+w83l786ng
+w9966
+w9968cf
+wacom
+wacom_w8001
+wafer5823wdt
+walkera0701
+wanrouter
+wanxl
+warrior
+wavelan
+wavelan_cs
+wbsd
+wd
+wd7000
+wdt
+wdt_pci
+whci
+whci-hcd
+whc-rc
+whiteheat
+wimax
+winbond-840
+winbond-cir
+wire
+wistron_btns
+wl1251
+wl1251_sdio
+wl1251_spi
+wl1271
+wl3501_cs
+wlp
+wm831x
+wm831x_bl
+wm831x-dcdc
+wm831x-gpio
+wm831x-hwmon
+wm831x-isink
+wm831x-ldo
+wm831x-on
+wm831x_power
+wm831x_wdt
+wm8350
+wm8350-hwmon
+wm8350-i2c
+wm8350_power
+wm8350-regulator
+wm8350_wdt
+wm8400-core
+wm8400-regulator
+wm8739
+wm8775
+wm97xx-ts
+wp512
+wpan-class
+wusb-cbaf
+wusbcore
+wusb-wa
+x25
+x25_asy
+x38_edac
+xc5000
+xcbc
+xfrm4_mode_beet
+xfrm4_mode_transport
+xfrm4_mode_tunnel
+xfrm4_tunnel
+xfrm6_mode_beet
+xfrm6_mode_ro
+xfrm6_mode_transport
+xfrm6_mode_tunnel
+xfrm6_tunnel
+xfrm_ipcomp
+xfrm_user
+xfs
+xhci
+xirc2ps_cs
+xircom_cb
+xor
+xpad
+xprtrdma
+x_tables
+xt_CLASSIFY
+xt_cluster
+xt_comment
+xt_connbytes
+xt_connlimit
+xt_connmark
+xt_CONNMARK
+xt_CONNSECMARK
+xt_conntrack
+xt_dccp
+xt_dscp
+xt_DSCP
+xt_esp
+xt_hashlimit
+xt_helper
+xt_hl
+xt_HL
+xt_iprange
+xtkbd
+xt_LED
+xt_length
+xt_limit
+xt_mac
+xt_mark
+xt_MARK
+xt_multiport
+xt_NFLOG
+xt_NFQUEUE
+xt_NOTRACK
+xt_osf
+xt_owner
+xt_physdev
+xt_pkttype
+xt_policy
+xt_quota
+xt_rateest
+xt_RATEEST
+xt_realm
+xt_recent
+xts
+xt_sctp
+xt_SECMARK
+xt_socket
+xt_state
+xt_statistic
+xt_string
+xt_tcpmss
+xt_TCPMSS
+xt_tcpudp
+xt_time
+xt_TPROXY
+xt_TRACE
+xt_u32
+xusbatm
+xvmalloc
+yam
+yealink
+yellowfin
+yenta_socket
+z85230
+zatm
+zaurus
+zc0301
+zd1201
+zd1211rw
+zhenhua
+zl10036
+zl10039
+zl10353
+zlib
+zlib_deflate
+znet
+zr36016
+zr36050
+zr36060
+zr36067
+zr364xx
--- linux-mvl-dove-2.6.32.orig/debian.master/abi/2.6.32-34.73/i386/generic
+++ linux-mvl-dove-2.6.32/debian.master/abi/2.6.32-34.73/i386/generic
@@ -0,0 +1,10428 @@
+EXPORT_SYMBOL arch/x86/kernel/scx200 0x254e5667	scx200_gpio_base
+EXPORT_SYMBOL arch/x86/kernel/scx200 0x35a3c008	scx200_gpio_configure
+EXPORT_SYMBOL arch/x86/kernel/scx200 0x8cfa375c	scx200_gpio_shadow
+EXPORT_SYMBOL arch/x86/kernel/scx200 0x907665bd	scx200_cb_base
+EXPORT_SYMBOL arch/x86/kvm/kvm 0x83759bd7	kvm_cpu_has_pending_timer
+EXPORT_SYMBOL arch/x86/kvm/kvm 0xc586f597	kvm_read_guest_atomic
+EXPORT_SYMBOL crypto/gf128mul 0x0c2f123f	gf128mul_4k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x1068004b	gf128mul_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x2f2889a0	gf128mul_init_64k_lle
+EXPORT_SYMBOL crypto/gf128mul 0x3755f990	gf128mul_init_64k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x384ef9ce	gf128mul_64k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x56af0dbd	gf128mul_x_ble
+EXPORT_SYMBOL crypto/gf128mul 0x83581089	gf128mul_init_4k_lle
+EXPORT_SYMBOL crypto/gf128mul 0x9b2560b9	gf128mul_init_4k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x9e13f6f6	gf128mul_lle
+EXPORT_SYMBOL crypto/gf128mul 0xbd17a0df	gf128mul_4k_lle
+EXPORT_SYMBOL crypto/gf128mul 0xc0890413	gf128mul_64k_lle
+EXPORT_SYMBOL crypto/gf128mul 0xd60736ec	gf128mul_free_64k
+EXPORT_SYMBOL crypto/xor 0x5b6c00e6	xor_blocks
+EXPORT_SYMBOL drivers/acpi/video 0x7a45377b	acpi_video_unregister
+EXPORT_SYMBOL drivers/acpi/video 0x8826c13b	acpi_video_register
+EXPORT_SYMBOL drivers/atm/suni 0x89193a84	suni_init
+EXPORT_SYMBOL drivers/atm/uPD98402 0x827ab0e0	uPD98402_init
+EXPORT_SYMBOL drivers/block/paride/paride 0x0b311e6d	pi_release
+EXPORT_SYMBOL drivers/block/paride/paride 0x190a2439	pi_schedule_claimed
+EXPORT_SYMBOL drivers/block/paride/paride 0x300d3c82	pi_init
+EXPORT_SYMBOL drivers/block/paride/paride 0x34bd1298	paride_unregister
+EXPORT_SYMBOL drivers/block/paride/paride 0x3f16d601	pi_disconnect
+EXPORT_SYMBOL drivers/block/paride/paride 0x6d9224e8	pi_read_regr
+EXPORT_SYMBOL drivers/block/paride/paride 0x7226379a	pi_write_block
+EXPORT_SYMBOL drivers/block/paride/paride 0x7ffa7360	pi_read_block
+EXPORT_SYMBOL drivers/block/paride/paride 0x9c3ea286	paride_register
+EXPORT_SYMBOL drivers/block/paride/paride 0xa7b0eb9f	pi_do_claimed
+EXPORT_SYMBOL drivers/block/paride/paride 0xe37c271d	pi_write_regr
+EXPORT_SYMBOL drivers/block/paride/paride 0xeb6a17f7	pi_connect
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x08987f5a	agp_bridge
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x1a6df7a0	agp_generic_alloc_user
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x1b195918	agp_generic_free_gatt_table
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x2d9a1c09	agp_copy_info
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x2d9d34de	agp_backend_release
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x30226ddf	agp_device_command
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x33b0292a	agp_generic_remove_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x38050a5d	agp_free_page_array
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x39242bac	agp_free_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x48647374	agp_generic_enable
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x4b085dbf	agp3_generic_configure
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x561f5894	agp_generic_alloc_by_type
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x63de8502	agp_generic_mask_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x673f815e	agp_bridges
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x6854f2b4	agp_unbind_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x72c122f1	agp_backend_acquire
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x7538b132	agp_off
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x7eb65e86	agp_generic_alloc_page
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x802744c2	agp_bind_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x89334635	agp_find_bridge
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x90c8ebf3	agp_alloc_page_array
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xa0586825	agp3_generic_tlbflush
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xa4d4f0e6	global_cache_flush
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xa6399a92	agp_flush_chipset
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xa8bb0e33	agp_generic_destroy_pages
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xb04ea8f0	agp_rebind_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xb420c549	agp_put_bridge
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xbb522770	agp_create_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xc10e9b0e	agp_generic_destroy_page
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xc2424641	agp3_generic_cleanup
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xc5d9c46c	agp_try_unsupported_boot
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xc65abeb7	agp3_generic_sizes
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xca61cd5d	agp_generic_create_gatt_table
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xd0fef3b2	agp_free_key
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xd61248a7	get_agp_version
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xde5bb208	agp_generic_free_by_type
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xde9b17ed	agp3_generic_fetch_size
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xdfba84c4	agp_allocate_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xe0c1ae97	agp_generic_type_to_mask_type
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xe1f692c6	agp_enable
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xe213b229	agp_alloc_bridge
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xf1499cbc	agp_generic_alloc_pages
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xf476e1dc	agp_generic_insert_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xf55c4a16	agp_collect_device_status
+EXPORT_SYMBOL drivers/char/agp/intel-agp 0x7b9a6116	intel_agp_enabled
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x055b3748	ipmi_smi_watcher_unregister
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x10728cf7	ipmi_register_smi
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x19f52371	ipmi_smi_msg_received
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x1eeadaca	ipmi_get_my_LUN
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x1fb11822	ipmi_get_my_address
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x3d3c12b3	ipmi_get_version
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x40f2b10c	ipmi_alloc_smi_msg
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x41762684	ipmi_register_for_cmd
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x4585fb18	ipmi_get_maintenance_mode
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x53831c2f	ipmi_create_user
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x689ce765	ipmi_set_maintenance_mode
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x804f922a	ipmi_addr_length
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x89567bcb	ipmi_set_my_address
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x96f19369	ipmi_unregister_for_cmd
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x9a2ee77f	ipmi_poll_interface
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xa77d7f56	ipmi_set_my_LUN
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xab6fa4e1	ipmi_smi_add_proc_entry
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xaddeca19	ipmi_request_supply_msgs
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xb75f8a29	ipmi_unregister_smi
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xbe6d7fb2	ipmi_smi_watchdog_pretimeout
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xcad9aaaa	ipmi_destroy_user
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xd580118f	ipmi_set_gets_events
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xdbb6f5d6	ipmi_free_recv_msg
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xdbd4c511	ipmi_request_settime
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe4f4665b	ipmi_validate_addr
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xf2a0e1f8	ipmi_smi_watcher_register
+EXPORT_SYMBOL drivers/char/nsc_gpio 0x128c3fd9	nsc_gpio_write
+EXPORT_SYMBOL drivers/char/nsc_gpio 0x52012cdc	nsc_gpio_dump
+EXPORT_SYMBOL drivers/char/nsc_gpio 0x7902b916	nsc_gpio_read
+EXPORT_SYMBOL drivers/char/nvram 0x0f28cb91	nvram_read_byte
+EXPORT_SYMBOL drivers/char/nvram 0x17ff2c1d	__nvram_read_byte
+EXPORT_SYMBOL drivers/char/nvram 0x2adec1e0	__nvram_check_checksum
+EXPORT_SYMBOL drivers/char/nvram 0x7da28f12	nvram_check_checksum
+EXPORT_SYMBOL drivers/char/nvram 0x9ce3f83f	nvram_write_byte
+EXPORT_SYMBOL drivers/char/nvram 0xa8813189	__nvram_write_byte
+EXPORT_SYMBOL drivers/edac/edac_core 0x5c163731	edac_mc_handle_fbd_ue
+EXPORT_SYMBOL drivers/edac/edac_core 0x64ef9320	edac_mc_find
+EXPORT_SYMBOL drivers/edac/edac_core 0xc5eec299	edac_mc_handle_fbd_ce
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x04dd92ce	fw_core_add_descriptor
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x094f8d29	fw_device_enable_phys_dma
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x10a335ed	fw_card_add
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x1bed49b9	fw_core_remove_card
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x3107bfda	fw_iso_context_start
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x31904366	fw_iso_context_create
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x3610e5e4	fw_core_add_address_handler
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x4d5d4eca	fw_core_remove_descriptor
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x4ee34955	fw_core_handle_request
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x5ebfdc0c	fw_iso_context_destroy
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x6eca84a5	fw_iso_context_stop
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x70cc2d07	fw_card_initialize
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x7261558b	fw_iso_context_queue
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x74632c48	fw_core_initiate_bus_reset
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x8491a49f	fw_core_handle_bus_reset
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x90863005	fw_high_memory_region
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x916ef652	fw_fill_response
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x944afede	fw_run_transaction
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x97f88e43	fw_send_response
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xaa0e5c3a	fw_core_remove_address_handler
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xab5c6b42	fw_send_request
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xafc1c793	fw_csr_iterator_next
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xb047a2c6	fw_csr_iterator_init
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xb35468f7	fw_cancel_transaction
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xd4a7b7a3	fw_core_handle_response
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xe446c331	fw_iso_buffer_init
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xeb9cb740	fw_bus_type
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xf9cbae9d	fw_iso_buffer_destroy
+EXPORT_SYMBOL drivers/firmware/dcdbas 0xa75079d6	dcdbas_smi_request
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x00c6391c	drm_vblank_off
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x011c7cab	drm_vblank_pre_modeset
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0430a23b	drm_agp_chipset_flush
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x062bab83	drm_vblank_count
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0836695c	drm_sman_takedown
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0c626b86	drm_addbufs_pci
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x10eee424	drm_mode_create_scaling_mode_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1118a4d2	drm_agp_release
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x12b445c7	drm_agp_acquire
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x13106882	drm_rmmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x143e5ecc	drm_agp_unbind
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x15f6cb64	drm_encoder_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x16b8934f	drm_idlelock_take
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x199e127a	drm_mode_create_tv_properties
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1bba9030	drm_master_get
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1d29a384	drm_mode_config_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1f072c59	drm_property_add_enum
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1fdb669b	drm_get_dev
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x20557fd1	drm_core_ioremap_wc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x20645642	drm_debug
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x21451ac4	drm_sman_owner_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x223ab701	drm_gtf_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x25732a4d	drm_addmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x25bfb24d	drm_i2c_encoder_destroy
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x261c256e	drm_connector_attach_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2916bf63	drm_sman_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x29790b83	drm_mode_attachmode_crtc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2e536b32	drm_poll
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2eb2f903	drm_sman_free_key
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3074f033	drm_order
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3157f2c0	drm_vblank_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x32b5a8ec	drm_pci_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x38b4ff2b	drm_vblank_post_modeset
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3a2f21a8	drm_mm_search_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3c51c200	drm_rmmap_locked
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3c9a1409	drm_ht_just_insert_please
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3c9ae463	drm_open
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x40066953	drm_property_destroy
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x40911aaf	drm_mm_debug_table
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x43fb15c5	drm_mode_config_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x48aa6690	drm_gem_vm_open
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x497acbc6	drm_mode_object_find
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4a4e540f	drm_mode_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4c9c406e	drm_ioctl
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4d508fa7	drm_vblank_put
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4d8b39e6	drm_gem_object_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x505cab5b	drm_mode_create_dirty_info_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x50825d6e	drm_getsarea
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x548bbe96	drm_addbufs_agp
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x55f060ee	drm_sman_set_range
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x56217ed2	drm_mm_clean
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x563c9e42	drm_unbind_agp
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x57f7dbe6	drm_mm_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x580830f0	drm_mode_set_name
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x585231e2	drm_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x59f19bd1	drm_gem_mmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5eb704a6	drm_mode_destroy
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5f43c733	drm_mode_remove
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x60a49901	drm_agp_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x60c82130	drm_do_probe_ddc_edid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6518c19a	drm_mm_get_block_range_generic
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x668afb67	drm_core_ioremap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6711f2dc	drm_core_get_reg_ofs
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x672ba6da	drm_clflush_pages
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x673f9d0e	drm_agp_info
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x67b066e2	drm_idlelock_release
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6c615c84	drm_connector_property_get_value
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6d2e5837	drm_ut_debug_printk
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6e1eb7a5	drm_connector_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6f14cc63	drm_mode_prune_invalid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6f5214d7	drm_ati_pcigart_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6fc30481	drm_mode_hsync
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x717c568d	drm_exit
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x71d43e82	drm_agp_bind
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x760e005f	drm_mode_create_dithering_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x76863e24	drm_mm_pre_get
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x77657498	drm_pci_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x784915eb	drm_mode_vrefresh
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7becf9f2	drm_gem_object_handle_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7c1fd6c8	drm_mode_equal
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7cd6c139	drm_put_dev
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7da41dc4	drm_agp_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7f029890	drm_read
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x80824967	drm_gem_object_lookup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x818ef09b	drm_crtc_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x81de216a	drm_sg_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x825b81f5	drm_handle_vblank
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x83a36b83	drm_ati_pcigart_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x849241ac	drm_mm_put_block
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x85de09f5	drm_mode_width
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x87a3f79a	drm_add_modes_noedid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x87d6e7ef	drm_detect_hdmi_monitor
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x887486fa	drm_debugfs_remove_files
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8e62d513	drm_mm_search_free_in_range
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8e6d4c95	drm_agp_bind_pages
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x908945d8	drm_agp_enable
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x939d7f93	drm_core_reclaim_buffers
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x948cb80d	drm_get_encoder_name
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9595d46e	drm_get_resource_len
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x97067d1b	drm_gem_handle_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x987ab3db	drm_encoder_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9903dfe2	drm_get_resource_start
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9acefc91	drm_sysfs_connector_remove
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9dfe1b62	drm_vblank_get
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa1eabd87	drm_mode_list_concat
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa2281f4b	drm_irq_uninstall
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa5ed6af6	drm_free_agp
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xaa160baa	drm_mode_connector_detach_encoder
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xad66e499	drm_mm_dump_table
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xae64c381	drm_i_have_hw_lock
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xaf29788e	drm_sman_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb0a859cc	drm_get_drawable_info
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb2989189	drm_mode_validate_clocks
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb48a0909	drm_lock_take
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb58b3c52	drm_sysfs_connector_add
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb64e4cd5	drm_mm_init_scan
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb92afa8d	drm_crtc_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xbc479081	drm_cvt_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xbe3d78ef	drm_fasync
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xbfaa1f0b	drm_master_put
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc15811e3	drm_debugfs_create_files
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc1792355	drm_mode_validate_size
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc25a2da5	drm_mode_crtc_set_gamma_size
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc4ea85d8	drm_mm_scan_remove_block
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc6794f16	drm_core_get_map_ofs
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc8ead6eb	drm_get_connector_name
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc933da04	drm_mode_detachmode_crtc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc95137a6	drm_vblank_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc9c6d60d	drm_mode_probed_add
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcadac25f	drm_gem_vm_close
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xccc76a5c	drm_property_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcd0723d2	drm_mode_connector_list_update
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcdf2eff4	drm_mode_height
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcfb4f4ef	drm_mm_scan_add_block
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd08fa3f0	drm_mode_set_crtcinfo
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd0ce42df	drm_core_ioremapfree
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3028e75	drm_sman_set_manager
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3ffab51	drm_ht_remove
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd4c8a354	drm_mm_get_block_generic
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd79d9ec5	drm_i2c_encoder_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdb245bec	drm_mmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdc2df56f	drm_release
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd3febe2	drm_gem_object_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd49095c	drm_ht_insert_item
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe1457735	drm_ht_remove_item
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe24a7b88	drm_ht_find_item
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe2887b50	drm_mode_connector_attach_encoder
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe3a34021	drm_framebuffer_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe5bdce7e	drm_mode_debug_printmodeline
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe8d02e79	drm_add_edid_modes
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe919dd5c	drm_sman_owner_clean
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xedd6a024	drm_get_edid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xee8cf856	drm_connector_property_set_value
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf1421d13	drm_mode_sort
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf1ae4ee0	drm_mode_connector_update_edid_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf2c05215	drm_lock_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf387a596	drm_framebuffer_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf42a2b26	drm_ht_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf8560482	drm_mode_duplicate
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf9fed64e	drm_mode_create_dvi_i_properties
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfa3ad044	drm_connector_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfa769c65	drm_mm_takedown
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfb7a62b8	drm_irq_install
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfd956a1d	drm_sysfs_hotplug_event
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfdfbad19	drm_sman_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x06b2889e	drm_helper_mode_fill_fb_struct
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x0930f6c6	i2c_dp_aux_add_bus
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x1834d945	drm_helper_encoder_in_use
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x1af7b664	drm_fb_helper_init_crtc_count
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x2cbab69c	drm_fb_helper_fill_var
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x2cf4a626	drm_crtc_helper_set_config
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x2ef9901a	drm_fb_helper_setcmap
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x3b46b2f6	drm_fb_helper_add_connector
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x5357b568	drm_fb_helper_setcolreg
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x586fd2de	drm_helper_crtc_in_use
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x58d564cf	drm_fb_helper_set_par
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x5fec5e90	drm_fb_helper_check_var
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x6305eca5	drm_fb_helper_free
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x668a934e	drm_helper_hotplug_stage_two
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x794237f6	drm_helper_disable_unused_functions
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x9c0e9cad	drm_fb_helper_single_fb_probe
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x9d251144	drm_fb_helper_panic
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x9d2b6f70	drm_fb_helper_blank
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xa1c6d283	drm_helper_probe_connector_modes
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xb78915eb	drm_helper_initial_config
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xc469c244	drm_fb_helper_restore
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xd6eff889	drm_helper_probe_single_connector_modes
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xe47fee35	drm_helper_resume_force_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xe6757da5	drm_crtc_helper_set_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xe797ab1d	drm_fb_helper_pan_display
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xf047114b	drm_helper_connector_dpms
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xfddae7d9	drm_fb_helper_fill_fix
+EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x889a135d	intelfb_probe
+EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0xa9436c04	intelfb_resize
+EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0xf05224ff	intelfb_remove
+EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0x6ce80823	radeonfb_remove
+EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0xcd4333a0	radeonfb_resize
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x01c99cb0	ttm_write_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x03bab705	ttm_bo_synccpu_write_grab
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x044db796	ttm_bo_evict_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x07787990	ttm_bo_global_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x101fb898	ttm_tt_set_placement_caching
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x104300e8	ttm_object_file_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x132b05be	ttm_round_pot
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x161262d6	ttm_ref_object_base_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x17a98fa2	ttm_object_device_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x186f1f06	ttm_tt_populate
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x19ce8f1f	ttm_bo_init_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x1a09f00a	ttm_mem_global_alloc
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x1ba8c0ef	ttm_lock_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x1e4e7e87	ttm_bo_mmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x28412ad8	ttm_mem_global_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x2d673efd	ttm_vt_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x315a8f1a	ttm_bo_wait_cpu
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x34704ea7	ttm_global_item_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x365feb2e	ttm_eu_reserve_buffers
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x3c3c3af1	ttm_bo_global_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x3ce50883	ttm_bo_unreserve
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x3de60c1d	ttm_agp_backend_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x3e07f091	ttm_bo_unmap_virtual
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x48239b15	ttm_bo_synccpu_write_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x49fd9a24	ttm_object_file_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x4e4ff7f1	ttm_bo_kunmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x5179e52f	ttm_bo_device_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x56c42d22	ttm_suspend_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x594f03fe	ttm_object_device_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x5dcc1e64	ttm_bo_kmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x5dea47d6	ttm_bo_mem_space
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x5ee29691	ttm_tt_bind
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x61bdb34f	ttm_eu_fence_buffer_objects
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x6277c681	ttm_base_object_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x642f7bc9	ttm_bo_reserve
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x66666d70	ttm_global_item_ref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x67698dc1	ttm_mem_global_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x6b977dc3	ttm_bo_validate
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x6fb1de52	ttm_bo_clean_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x7045423d	ttm_bo_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x765cbc82	ttm_read_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x7f8879de	ttm_vt_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x86a4066d	ttm_eu_backoff_reservation
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x8db796d4	ttm_write_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x9370aadd	ttm_bo_wait_unreserved
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xa0a403f9	ttm_bo_swapout_all
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xa4b0ba5e	ttm_ref_object_add
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xa621eec1	ttm_bo_wait
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb5cf2fe9	ttm_suspend_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb9e927c4	ttm_base_object_lookup
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xbba2ecf9	ttm_read_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xbbeb7a60	ttm_bo_move_accel_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xbe3eadc6	ttm_fbdev_mmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xbf69f5ca	ttm_base_object_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc2058ac0	ttm_io_prot
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc9a91fdd	ttm_bo_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xd8d96a13	ttm_mem_global_free
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xe0627f77	ttm_bo_move_ttm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xee10525e	ttm_bo_move_memcpy
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xf421cf51	ttm_bo_device_release
+EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0x0903c239	vid_from_reg
+EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0xef1c781c	vid_which_vrm
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-bit 0x1e846fb0	i2c_bit_add_bus
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-bit 0x33e2b5bd	i2c_bit_add_numbered_bus
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0xb63bbf8d	i2c_pca_add_bus
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0xc9f348ee	i2c_pca_add_numbered_bus
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pcf 0xbc09d819	i2c_pcf_add_bus
+EXPORT_SYMBOL drivers/i2c/busses/i2c-amd756 0xab237856	amd756_smbus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x018b2466	hpsb_node_write
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x07efa2af	hpsb_free_tlabel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0879f860	hpsb_iso_recv_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0b83a6ce	hpsb_bus_reset
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x181a7b8b	hpsb_make_lockpacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x19db53ef	hpsb_iso_wake
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1a200e5a	csr1212_release_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1edf0d3f	hpsb_update_config_rom
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x21490d46	hpsb_iso_recv_listen_channel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x21577ede	hpsb_node_fill_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x219cbabe	dma_region_offset_to_bus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x25dcd5d4	hpsb_reset_bus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2a4cc36b	csr1212_attach_keyval_to_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2fe112e1	hpsb_iso_xmit_sync
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x358e6fb2	__hpsb_register_protocol
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3a8e32b4	hpsb_update_config_rom_image
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3c868e14	hpsb_selfid_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4087fd6a	hpsb_make_writepacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x44965b7c	hpsb_alloc_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4d3e59dd	hpsb_iso_recv_release_packets
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4d86a039	hpsb_selfid_complete
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x52b90646	hpsb_register_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x596126f7	hpsb_make_streampacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5f5fdd2f	csr1212_new_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x671852b0	hpsb_iso_stop
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x672ad148	dma_region_sync_for_device
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6af78239	hpsb_get_hostinfo_bykey
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6b488da8	hpsb_resume_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6c1c1b8a	hpsb_alloc_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6c73dc0a	hpsb_make_phypacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6c778b8b	hpsb_unregister_highlevel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6f11bedd	hpsb_make_lock64packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x71377ea7	hpsb_send_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x73ba74a8	hpsb_remove_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x73f95d24	hpsb_iso_n_ready
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x74255635	hpsb_lock
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x76bc1a5c	dma_region_free
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7a1bb0f7	hpsb_packet_sent
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7a295b83	hpsb_get_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7ab8a367	hpsb_iso_recv_unlisten_channel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7e31d52e	hpsb_iso_shutdown
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7ec3006f	hpsb_create_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7fadd772	hpsb_iso_xmit_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7fc27bd1	hpsb_iso_recv_set_channel_mask
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x842a43b8	hpsb_iso_recv_start
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8566c6cb	hpsb_packet_success
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x86f8570f	hpsb_get_tlabel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8879f8f0	dma_region_sync_for_cpu
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8ec2b312	dma_region_alloc
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x911df112	hpsb_read_cycle_timer
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9334cb1c	hpsb_read
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x94bce230	csr1212_get_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9790e11c	hpsb_iso_packet_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x979b3052	dma_prog_region_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9d3a954a	hpsb_protocol_class
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa063fb3c	hpsb_free_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa475fab4	hpsb_set_hostinfo_key
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa764e384	hpsb_set_packet_complete_task
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa924dac6	dma_prog_region_alloc
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa986a08c	dma_region_mmap
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaef57bb5	csr1212_detach_keyval_from_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaefbd374	csr1212_parse_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaf759962	hpsb_write
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb1d820bc	hpsb_unregister_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb9e219db	hpsb_set_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbba70620	dma_prog_region_free
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xcb1b0149	hpsb_make_readpacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xccc9431f	hpsb_add_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd05a3adc	hpsb_iso_xmit_start
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd7f77bc3	hpsb_iso_recv_flush
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xda9b2f31	hpsb_destroy_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe437fd4d	hpsb_allocate_and_register_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe8bf7cc2	hpsb_unregister_protocol
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xea4152ff	dma_region_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xed00ee5e	hpsb_iso_packet_sent
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xed89a506	hpsb_register_highlevel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xeea7c5e8	hpsb_packet_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfab27536	csr1212_read
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfba57f51	hpsb_speedto_str
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xff47d4c7	hpsb_iso_xmit_queue_packet
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x1d5aeebc	ohci1394_init_iso_tasklet
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x8cbad2e1	ohci1394_unregister_iso_tasklet
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0xcb890d2d	ohci1394_register_iso_tasklet
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0xfb695ed0	ohci1394_stop_context
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x06677c47	rdma_translate_ip
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x083abe2c	rdma_copy_addr
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x3d6acb79	rdma_resolve_ip
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x48bed749	rdma_addr_cancel
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x8a721ed9	rdma_addr_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xc91bb9d3	rdma_addr_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x0290e9e1	ib_send_cm_sidr_req
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x0a5c9ba1	ib_create_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x20164c84	ib_send_cm_rtu
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x313c823d	cm_class
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x3407432b	ib_send_cm_lap
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x47bf20ca	ib_send_cm_dreq
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x4b91cdb4	ib_cm_listen
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x50deba2b	ib_send_cm_sidr_rep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x5721510a	ib_send_cm_mra
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x7f59515e	ib_send_cm_rep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x86d58541	ib_cm_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x876d8232	ib_send_cm_apr
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x9da1ac39	ib_send_cm_drep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xa2583549	ib_send_cm_req
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xc4af2cb7	ib_send_cm_rej
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xe53b7d84	ib_cm_notify
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xedd53723	ib_destroy_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x07a2eac7	ib_find_cached_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0db0e47a	ib_get_cached_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x13bbd16f	ib_umem_release
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x13f35410	ib_modify_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1c1a4141	ib_query_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1e491a04	ib_unmap_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x21c1d8ba	ib_alloc_fast_reg_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2223eb82	ib_register_event_handler
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x276202fa	ib_get_dma_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2acecd08	ib_umem_get
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x333f8b4b	ib_query_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3ba4640c	ib_destroy_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3f7567fd	ib_rate_to_mult
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4140f6b9	ib_query_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x441053f1	ib_umem_page_count
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x47bba95c	ib_create_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4995704f	ib_create_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x50f97de8	ib_init_ah_from_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x520b2638	ib_pack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x543d6b13	ib_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x57a4bbdb	ib_find_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x58d57dcf	ib_alloc_mw
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x595d508c	ib_create_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5daad22d	ib_alloc_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5f3142cb	ib_create_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x614cb7ae	ib_query_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x62f0ea1c	ib_get_cached_lmc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x66c04d59	ib_modify_port
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6892fd3c	ib_query_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6ab69b2b	ib_resize_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6bfda4a8	ib_flush_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7115a27e	ib_modify_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x757348ad	ib_destroy_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x77c91267	ib_modify_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x79e5b623	ib_dereg_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7f003cf5	ib_alloc_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x81e8e117	ib_query_port
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x844aeeb1	ib_dealloc_pd
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8640eaeb	ib_modify_qp_is_ok
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x874ecd73	ib_dealloc_mw
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x87b614d8	ib_ud_header_pack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8844ea72	ib_detach_mcast
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8c6d1340	ib_get_client_data
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8c8093a7	ib_find_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8d233ae4	ib_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8d9ccda3	ib_fmr_pool_map_phys
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x93ca9656	ib_free_fast_reg_page_list
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x96ce6c46	rdma_node_get_transport
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9a584e0e	ib_destroy_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9d804fa1	mult_to_ib_rate
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa4463516	ib_find_cached_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa9fc070e	ib_attach_mcast
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb1a312e1	ib_unpack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb3030235	ib_query_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb37ae8c8	ib_unregister_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb71a235e	ib_fmr_pool_unmap
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb9a551a2	ib_unregister_event_handler
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xba1bd02e	ib_modify_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xbacc5332	ib_create_ah_from_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xcee3a1b2	ib_set_client_data
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd064365f	ib_alloc_fast_reg_page_list
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd17ba9d1	ib_ud_header_init
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd9f51415	ib_create_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xdf4dc510	ib_destroy_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe098b47d	ib_query_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe5b4cb7b	ib_destroy_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe93ff376	ib_get_cached_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf07fb4a1	ib_dispatch_event
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf10c73ef	ib_register_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf36498b9	ib_ud_header_unpack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf4cdc515	ib_alloc_pd
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf571718b	ib_reg_phys_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf6c25cdc	ib_rereg_phys_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xfc56cbd6	ib_dealloc_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xfddba6c7	ib_modify_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xfdf77e24	ib_dealloc_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x0fb88d05	ib_create_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x128b55f7	ib_get_rmpp_segment
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x33db0466	ib_post_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x3739ac65	ib_unregister_mad_agent
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x3da51504	ib_free_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x4400c351	ib_register_mad_snoop
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x56773353	ib_register_mad_agent
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x57c6a328	ib_cancel_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6ef787ed	ib_response_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6f077fcf	ib_get_mad_data_offset
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x7b5d4b7a	ib_is_mad_class_rmpp
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x9ce95031	ib_modify_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xb71edee8	ib_redirect_mad_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xf199c297	ib_free_recv_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xfbdc4dea	ib_process_mad_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x4cff5195	ib_sa_service_rec_query
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x576fdbac	ib_sa_free_multicast
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x66eadb66	ib_init_ah_from_mcmember
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x6baad75a	ib_sa_path_rec_get
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x7495c5a3	ib_init_ah_from_path
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x816f4b5b	ib_sa_get_mcmember_rec
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x9c56fd34	ib_sa_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xc4ef6aef	ib_sa_join_multicast
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xda7fc486	ib_sa_cancel_query
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xf520d09e	ib_sa_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x02f847bc	ib_copy_path_rec_from_user
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x07cf5a51	ib_copy_ah_attr_to_user
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x18382f6a	ib_copy_path_rec_to_user
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x184f3575	ib_copy_qp_attr_to_user
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x0604a7d2	iw_destroy_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x3df8cbb6	iw_cm_reject
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x50894c5a	iw_cm_disconnect
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x58304249	iw_create_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xa62109ba	iw_cm_connect
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xacefc642	iw_cm_accept
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xb77e79eb	iw_cm_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xdd2e466d	iw_cm_listen
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x05c9542e	rdma_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x0cb55fa0	rdma_resolve_addr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x0e5247d0	rdma_join_multicast
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x223b2940	rdma_listen
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x2bea19d7	rdma_destroy_id
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x2e0798cd	rdma_leave_multicast
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x2e17d502	rdma_create_id
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x537a54cd	rdma_destroy_qp
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x691093e1	rdma_set_ib_paths
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x7fb0d44c	rdma_set_service_type
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x916effb8	rdma_resolve_route
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xaba19099	rdma_reject
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xb0c1777b	rdma_accept
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xc44fa890	rdma_bind_addr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xca5862db	rdma_notify
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xd96371f7	rdma_create_qp
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xe4be8e6e	rdma_disconnect
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xee21c0d7	rdma_connect
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x227c9351	__gameport_register_driver
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x25aadc46	gameport_unregister_port
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x498d6047	gameport_open
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x50193ade	gameport_close
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x5ad4971d	gameport_set_phys
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x7d33bfd7	gameport_stop_polling
+EXPORT_SYMBOL drivers/input/gameport/gameport 0xcf6f91ab	gameport_start_polling
+EXPORT_SYMBOL drivers/input/gameport/gameport 0xea66dc94	gameport_unregister_driver
+EXPORT_SYMBOL drivers/input/gameport/gameport 0xf18fa7ec	__gameport_register_port
+EXPORT_SYMBOL drivers/input/input-polldev 0x2026705f	input_unregister_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0x85460b00	input_allocate_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0x8fe5a871	input_register_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0xc75b3311	input_free_polled_device
+EXPORT_SYMBOL drivers/isdn/capi/capifs 0x2c54c957	capifs_free_ncci
+EXPORT_SYMBOL drivers/isdn/capi/capifs 0xd0bc06ce	capifs_new_ncci
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x04403fcf	unregister_capi_driver
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x05e8b18c	capi_ctr_ready
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x083fae2c	capi20_put_message
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x14f2aa5a	capi20_get_version
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x227512b6	capi_ctr_resume_output
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x24f89299	capi_ctr_handle_message
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x26bcf8c7	capi_ctr_suspend_output
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2b8eab1f	capilib_free_ncci
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2baa6586	capilib_new_ncci
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x31c24aa4	capi20_isinstalled
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x47d3fc51	capi_info2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x50b33ca4	capi_cmsg2message
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x6057c6f3	capi_message2cmsg
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x62e32d43	capilib_data_b3_conf
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x71e8d5ba	capilib_data_b3_req
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x78f406d3	capi20_release
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7a33596c	capi20_get_serial
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7e6f1307	capi20_get_manufacturer
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x8f699913	capilib_release
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x9f823278	register_capi_driver
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xa23a51f7	capi20_set_callback
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xa7c4fd6c	capi_message2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xaa165d27	capilib_release_appl
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb19fda8d	capi_cmd2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb60e5e5f	capi_cmsg_header
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xc10fe128	cdebbuf_free
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xc136d001	capi_ctr_down
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xdac3f6d3	attach_capi_ctr
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe19a11ac	capi20_get_profile
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe8ad9bd1	capi_cmsg2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xeb201622	capi20_register
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xed061606	capi20_manufacturer
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xf8934193	detach_capi_ctr
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x011d8c22	b1_load_t4file
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x03213d06	b1_load_config
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x09f66c8b	avmcard_dma_alloc
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x0f825d98	b1_send_message
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x11f36117	b1_reset_ctr
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x36b188d8	b1_interrupt
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x474d46ec	b1_loaded
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x5fc887f5	b1_load_firmware
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x6cf398df	b1_getrevision
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x74909a79	b1_release_appl
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x7d0b6d6e	b1_register_appl
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x85f09690	b1_irq_table
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x876d2074	b1_free_card
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xa3507e8b	b1_alloc_card
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xaa9c2aa6	b1_parse_version
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xd068659a	b1ctl_read_proc
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xdfd28376	b1_detect
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xf3124d20	avmcard_dma_free
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x0a4abba1	b1dma_load_firmware
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x22f9a55e	b1dma_release_appl
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x233ca0dc	b1dma_interrupt
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x2758f5b9	b1dma_reset
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x28f88069	b1dma_reset_ctr
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x422f1004	b1dma_register_appl
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xad8b4d89	b1dma_send_message
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xb030465b	b1dmactl_read_proc
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xfa8a5fe4	t1pci_detect
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xfbfdadb9	b1pciv4_detect
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0x29562993	b1pcmcia_delcard
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xaec3240e	b1pcmcia_addcard_m1
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xea620116	b1pcmcia_addcard_m2
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xf14bf8b1	b1pcmcia_addcard_b1
+EXPORT_SYMBOL drivers/isdn/hardware/eicon/divadidd 0x2974ead1	DIVA_DIDD_Read
+EXPORT_SYMBOL drivers/isdn/hardware/eicon/divadidd 0x660ada7d	proc_net_eicon
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNipac 0x136270e8	mISDNipac_irq
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNipac 0x3d44a9c4	mISDNisac_init
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNipac 0x706338d8	mISDNipac_init
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNipac 0x79f4e110	mISDNisac_irq
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNisar 0x4eedd6b6	mISDNisar_init
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNisar 0x6e0a7357	mISDNisar_irq
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x07f4f2ce	hisax_unregister
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x148f0c99	FsmFree
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x2844a899	FsmInitTimer
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x93a64734	FsmChangeState
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x9df0cd27	FsmEvent
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xc0c558f9	FsmRestartTimer
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xcdcfdeca	hisax_init_pcmcia
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xd94696e8	FsmDelTimer
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xee93522c	hisax_register
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xf0a16657	FsmNew
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xfc27303b	HiSax_closecard
+EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x2f452c7f	isacsx_setup
+EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x3252e9c9	isac_init
+EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x3f3b323a	isac_d_l2l1
+EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x5c8d1663	isac_setup
+EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0xccebb5f6	isac_irq
+EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0xe1287dea	isacsx_irq
+EXPORT_SYMBOL drivers/isdn/i4l/isdn 0x19570545	isdn_ppp_register_compressor
+EXPORT_SYMBOL drivers/isdn/i4l/isdn 0x7015a53c	isdn_ppp_unregister_compressor
+EXPORT_SYMBOL drivers/isdn/i4l/isdn 0xfa06820f	isdn_register_divert
+EXPORT_SYMBOL drivers/isdn/i4l/isdn 0xfa87aafc	register_isdn
+EXPORT_SYMBOL drivers/isdn/i4l/isdnhdlc 0x3b71e4fc	isdnhdlc_decode
+EXPORT_SYMBOL drivers/isdn/i4l/isdnhdlc 0x59cc8a7e	isdnhdlc_out_init
+EXPORT_SYMBOL drivers/isdn/i4l/isdnhdlc 0x8ee38862	isdnhdlc_rcv_init
+EXPORT_SYMBOL drivers/isdn/i4l/isdnhdlc 0xfd9d4c09	isdnhdlc_encode
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x0223b468	dchannel_senddata
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x026ead74	l1_event
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x1490365e	recv_Bchannel_skb
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x155b17ca	mISDN_unregister_device
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x1fde2116	mISDN_freedchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x2348cc3c	mISDN_FsmFree
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x247ad834	get_next_dframe
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3ced682c	mISDN_initdchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3ea336fd	mISDN_FsmAddTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3faeb92b	recv_Bchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x429129f2	mISDN_FsmRestartTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x50c2230c	mISDN_FsmChangeState
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x5640d48c	recv_Echannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x5dc7400a	mISDN_clock_update
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x63437861	mISDN_initbchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x6f4f6cdb	mISDN_register_device
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x7283f1fa	recv_Dchannel_skb
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x7c69225c	mISDN_register_Bprotocol
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x7fbc9f71	get_next_bframe
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x8583378c	create_l1
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x87ad1bfe	mISDN_freebchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xace35cae	mISDN_FsmDelTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc28c2b42	mISDN_unregister_Bprotocol
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc296e45e	confirm_Bsend
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc3401729	mISDN_register_clock
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc5811652	bchannel_senddata
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd285995f	mISDN_clock_get
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd5145151	mISDN_FsmEvent
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd9a7fbfd	mISDN_FsmInitTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xda799ace	queue_ch_frame
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe8f617eb	mISDN_unregister_clock
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf81fa52e	mISDN_clear_bchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf9e7832f	mISDN_FsmNew
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xfafe0a76	recv_Dchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0x01087af0	mISDN_dsp_element_unregister
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0x60721da7	dsp_audio_law_to_s32
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0xa215f1b2	dsp_audio_s16_to_law
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0xb98308d8	mISDN_dsp_element_register
+EXPORT_SYMBOL drivers/md/raid6_pq 0x0bd662f6	raid6_gfmul
+EXPORT_SYMBOL drivers/md/raid6_pq 0x15fe0cd3	raid6_gfexp
+EXPORT_SYMBOL drivers/md/raid6_pq 0x5ba93f9d	raid6_gfinv
+EXPORT_SYMBOL drivers/md/raid6_pq 0xb0d904b7	raid6_empty_zero_page
+EXPORT_SYMBOL drivers/md/raid6_pq 0xce45a6f1	raid6_gfexi
+EXPORT_SYMBOL drivers/media/common/tuners/mc44s803 0x9b46d748	mc44s803_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mt2060 0x9a62f941	mt2060_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mt2131 0x81ea94a1	mt2131_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mt2266 0x211ebb74	mt2266_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mxl5005s 0x7fbc88a0	mxl5005s_attach
+EXPORT_SYMBOL drivers/media/common/tuners/qt1010 0x683f519d	qt1010_attach
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0x0cb4b189	tuners
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0xc2821775	tuner_count
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-xc2028 0xa199b39c	xc2028_attach
+EXPORT_SYMBOL drivers/media/common/tuners/xc5000 0x740770cf	xc5000_attach
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x0e7d2473	flexcop_wan_set_speed
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x12a5aa78	flexcop_dma_free
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x1614f243	flexcop_dma_config_timer
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x237ab75e	flexcop_i2c_request
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x438d25e2	flexcop_device_kfree
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x507a8beb	flexcop_dma_control_timer_irq
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x5916006c	flexcop_dump_reg
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x5917c230	flexcop_pass_dmx_packets
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x893b6cde	flexcop_eeprom_check_mac_addr
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xa23353f0	flexcop_dma_config
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xa572b950	flexcop_sram_set_dest
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xa67a3e3e	flexcop_dma_control_size_irq
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xaf0ef3ee	flexcop_pass_dmx_data
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xba069481	flexcop_sram_ctrl
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xbefd2077	flexcop_device_initialize
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xc3dd96ef	flexcop_pid_feed_control
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xcea16b97	flexcop_device_kmalloc
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xe12de4f1	flexcop_device_exit
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xe3563460	flexcop_dma_xfer_control
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xe9d552b9	flexcop_dma_allocate
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x559b3e8a	bt878
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x9e5d406f	bt878_stop
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xa62e9985	bt878_device_control
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xd5d0bdef	bt878_num
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xf27d0ee3	bt878_start
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x5420803d	write_dst
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x7b80abb7	dst_wait_dst_ready
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x925566d4	dst_error_recovery
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x93709c4a	read_dst
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x9aedfa4a	dst_attach
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xa7c2cc08	dst_error_bailout
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xae6431fe	dst_pio_disable
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xc857cbcf	dst_comm_init
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xe94b8c9c	dst_check_sum
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xf9c2acbc	rdc_reset_state
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst_ca 0x2ff758a4	dst_ca_attach
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x028cb090	dvb_ca_en50221_camready_irq
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0c4d4a14	dvb_frontend_sleep_until
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x14eb630c	dvb_ringbuffer_free
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x29bb8312	dvb_register_frontend
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x376969ca	dvb_unregister_device
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x4303d659	dvb_register_device
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x539c1869	dvb_dmx_swfilter_packets
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x57cb9020	dvb_generic_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x5aabc2a6	dvb_unregister_adapter
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x5ff67e07	dvb_generic_ioctl
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6f7f7d73	dvb_ringbuffer_empty
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6f9c72e3	dvb_ringbuffer_read
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x7003f721	dvb_net_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x74a5a698	dvb_filter_pes2ts_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x76bc6b53	dvb_dmx_swfilter_204
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x7d181c8b	dvb_dmx_swfilter
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x80e3832d	dvb_filter_get_ac3info
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x8f132427	dvb_ca_en50221_camchange_irq
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x923aa88e	dvb_ringbuffer_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x92f5b071	dvb_frontend_detach
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xa5c81c03	dvb_dmxdev_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xac4ca1b0	intlog2
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb2db2592	dvb_ringbuffer_write
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb5b95805	dvb_ringbuffer_read_user
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xbc0d91e1	timeval_usec_diff
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xbf98b024	dvb_register_adapter
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xc0e5084c	dvb_frontend_reinitialise
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xc48e560b	dvb_unregister_frontend
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xcf845d68	dvb_dmxdev_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xdc0a3bf5	dvb_ca_en50221_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe023a62f	dvb_net_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe5ae8707	intlog10
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe7949e59	dvb_ringbuffer_flush_spinlock_wakeup
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xeb576d3f	dvb_dmx_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xeb7daf80	dvb_ringbuffer_avail
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf0139c8d	dvb_generic_open
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf49ca7b0	dvb_dmx_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf66b74f9	dvb_ca_en50221_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf826deb0	dvb_filter_pes2ts
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf8aa5ebf	dvb_ca_en50221_frda_irq
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x141d9006	usb_cypress_load_firmware
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x1cc30992	dvb_usb_device_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x341ddb25	dvb_usb_get_hexline
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x52ce9246	dvb_usb_device_exit
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x693b0f5f	dvb_usb_nec_rc_key_to_event
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x787ffc22	dvb_usb_generic_write
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x992b153c	dvb_usb_generic_rw
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x2639a2ea	af9005_rc_decode
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x3693500b	af9005_rc_keys
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0xd3383957	af9005_rc_keys_size
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x04d7d66a	dibusb2_0_streaming_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x1f6f3422	dibusb_pid_filter_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x29fda9ab	dibusb_dib3000mc_tuner_attach
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x42e50eac	dibusb_dib3000mc_frontend_attach
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x507042f2	dibusb_pid_filter
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x5579bd9d	dibusb_read_eeprom_byte
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x7756f0f9	dibusb_streaming_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x7ad32aa5	dibusb_rc_query
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xcaab05ce	dibusb2_0_power_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xcc9ccaff	dibusb_rc_keys
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xe7a69816	dibusb_i2c_algo
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xf7da81f8	dibusb_power_ctrl
+EXPORT_SYMBOL drivers/media/dvb/frontends/af9013 0x451d1628	af9013_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/au8522 0x3374a92c	au8522_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/bcm3510 0x3811f70a	bcm3510_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx22700 0x07246c06	cx22700_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx22702 0x2fb597de	cx22702_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24110 0xf595bec9	cx24110_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0x6fff1402	cx24113_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0xbdedc92e	cx24113_agc_callback
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24116 0x60bc6995	cx24116_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0x97e3abe6	cx24123_get_tuner_i2c_adapter
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0xa292be89	cx24123_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0xa61d26bb	dib0070_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0xccc1ec1a	dib0070_wbd_offset
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0xe425f111	dib0070_ctrl_agc_filter
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mb 0x6f598a79	dib3000mb_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x4b681bec	dib3000mc_set_config
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x73feb51c	dib3000mc_i2c_enumeration
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x8defabb0	dib3000mc_pid_control
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x99edba20	dib3000mc_pid_parse
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xb4a97109	dib3000mc_get_tuner_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xc6015f8c	dib3000mc_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0x15c33aea	dib7000m_get_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0x6d9cfe7b	dib7000m_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x27633049	dib7000p_set_gpio
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x4fe06472	dib7000p_get_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x6b9d5b69	dib7000p_set_wbd_ref
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x93793d66	dib7000p_i2c_enumeration
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xd333d668	dib7000p_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xeb1d690e	dib7000pc_detection
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x18f95974	dib8000_i2c_enumeration
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x42a0eee5	dib8000_set_wbd_ref
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x4c5722b6	dib8000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0xa3eb3e9d	dib8000_set_gpio
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0xbfef3a99	dib8000_get_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x6ba6b21f	dibx000_init_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x87aed3b6	dibx000_get_i2c_adapter
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0xc3d3cd43	dibx000_reset_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0xd094f742	dibx000_exit_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dvb-pll 0x5f5db4c4	dvb_pll_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/isl6405 0x8a94351b	isl6405_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/isl6421 0x038d9978	isl6421_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/isl6423 0xc38dd6a1	isl6423_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/itd1000 0x57ca2ab3	itd1000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/l64781 0xfccf1876	l64781_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt3305 0x92b89f29	lgdt3305_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt330x 0x2b0ac0ab	lgdt330x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lgs8gxx 0xfdbf6ddb	lgs8gxx_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0x91da0eab	lnbp21_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0xe2e04f12	lnbh24_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/mt312 0x4c4fca13	mt312_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/mt352 0xc5e3af01	mt352_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/nxt200x 0x06fb63b7	nxt200x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/nxt6000 0xb3c94e3b	nxt6000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/or51132 0x16b2c8f6	or51132_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/or51211 0x692dde69	or51211_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1409 0xf963c096	s5h1409_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1411 0x86805e48	s5h1411_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0x447a525b	s5h1420_get_tuner_i2c_adapter
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0x58e1bbe9	s5h1420_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/si21xx 0x21693a75	si21xx_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/sp8870 0xfc36a8cf	sp8870_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/sp887x 0x680a8b7d	sp887x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stb0899 0xee2e6961	stb0899_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stb6000 0x26b11dd2	stb6000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stb6100 0xd95c88ea	stb6100_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0288 0xee5c0705	stv0288_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0297 0x1c9c1492	stv0297_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0299 0xab2566ad	stv0299_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0900 0xbfa5a05f	stv0900_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv090x 0xe31d0636	stv090x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv6110 0xb10fe981	stv6110_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv6110x 0x6484abbb	stv6110x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10021 0x7e9758f0	tda10021_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10023 0xcb77dc71	tda10023_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10048 0xda3bd636	tda10048_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0xb643e038	tda10046_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0xd7271432	tda10045_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10086 0x159a60e4	tda10086_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda8083 0x28e26533	tda8083_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda8261 0x562d40cf	tda8261_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda826x 0x05914aec	tda826x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tua6100 0xfdbd3eac	tua6100_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/ves1820 0x541f09ae	ves1820_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/ves1x93 0xabfa08c9	ves1x93_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/zl10036 0x351d524e	zl10036_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/zl10039 0xd673d532	zl10039_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/zl10353 0x69984d76	zl10353_attach
+EXPORT_SYMBOL drivers/media/dvb/ttpci/ttpci-eeprom 0x12ce8804	ttpci_eeprom_parse_mac
+EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0xcaefd996	ttusbdecfe_dvbt_attach
+EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0xe128d85c	ttusbdecfe_dvbs_attach
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x11dc4b6d	bttv_gpio_enable
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x8762b1c7	bttv_sub_register
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x8ecf4acc	bttv_write_gpio
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xb42d85c6	bttv_sub_unregister
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xbcf2d2fb	bttv_read_gpio
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xc044888b	bttv_get_pcidev
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0x23261138	btcx_riscmem_free
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0x41ef689d	btcx_riscmem_alloc
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0x495e4b0c	btcx_calc_skips
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xad2fe38b	btcx_sort_clips
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xc368f8e6	btcx_align
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xcda0ded2	btcx_screen_clips
+EXPORT_SYMBOL drivers/media/video/cpia 0xfd826f4b	cpia_register_camera
+EXPORT_SYMBOL drivers/media/video/cpia 0xfe34e03f	cpia_unregister_camera
+EXPORT_SYMBOL drivers/media/video/cx18/cx18 0x2cdea06d	cx18_reset_ir_gpio
+EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0xa79a26e5	cx231xx_unregister_extension
+EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0xd049a38b	cx231xx_register_extension
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x155650f3	cx2341x_ctrl_get_menu
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x1ca0c084	cx2341x_log_status
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x2f25eee2	cx2341x_update
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x5b88faf6	cx2341x_ext_ctrls
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf76ce95	cx2341x_fill_defaults
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf8b77a4	cx2341x_mpeg_ctrls
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xe2c2b5eb	cx2341x_ctrl_query
+EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0xaf1a789d	vp3054_i2c_remove
+EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0xb0b198bb	vp3054_i2c_probe
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x3bf3e8bd	cx88_set_freq
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x4828b8c8	cx8800_ctrl_query
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x4a1f6883	cx88_set_control
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xac4e53b9	cx88_user_ctrls
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xd0658c2f	cx88_enum_input
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xe09fd567	cx88_video_mux
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xf3e87287	cx88_get_control
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x01daf8f9	cx8802_unregister_driver
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x11c3bd33	cx8802_register_driver
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x5f287dd1	cx8802_cancel_buffers
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x8a7b126b	cx8802_buf_prepare
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x9994075b	cx8802_get_driver
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xb4fd99e3	cx8802_buf_queue
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xcb438ac0	cx8802_get_device
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x16e74de5	cx88_newstation
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x20112f78	cx88_set_tvnorm
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x2d00936c	cx88_shutdown
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x2d526962	cx88_risc_databuffer
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x39339d7a	cx88_reset
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x50f75426	cx88_core_get
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x543917e9	cx88_sram_channel_setup
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x6141c8c5	cx88_tuner_callback
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x6183013c	cx88_free_buffer
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x6cadb4c1	cx88_wakeup
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x75075054	cx88_get_stereo
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x904b8696	cx88_audio_thread
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x97a8f42c	cx88_dsp_detect_stereo_sap
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x9b140fff	cx88_sram_channels
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xa7e877f9	cx88_set_stereo
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xab0ec10e	cx88_risc_buffer
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb20838fc	cx88_set_scale
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb47f6cda	cx88_print_irqbits
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb5dd507d	cx88_sram_channel_dump
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb7d0d8c9	cx88_ir_stop
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xbd8a0d56	cx88_core_irq
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xbec7d183	cx88_ir_start
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xc3f28453	cx88_vdev_init
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xeab5fa5d	cx88_core_put
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xebd2519c	cx88_risc_stopper
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xfcbab81e	cx88_set_tvaudio
+EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0x05d1912a	em28xx_register_extension
+EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0x7c96fbfd	em28xx_unregister_extension
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x03bf2048	gspca_dev_probe
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x08880020	gspca_resume
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x3f7034df	gspca_frame_add
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x5a776263	gspca_auto_gain_n_exposure
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x7b9f87d4	gspca_disconnect
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x9670af2c	gspca_debug
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xa6bf0250	gspca_get_i_frame
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xe6a7b595	gspca_suspend
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x03ebfa16	ivtv_init_on_first_open
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x0b108519	ivtv_vapi_result
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x14f67530	ivtv_debug
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x15d931aa	ivtv_api
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x494a1d93	ivtv_udma_alloc
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x624946a6	ivtv_udma_prepare
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x80600060	ivtv_set_irq_mask
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xa5075e9b	ivtv_clear_irq_mask
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xdc1038f7	ivtv_vapi
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xe44d7f07	ivtv_udma_unmap
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xe65a5cf2	ivtv_udma_setup
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xf41c3056	ivtv_reset_ir_gpio
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x042f775f	saa7134_set_gpio
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x04e83446	saa7134_tuner_callback
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x1211df5d	saa7134_devlist
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x14dfecc6	saa7134_boards
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x1d574bb5	saa7134_ts_unregister
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x2c4b98eb	saa7134_pgtable_alloc
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x530a17d8	saa7134_devlist_lock
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x5753b137	saa7134_tvaudio_setmute
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x8646d2de	saa7134_dmasound_init
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xa303f9c8	saa7134_set_dmabits
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xb3f9280d	saa7134_dmasound_exit
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xba4af247	saa_dsp_writel
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xc6254b1e	saa7134_pgtable_build
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xd3d85fb1	saa7134_pgtable_free
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xf4a09adf	saa7134_ts_register
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x0770dc39	soc_camera_host_unregister
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x154df8de	soc_camera_xlate_by_fourcc
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x555648b2	soc_camera_apply_sensor_flags
+EXPORT_SYMBOL drivers/media/video/soc_camera 0xd981c71a	soc_camera_host_register
+EXPORT_SYMBOL drivers/media/video/soc_camera 0xefaa707c	soc_camera_format_by_fourcc
+EXPORT_SYMBOL drivers/media/video/tveeprom 0x0a033382	tveeprom_read
+EXPORT_SYMBOL drivers/media/video/tveeprom 0xbeecb0eb	tveeprom_hauppauge_analog
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x16a2915c	RingQueue_Dequeue
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x2e6efb4b	usbvideo_RegisterVideoDevice
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x407a321c	RingQueue_WakeUpInterruptible
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x60438d8b	usbvideo_DeinterlaceFrame
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x8266d34f	usbvideo_Deregister
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xae6b7aea	usbvideo_TestPattern
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xce9217d4	usbvideo_AllocateDevice
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xddecac6d	RingQueue_Enqueue
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xf5011f67	RingQueue_Flush
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xf5a2b9ae	usbvideo_register
+EXPORT_SYMBOL drivers/media/video/v4l1-compat 0xfdfe499c	v4l_compat_translate_ioctl
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x03165a85	v4l2_ctrl_get_menu
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1dcaa0c8	v4l2_prio_max
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1e326b97	v4l2_ctrl_query_fill
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x2f639468	v4l2_prio_check
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x42c8e001	v4l2_ctrl_next
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x495426ee	v4l2_ctrl_get_name
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x4ed5e0d7	v4l2_chip_match_host
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x50766d69	v4l2_ctrl_query_menu_valid_items
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x76ba9a9a	v4l2_prio_open
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x8d800de3	v4l2_chip_match_i2c_client
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x918b1386	v4l2_chip_ident_i2c_client
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x95284709	v4l2_prio_close
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9c7de443	v4l2_prio_change
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9eb43ee2	v4l2_ctrl_check
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0xbecd2858	v4l2_prio_init
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0xd9ee1e3f	v4l2_ctrl_query_menu
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x24495e1d	videobuf_dvb_dealloc_frontends
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x459044df	videobuf_dvb_find_frontend
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x91cbf9e6	videobuf_dvb_get_frontend
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xa5fc9c93	videobuf_dvb_unregister_bus
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xdd95b4bf	videobuf_dvb_alloc_frontend
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xe0648782	videobuf_dvb_register_bus
+EXPORT_SYMBOL drivers/media/video/videodev 0x0614dd5a	v4l2_video_std_frame_period
+EXPORT_SYMBOL drivers/media/video/videodev 0x123959a1	v4l2_type_names
+EXPORT_SYMBOL drivers/media/video/videodev 0x1d687ec7	video_device_alloc
+EXPORT_SYMBOL drivers/media/video/videodev 0x2d2594b2	video_unregister_device
+EXPORT_SYMBOL drivers/media/video/videodev 0x3adbd595	v4l2_field_names
+EXPORT_SYMBOL drivers/media/video/videodev 0x3b2bd9f6	video_register_device_no_warn
+EXPORT_SYMBOL drivers/media/video/videodev 0x484d1764	video_device_release_empty
+EXPORT_SYMBOL drivers/media/video/videodev 0x5ebefe4b	v4l_printk_ioctl
+EXPORT_SYMBOL drivers/media/video/videodev 0x61ebc583	video_device_release
+EXPORT_SYMBOL drivers/media/video/videodev 0x6adafbb5	video_devdata
+EXPORT_SYMBOL drivers/media/video/videodev 0x777d0367	video_register_device
+EXPORT_SYMBOL drivers/media/video/videodev 0xa9f8429c	video_ioctl2
+EXPORT_SYMBOL drivers/media/video/videodev 0xe2b92059	v4l2_video_std_construct
+EXPORT_SYMBOL drivers/media/video/videodev 0xf3251e7b	v4l2_norm_to_name
+EXPORT_SYMBOL drivers/media/video/videodev 0xf7249d06	video_usercopy
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x7e11e12e	videocodec_register
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0xcc8b396d	videocodec_unregister
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0xcebadbd3	videocodec_detach
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0xecac1f82	videocodec_attach
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x0ebebda3	memstick_remove_host
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x334ded89	memstick_register_driver
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x3ef1254e	memstick_alloc_host
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x40fea5a4	memstick_new_req
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x45e8648f	memstick_suspend_host
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x5b5c17c8	memstick_init_req_sg
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x805913cf	memstick_unregister_driver
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x8925d443	memstick_add_host
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x8c9b5da4	memstick_init_req
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xaf7dc262	memstick_detect_change
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xb1cc5438	memstick_next_req
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xb705ab51	memstick_set_rw_addr
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xc8beef40	memstick_resume_host
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xde2a48bf	memstick_free_host
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x0803e3b7	mpt_print_ioc_summary
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x0d5ca3d2	mpt_GetIocState
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x191ec28c	mpt_reset_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x1aacffa7	mpt_clear_taskmgmt_in_progress_flag
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x389dbe13	mpt_raid_phys_disk_pg0
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x39cdb356	mpt_get_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x3f1a175c	mpt_config
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4526289b	mpt_event_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x46f43d1b	mpt_findImVolumes
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x502108d0	mpt_fwfault_debug
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x50256ce7	mpt_halt_firmware
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x58d18c12	mpt_put_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x58d51d32	mpt_raid_phys_disk_pg1
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x6e0a91b4	mpt_alloc_fw_memory
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x7e5a7d1f	mpt_HardResetHandler
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x940cd6fa	mpt_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x98161f26	mpt_device_driver_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xa12f4f2b	mpt_resume
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xab7d1620	mpt_free_fw_memory
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xac750a85	mpt_verify_adapter
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xaf0d5a39	mpt_detach
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xb155dbc9	mpt_raid_phys_disk_get_num_paths
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xb8ba1097	mpt_set_taskmgmt_in_progress_flag
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xbd3d0667	mpt_suspend
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc0e69f82	mpt_device_driver_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc47c22e8	mpt_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc504e22b	mpt_free_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc717318a	mptbase_sas_persist_operation
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xce72900c	mpt_put_msg_frame_hi_pri
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd968fccf	mpt_attach
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd9a92a75	mpt_reset_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xdd805159	ioc_list
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xfa738711	mpt_event_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xfeaa7638	mpt_send_handshake_request
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x0a006cc7	mptscsih_raid_id_to_num
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x14874a2c	mptscsih_info
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x1bf6ad3d	mptscsih_slave_destroy
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x2e9af643	mptscsih_io_done
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x2eeb4252	mptscsih_shutdown
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x354005c3	mptscsih_dev_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x382540be	mptscsih_get_scsi_lookup
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x3ed4b57e	mptscsih_scandv_complete
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x3fa7a600	mptscsih_host_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x468e2ee7	mptscsih_IssueTaskMgmt
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x5739e07d	mptscsih_remove
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x724cc596	mptscsih_host_attrs
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x7e92b090	mptscsih_bios_param
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x8ef461da	mptscsih_is_phys_disk
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x9c986e28	mptscsih_proc_info
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xb762f5e5	mptscsih_taskmgmt_complete
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xc6fc3857	mptscsih_resume
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xc8cacc6a	mptscsih_bus_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xd20acfaa	mptscsih_taskmgmt_response_code
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xd4840090	mptscsih_slave_configure
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xdde76967	mptscsih_ioc_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xdde8be38	mptscsih_abort
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xde266210	mptscsih_event_process
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xf139bd36	mptscsih_qcmd
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xf3bd6ea2	mptscsih_suspend
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xfc817b7d	mptscsih_change_queue_depth
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x0c439042	i2o_device_claim_release
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x0ca441d8	i2o_driver_notify_controller_remove_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x159ad73f	i2o_iop_find_device
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x25fda221	i2o_parm_table_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2a843bef	i2o_dump_message
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x30b0aa07	i2o_msg_get_wait
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x7301da86	i2o_status_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x7a12d9f8	i2o_exec_lct_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x9abf620f	i2o_driver_register
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xa444e83f	i2o_driver_notify_device_remove_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xa742433c	i2o_driver_notify_controller_add_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb4c00dcf	i2o_controllers
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xbd307d80	i2o_msg_post_wait_mem
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xcb607a5d	i2o_event_register
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xceda7ec3	i2o_driver_notify_device_add_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xd404c6a8	i2o_parm_field_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xd5e495d3	i2o_driver_unregister
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xe6574f27	i2o_parm_issue
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xf31ccf9c	i2o_device_claim
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xf952b602	i2o_find_iop
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x136027c3	ab3100_set_register_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x1d817b91	ab3100_get_register_page_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x37714fc2	ab3100_event_registers_startup_state_get
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x50726d72	ab3100_get_chip_type
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x5800bd54	ab3100_mask_and_set_register_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xc0a86d0b	ab3100_event_register
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xc7eeada8	ab3100_event_unregister
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xe610e2e6	ab3100_get_register_interruptible
+EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x7a5af6e0	pasic3_read_register
+EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x9595f403	pasic3_write_register
+EXPORT_SYMBOL drivers/mfd/mfd-core 0x7d99472e	mfd_add_devices
+EXPORT_SYMBOL drivers/mfd/mfd-core 0x80914636	mfd_remove_devices
+EXPORT_SYMBOL drivers/mfd/tps65010 0x02d4ad0f	tps65013_set_low_pwr
+EXPORT_SYMBOL drivers/mfd/tps65010 0x28485130	tps65010_config_vregs1
+EXPORT_SYMBOL drivers/mfd/tps65010 0x33739de7	tps65010_set_vib
+EXPORT_SYMBOL drivers/mfd/tps65010 0x9fd44c69	tps65010_set_led
+EXPORT_SYMBOL drivers/mfd/tps65010 0xb14080cc	tps65010_set_low_pwr
+EXPORT_SYMBOL drivers/mfd/tps65010 0xd5bb106d	tps65010_set_vbus_draw
+EXPORT_SYMBOL drivers/mfd/tps65010 0xe99b3f36	tps65010_set_gpio_out_value
+EXPORT_SYMBOL drivers/misc/c2port/core 0x0175f1f3	c2port_device_unregister
+EXPORT_SYMBOL drivers/misc/c2port/core 0x4993481d	c2port_device_register
+EXPORT_SYMBOL drivers/misc/ioc4 0x90766f6d	ioc4_unregister_submodule
+EXPORT_SYMBOL drivers/misc/ioc4 0xa033c72e	ioc4_register_submodule
+EXPORT_SYMBOL drivers/misc/tifm_core 0x026bf296	tifm_unregister_driver
+EXPORT_SYMBOL drivers/misc/tifm_core 0x17d421ca	tifm_queue_work
+EXPORT_SYMBOL drivers/misc/tifm_core 0x4a0aacd2	tifm_eject
+EXPORT_SYMBOL drivers/misc/tifm_core 0x4e4397c0	tifm_has_ms_pif
+EXPORT_SYMBOL drivers/misc/tifm_core 0x54d1eb87	tifm_free_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0x5f9ab970	tifm_add_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0x8bb9ceab	tifm_register_driver
+EXPORT_SYMBOL drivers/misc/tifm_core 0xa08947d6	tifm_remove_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0xaef175e7	tifm_map_sg
+EXPORT_SYMBOL drivers/misc/tifm_core 0xbc4aba30	tifm_alloc_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0xbdc0630a	tifm_alloc_device
+EXPORT_SYMBOL drivers/misc/tifm_core 0xeec23b69	tifm_unmap_sg
+EXPORT_SYMBOL drivers/misc/tifm_core 0xfac9875d	tifm_free_device
+EXPORT_SYMBOL drivers/mmc/card/mmc_block 0xf12c11c1	mmc_cleanup_queue
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x11ac5da7	cfi_fixup
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x389c4ba6	cfi_read_pri
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0xd45045c4	cfi_varsize_frob
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x417dd822	do_map_probe
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x7a2c7d38	map_destroy
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x7aed2d12	register_mtd_chip_driver
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x7d67f82a	unregister_mtd_chip_driver
+EXPORT_SYMBOL drivers/mtd/chips/gen_probe 0x50606bca	mtd_do_chip_probe
+EXPORT_SYMBOL drivers/mtd/lpddr/lpddr_cmds 0x73f7c010	lpddr_cmdset
+EXPORT_SYMBOL drivers/mtd/maps/map_funcs 0x69305298	simple_map_init
+EXPORT_SYMBOL drivers/mtd/mtd 0x9a6c7bad	del_mtd_partitions
+EXPORT_SYMBOL drivers/mtd/mtd 0xebbdc6e9	add_mtd_partitions
+EXPORT_SYMBOL drivers/mtd/mtdconcat 0x63e5f709	mtd_concat_create
+EXPORT_SYMBOL drivers/mtd/mtdconcat 0xbf91f185	mtd_concat_destroy
+EXPORT_SYMBOL drivers/mtd/nand/nand 0x6a6877de	nand_scan_bbt
+EXPORT_SYMBOL drivers/mtd/nand/nand 0x782bddb5	nand_default_bbt
+EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0xaea16757	nand_correct_data
+EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0xb4b94377	__nand_correct_data
+EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0xd6d0fd3a	nand_calculate_ecc
+EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0x836bdb72	nand_flash_ids
+EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0xa336feb7	nand_manuf_ids
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x24cce386	flexonenand_region
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x96be1358	onenand_scan_bbt
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0xd58724c8	onenand_addr
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0xf4c04898	onenand_default_bbt
+EXPORT_SYMBOL drivers/net/8390 0x04074ea1	ei_netdev_ops
+EXPORT_SYMBOL drivers/net/8390 0x137dc781	ei_get_stats
+EXPORT_SYMBOL drivers/net/8390 0x1923fa47	__alloc_ei_netdev
+EXPORT_SYMBOL drivers/net/8390 0x1e9461c9	ei_close
+EXPORT_SYMBOL drivers/net/8390 0x30cd37d4	NS8390_init
+EXPORT_SYMBOL drivers/net/8390 0x39fe973b	ei_set_multicast_list
+EXPORT_SYMBOL drivers/net/8390 0x75ae5950	ei_tx_timeout
+EXPORT_SYMBOL drivers/net/8390 0x8bb1e966	ei_poll
+EXPORT_SYMBOL drivers/net/8390 0xa0adb179	ei_open
+EXPORT_SYMBOL drivers/net/8390 0xbfd76998	ei_start_xmit
+EXPORT_SYMBOL drivers/net/8390 0xdd365790	ei_interrupt
+EXPORT_SYMBOL drivers/net/8390p 0x0cd73975	NS8390p_init
+EXPORT_SYMBOL drivers/net/8390p 0x202cf1fe	eip_poll
+EXPORT_SYMBOL drivers/net/8390p 0x214e91ca	eip_set_multicast_list
+EXPORT_SYMBOL drivers/net/8390p 0x2bee06ea	__alloc_eip_netdev
+EXPORT_SYMBOL drivers/net/8390p 0x4e0c9ac5	eip_tx_timeout
+EXPORT_SYMBOL drivers/net/8390p 0x6936db25	eip_start_xmit
+EXPORT_SYMBOL drivers/net/8390p 0x6bfc8d56	eip_close
+EXPORT_SYMBOL drivers/net/8390p 0x94020d8f	eip_netdev_ops
+EXPORT_SYMBOL drivers/net/8390p 0xa2e2b2bb	eip_open
+EXPORT_SYMBOL drivers/net/8390p 0xac23a03d	eip_get_stats
+EXPORT_SYMBOL drivers/net/8390p 0xb663e226	eip_interrupt
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x1688e8b4	arcnet_unregister_proto
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x1f3bdd0c	arcnet_close
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x1f76e7b0	arcnet_open
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x23f86078	arcnet_interrupt
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x290a2e06	arc_raw_proto
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x340a871d	arc_bcast_proto
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x424c9451	arcnet_send_packet
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x6534792a	arcnet_debug
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xa7c5e234	arcnet_timeout
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xcc204085	arc_proto_map
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xd92911ce	alloc_arcdev
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xdffeecb8	arc_proto_default
+EXPORT_SYMBOL drivers/net/arcnet/com20020 0x1ef896fe	com20020_found
+EXPORT_SYMBOL drivers/net/arcnet/com20020 0x65affe81	com20020_check
+EXPORT_SYMBOL drivers/net/arcnet/com20020 0xbeba7297	com20020_netdev_ops
+EXPORT_SYMBOL drivers/net/bnx2 0x42e43864	bnx2_cnic_probe
+EXPORT_SYMBOL drivers/net/cnic 0x3c7d97b1	cnic_register_driver
+EXPORT_SYMBOL drivers/net/cnic 0x636af174	cnic_unregister_driver
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x0b209ee9	t3_l2t_get
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x239bc394	cxgb3_register_client
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x2f92671d	t3_l2t_send_slow
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x534010b5	cxgb3_free_stid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x7e715317	cxgb3_alloc_atid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xa1a5d5e3	cxgb3_insert_tid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xa5a6c4aa	cxgb3_alloc_stid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xa8355ebe	dev2t3cdev
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xae8bbed9	cxgb3_ofld_send
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xb2f7b598	cxgb3_free_atid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xb419bbd2	t3_l2e_free
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xb5907876	cxgb3_queue_tid_release
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xc2604a9e	t3_register_cpl_handler
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xd7406b8a	cxgb3_unregister_client
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xd834ee8c	cxgb3_remove_tid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xea4083fc	t3_l2t_send_event
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x3307d54a	hdlcdrv_transmitter
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x4f1d12a2	hdlcdrv_arbitrate
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x64ea080c	hdlcdrv_unregister
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xbaa01614	hdlcdrv_receiver
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xc810bf70	hdlcdrv_register
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x08dd7dfa	sirdev_receive
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x57103403	sirdev_put_instance
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x7269b570	sirdev_set_dtr_rts
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x7717cee8	sirdev_raw_read
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x803981c2	sirdev_raw_write
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x86c640ab	sirdev_set_dongle
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x975bea16	sirdev_get_instance
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xc5e6d606	irda_unregister_dongle
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xde0702e9	irda_register_dongle
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xfe3a763f	sirdev_write_complete
+EXPORT_SYMBOL drivers/net/mdio 0x0f934475	mdio45_ethtool_gset_npage
+EXPORT_SYMBOL drivers/net/mdio 0x22bce513	mdio_mii_ioctl
+EXPORT_SYMBOL drivers/net/mdio 0x43e4defc	mdio45_nway_restart
+EXPORT_SYMBOL drivers/net/mdio 0x7577f992	mdio_set_flag
+EXPORT_SYMBOL drivers/net/mdio 0xa1a29548	mdio45_probe
+EXPORT_SYMBOL drivers/net/mdio 0xb34a7575	mdio45_ethtool_spauseparam_an
+EXPORT_SYMBOL drivers/net/mdio 0xc6b1163f	mdio45_links_ok
+EXPORT_SYMBOL drivers/net/mii 0x2d856a82	mii_link_ok
+EXPORT_SYMBOL drivers/net/mii 0x3b0217ef	mii_check_link
+EXPORT_SYMBOL drivers/net/mii 0x69f9f62a	generic_mii_ioctl
+EXPORT_SYMBOL drivers/net/mii 0x74eb7a48	mii_ethtool_sset
+EXPORT_SYMBOL drivers/net/mii 0x9e0f7fc1	mii_check_gmii_support
+EXPORT_SYMBOL drivers/net/mii 0xb10ac92a	mii_check_media
+EXPORT_SYMBOL drivers/net/mii 0xc2d3d844	mii_ethtool_gset
+EXPORT_SYMBOL drivers/net/mii 0xdd40ab19	mii_nway_restart
+EXPORT_SYMBOL drivers/net/pppox 0x5585da48	pppox_unbind_sock
+EXPORT_SYMBOL drivers/net/pppox 0x5d23c7e2	register_pppox_proto
+EXPORT_SYMBOL drivers/net/pppox 0xe0ff7a18	unregister_pppox_proto
+EXPORT_SYMBOL drivers/net/pppox 0xf65113ca	pppox_ioctl
+EXPORT_SYMBOL drivers/net/sungem_phy 0xa35fb18a	mii_phy_probe
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x3b2f15e2	tmsdev_init
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x5612ee26	tms380tr_close
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x923b2a4d	tms380tr_open
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x9873ee02	tms380tr_netdev_ops
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd2328794	tms380tr_wait
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd49af46e	tms380tr_interrupt
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xfd2b279a	tmsdev_term
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x38da4725	cycx_intr
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x62be23ea	cycx_setup
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x66a4c4e6	cycx_down
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x968458a6	cycx_peek
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xb6f383de	cycx_poke
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xfe7cd576	cycx_exec
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x187a4104	hdlc_change_mtu
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x36058962	detach_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x3854ac10	attach_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x3ae8771c	unregister_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x490808f0	hdlc_ioctl
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x50b7d4ad	hdlc_close
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x50ca158b	hdlc_open
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x58c15daa	alloc_hdlcdev
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x6c8b5f43	unregister_hdlc_device
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x8d9eab13	register_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xb1e4cb3b	hdlc_start_xmit
+EXPORT_SYMBOL drivers/net/wan/z85230 0x03079d3c	z8530_describe
+EXPORT_SYMBOL drivers/net/wan/z85230 0x10c78988	z8530_dead_port
+EXPORT_SYMBOL drivers/net/wan/z85230 0x213abac6	z8530_interrupt
+EXPORT_SYMBOL drivers/net/wan/z85230 0x4d23d22a	z8530_sync_dma_open
+EXPORT_SYMBOL drivers/net/wan/z85230 0x5199cebf	z8530_shutdown
+EXPORT_SYMBOL drivers/net/wan/z85230 0x59f63198	z8530_sync
+EXPORT_SYMBOL drivers/net/wan/z85230 0x5cd24d29	z8530_hdlc_kilostream
+EXPORT_SYMBOL drivers/net/wan/z85230 0x817991ba	z8530_sync_close
+EXPORT_SYMBOL drivers/net/wan/z85230 0x8bf2c8cd	z8530_sync_txdma_open
+EXPORT_SYMBOL drivers/net/wan/z85230 0x9b5f1642	z8530_sync_dma_close
+EXPORT_SYMBOL drivers/net/wan/z85230 0xa5f7b083	z8530_sync_txdma_close
+EXPORT_SYMBOL drivers/net/wan/z85230 0xb170573e	z8530_sync_open
+EXPORT_SYMBOL drivers/net/wan/z85230 0xc6e6e257	z8530_queue_xmit
+EXPORT_SYMBOL drivers/net/wan/z85230 0xcaa5ae92	z8530_null_rx
+EXPORT_SYMBOL drivers/net/wan/z85230 0xcb2a800f	z8530_nop
+EXPORT_SYMBOL drivers/net/wan/z85230 0xd1a0ce04	z8530_channel_load
+EXPORT_SYMBOL drivers/net/wan/z85230 0xd69d403a	z8530_init
+EXPORT_SYMBOL drivers/net/wan/z85230 0xe3d80064	z8530_hdlc_kilostream_85230
+EXPORT_SYMBOL drivers/net/wireless/airo 0xe014a28d	stop_airo_card
+EXPORT_SYMBOL drivers/net/wireless/airo 0xe1a94bae	init_airo_card
+EXPORT_SYMBOL drivers/net/wireless/airo 0xeb831b37	reset_airo_card
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x1f532266	ath_reg_notifier_apply
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x31219afb	ath_is_world_regd
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x91e4a35f	ath_regd_init
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xbe25b39d	ath_regd_get_band_ctl
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xd4087dcd	ath_rxbuf_alloc
+EXPORT_SYMBOL drivers/net/wireless/atmel 0x12d2e6d5	atmel_open
+EXPORT_SYMBOL drivers/net/wireless/atmel 0x2c4fafc3	stop_atmel_card
+EXPORT_SYMBOL drivers/net/wireless/atmel 0x9b7fe6ab	init_atmel_card
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x04fb83ea	hostap_info_process
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x2d476e99	hostap_master_start_xmit
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x30d8cd1e	hostap_set_hostapd_sta
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x36e76a6d	hostap_remove_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x3e4e24a8	hostap_init_data
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x3fdbe0d1	hostap_set_word
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x41145bdb	hostap_add_interface
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x4fa3890f	hostap_remove_interface
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x5049dade	hostap_80211_rx
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x5092804a	hostap_free_data
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x6910add6	hostap_set_encryption
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x6cd8335a	hostap_set_auth_algs
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x760e0a85	hostap_set_antsel
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x7f010193	hostap_info_init
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x7f55a924	hostap_set_multicast_list_queue
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x84e0e016	hostap_check_sta_fw_version
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x91aa3f69	hostap_80211_ops
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x999e7fae	hostap_handle_sta_tx_exc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa12ad27f	hostap_dump_tx_header
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb2a945e0	hostap_dump_rx_header
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb4b77c8b	hostap_80211_get_hdrlen
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb6fc7ba6	hostap_set_string
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xbf94ce0c	hostap_set_roaming
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xc3b40906	prism2_update_comms_qual
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xc6e0d109	hostap_set_hostapd
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xcc69f590	hostap_init_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xd145fb4b	hostap_setup_dev
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xd5c03f55	hostap_init_ap_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xe84eed78	hostap_get_porttype
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x096007f2	libipw_get_geo
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x0ef49f8d	libipw_wx_get_scan
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x14cf26ad	libipw_wx_get_encodeext
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x17dda043	libipw_is_valid_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x1c119d6f	libipw_wx_set_encodeext
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x2dcf49ce	libipw_freq_to_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x55c3664e	libipw_xmit
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x620322b3	libipw_get_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x679696cb	libipw_rx_mgt
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x6805558c	libipw_rx
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x7107b589	free_ieee80211
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x7cda90e1	libipw_networks_age
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x82d1bdd7	alloc_ieee80211
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x888e979b	libipw_get_channel_flags
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xa3e93bc9	libipw_wx_set_encode
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xaafa0978	libipw_channel_to_index
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xaeeed79c	libipw_txb_free
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xbdbf3060	libipw_set_geo
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xe363ddc3	libipw_wx_get_encode
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xe41dac4f	libipw_channel_to_freq
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xfec393df	libipw_change_mtu
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x01809b1c	iwl_scan_cancel
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x02204169	iwl_free_tfds_in_queue
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x059d1c4b	iwl_chain_noise_calibration
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x08306429	iwl_init_channel_map
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0936eba3	iwl_uninit_drv
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0a98b9ea	iwl_sta_rx_agg_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0bdf6701	iwl_mac_add_interface
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x10f0321e	iwl_free_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x15274964	iwlcore_eeprom_release_semaphore
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x19f0e900	iwl_debug_level
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1a58da06	iwl_rx_replenish_now
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1abf890b	iwl_init_drv
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1b758bcf	iwl_get_active_dwell_time
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d77b399	iwl_bcast_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1dc55365	iwl_tt_initialize
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x283d5261	iwl_mac_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2860781c	iwl_bss_info_changed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2a0cedc2	iwl_set_rxon_channel
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2dcd25b3	iwl_scan_cancel_timeout
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3005fcde	iwl_send_statistics_request
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x34ab5d0b	iwl_send_cmd_sync
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x37c0433e	iwl_sta_tx_modify_enable_tid
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3a9f4b2a	iwl_verify_ucode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3b6bb244	iwl_send_static_wepkey_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3b99c020	iwl_alloc_all
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3d48ba07	iwl_rf_kill_ct_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3d5879d1	iwl_eeprom_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3dabec68	iwl_mac_reset_tsf
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4125400e	iwl_ht_enabled
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x44831e25	iwlcore_eeprom_enhanced_txpower
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4552ec3c	iwl_txq_check_empty
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4597b3e9	iwl_leds_register
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x471ef589	iwl_tt_exit
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x48dab9eb	iwl_send_bt_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x490b923d	iwl_rx_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4a7a4380	iwl_pci_resume
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4d0ff641	iwl_send_cmd_pdu
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4d3e2367	iwl_rx_queue_alloc
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4dcab8c4	iwl_setup_mac
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x509c0629	iwl_tt_handler
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x516efc0f	iwl_update_tkip_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x51ee753e	iwl_hwrate_to_tx_control
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x56185c19	iwl_get_ra_sta_id
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x57ba767c	iwl_mac_beacon_update
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x57cbf908	iwl_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5a10b954	iwl_cmd_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5caa2bd3	iwl_irq_handle_error
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5e257514	iwl_sensitivity_calibration
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5e526fa6	iwl_mac_hw_scan
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x601d4000	iwl_tx_cmd_complete
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6195cccb	iwl_disable_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x62727d56	iwl_calib_set
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x63c71d6e	iwl_set_rxon_ht
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x646259f3	iwl_connection_init_rx_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x67b8656d	iwl_get_sta_id
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6b4f4d48	iwl_rx_queue_update_write_ptr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6ce55990	iwl_tt_exit_ct_kill
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6d7e0fa9	iwlcore_init_geos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6f87279c	iwl_tx_agg_start
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x709c6c79	iwl_rx_reply_compressed_ba
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x70dd2891	iwl_tx_agg_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7639b2bf	iwl_init_sensitivity
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x78976e61	iwl_isr_legacy
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7bd0db60	iwl_get_free_ucode_key_index
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7c097bf0	iwl_leds_unregister
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7c611236	iwl_setup_scan_deferred_work
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7c9589ea	iwlcore_eeprom_query_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7d46df9d	iwl_eeprom_query_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7fa40b14	iwl_rx_statistics
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7fd7e444	iwl_send_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x80c3907d	iwl_rx_missed_beacon_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x82850c55	iwl_fill_probe_req
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x82b57ec2	iwl_set_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8307df70	iwl_reset_run_time_calib
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x832ee1a5	iwl_remove_default_wep_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x84987e55	iwl_set_rxon_hwcrypto
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x85d7b380	iwl_hw_nic_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x866a9e71	iwl_full_rxon_required
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8670273d	iwl_hwrate_to_plcp_idx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x88664f93	iwl_send_lq_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x89625a06	iwl_activate_qos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x89fbd737	iwl_reset_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8d74ac36	iwl_add_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x96f978ff	iwl_alloc_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x970140c4	iwl_set_default_wep_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x974b5837	iwl_set_tx_power
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9a60af0b	iwl_bg_scan_check
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9b9de037	iwl_rx_queue_restock
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9c5e4faf	iwl_configure_filter
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9cde1f24	iwl_queue_space
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9e86e8e0	iwl_bg_abort_scan
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9ea5c859	iwl_setup_rxon_timing
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa527b8e9	iwl_txq_ctx_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa61d6230	iwlcore_eeprom_verify_signature
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa6d840af	iwl_clear_stations_table
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa6fa01f8	iwl_tx_queue_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa77268f5	iwl_eeprom_query16
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa827eb1f	iwl_rx_replenish
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaad0846e	iwl_bg_scan_completed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xab58daa2	iwl_rx_pm_debug_statistics_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xad38574e	iwl_get_channel_info
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xae4a268f	iwl_eeprom_get_mac
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb5bd3d67	iwl_set_decrypted_flag
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb7a0fbb1	iwl_rx_reply_rx_phy
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb856e1f4	iwl_send_add_sta
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb8c4cb32	iwl_power_update_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbdb64bc3	iwl_pci_suspend
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc1bee61c	iwl_remove_dynamic_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc2c69346	iwl_hw_txq_ctx_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc8bd2a0d	iwl_rx_reply_error
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc9a4bd76	iwl_rate_get_lowest_plcp
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcb2e4d8c	iwlcore_free_geos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcbaf4931	get_cmd_string
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcdcb496e	iwl_tx_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcf10fd22	iwl_find_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd0839236	iwl_send_calib_results
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd21c04ed	iwl_sta_rx_agg_start
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd42affbb	iwl_setup_rx_scan_handlers
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd53b40ff	iwl_tt_enter_ct_kill
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd78b810b	iwl_eeprom_check_version
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd7ada770	iwl_rx_queue_space
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd8c75d15	iwl_reset_qos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd98268b3	iwl_hw_detect
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdedf07bd	iwl_is_ht40_tx_allowed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdf19a219	iwl_tx_skb
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe1284ba7	iwl_rx_reply_rx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe7ce5d70	iwl_rates
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xea0afd87	iwl_mac_remove_interface
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xea56ed5e	iwl_check_rxon_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xea827079	iwl_mac_conf_tx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xea8bbfc9	iwl_tx_queue_reclaim
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xebaa1870	iwl_rxon_add_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xebdc95f3	iwl_is_monitor_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xed9c263a	iwl_set_rxon_chain
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xee986010	iwl_txq_update_write_ptr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xef322258	iwl_send_cmd_pdu_async
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf011e2b4	iwl_rx_csa
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf019175b	iwl_get_passive_dwell_time
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf46401d2	iwl_rxq_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf553e34f	iwlcore_eeprom_acquire_semaphore
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf8f23abe	iwl_rx_pm_sleep_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf9b272c1	iwl_eeprom_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfa52f7cd	iwl_set_hw_params
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfa6bd64f	iwl_power_initialize
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfb1f9873	iwl_set_dynamic_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfdeb3f7a	iwl_tx_ant_restriction
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xff0704a3	iwl_mac_get_tx_stats
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xff66bd37	iwl_free_channel_map
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x2b9cd7d6	orinoco_up
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x2dec85f0	orinoco_down
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x31fc39e3	orinoco_if_del
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x4196c38b	hermes_write_ltv
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x4aed5f7a	free_orinocodev
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x5bfded21	alloc_orinocodev
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x6a927e18	orinoco_interrupt
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x8113f3ad	orinoco_init
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x980d8f4a	orinoco_if_add
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xa031d8e4	hermes_doicmd_wait
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc60b5e9e	hermes_bap_pwrite
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd38d8ae2	hermes_read_ltv
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd3f714e5	hermes_bap_pread
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5168829	hermes_allocate
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5336e5d	hermes_init
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd54e219d	hermes_docmd_wait
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xed47b224	hermes_struct_init
+EXPORT_SYMBOL drivers/parport/parport 0x013ba047	parport_ieee1284_epp_write_addr
+EXPORT_SYMBOL drivers/parport/parport 0x049d9b6e	parport_find_base
+EXPORT_SYMBOL drivers/parport/parport 0x1185601a	parport_release
+EXPORT_SYMBOL drivers/parport/parport 0x20cf43a2	parport_claim
+EXPORT_SYMBOL drivers/parport/parport 0x25e1b0bd	parport_get_port
+EXPORT_SYMBOL drivers/parport/parport 0x2a982b86	parport_unregister_device
+EXPORT_SYMBOL drivers/parport/parport 0x2f4ab714	parport_negotiate
+EXPORT_SYMBOL drivers/parport/parport 0x3f80a200	parport_ieee1284_epp_read_addr
+EXPORT_SYMBOL drivers/parport/parport 0x43a9beb6	parport_wait_peripheral
+EXPORT_SYMBOL drivers/parport/parport 0x470f2dc6	parport_wait_event
+EXPORT_SYMBOL drivers/parport/parport 0x491aa78f	parport_read
+EXPORT_SYMBOL drivers/parport/parport 0x4d2a941b	parport_ieee1284_interrupt
+EXPORT_SYMBOL drivers/parport/parport 0x526675c6	parport_ieee1284_epp_write_data
+EXPORT_SYMBOL drivers/parport/parport 0x704380bb	parport_set_timeout
+EXPORT_SYMBOL drivers/parport/parport 0x7b4ab2f6	parport_register_driver
+EXPORT_SYMBOL drivers/parport/parport 0x7cf6a7f7	parport_register_device
+EXPORT_SYMBOL drivers/parport/parport 0x8143818e	parport_put_port
+EXPORT_SYMBOL drivers/parport/parport 0x814f5b73	parport_ieee1284_ecp_write_addr
+EXPORT_SYMBOL drivers/parport/parport 0x9a0ea2c5	parport_ieee1284_read_nibble
+EXPORT_SYMBOL drivers/parport/parport 0x9d49d66d	parport_remove_port
+EXPORT_SYMBOL drivers/parport/parport 0x9d5eff70	parport_irq_handler
+EXPORT_SYMBOL drivers/parport/parport 0x9eb26dd5	parport_claim_or_block
+EXPORT_SYMBOL drivers/parport/parport 0xa8752c7e	parport_announce_port
+EXPORT_SYMBOL drivers/parport/parport 0xb96aef9c	parport_ieee1284_read_byte
+EXPORT_SYMBOL drivers/parport/parport 0xbb407415	parport_find_number
+EXPORT_SYMBOL drivers/parport/parport 0xc1ae9c03	parport_ieee1284_write_compat
+EXPORT_SYMBOL drivers/parport/parport 0xc638f02d	parport_register_port
+EXPORT_SYMBOL drivers/parport/parport 0xd2128ef2	parport_ieee1284_ecp_write_data
+EXPORT_SYMBOL drivers/parport/parport 0xd610fe70	parport_unregister_driver
+EXPORT_SYMBOL drivers/parport/parport 0xe1be924b	parport_ieee1284_epp_read_data
+EXPORT_SYMBOL drivers/parport/parport 0xece44c53	parport_write
+EXPORT_SYMBOL drivers/parport/parport 0xfcbf635a	parport_ieee1284_ecp_read_data
+EXPORT_SYMBOL drivers/parport/parport_pc 0x77db8ead	parport_pc_probe_port
+EXPORT_SYMBOL drivers/parport/parport_pc 0x8d8a0873	parport_pc_unregister_port
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x332f88e7	pcmcia_release_window
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4fd033a0	pcmcia_error_func
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x53bc7a54	pcmcia_request_configuration
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x6d0a08d0	pcmcia_loop_config
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x7a6dbd17	pcmcia_access_configuration_register
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x81b5f6c0	pcmcia_request_io
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x8438ec5b	pcmcia_request_window
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x8a12fa77	pcmcia_unregister_driver
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x99ad80d8	pcmcia_map_mem_page
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xa14738d5	pcmcia_modify_configuration
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xab1992dd	pcmcia_disable_device
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xc02b49bc	pcmcia_request_irq
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xd33c8a8c	pcmcia_dev_present
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xe04b55a7	pcmcia_register_driver
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xe84ee523	pcmcia_get_window
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf0a25e12	pcmcia_error_ret
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf3643d5b	pcmcia_get_mem_page
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x0d40b319	pcmcia_reset_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x18573d15	pcmcia_register_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x1d5f435e	pcmcia_read_cis_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x212db8d2	pcmcia_socket_list
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x2e75fd15	destroy_cis_cache
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x348d42ea	pccard_register_pcmcia
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x3de1d02b	pcmcia_find_io_region
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x4d45f897	pcmcia_get_socket_by_nr
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x51d1a710	pcmcia_adjust_io_region
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x53ad88f7	pcmcia_suspend_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x54bca651	pcmcia_put_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x5532dea6	pcmcia_get_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x5e2caf5a	pccard_static_ops
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x5f42a69d	pcmcia_socket_list_rwsem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x5f5fb093	pcmcia_replace_cis
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x63334a60	pcmcia_socket_dev_suspend
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x7325efe3	pcmcia_insert_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x86b38870	pcmcia_parse_events
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x876a3707	pccard_validate_cis
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x89a861c9	pccard_get_tuple_data
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x8dbd7dbe	pcmcia_resume_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x9726bf77	pcmcia_unregister_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xa7eb945c	pcmcia_find_mem_region
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xb44e562a	pccard_read_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xb87a8934	pcmcia_write_cis_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc02ef2c8	pcmcia_parse_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc320b9fd	pcmcia_socket_dev_early_resume
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc40aacae	pccard_get_first_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcf97f3bd	dead_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xd111c78a	release_cis_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xd6eabc90	pcmcia_socket_dev_resume
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xe761dc68	pccard_get_next_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xea050429	pcmcia_validate_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xedd2b81b	pcmcia_socket_dev_late_resume
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf03f9c62	pcmcia_eject_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf3d6b138	pcmcia_socket_class
+EXPORT_SYMBOL drivers/pcmcia/rsrc_nonstatic 0x7b6365c9	pccard_nonstatic_ops
+EXPORT_SYMBOL drivers/platform/x86/sony-laptop 0x5bb1e117	sony_pic_camera_command
+EXPORT_SYMBOL drivers/pps/pps_core 0x0ca11615	pps_register_source
+EXPORT_SYMBOL drivers/pps/pps_core 0x1e145952	pps_unregister_source
+EXPORT_SYMBOL drivers/pps/pps_core 0xe6a16116	pps_event
+EXPORT_SYMBOL drivers/scsi/53c700 0x67ddb3f7	NCR_700_detect
+EXPORT_SYMBOL drivers/scsi/53c700 0x6dafca77	NCR_700_release
+EXPORT_SYMBOL drivers/scsi/53c700 0xf13d9adc	NCR_700_intr
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x65df7307	fcoe_ctlr_recv
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x67697031	fcoe_ctlr_destroy
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x6792e923	fcoe_ctlr_link_up
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x7f592cb2	fcoe_ctlr_recv_flogi
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xa2f52528	fcoe_ctlr_link_down
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xac429f1f	fcoe_ctlr_init
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xaec91cc6	fcoe_ctlr_els_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x076a0909	fc_seq_start_next
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x08ab59ad	fc_rport_terminate_io
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0ba6d2cd	fc_exch_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0bda63ae	fc_seq_els_rsp_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0e4260d6	fc_linkup
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0f084a31	fc_exch_seq_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x23e528bb	fc_eh_host_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x28f43487	fc_exch_recv
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x2e6e3a63	fc_fcp_complete
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x2f412913	fc_set_rport_loss_tmo
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x36e5fbaf	fc_cpu_mask
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x379e8203	fc_exch_mgr_del
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x460636b0	fc_slave_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x51813c3f	fc_lport_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x56183917	fc_destroy_rport
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x598d5b69	fc_change_queue_depth
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x67750428	fc_exch_done
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6fb97eb6	fc_lport_destroy
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x71bf9d49	fc_get_host_port_type
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x75bc3f71	fc_fabric_login
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x78576d8b	fc_fcp_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x7c4b10af	fc_fabric_logoff
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x7d6df9c6	fc_change_queue_type
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x81a3500a	fc_get_host_stats
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x82bedfac	fc_exch_mgr_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x8e827abd	fc_lport_config
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x8e830b11	fc_exch_mgr_add
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x97f931f1	fc_rport_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x99424d85	fc_frame_crc_check
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xab3ce894	fc_exch_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xad74a92e	fc_disc_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xadc5efda	fc_get_host_port_state
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb3b1f85b	fc_set_mfs
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb4f3588a	__fc_frame_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb5cca9f1	fc_seq_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xc9a2c5dd	fc_exch_mgr_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xccd4e3a2	fc_eh_device_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xce447c9b	fc_fcp_ddp_setup
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd6cb3359	fc_setup_rport
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xdbf51097	fc_fcp_destroy
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xdd556009	fc_eh_abort
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xde410a88	fc_queuecommand
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe79cc6ac	fc_exch_mgr_free
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf062e9a1	fc_elsct_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf30b2bff	fc_lport_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf7365d60	fc_seq_exch_abort
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xfc3949a0	fc_get_host_speed
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xfd503abf	fc_linkdown
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x2250c66e	mraid_mm_adapter_app_handle
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x512c956d	mraid_mm_unregister_adp
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x588f4269	mraid_mm_register_adp
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x060785b5	osd_req_create_partition
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0c17edb1	osd_sec_init_nosec_doall_caps
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x10c5f27e	osd_req_write_kern
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x12ec970a	osd_req_list_partition_objects
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x3d88035b	osd_req_read_kern
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x4482f421	osd_req_set_attributes
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x44d1cd2a	osd_finalize_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x45458a90	osd_req_flush_partition
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x4f06176a	osd_req_flush_object
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x53422b6a	osd_req_add_get_attr_list
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x53a18d3e	osd_execute_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x55119919	osd_req_get_attributes
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x5f0c1546	osd_dev_fini
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x60369b4e	osd_execute_request_async
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x8178fd48	osd_auto_detect_ver
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x822089af	osd_req_decode_get_attr_list
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xa43882e8	osd_req_list_partition_collections
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xb183fe23	osd_req_list_dev_partitions
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xb70d63f5	osd_dev_init
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xc29ecdc4	osd_req_flush_obsd
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xd2e723b8	osd_req_flush_collection
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xd47d5667	osd_req_write
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xdacb267d	osd_end_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe0af2e03	osd_req_add_set_attr_list
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe56650c9	osd_start_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe5a463cf	osd_req_format
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe75c8fe7	osd_req_add_get_attr_page
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xeb908a4d	osd_req_read
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xeba051e8	osd_req_create_object
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xeeb51251	osd_req_remove_object
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xf42c7faa	osd_req_list_collection_objects
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xfb58a9db	osd_req_remove_partition
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xfbcd1686	osd_req_decode_sense_full
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x58b8a9ed	osduld_register_test
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x5fc48609	osduld_unregister_test
+EXPORT_SYMBOL drivers/scsi/osd/osd 0xa0b8b94c	osduld_put_device
+EXPORT_SYMBOL drivers/scsi/osd/osd 0xefe6e222	osduld_path_lookup
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x3fd8cd71	qlogicfas408_detect
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x5bb5debf	qlogicfas408_queuecommand
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x7004e170	qlogicfas408_bus_reset
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x90de5a7f	qlogicfas408_abort
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xb383168b	qlogicfas408_disable_ints
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xcd815796	qlogicfas408_biosparam
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xcfc3995e	qlogicfas408_info
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xdc310b12	qlogicfas408_ihandl
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xe76b3b20	qlogicfas408_get_chip_type
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xf2b95199	qlogicfas408_setup
+EXPORT_SYMBOL drivers/scsi/raid_class 0x16e132c5	raid_component_add
+EXPORT_SYMBOL drivers/scsi/raid_class 0x57bca8d5	raid_class_attach
+EXPORT_SYMBOL drivers/scsi/raid_class 0x9d161df0	raid_class_release
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x252356a3	fc_remote_port_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x2aae97a0	fc_vport_terminate
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x2fd3b56f	scsi_is_fc_vport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x377e96fb	scsi_is_fc_rport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x477078d5	fc_remote_port_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x58661303	fc_host_post_event
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x65e6cd4a	fc_attach_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x7954b1ea	fc_get_event_number
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x8359243c	fc_vport_create
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x89bfee2b	fc_remote_port_rolechg
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x9bc47630	fc_remove_host
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xb46a42eb	fc_host_post_vendor_event
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xc14e4b8e	fc_release_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x10277da8	sas_remove_host
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x1bfbc9ac	scsi_is_sas_rphy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x1debd7bb	sas_phy_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x30ebab4b	sas_attach_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x41d42dc8	sas_phy_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x508bd212	scsi_is_sas_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x51c88166	sas_rphy_remove
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x53b2357d	sas_port_alloc_num
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x611ce9f1	sas_remove_children
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x6912fe78	sas_rphy_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x8006a0a4	sas_port_mark_backlink
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x8672af53	sas_end_device_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x99975fd6	sas_port_delete_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x9c680484	sas_rphy_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xaa91b16b	sas_expander_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xab93fe75	sas_phy_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xad6a8ef7	scsi_is_sas_port
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xbdbba723	sas_port_add_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xcb956bb4	sas_port_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xce8e54bc	sas_release_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xd0e23acb	sas_port_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xe2495572	sas_rphy_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xe6943aca	sas_port_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xe96ecc74	sas_read_port_mode_page
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xfa9905f5	sas_port_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xfc9b419b	sas_phy_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x1a230e6a	spi_dv_device
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x1d31c189	spi_release_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x24f0cc95	spi_display_xfer_agreement
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x3686ea09	spi_print_msg
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x7af37c28	spi_schedule_dv_device
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0xdd9647d9	spi_attach_transport
+EXPORT_SYMBOL drivers/ssb/ssb 0x071a8cdb	ssb_pcihost_register
+EXPORT_SYMBOL drivers/ssb/ssb 0x139d2bb6	ssb_device_enable
+EXPORT_SYMBOL drivers/ssb/ssb 0x165b837b	ssb_driver_unregister
+EXPORT_SYMBOL drivers/ssb/ssb 0x17c555d4	ssb_bus_resume
+EXPORT_SYMBOL drivers/ssb/ssb 0x48a0938f	ssb_pmu_set_ldo_paref
+EXPORT_SYMBOL drivers/ssb/ssb 0x4bc74c26	ssb_bus_unregister
+EXPORT_SYMBOL drivers/ssb/ssb 0x55d4af9a	ssb_bus_suspend
+EXPORT_SYMBOL drivers/ssb/ssb 0x63068ae0	ssb_dma_free_consistent
+EXPORT_SYMBOL drivers/ssb/ssb 0x6b845794	ssb_dma_translation
+EXPORT_SYMBOL drivers/ssb/ssb 0x85a7cd45	ssb_pmu_set_ldo_voltage
+EXPORT_SYMBOL drivers/ssb/ssb 0x916c7a03	ssb_bus_sdiobus_register
+EXPORT_SYMBOL drivers/ssb/ssb 0x9861c5d3	ssb_device_disable
+EXPORT_SYMBOL drivers/ssb/ssb 0x9cff5fa8	ssb_dma_set_mask
+EXPORT_SYMBOL drivers/ssb/ssb 0xba31f6a8	ssb_set_devtypedata
+EXPORT_SYMBOL drivers/ssb/ssb 0xbe83727b	ssb_dma_alloc_consistent
+EXPORT_SYMBOL drivers/ssb/ssb 0xc0512e0f	ssb_admatch_base
+EXPORT_SYMBOL drivers/ssb/ssb 0xcb825d09	ssb_pcicore_dev_irqvecs_enable
+EXPORT_SYMBOL drivers/ssb/ssb 0xcc03bb1a	ssb_bus_may_powerdown
+EXPORT_SYMBOL drivers/ssb/ssb 0xcfb5a7eb	ssb_bus_powerup
+EXPORT_SYMBOL drivers/ssb/ssb 0xd481192b	ssb_admatch_size
+EXPORT_SYMBOL drivers/ssb/ssb 0xddcfc58b	ssb_device_is_enabled
+EXPORT_SYMBOL drivers/ssb/ssb 0xe9cb1116	__ssb_driver_register
+EXPORT_SYMBOL drivers/ssb/ssb 0xedcdeac7	ssb_bus_pcibus_register
+EXPORT_SYMBOL drivers/ssb/ssb 0xf2657df9	ssb_clockspeed
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x053f62bd	comedi_event
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x081a8a43	comedi_buf_memcpy_to
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x0cd330f4	range_unknown
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x2030e414	comedi_driver_register
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x2b6eec58	comedi_buf_read_n_available
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x2f0ad9d3	range_bipolar5
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x423f9cec	comedi_buf_read_alloc
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x4fe634f3	range_bipolar2_5
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x69e21453	comedi_buf_write_alloc
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x6c393637	comedi_driver_unregister
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x6c910eb0	comedi_error
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x70752add	comedi_buf_memcpy_from
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x7094600b	comedi_buf_read_free
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x8113872c	range_unipolar10
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xa6e071f4	comedi_buf_write_free
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xa7f05da4	comedi_set_subdevice_runflags
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xbafed5dc	check_chanlist
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xbb52fc7f	range_bipolar10
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xbb8e0bba	comedi_reset_async_buf
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xc10dca85	comedi_get_subdevice_runflags
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xd7628c27	comedi_buf_put
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xdb2044b2	range_unipolar5
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xfbb32723	comedi_buf_get
+EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0x116fc8a3	subdev_8255_init
+EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0x4c2f92a5	subdev_8255_interrupt
+EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0x5632db47	subdev_8255_init_irq
+EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0xe32f6edc	subdev_8255_cleanup
+EXPORT_SYMBOL drivers/staging/comedi/drivers/comedi_fc 0x3fd66426	cfc_read_array_from_buffer
+EXPORT_SYMBOL drivers/staging/comedi/drivers/comedi_fc 0x582d763a	cfc_handle_events
+EXPORT_SYMBOL drivers/staging/comedi/drivers/comedi_fc 0xac240a66	cfc_write_array_to_buffer
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x2580dfe9	mite_request_channel_in_range
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x2631cafc	mite_bytes_read_from_memory_lb
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x478a77ef	mite_sync_output_dma
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x4cc61b7c	mite_sync_input_dma
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x51e9acd2	mite_buf_change
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x57a5661e	mite_devices
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x62af672d	mite_setup
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x6428b7d1	mite_bytes_read_from_memory_ub
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x64e5ce92	mite_dma_tcr
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x73ba0f77	mite_done
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x7ec604f6	mite_setup2
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x82eaed72	mite_bytes_written_to_memory_lb
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x84d32cf9	mite_bytes_in_transit
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x8d90433e	mite_release_channel
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x9f978286	mite_get_status
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xb4311496	mite_dma_disarm
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xc0f3905f	mite_bytes_written_to_memory_ub
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xd8cece76	mite_dma_arm
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xe640fa03	mite_unsetup
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xef2c282f	mite_prep_dma
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xfb3ba025	mite_list_devices
+EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0x0fbf292c	subdev_700_interrupt
+EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0xa97c9b85	subdev_700_init_irq
+EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0xea99a452	subdev_700_cleanup
+EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0xed4a15b3	subdev_700_init
+EXPORT_SYMBOL drivers/staging/comedi/drivers/pcm_common 0x4ddd93fc	comedi_pcm_cmdtest
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x042d55f4	comedi_loglevel
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x0488ce0e	comedi_get_n_ranges
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x0cad1c36	comedi_get_subdevice_type
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x13e3042c	comedi_command
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x194eb4ae	comedi_get_n_channels
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x1c5555d9	comedi_cancel
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x1ec0e2d3	comedi_get_buf_head_pos
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x22318694	comedi_set_user_int_count
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x262e9c18	comedi_dio_write
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x370d69d5	comedi_dio_read
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x3cb614fc	comedi_data_write
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x3db41e4f	comedi_poll
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x3de6a4a3	comedi_get_buffer_offset
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x409d3263	comedi_do_insn
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x51da786d	comedi_register_callback
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x52769094	comedi_find_subdevice_by_type
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x628ed463	comedi_get_n_subdevices
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x671c2623	comedi_get_buffer_size
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x696272c9	comedi_unlock
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x826bd656	comedi_data_read_delayed
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x8e199bbf	comedi_perror
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x8fb4413e	comedi_data_read_hint
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x9b266320	comedi_get_krange
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x9dde39b5	comedi_strerror
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xa0334b40	comedi_get_driver_name
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xa094eab0	comedi_get_board_name
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xa7c55c52	comedi_open
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xaa456501	comedi_mark_buffer_read
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xb45b8b7b	comedi_mark_buffer_written
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xb5396dad	comedi_get_maxdata
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xb5c3ac2a	comedi_map
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xc4ec62b3	comedi_get_len_chanlist
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xc7d949df	comedi_lock
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xd2a9a259	comedi_get_version_code
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xd46a9468	comedi_dio_config
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xd48facbb	comedi_command_test
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xddd89421	comedi_close
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xe2208940	comedi_data_read
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xe38c6fb4	comedi_unmap
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xed5731a4	comedi_get_subdevice_flags
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xefd0c778	comedi_fileno
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xf17e03df	comedi_dio_bitfield
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xf71581db	comedi_get_buffer_contents
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x0176ed77	cx25821_risc_databuffer_audio
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x471e1cfb	cx25821_devlist
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x67cc5b8b	cx25821_sram_channels
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x71917d0a	cx25821_sram_channel_setup_audio
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x784853c3	cx25821_print_irqbits
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x787070d8	cx25821_set_gpiopin_direction
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0xacc083d6	cx25821_sram_channel_dump
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0xb0e817d0	cx25821_sram_channel_setup
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0xb3d2cf27	cx25821_dev_unregister
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0xd71bb865	cx25821_dev_get
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0xfde8a061	cx25821_sram_channel_dump_audio
+EXPORT_SYMBOL drivers/staging/hv/hv_vmbus 0x1cb36e36	vmbus_child_driver_register
+EXPORT_SYMBOL drivers/staging/hv/hv_vmbus 0x1f07d908	vmbus_child_driver_unregister
+EXPORT_SYMBOL drivers/staging/hv/hv_vmbus 0x253f3d14	vmbus_get_interface
+EXPORT_SYMBOL drivers/staging/hv/hv_vmbus 0xdf1a5ef6	vmbus_loglevel
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x0d8ddfcd	iio_remove_event_from_list
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x20f1ab51	iio_read_const_attr
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x60f7253a	iio_free_idr_val
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x739ae300	iio_devt
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x7919e04f	iio_unregister_interrupt_line
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x842338f0	iio_class
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xb5366e91	iio_allocate_device
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xb6edaf14	iio_get_new_idr_val
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xb829312b	__iio_push_event
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xbc0a712c	iio_add_event_to_list
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xc130f4cc	iio_register_interrupt_line
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xc5e9a53a	iio_device_unregister
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xcb842df9	__iio_change_event
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xcd3555f1	iio_device_register
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xe7bdc847	iio_push_event
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xed9871e1	iio_free_device
+EXPORT_SYMBOL drivers/staging/line6/line6usb 0x9329a079	variax_remove_files
+EXPORT_SYMBOL drivers/staging/line6/line6usb 0xa0f179d0	pod_remove_files
+EXPORT_SYMBOL drivers/staging/line6/line6usb 0xb9839b6f	variax_create_files
+EXPORT_SYMBOL drivers/staging/line6/line6usb 0xfe69cf4d	pod_create_files
+EXPORT_SYMBOL drivers/staging/rar/rar_driver 0xf8017f03	get_rar_address
+EXPORT_SYMBOL drivers/staging/vme/vme 0x00d7e722	vme_lm_count
+EXPORT_SYMBOL drivers/staging/vme/vme 0x072f901c	vme_master_rmw
+EXPORT_SYMBOL drivers/staging/vme/vme 0x0e10859d	vme_lm_get
+EXPORT_SYMBOL drivers/staging/vme/vme 0x0ec5babe	vme_dma_free
+EXPORT_SYMBOL drivers/staging/vme/vme 0x106aa612	vme_lm_request
+EXPORT_SYMBOL drivers/staging/vme/vme 0x1a8cacff	vme_dma_list_add
+EXPORT_SYMBOL drivers/staging/vme/vme 0x251b9ed8	vme_slave_set
+EXPORT_SYMBOL drivers/staging/vme/vme 0x2b596133	vme_slave_request
+EXPORT_SYMBOL drivers/staging/vme/vme 0x3d1af350	vme_dma_pci_attribute
+EXPORT_SYMBOL drivers/staging/vme/vme 0x3f68d4cf	vme_lm_set
+EXPORT_SYMBOL drivers/staging/vme/vme 0x41e14beb	vme_dma_list_exec
+EXPORT_SYMBOL drivers/staging/vme/vme 0x48b99a13	vme_lm_free
+EXPORT_SYMBOL drivers/staging/vme/vme 0x5118beb5	vme_new_dma_list
+EXPORT_SYMBOL drivers/staging/vme/vme 0x60700c03	vme_dma_list_free
+EXPORT_SYMBOL drivers/staging/vme/vme 0x66227eae	vme_alloc_consistent
+EXPORT_SYMBOL drivers/staging/vme/vme 0x76bab4d4	vme_master_set
+EXPORT_SYMBOL drivers/staging/vme/vme 0x7797a741	vme_dma_vme_attribute
+EXPORT_SYMBOL drivers/staging/vme/vme 0x7cf35220	vme_master_free
+EXPORT_SYMBOL drivers/staging/vme/vme 0x7fde2edb	vme_master_read
+EXPORT_SYMBOL drivers/staging/vme/vme 0x8add1537	vme_free_irq
+EXPORT_SYMBOL drivers/staging/vme/vme 0x92fa5abb	vme_lm_detach
+EXPORT_SYMBOL drivers/staging/vme/vme 0x93dff61f	vme_slave_get
+EXPORT_SYMBOL drivers/staging/vme/vme 0x94b2590f	vme_free_consistent
+EXPORT_SYMBOL drivers/staging/vme/vme 0x9aeb07e8	vme_lm_attach
+EXPORT_SYMBOL drivers/staging/vme/vme 0x9b26b538	vme_unregister_driver
+EXPORT_SYMBOL drivers/staging/vme/vme 0xa980feff	vme_generate_irq
+EXPORT_SYMBOL drivers/staging/vme/vme 0xac3507d0	vme_master_request
+EXPORT_SYMBOL drivers/staging/vme/vme 0xc8352002	vme_dma_pattern_attribute
+EXPORT_SYMBOL drivers/staging/vme/vme 0xc8a7a1c3	vme_bus_type
+EXPORT_SYMBOL drivers/staging/vme/vme 0xcebe6ed0	vme_request_irq
+EXPORT_SYMBOL drivers/staging/vme/vme 0xd4f28ba3	vme_slot_get
+EXPORT_SYMBOL drivers/staging/vme/vme 0xd797b9a5	vme_master_write
+EXPORT_SYMBOL drivers/staging/vme/vme 0xd8ebd216	vme_register_driver
+EXPORT_SYMBOL drivers/staging/vme/vme 0xddd2a03e	vme_register_bridge
+EXPORT_SYMBOL drivers/staging/vme/vme 0xdff905e5	vme_slave_free
+EXPORT_SYMBOL drivers/staging/vme/vme 0xe60cbb2f	vme_master_get
+EXPORT_SYMBOL drivers/staging/vme/vme 0xe693a6ce	vme_get_size
+EXPORT_SYMBOL drivers/staging/vme/vme 0xe8044f37	vme_unregister_bridge
+EXPORT_SYMBOL drivers/staging/vme/vme 0xeccbeafc	vme_dma_free_attribute
+EXPORT_SYMBOL drivers/staging/vme/vme 0xf5d704ce	vme_request_dma
+EXPORT_SYMBOL drivers/telephony/ixj 0xb44be5d9	ixj_pcmcia_probe
+EXPORT_SYMBOL drivers/telephony/phonedev 0x72f5071d	phone_unregister_device
+EXPORT_SYMBOL drivers/telephony/phonedev 0xfdaa4306	phone_register_device
+EXPORT_SYMBOL drivers/usb/gadget/dummy_hcd 0x214cf8bb	net2280_set_fifo_mode
+EXPORT_SYMBOL drivers/usb/gadget/dummy_hcd 0x91c8a5e5	usb_gadget_unregister_driver
+EXPORT_SYMBOL drivers/usb/gadget/dummy_hcd 0xbad7c7a9	usb_gadget_register_driver
+EXPORT_SYMBOL drivers/usb/host/sl811-hcd 0x39aee6de	sl811h_driver
+EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xa64a4cea	usb_nop_xceiv_unregister
+EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xd0e43207	usb_nop_xceiv_register
+EXPORT_SYMBOL drivers/usb/serial/usbserial 0x09bd136b	usb_serial_resume
+EXPORT_SYMBOL drivers/usb/serial/usbserial 0x8537d249	usb_serial_suspend
+EXPORT_SYMBOL drivers/video/backlight/generic_bl 0xc86baa7c	corgibl_limit_intensity
+EXPORT_SYMBOL drivers/video/backlight/lcd 0x1608c484	lcd_device_unregister
+EXPORT_SYMBOL drivers/video/backlight/lcd 0x7608eb92	lcd_device_register
+EXPORT_SYMBOL drivers/video/console/bitblit 0xd75f7cd9	fbcon_set_bitops
+EXPORT_SYMBOL drivers/video/console/font 0x09c8eb55	font_vga_8x16
+EXPORT_SYMBOL drivers/video/console/font 0xbb99125c	get_default_font
+EXPORT_SYMBOL drivers/video/console/font 0xf7584a9c	find_font
+EXPORT_SYMBOL drivers/video/console/softcursor 0x804de9db	soft_cursor
+EXPORT_SYMBOL drivers/video/console/tileblit 0x2c85b85b	fbcon_set_tileops
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x07c4327e	cyber2000fb_attach
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x0cc3ede5	cyber2000fb_detach
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x444495e5	cyber2000fb_get_fb_var
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x46c1081f	cyber2000fb_disable_extregs
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x9276bfef	cyber2000fb_enable_extregs
+EXPORT_SYMBOL drivers/video/display/display 0x2e01e3c5	display_device_register
+EXPORT_SYMBOL drivers/video/display/display 0xfe40e88e	display_device_unregister
+EXPORT_SYMBOL drivers/video/macmodes 0x08ed0b62	mac_vmode_to_var
+EXPORT_SYMBOL drivers/video/macmodes 0x1e788aa3	mac_find_mode
+EXPORT_SYMBOL drivers/video/macmodes 0xe2304303	mac_map_monitor_sense
+EXPORT_SYMBOL drivers/video/matrox/g450_pll 0x2e0de37e	g450_mnp2f
+EXPORT_SYMBOL drivers/video/matrox/g450_pll 0x43b893c0	matroxfb_g450_setpll_cond
+EXPORT_SYMBOL drivers/video/matrox/g450_pll 0x466798ee	matroxfb_g450_setclk
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0x0c22676c	matrox_G100
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0x481b5ea2	matrox_mystique
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0x63966c41	DAC1064_global_init
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0x98188951	DAC1064_global_restore
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_Ti3026 0x433ec4c2	matrox_millennium
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_accel 0xde6d1a46	matrox_cfbX_init
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0x77dfa97d	matroxfb_wait_for_sync
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0xae74d052	matroxfb_register_driver
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0xb13c6a31	matroxfb_unregister_driver
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0xc5161df2	matroxfb_enable_irq
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_g450 0x8167bec7	matroxfb_g450_connect
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_g450 0xa7f9d054	matroxfb_g450_shutdown
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x0bd0b0ba	matroxfb_vgaHWrestore
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x25cf8049	matroxfb_PLL_calcclock
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x563fe2ad	matroxfb_read_pins
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x8a674e70	matroxfb_DAC_in
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0xabd8e427	matroxfb_var2my
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0xecdb2bd1	matroxfb_vgaHWinit
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0xffa07931	matroxfb_DAC_out
+EXPORT_SYMBOL drivers/video/output 0x3f513bd4	video_output_register
+EXPORT_SYMBOL drivers/video/output 0x4d3898c4	video_output_unregister
+EXPORT_SYMBOL drivers/video/sis/sisfb 0x3037658e	sis_malloc
+EXPORT_SYMBOL drivers/video/sis/sisfb 0x454a3cf0	sis_free
+EXPORT_SYMBOL drivers/video/svgalib 0x00d1fce9	svga_set_default_seq_regs
+EXPORT_SYMBOL drivers/video/svgalib 0x07b3da30	svga_wseq_multi
+EXPORT_SYMBOL drivers/video/svgalib 0x1b95c56a	svga_check_timings
+EXPORT_SYMBOL drivers/video/svgalib 0x4cabdcee	svga_settile
+EXPORT_SYMBOL drivers/video/svgalib 0x63e898d1	svga_set_default_crt_regs
+EXPORT_SYMBOL drivers/video/svgalib 0x68fc35b5	svga_get_tilemax
+EXPORT_SYMBOL drivers/video/svgalib 0x6a7358f1	svga_tileblit
+EXPORT_SYMBOL drivers/video/svgalib 0x6e4fdced	svga_get_caps
+EXPORT_SYMBOL drivers/video/svgalib 0x74049463	svga_tilecursor
+EXPORT_SYMBOL drivers/video/svgalib 0x7a3ae959	svga_wcrt_multi
+EXPORT_SYMBOL drivers/video/svgalib 0x80408443	svga_set_timings
+EXPORT_SYMBOL drivers/video/svgalib 0x8fa8438b	svga_set_textmode_vga_regs
+EXPORT_SYMBOL drivers/video/svgalib 0xab3b22ad	svga_set_default_gfx_regs
+EXPORT_SYMBOL drivers/video/svgalib 0xdad682b1	svga_set_default_atc_regs
+EXPORT_SYMBOL drivers/video/svgalib 0xe2d40d84	svga_tilefill
+EXPORT_SYMBOL drivers/video/svgalib 0xe64c4abf	svga_tilecopy
+EXPORT_SYMBOL drivers/video/svgalib 0xec83c473	svga_match_format
+EXPORT_SYMBOL drivers/video/svgalib 0xef774f5d	svga_compute_pll
+EXPORT_SYMBOL drivers/video/syscopyarea 0x5d58c8ad	sys_copyarea
+EXPORT_SYMBOL drivers/video/sysfillrect 0x6cc85443	sys_fillrect
+EXPORT_SYMBOL drivers/video/sysimgblt 0xce896936	sys_imageblit
+EXPORT_SYMBOL drivers/video/vgastate 0x686de290	restore_vga
+EXPORT_SYMBOL drivers/video/vgastate 0xe7a2620e	save_vga
+EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x71ed0080	w1_bq27000_write
+EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x988a849a	w1_bq27000_read
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x041b1f1d	w1_ds2760_store_eeprom
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x4b42af54	w1_ds2760_read
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x672561b1	w1_ds2760_recall_eeprom
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0xb8befa67	w1_ds2760_write
+EXPORT_SYMBOL drivers/w1/wire 0x096845a0	w1_unregister_family
+EXPORT_SYMBOL drivers/w1/wire 0xc4525477	w1_remove_master_device
+EXPORT_SYMBOL drivers/w1/wire 0xf3b87210	w1_register_family
+EXPORT_SYMBOL drivers/w1/wire 0xf6dd6641	w1_add_master_device
+EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0x04e133fc	iTCO_vendor_check_noreboot_on
+EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0x672c9d44	iTCO_vendor_pre_keepalive
+EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xa78bd894	iTCO_vendor_pre_set_heartbeat
+EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xa8d6daac	iTCO_vendor_pre_start
+EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xd0efe320	iTCO_vendor_pre_stop
+EXPORT_SYMBOL fs/configfs/configfs 0x07058d0a	config_group_init_type_name
+EXPORT_SYMBOL fs/configfs/configfs 0x122b8c11	config_item_put
+EXPORT_SYMBOL fs/configfs/configfs 0x18e75381	configfs_unregister_subsystem
+EXPORT_SYMBOL fs/configfs/configfs 0x1ace8327	config_group_find_item
+EXPORT_SYMBOL fs/configfs/configfs 0x2c3d29ac	configfs_depend_item
+EXPORT_SYMBOL fs/configfs/configfs 0x426ba3fb	config_item_init_type_name
+EXPORT_SYMBOL fs/configfs/configfs 0x445b2b2f	config_item_init
+EXPORT_SYMBOL fs/configfs/configfs 0x825887c3	config_item_get
+EXPORT_SYMBOL fs/configfs/configfs 0x948d67dd	configfs_undepend_item
+EXPORT_SYMBOL fs/configfs/configfs 0xb678785f	configfs_register_subsystem
+EXPORT_SYMBOL fs/configfs/configfs 0xde330c9f	config_item_set_name
+EXPORT_SYMBOL fs/configfs/configfs 0xf3be71a3	config_group_init
+EXPORT_SYMBOL fs/fscache/fscache 0x06af4f84	fscache_check_aux
+EXPORT_SYMBOL fs/fscache/fscache 0x07bcc60d	fscache_put_operation
+EXPORT_SYMBOL fs/fscache/fscache 0x07d9b576	fscache_wait_bit_interruptible
+EXPORT_SYMBOL fs/fscache/fscache 0x08657b14	__fscache_register_netfs
+EXPORT_SYMBOL fs/fscache/fscache 0x182e45fa	__fscache_wait_on_page_write
+EXPORT_SYMBOL fs/fscache/fscache 0x1cc51ab7	fscache_mark_pages_cached
+EXPORT_SYMBOL fs/fscache/fscache 0x1fec81b7	fscache_io_error
+EXPORT_SYMBOL fs/fscache/fscache 0x21162d24	fscache_object_slow_work_ops
+EXPORT_SYMBOL fs/fscache/fscache 0x317f892e	__fscache_uncache_page
+EXPORT_SYMBOL fs/fscache/fscache 0x3c299d66	__fscache_acquire_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0x3efded61	__fscache_update_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0x3fc23318	fscache_wait_bit
+EXPORT_SYMBOL fs/fscache/fscache 0x404b06ec	__fscache_attr_changed
+EXPORT_SYMBOL fs/fscache/fscache 0x496932b9	fscache_op_debug_id
+EXPORT_SYMBOL fs/fscache/fscache 0x5febed82	__fscache_relinquish_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0x63f96884	fscache_cache_cleared_wq
+EXPORT_SYMBOL fs/fscache/fscache 0x855703b2	fscache_object_lookup_negative
+EXPORT_SYMBOL fs/fscache/fscache 0x86f8894f	fscache_object_states
+EXPORT_SYMBOL fs/fscache/fscache 0x9b082500	__fscache_read_or_alloc_page
+EXPORT_SYMBOL fs/fscache/fscache 0x9ec48984	fscache_add_cache
+EXPORT_SYMBOL fs/fscache/fscache 0xac55f89f	fscache_fsdef_index
+EXPORT_SYMBOL fs/fscache/fscache 0xbb71f8ee	__fscache_check_page_write
+EXPORT_SYMBOL fs/fscache/fscache 0xbd8b7bec	__fscache_alloc_page
+EXPORT_SYMBOL fs/fscache/fscache 0xc0513718	__fscache_unregister_netfs
+EXPORT_SYMBOL fs/fscache/fscache 0xde1797b1	fscache_init_cache
+EXPORT_SYMBOL fs/fscache/fscache 0xe3015bf6	__fscache_maybe_release_page
+EXPORT_SYMBOL fs/fscache/fscache 0xe98a4d89	__fscache_write_page
+EXPORT_SYMBOL fs/fscache/fscache 0xeadc1d3a	__fscache_read_or_alloc_pages
+EXPORT_SYMBOL fs/fscache/fscache 0xf6a9206f	fscache_obtained_object
+EXPORT_SYMBOL fs/fscache/fscache 0xf6c0ecf7	fscache_enqueue_operation
+EXPORT_SYMBOL fs/fscache/fscache 0xffdc3533	fscache_withdraw_cache
+EXPORT_SYMBOL fs/nfsd/nfsd 0x0e195c1c	nfs4_acl_nfsv4_to_posix
+EXPORT_SYMBOL fs/nfsd/nfsd 0x2095976a	nfs4_acl_new
+EXPORT_SYMBOL fs/nfsd/nfsd 0x28fb929b	nfs4_acl_posix_to_nfsv4
+EXPORT_SYMBOL fs/nfsd/nfsd 0x35e33c1e	nfs4_acl_write_who
+EXPORT_SYMBOL fs/nfsd/nfsd 0x5a157ae4	nfs4_acl_get_whotype
+EXPORT_SYMBOL fs/quota/quota_tree 0x2a40674f	qtree_entry_unused
+EXPORT_SYMBOL fs/quota/quota_tree 0x6b882ebd	qtree_read_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0x82e5108e	qtree_delete_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0xacf563d5	qtree_write_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0xc961e402	qtree_release_dquot
+EXPORT_SYMBOL lib/crc-ccitt 0x3771b461	crc_ccitt
+EXPORT_SYMBOL lib/crc-ccitt 0x75811312	crc_ccitt_table
+EXPORT_SYMBOL lib/crc-itu-t 0xd29b009f	crc_itu_t_table
+EXPORT_SYMBOL lib/crc-itu-t 0xf5b4a948	crc_itu_t
+EXPORT_SYMBOL lib/crc7 0xa7587646	crc7
+EXPORT_SYMBOL lib/crc7 0xd80c3603	crc7_syndrome_table
+EXPORT_SYMBOL lib/libcrc32c 0x27000b29	crc32c
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x315c65fd	zlib_deflateInit2
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x48034724	zlib_deflateReset
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xaf64ad0d	zlib_deflate
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf0caf44b	zlib_deflate_workspacesize
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf741c793	zlib_deflateEnd
+EXPORT_SYMBOL net/802/p8023 0x18953cf2	destroy_8023_client
+EXPORT_SYMBOL net/802/p8023 0x86f60e65	make_8023_client
+EXPORT_SYMBOL net/9p/9pnet 0x009be916	p9_client_stat
+EXPORT_SYMBOL net/9p/9pnet 0x06031364	p9_client_write
+EXPORT_SYMBOL net/9p/9pnet 0x0861a00c	p9_client_version
+EXPORT_SYMBOL net/9p/9pnet 0x196a152d	v9fs_unregister_trans
+EXPORT_SYMBOL net/9p/9pnet 0x3455711e	p9_idpool_destroy
+EXPORT_SYMBOL net/9p/9pnet 0x3d73a797	p9_errstr2errno
+EXPORT_SYMBOL net/9p/9pnet 0x3de7158b	p9_client_create
+EXPORT_SYMBOL net/9p/9pnet 0x4961be0c	p9_client_wstat
+EXPORT_SYMBOL net/9p/9pnet 0x52e8125a	p9_client_attach
+EXPORT_SYMBOL net/9p/9pnet 0x632e788f	p9_client_clunk
+EXPORT_SYMBOL net/9p/9pnet 0x66d5ccde	p9_client_cb
+EXPORT_SYMBOL net/9p/9pnet 0x6b754e6f	p9_parse_header
+EXPORT_SYMBOL net/9p/9pnet 0x75f6f6ee	p9_client_disconnect
+EXPORT_SYMBOL net/9p/9pnet 0x768acc28	p9_client_remove
+EXPORT_SYMBOL net/9p/9pnet 0x76b79bf1	p9stat_read
+EXPORT_SYMBOL net/9p/9pnet 0x83e2b191	p9_client_walk
+EXPORT_SYMBOL net/9p/9pnet 0x8660431a	p9_client_open
+EXPORT_SYMBOL net/9p/9pnet 0x963d3dac	v9fs_register_trans
+EXPORT_SYMBOL net/9p/9pnet 0x9c964743	p9stat_free
+EXPORT_SYMBOL net/9p/9pnet 0xa713d304	p9_client_auth
+EXPORT_SYMBOL net/9p/9pnet 0xaab8671a	p9_idpool_get
+EXPORT_SYMBOL net/9p/9pnet 0xafde3fdc	p9_tag_lookup
+EXPORT_SYMBOL net/9p/9pnet 0xb7b59864	p9_client_destroy
+EXPORT_SYMBOL net/9p/9pnet 0xb8e39195	v9fs_get_default_trans
+EXPORT_SYMBOL net/9p/9pnet 0xcae61af3	p9_idpool_create
+EXPORT_SYMBOL net/9p/9pnet 0xce151065	p9_client_read
+EXPORT_SYMBOL net/9p/9pnet 0xd0faf92e	p9_idpool_check
+EXPORT_SYMBOL net/9p/9pnet 0xd331fc1d	p9pdu_dump
+EXPORT_SYMBOL net/9p/9pnet 0xe58a3360	p9_error_init
+EXPORT_SYMBOL net/9p/9pnet 0xe78cfc2b	v9fs_get_trans_by_name
+EXPORT_SYMBOL net/9p/9pnet 0xef7127b0	p9_idpool_put
+EXPORT_SYMBOL net/9p/9pnet 0xfb88b8c7	p9_client_fcreate
+EXPORT_SYMBOL net/appletalk/appletalk 0x41cedce5	atrtr_get_dev
+EXPORT_SYMBOL net/appletalk/appletalk 0x441ded71	atalk_find_dev_addr
+EXPORT_SYMBOL net/appletalk/appletalk 0x66175133	aarp_send_ddp
+EXPORT_SYMBOL net/appletalk/appletalk 0xfffd60ef	alloc_ltalkdev
+EXPORT_SYMBOL net/atm/atm 0x04f9cf5d	register_atm_ioctl
+EXPORT_SYMBOL net/atm/atm 0x0e353340	atm_dev_deregister
+EXPORT_SYMBOL net/atm/atm 0x191a0cc7	vcc_release_async
+EXPORT_SYMBOL net/atm/atm 0x1a24e5e2	sonet_subtract_stats
+EXPORT_SYMBOL net/atm/atm 0x2cc2d52d	vcc_hash
+EXPORT_SYMBOL net/atm/atm 0x31f6959b	atm_alloc_charge
+EXPORT_SYMBOL net/atm/atm 0x51bf83d0	atm_proc_root
+EXPORT_SYMBOL net/atm/atm 0x6d1ced27	vcc_sklist_lock
+EXPORT_SYMBOL net/atm/atm 0x89195dc3	sonet_copy_stats
+EXPORT_SYMBOL net/atm/atm 0xa0ee3f02	atm_init_aal5
+EXPORT_SYMBOL net/atm/atm 0xa17451af	atm_dev_register
+EXPORT_SYMBOL net/atm/atm 0xaca3d182	atm_dev_lookup
+EXPORT_SYMBOL net/atm/atm 0xcc084bc4	vcc_insert_socket
+EXPORT_SYMBOL net/atm/atm 0xd0fac931	atm_charge
+EXPORT_SYMBOL net/atm/atm 0xe4b6df74	deregister_atm_ioctl
+EXPORT_SYMBOL net/atm/atm 0xf49bc67a	atm_pcr_goal
+EXPORT_SYMBOL net/ax25/ax25 0x021894e5	ax25_send_frame
+EXPORT_SYMBOL net/ax25/ax25 0x0398f93e	ax25_linkfail_register
+EXPORT_SYMBOL net/ax25/ax25 0x15169052	ax25_rebuild_header
+EXPORT_SYMBOL net/ax25/ax25 0x17bbdeb8	ax25_listen_register
+EXPORT_SYMBOL net/ax25/ax25 0x20780f22	ax25_find_cb
+EXPORT_SYMBOL net/ax25/ax25 0x242852b9	ax25_uid_policy
+EXPORT_SYMBOL net/ax25/ax25 0x3d2d82ec	ax25_display_timer
+EXPORT_SYMBOL net/ax25/ax25 0x4502c65a	asc2ax
+EXPORT_SYMBOL net/ax25/ax25 0x51f7ff7f	ax25_hard_header
+EXPORT_SYMBOL net/ax25/ax25 0x53dea1ff	ax2asc
+EXPORT_SYMBOL net/ax25/ax25 0x564d9f14	ax25_findbyuid
+EXPORT_SYMBOL net/ax25/ax25 0x8ede9e26	ax25_protocol_release
+EXPORT_SYMBOL net/ax25/ax25 0x91bfdf78	ax25_header_ops
+EXPORT_SYMBOL net/ax25/ax25 0xa9a6773b	ax25_linkfail_release
+EXPORT_SYMBOL net/ax25/ax25 0xb8323d41	ax25_listen_release
+EXPORT_SYMBOL net/ax25/ax25 0xc1444946	ax25cmp
+EXPORT_SYMBOL net/ax25/ax25 0xd43ecbf1	null_ax25_address
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x0d1f73d9	hci_send_sco
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x1842cd6a	bt_sock_ioctl
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x1c4c47d0	hci_conn_change_link_key
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x29f66214	bt_accept_dequeue
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x2e5cf14d	hci_unregister_proto
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x2efd39d8	hci_conn_switch_role
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x30762ba8	hci_conn_check_link_mode
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x38a493ee	hci_connect
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x3c64f89e	hci_register_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x438a6885	hci_unregister_cb
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x583b7a17	bt_sock_poll
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x58f0b9ff	bt_accept_unlink
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x59a132d8	hci_free_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x5b3017ad	hci_register_cb
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x7094f8ae	bt_err
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x719b071a	hci_conn_put_device
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x72bc4d46	hci_alloc_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x7e4bcb23	hci_conn_hold_device
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x8530630d	bt_accept_enqueue
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x863f959e	hci_suspend_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x92ae9556	bt_sock_recvmsg
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xa45cddf2	hci_get_route
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xad04f800	bt_sock_link
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xb026f9c8	bt_sock_register
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xb61037ee	hci_send_acl
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xba4d0c3c	hci_register_proto
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xbd6d3a88	bt_sock_wait_state
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xc2066af0	batostr
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xcc1fb551	baswap
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xd0d0103b	hci_resume_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xdb326b38	hci_recv_fragment
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xddeacf28	bt_sock_unlink
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xec6073bc	hci_conn_security
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xf19294db	bt_sock_unregister
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xff8d31b3	hci_unregister_dev
+EXPORT_SYMBOL net/bluetooth/l2cap 0xfc31fe88	l2cap_load
+EXPORT_SYMBOL net/bridge/bridge 0xca7c75f8	br_should_route_hook
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x38940686	ebt_unregister_table
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x3dfa1e22	ebt_register_table
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0xbf522c58	ebt_do_table
+EXPORT_SYMBOL net/can/can 0x51131882	can_rx_register
+EXPORT_SYMBOL net/can/can 0x54316c35	can_proto_unregister
+EXPORT_SYMBOL net/can/can 0x91967d95	can_send
+EXPORT_SYMBOL net/can/can 0xe6e20165	can_rx_unregister
+EXPORT_SYMBOL net/can/can 0xefbfcdc8	can_proto_register
+EXPORT_SYMBOL net/ieee802154/nl802154 0x152bef15	ieee802154_nl_beacon_indic
+EXPORT_SYMBOL net/ieee802154/nl802154 0x28a48b59	ieee802154_nl_assoc_indic
+EXPORT_SYMBOL net/ieee802154/nl802154 0x2abfd03f	ieee802154_nl_assoc_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0x5a069aaa	ieee802154_nl_start_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0x6388be15	ieee802154_nl_disassoc_indic
+EXPORT_SYMBOL net/ieee802154/nl802154 0x7ba6c5ce	ieee802154_nl_scan_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0x83621b99	ieee802154_nl_disassoc_confirm
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x21427a32	wpan_phy_find
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x4416f6cb	wpan_phy_free
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x9d540708	wpan_phy_register
+EXPORT_SYMBOL net/ieee802154/wpan-class 0xc46790e6	wpan_phy_alloc
+EXPORT_SYMBOL net/ieee802154/wpan-class 0xf21c3ecf	wpan_phy_unregister
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x2ff42c08	arpt_register_table
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x5a1cebc4	arpt_do_table
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xb6e2a2a3	arpt_unregister_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x266c3dba	ipt_do_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x4eed75ee	ipt_register_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x89f1a377	ipt_unregister_table
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x000ebe6c	nf_nat_protocol_register
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x194ce8b7	nf_nat_follow_master
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x386eb38a	nf_nat_protocol_unregister
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x7ee730f0	nf_nat_setup_info
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x84349e41	nf_nat_mangle_udp_packet
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xaad93b97	nf_nat_used_tuple
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xf81ddac3	nf_nat_mangle_tcp_packet
+EXPORT_SYMBOL net/ipv4/tunnel4 0xa2d49134	xfrm4_tunnel_register
+EXPORT_SYMBOL net/ipv4/tunnel4 0xb5446513	xfrm4_tunnel_deregister
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x16cf5a60	ipv6_find_hdr
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xb7b9292e	ip6t_do_table
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xb8bddf33	ip6t_ext_hdr
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xcf370090	ip6t_register_table
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xf27a1772	ip6t_unregister_table
+EXPORT_SYMBOL net/ipv6/tunnel6 0xa1aa2174	xfrm6_tunnel_register
+EXPORT_SYMBOL net/ipv6/tunnel6 0xbe0ce80a	xfrm6_tunnel_deregister
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0x9cd013f2	xfrm6_tunnel_alloc_spi
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xab14e193	xfrm6_tunnel_free_spi
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xdb1b42d1	xfrm6_tunnel_spi_lookup
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x20e6a6df	ircomm_open
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x24a0fd56	ircomm_control_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x411649f0	ircomm_disconnect_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x41e9b47f	ircomm_close
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x8660e558	ircomm_flow_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0xac6cda47	ircomm_connect_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0xe007da65	ircomm_connect_response
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0xefcf5247	ircomm_data_request
+EXPORT_SYMBOL net/irda/irda 0x00f2b2e4	irlmp_connect_request
+EXPORT_SYMBOL net/irda/irda 0x01d1fcdb	hashbin_delete
+EXPORT_SYMBOL net/irda/irda 0x0628fa73	alloc_irdadev
+EXPORT_SYMBOL net/irda/irda 0x06a3ee58	irias_new_integer_value
+EXPORT_SYMBOL net/irda/irda 0x072e026f	irias_add_octseq_attrib
+EXPORT_SYMBOL net/irda/irda 0x07d3647c	irlmp_register_service
+EXPORT_SYMBOL net/irda/irda 0x0c172b33	irda_notify_init
+EXPORT_SYMBOL net/irda/irda 0x14125f7f	irlmp_disconnect_request
+EXPORT_SYMBOL net/irda/irda 0x146257f3	irlap_close
+EXPORT_SYMBOL net/irda/irda 0x1911a14e	irttp_data_request
+EXPORT_SYMBOL net/irda/irda 0x2036ad06	irda_param_insert
+EXPORT_SYMBOL net/irda/irda 0x2ebb1a6d	irttp_connect_request
+EXPORT_SYMBOL net/irda/irda 0x3462950f	hashbin_remove
+EXPORT_SYMBOL net/irda/irda 0x36f9f6f7	async_unwrap_char
+EXPORT_SYMBOL net/irda/irda 0x37e0c120	irttp_dup
+EXPORT_SYMBOL net/irda/irda 0x38a20e5b	irda_debug
+EXPORT_SYMBOL net/irda/irda 0x448b8aaa	irda_qos_bits_to_value
+EXPORT_SYMBOL net/irda/irda 0x46c1c4a2	irlmp_unregister_service
+EXPORT_SYMBOL net/irda/irda 0x47f75b7d	irlap_open
+EXPORT_SYMBOL net/irda/irda 0x4efb1464	irttp_udata_request
+EXPORT_SYMBOL net/irda/irda 0x5014128f	irttp_connect_response
+EXPORT_SYMBOL net/irda/irda 0x57316d49	irttp_close_tsap
+EXPORT_SYMBOL net/irda/irda 0x61107fe8	proc_irda
+EXPORT_SYMBOL net/irda/irda 0x6758f8ac	irias_new_object
+EXPORT_SYMBOL net/irda/irda 0x68b7447c	hashbin_find
+EXPORT_SYMBOL net/irda/irda 0x69989164	irttp_open_tsap
+EXPORT_SYMBOL net/irda/irda 0x6b043eba	irda_init_max_qos_capabilies
+EXPORT_SYMBOL net/irda/irda 0x6b30bdd3	irda_device_set_media_busy
+EXPORT_SYMBOL net/irda/irda 0x7042bc54	irlmp_register_client
+EXPORT_SYMBOL net/irda/irda 0x7185bd57	iriap_getvaluebyclass_request
+EXPORT_SYMBOL net/irda/irda 0x747d6779	irias_delete_object
+EXPORT_SYMBOL net/irda/irda 0x7621e908	hashbin_insert
+EXPORT_SYMBOL net/irda/irda 0x76243bc9	irias_insert_object
+EXPORT_SYMBOL net/irda/irda 0x763e54a4	irlmp_unregister_client
+EXPORT_SYMBOL net/irda/irda 0x781e2db5	irias_find_object
+EXPORT_SYMBOL net/irda/irda 0x79422587	async_wrap_skb
+EXPORT_SYMBOL net/irda/irda 0x7957f728	irlmp_update_client
+EXPORT_SYMBOL net/irda/irda 0x79e29ce2	irttp_disconnect_request
+EXPORT_SYMBOL net/irda/irda 0x7a57b6f3	hashbin_remove_this
+EXPORT_SYMBOL net/irda/irda 0x91815586	irda_param_pack
+EXPORT_SYMBOL net/irda/irda 0x94c65521	irlmp_connect_response
+EXPORT_SYMBOL net/irda/irda 0x96d9ff43	iriap_open
+EXPORT_SYMBOL net/irda/irda 0x993ad14b	irda_param_extract_all
+EXPORT_SYMBOL net/irda/irda 0x9aaa2636	irlmp_data_request
+EXPORT_SYMBOL net/irda/irda 0xad25543f	irlmp_close_lsap
+EXPORT_SYMBOL net/irda/irda 0xad36869e	irlmp_open_lsap
+EXPORT_SYMBOL net/irda/irda 0xb9394173	irias_delete_value
+EXPORT_SYMBOL net/irda/irda 0xbcd3ef13	irias_object_change_attribute
+EXPORT_SYMBOL net/irda/irda 0xbe40ace9	irlmp_discovery_request
+EXPORT_SYMBOL net/irda/irda 0xc14e9b6a	hashbin_get_next
+EXPORT_SYMBOL net/irda/irda 0xcd41236c	hashbin_new
+EXPORT_SYMBOL net/irda/irda 0xd7172ff4	hashbin_get_first
+EXPORT_SYMBOL net/irda/irda 0xd8bfb6d4	hashbin_lock_find
+EXPORT_SYMBOL net/irda/irda 0xdd66e7c4	iriap_close
+EXPORT_SYMBOL net/irda/irda 0xde4c6b3c	irlmp_service_to_hint
+EXPORT_SYMBOL net/irda/irda 0xe5260e0e	irias_add_integer_attrib
+EXPORT_SYMBOL net/irda/irda 0xec41fe7f	irias_add_string_attrib
+EXPORT_SYMBOL net/irda/irda 0xedd521c2	irlmp_get_discoveries
+EXPORT_SYMBOL net/irda/irda 0xf39b7fe0	irda_setup_dma
+EXPORT_SYMBOL net/irda/irda 0xfa614b7b	irttp_flow_request
+EXPORT_SYMBOL net/lapb/lapb 0x00149db6	lapb_disconnect_request
+EXPORT_SYMBOL net/lapb/lapb 0x1c107660	lapb_data_received
+EXPORT_SYMBOL net/lapb/lapb 0x2e34da5a	lapb_connect_request
+EXPORT_SYMBOL net/lapb/lapb 0x4d4d34b3	lapb_setparms
+EXPORT_SYMBOL net/lapb/lapb 0x8d4e4d45	lapb_getparms
+EXPORT_SYMBOL net/lapb/lapb 0xb0ac9053	lapb_unregister
+EXPORT_SYMBOL net/lapb/lapb 0xe15c9e96	lapb_register
+EXPORT_SYMBOL net/lapb/lapb 0xf35f37a3	lapb_data_request
+EXPORT_SYMBOL net/mac80211/mac80211 0x037ed679	ieee80211_stop_tx_ba_cb
+EXPORT_SYMBOL net/mac80211/mac80211 0x0fd2e050	ieee80211_alloc_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x12b09197	ieee80211_find_sta
+EXPORT_SYMBOL net/mac80211/mac80211 0x1583dd3c	ieee80211_beacon_get
+EXPORT_SYMBOL net/mac80211/mac80211 0x1a9ae3cb	ieee80211_free_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x1b56e72a	ieee80211_start_tx_ba_cb_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0x204f5c44	__ieee80211_get_tx_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0x21301878	ieee80211_queue_stopped
+EXPORT_SYMBOL net/mac80211/mac80211 0x21df4f75	__ieee80211_get_assoc_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0x22157e54	ieee80211_generic_frame_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0x318a5397	ieee80211_queue_delayed_work
+EXPORT_SYMBOL net/mac80211/mac80211 0x33741a04	ieee80211_get_tkip_key
+EXPORT_SYMBOL net/mac80211/mac80211 0x349a0cd1	ieee80211_ctstoself_get
+EXPORT_SYMBOL net/mac80211/mac80211 0x3c36662f	ieee80211_rx_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0x463c7e07	ieee80211_stop_queues
+EXPORT_SYMBOL net/mac80211/mac80211 0x5f4f2176	wiphy_to_ieee80211_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x6011ec4d	ieee80211_register_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x61b19ca8	ieee80211_ctstoself_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0x62b0935c	__ieee80211_get_radio_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0x69d3f0e0	ieee80211_stop_tx_ba_cb_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0x80a3af07	ieee80211_rate_control_register
+EXPORT_SYMBOL net/mac80211/mac80211 0x813275ed	ieee80211_wake_queues
+EXPORT_SYMBOL net/mac80211/mac80211 0x827b3004	ieee80211_rx
+EXPORT_SYMBOL net/mac80211/mac80211 0x95f2eb99	ieee80211_rate_control_unregister
+EXPORT_SYMBOL net/mac80211/mac80211 0x9d46865b	ieee80211_start_tx_ba_cb
+EXPORT_SYMBOL net/mac80211/mac80211 0xa3b30a13	__ieee80211_get_rx_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0xa3dfd77c	ieee80211_restart_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xa6350158	ieee80211_start_tx_ba_session
+EXPORT_SYMBOL net/mac80211/mac80211 0xade1c938	ieee80211_tx_status
+EXPORT_SYMBOL net/mac80211/mac80211 0xbd80809c	ieee80211_stop_tx_ba_session
+EXPORT_SYMBOL net/mac80211/mac80211 0xc3c824b0	ieee80211_rts_get
+EXPORT_SYMBOL net/mac80211/mac80211 0xd4fbcf10	ieee80211_scan_completed
+EXPORT_SYMBOL net/mac80211/mac80211 0xd507c449	ieee80211_queue_work
+EXPORT_SYMBOL net/mac80211/mac80211 0xd9633f09	rate_control_send_low
+EXPORT_SYMBOL net/mac80211/mac80211 0xdb1b613c	ieee80211_wake_queue
+EXPORT_SYMBOL net/mac80211/mac80211 0xe05b55c0	ieee80211_stop_queue
+EXPORT_SYMBOL net/mac80211/mac80211 0xe0ded2e7	ieee80211_tx_status_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0xe8abe42d	ieee80211_beacon_loss
+EXPORT_SYMBOL net/mac80211/mac80211 0xed4d1cd7	ieee80211_rts_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0xf4d87379	ieee80211_unregister_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xffbb945b	ieee80211_get_buffered_bc
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x03381806	unregister_ip_vs_app
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x12f7f9bd	unregister_ip_vs_scheduler
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x139e3a12	ip_vs_conn_out_get
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x1e5d2da1	register_ip_vs_app_inc
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xa1dbc2d8	ip_vs_proto_name
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xc59ba580	ip_vs_tcp_conn_listen
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xcee284c9	ip_vs_conn_new
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xdf50665e	register_ip_vs_scheduler
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xe8b38889	ip_vs_conn_in_get
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xec3f05f9	register_ip_vs_app
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xef090fdc	ip_vs_conn_put
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xfc52fc1b	ip_vs_skb_replace
+EXPORT_SYMBOL net/netfilter/nf_conntrack 0x9b3d6ba0	__nf_ct_ext_add
+EXPORT_SYMBOL net/netfilter/nf_conntrack 0xc4f5c947	__nf_ct_ext_destroy
+EXPORT_SYMBOL net/netfilter/nf_conntrack_proto_gre 0x4df102e6	nf_ct_gre_keymap_flush
+EXPORT_SYMBOL net/netfilter/x_tables 0x16a5e826	xt_free_table_info
+EXPORT_SYMBOL net/netfilter/x_tables 0x1fb0e214	xt_unregister_target
+EXPORT_SYMBOL net/netfilter/x_tables 0x29c3fab6	xt_unregister_matches
+EXPORT_SYMBOL net/netfilter/x_tables 0x4071a9a0	xt_unregister_targets
+EXPORT_SYMBOL net/netfilter/x_tables 0x7dd5c588	xt_register_targets
+EXPORT_SYMBOL net/netfilter/x_tables 0xbcb47d11	xt_find_target
+EXPORT_SYMBOL net/netfilter/x_tables 0xc3ff5dff	xt_alloc_table_info
+EXPORT_SYMBOL net/netfilter/x_tables 0xe006652e	xt_register_target
+EXPORT_SYMBOL net/netfilter/x_tables 0xee43be25	xt_register_matches
+EXPORT_SYMBOL net/netfilter/x_tables 0xfa546e5e	xt_register_match
+EXPORT_SYMBOL net/netfilter/x_tables 0xfe02d8dc	xt_find_match
+EXPORT_SYMBOL net/netfilter/x_tables 0xff5d6172	xt_unregister_match
+EXPORT_SYMBOL net/phonet/phonet 0x0dbf9b01	pn_sock_get_port
+EXPORT_SYMBOL net/phonet/phonet 0x1450b891	phonet_header_ops
+EXPORT_SYMBOL net/phonet/phonet 0x5987661d	phonet_proto_unregister
+EXPORT_SYMBOL net/phonet/phonet 0x71c335e4	pn_sock_hash
+EXPORT_SYMBOL net/phonet/phonet 0x9dcd9185	phonet_stream_ops
+EXPORT_SYMBOL net/phonet/phonet 0xa4dd970c	pn_skb_send
+EXPORT_SYMBOL net/phonet/phonet 0xd32294e9	phonet_proto_register
+EXPORT_SYMBOL net/phonet/phonet 0xe618b287	pn_sock_unhash
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x07752171	rxrpc_kernel_get_abort_code
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x1aa923e4	key_type_rxrpc
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x254e5277	rxrpc_kernel_begin_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x43c0f933	rxrpc_get_server_data_key
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x53739b08	rxrpc_kernel_reject_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x5d683d31	rxrpc_kernel_intercept_rx_messages
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x7e18fd5f	rxrpc_kernel_data_delivered
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x8c5a8fdf	rxrpc_kernel_abort_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x971a43bc	rxrpc_kernel_free_skb
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xd81fcc14	rxrpc_kernel_accept_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xe9d639f6	rxrpc_kernel_end_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xef846c68	rxrpc_get_null_key
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xf397e85f	rxrpc_kernel_is_data_last
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xfb139d80	rxrpc_kernel_get_error_number
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xfb6527f4	rxrpc_kernel_send_data
+EXPORT_SYMBOL net/sunrpc/sunrpc 0xbb9f36d9	svc_pool_stats_open
+EXPORT_SYMBOL net/tipc/tipc 0x0193ce74	tipc_reject_msg
+EXPORT_SYMBOL net/tipc/tipc 0x08acf310	tipc_available_nodes
+EXPORT_SYMBOL net/tipc/tipc 0x0c4a5208	tipc_recv_msg
+EXPORT_SYMBOL net/tipc/tipc 0x10d40fcd	tipc_isconnected
+EXPORT_SYMBOL net/tipc/tipc 0x1472b270	tipc_disconnect
+EXPORT_SYMBOL net/tipc/tipc 0x1479cb03	tipc_deleteport
+EXPORT_SYMBOL net/tipc/tipc 0x15b5ecde	tipc_set_portunreliable
+EXPORT_SYMBOL net/tipc/tipc 0x16f27683	tipc_block_bearer
+EXPORT_SYMBOL net/tipc/tipc 0x259b74f9	tipc_acknowledge
+EXPORT_SYMBOL net/tipc/tipc 0x27d8bb58	tipc_send2port
+EXPORT_SYMBOL net/tipc/tipc 0x310d1bc9	tipc_detach
+EXPORT_SYMBOL net/tipc/tipc 0x3712e340	tipc_portunreliable
+EXPORT_SYMBOL net/tipc/tipc 0x3976041f	tipc_set_portimportance
+EXPORT_SYMBOL net/tipc/tipc 0x44507c55	tipc_forward_buf2port
+EXPORT_SYMBOL net/tipc/tipc 0x4b2243c6	tipc_portimportance
+EXPORT_SYMBOL net/tipc/tipc 0x4ba3cfc8	tipc_send2name
+EXPORT_SYMBOL net/tipc/tipc 0x538b228a	tipc_withdraw
+EXPORT_SYMBOL net/tipc/tipc 0x5637ed44	tipc_get_mode
+EXPORT_SYMBOL net/tipc/tipc 0x56e52bc1	tipc_continue
+EXPORT_SYMBOL net/tipc/tipc 0x5b0c1646	tipc_send_buf2port
+EXPORT_SYMBOL net/tipc/tipc 0x5c0d4b5c	tipc_ref_valid
+EXPORT_SYMBOL net/tipc/tipc 0x62a681a3	tipc_portunreturnable
+EXPORT_SYMBOL net/tipc/tipc 0x64357d3c	tipc_multicast
+EXPORT_SYMBOL net/tipc/tipc 0x654478a1	tipc_createport_raw
+EXPORT_SYMBOL net/tipc/tipc 0x8001e3d7	tipc_forward2port
+EXPORT_SYMBOL net/tipc/tipc 0x88b73627	tipc_get_addr
+EXPORT_SYMBOL net/tipc/tipc 0x88c4c207	tipc_register_media
+EXPORT_SYMBOL net/tipc/tipc 0x89569888	tipc_send_buf
+EXPORT_SYMBOL net/tipc/tipc 0x9bba3082	tipc_forward_buf2name
+EXPORT_SYMBOL net/tipc/tipc 0x9c45558e	tipc_enable_bearer
+EXPORT_SYMBOL net/tipc/tipc 0x9f3a6d74	tipc_send_buf2name
+EXPORT_SYMBOL net/tipc/tipc 0xa936a24b	tipc_get_port
+EXPORT_SYMBOL net/tipc/tipc 0xadd203d0	tipc_connect2port
+EXPORT_SYMBOL net/tipc/tipc 0xae0103c3	tipc_shutdown
+EXPORT_SYMBOL net/tipc/tipc 0xaf329294	tipc_createport
+EXPORT_SYMBOL net/tipc/tipc 0xb01ffc2c	tipc_forward2name
+EXPORT_SYMBOL net/tipc/tipc 0xb35b672c	tipc_publish
+EXPORT_SYMBOL net/tipc/tipc 0xbb2b2504	tipc_send
+EXPORT_SYMBOL net/tipc/tipc 0xbf00ea83	tipc_send_buf_fast
+EXPORT_SYMBOL net/tipc/tipc 0xcec8514a	tipc_set_portunreturnable
+EXPORT_SYMBOL net/tipc/tipc 0xd44731e5	tipc_ownidentity
+EXPORT_SYMBOL net/tipc/tipc 0xda7f9d3f	tipc_attach
+EXPORT_SYMBOL net/tipc/tipc 0xdf5008fc	tipc_peer
+EXPORT_SYMBOL net/tipc/tipc 0xe7aece47	tipc_ispublished
+EXPORT_SYMBOL net/tipc/tipc 0xeefd49b3	tipc_get_handle
+EXPORT_SYMBOL net/tipc/tipc 0xef50a1ef	tipc_disable_bearer
+EXPORT_SYMBOL net/wanrouter/wanrouter 0x0ebe03d1	unregister_wan_device
+EXPORT_SYMBOL net/wanrouter/wanrouter 0x236e85dd	register_wan_device
+EXPORT_SYMBOL net/wimax/wimax 0x67cb334c	wimax_rfkill
+EXPORT_SYMBOL net/wimax/wimax 0xd4bd3caa	wimax_reset
+EXPORT_SYMBOL net/wireless/cfg80211 0x07e7ac5a	ieee80211_radiotap_iterator_init
+EXPORT_SYMBOL net/wireless/cfg80211 0x09c64fbd	ieee80211_frequency_to_channel
+EXPORT_SYMBOL net/wireless/cfg80211 0x1879fcbd	bridge_tunnel_header
+EXPORT_SYMBOL net/wireless/cfg80211 0x1bd72e5a	wiphy_register
+EXPORT_SYMBOL net/wireless/cfg80211 0x251710d8	wiphy_free
+EXPORT_SYMBOL net/wireless/cfg80211 0x2bc99c1a	wiphy_apply_custom_regulatory
+EXPORT_SYMBOL net/wireless/cfg80211 0x2bd480a7	cfg80211_send_assoc_timeout
+EXPORT_SYMBOL net/wireless/cfg80211 0x33b9b21d	cfg80211_inform_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0x37ac8d05	ieee80211_get_response_rate
+EXPORT_SYMBOL net/wireless/cfg80211 0x39bba389	cfg80211_send_deauth
+EXPORT_SYMBOL net/wireless/cfg80211 0x47a2aeb7	ieee80211_get_hdrlen_from_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0x49eae39a	__ieee80211_get_channel
+EXPORT_SYMBOL net/wireless/cfg80211 0x4c8f01b2	cfg80211_disconnected
+EXPORT_SYMBOL net/wireless/cfg80211 0x55ab0e36	cfg80211_send_rx_auth
+EXPORT_SYMBOL net/wireless/cfg80211 0x570a24cc	wiphy_new
+EXPORT_SYMBOL net/wireless/cfg80211 0x5815fb4a	cfg80211_classify8021d
+EXPORT_SYMBOL net/wireless/cfg80211 0x5a9864d6	cfg80211_inform_bss_frame
+EXPORT_SYMBOL net/wireless/cfg80211 0x5ac15670	cfg80211_send_auth_timeout
+EXPORT_SYMBOL net/wireless/cfg80211 0x676ee618	cfg80211_ibss_joined
+EXPORT_SYMBOL net/wireless/cfg80211 0x69b18f43	rfc1042_header
+EXPORT_SYMBOL net/wireless/cfg80211 0x734277b9	cfg80211_send_rx_assoc
+EXPORT_SYMBOL net/wireless/cfg80211 0x883c7799	wiphy_rfkill_start_polling
+EXPORT_SYMBOL net/wireless/cfg80211 0x8ac3c13a	cfg80211_testmode_alloc_reply_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0x8c1778ff	cfg80211_connect_result
+EXPORT_SYMBOL net/wireless/cfg80211 0x8c35d732	ieee80211_hdrlen
+EXPORT_SYMBOL net/wireless/cfg80211 0x8e8d02cb	cfg80211_send_disassoc
+EXPORT_SYMBOL net/wireless/cfg80211 0x90eb5e02	cfg80211_put_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0x91dcbe4d	cfg80211_scan_done
+EXPORT_SYMBOL net/wireless/cfg80211 0x991bd6d8	regulatory_hint
+EXPORT_SYMBOL net/wireless/cfg80211 0x99d40409	wiphy_unregister
+EXPORT_SYMBOL net/wireless/cfg80211 0xa9ecae1c	cfg80211_testmode_alloc_event_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0xaa3dca23	wiphy_rfkill_stop_polling
+EXPORT_SYMBOL net/wireless/cfg80211 0xabede290	cfg80211_get_mesh
+EXPORT_SYMBOL net/wireless/cfg80211 0xb4cc5c3a	ieee80211_data_to_8023
+EXPORT_SYMBOL net/wireless/cfg80211 0xc36e7b65	cfg80211_testmode_event
+EXPORT_SYMBOL net/wireless/cfg80211 0xc44956b8	cfg80211_roamed
+EXPORT_SYMBOL net/wireless/cfg80211 0xc4e85ec5	ieee80211_radiotap_iterator_next
+EXPORT_SYMBOL net/wireless/cfg80211 0xc70db18c	cfg80211_get_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0xc931a03d	ieee80211_bss_get_ie
+EXPORT_SYMBOL net/wireless/cfg80211 0xccc291b3	ieee80211_channel_to_frequency
+EXPORT_SYMBOL net/wireless/cfg80211 0xd3b8343d	cfg80211_unlink_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0xd6766b22	cfg80211_michael_mic_failure
+EXPORT_SYMBOL net/wireless/cfg80211 0xdf48b151	ieee80211_data_from_8023
+EXPORT_SYMBOL net/wireless/cfg80211 0xf9f4d8a3	cfg80211_testmode_reply
+EXPORT_SYMBOL net/wireless/cfg80211 0xfb6291d7	wiphy_rfkill_set_hw_state
+EXPORT_SYMBOL net/wireless/cfg80211 0xfecfd8e2	freq_reg_info
+EXPORT_SYMBOL net/wireless/lib80211 0x0297697a	lib80211_crypt_quiescing
+EXPORT_SYMBOL net/wireless/lib80211 0x1b52ae1c	lib80211_crypt_deinit_entries
+EXPORT_SYMBOL net/wireless/lib80211 0x230f3ffb	lib80211_crypt_deinit_handler
+EXPORT_SYMBOL net/wireless/lib80211 0x29032852	lib80211_crypt_info_free
+EXPORT_SYMBOL net/wireless/lib80211 0x2d0f99e5	print_ssid
+EXPORT_SYMBOL net/wireless/lib80211 0xb41b6f19	lib80211_crypt_info_init
+EXPORT_SYMBOL net/wireless/lib80211 0xbb86eb8e	lib80211_get_crypto_ops
+EXPORT_SYMBOL net/wireless/lib80211 0xbc6ad4ff	lib80211_unregister_crypto_ops
+EXPORT_SYMBOL net/wireless/lib80211 0xecbaa1e6	lib80211_crypt_delayed_deinit
+EXPORT_SYMBOL net/wireless/lib80211 0xf1c559a6	lib80211_register_crypto_ops
+EXPORT_SYMBOL sound/ac97_bus 0x0ed108f5	ac97_bus_type
+EXPORT_SYMBOL sound/core/oss/snd-mixer-oss 0x64bb063f	snd_mixer_oss_ioctl_card
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x1a724fcc	snd_seq_kernel_client_ctl
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x2bc7899d	snd_seq_event_port_attach
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x3fb4d161	snd_seq_kernel_client_dispatch
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x6ae40ba8	snd_seq_kernel_client_enqueue_blocking
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x6bb71038	snd_seq_delete_kernel_client
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x732cce89	snd_seq_create_kernel_client
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x7ac2f329	snd_seq_expand_var_event
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x7b8699eb	snd_seq_event_port_detach
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x89947013	snd_use_lock_sync_helper
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xac075e94	snd_seq_kernel_client_write_poll
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xb8e448a0	snd_seq_set_queue_tempo
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xcac0a3be	snd_seq_kernel_client_enqueue
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xe934da1d	snd_seq_dump_var_event
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x28682b03	snd_seq_device_new
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x3a57f235	snd_seq_autoload_unlock
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x6339b6d0	snd_seq_device_load_drivers
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x7ebd965f	snd_seq_device_register_driver
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xb90668b2	snd_seq_autoload_lock
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xc622fb29	snd_seq_device_unregister_driver
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x6ea09972	snd_midi_channel_alloc_set
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x833a3e07	snd_midi_channel_set_clear
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xb9948d2c	snd_midi_channel_free_set
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xf0a1fdb3	snd_midi_process_event
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x17c15809	snd_midi_event_decode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x4ad3f518	snd_midi_event_reset_decode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x62384d3a	snd_midi_event_encode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x8a348811	snd_midi_event_reset_encode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x9df7af8b	snd_midi_event_free
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xc482499d	snd_midi_event_new
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xd9072e1a	snd_midi_event_no_status
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xe6df29c7	snd_midi_event_encode_byte
+EXPORT_SYMBOL sound/core/seq/snd-seq-virmidi 0xa91b528e	snd_virmidi_new
+EXPORT_SYMBOL sound/core/snd 0x00ba2e0d	snd_device_register
+EXPORT_SYMBOL sound/core/snd 0x051768f0	snd_mixer_oss_notify_callback
+EXPORT_SYMBOL sound/core/snd 0x12197457	snd_ctl_new1
+EXPORT_SYMBOL sound/core/snd 0x149d3e7f	snd_ctl_register_ioctl
+EXPORT_SYMBOL sound/core/snd 0x18e1683f	snd_dma_program
+EXPORT_SYMBOL sound/core/snd 0x191e88cf	snd_dma_pointer
+EXPORT_SYMBOL sound/core/snd 0x198788b4	snd_lookup_oss_minor_data
+EXPORT_SYMBOL sound/core/snd 0x24a94b26	snd_info_get_line
+EXPORT_SYMBOL sound/core/snd 0x259b6989	snd_pci_quirk_lookup
+EXPORT_SYMBOL sound/core/snd 0x2d483451	snd_jack_set_parent
+EXPORT_SYMBOL sound/core/snd 0x35fbb5d4	snd_ctl_free_one
+EXPORT_SYMBOL sound/core/snd 0x38a12a12	snd_card_register
+EXPORT_SYMBOL sound/core/snd 0x3971b4df	snd_ecards_limit
+EXPORT_SYMBOL sound/core/snd 0x3b9e3252	snd_info_register
+EXPORT_SYMBOL sound/core/snd 0x41fe02f1	snd_device_new
+EXPORT_SYMBOL sound/core/snd 0x4a3ea5c0	snd_request_card
+EXPORT_SYMBOL sound/core/snd 0x508344d6	snd_cards
+EXPORT_SYMBOL sound/core/snd 0x534246f8	snd_ctl_add
+EXPORT_SYMBOL sound/core/snd 0x54231157	snd_card_free_when_closed
+EXPORT_SYMBOL sound/core/snd 0x54e8e2e3	snd_unregister_oss_device
+EXPORT_SYMBOL sound/core/snd 0x56a7dcd7	snd_ctl_notify
+EXPORT_SYMBOL sound/core/snd 0x5c5f174f	snd_ctl_find_id
+EXPORT_SYMBOL sound/core/snd 0x5ff4b616	snd_register_device_for_dev
+EXPORT_SYMBOL sound/core/snd 0x602c96f0	copy_to_user_fromio
+EXPORT_SYMBOL sound/core/snd 0x61319ca3	snd_card_create
+EXPORT_SYMBOL sound/core/snd 0x68132953	snd_ctl_remove
+EXPORT_SYMBOL sound/core/snd 0x69d0cd16	snd_unregister_device
+EXPORT_SYMBOL sound/core/snd 0x6ec8fb45	snd_component_add
+EXPORT_SYMBOL sound/core/snd 0x70705db9	snd_card_free
+EXPORT_SYMBOL sound/core/snd 0x70c15ac1	snd_dma_disable
+EXPORT_SYMBOL sound/core/snd 0x72e7c707	snd_ctl_find_numid
+EXPORT_SYMBOL sound/core/snd 0x7940451d	snd_ctl_rename_id
+EXPORT_SYMBOL sound/core/snd 0x7f630b49	snd_add_device_sysfs_file
+EXPORT_SYMBOL sound/core/snd 0x8520dcf8	snd_ctl_unregister_ioctl
+EXPORT_SYMBOL sound/core/snd 0x88d0fb69	snd_register_oss_device
+EXPORT_SYMBOL sound/core/snd 0x8df3789f	snd_oss_info_register
+EXPORT_SYMBOL sound/core/snd 0x8f595b11	snd_major
+EXPORT_SYMBOL sound/core/snd 0x96b33cdb	snd_ctl_boolean_mono_info
+EXPORT_SYMBOL sound/core/snd 0x9791f67f	snd_power_wait
+EXPORT_SYMBOL sound/core/snd 0x9abdc1af	snd_seq_root
+EXPORT_SYMBOL sound/core/snd 0x9e6d79f8	snd_info_get_str
+EXPORT_SYMBOL sound/core/snd 0xadc3eac0	snd_ctl_make_virtual_master
+EXPORT_SYMBOL sound/core/snd 0xae62628e	snd_card_file_add
+EXPORT_SYMBOL sound/core/snd 0xaf8b20a1	snd_ctl_remove_id
+EXPORT_SYMBOL sound/core/snd 0xb2e5ae4a	snd_lookup_minor_data
+EXPORT_SYMBOL sound/core/snd 0xb445caf8	snd_ctl_boolean_stereo_info
+EXPORT_SYMBOL sound/core/snd 0xb5099d0c	_snd_ctl_add_slave
+EXPORT_SYMBOL sound/core/snd 0xb8f5943b	snd_card_disconnect
+EXPORT_SYMBOL sound/core/snd 0xbbcf6142	snd_card_proc_new
+EXPORT_SYMBOL sound/core/snd 0xc45dedc8	snd_jack_report
+EXPORT_SYMBOL sound/core/snd 0xce3ca308	copy_from_user_toio
+EXPORT_SYMBOL sound/core/snd 0xd1157735	release_and_free_resource
+EXPORT_SYMBOL sound/core/snd 0xda3ea972	snd_info_create_card_entry
+EXPORT_SYMBOL sound/core/snd 0xe20c9214	snd_iprintf
+EXPORT_SYMBOL sound/core/snd 0xec6a2dc7	snd_info_free_entry
+EXPORT_SYMBOL sound/core/snd 0xed692320	snd_device_free
+EXPORT_SYMBOL sound/core/snd 0xef5ba109	snd_jack_new
+EXPORT_SYMBOL sound/core/snd 0xf3657d74	snd_info_create_module_entry
+EXPORT_SYMBOL sound/core/snd 0xf8a5a0d6	snd_card_file_remove
+EXPORT_SYMBOL sound/core/snd 0xf9a716e4	snd_card_set_id
+EXPORT_SYMBOL sound/core/snd-hwdep 0xe218cc91	snd_hwdep_new
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x30f5f1e7	snd_dma_reserve_buf
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x3b91f3af	snd_free_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x489cddf3	snd_dma_get_reserved_buf
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x6ff6de86	snd_dma_free_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x8aeef6fe	snd_dma_alloc_pages_fallback
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x8c621967	snd_dma_alloc_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xade88e76	snd_malloc_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0x0010a5ba	snd_pcm_hw_constraint_ratdens
+EXPORT_SYMBOL sound/core/snd-pcm 0x0283dfe3	_snd_pcm_hw_params_any
+EXPORT_SYMBOL sound/core/snd-pcm 0x030612a4	snd_pcm_open_substream
+EXPORT_SYMBOL sound/core/snd-pcm 0x04cda566	snd_interval_refine
+EXPORT_SYMBOL sound/core/snd-pcm 0x07818378	snd_pcm_lib_write
+EXPORT_SYMBOL sound/core/snd-pcm 0x08aa1027	snd_pcm_lib_read
+EXPORT_SYMBOL sound/core/snd-pcm 0x08fea966	snd_pcm_hw_constraint_ratnums
+EXPORT_SYMBOL sound/core/snd-pcm 0x0bf0830c	snd_pcm_suspend
+EXPORT_SYMBOL sound/core/snd-pcm 0x0c261d3e	snd_pcm_lib_preallocate_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0x153cb1aa	snd_pcm_mmap_data
+EXPORT_SYMBOL sound/core/snd-pcm 0x1d027e4b	snd_pcm_format_signed
+EXPORT_SYMBOL sound/core/snd-pcm 0x29ac5bf4	snd_pcm_release_substream
+EXPORT_SYMBOL sound/core/snd-pcm 0x318d1ee0	snd_pcm_hw_constraint_minmax
+EXPORT_SYMBOL sound/core/snd-pcm 0x322bb0fa	snd_pcm_hw_constraint_list
+EXPORT_SYMBOL sound/core/snd-pcm 0x3796bdcc	snd_pcm_format_little_endian
+EXPORT_SYMBOL sound/core/snd-pcm 0x39bf9301	_snd_pcm_hw_param_setempty
+EXPORT_SYMBOL sound/core/snd-pcm 0x40d4024b	snd_pcm_notify
+EXPORT_SYMBOL sound/core/snd-pcm 0x43ad8724	snd_pcm_lib_ioctl
+EXPORT_SYMBOL sound/core/snd-pcm 0x4d9b6d35	snd_pcm_format_size
+EXPORT_SYMBOL sound/core/snd-pcm 0x4f816e9b	snd_pcm_format_big_endian
+EXPORT_SYMBOL sound/core/snd-pcm 0x500784d9	snd_pcm_stop
+EXPORT_SYMBOL sound/core/snd-pcm 0x503e8793	snd_pcm_sgbuf_get_chunk_size
+EXPORT_SYMBOL sound/core/snd-pcm 0x52e3e4a5	snd_pcm_hw_param_value
+EXPORT_SYMBOL sound/core/snd-pcm 0x57e8f014	snd_pcm_hw_rule_add
+EXPORT_SYMBOL sound/core/snd-pcm 0x5adc999f	snd_pcm_lib_preallocate_free_for_all
+EXPORT_SYMBOL sound/core/snd-pcm 0x5e7f4920	snd_pcm_format_set_silence
+EXPORT_SYMBOL sound/core/snd-pcm 0x647178a2	snd_pcm_kernel_ioctl
+EXPORT_SYMBOL sound/core/snd-pcm 0x650f8603	snd_pcm_format_silence_64
+EXPORT_SYMBOL sound/core/snd-pcm 0x68a24153	snd_pcm_format_physical_width
+EXPORT_SYMBOL sound/core/snd-pcm 0x68f8accb	snd_pcm_new_stream
+EXPORT_SYMBOL sound/core/snd-pcm 0x6ef8fcd8	snd_pcm_format_linear
+EXPORT_SYMBOL sound/core/snd-pcm 0x7d600f0d	snd_pcm_set_ops
+EXPORT_SYMBOL sound/core/snd-pcm 0x8072b609	snd_pcm_period_elapsed
+EXPORT_SYMBOL sound/core/snd-pcm 0x82c13d22	snd_pcm_set_sync
+EXPORT_SYMBOL sound/core/snd-pcm 0x88cc66cc	snd_pcm_link_rwlock
+EXPORT_SYMBOL sound/core/snd-pcm 0x8d33a539	snd_pcm_hw_param_first
+EXPORT_SYMBOL sound/core/snd-pcm 0x9474f71c	snd_pcm_hw_constraint_step
+EXPORT_SYMBOL sound/core/snd-pcm 0x9dba88e3	snd_pcm_hw_constraint_msbits
+EXPORT_SYMBOL sound/core/snd-pcm 0xa23482ef	snd_pcm_limit_hw_rates
+EXPORT_SYMBOL sound/core/snd-pcm 0xa61aa028	snd_pcm_format_unsigned
+EXPORT_SYMBOL sound/core/snd-pcm 0xaf6f3efa	snd_pcm_hw_constraint_integer
+EXPORT_SYMBOL sound/core/snd-pcm 0xb0242a8b	snd_pcm_hw_refine
+EXPORT_SYMBOL sound/core/snd-pcm 0xb9638db4	snd_pcm_rate_to_rate_bit
+EXPORT_SYMBOL sound/core/snd-pcm 0xb9913b48	snd_pcm_hw_constraint_pow2
+EXPORT_SYMBOL sound/core/snd-pcm 0xc0bb3acd	snd_pcm_lib_writev
+EXPORT_SYMBOL sound/core/snd-pcm 0xc72604c7	snd_pcm_lib_mmap_iomem
+EXPORT_SYMBOL sound/core/snd-pcm 0xcce8215c	snd_pcm_hw_param_last
+EXPORT_SYMBOL sound/core/snd-pcm 0xd0b9b8b8	snd_interval_list
+EXPORT_SYMBOL sound/core/snd-pcm 0xd151b019	snd_pcm_lib_preallocate_pages_for_all
+EXPORT_SYMBOL sound/core/snd-pcm 0xe1637a62	snd_pcm_lib_free_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0xe1ac569a	snd_pcm_lib_readv
+EXPORT_SYMBOL sound/core/snd-pcm 0xe1e6f998	snd_pcm_sgbuf_ops_page
+EXPORT_SYMBOL sound/core/snd-pcm 0xe56a9336	snd_pcm_format_width
+EXPORT_SYMBOL sound/core/snd-pcm 0xeb64378c	snd_pcm_suspend_all
+EXPORT_SYMBOL sound/core/snd-pcm 0xf3797152	snd_interval_ratnum
+EXPORT_SYMBOL sound/core/snd-pcm 0xf94430cb	snd_pcm_lib_malloc_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0xfa349184	snd_pcm_new
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x02899148	snd_rawmidi_kernel_write
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x0d4346f7	snd_rawmidi_transmit_peek
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x2a87100e	snd_rawmidi_info_select
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x2cd59dcb	snd_rawmidi_input_params
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x5a78ed8e	snd_rawmidi_set_ops
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x5d0a5771	snd_rawmidi_kernel_read
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x6e44329f	snd_rawmidi_drop_output
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x8c3b0d67	snd_rawmidi_transmit
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x8cd94e2d	snd_rawmidi_drain_output
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x9479e274	snd_rawmidi_output_params
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x9fc2a338	snd_rawmidi_drain_input
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xbe0d1799	snd_rawmidi_kernel_open
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xdc978ecd	snd_rawmidi_kernel_release
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xecc6f19b	snd_rawmidi_receive
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xf24dceb4	snd_rawmidi_new
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xf4d4206a	snd_rawmidi_transmit_ack
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xfa2a5d14	snd_rawmidi_transmit_empty
+EXPORT_SYMBOL sound/core/snd-timer 0x01ea15e5	snd_timer_close
+EXPORT_SYMBOL sound/core/snd-timer 0x08d35fb5	snd_timer_global_free
+EXPORT_SYMBOL sound/core/snd-timer 0x112b0f55	snd_timer_open
+EXPORT_SYMBOL sound/core/snd-timer 0x21b08ed8	snd_timer_interrupt
+EXPORT_SYMBOL sound/core/snd-timer 0x2c656105	snd_timer_global_register
+EXPORT_SYMBOL sound/core/snd-timer 0x2d5e1aa4	snd_timer_notify
+EXPORT_SYMBOL sound/core/snd-timer 0x5fdb1b12	snd_timer_resolution
+EXPORT_SYMBOL sound/core/snd-timer 0x61427bbf	snd_timer_stop
+EXPORT_SYMBOL sound/core/snd-timer 0x730ba24f	snd_timer_continue
+EXPORT_SYMBOL sound/core/snd-timer 0x7a92f304	snd_timer_new
+EXPORT_SYMBOL sound/core/snd-timer 0x7ae31de9	snd_timer_pause
+EXPORT_SYMBOL sound/core/snd-timer 0xa58f011f	snd_timer_start
+EXPORT_SYMBOL sound/core/snd-timer 0xc761bda5	snd_timer_global_new
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x4bbb7f27	snd_mpu401_uart_interrupt_tx
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xa330e6cf	snd_mpu401_uart_new
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xc43a3940	snd_mpu401_uart_interrupt
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x05060a19	snd_opl3_regmap
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x1df5b7d3	snd_opl3_new
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x3ff8f7eb	snd_opl3_reset
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x533bbe1e	snd_opl3_init
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x7023dc75	snd_opl3_hwdep_new
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x8c7e389b	snd_opl3_load_patch
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x8d0649b0	snd_opl3_create
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xac92160f	snd_opl3_interrupt
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xe1f8858b	snd_opl3_timer_new
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xfe90daf2	snd_opl3_find_patch
+EXPORT_SYMBOL sound/drivers/opl4/snd-opl4-lib 0x24d01cf2	snd_opl4_write
+EXPORT_SYMBOL sound/drivers/opl4/snd-opl4-lib 0x5aa999c5	snd_opl4_write_memory
+EXPORT_SYMBOL sound/drivers/opl4/snd-opl4-lib 0xb3c8972e	snd_opl4_read_memory
+EXPORT_SYMBOL sound/drivers/opl4/snd-opl4-lib 0xf2d1faa7	snd_opl4_read
+EXPORT_SYMBOL sound/drivers/opl4/snd-opl4-lib 0xf4ce19c8	snd_opl4_create
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x3ace1166	snd_vx_check_reg_bit
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x445ca54a	snd_vx_resume
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x48dd43ef	snd_vx_free_firmware
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x524cbbd0	snd_vx_load_boot_image
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x6485b7bc	snd_vx_dsp_boot
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x6fd51531	snd_vx_create
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x8e7fdea0	snd_vx_setup_firmware
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x99b88ede	snd_vx_irq_handler
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xd7a1aadb	snd_vx_dsp_load
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xf657322f	snd_vx_suspend
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x0b879a35	snd_ak4114_build
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x100bd4b6	snd_ak4114_reinit
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x5fb0b793	snd_ak4114_create
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x7e00f1cb	snd_ak4114_external_rate
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x9ec8bc1f	snd_ak4114_check_rate_and_errors
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xdfe748ac	snd_ak4114_reg_write
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x016b9ce0	snd_ak4117_external_rate
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x057c15f5	snd_ak4117_create
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x1b0af64d	snd_ak4117_build
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x303bf908	snd_ak4117_reinit
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x32919580	snd_ak4117_reg_write
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x3d2adc23	snd_ak4117_check_rate_and_errors
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x2f61cbcd	snd_akm4xxx_reset
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x461256f1	snd_akm4xxx_init
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x961448e1	snd_akm4xxx_build_controls
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xcdb0b420	snd_akm4xxx_write
+EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0xa2c8dbe4	snd_pt2258_reset
+EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0xcdf6dbbd	snd_pt2258_build_controls
+EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0x2d93d8d0	snd_tea575x_exit
+EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0xb4a4ee57	snd_tea575x_init
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x1ee9a202	snd_cs8427_create
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x3d9e3c2f	snd_cs8427_reg_write
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x62f4b6a5	snd_cs8427_iec958_pcm
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0xdb50cb0e	snd_cs8427_iec958_active
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0xeb2a2d97	snd_cs8427_iec958_build
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x5489d9ad	snd_i2c_readbytes
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x615bc2f0	snd_i2c_probeaddr
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x80f39413	snd_i2c_device_create
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x91443e4b	snd_i2c_sendbytes
+EXPORT_SYMBOL sound/i2c/snd-i2c 0xd6531b2f	snd_i2c_device_free
+EXPORT_SYMBOL sound/i2c/snd-i2c 0xdf926f83	snd_i2c_bus_create
+EXPORT_SYMBOL sound/i2c/snd-tea6330t 0x1833c2f5	snd_tea6330t_update_mixer
+EXPORT_SYMBOL sound/i2c/snd-tea6330t 0xc7dc2306	snd_tea6330t_detect
+EXPORT_SYMBOL sound/isa/es1688/snd-es1688-lib 0x3037fc9e	snd_es1688_pcm
+EXPORT_SYMBOL sound/isa/es1688/snd-es1688-lib 0x42876020	snd_es1688_mixer
+EXPORT_SYMBOL sound/isa/es1688/snd-es1688-lib 0x801218ac	snd_es1688_mixer_write
+EXPORT_SYMBOL sound/isa/es1688/snd-es1688-lib 0x8720f9a4	snd_es1688_create
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x1327e464	snd_gf1_i_look16
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x1563d0d9	snd_gf1_write16
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x15b8f56e	snd_gus_dram_read
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x2ba6a00a	snd_gf1_mem_xfree
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x2bc8f16e	snd_gus_use_dec
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x2c8df5c7	snd_gf1_translate_freq
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x2dc19a3d	snd_gf1_ctrl_stop
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x43a6e264	snd_gf1_write8
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x46db8d67	snd_gf1_lvol_to_gvol_raw
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x4e9a6706	snd_gf1_stop_voice
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x4ed89544	snd_gf1_mem_alloc
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x56d546fb	snd_gus_initialize
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x5aaf2afd	snd_gf1_write_addr
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x5dc28225	snd_gf1_i_look8
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x64005b3a	snd_gf1_free_voice
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x659edac9	snd_gf1_poke
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x6a556ce3	snd_gf1_peek
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x7378652c	snd_gf1_new_mixer
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x7727a702	snd_gf1_alloc_voice
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x779229ad	snd_gus_dram_write
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x886e66ef	snd_gf1_mem_free
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x896ce4c5	snd_gus_interrupt
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x8b243559	snd_gus_use_inc
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x92588409	snd_gf1_look8
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xa2b92829	snd_gf1_look16
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xa2bfc045	snd_gf1_pcm_new
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xa3c56a14	snd_gf1_delay
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xc43a5527	snd_gf1_atten_table
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xd35acba7	snd_gf1_mem_lock
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xddfd7b18	snd_gf1_rawmidi_new
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xf75d98e2	snd_gf1_i_write8
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xf87f3839	snd_gus_create
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xfdd9a87a	snd_gf1_dram_addr
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x0e096be3	snd_msnd_init_queue
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x32a99532	snd_msnd_upload_host
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x44e2ed8e	snd_msnd_send_dsp_cmd
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x4a4c83df	snd_msnd_dsp_halt
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x504f7e2d	snd_msnd_DARQ
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x61d21590	snd_msndmix_new
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x7159673e	snd_msndmix_setup
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x75026b24	snd_msndmidi_input_read
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x789395f7	snd_msnd_send_word
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x88f13de9	snd_msnd_DAPQ
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x940154f3	snd_msnd_disable_irq
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0xb6342ac0	snd_msnd_enable_irq
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0xfe62675a	snd_msnd_pcm
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0xfe95cfef	snd_msndmix_force_recsrc
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x07982cf6	snd_sbdsp_get_byte
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x341785a4	snd_sbdsp_reset
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x358171e8	snd_sbmixer_read
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x45bf6c70	snd_sbmixer_resume
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x4ea975ee	snd_sbdsp_command
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x8226c04a	snd_sbmixer_new
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x8fdcba66	snd_sbmixer_add_ctl
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xc010a260	snd_sbdsp_create
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xdb1007b8	snd_sbmixer_suspend
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xe72e25f2	snd_sbmixer_write
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-csp 0x0fdbfcad	snd_sb_csp_new
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0x4967bc39	snd_sb16dsp_configure
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0x82718920	snd_sb16dsp_pcm
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xc57f5b54	snd_sb16dsp_interrupt
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xfa2ebff8	snd_sb16dsp_get_pcm_ops
+EXPORT_SYMBOL sound/isa/sb/snd-sb8-dsp 0x1a4efb2c	snd_sb8dsp_midi_interrupt
+EXPORT_SYMBOL sound/isa/sb/snd-sb8-dsp 0x81c30f4f	snd_sb8dsp_pcm
+EXPORT_SYMBOL sound/isa/sb/snd-sb8-dsp 0xb531c21a	snd_sb8dsp_midi
+EXPORT_SYMBOL sound/isa/sb/snd-sb8-dsp 0xc462f460	snd_sb8dsp_interrupt
+EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x02f44876	snd_emu8000_peek
+EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x119fbbdb	snd_emu8000_dma_chan
+EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x213c1eca	snd_emu8000_update_reverb_mode
+EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x338978a5	snd_emu8000_poke
+EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x39284950	snd_emu8000_load_reverb_fx
+EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x75b22c67	snd_emu8000_poke_dw
+EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x820cdfc1	snd_emu8000_load_chorus_fx
+EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x88e5003a	snd_emu8000_update_equalizer
+EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x95a10656	snd_emu8000_peek_dw
+EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0xb30324e6	snd_emu8000_init_fm
+EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0xf1145c3a	snd_emu8000_update_chorus_mode
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x01a5e5a3	snd_wss_info_single
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x287e4e41	snd_wss_pcm
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x29d60952	snd_wss_put_single
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x30f92913	snd_wss_put_double
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x39377f43	snd_cs4236_ext_in
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x42b3d535	snd_wss_info_double
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x4caf9cd5	snd_wss_get_double
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x5580bc94	snd_wss_get_single
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x5892c9c2	snd_wss_get_pcm_ops
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x6d9d38ef	snd_cs4236_ext_out
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x97ffcf89	snd_wss_mixer
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xa55e6d46	snd_wss_create
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xa56cfb3e	snd_wss_out
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xb576b5fd	snd_wss_mce_up
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xc8c05b84	snd_wss_overrange
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xdb4c18d7	snd_wss_in
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xe5f1e426	snd_wss_chip_id
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xe7b5252e	snd_wss_mce_down
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xee5023e5	snd_wss_interrupt
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xf465a82a	snd_wss_free
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xfc5e17d5	snd_wss_timer
+EXPORT_SYMBOL sound/oss/ad1848 0x1e1fb343	ad1848_init
+EXPORT_SYMBOL sound/oss/ad1848 0x2425193f	attach_ms_sound
+EXPORT_SYMBOL sound/oss/ad1848 0x2b5d9dae	ad1848_detect
+EXPORT_SYMBOL sound/oss/ad1848 0x9bf1cc62	ad1848_unload
+EXPORT_SYMBOL sound/oss/ad1848 0xa3e16c6b	probe_ms_sound
+EXPORT_SYMBOL sound/oss/ad1848 0xb29a9148	unload_ms_sound
+EXPORT_SYMBOL sound/oss/ad1848 0xc04f6f67	ad1848_control
+EXPORT_SYMBOL sound/oss/mpu401 0x3ff7343e	attach_mpu401
+EXPORT_SYMBOL sound/oss/mpu401 0x5febf284	unload_mpu401
+EXPORT_SYMBOL sound/oss/mpu401 0x61641749	probe_mpu401
+EXPORT_SYMBOL sound/oss/msnd 0x1186f48f	msnd_fifo_read
+EXPORT_SYMBOL sound/oss/msnd 0x234f64e0	msnd_register
+EXPORT_SYMBOL sound/oss/msnd 0x340a3ddf	msnd_init_queue
+EXPORT_SYMBOL sound/oss/msnd 0x54230dc1	msnd_fifo_write
+EXPORT_SYMBOL sound/oss/msnd 0x5fb94ecb	msnd_unregister
+EXPORT_SYMBOL sound/oss/msnd 0x6587640b	msnd_disable_irq
+EXPORT_SYMBOL sound/oss/msnd 0x6601493b	msnd_fifo_make_empty
+EXPORT_SYMBOL sound/oss/msnd 0x8e3c524b	msnd_send_dsp_cmd
+EXPORT_SYMBOL sound/oss/msnd 0x9274d677	msnd_fifo_free
+EXPORT_SYMBOL sound/oss/msnd 0x95d37486	msnd_upload_host
+EXPORT_SYMBOL sound/oss/msnd 0xa1bcc420	msnd_send_word
+EXPORT_SYMBOL sound/oss/msnd 0xade99e25	msnd_fifo_alloc
+EXPORT_SYMBOL sound/oss/msnd 0xb3520772	msnd_fifo_init
+EXPORT_SYMBOL sound/oss/msnd 0xdf0f59eb	msnd_fifo_write_io
+EXPORT_SYMBOL sound/oss/msnd 0xefdd1843	msnd_enable_irq
+EXPORT_SYMBOL sound/oss/msnd 0xf4c4f662	msnd_fifo_read_io
+EXPORT_SYMBOL sound/oss/sb_lib 0x42424109	sb_be_quiet
+EXPORT_SYMBOL sound/oss/sb_lib 0x450f9aea	smw_free
+EXPORT_SYMBOL sound/oss/sb_lib 0x68551b87	sb_dsp_init
+EXPORT_SYMBOL sound/oss/sb_lib 0x74afd69c	unload_sbmpu
+EXPORT_SYMBOL sound/oss/sb_lib 0xa38dd522	probe_sbmpu
+EXPORT_SYMBOL sound/oss/sb_lib 0xc4884969	sb_dsp_unload
+EXPORT_SYMBOL sound/oss/sb_lib 0xd8a2731c	sb_dsp_detect
+EXPORT_SYMBOL sound/oss/sound 0x04c87ec8	compute_finetune
+EXPORT_SYMBOL sound/oss/sound 0x06339815	sound_unload_synthdev
+EXPORT_SYMBOL sound/oss/sound 0x0f280035	conf_printf
+EXPORT_SYMBOL sound/oss/sound 0x113f4942	sound_timer_devs
+EXPORT_SYMBOL sound/oss/sound 0x17ba231d	seq_input_event
+EXPORT_SYMBOL sound/oss/sound 0x1b3df3cf	sound_alloc_mixerdev
+EXPORT_SYMBOL sound/oss/sound 0x1f395686	MIDIbuf_avail
+EXPORT_SYMBOL sound/oss/sound 0x2161d5e8	sound_timer_init
+EXPORT_SYMBOL sound/oss/sound 0x2aa31695	midi_synth_kill_note
+EXPORT_SYMBOL sound/oss/sound 0x394cb088	sound_free_dma
+EXPORT_SYMBOL sound/oss/sound 0x3dc12116	sound_install_audiodrv
+EXPORT_SYMBOL sound/oss/sound 0x418f5fbe	sound_close_dma
+EXPORT_SYMBOL sound/oss/sound 0x4cd01bdd	num_audiodevs
+EXPORT_SYMBOL sound/oss/sound 0x4ff47e9d	midi_synth_setup_voice
+EXPORT_SYMBOL sound/oss/sound 0x51e354b2	sound_alloc_timerdev
+EXPORT_SYMBOL sound/oss/sound 0x5348c00d	sound_install_mixer
+EXPORT_SYMBOL sound/oss/sound 0x56504ca2	midi_synth_reset
+EXPORT_SYMBOL sound/oss/sound 0x5d986fc9	note_to_freq
+EXPORT_SYMBOL sound/oss/sound 0x7679ee76	seq_copy_to_input
+EXPORT_SYMBOL sound/oss/sound 0x78b34f10	mixer_devs
+EXPORT_SYMBOL sound/oss/sound 0x7af1d8a9	midi_devs
+EXPORT_SYMBOL sound/oss/sound 0x7bdf0907	conf_printf2
+EXPORT_SYMBOL sound/oss/sound 0x7f687527	synth_devs
+EXPORT_SYMBOL sound/oss/sound 0x892093e0	midi_synth_controller
+EXPORT_SYMBOL sound/oss/sound 0x90bd9714	sequencer_timer
+EXPORT_SYMBOL sound/oss/sound 0x987bcf12	DMAbuf_outputintr
+EXPORT_SYMBOL sound/oss/sound 0x9a95733f	sound_alloc_dma
+EXPORT_SYMBOL sound/oss/sound 0x9bdaf24d	midi_synth_start_note
+EXPORT_SYMBOL sound/oss/sound 0x9d845b18	num_mixers
+EXPORT_SYMBOL sound/oss/sound 0xa007c2c8	audio_devs
+EXPORT_SYMBOL sound/oss/sound 0xa1d5f04f	load_mixer_volumes
+EXPORT_SYMBOL sound/oss/sound 0xa1eae7cf	num_midis
+EXPORT_SYMBOL sound/oss/sound 0xa41ead5f	sound_unload_timerdev
+EXPORT_SYMBOL sound/oss/sound 0xa51c913b	sound_unload_mixerdev
+EXPORT_SYMBOL sound/oss/sound 0xa6bb414c	sound_unload_mididev
+EXPORT_SYMBOL sound/oss/sound 0xa948751e	sound_unload_audiodev
+EXPORT_SYMBOL sound/oss/sound 0xad45df73	midi_synth_close
+EXPORT_SYMBOL sound/oss/sound 0xaef743b2	midi_synth_ioctl
+EXPORT_SYMBOL sound/oss/sound 0xb14b22cd	midi_synth_hw_control
+EXPORT_SYMBOL sound/oss/sound 0xb51587f6	do_midi_msg
+EXPORT_SYMBOL sound/oss/sound 0xba413f87	sound_alloc_mididev
+EXPORT_SYMBOL sound/oss/sound 0xba7dd041	midi_synth_bender
+EXPORT_SYMBOL sound/oss/sound 0xc748d109	sound_alloc_synthdev
+EXPORT_SYMBOL sound/oss/sound 0xcab4d5bf	midi_synth_load_patch
+EXPORT_SYMBOL sound/oss/sound 0xcc4b8797	sound_open_dma
+EXPORT_SYMBOL sound/oss/sound 0xd85be938	midi_synth_set_instr
+EXPORT_SYMBOL sound/oss/sound 0xdb400afa	midi_synth_panning
+EXPORT_SYMBOL sound/oss/sound 0xe056b71c	DMAbuf_start_dma
+EXPORT_SYMBOL sound/oss/sound 0xe2675a79	sound_timer_interrupt
+EXPORT_SYMBOL sound/oss/sound 0xeb315d99	DMAbuf_inputintr
+EXPORT_SYMBOL sound/oss/sound 0xf1ea8a20	midi_synth_aftertouch
+EXPORT_SYMBOL sound/oss/sound 0xf6b3a2fb	midi_synth_open
+EXPORT_SYMBOL sound/oss/sound 0xf78f6363	sequencer_init
+EXPORT_SYMBOL sound/oss/sound 0xfa6871be	sound_timer_syncinterval
+EXPORT_SYMBOL sound/oss/sound 0xfddcbfb3	midi_synth_send_sysex
+EXPORT_SYMBOL sound/oss/uart401 0x049cd8b7	uart401intr
+EXPORT_SYMBOL sound/oss/uart401 0x3e6c7720	probe_uart401
+EXPORT_SYMBOL sound/oss/uart401 0xecfdd9c9	unload_uart401
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x080e3555	snd_ac97_pcm_open
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x0960b369	snd_ac97_write_cache
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x140b4542	snd_ac97_pcm_close
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x169e759d	snd_ac97_resume
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x193cc9d8	snd_ac97_pcm_double_rate_rules
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x373d7068	snd_ac97_get_short_name
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x425198ba	snd_ac97_update_bits
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x4ee833b3	snd_ac97_update
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x7d6099a4	snd_ac97_mixer
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x9195bb3e	snd_ac97_read
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x98b02e95	snd_ac97_bus
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xa3dedf23	snd_ac97_tune_hardware
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xd15b81d3	snd_ac97_pcm_assign
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xe9b51170	snd_ac97_update_power
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xec679333	snd_ac97_write
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xf392ec94	snd_ac97_set_rate
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xfda7cd51	snd_ac97_suspend
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x18eeb6f4	snd_emu10k1_synth_copy_from_user
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x442d3114	snd_emu10k1_memblk_map
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x443768d2	snd_emu10k1_synth_free
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x66486f01	snd_emu10k1_voice_alloc
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x7cc0bddd	snd_emu10k1_ptr_write
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x87b015e0	snd_emu10k1_ptr_read
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x91b2f9db	snd_emu10k1_voice_free
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x9fc50937	snd_emu10k1_synth_alloc
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xfb908388	snd_emu10k1_synth_bzero
+EXPORT_SYMBOL sound/pci/hda/snd-hda-codec 0x38604289	snd_hda_parse_generic_codec
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x804e6df7	snd_ice1712_akm4xxx_free
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0xea3caab4	snd_ice1712_akm4xxx_build_controls
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0xf7e3526d	snd_ice1712_akm4xxx_init
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x176bf40d	oxygen_write_ac97
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x3934806f	oxygen_write16_masked
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x487437f6	oxygen_write8
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x4b4ce751	oxygen_write_ac97_masked
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x569b67fd	oxygen_read8
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x58b4129e	oxygen_write8_masked
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x68e89457	oxygen_write_spi
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x6ef181dd	oxygen_read16
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x7856f51f	oxygen_pci_resume
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x8ad1b988	oxygen_pci_suspend
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x905d0a0e	oxygen_read32
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x933ba07e	oxygen_write32_masked
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x9ce30972	oxygen_read_ac97
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x9fef7175	oxygen_pci_probe
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xa20870bd	oxygen_write_i2c
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xb456c6b5	oxygen_write_uart
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xd49b9328	oxygen_reset_uart
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xecb5c1ab	oxygen_write16
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xefde63fc	oxygen_write32
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xfd722e9f	oxygen_pci_remove
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x4f8fe06d	snd_trident_start_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x6863855c	snd_trident_stop_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0xa59bd2d9	snd_trident_free_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0xd2b5a75d	snd_trident_write_voice_regs
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0xdea6d734	snd_trident_alloc_voice
+EXPORT_SYMBOL sound/soc/codecs/snd-soc-uda134x 0x2a7aaa10	uda134x_dai
+EXPORT_SYMBOL sound/sound_firmware 0x39e3dd23	mod_firmware_load
+EXPORT_SYMBOL sound/soundcore 0x060651a1	register_sound_mixer
+EXPORT_SYMBOL sound/soundcore 0x4194c2d5	register_sound_midi
+EXPORT_SYMBOL sound/soundcore 0x6815485e	register_sound_special
+EXPORT_SYMBOL sound/soundcore 0x7afc9d8a	unregister_sound_mixer
+EXPORT_SYMBOL sound/soundcore 0x99c95fa5	unregister_sound_special
+EXPORT_SYMBOL sound/soundcore 0xc46a73c8	register_sound_dsp
+EXPORT_SYMBOL sound/soundcore 0xc801dad5	register_sound_special_device
+EXPORT_SYMBOL sound/soundcore 0xcd083b10	unregister_sound_dsp
+EXPORT_SYMBOL sound/soundcore 0xe7d21f44	sound_class
+EXPORT_SYMBOL sound/soundcore 0xfdab6de3	unregister_sound_midi
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x4ad530db	snd_emux_lock_voice
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x56cb07a1	snd_emux_free
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x655cb202	snd_sf_linear_to_log
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x9424d3ba	snd_emux_register
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xe9ac3668	snd_emux_terminate_all
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xf21bd168	snd_emux_new
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xfb428266	snd_emux_unlock_voice
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x070c29c5	snd_util_mem_alloc
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x3d7e0426	__snd_util_mem_alloc
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x4d6e68b8	snd_util_mem_free
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x5401d8ba	snd_util_memhdr_free
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x9df199f3	__snd_util_mem_free
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x9f12f0a1	__snd_util_memblk_new
+EXPORT_SYMBOL sound/synth/snd-util-mem 0xf93f8a10	snd_util_memhdr_new
+EXPORT_SYMBOL sound/synth/snd-util-mem 0xfd4102f4	snd_util_mem_avail
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0x16756dc0	snd_usbmidi_input_start
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0x63343b1d	snd_usbmidi_input_stop
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0xcd746c1b	snd_usb_create_midi_interface
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0xd9d2bb03	snd_usbmidi_disconnect
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x3aa45027	dm_mem_cache_client_destroy
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x903d75be	dm_mem_cache_client_create
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x920a7a41	dm_message_parse
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0xafd511e3	dm_mem_cache_grow
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0xb2c35eab	dm_mem_cache_free
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0xcc2450a4	dm_mem_cache_alloc
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0xe552788a	dm_mem_cache_shrink
+EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x04dca738	lirc_unregister_driver
+EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x2157d1d2	lirc_get_pdata
+EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0xe58c71d4	lirc_register_driver
+EXPORT_SYMBOL vmlinux 0x00000000	per_cpu__softirq_work_list
+EXPORT_SYMBOL vmlinux 0x00546468	put_io_context
+EXPORT_SYMBOL vmlinux 0x00783069	put_disk
+EXPORT_SYMBOL vmlinux 0x007d1346	d_rehash
+EXPORT_SYMBOL vmlinux 0x00801678	flush_scheduled_work
+EXPORT_SYMBOL vmlinux 0x009d258f	_write_lock
+EXPORT_SYMBOL vmlinux 0x00b0b7a1	block_write_full_page_endio
+EXPORT_SYMBOL vmlinux 0x00c4dc87	timecounter_init
+EXPORT_SYMBOL vmlinux 0x00d48e92	xfrm4_rcv_encap
+EXPORT_SYMBOL vmlinux 0x00e8097b	csum_partial_copy_fromiovecend
+EXPORT_SYMBOL vmlinux 0x011230a3	slow_work_register_user
+EXPORT_SYMBOL vmlinux 0x01139ffc	max_mapnr
+EXPORT_SYMBOL vmlinux 0x0125623e	slow_work_enqueue
+EXPORT_SYMBOL vmlinux 0x01471ea2	kset_unregister
+EXPORT_SYMBOL vmlinux 0x015c5885	tcf_em_register
+EXPORT_SYMBOL vmlinux 0x0186d073	percpu_counter_set
+EXPORT_SYMBOL vmlinux 0x01902adf	netpoll_trap
+EXPORT_SYMBOL vmlinux 0x0195b926	free_netdev
+EXPORT_SYMBOL vmlinux 0x0199766e	input_register_device
+EXPORT_SYMBOL vmlinux 0x01a4aab6	set_irq_chip_data
+EXPORT_SYMBOL vmlinux 0x01a77e20	pci_target_state
+EXPORT_SYMBOL vmlinux 0x01abee98	phy_start
+EXPORT_SYMBOL vmlinux 0x01c19697	mca_device_status
+EXPORT_SYMBOL vmlinux 0x01d0b30a	scsi_setup_blk_pc_cmnd
+EXPORT_SYMBOL vmlinux 0x01d19038	acpi_enable_subsystem
+EXPORT_SYMBOL vmlinux 0x020e209e	grab_cache_page_write_begin
+EXPORT_SYMBOL vmlinux 0x02124474	ip_send_check
+EXPORT_SYMBOL vmlinux 0x022278e0	cdrom_media_changed
+EXPORT_SYMBOL vmlinux 0x022f6275	input_flush_device
+EXPORT_SYMBOL vmlinux 0x0237b57a	arch_unregister_cpu
+EXPORT_SYMBOL vmlinux 0x0256389f	bit_waitqueue
+EXPORT_SYMBOL vmlinux 0x02649054	security_sock_rcv_skb
+EXPORT_SYMBOL vmlinux 0x026c7eff	sk_stream_wait_connect
+EXPORT_SYMBOL vmlinux 0x026efa1a	__tcp_get_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x02703e50	neigh_destroy
+EXPORT_SYMBOL vmlinux 0x02849d54	dev_get_flags
+EXPORT_SYMBOL vmlinux 0x029444f0	native_read_tsc
+EXPORT_SYMBOL vmlinux 0x029d518f	have_submounts
+EXPORT_SYMBOL vmlinux 0x02a6ce5a	crc16_table
+EXPORT_SYMBOL vmlinux 0x02aff2f4	acpi_install_gpe_handler
+EXPORT_SYMBOL vmlinux 0x02d81845	audit_log_task_context
+EXPORT_SYMBOL vmlinux 0x02db3a13	skb_push
+EXPORT_SYMBOL vmlinux 0x02e2e4d7	rfkill_destroy
+EXPORT_SYMBOL vmlinux 0x02ee26c1	free_pages_exact
+EXPORT_SYMBOL vmlinux 0x03185f98	mmc_request_done
+EXPORT_SYMBOL vmlinux 0x0334da4e	scsi_command_size_tbl
+EXPORT_SYMBOL vmlinux 0x03378912	cdev_del
+EXPORT_SYMBOL vmlinux 0x0340d0e1	acpi_pci_osc_control_set
+EXPORT_SYMBOL vmlinux 0x03437b7a	da903x_query_status
+EXPORT_SYMBOL vmlinux 0x036057fe	bio_alloc
+EXPORT_SYMBOL vmlinux 0x037a0cba	kfree
+EXPORT_SYMBOL vmlinux 0x037b7984	jbd2_journal_dirty_metadata
+EXPORT_SYMBOL vmlinux 0x0381a2ff	invalidate_mapping_pages
+EXPORT_SYMBOL vmlinux 0x0389ff16	neigh_lookup_nodev
+EXPORT_SYMBOL vmlinux 0x03b06a5c	dm_unregister_target
+EXPORT_SYMBOL vmlinux 0x03c06156	bitmap_fold
+EXPORT_SYMBOL vmlinux 0x03fd2571	vm_unmap_ram
+EXPORT_SYMBOL vmlinux 0x0415076e	register_tcf_proto_ops
+EXPORT_SYMBOL vmlinux 0x0422fe4a	inet_csk_timer_bug_msg
+EXPORT_SYMBOL vmlinux 0x043cc398	__scm_destroy
+EXPORT_SYMBOL vmlinux 0x0444a0e4	default_unplug_io_fn
+EXPORT_SYMBOL vmlinux 0x04459d8b	__mmc_claim_host
+EXPORT_SYMBOL vmlinux 0x04826547	key_put
+EXPORT_SYMBOL vmlinux 0x04854eee	dev_get_drvdata
+EXPORT_SYMBOL vmlinux 0x0487f831	fb_find_best_display
+EXPORT_SYMBOL vmlinux 0x049c8448	dev_alloc_skb
+EXPORT_SYMBOL vmlinux 0x04a272bf	phy_detach
+EXPORT_SYMBOL vmlinux 0x04a813a3	may_umount_tree
+EXPORT_SYMBOL vmlinux 0x04d8c750	release_perfctr_nmi
+EXPORT_SYMBOL vmlinux 0x04e6fbb3	dm_io_client_destroy
+EXPORT_SYMBOL vmlinux 0x04f73ff4	scsi_register_driver
+EXPORT_SYMBOL vmlinux 0x05240ee7	percpu_counter_batch
+EXPORT_SYMBOL vmlinux 0x05279af1	mpage_writepage
+EXPORT_SYMBOL vmlinux 0x0546b152	mutex_trylock
+EXPORT_SYMBOL vmlinux 0x057ce975	hex_dump_to_buffer
+EXPORT_SYMBOL vmlinux 0x05c809a3	flush_signals
+EXPORT_SYMBOL vmlinux 0x05ce2097	ps2_end_command
+EXPORT_SYMBOL vmlinux 0x0604acb3	journal_force_commit
+EXPORT_SYMBOL vmlinux 0x061651be	strcat
+EXPORT_SYMBOL vmlinux 0x061befe6	i2c_add_adapter
+EXPORT_SYMBOL vmlinux 0x06202d7a	scsi_device_set_state
+EXPORT_SYMBOL vmlinux 0x0626689f	blk_rq_count_integrity_sg
+EXPORT_SYMBOL vmlinux 0x064bdf56	pci_setup_cardbus
+EXPORT_SYMBOL vmlinux 0x065254d0	mnt_pin
+EXPORT_SYMBOL vmlinux 0x067932a6	__napi_complete
+EXPORT_SYMBOL vmlinux 0x067d8d35	security_release_secctx
+EXPORT_SYMBOL vmlinux 0x0684b380	dev_get_stats
+EXPORT_SYMBOL vmlinux 0x06ac8ac8	acpi_unlock_battery_dir
+EXPORT_SYMBOL vmlinux 0x06bd7dc5	dcache_dir_close
+EXPORT_SYMBOL vmlinux 0x06d728b1	tcp_parse_md5sig_option
+EXPORT_SYMBOL vmlinux 0x06efd628	tty_shutdown
+EXPORT_SYMBOL vmlinux 0x06fe3b14	default_grn
+EXPORT_SYMBOL vmlinux 0x06ffdb1c	sock_register
+EXPORT_SYMBOL vmlinux 0x0727c4f3	iowrite8
+EXPORT_SYMBOL vmlinux 0x072bcf8d	blk_init_queue
+EXPORT_SYMBOL vmlinux 0x073dfa12	generate_resume_trace
+EXPORT_SYMBOL vmlinux 0x07422b8a	unregister_console
+EXPORT_SYMBOL vmlinux 0x07608604	acpi_get_vendor_resource
+EXPORT_SYMBOL vmlinux 0x079602d5	neigh_sysctl_register
+EXPORT_SYMBOL vmlinux 0x0799aca4	local_bh_enable
+EXPORT_SYMBOL vmlinux 0x0799c50a	param_set_ulong
+EXPORT_SYMBOL vmlinux 0x079d3739	cfb_copyarea
+EXPORT_SYMBOL vmlinux 0x079fe107	igrab
+EXPORT_SYMBOL vmlinux 0x07a890c8	fb_alloc_cmap
+EXPORT_SYMBOL vmlinux 0x07cc4a5d	printk_timed_ratelimit
+EXPORT_SYMBOL vmlinux 0x07d50a24	csum_partial
+EXPORT_SYMBOL vmlinux 0x07d9b783	scsi_nl_send_vendor_msg
+EXPORT_SYMBOL vmlinux 0x0804e7a5	eth_header_cache
+EXPORT_SYMBOL vmlinux 0x082c3213	pci_root_buses
+EXPORT_SYMBOL vmlinux 0x082db74f	pci_fixup_device
+EXPORT_SYMBOL vmlinux 0x083e0623	pcim_iounmap
+EXPORT_SYMBOL vmlinux 0x0875d598	jbd2_journal_forget
+EXPORT_SYMBOL vmlinux 0x088ea277	skb_gro_reset_offset
+EXPORT_SYMBOL vmlinux 0x08981dba	blk_queue_max_discard_sectors
+EXPORT_SYMBOL vmlinux 0x08ccdd4b	scsi_host_put
+EXPORT_SYMBOL vmlinux 0x08d66a3a	warn_slowpath_fmt
+EXPORT_SYMBOL vmlinux 0x08db9d6f	bio_integrity_endio
+EXPORT_SYMBOL vmlinux 0x08f278dc	generic_unplug_device
+EXPORT_SYMBOL vmlinux 0x08facac8	input_get_keycode
+EXPORT_SYMBOL vmlinux 0x09144253	sysctl_string
+EXPORT_SYMBOL vmlinux 0x0933aae1	efi_enabled
+EXPORT_SYMBOL vmlinux 0x0948cde9	num_physpages
+EXPORT_SYMBOL vmlinux 0x0972aa39	pci_lost_interrupt
+EXPORT_SYMBOL vmlinux 0x098b71c6	fb_dealloc_cmap
+EXPORT_SYMBOL vmlinux 0x09c55cec	schedule_timeout_interruptible
+EXPORT_SYMBOL vmlinux 0x09cc119f	sock_wake_async
+EXPORT_SYMBOL vmlinux 0x09d44df9	in_lock_functions
+EXPORT_SYMBOL vmlinux 0x0a1e87f9	atomic64_add_negative
+EXPORT_SYMBOL vmlinux 0x0a2487e0	unblock_all_signals
+EXPORT_SYMBOL vmlinux 0x0a3131f6	strnchr
+EXPORT_SYMBOL vmlinux 0x0a4747ff	allocate_resource
+EXPORT_SYMBOL vmlinux 0x0a71fc07	kernel_accept
+EXPORT_SYMBOL vmlinux 0x0ab069ca	jbd2_journal_invalidatepage
+EXPORT_SYMBOL vmlinux 0x0ab19848	tcf_action_exec
+EXPORT_SYMBOL vmlinux 0x0ab2eb5d	xfrm_state_lookup_byaddr
+EXPORT_SYMBOL vmlinux 0x0acb1a3c	__bitmap_shift_right
+EXPORT_SYMBOL vmlinux 0x0acf7679	dma_issue_pending_all
+EXPORT_SYMBOL vmlinux 0x0af41017	jbd2_journal_blocks_per_page
+EXPORT_SYMBOL vmlinux 0x0b0535c4	skb_queue_head
+EXPORT_SYMBOL vmlinux 0x0b0c2dd5	pnp_disable_dev
+EXPORT_SYMBOL vmlinux 0x0b0d888b	icmpv6_err_convert
+EXPORT_SYMBOL vmlinux 0x0b1beb31	vmalloc_32_user
+EXPORT_SYMBOL vmlinux 0x0b55cb5b	journal_clear_err
+EXPORT_SYMBOL vmlinux 0x0b742fd7	simple_strtol
+EXPORT_SYMBOL vmlinux 0x0b946ed5	pcim_iounmap_regions
+EXPORT_SYMBOL vmlinux 0x0ba145d7	unlock_page
+EXPORT_SYMBOL vmlinux 0x0bb3b4ce	try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0x0bcf4c17	tcf_em_unregister
+EXPORT_SYMBOL vmlinux 0x0bd0df51	d_validate
+EXPORT_SYMBOL vmlinux 0x0bd8a49a	phy_sanitize_settings
+EXPORT_SYMBOL vmlinux 0x0be6c5d7	tcp_ioctl
+EXPORT_SYMBOL vmlinux 0x0c04017b	elv_rq_merge_ok
+EXPORT_SYMBOL vmlinux 0x0c10b50b	dev_unicast_add
+EXPORT_SYMBOL vmlinux 0x0c120b64	filp_open
+EXPORT_SYMBOL vmlinux 0x0c1bc1f3	proc_create_data
+EXPORT_SYMBOL vmlinux 0x0c28aec7	netdev_boot_setup_check
+EXPORT_SYMBOL vmlinux 0x0c35233b	hippi_change_mtu
+EXPORT_SYMBOL vmlinux 0x0c3a6694	mntput_no_expire
+EXPORT_SYMBOL vmlinux 0x0c65e73c	scsi_normalize_sense
+EXPORT_SYMBOL vmlinux 0x0c6bcc03	kmem_cache_destroy
+EXPORT_SYMBOL vmlinux 0x0c6f6790	ipv6_chk_prefix
+EXPORT_SYMBOL vmlinux 0x0c8c9e99	scsi_show_extd_sense
+EXPORT_SYMBOL vmlinux 0x0c9482ee	dmam_alloc_noncoherent
+EXPORT_SYMBOL vmlinux 0x0c9bc059	__xfrm_policy_check
+EXPORT_SYMBOL vmlinux 0x0cae232b	utf16s_to_utf8s
+EXPORT_SYMBOL vmlinux 0x0cae77b9	d_genocide
+EXPORT_SYMBOL vmlinux 0x0cbebb5e	pnp_stop_dev
+EXPORT_SYMBOL vmlinux 0x0d26a76d	_write_lock_irq
+EXPORT_SYMBOL vmlinux 0x0d300ab7	register_sysctl_table
+EXPORT_SYMBOL vmlinux 0x0d30240a	key_unlink
+EXPORT_SYMBOL vmlinux 0x0d34cbf4	unregister_quota_format
+EXPORT_SYMBOL vmlinux 0x0d3dda14	acpi_get_type
+EXPORT_SYMBOL vmlinux 0x0d414b7e	generic_show_options
+EXPORT_SYMBOL vmlinux 0x0d4b0dfd	dm_io
+EXPORT_SYMBOL vmlinux 0x0d4b77b7	gen_pool_add
+EXPORT_SYMBOL vmlinux 0x0d4c2a08	elv_rb_latter_request
+EXPORT_SYMBOL vmlinux 0x0d542439	__ipv6_addr_type
+EXPORT_SYMBOL vmlinux 0x0d6c963c	copy_from_user
+EXPORT_SYMBOL vmlinux 0x0da10ec3	security_sock_graft
+EXPORT_SYMBOL vmlinux 0x0dc8a03c	bio_integrity_prep
+EXPORT_SYMBOL vmlinux 0x0de69a9c	per_cpu__softnet_data
+EXPORT_SYMBOL vmlinux 0x0e23d66c	locks_mandatory_area
+EXPORT_SYMBOL vmlinux 0x0e2cde27	proc_dostring
+EXPORT_SYMBOL vmlinux 0x0e52592a	panic
+EXPORT_SYMBOL vmlinux 0x0e693ed9	k8_northbridges
+EXPORT_SYMBOL vmlinux 0x0e82ae50	bitmap_startwrite
+EXPORT_SYMBOL vmlinux 0x0e83fea1	del_timer_sync
+EXPORT_SYMBOL vmlinux 0x0e97ef69	vm_insert_pfn
+EXPORT_SYMBOL vmlinux 0x0ebc9885	proc_doulongvec_ms_jiffies_minmax
+EXPORT_SYMBOL vmlinux 0x0ed544b2	qdisc_class_hash_grow
+EXPORT_SYMBOL vmlinux 0x0ef96124	starget_for_each_device
+EXPORT_SYMBOL vmlinux 0x0f0eb5b8	brioctl_set
+EXPORT_SYMBOL vmlinux 0x0f1e2044	inet_sock_destruct
+EXPORT_SYMBOL vmlinux 0x0f1ef871	posix_acl_alloc
+EXPORT_SYMBOL vmlinux 0x0f206f84	pci_find_bus
+EXPORT_SYMBOL vmlinux 0x0f312cc5	vfs_quota_disable
+EXPORT_SYMBOL vmlinux 0x0f3dbbdc	scsi_host_get
+EXPORT_SYMBOL vmlinux 0x0f70cea5	kernel_getsockopt
+EXPORT_SYMBOL vmlinux 0x0f78f06a	qdisc_create_dflt
+EXPORT_SYMBOL vmlinux 0x0f7a9e7d	xfrm_policy_delete
+EXPORT_SYMBOL vmlinux 0x0f92c4c2	tty_port_hangup
+EXPORT_SYMBOL vmlinux 0x0fa53898	dma_pool_free
+EXPORT_SYMBOL vmlinux 0x0fd00a68	acpi_clear_event
+EXPORT_SYMBOL vmlinux 0x0fed8645	cad_pid
+EXPORT_SYMBOL vmlinux 0x0ff2b602	slhc_compress
+EXPORT_SYMBOL vmlinux 0x102eb5b2	mmc_host_enable
+EXPORT_SYMBOL vmlinux 0x105e2727	__tracepoint_kmalloc
+EXPORT_SYMBOL vmlinux 0x107d8229	rfkill_resume_polling
+EXPORT_SYMBOL vmlinux 0x108c3377	xfrm_unregister_mode
+EXPORT_SYMBOL vmlinux 0x108e8985	param_get_uint
+EXPORT_SYMBOL vmlinux 0x1090e028	ps2_cmd_aborted
+EXPORT_SYMBOL vmlinux 0x10a4535b	pskb_expand_head
+EXPORT_SYMBOL vmlinux 0x10a54c54	cdev_add
+EXPORT_SYMBOL vmlinux 0x10ee20bb	default_blu
+EXPORT_SYMBOL vmlinux 0x10ff42a4	devm_ioport_unmap
+EXPORT_SYMBOL vmlinux 0x11131f23	acpi_bus_get_status
+EXPORT_SYMBOL vmlinux 0x11267875	scsi_extd_sense_format
+EXPORT_SYMBOL vmlinux 0x112c6756	bitmap_unplug
+EXPORT_SYMBOL vmlinux 0x1154095c	__skb_checksum_complete
+EXPORT_SYMBOL vmlinux 0x1161e479	dentry_open
+EXPORT_SYMBOL vmlinux 0x1163f0a7	blk_max_low_pfn
+EXPORT_SYMBOL vmlinux 0x117093be	qdisc_class_hash_init
+EXPORT_SYMBOL vmlinux 0x117b6cab	__netdev_alloc_skb
+EXPORT_SYMBOL vmlinux 0x118e4903	dquot_transfer
+EXPORT_SYMBOL vmlinux 0x118f01ea	putname
+EXPORT_SYMBOL vmlinux 0x1190f817	__brelse
+EXPORT_SYMBOL vmlinux 0x11a18b14	__wake_up_bit
+EXPORT_SYMBOL vmlinux 0x11cca353	pci_get_subsys
+EXPORT_SYMBOL vmlinux 0x11e0be13	pagevec_lookup
+EXPORT_SYMBOL vmlinux 0x11f19e71	phy_device_free
+EXPORT_SYMBOL vmlinux 0x11f93848	jbd2_journal_get_write_access
+EXPORT_SYMBOL vmlinux 0x11fdf750	drop_super
+EXPORT_SYMBOL vmlinux 0x120507ac	idr_get_new
+EXPORT_SYMBOL vmlinux 0x120a7aed	check_disk_change
+EXPORT_SYMBOL vmlinux 0x12167c2c	mb_cache_entry_get
+EXPORT_SYMBOL vmlinux 0x1216e96d	bio_add_pc_page
+EXPORT_SYMBOL vmlinux 0x12330082	cont_write_begin
+EXPORT_SYMBOL vmlinux 0x124a3ce2	skb_tx_hash
+EXPORT_SYMBOL vmlinux 0x12750c85	block_write_end
+EXPORT_SYMBOL vmlinux 0x1278fbb3	phy_register_fixup_for_uid
+EXPORT_SYMBOL vmlinux 0x12b045eb	journal_set_features
+EXPORT_SYMBOL vmlinux 0x12c548dd	journal_unlock_updates
+EXPORT_SYMBOL vmlinux 0x12da5bb2	__kmalloc
+EXPORT_SYMBOL vmlinux 0x12e6a2e7	jbd2_journal_file_inode
+EXPORT_SYMBOL vmlinux 0x12f10736	udplite_table
+EXPORT_SYMBOL vmlinux 0x13145333	alloc_tty_driver
+EXPORT_SYMBOL vmlinux 0x132091c9	should_remove_suid
+EXPORT_SYMBOL vmlinux 0x136a7a94	sock_no_bind
+EXPORT_SYMBOL vmlinux 0x1378e714	acpi_video_display_switch_support
+EXPORT_SYMBOL vmlinux 0x139da4f3	tcp_v4_remember_stamp
+EXPORT_SYMBOL vmlinux 0x13dddebf	mddev_congested
+EXPORT_SYMBOL vmlinux 0x13f42152	system_entering_hibernation
+EXPORT_SYMBOL vmlinux 0x140c4436	vfs_write
+EXPORT_SYMBOL vmlinux 0x1430e6e0	unregister_acpi_notifier
+EXPORT_SYMBOL vmlinux 0x143d8f82	sock_queue_rcv_skb
+EXPORT_SYMBOL vmlinux 0x144d6cbc	xfrm6_rcv_spi
+EXPORT_SYMBOL vmlinux 0x145c6eed	kthread_bind
+EXPORT_SYMBOL vmlinux 0x14658c37	llc_mac_hdr_init
+EXPORT_SYMBOL vmlinux 0x14778cad	proc_dointvec
+EXPORT_SYMBOL vmlinux 0x149ed9d8	path_lookup
+EXPORT_SYMBOL vmlinux 0x14a04e10	textsearch_prepare
+EXPORT_SYMBOL vmlinux 0x14af0cf7	gen_pool_destroy
+EXPORT_SYMBOL vmlinux 0x14d44c3e	put_tty_driver
+EXPORT_SYMBOL vmlinux 0x14e06637	__dev_remove_pack
+EXPORT_SYMBOL vmlinux 0x1501cb52	security_path_symlink
+EXPORT_SYMBOL vmlinux 0x151d2992	pci_restore_state
+EXPORT_SYMBOL vmlinux 0x1551dc51	bitmap_find_free_region
+EXPORT_SYMBOL vmlinux 0x15529b2f	xfrm_user_policy
+EXPORT_SYMBOL vmlinux 0x1564b817	__scsi_iterate_devices
+EXPORT_SYMBOL vmlinux 0x157053e0	dquot_release_reserved_space
+EXPORT_SYMBOL vmlinux 0x1577873f	sock_common_recvmsg
+EXPORT_SYMBOL vmlinux 0x1587aff0	remove_arg_zero
+EXPORT_SYMBOL vmlinux 0x15b16fbc	dquot_mark_dquot_dirty
+EXPORT_SYMBOL vmlinux 0x15b2b2e5	pci_dev_driver
+EXPORT_SYMBOL vmlinux 0x15d1a469	filemap_fault
+EXPORT_SYMBOL vmlinux 0x15ef2dd9	kfifo_free
+EXPORT_SYMBOL vmlinux 0x15f5479a	__rta_fill
+EXPORT_SYMBOL vmlinux 0x15f6e4d9	phy_connect_direct
+EXPORT_SYMBOL vmlinux 0x15fac1b6	arch_acpi_processor_cleanup_pdc
+EXPORT_SYMBOL vmlinux 0x160ea4c8	sfi_disabled
+EXPORT_SYMBOL vmlinux 0x16305289	warn_slowpath_null
+EXPORT_SYMBOL vmlinux 0x163bfbfd	dev_set_drvdata
+EXPORT_SYMBOL vmlinux 0x163c5e39	twl4030_i2c_read
+EXPORT_SYMBOL vmlinux 0x164397fc	truncate_inode_pages_range
+EXPORT_SYMBOL vmlinux 0x16696187	__dst_free
+EXPORT_SYMBOL vmlinux 0x167bb03f	tcp_create_openreq_child
+EXPORT_SYMBOL vmlinux 0x167e7f9d	__get_user_1
+EXPORT_SYMBOL vmlinux 0x168f2e44	input_close_device
+EXPORT_SYMBOL vmlinux 0x169f3bbd	tty_port_close
+EXPORT_SYMBOL vmlinux 0x16a52302	pci_bus_find_capability
+EXPORT_SYMBOL vmlinux 0x16add87a	kernel_sendmsg
+EXPORT_SYMBOL vmlinux 0x16d53cbe	jbd2_journal_set_triggers
+EXPORT_SYMBOL vmlinux 0x16f6fe16	kernel_getpeername
+EXPORT_SYMBOL vmlinux 0x170c25ee	acpi_get_next_object
+EXPORT_SYMBOL vmlinux 0x174318c4	udp_ioctl
+EXPORT_SYMBOL vmlinux 0x177c298c	pci_vpd_truncate
+EXPORT_SYMBOL vmlinux 0x177c94c2	block_truncate_page
+EXPORT_SYMBOL vmlinux 0x1780bcab	seq_puts
+EXPORT_SYMBOL vmlinux 0x1789ac44	md_integrity_add_rdev
+EXPORT_SYMBOL vmlinux 0x17df17bc	sysctl_tcp_ecn
+EXPORT_SYMBOL vmlinux 0x17e50654	dm_dirty_log_create
+EXPORT_SYMBOL vmlinux 0x17f341a0	i8042_lock_chip
+EXPORT_SYMBOL vmlinux 0x17f40da2	tcp_proc_register
+EXPORT_SYMBOL vmlinux 0x181826a0	acpi_lock_ac_dir
+EXPORT_SYMBOL vmlinux 0x181b6ff2	mempool_resize
+EXPORT_SYMBOL vmlinux 0x1828341c	inet_frags_exit_net
+EXPORT_SYMBOL vmlinux 0x1830bc17	journal_load
+EXPORT_SYMBOL vmlinux 0x1833d97d	make_EII_client
+EXPORT_SYMBOL vmlinux 0x183fa88b	mempool_alloc_slab
+EXPORT_SYMBOL vmlinux 0x1845e7c5	acpi_evaluate_integer
+EXPORT_SYMBOL vmlinux 0x184b82fb	mmc_vddrange_to_ocrmask
+EXPORT_SYMBOL vmlinux 0x185c4e1c	pnp_register_driver
+EXPORT_SYMBOL vmlinux 0x1875ecc9	udp_lib_setsockopt
+EXPORT_SYMBOL vmlinux 0x187fea42	acpi_check_resource_conflict
+EXPORT_SYMBOL vmlinux 0x188123e3	get_unmapped_area_prot
+EXPORT_SYMBOL vmlinux 0x188bfc17	kernel_sendpage
+EXPORT_SYMBOL vmlinux 0x18afcf30	setup_new_exec
+EXPORT_SYMBOL vmlinux 0x18c55c40	commit_creds
+EXPORT_SYMBOL vmlinux 0x18e414b1	ip_mc_join_group
+EXPORT_SYMBOL vmlinux 0x18f3d778	atomic_dec_and_mutex_lock
+EXPORT_SYMBOL vmlinux 0x18fb598b	tcp_v4_conn_request
+EXPORT_SYMBOL vmlinux 0x19410536	vfs_dq_drop
+EXPORT_SYMBOL vmlinux 0x1943af69	lock_rename
+EXPORT_SYMBOL vmlinux 0x1976bc16	__tracepoint_kmem_cache_free
+EXPORT_SYMBOL vmlinux 0x1985ed3c	prepare_to_wait_exclusive
+EXPORT_SYMBOL vmlinux 0x199ed0cd	net_disable_timestamp
+EXPORT_SYMBOL vmlinux 0x19a3be9e	backlight_device_unregister
+EXPORT_SYMBOL vmlinux 0x19b00b19	vfs_quota_on
+EXPORT_SYMBOL vmlinux 0x19b6b7ee	keyring_search
+EXPORT_SYMBOL vmlinux 0x19d5d20a	acpi_walk_namespace
+EXPORT_SYMBOL vmlinux 0x1a0f85c4	init_task
+EXPORT_SYMBOL vmlinux 0x1a3b8983	dev_addr_del
+EXPORT_SYMBOL vmlinux 0x1a45cb6c	acpi_disabled
+EXPORT_SYMBOL vmlinux 0x1a75caa3	_read_lock
+EXPORT_SYMBOL vmlinux 0x1a8a845e	idle_nomwait
+EXPORT_SYMBOL vmlinux 0x1a9e01ea	d_find_alias
+EXPORT_SYMBOL vmlinux 0x1abc280f	kmem_cache_shrink
+EXPORT_SYMBOL vmlinux 0x1ace138d	bitmap_allocate_region
+EXPORT_SYMBOL vmlinux 0x1ad3342c	vlan_dev_vlan_id
+EXPORT_SYMBOL vmlinux 0x1adacddc	ip6_xmit
+EXPORT_SYMBOL vmlinux 0x1ae29a6c	invalidate_partition
+EXPORT_SYMBOL vmlinux 0x1aea1a37	proc_mkdir
+EXPORT_SYMBOL vmlinux 0x1b015d25	bitmap_parselist
+EXPORT_SYMBOL vmlinux 0x1b18dac9	inet_frags_init
+EXPORT_SYMBOL vmlinux 0x1b3ca184	dput
+EXPORT_SYMBOL vmlinux 0x1b5f7b7e	iov_iter_copy_from_user
+EXPORT_SYMBOL vmlinux 0x1b6314fd	in_aton
+EXPORT_SYMBOL vmlinux 0x1b86c9ce	arch_acpi_processor_init_pdc
+EXPORT_SYMBOL vmlinux 0x1b89419f	add_wait_queue_exclusive
+EXPORT_SYMBOL vmlinux 0x1b8b95ad	i8042_unlock_chip
+EXPORT_SYMBOL vmlinux 0x1b9981cc	set_irq_wake
+EXPORT_SYMBOL vmlinux 0x1b9e0ff1	scsilun_to_int
+EXPORT_SYMBOL vmlinux 0x1ba2afe7	unregister_md_personality
+EXPORT_SYMBOL vmlinux 0x1bdf4684	dma_async_memcpy_pg_to_pg
+EXPORT_SYMBOL vmlinux 0x1bf2ddc9	md_set_array_sectors
+EXPORT_SYMBOL vmlinux 0x1c0e41e8	udp_proc_unregister
+EXPORT_SYMBOL vmlinux 0x1c1af916	set_normalized_timespec
+EXPORT_SYMBOL vmlinux 0x1c2ad624	xfrm_find_acq
+EXPORT_SYMBOL vmlinux 0x1c346797	d_add_ci
+EXPORT_SYMBOL vmlinux 0x1c3e8998	tty_register_device
+EXPORT_SYMBOL vmlinux 0x1c4001a2	skb_queue_tail
+EXPORT_SYMBOL vmlinux 0x1c4514c0	insert_inode_locked
+EXPORT_SYMBOL vmlinux 0x1c6a7a7b	udp_lib_get_port
+EXPORT_SYMBOL vmlinux 0x1c745d44	udp_lib_getsockopt
+EXPORT_SYMBOL vmlinux 0x1c88a03f	blk_rq_map_kern
+EXPORT_SYMBOL vmlinux 0x1c8a04b0	acpi_reset
+EXPORT_SYMBOL vmlinux 0x1c9e70c1	do_mmap_pgoff
+EXPORT_SYMBOL vmlinux 0x1cc6719a	register_reboot_notifier
+EXPORT_SYMBOL vmlinux 0x1ce7ec4c	rwsem_wake
+EXPORT_SYMBOL vmlinux 0x1cefe352	wait_for_completion
+EXPORT_SYMBOL vmlinux 0x1d0f5561	dmam_alloc_coherent
+EXPORT_SYMBOL vmlinux 0x1d2e87c6	do_gettimeofday
+EXPORT_SYMBOL vmlinux 0x1d3371dd	dm_get_device
+EXPORT_SYMBOL vmlinux 0x1d67014a	bitmap_end_sync
+EXPORT_SYMBOL vmlinux 0x1da6f196	netpoll_poll
+EXPORT_SYMBOL vmlinux 0x1db19de3	ip_route_input
+EXPORT_SYMBOL vmlinux 0x1dbe1595	__pskb_pull_tail
+EXPORT_SYMBOL vmlinux 0x1dc36131	fb_destroy_modedb
+EXPORT_SYMBOL vmlinux 0x1dcffa4f	inet_frag_destroy
+EXPORT_SYMBOL vmlinux 0x1dd571e6	fb_copy_cmap
+EXPORT_SYMBOL vmlinux 0x1dd75559	qdisc_calculate_pkt_len
+EXPORT_SYMBOL vmlinux 0x1dda6a42	ps2_drain
+EXPORT_SYMBOL vmlinux 0x1de98b34	tcp_v4_md5_do_add
+EXPORT_SYMBOL vmlinux 0x1e0551f0	skb_trim
+EXPORT_SYMBOL vmlinux 0x1e1a5baa	jbd2_journal_check_available_features
+EXPORT_SYMBOL vmlinux 0x1e1c7348	ioctl_by_bdev
+EXPORT_SYMBOL vmlinux 0x1e339822	dst_alloc
+EXPORT_SYMBOL vmlinux 0x1e3773d5	lro_flush_all
+EXPORT_SYMBOL vmlinux 0x1e417667	kthread_stop
+EXPORT_SYMBOL vmlinux 0x1e4983bb	invalidate_inode_buffers
+EXPORT_SYMBOL vmlinux 0x1e6d26a8	strstr
+EXPORT_SYMBOL vmlinux 0x1e7b90b4	__nla_put_nohdr
+EXPORT_SYMBOL vmlinux 0x1e808ae2	dm_exception_store_type_unregister
+EXPORT_SYMBOL vmlinux 0x1e8b66a4	i2c_del_driver
+EXPORT_SYMBOL vmlinux 0x1e92943d	vfs_readv
+EXPORT_SYMBOL vmlinux 0x1ec010c2	blk_recount_segments
+EXPORT_SYMBOL vmlinux 0x1ecb9943	posix_acl_to_xattr
+EXPORT_SYMBOL vmlinux 0x1eceff01	fsync_bdev
+EXPORT_SYMBOL vmlinux 0x1ed63b34	skb_copy_datagram_from_iovec
+EXPORT_SYMBOL vmlinux 0x1ede4554	inet_csk_init_xmit_timers
+EXPORT_SYMBOL vmlinux 0x1eefaaa8	scsi_dma_unmap
+EXPORT_SYMBOL vmlinux 0x1efe283f	__cap_full_set
+EXPORT_SYMBOL vmlinux 0x1f05ac47	stop_tty
+EXPORT_SYMBOL vmlinux 0x1f1884d0	xfrm_policy_unregister_afinfo
+EXPORT_SYMBOL vmlinux 0x1f2960a2	netlink_unicast
+EXPORT_SYMBOL vmlinux 0x1f305993	kobject_set_name
+EXPORT_SYMBOL vmlinux 0x1f450e53	tty_port_tty_set
+EXPORT_SYMBOL vmlinux 0x1f5d497d	journal_release_buffer
+EXPORT_SYMBOL vmlinux 0x1f659d99	set_pages_array_wb
+EXPORT_SYMBOL vmlinux 0x1f69573a	kset_register
+EXPORT_SYMBOL vmlinux 0x1f7f62e4	sock_recvmsg
+EXPORT_SYMBOL vmlinux 0x1f99bef9	tcf_destroy_chain
+EXPORT_SYMBOL vmlinux 0x1f9ba9a6	kill_pgrp
+EXPORT_SYMBOL vmlinux 0x1fc2233f	dev_getbyhwaddr
+EXPORT_SYMBOL vmlinux 0x1fd6faff	km_state_notify
+EXPORT_SYMBOL vmlinux 0x1fdde732	search_binary_handler
+EXPORT_SYMBOL vmlinux 0x1fe6fe82	phy_device_register
+EXPORT_SYMBOL vmlinux 0x1feb6553	inet_frags_fini
+EXPORT_SYMBOL vmlinux 0x1ff69dd8	vfs_fstatat
+EXPORT_SYMBOL vmlinux 0x1fff307c	pcie_set_readrq
+EXPORT_SYMBOL vmlinux 0x20000329	simple_strtoul
+EXPORT_SYMBOL vmlinux 0x2005e68a	acpi_remove_fixed_event_handler
+EXPORT_SYMBOL vmlinux 0x201960d7	file_fsync
+EXPORT_SYMBOL vmlinux 0x20385c58	genl_register_mc_group
+EXPORT_SYMBOL vmlinux 0x2047363d	napi_frags_finish
+EXPORT_SYMBOL vmlinux 0x205c92aa	napi_gro_receive
+EXPORT_SYMBOL vmlinux 0x20750ce9	unregister_nls
+EXPORT_SYMBOL vmlinux 0x208739f6	acpi_load_table
+EXPORT_SYMBOL vmlinux 0x20ea091b	blk_queue_max_phys_segments
+EXPORT_SYMBOL vmlinux 0x20f1ef60	__mutex_init
+EXPORT_SYMBOL vmlinux 0x20fb4f3c	ethtool_op_get_flags
+EXPORT_SYMBOL vmlinux 0x2115e147	nf_register_sockopt
+EXPORT_SYMBOL vmlinux 0x2125394d	set_page_dirty_lock
+EXPORT_SYMBOL vmlinux 0x21298007	nla_put
+EXPORT_SYMBOL vmlinux 0x21470b31	scsi_execute
+EXPORT_SYMBOL vmlinux 0x215ebd78	bitrev16
+EXPORT_SYMBOL vmlinux 0x21990731	__ht_create_irq
+EXPORT_SYMBOL vmlinux 0x21a60fd8	vga_get
+EXPORT_SYMBOL vmlinux 0x21d50a51	tcf_hash_release
+EXPORT_SYMBOL vmlinux 0x21e0ea22	acpi_get_id
+EXPORT_SYMBOL vmlinux 0x21e13994	inet_csk_clear_xmit_timers
+EXPORT_SYMBOL vmlinux 0x21e7fc93	bdi_init
+EXPORT_SYMBOL vmlinux 0x21f6c854	phy_enable_interrupts
+EXPORT_SYMBOL vmlinux 0x21f70485	__xfrm_state_delete
+EXPORT_SYMBOL vmlinux 0x221aed8c	fb_set_suspend
+EXPORT_SYMBOL vmlinux 0x221c7759	tty_port_block_til_ready
+EXPORT_SYMBOL vmlinux 0x222e7ce2	sysfs_streq
+EXPORT_SYMBOL vmlinux 0x2249fd86	hippi_neigh_setup_dev
+EXPORT_SYMBOL vmlinux 0x225d4453	destroy_EII_client
+EXPORT_SYMBOL vmlinux 0x22604477	acpi_lock_battery_dir
+EXPORT_SYMBOL vmlinux 0x226e86a9	audit_log
+EXPORT_SYMBOL vmlinux 0x2284779e	current_fs_time
+EXPORT_SYMBOL vmlinux 0x2288378f	system_state
+EXPORT_SYMBOL vmlinux 0x22a73912	__tcp_put_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x22b325d5	kd_mksound
+EXPORT_SYMBOL vmlinux 0x22b6533b	xfrm_sad_getinfo
+EXPORT_SYMBOL vmlinux 0x22c11a67	in6_dev_finish_destroy
+EXPORT_SYMBOL vmlinux 0x22e95fa9	ps2_handle_response
+EXPORT_SYMBOL vmlinux 0x22f8f7aa	rfkill_alloc
+EXPORT_SYMBOL vmlinux 0x23028116	request_key
+EXPORT_SYMBOL vmlinux 0x231a8371	blk_get_request
+EXPORT_SYMBOL vmlinux 0x23223426	dev_add_pack
+EXPORT_SYMBOL vmlinux 0x23269a13	strict_strtoul
+EXPORT_SYMBOL vmlinux 0x23319b63	xfrm_policy_insert
+EXPORT_SYMBOL vmlinux 0x233702fd	follow_pfn
+EXPORT_SYMBOL vmlinux 0x23594b92	eth_validate_addr
+EXPORT_SYMBOL vmlinux 0x238df30e	genphy_read_status
+EXPORT_SYMBOL vmlinux 0x23c8f257	slhc_uncompress
+EXPORT_SYMBOL vmlinux 0x23ca33b7	input_unfilter_device
+EXPORT_SYMBOL vmlinux 0x23cda5a6	dentry_unhash
+EXPORT_SYMBOL vmlinux 0x23e2caff	nla_reserve_nohdr
+EXPORT_SYMBOL vmlinux 0x23e31568	tty_kref_put
+EXPORT_SYMBOL vmlinux 0x23ec797a	simple_set_mnt
+EXPORT_SYMBOL vmlinux 0x23fd3028	vmalloc_node
+EXPORT_SYMBOL vmlinux 0x240c7310	sock_alloc_send_pskb
+EXPORT_SYMBOL vmlinux 0x240ee02c	mca_device_read_pos
+EXPORT_SYMBOL vmlinux 0x242fa60c	clear_page_dirty_for_io
+EXPORT_SYMBOL vmlinux 0x243ffddc	idr_destroy
+EXPORT_SYMBOL vmlinux 0x24428be5	strncpy_from_user
+EXPORT_SYMBOL vmlinux 0x24579dbf	call_usermodehelper_freeinfo
+EXPORT_SYMBOL vmlinux 0x2459bbcc	console_set_on_cmdline
+EXPORT_SYMBOL vmlinux 0x245d98e5	napi_frags_skb
+EXPORT_SYMBOL vmlinux 0x24624544	ftrace_print_flags_seq
+EXPORT_SYMBOL vmlinux 0x249837bd	tcf_hash_search
+EXPORT_SYMBOL vmlinux 0x24a60875	xfrm6_prepare_output
+EXPORT_SYMBOL vmlinux 0x24a79b53	single_release
+EXPORT_SYMBOL vmlinux 0x24bf49cb	qdisc_watchdog_init
+EXPORT_SYMBOL vmlinux 0x24bfbfdf	module_put
+EXPORT_SYMBOL vmlinux 0x24c76828	alloc_fddidev
+EXPORT_SYMBOL vmlinux 0x24e4bb01	down_write_trylock
+EXPORT_SYMBOL vmlinux 0x24fdac79	wake_bit_function
+EXPORT_SYMBOL vmlinux 0x250113b4	memory_read_from_buffer
+EXPORT_SYMBOL vmlinux 0x253abf0e	grab_cache_page_nowait
+EXPORT_SYMBOL vmlinux 0x25820c64	fs_overflowuid
+EXPORT_SYMBOL vmlinux 0x258355b4	fb_find_best_mode
+EXPORT_SYMBOL vmlinux 0x2597f10a	pnp_possible_config
+EXPORT_SYMBOL vmlinux 0x25a3cdb2	pci_set_consistent_dma_mask
+EXPORT_SYMBOL vmlinux 0x25d3e2a3	atomic64_dec_return
+EXPORT_SYMBOL vmlinux 0x25d62d10	mark_page_accessed
+EXPORT_SYMBOL vmlinux 0x25da4f88	kmem_cache_create
+EXPORT_SYMBOL vmlinux 0x261b4915	pagevec_lookup_tag
+EXPORT_SYMBOL vmlinux 0x263d0406	scsi_dma_map
+EXPORT_SYMBOL vmlinux 0x2653f563	jbd2_journal_begin_ordered_truncate
+EXPORT_SYMBOL vmlinux 0x266acdec	kunmap_high
+EXPORT_SYMBOL vmlinux 0x267827a5	devm_ioport_map
+EXPORT_SYMBOL vmlinux 0x267fc65b	__tasklet_hi_schedule
+EXPORT_SYMBOL vmlinux 0x2686dc9a	pci_enable_msix
+EXPORT_SYMBOL vmlinux 0x268cc6a2	sys_close
+EXPORT_SYMBOL vmlinux 0x26db76b1	tty_wait_until_sent
+EXPORT_SYMBOL vmlinux 0x26e76fb8	sysctl_udp_wmem_min
+EXPORT_SYMBOL vmlinux 0x270918e1	md_unregister_thread
+EXPORT_SYMBOL vmlinux 0x271cba95	acpi_bus_private_data_handler
+EXPORT_SYMBOL vmlinux 0x2727da5d	_atomic_dec_and_lock
+EXPORT_SYMBOL vmlinux 0x27295f2c	blk_queue_logical_block_size
+EXPORT_SYMBOL vmlinux 0x272d394e	mtrr_del
+EXPORT_SYMBOL vmlinux 0x272edc7d	tcp_init_xmit_timers
+EXPORT_SYMBOL vmlinux 0x27412429	contig_page_data
+EXPORT_SYMBOL vmlinux 0x27639e2c	skb_realloc_headroom
+EXPORT_SYMBOL vmlinux 0x276e5142	ethtool_op_get_tx_csum
+EXPORT_SYMBOL vmlinux 0x277cf5e1	netdev_class_create_file
+EXPORT_SYMBOL vmlinux 0x27864d57	memparse
+EXPORT_SYMBOL vmlinux 0x279ea63f	key_revoke
+EXPORT_SYMBOL vmlinux 0x27b35c51	tcp_sockets_allocated
+EXPORT_SYMBOL vmlinux 0x27bbf221	disable_irq_nosync
+EXPORT_SYMBOL vmlinux 0x27c61ece	qdisc_put_stab
+EXPORT_SYMBOL vmlinux 0x27cfcd1b	scsi_prep_fn
+EXPORT_SYMBOL vmlinux 0x27d7c694	dev_change_flags
+EXPORT_SYMBOL vmlinux 0x27ec4897	acpi_bus_get_device
+EXPORT_SYMBOL vmlinux 0x2838cd8a	tty_port_free_xmit_buf
+EXPORT_SYMBOL vmlinux 0x285ac517	strict_strtoll
+EXPORT_SYMBOL vmlinux 0x286568b9	tty_flip_buffer_push
+EXPORT_SYMBOL vmlinux 0x286d649b	ethtool_op_set_sg
+EXPORT_SYMBOL vmlinux 0x28744540	neigh_parms_release
+EXPORT_SYMBOL vmlinux 0x2882a211	tcp_md5_hash_skb_data
+EXPORT_SYMBOL vmlinux 0x28a2ed02	scsi_build_sense_buffer
+EXPORT_SYMBOL vmlinux 0x28a7cdde	ip_xfrm_me_harder
+EXPORT_SYMBOL vmlinux 0x28b06402	unregister_binfmt
+EXPORT_SYMBOL vmlinux 0x28b3c4f0	write_inode_now
+EXPORT_SYMBOL vmlinux 0x28b715a6	isapnp_cfg_end
+EXPORT_SYMBOL vmlinux 0x28bf1e68	__page_symlink
+EXPORT_SYMBOL vmlinux 0x290d9f48	i2c_smbus_write_byte_data
+EXPORT_SYMBOL vmlinux 0x292093f4	native_rdmsr_safe_regs
+EXPORT_SYMBOL vmlinux 0x29255fe3	tcp_simple_retransmit
+EXPORT_SYMBOL vmlinux 0x29274bc7	ipv6_getsockopt
+EXPORT_SYMBOL vmlinux 0x29385dbb	kernel_recvmsg
+EXPORT_SYMBOL vmlinux 0x29537c9e	alloc_chrdev_region
+EXPORT_SYMBOL vmlinux 0x2967da4a	__secpath_destroy
+EXPORT_SYMBOL vmlinux 0x298b55e7	inet_select_addr
+EXPORT_SYMBOL vmlinux 0x29b1c366	__sg_alloc_table
+EXPORT_SYMBOL vmlinux 0x29bd4c46	__cap_init_eff_set
+EXPORT_SYMBOL vmlinux 0x29daa33b	pci_scan_single_device
+EXPORT_SYMBOL vmlinux 0x2a303d4d	check_signature
+EXPORT_SYMBOL vmlinux 0x2a458a0d	rfkill_set_led_trigger_name
+EXPORT_SYMBOL vmlinux 0x2a4d7cee	ip_route_output_key
+EXPORT_SYMBOL vmlinux 0x2a5140e7	skb_gso_segment
+EXPORT_SYMBOL vmlinux 0x2a58e276	ipv6_setsockopt
+EXPORT_SYMBOL vmlinux 0x2a742e23	__kfree_skb
+EXPORT_SYMBOL vmlinux 0x2a8fedc9	mmc_host_disable
+EXPORT_SYMBOL vmlinux 0x2a941ac4	release_sock
+EXPORT_SYMBOL vmlinux 0x2aa0e4fc	strncasecmp
+EXPORT_SYMBOL vmlinux 0x2aa1cede	tty_port_carrier_raised
+EXPORT_SYMBOL vmlinux 0x2ac2592b	elv_queue_empty
+EXPORT_SYMBOL vmlinux 0x2acd5f6b	llc_build_and_send_ui_pkt
+EXPORT_SYMBOL vmlinux 0x2ad07da7	acpi_root_dir
+EXPORT_SYMBOL vmlinux 0x2ad09693	inet_csk_accept
+EXPORT_SYMBOL vmlinux 0x2aeb2800	mempool_create_node
+EXPORT_SYMBOL vmlinux 0x2b0ba2b0	scsi_sense_desc_find
+EXPORT_SYMBOL vmlinux 0x2b2ec32b	inode_init_once
+EXPORT_SYMBOL vmlinux 0x2b92b000	update_region
+EXPORT_SYMBOL vmlinux 0x2b98689e	kmem_ptr_validate
+EXPORT_SYMBOL vmlinux 0x2b9ff55d	__pci_register_driver
+EXPORT_SYMBOL vmlinux 0x2ba707a8	sysctl_tcp_low_latency
+EXPORT_SYMBOL vmlinux 0x2bb4b1fc	blk_cleanup_queue
+EXPORT_SYMBOL vmlinux 0x2bb55d6e	acpi_remove_notify_handler
+EXPORT_SYMBOL vmlinux 0x2bb6fde2	__kfifo_put
+EXPORT_SYMBOL vmlinux 0x2bc95bd4	memset
+EXPORT_SYMBOL vmlinux 0x2be8dcd8	mca_register_driver_integrated
+EXPORT_SYMBOL vmlinux 0x2bf0e7e0	phy_scan_fixups
+EXPORT_SYMBOL vmlinux 0x2bf2e67b	get_sb_nodev
+EXPORT_SYMBOL vmlinux 0x2bfeb410	acpi_get_handle
+EXPORT_SYMBOL vmlinux 0x2c086272	__vlan_hwaccel_rx
+EXPORT_SYMBOL vmlinux 0x2c0f471c	tty_hangup
+EXPORT_SYMBOL vmlinux 0x2c1370f1	acpi_bus_generate_proc_event
+EXPORT_SYMBOL vmlinux 0x2c4301f4	dma_sync_wait
+EXPORT_SYMBOL vmlinux 0x2c5749e6	acpi_clear_gpe
+EXPORT_SYMBOL vmlinux 0x2c5988e0	eth_header
+EXPORT_SYMBOL vmlinux 0x2c7a00e3	tcp_gro_receive
+EXPORT_SYMBOL vmlinux 0x2c7ad725	security_inode_readlink
+EXPORT_SYMBOL vmlinux 0x2c835233	handle_sysrq
+EXPORT_SYMBOL vmlinux 0x2c8f5989	acpi_remove_address_space_handler
+EXPORT_SYMBOL vmlinux 0x2c95068d	blk_queue_max_segment_size
+EXPORT_SYMBOL vmlinux 0x2c9874fe	ida_remove
+EXPORT_SYMBOL vmlinux 0x2cb07145	inet_twsk_deschedule
+EXPORT_SYMBOL vmlinux 0x2cb14194	blk_queue_start_tag
+EXPORT_SYMBOL vmlinux 0x2ccf71ea	seq_open
+EXPORT_SYMBOL vmlinux 0x2cd43543	sock_no_accept
+EXPORT_SYMBOL vmlinux 0x2d0ba4b5	set_pages_wb
+EXPORT_SYMBOL vmlinux 0x2d12e1b7	find_get_pages_contig
+EXPORT_SYMBOL vmlinux 0x2d1415bb	cdrom_mode_sense
+EXPORT_SYMBOL vmlinux 0x2d1e70f3	__ip_select_ident
+EXPORT_SYMBOL vmlinux 0x2d37342e	cpu_online_mask
+EXPORT_SYMBOL vmlinux 0x2d52a3cc	vfs_get_dqinfo
+EXPORT_SYMBOL vmlinux 0x2d5cdae3	icmpv6_send
+EXPORT_SYMBOL vmlinux 0x2d74c89b	override_creds
+EXPORT_SYMBOL vmlinux 0x2d84969a	blk_start_request
+EXPORT_SYMBOL vmlinux 0x2d89342a	scsi_show_sense_hdr
+EXPORT_SYMBOL vmlinux 0x2dbeaa36	cdev_index
+EXPORT_SYMBOL vmlinux 0x2dcb0123	schedule_delayed_work_on
+EXPORT_SYMBOL vmlinux 0x2dd16564	arch_register_cpu
+EXPORT_SYMBOL vmlinux 0x2dedc4c2	acpi_format_exception
+EXPORT_SYMBOL vmlinux 0x2def3890	scsi_reset_provider
+EXPORT_SYMBOL vmlinux 0x2def7f76	rtc_cmos_write
+EXPORT_SYMBOL vmlinux 0x2e2a9e65	thermal_cooling_device_register
+EXPORT_SYMBOL vmlinux 0x2e2ce9e0	sysctl_tcp_syncookies
+EXPORT_SYMBOL vmlinux 0x2e3df06d	pci_request_selected_regions_exclusive
+EXPORT_SYMBOL vmlinux 0x2e464382	alloc_etherdev_mq
+EXPORT_SYMBOL vmlinux 0x2e4a39f8	sysctl_udp_mem
+EXPORT_SYMBOL vmlinux 0x2e5674cd	generic_file_aio_write
+EXPORT_SYMBOL vmlinux 0x2e60bace	memcpy
+EXPORT_SYMBOL vmlinux 0x2e96fc87	dev_get_by_name
+EXPORT_SYMBOL vmlinux 0x2eb9a0e8	_read_lock_irq
+EXPORT_SYMBOL vmlinux 0x2edf38ce	set_disk_ro
+EXPORT_SYMBOL vmlinux 0x2ee6d6d7	dev_alloc_name
+EXPORT_SYMBOL vmlinux 0x2efe5e09	atomic64_xchg
+EXPORT_SYMBOL vmlinux 0x2f0344e0	jbd2_journal_extend
+EXPORT_SYMBOL vmlinux 0x2f08167a	security_path_rename
+EXPORT_SYMBOL vmlinux 0x2f12b88d	sk_common_release
+EXPORT_SYMBOL vmlinux 0x2f12e2d7	lookup_one_len
+EXPORT_SYMBOL vmlinux 0x2f287f0d	copy_to_user
+EXPORT_SYMBOL vmlinux 0x2f516a1e	scsi_host_set_state
+EXPORT_SYMBOL vmlinux 0x2f67a35e	shrink_dcache_sb
+EXPORT_SYMBOL vmlinux 0x2f81cd9d	nf_unregister_sockopt
+EXPORT_SYMBOL vmlinux 0x2f85a489	wireless_send_event
+EXPORT_SYMBOL vmlinux 0x2f91b5f3	page_follow_link_light
+EXPORT_SYMBOL vmlinux 0x2fb9a041	pnpbios_protocol
+EXPORT_SYMBOL vmlinux 0x2fe564cf	inet_csk_delete_keepalive_timer
+EXPORT_SYMBOL vmlinux 0x30123eb5	icmpv6_statistics
+EXPORT_SYMBOL vmlinux 0x307f7776	timecompare_offset
+EXPORT_SYMBOL vmlinux 0x30879691	misc_register
+EXPORT_SYMBOL vmlinux 0x30ae9b07	inet_dev_addr_type
+EXPORT_SYMBOL vmlinux 0x30dae821	vfs_set_dqinfo
+EXPORT_SYMBOL vmlinux 0x30e74134	tty_termios_copy_hw
+EXPORT_SYMBOL vmlinux 0x310917fe	sort
+EXPORT_SYMBOL vmlinux 0x31121fe1	genl_unregister_mc_group
+EXPORT_SYMBOL vmlinux 0x3119a7e8	xfrm_policy_flush
+EXPORT_SYMBOL vmlinux 0x3145216f	pci_dev_present
+EXPORT_SYMBOL vmlinux 0x3147857d	default_red
+EXPORT_SYMBOL vmlinux 0x31547d55	ppp_register_compressor
+EXPORT_SYMBOL vmlinux 0x31666273	xfrm4_rcv
+EXPORT_SYMBOL vmlinux 0x31785fdc	neigh_table_init_no_netlink
+EXPORT_SYMBOL vmlinux 0x3191f109	__krealloc
+EXPORT_SYMBOL vmlinux 0x31adc8ae	aio_put_req
+EXPORT_SYMBOL vmlinux 0x31cb8d25	genphy_config_aneg
+EXPORT_SYMBOL vmlinux 0x31db14ac	bio_get_nr_vecs
+EXPORT_SYMBOL vmlinux 0x31e76b57	recalibrate_cpu_khz
+EXPORT_SYMBOL vmlinux 0x32080822	set_trace_device
+EXPORT_SYMBOL vmlinux 0x320abc06	kmem_cache_name
+EXPORT_SYMBOL vmlinux 0x32126cf5	scsi_unregister
+EXPORT_SYMBOL vmlinux 0x32192b0e	seq_release
+EXPORT_SYMBOL vmlinux 0x321d8551	arp_create
+EXPORT_SYMBOL vmlinux 0x32451ad8	journal_start_commit
+EXPORT_SYMBOL vmlinux 0x326df9e1	vfs_stat
+EXPORT_SYMBOL vmlinux 0x3285cc48	param_set_uint
+EXPORT_SYMBOL vmlinux 0x32a09248	register_sysctl_paths
+EXPORT_SYMBOL vmlinux 0x32a6ef8c	generic_block_fiemap
+EXPORT_SYMBOL vmlinux 0x32fb65c6	wait_on_page_bit
+EXPORT_SYMBOL vmlinux 0x330589f6	pci_disable_device
+EXPORT_SYMBOL vmlinux 0x330b5374	generic_file_splice_write
+EXPORT_SYMBOL vmlinux 0x332b1d27	jbd2_journal_clear_features
+EXPORT_SYMBOL vmlinux 0x332b28eb	dev_driver_string
+EXPORT_SYMBOL vmlinux 0x3344fc2e	proto_register
+EXPORT_SYMBOL vmlinux 0x336c8df7	elv_dispatch_add_tail
+EXPORT_SYMBOL vmlinux 0x337f8f75	i2c_smbus_xfer
+EXPORT_SYMBOL vmlinux 0x3383b0d4	ether_setup
+EXPORT_SYMBOL vmlinux 0x33b56109	neigh_table_clear
+EXPORT_SYMBOL vmlinux 0x33b6c704	dm_io_client_create
+EXPORT_SYMBOL vmlinux 0x33d92f9a	prepare_to_wait
+EXPORT_SYMBOL vmlinux 0x342a1c50	input_filter_device
+EXPORT_SYMBOL vmlinux 0x342f60fe	apm_info
+EXPORT_SYMBOL vmlinux 0x343879a3	journal_destroy
+EXPORT_SYMBOL vmlinux 0x344cb544	unregister_filesystem
+EXPORT_SYMBOL vmlinux 0x3457cb68	param_set_long
+EXPORT_SYMBOL vmlinux 0x345fdb8f	check_disk_size_change
+EXPORT_SYMBOL vmlinux 0x346e29b5	ipv4_specific
+EXPORT_SYMBOL vmlinux 0x347240a3	mmc_register_driver
+EXPORT_SYMBOL vmlinux 0x34872ddd	__seq_open_private
+EXPORT_SYMBOL vmlinux 0x34896788	__devm_release_region
+EXPORT_SYMBOL vmlinux 0x34908c14	print_hex_dump_bytes
+EXPORT_SYMBOL vmlinux 0x349cba85	strchr
+EXPORT_SYMBOL vmlinux 0x34a1ad22	i2c_put_adapter
+EXPORT_SYMBOL vmlinux 0x34ac36df	bio_phys_segments
+EXPORT_SYMBOL vmlinux 0x355c97ea	deny_write_access
+EXPORT_SYMBOL vmlinux 0x35659be4	shrink_dcache_parent
+EXPORT_SYMBOL vmlinux 0x35a9d65f	sg_miter_start
+EXPORT_SYMBOL vmlinux 0x35c2ba9e	refrigerator
+EXPORT_SYMBOL vmlinux 0x35c7a441	seq_write
+EXPORT_SYMBOL vmlinux 0x35da2e61	radix_tree_tag_get
+EXPORT_SYMBOL vmlinux 0x35da5e3e	dma_async_tx_descriptor_init
+EXPORT_SYMBOL vmlinux 0x35f0faa2	acpi_evaluate_object
+EXPORT_SYMBOL vmlinux 0x35f11d65	cdrom_get_last_written
+EXPORT_SYMBOL vmlinux 0x35fc61dd	pci_remove_bus_device
+EXPORT_SYMBOL vmlinux 0x36024ddf	dma_declare_coherent_memory
+EXPORT_SYMBOL vmlinux 0x36088d16	dev_unicast_unsync
+EXPORT_SYMBOL vmlinux 0x360b1afe	probe_irq_mask
+EXPORT_SYMBOL vmlinux 0x360dabd7	cfb_fillrect
+EXPORT_SYMBOL vmlinux 0x36187201	generic_file_splice_read
+EXPORT_SYMBOL vmlinux 0x362408ed	dm_table_get
+EXPORT_SYMBOL vmlinux 0x3649f490	dm_table_get_size
+EXPORT_SYMBOL vmlinux 0x3656bf5a	lock_kernel
+EXPORT_SYMBOL vmlinux 0x36630271	jbd2_journal_release_jbd_inode
+EXPORT_SYMBOL vmlinux 0x36875389	__timecompare_update
+EXPORT_SYMBOL vmlinux 0x36aaa0f1	dev_kfree_skb_irq
+EXPORT_SYMBOL vmlinux 0x36b7da17	tty_get_baud_rate
+EXPORT_SYMBOL vmlinux 0x36c0897a	tcp_mtup_init
+EXPORT_SYMBOL vmlinux 0x36c190bc	block_commit_write
+EXPORT_SYMBOL vmlinux 0x36e2fd84	gnet_stats_copy_app
+EXPORT_SYMBOL vmlinux 0x36fd351d	dmam_free_coherent
+EXPORT_SYMBOL vmlinux 0x3710091e	tty_driver_kref_put
+EXPORT_SYMBOL vmlinux 0x3711c4c1	ht_create_irq
+EXPORT_SYMBOL vmlinux 0x3744cf36	vmalloc_to_pfn
+EXPORT_SYMBOL vmlinux 0x374ed073	scnprintf
+EXPORT_SYMBOL vmlinux 0x375cce94	mmc_suspend_host
+EXPORT_SYMBOL vmlinux 0x3764e087	ps2_begin_command
+EXPORT_SYMBOL vmlinux 0x379d65f5	gen_pool_alloc
+EXPORT_SYMBOL vmlinux 0x37a46285	acpi_get_physical_device
+EXPORT_SYMBOL vmlinux 0x37befc70	jiffies_to_msecs
+EXPORT_SYMBOL vmlinux 0x37db8f19	dmi_get_date
+EXPORT_SYMBOL vmlinux 0x37e74642	get_jiffies_64
+EXPORT_SYMBOL vmlinux 0x37ee1cc9	elv_rb_former_request
+EXPORT_SYMBOL vmlinux 0x381c4bb1	cancel_delayed_work_sync
+EXPORT_SYMBOL vmlinux 0x3848a13d	read_cache_page_async
+EXPORT_SYMBOL vmlinux 0x38643598	netif_carrier_off
+EXPORT_SYMBOL vmlinux 0x388799f6	unregister_kmmio_probe
+EXPORT_SYMBOL vmlinux 0x388f9128	xfrm_state_walk_done
+EXPORT_SYMBOL vmlinux 0x389f8e7b	set_pages_uc
+EXPORT_SYMBOL vmlinux 0x38a6a01c	kmem_cache_free
+EXPORT_SYMBOL vmlinux 0x38b92846	llc_remove_pack
+EXPORT_SYMBOL vmlinux 0x38c19ea7	filemap_flush
+EXPORT_SYMBOL vmlinux 0x38cab31c	init_timer_deferrable_key
+EXPORT_SYMBOL vmlinux 0x38d006c7	km_policy_notify
+EXPORT_SYMBOL vmlinux 0x38f88bf7	pid_task
+EXPORT_SYMBOL vmlinux 0x390b9990	mem_map
+EXPORT_SYMBOL vmlinux 0x3923d495	fddi_type_trans
+EXPORT_SYMBOL vmlinux 0x3927733a	file_update_time
+EXPORT_SYMBOL vmlinux 0x393ddcbe	tcp4_gro_receive
+EXPORT_SYMBOL vmlinux 0x397843cf	journal_check_available_features
+EXPORT_SYMBOL vmlinux 0x3980aac1	unregister_reboot_notifier
+EXPORT_SYMBOL vmlinux 0x39abe3ab	fifo_create_dflt
+EXPORT_SYMBOL vmlinux 0x39d3bf45	napi_reuse_skb
+EXPORT_SYMBOL vmlinux 0x39e0db6e	remap_pfn_range
+EXPORT_SYMBOL vmlinux 0x39fbe317	input_grab_device
+EXPORT_SYMBOL vmlinux 0x3a2204c6	security_netlink_recv
+EXPORT_SYMBOL vmlinux 0x3a49d947	ilookup5_nowait
+EXPORT_SYMBOL vmlinux 0x3a4a346a	dev_disable_lro
+EXPORT_SYMBOL vmlinux 0x3a4da778	scsi_remove_host
+EXPORT_SYMBOL vmlinux 0x3a516d6c	udp_poll
+EXPORT_SYMBOL vmlinux 0x3a8dc214	skb_recycle_check
+EXPORT_SYMBOL vmlinux 0x3a9b6fb9	blk_unregister_region
+EXPORT_SYMBOL vmlinux 0x3aa1dbcf	_spin_unlock_bh
+EXPORT_SYMBOL vmlinux 0x3abbba27	scsi_print_sense
+EXPORT_SYMBOL vmlinux 0x3ac923e1	tcp_close
+EXPORT_SYMBOL vmlinux 0x3adc15b9	posix_acl_from_mode
+EXPORT_SYMBOL vmlinux 0x3add6325	vfs_create
+EXPORT_SYMBOL vmlinux 0x3ade2c69	scsi_calculate_bounce_limit
+EXPORT_SYMBOL vmlinux 0x3ae0d5c1	unregister_netdevice
+EXPORT_SYMBOL vmlinux 0x3ae831b6	kref_init
+EXPORT_SYMBOL vmlinux 0x3af97acf	registered_fb
+EXPORT_SYMBOL vmlinux 0x3af98f9e	ioremap_nocache
+EXPORT_SYMBOL vmlinux 0x3b293446	read_cache_pages
+EXPORT_SYMBOL vmlinux 0x3b3016d3	cpufreq_unregister_notifier
+EXPORT_SYMBOL vmlinux 0x3b815ec9	dma_find_channel
+EXPORT_SYMBOL vmlinux 0x3bb78130	set_current_groups
+EXPORT_SYMBOL vmlinux 0x3bba8eb2	sget
+EXPORT_SYMBOL vmlinux 0x3bd1b1f6	msecs_to_jiffies
+EXPORT_SYMBOL vmlinux 0x3be88a98	kernel_sock_ioctl
+EXPORT_SYMBOL vmlinux 0x3c29ad92	sock_rfree
+EXPORT_SYMBOL vmlinux 0x3c2c5af5	sprintf
+EXPORT_SYMBOL vmlinux 0x3c7227bf	complete_all
+EXPORT_SYMBOL vmlinux 0x3c769bd7	scsi_is_target_device
+EXPORT_SYMBOL vmlinux 0x3c8cdebd	register_md_personality
+EXPORT_SYMBOL vmlinux 0x3c9d1211	string_get_size
+EXPORT_SYMBOL vmlinux 0x3ca83229	unregister_sysctl_table
+EXPORT_SYMBOL vmlinux 0x3cb10026	__scsi_device_lookup
+EXPORT_SYMBOL vmlinux 0x3cb8fcf7	ethtool_op_set_tso
+EXPORT_SYMBOL vmlinux 0x3cc0a3bb	xfrm_spd_getinfo
+EXPORT_SYMBOL vmlinux 0x3cd19425	kernel_listen
+EXPORT_SYMBOL vmlinux 0x3ce4ca6f	disable_irq
+EXPORT_SYMBOL vmlinux 0x3d329378	mutex_unlock
+EXPORT_SYMBOL vmlinux 0x3d355c3b	pci_get_bus_and_slot
+EXPORT_SYMBOL vmlinux 0x3d5ae999	register_8022_client
+EXPORT_SYMBOL vmlinux 0x3d68bd4b	flow_cache_genid
+EXPORT_SYMBOL vmlinux 0x3d697e51	thaw_bdev
+EXPORT_SYMBOL vmlinux 0x3d7b7280	phy_disable_interrupts
+EXPORT_SYMBOL vmlinux 0x3d7c1ed7	msrs_alloc
+EXPORT_SYMBOL vmlinux 0x3d9995af	devm_free_irq
+EXPORT_SYMBOL vmlinux 0x3da171f9	pci_mem_start
+EXPORT_SYMBOL vmlinux 0x3da5eb6d	kfifo_alloc
+EXPORT_SYMBOL vmlinux 0x3daa69da	vfs_lstat
+EXPORT_SYMBOL vmlinux 0x3ddeff02	nf_hook_slow
+EXPORT_SYMBOL vmlinux 0x3e1f073d	wait_for_completion_timeout
+EXPORT_SYMBOL vmlinux 0x3e219de6	try_wait_for_completion
+EXPORT_SYMBOL vmlinux 0x3e2ae3a8	acpi_release_global_lock
+EXPORT_SYMBOL vmlinux 0x3e383385	nf_hooks
+EXPORT_SYMBOL vmlinux 0x3e418a0b	nf_log_bind_pf
+EXPORT_SYMBOL vmlinux 0x3e45e9ff	register_inetaddr_notifier
+EXPORT_SYMBOL vmlinux 0x3e4cb5f6	bitmap_close_sync
+EXPORT_SYMBOL vmlinux 0x3e853e5e	bio_uncopy_user
+EXPORT_SYMBOL vmlinux 0x3e899c9d	blk_limits_io_min
+EXPORT_SYMBOL vmlinux 0x3ea55ac3	inet_addr_type
+EXPORT_SYMBOL vmlinux 0x3eb12dc5	skb_split
+EXPORT_SYMBOL vmlinux 0x3eb39257	key_instantiate_and_link
+EXPORT_SYMBOL vmlinux 0x3ec1d14e	tcf_hash_destroy
+EXPORT_SYMBOL vmlinux 0x3ed25809	napi_skb_finish
+EXPORT_SYMBOL vmlinux 0x3ed63055	zlib_inflateReset
+EXPORT_SYMBOL vmlinux 0x3ee1e6df	sock_init_data
+EXPORT_SYMBOL vmlinux 0x3f0546a8	ioread32_rep
+EXPORT_SYMBOL vmlinux 0x3f1899f1	up
+EXPORT_SYMBOL vmlinux 0x3f3a213a	tcp_initialize_rcv_mss
+EXPORT_SYMBOL vmlinux 0x3f4547a7	put_unused_fd
+EXPORT_SYMBOL vmlinux 0x3f46fdc5	submit_bio
+EXPORT_SYMBOL vmlinux 0x3f65f492	journal_dirty_metadata
+EXPORT_SYMBOL vmlinux 0x3fa6b7fa	pipe_unlock
+EXPORT_SYMBOL vmlinux 0x3fc67fd3	__serio_register_driver
+EXPORT_SYMBOL vmlinux 0x3fde2450	bdev_stack_limits
+EXPORT_SYMBOL vmlinux 0x3fea5f98	dev_addr_add
+EXPORT_SYMBOL vmlinux 0x3feec9fc	dev_addr_add_multiple
+EXPORT_SYMBOL vmlinux 0x3ff62317	local_bh_disable
+EXPORT_SYMBOL vmlinux 0x3ffe7752	end_buffer_write_sync
+EXPORT_SYMBOL vmlinux 0x402a844b	unregister_sysrq_key
+EXPORT_SYMBOL vmlinux 0x402ea9c2	bioset_free
+EXPORT_SYMBOL vmlinux 0x404d773c	thermal_zone_device_update
+EXPORT_SYMBOL vmlinux 0x4059792f	print_hex_dump
+EXPORT_SYMBOL vmlinux 0x405c1144	get_seconds
+EXPORT_SYMBOL vmlinux 0x40616dd6	security_sb_clone_mnt_opts
+EXPORT_SYMBOL vmlinux 0x407a39d9	kmap_atomic_to_page
+EXPORT_SYMBOL vmlinux 0x4097fa45	acpi_read_bit_register
+EXPORT_SYMBOL vmlinux 0x409873e3	tty_termios_baud_rate
+EXPORT_SYMBOL vmlinux 0x40a27c37	scsi_dev_info_remove_list
+EXPORT_SYMBOL vmlinux 0x40bfc3a4	no_llseek
+EXPORT_SYMBOL vmlinux 0x40c89d46	acpi_get_table_by_index
+EXPORT_SYMBOL vmlinux 0x40c9efc1	pci_unmap_rom
+EXPORT_SYMBOL vmlinux 0x40d6b5c4	bdi_set_max_ratio
+EXPORT_SYMBOL vmlinux 0x4101bbde	param_set_copystring
+EXPORT_SYMBOL vmlinux 0x4104e04f	vlan_dev_real_dev
+EXPORT_SYMBOL vmlinux 0x4108e69a	fb_match_mode
+EXPORT_SYMBOL vmlinux 0x41166725	inet_frags_init_net
+EXPORT_SYMBOL vmlinux 0x41344088	param_get_charp
+EXPORT_SYMBOL vmlinux 0x41482d8b	strndup_user
+EXPORT_SYMBOL vmlinux 0x414cc80c	cmpxchg8b_emu
+EXPORT_SYMBOL vmlinux 0x416983d9	netdev_fix_features
+EXPORT_SYMBOL vmlinux 0x416ab824	mpage_readpage
+EXPORT_SYMBOL vmlinux 0x4185cf4b	radix_tree_lookup_slot
+EXPORT_SYMBOL vmlinux 0x4188d439	neigh_rand_reach_time
+EXPORT_SYMBOL vmlinux 0x418f0ca8	scsi_scan_host
+EXPORT_SYMBOL vmlinux 0x41a5a31d	mb_cache_entry_find_first
+EXPORT_SYMBOL vmlinux 0x41a9c68d	_spin_trylock_bh
+EXPORT_SYMBOL vmlinux 0x41d99052	dm_get_mapinfo
+EXPORT_SYMBOL vmlinux 0x42081715	xfrm4_prepare_output
+EXPORT_SYMBOL vmlinux 0x4211c3c1	zlib_inflateInit2
+EXPORT_SYMBOL vmlinux 0x42139ef1	seq_printf
+EXPORT_SYMBOL vmlinux 0x42224298	sscanf
+EXPORT_SYMBOL vmlinux 0x422ea446	tty_port_close_start
+EXPORT_SYMBOL vmlinux 0x424a1f56	scsi_bios_ptable
+EXPORT_SYMBOL vmlinux 0x42595e58	vgacon_text_force
+EXPORT_SYMBOL vmlinux 0x42686035	inode_sub_rsv_space
+EXPORT_SYMBOL vmlinux 0x4292364c	schedule
+EXPORT_SYMBOL vmlinux 0x42ad2bab	elevator_exit
+EXPORT_SYMBOL vmlinux 0x42d47ad5	phy_attach
+EXPORT_SYMBOL vmlinux 0x42debf43	iget_locked
+EXPORT_SYMBOL vmlinux 0x4302d0eb	free_pages
+EXPORT_SYMBOL vmlinux 0x4309a4e4	pci_wake_from_d3
+EXPORT_SYMBOL vmlinux 0x430f93ce	km_new_mapping
+EXPORT_SYMBOL vmlinux 0x43130882	input_free_device
+EXPORT_SYMBOL vmlinux 0x4333eadb	param_set_short
+EXPORT_SYMBOL vmlinux 0x43385ad9	acpi_pci_unregister_driver
+EXPORT_SYMBOL vmlinux 0x434fa55c	release_console_sem
+EXPORT_SYMBOL vmlinux 0x436c2179	iowrite32
+EXPORT_SYMBOL vmlinux 0x43750d13	__blk_end_request_all
+EXPORT_SYMBOL vmlinux 0x4385be3b	gnet_stats_copy_queue
+EXPORT_SYMBOL vmlinux 0x439ad34d	sock_wmalloc
+EXPORT_SYMBOL vmlinux 0x439f5478	neigh_seq_start
+EXPORT_SYMBOL vmlinux 0x43ab66c3	param_array_get
+EXPORT_SYMBOL vmlinux 0x44161c19	unregister_shrinker
+EXPORT_SYMBOL vmlinux 0x44314efb	radix_tree_gang_lookup_tag_slot
+EXPORT_SYMBOL vmlinux 0x444779c4	nla_find
+EXPORT_SYMBOL vmlinux 0x44713466	scsi_device_get
+EXPORT_SYMBOL vmlinux 0x44aaf30f	tsc_khz
+EXPORT_SYMBOL vmlinux 0x44b911c3	rb_replace_node
+EXPORT_SYMBOL vmlinux 0x44cc6f8c	bd_release
+EXPORT_SYMBOL vmlinux 0x44e9a829	match_token
+EXPORT_SYMBOL vmlinux 0x44ef06c0	blk_rq_map_integrity_sg
+EXPORT_SYMBOL vmlinux 0x44f21bea	idr_for_each
+EXPORT_SYMBOL vmlinux 0x44fdc5dc	__blk_end_request_cur
+EXPORT_SYMBOL vmlinux 0x453c8403	pci_msi_enabled
+EXPORT_SYMBOL vmlinux 0x4540fbe7	truncate_inode_pages
+EXPORT_SYMBOL vmlinux 0x45450063	mod_timer
+EXPORT_SYMBOL vmlinux 0x4550ba8a	register_cpu_notifier
+EXPORT_SYMBOL vmlinux 0x45519db6	sock_sendmsg
+EXPORT_SYMBOL vmlinux 0x4574cf41	tty_check_change
+EXPORT_SYMBOL vmlinux 0x4575315d	utf8s_to_utf16s
+EXPORT_SYMBOL vmlinux 0x4578447d	vfs_fsync_range
+EXPORT_SYMBOL vmlinux 0x45947727	param_array_set
+EXPORT_SYMBOL vmlinux 0x45c64c81	phy_ethtool_gset
+EXPORT_SYMBOL vmlinux 0x45d11c43	down_interruptible
+EXPORT_SYMBOL vmlinux 0x45d55543	down_write
+EXPORT_SYMBOL vmlinux 0x45f53aca	file_permission
+EXPORT_SYMBOL vmlinux 0x46008ef9	otg_put_transceiver
+EXPORT_SYMBOL vmlinux 0x46085e4f	add_timer
+EXPORT_SYMBOL vmlinux 0x462a2e75	match_strlcpy
+EXPORT_SYMBOL vmlinux 0x46468623	kill_anon_super
+EXPORT_SYMBOL vmlinux 0x46543f29	mmc_wait_for_req
+EXPORT_SYMBOL vmlinux 0x466b7b68	page_readlink
+EXPORT_SYMBOL vmlinux 0x466c14a7	__delay
+EXPORT_SYMBOL vmlinux 0x469ebd04	tcf_em_tree_validate
+EXPORT_SYMBOL vmlinux 0x46a7270e	register_cdrom
+EXPORT_SYMBOL vmlinux 0x46a77903	napi_get_frags
+EXPORT_SYMBOL vmlinux 0x46a9a5c3	hippi_type_trans
+EXPORT_SYMBOL vmlinux 0x46be697d	phy_connect
+EXPORT_SYMBOL vmlinux 0x46cdee2d	vm_insert_mixed
+EXPORT_SYMBOL vmlinux 0x472d2a9a	radix_tree_lookup
+EXPORT_SYMBOL vmlinux 0x474f421e	mark_buffer_dirty
+EXPORT_SYMBOL vmlinux 0x475100c2	inet_get_local_port_range
+EXPORT_SYMBOL vmlinux 0x475f010b	acpi_purge_cached_objects
+EXPORT_SYMBOL vmlinux 0x4766edb5	call_usermodehelper_exec
+EXPORT_SYMBOL vmlinux 0x477bc92c	bio_integrity_trim
+EXPORT_SYMBOL vmlinux 0x478a8f0e	locks_copy_lock
+EXPORT_SYMBOL vmlinux 0x478d10b2	ht_destroy_irq
+EXPORT_SYMBOL vmlinux 0x479c3c86	find_next_zero_bit
+EXPORT_SYMBOL vmlinux 0x47d53471	bio_clone
+EXPORT_SYMBOL vmlinux 0x47de4025	dm_table_get_md
+EXPORT_SYMBOL vmlinux 0x4814ac60	generic_cont_expand_simple
+EXPORT_SYMBOL vmlinux 0x48193639	acpi_lid_open
+EXPORT_SYMBOL vmlinux 0x481cb9ab	acpi_enter_sleep_state_prep
+EXPORT_SYMBOL vmlinux 0x48588d77	pci_back_from_sleep
+EXPORT_SYMBOL vmlinux 0x4859b8bb	rtc_year_days
+EXPORT_SYMBOL vmlinux 0x486b6407	hweight64
+EXPORT_SYMBOL vmlinux 0x4877dbe4	pci_clear_mwi
+EXPORT_SYMBOL vmlinux 0x48acc0c4	alloc_file
+EXPORT_SYMBOL vmlinux 0x48b3520d	block_page_mkwrite
+EXPORT_SYMBOL vmlinux 0x48d64c30	skb_insert
+EXPORT_SYMBOL vmlinux 0x48d9e09e	kobject_init
+EXPORT_SYMBOL vmlinux 0x48f0f9a6	dquot_alloc
+EXPORT_SYMBOL vmlinux 0x4903d125	audit_log_format
+EXPORT_SYMBOL vmlinux 0x49439411	genl_unregister_family
+EXPORT_SYMBOL vmlinux 0x494e3393	vm_get_page_prot
+EXPORT_SYMBOL vmlinux 0x49603fb8	security_sb_copy_data
+EXPORT_SYMBOL vmlinux 0x497fecb5	netif_rx_ni
+EXPORT_SYMBOL vmlinux 0x499dfbc8	netlink_broadcast
+EXPORT_SYMBOL vmlinux 0x49b05f83	bh_uptodate_or_lock
+EXPORT_SYMBOL vmlinux 0x49b255a1	generic_write_end
+EXPORT_SYMBOL vmlinux 0x49da9a9a	_read_unlock_bh
+EXPORT_SYMBOL vmlinux 0x49e182c0	param_get_string
+EXPORT_SYMBOL vmlinux 0x4a001840	journal_try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0x4a358252	__bitmap_subset
+EXPORT_SYMBOL vmlinux 0x4a60133a	sb_set_blocksize
+EXPORT_SYMBOL vmlinux 0x4a900c52	netdev_rx_csum_fault
+EXPORT_SYMBOL vmlinux 0x4a971ec7	radix_tree_delete
+EXPORT_SYMBOL vmlinux 0x4ade9a8e	bdi_unregister
+EXPORT_SYMBOL vmlinux 0x4afa3931	ppp_input
+EXPORT_SYMBOL vmlinux 0x4afe9a77	scsi_partsize
+EXPORT_SYMBOL vmlinux 0x4b032dc3	journal_blocks_per_page
+EXPORT_SYMBOL vmlinux 0x4b07e779	_spin_unlock_irqrestore
+EXPORT_SYMBOL vmlinux 0x4b30872a	simple_dir_operations
+EXPORT_SYMBOL vmlinux 0x4b34fbf5	block_all_signals
+EXPORT_SYMBOL vmlinux 0x4b359cb7	gnet_stats_start_copy_compat
+EXPORT_SYMBOL vmlinux 0x4b8d21ee	tcf_hash_lookup
+EXPORT_SYMBOL vmlinux 0x4bb850f1	kernel_bind
+EXPORT_SYMBOL vmlinux 0x4bbc3e5f	pm_flags
+EXPORT_SYMBOL vmlinux 0x4bc0e22b	arp_broken_ops
+EXPORT_SYMBOL vmlinux 0x4bf9691a	uart_resume_port
+EXPORT_SYMBOL vmlinux 0x4bfee15a	atomic64_set
+EXPORT_SYMBOL vmlinux 0x4c04240b	acpi_device_hid
+EXPORT_SYMBOL vmlinux 0x4c0ebb32	bio_integrity_enabled
+EXPORT_SYMBOL vmlinux 0x4c1182cb	bitmap_scnprintf
+EXPORT_SYMBOL vmlinux 0x4c1b965c	gen_replace_estimator
+EXPORT_SYMBOL vmlinux 0x4c2fe50b	lookup_bdev
+EXPORT_SYMBOL vmlinux 0x4c36872f	icmp_send
+EXPORT_SYMBOL vmlinux 0x4c6c491c	scsi_adjust_queue_depth
+EXPORT_SYMBOL vmlinux 0x4c6e6573	delayed_slow_work_enqueue
+EXPORT_SYMBOL vmlinux 0x4c9c8fe0	__generic_file_aio_write
+EXPORT_SYMBOL vmlinux 0x4cbbd171	__bitmap_weight
+EXPORT_SYMBOL vmlinux 0x4cbc2225	tcf_em_tree_destroy
+EXPORT_SYMBOL vmlinux 0x4cc4245a	bio_unmap_user
+EXPORT_SYMBOL vmlinux 0x4d2640ce	xrlim_allow
+EXPORT_SYMBOL vmlinux 0x4d267a5d	lro_vlan_hwaccel_receive_frags
+EXPORT_SYMBOL vmlinux 0x4d282d12	simple_sync_file
+EXPORT_SYMBOL vmlinux 0x4d39b3d7	__insert_inode_hash
+EXPORT_SYMBOL vmlinux 0x4d3c153f	sigprocmask
+EXPORT_SYMBOL vmlinux 0x4d560ecc	elv_abort_queue
+EXPORT_SYMBOL vmlinux 0x4d90ce9b	jbd2_journal_release_buffer
+EXPORT_SYMBOL vmlinux 0x4dc45be9	nf_log_unbind_pf
+EXPORT_SYMBOL vmlinux 0x4dd3b698	do_splice_from
+EXPORT_SYMBOL vmlinux 0x4df119fa	__bitmap_parse
+EXPORT_SYMBOL vmlinux 0x4e069249	security_tun_dev_post_create
+EXPORT_SYMBOL vmlinux 0x4e084210	qdisc_watchdog_schedule
+EXPORT_SYMBOL vmlinux 0x4e0a6c5a	pci_enable_wake
+EXPORT_SYMBOL vmlinux 0x4e0c2cf6	set_device_ro
+EXPORT_SYMBOL vmlinux 0x4e0e2c4b	start_tty
+EXPORT_SYMBOL vmlinux 0x4e199b79	iw_handler_set_thrspy
+EXPORT_SYMBOL vmlinux 0x4e30ead4	input_register_handle
+EXPORT_SYMBOL vmlinux 0x4e3567f7	match_int
+EXPORT_SYMBOL vmlinux 0x4e413e46	generic_file_mmap
+EXPORT_SYMBOL vmlinux 0x4e549cd8	page_address
+EXPORT_SYMBOL vmlinux 0x4e5ea693	tcp_read_sock
+EXPORT_SYMBOL vmlinux 0x4e6e8ea7	fg_console
+EXPORT_SYMBOL vmlinux 0x4e70cb73	get_sb_pseudo
+EXPORT_SYMBOL vmlinux 0x4e7ad56b	security_path_mknod
+EXPORT_SYMBOL vmlinux 0x4e81d3ed	thermal_zone_unbind_cooling_device
+EXPORT_SYMBOL vmlinux 0x4e830a3e	strnicmp
+EXPORT_SYMBOL vmlinux 0x4e901284	netif_napi_add
+EXPORT_SYMBOL vmlinux 0x4e90f967	seq_escape
+EXPORT_SYMBOL vmlinux 0x4ebf4d2d	d_alloc_root
+EXPORT_SYMBOL vmlinux 0x4ec457c9	user_revoke
+EXPORT_SYMBOL vmlinux 0x4ed58d6a	bioset_integrity_free
+EXPORT_SYMBOL vmlinux 0x4ee76065	cpufreq_get_policy
+EXPORT_SYMBOL vmlinux 0x4ef7a5f3	sk_send_sigurg
+EXPORT_SYMBOL vmlinux 0x4f0bc4d5	release_firmware
+EXPORT_SYMBOL vmlinux 0x4f11f422	scsi_block_when_processing_errors
+EXPORT_SYMBOL vmlinux 0x4f1cd128	security_tun_dev_create
+EXPORT_SYMBOL vmlinux 0x4f274221	__devm_request_region
+EXPORT_SYMBOL vmlinux 0x4f4133e9	dqget
+EXPORT_SYMBOL vmlinux 0x4f476e96	init_cdrom_command
+EXPORT_SYMBOL vmlinux 0x4f5438c1	idle_halt
+EXPORT_SYMBOL vmlinux 0x4f6fa67d	console_stop
+EXPORT_SYMBOL vmlinux 0x4f783f30	acpi_read
+EXPORT_SYMBOL vmlinux 0x4fa45274	xfrm_policy_byid
+EXPORT_SYMBOL vmlinux 0x4fc61552	netpoll_cleanup
+EXPORT_SYMBOL vmlinux 0x4fd1289c	bio_integrity_get_tag
+EXPORT_SYMBOL vmlinux 0x4fdee897	i8042_command
+EXPORT_SYMBOL vmlinux 0x4fef81f5	genlmsg_multicast_allns
+EXPORT_SYMBOL vmlinux 0x50192399	__pagevec_release
+EXPORT_SYMBOL vmlinux 0x50211ee3	tcp_free_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x502ac98b	__xfrm_lookup
+EXPORT_SYMBOL vmlinux 0x504c44d3	dev_trans_start
+EXPORT_SYMBOL vmlinux 0x504e8701	sock_tx_timestamp
+EXPORT_SYMBOL vmlinux 0x506746b6	getrawmonotonic
+EXPORT_SYMBOL vmlinux 0x507a5228	seq_open_private
+EXPORT_SYMBOL vmlinux 0x5081a33d	jbd2_journal_wipe
+EXPORT_SYMBOL vmlinux 0x50bdd470	boot_cpu_data
+EXPORT_SYMBOL vmlinux 0x50c39d9e	dmam_free_noncoherent
+EXPORT_SYMBOL vmlinux 0x50ceb3d9	simple_dir_inode_operations
+EXPORT_SYMBOL vmlinux 0x50da6260	scsi_nonblockable_ioctl
+EXPORT_SYMBOL vmlinux 0x50dff344	pci_find_next_bus
+EXPORT_SYMBOL vmlinux 0x50e2bb06	log_start_commit
+EXPORT_SYMBOL vmlinux 0x5118c382	secure_dccp_sequence_number
+EXPORT_SYMBOL vmlinux 0x5140832b	set_groups
+EXPORT_SYMBOL vmlinux 0x5148f135	skb_store_bits
+EXPORT_SYMBOL vmlinux 0x5149f2a8	jbd2_journal_destroy
+EXPORT_SYMBOL vmlinux 0x5152e605	memcmp
+EXPORT_SYMBOL vmlinux 0x51668329	dcache_readdir
+EXPORT_SYMBOL vmlinux 0x51710ef8	journal_stop
+EXPORT_SYMBOL vmlinux 0x517c5fca	blk_peek_request
+EXPORT_SYMBOL vmlinux 0x517fe3e6	scsi_mode_sense
+EXPORT_SYMBOL vmlinux 0x51812be3	pnp_unregister_card_driver
+EXPORT_SYMBOL vmlinux 0x5186518f	profile_pc
+EXPORT_SYMBOL vmlinux 0x5197127e	elv_rb_del
+EXPORT_SYMBOL vmlinux 0x51a6601f	jbd2_journal_clear_err
+EXPORT_SYMBOL vmlinux 0x51b60db5	blk_queue_segment_boundary
+EXPORT_SYMBOL vmlinux 0x51c9cd1e	inode_setattr
+EXPORT_SYMBOL vmlinux 0x51d12d4e	acpi_pci_disabled
+EXPORT_SYMBOL vmlinux 0x51dce73b	xfrm_state_walk_init
+EXPORT_SYMBOL vmlinux 0x51e6fd34	tty_unregister_device
+EXPORT_SYMBOL vmlinux 0x51ef056e	journal_init_dev
+EXPORT_SYMBOL vmlinux 0x51ef33b8	kstrndup
+EXPORT_SYMBOL vmlinux 0x51f33912	nf_log_packet
+EXPORT_SYMBOL vmlinux 0x52026cdf	security_sb_parse_opts_str
+EXPORT_SYMBOL vmlinux 0x52095e19	acpi_get_data
+EXPORT_SYMBOL vmlinux 0x5236f169	block_prepare_write
+EXPORT_SYMBOL vmlinux 0x526b3b6c	nlmsg_notify
+EXPORT_SYMBOL vmlinux 0x52760ca9	getnstimeofday
+EXPORT_SYMBOL vmlinux 0x528bfc74	vga_client_register
+EXPORT_SYMBOL vmlinux 0x528c709d	simple_read_from_buffer
+EXPORT_SYMBOL vmlinux 0x52a58c24	ifla_policy
+EXPORT_SYMBOL vmlinux 0x52afa9f2	qdisc_destroy
+EXPORT_SYMBOL vmlinux 0x52bfc0da	pci_choose_state
+EXPORT_SYMBOL vmlinux 0x52c80be8	sock_create_lite
+EXPORT_SYMBOL vmlinux 0x52d7b2fd	llc_sap_list
+EXPORT_SYMBOL vmlinux 0x52ebb126	param_get_ushort
+EXPORT_SYMBOL vmlinux 0x530b1e4c	rdmsr_on_cpus
+EXPORT_SYMBOL vmlinux 0x530b1e98	pm_suspend
+EXPORT_SYMBOL vmlinux 0x53117f02	bio_free
+EXPORT_SYMBOL vmlinux 0x53197252	journal_abort
+EXPORT_SYMBOL vmlinux 0x531b604e	__virt_addr_valid
+EXPORT_SYMBOL vmlinux 0x532a3b61	rfkill_blocked
+EXPORT_SYMBOL vmlinux 0x532b9db0	tty_unthrottle
+EXPORT_SYMBOL vmlinux 0x53326531	mempool_alloc_pages
+EXPORT_SYMBOL vmlinux 0x5338c127	dev_load
+EXPORT_SYMBOL vmlinux 0x533c8c53	prepare_creds
+EXPORT_SYMBOL vmlinux 0x536bd500	lock_fb_info
+EXPORT_SYMBOL vmlinux 0x538383c0	unregister_inet6addr_notifier
+EXPORT_SYMBOL vmlinux 0x539856e1	load_nls
+EXPORT_SYMBOL vmlinux 0x53a8e462	splice_from_pipe_next
+EXPORT_SYMBOL vmlinux 0x53c0767c	sk_chk_filter
+EXPORT_SYMBOL vmlinux 0x53d7bad2	__register_chrdev
+EXPORT_SYMBOL vmlinux 0x53eef539	fb_is_primary_device
+EXPORT_SYMBOL vmlinux 0x540a5e1c	netlink_kernel_release
+EXPORT_SYMBOL vmlinux 0x541dfef4	atomic64_inc
+EXPORT_SYMBOL vmlinux 0x54290dc9	nla_validate
+EXPORT_SYMBOL vmlinux 0x544b3e87	isapnp_protocol
+EXPORT_SYMBOL vmlinux 0x54542f67	mca_device_set_name
+EXPORT_SYMBOL vmlinux 0x546a3a49	cfb_imageblit
+EXPORT_SYMBOL vmlinux 0x54743c98	fasync_helper
+EXPORT_SYMBOL vmlinux 0x54935666	acpi_os_read_port
+EXPORT_SYMBOL vmlinux 0x54988266	sb_min_blocksize
+EXPORT_SYMBOL vmlinux 0x54a6d074	atomic64_dec
+EXPORT_SYMBOL vmlinux 0x54c66973	blk_end_request
+EXPORT_SYMBOL vmlinux 0x54d9385f	filp_close
+EXPORT_SYMBOL vmlinux 0x54e6fcdd	net_enable_timestamp
+EXPORT_SYMBOL vmlinux 0x5594be03	bitmap_remap
+EXPORT_SYMBOL vmlinux 0x55aeced9	ppp_channel_index
+EXPORT_SYMBOL vmlinux 0x55b3133e	dma_release_from_coherent
+EXPORT_SYMBOL vmlinux 0x55c623c6	blk_queue_bounce_limit
+EXPORT_SYMBOL vmlinux 0x55c98771	ip_cmsg_recv
+EXPORT_SYMBOL vmlinux 0x55d30039	bdevname
+EXPORT_SYMBOL vmlinux 0x55d9c302	block_read_full_page
+EXPORT_SYMBOL vmlinux 0x55fe8272	d_prune_aliases
+EXPORT_SYMBOL vmlinux 0x5600904f	fb_get_color_depth
+EXPORT_SYMBOL vmlinux 0x5603cf43	do_settimeofday
+EXPORT_SYMBOL vmlinux 0x5608d2f0	input_unregister_device
+EXPORT_SYMBOL vmlinux 0x5614b010	xfrm_policy_walk_done
+EXPORT_SYMBOL vmlinux 0x561f67fc	blk_alloc_queue_node
+EXPORT_SYMBOL vmlinux 0x5635a60a	vmalloc_user
+EXPORT_SYMBOL vmlinux 0x5646f13a	__skb_warn_lro_forwarding
+EXPORT_SYMBOL vmlinux 0x56586183	console_start
+EXPORT_SYMBOL vmlinux 0x56650b4e	inet_del_protocol
+EXPORT_SYMBOL vmlinux 0x566564ac	mca_device_set_claim
+EXPORT_SYMBOL vmlinux 0x56a038b9	pci_request_regions
+EXPORT_SYMBOL vmlinux 0x56b310bf	dev_get_by_index
+EXPORT_SYMBOL vmlinux 0x56c8799d	scsi_kunmap_atomic_sg
+EXPORT_SYMBOL vmlinux 0x56cc21b9	pagecache_write_end
+EXPORT_SYMBOL vmlinux 0x56d2e5e5	__dev_get_by_name
+EXPORT_SYMBOL vmlinux 0x56dc4815	vfs_mkdir
+EXPORT_SYMBOL vmlinux 0x56df5a59	mmc_regulator_set_ocr
+EXPORT_SYMBOL vmlinux 0x56eb07a5	pcix_get_mmrbc
+EXPORT_SYMBOL vmlinux 0x56eee6e0	vga_set_legacy_decoding
+EXPORT_SYMBOL vmlinux 0x56f00fb0	pci_bus_read_config_word
+EXPORT_SYMBOL vmlinux 0x56f494e0	smp_call_function
+EXPORT_SYMBOL vmlinux 0x5705fffd	md_write_start
+EXPORT_SYMBOL vmlinux 0x5722cc09	get_sb_single
+EXPORT_SYMBOL vmlinux 0x572e85d4	blk_lookup_devt
+EXPORT_SYMBOL vmlinux 0x5732d665	fget
+EXPORT_SYMBOL vmlinux 0x57440c5e	xfrm6_rcv
+EXPORT_SYMBOL vmlinux 0x57575f08	dmaengine_put
+EXPORT_SYMBOL vmlinux 0x57774aab	make_bad_inode
+EXPORT_SYMBOL vmlinux 0x57821547	blk_make_request
+EXPORT_SYMBOL vmlinux 0x579e5bc3	default_file_splice_read
+EXPORT_SYMBOL vmlinux 0x579fbcd2	cpu_possible_mask
+EXPORT_SYMBOL vmlinux 0x57a6504e	vsnprintf
+EXPORT_SYMBOL vmlinux 0x57adf756	per_cpu__this_cpu_off
+EXPORT_SYMBOL vmlinux 0x57af7c46	pci_bus_alloc_resource
+EXPORT_SYMBOL vmlinux 0x57b1f6e4	pv_cpu_ops
+EXPORT_SYMBOL vmlinux 0x57b57ebe	jiffies_to_timespec
+EXPORT_SYMBOL vmlinux 0x57db7242	mangle_path
+EXPORT_SYMBOL vmlinux 0x58115039	slow_work_cancel
+EXPORT_SYMBOL vmlinux 0x581de6a9	i2c_smbus_read_byte
+EXPORT_SYMBOL vmlinux 0x5828cc86	pci_request_regions_exclusive
+EXPORT_SYMBOL vmlinux 0x5834afb3	mdiobus_write
+EXPORT_SYMBOL vmlinux 0x5838f6c9	rtc_valid_tm
+EXPORT_SYMBOL vmlinux 0x58398508	nobh_writepage
+EXPORT_SYMBOL vmlinux 0x584738f9	rdmsr_safe_on_cpu
+EXPORT_SYMBOL vmlinux 0x5857b225	ioread16_rep
+EXPORT_SYMBOL vmlinux 0x5857e434	groups_free
+EXPORT_SYMBOL vmlinux 0x5859b1a7	seq_bitmap
+EXPORT_SYMBOL vmlinux 0x585eb114	mmc_card_sleep
+EXPORT_SYMBOL vmlinux 0x5870ff40	__blockdev_direct_IO
+EXPORT_SYMBOL vmlinux 0x58a9a74e	get_sb_ns
+EXPORT_SYMBOL vmlinux 0x58b090cb	lock_super
+EXPORT_SYMBOL vmlinux 0x58bb673c	sk_free
+EXPORT_SYMBOL vmlinux 0x58e0ce11	udp_flush_pending_frames
+EXPORT_SYMBOL vmlinux 0x58f473ec	pci_add_new_bus
+EXPORT_SYMBOL vmlinux 0x58fd72b3	ip_route_me_harder
+EXPORT_SYMBOL vmlinux 0x58fef6f8	ist_info
+EXPORT_SYMBOL vmlinux 0x5934392b	fb_register_client
+EXPORT_SYMBOL vmlinux 0x594bf15b	ioport_map
+EXPORT_SYMBOL vmlinux 0x5960a650	scsi_device_quiesce
+EXPORT_SYMBOL vmlinux 0x5964afbc	inet_add_protocol
+EXPORT_SYMBOL vmlinux 0x59b3ffae	cdrom_release
+EXPORT_SYMBOL vmlinux 0x59bc9609	acpi_write_bit_register
+EXPORT_SYMBOL vmlinux 0x59c5e9a0	vfs_dq_quota_on_remount
+EXPORT_SYMBOL vmlinux 0x59d696b6	register_module_notifier
+EXPORT_SYMBOL vmlinux 0x59d8223a	ioport_resource
+EXPORT_SYMBOL vmlinux 0x5a0805a9	nf_register_queue_handler
+EXPORT_SYMBOL vmlinux 0x5a22d54e	inet_shutdown
+EXPORT_SYMBOL vmlinux 0x5a274366	dev_mc_sync
+EXPORT_SYMBOL vmlinux 0x5a287afc	mb_cache_create
+EXPORT_SYMBOL vmlinux 0x5a3f5c66	tcf_exts_dump_stats
+EXPORT_SYMBOL vmlinux 0x5a4896a8	__put_user_2
+EXPORT_SYMBOL vmlinux 0x5a57d155	__percpu_counter_init
+EXPORT_SYMBOL vmlinux 0x5a5c1194	lock_may_read
+EXPORT_SYMBOL vmlinux 0x5a71c326	input_event
+EXPORT_SYMBOL vmlinux 0x5a744b86	netlink_set_nonroot
+EXPORT_SYMBOL vmlinux 0x5a7c40d1	journal_extend
+EXPORT_SYMBOL vmlinux 0x5aac16cc	skb_seq_read
+EXPORT_SYMBOL vmlinux 0x5ab1664f	tcp_make_synack
+EXPORT_SYMBOL vmlinux 0x5ac376a5	acpi_install_fixed_event_handler
+EXPORT_SYMBOL vmlinux 0x5ad429c3	skb_append
+EXPORT_SYMBOL vmlinux 0x5aee9338	xfrm_state_walk
+EXPORT_SYMBOL vmlinux 0x5af0b6bf	page_symlink_inode_operations
+EXPORT_SYMBOL vmlinux 0x5b19634d	div_s64_rem
+EXPORT_SYMBOL vmlinux 0x5b1e52f1	journal_check_used_features
+EXPORT_SYMBOL vmlinux 0x5b1f2957	sock_setsockopt
+EXPORT_SYMBOL vmlinux 0x5b2ee994	blk_init_queue_node
+EXPORT_SYMBOL vmlinux 0x5b3b0699	d_invalidate
+EXPORT_SYMBOL vmlinux 0x5b4c573e	task_tgid_nr_ns
+EXPORT_SYMBOL vmlinux 0x5b51c6a7	acpi_walk_resources
+EXPORT_SYMBOL vmlinux 0x5b72c53a	arp_xmit
+EXPORT_SYMBOL vmlinux 0x5b9e01de	vga_put
+EXPORT_SYMBOL vmlinux 0x5ba0eab2	block_is_partially_uptodate
+EXPORT_SYMBOL vmlinux 0x5bc8a155	security_path_link
+EXPORT_SYMBOL vmlinux 0x5bcd035a	blk_queue_dma_alignment
+EXPORT_SYMBOL vmlinux 0x5be02196	tty_port_close_end
+EXPORT_SYMBOL vmlinux 0x5bfaae73	pci_match_id
+EXPORT_SYMBOL vmlinux 0x5c121671	tcp_rcv_established
+EXPORT_SYMBOL vmlinux 0x5c21a9d0	scsi_add_host_with_dma
+EXPORT_SYMBOL vmlinux 0x5c265cba	sg_init_one
+EXPORT_SYMBOL vmlinux 0x5c2d4946	set_bh_page
+EXPORT_SYMBOL vmlinux 0x5c4df2bf	vfs_get_dqblk
+EXPORT_SYMBOL vmlinux 0x5c68705b	mca_read_pos
+EXPORT_SYMBOL vmlinux 0x5c71f59a	blk_rq_map_user_iov
+EXPORT_SYMBOL vmlinux 0x5cc1be16	mutex_lock_killable
+EXPORT_SYMBOL vmlinux 0x5cc469e0	tcp_getsockopt
+EXPORT_SYMBOL vmlinux 0x5cc5ec23	sock_alloc_send_skb
+EXPORT_SYMBOL vmlinux 0x5cf6738d	netif_receive_skb
+EXPORT_SYMBOL vmlinux 0x5d12b3fc	twl4030_i2c_write_u8
+EXPORT_SYMBOL vmlinux 0x5d2186d2	key_payload_reserve
+EXPORT_SYMBOL vmlinux 0x5d28351a	i2c_smbus_process_call
+EXPORT_SYMBOL vmlinux 0x5d4786d4	uart_get_baud_rate
+EXPORT_SYMBOL vmlinux 0x5d6016f0	generic_block_bmap
+EXPORT_SYMBOL vmlinux 0x5d61a4af	inet_stream_connect
+EXPORT_SYMBOL vmlinux 0x5d7e9392	security_path_rmdir
+EXPORT_SYMBOL vmlinux 0x5da7c940	dmam_declare_coherent_memory
+EXPORT_SYMBOL vmlinux 0x5dc62311	poll_initwait
+EXPORT_SYMBOL vmlinux 0x5de1b4a8	i2c_master_send
+EXPORT_SYMBOL vmlinux 0x5dfe3a19	qdisc_tree_decrease_qlen
+EXPORT_SYMBOL vmlinux 0x5e2279fa	sock_common_getsockopt
+EXPORT_SYMBOL vmlinux 0x5e239123	dquot_acquire
+EXPORT_SYMBOL vmlinux 0x5e3e91ac	pci_find_device
+EXPORT_SYMBOL vmlinux 0x5e442388	d_alloc_name
+EXPORT_SYMBOL vmlinux 0x5e51f8a0	devm_request_threaded_irq
+EXPORT_SYMBOL vmlinux 0x5e5c58c2	dquot_free_space
+EXPORT_SYMBOL vmlinux 0x5e95b1cd	current_umask
+EXPORT_SYMBOL vmlinux 0x5ea520c5	tcp_select_initial_window
+EXPORT_SYMBOL vmlinux 0x5eb1b630	pci_release_region
+EXPORT_SYMBOL vmlinux 0x5ebc6d6c	abort_creds
+EXPORT_SYMBOL vmlinux 0x5ed040b0	pm_set_vt_switch
+EXPORT_SYMBOL vmlinux 0x5edd0762	bin2bcd
+EXPORT_SYMBOL vmlinux 0x5ee30132	scsi_get_device_flags_keyed
+EXPORT_SYMBOL vmlinux 0x5ef5d89b	dma_pool_create
+EXPORT_SYMBOL vmlinux 0x5f1bd579	mca_find_adapter
+EXPORT_SYMBOL vmlinux 0x5f32f7f9	phy_mii_ioctl
+EXPORT_SYMBOL vmlinux 0x5f56db66	per_cpu__ftrace_event_seq
+EXPORT_SYMBOL vmlinux 0x5f655cfc	generic_make_request
+EXPORT_SYMBOL vmlinux 0x5f8a88c1	d_instantiate
+EXPORT_SYMBOL vmlinux 0x5fa99c36	pci_reenable_device
+EXPORT_SYMBOL vmlinux 0x5fb0ff9c	__scsi_device_lookup_by_target
+EXPORT_SYMBOL vmlinux 0x5fc1b129	pci_bus_set_ops
+EXPORT_SYMBOL vmlinux 0x5fcd4516	i2c_clients_command
+EXPORT_SYMBOL vmlinux 0x5fe138e8	pci_scan_slot
+EXPORT_SYMBOL vmlinux 0x5ff42b08	acpi_video_get_capabilities
+EXPORT_SYMBOL vmlinux 0x600683d3	do_unblank_screen
+EXPORT_SYMBOL vmlinux 0x6012ac2f	dev_queue_xmit
+EXPORT_SYMBOL vmlinux 0x601a3fe5	kernel_setsockopt
+EXPORT_SYMBOL vmlinux 0x601db52b	neigh_create
+EXPORT_SYMBOL vmlinux 0x60243b7d	dma_async_device_register
+EXPORT_SYMBOL vmlinux 0x602ed00d	acpi_current_gpe_count
+EXPORT_SYMBOL vmlinux 0x6043092c	atomic64_dec_and_test
+EXPORT_SYMBOL vmlinux 0x606729a7	phy_disconnect
+EXPORT_SYMBOL vmlinux 0x60764839	backlight_device_register
+EXPORT_SYMBOL vmlinux 0x607d314f	rfkill_register
+EXPORT_SYMBOL vmlinux 0x609f1c7e	synchronize_net
+EXPORT_SYMBOL vmlinux 0x60a0ebad	__tracepoint_kmem_cache_alloc_node
+EXPORT_SYMBOL vmlinux 0x60a279ff	pci_do_scan_bus
+EXPORT_SYMBOL vmlinux 0x60a32ea9	pm_power_off
+EXPORT_SYMBOL vmlinux 0x60cb375f	unregister_framebuffer
+EXPORT_SYMBOL vmlinux 0x60f5b5ae	pnp_find_dev
+EXPORT_SYMBOL vmlinux 0x610cfc98	call_usermodehelper_setkeys
+EXPORT_SYMBOL vmlinux 0x6114facd	pci_request_region_exclusive
+EXPORT_SYMBOL vmlinux 0x612390ad	netpoll_set_trap
+EXPORT_SYMBOL vmlinux 0x6146f301	blk_end_request_cur
+EXPORT_SYMBOL vmlinux 0x618d8299	set_notify_swap_entry_free
+EXPORT_SYMBOL vmlinux 0x61b7b126	simple_strtoull
+EXPORT_SYMBOL vmlinux 0x61e03dd5	sk_stop_timer
+EXPORT_SYMBOL vmlinux 0x61e9e8e7	vfs_quota_off
+EXPORT_SYMBOL vmlinux 0x62049256	acpi_disable
+EXPORT_SYMBOL vmlinux 0x620af9e3	__netdev_alloc_page
+EXPORT_SYMBOL vmlinux 0x62193598	pnp_range_reserved
+EXPORT_SYMBOL vmlinux 0x62202f63	scsi_register
+EXPORT_SYMBOL vmlinux 0x6237f6b5	acpi_enable_event
+EXPORT_SYMBOL vmlinux 0x623fc9cb	simple_fill_super
+EXPORT_SYMBOL vmlinux 0x6241a2ab	__copy_from_user_ll_nocache
+EXPORT_SYMBOL vmlinux 0x6241fd2c	acpi_install_address_space_handler
+EXPORT_SYMBOL vmlinux 0x626cbc80	iget5_locked
+EXPORT_SYMBOL vmlinux 0x62737e1d	sock_unregister
+EXPORT_SYMBOL vmlinux 0x62827bec	security_secctx_to_secid
+EXPORT_SYMBOL vmlinux 0x629ea944	generic_write_checks
+EXPORT_SYMBOL vmlinux 0x62b021c4	xfrm_init_state
+EXPORT_SYMBOL vmlinux 0x62b5f7cc	page_put_link
+EXPORT_SYMBOL vmlinux 0x62b7d606	write_one_page
+EXPORT_SYMBOL vmlinux 0x62c85ffb	acpi_get_hp_hw_control_from_firmware
+EXPORT_SYMBOL vmlinux 0x62ee21b5	bio_integrity_alloc_bioset
+EXPORT_SYMBOL vmlinux 0x6307fc98	del_timer
+EXPORT_SYMBOL vmlinux 0x63155db5	netif_carrier_on
+EXPORT_SYMBOL vmlinux 0x6319ca34	tty_port_lower_dtr_rts
+EXPORT_SYMBOL vmlinux 0x631c6832	d_path
+EXPORT_SYMBOL vmlinux 0x635ff751	xfrm_policy_walk
+EXPORT_SYMBOL vmlinux 0x636a5691	acpi_register_ioapic
+EXPORT_SYMBOL vmlinux 0x63738778	tty_port_raise_dtr_rts
+EXPORT_SYMBOL vmlinux 0x63c4bce5	xfrm_state_update
+EXPORT_SYMBOL vmlinux 0x63ecad53	register_netdevice_notifier
+EXPORT_SYMBOL vmlinux 0x63ee478e	ip_getsockopt
+EXPORT_SYMBOL vmlinux 0x63efc536	radix_tree_prev_hole
+EXPORT_SYMBOL vmlinux 0x63fbc107	mdiobus_scan
+EXPORT_SYMBOL vmlinux 0x6403e338	tcp_memory_pressure
+EXPORT_SYMBOL vmlinux 0x640a7078	posix_acl_create_masq
+EXPORT_SYMBOL vmlinux 0x641877cb	ip_dev_find
+EXPORT_SYMBOL vmlinux 0x641c9211	dm_table_event
+EXPORT_SYMBOL vmlinux 0x642e54ac	__wake_up
+EXPORT_SYMBOL vmlinux 0x64526a93	atomic64_sub_return
+EXPORT_SYMBOL vmlinux 0x6466a1e6	mempool_alloc
+EXPORT_SYMBOL vmlinux 0x6476a646	alloc_disk_node
+EXPORT_SYMBOL vmlinux 0x6478134c	ec_burst_enable
+EXPORT_SYMBOL vmlinux 0x647a11a4	__find_get_block
+EXPORT_SYMBOL vmlinux 0x64999478	congestion_wait
+EXPORT_SYMBOL vmlinux 0x64e9ab19	alloc_trdev
+EXPORT_SYMBOL vmlinux 0x64eae7ad	set_memory_array_wb
+EXPORT_SYMBOL vmlinux 0x64ff4568	fb_show_logo
+EXPORT_SYMBOL vmlinux 0x650227d1	blk_sync_queue
+EXPORT_SYMBOL vmlinux 0x650bb503	unlock_buffer
+EXPORT_SYMBOL vmlinux 0x650fb346	add_wait_queue
+EXPORT_SYMBOL vmlinux 0x651829c2	tcp_v4_connect
+EXPORT_SYMBOL vmlinux 0x651a4139	test_taint
+EXPORT_SYMBOL vmlinux 0x65408378	zlib_inflate_blob
+EXPORT_SYMBOL vmlinux 0x65414e67	dev_valid_name
+EXPORT_SYMBOL vmlinux 0x65902550	unregister_qdisc
+EXPORT_SYMBOL vmlinux 0x65af87ac	sock_no_setsockopt
+EXPORT_SYMBOL vmlinux 0x65be94f2	sock_get_timestamp
+EXPORT_SYMBOL vmlinux 0x65c6861c	scsi_get_command
+EXPORT_SYMBOL vmlinux 0x65de310d	blk_free_tags
+EXPORT_SYMBOL vmlinux 0x664194e5	skb_make_writable
+EXPORT_SYMBOL vmlinux 0x66523962	pipe_lock
+EXPORT_SYMBOL vmlinux 0x665f2b2c	generic_file_open
+EXPORT_SYMBOL vmlinux 0x668a00a7	lro_flush_pkt
+EXPORT_SYMBOL vmlinux 0x668da8d5	zlib_inflateIncomp
+EXPORT_SYMBOL vmlinux 0x66b2730d	pci_bus_assign_resources
+EXPORT_SYMBOL vmlinux 0x66d10008	kill_pid
+EXPORT_SYMBOL vmlinux 0x66dc782d	tcp_alloc_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x66f04da1	dquot_initialize
+EXPORT_SYMBOL vmlinux 0x67053080	current_kernel_time
+EXPORT_SYMBOL vmlinux 0x6727d5e1	clip_tbl_hook
+EXPORT_SYMBOL vmlinux 0x6729d3df	__get_user_4
+EXPORT_SYMBOL vmlinux 0x677b2570	blk_requeue_request
+EXPORT_SYMBOL vmlinux 0x677f41b9	fib_default_rule_add
+EXPORT_SYMBOL vmlinux 0x67804a19	__any_online_cpu
+EXPORT_SYMBOL vmlinux 0x67a92cfe	jbd2_journal_load
+EXPORT_SYMBOL vmlinux 0x67b27ec1	tty_std_termios
+EXPORT_SYMBOL vmlinux 0x67f8201d	sock_no_shutdown
+EXPORT_SYMBOL vmlinux 0x68104eb6	sk_reset_timer
+EXPORT_SYMBOL vmlinux 0x68332af2	otg_set_transceiver
+EXPORT_SYMBOL vmlinux 0x683406b4	rfkill_get_led_trigger_name
+EXPORT_SYMBOL vmlinux 0x6886f0b6	dma_async_memcpy_buf_to_pg
+EXPORT_SYMBOL vmlinux 0x68875eba	netif_notify_peers
+EXPORT_SYMBOL vmlinux 0x6892c654	inet6_ioctl
+EXPORT_SYMBOL vmlinux 0x68a7297b	devm_ioremap
+EXPORT_SYMBOL vmlinux 0x68e0d994	blk_queue_free_tags
+EXPORT_SYMBOL vmlinux 0x6920cdb4	xfrm_alloc_spi
+EXPORT_SYMBOL vmlinux 0x6953e87a	thermal_zone_device_register
+EXPORT_SYMBOL vmlinux 0x696c6e11	scsi_unblock_requests
+EXPORT_SYMBOL vmlinux 0x696d3b9e	dev_unicast_sync
+EXPORT_SYMBOL vmlinux 0x6971447a	rtc_month_days
+EXPORT_SYMBOL vmlinux 0x6980fe91	param_get_int
+EXPORT_SYMBOL vmlinux 0x69927dff	try_acquire_console_sem
+EXPORT_SYMBOL vmlinux 0x69a0ca7d	iowrite16be
+EXPORT_SYMBOL vmlinux 0x69c8c1d5	security_req_classify_flow
+EXPORT_SYMBOL vmlinux 0x69d2575f	efi
+EXPORT_SYMBOL vmlinux 0x69d38ed9	__scsi_print_sense
+EXPORT_SYMBOL vmlinux 0x69e27c7a	bitmap_copy_le
+EXPORT_SYMBOL vmlinux 0x69e3d236	ipv6_chk_addr
+EXPORT_SYMBOL vmlinux 0x69f36e6e	neigh_lookup
+EXPORT_SYMBOL vmlinux 0x6a037cf1	mempool_kfree
+EXPORT_SYMBOL vmlinux 0x6a165cf2	inode_needs_sync
+EXPORT_SYMBOL vmlinux 0x6a21e8cf	dma_set_mask
+EXPORT_SYMBOL vmlinux 0x6a22eaaf	pcim_pin_device
+EXPORT_SYMBOL vmlinux 0x6a27bfce	csum_partial_copy_generic
+EXPORT_SYMBOL vmlinux 0x6a47571d	__set_personality
+EXPORT_SYMBOL vmlinux 0x6a6687bf	scsi_report_device_reset
+EXPORT_SYMBOL vmlinux 0x6a76f3ac	blk_iopoll_enable
+EXPORT_SYMBOL vmlinux 0x6a9f26c9	init_timer_key
+EXPORT_SYMBOL vmlinux 0x6aa65efd	unregister_netdev
+EXPORT_SYMBOL vmlinux 0x6ab67340	simple_pin_fs
+EXPORT_SYMBOL vmlinux 0x6acb973d	iowrite32be
+EXPORT_SYMBOL vmlinux 0x6ad065f4	param_set_charp
+EXPORT_SYMBOL vmlinux 0x6ad3ad79	blk_queue_alignment_offset
+EXPORT_SYMBOL vmlinux 0x6ad85887	acpi_enable_gpe
+EXPORT_SYMBOL vmlinux 0x6add5c9a	dmi_find_device
+EXPORT_SYMBOL vmlinux 0x6b1b67d3	__bdevname
+EXPORT_SYMBOL vmlinux 0x6b203cee	vfs_unlink
+EXPORT_SYMBOL vmlinux 0x6b28395b	sysctl_jiffies
+EXPORT_SYMBOL vmlinux 0x6b2ab172	pcibios_set_irq_routing
+EXPORT_SYMBOL vmlinux 0x6b2d9fb2	journal_start
+EXPORT_SYMBOL vmlinux 0x6b2dc060	dump_stack
+EXPORT_SYMBOL vmlinux 0x6b405eee	eth_header_parse
+EXPORT_SYMBOL vmlinux 0x6b65aa47	sock_no_mmap
+EXPORT_SYMBOL vmlinux 0x6b7c6bff	pci_fixup_cardbus
+EXPORT_SYMBOL vmlinux 0x6b8a4510	__dev_get_by_index
+EXPORT_SYMBOL vmlinux 0x6b9357cf	scsi_host_lookup
+EXPORT_SYMBOL vmlinux 0x6b937ffb	mca_mark_as_used
+EXPORT_SYMBOL vmlinux 0x6b96c5a9	replace_mount_options
+EXPORT_SYMBOL vmlinux 0x6b97f171	serio_rescan
+EXPORT_SYMBOL vmlinux 0x6b9b88f3	sleep_on
+EXPORT_SYMBOL vmlinux 0x6bb812e7	atomic64_add_return
+EXPORT_SYMBOL vmlinux 0x6bc3fbc0	__unregister_chrdev
+EXPORT_SYMBOL vmlinux 0x6bdcfd99	qdisc_class_hash_remove
+EXPORT_SYMBOL vmlinux 0x6c1ce5ce	strcspn
+EXPORT_SYMBOL vmlinux 0x6c2e3320	strncmp
+EXPORT_SYMBOL vmlinux 0x6c389761	acpi_bus_get_private_data
+EXPORT_SYMBOL vmlinux 0x6c475752	blkdev_issue_flush
+EXPORT_SYMBOL vmlinux 0x6c4f5301	d_move
+EXPORT_SYMBOL vmlinux 0x6c5e9b2c	kmap_atomic_prot
+EXPORT_SYMBOL vmlinux 0x6c61ce70	num_registered_fb
+EXPORT_SYMBOL vmlinux 0x6c702af7	sysctl_udp_rmem_min
+EXPORT_SYMBOL vmlinux 0x6c786159	sock_no_connect
+EXPORT_SYMBOL vmlinux 0x6ca9527d	dquot_commit_info
+EXPORT_SYMBOL vmlinux 0x6cdc51f1	scsi_device_put
+EXPORT_SYMBOL vmlinux 0x6cdc5c6b	nla_strlcpy
+EXPORT_SYMBOL vmlinux 0x6d111780	nf_afinfo
+EXPORT_SYMBOL vmlinux 0x6d27ef64	__bitmap_empty
+EXPORT_SYMBOL vmlinux 0x6d288375	radix_tree_next_hole
+EXPORT_SYMBOL vmlinux 0x6d294e43	clock_t_to_jiffies
+EXPORT_SYMBOL vmlinux 0x6d340f64	tty_termios_input_baud_rate
+EXPORT_SYMBOL vmlinux 0x6d3cc0f6	zero_fill_bio
+EXPORT_SYMBOL vmlinux 0x6d464175	__sg_free_table
+EXPORT_SYMBOL vmlinux 0x6d56994a	cmpxchg_486_u64
+EXPORT_SYMBOL vmlinux 0x6d6cbadc	rb_last
+EXPORT_SYMBOL vmlinux 0x6d7acf83	genphy_update_link
+EXPORT_SYMBOL vmlinux 0x6db7e6e5	input_set_keycode
+EXPORT_SYMBOL vmlinux 0x6dc0c24b	complete_and_exit
+EXPORT_SYMBOL vmlinux 0x6dcb53ed	eisa_bus_type
+EXPORT_SYMBOL vmlinux 0x6de00a2a	dev_get_by_flags
+EXPORT_SYMBOL vmlinux 0x6def2db2	half_md4_transform
+EXPORT_SYMBOL vmlinux 0x6e07a54e	acpi_get_gpe_status
+EXPORT_SYMBOL vmlinux 0x6e0ae80f	dev_mc_unsync
+EXPORT_SYMBOL vmlinux 0x6e0e7153	ip6_frag_init
+EXPORT_SYMBOL vmlinux 0x6e15f431	skb_append_datato_frags
+EXPORT_SYMBOL vmlinux 0x6e1d27ae	keyring_clear
+EXPORT_SYMBOL vmlinux 0x6e4a6465	nf_ip_checksum
+EXPORT_SYMBOL vmlinux 0x6e56c4d3	rtnl_set_sk_err
+EXPORT_SYMBOL vmlinux 0x6e720ff2	rtnl_unlock
+EXPORT_SYMBOL vmlinux 0x6e9dd606	__symbol_put
+EXPORT_SYMBOL vmlinux 0x6eb0fdf3	__cond_resched_lock
+EXPORT_SYMBOL vmlinux 0x6ebe49dd	unmap_underlying_metadata
+EXPORT_SYMBOL vmlinux 0x6ee0d33c	generic_shutdown_super
+EXPORT_SYMBOL vmlinux 0x6ef9af47	bio_pair_release
+EXPORT_SYMBOL vmlinux 0x6f036f2d	arp_find
+EXPORT_SYMBOL vmlinux 0x6f3b843e	scsi_eh_restore_cmnd
+EXPORT_SYMBOL vmlinux 0x6f556bdb	acpi_get_gpe_device
+EXPORT_SYMBOL vmlinux 0x6f55fe3a	dm_dirty_log_type_register
+EXPORT_SYMBOL vmlinux 0x6f60cce1	ipv6_dev_get_saddr
+EXPORT_SYMBOL vmlinux 0x6fc2b694	phy_attach_direct
+EXPORT_SYMBOL vmlinux 0x6fcb2ada	fddi_change_mtu
+EXPORT_SYMBOL vmlinux 0x6fcb87a1	touch_softlockup_watchdog
+EXPORT_SYMBOL vmlinux 0x6feb2039	acpi_write
+EXPORT_SYMBOL vmlinux 0x6fec6ff9	scsi_execute_req
+EXPORT_SYMBOL vmlinux 0x6fff393f	time_to_tm
+EXPORT_SYMBOL vmlinux 0x7005d5b3	scsi_ioctl
+EXPORT_SYMBOL vmlinux 0x701200ca	journal_update_format
+EXPORT_SYMBOL vmlinux 0x701604f8	ethtool_op_set_tx_hw_csum
+EXPORT_SYMBOL vmlinux 0x701d0ebd	snprintf
+EXPORT_SYMBOL vmlinux 0x7042a83f	dm_register_target
+EXPORT_SYMBOL vmlinux 0x70523a7a	__cond_resched_softirq
+EXPORT_SYMBOL vmlinux 0x7054a3e4	request_dma
+EXPORT_SYMBOL vmlinux 0x70616eb9	bio_map_user
+EXPORT_SYMBOL vmlinux 0x70617892	__alloc_skb
+EXPORT_SYMBOL vmlinux 0x706ac77d	pcim_iomap_table
+EXPORT_SYMBOL vmlinux 0x70857ee6	write_cache_pages
+EXPORT_SYMBOL vmlinux 0x70bbea46	input_inject_event
+EXPORT_SYMBOL vmlinux 0x70bc17d7	inode_wait
+EXPORT_SYMBOL vmlinux 0x70bfa3b8	tcf_hash_create
+EXPORT_SYMBOL vmlinux 0x70d1f8f3	strncat
+EXPORT_SYMBOL vmlinux 0x70d287a9	redraw_screen
+EXPORT_SYMBOL vmlinux 0x70d8ab82	acpi_acquire_global_lock
+EXPORT_SYMBOL vmlinux 0x70dc114f	pnp_device_attach
+EXPORT_SYMBOL vmlinux 0x70dcc37b	xfrm_state_delete_tunnel
+EXPORT_SYMBOL vmlinux 0x70f672ee	xfrm_register_type
+EXPORT_SYMBOL vmlinux 0x70ffbbe0	jbd2_journal_abort
+EXPORT_SYMBOL vmlinux 0x71062993	blk_queue_physical_block_size
+EXPORT_SYMBOL vmlinux 0x711c93d4	bio_integrity_advance
+EXPORT_SYMBOL vmlinux 0x711f9bf6	set_bdi_congested
+EXPORT_SYMBOL vmlinux 0x7129e5f8	hex_asc
+EXPORT_SYMBOL vmlinux 0x712aa29b	_spin_lock_irqsave
+EXPORT_SYMBOL vmlinux 0x71356fba	remove_wait_queue
+EXPORT_SYMBOL vmlinux 0x714c7a81	acpi_check_mem_region
+EXPORT_SYMBOL vmlinux 0x71548ca5	prepare_kernel_cred
+EXPORT_SYMBOL vmlinux 0x7171121c	overflowgid
+EXPORT_SYMBOL vmlinux 0x71a50dbc	register_blkdev
+EXPORT_SYMBOL vmlinux 0x71b2dc95	dqput
+EXPORT_SYMBOL vmlinux 0x71b43278	phy_device_create
+EXPORT_SYMBOL vmlinux 0x71d492d5	i2c_smbus_read_i2c_block_data
+EXPORT_SYMBOL vmlinux 0x71e0bf8c	mmc_try_claim_host
+EXPORT_SYMBOL vmlinux 0x71e75ad3	insert_inode_locked4
+EXPORT_SYMBOL vmlinux 0x71f68203	inet6_add_protocol
+EXPORT_SYMBOL vmlinux 0x721e8aef	nf_ct_attach
+EXPORT_SYMBOL vmlinux 0x72773ea8	blk_queue_update_dma_pad
+EXPORT_SYMBOL vmlinux 0x72afa106	inet_put_port
+EXPORT_SYMBOL vmlinux 0x72b243d4	free_dma
+EXPORT_SYMBOL vmlinux 0x72bf2140	mtrr_add
+EXPORT_SYMBOL vmlinux 0x72c3be87	param_set_byte
+EXPORT_SYMBOL vmlinux 0x72c9556d	rfkill_unregister
+EXPORT_SYMBOL vmlinux 0x72c991c2	find_inode_number
+EXPORT_SYMBOL vmlinux 0x72ca97fa	vc_cons
+EXPORT_SYMBOL vmlinux 0x72dda130	pnp_is_active
+EXPORT_SYMBOL vmlinux 0x72ea7b2d	scsi_device_type
+EXPORT_SYMBOL vmlinux 0x72f1bc8b	journal_errno
+EXPORT_SYMBOL vmlinux 0x735a0bd5	native_io_delay
+EXPORT_SYMBOL vmlinux 0x735dc8b2	scsi_track_queue_full
+EXPORT_SYMBOL vmlinux 0x7362dd1e	vfs_fstat
+EXPORT_SYMBOL vmlinux 0x7368bbf0	eth_mac_addr
+EXPORT_SYMBOL vmlinux 0x738803e6	strnlen
+EXPORT_SYMBOL vmlinux 0x7389c9a8	acpi_bus_get_power
+EXPORT_SYMBOL vmlinux 0x738fa9ae	ip_mc_inc_group
+EXPORT_SYMBOL vmlinux 0x73a3fef8	fb_validate_mode
+EXPORT_SYMBOL vmlinux 0x73d87427	splice_from_pipe_begin
+EXPORT_SYMBOL vmlinux 0x73dad496	may_umount
+EXPORT_SYMBOL vmlinux 0x73e20c1c	strlcpy
+EXPORT_SYMBOL vmlinux 0x73f8f605	neigh_table_init
+EXPORT_SYMBOL vmlinux 0x740a1b95	reserve_evntsel_nmi
+EXPORT_SYMBOL vmlinux 0x7413793a	EISA_bus
+EXPORT_SYMBOL vmlinux 0x741978d1	simple_release_fs
+EXPORT_SYMBOL vmlinux 0x744c0c68	param_get_byte
+EXPORT_SYMBOL vmlinux 0x746d3b5f	rfkill_set_sw_state
+EXPORT_SYMBOL vmlinux 0x74840718	scsi_cmd_print_sense_hdr
+EXPORT_SYMBOL vmlinux 0x7485e15e	unregister_chrdev_region
+EXPORT_SYMBOL vmlinux 0x748caf40	down
+EXPORT_SYMBOL vmlinux 0x74954462	timecounter_read
+EXPORT_SYMBOL vmlinux 0x74a7e78f	skb_pull
+EXPORT_SYMBOL vmlinux 0x74aa0ac4	generic_permission
+EXPORT_SYMBOL vmlinux 0x74bfc369	__tracepoint_kmem_cache_alloc
+EXPORT_SYMBOL vmlinux 0x74c3fe45	inet6_del_protocol
+EXPORT_SYMBOL vmlinux 0x74c704d6	sk_receive_skb
+EXPORT_SYMBOL vmlinux 0x74cc1cbe	unregister_cpu_notifier
+EXPORT_SYMBOL vmlinux 0x74f565fe	blk_rq_map_sg
+EXPORT_SYMBOL vmlinux 0x75184308	generic_setxattr
+EXPORT_SYMBOL vmlinux 0x75271716	save_processor_state
+EXPORT_SYMBOL vmlinux 0x754c3a25	dev_gro_receive
+EXPORT_SYMBOL vmlinux 0x754d9c51	get_write_access
+EXPORT_SYMBOL vmlinux 0x75620386	set_anon_super
+EXPORT_SYMBOL vmlinux 0x759f34da	pci_bus_add_devices
+EXPORT_SYMBOL vmlinux 0x75f4cb99	pci_bus_size_bridges
+EXPORT_SYMBOL vmlinux 0x75f9f8b3	set_irq_chip
+EXPORT_SYMBOL vmlinux 0x760a0f4f	yield
+EXPORT_SYMBOL vmlinux 0x760b437a	unregister_inetaddr_notifier
+EXPORT_SYMBOL vmlinux 0x762971c7	new_inode
+EXPORT_SYMBOL vmlinux 0x762b4df2	md_check_no_bitmap
+EXPORT_SYMBOL vmlinux 0x76367f6e	kick_iocb
+EXPORT_SYMBOL vmlinux 0x767ddb02	set_memory_wc
+EXPORT_SYMBOL vmlinux 0x76853b4f	pci_set_dma_max_seg_size
+EXPORT_SYMBOL vmlinux 0x7690ad6d	phy_start_aneg
+EXPORT_SYMBOL vmlinux 0x76b0f8f8	bad_dma_address
+EXPORT_SYMBOL vmlinux 0x76b0fa85	splice_direct_to_actor
+EXPORT_SYMBOL vmlinux 0x76be103a	bio_kmalloc
+EXPORT_SYMBOL vmlinux 0x76bf656d	__bitmap_shift_left
+EXPORT_SYMBOL vmlinux 0x76d3cd60	laptop_mode
+EXPORT_SYMBOL vmlinux 0x76e4e76c	inet_listen
+EXPORT_SYMBOL vmlinux 0x76ecad99	mutex_lock
+EXPORT_SYMBOL vmlinux 0x76f098b6	__xfrm_route_forward
+EXPORT_SYMBOL vmlinux 0x76f3f8a5	num_k8_northbridges
+EXPORT_SYMBOL vmlinux 0x770586e9	do_SAK
+EXPORT_SYMBOL vmlinux 0x770a0036	isapnp_cfg_begin
+EXPORT_SYMBOL vmlinux 0x77282f5c	blk_put_request
+EXPORT_SYMBOL vmlinux 0x773a9c94	blk_iopoll_enabled
+EXPORT_SYMBOL vmlinux 0x7759031c	lock_sock_nested
+EXPORT_SYMBOL vmlinux 0x77615e14	register_exec_domain
+EXPORT_SYMBOL vmlinux 0x777f5a4f	skb_free_datagram_locked
+EXPORT_SYMBOL vmlinux 0x7788be06	sock_no_recvmsg
+EXPORT_SYMBOL vmlinux 0x77895458	key_task_permission
+EXPORT_SYMBOL vmlinux 0x77a108df	_write_unlock_irqrestore
+EXPORT_SYMBOL vmlinux 0x77a622cf	ndisc_mc_map
+EXPORT_SYMBOL vmlinux 0x77ac4a66	input_register_handler
+EXPORT_SYMBOL vmlinux 0x77cfcfde	__tracepoint_kmalloc_node
+EXPORT_SYMBOL vmlinux 0x77ecac9f	zlib_inflateEnd
+EXPORT_SYMBOL vmlinux 0x77f3ed72	vlan_gro_frags
+EXPORT_SYMBOL vmlinux 0x77fa5d1f	ns_to_timespec
+EXPORT_SYMBOL vmlinux 0x7825b310	generic_file_direct_write
+EXPORT_SYMBOL vmlinux 0x7830580c	seq_lseek
+EXPORT_SYMBOL vmlinux 0x787a3804	freeze_bdev
+EXPORT_SYMBOL vmlinux 0x787f0131	vfs_quota_on_mount
+EXPORT_SYMBOL vmlinux 0x788fe103	iomem_resource
+EXPORT_SYMBOL vmlinux 0x789396c5	clocksource_change_rating
+EXPORT_SYMBOL vmlinux 0x78a484c9	_read_unlock_irqrestore
+EXPORT_SYMBOL vmlinux 0x78df6bd7	no_pci_devices
+EXPORT_SYMBOL vmlinux 0x78f43843	con_set_default_unimap
+EXPORT_SYMBOL vmlinux 0x79068fda	acpi_install_method
+EXPORT_SYMBOL vmlinux 0x791e105e	inet6_bind
+EXPORT_SYMBOL vmlinux 0x79240f0c	tty_insert_flip_string
+EXPORT_SYMBOL vmlinux 0x793a8597	blk_queue_end_tag
+EXPORT_SYMBOL vmlinux 0x794487ee	disable_hlt
+EXPORT_SYMBOL vmlinux 0x79465218	uart_remove_one_port
+EXPORT_SYMBOL vmlinux 0x796fc5ce	scsi_get_sense_info_fld
+EXPORT_SYMBOL vmlinux 0x79aa04a2	get_random_bytes
+EXPORT_SYMBOL vmlinux 0x79ad224b	tasklet_kill
+EXPORT_SYMBOL vmlinux 0x79edc0de	scsi_report_bus_reset
+EXPORT_SYMBOL vmlinux 0x7a107d23	dmam_release_declared_memory
+EXPORT_SYMBOL vmlinux 0x7a1bda9d	register_con_driver
+EXPORT_SYMBOL vmlinux 0x7a2a837d	strict_strtol
+EXPORT_SYMBOL vmlinux 0x7a41e20f	f_setown
+EXPORT_SYMBOL vmlinux 0x7a4497db	kzfree
+EXPORT_SYMBOL vmlinux 0x7a67832a	phy_register_fixup_for_id
+EXPORT_SYMBOL vmlinux 0x7a7fb0cd	simple_transaction_release
+EXPORT_SYMBOL vmlinux 0x7a848702	_read_lock_irqsave
+EXPORT_SYMBOL vmlinux 0x7adecb2f	unlock_rename
+EXPORT_SYMBOL vmlinux 0x7aea237b	jbd2_journal_revoke
+EXPORT_SYMBOL vmlinux 0x7aec9089	clear_user
+EXPORT_SYMBOL vmlinux 0x7afee150	dma_supported
+EXPORT_SYMBOL vmlinux 0x7b0591bb	mmc_power_restore_host
+EXPORT_SYMBOL vmlinux 0x7b0983ce	sock_no_getsockopt
+EXPORT_SYMBOL vmlinux 0x7b0c84c4	acpi_remove_table_handler
+EXPORT_SYMBOL vmlinux 0x7b10d1ea	take_over_console
+EXPORT_SYMBOL vmlinux 0x7b134ddf	acpi_get_name
+EXPORT_SYMBOL vmlinux 0x7b2d8ae4	blk_dump_rq_flags
+EXPORT_SYMBOL vmlinux 0x7b38cbf0	scsi_set_medium_removal
+EXPORT_SYMBOL vmlinux 0x7b46e767	fb_blank
+EXPORT_SYMBOL vmlinux 0x7b52a859	wrmsr_safe_on_cpu
+EXPORT_SYMBOL vmlinux 0x7b56bd05	acpi_lid_notifier_register
+EXPORT_SYMBOL vmlinux 0x7b5c9200	bd_claim
+EXPORT_SYMBOL vmlinux 0x7b626f15	blk_stop_queue
+EXPORT_SYMBOL vmlinux 0x7b6902fa	pci_set_dma_mask
+EXPORT_SYMBOL vmlinux 0x7b70e023	pci_bus_write_config_word
+EXPORT_SYMBOL vmlinux 0x7b7ffb3f	tty_driver_flush_buffer
+EXPORT_SYMBOL vmlinux 0x7bb7de9b	rtnl_unicast
+EXPORT_SYMBOL vmlinux 0x7bd508ca	pnp_activate_dev
+EXPORT_SYMBOL vmlinux 0x7bfa0912	iw_handler_get_spy
+EXPORT_SYMBOL vmlinux 0x7c0edd7d	acpi_check_region
+EXPORT_SYMBOL vmlinux 0x7c355d46	lro_receive_frags
+EXPORT_SYMBOL vmlinux 0x7c46233a	cpufreq_quick_get
+EXPORT_SYMBOL vmlinux 0x7c60d66e	getname
+EXPORT_SYMBOL vmlinux 0x7c6c8574	blk_init_tags
+EXPORT_SYMBOL vmlinux 0x7c904ded	unregister_module_notifier
+EXPORT_SYMBOL vmlinux 0x7c9bc49e	sock_no_sendmsg
+EXPORT_SYMBOL vmlinux 0x7c9c95ac	dm_table_get_mode
+EXPORT_SYMBOL vmlinux 0x7cb1ae69	cpu_down
+EXPORT_SYMBOL vmlinux 0x7ce598ae	skb_copy_expand
+EXPORT_SYMBOL vmlinux 0x7d11c268	jiffies
+EXPORT_SYMBOL vmlinux 0x7d13609b	wake_up_process
+EXPORT_SYMBOL vmlinux 0x7d2e354e	qdisc_warn_nonwc
+EXPORT_SYMBOL vmlinux 0x7d39d40f	tcp_v4_syn_recv_sock
+EXPORT_SYMBOL vmlinux 0x7d57b2cd	alloc_disk
+EXPORT_SYMBOL vmlinux 0x7da02470	scsi_cmd_ioctl
+EXPORT_SYMBOL vmlinux 0x7da29be1	dm_put_device
+EXPORT_SYMBOL vmlinux 0x7da6135c	simple_link
+EXPORT_SYMBOL vmlinux 0x7dc51246	inet_getname
+EXPORT_SYMBOL vmlinux 0x7dceceac	capable
+EXPORT_SYMBOL vmlinux 0x7dcee933	dma_pool_destroy
+EXPORT_SYMBOL vmlinux 0x7df6e349	__free_pages
+EXPORT_SYMBOL vmlinux 0x7e03f4f1	fb_set_cmap
+EXPORT_SYMBOL vmlinux 0x7e1931ef	dget_locked
+EXPORT_SYMBOL vmlinux 0x7e1a46f7	call_usermodehelper_stdinpipe
+EXPORT_SYMBOL vmlinux 0x7e1b8ba3	get_empty_filp
+EXPORT_SYMBOL vmlinux 0x7e36b32e	unregister_8022_client
+EXPORT_SYMBOL vmlinux 0x7e59dc80	rwsem_down_read_failed
+EXPORT_SYMBOL vmlinux 0x7e5fcb4f	ps2_handle_ack
+EXPORT_SYMBOL vmlinux 0x7e7ed98c	inode_permission
+EXPORT_SYMBOL vmlinux 0x7e9ebb05	kernel_thread
+EXPORT_SYMBOL vmlinux 0x7ea872ad	generic_write_sync
+EXPORT_SYMBOL vmlinux 0x7ebbd901	pci_pme_active
+EXPORT_SYMBOL vmlinux 0x7ebcd77c	blk_execute_rq
+EXPORT_SYMBOL vmlinux 0x7ecb001b	__per_cpu_offset
+EXPORT_SYMBOL vmlinux 0x7ee03413	rfkill_pause_polling
+EXPORT_SYMBOL vmlinux 0x7ee60ace	i2c_master_recv
+EXPORT_SYMBOL vmlinux 0x7ee91c1d	_spin_trylock
+EXPORT_SYMBOL vmlinux 0x7ef9e739	posix_lock_file
+EXPORT_SYMBOL vmlinux 0x7f02b680	tty_write_room
+EXPORT_SYMBOL vmlinux 0x7f146014	sockfd_lookup
+EXPORT_SYMBOL vmlinux 0x7f24de73	jiffies_to_usecs
+EXPORT_SYMBOL vmlinux 0x7f27c867	dma_ops
+EXPORT_SYMBOL vmlinux 0x7fb344a7	xfrm_register_km
+EXPORT_SYMBOL vmlinux 0x7fbf7055	register_netdev
+EXPORT_SYMBOL vmlinux 0x801d65a4	kill_litter_super
+EXPORT_SYMBOL vmlinux 0x8026a4ec	framebuffer_alloc
+EXPORT_SYMBOL vmlinux 0x802d9028	ip6_frag_match
+EXPORT_SYMBOL vmlinux 0x8032f698	remove_inode_hash
+EXPORT_SYMBOL vmlinux 0x803cf5e2	devm_iounmap
+EXPORT_SYMBOL vmlinux 0x804d00e7	pnp_register_card_driver
+EXPORT_SYMBOL vmlinux 0x8063f83d	radix_tree_gang_lookup
+EXPORT_SYMBOL vmlinux 0x807938ff	simple_rmdir
+EXPORT_SYMBOL vmlinux 0x807d4f82	rtc_dev_update_irq_enable_emul
+EXPORT_SYMBOL vmlinux 0x807ec91e	uart_suspend_port
+EXPORT_SYMBOL vmlinux 0x808ed7a1	security_path_unlink
+EXPORT_SYMBOL vmlinux 0x80e9129d	scsi_test_unit_ready
+EXPORT_SYMBOL vmlinux 0x8113bc56	jbd2_journal_errno
+EXPORT_SYMBOL vmlinux 0x812ea6d5	md_integrity_register
+EXPORT_SYMBOL vmlinux 0x8130a983	scsi_setup_fs_cmnd
+EXPORT_SYMBOL vmlinux 0x81472677	acpi_get_table
+EXPORT_SYMBOL vmlinux 0x815b5dd4	match_octal
+EXPORT_SYMBOL vmlinux 0x815c56d0	cpu_present_mask
+EXPORT_SYMBOL vmlinux 0x815f2897	empty_zero_page
+EXPORT_SYMBOL vmlinux 0x816c2a47	ethtool_op_set_tx_ipv6_csum
+EXPORT_SYMBOL vmlinux 0x81799cee	vscnprintf
+EXPORT_SYMBOL vmlinux 0x817bca17	pnp_start_dev
+EXPORT_SYMBOL vmlinux 0x817c1b13	posix_acl_permission
+EXPORT_SYMBOL vmlinux 0x81988587	genphy_resume
+EXPORT_SYMBOL vmlinux 0x81a2cfb1	find_get_page
+EXPORT_SYMBOL vmlinux 0x81a793e3	dquot_alloc_inode
+EXPORT_SYMBOL vmlinux 0x81cfe886	posix_unblock_lock
+EXPORT_SYMBOL vmlinux 0x81e1d214	inet_csk_destroy_sock
+EXPORT_SYMBOL vmlinux 0x81e6b37f	dmi_get_system_info
+EXPORT_SYMBOL vmlinux 0x820d225f	print_mac
+EXPORT_SYMBOL vmlinux 0x820fc63c	vfsmount_lock
+EXPORT_SYMBOL vmlinux 0x821f9d03	pci_find_parent_resource
+EXPORT_SYMBOL vmlinux 0x822e400b	journal_dirty_data
+EXPORT_SYMBOL vmlinux 0x8235805b	memmove
+EXPORT_SYMBOL vmlinux 0x8251b410	get_phy_id
+EXPORT_SYMBOL vmlinux 0x8251bcc3	bitmap_release_region
+EXPORT_SYMBOL vmlinux 0x82692209	kref_set
+EXPORT_SYMBOL vmlinux 0x828468e1	blkdev_get
+EXPORT_SYMBOL vmlinux 0x8286adc3	find_lock_page
+EXPORT_SYMBOL vmlinux 0x82a3ef13	proc_symlink
+EXPORT_SYMBOL vmlinux 0x82acfb70	blk_iopoll_sched
+EXPORT_SYMBOL vmlinux 0x82e778e0	register_netdevice
+EXPORT_SYMBOL vmlinux 0x82e819c1	fput
+EXPORT_SYMBOL vmlinux 0x8317e20a	completion_done
+EXPORT_SYMBOL vmlinux 0x83181c5e	netlink_rcv_skb
+EXPORT_SYMBOL vmlinux 0x832d0429	fb_set_var
+EXPORT_SYMBOL vmlinux 0x8336a10f	do_splice_to
+EXPORT_SYMBOL vmlinux 0x833fb471	__breadahead
+EXPORT_SYMBOL vmlinux 0x8354db12	vfs_path_lookup
+EXPORT_SYMBOL vmlinux 0x83631e8a	pci_save_state
+EXPORT_SYMBOL vmlinux 0x8372a7eb	skb_queue_purge
+EXPORT_SYMBOL vmlinux 0x83904ad4	per_cpu__irq_regs
+EXPORT_SYMBOL vmlinux 0x83a476ce	bitmap_scnlistprintf
+EXPORT_SYMBOL vmlinux 0x83a9e8bf	kmap_high
+EXPORT_SYMBOL vmlinux 0x83d4f97d	udp_lib_unhash
+EXPORT_SYMBOL vmlinux 0x83dfd755	clear_inode
+EXPORT_SYMBOL vmlinux 0x83f214f4	bio_add_page
+EXPORT_SYMBOL vmlinux 0x8403666f	alloc_buffer_head
+EXPORT_SYMBOL vmlinux 0x840fc49b	skb_under_panic
+EXPORT_SYMBOL vmlinux 0x8454b3ad	netif_rx
+EXPORT_SYMBOL vmlinux 0x84680c41	dst_discard
+EXPORT_SYMBOL vmlinux 0x84829c84	register_framebuffer
+EXPORT_SYMBOL vmlinux 0x8495ab9a	serio_reconnect
+EXPORT_SYMBOL vmlinux 0x8497298e	key_negate_and_link
+EXPORT_SYMBOL vmlinux 0x84d9cf16	ip_fragment
+EXPORT_SYMBOL vmlinux 0x84f1d9c5	__destroy_inode
+EXPORT_SYMBOL vmlinux 0x84f8ca57	get_user_pages
+EXPORT_SYMBOL vmlinux 0x84fbbff9	jbd2_journal_try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0x85087fc9	__kill_fasync
+EXPORT_SYMBOL vmlinux 0x85670f1d	rtnl_is_locked
+EXPORT_SYMBOL vmlinux 0x8578e238	vfs_follow_link
+EXPORT_SYMBOL vmlinux 0x85839918	rtnetlink_put_metrics
+EXPORT_SYMBOL vmlinux 0x85ac7f10	posix_acl_from_xattr
+EXPORT_SYMBOL vmlinux 0x85b5c537	uart_write_wakeup
+EXPORT_SYMBOL vmlinux 0x85df9b6c	strsep
+EXPORT_SYMBOL vmlinux 0x85e7deb2	iov_iter_fault_in_readable
+EXPORT_SYMBOL vmlinux 0x85f66869	tty_insert_flip_string_flags
+EXPORT_SYMBOL vmlinux 0x85fd69f5	add_to_page_cache_locked
+EXPORT_SYMBOL vmlinux 0x861252e9	dquot_drop
+EXPORT_SYMBOL vmlinux 0x8616ca05	acpi_unlock_ac_dir
+EXPORT_SYMBOL vmlinux 0x86361632	arp_tbl
+EXPORT_SYMBOL vmlinux 0x865758bf	path_put
+EXPORT_SYMBOL vmlinux 0x8657969a	mdiobus_read
+EXPORT_SYMBOL vmlinux 0x8664f62e	cpufreq_update_policy
+EXPORT_SYMBOL vmlinux 0x8674ec86	sk_stream_wait_memory
+EXPORT_SYMBOL vmlinux 0x86767c67	fb_pan_display
+EXPORT_SYMBOL vmlinux 0x8681b48d	mb_cache_entry_insert
+EXPORT_SYMBOL vmlinux 0x868acba5	get_options
+EXPORT_SYMBOL vmlinux 0x86a1d805	generic_read_dir
+EXPORT_SYMBOL vmlinux 0x86aaca78	ip_nat_decode_session
+EXPORT_SYMBOL vmlinux 0x86d6edcd	vm_insert_page
+EXPORT_SYMBOL vmlinux 0x86fb9b05	bitmap_parse_user
+EXPORT_SYMBOL vmlinux 0x8703462c	poll_freewait
+EXPORT_SYMBOL vmlinux 0x8708b20a	seq_read
+EXPORT_SYMBOL vmlinux 0x871c0a7e	fiemap_check_flags
+EXPORT_SYMBOL vmlinux 0x8733e9a3	sleep_on_timeout
+EXPORT_SYMBOL vmlinux 0x8768c343	alloc_netdev_mq
+EXPORT_SYMBOL vmlinux 0x876dafc3	ec_write
+EXPORT_SYMBOL vmlinux 0x878ab3ce	sysctl_tcp_adv_win_scale
+EXPORT_SYMBOL vmlinux 0x87aaddf8	wrmsr_safe_regs_on_cpu
+EXPORT_SYMBOL vmlinux 0x87b70373	jbd2_journal_check_used_features
+EXPORT_SYMBOL vmlinux 0x87f438a2	sysctl_intvec
+EXPORT_SYMBOL vmlinux 0x88021129	blk_unplug
+EXPORT_SYMBOL vmlinux 0x880bfeba	ndisc_build_skb
+EXPORT_SYMBOL vmlinux 0x880f5979	posix_test_lock
+EXPORT_SYMBOL vmlinux 0x881039d0	zlib_inflate
+EXPORT_SYMBOL vmlinux 0x8815aec2	vmalloc_to_page
+EXPORT_SYMBOL vmlinux 0x881f9d52	try_to_release_page
+EXPORT_SYMBOL vmlinux 0x8843b1df	dst_release
+EXPORT_SYMBOL vmlinux 0x8878e928	block_invalidatepage
+EXPORT_SYMBOL vmlinux 0x887fa5c8	prepare_binprm
+EXPORT_SYMBOL vmlinux 0x889f9c98	__neigh_event_send
+EXPORT_SYMBOL vmlinux 0x88ade8ef	posix_lock_file_wait
+EXPORT_SYMBOL vmlinux 0x88bd2d04	serio_interrupt
+EXPORT_SYMBOL vmlinux 0x88be77b9	dcache_dir_lseek
+EXPORT_SYMBOL vmlinux 0x88e88136	ioremap_prot
+EXPORT_SYMBOL vmlinux 0x890b26ad	pci_disable_msi
+EXPORT_SYMBOL vmlinux 0x892a28df	udp_disconnect
+EXPORT_SYMBOL vmlinux 0x892b26a0	set_memory_nx
+EXPORT_SYMBOL vmlinux 0x8969b997	ida_get_new
+EXPORT_SYMBOL vmlinux 0x897473df	mktime
+EXPORT_SYMBOL vmlinux 0x898cd8b1	mca_device_claimed
+EXPORT_SYMBOL vmlinux 0x89949018	down_timeout
+EXPORT_SYMBOL vmlinux 0x899a4bce	scsi_scan_target
+EXPORT_SYMBOL vmlinux 0x89a080b2	ip_queue_xmit
+EXPORT_SYMBOL vmlinux 0x89c957de	security_d_instantiate
+EXPORT_SYMBOL vmlinux 0x89d01f7d	blk_alloc_queue
+EXPORT_SYMBOL vmlinux 0x89d5538d	fb_pad_aligned_buffer
+EXPORT_SYMBOL vmlinux 0x89d66811	build_ehash_secret
+EXPORT_SYMBOL vmlinux 0x8a1203a9	kref_get
+EXPORT_SYMBOL vmlinux 0x8a373fd7	twl4030_i2c_write
+EXPORT_SYMBOL vmlinux 0x8a3eabf0	__wait_on_bit
+EXPORT_SYMBOL vmlinux 0x8a403d6d	blk_queue_ordered
+EXPORT_SYMBOL vmlinux 0x8a490212	secpath_dup
+EXPORT_SYMBOL vmlinux 0x8a7223f9	scsi_device_lookup_by_target
+EXPORT_SYMBOL vmlinux 0x8a7d1c31	high_memory
+EXPORT_SYMBOL vmlinux 0x8a805a3a	revalidate_disk
+EXPORT_SYMBOL vmlinux 0x8a99a016	mempool_free_slab
+EXPORT_SYMBOL vmlinux 0x8aa0bc7a	blk_integrity_register
+EXPORT_SYMBOL vmlinux 0x8aa42c87	alloc_fcdev
+EXPORT_SYMBOL vmlinux 0x8ac6395b	per_cpu__cpu_info
+EXPORT_SYMBOL vmlinux 0x8adb2ed8	bfifo_qdisc_ops
+EXPORT_SYMBOL vmlinux 0x8ae3165e	journal_ack_err
+EXPORT_SYMBOL vmlinux 0x8ae77528	proc_dointvec_minmax
+EXPORT_SYMBOL vmlinux 0x8aec2671	sk_stream_error
+EXPORT_SYMBOL vmlinux 0x8b18496f	__copy_to_user_ll
+EXPORT_SYMBOL vmlinux 0x8b25b567	scsi_eh_prep_cmnd
+EXPORT_SYMBOL vmlinux 0x8b337154	thermal_zone_bind_cooling_device
+EXPORT_SYMBOL vmlinux 0x8b5785db	dma_pool_alloc
+EXPORT_SYMBOL vmlinux 0x8b5f4a2e	IO_APIC_get_PCI_irq_vector
+EXPORT_SYMBOL vmlinux 0x8b618d08	overflowuid
+EXPORT_SYMBOL vmlinux 0x8b88fe9b	sync_dirty_buffer
+EXPORT_SYMBOL vmlinux 0x8b989cf9	acpi_bus_can_wakeup
+EXPORT_SYMBOL vmlinux 0x8bb61773	netdev_class_remove_file
+EXPORT_SYMBOL vmlinux 0x8bca23a6	bioset_integrity_create
+EXPORT_SYMBOL vmlinux 0x8bd313b8	__tracepoint_kfree
+EXPORT_SYMBOL vmlinux 0x8bd5b603	param_get_long
+EXPORT_SYMBOL vmlinux 0x8c183cbe	iowrite16
+EXPORT_SYMBOL vmlinux 0x8c368ed3	blk_complete_request
+EXPORT_SYMBOL vmlinux 0x8c5b488a	is_container_init
+EXPORT_SYMBOL vmlinux 0x8c64b2c7	locks_init_lock
+EXPORT_SYMBOL vmlinux 0x8c787687	dm_kcopyd_copy
+EXPORT_SYMBOL vmlinux 0x8cb6e31b	end_buffer_async_write
+EXPORT_SYMBOL vmlinux 0x8cc66327	acpi_bus_register_driver
+EXPORT_SYMBOL vmlinux 0x8cc79cab	iowrite16_rep
+EXPORT_SYMBOL vmlinux 0x8cd2043f	blk_queue_resize_tags
+EXPORT_SYMBOL vmlinux 0x8cd40a09	invalidate_bdev
+EXPORT_SYMBOL vmlinux 0x8d12b3e9	gnet_stats_copy_basic
+EXPORT_SYMBOL vmlinux 0x8d212d72	netlink_ack
+EXPORT_SYMBOL vmlinux 0x8d2e3f96	inet_frag_find
+EXPORT_SYMBOL vmlinux 0x8d3894f2	_ctype
+EXPORT_SYMBOL vmlinux 0x8d551bef	sysctl_tcp_rmem
+EXPORT_SYMBOL vmlinux 0x8d63670a	ethtool_op_get_link
+EXPORT_SYMBOL vmlinux 0x8d6f81b4	__div64_32
+EXPORT_SYMBOL vmlinux 0x8d8d96c6	acpi_get_sleep_type_data
+EXPORT_SYMBOL vmlinux 0x8da577a8	audit_log_start
+EXPORT_SYMBOL vmlinux 0x8db89210	eth_type_trans
+EXPORT_SYMBOL vmlinux 0x8dc6e564	restore_processor_state
+EXPORT_SYMBOL vmlinux 0x8dca832f	__percpu_counter_sum
+EXPORT_SYMBOL vmlinux 0x8dd219ef	vmap
+EXPORT_SYMBOL vmlinux 0x8deb7eb3	generic_file_llseek_unlocked
+EXPORT_SYMBOL vmlinux 0x8e002cda	acpi_remove_gpe_block
+EXPORT_SYMBOL vmlinux 0x8e0637ba	i8253_lock
+EXPORT_SYMBOL vmlinux 0x8e0b7743	ipv6_ext_hdr
+EXPORT_SYMBOL vmlinux 0x8e1ffb2b	xfrm_stateonly_find
+EXPORT_SYMBOL vmlinux 0x8e2cc249	blk_queue_make_request
+EXPORT_SYMBOL vmlinux 0x8e3910b3	module_refcount
+EXPORT_SYMBOL vmlinux 0x8e3a3538	con_copy_unimap
+EXPORT_SYMBOL vmlinux 0x8e470cc2	__blk_end_request
+EXPORT_SYMBOL vmlinux 0x8e763ae1	send_remote_softirq
+EXPORT_SYMBOL vmlinux 0x8e888ec3	cpumask_next_and
+EXPORT_SYMBOL vmlinux 0x8ea1ef3c	skb_copy_and_csum_bits
+EXPORT_SYMBOL vmlinux 0x8ee0fbc0	sock_map_fd
+EXPORT_SYMBOL vmlinux 0x8ee15524	kunmap
+EXPORT_SYMBOL vmlinux 0x8ee1f053	unlock_new_inode
+EXPORT_SYMBOL vmlinux 0x8ee69235	timeval_to_jiffies
+EXPORT_SYMBOL vmlinux 0x8f2703b7	wbinvd_on_all_cpus
+EXPORT_SYMBOL vmlinux 0x8f48679a	rb_prev
+EXPORT_SYMBOL vmlinux 0x8f4c4505	find_or_create_page
+EXPORT_SYMBOL vmlinux 0x8f6b7950	set_irq_data
+EXPORT_SYMBOL vmlinux 0x8f72fc7f	cdrom_ioctl
+EXPORT_SYMBOL vmlinux 0x8f9c199c	__get_user_2
+EXPORT_SYMBOL vmlinux 0x8fd67268	vfs_readlink
+EXPORT_SYMBOL vmlinux 0x8fec9568	sock_no_listen
+EXPORT_SYMBOL vmlinux 0x8ff4079b	pv_irq_ops
+EXPORT_SYMBOL vmlinux 0x8ffdb3b8	crc16
+EXPORT_SYMBOL vmlinux 0x90035333	secure_tcpv6_sequence_number
+EXPORT_SYMBOL vmlinux 0x90084d72	inet6_unregister_protosw
+EXPORT_SYMBOL vmlinux 0x902d4651	register_snap_client
+EXPORT_SYMBOL vmlinux 0x902fc465	i2c_smbus_write_word_data
+EXPORT_SYMBOL vmlinux 0x903908aa	rtnl_create_link
+EXPORT_SYMBOL vmlinux 0x904409c6	acpi_set_firmware_waking_vector
+EXPORT_SYMBOL vmlinux 0x904daf09	xfrm_policy_bysel_ctx
+EXPORT_SYMBOL vmlinux 0x906bac8d	unbind_con_driver
+EXPORT_SYMBOL vmlinux 0x906f7c46	scm_fp_dup
+EXPORT_SYMBOL vmlinux 0x9091e217	__inc_zone_page_state
+EXPORT_SYMBOL vmlinux 0x9099dff3	mmc_card_can_sleep
+EXPORT_SYMBOL vmlinux 0x90a1601f	dmi_check_system
+EXPORT_SYMBOL vmlinux 0x90c76a03	kernel_read
+EXPORT_SYMBOL vmlinux 0x90fd0c9e	close_bdev_exclusive
+EXPORT_SYMBOL vmlinux 0x91009452	schedule_delayed_work
+EXPORT_SYMBOL vmlinux 0x910c7e3d	dmam_pool_destroy
+EXPORT_SYMBOL vmlinux 0x911dee40	tty_port_alloc_xmit_buf
+EXPORT_SYMBOL vmlinux 0x9144a8e2	ec_burst_disable
+EXPORT_SYMBOL vmlinux 0x91481982	__ratelimit
+EXPORT_SYMBOL vmlinux 0x91607d95	set_memory_wb
+EXPORT_SYMBOL vmlinux 0x9165b770	flock_lock_file_wait
+EXPORT_SYMBOL vmlinux 0x91766c09	param_get_ulong
+EXPORT_SYMBOL vmlinux 0x91833f01	sk_wait_data
+EXPORT_SYMBOL vmlinux 0x91a7bb1b	set_pages_array_uc
+EXPORT_SYMBOL vmlinux 0x9203d86b	read_dev_sector
+EXPORT_SYMBOL vmlinux 0x9214ed8a	param_get_bool
+EXPORT_SYMBOL vmlinux 0x923b1276	dmaengine_get
+EXPORT_SYMBOL vmlinux 0x9249237c	do_truncate
+EXPORT_SYMBOL vmlinux 0x928670dc	scsi_is_host_device
+EXPORT_SYMBOL vmlinux 0x92897e3d	default_idle
+EXPORT_SYMBOL vmlinux 0x92ac7c22	submit_bh
+EXPORT_SYMBOL vmlinux 0x92af21d0	slow_work_unregister_user
+EXPORT_SYMBOL vmlinux 0x92cd7162	find_vma
+EXPORT_SYMBOL vmlinux 0x92d0f7bc	dm_dirty_log_type_unregister
+EXPORT_SYMBOL vmlinux 0x92ef197b	udp_proc_register
+EXPORT_SYMBOL vmlinux 0x92fc878d	generic_removexattr
+EXPORT_SYMBOL vmlinux 0x9305f8e6	cpufreq_get
+EXPORT_SYMBOL vmlinux 0x9330cb9f	sg_alloc_table
+EXPORT_SYMBOL vmlinux 0x935ec248	phy_print_status
+EXPORT_SYMBOL vmlinux 0x9385667d	down_read_trylock
+EXPORT_SYMBOL vmlinux 0x938d3892	scsi_register_interface
+EXPORT_SYMBOL vmlinux 0x93a6e0b2	io_schedule
+EXPORT_SYMBOL vmlinux 0x93c651be	acpi_info
+EXPORT_SYMBOL vmlinux 0x93cbd1ec	_spin_lock_bh
+EXPORT_SYMBOL vmlinux 0x93d05c39	tcp_disconnect
+EXPORT_SYMBOL vmlinux 0x93d39461	bio_integrity_set_tag
+EXPORT_SYMBOL vmlinux 0x93ed7ede	jbd2_journal_restart
+EXPORT_SYMBOL vmlinux 0x93fca811	__get_free_pages
+EXPORT_SYMBOL vmlinux 0x94352977	kill_block_super
+EXPORT_SYMBOL vmlinux 0x944832d6	ftrace_print_symbols_seq
+EXPORT_SYMBOL vmlinux 0x945adfeb	inet_dgram_ops
+EXPORT_SYMBOL vmlinux 0x9475f531	neigh_changeaddr
+EXPORT_SYMBOL vmlinux 0x94847b23	nf_ct_destroy
+EXPORT_SYMBOL vmlinux 0x9484e369	sk_filter
+EXPORT_SYMBOL vmlinux 0x94932ccd	pnp_find_card
+EXPORT_SYMBOL vmlinux 0x94949a1e	eth_header_cache_update
+EXPORT_SYMBOL vmlinux 0x94961283	vunmap
+EXPORT_SYMBOL vmlinux 0x94978d87	flush_old_exec
+EXPORT_SYMBOL vmlinux 0x94a6467e	kobject_put
+EXPORT_SYMBOL vmlinux 0x94b541b5	cpu_active_mask
+EXPORT_SYMBOL vmlinux 0x94d1a9ae	scsi_prep_return
+EXPORT_SYMBOL vmlinux 0x94d990ef	nonseekable_open
+EXPORT_SYMBOL vmlinux 0x94da3320	kernel_getsockname
+EXPORT_SYMBOL vmlinux 0x9514ae5d	dev_getfirstbyhwtype
+EXPORT_SYMBOL vmlinux 0x954488a4	syncookie_secret
+EXPORT_SYMBOL vmlinux 0x954cbb26	vsprintf
+EXPORT_SYMBOL vmlinux 0x95524700	kmap
+EXPORT_SYMBOL vmlinux 0x955abf45	blk_queue_prep_rq
+EXPORT_SYMBOL vmlinux 0x95ce611e	ppp_unregister_compressor
+EXPORT_SYMBOL vmlinux 0x96051c70	generic_delete_inode
+EXPORT_SYMBOL vmlinux 0x9623199c	tty_mutex
+EXPORT_SYMBOL vmlinux 0x9629486a	per_cpu__cpu_number
+EXPORT_SYMBOL vmlinux 0x962c5cfb	textsearch_unregister
+EXPORT_SYMBOL vmlinux 0x96418422	copy_strings_kernel
+EXPORT_SYMBOL vmlinux 0x964e0968	vc_resize
+EXPORT_SYMBOL vmlinux 0x9665a77e	skb_checksum
+EXPORT_SYMBOL vmlinux 0x966afc66	nf_register_hook
+EXPORT_SYMBOL vmlinux 0x968359da	unlock_super
+EXPORT_SYMBOL vmlinux 0x96898769	sysfs_format_mac
+EXPORT_SYMBOL vmlinux 0x969561e5	md_write_end
+EXPORT_SYMBOL vmlinux 0x96aee5dd	set_blocksize
+EXPORT_SYMBOL vmlinux 0x96b955fe	__inet6_hash
+EXPORT_SYMBOL vmlinux 0x96c26b39	ps2_init
+EXPORT_SYMBOL vmlinux 0x96cd2b04	scsi_sense_key_string
+EXPORT_SYMBOL vmlinux 0x96f94f34	blk_plug_device
+EXPORT_SYMBOL vmlinux 0x9707c004	set_binfmt
+EXPORT_SYMBOL vmlinux 0x972141ea	bdev_read_only
+EXPORT_SYMBOL vmlinux 0x9725db50	jbd2_journal_lock_updates
+EXPORT_SYMBOL vmlinux 0x972f2ee6	dquot_claim_space
+EXPORT_SYMBOL vmlinux 0x973463bf	add_disk
+EXPORT_SYMBOL vmlinux 0x973873ab	_spin_lock
+EXPORT_SYMBOL vmlinux 0x97422178	jbd2_journal_update_format
+EXPORT_SYMBOL vmlinux 0x97462bc5	mark_buffer_dirty_inode
+EXPORT_SYMBOL vmlinux 0x9754ec10	radix_tree_preload
+EXPORT_SYMBOL vmlinux 0x975f3e95	blk_queue_update_dma_alignment
+EXPORT_SYMBOL vmlinux 0x979fb7a6	pci_iomap
+EXPORT_SYMBOL vmlinux 0x97c4ae6c	pci_scan_bridge
+EXPORT_SYMBOL vmlinux 0x97c8149d	touch_atime
+EXPORT_SYMBOL vmlinux 0x97de0ddd	acpi_install_gpe_block
+EXPORT_SYMBOL vmlinux 0x980bc899	pci_try_set_mwi
+EXPORT_SYMBOL vmlinux 0x98173310	proto_unregister
+EXPORT_SYMBOL vmlinux 0x981c8e25	pci_dev_get
+EXPORT_SYMBOL vmlinux 0x9863d21a	iw_handler_get_thrspy
+EXPORT_SYMBOL vmlinux 0x986e6135	fb_pad_unaligned_buffer
+EXPORT_SYMBOL vmlinux 0x988ed85d	set_memory_x
+EXPORT_SYMBOL vmlinux 0x988fcce5	mmc_resume_host
+EXPORT_SYMBOL vmlinux 0x98ba3b81	tcf_hash_new_index
+EXPORT_SYMBOL vmlinux 0x98bb29c2	mark_buffer_async_write
+EXPORT_SYMBOL vmlinux 0x98cdcb51	pci_set_mwi
+EXPORT_SYMBOL vmlinux 0x99052a84	acpi_os_write_port
+EXPORT_SYMBOL vmlinux 0x992acbc8	ilookup5
+EXPORT_SYMBOL vmlinux 0x996fac07	scsi_block_requests
+EXPORT_SYMBOL vmlinux 0x998378ca	pci_prepare_to_sleep
+EXPORT_SYMBOL vmlinux 0x9994c0ca	ps2_is_keyboard_id
+EXPORT_SYMBOL vmlinux 0x999e8297	vfree
+EXPORT_SYMBOL vmlinux 0x999fdf36	skb_recv_datagram
+EXPORT_SYMBOL vmlinux 0x99bfbe39	get_unused_fd
+EXPORT_SYMBOL vmlinux 0x99c7a8b8	jbd2_dev_to_name
+EXPORT_SYMBOL vmlinux 0x99cdc86b	sysctl_tcp_reordering
+EXPORT_SYMBOL vmlinux 0x99ea12ce	panic_blink
+EXPORT_SYMBOL vmlinux 0x99f62fdd	unmap_mapping_range
+EXPORT_SYMBOL vmlinux 0x9a03db78	xfrm_cfg_mutex
+EXPORT_SYMBOL vmlinux 0x9a1dfd65	strpbrk
+EXPORT_SYMBOL vmlinux 0x9a365fb5	block_write_begin
+EXPORT_SYMBOL vmlinux 0x9a42e3c9	nla_append
+EXPORT_SYMBOL vmlinux 0x9a443297	simple_getattr
+EXPORT_SYMBOL vmlinux 0x9a6a83f9	cmos_lock
+EXPORT_SYMBOL vmlinux 0x9a7806fa	scm_detach_fds
+EXPORT_SYMBOL vmlinux 0x9a8c5700	serio_unregister_child_port
+EXPORT_SYMBOL vmlinux 0x9a949fd2	is_bad_inode
+EXPORT_SYMBOL vmlinux 0x9a9985be	percpu_counter_destroy
+EXPORT_SYMBOL vmlinux 0x9aaabf77	request_key_async
+EXPORT_SYMBOL vmlinux 0x9ab11d50	filemap_fdatawait
+EXPORT_SYMBOL vmlinux 0x9ab48602	redirty_page_for_writepage
+EXPORT_SYMBOL vmlinux 0x9b1a0401	skb_copy_and_csum_dev
+EXPORT_SYMBOL vmlinux 0x9b388444	get_zeroed_page
+EXPORT_SYMBOL vmlinux 0x9b419f5c	devcgroup_inode_permission
+EXPORT_SYMBOL vmlinux 0x9b4ba431	vfs_fsync
+EXPORT_SYMBOL vmlinux 0x9b4de8eb	idr_replace
+EXPORT_SYMBOL vmlinux 0x9b5cfd1e	sock_release
+EXPORT_SYMBOL vmlinux 0x9b6eb137	ksize
+EXPORT_SYMBOL vmlinux 0x9b7137db	__sk_mem_schedule
+EXPORT_SYMBOL vmlinux 0x9ba7089d	argv_split
+EXPORT_SYMBOL vmlinux 0x9baa9283	balance_dirty_pages_ratelimited_nr
+EXPORT_SYMBOL vmlinux 0x9bbd6021	locks_remove_posix
+EXPORT_SYMBOL vmlinux 0x9bce482f	__release_region
+EXPORT_SYMBOL vmlinux 0x9bd23478	i2c_smbus_write_i2c_block_data
+EXPORT_SYMBOL vmlinux 0x9bd36cd5	tty_vhangup
+EXPORT_SYMBOL vmlinux 0x9bdb8427	generic_error_remove_page
+EXPORT_SYMBOL vmlinux 0x9beef962	tcp_md5_hash_header
+EXPORT_SYMBOL vmlinux 0x9bf5cbc5	security_file_permission
+EXPORT_SYMBOL vmlinux 0x9c012508	fb_parse_edid
+EXPORT_SYMBOL vmlinux 0x9c027294	security_inode_notifysecctx
+EXPORT_SYMBOL vmlinux 0x9c1ba255	complete_request_key
+EXPORT_SYMBOL vmlinux 0x9c2c944a	__copy_from_user_ll_nocache_nozero
+EXPORT_SYMBOL vmlinux 0x9c3bdabc	neigh_seq_stop
+EXPORT_SYMBOL vmlinux 0x9c4405af	xfrm_state_check_expire
+EXPORT_SYMBOL vmlinux 0x9c65b053	unregister_snap_client
+EXPORT_SYMBOL vmlinux 0x9c6d55cf	blk_queue_dma_pad
+EXPORT_SYMBOL vmlinux 0x9c7077bd	enable_hlt
+EXPORT_SYMBOL vmlinux 0x9c71e738	per_cpu__vm_event_states
+EXPORT_SYMBOL vmlinux 0x9caa072d	genl_unregister_ops
+EXPORT_SYMBOL vmlinux 0x9cb45574	get_sb_bdev
+EXPORT_SYMBOL vmlinux 0x9cb96e92	qdisc_put_rtab
+EXPORT_SYMBOL vmlinux 0x9ccb2622	finish_wait
+EXPORT_SYMBOL vmlinux 0x9ceb163c	memcpy_toiovec
+EXPORT_SYMBOL vmlinux 0x9ced38aa	down_trylock
+EXPORT_SYMBOL vmlinux 0x9cfd56c5	scsi_print_status
+EXPORT_SYMBOL vmlinux 0x9d02db63	i2c_smbus_write_byte
+EXPORT_SYMBOL vmlinux 0x9d16855e	input_release_device
+EXPORT_SYMBOL vmlinux 0x9d2a956f	textsearch_register
+EXPORT_SYMBOL vmlinux 0x9d2bf726	inode_get_bytes
+EXPORT_SYMBOL vmlinux 0x9d33ef5e	acpi_enable
+EXPORT_SYMBOL vmlinux 0x9d3aa376	blk_iopoll_init
+EXPORT_SYMBOL vmlinux 0x9d3afa50	tcp_setsockopt
+EXPORT_SYMBOL vmlinux 0x9d461d4a	blk_queue_io_opt
+EXPORT_SYMBOL vmlinux 0x9d608c30	writeback_inodes_sb_if_idle
+EXPORT_SYMBOL vmlinux 0x9d91624b	sock_i_uid
+EXPORT_SYMBOL vmlinux 0x9da65585	unregister_exec_domain
+EXPORT_SYMBOL vmlinux 0x9dc6e4b5	dquot_release
+EXPORT_SYMBOL vmlinux 0x9dd719a1	ps2_sendbyte
+EXPORT_SYMBOL vmlinux 0x9dd784c2	xfrm_bundle_ok
+EXPORT_SYMBOL vmlinux 0x9de7a2e6	cdrom_number_of_slots
+EXPORT_SYMBOL vmlinux 0x9e0c4876	generic_readlink
+EXPORT_SYMBOL vmlinux 0x9e2000a7	memcpy_toiovecend
+EXPORT_SYMBOL vmlinux 0x9e349dff	audit_log_end
+EXPORT_SYMBOL vmlinux 0x9e363b6b	acpi_disable_gpe
+EXPORT_SYMBOL vmlinux 0x9e410c0d	dev_close
+EXPORT_SYMBOL vmlinux 0x9e543be6	__ps2_command
+EXPORT_SYMBOL vmlinux 0x9e64fbfe	rtc_cmos_read
+EXPORT_SYMBOL vmlinux 0x9e672ff6	scsi_kmap_atomic_sg
+EXPORT_SYMBOL vmlinux 0x9e6e80d8	__starget_for_each_device
+EXPORT_SYMBOL vmlinux 0x9e71e2c5	journal_restart
+EXPORT_SYMBOL vmlinux 0x9e7d6bd0	__udelay
+EXPORT_SYMBOL vmlinux 0x9e9f1714	__bitmap_andnot
+EXPORT_SYMBOL vmlinux 0x9ec68dba	pcim_iomap_regions
+EXPORT_SYMBOL vmlinux 0x9ed685ee	iov_iter_advance
+EXPORT_SYMBOL vmlinux 0x9eecde16	do_brk
+EXPORT_SYMBOL vmlinux 0x9f100139	jiffies_to_clock_t
+EXPORT_SYMBOL vmlinux 0x9f1a9a56	unregister_key_type
+EXPORT_SYMBOL vmlinux 0x9f2bdaac	__bitmap_or
+EXPORT_SYMBOL vmlinux 0x9f2d613e	param_set_bool
+EXPORT_SYMBOL vmlinux 0x9f424093	free_user_ns
+EXPORT_SYMBOL vmlinux 0x9f92efc4	mmiotrace_printk
+EXPORT_SYMBOL vmlinux 0x9f984513	strrchr
+EXPORT_SYMBOL vmlinux 0x9fa274b4	dq_data_lock
+EXPORT_SYMBOL vmlinux 0x9fa37585	scsi_rescan_device
+EXPORT_SYMBOL vmlinux 0x9fb3dd30	memcpy_fromiovec
+EXPORT_SYMBOL vmlinux 0x9fc18feb	llc_add_pack
+EXPORT_SYMBOL vmlinux 0xa0035054	send_sig
+EXPORT_SYMBOL vmlinux 0xa03523d5	security_unix_stream_connect
+EXPORT_SYMBOL vmlinux 0xa04a01bd	qdisc_class_hash_insert
+EXPORT_SYMBOL vmlinux 0xa0525a2c	mca_unregister_driver
+EXPORT_SYMBOL vmlinux 0xa058961a	nla_reserve
+EXPORT_SYMBOL vmlinux 0xa05c03df	mempool_kmalloc
+EXPORT_SYMBOL vmlinux 0xa0689305	skb_kill_datagram
+EXPORT_SYMBOL vmlinux 0xa07039d6	sock_i_ino
+EXPORT_SYMBOL vmlinux 0xa07c4cba	inet_frag_evictor
+EXPORT_SYMBOL vmlinux 0xa0909afe	__napi_schedule
+EXPORT_SYMBOL vmlinux 0xa09b174a	phy_ethtool_sset
+EXPORT_SYMBOL vmlinux 0xa09ef07d	force_sig
+EXPORT_SYMBOL vmlinux 0xa0a4ac21	tcf_hash_insert
+EXPORT_SYMBOL vmlinux 0xa0aebfc2	inet6_getname
+EXPORT_SYMBOL vmlinux 0xa0b04675	vmalloc_32
+EXPORT_SYMBOL vmlinux 0xa0b3546f	key_link
+EXPORT_SYMBOL vmlinux 0xa0b45c6f	tcf_action_dump_1
+EXPORT_SYMBOL vmlinux 0xa0ceef51	out_of_line_wait_on_bit
+EXPORT_SYMBOL vmlinux 0xa0dc2457	vfs_quota_enable
+EXPORT_SYMBOL vmlinux 0xa0fbac79	wake_up_bit
+EXPORT_SYMBOL vmlinux 0xa108eb4d	sysctl_optmem_max
+EXPORT_SYMBOL vmlinux 0xa120d33c	tty_unregister_ldisc
+EXPORT_SYMBOL vmlinux 0xa12dc77e	km_report
+EXPORT_SYMBOL vmlinux 0xa13798f8	printk_ratelimit
+EXPORT_SYMBOL vmlinux 0xa13c0c8d	splice_from_pipe_end
+EXPORT_SYMBOL vmlinux 0xa16746bd	netdev_set_master
+EXPORT_SYMBOL vmlinux 0xa1882017	loop_register_transfer
+EXPORT_SYMBOL vmlinux 0xa19805e8	pcie_get_readrq
+EXPORT_SYMBOL vmlinux 0xa1b02f9a	notify_change
+EXPORT_SYMBOL vmlinux 0xa1b759ce	fb_add_videomode
+EXPORT_SYMBOL vmlinux 0xa1bbff89	tcp_hashinfo
+EXPORT_SYMBOL vmlinux 0xa1c76e0a	_cond_resched
+EXPORT_SYMBOL vmlinux 0xa1d86b8f	pnp_request_card_device
+EXPORT_SYMBOL vmlinux 0xa20ce1b8	net_msg_warn
+EXPORT_SYMBOL vmlinux 0xa21928a1	blk_queue_max_hw_sectors
+EXPORT_SYMBOL vmlinux 0xa21e28c6	ppp_unregister_channel
+EXPORT_SYMBOL vmlinux 0xa22289f7	sock_no_socketpair
+EXPORT_SYMBOL vmlinux 0xa235019d	bio_copy_user
+EXPORT_SYMBOL vmlinux 0xa27eca6d	blk_queue_merge_bvec
+EXPORT_SYMBOL vmlinux 0xa29b1708	tcp_memory_allocated
+EXPORT_SYMBOL vmlinux 0xa2a1dc2e	jbd2_log_wait_commit
+EXPORT_SYMBOL vmlinux 0xa2a1e5c9	_write_lock_bh
+EXPORT_SYMBOL vmlinux 0xa2a5fd77	inet_ehash_secret
+EXPORT_SYMBOL vmlinux 0xa2aa92db	slow_work_sleep_till_thread_needed
+EXPORT_SYMBOL vmlinux 0xa2b8a2ba	__init_rwsem
+EXPORT_SYMBOL vmlinux 0xa3040962	xfrm_lookup
+EXPORT_SYMBOL vmlinux 0xa30b6160	init_file
+EXPORT_SYMBOL vmlinux 0xa313904b	tcp_poll
+EXPORT_SYMBOL vmlinux 0xa329f07e	register_shrinker
+EXPORT_SYMBOL vmlinux 0xa332cdd1	security_tun_dev_attach
+EXPORT_SYMBOL vmlinux 0xa33b8089	tty_chars_in_buffer
+EXPORT_SYMBOL vmlinux 0xa346c9b6	dm_exception_store_destroy
+EXPORT_SYMBOL vmlinux 0xa34f1ef5	crc32_le
+EXPORT_SYMBOL vmlinux 0xa350a8f8	set_memory_array_uc
+EXPORT_SYMBOL vmlinux 0xa35c1f05	acpi_extract_package
+EXPORT_SYMBOL vmlinux 0xa35de80f	ipv4_config
+EXPORT_SYMBOL vmlinux 0xa3835e70	tcp_child_process
+EXPORT_SYMBOL vmlinux 0xa3b9570f	inet_proto_csum_replace4
+EXPORT_SYMBOL vmlinux 0xa3bbcd80	acpi_set_gpe_type
+EXPORT_SYMBOL vmlinux 0xa3d176cf	dm_exception_store_create
+EXPORT_SYMBOL vmlinux 0xa3e2d118	tcp_proc_unregister
+EXPORT_SYMBOL vmlinux 0xa415b384	try_to_del_timer_sync
+EXPORT_SYMBOL vmlinux 0xa41c08d4	dma_release_declared_memory
+EXPORT_SYMBOL vmlinux 0xa43b9539	memcpy_fromiovecend
+EXPORT_SYMBOL vmlinux 0xa4435347	__alloc_pages_nodemask
+EXPORT_SYMBOL vmlinux 0xa44ad274	wait_for_completion_interruptible_timeout
+EXPORT_SYMBOL vmlinux 0xa45df4ee	rwsem_down_write_failed
+EXPORT_SYMBOL vmlinux 0xa460d618	sock_kmalloc
+EXPORT_SYMBOL vmlinux 0xa4750adc	skb_copy_and_csum_datagram_iovec
+EXPORT_SYMBOL vmlinux 0xa482b8dd	pci_enable_bridges
+EXPORT_SYMBOL vmlinux 0xa48db15d	i2c_smbus_read_block_data
+EXPORT_SYMBOL vmlinux 0xa4964af4	tcf_em_tree_dump
+EXPORT_SYMBOL vmlinux 0xa4b5ff9f	block_sync_page
+EXPORT_SYMBOL vmlinux 0xa4b94fea	iowrite8_rep
+EXPORT_SYMBOL vmlinux 0xa4cfd81f	qdisc_list_del
+EXPORT_SYMBOL vmlinux 0xa4e61e87	qdisc_reset
+EXPORT_SYMBOL vmlinux 0xa50d5126	pci_enable_device_mem
+EXPORT_SYMBOL vmlinux 0xa51cdfe8	__FIXADDR_TOP
+EXPORT_SYMBOL vmlinux 0xa5413509	acpi_is_video_device
+EXPORT_SYMBOL vmlinux 0xa56f1315	mempool_free
+EXPORT_SYMBOL vmlinux 0xa5808bbf	tasklet_init
+EXPORT_SYMBOL vmlinux 0xa58b6804	nla_parse
+EXPORT_SYMBOL vmlinux 0xa58fe032	unregister_tcf_proto_ops
+EXPORT_SYMBOL vmlinux 0xa591199d	mca_device_transform_ioport
+EXPORT_SYMBOL vmlinux 0xa5922bb1	kfifo_init
+EXPORT_SYMBOL vmlinux 0xa5984244	serial8250_register_port
+EXPORT_SYMBOL vmlinux 0xa598e29c	vesa_modes
+EXPORT_SYMBOL vmlinux 0xa5a11c5f	nf_unregister_hook
+EXPORT_SYMBOL vmlinux 0xa5a633b9	sg_last
+EXPORT_SYMBOL vmlinux 0xa5a7c860	inet_stream_ops
+EXPORT_SYMBOL vmlinux 0xa5aa4bc0	llc_sap_open
+EXPORT_SYMBOL vmlinux 0xa5afaa9e	xfrm_input_resume
+EXPORT_SYMBOL vmlinux 0xa5bbb17e	proc_dointvec_userhz_jiffies
+EXPORT_SYMBOL vmlinux 0xa5c17eec	dst_destroy
+EXPORT_SYMBOL vmlinux 0xa5cef8ad	release_resource
+EXPORT_SYMBOL vmlinux 0xa5d6f79c	dm_kcopyd_client_create
+EXPORT_SYMBOL vmlinux 0xa5d776ed	tcp_shutdown
+EXPORT_SYMBOL vmlinux 0xa5da0abd	acpi_enter_sleep_state_s4bios
+EXPORT_SYMBOL vmlinux 0xa60f0533	block_fsync
+EXPORT_SYMBOL vmlinux 0xa61a4269	bitmap_start_sync
+EXPORT_SYMBOL vmlinux 0xa61ac01f	vfs_mknod
+EXPORT_SYMBOL vmlinux 0xa63d85ab	slhc_remember
+EXPORT_SYMBOL vmlinux 0xa6403ef0	register_key_type
+EXPORT_SYMBOL vmlinux 0xa64f00e8	tcf_exts_change
+EXPORT_SYMBOL vmlinux 0xa68124fa	hweight8
+EXPORT_SYMBOL vmlinux 0xa681fe88	generate_random_uuid
+EXPORT_SYMBOL vmlinux 0xa690e4aa	vlan_ioctl_set
+EXPORT_SYMBOL vmlinux 0xa69fe6db	get_phy_device
+EXPORT_SYMBOL vmlinux 0xa6dcc773	rb_insert_color
+EXPORT_SYMBOL vmlinux 0xa7046549	vprintk
+EXPORT_SYMBOL vmlinux 0xa704e756	netif_device_attach
+EXPORT_SYMBOL vmlinux 0xa70fabbe	release_evntsel_nmi
+EXPORT_SYMBOL vmlinux 0xa71e7463	__first_cpu
+EXPORT_SYMBOL vmlinux 0xa735755a	skb_dequeue
+EXPORT_SYMBOL vmlinux 0xa7395133	scsicam_bios_param
+EXPORT_SYMBOL vmlinux 0xa73b3ab4	elevator_init
+EXPORT_SYMBOL vmlinux 0xa7473b2a	__blk_run_queue
+EXPORT_SYMBOL vmlinux 0xa74e4501	dquot_free_inode
+EXPORT_SYMBOL vmlinux 0xa751f9ed	mdio_bus_type
+EXPORT_SYMBOL vmlinux 0xa770e1f1	tcp_sync_mss
+EXPORT_SYMBOL vmlinux 0xa7984dab	genl_register_ops
+EXPORT_SYMBOL vmlinux 0xa7b4fce7	register_qdisc
+EXPORT_SYMBOL vmlinux 0xa7b996e9	i2c_release_client
+EXPORT_SYMBOL vmlinux 0xa7c672ee	pci_bus_read_config_dword
+EXPORT_SYMBOL vmlinux 0xa7c8100a	sk_stream_kill_queues
+EXPORT_SYMBOL vmlinux 0xa81a91f0	tcp_connect
+EXPORT_SYMBOL vmlinux 0xa8254098	blk_integrity_unregister
+EXPORT_SYMBOL vmlinux 0xa838e464	journal_revoke
+EXPORT_SYMBOL vmlinux 0xa89acbb3	acpi_evaluate_reference
+EXPORT_SYMBOL vmlinux 0xa8ae6a32	bio_integrity_split
+EXPORT_SYMBOL vmlinux 0xa8c46b65	init_buffer
+EXPORT_SYMBOL vmlinux 0xa8d04498	scsi_free_host_dev
+EXPORT_SYMBOL vmlinux 0xa8d22a7d	set_security_override_from_ctx
+EXPORT_SYMBOL vmlinux 0xa8d68abd	acpi_warning
+EXPORT_SYMBOL vmlinux 0xa8fef7bb	security_unix_may_send
+EXPORT_SYMBOL vmlinux 0xa91b5561	acpi_video_backlight_support
+EXPORT_SYMBOL vmlinux 0xa9248298	journal_lock_updates
+EXPORT_SYMBOL vmlinux 0xa94de387	xfrm_input
+EXPORT_SYMBOL vmlinux 0xa94e7df6	security_inode_permission
+EXPORT_SYMBOL vmlinux 0xa954e80d	input_set_capability
+EXPORT_SYMBOL vmlinux 0xa96386fb	d_lookup
+EXPORT_SYMBOL vmlinux 0xa9683588	lock_may_write
+EXPORT_SYMBOL vmlinux 0xa9775359	pci_bus_type
+EXPORT_SYMBOL vmlinux 0xa995ec16	ipv6_push_nfrag_opts
+EXPORT_SYMBOL vmlinux 0xa9ad40ef	blk_rq_unmap_user
+EXPORT_SYMBOL vmlinux 0xa9bd2676	__vmalloc
+EXPORT_SYMBOL vmlinux 0xa9e68970	jbd2_journal_set_features
+EXPORT_SYMBOL vmlinux 0xa9fcf31d	wait_for_completion_interruptible
+EXPORT_SYMBOL vmlinux 0xaa166f98	nf_unregister_hooks
+EXPORT_SYMBOL vmlinux 0xaa24bba7	__mark_inode_dirty
+EXPORT_SYMBOL vmlinux 0xaa25e841	pci_assign_resource
+EXPORT_SYMBOL vmlinux 0xaa2d38f7	get_super
+EXPORT_SYMBOL vmlinux 0xaa3d0921	scsi_print_result
+EXPORT_SYMBOL vmlinux 0xaa3d23cf	vfs_statfs
+EXPORT_SYMBOL vmlinux 0xaa3edf58	register_console
+EXPORT_SYMBOL vmlinux 0xaa662e6b	i2c_smbus_read_word_data
+EXPORT_SYMBOL vmlinux 0xaa6fb17a	alloc_pci_dev
+EXPORT_SYMBOL vmlinux 0xaa84a8ae	acpi_processor_power_init_bm_check
+EXPORT_SYMBOL vmlinux 0xaa95f2ee	ethtool_op_get_ufo
+EXPORT_SYMBOL vmlinux 0xaaaaacd1	ioremap_wc
+EXPORT_SYMBOL vmlinux 0xaab06af8	_write_lock_irqsave
+EXPORT_SYMBOL vmlinux 0xaab95570	bitmap_endwrite
+EXPORT_SYMBOL vmlinux 0xaacb7a5d	put_page
+EXPORT_SYMBOL vmlinux 0xaacd4b44	__task_pid_nr_ns
+EXPORT_SYMBOL vmlinux 0xaadd3ab9	tcp_recvmsg
+EXPORT_SYMBOL vmlinux 0xaae8ab0e	acpi_bus_power_manageable
+EXPORT_SYMBOL vmlinux 0xaaebe34f	mca_write_pos
+EXPORT_SYMBOL vmlinux 0xaaf45875	acpi_lid_notifier_unregister
+EXPORT_SYMBOL vmlinux 0xaafdc258	strcasecmp
+EXPORT_SYMBOL vmlinux 0xab21ce96	__set_page_dirty_buffers
+EXPORT_SYMBOL vmlinux 0xab31e55a	mmc_power_save_host
+EXPORT_SYMBOL vmlinux 0xab37551b	ethtool_op_set_flags
+EXPORT_SYMBOL vmlinux 0xab389b66	blk_rq_map_user
+EXPORT_SYMBOL vmlinux 0xab47ac13	mmc_release_host
+EXPORT_SYMBOL vmlinux 0xab5ed4f9	scsi_device_lookup
+EXPORT_SYMBOL vmlinux 0xab600421	probe_irq_off
+EXPORT_SYMBOL vmlinux 0xab65ed80	set_memory_uc
+EXPORT_SYMBOL vmlinux 0xab770678	rdmsr_safe_regs_on_cpu
+EXPORT_SYMBOL vmlinux 0xab7e4797	sk_alloc
+EXPORT_SYMBOL vmlinux 0xabb16e07	pcim_enable_device
+EXPORT_SYMBOL vmlinux 0xabb69a33	udp_prot
+EXPORT_SYMBOL vmlinux 0xabb9406d	cpufreq_global_kobject
+EXPORT_SYMBOL vmlinux 0xabd0c91c	rtc_time_to_tm
+EXPORT_SYMBOL vmlinux 0xabdf92a6	__scsi_alloc_queue
+EXPORT_SYMBOL vmlinux 0xac04a8bf	install_exec_creds
+EXPORT_SYMBOL vmlinux 0xac051345	cancel_dirty_page
+EXPORT_SYMBOL vmlinux 0xac0ba8c1	blk_iopoll_disable
+EXPORT_SYMBOL vmlinux 0xac4ef4b5	pci_request_region
+EXPORT_SYMBOL vmlinux 0xac58ea5e	acpi_unload_table_id
+EXPORT_SYMBOL vmlinux 0xac6855b0	gen_kill_estimator
+EXPORT_SYMBOL vmlinux 0xac71d4f8	scsi_allocate_command
+EXPORT_SYMBOL vmlinux 0xac777d8b	sock_common_setsockopt
+EXPORT_SYMBOL vmlinux 0xaccabc6a	in4_pton
+EXPORT_SYMBOL vmlinux 0xacda1b7c	netdev_bonding_change
+EXPORT_SYMBOL vmlinux 0xacdeb154	__tracepoint_module_get
+EXPORT_SYMBOL vmlinux 0xacf4d843	match_strdup
+EXPORT_SYMBOL vmlinux 0xad0413d4	match_hex
+EXPORT_SYMBOL vmlinux 0xad12b0d5	module_layout
+EXPORT_SYMBOL vmlinux 0xad13c689	acpi_os_execute
+EXPORT_SYMBOL vmlinux 0xad438604	inet_bind
+EXPORT_SYMBOL vmlinux 0xad68eda5	eisa_driver_unregister
+EXPORT_SYMBOL vmlinux 0xad81cae6	gnet_stats_copy_rate_est
+EXPORT_SYMBOL vmlinux 0xada31479	dev_remove_pack
+EXPORT_SYMBOL vmlinux 0xadaa2657	cpufreq_register_notifier
+EXPORT_SYMBOL vmlinux 0xadb8a474	__scsi_add_device
+EXPORT_SYMBOL vmlinux 0xadc06f3d	pcix_get_max_mmrbc
+EXPORT_SYMBOL vmlinux 0xaddfeb59	sk_run_filter
+EXPORT_SYMBOL vmlinux 0xadf260c9	security_inode_init_security
+EXPORT_SYMBOL vmlinux 0xadf42bd5	__request_region
+EXPORT_SYMBOL vmlinux 0xae1cd638	__dev_getfirstbyhwtype
+EXPORT_SYMBOL vmlinux 0xae2a7aca	bio_integrity_tag_size
+EXPORT_SYMBOL vmlinux 0xae75f004	ida_destroy
+EXPORT_SYMBOL vmlinux 0xae7ba555	tcp_check_req
+EXPORT_SYMBOL vmlinux 0xaea10f3e	netpoll_setup
+EXPORT_SYMBOL vmlinux 0xaeb2fd39	skb_copy_bits
+EXPORT_SYMBOL vmlinux 0xaeb4c1cc	bdi_register
+EXPORT_SYMBOL vmlinux 0xaec655c7	alloc_pages_exact
+EXPORT_SYMBOL vmlinux 0xaed013b9	posix_acl_valid
+EXPORT_SYMBOL vmlinux 0xaee546a0	mmc_host_lazy_disable
+EXPORT_SYMBOL vmlinux 0xaf0b984e	free_mdio_bitbang
+EXPORT_SYMBOL vmlinux 0xaf27336f	eth_rebuild_header
+EXPORT_SYMBOL vmlinux 0xaf3dd7dc	scsi_logging_level
+EXPORT_SYMBOL vmlinux 0xaf4b1540	acpi_get_irq_routing_table
+EXPORT_SYMBOL vmlinux 0xaf4caad7	pci_read_vpd
+EXPORT_SYMBOL vmlinux 0xaf57e11e	textsearch_destroy
+EXPORT_SYMBOL vmlinux 0xaf86bf16	vfs_rename
+EXPORT_SYMBOL vmlinux 0xaf8c3fec	tty_throttle
+EXPORT_SYMBOL vmlinux 0xaf901532	jbd2_journal_start
+EXPORT_SYMBOL vmlinux 0xafb06d63	bio_endio
+EXPORT_SYMBOL vmlinux 0xafe2a977	__break_lease
+EXPORT_SYMBOL vmlinux 0xafe36015	mca_device_read_stored_pos
+EXPORT_SYMBOL vmlinux 0xb0224e3d	dmam_pool_create
+EXPORT_SYMBOL vmlinux 0xb06ddb20	__lookup_one_len
+EXPORT_SYMBOL vmlinux 0xb077ef32	acpi_enter_sleep_state
+EXPORT_SYMBOL vmlinux 0xb07dfb3d	acpi_remove_gpe_handler
+EXPORT_SYMBOL vmlinux 0xb08a288c	consume_skb
+EXPORT_SYMBOL vmlinux 0xb08f76ad	gen_pool_free
+EXPORT_SYMBOL vmlinux 0xb0b847ac	__bitmap_full
+EXPORT_SYMBOL vmlinux 0xb0dec233	skb_dma_map
+EXPORT_SYMBOL vmlinux 0xb0e10781	get_option
+EXPORT_SYMBOL vmlinux 0xb121390a	probe_irq_on
+EXPORT_SYMBOL vmlinux 0xb1442901	x86_dma_fallback_dev
+EXPORT_SYMBOL vmlinux 0xb155f843	jbd2_journal_force_commit
+EXPORT_SYMBOL vmlinux 0xb19760c3	bitmap_onto
+EXPORT_SYMBOL vmlinux 0xb1a1b57d	sync_mapping_buffers
+EXPORT_SYMBOL vmlinux 0xb1c3a01a	oops_in_progress
+EXPORT_SYMBOL vmlinux 0xb1c7e1c9	sk_stream_write_space
+EXPORT_SYMBOL vmlinux 0xb1cfad22	rdmsr_on_cpu
+EXPORT_SYMBOL vmlinux 0xb1f975aa	unlock_kernel
+EXPORT_SYMBOL vmlinux 0xb20f704a	xfrm_state_alloc
+EXPORT_SYMBOL vmlinux 0xb213401a	security_inode_getsecctx
+EXPORT_SYMBOL vmlinux 0xb219d56c	wbinvd_on_cpu
+EXPORT_SYMBOL vmlinux 0xb21c88c7	tcp_enter_memory_pressure
+EXPORT_SYMBOL vmlinux 0xb224fbe2	param_get_short
+EXPORT_SYMBOL vmlinux 0xb2253c28	__put_cred
+EXPORT_SYMBOL vmlinux 0xb2256cf7	security_inode_setsecctx
+EXPORT_SYMBOL vmlinux 0xb22fe6a3	netdev_increment_features
+EXPORT_SYMBOL vmlinux 0xb23e512c	journal_get_undo_access
+EXPORT_SYMBOL vmlinux 0xb23e6260	generic_setlease
+EXPORT_SYMBOL vmlinux 0xb260264e	skb_copy
+EXPORT_SYMBOL vmlinux 0xb265950b	create_proc_entry
+EXPORT_SYMBOL vmlinux 0xb2682405	utf8_to_utf32
+EXPORT_SYMBOL vmlinux 0xb272fd2a	proc_dointvec_jiffies
+EXPORT_SYMBOL vmlinux 0xb27510ef	atomic64_inc_return
+EXPORT_SYMBOL vmlinux 0xb279da12	pv_lock_ops
+EXPORT_SYMBOL vmlinux 0xb28a02b2	fb_firmware_edid
+EXPORT_SYMBOL vmlinux 0xb29bc8bd	idr_remove
+EXPORT_SYMBOL vmlinux 0xb2b00e8d	ppp_output_wakeup
+EXPORT_SYMBOL vmlinux 0xb2bd664d	vfs_quota_sync
+EXPORT_SYMBOL vmlinux 0xb2df494a	phy_register_fixup
+EXPORT_SYMBOL vmlinux 0xb2efb6be	mca_read_stored_pos
+EXPORT_SYMBOL vmlinux 0xb2fd5ceb	__put_user_4
+EXPORT_SYMBOL vmlinux 0xb3098f34	uart_unregister_driver
+EXPORT_SYMBOL vmlinux 0xb30abf8d	idr_get_new_above
+EXPORT_SYMBOL vmlinux 0xb31526ee	sg_copy_from_buffer
+EXPORT_SYMBOL vmlinux 0xb3205415	wait_for_completion_killable
+EXPORT_SYMBOL vmlinux 0xb3284531	acpi_dbg_layer
+EXPORT_SYMBOL vmlinux 0xb34d4c2e	acpi_terminate
+EXPORT_SYMBOL vmlinux 0xb352177e	find_first_bit
+EXPORT_SYMBOL vmlinux 0xb3623b73	cdrom_mode_select
+EXPORT_SYMBOL vmlinux 0xb372de0d	vga_tryget
+EXPORT_SYMBOL vmlinux 0xb376d79d	radix_tree_tagged
+EXPORT_SYMBOL vmlinux 0xb3994c7a	per_cpu__kstat
+EXPORT_SYMBOL vmlinux 0xb3a307c6	si_meminfo
+EXPORT_SYMBOL vmlinux 0xb3aaf16f	kern_path
+EXPORT_SYMBOL vmlinux 0xb3ae5d52	pci_enable_msi_block
+EXPORT_SYMBOL vmlinux 0xb3c42c94	per_cpu__x86_bios_cpu_apicid
+EXPORT_SYMBOL vmlinux 0xb3e0590d	acpi_set_current_resources
+EXPORT_SYMBOL vmlinux 0xb423dba1	console_blanked
+EXPORT_SYMBOL vmlinux 0xb42453d3	param_get_invbool
+EXPORT_SYMBOL vmlinux 0xb4279ab7	downgrade_write
+EXPORT_SYMBOL vmlinux 0xb4390f9a	mcount
+EXPORT_SYMBOL vmlinux 0xb439c1ba	scsi_is_sdev_device
+EXPORT_SYMBOL vmlinux 0xb43a99a3	fifo_set_limit
+EXPORT_SYMBOL vmlinux 0xb45578b8	memscan
+EXPORT_SYMBOL vmlinux 0xb45b24f6	k8_nb_ids
+EXPORT_SYMBOL vmlinux 0xb4709322	scsi_dev_info_add_list
+EXPORT_SYMBOL vmlinux 0xb4a439a0	bio_split
+EXPORT_SYMBOL vmlinux 0xb4a7b2b1	security_path_truncate
+EXPORT_SYMBOL vmlinux 0xb4aab2de	dev_mc_delete
+EXPORT_SYMBOL vmlinux 0xb4b0ee4e	down_read
+EXPORT_SYMBOL vmlinux 0xb4ca9447	__kfifo_get
+EXPORT_SYMBOL vmlinux 0xb4d9e14a	kernel_sock_shutdown
+EXPORT_SYMBOL vmlinux 0xb4f29d12	__f_setown
+EXPORT_SYMBOL vmlinux 0xb4fc718c	jbd2_journal_get_undo_access
+EXPORT_SYMBOL vmlinux 0xb5018ff2	read_cache_page
+EXPORT_SYMBOL vmlinux 0xb5044271	vsscanf
+EXPORT_SYMBOL vmlinux 0xb51bdc26	skb_dma_unmap
+EXPORT_SYMBOL vmlinux 0xb5228d8c	ethtool_op_get_rx_csum
+EXPORT_SYMBOL vmlinux 0xb5418861	atomic64_add
+EXPORT_SYMBOL vmlinux 0xb54533f7	usecs_to_jiffies
+EXPORT_SYMBOL vmlinux 0xb5647d0e	mmc_add_host
+EXPORT_SYMBOL vmlinux 0xb5a459dc	unregister_blkdev
+EXPORT_SYMBOL vmlinux 0xb5b5a841	send_sig_info
+EXPORT_SYMBOL vmlinux 0xb5ca1c46	slhc_free
+EXPORT_SYMBOL vmlinux 0xb5d52c27	ec_transaction
+EXPORT_SYMBOL vmlinux 0xb5e37a21	wireless_spy_update
+EXPORT_SYMBOL vmlinux 0xb5e5dc89	simple_empty
+EXPORT_SYMBOL vmlinux 0xb5e9a3f5	serio_unregister_driver
+EXPORT_SYMBOL vmlinux 0xb5fc6313	skb_prepare_seq_read
+EXPORT_SYMBOL vmlinux 0xb6018072	bio_alloc_bioset
+EXPORT_SYMBOL vmlinux 0xb60767eb	__mod_zone_page_state
+EXPORT_SYMBOL vmlinux 0xb6353555	per_cpu__x86_cpu_to_apicid
+EXPORT_SYMBOL vmlinux 0xb65057c6	skb_free_datagram
+EXPORT_SYMBOL vmlinux 0xb678366f	int_sqrt
+EXPORT_SYMBOL vmlinux 0xb687eec2	acpi_bus_start
+EXPORT_SYMBOL vmlinux 0xb6896671	crc_t10dif
+EXPORT_SYMBOL vmlinux 0xb69d078b	mnt_unpin
+EXPORT_SYMBOL vmlinux 0xb6a11c92	ip_generic_getfrag
+EXPORT_SYMBOL vmlinux 0xb6a61a86	qdisc_get_rtab
+EXPORT_SYMBOL vmlinux 0xb6a68816	find_last_bit
+EXPORT_SYMBOL vmlinux 0xb6bffb99	kstat_irqs_cpu
+EXPORT_SYMBOL vmlinux 0xb6c5a973	scsi_show_result
+EXPORT_SYMBOL vmlinux 0xb6e227aa	rtc_lock
+EXPORT_SYMBOL vmlinux 0xb6ed1e53	strncpy
+EXPORT_SYMBOL vmlinux 0xb6f87a9e	neigh_update
+EXPORT_SYMBOL vmlinux 0xb721c6b4	mmc_wait_for_app_cmd
+EXPORT_SYMBOL vmlinux 0xb72397d5	printk
+EXPORT_SYMBOL vmlinux 0xb758b225	acpi_disable_event
+EXPORT_SYMBOL vmlinux 0xb76a4edc	mdiobus_free
+EXPORT_SYMBOL vmlinux 0xb798b8e4	flow_cache_lookup
+EXPORT_SYMBOL vmlinux 0xb799a03d	pci_bus_write_config_dword
+EXPORT_SYMBOL vmlinux 0xb79fd335	phy_stop_interrupts
+EXPORT_SYMBOL vmlinux 0xb7ad91fa	blk_integrity_compare
+EXPORT_SYMBOL vmlinux 0xb7b61546	crc32_be
+EXPORT_SYMBOL vmlinux 0xb7b8815f	pci_disable_msix
+EXPORT_SYMBOL vmlinux 0xb7ccb3c7	twl4030_i2c_read_u8
+EXPORT_SYMBOL vmlinux 0xb7e22a8c	kfree_skb
+EXPORT_SYMBOL vmlinux 0xb804bf66	dev_addr_del_multiple
+EXPORT_SYMBOL vmlinux 0xb813ce5a	timecompare_transform
+EXPORT_SYMBOL vmlinux 0xb82ce80a	bd_set_size
+EXPORT_SYMBOL vmlinux 0xb8456b11	file_remove_suid
+EXPORT_SYMBOL vmlinux 0xb849b4f1	dev_unicast_delete
+EXPORT_SYMBOL vmlinux 0xb84ed32f	proc_doulongvec_minmax
+EXPORT_SYMBOL vmlinux 0xb86e4ab9	random32
+EXPORT_SYMBOL vmlinux 0xb88ebb55	generic_file_llseek
+EXPORT_SYMBOL vmlinux 0xb89af9bf	srandom32
+EXPORT_SYMBOL vmlinux 0xb8aa2342	__check_region
+EXPORT_SYMBOL vmlinux 0xb8e4d62d	netif_napi_del
+EXPORT_SYMBOL vmlinux 0xb8e7ce2c	__put_user_8
+EXPORT_SYMBOL vmlinux 0xb900f852	generic_fillattr
+EXPORT_SYMBOL vmlinux 0xb92b3641	rtnl_notify
+EXPORT_SYMBOL vmlinux 0xb942b513	smp_call_function_many
+EXPORT_SYMBOL vmlinux 0xb98a0185	rtc_tm_to_time
+EXPORT_SYMBOL vmlinux 0xb98ef804	vm_stat
+EXPORT_SYMBOL vmlinux 0xb9ddfec7	dma_mark_declared_memory_occupied
+EXPORT_SYMBOL vmlinux 0xb9f0d066	deactivate_super
+EXPORT_SYMBOL vmlinux 0xb9fd2205	add_efi_memmap
+EXPORT_SYMBOL vmlinux 0xba2d8594	ec_read
+EXPORT_SYMBOL vmlinux 0xba497f13	loops_per_jiffy
+EXPORT_SYMBOL vmlinux 0xba82fec5	phy_start_interrupts
+EXPORT_SYMBOL vmlinux 0xba8757b1	pci_map_rom
+EXPORT_SYMBOL vmlinux 0xbaaab8ae	timespec_to_jiffies
+EXPORT_SYMBOL vmlinux 0xbabb84e5	invalidate_inodes
+EXPORT_SYMBOL vmlinux 0xbac57347	kill_fasync
+EXPORT_SYMBOL vmlinux 0xbace3bb5	kernel_connect
+EXPORT_SYMBOL vmlinux 0xbade0127	iw_handler_set_spy
+EXPORT_SYMBOL vmlinux 0xbae141d9	vm_map_ram
+EXPORT_SYMBOL vmlinux 0xbb00147d	set_user_nice
+EXPORT_SYMBOL vmlinux 0xbb167766	fb_var_to_videomode
+EXPORT_SYMBOL vmlinux 0xbb189cad	disallow_signal
+EXPORT_SYMBOL vmlinux 0xbb2db058	hippi_mac_addr
+EXPORT_SYMBOL vmlinux 0xbb38ed20	tcp_v4_md5_lookup
+EXPORT_SYMBOL vmlinux 0xbb3e932d	jbd2_journal_unlock_updates
+EXPORT_SYMBOL vmlinux 0xbb5ad809	vfs_symlink
+EXPORT_SYMBOL vmlinux 0xbb5d343d	xfrm_get_acqseq
+EXPORT_SYMBOL vmlinux 0xbb831c37	simple_write_begin
+EXPORT_SYMBOL vmlinux 0xbb842b2d	arp_send
+EXPORT_SYMBOL vmlinux 0xbb89de17	ida_init
+EXPORT_SYMBOL vmlinux 0xbb98a538	md_error
+EXPORT_SYMBOL vmlinux 0xbba17e80	skb_find_text
+EXPORT_SYMBOL vmlinux 0xbbbe5b6f	serio_close
+EXPORT_SYMBOL vmlinux 0xbbd0d2f2	i2c_use_client
+EXPORT_SYMBOL vmlinux 0xbbdcda50	pci_unregister_driver
+EXPORT_SYMBOL vmlinux 0xbc00e700	vfs_read
+EXPORT_SYMBOL vmlinux 0xbc08b048	ilookup
+EXPORT_SYMBOL vmlinux 0xbc280480	pci_find_capability
+EXPORT_SYMBOL vmlinux 0xbc2ec2c8	ppp_register_net_channel
+EXPORT_SYMBOL vmlinux 0xbc4bbbee	uart_update_timeout
+EXPORT_SYMBOL vmlinux 0xbc4fb34c	acpi_notifier_call_chain
+EXPORT_SYMBOL vmlinux 0xbc5622c2	blk_queue_stack_limits
+EXPORT_SYMBOL vmlinux 0xbc654059	pci_write_vpd
+EXPORT_SYMBOL vmlinux 0xbc6bee12	neigh_resolve_output
+EXPORT_SYMBOL vmlinux 0xbc8c14ee	cap_netlink_recv
+EXPORT_SYMBOL vmlinux 0xbcc308bb	strnlen_user
+EXPORT_SYMBOL vmlinux 0xbd13f5b0	journal_invalidatepage
+EXPORT_SYMBOL vmlinux 0xbd3c53df	journal_get_create_access
+EXPORT_SYMBOL vmlinux 0xbd53404c	inet_unregister_protosw
+EXPORT_SYMBOL vmlinux 0xbd5ef02e	dev_open
+EXPORT_SYMBOL vmlinux 0xbd798970	task_nice
+EXPORT_SYMBOL vmlinux 0xbd8d33e2	nf_register_hooks
+EXPORT_SYMBOL vmlinux 0xbd9244e6	inetdev_by_index
+EXPORT_SYMBOL vmlinux 0xbdb50170	seq_putc
+EXPORT_SYMBOL vmlinux 0xbdb6500e	per_cpu__cpu_core_map
+EXPORT_SYMBOL vmlinux 0xbde9be46	pci_get_class
+EXPORT_SYMBOL vmlinux 0xbdf5c25c	rb_next
+EXPORT_SYMBOL vmlinux 0xbe0e5118	nla_memcmp
+EXPORT_SYMBOL vmlinux 0xbe561b45	xfrm_state_lookup
+EXPORT_SYMBOL vmlinux 0xbe5d558a	ip_ct_attach
+EXPORT_SYMBOL vmlinux 0xbe63ee40	request_resource
+EXPORT_SYMBOL vmlinux 0xbe6c7334	filemap_fdatawait_range
+EXPORT_SYMBOL vmlinux 0xbef43296	console_conditional_schedule
+EXPORT_SYMBOL vmlinux 0xbf00b402	mb_cache_entry_alloc
+EXPORT_SYMBOL vmlinux 0xbf060ad9	__xfrm_state_destroy
+EXPORT_SYMBOL vmlinux 0xbf255a7f	mca_device_write_pos
+EXPORT_SYMBOL vmlinux 0xbf7fd2f5	schedule_timeout_killable
+EXPORT_SYMBOL vmlinux 0xbf801477	__register_binfmt
+EXPORT_SYMBOL vmlinux 0xbf8b39e9	isapnp_present
+EXPORT_SYMBOL vmlinux 0xbf8ffc3d	tty_unregister_driver
+EXPORT_SYMBOL vmlinux 0xbf92127b	scsi_free_command
+EXPORT_SYMBOL vmlinux 0xbf9b7327	dec_zone_page_state
+EXPORT_SYMBOL vmlinux 0xbf9bcc8d	__cap_empty_set
+EXPORT_SYMBOL vmlinux 0xbf9ce2c0	bdi_register_dev
+EXPORT_SYMBOL vmlinux 0xbfc177bc	iowrite32_rep
+EXPORT_SYMBOL vmlinux 0xbfee3ad5	loop_unregister_transfer
+EXPORT_SYMBOL vmlinux 0xbfef951f	sock_kfree_s
+EXPORT_SYMBOL vmlinux 0xc003c637	__strncpy_from_user
+EXPORT_SYMBOL vmlinux 0xc0044724	blk_set_default_limits
+EXPORT_SYMBOL vmlinux 0xc01eed33	__copy_from_user_ll_nozero
+EXPORT_SYMBOL vmlinux 0xc03310f3	rt6_lookup
+EXPORT_SYMBOL vmlinux 0xc03f1f14	blk_remove_plug
+EXPORT_SYMBOL vmlinux 0xc04e4533	nf_reinject
+EXPORT_SYMBOL vmlinux 0xc0580937	rb_erase
+EXPORT_SYMBOL vmlinux 0xc061df84	sock_wfree
+EXPORT_SYMBOL vmlinux 0xc08ac03a	call_usermodehelper_pipe
+EXPORT_SYMBOL vmlinux 0xc0a3d105	find_next_bit
+EXPORT_SYMBOL vmlinux 0xc0bf6ead	timecounter_cyc2time
+EXPORT_SYMBOL vmlinux 0xc0f65988	machine_real_restart
+EXPORT_SYMBOL vmlinux 0xc0f83230	simple_rename
+EXPORT_SYMBOL vmlinux 0xc107a426	skb_put
+EXPORT_SYMBOL vmlinux 0xc11d8093	iov_shorten
+EXPORT_SYMBOL vmlinux 0xc124d31e	scsi_finish_command
+EXPORT_SYMBOL vmlinux 0xc1372ab2	mmc_card_awake
+EXPORT_SYMBOL vmlinux 0xc139a5c5	i8042_check_port_owner
+EXPORT_SYMBOL vmlinux 0xc14e69e4	cdrom_get_media_event
+EXPORT_SYMBOL vmlinux 0xc166ca35	__scm_send
+EXPORT_SYMBOL vmlinux 0xc16ca86f	tcp4_gro_complete
+EXPORT_SYMBOL vmlinux 0xc1798534	md_check_recovery
+EXPORT_SYMBOL vmlinux 0xc18d13ce	netlink_kernel_create
+EXPORT_SYMBOL vmlinux 0xc197537d	qdisc_watchdog_cancel
+EXPORT_SYMBOL vmlinux 0xc19c8163	atomic64_cmpxchg
+EXPORT_SYMBOL vmlinux 0xc1b8ef40	jbd2_journal_get_create_access
+EXPORT_SYMBOL vmlinux 0xc1bb54cf	request_firmware_nowait
+EXPORT_SYMBOL vmlinux 0xc1ca61ad	simple_fsync
+EXPORT_SYMBOL vmlinux 0xc2030e15	dev_mc_add
+EXPORT_SYMBOL vmlinux 0xc20361b7	xfrm_policy_destroy
+EXPORT_SYMBOL vmlinux 0xc204bca3	scsi_prep_state_check
+EXPORT_SYMBOL vmlinux 0xc22616a1	napi_gro_frags
+EXPORT_SYMBOL vmlinux 0xc2466be4	blk_fetch_request
+EXPORT_SYMBOL vmlinux 0xc254af48	dcache_lock
+EXPORT_SYMBOL vmlinux 0xc256e762	__bitmap_equal
+EXPORT_SYMBOL vmlinux 0xc2721d6f	inode_change_ok
+EXPORT_SYMBOL vmlinux 0xc280a525	__copy_from_user_ll
+EXPORT_SYMBOL vmlinux 0xc2b3a773	noop_qdisc
+EXPORT_SYMBOL vmlinux 0xc2c2153d	bitmap_cond_end_sync
+EXPORT_SYMBOL vmlinux 0xc2d711e1	krealloc
+EXPORT_SYMBOL vmlinux 0xc2e587d1	reset_devices
+EXPORT_SYMBOL vmlinux 0xc2e66c3f	save_mount_options
+EXPORT_SYMBOL vmlinux 0xc2f0f03a	pci_enable_device_io
+EXPORT_SYMBOL vmlinux 0xc30cd79d	ethtool_op_set_ufo
+EXPORT_SYMBOL vmlinux 0xc30e25be	set_security_override
+EXPORT_SYMBOL vmlinux 0xc3230d4c	ppp_unit_number
+EXPORT_SYMBOL vmlinux 0xc33f6f4c	on_each_cpu
+EXPORT_SYMBOL vmlinux 0xc3454352	generic_file_readonly_mmap
+EXPORT_SYMBOL vmlinux 0xc3640fc2	neigh_seq_next
+EXPORT_SYMBOL vmlinux 0xc3654d60	pnp_get_resource
+EXPORT_SYMBOL vmlinux 0xc3825507	cdrom_open
+EXPORT_SYMBOL vmlinux 0xc3926033	___pskb_trim
+EXPORT_SYMBOL vmlinux 0xc3aaf0a9	__put_user_1
+EXPORT_SYMBOL vmlinux 0xc3b6f8ca	__neigh_for_each_release
+EXPORT_SYMBOL vmlinux 0xc3bc9bba	misc_deregister
+EXPORT_SYMBOL vmlinux 0xc3cf1128	in_group_p
+EXPORT_SYMBOL vmlinux 0xc3ed6146	__scsi_put_command
+EXPORT_SYMBOL vmlinux 0xc3f381c7	netdev_features_change
+EXPORT_SYMBOL vmlinux 0xc3fa6a59	memchr
+EXPORT_SYMBOL vmlinux 0xc3faec41	ll_rw_block
+EXPORT_SYMBOL vmlinux 0xc3fe5895	log_wait_commit
+EXPORT_SYMBOL vmlinux 0xc402cc99	register_acpi_notifier
+EXPORT_SYMBOL vmlinux 0xc4206145	deactivate_locked_super
+EXPORT_SYMBOL vmlinux 0xc441f99a	single_open
+EXPORT_SYMBOL vmlinux 0xc452fac5	tc_classify
+EXPORT_SYMBOL vmlinux 0xc4738284	kblockd_schedule_work
+EXPORT_SYMBOL vmlinux 0xc47a0a45	pci_set_power_state
+EXPORT_SYMBOL vmlinux 0xc499ae1e	kstrdup
+EXPORT_SYMBOL vmlinux 0xc49c03c0	____pagevec_lru_add
+EXPORT_SYMBOL vmlinux 0xc4e61f48	inode_add_rsv_space
+EXPORT_SYMBOL vmlinux 0xc4f72b95	sock_create_kern
+EXPORT_SYMBOL vmlinux 0xc52f5714	fb_videomode_to_var
+EXPORT_SYMBOL vmlinux 0xc538ff9e	mmc_free_host
+EXPORT_SYMBOL vmlinux 0xc53cba2b	unregister_con_driver
+EXPORT_SYMBOL vmlinux 0xc5534d64	ioread16
+EXPORT_SYMBOL vmlinux 0xc55705a7	do_munmap
+EXPORT_SYMBOL vmlinux 0xc55f7dc7	_write_trylock
+EXPORT_SYMBOL vmlinux 0xc565b449	blk_plug_device_unlocked
+EXPORT_SYMBOL vmlinux 0xc5718627	sg_copy_to_buffer
+EXPORT_SYMBOL vmlinux 0xc584bea6	jbd2_journal_start_commit
+EXPORT_SYMBOL vmlinux 0xc5b41b3a	sync_blockdev
+EXPORT_SYMBOL vmlinux 0xc5ceae92	tty_register_ldisc
+EXPORT_SYMBOL vmlinux 0xc5dccf80	simple_readpage
+EXPORT_SYMBOL vmlinux 0xc5f240a7	call_usermodehelper_setcleanup
+EXPORT_SYMBOL vmlinux 0xc5ff45e4	disk_stack_limits
+EXPORT_SYMBOL vmlinux 0xc609f8b3	proc_net_netfilter
+EXPORT_SYMBOL vmlinux 0xc61204a3	thermal_zone_device_unregister
+EXPORT_SYMBOL vmlinux 0xc633495b	schedule_work
+EXPORT_SYMBOL vmlinux 0xc6339d9c	d_alloc
+EXPORT_SYMBOL vmlinux 0xc64b8442	copy_io_context
+EXPORT_SYMBOL vmlinux 0xc65e9cc6	dquot_reserve_space
+EXPORT_SYMBOL vmlinux 0xc670502b	sock_create
+EXPORT_SYMBOL vmlinux 0xc696ebc1	blk_start_queue
+EXPORT_SYMBOL vmlinux 0xc6b0a886	dquot_alloc_space
+EXPORT_SYMBOL vmlinux 0xc6d0bb62	xfrm_dst_ifdown
+EXPORT_SYMBOL vmlinux 0xc6da9cf1	simple_write_end
+EXPORT_SYMBOL vmlinux 0xc7131591	pcibios_align_resource
+EXPORT_SYMBOL vmlinux 0xc7208c3a	serial8250_resume_port
+EXPORT_SYMBOL vmlinux 0xc722227e	posix_acl_clone
+EXPORT_SYMBOL vmlinux 0xc72a2f7f	page_symlink
+EXPORT_SYMBOL vmlinux 0xc768de19	cpu_all_bits
+EXPORT_SYMBOL vmlinux 0xc7762544	pagecache_write_begin
+EXPORT_SYMBOL vmlinux 0xc79bcd36	dm_vcalloc
+EXPORT_SYMBOL vmlinux 0xc7a4fbed	rtnl_lock
+EXPORT_SYMBOL vmlinux 0xc7d9c5b4	load_nls_default
+EXPORT_SYMBOL vmlinux 0xc7e0959c	blkdev_put
+EXPORT_SYMBOL vmlinux 0xc7ec6c27	strspn
+EXPORT_SYMBOL vmlinux 0xc88906b7	pnp_unregister_driver
+EXPORT_SYMBOL vmlinux 0xc898625d	atomic64_inc_and_test
+EXPORT_SYMBOL vmlinux 0xc8a1d54c	mb_cache_entry_find_next
+EXPORT_SYMBOL vmlinux 0xc8b57c27	autoremove_wake_function
+EXPORT_SYMBOL vmlinux 0xc8ca3e25	acpi_get_child
+EXPORT_SYMBOL vmlinux 0xc8d21651	bdget
+EXPORT_SYMBOL vmlinux 0xc8d8331b	__elv_add_request
+EXPORT_SYMBOL vmlinux 0xc8e9becc	bioset_create
+EXPORT_SYMBOL vmlinux 0xc9070ab8	scsi_host_alloc
+EXPORT_SYMBOL vmlinux 0xc93e3a7c	truncate_pagecache
+EXPORT_SYMBOL vmlinux 0xc960381d	simple_statfs
+EXPORT_SYMBOL vmlinux 0xc97f2298	fb_class
+EXPORT_SYMBOL vmlinux 0xc98d69ef	xfrm_unregister_type
+EXPORT_SYMBOL vmlinux 0xc998d641	icmp_err_convert
+EXPORT_SYMBOL vmlinux 0xc9a95137	bio_put
+EXPORT_SYMBOL vmlinux 0xc9ab2eef	acpi_os_wait_events_complete
+EXPORT_SYMBOL vmlinux 0xc9ae5afd	sock_get_timestampns
+EXPORT_SYMBOL vmlinux 0xc9babec2	jbd2_journal_force_commit_nested
+EXPORT_SYMBOL vmlinux 0xc9db276a	uart_register_driver
+EXPORT_SYMBOL vmlinux 0xc9ec8704	udp_table
+EXPORT_SYMBOL vmlinux 0xc9f59b6a	acpi_processor_notify_smm
+EXPORT_SYMBOL vmlinux 0xca075d5d	i2c_smbus_read_byte_data
+EXPORT_SYMBOL vmlinux 0xca34e3be	bdput
+EXPORT_SYMBOL vmlinux 0xca5dbc50	scsi_print_sense_hdr
+EXPORT_SYMBOL vmlinux 0xca72c64c	datagram_poll
+EXPORT_SYMBOL vmlinux 0xca854bbc	pci_scan_bus_parented
+EXPORT_SYMBOL vmlinux 0xca8acc78	acpi_dbg_level
+EXPORT_SYMBOL vmlinux 0xcaff50d4	skb_unlink
+EXPORT_SYMBOL vmlinux 0xcb29db71	ps2_command
+EXPORT_SYMBOL vmlinux 0xcb2aa9a1	sk_release_kernel
+EXPORT_SYMBOL vmlinux 0xcb2e56af	jbd2_journal_init_jbd_inode
+EXPORT_SYMBOL vmlinux 0xcb54df4e	__bforget
+EXPORT_SYMBOL vmlinux 0xcb6beb40	hweight32
+EXPORT_SYMBOL vmlinux 0xcb7131fb	fb_get_options
+EXPORT_SYMBOL vmlinux 0xcb733bf2	acpi_bus_set_power
+EXPORT_SYMBOL vmlinux 0xcb7b7539	nla_put_nohdr
+EXPORT_SYMBOL vmlinux 0xcb9aa59a	get_fs_type
+EXPORT_SYMBOL vmlinux 0xcb9f80d4	blk_rq_init
+EXPORT_SYMBOL vmlinux 0xcbdba993	scsi_device_resume
+EXPORT_SYMBOL vmlinux 0xcc1fef1d	elv_dispatch_sort
+EXPORT_SYMBOL vmlinux 0xcc248d26	serial8250_suspend_port
+EXPORT_SYMBOL vmlinux 0xcc36f32e	fb_unregister_client
+EXPORT_SYMBOL vmlinux 0xcc3c136d	key_validate
+EXPORT_SYMBOL vmlinux 0xcc5005fe	msleep_interruptible
+EXPORT_SYMBOL vmlinux 0xcc51ee50	dma_spin_lock
+EXPORT_SYMBOL vmlinux 0xcc7061c2	d_instantiate_unique
+EXPORT_SYMBOL vmlinux 0xcc7fa952	local_bh_enable_ip
+EXPORT_SYMBOL vmlinux 0xcc967b41	tcf_exts_dump
+EXPORT_SYMBOL vmlinux 0xcc9c9b5c	set_pages_nx
+EXPORT_SYMBOL vmlinux 0xcc9f4482	__module_put_and_exit
+EXPORT_SYMBOL vmlinux 0xcca076b3	skb_checksum_help
+EXPORT_SYMBOL vmlinux 0xccad6fe2	neigh_ifdown
+EXPORT_SYMBOL vmlinux 0xccb303cc	register_quota_format
+EXPORT_SYMBOL vmlinux 0xccc986bb	pci_enable_device
+EXPORT_SYMBOL vmlinux 0xccd7d698	mb_cache_shrink
+EXPORT_SYMBOL vmlinux 0xcd0a9901	ip6_route_output
+EXPORT_SYMBOL vmlinux 0xcd11ce9f	generic_listxattr
+EXPORT_SYMBOL vmlinux 0xcd6d9988	netlink_dump_start
+EXPORT_SYMBOL vmlinux 0xcd6fc2d3	setup_arg_pages
+EXPORT_SYMBOL vmlinux 0xcd82f954	vfs_getattr
+EXPORT_SYMBOL vmlinux 0xcd9708e7	cdev_alloc
+EXPORT_SYMBOL vmlinux 0xcd9eb006	nf_getsockopt
+EXPORT_SYMBOL vmlinux 0xcda4e606	sock_no_poll
+EXPORT_SYMBOL vmlinux 0xcdc5a282	linkwatch_fire_event
+EXPORT_SYMBOL vmlinux 0xcdcf7869	skb_clone
+EXPORT_SYMBOL vmlinux 0xcdf87af9	kobject_add
+EXPORT_SYMBOL vmlinux 0xce19bac5	register_inet6addr_notifier
+EXPORT_SYMBOL vmlinux 0xce36ded6	sysctl_tcp_mem
+EXPORT_SYMBOL vmlinux 0xce3c1105	d_splice_alias
+EXPORT_SYMBOL vmlinux 0xce4904a4	acpi_leave_sleep_state
+EXPORT_SYMBOL vmlinux 0xce555072	blk_run_queue
+EXPORT_SYMBOL vmlinux 0xce5ac24f	zlib_inflate_workspacesize
+EXPORT_SYMBOL vmlinux 0xce5c87d0	inode_add_bytes
+EXPORT_SYMBOL vmlinux 0xce68f886	udp_sendmsg
+EXPORT_SYMBOL vmlinux 0xce88e20c	__inet6_lookup_established
+EXPORT_SYMBOL vmlinux 0xce8be872	scsi_put_command
+EXPORT_SYMBOL vmlinux 0xceaedac8	__nla_reserve_nohdr
+EXPORT_SYMBOL vmlinux 0xceb00f40	napi_gro_flush
+EXPORT_SYMBOL vmlinux 0xcebaba61	nobh_truncate_page
+EXPORT_SYMBOL vmlinux 0xcee4dfef	tcp_v4_destroy_sock
+EXPORT_SYMBOL vmlinux 0xcefcd99a	serial8250_unregister_port
+EXPORT_SYMBOL vmlinux 0xcf09cdfe	tcf_exts_validate
+EXPORT_SYMBOL vmlinux 0xcf1d28ab	acpi_error
+EXPORT_SYMBOL vmlinux 0xcf1e9749	blk_queue_max_sectors
+EXPORT_SYMBOL vmlinux 0xcf438fc4	pcie_port_service_register
+EXPORT_SYMBOL vmlinux 0xcf5b6700	writeback_inodes_sb
+EXPORT_SYMBOL vmlinux 0xcf6cfe1f	msrs_free
+EXPORT_SYMBOL vmlinux 0xcf7ca58f	inet6_register_protosw
+EXPORT_SYMBOL vmlinux 0xcf91be79	scsi_add_device
+EXPORT_SYMBOL vmlinux 0xcfa120b5	scsi_init_io
+EXPORT_SYMBOL vmlinux 0xcfadd723	__percpu_counter_add
+EXPORT_SYMBOL vmlinux 0xcfb9006e	jiffies_to_timeval
+EXPORT_SYMBOL vmlinux 0xcfd01b14	udplite_prot
+EXPORT_SYMBOL vmlinux 0xcfe05d4d	register_kmmio_probe
+EXPORT_SYMBOL vmlinux 0xcfeeb0ba	revert_creds
+EXPORT_SYMBOL vmlinux 0xcff26b4b	fb_find_mode
+EXPORT_SYMBOL vmlinux 0xcff53400	kref_put
+EXPORT_SYMBOL vmlinux 0xcff799fe	security_task_getsecid
+EXPORT_SYMBOL vmlinux 0xd0008a03	blk_queue_softirq_done
+EXPORT_SYMBOL vmlinux 0xd015916e	vfs_link
+EXPORT_SYMBOL vmlinux 0xd0181f4f	__bitmap_xor
+EXPORT_SYMBOL vmlinux 0xd037e855	mca_register_driver
+EXPORT_SYMBOL vmlinux 0xd040201c	inode_newsize_ok
+EXPORT_SYMBOL vmlinux 0xd042f655	unregister_cdrom
+EXPORT_SYMBOL vmlinux 0xd05ca4f4	remove_proc_entry
+EXPORT_SYMBOL vmlinux 0xd07a9b0b	pci_release_selected_regions
+EXPORT_SYMBOL vmlinux 0xd07ed584	tty_free_termios
+EXPORT_SYMBOL vmlinux 0xd08197fa	acpi_load_tables
+EXPORT_SYMBOL vmlinux 0xd09e5bd3	blk_queue_io_min
+EXPORT_SYMBOL vmlinux 0xd0d8621b	strlen
+EXPORT_SYMBOL vmlinux 0xd0eb8db7	devm_ioremap_nocache
+EXPORT_SYMBOL vmlinux 0xd0ee38b8	schedule_timeout_uninterruptible
+EXPORT_SYMBOL vmlinux 0xd0f8ac9f	mmc_unregister_driver
+EXPORT_SYMBOL vmlinux 0xd1087298	lease_get_mtime
+EXPORT_SYMBOL vmlinux 0xd12222e6	lease_modify
+EXPORT_SYMBOL vmlinux 0xd1472061	acpi_pci_register_driver
+EXPORT_SYMBOL vmlinux 0xd17ecc22	per_cpu__cpu_sibling_map
+EXPORT_SYMBOL vmlinux 0xd182e25b	alloc_hippi_dev
+EXPORT_SYMBOL vmlinux 0xd18b6eb2	acpi_unmap_lsapic
+EXPORT_SYMBOL vmlinux 0xd1ae7161	do_sync_read
+EXPORT_SYMBOL vmlinux 0xd1e890f9	kunmap_atomic
+EXPORT_SYMBOL vmlinux 0xd1f44e7d	tty_pair_get_tty
+EXPORT_SYMBOL vmlinux 0xd1f6c5f3	smp_num_siblings
+EXPORT_SYMBOL vmlinux 0xd1f91bcd	dev_base_lock
+EXPORT_SYMBOL vmlinux 0xd1fb24d1	sysctl_ms_jiffies
+EXPORT_SYMBOL vmlinux 0xd230c4b4	read_cache_page_gfp
+EXPORT_SYMBOL vmlinux 0xd23a73dd	mdiobus_alloc
+EXPORT_SYMBOL vmlinux 0xd251d7b0	security_socket_getpeersec_dgram
+EXPORT_SYMBOL vmlinux 0xd2555f19	jiffies_64_to_clock_t
+EXPORT_SYMBOL vmlinux 0xd25d4f74	console_blank_hook
+EXPORT_SYMBOL vmlinux 0xd267d42c	down_killable
+EXPORT_SYMBOL vmlinux 0xd28b03fe	set_pages_x
+EXPORT_SYMBOL vmlinux 0xd2965f6f	kthread_should_stop
+EXPORT_SYMBOL vmlinux 0xd29b76d9	ip4_datagram_connect
+EXPORT_SYMBOL vmlinux 0xd2a68761	proc_dointvec_ms_jiffies
+EXPORT_SYMBOL vmlinux 0xd2a75ee0	dmi_first_match
+EXPORT_SYMBOL vmlinux 0xd2a941d4	sg_init_table
+EXPORT_SYMBOL vmlinux 0xd2b84411	input_unregister_handler
+EXPORT_SYMBOL vmlinux 0xd321ce11	mdiobus_register
+EXPORT_SYMBOL vmlinux 0xd328f8c4	generic_splice_sendpage
+EXPORT_SYMBOL vmlinux 0xd32b3168	dm_io_client_resize
+EXPORT_SYMBOL vmlinux 0xd32e52c7	posix_acl_chmod_masq
+EXPORT_SYMBOL vmlinux 0xd32f2a63	address_space_init_once
+EXPORT_SYMBOL vmlinux 0xd337d123	sg_miter_next
+EXPORT_SYMBOL vmlinux 0xd34f0c62	gen_pool_create
+EXPORT_SYMBOL vmlinux 0xd359a0c9	sock_no_getname
+EXPORT_SYMBOL vmlinux 0xd35a46d3	pci_get_slot
+EXPORT_SYMBOL vmlinux 0xd3837438	netdev_state_change
+EXPORT_SYMBOL vmlinux 0xd3951da4	acpi_resource_to_address64
+EXPORT_SYMBOL vmlinux 0xd3a42bd2	neigh_sysctl_unregister
+EXPORT_SYMBOL vmlinux 0xd3adf81d	serio_unregister_port
+EXPORT_SYMBOL vmlinux 0xd3d3df0b	blkdev_issue_discard
+EXPORT_SYMBOL vmlinux 0xd3e0c9af	rfkill_set_hw_state
+EXPORT_SYMBOL vmlinux 0xd3e288f7	__locks_copy_lock
+EXPORT_SYMBOL vmlinux 0xd3ea9924	__set_page_dirty_nobuffers
+EXPORT_SYMBOL vmlinux 0xd3f74cf1	interruptible_sleep_on_timeout
+EXPORT_SYMBOL vmlinux 0xd3f91bb9	textsearch_find_continuous
+EXPORT_SYMBOL vmlinux 0xd418e1c0	adjust_resource
+EXPORT_SYMBOL vmlinux 0xd42b7232	_write_unlock_bh
+EXPORT_SYMBOL vmlinux 0xd4645c65	eisa_driver_register
+EXPORT_SYMBOL vmlinux 0xd488483f	pci_pme_capable
+EXPORT_SYMBOL vmlinux 0xd4add7fc	xfrm_find_acq_byseq
+EXPORT_SYMBOL vmlinux 0xd4b7f0fa	follow_up
+EXPORT_SYMBOL vmlinux 0xd5036d4a	__wait_on_buffer
+EXPORT_SYMBOL vmlinux 0xd50fef48	acpi_detach_data
+EXPORT_SYMBOL vmlinux 0xd51b0959	mod_zone_page_state
+EXPORT_SYMBOL vmlinux 0xd51f2c25	md_wakeup_thread
+EXPORT_SYMBOL vmlinux 0xd5263820	mb_cache_destroy
+EXPORT_SYMBOL vmlinux 0xd54343d2	pnp_device_detach
+EXPORT_SYMBOL vmlinux 0xd5688a7a	radix_tree_insert
+EXPORT_SYMBOL vmlinux 0xd577b919	ipv6_skip_exthdr
+EXPORT_SYMBOL vmlinux 0xd57fa27a	scsi_target_resume
+EXPORT_SYMBOL vmlinux 0xd594db83	neigh_event_ns
+EXPORT_SYMBOL vmlinux 0xd59c350d	vfs_dq_transfer
+EXPORT_SYMBOL vmlinux 0xd60a0c7b	serio_open
+EXPORT_SYMBOL vmlinux 0xd62c833f	schedule_timeout
+EXPORT_SYMBOL vmlinux 0xd665f792	inc_zone_page_state
+EXPORT_SYMBOL vmlinux 0xd66fe310	clear_bdi_congested
+EXPORT_SYMBOL vmlinux 0xd69977c3	inet_csk_reset_keepalive_timer
+EXPORT_SYMBOL vmlinux 0xd6a78d08	smp_call_function_single
+EXPORT_SYMBOL vmlinux 0xd6b123f1	napi_complete
+EXPORT_SYMBOL vmlinux 0xd6b33026	cpu_khz
+EXPORT_SYMBOL vmlinux 0xd6b79305	iov_iter_copy_from_user_atomic
+EXPORT_SYMBOL vmlinux 0xd6e457e7	tcp_md5_hash_key
+EXPORT_SYMBOL vmlinux 0xd6ee688f	vmalloc
+EXPORT_SYMBOL vmlinux 0xd6f9e26f	ppp_register_channel
+EXPORT_SYMBOL vmlinux 0xd6fd40b5	set_create_files_as
+EXPORT_SYMBOL vmlinux 0xd7027dee	d_obtain_alias
+EXPORT_SYMBOL vmlinux 0xd70e6ea5	i2c_get_adapter
+EXPORT_SYMBOL vmlinux 0xd723ba09	tty_pair_get_pty
+EXPORT_SYMBOL vmlinux 0xd724e229	simple_lookup
+EXPORT_SYMBOL vmlinux 0xd75b2771	journal_force_commit_nested
+EXPORT_SYMBOL vmlinux 0xd75f406f	seq_release_private
+EXPORT_SYMBOL vmlinux 0xd76ab32e	md_register_thread
+EXPORT_SYMBOL vmlinux 0xd77a5aa5	__bitmap_and
+EXPORT_SYMBOL vmlinux 0xd78b5f7e	create_mnt_ns
+EXPORT_SYMBOL vmlinux 0xd79b5a02	allow_signal
+EXPORT_SYMBOL vmlinux 0xd7a6fafa	panic_notifier_list
+EXPORT_SYMBOL vmlinux 0xd7bb295a	filemap_fdatawrite_range
+EXPORT_SYMBOL vmlinux 0xd7cf81ae	dev_set_allmulti
+EXPORT_SYMBOL vmlinux 0xd7d2e83e	acpi_evaluate_object_typed
+EXPORT_SYMBOL vmlinux 0xd7d36d1a	idr_find
+EXPORT_SYMBOL vmlinux 0xd7d67687	get_io_context
+EXPORT_SYMBOL vmlinux 0xd7dc5f52	skb_over_panic
+EXPORT_SYMBOL vmlinux 0xd7dd777b	reserve_perfctr_nmi
+EXPORT_SYMBOL vmlinux 0xd811db13	journal_flush
+EXPORT_SYMBOL vmlinux 0xd815e319	generic_getxattr
+EXPORT_SYMBOL vmlinux 0xd82613c0	atomic64_sub_and_test
+EXPORT_SYMBOL vmlinux 0xd8282ff0	posix_acl_equiv_mode
+EXPORT_SYMBOL vmlinux 0xd837549c	filemap_write_and_wait
+EXPORT_SYMBOL vmlinux 0xd83791bc	nf_conntrack_destroy
+EXPORT_SYMBOL vmlinux 0xd851af78	up_write
+EXPORT_SYMBOL vmlinux 0xd859421c	security_sb_set_mnt_opts
+EXPORT_SYMBOL vmlinux 0xd859a032	security_path_mkdir
+EXPORT_SYMBOL vmlinux 0xd88dd01a	i2c_register_driver
+EXPORT_SYMBOL vmlinux 0xd89a81a2	xfrm_register_mode
+EXPORT_SYMBOL vmlinux 0xd89da37f	movable_zone
+EXPORT_SYMBOL vmlinux 0xd8a2ab95	in_egroup_p
+EXPORT_SYMBOL vmlinux 0xd8a32071	clocksource_register
+EXPORT_SYMBOL vmlinux 0xd8a65c38	atomic64_sub
+EXPORT_SYMBOL vmlinux 0xd8ac3add	pcie_port_service_unregister
+EXPORT_SYMBOL vmlinux 0xd8ac4f09	dm_dirty_log_destroy
+EXPORT_SYMBOL vmlinux 0xd8e484f0	register_chrdev_region
+EXPORT_SYMBOL vmlinux 0xd9091363	acpi_install_notify_handler
+EXPORT_SYMBOL vmlinux 0xd963a74a	flush_delayed_work
+EXPORT_SYMBOL vmlinux 0xd963b19c	journal_forget
+EXPORT_SYMBOL vmlinux 0xd96f1970	pci_set_dma_seg_boundary
+EXPORT_SYMBOL vmlinux 0xd977e355	wait_on_sync_kiocb
+EXPORT_SYMBOL vmlinux 0xd985dc99	mempool_free_pages
+EXPORT_SYMBOL vmlinux 0xd9916004	tcp_sendpage
+EXPORT_SYMBOL vmlinux 0xd9944853	n_tty_ioctl_helper
+EXPORT_SYMBOL vmlinux 0xd996d859	idr_pre_get
+EXPORT_SYMBOL vmlinux 0xd999c118	dma_alloc_from_coherent
+EXPORT_SYMBOL vmlinux 0xd9c272aa	mca_mark_as_unused
+EXPORT_SYMBOL vmlinux 0xd9fcd9d2	nobh_write_begin
+EXPORT_SYMBOL vmlinux 0xda08c0d7	pcibios_get_irq_routing_table
+EXPORT_SYMBOL vmlinux 0xda0a6b0e	acpi_map_lsapic
+EXPORT_SYMBOL vmlinux 0xda1a7335	kasprintf
+EXPORT_SYMBOL vmlinux 0xda2f75a4	ppp_input_error
+EXPORT_SYMBOL vmlinux 0xda3863ca	inet_frag_kill
+EXPORT_SYMBOL vmlinux 0xda455c7b	scsi_eh_finish_cmd
+EXPORT_SYMBOL vmlinux 0xda495034	__nla_reserve
+EXPORT_SYMBOL vmlinux 0xda6d8ad0	request_firmware
+EXPORT_SYMBOL vmlinux 0xda7ca6cb	fb_mode_is_equal
+EXPORT_SYMBOL vmlinux 0xda8af7ad	fb_find_nearest_mode
+EXPORT_SYMBOL vmlinux 0xda8fd495	isapnp_write_byte
+EXPORT_SYMBOL vmlinux 0xda928914	nmi_watchdog
+EXPORT_SYMBOL vmlinux 0xdaa2013e	xfrm_prepare_input
+EXPORT_SYMBOL vmlinux 0xdaa57ec3	totalhigh_pages
+EXPORT_SYMBOL vmlinux 0xdaaa7bb2	lro_receive_skb
+EXPORT_SYMBOL vmlinux 0xdabe4635	in_dev_finish_destroy
+EXPORT_SYMBOL vmlinux 0xdac5cc33	mmc_detect_change
+EXPORT_SYMBOL vmlinux 0xdadbc5d2	phy_driver_unregister
+EXPORT_SYMBOL vmlinux 0xdaddc75c	xfrm_state_add
+EXPORT_SYMBOL vmlinux 0xdb3dfd22	vfs_llseek
+EXPORT_SYMBOL vmlinux 0xdb4c88b4	groups_alloc
+EXPORT_SYMBOL vmlinux 0xdb858f7c	tty_port_tty_get
+EXPORT_SYMBOL vmlinux 0xdb864d65	iov_iter_single_seg_count
+EXPORT_SYMBOL vmlinux 0xdbcd416e	sysctl_ip_nonlocal_bind
+EXPORT_SYMBOL vmlinux 0xdbe85954	nf_log_register
+EXPORT_SYMBOL vmlinux 0xdc047fc4	scsi_dev_info_list_add_keyed
+EXPORT_SYMBOL vmlinux 0xdc053205	udp_memory_allocated
+EXPORT_SYMBOL vmlinux 0xdc0e0704	journal_create
+EXPORT_SYMBOL vmlinux 0xdc14eda7	pci_pci_problems
+EXPORT_SYMBOL vmlinux 0xdc1a2d91	vfs_quota_on_path
+EXPORT_SYMBOL vmlinux 0xdc2adb35	add_taint
+EXPORT_SYMBOL vmlinux 0xdc43a9c8	daemonize
+EXPORT_SYMBOL vmlinux 0xdc4577ef	i2c_transfer
+EXPORT_SYMBOL vmlinux 0xdc50cfee	gnet_stats_finish_copy
+EXPORT_SYMBOL vmlinux 0xdc873a70	screen_info
+EXPORT_SYMBOL vmlinux 0xdca0e950	genl_register_family
+EXPORT_SYMBOL vmlinux 0xdcb2b4af	vfs_readdir
+EXPORT_SYMBOL vmlinux 0xdce7f205	uart_match_port
+EXPORT_SYMBOL vmlinux 0xdd0a2ba2	strlcat
+EXPORT_SYMBOL vmlinux 0xdd201630	mmc_wait_for_cmd
+EXPORT_SYMBOL vmlinux 0xdd24c826	tcf_exts_destroy
+EXPORT_SYMBOL vmlinux 0xdd2d285d	dma_async_device_unregister
+EXPORT_SYMBOL vmlinux 0xdd3b390b	filemap_write_and_wait_range
+EXPORT_SYMBOL vmlinux 0xdd6bfccd	radix_tree_tag_set
+EXPORT_SYMBOL vmlinux 0xdd85a58d	remap_vmalloc_range
+EXPORT_SYMBOL vmlinux 0xddca30fc	tcp_sendmsg
+EXPORT_SYMBOL vmlinux 0xddcec3f2	simple_transaction_read
+EXPORT_SYMBOL vmlinux 0xddd15330	jbd2_journal_stop
+EXPORT_SYMBOL vmlinux 0xddfaa6a5	pci_bus_read_config_byte
+EXPORT_SYMBOL vmlinux 0xde00856d	elv_rb_find
+EXPORT_SYMBOL vmlinux 0xde027238	pv_mmu_ops
+EXPORT_SYMBOL vmlinux 0xde15b1ff	elv_add_request
+EXPORT_SYMBOL vmlinux 0xde17f5f2	inode_set_bytes
+EXPORT_SYMBOL vmlinux 0xde1fd694	acpi_processor_preregister_performance
+EXPORT_SYMBOL vmlinux 0xde2a20fd	default_llseek
+EXPORT_SYMBOL vmlinux 0xde31b902	blk_limits_io_opt
+EXPORT_SYMBOL vmlinux 0xde75b689	set_irq_type
+EXPORT_SYMBOL vmlinux 0xde9360ba	totalram_pages
+EXPORT_SYMBOL vmlinux 0xdeabe977	kmem_cache_alloc
+EXPORT_SYMBOL vmlinux 0xdeeb4950	sync_inodes_sb
+EXPORT_SYMBOL vmlinux 0xdf03a6b6	tcp_v4_send_check
+EXPORT_SYMBOL vmlinux 0xdf0da3cc	acpi_get_devices
+EXPORT_SYMBOL vmlinux 0xdf427c5c	skb_pad
+EXPORT_SYMBOL vmlinux 0xdf4c8767	ns_to_timeval
+EXPORT_SYMBOL vmlinux 0xdf5d5c2a	scsi_target_quiesce
+EXPORT_SYMBOL vmlinux 0xdf60cc27	__print_symbol
+EXPORT_SYMBOL vmlinux 0xdf711c7b	bio_init
+EXPORT_SYMBOL vmlinux 0xdf810e8f	ip_mc_dec_group
+EXPORT_SYMBOL vmlinux 0xdf8c695a	__ndelay
+EXPORT_SYMBOL vmlinux 0xdf929370	fs_overflowgid
+EXPORT_SYMBOL vmlinux 0xdfa068bf	tcf_unregister_action
+EXPORT_SYMBOL vmlinux 0xdfb89072	llc_sap_find
+EXPORT_SYMBOL vmlinux 0xdfc5169b	slhc_init
+EXPORT_SYMBOL vmlinux 0xdfc88be9	genphy_suspend
+EXPORT_SYMBOL vmlinux 0xdfd0c4b3	thaw_process
+EXPORT_SYMBOL vmlinux 0xdfed6681	ethtool_op_get_sg
+EXPORT_SYMBOL vmlinux 0xdfed75ea	pcix_set_mmrbc
+EXPORT_SYMBOL vmlinux 0xdfed924c	fb_get_buffer_offset
+EXPORT_SYMBOL vmlinux 0xe006774a	pci_set_master
+EXPORT_SYMBOL vmlinux 0xe0158a22	ip_defrag
+EXPORT_SYMBOL vmlinux 0xe019a749	request_key_async_with_auxdata
+EXPORT_SYMBOL vmlinux 0xe026e353	simple_unlink
+EXPORT_SYMBOL vmlinux 0xe0557abf	lro_vlan_hwaccel_receive_skb
+EXPORT_SYMBOL vmlinux 0xe074048a	xfrm_state_unregister_afinfo
+EXPORT_SYMBOL vmlinux 0xe075d6eb	iter_div_u64_rem
+EXPORT_SYMBOL vmlinux 0xe082651a	pci_bus_write_config_byte
+EXPORT_SYMBOL vmlinux 0xe08558d4	init_special_inode
+EXPORT_SYMBOL vmlinux 0xe094ef39	sg_next
+EXPORT_SYMBOL vmlinux 0xe0a501e3	idr_remove_all
+EXPORT_SYMBOL vmlinux 0xe0a65869	neigh_connected_output
+EXPORT_SYMBOL vmlinux 0xe0ac8bd2	acpi_bus_generate_netlink_event
+EXPORT_SYMBOL vmlinux 0xe0b13336	argv_free
+EXPORT_SYMBOL vmlinux 0xe0bc24a1	param_set_ushort
+EXPORT_SYMBOL vmlinux 0xe0c42e52	scsi_remove_device
+EXPORT_SYMBOL vmlinux 0xe0e00045	tcp_splice_read
+EXPORT_SYMBOL vmlinux 0xe0ef087e	sock_no_sendpage
+EXPORT_SYMBOL vmlinux 0xe0f105a3	acpi_processor_unregister_performance
+EXPORT_SYMBOL vmlinux 0xe0fa3a68	open_bdev_exclusive
+EXPORT_SYMBOL vmlinux 0xe1048212	init_net
+EXPORT_SYMBOL vmlinux 0xe1149939	genl_register_family_with_ops
+EXPORT_SYMBOL vmlinux 0xe1338b91	mmc_set_data_timeout
+EXPORT_SYMBOL vmlinux 0xe13cd8a7	dmi_name_in_vendors
+EXPORT_SYMBOL vmlinux 0xe13ec1dc	scsi_print_command
+EXPORT_SYMBOL vmlinux 0xe1596872	per_cpu__irq_stat
+EXPORT_SYMBOL vmlinux 0xe1712d99	clocksource_unregister
+EXPORT_SYMBOL vmlinux 0xe1761617	security_inet_conn_request
+EXPORT_SYMBOL vmlinux 0xe1959d90	rfkill_set_states
+EXPORT_SYMBOL vmlinux 0xe1a81c3a	icmpv6msg_statistics
+EXPORT_SYMBOL vmlinux 0xe1dd9288	pcim_iomap_regions_request_all
+EXPORT_SYMBOL vmlinux 0xe1f043cb	sk_stream_wait_close
+EXPORT_SYMBOL vmlinux 0xe1fbc30d	scsi_remove_target
+EXPORT_SYMBOL vmlinux 0xe20269d6	pskb_copy
+EXPORT_SYMBOL vmlinux 0xe22b346f	follow_down
+EXPORT_SYMBOL vmlinux 0xe23ae481	blk_iopoll_complete
+EXPORT_SYMBOL vmlinux 0xe23d7acb	up_read
+EXPORT_SYMBOL vmlinux 0xe23eddbc	vlan_gro_receive
+EXPORT_SYMBOL vmlinux 0xe247a587	get_disk
+EXPORT_SYMBOL vmlinux 0xe24d3a97	jiffies_64
+EXPORT_SYMBOL vmlinux 0xe25946ba	pci_release_regions
+EXPORT_SYMBOL vmlinux 0xe2962e54	jbd2_log_start_commit
+EXPORT_SYMBOL vmlinux 0xe2a5773c	mutex_lock_interruptible
+EXPORT_SYMBOL vmlinux 0xe2d43c5f	blk_register_region
+EXPORT_SYMBOL vmlinux 0xe2d49ab7	pci_iounmap
+EXPORT_SYMBOL vmlinux 0xe2d5255a	strcmp
+EXPORT_SYMBOL vmlinux 0xe2e8065e	memdup_user
+EXPORT_SYMBOL vmlinux 0xe2e914a4	pipe_to_file
+EXPORT_SYMBOL vmlinux 0xe2fae716	kmemdup
+EXPORT_SYMBOL vmlinux 0xe3002277	ndisc_send_skb
+EXPORT_SYMBOL vmlinux 0xe303d9ea	elv_rb_add
+EXPORT_SYMBOL vmlinux 0xe33c3c8f	key_alloc
+EXPORT_SYMBOL vmlinux 0xe34a8289	__skb_checksum_complete_head
+EXPORT_SYMBOL vmlinux 0xe3690e24	register_nls
+EXPORT_SYMBOL vmlinux 0xe36ce589	jbd2_journal_init_inode
+EXPORT_SYMBOL vmlinux 0xe3865969	mmc_alloc_host
+EXPORT_SYMBOL vmlinux 0xe3891347	__getblk
+EXPORT_SYMBOL vmlinux 0xe3a3aa03	__skb_recv_datagram
+EXPORT_SYMBOL vmlinux 0xe3b2c23d	mapping_tagged
+EXPORT_SYMBOL vmlinux 0xe3fbe148	acpi_install_table_handler
+EXPORT_SYMBOL vmlinux 0xe42ebe00	blk_queue_bounce
+EXPORT_SYMBOL vmlinux 0xe431b004	__splice_from_pipe
+EXPORT_SYMBOL vmlinux 0xe43617f7	acpi_gbl_FADT
+EXPORT_SYMBOL vmlinux 0xe44790bb	skb_copy_datagram_const_iovec
+EXPORT_SYMBOL vmlinux 0xe456bd3a	complete
+EXPORT_SYMBOL vmlinux 0xe4604a18	mb_cache_entry_release
+EXPORT_SYMBOL vmlinux 0xe471f273	__serio_register_port
+EXPORT_SYMBOL vmlinux 0xe484e35f	ioread32
+EXPORT_SYMBOL vmlinux 0xe4870354	_read_trylock
+EXPORT_SYMBOL vmlinux 0xe48f3039	ida_get_new_above
+EXPORT_SYMBOL vmlinux 0xe4c1df3e	_read_lock_bh
+EXPORT_SYMBOL vmlinux 0xe4d128b0	kmem_cache_size
+EXPORT_SYMBOL vmlinux 0xe4d45366	vmtruncate
+EXPORT_SYMBOL vmlinux 0xe4dd4a39	sysctl_data
+EXPORT_SYMBOL vmlinux 0xe4e14df9	dm_exception_store_type_register
+EXPORT_SYMBOL vmlinux 0xe4f1695e	cookie_check_timestamp
+EXPORT_SYMBOL vmlinux 0xe523ad75	synchronize_irq
+EXPORT_SYMBOL vmlinux 0xe53f0cb6	pci_claim_resource
+EXPORT_SYMBOL vmlinux 0xe545488b	test_set_page_writeback
+EXPORT_SYMBOL vmlinux 0xe56d24c0	dev_set_mac_address
+EXPORT_SYMBOL vmlinux 0xe57878a1	in6_pton
+EXPORT_SYMBOL vmlinux 0xe5867808	dlci_ioctl_set
+EXPORT_SYMBOL vmlinux 0xe58850a2	framebuffer_release
+EXPORT_SYMBOL vmlinux 0xe5a73d4c	vfs_set_dqblk
+EXPORT_SYMBOL vmlinux 0xe5c78a99	do_blank_screen
+EXPORT_SYMBOL vmlinux 0xe5db116a	bmap
+EXPORT_SYMBOL vmlinux 0xe5eb474c	otg_get_transceiver
+EXPORT_SYMBOL vmlinux 0xe5ed5467	xfrm_policy_walk_init
+EXPORT_SYMBOL vmlinux 0xe690b8fd	__ipv6_isatap_ifid
+EXPORT_SYMBOL vmlinux 0xe697d108	__blk_iopoll_complete
+EXPORT_SYMBOL vmlinux 0xe6a74602	acpi_bus_unregister_driver
+EXPORT_SYMBOL vmlinux 0xe6c2ffc0	pneigh_lookup
+EXPORT_SYMBOL vmlinux 0xe6d8914c	block_write_full_page
+EXPORT_SYMBOL vmlinux 0xe6ebc016	key_create_or_update
+EXPORT_SYMBOL vmlinux 0xe6f18999	tty_port_init
+EXPORT_SYMBOL vmlinux 0xe6fbe430	can_do_mlock
+EXPORT_SYMBOL vmlinux 0xe714375c	__tasklet_hi_schedule_first
+EXPORT_SYMBOL vmlinux 0xe716baed	acpi_unregister_ioapic
+EXPORT_SYMBOL vmlinux 0xe780fe53	netpoll_send_udp
+EXPORT_SYMBOL vmlinux 0xe7a53686	__bread
+EXPORT_SYMBOL vmlinux 0xe7b3f238	__lock_buffer
+EXPORT_SYMBOL vmlinux 0xe7d2aca1	security_sk_classify_flow
+EXPORT_SYMBOL vmlinux 0xe7d32407	nmi_active
+EXPORT_SYMBOL vmlinux 0xe7d4daac	seq_list_next
+EXPORT_SYMBOL vmlinux 0xe7eb0edf	__bio_clone
+EXPORT_SYMBOL vmlinux 0xe80ce219	sysctl_tcp_dma_copybreak
+EXPORT_SYMBOL vmlinux 0xe82412a1	tcp_tso_segment
+EXPORT_SYMBOL vmlinux 0xe84c988b	inet_sk_rebuild_header
+EXPORT_SYMBOL vmlinux 0xe855c6e7	I_BDEV
+EXPORT_SYMBOL vmlinux 0xe867118f	pci_remove_bus
+EXPORT_SYMBOL vmlinux 0xe8794ce1	slhc_toss
+EXPORT_SYMBOL vmlinux 0xe88ecaa1	free_buffer_head
+EXPORT_SYMBOL vmlinux 0xe8a3605f	acpi_processor_set_thermal_limit
+EXPORT_SYMBOL vmlinux 0xe8b68849	wrmsr_on_cpus
+EXPORT_SYMBOL vmlinux 0xe8b84030	key_type_keyring
+EXPORT_SYMBOL vmlinux 0xe8cd902e	hweight16
+EXPORT_SYMBOL vmlinux 0xe8d65568	tcf_register_action
+EXPORT_SYMBOL vmlinux 0xe8f7437a	sk_dst_check
+EXPORT_SYMBOL vmlinux 0xe90dcae0	__request_module
+EXPORT_SYMBOL vmlinux 0xe914e41e	strcpy
+EXPORT_SYMBOL vmlinux 0xe92e6036	names_cachep
+EXPORT_SYMBOL vmlinux 0xe95ec312	mca_bus_type
+EXPORT_SYMBOL vmlinux 0xe95f80ac	mca_device_transform_memory
+EXPORT_SYMBOL vmlinux 0xe997667b	wrmsr_on_cpu
+EXPORT_SYMBOL vmlinux 0xe9c2d803	bh_submit_read
+EXPORT_SYMBOL vmlinux 0xe9f04f63	bio_integrity_clone
+EXPORT_SYMBOL vmlinux 0xea054b22	nla_policy_len
+EXPORT_SYMBOL vmlinux 0xea10212a	int_to_scsilun
+EXPORT_SYMBOL vmlinux 0xea10655a	__bitmap_intersects
+EXPORT_SYMBOL vmlinux 0xea2d33a2	radix_tree_gang_lookup_slot
+EXPORT_SYMBOL vmlinux 0xea5650a8	ip_mc_rejoin_group
+EXPORT_SYMBOL vmlinux 0xea7987f1	key_update
+EXPORT_SYMBOL vmlinux 0xea852925	rwsem_downgrade_wake
+EXPORT_SYMBOL vmlinux 0xea858cb5	radix_tree_gang_lookup_tag
+EXPORT_SYMBOL vmlinux 0xea90bdd3	acpi_attach_data
+EXPORT_SYMBOL vmlinux 0xeacb4759	mb_cache_entry_free
+EXPORT_SYMBOL vmlinux 0xead9557f	bio_integrity_alloc
+EXPORT_SYMBOL vmlinux 0xeae3dfd6	__const_udelay
+EXPORT_SYMBOL vmlinux 0xeb1610ef	__generic_block_fiemap
+EXPORT_SYMBOL vmlinux 0xeb1fabf6	interruptible_sleep_on
+EXPORT_SYMBOL vmlinux 0xeb549459	journal_get_write_access
+EXPORT_SYMBOL vmlinux 0xeb5c3525	pfifo_qdisc_ops
+EXPORT_SYMBOL vmlinux 0xeb7e28b0	pnp_release_card_device
+EXPORT_SYMBOL vmlinux 0xeb873797	path_get
+EXPORT_SYMBOL vmlinux 0xeb8774cc	neigh_for_each
+EXPORT_SYMBOL vmlinux 0xeb8f54b3	strstrip
+EXPORT_SYMBOL vmlinux 0xeb97e3d3	tcp_gro_complete
+EXPORT_SYMBOL vmlinux 0xebb567d6	tcp_v4_md5_hash_skb
+EXPORT_SYMBOL vmlinux 0xebb7f8a7	register_gifconf
+EXPORT_SYMBOL vmlinux 0xebd273a6	strict_strtoull
+EXPORT_SYMBOL vmlinux 0xebddfda1	scsi_release_buffers
+EXPORT_SYMBOL vmlinux 0xec001f9a	tty_schedule_flip
+EXPORT_SYMBOL vmlinux 0xec1b1b14	con_is_bound
+EXPORT_SYMBOL vmlinux 0xec4ecfe4	netlink_set_err
+EXPORT_SYMBOL vmlinux 0xec690805	tty_hung_up_p
+EXPORT_SYMBOL vmlinux 0xec794ba0	__send_remote_softirq
+EXPORT_SYMBOL vmlinux 0xec8ffc7a	neigh_parms_alloc
+EXPORT_SYMBOL vmlinux 0xecaae2a5	pci_remove_behind_bridge
+EXPORT_SYMBOL vmlinux 0xecb6c601	pci_get_device
+EXPORT_SYMBOL vmlinux 0xeccd6b74	dm_kcopyd_client_destroy
+EXPORT_SYMBOL vmlinux 0xecde1418	_spin_lock_irq
+EXPORT_SYMBOL vmlinux 0xed2c5d0e	tcp_parse_options
+EXPORT_SYMBOL vmlinux 0xed4153f7	journal_init_inode
+EXPORT_SYMBOL vmlinux 0xeda0d76e	gen_estimator_active
+EXPORT_SYMBOL vmlinux 0xedb57bf5	tty_register_driver
+EXPORT_SYMBOL vmlinux 0xedbaee5e	nla_strcmp
+EXPORT_SYMBOL vmlinux 0xedc03953	iounmap
+EXPORT_SYMBOL vmlinux 0xedde873c	uart_add_one_port
+EXPORT_SYMBOL vmlinux 0xede5c6c1	nf_setsockopt
+EXPORT_SYMBOL vmlinux 0xedf7fe60	dev_set_promiscuity
+EXPORT_SYMBOL vmlinux 0xedfb0772	inet_accept
+EXPORT_SYMBOL vmlinux 0xee2cf97d	tty_set_operations
+EXPORT_SYMBOL vmlinux 0xee2d0fc7	_local_bh_enable
+EXPORT_SYMBOL vmlinux 0xee479cc8	tty_devnum
+EXPORT_SYMBOL vmlinux 0xee7cdc28	inode_sub_bytes
+EXPORT_SYMBOL vmlinux 0xee7eb9e1	pnp_platform_devices
+EXPORT_SYMBOL vmlinux 0xeea5febb	d_delete
+EXPORT_SYMBOL vmlinux 0xeea9dbaf	bitmap_bitremap
+EXPORT_SYMBOL vmlinux 0xeeda0ebc	input_allocate_device
+EXPORT_SYMBOL vmlinux 0xef243996	give_up_console
+EXPORT_SYMBOL vmlinux 0xef2b1efe	__tcf_em_tree_match
+EXPORT_SYMBOL vmlinux 0xef3bd862	mca_find_unused_adapter
+EXPORT_SYMBOL vmlinux 0xef3d64e2	xfrm_state_register_afinfo
+EXPORT_SYMBOL vmlinux 0xef452e5d	xfrm_policy_register_afinfo
+EXPORT_SYMBOL vmlinux 0xef6ed1ba	param_set_invbool
+EXPORT_SYMBOL vmlinux 0xef7b3178	create_empty_buffers
+EXPORT_SYMBOL vmlinux 0xef9458b6	inet_sendmsg
+EXPORT_SYMBOL vmlinux 0xef9aedfc	boot_option_idle_override
+EXPORT_SYMBOL vmlinux 0xefdd70ce	security_secid_to_secctx
+EXPORT_SYMBOL vmlinux 0xefe099c3	acpi_get_event_status
+EXPORT_SYMBOL vmlinux 0xeff14be9	ioremap_cache
+EXPORT_SYMBOL vmlinux 0xeff736ad	km_state_expired
+EXPORT_SYMBOL vmlinux 0xf0009fee	put_pages_list
+EXPORT_SYMBOL vmlinux 0xf0037aed	vfs_writev
+EXPORT_SYMBOL vmlinux 0xf01303d9	blk_queue_init_tags
+EXPORT_SYMBOL vmlinux 0xf05cae6e	blk_end_request_all
+EXPORT_SYMBOL vmlinux 0xf065f629	ioread16be
+EXPORT_SYMBOL vmlinux 0xf0750cf3	poll_schedule_timeout
+EXPORT_SYMBOL vmlinux 0xf086d773	backlight_force_update
+EXPORT_SYMBOL vmlinux 0xf0ac8263	call_usermodehelper_setup
+EXPORT_SYMBOL vmlinux 0xf0b4a61c	end_buffer_read_sync
+EXPORT_SYMBOL vmlinux 0xf0ca4143	blk_queue_invalidate_tags
+EXPORT_SYMBOL vmlinux 0xf0e699a8	iunique
+EXPORT_SYMBOL vmlinux 0xf0edce68	open_by_devnum
+EXPORT_SYMBOL vmlinux 0xf0ef15b4	list_sort
+EXPORT_SYMBOL vmlinux 0xf0f1246c	kvasprintf
+EXPORT_SYMBOL vmlinux 0xf0fdf6cb	__stack_chk_fail
+EXPORT_SYMBOL vmlinux 0xf10de535	ioread8
+EXPORT_SYMBOL vmlinux 0xf10de911	uart_get_divisor
+EXPORT_SYMBOL vmlinux 0xf11543ff	find_first_zero_bit
+EXPORT_SYMBOL vmlinux 0xf11a70c3	md_wait_for_blocked_rdev
+EXPORT_SYMBOL vmlinux 0xf1498e5d	__lock_page
+EXPORT_SYMBOL vmlinux 0xf15158bb	phy_stop
+EXPORT_SYMBOL vmlinux 0xf1562943	tcf_generic_walker
+EXPORT_SYMBOL vmlinux 0xf16b0a25	i2c_smbus_write_block_data
+EXPORT_SYMBOL vmlinux 0xf16bb080	sock_no_ioctl
+EXPORT_SYMBOL vmlinux 0xf174ed48	acquire_console_sem
+EXPORT_SYMBOL vmlinux 0xf17a441e	tc_classify_compat
+EXPORT_SYMBOL vmlinux 0xf17e9406	dquot_scan_active
+EXPORT_SYMBOL vmlinux 0xf184d21c	dev_kfree_skb_any
+EXPORT_SYMBOL vmlinux 0xf18b26e4	inet_register_protosw
+EXPORT_SYMBOL vmlinux 0xf195c682	fb_invert_cmaps
+EXPORT_SYMBOL vmlinux 0xf19df096	genphy_config_advert
+EXPORT_SYMBOL vmlinux 0xf1bfbf5c	iput
+EXPORT_SYMBOL vmlinux 0xf1d64416	gen_new_estimator
+EXPORT_SYMBOL vmlinux 0xf1db1704	nla_memcpy
+EXPORT_SYMBOL vmlinux 0xf1deabf2	div64_u64
+EXPORT_SYMBOL vmlinux 0xf1e98c74	avenrun
+EXPORT_SYMBOL vmlinux 0xf1f49783	fd_install
+EXPORT_SYMBOL vmlinux 0xf1fad571	skb_add_rx_frag
+EXPORT_SYMBOL vmlinux 0xf20181e6	xfrm_policy_alloc
+EXPORT_SYMBOL vmlinux 0xf20bbc9a	generic_file_aio_read
+EXPORT_SYMBOL vmlinux 0xf20c49ec	del_gendisk
+EXPORT_SYMBOL vmlinux 0xf20dabd8	free_irq
+EXPORT_SYMBOL vmlinux 0xf21570eb	gnet_stats_start_copy
+EXPORT_SYMBOL vmlinux 0xf22a4aac	find_get_pages_tag
+EXPORT_SYMBOL vmlinux 0xf22ebc84	eth_change_mtu
+EXPORT_SYMBOL vmlinux 0xf2339117	input_open_device
+EXPORT_SYMBOL vmlinux 0xf24c903e	mpage_readpages
+EXPORT_SYMBOL vmlinux 0xf26b02ed	tcp_prot
+EXPORT_SYMBOL vmlinux 0xf2905f07	ip_setsockopt
+EXPORT_SYMBOL vmlinux 0xf2997713	tty_termios_hw_change
+EXPORT_SYMBOL vmlinux 0xf2a25c5d	acpi_bus_add
+EXPORT_SYMBOL vmlinux 0xf2a70b8b	tcp_v4_md5_do_del
+EXPORT_SYMBOL vmlinux 0xf2ab8f9e	__sk_mem_reclaim
+EXPORT_SYMBOL vmlinux 0xf2c6c0bf	register_sysrq_key
+EXPORT_SYMBOL vmlinux 0xf2d1d7f9	wait_for_key_construction
+EXPORT_SYMBOL vmlinux 0xf2e74040	mca_set_adapter_name
+EXPORT_SYMBOL vmlinux 0xf30441bf	inode_claim_rsv_space
+EXPORT_SYMBOL vmlinux 0xf30eaa0a	inet_dgram_connect
+EXPORT_SYMBOL vmlinux 0xf30faaed	inet6_release
+EXPORT_SYMBOL vmlinux 0xf313da4e	sha_transform
+EXPORT_SYMBOL vmlinux 0xf3341268	__clear_user
+EXPORT_SYMBOL vmlinux 0xf338d4c3	netlink_unregister_notifier
+EXPORT_SYMBOL vmlinux 0xf33b8daf	dcache_dir_open
+EXPORT_SYMBOL vmlinux 0xf33cc841	nf_log_unregister
+EXPORT_SYMBOL vmlinux 0xf346231f	seq_list_start_head
+EXPORT_SYMBOL vmlinux 0xf3575066	dquot_destroy
+EXPORT_SYMBOL vmlinux 0xf397b9aa	__tasklet_schedule
+EXPORT_SYMBOL vmlinux 0xf39bf4d9	put_cmsg
+EXPORT_SYMBOL vmlinux 0xf3a14aff	lookup_hash
+EXPORT_SYMBOL vmlinux 0xf3a2bcbe	phy_driver_register
+EXPORT_SYMBOL vmlinux 0xf3bf0bce	__bitmap_complement
+EXPORT_SYMBOL vmlinux 0xf3d611e0	__netif_schedule
+EXPORT_SYMBOL vmlinux 0xf3e24030	page_zero_new_buffers
+EXPORT_SYMBOL vmlinux 0xf3fac71e	kthread_create
+EXPORT_SYMBOL vmlinux 0xf429658a	__nla_put
+EXPORT_SYMBOL vmlinux 0xf441ac43	ioread8_rep
+EXPORT_SYMBOL vmlinux 0xf455425d	km_policy_expired
+EXPORT_SYMBOL vmlinux 0xf4775bd6	bio_integrity_add_page
+EXPORT_SYMBOL vmlinux 0xf4794644	__invalidate_device
+EXPORT_SYMBOL vmlinux 0xf47d9ed8	end_page_writeback
+EXPORT_SYMBOL vmlinux 0xf48273b8	nf_ip6_checksum
+EXPORT_SYMBOL vmlinux 0xf48a2c4c	MCA_bus
+EXPORT_SYMBOL vmlinux 0xf494f618	mmc_regulator_get_ocrmask
+EXPORT_SYMBOL vmlinux 0xf4972b27	blk_insert_request
+EXPORT_SYMBOL vmlinux 0xf49c4534	dev_set_mtu
+EXPORT_SYMBOL vmlinux 0xf4a3a96d	vfs_rmdir
+EXPORT_SYMBOL vmlinux 0xf4a5c213	avail_to_resrv_perfctr_nmi_bit
+EXPORT_SYMBOL vmlinux 0xf4a9f810	do_sync_write
+EXPORT_SYMBOL vmlinux 0xf4ae9d51	ida_pre_get
+EXPORT_SYMBOL vmlinux 0xf4aef2cb	i2c_del_adapter
+EXPORT_SYMBOL vmlinux 0xf4b54755	rfkill_init_sw_state
+EXPORT_SYMBOL vmlinux 0xf4c1cebc	kmap_atomic
+EXPORT_SYMBOL vmlinux 0xf4c7dc19	blk_get_backing_dev_info
+EXPORT_SYMBOL vmlinux 0xf4dea546	input_unregister_handle
+EXPORT_SYMBOL vmlinux 0xf4f14de6	rtnl_trylock
+EXPORT_SYMBOL vmlinux 0xf4f52f93	dqstats
+EXPORT_SYMBOL vmlinux 0xf502d273	acpi_get_current_resources
+EXPORT_SYMBOL vmlinux 0xf50cfb72	mark_info_dirty
+EXPORT_SYMBOL vmlinux 0xf51ae235	touch_nmi_watchdog
+EXPORT_SYMBOL vmlinux 0xf521d543	tty_name
+EXPORT_SYMBOL vmlinux 0xf53d4c26	qdisc_class_hash_destroy
+EXPORT_SYMBOL vmlinux 0xf57682c8	acpi_get_object_info
+EXPORT_SYMBOL vmlinux 0xf57b62fb	generic_ro_fops
+EXPORT_SYMBOL vmlinux 0xf57e8d65	cdev_init
+EXPORT_SYMBOL vmlinux 0xf5805659	dm_table_unplug_all
+EXPORT_SYMBOL vmlinux 0xf5b1e2ae	seq_path
+EXPORT_SYMBOL vmlinux 0xf5b9342a	mmc_remove_host
+EXPORT_SYMBOL vmlinux 0xf5bfdaa7	blk_queue_max_hw_segments
+EXPORT_SYMBOL vmlinux 0xf5c05914	generic_segment_checks
+EXPORT_SYMBOL vmlinux 0xf5c2252f	__xfrm_decode_session
+EXPORT_SYMBOL vmlinux 0xf5c9012e	timespec_trunc
+EXPORT_SYMBOL vmlinux 0xf5ccdffd	blk_stack_limits
+EXPORT_SYMBOL vmlinux 0xf5d01cdf	mca_device_transform_irq
+EXPORT_SYMBOL vmlinux 0xf5e02432	register_filesystem
+EXPORT_SYMBOL vmlinux 0xf5e47fc4	mpage_writepages
+EXPORT_SYMBOL vmlinux 0xf5eb86ea	blk_verify_command
+EXPORT_SYMBOL vmlinux 0xf5fbd40f	ethtool_op_set_tx_csum
+EXPORT_SYMBOL vmlinux 0xf6428bbb	directly_mappable_cdev_bdi
+EXPORT_SYMBOL vmlinux 0xf66809d8	xfrm_unregister_km
+EXPORT_SYMBOL vmlinux 0xf66f4daf	dm_table_put
+EXPORT_SYMBOL vmlinux 0xf6af7f4c	arch_debugfs_dir
+EXPORT_SYMBOL vmlinux 0xf6bb4729	color_table
+EXPORT_SYMBOL vmlinux 0xf6ebc03b	net_ratelimit
+EXPORT_SYMBOL vmlinux 0xf70a891a	inet_release
+EXPORT_SYMBOL vmlinux 0xf71f134e	free_task
+EXPORT_SYMBOL vmlinux 0xf7382ebc	llc_sap_close
+EXPORT_SYMBOL vmlinux 0xf7475e52	i2c_verify_client
+EXPORT_SYMBOL vmlinux 0xf74a63b5	x86_mce_decode_callback
+EXPORT_SYMBOL vmlinux 0xf7533668	kobject_get
+EXPORT_SYMBOL vmlinux 0xf75aee85	netif_device_detach
+EXPORT_SYMBOL vmlinux 0xf75d8d5d	tcp_v4_do_rcv
+EXPORT_SYMBOL vmlinux 0xf7623914	radix_tree_tag_clear
+EXPORT_SYMBOL vmlinux 0xf780ae2b	open_exec
+EXPORT_SYMBOL vmlinux 0xf786ef5e	idr_init
+EXPORT_SYMBOL vmlinux 0xf78d04ab	netlink_register_notifier
+EXPORT_SYMBOL vmlinux 0xf79f631f	bio_copy_kern
+EXPORT_SYMBOL vmlinux 0xf7ac3032	unload_nls
+EXPORT_SYMBOL vmlinux 0xf7b0cc44	ethtool_op_get_tso
+EXPORT_SYMBOL vmlinux 0xf7b78acd	sg_miter_stop
+EXPORT_SYMBOL vmlinux 0xf7e68945	neigh_compat_output
+EXPORT_SYMBOL vmlinux 0xf811e69d	scsi_eh_flush_done_q
+EXPORT_SYMBOL vmlinux 0xf82abc1d	isa_dma_bridge_buggy
+EXPORT_SYMBOL vmlinux 0xf82e3d47	acpi_initialize_objects
+EXPORT_SYMBOL vmlinux 0xf82f4f9e	fb_get_mode
+EXPORT_SYMBOL vmlinux 0xf863589b	ip6_route_me_harder
+EXPORT_SYMBOL vmlinux 0xf871e108	acpi_match_device_ids
+EXPORT_SYMBOL vmlinux 0xf8776bd4	xfrm6_find_1stfragopt
+EXPORT_SYMBOL vmlinux 0xf889cc35	inode_init_always
+EXPORT_SYMBOL vmlinux 0xf88e0ee2	acpi_get_table_header
+EXPORT_SYMBOL vmlinux 0xf890fe7f	pm_idle
+EXPORT_SYMBOL vmlinux 0xf8b30e93	mempool_create
+EXPORT_SYMBOL vmlinux 0xf8cf9ee5	abort_exclusive_wait
+EXPORT_SYMBOL vmlinux 0xf8d2c768	put_mnt_ns
+EXPORT_SYMBOL vmlinux 0xf8d7cddc	dquot_commit
+EXPORT_SYMBOL vmlinux 0xf8e227c2	cpu_sysdev_class
+EXPORT_SYMBOL vmlinux 0xf8fd6908	mdiobus_unregister
+EXPORT_SYMBOL vmlinux 0xf8ff1e30	inet_ioctl
+EXPORT_SYMBOL vmlinux 0xf91d4bc5	skb_copy_datagram_iovec
+EXPORT_SYMBOL vmlinux 0xf9273054	user_path_at
+EXPORT_SYMBOL vmlinux 0xf940a328	__next_cpu
+EXPORT_SYMBOL vmlinux 0xf94e938b	kobject_del
+EXPORT_SYMBOL vmlinux 0xf96f66a2	__dec_zone_page_state
+EXPORT_SYMBOL vmlinux 0xf973b8f4	scsi_get_host_dev
+EXPORT_SYMBOL vmlinux 0xf9796315	km_query
+EXPORT_SYMBOL vmlinux 0xf981c046	xfrm_state_delete
+EXPORT_SYMBOL vmlinux 0xf98894e1	__sk_dst_check
+EXPORT_SYMBOL vmlinux 0xf9899664	mod_timer_pinned
+EXPORT_SYMBOL vmlinux 0xf997a170	generic_writepages
+EXPORT_SYMBOL vmlinux 0xf9a482f9	msleep
+EXPORT_SYMBOL vmlinux 0xf9ad6dfc	bio_sector_offset
+EXPORT_SYMBOL vmlinux 0xf9b202ae	splice_from_pipe_feed
+EXPORT_SYMBOL vmlinux 0xf9d0d071	xfrm_state_flush
+EXPORT_SYMBOL vmlinux 0xfa0564fc	__wait_on_bit_lock
+EXPORT_SYMBOL vmlinux 0xfa0f983f	sync_inode
+EXPORT_SYMBOL vmlinux 0xfa21b73f	acpi_processor_register_performance
+EXPORT_SYMBOL vmlinux 0xfa36ba0e	dump_trace
+EXPORT_SYMBOL vmlinux 0xfa39074e	seq_bitmap_list
+EXPORT_SYMBOL vmlinux 0xfa817a0f	genphy_restart_aneg
+EXPORT_SYMBOL vmlinux 0xfa82fad9	jbd2_journal_flush
+EXPORT_SYMBOL vmlinux 0xfaac8671	pci_clear_master
+EXPORT_SYMBOL vmlinux 0xfac3858a	kmalloc_caches
+EXPORT_SYMBOL vmlinux 0xfaf98462	bitrev32
+EXPORT_SYMBOL vmlinux 0xfb0443fb	acpi_get_parent
+EXPORT_SYMBOL vmlinux 0xfb04be8d	bdget_disk
+EXPORT_SYMBOL vmlinux 0xfb0cf2e9	touch_all_softlockup_watchdogs
+EXPORT_SYMBOL vmlinux 0xfb5efc9b	jbd2_journal_init_dev
+EXPORT_SYMBOL vmlinux 0xfb6af58d	recalc_sigpending
+EXPORT_SYMBOL vmlinux 0xfb82a669	nobh_write_end
+EXPORT_SYMBOL vmlinux 0xfb851686	xfrm6_input_addr
+EXPORT_SYMBOL vmlinux 0xfb873f5b	mmc_align_data_size
+EXPORT_SYMBOL vmlinux 0xfb995004	generic_file_buffered_write
+EXPORT_SYMBOL vmlinux 0xfba0c2e0	llc_sap_list_lock
+EXPORT_SYMBOL vmlinux 0xfbb7ef98	skb_dequeue_tail
+EXPORT_SYMBOL vmlinux 0xfbd21539	pci_request_selected_regions
+EXPORT_SYMBOL vmlinux 0xfbe27a1c	rb_first
+EXPORT_SYMBOL vmlinux 0xfbf3b286	xfrm_state_insert
+EXPORT_SYMBOL vmlinux 0xfc02b7ad	sysctl_tcp_wmem
+EXPORT_SYMBOL vmlinux 0xfc1581de	llc_set_station_handler
+EXPORT_SYMBOL vmlinux 0xfc2e3121	dma_async_memcpy_buf_to_buf
+EXPORT_SYMBOL vmlinux 0xfc39e32f	ioport_unmap
+EXPORT_SYMBOL vmlinux 0xfc43f5ac	per_cpu__current_task
+EXPORT_SYMBOL vmlinux 0xfc533f85	schedule_work_on
+EXPORT_SYMBOL vmlinux 0xfc562165	acpi_run_osc
+EXPORT_SYMBOL vmlinux 0xfc5fa93e	set_page_dirty
+EXPORT_SYMBOL vmlinux 0xfc6256b9	boot_tvec_bases
+EXPORT_SYMBOL vmlinux 0xfc70a66b	tcp_rcv_state_process
+EXPORT_SYMBOL vmlinux 0xfcaa04a0	out_of_line_wait_on_bit_lock
+EXPORT_SYMBOL vmlinux 0xfcc2a43c	utf32_to_utf8
+EXPORT_SYMBOL vmlinux 0xfcc4d4e4	mod_timer_pending
+EXPORT_SYMBOL vmlinux 0xfccf41fa	bdi_destroy
+EXPORT_SYMBOL vmlinux 0xfcda63a3	node_states
+EXPORT_SYMBOL vmlinux 0xfcec0987	enable_irq
+EXPORT_SYMBOL vmlinux 0xfcfa03ff	fb_videomode_to_modelist
+EXPORT_SYMBOL vmlinux 0xfd3630ec	netpoll_parse_options
+EXPORT_SYMBOL vmlinux 0xfd4b6ccb	thermal_cooling_device_unregister
+EXPORT_SYMBOL vmlinux 0xfd530a02	pci_select_bars
+EXPORT_SYMBOL vmlinux 0xfd56da89	pcim_iomap
+EXPORT_SYMBOL vmlinux 0xfd5a2517	nf_unregister_queue_handler
+EXPORT_SYMBOL vmlinux 0xfd6f4850	native_wrmsr_safe_regs
+EXPORT_SYMBOL vmlinux 0xfd7d7713	acpi_exception
+EXPORT_SYMBOL vmlinux 0xfd7fe45c	filemap_fdatawrite
+EXPORT_SYMBOL vmlinux 0xfd82d40c	netpoll_print_options
+EXPORT_SYMBOL vmlinux 0xfda85a7d	request_threaded_irq
+EXPORT_SYMBOL vmlinux 0xfdb9b629	ioread32be
+EXPORT_SYMBOL vmlinux 0xfdcb4e2c	pci_dev_put
+EXPORT_SYMBOL vmlinux 0xfdd5ed46	pneigh_enqueue
+EXPORT_SYMBOL vmlinux 0xfdfc0b3b	fiemap_fill_next_extent
+EXPORT_SYMBOL vmlinux 0xfe00aa53	iget_failed
+EXPORT_SYMBOL vmlinux 0xfe19eb77	tr_type_trans
+EXPORT_SYMBOL vmlinux 0xfe2d035d	jbd2_journal_ack_err
+EXPORT_SYMBOL vmlinux 0xfe3a49c0	md_done_sync
+EXPORT_SYMBOL vmlinux 0xfe5d4bb2	sys_tz
+EXPORT_SYMBOL vmlinux 0xfe769456	unregister_netdevice_notifier
+EXPORT_SYMBOL vmlinux 0xfe79d253	alloc_mdio_bitbang
+EXPORT_SYMBOL vmlinux 0xfe7c4287	nr_cpu_ids
+EXPORT_SYMBOL vmlinux 0xfe95f5a5	simple_transaction_get
+EXPORT_SYMBOL vmlinux 0xfe9a0d7d	skb_abort_seq_read
+EXPORT_SYMBOL vmlinux 0xfeb7cac3	tcf_hash_check
+EXPORT_SYMBOL vmlinux 0xfec3c2f2	bcd2bin
+EXPORT_SYMBOL vmlinux 0xfedd35fc	console_suspend_enabled
+EXPORT_SYMBOL vmlinux 0xfef96e23	__scsi_print_command
+EXPORT_SYMBOL vmlinux 0xff119292	aio_complete
+EXPORT_SYMBOL vmlinux 0xff1e9dd8	seq_list_start
+EXPORT_SYMBOL vmlinux 0xff480992	dump_fpu
+EXPORT_SYMBOL vmlinux 0xff4a4cb9	scsi_command_normalize_sense
+EXPORT_SYMBOL vmlinux 0xff588124	bio_map_kern
+EXPORT_SYMBOL vmlinux 0xff6878cf	fb_default_cmap
+EXPORT_SYMBOL vmlinux 0xff708fd3	mempool_destroy
+EXPORT_SYMBOL vmlinux 0xff78f759	simple_transaction_set
+EXPORT_SYMBOL vmlinux 0xff93ac92	journal_wipe
+EXPORT_SYMBOL vmlinux 0xff964b25	param_set_int
+EXPORT_SYMBOL vmlinux 0xff97536e	blk_queue_find_tag
+EXPORT_SYMBOL vmlinux 0xff9ca065	fb_edid_to_monspecs
+EXPORT_SYMBOL vmlinux 0xffa3a03c	request_key_with_auxdata
+EXPORT_SYMBOL vmlinux 0xffc7c184	__init_waitqueue_head
+EXPORT_SYMBOL vmlinux 0xffd2b363	bio_integrity_free
+EXPORT_SYMBOL vmlinux 0xffd5a395	default_wake_function
+EXPORT_SYMBOL vmlinux 0xffdb82bc	sg_free_table
+EXPORT_SYMBOL vmlinux 0xfff17573	tcp_timewait_state_process
+EXPORT_SYMBOL_GPL arch/x86/crypto/aes-i586 0x7060bf0a	crypto_aes_encrypt_x86
+EXPORT_SYMBOL_GPL arch/x86/crypto/aes-i586 0xe409b491	crypto_aes_decrypt_x86
+EXPORT_SYMBOL_GPL arch/x86/kernel/microcode 0xdf66ca81	ucode_cpu_info
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x00aaf935	kvm_disable_tdp
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x0366caf0	kvm_set_cr0
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x05bc7b87	kvm_cpu_has_interrupt
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x094ac8f4	kvm_get_pfn
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x0d6f7c1b	kvm_emulate_pio
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x0fecc91f	gfn_to_pfn
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x12d1b23b	kvm_release_pfn_clean
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x12f118d5	kvm_x86_ops
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1832d637	kvm_report_emulation_failure
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1a9df35f	__tracepoint_kvm_msr
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1aa94cd4	kvm_mmu_page_fault
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1c1a2436	kvm_mmu_unprotect_page_virt
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1de571b7	kvm_set_cr4
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1e4580bb	kvm_release_pfn_dirty
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x20de5193	kvm_disable_largepages
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x226b9d75	kvm_mmu_reset_context
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x22f13a76	kvm_get_msr_common
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x2322e039	kvm_set_pfn_accessed
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x264a0f42	kvm_emulate_hypercall
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x27046576	kvm_exit
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x279b528e	kvm_task_switch
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x296ede41	kvm_lmsw
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x2d5cfed9	kvm_get_guest_memory_type
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x30957ddd	kvm_mmu_load
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x317f9e6b	kvm_enable_efer_bits
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x3547b24b	kvm_put_kvm
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x374dcfb4	gfn_to_page
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x37ae18bf	kvm_set_memory_region
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x37b989fa	kvm_get_kvm
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x39d7ae7a	kvm_require_cpl
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x3b7706d2	__tracepoint_kvm_exit
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x3de979af	kvm_set_page_dirty
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x3e61bc7e	kvm_set_cr8
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x3f48c9f8	kvm_get_cs_db_l_bits
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x401961f7	fx_init
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x4621802b	kvm_release_page_dirty
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x49938597	kvm_clear_guest
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x4a7cbe69	is_error_pfn
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x4f121bcd	kvm_vcpu_cache
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x511a37e7	kvm_is_visible_gfn
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x599086dd	kvm_handle_fault_on_reboot
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x663e25fa	kvm_release_page_clean
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x67759313	kvm_cpu_get_interrupt
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x6b9fb6cc	kvm_get_apic_base
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x74fee239	kvm_vcpu_uninit
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x77fd5c28	kvm_emulate_cpuid
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x787d7cbb	kvm_read_guest
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x7d5bb812	kvm_set_cr3
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8220483e	kvm_queue_exception
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8ce4f3ab	kvm_enable_tdp
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8e7f9b47	segment_base
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x9168e22c	kvm_emulate_halt
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x94f5d607	kvm_queue_exception_e
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x979d49b1	kvm_write_guest_page
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x9fb1f5ff	kvm_vcpu_init
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa107f272	kvm_read_guest_page
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa361bc65	kvm_set_pfn_dirty
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa50cb4b0	kvm_vcpu_on_spin
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa677256b	kvm_resched
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xae076f6e	kvm_put_guest_fpu
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xb001cbe0	emulate_instruction
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbb9c37e3	kvm_mmu_invlpg
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbd377dc9	kvm_mmu_set_nonpresent_ptes
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbd94103b	kvm_mmu_set_base_ptes
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbdbdc8b3	is_error_page
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xc2826b0f	kvm_load_guest_fpu
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xc29a0c03	kvm_set_msr_common
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xce6be969	kvm_inject_nmi
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xcea5bf57	__tracepoint_kvm_page_fault
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xcf45d625	load_pdptrs
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd045baab	kvm_clear_guest_page
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd07d4ed5	__kvm_set_memory_region
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd0b2727a	kvm_mmu_set_mask_ptes
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd296def9	kvm_is_error_hva
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd3c0a6da	__tracepoint_kvm_inj_virq
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd710f246	kvm_set_apic_base
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd7a33068	emulator_write_emulated
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xdaa3aa9d	gfn_to_hva
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xde0e426c	gfn_to_memslot_unaliased
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xdead7e81	__tracepoint_kvm_cr
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xe19c47aa	kvm_inject_pending_timer_irqs
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xe474ed15	kvm_mmu_get_spte_hierarchy
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xedb34109	kvm_get_cr8
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xfb0341cb	kvm_emulate_pio_string
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xfe92547a	kvm_init
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x0cc1e40f	crypto_it_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x24aac4d9	crypto_aes_expand_key
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x3dc916b6	crypto_fl_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x40d46b21	crypto_ft_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x67502576	crypto_aes_set_key
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x71dc9998	crypto_il_tab
+EXPORT_SYMBOL_GPL crypto/async_tx/async_memcpy 0x53e2f71a	async_memcpy
+EXPORT_SYMBOL_GPL crypto/async_tx/async_pq 0x6f8546cb	async_gen_syndrome
+EXPORT_SYMBOL_GPL crypto/async_tx/async_pq 0xdfaf0bfa	async_syndrome_val
+EXPORT_SYMBOL_GPL crypto/async_tx/async_raid6_recov 0x37621e80	async_raid6_datap_recov
+EXPORT_SYMBOL_GPL crypto/async_tx/async_raid6_recov 0xbda2a099	async_raid6_2data_recov
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x040f3be3	async_tx_quiesce
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x58b8eb95	__async_tx_find_channel
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x90c79863	async_tx_submit
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0xcf4443fc	async_trigger_callback
+EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0x5c453a11	async_xor_val
+EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0xfab85e36	async_xor
+EXPORT_SYMBOL_GPL crypto/cryptd 0x22b2f31c	cryptd_free_ahash
+EXPORT_SYMBOL_GPL crypto/cryptd 0x74949c8e	cryptd_free_ablkcipher
+EXPORT_SYMBOL_GPL crypto/cryptd 0x77c00028	cryptd_alloc_ablkcipher
+EXPORT_SYMBOL_GPL crypto/cryptd 0x950a028a	cryptd_ablkcipher_child
+EXPORT_SYMBOL_GPL crypto/cryptd 0xb2fbc2a9	cryptd_ahash_child
+EXPORT_SYMBOL_GPL crypto/cryptd 0xb9c941c6	cryptd_alloc_ahash
+EXPORT_SYMBOL_GPL crypto/cryptd 0xbab4c160	cryptd_shash_desc
+EXPORT_SYMBOL_GPL crypto/des_generic 0xcfd9a2c0	des_ekey
+EXPORT_SYMBOL_GPL crypto/twofish_common 0x13ee602f	twofish_setkey
+EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x02ff9464	cfag12864b_isinited
+EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x0ecb2e5d	cfag12864b_disable
+EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x305dc3c6	cfag12864b_isenabled
+EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x3389f926	cfag12864b_enable
+EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x9522a342	cfag12864b_getrate
+EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0xc48e9d95	cfag12864b_buffer
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x14102f23	ks0108_displaystate
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x48a70518	ks0108_writedata
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x4f506333	ks0108_startline
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x6edae968	ks0108_isinited
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xbf4774db	ks0108_writecontrol
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xedde6df2	ks0108_page
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xfee8ef7b	ks0108_address
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0x515271fd	btmrvl_process_event
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0x581ac319	btmrvl_check_evtpkt
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0x8c075234	btmrvl_interrupt
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0x99700e73	btmrvl_send_module_cfg_cmd
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0xc3b04d6f	btmrvl_add_card
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0xd2a4cc71	btmrvl_remove_card
+EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0x115875ad	agp_add_bridge
+EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0x5f8e6d65	agp_remove_bridge
+EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0xd6feefa5	agp_num_entries
+EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0xe089cfcc	agp_memory_reserved
+EXPORT_SYMBOL_GPL drivers/char/scx200_gpio 0xcf3ae0e9	scx200_gpio_ops
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x0818742c	tpm_show_caps
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x098b1891	tpm_show_pcrs
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x1b1a4282	tpm_write
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x1b3ca3a9	tpm_show_timeouts
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x1e8ddfd6	tpm_store_cancel
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x3e041656	tpm_release
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x3e3ab7a1	tpm_calc_ordinal_duration
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x3f112708	tpm_get_timeouts
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x4eaf44ac	tpm_show_enabled
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x58c2bfbc	tpm_pm_suspend
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x703eab2b	tpm_remove_hardware
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x880cefcc	tpm_read
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x900e5734	tpm_continue_selftest
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xa9e4cae3	tpm_show_temp_deactivated
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xadf6aa4d	tpm_pcr_read
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xb349207d	tpm_open
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xc11ef838	tpm_dev_vendor_release
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xc37226a5	tpm_pcr_extend
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xc8df9d6b	tpm_show_owned
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xd050ab4f	tpm_show_pubek
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xe492fc9d	tpm_dev_release
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xe4937c44	tpm_show_active
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xe95b109c	tpm_gen_interrupt
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xf826e49a	tpm_register_hardware
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xfe101b14	tpm_pm_resume
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xff969e52	tpm_show_caps_1_2
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm_bios 0x357d8a41	tpm_bios_log_setup
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm_bios 0x5cc79e25	tpm_bios_log_teardown
+EXPORT_SYMBOL_GPL drivers/dca/dca 0x0e2d7723	register_dca_provider
+EXPORT_SYMBOL_GPL drivers/dca/dca 0x2e471f01	dca_register_notify
+EXPORT_SYMBOL_GPL drivers/dca/dca 0x31a2c8df	dca_get_tag
+EXPORT_SYMBOL_GPL drivers/dca/dca 0x62bf850c	free_dca_provider
+EXPORT_SYMBOL_GPL drivers/dca/dca 0x6456b131	dca3_get_tag
+EXPORT_SYMBOL_GPL drivers/dca/dca 0x8006c614	dca_unregister_notify
+EXPORT_SYMBOL_GPL drivers/dca/dca 0xbfc94adb	dca_add_requester
+EXPORT_SYMBOL_GPL drivers/dca/dca 0xd30e7c55	alloc_dca_provider
+EXPORT_SYMBOL_GPL drivers/dca/dca 0xf64d8d24	dca_remove_requester
+EXPORT_SYMBOL_GPL drivers/dca/dca 0xf92f96b5	unregister_dca_provider
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x0c32ff8a	edac_pci_alloc_index
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x3eb9647c	edac_pci_handle_pe
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x44fa8bc2	edac_device_alloc_ctl_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x4eee2596	edac_mc_free
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x4fa13d93	edac_mc_alloc
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x519ceb08	edac_pci_reset_delay_period
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x5a8d97ea	edac_device_handle_ce
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x5e25857c	edac_mc_del_mc
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x6e3ff83a	edac_device_alloc_index
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x7704b620	edac_mc_find_csrow_by_page
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x7a2db357	edac_mc_handle_ce
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x84ffe4e4	edac_pci_del_device
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x871c4ed5	edac_device_handle_ue
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x89ec774f	edac_device_free_ctl_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x8a041b9f	edac_device_del_device
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x8a5a2025	edac_pci_create_generic_ctl
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x8fb8928e	edac_pci_add_device
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x90205d79	edac_pci_free_ctl_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xb4d510e3	edac_mc_handle_ce_no_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xb83d0f62	edac_pci_alloc_ctl_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xc16c1966	edac_pci_release_generic_ctl
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xc9cb403b	edac_mc_handle_ue
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xce0e33b0	edac_mc_handle_ue_no_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xdfeeca80	edac_mc_add_mc
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xe1f9b8a7	edac_device_add_device
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xf734bcf0	edac_pci_handle_npe
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0x0f0ba55e	ii_msgs
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0x14878009	amd_report_gart_errors
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0x1823885a	amd_register_ecc_decoder
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0x4b01887d	pp_msgs
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0x7509830f	to_msgs
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0x955c1f76	amd_decode_nb_mce
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0xb98537cb	rrrr_msgs
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0xc2e765d2	amd_unregister_ecc_decoder
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0xd0f094a0	ext_msgs
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0xe6ff7e0c	ll_msgs
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0xf8dec080	tt_msgs
+EXPORT_SYMBOL_GPL drivers/gpu/drm/drm 0xb16c0468	drm_class_device_unregister
+EXPORT_SYMBOL_GPL drivers/gpu/drm/drm 0xb7e6f0a5	drm_class_device_register
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x05495392	hid_debug
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x06af5bb0	hid_check_keys_pressed
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x0cc7cd4f	hid_report_raw_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x0cf2beec	hid_add_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x17f68db7	hid_output_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x21900f7e	hid_dump_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x2c5bf572	__hid_register_driver
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x40a44211	hid_debug_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x412d41ba	hid_resolv_usage
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x45b2d696	hid_input_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x474bb6a0	hid_dump_input
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x5d9f5a67	hidinput_find_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x64b382ac	hidraw_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x740bc0d8	hidraw_report_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x804a715e	hid_parse_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x8b30ac74	hid_unregister_driver
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x8e555e6a	hid_allocate_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x8eef6fdd	hidinput_report_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xa24eeaae	hid_destroy_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xa32ef158	hidinput_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xa93e716a	hid_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xac6f7c79	hid_dump_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xd0107f85	hidraw_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xd4e8eff7	hid_set_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xe12a2121	hid_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xfc0e645f	hidinput_connect
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x01fd453e	usbhid_lookup_quirk
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x1502da28	usbhid_submit_report
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x306b6b16	usbhid_set_leds
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0xcc41cd2f	hiddev_hid_event
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x13f64d4a	lis3lv02d_poweroff
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x2660890b	lis3lv02d_remove_fs
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x33570112	lis3lv02d_init_device
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x406e8438	lis3_dev
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x6c33e494	lis3lv02d_joystick_disable
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xcba04e7b	lis3lv02d_poweron
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xe6af28c8	lis3lv02d_joystick_enable
+EXPORT_SYMBOL_GPL drivers/i2c/busses/i2c-nforce2 0x9b22b7d5	nforce2_smbus
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0xb3cb2980	hpsb_config_rom_ip1394_remove
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0xb8e0229a	hpsb_config_rom_ip1394_add
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0xec8d18cf	hpsb_disable_irm
+EXPORT_SYMBOL_GPL drivers/input/ff-memless 0x175ad33d	input_ff_create_memless
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x06caed33	wm9712_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x1b74f069	wm9705_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x225a05fb	wm97xx_set_gpio
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x2c759b54	wm97xx_set_suspend_mode
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x626dc755	wm97xx_read_aux_adc
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x63888cea	wm97xx_register_mach_ops
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x8b1ae96e	wm97xx_reg_write
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x8e122a04	wm97xx_reg_read
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xca60edad	wm9713_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xddc8b1e1	wm97xx_get_gpio
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xe792bf5b	wm97xx_config_gpio
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xf82ca930	wm97xx_unregister_mach_ops
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x090d8a28	gigaset_m10x_input
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x454aa44f	gigaset_debuglevel
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x4e792275	gigaset_dbg_buffer
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x5b8db804	gigaset_m10x_send_skb
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x5ebcf6a5	gigaset_add_event
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x5f1246eb	gigaset_shutdown
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x62842b09	gigaset_freedriver
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x68bb328b	gigaset_freecs
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x6dc3f63a	gigaset_if_receive
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x7f41e18d	gigaset_initdriver
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x882a18b7	gigaset_start
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xa0ba1c1f	gigaset_fill_inbuf
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xc05bff35	gigaset_blockdriver
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xc264d919	gigaset_stop
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xd3a7f211	gigaset_handle_modem_response
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xd696801d	gigaset_initcs
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xfb242f39	gigaset_skb_sent
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0x86d2618c	led_classdev_resume
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0xdcfd9303	led_classdev_suspend
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0xf258cf55	led_classdev_unregister
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0xf796213e	led_classdev_register
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0x05513b71	raid6_call
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0x0b8ef590	raid6_2data_recov
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0x4a48d81c	raid6_datap_recov
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x0349c9bd	ir_codes_proteus_2309_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x0366dcdf	ir_codes_videomate_s350_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x110b053a	ir_codes_pixelview_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x124cb753	ir_codes_encore_enltv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x183fdfdd	ir_codes_gotview7135_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x19b4d61c	ir_codes_nebula_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x19cd2826	ir_codes_behold_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x1a9009d6	ir_codes_dm1105_nec_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x1cb148f5	ir_extract_bits
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2456e513	ir_decode_pulsedistance
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2cc459b5	ir_codes_flydvb_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2d0e9a49	ir_codes_em_terratec_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3136d8ff	ir_codes_dntv_live_dvbt_pro_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x32b9033b	ir_codes_apac_viewcomp_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x379309cd	ir_input_init
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3909f4ad	ir_codes_terratec_cinergy_xs_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3a84be27	ir_codes_avermedia_a16d_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x4267d749	ir_codes_budget_ci_old_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x43c89ef4	ir_decode_biphase
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x4c1442c1	ir_codes_real_audio_220_32_keys_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x51ba1643	ir_codes_kworld_plus_tv_analog_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x543db4ff	ir_codes_avermedia_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x5e95da31	ir_codes_tt_1500_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x5fbe6515	ir_codes_pinnacle_color_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x61d039d7	ir_codes_behold_columbus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6427a3fb	ir_codes_pinnacle_grey_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x64b02fed	ir_codes_avermedia_dvbt_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6606596a	ir_rc5_timer_keyup
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6809de82	ir_codes_pctv_sedna_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6d6511e7	ir_dump_samples
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x703fc738	ir_codes_avertv_303_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x7283f81d	ir_codes_purpletv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x72c2992e	ir_codes_powercolor_real_angel_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x76d71b8e	ir_codes_dntv_live_dvb_t_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x784e176d	ir_codes_asus_pc39_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x828b3ce5	ir_codes_encore_enltv_fm53_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x8acae3dd	ir_codes_pinnacle_pctv_hd_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x92d1d181	ir_codes_flyvideo_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x94651dab	ir_codes_ati_tv_wonder_hd_600_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x95eb8195	ir_input_keydown
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x97c35dab	ir_codes_msi_tvanywhere_plus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x9944e2e5	ir_codes_hauppauge_new_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xa69aa6ad	ir_codes_pv951_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xa95157c5	ir_codes_cinergy_1400_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xac15f6c8	ir_codes_kaiomy_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xaff22e87	ir_codes_pixelview_new_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb01a1998	ir_codes_manli_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb0a8ef38	ir_codes_rc5_tv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb57445f7	ir_codes_eztv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb5adb754	ir_codes_cinergy_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xbd3ce6f0	ir_codes_avermedia_cardbus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xbeaccbdc	ir_codes_gadmei_rm008z_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xcba36c62	ir_codes_videomate_tv_pvr_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xd30c491f	ir_codes_norwood_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xd8161baf	ir_input_nokey
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xdc23fec4	ir_codes_fusionhdtv_mce_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xdd4c0a07	ir_codes_evga_indtube_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xe1101f4d	ir_codes_avermedia_m135a_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xe4140c60	ir_codes_genius_tvgo_a11mce_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xeb9bb08f	ir_codes_npgtech_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xebf345b4	ir_codes_encore_enltv2_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xeec89db8	ir_codes_empty_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xef29c40d	ir_codes_adstech_dvb_t_pci_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf33c155d	ir_codes_msi_tvanywhere_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf3d619ec	ir_codes_iodata_bctv7e_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf4f7a4d6	ir_rc5_timer_end
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf5e15e65	ir_codes_winfast_table
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x02b38dcc	saa7146_i2c_adapter_prepare
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x1502d54c	saa7146_devices_lock
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x30ab1f3f	saa7146_pgtable_alloc
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x39fc4140	saa7146_pgtable_build_single
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x3a347545	saa7146_wait_for_debi_done
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x4fdd2889	saa7146_register_extension
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x5fbea44c	saa7146_vfree_destroy_pgtable
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x7dca5fc6	saa7146_setgpio
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x8f8f1b26	saa7146_vmalloc_build_pgtable
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xb04d009d	saa7146_unregister_extension
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xcf683cf2	saa7146_devices
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xd021380d	saa7146_pgtable_free
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xe3cd9b5c	saa7146_debug
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x16a64781	saa7146_unregister_device
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x258f9498	saa7146_start_preview
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x329d3345	saa7146_set_hps_source_and_sync
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x4009c158	saa7146_vv_init
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x7811f842	saa7146_register_device
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xe0001c60	saa7146_vv_release
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xe4752e03	saa7146_stop_preview
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/mt20xx 0xe5a0409a	microtune_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/mxl5007t 0xfb992dd5	mxl5007t_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda18271 0xec9792a3	tda18271_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda827x 0x92b48c40	tda827x_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda8290 0xa6165332	tda829x_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda8290 0xe1174e5c	tda829x_probe
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda9887 0x2c89d96c	tda9887_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5761 0x27b8649b	tea5761_autodetection
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5761 0xf78b60b8	tea5761_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5767 0x0f5e07cc	tea5767_autodetection
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5767 0xcdc39e12	tea5767_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tuner-simple 0x4fe6b369	simple_tuner_attach
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x21e36bf2	smscore_registry_getmode
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x333e8885	smscore_get_device_mode
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x37d91069	smsendian_handle_tx_message
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x3e90f26e	smscore_get_board_id
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x401fb622	smscore_register_client
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x45284ae9	smsendian_handle_rx_message
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x47573205	smscore_unregister_device
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x4be086d7	smscore_putbuffer
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x4e22ed4d	smscore_onresponse
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x6428ef2e	sms_board_event
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x68ee7e3e	sms_board_lna_control
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x6d14373f	sms_board_setup
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x6ece5f71	sms_board_led_feedback
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x74ee9098	sms_board_load_modules
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x7c576277	smsendian_handle_message_header
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x8062408c	smscore_unregister_hotplug
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x86d11096	smscore_getbuffer
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x8d328f83	sms_board_power
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x97e98e2e	smscore_set_board_id
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x9cd1cefc	smscore_register_hotplug
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xa4cf5387	smscore_register_device
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xaf935e8e	smscore_unregister_client
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xcacc12e8	smscore_start_device
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xdf921cc5	smsclient_sendrequest
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xfda878c5	sms_get_board
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x0b3b100a	ttpci_budget_debiwrite
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x0faf9eb7	ttpci_budget_deinit
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x1db59a8a	ttpci_budget_set_video_port
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x3303d001	ttpci_budget_irq10_handler
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x7948c222	budget_debug
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x8005b947	ttpci_budget_init
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x914c9ad5	ttpci_budget_debiread
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0xc42fb3f5	ttpci_budget_init_hooks
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x017ea7c7	cx231xx_tuner_callback
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x0b15b396	cx231xx_send_usb_command
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x3340eeee	cx231xx_capture_start
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x4ecc2619	cx231xx_send_gpio_cmd
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x7c095ed1	cx231xx_dev_init
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x8c3120d3	cx231xx_set_mode
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x99c955f3	cx231xx_set_alt_setting
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xab4eba49	cx231xx_uninit_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xaea9252f	cx231xx_dev_uninit
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xcc86e18e	cx231xx_init_vbi_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xd617fe12	cx231xx_uninit_vbi_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xf64d6d2f	cx231xx_init_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx88/cx88xx 0xb0a72511	cx88_setup_xc3028
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x15ff1c0c	em28xx_set_mode
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x25b99eff	em28xx_isoc_dvb_max_packetsize
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x431d3bf1	em28xx_init_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x7fc8652c	em28xx_tuner_callback
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x9b833436	em28xx_audio_setup
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0xd8bf7773	em28xx_uninit_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0xf1dcb3ff	em28xx_audio_analog_set
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x0b715725	saa7134_s_std_internal
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x11c6ecc0	saa7134_queryctrl
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0xa65c24b9	saa7134_ts_qops
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0xc57ade45	saa7134_g_ctrl_internal
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0xe8fc9cc4	saa7134_s_ctrl_internal
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x3895475d	v4l2_i2c_subdev_init
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xb92274bb	v4l2_i2c_new_subdev_cfg
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xcf3683b9	v4l2_i2c_subdev_addr
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xdcd80c50	v4l2_i2c_new_subdev_board
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xf2a353ac	v4l2_i2c_tuner_addrs
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xf5ef842e	v4l_bound_align_image
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x0e5bb3c9	v4l2_int_ioctl_1
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x1fbf7b0a	v4l2_int_ioctl_0
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x32ac9481	v4l2_int_device_register
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xa5228b24	v4l2_int_device_try_attach_all
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xcce29c1c	v4l2_int_device_unregister
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x11afa9aa	videobuf_read_start
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x22093280	videobuf_reqbufs
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x343fa76e	videobuf_queue_is_busy
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x40690847	videobuf_iolock
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x44d12e4d	videobuf_poll_stream
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x44e4f5fe	__videobuf_mmap_setup
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x46e41002	videobuf_mmap_free
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x47d45030	videobuf_streamoff
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x4e8ae797	videobuf_stop
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x4fef9d93	videobuf_mmap_mapper
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x63c65ed8	videobuf_read_stop
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x6c22d9b8	videobuf_read_stream
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x6e3d1f36	videobuf_queue_to_vmalloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x7d0100ef	videobuf_qbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x8ef31d0e	videobuf_queue_core_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x9014f165	videobuf_read_one
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x9f35bc48	videobuf_queue_cancel
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xa4eded8f	videobuf_mmap_setup
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xa9e6fbc0	videobuf_waiton
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xb557ce9c	videobuf_dqbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xd5a5ef0f	videobuf_querybuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xd81e4628	videobuf_cgmbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xf79042dd	videobuf_next_field
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xf9b4f451	videobuf_alloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xff9e48ac	videobuf_streamon
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x39b885ca	videobuf_queue_sg_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x52d83617	videobuf_dma_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x65a59bdd	videobuf_dma_init_kernel
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x6a805d3a	videobuf_dma_sync
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x730ffa02	videobuf_dma_unmap
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x791f1c2f	videobuf_dma_map
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x807dac36	videobuf_dma_init_overlay
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x92b19a90	videobuf_sg_dma_map
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x9962faf4	videobuf_dma_free
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x9cc0ed0e	videobuf_sg_dma_unmap
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xa825c75b	videobuf_sg_alloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xcc444e9b	videobuf_to_dma
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xe8a24336	videobuf_vmalloc_to_sg
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xef9a5516	videobuf_dma_init_user
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0x1208bf15	videobuf_queue_vmalloc_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0x371f7dd7	videobuf_vmalloc_free
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0x66d4ea31	videobuf_to_vmalloc
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x2ab81e81	v4l2_device_unregister_subdev
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x47e186d3	v4l2_device_register
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x5a1ec319	v4l2_device_register_subdev
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x6374c39d	v4l2_device_disconnect
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x94539a44	v4l2_device_unregister
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0xe3b2f42f	v4l2_device_set_name
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x570de5a2	i2o_sg_tablesize
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x768d3f6d	i2o_pool_free
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x882ad5f7	i2o_dma_realloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xc24ede98	i2o_pool_alloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xd56a77c8	i2o_dma_map_sg
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xd956a25d	i2o_dma_alloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xe8b7ffbe	i2o_dma_map_single
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xeafd8798	i2o_dma_free
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x01155b36	mc13783_adc_set_ts_status
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x6c97dca5	mc13783_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x7fcf6efa	mc13783_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0xa1c6e8a7	mc13783_adc_do_conversion
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0xb6525bd6	mc13783_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0xcbbecda4	mc13783_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0xed5fe09f	mc13783_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-adc 0x2a6f5a2a	pcf50633_adc_async_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-adc 0x5445dd81	pcf50633_adc_sync_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x02bb17ca	pcf50633_write_block
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x11f75719	pcf50633_irq_mask_get
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x2aa0e192	pcf50633_reg_set_bit_mask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x2df496ce	pcf50633_irq_mask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x33d57282	pcf50633_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x3e6e02f5	pcf50633_irq_unmask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x649e2d62	pcf50633_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x73d09a87	pcf50633_read_block
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x88a5bd32	pcf50633_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x8e767a8f	pcf50633_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xf7849e41	pcf50633_reg_clear_bits
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x01fe09a0	pcf50633_gpio_get
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x0a6cfebd	pcf50633_gpio_power_supply_set
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x0f096404	pcf50633_gpio_invert_get
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x6e049e7b	pcf50633_gpio_invert_set
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0xc7c90928	pcf50633_gpio_set
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x1f006d3b	sm501_misc_control
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x7582dc19	sm501_unit_power
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x9ab791d8	sm501_modify_reg
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0xae42412c	sm501_find_clock
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0xeffd7682	sm501_set_clock
+EXPORT_SYMBOL_GPL drivers/mfd/ucb1400_core 0xfb4e0396	ucb1400_adc_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x0fafe7b7	wm831x_reg_lock
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x1b3b5c5b	wm831x_auxadc_read_uv
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x1d069850	wm831x_auxadc_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x1ea56771	wm831x_reg_unlock
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x6a940d26	wm831x_disable_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x7dab26b6	wm831x_isinkv_values
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x82d7cb61	wm831x_bulk_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x864c8af0	wm831x_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x9547e99f	wm831x_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x96eb099d	wm831x_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xa5382e33	wm831x_enable_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xb683be91	wm831x_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xe978f708	wm831x_request_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x12b81661	wm8350_reg_lock
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x181bb660	wm8350_device_init
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x24888a0d	wm8350_mask_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x2bcafe86	wm8350_clear_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x390fbf36	wm8350_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x51e198eb	wm8350_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x63d9225b	wm8350_device_exit
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x64a843a0	wm8350_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x8ccb6ae7	wm8350_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xa7290ea1	wm8350_unmask_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xb2f8e8c6	wm8350_block_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xb7181f89	wm8350_read_auxadc
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xc509e770	wm8350_block_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xc63f7610	wm8350_reg_unlock
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xf6f0696d	wm8350_gpio_config
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xfcc0d3a9	wm8350_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x2dca268f	wm8400_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x68e2424e	wm8400_reset_codec_reg_cache
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0xb72e740a	wm8400_block_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0xf8cc8082	wm8400_set_bits
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x95426738	cb710_set_irq_handler
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0xa26af059	cb710_sg_dwiter_read_next_block
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0xdec85a42	cb710_pci_update_config_reg
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0xfd9c21ab	cb710_sg_dwiter_write_next_block
+EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x2df115d4	eeprom_93cx6_multiread
+EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x63d14d2f	eeprom_93cx6_read
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x37ba2c32	enclosure_component_register
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x82f72eae	enclosure_find
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0xa6ac9afa	enclosure_add_device
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0xcc1afc0d	enclosure_register
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0xe217de0b	enclosure_unregister
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0xf01665be	enclosure_for_each_device
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0xf4cde7fb	enclosure_remove_device
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x31f38523	sdhci_remove_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x3c773d4d	sdhci_alloc_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x66dc5787	sdhci_add_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x73ca5539	sdhci_free_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x838be243	sdhci_suspend_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xce28126a	sdhci_resume_host
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x2c98de15	cfi_cmdset_0200
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x53f236e3	cfi_cmdset_0003
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x7ae8cd40	cfi_cmdset_0001
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0002 0xaac7c812	cfi_cmdset_0002
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0020 0xcc2bdb18	cfi_cmdset_0020
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x9eb877ab	cfi_qry_mode_off
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0xa5174d36	cfi_qry_mode_on
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0xb4ca4aba	cfi_qry_present
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2000 0x180a785e	DoC2k_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001 0x1ab97dcd	DoCMil_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001plus 0x75221dd6	DoCMilPlus_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/docecc 0x45937659	doc_decode_ecc
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x0339977b	parse_mtd_partitions
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x25d19836	mtd_table
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x28c6d23b	get_sb_mtd
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x28dfba13	deregister_mtd_parser
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x33e6a9b3	unregister_mtd_user
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x620fced4	get_mtd_device_nm
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x720fec65	kill_mtd_super
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x7f927186	mtd_table_mutex
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x94eb2c51	mtd_erase_callback
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x9a8855db	add_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xad3fcd71	get_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xb39a16e2	put_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xcd184f22	default_mtd_writev
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xce4df682	register_mtd_user
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xeba7752a	register_mtd_parser
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xf2a4f262	del_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x06709a95	deregister_mtd_blktrans
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x8695476c	del_mtd_blktrans_dev
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x9fcd1970	add_mtd_blktrans_dev
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0xc0c9b4a4	register_mtd_blktrans
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x661c6467	nand_wait_ready
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x7d1371c0	nand_release
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xa17203c4	nand_scan_tail
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xc3069620	nand_scan
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xe89351d3	nand_scan_ident
+EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0x7cb90e77	onenand_scan
+EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0xbdd6a0bf	onenand_release
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x16a533e9	ubi_open_volume
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x19d2a87f	ubi_do_get_device_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x291023a5	ubi_leb_erase
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x2a2b728f	ubi_is_mapped
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x343257fd	ubi_leb_write
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x42801d20	ubi_sync
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x4f1dcde1	ubi_leb_map
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x6d9a3023	ubi_open_volume_nm
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x6f09ba8a	ubi_register_volume_notifier
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x825de171	ubi_leb_change
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xbc505df4	ubi_get_device_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xc7c0f934	ubi_leb_read
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xd999657c	ubi_get_volume_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xe83b58e1	ubi_leb_unmap
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xf8545812	ubi_close_volume
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xfd6f0ef9	ubi_unregister_volume_notifier
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x41a25e4f	can_free_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x59863031	alloc_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x5be5a944	free_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x67c932b8	unregister_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x724d7448	can_put_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x8a0a6c43	can_get_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x9266c4c3	open_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xb878a945	register_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xbe12ff5f	close_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xf1ecca3e	can_bus_off
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x7192c716	alloc_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x764968de	unregister_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xa6514e10	free_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xb41b3b8c	register_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xdc9bd500	sja1000_interrupt
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x04780409	mlx4_srq_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x08d6fa8e	mlx4_uar_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x098820fa	mlx4_qp_to_ready
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x0bdfbce9	mlx4_qp_modify
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x0c6d8dc5	mlx4_uar_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x0f3827de	mlx4_srq_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x158c37a7	mlx4_fmr_enable
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x172a739e	mlx4_alloc_hwq_res
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x20c5a396	mlx4_register_interface
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x291e85aa	mlx4_multicast_detach
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x2ed62dd6	__mlx4_cmd
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x355399eb	mlx4_register_vlan
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x35b9a120	mlx4_CLOSE_PORT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x3ff1a0ca	mlx4_unregister_mac
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x40fd0424	mlx4_mtt_init
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x464cbbef	mlx4_mtt_cleanup
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x477db9b2	mlx4_buf_write_mtt
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x53e6ce98	mlx4_buf_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x5a7814e8	mlx4_fmr_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x5c7f78fb	mlx4_srq_query
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x5fffe3a4	mlx4_cq_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x67269af5	mlx4_db_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x73465be7	mlx4_free_cmd_mailbox
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x74b63f88	mlx4_unregister_vlan
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x7cb1466a	mlx4_qp_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x8557d950	mlx4_INIT_PORT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x8785e6d8	mlx4_fmr_unmap
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x87f06555	mlx4_qp_query
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x8ab63189	mlx4_cq_resize
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x8ea68f1d	mlx4_qp_remove
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x973b1120	mlx4_qp_reserve_range
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9e5f9f0a	mlx4_SYNC_TPT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9fe08831	mlx4_mtt_addr
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa4922591	mlx4_mr_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa86fcf09	mlx4_pd_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xae8a65f3	mlx4_free_hwq_res
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xafcd90f6	mlx4_unregister_interface
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb0858150	mlx4_srq_arm
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb3ec904a	mlx4_multicast_attach
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb7e476b2	mlx4_register_mac
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb86ce1bb	mlx4_alloc_cmd_mailbox
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xba20f47c	mlx4_mr_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xbdaf0f5d	mlx4_map_phys_fmr
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc26d383f	mlx4_qp_release_range
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc5a80add	mlx4_cq_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc69bd10b	mlx4_write_mtt
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xcb47c79d	mlx4_mr_enable
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xccce3017	mlx4_qp_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd32a82eb	mlx4_db_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd6770147	mlx4_fmr_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe5176d81	mlx4_buf_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe76bc72a	mlx4_cq_modify
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xfe9c3d9e	mlx4_pd_alloc
+EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0x42f62d6d	usbnet_generic_cdc_bind
+EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0x64575421	usbnet_cdc_unbind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x3064445b	generic_rndis_bind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xbe61f2a7	rndis_unbind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xca1cfbc0	rndis_status
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xcb6a1fe3	rndis_rx_fixup
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xec06c9ed	rndis_command
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xfa307012	rndis_tx_fixup
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x10a36cc5	usbnet_stop
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x16e1c919	usbnet_skb_return
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x1ec02d10	usbnet_tx_timeout
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x2d4770cf	usbnet_purge_paused_rxq
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x301e4b19	usbnet_defer_kevent
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x418dd29a	usbnet_set_settings
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x4cb94550	usbnet_get_msglevel
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x4e09acdd	usbnet_get_drvinfo
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x5e5a8e2a	usbnet_open
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x644a0171	usbnet_change_mtu
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x840afca2	usbnet_get_endpoints
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x86a43c3c	usbnet_get_ethernet_addr
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x86adbfc3	usbnet_nway_reset
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x8bbe236f	usbnet_resume_rx
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x9c84aae2	usbnet_suspend
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xb5382232	usbnet_disconnect
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xc8c72401	usbnet_probe
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xca2d12da	usbnet_get_link
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xd862c595	usbnet_resume
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xdf4a0339	usbnet_start_xmit
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xe91889e7	usbnet_set_msglevel
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xe94c3e55	usbnet_get_settings
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xeabe7d1c	usbnet_unlink_rx_urbs
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xf8672305	usbnet_pause_rx
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x0f0cacb0	i2400m_setup
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x0f71c9cf	i2400m_cmd_get_state
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x194e28cc	i2400m_set_init_config
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x55ac91fd	i2400m_rx
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x64849594	i2400m_tx_msg_sent
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x6f451fa7	i2400m_dev_reset_handle
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x92eea17f	i2400m_cmd_enter_powersave
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xb00b793c	i2400m_bm_cmd_prepare
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xd1a4926a	i2400m_dev_bootstrap
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xdaeb3a0b	i2400m_tx
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xde52c5d9	i2400m_netdev_setup
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xe26cd0ef	i2400m_tx_msg_get
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xe46a8d31	i2400m_queue_work
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xfa3bebac	i2400m_release
+EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0x13fa8fea	libipw_rx_any
+EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0x1c820b19	libipw_debug_level
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x1753f4ba	lbs_host_to_card_done
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x20257aa3	lbs_notify_command_response
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x3c266ab9	lbs_stop_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x62f9d6c9	lbs_add_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x7059cb0d	lbs_queue_event
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x8665bb47	lbs_cmd_copyback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x8e6fab57	lbs_send_tx_feedback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x923ed957	lbs_start_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xb4ec510f	lbs_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xb7c19622	lbs_cmd_802_11_rate_adapt_rateset
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xba025c94	lbs_process_rxed_packet
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xc3bdc61a	__lbs_cmd
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xc4a62f9b	lbs_host_sleep_cfg
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xc8475106	lbs_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xcd88f008	lbs_remove_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf64277de	lbs_debug
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x0f195e39	lbtf_send_tx_feedback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x177bd381	lbtf_cmd_response_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x1ae6b5a8	lbtf_remove_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x2b1ce04c	lbtf_add_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xbac12ce5	lbtf_bcn_sent
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xbbd4f636	__lbtf_cmd
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xc3ef03af	lbtf_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xf504c6be	lbtf_cmd_copyback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0x086e6108	if_usb_prog_firmware
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0xbeee3ed6	if_usb_reset_device
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x01742420	p54_init_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x1b695e7e	p54_parse_firmware
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x3ee9a16f	p54_parse_eeprom
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x4a042c9f	p54_read_eeprom
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x5b99d7ea	p54_free_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x71a65007	p54_register_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x739c8597	p54_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xbb3ba9ef	p54_free_skb
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xe5e24c49	p54_unregister_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x0883de17	rt2x00lib_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x0906df7b	rt2x00mac_conf_tx
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x09169137	rt2x00queue_map_txskb
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x131e96f4	rt2x00mac_configure_filter
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x1c0a465a	rt2x00lib_txdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x1ef36bc1	rt2x00mac_config
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x21d713ad	rt2x00mac_stop
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x24c0c510	rt2x00queue_get_entry
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x252b4126	rt2x00lib_beacondone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x31992646	rt2x00mac_rfkill_poll
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x3e11906b	rt2x00mac_set_tim
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x50676b96	rt2x00mac_bss_info_changed
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x5b0d0b32	rt2x00queue_get_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x62719d25	rt2x00lib_rxdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x865c92bb	rt2x00lib_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x8b5f8e1c	rt2x00mac_tx
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x8c74470a	rt2x00mac_add_interface
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x96761554	rt2x00mac_remove_interface
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x9788158d	rt2x00lib_probe_dev
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x97bca8f8	rt2x00lib_remove_dev
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xc2378776	rt2x00mac_set_key
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xe28e5b7d	rt2x00mac_get_stats
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xf592c327	rt2x00mac_get_tx_stats
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xf7f2c387	rt2x00mac_start
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x081fada4	rt2x00pci_probe
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x19bfd8cd	rt2x00pci_rxdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x3a7c901f	rt2x00pci_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x483fc996	rt2x00pci_initialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x5b1d988c	rt2x00pci_regbusy_read
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x63ae3afe	rt2x00pci_write_tx_data
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xd5065306	rt2x00pci_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xd9999bc1	rt2x00pci_remove
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xf3372e3a	rt2x00pci_uninitialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x2215e99e	rt2x00usb_regbusy_read
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x25514585	rt2x00usb_vendor_req_buff_lock
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x2a9c0b35	rt2x00usb_vendor_request
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x30686bed	rt2x00usb_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x3d6da65b	rt2x00usb_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x71aa6be5	rt2x00usb_initialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x8064cbb4	rt2x00usb_write_tx_data
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x8523ed99	rt2x00usb_vendor_request_large_buff
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x8f1caf62	rt2x00usb_kick_tx_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x8fd721df	rt2x00usb_disconnect
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x9a46e5e3	rt2x00usb_disable_radio
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x9cf4760e	rt2x00usb_uninitialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xbfa9630a	rt2x00usb_kill_tx_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xc3ec9e98	rt2x00usb_clear_entry
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xf02c37d2	rt2x00usb_vendor_request_buff
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xf75d040b	rt2x00usb_probe
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0x34f3d500	wl1251_alloc_hw
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0x5e207166	wl1251_init_ieee80211
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0x9819bd93	wl1251_free_hw
+EXPORT_SYMBOL_GPL drivers/pci/hotplug/acpiphp 0x3319893a	acpiphp_unregister_attention
+EXPORT_SYMBOL_GPL drivers/pci/hotplug/acpiphp 0xaabc3c04	acpiphp_register_attention
+EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0x5cf73340	pcf50633_mbc_get_status
+EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0x86875719	pcf50633_mbc_usb_curlim_set
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x043661a8	wm8350_register_led
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xaf92cbdd	wm8350_ldo_set_slot
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xcb042fa1	wm8350_dcdc_set_slot
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xd27b399f	wm8350_dcdc25_set_mode
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xf1e89a62	wm8350_register_regulator
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xfecf5a7d	wm8350_isink_set_flash
+EXPORT_SYMBOL_GPL drivers/regulator/wm8400-regulator 0xfe9ef4b5	wm8400_register_regulator
+EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x374c1e1c	fcoe_wwn_from_mac
+EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x3c9c68d6	fcoe_libfc_config
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0233f349	iscsi_pool_init
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x02a4b415	iscsi_complete_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x08e80052	iscsi_eh_target_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0fd1d31d	iscsi_host_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x11909a70	iscsi_conn_start
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x1408b18c	iscsi_eh_device_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x1545a67f	iscsi_host_remove
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x18f26dab	iscsi_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x1a008f40	iscsi_conn_failure
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x1c369f7b	iscsi_conn_queue_work
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x1ef16bef	iscsi_itt_to_ctask
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x1f0acbe2	iscsi_session_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x2973bce5	iscsi_change_queue_depth
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x2ec31f81	iscsi_conn_send_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x41ba1d14	iscsi_pool_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x452c5863	iscsi_update_cmdsn
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x46f31672	iscsi_host_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x48c7e0b5	iscsi_session_failure
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5151dcc1	iscsi_conn_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x56215eb6	iscsi_host_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5782c92c	iscsi_itt_to_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x578fc470	iscsi_requeue_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5b089c64	iscsi_put_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5c6d2c97	iscsi_conn_stop
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5f0c2d18	iscsi_prep_data_out_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x70a143a6	iscsi_session_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x7b3f4b76	iscsi_conn_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x81f97103	iscsi_complete_scsi_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x82c78cf0	iscsi_session_recovery_timedout
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x8cdea84a	iscsi_suspend_tx
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x9b6530de	__iscsi_complete_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xa618f95f	iscsi_session_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xa940266a	iscsi_host_set_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xaa95690b	iscsi_conn_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb294da1b	iscsi_set_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb7bdca42	iscsi_suspend_queue
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xd1ea298a	iscsi_conn_bind
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xde85d4fb	iscsi_verify_itt
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe3902267	__iscsi_get_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe3990d90	iscsi_host_add
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf483566d	iscsi_queuecommand
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xffaf2a67	iscsi_eh_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x0079cc23	iscsi_tcp_recv_segment_is_hdr
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x182484e6	iscsi_tcp_r2tpool_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x27b36290	iscsi_tcp_hdr_recv_prep
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x2e4a8e57	iscsi_tcp_r2tpool_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x375b5753	iscsi_segment_seek_sg
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x5932978e	iscsi_tcp_cleanup_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x5f25c6e9	iscsi_tcp_recv_skb
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x6ea628dd	iscsi_tcp_task_xmit
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x918054cb	iscsi_tcp_conn_get_stats
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x92903614	iscsi_tcp_segment_done
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x9dd85852	iscsi_tcp_dgst_header
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xbfb853ce	iscsi_tcp_conn_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xd287145c	iscsi_tcp_task_init
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xd40eafe5	iscsi_tcp_conn_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xfaecd488	iscsi_tcp_segment_unmap
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xfdb9e11b	iscsi_segment_init_linear
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x01b459ff	sas_ssp_task_response
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x0dd4eaef	sas_eh_device_reset_handler
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x14dd5229	sas_change_queue_type
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x1b97a61a	sas_slave_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x1c5e385d	sas_bios_param
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x3120c828	sas_target_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x4ed6b13e	sas_request_addr
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x627afac9	sas_find_local_phy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x62b0dcdb	sas_unregister_ha
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x6521c638	sas_task_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x67f9ac9c	sas_domain_release_transport
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x6f2487d4	sas_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x82113e0f	sas_slave_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x837b8530	sas_eh_bus_reset_handler
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x8ecdcd19	sas_phy_enable
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x91dd766f	sas_queuecommand
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xa8a3dc72	sas_slave_configure
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xcafc780b	sas_domain_attach_transport
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xd409c842	sas_phy_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xd49df3d0	sas_register_ha
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xfa0bf952	__sas_task_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xfb9b0bd1	sas_ioctl
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xff8d760b	sas_change_queue_depth
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x07ecd7f7	srp_target_free
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x1a8e6963	srp_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x7e597564	srp_transfer_data
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xae59fb88	srp_iu_get
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xb00df4ee	srp_cmd_queue
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xcfd5022e	srp_iu_put
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x060f5d4a	scsi_tgt_free_queue
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x1943b087	scsi_tgt_it_nexus_create
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x49f9602b	scsi_tgt_tsk_mgmt_request
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x7a3de799	scsi_host_put_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xa275263c	scsi_tgt_cmd_to_host
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xb77951b8	scsi_tgt_alloc_queue
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xbb8f607e	scsi_tgt_it_nexus_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xc1634ca1	scsi_tgt_queue_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xeef8771b	scsi_host_get_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x16608433	iscsi_add_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x17dca01a	iscsi_unblock_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x242877f5	iscsi_destroy_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x2f4c2626	iscsi_conn_error_event
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x502cbf80	iscsi_free_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x50953266	iscsi_alloc_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x535ed0bd	iscsi_create_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x5cfb31f1	iscsi_remove_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x665e9352	iscsi_recv_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x68080407	iscsi_register_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x71d73e0b	iscsi_destroy_conn
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x739312f6	iscsi_session_chkready
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x790fa42c	iscsi_create_conn
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x8bcf3adf	iscsi_session_event
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xb91eeccf	iscsi_host_for_each_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xca5231ea	iscsi_create_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xd34621f3	iscsi_lookup_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xdc51c64f	iscsi_unregister_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xdca28ad1	iscsi_block_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xdcb2941b	iscsi_scan_finished
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xe6d6d254	iscsi_offload_mesg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xf7cef32d	iscsi_destroy_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0x0ef06974	spi_populate_ppr_msg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xa0c71dac	spi_populate_sync_msg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xcffa2aff	spi_populate_width_msg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x00c149d9	srp_remove_host
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x2c26575d	srp_rport_add
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xdbe65824	srp_attach_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xe8087f17	srp_release_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xfbd9b0ef	srp_rport_del
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x41bd03ce	spi_bitbang_stop
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x7cd19ab2	spi_bitbang_transfer
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xaa84dae9	spi_bitbang_start
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xb467f6e9	spi_bitbang_setup_transfer
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xd2fc1512	spi_bitbang_cleanup
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xfc9e5388	spi_bitbang_setup
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x4740fc22	comedi_usb_auto_config
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x4e4b42d1	comedi_free_board_minor
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x813c41b0	comedi_pci_auto_unconfig
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xb5725623	comedi_usb_auto_unconfig
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xc57fdaf4	comedi_pci_auto_config
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xf5e55497	comedi_alloc_board_minor
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xff70a9ee	comedi_get_device_file_info
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/das08 0x86fcde20	das08_cs_boards
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/das08 0xafd5d44c	das08_common_attach
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/das08 0xe08b885e	das08_common_detach
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0x25e55b95	labpc_1200_is_unipolar
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0x3ddfb868	labpc_common_detach
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0x8285332a	range_labpc_1200_ai
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0xaf1e4347	labpc_1200_ai_gain_bits
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0xe9693292	labpc_common_attach
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x0f90e79f	ni_tio_insn_config
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x244c3c9e	ni_tio_set_gate_src
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x49bf0b4e	ni_tio_winsn
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x6ca3b66d	ni_tio_init_counter
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x7eb7a645	ni_gpct_device_construct
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x8b5f727a	ni_tio_arm
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xf43021b3	ni_gpct_device_destroy
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xf8e1849f	ni_tio_rinsn
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x04189fae	ni_tio_cancel
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x46f1f9c1	ni_tio_acknowledge_and_confirm
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x551ac4f5	ni_tio_cmdtest
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x70e629ec	ni_tio_handle_interrupt
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x82be56ae	ni_tio_set_mite_channel
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x9eeb4756	ni_tio_cmd
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x2468ed34	oslec_hpf_tx
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x579d2806	oslec_snapshot
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x587711de	oslec_create
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x882d5f27	oslec_adaption_mode
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xf828c15b	oslec_flush
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xf923a5b1	oslec_free
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xfabc3747	oslec_update
+EXPORT_SYMBOL_GPL drivers/staging/hv/hv_vmbus 0x0a1ee779	osd_WaitEventWait
+EXPORT_SYMBOL_GPL drivers/staging/hv/hv_vmbus 0x4cc1b61c	osd_WaitEventCreate
+EXPORT_SYMBOL_GPL drivers/staging/hv/hv_vmbus 0x5432d87a	osd_WaitEventSet
+EXPORT_SYMBOL_GPL drivers/staging/hv/hv_vmbus 0x746d1786	osd_PageAlloc
+EXPORT_SYMBOL_GPL drivers/staging/hv/hv_vmbus 0x83911c38	osd_PageFree
+EXPORT_SYMBOL_GPL drivers/staging/hv/hv_vmbus 0xa1b8d1ad	osd_WaitEventWaitEx
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x019c5ac1	sockfd_to_socket
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x0c6952a2	usbip_event_happened
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x14cbfbad	dev_attr_usbip_debug
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x3587c430	usbip_recv_xbuff
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x3aae835e	usbip_stop_threads
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x45d3c509	usbip_alloc_iso_desc_pdu
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x48aabaa8	usbip_start_threads
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x78b72f44	usbip_debug_flag
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x80011e8f	usbip_start_eh
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x90f42c29	usbip_pad_iso
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x9c2b1ffc	usbip_pack_pdu
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xa64f40b3	usbip_recv_iso
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xafcf4355	usbip_stop_eh
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xb279945e	usbip_dump_urb
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xc1ac0688	usbip_event_add
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xca82d9ea	usbip_task_init
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xcea0ac90	usbip_xmit
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xd02753dc	usbip_header_correct_endian
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xe1ea0586	usbip_dump_header
+EXPORT_SYMBOL_GPL drivers/uio/uio 0x567929fb	uio_event_notify
+EXPORT_SYMBOL_GPL drivers/uio/uio 0x957dd3cf	uio_unregister_device
+EXPORT_SYMBOL_GPL drivers/uio/uio 0xbeac4922	__uio_register_device
+EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0x8943d608	usbatm_usb_probe
+EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0x9ca47012	usbatm_usb_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x00b70edd	usb_ftdi_elan_edset_input
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x03622d5d	usb_ftdi_elan_read_pcimem
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x1d48208c	usb_ftdi_elan_edset_output
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x2e78c394	usb_ftdi_elan_edset_empty
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x5c520f62	usb_ftdi_elan_edset_flush
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x755cbb5d	usb_ftdi_elan_edset_setup
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xab76b7bd	usb_ftdi_elan_write_pcimem
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xb62fa18f	ftdi_elan_gone_away
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xfd726436	usb_ftdi_elan_edset_single
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x280f9738	usb_serial_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x2945ec5c	usb_serial_register
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x33865991	ezusb_writememory
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x522200d5	usb_serial_generic_resume
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x52ca915b	ezusb_set_reset
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x5c55507c	usb_serial_generic_write
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x5c73968d	usb_serial_handle_dcd_change
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x60d45078	usb_serial_generic_open
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x66ecd97a	usb_serial_handle_sysrq_char
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xa1962160	usb_serial_handle_break
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xb19815e9	usb_serial_deregister
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xbfc7ed60	usb_serial_port_softint
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xc54fa902	usb_serial_generic_resubmit_read_urb
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xca7b3fc8	usb_serial_generic_write_bulk_callback
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xcb8484a8	usb_serial_generic_read_bulk_callback
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xf687a324	usb_serial_probe
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x0be13004	usb_storage_usb_ids
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x155ad9c7	usb_stor_set_xfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1bc3edc2	usb_stor_sense_invalidCDB
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x2a1c1c21	usb_stor_bulk_transfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x4843ad5e	usb_stor_ctrl_transfer
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x524be847	usb_stor_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x56fe5324	fill_inquiry_response
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x69e6a80c	usb_stor_bulk_srb
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x76d27095	usb_stor_resume
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x7eb52f30	usb_stor_bulk_transfer_sg
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x87dfb263	usb_usual_ignore_device
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x8d5a7dd4	usb_stor_transparent_scsi_command
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xa507358b	usb_stor_probe1
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xa9b38129	usb_stor_suspend
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xaef2231d	usb_stor_CB_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xb0025689	usb_stor_pre_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xb45d6d4a	usb_stor_access_xfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xc81cef31	usb_stor_control_msg
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xd5eb7dd9	usb_stor_Bulk_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xdc18a583	usb_stor_post_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xdd15d9a9	usb_stor_CB_transport
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xdf36f590	usb_stor_reset_resume
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xf6332bad	usb_stor_probe2
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xfa8d8dc5	usb_stor_Bulk_transport
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xfc7cd642	usb_stor_clear_halt
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x09f3c921	wa_urb_enqueue_run
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x0b6cc46a	wa_urb_enqueue
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x2ca7a02b	wa_urb_dequeue
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x608f4f9b	rpipe_ep_disable
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x8668d134	rpipe_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x8b644de1	__wa_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xa2fc706e	wa_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x0b99617b	wusbhc_rh_start_port_reset
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x0ba286bd	wusbhc_b_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x0bb6bf5e	wusb_cluster_id_get
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x0cb63ba5	wusbhc_rh_status_data
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x18e61212	wusbhc_mmcie_set
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x1aeb80b6	wusbhc_reset_all
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x1c4e5ca7	wusbhc_rh_suspend
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x2a0d4dc7	__wusb_dev_get_by_usb_dev
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x3bca70cc	wusbhc_rh_control
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x429b634e	wusbhc_mmcie_rm
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x6c1a7b5a	wusbhc_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x76d26046	wusbhc_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x889996f2	wusbhc_b_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb53319fa	wusbhc_chid_set
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb725d128	wusb_cluster_id_put
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xdf6e4f08	wusb_dev_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xecd09395	wusbhc_rh_resume
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xee3f8b5f	wusbhc_handle_dn
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf534075a	wusbhc_giveback_urb
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf770a6b4	wusbd
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xfe2e17d7	wusb_et_name
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x04611d0b	i1480_rceb_check
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0xac91732c	i1480_cmd
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0xb8f0517c	i1480_fw_upload
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x17bb7a71	uwb_phy_rate_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x37da1613	uwb_ack_policy_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x59aa7d59	uwb_phy_rate_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x8876c5ef	uwb_rts_cts_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x900945d0	uwb_ack_policy_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xcf4ad30a	uwb_pca_base_priority_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xe9369e7c	uwb_rts_cts_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xf342f2dc	uwb_pca_base_priority_show
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x086d6c26	umc_device_create
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x73ba154a	__umc_driver_register
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x83a8f17b	umc_device_register
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x8ec174fe	umc_driver_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xab7e4712	umc_controller_reset
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xb607dc7a	umc_bus_type
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xc7cc7443	umc_match_pci_id
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xd9c8067e	umc_device_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x01a3ffe3	uwb_rc_init
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0b8aad57	uwb_est_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0fdae85c	uwb_rc_neh_error
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x15b21b9e	uwb_rc_cmd_async
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x196d1891	__uwb_rc_try_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x1e457d85	uwb_rc_ie_add
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x1fa6e437	uwb_rc_dev_addr_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x27d324f2	uwb_rc_post_reset
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2887b956	uwb_rc_rm
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x39d6cc63	uwb_rc_get_by_grandpa
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x43ebe71f	uwb_dev_try_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x48849ae5	uwb_rc_add
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4898a9ab	uwb_notifs_deregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4d57ae3c	uwb_rsv_type_str
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4d88b838	uwb_pal_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x519e6d7d	uwb_rsv_destroy
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x58af0e20	uwb_rc_reset_all
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5cbb4758	uwb_rsv_terminate
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5e4bc088	__uwb_addr_print
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5ee95ad0	uwb_rc_alloc
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6057079a	uwb_rc_cmd
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6759db8d	uwb_rc_ie_rm
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6c5245db	uwb_rc_get_by_dev
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6de3b541	uwb_radio_start
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6ec81fbc	uwb_rc_neh_grok
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x7dcfcd23	uwb_ie_next
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x8667eb45	uwb_rc_mac_addr_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x905e13d9	uwb_rsv_get_usable_mas
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x98413234	uwb_rsv_state_str
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x98a99a68	uwb_rsv_establish
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x9f237356	uwb_pal_init
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x9f3e3f32	uwb_radio_stop
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa9a9be96	uwb_rc_pre_reset
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb061f05b	uwb_rsv_create
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xbcf528a7	uwb_pal_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xce3be8ad	uwb_est_find_size
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xce84850e	uwb_dev_for_each
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd77737f8	uwb_rsv_accept
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe1716f06	uwb_est_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xea1f7ffb	uwb_notifs_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xea5b928e	uwb_rc_put
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf784b2c1	uwb_rc_vcmd
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xffdd866c	uwb_rsv_modify
+EXPORT_SYMBOL_GPL drivers/uwb/whci 0xaea7983d	whci_wait_for
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x08423e3c	wlp_dev_prim_OUI_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x20cd3c50	wlp_dev_name_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x21309fd2	wlp_wss_activate_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x344b6d1c	wlp_wss_setup
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x3611ef9b	wlp_dev_serial_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x3cf3c4b6	wlp_remove
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x41982411	wlp_prepare_tx_frame
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x4c7084cf	wlp_uuid_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x5580242b	wlp_eda_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x5ebcc5be	wlp_dev_manufacturer_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x5fbf022d	wlp_dev_prim_OUI_sub_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x6addff4a	wlp_wss_remove
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x76a9c588	wlp_eda_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x7dbbd578	wlp_dev_model_name_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x8ea728c6	wlp_dev_name_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x910ccf11	wlp_uuid_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xa76bb440	wlp_dev_model_nr_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xa7f0cda7	wlp_dev_prim_subcat_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xb0b295d9	wlp_receive_frame
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xb560447b	wlp_setup
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xbae67a12	wlp_wss_activate_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xbaff6740	wlp_dev_prim_OUI_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xbc65b673	wlp_dev_model_nr_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xc0fc2ba3	wlp_reset_all
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xc2ac130c	wlp_neighborhood_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xcfc978cd	wlp_dev_prim_category_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xd235e5e4	wlp_dev_prim_OUI_sub_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xd3d26158	wlp_dev_prim_category_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xd3d4c904	wlp_dev_serial_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xf26ca2eb	wlp_dev_model_name_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xfdee4787	wlp_dev_manufacturer_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xfef70bd5	wlp_dev_prim_subcat_store
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x01d85701	ili9320_suspend
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x233e1724	ili9320_probe_spi
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x4760eb3c	ili9320_write_regs
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x4ec6222c	ili9320_write
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x514f4cc9	ili9320_remove
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x5fd42a69	ili9320_shutdown
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xe6e19739	ili9320_resume
+EXPORT_SYMBOL_GPL drivers/video/fb_ddc 0xae4c3790	fb_ddc_read
+EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0x3a69f102	fb_sys_read
+EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0xb48962ee	fb_sys_write
+EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0xb83fb283	sis_free_new
+EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0xc6f761cc	sis_malloc_new
+EXPORT_SYMBOL_GPL drivers/video/vermilion/vmlfb 0x016e6c20	vmlfb_unregister_subsys
+EXPORT_SYMBOL_GPL drivers/video/vermilion/vmlfb 0x90c018c6	vmlfb_register_subsys
+EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x12c45d11	virtio_check_driver_offered_feature
+EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x3fb85651	register_virtio_driver
+EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x8b44cb39	register_virtio_device
+EXPORT_SYMBOL_GPL drivers/virtio/virtio 0xcd9ea48e	unregister_virtio_driver
+EXPORT_SYMBOL_GPL drivers/virtio/virtio 0xcdac0c9a	unregister_virtio_device
+EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x0ac0ab25	vring_interrupt
+EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x47945bfc	vring_new_virtqueue
+EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x7ec0e5d3	vring_del_virtqueue
+EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0xaf0060c7	vring_transport_features
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x29f97589	w1_read_8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x577e0726	w1_reset_select_slave
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x7c2f2afb	w1_calc_crc8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x98ccea54	w1_read_block
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xa7e840c2	w1_touch_block
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xdda4e3b1	w1_next_pullup
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xe31e0d41	w1_write_block
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xe67a8f40	w1_write_8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xee12e119	w1_reset_bus
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x0864c4a4	dlm_new_lockspace
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x2ac37d6e	dlm_posix_get
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x9321df95	dlm_lock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x9d4b4131	dlm_posix_unlock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xcc9fa388	dlm_posix_lock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xcf9f3328	dlm_release_lockspace
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xdc583c08	dlm_unlock
+EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0x7b4cc138	exportfs_encode_fh
+EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0x894212ca	exportfs_decode_fh
+EXPORT_SYMBOL_GPL fs/fat/fat 0x0d0e53a1	fat_search_long
+EXPORT_SYMBOL_GPL fs/fat/fat 0x131b6fb2	fat_alloc_new_dir
+EXPORT_SYMBOL_GPL fs/fat/fat 0x2a6c2815	fat_get_dotdot_entry
+EXPORT_SYMBOL_GPL fs/fat/fat 0x2a95ed9f	fat_fill_super
+EXPORT_SYMBOL_GPL fs/fat/fat 0x2c367725	fat_sync_inode
+EXPORT_SYMBOL_GPL fs/fat/fat 0x494a123d	fat_free_clusters
+EXPORT_SYMBOL_GPL fs/fat/fat 0x4a33d93c	fat_flush_inodes
+EXPORT_SYMBOL_GPL fs/fat/fat 0x4c7df655	fat_getattr
+EXPORT_SYMBOL_GPL fs/fat/fat 0x554f9f8c	fat_remove_entries
+EXPORT_SYMBOL_GPL fs/fat/fat 0x5a38a4d8	fat_scan
+EXPORT_SYMBOL_GPL fs/fat/fat 0x7713af0b	fat_setattr
+EXPORT_SYMBOL_GPL fs/fat/fat 0x9beecbfb	fat_build_inode
+EXPORT_SYMBOL_GPL fs/fat/fat 0xb39e95d3	fat_detach
+EXPORT_SYMBOL_GPL fs/fat/fat 0xbf141f87	fat_attach
+EXPORT_SYMBOL_GPL fs/fat/fat 0xce32b3b1	fat_time_unix2fat
+EXPORT_SYMBOL_GPL fs/fat/fat 0xde098c58	fat_dir_empty
+EXPORT_SYMBOL_GPL fs/fat/fat 0xf67602cf	fat_add_entries
+EXPORT_SYMBOL_GPL fs/fat/fat 0xf873fbd9	fat_fs_error
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x04ab710a	nlmclnt_init
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x17ce645d	locks_end_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x1a618932	nlmsvc_unlock_all_by_ip
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x592ebc7a	nlmclnt_done
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x6f959b35	locks_in_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x7f2ca5cf	nlmsvc_ops
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x96877ac4	locks_start_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xa7b91a7b	lockd_down
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xae56a499	nlmclnt_proc
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xe1e3d426	nlmsvc_unlock_all_by_sb
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xf6933c48	lockd_up
+EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0x7903fa6f	nfsacl_decode
+EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0x9c26579b	nfsacl_encode
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1b89c6ee	o2hb_fill_node_map
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1cb231d0	mlog_not_bits
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1d747ce3	o2hb_check_node_heartbeating
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x2cc0c5ec	o2nm_node_get
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x36418553	o2net_send_message
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x44376b04	o2hb_unregister_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x4900035b	o2hb_stop_all_regions
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x60a870cf	o2nm_get_node_by_num
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x687f6251	mlog_and_bits
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x7e9d321e	o2hb_setup_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa82a8645	o2nm_this_node
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa87bc9e7	o2nm_configured_node_map
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa9f5379a	o2net_send_message_vec
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xae808bac	o2net_register_handler
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xbaeb4700	o2hb_check_node_heartbeating_from_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xd60f2c6c	o2hb_check_local_node_heartbeating
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xdd0b341c	o2hb_register_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xe503e217	o2nm_get_node_by_ip
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf1a5611d	o2net_unregister_handler_list
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xfc48c24b	o2nm_node_put
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x0f443c2c	dlm_print_one_lock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x60a1bf2b	dlmunlock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x7a1211f8	dlm_setup_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x98ea501e	dlmlock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x9fa51a0e	dlm_unregister_domain
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xbe3ee845	dlm_register_domain
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd3051071	dlm_register_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd7ba575e	dlm_errmsg
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd8fa57a6	dlm_unregister_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xfb86b96f	dlm_errname
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0562c415	ocfs2_cluster_this_node
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x06379db6	ocfs2_dlm_lvb_valid
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0e27f909	ocfs2_dlm_lock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x15df1f1d	ocfs2_plock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x21db5b88	ocfs2_cluster_disconnect
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4a1f6fe9	ocfs2_cluster_connect
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4d3af7fa	ocfs2_cluster_hangup
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x81c85a68	ocfs2_dlm_lock_status
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x91fab465	ocfs2_dlm_lvb
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x963932a3	ocfs2_stack_glue_set_locking_protocol
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xa7d5c1c0	ocfs2_dlm_unlock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xb5fea631	ocfs2_stack_glue_register
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xbbc4ef97	ocfs2_stack_supports_plocks
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xca37382e	ocfs2_stack_glue_unregister
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xd066711e	ocfs2_dlm_dump_lksb
+EXPORT_SYMBOL_GPL lib/lzo/lzo_compress 0x56b63670	lzo1x_1_compress
+EXPORT_SYMBOL_GPL lib/lzo/lzo_decompress 0xf30fda27	lzo1x_decompress_safe
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x300d7e57	free_rs
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x6fbb3bd9	init_rs_non_canonical
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xabda1e2e	decode_rs16
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xb050f329	init_rs
+EXPORT_SYMBOL_GPL net/802/garp 0x33834dca	garp_init_applicant
+EXPORT_SYMBOL_GPL net/802/garp 0x33c8fc02	garp_uninit_applicant
+EXPORT_SYMBOL_GPL net/802/garp 0x5278574c	garp_request_join
+EXPORT_SYMBOL_GPL net/802/garp 0x58a6afaa	garp_register_application
+EXPORT_SYMBOL_GPL net/802/garp 0xb96718fd	garp_unregister_application
+EXPORT_SYMBOL_GPL net/802/garp 0xd7e87230	garp_request_leave
+EXPORT_SYMBOL_GPL net/802/stp 0x4cb2f12a	stp_proto_register
+EXPORT_SYMBOL_GPL net/802/stp 0xf576159b	stp_proto_unregister
+EXPORT_SYMBOL_GPL net/ax25/ax25 0xa404739d	ax25_register_pid
+EXPORT_SYMBOL_GPL net/ax25/ax25 0xac93ae05	ax25_bcast
+EXPORT_SYMBOL_GPL net/ax25/ax25 0xaeb7451e	ax25_defaddr
+EXPORT_SYMBOL_GPL net/bluetooth/bluetooth 0x429c74b6	bt_class
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x07630a9f	dccp_poll
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x11b8e3c5	dccp_shutdown
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x1d99d49a	dccp_timestamp
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x23fb850b	dccp_connect
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x24b581da	dccp_insert_option
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x2c73f00d	dccp_ctl_make_reset
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x30f5a91d	dccp_sendmsg
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x34d88523	inet_dccp_listen
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x3f4382c8	dccp_recvmsg
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x3f44e2df	dccp_sync_mss
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x42dcbfba	dccp_parse_options
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x449c7582	dccp_make_response
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x44cdd8fe	dccp_check_req
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x4cdd391d	dccp_feat_list_purge
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x534baa7d	dccp_ioctl
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x56ea266a	dccp_state_name
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x68df91cb	dccp_reqsk_init
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x6ffd9e01	dccp_send_sync
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x70b1d967	dccp_orphan_count
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x71f444be	dccp_done
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x81a43e10	dccp_close
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x83e5bdcf	dccp_destroy_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x86be7924	dccp_packet_name
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x8b7d8caf	dccp_statistics
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x94cf16ab	dccp_rcv_state_process
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xa218a8b9	dccp_insert_option_elapsed_time
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xa243cb36	dccp_setsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xadd5081f	dccp_rcv_established
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xcb1e79ec	dccp_reqsk_send_ack
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xccb143a6	dccp_disconnect
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xcccaa928	dccp_hashinfo
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xdbe8965f	dccp_send_ack
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xe31d645f	dccp_getsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xe4e1ab71	dccp_create_openreq_child
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xe5cf7018	dccp_set_state
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xe8ee252d	dccp_child_process
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xe9553397	dccp_death_row
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xef6bf82b	dccp_init_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xf0ffb6f2	dccp_insert_option_timestamp
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x594e5f67	dccp_v4_send_check
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x6d90d4a6	dccp_v4_conn_request
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x7f17f2ca	dccp_invalid_packet
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xbcfd49af	dccp_v4_do_rcv
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xd63bf9db	dccp_v4_connect
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xfef765c6	dccp_v4_request_recv_sock
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0x5794431e	nf_nat_seq_adjust_hook
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0x6d40a921	need_ipv4_conntrack
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_defrag_ipv4 0x6b6c3d10	nf_defrag_ipv4_enable
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x07ae60b6	nf_nat_proto_in_range
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x0a553386	nf_nat_proto_range_to_nlattr
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x0f25d432	nf_nat_proto_unique_tuple
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x110838e8	nf_nat_proto_put
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x39cd1133	nf_nat_icmp_reply_translation
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x48fb1d6c	nf_nat_proto_find_get
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x7977f0ed	nf_nat_get_offset
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x94a08134	nf_nat_proto_nlattr_to_range
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xb4ec819c	nf_nat_packet
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat_proto_gre 0x636b12c8	nf_nat_need_gre
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x26b74667	tcp_vegas_cwnd_event
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x2cd51e1d	tcp_vegas_init
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x8538dde1	tcp_vegas_pkts_acked
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xc46ebe7f	tcp_vegas_state
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xd8ea3c91	tcp_vegas_get_info
+EXPORT_SYMBOL_GPL net/mac80211/mac80211 0x350e35b6	ieee80211_iterate_active_interfaces_atomic
+EXPORT_SYMBOL_GPL net/mac80211/mac80211 0xa3994edb	ieee80211_iterate_active_interfaces
+EXPORT_SYMBOL_GPL net/netfilter/ipvs/ip_vs 0xe6476b4a	net_vs_ctl_path
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x041013fd	nf_conntrack_lock
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x045072cd	nf_ct_port_nla_policy
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x143ca9da	nf_ct_l3protos
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x154a292e	nf_conntrack_event_cb
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x17094d05	nf_ct_expect_alloc
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x20b68500	nf_conntrack_l4proto_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x34fec424	__nf_ct_refresh_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x380e4252	nf_ct_expect_related_report
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3976a429	nf_conntrack_alter_reply
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3cd25e28	nf_ct_delete_from_lists
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3d20a943	nf_ct_expect_register_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3f5b1415	nf_ct_port_nlattr_to_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x40840727	nf_ct_nat_offset
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x42296afa	nf_conntrack_in
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x428686b9	nf_conntrack_hash_insert
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4a867991	nf_conntrack_tuple_taken
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4ace9c19	__nf_conntrack_helper_find_byname
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4b57a230	__nf_ct_expect_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4b9065a9	nf_ct_alloc_hashtable
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4fa09eae	nf_ct_port_tuple_to_nlattr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5041e540	nf_conntrack_l4proto_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5882ba33	nf_conntrack_set_hashsize
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x59b8df88	nf_ct_remove_expectations
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5af94fca	nf_conntrack_l4proto_tcp6
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5d0a13dc	nf_ct_expect_init
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x62813e5c	nf_ct_port_nlattr_tuple_size
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x63183b81	nf_ct_expect_unregister_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x65fde7a3	nf_conntrack_l3proto_generic
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x666d60fb	nf_ct_expect_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x68cf2d48	nf_conntrack_l4proto_tcp4
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6949a601	nf_ct_l3proto_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6acb8cce	nf_conntrack_helper_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6e224a7a	need_conntrack
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x71bba362	nf_conntrack_register_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x7309d6b2	nfnetlink_parse_nat_setup_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x7510d17a	nf_conntrack_flush_report
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x78f9b710	nf_ct_l3proto_try_module_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8033d2b8	nf_conntrack_unregister_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x89dd373b	nf_conntrack_untracked
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8d0b2045	nf_ct_extend_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8eaf8d3e	nf_ct_unexpect_related
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8fc72d01	nf_ct_l3proto_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8ffe7e89	nf_conntrack_htable_size
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x90ff6c9f	nf_ct_invert_tuplepr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9af3f6c1	nf_ct_free_hashtable
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9ddd0936	nf_conntrack_helper_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb153be68	nf_ct_get_tuplepr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb602c57e	nf_ct_l3proto_module_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb676a7bb	nf_ct_deliver_cached_events
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb874454e	nf_expect_event_cb
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb8cad030	seq_print_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc1863a0c	nf_conntrack_l4proto_udp4
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc18ac88d	nf_ct_expect_hsize
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc41d073c	nf_ct_iterate_cleanup
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc85e5af3	__nf_ct_l4proto_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc8e3b4b9	nf_conntrack_l3proto_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc9eb71f1	nf_conntrack_l3proto_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xd68dd5eb	nf_conntrack_alloc
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xd82c7e06	nf_ct_invert_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xdc937347	__nf_ct_try_assign_helper
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xdfa1a694	nf_ct_helper_ext_add
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xe1a7592b	nf_ct_unlink_expect
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xec50d066	print_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xecb56efe	__nf_conntrack_confirm
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xeecbdfd9	__nf_ct_kill_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xef049140	nf_ct_expect_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf28e65b2	nf_conntrack_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf38bcdf3	nf_conntrack_max
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf3b0588e	nf_conntrack_l4proto_udp6
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf5059e17	nf_conntrack_free
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf587ab42	__nf_conntrack_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf7ac1c09	nf_ct_insert_dying_list
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xfe924a5e	nf_ct_extend_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xff2e60a6	nf_ct_get_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_amanda 0x0da40531	nf_nat_amanda_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_ftp 0x3f706960	nf_nat_ftp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x2029f433	nat_q931_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x23a6c280	set_h245_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x307e7f12	nat_callforwarding_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x52dcc763	nat_rtp_rtcp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x6e1cc01d	set_h225_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x76cde3b3	set_ras_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x825823d5	set_sig_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xd8f32b48	get_h225_addr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xedd17d96	nat_h245_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xf28c1a40	nat_t120_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_irc 0xd3f60bd5	nf_nat_irc_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x86df2e5f	nf_nat_pptp_hook_expectfn
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0xa00e221a	nf_nat_pptp_hook_inbound
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0xb2b8ac5b	nf_nat_pptp_hook_outbound
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0xeab97cca	nf_nat_pptp_hook_exp_gre
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_proto_gre 0x694cfa36	nf_ct_gre_keymap_add
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_proto_gre 0x97025e07	nf_ct_gre_keymap_destroy
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x1e9389b1	nf_nat_sip_expect_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x30f15019	nf_nat_sdp_port_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x326b9a04	nf_nat_sdp_media_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x42411adb	nf_nat_sdp_session_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x577b912a	ct_sip_get_header
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x6fc59583	ct_sip_parse_numerical_param
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x8c22bc74	ct_sip_parse_request
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x97194d89	nf_nat_sip_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xa642b6a5	nf_nat_sdp_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xc9884685	ct_sip_get_sdp_header
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xcbe20bb4	ct_sip_parse_header_uri
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xfa8b732c	ct_sip_parse_address_param
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_tftp 0x529daf84	nf_nat_tftp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_tproxy_core 0x18a6a235	nf_tproxy_assign_sock
+EXPORT_SYMBOL_GPL net/netfilter/nf_tproxy_core 0xa139eff1	nf_tproxy_get_sock_v4
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x110ad4d2	nfnetlink_unicast
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x1f58e71b	nfnl_lock
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x3895cd7a	nfnl_unlock
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x3cb7f43d	nfnetlink_subsys_register
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x6dab4d8a	nfnetlink_send
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xeca95329	nfnetlink_has_listeners
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xef9b4bbd	nfnetlink_set_err
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xf281cf27	nfnetlink_subsys_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink_log 0xe871297c	nfulnl_log_packet
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x010e38bd	xt_check_match
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x0e749087	xt_replace_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x1a582d63	xt_table_unlock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x40728a63	xt_find_revision
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x4f432b51	per_cpu__xt_info_locks
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x589cd84c	xt_request_find_target
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x5c2891c1	xt_find_table_lock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xbf5b8031	xt_register_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xcf99fc26	xt_unregister_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xd2e24f3b	xt_proto_init
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xef03a539	xt_proto_fini
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xef1fa49a	xt_check_target
+EXPORT_SYMBOL_GPL net/netfilter/xt_RATEEST 0xc2429b63	xt_rateest_lookup
+EXPORT_SYMBOL_GPL net/netfilter/xt_RATEEST 0xfc852663	xt_rateest_put
+EXPORT_SYMBOL_GPL net/rds/rds 0x00a467af	rds_wq
+EXPORT_SYMBOL_GPL net/rds/rds 0x0587b1de	rds_conn_create_outgoing
+EXPORT_SYMBOL_GPL net/rds/rds 0x12eb9ec6	rds_info_deregister_func
+EXPORT_SYMBOL_GPL net/rds/rds 0x1a71b142	rds_page_copy_user
+EXPORT_SYMBOL_GPL net/rds/rds 0x2c5c5514	rds_message_add_rdma_dest_extension
+EXPORT_SYMBOL_GPL net/rds/rds 0x3101936e	rds_message_add_extension
+EXPORT_SYMBOL_GPL net/rds/rds 0x3565184c	rds_rdma_send_complete
+EXPORT_SYMBOL_GPL net/rds/rds 0x44a91859	rds_conn_destroy
+EXPORT_SYMBOL_GPL net/rds/rds 0x52d0d959	rds_conn_create
+EXPORT_SYMBOL_GPL net/rds/rds 0x5b0a11f9	rds_connect_complete
+EXPORT_SYMBOL_GPL net/rds/rds 0x73aac73d	rds_message_populate_header
+EXPORT_SYMBOL_GPL net/rds/rds 0x747ef656	rds_conn_drop
+EXPORT_SYMBOL_GPL net/rds/rds 0x86dfe1dd	rds_info_copy
+EXPORT_SYMBOL_GPL net/rds/rds 0x885b03db	rds_cong_map_updated
+EXPORT_SYMBOL_GPL net/rds/rds 0x8925dbb3	rds_inc_put
+EXPORT_SYMBOL_GPL net/rds/rds 0x9675e491	rds_send_drop_acked
+EXPORT_SYMBOL_GPL net/rds/rds 0x96fafe85	rds_stats_info_copy
+EXPORT_SYMBOL_GPL net/rds/rds 0x9b3e6113	per_cpu__rds_stats
+EXPORT_SYMBOL_GPL net/rds/rds 0x9d8c10d1	rds_recv_incoming
+EXPORT_SYMBOL_GPL net/rds/rds 0x9fd56d92	rds_trans_register
+EXPORT_SYMBOL_GPL net/rds/rds 0xa8b9ff01	rds_for_each_conn_info
+EXPORT_SYMBOL_GPL net/rds/rds 0xaa681a5b	rds_inc_addref
+EXPORT_SYMBOL_GPL net/rds/rds 0xb0c236ef	rds_message_put
+EXPORT_SYMBOL_GPL net/rds/rds 0xb1985677	rds_trans_unregister
+EXPORT_SYMBOL_GPL net/rds/rds 0xce589075	rds_message_addref
+EXPORT_SYMBOL_GPL net/rds/rds 0xe1a8bb9c	rds_inc_init
+EXPORT_SYMBOL_GPL net/rds/rds 0xe8fce046	rds_message_unmapped
+EXPORT_SYMBOL_GPL net/rds/rds 0xe99213d1	rds_send_get_message
+EXPORT_SYMBOL_GPL net/rds/rds 0xf81f1b49	rds_info_register_func
+EXPORT_SYMBOL_GPL net/rxrpc/af-rxrpc 0xe69015d1	rxrpc_unregister_security
+EXPORT_SYMBOL_GPL net/rxrpc/af-rxrpc 0xe6c8e087	rxrpc_register_security
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x00c52ef5	g_make_token_header
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x3aaece93	gss_pseudoflavor_to_service
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x4e595765	svc_gss_principal
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x5578bd49	gss_mech_get
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x860a2811	gss_mech_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x86f0705c	gss_service_to_auth_domain_name
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x8d1a827e	svcauth_gss_register_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xab5fbebc	gss_mech_get_by_name
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xafca3c8b	gss_mech_get_by_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xb5dea7ef	g_token_size
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xba9352f1	gss_mech_register
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xf62ac13c	svcauth_gss_flavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xf8b2ff6e	g_verify_token_header
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xfe0ff150	gss_mech_put
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xff85403e	gss_svc_to_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0106eb00	svc_auth_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x02891e1c	rpc_peeraddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x02afbaef	rpc_shutdown_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x05e807a9	xdr_encode_string
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x065994f1	xdr_encode_opaque_fixed
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x069640ec	rpcauth_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0819af19	svc_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x09fd0104	xdr_enter_page
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0a40e53f	rpc_clone_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0daea596	rpc_wake_up_queued_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0df13c50	sunrpc_cache_unregister_pipefs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0f668ba9	svc_auth_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0f9fd9c0	rpc_ntop
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0fa8f3ee	rpcb_getport_async
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1219b644	rpcauth_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1229da74	svc_set_num_threads
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x12e280e3	svc_proc_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x13df10ca	svc_wake_up
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x13ed280a	xdr_encode_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x15b4e5ac	rpc_call_async
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1b6c6b1a	rpc_call_null
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1bdce869	xdr_decode_array2
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1c1b2f6d	svc_close_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x20ce73eb	rpc_mkpipe
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x20dadc10	rpc_get_mount
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x20fd0d28	xprt_adjust_cwnd
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x21f470ee	xprt_set_retrans_timeout_def
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2217cae0	rpc_lookup_machine_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2244d55c	xprt_release_rqst_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2919b156	xdr_decode_string_inplace
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2aa17774	rpc_free_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2da01a19	svc_authenticate
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2dd26b88	cache_check
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2e3db6f7	xdr_buf_from_iov
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2e5c34fe	svc_xprt_init
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2eec63c9	xdr_encode_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x314bd72d	put_rpccred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x31a89d59	rpc_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x32375a6f	xprt_lookup_rqst
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x328b9839	xdr_partial_copy_from_skb
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3329ed39	xprt_write_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x37995061	rpc_wake_up_next
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3a2af421	rpc_exit_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3b6bb549	svcauth_unix_set_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3ceab17f	xprt_complete_rqst
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3efe5779	csum_partial_copy_to_xdr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x40bea1f4	sunrpc_cache_update
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x418f5706	rpc_delay
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x429289a3	rpc_force_rebind
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x435f31c1	rpc_sleep_on
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x45419507	xdr_init_encode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4597cdd2	svc_exit_thread
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x476fbbab	unix_domain_find
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4988af74	xdr_shift_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4dd52eb5	rpcauth_destroy_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x508ae3d7	xdr_encode_word
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x51396f5b	svc_sock_names
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x53445f68	nlm_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x550547a3	rpc_destroy_wait_queue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x59751fd6	xdr_inline_decode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5b14ec1a	rpc_put_mount
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5bd26000	rpc_proc_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5e1ad216	svc_xprt_received
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6040e6fc	xprt_reserve_xprt_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x611482cd	rpc_killall_tasks
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x64bd82ba	rpc_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x65064d26	svc_drop
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x675524ec	rpc_sockaddr2uaddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x68592978	rpc_alloc_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6b743cc4	xdr_skb_read_bits
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6c5304c5	rpcb_getport_sync
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6cbf76ae	svc_set_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6dd79b20	rpc_print_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6eea229d	svcauth_unix_purge
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x701604ed	auth_domain_put
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x71f48c8d	rpc_peeraddr2str
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x71fa908a	cache_flush
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7669d7d6	cache_purge
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7881d3bf	rpc_call_sync
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x78b7d232	rpc_unlink
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7abbe7d0	xprt_reserve_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7cf4e19f	rpc_lookup_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7de53067	rpc_init_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x81341538	xdr_encode_array2
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x823627ff	xprt_register_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8322e99d	xdr_buf_read_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x83b21abb	xdr_process_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x86ed282a	rpc_uaddr2sockaddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8749ccf2	rpcauth_lookup_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8b642a03	svc_print_addr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8c3d1b87	xprt_update_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8dcc8c45	xprt_release_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x90677749	svc_sock_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x924c9d0a	xdr_buf_subsegment
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x96f7a050	auth_domain_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x98463fe8	auth_domain_find
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x999e46db	svc_proc_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9aacc776	sunrpc_cache_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9c66d549	svc_sock_update_bufs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9da885b7	rpc_proc_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9e137d55	sunrpc_cache_pipe_upcall
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9f7c6356	auth_unix_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa4d7d0bf	rpcauth_init_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa918d985	svc_find_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa96b6fff	xprt_set_retrans_timeout_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa9890fba	xdr_read_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xabcb3036	xprt_wake_pending_tasks
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xaf5bf6ef	nfs_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb09854c0	cache_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb0b45575	xdr_reserve_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb18c9060	xdr_decode_word
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb387b246	rpc_wake_up_status
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb44aa44b	auth_unix_forget_old
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb45a7210	xdr_init_decode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb48edce1	xprt_release_xprt_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb6e73cae	svc_addsock
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xba67de3f	rpcauth_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbbcabf99	svc_process
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbcffcd04	svc_create_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbf9d1b96	nfsd_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc0a4d207	svc_max_payload
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc0bbb1cc	svc_reserve
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc12435e3	rpc_calc_rto
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc2092043	svc_recv
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc34715e3	svc_seq_show
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc3880471	xdr_decode_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc8e96dea	qword_addhex
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xccc2372e	rpc_pton
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcee467f3	xprt_load_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd01fd7d2	rpc_restart_call
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd0650356	rpc_max_payload
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd1af923d	svc_xprt_copy_addrs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd1c1ab79	rpc_malloc
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd2bc9385	xprt_unregister_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd36d9044	svc_unreg_xprt_class
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd572afd2	sunrpc_cache_register_pipefs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd592c74f	xdr_write_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd6cf7538	svc_reg_xprt_class
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd7e5c779	rpcauth_generic_bind_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd82c728e	rpc_init_wait_queue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdb77b875	auth_unix_add_addr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdcf77f5a	read_bytes_from_xdr_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe197cc26	rpc_restart_call_prepare
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe4176690	xprt_wait_for_buffer_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe5919cb1	xdr_encode_opaque
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe8a6442e	svc_xprt_names
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe973c487	rpc_call_start
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe97f4ce5	qword_get
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xedcf6be4	qword_add
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xedd1ba52	rpc_wake_up
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xeeacab69	rpc_update_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xefd56e24	svc_create_pooled
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf11da62c	rpc_put_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf53292a1	svc_prepare_thread
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf54b31da	xprt_disconnect_done
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf60bfbc3	svc_xprt_put
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf62f1e67	svc_sock_destroy
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf6fbc570	rpc_setbufsize
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf71fb5a4	__rpc_wait_for_completion_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf876ddb9	rpc_run_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf8cda758	rpcauth_init_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf9d020f0	rpc_queue_upcall
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf9d1164c	rpc_free
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfbd760f4	svc_xprt_enqueue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfc224cbb	rpc_bind_new_program
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfdc59b68	svc_destroy
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xff13dd24	cache_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xff980730	xdr_inline_pages
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x12fcad53	wimax_state_change
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x25f58f15	wimax_report_rfkill_hw
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x36aff384	wimax_msg_alloc
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x3fc70218	wimax_msg_send
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x64acf230	wimax_msg
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x826b65f6	wimax_state_get
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x9111b406	wimax_msg_len
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xa40e9268	wimax_dev_add
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xa9cd258a	wimax_dev_rm
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xaddf6f8e	wimax_msg_data_len
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xc7c48160	wimax_dev_init
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xdde0c581	wimax_msg_data
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xfc603004	wimax_report_rfkill_sw
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x06404876	cfg80211_wext_giwauth
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x0c2ebe99	cfg80211_wext_giwrate
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x116b55f2	cfg80211_wext_giwap
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x128986fc	cfg80211_wext_giwfreq
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x27df5676	cfg80211_wext_siwfrag
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x2a35a265	cfg80211_wext_giwtxpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x2d20bba9	cfg80211_wext_siwmode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x42fa105b	cfg80211_wext_siwessid
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x44e9079e	cfg80211_wext_giwpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x45b443ef	cfg80211_wext_siwrts
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x479d9652	cfg80211_wext_siwrate
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x4814af8e	cfg80211_wext_siwpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x4df360bd	cfg80211_wext_siwauth
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x4e07b84b	cfg80211_wext_giwessid
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x50bb4b8c	cfg80211_wext_siwap
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x55d93146	cfg80211_wext_siwretry
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x59249956	cfg80211_wext_giwretry
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x6a21495a	cfg80211_wext_giwname
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x6b74ef0c	cfg80211_wext_giwscan
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x6c6c7ebd	cfg80211_wext_giwfrag
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x8884fa54	cfg80211_wext_siwscan
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x93c1b959	cfg80211_wext_siwtxpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x9e967dc3	cfg80211_wext_siwmlme
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xa5750ad9	cfg80211_wext_siwfreq
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xb0bf1ce0	cfg80211_wext_siwgenie
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xc0cabbc3	cfg80211_wext_siwencode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xc497f700	cfg80211_wext_giwrange
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xd091aad1	cfg80211_wext_giwmode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xdd71560f	cfg80211_wext_giwencode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xde3ce672	cfg80211_wireless_stats
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xf248cfca	cfg80211_wext_giwrts
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xfef2e9d9	cfg80211_wext_siwencodeext
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x43718bd2	ipcomp_input
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x61b7eaa8	ipcomp_destroy
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0xb2daca70	ipcomp_init_state
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0xe92a70a3	ipcomp_output
+EXPORT_SYMBOL_GPL sound/core/snd-pcm 0xa286a234	snd_pcm_format_name
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x00c40141	snd_hda_ctl_add
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x03079e74	snd_hda_mixer_bind_switch_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x035cd5e9	snd_hda_multi_out_analog_open
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x04d10560	snd_hda_resume
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0d7a7155	snd_hda_bind_sw
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x166a08eb	snd_hda_multi_out_dig_open
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x196e45bb	snd_hda_multi_out_analog_cleanup
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1e82b55d	snd_hda_check_board_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1f17f289	snd_hda_codec_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x20819194	snd_hda_query_pin_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x21c60ac2	snd_hda_queue_unsol_event
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x252898f2	snd_hda_codec_setup_stream
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2a65bb72	snd_hda_ch_mode_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2bfa2eda	snd_hda_suspend
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2cb4b1d7	snd_hda_parse_pin_def_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2e6a5e57	snd_hda_is_supported_format
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x33d0ded8	snd_hda_attach_beep_device
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x388702e1	snd_hda_build_pcms
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3cfec99d	snd_hda_codec_configure
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3f3dd37b	snd_hda_mixer_bind_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3f7997f8	snd_hda_mixer_amp_switch_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4409fb3e	snd_hda_codec_amp_read
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x45cc2c30	snd_hda_detach_beep_device
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4672cfc2	snd_hda_check_board_codec_sid_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4c0b91f4	snd_hda_mixer_amp_volume_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4dc9e610	snd_hda_get_connections
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4e6b20c2	snd_hda_sequence_write
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x53274c2d	snd_hda_ch_mode_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x58ef35bf	snd_hda_get_bool_hint
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x59ec9c2e	snd_hda_build_controls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5ae76f73	auto_pin_cfg_labels
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x609d12dc	snd_hda_load_patch
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6639d607	snd_hda_codec_get_pincfg
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x687c6504	snd_hda_codec_amp_update
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6a92b689	snd_hda_mixer_bind_ctls_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7100da1e	snd_hda_codec_read
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7b3ebe9d	snd_hda_create_spdif_out_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7cbae943	snd_hda_add_new_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7d8df244	snd_hda_codec_cleanup_stream
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x83ddc89b	snd_hda_codec_set_pincfg
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x861a14c5	snd_hda_mixer_bind_ctls_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x87ccf1ca	snd_hda_multi_out_analog_prepare
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8b4712bc	snd_hda_bind_vol
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8e80f2af	snd_hda_mixer_amp_switch_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x935ed701	snd_hda_delete_codec_preset
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9551940c	snd_hda_bus_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9a8e1877	snd_array_free
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9b2d00e6	snd_hda_multi_out_dig_cleanup
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa063d614	snd_hda_power_down
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa08333b8	snd_hda_mixer_amp_volume_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa2827d76	snd_hda_get_jack_location
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa40d2ae8	snd_hda_codec_write
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa4290725	snd_hda_ch_mode_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa54e48e4	snd_hda_get_sub_nodes
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa808b1d5	snd_hda_multi_out_dig_close
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa94ace10	snd_hda_codec_resume_amp
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xad87613e	snd_print_pcm_rates
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb2fefb23	snd_hda_mixer_bind_switch_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb462f842	snd_hda_codec_write_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb5e96a36	snd_hda_set_vmaster_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb7b1c78b	snd_hda_codec_resume_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xba1f666f	snd_hda_get_hint
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbe7dd7dc	snd_array_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbeac9ce8	snd_hda_create_spdif_in_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbf31db78	snd_hda_find_mixer_ctl
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc34a54c6	snd_hda_calc_stream_format
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc652fd69	snd_hda_get_jack_connectivity
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcb301b6e	snd_hda_get_jack_type
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcce27eb0	snd_hda_input_mux_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd3f135b4	snd_hda_mixer_amp_switch_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd42a8f4a	snd_hda_create_spdif_share_sw
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd5263f1f	snd_hda_add_vmaster
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd8b04756	snd_hda_input_mux_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xdb0f6279	snd_hda_mixer_amp_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xdb6bd3de	snd_hda_mixer_bind_ctls_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xdedfc15b	query_amp_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe0dda5ca	snd_hda_override_amp_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe4b60a7d	snd_hda_multi_out_dig_prepare
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe90ef868	snd_hda_power_up
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe9ec88a4	snd_hda_add_codec_preset
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeda3a721	snd_print_pcm_bits
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xfac05dc2	snd_hda_sequence_write_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xfdb3937a	snd_hda_check_amp_list_power
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xfdf2f4a3	snd_hda_mixer_amp_volume_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xff8a413a	snd_hda_codec_amp_stereo
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1836 0x562d13c6	soc_codec_dev_ad1836
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1836 0xb1c88581	ad1836_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1938 0x4768e46f	ad1938_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1938 0x7012592d	soc_codec_dev_ad1938
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0x6c22624a	soc_codec_dev_ad73311
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0xc5f7d619	ad73311_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4104 0x38b9aa32	soc_codec_device_ak4104
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0x17c5fc3c	ak4535_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0xb6dca57d	soc_codec_dev_ak4535
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4642 0x41e8f5e9	ak4642_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4642 0xee678ad1	soc_codec_dev_ak4642
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0x33354782	soc_codec_device_cs4270
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0xd5973858	cs4270_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-l3 0x78c84c7e	l3_write
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-max9877 0x56be2ded	max9877_add_controls
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0x76343870	soc_codec_dev_pcm3008
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0xdab02917	pcm3008_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-spdif 0xf3fbef78	dit_stub_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0x7357018e	ssm2602_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0x7d813dbb	soc_codec_dev_ssm2602
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0xb898cd20	tlv320aic23_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0xd0c11161	soc_codec_dev_tlv320aic23
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0x3f9ecaef	aic26_soc_codec_dev
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0xacedd367	aic26_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x0785b167	aic3x_set_headset_detection
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x1008f4f0	aic3x_get_gpio
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x3fc8b3cf	aic3x_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x71933d80	aic3x_set_gpio
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xa8c70dbf	aic3x_headset_detected
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xd71a8757	aic3x_button_pressed
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xe3255ad5	soc_codec_dev_aic3x
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0xd20cb5b3	soc_codec_dev_twl4030
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0xee6e6fad	twl4030_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda134x 0x13b4d3b6	soc_codec_dev_uda134x
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x220eefdf	soc_codec_dev_uda1380
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x5c2e1a7a	uda1380_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0x757206d5	wm_hubs_spkmix_tlv
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0x9bb07cd0	wm_hubs_add_analogue_controls
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0xaaf36955	wm_hubs_add_analogue_routes
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x4b20c8c9	wm8350_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0xb08d3183	wm8350_hp_jack_detect
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0xb22e6abf	soc_codec_dev_wm8350
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x13ddee77	wm8400_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x293290ed	soc_codec_dev_wm8400
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0x7dfef17d	wm8510_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0xdf8822be	soc_codec_dev_wm8510
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8523 0xca82994e	wm8523_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8523 0xf6e3cf24	soc_codec_dev_wm8523
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0xc3eb8c1f	wm8580_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0xd0591931	soc_codec_dev_wm8580
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0xbf1ede64	soc_codec_dev_wm8728
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0xe2606ef0	wm8728_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x6318348c	wm8731_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x6f1e0f1a	soc_codec_dev_wm8731
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x728842e9	soc_codec_dev_wm8750
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0xcb94d213	wm8750_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0x59a5112a	soc_codec_dev_wm8753
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0xee6f8226	wm8753_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8776 0x27563101	soc_codec_dev_wm8776
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8776 0xb1369601	wm8776_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0x8c26ef86	wm8900_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0x949cf731	soc_codec_dev_wm8900
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0x0ab29d28	wm8903_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0xbfb1a4f2	soc_codec_dev_wm8903
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0x7869cb95	wm8940_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0x93955fed	soc_codec_dev_wm8940
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0x90118b83	soc_codec_dev_wm8960
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0xeff6dabc	wm8960_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8961 0x24aa0919	wm8961_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8961 0x890abac2	soc_codec_dev_wm8961
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0x82dd02ad	wm8971_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0x88c8d0f5	soc_codec_dev_wm8971
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8974 0xd210931e	wm8974_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8974 0xf5bf24b0	soc_codec_dev_wm8974
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0x52562c81	soc_codec_dev_wm8988
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0x539a238c	wm8988_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0x19beaa55	wm8990_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0x9b4dccbe	soc_codec_dev_wm8990
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8993 0x9f2ad8fb	wm8993_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8993 0xb0609f7d	soc_codec_dev_wm8993
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0x7ca17d2c	wm9081_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0xc3fcf1f2	soc_codec_dev_wm9081
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x02d80bb4	snd_soc_put_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0503469f	snd_soc_get_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x05638a6d	snd_soc_get_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x072cc375	snd_soc_dapm_disable_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x072f5fe9	snd_soc_dapm_get_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x09b0a42a	snd_soc_jack_new
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0a008d06	snd_soc_dai_set_clkdiv
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0d72f7bf	snd_soc_dapm_get_pin_status
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0fdceb8d	snd_soc_dai_set_tristate
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1396b481	snd_soc_unregister_dai
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1453d0f7	snd_soc_dai_set_sysclk
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1b5a65b7	snd_soc_get_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1c8fc445	snd_soc_dapm_stream_event
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1d8ba885	snd_soc_get_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2100cca7	snd_soc_info_volsw_ext
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x27b7a5e9	snd_soc_resume_device
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2877f897	snd_soc_unregister_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2c8bc214	snd_soc_new_pcms
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2cfac5c8	snd_soc_info_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3d9c4037	snd_soc_register_dais
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4391b0a9	snd_soc_dapm_sync
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x43f28dd1	snd_soc_put_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x46380632	snd_soc_dapm_enable_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x46bcc910	snd_soc_test_bits
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4c17ac2f	snd_soc_codec_volatile_register
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4d038ce4	snd_soc_new_ac97_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x50388677	snd_soc_dai_set_fmt
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x506514a9	snd_soc_dapm_put_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x523ca473	snd_soc_dapm_info_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x53f7f834	snd_soc_dapm_put_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x544c79ed	snd_soc_dapm_get_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5791f3c5	snd_soc_register_platform
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5eeeef98	snd_soc_dai_digital_mute
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x600ebeba	snd_soc_put_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x61f6e888	snd_soc_dapm_free
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6875bc36	snd_soc_jack_add_gpios
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6b00a35e	snd_soc_put_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6f199ae3	snd_soc_add_controls
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x802bf138	snd_soc_jack_free_gpios
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x830f5b56	snd_soc_cnew
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x85e92b7e	snd_soc_jack_add_pins
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8809a293	snd_soc_jack_report
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8a4ac5d6	snd_soc_dapm_new_controls
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8e6ba8de	snd_soc_dai_set_tdm_slot
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9065283a	snd_soc_codec_set_cache_io
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x936a4db6	snd_soc_update_bits
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x96f4abfd	dapm_reg_event
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x99806d3f	snd_soc_dapm_get_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa1b5343e	snd_soc_info_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xab548958	snd_soc_info_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xac97d9a2	snd_soc_dapm_new_control
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xae9a257a	snd_soc_dapm_get_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb05ff05b	snd_soc_info_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb178d6e2	snd_soc_free_ac97_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb9a93cb4	snd_soc_dapm_nc_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xba61dc0e	snd_soc_unregister_platform
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xbf814067	snd_soc_get_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xcb97dd5f	snd_soc_dapm_put_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd06c6ffc	snd_soc_unregister_dais
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd2cdf809	snd_soc_register_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd48dafa7	snd_soc_suspend_device
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd71aab90	snd_soc_set_runtime_hwparams
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xdac2d89a	snd_soc_register_dai
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xdc0e885a	snd_soc_dapm_new_widgets
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xe2054881	snd_soc_dai_set_pll
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xe729a801	snd_soc_put_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xe77ec091	snd_soc_init_card
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xe9c47719	snd_soc_info_enum_ext
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xee9767b7	snd_soc_dapm_add_routes
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xef0b66e4	snd_soc_dapm_put_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xfaf99ca7	snd_soc_free_pcms
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x2e0a0be5	xv_destroy_pool
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x51958fac	xv_malloc
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x7e80b9f6	xv_create_pool
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x9a79aa81	xv_free
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0xaf69699e	xv_get_object_size
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0xc1f55d16	xv_get_total_size_bytes
+EXPORT_SYMBOL_GPL vmlinux 0x002ff5a3	class_for_each_device
+EXPORT_SYMBOL_GPL vmlinux 0x003ed6a6	hpet_unregister_irq_handler
+EXPORT_SYMBOL_GPL vmlinux 0x0051f451	ata_host_detach
+EXPORT_SYMBOL_GPL vmlinux 0x00566d8f	inotify_get_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x0063f206	inotify_remove_watch_locked
+EXPORT_SYMBOL_GPL vmlinux 0x0067df75	ata_tf_from_fis
+EXPORT_SYMBOL_GPL vmlinux 0x0077d878	pci_hp_remove_module_link
+EXPORT_SYMBOL_GPL vmlinux 0x007c672c	acpi_smbus_register_callback
+EXPORT_SYMBOL_GPL vmlinux 0x00b63b84	rtc_update_irq_enable
+EXPORT_SYMBOL_GPL vmlinux 0x00d35551	ata_eh_qc_retry
+EXPORT_SYMBOL_GPL vmlinux 0x00ebcb5d	ata_id_string
+EXPORT_SYMBOL_GPL vmlinux 0x010b3618	cpufreq_driver_target
+EXPORT_SYMBOL_GPL vmlinux 0x0110b3d1	register_hotplug_dock_device
+EXPORT_SYMBOL_GPL vmlinux 0x016b9869	xfrm_calg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0x0183b462	put_inotify_watch
+EXPORT_SYMBOL_GPL vmlinux 0x01848a8e	local_apic_timer_c2_ok
+EXPORT_SYMBOL_GPL vmlinux 0x018c2320	get_cpu_sysdev
+EXPORT_SYMBOL_GPL vmlinux 0x018e8b48	ata_pci_device_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x01a4ea6d	unregister_die_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x01ba9815	crypto_ahash_final
+EXPORT_SYMBOL_GPL vmlinux 0x01cb4883	__set_irq_handler
+EXPORT_SYMBOL_GPL vmlinux 0x01de9872	simple_attr_open
+EXPORT_SYMBOL_GPL vmlinux 0x01e1a8de	kgdb_breakpoint
+EXPORT_SYMBOL_GPL vmlinux 0x01eea5ed	securityfs_remove
+EXPORT_SYMBOL_GPL vmlinux 0x025cac35	sata_sff_hardreset
+EXPORT_SYMBOL_GPL vmlinux 0x0284e5d3	disk_part_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0x02ccea56	lock_policy_rwsem_write
+EXPORT_SYMBOL_GPL vmlinux 0x02dd54ad	ata_port_disable
+EXPORT_SYMBOL_GPL vmlinux 0x032a90da	clockevent_delta2ns
+EXPORT_SYMBOL_GPL vmlinux 0x0343bdf1	__i2c_board_list
+EXPORT_SYMBOL_GPL vmlinux 0x035dd539	md_new_event
+EXPORT_SYMBOL_GPL vmlinux 0x03b93f5d	sysdev_class_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x03e3686c	ata_timing_cycle2mode
+EXPORT_SYMBOL_GPL vmlinux 0x03efb335	inet_csk_clone
+EXPORT_SYMBOL_GPL vmlinux 0x040013a0	debugfs_remove_recursive
+EXPORT_SYMBOL_GPL vmlinux 0x0402652c	skb_cow_data
+EXPORT_SYMBOL_GPL vmlinux 0x04069b1d	set_irq_nested_thread
+EXPORT_SYMBOL_GPL vmlinux 0x0422701e	get_task_mm
+EXPORT_SYMBOL_GPL vmlinux 0x04265c8f	ring_buffer_empty_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x042f8b0e	do_sync_mapping_range
+EXPORT_SYMBOL_GPL vmlinux 0x04486e88	rcu_batches_completed
+EXPORT_SYMBOL_GPL vmlinux 0x044e7e36	ata_dummy_port_info
+EXPORT_SYMBOL_GPL vmlinux 0x04a06fbb	__pm_runtime_put
+EXPORT_SYMBOL_GPL vmlinux 0x04a073b6	dm_device_name
+EXPORT_SYMBOL_GPL vmlinux 0x04b4a333	class_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x04b86de5	relay_close
+EXPORT_SYMBOL_GPL vmlinux 0x0519ea21	da903x_reads
+EXPORT_SYMBOL_GPL vmlinux 0x0531dcb8	ata_dev_classify
+EXPORT_SYMBOL_GPL vmlinux 0x054e550b	kernel_halt
+EXPORT_SYMBOL_GPL vmlinux 0x058773e8	ip6_sk_dst_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x0599130e	ring_buffer_entries_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x059ca8ab	scsi_dh_set_params
+EXPORT_SYMBOL_GPL vmlinux 0x05d5d52e	srcu_read_lock
+EXPORT_SYMBOL_GPL vmlinux 0x05d81a4f	led_trigger_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x060d1064	set_memory_ro
+EXPORT_SYMBOL_GPL vmlinux 0x060f4dcd	ata_std_qc_defer
+EXPORT_SYMBOL_GPL vmlinux 0x0619ca8a	getboottime
+EXPORT_SYMBOL_GPL vmlinux 0x0643d2cd	__sock_recv_timestamp
+EXPORT_SYMBOL_GPL vmlinux 0x064db9a5	mark_mounts_for_expiry
+EXPORT_SYMBOL_GPL vmlinux 0x065bccc6	input_class
+EXPORT_SYMBOL_GPL vmlinux 0x06734576	bus_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x0682e9f6	user_update
+EXPORT_SYMBOL_GPL vmlinux 0x069587be	uart_console_write
+EXPORT_SYMBOL_GPL vmlinux 0x06f2460f	ata_sas_port_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x06fd725a	invalidate_inode_pages2_range
+EXPORT_SYMBOL_GPL vmlinux 0x0732c868	inet6_destroy_sock
+EXPORT_SYMBOL_GPL vmlinux 0x0754193c	skb_icv_walk
+EXPORT_SYMBOL_GPL vmlinux 0x07b52e38	rtnl_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x07ce7344	trace_seq_vprintf
+EXPORT_SYMBOL_GPL vmlinux 0x0811e78c	find_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x087bc2aa	rt_mutex_trylock
+EXPORT_SYMBOL_GPL vmlinux 0x08a3e5d1	net_ipv6_ctl_path
+EXPORT_SYMBOL_GPL vmlinux 0x08c0d963	usb_altnum_to_altsetting
+EXPORT_SYMBOL_GPL vmlinux 0x08f74fb7	page_cache_async_readahead
+EXPORT_SYMBOL_GPL vmlinux 0x090f4793	inet_twsk_put
+EXPORT_SYMBOL_GPL vmlinux 0x091eb9b4	round_jiffies
+EXPORT_SYMBOL_GPL vmlinux 0x09bce8ac	ata_do_eh
+EXPORT_SYMBOL_GPL vmlinux 0x09be91ec	pci_find_ext_capability
+EXPORT_SYMBOL_GPL vmlinux 0x09c99ae6	vfs_lock_file
+EXPORT_SYMBOL_GPL vmlinux 0x09d0cd40	crypto_register_template
+EXPORT_SYMBOL_GPL vmlinux 0x09d52e33	ata_host_register
+EXPORT_SYMBOL_GPL vmlinux 0x09d60450	bus_for_each_drv
+EXPORT_SYMBOL_GPL vmlinux 0x0a6cb76f	cpuidle_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0x0ab328f6	inotify_init
+EXPORT_SYMBOL_GPL vmlinux 0x0afded2b	ring_buffer_iter_peek
+EXPORT_SYMBOL_GPL vmlinux 0x0b07abe2	unshare_fs_struct
+EXPORT_SYMBOL_GPL vmlinux 0x0b76b93a	tracepoint_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0x0b91b1f5	ata_bmdma_start
+EXPORT_SYMBOL_GPL vmlinux 0x0c0d548d	sdio_enable_func
+EXPORT_SYMBOL_GPL vmlinux 0x0c2cdbf1	synchronize_sched
+EXPORT_SYMBOL_GPL vmlinux 0x0c7f0932	ata_cable_80wire
+EXPORT_SYMBOL_GPL vmlinux 0x0c805f93	clflush_cache_range
+EXPORT_SYMBOL_GPL vmlinux 0x0cb88680	__tracepoint_block_rq_remap
+EXPORT_SYMBOL_GPL vmlinux 0x0d186d6b	hwmon_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x0d81a187	disk_part_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0x0dc8e0c8	regulator_get_mode
+EXPORT_SYMBOL_GPL vmlinux 0x0deb0ade	register_timer_hook
+EXPORT_SYMBOL_GPL vmlinux 0x0e109316	spi_get_device_id
+EXPORT_SYMBOL_GPL vmlinux 0x0e1bd935	ata_pio_need_iordy
+EXPORT_SYMBOL_GPL vmlinux 0x0e28ba0d	sis_info133_for_sata
+EXPORT_SYMBOL_GPL vmlinux 0x0e3fa26f	usb_ifnum_to_if
+EXPORT_SYMBOL_GPL vmlinux 0x0f2a6977	dm_requeue_unmapped_request
+EXPORT_SYMBOL_GPL vmlinux 0x0f389a04	tty_init_termios
+EXPORT_SYMBOL_GPL vmlinux 0x0f3e952b	init_srcu_struct
+EXPORT_SYMBOL_GPL vmlinux 0x0f73520f	klist_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0x0f824a3b	platform_get_resource
+EXPORT_SYMBOL_GPL vmlinux 0x0f8dd1c0	security_inode_setattr
+EXPORT_SYMBOL_GPL vmlinux 0x0f9550f5	regulator_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x0fbec68a	usb_alloc_urb
+EXPORT_SYMBOL_GPL vmlinux 0x0ff9a866	regulator_set_mode
+EXPORT_SYMBOL_GPL vmlinux 0x100c13c6	usb_kill_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0x100c48a2	unregister_dock_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x10138352	tracing_on
+EXPORT_SYMBOL_GPL vmlinux 0x101c923e	__tracepoint_power_start
+EXPORT_SYMBOL_GPL vmlinux 0x103e4d05	blkcipher_walk_virt
+EXPORT_SYMBOL_GPL vmlinux 0x10621889	hpet_rtc_interrupt
+EXPORT_SYMBOL_GPL vmlinux 0x106969b3	ip_build_and_send_pkt
+EXPORT_SYMBOL_GPL vmlinux 0x10c5f808	get_driver
+EXPORT_SYMBOL_GPL vmlinux 0x10d2f896	tcp_unregister_congestion_control
+EXPORT_SYMBOL_GPL vmlinux 0x10da02cd	sysdev_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x112bb43a	regulator_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x113c0b27	acpi_pci_find_root
+EXPORT_SYMBOL_GPL vmlinux 0x1142ced8	crypto_mod_put
+EXPORT_SYMBOL_GPL vmlinux 0x1143feb9	usb_get_dev
+EXPORT_SYMBOL_GPL vmlinux 0x1180262c	sync_filesystem
+EXPORT_SYMBOL_GPL vmlinux 0x118da2f1	bd_release_from_disk
+EXPORT_SYMBOL_GPL vmlinux 0x11a758dd	ata_cable_ignore
+EXPORT_SYMBOL_GPL vmlinux 0x11e902eb	blkcipher_walk_done
+EXPORT_SYMBOL_GPL vmlinux 0x11f447ce	__gpio_to_irq
+EXPORT_SYMBOL_GPL vmlinux 0x124f2056	crypto_get_attr_type
+EXPORT_SYMBOL_GPL vmlinux 0x1251d30f	call_rcu
+EXPORT_SYMBOL_GPL vmlinux 0x1268f357	resume_device_irqs
+EXPORT_SYMBOL_GPL vmlinux 0x1294d597	part_round_stats
+EXPORT_SYMBOL_GPL vmlinux 0x12ce02e2	__rt_mutex_init
+EXPORT_SYMBOL_GPL vmlinux 0x12f8f967	xfrm_audit_state_replay_overflow
+EXPORT_SYMBOL_GPL vmlinux 0x13354608	scatterwalk_map_and_copy
+EXPORT_SYMBOL_GPL vmlinux 0x13616f8e	usb_get_from_anchor
+EXPORT_SYMBOL_GPL vmlinux 0x13b2a946	register_keyboard_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x13c57b2f	netlink_has_listeners
+EXPORT_SYMBOL_GPL vmlinux 0x13dbd858	ata_sas_port_stop
+EXPORT_SYMBOL_GPL vmlinux 0x13e68211	skcipher_geniv_free
+EXPORT_SYMBOL_GPL vmlinux 0x149db923	selinux_string_to_sid
+EXPORT_SYMBOL_GPL vmlinux 0x1555faaa	usb_autopm_put_interface_async
+EXPORT_SYMBOL_GPL vmlinux 0x156257e3	apic
+EXPORT_SYMBOL_GPL vmlinux 0x156fb4b0	crypto_shash_digest
+EXPORT_SYMBOL_GPL vmlinux 0x15892417	async_synchronize_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x15935ef7	pm_runtime_enable
+EXPORT_SYMBOL_GPL vmlinux 0x15973325	inet6_lookup_listener
+EXPORT_SYMBOL_GPL vmlinux 0x1598dc9d	unregister_netevent_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x15a85a2c	d_materialise_unique
+EXPORT_SYMBOL_GPL vmlinux 0x15b0606e	e820_any_mapped
+EXPORT_SYMBOL_GPL vmlinux 0x15b2b99d	ata_sff_pause
+EXPORT_SYMBOL_GPL vmlinux 0x15bab2a4	i2c_new_dummy
+EXPORT_SYMBOL_GPL vmlinux 0x15ff4700	sdio_readb
+EXPORT_SYMBOL_GPL vmlinux 0x16836e04	speedstep_detect_processor
+EXPORT_SYMBOL_GPL vmlinux 0x1697136d	hrtimer_init
+EXPORT_SYMBOL_GPL vmlinux 0x16975410	raw_unhash_sk
+EXPORT_SYMBOL_GPL vmlinux 0x16c508be	platform_device_add_resources
+EXPORT_SYMBOL_GPL vmlinux 0x16c57b0c	unregister_jprobes
+EXPORT_SYMBOL_GPL vmlinux 0x16d45037	dm_rh_recovery_end
+EXPORT_SYMBOL_GPL vmlinux 0x16ecc1d4	sk_clone
+EXPORT_SYMBOL_GPL vmlinux 0x16ede402	crypto_lookup_template
+EXPORT_SYMBOL_GPL vmlinux 0x16f76869	probe_kernel_read
+EXPORT_SYMBOL_GPL vmlinux 0x1709b2a7	rt_mutex_lock
+EXPORT_SYMBOL_GPL vmlinux 0x171b577b	unregister_kprobes
+EXPORT_SYMBOL_GPL vmlinux 0x172e72d4	vdso_enabled
+EXPORT_SYMBOL_GPL vmlinux 0x178160ca	regulator_get_exclusive
+EXPORT_SYMBOL_GPL vmlinux 0x17bdbe1f	remove_irq
+EXPORT_SYMBOL_GPL vmlinux 0x1814685f	ata_pci_device_do_resume
+EXPORT_SYMBOL_GPL vmlinux 0x182b4539	cpufreq_unregister_governor
+EXPORT_SYMBOL_GPL vmlinux 0x18415c69	crypto_shash_setkey
+EXPORT_SYMBOL_GPL vmlinux 0x18564dfd	blk_lld_busy
+EXPORT_SYMBOL_GPL vmlinux 0x1878f62b	edac_err_assert
+EXPORT_SYMBOL_GPL vmlinux 0x187f9408	fl6_sock_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x1884bc07	ata_sff_drain_fifo
+EXPORT_SYMBOL_GPL vmlinux 0x188c2ec0	use_module
+EXPORT_SYMBOL_GPL vmlinux 0x18d53420	kgdb_register_io_module
+EXPORT_SYMBOL_GPL vmlinux 0x18e6a40b	task_current_syscall
+EXPORT_SYMBOL_GPL vmlinux 0x19247935	fuse_sync_release
+EXPORT_SYMBOL_GPL vmlinux 0x197dbe54	gpiochip_add
+EXPORT_SYMBOL_GPL vmlinux 0x198d2d5a	ata_bmdma_mode_filter
+EXPORT_SYMBOL_GPL vmlinux 0x19918575	dequeue_signal
+EXPORT_SYMBOL_GPL vmlinux 0x19a304ba	usb_disabled
+EXPORT_SYMBOL_GPL vmlinux 0x19b70ac1	perf_tp_event
+EXPORT_SYMBOL_GPL vmlinux 0x19eb034b	rtc_read_alarm
+EXPORT_SYMBOL_GPL vmlinux 0x19f757b6	relay_file_operations
+EXPORT_SYMBOL_GPL vmlinux 0x19f9be3d	regulator_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x1a323362	__ftrace_vbprintk
+EXPORT_SYMBOL_GPL vmlinux 0x1a474901	tracepoint_probe_unregister_noupdate
+EXPORT_SYMBOL_GPL vmlinux 0x1a764a81	aead_geniv_free
+EXPORT_SYMBOL_GPL vmlinux 0x1a938737	atomic_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x1a9b538e	ehci_cf_port_reset_rwsem
+EXPORT_SYMBOL_GPL vmlinux 0x1a9c2be2	register_pernet_device
+EXPORT_SYMBOL_GPL vmlinux 0x1acda5b2	atomic_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x1b3f907c	usb_reset_device
+EXPORT_SYMBOL_GPL vmlinux 0x1b4c336c	tty_encode_baud_rate
+EXPORT_SYMBOL_GPL vmlinux 0x1b9aca3f	jprobe_return
+EXPORT_SYMBOL_GPL vmlinux 0x1bd5e7de	uart_set_options
+EXPORT_SYMBOL_GPL vmlinux 0x1c00d8ab	sysfs_remove_link
+EXPORT_SYMBOL_GPL vmlinux 0x1c31cf2e	crypto_drop_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x1c38689a	usb_put_dev
+EXPORT_SYMBOL_GPL vmlinux 0x1c400b17	ata_acpi_stm
+EXPORT_SYMBOL_GPL vmlinux 0x1c7b6c2a	eventfd_ctx_fdget
+EXPORT_SYMBOL_GPL vmlinux 0x1c852e7c	xfrm_calg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x1c87a811	__round_jiffies_up
+EXPORT_SYMBOL_GPL vmlinux 0x1d4bad6c	k_handler
+EXPORT_SYMBOL_GPL vmlinux 0x1d8f8059	__tracepoint_power_end
+EXPORT_SYMBOL_GPL vmlinux 0x1db21d74	__tracepoint_kfree_skb
+EXPORT_SYMBOL_GPL vmlinux 0x1de40db5	debugfs_create_u16
+EXPORT_SYMBOL_GPL vmlinux 0x1dee2629	trace_current_buffer_lock_reserve
+EXPORT_SYMBOL_GPL vmlinux 0x1e5a797b	regulator_bulk_enable
+EXPORT_SYMBOL_GPL vmlinux 0x1e682e94	pci_enable_sriov
+EXPORT_SYMBOL_GPL vmlinux 0x1e7bbcb3	kernel_restart
+EXPORT_SYMBOL_GPL vmlinux 0x1e9a7024	ata_host_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x1eb8e160	isa_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0x1eb9516e	round_jiffies_relative
+EXPORT_SYMBOL_GPL vmlinux 0x1ebf6c2a	pci_power_names
+EXPORT_SYMBOL_GPL vmlinux 0x1f1c7afc	dm_set_device_limits
+EXPORT_SYMBOL_GPL vmlinux 0x1f3d1b77	crypto_alg_sem
+EXPORT_SYMBOL_GPL vmlinux 0x1f8d4da9	sched_setscheduler
+EXPORT_SYMBOL_GPL vmlinux 0x1f8ec1b3	acpi_get_pci_rootbridge_handle
+EXPORT_SYMBOL_GPL vmlinux 0x1fa2f0c2	sysdev_store_int
+EXPORT_SYMBOL_GPL vmlinux 0x1fcece42	inet_twdr_twcal_tick
+EXPORT_SYMBOL_GPL vmlinux 0x1fd62967	inet6_csk_bind_conflict
+EXPORT_SYMBOL_GPL vmlinux 0x200517ab	user_match
+EXPORT_SYMBOL_GPL vmlinux 0x205dcd7a	klist_add_tail
+EXPORT_SYMBOL_GPL vmlinux 0x20a8ac66	usb_buffer_unmap_sg
+EXPORT_SYMBOL_GPL vmlinux 0x20bc3470	orderly_poweroff
+EXPORT_SYMBOL_GPL vmlinux 0x20e01bc9	__class_create
+EXPORT_SYMBOL_GPL vmlinux 0x20e449ce	rtc_update_irq
+EXPORT_SYMBOL_GPL vmlinux 0x212ab85b	register_pernet_gen_subsys
+EXPORT_SYMBOL_GPL vmlinux 0x215db6e9	tracepoint_probe_register_noupdate
+EXPORT_SYMBOL_GPL vmlinux 0x216c72cc	crypto_alloc_base
+EXPORT_SYMBOL_GPL vmlinux 0x222ec69f	usb_match_id
+EXPORT_SYMBOL_GPL vmlinux 0x226a3bc7	ring_buffer_discard_commit
+EXPORT_SYMBOL_GPL vmlinux 0x22811131	sdio_writesb
+EXPORT_SYMBOL_GPL vmlinux 0x2296c00d	crypto_attr_u32
+EXPORT_SYMBOL_GPL vmlinux 0x22b4b20f	ata_do_dev_read_id
+EXPORT_SYMBOL_GPL vmlinux 0x22d83155	generic_fh_to_parent
+EXPORT_SYMBOL_GPL vmlinux 0x22df4857	get_user_pages_fast
+EXPORT_SYMBOL_GPL vmlinux 0x22ff0c83	pci_msi_off
+EXPORT_SYMBOL_GPL vmlinux 0x23253735	power_supply_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x23679939	__iowrite32_copy
+EXPORT_SYMBOL_GPL vmlinux 0x23864ce7	cpuset_mem_spread_node
+EXPORT_SYMBOL_GPL vmlinux 0x23869dc7	cancel_work_sync
+EXPORT_SYMBOL_GPL vmlinux 0x23f9b4a8	inet_csk_addr2sockaddr
+EXPORT_SYMBOL_GPL vmlinux 0x2405ef3f	spi_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0x240b739a	iomap_create_wc
+EXPORT_SYMBOL_GPL vmlinux 0x24114502	__mmdrop
+EXPORT_SYMBOL_GPL vmlinux 0x242c6cbb	aead_geniv_exit
+EXPORT_SYMBOL_GPL vmlinux 0x2447533c	ktime_get_real
+EXPORT_SYMBOL_GPL vmlinux 0x246f4153	pv_time_ops
+EXPORT_SYMBOL_GPL vmlinux 0x24eb7e32	leds_list
+EXPORT_SYMBOL_GPL vmlinux 0x2530f046	inotify_rm_watch
+EXPORT_SYMBOL_GPL vmlinux 0x258b24f7	ring_buffer_alloc_read_page
+EXPORT_SYMBOL_GPL vmlinux 0x260bee28	crypto_unregister_alg
+EXPORT_SYMBOL_GPL vmlinux 0x262b2ab4	ata_port_pbar_desc
+EXPORT_SYMBOL_GPL vmlinux 0x267cd1c0	platform_bus
+EXPORT_SYMBOL_GPL vmlinux 0x268a1d69	map_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0x269cb7d0	xfrm_audit_state_icvfail
+EXPORT_SYMBOL_GPL vmlinux 0x26a49cea	crypto_larval_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x26c41936	posix_timer_event
+EXPORT_SYMBOL_GPL vmlinux 0x26c90ea4	scsi_eh_get_sense
+EXPORT_SYMBOL_GPL vmlinux 0x26de1716	pci_configure_slot
+EXPORT_SYMBOL_GPL vmlinux 0x2714a01f	device_find_child
+EXPORT_SYMBOL_GPL vmlinux 0x271fdab8	tcp_twsk_destructor
+EXPORT_SYMBOL_GPL vmlinux 0x274e9e24	usb_deregister_dev
+EXPORT_SYMBOL_GPL vmlinux 0x27549f23	usb_autopm_put_interface
+EXPORT_SYMBOL_GPL vmlinux 0x27680209	ata_std_bios_param
+EXPORT_SYMBOL_GPL vmlinux 0x2787db00	vbin_printf
+EXPORT_SYMBOL_GPL vmlinux 0x27a9c879	crypto_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0x27adf232	tracing_generic_entry_update
+EXPORT_SYMBOL_GPL vmlinux 0x27bbf533	ata_dev_disable
+EXPORT_SYMBOL_GPL vmlinux 0x27e9f4a4	scsi_dh_activate
+EXPORT_SYMBOL_GPL vmlinux 0x27f1ad96	fsnotify
+EXPORT_SYMBOL_GPL vmlinux 0x27fd1646	xfrm_audit_policy_delete
+EXPORT_SYMBOL_GPL vmlinux 0x288f0f9d	skb_segment
+EXPORT_SYMBOL_GPL vmlinux 0x28d664ff	__raw_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x28e23139	xfrm_probe_algs
+EXPORT_SYMBOL_GPL vmlinux 0x291f6500	da903x_write
+EXPORT_SYMBOL_GPL vmlinux 0x29238150	usb_store_new_id
+EXPORT_SYMBOL_GPL vmlinux 0x292cd2db	preempt_notifier_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x29501527	klist_iter_init_node
+EXPORT_SYMBOL_GPL vmlinux 0x29571769	sdio_release_host
+EXPORT_SYMBOL_GPL vmlinux 0x29696da5	default_backing_dev_info
+EXPORT_SYMBOL_GPL vmlinux 0x2980c410	power_supply_am_i_supplied
+EXPORT_SYMBOL_GPL vmlinux 0x29c7cf32	crypto_dequeue_request
+EXPORT_SYMBOL_GPL vmlinux 0x2a678a13	__suspend_report_result
+EXPORT_SYMBOL_GPL vmlinux 0x2a784f56	ring_buffer_read_page
+EXPORT_SYMBOL_GPL vmlinux 0x2aa35a0a	crypto_aead_setauthsize
+EXPORT_SYMBOL_GPL vmlinux 0x2ab9dc35	__mmu_notifier_register
+EXPORT_SYMBOL_GPL vmlinux 0x2ac72f63	crypto_grab_skcipher
+EXPORT_SYMBOL_GPL vmlinux 0x2af3bd89	flush_workqueue
+EXPORT_SYMBOL_GPL vmlinux 0x2af90271	speedstep_get_frequency
+EXPORT_SYMBOL_GPL vmlinux 0x2afa2563	__mnt_is_readonly
+EXPORT_SYMBOL_GPL vmlinux 0x2b12288d	dm_underlying_device_busy
+EXPORT_SYMBOL_GPL vmlinux 0x2b1dda74	inet_csk_reqsk_queue_hash_add
+EXPORT_SYMBOL_GPL vmlinux 0x2b7bdf02	put_pid
+EXPORT_SYMBOL_GPL vmlinux 0x2b9f8e23	nf_net_ipv4_netfilter_sysctl_path
+EXPORT_SYMBOL_GPL vmlinux 0x2be46ff2	input_ff_erase
+EXPORT_SYMBOL_GPL vmlinux 0x2be7fb8e	disable_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0x2bf38d7d	inet_csk_get_port
+EXPORT_SYMBOL_GPL vmlinux 0x2bfc4d7f	tracepoint_get_iter_range
+EXPORT_SYMBOL_GPL vmlinux 0x2c08f62d	destroy_workqueue
+EXPORT_SYMBOL_GPL vmlinux 0x2c1c0f64	dev_attr_link_power_management_policy
+EXPORT_SYMBOL_GPL vmlinux 0x2c208607	power_supply_is_system_supplied
+EXPORT_SYMBOL_GPL vmlinux 0x2ce98559	kcrypto_wq
+EXPORT_SYMBOL_GPL vmlinux 0x2cfe339e	ata_std_postreset
+EXPORT_SYMBOL_GPL vmlinux 0x2d1e305b	usb_kill_urb
+EXPORT_SYMBOL_GPL vmlinux 0x2d53afee	anon_transport_class_register
+EXPORT_SYMBOL_GPL vmlinux 0x2d9f2ce3	sched_clock_idle_wakeup_event
+EXPORT_SYMBOL_GPL vmlinux 0x2da1e760	disk_get_part
+EXPORT_SYMBOL_GPL vmlinux 0x2da6f698	mmput
+EXPORT_SYMBOL_GPL vmlinux 0x2dd11777	devres_remove_group
+EXPORT_SYMBOL_GPL vmlinux 0x2dd8444c	trace_seq_printf
+EXPORT_SYMBOL_GPL vmlinux 0x2ddb54c4	ata_eh_freeze_port
+EXPORT_SYMBOL_GPL vmlinux 0x2def23d8	mnt_drop_write
+EXPORT_SYMBOL_GPL vmlinux 0x2e099383	__pci_hp_register
+EXPORT_SYMBOL_GPL vmlinux 0x2e47f677	xfrm_aalg_get_byidx
+EXPORT_SYMBOL_GPL vmlinux 0x2e56c62a	relay_open
+EXPORT_SYMBOL_GPL vmlinux 0x2e6a20ef	dm_rh_delay
+EXPORT_SYMBOL_GPL vmlinux 0x2eb91dfe	scatterwalk_map
+EXPORT_SYMBOL_GPL vmlinux 0x2f194232	ipv6_dup_options
+EXPORT_SYMBOL_GPL vmlinux 0x2f3ba74e	ring_buffer_read_start
+EXPORT_SYMBOL_GPL vmlinux 0x2f47d8c7	cpufreq_frequency_get_table
+EXPORT_SYMBOL_GPL vmlinux 0x2f857551	machine_check_poll
+EXPORT_SYMBOL_GPL vmlinux 0x2fca1825	ring_buffer_write
+EXPORT_SYMBOL_GPL vmlinux 0x2fcd9e17	dpm_resume_noirq
+EXPORT_SYMBOL_GPL vmlinux 0x2fd9e874	usb_free_urb
+EXPORT_SYMBOL_GPL vmlinux 0x2fdf7ba0	rtc_irq_set_freq
+EXPORT_SYMBOL_GPL vmlinux 0x3020e829	ata_link_online
+EXPORT_SYMBOL_GPL vmlinux 0x3032b4cf	platform_device_put
+EXPORT_SYMBOL_GPL vmlinux 0x30808f3f	rtc_class_open
+EXPORT_SYMBOL_GPL vmlinux 0x30a4f4ca	bstr_printf
+EXPORT_SYMBOL_GPL vmlinux 0x30d0de89	nf_unregister_afinfo
+EXPORT_SYMBOL_GPL vmlinux 0x3138d4e6	sk_setup_caps
+EXPORT_SYMBOL_GPL vmlinux 0x318920b1	register_dock_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x3189d4df	driver_register
+EXPORT_SYMBOL_GPL vmlinux 0x31c54454	spi_unregister_master
+EXPORT_SYMBOL_GPL vmlinux 0x31cb159d	crypto_register_shash
+EXPORT_SYMBOL_GPL vmlinux 0x31d45547	ring_buffer_empty
+EXPORT_SYMBOL_GPL vmlinux 0x32394b2b	crypto_alg_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x327d8b8f	unregister_pernet_device
+EXPORT_SYMBOL_GPL vmlinux 0x328817fd	ata_ehi_push_desc
+EXPORT_SYMBOL_GPL vmlinux 0x32d5e7fc	xfrm_aalg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x32f17454	ring_buffer_event_data
+EXPORT_SYMBOL_GPL vmlinux 0x3303e68d	crypto_alloc_ahash
+EXPORT_SYMBOL_GPL vmlinux 0x333da16b	pci_find_next_capability
+EXPORT_SYMBOL_GPL vmlinux 0x3359b4c9	dm_region_hash_create
+EXPORT_SYMBOL_GPL vmlinux 0x336baaf9	pci_get_hp_params
+EXPORT_SYMBOL_GPL vmlinux 0x33af2eea	cpuidle_enable_device
+EXPORT_SYMBOL_GPL vmlinux 0x33b19e1d	skcipher_geniv_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x33b37d7d	rtc_irq_register
+EXPORT_SYMBOL_GPL vmlinux 0x33b65428	ring_buffer_resize
+EXPORT_SYMBOL_GPL vmlinux 0x33cb1562	get_dcookie
+EXPORT_SYMBOL_GPL vmlinux 0x33d8f6f4	pm_runtime_idle
+EXPORT_SYMBOL_GPL vmlinux 0x34275124	trace_current_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0x3441c3d6	gpio_set_value_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x34736057	debugfs_remove
+EXPORT_SYMBOL_GPL vmlinux 0x34816b1a	dm_path_uevent
+EXPORT_SYMBOL_GPL vmlinux 0x34a3a67d	init_user_ns
+EXPORT_SYMBOL_GPL vmlinux 0x34b16f8f	crypto_alloc_shash
+EXPORT_SYMBOL_GPL vmlinux 0x34c70e65	tty_mode_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x34dddfd1	ring_buffer_overruns
+EXPORT_SYMBOL_GPL vmlinux 0x359df85f	usb_hub_clear_tt_buffer
+EXPORT_SYMBOL_GPL vmlinux 0x35be5708	transport_class_register
+EXPORT_SYMBOL_GPL vmlinux 0x35cbf7c3	pci_enable_pcie_error_reporting
+EXPORT_SYMBOL_GPL vmlinux 0x35d6fd78	ata_wait_after_reset
+EXPORT_SYMBOL_GPL vmlinux 0x35d8c94a	sdev_evt_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x35dad98b	ring_buffer_record_disable_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x35fd0312	per_cpu__injectm
+EXPORT_SYMBOL_GPL vmlinux 0x3610669f	ata_acpi_gtm
+EXPORT_SYMBOL_GPL vmlinux 0x361b8930	firmware_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x361e2bcc	save_stack_trace
+EXPORT_SYMBOL_GPL vmlinux 0x362e23ec	call_rcu_bh
+EXPORT_SYMBOL_GPL vmlinux 0x3647133b	br_fdb_test_addr_hook
+EXPORT_SYMBOL_GPL vmlinux 0x365615b1	ata_ehi_clear_desc
+EXPORT_SYMBOL_GPL vmlinux 0x366a9e15	usb_lock_device_for_reset
+EXPORT_SYMBOL_GPL vmlinux 0x366ad6b3	sdio_claim_irq
+EXPORT_SYMBOL_GPL vmlinux 0x36730ed2	trace_define_common_fields
+EXPORT_SYMBOL_GPL vmlinux 0x3682790e	ata_sas_slave_configure
+EXPORT_SYMBOL_GPL vmlinux 0x3714af78	put_device
+EXPORT_SYMBOL_GPL vmlinux 0x372c9ba3	devres_get
+EXPORT_SYMBOL_GPL vmlinux 0x374a690c	device_create
+EXPORT_SYMBOL_GPL vmlinux 0x377a3f10	ata_sff_port_start
+EXPORT_SYMBOL_GPL vmlinux 0x37ad4176	__tracepoint_block_bio_complete
+EXPORT_SYMBOL_GPL vmlinux 0x37d46b32	ata_host_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x37dc0546	platform_device_add_data
+EXPORT_SYMBOL_GPL vmlinux 0x3825dd76	usb_hcd_platform_shutdown
+EXPORT_SYMBOL_GPL vmlinux 0x3841ab01	unregister_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0x384a147c	ata_sff_wait_ready
+EXPORT_SYMBOL_GPL vmlinux 0x38840b4e	__dma_request_channel
+EXPORT_SYMBOL_GPL vmlinux 0x38a9b544	sdio_f0_readb
+EXPORT_SYMBOL_GPL vmlinux 0x38a9c2c7	input_ff_effect_from_user
+EXPORT_SYMBOL_GPL vmlinux 0x38b741d5	dm_put
+EXPORT_SYMBOL_GPL vmlinux 0x38ea936e	__memory_failure
+EXPORT_SYMBOL_GPL vmlinux 0x39287f45	pcie_port_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x3968d9f0	device_del
+EXPORT_SYMBOL_GPL vmlinux 0x39956faa	tcp_slow_start
+EXPORT_SYMBOL_GPL vmlinux 0x39b14247	pci_disable_sriov
+EXPORT_SYMBOL_GPL vmlinux 0x39bf8ea9	raw_hash_sk
+EXPORT_SYMBOL_GPL vmlinux 0x39dbbadc	user_instantiate
+EXPORT_SYMBOL_GPL vmlinux 0x39f1e9e0	dev_attr_unload_heads
+EXPORT_SYMBOL_GPL vmlinux 0x39f7d4b5	ip6_dst_blackhole
+EXPORT_SYMBOL_GPL vmlinux 0x3a48aa06	rt_mutex_lock_interruptible
+EXPORT_SYMBOL_GPL vmlinux 0x3a59692b	regulator_is_enabled
+EXPORT_SYMBOL_GPL vmlinux 0x3a87c838	tcp_reno_ssthresh
+EXPORT_SYMBOL_GPL vmlinux 0x3ac2ef70	devres_close_group
+EXPORT_SYMBOL_GPL vmlinux 0x3b1bd2c5	crypto_ahash_digest
+EXPORT_SYMBOL_GPL vmlinux 0x3b41dc60	inet6_sk_rebuild_header
+EXPORT_SYMBOL_GPL vmlinux 0x3b51ac89	ata_std_prereset
+EXPORT_SYMBOL_GPL vmlinux 0x3bd04670	class_find_device
+EXPORT_SYMBOL_GPL vmlinux 0x3bd77776	setup_irq
+EXPORT_SYMBOL_GPL vmlinux 0x3be7af02	get_max_files
+EXPORT_SYMBOL_GPL vmlinux 0x3be89d3c	usb_register_notify
+EXPORT_SYMBOL_GPL vmlinux 0x3bf72a1d	pci_disable_pcie_error_reporting
+EXPORT_SYMBOL_GPL vmlinux 0x3bff9a96	find_vpid
+EXPORT_SYMBOL_GPL vmlinux 0x3c1fab5d	crypto_register_alg
+EXPORT_SYMBOL_GPL vmlinux 0x3c2044f6	led_trigger_store
+EXPORT_SYMBOL_GPL vmlinux 0x3c6c45ca	__tracepoint_power_frequency
+EXPORT_SYMBOL_GPL vmlinux 0x3c942368	profile_event_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x3cb3218f	usb_ep0_reinit
+EXPORT_SYMBOL_GPL vmlinux 0x3cd06035	add_input_randomness
+EXPORT_SYMBOL_GPL vmlinux 0x3cfdfae5	trace_current_buffer_discard_commit
+EXPORT_SYMBOL_GPL vmlinux 0x3cfedb3f	register_pm_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x3d0a2b29	rtnl_kill_links
+EXPORT_SYMBOL_GPL vmlinux 0x3d388324	dpm_resume_end
+EXPORT_SYMBOL_GPL vmlinux 0x3d6f8695	pci_destroy_slot
+EXPORT_SYMBOL_GPL vmlinux 0x3d83268f	cpuidle_register_device
+EXPORT_SYMBOL_GPL vmlinux 0x3dc56054	usb_hcd_check_unlink_urb
+EXPORT_SYMBOL_GPL vmlinux 0x3dd4d3a7	bprintf
+EXPORT_SYMBOL_GPL vmlinux 0x3dd5d829	add_timer_on
+EXPORT_SYMBOL_GPL vmlinux 0x3dde0e07	amd_get_nb_id
+EXPORT_SYMBOL_GPL vmlinux 0x3e2004e9	platform_device_add
+EXPORT_SYMBOL_GPL vmlinux 0x3e757637	cpu_bit_bitmap
+EXPORT_SYMBOL_GPL vmlinux 0x3ecf6cfc	wmi_install_notify_handler
+EXPORT_SYMBOL_GPL vmlinux 0x3ed40269	xfrm_audit_policy_add
+EXPORT_SYMBOL_GPL vmlinux 0x3eead410	regulator_count_voltages
+EXPORT_SYMBOL_GPL vmlinux 0x3efb35c9	get_online_cpus
+EXPORT_SYMBOL_GPL vmlinux 0x3f01570a	probe_kernel_write
+EXPORT_SYMBOL_GPL vmlinux 0x3f0e7a1c	crypto_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x3f0f9400	scsi_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x3f238101	dcookie_register
+EXPORT_SYMBOL_GPL vmlinux 0x3f289e62	usb_sg_cancel
+EXPORT_SYMBOL_GPL vmlinux 0x3f5a1050	sysdev_driver_register
+EXPORT_SYMBOL_GPL vmlinux 0x3f5df093	crypto_ablkcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0x3fa1b3a4	cpci_hp_register_bus
+EXPORT_SYMBOL_GPL vmlinux 0x402272ea	fs_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x4053599b	ata_sff_irq_clear
+EXPORT_SYMBOL_GPL vmlinux 0x4054d62e	ata_do_set_mode
+EXPORT_SYMBOL_GPL vmlinux 0x40af0dec	ata_xfer_mode2mask
+EXPORT_SYMBOL_GPL vmlinux 0x40be2c41	blocking_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x40eb52a1	ring_buffer_lock_reserve
+EXPORT_SYMBOL_GPL vmlinux 0x410bebcb	sysfs_get_dirent
+EXPORT_SYMBOL_GPL vmlinux 0x413993ee	__ata_ehi_push_desc
+EXPORT_SYMBOL_GPL vmlinux 0x413c9b2a	spi_alloc_device
+EXPORT_SYMBOL_GPL vmlinux 0x416f0c3c	usb_string
+EXPORT_SYMBOL_GPL vmlinux 0x41960b52	ata_bmdma_status
+EXPORT_SYMBOL_GPL vmlinux 0x41c841f5	inet6_csk_search_req
+EXPORT_SYMBOL_GPL vmlinux 0x41f308e4	eventfd_ctx_fileget
+EXPORT_SYMBOL_GPL vmlinux 0x420f9f9e	sysfs_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x42494cea	ring_buffer_event_length
+EXPORT_SYMBOL_GPL vmlinux 0x426cf886	crypto_init_shash_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x426f13b9	e820_all_mapped
+EXPORT_SYMBOL_GPL vmlinux 0x42881d61	fuse_conn_put
+EXPORT_SYMBOL_GPL vmlinux 0x42b36097	crypto_unregister_shash
+EXPORT_SYMBOL_GPL vmlinux 0x42b364ef	scatterwalk_done
+EXPORT_SYMBOL_GPL vmlinux 0x42eea094	ring_buffer_time_stamp
+EXPORT_SYMBOL_GPL vmlinux 0x42ffd65b	ata_pci_device_resume
+EXPORT_SYMBOL_GPL vmlinux 0x432fd7f6	__gpio_set_value
+EXPORT_SYMBOL_GPL vmlinux 0x435c24a4	spi_write_then_read
+EXPORT_SYMBOL_GPL vmlinux 0x4394e9f2	sdio_memcpy_fromio
+EXPORT_SYMBOL_GPL vmlinux 0x43e43fc3	ata_qc_complete_multiple
+EXPORT_SYMBOL_GPL vmlinux 0x43f56e82	ata_xfer_mode2shift
+EXPORT_SYMBOL_GPL vmlinux 0x447b2c51	pci_slots_kset
+EXPORT_SYMBOL_GPL vmlinux 0x4484a5a4	wait_for_device_probe
+EXPORT_SYMBOL_GPL vmlinux 0x44990b98	ata_scsi_queuecmd
+EXPORT_SYMBOL_GPL vmlinux 0x44a65d5c	lock_policy_rwsem_read
+EXPORT_SYMBOL_GPL vmlinux 0x44dea593	register_kretprobes
+EXPORT_SYMBOL_GPL vmlinux 0x450fdd70	__blk_end_request_err
+EXPORT_SYMBOL_GPL vmlinux 0x4541fe0d	mtrr_state
+EXPORT_SYMBOL_GPL vmlinux 0x454d5c01	blocking_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x4559363e	debugfs_rename
+EXPORT_SYMBOL_GPL vmlinux 0x457594fa	crypto_alg_list
+EXPORT_SYMBOL_GPL vmlinux 0x45b53db5	file_ra_state_init
+EXPORT_SYMBOL_GPL vmlinux 0x45bf1ff3	crypto_inc
+EXPORT_SYMBOL_GPL vmlinux 0x460f31aa	rodata_test_data
+EXPORT_SYMBOL_GPL vmlinux 0x4611b516	__inet_lookup_established
+EXPORT_SYMBOL_GPL vmlinux 0x46265da3	ata_sff_irq_on
+EXPORT_SYMBOL_GPL vmlinux 0x4628932e	ip_local_out
+EXPORT_SYMBOL_GPL vmlinux 0x4648a74f	driver_find
+EXPORT_SYMBOL_GPL vmlinux 0x4672e88b	__crypto_dequeue_request
+EXPORT_SYMBOL_GPL vmlinux 0x4687a988	fib_rules_register
+EXPORT_SYMBOL_GPL vmlinux 0x469ef723	queue_delayed_work
+EXPORT_SYMBOL_GPL vmlinux 0x46fb5761	debugfs_create_u8
+EXPORT_SYMBOL_GPL vmlinux 0x47229b5c	gpio_request
+EXPORT_SYMBOL_GPL vmlinux 0x47392d6d	usb_hcd_unlink_urb_from_ep
+EXPORT_SYMBOL_GPL vmlinux 0x473b58f8	mnt_want_write
+EXPORT_SYMBOL_GPL vmlinux 0x474da31c	ata_sff_qc_fill_rtf
+EXPORT_SYMBOL_GPL vmlinux 0x4779c5bf	add_to_page_cache_lru
+EXPORT_SYMBOL_GPL vmlinux 0x47aadb15	register_kretprobe
+EXPORT_SYMBOL_GPL vmlinux 0x47c0dc4b	relay_reset
+EXPORT_SYMBOL_GPL vmlinux 0x47d42588	scsi_dh_attach
+EXPORT_SYMBOL_GPL vmlinux 0x47fca00a	relay_switch_subbuf
+EXPORT_SYMBOL_GPL vmlinux 0x485ed43f	scsi_get_vpd_page
+EXPORT_SYMBOL_GPL vmlinux 0x48a89cc4	sdio_readl
+EXPORT_SYMBOL_GPL vmlinux 0x492c2bcc	fb_deferred_io_open
+EXPORT_SYMBOL_GPL vmlinux 0x4937d139	tcp_reno_cong_avoid
+EXPORT_SYMBOL_GPL vmlinux 0x496f8448	sdio_writeb
+EXPORT_SYMBOL_GPL vmlinux 0x499043d3	crypto_init_queue
+EXPORT_SYMBOL_GPL vmlinux 0x49db8db4	register_jprobes
+EXPORT_SYMBOL_GPL vmlinux 0x4a748770	cpci_hp_unregister_bus
+EXPORT_SYMBOL_GPL vmlinux 0x4a825119	br_handle_frame_hook
+EXPORT_SYMBOL_GPL vmlinux 0x4a85a41c	ring_buffer_size
+EXPORT_SYMBOL_GPL vmlinux 0x4ae75ec5	mmu_notifier_register
+EXPORT_SYMBOL_GPL vmlinux 0x4b49924a	unregister_pernet_subsys
+EXPORT_SYMBOL_GPL vmlinux 0x4b5701e9	ata_sff_qc_prep
+EXPORT_SYMBOL_GPL vmlinux 0x4b757722	inet_hash_connect
+EXPORT_SYMBOL_GPL vmlinux 0x4bf6f130	md_do_sync
+EXPORT_SYMBOL_GPL vmlinux 0x4c0b0d98	raw_seq_start
+EXPORT_SYMBOL_GPL vmlinux 0x4c1f27c1	__rtnl_register
+EXPORT_SYMBOL_GPL vmlinux 0x4c22ec0f	tty_ldisc_deref
+EXPORT_SYMBOL_GPL vmlinux 0x4c2f30d4	power_supply_class
+EXPORT_SYMBOL_GPL vmlinux 0x4c302b5c	skb_pull_rcsum
+EXPORT_SYMBOL_GPL vmlinux 0x4c3be985	__ring_buffer_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x4c3ff1ed	get_net_ns_by_pid
+EXPORT_SYMBOL_GPL vmlinux 0x4c547c4e	crypto_find_alg
+EXPORT_SYMBOL_GPL vmlinux 0x4c759827	byte_rev_table
+EXPORT_SYMBOL_GPL vmlinux 0x4c84ad87	kern_mount_data
+EXPORT_SYMBOL_GPL vmlinux 0x4cac3cae	sata_scr_read
+EXPORT_SYMBOL_GPL vmlinux 0x4ce515bf	debugfs_create_x8
+EXPORT_SYMBOL_GPL vmlinux 0x4cec82ee	crypto_chain
+EXPORT_SYMBOL_GPL vmlinux 0x4d0e0147	da903x_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x4d15e0c7	ring_buffer_swap_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x4d264493	scsi_mode_select
+EXPORT_SYMBOL_GPL vmlinux 0x4d3b7584	sdio_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0x4d4974d1	__srcu_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x4d52b8f3	usb_poison_urb
+EXPORT_SYMBOL_GPL vmlinux 0x4d77a7d2	ata_sff_freeze
+EXPORT_SYMBOL_GPL vmlinux 0x4d8f4c15	klist_add_before
+EXPORT_SYMBOL_GPL vmlinux 0x4dc1b3c7	crypto_init_ahash_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x4dc64991	vma_kernel_pagesize
+EXPORT_SYMBOL_GPL vmlinux 0x4de37f31	usb_get_hcd
+EXPORT_SYMBOL_GPL vmlinux 0x4e32f1bd	crypto_ahash_finup
+EXPORT_SYMBOL_GPL vmlinux 0x4e877196	scsi_register_device_handler
+EXPORT_SYMBOL_GPL vmlinux 0x4ec32a28	__pci_reset_function
+EXPORT_SYMBOL_GPL vmlinux 0x4f0bce29	hwmon_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x4f52bac2	apply_to_page_range
+EXPORT_SYMBOL_GPL vmlinux 0x4f794164	ata_sff_hsm_move
+EXPORT_SYMBOL_GPL vmlinux 0x4f95f211	spi_register_master
+EXPORT_SYMBOL_GPL vmlinux 0x4fdc945d	sata_deb_timing_normal
+EXPORT_SYMBOL_GPL vmlinux 0x4fe7d9b1	sdio_release_irq
+EXPORT_SYMBOL_GPL vmlinux 0x503a8da2	scsi_flush_work
+EXPORT_SYMBOL_GPL vmlinux 0x5086ac3a	alg_test
+EXPORT_SYMBOL_GPL vmlinux 0x5098e72d	ip6_dst_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x50c89f23	__alloc_percpu
+EXPORT_SYMBOL_GPL vmlinux 0x50d1f870	pgprot_writecombine
+EXPORT_SYMBOL_GPL vmlinux 0x50d29dff	ring_buffer_free
+EXPORT_SYMBOL_GPL vmlinux 0x50d835c9	regulator_get_current_limit
+EXPORT_SYMBOL_GPL vmlinux 0x50e7193a	__i2c_first_dynamic_bus_num
+EXPORT_SYMBOL_GPL vmlinux 0x50f5e532	call_rcu_sched
+EXPORT_SYMBOL_GPL vmlinux 0x50fad434	round_jiffies_up
+EXPORT_SYMBOL_GPL vmlinux 0x5108b3fc	acpi_os_map_memory
+EXPORT_SYMBOL_GPL vmlinux 0x513e75f5	dm_register_path_selector
+EXPORT_SYMBOL_GPL vmlinux 0x51459516	tty_ldisc_ref_wait
+EXPORT_SYMBOL_GPL vmlinux 0x517607c0	ata_sff_busy_sleep
+EXPORT_SYMBOL_GPL vmlinux 0x518c2fc6	hpet_rtc_dropped_irq
+EXPORT_SYMBOL_GPL vmlinux 0x51a4ae50	crypto_spawn_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x51acb7a0	sata_scr_write
+EXPORT_SYMBOL_GPL vmlinux 0x51cfc7d6	tcp_death_row
+EXPORT_SYMBOL_GPL vmlinux 0x5243b132	__pci_complete_power_transition
+EXPORT_SYMBOL_GPL vmlinux 0x52496c50	fixed_phy_set_link_update
+EXPORT_SYMBOL_GPL vmlinux 0x527bce69	acpi_ec_remove_query_handler
+EXPORT_SYMBOL_GPL vmlinux 0x5297dfb9	sysfs_put
+EXPORT_SYMBOL_GPL vmlinux 0x52d111ea	pm_qos_update_requirement
+EXPORT_SYMBOL_GPL vmlinux 0x531b4e82	pci_intx
+EXPORT_SYMBOL_GPL vmlinux 0x531f884c	sysfs_update_group
+EXPORT_SYMBOL_GPL vmlinux 0x533e0cfe	regulator_bulk_disable
+EXPORT_SYMBOL_GPL vmlinux 0x53614269	get_cpu_idle_time_us
+EXPORT_SYMBOL_GPL vmlinux 0x5370f0c7	kobject_rename
+EXPORT_SYMBOL_GPL vmlinux 0x5372dede	unregister_acpi_bus_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x537b9e72	debugfs_create_u32
+EXPORT_SYMBOL_GPL vmlinux 0x53865af7	lookup_create
+EXPORT_SYMBOL_GPL vmlinux 0x53986488	register_die_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x53cfd174	fuse_do_open
+EXPORT_SYMBOL_GPL vmlinux 0x53dbd7eb	crypto_alloc_instance2
+EXPORT_SYMBOL_GPL vmlinux 0x545ac9a6	platform_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x545bcd5c	pci_enable_rom
+EXPORT_SYMBOL_GPL vmlinux 0x5460c8d8	fsnotify_get_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x54781076	fb_deferred_io_cleanup
+EXPORT_SYMBOL_GPL vmlinux 0x5492ef1b	kobject_get_path
+EXPORT_SYMBOL_GPL vmlinux 0x549525ef	handle_nested_irq
+EXPORT_SYMBOL_GPL vmlinux 0x549d027b	zap_vma_ptes
+EXPORT_SYMBOL_GPL vmlinux 0x54cfe1c7	class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x54def6e9	sdio_memcpy_toio
+EXPORT_SYMBOL_GPL vmlinux 0x54f1d26f	preempt_notifier_register
+EXPORT_SYMBOL_GPL vmlinux 0x5593c0c2	bd_claim_by_disk
+EXPORT_SYMBOL_GPL vmlinux 0x55ae88f3	raw_seq_next
+EXPORT_SYMBOL_GPL vmlinux 0x56310925	regulator_mode_to_status
+EXPORT_SYMBOL_GPL vmlinux 0x56398615	mark_tsc_unstable
+EXPORT_SYMBOL_GPL vmlinux 0x563fb5c8	__trace_bprintk
+EXPORT_SYMBOL_GPL vmlinux 0x5641485b	tty_termios_encode_baud_rate
+EXPORT_SYMBOL_GPL vmlinux 0x56947347	dmi_walk
+EXPORT_SYMBOL_GPL vmlinux 0x569f5ee2	usb_root_hub_lost_power
+EXPORT_SYMBOL_GPL vmlinux 0x56dffa1e	pm_runtime_barrier
+EXPORT_SYMBOL_GPL vmlinux 0x571d58d4	pci_cleanup_aer_uncorrect_error_status
+EXPORT_SYMBOL_GPL vmlinux 0x574072cb	ip_route_output_flow
+EXPORT_SYMBOL_GPL vmlinux 0x5775af4c	fb_deferred_io_init
+EXPORT_SYMBOL_GPL vmlinux 0x579e0bf5	rtnl_unregister_all
+EXPORT_SYMBOL_GPL vmlinux 0x58286771	bus_for_each_dev
+EXPORT_SYMBOL_GPL vmlinux 0x582eb5a8	da903x_update
+EXPORT_SYMBOL_GPL vmlinux 0x5839f96f	rdev_get_dev
+EXPORT_SYMBOL_GPL vmlinux 0x58471167	vfs_test_lock
+EXPORT_SYMBOL_GPL vmlinux 0x58665763	rtc_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x58e26889	inet_hash
+EXPORT_SYMBOL_GPL vmlinux 0x5916acb3	gpiochip_remove
+EXPORT_SYMBOL_GPL vmlinux 0x5928bf4f	crypto_shoot_alg
+EXPORT_SYMBOL_GPL vmlinux 0x593a36c2	scsi_dh_handler_exist
+EXPORT_SYMBOL_GPL vmlinux 0x59ca3224	inet_twdr_twkill_work
+EXPORT_SYMBOL_GPL vmlinux 0x59d26f28	sysdev_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x59d4f066	kallsyms_on_each_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x59e16dd1	device_attach
+EXPORT_SYMBOL_GPL vmlinux 0x5a08a0bc	da903x_read
+EXPORT_SYMBOL_GPL vmlinux 0x5a6ec452	device_reprobe
+EXPORT_SYMBOL_GPL vmlinux 0x5a7bfe41	crypto_probing_notify
+EXPORT_SYMBOL_GPL vmlinux 0x5aba3cf1	ata_sff_dma_pause
+EXPORT_SYMBOL_GPL vmlinux 0x5b2ef51b	regulator_enable
+EXPORT_SYMBOL_GPL vmlinux 0x5b42c496	dma_release_channel
+EXPORT_SYMBOL_GPL vmlinux 0x5bb062b8	set_cpus_allowed_ptr
+EXPORT_SYMBOL_GPL vmlinux 0x5bfc03c3	unregister_keyboard_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5c11b85d	spi_add_device
+EXPORT_SYMBOL_GPL vmlinux 0x5c365550	input_ff_create
+EXPORT_SYMBOL_GPL vmlinux 0x5c3e7099	class_dev_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0x5c91ca5e	seq_open_net
+EXPORT_SYMBOL_GPL vmlinux 0x5c9b768d	attribute_container_register
+EXPORT_SYMBOL_GPL vmlinux 0x5cb207a9	ata_sas_port_init
+EXPORT_SYMBOL_GPL vmlinux 0x5cd04214	rtc_set_mmss
+EXPORT_SYMBOL_GPL vmlinux 0x5ce5f1e0	crypto_hash_walk_first
+EXPORT_SYMBOL_GPL vmlinux 0x5cf602f8	ata_sff_postreset
+EXPORT_SYMBOL_GPL vmlinux 0x5d0375b1	lookup_instantiate_filp
+EXPORT_SYMBOL_GPL vmlinux 0x5d0f6f57	kbd_table
+EXPORT_SYMBOL_GPL vmlinux 0x5d51bcf7	scatterwalk_start
+EXPORT_SYMBOL_GPL vmlinux 0x5d730e7b	raw_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x5d7536e4	acpi_get_pci_dev
+EXPORT_SYMBOL_GPL vmlinux 0x5d87c067	register_acpi_bus_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5dc78542	sdio_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0x5dd67618	register_netevent_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5ded0d7f	crypto_register_ahash
+EXPORT_SYMBOL_GPL vmlinux 0x5e05edde	fuse_request_send_background
+EXPORT_SYMBOL_GPL vmlinux 0x5e11da85	simple_attr_read
+EXPORT_SYMBOL_GPL vmlinux 0x5e3251cd	scsi_dh_detach
+EXPORT_SYMBOL_GPL vmlinux 0x5e328cb2	register_net_sysctl_rotable
+EXPORT_SYMBOL_GPL vmlinux 0x5e51671d	platform_driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x5e577fca	blk_execute_rq_nowait
+EXPORT_SYMBOL_GPL vmlinux 0x5e9354af	kobject_uevent_env
+EXPORT_SYMBOL_GPL vmlinux 0x5f29175f	inet_csk_listen_start
+EXPORT_SYMBOL_GPL vmlinux 0x5f2da8c4	check_tsc_unstable
+EXPORT_SYMBOL_GPL vmlinux 0x5f5aedf9	ata_acpi_cbl_80wire
+EXPORT_SYMBOL_GPL vmlinux 0x5f85a9f8	platform_get_resource_byname
+EXPORT_SYMBOL_GPL vmlinux 0x5f9002b9	dm_disk
+EXPORT_SYMBOL_GPL vmlinux 0x5faac7e7	crypto_ahash_type
+EXPORT_SYMBOL_GPL vmlinux 0x5fb3e445	usb_submit_urb
+EXPORT_SYMBOL_GPL vmlinux 0x5fcdec5d	xfrm_ealg_get_byidx
+EXPORT_SYMBOL_GPL vmlinux 0x5fcee70e	crypto_rng_type
+EXPORT_SYMBOL_GPL vmlinux 0x5fd5b103	pci_rescan_bus
+EXPORT_SYMBOL_GPL vmlinux 0x6020434a	acpi_pci_check_ejectable
+EXPORT_SYMBOL_GPL vmlinux 0x6039f26d	ata_pci_remove_one
+EXPORT_SYMBOL_GPL vmlinux 0x605a1327	alloc_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0x6076a3f4	ata_dummy_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x609acde9	proc_net_remove
+EXPORT_SYMBOL_GPL vmlinux 0x60a13e90	rcu_barrier
+EXPORT_SYMBOL_GPL vmlinux 0x60b4ebad	blk_end_request_err
+EXPORT_SYMBOL_GPL vmlinux 0x60cd73ed	pv_apic_ops
+EXPORT_SYMBOL_GPL vmlinux 0x60cfabee	alloc_page_buffers
+EXPORT_SYMBOL_GPL vmlinux 0x60e5f765	spi_busnum_to_master
+EXPORT_SYMBOL_GPL vmlinux 0x61120e92	usb_debug_root
+EXPORT_SYMBOL_GPL vmlinux 0x6121ff2c	dm_rh_region_context
+EXPORT_SYMBOL_GPL vmlinux 0x61747e09	blocking_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x6248e402	cpufreq_frequency_table_verify
+EXPORT_SYMBOL_GPL vmlinux 0x627a6fa6	vfs_setxattr
+EXPORT_SYMBOL_GPL vmlinux 0x629a7f6e	do_posix_clock_nonanosleep
+EXPORT_SYMBOL_GPL vmlinux 0x629e51c2	nf_register_afinfo
+EXPORT_SYMBOL_GPL vmlinux 0x62f50904	fib_rules_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x631ab766	tcp_set_state
+EXPORT_SYMBOL_GPL vmlinux 0x63583f91	hrtimer_cancel
+EXPORT_SYMBOL_GPL vmlinux 0x6379f8de	queue_work_on
+EXPORT_SYMBOL_GPL vmlinux 0x6382e659	usb_get_status
+EXPORT_SYMBOL_GPL vmlinux 0x63a83227	register_pernet_subsys
+EXPORT_SYMBOL_GPL vmlinux 0x63ebb125	crypto_unregister_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0x6448f312	pci_reset_function
+EXPORT_SYMBOL_GPL vmlinux 0x6462ec6b	ata_port_schedule_eh
+EXPORT_SYMBOL_GPL vmlinux 0x647845fc	inotify_add_watch
+EXPORT_SYMBOL_GPL vmlinux 0x649e9871	tcp_reno_min_cwnd
+EXPORT_SYMBOL_GPL vmlinux 0x64c7b20a	sata_scr_write_flush
+EXPORT_SYMBOL_GPL vmlinux 0x64e48225	__fsnotify_inode_delete
+EXPORT_SYMBOL_GPL vmlinux 0x64ebe677	wmi_query_block
+EXPORT_SYMBOL_GPL vmlinux 0x6503d0f3	inet_diag_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x65088c94	scsi_unregister_device_handler
+EXPORT_SYMBOL_GPL vmlinux 0x651d88e1	usb_match_one_id
+EXPORT_SYMBOL_GPL vmlinux 0x6535b2e4	__audit_inode_child
+EXPORT_SYMBOL_GPL vmlinux 0x654c49e2	aer_irq
+EXPORT_SYMBOL_GPL vmlinux 0x6560e734	save_stack_trace_tsk
+EXPORT_SYMBOL_GPL vmlinux 0x65bbbc78	schedule_hrtimeout_range
+EXPORT_SYMBOL_GPL vmlinux 0x65ccb6f0	call_netevent_notifiers
+EXPORT_SYMBOL_GPL vmlinux 0x65d6d0f0	gpio_direction_input
+EXPORT_SYMBOL_GPL vmlinux 0x661601de	sprint_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x6639d1da	tcp_done
+EXPORT_SYMBOL_GPL vmlinux 0x6645d6ab	da903x_set_bits
+EXPORT_SYMBOL_GPL vmlinux 0x668402aa	crypto_put_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x66a8210a	synchronize_srcu
+EXPORT_SYMBOL_GPL vmlinux 0x66b29df5	sdev_evt_send
+EXPORT_SYMBOL_GPL vmlinux 0x66b2a859	nr_free_buffer_pages
+EXPORT_SYMBOL_GPL vmlinux 0x66d87d38	symbol_put_addr
+EXPORT_SYMBOL_GPL vmlinux 0x66f36c69	each_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x66fab731	spi_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x66fc6128	bus_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x67238c31	console_drivers
+EXPORT_SYMBOL_GPL vmlinux 0x6774168b	ata_eh_qc_complete
+EXPORT_SYMBOL_GPL vmlinux 0x67955ce6	profile_hits
+EXPORT_SYMBOL_GPL vmlinux 0x67a9f56f	fb_deferred_io_fsync
+EXPORT_SYMBOL_GPL vmlinux 0x67e032ac	power_supply_register
+EXPORT_SYMBOL_GPL vmlinux 0x686c703f	xfrm_count_auth_supported
+EXPORT_SYMBOL_GPL vmlinux 0x688fa032	clockevents_register_device
+EXPORT_SYMBOL_GPL vmlinux 0x6892088c	unregister_pm_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x68a668cb	hrtimer_forward
+EXPORT_SYMBOL_GPL vmlinux 0x6901119a	trace_nowake_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0x6907ce65	scsi_eh_ready_devs
+EXPORT_SYMBOL_GPL vmlinux 0x69371c4d	platform_device_register_simple
+EXPORT_SYMBOL_GPL vmlinux 0x697544db	net_assign_generic
+EXPORT_SYMBOL_GPL vmlinux 0x698189fb	ipv6_opt_accepted
+EXPORT_SYMBOL_GPL vmlinux 0x69e9a2cb	ata_scsi_slave_config
+EXPORT_SYMBOL_GPL vmlinux 0x6a044eab	crypto_destroy_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x6a160fb3	inet_csk_route_req
+EXPORT_SYMBOL_GPL vmlinux 0x6a543771	usb_autopm_get_interface
+EXPORT_SYMBOL_GPL vmlinux 0x6a8441be	cpci_hp_start
+EXPORT_SYMBOL_GPL vmlinux 0x6a869e32	usb_unpoison_urb
+EXPORT_SYMBOL_GPL vmlinux 0x6ad2337e	devres_remove
+EXPORT_SYMBOL_GPL vmlinux 0x6b039ff3	dm_rh_inc_pending
+EXPORT_SYMBOL_GPL vmlinux 0x6b126efd	__create_workqueue_key
+EXPORT_SYMBOL_GPL vmlinux 0x6b8b55d1	dm_rh_get_state
+EXPORT_SYMBOL_GPL vmlinux 0x6b94c408	enable_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0x6ba933bb	ata_pci_bmdma_init
+EXPORT_SYMBOL_GPL vmlinux 0x6be8d2fb	sysfs_schedule_callback
+EXPORT_SYMBOL_GPL vmlinux 0x6c069992	usb_autopm_get_interface_async
+EXPORT_SYMBOL_GPL vmlinux 0x6c19e73b	led_trigger_register_simple
+EXPORT_SYMBOL_GPL vmlinux 0x6c49c4f2	clockevents_notify
+EXPORT_SYMBOL_GPL vmlinux 0x6c7e9040	regulator_bulk_get
+EXPORT_SYMBOL_GPL vmlinux 0x6c8d5ae8	__gpio_get_value
+EXPORT_SYMBOL_GPL vmlinux 0x6c8eb98f	xfrm_aalg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0x6d2fc5a6	net_namespace_list
+EXPORT_SYMBOL_GPL vmlinux 0x6d79c5e6	skb_to_sgvec
+EXPORT_SYMBOL_GPL vmlinux 0x6d7ff3c9	ata_eh_thaw_port
+EXPORT_SYMBOL_GPL vmlinux 0x6dbaa144	module_mutex
+EXPORT_SYMBOL_GPL vmlinux 0x6dd43cb8	__ip_route_output_key
+EXPORT_SYMBOL_GPL vmlinux 0x6e079068	i2c_new_device
+EXPORT_SYMBOL_GPL vmlinux 0x6e4a9927	vfs_listxattr
+EXPORT_SYMBOL_GPL vmlinux 0x6e7474fc	xfrm_ealg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x6eaa6b65	ring_buffer_reset
+EXPORT_SYMBOL_GPL vmlinux 0x6eb19705	inet_ctl_sock_create
+EXPORT_SYMBOL_GPL vmlinux 0x6eb3fc35	regulator_bulk_free
+EXPORT_SYMBOL_GPL vmlinux 0x6eb787ee	klist_add_head
+EXPORT_SYMBOL_GPL vmlinux 0x6efceabc	rt_mutex_unlock
+EXPORT_SYMBOL_GPL vmlinux 0x6fd04fc1	sysfs_add_file_to_group
+EXPORT_SYMBOL_GPL vmlinux 0x6fe3d8cf	ktime_add_safe
+EXPORT_SYMBOL_GPL vmlinux 0x6ff607b6	crypto_get_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x7007f4b1	usb_get_intf
+EXPORT_SYMBOL_GPL vmlinux 0x7015b73c	transport_configure_device
+EXPORT_SYMBOL_GPL vmlinux 0x7037d79d	k8_flush_garts
+EXPORT_SYMBOL_GPL vmlinux 0x706b3a33	cpufreq_frequency_table_get_attr
+EXPORT_SYMBOL_GPL vmlinux 0x7078e6dc	blk_add_driver_data
+EXPORT_SYMBOL_GPL vmlinux 0x707ff1bb	ata_xfer_mask2mode
+EXPORT_SYMBOL_GPL vmlinux 0x709f0674	usb_interrupt_msg
+EXPORT_SYMBOL_GPL vmlinux 0x70d79741	pci_bus_add_device
+EXPORT_SYMBOL_GPL vmlinux 0x70ec134c	blk_trace_setup
+EXPORT_SYMBOL_GPL vmlinux 0x716265c7	debugfs_initialized
+EXPORT_SYMBOL_GPL vmlinux 0x71c8bc95	kgdb_unregister_io_module
+EXPORT_SYMBOL_GPL vmlinux 0x71d7c7c6	inotify_dentry_parent_queue_event
+EXPORT_SYMBOL_GPL vmlinux 0x722988b1	usb_sg_wait
+EXPORT_SYMBOL_GPL vmlinux 0x722c4f65	usb_scuttle_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0x724a57d7	fsstack_copy_attr_all
+EXPORT_SYMBOL_GPL vmlinux 0x72741f25	trace_vbprintk
+EXPORT_SYMBOL_GPL vmlinux 0x7278d328	all_vm_events
+EXPORT_SYMBOL_GPL vmlinux 0x7282adc9	ata_dev_next
+EXPORT_SYMBOL_GPL vmlinux 0x7285f84f	unregister_jprobe
+EXPORT_SYMBOL_GPL vmlinux 0x72dea863	tracepoint_iter_start
+EXPORT_SYMBOL_GPL vmlinux 0x72e03bae	stop_machine_create
+EXPORT_SYMBOL_GPL vmlinux 0x72f78cc0	blk_rq_check_limits
+EXPORT_SYMBOL_GPL vmlinux 0x732f3bd0	elv_register
+EXPORT_SYMBOL_GPL vmlinux 0x735cb11a	ata_sas_port_start
+EXPORT_SYMBOL_GPL vmlinux 0x738d9765	da903x_writes
+EXPORT_SYMBOL_GPL vmlinux 0x739adef0	attribute_container_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x73a48b4a	ata_sff_std_ports
+EXPORT_SYMBOL_GPL vmlinux 0x73ff4175	led_trigger_register
+EXPORT_SYMBOL_GPL vmlinux 0x7423c4ff	ata_sff_qc_issue
+EXPORT_SYMBOL_GPL vmlinux 0x743a165e	ata_pack_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0x747a6d8a	skcipher_geniv_init
+EXPORT_SYMBOL_GPL vmlinux 0x74abdafa	task_handoff_register
+EXPORT_SYMBOL_GPL vmlinux 0x74b2e5cc	fsstack_copy_inode_size
+EXPORT_SYMBOL_GPL vmlinux 0x74baf17a	tracing_is_on
+EXPORT_SYMBOL_GPL vmlinux 0x74c67d66	inet_twsk_schedule
+EXPORT_SYMBOL_GPL vmlinux 0x74de9d92	i2c_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x74deb10c	used_vectors
+EXPORT_SYMBOL_GPL vmlinux 0x74e90302	debugfs_create_dir
+EXPORT_SYMBOL_GPL vmlinux 0x7521afb6	leave_mm
+EXPORT_SYMBOL_GPL vmlinux 0x759a08c2	dm_rh_bio_to_region
+EXPORT_SYMBOL_GPL vmlinux 0x759bb4fc	usb_deregister
+EXPORT_SYMBOL_GPL vmlinux 0x75b65091	ata_sff_post_internal_cmd
+EXPORT_SYMBOL_GPL vmlinux 0x75e4b4a0	inet6_csk_xmit
+EXPORT_SYMBOL_GPL vmlinux 0x75e8f3c3	crypto_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x75f47f59	pci_hp_create_module_link
+EXPORT_SYMBOL_GPL vmlinux 0x761188fd	dpm_suspend_noirq
+EXPORT_SYMBOL_GPL vmlinux 0x762f7c64	fuse_abort_conn
+EXPORT_SYMBOL_GPL vmlinux 0x76a1348a	ring_buffer_read
+EXPORT_SYMBOL_GPL vmlinux 0x76a7c256	mnt_want_write_file
+EXPORT_SYMBOL_GPL vmlinux 0x76ad995c	device_for_each_child
+EXPORT_SYMBOL_GPL vmlinux 0x76ee6935	pskb_put
+EXPORT_SYMBOL_GPL vmlinux 0x771f8201	inet_diag_register
+EXPORT_SYMBOL_GPL vmlinux 0x77206f53	regulator_set_current_limit
+EXPORT_SYMBOL_GPL vmlinux 0x773ca527	init_uts_ns
+EXPORT_SYMBOL_GPL vmlinux 0x77654342	trace_define_field
+EXPORT_SYMBOL_GPL vmlinux 0x77a343a3	scsi_queue_work
+EXPORT_SYMBOL_GPL vmlinux 0x77f0692a	crypto_larval_kill
+EXPORT_SYMBOL_GPL vmlinux 0x780b5aa3	fuse_request_send
+EXPORT_SYMBOL_GPL vmlinux 0x780eed89	acpi_processor_ffh_cstate_enter
+EXPORT_SYMBOL_GPL vmlinux 0x781f1265	xfrm_output
+EXPORT_SYMBOL_GPL vmlinux 0x783e8b36	ata_sg_init
+EXPORT_SYMBOL_GPL vmlinux 0x7868c054	sysfs_create_group
+EXPORT_SYMBOL_GPL vmlinux 0x78a7700a	shash_ahash_finup
+EXPORT_SYMBOL_GPL vmlinux 0x78cad82c	debugfs_create_u64
+EXPORT_SYMBOL_GPL vmlinux 0x78e4a4ee	klist_add_after
+EXPORT_SYMBOL_GPL vmlinux 0x78ed3241	sdio_readsb
+EXPORT_SYMBOL_GPL vmlinux 0x7940f2e1	platform_device_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x7944e0fc	tracing_off
+EXPORT_SYMBOL_GPL vmlinux 0x79880bb5	ring_buffer_read_finish
+EXPORT_SYMBOL_GPL vmlinux 0x7989fa10	dm_rh_dirty_log
+EXPORT_SYMBOL_GPL vmlinux 0x798fcde1	__hvc_resize
+EXPORT_SYMBOL_GPL vmlinux 0x79ea6332	user_read
+EXPORT_SYMBOL_GPL vmlinux 0x79f12478	usb_autopm_set_interface
+EXPORT_SYMBOL_GPL vmlinux 0x79f50a2b	unregister_ftrace_event
+EXPORT_SYMBOL_GPL vmlinux 0x7a101d7b	inotify_init_watch
+EXPORT_SYMBOL_GPL vmlinux 0x7a2892d2	iomap_atomic_prot_pfn
+EXPORT_SYMBOL_GPL vmlinux 0x7a47b68f	tty_get_pgrp
+EXPORT_SYMBOL_GPL vmlinux 0x7a4c1438	pv_info
+EXPORT_SYMBOL_GPL vmlinux 0x7a69999b	dm_rh_recovery_prepare
+EXPORT_SYMBOL_GPL vmlinux 0x7a7cc4d5	udp4_lib_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x7a8fb80b	ring_buffer_entries
+EXPORT_SYMBOL_GPL vmlinux 0x7a98775f	ata_link_offline
+EXPORT_SYMBOL_GPL vmlinux 0x7ab3c122	edac_handlers
+EXPORT_SYMBOL_GPL vmlinux 0x7aba1487	ata_sff_thaw
+EXPORT_SYMBOL_GPL vmlinux 0x7acddd8d	blk_abort_queue
+EXPORT_SYMBOL_GPL vmlinux 0x7ad992e6	tty_buffer_request_room
+EXPORT_SYMBOL_GPL vmlinux 0x7ae1ae8e	cpufreq_frequency_table_put_attr
+EXPORT_SYMBOL_GPL vmlinux 0x7af0c8a9	shmem_file_setup
+EXPORT_SYMBOL_GPL vmlinux 0x7b1d544d	edac_handler_set
+EXPORT_SYMBOL_GPL vmlinux 0x7b617972	ata_sff_data_xfer_noirq
+EXPORT_SYMBOL_GPL vmlinux 0x7bb39690	cpufreq_freq_attr_scaling_available_freqs
+EXPORT_SYMBOL_GPL vmlinux 0x7bcd2ded	klist_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0x7c20bba1	crypto_aead_type
+EXPORT_SYMBOL_GPL vmlinux 0x7c269f61	tcp_twsk_unique
+EXPORT_SYMBOL_GPL vmlinux 0x7c3e8890	inet_csk_search_req
+EXPORT_SYMBOL_GPL vmlinux 0x7c6e5b11	xfrm_audit_state_delete
+EXPORT_SYMBOL_GPL vmlinux 0x7c913d0d	blk_abort_request
+EXPORT_SYMBOL_GPL vmlinux 0x7cb1429b	bsg_register_queue
+EXPORT_SYMBOL_GPL vmlinux 0x7d139772	debugfs_create_symlink
+EXPORT_SYMBOL_GPL vmlinux 0x7d8200ac	elv_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x7dc5d0b6	crypto_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x7e1183c9	async_schedule
+EXPORT_SYMBOL_GPL vmlinux 0x7e23c01b	ring_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0x7e275ea8	scsi_complete_async_scans
+EXPORT_SYMBOL_GPL vmlinux 0x7e56cf9c	xfrm_output_resume
+EXPORT_SYMBOL_GPL vmlinux 0x7e64181d	usb_calc_bus_time
+EXPORT_SYMBOL_GPL vmlinux 0x7e7a3398	cpufreq_cpu_put
+EXPORT_SYMBOL_GPL vmlinux 0x7e8075e2	usb_find_interface
+EXPORT_SYMBOL_GPL vmlinux 0x7e834853	blkcipher_walk_virt_block
+EXPORT_SYMBOL_GPL vmlinux 0x7ee35b05	device_rename
+EXPORT_SYMBOL_GPL vmlinux 0x7f073ec4	crypto_unregister_ahash
+EXPORT_SYMBOL_GPL vmlinux 0x7f19c836	unlock_policy_rwsem_write
+EXPORT_SYMBOL_GPL vmlinux 0x7f220180	gpio_export_link
+EXPORT_SYMBOL_GPL vmlinux 0x7f23d6d6	sdio_writel
+EXPORT_SYMBOL_GPL vmlinux 0x7f2a0fe0	rtnl_put_cacheinfo
+EXPORT_SYMBOL_GPL vmlinux 0x7fac94da	usb_register_dev
+EXPORT_SYMBOL_GPL vmlinux 0x7fd6e315	bus_find_device_by_name
+EXPORT_SYMBOL_GPL vmlinux 0x7ff0dffa	spi_async
+EXPORT_SYMBOL_GPL vmlinux 0x7ff10ccf	raw_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x8014b6af	input_event_from_user
+EXPORT_SYMBOL_GPL vmlinux 0x8039d043	selinux_secmark_relabel_packet_permission
+EXPORT_SYMBOL_GPL vmlinux 0x8054ed20	filter_current_check_discard
+EXPORT_SYMBOL_GPL vmlinux 0x808ec1a3	crypto_alg_tested
+EXPORT_SYMBOL_GPL vmlinux 0x80d5f30f	invalidate_inode_pages2
+EXPORT_SYMBOL_GPL vmlinux 0x80ee55c3	selinux_secmark_refcount_inc
+EXPORT_SYMBOL_GPL vmlinux 0x8149ea54	ata_timing_find_mode
+EXPORT_SYMBOL_GPL vmlinux 0x816809ac	usb_unlink_urb
+EXPORT_SYMBOL_GPL vmlinux 0x81ba3703	blk_rq_unprep_clone
+EXPORT_SYMBOL_GPL vmlinux 0x81dc0190	dm_rh_get_region_size
+EXPORT_SYMBOL_GPL vmlinux 0x81ea15f2	sdio_writew
+EXPORT_SYMBOL_GPL vmlinux 0x8226642f	__gpio_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x8271e59c	platform_get_irq
+EXPORT_SYMBOL_GPL vmlinux 0x828c2ca5	ata_pci_sff_prepare_host
+EXPORT_SYMBOL_GPL vmlinux 0x82939ebd	rcu_batches_completed_sched
+EXPORT_SYMBOL_GPL vmlinux 0x8293b534	tty_prepare_flip_string_flags
+EXPORT_SYMBOL_GPL vmlinux 0x82aeb568	acpi_smbus_read
+EXPORT_SYMBOL_GPL vmlinux 0x82be496c	generic_fh_to_dentry
+EXPORT_SYMBOL_GPL vmlinux 0x82d79b51	sysctl_vfs_cache_pressure
+EXPORT_SYMBOL_GPL vmlinux 0x82f2710d	inet6_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x82f776b7	gpio_export
+EXPORT_SYMBOL_GPL vmlinux 0x831ad772	fuse_direct_io
+EXPORT_SYMBOL_GPL vmlinux 0x832ad090	pm_runtime_resume
+EXPORT_SYMBOL_GPL vmlinux 0x834d8eee	attribute_container_classdev_to_container
+EXPORT_SYMBOL_GPL vmlinux 0x834ff459	unregister_pernet_gen_subsys
+EXPORT_SYMBOL_GPL vmlinux 0x8388dd3b	usb_init_urb
+EXPORT_SYMBOL_GPL vmlinux 0x83a0671a	srcu_init_notifier_head
+EXPORT_SYMBOL_GPL vmlinux 0x83e43c86	usb_register_device_driver
+EXPORT_SYMBOL_GPL vmlinux 0x84109af3	usb_remove_hcd
+EXPORT_SYMBOL_GPL vmlinux 0x841daea0	disk_map_sector_rcu
+EXPORT_SYMBOL_GPL vmlinux 0x8432d0e2	hvc_poll
+EXPORT_SYMBOL_GPL vmlinux 0x843d70ef	acpi_is_root_bridge
+EXPORT_SYMBOL_GPL vmlinux 0x8442a557	class_compat_register
+EXPORT_SYMBOL_GPL vmlinux 0x847a6a4c	tty_wakeup
+EXPORT_SYMBOL_GPL vmlinux 0x850fc18b	crypto_create_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x85478a0b	inet6_hash_frag
+EXPORT_SYMBOL_GPL vmlinux 0x85c10896	rcu_batches_completed_bh
+EXPORT_SYMBOL_GPL vmlinux 0x85d7edfd	hpet_set_periodic_freq
+EXPORT_SYMBOL_GPL vmlinux 0x85fa2317	dev_attr_em_message_type
+EXPORT_SYMBOL_GPL vmlinux 0x860e4bf7	xfrm_audit_state_add
+EXPORT_SYMBOL_GPL vmlinux 0x867c684a	setup_APIC_eilvt_ibs
+EXPORT_SYMBOL_GPL vmlinux 0x868784cb	__symbol_get
+EXPORT_SYMBOL_GPL vmlinux 0x86b1667d	hwrng_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x86beec27	rdev_get_id
+EXPORT_SYMBOL_GPL vmlinux 0x86d0a086	single_open_net
+EXPORT_SYMBOL_GPL vmlinux 0x86f6b99d	synchronize_rcu_expedited
+EXPORT_SYMBOL_GPL vmlinux 0x870c3a5e	sdio_set_block_size
+EXPORT_SYMBOL_GPL vmlinux 0x8717a430	ring_buffer_peek
+EXPORT_SYMBOL_GPL vmlinux 0x871dc7f5	usb_hcd_pci_pm_ops
+EXPORT_SYMBOL_GPL vmlinux 0x873fbaea	edac_atomic_assert_error
+EXPORT_SYMBOL_GPL vmlinux 0x87754115	raw_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x878499e3	sock_prot_inuse_get
+EXPORT_SYMBOL_GPL vmlinux 0x87e98d61	ata_sff_dumb_qc_prep
+EXPORT_SYMBOL_GPL vmlinux 0x880b189a	__atomic_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x8810ad5e	crypto_xor
+EXPORT_SYMBOL_GPL vmlinux 0x88233033	crypto_hash_walk_done
+EXPORT_SYMBOL_GPL vmlinux 0x8843adff	usb_anchor_urb
+EXPORT_SYMBOL_GPL vmlinux 0x885142a6	nf_net_netfilter_sysctl_path
+EXPORT_SYMBOL_GPL vmlinux 0x886736fc	olpc_platform_info
+EXPORT_SYMBOL_GPL vmlinux 0x887a3c5e	crypto_enqueue_request
+EXPORT_SYMBOL_GPL vmlinux 0x88860656	init_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0x8918ff0d	rtc_irq_set_state
+EXPORT_SYMBOL_GPL vmlinux 0x893e3fe9	device_bind_driver
+EXPORT_SYMBOL_GPL vmlinux 0x894bcc9a	bsg_unregister_queue
+EXPORT_SYMBOL_GPL vmlinux 0x897fd962	class_compat_remove_link
+EXPORT_SYMBOL_GPL vmlinux 0x89a35f32	unregister_kretprobes
+EXPORT_SYMBOL_GPL vmlinux 0x89f10cae	acpi_smbus_write
+EXPORT_SYMBOL_GPL vmlinux 0x8a03ef10	register_pernet_gen_device
+EXPORT_SYMBOL_GPL vmlinux 0x8a81ae7b	ata_link_next
+EXPORT_SYMBOL_GPL vmlinux 0x8a93ab26	ata_bus_reset
+EXPORT_SYMBOL_GPL vmlinux 0x8abd4ebf	tcp_init_congestion_ops
+EXPORT_SYMBOL_GPL vmlinux 0x8ae8f1f9	tasklet_hrtimer_init
+EXPORT_SYMBOL_GPL vmlinux 0x8b1cd814	__pneigh_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x8b4343f9	ata_host_resume
+EXPORT_SYMBOL_GPL vmlinux 0x8b5440c1	crypto_unregister_template
+EXPORT_SYMBOL_GPL vmlinux 0x8b752ac1	ata_tf_to_fis
+EXPORT_SYMBOL_GPL vmlinux 0x8b7db255	device_register
+EXPORT_SYMBOL_GPL vmlinux 0x8bf3b284	unregister_pernet_gen_device
+EXPORT_SYMBOL_GPL vmlinux 0x8bf8c7c3	single_release_net
+EXPORT_SYMBOL_GPL vmlinux 0x8c067007	input_ff_upload
+EXPORT_SYMBOL_GPL vmlinux 0x8c069440	inotify_inode_queue_event
+EXPORT_SYMBOL_GPL vmlinux 0x8c2bdee8	blk_queue_rq_timeout
+EXPORT_SYMBOL_GPL vmlinux 0x8c564553	free_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0x8c7fe872	ata_std_error_handler
+EXPORT_SYMBOL_GPL vmlinux 0x8c9d686d	__wake_up_sync_key
+EXPORT_SYMBOL_GPL vmlinux 0x8cd7a730	sysdev_show_int
+EXPORT_SYMBOL_GPL vmlinux 0x8d033df4	klist_node_attached
+EXPORT_SYMBOL_GPL vmlinux 0x8d08c235	regulator_list_voltage
+EXPORT_SYMBOL_GPL vmlinux 0x8d19123b	register_ftrace_event
+EXPORT_SYMBOL_GPL vmlinux 0x8d2c22d2	sdio_align_size
+EXPORT_SYMBOL_GPL vmlinux 0x8d2ce107	dm_send_uevents
+EXPORT_SYMBOL_GPL vmlinux 0x8d6a7512	anon_inode_getfd
+EXPORT_SYMBOL_GPL vmlinux 0x8d82639c	skb_gro_receive
+EXPORT_SYMBOL_GPL vmlinux 0x8da17b42	scatterwalk_copychunks
+EXPORT_SYMBOL_GPL vmlinux 0x8da5ecb9	acpi_ec_add_query_handler
+EXPORT_SYMBOL_GPL vmlinux 0x8dc9925d	scsi_schedule_eh
+EXPORT_SYMBOL_GPL vmlinux 0x8dfcd085	drop_file_write_access
+EXPORT_SYMBOL_GPL vmlinux 0x8e2e50ae	__class_register
+EXPORT_SYMBOL_GPL vmlinux 0x8e802550	get_inotify_watch
+EXPORT_SYMBOL_GPL vmlinux 0x8ea91a6d	usb_driver_release_interface
+EXPORT_SYMBOL_GPL vmlinux 0x8eae69ba	kobject_init_and_add
+EXPORT_SYMBOL_GPL vmlinux 0x8eb58c6e	__wake_up_sync
+EXPORT_SYMBOL_GPL vmlinux 0x8ebd5360	input_ff_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x8f6cee77	__round_jiffies_relative
+EXPORT_SYMBOL_GPL vmlinux 0x8f6f266b	cpci_hp_unregister_controller
+EXPORT_SYMBOL_GPL vmlinux 0x8f7aae1f	i2c_new_probed_device
+EXPORT_SYMBOL_GPL vmlinux 0x8f9671b4	ata_common_sdev_attrs
+EXPORT_SYMBOL_GPL vmlinux 0x8fa74514	sysdev_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x9009602a	acpi_bus_get_ejd
+EXPORT_SYMBOL_GPL vmlinux 0x901fa0e9	crypto_shash_final
+EXPORT_SYMBOL_GPL vmlinux 0x904be910	transport_setup_device
+EXPORT_SYMBOL_GPL vmlinux 0x90a1004a	crypto_has_alg
+EXPORT_SYMBOL_GPL vmlinux 0x90ee6c05	crypto_blkcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0x91102f82	led_trigger_unregister_simple
+EXPORT_SYMBOL_GPL vmlinux 0x91448607	sysfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x91482eef	usb_anchor_empty
+EXPORT_SYMBOL_GPL vmlinux 0x9159b9d6	profile_event_register
+EXPORT_SYMBOL_GPL vmlinux 0x91a704fe	sysfs_remove_group
+EXPORT_SYMBOL_GPL vmlinux 0x91c5588d	ata_dev_pair
+EXPORT_SYMBOL_GPL vmlinux 0x9244ecde	tracepoint_iter_reset
+EXPORT_SYMBOL_GPL vmlinux 0x9259f21d	ata_bmdma_setup
+EXPORT_SYMBOL_GPL vmlinux 0x9266451b	vfs_getxattr
+EXPORT_SYMBOL_GPL vmlinux 0x92732398	put_driver
+EXPORT_SYMBOL_GPL vmlinux 0x92781f40	ata_sff_data_xfer
+EXPORT_SYMBOL_GPL vmlinux 0x9288c95a	usb_set_device_state
+EXPORT_SYMBOL_GPL vmlinux 0x92d31cfb	fixed_phy_add
+EXPORT_SYMBOL_GPL vmlinux 0x92d74e64	sysdev_class_register
+EXPORT_SYMBOL_GPL vmlinux 0x92fb217b	dcookie_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x93885ace	pci_find_next_ht_capability
+EXPORT_SYMBOL_GPL vmlinux 0x93adfc6a	srcu_read_unlock
+EXPORT_SYMBOL_GPL vmlinux 0x93bf114b	cpufreq_cpu_get
+EXPORT_SYMBOL_GPL vmlinux 0x93ce557a	ata_pci_bmdma_clear_simplex
+EXPORT_SYMBOL_GPL vmlinux 0x93d2422d	snmp_mib_free
+EXPORT_SYMBOL_GPL vmlinux 0x9407d9b3	ata_sff_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x948fc702	__inet_twsk_hashdance
+EXPORT_SYMBOL_GPL vmlinux 0x94924a2c	skcipher_geniv_exit
+EXPORT_SYMBOL_GPL vmlinux 0x94949608	dm_noflush_suspending
+EXPORT_SYMBOL_GPL vmlinux 0x9497361e	ata_sff_dev_classify
+EXPORT_SYMBOL_GPL vmlinux 0x94a68723	ata_scsi_slave_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x94aa8400	bus_register
+EXPORT_SYMBOL_GPL vmlinux 0x94de3391	kobject_create_and_add
+EXPORT_SYMBOL_GPL vmlinux 0x94ecc4c9	rtc_irq_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x94ef4d05	cpci_hp_stop
+EXPORT_SYMBOL_GPL vmlinux 0x94fb62ea	acpi_smbus_unregister_callback
+EXPORT_SYMBOL_GPL vmlinux 0x952664c5	do_exit
+EXPORT_SYMBOL_GPL vmlinux 0x952c4502	tty_perform_flush
+EXPORT_SYMBOL_GPL vmlinux 0x9543bc5d	device_create_vargs
+EXPORT_SYMBOL_GPL vmlinux 0x95501e22	sg_scsi_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x956a91ba	gpio_get_value_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x95737068	blk_queue_lld_busy
+EXPORT_SYMBOL_GPL vmlinux 0x95758050	__blocking_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x9579f004	sata_async_notification
+EXPORT_SYMBOL_GPL vmlinux 0x958d5db9	blk_trace_startstop
+EXPORT_SYMBOL_GPL vmlinux 0x959edc1b	sysfs_get
+EXPORT_SYMBOL_GPL vmlinux 0x961a8cd3	unlock_policy_rwsem_read
+EXPORT_SYMBOL_GPL vmlinux 0x9621090c	inode_add_to_lists
+EXPORT_SYMBOL_GPL vmlinux 0x9635c963	ata_port_abort
+EXPORT_SYMBOL_GPL vmlinux 0x966d8ebb	ata_sff_exec_command
+EXPORT_SYMBOL_GPL vmlinux 0x967a3862	tracepoint_iter_stop
+EXPORT_SYMBOL_GPL vmlinux 0x96cbcf31	pm_qos_add_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x9712e130	ring_buffer_record_enable
+EXPORT_SYMBOL_GPL vmlinux 0x974fa6bf	blkdev_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x975c56a3	devres_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x97982542	hrtimer_start_range_ns
+EXPORT_SYMBOL_GPL vmlinux 0x979fc0c2	disk_part_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0x97b47546	usb_buffer_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x97c68536	spi_setup
+EXPORT_SYMBOL_GPL vmlinux 0x97d639cf	kick_process
+EXPORT_SYMBOL_GPL vmlinux 0x9833bc0c	hvc_kick
+EXPORT_SYMBOL_GPL vmlinux 0x986cf200	rtc_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x991437bd	inverse_translate
+EXPORT_SYMBOL_GPL vmlinux 0x991a36a6	find_get_pid
+EXPORT_SYMBOL_GPL vmlinux 0x9924c496	__usb_get_extra_descriptor
+EXPORT_SYMBOL_GPL vmlinux 0x994b1fa2	driver_attach
+EXPORT_SYMBOL_GPL vmlinux 0x9951d4ca	sysfs_notify
+EXPORT_SYMBOL_GPL vmlinux 0x995d1071	prof_on
+EXPORT_SYMBOL_GPL vmlinux 0x99724e88	i2c_unregister_device
+EXPORT_SYMBOL_GPL vmlinux 0x9984c858	usb_unpoison_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0x99926558	shash_attr_alg
+EXPORT_SYMBOL_GPL vmlinux 0x99c3775c	kmap_atomic_pfn
+EXPORT_SYMBOL_GPL vmlinux 0x9a11a0fc	crypto_attr_alg_name
+EXPORT_SYMBOL_GPL vmlinux 0x9a1444dc	transport_destroy_device
+EXPORT_SYMBOL_GPL vmlinux 0x9a8dcf86	debugfs_create_x16
+EXPORT_SYMBOL_GPL vmlinux 0x9a95d243	attribute_container_find_class_device
+EXPORT_SYMBOL_GPL vmlinux 0x9a976b3e	ata_bmdma_stop
+EXPORT_SYMBOL_GPL vmlinux 0x9ab0a6c5	sysfs_notify_dirent
+EXPORT_SYMBOL_GPL vmlinux 0x9aba690e	proc_net_fops_create
+EXPORT_SYMBOL_GPL vmlinux 0x9af74ab5	usb_buffer_free
+EXPORT_SYMBOL_GPL vmlinux 0x9afdae95	usb_get_urb
+EXPORT_SYMBOL_GPL vmlinux 0x9b2d12da	root_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x9b31d285	sysdev_register
+EXPORT_SYMBOL_GPL vmlinux 0x9b358a36	inotify_rm_wd
+EXPORT_SYMBOL_GPL vmlinux 0x9b3d0e63	pci_hp_change_slot_info
+EXPORT_SYMBOL_GPL vmlinux 0x9b57555a	ring_buffer_commit_overrun_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x9b8b3e51	acpi_processor_ffh_cstate_probe
+EXPORT_SYMBOL_GPL vmlinux 0x9ba0501e	unregister_vt_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x9bab1cf0	power_supply_set_battery_charged
+EXPORT_SYMBOL_GPL vmlinux 0x9bbc1603	vfs_removexattr
+EXPORT_SYMBOL_GPL vmlinux 0x9bc8c8a7	cpufreq_frequency_table_target
+EXPORT_SYMBOL_GPL vmlinux 0x9c0709bb	ata_scsi_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x9c23bf9b	fib_rules_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x9c33d049	pci_create_slot
+EXPORT_SYMBOL_GPL vmlinux 0x9c77a1a3	da903x_clr_bits
+EXPORT_SYMBOL_GPL vmlinux 0x9cb8037b	xfrm_count_enc_supported
+EXPORT_SYMBOL_GPL vmlinux 0x9d030b99	stop_machine
+EXPORT_SYMBOL_GPL vmlinux 0x9d2b6a58	hpet_register_irq_handler
+EXPORT_SYMBOL_GPL vmlinux 0x9d308c4d	hrtimer_try_to_cancel
+EXPORT_SYMBOL_GPL vmlinux 0x9d675b0b	pci_ioremap_bar
+EXPORT_SYMBOL_GPL vmlinux 0x9d85691a	generic_drop_inode
+EXPORT_SYMBOL_GPL vmlinux 0x9d89fb1b	ring_buffer_record_enable_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x9dd79c10	tcp_register_congestion_control
+EXPORT_SYMBOL_GPL vmlinux 0x9e01f6d4	eventfd_signal
+EXPORT_SYMBOL_GPL vmlinux 0x9e5be71a	ahash_free_instance
+EXPORT_SYMBOL_GPL vmlinux 0x9e711ad2	pm_qos_requirement
+EXPORT_SYMBOL_GPL vmlinux 0x9e98311a	ata_bmdma_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x9ebff902	start_thread
+EXPORT_SYMBOL_GPL vmlinux 0x9ec20b9c	sysfs_remove_file_from_group
+EXPORT_SYMBOL_GPL vmlinux 0x9ec99268	inotify_find_update_watch
+EXPORT_SYMBOL_GPL vmlinux 0x9edf10f8	get_device
+EXPORT_SYMBOL_GPL vmlinux 0x9ee020fc	dm_rh_flush
+EXPORT_SYMBOL_GPL vmlinux 0x9eff714c	usb_mon_register
+EXPORT_SYMBOL_GPL vmlinux 0x9f177553	tcp_cong_avoid_ai
+EXPORT_SYMBOL_GPL vmlinux 0x9f40a6d6	async_synchronize_full_domain
+EXPORT_SYMBOL_GPL vmlinux 0x9f6399fe	usb_hcd_pci_probe
+EXPORT_SYMBOL_GPL vmlinux 0x9f7192a2	class_interface_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x9f85ed90	klist_remove
+EXPORT_SYMBOL_GPL vmlinux 0x9fce80db	fb_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xa0255440	net_ipv4_ctl_path
+EXPORT_SYMBOL_GPL vmlinux 0xa09caa0c	mmu_notifier_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xa18f3d5c	iounmap_atomic
+EXPORT_SYMBOL_GPL vmlinux 0xa1a9c957	pci_set_pcie_reset_state
+EXPORT_SYMBOL_GPL vmlinux 0xa1d692d3	tty_put_char
+EXPORT_SYMBOL_GPL vmlinux 0xa25a3d95	__pm_runtime_set_status
+EXPORT_SYMBOL_GPL vmlinux 0xa27150b4	ata_sas_port_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xa28d8527	usb_poison_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0xa2e2c80a	sdio_f0_writeb
+EXPORT_SYMBOL_GPL vmlinux 0xa2e67f08	acpi_bus_generate_proc_event4
+EXPORT_SYMBOL_GPL vmlinux 0xa2f71244	sysdev_driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xa2fdcc18	blk_update_request
+EXPORT_SYMBOL_GPL vmlinux 0xa343d178	ata_sff_softreset
+EXPORT_SYMBOL_GPL vmlinux 0xa39d9271	sdio_readw
+EXPORT_SYMBOL_GPL vmlinux 0xa4035e73	sata_pmp_error_handler
+EXPORT_SYMBOL_GPL vmlinux 0xa40a8590	input_event_to_user
+EXPORT_SYMBOL_GPL vmlinux 0xa431ef33	uhci_check_and_reset_hc
+EXPORT_SYMBOL_GPL vmlinux 0xa43e20fc	regulator_get_voltage
+EXPORT_SYMBOL_GPL vmlinux 0xa452c297	hpet_mask_rtc_irq_bit
+EXPORT_SYMBOL_GPL vmlinux 0xa4669983	fuse_do_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xa47304b6	crypto_alloc_aead
+EXPORT_SYMBOL_GPL vmlinux 0xa48022c3	raw_seq_open
+EXPORT_SYMBOL_GPL vmlinux 0xa4d559b5	ahash_attr_alg
+EXPORT_SYMBOL_GPL vmlinux 0xa4eb0a6d	skb_partial_csum_set
+EXPORT_SYMBOL_GPL vmlinux 0xa4ffb99f	xfrm_audit_state_notfound_simple
+EXPORT_SYMBOL_GPL vmlinux 0xa5a66c57	crypto_attr_alg2
+EXPORT_SYMBOL_GPL vmlinux 0xa5b82ace	usb_reset_endpoint
+EXPORT_SYMBOL_GPL vmlinux 0xa5bf5c3e	pm_qos_add_requirement
+EXPORT_SYMBOL_GPL vmlinux 0xa5c36cec	inotify_unmount_inodes
+EXPORT_SYMBOL_GPL vmlinux 0xa5d84518	usb_unanchor_urb
+EXPORT_SYMBOL_GPL vmlinux 0xa5efbf4c	async_synchronize_full
+EXPORT_SYMBOL_GPL vmlinux 0xa607d6ea	regulator_get
+EXPORT_SYMBOL_GPL vmlinux 0xa618a79b	inet_hashinfo_init
+EXPORT_SYMBOL_GPL vmlinux 0xa6329275	pci_unblock_user_cfg_access
+EXPORT_SYMBOL_GPL vmlinux 0xa649959e	platform_device_del
+EXPORT_SYMBOL_GPL vmlinux 0xa66ca854	class_dev_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0xa68381e6	driver_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xa6b0aac5	usb_control_msg
+EXPORT_SYMBOL_GPL vmlinux 0xa6d8d24c	user_describe
+EXPORT_SYMBOL_GPL vmlinux 0xa6de57a4	set_task_ioprio
+EXPORT_SYMBOL_GPL vmlinux 0xa6f98da2	skb_morph
+EXPORT_SYMBOL_GPL vmlinux 0xa71f4f03	inotify_inode_is_dead
+EXPORT_SYMBOL_GPL vmlinux 0xa762d9d5	ata_cable_sata
+EXPORT_SYMBOL_GPL vmlinux 0xa793dc5e	usb_hcd_poll_rh_status
+EXPORT_SYMBOL_GPL vmlinux 0xa7b8b81e	dm_rh_stop_recovery
+EXPORT_SYMBOL_GPL vmlinux 0xa7c1a1af	ata_noop_qc_prep
+EXPORT_SYMBOL_GPL vmlinux 0xa7e1e2a1	bus_rescan_devices
+EXPORT_SYMBOL_GPL vmlinux 0xa8027a41	skb_tstamp_tx
+EXPORT_SYMBOL_GPL vmlinux 0xa81bb815	device_schedule_callback_owner
+EXPORT_SYMBOL_GPL vmlinux 0xa86698f4	inet_twsk_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xa8f59416	gpio_direction_output
+EXPORT_SYMBOL_GPL vmlinux 0xa90d5ae3	__inet_lookup_listener
+EXPORT_SYMBOL_GPL vmlinux 0xa9126bff	hpet_set_rtc_irq_bit
+EXPORT_SYMBOL_GPL vmlinux 0xa93b79a2	pciserial_resume_ports
+EXPORT_SYMBOL_GPL vmlinux 0xa967ae59	ata_bmdma32_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0xa9985a45	__lock_page_killable
+EXPORT_SYMBOL_GPL vmlinux 0xa9b7afd8	wmi_set_block
+EXPORT_SYMBOL_GPL vmlinux 0xa9c530b8	unregister_oom_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xa9f46f18	inet_csk_listen_stop
+EXPORT_SYMBOL_GPL vmlinux 0xaa0648e5	ring_buffer_consume
+EXPORT_SYMBOL_GPL vmlinux 0xaa0ed2d3	find_module
+EXPORT_SYMBOL_GPL vmlinux 0xaa2a72bf	__iowrite64_copy
+EXPORT_SYMBOL_GPL vmlinux 0xaa3e3aea	__i2c_board_lock
+EXPORT_SYMBOL_GPL vmlinux 0xaa5310f9	__tracepoint_napi_poll
+EXPORT_SYMBOL_GPL vmlinux 0xaa558d22	sysfs_create_link
+EXPORT_SYMBOL_GPL vmlinux 0xaa8c4696	cpu_clock
+EXPORT_SYMBOL_GPL vmlinux 0xaab1efaf	scsi_nl_add_driver
+EXPORT_SYMBOL_GPL vmlinux 0xaaddf6ca	blocking_notifier_chain_cond_register
+EXPORT_SYMBOL_GPL vmlinux 0xaae4cc7a	tcp_get_info
+EXPORT_SYMBOL_GPL vmlinux 0xab0c126d	tty_prepare_flip_string
+EXPORT_SYMBOL_GPL vmlinux 0xab410444	bus_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0xab41bd91	led_trigger_remove
+EXPORT_SYMBOL_GPL vmlinux 0xab57e311	tracepoint_probe_register
+EXPORT_SYMBOL_GPL vmlinux 0xab5d7a0e	rtc_read_time
+EXPORT_SYMBOL_GPL vmlinux 0xab7524ee	scsi_target_unblock
+EXPORT_SYMBOL_GPL vmlinux 0xabbc167b	input_ff_event
+EXPORT_SYMBOL_GPL vmlinux 0xac0f4e39	do_kern_mount
+EXPORT_SYMBOL_GPL vmlinux 0xac44edc7	fuse_get_req
+EXPORT_SYMBOL_GPL vmlinux 0xacafa8e7	vector_used_by_percpu_irq
+EXPORT_SYMBOL_GPL vmlinux 0xacc19485	ibft_addr
+EXPORT_SYMBOL_GPL vmlinux 0xacc8b52e	driver_find_device
+EXPORT_SYMBOL_GPL vmlinux 0xace5c0fc	usb_bus_list
+EXPORT_SYMBOL_GPL vmlinux 0xacfd01a6	dm_rh_mark_nosync
+EXPORT_SYMBOL_GPL vmlinux 0xad010128	crypto_ahash_setkey
+EXPORT_SYMBOL_GPL vmlinux 0xad13f8d3	__trace_note_message
+EXPORT_SYMBOL_GPL vmlinux 0xad35918f	cleanup_srcu_struct
+EXPORT_SYMBOL_GPL vmlinux 0xad3ba9f0	class_dev_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0xadbc3638	bus_get_device_klist
+EXPORT_SYMBOL_GPL vmlinux 0xadfb8894	md_allow_write
+EXPORT_SYMBOL_GPL vmlinux 0xae0c87ee	pm_qos_remove_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xae4d2cb5	ata_sff_wait_after_reset
+EXPORT_SYMBOL_GPL vmlinux 0xae628161	ata_sff_check_status
+EXPORT_SYMBOL_GPL vmlinux 0xae8c3814	sdio_disable_func
+EXPORT_SYMBOL_GPL vmlinux 0xaed5bfb7	ata_port_freeze
+EXPORT_SYMBOL_GPL vmlinux 0xaede7335	cpci_hp_register_controller
+EXPORT_SYMBOL_GPL vmlinux 0xaef0cf22	aead_geniv_init
+EXPORT_SYMBOL_GPL vmlinux 0xaf3f6fe0	ata_sff_interrupt
+EXPORT_SYMBOL_GPL vmlinux 0xaf5297bd	usb_hcd_resume_root_hub
+EXPORT_SYMBOL_GPL vmlinux 0xaf6bfb85	ata_sff_tf_read
+EXPORT_SYMBOL_GPL vmlinux 0xaf847bc5	scsi_nl_add_transport
+EXPORT_SYMBOL_GPL vmlinux 0xaf88a345	pm_runtime_suspend
+EXPORT_SYMBOL_GPL vmlinux 0xafbecb65	register_net_sysctl_table
+EXPORT_SYMBOL_GPL vmlinux 0xafc7c996	usb_unlink_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0xafcbf965	usb_hc_died
+EXPORT_SYMBOL_GPL vmlinux 0xb0223109	klist_next
+EXPORT_SYMBOL_GPL vmlinux 0xb02337ba	pci_block_user_cfg_access
+EXPORT_SYMBOL_GPL vmlinux 0xb073f384	ata_port_desc
+EXPORT_SYMBOL_GPL vmlinux 0xb0910dbf	raw_seq_stop
+EXPORT_SYMBOL_GPL vmlinux 0xb0995896	crypto_alloc_tfm
+EXPORT_SYMBOL_GPL vmlinux 0xb0aa812e	fips_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xb0bdba5f	shash_ahash_digest
+EXPORT_SYMBOL_GPL vmlinux 0xb0eedea9	usb_wait_anchor_empty_timeout
+EXPORT_SYMBOL_GPL vmlinux 0xb1010141	sata_link_hardreset
+EXPORT_SYMBOL_GPL vmlinux 0xb10d55bc	cn_netlink_send
+EXPORT_SYMBOL_GPL vmlinux 0xb16e5ee6	ata_sff_dev_select
+EXPORT_SYMBOL_GPL vmlinux 0xb18429eb	suspend_device_irqs
+EXPORT_SYMBOL_GPL vmlinux 0xb18506b9	smp_ops
+EXPORT_SYMBOL_GPL vmlinux 0xb1acbcce	rcu_barrier_sched
+EXPORT_SYMBOL_GPL vmlinux 0xb20c49dc	get_current_tty
+EXPORT_SYMBOL_GPL vmlinux 0xb2503ad1	__blkdev_driver_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xb3214432	pid_vnr
+EXPORT_SYMBOL_GPL vmlinux 0xb3253ed9	hpet_rtc_timer_init
+EXPORT_SYMBOL_GPL vmlinux 0xb33daeff	dm_get_rq_mapinfo
+EXPORT_SYMBOL_GPL vmlinux 0xb3990e03	crypto_shash_update
+EXPORT_SYMBOL_GPL vmlinux 0xb3ae8971	dma_wait_for_async_tx
+EXPORT_SYMBOL_GPL vmlinux 0xb3f94309	sata_link_debounce
+EXPORT_SYMBOL_GPL vmlinux 0xb40b27d1	dm_rh_update_states
+EXPORT_SYMBOL_GPL vmlinux 0xb42402d6	ata_sff_host_intr
+EXPORT_SYMBOL_GPL vmlinux 0xb44af816	rt_mutex_timed_lock
+EXPORT_SYMBOL_GPL vmlinux 0xb454d448	__pm_runtime_get
+EXPORT_SYMBOL_GPL vmlinux 0xb46d8bc5	crypto_grab_aead
+EXPORT_SYMBOL_GPL vmlinux 0xb4ad702d	dm_rh_dec
+EXPORT_SYMBOL_GPL vmlinux 0xb4ea7cf7	kgdb_connected
+EXPORT_SYMBOL_GPL vmlinux 0xb4ef0d32	sysdev_show_ulong
+EXPORT_SYMBOL_GPL vmlinux 0xb4f8efe5	ata_sff_error_handler
+EXPORT_SYMBOL_GPL vmlinux 0xb51fbd64	edac_op_state
+EXPORT_SYMBOL_GPL vmlinux 0xb53ae573	cpu_idle_wait
+EXPORT_SYMBOL_GPL vmlinux 0xb54f9fbd	driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xb58dcfa2	synchronize_sched_expedited
+EXPORT_SYMBOL_GPL vmlinux 0xb5a6ebe2	wmi_remove_notify_handler
+EXPORT_SYMBOL_GPL vmlinux 0xb5cc2703	tty_ldisc_flush
+EXPORT_SYMBOL_GPL vmlinux 0xb5d744ef	usb_buffer_map_sg
+EXPORT_SYMBOL_GPL vmlinux 0xb5d8913d	register_jprobe
+EXPORT_SYMBOL_GPL vmlinux 0xb6031625	seq_release_net
+EXPORT_SYMBOL_GPL vmlinux 0xb609c191	tty_find_polling_driver
+EXPORT_SYMBOL_GPL vmlinux 0xb626a4a9	kernel_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xb65091b3	selinux_secmark_refcount_dec
+EXPORT_SYMBOL_GPL vmlinux 0xb6656830	usb_driver_claim_interface
+EXPORT_SYMBOL_GPL vmlinux 0xb66eb1a1	crypto_spawn_tfm2
+EXPORT_SYMBOL_GPL vmlinux 0xb6aeb661	ata_id_c_string
+EXPORT_SYMBOL_GPL vmlinux 0xb6b99c39	sata_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0xb718f2f9	sfi_table_parse
+EXPORT_SYMBOL_GPL vmlinux 0xb72061e7	scsi_internal_device_block
+EXPORT_SYMBOL_GPL vmlinux 0xb744fa43	xfrm_ealg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0xb75cef7a	macvlan_handle_frame_hook
+EXPORT_SYMBOL_GPL vmlinux 0xb7d7c12e	hpet_set_alarm_time
+EXPORT_SYMBOL_GPL vmlinux 0xb7db42b0	sysfs_create_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0xb7e2eb91	mce_cpu_specific_poll
+EXPORT_SYMBOL_GPL vmlinux 0xb7fdd0df	eventfd_ctx_put
+EXPORT_SYMBOL_GPL vmlinux 0xb8465067	fb_bl_default_curve
+EXPORT_SYMBOL_GPL vmlinux 0xb84e4c47	iomap_free
+EXPORT_SYMBOL_GPL vmlinux 0xb8857caf	class_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xb8de734f	mm_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xb90045b4	device_add
+EXPORT_SYMBOL_GPL vmlinux 0xb94e7f29	rtc_set_time
+EXPORT_SYMBOL_GPL vmlinux 0xb956f9f3	bus_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xb970c4fb	usb_put_hcd
+EXPORT_SYMBOL_GPL vmlinux 0xb97d43a5	pci_bus_max_busnr
+EXPORT_SYMBOL_GPL vmlinux 0xb98be177	srcu_batches_completed
+EXPORT_SYMBOL_GPL vmlinux 0xb9db776c	pm_request_resume
+EXPORT_SYMBOL_GPL vmlinux 0xb9eb3aa9	add_uevent_var
+EXPORT_SYMBOL_GPL vmlinux 0xb9f9005f	__module_address
+EXPORT_SYMBOL_GPL vmlinux 0xba690e41	transport_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xbaa52d5d	led_trigger_show
+EXPORT_SYMBOL_GPL vmlinux 0xbae34c27	scsi_nl_remove_transport
+EXPORT_SYMBOL_GPL vmlinux 0xbaf69fa4	do_add_mount
+EXPORT_SYMBOL_GPL vmlinux 0xbafc89e8	regulator_force_disable
+EXPORT_SYMBOL_GPL vmlinux 0xbb1bdd46	page_cache_sync_readahead
+EXPORT_SYMBOL_GPL vmlinux 0xbb1d2db4	crypto_nivaead_type
+EXPORT_SYMBOL_GPL vmlinux 0xbb1e85ea	bus_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xbb4a1408	klist_init
+EXPORT_SYMBOL_GPL vmlinux 0xbbb98859	edid_info
+EXPORT_SYMBOL_GPL vmlinux 0xbcb33785	crypto_register_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0xbcb7c376	dma_run_dependencies
+EXPORT_SYMBOL_GPL vmlinux 0xbcfdcf35	platform_device_register
+EXPORT_SYMBOL_GPL vmlinux 0xbd506a46	unregister_hotplug_dock_device
+EXPORT_SYMBOL_GPL vmlinux 0xbd8c740b	fuse_file_poll
+EXPORT_SYMBOL_GPL vmlinux 0xbdacd6a8	devm_kfree
+EXPORT_SYMBOL_GPL vmlinux 0xbdd295f0	trace_vprintk
+EXPORT_SYMBOL_GPL vmlinux 0xbdeb19ad	ata_timing_compute
+EXPORT_SYMBOL_GPL vmlinux 0xbe0303d6	screen_glyph
+EXPORT_SYMBOL_GPL vmlinux 0xbe116723	do_posix_clock_nosettime
+EXPORT_SYMBOL_GPL vmlinux 0xbe1887e4	ata_unpack_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0xbe584033	spi_sync
+EXPORT_SYMBOL_GPL vmlinux 0xbe70ca2b	regulator_set_optimum_mode
+EXPORT_SYMBOL_GPL vmlinux 0xbe73a867	usb_hcd_pci_remove
+EXPORT_SYMBOL_GPL vmlinux 0xbeac013d	da903x_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xbee27ccb	uhci_reset_hc
+EXPORT_SYMBOL_GPL vmlinux 0xbee6b3d9	crypto_mod_get
+EXPORT_SYMBOL_GPL vmlinux 0xbee787ef	ata_sff_lost_interrupt
+EXPORT_SYMBOL_GPL vmlinux 0xbefb2fc8	usb_set_interface
+EXPORT_SYMBOL_GPL vmlinux 0xbf4dd86f	usb_hcd_link_urb_to_ep
+EXPORT_SYMBOL_GPL vmlinux 0xbf991722	platform_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xbfad5222	pci_test_config_bits
+EXPORT_SYMBOL_GPL vmlinux 0xbfd3e92b	relay_flush
+EXPORT_SYMBOL_GPL vmlinux 0xc0077e62	scsi_internal_device_unblock
+EXPORT_SYMBOL_GPL vmlinux 0xc0334e13	ata_host_init
+EXPORT_SYMBOL_GPL vmlinux 0xc0ede805	ata_link_abort
+EXPORT_SYMBOL_GPL vmlinux 0xc1008c71	pci_hp_deregister
+EXPORT_SYMBOL_GPL vmlinux 0xc1139676	led_trigger_set_default
+EXPORT_SYMBOL_GPL vmlinux 0xc126e890	klist_del
+EXPORT_SYMBOL_GPL vmlinux 0xc12f7e0d	trace_profile_buf_nmi
+EXPORT_SYMBOL_GPL vmlinux 0xc15f03dd	init_dummy_netdev
+EXPORT_SYMBOL_GPL vmlinux 0xc17515d7	usb_hcds_loaded
+EXPORT_SYMBOL_GPL vmlinux 0xc1c7e498	pm_request_idle
+EXPORT_SYMBOL_GPL vmlinux 0xc1d9d438	scsi_target_block
+EXPORT_SYMBOL_GPL vmlinux 0xc22a3091	vm_unmap_aliases
+EXPORT_SYMBOL_GPL vmlinux 0xc24403bd	sysdev_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0xc309da55	shash_ahash_update
+EXPORT_SYMBOL_GPL vmlinux 0xc3301f02	rcu_expedited_torture_stats
+EXPORT_SYMBOL_GPL vmlinux 0xc34efe27	snmp_fold_field
+EXPORT_SYMBOL_GPL vmlinux 0xc392ea84	ata_sff_data_xfer32
+EXPORT_SYMBOL_GPL vmlinux 0xc399468f	scsi_nl_remove_driver
+EXPORT_SYMBOL_GPL vmlinux 0xc3d3dca2	ata_cable_unknown
+EXPORT_SYMBOL_GPL vmlinux 0xc428068d	sata_deb_timing_long
+EXPORT_SYMBOL_GPL vmlinux 0xc48b7ccf	ata_mode_string
+EXPORT_SYMBOL_GPL vmlinux 0xc4959a9e	hvc_instantiate
+EXPORT_SYMBOL_GPL vmlinux 0xc4b33aa6	tracepoint_probe_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xc512626a	__supported_pte_mask
+EXPORT_SYMBOL_GPL vmlinux 0xc51b5f4d	transport_add_device
+EXPORT_SYMBOL_GPL vmlinux 0xc53a8ede	ring_buffer_reset_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xc5641de2	ata_port_start
+EXPORT_SYMBOL_GPL vmlinux 0xc58cdb60	lookup_address
+EXPORT_SYMBOL_GPL vmlinux 0xc5e2e9fd	dev_set_name
+EXPORT_SYMBOL_GPL vmlinux 0xc5e3dddf	wmi_get_event_data
+EXPORT_SYMBOL_GPL vmlinux 0xc605165a	ata_cable_40wire
+EXPORT_SYMBOL_GPL vmlinux 0xc60e9b20	ip6_local_out
+EXPORT_SYMBOL_GPL vmlinux 0xc60f75ec	__ftrace_vprintk
+EXPORT_SYMBOL_GPL vmlinux 0xc673e23e	ata_scsi_change_queue_depth
+EXPORT_SYMBOL_GPL vmlinux 0xc6ffa8bc	platform_driver_probe
+EXPORT_SYMBOL_GPL vmlinux 0xc7541e9c	regulator_put
+EXPORT_SYMBOL_GPL vmlinux 0xc7eba0a4	ata_pci_device_do_suspend
+EXPORT_SYMBOL_GPL vmlinux 0xc7ec11f6	atomic_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xc80ee048	pci_sriov_migration
+EXPORT_SYMBOL_GPL vmlinux 0xc822ea65	ata_sff_prereset
+EXPORT_SYMBOL_GPL vmlinux 0xc86564b1	dev_attr_em_message
+EXPORT_SYMBOL_GPL vmlinux 0xc87c1f84	ktime_get
+EXPORT_SYMBOL_GPL vmlinux 0xc87e487a	sched_clock_idle_sleep_event
+EXPORT_SYMBOL_GPL vmlinux 0xc8e329b3	__rtnl_link_register
+EXPORT_SYMBOL_GPL vmlinux 0xc9561772	fb_destroy_modelist
+EXPORT_SYMBOL_GPL vmlinux 0xc9beff42	usb_get_current_frame_number
+EXPORT_SYMBOL_GPL vmlinux 0xc9d4d6d1	wmi_has_guid
+EXPORT_SYMBOL_GPL vmlinux 0xc9e6ccdf	cpufreq_register_governor
+EXPORT_SYMBOL_GPL vmlinux 0xc9ec4e21	free_percpu
+EXPORT_SYMBOL_GPL vmlinux 0xca01f51c	tcp_orphan_count
+EXPORT_SYMBOL_GPL vmlinux 0xca4f9a34	blk_rq_err_bytes
+EXPORT_SYMBOL_GPL vmlinux 0xca5de565	crypto_init_spawn
+EXPORT_SYMBOL_GPL vmlinux 0xca85d8cf	tracepoint_probe_update_all
+EXPORT_SYMBOL_GPL vmlinux 0xca8eb935	devres_release_group
+EXPORT_SYMBOL_GPL vmlinux 0xcaa702bc	device_release_driver
+EXPORT_SYMBOL_GPL vmlinux 0xcabe04de	cpuidle_resume_and_unlock
+EXPORT_SYMBOL_GPL vmlinux 0xcb02579e	devres_find
+EXPORT_SYMBOL_GPL vmlinux 0xcb067cf3	blk_rq_prep_clone
+EXPORT_SYMBOL_GPL vmlinux 0xcb0fb700	xattr_getsecurity
+EXPORT_SYMBOL_GPL vmlinux 0xcb20b496	debugfs_create_blob
+EXPORT_SYMBOL_GPL vmlinux 0xcb280533	debugfs_create_bool
+EXPORT_SYMBOL_GPL vmlinux 0xcba265a6	bus_find_device
+EXPORT_SYMBOL_GPL vmlinux 0xcbd2239f	pci_renumber_slot
+EXPORT_SYMBOL_GPL vmlinux 0xcbf312a2	rtc_alarm_irq_enable
+EXPORT_SYMBOL_GPL vmlinux 0xcc1f1c3d	inet_twdr_hangman
+EXPORT_SYMBOL_GPL vmlinux 0xcc56166e	ata_eh_analyze_ncq_error
+EXPORT_SYMBOL_GPL vmlinux 0xcc6ab305	is_dock_device
+EXPORT_SYMBOL_GPL vmlinux 0xcc6bcb9a	inotify_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xcc86dc08	anon_inode_getfile
+EXPORT_SYMBOL_GPL vmlinux 0xcca9463c	sdev_evt_send_simple
+EXPORT_SYMBOL_GPL vmlinux 0xcccfb2fa	sata_deb_timing_hotplug
+EXPORT_SYMBOL_GPL vmlinux 0xcd132c85	device_remove_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0xcd2f83d3	power_supply_get_by_name
+EXPORT_SYMBOL_GPL vmlinux 0xcdca3691	nr_irqs
+EXPORT_SYMBOL_GPL vmlinux 0xcdedfd49	ata_pci_sff_init_host
+EXPORT_SYMBOL_GPL vmlinux 0xce118541	simple_attr_release
+EXPORT_SYMBOL_GPL vmlinux 0xce33b02c	bus_get_kset
+EXPORT_SYMBOL_GPL vmlinux 0xce3639d8	usb_put_intf
+EXPORT_SYMBOL_GPL vmlinux 0xce3fe9e2	regulator_disable
+EXPORT_SYMBOL_GPL vmlinux 0xcec3fef0	ring_buffer_iter_reset
+EXPORT_SYMBOL_GPL vmlinux 0xcf7a962e	cn_add_callback
+EXPORT_SYMBOL_GPL vmlinux 0xcf8a3942	relay_buf_full
+EXPORT_SYMBOL_GPL vmlinux 0xcf8af983	trace_profile_buf
+EXPORT_SYMBOL_GPL vmlinux 0xcf940808	securityfs_create_dir
+EXPORT_SYMBOL_GPL vmlinux 0xcfc68341	synchronize_rcu_bh
+EXPORT_SYMBOL_GPL vmlinux 0xcfcc83ad	register_vt_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xd009ae88	inet_twsk_purge
+EXPORT_SYMBOL_GPL vmlinux 0xd00e2547	ata_host_alloc_pinfo
+EXPORT_SYMBOL_GPL vmlinux 0xd03c7700	secure_ipv4_port_ephemeral
+EXPORT_SYMBOL_GPL vmlinux 0xd03d8679	crypto_init_spawn2
+EXPORT_SYMBOL_GPL vmlinux 0xd03fdcc0	hrtimer_start
+EXPORT_SYMBOL_GPL vmlinux 0xd0b6e807	fuse_request_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xd0c05159	emergency_restart
+EXPORT_SYMBOL_GPL vmlinux 0xd0cbc699	__rtnl_link_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xd1228235	fuse_conn_init
+EXPORT_SYMBOL_GPL vmlinux 0xd12ac59b	olpc_ec_cmd
+EXPORT_SYMBOL_GPL vmlinux 0xd137168a	driver_add_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xd1568727	dma_get_required_mask
+EXPORT_SYMBOL_GPL vmlinux 0xd16712f3	crypto_check_attr_type
+EXPORT_SYMBOL_GPL vmlinux 0xd180b6a2	queue_delayed_work_on
+EXPORT_SYMBOL_GPL vmlinux 0xd19bbcea	devres_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xd20e6e0a	ata_base_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0xd237546b	simple_attr_write
+EXPORT_SYMBOL_GPL vmlinux 0xd2589b58	inet_unhash
+EXPORT_SYMBOL_GPL vmlinux 0xd273b1b1	__round_jiffies_up_relative
+EXPORT_SYMBOL_GPL vmlinux 0xd2a36bf7	vfs_setlease
+EXPORT_SYMBOL_GPL vmlinux 0xd2a8caf0	work_on_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xd2e92c84	regulator_get_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0xd3070c6a	fuse_conn_kill
+EXPORT_SYMBOL_GPL vmlinux 0xd3c230b4	driver_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0xd3c5a8d3	sysdev_store_ulong
+EXPORT_SYMBOL_GPL vmlinux 0xd3d3bcdc	inotify_find_watch
+EXPORT_SYMBOL_GPL vmlinux 0xd4125c41	debugfs_create_x32
+EXPORT_SYMBOL_GPL vmlinux 0xd41b39dd	regulator_set_voltage
+EXPORT_SYMBOL_GPL vmlinux 0xd44b27c5	fuse_conn_get
+EXPORT_SYMBOL_GPL vmlinux 0xd46bfa3b	blk_queue_rq_timed_out
+EXPORT_SYMBOL_GPL vmlinux 0xd494ee54	speedstep_get_freqs
+EXPORT_SYMBOL_GPL vmlinux 0xd49f211c	device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xd49f5e68	pci_find_ht_capability
+EXPORT_SYMBOL_GPL vmlinux 0xd4bc169d	ata_host_start
+EXPORT_SYMBOL_GPL vmlinux 0xd4e17a47	crypto_givcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0xd4e4502c	blkdev_aio_write
+EXPORT_SYMBOL_GPL vmlinux 0xd5051eb7	anon_transport_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xd54c0071	dm_rh_recovery_start
+EXPORT_SYMBOL_GPL vmlinux 0xd5b89c2b	class_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xd62a6c06	dm_unregister_path_selector
+EXPORT_SYMBOL_GPL vmlinux 0xd6b3836e	pciserial_init_ports
+EXPORT_SYMBOL_GPL vmlinux 0xd705b4c7	schedule_hrtimeout
+EXPORT_SYMBOL_GPL vmlinux 0xd73ef534	sysdev_resume
+EXPORT_SYMBOL_GPL vmlinux 0xd757577f	sysdev_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xd768e985	regulator_has_full_constraints
+EXPORT_SYMBOL_GPL vmlinux 0xd7a4fe9c	xfrm_audit_state_notfound
+EXPORT_SYMBOL_GPL vmlinux 0xd7d79132	put_online_cpus
+EXPORT_SYMBOL_GPL vmlinux 0xd7e8796f	sync_page_io
+EXPORT_SYMBOL_GPL vmlinux 0xd80715b6	blk_trace_remove
+EXPORT_SYMBOL_GPL vmlinux 0xd83ebe05	pciserial_suspend_ports
+EXPORT_SYMBOL_GPL vmlinux 0xd859000f	xfrm_inner_extract_output
+EXPORT_SYMBOL_GPL vmlinux 0xd8699e12	dm_kill_unmapped_request
+EXPORT_SYMBOL_GPL vmlinux 0xd8873da1	ata_pio_queue_task
+EXPORT_SYMBOL_GPL vmlinux 0xd8bfdfc4	__scsi_get_command
+EXPORT_SYMBOL_GPL vmlinux 0xd8cd9404	dm_rh_region_to_sector
+EXPORT_SYMBOL_GPL vmlinux 0xd8ec5be4	pci_add_dynid
+EXPORT_SYMBOL_GPL vmlinux 0xd91d2ac7	usb_deregister_device_driver
+EXPORT_SYMBOL_GPL vmlinux 0xd91dbbe2	regulator_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xd9563d2d	__pm_runtime_disable
+EXPORT_SYMBOL_GPL vmlinux 0xd95dcd3a	inet_csk_bind_conflict
+EXPORT_SYMBOL_GPL vmlinux 0xd98e8ef9	register_posix_clock
+EXPORT_SYMBOL_GPL vmlinux 0xd9a10e71	tty_ldisc_ref
+EXPORT_SYMBOL_GPL vmlinux 0xd9a1a715	usb_sg_init
+EXPORT_SYMBOL_GPL vmlinux 0xd9b037de	handle_level_irq
+EXPORT_SYMBOL_GPL vmlinux 0xda1be8e1	async_synchronize_cookie_domain
+EXPORT_SYMBOL_GPL vmlinux 0xda1ef0ef	sock_prot_inuse_add
+EXPORT_SYMBOL_GPL vmlinux 0xda6aa81b	device_create_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0xda7bb8d4	ata_qc_complete
+EXPORT_SYMBOL_GPL vmlinux 0xda7ce6e7	crypto_alloc_ablkcipher
+EXPORT_SYMBOL_GPL vmlinux 0xdaa12152	tcp_is_cwnd_limited
+EXPORT_SYMBOL_GPL vmlinux 0xdaa61f0c	proc_net_mkdir
+EXPORT_SYMBOL_GPL vmlinux 0xdaed8100	__blk_put_request
+EXPORT_SYMBOL_GPL vmlinux 0xdaf4dfb3	fb_mode_option
+EXPORT_SYMBOL_GPL vmlinux 0xdafa0010	devm_kzalloc
+EXPORT_SYMBOL_GPL vmlinux 0xdb274e52	monotonic_to_bootbased
+EXPORT_SYMBOL_GPL vmlinux 0xdba64f1c	eventfd_ctx_get
+EXPORT_SYMBOL_GPL vmlinux 0xdbe469b0	pci_scan_child_bus
+EXPORT_SYMBOL_GPL vmlinux 0xdc0860ca	user_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xdc15007d	class_compat_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xdc3b33bd	mce_chrdev_ops
+EXPORT_SYMBOL_GPL vmlinux 0xdc3bc370	devres_open_group
+EXPORT_SYMBOL_GPL vmlinux 0xdc5eff0e	scsi_nl_sock
+EXPORT_SYMBOL_GPL vmlinux 0xdc714560	register_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0xdc7c5ef7	sysdev_class_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xdc97a1f4	ata_acpi_gtm_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0xdd162a5b	sata_pmp_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0xdd20e6a7	rtc_set_alarm
+EXPORT_SYMBOL_GPL vmlinux 0xdd51c5b0	mnt_clone_write
+EXPORT_SYMBOL_GPL vmlinux 0xddd29aea	usb_add_hcd
+EXPORT_SYMBOL_GPL vmlinux 0xddf5b55a	pci_stop_bus_device
+EXPORT_SYMBOL_GPL vmlinux 0xde417b81	async_schedule_domain
+EXPORT_SYMBOL_GPL vmlinux 0xde48df18	__cpufreq_driver_target
+EXPORT_SYMBOL_GPL vmlinux 0xde680cd6	sysfs_remove_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0xde785529	locks_release_private
+EXPORT_SYMBOL_GPL vmlinux 0xdec589d4	cpufreq_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0xdec824c7	regulator_set_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0xdef43d54	usb_bulk_msg
+EXPORT_SYMBOL_GPL vmlinux 0xdf07c390	crypto_shash_finup
+EXPORT_SYMBOL_GPL vmlinux 0xdf0c5997	kill_pid_info_as_uid
+EXPORT_SYMBOL_GPL vmlinux 0xdf335cda	acpi_bus_trim
+EXPORT_SYMBOL_GPL vmlinux 0xdf64fc23	usb_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0xdf800229	device_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0xdfa13ef4	bus_sort_breadthfirst
+EXPORT_SYMBOL_GPL vmlinux 0xdfafb983	per_cpu__gdt_page
+EXPORT_SYMBOL_GPL vmlinux 0xe01e609e	debugfs_create_size_t
+EXPORT_SYMBOL_GPL vmlinux 0xe0c77bb5	mce_notify_irq
+EXPORT_SYMBOL_GPL vmlinux 0xe0cca33e	xfrm_aead_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0xe0eefb95	page_mkclean
+EXPORT_SYMBOL_GPL vmlinux 0xe0f2d9e0	fuse_dev_operations
+EXPORT_SYMBOL_GPL vmlinux 0xe0f36f81	led_trigger_event
+EXPORT_SYMBOL_GPL vmlinux 0xe118f713	cpuidle_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0xe1412a97	vfs_cancel_lock
+EXPORT_SYMBOL_GPL vmlinux 0xe1b795b2	__cpufreq_driver_getavg
+EXPORT_SYMBOL_GPL vmlinux 0xe1d7ed1a	rtnl_link_register
+EXPORT_SYMBOL_GPL vmlinux 0xe1e1cecf	pci_disable_rom
+EXPORT_SYMBOL_GPL vmlinux 0xe20f6b0f	pciserial_remove_ports
+EXPORT_SYMBOL_GPL vmlinux 0xe2426710	wmi_evaluate_method
+EXPORT_SYMBOL_GPL vmlinux 0xe247343b	hrtimer_get_remaining
+EXPORT_SYMBOL_GPL vmlinux 0xe25c5976	srcu_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xe2671d12	usb_bus_list_lock
+EXPORT_SYMBOL_GPL vmlinux 0xe27551b7	driver_for_each_device
+EXPORT_SYMBOL_GPL vmlinux 0xe2888aad	crypto_larval_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xe28aa8f7	usb_reset_configuration
+EXPORT_SYMBOL_GPL vmlinux 0xe295c0ff	is_hpet_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xe33b26b5	queue_work
+EXPORT_SYMBOL_GPL vmlinux 0xe34c44ae	class_compat_create_link
+EXPORT_SYMBOL_GPL vmlinux 0xe49ff3b0	ata_wait_register
+EXPORT_SYMBOL_GPL vmlinux 0xe4a1b66b	platform_get_irq_byname
+EXPORT_SYMBOL_GPL vmlinux 0xe4c331b6	acpi_os_unmap_memory
+EXPORT_SYMBOL_GPL vmlinux 0xe513afc0	cache_k8_northbridges
+EXPORT_SYMBOL_GPL vmlinux 0xe530071c	pm_qos_remove_requirement
+EXPORT_SYMBOL_GPL vmlinux 0xe54cc6f0	fib_rules_cleanup_ops
+EXPORT_SYMBOL_GPL vmlinux 0xe5513bb0	dm_rh_recovery_in_flight
+EXPORT_SYMBOL_GPL vmlinux 0xe566144c	cpufreq_frequency_table_cpuinfo
+EXPORT_SYMBOL_GPL vmlinux 0xe56637b3	ring_buffer_overrun_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xe5fc818b	inet_csk_reqsk_queue_prune
+EXPORT_SYMBOL_GPL vmlinux 0xe60037dd	dev_change_net_namespace
+EXPORT_SYMBOL_GPL vmlinux 0xe61a6d2f	gpio_unexport
+EXPORT_SYMBOL_GPL vmlinux 0xe6488b47	cpufreq_notify_transition
+EXPORT_SYMBOL_GPL vmlinux 0xe651f76e	selinux_is_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xe65500c9	ring_buffer_record_disable
+EXPORT_SYMBOL_GPL vmlinux 0xe6b3565a	hvc_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xe6cc992e	regulator_get_init_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0xe7295650	sdio_claim_host
+EXPORT_SYMBOL_GPL vmlinux 0xe768b574	crypto_alg_mod_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xe7c8130d	bdi_writeout_inc
+EXPORT_SYMBOL_GPL vmlinux 0xe7ffe877	pcpu_base_addr
+EXPORT_SYMBOL_GPL vmlinux 0xe817ef08	crypto_alloc_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0xe8505280	usb_get_descriptor
+EXPORT_SYMBOL_GPL vmlinux 0xe862c4b7	dpm_suspend_start
+EXPORT_SYMBOL_GPL vmlinux 0xe8709bac	usb_queue_reset_device
+EXPORT_SYMBOL_GPL vmlinux 0xe8b80f96	inet6_csk_reqsk_queue_hash_add
+EXPORT_SYMBOL_GPL vmlinux 0xe8c2012e	fuse_put_request
+EXPORT_SYMBOL_GPL vmlinux 0xe8fcc4df	__root_device_register
+EXPORT_SYMBOL_GPL vmlinux 0xe901175f	__dev_addr_unsync
+EXPORT_SYMBOL_GPL vmlinux 0xe90c78c0	ata_pci_sff_activate_host
+EXPORT_SYMBOL_GPL vmlinux 0xe93e49c3	devres_free
+EXPORT_SYMBOL_GPL vmlinux 0xe94276ac	dm_dispatch_request
+EXPORT_SYMBOL_GPL vmlinux 0xe95065c3	dm_rh_get_region_key
+EXPORT_SYMBOL_GPL vmlinux 0xe9587909	usb_unregister_notify
+EXPORT_SYMBOL_GPL vmlinux 0xea065e01	task_handoff_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xea124bd1	gcd
+EXPORT_SYMBOL_GPL vmlinux 0xea418e0f	atapi_cmd_type
+EXPORT_SYMBOL_GPL vmlinux 0xea45e036	pci_restore_msi_state
+EXPORT_SYMBOL_GPL vmlinux 0xeaa2d895	isa_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0xeae74760	scsi_nl_send_transport_msg
+EXPORT_SYMBOL_GPL vmlinux 0xeb1d4249	debugfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xeb1f4c37	rt_mutex_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xeb1ff22e	cpuidle_unregister_device
+EXPORT_SYMBOL_GPL vmlinux 0xeb4863e7	ahash_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0xeb4c1fc8	__tracepoint_block_remap
+EXPORT_SYMBOL_GPL vmlinux 0xeb58fab0	gpiochip_is_requested
+EXPORT_SYMBOL_GPL vmlinux 0xeb84007c	crypto_alloc_instance
+EXPORT_SYMBOL_GPL vmlinux 0xebb12e35	relay_subbufs_consumed
+EXPORT_SYMBOL_GPL vmlinux 0xebc25366	inet6_csk_addr2sockaddr
+EXPORT_SYMBOL_GPL vmlinux 0xebcf95ef	led_trigger_set
+EXPORT_SYMBOL_GPL vmlinux 0xebe9282d	ring_buffer_free_read_page
+EXPORT_SYMBOL_GPL vmlinux 0xebfc7bc1	unregister_kretprobe
+EXPORT_SYMBOL_GPL vmlinux 0xec1a75a9	__dev_addr_sync
+EXPORT_SYMBOL_GPL vmlinux 0xec1b043e	regulator_suspend_prepare
+EXPORT_SYMBOL_GPL vmlinux 0xec67b1c1	filter_match_preds
+EXPORT_SYMBOL_GPL vmlinux 0xec69f839	securityfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xed09a363	__module_text_address
+EXPORT_SYMBOL_GPL vmlinux 0xed1a976f	i2c_add_numbered_adapter
+EXPORT_SYMBOL_GPL vmlinux 0xed4c82ab	usb_hcd_pci_shutdown
+EXPORT_SYMBOL_GPL vmlinux 0xed4fdc2c	sata_set_spd
+EXPORT_SYMBOL_GPL vmlinux 0xedae0965	__crypto_alloc_tfm
+EXPORT_SYMBOL_GPL vmlinux 0xedf3f1f1	do_machine_check
+EXPORT_SYMBOL_GPL vmlinux 0xee57da00	__inet_hash_nolisten
+EXPORT_SYMBOL_GPL vmlinux 0xee6c3fa1	ipv6_find_tlv
+EXPORT_SYMBOL_GPL vmlinux 0xef6c3f70	round_jiffies_up_relative
+EXPORT_SYMBOL_GPL vmlinux 0xefc69426	sata_scr_valid
+EXPORT_SYMBOL_GPL vmlinux 0xefceac63	dm_rh_start_recovery
+EXPORT_SYMBOL_GPL vmlinux 0xefdd5a63	ktime_get_ts
+EXPORT_SYMBOL_GPL vmlinux 0xefe21106	snmp_mib_init
+EXPORT_SYMBOL_GPL vmlinux 0xefef0909	register_kprobes
+EXPORT_SYMBOL_GPL vmlinux 0xeff98e6c	usb_driver_set_configuration
+EXPORT_SYMBOL_GPL vmlinux 0xf0150d63	generic_detach_inode
+EXPORT_SYMBOL_GPL vmlinux 0xf03b8475	rtc_class_close
+EXPORT_SYMBOL_GPL vmlinux 0xf052fdaf	usb_hcd_giveback_urb
+EXPORT_SYMBOL_GPL vmlinux 0xf0696401	acpi_pci_detect_ejectable
+EXPORT_SYMBOL_GPL vmlinux 0xf06c1cc7	unregister_timer_hook
+EXPORT_SYMBOL_GPL vmlinux 0xf0961dda	shash_free_instance
+EXPORT_SYMBOL_GPL vmlinux 0xf1039eb8	aead_geniv_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xf120c2d9	ring_buffer_normalize_time_stamp
+EXPORT_SYMBOL_GPL vmlinux 0xf1463412	execute_in_process_context
+EXPORT_SYMBOL_GPL vmlinux 0xf184d189	kernel_power_off
+EXPORT_SYMBOL_GPL vmlinux 0xf1b2b58f	blk_insert_cloned_request
+EXPORT_SYMBOL_GPL vmlinux 0xf1d7db3e	srcu_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xf20ead41	ata_scsi_simulate
+EXPORT_SYMBOL_GPL vmlinux 0xf213eac4	sata_std_hardreset
+EXPORT_SYMBOL_GPL vmlinux 0xf25779ae	fuse_dev_release
+EXPORT_SYMBOL_GPL vmlinux 0xf25f7c85	blk_queue_dma_drain
+EXPORT_SYMBOL_GPL vmlinux 0xf2910c52	device_move
+EXPORT_SYMBOL_GPL vmlinux 0xf2e58c70	rtnl_register
+EXPORT_SYMBOL_GPL vmlinux 0xf2fca922	uart_parse_options
+EXPORT_SYMBOL_GPL vmlinux 0xf3213901	inet6_hash_connect
+EXPORT_SYMBOL_GPL vmlinux 0xf34806ec	hrtimer_get_res
+EXPORT_SYMBOL_GPL vmlinux 0xf3c1c0a0	leds_list_lock
+EXPORT_SYMBOL_GPL vmlinux 0xf3d11c68	rdev_get_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0xf420a2b1	power_supply_changed
+EXPORT_SYMBOL_GPL vmlinux 0xf42e6911	nf_unregister_queue_handlers
+EXPORT_SYMBOL_GPL vmlinux 0xf44617f1	device_initialize
+EXPORT_SYMBOL_GPL vmlinux 0xf46bd814	ring_buffer_iter_empty
+EXPORT_SYMBOL_GPL vmlinux 0xf46ea0ef	ata_sas_scsi_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xf499fdb2	rcu_barrier_bh
+EXPORT_SYMBOL_GPL vmlinux 0xf50dfff5	ata_pci_sff_init_one
+EXPORT_SYMBOL_GPL vmlinux 0xf5139203	hrtimer_init_sleeper
+EXPORT_SYMBOL_GPL vmlinux 0xf5384ac1	__trace_printk
+EXPORT_SYMBOL_GPL vmlinux 0xf5388bd9	platform_driver_register
+EXPORT_SYMBOL_GPL vmlinux 0xf53ed33d	device_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xf54bd49b	lcm
+EXPORT_SYMBOL_GPL vmlinux 0xf553318d	cpuidle_pause_and_lock
+EXPORT_SYMBOL_GPL vmlinux 0xf5799f7a	stop_machine_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xf5944b96	__fsnotify_parent
+EXPORT_SYMBOL_GPL vmlinux 0xf5a691cd	invalidate_bh_lrus
+EXPORT_SYMBOL_GPL vmlinux 0xf68b689e	sata_link_resume
+EXPORT_SYMBOL_GPL vmlinux 0xf69897a4	usb_create_hcd
+EXPORT_SYMBOL_GPL vmlinux 0xf6bcbd73	hwrng_register
+EXPORT_SYMBOL_GPL vmlinux 0xf6e4f240	regulator_register
+EXPORT_SYMBOL_GPL vmlinux 0xf6e874f5	ata_timing_merge
+EXPORT_SYMBOL_GPL vmlinux 0xf71533ac	security_inode_create
+EXPORT_SYMBOL_GPL vmlinux 0xf717c381	cpuidle_disable_device
+EXPORT_SYMBOL_GPL vmlinux 0xf726f565	find_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0xf728ec96	ata_sas_queuecmd
+EXPORT_SYMBOL_GPL vmlinux 0xf7be406f	__get_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0xf863e82a	flush_work
+EXPORT_SYMBOL_GPL vmlinux 0xf873037a	ata_sff_tf_load
+EXPORT_SYMBOL_GPL vmlinux 0xf8802492	print_stack_trace
+EXPORT_SYMBOL_GPL vmlinux 0xf8c7dda4	key_type_user
+EXPORT_SYMBOL_GPL vmlinux 0xf8d5bf8e	dm_region_hash_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xf8f3a0fb	ata_ratelimit
+EXPORT_SYMBOL_GPL vmlinux 0xf945aa92	ata_slave_link_init
+EXPORT_SYMBOL_GPL vmlinux 0xf9765833	dmi_match
+EXPORT_SYMBOL_GPL vmlinux 0xf97666a0	set_memory_rw
+EXPORT_SYMBOL_GPL vmlinux 0xf98d0b73	dev_attr_sw_activity
+EXPORT_SYMBOL_GPL vmlinux 0xf9917123	ata_sff_port_start32
+EXPORT_SYMBOL_GPL vmlinux 0xf9945569	class_interface_register
+EXPORT_SYMBOL_GPL vmlinux 0xf9a054b5	__round_jiffies
+EXPORT_SYMBOL_GPL vmlinux 0xf9ca3160	ata_id_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0xf9f30107	ata_port_probe
+EXPORT_SYMBOL_GPL vmlinux 0xfa6a9962	blkcipher_walk_phys
+EXPORT_SYMBOL_GPL vmlinux 0xfa7763c1	pm_schedule_suspend
+EXPORT_SYMBOL_GPL vmlinux 0xfab0ce21	ata_host_activate
+EXPORT_SYMBOL_GPL vmlinux 0xfae28845	add_page_wait_queue
+EXPORT_SYMBOL_GPL vmlinux 0xfb072362	cpufreq_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0xfb2a3293	math_state_restore
+EXPORT_SYMBOL_GPL vmlinux 0xfb5d2b97	platform_add_devices
+EXPORT_SYMBOL_GPL vmlinux 0xfb69281a	kset_create_and_add
+EXPORT_SYMBOL_GPL vmlinux 0xfb6b9e3d	security_inode_mkdir
+EXPORT_SYMBOL_GPL vmlinux 0xfb8c9507	device_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xfbcaa663	crypto_tfm_in_queue
+EXPORT_SYMBOL_GPL vmlinux 0xfbf9be5d	register_oom_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xfc0ec634	vfs_kern_mount
+EXPORT_SYMBOL_GPL vmlinux 0xfcace499	srcu_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0xfcce8a14	transport_remove_device
+EXPORT_SYMBOL_GPL vmlinux 0xfce719ff	sysfs_chmod_file
+EXPORT_SYMBOL_GPL vmlinux 0xfce8f444	devres_add
+EXPORT_SYMBOL_GPL vmlinux 0xfceca382	shash_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0xfd02e89a	spi_new_device
+EXPORT_SYMBOL_GPL vmlinux 0xfd81d146	__inet_inherit_port
+EXPORT_SYMBOL_GPL vmlinux 0xfd94c60f	eventfd_fget
+EXPORT_SYMBOL_GPL vmlinux 0xfde0b92c	crypto_larval_error
+EXPORT_SYMBOL_GPL vmlinux 0xfe4d5872	kobject_uevent
+EXPORT_SYMBOL_GPL vmlinux 0xfe5955d1	rtnl_link_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xfe990052	gpio_free
+EXPORT_SYMBOL_GPL vmlinux 0xfeca33b5	unregister_net_sysctl_table
+EXPORT_SYMBOL_GPL vmlinux 0xfed11ed1	usb_mon_deregister
+EXPORT_SYMBOL_GPL vmlinux 0xfed9f853	task_active_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0xff271b4d	sata_pmp_qc_defer_cmd_switch
+EXPORT_SYMBOL_GPL vmlinux 0xff3b81e3	usb_clear_halt
+EXPORT_SYMBOL_GPL vmlinux 0xff5a8cfe	cn_del_callback
+EXPORT_SYMBOL_GPL vmlinux 0xffc503d2	spi_alloc_master
+EXPORT_UNUSED_SYMBOL vmlinux 0x00000000	simple_prepare_write
--- linux-mvl-dove-2.6.32.orig/debian.master/abi/2.6.32-34.73/i386/generic-pae.modules
+++ linux-mvl-dove-2.6.32/debian.master/abi/2.6.32-34.73/i386/generic-pae.modules
@@ -0,0 +1,2798 @@
+3c359
+3c501
+3c503
+3c505
+3c507
+3c509
+3c515
+3c523
+3c527
+3c574_cs
+3c589_cs
+3c59x
+3w-9xxx
+3w-xxxx
+53c700
+6pack
+8021q
+8139cp
+8139too
+8250_accent
+8250_boca
+8250_exar_st16c554
+8250_fourport
+8250_hub6
+8250_mca
+8255
+82596
+8390
+8390p
+9p
+9pnet
+9pnet_rdma
+9pnet_virtio
+a100u2w
+a3d
+aacraid
+ab3100
+ab3100-core
+ab3100-otp
+abituguru
+abituguru3
+abyss
+ac3200
+ac97_bus
+acecad
+acenic
+acerhdf
+acer-wmi
+acl7225b
+acpi_pad
+acpiphp
+acpiphp_ibm
+acquirewdt
+act2000
+act200l-sir
+act_gact
+act_ipt
+actisys-sir
+act_mirred
+act_nat
+act_pedit
+act_police
+act_simple
+act_skbedit
+ad1848
+ad7414
+ad7418
+ad7877
+ad7879
+adcxx
+addi_apci_035
+addi_apci_1032
+addi_apci_1500
+addi_apci_1516
+addi_apci_1564
+addi_apci_16xx
+addi_apci_2016
+addi_apci_2032
+addi_apci_2200
+addi_apci_3001
+addi_apci_3120
+addi_apci_3501
+addi_apci_3xxx
+adfs
+adi
+adl_pci6208
+adl_pci7296
+adl_pci7432
+adl_pci8164
+adl_pci9111
+adl_pci9118
+adm1021
+adm1025
+adm1026
+adm1029
+adm1031
+adm8211
+adm9240
+adp5588-keys
+adq12b
+ads7828
+ads7846
+adt7462
+adt7470
+adt7473
+adt7475
+adutux
+adv7170
+adv7175
+advansys
+advantechwdt
+adv_pci1710
+adv_pci1723
+adv_pci_dio
+aedsp16
+aes_generic
+aes-i586
+af_802154
+af9013
+affs
+af_key
+af-rxrpc
+agpgart
+ah4
+ah6
+aha152x
+aha152x_cs
+aha1542
+aha1740
+ahci
+aic79xx
+aic7xxx
+aic94xx
+aio_aio12_8
+aio_iiro_16
+aiptek
+aircable
+airo
+airo_cs
+alauda
+ali-agp
+ali-ircc
+alim1535_wdt
+alim7101_wdt
+alphatrack
+altpciechdma
+ambassador
+amd64-agp
+amd76x_edac
+amd76xrom
+amd8111e
+amd-k7-agp
+amd-rng
+amplc_dio200
+amplc_pc236
+amplc_pc263
+amplc_pci224
+amplc_pci230
+analog
+ansi_cprng
+anubis
+aoe
+apm
+appledisplay
+applesmc
+appletalk
+appletouch
+applicom
+ar7part
+ar9170usb
+arc4
+arcfb
+arcmsr
+arcnet
+arc-rawmode
+arc-rimi
+ark3116
+arkfb
+arlan
+arptable_filter
+arp_tables
+arpt_mangle
+asb100
+asix
+asus_atk0110
+asus-laptop
+asus_oled
+async_memcpy
+async_pq
+async_raid6_recov
+async_tx
+async_xor
+at1700
+at24
+at25
+at76c50x-usb
+aten
+ath
+ath5k
+ath9k
+ati-agp
+ati_remote
+ati_remote2
+atl1
+atl1c
+atl1e
+atl2
+atlas_btns
+atm
+atmel
+atmel_cs
+atmel_pci
+atmtcp
+atp
+atp870u
+atxp1
+aty128fb
+atyfb
+au0828
+au8522
+aufs
+authenc
+auth_rpcgss
+autofs
+autofs4
+av5100
+avma1_cs
+avm_cs
+avmfritz
+ax25
+axnet_cs
+b1
+b1dma
+b1isa
+b1pci
+b1pcmcia
+b2c2-flexcop
+b2c2-flexcop-pci
+b2c2-flexcop-usb
+b3dfg
+b43
+b43legacy
+b44
+bas_gigaset
+baycom_epp
+baycom_par
+baycom_ser_fdx
+baycom_ser_hdx
+bcm203x
+bcm3510
+bcm5974
+be2iscsi
+be2net
+befs
+belkin_sa
+berry_charge
+bfa
+bfs
+bfusb
+binfmt_aout
+binfmt_misc
+bitblit
+block2mtd
+blowfish
+bluecard_cs
+bluetooth
+bnep
+bnx2
+bnx2i
+bnx2x
+bonding
+bpa10x
+bpck
+bpck6
+bpqether
+bq24022
+bq27x00_battery
+br2684
+bridge
+broadsheetfb
+bsd_comp
+bt3c_cs
+bt819
+bt856
+bt866
+bt878
+btcx-risc
+btmrvl
+btmrvl_sdio
+btrfs
+btsdio
+bttv
+btuart_cs
+btusb
+budget
+budget-av
+budget-ci
+budget-core
+budget-patch
+BusLogic
+bw-qcam
+c101
+c2port-duramar2150
+c4
+c67x00
+c6xdigio
+cachefiles
+cafe_ccic
+cafe_nand
+camellia
+can
+can-bcm
+can-dev
+can-raw
+capi
+capidrv
+capifs
+capmode
+carminefb
+cassini
+cast5
+cast6
+catc
+cb710
+cb710-mmc
+cb_das16_cs
+cb_pcidas
+cb_pcidas64
+cb_pcidda
+cb_pcidio
+cb_pcimdas
+cb_pcimdda
+cciss
+ccm
+cdc-acm
+cdc_eem
+cdc_ether
+cdc-phonet
+cdc_subset
+cdc-wdm
+cfag12864b
+cfag12864bfb
+cfg80211
+cfi_cmdset_0001
+cfi_cmdset_0002
+cfi_cmdset_0020
+cfi_probe
+cfi_util
+ch
+ch341
+ch7006
+chipreg
+cifs
+cirrusfb
+ck804xrom
+clip
+cls_basic
+cls_flow
+cls_fw
+cls_route
+cls_rsvp
+cls_rsvp6
+cls_tcindex
+cls_u32
+cm109
+cm4000_cs
+cm4040_cs
+cmtp
+cnic
+cobra
+coda
+com20020
+com20020_cs
+com20020-isa
+com20020-pci
+com90io
+com90xx
+comedi
+comedi_bond
+comedi_fc
+comedi_parport
+comedi_test
+comm
+compal-laptop
+configfs
+contec_pci_dio
+core
+coretemp
+cosa
+cp210x
+cpcihp_generic
+cpcihp_zt5550
+cpia
+cpia2
+cpia_pp
+cpia_usb
+cpqarray
+cpqphp
+cpu5wdt
+cpuid
+c-qcam
+cramfs
+cr_bllcd
+crc32c
+crc32c-intel
+crc7
+crc-ccitt
+crc-itu-t
+crvml
+cryptd
+cryptoloop
+crypto_null
+cs5345
+cs53l32a
+cs5535_gpio
+cs553x_nand
+cs89x0
+ct82c710
+ctr
+cts
+cuse
+cx18
+cx22700
+cx22702
+cx231xx
+cx231xx-alsa
+cx231xx-dvb
+cx2341x
+cx23885
+cx24110
+cx24113
+cx24116
+cx24123
+cx25821
+cx25821-alsa
+cx25840
+cx8800
+cx8802
+cx88-alsa
+cx88-blackbird
+cx88-dvb
+cx88-vp3054-i2c
+cx88xx
+cxacru
+cxgb
+cxgb3
+cxgb3i
+cyber2000fb
+cyberjack
+cyclades
+cyclomx
+cycx_drv
+cypress_cy7c63
+cypress_m8
+cytherm
+da9030_battery
+da9034-ts
+da903x
+da903x_bl
+dabusb
+DAC960
+daqboard2000
+das08
+das08_cs
+das16
+das16m1
+das1800
+das6402
+das800
+db9
+dc395x
+dca
+dccp
+dccp_diag
+dccp_ipv4
+dccp_ipv6
+dccp_probe
+dcdbas
+de2104x
+de4x5
+de600
+de620
+decnet
+deflate
+defxx
+dell-laptop
+dell-led
+dell_rbu
+dell-wmi
+depca
+des_generic
+dib0070
+dib3000mb
+dib3000mc
+dib7000m
+dib7000p
+dib8000
+dibx000_common
+digi_acceleport
+diskonchip
+display
+divacapi
+divadidd
+diva_idi
+diva_mnt
+divas
+dlci
+dlm
+dm1105
+dm9601
+dm-crypt
+dme1737
+dmfe
+dmm32at
+dm-queue-length
+dm-raid45
+dm-service-time
+dmx3191d
+dm-zero
+dnet
+dn_rtmsg
+doc2000
+doc2001
+doc2001plus
+docecc
+docprobe
+donauboe
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+ds1621
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+dvb-core
+dvb-pll
+dvb-ttpci
+dvb-ttusb-budget
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+dvb-usb-a800
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+dvb-usb-af9015
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+dvb-usb-dib0700
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+dvb-usb-gp8psk
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+dvb-usb-ttusb2
+dvb-usb-umt-010
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+e100
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+e752x_edac
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+eata
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+ebtables
+ebt_among
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+ebt_arpreply
+ebt_dnat
+ebt_ip
+ebt_ip6
+ebt_limit
+ebt_log
+ebt_mark
+ebt_mark_m
+ebt_nflog
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+fnic
+font
+forcedeth
+fore_200e
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+ftdi-elan
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+gdth
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+generic_bl
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+gfs2
+ghash-generic
+gigaset
+girbil-sir
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+g_midi
+g_NCR5380
+g_NCR5380_mmio
+gpio-addr-flash
+gpio_keys
+gpio_mouse
+gpio_vbus
+g_printer
+grip
+grip_mp
+gsc_hpdi
+g_serial
+gspca_conex
+gspca_etoms
+gspca_finepix
+gspca_gl860
+gspca_jeilinj
+gspca_m5602
+gspca_main
+gspca_mars
+gspca_mr97310a
+gspca_ov519
+gspca_ov534
+gspca_pac207
+gspca_pac7311
+gspca_sn9c20x
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+gspca_sonixj
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+gspca_spca501
+gspca_spca505
+gspca_spca506
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+gspca_sq905c
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+gspca_vc032x
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+gtco
+guillemot
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+hangcheck-timer
+hci_uart
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+hdaps
+hdlc
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+hdlcdrv
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+hdlc_raw
+hdlc_raw_eth
+hdlc_x25
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+hexium_gemini
+hexium_orion
+hfc4s8s_l1
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+hfs
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+hp-plus
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+hp-wmi
+hso
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+htcpen
+hv_blkvsc
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+i1480-est
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+i2c-algo-bit
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+i2o_core
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+i2o_scsi
+i3000_edac
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+i5000_edac
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+ibmlana
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+idmouse
+idt77252
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+ip6table_mangle
+ip6table_raw
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+ip6table_security
+ip6t_ah
+ip6t_eui64
+ip6t_frag
+ip6t_hbh
+ip6t_ipv6header
+ip6t_LOG
+ip6t_mh
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+ip6t_rt
+ip6_tunnel
+ipaq
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+ipcomp6
+ipddp
+ipg
+ip_gre
+iphase
+ipip
+ipmi_devintf
+ipmi_msghandler
+ipmi_poweroff
+ipmi_si
+ipmi_watchdog
+ip_queue
+ipr
+ips
+iptable_filter
+iptable_mangle
+iptable_nat
+iptable_raw
+ip_tables
+iptable_security
+ipt_addrtype
+ipt_ah
+ipt_CLUSTERIP
+ipt_ecn
+ipt_ECN
+ipt_LOG
+ipt_MASQUERADE
+ipt_NETMAP
+ipt_REDIRECT
+ipt_REJECT
+ipt_ULOG
+ip_vs
+ip_vs_dh
+ip_vs_ftp
+ip_vs_lblc
+ip_vs_lblcr
+ip_vs_lc
+ip_vs_nq
+ip_vs_rr
+ip_vs_sed
+ip_vs_sh
+ip_vs_wlc
+ip_vs_wrr
+ipw
+ipw2100
+ipw2200
+ipwireless
+ipx
+ircomm
+ir-common
+ircomm-tty
+irda
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+ir-kbd-i2c
+irlan
+irnet
+irtty-sir
+ir-usb
+iscsi_ibft
+iscsi_tcp
+iscsi_trgt
+isdn
+isdn_bsdcomp
+isdnhdlc
+isight_firmware
+isl29003
+isl6405
+isl6421
+isl6423
+isofs
+isp116x-hcd
+isp1362-hcd
+isp1760
+istallion
+it87
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+it87_wdt
+iTCO_vendor_support
+iTCO_wdt
+itd1000
+iuu_phoenix
+ivtv
+ivtvfb
+iw_c2
+iw_cm
+iw_cxgb3
+iwl3945
+iwlagn
+iwlcore
+iwmc3200wifi
+ixgb
+ixgbe
+ixj
+ixj_pcmcia
+jedec_probe
+jffs2
+jfs
+jmb38x_ms
+jme
+joydev
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+jr3_pci
+jsm
+k8temp
+kafs
+kahlua
+kaweth
+kb3886_bl
+kbic
+kbtab
+kcomedilib
+ke_counter
+kernelcapi
+keyspan
+keyspan_pda
+keyspan_remote
+khazad
+kingsun-sir
+kl5kusb105
+kobil_sct
+konicawc
+ks0108
+ks0127
+ks8842
+ks8851
+ks8851_mll
+ks959-sir
+ksdazzle-sir
+ktti
+kvaser_pci
+kvm
+kvm-amd
+kvm-intel
+kxsd9
+kyrofb
+l1oip
+l2cap
+l440gx
+l64781
+lanai
+lance
+lanstreamer
+lapb
+lapbether
+lcd
+ldusb
+lec
+led-class
+leds-alix2
+leds-bd2802
+leds-da903x
+leds-dac124s085
+leds-gpio
+leds-lp3944
+leds-net48xx
+leds-pca9532
+leds-pca955x
+leds-wm831x-status
+leds-wm8350
+leds-wrap
+ledtrig-backlight
+ledtrig-default-on
+ledtrig-gpio
+ledtrig-heartbeat
+ledtrig-timer
+legousbtower
+lgdt3305
+lgdt330x
+lgs8gxx
+lib80211
+lib80211_crypt_ccmp
+lib80211_crypt_tkip
+lib80211_crypt_wep
+libcrc32c
+libertas
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+libertas_sdio
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+libertas_tf
+libertas_tf_usb
+libfc
+libfcoe
+libipw
+libiscsi
+libiscsi_tcp
+libosd
+libsas
+libsrp
+lightning
+line6usb
+linear
+lirc_atiusb
+lirc_bt829
+lirc_dev
+lirc_ene0100
+lirc_i2c
+lirc_igorplugusb
+lirc_imon
+lirc_it87
+lirc_ite8709
+lirc_mceusb
+lirc_sasem
+lirc_serial
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+lirc_ttusbir
+lis3l02dq
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+litelink-sir
+lkkbd
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+lm95241
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+lne390
+lockd
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+lp
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+lp486e
+lpddr_cmds
+lpfc
+lrw
+ltc4215
+ltc4245
+ltpc
+ltv350qv
+lxfb
+lzo
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+m25p80
+m52790
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+mac80211
+mac80211_hwsim
+machzwd
+macmodes
+macvlan
+madgemc
+magellan
+map_absent
+map_funcs
+map_ram
+map_rom
+matrix_keypad
+matroxfb_accel
+matroxfb_base
+matroxfb_crtc2
+matroxfb_DAC1064
+matroxfb_g450
+matroxfb_maven
+matroxfb_misc
+matroxfb_Ti3026
+matrox_w1
+max1111
+max1363
+max1586
+max1619
+max17040_battery
+max3100
+max6650
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+max7301
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+max7359_keypad
+mb862xxfb
+mbp_nvidia_bl
+mc13783
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+mc33880
+mc44s803
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+mce-xeon75xx
+mcp2120-sir
+mcp23s08
+mcs5000_ts
+mcs7780
+mcs7830
+mct_u232
+md4
+mdacon
+mdc800
+mdio
+me4000
+me_daq
+megaraid
+megaraid_mbox
+megaraid_mm
+megaraid_sas
+memstick
+metronomefb
+meye
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+mga
+michael_mic
+microcode
+microtek
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+minix
+mISDN_core
+mISDN_dsp
+mISDNinfineon
+mISDNipac
+mISDNisar
+mite
+mixcomwd
+mk712
+mkiss
+mlx4_core
+mlx4_en
+mlx4_ib
+mmc_block
+mos7720
+mos7840
+moto_modem
+moxa
+mpc624
+mpoa
+mpt2sas
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+mptctl
+mptfc
+mptlan
+mptsas
+mptscsih
+mptspi
+mpu401
+msdos
+msi-laptop
+msnd
+msnd_classic
+msnd_pinnacle
+msp3400
+mspro_block
+msr
+mt2060
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+mt2131
+mt2266
+mt312
+mt352
+mt9m001
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+mt9t031
+mt9v011
+mt9v022
+mtd
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+mtdblock
+mtdblock_ro
+mtdchar
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+mtd_dataflash
+mtd_oobtest
+mtdoops
+mtd_pagetest
+mtdram
+mtd_readtest
+mtd_speedtest
+mtd_stresstest
+mtd_subpagetest
+mtd_torturetest
+mtouch
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+multiq3
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+mwave
+mwl8k
+mxb
+mxl5005s
+mxl5007t
+mxser
+myri10ge
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+nand_ids
+nandsim
+natsemi
+navman
+nbd
+ncpfs
+NCR53c406a
+NCR_D700
+NCR_Q720_mod
+ndiswrapper
+ne
+ne2
+ne2k-pci
+ne3210
+neofb
+net1080
+netconsole
+netjet
+netrom
+netsc520
+nettel
+netwave_cs
+netxen_nic
+newtonkbd
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+nf_conntrack_ipv4
+nf_conntrack_ipv6
+nf_conntrack_irc
+nf_conntrack_netbios_ns
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+nf_conntrack_pptp
+nf_conntrack_proto_dccp
+nf_conntrack_proto_gre
+nf_conntrack_proto_sctp
+nf_conntrack_proto_udplite
+nf_conntrack_sane
+nf_conntrack_sip
+nf_conntrack_tftp
+nf_defrag_ipv4
+nf_nat
+nf_nat_amanda
+nf_nat_ftp
+nf_nat_h323
+nf_nat_irc
+nf_nat_pptp
+nf_nat_proto_dccp
+nf_nat_proto_gre
+nf_nat_proto_sctp
+nf_nat_proto_udplite
+nf_nat_sip
+nf_nat_snmp_basic
+nf_nat_tftp
+nfnetlink
+nfnetlink_log
+nfnetlink_queue
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+nfs_acl
+nfsd
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+nf_tproxy_core
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+nicstar
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+ni_labpc
+ni_labpc_cs
+nilfs2
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+ni_pcidio
+ni_pcimio
+ni_tio
+ni_tiocmd
+niu
+nl802154
+nls_ascii
+nls_cp1250
+nls_cp1251
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+nouveau
+nozomi
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+opl3
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+oxu210hp-hcd
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+p54spi
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+p9auth
+padlock-aes
+padlock-sha
+panasonic-laptop
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+parkbd
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+parport_serial
+pas16
+pas2
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+pata_it821x
+pata_jmicron
+pata_legacy
+pata_marvell
+pata_mpiix
+pata_netcell
+pata_ninja32
+pata_ns87410
+pata_ns87415
+pata_oldpiix
+pata_opti
+pata_optidma
+pata_pcmcia
+pata_pdc2027x
+pata_pdc202xx_old
+pata_qdi
+pata_radisys
+pata_rdc
+pata_rz1000
+pata_sc1200
+pata_sch
+pata_serverworks
+pata_sil680
+pata_sl82c105
+pata_triflex
+pata_via
+pata_winbond
+pbe5
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+pc87413_wdt
+pc87427
+pca953x
+pcbc
+pcbit
+pcd
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+pcl730
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+pcm3724
+pcm3730
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+pcmda12
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+pcnet32
+pcnet_cs
+pcspkr
+pcwd
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+pcwd_usb
+pd
+pd6729
+pda_power
+pegasus
+penmount
+pf
+pg
+phantom
+phison
+phonedev
+phonet
+phram
+physmap
+pktgen
+pl2303
+platform_lcd
+plat_nand
+plat-ram
+plip
+plusb
+pluto2
+pm2fb
+pm3fb
+pmc551
+pmcraid
+pms
+pn_pep
+poc
+poch
+pohmelfs
+powermate
+power_meter
+ppa
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+ppp_deflate
+ppp_mppe
+pppoatm
+pppoe
+pppol2tp
+pppox
+ppp_synctty
+pps_core
+prism2_usb
+prism54
+progear_bl
+proteon
+psmouse
+pss
+pt
+pvrusb2
+pwc
+qcserial
+qinfo_probe
+qla1280
+qla2xxx
+qla3xxx
+qla4xxx
+qlge
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+qlogicfas
+qlogicfas408
+qnx4
+qt1010
+quatech_daqp_cs
+quatech_usb2
+quickcam_messenger
+quota_tree
+quota_v1
+quota_v2
+r128
+r8169
+r8192_pci
+r8192se_pci
+r8192s_usb
+r82600_edac
+r8a66597-hcd
+radeon
+radeonfb
+radio-aimslab
+radio-aztech
+radio-cadet
+radio-gemtek
+radio-gemtek-pci
+radio-i2c-si470x
+radio-maestro
+radio-maxiradio
+radio-mr800
+radio-rtrack2
+radio-sf16fmi
+radio-sf16fmr2
+radio-si4713
+radio-tea5764
+radio-terratec
+radio-trust
+radio-typhoon
+radio-usb-si470x
+radio-zoltrix
+raid0
+raid1
+raid10
+raid456
+raid6_pq
+raid6test
+raid_class
+ramzswap
+rar_driver
+raw
+raw1394
+ray_cs
+rdma_cm
+rdma_ucm
+rds
+rds_rdma
+rds_tcp
+redboot
+reed_solomon
+reiserfs
+rfc1051
+rfc1201
+rfcomm
+rfd_ftl
+ricoh_mmc
+rio500
+riscom8
+rivafb
+rmd128
+rmd160
+rmd256
+rmd320
+rndis_host
+rndis_wlan
+rocket
+romfs
+rose
+rotary_encoder
+rpcsec_gss_krb5
+rpcsec_gss_spkm3
+rrunner
+rsrc_nonstatic
+rt2400pci
+rt2500pci
+rt2500usb
+rt2800usb
+rt2860sta
+rt2870sta
+rt2x00lib
+rt2x00pci
+rt2x00usb
+rt3090sta
+rt61pci
+rt73usb
+rtc-ab3100
+rtc-bq4802
+rtc-ds1286
+rtc-ds1305
+rtc-ds1307
+rtc-ds1374
+rtc-ds1390
+rtc-ds1511
+rtc-ds1553
+rtc-ds1672
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+rtc-m48t35
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+rtc-max6902
+rtc-pcf2123
+rtc-pcf50633
+rtc-pcf8563
+rtc-pcf8583
+rtc-r9701
+rtc-rs5c348
+rtc-rs5c372
+rtc-rx8025
+rtc-rx8581
+rtc-s35390a
+rtc-stk17ta8
+rtc-test
+rtc-twl4030
+rtc-v3020
+rtc-wm831x
+rtc-wm8350
+rtc-x1205
+rtd520
+rti800
+rti802
+rtl8150
+rtl8180
+rtl8187
+rtl8187se
+rxkad
+s1d13xxxfb
+s2255drv
+s2io
+s3fb
+s526
+s5h1409
+s5h1411
+s5h1420
+s626
+saa5246a
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+saa6588
+saa6752hs
+saa7110
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+saa7134-alsa
+saa7134-dvb
+saa7134-empress
+saa7146
+saa7146_vv
+saa7164
+saa717x
+saa7185
+safe_serial
+salsa20_generic
+salsa20-i586
+sata_inic162x
+sata_mv
+sata_nv
+sata_promise
+sata_qstor
+sata_sil
+sata_sil24
+sata_sis
+sata_svw
+sata_sx4
+sata_uli
+sata_via
+sata_vsc
+savage
+savagefb
+sb
+sb1000
+sbc60xxwdt
+sbc7240_wdt
+sbc8360
+sbc_epx_c3
+sbc_fitpc2_wdt
+sbc_gxx
+sb_lib
+sbni
+sbp2
+sc
+sc1200wdt
+sc520cdp
+sc520_wdt
+sc92031
+scb2_flash
+scc
+sch311x_wdt
+sch_atm
+sch_cbq
+sch_drr
+sch_dsmark
+sch_gred
+sch_hfsc
+sch_htb
+sch_ingress
+sch_multiq
+sch_netem
+sch_prio
+sch_red
+sch_sfq
+sch_tbf
+sch_teql
+sco
+scsi_debug
+scsi_dh_alua
+scsi_dh_emc
+scsi_dh_hp_sw
+scsi_dh_rdac
+scsi_tgt
+scsi_transport_fc
+scsi_transport_iscsi
+scsi_transport_sas
+scsi_transport_srp
+scsi_wait_scan
+sctp
+scx200
+scx200_acb
+scx200_docflash
+scx200_gpio
+scx200_hrt
+scx200_i2c
+scx200_wdt
+sdhci
+sdhci-pci
+sdhci-pltfm
+sdio_uart
+sdla
+sdricoh_cs
+se401
+sealevel
+sedlbauer_cs
+seed
+seeq8005
+sep_driver
+seqiv
+ser_gigaset
+serial2002
+serial_cs
+serio_raw
+sermouse
+serpent
+serport
+serqt_usb2
+ses
+sfc
+sha1_generic
+sha256_generic
+sha512_generic
+shpchp
+sht15
+si21xx
+si4713-i2c
+sidewinder
+siemens_mpi
+sierra
+sim710
+sir-dev
+sis
+sis190
+sis5595
+sis900
+sis-agp
+sisfb
+sisusbvga
+sit
+sja1000
+sja1000_isa
+sja1000_platform
+skel
+skfp
+skge
+skisa
+sky2
+sl811_cs
+sl811-hcd
+slicoss
+slip
+slram
+sm501
+sm501fb
+smbfs
+smc9194
+smc91c92_cs
+smc-mca
+smctr
+smc-ultra
+smc-ultra32
+smsc37b787_wdt
+smsc47b397
+smsc47m1
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+smsc9420
+smsc95xx
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+smsmdtv
+smssdio
+smsusb
+sn9c102
+snd
+snd-ac97-codec
+snd-ad1816a
+snd-ad1848
+snd-ad1889
+snd-adlib
+snd-ak4114
+snd-ak4117
+snd-ak4xxx-adda
+snd-ali5451
+snd-als100
+snd-als300
+snd-als4000
+snd-atiixp
+snd-atiixp-modem
+snd-au8810
+snd-au8820
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+snd-aw2
+snd-azt2320
+snd-azt3328
+snd-bt87x
+snd-ca0106
+snd-cmi8330
+snd-cmipci
+snd-cs4231
+snd-cs4236
+snd-cs4281
+snd-cs46xx
+snd-cs5530
+snd-cs5535audio
+snd-cs8427
+snd-ctxfi
+snd-darla20
+snd-darla24
+snd-dt019x
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+snd-emu10k1
+snd-emu10k1-synth
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+snd-emu8000-synth
+snd-emux-synth
+snd-ens1370
+snd-ens1371
+snd-es1688
+snd-es1688-lib
+snd-es18xx
+snd-es1938
+snd-es1968
+snd-es968
+snd-fm801
+snd-gina20
+snd-gina24
+snd-gusclassic
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+snd-gus-lib
+snd-gusmax
+snd-hda-codec
+snd-hda-codec-analog
+snd-hda-codec-atihdmi
+snd-hda-codec-ca0110
+snd-hda-codec-cirrus
+snd-hda-codec-cmedia
+snd-hda-codec-conexant
+snd-hda-codec-idt
+snd-hda-codec-intelhdmi
+snd-hda-codec-nvhdmi
+snd-hda-codec-realtek
+snd-hda-codec-si3054
+snd-hda-codec-via
+snd-hda-intel
+snd-hdsp
+snd-hdspm
+snd-hifier
+snd-hrtimer
+snd-hwdep
+snd-i2c
+snd-ice1712
+snd-ice1724
+snd-ice17xx-ak4xxx
+snd-indigo
+snd-indigodj
+snd-indigodjx
+snd-indigoio
+snd-indigoiox
+snd-intel8x0
+snd-intel8x0m
+snd-interwave
+snd-interwave-stb
+snd-korg1212
+snd-layla20
+snd-layla24
+snd-lx6464es
+snd-maestro3
+snd-mia
+snd-miro
+snd-mixart
+snd-mixer-oss
+snd-mona
+snd-mpu401
+snd-mpu401-uart
+snd-msnd-classic
+snd-msnd-lib
+snd-msnd-pinnacle
+snd-mtpav
+snd-mts64
+snd-nm256
+snd-opl3-lib
+snd-opl3sa2
+snd-opl3-synth
+snd-opl4-lib
+snd-opl4-synth
+snd-opti92x-ad1848
+snd-opti92x-cs4231
+snd-opti93x
+snd-oxygen
+snd-oxygen-lib
+snd-page-alloc
+snd-pcm
+snd-pcm-oss
+snd-pcsp
+snd-pcxhr
+snd-pdaudiocf
+snd-portman2x4
+snd-pt2258
+snd-rawmidi
+snd-riptide
+snd-rme32
+snd-rme96
+snd-rme9652
+snd-sb16
+snd-sb16-csp
+snd-sb16-dsp
+snd-sb8
+snd-sb8-dsp
+snd-sbawe
+snd-sb-common
+snd-sc6000
+snd-seq
+snd-seq-device
+snd-seq-dummy
+snd-seq-midi
+snd-seq-midi-emul
+snd-seq-midi-event
+snd-seq-oss
+snd-seq-virmidi
+snd-serial-u16550
+snd-sgalaxy
+snd-sis7019
+snd-soc-ad1836
+snd-soc-ad1938
+snd-soc-ad73311
+snd-soc-ak4104
+snd-soc-ak4535
+snd-soc-ak4642
+snd-soc-core
+snd-soc-cs4270
+snd-soc-l3
+snd-soc-max9877
+snd-soc-pcm3008
+snd-soc-spdif
+snd-soc-ssm2602
+snd-soc-tlv320aic23
+snd-soc-tlv320aic26
+snd-soc-tlv320aic3x
+snd-soc-twl4030
+snd-soc-uda134x
+snd-soc-uda1380
+snd-soc-wm8350
+snd-soc-wm8400
+snd-soc-wm8510
+snd-soc-wm8523
+snd-soc-wm8580
+snd-soc-wm8728
+snd-soc-wm8731
+snd-soc-wm8750
+snd-soc-wm8753
+snd-soc-wm8776
+snd-soc-wm8900
+snd-soc-wm8903
+snd-soc-wm8940
+snd-soc-wm8960
+snd-soc-wm8961
+snd-soc-wm8971
+snd-soc-wm8974
+snd-soc-wm8988
+snd-soc-wm8990
+snd-soc-wm8993
+snd-soc-wm9081
+snd-soc-wm-hubs
+snd-sonicvibes
+snd-sscape
+snd-tea575x-tuner
+snd-tea6330t
+snd-timer
+snd-trident
+snd-usb-audio
+snd-usb-caiaq
+snd-usb-lib
+snd-usb-us122l
+snd-usb-usx2y
+snd-util-mem
+snd-via82xx
+snd-via82xx-modem
+snd-virmidi
+snd-virtuoso
+snd-vx222
+snd-vx-lib
+snd-vxpocket
+snd-wavefront
+snd-wss-lib
+snd-ymfpci
+soc_camera
+soc_camera_platform
+softcursor
+softdog
+solos-pci
+sony-laptop
+sonypi
+sound
+soundcore
+sound_firmware
+sp8870
+sp887x
+spaceball
+spaceorb
+spcp8x5
+specialix
+spectrum_cs
+speedfax
+speedtch
+spi_bitbang
+spi_butterfly
+spidev
+spi_gpio
+spi_lm70llp
+squashfs
+ssb
+sscape
+ssfdc
+sst25l
+sstfb
+ssv_dnp
+st
+stallion
+starfire
+stb0899
+stb6000
+stb6100
+stex
+stinger
+stir4200
+stkwebcam
+stowaway
+stp
+stradis
+strip
+stv0288
+stv0297
+stv0299
+stv0900
+stv090x
+stv6110
+stv6110x
+stv680
+sundance
+sungem
+sungem_phy
+sunhme
+suni
+sunkbd
+sunrpc
+svcrdma
+svgalib
+sworks-agp
+sx8
+sym53c416
+sym53c500_cs
+symbolserial
+synaptics_i2c
+synclink
+synclink_cs
+synclink_gt
+synclinkmp
+syscopyarea
+sysfillrect
+sysimgblt
+sysv
+t128
+t1isa
+t1pci
+tc1100-wmi
+tcic
+tcp_bic
+tcp_highspeed
+tcp_htcp
+tcp_hybla
+tcp_illinois
+tcp_lp
+tcp_probe
+tcp_scalable
+tcp_vegas
+tcp_veno
+tcp_westwood
+tcp_yeah
+tcrypt
+tda10021
+tda10023
+tda10048
+tda1004x
+tda10086
+tda18271
+tda7432
+tda8083
+tda8261
+tda826x
+tda827x
+tda8290
+tda9840
+tda9887
+tdfx
+tdfxfb
+tdo24m
+tea
+tea5761
+tea5767
+tea6415c
+tea6420
+tehuti
+tekram-sir
+teles_cs
+tg3
+tgr192
+thinkpad_acpi
+thmc50
+tifm_7xx1
+tifm_core
+tifm_ms
+tifm_sd
+tileblit
+timeriomem-rng
+tipc
+ti_usb_3410_5052
+tlan
+tlclk
+tle62x0
+tmdc
+tmiofb
+tmp401
+tmp421
+tms380tr
+tmscsim
+tmspci
+toim3232-sir
+topstar-laptop
+toshiba_acpi
+touchit213
+touchright
+touchwin
+tpm
+tpm_atmel
+tpm_bios
+tpm_infineon
+tpm_nsc
+tpm_tis
+tps65010
+tps65023-regulator
+tps6507x-regulator
+trancevibrator
+tranzport
+tridentfb
+trix
+ts5500_flash
+ts_bm
+tsc2007
+ts_fsm
+ts_kmp
+tsl2550
+tsl2561
+ttm
+ttpci-eeprom
+ttusb_dec
+ttusbdecfe
+tua6100
+tulip
+tuner
+tuner-simple
+tuner-types
+tuner-xc2028
+tunnel4
+tunnel6
+turbografx
+tvaudio
+tveeprom
+tvp5150
+tw9910
+twidjoy
+twl4030-gpio
+twl4030_keypad
+twl4030-pwrbutton
+twl4030-usb
+twl4030_wdt
+twofish
+twofish_common
+twofish-i586
+typhoon
+u132-hcd
+u14-34f
+uart401
+uart6850
+ubi
+ubifs
+ucb1400_core
+ucb1400_ts
+udf
+udlfb
+ueagle-atm
+ufs
+uinput
+uio
+uio_aec
+uio_cif
+uio_pci_generic
+uio_pdrv
+uio_pdrv_genirq
+uio_sercos3
+uio_smx
+uli526x
+ultracam
+ultrastor
+umc
+umem
+ums-alauda
+ums-cypress
+ums-datafab
+ums-freecom
+ums-isd200
+ums-jumpshot
+ums-karma
+ums-onetouch
+ums-sddr09
+ums-sddr55
+ums-usbat
+unioxx5
+upd64031a
+upd64083
+uPD98402
+usb8xxx
+usbatm
+usb_debug
+usbdux
+usbduxfast
+usb_gigaset
+usbhid
+usbip
+usbip_common_mod
+usblcd
+usbled
+usblp
+usbnet
+usbserial
+usbsevseg
+usb-storage
+usbtest
+usbtmc
+usbtouchscreen
+usbvideo
+usbvision
+userspace-consumer
+uss720
+uvcvideo
+uvesafb
+uwb
+v4l1-compat
+v4l2-common
+v4l2-int-device
+vcan
+ves1820
+ves1x93
+vesafb
+veth
+vfat
+vga16fb
+vgastate
+vgg2432a4
+vhci-hcd
+via
+via686a
+via-agp
+viafb
+via-ircc
+via-rhine
+via-rng
+via-sdmmc
+via-velocity
+vicam
+video
+video1394
+videobuf-core
+videobuf-dma-sg
+videobuf-dvb
+videobuf-vmalloc
+videocodec
+videodev
+virtio_balloon
+virtio_console
+virtio-rng
+virtual
+visor
+vivi
+vlsi_ir
+vmac
+vme
+vme_ca91cx42
+vme_tsi148
+vme_user
+v_midi
+vmk80xx
+vmlfb
+vmw_pvscsi
+vmxnet3
+vp27smpx
+vpx3220
+vstusb
+vsxxxaa
+vt1211
+vt6656_stage
+vt8231
+vt8623fb
+vxge
+w1_bq27000
+w1_ds2431
+w1_ds2433
+w1_ds2760
+w1-gpio
+w1_smem
+w1_therm
+w6692
+w83627ehf
+w83627hf
+w83627hf_wdt
+w83697hf_wdt
+w83697ug_wdt
+w83781d
+w83791d
+w83792d
+w83793
+w83877f_wdt
+w83977af_ir
+w83977f_wdt
+w83l785ts
+w83l786ng
+w9966
+w9968cf
+wacom
+wacom_w8001
+wafer5823wdt
+walkera0701
+wanrouter
+wanxl
+warrior
+wavelan
+wavelan_cs
+wbsd
+wd
+wd7000
+wdt
+wdt_pci
+whci
+whci-hcd
+whc-rc
+whiteheat
+wimax
+winbond-840
+winbond-cir
+wire
+wistron_btns
+wl1251
+wl1251_sdio
+wl1251_spi
+wl1271
+wl3501_cs
+wlp
+wm831x
+wm831x_bl
+wm831x-dcdc
+wm831x-gpio
+wm831x-hwmon
+wm831x-isink
+wm831x-ldo
+wm831x-on
+wm831x_power
+wm831x_wdt
+wm8350
+wm8350-hwmon
+wm8350-i2c
+wm8350_power
+wm8350-regulator
+wm8350_wdt
+wm8400-core
+wm8400-regulator
+wm8739
+wm8775
+wm97xx-ts
+wp512
+wpan-class
+wusb-cbaf
+wusbcore
+wusb-wa
+x25
+x25_asy
+x38_edac
+xc5000
+xcbc
+xen-blkfront
+xen-fbfront
+xenfs
+xen-kbdfront
+xen-netfront
+xfrm4_mode_beet
+xfrm4_mode_transport
+xfrm4_mode_tunnel
+xfrm4_tunnel
+xfrm6_mode_beet
+xfrm6_mode_ro
+xfrm6_mode_transport
+xfrm6_mode_tunnel
+xfrm6_tunnel
+xfrm_ipcomp
+xfrm_user
+xfs
+xhci
+xirc2ps_cs
+xircom_cb
+xor
+xpad
+xprtrdma
+x_tables
+xt_CLASSIFY
+xt_cluster
+xt_comment
+xt_connbytes
+xt_connlimit
+xt_connmark
+xt_CONNMARK
+xt_CONNSECMARK
+xt_conntrack
+xt_dccp
+xt_dscp
+xt_DSCP
+xt_esp
+xt_hashlimit
+xt_helper
+xt_hl
+xt_HL
+xt_iprange
+xtkbd
+xt_LED
+xt_length
+xt_limit
+xt_mac
+xt_mark
+xt_MARK
+xt_multiport
+xt_NFLOG
+xt_NFQUEUE
+xt_NOTRACK
+xt_osf
+xt_owner
+xt_physdev
+xt_pkttype
+xt_policy
+xt_quota
+xt_rateest
+xt_RATEEST
+xt_realm
+xt_recent
+xts
+xt_sctp
+xt_SECMARK
+xt_socket
+xt_state
+xt_statistic
+xt_string
+xt_tcpmss
+xt_TCPMSS
+xt_tcpudp
+xt_time
+xt_TPROXY
+xt_TRACE
+xt_u32
+xusbatm
+xvmalloc
+yam
+yealink
+yellowfin
+yenta_socket
+z85230
+zatm
+zaurus
+zc0301
+zd1201
+zd1211rw
+zhenhua
+zl10036
+zl10039
+zl10353
+zlib
+zlib_deflate
+znet
+zr36016
+zr36050
+zr36060
+zr36067
+zr364xx
--- linux-mvl-dove-2.6.32.orig/debian.master/abi/2.6.32-34.73/i386/generic-pae
+++ linux-mvl-dove-2.6.32/debian.master/abi/2.6.32-34.73/i386/generic-pae
@@ -0,0 +1,10491 @@
+EXPORT_SYMBOL arch/x86/kernel/scx200 0x254e5667	scx200_gpio_base
+EXPORT_SYMBOL arch/x86/kernel/scx200 0x35a3c008	scx200_gpio_configure
+EXPORT_SYMBOL arch/x86/kernel/scx200 0x8cfa375c	scx200_gpio_shadow
+EXPORT_SYMBOL arch/x86/kernel/scx200 0x907665bd	scx200_cb_base
+EXPORT_SYMBOL arch/x86/kvm/kvm 0x8e1b9150	kvm_cpu_has_pending_timer
+EXPORT_SYMBOL arch/x86/kvm/kvm 0xc1bba08a	kvm_read_guest_atomic
+EXPORT_SYMBOL crypto/gf128mul 0x0c2f123f	gf128mul_4k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x1068004b	gf128mul_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x2f2889a0	gf128mul_init_64k_lle
+EXPORT_SYMBOL crypto/gf128mul 0x3755f990	gf128mul_init_64k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x384ef9ce	gf128mul_64k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x56af0dbd	gf128mul_x_ble
+EXPORT_SYMBOL crypto/gf128mul 0x83581089	gf128mul_init_4k_lle
+EXPORT_SYMBOL crypto/gf128mul 0x9b2560b9	gf128mul_init_4k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x9e13f6f6	gf128mul_lle
+EXPORT_SYMBOL crypto/gf128mul 0xbd17a0df	gf128mul_4k_lle
+EXPORT_SYMBOL crypto/gf128mul 0xc0890413	gf128mul_64k_lle
+EXPORT_SYMBOL crypto/gf128mul 0xd60736ec	gf128mul_free_64k
+EXPORT_SYMBOL crypto/xor 0x5b6c00e6	xor_blocks
+EXPORT_SYMBOL drivers/acpi/video 0x7a45377b	acpi_video_unregister
+EXPORT_SYMBOL drivers/acpi/video 0x8826c13b	acpi_video_register
+EXPORT_SYMBOL drivers/atm/suni 0x1a404f6b	suni_init
+EXPORT_SYMBOL drivers/atm/uPD98402 0x1bef61aa	uPD98402_init
+EXPORT_SYMBOL drivers/block/paride/paride 0x091d6e0f	pi_release
+EXPORT_SYMBOL drivers/block/paride/paride 0x13b1e09c	pi_connect
+EXPORT_SYMBOL drivers/block/paride/paride 0x3856d50c	pi_do_claimed
+EXPORT_SYMBOL drivers/block/paride/paride 0x5255f72a	pi_disconnect
+EXPORT_SYMBOL drivers/block/paride/paride 0x5cb13924	pi_init
+EXPORT_SYMBOL drivers/block/paride/paride 0x72f3eecc	pi_read_regr
+EXPORT_SYMBOL drivers/block/paride/paride 0x740025f8	paride_register
+EXPORT_SYMBOL drivers/block/paride/paride 0x80510181	pi_read_block
+EXPORT_SYMBOL drivers/block/paride/paride 0xc4064a57	paride_unregister
+EXPORT_SYMBOL drivers/block/paride/paride 0xd7bf8e29	pi_write_regr
+EXPORT_SYMBOL drivers/block/paride/paride 0xe5aa88a5	pi_write_block
+EXPORT_SYMBOL drivers/block/paride/paride 0xff398ac9	pi_schedule_claimed
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x00596597	agp_generic_type_to_mask_type
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x051f63bc	agp_generic_create_gatt_table
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x0e19f689	agp_generic_destroy_page
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x1104a5f1	agp_put_bridge
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x24ae8e07	agp_generic_alloc_pages
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x24dbed16	agp_alloc_page_array
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x27003a73	agp_generic_insert_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x2a3e55d6	agp_backend_acquire
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x2af1309d	agp_generic_alloc_page
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x2d0d69f4	agp_free_page_array
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x2f39964c	agp_free_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x30226ddf	agp_device_command
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x350361e1	get_agp_version
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x38b13dd9	agp_alloc_bridge
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x460d2b16	agp_generic_remove_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x46f91e6e	agp_allocate_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x4b085dbf	agp3_generic_configure
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x508120a5	agp_generic_free_gatt_table
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x543a1952	agp_enable
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x598a9efc	agp_generic_alloc_user
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x5ea25707	agp3_generic_tlbflush
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x673f815e	agp_bridges
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x7538b132	agp_off
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x7912ab94	agp_collect_device_status
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x8adb3f44	agp_generic_mask_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x94ff57a9	agp_create_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x995be62c	agp_generic_destroy_pages
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x9d974830	agp_find_bridge
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xa4d4f0e6	global_cache_flush
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xafe5eadf	agp_copy_info
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xb04ea8f0	agp_rebind_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xb9e82836	agp_generic_alloc_by_type
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xc2424641	agp3_generic_cleanup
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xc5d9c46c	agp_try_unsupported_boot
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xc65abeb7	agp3_generic_sizes
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xd0fef3b2	agp_free_key
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xdb24a001	agp_flush_chipset
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xde9b17ed	agp3_generic_fetch_size
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xeafc8191	agp_generic_enable
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xed637f3a	agp_bind_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xf48d5344	agp_generic_free_by_type
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xf8cab62a	agp_backend_release
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xfc21f203	agp_unbind_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xfd92d3b5	agp_bridge
+EXPORT_SYMBOL drivers/char/agp/intel-agp 0x7b9a6116	intel_agp_enabled
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x00a9c5ee	ipmi_create_user
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x11f58df0	ipmi_get_version
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x17f19bec	ipmi_unregister_smi
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x1e2ab01d	ipmi_request_settime
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x3083662f	ipmi_set_gets_events
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x40f2b10c	ipmi_alloc_smi_msg
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x4ffa0361	ipmi_register_smi
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x60f51f34	ipmi_request_supply_msgs
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x61b33528	ipmi_set_my_address
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x770119f3	ipmi_unregister_for_cmd
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x792a3246	ipmi_register_for_cmd
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x804f922a	ipmi_addr_length
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x862c92c1	ipmi_smi_watcher_unregister
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x8b7c3a70	ipmi_poll_interface
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x8cbd7b77	ipmi_free_recv_msg
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x9572a241	ipmi_destroy_user
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xb220175e	ipmi_smi_add_proc_entry
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xbf65176b	ipmi_smi_watchdog_pretimeout
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xc3e30efa	ipmi_get_my_address
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xcf84ac5f	ipmi_get_my_LUN
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xd1092a7d	ipmi_smi_msg_received
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe345942c	ipmi_smi_watcher_register
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe4f4665b	ipmi_validate_addr
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xed6de951	ipmi_set_maintenance_mode
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xeffc5d31	ipmi_get_maintenance_mode
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xfb9fb3b7	ipmi_set_my_LUN
+EXPORT_SYMBOL drivers/char/nsc_gpio 0x1c87bf17	nsc_gpio_read
+EXPORT_SYMBOL drivers/char/nsc_gpio 0x52012cdc	nsc_gpio_dump
+EXPORT_SYMBOL drivers/char/nsc_gpio 0x8b57b372	nsc_gpio_write
+EXPORT_SYMBOL drivers/char/nvram 0x0f28cb91	nvram_read_byte
+EXPORT_SYMBOL drivers/char/nvram 0x17ff2c1d	__nvram_read_byte
+EXPORT_SYMBOL drivers/char/nvram 0x2adec1e0	__nvram_check_checksum
+EXPORT_SYMBOL drivers/char/nvram 0x7da28f12	nvram_check_checksum
+EXPORT_SYMBOL drivers/char/nvram 0x9ce3f83f	nvram_write_byte
+EXPORT_SYMBOL drivers/char/nvram 0xa8813189	__nvram_write_byte
+EXPORT_SYMBOL drivers/edac/edac_core 0x9be9c56e	edac_mc_handle_fbd_ue
+EXPORT_SYMBOL drivers/edac/edac_core 0xbe82a304	edac_mc_handle_fbd_ce
+EXPORT_SYMBOL drivers/edac/edac_core 0xef39a1e1	edac_mc_find
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x04dd92ce	fw_core_add_descriptor
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x19c00d0a	fw_core_remove_address_handler
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x206872af	fw_run_transaction
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x21fe561c	fw_send_response
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x22b34dd2	fw_core_initiate_bus_reset
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x3850125d	fw_iso_context_stop
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x392802e1	fw_core_handle_response
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x3a0512a5	fw_iso_buffer_destroy
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x3f297fee	fw_fill_response
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x4d5d4eca	fw_core_remove_descriptor
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x54ee252d	fw_core_handle_request
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x621c1317	fw_iso_context_create
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x8c9bfa26	fw_cancel_transaction
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x8fb81bf0	fw_card_initialize
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x90863005	fw_high_memory_region
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x9edf92ac	fw_core_remove_card
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xa9aee9ce	fw_device_enable_phys_dma
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xac7da6bc	fw_iso_context_queue
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xaf1d9b69	fw_card_add
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xafc1c793	fw_csr_iterator_next
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xb047a2c6	fw_csr_iterator_init
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xbac94f4e	fw_iso_context_destroy
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xc68f3b35	fw_send_request
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xce5fa58b	fw_iso_buffer_init
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xe621a1b3	fw_iso_context_start
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xeb3ab983	fw_core_handle_bus_reset
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xeb9cb740	fw_bus_type
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xf9647f2b	fw_core_add_address_handler
+EXPORT_SYMBOL drivers/firmware/dcdbas 0xa75079d6	dcdbas_smi_request
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x01842a7f	drm_mm_dump_table
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0467a7b9	drm_sysfs_hotplug_event
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0631d92f	drm_mode_create_dirty_info_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x07d8648f	drm_vblank_off
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x07e3fddd	drm_pci_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0836695c	drm_sman_takedown
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0a8700f2	drm_agp_chipset_flush
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0e9e7968	drm_i2c_encoder_destroy
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1148ff2d	drm_mode_connector_update_edid_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x17326818	drm_do_probe_ddc_edid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1caa6888	drm_get_dev
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1ccf0c3f	drm_agp_release
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1ef8d076	drm_vblank_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1f072c59	drm_property_add_enum
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x20645642	drm_debug
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x21451ac4	drm_sman_owner_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x21e2a5fe	drm_mode_validate_size
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x23a0ced9	drm_clflush_pages
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2457c627	drm_vblank_pre_modeset
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x24961bb4	drm_irq_uninstall
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x24e5026a	drm_core_ioremapfree
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x25a70b15	drm_mode_connector_list_update
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x25c1103e	drm_sysfs_connector_add
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2916bf63	drm_sman_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x29acbdc9	drm_connector_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2eb2f903	drm_sman_free_key
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2fe31f67	drm_vblank_put
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3074f033	drm_order
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x35e4cce8	drm_mode_create_dithering_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x36823849	drm_connector_property_get_value
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3725bba0	drm_free_agp
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3a1f302b	drm_crtc_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3a2f21a8	drm_mm_search_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3a76b91a	drm_mode_config_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3c9a1409	drm_ht_just_insert_please
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3e188583	drm_agp_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3ef5c4c3	drm_lock_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3efb8615	drm_mode_create_tv_properties
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3fa83ac1	drm_mode_prune_invalid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x40911aaf	drm_mm_debug_table
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x425b80ec	drm_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x437582af	drm_mmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x470ce38e	drm_connector_attach_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4d489180	drm_idlelock_release
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x504760b3	drm_mode_object_find
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5473140e	drm_master_put
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x558e2301	drm_mode_crtc_set_gamma_size
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x55f060ee	drm_sman_set_range
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x56217ed2	drm_mm_clean
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x571959df	drm_sysfs_connector_remove
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x57f7dbe6	drm_mm_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x580830f0	drm_mode_set_name
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5c731b61	drm_ioctl
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5cbe33ec	drm_mode_probed_add
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5ce6144c	drm_agp_enable
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5ea5074d	drm_debugfs_create_files
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5edb122d	drm_gem_object_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5f54ca36	drm_framebuffer_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5f700779	drm_release
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6035d117	drm_mode_duplicate
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x607d0913	drm_open
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x60f548b1	drm_get_edid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x634a9189	drm_agp_info
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x63d708b7	drm_ati_pcigart_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6518c19a	drm_mm_get_block_range_generic
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x699c06bd	drm_addbufs_pci
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x69fbfc8a	drm_agp_bind_pages
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6c7f6cb3	drm_addbufs_agp
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6d2e5837	drm_ut_debug_printk
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6eb2da4b	drm_mode_config_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6f73bb83	drm_pci_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6fc30481	drm_mode_hsync
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6fdcb75a	drm_gem_object_lookup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x72400726	drm_addmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x73562ccb	drm_mode_create_scaling_mode_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7544f79f	drm_mode_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x765f446a	drm_get_encoder_name
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x76863e24	drm_mm_pre_get
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7812aba9	drm_cvt_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x784915eb	drm_mode_vrefresh
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7becf9f2	drm_gem_object_handle_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7c1fd6c8	drm_mode_equal
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7da0999b	drm_put_dev
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7e2d1f31	drm_property_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x83a08211	drm_rmmap_locked
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x849241ac	drm_mm_put_block
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x85603258	drm_vblank_post_modeset
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x85de09f5	drm_mode_width
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x86022930	drm_handle_vblank
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x87d6e7ef	drm_detect_hdmi_monitor
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8b5d60d4	drm_add_edid_modes
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8d70240e	drm_gem_handle_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8e62d513	drm_mm_search_free_in_range
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x96d51ae8	drm_unbind_agp
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9729bf06	drm_add_modes_noedid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9b65d948	drm_mode_destroy
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9c8f379b	drm_idlelock_take
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9f03c514	drm_read
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa1eabd87	drm_mode_list_concat
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa2d35d4b	drm_property_destroy
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa465dee0	drm_sg_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa4b347a2	drm_agp_unbind
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa5d9af34	drm_poll
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa89d354c	drm_irq_install
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xab17224a	drm_vblank_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xacd7ce78	drm_get_resource_start
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xad00cbfc	drm_mode_remove
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xaf29788e	drm_sman_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb64e4cd5	drm_mm_init_scan
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb8f3322d	drm_vblank_get
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb91adbdc	drm_debugfs_remove_files
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xbacd3205	drm_agp_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xbdbae640	drm_encoder_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xbf4d4167	drm_gtf_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc0725f77	drm_vblank_count
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc1512a6a	drm_core_get_reg_ofs
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc29ca659	drm_i_have_hw_lock
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc33d8ac6	drm_agp_bind
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc48bfd48	drm_mode_connector_detach_encoder
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc4ea85d8	drm_mm_scan_remove_block
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc7295a21	drm_mode_detachmode_crtc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc735bef2	drm_agp_acquire
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc98e3d9f	drm_exit
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcba3b573	drm_getsarea
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcdc842fe	drm_lock_take
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcdf2eff4	drm_mode_height
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcfb4f4ef	drm_mm_scan_add_block
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd08fa3f0	drm_mode_set_crtcinfo
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd127c437	drm_mode_create_dvi_i_properties
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3028e75	drm_sman_set_manager
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3c3e091	drm_gem_mmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3ffab51	drm_ht_remove
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd4b182f2	drm_gem_vm_close
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd4c8a354	drm_mm_get_block_generic
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd63d6819	drm_core_get_map_ofs
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd65c55ea	drm_get_connector_name
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd77c4883	drm_mode_validate_clocks
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdc2b979c	drm_rmmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdc7151ba	drm_core_ioremap_wc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd3febe2	drm_gem_object_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd49095c	drm_ht_insert_item
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xde7ab4d6	drm_get_drawable_info
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe1457735	drm_ht_remove_item
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe211fc0c	drm_i2c_encoder_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe24a7b88	drm_ht_find_item
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe3b93528	drm_fasync
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe3f0f86c	drm_master_get
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe552df64	drm_core_ioremap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe5bdce7e	drm_mode_debug_printmodeline
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe8d04cf3	drm_gem_vm_open
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe919dd5c	drm_sman_owner_clean
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xeb7b2cc4	drm_core_reclaim_buffers
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xecc2b6b4	drm_connector_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xedcaee61	drm_mode_connector_attach_encoder
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xee965199	drm_encoder_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xefd2c282	drm_crtc_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf086111c	drm_connector_property_set_value
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf1421d13	drm_mode_sort
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf18764d7	drm_get_resource_len
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf28f4368	drm_framebuffer_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf42a2b26	drm_ht_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfa769c65	drm_mm_takedown
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfa8bca25	drm_mode_attachmode_crtc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfc223131	drm_ati_pcigart_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfdfbad19	drm_sman_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x12a6b317	drm_fb_helper_blank
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x1a7dbd9e	drm_fb_helper_check_var
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x22a02d4a	drm_fb_helper_fill_fix
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x2e99701f	drm_helper_resume_force_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x356e9f44	drm_crtc_helper_set_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x3c461ff8	drm_helper_hotplug_stage_two
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x4415ca4f	drm_fb_helper_fill_var
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x4864f6e8	drm_helper_encoder_in_use
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x572d8ffe	drm_helper_initial_config
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x5c08003b	drm_fb_helper_init_crtc_count
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x5e831f29	drm_fb_helper_setcolreg
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x6df94d50	i2c_dp_aux_add_bus
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x6dfd27fb	drm_helper_mode_fill_fb_struct
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x7c98072e	drm_helper_crtc_in_use
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x7d484cef	drm_fb_helper_setcmap
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x9d251144	drm_fb_helper_panic
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xc085da76	drm_fb_helper_add_connector
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xc469c244	drm_fb_helper_restore
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xcf1e27db	drm_fb_helper_set_par
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xde665df7	drm_helper_connector_dpms
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xe9b5b147	drm_helper_probe_connector_modes
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xedd75a5b	drm_helper_probe_single_connector_modes
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xeff4767f	drm_crtc_helper_set_config
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xf2350a82	drm_fb_helper_free
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xf400d643	drm_helper_disable_unused_functions
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xfc0e9bcf	drm_fb_helper_single_fb_probe
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xff551fd5	drm_fb_helper_pan_display
+EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x1c957548	intelfb_probe
+EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x4a0b5a20	intelfb_resize
+EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x7dc898bd	intelfb_remove
+EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0x2fc3f7cd	radeonfb_resize
+EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0xefefe2af	radeonfb_remove
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x01c99cb0	ttm_write_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x07787990	ttm_bo_global_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x095499a3	ttm_bo_clean_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x0b8def08	ttm_bo_move_accel_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x0e553e1a	ttm_bo_wait_unreserved
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x0e7bcf63	ttm_mem_global_free
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x104300e8	ttm_object_file_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x11a565ec	ttm_bo_kunmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x132b05be	ttm_round_pot
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x161262d6	ttm_ref_object_base_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x17371a04	ttm_bo_wait_cpu
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x17a98fa2	ttm_object_device_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x1ba8c0ef	ttm_lock_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x2a928044	ttm_bo_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x2d673efd	ttm_vt_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x34704ea7	ttm_global_item_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x365feb2e	ttm_eu_reserve_buffers
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x37618ced	ttm_bo_move_ttm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x3c3c3af1	ttm_bo_global_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x3dbaa9d3	ttm_bo_move_memcpy
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x40037590	ttm_agp_backend_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x43d7e9e5	ttm_bo_reserve
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x49fd9a24	ttm_object_file_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x506f1ea6	ttm_bo_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x5504c85d	ttm_mem_global_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x56c42d22	ttm_suspend_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x594f03fe	ttm_object_device_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x5f950fa8	ttm_mem_global_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x61bdb34f	ttm_eu_fence_buffer_objects
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x6277c681	ttm_base_object_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x66666d70	ttm_global_item_ref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x6cada4a6	ttm_bo_mmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x765cbc82	ttm_read_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x77524c51	ttm_bo_init_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x781e0956	ttm_tt_populate
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x7f8879de	ttm_vt_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x86a4066d	ttm_eu_backoff_reservation
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x881a941a	ttm_bo_synccpu_write_grab
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x8db796d4	ttm_write_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x8e04c87f	ttm_fbdev_mmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x906127df	ttm_bo_unreserve
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x9c09065a	ttm_mem_global_alloc
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xa4a477ff	ttm_tt_set_placement_caching
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xa4b0ba5e	ttm_ref_object_add
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb55e3d40	ttm_tt_bind
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb5cf2fe9	ttm_suspend_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb9e927c4	ttm_base_object_lookup
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xbba2ecf9	ttm_read_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xbf69f5ca	ttm_base_object_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc0667b5a	ttm_bo_device_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc628249f	ttm_bo_validate
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xcf3a69e4	ttm_bo_device_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xd20706ac	ttm_bo_wait
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xd7de4d88	ttm_bo_synccpu_write_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xd928c11d	ttm_bo_mem_space
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xd937a461	ttm_bo_evict_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xdbdffd33	ttm_bo_unmap_virtual
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xdc4cf967	ttm_bo_kmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xf544e0f1	ttm_bo_swapout_all
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xf60c4915	ttm_io_prot
+EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0x0903c239	vid_from_reg
+EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0xef1c781c	vid_which_vrm
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-bit 0x6bee97f3	i2c_bit_add_numbered_bus
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-bit 0xda890ff0	i2c_bit_add_bus
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0x03309e6d	i2c_pca_add_numbered_bus
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0xacd663aa	i2c_pca_add_bus
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pcf 0x703dc748	i2c_pcf_add_bus
+EXPORT_SYMBOL drivers/i2c/busses/i2c-amd756 0x4b42f4ca	amd756_smbus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x03567d49	hpsb_packet_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x06380e5f	hpsb_make_phypacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x069728dc	hpsb_lock
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x08f4030e	hpsb_update_config_rom_image
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0930c154	hpsb_make_streampacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0ad68e79	hpsb_update_config_rom
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0b234c4e	dma_prog_region_alloc
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0b350688	hpsb_node_fill_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0c759840	hpsb_alloc_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0f725a30	hpsb_register_highlevel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x11432335	hpsb_alloc_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x12b73fb6	hpsb_iso_xmit_sync
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1328d22d	dma_region_mmap
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x13ef8be1	hpsb_selfid_complete
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x158ac548	dma_region_offset_to_bus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x19a83583	hpsb_iso_packet_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1a200e5a	csr1212_release_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x292d3b7e	hpsb_make_lock64packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2a4cc36b	csr1212_attach_keyval_to_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2ac71608	hpsb_allocate_and_register_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2ebf6e5a	dma_prog_region_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x30338de8	hpsb_iso_stop
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x32a7c4b8	hpsb_iso_shutdown
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x41d33b1a	hpsb_get_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4901203c	hpsb_register_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5d839105	hpsb_make_writepacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5e26fe28	hpsb_make_lockpacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5f5fdd2f	csr1212_new_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5fa7df58	hpsb_unregister_protocol
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x615d7528	hpsb_unregister_highlevel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x64904003	hpsb_iso_recv_unlisten_channel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x65b01f5d	hpsb_free_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x672ad148	dma_region_sync_for_device
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x709699bc	hpsb_node_write
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x74d5422c	hpsb_iso_recv_listen_channel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x765541da	hpsb_iso_n_ready
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x76bc1a5c	dma_region_free
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7b22dbf9	hpsb_reset_bus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8147ee70	hpsb_unregister_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x822aa664	hpsb_resume_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x82cd0ded	hpsb_packet_success
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8696f7d2	hpsb_get_tlabel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8879f8f0	dma_region_sync_for_cpu
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8ec2b312	dma_region_alloc
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x90cbd26c	hpsb_set_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x94706d07	hpsb_iso_xmit_start
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x94bce230	csr1212_get_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x95dd2cf9	hpsb_iso_xmit_queue_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x96d88fb9	hpsb_iso_packet_sent
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9a8c9d63	hpsb_iso_recv_start
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa2f9eec8	hpsb_remove_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa4adc69f	hpsb_iso_recv_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa6633bd8	hpsb_destroy_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa85cdb2a	hpsb_packet_sent
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xab321143	hpsb_make_readpacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xabc10149	hpsb_read
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xacd1c331	hpsb_create_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaef57bb5	csr1212_detach_keyval_from_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaefbd374	csr1212_parse_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb043ee61	hpsb_write
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb29bd232	hpsb_iso_wake
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbf0a794a	hpsb_set_packet_complete_task
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc26843ef	hpsb_selfid_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc9a8b9df	hpsb_read_cycle_timer
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xca41cede	hpsb_iso_recv_flush
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xccbb5763	hpsb_add_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xcd9e772b	dma_prog_region_free
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xcf88cccf	__hpsb_register_protocol
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd0b47f7c	hpsb_bus_reset
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd379e98d	hpsb_iso_xmit_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd6428ba9	hpsb_iso_recv_set_channel_mask
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xdf86c047	hpsb_protocol_class
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe52ac7a0	hpsb_get_hostinfo_bykey
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xea4152ff	dma_region_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xecda42a6	hpsb_send_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xef40e255	hpsb_free_tlabel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfab27536	csr1212_read
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfba57f51	hpsb_speedto_str
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfd638cc3	hpsb_set_hostinfo_key
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xff6578bb	hpsb_iso_recv_release_packets
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x10ea31f5	ohci1394_unregister_iso_tasklet
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x1d5aeebc	ohci1394_init_iso_tasklet
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x747c879d	ohci1394_stop_context
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0xf7c2cbb1	ohci1394_register_iso_tasklet
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x28ccebf2	rdma_translate_ip
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x6aa31f7f	rdma_addr_cancel
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x769d5a48	rdma_copy_addr
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x8a721ed9	rdma_addr_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x9803e58d	rdma_resolve_ip
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xc91bb9d3	rdma_addr_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x0f53ff2b	ib_send_cm_rtu
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x1e128bf3	ib_send_cm_req
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x26ce0b1f	ib_cm_notify
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x313c823d	cm_class
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x3bbb711e	ib_send_cm_apr
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x77ce2e38	ib_send_cm_sidr_rep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x7cfe2139	ib_destroy_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x7d33a8b8	ib_send_cm_dreq
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x80364291	ib_send_cm_lap
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x97a9ac11	ib_send_cm_mra
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x9adeaf65	ib_send_cm_sidr_req
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xa4e3dc69	ib_create_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xa4f3aa68	ib_send_cm_rep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xaf0b9c41	ib_cm_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xb646749a	ib_cm_listen
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xc12ef5d2	ib_send_cm_drep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xff1d2f72	ib_send_cm_rej
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x039b1f1a	ib_dealloc_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x03d6d2c4	ib_create_ah_from_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x07c52bdf	ib_destroy_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x09b94bce	ib_dealloc_mw
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0e5d4f0c	ib_fmr_pool_map_phys
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0f68090c	ib_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1081ffdb	ib_dealloc_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x126ca700	ib_flush_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x17fccc2c	ib_destroy_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1b3f1230	ib_alloc_pd
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1e491a04	ib_unmap_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x20472b2f	ib_unregister_event_handler
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x20c6d7e9	ib_resize_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x250cf36c	ib_reg_phys_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x27129957	ib_dispatch_event
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x293fd18d	ib_register_event_handler
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2dacea8f	ib_query_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x317040e8	ib_detach_mcast
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x37a2f08e	ib_alloc_fast_reg_page_list
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3d1adf2e	ib_query_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3f7567fd	ib_rate_to_mult
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x40680019	ib_get_cached_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x407c0e93	ib_umem_get
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x41e24ed1	ib_get_client_data
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4d7c1039	ib_modify_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4fdb4299	ib_get_cached_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x520b2638	ib_pack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x524e859a	ib_create_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x55b0bc14	ib_query_port
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5c48530a	ib_alloc_fast_reg_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5d8f05a8	ib_get_dma_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5e9166cc	ib_query_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x62ec167d	ib_get_cached_lmc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6d3bc1a5	ib_query_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x75aa710e	ib_fmr_pool_unmap
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7c4c569d	ib_destroy_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7de334e3	ib_query_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x81cbb462	ib_register_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x838e845a	ib_find_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8640eaeb	ib_modify_qp_is_ok
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x87b614d8	ib_ud_header_pack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8bccc7ba	ib_find_cached_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8e25d014	ib_umem_release
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x92657b95	ib_free_fast_reg_page_list
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9385044e	ib_modify_port
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9569ccee	ib_set_client_data
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x96ce6c46	rdma_node_get_transport
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9d804fa1	mult_to_ib_rate
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa081d462	ib_init_ah_from_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa15ad332	ib_create_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa58ccb7c	ib_modify_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa89340ff	ib_alloc_mw
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xaa0dd38b	ib_rereg_phys_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xae8e8049	ib_unregister_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb1a312e1	ib_unpack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb344e9db	ib_attach_mcast
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc5f81188	ib_modify_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc6732f46	ib_destroy_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc765499d	ib_dereg_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc7bfbdf3	ib_umem_page_count
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xcd3f7063	ib_dealloc_pd
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd105693b	ib_create_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd17ba9d1	ib_ud_header_init
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd28eeb41	ib_create_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd3771b46	ib_alloc_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd4cd0a27	ib_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd8444d4d	ib_modify_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xdba2374e	ib_find_cached_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xdd2e7980	ib_find_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe211bc9b	ib_alloc_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe53583e3	ib_modify_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe6119b1f	ib_query_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xed3c6e45	ib_destroy_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf36498b9	ib_ud_header_unpack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf44e60b8	ib_create_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xfb0ea129	ib_query_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x1c80ec7f	ib_cancel_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x32c0b9ce	ib_modify_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x383aae6a	ib_create_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x535f1e80	ib_register_mad_snoop
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6ef787ed	ib_response_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6f077fcf	ib_get_mad_data_offset
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x7b5d4b7a	ib_is_mad_class_rmpp
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x9011bfd3	ib_process_mad_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x9413d5ad	ib_redirect_mad_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x95ec079e	ib_register_mad_agent
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xa9b5abdf	ib_free_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xaaca6dd3	ib_unregister_mad_agent
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xabfe2fe8	ib_free_recv_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xb0b98ad9	ib_post_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xc88bd479	ib_get_rmpp_segment
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x2d3e2005	ib_sa_path_rec_get
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x39d2eaf6	ib_sa_cancel_query
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x576fdbac	ib_sa_free_multicast
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x61555a44	ib_init_ah_from_path
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x92ed738d	ib_init_ah_from_mcmember
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x9c56fd34	ib_sa_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xa38cc1f9	ib_sa_service_rec_query
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xc1678022	ib_sa_join_multicast
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xedda2762	ib_sa_get_mcmember_rec
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xf520d09e	ib_sa_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x02f847bc	ib_copy_path_rec_from_user
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x07cf5a51	ib_copy_ah_attr_to_user
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x18382f6a	ib_copy_path_rec_to_user
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x184f3575	ib_copy_qp_attr_to_user
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x02977167	iw_cm_disconnect
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x29b59b17	iw_create_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x328b47d6	iw_cm_connect
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x444b4d43	iw_cm_accept
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x536561a9	iw_cm_reject
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x741914dd	iw_cm_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x8ef379a9	iw_cm_listen
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xde71f1cb	iw_destroy_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x0d3e2956	rdma_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x1135af5e	rdma_bind_addr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x162b057c	rdma_create_qp
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x316305ed	rdma_reject
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x3241a5c4	rdma_connect
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x32b3fc69	rdma_set_ib_paths
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x3ad533fc	rdma_resolve_addr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x442516d6	rdma_destroy_id
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x5976edc0	rdma_accept
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x60338a12	rdma_join_multicast
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x703afb98	rdma_destroy_qp
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x8f84896c	rdma_resolve_route
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xa117fce9	rdma_notify
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xaa67b3d8	rdma_set_service_type
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xab5bca49	rdma_create_id
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xb3780692	rdma_listen
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xdbe72dc4	rdma_disconnect
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xef37a3f9	rdma_leave_multicast
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x4566e656	gameport_unregister_driver
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x79e89cdd	gameport_open
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x7ad75247	gameport_unregister_port
+EXPORT_SYMBOL drivers/input/gameport/gameport 0xabd52e76	gameport_close
+EXPORT_SYMBOL drivers/input/gameport/gameport 0xacd77a3f	__gameport_register_driver
+EXPORT_SYMBOL drivers/input/gameport/gameport 0xce131662	gameport_set_phys
+EXPORT_SYMBOL drivers/input/gameport/gameport 0xd6d40042	gameport_start_polling
+EXPORT_SYMBOL drivers/input/gameport/gameport 0xd90aa2f7	__gameport_register_port
+EXPORT_SYMBOL drivers/input/gameport/gameport 0xec6b4797	gameport_stop_polling
+EXPORT_SYMBOL drivers/input/input-polldev 0x36a41f82	input_unregister_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0xaa72f009	input_free_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0xdce8c295	input_register_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0xe2662dfc	input_allocate_polled_device
+EXPORT_SYMBOL drivers/isdn/capi/capifs 0x2c54c957	capifs_free_ncci
+EXPORT_SYMBOL drivers/isdn/capi/capifs 0xd0bc06ce	capifs_new_ncci
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x04403fcf	unregister_capi_driver
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x14f2aa5a	capi20_get_version
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x1cbc67d2	attach_capi_ctr
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2b8eab1f	capilib_free_ncci
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2baa6586	capilib_new_ncci
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x3199d7b7	capi20_set_callback
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x31c24aa4	capi20_isinstalled
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x47108161	capi_ctr_handle_message
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x47d3fc51	capi_info2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x50b33ca4	capi_cmsg2message
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x6057c6f3	capi_message2cmsg
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x62e32d43	capilib_data_b3_conf
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x64f59299	capi_ctr_down
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x6b24d973	capi_ctr_suspend_output
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x6e6de5f6	capi_ctr_ready
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x71e8d5ba	capilib_data_b3_req
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7a33596c	capi20_get_serial
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7e6f1307	capi20_get_manufacturer
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x8f699913	capilib_release
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x926a68f4	capi20_register
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x963b2c2d	capi_ctr_resume_output
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x9f823278	register_capi_driver
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xa7c4fd6c	capi_message2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xaa165d27	capilib_release_appl
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb19fda8d	capi_cmd2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb60e5e5f	capi_cmsg_header
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xc10fe128	cdebbuf_free
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xca441bdc	capi20_put_message
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xcc187d89	capi20_release
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe19a11ac	capi20_get_profile
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe6f7e483	detach_capi_ctr
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe8ad9bd1	capi_cmsg2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xed061606	capi20_manufacturer
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x0b3506dc	b1_alloc_card
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x25f87850	b1_load_config
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x36b188d8	b1_interrupt
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x3a761f23	b1_register_appl
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x4392e3ee	b1_parse_version
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x4caa74b8	avmcard_dma_free
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x74daf637	b1_loaded
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x7ca4ecce	b1_reset_ctr
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x7deae4f8	b1_load_t4file
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x85f09690	b1_irq_table
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xae758d84	b1_getrevision
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xb8787447	b1_release_appl
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xc69ee470	b1_send_message
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xc7d55a3b	b1ctl_read_proc
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xda12053d	b1_free_card
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xdc3e4d76	b1_load_firmware
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xdfd28376	b1_detect
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xeac06e78	avmcard_dma_alloc
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x233ca0dc	b1dma_interrupt
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x2db1ef71	b1dma_register_appl
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x35d49587	t1pci_detect
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x86fb9b8c	b1dma_reset
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x8e752f99	b1pciv4_detect
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x8f8627d1	b1dma_load_firmware
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xb9c53090	b1dma_send_message
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xbc7f8188	b1dmactl_read_proc
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xfb0317d0	b1dma_reset_ctr
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xffc22c38	b1dma_release_appl
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0x29562993	b1pcmcia_delcard
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xaec3240e	b1pcmcia_addcard_m1
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xea620116	b1pcmcia_addcard_m2
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xf14bf8b1	b1pcmcia_addcard_b1
+EXPORT_SYMBOL drivers/isdn/hardware/eicon/divadidd 0x2974ead1	DIVA_DIDD_Read
+EXPORT_SYMBOL drivers/isdn/hardware/eicon/divadidd 0xd01934d7	proc_net_eicon
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNipac 0x3696dbcb	mISDNisac_irq
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNipac 0x51c5e77f	mISDNisac_init
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNipac 0xa5ba096f	mISDNipac_init
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNipac 0xb749d2bc	mISDNipac_irq
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNisar 0x5b611e30	mISDNisar_init
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNisar 0xc511bd76	mISDNisar_irq
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x07f4f2ce	hisax_unregister
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x148f0c99	FsmFree
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x2844a899	FsmInitTimer
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x36371606	hisax_init_pcmcia
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x93a64734	FsmChangeState
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x9df0cd27	FsmEvent
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xc0c558f9	FsmRestartTimer
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xd94696e8	FsmDelTimer
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xee93522c	hisax_register
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xf0a16657	FsmNew
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xfc27303b	HiSax_closecard
+EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x0279322f	isacsx_irq
+EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x2fbafa33	isac_irq
+EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x3f3b323a	isac_d_l2l1
+EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0xbfdc59a6	isac_setup
+EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0xcc1463ba	isacsx_setup
+EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0xd103a60c	isac_init
+EXPORT_SYMBOL drivers/isdn/i4l/isdn 0x003fae73	register_isdn
+EXPORT_SYMBOL drivers/isdn/i4l/isdn 0x280aec5e	isdn_ppp_unregister_compressor
+EXPORT_SYMBOL drivers/isdn/i4l/isdn 0x7cba3faa	isdn_ppp_register_compressor
+EXPORT_SYMBOL drivers/isdn/i4l/isdn 0xfa06820f	isdn_register_divert
+EXPORT_SYMBOL drivers/isdn/i4l/isdnhdlc 0x3b71e4fc	isdnhdlc_decode
+EXPORT_SYMBOL drivers/isdn/i4l/isdnhdlc 0x59cc8a7e	isdnhdlc_out_init
+EXPORT_SYMBOL drivers/isdn/i4l/isdnhdlc 0x8ee38862	isdnhdlc_rcv_init
+EXPORT_SYMBOL drivers/isdn/i4l/isdnhdlc 0xfd9d4c09	isdnhdlc_encode
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x04dae08d	get_next_dframe
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x12e3250b	queue_ch_frame
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x1c2c0d36	mISDN_unregister_device
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x205cf8d8	mISDN_register_Bprotocol
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x2348cc3c	mISDN_FsmFree
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x273d1777	mISDN_initdchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x2e62244d	confirm_Bsend
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3debb4ec	l1_event
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3ea336fd	mISDN_FsmAddTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x429129f2	mISDN_FsmRestartTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x447f8894	mISDN_initbchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x4c124989	create_l1
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x50c2230c	mISDN_FsmChangeState
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x50f30f84	recv_Bchannel_skb
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x5ae8077c	bchannel_senddata
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x5dc7400a	mISDN_clock_update
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x69dacfd9	mISDN_register_device
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x73ca2d65	dchannel_senddata
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x750aa0bc	get_next_bframe
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x817639f7	recv_Dchannel_skb
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x91a685a4	mISDN_freedchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xace35cae	mISDN_FsmDelTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xade84560	mISDN_freebchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc3401729	mISDN_register_clock
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xcdae1321	mISDN_unregister_Bprotocol
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd285995f	mISDN_clock_get
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd5145151	mISDN_FsmEvent
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd9a7fbfd	mISDN_FsmInitTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe14c0cfa	mISDN_clear_bchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe8f617eb	mISDN_unregister_clock
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf73bc3d3	recv_Bchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf9e7832f	mISDN_FsmNew
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xfa3b0d75	recv_Echannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xfbbeede6	recv_Dchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0x01087af0	mISDN_dsp_element_unregister
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0x60721da7	dsp_audio_law_to_s32
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0xa215f1b2	dsp_audio_s16_to_law
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0xb98308d8	mISDN_dsp_element_register
+EXPORT_SYMBOL drivers/md/raid6_pq 0x0bd662f6	raid6_gfmul
+EXPORT_SYMBOL drivers/md/raid6_pq 0x15fe0cd3	raid6_gfexp
+EXPORT_SYMBOL drivers/md/raid6_pq 0x5ba93f9d	raid6_gfinv
+EXPORT_SYMBOL drivers/md/raid6_pq 0xb0d904b7	raid6_empty_zero_page
+EXPORT_SYMBOL drivers/md/raid6_pq 0xce45a6f1	raid6_gfexi
+EXPORT_SYMBOL drivers/media/common/tuners/mc44s803 0x21994759	mc44s803_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mt2060 0xa2c0f209	mt2060_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mt2131 0xb9489fe9	mt2131_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mt2266 0xdda58e54	mt2266_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mxl5005s 0x55e95d60	mxl5005s_attach
+EXPORT_SYMBOL drivers/media/common/tuners/qt1010 0x948464bd	qt1010_attach
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0x0cb4b189	tuners
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0xc2821775	tuner_count
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-xc2028 0x1001ed16	xc2028_attach
+EXPORT_SYMBOL drivers/media/common/tuners/xc5000 0x3d29effe	xc5000_attach
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x003295c4	flexcop_dma_control_size_irq
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x0cb7655b	flexcop_device_kfree
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x14689605	flexcop_wan_set_speed
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x17849484	flexcop_dump_reg
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x1d19a4a4	flexcop_device_exit
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x2a928a2b	flexcop_dma_config
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x506b82f7	flexcop_sram_set_dest
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x5e394ce4	flexcop_dma_control_timer_irq
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x6047cb93	flexcop_pid_feed_control
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x61d599fb	flexcop_eeprom_check_mac_addr
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x70a94beb	flexcop_sram_ctrl
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x7102ca60	flexcop_i2c_request
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x7856faa9	flexcop_device_kmalloc
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xaad5d608	flexcop_pass_dmx_packets
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xb3727471	flexcop_dma_xfer_control
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xbb163246	flexcop_device_initialize
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xbf8fd681	flexcop_pass_dmx_data
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xe65e8224	flexcop_dma_config_timer
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xe7ecc975	flexcop_dma_allocate
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xf8207c36	flexcop_dma_free
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x239afc9e	bt878_stop
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x88fc6bcc	bt878
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xafe523e2	bt878_start
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xd5d0bdef	bt878_num
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xdd8f32c1	bt878_device_control
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x046da58f	dst_comm_init
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x0b5ae4cd	rdc_reset_state
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x12f26f10	read_dst
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x338df725	write_dst
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x424c81d0	dst_wait_dst_ready
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x58c15418	dst_error_bailout
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xc809703c	dst_error_recovery
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xe94b8c9c	dst_check_sum
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xf2ab6f8c	dst_pio_disable
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xf8696334	dst_attach
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst_ca 0xde3c1ad0	dst_ca_attach
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0bca1792	dvb_register_frontend
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0c4d4a14	dvb_frontend_sleep_until
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x14eb630c	dvb_ringbuffer_free
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x254de892	dvb_ca_en50221_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x27852c86	dvb_dmx_swfilter
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x2dffd244	dvb_dmx_swfilter_204
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x33792beb	dvb_ca_en50221_camchange_irq
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x3aa69ca3	dvb_generic_open
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x41fbb6d0	dvb_unregister_device
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x42893bd1	dvb_unregister_adapter
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x43d4a685	dvb_ca_en50221_frda_irq
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x45c3d14b	dvb_dmx_swfilter_packets
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6e2fcd6f	dvb_generic_ioctl
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6f7f7d73	dvb_ringbuffer_empty
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6f9c72e3	dvb_ringbuffer_read
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x74a5a698	dvb_filter_pes2ts_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x78fdca10	dvb_dmxdev_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x7f80dd61	dvb_frontend_detach
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x8019dd21	dvb_net_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x80e3832d	dvb_filter_get_ac3info
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x923aa88e	dvb_ringbuffer_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x968a44ac	dvb_dmxdev_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x98d6f63e	dvb_unregister_frontend
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xa4680647	dvb_register_adapter
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xa486ac6c	dvb_frontend_reinitialise
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xac4ca1b0	intlog2
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb2db2592	dvb_ringbuffer_write
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb379ef9f	dvb_ca_en50221_camready_irq
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb5b95805	dvb_ringbuffer_read_user
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb90f168a	dvb_dmx_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xbc0d91e1	timeval_usec_diff
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xcbdc2e5a	dvb_register_device
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xd3809880	dvb_generic_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xd95f51c8	dvb_dmx_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xdedabcf9	dvb_ca_en50221_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe5ae8707	intlog10
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe7949e59	dvb_ringbuffer_flush_spinlock_wakeup
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xeb7daf80	dvb_ringbuffer_avail
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xee9a9472	dvb_net_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf826deb0	dvb_filter_pes2ts
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x260671ec	usb_cypress_load_firmware
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x2709a0a2	dvb_usb_device_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x29f52eab	dvb_usb_device_exit
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x371eac8c	dvb_usb_generic_write
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x561d6d5b	dvb_usb_generic_rw
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x93baa54f	dvb_usb_nec_rc_key_to_event
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xaa28f184	dvb_usb_get_hexline
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x3693500b	af9005_rc_keys
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x9d3da007	af9005_rc_decode
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0xd3383957	af9005_rc_keys_size
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x20021898	dibusb_pid_filter
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x35c05acd	dibusb_rc_query
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x37db9941	dibusb_dib3000mc_frontend_attach
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x3ee0fee6	dibusb_i2c_algo
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x41fc389a	dibusb_read_eeprom_byte
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x462a989f	dibusb2_0_power_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x66cb7e45	dibusb2_0_streaming_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x78a9fada	dibusb_power_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xc5412850	dibusb_streaming_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xc961c1a5	dibusb_pid_filter_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xcc9ccaff	dibusb_rc_keys
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xe450230e	dibusb_dib3000mc_tuner_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/af9013 0xc840c3db	af9013_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/au8522 0x9a546a55	au8522_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/bcm3510 0xfd51fd3b	bcm3510_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx22700 0x4ec4cee1	cx22700_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx22702 0xe97a7970	cx22702_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24110 0xbc751c2e	cx24110_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0x153698a0	cx24113_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0x8ca9b7b2	cx24113_agc_callback
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24116 0x4ec1d727	cx24116_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0x00e03802	cx24123_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0xd2a2156f	cx24123_get_tuner_i2c_adapter
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0x09279e05	dib0070_wbd_offset
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0x702f055c	dib0070_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0x81de9e82	dib0070_ctrl_agc_filter
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mb 0xa7f7e4c1	dib3000mb_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x2461b3b1	dib3000mc_set_config
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x40be75db	dib3000mc_get_tuner_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x90a7fc65	dib3000mc_i2c_enumeration
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xaf83a62d	dib3000mc_pid_control
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xdc567216	dib3000mc_pid_parse
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xf8b89c46	dib3000mc_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0x4596105a	dib7000m_get_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0x71a0b055	dib7000m_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x1fb54ec2	dib7000p_get_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x238f1d51	dib7000p_set_wbd_ref
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x7f78ecd2	dib7000pc_detection
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x8512e0e6	dib7000p_set_gpio
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x8a83d473	dib7000p_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xe8415f7c	dib7000p_i2c_enumeration
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x826bdd74	dib8000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0xbcccc737	dib8000_set_wbd_ref
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0xd943f803	dib8000_i2c_enumeration
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0xe7146347	dib8000_set_gpio
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0xefb4b6e9	dib8000_get_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x1a04c452	dibx000_reset_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x21ae007b	dibx000_get_i2c_adapter
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x63b358f9	dibx000_exit_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x6548c24e	dibx000_init_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dvb-pll 0x64d1778f	dvb_pll_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/isl6405 0x0d9608f5	isl6405_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/isl6421 0x848fa496	isl6421_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/isl6423 0x93a94706	isl6423_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/itd1000 0x94fd3689	itd1000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/l64781 0xca4e1eef	l64781_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt3305 0xd0ca1d02	lgdt3305_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt330x 0xf36ddaf9	lgdt330x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lgs8gxx 0xccb62413	lgs8gxx_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0x7507b857	lnbp21_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0xe87e7383	lnbh24_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/mt312 0x26453571	mt312_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/mt352 0x6911eeb9	mt352_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/nxt200x 0xa5ed267b	nxt200x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/nxt6000 0xd97ad7d5	nxt6000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/or51132 0xb5a48d3a	or51132_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/or51211 0x7218c4a6	or51211_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1409 0xa9172de8	s5h1409_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1411 0x3afb21aa	s5h1411_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0x013becd2	s5h1420_get_tuner_i2c_adapter
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0x316ccd4d	s5h1420_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/si21xx 0xe7a6d4db	si21xx_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/sp8870 0xc28473d1	sp8870_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/sp887x 0x56b85063	sp887x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stb0899 0xb7a07c60	stb0899_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stb6000 0x2fdd367b	stb6000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stb6100 0x7a8a8261	stb6100_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0288 0x815b9dcc	stv0288_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0297 0xb6d9acf0	stv0297_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0299 0x48b87d25	stv0299_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0900 0x1d55b180	stv0900_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv090x 0xaefb2afd	stv090x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv6110 0xb91e087e	stv6110_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv6110x 0x3722f645	stv6110x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10021 0x09a1c027	tda10021_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10023 0x29a0a1ff	tda10023_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10048 0x08da483f	tda10048_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x20322f88	tda10046_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x4156db82	tda10045_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10086 0x745db5ef	tda10086_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda8083 0x6102c7d4	tda8083_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda8261 0x2ce568e1	tda8261_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda826x 0xf3b267eb	tda826x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tua6100 0xf4d11505	tua6100_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/ves1820 0x7915f7c2	ves1820_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/ves1x93 0xa45c1c3d	ves1x93_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/zl10036 0x49c18003	zl10036_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/zl10039 0x0c14573e	zl10039_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/zl10353 0x44d43319	zl10353_attach
+EXPORT_SYMBOL drivers/media/dvb/ttpci/ttpci-eeprom 0x6667a2dc	ttpci_eeprom_parse_mac
+EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0x968e35ba	ttusbdecfe_dvbt_attach
+EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0xbd493470	ttusbdecfe_dvbs_attach
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x11dc4b6d	bttv_gpio_enable
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x51d473b2	bttv_sub_unregister
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x78e0d455	bttv_get_pcidev
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x81d8fa28	bttv_sub_register
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x8ecf4acc	bttv_write_gpio
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xbcf2d2fb	bttv_read_gpio
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0x03f54f71	btcx_riscmem_free
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0x495e4b0c	btcx_calc_skips
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0x6a04d1f2	btcx_riscmem_alloc
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xad2fe38b	btcx_sort_clips
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xc368f8e6	btcx_align
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xcda0ded2	btcx_screen_clips
+EXPORT_SYMBOL drivers/media/video/cpia 0x29b5a6ed	cpia_register_camera
+EXPORT_SYMBOL drivers/media/video/cpia 0xcbd0029b	cpia_unregister_camera
+EXPORT_SYMBOL drivers/media/video/cx18/cx18 0x2cdea06d	cx18_reset_ir_gpio
+EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0x613c7858	cx231xx_register_extension
+EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0xa815b97c	cx231xx_unregister_extension
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x155650f3	cx2341x_ctrl_get_menu
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x1ca0c084	cx2341x_log_status
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x2f25eee2	cx2341x_update
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x5b88faf6	cx2341x_ext_ctrls
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf76ce95	cx2341x_fill_defaults
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf8b77a4	cx2341x_mpeg_ctrls
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xe2c2b5eb	cx2341x_ctrl_query
+EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0x54ee37b4	vp3054_i2c_remove
+EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0x8517076b	vp3054_i2c_probe
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x06b30bc5	cx88_get_control
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x2b3239d4	cx88_set_control
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x34301232	cx8800_ctrl_query
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x852094ac	cx88_video_mux
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x89a651c4	cx88_set_freq
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xac4e53b9	cx88_user_ctrls
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xbc7a8294	cx88_enum_input
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x1068c9b0	cx8802_get_device
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x3fdfc61a	cx8802_buf_queue
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x8283bd42	cx8802_unregister_driver
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xaa1d7791	cx8802_cancel_buffers
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xb21b6498	cx8802_get_driver
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xbd7f9c4c	cx8802_buf_prepare
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xea2895b2	cx8802_register_driver
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x0ab4fbb5	cx88_ir_start
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x135e0856	cx88_risc_stopper
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x1c43b5ec	cx88_newstation
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x1f9e26ab	cx88_risc_buffer
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x21f6dc85	cx88_risc_databuffer
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x27472068	cx88_sram_channel_dump
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x34fa6015	cx88_set_stereo
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x3645a452	cx88_reset
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x3fa8e60f	cx88_free_buffer
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x442725e6	cx88_sram_channel_setup
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x469842b1	cx88_set_tvnorm
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x4b64f79e	cx88_set_tvaudio
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x56dce3cc	cx88_set_scale
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x6141c8c5	cx88_tuner_callback
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x69d3106c	cx88_vdev_init
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x904b8696	cx88_audio_thread
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x99695bef	cx88_ir_stop
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x9b140fff	cx88_sram_channels
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xa26be287	cx88_dsp_detect_stereo_sap
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb035f52f	cx88_core_irq
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb41ecd9b	cx88_shutdown
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb47f6cda	cx88_print_irqbits
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xbc8236ab	cx88_core_put
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xc196e419	cx88_get_stereo
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xe333f2c9	cx88_core_get
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xfdef0e58	cx88_wakeup
+EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0x722ae118	em28xx_register_extension
+EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0xcab6e3a9	em28xx_unregister_extension
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x0aefffa2	gspca_disconnect
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x588abbd5	gspca_frame_add
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x794997f3	gspca_get_i_frame
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x9670af2c	gspca_debug
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xd2c51127	gspca_auto_gain_n_exposure
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xeeb1174b	gspca_resume
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xf8501824	gspca_suspend
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xfd1eb8dc	gspca_dev_probe
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x14f67530	ivtv_debug
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x17942ad1	ivtv_clear_irq_mask
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x44df4d01	ivtv_udma_unmap
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x50ba0584	ivtv_vapi_result
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x635038b0	ivtv_set_irq_mask
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x705ce81e	ivtv_reset_ir_gpio
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x720c88e0	ivtv_udma_prepare
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x8ca1bc2f	ivtv_init_on_first_open
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xa8c037c5	ivtv_vapi
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xcaff12f5	ivtv_api
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xd4a151d9	ivtv_udma_alloc
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xf679b2aa	ivtv_udma_setup
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x04e83446	saa7134_tuner_callback
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x0c5ec11a	saa7134_devlist_lock
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x1211df5d	saa7134_devlist
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x14dfecc6	saa7134_boards
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x2d8e8b31	saa7134_set_dmabits
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x37b7c193	saa7134_dmasound_init
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x424f2954	saa7134_ts_register
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x799327af	saa7134_pgtable_free
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x7aa63b75	saa7134_tvaudio_setmute
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x8194183e	saa7134_ts_unregister
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x881c3b00	saa7134_pgtable_alloc
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xa856db66	saa_dsp_writel
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xab017a42	saa7134_dmasound_exit
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xe38e4d7c	saa7134_set_gpio
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xf9b78198	saa7134_pgtable_build
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x1c07c11c	soc_camera_xlate_by_fourcc
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x5722c336	soc_camera_host_unregister
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x5be0e11a	soc_camera_apply_sensor_flags
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x952d8a88	soc_camera_host_register
+EXPORT_SYMBOL drivers/media/video/soc_camera 0xd682d58e	soc_camera_format_by_fourcc
+EXPORT_SYMBOL drivers/media/video/tveeprom 0x24a60b8d	tveeprom_hauppauge_analog
+EXPORT_SYMBOL drivers/media/video/tveeprom 0xae1916e6	tveeprom_read
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x16a2915c	RingQueue_Dequeue
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x407a321c	RingQueue_WakeUpInterruptible
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x4371cd51	usbvideo_RegisterVideoDevice
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x4c65cdb8	usbvideo_register
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x5514b6bd	usbvideo_AllocateDevice
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x88eba522	usbvideo_Deregister
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xa0b322eb	usbvideo_DeinterlaceFrame
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xddecac6d	RingQueue_Enqueue
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xdf11d4f3	usbvideo_TestPattern
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xf5011f67	RingQueue_Flush
+EXPORT_SYMBOL drivers/media/video/v4l1-compat 0x45ab8683	v4l_compat_translate_ioctl
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x03165a85	v4l2_ctrl_get_menu
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1dcaa0c8	v4l2_prio_max
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1e326b97	v4l2_ctrl_query_fill
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x2f639468	v4l2_prio_check
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x42c8e001	v4l2_ctrl_next
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x495426ee	v4l2_ctrl_get_name
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x4ed5e0d7	v4l2_chip_match_host
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x50766d69	v4l2_ctrl_query_menu_valid_items
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x6002f380	v4l2_chip_match_i2c_client
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x76ba9a9a	v4l2_prio_open
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x95284709	v4l2_prio_close
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x967e3188	v4l2_chip_ident_i2c_client
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9c7de443	v4l2_prio_change
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9eb43ee2	v4l2_ctrl_check
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0xbecd2858	v4l2_prio_init
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0xd9ee1e3f	v4l2_ctrl_query_menu
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x428c7787	videobuf_dvb_dealloc_frontends
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x8bc772b1	videobuf_dvb_unregister_bus
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xa13ad3a2	videobuf_dvb_alloc_frontend
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xc577b461	videobuf_dvb_get_frontend
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xd679f8d6	videobuf_dvb_register_bus
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xf9b45369	videobuf_dvb_find_frontend
+EXPORT_SYMBOL drivers/media/video/videodev 0x0614dd5a	v4l2_video_std_frame_period
+EXPORT_SYMBOL drivers/media/video/videodev 0x123959a1	v4l2_type_names
+EXPORT_SYMBOL drivers/media/video/videodev 0x3adbd595	v4l2_field_names
+EXPORT_SYMBOL drivers/media/video/videodev 0x408b2788	video_register_device_no_warn
+EXPORT_SYMBOL drivers/media/video/videodev 0x4540c9fa	video_device_release
+EXPORT_SYMBOL drivers/media/video/videodev 0x520810a5	video_device_release_empty
+EXPORT_SYMBOL drivers/media/video/videodev 0x5ebefe4b	v4l_printk_ioctl
+EXPORT_SYMBOL drivers/media/video/videodev 0x9536c1f1	video_ioctl2
+EXPORT_SYMBOL drivers/media/video/videodev 0xb8aa17fb	video_device_alloc
+EXPORT_SYMBOL drivers/media/video/videodev 0xba667770	video_unregister_device
+EXPORT_SYMBOL drivers/media/video/videodev 0xc851aea8	video_devdata
+EXPORT_SYMBOL drivers/media/video/videodev 0xcb1ada96	video_register_device
+EXPORT_SYMBOL drivers/media/video/videodev 0xe2b92059	v4l2_video_std_construct
+EXPORT_SYMBOL drivers/media/video/videodev 0xf3251e7b	v4l2_norm_to_name
+EXPORT_SYMBOL drivers/media/video/videodev 0xfd65b44f	video_usercopy
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x7e11e12e	videocodec_register
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0xcc8b396d	videocodec_unregister
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0xcebadbd3	videocodec_detach
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0xecac1f82	videocodec_attach
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x0833e86f	memstick_next_req
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x22f44f43	memstick_remove_host
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x5d820a02	memstick_init_req_sg
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x69a2966f	memstick_suspend_host
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x6cb45744	memstick_new_req
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x786fe982	memstick_register_driver
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x83373082	memstick_detect_change
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x961ee98b	memstick_set_rw_addr
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xa56f26a3	memstick_add_host
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xa5987a36	memstick_init_req
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xcb7b17c4	memstick_unregister_driver
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xe4f41da0	memstick_resume_host
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xf260ba5f	memstick_free_host
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xf88b306f	memstick_alloc_host
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x05035e55	mpt_event_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x05e9cf4f	mpt_free_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x18c300e4	mpt_put_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x27980546	mpt_get_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x29dded65	mpt_detach
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x30b244c6	mpt_attach
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x39701387	mpt_reset_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4526289b	mpt_event_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x485b4b96	mpt_alloc_fw_memory
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4bad999c	mpt_config
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x502108d0	mpt_fwfault_debug
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x5f9fee03	mpt_clear_taskmgmt_in_progress_flag
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x6a28dcab	mpt_findImVolumes
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x6bd9a193	mpt_send_handshake_request
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x8368c2da	mpt_verify_adapter
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x8953d2c2	mpt_free_fw_memory
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x912ac682	mpt_raid_phys_disk_pg1
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x92d5c82e	mpt_halt_firmware
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xa61e907b	mpt_print_ioc_summary
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xb2430bb1	mpt_GetIocState
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xb698d11c	mpt_put_msg_frame_hi_pri
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xba006822	mpt_device_driver_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc0e69f82	mpt_device_driver_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc47c22e8	mpt_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc65ffe36	mpt_HardResetHandler
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xca53311d	mpt_raid_phys_disk_get_num_paths
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xcca2f7e3	mpt_suspend
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd9a92a75	mpt_reset_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xdd805159	ioc_list
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xe29c2dc6	mpt_resume
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xe9c5953f	mptbase_sas_persist_operation
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xecc6f2bc	mpt_set_taskmgmt_in_progress_flag
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xf4394356	mpt_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xf7b46244	mpt_raid_phys_disk_pg0
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x13b02aac	mptscsih_raid_id_to_num
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x28980aac	mptscsih_io_done
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x37dd974d	mptscsih_scandv_complete
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x3a275b83	mptscsih_dev_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x3ecbbd2c	mptscsih_IssueTaskMgmt
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x4a1447c3	mptscsih_remove
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x528154f0	mptscsih_taskmgmt_response_code
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x607c1965	mptscsih_abort
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x63c48e5f	mptscsih_slave_destroy
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x72e3d427	mptscsih_shutdown
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x7b65faa6	mptscsih_get_scsi_lookup
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x824d4aa7	mptscsih_ioc_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x88f0105e	mptscsih_is_phys_disk
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x8aae2464	mptscsih_event_process
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x95a39c6f	mptscsih_bus_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x98c0a965	mptscsih_change_queue_depth
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xa17a20c8	mptscsih_resume
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xa8c4d770	mptscsih_proc_info
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xaf2c52f6	mptscsih_taskmgmt_complete
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xc0311336	mptscsih_host_attrs
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xc78cf741	mptscsih_host_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xd0ede035	mptscsih_qcmd
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xd58acf2d	mptscsih_bios_param
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xe447cb01	mptscsih_info
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xe705a55c	mptscsih_suspend
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xe70d75f3	mptscsih_slave_configure
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x1638ec86	i2o_msg_post_wait_mem
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x297f5a94	i2o_parm_field_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2a843bef	i2o_dump_message
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x33532821	i2o_driver_register
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x38c09a98	i2o_driver_notify_device_remove_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x55721d2a	i2o_parm_issue
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x7ca8bc6b	i2o_driver_notify_controller_remove_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x7ec42a2a	i2o_event_register
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x82f8f5d9	i2o_exec_lct_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x88c15e7b	i2o_iop_find_device
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb4c00dcf	i2o_controllers
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xc5481fa5	i2o_parm_table_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xc6dc89bb	i2o_device_claim_release
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xc6f50701	i2o_driver_notify_controller_add_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xd47805f6	i2o_driver_notify_device_add_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xe1826f95	i2o_find_iop
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xebd0e0d6	i2o_status_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xf7388f9d	i2o_device_claim
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xfa071264	i2o_driver_unregister
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xfcc717e5	i2o_msg_get_wait
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x0a8694a4	ab3100_get_chip_type
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x2ddc7a14	ab3100_mask_and_set_register_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x87726473	ab3100_event_register
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x97b081cb	ab3100_get_register_page_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xbd93e5c4	ab3100_get_register_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xd2f174e2	ab3100_event_unregister
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xdf749608	ab3100_event_registers_startup_state_get
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xee23639e	ab3100_set_register_interruptible
+EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x7a5af6e0	pasic3_read_register
+EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x9595f403	pasic3_write_register
+EXPORT_SYMBOL drivers/mfd/mfd-core 0x5e2789bc	mfd_add_devices
+EXPORT_SYMBOL drivers/mfd/mfd-core 0x80914636	mfd_remove_devices
+EXPORT_SYMBOL drivers/mfd/tps65010 0x02d4ad0f	tps65013_set_low_pwr
+EXPORT_SYMBOL drivers/mfd/tps65010 0x28485130	tps65010_config_vregs1
+EXPORT_SYMBOL drivers/mfd/tps65010 0x33739de7	tps65010_set_vib
+EXPORT_SYMBOL drivers/mfd/tps65010 0x9fd44c69	tps65010_set_led
+EXPORT_SYMBOL drivers/mfd/tps65010 0xb14080cc	tps65010_set_low_pwr
+EXPORT_SYMBOL drivers/mfd/tps65010 0xd5bb106d	tps65010_set_vbus_draw
+EXPORT_SYMBOL drivers/mfd/tps65010 0xe99b3f36	tps65010_set_gpio_out_value
+EXPORT_SYMBOL drivers/misc/c2port/core 0x1b3a8a60	c2port_device_register
+EXPORT_SYMBOL drivers/misc/c2port/core 0xb9931678	c2port_device_unregister
+EXPORT_SYMBOL drivers/misc/ioc4 0x4738b0a2	ioc4_unregister_submodule
+EXPORT_SYMBOL drivers/misc/ioc4 0xae47bebe	ioc4_register_submodule
+EXPORT_SYMBOL drivers/misc/tifm_core 0x026bf296	tifm_unregister_driver
+EXPORT_SYMBOL drivers/misc/tifm_core 0x17d421ca	tifm_queue_work
+EXPORT_SYMBOL drivers/misc/tifm_core 0x4a0aacd2	tifm_eject
+EXPORT_SYMBOL drivers/misc/tifm_core 0x4e4397c0	tifm_has_ms_pif
+EXPORT_SYMBOL drivers/misc/tifm_core 0x54d1eb87	tifm_free_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0x5f9ab970	tifm_add_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0x6785ebc5	tifm_unmap_sg
+EXPORT_SYMBOL drivers/misc/tifm_core 0x8bb9ceab	tifm_register_driver
+EXPORT_SYMBOL drivers/misc/tifm_core 0xa08947d6	tifm_remove_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0xbc4aba30	tifm_alloc_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0xbdc0630a	tifm_alloc_device
+EXPORT_SYMBOL drivers/misc/tifm_core 0xedfff24b	tifm_map_sg
+EXPORT_SYMBOL drivers/misc/tifm_core 0xfac9875d	tifm_free_device
+EXPORT_SYMBOL drivers/mmc/card/mmc_block 0xe70b8652	mmc_cleanup_queue
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x09aa1b7c	cfi_fixup
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x267439a6	cfi_varsize_frob
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x55f6fccf	cfi_read_pri
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x0c04e1dd	map_destroy
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x708679f6	unregister_mtd_chip_driver
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0xad38c1ce	register_mtd_chip_driver
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0xc7e1cd22	do_map_probe
+EXPORT_SYMBOL drivers/mtd/chips/gen_probe 0x9e1a28f9	mtd_do_chip_probe
+EXPORT_SYMBOL drivers/mtd/lpddr/lpddr_cmds 0xc137e4a4	lpddr_cmdset
+EXPORT_SYMBOL drivers/mtd/maps/map_funcs 0x85fb4cfc	simple_map_init
+EXPORT_SYMBOL drivers/mtd/mtd 0x0bbcd7b4	del_mtd_partitions
+EXPORT_SYMBOL drivers/mtd/mtd 0x7a5cf52b	add_mtd_partitions
+EXPORT_SYMBOL drivers/mtd/mtdconcat 0xace01096	mtd_concat_destroy
+EXPORT_SYMBOL drivers/mtd/mtdconcat 0xd5c3b7f1	mtd_concat_create
+EXPORT_SYMBOL drivers/mtd/nand/nand 0x5e6330da	nand_default_bbt
+EXPORT_SYMBOL drivers/mtd/nand/nand 0x7afd7405	nand_scan_bbt
+EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0x37dc752a	nand_calculate_ecc
+EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0x83ad91d1	nand_correct_data
+EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0xb4b94377	__nand_correct_data
+EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0x836bdb72	nand_flash_ids
+EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0xa336feb7	nand_manuf_ids
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x2365b97f	flexonenand_region
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x3809d50d	onenand_addr
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x78410787	onenand_scan_bbt
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0xf764e776	onenand_default_bbt
+EXPORT_SYMBOL drivers/net/8390 0x1dc6839b	ei_poll
+EXPORT_SYMBOL drivers/net/8390 0x224079f2	__alloc_ei_netdev
+EXPORT_SYMBOL drivers/net/8390 0x36dadb84	ei_open
+EXPORT_SYMBOL drivers/net/8390 0x45350e98	NS8390_init
+EXPORT_SYMBOL drivers/net/8390 0x54e6c30a	ei_start_xmit
+EXPORT_SYMBOL drivers/net/8390 0x850aad7c	ei_get_stats
+EXPORT_SYMBOL drivers/net/8390 0x88e30b34	ei_close
+EXPORT_SYMBOL drivers/net/8390 0xaf89fdc6	ei_set_multicast_list
+EXPORT_SYMBOL drivers/net/8390 0xdd365790	ei_interrupt
+EXPORT_SYMBOL drivers/net/8390 0xe3d933ad	ei_tx_timeout
+EXPORT_SYMBOL drivers/net/8390 0xf08c87b5	ei_netdev_ops
+EXPORT_SYMBOL drivers/net/8390p 0x3495d846	eip_open
+EXPORT_SYMBOL drivers/net/8390p 0x3a54cac0	eip_get_stats
+EXPORT_SYMBOL drivers/net/8390p 0x792f0039	NS8390p_init
+EXPORT_SYMBOL drivers/net/8390p 0x820771b7	eip_start_xmit
+EXPORT_SYMBOL drivers/net/8390p 0x8e2c523b	eip_netdev_ops
+EXPORT_SYMBOL drivers/net/8390p 0x90de226a	__alloc_eip_netdev
+EXPORT_SYMBOL drivers/net/8390p 0xb65b9b03	eip_poll
+EXPORT_SYMBOL drivers/net/8390p 0xb663e226	eip_interrupt
+EXPORT_SYMBOL drivers/net/8390p 0xb739fb37	eip_set_multicast_list
+EXPORT_SYMBOL drivers/net/8390p 0xd87bf038	eip_tx_timeout
+EXPORT_SYMBOL drivers/net/8390p 0xfd8be7ab	eip_close
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x14d3fbef	arcnet_close
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x16596a88	arc_proto_default
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x23f86078	arcnet_interrupt
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x32cf0820	arcnet_unregister_proto
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x4381ad32	arc_bcast_proto
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x52851988	alloc_arcdev
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x6534792a	arcnet_debug
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x67fe5d63	arcnet_open
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xb4d4bae5	arcnet_timeout
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xb871cb03	arcnet_send_packet
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xda4d8f2c	arc_proto_map
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xe0cfdc58	arc_raw_proto
+EXPORT_SYMBOL drivers/net/arcnet/com20020 0x4a6d5286	com20020_netdev_ops
+EXPORT_SYMBOL drivers/net/arcnet/com20020 0x6b00afb2	com20020_found
+EXPORT_SYMBOL drivers/net/arcnet/com20020 0xf3d8947c	com20020_check
+EXPORT_SYMBOL drivers/net/bnx2 0x5c52aad6	bnx2_cnic_probe
+EXPORT_SYMBOL drivers/net/cnic 0x636af174	cnic_unregister_driver
+EXPORT_SYMBOL drivers/net/cnic 0xf141a858	cnic_register_driver
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x1d6b1b0a	t3_l2t_send_slow
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x20fcbd50	cxgb3_free_atid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x352f2ad1	t3_l2t_get
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x386f846d	cxgb3_alloc_stid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x51850085	cxgb3_ofld_send
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x60f277f3	cxgb3_insert_tid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x7feb8afd	cxgb3_queue_tid_release
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x80a5feca	cxgb3_remove_tid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x82746469	cxgb3_free_stid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x91a45d93	cxgb3_register_client
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x93872871	t3_l2e_free
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x9addc4ec	cxgb3_alloc_atid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xa56ab708	t3_l2t_send_event
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xe799a948	t3_register_cpl_handler
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xeddd4a19	dev2t3cdev
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xf44ef4f2	cxgb3_unregister_client
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x7b9f29ea	hdlcdrv_receiver
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x8c9d0ce3	hdlcdrv_register
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x8e222d5c	hdlcdrv_arbitrate
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xf238eab4	hdlcdrv_transmitter
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xf29d62f1	hdlcdrv_unregister
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x150bda12	irda_unregister_dongle
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x184c0ee1	sirdev_put_instance
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x1da6dcf4	sirdev_set_dongle
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x22cbc8a5	sirdev_raw_read
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x67c32234	sirdev_write_complete
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x69e9b4dd	sirdev_set_dtr_rts
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x6b72054e	sirdev_receive
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xb3db2f5a	sirdev_get_instance
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xb9f22f99	irda_register_dongle
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xd1dd040f	sirdev_raw_write
+EXPORT_SYMBOL drivers/net/mdio 0x0f934475	mdio45_ethtool_gset_npage
+EXPORT_SYMBOL drivers/net/mdio 0x22bce513	mdio_mii_ioctl
+EXPORT_SYMBOL drivers/net/mdio 0x43e4defc	mdio45_nway_restart
+EXPORT_SYMBOL drivers/net/mdio 0x7577f992	mdio_set_flag
+EXPORT_SYMBOL drivers/net/mdio 0xa1a29548	mdio45_probe
+EXPORT_SYMBOL drivers/net/mdio 0xb34a7575	mdio45_ethtool_spauseparam_an
+EXPORT_SYMBOL drivers/net/mdio 0xc6b1163f	mdio45_links_ok
+EXPORT_SYMBOL drivers/net/mii 0x00231a75	mii_link_ok
+EXPORT_SYMBOL drivers/net/mii 0x029c421c	mii_check_media
+EXPORT_SYMBOL drivers/net/mii 0x16a46718	mii_check_link
+EXPORT_SYMBOL drivers/net/mii 0x1b56533c	mii_ethtool_sset
+EXPORT_SYMBOL drivers/net/mii 0xad6ef130	mii_ethtool_gset
+EXPORT_SYMBOL drivers/net/mii 0xb3a90f36	mii_check_gmii_support
+EXPORT_SYMBOL drivers/net/mii 0xd36e9014	generic_mii_ioctl
+EXPORT_SYMBOL drivers/net/mii 0xf0e6dbee	mii_nway_restart
+EXPORT_SYMBOL drivers/net/pppox 0x1f109f5c	pppox_ioctl
+EXPORT_SYMBOL drivers/net/pppox 0x23a8b945	register_pppox_proto
+EXPORT_SYMBOL drivers/net/pppox 0x3e5554a5	pppox_unbind_sock
+EXPORT_SYMBOL drivers/net/pppox 0xe0ff7a18	unregister_pppox_proto
+EXPORT_SYMBOL drivers/net/sungem_phy 0x323a881e	mii_phy_probe
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x0b1dc071	tmsdev_term
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x379a6acf	tms380tr_netdev_ops
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x749495b5	tmsdev_init
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x89fa2437	tms380tr_open
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xc512d466	tms380tr_close
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd2328794	tms380tr_wait
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd49af46e	tms380tr_interrupt
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x38da4725	cycx_intr
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x62be23ea	cycx_setup
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x66a4c4e6	cycx_down
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x968458a6	cycx_peek
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xb6f383de	cycx_poke
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xfe7cd576	cycx_exec
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x44ab75d0	hdlc_ioctl
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x5562208a	alloc_hdlcdev
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x5ad561a9	hdlc_start_xmit
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x6d827848	hdlc_change_mtu
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x76a0b26b	register_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xa072e39f	detach_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xab3aadbe	attach_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xc1d66e64	unregister_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xc6bd7f76	hdlc_open
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xc6c0be50	hdlc_close
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xfafc35be	unregister_hdlc_device
+EXPORT_SYMBOL drivers/net/wan/z85230 0x0cd25079	z8530_sync_open
+EXPORT_SYMBOL drivers/net/wan/z85230 0x10c78988	z8530_dead_port
+EXPORT_SYMBOL drivers/net/wan/z85230 0x147262be	z8530_sync_dma_open
+EXPORT_SYMBOL drivers/net/wan/z85230 0x213abac6	z8530_interrupt
+EXPORT_SYMBOL drivers/net/wan/z85230 0x447cb362	z8530_sync
+EXPORT_SYMBOL drivers/net/wan/z85230 0x485c3e13	z8530_null_rx
+EXPORT_SYMBOL drivers/net/wan/z85230 0x4f307092	z8530_queue_xmit
+EXPORT_SYMBOL drivers/net/wan/z85230 0x5cd24d29	z8530_hdlc_kilostream
+EXPORT_SYMBOL drivers/net/wan/z85230 0x639abb9c	z8530_describe
+EXPORT_SYMBOL drivers/net/wan/z85230 0x96ebf121	z8530_shutdown
+EXPORT_SYMBOL drivers/net/wan/z85230 0xcaadb473	z8530_sync_close
+EXPORT_SYMBOL drivers/net/wan/z85230 0xcfb54352	z8530_sync_dma_close
+EXPORT_SYMBOL drivers/net/wan/z85230 0xde13811e	z8530_channel_load
+EXPORT_SYMBOL drivers/net/wan/z85230 0xdf856555	z8530_sync_txdma_close
+EXPORT_SYMBOL drivers/net/wan/z85230 0xe0f0529f	z8530_init
+EXPORT_SYMBOL drivers/net/wan/z85230 0xe3d80064	z8530_hdlc_kilostream_85230
+EXPORT_SYMBOL drivers/net/wan/z85230 0xf6b81e1f	z8530_nop
+EXPORT_SYMBOL drivers/net/wan/z85230 0xfe2e3f24	z8530_sync_txdma_open
+EXPORT_SYMBOL drivers/net/wireless/airo 0x8046bd8f	stop_airo_card
+EXPORT_SYMBOL drivers/net/wireless/airo 0xba6b4183	reset_airo_card
+EXPORT_SYMBOL drivers/net/wireless/airo 0xfa248d36	init_airo_card
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x2b9421a4	ath_regd_init
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x31219afb	ath_is_world_regd
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xbc956b8a	ath_reg_notifier_apply
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xbe25b39d	ath_regd_get_band_ctl
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xd4087dcd	ath_rxbuf_alloc
+EXPORT_SYMBOL drivers/net/wireless/atmel 0x49c101cf	stop_atmel_card
+EXPORT_SYMBOL drivers/net/wireless/atmel 0x9c3d0cf0	init_atmel_card
+EXPORT_SYMBOL drivers/net/wireless/atmel 0xda9e9abb	atmel_open
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x0f066f35	hostap_init_ap_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x1b7b98b3	hostap_init_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x2cc7e861	hostap_check_sta_fw_version
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x30390ac8	hostap_get_porttype
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x32a53467	hostap_setup_dev
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x34d1c28a	hostap_handle_sta_tx_exc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x433072a1	hostap_add_interface
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x5200b69b	hostap_master_start_xmit
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x55c363fb	prism2_update_comms_qual
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x6d1bc7d2	hostap_set_roaming
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x6e705f80	hostap_set_encryption
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x7f55a924	hostap_set_multicast_list_queue
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x84be07a6	hostap_info_process
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x8ae00d1c	hostap_remove_interface
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x9618dbd6	hostap_set_hostapd
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x9b70cfec	hostap_remove_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa12ad27f	hostap_dump_tx_header
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xad10deb9	hostap_set_hostapd_sta
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb2a945e0	hostap_dump_rx_header
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb4b77c8b	hostap_80211_get_hdrlen
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xbc9dc204	hostap_set_auth_algs
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xbe065131	hostap_init_data
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xc0066ed1	hostap_set_string
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xd5289ddd	hostap_80211_rx
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf0bffff7	hostap_info_init
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf76f9bf6	hostap_free_data
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf8501d20	hostap_set_antsel
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xfa9864c2	hostap_set_word
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xfdf7741b	hostap_80211_ops
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x00e786b8	libipw_rx_mgt
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x148e214d	free_ieee80211
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x16d4ce4c	libipw_wx_get_encode
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x1e9ddaad	libipw_is_valid_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x3331e650	libipw_channel_to_freq
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x565e2846	libipw_wx_set_encode
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x6da33abb	libipw_get_channel_flags
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x806134c2	libipw_txb_free
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xa1fa1177	libipw_change_mtu
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xa329d9fc	libipw_xmit
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xb08290a6	alloc_ieee80211
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xbcfaa836	libipw_rx
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xc9c93d8d	libipw_freq_to_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xca88006b	libipw_networks_age
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xdb91df1a	libipw_get_geo
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xe1783522	libipw_wx_get_encodeext
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xe9a68ee0	libipw_wx_set_encodeext
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xf24ae980	libipw_channel_to_index
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xf7075016	libipw_set_geo
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xf81d3cc4	libipw_get_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xfb438c02	libipw_wx_get_scan
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x005420ca	iwl_rx_missed_beacon_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x009f7b39	iwl_txq_ctx_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x00e18487	iwl_mac_remove_interface
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x029d0c0b	iwl_rx_queue_alloc
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x059624f9	iwl_check_rxon_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x07f628e2	iwl_is_monitor_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x08167ac7	iwlcore_eeprom_enhanced_txpower
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0ba0f9a1	iwlcore_init_geos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x11320b11	iwl_rx_pm_debug_statistics_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1137430f	iwl_rx_replenish
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x134bf176	iwl_leds_register
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x15bb0185	iwl_tt_exit_ct_kill
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x18a8ff0f	iwl_rxon_add_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x19f0e900	iwl_debug_level
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1abe4165	iwl_free_tfds_in_queue
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1c3b1309	iwl_leds_unregister
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1cc996be	iwl_find_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1ce22fab	iwl_send_calib_results
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d77b399	iwl_bcast_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d9b4a5c	iwl_setup_mac
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1f21dd1c	iwl_rx_queue_restock
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1fb38270	iwl_free_channel_map
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x20208822	iwl_bss_info_changed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x215f2631	iwl_eeprom_check_version
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2275f213	iwl_tx_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x235be4b4	iwl_tx_skb
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x275679e2	iwl_sta_rx_agg_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2b7bbcf0	iwl_setup_scan_deferred_work
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2d2d9a64	iwl_send_static_wepkey_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x305354fc	iwl_rx_reply_rx_phy
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x319063f5	iwl_ht_enabled
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x32649232	iwl_rxq_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3411706b	iwl_set_rxon_chain
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x36028c75	iwl_eeprom_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x399ebfa7	iwl_send_cmd_pdu_async
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x39a774ea	iwlcore_free_geos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3a119e40	iwl_get_active_dwell_time
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3aa74657	iwl_hwrate_to_tx_control
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3f96f0d4	iwl_eeprom_query16
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x47086820	iwl_rx_reply_compressed_ba
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x48f5b566	iwl_tx_cmd_complete
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x49065c7d	iwl_rx_queue_update_write_ptr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x492f3d52	iwl_reset_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4ccd5598	iwl_cmd_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4d36a983	iwl_send_add_sta
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x518401e1	iwl_clear_stations_table
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x521145b6	iwl_verify_ucode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5587ebf1	iwl_mac_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x56735ecd	iwl_send_lq_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x57cbf908	iwl_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5d8326ed	iwl_fill_probe_req
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5eec625c	iwl_set_rxon_hwcrypto
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x60774702	iwl_queue_space
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x62727d56	iwl_calib_set
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x632b53a3	iwl_set_rxon_channel
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x66c42c7e	iwl_reset_qos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x68fab378	iwl_mac_add_interface
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6ad8549b	iwl_disable_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6eb0bfaa	iwl_tt_initialize
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6f41991e	iwl_tx_agg_start
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x70e41d24	iwl_tx_ant_restriction
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x72e65743	iwl_activate_qos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x78976e61	iwl_isr_legacy
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x789c0eb8	iwl_hw_nic_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7a9aa735	iwl_get_passive_dwell_time
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7bcd3763	iwl_set_decrypted_flag
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7ec1ac4e	iwl_sta_rx_agg_start
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7fa98353	iwl_get_sta_id
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8209b918	iwl_rx_pm_sleep_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x82bd268c	iwl_get_free_ucode_key_index
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x838ccf96	iwl_send_statistics_request
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8670273d	iwl_hwrate_to_plcp_idx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x88b3c120	iwl_mac_hw_scan
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x88dc838d	iwlcore_eeprom_verify_signature
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8913c19d	iwl_rx_replenish_now
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8a40d89d	iwl_power_initialize
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8da8e789	iwl_tx_queue_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8def4765	iwl_mac_beacon_update
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8eeb4031	iwl_setup_rxon_timing
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9111aca9	iwl_rf_kill_ct_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x91d142be	iwl_init_sensitivity
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9406cd34	iwl_sta_tx_modify_enable_tid
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9480e5b2	iwl_txq_update_write_ptr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x94df7d98	iwl_tx_agg_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x956864c3	iwl_hw_detect
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9a60af0b	iwl_bg_scan_check
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9b8e6b2c	iwl_connection_init_rx_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9d359129	iwl_sensitivity_calibration
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9e206c48	iwl_rx_csa
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9e86e8e0	iwl_bg_abort_scan
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9e98b44d	iwl_mac_get_tx_stats
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9ed875ba	iwl_set_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa0ebb514	iwl_configure_filter
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa14d04f8	iwl_send_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa4221329	iwl_tt_enter_ct_kill
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa7cf04ba	iwl_pci_resume
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa8218c4d	iwl_scan_cancel
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaad0846e	iwl_bg_scan_completed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb1317c0e	iwl_init_drv
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb71298ad	iwl_chain_noise_calibration
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb825739a	iwl_get_ra_sta_id
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb99679e8	iwl_free_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb9f92b9b	iwl_add_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbada25a1	iwl_is_ht40_tx_allowed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbc016adf	iwlcore_eeprom_release_semaphore
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbe6853d2	iwl_reset_run_time_calib
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc16d510d	iwl_send_bt_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc1d567c0	iwl_eeprom_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc24b846a	iwl_tt_exit
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc459a332	iwl_rx_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc59699d5	iwl_irq_handle_error
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc82b7831	iwl_rx_statistics
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcbaf4931	get_cmd_string
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcbd5546f	iwl_tt_handler
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcde29312	iwl_eeprom_query_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcf719417	iwl_update_tkip_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcff9b942	iwl_init_channel_map
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd08e9602	iwl_set_dynamic_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd5f09ed2	iwl_uninit_drv
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd67d19e4	iwl_rx_reply_error
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd6ba6709	iwl_txq_check_empty
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd781eddf	iwl_alloc_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd9c4ce57	iwl_set_hw_params
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdd220718	iwl_alloc_all
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdd8a6f41	iwl_mac_reset_tsf
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe02ca826	iwl_remove_dynamic_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe0704978	iwl_send_cmd_sync
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe20886e6	iwl_rx_queue_space
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe22c926c	iwl_scan_cancel_timeout
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe7ce5d70	iwl_rates
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe916f0d4	iwl_set_tx_power
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe958b094	iwl_mac_conf_tx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe98f870a	iwl_get_channel_info
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xeb87c49a	iwl_rx_reply_rx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xedc760e6	iwl_full_rxon_required
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xedcdd0f9	iwl_set_default_wep_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xee10b5fe	iwl_send_cmd_pdu
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xef66038f	iwl_power_update_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xef7b8422	iwl_pci_suspend
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf54d697c	iwl_rate_get_lowest_plcp
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf5bc26e9	iwl_setup_rx_scan_handlers
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf9de6cc6	iwlcore_eeprom_acquire_semaphore
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfa0c1d16	iwl_remove_default_wep_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfa6a60dc	iwl_tx_queue_reclaim
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfc2f9935	iwl_eeprom_get_mac
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfdcfe8f2	iwlcore_eeprom_query_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfe764d3e	iwl_hw_txq_ctx_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xff05bcb9	iwl_set_rxon_ht
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x03a7275c	orinoco_up
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x308ae83d	orinoco_if_del
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x4196c38b	hermes_write_ltv
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x6a927e18	orinoco_interrupt
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xa031d8e4	hermes_doicmd_wait
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xa12db1e0	orinoco_init
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xbd097bc3	free_orinocodev
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc60b5e9e	hermes_bap_pwrite
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xce9debdf	orinoco_if_add
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd38d8ae2	hermes_read_ltv
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd3f714e5	hermes_bap_pread
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5168829	hermes_allocate
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5336e5d	hermes_init
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd54e219d	hermes_docmd_wait
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xe938f0b9	alloc_orinocodev
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xecd7d951	orinoco_down
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xed47b224	hermes_struct_init
+EXPORT_SYMBOL drivers/parport/parport 0x1d28b3c6	parport_find_number
+EXPORT_SYMBOL drivers/parport/parport 0x22e27279	parport_ieee1284_epp_read_addr
+EXPORT_SYMBOL drivers/parport/parport 0x237fb137	parport_register_port
+EXPORT_SYMBOL drivers/parport/parport 0x2a5df8a3	parport_ieee1284_ecp_read_data
+EXPORT_SYMBOL drivers/parport/parport 0x35ebc84e	parport_announce_port
+EXPORT_SYMBOL drivers/parport/parport 0x36d5c0ac	parport_register_device
+EXPORT_SYMBOL drivers/parport/parport 0x395fb9a6	parport_remove_port
+EXPORT_SYMBOL drivers/parport/parport 0x3de66103	parport_wait_peripheral
+EXPORT_SYMBOL drivers/parport/parport 0x3faa9c96	parport_release
+EXPORT_SYMBOL drivers/parport/parport 0x4d2a941b	parport_ieee1284_interrupt
+EXPORT_SYMBOL drivers/parport/parport 0x5033a6ca	parport_set_timeout
+EXPORT_SYMBOL drivers/parport/parport 0x5321dbbf	parport_ieee1284_read_nibble
+EXPORT_SYMBOL drivers/parport/parport 0x5d7b466b	parport_write
+EXPORT_SYMBOL drivers/parport/parport 0x6a14b72c	parport_get_port
+EXPORT_SYMBOL drivers/parport/parport 0x75788e2e	parport_unregister_device
+EXPORT_SYMBOL drivers/parport/parport 0x915f494e	parport_claim_or_block
+EXPORT_SYMBOL drivers/parport/parport 0x9d5eff70	parport_irq_handler
+EXPORT_SYMBOL drivers/parport/parport 0x9e75ac95	parport_find_base
+EXPORT_SYMBOL drivers/parport/parport 0xad704e06	parport_wait_event
+EXPORT_SYMBOL drivers/parport/parport 0xb0558b64	parport_put_port
+EXPORT_SYMBOL drivers/parport/parport 0xc4035893	parport_ieee1284_write_compat
+EXPORT_SYMBOL drivers/parport/parport 0xc6437233	parport_claim
+EXPORT_SYMBOL drivers/parport/parport 0xcd8ce22c	parport_ieee1284_read_byte
+EXPORT_SYMBOL drivers/parport/parport 0xd1007992	parport_register_driver
+EXPORT_SYMBOL drivers/parport/parport 0xe065bd4a	parport_read
+EXPORT_SYMBOL drivers/parport/parport 0xe5dcf338	parport_unregister_driver
+EXPORT_SYMBOL drivers/parport/parport 0xf026c714	parport_negotiate
+EXPORT_SYMBOL drivers/parport/parport 0xf18c9b72	parport_ieee1284_epp_write_addr
+EXPORT_SYMBOL drivers/parport/parport 0xf2d3b231	parport_ieee1284_epp_write_data
+EXPORT_SYMBOL drivers/parport/parport 0xf9e108ee	parport_ieee1284_ecp_write_addr
+EXPORT_SYMBOL drivers/parport/parport 0xfa49c17b	parport_ieee1284_epp_read_data
+EXPORT_SYMBOL drivers/parport/parport 0xfabe21ad	parport_ieee1284_ecp_write_data
+EXPORT_SYMBOL drivers/parport/parport_pc 0x30ce83cf	parport_pc_probe_port
+EXPORT_SYMBOL drivers/parport/parport_pc 0xe46656fc	parport_pc_unregister_port
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x0db2437a	pcmcia_get_window
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x12560da0	pcmcia_request_configuration
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x223541a9	pcmcia_access_configuration_register
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x24ae6010	pcmcia_loop_config
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x3d1be91f	pcmcia_request_irq
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4fd033a0	pcmcia_error_func
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4fe3ac09	pcmcia_modify_configuration
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x6658bb33	pcmcia_request_io
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x6e32726a	pcmcia_disable_device
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x837f8af9	pcmcia_dev_present
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x98cf33c5	pcmcia_map_mem_page
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xae187f0f	pcmcia_request_window
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xc6f3281e	pcmcia_unregister_driver
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xd26579d4	pcmcia_register_driver
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xd4d75d5d	pcmcia_release_window
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xec1c8a5f	pcmcia_get_mem_page
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf0a25e12	pcmcia_error_ret
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x00a8f1f8	pcmcia_parse_events
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x00abd297	pcmcia_get_socket_by_nr
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x0658911c	pcmcia_find_mem_region
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x0ee68bf5	pcmcia_register_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x16352536	pccard_get_tuple_data
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x212db8d2	pcmcia_socket_list
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x235afee4	destroy_cis_cache
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x30d4f497	pcmcia_find_io_region
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x40195229	pcmcia_validate_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x4ca002ee	pccard_static_ops
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x55d81c3d	pcmcia_resume_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x59428768	pcmcia_socket_dev_late_resume
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x5f42a69d	pcmcia_socket_list_rwsem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x61ce571a	pccard_validate_cis
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x65129e60	pccard_register_pcmcia
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x6fe07265	pcmcia_replace_cis
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x80ece5a0	pcmcia_eject_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x81d298fc	pcmcia_put_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xa17d3caa	pccard_get_next_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xa42bd86a	pcmcia_suspend_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xa878fedf	pcmcia_get_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xafe9bee1	pccard_get_first_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xb2b68484	pcmcia_insert_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc02ef2c8	pcmcia_parse_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc6a7c8b1	pcmcia_socket_dev_suspend
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcc5b281e	pcmcia_socket_dev_resume
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcf97f3bd	dead_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcfa74332	pccard_read_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xd2124f68	pcmcia_adjust_io_region
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xd6638c98	pcmcia_unregister_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xd9488abb	release_cis_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xdf42a26c	pcmcia_read_cis_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf09c4aa3	pcmcia_reset_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf392ba39	pcmcia_socket_dev_early_resume
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf6b00823	pcmcia_write_cis_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xf879c000	pcmcia_socket_class
+EXPORT_SYMBOL drivers/pcmcia/rsrc_nonstatic 0x64af4a65	pccard_nonstatic_ops
+EXPORT_SYMBOL drivers/platform/x86/sony-laptop 0x5bb1e117	sony_pic_camera_command
+EXPORT_SYMBOL drivers/pps/pps_core 0x1e145952	pps_unregister_source
+EXPORT_SYMBOL drivers/pps/pps_core 0x7c08bec3	pps_register_source
+EXPORT_SYMBOL drivers/pps/pps_core 0xe6a16116	pps_event
+EXPORT_SYMBOL drivers/scsi/53c700 0x69270487	NCR_700_release
+EXPORT_SYMBOL drivers/scsi/53c700 0xc569a822	NCR_700_detect
+EXPORT_SYMBOL drivers/scsi/53c700 0xf13d9adc	NCR_700_intr
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x036cd65f	fcoe_ctlr_init
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x2ff89a8b	fcoe_ctlr_recv
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x47c34355	fcoe_ctlr_link_up
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x4aeb0739	fcoe_ctlr_destroy
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x6c91f7b4	fcoe_ctlr_els_send
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xbda75d7e	fcoe_ctlr_recv_flogi
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xf049cfc0	fcoe_ctlr_link_down
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x053c140f	fc_queuecommand
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x05f2fbf9	fc_fabric_logoff
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x076a0909	fc_seq_start_next
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0a579dfd	fc_fcp_complete
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0a75553a	fc_rport_terminate_io
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0bda63ae	fc_seq_els_rsp_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x106849d3	fc_exch_mgr_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1625a186	fc_get_host_port_type
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1b7eae00	fc_seq_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x223aebab	fc_fcp_ddp_setup
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x2ac8acfd	fc_get_host_port_state
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x35b7b368	fc_eh_device_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x35c8db95	fc_get_host_speed
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x36e5fbaf	fc_cpu_mask
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x372b6a2d	fc_linkdown
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x379e8203	fc_exch_mgr_del
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x52219e1a	fc_fcp_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x56183917	fc_destroy_rport
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x67750428	fc_exch_done
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x68217da0	fc_exch_mgr_free
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6f6b64ff	fc_exch_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x75d6c3c0	fc_exch_recv
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x79648f8b	fc_rport_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x7ebe77d8	fc_linkup
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x801c9ed6	fc_lport_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x8b2b0107	fc_exch_mgr_add
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x8d9c6a60	fc_lport_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x939adc40	fc_get_host_stats
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x99424d85	fc_frame_crc_check
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa2c8af59	fc_lport_destroy
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa6ba2246	fc_change_queue_depth
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb29c160f	fc_exch_mgr_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb4f3588a	__fc_frame_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xc14bfb79	fc_exch_seq_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xc71ad3df	fc_eh_abort
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd0a0ab51	fc_exch_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd33214f0	fc_fabric_login
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd438573b	fc_change_queue_type
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd6cb3359	fc_setup_rport
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd81db9f4	fc_slave_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd9c4ba6c	fc_eh_host_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xdbbaacfa	fc_fcp_destroy
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe4ff543c	fc_set_rport_loss_tmo
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf126ef0d	fc_elsct_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf3212bc8	fc_lport_config
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf7365d60	fc_seq_exch_abort
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xfcf34f54	fc_disc_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xfdb0b308	fc_set_mfs
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x2250c66e	mraid_mm_adapter_app_handle
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x512c956d	mraid_mm_unregister_adp
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0xb269e215	mraid_mm_register_adp
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x00a2fe42	osd_req_flush_obsd
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x01d72d47	osd_req_write_kern
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0a23055a	osd_req_set_attributes
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0c17edb1	osd_sec_init_nosec_doall_caps
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x148983f0	osd_req_add_get_attr_page
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x154c0066	osd_execute_request_async
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x17c08838	osd_req_remove_object
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x1aa0e69e	osd_req_get_attributes
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x1de20154	osd_req_remove_partition
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x26feaab6	osd_execute_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x2ea3873d	osd_req_write
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x35f9451e	osd_req_list_partition_objects
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x3a77d129	osd_req_create_object
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x45114f0d	osd_finalize_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x618988d1	osd_req_list_collection_objects
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x687da7fa	osd_end_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x8a34ee63	osd_req_flush_collection
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x8ca0dc18	osd_req_flush_partition
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x94fa30c0	osd_req_list_dev_partitions
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x9859a662	osd_req_add_set_attr_list
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x9aef2c19	osd_req_decode_get_attr_list
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xae455173	osd_auto_detect_ver
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xb8f7c45c	osd_req_flush_object
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xb9763e32	osd_req_read_kern
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xbcc516ef	osd_req_add_get_attr_list
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xc69cb102	osd_req_list_partition_collections
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xccd1b153	osd_req_decode_sense_full
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xd34e11f0	osd_req_format
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xd6002d04	osd_dev_fini
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xd780524b	osd_dev_init
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xdb73e556	osd_req_create_partition
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe5c32b43	osd_req_read
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xf32e1fa0	osd_start_request
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x569e9b96	osduld_path_lookup
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x5fc48609	osduld_unregister_test
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x8c03e906	osduld_put_device
+EXPORT_SYMBOL drivers/scsi/osd/osd 0xc6d384e6	osduld_register_test
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x21f22dd0	qlogicfas408_queuecommand
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x3fd8cd71	qlogicfas408_detect
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x5d54772e	qlogicfas408_abort
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x7f8871fb	qlogicfas408_biosparam
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x83a3567d	qlogicfas408_disable_ints
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x97c33742	qlogicfas408_info
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xdc310b12	qlogicfas408_ihandl
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xe76b3b20	qlogicfas408_get_chip_type
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xf2b95199	qlogicfas408_setup
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xf632becf	qlogicfas408_bus_reset
+EXPORT_SYMBOL drivers/scsi/raid_class 0x6fb03915	raid_component_add
+EXPORT_SYMBOL drivers/scsi/raid_class 0x96f610b7	raid_class_release
+EXPORT_SYMBOL drivers/scsi/raid_class 0xe3adb831	raid_class_attach
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x0e2943d8	fc_vport_terminate
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x10ce9e07	fc_release_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x15e86c87	fc_remote_port_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x15e9c2cb	fc_remote_port_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x38fcd4c8	fc_host_post_event
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x3d750d04	scsi_is_fc_rport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x6896fec8	fc_attach_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x6d577e31	scsi_is_fc_vport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x7954b1ea	fc_get_event_number
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x7a984b92	fc_remove_host
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xae435e4e	fc_host_post_vendor_event
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xd3daa69b	fc_remote_port_rolechg
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xf4dc6c63	fc_vport_create
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x0c447e59	scsi_is_sas_port
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x1d918399	sas_phy_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x25ef7d1a	sas_phy_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x3271bf6b	sas_attach_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x4d22068d	sas_release_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x547e14f9	sas_port_alloc_num
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x5ec2f83d	sas_port_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x7022ef5c	sas_end_device_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x899eff29	sas_rphy_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x8a064c1c	scsi_is_sas_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x8c6b6d2e	sas_remove_host
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x92d0ba38	sas_port_mark_backlink
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x9b2ab1bb	sas_port_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xa5b0d1e5	sas_phy_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xaf04e423	sas_rphy_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xb7d23e01	sas_port_add_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xc3647016	sas_port_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xc8a88174	sas_remove_children
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xc90d9c22	sas_rphy_remove
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xd0a20c6d	sas_rphy_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xd3c1b6b4	sas_read_port_mode_page
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xdc4ed995	sas_phy_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xe449873d	sas_expander_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xe687f6cf	sas_port_delete_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xeb1099d5	sas_port_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xf11030d3	scsi_is_sas_rphy
+EXPORT_SYMBOL drivers/ssb/ssb 0x05301868	ssb_bus_sdiobus_register
+EXPORT_SYMBOL drivers/ssb/ssb 0x1378bed4	ssb_driver_unregister
+EXPORT_SYMBOL drivers/ssb/ssb 0x1ef2a423	ssb_pcicore_dev_irqvecs_enable
+EXPORT_SYMBOL drivers/ssb/ssb 0x38208289	ssb_pmu_set_ldo_voltage
+EXPORT_SYMBOL drivers/ssb/ssb 0x49d540d5	ssb_clockspeed
+EXPORT_SYMBOL drivers/ssb/ssb 0x4bda11b6	__ssb_driver_register
+EXPORT_SYMBOL drivers/ssb/ssb 0x519593b8	ssb_pcihost_register
+EXPORT_SYMBOL drivers/ssb/ssb 0x6c34f71b	ssb_dma_set_mask
+EXPORT_SYMBOL drivers/ssb/ssb 0x7cfaf3bc	ssb_bus_unregister
+EXPORT_SYMBOL drivers/ssb/ssb 0x7dc7a791	ssb_dma_free_consistent
+EXPORT_SYMBOL drivers/ssb/ssb 0x80bdcdd2	ssb_bus_may_powerdown
+EXPORT_SYMBOL drivers/ssb/ssb 0x90ef6368	ssb_device_enable
+EXPORT_SYMBOL drivers/ssb/ssb 0x92c974fa	ssb_dma_alloc_consistent
+EXPORT_SYMBOL drivers/ssb/ssb 0xaa921782	ssb_bus_resume
+EXPORT_SYMBOL drivers/ssb/ssb 0xb44a85e8	ssb_pmu_set_ldo_paref
+EXPORT_SYMBOL drivers/ssb/ssb 0xbaa069f2	ssb_bus_suspend
+EXPORT_SYMBOL drivers/ssb/ssb 0xc0512e0f	ssb_admatch_base
+EXPORT_SYMBOL drivers/ssb/ssb 0xd1d73c1a	ssb_bus_powerup
+EXPORT_SYMBOL drivers/ssb/ssb 0xd4635b0f	ssb_bus_pcibus_register
+EXPORT_SYMBOL drivers/ssb/ssb 0xd481192b	ssb_admatch_size
+EXPORT_SYMBOL drivers/ssb/ssb 0xe19401bc	ssb_device_is_enabled
+EXPORT_SYMBOL drivers/ssb/ssb 0xefa6613a	ssb_device_disable
+EXPORT_SYMBOL drivers/ssb/ssb 0xf3f68fd1	ssb_dma_translation
+EXPORT_SYMBOL drivers/ssb/ssb 0xf86ac2f0	ssb_set_devtypedata
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x031a824e	comedi_buf_read_alloc
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x0c5d211a	comedi_driver_unregister
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x0cd330f4	range_unknown
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x2f0ad9d3	range_bipolar5
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x4054f339	comedi_driver_register
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x44af2230	comedi_buf_memcpy_to
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x4f5d3c86	comedi_buf_read_n_available
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x4fe634f3	range_bipolar2_5
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x62f51b76	check_chanlist
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x68669e1e	comedi_buf_read_free
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x7110ea46	comedi_buf_write_alloc
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x8113872c	range_unipolar10
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x816a4fc2	comedi_buf_put
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xa1152d0c	comedi_set_subdevice_runflags
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xb1409587	comedi_event
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xb3d0db62	comedi_error
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xb8b31765	comedi_get_subdevice_runflags
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xbb52fc7f	range_bipolar10
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xbe128fe1	comedi_buf_write_free
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xdad7e588	comedi_buf_get
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xdb2044b2	range_unipolar5
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xdfbddb64	comedi_reset_async_buf
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xe30a56d0	comedi_buf_memcpy_from
+EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0x35434005	subdev_8255_init
+EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0x575099e6	subdev_8255_cleanup
+EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0x721e53e1	subdev_8255_init_irq
+EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0xf850659f	subdev_8255_interrupt
+EXPORT_SYMBOL drivers/staging/comedi/drivers/comedi_fc 0x090d251e	cfc_read_array_from_buffer
+EXPORT_SYMBOL drivers/staging/comedi/drivers/comedi_fc 0x9aff4b5e	cfc_write_array_to_buffer
+EXPORT_SYMBOL drivers/staging/comedi/drivers/comedi_fc 0xec528100	cfc_handle_events
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x021e9dbb	mite_setup2
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x0529bbc6	mite_get_status
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x0e515970	mite_dma_tcr
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x134bf2ca	mite_release_channel
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x18fe0f1e	mite_bytes_in_transit
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x47ebf6e7	mite_buf_change
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x524b9e9f	mite_bytes_written_to_memory_lb
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x52b6ff27	mite_request_channel_in_range
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x56a3b28c	mite_bytes_read_from_memory_lb
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x59564595	mite_done
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x5cf3a73d	mite_prep_dma
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x61c6fff4	mite_dma_disarm
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x783c0c0f	mite_bytes_written_to_memory_ub
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x7cd4201c	mite_bytes_read_from_memory_ub
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x816cbade	mite_devices
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x8f422217	mite_sync_input_dma
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xaf90bbee	mite_unsetup
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xd083fc8c	mite_setup
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xd21b4f4a	mite_sync_output_dma
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xece3c4dd	mite_dma_arm
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xfb3ba025	mite_list_devices
+EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0x331fa3d5	subdev_700_init_irq
+EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0x4803dda3	subdev_700_init
+EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0xc08347e6	subdev_700_interrupt
+EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0xd07aeca2	subdev_700_cleanup
+EXPORT_SYMBOL drivers/staging/comedi/drivers/pcm_common 0x7ddd7675	comedi_pcm_cmdtest
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x042d55f4	comedi_loglevel
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x0488ce0e	comedi_get_n_ranges
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x0cad1c36	comedi_get_subdevice_type
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x13e3042c	comedi_command
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x194eb4ae	comedi_get_n_channels
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x1c5555d9	comedi_cancel
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x1ec0e2d3	comedi_get_buf_head_pos
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x22318694	comedi_set_user_int_count
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x262e9c18	comedi_dio_write
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x370d69d5	comedi_dio_read
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x3cb614fc	comedi_data_write
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x3db41e4f	comedi_poll
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x3de6a4a3	comedi_get_buffer_offset
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x409d3263	comedi_do_insn
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x51da786d	comedi_register_callback
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x52769094	comedi_find_subdevice_by_type
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x628ed463	comedi_get_n_subdevices
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x671c2623	comedi_get_buffer_size
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x696272c9	comedi_unlock
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x826bd656	comedi_data_read_delayed
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x8e199bbf	comedi_perror
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x8fb4413e	comedi_data_read_hint
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x9b266320	comedi_get_krange
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x9dde39b5	comedi_strerror
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xa0334b40	comedi_get_driver_name
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xa094eab0	comedi_get_board_name
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xa7c55c52	comedi_open
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xaa456501	comedi_mark_buffer_read
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xb45b8b7b	comedi_mark_buffer_written
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xb5396dad	comedi_get_maxdata
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xb5c3ac2a	comedi_map
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xc4ec62b3	comedi_get_len_chanlist
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xc7d949df	comedi_lock
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xd2a9a259	comedi_get_version_code
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xd46a9468	comedi_dio_config
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xd48facbb	comedi_command_test
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xddd89421	comedi_close
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xe2208940	comedi_data_read
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xe38c6fb4	comedi_unmap
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xed5731a4	comedi_get_subdevice_flags
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xefd0c778	comedi_fileno
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xf17e03df	comedi_dio_bitfield
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xf71581db	comedi_get_buffer_contents
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x1d9a1af3	cx25821_dev_unregister
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x257a2c3d	cx25821_sram_channel_dump_audio
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x2b70a02f	cx25821_risc_databuffer_audio
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x471e1cfb	cx25821_devlist
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x56c41370	cx25821_sram_channel_setup_audio
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x67cc5b8b	cx25821_sram_channels
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x726063f7	cx25821_sram_channel_dump
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x784853c3	cx25821_print_irqbits
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0xb5485b40	cx25821_dev_get
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0xb9655a54	cx25821_set_gpiopin_direction
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0xe7e08cfb	cx25821_sram_channel_setup
+EXPORT_SYMBOL drivers/staging/hv/hv_vmbus 0x1cb36e36	vmbus_child_driver_register
+EXPORT_SYMBOL drivers/staging/hv/hv_vmbus 0x1f07d908	vmbus_child_driver_unregister
+EXPORT_SYMBOL drivers/staging/hv/hv_vmbus 0x253f3d14	vmbus_get_interface
+EXPORT_SYMBOL drivers/staging/hv/hv_vmbus 0xdf1a5ef6	vmbus_loglevel
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x132b46fd	iio_unregister_interrupt_line
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x1df1425b	iio_device_register
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x60f7253a	iio_free_idr_val
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x739ae300	iio_devt
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x853f3182	__iio_push_event
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x8d964581	iio_device_unregister
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x9a65da1d	iio_register_interrupt_line
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xa0d70353	iio_remove_event_from_list
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xa8584d90	iio_read_const_attr
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xb6edaf14	iio_get_new_idr_val
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xb7b3d087	iio_class
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xbb5b7a24	iio_allocate_device
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xcb842df9	__iio_change_event
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xe27d1d94	iio_push_event
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xed82e437	iio_free_device
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xf65a4566	iio_add_event_to_list
+EXPORT_SYMBOL drivers/staging/line6/line6usb 0x3b384191	variax_create_files
+EXPORT_SYMBOL drivers/staging/line6/line6usb 0x930e38c0	pod_remove_files
+EXPORT_SYMBOL drivers/staging/line6/line6usb 0x953c895f	pod_create_files
+EXPORT_SYMBOL drivers/staging/line6/line6usb 0xd99ba29e	variax_remove_files
+EXPORT_SYMBOL drivers/staging/rar/rar_driver 0xf8017f03	get_rar_address
+EXPORT_SYMBOL drivers/staging/vme/vme 0x00d7e722	vme_lm_count
+EXPORT_SYMBOL drivers/staging/vme/vme 0x06348f2a	vme_unregister_driver
+EXPORT_SYMBOL drivers/staging/vme/vme 0x072f901c	vme_master_rmw
+EXPORT_SYMBOL drivers/staging/vme/vme 0x0e10859d	vme_lm_get
+EXPORT_SYMBOL drivers/staging/vme/vme 0x0ec5babe	vme_dma_free
+EXPORT_SYMBOL drivers/staging/vme/vme 0x3f68d4cf	vme_lm_set
+EXPORT_SYMBOL drivers/staging/vme/vme 0x41862ad4	vme_alloc_consistent
+EXPORT_SYMBOL drivers/staging/vme/vme 0x48b99a13	vme_lm_free
+EXPORT_SYMBOL drivers/staging/vme/vme 0x494fee0c	vme_dma_list_free
+EXPORT_SYMBOL drivers/staging/vme/vme 0x4e626633	vme_slave_request
+EXPORT_SYMBOL drivers/staging/vme/vme 0x59482f1a	vme_bus_type
+EXPORT_SYMBOL drivers/staging/vme/vme 0x5d64b1bf	vme_register_bridge
+EXPORT_SYMBOL drivers/staging/vme/vme 0x656a0601	vme_free_irq
+EXPORT_SYMBOL drivers/staging/vme/vme 0x6666140f	vme_dma_pci_attribute
+EXPORT_SYMBOL drivers/staging/vme/vme 0x686ce4ed	vme_request_dma
+EXPORT_SYMBOL drivers/staging/vme/vme 0x6bd19c06	vme_request_irq
+EXPORT_SYMBOL drivers/staging/vme/vme 0x76bab4d4	vme_master_set
+EXPORT_SYMBOL drivers/staging/vme/vme 0x7797a741	vme_dma_vme_attribute
+EXPORT_SYMBOL drivers/staging/vme/vme 0x7cdbe838	vme_generate_irq
+EXPORT_SYMBOL drivers/staging/vme/vme 0x7cf35220	vme_master_free
+EXPORT_SYMBOL drivers/staging/vme/vme 0x7d2f3eae	vme_unregister_bridge
+EXPORT_SYMBOL drivers/staging/vme/vme 0x7fde2edb	vme_master_read
+EXPORT_SYMBOL drivers/staging/vme/vme 0x83fd3025	vme_new_dma_list
+EXPORT_SYMBOL drivers/staging/vme/vme 0x8c34274d	vme_master_request
+EXPORT_SYMBOL drivers/staging/vme/vme 0x90695906	vme_free_consistent
+EXPORT_SYMBOL drivers/staging/vme/vme 0x92fa5abb	vme_lm_detach
+EXPORT_SYMBOL drivers/staging/vme/vme 0x9aeb07e8	vme_lm_attach
+EXPORT_SYMBOL drivers/staging/vme/vme 0xa03dc9b6	vme_register_driver
+EXPORT_SYMBOL drivers/staging/vme/vme 0xa18fd85b	vme_lm_request
+EXPORT_SYMBOL drivers/staging/vme/vme 0xa7502e85	vme_dma_list_add
+EXPORT_SYMBOL drivers/staging/vme/vme 0xba9e73a1	vme_dma_list_exec
+EXPORT_SYMBOL drivers/staging/vme/vme 0xc8352002	vme_dma_pattern_attribute
+EXPORT_SYMBOL drivers/staging/vme/vme 0xcc5b0af0	vme_slave_set
+EXPORT_SYMBOL drivers/staging/vme/vme 0xd797b9a5	vme_master_write
+EXPORT_SYMBOL drivers/staging/vme/vme 0xdff905e5	vme_slave_free
+EXPORT_SYMBOL drivers/staging/vme/vme 0xe60cbb2f	vme_master_get
+EXPORT_SYMBOL drivers/staging/vme/vme 0xe61b1e0b	vme_slave_get
+EXPORT_SYMBOL drivers/staging/vme/vme 0xe693a6ce	vme_get_size
+EXPORT_SYMBOL drivers/staging/vme/vme 0xeccbeafc	vme_dma_free_attribute
+EXPORT_SYMBOL drivers/staging/vme/vme 0xf565caaa	vme_slot_get
+EXPORT_SYMBOL drivers/telephony/ixj 0xfd7a18b8	ixj_pcmcia_probe
+EXPORT_SYMBOL drivers/telephony/phonedev 0x5a1b1a1e	phone_register_device
+EXPORT_SYMBOL drivers/telephony/phonedev 0xb786d497	phone_unregister_device
+EXPORT_SYMBOL drivers/usb/gadget/dummy_hcd 0x2cabd10f	net2280_set_fifo_mode
+EXPORT_SYMBOL drivers/usb/gadget/dummy_hcd 0x4e0f0a13	usb_gadget_register_driver
+EXPORT_SYMBOL drivers/usb/gadget/dummy_hcd 0x6efee9a7	usb_gadget_unregister_driver
+EXPORT_SYMBOL drivers/usb/host/sl811-hcd 0x2428e711	sl811h_driver
+EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xa64a4cea	usb_nop_xceiv_unregister
+EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xd0e43207	usb_nop_xceiv_register
+EXPORT_SYMBOL drivers/usb/serial/usbserial 0x2b5554f9	usb_serial_resume
+EXPORT_SYMBOL drivers/usb/serial/usbserial 0x5ca685d4	usb_serial_suspend
+EXPORT_SYMBOL drivers/video/backlight/generic_bl 0xc86baa7c	corgibl_limit_intensity
+EXPORT_SYMBOL drivers/video/backlight/lcd 0x662127fd	lcd_device_unregister
+EXPORT_SYMBOL drivers/video/backlight/lcd 0xb65a4320	lcd_device_register
+EXPORT_SYMBOL drivers/video/console/bitblit 0x34ad19e6	fbcon_set_bitops
+EXPORT_SYMBOL drivers/video/console/font 0x09c8eb55	font_vga_8x16
+EXPORT_SYMBOL drivers/video/console/font 0xbb99125c	get_default_font
+EXPORT_SYMBOL drivers/video/console/font 0xf7584a9c	find_font
+EXPORT_SYMBOL drivers/video/console/softcursor 0x6b16c857	soft_cursor
+EXPORT_SYMBOL drivers/video/console/tileblit 0xfb1818c4	fbcon_set_tileops
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x0cc3ede5	cyber2000fb_detach
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x3cd0fbae	cyber2000fb_disable_extregs
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x6c1b3f20	cyber2000fb_get_fb_var
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x92e95957	cyber2000fb_attach
+EXPORT_SYMBOL drivers/video/cyber2000fb 0xa9f81f1a	cyber2000fb_enable_extregs
+EXPORT_SYMBOL drivers/video/display/display 0x2e01e3c5	display_device_register
+EXPORT_SYMBOL drivers/video/display/display 0xfe40e88e	display_device_unregister
+EXPORT_SYMBOL drivers/video/macmodes 0x08ed0b62	mac_vmode_to_var
+EXPORT_SYMBOL drivers/video/macmodes 0x4c661a8e	mac_find_mode
+EXPORT_SYMBOL drivers/video/macmodes 0xe2304303	mac_map_monitor_sense
+EXPORT_SYMBOL drivers/video/matrox/g450_pll 0x4d601aaf	g450_mnp2f
+EXPORT_SYMBOL drivers/video/matrox/g450_pll 0x6ce6f86c	matroxfb_g450_setpll_cond
+EXPORT_SYMBOL drivers/video/matrox/g450_pll 0x8b1076fc	matroxfb_g450_setclk
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0x1340d727	matrox_mystique
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0x29c83378	matrox_G100
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0x6d47932f	DAC1064_global_restore
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0x8f1bc7c7	DAC1064_global_init
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_Ti3026 0x91aec813	matrox_millennium
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_accel 0xb2d9a760	matrox_cfbX_init
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0x041df2aa	matroxfb_wait_for_sync
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0x1565f62c	matroxfb_enable_irq
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0x94a6299d	matroxfb_register_driver
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0x9960b610	matroxfb_unregister_driver
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_g450 0x86534092	matroxfb_g450_connect
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_g450 0xc41e9c4d	matroxfb_g450_shutdown
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x15246ff6	matroxfb_DAC_in
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x25cf8049	matroxfb_PLL_calcclock
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x95463149	matroxfb_read_pins
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0xabd8e427	matroxfb_var2my
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0xae901c66	matroxfb_DAC_out
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0xcccee368	matroxfb_vgaHWrestore
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0xf9321f9f	matroxfb_vgaHWinit
+EXPORT_SYMBOL drivers/video/output 0x3f513bd4	video_output_register
+EXPORT_SYMBOL drivers/video/output 0x4d3898c4	video_output_unregister
+EXPORT_SYMBOL drivers/video/sis/sisfb 0x3037658e	sis_malloc
+EXPORT_SYMBOL drivers/video/sis/sisfb 0x454a3cf0	sis_free
+EXPORT_SYMBOL drivers/video/svgalib 0x00d1fce9	svga_set_default_seq_regs
+EXPORT_SYMBOL drivers/video/svgalib 0x07b3da30	svga_wseq_multi
+EXPORT_SYMBOL drivers/video/svgalib 0x09cfeb06	svga_get_tilemax
+EXPORT_SYMBOL drivers/video/svgalib 0x1b95c56a	svga_check_timings
+EXPORT_SYMBOL drivers/video/svgalib 0x291ba0a6	svga_settile
+EXPORT_SYMBOL drivers/video/svgalib 0x4a502f72	svga_tileblit
+EXPORT_SYMBOL drivers/video/svgalib 0x63e898d1	svga_set_default_crt_regs
+EXPORT_SYMBOL drivers/video/svgalib 0x7a3ae959	svga_wcrt_multi
+EXPORT_SYMBOL drivers/video/svgalib 0x80408443	svga_set_timings
+EXPORT_SYMBOL drivers/video/svgalib 0x8fa8438b	svga_set_textmode_vga_regs
+EXPORT_SYMBOL drivers/video/svgalib 0x96884d5a	svga_get_caps
+EXPORT_SYMBOL drivers/video/svgalib 0xab34a78a	svga_tilecursor
+EXPORT_SYMBOL drivers/video/svgalib 0xab3b22ad	svga_set_default_gfx_regs
+EXPORT_SYMBOL drivers/video/svgalib 0xc0428106	svga_tilefill
+EXPORT_SYMBOL drivers/video/svgalib 0xd9ea2b5b	svga_tilecopy
+EXPORT_SYMBOL drivers/video/svgalib 0xdad682b1	svga_set_default_atc_regs
+EXPORT_SYMBOL drivers/video/svgalib 0xec83c473	svga_match_format
+EXPORT_SYMBOL drivers/video/svgalib 0xef774f5d	svga_compute_pll
+EXPORT_SYMBOL drivers/video/syscopyarea 0xda3e0c67	sys_copyarea
+EXPORT_SYMBOL drivers/video/sysfillrect 0xb2082a34	sys_fillrect
+EXPORT_SYMBOL drivers/video/sysimgblt 0x45073a05	sys_imageblit
+EXPORT_SYMBOL drivers/video/vgastate 0x686de290	restore_vga
+EXPORT_SYMBOL drivers/video/vgastate 0xe7a2620e	save_vga
+EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x71ed0080	w1_bq27000_write
+EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x988a849a	w1_bq27000_read
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x041b1f1d	w1_ds2760_store_eeprom
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x4b42af54	w1_ds2760_read
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x672561b1	w1_ds2760_recall_eeprom
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0xb8befa67	w1_ds2760_write
+EXPORT_SYMBOL drivers/w1/wire 0x38d3fb0c	w1_add_master_device
+EXPORT_SYMBOL drivers/w1/wire 0x4a1e1d2e	w1_register_family
+EXPORT_SYMBOL drivers/w1/wire 0x51d826a3	w1_unregister_family
+EXPORT_SYMBOL drivers/w1/wire 0xdc599dd3	w1_remove_master_device
+EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0x04e133fc	iTCO_vendor_check_noreboot_on
+EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0x672c9d44	iTCO_vendor_pre_keepalive
+EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xa78bd894	iTCO_vendor_pre_set_heartbeat
+EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xa8d6daac	iTCO_vendor_pre_start
+EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xd0efe320	iTCO_vendor_pre_stop
+EXPORT_SYMBOL fs/configfs/configfs 0x07058d0a	config_group_init_type_name
+EXPORT_SYMBOL fs/configfs/configfs 0x122b8c11	config_item_put
+EXPORT_SYMBOL fs/configfs/configfs 0x1ace8327	config_group_find_item
+EXPORT_SYMBOL fs/configfs/configfs 0x426ba3fb	config_item_init_type_name
+EXPORT_SYMBOL fs/configfs/configfs 0x445b2b2f	config_item_init
+EXPORT_SYMBOL fs/configfs/configfs 0x49dc883c	configfs_undepend_item
+EXPORT_SYMBOL fs/configfs/configfs 0x7e1a250e	configfs_depend_item
+EXPORT_SYMBOL fs/configfs/configfs 0x825887c3	config_item_get
+EXPORT_SYMBOL fs/configfs/configfs 0xde330c9f	config_item_set_name
+EXPORT_SYMBOL fs/configfs/configfs 0xf3be71a3	config_group_init
+EXPORT_SYMBOL fs/configfs/configfs 0xf69ee210	configfs_register_subsystem
+EXPORT_SYMBOL fs/configfs/configfs 0xfecd449f	configfs_unregister_subsystem
+EXPORT_SYMBOL fs/fscache/fscache 0x012b0262	__fscache_relinquish_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0x062e8783	fscache_object_lookup_negative
+EXPORT_SYMBOL fs/fscache/fscache 0x07d9b576	fscache_wait_bit_interruptible
+EXPORT_SYMBOL fs/fscache/fscache 0x21091e9d	fscache_put_operation
+EXPORT_SYMBOL fs/fscache/fscache 0x2a1116cb	__fscache_wait_on_page_write
+EXPORT_SYMBOL fs/fscache/fscache 0x2c6ed48a	__fscache_acquire_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0x300dcf24	fscache_check_aux
+EXPORT_SYMBOL fs/fscache/fscache 0x3516543d	__fscache_uncache_page
+EXPORT_SYMBOL fs/fscache/fscache 0x3ce32c95	__fscache_update_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0x3dac0cfa	__fscache_read_or_alloc_pages
+EXPORT_SYMBOL fs/fscache/fscache 0x3e6b8ac4	fscache_object_slow_work_ops
+EXPORT_SYMBOL fs/fscache/fscache 0x3fc23318	fscache_wait_bit
+EXPORT_SYMBOL fs/fscache/fscache 0x454d00ef	__fscache_unregister_netfs
+EXPORT_SYMBOL fs/fscache/fscache 0x46bcf22f	fscache_init_cache
+EXPORT_SYMBOL fs/fscache/fscache 0x496932b9	fscache_op_debug_id
+EXPORT_SYMBOL fs/fscache/fscache 0x55c62af3	fscache_add_cache
+EXPORT_SYMBOL fs/fscache/fscache 0x637f8e12	fscache_io_error
+EXPORT_SYMBOL fs/fscache/fscache 0x63f96884	fscache_cache_cleared_wq
+EXPORT_SYMBOL fs/fscache/fscache 0x6cbd9336	__fscache_check_page_write
+EXPORT_SYMBOL fs/fscache/fscache 0x7c820074	fscache_withdraw_cache
+EXPORT_SYMBOL fs/fscache/fscache 0x86f8894f	fscache_object_states
+EXPORT_SYMBOL fs/fscache/fscache 0x99876cdb	fscache_obtained_object
+EXPORT_SYMBOL fs/fscache/fscache 0x9f24a340	__fscache_attr_changed
+EXPORT_SYMBOL fs/fscache/fscache 0xad92dabe	__fscache_alloc_page
+EXPORT_SYMBOL fs/fscache/fscache 0xba8baf44	__fscache_write_page
+EXPORT_SYMBOL fs/fscache/fscache 0xbd97f382	__fscache_register_netfs
+EXPORT_SYMBOL fs/fscache/fscache 0xbea14ba3	fscache_mark_pages_cached
+EXPORT_SYMBOL fs/fscache/fscache 0xd5c777e8	fscache_enqueue_operation
+EXPORT_SYMBOL fs/fscache/fscache 0xe46a2d69	fscache_fsdef_index
+EXPORT_SYMBOL fs/fscache/fscache 0xe8b6d776	__fscache_read_or_alloc_page
+EXPORT_SYMBOL fs/fscache/fscache 0xf2120f81	__fscache_maybe_release_page
+EXPORT_SYMBOL fs/nfsd/nfsd 0x0e195c1c	nfs4_acl_nfsv4_to_posix
+EXPORT_SYMBOL fs/nfsd/nfsd 0x2095976a	nfs4_acl_new
+EXPORT_SYMBOL fs/nfsd/nfsd 0x28fb929b	nfs4_acl_posix_to_nfsv4
+EXPORT_SYMBOL fs/nfsd/nfsd 0x35e33c1e	nfs4_acl_write_who
+EXPORT_SYMBOL fs/nfsd/nfsd 0x5a157ae4	nfs4_acl_get_whotype
+EXPORT_SYMBOL fs/quota/quota_tree 0x16854e60	qtree_release_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0x6f865805	qtree_write_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0x948b75a3	qtree_entry_unused
+EXPORT_SYMBOL fs/quota/quota_tree 0x9ce56fea	qtree_read_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0xbce27ec3	qtree_delete_dquot
+EXPORT_SYMBOL lib/crc-ccitt 0x3771b461	crc_ccitt
+EXPORT_SYMBOL lib/crc-ccitt 0x75811312	crc_ccitt_table
+EXPORT_SYMBOL lib/crc-itu-t 0xd29b009f	crc_itu_t_table
+EXPORT_SYMBOL lib/crc-itu-t 0xf5b4a948	crc_itu_t
+EXPORT_SYMBOL lib/crc7 0xa7587646	crc7
+EXPORT_SYMBOL lib/crc7 0xd80c3603	crc7_syndrome_table
+EXPORT_SYMBOL lib/libcrc32c 0x27000b29	crc32c
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x315c65fd	zlib_deflateInit2
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x48034724	zlib_deflateReset
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xaf64ad0d	zlib_deflate
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf0caf44b	zlib_deflate_workspacesize
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf741c793	zlib_deflateEnd
+EXPORT_SYMBOL net/802/p8023 0x52bbd046	destroy_8023_client
+EXPORT_SYMBOL net/802/p8023 0x59508ad3	make_8023_client
+EXPORT_SYMBOL net/9p/9pnet 0x1350180f	p9_client_create
+EXPORT_SYMBOL net/9p/9pnet 0x196a152d	v9fs_unregister_trans
+EXPORT_SYMBOL net/9p/9pnet 0x2612bfe9	p9_client_walk
+EXPORT_SYMBOL net/9p/9pnet 0x2888c896	p9_client_write
+EXPORT_SYMBOL net/9p/9pnet 0x3455711e	p9_idpool_destroy
+EXPORT_SYMBOL net/9p/9pnet 0x3d73a797	p9_errstr2errno
+EXPORT_SYMBOL net/9p/9pnet 0x4664e19e	p9_client_attach
+EXPORT_SYMBOL net/9p/9pnet 0x64ed655f	p9_client_stat
+EXPORT_SYMBOL net/9p/9pnet 0x6b754e6f	p9_parse_header
+EXPORT_SYMBOL net/9p/9pnet 0x6fea94f7	p9_client_open
+EXPORT_SYMBOL net/9p/9pnet 0x769e174f	p9_client_remove
+EXPORT_SYMBOL net/9p/9pnet 0x76b79bf1	p9stat_read
+EXPORT_SYMBOL net/9p/9pnet 0x801ad17e	p9_tag_lookup
+EXPORT_SYMBOL net/9p/9pnet 0x83f3b3b5	p9_client_cb
+EXPORT_SYMBOL net/9p/9pnet 0x963d3dac	v9fs_register_trans
+EXPORT_SYMBOL net/9p/9pnet 0x9c964743	p9stat_free
+EXPORT_SYMBOL net/9p/9pnet 0xaab8671a	p9_idpool_get
+EXPORT_SYMBOL net/9p/9pnet 0xb106c0a7	p9_client_auth
+EXPORT_SYMBOL net/9p/9pnet 0xb8e39195	v9fs_get_default_trans
+EXPORT_SYMBOL net/9p/9pnet 0xba841a84	p9_client_clunk
+EXPORT_SYMBOL net/9p/9pnet 0xc2611286	p9_client_read
+EXPORT_SYMBOL net/9p/9pnet 0xcae61af3	p9_idpool_create
+EXPORT_SYMBOL net/9p/9pnet 0xcfc3a6e3	p9_client_wstat
+EXPORT_SYMBOL net/9p/9pnet 0xd0faf92e	p9_idpool_check
+EXPORT_SYMBOL net/9p/9pnet 0xd116234c	p9_client_version
+EXPORT_SYMBOL net/9p/9pnet 0xd331fc1d	p9pdu_dump
+EXPORT_SYMBOL net/9p/9pnet 0xd560eca2	p9_client_disconnect
+EXPORT_SYMBOL net/9p/9pnet 0xdce4dcbe	p9_client_destroy
+EXPORT_SYMBOL net/9p/9pnet 0xe58a3360	p9_error_init
+EXPORT_SYMBOL net/9p/9pnet 0xe78cfc2b	v9fs_get_trans_by_name
+EXPORT_SYMBOL net/9p/9pnet 0xeb602329	p9_client_fcreate
+EXPORT_SYMBOL net/9p/9pnet 0xef7127b0	p9_idpool_put
+EXPORT_SYMBOL net/appletalk/appletalk 0x0f9ae47e	aarp_send_ddp
+EXPORT_SYMBOL net/appletalk/appletalk 0x383744ca	atrtr_get_dev
+EXPORT_SYMBOL net/appletalk/appletalk 0x4c18adb1	atalk_find_dev_addr
+EXPORT_SYMBOL net/appletalk/appletalk 0x89077598	alloc_ltalkdev
+EXPORT_SYMBOL net/atm/atm 0x035ccdc3	atm_init_aal5
+EXPORT_SYMBOL net/atm/atm 0x08c067ed	atm_dev_lookup
+EXPORT_SYMBOL net/atm/atm 0x0b295141	register_atm_ioctl
+EXPORT_SYMBOL net/atm/atm 0x0d0767f8	atm_proc_root
+EXPORT_SYMBOL net/atm/atm 0x1a24e5e2	sonet_subtract_stats
+EXPORT_SYMBOL net/atm/atm 0x2cc2d52d	vcc_hash
+EXPORT_SYMBOL net/atm/atm 0x3a44ec2d	atm_dev_register
+EXPORT_SYMBOL net/atm/atm 0x3c445739	atm_dev_deregister
+EXPORT_SYMBOL net/atm/atm 0x46f00f91	vcc_release_async
+EXPORT_SYMBOL net/atm/atm 0x646ed6e2	deregister_atm_ioctl
+EXPORT_SYMBOL net/atm/atm 0x6d1ced27	vcc_sklist_lock
+EXPORT_SYMBOL net/atm/atm 0x752d9265	atm_alloc_charge
+EXPORT_SYMBOL net/atm/atm 0x89195dc3	sonet_copy_stats
+EXPORT_SYMBOL net/atm/atm 0xc3a4daa9	vcc_insert_socket
+EXPORT_SYMBOL net/atm/atm 0xd18f132f	atm_charge
+EXPORT_SYMBOL net/atm/atm 0xf49bc67a	atm_pcr_goal
+EXPORT_SYMBOL net/ax25/ax25 0x0d610421	ax25_linkfail_release
+EXPORT_SYMBOL net/ax25/ax25 0x241ca30b	ax25_hard_header
+EXPORT_SYMBOL net/ax25/ax25 0x242852b9	ax25_uid_policy
+EXPORT_SYMBOL net/ax25/ax25 0x3b947dbc	ax25_rebuild_header
+EXPORT_SYMBOL net/ax25/ax25 0x3d2d82ec	ax25_display_timer
+EXPORT_SYMBOL net/ax25/ax25 0x4502c65a	asc2ax
+EXPORT_SYMBOL net/ax25/ax25 0x53dea1ff	ax2asc
+EXPORT_SYMBOL net/ax25/ax25 0x564d9f14	ax25_findbyuid
+EXPORT_SYMBOL net/ax25/ax25 0x583b7913	ax25_listen_register
+EXPORT_SYMBOL net/ax25/ax25 0x8b0e2f8f	ax25_listen_release
+EXPORT_SYMBOL net/ax25/ax25 0x8ede9e26	ax25_protocol_release
+EXPORT_SYMBOL net/ax25/ax25 0xa01cecb0	ax25_linkfail_register
+EXPORT_SYMBOL net/ax25/ax25 0xc1444946	ax25cmp
+EXPORT_SYMBOL net/ax25/ax25 0xd08eb235	ax25_header_ops
+EXPORT_SYMBOL net/ax25/ax25 0xd43ecbf1	null_ax25_address
+EXPORT_SYMBOL net/ax25/ax25 0xdf9eb6b1	ax25_send_frame
+EXPORT_SYMBOL net/ax25/ax25 0xfd708524	ax25_find_cb
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x07514f13	hci_conn_put_device
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x109022c4	hci_send_acl
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x16eacc11	hci_alloc_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x1bbdeb21	bt_accept_dequeue
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x229d2c9b	bt_sock_register
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x29697276	hci_connect
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x2ced2055	bt_sock_recvmsg
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x2f77a961	bt_accept_unlink
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x32db0329	bt_sock_poll
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x33341a36	hci_unregister_proto
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x39cfac34	hci_suspend_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x42af8e66	hci_conn_switch_role
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x43673700	hci_conn_change_link_key
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x4f76312b	hci_register_proto
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x502ac8d5	bt_sock_link
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x519ec96b	hci_send_sco
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x64616d4f	bt_sock_wait_state
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x666f336a	hci_unregister_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x6bb104f5	hci_recv_fragment
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x7094f8ae	bt_err
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x7dd45dc1	hci_register_cb
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x8387622d	hci_conn_hold_device
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x83a0733d	hci_free_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x8a32e8ef	bt_sock_unlink
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x8ab554ee	hci_conn_check_link_mode
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x96a8846d	hci_resume_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x9cc94808	hci_unregister_cb
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xa47c089c	bt_accept_enqueue
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xb4560142	hci_conn_security
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xc2066af0	batostr
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xcc1fb551	baswap
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xe4c55145	bt_sock_ioctl
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xee8bdc8f	hci_register_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xf1425b7a	hci_get_route
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xf19294db	bt_sock_unregister
+EXPORT_SYMBOL net/bluetooth/l2cap 0xfc31fe88	l2cap_load
+EXPORT_SYMBOL net/bridge/bridge 0xb47a6aab	br_should_route_hook
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x0207968a	ebt_do_table
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x0f1f9aa2	ebt_register_table
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0xadc4ec7e	ebt_unregister_table
+EXPORT_SYMBOL net/can/can 0x04228e01	can_proto_register
+EXPORT_SYMBOL net/can/can 0x073e55f7	can_send
+EXPORT_SYMBOL net/can/can 0x2c1df592	can_proto_unregister
+EXPORT_SYMBOL net/can/can 0x3fc0042a	can_rx_register
+EXPORT_SYMBOL net/can/can 0x5db0e458	can_rx_unregister
+EXPORT_SYMBOL net/ieee802154/nl802154 0x0bbb83bd	ieee802154_nl_assoc_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0x3be5c002	ieee802154_nl_beacon_indic
+EXPORT_SYMBOL net/ieee802154/nl802154 0x90685596	ieee802154_nl_scan_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0x93367f6a	ieee802154_nl_assoc_indic
+EXPORT_SYMBOL net/ieee802154/nl802154 0x9aa11037	ieee802154_nl_disassoc_indic
+EXPORT_SYMBOL net/ieee802154/nl802154 0xb41f18de	ieee802154_nl_start_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0xe64e6226	ieee802154_nl_disassoc_confirm
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x21427a32	wpan_phy_find
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x4416f6cb	wpan_phy_free
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x9d540708	wpan_phy_register
+EXPORT_SYMBOL net/ieee802154/wpan-class 0xc46790e6	wpan_phy_alloc
+EXPORT_SYMBOL net/ieee802154/wpan-class 0xf21c3ecf	wpan_phy_unregister
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x7224b61d	arpt_do_table
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x91976518	arpt_register_table
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xf8222d12	arpt_unregister_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x009a69b6	ipt_register_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x012028b0	ipt_unregister_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x8c8d5ea9	ipt_do_table
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x0889c051	nf_nat_protocol_unregister
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x183c66bc	nf_nat_mangle_udp_packet
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x3696c8e1	nf_nat_protocol_register
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x3ec475fc	nf_nat_mangle_tcp_packet
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x7ee730f0	nf_nat_setup_info
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xaad93b97	nf_nat_used_tuple
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xd34a392b	nf_nat_follow_master
+EXPORT_SYMBOL net/ipv4/tunnel4 0x4d61d842	xfrm4_tunnel_register
+EXPORT_SYMBOL net/ipv4/tunnel4 0xdeab76ef	xfrm4_tunnel_deregister
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x06c4628c	ip6t_unregister_table
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x1dcc7658	ip6t_do_table
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x6f87981a	ip6t_register_table
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x8195cda9	ipv6_find_hdr
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xb8bddf33	ip6t_ext_hdr
+EXPORT_SYMBOL net/ipv6/tunnel6 0x9b46a4c4	xfrm6_tunnel_register
+EXPORT_SYMBOL net/ipv6/tunnel6 0xc3cf7425	xfrm6_tunnel_deregister
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0x9cd013f2	xfrm6_tunnel_alloc_spi
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xab14e193	xfrm6_tunnel_free_spi
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xdb1b42d1	xfrm6_tunnel_spi_lookup
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x27aef942	ircomm_open
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x3e64cb71	ircomm_disconnect_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x5bd27fd7	ircomm_control_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x90bdd0c6	ircomm_data_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x997f13d7	ircomm_connect_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x9f7558e4	ircomm_connect_response
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0xe48c998b	ircomm_flow_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0xf6df34dc	ircomm_close
+EXPORT_SYMBOL net/irda/irda 0x01d1fcdb	hashbin_delete
+EXPORT_SYMBOL net/irda/irda 0x03c366fa	async_unwrap_char
+EXPORT_SYMBOL net/irda/irda 0x06a3ee58	irias_new_integer_value
+EXPORT_SYMBOL net/irda/irda 0x072e026f	irias_add_octseq_attrib
+EXPORT_SYMBOL net/irda/irda 0x07d3647c	irlmp_register_service
+EXPORT_SYMBOL net/irda/irda 0x10923325	irttp_open_tsap
+EXPORT_SYMBOL net/irda/irda 0x137afbdc	irttp_data_request
+EXPORT_SYMBOL net/irda/irda 0x14f97f68	irttp_flow_request
+EXPORT_SYMBOL net/irda/irda 0x2036ad06	irda_param_insert
+EXPORT_SYMBOL net/irda/irda 0x238b1553	irttp_close_tsap
+EXPORT_SYMBOL net/irda/irda 0x27410752	irttp_connect_request
+EXPORT_SYMBOL net/irda/irda 0x28aa51f0	async_wrap_skb
+EXPORT_SYMBOL net/irda/irda 0x3462950f	hashbin_remove
+EXPORT_SYMBOL net/irda/irda 0x38a20e5b	irda_debug
+EXPORT_SYMBOL net/irda/irda 0x3945c2af	alloc_irdadev
+EXPORT_SYMBOL net/irda/irda 0x448b8aaa	irda_qos_bits_to_value
+EXPORT_SYMBOL net/irda/irda 0x44904ef6	irttp_udata_request
+EXPORT_SYMBOL net/irda/irda 0x46c1c4a2	irlmp_unregister_service
+EXPORT_SYMBOL net/irda/irda 0x6693fee0	irda_device_set_media_busy
+EXPORT_SYMBOL net/irda/irda 0x6758f8ac	irias_new_object
+EXPORT_SYMBOL net/irda/irda 0x68b7447c	hashbin_find
+EXPORT_SYMBOL net/irda/irda 0x6a7f2279	irlap_close
+EXPORT_SYMBOL net/irda/irda 0x6a88c4fd	irda_notify_init
+EXPORT_SYMBOL net/irda/irda 0x6b043eba	irda_init_max_qos_capabilies
+EXPORT_SYMBOL net/irda/irda 0x7042bc54	irlmp_register_client
+EXPORT_SYMBOL net/irda/irda 0x712b8b93	irlmp_connect_response
+EXPORT_SYMBOL net/irda/irda 0x747d6779	irias_delete_object
+EXPORT_SYMBOL net/irda/irda 0x7621e908	hashbin_insert
+EXPORT_SYMBOL net/irda/irda 0x76243bc9	irias_insert_object
+EXPORT_SYMBOL net/irda/irda 0x763e54a4	irlmp_unregister_client
+EXPORT_SYMBOL net/irda/irda 0x781e2db5	irias_find_object
+EXPORT_SYMBOL net/irda/irda 0x7919f158	irlmp_open_lsap
+EXPORT_SYMBOL net/irda/irda 0x7957f728	irlmp_update_client
+EXPORT_SYMBOL net/irda/irda 0x7a57b6f3	hashbin_remove_this
+EXPORT_SYMBOL net/irda/irda 0x7e703444	irttp_dup
+EXPORT_SYMBOL net/irda/irda 0x7f47f884	irlmp_data_request
+EXPORT_SYMBOL net/irda/irda 0x81458fbf	iriap_close
+EXPORT_SYMBOL net/irda/irda 0x90c58a50	iriap_getvaluebyclass_request
+EXPORT_SYMBOL net/irda/irda 0x91815586	irda_param_pack
+EXPORT_SYMBOL net/irda/irda 0x9297f0c2	irttp_connect_response
+EXPORT_SYMBOL net/irda/irda 0x993ad14b	irda_param_extract_all
+EXPORT_SYMBOL net/irda/irda 0xb9394173	irias_delete_value
+EXPORT_SYMBOL net/irda/irda 0xba5f0914	irttp_disconnect_request
+EXPORT_SYMBOL net/irda/irda 0xbcd3ef13	irias_object_change_attribute
+EXPORT_SYMBOL net/irda/irda 0xbe40ace9	irlmp_discovery_request
+EXPORT_SYMBOL net/irda/irda 0xc14e9b6a	hashbin_get_next
+EXPORT_SYMBOL net/irda/irda 0xc278f133	proc_irda
+EXPORT_SYMBOL net/irda/irda 0xcac57b9b	irlmp_connect_request
+EXPORT_SYMBOL net/irda/irda 0xcb5a88cb	irlmp_close_lsap
+EXPORT_SYMBOL net/irda/irda 0xcd41236c	hashbin_new
+EXPORT_SYMBOL net/irda/irda 0xd6deeaae	irda_setup_dma
+EXPORT_SYMBOL net/irda/irda 0xd7172ff4	hashbin_get_first
+EXPORT_SYMBOL net/irda/irda 0xd8bfb6d4	hashbin_lock_find
+EXPORT_SYMBOL net/irda/irda 0xde4c6b3c	irlmp_service_to_hint
+EXPORT_SYMBOL net/irda/irda 0xe5260e0e	irias_add_integer_attrib
+EXPORT_SYMBOL net/irda/irda 0xec41fe7f	irias_add_string_attrib
+EXPORT_SYMBOL net/irda/irda 0xedd521c2	irlmp_get_discoveries
+EXPORT_SYMBOL net/irda/irda 0xf1ff81cd	irlmp_disconnect_request
+EXPORT_SYMBOL net/irda/irda 0xf258f8f6	irlap_open
+EXPORT_SYMBOL net/irda/irda 0xf5abbaa1	iriap_open
+EXPORT_SYMBOL net/lapb/lapb 0x118b7cc6	lapb_register
+EXPORT_SYMBOL net/lapb/lapb 0x1781887c	lapb_getparms
+EXPORT_SYMBOL net/lapb/lapb 0x2b132933	lapb_connect_request
+EXPORT_SYMBOL net/lapb/lapb 0x34d32d87	lapb_data_request
+EXPORT_SYMBOL net/lapb/lapb 0x85274156	lapb_setparms
+EXPORT_SYMBOL net/lapb/lapb 0xce6f0259	lapb_data_received
+EXPORT_SYMBOL net/lapb/lapb 0xd7d71083	lapb_disconnect_request
+EXPORT_SYMBOL net/lapb/lapb 0xe7ed7cde	lapb_unregister
+EXPORT_SYMBOL net/mac80211/mac80211 0x05940410	rate_control_send_low
+EXPORT_SYMBOL net/mac80211/mac80211 0x149af0db	ieee80211_tx_status_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0x1c919be5	ieee80211_stop_tx_ba_cb
+EXPORT_SYMBOL net/mac80211/mac80211 0x2559e280	ieee80211_start_tx_ba_cb
+EXPORT_SYMBOL net/mac80211/mac80211 0x25886bde	ieee80211_get_tkip_key
+EXPORT_SYMBOL net/mac80211/mac80211 0x271ad44d	ieee80211_start_tx_ba_cb_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0x319d670d	ieee80211_alloc_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x35aff6fb	ieee80211_get_buffered_bc
+EXPORT_SYMBOL net/mac80211/mac80211 0x38bf5938	ieee80211_wake_queue
+EXPORT_SYMBOL net/mac80211/mac80211 0x3e14c7a8	ieee80211_ctstoself_get
+EXPORT_SYMBOL net/mac80211/mac80211 0x3edccbdb	ieee80211_wake_queues
+EXPORT_SYMBOL net/mac80211/mac80211 0x43c235b8	ieee80211_beacon_get
+EXPORT_SYMBOL net/mac80211/mac80211 0x4479ee6b	ieee80211_rts_get
+EXPORT_SYMBOL net/mac80211/mac80211 0x4beb4b6e	__ieee80211_get_rx_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0x4f49ac11	ieee80211_find_sta
+EXPORT_SYMBOL net/mac80211/mac80211 0x51704b63	ieee80211_start_tx_ba_session
+EXPORT_SYMBOL net/mac80211/mac80211 0x5fa6f814	ieee80211_free_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x65836fd3	ieee80211_rx
+EXPORT_SYMBOL net/mac80211/mac80211 0x6ab61872	ieee80211_restart_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x6c8f62df	ieee80211_queue_delayed_work
+EXPORT_SYMBOL net/mac80211/mac80211 0x780a9641	ieee80211_ctstoself_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0x7c267ddb	ieee80211_rate_control_register
+EXPORT_SYMBOL net/mac80211/mac80211 0x8c2bf8c4	ieee80211_rate_control_unregister
+EXPORT_SYMBOL net/mac80211/mac80211 0x8e1e83a1	ieee80211_queue_work
+EXPORT_SYMBOL net/mac80211/mac80211 0x9c7eae93	wiphy_to_ieee80211_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x9f2711ba	ieee80211_tx_status
+EXPORT_SYMBOL net/mac80211/mac80211 0xa0df9ce3	ieee80211_unregister_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xa11bc1db	__ieee80211_get_radio_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0xa56798dd	ieee80211_stop_tx_ba_cb_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0xaa20de9e	ieee80211_scan_completed
+EXPORT_SYMBOL net/mac80211/mac80211 0xaa84d633	__ieee80211_get_assoc_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0xbb6eeba2	ieee80211_stop_queue
+EXPORT_SYMBOL net/mac80211/mac80211 0xcb86280c	__ieee80211_get_tx_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0xe32b3e8e	ieee80211_queue_stopped
+EXPORT_SYMBOL net/mac80211/mac80211 0xe4df8728	ieee80211_generic_frame_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0xe760fb39	ieee80211_rx_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0xe8abe42d	ieee80211_beacon_loss
+EXPORT_SYMBOL net/mac80211/mac80211 0xe9ae0fb9	ieee80211_stop_queues
+EXPORT_SYMBOL net/mac80211/mac80211 0xebbab6e8	ieee80211_rts_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0xed909c0f	ieee80211_register_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xf78e2b15	ieee80211_stop_tx_ba_session
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x16c2bb4a	ip_vs_conn_new
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x220aa6ee	unregister_ip_vs_app
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x49de9078	unregister_ip_vs_scheduler
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x56b63099	ip_vs_skb_replace
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x62738258	ip_vs_conn_put
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x68381c7d	register_ip_vs_app
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x9ed8f764	ip_vs_tcp_conn_listen
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xa1dbc2d8	ip_vs_proto_name
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xc3b74283	ip_vs_conn_in_get
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xdcfc782f	register_ip_vs_scheduler
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xed37e214	register_ip_vs_app_inc
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xf360d7c6	ip_vs_conn_out_get
+EXPORT_SYMBOL net/netfilter/nf_conntrack 0x9b3d6ba0	__nf_ct_ext_add
+EXPORT_SYMBOL net/netfilter/nf_conntrack 0xc4f5c947	__nf_ct_ext_destroy
+EXPORT_SYMBOL net/netfilter/nf_conntrack_proto_gre 0xde4689b5	nf_ct_gre_keymap_flush
+EXPORT_SYMBOL net/netfilter/x_tables 0x16a5e826	xt_free_table_info
+EXPORT_SYMBOL net/netfilter/x_tables 0x555bda80	xt_register_target
+EXPORT_SYMBOL net/netfilter/x_tables 0x67d945bd	xt_register_matches
+EXPORT_SYMBOL net/netfilter/x_tables 0x8a3e7583	xt_register_targets
+EXPORT_SYMBOL net/netfilter/x_tables 0x9cda46ef	xt_find_match
+EXPORT_SYMBOL net/netfilter/x_tables 0xa059012e	xt_unregister_matches
+EXPORT_SYMBOL net/netfilter/x_tables 0xaaed5dba	xt_unregister_target
+EXPORT_SYMBOL net/netfilter/x_tables 0xb79a19ab	xt_unregister_targets
+EXPORT_SYMBOL net/netfilter/x_tables 0xc3ff5dff	xt_alloc_table_info
+EXPORT_SYMBOL net/netfilter/x_tables 0xd2a3f5c1	xt_find_target
+EXPORT_SYMBOL net/netfilter/x_tables 0xe9ca7e77	xt_unregister_match
+EXPORT_SYMBOL net/netfilter/x_tables 0xecc3715b	xt_register_match
+EXPORT_SYMBOL net/phonet/phonet 0x102cb435	pn_sock_hash
+EXPORT_SYMBOL net/phonet/phonet 0x440109ff	phonet_header_ops
+EXPORT_SYMBOL net/phonet/phonet 0x52936594	pn_sock_get_port
+EXPORT_SYMBOL net/phonet/phonet 0x6ba4c41f	phonet_stream_ops
+EXPORT_SYMBOL net/phonet/phonet 0x6c0f525c	phonet_proto_register
+EXPORT_SYMBOL net/phonet/phonet 0x8f5515ec	phonet_proto_unregister
+EXPORT_SYMBOL net/phonet/phonet 0xc2d53697	pn_skb_send
+EXPORT_SYMBOL net/phonet/phonet 0xf88df8ff	pn_sock_unhash
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x0161b0d6	rxrpc_get_null_key
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x01ba9733	rxrpc_kernel_is_data_last
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x22ad7fe7	rxrpc_kernel_accept_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x342d0456	rxrpc_kernel_end_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x38644799	key_type_rxrpc
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x3b1b7211	rxrpc_kernel_get_error_number
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x56fa4cf4	rxrpc_kernel_abort_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x5d0b220b	rxrpc_kernel_begin_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x5fc24e24	rxrpc_kernel_get_abort_code
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x713e5e8d	rxrpc_kernel_reject_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x89a838fc	rxrpc_kernel_send_data
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x8b4b2269	rxrpc_kernel_intercept_rx_messages
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xa0a1742a	rxrpc_get_server_data_key
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xb6daefbf	rxrpc_kernel_data_delivered
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xf5f7ad08	rxrpc_kernel_free_skb
+EXPORT_SYMBOL net/sunrpc/sunrpc 0xe8824431	svc_pool_stats_open
+EXPORT_SYMBOL net/tipc/tipc 0x025916e3	tipc_send_buf2name
+EXPORT_SYMBOL net/tipc/tipc 0x08acf310	tipc_available_nodes
+EXPORT_SYMBOL net/tipc/tipc 0x10d40fcd	tipc_isconnected
+EXPORT_SYMBOL net/tipc/tipc 0x1472b270	tipc_disconnect
+EXPORT_SYMBOL net/tipc/tipc 0x1479cb03	tipc_deleteport
+EXPORT_SYMBOL net/tipc/tipc 0x15b5ecde	tipc_set_portunreliable
+EXPORT_SYMBOL net/tipc/tipc 0x16f27683	tipc_block_bearer
+EXPORT_SYMBOL net/tipc/tipc 0x18441bba	tipc_send_buf_fast
+EXPORT_SYMBOL net/tipc/tipc 0x1c8311f8	tipc_register_media
+EXPORT_SYMBOL net/tipc/tipc 0x259b74f9	tipc_acknowledge
+EXPORT_SYMBOL net/tipc/tipc 0x27d8bb58	tipc_send2port
+EXPORT_SYMBOL net/tipc/tipc 0x310d1bc9	tipc_detach
+EXPORT_SYMBOL net/tipc/tipc 0x3712e340	tipc_portunreliable
+EXPORT_SYMBOL net/tipc/tipc 0x3976041f	tipc_set_portimportance
+EXPORT_SYMBOL net/tipc/tipc 0x471919e9	tipc_recv_msg
+EXPORT_SYMBOL net/tipc/tipc 0x4b2243c6	tipc_portimportance
+EXPORT_SYMBOL net/tipc/tipc 0x4ba3cfc8	tipc_send2name
+EXPORT_SYMBOL net/tipc/tipc 0x4dc56ee9	tipc_forward_buf2name
+EXPORT_SYMBOL net/tipc/tipc 0x538b228a	tipc_withdraw
+EXPORT_SYMBOL net/tipc/tipc 0x5637ed44	tipc_get_mode
+EXPORT_SYMBOL net/tipc/tipc 0x56e52bc1	tipc_continue
+EXPORT_SYMBOL net/tipc/tipc 0x5c0d4b5c	tipc_ref_valid
+EXPORT_SYMBOL net/tipc/tipc 0x62a681a3	tipc_portunreturnable
+EXPORT_SYMBOL net/tipc/tipc 0x64357d3c	tipc_multicast
+EXPORT_SYMBOL net/tipc/tipc 0x8001e3d7	tipc_forward2port
+EXPORT_SYMBOL net/tipc/tipc 0x88b73627	tipc_get_addr
+EXPORT_SYMBOL net/tipc/tipc 0x8e8ba174	tipc_forward_buf2port
+EXPORT_SYMBOL net/tipc/tipc 0x8e9529d5	tipc_createport_raw
+EXPORT_SYMBOL net/tipc/tipc 0x9c45558e	tipc_enable_bearer
+EXPORT_SYMBOL net/tipc/tipc 0xa6d73f4d	tipc_reject_msg
+EXPORT_SYMBOL net/tipc/tipc 0xa936a24b	tipc_get_port
+EXPORT_SYMBOL net/tipc/tipc 0xadd203d0	tipc_connect2port
+EXPORT_SYMBOL net/tipc/tipc 0xae0103c3	tipc_shutdown
+EXPORT_SYMBOL net/tipc/tipc 0xb01ffc2c	tipc_forward2name
+EXPORT_SYMBOL net/tipc/tipc 0xb35b672c	tipc_publish
+EXPORT_SYMBOL net/tipc/tipc 0xb68f4d85	tipc_createport
+EXPORT_SYMBOL net/tipc/tipc 0xbb2b2504	tipc_send
+EXPORT_SYMBOL net/tipc/tipc 0xc66f6dd1	tipc_send_buf2port
+EXPORT_SYMBOL net/tipc/tipc 0xcec8514a	tipc_set_portunreturnable
+EXPORT_SYMBOL net/tipc/tipc 0xd44731e5	tipc_ownidentity
+EXPORT_SYMBOL net/tipc/tipc 0xda7f9d3f	tipc_attach
+EXPORT_SYMBOL net/tipc/tipc 0xdf5008fc	tipc_peer
+EXPORT_SYMBOL net/tipc/tipc 0xe4b86b97	tipc_send_buf
+EXPORT_SYMBOL net/tipc/tipc 0xe7aece47	tipc_ispublished
+EXPORT_SYMBOL net/tipc/tipc 0xeefd49b3	tipc_get_handle
+EXPORT_SYMBOL net/tipc/tipc 0xef50a1ef	tipc_disable_bearer
+EXPORT_SYMBOL net/wanrouter/wanrouter 0x0ebe03d1	unregister_wan_device
+EXPORT_SYMBOL net/wanrouter/wanrouter 0xe94f132b	register_wan_device
+EXPORT_SYMBOL net/wimax/wimax 0x31abcf56	wimax_rfkill
+EXPORT_SYMBOL net/wimax/wimax 0xde299ed9	wimax_reset
+EXPORT_SYMBOL net/wireless/cfg80211 0x066a962f	cfg80211_send_rx_assoc
+EXPORT_SYMBOL net/wireless/cfg80211 0x07e7ac5a	ieee80211_radiotap_iterator_init
+EXPORT_SYMBOL net/wireless/cfg80211 0x09c64fbd	ieee80211_frequency_to_channel
+EXPORT_SYMBOL net/wireless/cfg80211 0x0a350950	cfg80211_classify8021d
+EXPORT_SYMBOL net/wireless/cfg80211 0x1175e1e3	cfg80211_send_assoc_timeout
+EXPORT_SYMBOL net/wireless/cfg80211 0x11d016e3	cfg80211_testmode_reply
+EXPORT_SYMBOL net/wireless/cfg80211 0x15c6c8e3	cfg80211_roamed
+EXPORT_SYMBOL net/wireless/cfg80211 0x16c9d8aa	wiphy_rfkill_start_polling
+EXPORT_SYMBOL net/wireless/cfg80211 0x1879fcbd	bridge_tunnel_header
+EXPORT_SYMBOL net/wireless/cfg80211 0x1c95a9cc	cfg80211_connect_result
+EXPORT_SYMBOL net/wireless/cfg80211 0x37ac8d05	ieee80211_get_response_rate
+EXPORT_SYMBOL net/wireless/cfg80211 0x42ce1c35	wiphy_unregister
+EXPORT_SYMBOL net/wireless/cfg80211 0x449c5088	wiphy_new
+EXPORT_SYMBOL net/wireless/cfg80211 0x46078e24	cfg80211_get_mesh
+EXPORT_SYMBOL net/wireless/cfg80211 0x4f55c383	ieee80211_data_to_8023
+EXPORT_SYMBOL net/wireless/cfg80211 0x528418e3	cfg80211_send_disassoc
+EXPORT_SYMBOL net/wireless/cfg80211 0x5a36eb97	regulatory_hint
+EXPORT_SYMBOL net/wireless/cfg80211 0x5b9c5665	cfg80211_unlink_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0x619fd675	wiphy_apply_custom_regulatory
+EXPORT_SYMBOL net/wireless/cfg80211 0x61f88a82	cfg80211_testmode_alloc_reply_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0x69b18f43	rfc1042_header
+EXPORT_SYMBOL net/wireless/cfg80211 0x74decedc	wiphy_free
+EXPORT_SYMBOL net/wireless/cfg80211 0x7660b923	cfg80211_inform_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0x76e4af9f	cfg80211_get_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0x7c143b2a	cfg80211_send_rx_auth
+EXPORT_SYMBOL net/wireless/cfg80211 0x81ec8f93	wiphy_rfkill_stop_polling
+EXPORT_SYMBOL net/wireless/cfg80211 0x8bfdb195	ieee80211_data_from_8023
+EXPORT_SYMBOL net/wireless/cfg80211 0x8c35d732	ieee80211_hdrlen
+EXPORT_SYMBOL net/wireless/cfg80211 0x90eb5e02	cfg80211_put_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0x968ad16a	wiphy_rfkill_set_hw_state
+EXPORT_SYMBOL net/wireless/cfg80211 0xb31014f2	cfg80211_inform_bss_frame
+EXPORT_SYMBOL net/wireless/cfg80211 0xb3ac98f0	cfg80211_scan_done
+EXPORT_SYMBOL net/wireless/cfg80211 0xbbd70410	cfg80211_michael_mic_failure
+EXPORT_SYMBOL net/wireless/cfg80211 0xc1efa4ad	cfg80211_ibss_joined
+EXPORT_SYMBOL net/wireless/cfg80211 0xc4e85ec5	ieee80211_radiotap_iterator_next
+EXPORT_SYMBOL net/wireless/cfg80211 0xc58ed515	cfg80211_testmode_event
+EXPORT_SYMBOL net/wireless/cfg80211 0xc8a8144a	cfg80211_send_deauth
+EXPORT_SYMBOL net/wireless/cfg80211 0xc931a03d	ieee80211_bss_get_ie
+EXPORT_SYMBOL net/wireless/cfg80211 0xccc291b3	ieee80211_channel_to_frequency
+EXPORT_SYMBOL net/wireless/cfg80211 0xd0dff654	freq_reg_info
+EXPORT_SYMBOL net/wireless/cfg80211 0xdb4a432d	cfg80211_testmode_alloc_event_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0xdc1da4f9	ieee80211_get_hdrlen_from_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0xeddee366	cfg80211_send_auth_timeout
+EXPORT_SYMBOL net/wireless/cfg80211 0xf02a3c0c	cfg80211_disconnected
+EXPORT_SYMBOL net/wireless/cfg80211 0xfa7c66e3	wiphy_register
+EXPORT_SYMBOL net/wireless/cfg80211 0xfaaec113	__ieee80211_get_channel
+EXPORT_SYMBOL net/wireless/lib80211 0x0297697a	lib80211_crypt_quiescing
+EXPORT_SYMBOL net/wireless/lib80211 0x1b52ae1c	lib80211_crypt_deinit_entries
+EXPORT_SYMBOL net/wireless/lib80211 0x230f3ffb	lib80211_crypt_deinit_handler
+EXPORT_SYMBOL net/wireless/lib80211 0x29032852	lib80211_crypt_info_free
+EXPORT_SYMBOL net/wireless/lib80211 0x2d0f99e5	print_ssid
+EXPORT_SYMBOL net/wireless/lib80211 0xb41b6f19	lib80211_crypt_info_init
+EXPORT_SYMBOL net/wireless/lib80211 0xbb86eb8e	lib80211_get_crypto_ops
+EXPORT_SYMBOL net/wireless/lib80211 0xbc6ad4ff	lib80211_unregister_crypto_ops
+EXPORT_SYMBOL net/wireless/lib80211 0xecbaa1e6	lib80211_crypt_delayed_deinit
+EXPORT_SYMBOL net/wireless/lib80211 0xf1c559a6	lib80211_register_crypto_ops
+EXPORT_SYMBOL sound/ac97_bus 0x0ed108f5	ac97_bus_type
+EXPORT_SYMBOL sound/core/oss/snd-mixer-oss 0x1cea066c	snd_mixer_oss_ioctl_card
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x1a49e9f6	snd_seq_event_port_attach
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x1a724fcc	snd_seq_kernel_client_ctl
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x3fb4d161	snd_seq_kernel_client_dispatch
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x4c03a7b7	snd_seq_kernel_client_enqueue_blocking
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x6bb71038	snd_seq_delete_kernel_client
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x7418a216	snd_seq_create_kernel_client
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x7ac2f329	snd_seq_expand_var_event
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x7b8699eb	snd_seq_event_port_detach
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x89947013	snd_use_lock_sync_helper
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x9b6d86ca	snd_seq_kernel_client_write_poll
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xb8e448a0	snd_seq_set_queue_tempo
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xcac0a3be	snd_seq_kernel_client_enqueue
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xe934da1d	snd_seq_dump_var_event
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x0d001720	snd_seq_device_register_driver
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x3a57f235	snd_seq_autoload_unlock
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x43901cdf	snd_seq_device_new
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x6339b6d0	snd_seq_device_load_drivers
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xb90668b2	snd_seq_autoload_lock
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xc622fb29	snd_seq_device_unregister_driver
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x6ea09972	snd_midi_channel_alloc_set
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x833a3e07	snd_midi_channel_set_clear
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xb9948d2c	snd_midi_channel_free_set
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xf0a1fdb3	snd_midi_process_event
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x17c15809	snd_midi_event_decode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x4ad3f518	snd_midi_event_reset_decode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x62384d3a	snd_midi_event_encode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x8a348811	snd_midi_event_reset_encode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x9df7af8b	snd_midi_event_free
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xc482499d	snd_midi_event_new
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xd9072e1a	snd_midi_event_no_status
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xe6df29c7	snd_midi_event_encode_byte
+EXPORT_SYMBOL sound/core/seq/snd-seq-virmidi 0x29dd16d3	snd_virmidi_new
+EXPORT_SYMBOL sound/core/snd 0x17946fb7	snd_info_create_module_entry
+EXPORT_SYMBOL sound/core/snd 0x18e1683f	snd_dma_program
+EXPORT_SYMBOL sound/core/snd 0x191e88cf	snd_dma_pointer
+EXPORT_SYMBOL sound/core/snd 0x197e0635	snd_ctl_add
+EXPORT_SYMBOL sound/core/snd 0x198788b4	snd_lookup_oss_minor_data
+EXPORT_SYMBOL sound/core/snd 0x1a6a7048	snd_jack_set_parent
+EXPORT_SYMBOL sound/core/snd 0x1ff3ccd5	snd_ctl_free_one
+EXPORT_SYMBOL sound/core/snd 0x20a3dbb4	snd_card_file_add
+EXPORT_SYMBOL sound/core/snd 0x24a94b26	snd_info_get_line
+EXPORT_SYMBOL sound/core/snd 0x2961409a	snd_card_free_when_closed
+EXPORT_SYMBOL sound/core/snd 0x2ae3deaa	release_and_free_resource
+EXPORT_SYMBOL sound/core/snd 0x2f5ede3d	snd_ctl_find_numid
+EXPORT_SYMBOL sound/core/snd 0x3224ff0d	snd_card_set_id
+EXPORT_SYMBOL sound/core/snd 0x33959edb	snd_ctl_remove_id
+EXPORT_SYMBOL sound/core/snd 0x3971b4df	snd_ecards_limit
+EXPORT_SYMBOL sound/core/snd 0x3d96efbd	snd_ctl_boolean_mono_info
+EXPORT_SYMBOL sound/core/snd 0x3ecfbbb1	snd_info_create_card_entry
+EXPORT_SYMBOL sound/core/snd 0x4a3ea5c0	snd_request_card
+EXPORT_SYMBOL sound/core/snd 0x4bc4b338	snd_ctl_unregister_ioctl
+EXPORT_SYMBOL sound/core/snd 0x4c82f626	snd_card_create
+EXPORT_SYMBOL sound/core/snd 0x4f93cc09	snd_unregister_oss_device
+EXPORT_SYMBOL sound/core/snd 0x53f55493	snd_power_wait
+EXPORT_SYMBOL sound/core/snd 0x5b7f65bf	snd_pci_quirk_lookup
+EXPORT_SYMBOL sound/core/snd 0x602c96f0	copy_to_user_fromio
+EXPORT_SYMBOL sound/core/snd 0x60f1afa4	snd_component_add
+EXPORT_SYMBOL sound/core/snd 0x623f2852	snd_ctl_boolean_stereo_info
+EXPORT_SYMBOL sound/core/snd 0x62c97983	snd_register_device_for_dev
+EXPORT_SYMBOL sound/core/snd 0x6db2a780	snd_register_oss_device
+EXPORT_SYMBOL sound/core/snd 0x709944a2	_snd_ctl_add_slave
+EXPORT_SYMBOL sound/core/snd 0x70c15ac1	snd_dma_disable
+EXPORT_SYMBOL sound/core/snd 0x7782a1a9	snd_ctl_register_ioctl
+EXPORT_SYMBOL sound/core/snd 0x81496659	snd_ctl_find_id
+EXPORT_SYMBOL sound/core/snd 0x847370a4	snd_ctl_make_virtual_master
+EXPORT_SYMBOL sound/core/snd 0x8df3789f	snd_oss_info_register
+EXPORT_SYMBOL sound/core/snd 0x8f595b11	snd_major
+EXPORT_SYMBOL sound/core/snd 0x9df1a553	snd_cards
+EXPORT_SYMBOL sound/core/snd 0x9e6d79f8	snd_info_get_str
+EXPORT_SYMBOL sound/core/snd 0xa27ad4db	snd_card_disconnect
+EXPORT_SYMBOL sound/core/snd 0xa5ed3db6	snd_ctl_new1
+EXPORT_SYMBOL sound/core/snd 0xa65ad5f3	snd_info_register
+EXPORT_SYMBOL sound/core/snd 0xa7b38c90	snd_card_proc_new
+EXPORT_SYMBOL sound/core/snd 0xa98dcb3f	snd_ctl_notify
+EXPORT_SYMBOL sound/core/snd 0xa9fc6b31	snd_card_file_remove
+EXPORT_SYMBOL sound/core/snd 0xab40e00e	snd_device_free
+EXPORT_SYMBOL sound/core/snd 0xadd7c662	snd_card_free
+EXPORT_SYMBOL sound/core/snd 0xb2e5ae4a	snd_lookup_minor_data
+EXPORT_SYMBOL sound/core/snd 0xb823ac2a	snd_seq_root
+EXPORT_SYMBOL sound/core/snd 0xb84a86b7	snd_card_register
+EXPORT_SYMBOL sound/core/snd 0xb88db50f	snd_jack_new
+EXPORT_SYMBOL sound/core/snd 0xc8b68497	snd_add_device_sysfs_file
+EXPORT_SYMBOL sound/core/snd 0xcdba82a2	snd_mixer_oss_notify_callback
+EXPORT_SYMBOL sound/core/snd 0xce3ca308	copy_from_user_toio
+EXPORT_SYMBOL sound/core/snd 0xd65af2bb	snd_jack_report
+EXPORT_SYMBOL sound/core/snd 0xda5aece0	snd_ctl_rename_id
+EXPORT_SYMBOL sound/core/snd 0xe20c9214	snd_iprintf
+EXPORT_SYMBOL sound/core/snd 0xe3735114	snd_device_register
+EXPORT_SYMBOL sound/core/snd 0xe93f1e69	snd_device_new
+EXPORT_SYMBOL sound/core/snd 0xe94480c4	snd_info_free_entry
+EXPORT_SYMBOL sound/core/snd 0xf4d6a1c3	snd_unregister_device
+EXPORT_SYMBOL sound/core/snd 0xfb725d52	snd_ctl_remove
+EXPORT_SYMBOL sound/core/snd-hwdep 0x1348ac55	snd_hwdep_new
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x083f5f26	snd_dma_reserve_buf
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x3b91f3af	snd_free_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x3e1ab74b	snd_dma_alloc_pages_fallback
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x551e5d0f	snd_dma_alloc_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x67ed0b2b	snd_dma_free_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xade88e76	snd_malloc_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xee1a907f	snd_dma_get_reserved_buf
+EXPORT_SYMBOL sound/core/snd-pcm 0x0283dfe3	_snd_pcm_hw_params_any
+EXPORT_SYMBOL sound/core/snd-pcm 0x03443177	snd_pcm_limit_hw_rates
+EXPORT_SYMBOL sound/core/snd-pcm 0x04cda566	snd_interval_refine
+EXPORT_SYMBOL sound/core/snd-pcm 0x1d027e4b	snd_pcm_format_signed
+EXPORT_SYMBOL sound/core/snd-pcm 0x20b9d80e	snd_pcm_lib_readv
+EXPORT_SYMBOL sound/core/snd-pcm 0x2aec7ca0	snd_pcm_hw_constraint_minmax
+EXPORT_SYMBOL sound/core/snd-pcm 0x32a5030a	snd_pcm_hw_constraint_integer
+EXPORT_SYMBOL sound/core/snd-pcm 0x32daf0df	snd_pcm_lib_write
+EXPORT_SYMBOL sound/core/snd-pcm 0x347ab64c	snd_pcm_lib_ioctl
+EXPORT_SYMBOL sound/core/snd-pcm 0x3515e850	snd_pcm_hw_constraint_ratnums
+EXPORT_SYMBOL sound/core/snd-pcm 0x3796bdcc	snd_pcm_format_little_endian
+EXPORT_SYMBOL sound/core/snd-pcm 0x384cef52	snd_pcm_hw_param_last
+EXPORT_SYMBOL sound/core/snd-pcm 0x39bf9301	_snd_pcm_hw_param_setempty
+EXPORT_SYMBOL sound/core/snd-pcm 0x3ce5d816	snd_pcm_set_sync
+EXPORT_SYMBOL sound/core/snd-pcm 0x431db148	snd_pcm_release_substream
+EXPORT_SYMBOL sound/core/snd-pcm 0x4afcba45	snd_pcm_notify
+EXPORT_SYMBOL sound/core/snd-pcm 0x4b6d6d00	snd_pcm_lib_free_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0x4d9b6d35	snd_pcm_format_size
+EXPORT_SYMBOL sound/core/snd-pcm 0x4f816e9b	snd_pcm_format_big_endian
+EXPORT_SYMBOL sound/core/snd-pcm 0x52607c48	snd_pcm_open_substream
+EXPORT_SYMBOL sound/core/snd-pcm 0x52e3e4a5	snd_pcm_hw_param_value
+EXPORT_SYMBOL sound/core/snd-pcm 0x574a42ad	snd_pcm_lib_preallocate_pages_for_all
+EXPORT_SYMBOL sound/core/snd-pcm 0x5add72bc	snd_pcm_hw_constraint_ratdens
+EXPORT_SYMBOL sound/core/snd-pcm 0x5dfb2476	snd_pcm_sgbuf_get_chunk_size
+EXPORT_SYMBOL sound/core/snd-pcm 0x5e7f4920	snd_pcm_format_set_silence
+EXPORT_SYMBOL sound/core/snd-pcm 0x650f8603	snd_pcm_format_silence_64
+EXPORT_SYMBOL sound/core/snd-pcm 0x68a24153	snd_pcm_format_physical_width
+EXPORT_SYMBOL sound/core/snd-pcm 0x6cf2c65f	snd_pcm_set_ops
+EXPORT_SYMBOL sound/core/snd-pcm 0x6ef8fcd8	snd_pcm_format_linear
+EXPORT_SYMBOL sound/core/snd-pcm 0x78f7ea73	snd_pcm_lib_malloc_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0x8575694e	snd_pcm_lib_read
+EXPORT_SYMBOL sound/core/snd-pcm 0x88cc66cc	snd_pcm_link_rwlock
+EXPORT_SYMBOL sound/core/snd-pcm 0x8aa45eaa	snd_pcm_new
+EXPORT_SYMBOL sound/core/snd-pcm 0x918d8630	snd_pcm_hw_constraint_step
+EXPORT_SYMBOL sound/core/snd-pcm 0x9b5d14dd	snd_pcm_hw_constraint_msbits
+EXPORT_SYMBOL sound/core/snd-pcm 0x9f063bab	snd_pcm_hw_constraint_list
+EXPORT_SYMBOL sound/core/snd-pcm 0xa61aa028	snd_pcm_format_unsigned
+EXPORT_SYMBOL sound/core/snd-pcm 0xb0066e5b	snd_pcm_hw_param_first
+EXPORT_SYMBOL sound/core/snd-pcm 0xb06cd93b	snd_pcm_period_elapsed
+EXPORT_SYMBOL sound/core/snd-pcm 0xb3917fe7	snd_pcm_suspend
+EXPORT_SYMBOL sound/core/snd-pcm 0xb9638db4	snd_pcm_rate_to_rate_bit
+EXPORT_SYMBOL sound/core/snd-pcm 0xbc36811f	snd_pcm_hw_rule_add
+EXPORT_SYMBOL sound/core/snd-pcm 0xc0adf0d4	snd_pcm_lib_preallocate_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0xc1fb2260	snd_pcm_lib_preallocate_free_for_all
+EXPORT_SYMBOL sound/core/snd-pcm 0xc55b4a2b	snd_pcm_kernel_ioctl
+EXPORT_SYMBOL sound/core/snd-pcm 0xc7f42e49	snd_pcm_suspend_all
+EXPORT_SYMBOL sound/core/snd-pcm 0xcc295f48	snd_pcm_mmap_data
+EXPORT_SYMBOL sound/core/snd-pcm 0xcfd80d92	snd_pcm_lib_mmap_iomem
+EXPORT_SYMBOL sound/core/snd-pcm 0xd0b9b8b8	snd_interval_list
+EXPORT_SYMBOL sound/core/snd-pcm 0xd925a207	snd_pcm_sgbuf_ops_page
+EXPORT_SYMBOL sound/core/snd-pcm 0xe1d4e7f6	snd_pcm_hw_refine
+EXPORT_SYMBOL sound/core/snd-pcm 0xe56a9336	snd_pcm_format_width
+EXPORT_SYMBOL sound/core/snd-pcm 0xe97c9b6c	snd_pcm_new_stream
+EXPORT_SYMBOL sound/core/snd-pcm 0xed6fab5c	snd_pcm_stop
+EXPORT_SYMBOL sound/core/snd-pcm 0xf27cafa3	snd_pcm_lib_writev
+EXPORT_SYMBOL sound/core/snd-pcm 0xf3797152	snd_interval_ratnum
+EXPORT_SYMBOL sound/core/snd-pcm 0xf465cb00	snd_pcm_hw_constraint_pow2
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x104071e5	snd_rawmidi_transmit_ack
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x11a2bd72	snd_rawmidi_info_select
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x1302570f	snd_rawmidi_set_ops
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x19d40229	snd_rawmidi_drain_output
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x1f84a012	snd_rawmidi_kernel_write
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x50d7d610	snd_rawmidi_transmit_peek
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x5a98a2c4	snd_rawmidi_input_params
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x6183fbd7	snd_rawmidi_transmit_empty
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x7f95d364	snd_rawmidi_kernel_open
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x905a428e	snd_rawmidi_kernel_read
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x9581c0ba	snd_rawmidi_new
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x9c9d5f42	snd_rawmidi_transmit
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xb4a0f428	snd_rawmidi_output_params
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xbe6ceafc	snd_rawmidi_drain_input
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xd5f586a9	snd_rawmidi_receive
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xe469940b	snd_rawmidi_kernel_release
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xf46fd717	snd_rawmidi_drop_output
+EXPORT_SYMBOL sound/core/snd-timer 0x167946d1	snd_timer_stop
+EXPORT_SYMBOL sound/core/snd-timer 0x3424164d	snd_timer_global_register
+EXPORT_SYMBOL sound/core/snd-timer 0x4149d65f	snd_timer_notify
+EXPORT_SYMBOL sound/core/snd-timer 0x430dd6bf	snd_timer_interrupt
+EXPORT_SYMBOL sound/core/snd-timer 0x44cf2f1f	snd_timer_global_free
+EXPORT_SYMBOL sound/core/snd-timer 0x4cb34896	snd_timer_resolution
+EXPORT_SYMBOL sound/core/snd-timer 0x531ba3a4	snd_timer_close
+EXPORT_SYMBOL sound/core/snd-timer 0x684cf910	snd_timer_global_new
+EXPORT_SYMBOL sound/core/snd-timer 0x7bc585a1	snd_timer_pause
+EXPORT_SYMBOL sound/core/snd-timer 0xa217b25e	snd_timer_continue
+EXPORT_SYMBOL sound/core/snd-timer 0xa7e2af4f	snd_timer_start
+EXPORT_SYMBOL sound/core/snd-timer 0xcaf2b234	snd_timer_open
+EXPORT_SYMBOL sound/core/snd-timer 0xdc78c077	snd_timer_new
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x18ca7493	snd_mpu401_uart_new
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x4bbb7f27	snd_mpu401_uart_interrupt_tx
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xc43a3940	snd_mpu401_uart_interrupt
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x010051cd	snd_opl3_interrupt
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x05060a19	snd_opl3_regmap
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x22196a22	snd_opl3_reset
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x389aaab5	snd_opl3_load_patch
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x79732338	snd_opl3_new
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xbfb59691	snd_opl3_init
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xd7811c2e	snd_opl3_hwdep_new
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xe18287d5	snd_opl3_find_patch
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xe575e3a0	snd_opl3_timer_new
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xfeb6fea9	snd_opl3_create
+EXPORT_SYMBOL sound/drivers/opl4/snd-opl4-lib 0x021b1923	snd_opl4_create
+EXPORT_SYMBOL sound/drivers/opl4/snd-opl4-lib 0x84faa4dc	snd_opl4_read_memory
+EXPORT_SYMBOL sound/drivers/opl4/snd-opl4-lib 0xdbfab55e	snd_opl4_write_memory
+EXPORT_SYMBOL sound/drivers/opl4/snd-opl4-lib 0xe599c12a	snd_opl4_write
+EXPORT_SYMBOL sound/drivers/opl4/snd-opl4-lib 0xf2368a9c	snd_opl4_read
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x05d2e3c9	snd_vx_dsp_load
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x19ba857c	snd_vx_create
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x3588f0bb	snd_vx_free_firmware
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x397ed7d0	snd_vx_check_reg_bit
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x41579f71	snd_vx_resume
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x4f1a79a2	snd_vx_load_boot_image
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x4fbcd346	snd_vx_dsp_boot
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x5dedaef8	snd_vx_setup_firmware
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x99b88ede	snd_vx_irq_handler
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xb4557ae5	snd_vx_suspend
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x10b5086e	snd_ak4114_build
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x3b6575e7	snd_ak4114_check_rate_and_errors
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x55fa2e6c	snd_ak4114_reinit
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x6928465d	snd_ak4114_external_rate
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xc1485fa3	snd_ak4114_create
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xce520bae	snd_ak4114_reg_write
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x63c1bdfc	snd_ak4117_check_rate_and_errors
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xa3dd7a3c	snd_ak4117_reg_write
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xbb85b0f8	snd_ak4117_build
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xc2b288fa	snd_ak4117_create
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xcb22205e	snd_ak4117_reinit
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xcf8172fe	snd_ak4117_external_rate
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x6a821cef	snd_akm4xxx_init
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xa7d9c032	snd_akm4xxx_reset
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xc98f88e9	snd_akm4xxx_build_controls
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xd0658f3c	snd_akm4xxx_write
+EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0x1f154a4a	snd_pt2258_build_controls
+EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0x75adad9d	snd_pt2258_reset
+EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0x649db3c6	snd_tea575x_exit
+EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0xcc8b9571	snd_tea575x_init
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x140a62ec	snd_cs8427_create
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x19ae4b67	snd_cs8427_iec958_active
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x2687e7e5	snd_cs8427_iec958_pcm
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x932c6199	snd_cs8427_reg_write
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0xd6da8d95	snd_cs8427_iec958_build
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x228bd960	snd_i2c_device_create
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x57d9f9e3	snd_i2c_readbytes
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x6cd2fb05	snd_i2c_sendbytes
+EXPORT_SYMBOL sound/i2c/snd-i2c 0xae2cf865	snd_i2c_probeaddr
+EXPORT_SYMBOL sound/i2c/snd-i2c 0xd3a85339	snd_i2c_bus_create
+EXPORT_SYMBOL sound/i2c/snd-i2c 0xf6c6abe1	snd_i2c_device_free
+EXPORT_SYMBOL sound/i2c/snd-tea6330t 0x2c5f80c8	snd_tea6330t_detect
+EXPORT_SYMBOL sound/i2c/snd-tea6330t 0xec3725ee	snd_tea6330t_update_mixer
+EXPORT_SYMBOL sound/isa/es1688/snd-es1688-lib 0x07102b23	snd_es1688_create
+EXPORT_SYMBOL sound/isa/es1688/snd-es1688-lib 0x1d837cf5	snd_es1688_mixer_write
+EXPORT_SYMBOL sound/isa/es1688/snd-es1688-lib 0x9da4ea3e	snd_es1688_mixer
+EXPORT_SYMBOL sound/isa/es1688/snd-es1688-lib 0xfbc9108f	snd_es1688_pcm
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x075ee65b	snd_gf1_peek
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x0e59f186	snd_gf1_write8
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x0f6462bf	snd_gf1_ctrl_stop
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x23b4d424	snd_gf1_alloc_voice
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x2436755b	snd_gf1_write_addr
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x2cf43944	snd_gf1_mem_xfree
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x2e1d5cba	snd_gus_use_inc
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x39ba22d8	snd_gf1_i_look16
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x3e2027c0	snd_gus_initialize
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x46db8d67	snd_gf1_lvol_to_gvol_raw
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x47649555	snd_gf1_rawmidi_new
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x4f525280	snd_gf1_mem_alloc
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x51cd507c	snd_gf1_poke
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x51f079cb	snd_gf1_translate_freq
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x577f6c8a	snd_gf1_delay
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x586e634f	snd_gus_create
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x6820ce9a	snd_gf1_look16
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x6c6cf014	snd_gf1_write16
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x6cc0ef41	snd_gf1_pcm_new
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x860eff44	snd_gus_dram_read
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x87670c47	snd_gf1_i_look8
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x896ce4c5	snd_gus_interrupt
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x8a0a369c	snd_gus_use_dec
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x942d5a64	snd_gf1_new_mixer
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xabb3abfe	snd_gf1_stop_voice
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xb7f2b57a	snd_gf1_mem_free
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xb921d228	snd_gf1_look8
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xc43a5527	snd_gf1_atten_table
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xd18e6417	snd_gf1_i_write8
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xdeb90024	snd_gus_dram_write
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xe1e0247d	snd_gf1_dram_addr
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xe96dbee4	snd_gf1_free_voice
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xf2fb139e	snd_gf1_mem_lock
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x0e096be3	snd_msnd_init_queue
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x0f0cf009	snd_msnd_send_word
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x355f118a	snd_msndmix_force_recsrc
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x462512e2	snd_msndmix_new
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x6ecdcc98	snd_msnd_enable_irq
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x75026b24	snd_msndmidi_input_read
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x7d5cabfc	snd_msnd_DARQ
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x9014f4ab	snd_msndmix_setup
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x9ef04ebe	snd_msnd_dsp_halt
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0xd241e867	snd_msnd_DAPQ
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0xdd787903	snd_msnd_send_dsp_cmd
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0xe2c5e6df	snd_msnd_pcm
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0xf31d7d2c	snd_msnd_disable_irq
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0xf5a175ed	snd_msnd_upload_host
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x0bec421b	snd_sbmixer_add_ctl
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x0eb3b109	snd_sbmixer_write
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x1daa8af8	snd_sbmixer_resume
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x29ad35b5	snd_sbdsp_command
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x380851e4	snd_sbdsp_reset
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x50f34437	snd_sbdsp_get_byte
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x7ca701a7	snd_sbmixer_suspend
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x7d5dc745	snd_sbdsp_create
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xa62b19bb	snd_sbmixer_new
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xd5082c41	snd_sbmixer_read
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-csp 0x5e5f7aa5	snd_sb_csp_new
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0x90e525d9	snd_sb16dsp_get_pcm_ops
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0x9c7239b4	snd_sb16dsp_configure
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xb600fa7c	snd_sb16dsp_pcm
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xc57f5b54	snd_sb16dsp_interrupt
+EXPORT_SYMBOL sound/isa/sb/snd-sb8-dsp 0x413a8720	snd_sb8dsp_midi
+EXPORT_SYMBOL sound/isa/sb/snd-sb8-dsp 0x7df6ca75	snd_sb8dsp_interrupt
+EXPORT_SYMBOL sound/isa/sb/snd-sb8-dsp 0xb1716de9	snd_sb8dsp_pcm
+EXPORT_SYMBOL sound/isa/sb/snd-sb8-dsp 0xb52aef72	snd_sb8dsp_midi_interrupt
+EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x2f96748d	snd_emu8000_peek
+EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x43c30ca5	snd_emu8000_load_reverb_fx
+EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x4dc645b0	snd_emu8000_update_equalizer
+EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x687f7573	snd_emu8000_init_fm
+EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x68e40d89	snd_emu8000_poke
+EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x83b27502	snd_emu8000_peek_dw
+EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x9c6dac74	snd_emu8000_load_chorus_fx
+EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0xa0a328cb	snd_emu8000_update_chorus_mode
+EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0xdb74ba76	snd_emu8000_update_reverb_mode
+EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0xf4294bc6	snd_emu8000_poke_dw
+EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0xfe2ffa04	snd_emu8000_dma_chan
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x156bcf9b	snd_wss_info_single
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x1b4ded05	snd_wss_chip_id
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x2bb5858e	snd_wss_mixer
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x3a04b983	snd_wss_timer
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x3c209dbd	snd_wss_pcm
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x47cbae37	snd_wss_get_double
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x51455004	snd_wss_in
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x5447bd35	snd_wss_overrange
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x5a16edf7	snd_wss_put_double
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x5a6f9347	snd_wss_info_double
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x84b84b14	snd_wss_out
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x8a294175	snd_wss_create
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x8c8bbac0	snd_wss_get_pcm_ops
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x990358c5	snd_wss_mce_down
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xb92a82b6	snd_wss_mce_up
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xc3037d89	snd_cs4236_ext_out
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xc8e13494	snd_wss_get_single
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xd0020140	snd_wss_free
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xd53c7754	snd_wss_put_single
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xee5023e5	snd_wss_interrupt
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xf15f0bd4	snd_cs4236_ext_in
+EXPORT_SYMBOL sound/oss/ad1848 0x26c427ee	ad1848_detect
+EXPORT_SYMBOL sound/oss/ad1848 0x3c350a2d	ad1848_init
+EXPORT_SYMBOL sound/oss/ad1848 0x55262c70	probe_ms_sound
+EXPORT_SYMBOL sound/oss/ad1848 0x9bf1cc62	ad1848_unload
+EXPORT_SYMBOL sound/oss/ad1848 0xb29a9148	unload_ms_sound
+EXPORT_SYMBOL sound/oss/ad1848 0xc04f6f67	ad1848_control
+EXPORT_SYMBOL sound/oss/ad1848 0xe867f458	attach_ms_sound
+EXPORT_SYMBOL sound/oss/mpu401 0x5febf284	unload_mpu401
+EXPORT_SYMBOL sound/oss/mpu401 0xd9ec5db4	probe_mpu401
+EXPORT_SYMBOL sound/oss/mpu401 0xe1f1b4c5	attach_mpu401
+EXPORT_SYMBOL sound/oss/msnd 0x1186f48f	msnd_fifo_read
+EXPORT_SYMBOL sound/oss/msnd 0x234f64e0	msnd_register
+EXPORT_SYMBOL sound/oss/msnd 0x340a3ddf	msnd_init_queue
+EXPORT_SYMBOL sound/oss/msnd 0x54230dc1	msnd_fifo_write
+EXPORT_SYMBOL sound/oss/msnd 0x5fb94ecb	msnd_unregister
+EXPORT_SYMBOL sound/oss/msnd 0x6587640b	msnd_disable_irq
+EXPORT_SYMBOL sound/oss/msnd 0x6601493b	msnd_fifo_make_empty
+EXPORT_SYMBOL sound/oss/msnd 0x8e3c524b	msnd_send_dsp_cmd
+EXPORT_SYMBOL sound/oss/msnd 0x9274d677	msnd_fifo_free
+EXPORT_SYMBOL sound/oss/msnd 0x95d37486	msnd_upload_host
+EXPORT_SYMBOL sound/oss/msnd 0xa1bcc420	msnd_send_word
+EXPORT_SYMBOL sound/oss/msnd 0xade99e25	msnd_fifo_alloc
+EXPORT_SYMBOL sound/oss/msnd 0xb3520772	msnd_fifo_init
+EXPORT_SYMBOL sound/oss/msnd 0xdf0f59eb	msnd_fifo_write_io
+EXPORT_SYMBOL sound/oss/msnd 0xefdd1843	msnd_enable_irq
+EXPORT_SYMBOL sound/oss/msnd 0xf4c4f662	msnd_fifo_read_io
+EXPORT_SYMBOL sound/oss/sb_lib 0x42424109	sb_be_quiet
+EXPORT_SYMBOL sound/oss/sb_lib 0x437e4986	sb_dsp_init
+EXPORT_SYMBOL sound/oss/sb_lib 0x450f9aea	smw_free
+EXPORT_SYMBOL sound/oss/sb_lib 0x5d5a4583	probe_sbmpu
+EXPORT_SYMBOL sound/oss/sb_lib 0x74afd69c	unload_sbmpu
+EXPORT_SYMBOL sound/oss/sb_lib 0xc4884969	sb_dsp_unload
+EXPORT_SYMBOL sound/oss/sb_lib 0xd8a2731c	sb_dsp_detect
+EXPORT_SYMBOL sound/oss/sound 0x04c87ec8	compute_finetune
+EXPORT_SYMBOL sound/oss/sound 0x06339815	sound_unload_synthdev
+EXPORT_SYMBOL sound/oss/sound 0x0f280035	conf_printf
+EXPORT_SYMBOL sound/oss/sound 0x17ba231d	seq_input_event
+EXPORT_SYMBOL sound/oss/sound 0x1b3df3cf	sound_alloc_mixerdev
+EXPORT_SYMBOL sound/oss/sound 0x1f395686	MIDIbuf_avail
+EXPORT_SYMBOL sound/oss/sound 0x2161d5e8	sound_timer_init
+EXPORT_SYMBOL sound/oss/sound 0x2aa31695	midi_synth_kill_note
+EXPORT_SYMBOL sound/oss/sound 0x394cb088	sound_free_dma
+EXPORT_SYMBOL sound/oss/sound 0x418f5fbe	sound_close_dma
+EXPORT_SYMBOL sound/oss/sound 0x4cd01bdd	num_audiodevs
+EXPORT_SYMBOL sound/oss/sound 0x4ff47e9d	midi_synth_setup_voice
+EXPORT_SYMBOL sound/oss/sound 0x51e354b2	sound_alloc_timerdev
+EXPORT_SYMBOL sound/oss/sound 0x56504ca2	midi_synth_reset
+EXPORT_SYMBOL sound/oss/sound 0x5d986fc9	note_to_freq
+EXPORT_SYMBOL sound/oss/sound 0x5da44f51	mixer_devs
+EXPORT_SYMBOL sound/oss/sound 0x72ff1686	synth_devs
+EXPORT_SYMBOL sound/oss/sound 0x7679ee76	seq_copy_to_input
+EXPORT_SYMBOL sound/oss/sound 0x7bdf0907	conf_printf2
+EXPORT_SYMBOL sound/oss/sound 0x892093e0	midi_synth_controller
+EXPORT_SYMBOL sound/oss/sound 0x90bd9714	sequencer_timer
+EXPORT_SYMBOL sound/oss/sound 0x987bcf12	DMAbuf_outputintr
+EXPORT_SYMBOL sound/oss/sound 0x9a95733f	sound_alloc_dma
+EXPORT_SYMBOL sound/oss/sound 0x9bdaf24d	midi_synth_start_note
+EXPORT_SYMBOL sound/oss/sound 0x9d845b18	num_mixers
+EXPORT_SYMBOL sound/oss/sound 0xa1d5f04f	load_mixer_volumes
+EXPORT_SYMBOL sound/oss/sound 0xa1eae7cf	num_midis
+EXPORT_SYMBOL sound/oss/sound 0xa41ead5f	sound_unload_timerdev
+EXPORT_SYMBOL sound/oss/sound 0xa51c913b	sound_unload_mixerdev
+EXPORT_SYMBOL sound/oss/sound 0xa6bb414c	sound_unload_mididev
+EXPORT_SYMBOL sound/oss/sound 0xa948751e	sound_unload_audiodev
+EXPORT_SYMBOL sound/oss/sound 0xa9eefced	sound_install_audiodrv
+EXPORT_SYMBOL sound/oss/sound 0xad45df73	midi_synth_close
+EXPORT_SYMBOL sound/oss/sound 0xaef743b2	midi_synth_ioctl
+EXPORT_SYMBOL sound/oss/sound 0xb14b22cd	midi_synth_hw_control
+EXPORT_SYMBOL sound/oss/sound 0xb2c70867	audio_devs
+EXPORT_SYMBOL sound/oss/sound 0xb51587f6	do_midi_msg
+EXPORT_SYMBOL sound/oss/sound 0xba413f87	sound_alloc_mididev
+EXPORT_SYMBOL sound/oss/sound 0xba7dd041	midi_synth_bender
+EXPORT_SYMBOL sound/oss/sound 0xc697487b	sound_install_mixer
+EXPORT_SYMBOL sound/oss/sound 0xc748d109	sound_alloc_synthdev
+EXPORT_SYMBOL sound/oss/sound 0xcab4d5bf	midi_synth_load_patch
+EXPORT_SYMBOL sound/oss/sound 0xcc4b8797	sound_open_dma
+EXPORT_SYMBOL sound/oss/sound 0xd85be938	midi_synth_set_instr
+EXPORT_SYMBOL sound/oss/sound 0xdb400afa	midi_synth_panning
+EXPORT_SYMBOL sound/oss/sound 0xddd81f64	midi_devs
+EXPORT_SYMBOL sound/oss/sound 0xe056b71c	DMAbuf_start_dma
+EXPORT_SYMBOL sound/oss/sound 0xe2675a79	sound_timer_interrupt
+EXPORT_SYMBOL sound/oss/sound 0xeb315d99	DMAbuf_inputintr
+EXPORT_SYMBOL sound/oss/sound 0xf1ea8a20	midi_synth_aftertouch
+EXPORT_SYMBOL sound/oss/sound 0xf6b3a2fb	midi_synth_open
+EXPORT_SYMBOL sound/oss/sound 0xf78f6363	sequencer_init
+EXPORT_SYMBOL sound/oss/sound 0xfa6871be	sound_timer_syncinterval
+EXPORT_SYMBOL sound/oss/sound 0xfbeb8d19	sound_timer_devs
+EXPORT_SYMBOL sound/oss/sound 0xfddcbfb3	midi_synth_send_sysex
+EXPORT_SYMBOL sound/oss/uart401 0x049cd8b7	uart401intr
+EXPORT_SYMBOL sound/oss/uart401 0x5bf2d632	probe_uart401
+EXPORT_SYMBOL sound/oss/uart401 0xecfdd9c9	unload_uart401
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x101af03d	snd_ac97_mixer
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x1903090e	snd_ac97_tune_hardware
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x226d85bb	snd_ac97_resume
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x37487312	snd_ac97_set_rate
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x3a6361e1	snd_ac97_bus
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x4b182924	snd_ac97_pcm_open
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x5f3d2fa7	snd_ac97_update_power
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x70300c59	snd_ac97_pcm_close
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x7111eecc	snd_ac97_pcm_assign
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x8ee0b728	snd_ac97_write
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x9f733a39	snd_ac97_suspend
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xb13731e9	snd_ac97_get_short_name
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xb146c5cb	snd_ac97_write_cache
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xef6b6eb8	snd_ac97_read
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xf5e96ff8	snd_ac97_update_bits
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xfa17fb0e	snd_ac97_update
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xfb56cc46	snd_ac97_pcm_double_rate_rules
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x24c1b2d1	snd_emu10k1_synth_free
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x274e4412	snd_emu10k1_voice_alloc
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x6d00c02e	snd_emu10k1_synth_copy_from_user
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x6fb01ec9	snd_emu10k1_ptr_read
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x7aae1d63	snd_emu10k1_synth_bzero
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x90e34b7c	snd_emu10k1_synth_alloc
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xa8a10d07	snd_emu10k1_voice_free
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xbec1368a	snd_emu10k1_ptr_write
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xcd002f99	snd_emu10k1_memblk_map
+EXPORT_SYMBOL sound/pci/hda/snd-hda-codec 0x756b5dd0	snd_hda_parse_generic_codec
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x93c6d071	snd_ice1712_akm4xxx_build_controls
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0xab9af88c	snd_ice1712_akm4xxx_free
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0xf490fc0f	snd_ice1712_akm4xxx_init
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x052a8cd1	oxygen_write16_masked
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x1b6bdcb0	oxygen_write_ac97_masked
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x2433f436	oxygen_pci_suspend
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x316f1377	oxygen_write_i2c
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x36930da6	oxygen_pci_remove
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x3d4f0e0a	oxygen_write_ac97
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x614bc1bf	oxygen_write_spi
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x61906ef3	oxygen_reset_uart
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x67346c7e	oxygen_read_ac97
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x688bf872	oxygen_write16
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x6c7370d8	oxygen_read16
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x70a9555b	oxygen_pci_probe
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x799c4323	oxygen_read32
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x7a6f5611	oxygen_write32_masked
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x91b1221e	oxygen_pci_resume
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x9968ad0d	oxygen_write8
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xb06c0dae	oxygen_write32
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xdd0edc9a	oxygen_write_uart
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xe6f46af4	oxygen_write8_masked
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xf3557466	oxygen_read8
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x377f6bc4	snd_trident_free_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x8adb771f	snd_trident_stop_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x9b5587ef	snd_trident_write_voice_regs
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0xcb05cc24	snd_trident_alloc_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0xf15ee2ec	snd_trident_start_voice
+EXPORT_SYMBOL sound/soc/codecs/snd-soc-uda134x 0x45845a91	uda134x_dai
+EXPORT_SYMBOL sound/sound_firmware 0x39e3dd23	mod_firmware_load
+EXPORT_SYMBOL sound/soundcore 0x1ff70f39	sound_class
+EXPORT_SYMBOL sound/soundcore 0x3bd18c3e	register_sound_special
+EXPORT_SYMBOL sound/soundcore 0x4b9100e3	register_sound_dsp
+EXPORT_SYMBOL sound/soundcore 0x7afc9d8a	unregister_sound_mixer
+EXPORT_SYMBOL sound/soundcore 0x7dd937b7	register_sound_special_device
+EXPORT_SYMBOL sound/soundcore 0x84735ee2	register_sound_mixer
+EXPORT_SYMBOL sound/soundcore 0x99c95fa5	unregister_sound_special
+EXPORT_SYMBOL sound/soundcore 0xba26497a	register_sound_midi
+EXPORT_SYMBOL sound/soundcore 0xcd083b10	unregister_sound_dsp
+EXPORT_SYMBOL sound/soundcore 0xfdab6de3	unregister_sound_midi
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x0261d565	snd_emux_register
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x34af6244	snd_emux_free
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x5b91b460	snd_emux_lock_voice
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x655cb202	snd_sf_linear_to_log
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xb9b9af2d	snd_emux_terminate_all
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xd1d7eaae	snd_emux_unlock_voice
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xdce283b9	snd_emux_new
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x09966cca	__snd_util_mem_free
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x0d7e60bc	snd_util_memhdr_new
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x45bbf6e6	snd_util_mem_avail
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x6faf8d5a	snd_util_memhdr_free
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x988fef82	__snd_util_mem_alloc
+EXPORT_SYMBOL sound/synth/snd-util-mem 0xba2b764f	__snd_util_memblk_new
+EXPORT_SYMBOL sound/synth/snd-util-mem 0xf4628cbe	snd_util_mem_free
+EXPORT_SYMBOL sound/synth/snd-util-mem 0xf5efba18	snd_util_mem_alloc
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0x0a0cd1bd	snd_usb_create_midi_interface
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0x16756dc0	snd_usbmidi_input_start
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0x63343b1d	snd_usbmidi_input_stop
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0xd9d2bb03	snd_usbmidi_disconnect
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x0dc35ee3	dm_mem_cache_shrink
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x310aa23e	dm_mem_cache_grow
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x6ee13f6a	dm_mem_cache_client_destroy
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x7bb78c27	dm_mem_cache_client_create
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x7f3ae85e	dm_mem_cache_alloc
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x920a7a41	dm_message_parse
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x99c3fdcf	dm_mem_cache_free
+EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x04dca738	lirc_unregister_driver
+EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x49e1b932	lirc_register_driver
+EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x9496d423	lirc_get_pdata
+EXPORT_SYMBOL vmlinux 0x00000000	per_cpu__softirq_work_list
+EXPORT_SYMBOL vmlinux 0x004479a2	find_inode_number
+EXPORT_SYMBOL vmlinux 0x00546468	put_io_context
+EXPORT_SYMBOL vmlinux 0x007aff03	dev_remove_pack
+EXPORT_SYMBOL vmlinux 0x00801678	flush_scheduled_work
+EXPORT_SYMBOL vmlinux 0x0083c2f3	pci_release_regions
+EXPORT_SYMBOL vmlinux 0x009270e1	scsi_scan_host
+EXPORT_SYMBOL vmlinux 0x009d258f	_write_lock
+EXPORT_SYMBOL vmlinux 0x00ab0a99	tty_shutdown
+EXPORT_SYMBOL vmlinux 0x00c20395	__serio_register_driver
+EXPORT_SYMBOL vmlinux 0x00c4dc87	timecounter_init
+EXPORT_SYMBOL vmlinux 0x00d29090	tty_write_room
+EXPORT_SYMBOL vmlinux 0x00e8097b	csum_partial_copy_fromiovecend
+EXPORT_SYMBOL vmlinux 0x00e86f41	inetdev_by_index
+EXPORT_SYMBOL vmlinux 0x0109e6b1	rfkill_blocked
+EXPORT_SYMBOL vmlinux 0x01139ffc	max_mapnr
+EXPORT_SYMBOL vmlinux 0x012e2cb0	proto_register
+EXPORT_SYMBOL vmlinux 0x014401c7	inet_csk_clear_xmit_timers
+EXPORT_SYMBOL vmlinux 0x01471ea2	kset_unregister
+EXPORT_SYMBOL vmlinux 0x016de041	pci_set_power_state
+EXPORT_SYMBOL vmlinux 0x0186d073	percpu_counter_set
+EXPORT_SYMBOL vmlinux 0x01902adf	netpoll_trap
+EXPORT_SYMBOL vmlinux 0x0191a87c	put_disk
+EXPORT_SYMBOL vmlinux 0x019fa10b	inet_sock_destruct
+EXPORT_SYMBOL vmlinux 0x01a029e2	kunmap
+EXPORT_SYMBOL vmlinux 0x01a4aab6	set_irq_chip_data
+EXPORT_SYMBOL vmlinux 0x01b06500	phy_connect_direct
+EXPORT_SYMBOL vmlinux 0x01c19697	mca_device_status
+EXPORT_SYMBOL vmlinux 0x01d19038	acpi_enable_subsystem
+EXPORT_SYMBOL vmlinux 0x01d4bb51	tcp_sync_mss
+EXPORT_SYMBOL vmlinux 0x02124474	ip_send_check
+EXPORT_SYMBOL vmlinux 0x02257d5c	generic_error_remove_page
+EXPORT_SYMBOL vmlinux 0x022effd4	security_inode_notifysecctx
+EXPORT_SYMBOL vmlinux 0x0237b57a	arch_unregister_cpu
+EXPORT_SYMBOL vmlinux 0x0256389f	bit_waitqueue
+EXPORT_SYMBOL vmlinux 0x02584102	bioset_free
+EXPORT_SYMBOL vmlinux 0x02649054	security_sock_rcv_skb
+EXPORT_SYMBOL vmlinux 0x0269e699	mmc_set_data_timeout
+EXPORT_SYMBOL vmlinux 0x02876ffa	__bread
+EXPORT_SYMBOL vmlinux 0x0291829b	kmem_cache_destroy
+EXPORT_SYMBOL vmlinux 0x029444f0	native_read_tsc
+EXPORT_SYMBOL vmlinux 0x02a6ce5a	crc16_table
+EXPORT_SYMBOL vmlinux 0x02aff2f4	acpi_install_gpe_handler
+EXPORT_SYMBOL vmlinux 0x02b124d0	inode_get_bytes
+EXPORT_SYMBOL vmlinux 0x02b35133	locks_remove_posix
+EXPORT_SYMBOL vmlinux 0x02cba26a	km_policy_notify
+EXPORT_SYMBOL vmlinux 0x02d81845	audit_log_task_context
+EXPORT_SYMBOL vmlinux 0x02ebb631	tcp_md5_hash_header
+EXPORT_SYMBOL vmlinux 0x02ee26c1	free_pages_exact
+EXPORT_SYMBOL vmlinux 0x03093c31	should_remove_suid
+EXPORT_SYMBOL vmlinux 0x031916c9	ethtool_op_get_tx_csum
+EXPORT_SYMBOL vmlinux 0x0334da4e	scsi_command_size_tbl
+EXPORT_SYMBOL vmlinux 0x0337037e	send_sig_info
+EXPORT_SYMBOL vmlinux 0x0337b33c	sock_wfree
+EXPORT_SYMBOL vmlinux 0x03403725	remap_vmalloc_range
+EXPORT_SYMBOL vmlinux 0x0340d0e1	acpi_pci_osc_control_set
+EXPORT_SYMBOL vmlinux 0x03774008	posix_test_lock
+EXPORT_SYMBOL vmlinux 0x0378f0ff	ip4_datagram_connect
+EXPORT_SYMBOL vmlinux 0x037a0cba	kfree
+EXPORT_SYMBOL vmlinux 0x037f5c9a	pv_mmu_ops
+EXPORT_SYMBOL vmlinux 0x039146e2	sock_no_connect
+EXPORT_SYMBOL vmlinux 0x03a09f8d	simple_readpage
+EXPORT_SYMBOL vmlinux 0x03b737d0	xfrm_state_update
+EXPORT_SYMBOL vmlinux 0x03c06156	bitmap_fold
+EXPORT_SYMBOL vmlinux 0x03dadb35	vfs_writev
+EXPORT_SYMBOL vmlinux 0x03fd2571	vm_unmap_ram
+EXPORT_SYMBOL vmlinux 0x03fedd30	skb_abort_seq_read
+EXPORT_SYMBOL vmlinux 0x041df904	get_fs_type
+EXPORT_SYMBOL vmlinux 0x0422fe4a	inet_csk_timer_bug_msg
+EXPORT_SYMBOL vmlinux 0x0424a8af	tcf_action_dump_1
+EXPORT_SYMBOL vmlinux 0x044a7b8d	alloc_etherdev_mq
+EXPORT_SYMBOL vmlinux 0x0456249c	end_buffer_read_sync
+EXPORT_SYMBOL vmlinux 0x0482ad8a	request_firmware
+EXPORT_SYMBOL vmlinux 0x0487f831	fb_find_best_display
+EXPORT_SYMBOL vmlinux 0x048c08b7	ethtool_op_get_flags
+EXPORT_SYMBOL vmlinux 0x04a0b3f7	register_con_driver
+EXPORT_SYMBOL vmlinux 0x04a77e2b	__xfrm_decode_session
+EXPORT_SYMBOL vmlinux 0x04b247fd	zero_fill_bio
+EXPORT_SYMBOL vmlinux 0x04d8c750	release_perfctr_nmi
+EXPORT_SYMBOL vmlinux 0x0515d2dd	scsi_host_set_state
+EXPORT_SYMBOL vmlinux 0x05240ee7	percpu_counter_batch
+EXPORT_SYMBOL vmlinux 0x0525dc8c	generic_block_fiemap
+EXPORT_SYMBOL vmlinux 0x055f0d3c	scsi_device_lookup_by_target
+EXPORT_SYMBOL vmlinux 0x05634b96	ipv6_skip_exthdr
+EXPORT_SYMBOL vmlinux 0x0575f7c7	tcf_exts_destroy
+EXPORT_SYMBOL vmlinux 0x057ce975	hex_dump_to_buffer
+EXPORT_SYMBOL vmlinux 0x0584408a	neigh_sysctl_register
+EXPORT_SYMBOL vmlinux 0x05e73a94	serio_reconnect
+EXPORT_SYMBOL vmlinux 0x05ee3db4	ethtool_op_set_tx_hw_csum
+EXPORT_SYMBOL vmlinux 0x060247fb	lookup_one_len
+EXPORT_SYMBOL vmlinux 0x060e5f1d	filemap_fdatawrite_range
+EXPORT_SYMBOL vmlinux 0x061651be	strcat
+EXPORT_SYMBOL vmlinux 0x061dd282	i2c_add_adapter
+EXPORT_SYMBOL vmlinux 0x06220194	block_prepare_write
+EXPORT_SYMBOL vmlinux 0x063277c5	skb_gso_segment
+EXPORT_SYMBOL vmlinux 0x067d8d35	security_release_secctx
+EXPORT_SYMBOL vmlinux 0x0682b993	dcache_dir_lseek
+EXPORT_SYMBOL vmlinux 0x068c7263	ioremap_cache
+EXPORT_SYMBOL vmlinux 0x06b73547	remap_pfn_range
+EXPORT_SYMBOL vmlinux 0x06d728b1	tcp_parse_md5sig_option
+EXPORT_SYMBOL vmlinux 0x06f69e41	dquot_destroy
+EXPORT_SYMBOL vmlinux 0x06fe3b14	default_grn
+EXPORT_SYMBOL vmlinux 0x07230ac0	unregister_netdev
+EXPORT_SYMBOL vmlinux 0x0727c4f3	iowrite8
+EXPORT_SYMBOL vmlinux 0x073dfa12	generate_resume_trace
+EXPORT_SYMBOL vmlinux 0x07508f8b	mb_cache_shrink
+EXPORT_SYMBOL vmlinux 0x07608604	acpi_get_vendor_resource
+EXPORT_SYMBOL vmlinux 0x0799aca4	local_bh_enable
+EXPORT_SYMBOL vmlinux 0x0799c50a	param_set_ulong
+EXPORT_SYMBOL vmlinux 0x079f74bf	vfs_readv
+EXPORT_SYMBOL vmlinux 0x07a890c8	fb_alloc_cmap
+EXPORT_SYMBOL vmlinux 0x07a9ed10	tty_port_close_end
+EXPORT_SYMBOL vmlinux 0x07adb4ce	dquot_scan_active
+EXPORT_SYMBOL vmlinux 0x07af0fd9	journal_forget
+EXPORT_SYMBOL vmlinux 0x07cc4a5d	printk_timed_ratelimit
+EXPORT_SYMBOL vmlinux 0x07ccfcfe	blk_queue_io_opt
+EXPORT_SYMBOL vmlinux 0x07d50a24	csum_partial
+EXPORT_SYMBOL vmlinux 0x07d5d3ce	lookup_bdev
+EXPORT_SYMBOL vmlinux 0x07d9b783	scsi_nl_send_vendor_msg
+EXPORT_SYMBOL vmlinux 0x07f165c1	rfkill_unregister
+EXPORT_SYMBOL vmlinux 0x08068e4e	fib_default_rule_add
+EXPORT_SYMBOL vmlinux 0x080ff6fe	poll_freewait
+EXPORT_SYMBOL vmlinux 0x0820a301	genphy_suspend
+EXPORT_SYMBOL vmlinux 0x082c3213	pci_root_buses
+EXPORT_SYMBOL vmlinux 0x0836e9ba	dentry_unhash
+EXPORT_SYMBOL vmlinux 0x084adf37	scsi_device_put
+EXPORT_SYMBOL vmlinux 0x084b8e00	tty_unregister_driver
+EXPORT_SYMBOL vmlinux 0x0851ec92	try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0x0866a727	__dec_zone_page_state
+EXPORT_SYMBOL vmlinux 0x088e3cff	pcim_iounmap
+EXPORT_SYMBOL vmlinux 0x089d308a	locks_copy_lock
+EXPORT_SYMBOL vmlinux 0x089e66ee	kernel_bind
+EXPORT_SYMBOL vmlinux 0x08a20636	mark_buffer_async_write
+EXPORT_SYMBOL vmlinux 0x08bdb4a0	cdrom_open
+EXPORT_SYMBOL vmlinux 0x08d66a3a	warn_slowpath_fmt
+EXPORT_SYMBOL vmlinux 0x08ddebe3	dma_ops
+EXPORT_SYMBOL vmlinux 0x08fe65b7	skb_gro_reset_offset
+EXPORT_SYMBOL vmlinux 0x0913d4a7	vfs_set_dqblk
+EXPORT_SYMBOL vmlinux 0x09144253	sysctl_string
+EXPORT_SYMBOL vmlinux 0x0933aae1	efi_enabled
+EXPORT_SYMBOL vmlinux 0x0948cde9	num_physpages
+EXPORT_SYMBOL vmlinux 0x0951ff57	splice_from_pipe_feed
+EXPORT_SYMBOL vmlinux 0x0953993b	pci_bus_alloc_resource
+EXPORT_SYMBOL vmlinux 0x098b71c6	fb_dealloc_cmap
+EXPORT_SYMBOL vmlinux 0x09bb081d	acpi_bus_generate_proc_event
+EXPORT_SYMBOL vmlinux 0x09c55cec	schedule_timeout_interruptible
+EXPORT_SYMBOL vmlinux 0x09d44df9	in_lock_functions
+EXPORT_SYMBOL vmlinux 0x09e88b09	audit_log_format
+EXPORT_SYMBOL vmlinux 0x0a1e87f9	atomic64_add_negative
+EXPORT_SYMBOL vmlinux 0x0a2487e0	unblock_all_signals
+EXPORT_SYMBOL vmlinux 0x0a2a0a84	dquot_claim_space
+EXPORT_SYMBOL vmlinux 0x0a3131f6	strnchr
+EXPORT_SYMBOL vmlinux 0x0aa3fae1	dqget
+EXPORT_SYMBOL vmlinux 0x0aaa21d4	netdev_boot_setup_check
+EXPORT_SYMBOL vmlinux 0x0abd98ab	open_by_devnum
+EXPORT_SYMBOL vmlinux 0x0acb1a3c	__bitmap_shift_right
+EXPORT_SYMBOL vmlinux 0x0acf7679	dma_issue_pending_all
+EXPORT_SYMBOL vmlinux 0x0af1fc0e	uart_write_wakeup
+EXPORT_SYMBOL vmlinux 0x0b0c2dd5	pnp_disable_dev
+EXPORT_SYMBOL vmlinux 0x0b0d888b	icmpv6_err_convert
+EXPORT_SYMBOL vmlinux 0x0b105622	blk_queue_resize_tags
+EXPORT_SYMBOL vmlinux 0x0b1286f8	netif_napi_add
+EXPORT_SYMBOL vmlinux 0x0b166716	unregister_key_type
+EXPORT_SYMBOL vmlinux 0x0b1beb31	vmalloc_32_user
+EXPORT_SYMBOL vmlinux 0x0b5d8620	generic_file_aio_read
+EXPORT_SYMBOL vmlinux 0x0b742fd7	simple_strtol
+EXPORT_SYMBOL vmlinux 0x0b85ec51	jbd2_journal_force_commit
+EXPORT_SYMBOL vmlinux 0x0bae203c	sock_no_bind
+EXPORT_SYMBOL vmlinux 0x0bf7a398	mdiobus_write
+EXPORT_SYMBOL vmlinux 0x0c5f27eb	get_sb_single
+EXPORT_SYMBOL vmlinux 0x0c604ca3	pci_lost_interrupt
+EXPORT_SYMBOL vmlinux 0x0c65e73c	scsi_normalize_sense
+EXPORT_SYMBOL vmlinux 0x0c8c9e99	scsi_show_extd_sense
+EXPORT_SYMBOL vmlinux 0x0ca7b7a8	acpi_check_region
+EXPORT_SYMBOL vmlinux 0x0cae232b	utf16s_to_utf8s
+EXPORT_SYMBOL vmlinux 0x0cbebb5e	pnp_stop_dev
+EXPORT_SYMBOL vmlinux 0x0cbef08d	module_layout
+EXPORT_SYMBOL vmlinux 0x0cf86669	blk_complete_request
+EXPORT_SYMBOL vmlinux 0x0d1bef4b	blk_sync_queue
+EXPORT_SYMBOL vmlinux 0x0d244065	mmc_remove_host
+EXPORT_SYMBOL vmlinux 0x0d26a76d	_write_lock_irq
+EXPORT_SYMBOL vmlinux 0x0d3dda14	acpi_get_type
+EXPORT_SYMBOL vmlinux 0x0d4b77b7	gen_pool_add
+EXPORT_SYMBOL vmlinux 0x0d542439	__ipv6_addr_type
+EXPORT_SYMBOL vmlinux 0x0d6c963c	copy_from_user
+EXPORT_SYMBOL vmlinux 0x0d73a26e	xfrm_policy_insert
+EXPORT_SYMBOL vmlinux 0x0d8320f7	mark_info_dirty
+EXPORT_SYMBOL vmlinux 0x0d8cf1d4	block_page_mkwrite
+EXPORT_SYMBOL vmlinux 0x0da00fbe	rtnl_create_link
+EXPORT_SYMBOL vmlinux 0x0da10ec3	security_sock_graft
+EXPORT_SYMBOL vmlinux 0x0dae1184	pci_bus_set_ops
+EXPORT_SYMBOL vmlinux 0x0e13cbd9	km_policy_expired
+EXPORT_SYMBOL vmlinux 0x0e2cde27	proc_dostring
+EXPORT_SYMBOL vmlinux 0x0e4f4755	security_path_mkdir
+EXPORT_SYMBOL vmlinux 0x0e50c7ac	elv_add_request
+EXPORT_SYMBOL vmlinux 0x0e52592a	panic
+EXPORT_SYMBOL vmlinux 0x0e656a2d	dst_alloc
+EXPORT_SYMBOL vmlinux 0x0e71edd0	blk_put_request
+EXPORT_SYMBOL vmlinux 0x0e83fea1	del_timer_sync
+EXPORT_SYMBOL vmlinux 0x0ebc9885	proc_doulongvec_ms_jiffies_minmax
+EXPORT_SYMBOL vmlinux 0x0edc4273	ps2_command
+EXPORT_SYMBOL vmlinux 0x0ef048e2	dma_pool_create
+EXPORT_SYMBOL vmlinux 0x0f1ef871	posix_acl_alloc
+EXPORT_SYMBOL vmlinux 0x0f31d6a0	mutex_lock_interruptible
+EXPORT_SYMBOL vmlinux 0x0f3b9527	vmalloc_to_page
+EXPORT_SYMBOL vmlinux 0x0f420217	scsi_device_quiesce
+EXPORT_SYMBOL vmlinux 0x0f81f648	spi_attach_transport
+EXPORT_SYMBOL vmlinux 0x0f8f7c1b	blk_plug_device_unlocked
+EXPORT_SYMBOL vmlinux 0x0f991198	pci_bus_type
+EXPORT_SYMBOL vmlinux 0x0fd00a68	acpi_clear_event
+EXPORT_SYMBOL vmlinux 0x0ff2b602	slhc_compress
+EXPORT_SYMBOL vmlinux 0x102699af	clip_tbl_hook
+EXPORT_SYMBOL vmlinux 0x102ec3a9	scsi_cmd_print_sense_hdr
+EXPORT_SYMBOL vmlinux 0x103fe7c6	cdrom_mode_sense
+EXPORT_SYMBOL vmlinux 0x10483bf9	update_region
+EXPORT_SYMBOL vmlinux 0x105e2727	__tracepoint_kmalloc
+EXPORT_SYMBOL vmlinux 0x107e9040	pci_disable_msix
+EXPORT_SYMBOL vmlinux 0x108e8985	param_get_uint
+EXPORT_SYMBOL vmlinux 0x108ec5cf	mmc_detect_change
+EXPORT_SYMBOL vmlinux 0x1090d4e1	blk_queue_invalidate_tags
+EXPORT_SYMBOL vmlinux 0x10a134e6	inode_add_bytes
+EXPORT_SYMBOL vmlinux 0x10ee20bb	default_blu
+EXPORT_SYMBOL vmlinux 0x10ff42a4	devm_ioport_unmap
+EXPORT_SYMBOL vmlinux 0x1106c7f8	qdisc_destroy
+EXPORT_SYMBOL vmlinux 0x111e15b9	xfrm_policy_delete
+EXPORT_SYMBOL vmlinux 0x11267875	scsi_extd_sense_format
+EXPORT_SYMBOL vmlinux 0x1137390e	prepare_kernel_cred
+EXPORT_SYMBOL vmlinux 0x113f44d6	dcache_dir_open
+EXPORT_SYMBOL vmlinux 0x1163f0a7	blk_max_low_pfn
+EXPORT_SYMBOL vmlinux 0x116deefa	sock_create_kern
+EXPORT_SYMBOL vmlinux 0x117093be	qdisc_class_hash_init
+EXPORT_SYMBOL vmlinux 0x1180f2be	mb_cache_create
+EXPORT_SYMBOL vmlinux 0x118f01ea	putname
+EXPORT_SYMBOL vmlinux 0x11a18b14	__wake_up_bit
+EXPORT_SYMBOL vmlinux 0x11b8b69b	submit_bio
+EXPORT_SYMBOL vmlinux 0x11cd4fbc	phy_register_fixup
+EXPORT_SYMBOL vmlinux 0x11d98dc3	end_page_writeback
+EXPORT_SYMBOL vmlinux 0x11dfebf4	bitmap_close_sync
+EXPORT_SYMBOL vmlinux 0x120507ac	idr_get_new
+EXPORT_SYMBOL vmlinux 0x12298dea	pci_set_dma_seg_boundary
+EXPORT_SYMBOL vmlinux 0x1242123d	__scsi_add_device
+EXPORT_SYMBOL vmlinux 0x1255db4f	dm_unregister_target
+EXPORT_SYMBOL vmlinux 0x1266ee03	thaw_bdev
+EXPORT_SYMBOL vmlinux 0x12797aac	neigh_event_ns
+EXPORT_SYMBOL vmlinux 0x1298f100	write_one_page
+EXPORT_SYMBOL vmlinux 0x12d3dc23	inet_release
+EXPORT_SYMBOL vmlinux 0x12da5bb2	__kmalloc
+EXPORT_SYMBOL vmlinux 0x12dcb1a6	__scsi_device_lookup
+EXPORT_SYMBOL vmlinux 0x12e5b14e	dm_table_put
+EXPORT_SYMBOL vmlinux 0x12f10736	udplite_table
+EXPORT_SYMBOL vmlinux 0x12fa16b5	sock_alloc_send_pskb
+EXPORT_SYMBOL vmlinux 0x1303aa8a	napi_reuse_skb
+EXPORT_SYMBOL vmlinux 0x130e66ce	journal_force_commit
+EXPORT_SYMBOL vmlinux 0x131a1601	invalidate_inode_buffers
+EXPORT_SYMBOL vmlinux 0x135e2767	__ps2_command
+EXPORT_SYMBOL vmlinux 0x136e6ca2	bio_integrity_clone
+EXPORT_SYMBOL vmlinux 0x1378e714	acpi_video_display_switch_support
+EXPORT_SYMBOL vmlinux 0x137c37e1	serio_unregister_child_port
+EXPORT_SYMBOL vmlinux 0x1392b02a	dev_get_by_flags
+EXPORT_SYMBOL vmlinux 0x13b3281a	set_bdi_congested
+EXPORT_SYMBOL vmlinux 0x13e8fd1d	i2c_del_adapter
+EXPORT_SYMBOL vmlinux 0x13f42152	system_entering_hibernation
+EXPORT_SYMBOL vmlinux 0x1400960f	nf_unregister_hooks
+EXPORT_SYMBOL vmlinux 0x14113463	mb_cache_entry_alloc
+EXPORT_SYMBOL vmlinux 0x1430e6e0	unregister_acpi_notifier
+EXPORT_SYMBOL vmlinux 0x14422ee7	scm_detach_fds
+EXPORT_SYMBOL vmlinux 0x145bffaa	blk_queue_bounce_limit
+EXPORT_SYMBOL vmlinux 0x14778cad	proc_dointvec
+EXPORT_SYMBOL vmlinux 0x1484f1ff	ilookup5
+EXPORT_SYMBOL vmlinux 0x14a04e10	textsearch_prepare
+EXPORT_SYMBOL vmlinux 0x14a3e924	dm_dirty_log_type_unregister
+EXPORT_SYMBOL vmlinux 0x14af0cf7	gen_pool_destroy
+EXPORT_SYMBOL vmlinux 0x14daac09	alloc_fddidev
+EXPORT_SYMBOL vmlinux 0x153a7269	kthread_create
+EXPORT_SYMBOL vmlinux 0x154432e1	sync_mapping_buffers
+EXPORT_SYMBOL vmlinux 0x1551dc51	bitmap_find_free_region
+EXPORT_SYMBOL vmlinux 0x15624c3f	tty_hangup
+EXPORT_SYMBOL vmlinux 0x156e8d0c	skb_make_writable
+EXPORT_SYMBOL vmlinux 0x157589e1	posix_lock_file_wait
+EXPORT_SYMBOL vmlinux 0x1581d17f	bdi_set_max_ratio
+EXPORT_SYMBOL vmlinux 0x15950417	scsi_register_interface
+EXPORT_SYMBOL vmlinux 0x159ab1e0	tcp_make_synack
+EXPORT_SYMBOL vmlinux 0x15a59a38	dm_put_device
+EXPORT_SYMBOL vmlinux 0x15b7fa96	___pskb_trim
+EXPORT_SYMBOL vmlinux 0x15c17830	ps2_handle_response
+EXPORT_SYMBOL vmlinux 0x15c2229d	vfs_dq_transfer
+EXPORT_SYMBOL vmlinux 0x15cfc7c9	blk_cleanup_queue
+EXPORT_SYMBOL vmlinux 0x15da37b2	inode_setattr
+EXPORT_SYMBOL vmlinux 0x15ef2dd9	kfifo_free
+EXPORT_SYMBOL vmlinux 0x160ea4c8	sfi_disabled
+EXPORT_SYMBOL vmlinux 0x1613cf37	dm_dirty_log_type_register
+EXPORT_SYMBOL vmlinux 0x16305289	warn_slowpath_null
+EXPORT_SYMBOL vmlinux 0x163c5e39	twl4030_i2c_read
+EXPORT_SYMBOL vmlinux 0x1663480d	sk_stream_kill_queues
+EXPORT_SYMBOL vmlinux 0x1675606f	bad_dma_address
+EXPORT_SYMBOL vmlinux 0x167e7f9d	__get_user_1
+EXPORT_SYMBOL vmlinux 0x16925094	i2c_smbus_read_byte
+EXPORT_SYMBOL vmlinux 0x169447d7	journal_init_dev
+EXPORT_SYMBOL vmlinux 0x16bfd7c2	invalidate_partition
+EXPORT_SYMBOL vmlinux 0x16c70594	scsi_release_buffers
+EXPORT_SYMBOL vmlinux 0x16dd7e9c	tcp_connect
+EXPORT_SYMBOL vmlinux 0x16f50745	bitmap_end_sync
+EXPORT_SYMBOL vmlinux 0x16f8d96d	do_sync_write
+EXPORT_SYMBOL vmlinux 0x17092dd0	journal_ack_err
+EXPORT_SYMBOL vmlinux 0x170c25ee	acpi_get_next_object
+EXPORT_SYMBOL vmlinux 0x17285946	tcp_simple_retransmit
+EXPORT_SYMBOL vmlinux 0x173ead67	sock_alloc_send_skb
+EXPORT_SYMBOL vmlinux 0x17656ae5	skb_put
+EXPORT_SYMBOL vmlinux 0x1780bcab	seq_puts
+EXPORT_SYMBOL vmlinux 0x179b5efc	pagevec_lookup
+EXPORT_SYMBOL vmlinux 0x17d394da	tcp4_gro_receive
+EXPORT_SYMBOL vmlinux 0x17df17bc	sysctl_tcp_ecn
+EXPORT_SYMBOL vmlinux 0x17ec8fd8	ipv6_chk_addr
+EXPORT_SYMBOL vmlinux 0x17f0dbc6	ip_ct_attach
+EXPORT_SYMBOL vmlinux 0x17f341a0	i8042_lock_chip
+EXPORT_SYMBOL vmlinux 0x17f6d1ec	ip6_xmit
+EXPORT_SYMBOL vmlinux 0x180723d0	ip_mc_dec_group
+EXPORT_SYMBOL vmlinux 0x181b6ff2	mempool_resize
+EXPORT_SYMBOL vmlinux 0x1828341c	inet_frags_exit_net
+EXPORT_SYMBOL vmlinux 0x182d86b9	scsi_prep_return
+EXPORT_SYMBOL vmlinux 0x183902ed	tcp_gro_receive
+EXPORT_SYMBOL vmlinux 0x1839968c	bio_clone
+EXPORT_SYMBOL vmlinux 0x183edcca	__blk_run_queue
+EXPORT_SYMBOL vmlinux 0x183fa88b	mempool_alloc_slab
+EXPORT_SYMBOL vmlinux 0x1845e7c5	acpi_evaluate_integer
+EXPORT_SYMBOL vmlinux 0x184b2a10	path_put
+EXPORT_SYMBOL vmlinux 0x184b82fb	mmc_vddrange_to_ocrmask
+EXPORT_SYMBOL vmlinux 0x185c4e1c	pnp_register_driver
+EXPORT_SYMBOL vmlinux 0x18754b45	jbd2_log_start_commit
+EXPORT_SYMBOL vmlinux 0x1895713c	blk_recount_segments
+EXPORT_SYMBOL vmlinux 0x18a18249	unregister_framebuffer
+EXPORT_SYMBOL vmlinux 0x18c55c40	commit_creds
+EXPORT_SYMBOL vmlinux 0x18d11fb8	pci_get_slot
+EXPORT_SYMBOL vmlinux 0x18d2c4b8	km_new_mapping
+EXPORT_SYMBOL vmlinux 0x18e9b8fc	pskb_expand_head
+EXPORT_SYMBOL vmlinux 0x18f83f10	inet_put_port
+EXPORT_SYMBOL vmlinux 0x195fcf92	dm_io_client_create
+EXPORT_SYMBOL vmlinux 0x1976bc16	__tracepoint_kmem_cache_free
+EXPORT_SYMBOL vmlinux 0x1985ed3c	prepare_to_wait_exclusive
+EXPORT_SYMBOL vmlinux 0x199ed0cd	net_disable_timestamp
+EXPORT_SYMBOL vmlinux 0x19d046a0	tty_throttle
+EXPORT_SYMBOL vmlinux 0x19d5d20a	acpi_walk_namespace
+EXPORT_SYMBOL vmlinux 0x19ef6e5e	scsi_device_get
+EXPORT_SYMBOL vmlinux 0x1a11a524	tty_hung_up_p
+EXPORT_SYMBOL vmlinux 0x1a45cb6c	acpi_disabled
+EXPORT_SYMBOL vmlinux 0x1a46d2cb	sock_no_getname
+EXPORT_SYMBOL vmlinux 0x1a4eb47c	locks_mandatory_area
+EXPORT_SYMBOL vmlinux 0x1a75caa3	_read_lock
+EXPORT_SYMBOL vmlinux 0x1a7a1a65	blkdev_put
+EXPORT_SYMBOL vmlinux 0x1a8a845e	idle_nomwait
+EXPORT_SYMBOL vmlinux 0x1aa34342	inc_zone_page_state
+EXPORT_SYMBOL vmlinux 0x1aac532b	input_flush_device
+EXPORT_SYMBOL vmlinux 0x1abc1d6f	xfrm_stateonly_find
+EXPORT_SYMBOL vmlinux 0x1ace138d	bitmap_allocate_region
+EXPORT_SYMBOL vmlinux 0x1ae8fbf0	block_is_partially_uptodate
+EXPORT_SYMBOL vmlinux 0x1b015d25	bitmap_parselist
+EXPORT_SYMBOL vmlinux 0x1b18dac9	inet_frags_init
+EXPORT_SYMBOL vmlinux 0x1b1c9e9f	__brelse
+EXPORT_SYMBOL vmlinux 0x1b236d66	__napi_schedule
+EXPORT_SYMBOL vmlinux 0x1b6314fd	in_aton
+EXPORT_SYMBOL vmlinux 0x1b7b5ef9	insert_inode_locked4
+EXPORT_SYMBOL vmlinux 0x1b89419f	add_wait_queue_exclusive
+EXPORT_SYMBOL vmlinux 0x1b8b6657	scsi_dma_map
+EXPORT_SYMBOL vmlinux 0x1b8b95ad	i8042_unlock_chip
+EXPORT_SYMBOL vmlinux 0x1b9981cc	set_irq_wake
+EXPORT_SYMBOL vmlinux 0x1b9e0ff1	scsilun_to_int
+EXPORT_SYMBOL vmlinux 0x1ba4f14f	lro_receive_skb
+EXPORT_SYMBOL vmlinux 0x1bb692eb	dm_table_get
+EXPORT_SYMBOL vmlinux 0x1be7c57d	save_mount_options
+EXPORT_SYMBOL vmlinux 0x1befdc3c	new_inode
+EXPORT_SYMBOL vmlinux 0x1c1af916	set_normalized_timespec
+EXPORT_SYMBOL vmlinux 0x1c352ff4	vm_insert_mixed
+EXPORT_SYMBOL vmlinux 0x1c4b0b30	simple_getattr
+EXPORT_SYMBOL vmlinux 0x1c4ff72a	seq_open
+EXPORT_SYMBOL vmlinux 0x1c69cb76	pci_enable_device_mem
+EXPORT_SYMBOL vmlinux 0x1c6f25fb	inet_dev_addr_type
+EXPORT_SYMBOL vmlinux 0x1c7119e5	__vlan_hwaccel_rx
+EXPORT_SYMBOL vmlinux 0x1c8a04b0	acpi_reset
+EXPORT_SYMBOL vmlinux 0x1c9d09ac	blk_fetch_request
+EXPORT_SYMBOL vmlinux 0x1c9e978a	ps2_drain
+EXPORT_SYMBOL vmlinux 0x1cb30052	nobh_truncate_page
+EXPORT_SYMBOL vmlinux 0x1cbcf209	tcp_v4_send_check
+EXPORT_SYMBOL vmlinux 0x1cc6719a	register_reboot_notifier
+EXPORT_SYMBOL vmlinux 0x1ce7ec4c	rwsem_wake
+EXPORT_SYMBOL vmlinux 0x1cefe352	wait_for_completion
+EXPORT_SYMBOL vmlinux 0x1d185dd4	xfrm_register_type
+EXPORT_SYMBOL vmlinux 0x1d19c130	block_commit_write
+EXPORT_SYMBOL vmlinux 0x1d2e87c6	do_gettimeofday
+EXPORT_SYMBOL vmlinux 0x1d44be4b	jbd2_journal_load
+EXPORT_SYMBOL vmlinux 0x1d455f4b	i2c_verify_client
+EXPORT_SYMBOL vmlinux 0x1d69c7f8	pci_setup_cardbus
+EXPORT_SYMBOL vmlinux 0x1d742dd2	address_space_init_once
+EXPORT_SYMBOL vmlinux 0x1dc36131	fb_destroy_modedb
+EXPORT_SYMBOL vmlinux 0x1dcffa4f	inet_frag_destroy
+EXPORT_SYMBOL vmlinux 0x1dd571e6	fb_copy_cmap
+EXPORT_SYMBOL vmlinux 0x1e016e78	ipv6_push_nfrag_opts
+EXPORT_SYMBOL vmlinux 0x1e0c2be4	ioremap_wc
+EXPORT_SYMBOL vmlinux 0x1e25ef68	acpi_get_physical_device
+EXPORT_SYMBOL vmlinux 0x1e302a88	hippi_mac_addr
+EXPORT_SYMBOL vmlinux 0x1e66cf8d	netdev_set_master
+EXPORT_SYMBOL vmlinux 0x1e6d26a8	strstr
+EXPORT_SYMBOL vmlinux 0x1ea7516f	create_empty_buffers
+EXPORT_SYMBOL vmlinux 0x1ebf040e	xfrm4_prepare_output
+EXPORT_SYMBOL vmlinux 0x1ecb9943	posix_acl_to_xattr
+EXPORT_SYMBOL vmlinux 0x1efc7c24	tr_type_trans
+EXPORT_SYMBOL vmlinux 0x1efe283f	__cap_full_set
+EXPORT_SYMBOL vmlinux 0x1f028660	pci_select_bars
+EXPORT_SYMBOL vmlinux 0x1f305993	kobject_set_name
+EXPORT_SYMBOL vmlinux 0x1f57702a	uart_get_divisor
+EXPORT_SYMBOL vmlinux 0x1f69573a	kset_register
+EXPORT_SYMBOL vmlinux 0x1f76d2fd	bdget_disk
+EXPORT_SYMBOL vmlinux 0x1fa94437	lro_receive_frags
+EXPORT_SYMBOL vmlinux 0x1fd36831	d_invalidate
+EXPORT_SYMBOL vmlinux 0x1fdbe325	iunique
+EXPORT_SYMBOL vmlinux 0x1feb6553	inet_frags_fini
+EXPORT_SYMBOL vmlinux 0x1fedf0f4	__request_region
+EXPORT_SYMBOL vmlinux 0x1ff69dd8	vfs_fstatat
+EXPORT_SYMBOL vmlinux 0x20000329	simple_strtoul
+EXPORT_SYMBOL vmlinux 0x2000bcbe	tc_classify
+EXPORT_SYMBOL vmlinux 0x2005e68a	acpi_remove_fixed_event_handler
+EXPORT_SYMBOL vmlinux 0x20326d28	mmc_suspend_host
+EXPORT_SYMBOL vmlinux 0x2033b9ab	bitmap_endwrite
+EXPORT_SYMBOL vmlinux 0x20385c58	genl_register_mc_group
+EXPORT_SYMBOL vmlinux 0x203963c7	clear_inode
+EXPORT_SYMBOL vmlinux 0x203eb062	find_lock_page
+EXPORT_SYMBOL vmlinux 0x203f0fc8	sock_queue_rcv_skb
+EXPORT_SYMBOL vmlinux 0x204df1fd	mmc_wait_for_req
+EXPORT_SYMBOL vmlinux 0x205c76c3	xfrm6_rcv
+EXPORT_SYMBOL vmlinux 0x20750ce9	unregister_nls
+EXPORT_SYMBOL vmlinux 0x2077710e	eth_rebuild_header
+EXPORT_SYMBOL vmlinux 0x208739f6	acpi_load_table
+EXPORT_SYMBOL vmlinux 0x208db445	blk_init_queue_node
+EXPORT_SYMBOL vmlinux 0x20af3439	skb_split
+EXPORT_SYMBOL vmlinux 0x20e5c58b	da903x_query_status
+EXPORT_SYMBOL vmlinux 0x20e757ce	keyring_clear
+EXPORT_SYMBOL vmlinux 0x21012fc0	sock_tx_timestamp
+EXPORT_SYMBOL vmlinux 0x21136250	d_rehash
+EXPORT_SYMBOL vmlinux 0x211f8252	llc_set_station_handler
+EXPORT_SYMBOL vmlinux 0x21210b76	sg_miter_start
+EXPORT_SYMBOL vmlinux 0x21461540	elv_abort_queue
+EXPORT_SYMBOL vmlinux 0x214ab89e	tcp_poll
+EXPORT_SYMBOL vmlinux 0x215ebd78	bitrev16
+EXPORT_SYMBOL vmlinux 0x218acdf7	tcp_ioctl
+EXPORT_SYMBOL vmlinux 0x2190033e	tcp_disconnect
+EXPORT_SYMBOL vmlinux 0x21d50a51	tcf_hash_release
+EXPORT_SYMBOL vmlinux 0x21e0ea22	acpi_get_id
+EXPORT_SYMBOL vmlinux 0x21e73d71	__nla_put_nohdr
+EXPORT_SYMBOL vmlinux 0x221654a6	dquot_alloc_space
+EXPORT_SYMBOL vmlinux 0x222e7ce2	sysfs_streq
+EXPORT_SYMBOL vmlinux 0x2236aa69	simple_fill_super
+EXPORT_SYMBOL vmlinux 0x2238dbea	task_nice
+EXPORT_SYMBOL vmlinux 0x223ecef5	release_firmware
+EXPORT_SYMBOL vmlinux 0x22482941	ilookup5_nowait
+EXPORT_SYMBOL vmlinux 0x226e86a9	audit_log
+EXPORT_SYMBOL vmlinux 0x227a3614	pci_get_device
+EXPORT_SYMBOL vmlinux 0x2288378f	system_state
+EXPORT_SYMBOL vmlinux 0x22a73912	__tcp_put_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x22ae2711	llc_mac_hdr_init
+EXPORT_SYMBOL vmlinux 0x22b325d5	kd_mksound
+EXPORT_SYMBOL vmlinux 0x22b33bba	netdev_rx_csum_fault
+EXPORT_SYMBOL vmlinux 0x22b5d203	bitmap_start_sync
+EXPORT_SYMBOL vmlinux 0x22b6533b	xfrm_sad_getinfo
+EXPORT_SYMBOL vmlinux 0x22f91a62	serio_close
+EXPORT_SYMBOL vmlinux 0x231e8b9d	neigh_for_each
+EXPORT_SYMBOL vmlinux 0x23269a13	strict_strtoul
+EXPORT_SYMBOL vmlinux 0x238feff6	pcibios_set_irq_routing
+EXPORT_SYMBOL vmlinux 0x23909de2	i2c_smbus_write_byte
+EXPORT_SYMBOL vmlinux 0x23b3ec4a	tty_driver_flush_buffer
+EXPORT_SYMBOL vmlinux 0x23c8f257	slhc_uncompress
+EXPORT_SYMBOL vmlinux 0x23d301bf	write_cache_pages
+EXPORT_SYMBOL vmlinux 0x23fd3028	vmalloc_node
+EXPORT_SYMBOL vmlinux 0x24057331	unregister_filesystem
+EXPORT_SYMBOL vmlinux 0x240ee02c	mca_device_read_pos
+EXPORT_SYMBOL vmlinux 0x243ffddc	idr_destroy
+EXPORT_SYMBOL vmlinux 0x24428be5	strncpy_from_user
+EXPORT_SYMBOL vmlinux 0x244cb03c	mmc_power_restore_host
+EXPORT_SYMBOL vmlinux 0x2459bbcc	console_set_on_cmdline
+EXPORT_SYMBOL vmlinux 0x24624544	ftrace_print_flags_seq
+EXPORT_SYMBOL vmlinux 0x2473f028	netpoll_cleanup
+EXPORT_SYMBOL vmlinux 0x2494e4a1	kernel_getpeername
+EXPORT_SYMBOL vmlinux 0x24e4bb01	down_write_trylock
+EXPORT_SYMBOL vmlinux 0x24e5119c	tcp_v4_remember_stamp
+EXPORT_SYMBOL vmlinux 0x24fbc46d	get_disk
+EXPORT_SYMBOL vmlinux 0x24fc84c6	inet_twsk_deschedule
+EXPORT_SYMBOL vmlinux 0x24fdac79	wake_bit_function
+EXPORT_SYMBOL vmlinux 0x250113b4	memory_read_from_buffer
+EXPORT_SYMBOL vmlinux 0x25359f87	netdev_state_change
+EXPORT_SYMBOL vmlinux 0x25447b92	skb_pad
+EXPORT_SYMBOL vmlinux 0x2548b858	blk_unplug
+EXPORT_SYMBOL vmlinux 0x25820c64	fs_overflowuid
+EXPORT_SYMBOL vmlinux 0x258355b4	fb_find_best_mode
+EXPORT_SYMBOL vmlinux 0x259f6f78	add_disk
+EXPORT_SYMBOL vmlinux 0x25afae8f	alloc_trdev
+EXPORT_SYMBOL vmlinux 0x25d3e2a3	atomic64_dec_return
+EXPORT_SYMBOL vmlinux 0x25f96f55	ndisc_build_skb
+EXPORT_SYMBOL vmlinux 0x26225031	pci_vpd_truncate
+EXPORT_SYMBOL vmlinux 0x262a93fa	call_usermodehelper_setkeys
+EXPORT_SYMBOL vmlinux 0x262f6b0c	__find_get_block
+EXPORT_SYMBOL vmlinux 0x2653622f	jbd2_journal_wipe
+EXPORT_SYMBOL vmlinux 0x2675d87e	genphy_config_advert
+EXPORT_SYMBOL vmlinux 0x267827a5	devm_ioport_map
+EXPORT_SYMBOL vmlinux 0x267fc65b	__tasklet_hi_schedule
+EXPORT_SYMBOL vmlinux 0x2685c3d7	__sg_alloc_table
+EXPORT_SYMBOL vmlinux 0x268a2f20	request_key_async_with_auxdata
+EXPORT_SYMBOL vmlinux 0x268cc6a2	sys_close
+EXPORT_SYMBOL vmlinux 0x269dbfce	i2c_release_client
+EXPORT_SYMBOL vmlinux 0x26adee28	shrink_dcache_sb
+EXPORT_SYMBOL vmlinux 0x26b97053	phy_stop
+EXPORT_SYMBOL vmlinux 0x26e76fb8	sysctl_udp_wmem_min
+EXPORT_SYMBOL vmlinux 0x26f2ffe6	make_bad_inode
+EXPORT_SYMBOL vmlinux 0x271cba95	acpi_bus_private_data_handler
+EXPORT_SYMBOL vmlinux 0x2727da5d	_atomic_dec_and_lock
+EXPORT_SYMBOL vmlinux 0x272d394e	mtrr_del
+EXPORT_SYMBOL vmlinux 0x2731ce56	dma_async_memcpy_buf_to_buf
+EXPORT_SYMBOL vmlinux 0x27679e5b	open_bdev_exclusive
+EXPORT_SYMBOL vmlinux 0x27864d57	memparse
+EXPORT_SYMBOL vmlinux 0x278bc3e6	__skb_checksum_complete_head
+EXPORT_SYMBOL vmlinux 0x27af4c45	unbind_con_driver
+EXPORT_SYMBOL vmlinux 0x27b0f639	i2c_register_driver
+EXPORT_SYMBOL vmlinux 0x27b35c51	tcp_sockets_allocated
+EXPORT_SYMBOL vmlinux 0x27bbf221	disable_irq_nosync
+EXPORT_SYMBOL vmlinux 0x27c48832	kernel_getsockopt
+EXPORT_SYMBOL vmlinux 0x27c61ece	qdisc_put_stab
+EXPORT_SYMBOL vmlinux 0x27f0b798	i2c_smbus_write_word_data
+EXPORT_SYMBOL vmlinux 0x27f19ad5	mb_cache_entry_free
+EXPORT_SYMBOL vmlinux 0x27fbd1df	pci_disable_msi
+EXPORT_SYMBOL vmlinux 0x28094e6e	udp_proc_register
+EXPORT_SYMBOL vmlinux 0x28170f89	unregister_cdrom
+EXPORT_SYMBOL vmlinux 0x282489f4	dm_get_device
+EXPORT_SYMBOL vmlinux 0x2830ac42	sock_release
+EXPORT_SYMBOL vmlinux 0x283ab150	__dev_get_by_index
+EXPORT_SYMBOL vmlinux 0x28419f4d	xfrm6_input_addr
+EXPORT_SYMBOL vmlinux 0x285ac517	strict_strtoll
+EXPORT_SYMBOL vmlinux 0x2889bbd1	ppp_register_compressor
+EXPORT_SYMBOL vmlinux 0x28a2ed02	scsi_build_sense_buffer
+EXPORT_SYMBOL vmlinux 0x28ace8af	vm_insert_pfn
+EXPORT_SYMBOL vmlinux 0x28b715a6	isapnp_cfg_end
+EXPORT_SYMBOL vmlinux 0x2901ac40	truncate_inode_pages_range
+EXPORT_SYMBOL vmlinux 0x290572b5	input_event
+EXPORT_SYMBOL vmlinux 0x29099298	lro_flush_pkt
+EXPORT_SYMBOL vmlinux 0x290f69b3	setup_arg_pages
+EXPORT_SYMBOL vmlinux 0x292093f4	native_rdmsr_safe_regs
+EXPORT_SYMBOL vmlinux 0x2922f76b	bio_alloc
+EXPORT_SYMBOL vmlinux 0x293523de	netif_napi_del
+EXPORT_SYMBOL vmlinux 0x29537c9e	alloc_chrdev_region
+EXPORT_SYMBOL vmlinux 0x2986dbf8	qdisc_warn_nonwc
+EXPORT_SYMBOL vmlinux 0x2986e638	dev_disable_lro
+EXPORT_SYMBOL vmlinux 0x2987d2b2	xfrm6_prepare_output
+EXPORT_SYMBOL vmlinux 0x2988a144	scsi_block_when_processing_errors
+EXPORT_SYMBOL vmlinux 0x2999c389	dquot_drop
+EXPORT_SYMBOL vmlinux 0x29a604e3	input_release_device
+EXPORT_SYMBOL vmlinux 0x29bd4c46	__cap_init_eff_set
+EXPORT_SYMBOL vmlinux 0x29c36cf4	bd_set_size
+EXPORT_SYMBOL vmlinux 0x29ed9934	dma_set_mask
+EXPORT_SYMBOL vmlinux 0x29f5bf7d	unmap_mapping_range
+EXPORT_SYMBOL vmlinux 0x2a0167f4	kern_path
+EXPORT_SYMBOL vmlinux 0x2a029140	key_alloc
+EXPORT_SYMBOL vmlinux 0x2a0e335a	dev_set_drvdata
+EXPORT_SYMBOL vmlinux 0x2a2cbdba	blk_queue_free_tags
+EXPORT_SYMBOL vmlinux 0x2a303d4d	check_signature
+EXPORT_SYMBOL vmlinux 0x2a7fda3d	iov_iter_copy_from_user_atomic
+EXPORT_SYMBOL vmlinux 0x2a9c6425	inet_register_protosw
+EXPORT_SYMBOL vmlinux 0x2aa0e4fc	strncasecmp
+EXPORT_SYMBOL vmlinux 0x2aba2a80	jbd2_journal_release_buffer
+EXPORT_SYMBOL vmlinux 0x2ad5d69b	tcp_timewait_state_process
+EXPORT_SYMBOL vmlinux 0x2ae08957	sk_wait_data
+EXPORT_SYMBOL vmlinux 0x2ae3068a	call_usermodehelper_exec
+EXPORT_SYMBOL vmlinux 0x2aeb2800	mempool_create_node
+EXPORT_SYMBOL vmlinux 0x2af4a420	nobh_write_begin
+EXPORT_SYMBOL vmlinux 0x2b02a117	neigh_destroy
+EXPORT_SYMBOL vmlinux 0x2b0ba2b0	scsi_sense_desc_find
+EXPORT_SYMBOL vmlinux 0x2b1202af	rfkill_set_led_trigger_name
+EXPORT_SYMBOL vmlinux 0x2b5a6dd8	kill_pid
+EXPORT_SYMBOL vmlinux 0x2b5f6d8e	blk_start_queue
+EXPORT_SYMBOL vmlinux 0x2ba707a8	sysctl_tcp_low_latency
+EXPORT_SYMBOL vmlinux 0x2bb55d6e	acpi_remove_notify_handler
+EXPORT_SYMBOL vmlinux 0x2bb6fde2	__kfifo_put
+EXPORT_SYMBOL vmlinux 0x2bc95bd4	memset
+EXPORT_SYMBOL vmlinux 0x2be8dcd8	mca_register_driver_integrated
+EXPORT_SYMBOL vmlinux 0x2beca4b2	elevator_init
+EXPORT_SYMBOL vmlinux 0x2bfeb410	acpi_get_handle
+EXPORT_SYMBOL vmlinux 0x2c3a4589	__pskb_pull_tail
+EXPORT_SYMBOL vmlinux 0x2c3d0906	fb_set_suspend
+EXPORT_SYMBOL vmlinux 0x2c3f0ce7	pci_claim_resource
+EXPORT_SYMBOL vmlinux 0x2c4918a0	blk_execute_rq
+EXPORT_SYMBOL vmlinux 0x2c5749e6	acpi_clear_gpe
+EXPORT_SYMBOL vmlinux 0x2c6e2a4d	arp_xmit
+EXPORT_SYMBOL vmlinux 0x2c6ff8b9	mb_cache_entry_get
+EXPORT_SYMBOL vmlinux 0x2c8f5989	acpi_remove_address_space_handler
+EXPORT_SYMBOL vmlinux 0x2c9874fe	ida_remove
+EXPORT_SYMBOL vmlinux 0x2c98bfe9	k8_northbridges
+EXPORT_SYMBOL vmlinux 0x2cc3a247	pcim_iomap
+EXPORT_SYMBOL vmlinux 0x2cf20998	unregister_tcf_proto_ops
+EXPORT_SYMBOL vmlinux 0x2d0db08f	generic_removexattr
+EXPORT_SYMBOL vmlinux 0x2d1ddc3d	bitmap_cond_end_sync
+EXPORT_SYMBOL vmlinux 0x2d294049	icmp_send
+EXPORT_SYMBOL vmlinux 0x2d340881	journal_lock_updates
+EXPORT_SYMBOL vmlinux 0x2d37342e	cpu_online_mask
+EXPORT_SYMBOL vmlinux 0x2d415e9e	sk_send_sigurg
+EXPORT_SYMBOL vmlinux 0x2d463b3d	dentry_open
+EXPORT_SYMBOL vmlinux 0x2d5dd196	is_bad_inode
+EXPORT_SYMBOL vmlinux 0x2d6952e7	genphy_restart_aneg
+EXPORT_SYMBOL vmlinux 0x2d74c89b	override_creds
+EXPORT_SYMBOL vmlinux 0x2d89342a	scsi_show_sense_hdr
+EXPORT_SYMBOL vmlinux 0x2d8c193e	tcf_hash_search
+EXPORT_SYMBOL vmlinux 0x2da96d9c	wireless_spy_update
+EXPORT_SYMBOL vmlinux 0x2dbafbe3	pcibios_align_resource
+EXPORT_SYMBOL vmlinux 0x2dc0543e	acpi_lock_ac_dir
+EXPORT_SYMBOL vmlinux 0x2dcb0123	schedule_delayed_work_on
+EXPORT_SYMBOL vmlinux 0x2dd16564	arch_register_cpu
+EXPORT_SYMBOL vmlinux 0x2dedc4c2	acpi_format_exception
+EXPORT_SYMBOL vmlinux 0x2def7f76	rtc_cmos_write
+EXPORT_SYMBOL vmlinux 0x2e07f920	dmam_free_coherent
+EXPORT_SYMBOL vmlinux 0x2e0c22eb	ip_cmsg_recv
+EXPORT_SYMBOL vmlinux 0x2e2a9e65	thermal_cooling_device_register
+EXPORT_SYMBOL vmlinux 0x2e2ce9e0	sysctl_tcp_syncookies
+EXPORT_SYMBOL vmlinux 0x2e2f1595	set_create_files_as
+EXPORT_SYMBOL vmlinux 0x2e34165d	ip_queue_xmit
+EXPORT_SYMBOL vmlinux 0x2e4a39f8	sysctl_udp_mem
+EXPORT_SYMBOL vmlinux 0x2e60bace	memcpy
+EXPORT_SYMBOL vmlinux 0x2e9cc836	unregister_md_personality
+EXPORT_SYMBOL vmlinux 0x2eb9a0e8	_read_lock_irq
+EXPORT_SYMBOL vmlinux 0x2ee41c0a	dm_exception_store_type_unregister
+EXPORT_SYMBOL vmlinux 0x2efe5e09	atomic64_xchg
+EXPORT_SYMBOL vmlinux 0x2f287f0d	copy_to_user
+EXPORT_SYMBOL vmlinux 0x2f9fb0d8	nf_afinfo
+EXPORT_SYMBOL vmlinux 0x2fd35268	__bforget
+EXPORT_SYMBOL vmlinux 0x2fef62e5	tty_driver_kref_put
+EXPORT_SYMBOL vmlinux 0x3011b41a	sock_wake_async
+EXPORT_SYMBOL vmlinux 0x30123eb5	icmpv6_statistics
+EXPORT_SYMBOL vmlinux 0x301aa896	nla_put
+EXPORT_SYMBOL vmlinux 0x305a96f8	shrink_dcache_parent
+EXPORT_SYMBOL vmlinux 0x3079abf7	input_register_device
+EXPORT_SYMBOL vmlinux 0x307f7776	timecompare_offset
+EXPORT_SYMBOL vmlinux 0x30882815	pcim_pin_device
+EXPORT_SYMBOL vmlinux 0x308b7ee2	scsi_put_command
+EXPORT_SYMBOL vmlinux 0x309e09b1	__inet6_lookup_established
+EXPORT_SYMBOL vmlinux 0x30d1e004	nf_unregister_queue_handler
+EXPORT_SYMBOL vmlinux 0x30e74134	tty_termios_copy_hw
+EXPORT_SYMBOL vmlinux 0x310917fe	sort
+EXPORT_SYMBOL vmlinux 0x31121fe1	genl_unregister_mc_group
+EXPORT_SYMBOL vmlinux 0x312ca87f	security_path_symlink
+EXPORT_SYMBOL vmlinux 0x3142261d	set_page_dirty_lock
+EXPORT_SYMBOL vmlinux 0x3145216f	pci_dev_present
+EXPORT_SYMBOL vmlinux 0x3147857d	default_red
+EXPORT_SYMBOL vmlinux 0x314ece87	blk_alloc_queue_node
+EXPORT_SYMBOL vmlinux 0x315932db	dev_gro_receive
+EXPORT_SYMBOL vmlinux 0x31794c8d	blk_rq_map_sg
+EXPORT_SYMBOL vmlinux 0x3180d227	blk_peek_request
+EXPORT_SYMBOL vmlinux 0x3191f109	__krealloc
+EXPORT_SYMBOL vmlinux 0x319c69d6	mmc_release_host
+EXPORT_SYMBOL vmlinux 0x31a987c8	skb_add_rx_frag
+EXPORT_SYMBOL vmlinux 0x31df5167	__tcf_em_tree_match
+EXPORT_SYMBOL vmlinux 0x31e76b57	recalibrate_cpu_khz
+EXPORT_SYMBOL vmlinux 0x31f864e2	sock_get_timestamp
+EXPORT_SYMBOL vmlinux 0x32080822	set_trace_device
+EXPORT_SYMBOL vmlinux 0x320bf8eb	pci_save_state
+EXPORT_SYMBOL vmlinux 0x3252a82f	qdisc_create_dflt
+EXPORT_SYMBOL vmlinux 0x326df9e1	vfs_stat
+EXPORT_SYMBOL vmlinux 0x3283dfa3	vfs_unlink
+EXPORT_SYMBOL vmlinux 0x3285cc48	param_set_uint
+EXPORT_SYMBOL vmlinux 0x328601d5	blk_rq_unmap_user
+EXPORT_SYMBOL vmlinux 0x32864e04	filemap_flush
+EXPORT_SYMBOL vmlinux 0x329352eb	md_check_recovery
+EXPORT_SYMBOL vmlinux 0x32ad3f04	__destroy_inode
+EXPORT_SYMBOL vmlinux 0x32b3247b	sock_sendmsg
+EXPORT_SYMBOL vmlinux 0x3301adc3	xfrm_state_walk
+EXPORT_SYMBOL vmlinux 0x332b28eb	dev_driver_string
+EXPORT_SYMBOL vmlinux 0x332db9b7	pci_find_device
+EXPORT_SYMBOL vmlinux 0x3380b0b9	inet6_add_protocol
+EXPORT_SYMBOL vmlinux 0x33958f68	ip_dev_find
+EXPORT_SYMBOL vmlinux 0x33a8adf4	nobh_writepage
+EXPORT_SYMBOL vmlinux 0x33b16e7f	ppp_register_channel
+EXPORT_SYMBOL vmlinux 0x33ba4657	inode_claim_rsv_space
+EXPORT_SYMBOL vmlinux 0x33cb1450	pci_add_new_bus
+EXPORT_SYMBOL vmlinux 0x33d92f9a	prepare_to_wait
+EXPORT_SYMBOL vmlinux 0x33de761b	qdisc_watchdog_schedule
+EXPORT_SYMBOL vmlinux 0x33f0ed66	simple_pin_fs
+EXPORT_SYMBOL vmlinux 0x34020552	fifo_set_limit
+EXPORT_SYMBOL vmlinux 0x342c0401	kernel_connect
+EXPORT_SYMBOL vmlinux 0x342f60fe	apm_info
+EXPORT_SYMBOL vmlinux 0x3457cb68	param_set_long
+EXPORT_SYMBOL vmlinux 0x3461923c	pci_try_set_mwi
+EXPORT_SYMBOL vmlinux 0x3464507b	tcp_child_process
+EXPORT_SYMBOL vmlinux 0x347a1000	bh_submit_read
+EXPORT_SYMBOL vmlinux 0x34908c14	print_hex_dump_bytes
+EXPORT_SYMBOL vmlinux 0x3494c7c7	get_write_access
+EXPORT_SYMBOL vmlinux 0x349cba85	strchr
+EXPORT_SYMBOL vmlinux 0x349f3f0b	jbd2_journal_lock_updates
+EXPORT_SYMBOL vmlinux 0x34b7b6ec	scsi_unblock_requests
+EXPORT_SYMBOL vmlinux 0x34e75aed	pci_iomap
+EXPORT_SYMBOL vmlinux 0x34ea63aa	scsi_print_result
+EXPORT_SYMBOL vmlinux 0x34eb6947	bio_unmap_user
+EXPORT_SYMBOL vmlinux 0x34f5f398	acpi_bus_add
+EXPORT_SYMBOL vmlinux 0x3536d16b	jbd2_journal_destroy
+EXPORT_SYMBOL vmlinux 0x353f22ea	blk_queue_ordered
+EXPORT_SYMBOL vmlinux 0x355de638	blk_queue_merge_bvec
+EXPORT_SYMBOL vmlinux 0x35901022	elv_rb_add
+EXPORT_SYMBOL vmlinux 0x359b7bc1	blk_rq_map_user_iov
+EXPORT_SYMBOL vmlinux 0x35a7d239	dma_async_memcpy_pg_to_pg
+EXPORT_SYMBOL vmlinux 0x35c19678	jbd2_journal_start_commit
+EXPORT_SYMBOL vmlinux 0x35c2ba9e	refrigerator
+EXPORT_SYMBOL vmlinux 0x35c7a441	seq_write
+EXPORT_SYMBOL vmlinux 0x35da2e61	radix_tree_tag_get
+EXPORT_SYMBOL vmlinux 0x35e6ecde	phy_attach_direct
+EXPORT_SYMBOL vmlinux 0x35eb5e75	__scsi_device_lookup_by_target
+EXPORT_SYMBOL vmlinux 0x35f0faa2	acpi_evaluate_object
+EXPORT_SYMBOL vmlinux 0x35f7d7b1	set_page_dirty
+EXPORT_SYMBOL vmlinux 0x360b1afe	probe_irq_mask
+EXPORT_SYMBOL vmlinux 0x3611c5d0	register_qdisc
+EXPORT_SYMBOL vmlinux 0x36235577	dma_pool_destroy
+EXPORT_SYMBOL vmlinux 0x36299163	spi_release_transport
+EXPORT_SYMBOL vmlinux 0x3656bf5a	lock_kernel
+EXPORT_SYMBOL vmlinux 0x3686ea09	spi_print_msg
+EXPORT_SYMBOL vmlinux 0x36875389	__timecompare_update
+EXPORT_SYMBOL vmlinux 0x36aabdec	ppp_output_wakeup
+EXPORT_SYMBOL vmlinux 0x36e2fd84	gnet_stats_copy_app
+EXPORT_SYMBOL vmlinux 0x36fa7401	pipe_to_file
+EXPORT_SYMBOL vmlinux 0x3700735a	km_report
+EXPORT_SYMBOL vmlinux 0x3728101f	dev_get_flags
+EXPORT_SYMBOL vmlinux 0x3729c1b8	nf_log_unregister
+EXPORT_SYMBOL vmlinux 0x3744cf36	vmalloc_to_pfn
+EXPORT_SYMBOL vmlinux 0x374ed073	scnprintf
+EXPORT_SYMBOL vmlinux 0x379d65f5	gen_pool_alloc
+EXPORT_SYMBOL vmlinux 0x37befc70	jiffies_to_msecs
+EXPORT_SYMBOL vmlinux 0x37db8f19	dmi_get_date
+EXPORT_SYMBOL vmlinux 0x37e6ce18	blk_queue_alignment_offset
+EXPORT_SYMBOL vmlinux 0x37e74642	get_jiffies_64
+EXPORT_SYMBOL vmlinux 0x37ee6157	__netdev_alloc_page
+EXPORT_SYMBOL vmlinux 0x381c4bb1	cancel_delayed_work_sync
+EXPORT_SYMBOL vmlinux 0x3821ff9f	security_path_unlink
+EXPORT_SYMBOL vmlinux 0x384886af	blk_queue_update_dma_pad
+EXPORT_SYMBOL vmlinux 0x3861a6cb	cdrom_number_of_slots
+EXPORT_SYMBOL vmlinux 0x388799f6	unregister_kmmio_probe
+EXPORT_SYMBOL vmlinux 0x3887e3b9	bio_integrity_prep
+EXPORT_SYMBOL vmlinux 0x388cff32	unregister_sysrq_key
+EXPORT_SYMBOL vmlinux 0x388f9128	xfrm_state_walk_done
+EXPORT_SYMBOL vmlinux 0x38b92846	llc_remove_pack
+EXPORT_SYMBOL vmlinux 0x38cab31c	init_timer_deferrable_key
+EXPORT_SYMBOL vmlinux 0x38f91bda	pcim_iomap_regions_request_all
+EXPORT_SYMBOL vmlinux 0x3912a25f	serio_interrupt
+EXPORT_SYMBOL vmlinux 0x3980aac1	unregister_reboot_notifier
+EXPORT_SYMBOL vmlinux 0x39dc272a	block_fsync
+EXPORT_SYMBOL vmlinux 0x3a1585a9	page_zero_new_buffers
+EXPORT_SYMBOL vmlinux 0x3a2204c6	security_netlink_recv
+EXPORT_SYMBOL vmlinux 0x3a8bfd54	tcf_exts_dump_stats
+EXPORT_SYMBOL vmlinux 0x3a9b6fb9	blk_unregister_region
+EXPORT_SYMBOL vmlinux 0x3aa1dbcf	_spin_unlock_bh
+EXPORT_SYMBOL vmlinux 0x3ac8563e	simple_fsync
+EXPORT_SYMBOL vmlinux 0x3adc15b9	posix_acl_from_mode
+EXPORT_SYMBOL vmlinux 0x3ae831b6	kref_init
+EXPORT_SYMBOL vmlinux 0x3aea7ab1	unlock_rename
+EXPORT_SYMBOL vmlinux 0x3aed4e19	simple_write_begin
+EXPORT_SYMBOL vmlinux 0x3afd5050	misc_deregister
+EXPORT_SYMBOL vmlinux 0x3b1de801	scsi_host_alloc
+EXPORT_SYMBOL vmlinux 0x3b3016d3	cpufreq_unregister_notifier
+EXPORT_SYMBOL vmlinux 0x3b70ea43	__scsi_alloc_queue
+EXPORT_SYMBOL vmlinux 0x3b9e6975	jbd2_journal_check_used_features
+EXPORT_SYMBOL vmlinux 0x3ba1b106	tty_pair_get_pty
+EXPORT_SYMBOL vmlinux 0x3bb78130	set_current_groups
+EXPORT_SYMBOL vmlinux 0x3bb91471	phy_mii_ioctl
+EXPORT_SYMBOL vmlinux 0x3bbc4e14	send_sig
+EXPORT_SYMBOL vmlinux 0x3bd1b1f6	msecs_to_jiffies
+EXPORT_SYMBOL vmlinux 0x3bd678c9	scsi_print_sense
+EXPORT_SYMBOL vmlinux 0x3be2124b	simple_lookup
+EXPORT_SYMBOL vmlinux 0x3bf17b34	block_sync_page
+EXPORT_SYMBOL vmlinux 0x3bff9769	mnt_pin
+EXPORT_SYMBOL vmlinux 0x3c073072	module_put
+EXPORT_SYMBOL vmlinux 0x3c258224	tcp_gro_complete
+EXPORT_SYMBOL vmlinux 0x3c2c5af5	sprintf
+EXPORT_SYMBOL vmlinux 0x3c2ec6e9	__set_page_dirty_nobuffers
+EXPORT_SYMBOL vmlinux 0x3c7227bf	complete_all
+EXPORT_SYMBOL vmlinux 0x3c760a50	key_negate_and_link
+EXPORT_SYMBOL vmlinux 0x3c7cecd1	neigh_seq_stop
+EXPORT_SYMBOL vmlinux 0x3c9d1211	string_get_size
+EXPORT_SYMBOL vmlinux 0x3cb3931b	sg_copy_to_buffer
+EXPORT_SYMBOL vmlinux 0x3cc0a3bb	xfrm_spd_getinfo
+EXPORT_SYMBOL vmlinux 0x3cd9c6cf	grab_cache_page_write_begin
+EXPORT_SYMBOL vmlinux 0x3cdd2015	sk_alloc
+EXPORT_SYMBOL vmlinux 0x3ce4ca6f	disable_irq
+EXPORT_SYMBOL vmlinux 0x3d118dc0	stop_tty
+EXPORT_SYMBOL vmlinux 0x3d180f9d	__dev_remove_pack
+EXPORT_SYMBOL vmlinux 0x3d68bd4b	flow_cache_genid
+EXPORT_SYMBOL vmlinux 0x3d764572	tty_pair_get_tty
+EXPORT_SYMBOL vmlinux 0x3d7c1ed7	msrs_alloc
+EXPORT_SYMBOL vmlinux 0x3d9995af	devm_free_irq
+EXPORT_SYMBOL vmlinux 0x3da171f9	pci_mem_start
+EXPORT_SYMBOL vmlinux 0x3da5eb6d	kfifo_alloc
+EXPORT_SYMBOL vmlinux 0x3daa69da	vfs_lstat
+EXPORT_SYMBOL vmlinux 0x3e025d24	scsi_cmd_ioctl
+EXPORT_SYMBOL vmlinux 0x3e1f073d	wait_for_completion_timeout
+EXPORT_SYMBOL vmlinux 0x3e219de6	try_wait_for_completion
+EXPORT_SYMBOL vmlinux 0x3e2ae3a8	acpi_release_global_lock
+EXPORT_SYMBOL vmlinux 0x3e3207bc	alloc_buffer_head
+EXPORT_SYMBOL vmlinux 0x3e383385	nf_hooks
+EXPORT_SYMBOL vmlinux 0x3e45e9ff	register_inetaddr_notifier
+EXPORT_SYMBOL vmlinux 0x3e899c9d	blk_limits_io_min
+EXPORT_SYMBOL vmlinux 0x3ec1d14e	tcf_hash_destroy
+EXPORT_SYMBOL vmlinux 0x3ed63055	zlib_inflateReset
+EXPORT_SYMBOL vmlinux 0x3ed96eb9	file_update_time
+EXPORT_SYMBOL vmlinux 0x3ef78d80	vm_get_page_prot
+EXPORT_SYMBOL vmlinux 0x3f017707	fb_get_mode
+EXPORT_SYMBOL vmlinux 0x3f0546a8	ioread32_rep
+EXPORT_SYMBOL vmlinux 0x3f1899f1	up
+EXPORT_SYMBOL vmlinux 0x3f324b19	scsi_get_host_dev
+EXPORT_SYMBOL vmlinux 0x3f4547a7	put_unused_fd
+EXPORT_SYMBOL vmlinux 0x3f47661b	kill_anon_super
+EXPORT_SYMBOL vmlinux 0x3f5b934d	tcf_hash_check
+EXPORT_SYMBOL vmlinux 0x3f6d063e	inet6_ioctl
+EXPORT_SYMBOL vmlinux 0x3f758644	fasync_helper
+EXPORT_SYMBOL vmlinux 0x3f7940cf	scsi_adjust_queue_depth
+EXPORT_SYMBOL vmlinux 0x3faee6d6	ip6_frag_init
+EXPORT_SYMBOL vmlinux 0x3fb30d38	journal_errno
+EXPORT_SYMBOL vmlinux 0x3fb6ec83	open_exec
+EXPORT_SYMBOL vmlinux 0x3fd5e961	__napi_complete
+EXPORT_SYMBOL vmlinux 0x3fe6243a	nonseekable_open
+EXPORT_SYMBOL vmlinux 0x3fec048f	sg_next
+EXPORT_SYMBOL vmlinux 0x3ff62317	local_bh_disable
+EXPORT_SYMBOL vmlinux 0x4001efaf	neigh_table_init_no_netlink
+EXPORT_SYMBOL vmlinux 0x4017a6b5	lock_sock_nested
+EXPORT_SYMBOL vmlinux 0x40186f60	bio_sector_offset
+EXPORT_SYMBOL vmlinux 0x4022ed85	free_buffer_head
+EXPORT_SYMBOL vmlinux 0x402502e4	bdi_register_dev
+EXPORT_SYMBOL vmlinux 0x403c4733	ppp_unregister_channel
+EXPORT_SYMBOL vmlinux 0x4044af13	wait_for_key_construction
+EXPORT_SYMBOL vmlinux 0x404d773c	thermal_zone_device_update
+EXPORT_SYMBOL vmlinux 0x4059792f	print_hex_dump
+EXPORT_SYMBOL vmlinux 0x405c1144	get_seconds
+EXPORT_SYMBOL vmlinux 0x40880723	generic_file_splice_read
+EXPORT_SYMBOL vmlinux 0x4097fa45	acpi_read_bit_register
+EXPORT_SYMBOL vmlinux 0x409873e3	tty_termios_baud_rate
+EXPORT_SYMBOL vmlinux 0x40a27c37	scsi_dev_info_remove_list
+EXPORT_SYMBOL vmlinux 0x40bf13ee	md_integrity_register
+EXPORT_SYMBOL vmlinux 0x40c89d46	acpi_get_table_by_index
+EXPORT_SYMBOL vmlinux 0x4101bbde	param_set_copystring
+EXPORT_SYMBOL vmlinux 0x4106c5b4	pci_remove_behind_bridge
+EXPORT_SYMBOL vmlinux 0x4108e69a	fb_match_mode
+EXPORT_SYMBOL vmlinux 0x41166725	inet_frags_init_net
+EXPORT_SYMBOL vmlinux 0x412fdc76	bio_copy_kern
+EXPORT_SYMBOL vmlinux 0x41344088	param_get_charp
+EXPORT_SYMBOL vmlinux 0x41482d8b	strndup_user
+EXPORT_SYMBOL vmlinux 0x4159ff9c	key_task_permission
+EXPORT_SYMBOL vmlinux 0x415ea29e	proc_symlink
+EXPORT_SYMBOL vmlinux 0x416983d9	netdev_fix_features
+EXPORT_SYMBOL vmlinux 0x4185cf4b	radix_tree_lookup_slot
+EXPORT_SYMBOL vmlinux 0x4188d439	neigh_rand_reach_time
+EXPORT_SYMBOL vmlinux 0x41a12c85	dev_close
+EXPORT_SYMBOL vmlinux 0x41a9c68d	_spin_trylock_bh
+EXPORT_SYMBOL vmlinux 0x41b9cd49	udp_sendmsg
+EXPORT_SYMBOL vmlinux 0x41bede52	block_write_full_page
+EXPORT_SYMBOL vmlinux 0x41db88bc	tty_port_free_xmit_buf
+EXPORT_SYMBOL vmlinux 0x41e6ff86	wait_on_page_bit
+EXPORT_SYMBOL vmlinux 0x41f0ddf6	pskb_copy
+EXPORT_SYMBOL vmlinux 0x4211c3c1	zlib_inflateInit2
+EXPORT_SYMBOL vmlinux 0x42139ef1	seq_printf
+EXPORT_SYMBOL vmlinux 0x421687ec	call_usermodehelper_pipe
+EXPORT_SYMBOL vmlinux 0x421a0ce8	napi_gro_flush
+EXPORT_SYMBOL vmlinux 0x42224298	sscanf
+EXPORT_SYMBOL vmlinux 0x42369da0	single_open
+EXPORT_SYMBOL vmlinux 0x4242e399	get_user_pages
+EXPORT_SYMBOL vmlinux 0x424567b7	scsi_eh_prep_cmnd
+EXPORT_SYMBOL vmlinux 0x424af6af	tcp_mtup_init
+EXPORT_SYMBOL vmlinux 0x42595e58	vgacon_text_force
+EXPORT_SYMBOL vmlinux 0x425a1cee	register_netdev
+EXPORT_SYMBOL vmlinux 0x4292364c	schedule
+EXPORT_SYMBOL vmlinux 0x4292af54	pci_find_bus
+EXPORT_SYMBOL vmlinux 0x42b70bf9	blk_queue_softirq_done
+EXPORT_SYMBOL vmlinux 0x42c8de35	ioremap_nocache
+EXPORT_SYMBOL vmlinux 0x42fa219a	tcf_action_exec
+EXPORT_SYMBOL vmlinux 0x4302d0eb	free_pages
+EXPORT_SYMBOL vmlinux 0x4333eadb	param_set_short
+EXPORT_SYMBOL vmlinux 0x43385ad9	acpi_pci_unregister_driver
+EXPORT_SYMBOL vmlinux 0x434fa55c	release_console_sem
+EXPORT_SYMBOL vmlinux 0x436c2179	iowrite32
+EXPORT_SYMBOL vmlinux 0x4379d034	bio_integrity_alloc_bioset
+EXPORT_SYMBOL vmlinux 0x4385be3b	gnet_stats_copy_queue
+EXPORT_SYMBOL vmlinux 0x438f1819	bd_release
+EXPORT_SYMBOL vmlinux 0x43a6b9f6	create_proc_entry
+EXPORT_SYMBOL vmlinux 0x43aaddee	register_cdrom
+EXPORT_SYMBOL vmlinux 0x43ab66c3	param_array_get
+EXPORT_SYMBOL vmlinux 0x43b17a3d	scsi_host_get
+EXPORT_SYMBOL vmlinux 0x43d927e5	i2c_get_adapter
+EXPORT_SYMBOL vmlinux 0x43da0707	__sk_mem_reclaim
+EXPORT_SYMBOL vmlinux 0x43f0a035	pci_set_dma_max_seg_size
+EXPORT_SYMBOL vmlinux 0x44161c19	unregister_shrinker
+EXPORT_SYMBOL vmlinux 0x4416bff2	__lock_buffer
+EXPORT_SYMBOL vmlinux 0x44203560	sync_inode
+EXPORT_SYMBOL vmlinux 0x44314efb	radix_tree_gang_lookup_tag_slot
+EXPORT_SYMBOL vmlinux 0x444779c4	nla_find
+EXPORT_SYMBOL vmlinux 0x444d3e63	i2c_smbus_write_block_data
+EXPORT_SYMBOL vmlinux 0x449339f3	rfkill_resume_polling
+EXPORT_SYMBOL vmlinux 0x44aaf30f	tsc_khz
+EXPORT_SYMBOL vmlinux 0x44b6eaa0	phy_print_status
+EXPORT_SYMBOL vmlinux 0x44b911c3	rb_replace_node
+EXPORT_SYMBOL vmlinux 0x44ddc10b	sync_blockdev
+EXPORT_SYMBOL vmlinux 0x44e9a829	match_token
+EXPORT_SYMBOL vmlinux 0x44f18087	seq_release_private
+EXPORT_SYMBOL vmlinux 0x44f21bea	idr_for_each
+EXPORT_SYMBOL vmlinux 0x450d0b92	set_device_ro
+EXPORT_SYMBOL vmlinux 0x450e1b99	file_permission
+EXPORT_SYMBOL vmlinux 0x451428bd	dev_getfirstbyhwtype
+EXPORT_SYMBOL vmlinux 0x453c8403	pci_msi_enabled
+EXPORT_SYMBOL vmlinux 0x45450063	mod_timer
+EXPORT_SYMBOL vmlinux 0x4550ba8a	register_cpu_notifier
+EXPORT_SYMBOL vmlinux 0x4575315d	utf8s_to_utf16s
+EXPORT_SYMBOL vmlinux 0x45947727	param_array_set
+EXPORT_SYMBOL vmlinux 0x45ba6d0d	md_write_end
+EXPORT_SYMBOL vmlinux 0x45d11c43	down_interruptible
+EXPORT_SYMBOL vmlinux 0x45d55543	down_write
+EXPORT_SYMBOL vmlinux 0x45d7ba0b	dev_addr_del
+EXPORT_SYMBOL vmlinux 0x45db55aa	test_set_page_writeback
+EXPORT_SYMBOL vmlinux 0x45f875f4	tcf_generic_walker
+EXPORT_SYMBOL vmlinux 0x46008ef9	otg_put_transceiver
+EXPORT_SYMBOL vmlinux 0x46085e4f	add_timer
+EXPORT_SYMBOL vmlinux 0x462a2e75	match_strlcpy
+EXPORT_SYMBOL vmlinux 0x462d4e47	i2c_put_adapter
+EXPORT_SYMBOL vmlinux 0x466c14a7	__delay
+EXPORT_SYMBOL vmlinux 0x46708975	blk_queue_update_dma_alignment
+EXPORT_SYMBOL vmlinux 0x468f5b30	skb_queue_tail
+EXPORT_SYMBOL vmlinux 0x469ffb5b	iget_failed
+EXPORT_SYMBOL vmlinux 0x46b74f80	vfs_rename
+EXPORT_SYMBOL vmlinux 0x46bae416	tty_port_tty_set
+EXPORT_SYMBOL vmlinux 0x470ac8f7	pci_map_rom
+EXPORT_SYMBOL vmlinux 0x472d2a9a	radix_tree_lookup
+EXPORT_SYMBOL vmlinux 0x473ea676	alloc_tty_driver
+EXPORT_SYMBOL vmlinux 0x473ef878	neigh_sysctl_unregister
+EXPORT_SYMBOL vmlinux 0x474acc00	sock_no_recvmsg
+EXPORT_SYMBOL vmlinux 0x475100c2	inet_get_local_port_range
+EXPORT_SYMBOL vmlinux 0x475f010b	acpi_purge_cached_objects
+EXPORT_SYMBOL vmlinux 0x476ce545	d_validate
+EXPORT_SYMBOL vmlinux 0x478d10b2	ht_destroy_irq
+EXPORT_SYMBOL vmlinux 0x479c3c86	find_next_zero_bit
+EXPORT_SYMBOL vmlinux 0x479dedd3	acpi_is_video_device
+EXPORT_SYMBOL vmlinux 0x47b506ee	uart_add_one_port
+EXPORT_SYMBOL vmlinux 0x47e0ed82	seq_release
+EXPORT_SYMBOL vmlinux 0x47f45615	ip_route_me_harder
+EXPORT_SYMBOL vmlinux 0x47fc6aec	tty_port_raise_dtr_rts
+EXPORT_SYMBOL vmlinux 0x4809df97	rt6_lookup
+EXPORT_SYMBOL vmlinux 0x48193639	acpi_lid_open
+EXPORT_SYMBOL vmlinux 0x481cb9ab	acpi_enter_sleep_state_prep
+EXPORT_SYMBOL vmlinux 0x481f0603	xfrm6_find_1stfragopt
+EXPORT_SYMBOL vmlinux 0x482473fc	filp_open
+EXPORT_SYMBOL vmlinux 0x48399775	md_done_sync
+EXPORT_SYMBOL vmlinux 0x4845d8c6	thaw_process
+EXPORT_SYMBOL vmlinux 0x4859b8bb	rtc_year_days
+EXPORT_SYMBOL vmlinux 0x485bf632	tty_vhangup
+EXPORT_SYMBOL vmlinux 0x486b6407	hweight64
+EXPORT_SYMBOL vmlinux 0x48781ddc	slow_work_enqueue
+EXPORT_SYMBOL vmlinux 0x48cd5000	deactivate_locked_super
+EXPORT_SYMBOL vmlinux 0x48d9e09e	kobject_init
+EXPORT_SYMBOL vmlinux 0x48def743	xfrm_state_alloc
+EXPORT_SYMBOL vmlinux 0x48fa0689	mdiobus_alloc
+EXPORT_SYMBOL vmlinux 0x4903f4ba	pci_dev_get
+EXPORT_SYMBOL vmlinux 0x491eb987	udp_ioctl
+EXPORT_SYMBOL vmlinux 0x492002da	inet6_unregister_protosw
+EXPORT_SYMBOL vmlinux 0x49245f87	journal_extend
+EXPORT_SYMBOL vmlinux 0x49260139	scsi_setup_fs_cmnd
+EXPORT_SYMBOL vmlinux 0x4940c5bb	ethtool_op_set_tso
+EXPORT_SYMBOL vmlinux 0x49439411	genl_unregister_family
+EXPORT_SYMBOL vmlinux 0x4947db81	scsi_finish_command
+EXPORT_SYMBOL vmlinux 0x494ffde5	vmtruncate
+EXPORT_SYMBOL vmlinux 0x49603fb8	security_sb_copy_data
+EXPORT_SYMBOL vmlinux 0x49772ac2	rfkill_init_sw_state
+EXPORT_SYMBOL vmlinux 0x4978ba5e	dm_kcopyd_copy
+EXPORT_SYMBOL vmlinux 0x497f311d	aio_put_req
+EXPORT_SYMBOL vmlinux 0x49b548dc	pci_find_parent_resource
+EXPORT_SYMBOL vmlinux 0x49c6b033	mb_cache_entry_insert
+EXPORT_SYMBOL vmlinux 0x49c9d49b	slow_work_sleep_till_thread_needed
+EXPORT_SYMBOL vmlinux 0x49da9a9a	_read_unlock_bh
+EXPORT_SYMBOL vmlinux 0x49e182c0	param_get_string
+EXPORT_SYMBOL vmlinux 0x49fd6da4	vlan_gro_frags
+EXPORT_SYMBOL vmlinux 0x4a358252	__bitmap_subset
+EXPORT_SYMBOL vmlinux 0x4a60fb73	consume_skb
+EXPORT_SYMBOL vmlinux 0x4a668d6e	netdev_features_change
+EXPORT_SYMBOL vmlinux 0x4a71c3e2	rtnl_unicast
+EXPORT_SYMBOL vmlinux 0x4a971ec7	radix_tree_delete
+EXPORT_SYMBOL vmlinux 0x4ac004a9	iov_iter_copy_from_user
+EXPORT_SYMBOL vmlinux 0x4acd93d3	release_resource
+EXPORT_SYMBOL vmlinux 0x4aec60d6	tty_register_device
+EXPORT_SYMBOL vmlinux 0x4afe9a77	scsi_partsize
+EXPORT_SYMBOL vmlinux 0x4b07e779	_spin_unlock_irqrestore
+EXPORT_SYMBOL vmlinux 0x4b2fac03	lookup_hash
+EXPORT_SYMBOL vmlinux 0x4b34fbf5	block_all_signals
+EXPORT_SYMBOL vmlinux 0x4b359cb7	gnet_stats_start_copy_compat
+EXPORT_SYMBOL vmlinux 0x4b4d6196	llc_add_pack
+EXPORT_SYMBOL vmlinux 0x4b8d21ee	tcf_hash_lookup
+EXPORT_SYMBOL vmlinux 0x4b9145a5	__starget_for_each_device
+EXPORT_SYMBOL vmlinux 0x4b984a4b	generic_cont_expand_simple
+EXPORT_SYMBOL vmlinux 0x4baccf62	iw_handler_set_spy
+EXPORT_SYMBOL vmlinux 0x4bb4f9ef	__kfree_skb
+EXPORT_SYMBOL vmlinux 0x4bbc3e5f	pm_flags
+EXPORT_SYMBOL vmlinux 0x4bcccbc3	vga_tryget
+EXPORT_SYMBOL vmlinux 0x4bed707f	vm_insert_page
+EXPORT_SYMBOL vmlinux 0x4bfee15a	atomic64_set
+EXPORT_SYMBOL vmlinux 0x4c1182cb	bitmap_scnprintf
+EXPORT_SYMBOL vmlinux 0x4c1b965c	gen_replace_estimator
+EXPORT_SYMBOL vmlinux 0x4c310cf0	vmap
+EXPORT_SYMBOL vmlinux 0x4ca60229	sb_min_blocksize
+EXPORT_SYMBOL vmlinux 0x4cbbd171	__bitmap_weight
+EXPORT_SYMBOL vmlinux 0x4cd03923	uart_get_baud_rate
+EXPORT_SYMBOL vmlinux 0x4d094db4	get_unmapped_area_prot
+EXPORT_SYMBOL vmlinux 0x4d153e84	security_path_mknod
+EXPORT_SYMBOL vmlinux 0x4d17f24b	force_sig
+EXPORT_SYMBOL vmlinux 0x4d1c8b53	journal_init_inode
+EXPORT_SYMBOL vmlinux 0x4d29cac2	free_task
+EXPORT_SYMBOL vmlinux 0x4d3c153f	sigprocmask
+EXPORT_SYMBOL vmlinux 0x4d5ba777	inet_csk_destroy_sock
+EXPORT_SYMBOL vmlinux 0x4d63e5f9	blkdev_get
+EXPORT_SYMBOL vmlinux 0x4d80d993	blk_run_queue
+EXPORT_SYMBOL vmlinux 0x4dadbc53	__skb_checksum_complete
+EXPORT_SYMBOL vmlinux 0x4dae2e0a	blk_queue_init_tags
+EXPORT_SYMBOL vmlinux 0x4dc45be9	nf_log_unbind_pf
+EXPORT_SYMBOL vmlinux 0x4dcfb8f9	__blk_end_request_cur
+EXPORT_SYMBOL vmlinux 0x4dd81a61	udp_disconnect
+EXPORT_SYMBOL vmlinux 0x4df119fa	__bitmap_parse
+EXPORT_SYMBOL vmlinux 0x4df3e3ea	pipe_lock
+EXPORT_SYMBOL vmlinux 0x4e069249	security_tun_dev_post_create
+EXPORT_SYMBOL vmlinux 0x4e355bba	mnt_unpin
+EXPORT_SYMBOL vmlinux 0x4e3567f7	match_int
+EXPORT_SYMBOL vmlinux 0x4e3bb2e2	generic_delete_inode
+EXPORT_SYMBOL vmlinux 0x4e52d852	blk_queue_dma_alignment
+EXPORT_SYMBOL vmlinux 0x4e5a6998	ipv4_specific
+EXPORT_SYMBOL vmlinux 0x4e6e8ea7	fg_console
+EXPORT_SYMBOL vmlinux 0x4e7d8242	acpi_bus_register_driver
+EXPORT_SYMBOL vmlinux 0x4e81d3ed	thermal_zone_unbind_cooling_device
+EXPORT_SYMBOL vmlinux 0x4e830a3e	strnicmp
+EXPORT_SYMBOL vmlinux 0x4e90f967	seq_escape
+EXPORT_SYMBOL vmlinux 0x4e92c16e	xfrm_init_state
+EXPORT_SYMBOL vmlinux 0x4ea54a1c	blk_rq_map_user
+EXPORT_SYMBOL vmlinux 0x4eb5b350	uart_update_timeout
+EXPORT_SYMBOL vmlinux 0x4ebd0cdb	dquot_alloc
+EXPORT_SYMBOL vmlinux 0x4ec950f8	__blk_end_request
+EXPORT_SYMBOL vmlinux 0x4edefb61	scsi_execute_req
+EXPORT_SYMBOL vmlinux 0x4ee29f7a	call_usermodehelper_stdinpipe
+EXPORT_SYMBOL vmlinux 0x4ee76065	cpufreq_get_policy
+EXPORT_SYMBOL vmlinux 0x4ef23bc8	uart_resume_port
+EXPORT_SYMBOL vmlinux 0x4ef2833a	bio_integrity_enabled
+EXPORT_SYMBOL vmlinux 0x4f02dcc0	simple_release_fs
+EXPORT_SYMBOL vmlinux 0x4f102d27	request_firmware_nowait
+EXPORT_SYMBOL vmlinux 0x4f1cd128	security_tun_dev_create
+EXPORT_SYMBOL vmlinux 0x4f3eba86	vlan_dev_vlan_id
+EXPORT_SYMBOL vmlinux 0x4f476e96	init_cdrom_command
+EXPORT_SYMBOL vmlinux 0x4f5438c1	idle_halt
+EXPORT_SYMBOL vmlinux 0x4f5e95b0	vfs_quota_on
+EXPORT_SYMBOL vmlinux 0x4f783f30	acpi_read
+EXPORT_SYMBOL vmlinux 0x4fa3f234	page_readlink
+EXPORT_SYMBOL vmlinux 0x4fcdb476	do_munmap
+EXPORT_SYMBOL vmlinux 0x4fcfecc6	udp_poll
+EXPORT_SYMBOL vmlinux 0x4fdee897	i8042_command
+EXPORT_SYMBOL vmlinux 0x501427e8	blk_queue_io_min
+EXPORT_SYMBOL vmlinux 0x50211ee3	tcp_free_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x5026f029	generic_unplug_device
+EXPORT_SYMBOL vmlinux 0x5059afd2	blk_register_region
+EXPORT_SYMBOL vmlinux 0x5066bb66	skb_unlink
+EXPORT_SYMBOL vmlinux 0x506746b6	getrawmonotonic
+EXPORT_SYMBOL vmlinux 0x50768931	sk_dst_check
+EXPORT_SYMBOL vmlinux 0x50bdd470	boot_cpu_data
+EXPORT_SYMBOL vmlinux 0x510f4a40	serio_rescan
+EXPORT_SYMBOL vmlinux 0x5118c382	secure_dccp_sequence_number
+EXPORT_SYMBOL vmlinux 0x511a7389	pci_enable_msi_block
+EXPORT_SYMBOL vmlinux 0x5140832b	set_groups
+EXPORT_SYMBOL vmlinux 0x5152e605	memcmp
+EXPORT_SYMBOL vmlinux 0x51593bcd	tty_free_termios
+EXPORT_SYMBOL vmlinux 0x517ec755	dcache_dir_close
+EXPORT_SYMBOL vmlinux 0x51812be3	pnp_unregister_card_driver
+EXPORT_SYMBOL vmlinux 0x5186518f	profile_pc
+EXPORT_SYMBOL vmlinux 0x51866532	bio_endio
+EXPORT_SYMBOL vmlinux 0x5187ac4b	xen_store_evtchn
+EXPORT_SYMBOL vmlinux 0x51b1c477	generic_block_bmap
+EXPORT_SYMBOL vmlinux 0x51d12d4e	acpi_pci_disabled
+EXPORT_SYMBOL vmlinux 0x51d58c73	kill_fasync
+EXPORT_SYMBOL vmlinux 0x51dce73b	xfrm_state_walk_init
+EXPORT_SYMBOL vmlinux 0x51ef33b8	kstrndup
+EXPORT_SYMBOL vmlinux 0x52026cdf	security_sb_parse_opts_str
+EXPORT_SYMBOL vmlinux 0x52071287	input_register_handler
+EXPORT_SYMBOL vmlinux 0x5207ae31	proto_unregister
+EXPORT_SYMBOL vmlinux 0x52095e19	acpi_get_data
+EXPORT_SYMBOL vmlinux 0x52245501	neigh_connected_output
+EXPORT_SYMBOL vmlinux 0x5233402b	copy_strings_kernel
+EXPORT_SYMBOL vmlinux 0x527044e4	submit_bh
+EXPORT_SYMBOL vmlinux 0x52760ca9	getnstimeofday
+EXPORT_SYMBOL vmlinux 0x527c23e4	names_cachep
+EXPORT_SYMBOL vmlinux 0x528c709d	simple_read_from_buffer
+EXPORT_SYMBOL vmlinux 0x528d348d	generic_writepages
+EXPORT_SYMBOL vmlinux 0x529f7dba	qdisc_list_del
+EXPORT_SYMBOL vmlinux 0x52a58c24	ifla_policy
+EXPORT_SYMBOL vmlinux 0x52af6c0c	scsi_get_command
+EXPORT_SYMBOL vmlinux 0x52affa63	vfs_quota_enable
+EXPORT_SYMBOL vmlinux 0x52d7b2fd	llc_sap_list
+EXPORT_SYMBOL vmlinux 0x52ebb126	param_get_ushort
+EXPORT_SYMBOL vmlinux 0x530b1e4c	rdmsr_on_cpus
+EXPORT_SYMBOL vmlinux 0x530b1e98	pm_suspend
+EXPORT_SYMBOL vmlinux 0x531b604e	__virt_addr_valid
+EXPORT_SYMBOL vmlinux 0x53326531	mempool_alloc_pages
+EXPORT_SYMBOL vmlinux 0x533c8c53	prepare_creds
+EXPORT_SYMBOL vmlinux 0x5343bc42	udp_lib_get_port
+EXPORT_SYMBOL vmlinux 0x5348f621	scsi_register_driver
+EXPORT_SYMBOL vmlinux 0x534d011d	xfrm_policy_register_afinfo
+EXPORT_SYMBOL vmlinux 0x535f52e9	dquot_release
+EXPORT_SYMBOL vmlinux 0x5377a0c5	kmem_cache_free
+EXPORT_SYMBOL vmlinux 0x5379e511	elv_queue_empty
+EXPORT_SYMBOL vmlinux 0x53818c79	journal_try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0x538383c0	unregister_inet6addr_notifier
+EXPORT_SYMBOL vmlinux 0x53883165	console_start
+EXPORT_SYMBOL vmlinux 0x538fdb7a	dev_addr_add
+EXPORT_SYMBOL vmlinux 0x539856e1	load_nls
+EXPORT_SYMBOL vmlinux 0x53b2e76d	journal_blocks_per_page
+EXPORT_SYMBOL vmlinux 0x53bc83bb	generic_file_buffered_write
+EXPORT_SYMBOL vmlinux 0x53c0767c	sk_chk_filter
+EXPORT_SYMBOL vmlinux 0x53db279b	sk_stream_wait_close
+EXPORT_SYMBOL vmlinux 0x53fb8ddc	phy_ethtool_gset
+EXPORT_SYMBOL vmlinux 0x541dfef4	atomic64_inc
+EXPORT_SYMBOL vmlinux 0x54290dc9	nla_validate
+EXPORT_SYMBOL vmlinux 0x542c25f2	fsync_bdev
+EXPORT_SYMBOL vmlinux 0x543b2fc1	register_key_type
+EXPORT_SYMBOL vmlinux 0x544b3e87	isapnp_protocol
+EXPORT_SYMBOL vmlinux 0x54542f67	mca_device_set_name
+EXPORT_SYMBOL vmlinux 0x545a9c13	fd_install
+EXPORT_SYMBOL vmlinux 0x54935666	acpi_os_read_port
+EXPORT_SYMBOL vmlinux 0x54a6d074	atomic64_dec
+EXPORT_SYMBOL vmlinux 0x54e6fcdd	net_enable_timestamp
+EXPORT_SYMBOL vmlinux 0x54fe56ce	serial8250_register_port
+EXPORT_SYMBOL vmlinux 0x5507d31b	ndisc_mc_map
+EXPORT_SYMBOL vmlinux 0x550ebe34	generic_file_open
+EXPORT_SYMBOL vmlinux 0x552f6336	pcix_get_max_mmrbc
+EXPORT_SYMBOL vmlinux 0x5530f862	fb_validate_mode
+EXPORT_SYMBOL vmlinux 0x55619ade	bdevname
+EXPORT_SYMBOL vmlinux 0x55733126	i2c_smbus_read_i2c_block_data
+EXPORT_SYMBOL vmlinux 0x557603cb	rfkill_destroy
+EXPORT_SYMBOL vmlinux 0x557753eb	dm_io_client_resize
+EXPORT_SYMBOL vmlinux 0x559411d3	sync_dirty_buffer
+EXPORT_SYMBOL vmlinux 0x5594be03	bitmap_remap
+EXPORT_SYMBOL vmlinux 0x55b3133e	dma_release_from_coherent
+EXPORT_SYMBOL vmlinux 0x55c9b644	simple_transaction_set
+EXPORT_SYMBOL vmlinux 0x55f09610	generic_file_mmap
+EXPORT_SYMBOL vmlinux 0x55f282a3	generic_splice_sendpage
+EXPORT_SYMBOL vmlinux 0x5600904f	fb_get_color_depth
+EXPORT_SYMBOL vmlinux 0x5603cf43	do_settimeofday
+EXPORT_SYMBOL vmlinux 0x5614b010	xfrm_policy_walk_done
+EXPORT_SYMBOL vmlinux 0x5628df7e	km_state_notify
+EXPORT_SYMBOL vmlinux 0x5635a60a	vmalloc_user
+EXPORT_SYMBOL vmlinux 0x56395360	skb_copy_datagram_from_iovec
+EXPORT_SYMBOL vmlinux 0x563a611e	xfrm_state_register_afinfo
+EXPORT_SYMBOL vmlinux 0x564e31a6	dquot_transfer
+EXPORT_SYMBOL vmlinux 0x56639e1f	kernel_listen
+EXPORT_SYMBOL vmlinux 0x566564ac	mca_device_set_claim
+EXPORT_SYMBOL vmlinux 0x5670ad6f	genphy_resume
+EXPORT_SYMBOL vmlinux 0x56718d38	ppp_unit_number
+EXPORT_SYMBOL vmlinux 0x569627cb	input_register_handle
+EXPORT_SYMBOL vmlinux 0x56ab2fe2	bio_integrity_tag_size
+EXPORT_SYMBOL vmlinux 0x56c8799d	scsi_kunmap_atomic_sg
+EXPORT_SYMBOL vmlinux 0x56df5a59	mmc_regulator_set_ocr
+EXPORT_SYMBOL vmlinux 0x56f494e0	smp_call_function
+EXPORT_SYMBOL vmlinux 0x56f57a03	sock_no_socketpair
+EXPORT_SYMBOL vmlinux 0x5705088a	__vmalloc
+EXPORT_SYMBOL vmlinux 0x572e85d4	blk_lookup_devt
+EXPORT_SYMBOL vmlinux 0x57372ff5	kernel_accept
+EXPORT_SYMBOL vmlinux 0x5740bc31	genl_unregister_ops
+EXPORT_SYMBOL vmlinux 0x5750f00e	cdrom_media_changed
+EXPORT_SYMBOL vmlinux 0x57575f08	dmaengine_put
+EXPORT_SYMBOL vmlinux 0x57810ce9	bdi_init
+EXPORT_SYMBOL vmlinux 0x579fbcd2	cpu_possible_mask
+EXPORT_SYMBOL vmlinux 0x57a6504e	vsnprintf
+EXPORT_SYMBOL vmlinux 0x57adf756	per_cpu__this_cpu_off
+EXPORT_SYMBOL vmlinux 0x57b57ebe	jiffies_to_timespec
+EXPORT_SYMBOL vmlinux 0x57d67662	dma_mark_declared_memory_occupied
+EXPORT_SYMBOL vmlinux 0x57db7242	mangle_path
+EXPORT_SYMBOL vmlinux 0x5808d194	acpi_bus_get_status
+EXPORT_SYMBOL vmlinux 0x58094048	generic_fillattr
+EXPORT_SYMBOL vmlinux 0x58111cf0	scsi_setup_blk_pc_cmnd
+EXPORT_SYMBOL vmlinux 0x5838f6c9	rtc_valid_tm
+EXPORT_SYMBOL vmlinux 0x583ff8cc	pci_match_id
+EXPORT_SYMBOL vmlinux 0x584738f9	rdmsr_safe_on_cpu
+EXPORT_SYMBOL vmlinux 0x5857b225	ioread16_rep
+EXPORT_SYMBOL vmlinux 0x5857e434	groups_free
+EXPORT_SYMBOL vmlinux 0x5859b1a7	seq_bitmap
+EXPORT_SYMBOL vmlinux 0x588a0cd7	blk_queue_prep_rq
+EXPORT_SYMBOL vmlinux 0x58b98294	deny_write_access
+EXPORT_SYMBOL vmlinux 0x58c1af5a	bio_split
+EXPORT_SYMBOL vmlinux 0x58cbcdda	pci_request_region
+EXPORT_SYMBOL vmlinux 0x58ebee6f	loop_register_transfer
+EXPORT_SYMBOL vmlinux 0x58fef6f8	ist_info
+EXPORT_SYMBOL vmlinux 0x590bbcbe	skb_seq_read
+EXPORT_SYMBOL vmlinux 0x5934392b	fb_register_client
+EXPORT_SYMBOL vmlinux 0x594b6ade	init_buffer
+EXPORT_SYMBOL vmlinux 0x594bf15b	ioport_map
+EXPORT_SYMBOL vmlinux 0x5957be6e	skb_realloc_headroom
+EXPORT_SYMBOL vmlinux 0x598dcf97	vfs_quota_off
+EXPORT_SYMBOL vmlinux 0x59bc8d72	sock_no_sendpage
+EXPORT_SYMBOL vmlinux 0x59bc9609	acpi_write_bit_register
+EXPORT_SYMBOL vmlinux 0x59bf515a	pagevec_lookup_tag
+EXPORT_SYMBOL vmlinux 0x59c66fc5	md_check_no_bitmap
+EXPORT_SYMBOL vmlinux 0x59d696b6	register_module_notifier
+EXPORT_SYMBOL vmlinux 0x59f58fc1	xfrm_policy_alloc
+EXPORT_SYMBOL vmlinux 0x5a1833c3	jbd2_journal_force_commit_nested
+EXPORT_SYMBOL vmlinux 0x5a4896a8	__put_user_2
+EXPORT_SYMBOL vmlinux 0x5a57d155	__percpu_counter_init
+EXPORT_SYMBOL vmlinux 0x5a606e16	scsi_get_device_flags_keyed
+EXPORT_SYMBOL vmlinux 0x5a744b86	netlink_set_nonroot
+EXPORT_SYMBOL vmlinux 0x5a7984b7	napi_gro_receive
+EXPORT_SYMBOL vmlinux 0x5a7c1da3	generic_setlease
+EXPORT_SYMBOL vmlinux 0x5a995532	pci_remove_bus
+EXPORT_SYMBOL vmlinux 0x5ac376a5	acpi_install_fixed_event_handler
+EXPORT_SYMBOL vmlinux 0x5ad55d70	fb_set_var
+EXPORT_SYMBOL vmlinux 0x5ae4b113	__scsi_put_command
+EXPORT_SYMBOL vmlinux 0x5af70678	cont_write_begin
+EXPORT_SYMBOL vmlinux 0x5b00aa44	ip6_route_output
+EXPORT_SYMBOL vmlinux 0x5b063fc4	xfrm_state_lookup
+EXPORT_SYMBOL vmlinux 0x5b1791c9	tcp_v4_do_rcv
+EXPORT_SYMBOL vmlinux 0x5b19634d	div_s64_rem
+EXPORT_SYMBOL vmlinux 0x5b314324	__serio_register_port
+EXPORT_SYMBOL vmlinux 0x5b3de63b	dev_set_mac_address
+EXPORT_SYMBOL vmlinux 0x5b51c6a7	acpi_walk_resources
+EXPORT_SYMBOL vmlinux 0x5b56a693	flush_old_exec
+EXPORT_SYMBOL vmlinux 0x5b7231a1	bio_map_user
+EXPORT_SYMBOL vmlinux 0x5bc9f13c	neigh_table_clear
+EXPORT_SYMBOL vmlinux 0x5bccdd1f	acpi_notifier_call_chain
+EXPORT_SYMBOL vmlinux 0x5bd88183	set_pages_array_wb
+EXPORT_SYMBOL vmlinux 0x5bec4e1c	scsi_remove_host
+EXPORT_SYMBOL vmlinux 0x5bfaf9ff	generic_getxattr
+EXPORT_SYMBOL vmlinux 0x5c0a2c8b	kill_block_super
+EXPORT_SYMBOL vmlinux 0x5c3b4b16	kmem_cache_name
+EXPORT_SYMBOL vmlinux 0x5c4570d2	input_set_keycode
+EXPORT_SYMBOL vmlinux 0x5c68705b	mca_read_pos
+EXPORT_SYMBOL vmlinux 0x5c8a71c3	audit_log_end
+EXPORT_SYMBOL vmlinux 0x5cbab0f0	security_path_link
+EXPORT_SYMBOL vmlinux 0x5cc01e3e	rtnl_notify
+EXPORT_SYMBOL vmlinux 0x5cc6e44a	jbd2_journal_get_write_access
+EXPORT_SYMBOL vmlinux 0x5cdcba9c	dm_exception_store_type_register
+EXPORT_SYMBOL vmlinux 0x5cf6efa7	set_pages_uc
+EXPORT_SYMBOL vmlinux 0x5cf9dd00	spi_dv_device
+EXPORT_SYMBOL vmlinux 0x5d12b3fc	twl4030_i2c_write_u8
+EXPORT_SYMBOL vmlinux 0x5d1bf294	dev_get_stats
+EXPORT_SYMBOL vmlinux 0x5d4d0967	scsi_free_host_dev
+EXPORT_SYMBOL vmlinux 0x5d4d6745	dev_mc_add
+EXPORT_SYMBOL vmlinux 0x5d6a4ad0	pci_fixup_device
+EXPORT_SYMBOL vmlinux 0x5d74dbcf	pnp_range_reserved
+EXPORT_SYMBOL vmlinux 0x5d75a282	xfrm_unregister_type
+EXPORT_SYMBOL vmlinux 0x5d955dd7	ethtool_op_set_sg
+EXPORT_SYMBOL vmlinux 0x5dc4bf72	hippi_change_mtu
+EXPORT_SYMBOL vmlinux 0x5dc9d224	tcf_em_tree_dump
+EXPORT_SYMBOL vmlinux 0x5e0bbfce	inet_csk_init_xmit_timers
+EXPORT_SYMBOL vmlinux 0x5e38d2b9	pci_iounmap
+EXPORT_SYMBOL vmlinux 0x5e49cf45	seq_lseek
+EXPORT_SYMBOL vmlinux 0x5e51f8a0	devm_request_threaded_irq
+EXPORT_SYMBOL vmlinux 0x5e679e02	blk_queue_segment_boundary
+EXPORT_SYMBOL vmlinux 0x5e95b1cd	current_umask
+EXPORT_SYMBOL vmlinux 0x5ea520c5	tcp_select_initial_window
+EXPORT_SYMBOL vmlinux 0x5ebc6d6c	abort_creds
+EXPORT_SYMBOL vmlinux 0x5ec5f5ae	vfs_dq_drop
+EXPORT_SYMBOL vmlinux 0x5ece1c92	find_get_page
+EXPORT_SYMBOL vmlinux 0x5ed040b0	pm_set_vt_switch
+EXPORT_SYMBOL vmlinux 0x5edc9fa0	pci_set_mwi
+EXPORT_SYMBOL vmlinux 0x5edd0762	bin2bcd
+EXPORT_SYMBOL vmlinux 0x5ee48513	posix_unblock_lock
+EXPORT_SYMBOL vmlinux 0x5f0d0c4f	pv_cpu_ops
+EXPORT_SYMBOL vmlinux 0x5f1bd579	mca_find_adapter
+EXPORT_SYMBOL vmlinux 0x5f56db66	per_cpu__ftrace_event_seq
+EXPORT_SYMBOL vmlinux 0x5f67b6cb	acpi_unlock_battery_dir
+EXPORT_SYMBOL vmlinux 0x5f6fc8cc	tty_port_carrier_raised
+EXPORT_SYMBOL vmlinux 0x5fc68cb6	cad_pid
+EXPORT_SYMBOL vmlinux 0x5fd843b6	register_sysctl_table
+EXPORT_SYMBOL vmlinux 0x5ff42b08	acpi_video_get_capabilities
+EXPORT_SYMBOL vmlinux 0x60028c07	tcp_prot
+EXPORT_SYMBOL vmlinux 0x600683d3	do_unblank_screen
+EXPORT_SYMBOL vmlinux 0x60096fb9	rfkill_pause_polling
+EXPORT_SYMBOL vmlinux 0x6009cf24	journal_get_undo_access
+EXPORT_SYMBOL vmlinux 0x601772c7	vfs_getattr
+EXPORT_SYMBOL vmlinux 0x602ed00d	acpi_current_gpe_count
+EXPORT_SYMBOL vmlinux 0x6038f9bc	follow_down
+EXPORT_SYMBOL vmlinux 0x603f6db9	skb_over_panic
+EXPORT_SYMBOL vmlinux 0x6043092c	atomic64_dec_and_test
+EXPORT_SYMBOL vmlinux 0x6077fbdd	phy_stop_interrupts
+EXPORT_SYMBOL vmlinux 0x6080a4cb	unregister_netdevice
+EXPORT_SYMBOL vmlinux 0x609f1c7e	synchronize_net
+EXPORT_SYMBOL vmlinux 0x60a0ebad	__tracepoint_kmem_cache_alloc_node
+EXPORT_SYMBOL vmlinux 0x60a32ea9	pm_power_off
+EXPORT_SYMBOL vmlinux 0x60a4e61a	unlock_super
+EXPORT_SYMBOL vmlinux 0x60f0bdf3	__scsi_iterate_devices
+EXPORT_SYMBOL vmlinux 0x60f5b5ae	pnp_find_dev
+EXPORT_SYMBOL vmlinux 0x610fcbfe	bitmap_unplug
+EXPORT_SYMBOL vmlinux 0x612390ad	netpoll_set_trap
+EXPORT_SYMBOL vmlinux 0x61373774	inet_getname
+EXPORT_SYMBOL vmlinux 0x6187f1f1	tcp_v4_md5_lookup
+EXPORT_SYMBOL vmlinux 0x618d8299	set_notify_swap_entry_free
+EXPORT_SYMBOL vmlinux 0x61b3bce9	d_move
+EXPORT_SYMBOL vmlinux 0x61b7b126	simple_strtoull
+EXPORT_SYMBOL vmlinux 0x61c78197	blk_queue_start_tag
+EXPORT_SYMBOL vmlinux 0x61d00906	generic_write_checks
+EXPORT_SYMBOL vmlinux 0x62049256	acpi_disable
+EXPORT_SYMBOL vmlinux 0x62113dba	jbd2_journal_extend
+EXPORT_SYMBOL vmlinux 0x6237f6b5	acpi_enable_event
+EXPORT_SYMBOL vmlinux 0x623b8f3c	nlmsg_notify
+EXPORT_SYMBOL vmlinux 0x6241a2ab	__copy_from_user_ll_nocache
+EXPORT_SYMBOL vmlinux 0x6241fd2c	acpi_install_address_space_handler
+EXPORT_SYMBOL vmlinux 0x625620ab	sk_filter
+EXPORT_SYMBOL vmlinux 0x62624f87	ps2_begin_command
+EXPORT_SYMBOL vmlinux 0x62737e1d	sock_unregister
+EXPORT_SYMBOL vmlinux 0x62827bec	security_secctx_to_secid
+EXPORT_SYMBOL vmlinux 0x62a585be	simple_link
+EXPORT_SYMBOL vmlinux 0x62a80f3c	inet_del_protocol
+EXPORT_SYMBOL vmlinux 0x62d22431	pci_bus_read_config_dword
+EXPORT_SYMBOL vmlinux 0x63019288	journal_start_commit
+EXPORT_SYMBOL vmlinux 0x6307fc98	del_timer
+EXPORT_SYMBOL vmlinux 0x63169b82	sock_no_accept
+EXPORT_SYMBOL vmlinux 0x633a87e8	scsi_unregister
+EXPORT_SYMBOL vmlinux 0x633b9b25	phy_device_create
+EXPORT_SYMBOL vmlinux 0x63419b3d	mpage_readpage
+EXPORT_SYMBOL vmlinux 0x636a5691	acpi_register_ioapic
+EXPORT_SYMBOL vmlinux 0x63c18a85	tty_port_close
+EXPORT_SYMBOL vmlinux 0x63ecad53	register_netdevice_notifier
+EXPORT_SYMBOL vmlinux 0x63efc536	radix_tree_prev_hole
+EXPORT_SYMBOL vmlinux 0x63f1ca7b	vfs_mknod
+EXPORT_SYMBOL vmlinux 0x63f665af	d_add_ci
+EXPORT_SYMBOL vmlinux 0x6403e338	tcp_memory_pressure
+EXPORT_SYMBOL vmlinux 0x640a7078	posix_acl_create_masq
+EXPORT_SYMBOL vmlinux 0x642e54ac	__wake_up
+EXPORT_SYMBOL vmlinux 0x644cf82b	jbd2_log_wait_commit
+EXPORT_SYMBOL vmlinux 0x64526a93	atomic64_sub_return
+EXPORT_SYMBOL vmlinux 0x6466a1e6	mempool_alloc
+EXPORT_SYMBOL vmlinux 0x6477ab83	kmem_cache_shrink
+EXPORT_SYMBOL vmlinux 0x6478134c	ec_burst_enable
+EXPORT_SYMBOL vmlinux 0x64999478	congestion_wait
+EXPORT_SYMBOL vmlinux 0x64ca3465	fb_class
+EXPORT_SYMBOL vmlinux 0x64cdde69	alloc_netdev_mq
+EXPORT_SYMBOL vmlinux 0x64eae7ad	set_memory_array_wb
+EXPORT_SYMBOL vmlinux 0x6501080f	skb_recycle_check
+EXPORT_SYMBOL vmlinux 0x6502791a	sock_no_listen
+EXPORT_SYMBOL vmlinux 0x650756a0	dma_async_tx_descriptor_init
+EXPORT_SYMBOL vmlinux 0x650fb346	add_wait_queue
+EXPORT_SYMBOL vmlinux 0x651a4139	test_taint
+EXPORT_SYMBOL vmlinux 0x65408378	zlib_inflate_blob
+EXPORT_SYMBOL vmlinux 0x65414e67	dev_valid_name
+EXPORT_SYMBOL vmlinux 0x6565d33f	scsi_kmap_atomic_sg
+EXPORT_SYMBOL vmlinux 0x6572b364	mmc_alloc_host
+EXPORT_SYMBOL vmlinux 0x659f780f	ip_defrag
+EXPORT_SYMBOL vmlinux 0x65a13965	elv_dispatch_sort
+EXPORT_SYMBOL vmlinux 0x65ad1d6d	igrab
+EXPORT_SYMBOL vmlinux 0x65af9e7a	nf_ip6_checksum
+EXPORT_SYMBOL vmlinux 0x65fcad90	kernel_sock_ioctl
+EXPORT_SYMBOL vmlinux 0x66507e73	aio_complete
+EXPORT_SYMBOL vmlinux 0x668da8d5	zlib_inflateIncomp
+EXPORT_SYMBOL vmlinux 0x66bd096c	arch_acpi_processor_init_pdc
+EXPORT_SYMBOL vmlinux 0x66be63be	pci_get_bus_and_slot
+EXPORT_SYMBOL vmlinux 0x66f98393	blk_get_request
+EXPORT_SYMBOL vmlinux 0x67053080	current_kernel_time
+EXPORT_SYMBOL vmlinux 0x670a5b51	proc_create_data
+EXPORT_SYMBOL vmlinux 0x6712b32b	register_netdevice
+EXPORT_SYMBOL vmlinux 0x671c9cdc	inet_stream_ops
+EXPORT_SYMBOL vmlinux 0x6729d3df	__get_user_4
+EXPORT_SYMBOL vmlinux 0x67428dcf	pci_get_class
+EXPORT_SYMBOL vmlinux 0x67804a19	__any_online_cpu
+EXPORT_SYMBOL vmlinux 0x678e678b	security_path_rename
+EXPORT_SYMBOL vmlinux 0x67b1cafc	filemap_fault
+EXPORT_SYMBOL vmlinux 0x67b27ec1	tty_std_termios
+EXPORT_SYMBOL vmlinux 0x67caa58c	jbd2_journal_get_create_access
+EXPORT_SYMBOL vmlinux 0x67ecc65e	napi_gro_frags
+EXPORT_SYMBOL vmlinux 0x67f264dd	skb_checksum
+EXPORT_SYMBOL vmlinux 0x6806a6c0	ppp_unregister_compressor
+EXPORT_SYMBOL vmlinux 0x68332af2	otg_set_transceiver
+EXPORT_SYMBOL vmlinux 0x68338d3b	scsi_init_io
+EXPORT_SYMBOL vmlinux 0x6848e5ad	in_dev_finish_destroy
+EXPORT_SYMBOL vmlinux 0x68612f57	qdisc_reset
+EXPORT_SYMBOL vmlinux 0x6873a8e7	destroy_EII_client
+EXPORT_SYMBOL vmlinux 0x68792d93	neigh_resolve_output
+EXPORT_SYMBOL vmlinux 0x68900dbb	set_pages_wb
+EXPORT_SYMBOL vmlinux 0x6896f648	blk_init_tags
+EXPORT_SYMBOL vmlinux 0x68a763a7	tcp_proc_unregister
+EXPORT_SYMBOL vmlinux 0x68af1e27	setup_new_exec
+EXPORT_SYMBOL vmlinux 0x68cbd85e	scsi_eh_restore_cmnd
+EXPORT_SYMBOL vmlinux 0x68e7f664	scsi_block_requests
+EXPORT_SYMBOL vmlinux 0x69111c5f	iw_handler_get_thrspy
+EXPORT_SYMBOL vmlinux 0x6915f2b7	dev_unicast_sync
+EXPORT_SYMBOL vmlinux 0x6953e87a	thermal_zone_device_register
+EXPORT_SYMBOL vmlinux 0x695f2fca	bdi_unregister
+EXPORT_SYMBOL vmlinux 0x6971447a	rtc_month_days
+EXPORT_SYMBOL vmlinux 0x6980fe91	param_get_int
+EXPORT_SYMBOL vmlinux 0x69927dff	try_acquire_console_sem
+EXPORT_SYMBOL vmlinux 0x69a0ca7d	iowrite16be
+EXPORT_SYMBOL vmlinux 0x69a15b22	scsi_add_device
+EXPORT_SYMBOL vmlinux 0x69a358a6	iomem_resource
+EXPORT_SYMBOL vmlinux 0x69a47007	md_write_start
+EXPORT_SYMBOL vmlinux 0x69a733d7	bdev_stack_limits
+EXPORT_SYMBOL vmlinux 0x69ad366b	dquot_release_reserved_space
+EXPORT_SYMBOL vmlinux 0x69c8c1d5	security_req_classify_flow
+EXPORT_SYMBOL vmlinux 0x69d2575f	efi
+EXPORT_SYMBOL vmlinux 0x69d38ed9	__scsi_print_sense
+EXPORT_SYMBOL vmlinux 0x69e20c5c	per_cpu__softnet_data
+EXPORT_SYMBOL vmlinux 0x69e27c7a	bitmap_copy_le
+EXPORT_SYMBOL vmlinux 0x69ea2bf1	__nla_reserve_nohdr
+EXPORT_SYMBOL vmlinux 0x6a037cf1	mempool_kfree
+EXPORT_SYMBOL vmlinux 0x6a27bfce	csum_partial_copy_generic
+EXPORT_SYMBOL vmlinux 0x6a3ee852	qdisc_watchdog_cancel
+EXPORT_SYMBOL vmlinux 0x6a4666ba	scsi_mode_sense
+EXPORT_SYMBOL vmlinux 0x6a47571d	__set_personality
+EXPORT_SYMBOL vmlinux 0x6a4885e9	nf_register_queue_handler
+EXPORT_SYMBOL vmlinux 0x6a76f3ac	blk_iopoll_enable
+EXPORT_SYMBOL vmlinux 0x6a8a6f2d	skb_checksum_help
+EXPORT_SYMBOL vmlinux 0x6a9f26c9	init_timer_key
+EXPORT_SYMBOL vmlinux 0x6ab3db94	jbd2_journal_check_available_features
+EXPORT_SYMBOL vmlinux 0x6ab9b8bb	dev_unicast_unsync
+EXPORT_SYMBOL vmlinux 0x6acb973d	iowrite32be
+EXPORT_SYMBOL vmlinux 0x6ad065f4	param_set_charp
+EXPORT_SYMBOL vmlinux 0x6ad5865b	rfkill_alloc
+EXPORT_SYMBOL vmlinux 0x6ad85887	acpi_enable_gpe
+EXPORT_SYMBOL vmlinux 0x6adc79c6	nf_register_hooks
+EXPORT_SYMBOL vmlinux 0x6add5c9a	dmi_find_device
+EXPORT_SYMBOL vmlinux 0x6af11b6e	eth_mac_addr
+EXPORT_SYMBOL vmlinux 0x6afa83e2	framebuffer_release
+EXPORT_SYMBOL vmlinux 0x6b1b67d3	__bdevname
+EXPORT_SYMBOL vmlinux 0x6b28395b	sysctl_jiffies
+EXPORT_SYMBOL vmlinux 0x6b2dc060	dump_stack
+EXPORT_SYMBOL vmlinux 0x6b5c77e2	journal_load
+EXPORT_SYMBOL vmlinux 0x6b937ffb	mca_mark_as_used
+EXPORT_SYMBOL vmlinux 0x6b9b88f3	sleep_on
+EXPORT_SYMBOL vmlinux 0x6bb45466	generic_file_splice_write
+EXPORT_SYMBOL vmlinux 0x6bb812e7	atomic64_add_return
+EXPORT_SYMBOL vmlinux 0x6bc3fbc0	__unregister_chrdev
+EXPORT_SYMBOL vmlinux 0x6bdcfd99	qdisc_class_hash_remove
+EXPORT_SYMBOL vmlinux 0x6bdf965f	dma_find_channel
+EXPORT_SYMBOL vmlinux 0x6bf30d6c	sock_common_recvmsg
+EXPORT_SYMBOL vmlinux 0x6c116d78	netif_device_detach
+EXPORT_SYMBOL vmlinux 0x6c1ce5ce	strcspn
+EXPORT_SYMBOL vmlinux 0x6c2e3320	strncmp
+EXPORT_SYMBOL vmlinux 0x6c389761	acpi_bus_get_private_data
+EXPORT_SYMBOL vmlinux 0x6c57d132	dmam_alloc_coherent
+EXPORT_SYMBOL vmlinux 0x6c61ce70	num_registered_fb
+EXPORT_SYMBOL vmlinux 0x6c702af7	sysctl_udp_rmem_min
+EXPORT_SYMBOL vmlinux 0x6c755690	sk_run_filter
+EXPORT_SYMBOL vmlinux 0x6c8625bc	jbd2_journal_revoke
+EXPORT_SYMBOL vmlinux 0x6c94113b	cancel_dirty_page
+EXPORT_SYMBOL vmlinux 0x6caba584	skb_append
+EXPORT_SYMBOL vmlinux 0x6cabb962	may_umount
+EXPORT_SYMBOL vmlinux 0x6cd66f45	elv_rq_merge_ok
+EXPORT_SYMBOL vmlinux 0x6cdc5c6b	nla_strlcpy
+EXPORT_SYMBOL vmlinux 0x6d18635b	sg_miter_stop
+EXPORT_SYMBOL vmlinux 0x6d19c43b	pcie_port_service_register
+EXPORT_SYMBOL vmlinux 0x6d27ef64	__bitmap_empty
+EXPORT_SYMBOL vmlinux 0x6d288375	radix_tree_next_hole
+EXPORT_SYMBOL vmlinux 0x6d294e43	clock_t_to_jiffies
+EXPORT_SYMBOL vmlinux 0x6d29e767	end_buffer_write_sync
+EXPORT_SYMBOL vmlinux 0x6d340f64	tty_termios_input_baud_rate
+EXPORT_SYMBOL vmlinux 0x6d6ad62d	phy_start_interrupts
+EXPORT_SYMBOL vmlinux 0x6d6cbadc	rb_last
+EXPORT_SYMBOL vmlinux 0x6d749b29	sock_wmalloc
+EXPORT_SYMBOL vmlinux 0x6d76d2e5	scsi_free_command
+EXPORT_SYMBOL vmlinux 0x6d87bb56	inode_init_once
+EXPORT_SYMBOL vmlinux 0x6d8c6c28	blk_insert_request
+EXPORT_SYMBOL vmlinux 0x6d9531f7	sock_no_ioctl
+EXPORT_SYMBOL vmlinux 0x6db7cbb2	blk_queue_physical_block_size
+EXPORT_SYMBOL vmlinux 0x6dc0c24b	complete_and_exit
+EXPORT_SYMBOL vmlinux 0x6dc5ee28	blk_queue_end_tag
+EXPORT_SYMBOL vmlinux 0x6dcb53ed	eisa_bus_type
+EXPORT_SYMBOL vmlinux 0x6def2db2	half_md4_transform
+EXPORT_SYMBOL vmlinux 0x6e07a54e	acpi_get_gpe_status
+EXPORT_SYMBOL vmlinux 0x6e390b04	eth_header_cache
+EXPORT_SYMBOL vmlinux 0x6e3dcc49	skb_clone
+EXPORT_SYMBOL vmlinux 0x6e3f6c3c	alloc_disk
+EXPORT_SYMBOL vmlinux 0x6e4c7775	tcp_init_xmit_timers
+EXPORT_SYMBOL vmlinux 0x6e720ff2	rtnl_unlock
+EXPORT_SYMBOL vmlinux 0x6e820ff7	blk_alloc_queue
+EXPORT_SYMBOL vmlinux 0x6e9dd606	__symbol_put
+EXPORT_SYMBOL vmlinux 0x6eb0fdf3	__cond_resched_lock
+EXPORT_SYMBOL vmlinux 0x6ed39097	eth_change_mtu
+EXPORT_SYMBOL vmlinux 0x6edfb3a0	inet_proto_csum_replace4
+EXPORT_SYMBOL vmlinux 0x6f3e6480	nf_unregister_sockopt
+EXPORT_SYMBOL vmlinux 0x6f556bdb	acpi_get_gpe_device
+EXPORT_SYMBOL vmlinux 0x6f5e67e7	dput
+EXPORT_SYMBOL vmlinux 0x6f7f6d69	iget5_locked
+EXPORT_SYMBOL vmlinux 0x6f963ced	inode_newsize_ok
+EXPORT_SYMBOL vmlinux 0x6fc5b091	kmem_cache_size
+EXPORT_SYMBOL vmlinux 0x6fcaec83	sock_no_setsockopt
+EXPORT_SYMBOL vmlinux 0x6fcb87a1	touch_softlockup_watchdog
+EXPORT_SYMBOL vmlinux 0x6fe50650	sk_common_release
+EXPORT_SYMBOL vmlinux 0x6feb2039	acpi_write
+EXPORT_SYMBOL vmlinux 0x6fff393f	time_to_tm
+EXPORT_SYMBOL vmlinux 0x701c8fac	xfrm_policy_flush
+EXPORT_SYMBOL vmlinux 0x701d0ebd	snprintf
+EXPORT_SYMBOL vmlinux 0x702c7cb6	mmc_host_lazy_disable
+EXPORT_SYMBOL vmlinux 0x70331a76	qdisc_tree_decrease_qlen
+EXPORT_SYMBOL vmlinux 0x7039ced5	journal_restart
+EXPORT_SYMBOL vmlinux 0x70523a7a	__cond_resched_softirq
+EXPORT_SYMBOL vmlinux 0x7054a3e4	request_dma
+EXPORT_SYMBOL vmlinux 0x705c798f	blk_integrity_unregister
+EXPORT_SYMBOL vmlinux 0x705d11bf	tcp_rcv_established
+EXPORT_SYMBOL vmlinux 0x7062a6c1	filemap_fdatawait_range
+EXPORT_SYMBOL vmlinux 0x70949a22	blk_queue_logical_block_size
+EXPORT_SYMBOL vmlinux 0x709f85df	con_copy_unimap
+EXPORT_SYMBOL vmlinux 0x70ab2f8d	scsi_command_normalize_sense
+EXPORT_SYMBOL vmlinux 0x70b3c0ce	close_bdev_exclusive
+EXPORT_SYMBOL vmlinux 0x70bc17d7	inode_wait
+EXPORT_SYMBOL vmlinux 0x70d1f8f3	strncat
+EXPORT_SYMBOL vmlinux 0x70d86c15	d_instantiate
+EXPORT_SYMBOL vmlinux 0x70d8ab82	acpi_acquire_global_lock
+EXPORT_SYMBOL vmlinux 0x70dc114f	pnp_device_attach
+EXPORT_SYMBOL vmlinux 0x71048ca1	set_anon_super
+EXPORT_SYMBOL vmlinux 0x7129e5f8	hex_asc
+EXPORT_SYMBOL vmlinux 0x712aa29b	_spin_lock_irqsave
+EXPORT_SYMBOL vmlinux 0x71356fba	remove_wait_queue
+EXPORT_SYMBOL vmlinux 0x71495136	pcie_port_service_unregister
+EXPORT_SYMBOL vmlinux 0x7152bb43	blk_free_tags
+EXPORT_SYMBOL vmlinux 0x7171121c	overflowgid
+EXPORT_SYMBOL vmlinux 0x717690b5	xfrm_state_add
+EXPORT_SYMBOL vmlinux 0x71a50dbc	register_blkdev
+EXPORT_SYMBOL vmlinux 0x71f649f0	xfrm_state_delete_tunnel
+EXPORT_SYMBOL vmlinux 0x7216976b	skb_copy_datagram_const_iovec
+EXPORT_SYMBOL vmlinux 0x724ca84d	I_BDEV
+EXPORT_SYMBOL vmlinux 0x729f7279	dm_exception_store_create
+EXPORT_SYMBOL vmlinux 0x72b243d4	free_dma
+EXPORT_SYMBOL vmlinux 0x72bf2140	mtrr_add
+EXPORT_SYMBOL vmlinux 0x72c3be87	param_set_byte
+EXPORT_SYMBOL vmlinux 0x72dda130	pnp_is_active
+EXPORT_SYMBOL vmlinux 0x72ea7b2d	scsi_device_type
+EXPORT_SYMBOL vmlinux 0x731b2cc7	acpi_processor_notify_smm
+EXPORT_SYMBOL vmlinux 0x732e2553	tty_unthrottle
+EXPORT_SYMBOL vmlinux 0x733d5ec8	ip_route_output_key
+EXPORT_SYMBOL vmlinux 0x735a0bd5	native_io_delay
+EXPORT_SYMBOL vmlinux 0x7362dd1e	vfs_fstat
+EXPORT_SYMBOL vmlinux 0x7381afc4	mapping_tagged
+EXPORT_SYMBOL vmlinux 0x7387fac0	kunmap_high
+EXPORT_SYMBOL vmlinux 0x738803e6	strnlen
+EXPORT_SYMBOL vmlinux 0x7389c9a8	acpi_bus_get_power
+EXPORT_SYMBOL vmlinux 0x738afb33	blk_queue_dma_pad
+EXPORT_SYMBOL vmlinux 0x73a935a5	generic_show_options
+EXPORT_SYMBOL vmlinux 0x73b0df48	scsi_target_quiesce
+EXPORT_SYMBOL vmlinux 0x73d384d8	dma_async_memcpy_buf_to_pg
+EXPORT_SYMBOL vmlinux 0x73d708a9	inet_addr_type
+EXPORT_SYMBOL vmlinux 0x73d8311f	proc_mkdir
+EXPORT_SYMBOL vmlinux 0x73e0df6c	journal_start
+EXPORT_SYMBOL vmlinux 0x73e20c1c	strlcpy
+EXPORT_SYMBOL vmlinux 0x73ec1d0f	file_fsync
+EXPORT_SYMBOL vmlinux 0x73ee4e08	wake_up_process
+EXPORT_SYMBOL vmlinux 0x74085dd5	lock_may_write
+EXPORT_SYMBOL vmlinux 0x740a1b95	reserve_evntsel_nmi
+EXPORT_SYMBOL vmlinux 0x7413793a	EISA_bus
+EXPORT_SYMBOL vmlinux 0x741a246f	vfs_quota_on_path
+EXPORT_SYMBOL vmlinux 0x744c0c68	param_get_byte
+EXPORT_SYMBOL vmlinux 0x745abc51	jbd2_journal_errno
+EXPORT_SYMBOL vmlinux 0x74825201	__inet6_hash
+EXPORT_SYMBOL vmlinux 0x7485e15e	unregister_chrdev_region
+EXPORT_SYMBOL vmlinux 0x748caf40	down
+EXPORT_SYMBOL vmlinux 0x74954462	timecounter_read
+EXPORT_SYMBOL vmlinux 0x749ba00a	f_setown
+EXPORT_SYMBOL vmlinux 0x74aa3cbd	nf_log_register
+EXPORT_SYMBOL vmlinux 0x74bfc369	__tracepoint_kmem_cache_alloc
+EXPORT_SYMBOL vmlinux 0x74cc1cbe	unregister_cpu_notifier
+EXPORT_SYMBOL vmlinux 0x74f04b0b	pcim_enable_device
+EXPORT_SYMBOL vmlinux 0x74f7e8f2	bdev_read_only
+EXPORT_SYMBOL vmlinux 0x75080379	generic_file_aio_write
+EXPORT_SYMBOL vmlinux 0x750852f3	i2c_del_driver
+EXPORT_SYMBOL vmlinux 0x750e7e9d	locks_init_lock
+EXPORT_SYMBOL vmlinux 0x75271716	save_processor_state
+EXPORT_SYMBOL vmlinux 0x756dc88c	__netdev_alloc_skb
+EXPORT_SYMBOL vmlinux 0x75accf3b	pci_wake_from_d3
+EXPORT_SYMBOL vmlinux 0x75ca33e5	pcim_iomap_regions
+EXPORT_SYMBOL vmlinux 0x75e093b5	d_delete
+EXPORT_SYMBOL vmlinux 0x75f9f8b3	set_irq_chip
+EXPORT_SYMBOL vmlinux 0x760a0f4f	yield
+EXPORT_SYMBOL vmlinux 0x760b437a	unregister_inetaddr_notifier
+EXPORT_SYMBOL vmlinux 0x763530f2	unregister_8022_client
+EXPORT_SYMBOL vmlinux 0x764bd77c	request_resource
+EXPORT_SYMBOL vmlinux 0x764d3570	register_sysrq_key
+EXPORT_SYMBOL vmlinux 0x7653a97b	uart_register_driver
+EXPORT_SYMBOL vmlinux 0x7671328c	__break_lease
+EXPORT_SYMBOL vmlinux 0x767ddb02	set_memory_wc
+EXPORT_SYMBOL vmlinux 0x769cec0d	skb_pull
+EXPORT_SYMBOL vmlinux 0x769fcfca	inet_dgram_connect
+EXPORT_SYMBOL vmlinux 0x76bf656d	__bitmap_shift_left
+EXPORT_SYMBOL vmlinux 0x76cdc14a	pci_back_from_sleep
+EXPORT_SYMBOL vmlinux 0x76d3cd60	laptop_mode
+EXPORT_SYMBOL vmlinux 0x76e98ebf	call_usermodehelper_setcleanup
+EXPORT_SYMBOL vmlinux 0x76f3f8a5	num_k8_northbridges
+EXPORT_SYMBOL vmlinux 0x76fb103a	misc_register
+EXPORT_SYMBOL vmlinux 0x76fb6800	genl_register_ops
+EXPORT_SYMBOL vmlinux 0x770a0036	isapnp_cfg_begin
+EXPORT_SYMBOL vmlinux 0x7711bd60	fb_firmware_edid
+EXPORT_SYMBOL vmlinux 0x771459e6	bio_integrity_set_tag
+EXPORT_SYMBOL vmlinux 0x772ad241	tty_port_hangup
+EXPORT_SYMBOL vmlinux 0x773a9c94	blk_iopoll_enabled
+EXPORT_SYMBOL vmlinux 0x773be5e7	iput
+EXPORT_SYMBOL vmlinux 0x774b9e04	__netif_schedule
+EXPORT_SYMBOL vmlinux 0x77a108df	_write_unlock_irqrestore
+EXPORT_SYMBOL vmlinux 0x77b61e88	put_page
+EXPORT_SYMBOL vmlinux 0x77b92455	netlink_set_err
+EXPORT_SYMBOL vmlinux 0x77cfcfde	__tracepoint_kmalloc_node
+EXPORT_SYMBOL vmlinux 0x77da4236	dm_exception_store_destroy
+EXPORT_SYMBOL vmlinux 0x77ecac9f	zlib_inflateEnd
+EXPORT_SYMBOL vmlinux 0x77fa5d1f	ns_to_timespec
+EXPORT_SYMBOL vmlinux 0x784cc954	sock_get_timestampns
+EXPORT_SYMBOL vmlinux 0x784d69e1	skb_tx_hash
+EXPORT_SYMBOL vmlinux 0x785ce27a	n_tty_ioctl_helper
+EXPORT_SYMBOL vmlinux 0x786cb464	alloc_disk_node
+EXPORT_SYMBOL vmlinux 0x786dd666	inode_permission
+EXPORT_SYMBOL vmlinux 0x789396c5	clocksource_change_rating
+EXPORT_SYMBOL vmlinux 0x78a484c9	_read_unlock_irqrestore
+EXPORT_SYMBOL vmlinux 0x78ca8eb7	dm_table_get_size
+EXPORT_SYMBOL vmlinux 0x78d965a4	ipv6_setsockopt
+EXPORT_SYMBOL vmlinux 0x78df6bd7	no_pci_devices
+EXPORT_SYMBOL vmlinux 0x79007d0e	mmc_wait_for_app_cmd
+EXPORT_SYMBOL vmlinux 0x79068fda	acpi_install_method
+EXPORT_SYMBOL vmlinux 0x790cb0cf	napi_complete
+EXPORT_SYMBOL vmlinux 0x79269b1c	kill_litter_super
+EXPORT_SYMBOL vmlinux 0x794487ee	disable_hlt
+EXPORT_SYMBOL vmlinux 0x7951bd87	security_sb_clone_mnt_opts
+EXPORT_SYMBOL vmlinux 0x796fc5ce	scsi_get_sense_info_fld
+EXPORT_SYMBOL vmlinux 0x7981cf17	remove_inode_hash
+EXPORT_SYMBOL vmlinux 0x7993b394	mmc_wait_for_cmd
+EXPORT_SYMBOL vmlinux 0x79aa04a2	get_random_bytes
+EXPORT_SYMBOL vmlinux 0x79ad224b	tasklet_kill
+EXPORT_SYMBOL vmlinux 0x79d84367	blk_rq_map_integrity_sg
+EXPORT_SYMBOL vmlinux 0x79d877d4	__xfrm_policy_check
+EXPORT_SYMBOL vmlinux 0x7a107d23	dmam_release_declared_memory
+EXPORT_SYMBOL vmlinux 0x7a276eda	__elv_add_request
+EXPORT_SYMBOL vmlinux 0x7a2a837d	strict_strtol
+EXPORT_SYMBOL vmlinux 0x7a2afc64	skb_free_datagram
+EXPORT_SYMBOL vmlinux 0x7a2d67e4	pci_fixup_cardbus
+EXPORT_SYMBOL vmlinux 0x7a4497db	kzfree
+EXPORT_SYMBOL vmlinux 0x7a848702	_read_lock_irqsave
+EXPORT_SYMBOL vmlinux 0x7a99ef26	blk_queue_max_discard_sectors
+EXPORT_SYMBOL vmlinux 0x7a9ded7c	__blockdev_direct_IO
+EXPORT_SYMBOL vmlinux 0x7aaa1933	alloc_pci_dev
+EXPORT_SYMBOL vmlinux 0x7ae3320c	kernel_read
+EXPORT_SYMBOL vmlinux 0x7ae3bab2	inode_change_ok
+EXPORT_SYMBOL vmlinux 0x7aec9089	clear_user
+EXPORT_SYMBOL vmlinux 0x7b0c84c4	acpi_remove_table_handler
+EXPORT_SYMBOL vmlinux 0x7b134ddf	acpi_get_name
+EXPORT_SYMBOL vmlinux 0x7b328abc	tty_port_init
+EXPORT_SYMBOL vmlinux 0x7b4b79ed	pci_bus_read_config_word
+EXPORT_SYMBOL vmlinux 0x7b52a859	wrmsr_safe_on_cpu
+EXPORT_SYMBOL vmlinux 0x7b56bd05	acpi_lid_notifier_register
+EXPORT_SYMBOL vmlinux 0x7b5a9fe4	__splice_from_pipe
+EXPORT_SYMBOL vmlinux 0x7b9ec44d	tcp_recvmsg
+EXPORT_SYMBOL vmlinux 0x7bd508ca	pnp_activate_dev
+EXPORT_SYMBOL vmlinux 0x7bef77bf	generic_make_request
+EXPORT_SYMBOL vmlinux 0x7bf3aeab	__pci_register_driver
+EXPORT_SYMBOL vmlinux 0x7c00d781	sk_stop_timer
+EXPORT_SYMBOL vmlinux 0x7c1e2565	pipe_unlock
+EXPORT_SYMBOL vmlinux 0x7c3d7a00	register_md_personality
+EXPORT_SYMBOL vmlinux 0x7c4583c3	scsi_nonblockable_ioctl
+EXPORT_SYMBOL vmlinux 0x7c46233a	cpufreq_quick_get
+EXPORT_SYMBOL vmlinux 0x7c60d66e	getname
+EXPORT_SYMBOL vmlinux 0x7c61340c	__release_region
+EXPORT_SYMBOL vmlinux 0x7c6d72a9	dma_async_device_register
+EXPORT_SYMBOL vmlinux 0x7c862f10	dmam_declare_coherent_memory
+EXPORT_SYMBOL vmlinux 0x7c8712ea	i2c_master_send
+EXPORT_SYMBOL vmlinux 0x7c896aa6	journal_get_create_access
+EXPORT_SYMBOL vmlinux 0x7c90481d	xfrm_cfg_mutex
+EXPORT_SYMBOL vmlinux 0x7c904ded	unregister_module_notifier
+EXPORT_SYMBOL vmlinux 0x7c90e716	__mod_zone_page_state
+EXPORT_SYMBOL vmlinux 0x7c930327	blkdev_issue_flush
+EXPORT_SYMBOL vmlinux 0x7ca64e79	__generic_file_aio_write
+EXPORT_SYMBOL vmlinux 0x7cadf594	km_state_expired
+EXPORT_SYMBOL vmlinux 0x7caebdad	unregister_exec_domain
+EXPORT_SYMBOL vmlinux 0x7cb1ae69	cpu_down
+EXPORT_SYMBOL vmlinux 0x7cd37b4f	get_sb_pseudo
+EXPORT_SYMBOL vmlinux 0x7cd9c40d	generic_setxattr
+EXPORT_SYMBOL vmlinux 0x7ce2e600	pci_bus_write_config_dword
+EXPORT_SYMBOL vmlinux 0x7d11c268	jiffies
+EXPORT_SYMBOL vmlinux 0x7d2fe917	pneigh_enqueue
+EXPORT_SYMBOL vmlinux 0x7d30d4cb	register_8022_client
+EXPORT_SYMBOL vmlinux 0x7d47126f	kmap
+EXPORT_SYMBOL vmlinux 0x7d4fb188	sk_release_kernel
+EXPORT_SYMBOL vmlinux 0x7d5cb414	current_fs_time
+EXPORT_SYMBOL vmlinux 0x7d60627e	posix_acl_permission
+EXPORT_SYMBOL vmlinux 0x7d675786	register_sysctl_paths
+EXPORT_SYMBOL vmlinux 0x7d79334a	scsi_set_medium_removal
+EXPORT_SYMBOL vmlinux 0x7da7b4b0	jbd2_journal_init_inode
+EXPORT_SYMBOL vmlinux 0x7dceceac	capable
+EXPORT_SYMBOL vmlinux 0x7de05b00	xfrm4_rcv_encap
+EXPORT_SYMBOL vmlinux 0x7de1dfa9	delayed_slow_work_enqueue
+EXPORT_SYMBOL vmlinux 0x7deec5fd	tcp_tso_segment
+EXPORT_SYMBOL vmlinux 0x7df676b4	invalidate_inodes
+EXPORT_SYMBOL vmlinux 0x7e32d00d	bio_get_nr_vecs
+EXPORT_SYMBOL vmlinux 0x7e400b1d	rtc_dev_update_irq_enable_emul
+EXPORT_SYMBOL vmlinux 0x7e59dc80	rwsem_down_read_failed
+EXPORT_SYMBOL vmlinux 0x7e68ff1a	md_unregister_thread
+EXPORT_SYMBOL vmlinux 0x7e862e3d	__xfrm_route_forward
+EXPORT_SYMBOL vmlinux 0x7e9ebb05	kernel_thread
+EXPORT_SYMBOL vmlinux 0x7ecb001b	__per_cpu_offset
+EXPORT_SYMBOL vmlinux 0x7ee0d0c0	scsi_report_device_reset
+EXPORT_SYMBOL vmlinux 0x7ee91c1d	_spin_trylock
+EXPORT_SYMBOL vmlinux 0x7ef5a53b	__xfrm_state_delete
+EXPORT_SYMBOL vmlinux 0x7f10ad23	nf_reinject
+EXPORT_SYMBOL vmlinux 0x7f24de73	jiffies_to_usecs
+EXPORT_SYMBOL vmlinux 0x7f383fd4	pagecache_write_begin
+EXPORT_SYMBOL vmlinux 0x7f3ceaa8	netdev_bonding_change
+EXPORT_SYMBOL vmlinux 0x7f5e0d0b	dmam_alloc_noncoherent
+EXPORT_SYMBOL vmlinux 0x7f683e3b	do_splice_from
+EXPORT_SYMBOL vmlinux 0x7f9675c8	arp_find
+EXPORT_SYMBOL vmlinux 0x7f9d99a2	pci_disable_device
+EXPORT_SYMBOL vmlinux 0x7ff9b057	blk_make_request
+EXPORT_SYMBOL vmlinux 0x8003ed43	ethtool_op_set_tx_csum
+EXPORT_SYMBOL vmlinux 0x800af958	unregister_sysctl_table
+EXPORT_SYMBOL vmlinux 0x80199b5e	vfs_readlink
+EXPORT_SYMBOL vmlinux 0x802b0263	fddi_type_trans
+EXPORT_SYMBOL vmlinux 0x803cf5e2	devm_iounmap
+EXPORT_SYMBOL vmlinux 0x803da5fc	jbd2_journal_try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0x804d00e7	pnp_register_card_driver
+EXPORT_SYMBOL vmlinux 0x8063f83d	radix_tree_gang_lookup
+EXPORT_SYMBOL vmlinux 0x807330e8	con_is_bound
+EXPORT_SYMBOL vmlinux 0x80796080	mb_cache_entry_find_first
+EXPORT_SYMBOL vmlinux 0x80a786bc	bio_uncopy_user
+EXPORT_SYMBOL vmlinux 0x80afc5a3	atomic_dec_and_mutex_lock
+EXPORT_SYMBOL vmlinux 0x80cc776d	blk_queue_max_hw_segments
+EXPORT_SYMBOL vmlinux 0x80f03a9c	fddi_change_mtu
+EXPORT_SYMBOL vmlinux 0x80fa5e66	jbd2_journal_abort
+EXPORT_SYMBOL vmlinux 0x8107cffa	skb_queue_head
+EXPORT_SYMBOL vmlinux 0x811e73d9	ppp_channel_index
+EXPORT_SYMBOL vmlinux 0x81472677	acpi_get_table
+EXPORT_SYMBOL vmlinux 0x815afa09	cdrom_get_media_event
+EXPORT_SYMBOL vmlinux 0x815b5dd4	match_octal
+EXPORT_SYMBOL vmlinux 0x815c56d0	cpu_present_mask
+EXPORT_SYMBOL vmlinux 0x815f2897	empty_zero_page
+EXPORT_SYMBOL vmlinux 0x81799cee	vscnprintf
+EXPORT_SYMBOL vmlinux 0x817bca17	pnp_start_dev
+EXPORT_SYMBOL vmlinux 0x8182e275	scsi_report_bus_reset
+EXPORT_SYMBOL vmlinux 0x81a7dd8b	md_error
+EXPORT_SYMBOL vmlinux 0x81a961fe	pcim_iounmap_regions
+EXPORT_SYMBOL vmlinux 0x81c8979b	phy_connect
+EXPORT_SYMBOL vmlinux 0x81e6b37f	dmi_get_system_info
+EXPORT_SYMBOL vmlinux 0x820d225f	print_mac
+EXPORT_SYMBOL vmlinux 0x820fc63c	vfsmount_lock
+EXPORT_SYMBOL vmlinux 0x8212721d	xenbus_dev_request_and_reply
+EXPORT_SYMBOL vmlinux 0x8235805b	memmove
+EXPORT_SYMBOL vmlinux 0x8251bcc3	bitmap_release_region
+EXPORT_SYMBOL vmlinux 0x82692209	kref_set
+EXPORT_SYMBOL vmlinux 0x8274dbfc	ipv6_dev_get_saddr
+EXPORT_SYMBOL vmlinux 0x827f24d3	backlight_device_unregister
+EXPORT_SYMBOL vmlinux 0x8292124b	simple_rename
+EXPORT_SYMBOL vmlinux 0x829596dc	blk_rq_map_kern
+EXPORT_SYMBOL vmlinux 0x82acfb70	blk_iopoll_sched
+EXPORT_SYMBOL vmlinux 0x82b1281f	pci_request_regions
+EXPORT_SYMBOL vmlinux 0x82be15b1	block_truncate_page
+EXPORT_SYMBOL vmlinux 0x82e6e528	tty_schedule_flip
+EXPORT_SYMBOL vmlinux 0x82e94c26	bioset_create
+EXPORT_SYMBOL vmlinux 0x830bc79a	task_tgid_nr_ns
+EXPORT_SYMBOL vmlinux 0x830e547b	ioremap_prot
+EXPORT_SYMBOL vmlinux 0x8317e20a	completion_done
+EXPORT_SYMBOL vmlinux 0x831eee59	bfifo_qdisc_ops
+EXPORT_SYMBOL vmlinux 0x832c0e8c	truncate_inode_pages
+EXPORT_SYMBOL vmlinux 0x83435ef2	eth_header_cache_update
+EXPORT_SYMBOL vmlinux 0x8346cda8	xfrm_unregister_km
+EXPORT_SYMBOL vmlinux 0x8352629f	skb_under_panic
+EXPORT_SYMBOL vmlinux 0x8364f507	xfrm6_rcv_spi
+EXPORT_SYMBOL vmlinux 0x83904ad4	per_cpu__irq_regs
+EXPORT_SYMBOL vmlinux 0x839acaa9	dev_mc_delete
+EXPORT_SYMBOL vmlinux 0x83a476ce	bitmap_scnlistprintf
+EXPORT_SYMBOL vmlinux 0x83b68368	cfb_imageblit
+EXPORT_SYMBOL vmlinux 0x83da36ee	security_file_permission
+EXPORT_SYMBOL vmlinux 0x8417b473	rtnl_set_sk_err
+EXPORT_SYMBOL vmlinux 0x8442448c	tcf_register_action
+EXPORT_SYMBOL vmlinux 0x8450f19c	pci_bus_add_devices
+EXPORT_SYMBOL vmlinux 0x8475dce1	journal_clear_err
+EXPORT_SYMBOL vmlinux 0x8478733a	bio_add_pc_page
+EXPORT_SYMBOL vmlinux 0x84a63bc6	nla_reserve_nohdr
+EXPORT_SYMBOL vmlinux 0x84ba9111	__register_binfmt
+EXPORT_SYMBOL vmlinux 0x84c833b1	blk_queue_max_hw_sectors
+EXPORT_SYMBOL vmlinux 0x84d778d6	vga_get
+EXPORT_SYMBOL vmlinux 0x84f125cc	xfrm4_rcv
+EXPORT_SYMBOL vmlinux 0x851c4703	uart_match_port
+EXPORT_SYMBOL vmlinux 0x85670f1d	rtnl_is_locked
+EXPORT_SYMBOL vmlinux 0x856c7482	vlan_gro_receive
+EXPORT_SYMBOL vmlinux 0x85ac7f10	posix_acl_from_xattr
+EXPORT_SYMBOL vmlinux 0x85df9b6c	strsep
+EXPORT_SYMBOL vmlinux 0x85e7deb2	iov_iter_fault_in_readable
+EXPORT_SYMBOL vmlinux 0x85f3dcc7	kernel_getsockname
+EXPORT_SYMBOL vmlinux 0x860e2225	redraw_screen
+EXPORT_SYMBOL vmlinux 0x86188eed	scsicam_bios_param
+EXPORT_SYMBOL vmlinux 0x864ce2df	rfkill_set_hw_state
+EXPORT_SYMBOL vmlinux 0x8664f62e	cpufreq_update_policy
+EXPORT_SYMBOL vmlinux 0x8668715c	journal_abort
+EXPORT_SYMBOL vmlinux 0x8687dd2b	input_allocate_device
+EXPORT_SYMBOL vmlinux 0x868a5638	tcp_alloc_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x868acba5	get_options
+EXPORT_SYMBOL vmlinux 0x86b5a388	ip_xfrm_me_harder
+EXPORT_SYMBOL vmlinux 0x86d26217	key_put
+EXPORT_SYMBOL vmlinux 0x86fb9b05	bitmap_parse_user
+EXPORT_SYMBOL vmlinux 0x871a9d93	skb_prepare_seq_read
+EXPORT_SYMBOL vmlinux 0x871c0a7e	fiemap_check_flags
+EXPORT_SYMBOL vmlinux 0x871ede2b	scsi_register
+EXPORT_SYMBOL vmlinux 0x8733e9a3	sleep_on_timeout
+EXPORT_SYMBOL vmlinux 0x87556a1a	generic_file_llseek_unlocked
+EXPORT_SYMBOL vmlinux 0x876dafc3	ec_write
+EXPORT_SYMBOL vmlinux 0x87706223	netlink_rcv_skb
+EXPORT_SYMBOL vmlinux 0x878a7896	install_exec_creds
+EXPORT_SYMBOL vmlinux 0x878ab3ce	sysctl_tcp_adv_win_scale
+EXPORT_SYMBOL vmlinux 0x878ea65e	pci_release_region
+EXPORT_SYMBOL vmlinux 0x87a4b07a	__devm_release_region
+EXPORT_SYMBOL vmlinux 0x87a7a9a4	dev_queue_xmit
+EXPORT_SYMBOL vmlinux 0x87aaddf8	wrmsr_safe_regs_on_cpu
+EXPORT_SYMBOL vmlinux 0x87b144b5	bio_alloc_bioset
+EXPORT_SYMBOL vmlinux 0x87bb1041	scsi_prep_state_check
+EXPORT_SYMBOL vmlinux 0x87c822bf	tcp_hashinfo
+EXPORT_SYMBOL vmlinux 0x87ec6cd9	hippi_neigh_setup_dev
+EXPORT_SYMBOL vmlinux 0x87f438a2	sysctl_intvec
+EXPORT_SYMBOL vmlinux 0x87f6c4c2	kmap_atomic
+EXPORT_SYMBOL vmlinux 0x88012ca9	nf_register_hook
+EXPORT_SYMBOL vmlinux 0x881039d0	zlib_inflate
+EXPORT_SYMBOL vmlinux 0x8845710f	bio_map_kern
+EXPORT_SYMBOL vmlinux 0x884e9096	tty_get_baud_rate
+EXPORT_SYMBOL vmlinux 0x88740b6d	ip6_frag_match
+EXPORT_SYMBOL vmlinux 0x8880c913	flush_signals
+EXPORT_SYMBOL vmlinux 0x88893060	xfrm_find_acq
+EXPORT_SYMBOL vmlinux 0x88adf428	dma_pool_alloc
+EXPORT_SYMBOL vmlinux 0x88b89fba	journal_update_format
+EXPORT_SYMBOL vmlinux 0x88c9e2dd	simple_transaction_get
+EXPORT_SYMBOL vmlinux 0x88ca6c26	kernel_setsockopt
+EXPORT_SYMBOL vmlinux 0x88ceaf60	neigh_update
+EXPORT_SYMBOL vmlinux 0x890b0e3d	neigh_lookup_nodev
+EXPORT_SYMBOL vmlinux 0x890e9f6c	tcf_em_register
+EXPORT_SYMBOL vmlinux 0x8914fda5	pnp_get_resource
+EXPORT_SYMBOL vmlinux 0x892b26a0	set_memory_nx
+EXPORT_SYMBOL vmlinux 0x8936b3a8	pci_clear_mwi
+EXPORT_SYMBOL vmlinux 0x89447102	lock_may_read
+EXPORT_SYMBOL vmlinux 0x894ba6d4	mmc_add_host
+EXPORT_SYMBOL vmlinux 0x8969b997	ida_get_new
+EXPORT_SYMBOL vmlinux 0x896e6f76	__skb_warn_lro_forwarding
+EXPORT_SYMBOL vmlinux 0x897473df	mktime
+EXPORT_SYMBOL vmlinux 0x898cd8b1	mca_device_claimed
+EXPORT_SYMBOL vmlinux 0x89949018	down_timeout
+EXPORT_SYMBOL vmlinux 0x89ce7a25	sock_i_uid
+EXPORT_SYMBOL vmlinux 0x89d5538d	fb_pad_aligned_buffer
+EXPORT_SYMBOL vmlinux 0x89d66811	build_ehash_secret
+EXPORT_SYMBOL vmlinux 0x8a1203a9	kref_get
+EXPORT_SYMBOL vmlinux 0x8a23f20f	pnp_possible_config
+EXPORT_SYMBOL vmlinux 0x8a2ce7f6	page_follow_link_light
+EXPORT_SYMBOL vmlinux 0x8a373fd7	twl4030_i2c_write
+EXPORT_SYMBOL vmlinux 0x8a3a83c2	dec_zone_page_state
+EXPORT_SYMBOL vmlinux 0x8a3d60d3	sock_no_mmap
+EXPORT_SYMBOL vmlinux 0x8a3eabf0	__wait_on_bit
+EXPORT_SYMBOL vmlinux 0x8a58e66a	key_revoke
+EXPORT_SYMBOL vmlinux 0x8a7d1c31	high_memory
+EXPORT_SYMBOL vmlinux 0x8a7f431c	tcp_read_sock
+EXPORT_SYMBOL vmlinux 0x8a88c757	iw_handler_get_spy
+EXPORT_SYMBOL vmlinux 0x8a99a016	mempool_free_slab
+EXPORT_SYMBOL vmlinux 0x8aa6dc56	llc_sap_open
+EXPORT_SYMBOL vmlinux 0x8aafa7a5	get_super
+EXPORT_SYMBOL vmlinux 0x8ac6395b	per_cpu__cpu_info
+EXPORT_SYMBOL vmlinux 0x8adf78fa	tcp_md5_hash_skb_data
+EXPORT_SYMBOL vmlinux 0x8ae77528	proc_dointvec_minmax
+EXPORT_SYMBOL vmlinux 0x8ae8f74a	dev_mc_unsync
+EXPORT_SYMBOL vmlinux 0x8af13acc	scsi_track_queue_full
+EXPORT_SYMBOL vmlinux 0x8b18496f	__copy_to_user_ll
+EXPORT_SYMBOL vmlinux 0x8b337154	thermal_zone_bind_cooling_device
+EXPORT_SYMBOL vmlinux 0x8b35e873	sg_last
+EXPORT_SYMBOL vmlinux 0x8b5f4a2e	IO_APIC_get_PCI_irq_vector
+EXPORT_SYMBOL vmlinux 0x8b618d08	overflowuid
+EXPORT_SYMBOL vmlinux 0x8b664d82	eth_header_parse
+EXPORT_SYMBOL vmlinux 0x8b823657	cdev_add
+EXPORT_SYMBOL vmlinux 0x8b844ee9	nf_unregister_hook
+EXPORT_SYMBOL vmlinux 0x8b989cf9	acpi_bus_can_wakeup
+EXPORT_SYMBOL vmlinux 0x8bbde405	tcp_getsockopt
+EXPORT_SYMBOL vmlinux 0x8bbfac25	netpoll_poll
+EXPORT_SYMBOL vmlinux 0x8bc18eff	unmap_underlying_metadata
+EXPORT_SYMBOL vmlinux 0x8bc4a6c2	have_submounts
+EXPORT_SYMBOL vmlinux 0x8bd313b8	__tracepoint_kfree
+EXPORT_SYMBOL vmlinux 0x8bd5b603	param_get_long
+EXPORT_SYMBOL vmlinux 0x8c0497d8	get_phy_device
+EXPORT_SYMBOL vmlinux 0x8c183cbe	iowrite16
+EXPORT_SYMBOL vmlinux 0x8c21834a	journal_dirty_metadata
+EXPORT_SYMBOL vmlinux 0x8c2a6a5e	lro_vlan_hwaccel_receive_skb
+EXPORT_SYMBOL vmlinux 0x8c31af51	__tcp_get_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x8c3a113f	dst_destroy
+EXPORT_SYMBOL vmlinux 0x8c3d06f4	xfrm_register_km
+EXPORT_SYMBOL vmlinux 0x8c961177	skb_store_bits
+EXPORT_SYMBOL vmlinux 0x8c9ceba6	ip6_route_me_harder
+EXPORT_SYMBOL vmlinux 0x8cbc1c4d	lock_super
+EXPORT_SYMBOL vmlinux 0x8cc6ee7e	no_llseek
+EXPORT_SYMBOL vmlinux 0x8cc79cab	iowrite16_rep
+EXPORT_SYMBOL vmlinux 0x8cea0392	security_inode_setsecctx
+EXPORT_SYMBOL vmlinux 0x8d12b3e9	gnet_stats_copy_basic
+EXPORT_SYMBOL vmlinux 0x8d1cc4e7	read_cache_page
+EXPORT_SYMBOL vmlinux 0x8d2e3f96	inet_frag_find
+EXPORT_SYMBOL vmlinux 0x8d3894f2	_ctype
+EXPORT_SYMBOL vmlinux 0x8d551bef	sysctl_tcp_rmem
+EXPORT_SYMBOL vmlinux 0x8d6f81b4	__div64_32
+EXPORT_SYMBOL vmlinux 0x8d715c0e	sk_stream_error
+EXPORT_SYMBOL vmlinux 0x8d71aba4	kfree_skb
+EXPORT_SYMBOL vmlinux 0x8d8d96c6	acpi_get_sleep_type_data
+EXPORT_SYMBOL vmlinux 0x8d913762	xfrm_policy_byid
+EXPORT_SYMBOL vmlinux 0x8d9ed690	scsi_test_unit_ready
+EXPORT_SYMBOL vmlinux 0x8dc6e564	restore_processor_state
+EXPORT_SYMBOL vmlinux 0x8dca832f	__percpu_counter_sum
+EXPORT_SYMBOL vmlinux 0x8dd25276	dev_addr_del_multiple
+EXPORT_SYMBOL vmlinux 0x8dd9c7ff	scsi_add_host_with_dma
+EXPORT_SYMBOL vmlinux 0x8ddbad0a	netpoll_parse_options
+EXPORT_SYMBOL vmlinux 0x8de2d9e8	fb_show_logo
+EXPORT_SYMBOL vmlinux 0x8e002cda	acpi_remove_gpe_block
+EXPORT_SYMBOL vmlinux 0x8e0637ba	i8253_lock
+EXPORT_SYMBOL vmlinux 0x8e0b7743	ipv6_ext_hdr
+EXPORT_SYMBOL vmlinux 0x8e1eaf50	journal_release_buffer
+EXPORT_SYMBOL vmlinux 0x8e321be1	xfrm_prepare_input
+EXPORT_SYMBOL vmlinux 0x8e42e8ee	scsi_host_lookup
+EXPORT_SYMBOL vmlinux 0x8e499f5c	arp_broken_ops
+EXPORT_SYMBOL vmlinux 0x8e763ae1	send_remote_softirq
+EXPORT_SYMBOL vmlinux 0x8e80ed65	rfkill_set_states
+EXPORT_SYMBOL vmlinux 0x8e888ec3	cpumask_next_and
+EXPORT_SYMBOL vmlinux 0x8eb686f8	cdrom_get_last_written
+EXPORT_SYMBOL vmlinux 0x8ee2b565	ethtool_op_get_ufo
+EXPORT_SYMBOL vmlinux 0x8ee69235	timeval_to_jiffies
+EXPORT_SYMBOL vmlinux 0x8eedc380	input_inject_event
+EXPORT_SYMBOL vmlinux 0x8eee444d	d_alloc_root
+EXPORT_SYMBOL vmlinux 0x8ef726df	cdrom_release
+EXPORT_SYMBOL vmlinux 0x8f169874	tcf_unregister_action
+EXPORT_SYMBOL vmlinux 0x8f2703b7	wbinvd_on_all_cpus
+EXPORT_SYMBOL vmlinux 0x8f2a4385	mdiobus_free
+EXPORT_SYMBOL vmlinux 0x8f36f028	tcf_destroy_chain
+EXPORT_SYMBOL vmlinux 0x8f453d6c	tc_classify_compat
+EXPORT_SYMBOL vmlinux 0x8f48679a	rb_prev
+EXPORT_SYMBOL vmlinux 0x8f6b7950	set_irq_data
+EXPORT_SYMBOL vmlinux 0x8f9c199c	__get_user_2
+EXPORT_SYMBOL vmlinux 0x8ff2adb7	ip_generic_getfrag
+EXPORT_SYMBOL vmlinux 0x8ff4079b	pv_irq_ops
+EXPORT_SYMBOL vmlinux 0x8ffdb3b8	crc16
+EXPORT_SYMBOL vmlinux 0x90035333	secure_tcpv6_sequence_number
+EXPORT_SYMBOL vmlinux 0x903d6322	phy_driver_register
+EXPORT_SYMBOL vmlinux 0x904409c6	acpi_set_firmware_waking_vector
+EXPORT_SYMBOL vmlinux 0x90765072	md_wakeup_thread
+EXPORT_SYMBOL vmlinux 0x90a1601f	dmi_check_system
+EXPORT_SYMBOL vmlinux 0x90adbfdf	sock_common_getsockopt
+EXPORT_SYMBOL vmlinux 0x90b0c27e	bio_integrity_alloc
+EXPORT_SYMBOL vmlinux 0x90d5b1ff	wait_on_sync_kiocb
+EXPORT_SYMBOL vmlinux 0x90e3d2db	blk_queue_find_tag
+EXPORT_SYMBOL vmlinux 0x91009452	schedule_delayed_work
+EXPORT_SYMBOL vmlinux 0x9130dc21	check_disk_change
+EXPORT_SYMBOL vmlinux 0x9144a8e2	ec_burst_disable
+EXPORT_SYMBOL vmlinux 0x91481982	__ratelimit
+EXPORT_SYMBOL vmlinux 0x9155ca07	ethtool_op_get_rx_csum
+EXPORT_SYMBOL vmlinux 0x91607d95	set_memory_wb
+EXPORT_SYMBOL vmlinux 0x91670be9	xrlim_allow
+EXPORT_SYMBOL vmlinux 0x91766c09	param_get_ulong
+EXPORT_SYMBOL vmlinux 0x917e9599	scsi_ioctl
+EXPORT_SYMBOL vmlinux 0x919670bd	default_unplug_io_fn
+EXPORT_SYMBOL vmlinux 0x91acf3f5	scsi_dma_unmap
+EXPORT_SYMBOL vmlinux 0x91b49100	__sk_dst_check
+EXPORT_SYMBOL vmlinux 0x91b622c3	tcp_initialize_rcv_mss
+EXPORT_SYMBOL vmlinux 0x91e013a4	pci_find_next_bus
+EXPORT_SYMBOL vmlinux 0x9214ed8a	param_get_bool
+EXPORT_SYMBOL vmlinux 0x92257986	page_symlink_inode_operations
+EXPORT_SYMBOL vmlinux 0x923b1276	dmaengine_get
+EXPORT_SYMBOL vmlinux 0x923f000d	dm_io
+EXPORT_SYMBOL vmlinux 0x9267c833	pci_clear_master
+EXPORT_SYMBOL vmlinux 0x926df7fc	flock_lock_file_wait
+EXPORT_SYMBOL vmlinux 0x9285114f	vfs_mkdir
+EXPORT_SYMBOL vmlinux 0x92897e3d	default_idle
+EXPORT_SYMBOL vmlinux 0x92b690a3	__rta_fill
+EXPORT_SYMBOL vmlinux 0x92ec7e77	security_task_getsecid
+EXPORT_SYMBOL vmlinux 0x9305f8e6	cpufreq_get
+EXPORT_SYMBOL vmlinux 0x9318a7d9	kmap_atomic_prot
+EXPORT_SYMBOL vmlinux 0x93347d04	udp_lib_getsockopt
+EXPORT_SYMBOL vmlinux 0x936414cf	security_inode_permission
+EXPORT_SYMBOL vmlinux 0x9385667d	down_read_trylock
+EXPORT_SYMBOL vmlinux 0x93a1c3cd	set_pages_x
+EXPORT_SYMBOL vmlinux 0x93a22b77	registered_fb
+EXPORT_SYMBOL vmlinux 0x93a6e0b2	io_schedule
+EXPORT_SYMBOL vmlinux 0x93a749b2	tty_wait_until_sent
+EXPORT_SYMBOL vmlinux 0x93a7fd9a	xfrm_state_flush
+EXPORT_SYMBOL vmlinux 0x93bdc470	audit_log_start
+EXPORT_SYMBOL vmlinux 0x93c651be	acpi_info
+EXPORT_SYMBOL vmlinux 0x93cbd1ec	_spin_lock_bh
+EXPORT_SYMBOL vmlinux 0x93f4f506	sk_stream_wait_memory
+EXPORT_SYMBOL vmlinux 0x93fca811	__get_free_pages
+EXPORT_SYMBOL vmlinux 0x944832d6	ftrace_print_symbols_seq
+EXPORT_SYMBOL vmlinux 0x9458ed53	pci_enable_bridges
+EXPORT_SYMBOL vmlinux 0x9466338f	unregister_snap_client
+EXPORT_SYMBOL vmlinux 0x94771a7c	nobh_write_end
+EXPORT_SYMBOL vmlinux 0x94847b23	nf_ct_destroy
+EXPORT_SYMBOL vmlinux 0x94932ccd	pnp_find_card
+EXPORT_SYMBOL vmlinux 0x94961283	vunmap
+EXPORT_SYMBOL vmlinux 0x94a3d48a	scsi_execute
+EXPORT_SYMBOL vmlinux 0x94a6467e	kobject_put
+EXPORT_SYMBOL vmlinux 0x94b541b5	cpu_active_mask
+EXPORT_SYMBOL vmlinux 0x94d06365	neigh_changeaddr
+EXPORT_SYMBOL vmlinux 0x94e32357	dev_unicast_add
+EXPORT_SYMBOL vmlinux 0x94e6466c	pci_bus_read_config_byte
+EXPORT_SYMBOL vmlinux 0x94ea8e56	icmpv6_send
+EXPORT_SYMBOL vmlinux 0x950b09eb	eth_header
+EXPORT_SYMBOL vmlinux 0x95352ea9	acpi_check_mem_region
+EXPORT_SYMBOL vmlinux 0x954310be	bio_integrity_add_page
+EXPORT_SYMBOL vmlinux 0x954488a4	syncookie_secret
+EXPORT_SYMBOL vmlinux 0x954cbb26	vsprintf
+EXPORT_SYMBOL vmlinux 0x958239fa	tcp_enter_memory_pressure
+EXPORT_SYMBOL vmlinux 0x95cdfd10	tcp_close
+EXPORT_SYMBOL vmlinux 0x9629486a	per_cpu__cpu_number
+EXPORT_SYMBOL vmlinux 0x962c5cfb	textsearch_unregister
+EXPORT_SYMBOL vmlinux 0x962ffb77	__lookup_one_len
+EXPORT_SYMBOL vmlinux 0x96682682	register_quota_format
+EXPORT_SYMBOL vmlinux 0x96898769	sysfs_format_mac
+EXPORT_SYMBOL vmlinux 0x96af1a48	contig_page_data
+EXPORT_SYMBOL vmlinux 0x96afd6a4	mark_page_accessed
+EXPORT_SYMBOL vmlinux 0x96cd2b04	scsi_sense_key_string
+EXPORT_SYMBOL vmlinux 0x97002dfa	input_set_capability
+EXPORT_SYMBOL vmlinux 0x970a811c	jbd2_journal_set_triggers
+EXPORT_SYMBOL vmlinux 0x971cb541	dma_pool_free
+EXPORT_SYMBOL vmlinux 0x973383b4	generic_file_direct_write
+EXPORT_SYMBOL vmlinux 0x973873ab	_spin_lock
+EXPORT_SYMBOL vmlinux 0x9754ec10	radix_tree_preload
+EXPORT_SYMBOL vmlinux 0x97622d75	i2c_smbus_read_byte_data
+EXPORT_SYMBOL vmlinux 0x97a716a5	ipv6_getsockopt
+EXPORT_SYMBOL vmlinux 0x97de0ddd	acpi_install_gpe_block
+EXPORT_SYMBOL vmlinux 0x97e200eb	pagecache_write_end
+EXPORT_SYMBOL vmlinux 0x9802beaa	take_over_console
+EXPORT_SYMBOL vmlinux 0x9840f20b	release_sock
+EXPORT_SYMBOL vmlinux 0x984ddfea	xfrm_find_acq_byseq
+EXPORT_SYMBOL vmlinux 0x986d7aa1	pci_release_selected_regions
+EXPORT_SYMBOL vmlinux 0x986e6135	fb_pad_unaligned_buffer
+EXPORT_SYMBOL vmlinux 0x988ed85d	set_memory_x
+EXPORT_SYMBOL vmlinux 0x98ba3b81	tcf_hash_new_index
+EXPORT_SYMBOL vmlinux 0x98e60476	read_dev_sector
+EXPORT_SYMBOL vmlinux 0x98f49e79	skb_find_text
+EXPORT_SYMBOL vmlinux 0x98f49f94	dev_mc_sync
+EXPORT_SYMBOL vmlinux 0x98ff67a7	__inc_zone_page_state
+EXPORT_SYMBOL vmlinux 0x99052a84	acpi_os_write_port
+EXPORT_SYMBOL vmlinux 0x994f9e2c	jbd2_journal_unlock_updates
+EXPORT_SYMBOL vmlinux 0x996832e8	kthread_bind
+EXPORT_SYMBOL vmlinux 0x998f8721	pci_get_subsys
+EXPORT_SYMBOL vmlinux 0x9994c0ca	ps2_is_keyboard_id
+EXPORT_SYMBOL vmlinux 0x99959695	kmap_high
+EXPORT_SYMBOL vmlinux 0x999e8297	vfree
+EXPORT_SYMBOL vmlinux 0x99ab8235	dmam_pool_create
+EXPORT_SYMBOL vmlinux 0x99b33464	xfrm_dst_ifdown
+EXPORT_SYMBOL vmlinux 0x99b62f3a	__bio_clone
+EXPORT_SYMBOL vmlinux 0x99bfbe39	get_unused_fd
+EXPORT_SYMBOL vmlinux 0x99c7a8b8	jbd2_dev_to_name
+EXPORT_SYMBOL vmlinux 0x99cdc86b	sysctl_tcp_reordering
+EXPORT_SYMBOL vmlinux 0x99ea12ce	panic_blink
+EXPORT_SYMBOL vmlinux 0x99f358cd	vfs_dq_quota_on_remount
+EXPORT_SYMBOL vmlinux 0x9a1d8d44	vfs_fsync_range
+EXPORT_SYMBOL vmlinux 0x9a1dfd65	strpbrk
+EXPORT_SYMBOL vmlinux 0x9a5cb850	tcp_v4_syn_recv_sock
+EXPORT_SYMBOL vmlinux 0x9a6a83f9	cmos_lock
+EXPORT_SYMBOL vmlinux 0x9a6d9699	dquot_free_space
+EXPORT_SYMBOL vmlinux 0x9a6e75d8	dm_dirty_log_create
+EXPORT_SYMBOL vmlinux 0x9a94d8a1	simple_dir_inode_operations
+EXPORT_SYMBOL vmlinux 0x9a9985be	percpu_counter_destroy
+EXPORT_SYMBOL vmlinux 0x9ab0b81a	pnpbios_protocol
+EXPORT_SYMBOL vmlinux 0x9ac5093c	dquot_reserve_space
+EXPORT_SYMBOL vmlinux 0x9acc6e67	generic_listxattr
+EXPORT_SYMBOL vmlinux 0x9b074241	dmam_free_noncoherent
+EXPORT_SYMBOL vmlinux 0x9b2483c2	blk_end_request_all
+EXPORT_SYMBOL vmlinux 0x9b388444	get_zeroed_page
+EXPORT_SYMBOL vmlinux 0x9b4530f5	scsi_is_sdev_device
+EXPORT_SYMBOL vmlinux 0x9b4de8eb	idr_replace
+EXPORT_SYMBOL vmlinux 0x9b6eb137	ksize
+EXPORT_SYMBOL vmlinux 0x9b86eadf	simple_transaction_read
+EXPORT_SYMBOL vmlinux 0x9b8aafc6	pcie_set_readrq
+EXPORT_SYMBOL vmlinux 0x9b9c5b5a	find_or_create_page
+EXPORT_SYMBOL vmlinux 0x9ba7089d	argv_split
+EXPORT_SYMBOL vmlinux 0x9bbc656f	sock_i_ino
+EXPORT_SYMBOL vmlinux 0x9bd73e3a	ps2_handle_ack
+EXPORT_SYMBOL vmlinux 0x9bfbe543	scsi_rescan_device
+EXPORT_SYMBOL vmlinux 0x9c012508	fb_parse_edid
+EXPORT_SYMBOL vmlinux 0x9c12c373	inet6_del_protocol
+EXPORT_SYMBOL vmlinux 0x9c2c944a	__copy_from_user_ll_nocache_nozero
+EXPORT_SYMBOL vmlinux 0x9c491f60	sg_alloc_table
+EXPORT_SYMBOL vmlinux 0x9c55519d	try_to_release_page
+EXPORT_SYMBOL vmlinux 0x9c5c9e73	pci_bus_size_bridges
+EXPORT_SYMBOL vmlinux 0x9c7077bd	enable_hlt
+EXPORT_SYMBOL vmlinux 0x9c71e738	per_cpu__vm_event_states
+EXPORT_SYMBOL vmlinux 0x9c720303	journal_unlock_updates
+EXPORT_SYMBOL vmlinux 0x9c865da9	dev_unicast_delete
+EXPORT_SYMBOL vmlinux 0x9c8b3c2f	splice_direct_to_actor
+EXPORT_SYMBOL vmlinux 0x9cb96e92	qdisc_put_rtab
+EXPORT_SYMBOL vmlinux 0x9ccb2622	finish_wait
+EXPORT_SYMBOL vmlinux 0x9ceb163c	memcpy_toiovec
+EXPORT_SYMBOL vmlinux 0x9ced38aa	down_trylock
+EXPORT_SYMBOL vmlinux 0x9cfd56c5	scsi_print_status
+EXPORT_SYMBOL vmlinux 0x9d1bd0f8	get_sb_nodev
+EXPORT_SYMBOL vmlinux 0x9d209431	i2c_smbus_read_block_data
+EXPORT_SYMBOL vmlinux 0x9d2a956f	textsearch_register
+EXPORT_SYMBOL vmlinux 0x9d33ef5e	acpi_enable
+EXPORT_SYMBOL vmlinux 0x9d396057	tcp_proc_register
+EXPORT_SYMBOL vmlinux 0x9d3aa376	blk_iopoll_init
+EXPORT_SYMBOL vmlinux 0x9d44ab3a	set_disk_ro
+EXPORT_SYMBOL vmlinux 0x9d5eff0e	simple_statfs
+EXPORT_SYMBOL vmlinux 0x9dc3a456	dev_get_by_index
+EXPORT_SYMBOL vmlinux 0x9dc9941a	sock_create_lite
+EXPORT_SYMBOL vmlinux 0x9ddaa710	sock_no_poll
+EXPORT_SYMBOL vmlinux 0x9dfb7e79	tcf_em_unregister
+EXPORT_SYMBOL vmlinux 0x9e2000a7	memcpy_toiovecend
+EXPORT_SYMBOL vmlinux 0x9e363b6b	acpi_disable_gpe
+EXPORT_SYMBOL vmlinux 0x9e4b3747	sg_copy_from_buffer
+EXPORT_SYMBOL vmlinux 0x9e64fbfe	rtc_cmos_read
+EXPORT_SYMBOL vmlinux 0x9e7d6bd0	__udelay
+EXPORT_SYMBOL vmlinux 0x9e9f1714	__bitmap_andnot
+EXPORT_SYMBOL vmlinux 0x9ea0ad49	__sg_free_table
+EXPORT_SYMBOL vmlinux 0x9ebd4c04	adjust_resource
+EXPORT_SYMBOL vmlinux 0x9ed685ee	iov_iter_advance
+EXPORT_SYMBOL vmlinux 0x9eecde16	do_brk
+EXPORT_SYMBOL vmlinux 0x9ef2a7e8	udp_lib_unhash
+EXPORT_SYMBOL vmlinux 0x9f100139	jiffies_to_clock_t
+EXPORT_SYMBOL vmlinux 0x9f283a49	simple_sync_file
+EXPORT_SYMBOL vmlinux 0x9f2bdaac	__bitmap_or
+EXPORT_SYMBOL vmlinux 0x9f2d613e	param_set_bool
+EXPORT_SYMBOL vmlinux 0x9f2e4a0f	dev_open
+EXPORT_SYMBOL vmlinux 0x9f424093	free_user_ns
+EXPORT_SYMBOL vmlinux 0x9f856198	elv_dispatch_add_tail
+EXPORT_SYMBOL vmlinux 0x9f8a64bd	__xfrm_state_destroy
+EXPORT_SYMBOL vmlinux 0x9f92efc4	mmiotrace_printk
+EXPORT_SYMBOL vmlinux 0x9f984513	strrchr
+EXPORT_SYMBOL vmlinux 0x9f9c0988	ht_create_irq
+EXPORT_SYMBOL vmlinux 0x9fa274b4	dq_data_lock
+EXPORT_SYMBOL vmlinux 0x9fb3dd30	memcpy_fromiovec
+EXPORT_SYMBOL vmlinux 0xa03523d5	security_unix_stream_connect
+EXPORT_SYMBOL vmlinux 0xa04751a8	__mutex_init
+EXPORT_SYMBOL vmlinux 0xa04a01bd	qdisc_class_hash_insert
+EXPORT_SYMBOL vmlinux 0xa0525a2c	mca_unregister_driver
+EXPORT_SYMBOL vmlinux 0xa0587e30	kmem_cache_create
+EXPORT_SYMBOL vmlinux 0xa05c03df	mempool_kmalloc
+EXPORT_SYMBOL vmlinux 0xa07c4cba	inet_frag_evictor
+EXPORT_SYMBOL vmlinux 0xa0a1481a	__ip_select_ident
+EXPORT_SYMBOL vmlinux 0xa0a4ac21	tcf_hash_insert
+EXPORT_SYMBOL vmlinux 0xa0b04675	vmalloc_32
+EXPORT_SYMBOL vmlinux 0xa0b34a20	invalidate_bdev
+EXPORT_SYMBOL vmlinux 0xa0ceef51	out_of_line_wait_on_bit
+EXPORT_SYMBOL vmlinux 0xa0e87b85	uart_unregister_driver
+EXPORT_SYMBOL vmlinux 0xa0fbac79	wake_up_bit
+EXPORT_SYMBOL vmlinux 0xa108eb4d	sysctl_optmem_max
+EXPORT_SYMBOL vmlinux 0xa120d33c	tty_unregister_ldisc
+EXPORT_SYMBOL vmlinux 0xa128c8c9	unregister_quota_format
+EXPORT_SYMBOL vmlinux 0xa13798f8	printk_ratelimit
+EXPORT_SYMBOL vmlinux 0xa172ab15	bdget
+EXPORT_SYMBOL vmlinux 0xa172bcc5	i2c_smbus_xfer
+EXPORT_SYMBOL vmlinux 0xa172c676	pci_bus_assign_resources
+EXPORT_SYMBOL vmlinux 0xa1788585	phy_start_aneg
+EXPORT_SYMBOL vmlinux 0xa1b759ce	fb_add_videomode
+EXPORT_SYMBOL vmlinux 0xa1c76e0a	_cond_resched
+EXPORT_SYMBOL vmlinux 0xa1ca42b0	mmc_align_data_size
+EXPORT_SYMBOL vmlinux 0xa1d86b8f	pnp_request_card_device
+EXPORT_SYMBOL vmlinux 0xa2030322	d_alloc
+EXPORT_SYMBOL vmlinux 0xa20ce1b8	net_msg_warn
+EXPORT_SYMBOL vmlinux 0xa2125c96	pci_bus_find_capability
+EXPORT_SYMBOL vmlinux 0xa214182f	mpage_writepage
+EXPORT_SYMBOL vmlinux 0xa2542dd8	netlink_kernel_release
+EXPORT_SYMBOL vmlinux 0xa278ed73	skb_copy_and_csum_dev
+EXPORT_SYMBOL vmlinux 0xa27d0c86	slow_work_cancel
+EXPORT_SYMBOL vmlinux 0xa2905c55	tcf_exts_dump
+EXPORT_SYMBOL vmlinux 0xa296e391	user_path_at
+EXPORT_SYMBOL vmlinux 0xa29b1708	tcp_memory_allocated
+EXPORT_SYMBOL vmlinux 0xa2a1e5c9	_write_lock_bh
+EXPORT_SYMBOL vmlinux 0xa2a5fd77	inet_ehash_secret
+EXPORT_SYMBOL vmlinux 0xa2ae9f4c	serio_unregister_port
+EXPORT_SYMBOL vmlinux 0xa2b8a2ba	__init_rwsem
+EXPORT_SYMBOL vmlinux 0xa2e1de19	init_file
+EXPORT_SYMBOL vmlinux 0xa315d121	__locks_copy_lock
+EXPORT_SYMBOL vmlinux 0xa322ec02	dev_kfree_skb_any
+EXPORT_SYMBOL vmlinux 0xa329f07e	register_shrinker
+EXPORT_SYMBOL vmlinux 0xa332cdd1	security_tun_dev_attach
+EXPORT_SYMBOL vmlinux 0xa339a729	sock_setsockopt
+EXPORT_SYMBOL vmlinux 0xa34444bb	tty_register_ldisc
+EXPORT_SYMBOL vmlinux 0xa34c1e25	module_refcount
+EXPORT_SYMBOL vmlinux 0xa34f1ef5	crc32_le
+EXPORT_SYMBOL vmlinux 0xa350a8f8	set_memory_array_uc
+EXPORT_SYMBOL vmlinux 0xa35c1f05	acpi_extract_package
+EXPORT_SYMBOL vmlinux 0xa35d4743	mmc_free_host
+EXPORT_SYMBOL vmlinux 0xa35de80f	ipv4_config
+EXPORT_SYMBOL vmlinux 0xa3737fc0	ndisc_send_skb
+EXPORT_SYMBOL vmlinux 0xa380f284	bdput
+EXPORT_SYMBOL vmlinux 0xa3bbcd80	acpi_set_gpe_type
+EXPORT_SYMBOL vmlinux 0xa3bc3e90	cpu_sysdev_class
+EXPORT_SYMBOL vmlinux 0xa3cd4840	d_splice_alias
+EXPORT_SYMBOL vmlinux 0xa415b384	try_to_del_timer_sync
+EXPORT_SYMBOL vmlinux 0xa41c08d4	dma_release_declared_memory
+EXPORT_SYMBOL vmlinux 0xa428c0bf	ip_setsockopt
+EXPORT_SYMBOL vmlinux 0xa4377d70	filp_close
+EXPORT_SYMBOL vmlinux 0xa43b9539	memcpy_fromiovecend
+EXPORT_SYMBOL vmlinux 0xa43d5ac4	skb_copy_bits
+EXPORT_SYMBOL vmlinux 0xa441cf11	vfs_write
+EXPORT_SYMBOL vmlinux 0xa44ad274	wait_for_completion_interruptible_timeout
+EXPORT_SYMBOL vmlinux 0xa45df4ee	rwsem_down_write_failed
+EXPORT_SYMBOL vmlinux 0xa46c94c0	bh_uptodate_or_lock
+EXPORT_SYMBOL vmlinux 0xa4753325	__set_page_dirty_buffers
+EXPORT_SYMBOL vmlinux 0xa4b3500c	acpi_bus_unregister_driver
+EXPORT_SYMBOL vmlinux 0xa4b94fea	iowrite8_rep
+EXPORT_SYMBOL vmlinux 0xa4d9e6c2	key_payload_reserve
+EXPORT_SYMBOL vmlinux 0xa4f9b7b3	inet6_register_protosw
+EXPORT_SYMBOL vmlinux 0xa4fe23e4	__secpath_destroy
+EXPORT_SYMBOL vmlinux 0xa51cdfe8	__FIXADDR_TOP
+EXPORT_SYMBOL vmlinux 0xa5699e63	dm_table_get_mode
+EXPORT_SYMBOL vmlinux 0xa56f1315	mempool_free
+EXPORT_SYMBOL vmlinux 0xa575179c	vfs_quota_disable
+EXPORT_SYMBOL vmlinux 0xa5808bbf	tasklet_init
+EXPORT_SYMBOL vmlinux 0xa58b6804	nla_parse
+EXPORT_SYMBOL vmlinux 0xa591199d	mca_device_transform_ioport
+EXPORT_SYMBOL vmlinux 0xa5922bb1	kfifo_init
+EXPORT_SYMBOL vmlinux 0xa598e29c	vesa_modes
+EXPORT_SYMBOL vmlinux 0xa59d7d26	skb_copy_and_csum_datagram_iovec
+EXPORT_SYMBOL vmlinux 0xa5bbb17e	proc_dointvec_userhz_jiffies
+EXPORT_SYMBOL vmlinux 0xa5da0abd	acpi_enter_sleep_state_s4bios
+EXPORT_SYMBOL vmlinux 0xa5de4e0c	nla_append
+EXPORT_SYMBOL vmlinux 0xa63d85ab	slhc_remember
+EXPORT_SYMBOL vmlinux 0xa65ad351	handle_sysrq
+EXPORT_SYMBOL vmlinux 0xa669a03d	tcf_exts_change
+EXPORT_SYMBOL vmlinux 0xa68124fa	hweight8
+EXPORT_SYMBOL vmlinux 0xa681fe88	generate_random_uuid
+EXPORT_SYMBOL vmlinux 0xa6d3d2ed	simple_empty
+EXPORT_SYMBOL vmlinux 0xa6d70338	i2c_smbus_write_i2c_block_data
+EXPORT_SYMBOL vmlinux 0xa6dcc773	rb_insert_color
+EXPORT_SYMBOL vmlinux 0xa7019e91	generic_shutdown_super
+EXPORT_SYMBOL vmlinux 0xa7046549	vprintk
+EXPORT_SYMBOL vmlinux 0xa70bfb53	sock_no_shutdown
+EXPORT_SYMBOL vmlinux 0xa70fabbe	release_evntsel_nmi
+EXPORT_SYMBOL vmlinux 0xa71e7463	__first_cpu
+EXPORT_SYMBOL vmlinux 0xa7225d3f	pci_target_state
+EXPORT_SYMBOL vmlinux 0xa72d9666	__neigh_event_send
+EXPORT_SYMBOL vmlinux 0xa73211a2	ip_route_input
+EXPORT_SYMBOL vmlinux 0xa751f9ed	mdio_bus_type
+EXPORT_SYMBOL vmlinux 0xa77d5588	sock_rfree
+EXPORT_SYMBOL vmlinux 0xa7a14f53	is_container_init
+EXPORT_SYMBOL vmlinux 0xa7a1f7f8	scsi_allocate_command
+EXPORT_SYMBOL vmlinux 0xa7c8109a	__insert_inode_hash
+EXPORT_SYMBOL vmlinux 0xa822cd95	netlink_dump_start
+EXPORT_SYMBOL vmlinux 0xa82a3692	rfkill_register
+EXPORT_SYMBOL vmlinux 0xa82bb751	tty_port_lower_dtr_rts
+EXPORT_SYMBOL vmlinux 0xa82e7883	keyring_search
+EXPORT_SYMBOL vmlinux 0xa85caaf9	pci_dev_driver
+EXPORT_SYMBOL vmlinux 0xa85d9bb1	in6_dev_finish_destroy
+EXPORT_SYMBOL vmlinux 0xa89acbb3	acpi_evaluate_reference
+EXPORT_SYMBOL vmlinux 0xa8a6f639	__check_region
+EXPORT_SYMBOL vmlinux 0xa8b1194b	__register_chrdev
+EXPORT_SYMBOL vmlinux 0xa8c8d654	skb_recv_datagram
+EXPORT_SYMBOL vmlinux 0xa8d22a7d	set_security_override_from_ctx
+EXPORT_SYMBOL vmlinux 0xa8d68abd	acpi_warning
+EXPORT_SYMBOL vmlinux 0xa8e0d11f	pci_scan_bridge
+EXPORT_SYMBOL vmlinux 0xa8f1f1c1	__sk_mem_schedule
+EXPORT_SYMBOL vmlinux 0xa8fef7bb	security_unix_may_send
+EXPORT_SYMBOL vmlinux 0xa9142081	ethtool_op_get_link
+EXPORT_SYMBOL vmlinux 0xa91b5561	acpi_video_backlight_support
+EXPORT_SYMBOL vmlinux 0xa91e3e23	arch_acpi_processor_cleanup_pdc
+EXPORT_SYMBOL vmlinux 0xa933bada	d_alloc_name
+EXPORT_SYMBOL vmlinux 0xa93827e4	arp_send
+EXPORT_SYMBOL vmlinux 0xa9ab10a5	blk_queue_stack_limits
+EXPORT_SYMBOL vmlinux 0xa9b053bd	backlight_device_register
+EXPORT_SYMBOL vmlinux 0xa9c677fe	set_pages_nx
+EXPORT_SYMBOL vmlinux 0xa9fcf31d	wait_for_completion_interruptible
+EXPORT_SYMBOL vmlinux 0xaa15d02e	mmc_unregister_driver
+EXPORT_SYMBOL vmlinux 0xaa1f1cdf	neigh_table_init
+EXPORT_SYMBOL vmlinux 0xaa2a8e48	mmc_register_driver
+EXPORT_SYMBOL vmlinux 0xaa3e5628	dquot_commit
+EXPORT_SYMBOL vmlinux 0xaa631506	simple_transaction_release
+EXPORT_SYMBOL vmlinux 0xaa84a8ae	acpi_processor_power_init_bm_check
+EXPORT_SYMBOL vmlinux 0xaa9e7446	key_type_keyring
+EXPORT_SYMBOL vmlinux 0xaab06af8	_write_lock_irqsave
+EXPORT_SYMBOL vmlinux 0xaabe9937	neigh_parms_release
+EXPORT_SYMBOL vmlinux 0xaad6d7e1	dev_getbyhwaddr
+EXPORT_SYMBOL vmlinux 0xaae8ab0e	acpi_bus_power_manageable
+EXPORT_SYMBOL vmlinux 0xaaebe34f	mca_write_pos
+EXPORT_SYMBOL vmlinux 0xaaf45875	acpi_lid_notifier_unregister
+EXPORT_SYMBOL vmlinux 0xaafdc258	strcasecmp
+EXPORT_SYMBOL vmlinux 0xab09039f	tty_devnum
+EXPORT_SYMBOL vmlinux 0xab600421	probe_irq_off
+EXPORT_SYMBOL vmlinux 0xab65ed80	set_memory_uc
+EXPORT_SYMBOL vmlinux 0xab73fcf6	tty_port_tty_get
+EXPORT_SYMBOL vmlinux 0xab770678	rdmsr_safe_regs_on_cpu
+EXPORT_SYMBOL vmlinux 0xaba66cde	jbd2_journal_clear_features
+EXPORT_SYMBOL vmlinux 0xaba9ff34	allocate_resource
+EXPORT_SYMBOL vmlinux 0xabb09610	poll_initwait
+EXPORT_SYMBOL vmlinux 0xabb9406d	cpufreq_global_kobject
+EXPORT_SYMBOL vmlinux 0xabd0c91c	rtc_time_to_tm
+EXPORT_SYMBOL vmlinux 0xabf3af17	request_key_async
+EXPORT_SYMBOL vmlinux 0xabf7a847	slow_work_unregister_user
+EXPORT_SYMBOL vmlinux 0xac0ba8c1	blk_iopoll_disable
+EXPORT_SYMBOL vmlinux 0xac57fa34	console_stop
+EXPORT_SYMBOL vmlinux 0xac58ea5e	acpi_unload_table_id
+EXPORT_SYMBOL vmlinux 0xac5ee7cf	bio_kmalloc
+EXPORT_SYMBOL vmlinux 0xac6855b0	gen_kill_estimator
+EXPORT_SYMBOL vmlinux 0xac753aa1	neigh_ifdown
+EXPORT_SYMBOL vmlinux 0xac930809	generic_permission
+EXPORT_SYMBOL vmlinux 0xac9a3b0c	free_netdev
+EXPORT_SYMBOL vmlinux 0xaccabc6a	in4_pton
+EXPORT_SYMBOL vmlinux 0xaccb132f	acpi_lock_battery_dir
+EXPORT_SYMBOL vmlinux 0xacce32d8	vfs_read
+EXPORT_SYMBOL vmlinux 0xacdeb154	__tracepoint_module_get
+EXPORT_SYMBOL vmlinux 0xacf4d843	match_strdup
+EXPORT_SYMBOL vmlinux 0xad0413d4	match_hex
+EXPORT_SYMBOL vmlinux 0xad068dee	xfrm_bundle_ok
+EXPORT_SYMBOL vmlinux 0xad07fe39	path_lookup
+EXPORT_SYMBOL vmlinux 0xad13c689	acpi_os_execute
+EXPORT_SYMBOL vmlinux 0xad23ded8	block_write_full_page_endio
+EXPORT_SYMBOL vmlinux 0xad4ca104	bitmap_startwrite
+EXPORT_SYMBOL vmlinux 0xad57ae36	jbd2_journal_init_jbd_inode
+EXPORT_SYMBOL vmlinux 0xad64d133	mark_buffer_dirty
+EXPORT_SYMBOL vmlinux 0xad68eda5	eisa_driver_unregister
+EXPORT_SYMBOL vmlinux 0xad6a2ac8	netdev_class_create_file
+EXPORT_SYMBOL vmlinux 0xad6e5da1	fb_pan_display
+EXPORT_SYMBOL vmlinux 0xad79c9f1	inet_unregister_protosw
+EXPORT_SYMBOL vmlinux 0xad81cae6	gnet_stats_copy_rate_est
+EXPORT_SYMBOL vmlinux 0xad9ddcd7	acpi_root_dir
+EXPORT_SYMBOL vmlinux 0xadaa2657	cpufreq_register_notifier
+EXPORT_SYMBOL vmlinux 0xadbd9d6a	tty_unregister_device
+EXPORT_SYMBOL vmlinux 0xaddc4adf	security_inode_getsecctx
+EXPORT_SYMBOL vmlinux 0xaddeaef4	journal_check_used_features
+EXPORT_SYMBOL vmlinux 0xae1d15c8	pci_scan_bus_parented
+EXPORT_SYMBOL vmlinux 0xae6ae534	dev_add_pack
+EXPORT_SYMBOL vmlinux 0xae6b8eff	init_task
+EXPORT_SYMBOL vmlinux 0xae75c443	llc_sap_find
+EXPORT_SYMBOL vmlinux 0xae75f004	ida_destroy
+EXPORT_SYMBOL vmlinux 0xae7dd2a2	__invalidate_device
+EXPORT_SYMBOL vmlinux 0xae8c2827	devm_ioremap_nocache
+EXPORT_SYMBOL vmlinux 0xae923935	blk_stop_queue
+EXPORT_SYMBOL vmlinux 0xae993973	bioset_integrity_free
+EXPORT_SYMBOL vmlinux 0xaec655c7	alloc_pages_exact
+EXPORT_SYMBOL vmlinux 0xaed013b9	posix_acl_valid
+EXPORT_SYMBOL vmlinux 0xaed688d9	pci_bus_write_config_byte
+EXPORT_SYMBOL vmlinux 0xaefb2c14	follow_pfn
+EXPORT_SYMBOL vmlinux 0xaefff6e0	deactivate_super
+EXPORT_SYMBOL vmlinux 0xaf0b8781	bio_integrity_advance
+EXPORT_SYMBOL vmlinux 0xaf0b984e	free_mdio_bitbang
+EXPORT_SYMBOL vmlinux 0xaf186e56	fb_get_buffer_offset
+EXPORT_SYMBOL vmlinux 0xaf2d7f87	blk_end_request
+EXPORT_SYMBOL vmlinux 0xaf3dd7dc	scsi_logging_level
+EXPORT_SYMBOL vmlinux 0xaf4b1540	acpi_get_irq_routing_table
+EXPORT_SYMBOL vmlinux 0xaf57e11e	textsearch_destroy
+EXPORT_SYMBOL vmlinux 0xafb65c26	vfs_get_dqblk
+EXPORT_SYMBOL vmlinux 0xafdfe1bf	simple_dir_operations
+EXPORT_SYMBOL vmlinux 0xafe36015	mca_device_read_stored_pos
+EXPORT_SYMBOL vmlinux 0xb03ab2c0	fb_is_primary_device
+EXPORT_SYMBOL vmlinux 0xb04730bf	netif_carrier_off
+EXPORT_SYMBOL vmlinux 0xb0506f4b	fb_blank
+EXPORT_SYMBOL vmlinux 0xb06d95d7	kmem_cache_alloc
+EXPORT_SYMBOL vmlinux 0xb077ef32	acpi_enter_sleep_state
+EXPORT_SYMBOL vmlinux 0xb07c2dfe	xfrm_alloc_spi
+EXPORT_SYMBOL vmlinux 0xb07dfb3d	acpi_remove_gpe_handler
+EXPORT_SYMBOL vmlinux 0xb08c5f19	pci_assign_resource
+EXPORT_SYMBOL vmlinux 0xb08f76ad	gen_pool_free
+EXPORT_SYMBOL vmlinux 0xb0b291b7	tty_port_alloc_xmit_buf
+EXPORT_SYMBOL vmlinux 0xb0b847ac	__bitmap_full
+EXPORT_SYMBOL vmlinux 0xb0d90077	vfs_create
+EXPORT_SYMBOL vmlinux 0xb0dec233	skb_dma_map
+EXPORT_SYMBOL vmlinux 0xb0e10781	get_option
+EXPORT_SYMBOL vmlinux 0xb121390a	probe_irq_on
+EXPORT_SYMBOL vmlinux 0xb128548b	bd_claim
+EXPORT_SYMBOL vmlinux 0xb1645a2e	sg_free_table
+EXPORT_SYMBOL vmlinux 0xb16afd45	phy_register_fixup_for_uid
+EXPORT_SYMBOL vmlinux 0xb1846542	may_umount_tree
+EXPORT_SYMBOL vmlinux 0xb18a1ade	dev_addr_add_multiple
+EXPORT_SYMBOL vmlinux 0xb18d0b74	scsi_host_put
+EXPORT_SYMBOL vmlinux 0xb19760c3	bitmap_onto
+EXPORT_SYMBOL vmlinux 0xb1a8729c	sock_recvmsg
+EXPORT_SYMBOL vmlinux 0xb1ac9283	elv_rb_del
+EXPORT_SYMBOL vmlinux 0xb1c3a01a	oops_in_progress
+EXPORT_SYMBOL vmlinux 0xb1cd8fa5	path_get
+EXPORT_SYMBOL vmlinux 0xb1cfad22	rdmsr_on_cpu
+EXPORT_SYMBOL vmlinux 0xb1f1960e	log_wait_commit
+EXPORT_SYMBOL vmlinux 0xb1f975aa	unlock_kernel
+EXPORT_SYMBOL vmlinux 0xb215c732	dump_trace
+EXPORT_SYMBOL vmlinux 0xb219d56c	wbinvd_on_cpu
+EXPORT_SYMBOL vmlinux 0xb224fbe2	param_get_short
+EXPORT_SYMBOL vmlinux 0xb2253c28	__put_cred
+EXPORT_SYMBOL vmlinux 0xb22fe6a3	netdev_increment_features
+EXPORT_SYMBOL vmlinux 0xb23807ab	filemap_write_and_wait
+EXPORT_SYMBOL vmlinux 0xb254fb21	create_mnt_ns
+EXPORT_SYMBOL vmlinux 0xb2600bcb	security_sb_set_mnt_opts
+EXPORT_SYMBOL vmlinux 0xb2629b7a	security_inode_readlink
+EXPORT_SYMBOL vmlinux 0xb2682405	utf8_to_utf32
+EXPORT_SYMBOL vmlinux 0xb272fd2a	proc_dointvec_jiffies
+EXPORT_SYMBOL vmlinux 0xb27510ef	atomic64_inc_return
+EXPORT_SYMBOL vmlinux 0xb279da12	pv_lock_ops
+EXPORT_SYMBOL vmlinux 0xb27f206a	vfs_quota_on_mount
+EXPORT_SYMBOL vmlinux 0xb2955d74	dev_get_drvdata
+EXPORT_SYMBOL vmlinux 0xb29971a5	neigh_compat_output
+EXPORT_SYMBOL vmlinux 0xb29bc8bd	idr_remove
+EXPORT_SYMBOL vmlinux 0xb2af5392	acpi_device_hid
+EXPORT_SYMBOL vmlinux 0xb2c33749	pci_restore_state
+EXPORT_SYMBOL vmlinux 0xb2d6b769	pci_reenable_device
+EXPORT_SYMBOL vmlinux 0xb2d7f781	____pagevec_lru_add
+EXPORT_SYMBOL vmlinux 0xb2ecd490	pci_pme_capable
+EXPORT_SYMBOL vmlinux 0xb2efb6be	mca_read_stored_pos
+EXPORT_SYMBOL vmlinux 0xb2fd5ceb	__put_user_4
+EXPORT_SYMBOL vmlinux 0xb30abf8d	idr_get_new_above
+EXPORT_SYMBOL vmlinux 0xb3194089	pci_do_scan_bus
+EXPORT_SYMBOL vmlinux 0xb3205415	wait_for_completion_killable
+EXPORT_SYMBOL vmlinux 0xb3206da5	dmam_pool_destroy
+EXPORT_SYMBOL vmlinux 0xb324ce9a	input_filter_device
+EXPORT_SYMBOL vmlinux 0xb32554ef	ps2_cmd_aborted
+EXPORT_SYMBOL vmlinux 0xb3284531	acpi_dbg_layer
+EXPORT_SYMBOL vmlinux 0xb34d4c2e	acpi_terminate
+EXPORT_SYMBOL vmlinux 0xb34ea0e7	do_splice_to
+EXPORT_SYMBOL vmlinux 0xb352177e	find_first_bit
+EXPORT_SYMBOL vmlinux 0xb376d79d	radix_tree_tagged
+EXPORT_SYMBOL vmlinux 0xb37fb214	redirty_page_for_writepage
+EXPORT_SYMBOL vmlinux 0xb382de5c	scsi_prep_fn
+EXPORT_SYMBOL vmlinux 0xb3834015	dev_set_allmulti
+EXPORT_SYMBOL vmlinux 0xb38e6985	skb_trim
+EXPORT_SYMBOL vmlinux 0xb3994c7a	per_cpu__kstat
+EXPORT_SYMBOL vmlinux 0xb3a307c6	si_meminfo
+EXPORT_SYMBOL vmlinux 0xb3c42c94	per_cpu__x86_bios_cpu_apicid
+EXPORT_SYMBOL vmlinux 0xb3cb4baa	inet6_getname
+EXPORT_SYMBOL vmlinux 0xb3dad999	udp_lib_setsockopt
+EXPORT_SYMBOL vmlinux 0xb3e0590d	acpi_set_current_resources
+EXPORT_SYMBOL vmlinux 0xb3e6f7e9	proc_net_netfilter
+EXPORT_SYMBOL vmlinux 0xb423dba1	console_blanked
+EXPORT_SYMBOL vmlinux 0xb42453d3	param_get_invbool
+EXPORT_SYMBOL vmlinux 0xb4279ab7	downgrade_write
+EXPORT_SYMBOL vmlinux 0xb4390f9a	mcount
+EXPORT_SYMBOL vmlinux 0xb449735a	security_d_instantiate
+EXPORT_SYMBOL vmlinux 0xb4527407	jbd2_journal_ack_err
+EXPORT_SYMBOL vmlinux 0xb45578b8	memscan
+EXPORT_SYMBOL vmlinux 0xb45b24f6	k8_nb_ids
+EXPORT_SYMBOL vmlinux 0xb46d50eb	mutex_lock_killable
+EXPORT_SYMBOL vmlinux 0xb4709322	scsi_dev_info_add_list
+EXPORT_SYMBOL vmlinux 0xb4835530	journal_set_features
+EXPORT_SYMBOL vmlinux 0xb4b0ee4e	down_read
+EXPORT_SYMBOL vmlinux 0xb4be2259	sget
+EXPORT_SYMBOL vmlinux 0xb4c2205e	kmalloc_caches
+EXPORT_SYMBOL vmlinux 0xb4c86ef0	revalidate_disk
+EXPORT_SYMBOL vmlinux 0xb4ca9447	__kfifo_get
+EXPORT_SYMBOL vmlinux 0xb5044271	vsscanf
+EXPORT_SYMBOL vmlinux 0xb51b175e	dev_set_mtu
+EXPORT_SYMBOL vmlinux 0xb51bdc26	skb_dma_unmap
+EXPORT_SYMBOL vmlinux 0xb52153a4	i2c_transfer
+EXPORT_SYMBOL vmlinux 0xb5265543	journal_destroy
+EXPORT_SYMBOL vmlinux 0xb53cf127	sock_no_sendmsg
+EXPORT_SYMBOL vmlinux 0xb5418861	atomic64_add
+EXPORT_SYMBOL vmlinux 0xb54533f7	usecs_to_jiffies
+EXPORT_SYMBOL vmlinux 0xb54b5040	rfkill_set_sw_state
+EXPORT_SYMBOL vmlinux 0xb56483df	pci_set_consistent_dma_mask
+EXPORT_SYMBOL vmlinux 0xb56b0925	inet_select_addr
+EXPORT_SYMBOL vmlinux 0xb5a459dc	unregister_blkdev
+EXPORT_SYMBOL vmlinux 0xb5ca1c46	slhc_free
+EXPORT_SYMBOL vmlinux 0xb5ce598d	tcp_v4_conn_request
+EXPORT_SYMBOL vmlinux 0xb5d52c27	ec_transaction
+EXPORT_SYMBOL vmlinux 0xb5ed4d68	scm_fp_dup
+EXPORT_SYMBOL vmlinux 0xb6244511	sg_init_one
+EXPORT_SYMBOL vmlinux 0xb6353555	per_cpu__x86_cpu_to_apicid
+EXPORT_SYMBOL vmlinux 0xb649d17a	tcp_splice_read
+EXPORT_SYMBOL vmlinux 0xb678366f	int_sqrt
+EXPORT_SYMBOL vmlinux 0xb680cf3e	inet6_bind
+EXPORT_SYMBOL vmlinux 0xb6896671	crc_t10dif
+EXPORT_SYMBOL vmlinux 0xb6a42259	ipv6_chk_prefix
+EXPORT_SYMBOL vmlinux 0xb6a61a86	qdisc_get_rtab
+EXPORT_SYMBOL vmlinux 0xb6a68816	find_last_bit
+EXPORT_SYMBOL vmlinux 0xb6a6d617	phy_ethtool_sset
+EXPORT_SYMBOL vmlinux 0xb6a8097f	mutex_unlock
+EXPORT_SYMBOL vmlinux 0xb6b2f3b6	dm_table_event
+EXPORT_SYMBOL vmlinux 0xb6bffb99	kstat_irqs_cpu
+EXPORT_SYMBOL vmlinux 0xb6c5a973	scsi_show_result
+EXPORT_SYMBOL vmlinux 0xb6deb5e9	napi_get_frags
+EXPORT_SYMBOL vmlinux 0xb6e04b8b	netlink_broadcast
+EXPORT_SYMBOL vmlinux 0xb6e227aa	rtc_lock
+EXPORT_SYMBOL vmlinux 0xb6ed1e53	strncpy
+EXPORT_SYMBOL vmlinux 0xb6ef9a9e	tty_register_driver
+EXPORT_SYMBOL vmlinux 0xb6f4eed1	ethtool_op_set_ufo
+EXPORT_SYMBOL vmlinux 0xb714b0d6	blk_init_queue
+EXPORT_SYMBOL vmlinux 0xb71deda1	xfrm_policy_walk
+EXPORT_SYMBOL vmlinux 0xb72397d5	printk
+EXPORT_SYMBOL vmlinux 0xb74a704b	journal_stop
+EXPORT_SYMBOL vmlinux 0xb7536188	pci_prepare_to_sleep
+EXPORT_SYMBOL vmlinux 0xb758b225	acpi_disable_event
+EXPORT_SYMBOL vmlinux 0xb75e3206	pci_write_vpd
+EXPORT_SYMBOL vmlinux 0xb75fe237	kthread_stop
+EXPORT_SYMBOL vmlinux 0xb78f014f	phy_disconnect
+EXPORT_SYMBOL vmlinux 0xb798b8e4	flow_cache_lookup
+EXPORT_SYMBOL vmlinux 0xb799dc7e	simple_set_mnt
+EXPORT_SYMBOL vmlinux 0xb79a5ca8	find_get_pages_tag
+EXPORT_SYMBOL vmlinux 0xb7a263f1	tcf_em_tree_validate
+EXPORT_SYMBOL vmlinux 0xb7a29a85	nf_log_bind_pf
+EXPORT_SYMBOL vmlinux 0xb7b61546	crc32_be
+EXPORT_SYMBOL vmlinux 0xb7ccb3c7	twl4030_i2c_read_u8
+EXPORT_SYMBOL vmlinux 0xb7e8e09a	skb_copy_and_csum_bits
+EXPORT_SYMBOL vmlinux 0xb80c33f9	del_gendisk
+EXPORT_SYMBOL vmlinux 0xb8138585	key_link
+EXPORT_SYMBOL vmlinux 0xb813ce5a	timecompare_transform
+EXPORT_SYMBOL vmlinux 0xb82b742a	cdrom_ioctl
+EXPORT_SYMBOL vmlinux 0xb82f2acb	__mmc_claim_host
+EXPORT_SYMBOL vmlinux 0xb84ed32f	proc_doulongvec_minmax
+EXPORT_SYMBOL vmlinux 0xb85618b8	netif_receive_skb
+EXPORT_SYMBOL vmlinux 0xb86e4ab9	random32
+EXPORT_SYMBOL vmlinux 0xb89af9bf	srandom32
+EXPORT_SYMBOL vmlinux 0xb8d0d414	cfb_copyarea
+EXPORT_SYMBOL vmlinux 0xb8e7ce2c	__put_user_8
+EXPORT_SYMBOL vmlinux 0xb9045f92	spi_display_xfer_agreement
+EXPORT_SYMBOL vmlinux 0xb9255aa6	linkwatch_fire_event
+EXPORT_SYMBOL vmlinux 0xb9292f9e	register_tcf_proto_ops
+EXPORT_SYMBOL vmlinux 0xb938a315	ether_setup
+EXPORT_SYMBOL vmlinux 0xb942b513	smp_call_function_many
+EXPORT_SYMBOL vmlinux 0xb9441a4e	phy_driver_unregister
+EXPORT_SYMBOL vmlinux 0xb9464c5c	bio_integrity_get_tag
+EXPORT_SYMBOL vmlinux 0xb98a0185	rtc_tm_to_time
+EXPORT_SYMBOL vmlinux 0xb98ef804	vm_stat
+EXPORT_SYMBOL vmlinux 0xb9933423	jbd2_journal_file_inode
+EXPORT_SYMBOL vmlinux 0xb9947b79	jbd2_journal_stop
+EXPORT_SYMBOL vmlinux 0xb9aaf8fc	grab_cache_page_nowait
+EXPORT_SYMBOL vmlinux 0xb9dda7cc	ll_rw_block
+EXPORT_SYMBOL vmlinux 0xb9fd2205	add_efi_memmap
+EXPORT_SYMBOL vmlinux 0xba21b830	key_validate
+EXPORT_SYMBOL vmlinux 0xba22b3b7	kmap_atomic_to_page
+EXPORT_SYMBOL vmlinux 0xba2d8594	ec_read
+EXPORT_SYMBOL vmlinux 0xba3417e1	kmem_ptr_validate
+EXPORT_SYMBOL vmlinux 0xba497f13	loops_per_jiffy
+EXPORT_SYMBOL vmlinux 0xba5ba35a	single_release
+EXPORT_SYMBOL vmlinux 0xba65f3a1	dm_register_target
+EXPORT_SYMBOL vmlinux 0xba739a23	spi_schedule_dv_device
+EXPORT_SYMBOL vmlinux 0xba92e76b	genphy_update_link
+EXPORT_SYMBOL vmlinux 0xbaaab8ae	timespec_to_jiffies
+EXPORT_SYMBOL vmlinux 0xbac01695	bio_pair_release
+EXPORT_SYMBOL vmlinux 0xbadf0c09	__getblk
+EXPORT_SYMBOL vmlinux 0xbb098464	inet_bind
+EXPORT_SYMBOL vmlinux 0xbb167766	fb_var_to_videomode
+EXPORT_SYMBOL vmlinux 0xbb189cad	disallow_signal
+EXPORT_SYMBOL vmlinux 0xbb1a4d2a	journal_force_commit_nested
+EXPORT_SYMBOL vmlinux 0xbb32c867	blkdev_issue_discard
+EXPORT_SYMBOL vmlinux 0xbb379b6f	vm_map_ram
+EXPORT_SYMBOL vmlinux 0xbb4b55a4	dquot_acquire
+EXPORT_SYMBOL vmlinux 0xbb5d343d	xfrm_get_acqseq
+EXPORT_SYMBOL vmlinux 0xbb749b58	skb_append_datato_frags
+EXPORT_SYMBOL vmlinux 0xbb88803e	serio_unregister_driver
+EXPORT_SYMBOL vmlinux 0xbb89de17	ida_init
+EXPORT_SYMBOL vmlinux 0xbbb5a1cc	mb_cache_entry_release
+EXPORT_SYMBOL vmlinux 0xbbd9b13e	cdrom_mode_select
+EXPORT_SYMBOL vmlinux 0xbbead8cd	security_path_truncate
+EXPORT_SYMBOL vmlinux 0xbbef27da	bio_init
+EXPORT_SYMBOL vmlinux 0xbc48a2f3	jbd2_journal_update_format
+EXPORT_SYMBOL vmlinux 0xbc48c3bf	set_blocksize
+EXPORT_SYMBOL vmlinux 0xbc5dd728	alloc_file
+EXPORT_SYMBOL vmlinux 0xbc8c14ee	cap_netlink_recv
+EXPORT_SYMBOL vmlinux 0xbc9fe645	log_start_commit
+EXPORT_SYMBOL vmlinux 0xbca82c25	tcp_md5_hash_key
+EXPORT_SYMBOL vmlinux 0xbcaaa295	ps2_sendbyte
+EXPORT_SYMBOL vmlinux 0xbcc308bb	strnlen_user
+EXPORT_SYMBOL vmlinux 0xbcc5ddab	cdev_init
+EXPORT_SYMBOL vmlinux 0xbcdc3c58	mmc_power_save_host
+EXPORT_SYMBOL vmlinux 0xbcf113f5	simple_write_end
+EXPORT_SYMBOL vmlinux 0xbd0e1ad6	rfkill_get_led_trigger_name
+EXPORT_SYMBOL vmlinux 0xbd263f70	journal_dirty_data
+EXPORT_SYMBOL vmlinux 0xbd539144	find_get_pages_contig
+EXPORT_SYMBOL vmlinux 0xbd65fb24	skb_push
+EXPORT_SYMBOL vmlinux 0xbd7c93e3	vfs_statfs
+EXPORT_SYMBOL vmlinux 0xbd7d13b8	unregister_console
+EXPORT_SYMBOL vmlinux 0xbd9aa16e	pneigh_lookup
+EXPORT_SYMBOL vmlinux 0xbdb50170	seq_putc
+EXPORT_SYMBOL vmlinux 0xbdb6500e	per_cpu__cpu_core_map
+EXPORT_SYMBOL vmlinux 0xbde412fc	nla_reserve
+EXPORT_SYMBOL vmlinux 0xbdf5c25c	rb_next
+EXPORT_SYMBOL vmlinux 0xbe0e5118	nla_memcmp
+EXPORT_SYMBOL vmlinux 0xbe1b0f55	dquot_commit_info
+EXPORT_SYMBOL vmlinux 0xbe48388f	dget_locked
+EXPORT_SYMBOL vmlinux 0xbe4fd622	inode_set_bytes
+EXPORT_SYMBOL vmlinux 0xbe7a89a9	directly_mappable_cdev_bdi
+EXPORT_SYMBOL vmlinux 0xbe905543	do_mmap_pgoff
+EXPORT_SYMBOL vmlinux 0xbe9574d0	vga_set_legacy_decoding
+EXPORT_SYMBOL vmlinux 0xbe983db8	pid_task
+EXPORT_SYMBOL vmlinux 0xbec34cbd	blk_queue_bounce
+EXPORT_SYMBOL vmlinux 0xbed114a1	seq_read
+EXPORT_SYMBOL vmlinux 0xbed2d4e4	scsi_is_host_device
+EXPORT_SYMBOL vmlinux 0xbee080b0	scsi_calculate_bounce_limit
+EXPORT_SYMBOL vmlinux 0xbef43296	console_conditional_schedule
+EXPORT_SYMBOL vmlinux 0xbf06020d	register_snap_client
+EXPORT_SYMBOL vmlinux 0xbf255a7f	mca_device_write_pos
+EXPORT_SYMBOL vmlinux 0xbf6b553c	iw_handler_set_thrspy
+EXPORT_SYMBOL vmlinux 0xbf7fd2f5	schedule_timeout_killable
+EXPORT_SYMBOL vmlinux 0xbf806f08	mmc_card_sleep
+EXPORT_SYMBOL vmlinux 0xbf8b39e9	isapnp_present
+EXPORT_SYMBOL vmlinux 0xbf9bcc8d	__cap_empty_set
+EXPORT_SYMBOL vmlinux 0xbfb95e03	skb_kill_datagram
+EXPORT_SYMBOL vmlinux 0xbfbc9232	find_vma
+EXPORT_SYMBOL vmlinux 0xbfc177bc	iowrite32_rep
+EXPORT_SYMBOL vmlinux 0xbfee3ad5	loop_unregister_transfer
+EXPORT_SYMBOL vmlinux 0xc003c637	__strncpy_from_user
+EXPORT_SYMBOL vmlinux 0xc0044724	blk_set_default_limits
+EXPORT_SYMBOL vmlinux 0xc01411ac	dev_alloc_name
+EXPORT_SYMBOL vmlinux 0xc01eed33	__copy_from_user_ll_nozero
+EXPORT_SYMBOL vmlinux 0xc01f970a	xfrm_input_resume
+EXPORT_SYMBOL vmlinux 0xc021af0a	inet_accept
+EXPORT_SYMBOL vmlinux 0xc024de6c	inet_csk_reset_keepalive_timer
+EXPORT_SYMBOL vmlinux 0xc0265364	tty_port_close_start
+EXPORT_SYMBOL vmlinux 0xc0448266	tcp_v4_connect
+EXPORT_SYMBOL vmlinux 0xc046b645	writeback_inodes_sb
+EXPORT_SYMBOL vmlinux 0xc0580937	rb_erase
+EXPORT_SYMBOL vmlinux 0xc05b27c7	llc_sap_close
+EXPORT_SYMBOL vmlinux 0xc06314a3	bio_integrity_trim
+EXPORT_SYMBOL vmlinux 0xc0890417	truncate_pagecache
+EXPORT_SYMBOL vmlinux 0xc0947459	xfrm_user_policy
+EXPORT_SYMBOL vmlinux 0xc0a3d105	find_next_bit
+EXPORT_SYMBOL vmlinux 0xc0bd6451	mdiobus_unregister
+EXPORT_SYMBOL vmlinux 0xc0bf6ead	timecounter_cyc2time
+EXPORT_SYMBOL vmlinux 0xc0c32e46	jbd2_journal_get_undo_access
+EXPORT_SYMBOL vmlinux 0xc0f65988	machine_real_restart
+EXPORT_SYMBOL vmlinux 0xc1057510	scsi_device_lookup
+EXPORT_SYMBOL vmlinux 0xc114c10c	alloc_hippi_dev
+EXPORT_SYMBOL vmlinux 0xc11d8093	iov_shorten
+EXPORT_SYMBOL vmlinux 0xc1308bcc	set_binfmt
+EXPORT_SYMBOL vmlinux 0xc139a5c5	i8042_check_port_owner
+EXPORT_SYMBOL vmlinux 0xc153203f	jbd2_journal_clear_err
+EXPORT_SYMBOL vmlinux 0xc17bde95	lease_modify
+EXPORT_SYMBOL vmlinux 0xc17da848	splice_from_pipe_begin
+EXPORT_SYMBOL vmlinux 0xc18d82de	set_bh_page
+EXPORT_SYMBOL vmlinux 0xc18dabea	nf_register_sockopt
+EXPORT_SYMBOL vmlinux 0xc19c8163	atomic64_cmpxchg
+EXPORT_SYMBOL vmlinux 0xc1a86128	__neigh_for_each_release
+EXPORT_SYMBOL vmlinux 0xc1b9a1e1	iget_locked
+EXPORT_SYMBOL vmlinux 0xc210231a	xfrm_policy_destroy
+EXPORT_SYMBOL vmlinux 0xc254af48	dcache_lock
+EXPORT_SYMBOL vmlinux 0xc256e762	__bitmap_equal
+EXPORT_SYMBOL vmlinux 0xc2619176	security_inode_init_security
+EXPORT_SYMBOL vmlinux 0xc274e480	remove_proc_entry
+EXPORT_SYMBOL vmlinux 0xc27d06ff	clear_bdi_congested
+EXPORT_SYMBOL vmlinux 0xc280a525	__copy_from_user_ll
+EXPORT_SYMBOL vmlinux 0xc2b2acd4	init_special_inode
+EXPORT_SYMBOL vmlinux 0xc2d711e1	krealloc
+EXPORT_SYMBOL vmlinux 0xc2e587d1	reset_devices
+EXPORT_SYMBOL vmlinux 0xc2f34d40	framebuffer_alloc
+EXPORT_SYMBOL vmlinux 0xc2ffa122	blk_get_backing_dev_info
+EXPORT_SYMBOL vmlinux 0xc30e25be	set_security_override
+EXPORT_SYMBOL vmlinux 0xc30f0fd3	sock_create
+EXPORT_SYMBOL vmlinux 0xc33f6f4c	on_each_cpu
+EXPORT_SYMBOL vmlinux 0xc342a7fc	tcp_rcv_state_process
+EXPORT_SYMBOL vmlinux 0xc371f6e1	check_disk_size_change
+EXPORT_SYMBOL vmlinux 0xc37fcb5c	inode_sub_rsv_space
+EXPORT_SYMBOL vmlinux 0xc38488fb	elv_rb_find
+EXPORT_SYMBOL vmlinux 0xc3a44bde	input_unregister_device
+EXPORT_SYMBOL vmlinux 0xc3a909a9	journal_wipe
+EXPORT_SYMBOL vmlinux 0xc3aaf0a9	__put_user_1
+EXPORT_SYMBOL vmlinux 0xc3cf1128	in_group_p
+EXPORT_SYMBOL vmlinux 0xc3fa6a59	memchr
+EXPORT_SYMBOL vmlinux 0xc402cc99	register_acpi_notifier
+EXPORT_SYMBOL vmlinux 0xc4218289	netif_carrier_on
+EXPORT_SYMBOL vmlinux 0xc42c323c	sb_set_blocksize
+EXPORT_SYMBOL vmlinux 0xc432f0f6	__pagevec_release
+EXPORT_SYMBOL vmlinux 0xc47d8bb1	jbd2_journal_set_features
+EXPORT_SYMBOL vmlinux 0xc48d46fc	cdev_index
+EXPORT_SYMBOL vmlinux 0xc48fbb73	scsi_remove_target
+EXPORT_SYMBOL vmlinux 0xc499ae1e	kstrdup
+EXPORT_SYMBOL vmlinux 0xc4aafa3f	netpoll_send_udp
+EXPORT_SYMBOL vmlinux 0xc4acda8c	udp_flush_pending_frames
+EXPORT_SYMBOL vmlinux 0xc4b13e97	datagram_poll
+EXPORT_SYMBOL vmlinux 0xc4e71917	kick_iocb
+EXPORT_SYMBOL vmlinux 0xc4fd9d19	sock_no_getsockopt
+EXPORT_SYMBOL vmlinux 0xc52f5714	fb_videomode_to_var
+EXPORT_SYMBOL vmlinux 0xc535e5f6	__page_symlink
+EXPORT_SYMBOL vmlinux 0xc5534d64	ioread16
+EXPORT_SYMBOL vmlinux 0xc55f7dc7	_write_trylock
+EXPORT_SYMBOL vmlinux 0xc5636f5b	mark_buffer_dirty_inode
+EXPORT_SYMBOL vmlinux 0xc571569d	dm_kcopyd_client_create
+EXPORT_SYMBOL vmlinux 0xc5b69d97	input_grab_device
+EXPORT_SYMBOL vmlinux 0xc5beaf6b	kernel_sendmsg
+EXPORT_SYMBOL vmlinux 0xc5c515df	neigh_lookup
+EXPORT_SYMBOL vmlinux 0xc61204a3	thermal_zone_device_unregister
+EXPORT_SYMBOL vmlinux 0xc619b699	phy_device_free
+EXPORT_SYMBOL vmlinux 0xc62e597b	call_usermodehelper_setup
+EXPORT_SYMBOL vmlinux 0xc633495b	schedule_work
+EXPORT_SYMBOL vmlinux 0xc6341751	page_address
+EXPORT_SYMBOL vmlinux 0xc64b8442	copy_io_context
+EXPORT_SYMBOL vmlinux 0xc6656836	__seq_open_private
+EXPORT_SYMBOL vmlinux 0xc6946676	inode_add_rsv_space
+EXPORT_SYMBOL vmlinux 0xc6b9275b	pci_set_master
+EXPORT_SYMBOL vmlinux 0xc6b95e41	filemap_write_and_wait_range
+EXPORT_SYMBOL vmlinux 0xc6c59dfe	sock_register
+EXPORT_SYMBOL vmlinux 0xc6e0daeb	read_cache_page_gfp
+EXPORT_SYMBOL vmlinux 0xc6f00eb0	md_wait_for_blocked_rdev
+EXPORT_SYMBOL vmlinux 0xc70da1b2	mpage_readpages
+EXPORT_SYMBOL vmlinux 0xc71607d2	input_unregister_handle
+EXPORT_SYMBOL vmlinux 0xc7208c3a	serial8250_resume_port
+EXPORT_SYMBOL vmlinux 0xc722227e	posix_acl_clone
+EXPORT_SYMBOL vmlinux 0xc723d5b1	generic_file_llseek
+EXPORT_SYMBOL vmlinux 0xc7315b5a	writeback_inodes_sb_if_idle
+EXPORT_SYMBOL vmlinux 0xc73d9891	bmap
+EXPORT_SYMBOL vmlinux 0xc768de19	cpu_all_bits
+EXPORT_SYMBOL vmlinux 0xc794d5d2	dcache_readdir
+EXPORT_SYMBOL vmlinux 0xc79bcd36	dm_vcalloc
+EXPORT_SYMBOL vmlinux 0xc7a4fbed	rtnl_lock
+EXPORT_SYMBOL vmlinux 0xc7d9c5b4	load_nls_default
+EXPORT_SYMBOL vmlinux 0xc7ec6c27	strspn
+EXPORT_SYMBOL vmlinux 0xc7eca4a8	tcp_sendmsg
+EXPORT_SYMBOL vmlinux 0xc7f5d4d2	__nla_reserve
+EXPORT_SYMBOL vmlinux 0xc7ffc670	inet_sendmsg
+EXPORT_SYMBOL vmlinux 0xc80ed66a	phy_device_register
+EXPORT_SYMBOL vmlinux 0xc83f6c9f	sock_kmalloc
+EXPORT_SYMBOL vmlinux 0xc84e4965	call_usermodehelper_freeinfo
+EXPORT_SYMBOL vmlinux 0xc85efdb5	sk_reset_timer
+EXPORT_SYMBOL vmlinux 0xc88544b6	kernel_sock_shutdown
+EXPORT_SYMBOL vmlinux 0xc88906b7	pnp_unregister_driver
+EXPORT_SYMBOL vmlinux 0xc895adc2	default_file_splice_read
+EXPORT_SYMBOL vmlinux 0xc897c382	sg_init_table
+EXPORT_SYMBOL vmlinux 0xc898625d	atomic64_inc_and_test
+EXPORT_SYMBOL vmlinux 0xc8b57c27	autoremove_wake_function
+EXPORT_SYMBOL vmlinux 0xc8ca3e25	acpi_get_child
+EXPORT_SYMBOL vmlinux 0xc8e689ad	blk_queue_max_sectors
+EXPORT_SYMBOL vmlinux 0xc8f471fe	pci_choose_state
+EXPORT_SYMBOL vmlinux 0xc91af01e	blk_integrity_compare
+EXPORT_SYMBOL vmlinux 0xc9312b41	wireless_send_event
+EXPORT_SYMBOL vmlinux 0xc994bdbf	generic_readlink
+EXPORT_SYMBOL vmlinux 0xc998d641	icmp_err_convert
+EXPORT_SYMBOL vmlinux 0xc9ab2eef	acpi_os_wait_events_complete
+EXPORT_SYMBOL vmlinux 0xc9c47f86	jbd2_journal_blocks_per_page
+EXPORT_SYMBOL vmlinux 0xc9c7b448	nf_ip_checksum
+EXPORT_SYMBOL vmlinux 0xc9e025c4	mmc_card_awake
+EXPORT_SYMBOL vmlinux 0xc9e0751f	jbd2_journal_flush
+EXPORT_SYMBOL vmlinux 0xc9ec8704	udp_table
+EXPORT_SYMBOL vmlinux 0xc9f096d0	pci_unregister_driver
+EXPORT_SYMBOL vmlinux 0xca16e994	cdev_alloc
+EXPORT_SYMBOL vmlinux 0xca1f1d2e	vfs_link
+EXPORT_SYMBOL vmlinux 0xca355cf8	md_register_thread
+EXPORT_SYMBOL vmlinux 0xca5378e0	tty_insert_flip_string_flags
+EXPORT_SYMBOL vmlinux 0xca552194	hippi_type_trans
+EXPORT_SYMBOL vmlinux 0xca5711fb	splice_from_pipe_next
+EXPORT_SYMBOL vmlinux 0xca5dbc50	scsi_print_sense_hdr
+EXPORT_SYMBOL vmlinux 0xca66eebf	disk_stack_limits
+EXPORT_SYMBOL vmlinux 0xca897f02	vfs_quota_sync
+EXPORT_SYMBOL vmlinux 0xca8acc78	acpi_dbg_level
+EXPORT_SYMBOL vmlinux 0xcb236ebc	d_obtain_alias
+EXPORT_SYMBOL vmlinux 0xcb2bb36e	bio_copy_user
+EXPORT_SYMBOL vmlinux 0xcb35b51c	__f_setown
+EXPORT_SYMBOL vmlinux 0xcb38a890	__generic_block_fiemap
+EXPORT_SYMBOL vmlinux 0xcb475dab	bio_phys_segments
+EXPORT_SYMBOL vmlinux 0xcb6beb40	hweight32
+EXPORT_SYMBOL vmlinux 0xcb6f015a	lock_rename
+EXPORT_SYMBOL vmlinux 0xcb7131fb	fb_get_options
+EXPORT_SYMBOL vmlinux 0xcb733bf2	acpi_bus_set_power
+EXPORT_SYMBOL vmlinux 0xcbbb1a29	arch_debugfs_dir
+EXPORT_SYMBOL vmlinux 0xcbe22911	alloc_fcdev
+EXPORT_SYMBOL vmlinux 0xcc0177da	key_instantiate_and_link
+EXPORT_SYMBOL vmlinux 0xcc248d26	serial8250_suspend_port
+EXPORT_SYMBOL vmlinux 0xcc2bce9a	neigh_create
+EXPORT_SYMBOL vmlinux 0xcc342327	block_read_full_page
+EXPORT_SYMBOL vmlinux 0xcc36f32e	fb_unregister_client
+EXPORT_SYMBOL vmlinux 0xcc4e173c	xfrm_unregister_mode
+EXPORT_SYMBOL vmlinux 0xcc5005fe	msleep_interruptible
+EXPORT_SYMBOL vmlinux 0xcc51ee50	dma_spin_lock
+EXPORT_SYMBOL vmlinux 0xcc53334f	bio_integrity_split
+EXPORT_SYMBOL vmlinux 0xcc5f723e	pcim_iomap_table
+EXPORT_SYMBOL vmlinux 0xcc7b6027	read_cache_page_async
+EXPORT_SYMBOL vmlinux 0xcc7fa952	local_bh_enable_ip
+EXPORT_SYMBOL vmlinux 0xccd52baa	dma_supported
+EXPORT_SYMBOL vmlinux 0xcced1090	netif_notify_peers
+EXPORT_SYMBOL vmlinux 0xccfd09d1	inet_shutdown
+EXPORT_SYMBOL vmlinux 0xcd19a090	acpi_bus_start
+EXPORT_SYMBOL vmlinux 0xcd3f087a	pci_request_regions_exclusive
+EXPORT_SYMBOL vmlinux 0xcd5e46e3	tty_check_change
+EXPORT_SYMBOL vmlinux 0xcdf87af9	kobject_add
+EXPORT_SYMBOL vmlinux 0xce172a0d	fput
+EXPORT_SYMBOL vmlinux 0xce19bac5	register_inet6addr_notifier
+EXPORT_SYMBOL vmlinux 0xce1edc2d	arp_create
+EXPORT_SYMBOL vmlinux 0xce36ded6	sysctl_tcp_mem
+EXPORT_SYMBOL vmlinux 0xce39ee55	ioctl_by_bdev
+EXPORT_SYMBOL vmlinux 0xce4904a4	acpi_leave_sleep_state
+EXPORT_SYMBOL vmlinux 0xce5ac24f	zlib_inflate_workspacesize
+EXPORT_SYMBOL vmlinux 0xce860141	pci_request_region_exclusive
+EXPORT_SYMBOL vmlinux 0xceaaf85d	inet_listen
+EXPORT_SYMBOL vmlinux 0xcec447e5	poll_schedule_timeout
+EXPORT_SYMBOL vmlinux 0xceceaddd	nf_ct_attach
+EXPORT_SYMBOL vmlinux 0xcee712d4	vlan_dev_real_dev
+EXPORT_SYMBOL vmlinux 0xcee8fec5	dm_kcopyd_client_destroy
+EXPORT_SYMBOL vmlinux 0xceed82ef	netlink_kernel_create
+EXPORT_SYMBOL vmlinux 0xcefcd99a	serial8250_unregister_port
+EXPORT_SYMBOL vmlinux 0xcf0a59d7	scsi_device_set_state
+EXPORT_SYMBOL vmlinux 0xcf1d28ab	acpi_error
+EXPORT_SYMBOL vmlinux 0xcf2e1d53	cdev_del
+EXPORT_SYMBOL vmlinux 0xcf3f0e1a	ip_mc_inc_group
+EXPORT_SYMBOL vmlinux 0xcf5b8c69	tcp4_gro_complete
+EXPORT_SYMBOL vmlinux 0xcf696c16	neigh_parms_alloc
+EXPORT_SYMBOL vmlinux 0xcf697890	md_integrity_add_rdev
+EXPORT_SYMBOL vmlinux 0xcf6cfe1f	msrs_free
+EXPORT_SYMBOL vmlinux 0xcf78a7b4	jbd2_journal_invalidatepage
+EXPORT_SYMBOL vmlinux 0xcf884dc8	xfrm_policy_unregister_afinfo
+EXPORT_SYMBOL vmlinux 0xcfadd723	__percpu_counter_add
+EXPORT_SYMBOL vmlinux 0xcfb2dfec	freeze_bdev
+EXPORT_SYMBOL vmlinux 0xcfb9006e	jiffies_to_timeval
+EXPORT_SYMBOL vmlinux 0xcfe05d4d	register_kmmio_probe
+EXPORT_SYMBOL vmlinux 0xcfeeb0ba	revert_creds
+EXPORT_SYMBOL vmlinux 0xcff53400	kref_put
+EXPORT_SYMBOL vmlinux 0xd0181f4f	__bitmap_xor
+EXPORT_SYMBOL vmlinux 0xd037e855	mca_register_driver
+EXPORT_SYMBOL vmlinux 0xd0584094	d_path
+EXPORT_SYMBOL vmlinux 0xd07ed5cc	i2c_smbus_process_call
+EXPORT_SYMBOL vmlinux 0xd08197fa	acpi_load_tables
+EXPORT_SYMBOL vmlinux 0xd0d8621b	strlen
+EXPORT_SYMBOL vmlinux 0xd0e6f247	cfb_fillrect
+EXPORT_SYMBOL vmlinux 0xd0ee38b8	schedule_timeout_uninterruptible
+EXPORT_SYMBOL vmlinux 0xd0f3c2b4	x86_dma_fallback_dev
+EXPORT_SYMBOL vmlinux 0xd132b283	request_key_with_auxdata
+EXPORT_SYMBOL vmlinux 0xd1394e87	pcie_get_readrq
+EXPORT_SYMBOL vmlinux 0xd1472061	acpi_pci_register_driver
+EXPORT_SYMBOL vmlinux 0xd14d3f96	netdev_class_remove_file
+EXPORT_SYMBOL vmlinux 0xd154b7f2	skb_copy_datagram_iovec
+EXPORT_SYMBOL vmlinux 0xd17ecc22	per_cpu__cpu_sibling_map
+EXPORT_SYMBOL vmlinux 0xd18b6eb2	acpi_unmap_lsapic
+EXPORT_SYMBOL vmlinux 0xd1b82c1e	netlink_unicast
+EXPORT_SYMBOL vmlinux 0xd1bf67a1	xfrm_register_mode
+EXPORT_SYMBOL vmlinux 0xd1e36b52	dev_alloc_skb
+EXPORT_SYMBOL vmlinux 0xd1e890f9	kunmap_atomic
+EXPORT_SYMBOL vmlinux 0xd1f304c4	do_sync_read
+EXPORT_SYMBOL vmlinux 0xd1f6c5f3	smp_num_siblings
+EXPORT_SYMBOL vmlinux 0xd1f91bcd	dev_base_lock
+EXPORT_SYMBOL vmlinux 0xd1fb24d1	sysctl_ms_jiffies
+EXPORT_SYMBOL vmlinux 0xd20d3cca	__lock_page
+EXPORT_SYMBOL vmlinux 0xd22a27b1	vfs_set_dqinfo
+EXPORT_SYMBOL vmlinux 0xd251d7b0	security_socket_getpeersec_dgram
+EXPORT_SYMBOL vmlinux 0xd2555f19	jiffies_64_to_clock_t
+EXPORT_SYMBOL vmlinux 0xd25d4f74	console_blank_hook
+EXPORT_SYMBOL vmlinux 0xd267d42c	down_killable
+EXPORT_SYMBOL vmlinux 0xd2790e5c	blk_plug_device
+EXPORT_SYMBOL vmlinux 0xd27a437c	dquot_initialize
+EXPORT_SYMBOL vmlinux 0xd2965f6f	kthread_should_stop
+EXPORT_SYMBOL vmlinux 0xd29cf1bf	udplite_prot
+EXPORT_SYMBOL vmlinux 0xd2a68761	proc_dointvec_ms_jiffies
+EXPORT_SYMBOL vmlinux 0xd2a75ee0	dmi_first_match
+EXPORT_SYMBOL vmlinux 0xd2ad791f	jbd2_journal_restart
+EXPORT_SYMBOL vmlinux 0xd2db9813	skb_copy
+EXPORT_SYMBOL vmlinux 0xd315e531	tcf_hash_create
+EXPORT_SYMBOL vmlinux 0xd32e52c7	posix_acl_chmod_masq
+EXPORT_SYMBOL vmlinux 0xd34a5a57	phy_detach
+EXPORT_SYMBOL vmlinux 0xd34f0c62	gen_pool_create
+EXPORT_SYMBOL vmlinux 0xd36d9f41	md_set_array_sectors
+EXPORT_SYMBOL vmlinux 0xd36e1afe	vfs_readdir
+EXPORT_SYMBOL vmlinux 0xd391dd4a	skb_insert
+EXPORT_SYMBOL vmlinux 0xd3951da4	acpi_resource_to_address64
+EXPORT_SYMBOL vmlinux 0xd395e252	elevator_exit
+EXPORT_SYMBOL vmlinux 0xd3b934d7	journal_check_available_features
+EXPORT_SYMBOL vmlinux 0xd3bd5d5e	mb_cache_entry_find_next
+EXPORT_SYMBOL vmlinux 0xd3c0ab31	tcp_create_openreq_child
+EXPORT_SYMBOL vmlinux 0xd3c78bcf	ethtool_op_get_tso
+EXPORT_SYMBOL vmlinux 0xd3d8b84c	pci_request_selected_regions_exclusive
+EXPORT_SYMBOL vmlinux 0xd3f74cf1	interruptible_sleep_on_timeout
+EXPORT_SYMBOL vmlinux 0xd3f91bb9	textsearch_find_continuous
+EXPORT_SYMBOL vmlinux 0xd424540f	napi_frags_skb
+EXPORT_SYMBOL vmlinux 0xd42b7232	_write_unlock_bh
+EXPORT_SYMBOL vmlinux 0xd433e499	do_SAK
+EXPORT_SYMBOL vmlinux 0xd4392c6f	con_set_default_unimap
+EXPORT_SYMBOL vmlinux 0xd4467760	register_framebuffer
+EXPORT_SYMBOL vmlinux 0xd45c05b6	notify_change
+EXPORT_SYMBOL vmlinux 0xd4645c65	eisa_driver_register
+EXPORT_SYMBOL vmlinux 0xd4d4f05e	pci_enable_wake
+EXPORT_SYMBOL vmlinux 0xd4ef9de2	secpath_dup
+EXPORT_SYMBOL vmlinux 0xd4f7bb13	__ht_create_irq
+EXPORT_SYMBOL vmlinux 0xd5044e18	d_genocide
+EXPORT_SYMBOL vmlinux 0xd50fef48	acpi_detach_data
+EXPORT_SYMBOL vmlinux 0xd5263820	mb_cache_destroy
+EXPORT_SYMBOL vmlinux 0xd54123fd	xfrm_state_unregister_afinfo
+EXPORT_SYMBOL vmlinux 0xd54343d2	pnp_device_detach
+EXPORT_SYMBOL vmlinux 0xd55f7251	tcp_sendpage
+EXPORT_SYMBOL vmlinux 0xd5688a7a	radix_tree_insert
+EXPORT_SYMBOL vmlinux 0xd5998c6f	slow_work_register_user
+EXPORT_SYMBOL vmlinux 0xd5a3f7ad	blk_end_request_cur
+EXPORT_SYMBOL vmlinux 0xd5a43ca4	page_put_link
+EXPORT_SYMBOL vmlinux 0xd5e1b3fc	ip_nat_decode_session
+EXPORT_SYMBOL vmlinux 0xd5f2c89b	dqput
+EXPORT_SYMBOL vmlinux 0xd61b4302	arp_tbl
+EXPORT_SYMBOL vmlinux 0xd62c833f	schedule_timeout
+EXPORT_SYMBOL vmlinux 0xd643c670	phy_start
+EXPORT_SYMBOL vmlinux 0xd6a78d08	smp_call_function_single
+EXPORT_SYMBOL vmlinux 0xd6b33026	cpu_khz
+EXPORT_SYMBOL vmlinux 0xd6d27bfd	nf_hook_slow
+EXPORT_SYMBOL vmlinux 0xd6d33751	add_to_page_cache_locked
+EXPORT_SYMBOL vmlinux 0xd6e8c3ab	pci_set_dma_mask
+EXPORT_SYMBOL vmlinux 0xd6ee688f	vmalloc
+EXPORT_SYMBOL vmlinux 0xd6f31a3c	generic_ro_fops
+EXPORT_SYMBOL vmlinux 0xd7417154	tcp_v4_destroy_sock
+EXPORT_SYMBOL vmlinux 0xd7580f00	uart_remove_one_port
+EXPORT_SYMBOL vmlinux 0xd77a5aa5	__bitmap_and
+EXPORT_SYMBOL vmlinux 0xd79647f2	inode_sub_bytes
+EXPORT_SYMBOL vmlinux 0xd79b5a02	allow_signal
+EXPORT_SYMBOL vmlinux 0xd7a6fafa	panic_notifier_list
+EXPORT_SYMBOL vmlinux 0xd7b37422	d_prune_aliases
+EXPORT_SYMBOL vmlinux 0xd7d2e83e	acpi_evaluate_object_typed
+EXPORT_SYMBOL vmlinux 0xd7d36d1a	idr_find
+EXPORT_SYMBOL vmlinux 0xd7d67687	get_io_context
+EXPORT_SYMBOL vmlinux 0xd7db5116	i2c_smbus_read_word_data
+EXPORT_SYMBOL vmlinux 0xd7dd71a4	kernel_recvmsg
+EXPORT_SYMBOL vmlinux 0xd7dd777b	reserve_perfctr_nmi
+EXPORT_SYMBOL vmlinux 0xd81159cc	tcp_v4_md5_do_add
+EXPORT_SYMBOL vmlinux 0xd82613c0	atomic64_sub_and_test
+EXPORT_SYMBOL vmlinux 0xd8282ff0	posix_acl_equiv_mode
+EXPORT_SYMBOL vmlinux 0xd829d0aa	xfrm_state_check_expire
+EXPORT_SYMBOL vmlinux 0xd8337e16	d_instantiate_unique
+EXPORT_SYMBOL vmlinux 0xd83791bc	nf_conntrack_destroy
+EXPORT_SYMBOL vmlinux 0xd851af78	up_write
+EXPORT_SYMBOL vmlinux 0xd8591779	blk_integrity_register
+EXPORT_SYMBOL vmlinux 0xd8632673	ip_getsockopt
+EXPORT_SYMBOL vmlinux 0xd86c3935	drop_super
+EXPORT_SYMBOL vmlinux 0xd89da37f	movable_zone
+EXPORT_SYMBOL vmlinux 0xd8a2ab95	in_egroup_p
+EXPORT_SYMBOL vmlinux 0xd8a32071	clocksource_register
+EXPORT_SYMBOL vmlinux 0xd8a65c38	atomic64_sub
+EXPORT_SYMBOL vmlinux 0xd8abac3c	nf_log_packet
+EXPORT_SYMBOL vmlinux 0xd8b0be53	input_get_keycode
+EXPORT_SYMBOL vmlinux 0xd8e484f0	register_chrdev_region
+EXPORT_SYMBOL vmlinux 0xd9091363	acpi_install_notify_handler
+EXPORT_SYMBOL vmlinux 0xd9186188	init_net
+EXPORT_SYMBOL vmlinux 0xd91faa42	balance_dirty_pages_ratelimited_nr
+EXPORT_SYMBOL vmlinux 0xd92a3791	inet_sk_rebuild_header
+EXPORT_SYMBOL vmlinux 0xd959fc1f	lease_get_mtime
+EXPORT_SYMBOL vmlinux 0xd95f7125	tty_mutex
+EXPORT_SYMBOL vmlinux 0xd963a74a	flush_delayed_work
+EXPORT_SYMBOL vmlinux 0xd97585dc	phy_register_fixup_for_id
+EXPORT_SYMBOL vmlinux 0xd97965ad	__skb_recv_datagram
+EXPORT_SYMBOL vmlinux 0xd985dc99	mempool_free_pages
+EXPORT_SYMBOL vmlinux 0xd996d859	idr_pre_get
+EXPORT_SYMBOL vmlinux 0xd9b2a230	set_user_nice
+EXPORT_SYMBOL vmlinux 0xd9b8e2de	netif_device_attach
+EXPORT_SYMBOL vmlinux 0xd9c272aa	mca_mark_as_unused
+EXPORT_SYMBOL vmlinux 0xda08c0d7	pcibios_get_irq_routing_table
+EXPORT_SYMBOL vmlinux 0xda0a6b0e	acpi_map_lsapic
+EXPORT_SYMBOL vmlinux 0xda185e07	block_invalidatepage
+EXPORT_SYMBOL vmlinux 0xda1a3199	netlink_ack
+EXPORT_SYMBOL vmlinux 0xda1a7335	kasprintf
+EXPORT_SYMBOL vmlinux 0xda3863ca	inet_frag_kill
+EXPORT_SYMBOL vmlinux 0xda656a19	scsi_target_resume
+EXPORT_SYMBOL vmlinux 0xda7ca6cb	fb_mode_is_equal
+EXPORT_SYMBOL vmlinux 0xda8af7ad	fb_find_nearest_mode
+EXPORT_SYMBOL vmlinux 0xda8fd495	isapnp_write_byte
+EXPORT_SYMBOL vmlinux 0xda928914	nmi_watchdog
+EXPORT_SYMBOL vmlinux 0xdaa194e7	pci_request_selected_regions
+EXPORT_SYMBOL vmlinux 0xdaa57ec3	totalhigh_pages
+EXPORT_SYMBOL vmlinux 0xdacf088a	d_find_alias
+EXPORT_SYMBOL vmlinux 0xdafe8fcc	key_unlink
+EXPORT_SYMBOL vmlinux 0xdb4c88b4	groups_alloc
+EXPORT_SYMBOL vmlinux 0xdb5a0f84	tty_flip_buffer_push
+EXPORT_SYMBOL vmlinux 0xdb60b4c1	do_truncate
+EXPORT_SYMBOL vmlinux 0xdb864d65	iov_iter_single_seg_count
+EXPORT_SYMBOL vmlinux 0xdb8df7cd	pcix_get_mmrbc
+EXPORT_SYMBOL vmlinux 0xdb99667b	xfrm_state_insert
+EXPORT_SYMBOL vmlinux 0xdbb55752	mmc_try_claim_host
+EXPORT_SYMBOL vmlinux 0xdbcd416e	sysctl_ip_nonlocal_bind
+EXPORT_SYMBOL vmlinux 0xdc047fc4	scsi_dev_info_list_add_keyed
+EXPORT_SYMBOL vmlinux 0xdc053205	udp_memory_allocated
+EXPORT_SYMBOL vmlinux 0xdc14eda7	pci_pci_problems
+EXPORT_SYMBOL vmlinux 0xdc1ac267	xfrm_state_delete
+EXPORT_SYMBOL vmlinux 0xdc2adb35	add_taint
+EXPORT_SYMBOL vmlinux 0xdc308c72	phy_sanitize_settings
+EXPORT_SYMBOL vmlinux 0xdc3c2371	scsi_reset_provider
+EXPORT_SYMBOL vmlinux 0xdc43a9c8	daemonize
+EXPORT_SYMBOL vmlinux 0xdc50cfee	gnet_stats_finish_copy
+EXPORT_SYMBOL vmlinux 0xdc873a70	screen_info
+EXPORT_SYMBOL vmlinux 0xdca0e950	genl_register_family
+EXPORT_SYMBOL vmlinux 0xdcaacccc	starget_for_each_device
+EXPORT_SYMBOL vmlinux 0xdcb2fd61	pci_find_capability
+EXPORT_SYMBOL vmlinux 0xdcc858d1	ip_mc_rejoin_group
+EXPORT_SYMBOL vmlinux 0xdcce7892	skb_queue_purge
+EXPORT_SYMBOL vmlinux 0xdcd664f6	ps2_end_command
+EXPORT_SYMBOL vmlinux 0xdcd686e1	tcp_v4_md5_hash_skb
+EXPORT_SYMBOL vmlinux 0xdd0a2ba2	strlcat
+EXPORT_SYMBOL vmlinux 0xdd52f2df	user_revoke
+EXPORT_SYMBOL vmlinux 0xdd6bfccd	radix_tree_tag_set
+EXPORT_SYMBOL vmlinux 0xdd6f5c7a	pci_scan_slot
+EXPORT_SYMBOL vmlinux 0xdd744ec2	tcf_exts_validate
+EXPORT_SYMBOL vmlinux 0xdd74c96d	mem_map
+EXPORT_SYMBOL vmlinux 0xdde5051c	devm_ioremap
+EXPORT_SYMBOL vmlinux 0xde1fd694	acpi_processor_preregister_performance
+EXPORT_SYMBOL vmlinux 0xde31b902	blk_limits_io_opt
+EXPORT_SYMBOL vmlinux 0xde406623	tty_port_block_til_ready
+EXPORT_SYMBOL vmlinux 0xde43aa99	sg_miter_next
+EXPORT_SYMBOL vmlinux 0xde4669fe	__breadahead
+EXPORT_SYMBOL vmlinux 0xde58acd1	make_EII_client
+EXPORT_SYMBOL vmlinux 0xde75b689	set_irq_type
+EXPORT_SYMBOL vmlinux 0xde923661	skb_copy_expand
+EXPORT_SYMBOL vmlinux 0xde9360ba	totalram_pages
+EXPORT_SYMBOL vmlinux 0xdeb2a4e4	generic_write_end
+EXPORT_SYMBOL vmlinux 0xdeb4989a	posix_lock_file
+EXPORT_SYMBOL vmlinux 0xdecf6c57	ethtool_op_set_flags
+EXPORT_SYMBOL vmlinux 0xdedcf0c1	blk_rq_count_integrity_sg
+EXPORT_SYMBOL vmlinux 0xdeee82df	elv_rb_former_request
+EXPORT_SYMBOL vmlinux 0xdefc8da4	jbd2_journal_begin_ordered_truncate
+EXPORT_SYMBOL vmlinux 0xdefd5612	journal_revoke
+EXPORT_SYMBOL vmlinux 0xdf0da3cc	acpi_get_devices
+EXPORT_SYMBOL vmlinux 0xdf24afe1	vlan_ioctl_set
+EXPORT_SYMBOL vmlinux 0xdf255099	ps2_init
+EXPORT_SYMBOL vmlinux 0xdf4c8767	ns_to_timeval
+EXPORT_SYMBOL vmlinux 0xdf4f475d	pci_pme_active
+EXPORT_SYMBOL vmlinux 0xdf517833	i2c_use_client
+EXPORT_SYMBOL vmlinux 0xdf52988b	rtnetlink_put_metrics
+EXPORT_SYMBOL vmlinux 0xdf60cc27	__print_symbol
+EXPORT_SYMBOL vmlinux 0xdf841b10	dm_io_client_destroy
+EXPORT_SYMBOL vmlinux 0xdf8a7283	__dst_free
+EXPORT_SYMBOL vmlinux 0xdf8c695a	__ndelay
+EXPORT_SYMBOL vmlinux 0xdf929370	fs_overflowgid
+EXPORT_SYMBOL vmlinux 0xdf9f31c2	journal_create
+EXPORT_SYMBOL vmlinux 0xdfb7bada	acpi_check_resource_conflict
+EXPORT_SYMBOL vmlinux 0xdfc06181	__alloc_pages_nodemask
+EXPORT_SYMBOL vmlinux 0xdfc5169b	slhc_init
+EXPORT_SYMBOL vmlinux 0xdff58bc3	blk_queue_make_request
+EXPORT_SYMBOL vmlinux 0xdffb583b	dquot_alloc_inode
+EXPORT_SYMBOL vmlinux 0xe03a5f05	scsi_device_resume
+EXPORT_SYMBOL vmlinux 0xe04db320	phy_attach
+EXPORT_SYMBOL vmlinux 0xe053609e	sk_stream_wait_connect
+EXPORT_SYMBOL vmlinux 0xe075d6eb	iter_div_u64_rem
+EXPORT_SYMBOL vmlinux 0xe07fdea9	get_sb_bdev
+EXPORT_SYMBOL vmlinux 0xe0a501e3	idr_remove_all
+EXPORT_SYMBOL vmlinux 0xe0ac8bd2	acpi_bus_generate_netlink_event
+EXPORT_SYMBOL vmlinux 0xe0b13336	argv_free
+EXPORT_SYMBOL vmlinux 0xe0bc24a1	param_set_ushort
+EXPORT_SYMBOL vmlinux 0xe0dfa88d	block_write_end
+EXPORT_SYMBOL vmlinux 0xe0f105a3	acpi_processor_unregister_performance
+EXPORT_SYMBOL vmlinux 0xe0fa5620	nf_setsockopt
+EXPORT_SYMBOL vmlinux 0xe13cd8a7	dmi_name_in_vendors
+EXPORT_SYMBOL vmlinux 0xe1596872	per_cpu__irq_stat
+EXPORT_SYMBOL vmlinux 0xe15b520e	acpi_bus_get_device
+EXPORT_SYMBOL vmlinux 0xe1712d99	clocksource_unregister
+EXPORT_SYMBOL vmlinux 0xe1761617	security_inet_conn_request
+EXPORT_SYMBOL vmlinux 0xe18c6036	clear_page_dirty_for_io
+EXPORT_SYMBOL vmlinux 0xe1a81c3a	icmpv6msg_statistics
+EXPORT_SYMBOL vmlinux 0xe1b93017	__alloc_skb
+EXPORT_SYMBOL vmlinux 0xe20b3f89	mmc_request_done
+EXPORT_SYMBOL vmlinux 0xe2200f29	tty_chars_in_buffer
+EXPORT_SYMBOL vmlinux 0xe23ae481	blk_iopoll_complete
+EXPORT_SYMBOL vmlinux 0xe23d7acb	up_read
+EXPORT_SYMBOL vmlinux 0xe243a9a0	qdisc_class_hash_grow
+EXPORT_SYMBOL vmlinux 0xe24d3a97	jiffies_64
+EXPORT_SYMBOL vmlinux 0xe25f623a	tcp_check_req
+EXPORT_SYMBOL vmlinux 0xe269d6b6	kblockd_schedule_work
+EXPORT_SYMBOL vmlinux 0xe28269a6	scsi_remove_device
+EXPORT_SYMBOL vmlinux 0xe299f5a4	pfifo_qdisc_ops
+EXPORT_SYMBOL vmlinux 0xe2aeec37	lock_fb_info
+EXPORT_SYMBOL vmlinux 0xe2b76a84	genl_register_family_with_ops
+EXPORT_SYMBOL vmlinux 0xe2ca0510	vfs_follow_link
+EXPORT_SYMBOL vmlinux 0xe2d5255a	strcmp
+EXPORT_SYMBOL vmlinux 0xe2e1c33e	kernel_sendpage
+EXPORT_SYMBOL vmlinux 0xe2e8065e	memdup_user
+EXPORT_SYMBOL vmlinux 0xe2f91a14	eth_validate_addr
+EXPORT_SYMBOL vmlinux 0xe2fae716	kmemdup
+EXPORT_SYMBOL vmlinux 0xe303cba1	dev_load
+EXPORT_SYMBOL vmlinux 0xe3125866	insert_inode_locked
+EXPORT_SYMBOL vmlinux 0xe313228b	bio_free
+EXPORT_SYMBOL vmlinux 0xe3302f66	ppp_input_error
+EXPORT_SYMBOL vmlinux 0xe3690e24	register_nls
+EXPORT_SYMBOL vmlinux 0xe3870e79	give_up_console
+EXPORT_SYMBOL vmlinux 0xe39af011	vfs_rmdir
+EXPORT_SYMBOL vmlinux 0xe3a1c478	__task_pid_nr_ns
+EXPORT_SYMBOL vmlinux 0xe3ee933e	mntput_no_expire
+EXPORT_SYMBOL vmlinux 0xe3eec5b0	pci_dev_put
+EXPORT_SYMBOL vmlinux 0xe3fbe148	acpi_install_table_handler
+EXPORT_SYMBOL vmlinux 0xe43617f7	acpi_gbl_FADT
+EXPORT_SYMBOL vmlinux 0xe44cb41e	elv_rb_latter_request
+EXPORT_SYMBOL vmlinux 0xe456bd3a	complete
+EXPORT_SYMBOL vmlinux 0xe45a2676	pci_enable_device_io
+EXPORT_SYMBOL vmlinux 0xe47a54bd	__kill_fasync
+EXPORT_SYMBOL vmlinux 0xe484e35f	ioread32
+EXPORT_SYMBOL vmlinux 0xe4870354	_read_trylock
+EXPORT_SYMBOL vmlinux 0xe48f3039	ida_get_new_above
+EXPORT_SYMBOL vmlinux 0xe492161f	search_binary_handler
+EXPORT_SYMBOL vmlinux 0xe4c1df3e	_read_lock_bh
+EXPORT_SYMBOL vmlinux 0xe4d1eeae	__module_put_and_exit
+EXPORT_SYMBOL vmlinux 0xe4dd4a39	sysctl_data
+EXPORT_SYMBOL vmlinux 0xe4f1695e	cookie_check_timestamp
+EXPORT_SYMBOL vmlinux 0xe517591b	generic_file_readonly_mmap
+EXPORT_SYMBOL vmlinux 0xe51a4d1b	__nla_put
+EXPORT_SYMBOL vmlinux 0xe523ad75	synchronize_irq
+EXPORT_SYMBOL vmlinux 0xe57878a1	in6_pton
+EXPORT_SYMBOL vmlinux 0xe5867808	dlci_ioctl_set
+EXPORT_SYMBOL vmlinux 0xe59b266b	mutex_lock
+EXPORT_SYMBOL vmlinux 0xe5b075dd	write_inode_now
+EXPORT_SYMBOL vmlinux 0xe5c78a99	do_blank_screen
+EXPORT_SYMBOL vmlinux 0xe5eb474c	otg_get_transceiver
+EXPORT_SYMBOL vmlinux 0xe5ed5467	xfrm_policy_walk_init
+EXPORT_SYMBOL vmlinux 0xe623a5cd	genphy_config_aneg
+EXPORT_SYMBOL vmlinux 0xe65a856c	jbd2_journal_init_dev
+EXPORT_SYMBOL vmlinux 0xe676cbf7	dst_discard
+EXPORT_SYMBOL vmlinux 0xe67bcc7a	simple_rmdir
+EXPORT_SYMBOL vmlinux 0xe67e1d79	jbd2_journal_dirty_metadata
+EXPORT_SYMBOL vmlinux 0xe68a238e	tty_kref_put
+EXPORT_SYMBOL vmlinux 0xe690b8fd	__ipv6_isatap_ifid
+EXPORT_SYMBOL vmlinux 0xe697d108	__blk_iopoll_complete
+EXPORT_SYMBOL vmlinux 0xe6be2858	mod_zone_page_state
+EXPORT_SYMBOL vmlinux 0xe6e879a3	start_tty
+EXPORT_SYMBOL vmlinux 0xe6ebc016	key_create_or_update
+EXPORT_SYMBOL vmlinux 0xe6fbe430	can_do_mlock
+EXPORT_SYMBOL vmlinux 0xe714375c	__tasklet_hi_schedule_first
+EXPORT_SYMBOL vmlinux 0xe716baed	acpi_unregister_ioapic
+EXPORT_SYMBOL vmlinux 0xe72023f0	mutex_trylock
+EXPORT_SYMBOL vmlinux 0xe742de6a	mdiobus_read
+EXPORT_SYMBOL vmlinux 0xe744f743	generic_write_sync
+EXPORT_SYMBOL vmlinux 0xe74f60f9	tcf_em_tree_destroy
+EXPORT_SYMBOL vmlinux 0xe7d2aca1	security_sk_classify_flow
+EXPORT_SYMBOL vmlinux 0xe7d32407	nmi_active
+EXPORT_SYMBOL vmlinux 0xe7d4daac	seq_list_next
+EXPORT_SYMBOL vmlinux 0xe80ce219	sysctl_tcp_dma_copybreak
+EXPORT_SYMBOL vmlinux 0xe82a1e6f	scsi_print_command
+EXPORT_SYMBOL vmlinux 0xe84c74a3	dma_alloc_from_coherent
+EXPORT_SYMBOL vmlinux 0xe8588f1f	uart_suspend_port
+EXPORT_SYMBOL vmlinux 0xe867eb32	tcp_v4_md5_do_del
+EXPORT_SYMBOL vmlinux 0xe8794ce1	slhc_toss
+EXPORT_SYMBOL vmlinux 0xe8a3605f	acpi_processor_set_thermal_limit
+EXPORT_SYMBOL vmlinux 0xe8b04b3b	inet6_release
+EXPORT_SYMBOL vmlinux 0xe8b68849	wrmsr_on_cpus
+EXPORT_SYMBOL vmlinux 0xe8cd902e	hweight16
+EXPORT_SYMBOL vmlinux 0xe8fd8a11	ip_mc_join_group
+EXPORT_SYMBOL vmlinux 0xe90dcae0	__request_module
+EXPORT_SYMBOL vmlinux 0xe914e41e	strcpy
+EXPORT_SYMBOL vmlinux 0xe95ec312	mca_bus_type
+EXPORT_SYMBOL vmlinux 0xe95f80ac	mca_device_transform_memory
+EXPORT_SYMBOL vmlinux 0xe971befc	pci_enable_device
+EXPORT_SYMBOL vmlinux 0xe97efa10	scsi_bios_ptable
+EXPORT_SYMBOL vmlinux 0xe9812138	skb_dequeue
+EXPORT_SYMBOL vmlinux 0xe98690bd	jbd2_journal_forget
+EXPORT_SYMBOL vmlinux 0xe997667b	wrmsr_on_cpu
+EXPORT_SYMBOL vmlinux 0xe9a6e09a	filemap_fdatawait
+EXPORT_SYMBOL vmlinux 0xe9d2c681	jbd2_journal_release_jbd_inode
+EXPORT_SYMBOL vmlinux 0xe9dcb2ef	dm_dirty_log_destroy
+EXPORT_SYMBOL vmlinux 0xe9ec4c90	pci_enable_msix
+EXPORT_SYMBOL vmlinux 0xea054b22	nla_policy_len
+EXPORT_SYMBOL vmlinux 0xea0c40a3	scsi_is_target_device
+EXPORT_SYMBOL vmlinux 0xea10212a	int_to_scsilun
+EXPORT_SYMBOL vmlinux 0xea10655a	__bitmap_intersects
+EXPORT_SYMBOL vmlinux 0xea2d33a2	radix_tree_gang_lookup_slot
+EXPORT_SYMBOL vmlinux 0xea769baa	dm_table_unplug_all
+EXPORT_SYMBOL vmlinux 0xea7987f1	key_update
+EXPORT_SYMBOL vmlinux 0xea79a591	get_empty_filp
+EXPORT_SYMBOL vmlinux 0xea7fb0ec	netif_rx_ni
+EXPORT_SYMBOL vmlinux 0xea852925	rwsem_downgrade_wake
+EXPORT_SYMBOL vmlinux 0xea858cb5	radix_tree_gang_lookup_tag
+EXPORT_SYMBOL vmlinux 0xea90bdd3	acpi_attach_data
+EXPORT_SYMBOL vmlinux 0xea935a68	phy_disable_interrupts
+EXPORT_SYMBOL vmlinux 0xea96e0f8	udp_prot
+EXPORT_SYMBOL vmlinux 0xea9e70ec	dma_sync_wait
+EXPORT_SYMBOL vmlinux 0xeacd7f51	ilookup
+EXPORT_SYMBOL vmlinux 0xeae3dfd6	__const_udelay
+EXPORT_SYMBOL vmlinux 0xeae7082e	__dev_get_by_name
+EXPORT_SYMBOL vmlinux 0xeb0b7e62	jbd2_journal_start
+EXPORT_SYMBOL vmlinux 0xeb129e9a	mmc_card_can_sleep
+EXPORT_SYMBOL vmlinux 0xeb1fabf6	interruptible_sleep_on
+EXPORT_SYMBOL vmlinux 0xeb2bcced	input_free_device
+EXPORT_SYMBOL vmlinux 0xeb61c348	mdiobus_register
+EXPORT_SYMBOL vmlinux 0xeb645e8d	read_cache_pages
+EXPORT_SYMBOL vmlinux 0xeb66a213	km_query
+EXPORT_SYMBOL vmlinux 0xeb677cd8	touch_atime
+EXPORT_SYMBOL vmlinux 0xeb7e28b0	pnp_release_card_device
+EXPORT_SYMBOL vmlinux 0xeb8d94d0	inet_ioctl
+EXPORT_SYMBOL vmlinux 0xeb8f54b3	strstrip
+EXPORT_SYMBOL vmlinux 0xebd273a6	strict_strtoull
+EXPORT_SYMBOL vmlinux 0xebe18f7b	lro_flush_all
+EXPORT_SYMBOL vmlinux 0xebfe555e	register_exec_domain
+EXPORT_SYMBOL vmlinux 0xec086b47	acpi_get_hp_hw_control_from_firmware
+EXPORT_SYMBOL vmlinux 0xec62caf6	blk_dump_rq_flags
+EXPORT_SYMBOL vmlinux 0xec75522d	fb_set_cmap
+EXPORT_SYMBOL vmlinux 0xec794ba0	__send_remote_softirq
+EXPORT_SYMBOL vmlinux 0xec92b332	qdisc_watchdog_init
+EXPORT_SYMBOL vmlinux 0xecc64caa	devcgroup_inode_permission
+EXPORT_SYMBOL vmlinux 0xecde1418	_spin_lock_irq
+EXPORT_SYMBOL vmlinux 0xece95925	unregister_con_driver
+EXPORT_SYMBOL vmlinux 0xeda0d76e	gen_estimator_active
+EXPORT_SYMBOL vmlinux 0xedb88745	input_open_device
+EXPORT_SYMBOL vmlinux 0xedbaee5e	nla_strcmp
+EXPORT_SYMBOL vmlinux 0xedbb046d	dm_table_get_md
+EXPORT_SYMBOL vmlinux 0xedc03953	iounmap
+EXPORT_SYMBOL vmlinux 0xedd96b11	mdiobus_scan
+EXPORT_SYMBOL vmlinux 0xedef7908	tcp_shutdown
+EXPORT_SYMBOL vmlinux 0xee2d0fc7	_local_bh_enable
+EXPORT_SYMBOL vmlinux 0xee370105	security_path_rmdir
+EXPORT_SYMBOL vmlinux 0xee67e2d6	netif_rx
+EXPORT_SYMBOL vmlinux 0xee76095b	put_mnt_ns
+EXPORT_SYMBOL vmlinux 0xee7eb9e1	pnp_platform_devices
+EXPORT_SYMBOL vmlinux 0xee7eec12	vc_resize
+EXPORT_SYMBOL vmlinux 0xeea9dbaf	bitmap_bitremap
+EXPORT_SYMBOL vmlinux 0xeecfcf77	llc_build_and_send_ui_pkt
+EXPORT_SYMBOL vmlinux 0xeeeafd1a	get_phy_id
+EXPORT_SYMBOL vmlinux 0xef0cad7b	dquot_mark_dquot_dirty
+EXPORT_SYMBOL vmlinux 0xef1f3ea2	__devm_request_region
+EXPORT_SYMBOL vmlinux 0xef313b5d	per_cpu__current_task
+EXPORT_SYMBOL vmlinux 0xef3bd862	mca_find_unused_adapter
+EXPORT_SYMBOL vmlinux 0xef5a2ceb	sk_receive_skb
+EXPORT_SYMBOL vmlinux 0xef5b5aba	dev_kfree_skb_irq
+EXPORT_SYMBOL vmlinux 0xef6ed1ba	param_set_invbool
+EXPORT_SYMBOL vmlinux 0xef711ed9	__xfrm_lookup
+EXPORT_SYMBOL vmlinux 0xef73c727	tcp_setsockopt
+EXPORT_SYMBOL vmlinux 0xef87e37f	brioctl_set
+EXPORT_SYMBOL vmlinux 0xef9aedfc	boot_option_idle_override
+EXPORT_SYMBOL vmlinux 0xef9f807f	__blk_end_request_all
+EXPORT_SYMBOL vmlinux 0xefa7fce8	page_symlink
+EXPORT_SYMBOL vmlinux 0xefdd70ce	security_secid_to_secctx
+EXPORT_SYMBOL vmlinux 0xefe099c3	acpi_get_event_status
+EXPORT_SYMBOL vmlinux 0xeff29d9e	pcix_set_mmrbc
+EXPORT_SYMBOL vmlinux 0xeffc8973	inet_csk_delete_keepalive_timer
+EXPORT_SYMBOL vmlinux 0xf0009fee	put_pages_list
+EXPORT_SYMBOL vmlinux 0xf0089e65	vfs_path_lookup
+EXPORT_SYMBOL vmlinux 0xf0397e65	journal_invalidatepage
+EXPORT_SYMBOL vmlinux 0xf065f629	ioread16be
+EXPORT_SYMBOL vmlinux 0xf0876707	skb_dequeue_tail
+EXPORT_SYMBOL vmlinux 0xf0d6910b	inet_stream_connect
+EXPORT_SYMBOL vmlinux 0xf0ef15b4	list_sort
+EXPORT_SYMBOL vmlinux 0xf0f1246c	kvasprintf
+EXPORT_SYMBOL vmlinux 0xf0f92bbb	sync_inodes_sb
+EXPORT_SYMBOL vmlinux 0xf0fdf6cb	__stack_chk_fail
+EXPORT_SYMBOL vmlinux 0xf1016fbc	__scm_destroy
+EXPORT_SYMBOL vmlinux 0xf1023698	xfrm_state_lookup_byaddr
+EXPORT_SYMBOL vmlinux 0xf10de535	ioread8
+EXPORT_SYMBOL vmlinux 0xf11543ff	find_first_zero_bit
+EXPORT_SYMBOL vmlinux 0xf127500e	dev_change_flags
+EXPORT_SYMBOL vmlinux 0xf130e228	dev_set_promiscuity
+EXPORT_SYMBOL vmlinux 0xf13959b9	seq_open_private
+EXPORT_SYMBOL vmlinux 0xf13d8d90	vga_client_register
+EXPORT_SYMBOL vmlinux 0xf14f35ef	vfs_symlink
+EXPORT_SYMBOL vmlinux 0xf1658b16	input_unfilter_device
+EXPORT_SYMBOL vmlinux 0xf174ed48	acquire_console_sem
+EXPORT_SYMBOL vmlinux 0xf191f52b	__scm_send
+EXPORT_SYMBOL vmlinux 0xf195c682	fb_invert_cmaps
+EXPORT_SYMBOL vmlinux 0xf1a3ef68	pci_unmap_rom
+EXPORT_SYMBOL vmlinux 0xf1d64416	gen_new_estimator
+EXPORT_SYMBOL vmlinux 0xf1db1704	nla_memcpy
+EXPORT_SYMBOL vmlinux 0xf1deabf2	div64_u64
+EXPORT_SYMBOL vmlinux 0xf1e464ba	follow_up
+EXPORT_SYMBOL vmlinux 0xf1e4a5e7	register_filesystem
+EXPORT_SYMBOL vmlinux 0xf1e98c74	avenrun
+EXPORT_SYMBOL vmlinux 0xf20dabd8	free_irq
+EXPORT_SYMBOL vmlinux 0xf21570eb	gnet_stats_start_copy
+EXPORT_SYMBOL vmlinux 0xf2234b52	blk_start_request
+EXPORT_SYMBOL vmlinux 0xf235a26f	mddev_congested
+EXPORT_SYMBOL vmlinux 0xf2391e40	replace_mount_options
+EXPORT_SYMBOL vmlinux 0xf2690ad7	input_unregister_handler
+EXPORT_SYMBOL vmlinux 0xf2997713	tty_termios_hw_change
+EXPORT_SYMBOL vmlinux 0xf2ae6b2d	tty_insert_flip_string
+EXPORT_SYMBOL vmlinux 0xf2afec4a	block_write_begin
+EXPORT_SYMBOL vmlinux 0xf2e74040	mca_set_adapter_name
+EXPORT_SYMBOL vmlinux 0xf30a6797	dma_async_device_unregister
+EXPORT_SYMBOL vmlinux 0xf313da4e	sha_transform
+EXPORT_SYMBOL vmlinux 0xf31a3961	nf_getsockopt
+EXPORT_SYMBOL vmlinux 0xf3341268	__clear_user
+EXPORT_SYMBOL vmlinux 0xf338d4c3	netlink_unregister_notifier
+EXPORT_SYMBOL vmlinux 0xf346231f	seq_list_start_head
+EXPORT_SYMBOL vmlinux 0xf34c23ca	fifo_create_dflt
+EXPORT_SYMBOL vmlinux 0xf37190b2	pci_scan_single_device
+EXPORT_SYMBOL vmlinux 0xf3732be1	noop_qdisc
+EXPORT_SYMBOL vmlinux 0xf397b9aa	__tasklet_schedule
+EXPORT_SYMBOL vmlinux 0xf39bf4d9	put_cmsg
+EXPORT_SYMBOL vmlinux 0xf3ab6bec	set_pages_array_uc
+EXPORT_SYMBOL vmlinux 0xf3bf0bce	__bitmap_complement
+EXPORT_SYMBOL vmlinux 0xf3d47d75	dev_get_by_name
+EXPORT_SYMBOL vmlinux 0xf3e97d2f	dquot_free_inode
+EXPORT_SYMBOL vmlinux 0xf3f05554	pci_bus_write_config_word
+EXPORT_SYMBOL vmlinux 0xf4082c7d	inode_init_always
+EXPORT_SYMBOL vmlinux 0xf4095bf3	bdi_destroy
+EXPORT_SYMBOL vmlinux 0xf40d7998	vfs_get_dqinfo
+EXPORT_SYMBOL vmlinux 0xf40dcae1	dm_get_mapinfo
+EXPORT_SYMBOL vmlinux 0xf4314020	fget
+EXPORT_SYMBOL vmlinux 0xf441ac43	ioread8_rep
+EXPORT_SYMBOL vmlinux 0xf465dbe6	genphy_read_status
+EXPORT_SYMBOL vmlinux 0xf4711953	file_remove_suid
+EXPORT_SYMBOL vmlinux 0xf48a2c4c	MCA_bus
+EXPORT_SYMBOL vmlinux 0xf494130b	ethtool_op_set_tx_ipv6_csum
+EXPORT_SYMBOL vmlinux 0xf494f618	mmc_regulator_get_ocrmask
+EXPORT_SYMBOL vmlinux 0xf49ecee9	bioset_integrity_create
+EXPORT_SYMBOL vmlinux 0xf4a5c213	avail_to_resrv_perfctr_nmi_bit
+EXPORT_SYMBOL vmlinux 0xf4ae390e	ppp_register_net_channel
+EXPORT_SYMBOL vmlinux 0xf4ae9d51	ida_pre_get
+EXPORT_SYMBOL vmlinux 0xf4b9d3c1	__dev_getfirstbyhwtype
+EXPORT_SYMBOL vmlinux 0xf4bca3cb	filemap_fdatawrite
+EXPORT_SYMBOL vmlinux 0xf4c94644	bio_integrity_free
+EXPORT_SYMBOL vmlinux 0xf4db25d0	blk_queue_max_phys_segments
+EXPORT_SYMBOL vmlinux 0xf4e107a5	kill_pgrp
+EXPORT_SYMBOL vmlinux 0xf4e7d8fc	nla_put_nohdr
+EXPORT_SYMBOL vmlinux 0xf4ea8e5f	udp_proc_unregister
+EXPORT_SYMBOL vmlinux 0xf4f14de6	rtnl_trylock
+EXPORT_SYMBOL vmlinux 0xf4f52f93	dqstats
+EXPORT_SYMBOL vmlinux 0xf502d273	acpi_get_current_resources
+EXPORT_SYMBOL vmlinux 0xf51ae235	touch_nmi_watchdog
+EXPORT_SYMBOL vmlinux 0xf53b5ab8	napi_skb_finish
+EXPORT_SYMBOL vmlinux 0xf53d4c26	qdisc_class_hash_destroy
+EXPORT_SYMBOL vmlinux 0xf54fcd5a	put_tty_driver
+EXPORT_SYMBOL vmlinux 0xf57682c8	acpi_get_object_info
+EXPORT_SYMBOL vmlinux 0xf594460a	inet_add_protocol
+EXPORT_SYMBOL vmlinux 0xf59723b5	scsi_scan_target
+EXPORT_SYMBOL vmlinux 0xf5ac49f1	i2c_smbus_write_byte_data
+EXPORT_SYMBOL vmlinux 0xf5c05914	generic_segment_checks
+EXPORT_SYMBOL vmlinux 0xf5c12d71	bio_add_page
+EXPORT_SYMBOL vmlinux 0xf5c9012e	timespec_trunc
+EXPORT_SYMBOL vmlinux 0xf5ccdffd	blk_stack_limits
+EXPORT_SYMBOL vmlinux 0xf5d01cdf	mca_device_transform_irq
+EXPORT_SYMBOL vmlinux 0xf5e0861a	sock_map_fd
+EXPORT_SYMBOL vmlinux 0xf5eb86ea	blk_verify_command
+EXPORT_SYMBOL vmlinux 0xf5ffd9b5	xfrm_lookup
+EXPORT_SYMBOL vmlinux 0xf61ee0bc	phy_enable_interrupts
+EXPORT_SYMBOL vmlinux 0xf61fb531	sock_common_setsockopt
+EXPORT_SYMBOL vmlinux 0xf6278d8a	acpi_unlock_ac_dir
+EXPORT_SYMBOL vmlinux 0xf64f6fc1	blk_queue_max_segment_size
+EXPORT_SYMBOL vmlinux 0xf66ad02c	vfs_fsync
+EXPORT_SYMBOL vmlinux 0xf66bb351	sockfd_lookup
+EXPORT_SYMBOL vmlinux 0xf6afb025	get_sb_ns
+EXPORT_SYMBOL vmlinux 0xf6b9ac9a	dst_release
+EXPORT_SYMBOL vmlinux 0xf6bb4729	color_table
+EXPORT_SYMBOL vmlinux 0xf6c060d3	tty_name
+EXPORT_SYMBOL vmlinux 0xf6ebc03b	net_ratelimit
+EXPORT_SYMBOL vmlinux 0xf74a63b5	x86_mce_decode_callback
+EXPORT_SYMBOL vmlinux 0xf7533668	kobject_get
+EXPORT_SYMBOL vmlinux 0xf757336c	remove_arg_zero
+EXPORT_SYMBOL vmlinux 0xf7623914	radix_tree_tag_clear
+EXPORT_SYMBOL vmlinux 0xf786ef5e	idr_init
+EXPORT_SYMBOL vmlinux 0xf78d04ab	netlink_register_notifier
+EXPORT_SYMBOL vmlinux 0xf7a87822	skb_free_datagram_locked
+EXPORT_SYMBOL vmlinux 0xf7ac3032	unload_nls
+EXPORT_SYMBOL vmlinux 0xf7ad06e5	__free_pages
+EXPORT_SYMBOL vmlinux 0xf7c5eb55	i2c_master_recv
+EXPORT_SYMBOL vmlinux 0xf7d30be4	acpi_match_device_ids
+EXPORT_SYMBOL vmlinux 0xf811e69d	scsi_eh_flush_done_q
+EXPORT_SYMBOL vmlinux 0xf82abc1d	isa_dma_bridge_buggy
+EXPORT_SYMBOL vmlinux 0xf82e3d47	acpi_initialize_objects
+EXPORT_SYMBOL vmlinux 0xf83fb96e	netpoll_setup
+EXPORT_SYMBOL vmlinux 0xf8656b6f	netpoll_print_options
+EXPORT_SYMBOL vmlinux 0xf878d34d	end_buffer_async_write
+EXPORT_SYMBOL vmlinux 0xf87d0134	ppp_input
+EXPORT_SYMBOL vmlinux 0xf88e0ee2	acpi_get_table_header
+EXPORT_SYMBOL vmlinux 0xf890fe7f	pm_idle
+EXPORT_SYMBOL vmlinux 0xf8b30e93	mempool_create
+EXPORT_SYMBOL vmlinux 0xf8cf9ee5	abort_exclusive_wait
+EXPORT_SYMBOL vmlinux 0xf8f1c457	inet_dgram_ops
+EXPORT_SYMBOL vmlinux 0xf8fc947c	neigh_seq_next
+EXPORT_SYMBOL vmlinux 0xf9350e04	inet_csk_accept
+EXPORT_SYMBOL vmlinux 0xf93cf992	generic_read_dir
+EXPORT_SYMBOL vmlinux 0xf940a328	__next_cpu
+EXPORT_SYMBOL vmlinux 0xf94e938b	kobject_del
+EXPORT_SYMBOL vmlinux 0xf9542f1b	lro_vlan_hwaccel_receive_frags
+EXPORT_SYMBOL vmlinux 0xf9899664	mod_timer_pinned
+EXPORT_SYMBOL vmlinux 0xf991fdcf	sk_free
+EXPORT_SYMBOL vmlinux 0xf99f33b3	pci_read_vpd
+EXPORT_SYMBOL vmlinux 0xf9a482f9	msleep
+EXPORT_SYMBOL vmlinux 0xf9b28e8c	blk_remove_plug
+EXPORT_SYMBOL vmlinux 0xf9ebaf4b	invalidate_mapping_pages
+EXPORT_SYMBOL vmlinux 0xfa0564fc	__wait_on_bit_lock
+EXPORT_SYMBOL vmlinux 0xfa21b73f	acpi_processor_register_performance
+EXPORT_SYMBOL vmlinux 0xfa39074e	seq_bitmap_list
+EXPORT_SYMBOL vmlinux 0xfa506bd5	__mark_inode_dirty
+EXPORT_SYMBOL vmlinux 0xfa9432be	complete_request_key
+EXPORT_SYMBOL vmlinux 0xfaaad93b	unlock_new_inode
+EXPORT_SYMBOL vmlinux 0xfaf98462	bitrev32
+EXPORT_SYMBOL vmlinux 0xfafb212a	unregister_qdisc
+EXPORT_SYMBOL vmlinux 0xfb0443fb	acpi_get_parent
+EXPORT_SYMBOL vmlinux 0xfb0cf2e9	touch_all_softlockup_watchdogs
+EXPORT_SYMBOL vmlinux 0xfb173a1d	register_console
+EXPORT_SYMBOL vmlinux 0xfb256480	inode_needs_sync
+EXPORT_SYMBOL vmlinux 0xfb3cf53c	unlock_page
+EXPORT_SYMBOL vmlinux 0xfb4eef77	serio_open
+EXPORT_SYMBOL vmlinux 0xfb6af58d	recalc_sigpending
+EXPORT_SYMBOL vmlinux 0xfb7d58f2	dev_trans_start
+EXPORT_SYMBOL vmlinux 0xfb85f802	splice_from_pipe_end
+EXPORT_SYMBOL vmlinux 0xfb9a210a	ethtool_op_get_sg
+EXPORT_SYMBOL vmlinux 0xfb9dae16	scsi_eh_finish_cmd
+EXPORT_SYMBOL vmlinux 0xfb9e6ae8	request_key
+EXPORT_SYMBOL vmlinux 0xfba0c2e0	llc_sap_list_lock
+EXPORT_SYMBOL vmlinux 0xfba98072	blk_requeue_request
+EXPORT_SYMBOL vmlinux 0xfbb66a71	d_lookup
+EXPORT_SYMBOL vmlinux 0xfbcfcdea	mpage_writepages
+EXPORT_SYMBOL vmlinux 0xfbe27a1c	rb_first
+EXPORT_SYMBOL vmlinux 0xfc02b7ad	sysctl_tcp_wmem
+EXPORT_SYMBOL vmlinux 0xfc18cf08	phy_scan_fixups
+EXPORT_SYMBOL vmlinux 0xfc39e32f	ioport_unmap
+EXPORT_SYMBOL vmlinux 0xfc533f85	schedule_work_on
+EXPORT_SYMBOL vmlinux 0xfc56001e	xfrm_policy_bysel_ctx
+EXPORT_SYMBOL vmlinux 0xfc562165	acpi_run_osc
+EXPORT_SYMBOL vmlinux 0xfc60cf08	bio_integrity_endio
+EXPORT_SYMBOL vmlinux 0xfc6256b9	boot_tvec_bases
+EXPORT_SYMBOL vmlinux 0xfc62a3c1	seq_path
+EXPORT_SYMBOL vmlinux 0xfc6412ac	xfrm_input
+EXPORT_SYMBOL vmlinux 0xfc6aa733	vfs_llseek
+EXPORT_SYMBOL vmlinux 0xfc6f634d	unregister_binfmt
+EXPORT_SYMBOL vmlinux 0xfc710420	mmc_resume_host
+EXPORT_SYMBOL vmlinux 0xfc72aeb4	i2c_clients_command
+EXPORT_SYMBOL vmlinux 0xfc72d4f0	unlock_buffer
+EXPORT_SYMBOL vmlinux 0xfc90f025	default_llseek
+EXPORT_SYMBOL vmlinux 0xfcaa04a0	out_of_line_wait_on_bit_lock
+EXPORT_SYMBOL vmlinux 0xfcb4888a	journal_flush
+EXPORT_SYMBOL vmlinux 0xfcbd931c	prepare_binprm
+EXPORT_SYMBOL vmlinux 0xfcc2a43c	utf32_to_utf8
+EXPORT_SYMBOL vmlinux 0xfcc4d4e4	mod_timer_pending
+EXPORT_SYMBOL vmlinux 0xfcc78fa8	napi_frags_finish
+EXPORT_SYMBOL vmlinux 0xfcda63a3	node_states
+EXPORT_SYMBOL vmlinux 0xfcec0987	enable_irq
+EXPORT_SYMBOL vmlinux 0xfcf6954d	mmc_host_enable
+EXPORT_SYMBOL vmlinux 0xfcfa03ff	fb_videomode_to_modelist
+EXPORT_SYMBOL vmlinux 0xfd167c9e	genlmsg_multicast_allns
+EXPORT_SYMBOL vmlinux 0xfd27e0ff	sk_stream_write_space
+EXPORT_SYMBOL vmlinux 0xfd2c2aee	neigh_seq_start
+EXPORT_SYMBOL vmlinux 0xfd480507	__wait_on_buffer
+EXPORT_SYMBOL vmlinux 0xfd4b6ccb	thermal_cooling_device_unregister
+EXPORT_SYMBOL vmlinux 0xfd5af47d	vc_cons
+EXPORT_SYMBOL vmlinux 0xfd6b84e1	vga_put
+EXPORT_SYMBOL vmlinux 0xfd6f4850	native_wrmsr_safe_regs
+EXPORT_SYMBOL vmlinux 0xfd7d7713	acpi_exception
+EXPORT_SYMBOL vmlinux 0xfd93a46e	dma_declare_coherent_memory
+EXPORT_SYMBOL vmlinux 0xfd9f1825	qdisc_calculate_pkt_len
+EXPORT_SYMBOL vmlinux 0xfda32f71	bio_put
+EXPORT_SYMBOL vmlinux 0xfda69829	blk_rq_init
+EXPORT_SYMBOL vmlinux 0xfda85a7d	request_threaded_irq
+EXPORT_SYMBOL vmlinux 0xfdb9b629	ioread32be
+EXPORT_SYMBOL vmlinux 0xfdecd6a8	mmc_host_disable
+EXPORT_SYMBOL vmlinux 0xfdfc0b3b	fiemap_fill_next_extent
+EXPORT_SYMBOL vmlinux 0xfe07e63c	pci_remove_bus_device
+EXPORT_SYMBOL vmlinux 0xfe58148d	input_close_device
+EXPORT_SYMBOL vmlinux 0xfe5d4bb2	sys_tz
+EXPORT_SYMBOL vmlinux 0xfe6ff461	ip_fragment
+EXPORT_SYMBOL vmlinux 0xfe769456	unregister_netdevice_notifier
+EXPORT_SYMBOL vmlinux 0xfe79d253	alloc_mdio_bitbang
+EXPORT_SYMBOL vmlinux 0xfe7c4287	nr_cpu_ids
+EXPORT_SYMBOL vmlinux 0xfe99146f	sock_init_data
+EXPORT_SYMBOL vmlinux 0xfec3c2f2	bcd2bin
+EXPORT_SYMBOL vmlinux 0xfec8d114	sock_kfree_s
+EXPORT_SYMBOL vmlinux 0xfedd35fc	console_suspend_enabled
+EXPORT_SYMBOL vmlinux 0xfee26ead	tcp_parse_options
+EXPORT_SYMBOL vmlinux 0xfef96e23	__scsi_print_command
+EXPORT_SYMBOL vmlinux 0xff1c606f	bdi_register
+EXPORT_SYMBOL vmlinux 0xff1e9dd8	seq_list_start
+EXPORT_SYMBOL vmlinux 0xff480992	dump_fpu
+EXPORT_SYMBOL vmlinux 0xff4f1bb7	tty_set_operations
+EXPORT_SYMBOL vmlinux 0xff569e3b	register_gifconf
+EXPORT_SYMBOL vmlinux 0xff6878cf	fb_default_cmap
+EXPORT_SYMBOL vmlinux 0xff708fd3	mempool_destroy
+EXPORT_SYMBOL vmlinux 0xff7559e4	ioport_resource
+EXPORT_SYMBOL vmlinux 0xff794421	eth_type_trans
+EXPORT_SYMBOL vmlinux 0xff964b25	param_set_int
+EXPORT_SYMBOL vmlinux 0xff9ca065	fb_edid_to_monspecs
+EXPORT_SYMBOL vmlinux 0xffb9cc31	simple_unlink
+EXPORT_SYMBOL vmlinux 0xffbaf306	journal_get_write_access
+EXPORT_SYMBOL vmlinux 0xffc7c184	__init_waitqueue_head
+EXPORT_SYMBOL vmlinux 0xffcdb2c0	backlight_force_update
+EXPORT_SYMBOL vmlinux 0xffd5a395	default_wake_function
+EXPORT_SYMBOL vmlinux 0xffdcde62	fb_find_mode
+EXPORT_SYMBOL_GPL arch/x86/crypto/aes-i586 0x7060bf0a	crypto_aes_encrypt_x86
+EXPORT_SYMBOL_GPL arch/x86/crypto/aes-i586 0xe409b491	crypto_aes_decrypt_x86
+EXPORT_SYMBOL_GPL arch/x86/kernel/microcode 0xdf66ca81	ucode_cpu_info
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x00aaf935	kvm_disable_tdp
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x077b3fd3	gfn_to_memslot_unaliased
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x08aff4b8	kvm_emulate_pio_string
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x094ac8f4	kvm_get_pfn
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x0a54cd1b	is_error_page
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x0bbcad3b	kvm_set_cr8
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x10987cdc	kvm_put_kvm
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x12d1b23b	kvm_release_pfn_clean
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x17f07d81	emulator_write_emulated
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1a9df35f	__tracepoint_kvm_msr
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1e4580bb	kvm_release_pfn_dirty
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x20de5193	kvm_disable_largepages
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x2322e039	kvm_set_pfn_accessed
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x2579e526	kvm_set_apic_base
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x27046576	kvm_exit
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x2a2d1550	kvm_emulate_hypercall
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x2d0ce06f	kvm_mmu_invlpg
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x2e01a2ae	kvm_mmu_load
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x308d6ef3	gfn_to_page
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x317f9e6b	kvm_enable_efer_bits
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x32c84cc9	kvm_write_guest_page
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x3b7706d2	__tracepoint_kvm_exit
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x3c3c316d	__kvm_set_memory_region
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x437e4561	kvm_emulate_cpuid
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x46126ce5	kvm_get_msr_common
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x4a7cbe69	is_error_pfn
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x4b822347	kvm_task_switch
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x4f19765e	kvm_release_page_dirty
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x5616dbcc	kvm_set_cr4
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x57475c63	kvm_set_memory_region
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x5851ab53	kvm_set_cr3
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x599086dd	kvm_handle_fault_on_reboot
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x5ebe829f	kvm_queue_exception
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x63d34944	kvm_x86_ops
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x67085af7	kvm_mmu_reset_context
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x67ce1f82	emulate_instruction
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x6974aaca	kvm_vcpu_init
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x6f17df88	kvm_put_guest_fpu
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x708d0a96	kvm_resched
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x712ff6cb	kvm_get_cs_db_l_bits
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x730124c0	kvm_clear_guest
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x76858d53	gfn_to_pfn
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x7f786a8a	fx_init
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x80dc5edc	kvm_cpu_get_interrupt
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8330c71f	kvm_get_kvm
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x87c0907a	kvm_read_guest
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8c7e9ba2	kvm_get_apic_base
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8ce4f3ab	kvm_enable_tdp
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8e7f9b47	segment_base
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x94291580	kvm_cpu_has_interrupt
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x9fd3fee2	kvm_init
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa1ea69d8	kvm_clear_guest_page
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa361bc65	kvm_set_pfn_dirty
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xab17294f	kvm_vcpu_cache
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xabacf5d9	kvm_set_msr_common
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xb2c83a33	kvm_mmu_get_spte_hierarchy
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xb2d0d2e0	kvm_get_cr8
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xb31f0d17	kvm_inject_nmi
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xb360d1a5	kvm_lmsw
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xb41b0cba	kvm_read_guest_page
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xb59c402e	kvm_emulate_halt
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbada330c	kvm_inject_pending_timer_irqs
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbd331194	kvm_queue_exception_e
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbd377dc9	kvm_mmu_set_nonpresent_ptes
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbd94103b	kvm_mmu_set_base_ptes
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbdfedd14	kvm_vcpu_on_spin
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xc36ee498	kvm_release_page_clean
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xc813d7c9	kvm_mmu_page_fault
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xcc39548b	kvm_mmu_unprotect_page_virt
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xcea5bf57	__tracepoint_kvm_page_fault
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd0b2727a	kvm_mmu_set_mask_ptes
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd296def9	kvm_is_error_hva
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd3c0a6da	__tracepoint_kvm_inj_virq
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd45ff45e	kvm_set_cr0
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd6797d31	kvm_report_emulation_failure
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xdead7e81	__tracepoint_kvm_cr
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xe991b347	kvm_set_page_dirty
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xec8653dc	kvm_load_guest_fpu
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xed58d756	kvm_require_cpl
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xef545c50	kvm_get_guest_memory_type
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xf0f9fa4f	kvm_is_visible_gfn
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xf4cfa5b0	kvm_vcpu_uninit
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xf6b24be7	kvm_emulate_pio
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xf7dc6a15	gfn_to_hva
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xfb34b4ea	load_pdptrs
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x0cc1e40f	crypto_it_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x24aac4d9	crypto_aes_expand_key
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x3dc916b6	crypto_fl_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x40d46b21	crypto_ft_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x67502576	crypto_aes_set_key
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x71dc9998	crypto_il_tab
+EXPORT_SYMBOL_GPL crypto/async_tx/async_memcpy 0x223ab5c8	async_memcpy
+EXPORT_SYMBOL_GPL crypto/async_tx/async_pq 0x432822b1	async_syndrome_val
+EXPORT_SYMBOL_GPL crypto/async_tx/async_pq 0xa2915c94	async_gen_syndrome
+EXPORT_SYMBOL_GPL crypto/async_tx/async_raid6_recov 0x7de3d56c	async_raid6_2data_recov
+EXPORT_SYMBOL_GPL crypto/async_tx/async_raid6_recov 0xcbe538c2	async_raid6_datap_recov
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x2c10c4c9	__async_tx_find_channel
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x62543a72	async_trigger_callback
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0xba80560c	async_tx_submit
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0xf3da8aef	async_tx_quiesce
+EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0x6292813b	async_xor_val
+EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0xdb1e43b3	async_xor
+EXPORT_SYMBOL_GPL crypto/cryptd 0x1ff2167a	cryptd_alloc_ahash
+EXPORT_SYMBOL_GPL crypto/cryptd 0x2d589274	cryptd_free_ahash
+EXPORT_SYMBOL_GPL crypto/cryptd 0x38d1f871	cryptd_ablkcipher_child
+EXPORT_SYMBOL_GPL crypto/cryptd 0x99c82acd	cryptd_alloc_ablkcipher
+EXPORT_SYMBOL_GPL crypto/cryptd 0xb0cb3b8f	cryptd_shash_desc
+EXPORT_SYMBOL_GPL crypto/cryptd 0xc8feb63d	cryptd_ahash_child
+EXPORT_SYMBOL_GPL crypto/cryptd 0xe44d2bef	cryptd_free_ablkcipher
+EXPORT_SYMBOL_GPL crypto/des_generic 0xcfd9a2c0	des_ekey
+EXPORT_SYMBOL_GPL crypto/twofish_common 0x13ee602f	twofish_setkey
+EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x02ff9464	cfag12864b_isinited
+EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x0ecb2e5d	cfag12864b_disable
+EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x305dc3c6	cfag12864b_isenabled
+EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x3389f926	cfag12864b_enable
+EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x9522a342	cfag12864b_getrate
+EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0xc48e9d95	cfag12864b_buffer
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x14102f23	ks0108_displaystate
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x48a70518	ks0108_writedata
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x4f506333	ks0108_startline
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x6edae968	ks0108_isinited
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xbf4774db	ks0108_writecontrol
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xedde6df2	ks0108_page
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xfee8ef7b	ks0108_address
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0x5f778eb6	btmrvl_send_module_cfg_cmd
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0x70338fc0	btmrvl_process_event
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0x71384303	btmrvl_interrupt
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0x714f0b86	btmrvl_add_card
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0x8732a03b	btmrvl_remove_card
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0x8f07ed2b	btmrvl_check_evtpkt
+EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0xd5db7f15	agp_remove_bridge
+EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0xd6feefa5	agp_num_entries
+EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0xe089cfcc	agp_memory_reserved
+EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0xecabdf48	agp_add_bridge
+EXPORT_SYMBOL_GPL drivers/char/scx200_gpio 0xe878560a	scx200_gpio_ops
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x0280ac68	tpm_store_cancel
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x19f0427b	tpm_show_pubek
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x206d7924	tpm_dev_release
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x3505b8ee	tpm_pm_resume
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x466bf130	tpm_continue_selftest
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x4f7f5d3f	tpm_show_enabled
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x53e933ef	tpm_register_hardware
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x66506c50	tpm_show_timeouts
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x73e1a5a3	tpm_show_owned
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x74c68f77	tpm_show_caps_1_2
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x7d0e4ef8	tpm_release
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x9af5008d	tpm_read
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x9d69e106	tpm_open
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xa495a69b	tpm_pm_suspend
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xadf6aa4d	tpm_pcr_read
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xb6869ffd	tpm_remove_hardware
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xb931fa2a	tpm_show_temp_deactivated
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xc37226a5	tpm_pcr_extend
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xcfbfd655	tpm_write
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xd5f3e9aa	tpm_get_timeouts
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xd6942bf9	tpm_show_pcrs
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xda75487b	tpm_gen_interrupt
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xdf706a75	tpm_show_caps
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xf8698d80	tpm_show_active
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xfc0d1ae6	tpm_calc_ordinal_duration
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xff6e84e3	tpm_dev_vendor_release
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm_bios 0x60796d90	tpm_bios_log_setup
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm_bios 0x837d0d97	tpm_bios_log_teardown
+EXPORT_SYMBOL_GPL drivers/dca/dca 0x0e2d7723	register_dca_provider
+EXPORT_SYMBOL_GPL drivers/dca/dca 0x2e471f01	dca_register_notify
+EXPORT_SYMBOL_GPL drivers/dca/dca 0x31a2c8df	dca_get_tag
+EXPORT_SYMBOL_GPL drivers/dca/dca 0x62bf850c	free_dca_provider
+EXPORT_SYMBOL_GPL drivers/dca/dca 0x6456b131	dca3_get_tag
+EXPORT_SYMBOL_GPL drivers/dca/dca 0x8006c614	dca_unregister_notify
+EXPORT_SYMBOL_GPL drivers/dca/dca 0xbfc94adb	dca_add_requester
+EXPORT_SYMBOL_GPL drivers/dca/dca 0xd30e7c55	alloc_dca_provider
+EXPORT_SYMBOL_GPL drivers/dca/dca 0xf64d8d24	dca_remove_requester
+EXPORT_SYMBOL_GPL drivers/dca/dca 0xf92f96b5	unregister_dca_provider
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x06b77d91	edac_device_del_device
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x09fe6370	edac_mc_handle_ue
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x0c32ff8a	edac_pci_alloc_index
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x0d125240	edac_device_handle_ce
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x1b701f71	edac_mc_handle_ce
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x2680c1f3	edac_mc_handle_ue_no_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x3a6ff0da	edac_pci_free_ctl_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x4872012a	edac_mc_add_mc
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x4f6423f0	edac_mc_handle_ce_no_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x5ef607c4	edac_pci_del_device
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x64d5b771	edac_pci_reset_delay_period
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x666c5944	edac_mc_alloc
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x6e3ff83a	edac_device_alloc_index
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x73be2d92	edac_device_add_device
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x818406aa	edac_mc_del_mc
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x8f2f203e	edac_pci_alloc_ctl_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x93a0bf77	edac_mc_find_csrow_by_page
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x9ef106f8	edac_device_alloc_ctl_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xac5c45b5	edac_pci_release_generic_ctl
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xb63a4193	edac_device_handle_ue
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xdaf5ae6f	edac_pci_handle_pe
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xe124fefd	edac_mc_free
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xe9adee7a	edac_pci_add_device
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xef0910ff	edac_pci_create_generic_ctl
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xf0ebd8cb	edac_device_free_ctl_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xfc31ded2	edac_pci_handle_npe
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0x0f0ba55e	ii_msgs
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0x14878009	amd_report_gart_errors
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0x1823885a	amd_register_ecc_decoder
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0x4b01887d	pp_msgs
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0x7509830f	to_msgs
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0x955c1f76	amd_decode_nb_mce
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0xb98537cb	rrrr_msgs
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0xc2e765d2	amd_unregister_ecc_decoder
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0xd0f094a0	ext_msgs
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0xe6ff7e0c	ll_msgs
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0xf8dec080	tt_msgs
+EXPORT_SYMBOL_GPL drivers/gpu/drm/drm 0x00049eb9	drm_class_device_register
+EXPORT_SYMBOL_GPL drivers/gpu/drm/drm 0xbfde1872	drm_class_device_unregister
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x05495392	hid_debug
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x0aac9b0a	hid_report_raw_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x0eeb8aaa	hidraw_report_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x10568041	hid_add_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x13884d9f	hid_output_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x1b4f6370	hid_destroy_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x2e53f36b	hid_check_keys_pressed
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x356d4a06	hid_unregister_driver
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x373e2b57	hid_allocate_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x386fe747	hid_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x43208ed2	hidraw_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x561acc7a	hidinput_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x56939434	hid_debug_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x57c8d26f	hid_dump_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x6615aef6	hid_parse_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x684390ad	hid_resolv_usage
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x693a782a	hid_set_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x7cb37dd8	hid_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xb81bbec4	hidraw_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xcbfe6e65	hidinput_report_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xcc085bf6	hid_dump_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xcd15486d	hidinput_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xcf1ef716	__hid_register_driver
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xd299e174	hid_dump_input
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xf6b22c28	hid_input_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xfded8624	hidinput_find_field
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x01fd453e	usbhid_lookup_quirk
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x1c5cd3e4	usbhid_set_leds
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x2cd9ef0f	usbhid_submit_report
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x710d116f	hiddev_hid_event
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x4670ee33	lis3_dev
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x61ed49ad	lis3lv02d_init_device
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x6a9c9b7c	lis3lv02d_poweron
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x6c33e494	lis3lv02d_joystick_disable
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x9e083b80	lis3lv02d_remove_fs
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xd879edd1	lis3lv02d_poweroff
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xe6af28c8	lis3lv02d_joystick_enable
+EXPORT_SYMBOL_GPL drivers/i2c/busses/i2c-nforce2 0xc2a87028	nforce2_smbus
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0xb3cb2980	hpsb_config_rom_ip1394_remove
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0xb8e0229a	hpsb_config_rom_ip1394_add
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0xec8d18cf	hpsb_disable_irm
+EXPORT_SYMBOL_GPL drivers/input/ff-memless 0x375b5eaf	input_ff_create_memless
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x1cc45428	wm97xx_reg_read
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x365d66cd	wm97xx_unregister_mach_ops
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x3f3ad8f9	wm97xx_set_suspend_mode
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x5f5b1ea7	wm97xx_get_gpio
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x7068dded	wm9713_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x760005c0	wm97xx_reg_write
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xa17cc029	wm9705_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xbaf779cf	wm97xx_register_mach_ops
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xbcc2dd73	wm9712_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xc1d5f663	wm97xx_read_aux_adc
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xe1f3ef70	wm97xx_config_gpio
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xe8182076	wm97xx_set_gpio
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x031ba718	gigaset_initcs
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x09ecae69	gigaset_shutdown
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x3b6350f3	gigaset_initdriver
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x437b3330	gigaset_stop
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x454aa44f	gigaset_debuglevel
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x4c1cd366	gigaset_blockdriver
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x4e792275	gigaset_dbg_buffer
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x6b967818	gigaset_skb_sent
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x739c52e8	gigaset_if_receive
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x74bd0ded	gigaset_freecs
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x9331a405	gigaset_start
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x9a8d0cf1	gigaset_fill_inbuf
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xc15313da	gigaset_handle_modem_response
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xd3981ad0	gigaset_m10x_send_skb
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xe5f6c0c8	gigaset_m10x_input
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xf1eb32ef	gigaset_freedriver
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xfef44a55	gigaset_add_event
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0x86d2618c	led_classdev_resume
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0xdcfd9303	led_classdev_suspend
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0xf258cf55	led_classdev_unregister
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0xf796213e	led_classdev_register
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0x05513b71	raid6_call
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0x0b8ef590	raid6_2data_recov
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0x4a48d81c	raid6_datap_recov
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x0349c9bd	ir_codes_proteus_2309_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x0366dcdf	ir_codes_videomate_s350_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x110b053a	ir_codes_pixelview_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x124cb753	ir_codes_encore_enltv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x183fdfdd	ir_codes_gotview7135_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x19b4d61c	ir_codes_nebula_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x19cd2826	ir_codes_behold_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x1a9009d6	ir_codes_dm1105_nec_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x1cb148f5	ir_extract_bits
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x1dc126c5	ir_input_init
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2456e513	ir_decode_pulsedistance
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2cc459b5	ir_codes_flydvb_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2d0e9a49	ir_codes_em_terratec_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3136d8ff	ir_codes_dntv_live_dvbt_pro_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x32b9033b	ir_codes_apac_viewcomp_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3909f4ad	ir_codes_terratec_cinergy_xs_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3a84be27	ir_codes_avermedia_a16d_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x4267d749	ir_codes_budget_ci_old_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x43c89ef4	ir_decode_biphase
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x4c1442c1	ir_codes_real_audio_220_32_keys_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x51ba1643	ir_codes_kworld_plus_tv_analog_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x543db4ff	ir_codes_avermedia_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x5e95da31	ir_codes_tt_1500_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x5fbe6515	ir_codes_pinnacle_color_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x61d039d7	ir_codes_behold_columbus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6427a3fb	ir_codes_pinnacle_grey_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x64b02fed	ir_codes_avermedia_dvbt_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6606596a	ir_rc5_timer_keyup
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6809de82	ir_codes_pctv_sedna_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6d6511e7	ir_dump_samples
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x703fc738	ir_codes_avertv_303_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x7283f81d	ir_codes_purpletv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x72c2992e	ir_codes_powercolor_real_angel_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x76d71b8e	ir_codes_dntv_live_dvb_t_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x784e176d	ir_codes_asus_pc39_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x828b3ce5	ir_codes_encore_enltv_fm53_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x8acae3dd	ir_codes_pinnacle_pctv_hd_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x92d1d181	ir_codes_flyvideo_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x94651dab	ir_codes_ati_tv_wonder_hd_600_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x97c35dab	ir_codes_msi_tvanywhere_plus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x9944e2e5	ir_codes_hauppauge_new_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xa69aa6ad	ir_codes_pv951_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xa95157c5	ir_codes_cinergy_1400_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xac15f6c8	ir_codes_kaiomy_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xaff22e87	ir_codes_pixelview_new_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb01a1998	ir_codes_manli_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb0a8ef38	ir_codes_rc5_tv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb57445f7	ir_codes_eztv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb5adb754	ir_codes_cinergy_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xbd3ce6f0	ir_codes_avermedia_cardbus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xbeaccbdc	ir_codes_gadmei_rm008z_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xbec93bd3	ir_input_keydown
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xc3bf3dea	ir_input_nokey
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xcba36c62	ir_codes_videomate_tv_pvr_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xd30c491f	ir_codes_norwood_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xdc23fec4	ir_codes_fusionhdtv_mce_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xdd4c0a07	ir_codes_evga_indtube_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xe1101f4d	ir_codes_avermedia_m135a_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xe4140c60	ir_codes_genius_tvgo_a11mce_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xeb9bb08f	ir_codes_npgtech_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xebf345b4	ir_codes_encore_enltv2_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xeec89db8	ir_codes_empty_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xef29c40d	ir_codes_adstech_dvb_t_pci_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf33c155d	ir_codes_msi_tvanywhere_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf3d619ec	ir_codes_iodata_bctv7e_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf4f7a4d6	ir_rc5_timer_end
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf5e15e65	ir_codes_winfast_table
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x0473fee9	saa7146_vmalloc_build_pgtable
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x12aa931f	saa7146_vfree_destroy_pgtable
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x285fa119	saa7146_pgtable_free
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x4be74956	saa7146_setgpio
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x5bae55a7	saa7146_register_extension
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x84c857c3	saa7146_devices_lock
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x8d91b65e	saa7146_pgtable_alloc
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x99a3a1f0	saa7146_unregister_extension
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x9f9e94d0	saa7146_i2c_adapter_prepare
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xcf683cf2	saa7146_devices
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xe3cd9b5c	saa7146_debug
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xe5798c34	saa7146_pgtable_build_single
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xf97019c8	saa7146_wait_for_debi_done
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x06bf86fb	saa7146_unregister_device
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x11d6430b	saa7146_register_device
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x2ee1a275	saa7146_vv_release
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x53b4446d	saa7146_set_hps_source_and_sync
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x84072335	saa7146_stop_preview
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xb12e54b4	saa7146_vv_init
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xfad9f47a	saa7146_start_preview
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/mt20xx 0x4aa337fd	microtune_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/mxl5007t 0x8005e9b3	mxl5007t_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda18271 0xf6b9801d	tda18271_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda827x 0xfe3c8c5f	tda827x_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda8290 0x050016fe	tda829x_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda8290 0x06c1c4f1	tda829x_probe
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda9887 0xe581ae1a	tda9887_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5761 0x2dece2b4	tea5761_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5761 0xe9123b7d	tea5761_autodetection
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5767 0x17a41c1e	tea5767_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5767 0x7fa0d0ff	tea5767_autodetection
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tuner-simple 0xa7dadb34	simple_tuner_attach
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x21e36bf2	smscore_registry_getmode
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x23e3af61	sms_board_event
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x37d91069	smsendian_handle_tx_message
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x45284ae9	smsendian_handle_rx_message
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x585969c7	smscore_onresponse
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x6a849aaa	sms_board_lna_control
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x74ee9098	sms_board_load_modules
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x74f335bc	sms_board_power
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x77a655c4	smscore_set_board_id
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x7c576277	smsendian_handle_message_header
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x8cd48e60	smsclient_sendrequest
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x93f0fabf	smscore_register_hotplug
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xa2c1b18b	smscore_register_client
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xa7f844e4	smscore_unregister_client
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xa8499cfb	smscore_putbuffer
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xad96f67c	sms_board_setup
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xaf117c6c	smscore_unregister_hotplug
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xb418c3be	smscore_get_device_mode
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xcdf3e7fa	sms_board_led_feedback
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xcfa910a6	smscore_start_device
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xd6292e17	smscore_unregister_device
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xd9cdfded	smscore_register_device
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xe970f332	smscore_getbuffer
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xf47ddc90	smscore_get_board_id
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xfda878c5	sms_get_board
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x0e567e92	ttpci_budget_irq10_handler
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x110ecac9	ttpci_budget_deinit
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x1b85290f	ttpci_budget_init
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x65d7c094	ttpci_budget_init_hooks
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x685023d4	ttpci_budget_debiwrite
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x6a920e33	ttpci_budget_set_video_port
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x7948c222	budget_debug
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x91b6ca82	ttpci_budget_debiread
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x017ea7c7	cx231xx_tuner_callback
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x137da4b2	cx231xx_send_usb_command
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x22f6ddc6	cx231xx_init_vbi_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x2fe1eb39	cx231xx_set_mode
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x33318268	cx231xx_set_alt_setting
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x44fd6771	cx231xx_uninit_vbi_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x6f1ea384	cx231xx_init_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x736abc1a	cx231xx_dev_uninit
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x777c35e7	cx231xx_uninit_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xcb4f23ac	cx231xx_send_gpio_cmd
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xcbeaf1e7	cx231xx_capture_start
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xda5d35d9	cx231xx_dev_init
+EXPORT_SYMBOL_GPL drivers/media/video/cx88/cx88xx 0x154952bc	cx88_setup_xc3028
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x47e35a89	em28xx_isoc_dvb_max_packetsize
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x7d503213	em28xx_init_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x7fc8652c	em28xx_tuner_callback
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x85eb55f6	em28xx_audio_analog_set
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x94cda690	em28xx_uninit_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x9da12686	em28xx_set_mode
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0xf3897de0	em28xx_audio_setup
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x69eec1b3	saa7134_s_ctrl_internal
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x77e016cb	saa7134_queryctrl
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0xce6d8e37	saa7134_s_std_internal
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0xd368a0d0	saa7134_g_ctrl_internal
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0xdd0c74c0	saa7134_ts_qops
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x3dcfc825	v4l2_i2c_subdev_addr
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x5a814bac	v4l2_i2c_new_subdev_board
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x5e938b25	v4l2_i2c_new_subdev_cfg
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xdbb4800c	v4l2_i2c_subdev_init
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xf2a353ac	v4l2_i2c_tuner_addrs
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xf5ef842e	v4l_bound_align_image
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x0e5bb3c9	v4l2_int_ioctl_1
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x1fbf7b0a	v4l2_int_ioctl_0
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x32ac9481	v4l2_int_device_register
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xa5228b24	v4l2_int_device_try_attach_all
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xcce29c1c	v4l2_int_device_unregister
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x087a4387	videobuf_read_start
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x088ee90d	videobuf_dqbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x15f8ef45	videobuf_iolock
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x1fb26abe	videobuf_reqbufs
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x20146eb4	videobuf_read_stop
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x33ca5162	videobuf_queue_to_vmalloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x43f1bb68	videobuf_next_field
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x4666bfe0	videobuf_cgmbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x4696dcc0	videobuf_mmap_free
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x4a9cd6e7	videobuf_streamoff
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x4ab69621	videobuf_queue_cancel
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x4d955ea7	videobuf_read_stream
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x55d14eb0	videobuf_poll_stream
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x6b691e16	videobuf_waiton
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x6ecb76c1	videobuf_qbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x714856c7	videobuf_mmap_mapper
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x93f712f3	videobuf_read_one
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x9476554a	videobuf_queue_core_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x94db3ed0	videobuf_stop
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x971d36f1	videobuf_mmap_setup
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x999f5a2b	videobuf_alloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xb9210127	videobuf_queue_is_busy
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xb99dc38a	__videobuf_mmap_setup
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xd705abf5	videobuf_querybuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xdd6a548f	videobuf_streamon
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x1185134e	videobuf_dma_init_user
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x40d5c611	videobuf_to_dma
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x57a2a738	videobuf_dma_init_kernel
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x5d788bed	videobuf_queue_sg_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x830012f6	videobuf_dma_free
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x90fc9c5c	videobuf_sg_dma_unmap
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x933dfb43	videobuf_vmalloc_to_sg
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xa825c75b	videobuf_sg_alloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xad01d499	videobuf_dma_map
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xbd642ca3	videobuf_dma_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xd7ca862f	videobuf_sg_dma_map
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xdbca1c10	videobuf_dma_init_overlay
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xe6079bbe	videobuf_dma_sync
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xeb2290a7	videobuf_dma_unmap
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0x32679787	videobuf_to_vmalloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0x3f8a17da	videobuf_vmalloc_free
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0xfab08928	videobuf_queue_vmalloc_init
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x0a619e12	v4l2_device_set_name
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x36820744	v4l2_device_disconnect
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x46e64c1e	v4l2_device_register_subdev
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0xa2792e32	v4l2_device_unregister
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0xaad22684	v4l2_device_unregister_subdev
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0xe7bdc94e	v4l2_device_register
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x0c7bd418	i2o_dma_map_sg
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x12806222	i2o_dma_free
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x49df3d18	i2o_dma_alloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x768d3f6d	i2o_pool_free
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x93eb2092	i2o_dma_realloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x97cc3cdc	i2o_sg_tablesize
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xc24ede98	i2o_pool_alloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xcfd14b78	i2o_dma_map_single
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x01155b36	mc13783_adc_set_ts_status
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x6c97dca5	mc13783_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x7fcf6efa	mc13783_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0xa1c6e8a7	mc13783_adc_do_conversion
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0xb6525bd6	mc13783_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0xcbbecda4	mc13783_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0xed5fe09f	mc13783_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-adc 0x440d3acf	pcf50633_adc_async_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-adc 0x7edab522	pcf50633_adc_sync_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x0af1d7ef	pcf50633_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x2206c040	pcf50633_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x4c7430f3	pcf50633_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x7580f8f3	pcf50633_reg_set_bit_mask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x773c2a79	pcf50633_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x8931d854	pcf50633_write_block
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x9303705e	pcf50633_irq_unmask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x98cdb730	pcf50633_irq_mask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xbd0e7592	pcf50633_irq_mask_get
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xc6aba0dc	pcf50633_reg_clear_bits
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xcbf26e03	pcf50633_read_block
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x93be9870	pcf50633_gpio_get
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0xba8b4b81	pcf50633_gpio_set
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0xdcc29992	pcf50633_gpio_power_supply_set
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0xfd93929f	pcf50633_gpio_invert_get
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0xfe01458a	pcf50633_gpio_invert_set
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x543e94dc	sm501_unit_power
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x98c9fed4	sm501_modify_reg
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0xafe75e05	sm501_set_clock
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0xd5c82d87	sm501_misc_control
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0xe4c095ab	sm501_find_clock
+EXPORT_SYMBOL_GPL drivers/mfd/ucb1400_core 0xf582c3e8	ucb1400_adc_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x1850e815	wm831x_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x1edb999c	wm831x_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x3065e7b3	wm831x_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x3a02e56f	wm831x_request_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x496f7d4d	wm831x_enable_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x5769d38a	wm831x_disable_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x5d68d85f	wm831x_bulk_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x65c7c184	wm831x_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x78cc2c99	wm831x_reg_lock
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x7dab26b6	wm831x_isinkv_values
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x998d08a5	wm831x_auxadc_read_uv
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xaf2ea60e	wm831x_reg_unlock
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xe7002d8a	wm831x_auxadc_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x01671d72	wm8350_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x19642dff	wm8350_reg_unlock
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x5253e72d	wm8350_gpio_config
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x552d95f6	wm8350_mask_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x56cc33b1	wm8350_reg_lock
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x61cbd25f	wm8350_unmask_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x65608f13	wm8350_device_exit
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x712e4646	wm8350_clear_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x810a8226	wm8350_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xbc11ea88	wm8350_block_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xc3ec1f01	wm8350_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xcd10b3af	wm8350_block_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xdc58433d	wm8350_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xdd4eed58	wm8350_read_auxadc
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xe7745aa9	wm8350_device_init
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xf8c15784	wm8350_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x67dbe8b5	wm8400_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x9f999c26	wm8400_reset_codec_reg_cache
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0xe5bc32b3	wm8400_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0xfab4a785	wm8400_block_read
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x0a7416c6	cb710_sg_dwiter_read_next_block
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x38014e9e	cb710_set_irq_handler
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x40c7f818	cb710_sg_dwiter_write_next_block
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x91c3e9c5	cb710_pci_update_config_reg
+EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x2df115d4	eeprom_93cx6_multiread
+EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x63d14d2f	eeprom_93cx6_read
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x37ba2c32	enclosure_component_register
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x82f72eae	enclosure_find
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0xa6ac9afa	enclosure_add_device
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0xcc1afc0d	enclosure_register
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0xe217de0b	enclosure_unregister
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0xf01665be	enclosure_for_each_device
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0xf4cde7fb	enclosure_remove_device
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x3b6713e5	sdhci_resume_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x5b217720	sdhci_remove_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x6d632866	sdhci_free_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x792519db	sdhci_add_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x915bd309	sdhci_suspend_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xe6f4a267	sdhci_alloc_host
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x93010640	cfi_cmdset_0200
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0xc5711515	cfi_cmdset_0001
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0xec6beeb6	cfi_cmdset_0003
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0002 0x155e1047	cfi_cmdset_0002
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0020 0x73b2034d	cfi_cmdset_0020
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x2a187210	cfi_qry_mode_on
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0xbc224b7d	cfi_qry_present
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0xc51cae27	cfi_qry_mode_off
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2000 0xabfb3c45	DoC2k_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001 0xfa286fcb	DoCMil_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001plus 0xa86f0b00	DoCMilPlus_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/docecc 0x45937659	doc_decode_ecc
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x076e40d5	mtd_table
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x3cb5d60a	mtd_table_mutex
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x3d900c94	add_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x61141289	parse_mtd_partitions
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x73c2d225	put_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x7c7001b8	get_sb_mtd
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x8c118eb0	register_mtd_user
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x9031e98a	kill_mtd_super
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x9879bc5f	default_mtd_writev
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xa20f8a1a	del_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xc42262a3	register_mtd_parser
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xc4a79b3c	unregister_mtd_user
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xd4ee05ba	get_mtd_device_nm
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xe4db811a	get_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xed0632bf	deregister_mtd_parser
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xfd423f8d	mtd_erase_callback
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x0bb34672	del_mtd_blktrans_dev
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x6de6f33c	add_mtd_blktrans_dev
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x9cc6bf3c	deregister_mtd_blktrans
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x9ff4c378	register_mtd_blktrans
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x063f71e0	nand_scan_tail
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x0cc3887a	nand_scan_ident
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x87ec4c3c	nand_scan
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xb1c27b2c	nand_wait_ready
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xcc9e6566	nand_release
+EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0xb08a4a27	onenand_scan
+EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0xe7351456	onenand_release
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x0a43f834	ubi_leb_unmap
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x1b498b7c	ubi_get_volume_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x2ad10920	ubi_do_get_device_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x40638a5c	ubi_leb_write
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x42801d20	ubi_sync
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x6b004ea0	ubi_close_volume
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x6f09ba8a	ubi_register_volume_notifier
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x75edd409	ubi_is_mapped
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x87b5d461	ubi_open_volume
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x90cd3124	ubi_leb_erase
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x955a2ca0	ubi_leb_map
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xa006bfcc	ubi_leb_read
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xbc505df4	ubi_get_device_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xd9d6ca8c	ubi_leb_change
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xfd6f0ef9	ubi_unregister_volume_notifier
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xff1f488c	ubi_open_volume_nm
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x413b5c43	close_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x67c80470	register_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x8820e3b7	can_get_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x92a40da9	can_bus_off
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xa3e0e56b	open_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xb00d2002	alloc_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xbc7fc442	can_free_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xc1432887	free_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xceb39be8	can_put_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xdc98be73	unregister_candev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x6b9fd6be	alloc_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x9227e315	register_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xcff7c1da	free_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xdc9bd500	sja1000_interrupt
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xf1a06564	unregister_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x0649aab6	mlx4_fmr_enable
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x080143c4	mlx4_free_hwq_res
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x0b036c30	mlx4_INIT_PORT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x0bd90534	mlx4_alloc_cmd_mailbox
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x12447f61	mlx4_cq_resize
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1a875232	mlx4_mtt_addr
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1c4e5f42	mlx4_pd_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x268c14f0	mlx4_mtt_cleanup
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x27c12c71	mlx4_srq_arm
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x316efe74	mlx4_map_phys_fmr
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x33307e44	mlx4_uar_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x39cc259f	mlx4_mr_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x40d7049b	mlx4_db_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x425b800e	mlx4_register_vlan
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x44ebf29e	mlx4_CLOSE_PORT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x4536a128	mlx4_cq_modify
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x4c13fc52	mlx4_srq_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x4f94116c	mlx4_mr_enable
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x504400f3	mlx4_free_cmd_mailbox
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x5481ed23	mlx4_alloc_hwq_res
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x5d42b66b	mlx4_register_mac
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x5f00bce1	mlx4_unregister_mac
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x5f0f0c1d	mlx4_qp_modify
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x604310f6	mlx4_qp_release_range
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x65884ffc	mlx4_mr_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x6862cf59	mlx4_qp_remove
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x6b9aa971	mlx4_write_mtt
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x754eda68	mlx4_qp_query
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x7865e0ff	mlx4_cq_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x7951ebf8	mlx4_buf_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x84f8cb85	__mlx4_cmd
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x855ec85a	mlx4_qp_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x85f0a493	mlx4_fmr_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x863d7353	mlx4_qp_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x89cd260b	mlx4_cq_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x8be4f57c	mlx4_qp_reserve_range
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x8d126459	mlx4_multicast_detach
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x95a19d96	mlx4_register_interface
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x98a680a3	mlx4_fmr_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9b4b8f7c	mlx4_SYNC_TPT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa688b677	mlx4_fmr_unmap
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xacbf8c02	mlx4_qp_to_ready
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb7a42c57	mlx4_unregister_vlan
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd4a934f5	mlx4_pd_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xda65f70f	mlx4_srq_query
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xdd8ceb43	mlx4_mtt_init
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe512cd08	mlx4_buf_write_mtt
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe66224a9	mlx4_srq_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe93e78f8	mlx4_uar_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xeae25ed5	mlx4_buf_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xecad4f60	mlx4_db_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xeef62dd8	mlx4_multicast_attach
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf6ed857c	mlx4_unregister_interface
+EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0x41670528	usbnet_generic_cdc_bind
+EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0xfe343dc9	usbnet_cdc_unbind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x00d1e2a8	rndis_command
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x0454ec16	rndis_unbind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x16b818e2	rndis_tx_fixup
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x98300e81	generic_rndis_bind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x99910130	rndis_rx_fixup
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xa7114778	rndis_status
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x09175e47	usbnet_get_msglevel
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x13a13469	usbnet_skb_return
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x2a81bcc1	usbnet_get_ethernet_addr
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x2bc4dc10	usbnet_disconnect
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x415691db	usbnet_purge_paused_rxq
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x4c953c78	usbnet_set_msglevel
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x5c027f7f	usbnet_get_settings
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x60b39fd3	usbnet_suspend
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x66bac9bd	usbnet_probe
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x6e22b21f	usbnet_resume
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x6e926bda	usbnet_defer_kevent
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x713a44a3	usbnet_stop
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x7e5816a3	usbnet_tx_timeout
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x8540a63e	usbnet_get_link
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x97468aae	usbnet_open
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x9a3a62bc	usbnet_get_endpoints
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x9c9d6d41	usbnet_pause_rx
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xa7db4041	usbnet_nway_reset
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xbe1611fd	usbnet_resume_rx
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xc54ed438	usbnet_set_settings
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xc77ab3f2	usbnet_change_mtu
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xca6d6f09	usbnet_start_xmit
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xd2046959	usbnet_get_drvinfo
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xfa65b7d7	usbnet_unlink_rx_urbs
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x03f60b65	i2400m_tx
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x52164422	i2400m_cmd_get_state
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x719b6aa9	i2400m_tx_msg_get
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x76341921	i2400m_queue_work
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x83b728a8	i2400m_setup
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x85358576	i2400m_netdev_setup
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x9a09b123	i2400m_dev_reset_handle
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xa01cbb1a	i2400m_rx
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xaa585c5e	i2400m_cmd_enter_powersave
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xb00b793c	i2400m_bm_cmd_prepare
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xbb4cf143	i2400m_release
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xda1b2d82	i2400m_tx_msg_sent
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xec562919	i2400m_set_init_config
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xff02089a	i2400m_dev_bootstrap
+EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0x1c820b19	libipw_debug_level
+EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0xe3d00c89	libipw_rx_any
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x026ce4f6	lbs_stop_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x1e6418ab	lbs_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x2691de87	lbs_host_to_card_done
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x52e625e1	lbs_host_sleep_cfg
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x60c7e827	lbs_add_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x63b42ce6	lbs_cmd_802_11_rate_adapt_rateset
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x687437e7	lbs_queue_event
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x6b3d1001	__lbs_cmd
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x9408f120	lbs_remove_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x9c23688e	lbs_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xaddab456	lbs_start_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xb7053ff9	lbs_process_rxed_packet
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xbe78c8fc	lbs_notify_command_response
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xbece8fea	lbs_cmd_copyback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf64277de	lbs_debug
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf951e3a4	lbs_send_tx_feedback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x327fce2e	__lbtf_cmd
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x6335b2df	lbtf_cmd_copyback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x9560313b	lbtf_cmd_response_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xa930f112	lbtf_remove_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xaeff4c41	lbtf_add_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xc48454c7	lbtf_bcn_sent
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xf0b87be0	lbtf_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xf5606848	lbtf_send_tx_feedback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0x5a7d4603	if_usb_reset_device
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0xa15a0d3c	if_usb_prog_firmware
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x136b32e1	p54_init_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x3d86aa9f	p54_parse_eeprom
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x42387d0a	p54_parse_firmware
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x80b0139a	p54_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xa7b35249	p54_read_eeprom
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xab0ca11e	p54_register_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xc531bd47	p54_free_skb
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xcccdff42	p54_unregister_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xe2a6ac2c	p54_free_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x0a4631c6	rt2x00mac_get_stats
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x16c0249f	rt2x00queue_get_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x299678ac	rt2x00mac_bss_info_changed
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x2fbd026e	rt2x00mac_add_interface
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x2fbd698f	rt2x00queue_map_txskb
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x315cce44	rt2x00mac_config
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x4ce04915	rt2x00mac_start
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x4e22e4dc	rt2x00mac_configure_filter
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x5e17c03d	rt2x00lib_beacondone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x65b58a18	rt2x00mac_set_key
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x679b65ec	rt2x00lib_rxdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x892b6b93	rt2x00mac_remove_interface
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x90244a47	rt2x00mac_rfkill_poll
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x980bdb0d	rt2x00mac_get_tx_stats
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x98e98f62	rt2x00mac_conf_tx
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x9b082658	rt2x00lib_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xae8d73f9	rt2x00mac_stop
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xb342c4ac	rt2x00mac_tx
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xb4f2d301	rt2x00lib_txdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xc17d61f3	rt2x00lib_remove_dev
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xd0fc6238	rt2x00lib_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xd7379295	rt2x00queue_get_entry
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xdfdafcc3	rt2x00lib_probe_dev
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xfa620cc0	rt2x00mac_set_tim
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x170e6a1e	rt2x00pci_write_tx_data
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x3587ad2a	rt2x00pci_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x4741c769	rt2x00pci_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x5a277f1a	rt2x00pci_remove
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x5af2bc9a	rt2x00pci_uninitialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x5c513181	rt2x00pci_regbusy_read
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x62b3b61d	rt2x00pci_probe
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x7ae70a46	rt2x00pci_initialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xda43560b	rt2x00pci_rxdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x00b74a28	rt2x00usb_vendor_request
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x2737a9b1	rt2x00usb_probe
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x37bcbe3a	rt2x00usb_write_tx_data
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x6bd3c92a	rt2x00usb_vendor_request_large_buff
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x75676cd8	rt2x00usb_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x76ba16eb	rt2x00usb_initialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x8b78bea7	rt2x00usb_disconnect
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x9042a461	rt2x00usb_clear_entry
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x9fcd2677	rt2x00usb_uninitialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xa726993e	rt2x00usb_kill_tx_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xaccb8d63	rt2x00usb_vendor_req_buff_lock
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xb6c4963d	rt2x00usb_kick_tx_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xbbb41c7e	rt2x00usb_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xcefadd32	rt2x00usb_vendor_request_buff
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xda56e2c8	rt2x00usb_regbusy_read
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xe614366c	rt2x00usb_disable_radio
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0x6278ebc4	wl1251_init_ieee80211
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0xacbdd9ad	wl1251_alloc_hw
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0xd6cb1a93	wl1251_free_hw
+EXPORT_SYMBOL_GPL drivers/pci/hotplug/acpiphp 0x79281bed	acpiphp_unregister_attention
+EXPORT_SYMBOL_GPL drivers/pci/hotplug/acpiphp 0xe8b3bc02	acpiphp_register_attention
+EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0x3a3c32c6	pcf50633_mbc_get_status
+EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0x4565f11a	pcf50633_mbc_usb_curlim_set
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x0cd98407	wm8350_register_led
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x366b216b	wm8350_isink_set_flash
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x5c2453ca	wm8350_dcdc25_set_mode
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x8dbda085	wm8350_ldo_set_slot
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xc5181348	wm8350_dcdc_set_slot
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xfb0c1eb0	wm8350_register_regulator
+EXPORT_SYMBOL_GPL drivers/regulator/wm8400-regulator 0x8dff6111	wm8400_register_regulator
+EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x0a5d0063	fcoe_libfc_config
+EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x374c1e1c	fcoe_wwn_from_mac
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x021b0fab	iscsi_eh_device_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0233f349	iscsi_pool_init
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x03fcdd17	iscsi_conn_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x048e222a	iscsi_host_set_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x04cebb95	iscsi_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x141a92f2	iscsi_host_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x1ab8eca5	iscsi_host_remove
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x2456b7bb	iscsi_put_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x306eca26	iscsi_queuecommand
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x31026d94	iscsi_conn_send_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x33074f62	iscsi_suspend_tx
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x41ba1d14	iscsi_pool_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4b337078	iscsi_suspend_queue
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4dfcc32b	iscsi_session_failure
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x512c5ac1	iscsi_itt_to_ctask
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5541b58f	iscsi_itt_to_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5c4098c1	iscsi_host_add
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5f3d2d28	iscsi_conn_start
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x63be1325	iscsi_complete_scsi_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x66c2216e	iscsi_session_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x6877c03f	iscsi_eh_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x6d55708e	iscsi_eh_target_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x6e2fe1cb	iscsi_complete_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x72504041	__iscsi_get_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x7d9d1400	iscsi_verify_itt
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x8314c66d	iscsi_update_cmdsn
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x83ac21ef	iscsi_conn_failure
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x8b2a015e	iscsi_conn_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x974c9eb4	iscsi_conn_bind
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xa60a2e59	iscsi_host_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb8d46499	iscsi_conn_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xc62a4d10	iscsi_host_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xca14ddef	iscsi_session_recovery_timedout
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xcab3ba60	iscsi_session_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xce307494	iscsi_conn_stop
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xd040fbae	iscsi_change_queue_depth
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xd417bd26	__iscsi_complete_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xdabfb087	iscsi_session_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xdca4b41d	iscsi_requeue_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe05bc749	iscsi_conn_queue_work
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf562befd	iscsi_set_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xfa5c1ca4	iscsi_prep_data_out_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x09340a2e	iscsi_tcp_recv_segment_is_hdr
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x12ccc800	iscsi_tcp_task_init
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x140ecf85	iscsi_tcp_r2tpool_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x34c255bc	iscsi_tcp_segment_unmap
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x43eafd45	iscsi_tcp_cleanup_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x5d55aac8	iscsi_tcp_conn_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x71d5a800	iscsi_segment_seek_sg
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x812984bc	iscsi_tcp_task_xmit
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x83ef06de	iscsi_segment_init_linear
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x8dcced82	iscsi_tcp_dgst_header
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x969560f7	iscsi_tcp_hdr_recv_prep
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x985b5d7f	iscsi_tcp_recv_skb
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x9f03f471	iscsi_tcp_segment_done
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xba413be3	iscsi_tcp_conn_get_stats
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xe528eb7f	iscsi_tcp_r2tpool_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xfe03c062	iscsi_tcp_conn_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x0cd78be9	sas_slave_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x164b8d0f	sas_eh_device_reset_handler
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x2bda1e55	sas_target_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x2cd961aa	sas_register_ha
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x2db249a3	sas_bios_param
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x3a7275a1	sas_find_local_phy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x3ddd2bea	sas_phy_enable
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x4eff73b8	sas_domain_attach_transport
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x52b493ea	sas_slave_configure
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x5b872e18	sas_change_queue_type
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x68074394	sas_request_addr
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x68ff75ee	sas_domain_release_transport
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x6a25c6d5	sas_phy_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x7cfecf55	__sas_task_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x7fed63fe	sas_queuecommand
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x987e1b0d	sas_change_queue_depth
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xa3efba22	sas_task_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xb89a6ffc	sas_eh_bus_reset_handler
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xb9cf1b59	sas_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xbaebc8e2	sas_unregister_ha
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xd3731846	sas_ioctl
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xd818f831	sas_slave_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xf611fe61	sas_ssp_task_response
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x3a66bff3	srp_transfer_data
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x4727c011	srp_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x5122c5bd	srp_cmd_queue
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x9cb3d7e6	srp_iu_get
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xd0f3cbfb	srp_target_free
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xd3c4409a	srp_iu_put
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x1e9e2366	scsi_tgt_tsk_mgmt_request
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x2370db8c	scsi_tgt_it_nexus_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x301a2432	scsi_tgt_free_queue
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x339fc566	scsi_host_put_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x469608c2	scsi_tgt_queue_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x61ece110	scsi_host_get_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xb653742a	scsi_tgt_cmd_to_host
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xe7b73066	scsi_tgt_alloc_queue
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xe8f3f92b	scsi_tgt_it_nexus_create
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x0da03e72	iscsi_conn_error_event
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x1422eb90	iscsi_scan_finished
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x17644e6c	iscsi_unregister_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x1b779818	iscsi_session_event
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x37cae235	iscsi_create_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x37eb55e7	iscsi_block_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x38c47b3d	iscsi_create_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x49df47d9	iscsi_add_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x4d9609af	iscsi_create_conn
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x5f6219f9	iscsi_destroy_conn
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x6ad6ffa4	iscsi_register_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x6cb6c7e5	iscsi_session_chkready
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x74798597	iscsi_remove_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x94e6c710	iscsi_free_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xb1d2c77c	iscsi_destroy_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xb8dc8a73	iscsi_lookup_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xd5f3251b	iscsi_destroy_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xd8fef705	iscsi_recv_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xe934a0f7	iscsi_offload_mesg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xecf3672e	iscsi_host_for_each_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xf90cebb2	iscsi_unblock_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xfe34a47b	iscsi_alloc_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x3c1d0221	srp_remove_host
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x5dc432fc	srp_release_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x6a8abddf	srp_rport_add
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x8ba7be01	srp_rport_del
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xa518d64e	srp_attach_transport
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x02934974	spi_bitbang_stop
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x40b0d6f8	spi_bitbang_setup_transfer
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x7cd19ab2	spi_bitbang_transfer
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xd2fc1512	spi_bitbang_cleanup
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xe9aa9053	spi_bitbang_start
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xfc9e5388	spi_bitbang_setup
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x4740fc22	comedi_usb_auto_config
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x4e4b42d1	comedi_free_board_minor
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x813c41b0	comedi_pci_auto_unconfig
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xb5725623	comedi_usb_auto_unconfig
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xbb210ec9	comedi_get_device_file_info
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xc57fdaf4	comedi_pci_auto_config
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xf5e55497	comedi_alloc_board_minor
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/das08 0x86fcde20	das08_cs_boards
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/das08 0xc7d72661	das08_common_attach
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/das08 0xe7ed141e	das08_common_detach
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0x25e55b95	labpc_1200_is_unipolar
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0x2f738acf	labpc_common_attach
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0x3ab92428	labpc_common_detach
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0x8285332a	range_labpc_1200_ai
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0xaf1e4347	labpc_1200_ai_gain_bits
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x173ac314	ni_tio_init_counter
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x1dc4e4ea	ni_tio_insn_config
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x5738ca1b	ni_gpct_device_construct
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x5beb083b	ni_tio_winsn
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x6bfc29d0	ni_tio_set_gate_src
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xa35b6365	ni_gpct_device_destroy
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xeab587ea	ni_tio_rinsn
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xf2a2a6e8	ni_tio_arm
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x14d56984	ni_tio_cancel
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x9c7c1015	ni_tio_cmdtest
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0xbbc14bb3	ni_tio_cmd
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0xcbd6a724	ni_tio_acknowledge_and_confirm
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0xdadd78ca	ni_tio_handle_interrupt
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0xedaa4ea7	ni_tio_set_mite_channel
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x2468ed34	oslec_hpf_tx
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x579d2806	oslec_snapshot
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x587711de	oslec_create
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x882d5f27	oslec_adaption_mode
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xf828c15b	oslec_flush
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xf923a5b1	oslec_free
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xfabc3747	oslec_update
+EXPORT_SYMBOL_GPL drivers/staging/hv/hv_vmbus 0x0a1ee779	osd_WaitEventWait
+EXPORT_SYMBOL_GPL drivers/staging/hv/hv_vmbus 0x4cc1b61c	osd_WaitEventCreate
+EXPORT_SYMBOL_GPL drivers/staging/hv/hv_vmbus 0x5432d87a	osd_WaitEventSet
+EXPORT_SYMBOL_GPL drivers/staging/hv/hv_vmbus 0x746d1786	osd_PageAlloc
+EXPORT_SYMBOL_GPL drivers/staging/hv/hv_vmbus 0x83911c38	osd_PageFree
+EXPORT_SYMBOL_GPL drivers/staging/hv/hv_vmbus 0xa1b8d1ad	osd_WaitEventWaitEx
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x1113c9f8	usbip_xmit
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x2a696775	usbip_recv_iso
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x3464fc4b	usbip_event_add
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x3a240867	usbip_dump_urb
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x4722326f	usbip_start_threads
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x481d40f2	usbip_stop_threads
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x678672bd	usbip_event_happened
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x6afb90d6	usbip_task_init
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x6ed94810	usbip_start_eh
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x78b72f44	usbip_debug_flag
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xa49c96d6	usbip_recv_xbuff
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xaa06d9a3	sockfd_to_socket
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xc297e6f7	usbip_stop_eh
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xd02753dc	usbip_header_correct_endian
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xdad7096b	usbip_alloc_iso_desc_pdu
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xe1ea0586	usbip_dump_header
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xea560580	usbip_pack_pdu
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xf749636c	dev_attr_usbip_debug
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xfb36df64	usbip_pad_iso
+EXPORT_SYMBOL_GPL drivers/uio/uio 0x272054fb	__uio_register_device
+EXPORT_SYMBOL_GPL drivers/uio/uio 0x4ff078bb	uio_unregister_device
+EXPORT_SYMBOL_GPL drivers/uio/uio 0x7f04b0e3	uio_event_notify
+EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0x02829b00	usbatm_usb_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0x5b4bc317	usbatm_usb_probe
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x21fa7c44	usb_ftdi_elan_read_pcimem
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x4fb398a6	ftdi_elan_gone_away
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x71715c64	usb_ftdi_elan_edset_input
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xa45c5676	usb_ftdi_elan_edset_single
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xad09ba75	usb_ftdi_elan_edset_flush
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xad4a6dc5	usb_ftdi_elan_edset_output
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xd5d60c75	usb_ftdi_elan_edset_empty
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xdc25b2ae	usb_ftdi_elan_edset_setup
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xe7f450e8	usb_ftdi_elan_write_pcimem
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x10499f12	ezusb_writememory
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x33c391a1	usb_serial_generic_read_bulk_callback
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x6bb9e87e	usb_serial_generic_resume
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x99f908a7	usb_serial_handle_break
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x9a3ea6d0	usb_serial_port_softint
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x9aa42c9e	usb_serial_register
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x9c47b6b7	usb_serial_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xb061f672	usb_serial_handle_dcd_change
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xb99f4df7	usb_serial_deregister
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xbd73c1dc	usb_serial_generic_write_bulk_callback
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xc107df8b	usb_serial_probe
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xc4304bdf	usb_serial_handle_sysrq_char
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xcf8ae81d	ezusb_set_reset
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xdd7e843c	usb_serial_generic_write
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xee48f6ac	usb_serial_generic_open
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xf522be01	usb_serial_generic_resubmit_read_urb
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x03b44536	usb_stor_suspend
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x0be13004	usb_storage_usb_ids
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1bc3edc2	usb_stor_sense_invalidCDB
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x36f39b6b	usb_stor_CB_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x390f54ed	usb_stor_clear_halt
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x46d55c5e	usb_stor_Bulk_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x556c8660	usb_stor_reset_resume
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x6956f7cf	usb_stor_pre_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x708a09b4	usb_stor_bulk_transfer_sg
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x7af6864d	usb_stor_CB_transport
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x921f26da	usb_stor_transparent_scsi_command
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x928d8805	usb_stor_Bulk_transport
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x96fa3e2c	usb_stor_bulk_transfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x9cbff7e0	usb_usual_ignore_device
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xa96c9c86	usb_stor_control_msg
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xad59ca78	usb_stor_bulk_srb
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xbf77aa32	usb_stor_set_xfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xc1dde92f	usb_stor_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xc6ce905e	usb_stor_probe1
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xd83f41c3	usb_stor_access_xfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xd94bbda1	usb_stor_ctrl_transfer
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xdbfbd526	usb_stor_probe2
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xe0f8068d	fill_inquiry_response
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xe14b1e10	usb_stor_post_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xf934a80d	usb_stor_resume
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x03af85ff	wa_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x09f3c921	wa_urb_enqueue_run
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x33d92ace	__wa_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x3f926c05	wa_urb_dequeue
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x7a0c8b46	rpipe_ep_disable
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x8668d134	rpipe_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xb6df1cfb	wa_urb_enqueue
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x0bb6bf5e	wusb_cluster_id_get
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x1b367443	wusbhc_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x2a1a29cd	wusbhc_b_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x2cb24b61	wusbhc_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x49664975	wusbhc_reset_all
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x558637f7	wusbhc_giveback_urb
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x65377900	wusbhc_b_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x99f3fd95	wusbhc_rh_status_data
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x9bea3712	wusbhc_handle_dn
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xa21da7a6	wusbhc_rh_suspend
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb59d977f	wusbhc_rh_start_port_reset
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb725d128	wusb_cluster_id_put
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xbe1649a8	wusbhc_mmcie_set
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xd0a58820	wusbhc_rh_resume
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xdf6e4f08	wusb_dev_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xe3a86e82	wusbhc_rh_control
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xe6a4daa2	__wusb_dev_get_by_usb_dev
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf038c291	wusbhc_mmcie_rm
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf770a6b4	wusbd
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xfbf1c3d3	wusbhc_chid_set
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xfe2e17d7	wusb_et_name
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x04611d0b	i1480_rceb_check
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0xac91732c	i1480_cmd
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0xb8f0517c	i1480_fw_upload
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x1bf0d3b9	uwb_phy_rate_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x244e9f74	uwb_ack_policy_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x28ffec7c	uwb_rts_cts_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x60b1db4a	uwb_pca_base_priority_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x670f46a5	uwb_pca_base_priority_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xd01f04cc	uwb_ack_policy_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xd0a201e4	uwb_phy_rate_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xff176661	uwb_rts_cts_store
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x1ca01107	umc_device_create
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x1f5f5ca9	umc_device_register
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x436e36dd	umc_controller_reset
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x7d7e2ea6	umc_device_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xb607dc7a	umc_bus_type
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xc7fb1d28	__umc_driver_register
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xd22d5987	umc_driver_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xda74c053	umc_match_pci_id
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0b8aad57	uwb_est_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0fdae85c	uwb_rc_neh_error
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x15b21b9e	uwb_rc_cmd_async
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x1e457d85	uwb_rc_ie_add
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x1fa6e437	uwb_rc_dev_addr_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x27d324f2	uwb_rc_post_reset
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2e43046e	uwb_rc_alloc
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x3e402c47	uwb_rc_put
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x3e8d3463	uwb_rc_get_by_grandpa
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x43ebe71f	uwb_dev_try_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4898a9ab	uwb_notifs_deregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4d57ae3c	uwb_rsv_type_str
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x519e6d7d	uwb_rsv_destroy
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x58af0e20	uwb_rc_reset_all
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5cbb4758	uwb_rsv_terminate
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5e4bc088	__uwb_addr_print
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6057079a	uwb_rc_cmd
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6759db8d	uwb_rc_ie_rm
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6de3b541	uwb_radio_start
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6ec81fbc	uwb_rc_neh_grok
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x7815a672	uwb_pal_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x7dcfcd23	uwb_ie_next
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x7f53e852	uwb_rc_init
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x8667eb45	uwb_rc_mac_addr_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x905e13d9	uwb_rsv_get_usable_mas
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x97af46a3	__uwb_rc_try_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x98413234	uwb_rsv_state_str
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x98a99a68	uwb_rsv_establish
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x9f3e3f32	uwb_radio_stop
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa9a9be96	uwb_rc_pre_reset
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb061f05b	uwb_rsv_create
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xbfd53e2b	uwb_rc_rm
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xc1ac00e6	uwb_pal_init
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xce3be8ad	uwb_est_find_size
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xce84850e	uwb_dev_for_each
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd77737f8	uwb_rsv_accept
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xdea8fd4d	uwb_rc_add
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xdf3438ae	uwb_rc_get_by_dev
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe1716f06	uwb_est_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xea1f7ffb	uwb_notifs_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xed8028ad	uwb_pal_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf784b2c1	uwb_rc_vcmd
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xffdd866c	uwb_rsv_modify
+EXPORT_SYMBOL_GPL drivers/uwb/whci 0xaea7983d	whci_wait_for
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x02f0965f	wlp_dev_prim_subcat_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x05351839	wlp_dev_prim_OUI_sub_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x09c10378	wlp_neighborhood_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x0dfdc8e2	wlp_dev_prim_OUI_sub_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x21309fd2	wlp_wss_activate_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x214a0685	wlp_eda_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x3845e62b	wlp_uuid_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x4f75ebcd	wlp_remove
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x5611fffd	wlp_dev_serial_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x5b007519	wlp_dev_prim_OUI_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x5c7f8955	wlp_dev_serial_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x5fd271c1	wlp_dev_name_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x6addff4a	wlp_wss_remove
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x78eb9568	wlp_dev_prim_OUI_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x8461819f	wlp_dev_model_name_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x8de93fa5	wlp_dev_model_nr_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x908fc090	wlp_dev_name_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x93cab04d	wlp_dev_model_name_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x955edf86	wlp_prepare_tx_frame
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x95c27227	wlp_wss_setup
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xae44a40f	wlp_receive_frame
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xae9d1086	wlp_dev_prim_category_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xbae67a12	wlp_wss_activate_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xbdbe415f	wlp_dev_prim_category_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xe33b0257	wlp_dev_manufacturer_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xe8403a62	wlp_uuid_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xeb43089a	wlp_reset_all
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xf07ff321	wlp_setup
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xf2b42483	wlp_dev_manufacturer_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xf2d44a47	wlp_eda_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xf968e138	wlp_dev_model_nr_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xffc3b469	wlp_dev_prim_subcat_store
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x01f5788c	ili9320_probe_spi
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x1585a1fd	ili9320_write_regs
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x611ba810	ili9320_resume
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xaea49e53	ili9320_write
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xb2887ac9	ili9320_suspend
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xe8cd6864	ili9320_shutdown
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xf7f013a8	ili9320_remove
+EXPORT_SYMBOL_GPL drivers/video/fb_ddc 0x024a37ec	fb_ddc_read
+EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0x224e69be	fb_sys_write
+EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0x5e42da67	fb_sys_read
+EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0x786f2db2	sis_malloc_new
+EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0xed6f6075	sis_free_new
+EXPORT_SYMBOL_GPL drivers/video/vermilion/vmlfb 0x016e6c20	vmlfb_unregister_subsys
+EXPORT_SYMBOL_GPL drivers/video/vermilion/vmlfb 0x90c018c6	vmlfb_register_subsys
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x29f97589	w1_read_8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x577e0726	w1_reset_select_slave
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x7c2f2afb	w1_calc_crc8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x98ccea54	w1_read_block
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xa7e840c2	w1_touch_block
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xdda4e3b1	w1_next_pullup
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xe31e0d41	w1_write_block
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xe67a8f40	w1_write_8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xee12e119	w1_reset_bus
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x04d7357c	dlm_posix_lock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x0864c4a4	dlm_new_lockspace
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x1d1af957	dlm_posix_unlock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x74e264d7	dlm_posix_get
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x9321df95	dlm_lock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xcf9f3328	dlm_release_lockspace
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xdc583c08	dlm_unlock
+EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0x0a495092	exportfs_decode_fh
+EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0x4348b392	exportfs_encode_fh
+EXPORT_SYMBOL_GPL fs/fat/fat 0x0ae8432a	fat_free_clusters
+EXPORT_SYMBOL_GPL fs/fat/fat 0x19a95bcc	fat_add_entries
+EXPORT_SYMBOL_GPL fs/fat/fat 0x3df73e99	fat_flush_inodes
+EXPORT_SYMBOL_GPL fs/fat/fat 0x50cac0fc	fat_remove_entries
+EXPORT_SYMBOL_GPL fs/fat/fat 0x5216e4de	fat_time_unix2fat
+EXPORT_SYMBOL_GPL fs/fat/fat 0x61113fb1	fat_sync_inode
+EXPORT_SYMBOL_GPL fs/fat/fat 0x672c0ea5	fat_getattr
+EXPORT_SYMBOL_GPL fs/fat/fat 0x696692b0	fat_attach
+EXPORT_SYMBOL_GPL fs/fat/fat 0x69ff2597	fat_alloc_new_dir
+EXPORT_SYMBOL_GPL fs/fat/fat 0x6fbe38bf	fat_get_dotdot_entry
+EXPORT_SYMBOL_GPL fs/fat/fat 0x8c087db4	fat_fill_super
+EXPORT_SYMBOL_GPL fs/fat/fat 0x9052aa2e	fat_fs_error
+EXPORT_SYMBOL_GPL fs/fat/fat 0xc595bb88	fat_dir_empty
+EXPORT_SYMBOL_GPL fs/fat/fat 0xc667f93f	fat_setattr
+EXPORT_SYMBOL_GPL fs/fat/fat 0xd2214775	fat_search_long
+EXPORT_SYMBOL_GPL fs/fat/fat 0xd6adfeb0	fat_build_inode
+EXPORT_SYMBOL_GPL fs/fat/fat 0xe6898766	fat_scan
+EXPORT_SYMBOL_GPL fs/fat/fat 0xe6c86c67	fat_detach
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x17ce645d	locks_end_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x1a618932	nlmsvc_unlock_all_by_ip
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x33db0e11	nlmclnt_init
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x341d733e	nlmclnt_proc
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x6f959b35	locks_in_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x79899ecb	nlmclnt_done
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x96877ac4	locks_start_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x982b0924	nlmsvc_unlock_all_by_sb
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xa7b91a7b	lockd_down
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xe75eb59e	nlmsvc_ops
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xf6933c48	lockd_up
+EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0x656fdf31	nfsacl_decode
+EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0x96dd0d2b	nfsacl_encode
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1b89c6ee	o2hb_fill_node_map
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1cb231d0	mlog_not_bits
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1d747ce3	o2hb_check_node_heartbeating
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1e94f3ac	o2nm_node_get
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x2256a07e	o2hb_unregister_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x22d65c89	o2nm_get_node_by_ip
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x36418553	o2net_send_message
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x4900035b	o2hb_stop_all_regions
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x687f6251	mlog_and_bits
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x68f21d05	o2nm_get_node_by_num
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x90a6e669	o2hb_setup_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa82a8645	o2nm_this_node
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa87bc9e7	o2nm_configured_node_map
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa9f5379a	o2net_send_message_vec
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xae808bac	o2net_register_handler
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xb4e4043b	o2hb_register_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xb9628561	o2nm_node_put
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xbaeb4700	o2hb_check_node_heartbeating_from_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xd60f2c6c	o2hb_check_local_node_heartbeating
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf1a5611d	o2net_unregister_handler_list
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x013f6e19	dlm_print_one_lock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x170c2cdb	dlmlock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x7860d110	dlmunlock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x7a1211f8	dlm_setup_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x8332c3f4	dlm_register_domain
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xc801f3cd	dlm_register_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd7ba575e	dlm_errmsg
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd8fa57a6	dlm_unregister_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xdfda0a3c	dlm_unregister_domain
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xfb86b96f	dlm_errname
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0562c415	ocfs2_cluster_this_node
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x06379db6	ocfs2_dlm_lvb_valid
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0e27f909	ocfs2_dlm_lock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x21db5b88	ocfs2_cluster_disconnect
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4a1f6fe9	ocfs2_cluster_connect
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4d3af7fa	ocfs2_cluster_hangup
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4e005f65	ocfs2_plock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x81c85a68	ocfs2_dlm_lock_status
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x8f5c5ec9	ocfs2_stack_glue_unregister
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x91fab465	ocfs2_dlm_lvb
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x963932a3	ocfs2_stack_glue_set_locking_protocol
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xa7d5c1c0	ocfs2_dlm_unlock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xa94869e4	ocfs2_stack_glue_register
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xbbc4ef97	ocfs2_stack_supports_plocks
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xd066711e	ocfs2_dlm_dump_lksb
+EXPORT_SYMBOL_GPL lib/lzo/lzo_compress 0x56b63670	lzo1x_1_compress
+EXPORT_SYMBOL_GPL lib/lzo/lzo_decompress 0xf30fda27	lzo1x_decompress_safe
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x300d7e57	free_rs
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x6fbb3bd9	init_rs_non_canonical
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xabda1e2e	decode_rs16
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xb050f329	init_rs
+EXPORT_SYMBOL_GPL net/802/garp 0x1e47eba2	garp_unregister_application
+EXPORT_SYMBOL_GPL net/802/garp 0x3a1a4783	garp_init_applicant
+EXPORT_SYMBOL_GPL net/802/garp 0x3a51f64b	garp_uninit_applicant
+EXPORT_SYMBOL_GPL net/802/garp 0x4bf4c562	garp_request_leave
+EXPORT_SYMBOL_GPL net/802/garp 0xce64e01e	garp_request_join
+EXPORT_SYMBOL_GPL net/802/garp 0xff865cf5	garp_register_application
+EXPORT_SYMBOL_GPL net/802/stp 0x24829a7c	stp_proto_register
+EXPORT_SYMBOL_GPL net/802/stp 0x9d467ecd	stp_proto_unregister
+EXPORT_SYMBOL_GPL net/ax25/ax25 0x1846968d	ax25_register_pid
+EXPORT_SYMBOL_GPL net/ax25/ax25 0xac93ae05	ax25_bcast
+EXPORT_SYMBOL_GPL net/ax25/ax25 0xaeb7451e	ax25_defaddr
+EXPORT_SYMBOL_GPL net/bluetooth/bluetooth 0x4271a602	bt_class
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x00e977a1	dccp_set_state
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x03564f6c	dccp_hashinfo
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x0ee50621	dccp_done
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x16e207fb	dccp_recvmsg
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x17a54f64	dccp_insert_option_timestamp
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x1d99d49a	dccp_timestamp
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x2d78f5a2	dccp_getsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x38b10787	dccp_rcv_established
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x3969b56e	dccp_insert_option
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x4674f481	dccp_ctl_make_reset
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x4cdd391d	dccp_feat_list_purge
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x56ea266a	dccp_state_name
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x5a19b0cf	dccp_ioctl
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x6f071f09	dccp_destroy_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x70b1d967	dccp_orphan_count
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x78307270	dccp_reqsk_init
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x7bb4bc9c	dccp_sendmsg
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x7cb57fbf	dccp_reqsk_send_ack
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x7fc49489	dccp_child_process
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x80f8ded0	dccp_init_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x81b1d211	dccp_create_openreq_child
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x86be7924	dccp_packet_name
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x8b7d8caf	dccp_statistics
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x8fa11db2	dccp_parse_options
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x998c80f0	dccp_check_req
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x99c29607	dccp_setsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x9dec14ac	dccp_disconnect
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xa523ba25	dccp_send_sync
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xbdd0f5a9	dccp_insert_option_elapsed_time
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xc0b9f7c3	dccp_sync_mss
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xd0554691	dccp_send_ack
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xd4aec3be	dccp_close
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xd6ca829c	dccp_rcv_state_process
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xdebacdc1	dccp_death_row
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xe500955e	dccp_connect
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xed096f16	dccp_shutdown
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xf47dc508	dccp_make_response
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xf922bd0a	inet_dccp_listen
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xfe21dd9b	dccp_poll
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x30f57dde	dccp_v4_conn_request
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x515cd80c	dccp_invalid_packet
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x6a671987	dccp_v4_request_recv_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x6dd1ed1b	dccp_v4_connect
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xc02db8e0	dccp_v4_send_check
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xd7aafd38	dccp_v4_do_rcv
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0x6d40a921	need_ipv4_conntrack
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0x92865b79	nf_nat_seq_adjust_hook
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_defrag_ipv4 0x6b6c3d10	nf_defrag_ipv4_enable
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x07ae60b6	nf_nat_proto_in_range
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x0f25d432	nf_nat_proto_unique_tuple
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x29988f5d	nf_nat_icmp_reply_translation
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x5ff6fb6d	nf_nat_proto_find_get
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x7977f0ed	nf_nat_get_offset
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x885f3c65	nf_nat_packet
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x94a08134	nf_nat_proto_nlattr_to_range
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x9fbc3c14	nf_nat_proto_range_to_nlattr
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xfd1973a4	nf_nat_proto_put
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat_proto_gre 0x636b12c8	nf_nat_need_gre
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x33c1b0ec	tcp_vegas_get_info
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x6ca008d1	tcp_vegas_pkts_acked
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x89fce047	tcp_vegas_state
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xc4082afc	tcp_vegas_cwnd_event
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xc8518ff4	tcp_vegas_init
+EXPORT_SYMBOL_GPL net/mac80211/mac80211 0x4034aff6	ieee80211_iterate_active_interfaces
+EXPORT_SYMBOL_GPL net/mac80211/mac80211 0xf23e01d1	ieee80211_iterate_active_interfaces_atomic
+EXPORT_SYMBOL_GPL net/netfilter/ipvs/ip_vs 0xe6476b4a	net_vs_ctl_path
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x0241187b	nf_ct_port_tuple_to_nlattr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x02d25bad	nf_ct_iterate_cleanup
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x0389293e	nf_ct_unlink_expect
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x041013fd	nf_conntrack_lock
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x045072cd	nf_ct_port_nla_policy
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x0cb43529	nf_ct_expect_alloc
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x0f23686a	nf_conntrack_l4proto_udp6
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x154a292e	nf_conntrack_event_cb
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x158b8cf4	__nf_conntrack_confirm
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x17c31043	nf_ct_expect_related_report
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x22e7f0be	__nf_ct_l4proto_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x284e72df	nf_ct_l3proto_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x35c2a648	__nf_ct_kill_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3976a429	nf_conntrack_alter_reply
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3cd25e28	nf_ct_delete_from_lists
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3d150ae8	nf_conntrack_l4proto_udp4
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3d20a943	nf_ct_expect_register_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3f5b1415	nf_ct_port_nlattr_to_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x40840727	nf_ct_nat_offset
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x41544cae	nf_conntrack_in
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x417d8f21	__nf_conntrack_helper_find_byname
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x428686b9	nf_conntrack_hash_insert
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4a867991	nf_conntrack_tuple_taken
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4b9065a9	nf_ct_alloc_hashtable
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5882ba33	nf_conntrack_set_hashsize
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x59b8df88	nf_ct_remove_expectations
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5cb6e339	nf_conntrack_flush_report
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x62813e5c	nf_ct_port_nlattr_tuple_size
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x63183b81	nf_ct_expect_unregister_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6c81fd2b	nf_ct_unexpect_related
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6e224a7a	need_conntrack
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6f7ae08d	__nf_ct_expect_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x71bba362	nf_conntrack_register_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x7309d6b2	nfnetlink_parse_nat_setup_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x736d8ac9	nf_ct_invert_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x78f9b710	nf_ct_l3proto_try_module_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x7d8dd31a	nf_conntrack_alloc
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x7f795448	__nf_conntrack_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x7fc55fd3	nf_conntrack_helper_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8033d2b8	nf_conntrack_unregister_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x80a48c0e	nf_conntrack_l4proto_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8416df62	nf_conntrack_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x844310ee	nf_ct_expect_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x84e0539d	nf_ct_expect_init
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x88d3da2b	nf_conntrack_helper_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x88eca52f	nf_conntrack_l3proto_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x89dd373b	nf_conntrack_untracked
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x89e46067	nf_conntrack_l3proto_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8d0b2045	nf_ct_extend_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8ffe7e89	nf_conntrack_htable_size
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x90ff6c9f	nf_ct_invert_tuplepr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9af3f6c1	nf_ct_free_hashtable
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xa200b61d	nf_ct_get_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xa3e2f2ea	nf_ct_helper_ext_add
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xa5f60fe1	nf_ct_l3protos
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb602c57e	nf_ct_l3proto_module_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb676a7bb	nf_ct_deliver_cached_events
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb874454e	nf_expect_event_cb
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb8cad030	seq_print_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xbb2ff500	nf_ct_expect_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xbe89a4c2	nf_ct_get_tuplepr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc18ac88d	nf_ct_expect_hsize
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xd17a6ce1	nf_conntrack_l4proto_tcp6
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xd7f4a623	nf_conntrack_l3proto_generic
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xdc937347	__nf_ct_try_assign_helper
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xe113e69c	print_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xe34c0e63	nf_conntrack_l4proto_tcp4
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xe3b231b3	nf_ct_l3proto_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xec7f23bc	__nf_ct_refresh_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xed1b5881	nf_conntrack_l4proto_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf38bcdf3	nf_conntrack_max
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf5059e17	nf_conntrack_free
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf7ac1c09	nf_ct_insert_dying_list
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xfe924a5e	nf_ct_extend_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_amanda 0x72830acb	nf_nat_amanda_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_ftp 0xf2c0d0ff	nf_nat_ftp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x266f59a5	nat_q931_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x299340f6	set_h245_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x4ced149b	nat_h245_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x7cd88d2c	nat_rtp_rtcp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x7f4f7a4b	nat_callforwarding_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x9eba992d	set_ras_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xaf3fc7cf	set_h225_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xd8f32b48	get_h225_addr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xf39d7e36	nat_t120_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xf9ecac43	set_sig_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_irc 0xa5f5c114	nf_nat_irc_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x8b98090a	nf_nat_pptp_hook_expectfn
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x9a5c0d4c	nf_nat_pptp_hook_outbound
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0xcfd76214	nf_nat_pptp_hook_exp_gre
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0xd0e599a3	nf_nat_pptp_hook_inbound
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_proto_gre 0x694cfa36	nf_ct_gre_keymap_add
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_proto_gre 0x97025e07	nf_ct_gre_keymap_destroy
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x2db9bf0b	nf_nat_sdp_session_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x3f4e5c7f	nf_nat_sdp_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x486060a0	nf_nat_sip_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x577b912a	ct_sip_get_header
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x685d3df6	nf_nat_sdp_media_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x6fc59583	ct_sip_parse_numerical_param
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x8c22bc74	ct_sip_parse_request
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xa68bc894	nf_nat_sdp_port_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xb2b1788c	nf_nat_sip_expect_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xc9884685	ct_sip_get_sdp_header
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xcbe20bb4	ct_sip_parse_header_uri
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xfa8b732c	ct_sip_parse_address_param
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_tftp 0x7f989542	nf_nat_tftp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_tproxy_core 0x2dc79979	nf_tproxy_get_sock_v4
+EXPORT_SYMBOL_GPL net/netfilter/nf_tproxy_core 0xae75fb3d	nf_tproxy_assign_sock
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x1f58e71b	nfnl_lock
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x3895cd7a	nfnl_unlock
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x482e8f60	nfnetlink_send
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x690aa97c	nfnetlink_subsys_register
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xbeaf64a6	nfnetlink_subsys_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xd01876d2	nfnetlink_unicast
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xeca95329	nfnetlink_has_listeners
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xef9b4bbd	nfnetlink_set_err
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink_log 0xfcd51699	nfulnl_log_packet
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x0e749087	xt_replace_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x101fbb1e	xt_register_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x1a582d63	xt_table_unlock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x3c0c1f66	xt_find_table_lock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x40728a63	xt_find_revision
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x4f432b51	per_cpu__xt_info_locks
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x5b3ce82f	xt_proto_init
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xa1c0df65	xt_check_match
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xcf99fc26	xt_unregister_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xd5865410	xt_check_target
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xdda9f1ca	xt_request_find_target
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xedc2d93e	xt_proto_fini
+EXPORT_SYMBOL_GPL net/netfilter/xt_RATEEST 0xc2429b63	xt_rateest_lookup
+EXPORT_SYMBOL_GPL net/netfilter/xt_RATEEST 0xfc852663	xt_rateest_put
+EXPORT_SYMBOL_GPL net/rds/rds 0x00a467af	rds_wq
+EXPORT_SYMBOL_GPL net/rds/rds 0x1d052548	rds_recv_incoming
+EXPORT_SYMBOL_GPL net/rds/rds 0x2c5c5514	rds_message_add_rdma_dest_extension
+EXPORT_SYMBOL_GPL net/rds/rds 0x3101936e	rds_message_add_extension
+EXPORT_SYMBOL_GPL net/rds/rds 0x54ea936c	rds_page_copy_user
+EXPORT_SYMBOL_GPL net/rds/rds 0x5aa882e7	rds_conn_create
+EXPORT_SYMBOL_GPL net/rds/rds 0x5de611f1	rds_conn_destroy
+EXPORT_SYMBOL_GPL net/rds/rds 0x686c51f6	rds_inc_put
+EXPORT_SYMBOL_GPL net/rds/rds 0x6b92cfe7	rds_info_deregister_func
+EXPORT_SYMBOL_GPL net/rds/rds 0x73aac73d	rds_message_populate_header
+EXPORT_SYMBOL_GPL net/rds/rds 0x7b0e9651	rds_message_addref
+EXPORT_SYMBOL_GPL net/rds/rds 0x7b67a82b	rds_message_unmapped
+EXPORT_SYMBOL_GPL net/rds/rds 0x7c9be9fc	rds_send_get_message
+EXPORT_SYMBOL_GPL net/rds/rds 0x7cafdc30	rds_conn_drop
+EXPORT_SYMBOL_GPL net/rds/rds 0x85ed9062	rds_info_register_func
+EXPORT_SYMBOL_GPL net/rds/rds 0x885b03db	rds_cong_map_updated
+EXPORT_SYMBOL_GPL net/rds/rds 0x8a1078fa	rds_trans_unregister
+EXPORT_SYMBOL_GPL net/rds/rds 0x8cfd9356	rds_send_drop_acked
+EXPORT_SYMBOL_GPL net/rds/rds 0x8ec0cb6c	rds_inc_init
+EXPORT_SYMBOL_GPL net/rds/rds 0x96fafe85	rds_stats_info_copy
+EXPORT_SYMBOL_GPL net/rds/rds 0x9b01e293	rds_connect_complete
+EXPORT_SYMBOL_GPL net/rds/rds 0x9b3e6113	per_cpu__rds_stats
+EXPORT_SYMBOL_GPL net/rds/rds 0xbeb95960	rds_conn_create_outgoing
+EXPORT_SYMBOL_GPL net/rds/rds 0xd8b7d18d	rds_inc_addref
+EXPORT_SYMBOL_GPL net/rds/rds 0xda564772	rds_info_copy
+EXPORT_SYMBOL_GPL net/rds/rds 0xe0ff3b2b	rds_for_each_conn_info
+EXPORT_SYMBOL_GPL net/rds/rds 0xe5447886	rds_message_put
+EXPORT_SYMBOL_GPL net/rds/rds 0xeb954dae	rds_trans_register
+EXPORT_SYMBOL_GPL net/rds/rds 0xfecf7c88	rds_rdma_send_complete
+EXPORT_SYMBOL_GPL net/rxrpc/af-rxrpc 0x278ba0f1	rxrpc_register_security
+EXPORT_SYMBOL_GPL net/rxrpc/af-rxrpc 0xc88ac108	rxrpc_unregister_security
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x00c52ef5	g_make_token_header
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x14e7c37a	gss_mech_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x36267746	gss_mech_get
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x5503dccb	gss_mech_register
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x615030b6	gss_mech_get_by_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x6c95833e	gss_mech_put
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x83935a1d	gss_service_to_auth_domain_name
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x8d1a827e	svcauth_gss_register_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xb5cb3724	gss_svc_to_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xb5dea7ef	g_token_size
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xb6f3f7a0	gss_pseudoflavor_to_service
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xd467eae3	svc_gss_principal
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xdc21c2ad	svcauth_gss_flavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xf3f968a1	gss_mech_get_by_name
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xf8b2ff6e	g_verify_token_header
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x01f6fbf7	rpc_queue_upcall
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x02020797	xprt_release_xprt_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0215791c	rpc_killall_tasks
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x05e807a9	xdr_encode_string
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x065994f1	xdr_encode_opaque_fixed
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x071d5e2d	svc_seq_show
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x092a761d	xdr_init_decode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0c5e0615	xdr_partial_copy_from_skb
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0da850ba	xdr_buf_from_iov
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0f668ba9	svc_auth_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0f9fd9c0	rpc_ntop
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1086e626	svc_create_pooled
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x12e280e3	svc_proc_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x166401b5	rpc_peeraddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x169c2d81	svc_destroy
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x171b6d01	svc_wake_up
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x17c4d504	svc_recv
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x17effb47	xprt_wake_pending_tasks
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1897c0ba	svc_find_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1e5f3f3c	svc_xprt_received
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x20612bca	unix_domain_find
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x21fbd96e	xdr_reserve_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x227d77d8	xprt_lookup_rqst
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x229ea25a	svc_close_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x23433876	xprt_unregister_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2379487f	xprt_reserve_xprt_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x27c3a194	cache_purge
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2919b156	xdr_decode_string_inplace
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x295d13be	auth_domain_find
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2aa17774	rpc_free_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2ae881ca	svc_exit_thread
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2b094547	rpc_restart_call
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2dbe6605	sunrpc_cache_unregister_pipefs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2dce0e59	rpcb_getport_async
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2eec63c9	xdr_encode_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x31a89d59	rpc_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x33563601	xdr_encode_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x379ba775	rpc_put_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x386c2a5b	cache_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x38828fb0	rpc_lookup_machine_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x39bae174	rpcauth_init_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3ac5bc2a	svc_set_num_threads
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3ad35a5e	rpc_get_mount
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3c4bdc2d	xprt_wait_for_buffer_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3dc41ee8	svc_prepare_thread
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x42dd24de	sunrpc_cache_register_pipefs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4340adf9	auth_unix_forget_old
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x454d2484	xprt_register_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4598bc22	xprt_reserve_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4892703c	rpc_malloc
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4f311145	rpc_max_payload
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5126bdca	rpc_shutdown_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x51c4e78c	rpc_call_sync
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x53445f68	nlm_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x550547a3	rpc_destroy_wait_queue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x55482d20	auth_domain_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x58bd7f3d	put_rpccred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5a2b579e	svc_unreg_xprt_class
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5b14ec1a	rpc_put_mount
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5b4d9ec0	rpc_restart_call_prepare
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5bd26000	rpc_proc_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5bd818e7	xprt_complete_rqst
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5cabde13	svc_xprt_enqueue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5cf79142	rpc_mkpipe
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5e33372d	auth_unix_add_addr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6319bc15	xprt_set_retrans_timeout_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x675524ec	rpc_sockaddr2uaddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x69d731cd	svc_sock_destroy
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6c5304c5	rpcb_getport_sync
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6c7c1c91	xprt_write_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6d67ce70	rpc_wake_up_next
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6e651324	svc_max_payload
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6eea229d	svcauth_unix_purge
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6fabc6fc	rpcauth_lookup_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x71fa908a	cache_flush
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x763774ee	rpcauth_destroy_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x77913fa6	xdr_enter_page
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7b5cf1f0	xprt_release_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7de53067	rpc_init_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x807e1393	xdr_write_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x81ff43bd	xdr_buf_read_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x83a3bac2	svc_sock_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x86ed282a	rpc_uaddr2sockaddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x87e946c3	xdr_encode_word
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x88ae5a4b	svc_reserve
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8a2a4937	rpc_force_rebind
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8a715882	__rpc_wait_for_completion_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8d2e8cec	svc_print_addr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8d5735b2	rpc_delay
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9088f3d5	xdr_decode_array2
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x90ae9cd7	xprt_adjust_cwnd
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x92fd1742	rpc_bind_new_program
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x94329e6d	sunrpc_cache_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x95cd9a20	csum_partial_copy_to_xdr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9a6c0118	rpcauth_generic_bind_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9ba861ec	cache_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9bd9e78a	rpc_print_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9edaa2d0	xdr_inline_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9f528bcf	xprt_disconnect_done
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa01729b4	svc_xprt_names
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa11a3893	svc_auth_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa147326f	xdr_encode_array2
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa153445a	rpc_wake_up_queued_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa18f9af8	xdr_skb_read_bits
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa207260d	rpc_peeraddr2str
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa280d683	auth_domain_put
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa7baeed7	xdr_process_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa9048da4	xdr_init_encode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa9c921f1	rpc_clone_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xaa34b2af	xdr_read_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xac231252	read_bytes_from_xdr_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xaf5bf6ef	nfs_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xafe34355	svc_proc_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb144ae02	xprt_update_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb387b246	rpc_wake_up_status
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb3b2f59d	xdr_buf_subsegment
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb7e4edc6	rpc_call_start
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb8e0b366	rpcauth_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xba7a3f50	rpc_lookup_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbf9d1b96	nfsd_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc12435e3	rpc_calc_rto
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc3880471	xdr_decode_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc445d411	rpc_call_async
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc869f965	svc_drop
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc8e96dea	qword_addhex
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc9070a19	svcauth_unix_set_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc9370895	rpc_exit_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcb95f2ba	sunrpc_cache_pipe_upcall
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcc4ab914	rpc_unlink
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xccc2372e	rpc_pton
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcd7e70c6	rpc_run_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcee467f3	xprt_load_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcf94b0e6	sunrpc_cache_update
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcfef15a7	rpcauth_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd032ffb4	svc_process
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd254ea01	svc_sock_update_bufs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd2fc8375	rpc_proc_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd3bc4789	xdr_decode_word
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd6c45058	rpcauth_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd82c728e	rpc_init_wait_queue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd8dc1782	svc_set_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdd61d077	auth_unix_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xde66789b	rpc_setbufsize
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdf0bb35b	rpc_alloc_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe01f8c9e	xprt_release_rqst_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe1cd40e6	rpc_sleep_on
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe3205aef	svc_xprt_init
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe3bcbe2b	svc_sock_names
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe44277cb	svc_reg_xprt_class
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe44f3409	svc_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe4dfa410	svc_xprt_put
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe5919cb1	xdr_encode_opaque
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe852ee4c	svc_authenticate
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe97f4ce5	qword_get
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xea0bb685	rpcauth_init_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xece54c45	rpc_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xed104261	rpc_call_null
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xedb54060	svc_xprt_copy_addrs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xedcf6be4	qword_add
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xedd1ba52	rpc_wake_up
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xeeacab69	rpc_update_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf5908be3	svc_create_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf5ad2a3d	svc_addsock
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf9061d5d	xdr_inline_decode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf92a5437	xdr_shift_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf9d1164c	rpc_free
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfb522321	cache_check
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfc17c657	xprt_set_retrans_timeout_def
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x0b732504	wimax_msg_data
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x2e3a51c5	wimax_dev_add
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x3ce01b49	wimax_state_change
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x45ebd1d6	wimax_msg_data_len
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x4f4f80bb	wimax_report_rfkill_sw
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x61d6e476	wimax_dev_rm
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x62aa47c3	wimax_msg_send
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x7acd2936	wimax_report_rfkill_hw
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x9fd843ef	wimax_msg
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xc9924b0e	wimax_dev_init
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xf175628e	wimax_state_get
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xf8408a40	wimax_msg_alloc
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xfeb4e95c	wimax_msg_len
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x08417452	cfg80211_wext_giwrate
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x1914834d	cfg80211_wext_giwfreq
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x2207a2c5	cfg80211_wext_giwap
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x22dbc99f	cfg80211_wext_giwrts
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x349d126e	cfg80211_wext_giwretry
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x3553904b	cfg80211_wext_giwtxpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x3937bb12	cfg80211_wext_siwscan
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x51bcd109	cfg80211_wext_siwap
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x53bb9aa7	cfg80211_wext_giwfrag
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x57173b12	cfg80211_wext_giwmode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x5b32f110	cfg80211_wext_giwrange
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x61cd6de4	cfg80211_wext_giwencode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x64f54ede	cfg80211_wext_giwname
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x699e48b5	cfg80211_wext_giwpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x6c6ae2f4	cfg80211_wext_siwauth
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x71cfcb09	cfg80211_wext_siwtxpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x778d480f	cfg80211_wireless_stats
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x7906cd25	cfg80211_wext_siwessid
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x8076aac6	cfg80211_wext_siwencodeext
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x8bb5b6a5	cfg80211_wext_siwfreq
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x962ebf00	cfg80211_wext_giwscan
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xa602bf2d	cfg80211_wext_siwrate
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xa98a67d3	cfg80211_wext_siwpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xb07afc77	cfg80211_wext_siwrts
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xb912e243	cfg80211_wext_giwessid
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xc229298b	cfg80211_wext_giwauth
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xc5dcbda6	cfg80211_wext_siwencode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xd09c6701	cfg80211_wext_siwgenie
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xe74d3089	cfg80211_wext_siwmlme
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xf3e8d4ea	cfg80211_wext_siwmode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xf4893d08	cfg80211_wext_siwretry
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xfdf851d8	cfg80211_wext_siwfrag
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x16cb0658	ipcomp_input
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x1f653fd1	ipcomp_init_state
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0xd1e15363	ipcomp_destroy
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0xe9e461b7	ipcomp_output
+EXPORT_SYMBOL_GPL sound/core/snd-pcm 0xa286a234	snd_pcm_format_name
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x030e3676	snd_hda_ctl_add
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0795ca38	snd_hda_codec_amp_stereo
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x08fda28b	snd_hda_codec_resume_amp
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x16b90fa4	snd_hda_bind_sw
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1ed6056d	snd_hda_add_codec_preset
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x228193f3	snd_hda_multi_out_analog_prepare
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2abb7d11	snd_hda_ch_mode_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2ae98418	snd_hda_multi_out_dig_open
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2d66bddd	snd_hda_mixer_amp_volume_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2fa11316	snd_hda_get_hint
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x34c790df	snd_hda_mixer_amp_volume_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x362d19f6	snd_hda_codec_set_pincfg
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x36d3ec34	snd_hda_override_amp_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3842bd13	snd_hda_multi_out_analog_open
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3870e2b2	snd_hda_build_pcms
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3fec86fb	snd_hda_create_spdif_out_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4137fc54	snd_hda_bus_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x41e61348	snd_hda_bind_vol
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4804b8b0	snd_hda_mixer_amp_switch_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4e6e9fb8	snd_hda_mixer_bind_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x51a595b2	snd_hda_mixer_amp_switch_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x51c16941	snd_hda_load_patch
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5379f6bb	snd_hda_mixer_bind_ctls_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5ae76f73	auto_pin_cfg_labels
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x60878dcb	snd_hda_codec_resume_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x625dd9a3	snd_hda_detach_beep_device
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x642e83fc	snd_hda_mixer_bind_switch_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x682f793c	snd_hda_check_board_codec_sid_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x68cfacaf	snd_hda_codec_get_pincfg
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6cbf5272	snd_hda_set_vmaster_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6f4e9e22	snd_hda_suspend
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x71cc9c57	snd_hda_get_sub_nodes
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x72d1c24c	snd_hda_find_mixer_ctl
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7748864b	snd_hda_check_board_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7949cda9	snd_hda_multi_out_dig_cleanup
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7ae75165	snd_hda_check_amp_list_power
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7c0b4e7f	snd_hda_input_mux_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7d8faefe	snd_hda_mixer_bind_switch_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7e5b275d	snd_hda_queue_unsol_event
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x80a2179b	snd_hda_multi_out_analog_cleanup
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x86224c44	snd_hda_parse_pin_def_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8af4ecbd	snd_hda_mixer_amp_volume_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x93bfead7	snd_hda_add_new_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9435f27c	snd_hda_codec_write_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x96754c58	snd_hda_get_bool_hint
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x99290dcc	snd_hda_codec_write
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9a8e1877	snd_array_free
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9b34dcfe	snd_hda_multi_out_dig_prepare
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9b82be28	snd_hda_add_vmaster
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9c3fd163	snd_hda_sequence_write
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa0da3587	snd_hda_codec_cleanup_stream
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa2827d76	snd_hda_get_jack_location
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xad87613e	snd_print_pcm_rates
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xafe51f56	snd_hda_create_spdif_in_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb996a420	snd_hda_query_pin_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbe7dd7dc	snd_array_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc137983f	snd_hda_resume
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc34a54c6	snd_hda_calc_stream_format
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc4ad81e0	query_amp_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc652fd69	snd_hda_get_jack_connectivity
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcb301b6e	snd_hda_get_jack_type
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcce27eb0	snd_hda_input_mux_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcd0d41d8	snd_hda_delete_codec_preset
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcd4a631c	snd_hda_ch_mode_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xce18ed60	snd_hda_codec_configure
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcf9a970c	snd_hda_power_up
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd44f12eb	snd_hda_codec_amp_update
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xdcebc948	snd_hda_is_supported_format
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xdf3f7839	snd_hda_mixer_amp_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe0e33398	snd_hda_power_down
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe27e0a3a	snd_hda_multi_out_dig_close
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe7d13ff2	snd_hda_attach_beep_device
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xec1d9dc0	snd_hda_create_spdif_share_sw
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xed26f088	snd_hda_codec_setup_stream
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xed4a8ad9	snd_hda_mixer_bind_ctls_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xed8f0d68	snd_hda_codec_read
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeda3a721	snd_print_pcm_bits
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xee99db95	snd_hda_codec_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf3193dd4	snd_hda_build_controls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf4eba7db	snd_hda_mixer_bind_ctls_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf597f7e4	snd_hda_get_connections
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf637c4d2	snd_hda_mixer_amp_switch_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf7129e5a	snd_hda_codec_amp_read
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xfccc54f2	snd_hda_sequence_write_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xff3c9784	snd_hda_ch_mode_put
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1836 0x2fdc71b0	soc_codec_dev_ad1836
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1836 0xff4fe557	ad1836_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1938 0x09e33b5b	soc_codec_dev_ad1938
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1938 0x09ef84b9	ad1938_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0xaa092698	ad73311_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0xd53d4721	soc_codec_dev_ad73311
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4104 0xf5b47506	soc_codec_device_ak4104
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0x59429cea	ak4535_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0xcf2dc70b	soc_codec_dev_ak4535
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4642 0x0f6f953f	ak4642_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4642 0x9796e8a7	soc_codec_dev_ak4642
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0x9b10588e	cs4270_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0xfe3898b6	soc_codec_device_cs4270
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-l3 0x78c84c7e	l3_write
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-max9877 0xe9c6d20c	max9877_add_controls
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0xb54ed996	pcm3008_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0xcf2b1d1b	soc_codec_dev_pcm3008
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-spdif 0x692ba23e	dit_stub_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0x1ca9f10f	ssm2602_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0xc49e18d0	soc_codec_dev_ssm2602
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0x0f8bdf54	tlv320aic23_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0x7d87e0de	soc_codec_dev_tlv320aic23
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0x124418e6	aic26_soc_codec_dev
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0x2f0e5185	aic26_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x350e4f44	aic3x_set_headset_detection
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x56e51379	aic3x_get_gpio
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x97a6edf6	aic3x_set_gpio
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xb176dec8	aic3x_button_pressed
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xbc2b312d	aic3x_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xceff88dc	soc_codec_dev_aic3x
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xd81a56ba	aic3x_headset_detected
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0x56841504	twl4030_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0x6b1390d8	soc_codec_dev_twl4030
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda134x 0xaaabf6dd	soc_codec_dev_uda134x
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x9b11cab4	soc_codec_dev_uda1380
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0xe4c460d3	uda1380_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0x757206d5	wm_hubs_spkmix_tlv
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0x98c525c7	wm_hubs_add_analogue_controls
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0xf8e83297	wm_hubs_add_analogue_routes
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x36000411	soc_codec_dev_wm8350
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0xfb08babe	wm8350_hp_jack_detect
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0xfc33099a	wm8350_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0xa4ce2f24	wm8400_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0xad1cfe43	soc_codec_dev_wm8400
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0x337991ab	wm8510_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0xa67940c8	soc_codec_dev_wm8510
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8523 0x8405f998	wm8523_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8523 0x8f12ad52	soc_codec_dev_wm8523
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0x6da5c361	wm8580_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0xa9a87b47	soc_codec_dev_wm8580
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0xace70e26	wm8728_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0xc6efbc12	soc_codec_dev_wm8728
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x16ef6d6c	soc_codec_dev_wm8731
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x2d9f545a	wm8731_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x0b79209f	soc_codec_dev_wm8750
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x8513b2c5	wm8750_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0x2054735c	soc_codec_dev_wm8753
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0xb9b02411	wm8753_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8776 0x1f78d97f	wm8776_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8776 0x5ea75377	soc_codec_dev_wm8776
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0xc2a18f50	wm8900_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0xed6d9547	soc_codec_dev_wm8900
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0x4435fdfe	wm8903_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0xc640c684	soc_codec_dev_wm8903
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0x36eeab43	wm8940_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0xea643d9b	soc_codec_dev_wm8940
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0xa171ba6a	wm8960_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0xe9e0e9f5	soc_codec_dev_wm8960
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8961 0x6a2d69cf	wm8961_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8961 0xf0fbd8b4	soc_codec_dev_wm8961
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0xcc5a627b	wm8971_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0xf139b283	soc_codec_dev_wm8971
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8974 0x8c4e46c6	soc_codec_dev_wm8974
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8974 0x9c97f3c8	wm8974_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0x1d1d435a	wm8988_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0x2ba74ef7	soc_codec_dev_wm8988
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0x5739ca83	wm8990_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0xe2bcaec8	soc_codec_dev_wm8990
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8993 0xc991fd0b	soc_codec_dev_wm8993
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8993 0xd1adb82d	wm8993_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0x32261dfa	wm9081_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0xba0d9384	soc_codec_dev_wm9081
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x04a0d292	dapm_reg_event
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x04b82f95	snd_soc_dapm_put_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0867eed1	snd_soc_info_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0975d6d7	snd_soc_codec_set_cache_io
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0b5d3166	snd_soc_codec_volatile_register
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0c5b6a9a	snd_soc_free_ac97_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0cdd10f3	snd_soc_unregister_dais
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0dce8885	snd_soc_dapm_enable_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0e173eec	snd_soc_free_pcms
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0e280d89	snd_soc_unregister_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0f310990	snd_soc_unregister_dai
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x11ed1c9d	snd_soc_dapm_put_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x19789c44	snd_soc_new_pcms
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2373369b	snd_soc_put_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x23fb0347	snd_soc_get_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x27ca26c2	snd_soc_dai_set_sysclk
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2ba1e0fa	snd_soc_dai_set_clkdiv
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2c5799c3	snd_soc_jack_report
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x30f26b88	snd_soc_put_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x32b7d345	snd_soc_jack_add_pins
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3850053b	snd_soc_resume_device
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x39a0e17e	snd_soc_dapm_new_widgets
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3bc8b3aa	snd_soc_init_card
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4ab5f525	snd_soc_update_bits
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4c0ddcbb	snd_soc_dapm_info_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4e4cc15b	snd_soc_cnew
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x548282fd	snd_soc_set_runtime_hwparams
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x57d974ea	snd_soc_get_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x598702a0	snd_soc_dapm_new_controls
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5b5b0398	snd_soc_dapm_free
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6231cc0a	snd_soc_dapm_stream_event
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6351ec90	snd_soc_jack_free_gpios
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x65126fd0	snd_soc_unregister_platform
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x65475eec	snd_soc_dapm_get_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6aedb749	snd_soc_dai_digital_mute
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x73a0d2c0	snd_soc_get_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x783219cb	snd_soc_register_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7851917d	snd_soc_dapm_new_control
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7db97aa7	snd_soc_register_dai
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x82c816d8	snd_soc_dapm_put_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x881559e8	snd_soc_info_volsw_ext
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x884ec813	snd_soc_test_bits
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8ee5772d	snd_soc_put_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x96ab1f38	snd_soc_dapm_nc_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9b6d117f	snd_soc_dapm_get_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9dec1fe2	snd_soc_get_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9ed96a81	snd_soc_dai_set_pll
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa9c798c5	snd_soc_dai_set_tdm_slot
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xaa3c1ad5	snd_soc_get_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xaae5c1e0	snd_soc_info_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xadb28b2a	snd_soc_new_ac97_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb4f529cf	snd_soc_register_dais
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb6e97492	snd_soc_info_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xba0cd257	snd_soc_jack_add_gpios
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xbdb305b6	snd_soc_dapm_disable_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc1d50356	snd_soc_dapm_add_routes
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc1e17952	snd_soc_dapm_put_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xccc39ebd	snd_soc_dapm_get_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xccca37db	snd_soc_dapm_get_pin_status
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xce1e8070	snd_soc_dapm_sync
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xceea48b0	snd_soc_dapm_get_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd327524c	snd_soc_add_controls
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd4bf450e	snd_soc_info_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xdb7f09aa	snd_soc_dai_set_tristate
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xdd3a56ec	snd_soc_register_platform
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xe43792b0	snd_soc_put_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xe91be3a1	snd_soc_jack_new
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xec75ec2a	snd_soc_put_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xfd2fa044	snd_soc_dai_set_fmt
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xfd48180f	snd_soc_info_enum_ext
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xfed3a22c	snd_soc_suspend_device
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x2e0a0be5	xv_destroy_pool
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x51958fac	xv_malloc
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x7e80b9f6	xv_create_pool
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x9a79aa81	xv_free
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0xaf69699e	xv_get_object_size
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0xc1f55d16	xv_get_total_size_bytes
+EXPORT_SYMBOL_GPL vmlinux 0x000d9287	set_cpus_allowed_ptr
+EXPORT_SYMBOL_GPL vmlinux 0x002ff5a3	class_for_each_device
+EXPORT_SYMBOL_GPL vmlinux 0x003ed6a6	hpet_unregister_irq_handler
+EXPORT_SYMBOL_GPL vmlinux 0x004fe30f	crypto_alloc_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0x00532296	ip6_local_out
+EXPORT_SYMBOL_GPL vmlinux 0x00566d8f	inotify_get_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x0067df75	ata_tf_from_fis
+EXPORT_SYMBOL_GPL vmlinux 0x008208a2	md_new_event
+EXPORT_SYMBOL_GPL vmlinux 0x008b9c50	sysfs_remove_group
+EXPORT_SYMBOL_GPL vmlinux 0x00ebcb5d	ata_id_string
+EXPORT_SYMBOL_GPL vmlinux 0x0107f84f	dm_rh_bio_to_region
+EXPORT_SYMBOL_GPL vmlinux 0x010abd3c	sata_scr_write
+EXPORT_SYMBOL_GPL vmlinux 0x010b3618	cpufreq_driver_target
+EXPORT_SYMBOL_GPL vmlinux 0x0110b3d1	register_hotplug_dock_device
+EXPORT_SYMBOL_GPL vmlinux 0x01123a0d	rt_mutex_lock_interruptible
+EXPORT_SYMBOL_GPL vmlinux 0x0151f66b	usb_deregister_dev
+EXPORT_SYMBOL_GPL vmlinux 0x016b9869	xfrm_calg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0x01848a8e	local_apic_timer_c2_ok
+EXPORT_SYMBOL_GPL vmlinux 0x019fd517	da903x_set_bits
+EXPORT_SYMBOL_GPL vmlinux 0x01a4ea6d	unregister_die_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x01ab3136	ip_local_out
+EXPORT_SYMBOL_GPL vmlinux 0x01b7bb55	pm_runtime_enable
+EXPORT_SYMBOL_GPL vmlinux 0x01cb4883	__set_irq_handler
+EXPORT_SYMBOL_GPL vmlinux 0x01e1a8de	kgdb_breakpoint
+EXPORT_SYMBOL_GPL vmlinux 0x01eb45f8	d_materialise_unique
+EXPORT_SYMBOL_GPL vmlinux 0x020f9c9f	kallsyms_on_each_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x021d8c1e	ata_port_probe
+EXPORT_SYMBOL_GPL vmlinux 0x025ae5e5	xenbus_map_ring_valloc
+EXPORT_SYMBOL_GPL vmlinux 0x028ce666	sata_link_resume
+EXPORT_SYMBOL_GPL vmlinux 0x02ccea56	lock_policy_rwsem_write
+EXPORT_SYMBOL_GPL vmlinux 0x02f25f42	ata_sff_data_xfer32
+EXPORT_SYMBOL_GPL vmlinux 0x032926b2	ring_buffer_consume
+EXPORT_SYMBOL_GPL vmlinux 0x032a90da	clockevent_delta2ns
+EXPORT_SYMBOL_GPL vmlinux 0x0343bdf1	__i2c_board_list
+EXPORT_SYMBOL_GPL vmlinux 0x034a03d6	register_kretprobe
+EXPORT_SYMBOL_GPL vmlinux 0x039b4f20	dev_change_net_namespace
+EXPORT_SYMBOL_GPL vmlinux 0x03aad584	usb_put_intf
+EXPORT_SYMBOL_GPL vmlinux 0x03b93f5d	sysdev_class_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x03c3a3f7	pskb_put
+EXPORT_SYMBOL_GPL vmlinux 0x03c3b3ee	platform_device_put
+EXPORT_SYMBOL_GPL vmlinux 0x03cfb40b	rtc_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x03e3686c	ata_timing_cycle2mode
+EXPORT_SYMBOL_GPL vmlinux 0x03e47b2e	mmput
+EXPORT_SYMBOL_GPL vmlinux 0x04069b1d	set_irq_nested_thread
+EXPORT_SYMBOL_GPL vmlinux 0x04486e88	rcu_batches_completed
+EXPORT_SYMBOL_GPL vmlinux 0x04522bd7	lookup_instantiate_filp
+EXPORT_SYMBOL_GPL vmlinux 0x04b4a333	class_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x04c3f2c1	gnttab_empty_grant_references
+EXPORT_SYMBOL_GPL vmlinux 0x04e31b28	regulator_get_current_limit
+EXPORT_SYMBOL_GPL vmlinux 0x05187b4c	acpi_smbus_read
+EXPORT_SYMBOL_GPL vmlinux 0x0531dcb8	ata_dev_classify
+EXPORT_SYMBOL_GPL vmlinux 0x054b704a	raw_seq_next
+EXPORT_SYMBOL_GPL vmlinux 0x054e550b	kernel_halt
+EXPORT_SYMBOL_GPL vmlinux 0x0593d7d9	bdi_writeout_inc
+EXPORT_SYMBOL_GPL vmlinux 0x0597ce1b	regulator_force_disable
+EXPORT_SYMBOL_GPL vmlinux 0x05d81a4f	led_trigger_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x060d1064	set_memory_ro
+EXPORT_SYMBOL_GPL vmlinux 0x060f5e5b	fuse_abort_conn
+EXPORT_SYMBOL_GPL vmlinux 0x0619ca8a	getboottime
+EXPORT_SYMBOL_GPL vmlinux 0x062e055c	each_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x064db9a5	mark_mounts_for_expiry
+EXPORT_SYMBOL_GPL vmlinux 0x06734576	bus_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x068d4e89	ring_buffer_record_disable
+EXPORT_SYMBOL_GPL vmlinux 0x0697126e	pci_find_ext_capability
+EXPORT_SYMBOL_GPL vmlinux 0x07193bf1	srcu_init_notifier_head
+EXPORT_SYMBOL_GPL vmlinux 0x07b382ab	usb_submit_urb
+EXPORT_SYMBOL_GPL vmlinux 0x07b52e38	rtnl_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x07ce7344	trace_seq_vprintf
+EXPORT_SYMBOL_GPL vmlinux 0x07ff4aea	xenbus_scanf
+EXPORT_SYMBOL_GPL vmlinux 0x08067da6	usb_hub_clear_tt_buffer
+EXPORT_SYMBOL_GPL vmlinux 0x08a3e5d1	net_ipv6_ctl_path
+EXPORT_SYMBOL_GPL vmlinux 0x08bcd118	dev_attr_em_message_type
+EXPORT_SYMBOL_GPL vmlinux 0x091eb9b4	round_jiffies
+EXPORT_SYMBOL_GPL vmlinux 0x0930a9c5	pm_schedule_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x095bb233	driver_attach
+EXPORT_SYMBOL_GPL vmlinux 0x09c4effc	ata_sff_wait_after_reset
+EXPORT_SYMBOL_GPL vmlinux 0x09d60450	bus_for_each_drv
+EXPORT_SYMBOL_GPL vmlinux 0x0a143872	ata_sff_pause
+EXPORT_SYMBOL_GPL vmlinux 0x0a540fbd	fib_rules_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x0a6cb76f	cpuidle_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0x0ab1b3b7	ring_buffer_lock_reserve
+EXPORT_SYMBOL_GPL vmlinux 0x0ac0ab25	vring_interrupt
+EXPORT_SYMBOL_GPL vmlinux 0x0adcc7cd	queue_work
+EXPORT_SYMBOL_GPL vmlinux 0x0b07abe2	unshare_fs_struct
+EXPORT_SYMBOL_GPL vmlinux 0x0bb02b86	usb_hcd_pci_probe
+EXPORT_SYMBOL_GPL vmlinux 0x0c2cdbf1	synchronize_sched
+EXPORT_SYMBOL_GPL vmlinux 0x0c805f93	clflush_cache_range
+EXPORT_SYMBOL_GPL vmlinux 0x0cb88680	__tracepoint_block_rq_remap
+EXPORT_SYMBOL_GPL vmlinux 0x0cdb244f	dm_rh_recovery_in_flight
+EXPORT_SYMBOL_GPL vmlinux 0x0cdc4559	sched_setscheduler
+EXPORT_SYMBOL_GPL vmlinux 0x0d186d6b	hwmon_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x0d61d653	get_inotify_watch
+EXPORT_SYMBOL_GPL vmlinux 0x0da9043c	ata_eh_qc_retry
+EXPORT_SYMBOL_GPL vmlinux 0x0dbca508	crypto_alloc_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x0dd103c8	platform_device_add
+EXPORT_SYMBOL_GPL vmlinux 0x0deb0ade	register_timer_hook
+EXPORT_SYMBOL_GPL vmlinux 0x0dec69fa	usb_autopm_set_interface
+EXPORT_SYMBOL_GPL vmlinux 0x0e0248ef	ring_buffer_reset
+EXPORT_SYMBOL_GPL vmlinux 0x0e08ee85	usb_bus_list_lock
+EXPORT_SYMBOL_GPL vmlinux 0x0e109316	spi_get_device_id
+EXPORT_SYMBOL_GPL vmlinux 0x0e4fd0dc	elv_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x0e607bb1	rtc_read_time
+EXPORT_SYMBOL_GPL vmlinux 0x0e676d17	rtc_class_close
+EXPORT_SYMBOL_GPL vmlinux 0x0ea969d0	acpi_pci_find_root
+EXPORT_SYMBOL_GPL vmlinux 0x0ebaac6e	crypto_shash_update
+EXPORT_SYMBOL_GPL vmlinux 0x0ec0806c	ata_sg_init
+EXPORT_SYMBOL_GPL vmlinux 0x0ec210b8	xen_start_info
+EXPORT_SYMBOL_GPL vmlinux 0x0ef06974	spi_populate_ppr_msg
+EXPORT_SYMBOL_GPL vmlinux 0x0efde336	__pm_runtime_get
+EXPORT_SYMBOL_GPL vmlinux 0x0f0b6527	do_kern_mount
+EXPORT_SYMBOL_GPL vmlinux 0x0f404b6a	nf_register_afinfo
+EXPORT_SYMBOL_GPL vmlinux 0x0f73520f	klist_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0x0fdda2d3	pm_runtime_resume
+EXPORT_SYMBOL_GPL vmlinux 0x0fe2d570	xenbus_directory
+EXPORT_SYMBOL_GPL vmlinux 0x0ffa7775	fuse_request_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x100c13c6	usb_kill_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0x100c48a2	unregister_dock_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x10138352	tracing_on
+EXPORT_SYMBOL_GPL vmlinux 0x101c923e	__tracepoint_power_start
+EXPORT_SYMBOL_GPL vmlinux 0x10621889	hpet_rtc_interrupt
+EXPORT_SYMBOL_GPL vmlinux 0x107efbe6	platform_get_resource_byname
+EXPORT_SYMBOL_GPL vmlinux 0x109be214	usb_set_device_state
+EXPORT_SYMBOL_GPL vmlinux 0x10b6f257	rtc_set_mmss
+EXPORT_SYMBOL_GPL vmlinux 0x10c5f808	get_driver
+EXPORT_SYMBOL_GPL vmlinux 0x10da02cd	sysdev_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x10e9bf06	regulator_bulk_disable
+EXPORT_SYMBOL_GPL vmlinux 0x114a3caf	ata_pci_remove_one
+EXPORT_SYMBOL_GPL vmlinux 0x11655eb5	xfrm_audit_policy_delete
+EXPORT_SYMBOL_GPL vmlinux 0x116fe567	dm_rh_get_region_size
+EXPORT_SYMBOL_GPL vmlinux 0x11f447ce	__gpio_to_irq
+EXPORT_SYMBOL_GPL vmlinux 0x121fcda2	__pci_reset_function
+EXPORT_SYMBOL_GPL vmlinux 0x124f2056	crypto_get_attr_type
+EXPORT_SYMBOL_GPL vmlinux 0x1251d30f	call_rcu
+EXPORT_SYMBOL_GPL vmlinux 0x12580a2f	ata_sff_tf_load
+EXPORT_SYMBOL_GPL vmlinux 0x1268f357	resume_device_irqs
+EXPORT_SYMBOL_GPL vmlinux 0x1277da09	elv_register
+EXPORT_SYMBOL_GPL vmlinux 0x12926442	crypto_register_template
+EXPORT_SYMBOL_GPL vmlinux 0x12bed8db	ata_host_activate
+EXPORT_SYMBOL_GPL vmlinux 0x12cff88f	xfrm_audit_state_replay_overflow
+EXPORT_SYMBOL_GPL vmlinux 0x12db2655	ip6_dst_blackhole
+EXPORT_SYMBOL_GPL vmlinux 0x12deb4ea	ata_sff_dumb_qc_prep
+EXPORT_SYMBOL_GPL vmlinux 0x13b2a946	register_keyboard_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x13c9f718	sdio_readl
+EXPORT_SYMBOL_GPL vmlinux 0x13e3fa99	pci_get_hp_params
+EXPORT_SYMBOL_GPL vmlinux 0x1404796d	register_ftrace_event
+EXPORT_SYMBOL_GPL vmlinux 0x14254f95	input_ff_erase
+EXPORT_SYMBOL_GPL vmlinux 0x145d6b33	usb_get_urb
+EXPORT_SYMBOL_GPL vmlinux 0x149bd35c	usb_hcd_link_urb_to_ep
+EXPORT_SYMBOL_GPL vmlinux 0x149db923	selinux_string_to_sid
+EXPORT_SYMBOL_GPL vmlinux 0x14ed9d3f	platform_get_irq_byname
+EXPORT_SYMBOL_GPL vmlinux 0x152b2b81	ring_buffer_record_enable
+EXPORT_SYMBOL_GPL vmlinux 0x15568631	lookup_address
+EXPORT_SYMBOL_GPL vmlinux 0x156257e3	apic
+EXPORT_SYMBOL_GPL vmlinux 0x1562ab85	register_pernet_device
+EXPORT_SYMBOL_GPL vmlinux 0x15892417	async_synchronize_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x1596f928	ata_ehi_clear_desc
+EXPORT_SYMBOL_GPL vmlinux 0x1598dc9d	unregister_netevent_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x15b0606e	e820_any_mapped
+EXPORT_SYMBOL_GPL vmlinux 0x15b92e3e	rtnl_link_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x160b973d	queue_delayed_work
+EXPORT_SYMBOL_GPL vmlinux 0x162e3ebb	input_ff_create
+EXPORT_SYMBOL_GPL vmlinux 0x1638f040	ip6_dst_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x163d36f8	debugfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x16836e04	speedstep_detect_processor
+EXPORT_SYMBOL_GPL vmlinux 0x1697136d	hrtimer_init
+EXPORT_SYMBOL_GPL vmlinux 0x16adaca7	ring_buffer_iter_peek
+EXPORT_SYMBOL_GPL vmlinux 0x16c57b0c	unregister_jprobes
+EXPORT_SYMBOL_GPL vmlinux 0x16f76869	probe_kernel_read
+EXPORT_SYMBOL_GPL vmlinux 0x1717fe8b	fsstack_copy_inode_size
+EXPORT_SYMBOL_GPL vmlinux 0x171b577b	unregister_kprobes
+EXPORT_SYMBOL_GPL vmlinux 0x172e72d4	vdso_enabled
+EXPORT_SYMBOL_GPL vmlinux 0x178639ef	inet_csk_clone
+EXPORT_SYMBOL_GPL vmlinux 0x17abf088	pci_unblock_user_cfg_access
+EXPORT_SYMBOL_GPL vmlinux 0x17adf2f1	blk_execute_rq_nowait
+EXPORT_SYMBOL_GPL vmlinux 0x1810581d	dm_rh_start_recovery
+EXPORT_SYMBOL_GPL vmlinux 0x182b4539	cpufreq_unregister_governor
+EXPORT_SYMBOL_GPL vmlinux 0x18534d96	tty_mode_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x1878f62b	edac_err_assert
+EXPORT_SYMBOL_GPL vmlinux 0x18835b7d	ring_buffer_overrun_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x188a693d	crypto_shash_digest
+EXPORT_SYMBOL_GPL vmlinux 0x18ca4dde	scsi_flush_work
+EXPORT_SYMBOL_GPL vmlinux 0x18d53420	kgdb_register_io_module
+EXPORT_SYMBOL_GPL vmlinux 0x18e5198e	scsi_target_unblock
+EXPORT_SYMBOL_GPL vmlinux 0x18f83fab	gnttab_grant_foreign_access_ref
+EXPORT_SYMBOL_GPL vmlinux 0x192cbbc1	blk_lld_busy
+EXPORT_SYMBOL_GPL vmlinux 0x19405162	fib_rules_register
+EXPORT_SYMBOL_GPL vmlinux 0x195780c2	xfrm_audit_state_delete
+EXPORT_SYMBOL_GPL vmlinux 0x197dbe54	gpiochip_add
+EXPORT_SYMBOL_GPL vmlinux 0x198b1fa9	uart_console_write
+EXPORT_SYMBOL_GPL vmlinux 0x19a304ba	usb_disabled
+EXPORT_SYMBOL_GPL vmlinux 0x19b70ac1	perf_tp_event
+EXPORT_SYMBOL_GPL vmlinux 0x19b805b1	crypto_init_shash_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x19c3adcc	get_dcookie
+EXPORT_SYMBOL_GPL vmlinux 0x1a0b5e06	raw_unhash_sk
+EXPORT_SYMBOL_GPL vmlinux 0x1a323362	__ftrace_vbprintk
+EXPORT_SYMBOL_GPL vmlinux 0x1a34edbb	scsi_mode_select
+EXPORT_SYMBOL_GPL vmlinux 0x1a432e92	rdev_get_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0x1a474901	tracepoint_probe_unregister_noupdate
+EXPORT_SYMBOL_GPL vmlinux 0x1a938737	atomic_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x1a9b538e	ehci_cf_port_reset_rwsem
+EXPORT_SYMBOL_GPL vmlinux 0x1acda5b2	atomic_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x1ae14ed3	ata_sff_dev_classify
+EXPORT_SYMBOL_GPL vmlinux 0x1b2d40dd	ata_host_init
+EXPORT_SYMBOL_GPL vmlinux 0x1b5a9af5	br_handle_frame_hook
+EXPORT_SYMBOL_GPL vmlinux 0x1b7d9541	ata_cable_80wire
+EXPORT_SYMBOL_GPL vmlinux 0x1b9aca3f	jprobe_return
+EXPORT_SYMBOL_GPL vmlinux 0x1bafbaac	ipv6_opt_accepted
+EXPORT_SYMBOL_GPL vmlinux 0x1bb9f553	crypto_shash_final
+EXPORT_SYMBOL_GPL vmlinux 0x1c2cb88e	usb_get_descriptor
+EXPORT_SYMBOL_GPL vmlinux 0x1c7b6c2a	eventfd_ctx_fdget
+EXPORT_SYMBOL_GPL vmlinux 0x1c852e7c	xfrm_calg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x1c87a811	__round_jiffies_up
+EXPORT_SYMBOL_GPL vmlinux 0x1c8c42a0	fuse_conn_init
+EXPORT_SYMBOL_GPL vmlinux 0x1cc6b2e5	proc_net_fops_create
+EXPORT_SYMBOL_GPL vmlinux 0x1ce1a938	page_cache_async_readahead
+EXPORT_SYMBOL_GPL vmlinux 0x1d20d622	usb_register_device_driver
+EXPORT_SYMBOL_GPL vmlinux 0x1d6030f0	blk_end_request_err
+EXPORT_SYMBOL_GPL vmlinux 0x1d8f8059	__tracepoint_power_end
+EXPORT_SYMBOL_GPL vmlinux 0x1da65581	dm_rh_stop_recovery
+EXPORT_SYMBOL_GPL vmlinux 0x1db21d74	__tracepoint_kfree_skb
+EXPORT_SYMBOL_GPL vmlinux 0x1dbf984c	cpci_hp_register_bus
+EXPORT_SYMBOL_GPL vmlinux 0x1dee2629	trace_current_buffer_lock_reserve
+EXPORT_SYMBOL_GPL vmlinux 0x1e080456	get_task_mm
+EXPORT_SYMBOL_GPL vmlinux 0x1e1c3069	inet6_destroy_sock
+EXPORT_SYMBOL_GPL vmlinux 0x1e2f6d73	inet_csk_addr2sockaddr
+EXPORT_SYMBOL_GPL vmlinux 0x1e3d1d59	da903x_writes
+EXPORT_SYMBOL_GPL vmlinux 0x1e5986c7	tcp_reno_ssthresh
+EXPORT_SYMBOL_GPL vmlinux 0x1e7bbcb3	kernel_restart
+EXPORT_SYMBOL_GPL vmlinux 0x1eadd817	scsi_queue_work
+EXPORT_SYMBOL_GPL vmlinux 0x1eb8e160	isa_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0x1eb9516e	round_jiffies_relative
+EXPORT_SYMBOL_GPL vmlinux 0x1ebf6c2a	pci_power_names
+EXPORT_SYMBOL_GPL vmlinux 0x1f3d1b77	crypto_alg_sem
+EXPORT_SYMBOL_GPL vmlinux 0x1f8ec1b3	acpi_get_pci_rootbridge_handle
+EXPORT_SYMBOL_GPL vmlinux 0x1fa2f0c2	sysdev_store_int
+EXPORT_SYMBOL_GPL vmlinux 0x1fcece42	inet_twdr_twcal_tick
+EXPORT_SYMBOL_GPL vmlinux 0x1fd08d88	platform_device_register_simple
+EXPORT_SYMBOL_GPL vmlinux 0x200deea9	ata_do_set_mode
+EXPORT_SYMBOL_GPL vmlinux 0x204b917f	usb_get_current_frame_number
+EXPORT_SYMBOL_GPL vmlinux 0x205dcd7a	klist_add_tail
+EXPORT_SYMBOL_GPL vmlinux 0x206f85e5	sata_set_spd
+EXPORT_SYMBOL_GPL vmlinux 0x20a80599	ring_buffer_write
+EXPORT_SYMBOL_GPL vmlinux 0x20bc3470	orderly_poweroff
+EXPORT_SYMBOL_GPL vmlinux 0x20e01bc9	__class_create
+EXPORT_SYMBOL_GPL vmlinux 0x20fb826f	ata_sff_dev_select
+EXPORT_SYMBOL_GPL vmlinux 0x210dbbad	part_round_stats
+EXPORT_SYMBOL_GPL vmlinux 0x211ad049	crypto_alloc_shash
+EXPORT_SYMBOL_GPL vmlinux 0x215db6e9	tracepoint_probe_register_noupdate
+EXPORT_SYMBOL_GPL vmlinux 0x2172eb09	scsi_nl_add_driver
+EXPORT_SYMBOL_GPL vmlinux 0x21750f77	sock_prot_inuse_get
+EXPORT_SYMBOL_GPL vmlinux 0x2184b64f	sdio_readb
+EXPORT_SYMBOL_GPL vmlinux 0x2278c013	pci_bus_add_device
+EXPORT_SYMBOL_GPL vmlinux 0x2278e5c5	usb_hcd_pci_shutdown
+EXPORT_SYMBOL_GPL vmlinux 0x2294384d	dm_rh_get_region_key
+EXPORT_SYMBOL_GPL vmlinux 0x2296c00d	crypto_attr_u32
+EXPORT_SYMBOL_GPL vmlinux 0x229cd5da	trace_define_common_fields
+EXPORT_SYMBOL_GPL vmlinux 0x22b40fe3	fib_rules_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x230dce96	usb_unanchor_urb
+EXPORT_SYMBOL_GPL vmlinux 0x2312a29e	relay_open
+EXPORT_SYMBOL_GPL vmlinux 0x23253735	power_supply_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x233989b2	rt_mutex_timed_lock
+EXPORT_SYMBOL_GPL vmlinux 0x23616d26	regulator_set_mode
+EXPORT_SYMBOL_GPL vmlinux 0x23679939	__iowrite32_copy
+EXPORT_SYMBOL_GPL vmlinux 0x23864ce7	cpuset_mem_spread_node
+EXPORT_SYMBOL_GPL vmlinux 0x23869dc7	cancel_work_sync
+EXPORT_SYMBOL_GPL vmlinux 0x23a6ffe5	fuse_put_request
+EXPORT_SYMBOL_GPL vmlinux 0x23fd2a34	sysfs_create_group
+EXPORT_SYMBOL_GPL vmlinux 0x2405ef3f	spi_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0x240ea049	usb_hcd_check_unlink_urb
+EXPORT_SYMBOL_GPL vmlinux 0x2447533c	ktime_get_real
+EXPORT_SYMBOL_GPL vmlinux 0x24495712	regulator_list_voltage
+EXPORT_SYMBOL_GPL vmlinux 0x246f4153	pv_time_ops
+EXPORT_SYMBOL_GPL vmlinux 0x2471ed23	crypto_alloc_ablkcipher
+EXPORT_SYMBOL_GPL vmlinux 0x247c41b7	ata_scsi_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x24866ad7	debugfs_create_x16
+EXPORT_SYMBOL_GPL vmlinux 0x24aba334	__inet_lookup_established
+EXPORT_SYMBOL_GPL vmlinux 0x24c26e09	ahash_free_instance
+EXPORT_SYMBOL_GPL vmlinux 0x24c7698a	xenbus_write
+EXPORT_SYMBOL_GPL vmlinux 0x24eb7e32	leds_list
+EXPORT_SYMBOL_GPL vmlinux 0x25244437	input_class
+EXPORT_SYMBOL_GPL vmlinux 0x252a366d	sdio_writew
+EXPORT_SYMBOL_GPL vmlinux 0x2545c170	unregister_xenbus_watch
+EXPORT_SYMBOL_GPL vmlinux 0x2580adb3	sk_clone
+EXPORT_SYMBOL_GPL vmlinux 0x25817901	tty_find_polling_driver
+EXPORT_SYMBOL_GPL vmlinux 0x25adfed1	blkcipher_walk_phys
+EXPORT_SYMBOL_GPL vmlinux 0x260442c1	i2c_add_numbered_adapter
+EXPORT_SYMBOL_GPL vmlinux 0x265f573b	vfs_setlease
+EXPORT_SYMBOL_GPL vmlinux 0x267cd1c0	platform_bus
+EXPORT_SYMBOL_GPL vmlinux 0x26995e53	da903x_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x26c90ea4	scsi_eh_get_sense
+EXPORT_SYMBOL_GPL vmlinux 0x2714a01f	device_find_child
+EXPORT_SYMBOL_GPL vmlinux 0x2717c303	regulator_get_voltage
+EXPORT_SYMBOL_GPL vmlinux 0x274a949f	ring_buffer_normalize_time_stamp
+EXPORT_SYMBOL_GPL vmlinux 0x2758817c	dm_rh_dec
+EXPORT_SYMBOL_GPL vmlinux 0x277593e5	pm_runtime_idle
+EXPORT_SYMBOL_GPL vmlinux 0x2787db00	vbin_printf
+EXPORT_SYMBOL_GPL vmlinux 0x27adf232	tracing_generic_entry_update
+EXPORT_SYMBOL_GPL vmlinux 0x27dae6fa	raw_hash_sk
+EXPORT_SYMBOL_GPL vmlinux 0x281e44da	crypto_hash_walk_first
+EXPORT_SYMBOL_GPL vmlinux 0x288de21c	iomap_atomic_prot_pfn
+EXPORT_SYMBOL_GPL vmlinux 0x288e5f60	fuse_get_req
+EXPORT_SYMBOL_GPL vmlinux 0x28c045ba	crypto_aead_type
+EXPORT_SYMBOL_GPL vmlinux 0x28cdd248	pci_disable_sriov
+EXPORT_SYMBOL_GPL vmlinux 0x28d664ff	__raw_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x28dd174b	usb_autopm_put_interface
+EXPORT_SYMBOL_GPL vmlinux 0x28e23139	xfrm_probe_algs
+EXPORT_SYMBOL_GPL vmlinux 0x29292e86	md_allow_write
+EXPORT_SYMBOL_GPL vmlinux 0x29501527	klist_iter_init_node
+EXPORT_SYMBOL_GPL vmlinux 0x29763af4	xenbus_unmap_ring
+EXPORT_SYMBOL_GPL vmlinux 0x2980c410	power_supply_am_i_supplied
+EXPORT_SYMBOL_GPL vmlinux 0x2998ba57	sysfs_remove_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0x2a0a4724	bind_evtchn_to_irqhandler
+EXPORT_SYMBOL_GPL vmlinux 0x2a33906b	page_cache_sync_readahead
+EXPORT_SYMBOL_GPL vmlinux 0x2a34de0b	rtc_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x2a476d28	platform_device_add_data
+EXPORT_SYMBOL_GPL vmlinux 0x2a678a13	__suspend_report_result
+EXPORT_SYMBOL_GPL vmlinux 0x2a6fde37	srcu_read_lock
+EXPORT_SYMBOL_GPL vmlinux 0x2a993ebf	ata_sff_check_status
+EXPORT_SYMBOL_GPL vmlinux 0x2aafbaaf	pci_sriov_migration
+EXPORT_SYMBOL_GPL vmlinux 0x2af90271	speedstep_get_frequency
+EXPORT_SYMBOL_GPL vmlinux 0x2b12c58f	sdio_memcpy_fromio
+EXPORT_SYMBOL_GPL vmlinux 0x2b52d13b	usb_get_from_anchor
+EXPORT_SYMBOL_GPL vmlinux 0x2b9f8e23	nf_net_ipv4_netfilter_sysctl_path
+EXPORT_SYMBOL_GPL vmlinux 0x2baa21da	crypto_ahash_finup
+EXPORT_SYMBOL_GPL vmlinux 0x2bc5b9f4	eventfd_ctx_fileget
+EXPORT_SYMBOL_GPL vmlinux 0x2be7fb8e	disable_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0x2bfc4d7f	tracepoint_get_iter_range
+EXPORT_SYMBOL_GPL vmlinux 0x2c208607	power_supply_is_system_supplied
+EXPORT_SYMBOL_GPL vmlinux 0x2c972890	vfs_removexattr
+EXPORT_SYMBOL_GPL vmlinux 0x2cbe5380	blk_rq_unprep_clone
+EXPORT_SYMBOL_GPL vmlinux 0x2ce6cfa3	ata_port_start
+EXPORT_SYMBOL_GPL vmlinux 0x2ce98559	kcrypto_wq
+EXPORT_SYMBOL_GPL vmlinux 0x2d53afee	anon_transport_class_register
+EXPORT_SYMBOL_GPL vmlinux 0x2d5cedd6	i2c_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x2d9f2ce3	sched_clock_idle_wakeup_event
+EXPORT_SYMBOL_GPL vmlinux 0x2dd11777	devres_remove_group
+EXPORT_SYMBOL_GPL vmlinux 0x2dd8444c	trace_seq_printf
+EXPORT_SYMBOL_GPL vmlinux 0x2df05483	sysfs_chmod_file
+EXPORT_SYMBOL_GPL vmlinux 0x2e2c7396	ata_sff_tf_read
+EXPORT_SYMBOL_GPL vmlinux 0x2e47f677	xfrm_aalg_get_byidx
+EXPORT_SYMBOL_GPL vmlinux 0x2f3b13a3	usb_store_new_id
+EXPORT_SYMBOL_GPL vmlinux 0x2f47d8c7	cpufreq_frequency_get_table
+EXPORT_SYMBOL_GPL vmlinux 0x2f857551	machine_check_poll
+EXPORT_SYMBOL_GPL vmlinux 0x2f89e1a5	regulator_register
+EXPORT_SYMBOL_GPL vmlinux 0x2fcd9e17	dpm_resume_noirq
+EXPORT_SYMBOL_GPL vmlinux 0x2ff41901	usb_reset_device
+EXPORT_SYMBOL_GPL vmlinux 0x2ff54cb1	acpi_get_pci_dev
+EXPORT_SYMBOL_GPL vmlinux 0x3009a680	usb_buffer_unmap_sg
+EXPORT_SYMBOL_GPL vmlinux 0x304edd32	acpi_ec_remove_query_handler
+EXPORT_SYMBOL_GPL vmlinux 0x30856092	usb_alloc_urb
+EXPORT_SYMBOL_GPL vmlinux 0x30a4f4ca	bstr_printf
+EXPORT_SYMBOL_GPL vmlinux 0x30dfbdf0	dm_rh_delay
+EXPORT_SYMBOL_GPL vmlinux 0x30f591cf	pid_vnr
+EXPORT_SYMBOL_GPL vmlinux 0x31681430	inet_diag_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x318920b1	register_dock_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x3189d4df	driver_register
+EXPORT_SYMBOL_GPL vmlinux 0x3195c066	ata_acpi_stm
+EXPORT_SYMBOL_GPL vmlinux 0x31c54454	spi_unregister_master
+EXPORT_SYMBOL_GPL vmlinux 0x3204d4cc	crypto_mod_get
+EXPORT_SYMBOL_GPL vmlinux 0x325a5c26	dm_rh_recovery_prepare
+EXPORT_SYMBOL_GPL vmlinux 0x325e677c	gnttab_grant_foreign_transfer_ref
+EXPORT_SYMBOL_GPL vmlinux 0x32924a4d	scatterwalk_copychunks
+EXPORT_SYMBOL_GPL vmlinux 0x32bf8a2d	blk_add_driver_data
+EXPORT_SYMBOL_GPL vmlinux 0x32d5e7fc	xfrm_aalg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x32f17454	ring_buffer_event_data
+EXPORT_SYMBOL_GPL vmlinux 0x330dae7f	relay_switch_subbuf
+EXPORT_SYMBOL_GPL vmlinux 0x33697f3b	platform_add_devices
+EXPORT_SYMBOL_GPL vmlinux 0x3392859a	generic_fh_to_dentry
+EXPORT_SYMBOL_GPL vmlinux 0x3392fe4c	unregister_pernet_device
+EXPORT_SYMBOL_GPL vmlinux 0x33c54d7b	dm_dispatch_request
+EXPORT_SYMBOL_GPL vmlinux 0x33d8a23d	filter_match_preds
+EXPORT_SYMBOL_GPL vmlinux 0x34275124	trace_current_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0x3435998b	pci_stop_bus_device
+EXPORT_SYMBOL_GPL vmlinux 0x3441c3d6	gpio_set_value_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x345cad16	sata_sff_hardreset
+EXPORT_SYMBOL_GPL vmlinux 0x3471cf7c	usb_init_urb
+EXPORT_SYMBOL_GPL vmlinux 0x34a3a67d	init_user_ns
+EXPORT_SYMBOL_GPL vmlinux 0x34a944cc	crypto_ahash_setkey
+EXPORT_SYMBOL_GPL vmlinux 0x354c6072	crypto_unregister_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0x35be5708	transport_class_register
+EXPORT_SYMBOL_GPL vmlinux 0x35cc4d6b	inet_twsk_schedule
+EXPORT_SYMBOL_GPL vmlinux 0x35d8c94a	sdev_evt_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x35e6c470	crypto_grab_skcipher
+EXPORT_SYMBOL_GPL vmlinux 0x35f7c1d9	udp4_lib_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x35fd0312	per_cpu__injectm
+EXPORT_SYMBOL_GPL vmlinux 0x36184378	sdio_set_block_size
+EXPORT_SYMBOL_GPL vmlinux 0x361b8930	firmware_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x361e2bcc	save_stack_trace
+EXPORT_SYMBOL_GPL vmlinux 0x362e23ec	call_rcu_bh
+EXPORT_SYMBOL_GPL vmlinux 0x36e61d68	inotify_inode_queue_event
+EXPORT_SYMBOL_GPL vmlinux 0x3714af78	put_device
+EXPORT_SYMBOL_GPL vmlinux 0x372c9ba3	devres_get
+EXPORT_SYMBOL_GPL vmlinux 0x373b1f59	blk_rq_check_limits
+EXPORT_SYMBOL_GPL vmlinux 0x374a690c	device_create
+EXPORT_SYMBOL_GPL vmlinux 0x37ad4176	__tracepoint_block_bio_complete
+EXPORT_SYMBOL_GPL vmlinux 0x3841ab01	unregister_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0x38993e51	simple_attr_release
+EXPORT_SYMBOL_GPL vmlinux 0x38a80cee	device_attach
+EXPORT_SYMBOL_GPL vmlinux 0x38a9c2c7	input_ff_effect_from_user
+EXPORT_SYMBOL_GPL vmlinux 0x38ea936e	__memory_failure
+EXPORT_SYMBOL_GPL vmlinux 0x39287f45	pcie_port_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x3928f35a	acpi_smbus_register_callback
+EXPORT_SYMBOL_GPL vmlinux 0x3948711e	tty_ldisc_flush
+EXPORT_SYMBOL_GPL vmlinux 0x3968d9f0	device_del
+EXPORT_SYMBOL_GPL vmlinux 0x397738d6	ata_sff_freeze
+EXPORT_SYMBOL_GPL vmlinux 0x39ec0a5c	crypto_create_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x39fa9604	usb_match_one_id
+EXPORT_SYMBOL_GPL vmlinux 0x3a3483fd	__mmu_notifier_register
+EXPORT_SYMBOL_GPL vmlinux 0x3a5e0919	tcp_unregister_congestion_control
+EXPORT_SYMBOL_GPL vmlinux 0x3a7ea5bb	srcu_batches_completed
+EXPORT_SYMBOL_GPL vmlinux 0x3a8da803	fsstack_copy_attr_all
+EXPORT_SYMBOL_GPL vmlinux 0x3ac2ef70	devres_close_group
+EXPORT_SYMBOL_GPL vmlinux 0x3ad62023	__pneigh_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x3b10d2a8	br_fdb_test_addr_hook
+EXPORT_SYMBOL_GPL vmlinux 0x3b890af3	xenbus_unmap_ring_vfree
+EXPORT_SYMBOL_GPL vmlinux 0x3b9eee2a	sdio_writel
+EXPORT_SYMBOL_GPL vmlinux 0x3ba610e0	set_task_ioprio
+EXPORT_SYMBOL_GPL vmlinux 0x3bba2245	skb_morph
+EXPORT_SYMBOL_GPL vmlinux 0x3bd04670	class_find_device
+EXPORT_SYMBOL_GPL vmlinux 0x3be7af02	get_max_files
+EXPORT_SYMBOL_GPL vmlinux 0x3be89d3c	usb_register_notify
+EXPORT_SYMBOL_GPL vmlinux 0x3c2044f6	led_trigger_store
+EXPORT_SYMBOL_GPL vmlinux 0x3c37f58b	regulator_get_exclusive
+EXPORT_SYMBOL_GPL vmlinux 0x3c45d035	pci_rescan_bus
+EXPORT_SYMBOL_GPL vmlinux 0x3c51a4a2	dm_send_uevents
+EXPORT_SYMBOL_GPL vmlinux 0x3c6c45ca	__tracepoint_power_frequency
+EXPORT_SYMBOL_GPL vmlinux 0x3c942368	profile_event_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x3cd06035	add_input_randomness
+EXPORT_SYMBOL_GPL vmlinux 0x3cfdfae5	trace_current_buffer_discard_commit
+EXPORT_SYMBOL_GPL vmlinux 0x3cfedb3f	register_pm_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x3d388324	dpm_resume_end
+EXPORT_SYMBOL_GPL vmlinux 0x3d581ced	tty_ldisc_deref
+EXPORT_SYMBOL_GPL vmlinux 0x3d63080b	cpci_hp_register_controller
+EXPORT_SYMBOL_GPL vmlinux 0x3d6e5447	put_inotify_watch
+EXPORT_SYMBOL_GPL vmlinux 0x3d7ea99a	gnttab_grant_foreign_transfer
+EXPORT_SYMBOL_GPL vmlinux 0x3dcd8ab5	inet_csk_search_req
+EXPORT_SYMBOL_GPL vmlinux 0x3dd4d3a7	bprintf
+EXPORT_SYMBOL_GPL vmlinux 0x3dd5d829	add_timer_on
+EXPORT_SYMBOL_GPL vmlinux 0x3dde0e07	amd_get_nb_id
+EXPORT_SYMBOL_GPL vmlinux 0x3dea9482	ata_bus_reset
+EXPORT_SYMBOL_GPL vmlinux 0x3dff519e	ata_common_sdev_attrs
+EXPORT_SYMBOL_GPL vmlinux 0x3e70373b	sync_page_io
+EXPORT_SYMBOL_GPL vmlinux 0x3e757637	cpu_bit_bitmap
+EXPORT_SYMBOL_GPL vmlinux 0x3ecf6cfc	wmi_install_notify_handler
+EXPORT_SYMBOL_GPL vmlinux 0x3efb35c9	get_online_cpus
+EXPORT_SYMBOL_GPL vmlinux 0x3f01570a	probe_kernel_write
+EXPORT_SYMBOL_GPL vmlinux 0x3f0e7a1c	crypto_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x3f238101	dcookie_register
+EXPORT_SYMBOL_GPL vmlinux 0x3f5a1050	sysdev_driver_register
+EXPORT_SYMBOL_GPL vmlinux 0x3f84d4c9	gnttab_release_grant_reference
+EXPORT_SYMBOL_GPL vmlinux 0x3f91dd72	sysfs_notify_dirent
+EXPORT_SYMBOL_GPL vmlinux 0x3fe49d3f	blkdev_aio_write
+EXPORT_SYMBOL_GPL vmlinux 0x40205050	__inet_hash_nolisten
+EXPORT_SYMBOL_GPL vmlinux 0x40af0dec	ata_xfer_mode2mask
+EXPORT_SYMBOL_GPL vmlinux 0x40b07e4e	dm_rh_recovery_end
+EXPORT_SYMBOL_GPL vmlinux 0x40be2c41	blocking_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x4102f234	inotify_rm_wd
+EXPORT_SYMBOL_GPL vmlinux 0x410404ef	inet_csk_bind_conflict
+EXPORT_SYMBOL_GPL vmlinux 0x4135d271	inotify_init
+EXPORT_SYMBOL_GPL vmlinux 0x413c9b2a	spi_alloc_device
+EXPORT_SYMBOL_GPL vmlinux 0x41a603c3	simple_attr_read
+EXPORT_SYMBOL_GPL vmlinux 0x41adf226	mnt_clone_write
+EXPORT_SYMBOL_GPL vmlinux 0x4204b4e9	ata_port_desc
+EXPORT_SYMBOL_GPL vmlinux 0x42494cea	ring_buffer_event_length
+EXPORT_SYMBOL_GPL vmlinux 0x424acc6d	scatterwalk_done
+EXPORT_SYMBOL_GPL vmlinux 0x424be8a4	usb_put_hcd
+EXPORT_SYMBOL_GPL vmlinux 0x4261e932	ata_host_register
+EXPORT_SYMBOL_GPL vmlinux 0x42646664	sis_info133_for_sata
+EXPORT_SYMBOL_GPL vmlinux 0x426f13b9	e820_all_mapped
+EXPORT_SYMBOL_GPL vmlinux 0x42a4231b	ata_pci_bmdma_clear_simplex
+EXPORT_SYMBOL_GPL vmlinux 0x42bb61ff	tcp_register_congestion_control
+EXPORT_SYMBOL_GPL vmlinux 0x42d70e51	tracepoint_iter_start
+EXPORT_SYMBOL_GPL vmlinux 0x4309c983	pci_block_user_cfg_access
+EXPORT_SYMBOL_GPL vmlinux 0x432fd7f6	__gpio_set_value
+EXPORT_SYMBOL_GPL vmlinux 0x435c24a4	spi_write_then_read
+EXPORT_SYMBOL_GPL vmlinux 0x439a5f5f	xenbus_dev_fatal
+EXPORT_SYMBOL_GPL vmlinux 0x43a34db8	ata_sff_dma_pause
+EXPORT_SYMBOL_GPL vmlinux 0x43f56e82	ata_xfer_mode2shift
+EXPORT_SYMBOL_GPL vmlinux 0x44312bcf	ring_buffer_size
+EXPORT_SYMBOL_GPL vmlinux 0x4448bf31	user_describe
+EXPORT_SYMBOL_GPL vmlinux 0x4460a8a0	usb_unpoison_urb
+EXPORT_SYMBOL_GPL vmlinux 0x44727e81	ring_buffer_swap_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x447b2c51	pci_slots_kset
+EXPORT_SYMBOL_GPL vmlinux 0x4484a5a4	wait_for_device_probe
+EXPORT_SYMBOL_GPL vmlinux 0x44a65d5c	lock_policy_rwsem_read
+EXPORT_SYMBOL_GPL vmlinux 0x44b2ba93	crypto_init_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x44f119ec	blk_queue_lld_busy
+EXPORT_SYMBOL_GPL vmlinux 0x4510eaf2	fs_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x4541fe0d	mtrr_state
+EXPORT_SYMBOL_GPL vmlinux 0x454d5c01	blocking_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x45512ba7	regulator_set_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0x455bc3a2	tracepoint_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0x457594fa	crypto_alg_list
+EXPORT_SYMBOL_GPL vmlinux 0x45bf1ff3	crypto_inc
+EXPORT_SYMBOL_GPL vmlinux 0x45bfcefe	crypto_register_alg
+EXPORT_SYMBOL_GPL vmlinux 0x45c127f7	inotify_remove_watch_locked
+EXPORT_SYMBOL_GPL vmlinux 0x45d14bdf	hypercall_page
+EXPORT_SYMBOL_GPL vmlinux 0x460aa93f	ata_sff_port_start
+EXPORT_SYMBOL_GPL vmlinux 0x460f31aa	rodata_test_data
+EXPORT_SYMBOL_GPL vmlinux 0x4624d620	sdio_align_size
+EXPORT_SYMBOL_GPL vmlinux 0x463d5807	posix_timer_event
+EXPORT_SYMBOL_GPL vmlinux 0x4648a74f	driver_find
+EXPORT_SYMBOL_GPL vmlinux 0x46708188	zap_vma_ptes
+EXPORT_SYMBOL_GPL vmlinux 0x4672e88b	__crypto_dequeue_request
+EXPORT_SYMBOL_GPL vmlinux 0x469e5927	__sock_recv_timestamp
+EXPORT_SYMBOL_GPL vmlinux 0x4705bd87	ata_sas_port_stop
+EXPORT_SYMBOL_GPL vmlinux 0x47229b5c	gpio_request
+EXPORT_SYMBOL_GPL vmlinux 0x47776ffb	fuse_conn_put
+EXPORT_SYMBOL_GPL vmlinux 0x4797b17f	tty_get_pgrp
+EXPORT_SYMBOL_GPL vmlinux 0x47c52267	sata_scr_write_flush
+EXPORT_SYMBOL_GPL vmlinux 0x47c8ba85	pm_request_resume
+EXPORT_SYMBOL_GPL vmlinux 0x47ea8a7f	kill_pid_info_as_uid
+EXPORT_SYMBOL_GPL vmlinux 0x499043d3	crypto_init_queue
+EXPORT_SYMBOL_GPL vmlinux 0x49a84764	ata_eh_qc_complete
+EXPORT_SYMBOL_GPL vmlinux 0x49db8db4	register_jprobes
+EXPORT_SYMBOL_GPL vmlinux 0x4a43c6c8	scsi_unregister_device_handler
+EXPORT_SYMBOL_GPL vmlinux 0x4a59da0f	unregister_pernet_gen_device
+EXPORT_SYMBOL_GPL vmlinux 0x4a91cb4b	preempt_notifier_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x4ab3cca7	crypto_grab_aead
+EXPORT_SYMBOL_GPL vmlinux 0x4b222951	usb_hcd_giveback_urb
+EXPORT_SYMBOL_GPL vmlinux 0x4b6e75f6	sdio_claim_host
+EXPORT_SYMBOL_GPL vmlinux 0x4bebcf16	sysfs_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x4c181aff	ata_pci_bmdma_init
+EXPORT_SYMBOL_GPL vmlinux 0x4c2f30d4	power_supply_class
+EXPORT_SYMBOL_GPL vmlinux 0x4c3cbe86	crypto_hash_walk_done
+EXPORT_SYMBOL_GPL vmlinux 0x4c40963d	ata_sff_drain_fifo
+EXPORT_SYMBOL_GPL vmlinux 0x4c705271	rtc_irq_register
+EXPORT_SYMBOL_GPL vmlinux 0x4c759827	byte_rev_table
+EXPORT_SYMBOL_GPL vmlinux 0x4c814a44	ata_sff_port_start32
+EXPORT_SYMBOL_GPL vmlinux 0x4cbf341f	usb_create_hcd
+EXPORT_SYMBOL_GPL vmlinux 0x4cec82ee	crypto_chain
+EXPORT_SYMBOL_GPL vmlinux 0x4d35a984	raw_seq_stop
+EXPORT_SYMBOL_GPL vmlinux 0x4d3b7584	sdio_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0x4d8c365c	crypto_init_spawn2
+EXPORT_SYMBOL_GPL vmlinux 0x4d8f4c15	klist_add_before
+EXPORT_SYMBOL_GPL vmlinux 0x4db26b42	ata_do_eh
+EXPORT_SYMBOL_GPL vmlinux 0x4db41351	tcp_set_state
+EXPORT_SYMBOL_GPL vmlinux 0x4ddbd097	pci_restore_msi_state
+EXPORT_SYMBOL_GPL vmlinux 0x4e2c146a	register_net_sysctl_table
+EXPORT_SYMBOL_GPL vmlinux 0x4e431410	device_bind_driver
+EXPORT_SYMBOL_GPL vmlinux 0x4e7548eb	pm_runtime_barrier
+EXPORT_SYMBOL_GPL vmlinux 0x4ee02e94	srcu_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x4eedd8f5	device_remove_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0x4f05bad0	shmem_file_setup
+EXPORT_SYMBOL_GPL vmlinux 0x4f0bce29	hwmon_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x4f646911	ring_buffer_read_start
+EXPORT_SYMBOL_GPL vmlinux 0x4f7e429a	pci_configure_slot
+EXPORT_SYMBOL_GPL vmlinux 0x4f95f211	spi_register_master
+EXPORT_SYMBOL_GPL vmlinux 0x4fad79d7	ring_buffer_overruns
+EXPORT_SYMBOL_GPL vmlinux 0x4fb927c4	__rtnl_register
+EXPORT_SYMBOL_GPL vmlinux 0x4fdc945d	sata_deb_timing_normal
+EXPORT_SYMBOL_GPL vmlinux 0x5000c998	pci_hp_remove_module_link
+EXPORT_SYMBOL_GPL vmlinux 0x5086ac3a	alg_test
+EXPORT_SYMBOL_GPL vmlinux 0x50c1d92a	usb_unlink_urb
+EXPORT_SYMBOL_GPL vmlinux 0x50c89f23	__alloc_percpu
+EXPORT_SYMBOL_GPL vmlinux 0x50e7193a	__i2c_first_dynamic_bus_num
+EXPORT_SYMBOL_GPL vmlinux 0x50f5e532	call_rcu_sched
+EXPORT_SYMBOL_GPL vmlinux 0x50fad434	round_jiffies_up
+EXPORT_SYMBOL_GPL vmlinux 0x5108b3fc	acpi_os_map_memory
+EXPORT_SYMBOL_GPL vmlinux 0x51786fa6	fuse_sync_release
+EXPORT_SYMBOL_GPL vmlinux 0x518c2fc6	hpet_rtc_dropped_irq
+EXPORT_SYMBOL_GPL vmlinux 0x51be173e	regulator_get_mode
+EXPORT_SYMBOL_GPL vmlinux 0x51d423fe	scsi_dh_set_params
+EXPORT_SYMBOL_GPL vmlinux 0x51f72375	unregister_kretprobes
+EXPORT_SYMBOL_GPL vmlinux 0x521b8759	ata_cable_unknown
+EXPORT_SYMBOL_GPL vmlinux 0x52496c50	fixed_phy_set_link_update
+EXPORT_SYMBOL_GPL vmlinux 0x52526007	ata_sff_lost_interrupt
+EXPORT_SYMBOL_GPL vmlinux 0x526ddd08	srcu_read_unlock
+EXPORT_SYMBOL_GPL vmlinux 0x52710558	unregister_kretprobe
+EXPORT_SYMBOL_GPL vmlinux 0x5281f665	pci_disable_pcie_error_reporting
+EXPORT_SYMBOL_GPL vmlinux 0x52ca52a6	dm_get_rq_mapinfo
+EXPORT_SYMBOL_GPL vmlinux 0x52d111ea	pm_qos_update_requirement
+EXPORT_SYMBOL_GPL vmlinux 0x533aaff1	ring_buffer_commit_overrun_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x534f0477	tracepoint_iter_stop
+EXPORT_SYMBOL_GPL vmlinux 0x53519674	xfrm_audit_state_add
+EXPORT_SYMBOL_GPL vmlinux 0x53614269	get_cpu_idle_time_us
+EXPORT_SYMBOL_GPL vmlinux 0x5370f0c7	kobject_rename
+EXPORT_SYMBOL_GPL vmlinux 0x5372dede	unregister_acpi_bus_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x53986488	register_die_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x53cc1ded	ata_bmdma_status
+EXPORT_SYMBOL_GPL vmlinux 0x540c3d4b	inet_twsk_purge
+EXPORT_SYMBOL_GPL vmlinux 0x5411fc65	sdio_writesb
+EXPORT_SYMBOL_GPL vmlinux 0x54244ceb	inet6_csk_xmit
+EXPORT_SYMBOL_GPL vmlinux 0x54511151	blkdev_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x545ac9a6	platform_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x5460c8d8	fsnotify_get_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x54677c26	ata_bmdma_start
+EXPORT_SYMBOL_GPL vmlinux 0x5492ef1b	kobject_get_path
+EXPORT_SYMBOL_GPL vmlinux 0x549525ef	handle_nested_irq
+EXPORT_SYMBOL_GPL vmlinux 0x54b9dbd5	register_kretprobes
+EXPORT_SYMBOL_GPL vmlinux 0x54cfe1c7	class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x54d155ce	hypervisor_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x55432304	securityfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x55526907	xen_features
+EXPORT_SYMBOL_GPL vmlinux 0x55829777	__ip_route_output_key
+EXPORT_SYMBOL_GPL vmlinux 0x558365b1	inet6_csk_reqsk_queue_hash_add
+EXPORT_SYMBOL_GPL vmlinux 0x55958530	get_cpu_sysdev
+EXPORT_SYMBOL_GPL vmlinux 0x55cd2f35	simple_attr_write
+EXPORT_SYMBOL_GPL vmlinux 0x55cdc66d	ata_slave_link_init
+EXPORT_SYMBOL_GPL vmlinux 0x55e8d260	uhci_reset_hc
+EXPORT_SYMBOL_GPL vmlinux 0x5614d1e2	queue_delayed_work_on
+EXPORT_SYMBOL_GPL vmlinux 0x56310925	regulator_mode_to_status
+EXPORT_SYMBOL_GPL vmlinux 0x56398615	mark_tsc_unstable
+EXPORT_SYMBOL_GPL vmlinux 0x563fb5c8	__trace_bprintk
+EXPORT_SYMBOL_GPL vmlinux 0x5641485b	tty_termios_encode_baud_rate
+EXPORT_SYMBOL_GPL vmlinux 0x56947347	dmi_walk
+EXPORT_SYMBOL_GPL vmlinux 0x56dbfe60	ata_sff_postreset
+EXPORT_SYMBOL_GPL vmlinux 0x56fdcc9d	debugfs_rename
+EXPORT_SYMBOL_GPL vmlinux 0x5710fa94	usb_buffer_map_sg
+EXPORT_SYMBOL_GPL vmlinux 0x5722cf95	unregister_pernet_subsys
+EXPORT_SYMBOL_GPL vmlinux 0x57318787	vfs_setxattr
+EXPORT_SYMBOL_GPL vmlinux 0x5779d445	xenbus_exists
+EXPORT_SYMBOL_GPL vmlinux 0x579e0bf5	rtnl_unregister_all
+EXPORT_SYMBOL_GPL vmlinux 0x57c32793	tcp_reno_min_cwnd
+EXPORT_SYMBOL_GPL vmlinux 0x580cc049	pci_enable_pcie_error_reporting
+EXPORT_SYMBOL_GPL vmlinux 0x58286771	bus_for_each_dev
+EXPORT_SYMBOL_GPL vmlinux 0x5853084f	rtc_set_time
+EXPORT_SYMBOL_GPL vmlinux 0x58671446	ata_pci_sff_init_host
+EXPORT_SYMBOL_GPL vmlinux 0x58f965ef	aead_geniv_init
+EXPORT_SYMBOL_GPL vmlinux 0x5916acb3	gpiochip_remove
+EXPORT_SYMBOL_GPL vmlinux 0x591df925	relay_buf_full
+EXPORT_SYMBOL_GPL vmlinux 0x593a36c2	scsi_dh_handler_exist
+EXPORT_SYMBOL_GPL vmlinux 0x593ee010	crypto_spawn_tfm2
+EXPORT_SYMBOL_GPL vmlinux 0x59507087	security_inode_create
+EXPORT_SYMBOL_GPL vmlinux 0x59ca3224	inet_twdr_twkill_work
+EXPORT_SYMBOL_GPL vmlinux 0x59d26f28	sysdev_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x5a1c9633	securityfs_create_dir
+EXPORT_SYMBOL_GPL vmlinux 0x5a2b1b67	gnttab_free_grant_reference
+EXPORT_SYMBOL_GPL vmlinux 0x5a6ec452	device_reprobe
+EXPORT_SYMBOL_GPL vmlinux 0x5a7bfe41	crypto_probing_notify
+EXPORT_SYMBOL_GPL vmlinux 0x5af03a28	gnttab_claim_grant_reference
+EXPORT_SYMBOL_GPL vmlinux 0x5af20371	sysfs_remove_file_from_group
+EXPORT_SYMBOL_GPL vmlinux 0x5b0781ee	usb_altnum_to_altsetting
+EXPORT_SYMBOL_GPL vmlinux 0x5b309b3d	bd_release_from_disk
+EXPORT_SYMBOL_GPL vmlinux 0x5b33a11a	__blkdev_driver_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x5bfc03c3	unregister_keyboard_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5c11b85d	spi_add_device
+EXPORT_SYMBOL_GPL vmlinux 0x5c3e7099	class_dev_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0x5c4037c4	kernel_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x5c5d603f	pci_find_next_capability
+EXPORT_SYMBOL_GPL vmlinux 0x5c9b768d	attribute_container_register
+EXPORT_SYMBOL_GPL vmlinux 0x5cf04dcf	pciserial_init_ports
+EXPORT_SYMBOL_GPL vmlinux 0x5d0f6f57	kbd_table
+EXPORT_SYMBOL_GPL vmlinux 0x5d2614d9	acpi_ec_add_query_handler
+EXPORT_SYMBOL_GPL vmlinux 0x5d366dec	gnttab_cancel_free_callback
+EXPORT_SYMBOL_GPL vmlinux 0x5d730e7b	raw_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x5d87c067	register_acpi_bus_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5d9ef447	input_ff_upload
+EXPORT_SYMBOL_GPL vmlinux 0x5dc78542	sdio_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0x5dd67618	register_netevent_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5dd69273	crypto_shash_setkey
+EXPORT_SYMBOL_GPL vmlinux 0x5e3960fa	fuse_conn_get
+EXPORT_SYMBOL_GPL vmlinux 0x5e509d5b	pciserial_remove_ports
+EXPORT_SYMBOL_GPL vmlinux 0x5e65a6ed	ata_acpi_gtm
+EXPORT_SYMBOL_GPL vmlinux 0x5ebab351	input_ff_event
+EXPORT_SYMBOL_GPL vmlinux 0x5ee270f4	__inet_twsk_hashdance
+EXPORT_SYMBOL_GPL vmlinux 0x5f2da8c4	check_tsc_unstable
+EXPORT_SYMBOL_GPL vmlinux 0x5f4dc9d6	invalidate_inode_pages2_range
+EXPORT_SYMBOL_GPL vmlinux 0x5f700500	ring_buffer_read_finish
+EXPORT_SYMBOL_GPL vmlinux 0x5f7d5d9d	tcp_reno_cong_avoid
+EXPORT_SYMBOL_GPL vmlinux 0x5f9372b3	inotify_find_update_watch
+EXPORT_SYMBOL_GPL vmlinux 0x5fc9bf15	usb_ifnum_to_if
+EXPORT_SYMBOL_GPL vmlinux 0x5fcdec5d	xfrm_ealg_get_byidx
+EXPORT_SYMBOL_GPL vmlinux 0x5fcee70e	crypto_rng_type
+EXPORT_SYMBOL_GPL vmlinux 0x600c2197	pci_set_pcie_reset_state
+EXPORT_SYMBOL_GPL vmlinux 0x60a13e90	rcu_barrier
+EXPORT_SYMBOL_GPL vmlinux 0x60a4562c	nf_unregister_queue_handlers
+EXPORT_SYMBOL_GPL vmlinux 0x60cd73ed	pv_apic_ops
+EXPORT_SYMBOL_GPL vmlinux 0x60e5f765	spi_busnum_to_master
+EXPORT_SYMBOL_GPL vmlinux 0x615d8880	dm_set_device_limits
+EXPORT_SYMBOL_GPL vmlinux 0x6160ea69	mnt_want_write
+EXPORT_SYMBOL_GPL vmlinux 0x61747e09	blocking_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x61a3246e	dm_rh_region_to_sector
+EXPORT_SYMBOL_GPL vmlinux 0x61c3fd14	ata_port_disable
+EXPORT_SYMBOL_GPL vmlinux 0x61d9e25c	ata_cable_40wire
+EXPORT_SYMBOL_GPL vmlinux 0x61f5ed64	crypto_ablkcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0x62203a7d	crypto_attr_alg2
+EXPORT_SYMBOL_GPL vmlinux 0x6223a49d	fuse_file_poll
+EXPORT_SYMBOL_GPL vmlinux 0x6248e402	cpufreq_frequency_table_verify
+EXPORT_SYMBOL_GPL vmlinux 0x629a7f6e	do_posix_clock_nonanosleep
+EXPORT_SYMBOL_GPL vmlinux 0x62c5fcd0	ata_timing_compute
+EXPORT_SYMBOL_GPL vmlinux 0x62d84361	__rt_mutex_init
+EXPORT_SYMBOL_GPL vmlinux 0x631eca48	skb_tstamp_tx
+EXPORT_SYMBOL_GPL vmlinux 0x63583f91	hrtimer_cancel
+EXPORT_SYMBOL_GPL vmlinux 0x636d12dd	rtc_irq_set_freq
+EXPORT_SYMBOL_GPL vmlinux 0x63712c84	ata_port_abort
+EXPORT_SYMBOL_GPL vmlinux 0x63d7da21	inet_hash
+EXPORT_SYMBOL_GPL vmlinux 0x64423785	usb_hcd_unlink_urb_from_ep
+EXPORT_SYMBOL_GPL vmlinux 0x64d2710e	sata_pmp_qc_defer_cmd_switch
+EXPORT_SYMBOL_GPL vmlinux 0x64ebe677	wmi_query_block
+EXPORT_SYMBOL_GPL vmlinux 0x654c49e2	aer_irq
+EXPORT_SYMBOL_GPL vmlinux 0x658699ec	cpuidle_unregister_device
+EXPORT_SYMBOL_GPL vmlinux 0x65bbbc78	schedule_hrtimeout_range
+EXPORT_SYMBOL_GPL vmlinux 0x65ccb6f0	call_netevent_notifiers
+EXPORT_SYMBOL_GPL vmlinux 0x65d6d0f0	gpio_direction_input
+EXPORT_SYMBOL_GPL vmlinux 0x65f826f0	srcu_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x660a613d	tcp_death_row
+EXPORT_SYMBOL_GPL vmlinux 0x661601de	sprint_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x665bb67c	inet6_csk_search_req
+EXPORT_SYMBOL_GPL vmlinux 0x665f1cb9	pci_msi_off
+EXPORT_SYMBOL_GPL vmlinux 0x666883e4	crypto_ahash_digest
+EXPORT_SYMBOL_GPL vmlinux 0x668402aa	crypto_put_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x66b2a859	nr_free_buffer_pages
+EXPORT_SYMBOL_GPL vmlinux 0x66b48f58	shash_ahash_update
+EXPORT_SYMBOL_GPL vmlinux 0x66d87d38	symbol_put_addr
+EXPORT_SYMBOL_GPL vmlinux 0x66fab731	spi_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x66fc6128	bus_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x672d5ccc	usb_lock_device_for_reset
+EXPORT_SYMBOL_GPL vmlinux 0x67955ce6	profile_hits
+EXPORT_SYMBOL_GPL vmlinux 0x67a0c347	crypto_tfm_in_queue
+EXPORT_SYMBOL_GPL vmlinux 0x67e032ac	power_supply_register
+EXPORT_SYMBOL_GPL vmlinux 0x67e9e115	crypto_alg_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x6806bef5	srcu_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x6832c700	tcp_is_cwnd_limited
+EXPORT_SYMBOL_GPL vmlinux 0x686c703f	xfrm_count_auth_supported
+EXPORT_SYMBOL_GPL vmlinux 0x688fa032	clockevents_register_device
+EXPORT_SYMBOL_GPL vmlinux 0x6892088c	unregister_pm_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x68a668cb	hrtimer_forward
+EXPORT_SYMBOL_GPL vmlinux 0x6901119a	trace_nowake_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0x695eb753	relay_file_operations
+EXPORT_SYMBOL_GPL vmlinux 0x6974a909	pci_find_ht_capability
+EXPORT_SYMBOL_GPL vmlinux 0x698c50e0	ata_bmdma_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x699250be	get_current_tty
+EXPORT_SYMBOL_GPL vmlinux 0x69e9a2cb	ata_scsi_slave_config
+EXPORT_SYMBOL_GPL vmlinux 0x6a08ea65	fuse_request_send
+EXPORT_SYMBOL_GPL vmlinux 0x6a10639e	blk_queue_dma_drain
+EXPORT_SYMBOL_GPL vmlinux 0x6a19f910	debugfs_create_x32
+EXPORT_SYMBOL_GPL vmlinux 0x6a33d0f8	shash_free_instance
+EXPORT_SYMBOL_GPL vmlinux 0x6a8441be	cpci_hp_start
+EXPORT_SYMBOL_GPL vmlinux 0x6aa97a25	i2c_new_probed_device
+EXPORT_SYMBOL_GPL vmlinux 0x6aaa6143	usb_get_status
+EXPORT_SYMBOL_GPL vmlinux 0x6ab5ce93	usb_hc_died
+EXPORT_SYMBOL_GPL vmlinux 0x6ac4d520	fb_deferred_io_init
+EXPORT_SYMBOL_GPL vmlinux 0x6ad2337e	devres_remove
+EXPORT_SYMBOL_GPL vmlinux 0x6adc78d1	inet6_csk_addr2sockaddr
+EXPORT_SYMBOL_GPL vmlinux 0x6b0b5ebe	usb_get_dev
+EXPORT_SYMBOL_GPL vmlinux 0x6b5a4dda	ata_pio_need_iordy
+EXPORT_SYMBOL_GPL vmlinux 0x6b82a1c7	crypto_alloc_ahash
+EXPORT_SYMBOL_GPL vmlinux 0x6b8a17df	queue_work_on
+EXPORT_SYMBOL_GPL vmlinux 0x6b8cefa0	dm_put
+EXPORT_SYMBOL_GPL vmlinux 0x6b9178b3	xenbus_strstate
+EXPORT_SYMBOL_GPL vmlinux 0x6b94c408	enable_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0x6bb6cfab	do_add_mount
+EXPORT_SYMBOL_GPL vmlinux 0x6c0335d9	ata_sff_thaw
+EXPORT_SYMBOL_GPL vmlinux 0x6c18752f	dm_disk
+EXPORT_SYMBOL_GPL vmlinux 0x6c19e73b	led_trigger_register_simple
+EXPORT_SYMBOL_GPL vmlinux 0x6c49c4f2	clockevents_notify
+EXPORT_SYMBOL_GPL vmlinux 0x6c756591	dm_path_uevent
+EXPORT_SYMBOL_GPL vmlinux 0x6c8d5ae8	__gpio_get_value
+EXPORT_SYMBOL_GPL vmlinux 0x6c8eb98f	xfrm_aalg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0x6cacf828	uhci_check_and_reset_hc
+EXPORT_SYMBOL_GPL vmlinux 0x6cad4ac9	ata_base_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x6d0ebc4d	find_get_pid
+EXPORT_SYMBOL_GPL vmlinux 0x6d2e942e	sysfs_get
+EXPORT_SYMBOL_GPL vmlinux 0x6d2fc5a6	net_namespace_list
+EXPORT_SYMBOL_GPL vmlinux 0x6def5a31	ata_cable_ignore
+EXPORT_SYMBOL_GPL vmlinux 0x6e09bcb8	vfs_kern_mount
+EXPORT_SYMBOL_GPL vmlinux 0x6e4a269f	inet_csk_listen_stop
+EXPORT_SYMBOL_GPL vmlinux 0x6e4e5501	pm_request_idle
+EXPORT_SYMBOL_GPL vmlinux 0x6e58ddf0	gnttab_end_foreign_transfer_ref
+EXPORT_SYMBOL_GPL vmlinux 0x6e7474fc	xfrm_ealg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x6e782c23	iomap_create_wc
+EXPORT_SYMBOL_GPL vmlinux 0x6eb787ee	klist_add_head
+EXPORT_SYMBOL_GPL vmlinux 0x6ec2b8c9	inverse_translate
+EXPORT_SYMBOL_GPL vmlinux 0x6f1dda13	ata_sas_port_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x6fde383e	__pm_runtime_put
+EXPORT_SYMBOL_GPL vmlinux 0x6fe3d8cf	ktime_add_safe
+EXPORT_SYMBOL_GPL vmlinux 0x6ff607b6	crypto_get_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x7015b73c	transport_configure_device
+EXPORT_SYMBOL_GPL vmlinux 0x7037d79d	k8_flush_garts
+EXPORT_SYMBOL_GPL vmlinux 0x706b3a33	cpufreq_frequency_table_get_attr
+EXPORT_SYMBOL_GPL vmlinux 0x707d9a20	inotify_add_watch
+EXPORT_SYMBOL_GPL vmlinux 0x707ff1bb	ata_xfer_mask2mode
+EXPORT_SYMBOL_GPL vmlinux 0x70ab0edf	cpci_hp_unregister_controller
+EXPORT_SYMBOL_GPL vmlinux 0x70b96e85	xenbus_watch_pathfmt
+EXPORT_SYMBOL_GPL vmlinux 0x7104532a	dm_region_hash_create
+EXPORT_SYMBOL_GPL vmlinux 0x714d35e3	usb_kill_urb
+EXPORT_SYMBOL_GPL vmlinux 0x7153557a	inet6_csk_bind_conflict
+EXPORT_SYMBOL_GPL vmlinux 0x716265c7	debugfs_initialized
+EXPORT_SYMBOL_GPL vmlinux 0x719e9d0f	fuse_direct_io
+EXPORT_SYMBOL_GPL vmlinux 0x71c8bc95	kgdb_unregister_io_module
+EXPORT_SYMBOL_GPL vmlinux 0x71c91c7a	fb_deferred_io_open
+EXPORT_SYMBOL_GPL vmlinux 0x71d29a5c	register_pernet_subsys
+EXPORT_SYMBOL_GPL vmlinux 0x72235a8b	aead_geniv_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x722c4f65	usb_scuttle_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0x723dcec8	platform_get_irq
+EXPORT_SYMBOL_GPL vmlinux 0x72741f25	trace_vbprintk
+EXPORT_SYMBOL_GPL vmlinux 0x7278d328	all_vm_events
+EXPORT_SYMBOL_GPL vmlinux 0x7285f84f	unregister_jprobe
+EXPORT_SYMBOL_GPL vmlinux 0x72e03bae	stop_machine_create
+EXPORT_SYMBOL_GPL vmlinux 0x72f43020	rdev_get_id
+EXPORT_SYMBOL_GPL vmlinux 0x72ffe20b	tracepoint_iter_reset
+EXPORT_SYMBOL_GPL vmlinux 0x731dba7a	xen_domain_type
+EXPORT_SYMBOL_GPL vmlinux 0x7343c70d	disk_part_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0x73495c6c	unregister_virtio_driver
+EXPORT_SYMBOL_GPL vmlinux 0x7375d6ac	do_sync_mapping_range
+EXPORT_SYMBOL_GPL vmlinux 0x739adef0	attribute_container_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x73a48b4a	ata_sff_std_ports
+EXPORT_SYMBOL_GPL vmlinux 0x73ff4175	led_trigger_register
+EXPORT_SYMBOL_GPL vmlinux 0x740ac182	__pci_complete_power_transition
+EXPORT_SYMBOL_GPL vmlinux 0x740ff4d5	ata_pci_sff_init_one
+EXPORT_SYMBOL_GPL vmlinux 0x743a165e	ata_pack_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0x743d90d4	cleanup_srcu_struct
+EXPORT_SYMBOL_GPL vmlinux 0x74abdafa	task_handoff_register
+EXPORT_SYMBOL_GPL vmlinux 0x74baf17a	tracing_is_on
+EXPORT_SYMBOL_GPL vmlinux 0x74deb10c	used_vectors
+EXPORT_SYMBOL_GPL vmlinux 0x74f332d2	tcp_slow_start
+EXPORT_SYMBOL_GPL vmlinux 0x7521afb6	leave_mm
+EXPORT_SYMBOL_GPL vmlinux 0x7567d095	invalidate_inode_pages2
+EXPORT_SYMBOL_GPL vmlinux 0x75e8f3c3	crypto_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x761188fd	dpm_suspend_noirq
+EXPORT_SYMBOL_GPL vmlinux 0x762e27de	blk_trace_setup
+EXPORT_SYMBOL_GPL vmlinux 0x76411fad	pci_bus_max_busnr
+EXPORT_SYMBOL_GPL vmlinux 0x76625f57	put_pid
+EXPORT_SYMBOL_GPL vmlinux 0x76ad995c	device_for_each_child
+EXPORT_SYMBOL_GPL vmlinux 0x76db4aad	device_create_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0x7712771a	unbind_from_irqhandler
+EXPORT_SYMBOL_GPL vmlinux 0x773ca527	init_uts_ns
+EXPORT_SYMBOL_GPL vmlinux 0x773cbab9	usb_queue_reset_device
+EXPORT_SYMBOL_GPL vmlinux 0x777e14f7	rt_mutex_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x77f2db2e	dev_attr_em_message
+EXPORT_SYMBOL_GPL vmlinux 0x77fb4b4b	__inet_inherit_port
+EXPORT_SYMBOL_GPL vmlinux 0x7809906a	dm_device_name
+EXPORT_SYMBOL_GPL vmlinux 0x780eed89	acpi_processor_ffh_cstate_enter
+EXPORT_SYMBOL_GPL vmlinux 0x781495ce	sysfs_create_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0x786ad990	ata_std_prereset
+EXPORT_SYMBOL_GPL vmlinux 0x78997770	ata_wait_after_reset
+EXPORT_SYMBOL_GPL vmlinux 0x78c04f6a	debugfs_remove
+EXPORT_SYMBOL_GPL vmlinux 0x78e4a4ee	klist_add_after
+EXPORT_SYMBOL_GPL vmlinux 0x78f868be	map_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0x7929091d	platform_device_add_resources
+EXPORT_SYMBOL_GPL vmlinux 0x7944e0fc	tracing_off
+EXPORT_SYMBOL_GPL vmlinux 0x79850094	add_to_page_cache_lru
+EXPORT_SYMBOL_GPL vmlinux 0x7a4c1438	pv_info
+EXPORT_SYMBOL_GPL vmlinux 0x7a8468ba	tty_prepare_flip_string_flags
+EXPORT_SYMBOL_GPL vmlinux 0x7a8b56e6	mmu_notifier_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x7aab2c45	platform_driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x7aad98c7	pci_renumber_slot
+EXPORT_SYMBOL_GPL vmlinux 0x7ab3c122	edac_handlers
+EXPORT_SYMBOL_GPL vmlinux 0x7ab4d787	ata_sff_wait_ready
+EXPORT_SYMBOL_GPL vmlinux 0x7ae1ae8e	cpufreq_frequency_table_put_attr
+EXPORT_SYMBOL_GPL vmlinux 0x7b034036	acpi_smbus_write
+EXPORT_SYMBOL_GPL vmlinux 0x7b123804	raw_seq_open
+EXPORT_SYMBOL_GPL vmlinux 0x7b1d544d	edac_handler_set
+EXPORT_SYMBOL_GPL vmlinux 0x7b30f010	ata_std_postreset
+EXPORT_SYMBOL_GPL vmlinux 0x7bae06df	inotify_dentry_parent_queue_event
+EXPORT_SYMBOL_GPL vmlinux 0x7bb39690	cpufreq_freq_attr_scaling_available_freqs
+EXPORT_SYMBOL_GPL vmlinux 0x7bcd2ded	klist_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0x7c2ebda0	ata_link_next
+EXPORT_SYMBOL_GPL vmlinux 0x7c31c2ac	regulator_get_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0x7c4a5c0d	md_do_sync
+EXPORT_SYMBOL_GPL vmlinux 0x7c54b5bc	tcp_twsk_unique
+EXPORT_SYMBOL_GPL vmlinux 0x7c5be1f3	crypto_alloc_instance2
+EXPORT_SYMBOL_GPL vmlinux 0x7c64e61a	usb_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0x7c6ef537	ata_sff_hsm_move
+EXPORT_SYMBOL_GPL vmlinux 0x7cf5dbd3	skcipher_geniv_free
+EXPORT_SYMBOL_GPL vmlinux 0x7d0eaeaf	crypto_aead_setauthsize
+EXPORT_SYMBOL_GPL vmlinux 0x7d3d3598	dma_wait_for_async_tx
+EXPORT_SYMBOL_GPL vmlinux 0x7d43058c	inet_ctl_sock_create
+EXPORT_SYMBOL_GPL vmlinux 0x7d67591b	sata_link_hardreset
+EXPORT_SYMBOL_GPL vmlinux 0x7d8101b4	ata_bmdma32_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x7dc5d0b6	crypto_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x7dff1476	tty_ldisc_ref_wait
+EXPORT_SYMBOL_GPL vmlinux 0x7e0a478a	__pci_hp_register
+EXPORT_SYMBOL_GPL vmlinux 0x7e1183c9	async_schedule
+EXPORT_SYMBOL_GPL vmlinux 0x7e275ea8	scsi_complete_async_scans
+EXPORT_SYMBOL_GPL vmlinux 0x7e63dadf	disk_get_part
+EXPORT_SYMBOL_GPL vmlinux 0x7e64181d	usb_calc_bus_time
+EXPORT_SYMBOL_GPL vmlinux 0x7e7a3398	cpufreq_cpu_put
+EXPORT_SYMBOL_GPL vmlinux 0x7e897c9e	regulator_put
+EXPORT_SYMBOL_GPL vmlinux 0x7ed54ca5	destroy_workqueue
+EXPORT_SYMBOL_GPL vmlinux 0x7ee1ddf3	ata_sff_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x7ee35b05	device_rename
+EXPORT_SYMBOL_GPL vmlinux 0x7ee8bd91	fuse_dev_operations
+EXPORT_SYMBOL_GPL vmlinux 0x7f19c836	unlock_policy_rwsem_write
+EXPORT_SYMBOL_GPL vmlinux 0x7f220180	gpio_export_link
+EXPORT_SYMBOL_GPL vmlinux 0x7f517b68	__hvc_resize
+EXPORT_SYMBOL_GPL vmlinux 0x7fb02858	sysfs_create_link
+EXPORT_SYMBOL_GPL vmlinux 0x7fd6e315	bus_find_device_by_name
+EXPORT_SYMBOL_GPL vmlinux 0x7fec4b82	nf_unregister_afinfo
+EXPORT_SYMBOL_GPL vmlinux 0x7ff0dffa	spi_async
+EXPORT_SYMBOL_GPL vmlinux 0x7ff10ccf	raw_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x7ff256bc	security_inode_mkdir
+EXPORT_SYMBOL_GPL vmlinux 0x8014b6af	input_event_from_user
+EXPORT_SYMBOL_GPL vmlinux 0x8039d043	selinux_secmark_relabel_packet_permission
+EXPORT_SYMBOL_GPL vmlinux 0x808ec1a3	crypto_alg_tested
+EXPORT_SYMBOL_GPL vmlinux 0x80d9d673	__trace_note_message
+EXPORT_SYMBOL_GPL vmlinux 0x80e0435d	xfrm_audit_state_notfound_simple
+EXPORT_SYMBOL_GPL vmlinux 0x80ee55c3	selinux_secmark_refcount_inc
+EXPORT_SYMBOL_GPL vmlinux 0x80f18ee5	__lock_page_killable
+EXPORT_SYMBOL_GPL vmlinux 0x8111225f	platform_device_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x8149ea54	ata_timing_find_mode
+EXPORT_SYMBOL_GPL vmlinux 0x81500b93	rtc_update_irq
+EXPORT_SYMBOL_GPL vmlinux 0x815b4f3a	crypto_nivaead_type
+EXPORT_SYMBOL_GPL vmlinux 0x816faeb3	register_virtio_driver
+EXPORT_SYMBOL_GPL vmlinux 0x81db3199	inode_add_to_lists
+EXPORT_SYMBOL_GPL vmlinux 0x81e6d146	crypto_lookup_template
+EXPORT_SYMBOL_GPL vmlinux 0x8226642f	__gpio_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x82369400	ring_buffer_alloc_read_page
+EXPORT_SYMBOL_GPL vmlinux 0x82462391	xenbus_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0x82939ebd	rcu_batches_completed_sched
+EXPORT_SYMBOL_GPL vmlinux 0x82cd19f3	register_xenstore_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x82d79b51	sysctl_vfs_cache_pressure
+EXPORT_SYMBOL_GPL vmlinux 0x82f776b7	gpio_export
+EXPORT_SYMBOL_GPL vmlinux 0x8308afc7	sdio_release_host
+EXPORT_SYMBOL_GPL vmlinux 0x833d9dc6	alloc_page_buffers
+EXPORT_SYMBOL_GPL vmlinux 0x834c055e	ata_scsi_queuecmd
+EXPORT_SYMBOL_GPL vmlinux 0x834d8eee	attribute_container_classdev_to_container
+EXPORT_SYMBOL_GPL vmlinux 0x83955d77	single_release_net
+EXPORT_SYMBOL_GPL vmlinux 0x840da5ac	ata_sas_slave_configure
+EXPORT_SYMBOL_GPL vmlinux 0x8410daad	kobject_uevent_env
+EXPORT_SYMBOL_GPL vmlinux 0x841b6e0b	pci_find_next_ht_capability
+EXPORT_SYMBOL_GPL vmlinux 0x843d70ef	acpi_is_root_bridge
+EXPORT_SYMBOL_GPL vmlinux 0x8442a557	class_compat_register
+EXPORT_SYMBOL_GPL vmlinux 0x846710f4	crypto_ahash_type
+EXPORT_SYMBOL_GPL vmlinux 0x8481d007	setup_irq
+EXPORT_SYMBOL_GPL vmlinux 0x850c7fa4	__blk_end_request_err
+EXPORT_SYMBOL_GPL vmlinux 0x85478a0b	inet6_hash_frag
+EXPORT_SYMBOL_GPL vmlinux 0x8555b5ea	fl6_sock_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x857222d7	dm_rh_dirty_log
+EXPORT_SYMBOL_GPL vmlinux 0x85c10896	rcu_batches_completed_bh
+EXPORT_SYMBOL_GPL vmlinux 0x85d7edfd	hpet_set_periodic_freq
+EXPORT_SYMBOL_GPL vmlinux 0x860f7444	dm_rh_get_state
+EXPORT_SYMBOL_GPL vmlinux 0x86171039	bsg_unregister_queue
+EXPORT_SYMBOL_GPL vmlinux 0x862f0b3c	ata_sff_exec_command
+EXPORT_SYMBOL_GPL vmlinux 0x86623fd7	notify_remote_via_irq
+EXPORT_SYMBOL_GPL vmlinux 0x866dba19	ata_pci_sff_activate_host
+EXPORT_SYMBOL_GPL vmlinux 0x867c684a	setup_APIC_eilvt_ibs
+EXPORT_SYMBOL_GPL vmlinux 0x8680c348	tty_ldisc_ref
+EXPORT_SYMBOL_GPL vmlinux 0x868784cb	__symbol_get
+EXPORT_SYMBOL_GPL vmlinux 0x86a51007	gnttab_end_foreign_transfer
+EXPORT_SYMBOL_GPL vmlinux 0x86b1667d	hwrng_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x86b483d2	sysfs_put
+EXPORT_SYMBOL_GPL vmlinux 0x86cae041	usb_clear_halt
+EXPORT_SYMBOL_GPL vmlinux 0x86f6b99d	synchronize_rcu_expedited
+EXPORT_SYMBOL_GPL vmlinux 0x873fbaea	edac_atomic_assert_error
+EXPORT_SYMBOL_GPL vmlinux 0x876f24d0	pm_runtime_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x876ff8c8	__module_text_address
+EXPORT_SYMBOL_GPL vmlinux 0x87754115	raw_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x87caff31	debugfs_create_size_t
+EXPORT_SYMBOL_GPL vmlinux 0x87dab61e	platform_driver_probe
+EXPORT_SYMBOL_GPL vmlinux 0x87f06200	sync_filesystem
+EXPORT_SYMBOL_GPL vmlinux 0x880b189a	__atomic_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x88108f03	regulator_set_optimum_mode
+EXPORT_SYMBOL_GPL vmlinux 0x8810ad5e	crypto_xor
+EXPORT_SYMBOL_GPL vmlinux 0x883d628f	tty_perform_flush
+EXPORT_SYMBOL_GPL vmlinux 0x883dea1b	get_net_ns_by_pid
+EXPORT_SYMBOL_GPL vmlinux 0x885142a6	nf_net_netfilter_sysctl_path
+EXPORT_SYMBOL_GPL vmlinux 0x886736fc	olpc_platform_info
+EXPORT_SYMBOL_GPL vmlinux 0x88743dc4	find_vpid
+EXPORT_SYMBOL_GPL vmlinux 0x88c02b58	fsnotify
+EXPORT_SYMBOL_GPL vmlinux 0x89286c72	inet_hashinfo_init
+EXPORT_SYMBOL_GPL vmlinux 0x89484b9c	__mmdrop
+EXPORT_SYMBOL_GPL vmlinux 0x897fd962	class_compat_remove_link
+EXPORT_SYMBOL_GPL vmlinux 0x89e3c517	usb_get_intf
+EXPORT_SYMBOL_GPL vmlinux 0x8a060d4f	fuse_request_send_background
+EXPORT_SYMBOL_GPL vmlinux 0x8a1389d6	tcp_init_congestion_ops
+EXPORT_SYMBOL_GPL vmlinux 0x8a3817ca	tty_buffer_request_room
+EXPORT_SYMBOL_GPL vmlinux 0x8a78989f	irq_from_evtchn
+EXPORT_SYMBOL_GPL vmlinux 0x8aa57a82	ring_buffer_peek
+EXPORT_SYMBOL_GPL vmlinux 0x8ade2ae7	inet6_hash_connect
+EXPORT_SYMBOL_GPL vmlinux 0x8ae8f1f9	tasklet_hrtimer_init
+EXPORT_SYMBOL_GPL vmlinux 0x8b752ac1	ata_tf_to_fis
+EXPORT_SYMBOL_GPL vmlinux 0x8b7db255	device_register
+EXPORT_SYMBOL_GPL vmlinux 0x8b7dbbbd	skb_segment
+EXPORT_SYMBOL_GPL vmlinux 0x8ba3bc3b	unregister_virtio_device
+EXPORT_SYMBOL_GPL vmlinux 0x8bba4c5b	trace_define_field
+EXPORT_SYMBOL_GPL vmlinux 0x8bcd1547	blk_abort_queue
+EXPORT_SYMBOL_GPL vmlinux 0x8c06a108	xenbus_transaction_start
+EXPORT_SYMBOL_GPL vmlinux 0x8c3484cc	disk_part_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0x8c38074a	unregister_xenstore_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x8c681003	platform_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x8c6f30fd	ata_dummy_port_info
+EXPORT_SYMBOL_GPL vmlinux 0x8c9d686d	__wake_up_sync_key
+EXPORT_SYMBOL_GPL vmlinux 0x8cd17437	regulator_disable
+EXPORT_SYMBOL_GPL vmlinux 0x8cd7a730	sysdev_show_int
+EXPORT_SYMBOL_GPL vmlinux 0x8d033df4	klist_node_attached
+EXPORT_SYMBOL_GPL vmlinux 0x8d41eb33	regulator_bulk_free
+EXPORT_SYMBOL_GPL vmlinux 0x8d8b14f9	__pm_runtime_set_status
+EXPORT_SYMBOL_GPL vmlinux 0x8dacba77	ata_qc_complete_multiple
+EXPORT_SYMBOL_GPL vmlinux 0x8dc35d38	tcp_twsk_destructor
+EXPORT_SYMBOL_GPL vmlinux 0x8e2e50ae	__class_register
+EXPORT_SYMBOL_GPL vmlinux 0x8eae69ba	kobject_init_and_add
+EXPORT_SYMBOL_GPL vmlinux 0x8eb530d3	ip_route_output_flow
+EXPORT_SYMBOL_GPL vmlinux 0x8eb58c6e	__wake_up_sync
+EXPORT_SYMBOL_GPL vmlinux 0x8eb6bec9	usb_find_interface
+EXPORT_SYMBOL_GPL vmlinux 0x8ed542d9	pci_enable_rom
+EXPORT_SYMBOL_GPL vmlinux 0x8edcfbc7	dev_attr_link_power_management_policy
+EXPORT_SYMBOL_GPL vmlinux 0x8f0cc814	platform_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x8f6cee77	__round_jiffies_relative
+EXPORT_SYMBOL_GPL vmlinux 0x8fa74514	sysdev_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x9009602a	acpi_bus_get_ejd
+EXPORT_SYMBOL_GPL vmlinux 0x9027261c	use_module
+EXPORT_SYMBOL_GPL vmlinux 0x9041e2ba	relay_subbufs_consumed
+EXPORT_SYMBOL_GPL vmlinux 0x904be910	transport_setup_device
+EXPORT_SYMBOL_GPL vmlinux 0x90508a7f	usb_autopm_put_interface_async
+EXPORT_SYMBOL_GPL vmlinux 0x9085f917	__dma_request_channel
+EXPORT_SYMBOL_GPL vmlinux 0x9099669c	vfs_test_lock
+EXPORT_SYMBOL_GPL vmlinux 0x90a0b1ea	xfrm_audit_state_notfound
+EXPORT_SYMBOL_GPL vmlinux 0x90a1004a	crypto_has_alg
+EXPORT_SYMBOL_GPL vmlinux 0x90c06cf4	ipv6_find_tlv
+EXPORT_SYMBOL_GPL vmlinux 0x91102f82	led_trigger_unregister_simple
+EXPORT_SYMBOL_GPL vmlinux 0x91482eef	usb_anchor_empty
+EXPORT_SYMBOL_GPL vmlinux 0x9159b9d6	profile_event_register
+EXPORT_SYMBOL_GPL vmlinux 0x9159e1f1	fb_deferred_io_fsync
+EXPORT_SYMBOL_GPL vmlinux 0x91889eaf	regulator_bulk_enable
+EXPORT_SYMBOL_GPL vmlinux 0x91a255ae	aead_geniv_exit
+EXPORT_SYMBOL_GPL vmlinux 0x91a46373	fuse_conn_kill
+EXPORT_SYMBOL_GPL vmlinux 0x91d93d40	ata_std_qc_defer
+EXPORT_SYMBOL_GPL vmlinux 0x92732398	put_driver
+EXPORT_SYMBOL_GPL vmlinux 0x92ad33d3	kern_mount_data
+EXPORT_SYMBOL_GPL vmlinux 0x92c78cab	ring_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0x92d31cfb	fixed_phy_add
+EXPORT_SYMBOL_GPL vmlinux 0x92d74e64	sysdev_class_register
+EXPORT_SYMBOL_GPL vmlinux 0x92f238cd	regulator_get_init_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0x92f4b081	regulator_get
+EXPORT_SYMBOL_GPL vmlinux 0x92fb217b	dcookie_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x9347ec04	dma_run_dependencies
+EXPORT_SYMBOL_GPL vmlinux 0x937f0e42	usb_driver_set_configuration
+EXPORT_SYMBOL_GPL vmlinux 0x93bf114b	cpufreq_cpu_get
+EXPORT_SYMBOL_GPL vmlinux 0x93d2422d	snmp_mib_free
+EXPORT_SYMBOL_GPL vmlinux 0x93f4fda3	generic_fh_to_parent
+EXPORT_SYMBOL_GPL vmlinux 0x943cf13d	__module_address
+EXPORT_SYMBOL_GPL vmlinux 0x9449c320	pci_create_slot
+EXPORT_SYMBOL_GPL vmlinux 0x945c2b1a	filter_current_check_discard
+EXPORT_SYMBOL_GPL vmlinux 0x94a68723	ata_scsi_slave_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x94aa8400	bus_register
+EXPORT_SYMBOL_GPL vmlinux 0x94d574f8	ata_bmdma_stop
+EXPORT_SYMBOL_GPL vmlinux 0x94de3391	kobject_create_and_add
+EXPORT_SYMBOL_GPL vmlinux 0x94ef4d05	cpci_hp_stop
+EXPORT_SYMBOL_GPL vmlinux 0x94f66ebf	dev_attr_unload_heads
+EXPORT_SYMBOL_GPL vmlinux 0x952664c5	do_exit
+EXPORT_SYMBOL_GPL vmlinux 0x9543bc5d	device_create_vargs
+EXPORT_SYMBOL_GPL vmlinux 0x955df982	sk_setup_caps
+EXPORT_SYMBOL_GPL vmlinux 0x956a91ba	gpio_get_value_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x95758050	__blocking_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x95b892bf	platform_device_del
+EXPORT_SYMBOL_GPL vmlinux 0x961a8cd3	unlock_policy_rwsem_read
+EXPORT_SYMBOL_GPL vmlinux 0x963ac09e	bd_claim_by_disk
+EXPORT_SYMBOL_GPL vmlinux 0x96631e74	sdev_evt_send
+EXPORT_SYMBOL_GPL vmlinux 0x96cbcf31	pm_qos_add_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x9708942f	tcp_cong_avoid_ai
+EXPORT_SYMBOL_GPL vmlinux 0x9755bb7e	crypto_register_ahash
+EXPORT_SYMBOL_GPL vmlinux 0x975c56a3	devres_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x97982542	hrtimer_start_range_ns
+EXPORT_SYMBOL_GPL vmlinux 0x97c68536	spi_setup
+EXPORT_SYMBOL_GPL vmlinux 0x98303f2c	scsi_nl_add_transport
+EXPORT_SYMBOL_GPL vmlinux 0x9833bc0c	hvc_kick
+EXPORT_SYMBOL_GPL vmlinux 0x985094e0	__create_workqueue_key
+EXPORT_SYMBOL_GPL vmlinux 0x985ce993	rt_mutex_trylock
+EXPORT_SYMBOL_GPL vmlinux 0x9862fef3	inet_csk_route_req
+EXPORT_SYMBOL_GPL vmlinux 0x9888f881	usb_hcd_poll_rh_status
+EXPORT_SYMBOL_GPL vmlinux 0x98c00171	mnt_drop_write
+EXPORT_SYMBOL_GPL vmlinux 0x98fbf286	disk_map_sector_rcu
+EXPORT_SYMBOL_GPL vmlinux 0x9924c496	__usb_get_extra_descriptor
+EXPORT_SYMBOL_GPL vmlinux 0x99517d70	single_open_net
+EXPORT_SYMBOL_GPL vmlinux 0x995d1071	prof_on
+EXPORT_SYMBOL_GPL vmlinux 0x99821219	dev_attr_sw_activity
+EXPORT_SYMBOL_GPL vmlinux 0x9984c858	usb_unpoison_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0x99bace10	tty_encode_baud_rate
+EXPORT_SYMBOL_GPL vmlinux 0x99c3775c	kmap_atomic_pfn
+EXPORT_SYMBOL_GPL vmlinux 0x99c98c4a	acpi_pci_check_ejectable
+EXPORT_SYMBOL_GPL vmlinux 0x99ca4f4e	regulator_set_current_limit
+EXPORT_SYMBOL_GPL vmlinux 0x99ef6d00	crypto_alloc_instance
+EXPORT_SYMBOL_GPL vmlinux 0x99f9cadb	sdio_readsb
+EXPORT_SYMBOL_GPL vmlinux 0x9a11a0fc	crypto_attr_alg_name
+EXPORT_SYMBOL_GPL vmlinux 0x9a1444dc	transport_destroy_device
+EXPORT_SYMBOL_GPL vmlinux 0x9a7da800	scsi_schedule_eh
+EXPORT_SYMBOL_GPL vmlinux 0x9a95d243	attribute_container_find_class_device
+EXPORT_SYMBOL_GPL vmlinux 0x9ae626e3	sdio_memcpy_toio
+EXPORT_SYMBOL_GPL vmlinux 0x9b05c8dc	ring_buffer_free_read_page
+EXPORT_SYMBOL_GPL vmlinux 0x9b2d12da	root_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x9b31d285	sysdev_register
+EXPORT_SYMBOL_GPL vmlinux 0x9b49b9c2	alloc_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0x9b691b4f	blk_rq_prep_clone
+EXPORT_SYMBOL_GPL vmlinux 0x9b6adcf3	vring_del_virtqueue
+EXPORT_SYMBOL_GPL vmlinux 0x9b7c29a5	i2c_unregister_device
+EXPORT_SYMBOL_GPL vmlinux 0x9b8b3e51	acpi_processor_ffh_cstate_probe
+EXPORT_SYMBOL_GPL vmlinux 0x9ba0501e	unregister_vt_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x9ba5be24	add_page_wait_queue
+EXPORT_SYMBOL_GPL vmlinux 0x9bab1cf0	power_supply_set_battery_charged
+EXPORT_SYMBOL_GPL vmlinux 0x9bc8c8a7	cpufreq_frequency_table_target
+EXPORT_SYMBOL_GPL vmlinux 0x9c81f13d	ring_buffer_read
+EXPORT_SYMBOL_GPL vmlinux 0x9c99da13	tty_prepare_flip_string
+EXPORT_SYMBOL_GPL vmlinux 0x9cb8037b	xfrm_count_enc_supported
+EXPORT_SYMBOL_GPL vmlinux 0x9cba4b82	__srcu_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x9cde0f64	sdio_disable_func
+EXPORT_SYMBOL_GPL vmlinux 0x9d030b99	stop_machine
+EXPORT_SYMBOL_GPL vmlinux 0x9d06688b	register_xenbus_watch
+EXPORT_SYMBOL_GPL vmlinux 0x9d1280e4	dm_rh_update_states
+EXPORT_SYMBOL_GPL vmlinux 0x9d2b6a58	hpet_register_irq_handler
+EXPORT_SYMBOL_GPL vmlinux 0x9d308c4d	hrtimer_try_to_cancel
+EXPORT_SYMBOL_GPL vmlinux 0x9d3850e1	gnttab_alloc_grant_references
+EXPORT_SYMBOL_GPL vmlinux 0x9d459e97	usb_driver_claim_interface
+EXPORT_SYMBOL_GPL vmlinux 0x9d627132	ata_pci_device_resume
+EXPORT_SYMBOL_GPL vmlinux 0x9d776301	skcipher_geniv_exit
+EXPORT_SYMBOL_GPL vmlinux 0x9d7c73d1	ata_dummy_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x9da5ecff	usb_root_hub_lost_power
+EXPORT_SYMBOL_GPL vmlinux 0x9dc1f12c	usb_anchor_urb
+EXPORT_SYMBOL_GPL vmlinux 0x9dccd248	dm_rh_flush
+EXPORT_SYMBOL_GPL vmlinux 0x9e01f6d4	eventfd_signal
+EXPORT_SYMBOL_GPL vmlinux 0x9e2c380c	__blk_put_request
+EXPORT_SYMBOL_GPL vmlinux 0x9e324de2	xfrm_audit_state_icvfail
+EXPORT_SYMBOL_GPL vmlinux 0x9e37af87	regulator_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x9e416a86	ring_buffer_record_enable_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x9e711ad2	pm_qos_requirement
+EXPORT_SYMBOL_GPL vmlinux 0x9e889e79	sysfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x9ebff902	start_thread
+EXPORT_SYMBOL_GPL vmlinux 0x9edf10f8	get_device
+EXPORT_SYMBOL_GPL vmlinux 0x9f3178f3	pciserial_resume_ports
+EXPORT_SYMBOL_GPL vmlinux 0x9f3ffea2	lookup_create
+EXPORT_SYMBOL_GPL vmlinux 0x9f40a6d6	async_synchronize_full_domain
+EXPORT_SYMBOL_GPL vmlinux 0x9f7192a2	class_interface_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x9f85ed90	klist_remove
+EXPORT_SYMBOL_GPL vmlinux 0x9fce80db	fb_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x9fd7e8f1	anon_inode_getfd
+EXPORT_SYMBOL_GPL vmlinux 0xa0255440	net_ipv4_ctl_path
+EXPORT_SYMBOL_GPL vmlinux 0xa03a5e9b	blk_queue_rq_timeout
+EXPORT_SYMBOL_GPL vmlinux 0xa053def6	proc_net_mkdir
+EXPORT_SYMBOL_GPL vmlinux 0xa05f5466	ata_host_suspend
+EXPORT_SYMBOL_GPL vmlinux 0xa0c71dac	spi_populate_sync_msg
+EXPORT_SYMBOL_GPL vmlinux 0xa10b3a89	scsi_dh_detach
+EXPORT_SYMBOL_GPL vmlinux 0xa1325a52	mce_chrdev_ops
+EXPORT_SYMBOL_GPL vmlinux 0xa1462743	usb_put_dev
+EXPORT_SYMBOL_GPL vmlinux 0xa17686c1	ring_buffer_record_disable_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xa18f3d5c	iounmap_atomic
+EXPORT_SYMBOL_GPL vmlinux 0xa1fea124	fuse_do_open
+EXPORT_SYMBOL_GPL vmlinux 0xa205833f	crypto_givcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0xa25d4e64	ring_buffer_time_stamp
+EXPORT_SYMBOL_GPL vmlinux 0xa28d8527	usb_poison_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0xa2e67f08	acpi_bus_generate_proc_event4
+EXPORT_SYMBOL_GPL vmlinux 0xa2f71244	sysdev_driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xa353fffc	xenbus_rm
+EXPORT_SYMBOL_GPL vmlinux 0xa3b7c41c	ring_buffer_iter_empty
+EXPORT_SYMBOL_GPL vmlinux 0xa3eaa069	relay_flush
+EXPORT_SYMBOL_GPL vmlinux 0xa3efa8e4	debugfs_create_u16
+EXPORT_SYMBOL_GPL vmlinux 0xa3f4fdd8	sata_pmp_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0xa3f9dc98	pci_reset_function
+EXPORT_SYMBOL_GPL vmlinux 0xa400234a	ata_dev_pair
+EXPORT_SYMBOL_GPL vmlinux 0xa40a8590	input_event_to_user
+EXPORT_SYMBOL_GPL vmlinux 0xa42f4cc5	__pm_runtime_disable
+EXPORT_SYMBOL_GPL vmlinux 0xa452c297	hpet_mask_rtc_irq_bit
+EXPORT_SYMBOL_GPL vmlinux 0xa46cdefb	dequeue_signal
+EXPORT_SYMBOL_GPL vmlinux 0xa4a96f7d	pci_test_config_bits
+EXPORT_SYMBOL_GPL vmlinux 0xa4df7ffb	scsi_dh_attach
+EXPORT_SYMBOL_GPL vmlinux 0xa4f05155	seq_release_net
+EXPORT_SYMBOL_GPL vmlinux 0xa4f5f2e9	hrtimer_init_sleeper
+EXPORT_SYMBOL_GPL vmlinux 0xa5037c66	crypto_unregister_template
+EXPORT_SYMBOL_GPL vmlinux 0xa5150e9d	fib_rules_cleanup_ops
+EXPORT_SYMBOL_GPL vmlinux 0xa54279cf	user_update
+EXPORT_SYMBOL_GPL vmlinux 0xa54e2db6	register_pernet_gen_device
+EXPORT_SYMBOL_GPL vmlinux 0xa56cd768	crypto_unregister_shash
+EXPORT_SYMBOL_GPL vmlinux 0xa5bf5c3e	pm_qos_add_requirement
+EXPORT_SYMBOL_GPL vmlinux 0xa5c36cec	inotify_unmount_inodes
+EXPORT_SYMBOL_GPL vmlinux 0xa5cf1f99	__audit_inode_child
+EXPORT_SYMBOL_GPL vmlinux 0xa5df9a85	__inet_lookup_listener
+EXPORT_SYMBOL_GPL vmlinux 0xa5e01388	ata_host_start
+EXPORT_SYMBOL_GPL vmlinux 0xa5efbf4c	async_synchronize_full
+EXPORT_SYMBOL_GPL vmlinux 0xa66ca854	class_dev_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0xa68381e6	driver_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xa7c87e99	shash_ahash_finup
+EXPORT_SYMBOL_GPL vmlinux 0xa7e1e2a1	bus_rescan_devices
+EXPORT_SYMBOL_GPL vmlinux 0xa81bb815	device_schedule_callback_owner
+EXPORT_SYMBOL_GPL vmlinux 0xa84e9995	rtc_irq_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xa86d51ca	inet_csk_reqsk_queue_prune
+EXPORT_SYMBOL_GPL vmlinux 0xa89113a1	__rtnl_link_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xa8df106a	pci_add_dynid
+EXPORT_SYMBOL_GPL vmlinux 0xa8f59416	gpio_direction_output
+EXPORT_SYMBOL_GPL vmlinux 0xa9126bff	hpet_set_rtc_irq_bit
+EXPORT_SYMBOL_GPL vmlinux 0xa9424868	scsi_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0xa943329f	dm_rh_mark_nosync
+EXPORT_SYMBOL_GPL vmlinux 0xa97c43d6	xattr_getsecurity
+EXPORT_SYMBOL_GPL vmlinux 0xa9b7afd8	wmi_set_block
+EXPORT_SYMBOL_GPL vmlinux 0xa9c530b8	unregister_oom_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xa9ca15c0	rtc_read_alarm
+EXPORT_SYMBOL_GPL vmlinux 0xa9f4c5e5	usb_hcd_resume_root_hub
+EXPORT_SYMBOL_GPL vmlinux 0xaa1e4fea	register_net_sysctl_rotable
+EXPORT_SYMBOL_GPL vmlinux 0xaa2a72bf	__iowrite64_copy
+EXPORT_SYMBOL_GPL vmlinux 0xaa3e3aea	__i2c_board_lock
+EXPORT_SYMBOL_GPL vmlinux 0xaa5310f9	__tracepoint_napi_poll
+EXPORT_SYMBOL_GPL vmlinux 0xaa8c4696	cpu_clock
+EXPORT_SYMBOL_GPL vmlinux 0xaaddf6ca	blocking_notifier_chain_cond_register
+EXPORT_SYMBOL_GPL vmlinux 0xaadfb2dd	tcp_get_info
+EXPORT_SYMBOL_GPL vmlinux 0xaae1cc11	crypto_destroy_tfm
+EXPORT_SYMBOL_GPL vmlinux 0xab01acbe	gnttab_request_free_callback
+EXPORT_SYMBOL_GPL vmlinux 0xab15564c	inotify_inode_is_dead
+EXPORT_SYMBOL_GPL vmlinux 0xab1f0a2a	dm_region_hash_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xab23b543	k_handler
+EXPORT_SYMBOL_GPL vmlinux 0xab3cbfc4	crypto_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0xab410444	bus_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0xab41bd91	led_trigger_remove
+EXPORT_SYMBOL_GPL vmlinux 0xab57e311	tracepoint_probe_register
+EXPORT_SYMBOL_GPL vmlinux 0xab605b4e	__fsnotify_parent
+EXPORT_SYMBOL_GPL vmlinux 0xabaf109e	input_ff_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xabe18d53	scsi_get_vpd_page
+EXPORT_SYMBOL_GPL vmlinux 0xac1c0597	usb_buffer_free
+EXPORT_SYMBOL_GPL vmlinux 0xac3d880d	user_match
+EXPORT_SYMBOL_GPL vmlinux 0xac454dd9	dm_rh_recovery_start
+EXPORT_SYMBOL_GPL vmlinux 0xac679918	inet_csk_listen_start
+EXPORT_SYMBOL_GPL vmlinux 0xacafa8e7	vector_used_by_percpu_irq
+EXPORT_SYMBOL_GPL vmlinux 0xacc19485	ibft_addr
+EXPORT_SYMBOL_GPL vmlinux 0xacc8b52e	driver_find_device
+EXPORT_SYMBOL_GPL vmlinux 0xacdd08b4	ata_eh_thaw_port
+EXPORT_SYMBOL_GPL vmlinux 0xace2ee83	ata_sff_data_xfer_noirq
+EXPORT_SYMBOL_GPL vmlinux 0xace5c0fc	usb_bus_list
+EXPORT_SYMBOL_GPL vmlinux 0xad01cb93	inotify_find_watch
+EXPORT_SYMBOL_GPL vmlinux 0xad04a35c	usb_sg_cancel
+EXPORT_SYMBOL_GPL vmlinux 0xad096363	xenbus_printf
+EXPORT_SYMBOL_GPL vmlinux 0xad3ba9f0	class_dev_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0xad52006f	rtc_set_alarm
+EXPORT_SYMBOL_GPL vmlinux 0xad5bb3b1	xfrm_inner_extract_output
+EXPORT_SYMBOL_GPL vmlinux 0xad5d7c80	dm_kill_unmapped_request
+EXPORT_SYMBOL_GPL vmlinux 0xad9bfb55	crypto_larval_kill
+EXPORT_SYMBOL_GPL vmlinux 0xadbc3638	bus_get_device_klist
+EXPORT_SYMBOL_GPL vmlinux 0xadfd33e2	flush_workqueue
+EXPORT_SYMBOL_GPL vmlinux 0xae0c87ee	pm_qos_remove_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xae1eaf06	pci_hp_deregister
+EXPORT_SYMBOL_GPL vmlinux 0xae3d0f1e	console_drivers
+EXPORT_SYMBOL_GPL vmlinux 0xae3e9b0f	ata_sas_port_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xae80b24b	seq_open_net
+EXPORT_SYMBOL_GPL vmlinux 0xaebfec5e	sg_scsi_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xaec95ebd	ata_cable_sata
+EXPORT_SYMBOL_GPL vmlinux 0xaee61eb9	crypto_dequeue_request
+EXPORT_SYMBOL_GPL vmlinux 0xaeeb9952	ata_link_online
+EXPORT_SYMBOL_GPL vmlinux 0xaf3f6fe0	ata_sff_interrupt
+EXPORT_SYMBOL_GPL vmlinux 0xafa15674	crypto_unregister_ahash
+EXPORT_SYMBOL_GPL vmlinux 0xafaa2be8	sata_async_notification
+EXPORT_SYMBOL_GPL vmlinux 0xafc7c996	usb_unlink_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0xb0223109	klist_next
+EXPORT_SYMBOL_GPL vmlinux 0xb08bb460	tty_put_char
+EXPORT_SYMBOL_GPL vmlinux 0xb0aa812e	fips_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xb0eedea9	usb_wait_anchor_empty_timeout
+EXPORT_SYMBOL_GPL vmlinux 0xb10ce237	sdio_f0_readb
+EXPORT_SYMBOL_GPL vmlinux 0xb10d55bc	cn_netlink_send
+EXPORT_SYMBOL_GPL vmlinux 0xb120812b	ata_host_alloc_pinfo
+EXPORT_SYMBOL_GPL vmlinux 0xb18429eb	suspend_device_irqs
+EXPORT_SYMBOL_GPL vmlinux 0xb18506b9	smp_ops
+EXPORT_SYMBOL_GPL vmlinux 0xb1852bb8	unregister_pernet_gen_subsys
+EXPORT_SYMBOL_GPL vmlinux 0xb1acbcce	rcu_barrier_sched
+EXPORT_SYMBOL_GPL vmlinux 0xb1f868c5	ata_link_offline
+EXPORT_SYMBOL_GPL vmlinux 0xb2e5e74d	crypto_find_alg
+EXPORT_SYMBOL_GPL vmlinux 0xb320f061	synchronize_srcu
+EXPORT_SYMBOL_GPL vmlinux 0xb3253ed9	hpet_rtc_timer_init
+EXPORT_SYMBOL_GPL vmlinux 0xb346550e	usb_reset_endpoint
+EXPORT_SYMBOL_GPL vmlinux 0xb416269c	rtc_class_open
+EXPORT_SYMBOL_GPL vmlinux 0xb4647502	mnt_want_write_file
+EXPORT_SYMBOL_GPL vmlinux 0xb4671695	sdio_release_irq
+EXPORT_SYMBOL_GPL vmlinux 0xb491cd57	regulator_set_voltage
+EXPORT_SYMBOL_GPL vmlinux 0xb4a0518f	xfrm_output
+EXPORT_SYMBOL_GPL vmlinux 0xb4e14553	gnttab_query_foreign_access
+EXPORT_SYMBOL_GPL vmlinux 0xb4ea7cf7	kgdb_connected
+EXPORT_SYMBOL_GPL vmlinux 0xb4ef0d32	sysdev_show_ulong
+EXPORT_SYMBOL_GPL vmlinux 0xb51fbd64	edac_op_state
+EXPORT_SYMBOL_GPL vmlinux 0xb53ae573	cpu_idle_wait
+EXPORT_SYMBOL_GPL vmlinux 0xb54e3920	sdio_writeb
+EXPORT_SYMBOL_GPL vmlinux 0xb54f9fbd	driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xb580cda0	skb_to_sgvec
+EXPORT_SYMBOL_GPL vmlinux 0xb58dcfa2	synchronize_sched_expedited
+EXPORT_SYMBOL_GPL vmlinux 0xb5a6c942	rtnl_register
+EXPORT_SYMBOL_GPL vmlinux 0xb5a6ebe2	wmi_remove_notify_handler
+EXPORT_SYMBOL_GPL vmlinux 0xb5ae3f1f	user_read
+EXPORT_SYMBOL_GPL vmlinux 0xb5d843f2	unregister_net_sysctl_table
+EXPORT_SYMBOL_GPL vmlinux 0xb5d8913d	register_jprobe
+EXPORT_SYMBOL_GPL vmlinux 0xb6230f1f	gnttab_grant_foreign_access
+EXPORT_SYMBOL_GPL vmlinux 0xb6383dce	ata_sff_data_xfer
+EXPORT_SYMBOL_GPL vmlinux 0xb65091b3	selinux_secmark_refcount_dec
+EXPORT_SYMBOL_GPL vmlinux 0xb6727caa	ip6_sk_dst_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xb67eb743	drop_file_write_access
+EXPORT_SYMBOL_GPL vmlinux 0xb6aeb661	ata_id_c_string
+EXPORT_SYMBOL_GPL vmlinux 0xb6bc49a9	__supported_pte_mask
+EXPORT_SYMBOL_GPL vmlinux 0xb6c1fa11	regulator_bulk_get
+EXPORT_SYMBOL_GPL vmlinux 0xb6eaedfe	usb_set_interface
+EXPORT_SYMBOL_GPL vmlinux 0xb6f5e1ad	ata_sff_qc_issue
+EXPORT_SYMBOL_GPL vmlinux 0xb718f2f9	sfi_table_parse
+EXPORT_SYMBOL_GPL vmlinux 0xb744fa43	xfrm_ealg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0xb7600a3e	crypto_register_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0xb7614962	ata_port_freeze
+EXPORT_SYMBOL_GPL vmlinux 0xb761526d	ring_buffer_reset_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xb76385bd	sysfs_update_group
+EXPORT_SYMBOL_GPL vmlinux 0xb78e3f4c	regulator_is_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xb7d7c12e	hpet_set_alarm_time
+EXPORT_SYMBOL_GPL vmlinux 0xb7e2eb91	mce_cpu_specific_poll
+EXPORT_SYMBOL_GPL vmlinux 0xb7fc92ad	scsi_internal_device_block
+EXPORT_SYMBOL_GPL vmlinux 0xb7fdd0df	eventfd_ctx_put
+EXPORT_SYMBOL_GPL vmlinux 0xb8857caf	class_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xb8ae1bec	generic_detach_inode
+EXPORT_SYMBOL_GPL vmlinux 0xb8bae48e	ata_acpi_gtm_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0xb8ce7de7	tty_wakeup
+EXPORT_SYMBOL_GPL vmlinux 0xb8de734f	mm_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xb8fc8446	xenbus_alloc_evtchn
+EXPORT_SYMBOL_GPL vmlinux 0xb90045b4	device_add
+EXPORT_SYMBOL_GPL vmlinux 0xb903674c	scatterwalk_map_and_copy
+EXPORT_SYMBOL_GPL vmlinux 0xb94a8234	crypto_alg_mod_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xb956f9f3	bus_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xb9776683	task_active_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0xb99d5837	xenbus_read
+EXPORT_SYMBOL_GPL vmlinux 0xb9b424c5	shash_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0xb9eb3aa9	add_uevent_var
+EXPORT_SYMBOL_GPL vmlinux 0xb9ebc402	blk_rq_err_bytes
+EXPORT_SYMBOL_GPL vmlinux 0xb9f123f6	xenbus_free_evtchn
+EXPORT_SYMBOL_GPL vmlinux 0xba287d49	ata_sff_qc_prep
+EXPORT_SYMBOL_GPL vmlinux 0xba690e41	transport_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xba8179c8	usb_driver_release_interface
+EXPORT_SYMBOL_GPL vmlinux 0xbaa52d5d	led_trigger_show
+EXPORT_SYMBOL_GPL vmlinux 0xbaa893b9	dm_noflush_suspending
+EXPORT_SYMBOL_GPL vmlinux 0xbadbd6ed	ata_pci_device_do_suspend
+EXPORT_SYMBOL_GPL vmlinux 0xbae34c27	scsi_nl_remove_transport
+EXPORT_SYMBOL_GPL vmlinux 0xbb1e85ea	bus_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xbb2c5188	inotify_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xbb4a1408	klist_init
+EXPORT_SYMBOL_GPL vmlinux 0xbb501413	blk_trace_remove
+EXPORT_SYMBOL_GPL vmlinux 0xbb58b814	iomap_free
+EXPORT_SYMBOL_GPL vmlinux 0xbbb98859	edid_info
+EXPORT_SYMBOL_GPL vmlinux 0xbbf4af4d	__fsnotify_inode_delete
+EXPORT_SYMBOL_GPL vmlinux 0xbc6d1291	ata_port_pbar_desc
+EXPORT_SYMBOL_GPL vmlinux 0xbc9bb097	rt_mutex_unlock
+EXPORT_SYMBOL_GPL vmlinux 0xbca5c7a3	ata_scsi_simulate
+EXPORT_SYMBOL_GPL vmlinux 0xbcb90888	crypto_larval_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xbd19d1f7	usb_bulk_msg
+EXPORT_SYMBOL_GPL vmlinux 0xbd506a46	unregister_hotplug_dock_device
+EXPORT_SYMBOL_GPL vmlinux 0xbd8782e9	ata_sff_softreset
+EXPORT_SYMBOL_GPL vmlinux 0xbdacd6a8	devm_kfree
+EXPORT_SYMBOL_GPL vmlinux 0xbdd295f0	trace_vprintk
+EXPORT_SYMBOL_GPL vmlinux 0xbdf624af	virtio_check_driver_offered_feature
+EXPORT_SYMBOL_GPL vmlinux 0xbe116723	do_posix_clock_nosettime
+EXPORT_SYMBOL_GPL vmlinux 0xbe1887e4	ata_unpack_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0xbe2597af	save_stack_trace_tsk
+EXPORT_SYMBOL_GPL vmlinux 0xbe25a81c	ring_buffer_read_page
+EXPORT_SYMBOL_GPL vmlinux 0xbe584033	spi_sync
+EXPORT_SYMBOL_GPL vmlinux 0xbeaa68dd	dm_rh_inc_pending
+EXPORT_SYMBOL_GPL vmlinux 0xbef72b95	pci_destroy_slot
+EXPORT_SYMBOL_GPL vmlinux 0xbf456d26	usb_sg_wait
+EXPORT_SYMBOL_GPL vmlinux 0xbf4f0cda	securityfs_remove
+EXPORT_SYMBOL_GPL vmlinux 0xbf5d6287	xenbus_map_ring
+EXPORT_SYMBOL_GPL vmlinux 0xbf7d38eb	blk_queue_rq_timed_out
+EXPORT_SYMBOL_GPL vmlinux 0xbfa146fe	usb_remove_hcd
+EXPORT_SYMBOL_GPL vmlinux 0xbfd94bb0	bind_virq_to_irqhandler
+EXPORT_SYMBOL_GPL vmlinux 0xc044f496	rdev_get_dev
+EXPORT_SYMBOL_GPL vmlinux 0xc0526a0d	skb_gro_receive
+EXPORT_SYMBOL_GPL vmlinux 0xc098f17c	sdev_evt_send_simple
+EXPORT_SYMBOL_GPL vmlinux 0xc0e506d7	rtnl_link_register
+EXPORT_SYMBOL_GPL vmlinux 0xc1139676	led_trigger_set_default
+EXPORT_SYMBOL_GPL vmlinux 0xc126e890	klist_del
+EXPORT_SYMBOL_GPL vmlinux 0xc12f7e0d	trace_profile_buf_nmi
+EXPORT_SYMBOL_GPL vmlinux 0xc16d0a75	usb_buffer_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xc17515d7	usb_hcds_loaded
+EXPORT_SYMBOL_GPL vmlinux 0xc1e4e9f2	pci_scan_child_bus
+EXPORT_SYMBOL_GPL vmlinux 0xc208deb0	regulator_enable
+EXPORT_SYMBOL_GPL vmlinux 0xc22a3091	vm_unmap_aliases
+EXPORT_SYMBOL_GPL vmlinux 0xc24403bd	sysdev_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0xc26351f8	bind_evtchn_to_irq
+EXPORT_SYMBOL_GPL vmlinux 0xc29c1c2e	register_posix_clock
+EXPORT_SYMBOL_GPL vmlinux 0xc3301f02	rcu_expedited_torture_stats
+EXPORT_SYMBOL_GPL vmlinux 0xc33c1b78	ata_host_resume
+EXPORT_SYMBOL_GPL vmlinux 0xc34efe27	snmp_fold_field
+EXPORT_SYMBOL_GPL vmlinux 0xc36d45f0	module_mutex
+EXPORT_SYMBOL_GPL vmlinux 0xc399468f	scsi_nl_remove_driver
+EXPORT_SYMBOL_GPL vmlinux 0xc3b80d04	preempt_notifier_register
+EXPORT_SYMBOL_GPL vmlinux 0xc40591fb	crypto_alloc_aead
+EXPORT_SYMBOL_GPL vmlinux 0xc428068d	sata_deb_timing_long
+EXPORT_SYMBOL_GPL vmlinux 0xc42f2f94	xenbus_read_driver_state
+EXPORT_SYMBOL_GPL vmlinux 0xc4702c9f	register_pernet_gen_subsys
+EXPORT_SYMBOL_GPL vmlinux 0xc48b7ccf	ata_mode_string
+EXPORT_SYMBOL_GPL vmlinux 0xc4b33aa6	tracepoint_probe_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xc4cdf335	rtc_update_irq_enable
+EXPORT_SYMBOL_GPL vmlinux 0xc51b5f4d	transport_add_device
+EXPORT_SYMBOL_GPL vmlinux 0xc5397da6	xenbus_mkdir
+EXPORT_SYMBOL_GPL vmlinux 0xc53bb0a6	skb_icv_walk
+EXPORT_SYMBOL_GPL vmlinux 0xc55c631a	sata_link_debounce
+EXPORT_SYMBOL_GPL vmlinux 0xc5c62762	regulator_count_voltages
+EXPORT_SYMBOL_GPL vmlinux 0xc5d8053f	get_user_pages_fast
+EXPORT_SYMBOL_GPL vmlinux 0xc5e2e9fd	dev_set_name
+EXPORT_SYMBOL_GPL vmlinux 0xc5e3dddf	wmi_get_event_data
+EXPORT_SYMBOL_GPL vmlinux 0xc60f75ec	__ftrace_vprintk
+EXPORT_SYMBOL_GPL vmlinux 0xc6364381	rtnl_kill_links
+EXPORT_SYMBOL_GPL vmlinux 0xc6545d64	crypto_alloc_base
+EXPORT_SYMBOL_GPL vmlinux 0xc673e23e	ata_scsi_change_queue_depth
+EXPORT_SYMBOL_GPL vmlinux 0xc6b944a3	init_dummy_netdev
+EXPORT_SYMBOL_GPL vmlinux 0xc6c17d7d	debugfs_create_u64
+EXPORT_SYMBOL_GPL vmlinux 0xc7729ceb	usb_autopm_get_interface_async
+EXPORT_SYMBOL_GPL vmlinux 0xc7bfc53e	page_mkclean
+EXPORT_SYMBOL_GPL vmlinux 0xc7ec11f6	atomic_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xc87c1f84	ktime_get
+EXPORT_SYMBOL_GPL vmlinux 0xc87e487a	sched_clock_idle_sleep_event
+EXPORT_SYMBOL_GPL vmlinux 0xc8eb5766	locks_release_private
+EXPORT_SYMBOL_GPL vmlinux 0xc904a168	skcipher_geniv_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xc90bc692	xfrm_output_resume
+EXPORT_SYMBOL_GPL vmlinux 0xc9343715	fb_bl_default_curve
+EXPORT_SYMBOL_GPL vmlinux 0xc9527779	netlink_has_listeners
+EXPORT_SYMBOL_GPL vmlinux 0xc9561772	fb_destroy_modelist
+EXPORT_SYMBOL_GPL vmlinux 0xc97d01b8	ring_buffer_empty
+EXPORT_SYMBOL_GPL vmlinux 0xc9a57696	ata_sff_irq_clear
+EXPORT_SYMBOL_GPL vmlinux 0xc9d4d6d1	wmi_has_guid
+EXPORT_SYMBOL_GPL vmlinux 0xc9e6ccdf	cpufreq_register_governor
+EXPORT_SYMBOL_GPL vmlinux 0xc9ec4e21	free_percpu
+EXPORT_SYMBOL_GPL vmlinux 0xca01f51c	tcp_orphan_count
+EXPORT_SYMBOL_GPL vmlinux 0xca08257c	usb_register_dev
+EXPORT_SYMBOL_GPL vmlinux 0xca6bd777	task_current_syscall
+EXPORT_SYMBOL_GPL vmlinux 0xca81ea9a	xenbus_transaction_end
+EXPORT_SYMBOL_GPL vmlinux 0xca85d8cf	tracepoint_probe_update_all
+EXPORT_SYMBOL_GPL vmlinux 0xca8eb935	devres_release_group
+EXPORT_SYMBOL_GPL vmlinux 0xcabe04de	cpuidle_resume_and_unlock
+EXPORT_SYMBOL_GPL vmlinux 0xcabe4864	blk_abort_request
+EXPORT_SYMBOL_GPL vmlinux 0xcac409c9	da903x_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xcae9b7a1	ata_do_dev_read_id
+EXPORT_SYMBOL_GPL vmlinux 0xcb02579e	devres_find
+EXPORT_SYMBOL_GPL vmlinux 0xcb060564	regulator_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xcb2fa2d7	eventfd_fget
+EXPORT_SYMBOL_GPL vmlinux 0xcb759cbb	xenbus_switch_state
+EXPORT_SYMBOL_GPL vmlinux 0xcba265a6	bus_find_device
+EXPORT_SYMBOL_GPL vmlinux 0xcbb234e3	sysfs_schedule_callback
+EXPORT_SYMBOL_GPL vmlinux 0xcc1f1c3d	inet_twdr_hangman
+EXPORT_SYMBOL_GPL vmlinux 0xcc6ab305	is_dock_device
+EXPORT_SYMBOL_GPL vmlinux 0xcc8191bf	pci_enable_sriov
+EXPORT_SYMBOL_GPL vmlinux 0xccba1f3c	ata_sff_busy_sleep
+EXPORT_SYMBOL_GPL vmlinux 0xccc3a20b	sysfs_remove_link
+EXPORT_SYMBOL_GPL vmlinux 0xcccfb2fa	sata_deb_timing_hotplug
+EXPORT_SYMBOL_GPL vmlinux 0xcd2f83d3	power_supply_get_by_name
+EXPORT_SYMBOL_GPL vmlinux 0xcd4b7b98	register_virtio_device
+EXPORT_SYMBOL_GPL vmlinux 0xcdb33713	proc_net_remove
+EXPORT_SYMBOL_GPL vmlinux 0xcdca3691	nr_irqs
+EXPORT_SYMBOL_GPL vmlinux 0xce1df360	debugfs_create_dir
+EXPORT_SYMBOL_GPL vmlinux 0xce33b02c	bus_get_kset
+EXPORT_SYMBOL_GPL vmlinux 0xcebd4457	sata_pmp_error_handler
+EXPORT_SYMBOL_GPL vmlinux 0xcee2a73c	ahash_attr_alg
+EXPORT_SYMBOL_GPL vmlinux 0xcf72d8cb	find_symbol
+EXPORT_SYMBOL_GPL vmlinux 0xcf7a962e	cn_add_callback
+EXPORT_SYMBOL_GPL vmlinux 0xcf8391f7	crypto_shash_finup
+EXPORT_SYMBOL_GPL vmlinux 0xcf8af983	trace_profile_buf
+EXPORT_SYMBOL_GPL vmlinux 0xcf8f43c3	crypto_unregister_alg
+EXPORT_SYMBOL_GPL vmlinux 0xcfc68341	synchronize_rcu_bh
+EXPORT_SYMBOL_GPL vmlinux 0xcfcc83ad	register_vt_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xcffa07aa	scsi_nl_sock
+EXPORT_SYMBOL_GPL vmlinux 0xcffa2aff	spi_populate_width_msg
+EXPORT_SYMBOL_GPL vmlinux 0xd03536d2	blk_update_request
+EXPORT_SYMBOL_GPL vmlinux 0xd03c7700	secure_ipv4_port_ephemeral
+EXPORT_SYMBOL_GPL vmlinux 0xd03fdcc0	hrtimer_start
+EXPORT_SYMBOL_GPL vmlinux 0xd065f847	net_assign_generic
+EXPORT_SYMBOL_GPL vmlinux 0xd097570b	inet_unhash
+EXPORT_SYMBOL_GPL vmlinux 0xd0c05159	emergency_restart
+EXPORT_SYMBOL_GPL vmlinux 0xd0c110fb	usb_match_id
+EXPORT_SYMBOL_GPL vmlinux 0xd10c2183	ata_eh_freeze_port
+EXPORT_SYMBOL_GPL vmlinux 0xd12ac59b	olpc_ec_cmd
+EXPORT_SYMBOL_GPL vmlinux 0xd137168a	driver_add_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xd1568727	dma_get_required_mask
+EXPORT_SYMBOL_GPL vmlinux 0xd16712f3	crypto_check_attr_type
+EXPORT_SYMBOL_GPL vmlinux 0xd19bbcea	devres_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xd1c2c081	platform_driver_register
+EXPORT_SYMBOL_GPL vmlinux 0xd1f972d9	ata_host_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xd20d1eef	usb_debug_root
+EXPORT_SYMBOL_GPL vmlinux 0xd2205aec	pci_intx
+EXPORT_SYMBOL_GPL vmlinux 0xd23bc8a3	usb_sg_init
+EXPORT_SYMBOL_GPL vmlinux 0xd245780a	sata_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0xd273b1b1	__round_jiffies_up_relative
+EXPORT_SYMBOL_GPL vmlinux 0xd2a6d3bb	sdio_readw
+EXPORT_SYMBOL_GPL vmlinux 0xd2a8caf0	work_on_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xd312f2b2	da903x_write
+EXPORT_SYMBOL_GPL vmlinux 0xd36d16b4	raw_seq_start
+EXPORT_SYMBOL_GPL vmlinux 0xd37bc9bb	hvc_instantiate
+EXPORT_SYMBOL_GPL vmlinux 0xd39a47fa	acpi_bus_trim
+EXPORT_SYMBOL_GPL vmlinux 0xd39c834a	user_instantiate
+EXPORT_SYMBOL_GPL vmlinux 0xd3b15cba	ata_sff_host_intr
+EXPORT_SYMBOL_GPL vmlinux 0xd3c230b4	driver_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0xd3c5a8d3	sysdev_store_ulong
+EXPORT_SYMBOL_GPL vmlinux 0xd3dd1bf2	fb_deferred_io_cleanup
+EXPORT_SYMBOL_GPL vmlinux 0xd409c18e	aead_geniv_free
+EXPORT_SYMBOL_GPL vmlinux 0xd42319b0	kobject_uevent
+EXPORT_SYMBOL_GPL vmlinux 0xd438a662	mmu_notifier_register
+EXPORT_SYMBOL_GPL vmlinux 0xd4711f60	skcipher_geniv_init
+EXPORT_SYMBOL_GPL vmlinux 0xd484b603	ata_host_detach
+EXPORT_SYMBOL_GPL vmlinux 0xd494ee54	speedstep_get_freqs
+EXPORT_SYMBOL_GPL vmlinux 0xd49f211c	device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xd4baf821	ring_buffer_entries_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xd4eed84a	uart_set_options
+EXPORT_SYMBOL_GPL vmlinux 0xd5051eb7	anon_transport_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xd544e902	pgprot_writecombine
+EXPORT_SYMBOL_GPL vmlinux 0xd54789a1	relay_reset
+EXPORT_SYMBOL_GPL vmlinux 0xd54fa78f	screen_glyph
+EXPORT_SYMBOL_GPL vmlinux 0xd57da570	xenbus_bind_evtchn
+EXPORT_SYMBOL_GPL vmlinux 0xd59d0758	dm_unregister_path_selector
+EXPORT_SYMBOL_GPL vmlinux 0xd5b89c2b	class_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xd5f12a90	inet_diag_register
+EXPORT_SYMBOL_GPL vmlinux 0xd66f3a31	ipv6_dup_options
+EXPORT_SYMBOL_GPL vmlinux 0xd6e97436	tty_init_termios
+EXPORT_SYMBOL_GPL vmlinux 0xd705b4c7	schedule_hrtimeout
+EXPORT_SYMBOL_GPL vmlinux 0xd72771cc	ring_buffer_resize
+EXPORT_SYMBOL_GPL vmlinux 0xd73ef534	sysdev_resume
+EXPORT_SYMBOL_GPL vmlinux 0xd747aa96	usb_hcd_platform_shutdown
+EXPORT_SYMBOL_GPL vmlinux 0xd757577f	sysdev_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xd768e985	regulator_has_full_constraints
+EXPORT_SYMBOL_GPL vmlinux 0xd79fbaf9	rtc_alarm_irq_enable
+EXPORT_SYMBOL_GPL vmlinux 0xd7aae81c	crypto_drop_spawn
+EXPORT_SYMBOL_GPL vmlinux 0xd7aba476	ata_sff_irq_on
+EXPORT_SYMBOL_GPL vmlinux 0xd7d79132	put_online_cpus
+EXPORT_SYMBOL_GPL vmlinux 0xd7f499f3	shash_ahash_digest
+EXPORT_SYMBOL_GPL vmlinux 0xd7fa6ff4	debugfs_create_bool
+EXPORT_SYMBOL_GPL vmlinux 0xd81658e7	ata_sas_port_init
+EXPORT_SYMBOL_GPL vmlinux 0xd878d7c6	xenbus_dev_error
+EXPORT_SYMBOL_GPL vmlinux 0xd9042fa8	scatterwalk_map
+EXPORT_SYMBOL_GPL vmlinux 0xd9b037de	handle_level_irq
+EXPORT_SYMBOL_GPL vmlinux 0xd9c1b708	usb_autopm_get_interface
+EXPORT_SYMBOL_GPL vmlinux 0xd9df18e0	pci_ioremap_bar
+EXPORT_SYMBOL_GPL vmlinux 0xd9f632be	cpuidle_register_device
+EXPORT_SYMBOL_GPL vmlinux 0xda1be8e1	async_synchronize_cookie_domain
+EXPORT_SYMBOL_GPL vmlinux 0xda45744e	sock_prot_inuse_add
+EXPORT_SYMBOL_GPL vmlinux 0xda69731d	usb_control_msg
+EXPORT_SYMBOL_GPL vmlinux 0xda6ad292	crypto_larval_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xdaf4dfb3	fb_mode_option
+EXPORT_SYMBOL_GPL vmlinux 0xdafa0010	devm_kzalloc
+EXPORT_SYMBOL_GPL vmlinux 0xdb002e70	__ring_buffer_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xdb1fbf67	usb_interrupt_msg
+EXPORT_SYMBOL_GPL vmlinux 0xdb274e52	monotonic_to_bootbased
+EXPORT_SYMBOL_GPL vmlinux 0xdb29abf6	xenbus_grant_ring
+EXPORT_SYMBOL_GPL vmlinux 0xdb5f963b	cpuidle_disable_device
+EXPORT_SYMBOL_GPL vmlinux 0xdb926e55	dma_release_channel
+EXPORT_SYMBOL_GPL vmlinux 0xdba19ee8	regulator_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xdba64f1c	eventfd_ctx_get
+EXPORT_SYMBOL_GPL vmlinux 0xdbe1aaad	vring_new_virtqueue
+EXPORT_SYMBOL_GPL vmlinux 0xdbf49b77	hvc_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xdbfa8830	inet6_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xdc034fbb	crypto_enqueue_request
+EXPORT_SYMBOL_GPL vmlinux 0xdc15007d	class_compat_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xdc3bc370	devres_open_group
+EXPORT_SYMBOL_GPL vmlinux 0xdc58a033	blk_trace_startstop
+EXPORT_SYMBOL_GPL vmlinux 0xdc714560	register_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0xdc7c5ef7	sysdev_class_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xdc9eaeb1	pci_hp_create_module_link
+EXPORT_SYMBOL_GPL vmlinux 0xdcc8179a	pci_hp_change_slot_info
+EXPORT_SYMBOL_GPL vmlinux 0xdcd672a9	crypto_register_shash
+EXPORT_SYMBOL_GPL vmlinux 0xdd2d72e8	usb_add_hcd
+EXPORT_SYMBOL_GPL vmlinux 0xdd4a3893	ata_bmdma_mode_filter
+EXPORT_SYMBOL_GPL vmlinux 0xdd884c3e	device_release_driver
+EXPORT_SYMBOL_GPL vmlinux 0xddb1717f	generic_drop_inode
+EXPORT_SYMBOL_GPL vmlinux 0xddccdcd8	inet_hash_connect
+EXPORT_SYMBOL_GPL vmlinux 0xddd2471b	__get_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0xde3504f8	da903x_read
+EXPORT_SYMBOL_GPL vmlinux 0xde417b81	async_schedule_domain
+EXPORT_SYMBOL_GPL vmlinux 0xde48df18	__cpufreq_driver_target
+EXPORT_SYMBOL_GPL vmlinux 0xde88bca5	vma_kernel_pagesize
+EXPORT_SYMBOL_GPL vmlinux 0xdec589d4	cpufreq_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0xdf2e2226	__crypto_alloc_tfm
+EXPORT_SYMBOL_GPL vmlinux 0xdf3d96e5	inotify_init_watch
+EXPORT_SYMBOL_GPL vmlinux 0xdf800229	device_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0xdfa13ef4	bus_sort_breadthfirst
+EXPORT_SYMBOL_GPL vmlinux 0xdfafb983	per_cpu__gdt_page
+EXPORT_SYMBOL_GPL vmlinux 0xdfc8db60	ata_sff_prereset
+EXPORT_SYMBOL_GPL vmlinux 0xdff4586f	inotify_rm_watch
+EXPORT_SYMBOL_GPL vmlinux 0xe0539850	sysfs_add_file_to_group
+EXPORT_SYMBOL_GPL vmlinux 0xe0792e1b	ata_pci_device_do_resume
+EXPORT_SYMBOL_GPL vmlinux 0xe09bbed0	find_module
+EXPORT_SYMBOL_GPL vmlinux 0xe0c77bb5	mce_notify_irq
+EXPORT_SYMBOL_GPL vmlinux 0xe0c89de2	ata_dev_disable
+EXPORT_SYMBOL_GPL vmlinux 0xe0cca33e	xfrm_aead_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0xe0dd653c	macvlan_handle_frame_hook
+EXPORT_SYMBOL_GPL vmlinux 0xe0f36f81	led_trigger_event
+EXPORT_SYMBOL_GPL vmlinux 0xe118f713	cpuidle_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0xe1b795b2	__cpufreq_driver_getavg
+EXPORT_SYMBOL_GPL vmlinux 0xe1b9dce6	ata_sff_error_handler
+EXPORT_SYMBOL_GPL vmlinux 0xe1fe1aa9	sata_scr_read
+EXPORT_SYMBOL_GPL vmlinux 0xe2034e95	security_inode_setattr
+EXPORT_SYMBOL_GPL vmlinux 0xe2194014	crypto_init_ahash_spawn
+EXPORT_SYMBOL_GPL vmlinux 0xe2228d90	crypto_shoot_alg
+EXPORT_SYMBOL_GPL vmlinux 0xe22bfe79	pciserial_suspend_ports
+EXPORT_SYMBOL_GPL vmlinux 0xe23308e7	i2c_new_device
+EXPORT_SYMBOL_GPL vmlinux 0xe2426710	wmi_evaluate_method
+EXPORT_SYMBOL_GPL vmlinux 0xe247343b	hrtimer_get_remaining
+EXPORT_SYMBOL_GPL vmlinux 0xe24c77bb	usb_poison_urb
+EXPORT_SYMBOL_GPL vmlinux 0xe24db3a9	fuse_do_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xe2525839	ring_buffer_empty_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xe2652d32	cpuidle_enable_device
+EXPORT_SYMBOL_GPL vmlinux 0xe27551b7	driver_for_each_device
+EXPORT_SYMBOL_GPL vmlinux 0xe295c0ff	is_hpet_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xe2d02f4c	unregister_ftrace_event
+EXPORT_SYMBOL_GPL vmlinux 0xe2e61a37	apply_to_page_range
+EXPORT_SYMBOL_GPL vmlinux 0xe2f5bc19	kick_process
+EXPORT_SYMBOL_GPL vmlinux 0xe3293d70	dm_register_path_selector
+EXPORT_SYMBOL_GPL vmlinux 0xe34c44ae	class_compat_create_link
+EXPORT_SYMBOL_GPL vmlinux 0xe38631cf	usb_deregister_device_driver
+EXPORT_SYMBOL_GPL vmlinux 0xe419a1b2	ip_build_and_send_pkt
+EXPORT_SYMBOL_GPL vmlinux 0xe4699010	ring_buffer_iter_reset
+EXPORT_SYMBOL_GPL vmlinux 0xe48a9041	shash_attr_alg
+EXPORT_SYMBOL_GPL vmlinux 0xe49ff3b0	ata_wait_register
+EXPORT_SYMBOL_GPL vmlinux 0xe4c331b6	acpi_os_unmap_memory
+EXPORT_SYMBOL_GPL vmlinux 0xe4d85ccf	usb_ep0_reinit
+EXPORT_SYMBOL_GPL vmlinux 0xe4db39dc	dm_requeue_unmapped_request
+EXPORT_SYMBOL_GPL vmlinux 0xe4ddb6b1	user_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xe513afc0	cache_k8_northbridges
+EXPORT_SYMBOL_GPL vmlinux 0xe530071c	pm_qos_remove_requirement
+EXPORT_SYMBOL_GPL vmlinux 0xe54d9427	pci_disable_rom
+EXPORT_SYMBOL_GPL vmlinux 0xe566144c	cpufreq_frequency_table_cpuinfo
+EXPORT_SYMBOL_GPL vmlinux 0xe5838167	xfrm_audit_policy_add
+EXPORT_SYMBOL_GPL vmlinux 0xe6018587	usb_reset_configuration
+EXPORT_SYMBOL_GPL vmlinux 0xe60a957d	crypto_blkcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0xe614d477	usb_free_urb
+EXPORT_SYMBOL_GPL vmlinux 0xe61a6d2f	gpio_unexport
+EXPORT_SYMBOL_GPL vmlinux 0xe6488b47	cpufreq_notify_transition
+EXPORT_SYMBOL_GPL vmlinux 0xe64bfc62	inet_csk_reqsk_queue_hash_add
+EXPORT_SYMBOL_GPL vmlinux 0xe651f76e	selinux_is_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xe6ae42fb	crypto_mod_put
+EXPORT_SYMBOL_GPL vmlinux 0xe6c542c0	key_type_user
+EXPORT_SYMBOL_GPL vmlinux 0xe70a8904	sysfs_get_dirent
+EXPORT_SYMBOL_GPL vmlinux 0xe798468d	sdio_claim_irq
+EXPORT_SYMBOL_GPL vmlinux 0xe7ffe877	pcpu_base_addr
+EXPORT_SYMBOL_GPL vmlinux 0xe85bad07	ata_pio_queue_task
+EXPORT_SYMBOL_GPL vmlinux 0xe862c4b7	dpm_suspend_start
+EXPORT_SYMBOL_GPL vmlinux 0xe87033e4	crypto_spawn_tfm
+EXPORT_SYMBOL_GPL vmlinux 0xe8bbc143	scsi_internal_device_unblock
+EXPORT_SYMBOL_GPL vmlinux 0xe8c1385c	sdio_f0_writeb
+EXPORT_SYMBOL_GPL vmlinux 0xe8ec4702	anon_inode_getfile
+EXPORT_SYMBOL_GPL vmlinux 0xe8fcc4df	__root_device_register
+EXPORT_SYMBOL_GPL vmlinux 0xe901175f	__dev_addr_unsync
+EXPORT_SYMBOL_GPL vmlinux 0xe9095956	remove_irq
+EXPORT_SYMBOL_GPL vmlinux 0xe90d952c	disk_part_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0xe90fd066	vring_transport_features
+EXPORT_SYMBOL_GPL vmlinux 0xe92d1cdd	skb_cow_data
+EXPORT_SYMBOL_GPL vmlinux 0xe93e49c3	devres_free
+EXPORT_SYMBOL_GPL vmlinux 0xe9587909	usb_unregister_notify
+EXPORT_SYMBOL_GPL vmlinux 0xe9e836d0	xenbus_dev_changed
+EXPORT_SYMBOL_GPL vmlinux 0xea065e01	task_handoff_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xea124bd1	gcd
+EXPORT_SYMBOL_GPL vmlinux 0xea418e0f	atapi_cmd_type
+EXPORT_SYMBOL_GPL vmlinux 0xea579f55	usb_hcd_pci_pm_ops
+EXPORT_SYMBOL_GPL vmlinux 0xeaa2d895	isa_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0xeae74760	scsi_nl_send_transport_msg
+EXPORT_SYMBOL_GPL vmlinux 0xeafa12b0	rtnl_put_cacheinfo
+EXPORT_SYMBOL_GPL vmlinux 0xeb3723e7	simple_attr_open
+EXPORT_SYMBOL_GPL vmlinux 0xeb4c1fc8	__tracepoint_block_remap
+EXPORT_SYMBOL_GPL vmlinux 0xeb58fab0	gpiochip_is_requested
+EXPORT_SYMBOL_GPL vmlinux 0xeba1468e	vfs_cancel_lock
+EXPORT_SYMBOL_GPL vmlinux 0xebcf95ef	led_trigger_set
+EXPORT_SYMBOL_GPL vmlinux 0xebf7bc01	debugfs_remove_recursive
+EXPORT_SYMBOL_GPL vmlinux 0xebf7d37c	file_ra_state_init
+EXPORT_SYMBOL_GPL vmlinux 0xec1a75a9	__dev_addr_sync
+EXPORT_SYMBOL_GPL vmlinux 0xec1b043e	regulator_suspend_prepare
+EXPORT_SYMBOL_GPL vmlinux 0xec35180e	pci_cleanup_aer_uncorrect_error_status
+EXPORT_SYMBOL_GPL vmlinux 0xec3fac5f	ring_buffer_entries
+EXPORT_SYMBOL_GPL vmlinux 0xec4ab55d	ring_buffer_free
+EXPORT_SYMBOL_GPL vmlinux 0xec792bb7	blkcipher_walk_virt_block
+EXPORT_SYMBOL_GPL vmlinux 0xec8e901e	sdio_enable_func
+EXPORT_SYMBOL_GPL vmlinux 0xecab0eb3	platform_get_resource
+EXPORT_SYMBOL_GPL vmlinux 0xed703b23	debugfs_create_u32
+EXPORT_SYMBOL_GPL vmlinux 0xed760ef4	cpci_hp_unregister_bus
+EXPORT_SYMBOL_GPL vmlinux 0xed9a328f	ata_std_bios_param
+EXPORT_SYMBOL_GPL vmlinux 0xedbc6f67	gnttab_end_foreign_access
+EXPORT_SYMBOL_GPL vmlinux 0xedca50d8	ata_bmdma_setup
+EXPORT_SYMBOL_GPL vmlinux 0xedf0787f	ata_noop_qc_prep
+EXPORT_SYMBOL_GPL vmlinux 0xedf3f1f1	do_machine_check
+EXPORT_SYMBOL_GPL vmlinux 0xee60b557	fuse_dev_release
+EXPORT_SYMBOL_GPL vmlinux 0xeed0e419	scsi_eh_ready_devs
+EXPORT_SYMBOL_GPL vmlinux 0xef0791de	ata_port_schedule_eh
+EXPORT_SYMBOL_GPL vmlinux 0xef6c3f70	round_jiffies_up_relative
+EXPORT_SYMBOL_GPL vmlinux 0xefa24a20	i2c_new_dummy
+EXPORT_SYMBOL_GPL vmlinux 0xefa56372	ata_eh_analyze_ncq_error
+EXPORT_SYMBOL_GPL vmlinux 0xefaa3517	skb_partial_csum_set
+EXPORT_SYMBOL_GPL vmlinux 0xefc3c395	__mnt_is_readonly
+EXPORT_SYMBOL_GPL vmlinux 0xefd635d4	__scsi_get_command
+EXPORT_SYMBOL_GPL vmlinux 0xefdd5a63	ktime_get_ts
+EXPORT_SYMBOL_GPL vmlinux 0xefe21106	snmp_mib_init
+EXPORT_SYMBOL_GPL vmlinux 0xefef0909	register_kprobes
+EXPORT_SYMBOL_GPL vmlinux 0xeff824cf	usb_mon_register
+EXPORT_SYMBOL_GPL vmlinux 0xf00dd5a0	free_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0xf027274d	vfs_lock_file
+EXPORT_SYMBOL_GPL vmlinux 0xf03e6bb7	vfs_listxattr
+EXPORT_SYMBOL_GPL vmlinux 0xf0470b22	ata_std_error_handler
+EXPORT_SYMBOL_GPL vmlinux 0xf0696401	acpi_pci_detect_ejectable
+EXPORT_SYMBOL_GPL vmlinux 0xf06c1cc7	unregister_timer_hook
+EXPORT_SYMBOL_GPL vmlinux 0xf0f5d36b	inet_twsk_put
+EXPORT_SYMBOL_GPL vmlinux 0xf13f6dca	scsi_target_block
+EXPORT_SYMBOL_GPL vmlinux 0xf1463412	execute_in_process_context
+EXPORT_SYMBOL_GPL vmlinux 0xf14e4919	debugfs_create_symlink
+EXPORT_SYMBOL_GPL vmlinux 0xf184d189	kernel_power_off
+EXPORT_SYMBOL_GPL vmlinux 0xf1cdee0f	dm_underlying_device_busy
+EXPORT_SYMBOL_GPL vmlinux 0xf1ef847f	init_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0xf2220aa3	usb_string
+EXPORT_SYMBOL_GPL vmlinux 0xf2315f4f	inet6_lookup_listener
+EXPORT_SYMBOL_GPL vmlinux 0xf2910c52	device_move
+EXPORT_SYMBOL_GPL vmlinux 0xf2b46dd0	tcp_done
+EXPORT_SYMBOL_GPL vmlinux 0xf2bbfcab	ata_sas_scsi_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xf2fca922	uart_parse_options
+EXPORT_SYMBOL_GPL vmlinux 0xf34806ec	hrtimer_get_res
+EXPORT_SYMBOL_GPL vmlinux 0xf36372e9	inet_twsk_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xf388e57e	crypto_ahash_final
+EXPORT_SYMBOL_GPL vmlinux 0xf3b7a7e0	ata_qc_complete
+EXPORT_SYMBOL_GPL vmlinux 0xf3ba2561	debugfs_create_u8
+EXPORT_SYMBOL_GPL vmlinux 0xf3c1c0a0	leds_list_lock
+EXPORT_SYMBOL_GPL vmlinux 0xf3ebea81	ata_pci_sff_prepare_host
+EXPORT_SYMBOL_GPL vmlinux 0xf3ec0965	find_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0xf420a2b1	power_supply_changed
+EXPORT_SYMBOL_GPL vmlinux 0xf44617f1	device_initialize
+EXPORT_SYMBOL_GPL vmlinux 0xf4851a67	debugfs_create_blob
+EXPORT_SYMBOL_GPL vmlinux 0xf486fe2d	rt_mutex_lock
+EXPORT_SYMBOL_GPL vmlinux 0xf48feac4	blk_insert_cloned_request
+EXPORT_SYMBOL_GPL vmlinux 0xf499fdb2	rcu_barrier_bh
+EXPORT_SYMBOL_GPL vmlinux 0xf5266591	da903x_update
+EXPORT_SYMBOL_GPL vmlinux 0xf5384ac1	__trace_printk
+EXPORT_SYMBOL_GPL vmlinux 0xf53875ea	ata_pci_device_suspend
+EXPORT_SYMBOL_GPL vmlinux 0xf53ed33d	device_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xf5446581	skb_pull_rcsum
+EXPORT_SYMBOL_GPL vmlinux 0xf54bd49b	lcm
+EXPORT_SYMBOL_GPL vmlinux 0xf5515e5c	blkcipher_walk_virt
+EXPORT_SYMBOL_GPL vmlinux 0xf553318d	cpuidle_pause_and_lock
+EXPORT_SYMBOL_GPL vmlinux 0xf5799f7a	stop_machine_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xf5945bac	gnttab_free_grant_references
+EXPORT_SYMBOL_GPL vmlinux 0xf5a691cd	invalidate_bh_lrus
+EXPORT_SYMBOL_GPL vmlinux 0xf60f0321	xenbus_frontend_closed
+EXPORT_SYMBOL_GPL vmlinux 0xf6bcbd73	hwrng_register
+EXPORT_SYMBOL_GPL vmlinux 0xf6d0bd0b	ring_buffer_discard_commit
+EXPORT_SYMBOL_GPL vmlinux 0xf6e874f5	ata_timing_merge
+EXPORT_SYMBOL_GPL vmlinux 0xf7016530	xenbus_gather
+EXPORT_SYMBOL_GPL vmlinux 0xf73291da	xenbus_watch_path
+EXPORT_SYMBOL_GPL vmlinux 0xf758bd5f	init_srcu_struct
+EXPORT_SYMBOL_GPL vmlinux 0xf7c7c35a	acpi_smbus_unregister_callback
+EXPORT_SYMBOL_GPL vmlinux 0xf7e33198	da903x_reads
+EXPORT_SYMBOL_GPL vmlinux 0xf7ff393b	scsi_dh_activate
+EXPORT_SYMBOL_GPL vmlinux 0xf85e5cba	hvc_poll
+EXPORT_SYMBOL_GPL vmlinux 0xf860d0a4	vfs_getxattr
+EXPORT_SYMBOL_GPL vmlinux 0xf863e82a	flush_work
+EXPORT_SYMBOL_GPL vmlinux 0xf8686bbd	__xenbus_register_frontend
+EXPORT_SYMBOL_GPL vmlinux 0xf869abeb	ata_sff_post_internal_cmd
+EXPORT_SYMBOL_GPL vmlinux 0xf8802492	print_stack_trace
+EXPORT_SYMBOL_GPL vmlinux 0xf8d07e0c	ata_sas_queuecmd
+EXPORT_SYMBOL_GPL vmlinux 0xf8f3a0fb	ata_ratelimit
+EXPORT_SYMBOL_GPL vmlinux 0xf93dd31e	__rtnl_link_register
+EXPORT_SYMBOL_GPL vmlinux 0xf961c8ab	blkcipher_walk_done
+EXPORT_SYMBOL_GPL vmlinux 0xf9765833	dmi_match
+EXPORT_SYMBOL_GPL vmlinux 0xf97666a0	set_memory_rw
+EXPORT_SYMBOL_GPL vmlinux 0xf97ea8b0	sysfs_notify
+EXPORT_SYMBOL_GPL vmlinux 0xf9945569	class_interface_register
+EXPORT_SYMBOL_GPL vmlinux 0xf9a054b5	__round_jiffies
+EXPORT_SYMBOL_GPL vmlinux 0xf9a467bf	debugfs_create_x8
+EXPORT_SYMBOL_GPL vmlinux 0xf9ca3160	ata_id_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0xf9cc58f3	ata_sas_port_start
+EXPORT_SYMBOL_GPL vmlinux 0xf9cf7eae	ata_link_abort
+EXPORT_SYMBOL_GPL vmlinux 0xfa048f3b	sata_scr_valid
+EXPORT_SYMBOL_GPL vmlinux 0xfa1f4662	scatterwalk_start
+EXPORT_SYMBOL_GPL vmlinux 0xfa849360	relay_close
+EXPORT_SYMBOL_GPL vmlinux 0xfae20d8e	ata_acpi_cbl_80wire
+EXPORT_SYMBOL_GPL vmlinux 0xfaf8adf4	default_backing_dev_info
+EXPORT_SYMBOL_GPL vmlinux 0xfb072362	cpufreq_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0xfb10c8d5	usb_deregister
+EXPORT_SYMBOL_GPL vmlinux 0xfb18f5bb	ata_ehi_push_desc
+EXPORT_SYMBOL_GPL vmlinux 0xfb2a3293	math_state_restore
+EXPORT_SYMBOL_GPL vmlinux 0xfb359000	ata_sff_qc_fill_rtf
+EXPORT_SYMBOL_GPL vmlinux 0xfb69281a	kset_create_and_add
+EXPORT_SYMBOL_GPL vmlinux 0xfb8c86ea	usb_hcd_pci_remove
+EXPORT_SYMBOL_GPL vmlinux 0xfb8c9507	device_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xfbe45950	usb_get_hcd
+EXPORT_SYMBOL_GPL vmlinux 0xfbf77015	__ata_ehi_push_desc
+EXPORT_SYMBOL_GPL vmlinux 0xfbf9be5d	register_oom_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xfc7eea54	inet_csk_get_port
+EXPORT_SYMBOL_GPL vmlinux 0xfcce8a14	transport_remove_device
+EXPORT_SYMBOL_GPL vmlinux 0xfce8f444	devres_add
+EXPORT_SYMBOL_GPL vmlinux 0xfced2044	regulator_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xfd02e89a	spi_new_device
+EXPORT_SYMBOL_GPL vmlinux 0xfd51b281	gnttab_end_foreign_access_ref
+EXPORT_SYMBOL_GPL vmlinux 0xfd56a836	scsi_register_device_handler
+EXPORT_SYMBOL_GPL vmlinux 0xfdb72003	bsg_register_queue
+EXPORT_SYMBOL_GPL vmlinux 0xfdcde7ea	ata_dev_next
+EXPORT_SYMBOL_GPL vmlinux 0xfdd6d0f1	rtc_irq_set_state
+EXPORT_SYMBOL_GPL vmlinux 0xfde0b92c	crypto_larval_error
+EXPORT_SYMBOL_GPL vmlinux 0xfe03dd41	sata_std_hardreset
+EXPORT_SYMBOL_GPL vmlinux 0xfe561496	da903x_clr_bits
+EXPORT_SYMBOL_GPL vmlinux 0xfe727411	get_phys_to_machine
+EXPORT_SYMBOL_GPL vmlinux 0xfe990052	gpio_free
+EXPORT_SYMBOL_GPL vmlinux 0xfeb20374	ahash_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0xfeb94b5b	inet6_sk_rebuild_header
+EXPORT_SYMBOL_GPL vmlinux 0xfed11ed1	usb_mon_deregister
+EXPORT_SYMBOL_GPL vmlinux 0xff5a8cfe	cn_del_callback
+EXPORT_SYMBOL_GPL vmlinux 0xffc503d2	spi_alloc_master
+EXPORT_SYMBOL_GPL vmlinux 0xffe84155	dm_rh_region_context
+EXPORT_UNUSED_SYMBOL vmlinux 0x00000000	simple_prepare_write
--- linux-mvl-dove-2.6.32.orig/debian.master/abi/2.6.32-34.73/i386/386
+++ linux-mvl-dove-2.6.32/debian.master/abi/2.6.32-34.73/i386/386
@@ -0,0 +1,10425 @@
+EXPORT_SYMBOL arch/x86/kernel/scx200 0x254e5667	scx200_gpio_base
+EXPORT_SYMBOL arch/x86/kernel/scx200 0x35a3c008	scx200_gpio_configure
+EXPORT_SYMBOL arch/x86/kernel/scx200 0x8cfa375c	scx200_gpio_shadow
+EXPORT_SYMBOL arch/x86/kernel/scx200 0x907665bd	scx200_cb_base
+EXPORT_SYMBOL arch/x86/kvm/kvm 0x443c33d9	kvm_read_guest_atomic
+EXPORT_SYMBOL arch/x86/kvm/kvm 0x5078dd93	kvm_cpu_has_pending_timer
+EXPORT_SYMBOL crypto/gf128mul 0x0c2f123f	gf128mul_4k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x1068004b	gf128mul_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x2f2889a0	gf128mul_init_64k_lle
+EXPORT_SYMBOL crypto/gf128mul 0x3755f990	gf128mul_init_64k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x384ef9ce	gf128mul_64k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x56af0dbd	gf128mul_x_ble
+EXPORT_SYMBOL crypto/gf128mul 0x83581089	gf128mul_init_4k_lle
+EXPORT_SYMBOL crypto/gf128mul 0x9b2560b9	gf128mul_init_4k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x9e13f6f6	gf128mul_lle
+EXPORT_SYMBOL crypto/gf128mul 0xbd17a0df	gf128mul_4k_lle
+EXPORT_SYMBOL crypto/gf128mul 0xc0890413	gf128mul_64k_lle
+EXPORT_SYMBOL crypto/gf128mul 0xd60736ec	gf128mul_free_64k
+EXPORT_SYMBOL crypto/xor 0x5b6c00e6	xor_blocks
+EXPORT_SYMBOL drivers/acpi/video 0x7a45377b	acpi_video_unregister
+EXPORT_SYMBOL drivers/acpi/video 0x8826c13b	acpi_video_register
+EXPORT_SYMBOL drivers/atm/suni 0x889f6cb3	suni_init
+EXPORT_SYMBOL drivers/atm/uPD98402 0xa483f7a7	uPD98402_init
+EXPORT_SYMBOL drivers/block/paride/paride 0x1d0472bf	paride_register
+EXPORT_SYMBOL drivers/block/paride/paride 0x280e0a24	paride_unregister
+EXPORT_SYMBOL drivers/block/paride/paride 0x37f88987	pi_do_claimed
+EXPORT_SYMBOL drivers/block/paride/paride 0x527d8cb0	pi_init
+EXPORT_SYMBOL drivers/block/paride/paride 0x6e71eb15	pi_disconnect
+EXPORT_SYMBOL drivers/block/paride/paride 0x7522fa50	pi_schedule_claimed
+EXPORT_SYMBOL drivers/block/paride/paride 0x7a5a0dde	pi_read_regr
+EXPORT_SYMBOL drivers/block/paride/paride 0x8bf06692	pi_read_block
+EXPORT_SYMBOL drivers/block/paride/paride 0x9f079257	pi_connect
+EXPORT_SYMBOL drivers/block/paride/paride 0xc01175c6	pi_release
+EXPORT_SYMBOL drivers/block/paride/paride 0xea9c1a4f	pi_write_regr
+EXPORT_SYMBOL drivers/block/paride/paride 0xee4d4d3a	pi_write_block
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x052d14bf	agp_generic_create_gatt_table
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x05dbd299	agp_allocate_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x23c1fc7f	agp_generic_type_to_mask_type
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x24f7afca	get_agp_version
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x2918f62a	agp_generic_alloc_user
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x2991baa6	agp_collect_device_status
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x30226ddf	agp_device_command
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x30b79762	agp_generic_alloc_pages
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x3199eace	agp_backend_acquire
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x325d303c	agp_copy_info
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x3cbdce52	agp_generic_mask_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x42ae7fca	agp_generic_destroy_pages
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x432f276c	agp_generic_free_gatt_table
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x445265d3	agp_find_bridge
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x466256fb	agp_generic_destroy_page
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x49d025c3	agp_flush_chipset
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x49dfc6f4	agp_bind_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x4b085dbf	agp3_generic_configure
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x5e47954c	agp_generic_insert_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x673f815e	agp_bridges
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x7538b132	agp_off
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x75da2f32	agp_enable
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x774c33be	agp_create_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x83c97203	agp_generic_alloc_by_type
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x841ca963	agp3_generic_tlbflush
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x90255aa6	agp_free_page_array
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xa4d4f0e6	global_cache_flush
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xaa310420	agp_alloc_bridge
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xaf6b6ba9	agp_generic_free_by_type
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xb04ea8f0	agp_rebind_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xb71d2270	agp_alloc_page_array
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xbdb05fa2	agp_free_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xc2424641	agp3_generic_cleanup
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xc5d9c46c	agp_try_unsupported_boot
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xc6442bc1	agp_generic_enable
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xc65abeb7	agp3_generic_sizes
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xce3dc914	agp_backend_release
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xd0ee21e2	agp_generic_remove_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xd0fef3b2	agp_free_key
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xd9ae4203	agp_unbind_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xde9b17ed	agp3_generic_fetch_size
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xe31d671b	agp_generic_alloc_page
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xe52113f1	agp_bridge
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xfae332b1	agp_put_bridge
+EXPORT_SYMBOL drivers/char/agp/intel-agp 0x7b9a6116	intel_agp_enabled
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x0131fa0a	ipmi_unregister_for_cmd
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x10837411	ipmi_smi_watchdog_pretimeout
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x26a99390	ipmi_request_supply_msgs
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x2a4ffa9a	ipmi_poll_interface
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x2ed3f325	ipmi_get_maintenance_mode
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x40f2b10c	ipmi_alloc_smi_msg
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x462cb87a	ipmi_register_smi
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x4b9de914	ipmi_destroy_user
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x5050a1f2	ipmi_get_my_address
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x52857634	ipmi_get_my_LUN
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x55f47db2	ipmi_smi_watcher_register
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x671235db	ipmi_set_maintenance_mode
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x7e55531f	ipmi_smi_watcher_unregister
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x804f922a	ipmi_addr_length
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x95b89f27	ipmi_free_recv_msg
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x99f8634f	ipmi_set_gets_events
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x9e1ec774	ipmi_register_for_cmd
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0x9f9956d2	ipmi_set_my_LUN
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xa505996e	ipmi_request_settime
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xbe4bbec6	ipmi_set_my_address
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xd6aff959	ipmi_smi_add_proc_entry
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xd6dffeb1	ipmi_get_version
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xd93befb2	ipmi_create_user
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xe4f4665b	ipmi_validate_addr
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xf3334a64	ipmi_smi_msg_received
+EXPORT_SYMBOL drivers/char/ipmi/ipmi_msghandler 0xfb99e835	ipmi_unregister_smi
+EXPORT_SYMBOL drivers/char/nsc_gpio 0x128c3fd9	nsc_gpio_write
+EXPORT_SYMBOL drivers/char/nsc_gpio 0x52012cdc	nsc_gpio_dump
+EXPORT_SYMBOL drivers/char/nsc_gpio 0x7902b916	nsc_gpio_read
+EXPORT_SYMBOL drivers/char/nvram 0x0f28cb91	nvram_read_byte
+EXPORT_SYMBOL drivers/char/nvram 0x17ff2c1d	__nvram_read_byte
+EXPORT_SYMBOL drivers/char/nvram 0x2adec1e0	__nvram_check_checksum
+EXPORT_SYMBOL drivers/char/nvram 0x7da28f12	nvram_check_checksum
+EXPORT_SYMBOL drivers/char/nvram 0x9ce3f83f	nvram_write_byte
+EXPORT_SYMBOL drivers/char/nvram 0xa8813189	__nvram_write_byte
+EXPORT_SYMBOL drivers/edac/edac_core 0x415550c4	edac_mc_handle_fbd_ue
+EXPORT_SYMBOL drivers/edac/edac_core 0x7034f8ae	edac_mc_handle_fbd_ce
+EXPORT_SYMBOL drivers/edac/edac_core 0xab15362f	edac_mc_find
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x04dd92ce	fw_core_add_descriptor
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x094f8d29	fw_device_enable_phys_dma
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x10a335ed	fw_card_add
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x1bed49b9	fw_core_remove_card
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x3107bfda	fw_iso_context_start
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x31904366	fw_iso_context_create
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x3610e5e4	fw_core_add_address_handler
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x4d5d4eca	fw_core_remove_descriptor
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x4ee34955	fw_core_handle_request
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x5ebfdc0c	fw_iso_context_destroy
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x6eca84a5	fw_iso_context_stop
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x70cc2d07	fw_card_initialize
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x7261558b	fw_iso_context_queue
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x74632c48	fw_core_initiate_bus_reset
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x8491a49f	fw_core_handle_bus_reset
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x90863005	fw_high_memory_region
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x916ef652	fw_fill_response
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x944afede	fw_run_transaction
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x97f88e43	fw_send_response
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xaa0e5c3a	fw_core_remove_address_handler
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xab5c6b42	fw_send_request
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xafc1c793	fw_csr_iterator_next
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xb047a2c6	fw_csr_iterator_init
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xb35468f7	fw_cancel_transaction
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xd4a7b7a3	fw_core_handle_response
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xe446c331	fw_iso_buffer_init
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xeb9cb740	fw_bus_type
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xf9cbae9d	fw_iso_buffer_destroy
+EXPORT_SYMBOL drivers/firmware/dcdbas 0xa75079d6	dcdbas_smi_request
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x042171b9	drm_sg_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x05d33d96	drm_core_ioremapfree
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x06f9ec18	drm_fasync
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0836695c	drm_sman_takedown
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0ac2e636	drm_pci_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0b9bb26d	drm_mode_config_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0d81ce25	drm_irq_uninstall
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x10fd5e44	drm_mmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x16fba578	drm_irq_install
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x17c926fa	drm_get_drawable_info
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1d7498f8	drm_idlelock_release
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1f072c59	drm_property_add_enum
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x20645642	drm_debug
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2111d1f3	drm_pci_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x21451ac4	drm_sman_owner_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x22b75c26	drm_addbufs_agp
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2383048b	drm_sysfs_hotplug_event
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2480e15c	drm_get_resource_len
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2916bf63	drm_sman_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2ad41a11	drm_mode_create_dirty_info_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2b08d34c	drm_mode_validate_size
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2eb2f903	drm_sman_free_key
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3074f033	drm_order
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x34483234	drm_connector_attach_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x36301c9a	drm_addmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x37edbe5a	drm_rmmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x387e7b84	drm_vblank_put
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3a16771c	drm_connector_property_set_value
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3a2f21a8	drm_mm_search_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3c611aef	drm_debugfs_create_files
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3c9a1409	drm_ht_just_insert_please
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3de0c007	drm_gem_object_lookup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3e80c80c	drm_gem_handle_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3ec7ee8b	drm_agp_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x40911aaf	drm_mm_debug_table
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x42302f17	drm_mode_prune_invalid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x46ee42d7	drm_get_edid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4a97ec71	drm_agp_chipset_flush
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4b188dc3	drm_agp_acquire
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4bd6fa4e	drm_agp_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4d94a47f	drm_agp_release
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4f2c0bb7	drm_mode_remove
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4f9772f4	drm_i2c_encoder_destroy
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x507d5e97	drm_add_modes_noedid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x515a410c	drm_agp_bind_pages
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5245fc2a	drm_crtc_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x532dbb3f	drm_mode_config_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5391b6df	drm_master_put
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x55b1556b	drm_ioctl
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x55f060ee	drm_sman_set_range
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x56217ed2	drm_mm_clean
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x57a82b4e	drm_lock_take
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x57f7dbe6	drm_mm_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x580830f0	drm_mode_set_name
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5a31942f	drm_put_dev
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5a65955b	drm_mode_object_find
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5f4f210e	drm_agp_unbind
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5f7fcdea	drm_idlelock_take
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x60286f57	drm_mode_attachmode_crtc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x60c18185	drm_core_get_reg_ofs
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6285e9cc	drm_gtf_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x63b5c8d4	drm_connector_property_get_value
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6518c19a	drm_mm_get_block_range_generic
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6859213d	drm_ati_pcigart_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x689c4607	drm_addbufs_pci
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6a6e0a1b	drm_vblank_post_modeset
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6b87a226	drm_get_connector_name
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6d2e5837	drm_ut_debug_printk
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6df03702	drm_ati_pcigart_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6e530bf6	drm_gem_object_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6e8f1397	drm_sysfs_connector_add
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6fc30481	drm_mode_hsync
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x72d20029	drm_exit
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x745705a4	drm_mode_probed_add
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x76863e24	drm_mm_pre_get
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x76de891d	drm_debugfs_remove_files
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x784915eb	drm_mode_vrefresh
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7a20ef0c	drm_gem_vm_open
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7becf9f2	drm_gem_object_handle_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7c1fd6c8	drm_mode_equal
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7c94c3dc	drm_connector_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7e2ec622	drm_framebuffer_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x82d2e6f6	drm_mm_dump_table
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x82d63d60	drm_cvt_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x83bd0e09	drm_vblank_off
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8485bee9	drm_mode_connector_attach_encoder
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x849241ac	drm_mm_put_block
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x85612d39	drm_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x85de09f5	drm_mode_width
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x87d6e7ef	drm_detect_hdmi_monitor
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x89e2fd71	drm_agp_bind
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8a9a173b	drm_poll
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8bcda2e3	drm_core_ioremap_wc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8c0bb39d	drm_vblank_count
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8e62d513	drm_mm_search_free_in_range
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8fadb71c	drm_i_have_hw_lock
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8ffb2db8	drm_mode_create_scaling_mode_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x922cdf49	drm_agp_enable
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9285e4c1	drm_mode_crtc_set_gamma_size
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x92bde69e	drm_mode_connector_update_edid_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x93153f86	drm_i2c_encoder_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x99c1143f	drm_mode_create_tv_properties
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9ac12e18	drm_mode_detachmode_crtc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa0faee20	drm_master_get
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa1eabd87	drm_mode_list_concat
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa5b11444	drm_unbind_agp
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa7f79ab0	drm_mode_connector_detach_encoder
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xaa4b7860	drm_release
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xadfc174f	drm_mode_create_dvi_i_properties
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xaefaf080	drm_crtc_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xaf29788e	drm_sman_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb2d0ec97	drm_clflush_pages
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb3e8def1	drm_mode_connector_list_update
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb64e4cd5	drm_mm_init_scan
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb77376a2	drm_core_ioremap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb89ee240	drm_encoder_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xba3e6f23	drm_handle_vblank
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xbb70d165	drm_encoder_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xbbf45eed	drm_add_edid_modes
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xbd6f7a39	drm_vblank_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xbe931293	drm_sysfs_connector_remove
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xbf696f5f	drm_open
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xbf85c3ce	drm_mode_create_dithering_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc0c41b41	drm_get_encoder_name
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc1349d76	drm_framebuffer_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc1626115	drm_vblank_pre_modeset
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc19b5395	drm_getsarea
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc4ea85d8	drm_mm_scan_remove_block
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc633a11e	drm_connector_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc6794f16	drm_core_get_map_ofs
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc697ac91	drm_lock_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcaa3663d	drm_mode_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcc89f4e8	drm_property_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcdf2eff4	drm_mode_height
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xce249baa	drm_property_destroy
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcfb4f4ef	drm_mm_scan_add_block
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd08fa3f0	drm_mode_set_crtcinfo
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3028e75	drm_sman_set_manager
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3ffab51	drm_ht_remove
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd4c8a354	drm_mm_get_block_generic
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd58b0d51	drm_gem_mmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd9228bfa	drm_vblank_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd260a6c	drm_get_dev
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd3febe2	drm_gem_object_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd49095c	drm_ht_insert_item
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xde59fb18	drm_mode_destroy
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe11f1576	drm_get_resource_start
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe1457735	drm_ht_remove_item
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe24a7b88	drm_ht_find_item
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe5bdce7e	drm_mode_debug_printmodeline
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe678a012	drm_core_reclaim_buffers
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe919dd5c	drm_sman_owner_clean
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xecbdc6b2	drm_mode_duplicate
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf0ad1eb4	drm_read
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf1421d13	drm_mode_sort
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf159d606	drm_vblank_get
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf20a9d0e	drm_agp_info
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf42a2b26	drm_ht_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf5661a40	drm_rmmap_locked
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf6f24c18	drm_do_probe_ddc_edid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfa388ddd	drm_gem_vm_close
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfa769c65	drm_mm_takedown
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfad8beb3	drm_free_agp
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfdfbad19	drm_sman_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xff39b7bf	drm_mode_validate_clocks
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x017cfc5b	drm_helper_hotplug_stage_two
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x0644abc2	drm_fb_helper_set_par
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x35f8351e	drm_fb_helper_fill_fix
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x38abc907	drm_fb_helper_single_fb_probe
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x52629428	drm_fb_helper_init_crtc_count
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x52f18ad6	drm_helper_initial_config
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x59a599f8	drm_helper_crtc_in_use
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x5afe2464	drm_helper_probe_single_connector_modes
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x70d928b8	drm_fb_helper_pan_display
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x7a5d9362	drm_helper_mode_fill_fb_struct
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x81c7e48b	drm_fb_helper_free
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x86096d34	drm_helper_disable_unused_functions
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x88ca9835	drm_crtc_helper_set_config
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x9d251144	drm_fb_helper_panic
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xa64289a9	drm_fb_helper_check_var
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xaa328a0a	drm_fb_helper_fill_var
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xbb25dc09	drm_helper_connector_dpms
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xbb7b198a	drm_helper_resume_force_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xc469c244	drm_fb_helper_restore
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xc47ea2f4	drm_crtc_helper_set_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xc953d94b	drm_helper_encoder_in_use
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xcedc4d26	drm_fb_helper_add_connector
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xcf8e1715	drm_fb_helper_blank
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xd8cfd016	drm_helper_probe_connector_modes
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xe97e523d	drm_fb_helper_setcolreg
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xf6b00991	i2c_dp_aux_add_bus
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xfcbab48f	drm_fb_helper_setcmap
+EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x0a020770	intelfb_remove
+EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x0d0ab3b5	intelfb_resize
+EXPORT_SYMBOL drivers/gpu/drm/i915/i915 0x56f9cacf	intelfb_probe
+EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0xab280645	radeonfb_remove
+EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0xc9e06c2a	radeonfb_resize
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x01c99cb0	ttm_write_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x07787990	ttm_bo_global_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x104300e8	ttm_object_file_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x11c9c73c	ttm_bo_mem_space
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x132b05be	ttm_round_pot
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x15e215de	ttm_bo_kunmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x161262d6	ttm_ref_object_base_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x17a98fa2	ttm_object_device_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x1ba8c0ef	ttm_lock_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x1e4e7e87	ttm_bo_mmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x1e62c13a	ttm_bo_move_accel_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x20bb3550	ttm_mem_global_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x2288c71d	ttm_tt_set_placement_caching
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x2699dc93	ttm_tt_populate
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x2d673efd	ttm_vt_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x34704ea7	ttm_global_item_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x365feb2e	ttm_eu_reserve_buffers
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x3c3c3af1	ttm_bo_global_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x3de60c1d	ttm_agp_backend_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x47ea3265	ttm_bo_wait_cpu
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x49fd9a24	ttm_object_file_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x4f02f2ca	ttm_mem_global_free
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x52cb7d91	ttm_bo_validate
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x56c42d22	ttm_suspend_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x594f03fe	ttm_object_device_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x5d6b0558	ttm_bo_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x61bdb34f	ttm_eu_fence_buffer_objects
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x6277c681	ttm_base_object_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x66666d70	ttm_global_item_ref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x6e7203cd	ttm_bo_unmap_virtual
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x74472c90	ttm_bo_synccpu_write_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x765cbc82	ttm_read_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x79a55313	ttm_bo_kmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x7f8879de	ttm_vt_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x805de088	ttm_bo_swapout_all
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x83c50151	ttm_bo_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x86a4066d	ttm_eu_backoff_reservation
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x86d07664	ttm_mem_global_alloc
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x88999a13	ttm_mem_global_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x896164ef	ttm_bo_evict_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x8db796d4	ttm_write_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xa2568058	ttm_bo_reserve
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xa4b0ba5e	ttm_ref_object_add
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xacda7271	ttm_bo_move_ttm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xad6ff88f	ttm_bo_wait
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xae0b98c8	ttm_bo_move_memcpy
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb05bfad7	ttm_bo_synccpu_write_grab
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb5cf2fe9	ttm_suspend_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb905caf0	ttm_bo_init_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb9e927c4	ttm_base_object_lookup
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xbba2ecf9	ttm_read_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xbe3eadc6	ttm_fbdev_mmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xbf69f5ca	ttm_base_object_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc2058ac0	ttm_io_prot
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xca1c929c	ttm_bo_device_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xd10a6531	ttm_bo_device_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xd247208b	ttm_bo_wait_unreserved
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xd24d2a79	ttm_bo_clean_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xdebb0548	ttm_bo_unreserve
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xe09f320a	ttm_tt_bind
+EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0x0903c239	vid_from_reg
+EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0xef1c781c	vid_which_vrm
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-bit 0x77af9741	i2c_bit_add_numbered_bus
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-bit 0x8e001e0a	i2c_bit_add_bus
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0x675b9a3b	i2c_pca_add_bus
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0x890d3ff7	i2c_pca_add_numbered_bus
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pcf 0x8bd38eab	i2c_pcf_add_bus
+EXPORT_SYMBOL drivers/i2c/busses/i2c-amd756 0xe393951d	amd756_smbus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x00cc7ff9	hpsb_iso_xmit_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x04f7398f	hpsb_packet_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0715a847	hpsb_iso_xmit_queue_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x07b61a51	hpsb_lock
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1622051c	hpsb_add_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1a200e5a	csr1212_release_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1aee01de	hpsb_destroy_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1db8e4de	hpsb_register_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1f38a93c	hpsb_selfid_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x219cbabe	dma_region_offset_to_bus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x237f4af5	hpsb_free_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x25dbf1f5	hpsb_iso_recv_start
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x29299582	hpsb_unregister_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2a4cc36b	csr1212_attach_keyval_to_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2d133076	hpsb_set_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3384546d	hpsb_reset_bus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x34fdf20a	hpsb_make_lock64packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x35855902	hpsb_remove_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x43f6375c	hpsb_make_lockpacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x49cdde2e	hpsb_make_readpacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x534f95d3	hpsb_send_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x54f6be1c	hpsb_free_tlabel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5518e381	hpsb_register_highlevel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5f5fdd2f	csr1212_new_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x672ad148	dma_region_sync_for_device
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x68fd6863	hpsb_allocate_and_register_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6b3eee33	hpsb_iso_wake
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6d759f8b	hpsb_iso_recv_set_channel_mask
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x708291a6	dma_region_mmap
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7385d803	hpsb_iso_packet_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x73aaee09	hpsb_create_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x74bf1fbd	hpsb_iso_recv_listen_channel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x76bc1a5c	dma_region_free
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x771850eb	hpsb_iso_recv_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x77b4798d	hpsb_iso_n_ready
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x86c195b1	hpsb_node_write
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8843a431	hpsb_iso_recv_flush
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8879f8f0	dma_region_sync_for_cpu
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8ec2b312	dma_region_alloc
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x947bfc43	hpsb_unregister_highlevel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x94bce230	csr1212_get_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x968e40b0	hpsb_read_cycle_timer
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x979b3052	dma_prog_region_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9d24b60c	hpsb_set_packet_complete_task
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa0f7ceee	hpsb_read
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa1652776	__hpsb_register_protocol
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa30036f0	hpsb_write
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa489232a	hpsb_iso_stop
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa4e26f31	hpsb_iso_packet_sent
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa5aadd4c	hpsb_iso_xmit_start
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa7a35106	hpsb_iso_recv_unlisten_channel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa7c4d55f	hpsb_packet_sent
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa7f26b5c	hpsb_iso_shutdown
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa8246be0	hpsb_update_config_rom
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa924dac6	dma_prog_region_alloc
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa94ee4a0	hpsb_alloc_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa9fceb0c	hpsb_update_config_rom_image
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xab3ce4cd	hpsb_get_tlabel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xabb4ff9f	hpsb_node_fill_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaef57bb5	csr1212_detach_keyval_from_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaefbd374	csr1212_parse_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb544df5b	hpsb_get_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb5fd0e2f	hpsb_make_streampacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb85de268	hpsb_iso_xmit_sync
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb962253f	hpsb_protocol_class
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbba70620	dma_prog_region_free
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbbfbf477	hpsb_resume_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbd445c2b	hpsb_alloc_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc4dd3185	hpsb_unregister_protocol
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc68c0286	hpsb_selfid_complete
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd9e5c7df	hpsb_make_phypacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xdc7eabaa	hpsb_set_hostinfo_key
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe59993b1	hpsb_get_hostinfo_bykey
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xea4152ff	dma_region_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xeead1bde	hpsb_make_writepacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf6b5504a	hpsb_packet_success
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf94d7c4c	hpsb_bus_reset
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfab27536	csr1212_read
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfaef6c3f	hpsb_iso_recv_release_packets
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfba57f51	hpsb_speedto_str
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x1d5aeebc	ohci1394_init_iso_tasklet
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x8cbad2e1	ohci1394_unregister_iso_tasklet
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0xcb890d2d	ohci1394_register_iso_tasklet
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0xfb695ed0	ohci1394_stop_context
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x0949d407	rdma_translate_ip
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x3b4b538a	rdma_resolve_ip
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x8a721ed9	rdma_addr_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xa660ccc1	rdma_copy_addr
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xc91bb9d3	rdma_addr_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xff05e811	rdma_addr_cancel
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x0290e9e1	ib_send_cm_sidr_req
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x0a5c9ba1	ib_create_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x20164c84	ib_send_cm_rtu
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x313c823d	cm_class
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x3407432b	ib_send_cm_lap
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x47bf20ca	ib_send_cm_dreq
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x4b91cdb4	ib_cm_listen
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x50deba2b	ib_send_cm_sidr_rep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x5721510a	ib_send_cm_mra
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x7f59515e	ib_send_cm_rep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x86d58541	ib_cm_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x876d8232	ib_send_cm_apr
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x9da1ac39	ib_send_cm_drep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xa2583549	ib_send_cm_req
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xc4af2cb7	ib_send_cm_rej
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xe53b7d84	ib_cm_notify
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xedd53723	ib_destroy_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x075a99a1	ib_umem_get
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x07a2eac7	ib_find_cached_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0bfd4641	ib_create_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0ce3dcab	ib_fmr_pool_unmap
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0db0e47a	ib_get_cached_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x13f35410	ib_modify_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1bc4e651	ib_flush_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1c1a4141	ib_query_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1e491a04	ib_unmap_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x21c1d8ba	ib_alloc_fast_reg_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2223eb82	ib_register_event_handler
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x276202fa	ib_get_dma_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2cbffb09	ib_destroy_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x333f8b4b	ib_query_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3f7567fd	ib_rate_to_mult
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4140f6b9	ib_query_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x4995704f	ib_create_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x50f97de8	ib_init_ah_from_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x520b2638	ib_pack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x543d6b13	ib_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x57a4bbdb	ib_find_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x58d57dcf	ib_alloc_mw
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x595d508c	ib_create_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5c4caf2b	ib_fmr_pool_map_phys
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5daad22d	ib_alloc_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5f3142cb	ib_create_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x614cb7ae	ib_query_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x62f0ea1c	ib_get_cached_lmc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x66c04d59	ib_modify_port
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6892fd3c	ib_query_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6ab69b2b	ib_resize_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7115a27e	ib_modify_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x757348ad	ib_destroy_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x77c91267	ib_modify_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x79e5b623	ib_dereg_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7f003cf5	ib_alloc_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x81e8e117	ib_query_port
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x844aeeb1	ib_dealloc_pd
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8640eaeb	ib_modify_qp_is_ok
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x874ecd73	ib_dealloc_mw
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x87b614d8	ib_ud_header_pack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8844ea72	ib_detach_mcast
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8c6d1340	ib_get_client_data
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8c8093a7	ib_find_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8d233ae4	ib_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x93ca9656	ib_free_fast_reg_page_list
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x96ce6c46	rdma_node_get_transport
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9a584e0e	ib_destroy_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9d804fa1	mult_to_ib_rate
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa4463516	ib_find_cached_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa9fc070e	ib_attach_mcast
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb1a312e1	ib_unpack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb3030235	ib_query_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb37ae8c8	ib_unregister_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb9a551a2	ib_unregister_event_handler
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xba1bd02e	ib_modify_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xbacc5332	ib_create_ah_from_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc2e9f6a8	ib_umem_release
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc8d49617	ib_umem_page_count
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xcee3a1b2	ib_set_client_data
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd064365f	ib_alloc_fast_reg_page_list
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd17ba9d1	ib_ud_header_init
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd9f51415	ib_create_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xdf4dc510	ib_destroy_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe098b47d	ib_query_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe5b4cb7b	ib_destroy_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe93ff376	ib_get_cached_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf07fb4a1	ib_dispatch_event
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf10c73ef	ib_register_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf36498b9	ib_ud_header_unpack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf4cdc515	ib_alloc_pd
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf571718b	ib_reg_phys_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf6c25cdc	ib_rereg_phys_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xfc56cbd6	ib_dealloc_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xfddba6c7	ib_modify_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xfdf77e24	ib_dealloc_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x0fb88d05	ib_create_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x128b55f7	ib_get_rmpp_segment
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x33db0466	ib_post_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x3739ac65	ib_unregister_mad_agent
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x3da51504	ib_free_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x4400c351	ib_register_mad_snoop
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x56773353	ib_register_mad_agent
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x57c6a328	ib_cancel_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6ef787ed	ib_response_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6f077fcf	ib_get_mad_data_offset
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x7b5d4b7a	ib_is_mad_class_rmpp
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x9ce95031	ib_modify_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xb71edee8	ib_redirect_mad_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xf199c297	ib_free_recv_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xfbdc4dea	ib_process_mad_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x4cff5195	ib_sa_service_rec_query
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x576fdbac	ib_sa_free_multicast
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x66eadb66	ib_init_ah_from_mcmember
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x6baad75a	ib_sa_path_rec_get
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x7495c5a3	ib_init_ah_from_path
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x816f4b5b	ib_sa_get_mcmember_rec
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x9c56fd34	ib_sa_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xc4ef6aef	ib_sa_join_multicast
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xda7fc486	ib_sa_cancel_query
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xf520d09e	ib_sa_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x02f847bc	ib_copy_path_rec_from_user
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x07cf5a51	ib_copy_ah_attr_to_user
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x18382f6a	ib_copy_path_rec_to_user
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x184f3575	ib_copy_qp_attr_to_user
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x1a12861f	iw_cm_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x40f0a793	iw_destroy_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x6fe2419c	iw_cm_connect
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x9a593a90	iw_cm_reject
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xa878beec	iw_cm_disconnect
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xa882ea7f	iw_cm_accept
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xbcd1ce4c	iw_cm_listen
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xea30e406	iw_create_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x02856b35	rdma_create_qp
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x1869fc60	rdma_bind_addr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x317395b6	rdma_join_multicast
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x40b6753d	rdma_listen
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x4510706d	rdma_resolve_route
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x53caafd9	rdma_resolve_addr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x5c067850	rdma_accept
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x698a0957	rdma_reject
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x729c3881	rdma_create_id
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x78bde837	rdma_leave_multicast
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x88d61b2f	rdma_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x9115bd81	rdma_notify
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xa3a6849f	rdma_set_service_type
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xcf049ba7	rdma_connect
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xd0d44017	rdma_destroy_id
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xd8306371	rdma_disconnect
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xe6dd34c2	rdma_set_ib_paths
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xea221470	rdma_destroy_qp
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x3417ebe9	gameport_unregister_driver
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x3c26cc4e	gameport_unregister_port
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x4896f397	__gameport_register_port
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x49133f46	gameport_open
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x5cb7f38d	gameport_stop_polling
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x7f5e7242	gameport_start_polling
+EXPORT_SYMBOL drivers/input/gameport/gameport 0xe0b81f18	gameport_set_phys
+EXPORT_SYMBOL drivers/input/gameport/gameport 0xe51f0312	gameport_close
+EXPORT_SYMBOL drivers/input/gameport/gameport 0xfa987099	__gameport_register_driver
+EXPORT_SYMBOL drivers/input/input-polldev 0x2026705f	input_unregister_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0x85460b00	input_allocate_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0x8fe5a871	input_register_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0xc75b3311	input_free_polled_device
+EXPORT_SYMBOL drivers/isdn/capi/capifs 0x2c54c957	capifs_free_ncci
+EXPORT_SYMBOL drivers/isdn/capi/capifs 0xd0bc06ce	capifs_new_ncci
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x04403fcf	unregister_capi_driver
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x0b88e160	capi_ctr_ready
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x14f2aa5a	capi20_get_version
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2b8eab1f	capilib_free_ncci
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2baa6586	capilib_new_ncci
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2e946b45	attach_capi_ctr
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x31c24aa4	capi20_isinstalled
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x47d3fc51	capi_info2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x50b33ca4	capi_cmsg2message
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x6057c6f3	capi_message2cmsg
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x629b2ea1	capi_ctr_suspend_output
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x62dcc1c4	capi20_set_callback
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x62e32d43	capilib_data_b3_conf
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x71e8d5ba	capilib_data_b3_req
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7a33596c	capi20_get_serial
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7e6f1307	capi20_get_manufacturer
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x88458443	capi_ctr_down
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x8f699913	capilib_release
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x9f823278	register_capi_driver
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xa1740fb1	capi20_put_message
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xa3d1242e	capi20_register
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xa7c4fd6c	capi_message2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xa8dbd7e8	capi_ctr_resume_output
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xaa165d27	capilib_release_appl
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb19fda8d	capi_cmd2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb1ae0b8b	capi_ctr_handle_message
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb60e5e5f	capi_cmsg_header
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xc10fe128	cdebbuf_free
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xc4f80d45	detach_capi_ctr
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe19a11ac	capi20_get_profile
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe8ad9bd1	capi_cmsg2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xed061606	capi20_manufacturer
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xf4ad52dd	capi20_release
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x1514590a	b1_alloc_card
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x18cdbbdb	b1_free_card
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x36b188d8	b1_interrupt
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x40e890d0	b1_send_message
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x85f09690	b1_irq_table
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x8e7fc416	b1_release_appl
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x9928ca97	b1_load_config
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0x9b147bb3	b1_load_t4file
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xa07d3870	b1_parse_version
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xb01d1548	b1_load_firmware
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xd8eddd43	b1_loaded
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xdfd28376	b1_detect
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xe5d122b8	avmcard_dma_alloc
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xe6b79578	b1_register_appl
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xe8ca067a	avmcard_dma_free
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xf3530370	b1_getrevision
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xf4a933cd	b1_reset_ctr
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1 0xf9558a43	b1ctl_read_proc
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x1d1f5ce9	b1dma_reset
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x233ca0dc	b1dma_interrupt
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0x990da982	b1dmactl_read_proc
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xc0cdf6b4	t1pci_detect
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xc1ba04e9	b1pciv4_detect
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xcda2d2b3	b1dma_reset_ctr
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xd816fb31	b1dma_release_appl
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xd993e812	b1dma_register_appl
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xe2e180c1	b1dma_send_message
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1dma 0xe59f291c	b1dma_load_firmware
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0x29562993	b1pcmcia_delcard
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xaec3240e	b1pcmcia_addcard_m1
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xea620116	b1pcmcia_addcard_m2
+EXPORT_SYMBOL drivers/isdn/hardware/avm/b1pcmcia 0xf14bf8b1	b1pcmcia_addcard_b1
+EXPORT_SYMBOL drivers/isdn/hardware/eicon/divadidd 0x2974ead1	DIVA_DIDD_Read
+EXPORT_SYMBOL drivers/isdn/hardware/eicon/divadidd 0x2b6870c9	proc_net_eicon
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNipac 0x55d5bec2	mISDNisac_irq
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNipac 0x56cda6b2	mISDNipac_init
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNipac 0x5adbce5b	mISDNipac_irq
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNipac 0xece40e19	mISDNisac_init
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNisar 0xbdac6fe2	mISDNisar_irq
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNisar 0xdb97e118	mISDNisar_init
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x07f4f2ce	hisax_unregister
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x148f0c99	FsmFree
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x2844a899	FsmInitTimer
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x93a64734	FsmChangeState
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0x9df0cd27	FsmEvent
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xc0c558f9	FsmRestartTimer
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xc8455b20	hisax_init_pcmcia
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xd94696e8	FsmDelTimer
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xee93522c	hisax_register
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xf0a16657	FsmNew
+EXPORT_SYMBOL drivers/isdn/hisax/hisax 0xfc27303b	HiSax_closecard
+EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x3f3b323a	isac_d_l2l1
+EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x4ea66884	isac_irq
+EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0x6365a098	isacsx_irq
+EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0xad08f10d	isacsx_setup
+EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0xb01f34bb	isac_init
+EXPORT_SYMBOL drivers/isdn/hisax/hisax_isac 0xdec0cb11	isac_setup
+EXPORT_SYMBOL drivers/isdn/i4l/isdn 0x47ec023a	isdn_ppp_register_compressor
+EXPORT_SYMBOL drivers/isdn/i4l/isdn 0xa20709e2	isdn_ppp_unregister_compressor
+EXPORT_SYMBOL drivers/isdn/i4l/isdn 0xd680ffeb	register_isdn
+EXPORT_SYMBOL drivers/isdn/i4l/isdn 0xfa06820f	isdn_register_divert
+EXPORT_SYMBOL drivers/isdn/i4l/isdnhdlc 0x3b71e4fc	isdnhdlc_decode
+EXPORT_SYMBOL drivers/isdn/i4l/isdnhdlc 0x59cc8a7e	isdnhdlc_out_init
+EXPORT_SYMBOL drivers/isdn/i4l/isdnhdlc 0x8ee38862	isdnhdlc_rcv_init
+EXPORT_SYMBOL drivers/isdn/i4l/isdnhdlc 0xfd9d4c09	isdnhdlc_encode
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x11195b28	l1_event
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x11bd6a1c	mISDN_freedchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x13b511ce	recv_Dchannel_skb
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x21af3c8b	mISDN_register_Bprotocol
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x2348cc3c	mISDN_FsmFree
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x301d6304	mISDN_unregister_Bprotocol
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x31b0d2f2	mISDN_clear_bchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x342e06c2	mISDN_initbchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3ea336fd	mISDN_FsmAddTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x429129f2	mISDN_FsmRestartTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x50c2230c	mISDN_FsmChangeState
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x54d18475	mISDN_unregister_device
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x5a5bc938	queue_ch_frame
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x5dc7400a	mISDN_clock_update
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x65a1b93c	recv_Echannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x660aba9f	mISDN_initdchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x8d68763f	mISDN_register_device
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x8d8177ff	bchannel_senddata
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xa37ad22a	recv_Dchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xace35cae	mISDN_FsmDelTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xafac4e52	recv_Bchannel_skb
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xb57102c4	mISDN_freebchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xb6329cbf	create_l1
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xba6d7411	recv_Bchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc3401729	mISDN_register_clock
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xca9d7cc0	confirm_Bsend
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd0d56f54	dchannel_senddata
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd285995f	mISDN_clock_get
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd50d0887	get_next_bframe
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd5145151	mISDN_FsmEvent
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd9a7fbfd	mISDN_FsmInitTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe2c34c49	get_next_dframe
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe8f617eb	mISDN_unregister_clock
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf9e7832f	mISDN_FsmNew
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0x01087af0	mISDN_dsp_element_unregister
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0x60721da7	dsp_audio_law_to_s32
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0xa215f1b2	dsp_audio_s16_to_law
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_dsp 0xb98308d8	mISDN_dsp_element_register
+EXPORT_SYMBOL drivers/md/raid6_pq 0x0bd662f6	raid6_gfmul
+EXPORT_SYMBOL drivers/md/raid6_pq 0x15fe0cd3	raid6_gfexp
+EXPORT_SYMBOL drivers/md/raid6_pq 0x5ba93f9d	raid6_gfinv
+EXPORT_SYMBOL drivers/md/raid6_pq 0xb0d904b7	raid6_empty_zero_page
+EXPORT_SYMBOL drivers/md/raid6_pq 0xce45a6f1	raid6_gfexi
+EXPORT_SYMBOL drivers/media/common/tuners/mc44s803 0xb63f7477	mc44s803_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mt2060 0x52366c45	mt2060_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mt2131 0x49be01a5	mt2131_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mt2266 0x24083496	mt2266_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mxl5005s 0x6595997a	mxl5005s_attach
+EXPORT_SYMBOL drivers/media/common/tuners/qt1010 0x6d29de7f	qt1010_attach
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0x0cb4b189	tuners
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0xc2821775	tuner_count
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-xc2028 0x137f6a6a	xc2028_attach
+EXPORT_SYMBOL drivers/media/common/tuners/xc5000 0x08fb0f90	xc5000_attach
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x08466cc0	flexcop_dma_allocate
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x18cbd02a	flexcop_wan_set_speed
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x197135ae	flexcop_pid_feed_control
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x28a86b82	flexcop_dma_control_size_irq
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x770543c0	flexcop_pass_dmx_packets
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x78db1c49	flexcop_device_exit
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x8ceee662	flexcop_dma_config
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x8da6ae69	flexcop_device_kfree
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x96b4e6f0	flexcop_dma_xfer_control
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xa87ebd4f	flexcop_i2c_request
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xc6f5c6a1	flexcop_device_kmalloc
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xc7e44818	flexcop_dump_reg
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xc8b06b9e	flexcop_sram_set_dest
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xd1dc2e2b	flexcop_dma_free
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xd8a53de4	flexcop_eeprom_check_mac_addr
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xde7a2dc2	flexcop_device_initialize
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xe52cc3b0	flexcop_dma_config_timer
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xecdcdd07	flexcop_sram_ctrl
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xf5c10593	flexcop_pass_dmx_data
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xf856a9ad	flexcop_dma_control_timer_irq
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x0059292e	bt878_device_control
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x7586173e	bt878
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x7cced371	bt878_start
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xd5d0bdef	bt878_num
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xe590c605	bt878_stop
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x3c476c53	dst_attach
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x578bf1a3	dst_pio_disable
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x61b3444b	dst_error_recovery
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x88b23ab1	dst_wait_dst_ready
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xa15d0dfa	write_dst
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xb77a8574	rdc_reset_state
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xbfd17ab2	dst_error_bailout
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xd30ba553	read_dst
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xdc1eb4c8	dst_comm_init
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xe94b8c9c	dst_check_sum
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst_ca 0x8422a4d2	dst_ca_attach
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x08b4f9a7	dvb_frontend_detach
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0c4d4a14	dvb_frontend_sleep_until
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0e957a31	dvb_ca_en50221_camchange_irq
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x1163a4b6	dvb_dmx_swfilter
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x14eb630c	dvb_ringbuffer_free
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x1c2b225d	dvb_generic_open
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x1d593152	dvb_register_frontend
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x1d63375b	dvb_dmxdev_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x21d3d26d	dvb_net_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x2ae6f39e	dvb_ca_en50221_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x420949e2	dvb_frontend_reinitialise
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x4626cdd0	dvb_unregister_device
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x4a0d08b1	dvb_ca_en50221_camready_irq
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6f7f7d73	dvb_ringbuffer_empty
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6f9c72e3	dvb_ringbuffer_read
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x74a5a698	dvb_filter_pes2ts_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x781aaccd	dvb_register_device
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x7da58df4	dvb_generic_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x80e3832d	dvb_filter_get_ac3info
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x878bfc2e	dvb_ca_en50221_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x886c3a1b	dvb_dmx_swfilter_packets
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x912dcc75	dvb_dmxdev_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x923aa88e	dvb_ringbuffer_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xa2b182d3	dvb_unregister_frontend
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xa316b4a8	dvb_dmx_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xac4ca1b0	intlog2
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb2db2592	dvb_ringbuffer_write
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb5b95805	dvb_ringbuffer_read_user
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xbc0d91e1	timeval_usec_diff
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xcc098acf	dvb_dmx_swfilter_204
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xd5c76d90	dvb_net_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xdaa37526	dvb_register_adapter
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xddcc7d91	dvb_dmx_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xdf2fab84	dvb_generic_ioctl
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe252e3ce	dvb_ca_en50221_frda_irq
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe4cb3ac2	dvb_unregister_adapter
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe5ae8707	intlog10
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe7949e59	dvb_ringbuffer_flush_spinlock_wakeup
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xeb7daf80	dvb_ringbuffer_avail
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf826deb0	dvb_filter_pes2ts
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x0397176c	dvb_usb_get_hexline
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x2ff34fc0	dvb_usb_generic_write
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x4654760b	dvb_usb_nec_rc_key_to_event
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x5cc314cb	usb_cypress_load_firmware
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x9491435b	dvb_usb_generic_rw
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xdcbb80ad	dvb_usb_device_exit
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xf8c48720	dvb_usb_device_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x3693500b	af9005_rc_keys
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x4888c89c	af9005_rc_decode
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0xd3383957	af9005_rc_keys_size
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x0905e521	dibusb_i2c_algo
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x12a1baa4	dibusb_pid_filter_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x2dac55c8	dibusb_power_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x43574e2d	dibusb2_0_power_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x5968d712	dibusb_pid_filter
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x6edf7f18	dibusb_dib3000mc_frontend_attach
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x85ab871f	dibusb_streaming_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xa068c536	dibusb2_0_streaming_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xa4d8754c	dibusb_dib3000mc_tuner_attach
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xa7dd91d0	dibusb_read_eeprom_byte
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xcc9ccaff	dibusb_rc_keys
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xf3554c7e	dibusb_rc_query
+EXPORT_SYMBOL drivers/media/dvb/frontends/af9013 0x1e3be177	af9013_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/au8522 0xddba714a	au8522_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/bcm3510 0xb57bdc0f	bcm3510_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx22700 0x038c7984	cx22700_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx22702 0xcd1ca2c0	cx22702_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24110 0xf13dab4b	cx24110_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0x847ea583	cx24113_agc_callback
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0xec3b9030	cx24113_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24116 0x2e30587a	cx24116_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0x4d91a255	cx24123_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0xa3793ced	cx24123_get_tuner_i2c_adapter
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0x4d64fd6d	dib0070_ctrl_agc_filter
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0xd21c8b71	dib0070_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0xd6ec61b1	dib0070_wbd_offset
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mb 0xa5c2f700	dib3000mb_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x00b603ec	dib3000mc_pid_control
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x44a57335	dib3000mc_i2c_enumeration
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x5232534f	dib3000mc_get_tuner_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x595329cb	dib3000mc_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xb76a5d80	dib3000mc_set_config
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xe89513f3	dib3000mc_pid_parse
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0x69fe0046	dib7000m_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0xb0f52208	dib7000m_get_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x0337ae5f	dib7000p_set_wbd_ref
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x2e6286d0	dib7000pc_detection
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x469aef68	dib7000p_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xbea74016	dib7000p_i2c_enumeration
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xead67c90	dib7000p_get_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xf829c75a	dib7000p_set_gpio
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x03f0c85c	dib8000_i2c_enumeration
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x11640816	dib8000_set_gpio
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x13195b11	dib8000_set_wbd_ref
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x5c60e55f	dib8000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x8342b3be	dib8000_get_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x0499d3f4	dibx000_reset_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x243fc2c0	dibx000_init_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x44385b54	dibx000_get_i2c_adapter
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x5e427015	dibx000_exit_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dvb-pll 0xdf71d2c2	dvb_pll_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/isl6405 0x28fcd30b	isl6405_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/isl6421 0xa1e57f68	isl6421_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/isl6423 0x159225ee	isl6423_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/itd1000 0x4685207a	itd1000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/l64781 0x134e1df1	l64781_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt3305 0xa5243496	lgdt3305_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt330x 0xeb1b5424	lgdt330x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lgs8gxx 0x1c1ede37	lgs8gxx_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0xed772d31	lnbh24_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0xffc5f2e0	lnbp21_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/mt312 0xfa049e8d	mt312_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/mt352 0x62fc4b72	mt352_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/nxt200x 0xc51a5344	nxt200x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/nxt6000 0x4ca4334e	nxt6000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/or51132 0xd553f805	or51132_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/or51211 0x61ea3f10	or51211_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1409 0xabea8f4d	s5h1409_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1411 0x435b1800	s5h1411_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0x05d29bf2	s5h1420_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0x70e0c550	s5h1420_get_tuner_i2c_adapter
+EXPORT_SYMBOL drivers/media/dvb/frontends/si21xx 0xc3c00f6b	si21xx_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/sp8870 0x07db6893	sp8870_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/sp887x 0x93e74b21	sp887x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stb0899 0x2a436147	stb0899_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stb6000 0x5c68d9f7	stb6000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stb6100 0xce5d7dfd	stb6100_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0288 0x6af31559	stv0288_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0297 0xf122466f	stv0297_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0299 0x77be7362	stv0299_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0900 0x41a4ee2c	stv0900_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv090x 0xb60833f8	stv090x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv6110 0xa0a99556	stv6110_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv6110x 0xa22238f7	stv6110x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10021 0xfc6541a5	tda10021_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10023 0xa92e6ebc	tda10023_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10048 0xa124f9fe	tda10048_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x2d09059b	tda10045_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x4c6df191	tda10046_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10086 0xa809b8cf	tda10086_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda8083 0x2c4a70b1	tda8083_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda8261 0xd9a7dd2c	tda8261_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda826x 0x4c5f8be7	tda826x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tua6100 0x8764fa89	tua6100_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/ves1820 0x4cb9e8a5	ves1820_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/ves1x93 0xd0b6ba36	ves1x93_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/zl10036 0x926ad995	zl10036_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/zl10039 0x65ed58b9	zl10039_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/zl10353 0xeb6e5856	zl10353_attach
+EXPORT_SYMBOL drivers/media/dvb/ttpci/ttpci-eeprom 0x3242b419	ttpci_eeprom_parse_mac
+EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0x5cda3356	ttusbdecfe_dvbt_attach
+EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0x771d329c	ttusbdecfe_dvbs_attach
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x11dc4b6d	bttv_gpio_enable
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x37d11264	bttv_sub_unregister
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x8ecf4acc	bttv_write_gpio
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x9cd6f47e	bttv_sub_register
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xbcf2d2fb	bttv_read_gpio
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xddfaad39	bttv_get_pcidev
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0x23261138	btcx_riscmem_free
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0x41ef689d	btcx_riscmem_alloc
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0x495e4b0c	btcx_calc_skips
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xad2fe38b	btcx_sort_clips
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xc368f8e6	btcx_align
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xcda0ded2	btcx_screen_clips
+EXPORT_SYMBOL drivers/media/video/cpia 0x6dda8d8e	cpia_register_camera
+EXPORT_SYMBOL drivers/media/video/cpia 0xaa91920d	cpia_unregister_camera
+EXPORT_SYMBOL drivers/media/video/cx18/cx18 0x2cdea06d	cx18_reset_ir_gpio
+EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0x5e6a2d24	cx231xx_register_extension
+EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0xf73d961a	cx231xx_unregister_extension
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x155650f3	cx2341x_ctrl_get_menu
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x1ca0c084	cx2341x_log_status
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x2f25eee2	cx2341x_update
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x5b88faf6	cx2341x_ext_ctrls
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf76ce95	cx2341x_fill_defaults
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf8b77a4	cx2341x_mpeg_ctrls
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xe2c2b5eb	cx2341x_ctrl_query
+EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0x1d12a1af	vp3054_i2c_remove
+EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0xcc42e8bf	vp3054_i2c_probe
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x4dda916f	cx88_enum_input
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x539f6f64	cx88_set_freq
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x6842cb3e	cx88_video_mux
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x74391c5e	cx88_get_control
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x8a743a17	cx8800_ctrl_query
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xac4e53b9	cx88_user_ctrls
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xe3d5a8bb	cx88_set_control
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x023a9ab8	cx8802_cancel_buffers
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x1b8963c4	cx8802_get_device
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x75592b2b	cx8802_register_driver
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x94e9e29b	cx8802_buf_queue
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x966416cf	cx8802_buf_prepare
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xbcb16a97	cx8802_unregister_driver
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xf90d65c6	cx8802_get_driver
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x10779289	cx88_wakeup
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x11cabf2f	cx88_set_tvaudio
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x1a7e304d	cx88_set_scale
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x1c1fed9f	cx88_newstation
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x25e91aaa	cx88_free_buffer
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x31db7981	cx88_reset
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x50fdaf0b	cx88_core_get
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x591fcfca	cx88_set_tvnorm
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x5e314d8e	cx88_dsp_detect_stereo_sap
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x6141c8c5	cx88_tuner_callback
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x71b493aa	cx88_core_irq
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x82bd4672	cx88_set_stereo
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x8722cd89	cx88_get_stereo
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x8bdaf1a8	cx88_ir_stop
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x904b8696	cx88_audio_thread
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x90a390cb	cx88_risc_stopper
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x9287bca3	cx88_risc_buffer
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x9a043621	cx88_shutdown
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x9b140fff	cx88_sram_channels
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xa1209448	cx88_risc_databuffer
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb081bc6d	cx88_sram_channel_setup
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb47f6cda	cx88_print_irqbits
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xc0a00e51	cx88_ir_start
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xc82dce26	cx88_core_put
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xdda51300	cx88_sram_channel_dump
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xede3fa90	cx88_vdev_init
+EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0xcbb06213	em28xx_register_extension
+EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0xd007a192	em28xx_unregister_extension
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x2669c7fa	gspca_suspend
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x2f6ce6be	gspca_get_i_frame
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x9670af2c	gspca_debug
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x9d9a397d	gspca_dev_probe
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xbd3521b0	gspca_frame_add
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xbf83f5c6	gspca_auto_gain_n_exposure
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xd6bf271f	gspca_resume
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0xec79faeb	gspca_disconnect
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x01871b0a	ivtv_clear_irq_mask
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x0f1f35b2	ivtv_vapi_result
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x14f67530	ivtv_debug
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x1519bb24	ivtv_init_on_first_open
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x225fa5ff	ivtv_udma_alloc
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x3554bded	ivtv_udma_unmap
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x4a10d267	ivtv_vapi
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x63a11e59	ivtv_set_irq_mask
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x9ea665b7	ivtv_api
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xaea73536	ivtv_reset_ir_gpio
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xc88c09c7	ivtv_udma_prepare
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xd8a5080f	ivtv_udma_setup
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x04e83446	saa7134_tuner_callback
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x1211df5d	saa7134_devlist
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x14dfecc6	saa7134_boards
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x172f2acb	saa7134_devlist_lock
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x39b91f42	saa_dsp_writel
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x448fced8	saa7134_tvaudio_setmute
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x451027cd	saa7134_dmasound_init
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x4618e553	saa7134_pgtable_alloc
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x78335d0d	saa7134_set_gpio
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x9829d9bd	saa7134_ts_unregister
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xbd340edc	saa7134_ts_register
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xcd5f4d5c	saa7134_pgtable_build
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xe3a3f017	saa7134_set_dmabits
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xe6e86da2	saa7134_pgtable_free
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xe7ebd1d3	saa7134_dmasound_exit
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x01494c27	soc_camera_format_by_fourcc
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x845478df	soc_camera_host_unregister
+EXPORT_SYMBOL drivers/media/video/soc_camera 0xd4125c20	soc_camera_apply_sensor_flags
+EXPORT_SYMBOL drivers/media/video/soc_camera 0xdf380613	soc_camera_host_register
+EXPORT_SYMBOL drivers/media/video/soc_camera 0xf02d9a29	soc_camera_xlate_by_fourcc
+EXPORT_SYMBOL drivers/media/video/tveeprom 0x29579111	tveeprom_read
+EXPORT_SYMBOL drivers/media/video/tveeprom 0x7a019d96	tveeprom_hauppauge_analog
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x006b7a4b	usbvideo_RegisterVideoDevice
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x040b2759	usbvideo_DeinterlaceFrame
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x16a2915c	RingQueue_Dequeue
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x407a321c	RingQueue_WakeUpInterruptible
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x4ab586c5	usbvideo_register
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x5f0811db	usbvideo_AllocateDevice
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xd761e467	usbvideo_TestPattern
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xddecac6d	RingQueue_Enqueue
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xf5011f67	RingQueue_Flush
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xf68d5249	usbvideo_Deregister
+EXPORT_SYMBOL drivers/media/video/v4l1-compat 0xa2f0d2bf	v4l_compat_translate_ioctl
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x03165a85	v4l2_ctrl_get_menu
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1dcaa0c8	v4l2_prio_max
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1e326b97	v4l2_ctrl_query_fill
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x2f639468	v4l2_prio_check
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x42c8e001	v4l2_ctrl_next
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x495426ee	v4l2_ctrl_get_name
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x4ed5e0d7	v4l2_chip_match_host
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x50766d69	v4l2_ctrl_query_menu_valid_items
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x5e710d0f	v4l2_chip_match_i2c_client
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x76ba9a9a	v4l2_prio_open
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x95284709	v4l2_prio_close
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9c7de443	v4l2_prio_change
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9eb43ee2	v4l2_ctrl_check
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0xbecd2858	v4l2_prio_init
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0xd9ee1e3f	v4l2_ctrl_query_menu
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0xf576b13d	v4l2_chip_ident_i2c_client
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x0fba0e13	videobuf_dvb_get_frontend
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x70332c9c	videobuf_dvb_unregister_bus
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x97875889	videobuf_dvb_alloc_frontend
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xa6fc95de	videobuf_dvb_register_bus
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xa7bd91d4	videobuf_dvb_find_frontend
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xdb5ceda6	videobuf_dvb_dealloc_frontends
+EXPORT_SYMBOL drivers/media/video/videodev 0x0614dd5a	v4l2_video_std_frame_period
+EXPORT_SYMBOL drivers/media/video/videodev 0x123959a1	v4l2_type_names
+EXPORT_SYMBOL drivers/media/video/videodev 0x1d687ec7	video_device_alloc
+EXPORT_SYMBOL drivers/media/video/videodev 0x2d2594b2	video_unregister_device
+EXPORT_SYMBOL drivers/media/video/videodev 0x3adbd595	v4l2_field_names
+EXPORT_SYMBOL drivers/media/video/videodev 0x3b2bd9f6	video_register_device_no_warn
+EXPORT_SYMBOL drivers/media/video/videodev 0x484d1764	video_device_release_empty
+EXPORT_SYMBOL drivers/media/video/videodev 0x5ebefe4b	v4l_printk_ioctl
+EXPORT_SYMBOL drivers/media/video/videodev 0x61ebc583	video_device_release
+EXPORT_SYMBOL drivers/media/video/videodev 0x6adafbb5	video_devdata
+EXPORT_SYMBOL drivers/media/video/videodev 0x777d0367	video_register_device
+EXPORT_SYMBOL drivers/media/video/videodev 0xa9f8429c	video_ioctl2
+EXPORT_SYMBOL drivers/media/video/videodev 0xe2b92059	v4l2_video_std_construct
+EXPORT_SYMBOL drivers/media/video/videodev 0xf3251e7b	v4l2_norm_to_name
+EXPORT_SYMBOL drivers/media/video/videodev 0xf7249d06	video_usercopy
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x7e11e12e	videocodec_register
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0xcc8b396d	videocodec_unregister
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0xcebadbd3	videocodec_detach
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0xecac1f82	videocodec_attach
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x1d71e567	memstick_register_driver
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x208f5fc9	memstick_suspend_host
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x25999ee2	memstick_new_req
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x2d1ef899	memstick_set_rw_addr
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x35fd4dc9	memstick_next_req
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x5b5c17c8	memstick_init_req_sg
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x6bd986e5	memstick_remove_host
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x8c9b5da4	memstick_init_req
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xadd9d406	memstick_resume_host
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xae651b21	memstick_unregister_driver
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xbb4d73f9	memstick_free_host
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xc93d7940	memstick_alloc_host
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xca1af924	memstick_detect_change
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xec42ef05	memstick_add_host
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x00c9f03a	mpt_raid_phys_disk_get_num_paths
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x0c8566e3	mpt_get_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x0d105399	mpt_free_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x0e1d37f9	mpt_GetIocState
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x0e66d4dd	mpt_send_handshake_request
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x32e4d765	mpt_device_driver_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x383115a8	mpt_attach
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x3bbfd089	mpt_free_fw_memory
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x44c4c6ab	mpt_put_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4526289b	mpt_event_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x502108d0	mpt_fwfault_debug
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x578459c0	mpt_alloc_fw_memory
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x57b4bde1	mpt_reset_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x607d6527	mpt_verify_adapter
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x778d2798	mptbase_sas_persist_operation
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x7fde3fba	mpt_clear_taskmgmt_in_progress_flag
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x8361b6e3	mpt_findImVolumes
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x90f880ec	mpt_halt_firmware
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x947d0f6e	mpt_print_ioc_summary
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x962f4074	mpt_HardResetHandler
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x97eb1eb6	mpt_config
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x9949058c	mpt_raid_phys_disk_pg0
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x9c9e3f78	mpt_suspend
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xa527fbee	mpt_detach
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xad4aa092	mpt_event_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc0e69f82	mpt_device_driver_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc47c22e8	mpt_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc5766a14	mpt_raid_phys_disk_pg1
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd8c3cdda	mpt_resume
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd9a92a75	mpt_reset_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xdd805159	ioc_list
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xdef8b0f2	mpt_set_taskmgmt_in_progress_flag
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xe7a5ba79	mpt_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xfe06dd7a	mpt_put_msg_frame_hi_pri
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x04edab13	mptscsih_abort
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x0f794aef	mptscsih_host_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x0fa55cca	mptscsih_proc_info
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x107ed5c2	mptscsih_host_attrs
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x2308d7a8	mptscsih_suspend
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x35f462f7	mptscsih_raid_id_to_num
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x370b69c2	mptscsih_io_done
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x3d8d6869	mptscsih_info
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x48cbc36a	mptscsih_get_scsi_lookup
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x50438faf	mptscsih_dev_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x56c0b894	mptscsih_taskmgmt_response_code
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x5a5de459	mptscsih_bios_param
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x5be42d51	mptscsih_resume
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x5bfb65dd	mptscsih_slave_configure
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x7a042bf0	mptscsih_shutdown
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x81779536	mptscsih_qcmd
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x83b47268	mptscsih_IssueTaskMgmt
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x8675741a	mptscsih_scandv_complete
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x99170e75	mptscsih_change_queue_depth
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xa6da45ff	mptscsih_is_phys_disk
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xb00cb5c4	mptscsih_remove
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xb2ca1f2a	mptscsih_slave_destroy
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xb903eb51	mptscsih_bus_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xddb09f3f	mptscsih_ioc_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xf7c9b9c2	mptscsih_event_process
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xfea0b658	mptscsih_taskmgmt_complete
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x028fbd56	i2o_msg_get_wait
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x0c439042	i2o_device_claim_release
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x0ca441d8	i2o_driver_notify_controller_remove_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x1547be22	i2o_status_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x25fda221	i2o_parm_table_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x27f1ec69	i2o_exec_lct_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2a843bef	i2o_dump_message
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x66e335e2	i2o_iop_find_device
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x85e510f7	i2o_event_register
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x8c6b61aa	i2o_msg_post_wait_mem
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x9abf620f	i2o_driver_register
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xa444e83f	i2o_driver_notify_device_remove_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xa742433c	i2o_driver_notify_controller_add_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb4c00dcf	i2o_controllers
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb823c5d2	i2o_find_iop
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xceda7ec3	i2o_driver_notify_device_add_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xd404c6a8	i2o_parm_field_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xd5e495d3	i2o_driver_unregister
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xe6574f27	i2o_parm_issue
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xf31ccf9c	i2o_device_claim
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x3a446800	ab3100_set_register_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x3e4e5023	ab3100_get_chip_type
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x52fc64c0	ab3100_get_register_page_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x5f787e22	ab3100_event_unregister
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x61722ecb	ab3100_event_register
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x9d290466	ab3100_mask_and_set_register_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xa1620831	ab3100_get_register_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xf96f2cae	ab3100_event_registers_startup_state_get
+EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x7a5af6e0	pasic3_read_register
+EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x9595f403	pasic3_write_register
+EXPORT_SYMBOL drivers/mfd/mfd-core 0x7d99472e	mfd_add_devices
+EXPORT_SYMBOL drivers/mfd/mfd-core 0x80914636	mfd_remove_devices
+EXPORT_SYMBOL drivers/mfd/tps65010 0x02d4ad0f	tps65013_set_low_pwr
+EXPORT_SYMBOL drivers/mfd/tps65010 0x28485130	tps65010_config_vregs1
+EXPORT_SYMBOL drivers/mfd/tps65010 0x33739de7	tps65010_set_vib
+EXPORT_SYMBOL drivers/mfd/tps65010 0x9fd44c69	tps65010_set_led
+EXPORT_SYMBOL drivers/mfd/tps65010 0xb14080cc	tps65010_set_low_pwr
+EXPORT_SYMBOL drivers/mfd/tps65010 0xd5bb106d	tps65010_set_vbus_draw
+EXPORT_SYMBOL drivers/mfd/tps65010 0xe99b3f36	tps65010_set_gpio_out_value
+EXPORT_SYMBOL drivers/misc/c2port/core 0x20371b0b	c2port_device_unregister
+EXPORT_SYMBOL drivers/misc/c2port/core 0x4d44fc2d	c2port_device_register
+EXPORT_SYMBOL drivers/misc/ioc4 0x90766f6d	ioc4_unregister_submodule
+EXPORT_SYMBOL drivers/misc/ioc4 0xa033c72e	ioc4_register_submodule
+EXPORT_SYMBOL drivers/misc/tifm_core 0x026bf296	tifm_unregister_driver
+EXPORT_SYMBOL drivers/misc/tifm_core 0x17d421ca	tifm_queue_work
+EXPORT_SYMBOL drivers/misc/tifm_core 0x4a0aacd2	tifm_eject
+EXPORT_SYMBOL drivers/misc/tifm_core 0x4e4397c0	tifm_has_ms_pif
+EXPORT_SYMBOL drivers/misc/tifm_core 0x54d1eb87	tifm_free_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0x5f9ab970	tifm_add_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0x8bb9ceab	tifm_register_driver
+EXPORT_SYMBOL drivers/misc/tifm_core 0xa08947d6	tifm_remove_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0xaef175e7	tifm_map_sg
+EXPORT_SYMBOL drivers/misc/tifm_core 0xbc4aba30	tifm_alloc_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0xbdc0630a	tifm_alloc_device
+EXPORT_SYMBOL drivers/misc/tifm_core 0xeec23b69	tifm_unmap_sg
+EXPORT_SYMBOL drivers/misc/tifm_core 0xfac9875d	tifm_free_device
+EXPORT_SYMBOL drivers/mmc/card/mmc_block 0x8bc97488	mmc_cleanup_queue
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x70495d78	cfi_fixup
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0xc37f68f5	cfi_varsize_frob
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0xd8022d67	cfi_read_pri
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x417dd822	do_map_probe
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x7a2c7d38	map_destroy
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x7aed2d12	register_mtd_chip_driver
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x7d67f82a	unregister_mtd_chip_driver
+EXPORT_SYMBOL drivers/mtd/chips/gen_probe 0xce33ee23	mtd_do_chip_probe
+EXPORT_SYMBOL drivers/mtd/lpddr/lpddr_cmds 0x385cdaab	lpddr_cmdset
+EXPORT_SYMBOL drivers/mtd/maps/map_funcs 0x69305298	simple_map_init
+EXPORT_SYMBOL drivers/mtd/mtd 0x9a6c7bad	del_mtd_partitions
+EXPORT_SYMBOL drivers/mtd/mtd 0xebbdc6e9	add_mtd_partitions
+EXPORT_SYMBOL drivers/mtd/mtdconcat 0x73685395	mtd_concat_create
+EXPORT_SYMBOL drivers/mtd/mtdconcat 0xcfacc0c6	mtd_concat_destroy
+EXPORT_SYMBOL drivers/mtd/nand/nand 0x6a6877de	nand_scan_bbt
+EXPORT_SYMBOL drivers/mtd/nand/nand 0x782bddb5	nand_default_bbt
+EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0xaea16757	nand_correct_data
+EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0xb4b94377	__nand_correct_data
+EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0xd6d0fd3a	nand_calculate_ecc
+EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0x836bdb72	nand_flash_ids
+EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0xa336feb7	nand_manuf_ids
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x24713675	flexonenand_region
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x9448bffa	onenand_addr
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x96be1358	onenand_scan_bbt
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0xf4c04898	onenand_default_bbt
+EXPORT_SYMBOL drivers/net/8390 0x21accfa4	ei_netdev_ops
+EXPORT_SYMBOL drivers/net/8390 0x2fd8cad7	ei_tx_timeout
+EXPORT_SYMBOL drivers/net/8390 0x44e2f24e	ei_close
+EXPORT_SYMBOL drivers/net/8390 0x490b5406	ei_get_stats
+EXPORT_SYMBOL drivers/net/8390 0x638804bc	ei_set_multicast_list
+EXPORT_SYMBOL drivers/net/8390 0x8aa11a52	NS8390_init
+EXPORT_SYMBOL drivers/net/8390 0xbc7ed5bc	ei_start_xmit
+EXPORT_SYMBOL drivers/net/8390 0xd1c77ae1	ei_poll
+EXPORT_SYMBOL drivers/net/8390 0xdd365790	ei_interrupt
+EXPORT_SYMBOL drivers/net/8390 0xfadb22fe	ei_open
+EXPORT_SYMBOL drivers/net/8390 0xfe654398	__alloc_ei_netdev
+EXPORT_SYMBOL drivers/net/8390p 0x147a0942	eip_tx_timeout
+EXPORT_SYMBOL drivers/net/8390p 0x318a1ed1	eip_close
+EXPORT_SYMBOL drivers/net/8390p 0x3d658f16	__alloc_eip_netdev
+EXPORT_SYMBOL drivers/net/8390p 0x6a9f6701	eip_start_xmit
+EXPORT_SYMBOL drivers/net/8390p 0x7a5a6279	eip_poll
+EXPORT_SYMBOL drivers/net/8390p 0x7b38024d	eip_set_multicast_list
+EXPORT_SYMBOL drivers/net/8390p 0xb663e226	eip_interrupt
+EXPORT_SYMBOL drivers/net/8390p 0xb6bb14f3	NS8390p_init
+EXPORT_SYMBOL drivers/net/8390p 0xe44d5281	eip_netdev_ops
+EXPORT_SYMBOL drivers/net/8390p 0xf65533ba	eip_get_stats
+EXPORT_SYMBOL drivers/net/8390p 0xf894213c	eip_open
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x23f86078	arcnet_interrupt
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x6301a722	arc_proto_map
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x64ed473a	arc_proto_default
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x6534792a	arcnet_debug
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x6d2fb25d	arcnet_close
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x6d6288e1	arcnet_open
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x6fcc45ca	arc_bcast_proto
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x9fc2d47e	arcnet_unregister_proto
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xd4aea806	arcnet_send_packet
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xd5d18d65	arcnet_timeout
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xe3150e40	alloc_arcdev
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xf287e6d1	arc_raw_proto
+EXPORT_SYMBOL drivers/net/arcnet/com20020 0x3fd96d06	com20020_check
+EXPORT_SYMBOL drivers/net/arcnet/com20020 0xa494bb78	com20020_found
+EXPORT_SYMBOL drivers/net/arcnet/com20020 0xc61d6009	com20020_netdev_ops
+EXPORT_SYMBOL drivers/net/bnx2 0x77f04758	bnx2_cnic_probe
+EXPORT_SYMBOL drivers/net/cnic 0x01137190	cnic_register_driver
+EXPORT_SYMBOL drivers/net/cnic 0x636af174	cnic_unregister_driver
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x1ac202a7	cxgb3_remove_tid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x2f2be24e	cxgb3_ofld_send
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x3148ee1b	cxgb3_unregister_client
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x42ea5cd0	t3_l2t_send_slow
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x63677f57	cxgb3_alloc_atid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x6f5f64fd	cxgb3_free_stid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x7b03a20a	t3_l2t_send_event
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x873be487	t3_l2t_get
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x8da17dc4	t3_register_cpl_handler
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x94086427	cxgb3_register_client
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xa700ad24	t3_l2e_free
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xd656138f	cxgb3_queue_tid_release
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xd85d4a0a	cxgb3_free_atid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xde3d9c90	dev2t3cdev
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xff7d3b81	cxgb3_alloc_stid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xffcda0a9	cxgb3_insert_tid
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x07f7fff6	hdlcdrv_transmitter
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x3e9c9b8b	hdlcdrv_unregister
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x7bed381e	hdlcdrv_arbitrate
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x8e503ca8	hdlcdrv_receiver
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xe71cbcf0	hdlcdrv_register
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x23cba615	sirdev_set_dongle
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x3565c654	sirdev_get_instance
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x4c788b74	sirdev_set_dtr_rts
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x578e84fb	sirdev_receive
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x5b6b5d85	sirdev_raw_read
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x5d225cd8	sirdev_put_instance
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xa2bab73f	irda_unregister_dongle
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xb24b6026	sirdev_raw_write
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xb95b63d0	irda_register_dongle
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xf4081ee4	sirdev_write_complete
+EXPORT_SYMBOL drivers/net/mdio 0x0f934475	mdio45_ethtool_gset_npage
+EXPORT_SYMBOL drivers/net/mdio 0x22bce513	mdio_mii_ioctl
+EXPORT_SYMBOL drivers/net/mdio 0x43e4defc	mdio45_nway_restart
+EXPORT_SYMBOL drivers/net/mdio 0x7577f992	mdio_set_flag
+EXPORT_SYMBOL drivers/net/mdio 0xa1a29548	mdio45_probe
+EXPORT_SYMBOL drivers/net/mdio 0xb34a7575	mdio45_ethtool_spauseparam_an
+EXPORT_SYMBOL drivers/net/mdio 0xc6b1163f	mdio45_links_ok
+EXPORT_SYMBOL drivers/net/mii 0x051d84de	mii_link_ok
+EXPORT_SYMBOL drivers/net/mii 0x139af9b3	mii_check_link
+EXPORT_SYMBOL drivers/net/mii 0x6dba8b4a	mii_ethtool_sset
+EXPORT_SYMBOL drivers/net/mii 0xae50eab4	generic_mii_ioctl
+EXPORT_SYMBOL drivers/net/mii 0xb697919d	mii_check_gmii_support
+EXPORT_SYMBOL drivers/net/mii 0xd039ecd1	mii_check_media
+EXPORT_SYMBOL drivers/net/mii 0xdb822946	mii_ethtool_gset
+EXPORT_SYMBOL drivers/net/mii 0xf5d84545	mii_nway_restart
+EXPORT_SYMBOL drivers/net/pppox 0x6e5c765b	pppox_ioctl
+EXPORT_SYMBOL drivers/net/pppox 0x99efaa95	register_pppox_proto
+EXPORT_SYMBOL drivers/net/pppox 0xe0ff7a18	unregister_pppox_proto
+EXPORT_SYMBOL drivers/net/pppox 0xebcf2569	pppox_unbind_sock
+EXPORT_SYMBOL drivers/net/sungem_phy 0xfb859954	mii_phy_probe
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x0078cdeb	tmsdev_init
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x4f18e61a	tmsdev_term
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x51904369	tms380tr_open
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xb64f8593	tms380tr_netdev_ops
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xc414460e	tms380tr_close
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd2328794	tms380tr_wait
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd49af46e	tms380tr_interrupt
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x38da4725	cycx_intr
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x62be23ea	cycx_setup
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x66a4c4e6	cycx_down
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x968458a6	cycx_peek
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xb6f383de	cycx_poke
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xfe7cd576	cycx_exec
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x0abc860c	hdlc_open
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x0ac1472a	hdlc_close
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x36fdccc4	unregister_hdlc_device
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x46a67cb2	register_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x6c731ae5	detach_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x72249d69	attach_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xa2166c82	hdlc_change_mtu
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xa65585a4	alloc_hdlcdev
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xb24d771f	hdlc_start_xmit
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xb79cd0fe	hdlc_ioctl
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xf1d0a0bd	unregister_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wan/z85230 0x10c78988	z8530_dead_port
+EXPORT_SYMBOL drivers/net/wan/z85230 0x213abac6	z8530_interrupt
+EXPORT_SYMBOL drivers/net/wan/z85230 0x30fd0665	z8530_nop
+EXPORT_SYMBOL drivers/net/wan/z85230 0x407cfbea	z8530_sync_close
+EXPORT_SYMBOL drivers/net/wan/z85230 0x4af7a29d	z8530_sync_txdma_open
+EXPORT_SYMBOL drivers/net/wan/z85230 0x53ae2914	z8530_queue_xmit
+EXPORT_SYMBOL drivers/net/wan/z85230 0x5a5a7c12	z8530_sync_dma_close
+EXPORT_SYMBOL drivers/net/wan/z85230 0x5be84c3d	z8530_shutdown
+EXPORT_SYMBOL drivers/net/wan/z85230 0x5cd24d29	z8530_hdlc_kilostream
+EXPORT_SYMBOL drivers/net/wan/z85230 0x5fed65d1	z8530_null_rx
+EXPORT_SYMBOL drivers/net/wan/z85230 0x64f2dad3	z8530_sync_txdma_close
+EXPORT_SYMBOL drivers/net/wan/z85230 0x6be6c8f7	z8530_channel_load
+EXPORT_SYMBOL drivers/net/wan/z85230 0x70753d6e	z8530_sync_open
+EXPORT_SYMBOL drivers/net/wan/z85230 0x8c26b87a	z8530_sync_dma_open
+EXPORT_SYMBOL drivers/net/wan/z85230 0xa0f42507	z8530_describe
+EXPORT_SYMBOL drivers/net/wan/z85230 0xdcecc2b8	z8530_init
+EXPORT_SYMBOL drivers/net/wan/z85230 0xe3d80064	z8530_hdlc_kilostream_85230
+EXPORT_SYMBOL drivers/net/wan/z85230 0xf46a6e58	z8530_sync
+EXPORT_SYMBOL drivers/net/wireless/airo 0x8372b9c3	reset_airo_card
+EXPORT_SYMBOL drivers/net/wireless/airo 0xcca85108	init_airo_card
+EXPORT_SYMBOL drivers/net/wireless/airo 0xcf44bd5a	stop_airo_card
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x1f532266	ath_reg_notifier_apply
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x31219afb	ath_is_world_regd
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x91e4a35f	ath_regd_init
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xbe25b39d	ath_regd_get_band_ctl
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xd4087dcd	ath_rxbuf_alloc
+EXPORT_SYMBOL drivers/net/wireless/atmel 0x15838e4d	stop_atmel_card
+EXPORT_SYMBOL drivers/net/wireless/atmel 0x1d0125b7	init_atmel_card
+EXPORT_SYMBOL drivers/net/wireless/atmel 0x82c1f820	atmel_open
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x0722a602	hostap_remove_interface
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x08b88e05	hostap_80211_ops
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x2eeed2bd	hostap_master_start_xmit
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x38aa0549	hostap_set_roaming
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x3b9b0b02	hostap_info_process
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x3ba23fd2	hostap_80211_rx
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x4b573ed5	hostap_init_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x52fef410	hostap_init_ap_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x5f5a7bf1	hostap_free_data
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x6e9e79c7	hostap_set_hostapd_sta
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x6f70263d	hostap_get_porttype
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x73ace338	hostap_check_sta_fw_version
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x75edc181	hostap_info_init
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x775acfdc	hostap_set_word
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x7f55a924	hostap_set_multicast_list_queue
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x98a665d0	hostap_set_hostapd
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x99c29a81	prism2_update_comms_qual
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x9d013350	hostap_setup_dev
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa12ad27f	hostap_dump_tx_header
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xaa8f854c	hostap_set_string
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb1d9a128	hostap_remove_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb2a945e0	hostap_dump_rx_header
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb4b77c8b	hostap_80211_get_hdrlen
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb970efed	hostap_init_data
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xc91c0e05	hostap_add_interface
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xdaffbd23	hostap_handle_sta_tx_exc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xebe6f81f	hostap_set_auth_algs
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xee2e6693	hostap_set_encryption
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf130c1c0	hostap_set_antsel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x1b94d777	libipw_get_channel_flags
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x1c8bb7c6	libipw_wx_get_encode
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x38ef1f99	libipw_change_mtu
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x3bcfaeff	libipw_channel_to_freq
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x4505f060	libipw_get_geo
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x5c0151cc	libipw_wx_set_encode
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x6cb8f5a1	libipw_networks_age
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x6d608e36	alloc_ieee80211
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x7dbfbb7f	libipw_set_geo
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x7dc6b50f	libipw_rx
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x8b07ebed	libipw_channel_to_index
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xaf6fb151	libipw_freq_to_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xb472cf6c	libipw_get_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xc0db2e1b	free_ieee80211
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xc57681d0	libipw_rx_mgt
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xcd6588f1	libipw_xmit
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xdb3f2529	libipw_txb_free
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xe3f9f76a	libipw_wx_set_encodeext
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xe920d417	libipw_is_valid_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xeb274ca8	libipw_wx_get_encodeext
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xf11cf588	libipw_wx_get_scan
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x002d20c3	iwl_scan_cancel
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x06e3ec35	iwl_rx_reply_rx_phy
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x082b34b4	iwl_get_sta_id
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x099ddff6	iwl_init_channel_map
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x09f73b1a	iwl_chain_noise_calibration
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0a704de7	iwl_eeprom_query16
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0be979c5	iwl_add_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x148af2bb	iwlcore_eeprom_release_semaphore
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x18a7cfb3	iwlcore_free_geos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x19adf751	iwl_tx_queue_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x19f0e900	iwl_debug_level
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1bf561d9	iwl_rx_replenish_now
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1c68e8ba	iwl_tt_initialize
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d77b399	iwl_bcast_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1de90f08	iwl_rate_get_lowest_plcp
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1def52f3	iwl_mac_conf_tx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x21ce8cc1	iwl_uninit_drv
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x25fb9ee9	iwl_cmd_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x26136056	iwl_check_rxon_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x26193730	iwl_tx_agg_start
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2e9f8546	iwl_sta_tx_modify_enable_tid
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x318087f9	iwl_rx_missed_beacon_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x32066c25	iwl_send_static_wepkey_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x32889d4b	iwl_irq_handle_error
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x33373d11	iwl_txq_ctx_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x398b0dc0	iwl_get_ra_sta_id
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3a4bbce0	iwl_disable_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3cf5c20e	iwl_eeprom_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3dac54b2	iwl_reset_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3ddafacc	iwl_set_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3f141254	iwl_is_monitor_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4088fbd1	iwl_ht_enabled
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x443a0836	iwl_leds_register
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x452ea5fa	iwlcore_eeprom_enhanced_txpower
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x46b34e56	iwl_tt_exit
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4869759e	iwl_rx_queue_update_write_ptr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4c032762	iwl_free_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4c9398b8	iwl_rx_queue_alloc
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4dc168fd	iwl_rf_kill_ct_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4f2cae69	iwl_scan_cancel_timeout
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x506b5c23	iwl_rx_reply_rx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5131bdf6	iwl_tt_handler
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x524f5245	iwl_sensitivity_calibration
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x54f57966	iwl_bss_info_changed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x57cbf908	iwl_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x57e3fb68	iwl_get_active_dwell_time
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x58d6ef07	iwl_verify_ucode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x59d67f3e	iwl_set_rxon_channel
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5bb89ece	iwl_send_lq_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5bd9ae40	iwl_mac_hw_scan
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5f6c7389	iwl_mac_add_interface
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x62727d56	iwl_calib_set
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x634f2558	iwl_txq_update_write_ptr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x646a883f	iwl_send_add_sta
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x694ae58b	iwl_remove_default_wep_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6a20dee6	iwl_alloc_all
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6a2daaeb	iwl_rx_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6c0c7828	iwl_get_channel_info
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6d48e24f	iwl_tt_exit_ct_kill
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6df3e185	iwl_mac_beacon_update
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x75fe5f1b	iwl_fill_probe_req
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x77940960	iwl_init_sensitivity
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x77f87933	iwl_set_rxon_ht
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x78976e61	iwl_isr_legacy
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7a7d60bf	iwl_get_free_ucode_key_index
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7d6544ea	iwl_set_default_wep_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7da4c02f	iwl_leds_unregister
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7dcca9e9	iwl_setup_scan_deferred_work
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x82aa64af	iwl_reset_run_time_calib
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x85bdc810	iwl_send_cmd_sync
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x85fc9a00	iwl_sta_rx_agg_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8670273d	iwl_hwrate_to_plcp_idx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x88c96d01	iwl_activate_qos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x89f8547f	iwl_free_tfds_in_queue
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8af8585c	iwl_setup_mac
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8dd5e177	iwl_tx_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8e615a9c	iwl_txq_check_empty
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8f5fe90e	iwl_hw_nic_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8f879a66	iwl_send_cmd_pdu
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x918bac0f	iwl_set_tx_power
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x91d75bea	iwl_find_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x921299fe	iwl_rx_pm_sleep_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x93175abb	iwl_send_bt_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x944a0863	iwl_mac_reset_tsf
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x95ad5bab	iwl_configure_filter
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9a305be8	iwl_rx_queue_restock
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9a60af0b	iwl_bg_scan_check
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9aa36fc6	iwl_tx_skb
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9bcdd684	iwl_hw_txq_ctx_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9cde1f24	iwl_queue_space
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9cf60cb5	iwl_init_drv
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9dfb7398	iwl_mac_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9e5fcfc0	iwl_mac_get_tx_stats
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9e86e8e0	iwl_bg_abort_scan
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa01a9082	iwl_get_passive_dwell_time
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa10aea65	iwl_rx_reply_compressed_ba
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa1da6259	iwlcore_init_geos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa549676a	iwl_power_update_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa775fb70	iwl_clear_stations_table
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa7b0d9ef	iwlcore_eeprom_verify_signature
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa98a50c0	iwl_rx_replenish
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaad0846e	iwl_bg_scan_completed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xab38a5db	iwl_alloc_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xab81cdd6	iwl_reset_qos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xabfa7735	iwl_rxon_add_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xad06c6ea	iwl_send_cmd_pdu_async
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb3c78ad7	iwl_eeprom_get_mac
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb51322f9	iwl_is_ht40_tx_allowed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbd79b47b	iwl_rx_pm_debug_statistics_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbd8f5534	iwl_sta_rx_agg_start
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbf2716e7	iwl_tx_agg_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc387161d	iwl_send_statistics_request
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc9cfa1ea	iwl_pci_suspend
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xca642bbd	iwl_rx_reply_error
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcbaf4931	get_cmd_string
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcc6660c6	iwl_tx_cmd_complete
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xce3e26f1	iwl_rx_queue_space
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcee71c90	iwl_rx_statistics
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd044fa8f	iwl_eeprom_query_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd12e29e9	iwl_send_calib_results
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd197acf8	iwlcore_eeprom_query_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd2f68573	iwl_set_decrypted_flag
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd496fb20	iwl_tt_enter_ct_kill
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd5874464	iwl_setup_rx_scan_handlers
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd6263ad4	iwl_eeprom_check_version
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd7f329fc	iwl_update_tkip_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd87d02ee	iwl_set_rxon_chain
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdb6298b4	iwl_remove_dynamic_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdba26c54	iwl_hwrate_to_tx_control
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdcbcece6	iwl_send_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdd01f7dd	iwl_mac_remove_interface
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe0bbbc47	iwl_tx_ant_restriction
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe1c3e6db	iwl_set_dynamic_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe249512f	iwl_tx_queue_reclaim
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe7ce5d70	iwl_rates
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xea36c92c	iwl_full_rxon_required
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xec3ae06a	iwl_pci_resume
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xede60658	iwl_connection_init_rx_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf4fe5890	iwlcore_eeprom_acquire_semaphore
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf5c9ba0d	iwl_rxq_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf81fc91e	iwl_eeprom_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf99fdbd6	iwl_hw_detect
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf9c846b4	iwl_set_hw_params
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfbc66d90	iwl_power_initialize
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfbdc7a56	iwl_rx_csa
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfc9ce18b	iwl_set_rxon_hwcrypto
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfcbbf853	iwl_setup_rxon_timing
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfecb06e8	iwl_free_channel_map
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x2186a91e	orinoco_init
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x4196c38b	hermes_write_ltv
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x44826b7b	orinoco_down
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x460024e8	orinoco_if_add
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x541a7a6c	orinoco_if_del
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x6a927e18	orinoco_interrupt
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x6ddd682c	free_orinocodev
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xa031d8e4	hermes_doicmd_wait
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xa6bce36b	orinoco_up
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc60b5e9e	hermes_bap_pwrite
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd38d8ae2	hermes_read_ltv
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd3f714e5	hermes_bap_pread
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5168829	hermes_allocate
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5336e5d	hermes_init
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd54e219d	hermes_docmd_wait
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xe4898b82	alloc_orinocodev
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xed47b224	hermes_struct_init
+EXPORT_SYMBOL drivers/parport/parport 0x055c235d	parport_put_port
+EXPORT_SYMBOL drivers/parport/parport 0x12a9b21a	parport_claim_or_block
+EXPORT_SYMBOL drivers/parport/parport 0x1337aca4	parport_wait_peripheral
+EXPORT_SYMBOL drivers/parport/parport 0x154bbd77	parport_ieee1284_epp_read_addr
+EXPORT_SYMBOL drivers/parport/parport 0x1f18d991	parport_ieee1284_read_byte
+EXPORT_SYMBOL drivers/parport/parport 0x284a4804	parport_announce_port
+EXPORT_SYMBOL drivers/parport/parport 0x3533e10b	parport_register_port
+EXPORT_SYMBOL drivers/parport/parport 0x397ba37d	parport_negotiate
+EXPORT_SYMBOL drivers/parport/parport 0x4008680d	parport_write
+EXPORT_SYMBOL drivers/parport/parport 0x4b005b00	parport_ieee1284_epp_write_addr
+EXPORT_SYMBOL drivers/parport/parport 0x4d2a941b	parport_ieee1284_interrupt
+EXPORT_SYMBOL drivers/parport/parport 0x4d73995d	parport_wait_event
+EXPORT_SYMBOL drivers/parport/parport 0x52c77d6e	parport_ieee1284_ecp_write_data
+EXPORT_SYMBOL drivers/parport/parport 0x5f3a8655	parport_ieee1284_write_compat
+EXPORT_SYMBOL drivers/parport/parport 0x629030eb	parport_unregister_device
+EXPORT_SYMBOL drivers/parport/parport 0x68a42a0f	parport_unregister_driver
+EXPORT_SYMBOL drivers/parport/parport 0x7c636044	parport_release
+EXPORT_SYMBOL drivers/parport/parport 0x865ca403	parport_register_device
+EXPORT_SYMBOL drivers/parport/parport 0x872bcb57	parport_find_number
+EXPORT_SYMBOL drivers/parport/parport 0x9d5eff70	parport_irq_handler
+EXPORT_SYMBOL drivers/parport/parport 0xaa20b046	parport_read
+EXPORT_SYMBOL drivers/parport/parport 0xbffacba9	parport_find_base
+EXPORT_SYMBOL drivers/parport/parport 0xc62ba963	parport_ieee1284_epp_read_data
+EXPORT_SYMBOL drivers/parport/parport 0xca311ba7	parport_get_port
+EXPORT_SYMBOL drivers/parport/parport 0xd105e91f	parport_ieee1284_read_nibble
+EXPORT_SYMBOL drivers/parport/parport 0xd99c21cf	parport_remove_port
+EXPORT_SYMBOL drivers/parport/parport 0xdc570cd6	parport_claim
+EXPORT_SYMBOL drivers/parport/parport 0xe31fee1f	parport_set_timeout
+EXPORT_SYMBOL drivers/parport/parport 0xeb0970cb	parport_ieee1284_ecp_write_addr
+EXPORT_SYMBOL drivers/parport/parport 0xf2ce56a5	parport_ieee1284_epp_write_data
+EXPORT_SYMBOL drivers/parport/parport 0xf74a375e	parport_register_driver
+EXPORT_SYMBOL drivers/parport/parport 0xfa99d559	parport_ieee1284_ecp_read_data
+EXPORT_SYMBOL drivers/parport/parport_pc 0x2a2c30a0	parport_pc_unregister_port
+EXPORT_SYMBOL drivers/parport/parport_pc 0x4456330b	parport_pc_probe_port
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x1a728905	pcmcia_loop_config
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x331c86f4	pcmcia_request_configuration
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4fd033a0	pcmcia_error_func
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x575d9951	pcmcia_unregister_driver
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x6214ddaa	pcmcia_request_window
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x6f49a913	pcmcia_disable_device
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x732dcdf8	pcmcia_request_irq
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x8a696523	pcmcia_get_mem_page
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x95db2b8e	pcmcia_dev_present
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x9812dddd	pcmcia_map_mem_page
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xa07010c7	pcmcia_register_driver
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xa65deb6e	pcmcia_release_window
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xbd0cdde5	pcmcia_access_configuration_register
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xcce28163	pcmcia_modify_configuration
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf0a25e12	pcmcia_error_ret
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf32ed7ed	pcmcia_get_window
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xfdc2b2a5	pcmcia_request_io
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x082d7d54	pcmcia_validate_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x13b25171	pccard_get_next_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x19a7b50e	pccard_read_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x212db8d2	pcmcia_socket_list
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x2767a692	pcmcia_suspend_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x32d16fc7	pcmcia_reset_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x34182f70	pcmcia_write_cis_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x3d034306	release_cis_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x44479e62	pcmcia_parse_events
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x4669e1e0	pcmcia_read_cis_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x492161f2	pcmcia_socket_dev_resume
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x4ccb0c84	pccard_static_ops
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x51e34108	pcmcia_find_io_region
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x54fa04ec	pccard_register_pcmcia
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x5bb7ac96	pcmcia_resume_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x5f42a69d	pcmcia_socket_list_rwsem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x695e1754	pcmcia_find_mem_region
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x70540ec6	pcmcia_insert_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x759fbca0	pcmcia_register_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x858a62bd	pcmcia_replace_cis
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x86532c69	pcmcia_eject_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x8808ebdc	pccard_get_first_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x8a52ce35	pcmcia_get_socket_by_nr
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x9235458f	pcmcia_get_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x97ba4f45	destroy_cis_cache
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x9ccd676e	pcmcia_socket_dev_suspend
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xa3b4f114	pcmcia_socket_class
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xab1f2f94	pcmcia_socket_dev_late_resume
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc02ef2c8	pcmcia_parse_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc192166d	pcmcia_adjust_io_region
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcd8300ba	pcmcia_socket_dev_early_resume
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcf97f3bd	dead_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcfd3fce1	pccard_validate_cis
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xde3dacf5	pcmcia_unregister_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xed3097d1	pcmcia_put_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xfd77b87e	pccard_get_tuple_data
+EXPORT_SYMBOL drivers/pcmcia/rsrc_nonstatic 0x4f5a49c9	pccard_nonstatic_ops
+EXPORT_SYMBOL drivers/platform/x86/sony-laptop 0x5bb1e117	sony_pic_camera_command
+EXPORT_SYMBOL drivers/pps/pps_core 0x1e145952	pps_unregister_source
+EXPORT_SYMBOL drivers/pps/pps_core 0x81ce31d4	pps_register_source
+EXPORT_SYMBOL drivers/pps/pps_core 0xe6a16116	pps_event
+EXPORT_SYMBOL drivers/scsi/53c700 0x6c4a467e	NCR_700_release
+EXPORT_SYMBOL drivers/scsi/53c700 0x7ae945b1	NCR_700_detect
+EXPORT_SYMBOL drivers/scsi/53c700 0xf13d9adc	NCR_700_intr
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x3df02fb4	fcoe_ctlr_destroy
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x53dfe8b5	fcoe_ctlr_els_send
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x5bdb5309	fcoe_ctlr_init
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x718e8340	fcoe_ctlr_recv
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x92b8cc14	fcoe_ctlr_link_up
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xabceaa1a	fcoe_ctlr_link_down
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xd701c40b	fcoe_ctlr_recv_flogi
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x00895c3d	fc_exch_mgr_free
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x02451c05	fc_get_host_stats
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x076a0909	fc_seq_start_next
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0b3a6e5b	fc_exch_mgr_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0bda63ae	fc_seq_els_rsp_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1a488da6	fc_fcp_complete
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1deb57d2	fc_fabric_login
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x21c00cf5	fc_exch_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x33011fd1	fc_fcp_ddp_setup
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x36e5fbaf	fc_cpu_mask
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x379e8203	fc_exch_mgr_del
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x3c224bc1	fc_exch_mgr_add
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x3ef1026c	fc_change_queue_type
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x4461fd71	fc_eh_device_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x48664c1d	fc_disc_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x495594a8	fc_fcp_destroy
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x4f3a7a22	fc_linkup
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x56183917	fc_destroy_rport
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x563dce02	fc_slave_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6150a444	fc_fabric_logoff
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x67750428	fc_exch_done
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x698c7c19	fc_fcp_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6eb44459	fc_linkdown
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x71df8fc8	fc_seq_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x7589f84c	fc_lport_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x7d17665d	fc_queuecommand
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x8aec87d7	fc_exch_recv
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x8b00b496	fc_eh_abort
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x8b7a5159	fc_lport_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x8d1a8ff4	fc_set_rport_loss_tmo
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x8f894adb	fc_elsct_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x90a1cd7b	fc_eh_host_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x95d2118b	fc_change_queue_depth
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x99424d85	fc_frame_crc_check
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x99500b0e	fc_get_host_port_type
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa53554e2	fc_exch_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb476ffd4	fc_exch_seq_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb4f3588a	__fc_frame_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xbb41f4d0	fc_lport_destroy
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xc0efdd5a	fc_get_host_speed
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd6cb3359	fc_setup_rport
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xdb59408e	fc_rport_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe095b67a	fc_lport_config
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe3262cc0	fc_set_mfs
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe35f85ad	fc_get_host_port_state
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xee75c9a7	fc_exch_mgr_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf7365d60	fc_seq_exch_abort
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xfe44ae4d	fc_rport_terminate_io
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x2250c66e	mraid_mm_adapter_app_handle
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x512c956d	mraid_mm_unregister_adp
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x9da9f6f1	mraid_mm_register_adp
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0c17edb1	osd_sec_init_nosec_doall_caps
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x12b380fe	osd_req_add_set_attr_list
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x13a128ae	osd_req_write
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x1c76a274	osd_dev_fini
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x23b63242	osd_req_add_get_attr_page
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x3b9463eb	osd_req_list_partition_objects
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x3c97e7df	osd_req_set_attributes
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x3d8fdc3e	osd_req_decode_get_attr_list
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x3f262a32	osd_req_flush_collection
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x3fba93e0	osd_req_list_collection_objects
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x42549b01	osd_req_get_attributes
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x4569d15f	osd_req_flush_obsd
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x47b3707f	osd_req_list_partition_collections
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x4e1ca611	osd_req_write_kern
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x5534cf2a	osd_end_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x5a66139f	osd_execute_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x747a4493	osd_execute_request_async
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x7b359531	osd_finalize_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x80478411	osd_req_list_dev_partitions
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x921e4dc7	osd_req_remove_partition
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x9249b373	osd_dev_init
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x95c4ec37	osd_req_decode_sense_full
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xa979eaa3	osd_auto_detect_ver
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xa98769e3	osd_req_flush_partition
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xac82f829	osd_req_create_partition
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe193ed36	osd_req_read
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xeae1e3cb	osd_req_flush_object
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xeb5ea90a	osd_req_remove_object
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xeb69a1d5	osd_req_create_object
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xec429a3c	osd_req_read_kern
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xec62801c	osd_req_format
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xf780b96f	osd_req_add_get_attr_list
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xf87a6c94	osd_start_request
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x28b21359	osduld_register_test
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x3bf5d29e	osduld_path_lookup
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x5fc48609	osduld_unregister_test
+EXPORT_SYMBOL drivers/scsi/osd/osd 0xc3b64df0	osduld_put_device
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x19a7b7a7	qlogicfas408_disable_ints
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x3fd8cd71	qlogicfas408_detect
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x5246a896	qlogicfas408_biosparam
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x5c940b10	qlogicfas408_info
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x62c469f1	qlogicfas408_bus_reset
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xbfad1cae	qlogicfas408_abort
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xdc310b12	qlogicfas408_ihandl
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xdd0569f9	qlogicfas408_queuecommand
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xe76b3b20	qlogicfas408_get_chip_type
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xf2b95199	qlogicfas408_setup
+EXPORT_SYMBOL drivers/scsi/raid_class 0x017693b3	raid_class_release
+EXPORT_SYMBOL drivers/scsi/raid_class 0x3afa00a1	raid_class_attach
+EXPORT_SYMBOL drivers/scsi/raid_class 0xbe45ab37	raid_component_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x183c41be	scsi_is_fc_rport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x18bff9ab	fc_host_post_event
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x1d38b59a	fc_remote_port_rolechg
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x1e43bf84	fc_remote_port_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x43f39dcb	scsi_is_fc_vport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x4e574e94	fc_vport_terminate
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x786820ef	fc_remote_port_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x7954b1ea	fc_get_event_number
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x7e2d59b7	fc_vport_create
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xc773a2cf	fc_attach_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xc86209c0	fc_remove_host
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xd6c07ef1	fc_host_post_vendor_event
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xe1bcd16e	fc_release_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x00d68ccd	sas_attach_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x01c1d3de	sas_port_mark_backlink
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x1fcaed0f	sas_rphy_remove
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x2681a014	sas_port_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x389d3d16	sas_rphy_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x3e462468	sas_phy_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x402d508b	sas_port_delete_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x58312f2c	scsi_is_sas_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x6eccaeae	sas_rphy_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x7bda5af8	sas_port_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x8f8e3016	sas_port_alloc_num
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x8ff625f1	sas_phy_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x90026c21	scsi_is_sas_port
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x99fa5c89	sas_phy_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x9a684550	sas_expander_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x9bbd63dd	sas_release_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x9ef9f853	sas_rphy_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xaeca4f41	sas_remove_host
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xc630d086	sas_end_device_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xcfb51e31	sas_read_port_mode_page
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xdc13dbcf	scsi_is_sas_rphy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xe444c81a	sas_phy_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xeba344ec	sas_port_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xf6679f1d	sas_port_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xfc46a946	sas_remove_children
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xfc958930	sas_port_add_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x0846afda	spi_dv_device
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x2c9f3a13	spi_attach_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x3686ea09	spi_print_msg
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x3bab00a1	spi_release_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x5b21d517	spi_schedule_dv_device
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0xe74d51cc	spi_display_xfer_agreement
+EXPORT_SYMBOL drivers/ssb/ssb 0x071a8cdb	ssb_pcihost_register
+EXPORT_SYMBOL drivers/ssb/ssb 0x190560c6	ssb_set_devtypedata
+EXPORT_SYMBOL drivers/ssb/ssb 0x22d9f756	ssb_device_is_enabled
+EXPORT_SYMBOL drivers/ssb/ssb 0x2687de10	__ssb_driver_register
+EXPORT_SYMBOL drivers/ssb/ssb 0x2e4a0847	ssb_bus_unregister
+EXPORT_SYMBOL drivers/ssb/ssb 0x322003c4	ssb_bus_pcibus_register
+EXPORT_SYMBOL drivers/ssb/ssb 0x34ac5fde	ssb_bus_suspend
+EXPORT_SYMBOL drivers/ssb/ssb 0x3d7d1063	ssb_bus_powerup
+EXPORT_SYMBOL drivers/ssb/ssb 0x4294ca2e	ssb_bus_resume
+EXPORT_SYMBOL drivers/ssb/ssb 0x46f6a9eb	ssb_clockspeed
+EXPORT_SYMBOL drivers/ssb/ssb 0x48a0938f	ssb_pmu_set_ldo_paref
+EXPORT_SYMBOL drivers/ssb/ssb 0x553044ae	ssb_dma_free_consistent
+EXPORT_SYMBOL drivers/ssb/ssb 0x757690e3	ssb_bus_may_powerdown
+EXPORT_SYMBOL drivers/ssb/ssb 0x81f954a0	ssb_dma_translation
+EXPORT_SYMBOL drivers/ssb/ssb 0x85a7cd45	ssb_pmu_set_ldo_voltage
+EXPORT_SYMBOL drivers/ssb/ssb 0x9422984b	ssb_device_disable
+EXPORT_SYMBOL drivers/ssb/ssb 0xb112b579	ssb_device_enable
+EXPORT_SYMBOL drivers/ssb/ssb 0xc0512e0f	ssb_admatch_base
+EXPORT_SYMBOL drivers/ssb/ssb 0xc05faf3d	ssb_driver_unregister
+EXPORT_SYMBOL drivers/ssb/ssb 0xc12005a1	ssb_bus_sdiobus_register
+EXPORT_SYMBOL drivers/ssb/ssb 0xc1525c94	ssb_dma_set_mask
+EXPORT_SYMBOL drivers/ssb/ssb 0xcb825d09	ssb_pcicore_dev_irqvecs_enable
+EXPORT_SYMBOL drivers/ssb/ssb 0xd481192b	ssb_admatch_size
+EXPORT_SYMBOL drivers/ssb/ssb 0xf4437fdc	ssb_dma_alloc_consistent
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x053f62bd	comedi_event
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x081a8a43	comedi_buf_memcpy_to
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x0cd330f4	range_unknown
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x2030e414	comedi_driver_register
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x2b6eec58	comedi_buf_read_n_available
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x2f0ad9d3	range_bipolar5
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x423f9cec	comedi_buf_read_alloc
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x4fe634f3	range_bipolar2_5
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x69e21453	comedi_buf_write_alloc
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x6c393637	comedi_driver_unregister
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x6c910eb0	comedi_error
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x70752add	comedi_buf_memcpy_from
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x7094600b	comedi_buf_read_free
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0x8113872c	range_unipolar10
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xa6e071f4	comedi_buf_write_free
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xa7f05da4	comedi_set_subdevice_runflags
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xbafed5dc	check_chanlist
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xbb52fc7f	range_bipolar10
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xbb8e0bba	comedi_reset_async_buf
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xc10dca85	comedi_get_subdevice_runflags
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xd7628c27	comedi_buf_put
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xdb2044b2	range_unipolar5
+EXPORT_SYMBOL drivers/staging/comedi/comedi 0xfbb32723	comedi_buf_get
+EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0x116fc8a3	subdev_8255_init
+EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0x4c2f92a5	subdev_8255_interrupt
+EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0x5632db47	subdev_8255_init_irq
+EXPORT_SYMBOL drivers/staging/comedi/drivers/8255 0xe32f6edc	subdev_8255_cleanup
+EXPORT_SYMBOL drivers/staging/comedi/drivers/comedi_fc 0x3fd66426	cfc_read_array_from_buffer
+EXPORT_SYMBOL drivers/staging/comedi/drivers/comedi_fc 0x582d763a	cfc_handle_events
+EXPORT_SYMBOL drivers/staging/comedi/drivers/comedi_fc 0xac240a66	cfc_write_array_to_buffer
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x2580dfe9	mite_request_channel_in_range
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x2631cafc	mite_bytes_read_from_memory_lb
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x478a77ef	mite_sync_output_dma
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x4cc61b7c	mite_sync_input_dma
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x51e9acd2	mite_buf_change
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x57a5661e	mite_devices
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x62af672d	mite_setup
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x6428b7d1	mite_bytes_read_from_memory_ub
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x64e5ce92	mite_dma_tcr
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x73ba0f77	mite_done
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x7ec604f6	mite_setup2
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x82eaed72	mite_bytes_written_to_memory_lb
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x84d32cf9	mite_bytes_in_transit
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x8d90433e	mite_release_channel
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0x9f978286	mite_get_status
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xb4311496	mite_dma_disarm
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xc0f3905f	mite_bytes_written_to_memory_ub
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xd8cece76	mite_dma_arm
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xe640fa03	mite_unsetup
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xef2c282f	mite_prep_dma
+EXPORT_SYMBOL drivers/staging/comedi/drivers/mite 0xfb3ba025	mite_list_devices
+EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0x672c54a9	subdev_700_interrupt
+EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0xaa9cc3b2	subdev_700_init_irq
+EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0xd8293cae	subdev_700_init
+EXPORT_SYMBOL drivers/staging/comedi/drivers/ni_daq_700 0xee8eeaea	subdev_700_cleanup
+EXPORT_SYMBOL drivers/staging/comedi/drivers/pcm_common 0x4ddd93fc	comedi_pcm_cmdtest
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x042d55f4	comedi_loglevel
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x0488ce0e	comedi_get_n_ranges
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x0cad1c36	comedi_get_subdevice_type
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x13e3042c	comedi_command
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x194eb4ae	comedi_get_n_channels
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x1c5555d9	comedi_cancel
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x1ec0e2d3	comedi_get_buf_head_pos
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x22318694	comedi_set_user_int_count
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x262e9c18	comedi_dio_write
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x370d69d5	comedi_dio_read
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x3cb614fc	comedi_data_write
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x3db41e4f	comedi_poll
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x3de6a4a3	comedi_get_buffer_offset
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x409d3263	comedi_do_insn
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x51da786d	comedi_register_callback
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x52769094	comedi_find_subdevice_by_type
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x628ed463	comedi_get_n_subdevices
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x671c2623	comedi_get_buffer_size
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x696272c9	comedi_unlock
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x826bd656	comedi_data_read_delayed
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x8e199bbf	comedi_perror
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x8fb4413e	comedi_data_read_hint
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x9b266320	comedi_get_krange
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0x9dde39b5	comedi_strerror
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xa0334b40	comedi_get_driver_name
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xa094eab0	comedi_get_board_name
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xa7c55c52	comedi_open
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xaa456501	comedi_mark_buffer_read
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xb45b8b7b	comedi_mark_buffer_written
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xb5396dad	comedi_get_maxdata
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xb5c3ac2a	comedi_map
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xc4ec62b3	comedi_get_len_chanlist
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xc7d949df	comedi_lock
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xd2a9a259	comedi_get_version_code
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xd46a9468	comedi_dio_config
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xd48facbb	comedi_command_test
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xddd89421	comedi_close
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xe2208940	comedi_data_read
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xe38c6fb4	comedi_unmap
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xed5731a4	comedi_get_subdevice_flags
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xefd0c778	comedi_fileno
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xf17e03df	comedi_dio_bitfield
+EXPORT_SYMBOL drivers/staging/comedi/kcomedilib/kcomedilib 0xf71581db	comedi_get_buffer_contents
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x0a0dc036	cx25821_sram_channel_setup_audio
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x471e1cfb	cx25821_devlist
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x6494a526	cx25821_dev_unregister
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x67cc5b8b	cx25821_sram_channels
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x762c795a	cx25821_dev_get
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x784853c3	cx25821_print_irqbits
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0x7b2758e4	cx25821_sram_channel_dump_audio
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0xb33c6df3	cx25821_set_gpiopin_direction
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0xd26890ca	cx25821_risc_databuffer_audio
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0xdc77d5bd	cx25821_sram_channel_setup
+EXPORT_SYMBOL drivers/staging/cx25821/cx25821 0xe0598277	cx25821_sram_channel_dump
+EXPORT_SYMBOL drivers/staging/hv/hv_vmbus 0x1cb36e36	vmbus_child_driver_register
+EXPORT_SYMBOL drivers/staging/hv/hv_vmbus 0x1f07d908	vmbus_child_driver_unregister
+EXPORT_SYMBOL drivers/staging/hv/hv_vmbus 0x253f3d14	vmbus_get_interface
+EXPORT_SYMBOL drivers/staging/hv/hv_vmbus 0xdf1a5ef6	vmbus_loglevel
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x055e90fa	iio_read_const_attr
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x392595e8	iio_add_event_to_list
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x3fadeb06	iio_register_interrupt_line
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x567d56c7	iio_push_event
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x60f7253a	iio_free_idr_val
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x61f2a25b	__iio_push_event
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x620464a9	iio_class
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x739ae300	iio_devt
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x94bd9949	iio_allocate_device
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x97fc1c07	iio_device_unregister
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xb6edaf14	iio_get_new_idr_val
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xbe069bfc	iio_device_register
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xc893c4d6	iio_free_device
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xcb842df9	__iio_change_event
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xcfe13031	iio_unregister_interrupt_line
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xe6414bad	iio_remove_event_from_list
+EXPORT_SYMBOL drivers/staging/line6/line6usb 0x03964d35	pod_create_files
+EXPORT_SYMBOL drivers/staging/line6/line6usb 0x19d86086	variax_create_files
+EXPORT_SYMBOL drivers/staging/line6/line6usb 0x692388f8	variax_remove_files
+EXPORT_SYMBOL drivers/staging/line6/line6usb 0x746c98ca	pod_remove_files
+EXPORT_SYMBOL drivers/staging/rar/rar_driver 0xf8017f03	get_rar_address
+EXPORT_SYMBOL drivers/staging/vme/vme 0x00d7e722	vme_lm_count
+EXPORT_SYMBOL drivers/staging/vme/vme 0x072f901c	vme_master_rmw
+EXPORT_SYMBOL drivers/staging/vme/vme 0x0e10859d	vme_lm_get
+EXPORT_SYMBOL drivers/staging/vme/vme 0x0ec5babe	vme_dma_free
+EXPORT_SYMBOL drivers/staging/vme/vme 0x196001dd	vme_slave_request
+EXPORT_SYMBOL drivers/staging/vme/vme 0x251b9ed8	vme_slave_set
+EXPORT_SYMBOL drivers/staging/vme/vme 0x2852f0c7	vme_register_bridge
+EXPORT_SYMBOL drivers/staging/vme/vme 0x29996232	vme_lm_request
+EXPORT_SYMBOL drivers/staging/vme/vme 0x3d1af350	vme_dma_pci_attribute
+EXPORT_SYMBOL drivers/staging/vme/vme 0x3f68d4cf	vme_lm_set
+EXPORT_SYMBOL drivers/staging/vme/vme 0x48b99a13	vme_lm_free
+EXPORT_SYMBOL drivers/staging/vme/vme 0x57c9dda2	vme_unregister_driver
+EXPORT_SYMBOL drivers/staging/vme/vme 0x607f9acf	vme_dma_list_free
+EXPORT_SYMBOL drivers/staging/vme/vme 0x66227eae	vme_alloc_consistent
+EXPORT_SYMBOL drivers/staging/vme/vme 0x6d48940b	vme_unregister_bridge
+EXPORT_SYMBOL drivers/staging/vme/vme 0x76bab4d4	vme_master_set
+EXPORT_SYMBOL drivers/staging/vme/vme 0x7707e678	vme_register_driver
+EXPORT_SYMBOL drivers/staging/vme/vme 0x7797a741	vme_dma_vme_attribute
+EXPORT_SYMBOL drivers/staging/vme/vme 0x7cf35220	vme_master_free
+EXPORT_SYMBOL drivers/staging/vme/vme 0x7fde2edb	vme_master_read
+EXPORT_SYMBOL drivers/staging/vme/vme 0x8bea6208	vme_request_dma
+EXPORT_SYMBOL drivers/staging/vme/vme 0x8c2083dc	vme_request_irq
+EXPORT_SYMBOL drivers/staging/vme/vme 0x8e08a296	vme_new_dma_list
+EXPORT_SYMBOL drivers/staging/vme/vme 0x92fa5abb	vme_lm_detach
+EXPORT_SYMBOL drivers/staging/vme/vme 0x93dff61f	vme_slave_get
+EXPORT_SYMBOL drivers/staging/vme/vme 0x94b2590f	vme_free_consistent
+EXPORT_SYMBOL drivers/staging/vme/vme 0x9923ed20	vme_dma_list_exec
+EXPORT_SYMBOL drivers/staging/vme/vme 0x99317fec	vme_master_request
+EXPORT_SYMBOL drivers/staging/vme/vme 0x9aeb07e8	vme_lm_attach
+EXPORT_SYMBOL drivers/staging/vme/vme 0xab48b280	vme_bus_type
+EXPORT_SYMBOL drivers/staging/vme/vme 0xbbc0a61c	vme_dma_list_add
+EXPORT_SYMBOL drivers/staging/vme/vme 0xbf73f4ef	vme_free_irq
+EXPORT_SYMBOL drivers/staging/vme/vme 0xc8352002	vme_dma_pattern_attribute
+EXPORT_SYMBOL drivers/staging/vme/vme 0xd797b9a5	vme_master_write
+EXPORT_SYMBOL drivers/staging/vme/vme 0xdb67364e	vme_generate_irq
+EXPORT_SYMBOL drivers/staging/vme/vme 0xdff905e5	vme_slave_free
+EXPORT_SYMBOL drivers/staging/vme/vme 0xe13841e6	vme_slot_get
+EXPORT_SYMBOL drivers/staging/vme/vme 0xe60cbb2f	vme_master_get
+EXPORT_SYMBOL drivers/staging/vme/vme 0xe693a6ce	vme_get_size
+EXPORT_SYMBOL drivers/staging/vme/vme 0xeccbeafc	vme_dma_free_attribute
+EXPORT_SYMBOL drivers/telephony/ixj 0x50d494b4	ixj_pcmcia_probe
+EXPORT_SYMBOL drivers/telephony/phonedev 0x72f5071d	phone_unregister_device
+EXPORT_SYMBOL drivers/telephony/phonedev 0xfdaa4306	phone_register_device
+EXPORT_SYMBOL drivers/usb/gadget/dummy_hcd 0x2e730f4d	usb_gadget_unregister_driver
+EXPORT_SYMBOL drivers/usb/gadget/dummy_hcd 0xc3688f4b	net2280_set_fifo_mode
+EXPORT_SYMBOL drivers/usb/gadget/dummy_hcd 0xcd4b55f7	usb_gadget_register_driver
+EXPORT_SYMBOL drivers/usb/host/sl811-hcd 0xb5d50d30	sl811h_driver
+EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xa64a4cea	usb_nop_xceiv_unregister
+EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xd0e43207	usb_nop_xceiv_register
+EXPORT_SYMBOL drivers/usb/serial/usbserial 0xe87e0e28	usb_serial_suspend
+EXPORT_SYMBOL drivers/usb/serial/usbserial 0xf001a4b8	usb_serial_resume
+EXPORT_SYMBOL drivers/video/backlight/generic_bl 0xc86baa7c	corgibl_limit_intensity
+EXPORT_SYMBOL drivers/video/backlight/lcd 0x2d0be73c	lcd_device_register
+EXPORT_SYMBOL drivers/video/backlight/lcd 0x9b7842a3	lcd_device_unregister
+EXPORT_SYMBOL drivers/video/console/bitblit 0x8e2d6eaa	fbcon_set_bitops
+EXPORT_SYMBOL drivers/video/console/font 0x09c8eb55	font_vga_8x16
+EXPORT_SYMBOL drivers/video/console/font 0xbb99125c	get_default_font
+EXPORT_SYMBOL drivers/video/console/font 0xf7584a9c	find_font
+EXPORT_SYMBOL drivers/video/console/softcursor 0x61315047	soft_cursor
+EXPORT_SYMBOL drivers/video/console/tileblit 0xaa1d8553	fbcon_set_tileops
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x0cc3ede5	cyber2000fb_detach
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x44a0a81a	cyber2000fb_get_fb_var
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x50d0b784	cyber2000fb_attach
+EXPORT_SYMBOL drivers/video/cyber2000fb 0xc1a5902a	cyber2000fb_disable_extregs
+EXPORT_SYMBOL drivers/video/cyber2000fb 0xef11669f	cyber2000fb_enable_extregs
+EXPORT_SYMBOL drivers/video/display/display 0x2e01e3c5	display_device_register
+EXPORT_SYMBOL drivers/video/display/display 0xfe40e88e	display_device_unregister
+EXPORT_SYMBOL drivers/video/macmodes 0x08ed0b62	mac_vmode_to_var
+EXPORT_SYMBOL drivers/video/macmodes 0x43f53e49	mac_find_mode
+EXPORT_SYMBOL drivers/video/macmodes 0xe2304303	mac_map_monitor_sense
+EXPORT_SYMBOL drivers/video/matrox/g450_pll 0x5fe4f2e0	g450_mnp2f
+EXPORT_SYMBOL drivers/video/matrox/g450_pll 0x869b4560	matroxfb_g450_setpll_cond
+EXPORT_SYMBOL drivers/video/matrox/g450_pll 0xbb0bc9bb	matroxfb_g450_setclk
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0x3ac91b0f	matrox_G100
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0x4e5328c5	matrox_mystique
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0xed981df5	DAC1064_global_init
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0xedb80ff2	DAC1064_global_restore
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_Ti3026 0xd0e4ebe3	matrox_millennium
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_accel 0x27161c46	matrox_cfbX_init
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0xb13d5318	matroxfb_wait_for_sync
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0xe20686de	matroxfb_enable_irq
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0xea911749	matroxfb_unregister_driver
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0xf1b51074	matroxfb_register_driver
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_g450 0x2434f0fd	matroxfb_g450_shutdown
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_g450 0x9667f391	matroxfb_g450_connect
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x25c3e2f4	matroxfb_vgaHWrestore
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x25cf8049	matroxfb_PLL_calcclock
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x445d80e3	matroxfb_read_pins
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0xabd8e427	matroxfb_var2my
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0xe266102e	matroxfb_DAC_in
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0xe3e3fbc7	matroxfb_DAC_out
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0xfaecadc7	matroxfb_vgaHWinit
+EXPORT_SYMBOL drivers/video/output 0x3f513bd4	video_output_register
+EXPORT_SYMBOL drivers/video/output 0x4d3898c4	video_output_unregister
+EXPORT_SYMBOL drivers/video/sis/sisfb 0x3037658e	sis_malloc
+EXPORT_SYMBOL drivers/video/sis/sisfb 0x454a3cf0	sis_free
+EXPORT_SYMBOL drivers/video/svgalib 0x00d1fce9	svga_set_default_seq_regs
+EXPORT_SYMBOL drivers/video/svgalib 0x07b3da30	svga_wseq_multi
+EXPORT_SYMBOL drivers/video/svgalib 0x1b95c56a	svga_check_timings
+EXPORT_SYMBOL drivers/video/svgalib 0x2613f2c6	svga_tileblit
+EXPORT_SYMBOL drivers/video/svgalib 0x480a7868	svga_get_tilemax
+EXPORT_SYMBOL drivers/video/svgalib 0x5752a970	svga_tilecursor
+EXPORT_SYMBOL drivers/video/svgalib 0x63e898d1	svga_set_default_crt_regs
+EXPORT_SYMBOL drivers/video/svgalib 0x7a3ae959	svga_wcrt_multi
+EXPORT_SYMBOL drivers/video/svgalib 0x80408443	svga_set_timings
+EXPORT_SYMBOL drivers/video/svgalib 0x8fa8438b	svga_set_textmode_vga_regs
+EXPORT_SYMBOL drivers/video/svgalib 0x9b188098	svga_settile
+EXPORT_SYMBOL drivers/video/svgalib 0xab3b22ad	svga_set_default_gfx_regs
+EXPORT_SYMBOL drivers/video/svgalib 0xd1d97cbd	svga_get_caps
+EXPORT_SYMBOL drivers/video/svgalib 0xdad682b1	svga_set_default_atc_regs
+EXPORT_SYMBOL drivers/video/svgalib 0xec83c473	svga_match_format
+EXPORT_SYMBOL drivers/video/svgalib 0xece5f0bc	svga_tilefill
+EXPORT_SYMBOL drivers/video/svgalib 0xef774f5d	svga_compute_pll
+EXPORT_SYMBOL drivers/video/svgalib 0xf336cec2	svga_tilecopy
+EXPORT_SYMBOL drivers/video/syscopyarea 0xb42c3924	sys_copyarea
+EXPORT_SYMBOL drivers/video/sysfillrect 0x0985f750	sys_fillrect
+EXPORT_SYMBOL drivers/video/sysimgblt 0x756b5567	sys_imageblit
+EXPORT_SYMBOL drivers/video/vgastate 0x686de290	restore_vga
+EXPORT_SYMBOL drivers/video/vgastate 0xe7a2620e	save_vga
+EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x71ed0080	w1_bq27000_write
+EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x988a849a	w1_bq27000_read
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x041b1f1d	w1_ds2760_store_eeprom
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x4b42af54	w1_ds2760_read
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x672561b1	w1_ds2760_recall_eeprom
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0xb8befa67	w1_ds2760_write
+EXPORT_SYMBOL drivers/w1/wire 0x7089f009	w1_add_master_device
+EXPORT_SYMBOL drivers/w1/wire 0x785ca164	w1_unregister_family
+EXPORT_SYMBOL drivers/w1/wire 0x93690dab	w1_remove_master_device
+EXPORT_SYMBOL drivers/w1/wire 0xb8486332	w1_register_family
+EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0x04e133fc	iTCO_vendor_check_noreboot_on
+EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0x672c9d44	iTCO_vendor_pre_keepalive
+EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xa78bd894	iTCO_vendor_pre_set_heartbeat
+EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xa8d6daac	iTCO_vendor_pre_start
+EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xd0efe320	iTCO_vendor_pre_stop
+EXPORT_SYMBOL fs/configfs/configfs 0x07058d0a	config_group_init_type_name
+EXPORT_SYMBOL fs/configfs/configfs 0x122b8c11	config_item_put
+EXPORT_SYMBOL fs/configfs/configfs 0x18e75381	configfs_unregister_subsystem
+EXPORT_SYMBOL fs/configfs/configfs 0x1ace8327	config_group_find_item
+EXPORT_SYMBOL fs/configfs/configfs 0x2c3d29ac	configfs_depend_item
+EXPORT_SYMBOL fs/configfs/configfs 0x426ba3fb	config_item_init_type_name
+EXPORT_SYMBOL fs/configfs/configfs 0x445b2b2f	config_item_init
+EXPORT_SYMBOL fs/configfs/configfs 0x825887c3	config_item_get
+EXPORT_SYMBOL fs/configfs/configfs 0x948d67dd	configfs_undepend_item
+EXPORT_SYMBOL fs/configfs/configfs 0xb678785f	configfs_register_subsystem
+EXPORT_SYMBOL fs/configfs/configfs 0xde330c9f	config_item_set_name
+EXPORT_SYMBOL fs/configfs/configfs 0xf3be71a3	config_group_init
+EXPORT_SYMBOL fs/fscache/fscache 0x007d6f80	fscache_add_cache
+EXPORT_SYMBOL fs/fscache/fscache 0x07d9b576	fscache_wait_bit_interruptible
+EXPORT_SYMBOL fs/fscache/fscache 0x203b7ba4	__fscache_uncache_page
+EXPORT_SYMBOL fs/fscache/fscache 0x2eff010b	__fscache_relinquish_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0x3e62259e	__fscache_attr_changed
+EXPORT_SYMBOL fs/fscache/fscache 0x3f0eda91	fscache_enqueue_operation
+EXPORT_SYMBOL fs/fscache/fscache 0x3fc23318	fscache_wait_bit
+EXPORT_SYMBOL fs/fscache/fscache 0x496932b9	fscache_op_debug_id
+EXPORT_SYMBOL fs/fscache/fscache 0x4de7d6dd	__fscache_write_page
+EXPORT_SYMBOL fs/fscache/fscache 0x580afdc5	fscache_obtained_object
+EXPORT_SYMBOL fs/fscache/fscache 0x5825a3af	__fscache_alloc_page
+EXPORT_SYMBOL fs/fscache/fscache 0x632bd23e	__fscache_wait_on_page_write
+EXPORT_SYMBOL fs/fscache/fscache 0x63f96884	fscache_cache_cleared_wq
+EXPORT_SYMBOL fs/fscache/fscache 0x6406f5c6	__fscache_read_or_alloc_pages
+EXPORT_SYMBOL fs/fscache/fscache 0x68e095e1	__fscache_acquire_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0x6ee58f72	fscache_object_lookup_negative
+EXPORT_SYMBOL fs/fscache/fscache 0x72a748c9	fscache_init_cache
+EXPORT_SYMBOL fs/fscache/fscache 0x86f8894f	fscache_object_states
+EXPORT_SYMBOL fs/fscache/fscache 0x8cfd8aa2	__fscache_check_page_write
+EXPORT_SYMBOL fs/fscache/fscache 0x96d965f3	__fscache_update_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0x9ebadea2	__fscache_register_netfs
+EXPORT_SYMBOL fs/fscache/fscache 0xa0d71bb7	fscache_fsdef_index
+EXPORT_SYMBOL fs/fscache/fscache 0xa87ef20d	__fscache_maybe_release_page
+EXPORT_SYMBOL fs/fscache/fscache 0xae02123f	fscache_mark_pages_cached
+EXPORT_SYMBOL fs/fscache/fscache 0xbb4db348	__fscache_read_or_alloc_page
+EXPORT_SYMBOL fs/fscache/fscache 0xc4d7cc50	fscache_io_error
+EXPORT_SYMBOL fs/fscache/fscache 0xcc528aa5	__fscache_unregister_netfs
+EXPORT_SYMBOL fs/fscache/fscache 0xd8d1ecc1	fscache_check_aux
+EXPORT_SYMBOL fs/fscache/fscache 0xef9d401a	fscache_object_slow_work_ops
+EXPORT_SYMBOL fs/fscache/fscache 0xf3ab3b2c	fscache_withdraw_cache
+EXPORT_SYMBOL fs/fscache/fscache 0xfdb8dc50	fscache_put_operation
+EXPORT_SYMBOL fs/nfsd/nfsd 0x0e195c1c	nfs4_acl_nfsv4_to_posix
+EXPORT_SYMBOL fs/nfsd/nfsd 0x2095976a	nfs4_acl_new
+EXPORT_SYMBOL fs/nfsd/nfsd 0x28fb929b	nfs4_acl_posix_to_nfsv4
+EXPORT_SYMBOL fs/nfsd/nfsd 0x35e33c1e	nfs4_acl_write_who
+EXPORT_SYMBOL fs/nfsd/nfsd 0x5a157ae4	nfs4_acl_get_whotype
+EXPORT_SYMBOL fs/quota/quota_tree 0x2a40674f	qtree_entry_unused
+EXPORT_SYMBOL fs/quota/quota_tree 0x6b882ebd	qtree_read_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0x82e5108e	qtree_delete_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0xacf563d5	qtree_write_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0xc961e402	qtree_release_dquot
+EXPORT_SYMBOL lib/crc-ccitt 0x3771b461	crc_ccitt
+EXPORT_SYMBOL lib/crc-ccitt 0x75811312	crc_ccitt_table
+EXPORT_SYMBOL lib/crc-itu-t 0xd29b009f	crc_itu_t_table
+EXPORT_SYMBOL lib/crc-itu-t 0xf5b4a948	crc_itu_t
+EXPORT_SYMBOL lib/crc7 0xa7587646	crc7
+EXPORT_SYMBOL lib/crc7 0xd80c3603	crc7_syndrome_table
+EXPORT_SYMBOL lib/libcrc32c 0x27000b29	crc32c
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x315c65fd	zlib_deflateInit2
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x48034724	zlib_deflateReset
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xaf64ad0d	zlib_deflate
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf0caf44b	zlib_deflate_workspacesize
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf741c793	zlib_deflateEnd
+EXPORT_SYMBOL net/802/p8023 0x203acf44	make_8023_client
+EXPORT_SYMBOL net/802/p8023 0x7fb6c1aa	destroy_8023_client
+EXPORT_SYMBOL net/9p/9pnet 0x022865e5	p9_client_remove
+EXPORT_SYMBOL net/9p/9pnet 0x0cb7c473	p9_client_write
+EXPORT_SYMBOL net/9p/9pnet 0x1324e39b	p9_client_version
+EXPORT_SYMBOL net/9p/9pnet 0x196a152d	v9fs_unregister_trans
+EXPORT_SYMBOL net/9p/9pnet 0x1e1a077f	p9_client_destroy
+EXPORT_SYMBOL net/9p/9pnet 0x246f099d	p9_client_disconnect
+EXPORT_SYMBOL net/9p/9pnet 0x3455711e	p9_idpool_destroy
+EXPORT_SYMBOL net/9p/9pnet 0x377c81d8	p9_client_walk
+EXPORT_SYMBOL net/9p/9pnet 0x3d73a797	p9_errstr2errno
+EXPORT_SYMBOL net/9p/9pnet 0x46aaf122	p9_client_auth
+EXPORT_SYMBOL net/9p/9pnet 0x48b32ba9	p9_client_cb
+EXPORT_SYMBOL net/9p/9pnet 0x59a5cb7f	p9_client_read
+EXPORT_SYMBOL net/9p/9pnet 0x6b754e6f	p9_parse_header
+EXPORT_SYMBOL net/9p/9pnet 0x76b79bf1	p9stat_read
+EXPORT_SYMBOL net/9p/9pnet 0x7cfc8cf0	p9_client_fcreate
+EXPORT_SYMBOL net/9p/9pnet 0x963d3dac	v9fs_register_trans
+EXPORT_SYMBOL net/9p/9pnet 0x9c964743	p9stat_free
+EXPORT_SYMBOL net/9p/9pnet 0xa86bae60	p9_tag_lookup
+EXPORT_SYMBOL net/9p/9pnet 0xaab8671a	p9_idpool_get
+EXPORT_SYMBOL net/9p/9pnet 0xb5377fc7	p9_client_create
+EXPORT_SYMBOL net/9p/9pnet 0xb8e39195	v9fs_get_default_trans
+EXPORT_SYMBOL net/9p/9pnet 0xc7a490c9	p9_client_open
+EXPORT_SYMBOL net/9p/9pnet 0xcae61af3	p9_idpool_create
+EXPORT_SYMBOL net/9p/9pnet 0xce70f0d3	p9_client_stat
+EXPORT_SYMBOL net/9p/9pnet 0xd0faf92e	p9_idpool_check
+EXPORT_SYMBOL net/9p/9pnet 0xd331fc1d	p9pdu_dump
+EXPORT_SYMBOL net/9p/9pnet 0xe21777bd	p9_client_wstat
+EXPORT_SYMBOL net/9p/9pnet 0xe58a3360	p9_error_init
+EXPORT_SYMBOL net/9p/9pnet 0xe78cfc2b	v9fs_get_trans_by_name
+EXPORT_SYMBOL net/9p/9pnet 0xef7127b0	p9_idpool_put
+EXPORT_SYMBOL net/9p/9pnet 0xf545e280	p9_client_attach
+EXPORT_SYMBOL net/9p/9pnet 0xffa396e7	p9_client_clunk
+EXPORT_SYMBOL net/appletalk/appletalk 0x8239beed	aarp_send_ddp
+EXPORT_SYMBOL net/appletalk/appletalk 0x98f05470	atalk_find_dev_addr
+EXPORT_SYMBOL net/appletalk/appletalk 0xe38e9e05	alloc_ltalkdev
+EXPORT_SYMBOL net/appletalk/appletalk 0xea8b5d1a	atrtr_get_dev
+EXPORT_SYMBOL net/atm/atm 0x1a24e5e2	sonet_subtract_stats
+EXPORT_SYMBOL net/atm/atm 0x2cc2d52d	vcc_hash
+EXPORT_SYMBOL net/atm/atm 0x34fc1923	register_atm_ioctl
+EXPORT_SYMBOL net/atm/atm 0x3dadab1d	atm_proc_root
+EXPORT_SYMBOL net/atm/atm 0x3ecf4111	vcc_release_async
+EXPORT_SYMBOL net/atm/atm 0x3fdb7e0e	vcc_insert_socket
+EXPORT_SYMBOL net/atm/atm 0x4c59905e	atm_dev_register
+EXPORT_SYMBOL net/atm/atm 0x56e0ba20	atm_init_aal5
+EXPORT_SYMBOL net/atm/atm 0x6a205cc9	atm_alloc_charge
+EXPORT_SYMBOL net/atm/atm 0x6d1ced27	vcc_sklist_lock
+EXPORT_SYMBOL net/atm/atm 0x89195dc3	sonet_copy_stats
+EXPORT_SYMBOL net/atm/atm 0x9ff7d0f2	deregister_atm_ioctl
+EXPORT_SYMBOL net/atm/atm 0xde3bd41c	atm_dev_lookup
+EXPORT_SYMBOL net/atm/atm 0xe74d3366	atm_dev_deregister
+EXPORT_SYMBOL net/atm/atm 0xe9ba3ada	atm_charge
+EXPORT_SYMBOL net/atm/atm 0xf49bc67a	atm_pcr_goal
+EXPORT_SYMBOL net/ax25/ax25 0x084ac9cc	ax25_find_cb
+EXPORT_SYMBOL net/ax25/ax25 0x12cd4aab	ax25_linkfail_register
+EXPORT_SYMBOL net/ax25/ax25 0x242852b9	ax25_uid_policy
+EXPORT_SYMBOL net/ax25/ax25 0x27bb4acb	ax25_listen_register
+EXPORT_SYMBOL net/ax25/ax25 0x2ef6c034	ax25_listen_release
+EXPORT_SYMBOL net/ax25/ax25 0x3a56174b	ax25_send_frame
+EXPORT_SYMBOL net/ax25/ax25 0x3d2d82ec	ax25_display_timer
+EXPORT_SYMBOL net/ax25/ax25 0x431e203f	ax25_hard_header
+EXPORT_SYMBOL net/ax25/ax25 0x4502c65a	asc2ax
+EXPORT_SYMBOL net/ax25/ax25 0x53dea1ff	ax2asc
+EXPORT_SYMBOL net/ax25/ax25 0x564d9f14	ax25_findbyuid
+EXPORT_SYMBOL net/ax25/ax25 0x8ede9e26	ax25_protocol_release
+EXPORT_SYMBOL net/ax25/ax25 0xad468086	ax25_rebuild_header
+EXPORT_SYMBOL net/ax25/ax25 0xc1444946	ax25cmp
+EXPORT_SYMBOL net/ax25/ax25 0xd43ecbf1	null_ax25_address
+EXPORT_SYMBOL net/ax25/ax25 0xe54c7930	ax25_header_ops
+EXPORT_SYMBOL net/ax25/ax25 0xeb1c2239	ax25_linkfail_release
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x068be438	bt_sock_link
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x0cbe8bd8	hci_unregister_proto
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x142b3cef	hci_free_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x1a8e2334	bt_accept_unlink
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x1aaf1256	hci_recv_fragment
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x205f6cde	hci_register_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x28a08e8f	hci_register_cb
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x2cf6edc0	bt_sock_recvmsg
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x3a1e6526	hci_connect
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x3ded4413	bt_accept_enqueue
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x460b2dc3	bt_accept_dequeue
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x4b42c2d5	bt_sock_poll
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x4eaf7f3b	hci_register_proto
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x51842d93	hci_unregister_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x5517ebee	hci_conn_change_link_key
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x671a1125	hci_send_acl
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x6c75f521	bt_sock_wait_state
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x7094f8ae	bt_err
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x8ffa967d	bt_sock_register
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x971cfc78	hci_conn_check_link_mode
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xb1d172c1	hci_alloc_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xb1fda0f1	hci_resume_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xbc1db666	bt_sock_ioctl
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xbf8ef799	hci_conn_security
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xc093b4d9	hci_suspend_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xc10ff5b9	hci_conn_hold_device
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xc2066af0	batostr
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xcbf99549	hci_get_route
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xcc1fb551	baswap
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xd8ad562e	hci_unregister_cb
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xdad1e4d8	hci_conn_put_device
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xe04d1dfe	hci_send_sco
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xe397d482	bt_sock_unlink
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xf19294db	bt_sock_unregister
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xfaaa4e71	hci_conn_switch_role
+EXPORT_SYMBOL net/bluetooth/l2cap 0xfc31fe88	l2cap_load
+EXPORT_SYMBOL net/bridge/bridge 0x56379365	br_should_route_hook
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x29a5a06a	ebt_register_table
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x837751d3	ebt_do_table
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0xc9d1262d	ebt_unregister_table
+EXPORT_SYMBOL net/can/can 0x073ab4b4	can_proto_register
+EXPORT_SYMBOL net/can/can 0x26a28868	can_proto_unregister
+EXPORT_SYMBOL net/can/can 0x43782961	can_rx_unregister
+EXPORT_SYMBOL net/can/can 0xc96535b8	can_send
+EXPORT_SYMBOL net/can/can 0xdc3977ac	can_rx_register
+EXPORT_SYMBOL net/ieee802154/nl802154 0x09a55bcf	ieee802154_nl_start_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0x59e646bc	ieee802154_nl_assoc_indic
+EXPORT_SYMBOL net/ieee802154/nl802154 0x5e75316a	ieee802154_nl_disassoc_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0x745923a1	ieee802154_nl_assoc_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0x9f4fe572	ieee802154_nl_disassoc_indic
+EXPORT_SYMBOL net/ieee802154/nl802154 0xf1d356aa	ieee802154_nl_scan_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0xfc3d4e85	ieee802154_nl_beacon_indic
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x21427a32	wpan_phy_find
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x4416f6cb	wpan_phy_free
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x9d540708	wpan_phy_register
+EXPORT_SYMBOL net/ieee802154/wpan-class 0xc46790e6	wpan_phy_alloc
+EXPORT_SYMBOL net/ieee802154/wpan-class 0xf21c3ecf	wpan_phy_unregister
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x2ca66d01	arpt_register_table
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xb523c2c6	arpt_unregister_table
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xc1bbcaa5	arpt_do_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x2a333090	ipt_register_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x567adb8f	ipt_do_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0xcd1bd938	ipt_unregister_table
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x3db3ccf9	nf_nat_mangle_udp_packet
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x44aa0c38	nf_nat_protocol_register
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x67d1b1cb	nf_nat_mangle_tcp_packet
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x6d13d0f5	nf_nat_protocol_unregister
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x7ee730f0	nf_nat_setup_info
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xaad93b97	nf_nat_used_tuple
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xd6008afb	nf_nat_follow_master
+EXPORT_SYMBOL net/ipv4/tunnel4 0x114dc6d8	xfrm4_tunnel_register
+EXPORT_SYMBOL net/ipv4/tunnel4 0xeca41eb8	xfrm4_tunnel_deregister
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x05e21b53	ip6t_register_table
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x912fe7d3	ipv6_find_hdr
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x9febfba8	ip6t_unregister_table
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xb8bddf33	ip6t_ext_hdr
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xd38c1c98	ip6t_do_table
+EXPORT_SYMBOL net/ipv6/tunnel6 0x1aa2e6f7	xfrm6_tunnel_register
+EXPORT_SYMBOL net/ipv6/tunnel6 0x7f913b3f	xfrm6_tunnel_deregister
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0x9cd013f2	xfrm6_tunnel_alloc_spi
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xab14e193	xfrm6_tunnel_free_spi
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xdb1b42d1	xfrm6_tunnel_spi_lookup
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x2121f730	ircomm_close
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x2711f211	ircomm_disconnect_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x42a746b7	ircomm_control_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x48124a95	ircomm_connect_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x6c828d04	ircomm_open
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x86006184	ircomm_connect_response
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x89c8e9a6	ircomm_data_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x91ed0d83	ircomm_flow_request
+EXPORT_SYMBOL net/irda/irda 0x01d1fcdb	hashbin_delete
+EXPORT_SYMBOL net/irda/irda 0x06a3ee58	irias_new_integer_value
+EXPORT_SYMBOL net/irda/irda 0x072e026f	irias_add_octseq_attrib
+EXPORT_SYMBOL net/irda/irda 0x07d3647c	irlmp_register_service
+EXPORT_SYMBOL net/irda/irda 0x1c30745c	iriap_open
+EXPORT_SYMBOL net/irda/irda 0x2036ad06	irda_param_insert
+EXPORT_SYMBOL net/irda/irda 0x27bd20a2	irlap_close
+EXPORT_SYMBOL net/irda/irda 0x2fbade95	irlmp_disconnect_request
+EXPORT_SYMBOL net/irda/irda 0x3462950f	hashbin_remove
+EXPORT_SYMBOL net/irda/irda 0x38a20e5b	irda_debug
+EXPORT_SYMBOL net/irda/irda 0x448b8aaa	irda_qos_bits_to_value
+EXPORT_SYMBOL net/irda/irda 0x46c1c4a2	irlmp_unregister_service
+EXPORT_SYMBOL net/irda/irda 0x4cc9eaef	iriap_close
+EXPORT_SYMBOL net/irda/irda 0x4d6deadd	irlmp_connect_request
+EXPORT_SYMBOL net/irda/irda 0x557024fd	irttp_connect_request
+EXPORT_SYMBOL net/irda/irda 0x5b44a960	irlap_open
+EXPORT_SYMBOL net/irda/irda 0x5c803842	iriap_getvaluebyclass_request
+EXPORT_SYMBOL net/irda/irda 0x5fa51693	irlmp_open_lsap
+EXPORT_SYMBOL net/irda/irda 0x61107fe8	proc_irda
+EXPORT_SYMBOL net/irda/irda 0x6758f8ac	irias_new_object
+EXPORT_SYMBOL net/irda/irda 0x68b7447c	hashbin_find
+EXPORT_SYMBOL net/irda/irda 0x6b043eba	irda_init_max_qos_capabilies
+EXPORT_SYMBOL net/irda/irda 0x7042bc54	irlmp_register_client
+EXPORT_SYMBOL net/irda/irda 0x747d6779	irias_delete_object
+EXPORT_SYMBOL net/irda/irda 0x7621e908	hashbin_insert
+EXPORT_SYMBOL net/irda/irda 0x76243bc9	irias_insert_object
+EXPORT_SYMBOL net/irda/irda 0x763e54a4	irlmp_unregister_client
+EXPORT_SYMBOL net/irda/irda 0x781e2db5	irias_find_object
+EXPORT_SYMBOL net/irda/irda 0x7957f728	irlmp_update_client
+EXPORT_SYMBOL net/irda/irda 0x7a57b6f3	hashbin_remove_this
+EXPORT_SYMBOL net/irda/irda 0x7ce426f2	alloc_irdadev
+EXPORT_SYMBOL net/irda/irda 0x8fd5b8e8	async_wrap_skb
+EXPORT_SYMBOL net/irda/irda 0x91815586	irda_param_pack
+EXPORT_SYMBOL net/irda/irda 0x993ad14b	irda_param_extract_all
+EXPORT_SYMBOL net/irda/irda 0xa0c94f47	irttp_data_request
+EXPORT_SYMBOL net/irda/irda 0xa102a7dc	irlmp_data_request
+EXPORT_SYMBOL net/irda/irda 0xa82194f0	async_unwrap_char
+EXPORT_SYMBOL net/irda/irda 0xaf6ed4cb	irlmp_connect_response
+EXPORT_SYMBOL net/irda/irda 0xb9394173	irias_delete_value
+EXPORT_SYMBOL net/irda/irda 0xbc9901c8	irttp_flow_request
+EXPORT_SYMBOL net/irda/irda 0xbcd3ef13	irias_object_change_attribute
+EXPORT_SYMBOL net/irda/irda 0xbe40ace9	irlmp_discovery_request
+EXPORT_SYMBOL net/irda/irda 0xc14e9b6a	hashbin_get_next
+EXPORT_SYMBOL net/irda/irda 0xc3949f40	irda_device_set_media_busy
+EXPORT_SYMBOL net/irda/irda 0xc79317f4	irttp_close_tsap
+EXPORT_SYMBOL net/irda/irda 0xcd41236c	hashbin_new
+EXPORT_SYMBOL net/irda/irda 0xd7172ff4	hashbin_get_first
+EXPORT_SYMBOL net/irda/irda 0xd8bfb6d4	hashbin_lock_find
+EXPORT_SYMBOL net/irda/irda 0xd9799efa	irlmp_close_lsap
+EXPORT_SYMBOL net/irda/irda 0xde4c6b3c	irlmp_service_to_hint
+EXPORT_SYMBOL net/irda/irda 0xdf3bbe93	irttp_dup
+EXPORT_SYMBOL net/irda/irda 0xe066e07d	irttp_disconnect_request
+EXPORT_SYMBOL net/irda/irda 0xe5260e0e	irias_add_integer_attrib
+EXPORT_SYMBOL net/irda/irda 0xec41fe7f	irias_add_string_attrib
+EXPORT_SYMBOL net/irda/irda 0xedd521c2	irlmp_get_discoveries
+EXPORT_SYMBOL net/irda/irda 0xf39b7fe0	irda_setup_dma
+EXPORT_SYMBOL net/irda/irda 0xf5ef29e3	irttp_open_tsap
+EXPORT_SYMBOL net/irda/irda 0xf723fa6d	irttp_udata_request
+EXPORT_SYMBOL net/irda/irda 0xf8651cb3	irda_notify_init
+EXPORT_SYMBOL net/irda/irda 0xff7e20c9	irttp_connect_response
+EXPORT_SYMBOL net/lapb/lapb 0x28fde6f4	lapb_data_received
+EXPORT_SYMBOL net/lapb/lapb 0x5145d0a2	lapb_data_request
+EXPORT_SYMBOL net/lapb/lapb 0x73a83e1d	lapb_setparms
+EXPORT_SYMBOL net/lapb/lapb 0x7f9aa998	lapb_register
+EXPORT_SYMBOL net/lapb/lapb 0x8147f0b7	lapb_unregister
+EXPORT_SYMBOL net/lapb/lapb 0x975e7550	lapb_getparms
+EXPORT_SYMBOL net/lapb/lapb 0xa34debd3	lapb_disconnect_request
+EXPORT_SYMBOL net/lapb/lapb 0xfe3277d9	lapb_connect_request
+EXPORT_SYMBOL net/mac80211/mac80211 0x037ed679	ieee80211_stop_tx_ba_cb
+EXPORT_SYMBOL net/mac80211/mac80211 0x12b09197	ieee80211_find_sta
+EXPORT_SYMBOL net/mac80211/mac80211 0x1a9ae3cb	ieee80211_free_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x1b56e72a	ieee80211_start_tx_ba_cb_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0x204f5c44	__ieee80211_get_tx_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0x21301878	ieee80211_queue_stopped
+EXPORT_SYMBOL net/mac80211/mac80211 0x21df4f75	__ieee80211_get_assoc_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0x22157e54	ieee80211_generic_frame_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0x318a5397	ieee80211_queue_delayed_work
+EXPORT_SYMBOL net/mac80211/mac80211 0x349a0cd1	ieee80211_ctstoself_get
+EXPORT_SYMBOL net/mac80211/mac80211 0x463c7e07	ieee80211_stop_queues
+EXPORT_SYMBOL net/mac80211/mac80211 0x50ddaadb	ieee80211_rx_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0x5f4f2176	wiphy_to_ieee80211_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x6011ec4d	ieee80211_register_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x61b19ca8	ieee80211_ctstoself_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0x62b0935c	__ieee80211_get_radio_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0x69d3f0e0	ieee80211_stop_tx_ba_cb_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0x813275ed	ieee80211_wake_queues
+EXPORT_SYMBOL net/mac80211/mac80211 0x81ca7fd6	ieee80211_alloc_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x8c351e13	ieee80211_tx_status_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0x97e02921	ieee80211_get_buffered_bc
+EXPORT_SYMBOL net/mac80211/mac80211 0x9d46865b	ieee80211_start_tx_ba_cb
+EXPORT_SYMBOL net/mac80211/mac80211 0xa0077765	ieee80211_beacon_get
+EXPORT_SYMBOL net/mac80211/mac80211 0xa3b30a13	__ieee80211_get_rx_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0xa3dfd77c	ieee80211_restart_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xa6350158	ieee80211_start_tx_ba_session
+EXPORT_SYMBOL net/mac80211/mac80211 0xbd80809c	ieee80211_stop_tx_ba_session
+EXPORT_SYMBOL net/mac80211/mac80211 0xc10a05cc	ieee80211_tx_status
+EXPORT_SYMBOL net/mac80211/mac80211 0xc3491b1b	ieee80211_get_tkip_key
+EXPORT_SYMBOL net/mac80211/mac80211 0xc3c824b0	ieee80211_rts_get
+EXPORT_SYMBOL net/mac80211/mac80211 0xd4fbcf10	ieee80211_scan_completed
+EXPORT_SYMBOL net/mac80211/mac80211 0xd507c449	ieee80211_queue_work
+EXPORT_SYMBOL net/mac80211/mac80211 0xdb1b613c	ieee80211_wake_queue
+EXPORT_SYMBOL net/mac80211/mac80211 0xe05b55c0	ieee80211_stop_queue
+EXPORT_SYMBOL net/mac80211/mac80211 0xe8abe42d	ieee80211_beacon_loss
+EXPORT_SYMBOL net/mac80211/mac80211 0xed0ca0c5	rate_control_send_low
+EXPORT_SYMBOL net/mac80211/mac80211 0xed4d1cd7	ieee80211_rts_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0xee90fcf0	ieee80211_rx
+EXPORT_SYMBOL net/mac80211/mac80211 0xeecb4d1c	ieee80211_rate_control_unregister
+EXPORT_SYMBOL net/mac80211/mac80211 0xf4d87379	ieee80211_unregister_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xfb9a0982	ieee80211_rate_control_register
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x0fbadaf3	ip_vs_tcp_conn_listen
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x5874d088	ip_vs_conn_in_get
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x5aed05d1	unregister_ip_vs_scheduler
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x6429cddc	ip_vs_conn_out_get
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x79c40f34	unregister_ip_vs_app
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x8f5b81fc	ip_vs_conn_new
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xa1dbc2d8	ip_vs_proto_name
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xa4d36c88	ip_vs_conn_put
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xad1a6335	ip_vs_skb_replace
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xc5f0527b	register_ip_vs_scheduler
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xecb6c486	register_ip_vs_app
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xff01a1e5	register_ip_vs_app_inc
+EXPORT_SYMBOL net/netfilter/nf_conntrack 0x9b3d6ba0	__nf_ct_ext_add
+EXPORT_SYMBOL net/netfilter/nf_conntrack 0xc4f5c947	__nf_ct_ext_destroy
+EXPORT_SYMBOL net/netfilter/nf_conntrack_proto_gre 0x2695ec61	nf_ct_gre_keymap_flush
+EXPORT_SYMBOL net/netfilter/x_tables 0x1100b776	xt_find_target
+EXPORT_SYMBOL net/netfilter/x_tables 0x16a5e826	xt_free_table_info
+EXPORT_SYMBOL net/netfilter/x_tables 0x3dc156a1	xt_unregister_target
+EXPORT_SYMBOL net/netfilter/x_tables 0x4f49131e	xt_register_matches
+EXPORT_SYMBOL net/netfilter/x_tables 0x53b7826a	xt_unregister_targets
+EXPORT_SYMBOL net/netfilter/x_tables 0x6e13ee42	xt_register_targets
+EXPORT_SYMBOL net/netfilter/x_tables 0x88c9578d	xt_unregister_matches
+EXPORT_SYMBOL net/netfilter/x_tables 0xb170e16a	xt_register_match
+EXPORT_SYMBOL net/netfilter/x_tables 0xb479ee46	xt_unregister_match
+EXPORT_SYMBOL net/netfilter/x_tables 0xc277d19b	xt_register_target
+EXPORT_SYMBOL net/netfilter/x_tables 0xc3ff5dff	xt_alloc_table_info
+EXPORT_SYMBOL net/netfilter/x_tables 0xcaf92ef1	xt_find_match
+EXPORT_SYMBOL net/phonet/phonet 0x2102b607	phonet_stream_ops
+EXPORT_SYMBOL net/phonet/phonet 0x3353a1eb	pn_sock_get_port
+EXPORT_SYMBOL net/phonet/phonet 0x68e5d634	pn_skb_send
+EXPORT_SYMBOL net/phonet/phonet 0x8c418224	phonet_header_ops
+EXPORT_SYMBOL net/phonet/phonet 0x8dc9ef61	phonet_proto_unregister
+EXPORT_SYMBOL net/phonet/phonet 0x9f3e6e06	pn_sock_hash
+EXPORT_SYMBOL net/phonet/phonet 0xde2ae21d	phonet_proto_register
+EXPORT_SYMBOL net/phonet/phonet 0xde5ad368	pn_sock_unhash
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x0d976310	rxrpc_kernel_begin_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x151e69dc	rxrpc_kernel_send_data
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x20c6ffdf	rxrpc_get_null_key
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x222043fe	rxrpc_kernel_end_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x25ee6a3f	rxrpc_kernel_intercept_rx_messages
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x482fda71	rxrpc_get_server_data_key
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x4f32150a	rxrpc_kernel_accept_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x53029f1f	rxrpc_kernel_free_skb
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x665aa727	rxrpc_kernel_data_delivered
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x99ca0917	rxrpc_kernel_get_error_number
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xa18936e6	rxrpc_kernel_get_abort_code
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xb137fdd6	rxrpc_kernel_reject_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xc337e6c0	rxrpc_kernel_abort_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xc6187779	key_type_rxrpc
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xf332c9f1	rxrpc_kernel_is_data_last
+EXPORT_SYMBOL net/sunrpc/sunrpc 0x1b756d03	svc_pool_stats_open
+EXPORT_SYMBOL net/tipc/tipc 0x08acf310	tipc_available_nodes
+EXPORT_SYMBOL net/tipc/tipc 0x0c149f94	tipc_send_buf2port
+EXPORT_SYMBOL net/tipc/tipc 0x10d40fcd	tipc_isconnected
+EXPORT_SYMBOL net/tipc/tipc 0x1472b270	tipc_disconnect
+EXPORT_SYMBOL net/tipc/tipc 0x1479cb03	tipc_deleteport
+EXPORT_SYMBOL net/tipc/tipc 0x15b5ecde	tipc_set_portunreliable
+EXPORT_SYMBOL net/tipc/tipc 0x16f27683	tipc_block_bearer
+EXPORT_SYMBOL net/tipc/tipc 0x19bfbc20	tipc_send_buf_fast
+EXPORT_SYMBOL net/tipc/tipc 0x259b74f9	tipc_acknowledge
+EXPORT_SYMBOL net/tipc/tipc 0x27d8bb58	tipc_send2port
+EXPORT_SYMBOL net/tipc/tipc 0x310d1bc9	tipc_detach
+EXPORT_SYMBOL net/tipc/tipc 0x3712e340	tipc_portunreliable
+EXPORT_SYMBOL net/tipc/tipc 0x3976041f	tipc_set_portimportance
+EXPORT_SYMBOL net/tipc/tipc 0x434869e9	tipc_forward_buf2name
+EXPORT_SYMBOL net/tipc/tipc 0x4b2243c6	tipc_portimportance
+EXPORT_SYMBOL net/tipc/tipc 0x4ba3cfc8	tipc_send2name
+EXPORT_SYMBOL net/tipc/tipc 0x4db30a95	tipc_register_media
+EXPORT_SYMBOL net/tipc/tipc 0x538b228a	tipc_withdraw
+EXPORT_SYMBOL net/tipc/tipc 0x5637ed44	tipc_get_mode
+EXPORT_SYMBOL net/tipc/tipc 0x56e52bc1	tipc_continue
+EXPORT_SYMBOL net/tipc/tipc 0x5c0d4b5c	tipc_ref_valid
+EXPORT_SYMBOL net/tipc/tipc 0x6282525b	tipc_createport
+EXPORT_SYMBOL net/tipc/tipc 0x62a681a3	tipc_portunreturnable
+EXPORT_SYMBOL net/tipc/tipc 0x64357d3c	tipc_multicast
+EXPORT_SYMBOL net/tipc/tipc 0x8001e3d7	tipc_forward2port
+EXPORT_SYMBOL net/tipc/tipc 0x88b73627	tipc_get_addr
+EXPORT_SYMBOL net/tipc/tipc 0x99680965	tipc_createport_raw
+EXPORT_SYMBOL net/tipc/tipc 0x9c45558e	tipc_enable_bearer
+EXPORT_SYMBOL net/tipc/tipc 0xa72c98d7	tipc_reject_msg
+EXPORT_SYMBOL net/tipc/tipc 0xa936a24b	tipc_get_port
+EXPORT_SYMBOL net/tipc/tipc 0xad64dea5	tipc_recv_msg
+EXPORT_SYMBOL net/tipc/tipc 0xadd203d0	tipc_connect2port
+EXPORT_SYMBOL net/tipc/tipc 0xae0103c3	tipc_shutdown
+EXPORT_SYMBOL net/tipc/tipc 0xb01ffc2c	tipc_forward2name
+EXPORT_SYMBOL net/tipc/tipc 0xb35b672c	tipc_publish
+EXPORT_SYMBOL net/tipc/tipc 0xbb2b2504	tipc_send
+EXPORT_SYMBOL net/tipc/tipc 0xc822e4a6	tipc_send_buf2name
+EXPORT_SYMBOL net/tipc/tipc 0xcec8514a	tipc_set_portunreturnable
+EXPORT_SYMBOL net/tipc/tipc 0xd44731e5	tipc_ownidentity
+EXPORT_SYMBOL net/tipc/tipc 0xda7f9d3f	tipc_attach
+EXPORT_SYMBOL net/tipc/tipc 0xdc1e34f2	tipc_forward_buf2port
+EXPORT_SYMBOL net/tipc/tipc 0xde4e115a	tipc_send_buf
+EXPORT_SYMBOL net/tipc/tipc 0xdf5008fc	tipc_peer
+EXPORT_SYMBOL net/tipc/tipc 0xe7aece47	tipc_ispublished
+EXPORT_SYMBOL net/tipc/tipc 0xeefd49b3	tipc_get_handle
+EXPORT_SYMBOL net/tipc/tipc 0xef50a1ef	tipc_disable_bearer
+EXPORT_SYMBOL net/wanrouter/wanrouter 0x0ebe03d1	unregister_wan_device
+EXPORT_SYMBOL net/wanrouter/wanrouter 0xff130159	register_wan_device
+EXPORT_SYMBOL net/wimax/wimax 0xb8b1725b	wimax_reset
+EXPORT_SYMBOL net/wimax/wimax 0xdf920210	wimax_rfkill
+EXPORT_SYMBOL net/wireless/cfg80211 0x07e7ac5a	ieee80211_radiotap_iterator_init
+EXPORT_SYMBOL net/wireless/cfg80211 0x09c64fbd	ieee80211_frequency_to_channel
+EXPORT_SYMBOL net/wireless/cfg80211 0x13e18626	wiphy_rfkill_set_hw_state
+EXPORT_SYMBOL net/wireless/cfg80211 0x1879fcbd	bridge_tunnel_header
+EXPORT_SYMBOL net/wireless/cfg80211 0x19a8b7a2	cfg80211_connect_result
+EXPORT_SYMBOL net/wireless/cfg80211 0x295a2fdf	wiphy_new
+EXPORT_SYMBOL net/wireless/cfg80211 0x2bc99c1a	wiphy_apply_custom_regulatory
+EXPORT_SYMBOL net/wireless/cfg80211 0x325d8bdf	cfg80211_testmode_reply
+EXPORT_SYMBOL net/wireless/cfg80211 0x33b9b21d	cfg80211_inform_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0x37ac8d05	ieee80211_get_response_rate
+EXPORT_SYMBOL net/wireless/cfg80211 0x40fd4690	wiphy_rfkill_stop_polling
+EXPORT_SYMBOL net/wireless/cfg80211 0x48d14879	cfg80211_roamed
+EXPORT_SYMBOL net/wireless/cfg80211 0x490ee748	cfg80211_send_rx_auth
+EXPORT_SYMBOL net/wireless/cfg80211 0x4bf41aef	cfg80211_send_disassoc
+EXPORT_SYMBOL net/wireless/cfg80211 0x545137d6	wiphy_free
+EXPORT_SYMBOL net/wireless/cfg80211 0x5a14c7a5	cfg80211_testmode_alloc_event_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0x5a9864d6	cfg80211_inform_bss_frame
+EXPORT_SYMBOL net/wireless/cfg80211 0x69b18f43	rfc1042_header
+EXPORT_SYMBOL net/wireless/cfg80211 0x6fe79ec7	cfg80211_send_rx_assoc
+EXPORT_SYMBOL net/wireless/cfg80211 0x7b661170	ieee80211_data_from_8023
+EXPORT_SYMBOL net/wireless/cfg80211 0x893c86a7	cfg80211_disconnected
+EXPORT_SYMBOL net/wireless/cfg80211 0x8c35d732	ieee80211_hdrlen
+EXPORT_SYMBOL net/wireless/cfg80211 0x8d5dd352	ieee80211_data_to_8023
+EXPORT_SYMBOL net/wireless/cfg80211 0x8ecdc7a2	cfg80211_michael_mic_failure
+EXPORT_SYMBOL net/wireless/cfg80211 0x90eb5e02	cfg80211_put_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0x991bd6d8	regulatory_hint
+EXPORT_SYMBOL net/wireless/cfg80211 0x99f7e2bb	ieee80211_get_hdrlen_from_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0xab13d386	cfg80211_send_auth_timeout
+EXPORT_SYMBOL net/wireless/cfg80211 0xabede290	cfg80211_get_mesh
+EXPORT_SYMBOL net/wireless/cfg80211 0xaee6fa49	cfg80211_ibss_joined
+EXPORT_SYMBOL net/wireless/cfg80211 0xbe83f3cc	__ieee80211_get_channel
+EXPORT_SYMBOL net/wireless/cfg80211 0xc4e85ec5	ieee80211_radiotap_iterator_next
+EXPORT_SYMBOL net/wireless/cfg80211 0xc5035f56	cfg80211_testmode_alloc_reply_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0xc70db18c	cfg80211_get_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0xc931a03d	ieee80211_bss_get_ie
+EXPORT_SYMBOL net/wireless/cfg80211 0xccc291b3	ieee80211_channel_to_frequency
+EXPORT_SYMBOL net/wireless/cfg80211 0xd3b8343d	cfg80211_unlink_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0xda060551	cfg80211_send_assoc_timeout
+EXPORT_SYMBOL net/wireless/cfg80211 0xdaff31e2	cfg80211_classify8021d
+EXPORT_SYMBOL net/wireless/cfg80211 0xe522fe0f	wiphy_rfkill_start_polling
+EXPORT_SYMBOL net/wireless/cfg80211 0xed983024	wiphy_register
+EXPORT_SYMBOL net/wireless/cfg80211 0xede40af4	cfg80211_testmode_event
+EXPORT_SYMBOL net/wireless/cfg80211 0xf6816acf	cfg80211_scan_done
+EXPORT_SYMBOL net/wireless/cfg80211 0xf7bae5c8	wiphy_unregister
+EXPORT_SYMBOL net/wireless/cfg80211 0xfcc2bbad	cfg80211_send_deauth
+EXPORT_SYMBOL net/wireless/cfg80211 0xfecfd8e2	freq_reg_info
+EXPORT_SYMBOL net/wireless/lib80211 0x0297697a	lib80211_crypt_quiescing
+EXPORT_SYMBOL net/wireless/lib80211 0x1b52ae1c	lib80211_crypt_deinit_entries
+EXPORT_SYMBOL net/wireless/lib80211 0x230f3ffb	lib80211_crypt_deinit_handler
+EXPORT_SYMBOL net/wireless/lib80211 0x29032852	lib80211_crypt_info_free
+EXPORT_SYMBOL net/wireless/lib80211 0x2d0f99e5	print_ssid
+EXPORT_SYMBOL net/wireless/lib80211 0xb41b6f19	lib80211_crypt_info_init
+EXPORT_SYMBOL net/wireless/lib80211 0xbb86eb8e	lib80211_get_crypto_ops
+EXPORT_SYMBOL net/wireless/lib80211 0xbc6ad4ff	lib80211_unregister_crypto_ops
+EXPORT_SYMBOL net/wireless/lib80211 0xecbaa1e6	lib80211_crypt_delayed_deinit
+EXPORT_SYMBOL net/wireless/lib80211 0xf1c559a6	lib80211_register_crypto_ops
+EXPORT_SYMBOL sound/ac97_bus 0x0ed108f5	ac97_bus_type
+EXPORT_SYMBOL sound/core/oss/snd-mixer-oss 0xb19fee1d	snd_mixer_oss_ioctl_card
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x1a724fcc	snd_seq_kernel_client_ctl
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x1cea94f7	snd_seq_event_port_attach
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x3fb4d161	snd_seq_kernel_client_dispatch
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x6bb71038	snd_seq_delete_kernel_client
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x6c33bd05	snd_seq_create_kernel_client
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x7ac2f329	snd_seq_expand_var_event
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x7b8699eb	snd_seq_event_port_detach
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x89947013	snd_use_lock_sync_helper
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xa7c7cb95	snd_seq_kernel_client_write_poll
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xae0f76bb	snd_seq_kernel_client_enqueue_blocking
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xb8e448a0	snd_seq_set_queue_tempo
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xcac0a3be	snd_seq_kernel_client_enqueue
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xe934da1d	snd_seq_dump_var_event
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x3a57f235	snd_seq_autoload_unlock
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x6339b6d0	snd_seq_device_load_drivers
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x68952c09	snd_seq_device_new
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xb90668b2	snd_seq_autoload_lock
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xc622fb29	snd_seq_device_unregister_driver
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xcc447acf	snd_seq_device_register_driver
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x6ea09972	snd_midi_channel_alloc_set
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x833a3e07	snd_midi_channel_set_clear
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xb9948d2c	snd_midi_channel_free_set
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xf0a1fdb3	snd_midi_process_event
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x17c15809	snd_midi_event_decode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x4ad3f518	snd_midi_event_reset_decode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x62384d3a	snd_midi_event_encode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x8a348811	snd_midi_event_reset_encode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x9df7af8b	snd_midi_event_free
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xc482499d	snd_midi_event_new
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xd9072e1a	snd_midi_event_no_status
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xe6df29c7	snd_midi_event_encode_byte
+EXPORT_SYMBOL sound/core/seq/snd-seq-virmidi 0xb87a96cd	snd_virmidi_new
+EXPORT_SYMBOL sound/core/snd 0x000a0fd9	snd_jack_new
+EXPORT_SYMBOL sound/core/snd 0x00e4fe09	snd_card_set_id
+EXPORT_SYMBOL sound/core/snd 0x0e0c0bd2	snd_ctl_boolean_stereo_info
+EXPORT_SYMBOL sound/core/snd 0x18e1683f	snd_dma_program
+EXPORT_SYMBOL sound/core/snd 0x191e88cf	snd_dma_pointer
+EXPORT_SYMBOL sound/core/snd 0x198788b4	snd_lookup_oss_minor_data
+EXPORT_SYMBOL sound/core/snd 0x200c026f	snd_mixer_oss_notify_callback
+EXPORT_SYMBOL sound/core/snd 0x24a94b26	snd_info_get_line
+EXPORT_SYMBOL sound/core/snd 0x291094de	snd_unregister_device
+EXPORT_SYMBOL sound/core/snd 0x2c8bd551	snd_card_register
+EXPORT_SYMBOL sound/core/snd 0x2d9a3099	snd_register_oss_device
+EXPORT_SYMBOL sound/core/snd 0x304a8cc8	snd_info_free_entry
+EXPORT_SYMBOL sound/core/snd 0x36a034cd	snd_card_free
+EXPORT_SYMBOL sound/core/snd 0x3726476c	snd_card_proc_new
+EXPORT_SYMBOL sound/core/snd 0x3971b4df	snd_ecards_limit
+EXPORT_SYMBOL sound/core/snd 0x3afc05ba	snd_cards
+EXPORT_SYMBOL sound/core/snd 0x48a7d069	snd_ctl_new1
+EXPORT_SYMBOL sound/core/snd 0x4a3ea5c0	snd_request_card
+EXPORT_SYMBOL sound/core/snd 0x4a4a42d5	snd_component_add
+EXPORT_SYMBOL sound/core/snd 0x4ab22093	snd_ctl_find_numid
+EXPORT_SYMBOL sound/core/snd 0x56423592	snd_ctl_unregister_ioctl
+EXPORT_SYMBOL sound/core/snd 0x59c1d825	snd_ctl_register_ioctl
+EXPORT_SYMBOL sound/core/snd 0x602c96f0	copy_to_user_fromio
+EXPORT_SYMBOL sound/core/snd 0x62b1f010	snd_ctl_make_virtual_master
+EXPORT_SYMBOL sound/core/snd 0x644e6db6	snd_ctl_boolean_mono_info
+EXPORT_SYMBOL sound/core/snd 0x64b98fa2	snd_device_free
+EXPORT_SYMBOL sound/core/snd 0x68fc6a88	snd_pci_quirk_lookup
+EXPORT_SYMBOL sound/core/snd 0x70c15ac1	snd_dma_disable
+EXPORT_SYMBOL sound/core/snd 0x70fb5c83	snd_info_register
+EXPORT_SYMBOL sound/core/snd 0x7fa9256b	snd_card_file_remove
+EXPORT_SYMBOL sound/core/snd 0x864d5c1a	snd_seq_root
+EXPORT_SYMBOL sound/core/snd 0x8955158f	snd_card_free_when_closed
+EXPORT_SYMBOL sound/core/snd 0x8df3789f	snd_oss_info_register
+EXPORT_SYMBOL sound/core/snd 0x8f595b11	snd_major
+EXPORT_SYMBOL sound/core/snd 0x92ff0320	snd_ctl_free_one
+EXPORT_SYMBOL sound/core/snd 0x93264126	snd_ctl_notify
+EXPORT_SYMBOL sound/core/snd 0x96c11d23	snd_card_file_add
+EXPORT_SYMBOL sound/core/snd 0x978e8ee7	snd_ctl_add
+EXPORT_SYMBOL sound/core/snd 0x985f20fe	snd_jack_set_parent
+EXPORT_SYMBOL sound/core/snd 0x9e6d79f8	snd_info_get_str
+EXPORT_SYMBOL sound/core/snd 0xb178bb9d	snd_add_device_sysfs_file
+EXPORT_SYMBOL sound/core/snd 0xb2e5ae4a	snd_lookup_minor_data
+EXPORT_SYMBOL sound/core/snd 0xb588a03c	snd_jack_report
+EXPORT_SYMBOL sound/core/snd 0xb5d29a61	snd_card_create
+EXPORT_SYMBOL sound/core/snd 0xb5f0bff9	snd_ctl_remove_id
+EXPORT_SYMBOL sound/core/snd 0xb6e0ce24	snd_device_new
+EXPORT_SYMBOL sound/core/snd 0xbe00e3d9	snd_ctl_remove
+EXPORT_SYMBOL sound/core/snd 0xc3167520	snd_register_device_for_dev
+EXPORT_SYMBOL sound/core/snd 0xce3ca308	copy_from_user_toio
+EXPORT_SYMBOL sound/core/snd 0xcf0ebd87	_snd_ctl_add_slave
+EXPORT_SYMBOL sound/core/snd 0xd1157735	release_and_free_resource
+EXPORT_SYMBOL sound/core/snd 0xd99fbe93	snd_device_register
+EXPORT_SYMBOL sound/core/snd 0xdbf76bd5	snd_ctl_find_id
+EXPORT_SYMBOL sound/core/snd 0xdd729ada	snd_info_create_card_entry
+EXPORT_SYMBOL sound/core/snd 0xdfcd1c98	snd_ctl_rename_id
+EXPORT_SYMBOL sound/core/snd 0xe20c9214	snd_iprintf
+EXPORT_SYMBOL sound/core/snd 0xea8e8c0f	snd_power_wait
+EXPORT_SYMBOL sound/core/snd 0xf4294edc	snd_info_create_module_entry
+EXPORT_SYMBOL sound/core/snd 0xf47ad1f1	snd_unregister_oss_device
+EXPORT_SYMBOL sound/core/snd 0xf6413317	snd_card_disconnect
+EXPORT_SYMBOL sound/core/snd-hwdep 0x7effae05	snd_hwdep_new
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x30f5f1e7	snd_dma_reserve_buf
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x3b91f3af	snd_free_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x489cddf3	snd_dma_get_reserved_buf
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x6ff6de86	snd_dma_free_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x8aeef6fe	snd_dma_alloc_pages_fallback
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x8c621967	snd_dma_alloc_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xade88e76	snd_malloc_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0x0283dfe3	_snd_pcm_hw_params_any
+EXPORT_SYMBOL sound/core/snd-pcm 0x04cda566	snd_interval_refine
+EXPORT_SYMBOL sound/core/snd-pcm 0x06670854	snd_pcm_hw_refine
+EXPORT_SYMBOL sound/core/snd-pcm 0x093e0e3e	snd_pcm_stop
+EXPORT_SYMBOL sound/core/snd-pcm 0x0ad39062	snd_pcm_period_elapsed
+EXPORT_SYMBOL sound/core/snd-pcm 0x0b6c20a5	snd_pcm_hw_constraint_minmax
+EXPORT_SYMBOL sound/core/snd-pcm 0x0d889e31	snd_pcm_lib_preallocate_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0x150221cd	snd_pcm_release_substream
+EXPORT_SYMBOL sound/core/snd-pcm 0x1753a3d4	snd_pcm_suspend
+EXPORT_SYMBOL sound/core/snd-pcm 0x1b9c9439	snd_pcm_lib_read
+EXPORT_SYMBOL sound/core/snd-pcm 0x1d027e4b	snd_pcm_format_signed
+EXPORT_SYMBOL sound/core/snd-pcm 0x249cec77	snd_pcm_lib_writev
+EXPORT_SYMBOL sound/core/snd-pcm 0x2630aa26	snd_pcm_lib_mmap_iomem
+EXPORT_SYMBOL sound/core/snd-pcm 0x2793f880	snd_pcm_lib_preallocate_pages_for_all
+EXPORT_SYMBOL sound/core/snd-pcm 0x3067e1db	snd_pcm_hw_rule_add
+EXPORT_SYMBOL sound/core/snd-pcm 0x3796bdcc	snd_pcm_format_little_endian
+EXPORT_SYMBOL sound/core/snd-pcm 0x39bf9301	_snd_pcm_hw_param_setempty
+EXPORT_SYMBOL sound/core/snd-pcm 0x3c8a0293	snd_pcm_hw_constraint_step
+EXPORT_SYMBOL sound/core/snd-pcm 0x3cd194fa	snd_pcm_lib_readv
+EXPORT_SYMBOL sound/core/snd-pcm 0x41b10afc	snd_pcm_lib_preallocate_free_for_all
+EXPORT_SYMBOL sound/core/snd-pcm 0x4d9b6d35	snd_pcm_format_size
+EXPORT_SYMBOL sound/core/snd-pcm 0x4f816e9b	snd_pcm_format_big_endian
+EXPORT_SYMBOL sound/core/snd-pcm 0x52e3e4a5	snd_pcm_hw_param_value
+EXPORT_SYMBOL sound/core/snd-pcm 0x5972a7b9	snd_pcm_new_stream
+EXPORT_SYMBOL sound/core/snd-pcm 0x5e7f4920	snd_pcm_format_set_silence
+EXPORT_SYMBOL sound/core/snd-pcm 0x643d1e62	snd_pcm_new
+EXPORT_SYMBOL sound/core/snd-pcm 0x6481a6e3	snd_pcm_lib_malloc_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0x650f8603	snd_pcm_format_silence_64
+EXPORT_SYMBOL sound/core/snd-pcm 0x65c47226	snd_pcm_hw_param_first
+EXPORT_SYMBOL sound/core/snd-pcm 0x68a24153	snd_pcm_format_physical_width
+EXPORT_SYMBOL sound/core/snd-pcm 0x6a4e393a	snd_pcm_lib_free_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0x6ef8fcd8	snd_pcm_format_linear
+EXPORT_SYMBOL sound/core/snd-pcm 0x7315e605	snd_pcm_notify
+EXPORT_SYMBOL sound/core/snd-pcm 0x7577ccfb	snd_pcm_hw_constraint_msbits
+EXPORT_SYMBOL sound/core/snd-pcm 0x8051c801	snd_pcm_hw_constraint_list
+EXPORT_SYMBOL sound/core/snd-pcm 0x81523ad1	snd_pcm_set_sync
+EXPORT_SYMBOL sound/core/snd-pcm 0x88cc66cc	snd_pcm_link_rwlock
+EXPORT_SYMBOL sound/core/snd-pcm 0x8d7e0b9c	snd_pcm_sgbuf_ops_page
+EXPORT_SYMBOL sound/core/snd-pcm 0x8edff727	snd_pcm_set_ops
+EXPORT_SYMBOL sound/core/snd-pcm 0x941593f5	snd_pcm_lib_write
+EXPORT_SYMBOL sound/core/snd-pcm 0x98894ce8	snd_pcm_hw_constraint_pow2
+EXPORT_SYMBOL sound/core/snd-pcm 0xa61aa028	snd_pcm_format_unsigned
+EXPORT_SYMBOL sound/core/snd-pcm 0xb29fb0f2	snd_pcm_sgbuf_get_chunk_size
+EXPORT_SYMBOL sound/core/snd-pcm 0xb9638db4	snd_pcm_rate_to_rate_bit
+EXPORT_SYMBOL sound/core/snd-pcm 0xbd1bdbb3	snd_pcm_open_substream
+EXPORT_SYMBOL sound/core/snd-pcm 0xbeb817c6	snd_pcm_lib_ioctl
+EXPORT_SYMBOL sound/core/snd-pcm 0xbf1dfa92	snd_pcm_hw_constraint_ratnums
+EXPORT_SYMBOL sound/core/snd-pcm 0xc846f277	snd_pcm_suspend_all
+EXPORT_SYMBOL sound/core/snd-pcm 0xc99f2880	snd_pcm_hw_constraint_ratdens
+EXPORT_SYMBOL sound/core/snd-pcm 0xd0b9b8b8	snd_interval_list
+EXPORT_SYMBOL sound/core/snd-pcm 0xd69ecf5a	snd_pcm_kernel_ioctl
+EXPORT_SYMBOL sound/core/snd-pcm 0xe2d54b35	snd_pcm_hw_constraint_integer
+EXPORT_SYMBOL sound/core/snd-pcm 0xe56a9336	snd_pcm_format_width
+EXPORT_SYMBOL sound/core/snd-pcm 0xed7e168d	snd_pcm_mmap_data
+EXPORT_SYMBOL sound/core/snd-pcm 0xeeac46df	snd_pcm_limit_hw_rates
+EXPORT_SYMBOL sound/core/snd-pcm 0xf3797152	snd_interval_ratnum
+EXPORT_SYMBOL sound/core/snd-pcm 0xf4eb50e5	snd_pcm_hw_param_last
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x016de57b	snd_rawmidi_kernel_release
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x18bcc11e	snd_rawmidi_transmit
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x297e741f	snd_rawmidi_transmit_peek
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x3226d390	snd_rawmidi_output_params
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x355079d9	snd_rawmidi_transmit_ack
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x362dd0a1	snd_rawmidi_set_ops
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x6df70b9c	snd_rawmidi_new
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x72e57232	snd_rawmidi_transmit_empty
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x9a2365a4	snd_rawmidi_kernel_write
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xb843d8d1	snd_rawmidi_kernel_read
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xc0efe292	snd_rawmidi_receive
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xc1aa0a73	snd_rawmidi_drain_input
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xc6114810	snd_rawmidi_kernel_open
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xcd113e7a	snd_rawmidi_drain_output
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xdfde1b93	snd_rawmidi_input_params
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xe29c5e68	snd_rawmidi_info_select
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xe81a633b	snd_rawmidi_drop_output
+EXPORT_SYMBOL sound/core/snd-timer 0x09af7056	snd_timer_interrupt
+EXPORT_SYMBOL sound/core/snd-timer 0x0b05793a	snd_timer_stop
+EXPORT_SYMBOL sound/core/snd-timer 0x188c1221	snd_timer_close
+EXPORT_SYMBOL sound/core/snd-timer 0x355d650c	snd_timer_open
+EXPORT_SYMBOL sound/core/snd-timer 0x3de41217	snd_timer_continue
+EXPORT_SYMBOL sound/core/snd-timer 0x40d60be0	snd_timer_resolution
+EXPORT_SYMBOL sound/core/snd-timer 0x4f52f14b	snd_timer_global_new
+EXPORT_SYMBOL sound/core/snd-timer 0x5680ed4b	snd_timer_new
+EXPORT_SYMBOL sound/core/snd-timer 0x6f5bde1d	snd_timer_pause
+EXPORT_SYMBOL sound/core/snd-timer 0xb37cb197	snd_timer_start
+EXPORT_SYMBOL sound/core/snd-timer 0xb83a8e88	snd_timer_notify
+EXPORT_SYMBOL sound/core/snd-timer 0xcbf175f0	snd_timer_global_register
+EXPORT_SYMBOL sound/core/snd-timer 0xec0318ee	snd_timer_global_free
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x0fab6082	snd_mpu401_uart_new
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x4bbb7f27	snd_mpu401_uart_interrupt_tx
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xc43a3940	snd_mpu401_uart_interrupt
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x05060a19	snd_opl3_regmap
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x1f8d1a86	snd_opl3_find_patch
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x24f05408	snd_opl3_init
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x4c6b955a	snd_opl3_reset
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x77a2a336	snd_opl3_interrupt
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x79f22a0a	snd_opl3_load_patch
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x8ada7615	snd_opl3_create
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xbf236e9a	snd_opl3_new
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xcfff3f7e	snd_opl3_hwdep_new
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xf874e0a9	snd_opl3_timer_new
+EXPORT_SYMBOL sound/drivers/opl4/snd-opl4-lib 0x5b6219fd	snd_opl4_write_memory
+EXPORT_SYMBOL sound/drivers/opl4/snd-opl4-lib 0x608795aa	snd_opl4_write
+EXPORT_SYMBOL sound/drivers/opl4/snd-opl4-lib 0x670840bd	snd_opl4_read_memory
+EXPORT_SYMBOL sound/drivers/opl4/snd-opl4-lib 0x69771a56	snd_opl4_read
+EXPORT_SYMBOL sound/drivers/opl4/snd-opl4-lib 0x747a8b67	snd_opl4_create
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x2137abf8	snd_vx_dsp_boot
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x2b269885	snd_vx_free_firmware
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x3771ff8e	snd_vx_suspend
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x58c1d4bd	snd_vx_load_boot_image
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x67aad982	snd_vx_dsp_load
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x99b88ede	snd_vx_irq_handler
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x9f9124b2	snd_vx_resume
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xae55a282	snd_vx_setup_firmware
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xcf48dac8	snd_vx_check_reg_bit
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xd3ea8906	snd_vx_create
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x182f986e	snd_ak4114_create
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x60d94ab4	snd_ak4114_external_rate
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x7add7bcc	snd_ak4114_build
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x8c521697	snd_ak4114_check_rate_and_errors
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xcdc2dcd8	snd_ak4114_reinit
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xea47bc0f	snd_ak4114_reg_write
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x3546a73d	snd_ak4117_reg_write
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x8f5b5477	snd_ak4117_external_rate
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xa12f2cc4	snd_ak4117_build
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xa97c35c4	snd_ak4117_create
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xacc3cbf9	snd_ak4117_check_rate_and_errors
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xfd5739b2	snd_ak4117_reinit
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x1e0d5882	snd_akm4xxx_init
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x6501fd18	snd_akm4xxx_build_controls
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x73e333bc	snd_akm4xxx_reset
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xedb473bc	snd_akm4xxx_write
+EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0x186b6e60	snd_pt2258_reset
+EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0x92fd8113	snd_pt2258_build_controls
+EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0x37692cfb	snd_tea575x_exit
+EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0xaf5f27a1	snd_tea575x_init
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x15c6fad3	snd_cs8427_create
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x6cf6e976	snd_cs8427_iec958_active
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0xa65fd1f8	snd_cs8427_reg_write
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0xb368714f	snd_cs8427_iec958_pcm
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0xc5971f90	snd_cs8427_iec958_build
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x05e094d3	snd_i2c_probeaddr
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x45eab84b	snd_i2c_device_create
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x8b8abee3	snd_i2c_bus_create
+EXPORT_SYMBOL sound/i2c/snd-i2c 0xa1110062	snd_i2c_device_free
+EXPORT_SYMBOL sound/i2c/snd-i2c 0xc0d5786b	snd_i2c_readbytes
+EXPORT_SYMBOL sound/i2c/snd-i2c 0xc5f3a23a	snd_i2c_sendbytes
+EXPORT_SYMBOL sound/i2c/snd-tea6330t 0x1ffe577f	snd_tea6330t_update_mixer
+EXPORT_SYMBOL sound/i2c/snd-tea6330t 0x3c37e576	snd_tea6330t_detect
+EXPORT_SYMBOL sound/isa/es1688/snd-es1688-lib 0x7414505d	snd_es1688_pcm
+EXPORT_SYMBOL sound/isa/es1688/snd-es1688-lib 0x80c7d3ff	snd_es1688_mixer_write
+EXPORT_SYMBOL sound/isa/es1688/snd-es1688-lib 0x8cac73c3	snd_es1688_create
+EXPORT_SYMBOL sound/isa/es1688/snd-es1688-lib 0xbca8428c	snd_es1688_mixer
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x0275a30d	snd_gf1_write_addr
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x099699e2	snd_gf1_mem_alloc
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x0db8db26	snd_gf1_i_look8
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x0f4a9758	snd_gf1_poke
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x10741a42	snd_gf1_write16
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x35b0d26c	snd_gf1_i_look16
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x35b7c871	snd_gf1_translate_freq
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x36766235	snd_gf1_pcm_new
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x3c3d20bd	snd_gf1_mem_free
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x4576022a	snd_gf1_mem_xfree
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x45c2ab53	snd_gf1_peek
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x46db8d67	snd_gf1_lvol_to_gvol_raw
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x49b5a90c	snd_gf1_write8
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x4dc9a33e	snd_gf1_mem_lock
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x598c939a	snd_gus_dram_write
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x68de4abf	snd_gf1_new_mixer
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x6e10426b	snd_gf1_alloc_voice
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x78c1fb61	snd_gf1_look16
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x79522204	snd_gf1_dram_addr
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x83be95df	snd_gus_initialize
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x896ce4c5	snd_gus_interrupt
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x8fb044df	snd_gf1_stop_voice
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x9981ad60	snd_gus_create
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0x9e6dbe89	snd_gf1_delay
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xb26abdb7	snd_gus_dram_read
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xb76e115b	snd_gf1_rawmidi_new
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xc251f124	snd_gf1_free_voice
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xc43a5527	snd_gf1_atten_table
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xd0c123c6	snd_gus_use_inc
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xdcaf5299	snd_gus_use_dec
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xe7d24326	snd_gf1_look8
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xf00456e8	snd_gf1_ctrl_stop
+EXPORT_SYMBOL sound/isa/gus/snd-gus-lib 0xfca3f74b	snd_gf1_i_write8
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x00e65490	snd_msnd_pcm
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x050af9b5	snd_msnd_DAPQ
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x07b5dc1c	snd_msndmix_new
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x0e096be3	snd_msnd_init_queue
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x183070ef	snd_msnd_enable_irq
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x1fda840f	snd_msnd_send_dsp_cmd
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x3174edc6	snd_msnd_DARQ
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x63e99a7c	snd_msnd_upload_host
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x75026b24	snd_msndmidi_input_read
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x78b89357	snd_msndmix_setup
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x830dd9a9	snd_msndmix_force_recsrc
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0x886dca76	snd_msnd_disable_irq
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0xd3d54065	snd_msnd_dsp_halt
+EXPORT_SYMBOL sound/isa/msnd/snd-msnd-lib 0xf392fedf	snd_msnd_send_word
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x10326704	snd_sbmixer_resume
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x161d6a45	snd_sbmixer_write
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x4763ac70	snd_sbdsp_create
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x56aadc88	snd_sbmixer_new
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x76ef36a7	snd_sbdsp_get_byte
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x8377ddad	snd_sbmixer_suspend
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0x8c959f6e	snd_sbmixer_add_ctl
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xc7c13592	snd_sbdsp_reset
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xcd60429f	snd_sbmixer_read
+EXPORT_SYMBOL sound/isa/sb/snd-sb-common 0xd7d4464a	snd_sbdsp_command
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-csp 0xb8c0bc47	snd_sb_csp_new
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0x08727b60	snd_sb16dsp_configure
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xaf40d256	snd_sb16dsp_pcm
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xc57f5b54	snd_sb16dsp_interrupt
+EXPORT_SYMBOL sound/isa/sb/snd-sb16-dsp 0xcbf7f056	snd_sb16dsp_get_pcm_ops
+EXPORT_SYMBOL sound/isa/sb/snd-sb8-dsp 0x2d38f2e7	snd_sb8dsp_interrupt
+EXPORT_SYMBOL sound/isa/sb/snd-sb8-dsp 0x52cd47d8	snd_sb8dsp_midi_interrupt
+EXPORT_SYMBOL sound/isa/sb/snd-sb8-dsp 0xb270e9a4	snd_sb8dsp_midi
+EXPORT_SYMBOL sound/isa/sb/snd-sb8-dsp 0xfc61ee38	snd_sb8dsp_pcm
+EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x0921e83b	snd_emu8000_update_chorus_mode
+EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x157bdf4e	snd_emu8000_load_reverb_fx
+EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x39519f56	snd_emu8000_load_chorus_fx
+EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x475c7ab6	snd_emu8000_update_equalizer
+EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x7a407e09	snd_emu8000_peek
+EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0x9ff8fae9	snd_emu8000_dma_chan
+EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0xa67a9c8f	snd_emu8000_init_fm
+EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0xd4b9effb	snd_emu8000_update_reverb_mode
+EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0xd815ee56	snd_emu8000_poke
+EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0xd9788f9c	snd_emu8000_poke_dw
+EXPORT_SYMBOL sound/isa/sb/snd-sbawe 0xe7aac569	snd_emu8000_peek_dw
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x155dc3e4	snd_wss_create
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x20188112	snd_wss_get_double
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x31eea749	snd_wss_free
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x3decaf88	snd_wss_mce_down
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x403f914d	snd_wss_info_single
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x505177d1	snd_wss_get_single
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x5621a5b2	snd_wss_in
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x633ddd48	snd_wss_info_double
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x6e2b2f92	snd_cs4236_ext_out
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x81c8f08c	snd_cs4236_ext_in
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0x93b0cbb0	snd_wss_mixer
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xb44faa69	snd_wss_put_single
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xb9a189c2	snd_wss_timer
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xc4065caa	snd_wss_put_double
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xd2d057a9	snd_wss_mce_up
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xd5ddcb39	snd_wss_chip_id
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xec283f81	snd_wss_overrange
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xedde91bc	snd_wss_get_pcm_ops
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xee5023e5	snd_wss_interrupt
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xf97224fe	snd_wss_pcm
+EXPORT_SYMBOL sound/isa/wss/snd-wss-lib 0xfffdfe23	snd_wss_out
+EXPORT_SYMBOL sound/oss/ad1848 0x2b5d9dae	ad1848_detect
+EXPORT_SYMBOL sound/oss/ad1848 0x3eabfbe6	ad1848_init
+EXPORT_SYMBOL sound/oss/ad1848 0x6169976a	attach_ms_sound
+EXPORT_SYMBOL sound/oss/ad1848 0x9bf1cc62	ad1848_unload
+EXPORT_SYMBOL sound/oss/ad1848 0xa3e16c6b	probe_ms_sound
+EXPORT_SYMBOL sound/oss/ad1848 0xb29a9148	unload_ms_sound
+EXPORT_SYMBOL sound/oss/ad1848 0xc04f6f67	ad1848_control
+EXPORT_SYMBOL sound/oss/mpu401 0x5febf284	unload_mpu401
+EXPORT_SYMBOL sound/oss/mpu401 0x61641749	probe_mpu401
+EXPORT_SYMBOL sound/oss/mpu401 0x6d5657bb	attach_mpu401
+EXPORT_SYMBOL sound/oss/msnd 0x1186f48f	msnd_fifo_read
+EXPORT_SYMBOL sound/oss/msnd 0x234f64e0	msnd_register
+EXPORT_SYMBOL sound/oss/msnd 0x340a3ddf	msnd_init_queue
+EXPORT_SYMBOL sound/oss/msnd 0x54230dc1	msnd_fifo_write
+EXPORT_SYMBOL sound/oss/msnd 0x5fb94ecb	msnd_unregister
+EXPORT_SYMBOL sound/oss/msnd 0x6587640b	msnd_disable_irq
+EXPORT_SYMBOL sound/oss/msnd 0x6601493b	msnd_fifo_make_empty
+EXPORT_SYMBOL sound/oss/msnd 0x8e3c524b	msnd_send_dsp_cmd
+EXPORT_SYMBOL sound/oss/msnd 0x9274d677	msnd_fifo_free
+EXPORT_SYMBOL sound/oss/msnd 0x95d37486	msnd_upload_host
+EXPORT_SYMBOL sound/oss/msnd 0xa1bcc420	msnd_send_word
+EXPORT_SYMBOL sound/oss/msnd 0xade99e25	msnd_fifo_alloc
+EXPORT_SYMBOL sound/oss/msnd 0xb3520772	msnd_fifo_init
+EXPORT_SYMBOL sound/oss/msnd 0xdf0f59eb	msnd_fifo_write_io
+EXPORT_SYMBOL sound/oss/msnd 0xefdd1843	msnd_enable_irq
+EXPORT_SYMBOL sound/oss/msnd 0xf4c4f662	msnd_fifo_read_io
+EXPORT_SYMBOL sound/oss/sb_lib 0x42424109	sb_be_quiet
+EXPORT_SYMBOL sound/oss/sb_lib 0x450f9aea	smw_free
+EXPORT_SYMBOL sound/oss/sb_lib 0x74afd69c	unload_sbmpu
+EXPORT_SYMBOL sound/oss/sb_lib 0x9ab34899	probe_sbmpu
+EXPORT_SYMBOL sound/oss/sb_lib 0xc4884969	sb_dsp_unload
+EXPORT_SYMBOL sound/oss/sb_lib 0xd8a2731c	sb_dsp_detect
+EXPORT_SYMBOL sound/oss/sb_lib 0xe3c09d53	sb_dsp_init
+EXPORT_SYMBOL sound/oss/sound 0x04c87ec8	compute_finetune
+EXPORT_SYMBOL sound/oss/sound 0x06339815	sound_unload_synthdev
+EXPORT_SYMBOL sound/oss/sound 0x0f280035	conf_printf
+EXPORT_SYMBOL sound/oss/sound 0x17ba231d	seq_input_event
+EXPORT_SYMBOL sound/oss/sound 0x1b3df3cf	sound_alloc_mixerdev
+EXPORT_SYMBOL sound/oss/sound 0x1f395686	MIDIbuf_avail
+EXPORT_SYMBOL sound/oss/sound 0x2161d5e8	sound_timer_init
+EXPORT_SYMBOL sound/oss/sound 0x2aa31695	midi_synth_kill_note
+EXPORT_SYMBOL sound/oss/sound 0x33d6960d	sound_install_mixer
+EXPORT_SYMBOL sound/oss/sound 0x394cb088	sound_free_dma
+EXPORT_SYMBOL sound/oss/sound 0x418f5fbe	sound_close_dma
+EXPORT_SYMBOL sound/oss/sound 0x4cd01bdd	num_audiodevs
+EXPORT_SYMBOL sound/oss/sound 0x4ff47e9d	midi_synth_setup_voice
+EXPORT_SYMBOL sound/oss/sound 0x51e354b2	sound_alloc_timerdev
+EXPORT_SYMBOL sound/oss/sound 0x56504ca2	midi_synth_reset
+EXPORT_SYMBOL sound/oss/sound 0x5d986fc9	note_to_freq
+EXPORT_SYMBOL sound/oss/sound 0x5ddc0462	synth_devs
+EXPORT_SYMBOL sound/oss/sound 0x7679ee76	seq_copy_to_input
+EXPORT_SYMBOL sound/oss/sound 0x7bdf0907	conf_printf2
+EXPORT_SYMBOL sound/oss/sound 0x7c48d21b	audio_devs
+EXPORT_SYMBOL sound/oss/sound 0x87abb246	sound_install_audiodrv
+EXPORT_SYMBOL sound/oss/sound 0x892093e0	midi_synth_controller
+EXPORT_SYMBOL sound/oss/sound 0x90bd9714	sequencer_timer
+EXPORT_SYMBOL sound/oss/sound 0x987bcf12	DMAbuf_outputintr
+EXPORT_SYMBOL sound/oss/sound 0x9a95733f	sound_alloc_dma
+EXPORT_SYMBOL sound/oss/sound 0x9bdaf24d	midi_synth_start_note
+EXPORT_SYMBOL sound/oss/sound 0x9d845b18	num_mixers
+EXPORT_SYMBOL sound/oss/sound 0xa1d5f04f	load_mixer_volumes
+EXPORT_SYMBOL sound/oss/sound 0xa1eae7cf	num_midis
+EXPORT_SYMBOL sound/oss/sound 0xa41ead5f	sound_unload_timerdev
+EXPORT_SYMBOL sound/oss/sound 0xa51c913b	sound_unload_mixerdev
+EXPORT_SYMBOL sound/oss/sound 0xa6bb414c	sound_unload_mididev
+EXPORT_SYMBOL sound/oss/sound 0xa948751e	sound_unload_audiodev
+EXPORT_SYMBOL sound/oss/sound 0xad45df73	midi_synth_close
+EXPORT_SYMBOL sound/oss/sound 0xaef743b2	midi_synth_ioctl
+EXPORT_SYMBOL sound/oss/sound 0xb14b22cd	midi_synth_hw_control
+EXPORT_SYMBOL sound/oss/sound 0xb51587f6	do_midi_msg
+EXPORT_SYMBOL sound/oss/sound 0xba413f87	sound_alloc_mididev
+EXPORT_SYMBOL sound/oss/sound 0xba7dd041	midi_synth_bender
+EXPORT_SYMBOL sound/oss/sound 0xc748d109	sound_alloc_synthdev
+EXPORT_SYMBOL sound/oss/sound 0xcab4d5bf	midi_synth_load_patch
+EXPORT_SYMBOL sound/oss/sound 0xcc4b8797	sound_open_dma
+EXPORT_SYMBOL sound/oss/sound 0xd85be938	midi_synth_set_instr
+EXPORT_SYMBOL sound/oss/sound 0xda3fdfce	midi_devs
+EXPORT_SYMBOL sound/oss/sound 0xdb400afa	midi_synth_panning
+EXPORT_SYMBOL sound/oss/sound 0xe056b71c	DMAbuf_start_dma
+EXPORT_SYMBOL sound/oss/sound 0xe2675a79	sound_timer_interrupt
+EXPORT_SYMBOL sound/oss/sound 0xeb315d99	DMAbuf_inputintr
+EXPORT_SYMBOL sound/oss/sound 0xf1ea8a20	midi_synth_aftertouch
+EXPORT_SYMBOL sound/oss/sound 0xf499e821	mixer_devs
+EXPORT_SYMBOL sound/oss/sound 0xf6b3a2fb	midi_synth_open
+EXPORT_SYMBOL sound/oss/sound 0xf78f6363	sequencer_init
+EXPORT_SYMBOL sound/oss/sound 0xf8a5dd60	sound_timer_devs
+EXPORT_SYMBOL sound/oss/sound 0xfa6871be	sound_timer_syncinterval
+EXPORT_SYMBOL sound/oss/sound 0xfddcbfb3	midi_synth_send_sysex
+EXPORT_SYMBOL sound/oss/uart401 0x049cd8b7	uart401intr
+EXPORT_SYMBOL sound/oss/uart401 0x65e60397	probe_uart401
+EXPORT_SYMBOL sound/oss/uart401 0xecfdd9c9	unload_uart401
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x00f1ac7a	snd_ac97_pcm_assign
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x058966cf	snd_ac97_set_rate
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x2d09a267	snd_ac97_pcm_open
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x344f73cf	snd_ac97_update_power
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x3a1af2f5	snd_ac97_update
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x45817b5c	snd_ac97_mixer
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x4f98c81b	snd_ac97_suspend
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x52e1e7f5	snd_ac97_pcm_close
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x5c156108	snd_ac97_pcm_double_rate_rules
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x5eacef9b	snd_ac97_read
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x83f23394	snd_ac97_update_bits
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xb87dd21a	snd_ac97_get_short_name
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xbd15d28a	snd_ac97_tune_hardware
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xc7987da6	snd_ac97_write_cache
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xce1938b3	snd_ac97_bus
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xd67d32e3	snd_ac97_resume
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xda763ca7	snd_ac97_write
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x0da1c2b3	snd_emu10k1_voice_alloc
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x134ae927	snd_emu10k1_synth_free
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x1e124118	snd_emu10k1_ptr_write
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x2b3ea805	snd_emu10k1_synth_copy_from_user
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x35b8f5c0	snd_emu10k1_memblk_map
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x409257d1	snd_emu10k1_synth_alloc
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x9f8f863a	snd_emu10k1_synth_bzero
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xbbc87201	snd_emu10k1_voice_free
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xe8aad007	snd_emu10k1_ptr_read
+EXPORT_SYMBOL sound/pci/hda/snd-hda-codec 0xe39e814f	snd_hda_parse_generic_codec
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x1374846c	snd_ice1712_akm4xxx_init
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x3e057fb6	snd_ice1712_akm4xxx_build_controls
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0xa754c7c1	snd_ice1712_akm4xxx_free
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x028232bf	oxygen_reset_uart
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x029ea9be	oxygen_pci_probe
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x19e502bf	oxygen_write_spi
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x226f5c59	oxygen_write8_masked
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x2bf94979	oxygen_write_i2c
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x37f97d14	oxygen_write_ac97
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x449bec27	oxygen_pci_suspend
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x705cb1e0	oxygen_pci_resume
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x77b43a6b	oxygen_write8
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x8d63e039	oxygen_write16
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xa63b4d2f	oxygen_write32_masked
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xb0ebed08	oxygen_read_ac97
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xbc9c3e3f	oxygen_write32
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xbe953388	oxygen_read32
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xcbaa75a8	oxygen_write_ac97_masked
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xd56626fc	oxygen_write_uart
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xef514e06	oxygen_read16
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xf8ddea90	oxygen_read8
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xfabd8ec3	oxygen_pci_remove
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xfca09f6c	oxygen_write16_masked
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x551ff261	snd_trident_write_voice_regs
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x882c80de	snd_trident_start_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x9b214f38	snd_trident_alloc_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0xbb871e50	snd_trident_stop_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0xc933e92b	snd_trident_free_voice
+EXPORT_SYMBOL sound/soc/codecs/snd-soc-uda134x 0xc5e140f3	uda134x_dai
+EXPORT_SYMBOL sound/sound_firmware 0x39e3dd23	mod_firmware_load
+EXPORT_SYMBOL sound/soundcore 0x0c6d43c9	register_sound_dsp
+EXPORT_SYMBOL sound/soundcore 0x24093d8a	sound_class
+EXPORT_SYMBOL sound/soundcore 0x39fb8b13	register_sound_special_device
+EXPORT_SYMBOL sound/soundcore 0x7afc9d8a	unregister_sound_mixer
+EXPORT_SYMBOL sound/soundcore 0x99c95fa5	unregister_sound_special
+EXPORT_SYMBOL sound/soundcore 0xbdcf1086	register_sound_special
+EXPORT_SYMBOL sound/soundcore 0xbde06982	register_sound_midi
+EXPORT_SYMBOL sound/soundcore 0xc0ffe010	register_sound_mixer
+EXPORT_SYMBOL sound/soundcore 0xcd083b10	unregister_sound_dsp
+EXPORT_SYMBOL sound/soundcore 0xfdab6de3	unregister_sound_midi
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x03d95661	snd_emux_terminate_all
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x5112c24b	snd_emux_unlock_voice
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x5d071c43	snd_emux_lock_voice
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x655cb202	snd_sf_linear_to_log
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x8d588b78	snd_emux_free
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xbed6dca6	snd_emux_new
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xe48482f5	snd_emux_register
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x3cb8aa4a	snd_util_mem_alloc
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x50188c19	snd_util_memhdr_new
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x6f10b9f7	__snd_util_memblk_new
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x6fbee29a	snd_util_mem_free
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x9ebed484	__snd_util_mem_alloc
+EXPORT_SYMBOL sound/synth/snd-util-mem 0xbca0ab87	snd_util_mem_avail
+EXPORT_SYMBOL sound/synth/snd-util-mem 0xd7f605c0	__snd_util_mem_free
+EXPORT_SYMBOL sound/synth/snd-util-mem 0xf1df0594	snd_util_memhdr_free
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0x16756dc0	snd_usbmidi_input_start
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0x22f0dc12	snd_usb_create_midi_interface
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0x63343b1d	snd_usbmidi_input_stop
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0xd9d2bb03	snd_usbmidi_disconnect
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x0b307b11	dm_mem_cache_client_destroy
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x3661f592	dm_mem_cache_grow
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x3ce87bc7	dm_mem_cache_free
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x5981a79a	dm_mem_cache_shrink
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x7343721d	dm_mem_cache_alloc
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x920a7a41	dm_message_parse
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0xf0457e18	dm_mem_cache_client_create
+EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x04dca738	lirc_unregister_driver
+EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x61c7367d	lirc_get_pdata
+EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0xcf5c6635	lirc_register_driver
+EXPORT_SYMBOL vmlinux 0x00000000	per_cpu__softirq_work_list
+EXPORT_SYMBOL vmlinux 0x00189030	inet_put_port
+EXPORT_SYMBOL vmlinux 0x00311088	i2c_smbus_write_word_data
+EXPORT_SYMBOL vmlinux 0x00519a88	vmalloc_to_page
+EXPORT_SYMBOL vmlinux 0x00546468	put_io_context
+EXPORT_SYMBOL vmlinux 0x00801678	flush_scheduled_work
+EXPORT_SYMBOL vmlinux 0x00858f06	elevator_exit
+EXPORT_SYMBOL vmlinux 0x009d258f	_write_lock
+EXPORT_SYMBOL vmlinux 0x00a3fc8b	inet_del_protocol
+EXPORT_SYMBOL vmlinux 0x00c4dc87	timecounter_init
+EXPORT_SYMBOL vmlinux 0x00e8097b	csum_partial_copy_fromiovecend
+EXPORT_SYMBOL vmlinux 0x00fd47fa	generic_readlink
+EXPORT_SYMBOL vmlinux 0x00ff6b38	elv_dispatch_sort
+EXPORT_SYMBOL vmlinux 0x01139ffc	max_mapnr
+EXPORT_SYMBOL vmlinux 0x0125b836	__nla_put_nohdr
+EXPORT_SYMBOL vmlinux 0x013999c7	sk_stream_write_space
+EXPORT_SYMBOL vmlinux 0x01471ea2	kset_unregister
+EXPORT_SYMBOL vmlinux 0x01695b7e	fib_default_rule_add
+EXPORT_SYMBOL vmlinux 0x0186d073	percpu_counter_set
+EXPORT_SYMBOL vmlinux 0x01902adf	netpoll_trap
+EXPORT_SYMBOL vmlinux 0x01a4aab6	set_irq_chip_data
+EXPORT_SYMBOL vmlinux 0x01a77e20	pci_target_state
+EXPORT_SYMBOL vmlinux 0x01c19697	mca_device_status
+EXPORT_SYMBOL vmlinux 0x01d19038	acpi_enable_subsystem
+EXPORT_SYMBOL vmlinux 0x01e08962	dget_locked
+EXPORT_SYMBOL vmlinux 0x01e25c2f	tty_pair_get_pty
+EXPORT_SYMBOL vmlinux 0x01e9f647	inet_shutdown
+EXPORT_SYMBOL vmlinux 0x0204ba5f	sync_blockdev
+EXPORT_SYMBOL vmlinux 0x02124474	ip_send_check
+EXPORT_SYMBOL vmlinux 0x0214460b	blk_plug_device
+EXPORT_SYMBOL vmlinux 0x021ca87b	mb_cache_entry_find_next
+EXPORT_SYMBOL vmlinux 0x022da5cd	arch_acpi_processor_init_pdc
+EXPORT_SYMBOL vmlinux 0x0237b57a	arch_unregister_cpu
+EXPORT_SYMBOL vmlinux 0x0256389f	bit_waitqueue
+EXPORT_SYMBOL vmlinux 0x02649054	security_sock_rcv_skb
+EXPORT_SYMBOL vmlinux 0x02701009	simple_transaction_get
+EXPORT_SYMBOL vmlinux 0x029444f0	native_read_tsc
+EXPORT_SYMBOL vmlinux 0x029ed7b0	inode_claim_rsv_space
+EXPORT_SYMBOL vmlinux 0x02a6ce5a	crc16_table
+EXPORT_SYMBOL vmlinux 0x02aff2f4	acpi_install_gpe_handler
+EXPORT_SYMBOL vmlinux 0x02ccfd7f	posix_test_lock
+EXPORT_SYMBOL vmlinux 0x02d81845	audit_log_task_context
+EXPORT_SYMBOL vmlinux 0x02e6bf78	jbd2_journal_ack_err
+EXPORT_SYMBOL vmlinux 0x02ee26c1	free_pages_exact
+EXPORT_SYMBOL vmlinux 0x02f692b7	i2c_put_adapter
+EXPORT_SYMBOL vmlinux 0x03190455	vmap
+EXPORT_SYMBOL vmlinux 0x0334da4e	scsi_command_size_tbl
+EXPORT_SYMBOL vmlinux 0x0340d0e1	acpi_pci_osc_control_set
+EXPORT_SYMBOL vmlinux 0x037a0cba	kfree
+EXPORT_SYMBOL vmlinux 0x037a7390	sock_queue_rcv_skb
+EXPORT_SYMBOL vmlinux 0x03b5445d	serio_unregister_child_port
+EXPORT_SYMBOL vmlinux 0x03b8211b	dquot_release_reserved_space
+EXPORT_SYMBOL vmlinux 0x03c06156	bitmap_fold
+EXPORT_SYMBOL vmlinux 0x03d41776	acpi_unlock_battery_dir
+EXPORT_SYMBOL vmlinux 0x03f64e89	sock_alloc_send_pskb
+EXPORT_SYMBOL vmlinux 0x03fd2571	vm_unmap_ram
+EXPORT_SYMBOL vmlinux 0x0422fe4a	inet_csk_timer_bug_msg
+EXPORT_SYMBOL vmlinux 0x043140ec	jbd2_journal_init_jbd_inode
+EXPORT_SYMBOL vmlinux 0x04329478	new_inode
+EXPORT_SYMBOL vmlinux 0x04633cd2	tcf_em_tree_validate
+EXPORT_SYMBOL vmlinux 0x04667c89	acpi_processor_notify_smm
+EXPORT_SYMBOL vmlinux 0x0487f831	fb_find_best_display
+EXPORT_SYMBOL vmlinux 0x04ae0fce	xfrm_state_delete_tunnel
+EXPORT_SYMBOL vmlinux 0x04c39666	scsi_free_command
+EXPORT_SYMBOL vmlinux 0x04d8c750	release_perfctr_nmi
+EXPORT_SYMBOL vmlinux 0x04df01d8	journal_stop
+EXPORT_SYMBOL vmlinux 0x0506fa67	neigh_event_ns
+EXPORT_SYMBOL vmlinux 0x05240ee7	percpu_counter_batch
+EXPORT_SYMBOL vmlinux 0x054050d6	skb_gro_reset_offset
+EXPORT_SYMBOL vmlinux 0x055d67c2	netpoll_cleanup
+EXPORT_SYMBOL vmlinux 0x057a787e	wait_on_page_bit
+EXPORT_SYMBOL vmlinux 0x057ce975	hex_dump_to_buffer
+EXPORT_SYMBOL vmlinux 0x05b597c4	invalidate_inodes
+EXPORT_SYMBOL vmlinux 0x06023b8b	__blk_run_queue
+EXPORT_SYMBOL vmlinux 0x061651be	strcat
+EXPORT_SYMBOL vmlinux 0x064bdf56	pci_setup_cardbus
+EXPORT_SYMBOL vmlinux 0x065cfa0a	sync_mapping_buffers
+EXPORT_SYMBOL vmlinux 0x0660e0ee	invalidate_bdev
+EXPORT_SYMBOL vmlinux 0x066cb2a9	scsi_is_host_device
+EXPORT_SYMBOL vmlinux 0x067d8d35	security_release_secctx
+EXPORT_SYMBOL vmlinux 0x06935920	dentry_unhash
+EXPORT_SYMBOL vmlinux 0x06add1fe	fb_blank
+EXPORT_SYMBOL vmlinux 0x06c598ba	bh_submit_read
+EXPORT_SYMBOL vmlinux 0x06d41458	pci_bus_read_config_byte
+EXPORT_SYMBOL vmlinux 0x06d728b1	tcp_parse_md5sig_option
+EXPORT_SYMBOL vmlinux 0x06eb8dd7	lro_vlan_hwaccel_receive_frags
+EXPORT_SYMBOL vmlinux 0x06fe3b14	default_grn
+EXPORT_SYMBOL vmlinux 0x0727c4f3	iowrite8
+EXPORT_SYMBOL vmlinux 0x0735a85b	tty_pair_get_tty
+EXPORT_SYMBOL vmlinux 0x073dfa12	generate_resume_trace
+EXPORT_SYMBOL vmlinux 0x074ed1e6	atomic_dec_and_mutex_lock
+EXPORT_SYMBOL vmlinux 0x0758d94a	dm_get_device
+EXPORT_SYMBOL vmlinux 0x075fabd8	kick_iocb
+EXPORT_SYMBOL vmlinux 0x07608604	acpi_get_vendor_resource
+EXPORT_SYMBOL vmlinux 0x0799aca4	local_bh_enable
+EXPORT_SYMBOL vmlinux 0x0799c50a	param_set_ulong
+EXPORT_SYMBOL vmlinux 0x07a3dd2c	blk_queue_max_sectors
+EXPORT_SYMBOL vmlinux 0x07a890c8	fb_alloc_cmap
+EXPORT_SYMBOL vmlinux 0x07cc4a5d	printk_timed_ratelimit
+EXPORT_SYMBOL vmlinux 0x07d50a24	csum_partial
+EXPORT_SYMBOL vmlinux 0x07d98454	__bio_clone
+EXPORT_SYMBOL vmlinux 0x07d9b783	scsi_nl_send_vendor_msg
+EXPORT_SYMBOL vmlinux 0x07ebcd06	scsi_dma_map
+EXPORT_SYMBOL vmlinux 0x081dc68e	get_sb_nodev
+EXPORT_SYMBOL vmlinux 0x082c3213	pci_root_buses
+EXPORT_SYMBOL vmlinux 0x0834f7ae	blk_rq_map_kern
+EXPORT_SYMBOL vmlinux 0x083a9117	__register_chrdev
+EXPORT_SYMBOL vmlinux 0x083e0623	pcim_iounmap
+EXPORT_SYMBOL vmlinux 0x08a400f7	vfs_quota_enable
+EXPORT_SYMBOL vmlinux 0x08a71fb3	starget_for_each_device
+EXPORT_SYMBOL vmlinux 0x08aa353b	proto_unregister
+EXPORT_SYMBOL vmlinux 0x08d51069	generic_file_splice_write
+EXPORT_SYMBOL vmlinux 0x08d66a3a	warn_slowpath_fmt
+EXPORT_SYMBOL vmlinux 0x090f1050	blk_rq_unmap_user
+EXPORT_SYMBOL vmlinux 0x0912f3f6	__skb_checksum_complete
+EXPORT_SYMBOL vmlinux 0x09144253	sysctl_string
+EXPORT_SYMBOL vmlinux 0x0933aae1	efi_enabled
+EXPORT_SYMBOL vmlinux 0x0948cde9	num_physpages
+EXPORT_SYMBOL vmlinux 0x098b71c6	fb_dealloc_cmap
+EXPORT_SYMBOL vmlinux 0x09b56be6	sock_wake_async
+EXPORT_SYMBOL vmlinux 0x09c55cec	schedule_timeout_interruptible
+EXPORT_SYMBOL vmlinux 0x09d20e95	register_netdev
+EXPORT_SYMBOL vmlinux 0x09d44df9	in_lock_functions
+EXPORT_SYMBOL vmlinux 0x09e78ee4	unregister_key_type
+EXPORT_SYMBOL vmlinux 0x09ef6732	phy_mii_ioctl
+EXPORT_SYMBOL vmlinux 0x0a082916	input_register_handler
+EXPORT_SYMBOL vmlinux 0x0a1e87f9	atomic64_add_negative
+EXPORT_SYMBOL vmlinux 0x0a2487e0	unblock_all_signals
+EXPORT_SYMBOL vmlinux 0x0a3131f6	strnchr
+EXPORT_SYMBOL vmlinux 0x0a4747ff	allocate_resource
+EXPORT_SYMBOL vmlinux 0x0a745916	llc_sap_close
+EXPORT_SYMBOL vmlinux 0x0aac1dad	tty_driver_flush_buffer
+EXPORT_SYMBOL vmlinux 0x0acb1a3c	__bitmap_shift_right
+EXPORT_SYMBOL vmlinux 0x0acf7679	dma_issue_pending_all
+EXPORT_SYMBOL vmlinux 0x0b06ac53	bitmap_endwrite
+EXPORT_SYMBOL vmlinux 0x0b0c2dd5	pnp_disable_dev
+EXPORT_SYMBOL vmlinux 0x0b0d888b	icmpv6_err_convert
+EXPORT_SYMBOL vmlinux 0x0b1beb31	vmalloc_32_user
+EXPORT_SYMBOL vmlinux 0x0b4d6cb2	scsi_remove_target
+EXPORT_SYMBOL vmlinux 0x0b5d1b99	linkwatch_fire_event
+EXPORT_SYMBOL vmlinux 0x0b742fd7	simple_strtol
+EXPORT_SYMBOL vmlinux 0x0b946ed5	pcim_iounmap_regions
+EXPORT_SYMBOL vmlinux 0x0b9d1d01	ps2_cmd_aborted
+EXPORT_SYMBOL vmlinux 0x0c069012	request_key_async
+EXPORT_SYMBOL vmlinux 0x0c0b745a	blk_queue_update_dma_alignment
+EXPORT_SYMBOL vmlinux 0x0c600ea3	fsync_bdev
+EXPORT_SYMBOL vmlinux 0x0c65e73c	scsi_normalize_sense
+EXPORT_SYMBOL vmlinux 0x0c7452dc	vfs_mkdir
+EXPORT_SYMBOL vmlinux 0x0c83361e	simple_dir_operations
+EXPORT_SYMBOL vmlinux 0x0c8ba030	put_disk
+EXPORT_SYMBOL vmlinux 0x0c8c9e99	scsi_show_extd_sense
+EXPORT_SYMBOL vmlinux 0x0c9482ee	dmam_alloc_noncoherent
+EXPORT_SYMBOL vmlinux 0x0cae232b	utf16s_to_utf8s
+EXPORT_SYMBOL vmlinux 0x0cbebb5e	pnp_stop_dev
+EXPORT_SYMBOL vmlinux 0x0cc1fb95	simple_getattr
+EXPORT_SYMBOL vmlinux 0x0ce256e9	d_genocide
+EXPORT_SYMBOL vmlinux 0x0d05d902	input_get_keycode
+EXPORT_SYMBOL vmlinux 0x0d26a76d	_write_lock_irq
+EXPORT_SYMBOL vmlinux 0x0d32135e	rfkill_set_hw_state
+EXPORT_SYMBOL vmlinux 0x0d3dda14	acpi_get_type
+EXPORT_SYMBOL vmlinux 0x0d3df9a8	dev_set_allmulti
+EXPORT_SYMBOL vmlinux 0x0d43327b	splice_from_pipe_begin
+EXPORT_SYMBOL vmlinux 0x0d4b77b7	gen_pool_add
+EXPORT_SYMBOL vmlinux 0x0d542439	__ipv6_addr_type
+EXPORT_SYMBOL vmlinux 0x0d6c963c	copy_from_user
+EXPORT_SYMBOL vmlinux 0x0d846bf0	ip_route_output_key
+EXPORT_SYMBOL vmlinux 0x0d880cb2	scsi_register_interface
+EXPORT_SYMBOL vmlinux 0x0d8a53cb	filemap_fdatawrite
+EXPORT_SYMBOL vmlinux 0x0d938959	noop_qdisc
+EXPORT_SYMBOL vmlinux 0x0d9be39d	neigh_ifdown
+EXPORT_SYMBOL vmlinux 0x0da10ec3	security_sock_graft
+EXPORT_SYMBOL vmlinux 0x0da6a925	napi_gro_frags
+EXPORT_SYMBOL vmlinux 0x0da6bbcd	d_add_ci
+EXPORT_SYMBOL vmlinux 0x0dc0e91d	dm_dirty_log_destroy
+EXPORT_SYMBOL vmlinux 0x0ddb634c	elv_rq_merge_ok
+EXPORT_SYMBOL vmlinux 0x0deaba42	phy_driver_register
+EXPORT_SYMBOL vmlinux 0x0df98ab7	datagram_poll
+EXPORT_SYMBOL vmlinux 0x0e0be358	unregister_con_driver
+EXPORT_SYMBOL vmlinux 0x0e1930b4	scsi_allocate_command
+EXPORT_SYMBOL vmlinux 0x0e2cde27	proc_dostring
+EXPORT_SYMBOL vmlinux 0x0e39aa87	dqput
+EXPORT_SYMBOL vmlinux 0x0e423fa5	acpi_bus_generate_proc_event
+EXPORT_SYMBOL vmlinux 0x0e480a88	input_open_device
+EXPORT_SYMBOL vmlinux 0x0e52592a	panic
+EXPORT_SYMBOL vmlinux 0x0e5465af	journal_get_create_access
+EXPORT_SYMBOL vmlinux 0x0e693ed9	k8_northbridges
+EXPORT_SYMBOL vmlinux 0x0e6980af	km_report
+EXPORT_SYMBOL vmlinux 0x0e7f34a7	nf_afinfo
+EXPORT_SYMBOL vmlinux 0x0e83fea1	del_timer_sync
+EXPORT_SYMBOL vmlinux 0x0ea492a7	generic_file_llseek_unlocked
+EXPORT_SYMBOL vmlinux 0x0eb205d9	generic_delete_inode
+EXPORT_SYMBOL vmlinux 0x0ebc9885	proc_doulongvec_ms_jiffies_minmax
+EXPORT_SYMBOL vmlinux 0x0ec31896	ipv6_setsockopt
+EXPORT_SYMBOL vmlinux 0x0ec64ff1	blk_queue_logical_block_size
+EXPORT_SYMBOL vmlinux 0x0ecc9826	follow_up
+EXPORT_SYMBOL vmlinux 0x0f0e68e8	iov_iter_copy_from_user
+EXPORT_SYMBOL vmlinux 0x0f1ef871	posix_acl_alloc
+EXPORT_SYMBOL vmlinux 0x0f206f84	pci_find_bus
+EXPORT_SYMBOL vmlinux 0x0f5538a3	neigh_seq_start
+EXPORT_SYMBOL vmlinux 0x0f615c56	tty_schedule_flip
+EXPORT_SYMBOL vmlinux 0x0fd00a68	acpi_clear_event
+EXPORT_SYMBOL vmlinux 0x0ff2b602	slhc_compress
+EXPORT_SYMBOL vmlinux 0x1057663f	xfrm_policy_delete
+EXPORT_SYMBOL vmlinux 0x105e2727	__tracepoint_kmalloc
+EXPORT_SYMBOL vmlinux 0x1067b02f	nla_reserve
+EXPORT_SYMBOL vmlinux 0x108e8985	param_get_uint
+EXPORT_SYMBOL vmlinux 0x1098c922	i2c_smbus_read_word_data
+EXPORT_SYMBOL vmlinux 0x10a7fb69	nobh_write_end
+EXPORT_SYMBOL vmlinux 0x10ad2524	vc_resize
+EXPORT_SYMBOL vmlinux 0x10b8424c	simple_unlink
+EXPORT_SYMBOL vmlinux 0x10e389cb	open_by_devnum
+EXPORT_SYMBOL vmlinux 0x10e3bb29	clear_page_dirty_for_io
+EXPORT_SYMBOL vmlinux 0x10ee20bb	default_blu
+EXPORT_SYMBOL vmlinux 0x10ff42a4	devm_ioport_unmap
+EXPORT_SYMBOL vmlinux 0x11267875	scsi_extd_sense_format
+EXPORT_SYMBOL vmlinux 0x1129f521	fb_set_cmap
+EXPORT_SYMBOL vmlinux 0x115b789d	ethtool_op_set_flags
+EXPORT_SYMBOL vmlinux 0x1163f0a7	blk_max_low_pfn
+EXPORT_SYMBOL vmlinux 0x116f79f6	mntput_no_expire
+EXPORT_SYMBOL vmlinux 0x117093be	qdisc_class_hash_init
+EXPORT_SYMBOL vmlinux 0x118f01ea	putname
+EXPORT_SYMBOL vmlinux 0x11949951	tcp_close
+EXPORT_SYMBOL vmlinux 0x11a0b98c	sk_filter
+EXPORT_SYMBOL vmlinux 0x11a18b14	__wake_up_bit
+EXPORT_SYMBOL vmlinux 0x11a2cbcc	dm_put_device
+EXPORT_SYMBOL vmlinux 0x11a9b40b	tty_port_close_end
+EXPORT_SYMBOL vmlinux 0x11c16423	sock_no_connect
+EXPORT_SYMBOL vmlinux 0x11cca353	pci_get_subsys
+EXPORT_SYMBOL vmlinux 0x11ebecef	alloc_etherdev_mq
+EXPORT_SYMBOL vmlinux 0x11ee6063	slow_work_enqueue
+EXPORT_SYMBOL vmlinux 0x120507ac	idr_get_new
+EXPORT_SYMBOL vmlinux 0x126936fd	contig_page_data
+EXPORT_SYMBOL vmlinux 0x129f88fb	ps2_drain
+EXPORT_SYMBOL vmlinux 0x12da5bb2	__kmalloc
+EXPORT_SYMBOL vmlinux 0x12dad5c6	skb_queue_head
+EXPORT_SYMBOL vmlinux 0x12f10736	udplite_table
+EXPORT_SYMBOL vmlinux 0x12f5bbd0	d_alloc_name
+EXPORT_SYMBOL vmlinux 0x13082cb2	journal_try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0x132b9616	nf_ct_attach
+EXPORT_SYMBOL vmlinux 0x134a2317	__ip_select_ident
+EXPORT_SYMBOL vmlinux 0x136c2c83	block_write_full_page
+EXPORT_SYMBOL vmlinux 0x13718c93	scsi_eh_prep_cmnd
+EXPORT_SYMBOL vmlinux 0x1378e714	acpi_video_display_switch_support
+EXPORT_SYMBOL vmlinux 0x13bc9509	acpi_lock_battery_dir
+EXPORT_SYMBOL vmlinux 0x13d6217d	send_sig
+EXPORT_SYMBOL vmlinux 0x13f42152	system_entering_hibernation
+EXPORT_SYMBOL vmlinux 0x1401dc84	tcp_v4_conn_request
+EXPORT_SYMBOL vmlinux 0x1430e6e0	unregister_acpi_notifier
+EXPORT_SYMBOL vmlinux 0x14778cad	proc_dointvec
+EXPORT_SYMBOL vmlinux 0x147be269	xfrm_policy_destroy
+EXPORT_SYMBOL vmlinux 0x147e004c	vfs_fsync
+EXPORT_SYMBOL vmlinux 0x14a04e10	textsearch_prepare
+EXPORT_SYMBOL vmlinux 0x14af0cf7	gen_pool_destroy
+EXPORT_SYMBOL vmlinux 0x14b2a497	skb_recycle_check
+EXPORT_SYMBOL vmlinux 0x14bf0022	current_fs_time
+EXPORT_SYMBOL vmlinux 0x151d2992	pci_restore_state
+EXPORT_SYMBOL vmlinux 0x1538d832	phy_connect
+EXPORT_SYMBOL vmlinux 0x1546a81c	md_unregister_thread
+EXPORT_SYMBOL vmlinux 0x1551dc51	bitmap_find_free_region
+EXPORT_SYMBOL vmlinux 0x1556e323	find_get_page
+EXPORT_SYMBOL vmlinux 0x15d9ada5	jbd2_journal_forget
+EXPORT_SYMBOL vmlinux 0x15ef2dd9	kfifo_free
+EXPORT_SYMBOL vmlinux 0x15fc643a	generic_shutdown_super
+EXPORT_SYMBOL vmlinux 0x160ea4c8	sfi_disabled
+EXPORT_SYMBOL vmlinux 0x16305289	warn_slowpath_null
+EXPORT_SYMBOL vmlinux 0x16311892	blk_queue_max_hw_sectors
+EXPORT_SYMBOL vmlinux 0x1635d608	iput
+EXPORT_SYMBOL vmlinux 0x16376f86	misc_register
+EXPORT_SYMBOL vmlinux 0x163c5e39	twl4030_i2c_read
+EXPORT_SYMBOL vmlinux 0x16402df1	ppp_unit_number
+EXPORT_SYMBOL vmlinux 0x1666466a	flock_lock_file_wait
+EXPORT_SYMBOL vmlinux 0x167cd4ce	dma_set_mask
+EXPORT_SYMBOL vmlinux 0x167e7f9d	__get_user_1
+EXPORT_SYMBOL vmlinux 0x16a52302	pci_bus_find_capability
+EXPORT_SYMBOL vmlinux 0x16b1f75d	arp_create
+EXPORT_SYMBOL vmlinux 0x16cafbff	deactivate_super
+EXPORT_SYMBOL vmlinux 0x16e4f82c	register_qdisc
+EXPORT_SYMBOL vmlinux 0x16ee33a5	simple_fsync
+EXPORT_SYMBOL vmlinux 0x170c25ee	acpi_get_next_object
+EXPORT_SYMBOL vmlinux 0x1717a79c	alloc_file
+EXPORT_SYMBOL vmlinux 0x171ccea6	pnpbios_protocol
+EXPORT_SYMBOL vmlinux 0x17375a3e	input_close_device
+EXPORT_SYMBOL vmlinux 0x174ec108	xfrm_state_flush
+EXPORT_SYMBOL vmlinux 0x175f625c	i2c_get_adapter
+EXPORT_SYMBOL vmlinux 0x1780bcab	seq_puts
+EXPORT_SYMBOL vmlinux 0x17afd432	__mark_inode_dirty
+EXPORT_SYMBOL vmlinux 0x17b53f96	vfs_quota_sync
+EXPORT_SYMBOL vmlinux 0x17b99486	splice_direct_to_actor
+EXPORT_SYMBOL vmlinux 0x17d2bb99	vlan_gro_frags
+EXPORT_SYMBOL vmlinux 0x17dee287	tty_port_init
+EXPORT_SYMBOL vmlinux 0x17df17bc	sysctl_tcp_ecn
+EXPORT_SYMBOL vmlinux 0x17e2915f	blk_queue_max_segment_size
+EXPORT_SYMBOL vmlinux 0x17f2151f	cfb_fillrect
+EXPORT_SYMBOL vmlinux 0x17f341a0	i8042_lock_chip
+EXPORT_SYMBOL vmlinux 0x181b6ff2	mempool_resize
+EXPORT_SYMBOL vmlinux 0x181de7ab	journal_init_dev
+EXPORT_SYMBOL vmlinux 0x181efb46	skb_unlink
+EXPORT_SYMBOL vmlinux 0x1828341c	inet_frags_exit_net
+EXPORT_SYMBOL vmlinux 0x183fa88b	mempool_alloc_slab
+EXPORT_SYMBOL vmlinux 0x1845e7c5	acpi_evaluate_integer
+EXPORT_SYMBOL vmlinux 0x184b82fb	mmc_vddrange_to_ocrmask
+EXPORT_SYMBOL vmlinux 0x184ec5d2	vfs_write
+EXPORT_SYMBOL vmlinux 0x185c4e1c	pnp_register_driver
+EXPORT_SYMBOL vmlinux 0x1867954f	nf_log_unregister
+EXPORT_SYMBOL vmlinux 0x187fea42	acpi_check_resource_conflict
+EXPORT_SYMBOL vmlinux 0x189673b6	nf_register_hook
+EXPORT_SYMBOL vmlinux 0x18b44ebf	bio_uncopy_user
+EXPORT_SYMBOL vmlinux 0x18e2bd55	insert_inode_locked
+EXPORT_SYMBOL vmlinux 0x19011144	mark_page_accessed
+EXPORT_SYMBOL vmlinux 0x19056b80	per_cpu__current_task
+EXPORT_SYMBOL vmlinux 0x191aabe9	skb_clone
+EXPORT_SYMBOL vmlinux 0x19595206	arp_xmit
+EXPORT_SYMBOL vmlinux 0x195a42b3	loop_register_transfer
+EXPORT_SYMBOL vmlinux 0x195e7d1b	check_disk_size_change
+EXPORT_SYMBOL vmlinux 0x196a1134	acpi_notifier_call_chain
+EXPORT_SYMBOL vmlinux 0x19728a8b	bio_integrity_add_page
+EXPORT_SYMBOL vmlinux 0x1976bc16	__tracepoint_kmem_cache_free
+EXPORT_SYMBOL vmlinux 0x1985ed3c	prepare_to_wait_exclusive
+EXPORT_SYMBOL vmlinux 0x19908542	bio_copy_kern
+EXPORT_SYMBOL vmlinux 0x199afd80	inode_sub_bytes
+EXPORT_SYMBOL vmlinux 0x199ed0cd	net_disable_timestamp
+EXPORT_SYMBOL vmlinux 0x199f619e	request_firmware
+EXPORT_SYMBOL vmlinux 0x19a2cbbc	tty_unthrottle
+EXPORT_SYMBOL vmlinux 0x19d5d20a	acpi_walk_namespace
+EXPORT_SYMBOL vmlinux 0x19fbc50d	get_unmapped_area_prot
+EXPORT_SYMBOL vmlinux 0x1a1ae86e	dm_register_target
+EXPORT_SYMBOL vmlinux 0x1a23726e	eth_type_trans
+EXPORT_SYMBOL vmlinux 0x1a45cb6c	acpi_disabled
+EXPORT_SYMBOL vmlinux 0x1a75caa3	_read_lock
+EXPORT_SYMBOL vmlinux 0x1a8a845e	idle_nomwait
+EXPORT_SYMBOL vmlinux 0x1aca90ba	set_groups
+EXPORT_SYMBOL vmlinux 0x1ace138d	bitmap_allocate_region
+EXPORT_SYMBOL vmlinux 0x1aef4c0d	jbd2_journal_get_write_access
+EXPORT_SYMBOL vmlinux 0x1af1b05d	backlight_device_register
+EXPORT_SYMBOL vmlinux 0x1b015d25	bitmap_parselist
+EXPORT_SYMBOL vmlinux 0x1b1689f2	unregister_binfmt
+EXPORT_SYMBOL vmlinux 0x1b18dac9	inet_frags_init
+EXPORT_SYMBOL vmlinux 0x1b40ce3f	journal_release_buffer
+EXPORT_SYMBOL vmlinux 0x1b445884	sk_alloc
+EXPORT_SYMBOL vmlinux 0x1b6314fd	in_aton
+EXPORT_SYMBOL vmlinux 0x1b89419f	add_wait_queue_exclusive
+EXPORT_SYMBOL vmlinux 0x1b8b95ad	i8042_unlock_chip
+EXPORT_SYMBOL vmlinux 0x1b9981cc	set_irq_wake
+EXPORT_SYMBOL vmlinux 0x1b9e0ff1	scsilun_to_int
+EXPORT_SYMBOL vmlinux 0x1bc4aeea	register_cdrom
+EXPORT_SYMBOL vmlinux 0x1bc9051a	kunmap_high
+EXPORT_SYMBOL vmlinux 0x1bdf4684	dma_async_memcpy_pg_to_pg
+EXPORT_SYMBOL vmlinux 0x1c0cbdb6	__mmc_claim_host
+EXPORT_SYMBOL vmlinux 0x1c1af916	set_normalized_timespec
+EXPORT_SYMBOL vmlinux 0x1c5dc9b9	__blk_end_request_all
+EXPORT_SYMBOL vmlinux 0x1c8a04b0	acpi_reset
+EXPORT_SYMBOL vmlinux 0x1c94280e	__scsi_device_lookup
+EXPORT_SYMBOL vmlinux 0x1caffb4d	clocksource_change_rating
+EXPORT_SYMBOL vmlinux 0x1cb22739	dma_pool_alloc
+EXPORT_SYMBOL vmlinux 0x1cb79055	__pci_register_driver
+EXPORT_SYMBOL vmlinux 0x1cc6719a	register_reboot_notifier
+EXPORT_SYMBOL vmlinux 0x1ce7ec4c	rwsem_wake
+EXPORT_SYMBOL vmlinux 0x1cefe352	wait_for_completion
+EXPORT_SYMBOL vmlinux 0x1ceffff8	pci_bus_write_config_byte
+EXPORT_SYMBOL vmlinux 0x1cfa47ce	tty_kref_put
+EXPORT_SYMBOL vmlinux 0x1d0f5561	dmam_alloc_coherent
+EXPORT_SYMBOL vmlinux 0x1d2e87c6	do_gettimeofday
+EXPORT_SYMBOL vmlinux 0x1d746641	rfkill_set_led_trigger_name
+EXPORT_SYMBOL vmlinux 0x1dada15d	pci_dev_driver
+EXPORT_SYMBOL vmlinux 0x1dbcb9e1	vlan_ioctl_set
+EXPORT_SYMBOL vmlinux 0x1dc36131	fb_destroy_modedb
+EXPORT_SYMBOL vmlinux 0x1dcffa4f	inet_frag_destroy
+EXPORT_SYMBOL vmlinux 0x1dd571e6	fb_copy_cmap
+EXPORT_SYMBOL vmlinux 0x1e141333	netif_napi_del
+EXPORT_SYMBOL vmlinux 0x1e1b774b	tcf_exts_dump_stats
+EXPORT_SYMBOL vmlinux 0x1e6387b8	set_device_ro
+EXPORT_SYMBOL vmlinux 0x1e6d26a8	strstr
+EXPORT_SYMBOL vmlinux 0x1e6dae50	xfrm4_rcv
+EXPORT_SYMBOL vmlinux 0x1e790b14	journal_invalidatepage
+EXPORT_SYMBOL vmlinux 0x1e7da043	block_write_begin
+EXPORT_SYMBOL vmlinux 0x1eb666fe	__skb_checksum_complete_head
+EXPORT_SYMBOL vmlinux 0x1ebed3d8	neigh_connected_output
+EXPORT_SYMBOL vmlinux 0x1ec6622e	tcp_check_req
+EXPORT_SYMBOL vmlinux 0x1ecb9943	posix_acl_to_xattr
+EXPORT_SYMBOL vmlinux 0x1edc1e4a	dput
+EXPORT_SYMBOL vmlinux 0x1edcd65c	find_inode_number
+EXPORT_SYMBOL vmlinux 0x1ef08f00	kmem_cache_shrink
+EXPORT_SYMBOL vmlinux 0x1ef40371	xfrm_find_acq_byseq
+EXPORT_SYMBOL vmlinux 0x1efcde06	blk_requeue_request
+EXPORT_SYMBOL vmlinux 0x1efe283f	__cap_full_set
+EXPORT_SYMBOL vmlinux 0x1f210bf8	block_truncate_page
+EXPORT_SYMBOL vmlinux 0x1f305993	kobject_set_name
+EXPORT_SYMBOL vmlinux 0x1f66ea29	__wait_on_buffer
+EXPORT_SYMBOL vmlinux 0x1f69573a	kset_register
+EXPORT_SYMBOL vmlinux 0x1f7cda29	ipv4_specific
+EXPORT_SYMBOL vmlinux 0x1f80a973	write_inode_now
+EXPORT_SYMBOL vmlinux 0x1f9d2b69	input_grab_device
+EXPORT_SYMBOL vmlinux 0x1feb6553	inet_frags_fini
+EXPORT_SYMBOL vmlinux 0x1ff69dd8	vfs_fstatat
+EXPORT_SYMBOL vmlinux 0x1fff307c	pcie_set_readrq
+EXPORT_SYMBOL vmlinux 0x20000329	simple_strtoul
+EXPORT_SYMBOL vmlinux 0x2005e68a	acpi_remove_fixed_event_handler
+EXPORT_SYMBOL vmlinux 0x2029ac31	ip4_datagram_connect
+EXPORT_SYMBOL vmlinux 0x2033b732	ether_setup
+EXPORT_SYMBOL vmlinux 0x20385c58	genl_register_mc_group
+EXPORT_SYMBOL vmlinux 0x203ab9bb	__bforget
+EXPORT_SYMBOL vmlinux 0x204e72b5	tty_port_tty_get
+EXPORT_SYMBOL vmlinux 0x205cdeef	qdisc_watchdog_cancel
+EXPORT_SYMBOL vmlinux 0x206439cb	dev_disable_lro
+EXPORT_SYMBOL vmlinux 0x206f0cd1	register_sysctl_table
+EXPORT_SYMBOL vmlinux 0x20750ce9	unregister_nls
+EXPORT_SYMBOL vmlinux 0x2075a81d	mb_cache_entry_release
+EXPORT_SYMBOL vmlinux 0x208739f6	acpi_load_table
+EXPORT_SYMBOL vmlinux 0x20a3f3d4	simple_transaction_release
+EXPORT_SYMBOL vmlinux 0x20e73ff8	skb_kill_datagram
+EXPORT_SYMBOL vmlinux 0x20fa4436	clear_inode
+EXPORT_SYMBOL vmlinux 0x210514ae	serio_unregister_driver
+EXPORT_SYMBOL vmlinux 0x21128764	neigh_table_init_no_netlink
+EXPORT_SYMBOL vmlinux 0x211dd28e	eth_change_mtu
+EXPORT_SYMBOL vmlinux 0x2127373f	bdi_register_dev
+EXPORT_SYMBOL vmlinux 0x2129f688	netdev_features_change
+EXPORT_SYMBOL vmlinux 0x212ba11e	get_write_access
+EXPORT_SYMBOL vmlinux 0x215ebd78	bitrev16
+EXPORT_SYMBOL vmlinux 0x2162a527	dev_getbyhwaddr
+EXPORT_SYMBOL vmlinux 0x2173f299	override_creds
+EXPORT_SYMBOL vmlinux 0x217cc013	default_llseek
+EXPORT_SYMBOL vmlinux 0x218b5afb	ip_cmsg_recv
+EXPORT_SYMBOL vmlinux 0x21990731	__ht_create_irq
+EXPORT_SYMBOL vmlinux 0x219dc050	i2c_add_adapter
+EXPORT_SYMBOL vmlinux 0x21cf563c	sock_no_bind
+EXPORT_SYMBOL vmlinux 0x21d50a51	tcf_hash_release
+EXPORT_SYMBOL vmlinux 0x21e0ea22	acpi_get_id
+EXPORT_SYMBOL vmlinux 0x220ea3ea	mark_buffer_async_write
+EXPORT_SYMBOL vmlinux 0x222e7ce2	sysfs_streq
+EXPORT_SYMBOL vmlinux 0x2245e563	input_set_capability
+EXPORT_SYMBOL vmlinux 0x22498806	sock_common_setsockopt
+EXPORT_SYMBOL vmlinux 0x226e86a9	audit_log
+EXPORT_SYMBOL vmlinux 0x22737f92	mb_cache_entry_free
+EXPORT_SYMBOL vmlinux 0x2288378f	system_state
+EXPORT_SYMBOL vmlinux 0x22904475	submit_bio
+EXPORT_SYMBOL vmlinux 0x2293c5d1	arp_broken_ops
+EXPORT_SYMBOL vmlinux 0x229f21c4	vm_insert_mixed
+EXPORT_SYMBOL vmlinux 0x22a73912	__tcp_put_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x22b325d5	kd_mksound
+EXPORT_SYMBOL vmlinux 0x22b6533b	xfrm_sad_getinfo
+EXPORT_SYMBOL vmlinux 0x22d21d1f	dev_getfirstbyhwtype
+EXPORT_SYMBOL vmlinux 0x22da43f4	notify_change
+EXPORT_SYMBOL vmlinux 0x230be2c6	tcf_register_action
+EXPORT_SYMBOL vmlinux 0x23244b72	udp_poll
+EXPORT_SYMBOL vmlinux 0x23269a13	strict_strtoul
+EXPORT_SYMBOL vmlinux 0x234c3d3d	install_exec_creds
+EXPORT_SYMBOL vmlinux 0x2359fefd	have_submounts
+EXPORT_SYMBOL vmlinux 0x2398d01b	keyring_search
+EXPORT_SYMBOL vmlinux 0x23b511b5	jbd2_journal_check_available_features
+EXPORT_SYMBOL vmlinux 0x23bff316	skb_queue_tail
+EXPORT_SYMBOL vmlinux 0x23c8f257	slhc_uncompress
+EXPORT_SYMBOL vmlinux 0x23dc5d00	dm_unregister_target
+EXPORT_SYMBOL vmlinux 0x23f1d07d	blk_fetch_request
+EXPORT_SYMBOL vmlinux 0x23f66231	register_sysctl_paths
+EXPORT_SYMBOL vmlinux 0x23fd3028	vmalloc_node
+EXPORT_SYMBOL vmlinux 0x24068d97	locks_copy_lock
+EXPORT_SYMBOL vmlinux 0x240ee02c	mca_device_read_pos
+EXPORT_SYMBOL vmlinux 0x240f9bb5	blk_init_queue
+EXPORT_SYMBOL vmlinux 0x242d1cd3	slow_work_register_user
+EXPORT_SYMBOL vmlinux 0x2435f27f	task_nice
+EXPORT_SYMBOL vmlinux 0x243ffddc	idr_destroy
+EXPORT_SYMBOL vmlinux 0x24428be5	strncpy_from_user
+EXPORT_SYMBOL vmlinux 0x244459d6	lro_receive_frags
+EXPORT_SYMBOL vmlinux 0x2459bbcc	console_set_on_cmdline
+EXPORT_SYMBOL vmlinux 0x245e754a	bitmap_cond_end_sync
+EXPORT_SYMBOL vmlinux 0x24624544	ftrace_print_flags_seq
+EXPORT_SYMBOL vmlinux 0x24797578	sock_create_kern
+EXPORT_SYMBOL vmlinux 0x2493c32e	phy_driver_unregister
+EXPORT_SYMBOL vmlinux 0x24a79b53	single_release
+EXPORT_SYMBOL vmlinux 0x24e4bb01	down_write_trylock
+EXPORT_SYMBOL vmlinux 0x24f9b635	tcf_exts_dump
+EXPORT_SYMBOL vmlinux 0x24fdac79	wake_bit_function
+EXPORT_SYMBOL vmlinux 0x2500f16c	sock_no_listen
+EXPORT_SYMBOL vmlinux 0x250113b4	memory_read_from_buffer
+EXPORT_SYMBOL vmlinux 0x252137e6	ps2_sendbyte
+EXPORT_SYMBOL vmlinux 0x257da7c7	scsi_rescan_device
+EXPORT_SYMBOL vmlinux 0x25820c64	fs_overflowuid
+EXPORT_SYMBOL vmlinux 0x258355b4	fb_find_best_mode
+EXPORT_SYMBOL vmlinux 0x2597f10a	pnp_possible_config
+EXPORT_SYMBOL vmlinux 0x25a3cdb2	pci_set_consistent_dma_mask
+EXPORT_SYMBOL vmlinux 0x25c6cafe	xfrm_state_update
+EXPORT_SYMBOL vmlinux 0x25d3e2a3	atomic64_dec_return
+EXPORT_SYMBOL vmlinux 0x2607ca96	__scm_send
+EXPORT_SYMBOL vmlinux 0x264922ea	xfrm_user_policy
+EXPORT_SYMBOL vmlinux 0x2656dfbf	jbd2_journal_invalidatepage
+EXPORT_SYMBOL vmlinux 0x265a155f	skb_copy_and_csum_bits
+EXPORT_SYMBOL vmlinux 0x267827a5	devm_ioport_map
+EXPORT_SYMBOL vmlinux 0x267fc65b	__tasklet_hi_schedule
+EXPORT_SYMBOL vmlinux 0x2686dc9a	pci_enable_msix
+EXPORT_SYMBOL vmlinux 0x268cc6a2	sys_close
+EXPORT_SYMBOL vmlinux 0x26bb9fb3	blk_queue_end_tag
+EXPORT_SYMBOL vmlinux 0x26ca5214	ppp_input_error
+EXPORT_SYMBOL vmlinux 0x26e76fb8	sysctl_udp_wmem_min
+EXPORT_SYMBOL vmlinux 0x26e8fcb6	vfs_quota_on_mount
+EXPORT_SYMBOL vmlinux 0x26fe3f88	mmc_power_save_host
+EXPORT_SYMBOL vmlinux 0x2701b940	generic_make_request
+EXPORT_SYMBOL vmlinux 0x27059102	dec_zone_page_state
+EXPORT_SYMBOL vmlinux 0x271cba95	acpi_bus_private_data_handler
+EXPORT_SYMBOL vmlinux 0x271ddfca	journal_create
+EXPORT_SYMBOL vmlinux 0x2721f66b	journal_extend
+EXPORT_SYMBOL vmlinux 0x2727da5d	_atomic_dec_and_lock
+EXPORT_SYMBOL vmlinux 0x272d394e	mtrr_del
+EXPORT_SYMBOL vmlinux 0x27864d57	memparse
+EXPORT_SYMBOL vmlinux 0x27a6d738	sk_stream_wait_memory
+EXPORT_SYMBOL vmlinux 0x27b35c51	tcp_sockets_allocated
+EXPORT_SYMBOL vmlinux 0x27bbf221	disable_irq_nosync
+EXPORT_SYMBOL vmlinux 0x27c61ece	qdisc_put_stab
+EXPORT_SYMBOL vmlinux 0x27d33a3c	__dec_zone_page_state
+EXPORT_SYMBOL vmlinux 0x27dbea9d	phy_ethtool_gset
+EXPORT_SYMBOL vmlinux 0x27e217ce	dev_unicast_sync
+EXPORT_SYMBOL vmlinux 0x27f4940e	get_super
+EXPORT_SYMBOL vmlinux 0x282cdc10	netdev_boot_setup_check
+EXPORT_SYMBOL vmlinux 0x283e0d73	__destroy_inode
+EXPORT_SYMBOL vmlinux 0x284573d1	d_move
+EXPORT_SYMBOL vmlinux 0x285ac517	strict_strtoll
+EXPORT_SYMBOL vmlinux 0x289a09ba	bd_set_size
+EXPORT_SYMBOL vmlinux 0x28a2ed02	scsi_build_sense_buffer
+EXPORT_SYMBOL vmlinux 0x28a3c479	input_unregister_handle
+EXPORT_SYMBOL vmlinux 0x28abc3f9	sock_i_ino
+EXPORT_SYMBOL vmlinux 0x28b715a6	isapnp_cfg_end
+EXPORT_SYMBOL vmlinux 0x28e1144f	simple_rename
+EXPORT_SYMBOL vmlinux 0x29082ef1	skb_push
+EXPORT_SYMBOL vmlinux 0x29093269	tty_free_termios
+EXPORT_SYMBOL vmlinux 0x292093f4	native_rdmsr_safe_regs
+EXPORT_SYMBOL vmlinux 0x2939c886	jbd2_journal_set_triggers
+EXPORT_SYMBOL vmlinux 0x29537c9e	alloc_chrdev_region
+EXPORT_SYMBOL vmlinux 0x2963dce8	kernel_recvmsg
+EXPORT_SYMBOL vmlinux 0x29777b11	tcf_action_dump_1
+EXPORT_SYMBOL vmlinux 0x29b1c366	__sg_alloc_table
+EXPORT_SYMBOL vmlinux 0x29bd4c46	__cap_init_eff_set
+EXPORT_SYMBOL vmlinux 0x29d85c0e	jbd2_journal_destroy
+EXPORT_SYMBOL vmlinux 0x29daa33b	pci_scan_single_device
+EXPORT_SYMBOL vmlinux 0x2a303d4d	check_signature
+EXPORT_SYMBOL vmlinux 0x2a9bdab0	generic_write_end
+EXPORT_SYMBOL vmlinux 0x2aa0e4fc	strncasecmp
+EXPORT_SYMBOL vmlinux 0x2ab5b4e9	skb_pad
+EXPORT_SYMBOL vmlinux 0x2aeb2800	mempool_create_node
+EXPORT_SYMBOL vmlinux 0x2af3156a	mutex_lock_killable
+EXPORT_SYMBOL vmlinux 0x2b0ba2b0	scsi_sense_desc_find
+EXPORT_SYMBOL vmlinux 0x2b1f4adb	xfrm_stateonly_find
+EXPORT_SYMBOL vmlinux 0x2b44dca3	dm_table_put
+EXPORT_SYMBOL vmlinux 0x2b756096	kernel_listen
+EXPORT_SYMBOL vmlinux 0x2b7b2ed1	blk_queue_resize_tags
+EXPORT_SYMBOL vmlinux 0x2ba707a8	sysctl_tcp_low_latency
+EXPORT_SYMBOL vmlinux 0x2bb55d6e	acpi_remove_notify_handler
+EXPORT_SYMBOL vmlinux 0x2bb6fde2	__kfifo_put
+EXPORT_SYMBOL vmlinux 0x2bc95bd4	memset
+EXPORT_SYMBOL vmlinux 0x2be8dcd8	mca_register_driver_integrated
+EXPORT_SYMBOL vmlinux 0x2bf74902	lookup_one_len
+EXPORT_SYMBOL vmlinux 0x2bfeb410	acpi_get_handle
+EXPORT_SYMBOL vmlinux 0x2c12c816	set_page_dirty
+EXPORT_SYMBOL vmlinux 0x2c1f3d7a	log_wait_commit
+EXPORT_SYMBOL vmlinux 0x2c3159fb	dev_mc_add
+EXPORT_SYMBOL vmlinux 0x2c4301f4	dma_sync_wait
+EXPORT_SYMBOL vmlinux 0x2c5749e6	acpi_clear_gpe
+EXPORT_SYMBOL vmlinux 0x2c5e29e3	phy_start_aneg
+EXPORT_SYMBOL vmlinux 0x2c799c08	__netdev_alloc_skb
+EXPORT_SYMBOL vmlinux 0x2c81dede	dm_io
+EXPORT_SYMBOL vmlinux 0x2c8f5989	acpi_remove_address_space_handler
+EXPORT_SYMBOL vmlinux 0x2c9874fe	ida_remove
+EXPORT_SYMBOL vmlinux 0x2cb06027	writeback_inodes_sb_if_idle
+EXPORT_SYMBOL vmlinux 0x2cbeb473	tcp_shutdown
+EXPORT_SYMBOL vmlinux 0x2ccf71ea	seq_open
+EXPORT_SYMBOL vmlinux 0x2d05223a	x86_dma_fallback_dev
+EXPORT_SYMBOL vmlinux 0x2d241a74	jbd2_journal_set_features
+EXPORT_SYMBOL vmlinux 0x2d37342e	cpu_online_mask
+EXPORT_SYMBOL vmlinux 0x2d55b04a	tcp_init_xmit_timers
+EXPORT_SYMBOL vmlinux 0x2d89342a	scsi_show_sense_hdr
+EXPORT_SYMBOL vmlinux 0x2d89c2b4	vfs_follow_link
+EXPORT_SYMBOL vmlinux 0x2d8ecbf8	__scsi_device_lookup_by_target
+EXPORT_SYMBOL vmlinux 0x2da1d11e	simple_pin_fs
+EXPORT_SYMBOL vmlinux 0x2da8d68b	inet_sock_destruct
+EXPORT_SYMBOL vmlinux 0x2db6bac0	netlink_unicast
+EXPORT_SYMBOL vmlinux 0x2dbd9ee8	tty_name
+EXPORT_SYMBOL vmlinux 0x2dcb0123	schedule_delayed_work_on
+EXPORT_SYMBOL vmlinux 0x2dd16564	arch_register_cpu
+EXPORT_SYMBOL vmlinux 0x2dd1bd31	kernel_sendpage
+EXPORT_SYMBOL vmlinux 0x2dedc4c2	acpi_format_exception
+EXPORT_SYMBOL vmlinux 0x2def7f76	rtc_cmos_write
+EXPORT_SYMBOL vmlinux 0x2df91661	input_filter_device
+EXPORT_SYMBOL vmlinux 0x2e1e96ee	i2c_smbus_read_byte
+EXPORT_SYMBOL vmlinux 0x2e2a9e65	thermal_cooling_device_register
+EXPORT_SYMBOL vmlinux 0x2e2ce9e0	sysctl_tcp_syncookies
+EXPORT_SYMBOL vmlinux 0x2e3df06d	pci_request_selected_regions_exclusive
+EXPORT_SYMBOL vmlinux 0x2e41fc31	simple_sync_file
+EXPORT_SYMBOL vmlinux 0x2e4a39f8	sysctl_udp_mem
+EXPORT_SYMBOL vmlinux 0x2e60bace	memcpy
+EXPORT_SYMBOL vmlinux 0x2e6524ad	xfrm_state_alloc
+EXPORT_SYMBOL vmlinux 0x2eb9a0e8	_read_lock_irq
+EXPORT_SYMBOL vmlinux 0x2ebb4ba7	mmc_try_claim_host
+EXPORT_SYMBOL vmlinux 0x2edb35f3	vfs_readlink
+EXPORT_SYMBOL vmlinux 0x2efe5e09	atomic64_xchg
+EXPORT_SYMBOL vmlinux 0x2f0346f7	__starget_for_each_device
+EXPORT_SYMBOL vmlinux 0x2f27597c	scsi_mode_sense
+EXPORT_SYMBOL vmlinux 0x2f287f0d	copy_to_user
+EXPORT_SYMBOL vmlinux 0x2f850bd3	bio_integrity_alloc_bioset
+EXPORT_SYMBOL vmlinux 0x2f89b7c8	rfkill_init_sw_state
+EXPORT_SYMBOL vmlinux 0x2fb733a5	uart_match_port
+EXPORT_SYMBOL vmlinux 0x2fc0a9d6	sock_no_ioctl
+EXPORT_SYMBOL vmlinux 0x2fd33d69	vfs_symlink
+EXPORT_SYMBOL vmlinux 0x2ff24549	journal_clear_err
+EXPORT_SYMBOL vmlinux 0x300fa8c4	arp_send
+EXPORT_SYMBOL vmlinux 0x30123eb5	icmpv6_statistics
+EXPORT_SYMBOL vmlinux 0x305dd6ce	rtnl_set_sk_err
+EXPORT_SYMBOL vmlinux 0x307f7776	timecompare_offset
+EXPORT_SYMBOL vmlinux 0x30e74134	tty_termios_copy_hw
+EXPORT_SYMBOL vmlinux 0x310917fe	sort
+EXPORT_SYMBOL vmlinux 0x31121fe1	genl_unregister_mc_group
+EXPORT_SYMBOL vmlinux 0x311782eb	elv_dispatch_add_tail
+EXPORT_SYMBOL vmlinux 0x31206d94	d_instantiate
+EXPORT_SYMBOL vmlinux 0x3145216f	pci_dev_present
+EXPORT_SYMBOL vmlinux 0x3146f5a0	d_alloc_root
+EXPORT_SYMBOL vmlinux 0x3147857d	default_red
+EXPORT_SYMBOL vmlinux 0x316e3bd8	wireless_spy_update
+EXPORT_SYMBOL vmlinux 0x317b9193	simple_dir_inode_operations
+EXPORT_SYMBOL vmlinux 0x3191f109	__krealloc
+EXPORT_SYMBOL vmlinux 0x31acf506	inode_get_bytes
+EXPORT_SYMBOL vmlinux 0x31c2fb6f	get_sb_pseudo
+EXPORT_SYMBOL vmlinux 0x31c5b821	replace_mount_options
+EXPORT_SYMBOL vmlinux 0x31e76b57	recalibrate_cpu_khz
+EXPORT_SYMBOL vmlinux 0x31ebece8	tty_throttle
+EXPORT_SYMBOL vmlinux 0x32080822	set_trace_device
+EXPORT_SYMBOL vmlinux 0x32192b0e	seq_release
+EXPORT_SYMBOL vmlinux 0x32612215	dm_io_client_create
+EXPORT_SYMBOL vmlinux 0x32698dbf	sg_miter_next
+EXPORT_SYMBOL vmlinux 0x326bbde6	key_payload_reserve
+EXPORT_SYMBOL vmlinux 0x326df9e1	vfs_stat
+EXPORT_SYMBOL vmlinux 0x3270c570	open_exec
+EXPORT_SYMBOL vmlinux 0x3285cc48	param_set_uint
+EXPORT_SYMBOL vmlinux 0x328ed040	lro_flush_pkt
+EXPORT_SYMBOL vmlinux 0x32962ef2	cont_write_begin
+EXPORT_SYMBOL vmlinux 0x3297ed67	block_sync_page
+EXPORT_SYMBOL vmlinux 0x32ad706a	blk_queue_io_opt
+EXPORT_SYMBOL vmlinux 0x330589f6	pci_disable_device
+EXPORT_SYMBOL vmlinux 0x330a7c5f	kernel_connect
+EXPORT_SYMBOL vmlinux 0x332b28eb	dev_driver_string
+EXPORT_SYMBOL vmlinux 0x33310e4b	free_netdev
+EXPORT_SYMBOL vmlinux 0x33373e86	acpi_get_hp_hw_control_from_firmware
+EXPORT_SYMBOL vmlinux 0x3385d84c	netif_rx_ni
+EXPORT_SYMBOL vmlinux 0x3389de9f	dcache_readdir
+EXPORT_SYMBOL vmlinux 0x3391c144	do_munmap
+EXPORT_SYMBOL vmlinux 0x33b7a319	scsi_setup_fs_cmnd
+EXPORT_SYMBOL vmlinux 0x33d92f9a	prepare_to_wait
+EXPORT_SYMBOL vmlinux 0x33dd52ed	uart_get_divisor
+EXPORT_SYMBOL vmlinux 0x342f60fe	apm_info
+EXPORT_SYMBOL vmlinux 0x344c80c4	slow_work_sleep_till_thread_needed
+EXPORT_SYMBOL vmlinux 0x344cb544	unregister_filesystem
+EXPORT_SYMBOL vmlinux 0x3457cb68	param_set_long
+EXPORT_SYMBOL vmlinux 0x34872ddd	__seq_open_private
+EXPORT_SYMBOL vmlinux 0x3487a894	dquot_alloc_space
+EXPORT_SYMBOL vmlinux 0x34896788	__devm_release_region
+EXPORT_SYMBOL vmlinux 0x348ac691	clear_bdi_congested
+EXPORT_SYMBOL vmlinux 0x34908c14	print_hex_dump_bytes
+EXPORT_SYMBOL vmlinux 0x34976784	__serio_register_driver
+EXPORT_SYMBOL vmlinux 0x349cba85	strchr
+EXPORT_SYMBOL vmlinux 0x34a6af86	pci_bus_set_ops
+EXPORT_SYMBOL vmlinux 0x34aefaac	vfs_quota_off
+EXPORT_SYMBOL vmlinux 0x34f71008	scsi_dma_unmap
+EXPORT_SYMBOL vmlinux 0x350f27fe	blk_run_queue
+EXPORT_SYMBOL vmlinux 0x3512b932	__neigh_for_each_release
+EXPORT_SYMBOL vmlinux 0x355cbd57	blk_start_queue
+EXPORT_SYMBOL vmlinux 0x357b2289	xfrm_cfg_mutex
+EXPORT_SYMBOL vmlinux 0x359e168d	kill_anon_super
+EXPORT_SYMBOL vmlinux 0x35a86373	inet_sendmsg
+EXPORT_SYMBOL vmlinux 0x35aa9106	sock_no_getname
+EXPORT_SYMBOL vmlinux 0x35b22b18	phy_register_fixup_for_id
+EXPORT_SYMBOL vmlinux 0x35bfa1e1	mdiobus_alloc
+EXPORT_SYMBOL vmlinux 0x35c27bf5	bdev_read_only
+EXPORT_SYMBOL vmlinux 0x35c2ba9e	refrigerator
+EXPORT_SYMBOL vmlinux 0x35c2c077	da903x_query_status
+EXPORT_SYMBOL vmlinux 0x35c7a441	seq_write
+EXPORT_SYMBOL vmlinux 0x35da2e61	radix_tree_tag_get
+EXPORT_SYMBOL vmlinux 0x35da5e3e	dma_async_tx_descriptor_init
+EXPORT_SYMBOL vmlinux 0x35e44d9c	inet_bind
+EXPORT_SYMBOL vmlinux 0x35e722de	journal_ack_err
+EXPORT_SYMBOL vmlinux 0x35f0faa2	acpi_evaluate_object
+EXPORT_SYMBOL vmlinux 0x35fc61dd	pci_remove_bus_device
+EXPORT_SYMBOL vmlinux 0x36024ddf	dma_declare_coherent_memory
+EXPORT_SYMBOL vmlinux 0x360b1afe	probe_irq_mask
+EXPORT_SYMBOL vmlinux 0x363e4c7f	alloc_trdev
+EXPORT_SYMBOL vmlinux 0x3656bf5a	lock_kernel
+EXPORT_SYMBOL vmlinux 0x36875389	__timecompare_update
+EXPORT_SYMBOL vmlinux 0x369adcfa	pci_bus_type
+EXPORT_SYMBOL vmlinux 0x36b62dbb	jbd2_journal_get_undo_access
+EXPORT_SYMBOL vmlinux 0x36c578c5	tty_write_room
+EXPORT_SYMBOL vmlinux 0x36d7ba56	pskb_copy
+EXPORT_SYMBOL vmlinux 0x36e04b2c	sk_reset_timer
+EXPORT_SYMBOL vmlinux 0x36e2fd84	gnet_stats_copy_app
+EXPORT_SYMBOL vmlinux 0x36e5ac5c	blk_end_request_all
+EXPORT_SYMBOL vmlinux 0x36fd351d	dmam_free_coherent
+EXPORT_SYMBOL vmlinux 0x36fe81ca	__alloc_pages_nodemask
+EXPORT_SYMBOL vmlinux 0x3711c4c1	ht_create_irq
+EXPORT_SYMBOL vmlinux 0x3744cf36	vmalloc_to_pfn
+EXPORT_SYMBOL vmlinux 0x374ed073	scnprintf
+EXPORT_SYMBOL vmlinux 0x379d65f5	gen_pool_alloc
+EXPORT_SYMBOL vmlinux 0x37b44b0d	genphy_update_link
+EXPORT_SYMBOL vmlinux 0x37be2d35	bio_integrity_split
+EXPORT_SYMBOL vmlinux 0x37befc70	jiffies_to_msecs
+EXPORT_SYMBOL vmlinux 0x37db8f19	dmi_get_date
+EXPORT_SYMBOL vmlinux 0x37e74642	get_jiffies_64
+EXPORT_SYMBOL vmlinux 0x37f0935a	inode_needs_sync
+EXPORT_SYMBOL vmlinux 0x37f25e11	tcf_generic_walker
+EXPORT_SYMBOL vmlinux 0x37fe3e32	open_bdev_exclusive
+EXPORT_SYMBOL vmlinux 0x380ef00f	block_fsync
+EXPORT_SYMBOL vmlinux 0x3812c6b4	blk_sync_queue
+EXPORT_SYMBOL vmlinux 0x381c4bb1	cancel_delayed_work_sync
+EXPORT_SYMBOL vmlinux 0x3831d008	bio_pair_release
+EXPORT_SYMBOL vmlinux 0x38458d92	bio_integrity_set_tag
+EXPORT_SYMBOL vmlinux 0x3849b58d	dev_kfree_skb_any
+EXPORT_SYMBOL vmlinux 0x384b6e81	kernel_getsockopt
+EXPORT_SYMBOL vmlinux 0x387f02e2	user_revoke
+EXPORT_SYMBOL vmlinux 0x388799f6	unregister_kmmio_probe
+EXPORT_SYMBOL vmlinux 0x388f9128	xfrm_state_walk_done
+EXPORT_SYMBOL vmlinux 0x38b09cd0	skb_store_bits
+EXPORT_SYMBOL vmlinux 0x38b92846	llc_remove_pack
+EXPORT_SYMBOL vmlinux 0x38cab31c	init_timer_deferrable_key
+EXPORT_SYMBOL vmlinux 0x38de505e	bio_integrity_prep
+EXPORT_SYMBOL vmlinux 0x3930a473	inc_zone_page_state
+EXPORT_SYMBOL vmlinux 0x394ffe66	tty_port_hangup
+EXPORT_SYMBOL vmlinux 0x395cedbb	jbd2_journal_start_commit
+EXPORT_SYMBOL vmlinux 0x396bf049	icmp_send
+EXPORT_SYMBOL vmlinux 0x3980aac1	unregister_reboot_notifier
+EXPORT_SYMBOL vmlinux 0x39d91d16	bdev_stack_limits
+EXPORT_SYMBOL vmlinux 0x39e60f4d	__inc_zone_page_state
+EXPORT_SYMBOL vmlinux 0x3a108ddd	security_path_truncate
+EXPORT_SYMBOL vmlinux 0x3a2204c6	security_netlink_recv
+EXPORT_SYMBOL vmlinux 0x3a3f3094	elv_add_request
+EXPORT_SYMBOL vmlinux 0x3a6857c3	netdev_rx_csum_fault
+EXPORT_SYMBOL vmlinux 0x3a9b6fb9	blk_unregister_region
+EXPORT_SYMBOL vmlinux 0x3aa1dbcf	_spin_unlock_bh
+EXPORT_SYMBOL vmlinux 0x3aa9ad29	phy_disconnect
+EXPORT_SYMBOL vmlinux 0x3abb5ed5	scsi_is_sdev_device
+EXPORT_SYMBOL vmlinux 0x3ac095a7	key_instantiate_and_link
+EXPORT_SYMBOL vmlinux 0x3ad73532	proc_symlink
+EXPORT_SYMBOL vmlinux 0x3ad7dccf	xfrm_state_unregister_afinfo
+EXPORT_SYMBOL vmlinux 0x3adc15b9	posix_acl_from_mode
+EXPORT_SYMBOL vmlinux 0x3ae2e335	udp_disconnect
+EXPORT_SYMBOL vmlinux 0x3ae831b6	kref_init
+EXPORT_SYMBOL vmlinux 0x3af98f9e	ioremap_nocache
+EXPORT_SYMBOL vmlinux 0x3b0007c1	ethtool_op_set_tx_ipv6_csum
+EXPORT_SYMBOL vmlinux 0x3b216900	bmap
+EXPORT_SYMBOL vmlinux 0x3b3016d3	cpufreq_unregister_notifier
+EXPORT_SYMBOL vmlinux 0x3b815ec9	dma_find_channel
+EXPORT_SYMBOL vmlinux 0x3b9adeb7	dm_dirty_log_type_register
+EXPORT_SYMBOL vmlinux 0x3bb78130	set_current_groups
+EXPORT_SYMBOL vmlinux 0x3bd1b1f6	msecs_to_jiffies
+EXPORT_SYMBOL vmlinux 0x3bdc7034	bio_alloc_bioset
+EXPORT_SYMBOL vmlinux 0x3bea6a7f	unregister_netdevice
+EXPORT_SYMBOL vmlinux 0x3c13474b	unregister_netdev
+EXPORT_SYMBOL vmlinux 0x3c2c5af5	sprintf
+EXPORT_SYMBOL vmlinux 0x3c499822	__tcf_em_tree_match
+EXPORT_SYMBOL vmlinux 0x3c4cde55	i2c_use_client
+EXPORT_SYMBOL vmlinux 0x3c7227bf	complete_all
+EXPORT_SYMBOL vmlinux 0x3c9d1211	string_get_size
+EXPORT_SYMBOL vmlinux 0x3cc0a3bb	xfrm_spd_getinfo
+EXPORT_SYMBOL vmlinux 0x3cd3b4fc	nonseekable_open
+EXPORT_SYMBOL vmlinux 0x3cdfa500	tcp_getsockopt
+EXPORT_SYMBOL vmlinux 0x3ce4ca6f	disable_irq
+EXPORT_SYMBOL vmlinux 0x3cea29c0	dev_unicast_add
+EXPORT_SYMBOL vmlinux 0x3ceec1cb	kmem_cache_free
+EXPORT_SYMBOL vmlinux 0x3d355c3b	pci_get_bus_and_slot
+EXPORT_SYMBOL vmlinux 0x3d478222	__blk_end_request
+EXPORT_SYMBOL vmlinux 0x3d53f00c	napi_get_frags
+EXPORT_SYMBOL vmlinux 0x3d5f7d21	simple_link
+EXPORT_SYMBOL vmlinux 0x3d68bd4b	flow_cache_genid
+EXPORT_SYMBOL vmlinux 0x3d6f894e	bh_uptodate_or_lock
+EXPORT_SYMBOL vmlinux 0x3d7c1ed7	msrs_alloc
+EXPORT_SYMBOL vmlinux 0x3d7f75af	scsi_device_set_state
+EXPORT_SYMBOL vmlinux 0x3d80c54f	kernel_getsockname
+EXPORT_SYMBOL vmlinux 0x3d954c72	registered_fb
+EXPORT_SYMBOL vmlinux 0x3d9995af	devm_free_irq
+EXPORT_SYMBOL vmlinux 0x3da171f9	pci_mem_start
+EXPORT_SYMBOL vmlinux 0x3da5eb6d	kfifo_alloc
+EXPORT_SYMBOL vmlinux 0x3daa69da	vfs_lstat
+EXPORT_SYMBOL vmlinux 0x3dbb1da5	locks_init_lock
+EXPORT_SYMBOL vmlinux 0x3e1f073d	wait_for_completion_timeout
+EXPORT_SYMBOL vmlinux 0x3e219de6	try_wait_for_completion
+EXPORT_SYMBOL vmlinux 0x3e2ae3a8	acpi_release_global_lock
+EXPORT_SYMBOL vmlinux 0x3e383385	nf_hooks
+EXPORT_SYMBOL vmlinux 0x3e3bae4f	__dev_getfirstbyhwtype
+EXPORT_SYMBOL vmlinux 0x3e45e9ff	register_inetaddr_notifier
+EXPORT_SYMBOL vmlinux 0x3e8750da	follow_pfn
+EXPORT_SYMBOL vmlinux 0x3e899c9d	blk_limits_io_min
+EXPORT_SYMBOL vmlinux 0x3ec1d14e	tcf_hash_destroy
+EXPORT_SYMBOL vmlinux 0x3ed105f4	key_alloc
+EXPORT_SYMBOL vmlinux 0x3ed63055	zlib_inflateReset
+EXPORT_SYMBOL vmlinux 0x3eeaa505	tcf_unregister_action
+EXPORT_SYMBOL vmlinux 0x3f0546a8	ioread32_rep
+EXPORT_SYMBOL vmlinux 0x3f1899f1	up
+EXPORT_SYMBOL vmlinux 0x3f21066f	i2c_smbus_read_block_data
+EXPORT_SYMBOL vmlinux 0x3f3d20da	kunmap
+EXPORT_SYMBOL vmlinux 0x3f43a887	kmem_cache_destroy
+EXPORT_SYMBOL vmlinux 0x3f4547a7	put_unused_fd
+EXPORT_SYMBOL vmlinux 0x3f89fc2e	xfrm_policy_register_afinfo
+EXPORT_SYMBOL vmlinux 0x3f9f6eb6	tty_register_ldisc
+EXPORT_SYMBOL vmlinux 0x3fb0ba55	input_free_device
+EXPORT_SYMBOL vmlinux 0x3fbc8982	dst_discard
+EXPORT_SYMBOL vmlinux 0x3fbf2791	blk_queue_physical_block_size
+EXPORT_SYMBOL vmlinux 0x3fd77da7	unlock_page
+EXPORT_SYMBOL vmlinux 0x3ff62317	local_bh_disable
+EXPORT_SYMBOL vmlinux 0x40144de3	__register_binfmt
+EXPORT_SYMBOL vmlinux 0x401a38d8	inet6_del_protocol
+EXPORT_SYMBOL vmlinux 0x4024e9a6	__lookup_one_len
+EXPORT_SYMBOL vmlinux 0x402dae27	__xfrm_lookup
+EXPORT_SYMBOL vmlinux 0x404d773c	thermal_zone_device_update
+EXPORT_SYMBOL vmlinux 0x4059792f	print_hex_dump
+EXPORT_SYMBOL vmlinux 0x405c1144	get_seconds
+EXPORT_SYMBOL vmlinux 0x4060d6e7	do_sync_read
+EXPORT_SYMBOL vmlinux 0x4062214a	ndisc_send_skb
+EXPORT_SYMBOL vmlinux 0x4097fa45	acpi_read_bit_register
+EXPORT_SYMBOL vmlinux 0x409873e3	tty_termios_baud_rate
+EXPORT_SYMBOL vmlinux 0x40a27c37	scsi_dev_info_remove_list
+EXPORT_SYMBOL vmlinux 0x40c89d46	acpi_get_table_by_index
+EXPORT_SYMBOL vmlinux 0x40c9efc1	pci_unmap_rom
+EXPORT_SYMBOL vmlinux 0x40e9cf5c	skb_checksum
+EXPORT_SYMBOL vmlinux 0x40ebb804	ip_mc_rejoin_group
+EXPORT_SYMBOL vmlinux 0x4101bbde	param_set_copystring
+EXPORT_SYMBOL vmlinux 0x4108e69a	fb_match_mode
+EXPORT_SYMBOL vmlinux 0x41166725	inet_frags_init_net
+EXPORT_SYMBOL vmlinux 0x4132e386	truncate_inode_pages
+EXPORT_SYMBOL vmlinux 0x41344088	param_get_charp
+EXPORT_SYMBOL vmlinux 0x41482d8b	strndup_user
+EXPORT_SYMBOL vmlinux 0x414cc80c	cmpxchg8b_emu
+EXPORT_SYMBOL vmlinux 0x416983d9	netdev_fix_features
+EXPORT_SYMBOL vmlinux 0x4179b6f4	phy_attach
+EXPORT_SYMBOL vmlinux 0x417ffdc6	neigh_table_clear
+EXPORT_SYMBOL vmlinux 0x4185cf4b	radix_tree_lookup_slot
+EXPORT_SYMBOL vmlinux 0x4188d439	neigh_rand_reach_time
+EXPORT_SYMBOL vmlinux 0x41a4a70b	tcp_hashinfo
+EXPORT_SYMBOL vmlinux 0x41a9c68d	_spin_trylock_bh
+EXPORT_SYMBOL vmlinux 0x41b8f450	serial8250_register_port
+EXPORT_SYMBOL vmlinux 0x41cbe919	dev_get_flags
+EXPORT_SYMBOL vmlinux 0x41cf78e7	dev_set_drvdata
+EXPORT_SYMBOL vmlinux 0x41d21a19	cdrom_media_changed
+EXPORT_SYMBOL vmlinux 0x41d63cab	i2c_register_driver
+EXPORT_SYMBOL vmlinux 0x420532de	inode_set_bytes
+EXPORT_SYMBOL vmlinux 0x4211c3c1	zlib_inflateInit2
+EXPORT_SYMBOL vmlinux 0x42139ef1	seq_printf
+EXPORT_SYMBOL vmlinux 0x42224298	sscanf
+EXPORT_SYMBOL vmlinux 0x42361405	bitmap_startwrite
+EXPORT_SYMBOL vmlinux 0x424cc81f	elv_queue_empty
+EXPORT_SYMBOL vmlinux 0x42595e58	vgacon_text_force
+EXPORT_SYMBOL vmlinux 0x427107ee	udp_lib_getsockopt
+EXPORT_SYMBOL vmlinux 0x4292364c	schedule
+EXPORT_SYMBOL vmlinux 0x42cedc2f	dquot_scan_active
+EXPORT_SYMBOL vmlinux 0x42cfe26c	journal_unlock_updates
+EXPORT_SYMBOL vmlinux 0x42e44418	scsi_device_quiesce
+EXPORT_SYMBOL vmlinux 0x4302d0eb	free_pages
+EXPORT_SYMBOL vmlinux 0x430649c0	simple_transaction_set
+EXPORT_SYMBOL vmlinux 0x4309a4e4	pci_wake_from_d3
+EXPORT_SYMBOL vmlinux 0x43320e06	mb_cache_entry_alloc
+EXPORT_SYMBOL vmlinux 0x4333eadb	param_set_short
+EXPORT_SYMBOL vmlinux 0x43385ad9	acpi_pci_unregister_driver
+EXPORT_SYMBOL vmlinux 0x434fa55c	release_console_sem
+EXPORT_SYMBOL vmlinux 0x435f57ce	sockfd_lookup
+EXPORT_SYMBOL vmlinux 0x436c2179	iowrite32
+EXPORT_SYMBOL vmlinux 0x4385be3b	gnet_stats_copy_queue
+EXPORT_SYMBOL vmlinux 0x43ab66c3	param_array_get
+EXPORT_SYMBOL vmlinux 0x43ad1d94	neigh_parms_release
+EXPORT_SYMBOL vmlinux 0x43f115c8	inet6_unregister_protosw
+EXPORT_SYMBOL vmlinux 0x43f27cb9	security_path_unlink
+EXPORT_SYMBOL vmlinux 0x43fb8901	dev_set_mtu
+EXPORT_SYMBOL vmlinux 0x44161c19	unregister_shrinker
+EXPORT_SYMBOL vmlinux 0x441a36a7	fput
+EXPORT_SYMBOL vmlinux 0x44262259	update_region
+EXPORT_SYMBOL vmlinux 0x44314efb	radix_tree_gang_lookup_tag_slot
+EXPORT_SYMBOL vmlinux 0x444779c4	nla_find
+EXPORT_SYMBOL vmlinux 0x4458feb8	get_sb_bdev
+EXPORT_SYMBOL vmlinux 0x44774b03	jbd2_journal_init_dev
+EXPORT_SYMBOL vmlinux 0x447a9d07	serio_close
+EXPORT_SYMBOL vmlinux 0x44812a25	md_done_sync
+EXPORT_SYMBOL vmlinux 0x44aaf30f	tsc_khz
+EXPORT_SYMBOL vmlinux 0x44b2978e	blkdev_put
+EXPORT_SYMBOL vmlinux 0x44b911c3	rb_replace_node
+EXPORT_SYMBOL vmlinux 0x44cc6cb7	insert_inode_locked4
+EXPORT_SYMBOL vmlinux 0x44d05491	get_phy_id
+EXPORT_SYMBOL vmlinux 0x44d4834b	nlmsg_notify
+EXPORT_SYMBOL vmlinux 0x44e9a829	match_token
+EXPORT_SYMBOL vmlinux 0x44edc0a1	dmam_pool_destroy
+EXPORT_SYMBOL vmlinux 0x44f21bea	idr_for_each
+EXPORT_SYMBOL vmlinux 0x450f2b13	d_invalidate
+EXPORT_SYMBOL vmlinux 0x451cd099	scsi_put_command
+EXPORT_SYMBOL vmlinux 0x4521273a	module_put
+EXPORT_SYMBOL vmlinux 0x45287a0c	phy_device_register
+EXPORT_SYMBOL vmlinux 0x453448b3	dquot_release
+EXPORT_SYMBOL vmlinux 0x453c8403	pci_msi_enabled
+EXPORT_SYMBOL vmlinux 0x45450063	mod_timer
+EXPORT_SYMBOL vmlinux 0x4550ba8a	register_cpu_notifier
+EXPORT_SYMBOL vmlinux 0x4575315d	utf8s_to_utf16s
+EXPORT_SYMBOL vmlinux 0x45775c1b	___pskb_trim
+EXPORT_SYMBOL vmlinux 0x457a64a7	mpage_readpages
+EXPORT_SYMBOL vmlinux 0x457eb90b	destroy_EII_client
+EXPORT_SYMBOL vmlinux 0x457f40f6	set_binfmt
+EXPORT_SYMBOL vmlinux 0x45947727	param_array_set
+EXPORT_SYMBOL vmlinux 0x459d24e2	n_tty_ioctl_helper
+EXPORT_SYMBOL vmlinux 0x45ab525e	inet_select_addr
+EXPORT_SYMBOL vmlinux 0x45b2ce46	vfs_set_dqinfo
+EXPORT_SYMBOL vmlinux 0x45d11c43	down_interruptible
+EXPORT_SYMBOL vmlinux 0x45d55543	down_write
+EXPORT_SYMBOL vmlinux 0x46008ef9	otg_put_transceiver
+EXPORT_SYMBOL vmlinux 0x46063bea	kernel_sendmsg
+EXPORT_SYMBOL vmlinux 0x46085e4f	add_timer
+EXPORT_SYMBOL vmlinux 0x460f3158	bdi_unregister
+EXPORT_SYMBOL vmlinux 0x462a2e75	match_strlcpy
+EXPORT_SYMBOL vmlinux 0x4654b78a	netlink_set_err
+EXPORT_SYMBOL vmlinux 0x466c14a7	__delay
+EXPORT_SYMBOL vmlinux 0x467914d9	input_register_device
+EXPORT_SYMBOL vmlinux 0x467dd42c	sb_set_blocksize
+EXPORT_SYMBOL vmlinux 0x46978914	ipv6_skip_exthdr
+EXPORT_SYMBOL vmlinux 0x46ce17f6	iget_locked
+EXPORT_SYMBOL vmlinux 0x470fb815	mutex_trylock
+EXPORT_SYMBOL vmlinux 0x47281795	ip_mc_dec_group
+EXPORT_SYMBOL vmlinux 0x472d2a9a	radix_tree_lookup
+EXPORT_SYMBOL vmlinux 0x4738151a	inet_csk_delete_keepalive_timer
+EXPORT_SYMBOL vmlinux 0x474cbecc	tcp_v4_md5_hash_skb
+EXPORT_SYMBOL vmlinux 0x475100c2	inet_get_local_port_range
+EXPORT_SYMBOL vmlinux 0x47536ad5	inet_csk_init_xmit_timers
+EXPORT_SYMBOL vmlinux 0x475f010b	acpi_purge_cached_objects
+EXPORT_SYMBOL vmlinux 0x478d10b2	ht_destroy_irq
+EXPORT_SYMBOL vmlinux 0x479c3c86	find_next_zero_bit
+EXPORT_SYMBOL vmlinux 0x47a4f995	fb_pan_display
+EXPORT_SYMBOL vmlinux 0x480caec7	register_snap_client
+EXPORT_SYMBOL vmlinux 0x48193639	acpi_lid_open
+EXPORT_SYMBOL vmlinux 0x481cb9ab	acpi_enter_sleep_state_prep
+EXPORT_SYMBOL vmlinux 0x48588d77	pci_back_from_sleep
+EXPORT_SYMBOL vmlinux 0x4859b8bb	rtc_year_days
+EXPORT_SYMBOL vmlinux 0x486b6407	hweight64
+EXPORT_SYMBOL vmlinux 0x4877dbe4	pci_clear_mwi
+EXPORT_SYMBOL vmlinux 0x487bf497	journal_start_commit
+EXPORT_SYMBOL vmlinux 0x489badea	blk_rq_map_integrity_sg
+EXPORT_SYMBOL vmlinux 0x48a226b5	key_put
+EXPORT_SYMBOL vmlinux 0x48a38b34	genl_unregister_ops
+EXPORT_SYMBOL vmlinux 0x48d9e09e	kobject_init
+EXPORT_SYMBOL vmlinux 0x49436e7e	skb_free_datagram_locked
+EXPORT_SYMBOL vmlinux 0x49439411	genl_unregister_family
+EXPORT_SYMBOL vmlinux 0x494e3393	vm_get_page_prot
+EXPORT_SYMBOL vmlinux 0x49603fb8	security_sb_copy_data
+EXPORT_SYMBOL vmlinux 0x497afe44	scsi_prep_state_check
+EXPORT_SYMBOL vmlinux 0x49ce814c	tcf_em_tree_dump
+EXPORT_SYMBOL vmlinux 0x49da9a9a	_read_unlock_bh
+EXPORT_SYMBOL vmlinux 0x49e182c0	param_get_string
+EXPORT_SYMBOL vmlinux 0x4a26b03f	revert_creds
+EXPORT_SYMBOL vmlinux 0x4a3269aa	lro_vlan_hwaccel_receive_skb
+EXPORT_SYMBOL vmlinux 0x4a358252	__bitmap_subset
+EXPORT_SYMBOL vmlinux 0x4a7bdf89	acpi_device_hid
+EXPORT_SYMBOL vmlinux 0x4a88b727	__locks_copy_lock
+EXPORT_SYMBOL vmlinux 0x4a971ec7	radix_tree_delete
+EXPORT_SYMBOL vmlinux 0x4aae237e	inet_listen
+EXPORT_SYMBOL vmlinux 0x4afe9a77	scsi_partsize
+EXPORT_SYMBOL vmlinux 0x4b07e779	_spin_unlock_irqrestore
+EXPORT_SYMBOL vmlinux 0x4b254e9b	bitmap_close_sync
+EXPORT_SYMBOL vmlinux 0x4b34fbf5	block_all_signals
+EXPORT_SYMBOL vmlinux 0x4b359cb7	gnet_stats_start_copy_compat
+EXPORT_SYMBOL vmlinux 0x4b3f1aff	phy_device_free
+EXPORT_SYMBOL vmlinux 0x4b475e84	free_buffer_head
+EXPORT_SYMBOL vmlinux 0x4b47f83f	i2c_clients_command
+EXPORT_SYMBOL vmlinux 0x4b7a176d	eth_header_cache
+EXPORT_SYMBOL vmlinux 0x4b8d21ee	tcf_hash_lookup
+EXPORT_SYMBOL vmlinux 0x4ba0bbb8	block_invalidatepage
+EXPORT_SYMBOL vmlinux 0x4ba990e1	jbd2_journal_clear_features
+EXPORT_SYMBOL vmlinux 0x4bbc3e5f	pm_flags
+EXPORT_SYMBOL vmlinux 0x4bd46896	rtnl_unicast
+EXPORT_SYMBOL vmlinux 0x4bfee15a	atomic64_set
+EXPORT_SYMBOL vmlinux 0x4c0492d3	inet6_release
+EXPORT_SYMBOL vmlinux 0x4c1182cb	bitmap_scnprintf
+EXPORT_SYMBOL vmlinux 0x4c1b965c	gen_replace_estimator
+EXPORT_SYMBOL vmlinux 0x4c232f09	set_user_nice
+EXPORT_SYMBOL vmlinux 0x4c3c09c1	ip6_route_me_harder
+EXPORT_SYMBOL vmlinux 0x4c3e765b	inet_csk_clear_xmit_timers
+EXPORT_SYMBOL vmlinux 0x4c442886	skb_gso_segment
+EXPORT_SYMBOL vmlinux 0x4c742c7a	init_buffer
+EXPORT_SYMBOL vmlinux 0x4cb34550	fb_show_logo
+EXPORT_SYMBOL vmlinux 0x4cbbd171	__bitmap_weight
+EXPORT_SYMBOL vmlinux 0x4cd6a66c	set_page_dirty_lock
+EXPORT_SYMBOL vmlinux 0x4cdf85dc	mmc_request_done
+EXPORT_SYMBOL vmlinux 0x4ce0b511	cdrom_release
+EXPORT_SYMBOL vmlinux 0x4cf20b83	acpi_bus_unregister_driver
+EXPORT_SYMBOL vmlinux 0x4d0adb3d	dm_table_get_size
+EXPORT_SYMBOL vmlinux 0x4d3c153f	sigprocmask
+EXPORT_SYMBOL vmlinux 0x4d3f6f62	neigh_compat_output
+EXPORT_SYMBOL vmlinux 0x4d4a33be	nf_ip_checksum
+EXPORT_SYMBOL vmlinux 0x4d65de02	tcp_md5_hash_skb_data
+EXPORT_SYMBOL vmlinux 0x4d7102bc	__inet6_hash
+EXPORT_SYMBOL vmlinux 0x4d82bc49	tcp_md5_hash_header
+EXPORT_SYMBOL vmlinux 0x4d8da1cb	lock_sock_nested
+EXPORT_SYMBOL vmlinux 0x4db209fd	do_truncate
+EXPORT_SYMBOL vmlinux 0x4dc135c3	napi_complete
+EXPORT_SYMBOL vmlinux 0x4dc45be9	nf_log_unbind_pf
+EXPORT_SYMBOL vmlinux 0x4deb9fb5	i2c_smbus_write_i2c_block_data
+EXPORT_SYMBOL vmlinux 0x4df119fa	__bitmap_parse
+EXPORT_SYMBOL vmlinux 0x4e069249	security_tun_dev_post_create
+EXPORT_SYMBOL vmlinux 0x4e0a6c5a	pci_enable_wake
+EXPORT_SYMBOL vmlinux 0x4e1cbda8	netlink_dump_start
+EXPORT_SYMBOL vmlinux 0x4e3567f7	match_int
+EXPORT_SYMBOL vmlinux 0x4e6e8ea7	fg_console
+EXPORT_SYMBOL vmlinux 0x4e717d0d	set_security_override
+EXPORT_SYMBOL vmlinux 0x4e73532e	bio_integrity_get_tag
+EXPORT_SYMBOL vmlinux 0x4e81d3ed	thermal_zone_unbind_cooling_device
+EXPORT_SYMBOL vmlinux 0x4e830a3e	strnicmp
+EXPORT_SYMBOL vmlinux 0x4e90f967	seq_escape
+EXPORT_SYMBOL vmlinux 0x4eb3cad8	generic_file_llseek
+EXPORT_SYMBOL vmlinux 0x4eb60889	vfs_readdir
+EXPORT_SYMBOL vmlinux 0x4ee38b65	test_set_page_writeback
+EXPORT_SYMBOL vmlinux 0x4ee76065	cpufreq_get_policy
+EXPORT_SYMBOL vmlinux 0x4eeee74d	input_unregister_device
+EXPORT_SYMBOL vmlinux 0x4f1cd128	security_tun_dev_create
+EXPORT_SYMBOL vmlinux 0x4f274221	__devm_request_region
+EXPORT_SYMBOL vmlinux 0x4f27a821	kmem_ptr_validate
+EXPORT_SYMBOL vmlinux 0x4f476e96	init_cdrom_command
+EXPORT_SYMBOL vmlinux 0x4f4fcea0	sync_dirty_buffer
+EXPORT_SYMBOL vmlinux 0x4f5438c1	idle_halt
+EXPORT_SYMBOL vmlinux 0x4f73e9cb	tcp_parse_options
+EXPORT_SYMBOL vmlinux 0x4f783f30	acpi_read
+EXPORT_SYMBOL vmlinux 0x4f784ced	tcf_exts_validate
+EXPORT_SYMBOL vmlinux 0x4f8e7ad0	nf_hook_slow
+EXPORT_SYMBOL vmlinux 0x4f97f989	ethtool_op_set_tx_csum
+EXPORT_SYMBOL vmlinux 0x4fc2f3a0	__xfrm_route_forward
+EXPORT_SYMBOL vmlinux 0x4fdb1fb6	tcp_proc_register
+EXPORT_SYMBOL vmlinux 0x4fdee897	i8042_command
+EXPORT_SYMBOL vmlinux 0x50211ee3	tcp_free_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x502496bb	qdisc_reset
+EXPORT_SYMBOL vmlinux 0x50349f15	udp_ioctl
+EXPORT_SYMBOL vmlinux 0x506746b6	getrawmonotonic
+EXPORT_SYMBOL vmlinux 0x5071f91f	generic_ro_fops
+EXPORT_SYMBOL vmlinux 0x507a5228	seq_open_private
+EXPORT_SYMBOL vmlinux 0x50bdd470	boot_cpu_data
+EXPORT_SYMBOL vmlinux 0x50c39d9e	dmam_free_noncoherent
+EXPORT_SYMBOL vmlinux 0x50d2706c	bio_free
+EXPORT_SYMBOL vmlinux 0x50dff344	pci_find_next_bus
+EXPORT_SYMBOL vmlinux 0x50e547e8	set_bdi_congested
+EXPORT_SYMBOL vmlinux 0x5107639e	scsi_report_device_reset
+EXPORT_SYMBOL vmlinux 0x51162014	phy_sanitize_settings
+EXPORT_SYMBOL vmlinux 0x5118c382	secure_dccp_sequence_number
+EXPORT_SYMBOL vmlinux 0x511bf5cb	filp_open
+EXPORT_SYMBOL vmlinux 0x5152e605	memcmp
+EXPORT_SYMBOL vmlinux 0x51812be3	pnp_unregister_card_driver
+EXPORT_SYMBOL vmlinux 0x5186518f	profile_pc
+EXPORT_SYMBOL vmlinux 0x51c932a5	kthread_bind
+EXPORT_SYMBOL vmlinux 0x51d12d4e	acpi_pci_disabled
+EXPORT_SYMBOL vmlinux 0x51dce73b	xfrm_state_walk_init
+EXPORT_SYMBOL vmlinux 0x51ef33b8	kstrndup
+EXPORT_SYMBOL vmlinux 0x51f03477	dev_set_mac_address
+EXPORT_SYMBOL vmlinux 0x52026cdf	security_sb_parse_opts_str
+EXPORT_SYMBOL vmlinux 0x52095e19	acpi_get_data
+EXPORT_SYMBOL vmlinux 0x5226df1a	bio_put
+EXPORT_SYMBOL vmlinux 0x52503ec9	cdev_alloc
+EXPORT_SYMBOL vmlinux 0x5260cdf8	tcp_v4_destroy_sock
+EXPORT_SYMBOL vmlinux 0x5269b58f	sock_no_getsockopt
+EXPORT_SYMBOL vmlinux 0x52760ca9	getnstimeofday
+EXPORT_SYMBOL vmlinux 0x5282303c	scsi_unregister
+EXPORT_SYMBOL vmlinux 0x528c709d	simple_read_from_buffer
+EXPORT_SYMBOL vmlinux 0x52a58c24	ifla_policy
+EXPORT_SYMBOL vmlinux 0x52bfc0da	pci_choose_state
+EXPORT_SYMBOL vmlinux 0x52c5449b	ioctl_by_bdev
+EXPORT_SYMBOL vmlinux 0x52d7b2fd	llc_sap_list
+EXPORT_SYMBOL vmlinux 0x52daf294	sget
+EXPORT_SYMBOL vmlinux 0x52ebb126	param_get_ushort
+EXPORT_SYMBOL vmlinux 0x530abcb1	jbd2_journal_init_inode
+EXPORT_SYMBOL vmlinux 0x530b1e4c	rdmsr_on_cpus
+EXPORT_SYMBOL vmlinux 0x530b1e98	pm_suspend
+EXPORT_SYMBOL vmlinux 0x531b604e	__virt_addr_valid
+EXPORT_SYMBOL vmlinux 0x53249abb	mutex_lock
+EXPORT_SYMBOL vmlinux 0x53326531	mempool_alloc_pages
+EXPORT_SYMBOL vmlinux 0x5337c897	blk_free_tags
+EXPORT_SYMBOL vmlinux 0x53437b7f	journal_dirty_metadata
+EXPORT_SYMBOL vmlinux 0x53454576	f_setown
+EXPORT_SYMBOL vmlinux 0x538383c0	unregister_inet6addr_notifier
+EXPORT_SYMBOL vmlinux 0x5387932c	path_lookup
+EXPORT_SYMBOL vmlinux 0x539253d5	sock_no_mmap
+EXPORT_SYMBOL vmlinux 0x539856e1	load_nls
+EXPORT_SYMBOL vmlinux 0x539ec04f	call_usermodehelper_exec
+EXPORT_SYMBOL vmlinux 0x53c0767c	sk_chk_filter
+EXPORT_SYMBOL vmlinux 0x53c3a230	serio_unregister_port
+EXPORT_SYMBOL vmlinux 0x53d81f7f	d_delete
+EXPORT_SYMBOL vmlinux 0x541dfef4	atomic64_inc
+EXPORT_SYMBOL vmlinux 0x54290dc9	nla_validate
+EXPORT_SYMBOL vmlinux 0x544b3e87	isapnp_protocol
+EXPORT_SYMBOL vmlinux 0x54542f67	mca_device_set_name
+EXPORT_SYMBOL vmlinux 0x5456a2fe	vm_map_ram
+EXPORT_SYMBOL vmlinux 0x5467c711	dev_kfree_skb_irq
+EXPORT_SYMBOL vmlinux 0x547c830c	tty_port_alloc_xmit_buf
+EXPORT_SYMBOL vmlinux 0x54935666	acpi_os_read_port
+EXPORT_SYMBOL vmlinux 0x54a6d074	atomic64_dec
+EXPORT_SYMBOL vmlinux 0x54a8c1c4	blk_integrity_compare
+EXPORT_SYMBOL vmlinux 0x54c8d5b5	neigh_table_init
+EXPORT_SYMBOL vmlinux 0x54e6fcdd	net_enable_timestamp
+EXPORT_SYMBOL vmlinux 0x5548fdbf	journal_wipe
+EXPORT_SYMBOL vmlinux 0x5558e09e	dev_mc_delete
+EXPORT_SYMBOL vmlinux 0x555c3b94	cdrom_ioctl
+EXPORT_SYMBOL vmlinux 0x557814fe	rfkill_get_led_trigger_name
+EXPORT_SYMBOL vmlinux 0x5594be03	bitmap_remap
+EXPORT_SYMBOL vmlinux 0x5596e07c	scsi_scan_target
+EXPORT_SYMBOL vmlinux 0x55b3133e	dma_release_from_coherent
+EXPORT_SYMBOL vmlinux 0x5600904f	fb_get_color_depth
+EXPORT_SYMBOL vmlinux 0x5603cf43	do_settimeofday
+EXPORT_SYMBOL vmlinux 0x5614b010	xfrm_policy_walk_done
+EXPORT_SYMBOL vmlinux 0x5635a60a	vmalloc_user
+EXPORT_SYMBOL vmlinux 0x565dac3b	jbd2_journal_force_commit
+EXPORT_SYMBOL vmlinux 0x566564ac	mca_device_set_claim
+EXPORT_SYMBOL vmlinux 0x5683abed	rtnl_create_link
+EXPORT_SYMBOL vmlinux 0x5699026f	tcp_simple_retransmit
+EXPORT_SYMBOL vmlinux 0x56a038b9	pci_request_regions
+EXPORT_SYMBOL vmlinux 0x56abba50	genl_register_family_with_ops
+EXPORT_SYMBOL vmlinux 0x56c8799d	scsi_kunmap_atomic_sg
+EXPORT_SYMBOL vmlinux 0x56c98a34	mark_info_dirty
+EXPORT_SYMBOL vmlinux 0x56d0040f	fb_find_mode
+EXPORT_SYMBOL vmlinux 0x56df5a59	mmc_regulator_set_ocr
+EXPORT_SYMBOL vmlinux 0x56eb07a5	pcix_get_mmrbc
+EXPORT_SYMBOL vmlinux 0x56ed77e8	file_permission
+EXPORT_SYMBOL vmlinux 0x56f494e0	smp_call_function
+EXPORT_SYMBOL vmlinux 0x570fa218	__free_pages
+EXPORT_SYMBOL vmlinux 0x572e85d4	blk_lookup_devt
+EXPORT_SYMBOL vmlinux 0x5731d31e	ppp_output_wakeup
+EXPORT_SYMBOL vmlinux 0x57575f08	dmaengine_put
+EXPORT_SYMBOL vmlinux 0x5768dcb9	mapping_tagged
+EXPORT_SYMBOL vmlinux 0x57763e53	sock_map_fd
+EXPORT_SYMBOL vmlinux 0x57774aab	make_bad_inode
+EXPORT_SYMBOL vmlinux 0x57975ff6	netpoll_setup
+EXPORT_SYMBOL vmlinux 0x579fbcd2	cpu_possible_mask
+EXPORT_SYMBOL vmlinux 0x57a6504e	vsnprintf
+EXPORT_SYMBOL vmlinux 0x57adf756	per_cpu__this_cpu_off
+EXPORT_SYMBOL vmlinux 0x57af7c46	pci_bus_alloc_resource
+EXPORT_SYMBOL vmlinux 0x57afa1b6	dm_table_get_mode
+EXPORT_SYMBOL vmlinux 0x57b57ebe	jiffies_to_timespec
+EXPORT_SYMBOL vmlinux 0x57b6473f	__xfrm_state_destroy
+EXPORT_SYMBOL vmlinux 0x57db7242	mangle_path
+EXPORT_SYMBOL vmlinux 0x5821b09e	xfrm_policy_walk
+EXPORT_SYMBOL vmlinux 0x5828cc86	pci_request_regions_exclusive
+EXPORT_SYMBOL vmlinux 0x5838f6c9	rtc_valid_tm
+EXPORT_SYMBOL vmlinux 0x583daad7	tcp_make_synack
+EXPORT_SYMBOL vmlinux 0x584738f9	rdmsr_safe_on_cpu
+EXPORT_SYMBOL vmlinux 0x5857b225	ioread16_rep
+EXPORT_SYMBOL vmlinux 0x5857e434	groups_free
+EXPORT_SYMBOL vmlinux 0x5859b1a7	seq_bitmap
+EXPORT_SYMBOL vmlinux 0x587bf489	blk_rq_map_sg
+EXPORT_SYMBOL vmlinux 0x589daa30	rfkill_pause_polling
+EXPORT_SYMBOL vmlinux 0x58c72f45	xfrm_state_walk
+EXPORT_SYMBOL vmlinux 0x58d99e7a	set_pages_uc
+EXPORT_SYMBOL vmlinux 0x58f473ec	pci_add_new_bus
+EXPORT_SYMBOL vmlinux 0x58f5672d	end_buffer_read_sync
+EXPORT_SYMBOL vmlinux 0x58fef6f8	ist_info
+EXPORT_SYMBOL vmlinux 0x590ce04d	generic_splice_sendpage
+EXPORT_SYMBOL vmlinux 0x591a866a	bio_add_page
+EXPORT_SYMBOL vmlinux 0x5934392b	fb_register_client
+EXPORT_SYMBOL vmlinux 0x594bf15b	ioport_map
+EXPORT_SYMBOL vmlinux 0x596a44de	blk_end_request_cur
+EXPORT_SYMBOL vmlinux 0x5971776b	skb_copy
+EXPORT_SYMBOL vmlinux 0x598f9ef8	tcp_v4_md5_do_del
+EXPORT_SYMBOL vmlinux 0x59a49e3f	blkdev_issue_discard
+EXPORT_SYMBOL vmlinux 0x59acb3e9	scsi_bios_ptable
+EXPORT_SYMBOL vmlinux 0x59b108d9	sk_common_release
+EXPORT_SYMBOL vmlinux 0x59bc9609	acpi_write_bit_register
+EXPORT_SYMBOL vmlinux 0x59d0df9f	tcp4_gro_complete
+EXPORT_SYMBOL vmlinux 0x59d696b6	register_module_notifier
+EXPORT_SYMBOL vmlinux 0x59d79f1a	iw_handler_set_thrspy
+EXPORT_SYMBOL vmlinux 0x59d8223a	ioport_resource
+EXPORT_SYMBOL vmlinux 0x59f0237c	mmc_register_driver
+EXPORT_SYMBOL vmlinux 0x59ffcda3	scsi_register_driver
+EXPORT_SYMBOL vmlinux 0x5a079e49	__secpath_destroy
+EXPORT_SYMBOL vmlinux 0x5a2a6bfe	__lock_buffer
+EXPORT_SYMBOL vmlinux 0x5a4896a8	__put_user_2
+EXPORT_SYMBOL vmlinux 0x5a57d155	__percpu_counter_init
+EXPORT_SYMBOL vmlinux 0x5a744b86	netlink_set_nonroot
+EXPORT_SYMBOL vmlinux 0x5aa59ed4	sock_no_socketpair
+EXPORT_SYMBOL vmlinux 0x5aab34fd	kfree_skb
+EXPORT_SYMBOL vmlinux 0x5ab79a9d	qdisc_class_hash_grow
+EXPORT_SYMBOL vmlinux 0x5ac376a5	acpi_install_fixed_event_handler
+EXPORT_SYMBOL vmlinux 0x5acb6756	ps2_command
+EXPORT_SYMBOL vmlinux 0x5b0828a0	neigh_parms_alloc
+EXPORT_SYMBOL vmlinux 0x5b19634d	div_s64_rem
+EXPORT_SYMBOL vmlinux 0x5b196455	vfs_get_dqblk
+EXPORT_SYMBOL vmlinux 0x5b51c6a7	acpi_walk_resources
+EXPORT_SYMBOL vmlinux 0x5b656a16	phy_start
+EXPORT_SYMBOL vmlinux 0x5b74aedc	netpoll_parse_options
+EXPORT_SYMBOL vmlinux 0x5b871bf1	ps2_handle_ack
+EXPORT_SYMBOL vmlinux 0x5baa327e	netif_carrier_on
+EXPORT_SYMBOL vmlinux 0x5bba86ed	tcf_action_exec
+EXPORT_SYMBOL vmlinux 0x5bcbb9c7	kmem_cache_name
+EXPORT_SYMBOL vmlinux 0x5c052867	kernel_accept
+EXPORT_SYMBOL vmlinux 0x5c0bf507	end_buffer_write_sync
+EXPORT_SYMBOL vmlinux 0x5c151f87	jbd2_log_start_commit
+EXPORT_SYMBOL vmlinux 0x5c265cba	sg_init_one
+EXPORT_SYMBOL vmlinux 0x5c4a57a3	lock_fb_info
+EXPORT_SYMBOL vmlinux 0x5c55aba6	copy_strings_kernel
+EXPORT_SYMBOL vmlinux 0x5c68705b	mca_read_pos
+EXPORT_SYMBOL vmlinux 0x5c89ffdd	register_gifconf
+EXPORT_SYMBOL vmlinux 0x5c8c2f5b	cdev_add
+EXPORT_SYMBOL vmlinux 0x5cbc652f	blk_queue_max_phys_segments
+EXPORT_SYMBOL vmlinux 0x5ce8b103	serio_open
+EXPORT_SYMBOL vmlinux 0x5d12b3fc	twl4030_i2c_write_u8
+EXPORT_SYMBOL vmlinux 0x5d37b126	vm_insert_pfn
+EXPORT_SYMBOL vmlinux 0x5d455923	scsi_get_command
+EXPORT_SYMBOL vmlinux 0x5d636634	vmtruncate
+EXPORT_SYMBOL vmlinux 0x5d668f29	sock_get_timestampns
+EXPORT_SYMBOL vmlinux 0x5d70cc85	skb_copy_and_csum_datagram_iovec
+EXPORT_SYMBOL vmlinux 0x5d76a2da	audit_log_format
+EXPORT_SYMBOL vmlinux 0x5d975074	complete_request_key
+EXPORT_SYMBOL vmlinux 0x5da7c940	dmam_declare_coherent_memory
+EXPORT_SYMBOL vmlinux 0x5dad5381	phy_register_fixup_for_uid
+EXPORT_SYMBOL vmlinux 0x5db85608	journal_lock_updates
+EXPORT_SYMBOL vmlinux 0x5dde2b8e	bitmap_end_sync
+EXPORT_SYMBOL vmlinux 0x5dea2c84	mmc_set_data_timeout
+EXPORT_SYMBOL vmlinux 0x5e2d7f4e	serio_rescan
+EXPORT_SYMBOL vmlinux 0x5e3e91ac	pci_find_device
+EXPORT_SYMBOL vmlinux 0x5e44df37	find_get_pages_contig
+EXPORT_SYMBOL vmlinux 0x5e51f8a0	devm_request_threaded_irq
+EXPORT_SYMBOL vmlinux 0x5e67b34b	default_unplug_io_fn
+EXPORT_SYMBOL vmlinux 0x5e6cf631	phy_detach
+EXPORT_SYMBOL vmlinux 0x5e87ebf6	mnt_unpin
+EXPORT_SYMBOL vmlinux 0x5e95b1cd	current_umask
+EXPORT_SYMBOL vmlinux 0x5e992ee0	dcache_dir_lseek
+EXPORT_SYMBOL vmlinux 0x5e997c09	blk_queue_free_tags
+EXPORT_SYMBOL vmlinux 0x5ea520c5	tcp_select_initial_window
+EXPORT_SYMBOL vmlinux 0x5eb1b630	pci_release_region
+EXPORT_SYMBOL vmlinux 0x5eb31c08	skb_add_rx_frag
+EXPORT_SYMBOL vmlinux 0x5ec25da8	sock_init_data
+EXPORT_SYMBOL vmlinux 0x5eccde28	block_write_end
+EXPORT_SYMBOL vmlinux 0x5ece6aaf	tcp_proc_unregister
+EXPORT_SYMBOL vmlinux 0x5ed040b0	pm_set_vt_switch
+EXPORT_SYMBOL vmlinux 0x5edd0762	bin2bcd
+EXPORT_SYMBOL vmlinux 0x5f0384ff	__set_page_dirty_buffers
+EXPORT_SYMBOL vmlinux 0x5f1bd579	mca_find_adapter
+EXPORT_SYMBOL vmlinux 0x5f31d37b	netlink_broadcast
+EXPORT_SYMBOL vmlinux 0x5f56db66	per_cpu__ftrace_event_seq
+EXPORT_SYMBOL vmlinux 0x5f58593d	tty_driver_kref_put
+EXPORT_SYMBOL vmlinux 0x5f6f1853	xfrm6_find_1stfragopt
+EXPORT_SYMBOL vmlinux 0x5fa8207a	sock_no_poll
+EXPORT_SYMBOL vmlinux 0x5fa911ea	napi_frags_skb
+EXPORT_SYMBOL vmlinux 0x5fa99c36	pci_reenable_device
+EXPORT_SYMBOL vmlinux 0x5fd28824	security_path_symlink
+EXPORT_SYMBOL vmlinux 0x5fde10eb	cdev_index
+EXPORT_SYMBOL vmlinux 0x5fe138e8	pci_scan_slot
+EXPORT_SYMBOL vmlinux 0x5ff42b08	acpi_video_get_capabilities
+EXPORT_SYMBOL vmlinux 0x600683d3	do_unblank_screen
+EXPORT_SYMBOL vmlinux 0x6013b345	generic_read_dir
+EXPORT_SYMBOL vmlinux 0x60243b7d	dma_async_device_register
+EXPORT_SYMBOL vmlinux 0x602ed00d	acpi_current_gpe_count
+EXPORT_SYMBOL vmlinux 0x6043092c	atomic64_dec_and_test
+EXPORT_SYMBOL vmlinux 0x6050b399	blk_alloc_queue
+EXPORT_SYMBOL vmlinux 0x60569b44	call_usermodehelper_setup
+EXPORT_SYMBOL vmlinux 0x6079cf64	napi_reuse_skb
+EXPORT_SYMBOL vmlinux 0x607c46cb	tty_mutex
+EXPORT_SYMBOL vmlinux 0x609f1c7e	synchronize_net
+EXPORT_SYMBOL vmlinux 0x60a0ebad	__tracepoint_kmem_cache_alloc_node
+EXPORT_SYMBOL vmlinux 0x60a279ff	pci_do_scan_bus
+EXPORT_SYMBOL vmlinux 0x60a32ea9	pm_power_off
+EXPORT_SYMBOL vmlinux 0x60a50c0c	dev_gro_receive
+EXPORT_SYMBOL vmlinux 0x60c5eb2f	simple_write_end
+EXPORT_SYMBOL vmlinux 0x60d36e22	get_disk
+EXPORT_SYMBOL vmlinux 0x60f5b5ae	pnp_find_dev
+EXPORT_SYMBOL vmlinux 0x60fe750b	rtnetlink_put_metrics
+EXPORT_SYMBOL vmlinux 0x610737e5	unregister_qdisc
+EXPORT_SYMBOL vmlinux 0x6114facd	pci_request_region_exclusive
+EXPORT_SYMBOL vmlinux 0x612390ad	netpoll_set_trap
+EXPORT_SYMBOL vmlinux 0x6134274b	framebuffer_alloc
+EXPORT_SYMBOL vmlinux 0x614a28cd	__pagevec_release
+EXPORT_SYMBOL vmlinux 0x6174c291	security_d_instantiate
+EXPORT_SYMBOL vmlinux 0x61877940	page_address
+EXPORT_SYMBOL vmlinux 0x618d8299	set_notify_swap_entry_free
+EXPORT_SYMBOL vmlinux 0x61b7b126	simple_strtoull
+EXPORT_SYMBOL vmlinux 0x61ec6603	netpoll_send_udp
+EXPORT_SYMBOL vmlinux 0x62049256	acpi_disable
+EXPORT_SYMBOL vmlinux 0x62193598	pnp_range_reserved
+EXPORT_SYMBOL vmlinux 0x6237f6b5	acpi_enable_event
+EXPORT_SYMBOL vmlinux 0x623dc64a	nf_unregister_sockopt
+EXPORT_SYMBOL vmlinux 0x6241a2ab	__copy_from_user_ll_nocache
+EXPORT_SYMBOL vmlinux 0x6241fd2c	acpi_install_address_space_handler
+EXPORT_SYMBOL vmlinux 0x62737e1d	sock_unregister
+EXPORT_SYMBOL vmlinux 0x62827bec	security_secctx_to_secid
+EXPORT_SYMBOL vmlinux 0x6284c724	bioset_integrity_create
+EXPORT_SYMBOL vmlinux 0x62854505	clip_tbl_hook
+EXPORT_SYMBOL vmlinux 0x62937fba	blk_queue_io_min
+EXPORT_SYMBOL vmlinux 0x6299938c	dmam_pool_create
+EXPORT_SYMBOL vmlinux 0x62cb83a7	tcp_setsockopt
+EXPORT_SYMBOL vmlinux 0x62dbd1c6	page_follow_link_light
+EXPORT_SYMBOL vmlinux 0x6307fc98	del_timer
+EXPORT_SYMBOL vmlinux 0x63211c0a	__netif_schedule
+EXPORT_SYMBOL vmlinux 0x6325288a	ip_mc_inc_group
+EXPORT_SYMBOL vmlinux 0x632daf62	ip_generic_getfrag
+EXPORT_SYMBOL vmlinux 0x6357ae4f	security_inode_notifysecctx
+EXPORT_SYMBOL vmlinux 0x635fd3bb	sock_register
+EXPORT_SYMBOL vmlinux 0x636a5691	acpi_register_ioapic
+EXPORT_SYMBOL vmlinux 0x639e7d28	balance_dirty_pages_ratelimited_nr
+EXPORT_SYMBOL vmlinux 0x63e82bc3	i2c_verify_client
+EXPORT_SYMBOL vmlinux 0x63ecad53	register_netdevice_notifier
+EXPORT_SYMBOL vmlinux 0x63ef66ef	ip_queue_xmit
+EXPORT_SYMBOL vmlinux 0x63efc536	radix_tree_prev_hole
+EXPORT_SYMBOL vmlinux 0x6403e338	tcp_memory_pressure
+EXPORT_SYMBOL vmlinux 0x640a7078	posix_acl_create_masq
+EXPORT_SYMBOL vmlinux 0x641b3db1	dma_pool_free
+EXPORT_SYMBOL vmlinux 0x642603a8	sock_no_accept
+EXPORT_SYMBOL vmlinux 0x6429458f	i2c_smbus_read_i2c_block_data
+EXPORT_SYMBOL vmlinux 0x642e54ac	__wake_up
+EXPORT_SYMBOL vmlinux 0x64378f45	inet_stream_connect
+EXPORT_SYMBOL vmlinux 0x64526a93	atomic64_sub_return
+EXPORT_SYMBOL vmlinux 0x645d2eb8	blk_queue_alignment_offset
+EXPORT_SYMBOL vmlinux 0x6466a1e6	mempool_alloc
+EXPORT_SYMBOL vmlinux 0x6478134c	ec_burst_enable
+EXPORT_SYMBOL vmlinux 0x648e19ce	ipv6_chk_addr
+EXPORT_SYMBOL vmlinux 0x64999478	congestion_wait
+EXPORT_SYMBOL vmlinux 0x649f45d4	inet6_bind
+EXPORT_SYMBOL vmlinux 0x64dbd981	free_task
+EXPORT_SYMBOL vmlinux 0x64e000bd	proc_net_netfilter
+EXPORT_SYMBOL vmlinux 0x64eae7ad	set_memory_array_wb
+EXPORT_SYMBOL vmlinux 0x650fb346	add_wait_queue
+EXPORT_SYMBOL vmlinux 0x651a4139	test_taint
+EXPORT_SYMBOL vmlinux 0x65408378	zlib_inflate_blob
+EXPORT_SYMBOL vmlinux 0x65414e67	dev_valid_name
+EXPORT_SYMBOL vmlinux 0x6552922f	nf_register_hooks
+EXPORT_SYMBOL vmlinux 0x655c1009	rfkill_destroy
+EXPORT_SYMBOL vmlinux 0x6567b967	d_find_alias
+EXPORT_SYMBOL vmlinux 0x65785307	skb_copy_bits
+EXPORT_SYMBOL vmlinux 0x6586d07a	blk_start_request
+EXPORT_SYMBOL vmlinux 0x65913d0f	poll_schedule_timeout
+EXPORT_SYMBOL vmlinux 0x65b78e60	inet_csk_accept
+EXPORT_SYMBOL vmlinux 0x660aed8f	ip_ct_attach
+EXPORT_SYMBOL vmlinux 0x661333df	simple_write_begin
+EXPORT_SYMBOL vmlinux 0x663f8574	udp_lib_setsockopt
+EXPORT_SYMBOL vmlinux 0x664f3e62	xfrm_unregister_km
+EXPORT_SYMBOL vmlinux 0x66591fc1	bio_integrity_endio
+EXPORT_SYMBOL vmlinux 0x66792cdb	block_page_mkwrite
+EXPORT_SYMBOL vmlinux 0x668da8d5	zlib_inflateIncomp
+EXPORT_SYMBOL vmlinux 0x66aa01b9	scsi_free_host_dev
+EXPORT_SYMBOL vmlinux 0x66b2730d	pci_bus_assign_resources
+EXPORT_SYMBOL vmlinux 0x66b3955d	dev_get_by_index
+EXPORT_SYMBOL vmlinux 0x66d983aa	acpi_root_dir
+EXPORT_SYMBOL vmlinux 0x66e3c5ce	deactivate_locked_super
+EXPORT_SYMBOL vmlinux 0x670332f2	nobh_truncate_page
+EXPORT_SYMBOL vmlinux 0x67053080	current_kernel_time
+EXPORT_SYMBOL vmlinux 0x6729d3df	__get_user_4
+EXPORT_SYMBOL vmlinux 0x675218ea	uart_unregister_driver
+EXPORT_SYMBOL vmlinux 0x6768a28d	scsi_block_when_processing_errors
+EXPORT_SYMBOL vmlinux 0x676d049d	journal_check_available_features
+EXPORT_SYMBOL vmlinux 0x6770557c	generic_block_fiemap
+EXPORT_SYMBOL vmlinux 0x677c2c8c	unregister_8022_client
+EXPORT_SYMBOL vmlinux 0x67804a19	__any_online_cpu
+EXPORT_SYMBOL vmlinux 0x678435ff	scsi_calculate_bounce_limit
+EXPORT_SYMBOL vmlinux 0x67aca2a6	scsi_release_buffers
+EXPORT_SYMBOL vmlinux 0x67b27ec1	tty_std_termios
+EXPORT_SYMBOL vmlinux 0x67b5f60e	phy_disable_interrupts
+EXPORT_SYMBOL vmlinux 0x67b71af6	register_quota_format
+EXPORT_SYMBOL vmlinux 0x67be3d4f	set_pages_array_wb
+EXPORT_SYMBOL vmlinux 0x67d106b3	generic_file_aio_write
+EXPORT_SYMBOL vmlinux 0x6800ef62	inet6_register_protosw
+EXPORT_SYMBOL vmlinux 0x68118c6b	__nla_reserve_nohdr
+EXPORT_SYMBOL vmlinux 0x68176274	vfs_statfs
+EXPORT_SYMBOL vmlinux 0x68332af2	otg_set_transceiver
+EXPORT_SYMBOL vmlinux 0x68730e98	block_write_full_page_endio
+EXPORT_SYMBOL vmlinux 0x6886f0b6	dma_async_memcpy_buf_to_pg
+EXPORT_SYMBOL vmlinux 0x689bf10a	mb_cache_shrink
+EXPORT_SYMBOL vmlinux 0x68a59fd8	make_EII_client
+EXPORT_SYMBOL vmlinux 0x68a7297b	devm_ioremap
+EXPORT_SYMBOL vmlinux 0x68a7bacd	i2c_master_send
+EXPORT_SYMBOL vmlinux 0x68a93267	xfrm_state_lookup
+EXPORT_SYMBOL vmlinux 0x68b197aa	unregister_sysrq_key
+EXPORT_SYMBOL vmlinux 0x68fbd720	tr_type_trans
+EXPORT_SYMBOL vmlinux 0x6919a9a7	try_to_release_page
+EXPORT_SYMBOL vmlinux 0x693c01e2	kill_block_super
+EXPORT_SYMBOL vmlinux 0x6953e87a	thermal_zone_device_register
+EXPORT_SYMBOL vmlinux 0x6971447a	rtc_month_days
+EXPORT_SYMBOL vmlinux 0x6980fe91	param_get_int
+EXPORT_SYMBOL vmlinux 0x69927dff	try_acquire_console_sem
+EXPORT_SYMBOL vmlinux 0x69a0ca7d	iowrite16be
+EXPORT_SYMBOL vmlinux 0x69b393b5	sg_miter_start
+EXPORT_SYMBOL vmlinux 0x69c8c1d5	security_req_classify_flow
+EXPORT_SYMBOL vmlinux 0x69d2575f	efi
+EXPORT_SYMBOL vmlinux 0x69d38ed9	__scsi_print_sense
+EXPORT_SYMBOL vmlinux 0x69e27c7a	bitmap_copy_le
+EXPORT_SYMBOL vmlinux 0x6a037cf1	mempool_kfree
+EXPORT_SYMBOL vmlinux 0x6a22eaaf	pcim_pin_device
+EXPORT_SYMBOL vmlinux 0x6a27bfce	csum_partial_copy_generic
+EXPORT_SYMBOL vmlinux 0x6a427172	ndisc_mc_map
+EXPORT_SYMBOL vmlinux 0x6a47571d	__set_personality
+EXPORT_SYMBOL vmlinux 0x6a482840	__nla_put
+EXPORT_SYMBOL vmlinux 0x6a4a4a2d	inode_change_ok
+EXPORT_SYMBOL vmlinux 0x6a5f9bf4	ip_xfrm_me_harder
+EXPORT_SYMBOL vmlinux 0x6a69edc8	unregister_framebuffer
+EXPORT_SYMBOL vmlinux 0x6a6a1141	rfkill_resume_polling
+EXPORT_SYMBOL vmlinux 0x6a73912e	journal_start
+EXPORT_SYMBOL vmlinux 0x6a767601	__nla_reserve
+EXPORT_SYMBOL vmlinux 0x6a76f3ac	blk_iopoll_enable
+EXPORT_SYMBOL vmlinux 0x6a9f26c9	init_timer_key
+EXPORT_SYMBOL vmlinux 0x6aa1e5e1	directly_mappable_cdev_bdi
+EXPORT_SYMBOL vmlinux 0x6ac1d51d	tty_insert_flip_string_flags
+EXPORT_SYMBOL vmlinux 0x6acb973d	iowrite32be
+EXPORT_SYMBOL vmlinux 0x6ad065f4	param_set_charp
+EXPORT_SYMBOL vmlinux 0x6ad85887	acpi_enable_gpe
+EXPORT_SYMBOL vmlinux 0x6add5c9a	dmi_find_device
+EXPORT_SYMBOL vmlinux 0x6b0509ab	genphy_config_aneg
+EXPORT_SYMBOL vmlinux 0x6b158244	call_usermodehelper_setkeys
+EXPORT_SYMBOL vmlinux 0x6b1b67d3	__bdevname
+EXPORT_SYMBOL vmlinux 0x6b28395b	sysctl_jiffies
+EXPORT_SYMBOL vmlinux 0x6b29ab58	blk_insert_request
+EXPORT_SYMBOL vmlinux 0x6b2ab172	pcibios_set_irq_routing
+EXPORT_SYMBOL vmlinux 0x6b2dc060	dump_stack
+EXPORT_SYMBOL vmlinux 0x6b7c6bff	pci_fixup_cardbus
+EXPORT_SYMBOL vmlinux 0x6b85fe3c	ipv6_push_nfrag_opts
+EXPORT_SYMBOL vmlinux 0x6b878166	scsi_add_host_with_dma
+EXPORT_SYMBOL vmlinux 0x6b913c9e	input_inject_event
+EXPORT_SYMBOL vmlinux 0x6b937ffb	mca_mark_as_used
+EXPORT_SYMBOL vmlinux 0x6b9b88f3	sleep_on
+EXPORT_SYMBOL vmlinux 0x6bb261d4	dev_close
+EXPORT_SYMBOL vmlinux 0x6bb812e7	atomic64_add_return
+EXPORT_SYMBOL vmlinux 0x6bc05d05	blk_queue_bounce_limit
+EXPORT_SYMBOL vmlinux 0x6bc3fbc0	__unregister_chrdev
+EXPORT_SYMBOL vmlinux 0x6bce2cd0	jbd2_journal_restart
+EXPORT_SYMBOL vmlinux 0x6bcf278b	scsi_unblock_requests
+EXPORT_SYMBOL vmlinux 0x6bdc9a24	tty_register_device
+EXPORT_SYMBOL vmlinux 0x6bdcfd99	qdisc_class_hash_remove
+EXPORT_SYMBOL vmlinux 0x6bea7cb8	tty_port_close
+EXPORT_SYMBOL vmlinux 0x6c041202	pci_dev_get
+EXPORT_SYMBOL vmlinux 0x6c1ce5ce	strcspn
+EXPORT_SYMBOL vmlinux 0x6c20ee77	uart_add_one_port
+EXPORT_SYMBOL vmlinux 0x6c2bf2b1	blk_queue_init_tags
+EXPORT_SYMBOL vmlinux 0x6c2e3320	strncmp
+EXPORT_SYMBOL vmlinux 0x6c340d71	iw_handler_get_spy
+EXPORT_SYMBOL vmlinux 0x6c389761	acpi_bus_get_private_data
+EXPORT_SYMBOL vmlinux 0x6c61ce70	num_registered_fb
+EXPORT_SYMBOL vmlinux 0x6c702af7	sysctl_udp_rmem_min
+EXPORT_SYMBOL vmlinux 0x6cb3dcda	vfs_dq_drop
+EXPORT_SYMBOL vmlinux 0x6cbad823	mmc_alloc_host
+EXPORT_SYMBOL vmlinux 0x6cd34e7d	redraw_screen
+EXPORT_SYMBOL vmlinux 0x6cdc5c6b	nla_strlcpy
+EXPORT_SYMBOL vmlinux 0x6cdea169	pci_read_vpd
+EXPORT_SYMBOL vmlinux 0x6ce24c5f	key_type_keyring
+EXPORT_SYMBOL vmlinux 0x6d19fdd4	bio_phys_segments
+EXPORT_SYMBOL vmlinux 0x6d22185d	dm_dirty_log_type_unregister
+EXPORT_SYMBOL vmlinux 0x6d27ef64	__bitmap_empty
+EXPORT_SYMBOL vmlinux 0x6d288375	radix_tree_next_hole
+EXPORT_SYMBOL vmlinux 0x6d294e43	clock_t_to_jiffies
+EXPORT_SYMBOL vmlinux 0x6d340f64	tty_termios_input_baud_rate
+EXPORT_SYMBOL vmlinux 0x6d358217	register_framebuffer
+EXPORT_SYMBOL vmlinux 0x6d37e493	acpi_bus_start
+EXPORT_SYMBOL vmlinux 0x6d464175	__sg_free_table
+EXPORT_SYMBOL vmlinux 0x6d4804c4	nf_log_packet
+EXPORT_SYMBOL vmlinux 0x6d56994a	cmpxchg_486_u64
+EXPORT_SYMBOL vmlinux 0x6d57dbf0	page_zero_new_buffers
+EXPORT_SYMBOL vmlinux 0x6d6cbadc	rb_last
+EXPORT_SYMBOL vmlinux 0x6d6e4f1e	llc_set_station_handler
+EXPORT_SYMBOL vmlinux 0x6dc0c24b	complete_and_exit
+EXPORT_SYMBOL vmlinux 0x6dcb4816	set_blocksize
+EXPORT_SYMBOL vmlinux 0x6dcb53ed	eisa_bus_type
+EXPORT_SYMBOL vmlinux 0x6dd0ddcb	cdev_init
+EXPORT_SYMBOL vmlinux 0x6dd62aa6	get_empty_filp
+EXPORT_SYMBOL vmlinux 0x6def2db2	half_md4_transform
+EXPORT_SYMBOL vmlinux 0x6e07a54e	acpi_get_gpe_status
+EXPORT_SYMBOL vmlinux 0x6e5a3301	sock_rfree
+EXPORT_SYMBOL vmlinux 0x6e720ff2	rtnl_unlock
+EXPORT_SYMBOL vmlinux 0x6e9cfbaa	security_sb_set_mnt_opts
+EXPORT_SYMBOL vmlinux 0x6e9dd606	__symbol_put
+EXPORT_SYMBOL vmlinux 0x6ea4db7e	sock_no_recvmsg
+EXPORT_SYMBOL vmlinux 0x6eb0fdf3	__cond_resched_lock
+EXPORT_SYMBOL vmlinux 0x6ebb5c85	jbd2_journal_begin_ordered_truncate
+EXPORT_SYMBOL vmlinux 0x6ebeb626	init_task
+EXPORT_SYMBOL vmlinux 0x6ee87f87	phy_attach_direct
+EXPORT_SYMBOL vmlinux 0x6f2debf0	jbd2_journal_flush
+EXPORT_SYMBOL vmlinux 0x6f3e4ab1	tcp_disconnect
+EXPORT_SYMBOL vmlinux 0x6f50844e	journal_set_features
+EXPORT_SYMBOL vmlinux 0x6f556bdb	acpi_get_gpe_device
+EXPORT_SYMBOL vmlinux 0x6f74df5e	sk_wait_data
+EXPORT_SYMBOL vmlinux 0x6fcb87a1	touch_softlockup_watchdog
+EXPORT_SYMBOL vmlinux 0x6fe909bf	__find_get_block
+EXPORT_SYMBOL vmlinux 0x6feb2039	acpi_write
+EXPORT_SYMBOL vmlinux 0x6feb94f2	sock_recvmsg
+EXPORT_SYMBOL vmlinux 0x6fff393f	time_to_tm
+EXPORT_SYMBOL vmlinux 0x700e64f9	__splice_from_pipe
+EXPORT_SYMBOL vmlinux 0x70101b35	sock_setsockopt
+EXPORT_SYMBOL vmlinux 0x701d0ebd	snprintf
+EXPORT_SYMBOL vmlinux 0x7022d050	nf_unregister_hook
+EXPORT_SYMBOL vmlinux 0x7025d6bd	inet_addr_type
+EXPORT_SYMBOL vmlinux 0x702fc2bd	pagecache_write_end
+EXPORT_SYMBOL vmlinux 0x7032ba4a	scsi_scan_host
+EXPORT_SYMBOL vmlinux 0x7048b0d5	slow_work_cancel
+EXPORT_SYMBOL vmlinux 0x70523a7a	__cond_resched_softirq
+EXPORT_SYMBOL vmlinux 0x7054a3e4	request_dma
+EXPORT_SYMBOL vmlinux 0x70588bfd	in_dev_finish_destroy
+EXPORT_SYMBOL vmlinux 0x706ac77d	pcim_iomap_table
+EXPORT_SYMBOL vmlinux 0x708257db	ip_fragment
+EXPORT_SYMBOL vmlinux 0x70834526	netlink_rcv_skb
+EXPORT_SYMBOL vmlinux 0x70bc17d7	inode_wait
+EXPORT_SYMBOL vmlinux 0x70c90d98	dev_load
+EXPORT_SYMBOL vmlinux 0x70d1f8f3	strncat
+EXPORT_SYMBOL vmlinux 0x70d8ab82	acpi_acquire_global_lock
+EXPORT_SYMBOL vmlinux 0x70dc114f	pnp_device_attach
+EXPORT_SYMBOL vmlinux 0x70e37549	kmem_cache_create
+EXPORT_SYMBOL vmlinux 0x70f3b713	set_pages_x
+EXPORT_SYMBOL vmlinux 0x7125741a	register_netdevice
+EXPORT_SYMBOL vmlinux 0x7129e5f8	hex_asc
+EXPORT_SYMBOL vmlinux 0x712aa29b	_spin_lock_irqsave
+EXPORT_SYMBOL vmlinux 0x712be006	dm_exception_store_create
+EXPORT_SYMBOL vmlinux 0x71356fba	remove_wait_queue
+EXPORT_SYMBOL vmlinux 0x713e636e	phy_scan_fixups
+EXPORT_SYMBOL vmlinux 0x714c7a81	acpi_check_mem_region
+EXPORT_SYMBOL vmlinux 0x716f3790	scsi_print_command
+EXPORT_SYMBOL vmlinux 0x7171121c	overflowgid
+EXPORT_SYMBOL vmlinux 0x71a50dbc	register_blkdev
+EXPORT_SYMBOL vmlinux 0x71ea4dcf	devcgroup_inode_permission
+EXPORT_SYMBOL vmlinux 0x721d1833	dquot_destroy
+EXPORT_SYMBOL vmlinux 0x72306080	sock_create_lite
+EXPORT_SYMBOL vmlinux 0x724f9f5b	bio_map_kern
+EXPORT_SYMBOL vmlinux 0x72636d48	tty_port_tty_set
+EXPORT_SYMBOL vmlinux 0x72727d02	security_path_rmdir
+EXPORT_SYMBOL vmlinux 0x728d95d5	blk_queue_dma_alignment
+EXPORT_SYMBOL vmlinux 0x72aa82be	acpi_get_physical_device
+EXPORT_SYMBOL vmlinux 0x72b243d4	free_dma
+EXPORT_SYMBOL vmlinux 0x72b53ad3	mmc_add_host
+EXPORT_SYMBOL vmlinux 0x72bc7fe7	vlan_dev_vlan_id
+EXPORT_SYMBOL vmlinux 0x72bf2140	mtrr_add
+EXPORT_SYMBOL vmlinux 0x72c3be87	param_set_byte
+EXPORT_SYMBOL vmlinux 0x72dda130	pnp_is_active
+EXPORT_SYMBOL vmlinux 0x72e35cf9	unregister_md_personality
+EXPORT_SYMBOL vmlinux 0x72ea7b2d	scsi_device_type
+EXPORT_SYMBOL vmlinux 0x73264484	module_refcount
+EXPORT_SYMBOL vmlinux 0x732c5a7c	scsi_execute_req
+EXPORT_SYMBOL vmlinux 0x735a0bd5	native_io_delay
+EXPORT_SYMBOL vmlinux 0x73607e3f	blkdev_issue_flush
+EXPORT_SYMBOL vmlinux 0x7362dd1e	vfs_fstat
+EXPORT_SYMBOL vmlinux 0x738803e6	strnlen
+EXPORT_SYMBOL vmlinux 0x7389c9a8	acpi_bus_get_power
+EXPORT_SYMBOL vmlinux 0x7396d0cc	tcp_recvmsg
+EXPORT_SYMBOL vmlinux 0x73a352d8	xfrm_register_type
+EXPORT_SYMBOL vmlinux 0x73e20c1c	strlcpy
+EXPORT_SYMBOL vmlinux 0x740a1b95	reserve_evntsel_nmi
+EXPORT_SYMBOL vmlinux 0x7413793a	EISA_bus
+EXPORT_SYMBOL vmlinux 0x7443af3b	dev_remove_pack
+EXPORT_SYMBOL vmlinux 0x744c0c68	param_get_byte
+EXPORT_SYMBOL vmlinux 0x746bb3c2	netpoll_poll
+EXPORT_SYMBOL vmlinux 0x7485e15e	unregister_chrdev_region
+EXPORT_SYMBOL vmlinux 0x748caf40	down
+EXPORT_SYMBOL vmlinux 0x74954462	timecounter_read
+EXPORT_SYMBOL vmlinux 0x74ae981e	kill_pgrp
+EXPORT_SYMBOL vmlinux 0x74b57de9	acpi_bus_get_status
+EXPORT_SYMBOL vmlinux 0x74bfc369	__tracepoint_kmem_cache_alloc
+EXPORT_SYMBOL vmlinux 0x74cc1cbe	unregister_cpu_notifier
+EXPORT_SYMBOL vmlinux 0x75271716	save_processor_state
+EXPORT_SYMBOL vmlinux 0x756736ee	journal_force_commit
+EXPORT_SYMBOL vmlinux 0x759813eb	pagecache_write_begin
+EXPORT_SYMBOL vmlinux 0x759f34da	pci_bus_add_devices
+EXPORT_SYMBOL vmlinux 0x75b3b8e5	alloc_disk
+EXPORT_SYMBOL vmlinux 0x75b9d339	vfs_dq_transfer
+EXPORT_SYMBOL vmlinux 0x75d1414e	generic_file_readonly_mmap
+EXPORT_SYMBOL vmlinux 0x75dc05ef	xrlim_allow
+EXPORT_SYMBOL vmlinux 0x75f4cb99	pci_bus_size_bridges
+EXPORT_SYMBOL vmlinux 0x75f9f8b3	set_irq_chip
+EXPORT_SYMBOL vmlinux 0x760a0f4f	yield
+EXPORT_SYMBOL vmlinux 0x760b437a	unregister_inetaddr_notifier
+EXPORT_SYMBOL vmlinux 0x7630fc2b	journal_errno
+EXPORT_SYMBOL vmlinux 0x763bc3b1	dma_pool_destroy
+EXPORT_SYMBOL vmlinux 0x764a8670	blk_queue_update_dma_pad
+EXPORT_SYMBOL vmlinux 0x764ddd09	register_md_personality
+EXPORT_SYMBOL vmlinux 0x76592c50	unmap_underlying_metadata
+EXPORT_SYMBOL vmlinux 0x766544de	tty_port_close_start
+EXPORT_SYMBOL vmlinux 0x7674e9a5	__page_symlink
+EXPORT_SYMBOL vmlinux 0x767d7ada	read_cache_page_async
+EXPORT_SYMBOL vmlinux 0x767ddb02	set_memory_wc
+EXPORT_SYMBOL vmlinux 0x76853b4f	pci_set_dma_max_seg_size
+EXPORT_SYMBOL vmlinux 0x768db238	neigh_seq_next
+EXPORT_SYMBOL vmlinux 0x7690c99c	neigh_create
+EXPORT_SYMBOL vmlinux 0x76b0f8f8	bad_dma_address
+EXPORT_SYMBOL vmlinux 0x76b11682	eth_header_parse
+EXPORT_SYMBOL vmlinux 0x76bf656d	__bitmap_shift_left
+EXPORT_SYMBOL vmlinux 0x76c6aac0	scsi_device_put
+EXPORT_SYMBOL vmlinux 0x76d3cd60	laptop_mode
+EXPORT_SYMBOL vmlinux 0x76f3f8a5	num_k8_northbridges
+EXPORT_SYMBOL vmlinux 0x77061a99	filp_close
+EXPORT_SYMBOL vmlinux 0x770a0036	isapnp_cfg_begin
+EXPORT_SYMBOL vmlinux 0x770c0852	remove_arg_zero
+EXPORT_SYMBOL vmlinux 0x7716c092	dm_kcopyd_client_destroy
+EXPORT_SYMBOL vmlinux 0x773a9c94	blk_iopoll_enabled
+EXPORT_SYMBOL vmlinux 0x7754b2d9	mmc_power_restore_host
+EXPORT_SYMBOL vmlinux 0x775a947d	scm_detach_fds
+EXPORT_SYMBOL vmlinux 0x7773e638	acpi_lock_ac_dir
+EXPORT_SYMBOL vmlinux 0x77a108df	_write_unlock_irqrestore
+EXPORT_SYMBOL vmlinux 0x77c40831	mod_zone_page_state
+EXPORT_SYMBOL vmlinux 0x77cfcfde	__tracepoint_kmalloc_node
+EXPORT_SYMBOL vmlinux 0x77dfe043	vfs_llseek
+EXPORT_SYMBOL vmlinux 0x77ecac9f	zlib_inflateEnd
+EXPORT_SYMBOL vmlinux 0x77f285e6	scsi_remove_host
+EXPORT_SYMBOL vmlinux 0x77fa5d1f	ns_to_timespec
+EXPORT_SYMBOL vmlinux 0x7830580c	seq_lseek
+EXPORT_SYMBOL vmlinux 0x7853aebc	napi_skb_finish
+EXPORT_SYMBOL vmlinux 0x787f6526	elv_rb_find
+EXPORT_SYMBOL vmlinux 0x788fe103	iomem_resource
+EXPORT_SYMBOL vmlinux 0x789800aa	bio_init
+EXPORT_SYMBOL vmlinux 0x78a484c9	_read_unlock_irqrestore
+EXPORT_SYMBOL vmlinux 0x78df6bd7	no_pci_devices
+EXPORT_SYMBOL vmlinux 0x78e1d4f1	__scsi_put_command
+EXPORT_SYMBOL vmlinux 0x78e67b2c	unregister_tcf_proto_ops
+EXPORT_SYMBOL vmlinux 0x78f43843	con_set_default_unimap
+EXPORT_SYMBOL vmlinux 0x79068fda	acpi_install_method
+EXPORT_SYMBOL vmlinux 0x793374fa	eth_header
+EXPORT_SYMBOL vmlinux 0x79437780	genphy_read_status
+EXPORT_SYMBOL vmlinux 0x794487ee	disable_hlt
+EXPORT_SYMBOL vmlinux 0x7946e830	grab_cache_page_nowait
+EXPORT_SYMBOL vmlinux 0x7960fa1b	ethtool_op_set_ufo
+EXPORT_SYMBOL vmlinux 0x796fc5ce	scsi_get_sense_info_fld
+EXPORT_SYMBOL vmlinux 0x79aa04a2	get_random_bytes
+EXPORT_SYMBOL vmlinux 0x79ad224b	tasklet_kill
+EXPORT_SYMBOL vmlinux 0x7a107d23	dmam_release_declared_memory
+EXPORT_SYMBOL vmlinux 0x7a2a837d	strict_strtol
+EXPORT_SYMBOL vmlinux 0x7a4497db	kzfree
+EXPORT_SYMBOL vmlinux 0x7a50127c	netif_napi_add
+EXPORT_SYMBOL vmlinux 0x7a7ec15e	neigh_sysctl_unregister
+EXPORT_SYMBOL vmlinux 0x7a80ba80	xfrm_state_lookup_byaddr
+EXPORT_SYMBOL vmlinux 0x7a848702	_read_lock_irqsave
+EXPORT_SYMBOL vmlinux 0x7a8ddcbb	ethtool_op_get_flags
+EXPORT_SYMBOL vmlinux 0x7aa6893f	inet_dgram_connect
+EXPORT_SYMBOL vmlinux 0x7ae2c51f	stop_tty
+EXPORT_SYMBOL vmlinux 0x7aec9089	clear_user
+EXPORT_SYMBOL vmlinux 0x7af0ba1e	__insert_inode_hash
+EXPORT_SYMBOL vmlinux 0x7b0c84c4	acpi_remove_table_handler
+EXPORT_SYMBOL vmlinux 0x7b134ddf	acpi_get_name
+EXPORT_SYMBOL vmlinux 0x7b19fe8a	jbd2_journal_unlock_updates
+EXPORT_SYMBOL vmlinux 0x7b1abb3c	create_proc_entry
+EXPORT_SYMBOL vmlinux 0x7b2cd375	register_key_type
+EXPORT_SYMBOL vmlinux 0x7b384cda	phy_enable_interrupts
+EXPORT_SYMBOL vmlinux 0x7b52a859	wrmsr_safe_on_cpu
+EXPORT_SYMBOL vmlinux 0x7b561d7e	fb_class
+EXPORT_SYMBOL vmlinux 0x7b56bd05	acpi_lid_notifier_register
+EXPORT_SYMBOL vmlinux 0x7b6902fa	pci_set_dma_mask
+EXPORT_SYMBOL vmlinux 0x7b8dab53	sk_stream_wait_close
+EXPORT_SYMBOL vmlinux 0x7bb4ec12	fb_set_var
+EXPORT_SYMBOL vmlinux 0x7bd508ca	pnp_activate_dev
+EXPORT_SYMBOL vmlinux 0x7be81fb9	register_exec_domain
+EXPORT_SYMBOL vmlinux 0x7c0edd7d	acpi_check_region
+EXPORT_SYMBOL vmlinux 0x7c186daf	put_tty_driver
+EXPORT_SYMBOL vmlinux 0x7c46233a	cpufreq_quick_get
+EXPORT_SYMBOL vmlinux 0x7c60d66e	getname
+EXPORT_SYMBOL vmlinux 0x7c6ba3a2	skb_prepare_seq_read
+EXPORT_SYMBOL vmlinux 0x7c7168df	tcp_enter_memory_pressure
+EXPORT_SYMBOL vmlinux 0x7c77ca62	generic_file_direct_write
+EXPORT_SYMBOL vmlinux 0x7c904ded	unregister_module_notifier
+EXPORT_SYMBOL vmlinux 0x7c976ad6	keyring_clear
+EXPORT_SYMBOL vmlinux 0x7cb1ae69	cpu_down
+EXPORT_SYMBOL vmlinux 0x7d0a1fea	tcf_em_tree_destroy
+EXPORT_SYMBOL vmlinux 0x7d11c268	jiffies
+EXPORT_SYMBOL vmlinux 0x7d18c2c5	ethtool_op_get_tx_csum
+EXPORT_SYMBOL vmlinux 0x7d40a62b	do_sync_write
+EXPORT_SYMBOL vmlinux 0x7d51d21b	scsi_device_get
+EXPORT_SYMBOL vmlinux 0x7d78bf11	phy_device_create
+EXPORT_SYMBOL vmlinux 0x7d89f30c	tcf_exts_destroy
+EXPORT_SYMBOL vmlinux 0x7d966508	bio_split
+EXPORT_SYMBOL vmlinux 0x7da0b66b	dqget
+EXPORT_SYMBOL vmlinux 0x7da72144	eth_header_cache_update
+EXPORT_SYMBOL vmlinux 0x7dabf459	inet_dgram_ops
+EXPORT_SYMBOL vmlinux 0x7dc2625e	audit_log_start
+EXPORT_SYMBOL vmlinux 0x7dceceac	capable
+EXPORT_SYMBOL vmlinux 0x7e2be08b	nf_register_sockopt
+EXPORT_SYMBOL vmlinux 0x7e5303ba	skb_queue_purge
+EXPORT_SYMBOL vmlinux 0x7e59dc80	rwsem_down_read_failed
+EXPORT_SYMBOL vmlinux 0x7e6c4c5c	blk_queue_invalidate_tags
+EXPORT_SYMBOL vmlinux 0x7e8952c2	blk_rq_map_user
+EXPORT_SYMBOL vmlinux 0x7e9ebb05	kernel_thread
+EXPORT_SYMBOL vmlinux 0x7eb50c44	sk_stream_wait_connect
+EXPORT_SYMBOL vmlinux 0x7ebbd901	pci_pme_active
+EXPORT_SYMBOL vmlinux 0x7ebd7ffc	lookup_hash
+EXPORT_SYMBOL vmlinux 0x7ecb001b	__per_cpu_offset
+EXPORT_SYMBOL vmlinux 0x7ee1abff	fb_validate_mode
+EXPORT_SYMBOL vmlinux 0x7ee460f6	llc_sap_open
+EXPORT_SYMBOL vmlinux 0x7ee91c1d	_spin_trylock
+EXPORT_SYMBOL vmlinux 0x7ef04a96	journal_destroy
+EXPORT_SYMBOL vmlinux 0x7f24de73	jiffies_to_usecs
+EXPORT_SYMBOL vmlinux 0x7f357fa6	write_one_page
+EXPORT_SYMBOL vmlinux 0x7f42b0fd	blk_queue_prep_rq
+EXPORT_SYMBOL vmlinux 0x7f594bf3	bio_alloc
+EXPORT_SYMBOL vmlinux 0x7f6d7fe2	journal_dirty_data
+EXPORT_SYMBOL vmlinux 0x7f7e12d9	neigh_lookup
+EXPORT_SYMBOL vmlinux 0x7f83d780	xfrm4_rcv_encap
+EXPORT_SYMBOL vmlinux 0x7fc8e079	dm_table_get_md
+EXPORT_SYMBOL vmlinux 0x7fc9656c	prepare_creds
+EXPORT_SYMBOL vmlinux 0x80022e11	dm_get_mapinfo
+EXPORT_SYMBOL vmlinux 0x8016873a	xfrm_state_delete
+EXPORT_SYMBOL vmlinux 0x8021ebeb	inet_stream_ops
+EXPORT_SYMBOL vmlinux 0x80365468	vfs_link
+EXPORT_SYMBOL vmlinux 0x803cf5e2	devm_iounmap
+EXPORT_SYMBOL vmlinux 0x804d00e7	pnp_register_card_driver
+EXPORT_SYMBOL vmlinux 0x804f5ece	blk_integrity_register
+EXPORT_SYMBOL vmlinux 0x8063f83d	radix_tree_gang_lookup
+EXPORT_SYMBOL vmlinux 0x80a136e3	udp_flush_pending_frames
+EXPORT_SYMBOL vmlinux 0x80c237a8	xfrm_prepare_input
+EXPORT_SYMBOL vmlinux 0x80d4e9eb	try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0x81078307	scsi_prep_return
+EXPORT_SYMBOL vmlinux 0x810f3f16	filemap_flush
+EXPORT_SYMBOL vmlinux 0x81227988	input_set_keycode
+EXPORT_SYMBOL vmlinux 0x81296490	security_inode_setsecctx
+EXPORT_SYMBOL vmlinux 0x812d284f	generic_permission
+EXPORT_SYMBOL vmlinux 0x81472677	acpi_get_table
+EXPORT_SYMBOL vmlinux 0x81511c6b	bd_release
+EXPORT_SYMBOL vmlinux 0x815b5dd4	match_octal
+EXPORT_SYMBOL vmlinux 0x815c56d0	cpu_present_mask
+EXPORT_SYMBOL vmlinux 0x815f2897	empty_zero_page
+EXPORT_SYMBOL vmlinux 0x81799cee	vscnprintf
+EXPORT_SYMBOL vmlinux 0x817bca17	pnp_start_dev
+EXPORT_SYMBOL vmlinux 0x81802620	scsi_reset_provider
+EXPORT_SYMBOL vmlinux 0x819ca37d	__dev_remove_pack
+EXPORT_SYMBOL vmlinux 0x81b1e4fc	mb_cache_entry_get
+EXPORT_SYMBOL vmlinux 0x81b3d597	nf_setsockopt
+EXPORT_SYMBOL vmlinux 0x81d19d7b	arp_tbl
+EXPORT_SYMBOL vmlinux 0x81dbec08	vfs_path_lookup
+EXPORT_SYMBOL vmlinux 0x81e6b37f	dmi_get_system_info
+EXPORT_SYMBOL vmlinux 0x81ed952b	acpi_match_device_ids
+EXPORT_SYMBOL vmlinux 0x81fa4af9	uart_remove_one_port
+EXPORT_SYMBOL vmlinux 0x820d225f	print_mac
+EXPORT_SYMBOL vmlinux 0x820fc63c	vfsmount_lock
+EXPORT_SYMBOL vmlinux 0x821f9d03	pci_find_parent_resource
+EXPORT_SYMBOL vmlinux 0x8227391b	unlock_new_inode
+EXPORT_SYMBOL vmlinux 0x8235805b	memmove
+EXPORT_SYMBOL vmlinux 0x8251bcc3	bitmap_release_region
+EXPORT_SYMBOL vmlinux 0x825c943e	register_console
+EXPORT_SYMBOL vmlinux 0x82692209	kref_set
+EXPORT_SYMBOL vmlinux 0x826b38c3	mdiobus_unregister
+EXPORT_SYMBOL vmlinux 0x8273abdf	__tcp_get_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x8289d72c	uart_update_timeout
+EXPORT_SYMBOL vmlinux 0x8290daeb	per_cpu__softnet_data
+EXPORT_SYMBOL vmlinux 0x82a51501	hippi_neigh_setup_dev
+EXPORT_SYMBOL vmlinux 0x82acfb70	blk_iopoll_sched
+EXPORT_SYMBOL vmlinux 0x82b1e04f	netpoll_print_options
+EXPORT_SYMBOL vmlinux 0x82b56e42	pskb_expand_head
+EXPORT_SYMBOL vmlinux 0x82b8ba1b	rtc_dev_update_irq_enable_emul
+EXPORT_SYMBOL vmlinux 0x8317e20a	completion_done
+EXPORT_SYMBOL vmlinux 0x834360c4	input_register_handle
+EXPORT_SYMBOL vmlinux 0x83631e8a	pci_save_state
+EXPORT_SYMBOL vmlinux 0x83904ad4	per_cpu__irq_regs
+EXPORT_SYMBOL vmlinux 0x83a476ce	bitmap_scnlistprintf
+EXPORT_SYMBOL vmlinux 0x83c283dd	neigh_sysctl_register
+EXPORT_SYMBOL vmlinux 0x83d0c02d	uart_write_wakeup
+EXPORT_SYMBOL vmlinux 0x83d64fc7	bdi_set_max_ratio
+EXPORT_SYMBOL vmlinux 0x8406ce38	ppp_unregister_compressor
+EXPORT_SYMBOL vmlinux 0x84288efe	request_key_async_with_auxdata
+EXPORT_SYMBOL vmlinux 0x844aba69	sync_inode
+EXPORT_SYMBOL vmlinux 0x8477dbad	blk_rq_init
+EXPORT_SYMBOL vmlinux 0x84a3330d	__xfrm_policy_check
+EXPORT_SYMBOL vmlinux 0x84c9c961	bdi_init
+EXPORT_SYMBOL vmlinux 0x84f95670	setup_arg_pages
+EXPORT_SYMBOL vmlinux 0x85060f67	genphy_suspend
+EXPORT_SYMBOL vmlinux 0x851ccb4b	nla_append
+EXPORT_SYMBOL vmlinux 0x852f2ff1	unregister_snap_client
+EXPORT_SYMBOL vmlinux 0x85336bd1	write_cache_pages
+EXPORT_SYMBOL vmlinux 0x853d53c4	md_check_recovery
+EXPORT_SYMBOL vmlinux 0x85483d42	jbd2_journal_load
+EXPORT_SYMBOL vmlinux 0x855d9c5c	nla_reserve_nohdr
+EXPORT_SYMBOL vmlinux 0x85670f1d	rtnl_is_locked
+EXPORT_SYMBOL vmlinux 0x856a070a	lock_super
+EXPORT_SYMBOL vmlinux 0x85755f2e	neigh_resolve_output
+EXPORT_SYMBOL vmlinux 0x859bf506	ethtool_op_get_sg
+EXPORT_SYMBOL vmlinux 0x85ac7f10	posix_acl_from_xattr
+EXPORT_SYMBOL vmlinux 0x85b18f9f	__sk_dst_check
+EXPORT_SYMBOL vmlinux 0x85b3ef56	inet_twsk_deschedule
+EXPORT_SYMBOL vmlinux 0x85bf2074	inet_unregister_protosw
+EXPORT_SYMBOL vmlinux 0x85ca0d85	pci_dev_put
+EXPORT_SYMBOL vmlinux 0x85d97f04	freeze_bdev
+EXPORT_SYMBOL vmlinux 0x85df9b6c	strsep
+EXPORT_SYMBOL vmlinux 0x85e7deb2	iov_iter_fault_in_readable
+EXPORT_SYMBOL vmlinux 0x860ea93f	register_8022_client
+EXPORT_SYMBOL vmlinux 0x8632cc26	audit_log_end
+EXPORT_SYMBOL vmlinux 0x86491658	get_sb_ns
+EXPORT_SYMBOL vmlinux 0x8664f62e	cpufreq_update_policy
+EXPORT_SYMBOL vmlinux 0x86675a04	skb_abort_seq_read
+EXPORT_SYMBOL vmlinux 0x86712a32	kmap_atomic_to_page
+EXPORT_SYMBOL vmlinux 0x8671cc91	blk_dump_rq_flags
+EXPORT_SYMBOL vmlinux 0x867a92a7	udp_lib_unhash
+EXPORT_SYMBOL vmlinux 0x868582cc	xfrm_dst_ifdown
+EXPORT_SYMBOL vmlinux 0x868694d7	put_mnt_ns
+EXPORT_SYMBOL vmlinux 0x868acba5	get_options
+EXPORT_SYMBOL vmlinux 0x86c22282	netif_carrier_off
+EXPORT_SYMBOL vmlinux 0x86d4d171	ethtool_op_set_tso
+EXPORT_SYMBOL vmlinux 0x86fb9b05	bitmap_parse_user
+EXPORT_SYMBOL vmlinux 0x8708b20a	seq_read
+EXPORT_SYMBOL vmlinux 0x871c0a7e	fiemap_check_flags
+EXPORT_SYMBOL vmlinux 0x8733e9a3	sleep_on_timeout
+EXPORT_SYMBOL vmlinux 0x876dafc3	ec_write
+EXPORT_SYMBOL vmlinux 0x8782f89f	bitmap_start_sync
+EXPORT_SYMBOL vmlinux 0x878ab3ce	sysctl_tcp_adv_win_scale
+EXPORT_SYMBOL vmlinux 0x87a7e142	simple_readpage
+EXPORT_SYMBOL vmlinux 0x87aaddf8	wrmsr_safe_regs_on_cpu
+EXPORT_SYMBOL vmlinux 0x87d78c20	qdisc_tree_decrease_qlen
+EXPORT_SYMBOL vmlinux 0x87f438a2	sysctl_intvec
+EXPORT_SYMBOL vmlinux 0x881039d0	zlib_inflate
+EXPORT_SYMBOL vmlinux 0x885d6383	blk_alloc_queue_node
+EXPORT_SYMBOL vmlinux 0x88643ebc	call_usermodehelper_freeinfo
+EXPORT_SYMBOL vmlinux 0x887188d9	uart_register_driver
+EXPORT_SYMBOL vmlinux 0x88b4f2a0	fddi_type_trans
+EXPORT_SYMBOL vmlinux 0x88c0c198	security_inode_init_security
+EXPORT_SYMBOL vmlinux 0x88dc48cd	d_splice_alias
+EXPORT_SYMBOL vmlinux 0x88e88136	ioremap_prot
+EXPORT_SYMBOL vmlinux 0x890b26ad	pci_disable_msi
+EXPORT_SYMBOL vmlinux 0x892b26a0	set_memory_nx
+EXPORT_SYMBOL vmlinux 0x8969b997	ida_get_new
+EXPORT_SYMBOL vmlinux 0x897473df	mktime
+EXPORT_SYMBOL vmlinux 0x898cd8b1	mca_device_claimed
+EXPORT_SYMBOL vmlinux 0x89949018	down_timeout
+EXPORT_SYMBOL vmlinux 0x89a3a0ba	nf_unregister_queue_handler
+EXPORT_SYMBOL vmlinux 0x89ad9029	ilookup5
+EXPORT_SYMBOL vmlinux 0x89be9ffd	inet_proto_csum_replace4
+EXPORT_SYMBOL vmlinux 0x89c741ab	set_pages_nx
+EXPORT_SYMBOL vmlinux 0x89d5538d	fb_pad_aligned_buffer
+EXPORT_SYMBOL vmlinux 0x89d66811	build_ehash_secret
+EXPORT_SYMBOL vmlinux 0x89e15d33	skb_over_panic
+EXPORT_SYMBOL vmlinux 0x89e7e210	dm_table_event
+EXPORT_SYMBOL vmlinux 0x8a1203a9	kref_get
+EXPORT_SYMBOL vmlinux 0x8a1214c3	dm_exception_store_type_register
+EXPORT_SYMBOL vmlinux 0x8a373fd7	twl4030_i2c_write
+EXPORT_SYMBOL vmlinux 0x8a3eabf0	__wait_on_bit
+EXPORT_SYMBOL vmlinux 0x8a5578b7	unregister_exec_domain
+EXPORT_SYMBOL vmlinux 0x8a7d1c31	high_memory
+EXPORT_SYMBOL vmlinux 0x8a99a016	mempool_free_slab
+EXPORT_SYMBOL vmlinux 0x8aa15789	vga_set_legacy_decoding
+EXPORT_SYMBOL vmlinux 0x8abd04f2	filemap_fdatawait_range
+EXPORT_SYMBOL vmlinux 0x8ac1a9ec	tty_port_block_til_ready
+EXPORT_SYMBOL vmlinux 0x8ac6395b	per_cpu__cpu_info
+EXPORT_SYMBOL vmlinux 0x8ad835f2	input_unregister_handler
+EXPORT_SYMBOL vmlinux 0x8adf0cbf	bioset_integrity_free
+EXPORT_SYMBOL vmlinux 0x8ae77528	proc_dointvec_minmax
+EXPORT_SYMBOL vmlinux 0x8afb6d28	pci_bus_read_config_word
+EXPORT_SYMBOL vmlinux 0x8b05654c	elv_rb_del
+EXPORT_SYMBOL vmlinux 0x8b18496f	__copy_to_user_ll
+EXPORT_SYMBOL vmlinux 0x8b337154	thermal_zone_bind_cooling_device
+EXPORT_SYMBOL vmlinux 0x8b5f4a2e	IO_APIC_get_PCI_irq_vector
+EXPORT_SYMBOL vmlinux 0x8b618d08	overflowuid
+EXPORT_SYMBOL vmlinux 0x8b812c8c	skb_checksum_help
+EXPORT_SYMBOL vmlinux 0x8b989cf9	acpi_bus_can_wakeup
+EXPORT_SYMBOL vmlinux 0x8bb2fee2	bio_copy_user
+EXPORT_SYMBOL vmlinux 0x8bd313b8	__tracepoint_kfree
+EXPORT_SYMBOL vmlinux 0x8bd5b603	param_get_long
+EXPORT_SYMBOL vmlinux 0x8bdac817	i2c_smbus_read_byte_data
+EXPORT_SYMBOL vmlinux 0x8bdb8550	skb_recv_datagram
+EXPORT_SYMBOL vmlinux 0x8be94638	vga_put
+EXPORT_SYMBOL vmlinux 0x8beed8cd	dev_change_flags
+EXPORT_SYMBOL vmlinux 0x8bf47e1a	mmc_card_awake
+EXPORT_SYMBOL vmlinux 0x8c0b7248	nf_getsockopt
+EXPORT_SYMBOL vmlinux 0x8c183cbe	iowrite16
+EXPORT_SYMBOL vmlinux 0x8c260aa0	register_sysrq_key
+EXPORT_SYMBOL vmlinux 0x8c59b13c	mmc_host_enable
+EXPORT_SYMBOL vmlinux 0x8c62f795	find_or_create_page
+EXPORT_SYMBOL vmlinux 0x8c6f1781	aio_put_req
+EXPORT_SYMBOL vmlinux 0x8c7ed588	simple_fill_super
+EXPORT_SYMBOL vmlinux 0x8c8bfc09	__brelse
+EXPORT_SYMBOL vmlinux 0x8cc79cab	iowrite16_rep
+EXPORT_SYMBOL vmlinux 0x8cd0b8dd	mmc_host_disable
+EXPORT_SYMBOL vmlinux 0x8cf5749e	md_wakeup_thread
+EXPORT_SYMBOL vmlinux 0x8cfc63b1	simple_set_mnt
+EXPORT_SYMBOL vmlinux 0x8d045d0d	tty_devnum
+EXPORT_SYMBOL vmlinux 0x8d09b820	__scsi_add_device
+EXPORT_SYMBOL vmlinux 0x8d12b3e9	gnet_stats_copy_basic
+EXPORT_SYMBOL vmlinux 0x8d2e3f96	inet_frag_find
+EXPORT_SYMBOL vmlinux 0x8d35a15c	__skb_warn_lro_forwarding
+EXPORT_SYMBOL vmlinux 0x8d35cf80	d_path
+EXPORT_SYMBOL vmlinux 0x8d3894f2	_ctype
+EXPORT_SYMBOL vmlinux 0x8d489734	sock_common_recvmsg
+EXPORT_SYMBOL vmlinux 0x8d499706	tcp_md5_hash_key
+EXPORT_SYMBOL vmlinux 0x8d4ec9f2	tcp_splice_read
+EXPORT_SYMBOL vmlinux 0x8d551bef	sysctl_tcp_rmem
+EXPORT_SYMBOL vmlinux 0x8d6f81b4	__div64_32
+EXPORT_SYMBOL vmlinux 0x8d7fc9c3	__ps2_command
+EXPORT_SYMBOL vmlinux 0x8d8d96c6	acpi_get_sleep_type_data
+EXPORT_SYMBOL vmlinux 0x8d8e6927	ip6_xmit
+EXPORT_SYMBOL vmlinux 0x8d9e3239	sock_release
+EXPORT_SYMBOL vmlinux 0x8d9e6fb9	filemap_fault
+EXPORT_SYMBOL vmlinux 0x8dc6e564	restore_processor_state
+EXPORT_SYMBOL vmlinux 0x8dc9bed0	tty_vhangup
+EXPORT_SYMBOL vmlinux 0x8dca832f	__percpu_counter_sum
+EXPORT_SYMBOL vmlinux 0x8dd63087	generic_setxattr
+EXPORT_SYMBOL vmlinux 0x8dde1117	blk_execute_rq
+EXPORT_SYMBOL vmlinux 0x8df02bde	dquot_mark_dquot_dirty
+EXPORT_SYMBOL vmlinux 0x8e002cda	acpi_remove_gpe_block
+EXPORT_SYMBOL vmlinux 0x8e0637ba	i8253_lock
+EXPORT_SYMBOL vmlinux 0x8e0b7743	ipv6_ext_hdr
+EXPORT_SYMBOL vmlinux 0x8e3016e0	skb_pull
+EXPORT_SYMBOL vmlinux 0x8e3a3538	con_copy_unimap
+EXPORT_SYMBOL vmlinux 0x8e4a2950	md_write_start
+EXPORT_SYMBOL vmlinux 0x8e626479	netlink_ack
+EXPORT_SYMBOL vmlinux 0x8e763ae1	send_remote_softirq
+EXPORT_SYMBOL vmlinux 0x8e888ec3	cpumask_next_and
+EXPORT_SYMBOL vmlinux 0x8e969d24	skb_realloc_headroom
+EXPORT_SYMBOL vmlinux 0x8ed26eaa	__breadahead
+EXPORT_SYMBOL vmlinux 0x8ed66a7f	scsi_remove_device
+EXPORT_SYMBOL vmlinux 0x8ed830a1	xfrm_state_add
+EXPORT_SYMBOL vmlinux 0x8ee69235	timeval_to_jiffies
+EXPORT_SYMBOL vmlinux 0x8eeffeb5	sk_send_sigurg
+EXPORT_SYMBOL vmlinux 0x8efcf671	vfs_writev
+EXPORT_SYMBOL vmlinux 0x8f2703b7	wbinvd_on_all_cpus
+EXPORT_SYMBOL vmlinux 0x8f30f5dd	__blockdev_direct_IO
+EXPORT_SYMBOL vmlinux 0x8f48679a	rb_prev
+EXPORT_SYMBOL vmlinux 0x8f5625d2	qdisc_destroy
+EXPORT_SYMBOL vmlinux 0x8f6b7950	set_irq_data
+EXPORT_SYMBOL vmlinux 0x8f763238	blk_queue_merge_bvec
+EXPORT_SYMBOL vmlinux 0x8f931bbd	__scsi_iterate_devices
+EXPORT_SYMBOL vmlinux 0x8f9b97e5	bio_sector_offset
+EXPORT_SYMBOL vmlinux 0x8f9c199c	__get_user_2
+EXPORT_SYMBOL vmlinux 0x8fad946b	log_start_commit
+EXPORT_SYMBOL vmlinux 0x8fadd679	iw_handler_get_thrspy
+EXPORT_SYMBOL vmlinux 0x8fb3450f	dev_addr_add
+EXPORT_SYMBOL vmlinux 0x8fbc1ec7	xfrm_register_mode
+EXPORT_SYMBOL vmlinux 0x8fcfc438	start_tty
+EXPORT_SYMBOL vmlinux 0x8ff4079b	pv_irq_ops
+EXPORT_SYMBOL vmlinux 0x8ffdb3b8	crc16
+EXPORT_SYMBOL vmlinux 0x900130b2	security_path_link
+EXPORT_SYMBOL vmlinux 0x90018570	pci_unregister_driver
+EXPORT_SYMBOL vmlinux 0x90035333	secure_tcpv6_sequence_number
+EXPORT_SYMBOL vmlinux 0x9015658c	__sk_mem_schedule
+EXPORT_SYMBOL vmlinux 0x9015774b	__rta_fill
+EXPORT_SYMBOL vmlinux 0x904409c6	acpi_set_firmware_waking_vector
+EXPORT_SYMBOL vmlinux 0x905845ce	blk_recount_segments
+EXPORT_SYMBOL vmlinux 0x9084de50	ppp_register_channel
+EXPORT_SYMBOL vmlinux 0x90a1601f	dmi_check_system
+EXPORT_SYMBOL vmlinux 0x91009452	schedule_delayed_work
+EXPORT_SYMBOL vmlinux 0x9144a8e2	ec_burst_disable
+EXPORT_SYMBOL vmlinux 0x91481982	__ratelimit
+EXPORT_SYMBOL vmlinux 0x914ba7cc	cancel_dirty_page
+EXPORT_SYMBOL vmlinux 0x91607d95	set_memory_wb
+EXPORT_SYMBOL vmlinux 0x91766c09	param_get_ulong
+EXPORT_SYMBOL vmlinux 0x9176af07	console_stop
+EXPORT_SYMBOL vmlinux 0x91ed8598	redirty_page_for_writepage
+EXPORT_SYMBOL vmlinux 0x9201491d	ethtool_op_set_sg
+EXPORT_SYMBOL vmlinux 0x9214ed8a	param_get_bool
+EXPORT_SYMBOL vmlinux 0x923b1276	dmaengine_get
+EXPORT_SYMBOL vmlinux 0x92410b0c	mddev_congested
+EXPORT_SYMBOL vmlinux 0x924c2730	km_query
+EXPORT_SYMBOL vmlinux 0x925665cd	inode_newsize_ok
+EXPORT_SYMBOL vmlinux 0x92897e3d	default_idle
+EXPORT_SYMBOL vmlinux 0x9305f8e6	cpufreq_get
+EXPORT_SYMBOL vmlinux 0x931d206a	tty_port_free_xmit_buf
+EXPORT_SYMBOL vmlinux 0x9330cb9f	sg_alloc_table
+EXPORT_SYMBOL vmlinux 0x935c9944	touch_atime
+EXPORT_SYMBOL vmlinux 0x936711b9	____pagevec_lru_add
+EXPORT_SYMBOL vmlinux 0x9385667d	down_read_trylock
+EXPORT_SYMBOL vmlinux 0x93a6e0b2	io_schedule
+EXPORT_SYMBOL vmlinux 0x93bd7796	locks_mandatory_area
+EXPORT_SYMBOL vmlinux 0x93c651be	acpi_info
+EXPORT_SYMBOL vmlinux 0x93cbd1ec	_spin_lock_bh
+EXPORT_SYMBOL vmlinux 0x93fca811	__get_free_pages
+EXPORT_SYMBOL vmlinux 0x9422cd77	bio_unmap_user
+EXPORT_SYMBOL vmlinux 0x94236610	inode_sub_rsv_space
+EXPORT_SYMBOL vmlinux 0x943c3b92	console_start
+EXPORT_SYMBOL vmlinux 0x944832d6	ftrace_print_symbols_seq
+EXPORT_SYMBOL vmlinux 0x946ca348	dev_get_by_name
+EXPORT_SYMBOL vmlinux 0x9481a9c8	task_tgid_nr_ns
+EXPORT_SYMBOL vmlinux 0x94847b23	nf_ct_destroy
+EXPORT_SYMBOL vmlinux 0x94932ccd	pnp_find_card
+EXPORT_SYMBOL vmlinux 0x94961283	vunmap
+EXPORT_SYMBOL vmlinux 0x94a6467e	kobject_put
+EXPORT_SYMBOL vmlinux 0x94b541b5	cpu_active_mask
+EXPORT_SYMBOL vmlinux 0x94bfcd8f	dquot_transfer
+EXPORT_SYMBOL vmlinux 0x94d005fc	inet6_ioctl
+EXPORT_SYMBOL vmlinux 0x94d66d5a	netif_notify_peers
+EXPORT_SYMBOL vmlinux 0x94d89d3b	__task_pid_nr_ns
+EXPORT_SYMBOL vmlinux 0x94f9ab65	bitmap_unplug
+EXPORT_SYMBOL vmlinux 0x94ffda11	alloc_buffer_head
+EXPORT_SYMBOL vmlinux 0x954148de	I_BDEV
+EXPORT_SYMBOL vmlinux 0x954488a4	syncookie_secret
+EXPORT_SYMBOL vmlinux 0x954cbb26	vsprintf
+EXPORT_SYMBOL vmlinux 0x956c5776	wait_on_sync_kiocb
+EXPORT_SYMBOL vmlinux 0x956e6252	set_bh_page
+EXPORT_SYMBOL vmlinux 0x957d7891	netlink_kernel_release
+EXPORT_SYMBOL vmlinux 0x95a6d41c	grab_cache_page_write_begin
+EXPORT_SYMBOL vmlinux 0x95b319f7	inet_csk_reset_keepalive_timer
+EXPORT_SYMBOL vmlinux 0x95baad24	blk_queue_stack_limits
+EXPORT_SYMBOL vmlinux 0x95e2cb68	md_set_array_sectors
+EXPORT_SYMBOL vmlinux 0x95e69a2c	neigh_seq_stop
+EXPORT_SYMBOL vmlinux 0x95f3a8e1	page_symlink_inode_operations
+EXPORT_SYMBOL vmlinux 0x960d7b43	dquot_free_inode
+EXPORT_SYMBOL vmlinux 0x961dca85	blk_complete_request
+EXPORT_SYMBOL vmlinux 0x9629486a	per_cpu__cpu_number
+EXPORT_SYMBOL vmlinux 0x962c5cfb	textsearch_unregister
+EXPORT_SYMBOL vmlinux 0x962df776	proc_create_data
+EXPORT_SYMBOL vmlinux 0x963de8ae	tcp_v4_remember_stamp
+EXPORT_SYMBOL vmlinux 0x964b874b	jbd2_journal_blocks_per_page
+EXPORT_SYMBOL vmlinux 0x9677d3ad	dev_get_by_flags
+EXPORT_SYMBOL vmlinux 0x9679f309	mpage_writepages
+EXPORT_SYMBOL vmlinux 0x96898769	sysfs_format_mac
+EXPORT_SYMBOL vmlinux 0x969fc48f	dev_get_stats
+EXPORT_SYMBOL vmlinux 0x96ae5cd5	journal_update_format
+EXPORT_SYMBOL vmlinux 0x96c644c6	xfrm6_rcv
+EXPORT_SYMBOL vmlinux 0x96cd2b04	scsi_sense_key_string
+EXPORT_SYMBOL vmlinux 0x96d26893	blk_stop_queue
+EXPORT_SYMBOL vmlinux 0x96d71810	bio_integrity_tag_size
+EXPORT_SYMBOL vmlinux 0x96e48247	blk_cleanup_queue
+EXPORT_SYMBOL vmlinux 0x9718aa2b	mpage_writepage
+EXPORT_SYMBOL vmlinux 0x9730c824	vfs_rename
+EXPORT_SYMBOL vmlinux 0x973873ab	_spin_lock
+EXPORT_SYMBOL vmlinux 0x97447c23	bfifo_qdisc_ops
+EXPORT_SYMBOL vmlinux 0x9754ec10	radix_tree_preload
+EXPORT_SYMBOL vmlinux 0x979fb7a6	pci_iomap
+EXPORT_SYMBOL vmlinux 0x97c4ae6c	pci_scan_bridge
+EXPORT_SYMBOL vmlinux 0x97de0ddd	acpi_install_gpe_block
+EXPORT_SYMBOL vmlinux 0x98012bec	uart_get_baud_rate
+EXPORT_SYMBOL vmlinux 0x980bc899	pci_try_set_mwi
+EXPORT_SYMBOL vmlinux 0x986e6135	fb_pad_unaligned_buffer
+EXPORT_SYMBOL vmlinux 0x98721402	filemap_write_and_wait_range
+EXPORT_SYMBOL vmlinux 0x987e5b74	arch_acpi_processor_cleanup_pdc
+EXPORT_SYMBOL vmlinux 0x988ed85d	set_memory_x
+EXPORT_SYMBOL vmlinux 0x98a2e2df	tc_classify
+EXPORT_SYMBOL vmlinux 0x98ba3b81	tcf_hash_new_index
+EXPORT_SYMBOL vmlinux 0x98ba4177	fb_firmware_edid
+EXPORT_SYMBOL vmlinux 0x98cdcb51	pci_set_mwi
+EXPORT_SYMBOL vmlinux 0x99052a84	acpi_os_write_port
+EXPORT_SYMBOL vmlinux 0x9921af88	__napi_complete
+EXPORT_SYMBOL vmlinux 0x996b4db8	dma_ops
+EXPORT_SYMBOL vmlinux 0x998378ca	pci_prepare_to_sleep
+EXPORT_SYMBOL vmlinux 0x9994c0ca	ps2_is_keyboard_id
+EXPORT_SYMBOL vmlinux 0x999885cd	pci_write_vpd
+EXPORT_SYMBOL vmlinux 0x999e8297	vfree
+EXPORT_SYMBOL vmlinux 0x99bfbe39	get_unused_fd
+EXPORT_SYMBOL vmlinux 0x99c0d908	bio_integrity_clone
+EXPORT_SYMBOL vmlinux 0x99c4c8d2	xfrm_policy_alloc
+EXPORT_SYMBOL vmlinux 0x99c7a8b8	jbd2_dev_to_name
+EXPORT_SYMBOL vmlinux 0x99cdc86b	sysctl_tcp_reordering
+EXPORT_SYMBOL vmlinux 0x99e06f1a	xfrm_unregister_mode
+EXPORT_SYMBOL vmlinux 0x99ea12ce	panic_blink
+EXPORT_SYMBOL vmlinux 0x99f76cd1	rfkill_unregister
+EXPORT_SYMBOL vmlinux 0x9a1093d1	__dev_get_by_index
+EXPORT_SYMBOL vmlinux 0x9a10f226	journal_flush
+EXPORT_SYMBOL vmlinux 0x9a153717	generic_cont_expand_simple
+EXPORT_SYMBOL vmlinux 0x9a1dfd65	strpbrk
+EXPORT_SYMBOL vmlinux 0x9a22b0e1	scsi_init_io
+EXPORT_SYMBOL vmlinux 0x9a304cf9	eth_mac_addr
+EXPORT_SYMBOL vmlinux 0x9a449b06	simple_empty
+EXPORT_SYMBOL vmlinux 0x9a6a83f9	cmos_lock
+EXPORT_SYMBOL vmlinux 0x9a8d1cf5	fb_get_mode
+EXPORT_SYMBOL vmlinux 0x9a949fd2	is_bad_inode
+EXPORT_SYMBOL vmlinux 0x9a9985be	percpu_counter_destroy
+EXPORT_SYMBOL vmlinux 0x9a9fe923	blk_integrity_unregister
+EXPORT_SYMBOL vmlinux 0x9aa523f5	blk_end_request
+EXPORT_SYMBOL vmlinux 0x9ad3bb63	pneigh_lookup
+EXPORT_SYMBOL vmlinux 0x9aedabcc	sb_min_blocksize
+EXPORT_SYMBOL vmlinux 0x9af78068	kill_pid
+EXPORT_SYMBOL vmlinux 0x9b072727	i2c_transfer
+EXPORT_SYMBOL vmlinux 0x9b335bb8	generic_unplug_device
+EXPORT_SYMBOL vmlinux 0x9b3683f4	key_unlink
+EXPORT_SYMBOL vmlinux 0x9b388444	get_zeroed_page
+EXPORT_SYMBOL vmlinux 0x9b44a9fa	vfs_getattr
+EXPORT_SYMBOL vmlinux 0x9b4de8eb	idr_replace
+EXPORT_SYMBOL vmlinux 0x9b6d64fd	d_prune_aliases
+EXPORT_SYMBOL vmlinux 0x9b6eb137	ksize
+EXPORT_SYMBOL vmlinux 0x9b7279f3	ppp_register_compressor
+EXPORT_SYMBOL vmlinux 0x9ba7089d	argv_split
+EXPORT_SYMBOL vmlinux 0x9bad61ca	bio_integrity_enabled
+EXPORT_SYMBOL vmlinux 0x9bb9ed69	dev_queue_xmit
+EXPORT_SYMBOL vmlinux 0x9bc6e1c4	generic_error_remove_page
+EXPORT_SYMBOL vmlinux 0x9bce482f	__release_region
+EXPORT_SYMBOL vmlinux 0x9bd227b6	block_is_partially_uptodate
+EXPORT_SYMBOL vmlinux 0x9be235bc	tty_chars_in_buffer
+EXPORT_SYMBOL vmlinux 0x9be580f3	alloc_tty_driver
+EXPORT_SYMBOL vmlinux 0x9c012508	fb_parse_edid
+EXPORT_SYMBOL vmlinux 0x9c13ab87	find_lock_page
+EXPORT_SYMBOL vmlinux 0x9c2c944a	__copy_from_user_ll_nocache_nozero
+EXPORT_SYMBOL vmlinux 0x9c2f753e	aio_complete
+EXPORT_SYMBOL vmlinux 0x9c4ef2dd	__scsi_alloc_queue
+EXPORT_SYMBOL vmlinux 0x9c5a5924	blk_queue_max_discard_sectors
+EXPORT_SYMBOL vmlinux 0x9c7077bd	enable_hlt
+EXPORT_SYMBOL vmlinux 0x9c71e738	per_cpu__vm_event_states
+EXPORT_SYMBOL vmlinux 0x9c95dfaf	d_obtain_alias
+EXPORT_SYMBOL vmlinux 0x9c95e0f3	nf_ip6_checksum
+EXPORT_SYMBOL vmlinux 0x9cb5e0cd	ps2_init
+EXPORT_SYMBOL vmlinux 0x9cb96e92	qdisc_put_rtab
+EXPORT_SYMBOL vmlinux 0x9ccb2622	finish_wait
+EXPORT_SYMBOL vmlinux 0x9ccc82cc	disk_stack_limits
+EXPORT_SYMBOL vmlinux 0x9cd4f597	tcf_hash_search
+EXPORT_SYMBOL vmlinux 0x9ce80954	mem_map
+EXPORT_SYMBOL vmlinux 0x9ceb163c	memcpy_toiovec
+EXPORT_SYMBOL vmlinux 0x9ced0d42	is_container_init
+EXPORT_SYMBOL vmlinux 0x9ced38aa	down_trylock
+EXPORT_SYMBOL vmlinux 0x9cf9b3c1	xfrm_input
+EXPORT_SYMBOL vmlinux 0x9cfd56c5	scsi_print_status
+EXPORT_SYMBOL vmlinux 0x9d141ab0	jbd2_journal_check_used_features
+EXPORT_SYMBOL vmlinux 0x9d2a956f	textsearch_register
+EXPORT_SYMBOL vmlinux 0x9d33ef5e	acpi_enable
+EXPORT_SYMBOL vmlinux 0x9d35174c	tcp_sendpage
+EXPORT_SYMBOL vmlinux 0x9d3aa376	blk_iopoll_init
+EXPORT_SYMBOL vmlinux 0x9d4318df	close_bdev_exclusive
+EXPORT_SYMBOL vmlinux 0x9d5f5a37	vfs_mknod
+EXPORT_SYMBOL vmlinux 0x9db22b51	poll_initwait
+EXPORT_SYMBOL vmlinux 0x9dc7575e	pci_vpd_truncate
+EXPORT_SYMBOL vmlinux 0x9df881b5	udp_sendmsg
+EXPORT_SYMBOL vmlinux 0x9e085095	journal_force_commit_nested
+EXPORT_SYMBOL vmlinux 0x9e10b359	inet_accept
+EXPORT_SYMBOL vmlinux 0x9e1f044a	md_check_no_bitmap
+EXPORT_SYMBOL vmlinux 0x9e2000a7	memcpy_toiovecend
+EXPORT_SYMBOL vmlinux 0x9e363b6b	acpi_disable_gpe
+EXPORT_SYMBOL vmlinux 0x9e64fbfe	rtc_cmos_read
+EXPORT_SYMBOL vmlinux 0x9e672ff6	scsi_kmap_atomic_sg
+EXPORT_SYMBOL vmlinux 0x9e74620f	scsi_cmd_print_sense_hdr
+EXPORT_SYMBOL vmlinux 0x9e7d6bd0	__udelay
+EXPORT_SYMBOL vmlinux 0x9e82755b	__xfrm_state_delete
+EXPORT_SYMBOL vmlinux 0x9e90f3e1	per_cpu__irq_stat
+EXPORT_SYMBOL vmlinux 0x9e9f1714	__bitmap_andnot
+EXPORT_SYMBOL vmlinux 0x9ec68dba	pcim_iomap_regions
+EXPORT_SYMBOL vmlinux 0x9ed685ee	iov_iter_advance
+EXPORT_SYMBOL vmlinux 0x9eecde16	do_brk
+EXPORT_SYMBOL vmlinux 0x9ef2f6be	vfs_readv
+EXPORT_SYMBOL vmlinux 0x9f100139	jiffies_to_clock_t
+EXPORT_SYMBOL vmlinux 0x9f2bdaac	__bitmap_or
+EXPORT_SYMBOL vmlinux 0x9f2d613e	param_set_bool
+EXPORT_SYMBOL vmlinux 0x9f424093	free_user_ns
+EXPORT_SYMBOL vmlinux 0x9f54bfc0	page_symlink
+EXPORT_SYMBOL vmlinux 0x9f92d128	file_update_time
+EXPORT_SYMBOL vmlinux 0x9f92efc4	mmiotrace_printk
+EXPORT_SYMBOL vmlinux 0x9f984513	strrchr
+EXPORT_SYMBOL vmlinux 0x9fa274b4	dq_data_lock
+EXPORT_SYMBOL vmlinux 0x9fa39fbf	i2c_del_adapter
+EXPORT_SYMBOL vmlinux 0x9fb3dd30	memcpy_fromiovec
+EXPORT_SYMBOL vmlinux 0xa0021878	km_new_mapping
+EXPORT_SYMBOL vmlinux 0xa00cd5b3	rfkill_alloc
+EXPORT_SYMBOL vmlinux 0xa0290eb2	xfrm6_input_addr
+EXPORT_SYMBOL vmlinux 0xa02d2d61	mmc_detect_change
+EXPORT_SYMBOL vmlinux 0xa0351046	skb_insert
+EXPORT_SYMBOL vmlinux 0xa03523d5	security_unix_stream_connect
+EXPORT_SYMBOL vmlinux 0xa04a01bd	qdisc_class_hash_insert
+EXPORT_SYMBOL vmlinux 0xa04ffe81	genphy_restart_aneg
+EXPORT_SYMBOL vmlinux 0xa0525a2c	mca_unregister_driver
+EXPORT_SYMBOL vmlinux 0xa05c03df	mempool_kmalloc
+EXPORT_SYMBOL vmlinux 0xa06769ff	tcp_ioctl
+EXPORT_SYMBOL vmlinux 0xa071ea6b	netdev_state_change
+EXPORT_SYMBOL vmlinux 0xa07c4cba	inet_frag_evictor
+EXPORT_SYMBOL vmlinux 0xa07d3c17	journal_restart
+EXPORT_SYMBOL vmlinux 0xa0898533	dentry_open
+EXPORT_SYMBOL vmlinux 0xa092d115	simple_statfs
+EXPORT_SYMBOL vmlinux 0xa0a4ac21	tcf_hash_insert
+EXPORT_SYMBOL vmlinux 0xa0b04675	vmalloc_32
+EXPORT_SYMBOL vmlinux 0xa0b73236	splice_from_pipe_feed
+EXPORT_SYMBOL vmlinux 0xa0c9d22c	elv_rb_add
+EXPORT_SYMBOL vmlinux 0xa0ceef51	out_of_line_wait_on_bit
+EXPORT_SYMBOL vmlinux 0xa0fbac79	wake_up_bit
+EXPORT_SYMBOL vmlinux 0xa1003535	pneigh_enqueue
+EXPORT_SYMBOL vmlinux 0xa108eb4d	sysctl_optmem_max
+EXPORT_SYMBOL vmlinux 0xa1099607	proc_mkdir
+EXPORT_SYMBOL vmlinux 0xa120d33c	tty_unregister_ldisc
+EXPORT_SYMBOL vmlinux 0xa13798f8	printk_ratelimit
+EXPORT_SYMBOL vmlinux 0xa142d50e	__module_put_and_exit
+EXPORT_SYMBOL vmlinux 0xa14983f6	mmc_align_data_size
+EXPORT_SYMBOL vmlinux 0xa156be1e	tty_set_operations
+EXPORT_SYMBOL vmlinux 0xa16262d0	set_pages_array_uc
+EXPORT_SYMBOL vmlinux 0xa19805e8	pcie_get_readrq
+EXPORT_SYMBOL vmlinux 0xa1a5ba66	blk_plug_device_unlocked
+EXPORT_SYMBOL vmlinux 0xa1b26d45	unbind_con_driver
+EXPORT_SYMBOL vmlinux 0xa1b759ce	fb_add_videomode
+EXPORT_SYMBOL vmlinux 0xa1c76e0a	_cond_resched
+EXPORT_SYMBOL vmlinux 0xa1d86b8f	pnp_request_card_device
+EXPORT_SYMBOL vmlinux 0xa1f5adb2	mb_cache_create
+EXPORT_SYMBOL vmlinux 0xa20ce1b8	net_msg_warn
+EXPORT_SYMBOL vmlinux 0xa22ff01c	bdevname
+EXPORT_SYMBOL vmlinux 0xa2586d35	inetdev_by_index
+EXPORT_SYMBOL vmlinux 0xa2669400	jbd2_journal_clear_err
+EXPORT_SYMBOL vmlinux 0xa27010ed	unregister_quota_format
+EXPORT_SYMBOL vmlinux 0xa29b1708	tcp_memory_allocated
+EXPORT_SYMBOL vmlinux 0xa2a1e5c9	_write_lock_bh
+EXPORT_SYMBOL vmlinux 0xa2a5fd77	inet_ehash_secret
+EXPORT_SYMBOL vmlinux 0xa2b8a2ba	__init_rwsem
+EXPORT_SYMBOL vmlinux 0xa329f07e	register_shrinker
+EXPORT_SYMBOL vmlinux 0xa332cdd1	security_tun_dev_attach
+EXPORT_SYMBOL vmlinux 0xa33a826a	find_get_pages_tag
+EXPORT_SYMBOL vmlinux 0xa33b796f	mb_cache_entry_insert
+EXPORT_SYMBOL vmlinux 0xa34f1ef5	crc32_le
+EXPORT_SYMBOL vmlinux 0xa350a8f8	set_memory_array_uc
+EXPORT_SYMBOL vmlinux 0xa35c1f05	acpi_extract_package
+EXPORT_SYMBOL vmlinux 0xa35de80f	ipv4_config
+EXPORT_SYMBOL vmlinux 0xa36863a8	journal_get_write_access
+EXPORT_SYMBOL vmlinux 0xa3bbcd80	acpi_set_gpe_type
+EXPORT_SYMBOL vmlinux 0xa3c6bf4c	pagevec_lookup
+EXPORT_SYMBOL vmlinux 0xa3f92147	tty_insert_flip_string
+EXPORT_SYMBOL vmlinux 0xa4076eee	skb_find_text
+EXPORT_SYMBOL vmlinux 0xa415b384	try_to_del_timer_sync
+EXPORT_SYMBOL vmlinux 0xa41c08d4	dma_release_declared_memory
+EXPORT_SYMBOL vmlinux 0xa43b9539	memcpy_fromiovecend
+EXPORT_SYMBOL vmlinux 0xa44ad274	wait_for_completion_interruptible_timeout
+EXPORT_SYMBOL vmlinux 0xa45df4ee	rwsem_down_write_failed
+EXPORT_SYMBOL vmlinux 0xa46ab7ed	scsi_device_resume
+EXPORT_SYMBOL vmlinux 0xa482b8dd	pci_enable_bridges
+EXPORT_SYMBOL vmlinux 0xa4ad37bd	file_remove_suid
+EXPORT_SYMBOL vmlinux 0xa4b5be66	skb_under_panic
+EXPORT_SYMBOL vmlinux 0xa4b94fea	iowrite8_rep
+EXPORT_SYMBOL vmlinux 0xa4f2afdf	qdisc_create_dflt
+EXPORT_SYMBOL vmlinux 0xa4f3eed6	km_state_expired
+EXPORT_SYMBOL vmlinux 0xa50ce492	md_integrity_register
+EXPORT_SYMBOL vmlinux 0xa50d5126	pci_enable_device_mem
+EXPORT_SYMBOL vmlinux 0xa51cdfe8	__FIXADDR_TOP
+EXPORT_SYMBOL vmlinux 0xa541b14e	xfrm4_prepare_output
+EXPORT_SYMBOL vmlinux 0xa56f1315	mempool_free
+EXPORT_SYMBOL vmlinux 0xa5808bbf	tasklet_init
+EXPORT_SYMBOL vmlinux 0xa589a039	sg_miter_stop
+EXPORT_SYMBOL vmlinux 0xa58b6804	nla_parse
+EXPORT_SYMBOL vmlinux 0xa591199d	mca_device_transform_ioport
+EXPORT_SYMBOL vmlinux 0xa5922bb1	kfifo_init
+EXPORT_SYMBOL vmlinux 0xa595a2b1	md_register_thread
+EXPORT_SYMBOL vmlinux 0xa598e29c	vesa_modes
+EXPORT_SYMBOL vmlinux 0xa5a633b9	sg_last
+EXPORT_SYMBOL vmlinux 0xa5bbb17e	proc_dointvec_userhz_jiffies
+EXPORT_SYMBOL vmlinux 0xa5cef8ad	release_resource
+EXPORT_SYMBOL vmlinux 0xa5da0abd	acpi_enter_sleep_state_s4bios
+EXPORT_SYMBOL vmlinux 0xa5ee973a	mmc_remove_host
+EXPORT_SYMBOL vmlinux 0xa617217b	user_path_at
+EXPORT_SYMBOL vmlinux 0xa63d85ab	slhc_remember
+EXPORT_SYMBOL vmlinux 0xa6485ca4	jbd2_journal_release_buffer
+EXPORT_SYMBOL vmlinux 0xa68124fa	hweight8
+EXPORT_SYMBOL vmlinux 0xa681fe88	generate_random_uuid
+EXPORT_SYMBOL vmlinux 0xa6a0e0eb	d_instantiate_unique
+EXPORT_SYMBOL vmlinux 0xa6bbeb2f	blk_queue_make_request
+EXPORT_SYMBOL vmlinux 0xa6c8c217	drop_super
+EXPORT_SYMBOL vmlinux 0xa6dcc773	rb_insert_color
+EXPORT_SYMBOL vmlinux 0xa6e4993d	mmc_host_lazy_disable
+EXPORT_SYMBOL vmlinux 0xa703bf12	key_link
+EXPORT_SYMBOL vmlinux 0xa7046549	vprintk
+EXPORT_SYMBOL vmlinux 0xa70fabbe	release_evntsel_nmi
+EXPORT_SYMBOL vmlinux 0xa71e7463	__first_cpu
+EXPORT_SYMBOL vmlinux 0xa727e967	eth_rebuild_header
+EXPORT_SYMBOL vmlinux 0xa751f9ed	mdio_bus_type
+EXPORT_SYMBOL vmlinux 0xa77f28cb	ip_setsockopt
+EXPORT_SYMBOL vmlinux 0xa7b4055c	blk_put_request
+EXPORT_SYMBOL vmlinux 0xa7d18379	__invalidate_device
+EXPORT_SYMBOL vmlinux 0xa7eaf3b5	generic_listxattr
+EXPORT_SYMBOL vmlinux 0xa8040da1	scsi_host_put
+EXPORT_SYMBOL vmlinux 0xa806ba76	kernel_read
+EXPORT_SYMBOL vmlinux 0xa85e036d	iget5_locked
+EXPORT_SYMBOL vmlinux 0xa89acbb3	acpi_evaluate_reference
+EXPORT_SYMBOL vmlinux 0xa8c3f98d	tcp_read_sock
+EXPORT_SYMBOL vmlinux 0xa8d68abd	acpi_warning
+EXPORT_SYMBOL vmlinux 0xa8fb3c49	set_anon_super
+EXPORT_SYMBOL vmlinux 0xa8fef7bb	security_unix_may_send
+EXPORT_SYMBOL vmlinux 0xa8feffe5	dquot_commit
+EXPORT_SYMBOL vmlinux 0xa9006208	xfrm_alloc_spi
+EXPORT_SYMBOL vmlinux 0xa91b5561	acpi_video_backlight_support
+EXPORT_SYMBOL vmlinux 0xa92d3ddd	phy_connect_direct
+EXPORT_SYMBOL vmlinux 0xa9660376	qdisc_list_del
+EXPORT_SYMBOL vmlinux 0xa970256c	genl_register_ops
+EXPORT_SYMBOL vmlinux 0xa98260eb	tcp_mtup_init
+EXPORT_SYMBOL vmlinux 0xa988e8b2	scm_fp_dup
+EXPORT_SYMBOL vmlinux 0xa9a2c2ad	give_up_console
+EXPORT_SYMBOL vmlinux 0xa9afbf58	sock_create
+EXPORT_SYMBOL vmlinux 0xa9b79fda	mdiobus_register
+EXPORT_SYMBOL vmlinux 0xa9bd2676	__vmalloc
+EXPORT_SYMBOL vmlinux 0xa9fcf31d	wait_for_completion_interruptible
+EXPORT_SYMBOL vmlinux 0xaa08b7cd	ilookup5_nowait
+EXPORT_SYMBOL vmlinux 0xaa0d444f	blk_queue_ordered
+EXPORT_SYMBOL vmlinux 0xaa25e841	pci_assign_resource
+EXPORT_SYMBOL vmlinux 0xaa3945ce	vfs_fsync_range
+EXPORT_SYMBOL vmlinux 0xaa497268	tty_unregister_device
+EXPORT_SYMBOL vmlinux 0xaa4b4172	ilookup
+EXPORT_SYMBOL vmlinux 0xaa4c5481	tcp_prot
+EXPORT_SYMBOL vmlinux 0xaa5bdb6b	cfb_copyarea
+EXPORT_SYMBOL vmlinux 0xaa6fb17a	alloc_pci_dev
+EXPORT_SYMBOL vmlinux 0xaa84a8ae	acpi_processor_power_init_bm_check
+EXPORT_SYMBOL vmlinux 0xaa8d0bd2	secpath_dup
+EXPORT_SYMBOL vmlinux 0xaa9f5341	__alloc_skb
+EXPORT_SYMBOL vmlinux 0xaaaaacd1	ioremap_wc
+EXPORT_SYMBOL vmlinux 0xaab06af8	_write_lock_irqsave
+EXPORT_SYMBOL vmlinux 0xaad0fe9b	elevator_init
+EXPORT_SYMBOL vmlinux 0xaae50943	ps2_end_command
+EXPORT_SYMBOL vmlinux 0xaae7fbc2	tty_unregister_driver
+EXPORT_SYMBOL vmlinux 0xaae8ab0e	acpi_bus_power_manageable
+EXPORT_SYMBOL vmlinux 0xaaebe34f	mca_write_pos
+EXPORT_SYMBOL vmlinux 0xaaf45875	acpi_lid_notifier_unregister
+EXPORT_SYMBOL vmlinux 0xaafdc258	strcasecmp
+EXPORT_SYMBOL vmlinux 0xab26d109	kblockd_schedule_work
+EXPORT_SYMBOL vmlinux 0xab537418	genphy_config_advert
+EXPORT_SYMBOL vmlinux 0xab546d52	nf_reinject
+EXPORT_SYMBOL vmlinux 0xab600421	probe_irq_off
+EXPORT_SYMBOL vmlinux 0xab65ed80	set_memory_uc
+EXPORT_SYMBOL vmlinux 0xab770678	rdmsr_safe_regs_on_cpu
+EXPORT_SYMBOL vmlinux 0xab7c9898	inet_register_protosw
+EXPORT_SYMBOL vmlinux 0xab8065db	submit_bh
+EXPORT_SYMBOL vmlinux 0xab9fdc35	phy_stop
+EXPORT_SYMBOL vmlinux 0xabb16e07	pcim_enable_device
+EXPORT_SYMBOL vmlinux 0xabb47a37	hippi_type_trans
+EXPORT_SYMBOL vmlinux 0xabb9406d	cpufreq_global_kobject
+EXPORT_SYMBOL vmlinux 0xabc81efe	kthread_create
+EXPORT_SYMBOL vmlinux 0xabd0c91c	rtc_time_to_tm
+EXPORT_SYMBOL vmlinux 0xabe58975	tty_register_driver
+EXPORT_SYMBOL vmlinux 0xac0ba8c1	blk_iopoll_disable
+EXPORT_SYMBOL vmlinux 0xac4ef4b5	pci_request_region
+EXPORT_SYMBOL vmlinux 0xac58ea5e	acpi_unload_table_id
+EXPORT_SYMBOL vmlinux 0xac6855b0	gen_kill_estimator
+EXPORT_SYMBOL vmlinux 0xac79b89b	tcp_connect
+EXPORT_SYMBOL vmlinux 0xacc97b8e	page_readlink
+EXPORT_SYMBOL vmlinux 0xaccabc6a	in4_pton
+EXPORT_SYMBOL vmlinux 0xacdeb154	__tracepoint_module_get
+EXPORT_SYMBOL vmlinux 0xacdffcf0	pipe_to_file
+EXPORT_SYMBOL vmlinux 0xacf4d843	match_strdup
+EXPORT_SYMBOL vmlinux 0xad0413d4	match_hex
+EXPORT_SYMBOL vmlinux 0xad07a204	tcp_create_openreq_child
+EXPORT_SYMBOL vmlinux 0xad100544	iw_handler_set_spy
+EXPORT_SYMBOL vmlinux 0xad13c689	acpi_os_execute
+EXPORT_SYMBOL vmlinux 0xad158261	kmap_atomic_prot
+EXPORT_SYMBOL vmlinux 0xad24210f	inet6_getname
+EXPORT_SYMBOL vmlinux 0xad3e9fe4	dev_addr_add_multiple
+EXPORT_SYMBOL vmlinux 0xad4864c8	xfrm_policy_flush
+EXPORT_SYMBOL vmlinux 0xad68eda5	eisa_driver_unregister
+EXPORT_SYMBOL vmlinux 0xad81cae6	gnet_stats_copy_rate_est
+EXPORT_SYMBOL vmlinux 0xadaa2657	cpufreq_register_notifier
+EXPORT_SYMBOL vmlinux 0xadb3b673	sk_run_filter
+EXPORT_SYMBOL vmlinux 0xadc06f3d	pcix_get_max_mmrbc
+EXPORT_SYMBOL vmlinux 0xadc65fc3	ethtool_op_get_tso
+EXPORT_SYMBOL vmlinux 0xadd0ed8d	brioctl_set
+EXPORT_SYMBOL vmlinux 0xadd4efdd	tty_hung_up_p
+EXPORT_SYMBOL vmlinux 0xadf42bd5	__request_region
+EXPORT_SYMBOL vmlinux 0xae0e3313	tty_port_carrier_raised
+EXPORT_SYMBOL vmlinux 0xae758d48	i2c_smbus_process_call
+EXPORT_SYMBOL vmlinux 0xae75f004	ida_destroy
+EXPORT_SYMBOL vmlinux 0xae8d2090	generic_file_open
+EXPORT_SYMBOL vmlinux 0xaebc654d	posix_lock_file_wait
+EXPORT_SYMBOL vmlinux 0xaec655c7	alloc_pages_exact
+EXPORT_SYMBOL vmlinux 0xaed013b9	posix_acl_valid
+EXPORT_SYMBOL vmlinux 0xaef109f8	generic_show_options
+EXPORT_SYMBOL vmlinux 0xaf0b984e	free_mdio_bitbang
+EXPORT_SYMBOL vmlinux 0xaf2f9a4a	generic_removexattr
+EXPORT_SYMBOL vmlinux 0xaf3dd7dc	scsi_logging_level
+EXPORT_SYMBOL vmlinux 0xaf4b1540	acpi_get_irq_routing_table
+EXPORT_SYMBOL vmlinux 0xaf57e11e	textsearch_destroy
+EXPORT_SYMBOL vmlinux 0xaf635ee6	mutex_lock_interruptible
+EXPORT_SYMBOL vmlinux 0xaf8ffc57	__generic_block_fiemap
+EXPORT_SYMBOL vmlinux 0xaf99dac4	pagevec_lookup_tag
+EXPORT_SYMBOL vmlinux 0xafa5d12d	__serio_register_port
+EXPORT_SYMBOL vmlinux 0xafe36015	mca_device_read_stored_pos
+EXPORT_SYMBOL vmlinux 0xaff1cb2b	i2c_del_driver
+EXPORT_SYMBOL vmlinux 0xb0010a83	pid_task
+EXPORT_SYMBOL vmlinux 0xb007e069	skb_copy_expand
+EXPORT_SYMBOL vmlinux 0xb037337b	generic_write_checks
+EXPORT_SYMBOL vmlinux 0xb045580f	rfkill_register
+EXPORT_SYMBOL vmlinux 0xb077ef32	acpi_enter_sleep_state
+EXPORT_SYMBOL vmlinux 0xb07dfb3d	acpi_remove_gpe_handler
+EXPORT_SYMBOL vmlinux 0xb08f76ad	gen_pool_free
+EXPORT_SYMBOL vmlinux 0xb09c57a9	request_key_with_auxdata
+EXPORT_SYMBOL vmlinux 0xb0b847ac	__bitmap_full
+EXPORT_SYMBOL vmlinux 0xb0c2df6e	wait_for_key_construction
+EXPORT_SYMBOL vmlinux 0xb0d052a4	sock_tx_timestamp
+EXPORT_SYMBOL vmlinux 0xb0db0388	jbd2_journal_revoke
+EXPORT_SYMBOL vmlinux 0xb0dec233	skb_dma_map
+EXPORT_SYMBOL vmlinux 0xb0e10781	get_option
+EXPORT_SYMBOL vmlinux 0xb0f1889d	km_policy_notify
+EXPORT_SYMBOL vmlinux 0xb121390a	probe_irq_on
+EXPORT_SYMBOL vmlinux 0xb140f3c4	__break_lease
+EXPORT_SYMBOL vmlinux 0xb146e378	tty_port_lower_dtr_rts
+EXPORT_SYMBOL vmlinux 0xb153941c	pipe_lock
+EXPORT_SYMBOL vmlinux 0xb156c151	skb_copy_datagram_iovec
+EXPORT_SYMBOL vmlinux 0xb15cd4da	sync_inodes_sb
+EXPORT_SYMBOL vmlinux 0xb16ecdd3	inode_add_bytes
+EXPORT_SYMBOL vmlinux 0xb17ad016	ip_defrag
+EXPORT_SYMBOL vmlinux 0xb19760c3	bitmap_onto
+EXPORT_SYMBOL vmlinux 0xb1c3a01a	oops_in_progress
+EXPORT_SYMBOL vmlinux 0xb1cfad22	rdmsr_on_cpu
+EXPORT_SYMBOL vmlinux 0xb1f975aa	unlock_kernel
+EXPORT_SYMBOL vmlinux 0xb219d56c	wbinvd_on_cpu
+EXPORT_SYMBOL vmlinux 0xb22365b8	xfrm_init_state
+EXPORT_SYMBOL vmlinux 0xb224fbe2	param_get_short
+EXPORT_SYMBOL vmlinux 0xb22f7252	tcp_v4_send_check
+EXPORT_SYMBOL vmlinux 0xb22fe6a3	netdev_increment_features
+EXPORT_SYMBOL vmlinux 0xb23e0587	mmc_unregister_driver
+EXPORT_SYMBOL vmlinux 0xb24f5c0a	do_SAK
+EXPORT_SYMBOL vmlinux 0xb25de0d9	genlmsg_multicast_allns
+EXPORT_SYMBOL vmlinux 0xb2682405	utf8_to_utf32
+EXPORT_SYMBOL vmlinux 0xb272fd2a	proc_dointvec_jiffies
+EXPORT_SYMBOL vmlinux 0xb27510ef	atomic64_inc_return
+EXPORT_SYMBOL vmlinux 0xb279da12	pv_lock_ops
+EXPORT_SYMBOL vmlinux 0xb29bc8bd	idr_remove
+EXPORT_SYMBOL vmlinux 0xb2a70f28	kmap_high
+EXPORT_SYMBOL vmlinux 0xb2bbd699	scsi_host_alloc
+EXPORT_SYMBOL vmlinux 0xb2e8666e	dquot_drop
+EXPORT_SYMBOL vmlinux 0xb2efb6be	mca_read_stored_pos
+EXPORT_SYMBOL vmlinux 0xb2fd5ceb	__put_user_4
+EXPORT_SYMBOL vmlinux 0xb30abf8d	idr_get_new_above
+EXPORT_SYMBOL vmlinux 0xb31526ee	sg_copy_from_buffer
+EXPORT_SYMBOL vmlinux 0xb3205415	wait_for_completion_killable
+EXPORT_SYMBOL vmlinux 0xb32574f4	dev_addr_del_multiple
+EXPORT_SYMBOL vmlinux 0xb3284531	acpi_dbg_layer
+EXPORT_SYMBOL vmlinux 0xb33c7dc6	tty_wait_until_sent
+EXPORT_SYMBOL vmlinux 0xb342e03f	vlan_gro_receive
+EXPORT_SYMBOL vmlinux 0xb3480a33	dm_table_get
+EXPORT_SYMBOL vmlinux 0xb34d4c2e	acpi_terminate
+EXPORT_SYMBOL vmlinux 0xb352177e	find_first_bit
+EXPORT_SYMBOL vmlinux 0xb368e7a9	journal_blocks_per_page
+EXPORT_SYMBOL vmlinux 0xb376d79d	radix_tree_tagged
+EXPORT_SYMBOL vmlinux 0xb38495a1	md_write_end
+EXPORT_SYMBOL vmlinux 0xb3912fd9	check_disk_change
+EXPORT_SYMBOL vmlinux 0xb3994c7a	per_cpu__kstat
+EXPORT_SYMBOL vmlinux 0xb3a307c6	si_meminfo
+EXPORT_SYMBOL vmlinux 0xb3ae5d52	pci_enable_msi_block
+EXPORT_SYMBOL vmlinux 0xb3af7cac	dev_unicast_unsync
+EXPORT_SYMBOL vmlinux 0xb3c13f63	shrink_dcache_parent
+EXPORT_SYMBOL vmlinux 0xb3c42c94	per_cpu__x86_bios_cpu_apicid
+EXPORT_SYMBOL vmlinux 0xb3cca7e4	set_disk_ro
+EXPORT_SYMBOL vmlinux 0xb3d0d449	i2c_master_recv
+EXPORT_SYMBOL vmlinux 0xb3d142e9	kernel_bind
+EXPORT_SYMBOL vmlinux 0xb3d2a8ab	kmem_cache_size
+EXPORT_SYMBOL vmlinux 0xb3d9ceba	tcp4_gro_receive
+EXPORT_SYMBOL vmlinux 0xb3e0590d	acpi_set_current_resources
+EXPORT_SYMBOL vmlinux 0xb3fe0641	input_flush_device
+EXPORT_SYMBOL vmlinux 0xb411da38	security_sb_clone_mnt_opts
+EXPORT_SYMBOL vmlinux 0xb423dba1	console_blanked
+EXPORT_SYMBOL vmlinux 0xb42453d3	param_get_invbool
+EXPORT_SYMBOL vmlinux 0xb4277341	neigh_destroy
+EXPORT_SYMBOL vmlinux 0xb4279ab7	downgrade_write
+EXPORT_SYMBOL vmlinux 0xb4390f9a	mcount
+EXPORT_SYMBOL vmlinux 0xb45578b8	memscan
+EXPORT_SYMBOL vmlinux 0xb458ad27	read_cache_page
+EXPORT_SYMBOL vmlinux 0xb45b24f6	k8_nb_ids
+EXPORT_SYMBOL vmlinux 0xb45fad51	skb_append_datato_frags
+EXPORT_SYMBOL vmlinux 0xb4709322	scsi_dev_info_add_list
+EXPORT_SYMBOL vmlinux 0xb47174dd	acpi_bus_register_driver
+EXPORT_SYMBOL vmlinux 0xb4864f82	kmalloc_caches
+EXPORT_SYMBOL vmlinux 0xb4a989f3	tcp_tso_segment
+EXPORT_SYMBOL vmlinux 0xb4b0ee4e	down_read
+EXPORT_SYMBOL vmlinux 0xb4bf48a6	ppp_unregister_channel
+EXPORT_SYMBOL vmlinux 0xb4ca9447	__kfifo_get
+EXPORT_SYMBOL vmlinux 0xb4f2939c	tcp_v4_syn_recv_sock
+EXPORT_SYMBOL vmlinux 0xb5044271	vsscanf
+EXPORT_SYMBOL vmlinux 0xb51bdc26	skb_dma_unmap
+EXPORT_SYMBOL vmlinux 0xb52340a1	llc_mac_hdr_init
+EXPORT_SYMBOL vmlinux 0xb5418861	atomic64_add
+EXPORT_SYMBOL vmlinux 0xb54533f7	usecs_to_jiffies
+EXPORT_SYMBOL vmlinux 0xb55fe93e	scsi_add_device
+EXPORT_SYMBOL vmlinux 0xb576f48e	framebuffer_release
+EXPORT_SYMBOL vmlinux 0xb58d2de3	dquot_alloc
+EXPORT_SYMBOL vmlinux 0xb594de2f	xfrm_unregister_type
+EXPORT_SYMBOL vmlinux 0xb5a13c8c	con_is_bound
+EXPORT_SYMBOL vmlinux 0xb5a459dc	unregister_blkdev
+EXPORT_SYMBOL vmlinux 0xb5ac6aa3	scsi_adjust_queue_depth
+EXPORT_SYMBOL vmlinux 0xb5ca1c46	slhc_free
+EXPORT_SYMBOL vmlinux 0xb5d52c27	ec_transaction
+EXPORT_SYMBOL vmlinux 0xb5e73e95	km_state_notify
+EXPORT_SYMBOL vmlinux 0xb5ec215d	file_fsync
+EXPORT_SYMBOL vmlinux 0xb5ef81e6	dev_get_drvdata
+EXPORT_SYMBOL vmlinux 0xb5fded70	tc_classify_compat
+EXPORT_SYMBOL vmlinux 0xb60f338d	vfs_set_dqblk
+EXPORT_SYMBOL vmlinux 0xb61659da	security_inode_getsecctx
+EXPORT_SYMBOL vmlinux 0xb6205de6	dquot_commit_info
+EXPORT_SYMBOL vmlinux 0xb62c2f09	remove_proc_entry
+EXPORT_SYMBOL vmlinux 0xb6352363	dev_alloc_name
+EXPORT_SYMBOL vmlinux 0xb6353555	per_cpu__x86_cpu_to_apicid
+EXPORT_SYMBOL vmlinux 0xb678366f	int_sqrt
+EXPORT_SYMBOL vmlinux 0xb6896671	crc_t10dif
+EXPORT_SYMBOL vmlinux 0xb6a61a86	qdisc_get_rtab
+EXPORT_SYMBOL vmlinux 0xb6a68816	find_last_bit
+EXPORT_SYMBOL vmlinux 0xb6bffb99	kstat_irqs_cpu
+EXPORT_SYMBOL vmlinux 0xb6c5a973	scsi_show_result
+EXPORT_SYMBOL vmlinux 0xb6e227aa	rtc_lock
+EXPORT_SYMBOL vmlinux 0xb6ed1e53	strncpy
+EXPORT_SYMBOL vmlinux 0xb72397d5	printk
+EXPORT_SYMBOL vmlinux 0xb72907e5	scsicam_bios_param
+EXPORT_SYMBOL vmlinux 0xb758b225	acpi_disable_event
+EXPORT_SYMBOL vmlinux 0xb7695985	mdiobus_read
+EXPORT_SYMBOL vmlinux 0xb77731a9	jbd2_log_wait_commit
+EXPORT_SYMBOL vmlinux 0xb77d177e	call_usermodehelper_pipe
+EXPORT_SYMBOL vmlinux 0xb798b8e4	flow_cache_lookup
+EXPORT_SYMBOL vmlinux 0xb7af8a28	uart_resume_port
+EXPORT_SYMBOL vmlinux 0xb7b61546	crc32_be
+EXPORT_SYMBOL vmlinux 0xb7b8815f	pci_disable_msix
+EXPORT_SYMBOL vmlinux 0xb7bc6886	kthread_stop
+EXPORT_SYMBOL vmlinux 0xb7ccb3c7	twl4030_i2c_read_u8
+EXPORT_SYMBOL vmlinux 0xb80ab00b	bdget_disk
+EXPORT_SYMBOL vmlinux 0xb80d2243	tcp_v4_md5_do_add
+EXPORT_SYMBOL vmlinux 0xb813ce5a	timecompare_transform
+EXPORT_SYMBOL vmlinux 0xb829e6e1	kern_path
+EXPORT_SYMBOL vmlinux 0xb83b56e5	bioset_create
+EXPORT_SYMBOL vmlinux 0xb84e9337	tty_hangup
+EXPORT_SYMBOL vmlinux 0xb84ed32f	proc_doulongvec_minmax
+EXPORT_SYMBOL vmlinux 0xb8604104	vlan_dev_real_dev
+EXPORT_SYMBOL vmlinux 0xb86e4ab9	random32
+EXPORT_SYMBOL vmlinux 0xb8905b9d	acpi_bus_get_device
+EXPORT_SYMBOL vmlinux 0xb89af9bf	srandom32
+EXPORT_SYMBOL vmlinux 0xb8aa2342	__check_region
+EXPORT_SYMBOL vmlinux 0xb8c1daa6	vfs_quota_on
+EXPORT_SYMBOL vmlinux 0xb8db1af1	xfrm6_prepare_output
+EXPORT_SYMBOL vmlinux 0xb8e57f26	dquot_initialize
+EXPORT_SYMBOL vmlinux 0xb8e7ce2c	__put_user_8
+EXPORT_SYMBOL vmlinux 0xb90d5727	cfb_imageblit
+EXPORT_SYMBOL vmlinux 0xb9139e68	ipv6_chk_prefix
+EXPORT_SYMBOL vmlinux 0xb9245ce0	sock_alloc_send_skb
+EXPORT_SYMBOL vmlinux 0xb92a67d4	xfrm_find_acq
+EXPORT_SYMBOL vmlinux 0xb942b513	smp_call_function_many
+EXPORT_SYMBOL vmlinux 0xb962e7ac	sock_i_uid
+EXPORT_SYMBOL vmlinux 0xb98a0185	rtc_tm_to_time
+EXPORT_SYMBOL vmlinux 0xb98ef804	vm_stat
+EXPORT_SYMBOL vmlinux 0xb9bdb16a	scsi_get_host_dev
+EXPORT_SYMBOL vmlinux 0xb9d4d20e	km_policy_expired
+EXPORT_SYMBOL vmlinux 0xb9ddfec7	dma_mark_declared_memory_occupied
+EXPORT_SYMBOL vmlinux 0xb9fd2205	add_efi_memmap
+EXPORT_SYMBOL vmlinux 0xba2d8594	ec_read
+EXPORT_SYMBOL vmlinux 0xba440b30	sock_kfree_s
+EXPORT_SYMBOL vmlinux 0xba497f13	loops_per_jiffy
+EXPORT_SYMBOL vmlinux 0xba8757b1	pci_map_rom
+EXPORT_SYMBOL vmlinux 0xbaaab8ae	timespec_to_jiffies
+EXPORT_SYMBOL vmlinux 0xbac1dfe0	blk_queue_max_hw_segments
+EXPORT_SYMBOL vmlinux 0xbacfd44a	register_tcf_proto_ops
+EXPORT_SYMBOL vmlinux 0xbae8295b	dev_add_pack
+EXPORT_SYMBOL vmlinux 0xbafd65ab	bio_integrity_advance
+EXPORT_SYMBOL vmlinux 0xbb167766	fb_var_to_videomode
+EXPORT_SYMBOL vmlinux 0xbb18892b	scsi_track_queue_full
+EXPORT_SYMBOL vmlinux 0xbb189cad	disallow_signal
+EXPORT_SYMBOL vmlinux 0xbb315b33	ip6_frag_match
+EXPORT_SYMBOL vmlinux 0xbb5225cf	key_validate
+EXPORT_SYMBOL vmlinux 0xbb5d343d	xfrm_get_acqseq
+EXPORT_SYMBOL vmlinux 0xbb89de17	ida_init
+EXPORT_SYMBOL vmlinux 0xbb954238	jbd2_journal_wipe
+EXPORT_SYMBOL vmlinux 0xbc098d8f	sk_receive_skb
+EXPORT_SYMBOL vmlinux 0xbc14ef33	mb_cache_entry_find_first
+EXPORT_SYMBOL vmlinux 0xbc280480	pci_find_capability
+EXPORT_SYMBOL vmlinux 0xbc3c369e	skb_seq_read
+EXPORT_SYMBOL vmlinux 0xbc771cbf	filemap_fdatawrite_range
+EXPORT_SYMBOL vmlinux 0xbc8c14ee	cap_netlink_recv
+EXPORT_SYMBOL vmlinux 0xbcc308bb	strnlen_user
+EXPORT_SYMBOL vmlinux 0xbd058cda	put_page
+EXPORT_SYMBOL vmlinux 0xbd318242	dst_alloc
+EXPORT_SYMBOL vmlinux 0xbd39bc5f	revalidate_disk
+EXPORT_SYMBOL vmlinux 0xbd55e76b	fddi_change_mtu
+EXPORT_SYMBOL vmlinux 0xbdb0f40b	pci_lost_interrupt
+EXPORT_SYMBOL vmlinux 0xbdb377f9	journal_forget
+EXPORT_SYMBOL vmlinux 0xbdb50170	seq_putc
+EXPORT_SYMBOL vmlinux 0xbdb6500e	per_cpu__cpu_core_map
+EXPORT_SYMBOL vmlinux 0xbdb6e94a	request_key
+EXPORT_SYMBOL vmlinux 0xbde9be46	pci_get_class
+EXPORT_SYMBOL vmlinux 0xbdf33cfa	scsi_test_unit_ready
+EXPORT_SYMBOL vmlinux 0xbdf5c25c	rb_next
+EXPORT_SYMBOL vmlinux 0xbe0e5118	nla_memcmp
+EXPORT_SYMBOL vmlinux 0xbe304bb1	alloc_fddidev
+EXPORT_SYMBOL vmlinux 0xbe5f4037	dquot_acquire
+EXPORT_SYMBOL vmlinux 0xbe63ee40	request_resource
+EXPORT_SYMBOL vmlinux 0xbe80a780	dst_destroy
+EXPORT_SYMBOL vmlinux 0xbe8d99ac	cdrom_mode_sense
+EXPORT_SYMBOL vmlinux 0xbee10c52	netif_rx
+EXPORT_SYMBOL vmlinux 0xbee2539f	set_pages_wb
+EXPORT_SYMBOL vmlinux 0xbef43296	console_conditional_schedule
+EXPORT_SYMBOL vmlinux 0xbef52dbf	neigh_changeaddr
+EXPORT_SYMBOL vmlinux 0xbf09793e	dev_addr_del
+EXPORT_SYMBOL vmlinux 0xbf255a7f	mca_device_write_pos
+EXPORT_SYMBOL vmlinux 0xbf42eed0	prepare_kernel_cred
+EXPORT_SYMBOL vmlinux 0xbf48cdcd	nla_put
+EXPORT_SYMBOL vmlinux 0xbf599dfd	sk_free
+EXPORT_SYMBOL vmlinux 0xbf60f337	scsi_host_get
+EXPORT_SYMBOL vmlinux 0xbf610131	vga_get
+EXPORT_SYMBOL vmlinux 0xbf7096a9	force_sig
+EXPORT_SYMBOL vmlinux 0xbf7fd2f5	schedule_timeout_killable
+EXPORT_SYMBOL vmlinux 0xbf8b39e9	isapnp_present
+EXPORT_SYMBOL vmlinux 0xbf9bcc8d	__cap_empty_set
+EXPORT_SYMBOL vmlinux 0xbfc177bc	iowrite32_rep
+EXPORT_SYMBOL vmlinux 0xbfee3ad5	loop_unregister_transfer
+EXPORT_SYMBOL vmlinux 0xbff2b0c4	fget
+EXPORT_SYMBOL vmlinux 0xc003c637	__strncpy_from_user
+EXPORT_SYMBOL vmlinux 0xc0044724	blk_set_default_limits
+EXPORT_SYMBOL vmlinux 0xc01287ba	dev_set_promiscuity
+EXPORT_SYMBOL vmlinux 0xc01eed33	__copy_from_user_ll_nozero
+EXPORT_SYMBOL vmlinux 0xc0580937	rb_erase
+EXPORT_SYMBOL vmlinux 0xc065ace0	skb_split
+EXPORT_SYMBOL vmlinux 0xc073afb8	unmap_mapping_range
+EXPORT_SYMBOL vmlinux 0xc0a3d105	find_next_bit
+EXPORT_SYMBOL vmlinux 0xc0aa5751	__mod_zone_page_state
+EXPORT_SYMBOL vmlinux 0xc0acf7c7	skb_put
+EXPORT_SYMBOL vmlinux 0xc0bf6ead	timecounter_cyc2time
+EXPORT_SYMBOL vmlinux 0xc0f65988	machine_real_restart
+EXPORT_SYMBOL vmlinux 0xc1147a40	tty_get_baud_rate
+EXPORT_SYMBOL vmlinux 0xc11d8093	iov_shorten
+EXPORT_SYMBOL vmlinux 0xc139a5c5	i8042_check_port_owner
+EXPORT_SYMBOL vmlinux 0xc1433af3	mmc_wait_for_app_cmd
+EXPORT_SYMBOL vmlinux 0xc19c8163	atomic64_cmpxchg
+EXPORT_SYMBOL vmlinux 0xc1ac2d68	pci_match_id
+EXPORT_SYMBOL vmlinux 0xc1e4cf7e	scsi_report_bus_reset
+EXPORT_SYMBOL vmlinux 0xc1e86310	vc_cons
+EXPORT_SYMBOL vmlinux 0xc21eebfb	lro_flush_all
+EXPORT_SYMBOL vmlinux 0xc254af48	dcache_lock
+EXPORT_SYMBOL vmlinux 0xc256e762	__bitmap_equal
+EXPORT_SYMBOL vmlinux 0xc26625cb	dm_io_client_destroy
+EXPORT_SYMBOL vmlinux 0xc2678d8d	__kfree_skb
+EXPORT_SYMBOL vmlinux 0xc280a525	__copy_from_user_ll
+EXPORT_SYMBOL vmlinux 0xc286b156	phy_ethtool_sset
+EXPORT_SYMBOL vmlinux 0xc2939e7d	rfkill_set_sw_state
+EXPORT_SYMBOL vmlinux 0xc2a15e90	search_binary_handler
+EXPORT_SYMBOL vmlinux 0xc2bdd15c	posix_acl_permission
+EXPORT_SYMBOL vmlinux 0xc2d711e1	krealloc
+EXPORT_SYMBOL vmlinux 0xc2d8c2a8	pci_bus_write_config_word
+EXPORT_SYMBOL vmlinux 0xc2e587d1	reset_devices
+EXPORT_SYMBOL vmlinux 0xc2f0f03a	pci_enable_device_io
+EXPORT_SYMBOL vmlinux 0xc302ef26	splice_from_pipe_end
+EXPORT_SYMBOL vmlinux 0xc311314f	i2c_smbus_write_byte_data
+EXPORT_SYMBOL vmlinux 0xc33f6f4c	on_each_cpu
+EXPORT_SYMBOL vmlinux 0xc33f81d2	unregister_console
+EXPORT_SYMBOL vmlinux 0xc34b1013	scsi_setup_blk_pc_cmnd
+EXPORT_SYMBOL vmlinux 0xc3654d60	pnp_get_resource
+EXPORT_SYMBOL vmlinux 0xc38256d2	backlight_device_unregister
+EXPORT_SYMBOL vmlinux 0xc38c0053	mmc_wait_for_req
+EXPORT_SYMBOL vmlinux 0xc3900bec	__vlan_hwaccel_rx
+EXPORT_SYMBOL vmlinux 0xc39ef08f	__xfrm_decode_session
+EXPORT_SYMBOL vmlinux 0xc3aaf0a9	__put_user_1
+EXPORT_SYMBOL vmlinux 0xc3cf1128	in_group_p
+EXPORT_SYMBOL vmlinux 0xc3fa6a59	memchr
+EXPORT_SYMBOL vmlinux 0xc402cc99	register_acpi_notifier
+EXPORT_SYMBOL vmlinux 0xc406a40e	vfs_dq_quota_on_remount
+EXPORT_SYMBOL vmlinux 0xc41efd47	vga_client_register
+EXPORT_SYMBOL vmlinux 0xc430082b	flush_old_exec
+EXPORT_SYMBOL vmlinux 0xc441f99a	single_open
+EXPORT_SYMBOL vmlinux 0xc456b0ef	__put_cred
+EXPORT_SYMBOL vmlinux 0xc4733e29	mpage_readpage
+EXPORT_SYMBOL vmlinux 0xc47a0a45	pci_set_power_state
+EXPORT_SYMBOL vmlinux 0xc483deab	udp_prot
+EXPORT_SYMBOL vmlinux 0xc499ae1e	kstrdup
+EXPORT_SYMBOL vmlinux 0xc5166c79	skb_trim
+EXPORT_SYMBOL vmlinux 0xc52dd49a	scsi_host_set_state
+EXPORT_SYMBOL vmlinux 0xc52f5714	fb_videomode_to_var
+EXPORT_SYMBOL vmlinux 0xc53dadb2	skb_append
+EXPORT_SYMBOL vmlinux 0xc54bbbf2	mark_buffer_dirty_inode
+EXPORT_SYMBOL vmlinux 0xc5534d64	ioread16
+EXPORT_SYMBOL vmlinux 0xc5567579	security_path_mknod
+EXPORT_SYMBOL vmlinux 0xc55f7dc7	_write_trylock
+EXPORT_SYMBOL vmlinux 0xc5718627	sg_copy_to_buffer
+EXPORT_SYMBOL vmlinux 0xc5909549	request_firmware_nowait
+EXPORT_SYMBOL vmlinux 0xc59263bd	kernel_sock_shutdown
+EXPORT_SYMBOL vmlinux 0xc5bc1bee	lro_receive_skb
+EXPORT_SYMBOL vmlinux 0xc5bc3b44	security_file_permission
+EXPORT_SYMBOL vmlinux 0xc5c115e3	vfs_quota_disable
+EXPORT_SYMBOL vmlinux 0xc5c8c578	tcp_initialize_rcv_mss
+EXPORT_SYMBOL vmlinux 0xc5d610dd	tcf_hash_check
+EXPORT_SYMBOL vmlinux 0xc5e89184	inet_getname
+EXPORT_SYMBOL vmlinux 0xc5f06ddb	tcp_v4_do_rcv
+EXPORT_SYMBOL vmlinux 0xc5f87870	ll_rw_block
+EXPORT_SYMBOL vmlinux 0xc61204a3	thermal_zone_device_unregister
+EXPORT_SYMBOL vmlinux 0xc62c329a	find_vma
+EXPORT_SYMBOL vmlinux 0xc633495b	schedule_work
+EXPORT_SYMBOL vmlinux 0xc648f00b	tcp_sync_mss
+EXPORT_SYMBOL vmlinux 0xc64968ac	md_error
+EXPORT_SYMBOL vmlinux 0xc64b8442	copy_io_context
+EXPORT_SYMBOL vmlinux 0xc68a6752	bio_map_user
+EXPORT_SYMBOL vmlinux 0xc69fe1e5	dquot_alloc_inode
+EXPORT_SYMBOL vmlinux 0xc6a8175e	slow_work_unregister_user
+EXPORT_SYMBOL vmlinux 0xc6a8f9fe	default_file_splice_read
+EXPORT_SYMBOL vmlinux 0xc6ac6e9c	kmap_atomic
+EXPORT_SYMBOL vmlinux 0xc6b8ebd0	send_sig_info
+EXPORT_SYMBOL vmlinux 0xc7131591	pcibios_align_resource
+EXPORT_SYMBOL vmlinux 0xc7208c3a	serial8250_resume_port
+EXPORT_SYMBOL vmlinux 0xc722227e	posix_acl_clone
+EXPORT_SYMBOL vmlinux 0xc73aba21	ip_getsockopt
+EXPORT_SYMBOL vmlinux 0xc768de19	cpu_all_bits
+EXPORT_SYMBOL vmlinux 0xc778207d	wake_up_process
+EXPORT_SYMBOL vmlinux 0xc77f2690	follow_down
+EXPORT_SYMBOL vmlinux 0xc79bcd36	dm_vcalloc
+EXPORT_SYMBOL vmlinux 0xc7a4fbed	rtnl_lock
+EXPORT_SYMBOL vmlinux 0xc7d9c5b4	load_nls_default
+EXPORT_SYMBOL vmlinux 0xc7e8cd16	bioset_free
+EXPORT_SYMBOL vmlinux 0xc7ec6c27	strspn
+EXPORT_SYMBOL vmlinux 0xc7ed14d1	rfkill_set_states
+EXPORT_SYMBOL vmlinux 0xc7f51339	unregister_sysctl_table
+EXPORT_SYMBOL vmlinux 0xc81933cb	inet6_add_protocol
+EXPORT_SYMBOL vmlinux 0xc81d61b9	xfrm_register_km
+EXPORT_SYMBOL vmlinux 0xc854ae4b	do_mmap_pgoff
+EXPORT_SYMBOL vmlinux 0xc85cefda	xfrm_policy_byid
+EXPORT_SYMBOL vmlinux 0xc8671c9c	end_buffer_async_write
+EXPORT_SYMBOL vmlinux 0xc871386d	tcp_v4_md5_lookup
+EXPORT_SYMBOL vmlinux 0xc88906b7	pnp_unregister_driver
+EXPORT_SYMBOL vmlinux 0xc8943eb0	posix_lock_file
+EXPORT_SYMBOL vmlinux 0xc898625d	atomic64_inc_and_test
+EXPORT_SYMBOL vmlinux 0xc8b57c27	autoremove_wake_function
+EXPORT_SYMBOL vmlinux 0xc8bf1a34	jbd2_journal_start
+EXPORT_SYMBOL vmlinux 0xc8ca3e25	acpi_get_child
+EXPORT_SYMBOL vmlinux 0xc8db684b	unlock_super
+EXPORT_SYMBOL vmlinux 0xc8ecbb95	blkdev_get
+EXPORT_SYMBOL vmlinux 0xc8fabd50	__napi_schedule
+EXPORT_SYMBOL vmlinux 0xc909ff98	llc_build_and_send_ui_pkt
+EXPORT_SYMBOL vmlinux 0xc90b6b74	d_lookup
+EXPORT_SYMBOL vmlinux 0xc923f612	ps2_begin_command
+EXPORT_SYMBOL vmlinux 0xc93e33a5	take_over_console
+EXPORT_SYMBOL vmlinux 0xc97ec149	sock_wmalloc
+EXPORT_SYMBOL vmlinux 0xc98080b7	sk_dst_check
+EXPORT_SYMBOL vmlinux 0xc99046c6	phy_print_status
+EXPORT_SYMBOL vmlinux 0xc998d641	icmp_err_convert
+EXPORT_SYMBOL vmlinux 0xc9ab2eef	acpi_os_wait_events_complete
+EXPORT_SYMBOL vmlinux 0xc9c23c5b	elv_rb_latter_request
+EXPORT_SYMBOL vmlinux 0xc9d61739	skb_dequeue
+EXPORT_SYMBOL vmlinux 0xc9ec8704	udp_table
+EXPORT_SYMBOL vmlinux 0xca04aa1b	napi_gro_receive
+EXPORT_SYMBOL vmlinux 0xca24e31e	journal_check_used_features
+EXPORT_SYMBOL vmlinux 0xca3d5704	arp_find
+EXPORT_SYMBOL vmlinux 0xca5dbc50	scsi_print_sense_hdr
+EXPORT_SYMBOL vmlinux 0xca72af97	qdisc_watchdog_schedule
+EXPORT_SYMBOL vmlinux 0xca7a297e	ethtool_op_set_tx_hw_csum
+EXPORT_SYMBOL vmlinux 0xca854bbc	pci_scan_bus_parented
+EXPORT_SYMBOL vmlinux 0xca8acc78	acpi_dbg_level
+EXPORT_SYMBOL vmlinux 0xcad1cea5	tcp_child_process
+EXPORT_SYMBOL vmlinux 0xcb062934	init_special_inode
+EXPORT_SYMBOL vmlinux 0xcb16d40a	d_validate
+EXPORT_SYMBOL vmlinux 0xcb229280	napi_frags_finish
+EXPORT_SYMBOL vmlinux 0xcb485b14	read_cache_pages
+EXPORT_SYMBOL vmlinux 0xcb496a51	skb_copy_and_csum_dev
+EXPORT_SYMBOL vmlinux 0xcb6beb40	hweight32
+EXPORT_SYMBOL vmlinux 0xcb7131fb	fb_get_options
+EXPORT_SYMBOL vmlinux 0xcb733bf2	acpi_bus_set_power
+EXPORT_SYMBOL vmlinux 0xcb7c52c2	inode_add_rsv_space
+EXPORT_SYMBOL vmlinux 0xcb9aa59a	get_fs_type
+EXPORT_SYMBOL vmlinux 0xcbab40c0	dcache_dir_open
+EXPORT_SYMBOL vmlinux 0xcbb11170	create_mnt_ns
+EXPORT_SYMBOL vmlinux 0xcbc1b6ac	tty_check_change
+EXPORT_SYMBOL vmlinux 0xcbcabc30	ip6_frag_init
+EXPORT_SYMBOL vmlinux 0xcc0b790c	inode_setattr
+EXPORT_SYMBOL vmlinux 0xcc248d26	serial8250_suspend_port
+EXPORT_SYMBOL vmlinux 0xcc36f32e	fb_unregister_client
+EXPORT_SYMBOL vmlinux 0xcc4b9394	module_layout
+EXPORT_SYMBOL vmlinux 0xcc5005fe	msleep_interruptible
+EXPORT_SYMBOL vmlinux 0xcc51ee50	dma_spin_lock
+EXPORT_SYMBOL vmlinux 0xcc5aecc3	shrink_dcache_sb
+EXPORT_SYMBOL vmlinux 0xcc7fa952	local_bh_enable_ip
+EXPORT_SYMBOL vmlinux 0xcc9d5c63	elv_abort_queue
+EXPORT_SYMBOL vmlinux 0xccc986bb	pci_enable_device
+EXPORT_SYMBOL vmlinux 0xccd4e08f	netdev_class_remove_file
+EXPORT_SYMBOL vmlinux 0xccf55d56	blk_queue_bounce
+EXPORT_SYMBOL vmlinux 0xcd4aa44a	abort_creds
+EXPORT_SYMBOL vmlinux 0xcd5ed293	dm_kcopyd_copy
+EXPORT_SYMBOL vmlinux 0xcda2b1c9	tcp_sendmsg
+EXPORT_SYMBOL vmlinux 0xcdd2ef14	fd_install
+EXPORT_SYMBOL vmlinux 0xcded70c6	fifo_create_dflt
+EXPORT_SYMBOL vmlinux 0xcdf87af9	kobject_add
+EXPORT_SYMBOL vmlinux 0xcdfc1f17	mdiobus_free
+EXPORT_SYMBOL vmlinux 0xce19bac5	register_inet6addr_notifier
+EXPORT_SYMBOL vmlinux 0xce36ded6	sysctl_tcp_mem
+EXPORT_SYMBOL vmlinux 0xce4474f8	__set_page_dirty_nobuffers
+EXPORT_SYMBOL vmlinux 0xce4904a4	acpi_leave_sleep_state
+EXPORT_SYMBOL vmlinux 0xce5ac24f	zlib_inflate_workspacesize
+EXPORT_SYMBOL vmlinux 0xce8fd6f6	blk_queue_start_tag
+EXPORT_SYMBOL vmlinux 0xcee599c7	remap_vmalloc_range
+EXPORT_SYMBOL vmlinux 0xcefcd99a	serial8250_unregister_port
+EXPORT_SYMBOL vmlinux 0xcf1a1511	bdi_destroy
+EXPORT_SYMBOL vmlinux 0xcf1d28ab	acpi_error
+EXPORT_SYMBOL vmlinux 0xcf28a7a6	filemap_write_and_wait
+EXPORT_SYMBOL vmlinux 0xcf438fc4	pcie_port_service_register
+EXPORT_SYMBOL vmlinux 0xcf4545bd	generic_getxattr
+EXPORT_SYMBOL vmlinux 0xcf687f21	dev_unicast_delete
+EXPORT_SYMBOL vmlinux 0xcf6cfe1f	msrs_free
+EXPORT_SYMBOL vmlinux 0xcf9b201f	ip6_route_output
+EXPORT_SYMBOL vmlinux 0xcf9eef2e	vfs_create
+EXPORT_SYMBOL vmlinux 0xcfa6e1fb	delayed_slow_work_enqueue
+EXPORT_SYMBOL vmlinux 0xcfadd723	__percpu_counter_add
+EXPORT_SYMBOL vmlinux 0xcfb9006e	jiffies_to_timeval
+EXPORT_SYMBOL vmlinux 0xcfc5e865	iov_iter_copy_from_user_atomic
+EXPORT_SYMBOL vmlinux 0xcfd67e90	end_page_writeback
+EXPORT_SYMBOL vmlinux 0xcfe05d4d	register_kmmio_probe
+EXPORT_SYMBOL vmlinux 0xcff53400	kref_put
+EXPORT_SYMBOL vmlinux 0xd00e6792	kill_fasync
+EXPORT_SYMBOL vmlinux 0xd0181f4f	__bitmap_xor
+EXPORT_SYMBOL vmlinux 0xd01c8477	d_rehash
+EXPORT_SYMBOL vmlinux 0xd02c784f	jbd2_journal_stop
+EXPORT_SYMBOL vmlinux 0xd037e855	mca_register_driver
+EXPORT_SYMBOL vmlinux 0xd0433b08	i2c_smbus_write_byte
+EXPORT_SYMBOL vmlinux 0xd06d6504	inet_dev_addr_type
+EXPORT_SYMBOL vmlinux 0xd07a9b0b	pci_release_selected_regions
+EXPORT_SYMBOL vmlinux 0xd08197fa	acpi_load_tables
+EXPORT_SYMBOL vmlinux 0xd098d697	generic_file_splice_read
+EXPORT_SYMBOL vmlinux 0xd0b9c55e	unlock_rename
+EXPORT_SYMBOL vmlinux 0xd0ce0347	scsi_nonblockable_ioctl
+EXPORT_SYMBOL vmlinux 0xd0d8621b	strlen
+EXPORT_SYMBOL vmlinux 0xd0eb8db7	devm_ioremap_nocache
+EXPORT_SYMBOL vmlinux 0xd0ee38b8	schedule_timeout_uninterruptible
+EXPORT_SYMBOL vmlinux 0xd11e7624	read_cache_page_gfp
+EXPORT_SYMBOL vmlinux 0xd12f14d7	kmap
+EXPORT_SYMBOL vmlinux 0xd13cb40f	bio_endio
+EXPORT_SYMBOL vmlinux 0xd1472061	acpi_pci_register_driver
+EXPORT_SYMBOL vmlinux 0xd152a9bf	__getblk
+EXPORT_SYMBOL vmlinux 0xd1543f5f	inet_sk_rebuild_header
+EXPORT_SYMBOL vmlinux 0xd15a0127	add_to_page_cache_locked
+EXPORT_SYMBOL vmlinux 0xd16f8ac2	udp_proc_unregister
+EXPORT_SYMBOL vmlinux 0xd174dcf0	vfs_unlink
+EXPORT_SYMBOL vmlinux 0xd17ecc22	per_cpu__cpu_sibling_map
+EXPORT_SYMBOL vmlinux 0xd18b6eb2	acpi_unmap_lsapic
+EXPORT_SYMBOL vmlinux 0xd19c8031	names_cachep
+EXPORT_SYMBOL vmlinux 0xd19cd3e5	blk_init_queue_node
+EXPORT_SYMBOL vmlinux 0xd1a82441	do_splice_to
+EXPORT_SYMBOL vmlinux 0xd1e890f9	kunmap_atomic
+EXPORT_SYMBOL vmlinux 0xd1f6c5f3	smp_num_siblings
+EXPORT_SYMBOL vmlinux 0xd1f91bcd	dev_base_lock
+EXPORT_SYMBOL vmlinux 0xd1fb24d1	sysctl_ms_jiffies
+EXPORT_SYMBOL vmlinux 0xd2001bd0	i2c_smbus_xfer
+EXPORT_SYMBOL vmlinux 0xd22f83ea	icmpv6_send
+EXPORT_SYMBOL vmlinux 0xd2445025	blk_queue_segment_boundary
+EXPORT_SYMBOL vmlinux 0xd251d7b0	security_socket_getpeersec_dgram
+EXPORT_SYMBOL vmlinux 0xd2555f19	jiffies_64_to_clock_t
+EXPORT_SYMBOL vmlinux 0xd25d4f74	console_blank_hook
+EXPORT_SYMBOL vmlinux 0xd267445a	qdisc_calculate_pkt_len
+EXPORT_SYMBOL vmlinux 0xd267d42c	down_killable
+EXPORT_SYMBOL vmlinux 0xd26e8d57	dst_release
+EXPORT_SYMBOL vmlinux 0xd2965f6f	kthread_should_stop
+EXPORT_SYMBOL vmlinux 0xd2a68761	proc_dointvec_ms_jiffies
+EXPORT_SYMBOL vmlinux 0xd2a75ee0	dmi_first_match
+EXPORT_SYMBOL vmlinux 0xd2a941d4	sg_init_table
+EXPORT_SYMBOL vmlinux 0xd2d86d4a	generic_file_aio_read
+EXPORT_SYMBOL vmlinux 0xd2e8ec6e	ip_route_input
+EXPORT_SYMBOL vmlinux 0xd32e52c7	posix_acl_chmod_masq
+EXPORT_SYMBOL vmlinux 0xd34f0c62	gen_pool_create
+EXPORT_SYMBOL vmlinux 0xd35a46d3	pci_get_slot
+EXPORT_SYMBOL vmlinux 0xd35f8e63	skb_make_writable
+EXPORT_SYMBOL vmlinux 0xd366388d	alloc_hippi_dev
+EXPORT_SYMBOL vmlinux 0xd366cefb	netdev_set_master
+EXPORT_SYMBOL vmlinux 0xd380d20f	path_put
+EXPORT_SYMBOL vmlinux 0xd3951da4	acpi_resource_to_address64
+EXPORT_SYMBOL vmlinux 0xd3d967f8	mmc_card_can_sleep
+EXPORT_SYMBOL vmlinux 0xd3f74cf1	interruptible_sleep_on_timeout
+EXPORT_SYMBOL vmlinux 0xd3f91bb9	textsearch_find_continuous
+EXPORT_SYMBOL vmlinux 0xd418e1c0	adjust_resource
+EXPORT_SYMBOL vmlinux 0xd4255dbb	nla_put_nohdr
+EXPORT_SYMBOL vmlinux 0xd426c1f1	lock_may_read
+EXPORT_SYMBOL vmlinux 0xd427a815	cdev_del
+EXPORT_SYMBOL vmlinux 0xd42b7232	_write_unlock_bh
+EXPORT_SYMBOL vmlinux 0xd42d67a8	security_task_getsecid
+EXPORT_SYMBOL vmlinux 0xd4529212	netif_device_attach
+EXPORT_SYMBOL vmlinux 0xd4645c65	eisa_driver_register
+EXPORT_SYMBOL vmlinux 0xd46a0238	uart_suspend_port
+EXPORT_SYMBOL vmlinux 0xd488483f	pci_pme_capable
+EXPORT_SYMBOL vmlinux 0xd48f6851	skb_tx_hash
+EXPORT_SYMBOL vmlinux 0xd4d2c67c	dquot_reserve_space
+EXPORT_SYMBOL vmlinux 0xd4ddf73a	bdget
+EXPORT_SYMBOL vmlinux 0xd50fef48	acpi_detach_data
+EXPORT_SYMBOL vmlinux 0xd5214e9a	xfrm_state_check_expire
+EXPORT_SYMBOL vmlinux 0xd5263820	mb_cache_destroy
+EXPORT_SYMBOL vmlinux 0xd54343d2	pnp_device_detach
+EXPORT_SYMBOL vmlinux 0xd5638e48	journal_load
+EXPORT_SYMBOL vmlinux 0xd567c20c	sock_wfree
+EXPORT_SYMBOL vmlinux 0xd5688a7a	radix_tree_insert
+EXPORT_SYMBOL vmlinux 0xd56c1900	ppp_register_net_channel
+EXPORT_SYMBOL vmlinux 0xd57145db	scsi_command_normalize_sense
+EXPORT_SYMBOL vmlinux 0xd5962c22	simple_rmdir
+EXPORT_SYMBOL vmlinux 0xd5ff5e62	inet_ioctl
+EXPORT_SYMBOL vmlinux 0xd62359e3	ppp_input
+EXPORT_SYMBOL vmlinux 0xd62c833f	schedule_timeout
+EXPORT_SYMBOL vmlinux 0xd65c7b4c	pci_bus_write_config_dword
+EXPORT_SYMBOL vmlinux 0xd688b460	bio_integrity_trim
+EXPORT_SYMBOL vmlinux 0xd6a78d08	smp_call_function_single
+EXPORT_SYMBOL vmlinux 0xd6b33026	cpu_khz
+EXPORT_SYMBOL vmlinux 0xd6e367ea	udp_proc_register
+EXPORT_SYMBOL vmlinux 0xd6ed6dee	tcp_alloc_md5sig_pool
+EXPORT_SYMBOL vmlinux 0xd6ee688f	vmalloc
+EXPORT_SYMBOL vmlinux 0xd6f17664	pci_fixup_device
+EXPORT_SYMBOL vmlinux 0xd7114e01	bio_kmalloc
+EXPORT_SYMBOL vmlinux 0xd715f48d	ethtool_op_get_link
+EXPORT_SYMBOL vmlinux 0xd74bbeaa	simple_transaction_read
+EXPORT_SYMBOL vmlinux 0xd75bc185	tty_flip_buffer_push
+EXPORT_SYMBOL vmlinux 0xd75f406f	seq_release_private
+EXPORT_SYMBOL vmlinux 0xd77784ad	address_space_init_once
+EXPORT_SYMBOL vmlinux 0xd77a5aa5	__bitmap_and
+EXPORT_SYMBOL vmlinux 0xd79b5a02	allow_signal
+EXPORT_SYMBOL vmlinux 0xd7a6fafa	panic_notifier_list
+EXPORT_SYMBOL vmlinux 0xd7ae2506	scsi_get_device_flags_keyed
+EXPORT_SYMBOL vmlinux 0xd7c72359	security_inode_readlink
+EXPORT_SYMBOL vmlinux 0xd7c93b8e	xfrm_policy_unregister_afinfo
+EXPORT_SYMBOL vmlinux 0xd7d2e83e	acpi_evaluate_object_typed
+EXPORT_SYMBOL vmlinux 0xd7d36d1a	idr_find
+EXPORT_SYMBOL vmlinux 0xd7d67687	get_io_context
+EXPORT_SYMBOL vmlinux 0xd7d9c87e	__netdev_alloc_page
+EXPORT_SYMBOL vmlinux 0xd7dd777b	reserve_perfctr_nmi
+EXPORT_SYMBOL vmlinux 0xd7e1eaf1	tcp_rcv_state_process
+EXPORT_SYMBOL vmlinux 0xd7e9988d	posix_unblock_lock
+EXPORT_SYMBOL vmlinux 0xd82405cc	dev_mc_unsync
+EXPORT_SYMBOL vmlinux 0xd82613c0	atomic64_sub_and_test
+EXPORT_SYMBOL vmlinux 0xd8282ff0	posix_acl_equiv_mode
+EXPORT_SYMBOL vmlinux 0xd82b6642	jbd2_journal_try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0xd83791bc	nf_conntrack_destroy
+EXPORT_SYMBOL vmlinux 0xd843c736	blk_register_region
+EXPORT_SYMBOL vmlinux 0xd8493aa2	__f_setown
+EXPORT_SYMBOL vmlinux 0xd849a352	lease_modify
+EXPORT_SYMBOL vmlinux 0xd84f5ad1	lookup_bdev
+EXPORT_SYMBOL vmlinux 0xd851af78	up_write
+EXPORT_SYMBOL vmlinux 0xd872f46b	i2c_release_client
+EXPORT_SYMBOL vmlinux 0xd873cbe1	alloc_fcdev
+EXPORT_SYMBOL vmlinux 0xd89da37f	movable_zone
+EXPORT_SYMBOL vmlinux 0xd8a2ab95	in_egroup_p
+EXPORT_SYMBOL vmlinux 0xd8a65c38	atomic64_sub
+EXPORT_SYMBOL vmlinux 0xd8ac3add	pcie_port_service_unregister
+EXPORT_SYMBOL vmlinux 0xd8e484f0	register_chrdev_region
+EXPORT_SYMBOL vmlinux 0xd9091363	acpi_install_notify_handler
+EXPORT_SYMBOL vmlinux 0xd953d515	fb_get_buffer_offset
+EXPORT_SYMBOL vmlinux 0xd960e09d	scsi_device_lookup
+EXPORT_SYMBOL vmlinux 0xd963a74a	flush_delayed_work
+EXPORT_SYMBOL vmlinux 0xd96f1970	pci_set_dma_seg_boundary
+EXPORT_SYMBOL vmlinux 0xd985dc99	mempool_free_pages
+EXPORT_SYMBOL vmlinux 0xd996d859	idr_pre_get
+EXPORT_SYMBOL vmlinux 0xd999c118	dma_alloc_from_coherent
+EXPORT_SYMBOL vmlinux 0xd9aa6a5e	init_file
+EXPORT_SYMBOL vmlinux 0xd9c272aa	mca_mark_as_unused
+EXPORT_SYMBOL vmlinux 0xd9c3c7b5	sock_no_shutdown
+EXPORT_SYMBOL vmlinux 0xda08c0d7	pcibios_get_irq_routing_table
+EXPORT_SYMBOL vmlinux 0xda0a6b0e	acpi_map_lsapic
+EXPORT_SYMBOL vmlinux 0xda1a7335	kasprintf
+EXPORT_SYMBOL vmlinux 0xda20271a	scsi_device_lookup_by_target
+EXPORT_SYMBOL vmlinux 0xda3602f9	nf_register_queue_handler
+EXPORT_SYMBOL vmlinux 0xda3863ca	inet_frag_kill
+EXPORT_SYMBOL vmlinux 0xda3cda69	skb_free_datagram
+EXPORT_SYMBOL vmlinux 0xda3d779e	kernel_sock_ioctl
+EXPORT_SYMBOL vmlinux 0xda3f8abb	nobh_write_begin
+EXPORT_SYMBOL vmlinux 0xda60d773	bio_add_pc_page
+EXPORT_SYMBOL vmlinux 0xda6898fe	netif_device_detach
+EXPORT_SYMBOL vmlinux 0xda7c7d28	truncate_inode_pages_range
+EXPORT_SYMBOL vmlinux 0xda7ca6cb	fb_mode_is_equal
+EXPORT_SYMBOL vmlinux 0xda8af7ad	fb_find_nearest_mode
+EXPORT_SYMBOL vmlinux 0xda8fd495	isapnp_write_byte
+EXPORT_SYMBOL vmlinux 0xda928914	nmi_watchdog
+EXPORT_SYMBOL vmlinux 0xda93d6cf	input_unfilter_device
+EXPORT_SYMBOL vmlinux 0xdaa57ec3	totalhigh_pages
+EXPORT_SYMBOL vmlinux 0xdb32eac1	fifo_set_limit
+EXPORT_SYMBOL vmlinux 0xdb4c88b4	groups_alloc
+EXPORT_SYMBOL vmlinux 0xdb560109	genphy_resume
+EXPORT_SYMBOL vmlinux 0xdb604fe5	may_umount_tree
+EXPORT_SYMBOL vmlinux 0xdb864d65	iov_iter_single_seg_count
+EXPORT_SYMBOL vmlinux 0xdba23867	__kill_fasync
+EXPORT_SYMBOL vmlinux 0xdbcd416e	sysctl_ip_nonlocal_bind
+EXPORT_SYMBOL vmlinux 0xdbfaae4c	tcp_gro_complete
+EXPORT_SYMBOL vmlinux 0xdc047fc4	scsi_dev_info_list_add_keyed
+EXPORT_SYMBOL vmlinux 0xdc053205	udp_memory_allocated
+EXPORT_SYMBOL vmlinux 0xdc1081d5	sock_no_sendpage
+EXPORT_SYMBOL vmlinux 0xdc14eda7	pci_pci_problems
+EXPORT_SYMBOL vmlinux 0xdc2adb35	add_taint
+EXPORT_SYMBOL vmlinux 0xdc342dcc	path_get
+EXPORT_SYMBOL vmlinux 0xdc3ca3b5	add_disk
+EXPORT_SYMBOL vmlinux 0xdc43a9c8	daemonize
+EXPORT_SYMBOL vmlinux 0xdc50cfee	gnet_stats_finish_copy
+EXPORT_SYMBOL vmlinux 0xdc6bce07	jbd2_journal_release_jbd_inode
+EXPORT_SYMBOL vmlinux 0xdc873a70	screen_info
+EXPORT_SYMBOL vmlinux 0xdc8c347d	sock_common_getsockopt
+EXPORT_SYMBOL vmlinux 0xdc95da79	bio_clone
+EXPORT_SYMBOL vmlinux 0xdca0e950	genl_register_family
+EXPORT_SYMBOL vmlinux 0xdca10fe2	acpi_is_video_device
+EXPORT_SYMBOL vmlinux 0xdca13b05	truncate_pagecache
+EXPORT_SYMBOL vmlinux 0xdcbca35a	fb_is_primary_device
+EXPORT_SYMBOL vmlinux 0xdd08793b	tty_shutdown
+EXPORT_SYMBOL vmlinux 0xdd0a2ba2	strlcat
+EXPORT_SYMBOL vmlinux 0xdd1f9d95	mmc_release_host
+EXPORT_SYMBOL vmlinux 0xdd2c3831	xfrm_lookup
+EXPORT_SYMBOL vmlinux 0xdd2d285d	dma_async_device_unregister
+EXPORT_SYMBOL vmlinux 0xdd6bfccd	radix_tree_tag_set
+EXPORT_SYMBOL vmlinux 0xdd7e9277	dm_dirty_log_create
+EXPORT_SYMBOL vmlinux 0xdd9d5a9b	tcp_poll
+EXPORT_SYMBOL vmlinux 0xdda4c992	dm_table_unplug_all
+EXPORT_SYMBOL vmlinux 0xdda7aacf	blk_get_backing_dev_info
+EXPORT_SYMBOL vmlinux 0xddadbef6	page_put_link
+EXPORT_SYMBOL vmlinux 0xddd3f999	dquot_claim_space
+EXPORT_SYMBOL vmlinux 0xddd8c922	generic_setlease
+EXPORT_SYMBOL vmlinux 0xde1fd694	acpi_processor_preregister_performance
+EXPORT_SYMBOL vmlinux 0xde217adb	vfs_rmdir
+EXPORT_SYMBOL vmlinux 0xde27356f	__scm_destroy
+EXPORT_SYMBOL vmlinux 0xde31b902	blk_limits_io_opt
+EXPORT_SYMBOL vmlinux 0xde69a5dd	blk_queue_softirq_done
+EXPORT_SYMBOL vmlinux 0xde75b689	set_irq_type
+EXPORT_SYMBOL vmlinux 0xde9360ba	totalram_pages
+EXPORT_SYMBOL vmlinux 0xdeb580f6	dev_alloc_skb
+EXPORT_SYMBOL vmlinux 0xdec3843e	mmc_suspend_host
+EXPORT_SYMBOL vmlinux 0xdedc9e6c	cdrom_mode_select
+EXPORT_SYMBOL vmlinux 0xdedcf48f	clocksource_register
+EXPORT_SYMBOL vmlinux 0xdee312e3	jbd2_journal_abort
+EXPORT_SYMBOL vmlinux 0xdee8edf7	proto_register
+EXPORT_SYMBOL vmlinux 0xdf0da3cc	acpi_get_devices
+EXPORT_SYMBOL vmlinux 0xdf198401	scsi_target_resume
+EXPORT_SYMBOL vmlinux 0xdf2cdc0a	call_usermodehelper_stdinpipe
+EXPORT_SYMBOL vmlinux 0xdf48d274	ip_route_me_harder
+EXPORT_SYMBOL vmlinux 0xdf4c638b	key_negate_and_link
+EXPORT_SYMBOL vmlinux 0xdf4c8767	ns_to_timeval
+EXPORT_SYMBOL vmlinux 0xdf60cc27	__print_symbol
+EXPORT_SYMBOL vmlinux 0xdf6fa9e8	del_gendisk
+EXPORT_SYMBOL vmlinux 0xdf8c695a	__ndelay
+EXPORT_SYMBOL vmlinux 0xdf929370	fs_overflowgid
+EXPORT_SYMBOL vmlinux 0xdf9d3e0b	blk_queue_dma_pad
+EXPORT_SYMBOL vmlinux 0xdf9e2236	kmem_cache_alloc
+EXPORT_SYMBOL vmlinux 0xdfa3a303	generic_write_sync
+EXPORT_SYMBOL vmlinux 0xdfa8144b	nobh_writepage
+EXPORT_SYMBOL vmlinux 0xdfb80506	sk_stream_kill_queues
+EXPORT_SYMBOL vmlinux 0xdfc5169b	slhc_init
+EXPORT_SYMBOL vmlinux 0xdfed75ea	pcix_set_mmrbc
+EXPORT_SYMBOL vmlinux 0xe006774a	pci_set_master
+EXPORT_SYMBOL vmlinux 0xe03b2818	rt6_lookup
+EXPORT_SYMBOL vmlinux 0xe047e8ba	tcp_v4_connect
+EXPORT_SYMBOL vmlinux 0xe04a78a4	__elv_add_request
+EXPORT_SYMBOL vmlinux 0xe04c7a4b	phy_start_interrupts
+EXPORT_SYMBOL vmlinux 0xe074c932	scsi_cmd_ioctl
+EXPORT_SYMBOL vmlinux 0xe075d6eb	iter_div_u64_rem
+EXPORT_SYMBOL vmlinux 0xe076ba69	qdisc_watchdog_init
+EXPORT_SYMBOL vmlinux 0xe094ef39	sg_next
+EXPORT_SYMBOL vmlinux 0xe0a501e3	idr_remove_all
+EXPORT_SYMBOL vmlinux 0xe0ac8bd2	acpi_bus_generate_netlink_event
+EXPORT_SYMBOL vmlinux 0xe0b13336	argv_free
+EXPORT_SYMBOL vmlinux 0xe0bc24a1	param_set_ushort
+EXPORT_SYMBOL vmlinux 0xe0c9b23f	serio_reconnect
+EXPORT_SYMBOL vmlinux 0xe0e81be4	consume_skb
+EXPORT_SYMBOL vmlinux 0xe0f105a3	acpi_processor_unregister_performance
+EXPORT_SYMBOL vmlinux 0xe0fdaa16	__pskb_pull_tail
+EXPORT_SYMBOL vmlinux 0xe10cf83f	cpu_sysdev_class
+EXPORT_SYMBOL vmlinux 0xe13cd8a7	dmi_name_in_vendors
+EXPORT_SYMBOL vmlinux 0xe152fc9d	dump_trace
+EXPORT_SYMBOL vmlinux 0xe1603228	vfs_get_dqinfo
+EXPORT_SYMBOL vmlinux 0xe164d8fb	__dev_get_by_name
+EXPORT_SYMBOL vmlinux 0xe1761617	security_inet_conn_request
+EXPORT_SYMBOL vmlinux 0xe1881ac4	vfs_quota_on_path
+EXPORT_SYMBOL vmlinux 0xe190cbb6	ps2_handle_response
+EXPORT_SYMBOL vmlinux 0xe19b8dd4	netlink_kernel_create
+EXPORT_SYMBOL vmlinux 0xe1a74fa5	blk_remove_plug
+EXPORT_SYMBOL vmlinux 0xe1a81c3a	icmpv6msg_statistics
+EXPORT_SYMBOL vmlinux 0xe1b9129a	nf_unregister_hooks
+EXPORT_SYMBOL vmlinux 0xe1dd9288	pcim_iomap_regions_request_all
+EXPORT_SYMBOL vmlinux 0xe21d82df	xfrm_policy_bysel_ctx
+EXPORT_SYMBOL vmlinux 0xe2270fdc	llc_sap_find
+EXPORT_SYMBOL vmlinux 0xe23a0dc9	neigh_lookup_nodev
+EXPORT_SYMBOL vmlinux 0xe23ae481	blk_iopoll_complete
+EXPORT_SYMBOL vmlinux 0xe23d7acb	up_read
+EXPORT_SYMBOL vmlinux 0xe24d3a97	jiffies_64
+EXPORT_SYMBOL vmlinux 0xe2507bc4	jbd2_journal_errno
+EXPORT_SYMBOL vmlinux 0xe25946ba	pci_release_regions
+EXPORT_SYMBOL vmlinux 0xe2a6f98c	zero_fill_bio
+EXPORT_SYMBOL vmlinux 0xe2d49ab7	pci_iounmap
+EXPORT_SYMBOL vmlinux 0xe2d5255a	strcmp
+EXPORT_SYMBOL vmlinux 0xe2e5bff7	jbd2_journal_dirty_metadata
+EXPORT_SYMBOL vmlinux 0xe2e8065e	memdup_user
+EXPORT_SYMBOL vmlinux 0xe2fae716	kmemdup
+EXPORT_SYMBOL vmlinux 0xe2ff133e	inet_release
+EXPORT_SYMBOL vmlinux 0xe3690e24	register_nls
+EXPORT_SYMBOL vmlinux 0xe3ee034e	mmc_card_sleep
+EXPORT_SYMBOL vmlinux 0xe3fb1f13	mdiobus_scan
+EXPORT_SYMBOL vmlinux 0xe3fbe148	acpi_install_table_handler
+EXPORT_SYMBOL vmlinux 0xe4348d3f	cdrom_get_last_written
+EXPORT_SYMBOL vmlinux 0xe43617f7	acpi_gbl_FADT
+EXPORT_SYMBOL vmlinux 0xe438cd51	scsi_target_quiesce
+EXPORT_SYMBOL vmlinux 0xe4446c75	key_revoke
+EXPORT_SYMBOL vmlinux 0xe456bd3a	complete
+EXPORT_SYMBOL vmlinux 0xe4732daa	__bread
+EXPORT_SYMBOL vmlinux 0xe484e35f	ioread32
+EXPORT_SYMBOL vmlinux 0xe4870354	_read_trylock
+EXPORT_SYMBOL vmlinux 0xe48f3039	ida_get_new_above
+EXPORT_SYMBOL vmlinux 0xe4b8c35c	deny_write_access
+EXPORT_SYMBOL vmlinux 0xe4c1df3e	_read_lock_bh
+EXPORT_SYMBOL vmlinux 0xe4d0f55d	skb_dequeue_tail
+EXPORT_SYMBOL vmlinux 0xe4dd4a39	sysctl_data
+EXPORT_SYMBOL vmlinux 0xe4f1695e	cookie_check_timestamp
+EXPORT_SYMBOL vmlinux 0xe51fbf9e	remove_inode_hash
+EXPORT_SYMBOL vmlinux 0xe523ad75	synchronize_irq
+EXPORT_SYMBOL vmlinux 0xe525756f	no_llseek
+EXPORT_SYMBOL vmlinux 0xe53f0cb6	pci_claim_resource
+EXPORT_SYMBOL vmlinux 0xe56488e6	pipe_unlock
+EXPORT_SYMBOL vmlinux 0xe5729000	nf_log_register
+EXPORT_SYMBOL vmlinux 0xe57878a1	in6_pton
+EXPORT_SYMBOL vmlinux 0xe5827f7c	scsi_execute
+EXPORT_SYMBOL vmlinux 0xe5867808	dlci_ioctl_set
+EXPORT_SYMBOL vmlinux 0xe5af3541	xfrm6_rcv_spi
+EXPORT_SYMBOL vmlinux 0xe5baf2d6	iunique
+EXPORT_SYMBOL vmlinux 0xe5be8822	security_path_mkdir
+EXPORT_SYMBOL vmlinux 0xe5c78a99	do_blank_screen
+EXPORT_SYMBOL vmlinux 0xe5e98b87	splice_from_pipe_next
+EXPORT_SYMBOL vmlinux 0xe5eb474c	otg_get_transceiver
+EXPORT_SYMBOL vmlinux 0xe5ed5467	xfrm_policy_walk_init
+EXPORT_SYMBOL vmlinux 0xe61eda70	ipv6_getsockopt
+EXPORT_SYMBOL vmlinux 0xe63665d7	vga_tryget
+EXPORT_SYMBOL vmlinux 0xe6439eb5	scsi_host_lookup
+EXPORT_SYMBOL vmlinux 0xe655294b	vfs_read
+EXPORT_SYMBOL vmlinux 0xe65c8165	eth_validate_addr
+EXPORT_SYMBOL vmlinux 0xe68bb5c0	jbd2_journal_file_inode
+EXPORT_SYMBOL vmlinux 0xe690b8fd	__ipv6_isatap_ifid
+EXPORT_SYMBOL vmlinux 0xe697d108	__blk_iopoll_complete
+EXPORT_SYMBOL vmlinux 0xe6c77082	ipv6_dev_get_saddr
+EXPORT_SYMBOL vmlinux 0xe6c7ed07	block_commit_write
+EXPORT_SYMBOL vmlinux 0xe6d4a746	tcf_em_unregister
+EXPORT_SYMBOL vmlinux 0xe6ebc016	key_create_or_update
+EXPORT_SYMBOL vmlinux 0xe6fbe430	can_do_mlock
+EXPORT_SYMBOL vmlinux 0xe70ef967	clocksource_unregister
+EXPORT_SYMBOL vmlinux 0xe714375c	__tasklet_hi_schedule_first
+EXPORT_SYMBOL vmlinux 0xe716baed	acpi_unregister_ioapic
+EXPORT_SYMBOL vmlinux 0xe74d4ba8	bdput
+EXPORT_SYMBOL vmlinux 0xe75f2ee3	__neigh_event_send
+EXPORT_SYMBOL vmlinux 0xe7a5116a	journal_revoke
+EXPORT_SYMBOL vmlinux 0xe7d2aca1	security_sk_classify_flow
+EXPORT_SYMBOL vmlinux 0xe7d32407	nmi_active
+EXPORT_SYMBOL vmlinux 0xe7d4daac	seq_list_next
+EXPORT_SYMBOL vmlinux 0xe7f53efd	blk_init_tags
+EXPORT_SYMBOL vmlinux 0xe80ce219	sysctl_tcp_dma_copybreak
+EXPORT_SYMBOL vmlinux 0xe8332c4c	security_inode_permission
+EXPORT_SYMBOL vmlinux 0xe85fde81	blk_peek_request
+EXPORT_SYMBOL vmlinux 0xe867118f	pci_remove_bus
+EXPORT_SYMBOL vmlinux 0xe8794ce1	slhc_toss
+EXPORT_SYMBOL vmlinux 0xe8959398	set_security_override_from_ctx
+EXPORT_SYMBOL vmlinux 0xe8a3605f	acpi_processor_set_thermal_limit
+EXPORT_SYMBOL vmlinux 0xe8ad94bd	dma_pool_create
+EXPORT_SYMBOL vmlinux 0xe8b68849	wrmsr_on_cpus
+EXPORT_SYMBOL vmlinux 0xe8cd902e	hweight16
+EXPORT_SYMBOL vmlinux 0xe90dcae0	__request_module
+EXPORT_SYMBOL vmlinux 0xe914e41e	strcpy
+EXPORT_SYMBOL vmlinux 0xe940cd51	sk_stop_timer
+EXPORT_SYMBOL vmlinux 0xe94481f4	blk_rq_count_integrity_sg
+EXPORT_SYMBOL vmlinux 0xe95a4e5d	get_phy_device
+EXPORT_SYMBOL vmlinux 0xe95ec312	mca_bus_type
+EXPORT_SYMBOL vmlinux 0xe95f80ac	mca_device_transform_memory
+EXPORT_SYMBOL vmlinux 0xe962553e	scsi_print_sense
+EXPORT_SYMBOL vmlinux 0xe997667b	wrmsr_on_cpu
+EXPORT_SYMBOL vmlinux 0xe9f6ed2c	sock_no_setsockopt
+EXPORT_SYMBOL vmlinux 0xea054b22	nla_policy_len
+EXPORT_SYMBOL vmlinux 0xea10212a	int_to_scsilun
+EXPORT_SYMBOL vmlinux 0xea10655a	__bitmap_intersects
+EXPORT_SYMBOL vmlinux 0xea163520	sock_sendmsg
+EXPORT_SYMBOL vmlinux 0xea261622	__generic_file_aio_write
+EXPORT_SYMBOL vmlinux 0xea2d33a2	radix_tree_gang_lookup_slot
+EXPORT_SYMBOL vmlinux 0xea493f3c	fasync_helper
+EXPORT_SYMBOL vmlinux 0xea74f831	kernel_getpeername
+EXPORT_SYMBOL vmlinux 0xea7987f1	key_update
+EXPORT_SYMBOL vmlinux 0xea852925	rwsem_downgrade_wake
+EXPORT_SYMBOL vmlinux 0xea858cb5	radix_tree_gang_lookup_tag
+EXPORT_SYMBOL vmlinux 0xea90bdd3	acpi_attach_data
+EXPORT_SYMBOL vmlinux 0xeabc7d59	input_release_device
+EXPORT_SYMBOL vmlinux 0xeac6b184	kill_litter_super
+EXPORT_SYMBOL vmlinux 0xeae3dfd6	__const_udelay
+EXPORT_SYMBOL vmlinux 0xeb070f5d	jbd2_journal_force_commit_nested
+EXPORT_SYMBOL vmlinux 0xeb1fabf6	interruptible_sleep_on
+EXPORT_SYMBOL vmlinux 0xeb3d4d41	ndisc_build_skb
+EXPORT_SYMBOL vmlinux 0xeb7d8d8c	tcp_timewait_state_process
+EXPORT_SYMBOL vmlinux 0xeb7e28b0	pnp_release_card_device
+EXPORT_SYMBOL vmlinux 0xeb8452db	security_path_rename
+EXPORT_SYMBOL vmlinux 0xeb8f54b3	strstrip
+EXPORT_SYMBOL vmlinux 0xeb96fd11	i2c_smbus_write_block_data
+EXPORT_SYMBOL vmlinux 0xeb9703ff	prepare_binprm
+EXPORT_SYMBOL vmlinux 0xeba49708	tcf_destroy_chain
+EXPORT_SYMBOL vmlinux 0xebb151a6	rtnl_notify
+EXPORT_SYMBOL vmlinux 0xebd273a6	strict_strtoull
+EXPORT_SYMBOL vmlinux 0xebfd5b51	block_prepare_write
+EXPORT_SYMBOL vmlinux 0xec052716	thaw_bdev
+EXPORT_SYMBOL vmlinux 0xec18fdc6	wireless_send_event
+EXPORT_SYMBOL vmlinux 0xec196fa1	dm_exception_store_type_unregister
+EXPORT_SYMBOL vmlinux 0xec23c6db	tcp_rcv_established
+EXPORT_SYMBOL vmlinux 0xec345a77	scsi_print_result
+EXPORT_SYMBOL vmlinux 0xec34d9f6	pci_bus_read_config_dword
+EXPORT_SYMBOL vmlinux 0xec3c9dad	xfrm_bundle_ok
+EXPORT_SYMBOL vmlinux 0xec47b3d4	tcf_em_register
+EXPORT_SYMBOL vmlinux 0xec5cceff	ip_dev_find
+EXPORT_SYMBOL vmlinux 0xec63835d	llc_add_pack
+EXPORT_SYMBOL vmlinux 0xec794ba0	__send_remote_softirq
+EXPORT_SYMBOL vmlinux 0xec8611a4	simple_lookup
+EXPORT_SYMBOL vmlinux 0xeca783dc	scsi_prep_fn
+EXPORT_SYMBOL vmlinux 0xecaae2a5	pci_remove_behind_bridge
+EXPORT_SYMBOL vmlinux 0xecb01ce1	dm_exception_store_destroy
+EXPORT_SYMBOL vmlinux 0xecb6c601	pci_get_device
+EXPORT_SYMBOL vmlinux 0xecc8921e	__blk_end_request_cur
+EXPORT_SYMBOL vmlinux 0xecde1418	_spin_lock_irq
+EXPORT_SYMBOL vmlinux 0xecfde92c	hippi_mac_addr
+EXPORT_SYMBOL vmlinux 0xed26da93	dma_supported
+EXPORT_SYMBOL vmlinux 0xed274c7d	tcp_gro_receive
+EXPORT_SYMBOL vmlinux 0xed5157bb	phy_stop_interrupts
+EXPORT_SYMBOL vmlinux 0xed7cb191	cdrom_open
+EXPORT_SYMBOL vmlinux 0xed9c86fb	should_remove_suid
+EXPORT_SYMBOL vmlinux 0xeda0d76e	gen_estimator_active
+EXPORT_SYMBOL vmlinux 0xedadbd89	invalidate_inode_buffers
+EXPORT_SYMBOL vmlinux 0xedbaee5e	nla_strcmp
+EXPORT_SYMBOL vmlinux 0xedbe7927	invalidate_mapping_pages
+EXPORT_SYMBOL vmlinux 0xedc03953	iounmap
+EXPORT_SYMBOL vmlinux 0xeded3386	remap_pfn_range
+EXPORT_SYMBOL vmlinux 0xee27cb3e	blk_rq_map_user_iov
+EXPORT_SYMBOL vmlinux 0xee2d0fc7	_local_bh_enable
+EXPORT_SYMBOL vmlinux 0xee5165cd	tcf_hash_create
+EXPORT_SYMBOL vmlinux 0xee73eb45	lock_may_write
+EXPORT_SYMBOL vmlinux 0xee74d5bc	md_integrity_add_rdev
+EXPORT_SYMBOL vmlinux 0xee7eb9e1	pnp_platform_devices
+EXPORT_SYMBOL vmlinux 0xee8ca171	vm_insert_page
+EXPORT_SYMBOL vmlinux 0xee923928	get_sb_single
+EXPORT_SYMBOL vmlinux 0xeea5e730	inet_csk_destroy_sock
+EXPORT_SYMBOL vmlinux 0xeea8720a	skb_copy_datagram_const_iovec
+EXPORT_SYMBOL vmlinux 0xeea9dbaf	bitmap_bitremap
+EXPORT_SYMBOL vmlinux 0xeebd915f	ip_mc_join_group
+EXPORT_SYMBOL vmlinux 0xeebef2f5	mark_buffer_dirty
+EXPORT_SYMBOL vmlinux 0xeed91713	dev_trans_start
+EXPORT_SYMBOL vmlinux 0xeedc1095	skb_copy_datagram_from_iovec
+EXPORT_SYMBOL vmlinux 0xeef2b1e9	journal_abort
+EXPORT_SYMBOL vmlinux 0xeef41656	generic_fillattr
+EXPORT_SYMBOL vmlinux 0xef3bd862	mca_find_unused_adapter
+EXPORT_SYMBOL vmlinux 0xef541e0b	ethtool_op_get_rx_csum
+EXPORT_SYMBOL vmlinux 0xef6be7ef	jbd2_journal_extend
+EXPORT_SYMBOL vmlinux 0xef6ed1ba	param_set_invbool
+EXPORT_SYMBOL vmlinux 0xef8c7af7	inode_init_always
+EXPORT_SYMBOL vmlinux 0xef912e98	igrab
+EXPORT_SYMBOL vmlinux 0xef9aedfc	boot_option_idle_override
+EXPORT_SYMBOL vmlinux 0xefa1c7d3	blk_get_request
+EXPORT_SYMBOL vmlinux 0xefc108c9	neigh_update
+EXPORT_SYMBOL vmlinux 0xefdd70ce	security_secid_to_secctx
+EXPORT_SYMBOL vmlinux 0xefe099c3	acpi_get_event_status
+EXPORT_SYMBOL vmlinux 0xeff14be9	ioremap_cache
+EXPORT_SYMBOL vmlinux 0xeff430a8	generic_block_bmap
+EXPORT_SYMBOL vmlinux 0xf0009fee	put_pages_list
+EXPORT_SYMBOL vmlinux 0xf024f6e4	cdrom_get_media_event
+EXPORT_SYMBOL vmlinux 0xf050cc8e	input_allocate_device
+EXPORT_SYMBOL vmlinux 0xf065f629	ioread16be
+EXPORT_SYMBOL vmlinux 0xf06af73e	may_umount
+EXPORT_SYMBOL vmlinux 0xf0861230	kernel_setsockopt
+EXPORT_SYMBOL vmlinux 0xf0b4e4ee	cdrom_number_of_slots
+EXPORT_SYMBOL vmlinux 0xf0c0fa8a	mmc_resume_host
+EXPORT_SYMBOL vmlinux 0xf0e36169	ethtool_op_get_ufo
+EXPORT_SYMBOL vmlinux 0xf0ec460c	cad_pid
+EXPORT_SYMBOL vmlinux 0xf0ef15b4	list_sort
+EXPORT_SYMBOL vmlinux 0xf0f1246c	kvasprintf
+EXPORT_SYMBOL vmlinux 0xf0fdf6cb	__stack_chk_fail
+EXPORT_SYMBOL vmlinux 0xf1037350	unlock_buffer
+EXPORT_SYMBOL vmlinux 0xf1046bc1	commit_creds
+EXPORT_SYMBOL vmlinux 0xf10de535	ioread8
+EXPORT_SYMBOL vmlinux 0xf11543ff	find_first_zero_bit
+EXPORT_SYMBOL vmlinux 0xf120251d	acpi_bus_add
+EXPORT_SYMBOL vmlinux 0xf14b944a	neigh_for_each
+EXPORT_SYMBOL vmlinux 0xf14e86ae	__dst_free
+EXPORT_SYMBOL vmlinux 0xf15cc9ab	mmc_wait_for_cmd
+EXPORT_SYMBOL vmlinux 0xf174ed48	acquire_console_sem
+EXPORT_SYMBOL vmlinux 0xf179b243	tcf_exts_change
+EXPORT_SYMBOL vmlinux 0xf195c682	fb_invert_cmaps
+EXPORT_SYMBOL vmlinux 0xf1d64416	gen_new_estimator
+EXPORT_SYMBOL vmlinux 0xf1db1704	nla_memcpy
+EXPORT_SYMBOL vmlinux 0xf1deabf2	div64_u64
+EXPORT_SYMBOL vmlinux 0xf1e98c74	avenrun
+EXPORT_SYMBOL vmlinux 0xf20dabd8	free_irq
+EXPORT_SYMBOL vmlinux 0xf21570eb	gnet_stats_start_copy
+EXPORT_SYMBOL vmlinux 0xf22a5e49	release_sock
+EXPORT_SYMBOL vmlinux 0xf2411e55	sk_release_kernel
+EXPORT_SYMBOL vmlinux 0xf243d496	key_task_permission
+EXPORT_SYMBOL vmlinux 0xf2997713	tty_termios_hw_change
+EXPORT_SYMBOL vmlinux 0xf2a9d205	d_alloc
+EXPORT_SYMBOL vmlinux 0xf2d353fa	dcache_dir_close
+EXPORT_SYMBOL vmlinux 0xf2e74040	mca_set_adapter_name
+EXPORT_SYMBOL vmlinux 0xf2f2743e	serio_interrupt
+EXPORT_SYMBOL vmlinux 0xf2fc6eeb	generic_file_buffered_write
+EXPORT_SYMBOL vmlinux 0xf313da4e	sha_transform
+EXPORT_SYMBOL vmlinux 0xf329d9e6	ip_nat_decode_session
+EXPORT_SYMBOL vmlinux 0xf3341268	__clear_user
+EXPORT_SYMBOL vmlinux 0xf338d4c3	netlink_unregister_notifier
+EXPORT_SYMBOL vmlinux 0xf346231f	seq_list_start_head
+EXPORT_SYMBOL vmlinux 0xf34f0ecd	register_con_driver
+EXPORT_SYMBOL vmlinux 0xf3600a9a	elv_rb_former_request
+EXPORT_SYMBOL vmlinux 0xf3766f69	__lock_page
+EXPORT_SYMBOL vmlinux 0xf397b9aa	__tasklet_schedule
+EXPORT_SYMBOL vmlinux 0xf39bf4d9	put_cmsg
+EXPORT_SYMBOL vmlinux 0xf3af07df	xfrm_input_resume
+EXPORT_SYMBOL vmlinux 0xf3bd9875	acpi_unlock_ac_dir
+EXPORT_SYMBOL vmlinux 0xf3bf0bce	__bitmap_complement
+EXPORT_SYMBOL vmlinux 0xf3de4f9b	poll_freewait
+EXPORT_SYMBOL vmlinux 0xf441ac43	ioread8_rep
+EXPORT_SYMBOL vmlinux 0xf48a2c4c	MCA_bus
+EXPORT_SYMBOL vmlinux 0xf494f618	mmc_regulator_get_ocrmask
+EXPORT_SYMBOL vmlinux 0xf4a5c213	avail_to_resrv_perfctr_nmi_bit
+EXPORT_SYMBOL vmlinux 0xf4a706b5	udp_lib_get_port
+EXPORT_SYMBOL vmlinux 0xf4ac60c2	mdiobus_write
+EXPORT_SYMBOL vmlinux 0xf4ae9d51	ida_pre_get
+EXPORT_SYMBOL vmlinux 0xf4b9ba22	blk_unplug
+EXPORT_SYMBOL vmlinux 0xf4f14de6	rtnl_trylock
+EXPORT_SYMBOL vmlinux 0xf4f52f93	dqstats
+EXPORT_SYMBOL vmlinux 0xf502d273	acpi_get_current_resources
+EXPORT_SYMBOL vmlinux 0xf5079e6f	journal_get_undo_access
+EXPORT_SYMBOL vmlinux 0xf510bbba	input_event
+EXPORT_SYMBOL vmlinux 0xf51ae235	touch_nmi_watchdog
+EXPORT_SYMBOL vmlinux 0xf53d4c26	qdisc_class_hash_destroy
+EXPORT_SYMBOL vmlinux 0xf57682c8	acpi_get_object_info
+EXPORT_SYMBOL vmlinux 0xf584cc71	scsi_finish_command
+EXPORT_SYMBOL vmlinux 0xf58c90d9	do_splice_from
+EXPORT_SYMBOL vmlinux 0xf59466d8	bio_integrity_alloc
+EXPORT_SYMBOL vmlinux 0xf5b1e2ae	seq_path
+EXPORT_SYMBOL vmlinux 0xf5c05914	generic_segment_checks
+EXPORT_SYMBOL vmlinux 0xf5c9012e	timespec_trunc
+EXPORT_SYMBOL vmlinux 0xf5ccdffd	blk_stack_limits
+EXPORT_SYMBOL vmlinux 0xf5cd8708	thaw_process
+EXPORT_SYMBOL vmlinux 0xf5d01cdf	mca_device_transform_irq
+EXPORT_SYMBOL vmlinux 0xf5e02432	register_filesystem
+EXPORT_SYMBOL vmlinux 0xf5eb86ea	blk_verify_command
+EXPORT_SYMBOL vmlinux 0xf5f2ec06	md_wait_for_blocked_rdev
+EXPORT_SYMBOL vmlinux 0xf5fccccd	sock_get_timestamp
+EXPORT_SYMBOL vmlinux 0xf6283ede	mmc_free_host
+EXPORT_SYMBOL vmlinux 0xf643bed8	jbd2_journal_update_format
+EXPORT_SYMBOL vmlinux 0xf6607c68	scsi_eh_finish_cmd
+EXPORT_SYMBOL vmlinux 0xf6a6b3d8	fb_set_suspend
+EXPORT_SYMBOL vmlinux 0xf6af7f4c	arch_debugfs_dir
+EXPORT_SYMBOL vmlinux 0xf6bb4729	color_table
+EXPORT_SYMBOL vmlinux 0xf6c367de	pfifo_qdisc_ops
+EXPORT_SYMBOL vmlinux 0xf6ce6d9c	locks_remove_posix
+EXPORT_SYMBOL vmlinux 0xf6dc8cb2	ppp_channel_index
+EXPORT_SYMBOL vmlinux 0xf6ebc03b	net_ratelimit
+EXPORT_SYMBOL vmlinux 0xf73fdc78	qdisc_warn_nonwc
+EXPORT_SYMBOL vmlinux 0xf74a63b5	x86_mce_decode_callback
+EXPORT_SYMBOL vmlinux 0xf7533668	kobject_get
+EXPORT_SYMBOL vmlinux 0xf7623914	radix_tree_tag_clear
+EXPORT_SYMBOL vmlinux 0xf76c32cd	scsi_block_requests
+EXPORT_SYMBOL vmlinux 0xf7828808	init_net
+EXPORT_SYMBOL vmlinux 0xf786ef5e	idr_init
+EXPORT_SYMBOL vmlinux 0xf78d04ab	netlink_register_notifier
+EXPORT_SYMBOL vmlinux 0xf79e9ee6	lock_rename
+EXPORT_SYMBOL vmlinux 0xf7ac3032	unload_nls
+EXPORT_SYMBOL vmlinux 0xf7ec4201	__sk_mem_reclaim
+EXPORT_SYMBOL vmlinux 0xf80935ae	unregister_cdrom
+EXPORT_SYMBOL vmlinux 0xf811e69d	scsi_eh_flush_done_q
+EXPORT_SYMBOL vmlinux 0xf815a488	tty_port_raise_dtr_rts
+EXPORT_SYMBOL vmlinux 0xf81aeb74	mutex_unlock
+EXPORT_SYMBOL vmlinux 0xf82abc1d	isa_dma_bridge_buggy
+EXPORT_SYMBOL vmlinux 0xf82e3d47	acpi_initialize_objects
+EXPORT_SYMBOL vmlinux 0xf83653dd	dm_io_client_resize
+EXPORT_SYMBOL vmlinux 0xf83ae291	release_firmware
+EXPORT_SYMBOL vmlinux 0xf83eccee	sk_stream_error
+EXPORT_SYMBOL vmlinux 0xf8527dd6	pv_cpu_ops
+EXPORT_SYMBOL vmlinux 0xf8589b89	xfrm_state_insert
+EXPORT_SYMBOL vmlinux 0xf8630f3c	generic_writepages
+EXPORT_SYMBOL vmlinux 0xf8725e60	dev_open
+EXPORT_SYMBOL vmlinux 0xf88e0ee2	acpi_get_table_header
+EXPORT_SYMBOL vmlinux 0xf890fe7f	pm_idle
+EXPORT_SYMBOL vmlinux 0xf8b30e93	mempool_create
+EXPORT_SYMBOL vmlinux 0xf8ba313d	xfrm_state_register_afinfo
+EXPORT_SYMBOL vmlinux 0xf8c5dbe9	scsi_register
+EXPORT_SYMBOL vmlinux 0xf8cf9ee5	abort_exclusive_wait
+EXPORT_SYMBOL vmlinux 0xf93f251c	rfkill_blocked
+EXPORT_SYMBOL vmlinux 0xf940a328	__next_cpu
+EXPORT_SYMBOL vmlinux 0xf94e938b	kobject_del
+EXPORT_SYMBOL vmlinux 0xf954b036	netdev_class_create_file
+EXPORT_SYMBOL vmlinux 0xf9609efe	journal_init_inode
+EXPORT_SYMBOL vmlinux 0xf9691066	bdi_register
+EXPORT_SYMBOL vmlinux 0xf970a2ae	blk_make_request
+EXPORT_SYMBOL vmlinux 0xf974a74b	scsi_eh_restore_cmnd
+EXPORT_SYMBOL vmlinux 0xf9899664	mod_timer_pinned
+EXPORT_SYMBOL vmlinux 0xf9a482f9	msleep
+EXPORT_SYMBOL vmlinux 0xf9ab6ff5	blk_queue_find_tag
+EXPORT_SYMBOL vmlinux 0xf9c1a755	mnt_pin
+EXPORT_SYMBOL vmlinux 0xf9c59337	block_read_full_page
+EXPORT_SYMBOL vmlinux 0xf9e00178	lease_get_mtime
+EXPORT_SYMBOL vmlinux 0xfa0564fc	__wait_on_bit_lock
+EXPORT_SYMBOL vmlinux 0xfa21b73f	acpi_processor_register_performance
+EXPORT_SYMBOL vmlinux 0xfa296d62	scsi_ioctl
+EXPORT_SYMBOL vmlinux 0xfa39074e	seq_bitmap_list
+EXPORT_SYMBOL vmlinux 0xfa60b5ab	save_mount_options
+EXPORT_SYMBOL vmlinux 0xfa738dc7	simple_release_fs
+EXPORT_SYMBOL vmlinux 0xfaac8671	pci_clear_master
+EXPORT_SYMBOL vmlinux 0xfaac8e5a	in6_dev_finish_destroy
+EXPORT_SYMBOL vmlinux 0xfae63a24	flush_signals
+EXPORT_SYMBOL vmlinux 0xfaf98462	bitrev32
+EXPORT_SYMBOL vmlinux 0xfb0443fb	acpi_get_parent
+EXPORT_SYMBOL vmlinux 0xfb0cf2e9	touch_all_softlockup_watchdogs
+EXPORT_SYMBOL vmlinux 0xfb2bc891	bio_get_nr_vecs
+EXPORT_SYMBOL vmlinux 0xfb2da8fe	dm_kcopyd_client_create
+EXPORT_SYMBOL vmlinux 0xfb34934f	alloc_disk_node
+EXPORT_SYMBOL vmlinux 0xfb595b9b	dquot_free_space
+EXPORT_SYMBOL vmlinux 0xfb6952f3	__skb_recv_datagram
+EXPORT_SYMBOL vmlinux 0xfb6af58d	recalc_sigpending
+EXPORT_SYMBOL vmlinux 0xfb98b793	nf_log_bind_pf
+EXPORT_SYMBOL vmlinux 0xfba0c2e0	llc_sap_list_lock
+EXPORT_SYMBOL vmlinux 0xfbbd4fd6	sock_no_sendmsg
+EXPORT_SYMBOL vmlinux 0xfbc24758	pv_mmu_ops
+EXPORT_SYMBOL vmlinux 0xfbc81f76	bio_integrity_free
+EXPORT_SYMBOL vmlinux 0xfbd21539	pci_request_selected_regions
+EXPORT_SYMBOL vmlinux 0xfbdf50cf	inode_init_once
+EXPORT_SYMBOL vmlinux 0xfbe27a1c	rb_first
+EXPORT_SYMBOL vmlinux 0xfbf2e258	hippi_change_mtu
+EXPORT_SYMBOL vmlinux 0xfbfce416	netif_receive_skb
+EXPORT_SYMBOL vmlinux 0xfc02b7ad	sysctl_tcp_wmem
+EXPORT_SYMBOL vmlinux 0xfc272595	dev_mc_sync
+EXPORT_SYMBOL vmlinux 0xfc2b48b6	set_create_files_as
+EXPORT_SYMBOL vmlinux 0xfc2e3121	dma_async_memcpy_buf_to_buf
+EXPORT_SYMBOL vmlinux 0xfc39e32f	ioport_unmap
+EXPORT_SYMBOL vmlinux 0xfc4a1e29	call_usermodehelper_setcleanup
+EXPORT_SYMBOL vmlinux 0xfc4e7122	bd_claim
+EXPORT_SYMBOL vmlinux 0xfc533f85	schedule_work_on
+EXPORT_SYMBOL vmlinux 0xfc562165	acpi_run_osc
+EXPORT_SYMBOL vmlinux 0xfc610f0b	scsi_is_target_device
+EXPORT_SYMBOL vmlinux 0xfc6256b9	boot_tvec_bases
+EXPORT_SYMBOL vmlinux 0xfc73c928	handle_sysrq
+EXPORT_SYMBOL vmlinux 0xfca8f0d8	napi_gro_flush
+EXPORT_SYMBOL vmlinux 0xfcaa04a0	out_of_line_wait_on_bit_lock
+EXPORT_SYMBOL vmlinux 0xfcc2a43c	utf32_to_utf8
+EXPORT_SYMBOL vmlinux 0xfcc4d4e4	mod_timer_pending
+EXPORT_SYMBOL vmlinux 0xfcda63a3	node_states
+EXPORT_SYMBOL vmlinux 0xfce167d1	writeback_inodes_sb
+EXPORT_SYMBOL vmlinux 0xfcec0987	enable_irq
+EXPORT_SYMBOL vmlinux 0xfcfa03ff	fb_videomode_to_modelist
+EXPORT_SYMBOL vmlinux 0xfd0ae178	phy_register_fixup
+EXPORT_SYMBOL vmlinux 0xfd209492	udplite_prot
+EXPORT_SYMBOL vmlinux 0xfd4b6ccb	thermal_cooling_device_unregister
+EXPORT_SYMBOL vmlinux 0xfd530a02	pci_select_bars
+EXPORT_SYMBOL vmlinux 0xfd56da89	pcim_iomap
+EXPORT_SYMBOL vmlinux 0xfd6f4850	native_wrmsr_safe_regs
+EXPORT_SYMBOL vmlinux 0xfd76a5c2	sock_kmalloc
+EXPORT_SYMBOL vmlinux 0xfd7d7713	acpi_exception
+EXPORT_SYMBOL vmlinux 0xfda85a7d	request_threaded_irq
+EXPORT_SYMBOL vmlinux 0xfdb28664	scsi_set_medium_removal
+EXPORT_SYMBOL vmlinux 0xfdb9b629	ioread32be
+EXPORT_SYMBOL vmlinux 0xfdc0dbf3	xfrm_policy_insert
+EXPORT_SYMBOL vmlinux 0xfdc492ad	get_user_pages
+EXPORT_SYMBOL vmlinux 0xfdd3fdee	generic_file_mmap
+EXPORT_SYMBOL vmlinux 0xfde2f06d	netdev_bonding_change
+EXPORT_SYMBOL vmlinux 0xfde8b1a1	setup_new_exec
+EXPORT_SYMBOL vmlinux 0xfdf2c006	jbd2_journal_get_create_access
+EXPORT_SYMBOL vmlinux 0xfdfc0b3b	fiemap_fill_next_extent
+EXPORT_SYMBOL vmlinux 0xfe00aa53	iget_failed
+EXPORT_SYMBOL vmlinux 0xfe5d4bb2	sys_tz
+EXPORT_SYMBOL vmlinux 0xfe640f7f	inet_add_protocol
+EXPORT_SYMBOL vmlinux 0xfe686114	read_dev_sector
+EXPORT_SYMBOL vmlinux 0xfe769456	unregister_netdevice_notifier
+EXPORT_SYMBOL vmlinux 0xfe79d253	alloc_mdio_bitbang
+EXPORT_SYMBOL vmlinux 0xfe7c4287	nr_cpu_ids
+EXPORT_SYMBOL vmlinux 0xfe8b8a7f	alloc_netdev_mq
+EXPORT_SYMBOL vmlinux 0xfea294d2	jbd2_journal_lock_updates
+EXPORT_SYMBOL vmlinux 0xfec3c2f2	bcd2bin
+EXPORT_SYMBOL vmlinux 0xfedd35fc	console_suspend_enabled
+EXPORT_SYMBOL vmlinux 0xfef96e23	__scsi_print_command
+EXPORT_SYMBOL vmlinux 0xff1e9dd8	seq_list_start
+EXPORT_SYMBOL vmlinux 0xff2c3f47	misc_deregister
+EXPORT_SYMBOL vmlinux 0xff41a3a1	inode_permission
+EXPORT_SYMBOL vmlinux 0xff480992	dump_fpu
+EXPORT_SYMBOL vmlinux 0xff48ef0b	filemap_fdatawait
+EXPORT_SYMBOL vmlinux 0xff6878cf	fb_default_cmap
+EXPORT_SYMBOL vmlinux 0xff698037	invalidate_partition
+EXPORT_SYMBOL vmlinux 0xff708fd3	mempool_destroy
+EXPORT_SYMBOL vmlinux 0xff964b25	param_set_int
+EXPORT_SYMBOL vmlinux 0xff9ca065	fb_edid_to_monspecs
+EXPORT_SYMBOL vmlinux 0xffb9e153	create_empty_buffers
+EXPORT_SYMBOL vmlinux 0xffc7c184	__init_waitqueue_head
+EXPORT_SYMBOL vmlinux 0xffccdf1e	__inet6_lookup_established
+EXPORT_SYMBOL vmlinux 0xffd5a395	default_wake_function
+EXPORT_SYMBOL vmlinux 0xffdb82bc	sg_free_table
+EXPORT_SYMBOL vmlinux 0xfffa77d8	backlight_force_update
+EXPORT_SYMBOL vmlinux 0xfffeefc1	__mutex_init
+EXPORT_SYMBOL_GPL arch/x86/crypto/aes-i586 0x7060bf0a	crypto_aes_encrypt_x86
+EXPORT_SYMBOL_GPL arch/x86/crypto/aes-i586 0xe409b491	crypto_aes_decrypt_x86
+EXPORT_SYMBOL_GPL arch/x86/kernel/microcode 0xdf66ca81	ucode_cpu_info
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x00aaf935	kvm_disable_tdp
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x094ac8f4	kvm_get_pfn
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x09e3edde	kvm_is_visible_gfn
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1118bdfb	kvm_resched
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x123966cc	kvm_queue_exception_e
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x12d1b23b	kvm_release_pfn_clean
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x17742e9d	kvm_get_kvm
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1a9df35f	__tracepoint_kvm_msr
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x1e4580bb	kvm_release_pfn_dirty
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x20de5193	kvm_disable_largepages
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x22d4d941	kvm_x86_ops
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x2322e039	kvm_set_pfn_accessed
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x27046576	kvm_exit
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x290c6e54	kvm_get_cs_db_l_bits
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x2c5c34ae	kvm_emulate_hypercall
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x317f9e6b	kvm_enable_efer_bits
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x32e17c92	gfn_to_hva
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x36768b6c	load_pdptrs
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x36da94aa	kvm_clear_guest
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x3956dcc4	kvm_vcpu_cache
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x3b7706d2	__tracepoint_kvm_exit
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x3c2cae53	kvm_set_memory_region
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x3f690fec	kvm_read_guest_page
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x47f8c16c	kvm_put_guest_fpu
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x4a0e0937	emulate_instruction
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x4a7cbe69	is_error_pfn
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x4df8a709	kvm_mmu_get_spte_hierarchy
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x4f433117	kvm_init
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x50117c53	gfn_to_page
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x5021775c	fx_init
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x51bc453b	kvm_mmu_load
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x599086dd	kvm_handle_fault_on_reboot
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x60b410d1	kvm_get_apic_base
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x68e670d2	__kvm_set_memory_region
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x76f3d130	kvm_require_cpl
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x7b8e403a	kvm_inject_nmi
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x7dfa52ef	kvm_emulate_pio_string
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x876b1723	kvm_inject_pending_timer_irqs
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8a567ccb	kvm_set_cr3
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8c254998	gfn_to_pfn
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8ce4f3ab	kvm_enable_tdp
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x8e7f9b47	segment_base
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x908402e7	kvm_clear_guest_page
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x99b30b15	kvm_emulate_halt
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x9a76ba5e	kvm_vcpu_init
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0x9c96ad24	kvm_task_switch
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa3114bc3	gfn_to_memslot_unaliased
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa361bc65	kvm_set_pfn_dirty
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xa9389345	kvm_release_page_clean
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xab964c05	kvm_emulate_cpuid
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xb2ab4f15	kvm_mmu_invlpg
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbaf47f21	kvm_set_apic_base
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbc314ac4	emulator_write_emulated
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbd377dc9	kvm_mmu_set_nonpresent_ptes
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbd94103b	kvm_mmu_set_base_ptes
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xbf2099f4	kvm_get_msr_common
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xc054fa12	kvm_mmu_reset_context
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xc647af61	kvm_set_msr_common
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xcc5a8a8a	kvm_cpu_has_interrupt
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xcc63535d	kvm_report_emulation_failure
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xcc9839eb	kvm_release_page_dirty
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xce38adbc	kvm_cpu_get_interrupt
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xcea5bf57	__tracepoint_kvm_page_fault
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd03670fe	is_error_page
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd0b2727a	kvm_mmu_set_mask_ptes
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd296def9	kvm_is_error_hva
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd3c0a6da	__tracepoint_kvm_inj_virq
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd435bbe9	kvm_mmu_page_fault
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd8b7136b	kvm_queue_exception
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xd9729b0f	kvm_read_guest
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xda3bf69b	kvm_mmu_unprotect_page_virt
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xdbe0eed3	kvm_vcpu_on_spin
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xdead7e81	__tracepoint_kvm_cr
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xdef1e71c	kvm_put_kvm
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xe4de1ed1	kvm_get_guest_memory_type
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xe500cb1d	kvm_get_cr8
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xe894dc4f	kvm_set_cr8
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xecef6892	kvm_set_page_dirty
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xee8c84f9	kvm_vcpu_uninit
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xf0ebd8f5	kvm_write_guest_page
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xf1fba18c	kvm_load_guest_fpu
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xf3150126	kvm_set_cr4
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xf87eb5a3	kvm_emulate_pio
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xfa6a4a01	kvm_set_cr0
+EXPORT_SYMBOL_GPL arch/x86/kvm/kvm 0xfcaab400	kvm_lmsw
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x0cc1e40f	crypto_it_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x24aac4d9	crypto_aes_expand_key
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x3dc916b6	crypto_fl_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x40d46b21	crypto_ft_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x67502576	crypto_aes_set_key
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x71dc9998	crypto_il_tab
+EXPORT_SYMBOL_GPL crypto/async_tx/async_memcpy 0x81b76e3e	async_memcpy
+EXPORT_SYMBOL_GPL crypto/async_tx/async_pq 0x08868b82	async_syndrome_val
+EXPORT_SYMBOL_GPL crypto/async_tx/async_pq 0x6c681813	async_gen_syndrome
+EXPORT_SYMBOL_GPL crypto/async_tx/async_raid6_recov 0x78909090	async_raid6_2data_recov
+EXPORT_SYMBOL_GPL crypto/async_tx/async_raid6_recov 0xd2242364	async_raid6_datap_recov
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x040f3be3	async_tx_quiesce
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x58b8eb95	__async_tx_find_channel
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x90c79863	async_tx_submit
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0xcf4443fc	async_trigger_callback
+EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0x5c453a11	async_xor_val
+EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0xfab85e36	async_xor
+EXPORT_SYMBOL_GPL crypto/cryptd 0x65f867a4	cryptd_free_ahash
+EXPORT_SYMBOL_GPL crypto/cryptd 0x6b6f0e4c	cryptd_alloc_ahash
+EXPORT_SYMBOL_GPL crypto/cryptd 0x78e21307	cryptd_alloc_ablkcipher
+EXPORT_SYMBOL_GPL crypto/cryptd 0x7d907e23	cryptd_free_ablkcipher
+EXPORT_SYMBOL_GPL crypto/cryptd 0x99fb5726	cryptd_ablkcipher_child
+EXPORT_SYMBOL_GPL crypto/cryptd 0xcac17698	cryptd_shash_desc
+EXPORT_SYMBOL_GPL crypto/cryptd 0xd34948e6	cryptd_ahash_child
+EXPORT_SYMBOL_GPL crypto/des_generic 0xcfd9a2c0	des_ekey
+EXPORT_SYMBOL_GPL crypto/twofish_common 0x13ee602f	twofish_setkey
+EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x02ff9464	cfag12864b_isinited
+EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x0ecb2e5d	cfag12864b_disable
+EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x305dc3c6	cfag12864b_isenabled
+EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x3389f926	cfag12864b_enable
+EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0x9522a342	cfag12864b_getrate
+EXPORT_SYMBOL_GPL drivers/auxdisplay/cfag12864b 0xc48e9d95	cfag12864b_buffer
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x14102f23	ks0108_displaystate
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x48a70518	ks0108_writedata
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x4f506333	ks0108_startline
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x6edae968	ks0108_isinited
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xbf4774db	ks0108_writecontrol
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xedde6df2	ks0108_page
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xfee8ef7b	ks0108_address
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0x01ff7074	btmrvl_check_evtpkt
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0x13bcc722	btmrvl_add_card
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0x729ff91c	btmrvl_send_module_cfg_cmd
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0xa5e47100	btmrvl_interrupt
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0xb8ebf874	btmrvl_remove_card
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0xc5c4972f	btmrvl_process_event
+EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0x0c268b5c	agp_add_bridge
+EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0xd6feefa5	agp_num_entries
+EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0xdf1059e8	agp_remove_bridge
+EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0xe089cfcc	agp_memory_reserved
+EXPORT_SYMBOL_GPL drivers/char/scx200_gpio 0x24a2a743	scx200_gpio_ops
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x068607cf	tpm_calc_ordinal_duration
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x079a3b33	tpm_show_active
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x0b70a573	tpm_pm_suspend
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x1043e50f	tpm_read
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x138c8006	tpm_show_caps_1_2
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x35c64e3a	tpm_show_caps
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x3f585c7b	tpm_show_pcrs
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x5edd7f17	tpm_show_temp_deactivated
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x62512611	tpm_store_cancel
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x64e11fab	tpm_release
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x6677bfa3	tpm_get_timeouts
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x691ecbdd	tpm_show_enabled
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x7ab81f97	tpm_pm_resume
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x7ad058c6	tpm_show_owned
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x7e1b87c0	tpm_remove_hardware
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x95039abb	tpm_write
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x955c7769	tpm_show_timeouts
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x9903387e	tpm_open
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xa8f9243d	tpm_show_pubek
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xadf6aa4d	tpm_pcr_read
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xbaae64f8	tpm_register_hardware
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xc37226a5	tpm_pcr_extend
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xca929245	tpm_dev_vendor_release
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xdbafc7e8	tpm_gen_interrupt
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xdc1f6675	tpm_dev_release
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xdcb1545c	tpm_continue_selftest
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm_bios 0x5e8bee5a	tpm_bios_log_teardown
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm_bios 0x68bbb46b	tpm_bios_log_setup
+EXPORT_SYMBOL_GPL drivers/dca/dca 0x0e2d7723	register_dca_provider
+EXPORT_SYMBOL_GPL drivers/dca/dca 0x2e471f01	dca_register_notify
+EXPORT_SYMBOL_GPL drivers/dca/dca 0x31a2c8df	dca_get_tag
+EXPORT_SYMBOL_GPL drivers/dca/dca 0x62bf850c	free_dca_provider
+EXPORT_SYMBOL_GPL drivers/dca/dca 0x6456b131	dca3_get_tag
+EXPORT_SYMBOL_GPL drivers/dca/dca 0x8006c614	dca_unregister_notify
+EXPORT_SYMBOL_GPL drivers/dca/dca 0xbfc94adb	dca_add_requester
+EXPORT_SYMBOL_GPL drivers/dca/dca 0xd30e7c55	alloc_dca_provider
+EXPORT_SYMBOL_GPL drivers/dca/dca 0xf64d8d24	dca_remove_requester
+EXPORT_SYMBOL_GPL drivers/dca/dca 0xf92f96b5	unregister_dca_provider
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x033b2561	edac_pci_reset_delay_period
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x0c32ff8a	edac_pci_alloc_index
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x1e0da331	edac_device_add_device
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x26b53fbf	edac_mc_free
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x34dcb937	edac_pci_alloc_ctl_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x4ba27101	edac_pci_del_device
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x5c0fb7a4	edac_mc_handle_ce_no_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x5d25e082	edac_mc_handle_ue_no_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x6e3ff83a	edac_device_alloc_index
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x6ffc3608	edac_pci_handle_npe
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x851ff1b1	edac_pci_create_generic_ctl
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x88ae2103	edac_mc_find_csrow_by_page
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x8f535229	edac_mc_handle_ue
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x9a6132b8	edac_mc_del_mc
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x9aa62ad0	edac_device_handle_ue
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0x9f4b0640	edac_mc_alloc
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xae1e2599	edac_pci_add_device
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xafe689db	edac_device_alloc_ctl_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xb1987ef4	edac_device_handle_ce
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xb21cf749	edac_pci_release_generic_ctl
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xb8e2fe17	edac_device_free_ctl_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xc6c40965	edac_pci_free_ctl_info
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xd3ecbb6b	edac_mc_handle_ce
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xd71c6ca5	edac_pci_handle_pe
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xe9220e1d	edac_device_del_device
+EXPORT_SYMBOL_GPL drivers/edac/edac_core 0xf8950273	edac_mc_add_mc
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0x0f0ba55e	ii_msgs
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0x14878009	amd_report_gart_errors
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0x1823885a	amd_register_ecc_decoder
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0x4b01887d	pp_msgs
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0x7509830f	to_msgs
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0x955c1f76	amd_decode_nb_mce
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0xb98537cb	rrrr_msgs
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0xc2e765d2	amd_unregister_ecc_decoder
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0xd0f094a0	ext_msgs
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0xe6ff7e0c	ll_msgs
+EXPORT_SYMBOL_GPL drivers/edac/edac_mce_amd 0xf8dec080	tt_msgs
+EXPORT_SYMBOL_GPL drivers/gpu/drm/drm 0x956b049a	drm_class_device_unregister
+EXPORT_SYMBOL_GPL drivers/gpu/drm/drm 0xf662cd6b	drm_class_device_register
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x05495392	hid_debug
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x1966176c	hid_unregister_driver
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x2001b7d7	hid_parse_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x29c16a89	hid_add_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x30b293f9	hid_check_keys_pressed
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x4b052248	hid_debug_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x5bfb1142	hid_dump_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x5d9f5a67	hidinput_find_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x71a43137	hid_dump_input
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x7ac05194	hid_destroy_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x7e9ce2a2	hidraw_report_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x7f846786	hidraw_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x8eef6fdd	hidinput_report_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xa32ef158	hidinput_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xada23b03	__hid_register_driver
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xaeb8cf39	hid_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xbc0ad5b9	hid_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xd107f6f5	hid_output_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xd888ebf1	hid_report_raw_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xe29e12d5	hid_allocate_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xe374b104	hidraw_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xe9dffd29	hid_dump_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xf445ce21	hid_input_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xf8d695aa	hid_set_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xfaa9c167	hid_resolv_usage
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xfc0e645f	hidinput_connect
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x01fd453e	usbhid_lookup_quirk
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x3982df49	hiddev_hid_event
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x632bb5f9	usbhid_set_leds
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x946bb654	usbhid_submit_report
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x01dd2757	lis3lv02d_remove_fs
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x4993b9d4	lis3lv02d_poweron
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x51a48faf	lis3lv02d_poweroff
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x6c33e494	lis3lv02d_joystick_disable
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xd2a44296	lis3lv02d_init_device
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xd512c57b	lis3_dev
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xe6af28c8	lis3lv02d_joystick_enable
+EXPORT_SYMBOL_GPL drivers/i2c/busses/i2c-nforce2 0xc75ceb91	nforce2_smbus
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0xb3cb2980	hpsb_config_rom_ip1394_remove
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0xb8e0229a	hpsb_config_rom_ip1394_add
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0xec8d18cf	hpsb_disable_irm
+EXPORT_SYMBOL_GPL drivers/input/ff-memless 0x175ad33d	input_ff_create_memless
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x35c01582	wm97xx_get_gpio
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x525481ee	wm97xx_register_mach_ops
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x5cbd3a45	wm97xx_config_gpio
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x68a30e09	wm9713_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x764005c8	wm97xx_reg_read
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x879706c4	wm97xx_read_aux_adc
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x9edecdc7	wm97xx_unregister_mach_ops
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xa4090e97	wm9712_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xb3ffb281	wm97xx_set_gpio
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xb9b713cd	wm9705_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xbe27fe10	wm97xx_reg_write
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xe18af8fc	wm97xx_set_suspend_mode
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x2c16cf62	gigaset_skb_sent
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x2fd6def8	gigaset_start
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x37fd87a8	gigaset_add_event
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x454aa44f	gigaset_debuglevel
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x4e792275	gigaset_dbg_buffer
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x5b33d91a	gigaset_handle_modem_response
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x6921ce6a	gigaset_if_receive
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0x9fcce596	gigaset_initcs
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xa08ff160	gigaset_m10x_send_skb
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xa9dd0e3e	gigaset_freedriver
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xb283a074	gigaset_initdriver
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xb99e9a38	gigaset_shutdown
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xc32a6ba5	gigaset_freecs
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xd8643585	gigaset_stop
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xd959c08c	gigaset_m10x_input
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xdaf1a9de	gigaset_fill_inbuf
+EXPORT_SYMBOL_GPL drivers/isdn/gigaset/gigaset 0xf9f69d92	gigaset_blockdriver
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0x86d2618c	led_classdev_resume
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0xdcfd9303	led_classdev_suspend
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0xf258cf55	led_classdev_unregister
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0xf796213e	led_classdev_register
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0x05513b71	raid6_call
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0x0b8ef590	raid6_2data_recov
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0x4a48d81c	raid6_datap_recov
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x0349c9bd	ir_codes_proteus_2309_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x0366dcdf	ir_codes_videomate_s350_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x110b053a	ir_codes_pixelview_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x124cb753	ir_codes_encore_enltv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x183fdfdd	ir_codes_gotview7135_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x19b4d61c	ir_codes_nebula_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x19cd2826	ir_codes_behold_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x1a9009d6	ir_codes_dm1105_nec_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x1cb148f5	ir_extract_bits
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2456e513	ir_decode_pulsedistance
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2cc459b5	ir_codes_flydvb_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2d0e9a49	ir_codes_em_terratec_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3136d8ff	ir_codes_dntv_live_dvbt_pro_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x32b9033b	ir_codes_apac_viewcomp_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x379309cd	ir_input_init
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3909f4ad	ir_codes_terratec_cinergy_xs_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3a84be27	ir_codes_avermedia_a16d_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x4267d749	ir_codes_budget_ci_old_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x43c89ef4	ir_decode_biphase
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x4c1442c1	ir_codes_real_audio_220_32_keys_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x51ba1643	ir_codes_kworld_plus_tv_analog_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x543db4ff	ir_codes_avermedia_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x5e95da31	ir_codes_tt_1500_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x5fbe6515	ir_codes_pinnacle_color_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x61d039d7	ir_codes_behold_columbus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6427a3fb	ir_codes_pinnacle_grey_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x64b02fed	ir_codes_avermedia_dvbt_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6606596a	ir_rc5_timer_keyup
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6809de82	ir_codes_pctv_sedna_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6d6511e7	ir_dump_samples
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x703fc738	ir_codes_avertv_303_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x7283f81d	ir_codes_purpletv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x72c2992e	ir_codes_powercolor_real_angel_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x76d71b8e	ir_codes_dntv_live_dvb_t_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x784e176d	ir_codes_asus_pc39_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x828b3ce5	ir_codes_encore_enltv_fm53_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x8acae3dd	ir_codes_pinnacle_pctv_hd_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x92d1d181	ir_codes_flyvideo_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x94651dab	ir_codes_ati_tv_wonder_hd_600_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x95eb8195	ir_input_keydown
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x97c35dab	ir_codes_msi_tvanywhere_plus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x9944e2e5	ir_codes_hauppauge_new_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xa69aa6ad	ir_codes_pv951_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xa95157c5	ir_codes_cinergy_1400_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xac15f6c8	ir_codes_kaiomy_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xaff22e87	ir_codes_pixelview_new_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb01a1998	ir_codes_manli_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb0a8ef38	ir_codes_rc5_tv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb57445f7	ir_codes_eztv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb5adb754	ir_codes_cinergy_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xbd3ce6f0	ir_codes_avermedia_cardbus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xbeaccbdc	ir_codes_gadmei_rm008z_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xcba36c62	ir_codes_videomate_tv_pvr_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xd30c491f	ir_codes_norwood_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xd8161baf	ir_input_nokey
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xdc23fec4	ir_codes_fusionhdtv_mce_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xdd4c0a07	ir_codes_evga_indtube_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xe1101f4d	ir_codes_avermedia_m135a_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xe4140c60	ir_codes_genius_tvgo_a11mce_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xeb9bb08f	ir_codes_npgtech_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xebf345b4	ir_codes_encore_enltv2_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xeec89db8	ir_codes_empty_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xef29c40d	ir_codes_adstech_dvb_t_pci_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf33c155d	ir_codes_msi_tvanywhere_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf3d619ec	ir_codes_iodata_bctv7e_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf4f7a4d6	ir_rc5_timer_end
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf5e15e65	ir_codes_winfast_table
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x35cc5fa7	saa7146_unregister_extension
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x3675714b	saa7146_pgtable_free
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x3da1b306	saa7146_vmalloc_build_pgtable
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x469e7e50	saa7146_pgtable_build_single
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x5507d57f	saa7146_pgtable_alloc
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x6e0aec3c	saa7146_wait_for_debi_done
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x7ef04962	saa7146_register_extension
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x8533a510	saa7146_vfree_destroy_pgtable
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x8e4f26ed	saa7146_setgpio
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xb26898e3	saa7146_devices_lock
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xcf683cf2	saa7146_devices
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xe3cd9b5c	saa7146_debug
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xe6d448eb	saa7146_i2c_adapter_prepare
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x10e5e285	saa7146_register_device
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x2fd2f391	saa7146_unregister_device
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x50f6dcff	saa7146_set_hps_source_and_sync
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x76309255	saa7146_vv_init
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x809ad371	saa7146_stop_preview
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xd5745659	saa7146_vv_release
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xf7ef857f	saa7146_start_preview
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/mt20xx 0xaede4d19	microtune_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/mxl5007t 0x1bbb3e81	mxl5007t_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda18271 0xda22049b	tda18271_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda827x 0x418e4ccf	tda827x_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda8290 0x65f763c1	tda829x_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda8290 0xdeacac9b	tda829x_probe
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda9887 0xf51bc5e4	tda9887_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5761 0x4415ed33	tea5761_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5761 0x56dd438b	tea5761_autodetection
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5767 0x7e5d1399	tea5767_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5767 0x9be342c1	tea5767_autodetection
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tuner-simple 0x5e766c3c	simple_tuner_attach
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x092d3474	smscore_unregister_hotplug
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x0af8eb52	smscore_get_board_id
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x21e36bf2	smscore_registry_getmode
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x2e6c31c3	smscore_register_hotplug
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x37d91069	smsendian_handle_tx_message
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x45284ae9	smsendian_handle_rx_message
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x74ee9098	sms_board_load_modules
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x7c576277	smsendian_handle_message_header
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x972be2d4	sms_board_setup
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x9b032e45	sms_board_power
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x9fc83329	sms_board_led_feedback
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xa7dea8d6	smsclient_sendrequest
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xaf3ab12a	smscore_get_device_mode
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xb28df344	smscore_set_board_id
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xc1f65660	smscore_register_device
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xc27e0342	smscore_onresponse
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xd9ab9d09	sms_board_lna_control
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xe23d927d	smscore_register_client
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xe7cfcd6e	smscore_getbuffer
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xea4b8ba3	smscore_putbuffer
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xf2071c05	smscore_unregister_client
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xf22c1443	smscore_start_device
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xf7b524a5	sms_board_event
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xfa4aa275	smscore_unregister_device
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xfda878c5	sms_get_board
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x030be480	ttpci_budget_deinit
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x36858784	ttpci_budget_debiwrite
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x4f2b3756	ttpci_budget_irq10_handler
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x7948c222	budget_debug
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x9b6ef637	ttpci_budget_set_video_port
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0xafc010ca	ttpci_budget_debiread
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0xb4a32068	ttpci_budget_init
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0xefd1c32c	ttpci_budget_init_hooks
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x017ea7c7	cx231xx_tuner_callback
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x06c3f880	cx231xx_init_vbi_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x2f57ec12	cx231xx_capture_start
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x2ffc26bd	cx231xx_set_alt_setting
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x556f05c0	cx231xx_dev_uninit
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x59475280	cx231xx_uninit_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x685eadd2	cx231xx_send_gpio_cmd
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x6d5f8cc6	cx231xx_uninit_vbi_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x7f5875af	cx231xx_init_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x9400f924	cx231xx_send_usb_command
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xca2cf53c	cx231xx_dev_init
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xf11e7559	cx231xx_set_mode
+EXPORT_SYMBOL_GPL drivers/media/video/cx88/cx88xx 0x3ca7cc52	cx88_setup_xc3028
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x2d0557e4	em28xx_audio_setup
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x686a5070	em28xx_uninit_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x7c58197b	em28xx_audio_analog_set
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x7fc8652c	em28xx_tuner_callback
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0xe1e4d434	em28xx_isoc_dvb_max_packetsize
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0xf1149b39	em28xx_init_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0xfd490aef	em28xx_set_mode
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x39717f26	saa7134_s_std_internal
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x6395090c	saa7134_ts_qops
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0xaf3b751b	saa7134_queryctrl
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0xbb0daf8c	saa7134_g_ctrl_internal
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0xe9699318	saa7134_s_ctrl_internal
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x2c0d7923	v4l2_i2c_new_subdev_cfg
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x610419e9	v4l2_i2c_subdev_init
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xa489c4d1	v4l2_i2c_new_subdev_board
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xc848baca	v4l2_i2c_subdev_addr
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xf2a353ac	v4l2_i2c_tuner_addrs
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xf5ef842e	v4l_bound_align_image
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x0e5bb3c9	v4l2_int_ioctl_1
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x1fbf7b0a	v4l2_int_ioctl_0
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x32ac9481	v4l2_int_device_register
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xa5228b24	v4l2_int_device_try_attach_all
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xcce29c1c	v4l2_int_device_unregister
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x2d879df4	videobuf_read_start
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x2e8639fc	videobuf_mmap_mapper
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x46041411	videobuf_read_stop
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x474b0bd0	videobuf_iolock
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x4ba5a594	videobuf_queue_cancel
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x5a108b08	videobuf_queue_core_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x5ab5a86c	videobuf_streamon
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x7253728e	videobuf_qbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x7d560619	videobuf_alloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x84e66139	videobuf_mmap_free
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x8536278b	videobuf_queue_is_busy
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x862c4fa9	videobuf_queue_to_vmalloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x87ab4723	videobuf_dqbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x97f8249d	videobuf_waiton
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x99bb98cb	videobuf_reqbufs
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x9ac815b7	videobuf_read_one
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xa39bb1ca	videobuf_mmap_setup
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xb1e65d61	videobuf_streamoff
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xba3399a0	videobuf_cgmbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xbb4dd823	videobuf_stop
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xc1280834	videobuf_poll_stream
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xccc0151b	videobuf_next_field
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xce9c6d28	videobuf_querybuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xf0851dbf	__videobuf_mmap_setup
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xf44f2e3c	videobuf_read_stream
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x05179396	videobuf_dma_map
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x1de95ed2	videobuf_sg_dma_map
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x5c3ec92a	videobuf_sg_dma_unmap
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x662e94fe	videobuf_dma_init_kernel
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x6d926066	videobuf_dma_unmap
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x774f6b0e	videobuf_queue_sg_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x7833ac85	videobuf_dma_free
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xa825c75b	videobuf_sg_alloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xb1b914a3	videobuf_dma_init_user
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xbb5fec3b	videobuf_dma_sync
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xda168a1a	videobuf_dma_init_overlay
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xe0c9999e	videobuf_dma_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xe8a24336	videobuf_vmalloc_to_sg
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xff8b3b9e	videobuf_to_dma
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0x076a3578	videobuf_vmalloc_free
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0x910ac779	videobuf_queue_vmalloc_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0xa6148584	videobuf_to_vmalloc
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x54838b1c	v4l2_device_unregister_subdev
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x64006086	v4l2_device_register_subdev
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x9a2d5786	v4l2_device_disconnect
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x9c617a13	v4l2_device_set_name
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0xa5297263	v4l2_device_register
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0xb259f95b	v4l2_device_unregister
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x570de5a2	i2o_sg_tablesize
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x768d3f6d	i2o_pool_free
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x882ad5f7	i2o_dma_realloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xc24ede98	i2o_pool_alloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xd56a77c8	i2o_dma_map_sg
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xd956a25d	i2o_dma_alloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xe8b7ffbe	i2o_dma_map_single
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xeafd8798	i2o_dma_free
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x01155b36	mc13783_adc_set_ts_status
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x6c97dca5	mc13783_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x7fcf6efa	mc13783_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0xa1c6e8a7	mc13783_adc_do_conversion
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0xb6525bd6	mc13783_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0xcbbecda4	mc13783_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0xed5fe09f	mc13783_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-adc 0x4f6d8ae3	pcf50633_adc_sync_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-adc 0xf7f5b89a	pcf50633_adc_async_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x0cbf837a	pcf50633_irq_mask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x2f9161aa	pcf50633_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x3576b648	pcf50633_irq_unmask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x8d2b1b7b	pcf50633_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x911dd8b9	pcf50633_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x91266f5e	pcf50633_irq_mask_get
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xa3c426d0	pcf50633_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xd83da8c2	pcf50633_reg_clear_bits
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xd93be046	pcf50633_reg_set_bit_mask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xdc37b385	pcf50633_write_block
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xecfbfc74	pcf50633_read_block
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x5147a46c	pcf50633_gpio_invert_get
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x7c73a2bf	pcf50633_gpio_power_supply_set
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0xcee600a0	pcf50633_gpio_invert_set
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0xe79188fc	pcf50633_gpio_get
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0xfa72d092	pcf50633_gpio_set
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x35ea7154	sm501_unit_power
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x6f365c5e	sm501_find_clock
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x7b243a59	sm501_set_clock
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0xade66972	sm501_modify_reg
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0xf5c6a12f	sm501_misc_control
+EXPORT_SYMBOL_GPL drivers/mfd/ucb1400_core 0xf0813fa2	ucb1400_adc_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x11925c92	wm831x_reg_lock
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x271cd479	wm831x_disable_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x358e5c1b	wm831x_enable_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x5082a14d	wm831x_bulk_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x638e175b	wm831x_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x6ace681d	wm831x_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x751a3f43	wm831x_auxadc_read_uv
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x7dab26b6	wm831x_isinkv_values
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x8134a810	wm831x_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x85a675ed	wm831x_auxadc_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xaab3cf3b	wm831x_reg_unlock
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xf76be69d	wm831x_request_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xfaa916c9	wm831x_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x074d68fa	wm8350_unmask_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x0c0c55c8	wm8350_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x189d2b05	wm8350_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x21ac039b	wm8350_reg_unlock
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x4e4bf431	wm8350_device_init
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x535685a9	wm8350_clear_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x629e0a4f	wm8350_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x73a6aa1b	wm8350_block_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x8851aa2b	wm8350_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xb25825e5	wm8350_block_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xb46cbcd1	wm8350_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xd0784719	wm8350_mask_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xde1fec30	wm8350_gpio_config
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xdf251c10	wm8350_reg_lock
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xf10988c9	wm8350_device_exit
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xf9edf090	wm8350_read_auxadc
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x0b8c031c	wm8400_block_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x98ec0a4f	wm8400_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0xadfcc435	wm8400_reset_codec_reg_cache
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0xae558ab4	wm8400_reg_read
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x04f88bf1	cb710_sg_dwiter_write_next_block
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x75c5c2f2	cb710_pci_update_config_reg
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0xb2fd817e	cb710_sg_dwiter_read_next_block
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0xd4dd9615	cb710_set_irq_handler
+EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x2df115d4	eeprom_93cx6_multiread
+EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x63d14d2f	eeprom_93cx6_read
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x37ba2c32	enclosure_component_register
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x82f72eae	enclosure_find
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0xa6ac9afa	enclosure_add_device
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0xcc1afc0d	enclosure_register
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0xe217de0b	enclosure_unregister
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0xf01665be	enclosure_for_each_device
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0xf4cde7fb	enclosure_remove_device
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x3b30ae66	sdhci_suspend_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x5082f7a8	sdhci_free_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x92e00590	sdhci_add_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xa8961f34	sdhci_resume_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xca8569df	sdhci_alloc_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xe36cc3a1	sdhci_remove_host
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x1abfbac9	cfi_cmdset_0001
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x33a5416a	cfi_cmdset_0003
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x4ccfa99c	cfi_cmdset_0200
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0002 0xca90bf9b	cfi_cmdset_0002
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0020 0xac7cac91	cfi_cmdset_0020
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x40f50f04	cfi_qry_mode_off
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x5ef2fcbb	cfi_qry_mode_on
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0xefc3ddbf	cfi_qry_present
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2000 0x0d769336	DoC2k_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001 0x1ab97dcd	DoCMil_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001plus 0x75221dd6	DoCMilPlus_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/docecc 0x45937659	doc_decode_ecc
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x0339977b	parse_mtd_partitions
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x13815e53	unregister_mtd_user
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x28c6d23b	get_sb_mtd
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x28dfba13	deregister_mtd_parser
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x2edbe50c	register_mtd_user
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x39fd087a	mtd_table
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x720fec65	kill_mtd_super
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x80b1e7ea	del_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x913cf58b	mtd_table_mutex
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x94eb2c51	mtd_erase_callback
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xa2dc2810	default_mtd_writev
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xa72f3f8f	get_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xc10933c9	add_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xd82c0b35	get_mtd_device_nm
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xeba7752a	register_mtd_parser
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xee491158	put_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x32eaf0da	add_mtd_blktrans_dev
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x4aaef4ce	del_mtd_blktrans_dev
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x90afe0f8	deregister_mtd_blktrans
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0xa1facf1f	register_mtd_blktrans
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x1e40e873	nand_scan_ident
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x224b8003	nand_scan_tail
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x2b93b78a	nand_release
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xc2ec5adc	nand_wait_ready
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xeb61c3a5	nand_scan
+EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0x0ef2413d	onenand_release
+EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0x4cce0910	onenand_scan
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x01bb7d21	ubi_leb_write
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x25afefa3	ubi_do_get_device_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x37800435	ubi_get_volume_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x42801d20	ubi_sync
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x48350e7c	ubi_leb_erase
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x5a51cad6	ubi_open_volume_nm
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x5af4d7c2	ubi_leb_map
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x6f09ba8a	ubi_register_volume_notifier
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x76c42229	ubi_leb_read
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x9ad6627f	ubi_leb_change
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xbc505df4	ubi_get_device_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xbfb9e874	ubi_close_volume
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xcec86807	ubi_is_mapped
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xd2a108bb	ubi_open_volume
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xd7a5a881	ubi_leb_unmap
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xfd6f0ef9	ubi_unregister_volume_notifier
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x22418bfc	alloc_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x322fbfe4	can_bus_off
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x34246748	can_free_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x51a5b119	open_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x7bbbdc9f	register_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x7dd18a85	close_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x9826dc9e	free_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xa40a4762	unregister_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xc8c4a956	can_put_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xff8c5544	can_get_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x1f4c3f6b	unregister_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x4f4829b4	alloc_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x5e3dc1c0	free_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xbfcff021	register_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xdc9bd500	sja1000_interrupt
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x04780409	mlx4_srq_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x08d6fa8e	mlx4_uar_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x098820fa	mlx4_qp_to_ready
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x0bdfbce9	mlx4_qp_modify
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x0c6d8dc5	mlx4_uar_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x0f3827de	mlx4_srq_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x158c37a7	mlx4_fmr_enable
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x172a739e	mlx4_alloc_hwq_res
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x20c5a396	mlx4_register_interface
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x291e85aa	mlx4_multicast_detach
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x33c819fb	mlx4_alloc_cmd_mailbox
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x355399eb	mlx4_register_vlan
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x35b9a120	mlx4_CLOSE_PORT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x3ff1a0ca	mlx4_unregister_mac
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x40fd0424	mlx4_mtt_init
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x464cbbef	mlx4_mtt_cleanup
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x477db9b2	mlx4_buf_write_mtt
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x53e6ce98	mlx4_buf_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x5a7814e8	mlx4_fmr_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x5c7f78fb	mlx4_srq_query
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x5fffe3a4	mlx4_cq_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x67269af5	mlx4_db_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x74b63f88	mlx4_unregister_vlan
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x7cb1466a	mlx4_qp_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x8557d950	mlx4_INIT_PORT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x8785e6d8	mlx4_fmr_unmap
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x87f06555	mlx4_qp_query
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x8ab63189	mlx4_cq_resize
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x8ea68f1d	mlx4_qp_remove
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x973b1120	mlx4_qp_reserve_range
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9e5f9f0a	mlx4_SYNC_TPT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9fe08831	mlx4_mtt_addr
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa4922591	mlx4_mr_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa86fcf09	mlx4_pd_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xae8a65f3	mlx4_free_hwq_res
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xafcd90f6	mlx4_unregister_interface
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb0858150	mlx4_srq_arm
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb3ec904a	mlx4_multicast_attach
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb7e476b2	mlx4_register_mac
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xba20f47c	mlx4_mr_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xbdaf0f5d	mlx4_map_phys_fmr
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc26d383f	mlx4_qp_release_range
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc5a80add	mlx4_cq_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc69bd10b	mlx4_write_mtt
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xcb47c79d	mlx4_mr_enable
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xccce3017	mlx4_qp_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd32a82eb	mlx4_db_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd6770147	mlx4_fmr_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd8b4d384	__mlx4_cmd
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe5176d81	mlx4_buf_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe76bc72a	mlx4_cq_modify
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xed9ebfb6	mlx4_free_cmd_mailbox
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xfe9c3d9e	mlx4_pd_alloc
+EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0x026a8fc1	usbnet_generic_cdc_bind
+EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0xa968b3a4	usbnet_cdc_unbind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x1a5f1ae3	rndis_status
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x2dc36244	rndis_rx_fixup
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x45a8e848	rndis_command
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x8d5fc32b	generic_rndis_bind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xc5284994	rndis_unbind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xd3196b03	rndis_tx_fixup
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x0594219e	usbnet_start_xmit
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x0c3b0279	usbnet_get_ethernet_addr
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x1ca7c9a9	usbnet_pause_rx
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x24eae9fd	usbnet_purge_paused_rxq
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x255cc540	usbnet_get_settings
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x3c47011e	usbnet_skb_return
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x41caff37	usbnet_tx_timeout
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x4517f3f2	usbnet_probe
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x45d16d20	usbnet_get_link
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x6b55a0f1	usbnet_open
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x723a3f25	usbnet_unlink_rx_urbs
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x83d5bb13	usbnet_resume_rx
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x84d49c05	usbnet_nway_reset
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x8a193ce3	usbnet_get_msglevel
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x9b001728	usbnet_disconnect
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x9b48074a	usbnet_set_settings
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x9d337b31	usbnet_change_mtu
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xb93690c5	usbnet_get_endpoints
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xbbf8c5ac	usbnet_get_drvinfo
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xc9c6784c	usbnet_set_msglevel
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xca207edc	usbnet_defer_kevent
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xce4c3642	usbnet_suspend
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xe0d18f5c	usbnet_resume
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xf80327f4	usbnet_stop
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x56943445	i2400m_tx_msg_get
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x5a8d4259	i2400m_queue_work
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x5fb6e1a8	i2400m_setup
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x6456b104	i2400m_cmd_enter_powersave
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x706887a6	i2400m_dev_reset_handle
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x809da256	i2400m_tx
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xa5081ebb	i2400m_cmd_get_state
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xb00b793c	i2400m_bm_cmd_prepare
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xc097479d	i2400m_rx
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xc6ad7bf7	i2400m_tx_msg_sent
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xcb39023d	i2400m_release
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xd16348fe	i2400m_set_init_config
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xd1e6ed3a	i2400m_dev_bootstrap
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xd29149ff	i2400m_netdev_setup
+EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0x1c820b19	libipw_debug_level
+EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0xa836b4aa	libipw_rx_any
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x16c0b43c	lbs_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x2e2eb9c9	lbs_notify_command_response
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x316d7391	lbs_add_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x336f03cf	__lbs_cmd
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x470ad047	lbs_process_rxed_packet
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x4bec2b5d	lbs_queue_event
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x5420f271	lbs_host_to_card_done
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x650f9bc3	lbs_stop_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x859a3ad7	lbs_send_tx_feedback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x8f1f6e10	lbs_remove_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x9887c982	lbs_start_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xa0b7fac9	lbs_cmd_copyback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xbefbe1e2	lbs_cmd_802_11_rate_adapt_rateset
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xc25c72cf	lbs_host_sleep_cfg
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xe4efdb06	lbs_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf64277de	lbs_debug
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x09d5f278	lbtf_send_tx_feedback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x2b21733d	lbtf_cmd_response_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x325115ee	lbtf_bcn_sent
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x397eb33c	__lbtf_cmd
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x66ec8e00	lbtf_cmd_copyback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xaa6c3ec6	lbtf_add_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xedb6364a	lbtf_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xf571d2a7	lbtf_remove_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0x082ffe41	if_usb_reset_device
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0xb943e532	if_usb_prog_firmware
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x01742420	p54_init_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x1b695e7e	p54_parse_firmware
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x1f774963	p54_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x3ee9a16f	p54_parse_eeprom
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x4a042c9f	p54_read_eeprom
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x5b99d7ea	p54_free_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x71a65007	p54_register_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xd7d0651b	p54_free_skb
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xe5e24c49	p54_unregister_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x0119c652	rt2x00lib_txdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x060a88bc	rt2x00queue_get_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x0906df7b	rt2x00mac_conf_tx
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x131e96f4	rt2x00mac_configure_filter
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x1ef36bc1	rt2x00mac_config
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x1ff19bf0	rt2x00lib_beacondone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x21d713ad	rt2x00mac_stop
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x31992646	rt2x00mac_rfkill_poll
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x3e11906b	rt2x00mac_set_tim
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x4ead0a53	rt2x00queue_get_entry
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x50676b96	rt2x00mac_bss_info_changed
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x8c74470a	rt2x00mac_add_interface
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x96761554	rt2x00mac_remove_interface
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xad52cf5b	rt2x00lib_probe_dev
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xad66722e	rt2x00lib_remove_dev
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xbc86486d	rt2x00lib_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xbf4d8dd7	rt2x00queue_map_txskb
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xc2378776	rt2x00mac_set_key
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xda7f142f	rt2x00lib_rxdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xe28e5b7d	rt2x00mac_get_stats
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xe7b442e8	rt2x00mac_tx
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xf1894aad	rt2x00lib_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xf592c327	rt2x00mac_get_tx_stats
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xf7f2c387	rt2x00mac_start
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x081fada4	rt2x00pci_probe
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x11ff7ab0	rt2x00pci_regbusy_read
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x2365021b	rt2x00pci_rxdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x3a7c901f	rt2x00pci_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x72e51340	rt2x00pci_initialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xc9edf4ec	rt2x00pci_uninitialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xd5065306	rt2x00pci_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xd9999bc1	rt2x00pci_remove
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xfa6467b2	rt2x00pci_write_tx_data
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x22f5b3f3	rt2x00usb_probe
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x3259b548	rt2x00usb_disconnect
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x3895bc9c	rt2x00usb_disable_radio
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x3b613631	rt2x00usb_uninitialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x3c90c392	rt2x00usb_kick_tx_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x491831d7	rt2x00usb_vendor_req_buff_lock
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x7245d47a	rt2x00usb_write_tx_data
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x7711473a	rt2x00usb_kill_tx_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x83d687f7	rt2x00usb_vendor_request_large_buff
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x8eea11ed	rt2x00usb_regbusy_read
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x9af92b34	rt2x00usb_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xb5b96a0f	rt2x00usb_initialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xb6b6f380	rt2x00usb_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xd836ee98	rt2x00usb_vendor_request_buff
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xdb52313e	rt2x00usb_vendor_request
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xf1905d2a	rt2x00usb_clear_entry
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0x34f3d500	wl1251_alloc_hw
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0x76330053	wl1251_init_ieee80211
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0xb00acca6	wl1251_free_hw
+EXPORT_SYMBOL_GPL drivers/pci/hotplug/acpiphp 0x0d1f0187	acpiphp_unregister_attention
+EXPORT_SYMBOL_GPL drivers/pci/hotplug/acpiphp 0x896fcea6	acpiphp_register_attention
+EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0x2745b237	pcf50633_mbc_get_status
+EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0x4bdadbfb	pcf50633_mbc_usb_curlim_set
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x35498332	wm8350_register_led
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x73ec6635	wm8350_dcdc_set_slot
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x749c7fda	wm8350_register_regulator
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x87b3d37b	wm8350_dcdc25_set_mode
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xa03bd5af	wm8350_ldo_set_slot
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xea4be394	wm8350_isink_set_flash
+EXPORT_SYMBOL_GPL drivers/regulator/wm8400-regulator 0xb486227d	wm8400_register_regulator
+EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x374c1e1c	fcoe_wwn_from_mac
+EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x64803964	fcoe_libfc_config
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0198586e	iscsi_session_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x01f4c2f9	iscsi_itt_to_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0233f349	iscsi_pool_init
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0efe52df	iscsi_conn_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x1a0a977a	iscsi_verify_itt
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x1ebedb5e	iscsi_conn_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x1f1fc604	iscsi_session_recovery_timedout
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x21399ccb	iscsi_eh_device_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x251d6c4e	iscsi_prep_data_out_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x26907ba6	iscsi_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x2a66a95f	iscsi_host_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x2e25390a	iscsi_host_set_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x2e4f80bf	iscsi_suspend_queue
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x408f84d0	iscsi_set_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x41ba1d14	iscsi_pool_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x42637e1c	iscsi_eh_target_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x55666ae3	__iscsi_complete_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x60dd4c33	iscsi_update_cmdsn
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x651465c6	iscsi_host_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x72d46caa	iscsi_suspend_tx
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x7668101b	iscsi_put_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x790f601a	iscsi_conn_stop
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x80075942	iscsi_conn_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x804898b2	iscsi_host_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x877b106a	iscsi_conn_bind
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x950fa13c	iscsi_host_add
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x9a4e79d9	iscsi_conn_failure
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xa7ba3fa0	iscsi_conn_start
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb41f4d07	iscsi_eh_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb7948630	iscsi_queuecommand
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xbbfcf12a	iscsi_host_remove
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xbcac82f6	iscsi_conn_send_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xbd0acc08	__iscsi_get_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xbfb3c4b2	iscsi_session_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xc67e761e	iscsi_complete_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xcbefa6d0	iscsi_change_queue_depth
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xcff1c794	iscsi_requeue_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe5a90f78	iscsi_complete_scsi_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe6fd9c0c	iscsi_session_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe81e3bbf	iscsi_itt_to_ctask
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xfb245e71	iscsi_session_failure
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xfcb521c5	iscsi_conn_queue_work
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x02631785	iscsi_tcp_recv_skb
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x0a27a96e	iscsi_segment_init_linear
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x24d322e7	iscsi_tcp_cleanup_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x3a956609	iscsi_tcp_conn_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x4260301a	iscsi_tcp_segment_unmap
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x5339dcb8	iscsi_tcp_r2tpool_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x5538642d	iscsi_tcp_conn_get_stats
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x70cf622e	iscsi_tcp_r2tpool_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x7203d636	iscsi_tcp_task_init
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x99de4e18	iscsi_segment_seek_sg
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xa4b77e46	iscsi_tcp_conn_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xb889e741	iscsi_tcp_task_xmit
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xd5bb0efa	iscsi_tcp_segment_done
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xdae40967	iscsi_tcp_hdr_recv_prep
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xf701eb55	iscsi_tcp_dgst_header
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xfbc630f8	iscsi_tcp_recv_segment_is_hdr
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x18f025d2	sas_phy_enable
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x1aeeac2e	sas_change_queue_type
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x21c8dd82	sas_phy_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x2c6a2760	sas_slave_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x32775c6b	sas_ssp_task_response
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x33bb1a41	sas_change_queue_depth
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x368937ff	sas_register_ha
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x6b0133a9	sas_unregister_ha
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x6dd3630d	sas_eh_bus_reset_handler
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x6e8279ab	__sas_task_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x755f8904	sas_eh_device_reset_handler
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x780ac924	sas_bios_param
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x8ac9c3b6	sas_target_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xa3492704	sas_domain_attach_transport
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xa6e17d82	sas_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xc255c3fc	sas_task_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xca381b3a	sas_queuecommand
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xd04f7074	sas_slave_configure
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xd252904b	sas_find_local_phy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xd9d487fc	sas_domain_release_transport
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xe369f726	sas_ioctl
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xf396e25d	sas_slave_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xf3be3a56	sas_request_addr
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x2d0b3196	srp_transfer_data
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x77e1b52d	srp_target_free
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x9c177300	srp_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xadc3afb0	srp_cmd_queue
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xc364aacc	srp_iu_put
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xf8235f06	srp_iu_get
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x150f1b5b	scsi_host_get_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x16e65435	scsi_host_put_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x4c97ebdf	scsi_tgt_alloc_queue
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x576944fa	scsi_tgt_free_queue
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x5fcca917	scsi_tgt_it_nexus_create
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x7f4754f2	scsi_tgt_cmd_to_host
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xc0202116	scsi_tgt_queue_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xd3c03e3e	scsi_tgt_it_nexus_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xdcf8cc44	scsi_tgt_tsk_mgmt_request
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x08a319be	iscsi_scan_finished
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x149aad44	iscsi_recv_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x28ce7292	iscsi_session_event
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x38f7ffff	iscsi_conn_error_event
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x3aa7f39d	iscsi_unblock_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x4424d137	iscsi_create_conn
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x4738e56c	iscsi_alloc_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x486d02fb	iscsi_host_for_each_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x4dcd91f7	iscsi_lookup_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x54ddcbae	iscsi_register_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x5567d7b6	iscsi_create_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x5da037d1	iscsi_remove_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x76060d1a	iscsi_unregister_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x781c0319	iscsi_free_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x818301f8	iscsi_block_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x9760b2de	iscsi_destroy_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x9c0ae6ef	iscsi_add_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x9d93e66c	iscsi_destroy_conn
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xa19d5ce8	iscsi_destroy_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xa54e0bb4	iscsi_offload_mesg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xaaa07adb	iscsi_session_chkready
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xcdd560b9	iscsi_create_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0x0ef06974	spi_populate_ppr_msg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xa0c71dac	spi_populate_sync_msg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xcffa2aff	spi_populate_width_msg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x1be9eaa1	srp_remove_host
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x9d4719a3	srp_release_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xd2f99795	srp_rport_add
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xf26a99e7	srp_attach_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xf73e636f	srp_rport_del
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x41bd03ce	spi_bitbang_stop
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x7cd19ab2	spi_bitbang_transfer
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xaa84dae9	spi_bitbang_start
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xb467f6e9	spi_bitbang_setup_transfer
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xd2fc1512	spi_bitbang_cleanup
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xfc9e5388	spi_bitbang_setup
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x4740fc22	comedi_usb_auto_config
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x4e4b42d1	comedi_free_board_minor
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0x813c41b0	comedi_pci_auto_unconfig
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xb5725623	comedi_usb_auto_unconfig
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xc57fdaf4	comedi_pci_auto_config
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xf5e55497	comedi_alloc_board_minor
+EXPORT_SYMBOL_GPL drivers/staging/comedi/comedi 0xff70a9ee	comedi_get_device_file_info
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/das08 0x86fcde20	das08_cs_boards
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/das08 0xafd5d44c	das08_common_attach
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/das08 0xe08b885e	das08_common_detach
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0x25e55b95	labpc_1200_is_unipolar
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0x3ddfb868	labpc_common_detach
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0x8285332a	range_labpc_1200_ai
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0xaf1e4347	labpc_1200_ai_gain_bits
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_labpc 0xe9693292	labpc_common_attach
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x0f90e79f	ni_tio_insn_config
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x244c3c9e	ni_tio_set_gate_src
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x49bf0b4e	ni_tio_winsn
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x6ca3b66d	ni_tio_init_counter
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x7eb7a645	ni_gpct_device_construct
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0x8b5f727a	ni_tio_arm
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xf43021b3	ni_gpct_device_destroy
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tio 0xf8e1849f	ni_tio_rinsn
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x04189fae	ni_tio_cancel
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x46f1f9c1	ni_tio_acknowledge_and_confirm
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x551ac4f5	ni_tio_cmdtest
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x70e629ec	ni_tio_handle_interrupt
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x82be56ae	ni_tio_set_mite_channel
+EXPORT_SYMBOL_GPL drivers/staging/comedi/drivers/ni_tiocmd 0x9eeb4756	ni_tio_cmd
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x2468ed34	oslec_hpf_tx
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x579d2806	oslec_snapshot
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x587711de	oslec_create
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x882d5f27	oslec_adaption_mode
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xf828c15b	oslec_flush
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xf923a5b1	oslec_free
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xfabc3747	oslec_update
+EXPORT_SYMBOL_GPL drivers/staging/hv/hv_vmbus 0x0a1ee779	osd_WaitEventWait
+EXPORT_SYMBOL_GPL drivers/staging/hv/hv_vmbus 0x4cc1b61c	osd_WaitEventCreate
+EXPORT_SYMBOL_GPL drivers/staging/hv/hv_vmbus 0x5432d87a	osd_WaitEventSet
+EXPORT_SYMBOL_GPL drivers/staging/hv/hv_vmbus 0x746d1786	osd_PageAlloc
+EXPORT_SYMBOL_GPL drivers/staging/hv/hv_vmbus 0x83911c38	osd_PageFree
+EXPORT_SYMBOL_GPL drivers/staging/hv/hv_vmbus 0xa1b8d1ad	osd_WaitEventWaitEx
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x4abe56e9	usbip_stop_eh
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x62db0853	usbip_stop_threads
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x75034439	sockfd_to_socket
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x7704713b	usbip_task_init
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x78b72f44	usbip_debug_flag
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x827d3cbf	usbip_pad_iso
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x9e987a06	usbip_event_add
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xaeb571a8	dev_attr_usbip_debug
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xc31420a7	usbip_pack_pdu
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xd02753dc	usbip_header_correct_endian
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xd05e508b	usbip_event_happened
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xdeec9bbc	usbip_xmit
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xdf342f48	usbip_recv_xbuff
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xe1ea0586	usbip_dump_header
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xef8d69e1	usbip_recv_iso
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xf98271ad	usbip_dump_urb
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xfc54aa71	usbip_start_eh
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xfdb8c25c	usbip_alloc_iso_desc_pdu
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xff2b6595	usbip_start_threads
+EXPORT_SYMBOL_GPL drivers/uio/uio 0x138311bc	uio_unregister_device
+EXPORT_SYMBOL_GPL drivers/uio/uio 0x87b6e70f	__uio_register_device
+EXPORT_SYMBOL_GPL drivers/uio/uio 0xb556ded0	uio_event_notify
+EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0x5b23507e	usbatm_usb_probe
+EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0xf5d22be4	usbatm_usb_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x0e1bbcbe	usb_ftdi_elan_write_pcimem
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x185d0a03	usb_ftdi_elan_edset_single
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x18ecf99e	usb_ftdi_elan_edset_output
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x84c9a680	usb_ftdi_elan_edset_empty
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x8dc7fa17	usb_ftdi_elan_edset_input
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xb0c12d77	usb_ftdi_elan_edset_setup
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xbf1b1632	ftdi_elan_gone_away
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xcad6d315	usb_ftdi_elan_read_pcimem
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xf29843bf	usb_ftdi_elan_edset_flush
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x01890813	usb_serial_generic_open
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x09ebabaf	usb_serial_handle_dcd_change
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x0f8f3d91	usb_serial_generic_resubmit_read_urb
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x10ee058b	usb_serial_register
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x16b1dd5a	usb_serial_port_softint
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x49b7f8dd	usb_serial_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x4e3e0bf5	ezusb_set_reset
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x525a6a0d	usb_serial_generic_read_bulk_callback
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x6b461e96	usb_serial_handle_sysrq_char
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x76081865	ezusb_writememory
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x89d38762	usb_serial_handle_break
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x9ffc565a	usb_serial_generic_write
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xa0e00613	usb_serial_generic_write_bulk_callback
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xe5a2e45f	usb_serial_deregister
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xe95f7bc7	usb_serial_generic_resume
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xf30f3270	usb_serial_probe
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x0b0d1b84	usb_stor_Bulk_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x0be13004	usb_storage_usb_ids
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x10b228b5	usb_stor_probe1
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x184fbaba	usb_usual_ignore_device
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1a45dd36	usb_stor_suspend
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1bc3edc2	usb_stor_sense_invalidCDB
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x2004bc1c	usb_stor_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x283dd9ba	usb_stor_resume
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x5d14c500	usb_stor_transparent_scsi_command
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x6f336fc9	usb_stor_pre_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x792757b2	usb_stor_bulk_transfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x79a537a7	usb_stor_CB_transport
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x8156ce1f	usb_stor_probe2
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x81e03efd	usb_stor_CB_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x85068af3	usb_stor_clear_halt
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x8a2a80bf	usb_stor_access_xfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x9f06bfe0	usb_stor_set_xfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xa349333e	usb_stor_bulk_transfer_sg
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xb4fd1539	usb_stor_bulk_srb
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xc4654aa4	usb_stor_control_msg
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xe851e334	usb_stor_ctrl_transfer
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xf72320f3	fill_inquiry_response
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xf771eae8	usb_stor_post_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xfa1742b1	usb_stor_Bulk_transport
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xfa4877d3	usb_stor_reset_resume
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x09f3c921	wa_urb_enqueue_run
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x2df53e2f	wa_urb_enqueue
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x6a14de0a	wa_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x8653cbc8	wa_urb_dequeue
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x8668d134	rpipe_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x9bb1eab1	__wa_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xad62da17	rpipe_ep_disable
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x0bb6bf5e	wusb_cluster_id_get
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x0c00d876	wusbhc_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x1c578dd7	__wusb_dev_get_by_usb_dev
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x1d6c4818	wusbhc_mmcie_rm
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x35224e36	wusbhc_rh_status_data
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x3562e361	wusbhc_rh_resume
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x55654783	wusbhc_b_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x56d6ee02	wusbhc_handle_dn
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x62ca7a61	wusbhc_giveback_urb
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x6f686eb6	wusbhc_mmcie_set
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x7010c3cd	wusbhc_rh_start_port_reset
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xa85b5e97	wusbhc_b_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb725d128	wusb_cluster_id_put
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb862833a	wusbhc_rh_control
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xbf7599ad	wusbhc_reset_all
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xcc11a5a1	wusbhc_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xd615072d	wusbhc_rh_suspend
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xd6ab4cc9	wusbhc_chid_set
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xdf6e4f08	wusb_dev_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf770a6b4	wusbd
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xfe2e17d7	wusb_et_name
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x04611d0b	i1480_rceb_check
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0xac91732c	i1480_cmd
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0xb8f0517c	i1480_fw_upload
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x420a81da	uwb_rts_cts_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x4838d84a	uwb_ack_policy_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x62372654	uwb_rts_cts_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x7eba28a8	uwb_phy_rate_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x992b078e	uwb_pca_base_priority_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xb9894e65	uwb_ack_policy_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xbc0c2f7d	uwb_phy_rate_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xd2de42fd	uwb_pca_base_priority_store
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x086d6c26	umc_device_create
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x73ba154a	__umc_driver_register
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x83a8f17b	umc_device_register
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x8ec174fe	umc_driver_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xab7e4712	umc_controller_reset
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xb607dc7a	umc_bus_type
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xc7cc7443	umc_match_pci_id
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xd9c8067e	umc_device_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0b8aad57	uwb_est_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0fdae85c	uwb_rc_neh_error
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x10c5e50b	uwb_rc_put
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x15b21b9e	uwb_rc_cmd_async
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x1e457d85	uwb_rc_ie_add
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x1fa6e437	uwb_rc_dev_addr_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x27d324f2	uwb_rc_post_reset
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2b5ebf2b	uwb_rc_alloc
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x3c8cca5a	uwb_rc_rm
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x43ebe71f	uwb_dev_try_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4898a9ab	uwb_notifs_deregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4d57ae3c	uwb_rsv_type_str
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4d88b838	uwb_pal_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x519e6d7d	uwb_rsv_destroy
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x58af0e20	uwb_rc_reset_all
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5cbb4758	uwb_rsv_terminate
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5e4bc088	__uwb_addr_print
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6057079a	uwb_rc_cmd
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x62c6a25a	__uwb_rc_try_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6759db8d	uwb_rc_ie_rm
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6de3b541	uwb_radio_start
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6ec81fbc	uwb_rc_neh_grok
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x7dcfcd23	uwb_ie_next
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x84dda1ec	uwb_rc_add
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x8667eb45	uwb_rc_mac_addr_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x905e13d9	uwb_rsv_get_usable_mas
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x98413234	uwb_rsv_state_str
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x98a99a68	uwb_rsv_establish
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x9f237356	uwb_pal_init
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x9f3e3f32	uwb_radio_stop
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa9a9be96	uwb_rc_pre_reset
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb061f05b	uwb_rsv_create
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb541ed50	uwb_rc_get_by_grandpa
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xbcf528a7	uwb_pal_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xce3be8ad	uwb_est_find_size
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xce84850e	uwb_dev_for_each
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd450bc22	uwb_rc_get_by_dev
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd77737f8	uwb_rsv_accept
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe1716f06	uwb_est_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xea1f7ffb	uwb_notifs_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xed50e126	uwb_rc_init
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf784b2c1	uwb_rc_vcmd
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xffdd866c	uwb_rsv_modify
+EXPORT_SYMBOL_GPL drivers/uwb/whci 0xaea7983d	whci_wait_for
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x10b90e39	wlp_dev_prim_OUI_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x21309fd2	wlp_wss_activate_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x236203c2	wlp_uuid_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x2eeadf9e	wlp_dev_serial_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x30ad8520	wlp_dev_prim_OUI_sub_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x31ae42b3	wlp_dev_manufacturer_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x3a92a326	wlp_eda_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x4d30bbcc	wlp_prepare_tx_frame
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x4fdfbb5d	wlp_dev_name_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x6540e57d	wlp_dev_model_name_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x6addff4a	wlp_wss_remove
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x6e52f58d	wlp_eda_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x771b42df	wlp_reset_all
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x89f7ff14	wlp_uuid_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x8b14adca	wlp_remove
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x906f4da9	wlp_wss_setup
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x91e58cd8	wlp_dev_prim_subcat_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x965c18c3	wlp_dev_name_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x9d7e25e6	wlp_dev_model_name_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xbae67a12	wlp_wss_activate_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xbc1a0a04	wlp_receive_frame
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xbcc0e655	wlp_dev_prim_category_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xbcc64e09	wlp_dev_serial_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xbf0bfda2	wlp_dev_prim_subcat_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xbf908445	wlp_dev_model_nr_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xc7f30e29	wlp_setup
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xcaced5e1	wlp_dev_prim_OUI_sub_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xd377317e	wlp_dev_model_nr_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xd5ede04d	wlp_dev_prim_OUI_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xd73248c8	wlp_dev_prim_category_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xda572309	wlp_neighborhood_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xe5157782	wlp_dev_manufacturer_show
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x059672d8	ili9320_probe_spi
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x15ab75cc	ili9320_suspend
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x34929c1b	ili9320_write
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x5e3aa8e2	ili9320_write_regs
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x6432e0d6	ili9320_remove
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x970bc13c	ili9320_shutdown
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xa352f397	ili9320_resume
+EXPORT_SYMBOL_GPL drivers/video/fb_ddc 0x39e35fe2	fb_ddc_read
+EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0x0f35c3f6	fb_sys_write
+EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0x1e6480bf	fb_sys_read
+EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0x3c699c5c	sis_free_new
+EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0xe5e6d945	sis_malloc_new
+EXPORT_SYMBOL_GPL drivers/video/vermilion/vmlfb 0x016e6c20	vmlfb_unregister_subsys
+EXPORT_SYMBOL_GPL drivers/video/vermilion/vmlfb 0x90c018c6	vmlfb_register_subsys
+EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x12c45d11	virtio_check_driver_offered_feature
+EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x3fb85651	register_virtio_driver
+EXPORT_SYMBOL_GPL drivers/virtio/virtio 0x8b44cb39	register_virtio_device
+EXPORT_SYMBOL_GPL drivers/virtio/virtio 0xcd9ea48e	unregister_virtio_driver
+EXPORT_SYMBOL_GPL drivers/virtio/virtio 0xcdac0c9a	unregister_virtio_device
+EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x0ac0ab25	vring_interrupt
+EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x47945bfc	vring_new_virtqueue
+EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0x7ec0e5d3	vring_del_virtqueue
+EXPORT_SYMBOL_GPL drivers/virtio/virtio_ring 0xaf0060c7	vring_transport_features
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x29f97589	w1_read_8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x577e0726	w1_reset_select_slave
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x7c2f2afb	w1_calc_crc8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x98ccea54	w1_read_block
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xa7e840c2	w1_touch_block
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xdda4e3b1	w1_next_pullup
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xe31e0d41	w1_write_block
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xe67a8f40	w1_write_8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xee12e119	w1_reset_bus
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x0864c4a4	dlm_new_lockspace
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x3e55ccc6	dlm_posix_lock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x9321df95	dlm_lock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x99b4f3fd	dlm_posix_get
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xa7d90056	dlm_posix_unlock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xcf9f3328	dlm_release_lockspace
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xdc583c08	dlm_unlock
+EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0x9d32c010	exportfs_decode_fh
+EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0xe22514f3	exportfs_encode_fh
+EXPORT_SYMBOL_GPL fs/fat/fat 0x0a07b9ae	fat_alloc_new_dir
+EXPORT_SYMBOL_GPL fs/fat/fat 0x0a5070fb	fat_getattr
+EXPORT_SYMBOL_GPL fs/fat/fat 0x0a5bd890	fat_time_unix2fat
+EXPORT_SYMBOL_GPL fs/fat/fat 0x12bf5a50	fat_detach
+EXPORT_SYMBOL_GPL fs/fat/fat 0x1f8933a6	fat_search_long
+EXPORT_SYMBOL_GPL fs/fat/fat 0x1f8dfab3	fat_attach
+EXPORT_SYMBOL_GPL fs/fat/fat 0x600bec51	fat_dir_empty
+EXPORT_SYMBOL_GPL fs/fat/fat 0x606406c7	fat_scan
+EXPORT_SYMBOL_GPL fs/fat/fat 0x68a68807	fat_add_entries
+EXPORT_SYMBOL_GPL fs/fat/fat 0x6e9055d8	fat_remove_entries
+EXPORT_SYMBOL_GPL fs/fat/fat 0x82873fb2	fat_sync_inode
+EXPORT_SYMBOL_GPL fs/fat/fat 0x86ec8d1d	fat_get_dotdot_entry
+EXPORT_SYMBOL_GPL fs/fat/fat 0x976a0a05	fat_free_clusters
+EXPORT_SYMBOL_GPL fs/fat/fat 0x97b7f5cc	fat_flush_inodes
+EXPORT_SYMBOL_GPL fs/fat/fat 0xb3ede1a4	fat_build_inode
+EXPORT_SYMBOL_GPL fs/fat/fat 0xc41f28e0	fat_setattr
+EXPORT_SYMBOL_GPL fs/fat/fat 0xc7d10415	fat_fs_error
+EXPORT_SYMBOL_GPL fs/fat/fat 0xf92c945b	fat_fill_super
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x0c0344b9	nlmclnt_proc
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x17ce645d	locks_end_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x1a618932	nlmsvc_unlock_all_by_ip
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x25ccc610	nlmclnt_init
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x6f959b35	locks_in_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x82d654e5	nlmclnt_done
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x96877ac4	locks_start_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xa7b91a7b	lockd_down
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xf2fe974e	nlmsvc_ops
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xf6933c48	lockd_up
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xfca5df72	nlmsvc_unlock_all_by_sb
+EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0x7903fa6f	nfsacl_decode
+EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0x9c26579b	nfsacl_encode
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x0a7eca0a	o2nm_get_node_by_ip
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x0b408738	o2nm_node_put
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x18ea7620	o2hb_unregister_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1b02006e	o2nm_node_get
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1b89c6ee	o2hb_fill_node_map
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1cb231d0	mlog_not_bits
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1d747ce3	o2hb_check_node_heartbeating
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x25b4fe6e	o2hb_setup_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x36418553	o2net_send_message
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x4900035b	o2hb_stop_all_regions
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x62f85ad7	o2hb_register_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x687f6251	mlog_and_bits
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x8d36d5f6	o2nm_get_node_by_num
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa82a8645	o2nm_this_node
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa87bc9e7	o2nm_configured_node_map
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa9f5379a	o2net_send_message_vec
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xae808bac	o2net_register_handler
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xbaeb4700	o2hb_check_node_heartbeating_from_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xd60f2c6c	o2hb_check_local_node_heartbeating
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf1a5611d	o2net_unregister_handler_list
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x0b812ac4	dlm_register_domain
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x7a1211f8	dlm_setup_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x817891a5	dlmlock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x91b4b560	dlmunlock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xa5b14f58	dlm_print_one_lock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd7ba575e	dlm_errmsg
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd8fa57a6	dlm_unregister_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xdb9d90f9	dlm_unregister_domain
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xf3620e20	dlm_register_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xfb86b96f	dlm_errname
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0562c415	ocfs2_cluster_this_node
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x06379db6	ocfs2_dlm_lvb_valid
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0e27f909	ocfs2_dlm_lock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x15df1f1d	ocfs2_plock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x21db5b88	ocfs2_cluster_disconnect
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4a1f6fe9	ocfs2_cluster_connect
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4d3af7fa	ocfs2_cluster_hangup
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x81c85a68	ocfs2_dlm_lock_status
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x91fab465	ocfs2_dlm_lvb
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x963932a3	ocfs2_stack_glue_set_locking_protocol
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xa7d5c1c0	ocfs2_dlm_unlock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xb5fea631	ocfs2_stack_glue_register
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xbbc4ef97	ocfs2_stack_supports_plocks
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xca37382e	ocfs2_stack_glue_unregister
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xd066711e	ocfs2_dlm_dump_lksb
+EXPORT_SYMBOL_GPL lib/lzo/lzo_compress 0x56b63670	lzo1x_1_compress
+EXPORT_SYMBOL_GPL lib/lzo/lzo_decompress 0xf30fda27	lzo1x_decompress_safe
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x300d7e57	free_rs
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x6fbb3bd9	init_rs_non_canonical
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xabda1e2e	decode_rs16
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xb050f329	init_rs
+EXPORT_SYMBOL_GPL net/802/garp 0x3713f955	garp_uninit_applicant
+EXPORT_SYMBOL_GPL net/802/garp 0x3758489d	garp_init_applicant
+EXPORT_SYMBOL_GPL net/802/garp 0x46528347	garp_request_join
+EXPORT_SYMBOL_GPL net/802/garp 0x55e17d0d	garp_unregister_application
+EXPORT_SYMBOL_GPL net/802/garp 0xb420ca5a	garp_register_application
+EXPORT_SYMBOL_GPL net/802/garp 0xc3c2a63b	garp_request_leave
+EXPORT_SYMBOL_GPL net/802/stp 0x6bff2cc9	stp_proto_register
+EXPORT_SYMBOL_GPL net/802/stp 0xd23bc878	stp_proto_unregister
+EXPORT_SYMBOL_GPL net/ax25/ax25 0x2f23d077	ax25_register_pid
+EXPORT_SYMBOL_GPL net/ax25/ax25 0xac93ae05	ax25_bcast
+EXPORT_SYMBOL_GPL net/ax25/ax25 0xaeb7451e	ax25_defaddr
+EXPORT_SYMBOL_GPL net/bluetooth/bluetooth 0x090bcc52	bt_class
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x01f5e31e	dccp_poll
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x0e27b200	dccp_insert_option
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x160347d1	dccp_connect
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x1d99d49a	dccp_timestamp
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x233b5f96	dccp_getsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x34ddcb81	dccp_make_response
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x4b2ac158	dccp_init_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x4cdd391d	dccp_feat_list_purge
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x50515bd1	dccp_rcv_state_process
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x56ea266a	dccp_state_name
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x5fc3060b	dccp_death_row
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x624fe2f6	dccp_setsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x665c3a64	dccp_create_openreq_child
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x6970f368	dccp_reqsk_send_ack
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x6feec91c	dccp_insert_option_timestamp
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x70b1d967	dccp_orphan_count
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x829026f8	dccp_close
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x83aacd8d	dccp_check_req
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x8631f287	dccp_ctl_make_reset
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x86be7924	dccp_packet_name
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x8b7d8caf	dccp_statistics
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x992d35fc	dccp_destroy_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x9caa2ae6	dccp_insert_option_elapsed_time
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x9d8e1804	inet_dccp_listen
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xa430be9c	dccp_parse_options
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xa6a3faa8	dccp_send_sync
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xaa72605f	dccp_child_process
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xaa985368	dccp_set_state
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xb7854b54	dccp_shutdown
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xcf9c547c	dccp_hashinfo
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xd14b7ede	dccp_ioctl
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xd65e2cb3	dccp_sendmsg
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xda90764b	dccp_send_ack
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xe1a32128	dccp_done
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xee737e0c	dccp_sync_mss
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xef1b7678	dccp_reqsk_init
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xf6bfbcf1	dccp_recvmsg
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xf7b91cb3	dccp_disconnect
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xff944fe0	dccp_rcv_established
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x2709229d	dccp_invalid_packet
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x5e4c0267	dccp_v4_send_check
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xa53908aa	dccp_v4_do_rcv
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xc63f9071	dccp_v4_conn_request
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xe9504d24	dccp_v4_request_recv_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xf6e622c7	dccp_v4_connect
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0x6d40a921	need_ipv4_conntrack
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0x86f68c6a	nf_nat_seq_adjust_hook
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_defrag_ipv4 0x6b6c3d10	nf_defrag_ipv4_enable
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x07ae60b6	nf_nat_proto_in_range
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x0f25d432	nf_nat_proto_unique_tuple
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x523e9cdb	nf_nat_proto_range_to_nlattr
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x7977f0ed	nf_nat_get_offset
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x94a08134	nf_nat_proto_nlattr_to_range
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x9c050f29	nf_nat_proto_find_get
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xe70c3bd4	nf_nat_packet
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xfa43df96	nf_nat_icmp_reply_translation
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xff8af407	nf_nat_proto_put
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat_proto_gre 0x636b12c8	nf_nat_need_gre
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x165ada68	tcp_vegas_pkts_acked
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x3c12283d	tcp_vegas_init
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x6de05916	tcp_vegas_cwnd_event
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xc985faaf	tcp_vegas_state
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xe2a3a929	tcp_vegas_get_info
+EXPORT_SYMBOL_GPL net/mac80211/mac80211 0x350e35b6	ieee80211_iterate_active_interfaces_atomic
+EXPORT_SYMBOL_GPL net/mac80211/mac80211 0xa3994edb	ieee80211_iterate_active_interfaces
+EXPORT_SYMBOL_GPL net/netfilter/ipvs/ip_vs 0xe6476b4a	net_vs_ctl_path
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x041013fd	nf_conntrack_lock
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x045072cd	nf_ct_port_nla_policy
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x04691850	__nf_conntrack_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x07d18317	__nf_ct_refresh_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x0a07c964	nf_ct_invert_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x0c603eaa	nf_ct_get_tuplepr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x154a292e	nf_conntrack_event_cb
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x15c016bf	nf_ct_expect_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x1ba045a2	nf_ct_helper_ext_add
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x2665f5db	__nf_ct_l4proto_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x33136222	nf_conntrack_helper_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3976a429	nf_conntrack_alter_reply
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3cd25e28	nf_ct_delete_from_lists
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3d20a943	nf_ct_expect_register_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3f5b1415	nf_ct_port_nlattr_to_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x40840727	nf_ct_nat_offset
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4085021c	nf_conntrack_l4proto_tcp4
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x428686b9	nf_conntrack_hash_insert
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4a867991	nf_conntrack_tuple_taken
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4b9065a9	nf_ct_alloc_hashtable
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5882ba33	nf_conntrack_set_hashsize
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x59b8df88	nf_ct_remove_expectations
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5b64030d	nf_ct_iterate_cleanup
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5f5ad391	__nf_ct_expect_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x61257236	nf_ct_port_tuple_to_nlattr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x62813e5c	nf_ct_port_nlattr_tuple_size
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x62e564fe	nf_conntrack_l3proto_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x63183b81	nf_ct_expect_unregister_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x63eda1b6	nf_conntrack_l3proto_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6e224a7a	need_conntrack
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x71bba362	nf_conntrack_register_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x72b3609e	nf_conntrack_l4proto_tcp6
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x7309d6b2	nfnetlink_parse_nat_setup_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x77a3f455	nf_conntrack_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x78f9b710	nf_ct_l3proto_try_module_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x79397fd5	__nf_conntrack_helper_find_byname
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x7de390ca	nf_ct_l3protos
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x7f1a494f	nf_ct_expect_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8033d2b8	nf_conntrack_unregister_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8283d1a7	__nf_conntrack_confirm
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x82a1fff1	nf_conntrack_alloc
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8874281c	nf_ct_expect_related_report
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x89dd373b	nf_conntrack_untracked
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8c5a5520	__nf_ct_kill_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8d0b2045	nf_ct_extend_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8fe0a02f	nf_conntrack_l4proto_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8ffe7e89	nf_conntrack_htable_size
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x90ff6c9f	nf_ct_invert_tuplepr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x918e7cbd	nf_conntrack_l4proto_udp4
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x920a2f6f	nf_ct_unlink_expect
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9af3f6c1	nf_ct_free_hashtable
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xa3b81e3f	nf_conntrack_l4proto_udp6
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xaa1e8913	nf_ct_expect_alloc
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb602c57e	nf_ct_l3proto_module_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb676a7bb	nf_ct_deliver_cached_events
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb874454e	nf_expect_event_cb
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb8cad030	seq_print_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc18ac88d	nf_ct_expect_hsize
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc247b30e	nf_ct_l3proto_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc405e7da	nf_conntrack_helper_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xd379d038	nf_ct_expect_init
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xda8ea480	nf_ct_get_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xdc937347	__nf_ct_try_assign_helper
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xe7850e89	print_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xec5b8b68	nf_conntrack_flush_report
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf38bcdf3	nf_conntrack_max
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf5059e17	nf_conntrack_free
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf54e9870	nf_ct_l3proto_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf7ac1c09	nf_ct_insert_dying_list
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xfcf9e0d4	nf_conntrack_l3proto_generic
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xfd02fb7a	nf_ct_unexpect_related
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xfd3faf8e	nf_conntrack_in
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xfe924a5e	nf_ct_extend_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xff17c06f	nf_conntrack_l4proto_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_amanda 0x9dada121	nf_nat_amanda_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_ftp 0xb5e96afb	nf_nat_ftp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x2e958151	nat_rtp_rtcp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x3d6dd40b	set_h245_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x50954eb4	nat_t120_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x67583133	nat_h245_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x6f012ee0	set_h225_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xb78b116f	nat_callforwarding_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xc3a6a59e	set_ras_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xd8f32b48	get_h225_addr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xdc113c34	set_sig_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xe0af51bc	nat_q931_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_irc 0xd8e06d4f	nf_nat_irc_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x19f66c11	nf_nat_pptp_hook_expectfn
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x376575e3	nf_nat_pptp_hook_inbound
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x5728f419	nf_nat_pptp_hook_outbound
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0xe8a72ccc	nf_nat_pptp_hook_exp_gre
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_proto_gre 0x694cfa36	nf_ct_gre_keymap_add
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_proto_gre 0x97025e07	nf_ct_gre_keymap_destroy
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x0da7ce87	nf_nat_sip_expect_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x28ecfa10	nf_nat_sip_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x3de3eca2	nf_nat_sdp_media_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x577b912a	ct_sip_get_header
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x6fc59583	ct_sip_parse_numerical_param
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x7c3fc84d	nf_nat_sdp_session_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x8c22bc74	ct_sip_parse_request
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x9b90d7ea	nf_nat_sdp_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xbee15f7e	nf_nat_sdp_port_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xc9884685	ct_sip_get_sdp_header
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xcbe20bb4	ct_sip_parse_header_uri
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xfa8b732c	ct_sip_parse_address_param
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_tftp 0xa9d1cfe6	nf_nat_tftp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_tproxy_core 0x39a07f24	nf_tproxy_assign_sock
+EXPORT_SYMBOL_GPL net/netfilter/nf_tproxy_core 0x53afff66	nf_tproxy_get_sock_v4
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x1f58e71b	nfnl_lock
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x3895cd7a	nfnl_unlock
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x3d193152	nfnetlink_send
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x59ae9b70	nfnetlink_unicast
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xa3d1ac6a	nfnetlink_subsys_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xb362426a	nfnetlink_subsys_register
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xeca95329	nfnetlink_has_listeners
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xef9b4bbd	nfnetlink_set_err
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink_log 0x2d034116	nfulnl_log_packet
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x0e749087	xt_replace_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x1a582d63	xt_table_unlock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x40728a63	xt_find_revision
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x45ae433a	xt_proto_init
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x495950c8	xt_find_table_lock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x4f432b51	per_cpu__xt_info_locks
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x7312ecc7	xt_check_target
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x784fa938	xt_proto_fini
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x8ed7c472	xt_register_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x9ea531ec	xt_check_match
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xcf99fc26	xt_unregister_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xe333bb6f	xt_request_find_target
+EXPORT_SYMBOL_GPL net/netfilter/xt_RATEEST 0xc2429b63	xt_rateest_lookup
+EXPORT_SYMBOL_GPL net/netfilter/xt_RATEEST 0xfc852663	xt_rateest_put
+EXPORT_SYMBOL_GPL net/rds/rds 0x00a467af	rds_wq
+EXPORT_SYMBOL_GPL net/rds/rds 0x0aea3e3e	rds_conn_destroy
+EXPORT_SYMBOL_GPL net/rds/rds 0x0f4e7447	rds_connect_complete
+EXPORT_SYMBOL_GPL net/rds/rds 0x2c5c5514	rds_message_add_rdma_dest_extension
+EXPORT_SYMBOL_GPL net/rds/rds 0x2eb5d378	rds_info_register_func
+EXPORT_SYMBOL_GPL net/rds/rds 0x3101936e	rds_message_add_extension
+EXPORT_SYMBOL_GPL net/rds/rds 0x32222499	rds_page_copy_user
+EXPORT_SYMBOL_GPL net/rds/rds 0x3f4f2334	rds_recv_incoming
+EXPORT_SYMBOL_GPL net/rds/rds 0x48e0c501	rds_message_unmapped
+EXPORT_SYMBOL_GPL net/rds/rds 0x69fcf579	rds_rdma_send_complete
+EXPORT_SYMBOL_GPL net/rds/rds 0x6e1212d6	rds_trans_unregister
+EXPORT_SYMBOL_GPL net/rds/rds 0x73aac73d	rds_message_populate_header
+EXPORT_SYMBOL_GPL net/rds/rds 0x759d3d7a	rds_inc_init
+EXPORT_SYMBOL_GPL net/rds/rds 0x7ec69f02	rds_send_get_message
+EXPORT_SYMBOL_GPL net/rds/rds 0x804e74d8	rds_conn_drop
+EXPORT_SYMBOL_GPL net/rds/rds 0x885b03db	rds_cong_map_updated
+EXPORT_SYMBOL_GPL net/rds/rds 0x96fafe85	rds_stats_info_copy
+EXPORT_SYMBOL_GPL net/rds/rds 0x97666771	rds_inc_put
+EXPORT_SYMBOL_GPL net/rds/rds 0x9b3e6113	per_cpu__rds_stats
+EXPORT_SYMBOL_GPL net/rds/rds 0x9b6efa54	rds_trans_register
+EXPORT_SYMBOL_GPL net/rds/rds 0x9cc6ef2f	rds_message_addref
+EXPORT_SYMBOL_GPL net/rds/rds 0xb43aea56	rds_conn_create
+EXPORT_SYMBOL_GPL net/rds/rds 0xb6b12b57	rds_conn_create_outgoing
+EXPORT_SYMBOL_GPL net/rds/rds 0xcae4a311	rds_info_copy
+EXPORT_SYMBOL_GPL net/rds/rds 0xccb023b5	rds_inc_addref
+EXPORT_SYMBOL_GPL net/rds/rds 0xd6d3673f	rds_info_deregister_func
+EXPORT_SYMBOL_GPL net/rds/rds 0xdbf57d45	rds_for_each_conn_info
+EXPORT_SYMBOL_GPL net/rds/rds 0xe01b0208	rds_message_put
+EXPORT_SYMBOL_GPL net/rds/rds 0xf966b469	rds_send_drop_acked
+EXPORT_SYMBOL_GPL net/rxrpc/af-rxrpc 0xc89c63da	rxrpc_register_security
+EXPORT_SYMBOL_GPL net/rxrpc/af-rxrpc 0xdd9a81e6	rxrpc_unregister_security
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x0075f14e	svc_gss_principal
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x00c52ef5	g_make_token_header
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x0118b6c2	gss_pseudoflavor_to_service
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x1c93aebe	gss_mech_get_by_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x78456173	gss_service_to_auth_domain_name
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x82afa52b	gss_mech_put
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x8d1a827e	svcauth_gss_register_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x8e92ed50	svcauth_gss_flavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xb5dea7ef	g_token_size
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xd8139507	gss_mech_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xe9483ece	gss_mech_get
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xecf43905	gss_svc_to_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xf0d0d196	gss_mech_register
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xf8b2ff6e	g_verify_token_header
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xfd5f230d	gss_mech_get_by_name
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0106eb00	svc_auth_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x010efc58	xprt_release_xprt_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x03b72cd8	xdr_buf_read_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x05e807a9	xdr_encode_string
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x065994f1	xdr_encode_opaque_fixed
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x09c597ad	xdr_init_decode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0ce4ede7	csum_partial_copy_to_xdr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0d0e0a73	xdr_init_encode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0da34bd3	rpc_peeraddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0e4953be	xprt_set_retrans_timeout_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0f668ba9	svc_auth_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0f9fd9c0	rpc_ntop
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x12e280e3	svc_proc_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x131785df	put_rpccred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x13b66a71	svc_print_addr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x15ee173f	xprt_release_rqst_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1759be07	svc_max_payload
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x185ec7b2	rpcauth_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1a8c14f4	svc_xprt_copy_addrs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1b92b9e4	svc_prepare_thread
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1f63db0d	svc_xprt_init
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2430f5a4	xprt_update_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x26d43c33	cache_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x274862d3	rpc_bind_new_program
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2919b156	xdr_decode_string_inplace
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x29dd4455	svc_seq_show
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2aa17774	rpc_free_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2c089dfb	xdr_inline_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2d12435d	svc_recv
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2da01a19	svc_authenticate
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2e3a8889	xprt_register_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2eec63c9	xdr_encode_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2f3b489a	auth_unix_add_addr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3137e1ed	rpc_killall_tasks
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x31a89d59	rpc_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3520477c	xdr_buf_from_iov
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x35346a7c	svc_xprt_put
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x36e747f8	xdr_decode_word
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3a068ebd	rpcb_getport_async
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3d1c95b7	rpc_lookup_machine_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3db0e2f5	sunrpc_cache_register_pipefs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3e3be029	rpc_run_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x41a6995f	rpc_proc_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x423ea37f	rpc_wake_up_queued_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x47207874	rpc_call_start
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x47b31511	cache_purge
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4b2982c8	svc_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4d0d3aaa	xprt_adjust_cwnd
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4d75da34	rpc_delay
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4d8ddc32	svc_xprt_names
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4e93c7a3	xprt_reserve_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4fb27cf4	rpc_print_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x50f21822	rpc_exit_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x53445f68	nlm_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x540eda08	rpc_alloc_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x54c10eef	svc_xprt_enqueue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x550547a3	rpc_destroy_wait_queue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x55e4646d	xprt_lookup_rqst
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x57e426e4	rpcauth_lookup_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5862d90b	svc_addsock
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5b14ec1a	rpc_put_mount
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5bae8e2c	rpc_restart_call_prepare
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5bd26000	rpc_proc_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5f4de207	rpc_call_async
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x62d720f4	xprt_wake_pending_tasks
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x63b04ade	svc_find_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x65a47dcf	svc_destroy
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x66ab0b58	svc_sock_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x675524ec	rpc_sockaddr2uaddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6767bef7	svc_sock_names
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x686c7e33	xdr_encode_array2
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6c5304c5	rpcb_getport_sync
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6cbf76ae	svc_set_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6e656522	rpc_queue_upcall
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6eea229d	svcauth_unix_purge
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x701604ed	auth_domain_put
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x71fa908a	cache_flush
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x728b3750	rpc_get_mount
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x73bde250	xdr_encode_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7703e66f	xprt_reserve_xprt_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x78057d8a	rpc_force_rebind
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7db23d66	svc_reg_xprt_class
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7de53067	rpc_init_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7e9afead	sunrpc_cache_update
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7f4df5f1	svc_set_num_threads
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x82681184	xdr_enter_page
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x85ee05d6	cache_check
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x86ed282a	rpc_uaddr2sockaddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8b4f77bb	xdr_partial_copy_from_skb
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8cfdffc5	rpc_wake_up_next
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8d83e906	auth_unix_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8e5d65c7	svc_sock_destroy
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x94984229	xprt_disconnect_done
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9689782e	xprt_unregister_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x96f7a050	auth_domain_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x97a38968	xdr_reserve_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x984332f4	xprt_write_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x98463fe8	auth_domain_find
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x98837068	rpcauth_init_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9994d814	svc_sock_update_bufs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9bf1aad8	svc_wake_up
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9e8ec798	cache_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa3439bed	unix_domain_find
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa40d0f8f	xdr_process_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa5421f0a	rpc_peeraddr2str
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa60f449a	xprt_wait_for_buffer_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa61c8129	read_bytes_from_xdr_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa6450404	svc_unreg_xprt_class
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa98ac387	xdr_inline_decode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa9e3a8a6	sunrpc_cache_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xaaeff613	rpc_setbufsize
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xac75e59a	xdr_shift_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xaf27f8fb	rpcauth_generic_bind_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xaf381c10	sunrpc_cache_unregister_pipefs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xaf5bf6ef	nfs_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb387b246	rpc_wake_up_status
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb5f56621	rpc_restart_call
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb6b609a4	rpc_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb941458e	rpcauth_destroy_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xba2016ed	xprt_complete_rqst
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbc091397	svc_exit_thread
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbcb85dc5	auth_unix_forget_old
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbd0ff482	rpcauth_init_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbdc8a683	xdr_skb_read_bits
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbea3a2b3	rpc_shutdown_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbf9d1b96	nfsd_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc12435e3	rpc_calc_rto
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc2fe8d4f	svc_create_pooled
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc3880471	xdr_decode_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc562f63c	svcauth_unix_set_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc86cc381	svc_reserve
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc8e96dea	qword_addhex
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc8f95166	__rpc_wait_for_completion_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcb85559b	rpc_max_payload
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xccc2372e	rpc_pton
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcddb06f0	xprt_release_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xce5163b2	xdr_write_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcee467f3	xprt_load_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd1489711	rpc_call_sync
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd2975f49	rpc_sleep_on
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd4ee1532	rpcauth_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd5885342	svc_xprt_received
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd82c728e	rpc_init_wait_queue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdab5e184	svc_drop
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdeebfb3c	rpc_lookup_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe26ad6a5	svc_proc_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe306cfbd	sunrpc_cache_pipe_upcall
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe37b0c3d	xdr_encode_word
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe5919cb1	xdr_encode_opaque
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe9177534	svc_process
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe97f4ce5	qword_get
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xea98231f	rpcauth_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xec2cea12	rpc_call_null
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xed87219f	svc_create_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xedcf6be4	qword_add
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xedd1ba52	rpc_wake_up
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xeeacab69	rpc_update_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xefa350b4	xdr_buf_subsegment
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf2454afc	rpc_mkpipe
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf7bc5bc8	svc_close_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf7c65d38	rpc_clone_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf9a3ab6e	xprt_set_retrans_timeout_def
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf9d1164c	rpc_free
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfa710b0c	xdr_read_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfaf448f6	rpc_unlink
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfd7ee886	xdr_decode_array2
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfdbf5094	rpc_put_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfee2ecf9	rpc_malloc
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x002a160f	wimax_state_change
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x1ae994c2	wimax_report_rfkill_sw
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x27695a3d	wimax_msg
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x2c959b65	wimax_msg_alloc
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x7a5ad88d	wimax_msg_len
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x8498285c	wimax_report_rfkill_hw
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xa4c8f2ba	wimax_dev_add
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xa936ba07	wimax_state_get
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xba41f54a	wimax_dev_rm
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xc0032720	wimax_msg_send
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xd44851a0	wimax_dev_init
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xdeed22a2	wimax_msg_data
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xf2141f52	wimax_msg_data_len
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x05f7f49a	cfg80211_wext_siwgenie
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x2352c22f	cfg80211_wext_siwscan
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x23a46993	cfg80211_wext_siwtxpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x2bde95b9	cfg80211_wext_siwmlme
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x39f0f079	cfg80211_wext_giwname
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x3d524164	cfg80211_wext_siwfreq
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x470027b0	cfg80211_wext_giwrts
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x4bba01a3	cfg80211_wext_siwencodeext
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x4f0aa85b	cfg80211_wext_siwmode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x6839be75	cfg80211_wext_giwencode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x6c71cd23	cfg80211_wext_giwscan
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x71df1f7a	cfg80211_wext_giwrange
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x758253b9	cfg80211_wext_siwencode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x8aaecd41	cfg80211_wext_giwfreq
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x9297be0c	cfg80211_wext_siwfrag
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x9a5072af	cfg80211_wext_giwtxpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xa423bd88	cfg80211_wext_giwap
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xb2bbb923	cfg80211_wext_giwmode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xb308a00c	cfg80211_wext_giwauth
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xb96656e3	cfg80211_wext_giwrate
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xd92496c7	cfg80211_wext_giwfrag
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xe091d93c	cfg80211_wext_siwretry
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xe5f3a3f6	cfg80211_wext_siwap
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xec6c712c	cfg80211_wext_giwretry
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xed222b8a	cfg80211_wireless_stats
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xf0fcab95	cfg80211_wext_siwrts
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xf1a1efe4	cfg80211_wext_giwpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xf2d57e28	cfg80211_wext_siwrate
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xf7b2f821	cfg80211_wext_siwessid
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xf8bb88c7	cfg80211_wext_siwauth
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xfb4f5031	cfg80211_wext_giwessid
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xfd5c47f4	cfg80211_wext_siwpower
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x16caac90	ipcomp_destroy
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x5db7a15d	ipcomp_output
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x836e0523	ipcomp_input
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0xec6a55c0	ipcomp_init_state
+EXPORT_SYMBOL_GPL sound/core/snd-pcm 0xa286a234	snd_pcm_format_name
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x049dda00	snd_hda_ch_mode_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0c4ea767	snd_hda_check_board_codec_sid_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x10ffa5c3	snd_hda_build_controls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x126ca87c	snd_hda_get_connections
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1479f1f6	snd_hda_resume
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x19b9025b	snd_hda_is_supported_format
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1ba0eaee	snd_hda_mixer_bind_ctls_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1e5043bc	snd_hda_check_amp_list_power
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x20750e76	snd_hda_multi_out_dig_cleanup
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x219bbd4d	snd_hda_queue_unsol_event
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x21efe74a	snd_hda_bind_vol
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x22aa442e	snd_hda_override_amp_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x22f486de	snd_hda_add_codec_preset
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2449d553	snd_hda_bus_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x288b924c	snd_hda_multi_out_analog_cleanup
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2a7fce81	snd_hda_ch_mode_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x335e513b	snd_hda_build_pcms
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x347e97d7	snd_hda_mixer_amp_switch_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x371acb15	snd_hda_load_patch
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x39f7925d	snd_hda_mixer_bind_switch_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x43bd8807	snd_hda_input_mux_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x44ecf787	snd_hda_find_mixer_ctl
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x49e3a32f	snd_hda_mixer_amp_volume_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4b073066	snd_hda_power_up
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4c2c1552	snd_hda_detach_beep_device
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4dc104f6	snd_hda_add_vmaster
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4eee1c6c	snd_hda_codec_amp_stereo
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x50c7876c	snd_hda_query_pin_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x548ab07e	snd_hda_codec_set_pincfg
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x55dd3339	snd_hda_multi_out_dig_open
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5a3b1c50	query_amp_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5ae76f73	auto_pin_cfg_labels
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5fcd4041	snd_hda_mixer_amp_switch_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x61094c4f	snd_hda_sequence_write_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x617d584c	snd_hda_get_sub_nodes
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x638214f9	snd_hda_suspend
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x70133d78	snd_hda_mixer_bind_ctls_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7e685ec1	snd_hda_codec_read
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7f42f95f	snd_hda_delete_codec_preset
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x80563093	snd_hda_mixer_bind_switch_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x827d78c9	snd_hda_get_bool_hint
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x867d2859	snd_hda_multi_out_dig_prepare
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x86fa9c67	snd_hda_codec_resume_amp
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x88bceaa1	snd_hda_codec_amp_read
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x892a07d1	snd_hda_multi_out_analog_prepare
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8b606828	snd_hda_multi_out_dig_close
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x90507249	snd_hda_codec_write_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x908e91cc	snd_hda_mixer_amp_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9a8e1877	snd_array_free
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9bf1d677	snd_hda_mixer_amp_volume_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9ec39f70	snd_hda_codec_configure
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9ffac133	snd_hda_codec_resume_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa2014820	snd_hda_mixer_bind_ctls_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa2827d76	snd_hda_get_jack_location
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa3f8fe41	snd_hda_get_hint
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xad87613e	snd_print_pcm_rates
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xae198232	snd_hda_codec_cleanup_stream
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xae407bf4	snd_hda_multi_out_analog_open
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xaebd14c2	snd_hda_create_spdif_share_sw
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xafc3d83b	snd_hda_bind_sw
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb2cf0643	snd_hda_check_board_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb2fddcd0	snd_hda_create_spdif_out_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb6afe1d7	snd_hda_attach_beep_device
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbe7dd7dc	snd_array_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc34a54c6	snd_hda_calc_stream_format
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc632df61	snd_hda_codec_amp_update
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc652fd69	snd_hda_get_jack_connectivity
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcaca07a1	snd_hda_power_down
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcb301b6e	snd_hda_get_jack_type
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcce27eb0	snd_hda_input_mux_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd0d11519	snd_hda_add_new_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xdcc44a06	snd_hda_codec_get_pincfg
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xdece18fa	snd_hda_codec_setup_stream
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe4ec58b7	snd_hda_sequence_write
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe66ce28f	snd_hda_mixer_amp_switch_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe6a6223d	snd_hda_ctl_add
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe7f46bd7	snd_hda_codec_write
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeb692292	snd_hda_ch_mode_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xecc5e182	snd_hda_set_vmaster_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeda3a721	snd_print_pcm_bits
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xef06cfe2	snd_hda_parse_pin_def_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf04201e1	snd_hda_mixer_amp_volume_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf0514a2b	snd_hda_create_spdif_in_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf88cb944	snd_hda_mixer_bind_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xfbbfa4d7	snd_hda_codec_new
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1836 0x27f423f5	soc_codec_dev_ad1836
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1836 0xff324cc2	ad1836_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1938 0x01cb691e	soc_codec_dev_ad1938
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1938 0x09922d2c	ad1938_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0x2a6c3cfa	ad73311_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0xd383da6c	soc_codec_dev_ad73311
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4104 0x3eddad09	soc_codec_device_ak4104
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0x593f357f	ak4535_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0xc705954e	soc_codec_dev_ak4535
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4642 0x0f123caa	ak4642_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4642 0x9fbebae2	soc_codec_dev_ak4642
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0x355140b9	soc_codec_device_cs4270
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0x9b6df11b	cs4270_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-l3 0x78c84c7e	l3_write
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-max9877 0x02714ea3	max9877_add_controls
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0x352bc3f4	pcm3008_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0xc9958056	soc_codec_dev_pcm3008
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-spdif 0xca17c750	dit_stub_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0x9ccceb6d	ssm2602_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0xc220859d	soc_codec_dev_ssm2602
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0x72176d9e	soc_codec_dev_tlv320aic23
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0x7a27dab8	tlv320aic23_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0x52a7c485	aic26_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0x572b70ab	aic26_soc_codec_dev
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x2140a6fb	aic3x_headset_detected
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x45912188	aic3x_set_headset_detection
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x5894be1b	aic3x_button_pressed
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x8b90e091	soc_codec_dev_aic3x
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xb81872b1	aic3x_get_gpio
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xc182a42d	aic3x_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xd2ade305	aic3x_set_gpio
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0x6dad0d95	soc_codec_dev_twl4030
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0xd42528c7	twl4030_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda134x 0xac156b90	soc_codec_dev_uda134x
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x66655d10	uda1380_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x9daf57f9	soc_codec_dev_uda1380
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0x12dcbb75	wm_hubs_add_analogue_routes
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0x55ad5b5e	wm_hubs_add_analogue_controls
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0x757206d5	wm_hubs_spkmix_tlv
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x4e8d9677	wm8350_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x7e2af4e7	soc_codec_dev_wm8350
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0xd22aea94	wm8350_hp_jack_detect
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x1670b0c9	wm8400_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0xe5360eb5	soc_codec_dev_wm8400
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0x3304383e	wm8510_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0xae51128d	soc_codec_dev_wm8510
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8523 0x8478500d	wm8523_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8523 0x873aff17	soc_codec_dev_wm8523
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0xa1802902	soc_codec_dev_wm8580
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0xab03b3a3	wm8580_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0xac9aa7b3	wm8728_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0xcec7ee57	soc_codec_dev_wm8728
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x1ec73f29	soc_codec_dev_wm8731
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x2de2fdcf	wm8731_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x035172da	soc_codec_dev_wm8750
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x856e1b50	wm8750_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0x10792647	wm8753_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0x287c2119	soc_codec_dev_wm8753
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8776 0x568f0132	soc_codec_dev_wm8776
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8776 0xd9dea9bd	wm8776_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0xc2dc26c5	wm8900_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0xe545c702	soc_codec_dev_wm8900
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0x4448546b	wm8903_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0xce6894c1	soc_codec_dev_wm8903
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0x369302d6	wm8940_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0xe24c6fde	soc_codec_dev_wm8940
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0xa10c13ff	wm8960_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0xe1c8bbb0	soc_codec_dev_wm8960
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8961 0x6a50c05a	wm8961_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8961 0xf8d38af1	soc_codec_dev_wm8961
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0xcc27cbee	wm8971_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0xf911e0c6	soc_codec_dev_wm8971
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8974 0x84661483	soc_codec_dev_wm8974
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8974 0x9cea5a5d	wm8974_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0x1d60eacf	wm8988_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0x238f1cb2	soc_codec_dev_wm8988
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0x57446316	wm8990_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0xea94fc8d	soc_codec_dev_wm8990
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8993 0xc1b9af4e	soc_codec_dev_wm8993
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8993 0xd1d011b8	wm8993_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0x325bb46f	wm9081_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0xb225c1c1	soc_codec_dev_wm9081
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x045473f1	snd_soc_dapm_add_routes
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x06d8ec39	snd_soc_unregister_platform
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1313b23c	snd_soc_register_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x16e3d356	snd_soc_dapm_free
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x18d1fdd4	snd_soc_register_dais
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1b9e30fe	snd_soc_jack_add_gpios
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1c57f07d	snd_soc_new_pcms
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x22996bc3	snd_soc_info_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2502d8c3	snd_soc_dapm_enable_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x287687af	snd_soc_get_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x29cde712	snd_soc_free_ac97_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x304b8139	snd_soc_dapm_new_controls
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x334a4ee2	snd_soc_jack_add_pins
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x33a51ea6	snd_soc_jack_report
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x352aa21c	snd_soc_cnew
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x36aaf4df	snd_soc_dapm_put_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x38f493d2	snd_soc_get_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3daefaa2	snd_soc_dapm_disable_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x42290710	snd_soc_dai_set_tdm_slot
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x439d82fc	snd_soc_set_runtime_hwparams
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4cc92bea	snd_soc_jack_free_gpios
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4eb77a79	snd_soc_dai_digital_mute
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x560968c8	snd_soc_dai_set_pll
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6013985d	snd_soc_register_dai
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x62029f8a	snd_soc_dai_set_tristate
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6357d509	snd_soc_dapm_get_pin_status
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6d22d219	snd_soc_dapm_put_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6e1ba6f8	snd_soc_info_enum_ext
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x73a913f7	snd_soc_dapm_put_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x73b112a9	snd_soc_new_ac97_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x78200bf7	snd_soc_dapm_get_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7f73f208	snd_soc_dapm_put_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x81dece6c	snd_soc_suspend_device
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8682b16c	snd_soc_dapm_nc_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8d043627	snd_soc_info_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9c1ff65e	snd_soc_test_bits
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9e27a090	snd_soc_dapm_stream_event
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa0137f4c	snd_soc_dai_set_fmt
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa13585bc	snd_soc_put_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa1b6180a	snd_soc_dapm_get_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa886b4d4	snd_soc_free_pcms
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xaa743e4b	snd_soc_unregister_dais
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xad836c01	snd_soc_dai_set_sysclk
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xae6a07d1	snd_soc_get_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb0c770be	snd_soc_unregister_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb47d2fa6	snd_soc_register_platform
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb4840a4a	snd_soc_put_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb74a266a	snd_soc_get_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb815a407	snd_soc_put_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb9e14ffc	snd_soc_codec_volatile_register
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xbada6d47	snd_soc_dapm_get_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xbc716a41	snd_soc_jack_new
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc113fcb1	snd_soc_info_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc11459b1	snd_soc_add_controls
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc17879f9	snd_soc_dapm_info_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc64bee1b	snd_soc_unregister_dai
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc8468ab1	snd_soc_info_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xcd35a79c	snd_soc_init_card
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd3940e9b	snd_soc_dapm_new_control
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd47c9007	snd_soc_dapm_sync
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd63beae6	snd_soc_get_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xdb13e3ef	dapm_reg_event
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xdbbcd9dc	snd_soc_dai_set_clkdiv
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xddb2f2e6	snd_soc_put_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xdf2912bc	snd_soc_update_bits
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xdf298740	snd_soc_dapm_new_widgets
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xe4e24dbc	snd_soc_put_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xe7ce74bc	snd_soc_dapm_get_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xee40bc18	snd_soc_info_volsw_ext
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf9477d4a	snd_soc_codec_set_cache_io
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xfae1425b	snd_soc_resume_device
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x2e0a0be5	xv_destroy_pool
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x51958fac	xv_malloc
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x7e80b9f6	xv_create_pool
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x9a79aa81	xv_free
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0xaf69699e	xv_get_object_size
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0xc1f55d16	xv_get_total_size_bytes
+EXPORT_SYMBOL_GPL vmlinux 0x001e4470	sata_set_spd
+EXPORT_SYMBOL_GPL vmlinux 0x002ff5a3	class_for_each_device
+EXPORT_SYMBOL_GPL vmlinux 0x00349e16	key_type_user
+EXPORT_SYMBOL_GPL vmlinux 0x003ed6a6	hpet_unregister_irq_handler
+EXPORT_SYMBOL_GPL vmlinux 0x00566d8f	inotify_get_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x0067df75	ata_tf_from_fis
+EXPORT_SYMBOL_GPL vmlinux 0x0077d878	pci_hp_remove_module_link
+EXPORT_SYMBOL_GPL vmlinux 0x009c8781	usb_put_intf
+EXPORT_SYMBOL_GPL vmlinux 0x00c78839	fuse_put_request
+EXPORT_SYMBOL_GPL vmlinux 0x00ebcb5d	ata_id_string
+EXPORT_SYMBOL_GPL vmlinux 0x00ebe324	ata_common_sdev_attrs
+EXPORT_SYMBOL_GPL vmlinux 0x010b3618	cpufreq_driver_target
+EXPORT_SYMBOL_GPL vmlinux 0x0110b3d1	register_hotplug_dock_device
+EXPORT_SYMBOL_GPL vmlinux 0x013e1be4	pm_runtime_resume
+EXPORT_SYMBOL_GPL vmlinux 0x0146be4b	blk_trace_setup
+EXPORT_SYMBOL_GPL vmlinux 0x014e6643	raw_seq_start
+EXPORT_SYMBOL_GPL vmlinux 0x016b9869	xfrm_calg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0x0174f3bf	crypto_unregister_alg
+EXPORT_SYMBOL_GPL vmlinux 0x01848a8e	local_apic_timer_c2_ok
+EXPORT_SYMBOL_GPL vmlinux 0x019da578	regulator_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x01a4ea6d	unregister_die_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x01a7de03	skb_partial_csum_set
+EXPORT_SYMBOL_GPL vmlinux 0x01b8fdb3	__srcu_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x01cb4883	__set_irq_handler
+EXPORT_SYMBOL_GPL vmlinux 0x01cdea51	sdio_align_size
+EXPORT_SYMBOL_GPL vmlinux 0x01e1a8de	kgdb_breakpoint
+EXPORT_SYMBOL_GPL vmlinux 0x01ed404a	crypto_lookup_template
+EXPORT_SYMBOL_GPL vmlinux 0x01ef071e	inet_csk_listen_start
+EXPORT_SYMBOL_GPL vmlinux 0x0248f8ef	skcipher_geniv_free
+EXPORT_SYMBOL_GPL vmlinux 0x02543efb	scsi_target_block
+EXPORT_SYMBOL_GPL vmlinux 0x029d03f1	pm_request_idle
+EXPORT_SYMBOL_GPL vmlinux 0x02ccea56	lock_policy_rwsem_write
+EXPORT_SYMBOL_GPL vmlinux 0x032a90da	clockevent_delta2ns
+EXPORT_SYMBOL_GPL vmlinux 0x0343bdf1	__i2c_board_list
+EXPORT_SYMBOL_GPL vmlinux 0x03b93f5d	sysdev_class_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x03e3686c	ata_timing_cycle2mode
+EXPORT_SYMBOL_GPL vmlinux 0x04069b1d	set_irq_nested_thread
+EXPORT_SYMBOL_GPL vmlinux 0x04486e88	rcu_batches_completed
+EXPORT_SYMBOL_GPL vmlinux 0x045b46a8	sysfs_schedule_callback
+EXPORT_SYMBOL_GPL vmlinux 0x047e024e	crypto_aead_type
+EXPORT_SYMBOL_GPL vmlinux 0x0489957c	hrtimer_init_sleeper
+EXPORT_SYMBOL_GPL vmlinux 0x0492f013	ata_std_bios_param
+EXPORT_SYMBOL_GPL vmlinux 0x04b4a333	class_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x04fb1ac5	single_release_net
+EXPORT_SYMBOL_GPL vmlinux 0x0508e606	ring_buffer_reset
+EXPORT_SYMBOL_GPL vmlinux 0x0531dcb8	ata_dev_classify
+EXPORT_SYMBOL_GPL vmlinux 0x054e550b	kernel_halt
+EXPORT_SYMBOL_GPL vmlinux 0x058a2f58	scsi_nl_sock
+EXPORT_SYMBOL_GPL vmlinux 0x05b8ebce	vfs_listxattr
+EXPORT_SYMBOL_GPL vmlinux 0x05d81a4f	led_trigger_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x05ff6ff7	ata_dummy_port_info
+EXPORT_SYMBOL_GPL vmlinux 0x060d1064	set_memory_ro
+EXPORT_SYMBOL_GPL vmlinux 0x0619ca8a	getboottime
+EXPORT_SYMBOL_GPL vmlinux 0x062a3eb8	register_net_sysctl_table
+EXPORT_SYMBOL_GPL vmlinux 0x064db9a5	mark_mounts_for_expiry
+EXPORT_SYMBOL_GPL vmlinux 0x06605ecb	debugfs_remove_recursive
+EXPORT_SYMBOL_GPL vmlinux 0x06734576	bus_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x06778eb2	mnt_want_write_file
+EXPORT_SYMBOL_GPL vmlinux 0x06a551ef	ata_pio_queue_task
+EXPORT_SYMBOL_GPL vmlinux 0x06f38a41	ata_sff_tf_load
+EXPORT_SYMBOL_GPL vmlinux 0x071bf1c1	br_handle_frame_hook
+EXPORT_SYMBOL_GPL vmlinux 0x0725f9d1	xfrm_audit_policy_add
+EXPORT_SYMBOL_GPL vmlinux 0x07484db3	usb_anchor_urb
+EXPORT_SYMBOL_GPL vmlinux 0x0782099b	each_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x07b52e38	rtnl_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x07be2862	crypto_ahash_digest
+EXPORT_SYMBOL_GPL vmlinux 0x07ce7344	trace_seq_vprintf
+EXPORT_SYMBOL_GPL vmlinux 0x0800619a	sdio_claim_irq
+EXPORT_SYMBOL_GPL vmlinux 0x0804e27a	usb_remove_hcd
+EXPORT_SYMBOL_GPL vmlinux 0x080df92b	ata_base_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x081e4f62	kobject_uevent_env
+EXPORT_SYMBOL_GPL vmlinux 0x08a3e5d1	net_ipv6_ctl_path
+EXPORT_SYMBOL_GPL vmlinux 0x08b069c9	__sock_recv_timestamp
+EXPORT_SYMBOL_GPL vmlinux 0x08c6cd01	ip_route_output_flow
+EXPORT_SYMBOL_GPL vmlinux 0x08f6f7f3	dm_device_name
+EXPORT_SYMBOL_GPL vmlinux 0x091eb9b4	round_jiffies
+EXPORT_SYMBOL_GPL vmlinux 0x0924dad6	inet_unhash
+EXPORT_SYMBOL_GPL vmlinux 0x09adbd97	ata_sff_check_status
+EXPORT_SYMBOL_GPL vmlinux 0x09be91ec	pci_find_ext_capability
+EXPORT_SYMBOL_GPL vmlinux 0x09d60450	bus_for_each_drv
+EXPORT_SYMBOL_GPL vmlinux 0x0a254565	device_release_driver
+EXPORT_SYMBOL_GPL vmlinux 0x0a415fff	ring_buffer_overruns
+EXPORT_SYMBOL_GPL vmlinux 0x0a6cb76f	cpuidle_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0x0a90af6f	register_ftrace_event
+EXPORT_SYMBOL_GPL vmlinux 0x0aee9879	crypto_alloc_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0x0b07abe2	unshare_fs_struct
+EXPORT_SYMBOL_GPL vmlinux 0x0b6f526b	ata_port_schedule_eh
+EXPORT_SYMBOL_GPL vmlinux 0x0b91b3ac	tty_ldisc_ref
+EXPORT_SYMBOL_GPL vmlinux 0x0bd77544	sdev_evt_send
+EXPORT_SYMBOL_GPL vmlinux 0x0bfc88ef	ata_sff_wait_after_reset
+EXPORT_SYMBOL_GPL vmlinux 0x0c01d97e	regulator_force_disable
+EXPORT_SYMBOL_GPL vmlinux 0x0c2cdbf1	synchronize_sched
+EXPORT_SYMBOL_GPL vmlinux 0x0c3f9026	register_posix_clock
+EXPORT_SYMBOL_GPL vmlinux 0x0c805f93	clflush_cache_range
+EXPORT_SYMBOL_GPL vmlinux 0x0cb88680	__tracepoint_block_rq_remap
+EXPORT_SYMBOL_GPL vmlinux 0x0d0ec7a5	da903x_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x0d12199a	xfrm_audit_state_notfound_simple
+EXPORT_SYMBOL_GPL vmlinux 0x0d186d6b	hwmon_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x0d3016f2	ipv6_opt_accepted
+EXPORT_SYMBOL_GPL vmlinux 0x0d63de99	acpi_smbus_write
+EXPORT_SYMBOL_GPL vmlinux 0x0deb0ade	register_timer_hook
+EXPORT_SYMBOL_GPL vmlinux 0x0e109316	spi_get_device_id
+EXPORT_SYMBOL_GPL vmlinux 0x0e7de34f	crypto_register_template
+EXPORT_SYMBOL_GPL vmlinux 0x0ed04ea8	regulator_is_enabled
+EXPORT_SYMBOL_GPL vmlinux 0x0ef2970a	shash_ahash_finup
+EXPORT_SYMBOL_GPL vmlinux 0x0f3d4514	inet_diag_register
+EXPORT_SYMBOL_GPL vmlinux 0x0f4142b3	inet6_csk_reqsk_queue_hash_add
+EXPORT_SYMBOL_GPL vmlinux 0x0f52f2b6	ata_cable_ignore
+EXPORT_SYMBOL_GPL vmlinux 0x0f5919bf	sysfs_get_dirent
+EXPORT_SYMBOL_GPL vmlinux 0x0f6b1d3f	sdio_memcpy_fromio
+EXPORT_SYMBOL_GPL vmlinux 0x0f73520f	klist_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0x0f7e60dc	ata_do_set_mode
+EXPORT_SYMBOL_GPL vmlinux 0x0f824a3b	platform_get_resource
+EXPORT_SYMBOL_GPL vmlinux 0x0fa00085	rtc_irq_set_state
+EXPORT_SYMBOL_GPL vmlinux 0x0fc8ae18	inode_add_to_lists
+EXPORT_SYMBOL_GPL vmlinux 0x0ff2df02	blk_queue_dma_drain
+EXPORT_SYMBOL_GPL vmlinux 0x100c13c6	usb_kill_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0x100c48a2	unregister_dock_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x10138352	tracing_on
+EXPORT_SYMBOL_GPL vmlinux 0x10173b7d	regulator_bulk_disable
+EXPORT_SYMBOL_GPL vmlinux 0x101c923e	__tracepoint_power_start
+EXPORT_SYMBOL_GPL vmlinux 0x1029946f	tcp_set_state
+EXPORT_SYMBOL_GPL vmlinux 0x1034b866	sdio_writel
+EXPORT_SYMBOL_GPL vmlinux 0x1038bfc3	usb_unanchor_urb
+EXPORT_SYMBOL_GPL vmlinux 0x103b7a91	pm_runtime_enable
+EXPORT_SYMBOL_GPL vmlinux 0x104fce35	unregister_pernet_gen_subsys
+EXPORT_SYMBOL_GPL vmlinux 0x10621889	hpet_rtc_interrupt
+EXPORT_SYMBOL_GPL vmlinux 0x109d98a3	fib_rules_cleanup_ops
+EXPORT_SYMBOL_GPL vmlinux 0x10c5f808	get_driver
+EXPORT_SYMBOL_GPL vmlinux 0x10da02cd	sysdev_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x11303819	tty_put_char
+EXPORT_SYMBOL_GPL vmlinux 0x1178ae1f	usb_hcd_link_urb_to_ep
+EXPORT_SYMBOL_GPL vmlinux 0x118bdf4a	blkcipher_walk_phys
+EXPORT_SYMBOL_GPL vmlinux 0x119660a9	crypto_alloc_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x11e10b3b	ata_pci_bmdma_clear_simplex
+EXPORT_SYMBOL_GPL vmlinux 0x11f447ce	__gpio_to_irq
+EXPORT_SYMBOL_GPL vmlinux 0x12407b9e	crypto_hash_walk_first
+EXPORT_SYMBOL_GPL vmlinux 0x124f2056	crypto_get_attr_type
+EXPORT_SYMBOL_GPL vmlinux 0x1251d30f	call_rcu
+EXPORT_SYMBOL_GPL vmlinux 0x125d609c	tcp_cong_avoid_ai
+EXPORT_SYMBOL_GPL vmlinux 0x1263b94e	usb_hub_clear_tt_buffer
+EXPORT_SYMBOL_GPL vmlinux 0x1268f357	resume_device_irqs
+EXPORT_SYMBOL_GPL vmlinux 0x126d44e4	__trace_note_message
+EXPORT_SYMBOL_GPL vmlinux 0x1272e1d4	ata_do_dev_read_id
+EXPORT_SYMBOL_GPL vmlinux 0x12788c2a	pskb_put
+EXPORT_SYMBOL_GPL vmlinux 0x127e6a46	tcp_register_congestion_control
+EXPORT_SYMBOL_GPL vmlinux 0x12c71a61	usb_sg_cancel
+EXPORT_SYMBOL_GPL vmlinux 0x12d35637	sysfs_notify
+EXPORT_SYMBOL_GPL vmlinux 0x13354608	scatterwalk_map_and_copy
+EXPORT_SYMBOL_GPL vmlinux 0x136a4bac	simple_attr_read
+EXPORT_SYMBOL_GPL vmlinux 0x13b2a946	register_keyboard_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x13d0200e	dm_unregister_path_selector
+EXPORT_SYMBOL_GPL vmlinux 0x13e5a0f7	uart_set_options
+EXPORT_SYMBOL_GPL vmlinux 0x14418c59	ata_sff_hsm_move
+EXPORT_SYMBOL_GPL vmlinux 0x14596d2d	ata_port_freeze
+EXPORT_SYMBOL_GPL vmlinux 0x149db923	selinux_string_to_sid
+EXPORT_SYMBOL_GPL vmlinux 0x153dd358	put_inotify_watch
+EXPORT_SYMBOL_GPL vmlinux 0x1551d13f	inet_csk_search_req
+EXPORT_SYMBOL_GPL vmlinux 0x156257e3	apic
+EXPORT_SYMBOL_GPL vmlinux 0x15892417	async_synchronize_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x1598dc9d	unregister_netevent_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x15b0606e	e820_any_mapped
+EXPORT_SYMBOL_GPL vmlinux 0x15badb33	crypto_ahash_setkey
+EXPORT_SYMBOL_GPL vmlinux 0x161bb890	setup_irq
+EXPORT_SYMBOL_GPL vmlinux 0x16249efd	ipv6_dup_options
+EXPORT_SYMBOL_GPL vmlinux 0x16836e04	speedstep_detect_processor
+EXPORT_SYMBOL_GPL vmlinux 0x1697136d	hrtimer_init
+EXPORT_SYMBOL_GPL vmlinux 0x16c508be	platform_device_add_resources
+EXPORT_SYMBOL_GPL vmlinux 0x16c57b0c	unregister_jprobes
+EXPORT_SYMBOL_GPL vmlinux 0x16c639e7	ata_dummy_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x16f76869	probe_kernel_read
+EXPORT_SYMBOL_GPL vmlinux 0x171b577b	unregister_kprobes
+EXPORT_SYMBOL_GPL vmlinux 0x1720e969	input_ff_upload
+EXPORT_SYMBOL_GPL vmlinux 0x172e72d4	vdso_enabled
+EXPORT_SYMBOL_GPL vmlinux 0x1779439f	ata_sff_drain_fifo
+EXPORT_SYMBOL_GPL vmlinux 0x180a3eb9	file_ra_state_init
+EXPORT_SYMBOL_GPL vmlinux 0x182796d9	inet_hash
+EXPORT_SYMBOL_GPL vmlinux 0x182b4539	cpufreq_unregister_governor
+EXPORT_SYMBOL_GPL vmlinux 0x18583aac	sdio_readsb
+EXPORT_SYMBOL_GPL vmlinux 0x185e2600	regulator_get_current_limit
+EXPORT_SYMBOL_GPL vmlinux 0x18678cc3	part_round_stats
+EXPORT_SYMBOL_GPL vmlinux 0x1878f62b	edac_err_assert
+EXPORT_SYMBOL_GPL vmlinux 0x1890c7a2	inotify_dentry_parent_queue_event
+EXPORT_SYMBOL_GPL vmlinux 0x18d53420	kgdb_register_io_module
+EXPORT_SYMBOL_GPL vmlinux 0x18d9ed83	mce_chrdev_ops
+EXPORT_SYMBOL_GPL vmlinux 0x1928bd1f	sysfs_get
+EXPORT_SYMBOL_GPL vmlinux 0x197dbe54	gpiochip_add
+EXPORT_SYMBOL_GPL vmlinux 0x19a304ba	usb_disabled
+EXPORT_SYMBOL_GPL vmlinux 0x19aadb0e	scsi_dh_attach
+EXPORT_SYMBOL_GPL vmlinux 0x1a306122	lookup_create
+EXPORT_SYMBOL_GPL vmlinux 0x1a323362	__ftrace_vbprintk
+EXPORT_SYMBOL_GPL vmlinux 0x1a39863d	ata_sff_wait_ready
+EXPORT_SYMBOL_GPL vmlinux 0x1a474901	tracepoint_probe_unregister_noupdate
+EXPORT_SYMBOL_GPL vmlinux 0x1a938737	atomic_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x1a9b538e	ehci_cf_port_reset_rwsem
+EXPORT_SYMBOL_GPL vmlinux 0x1ac885b1	tty_mode_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x1acda5b2	atomic_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x1b3eba8d	register_net_sysctl_rotable
+EXPORT_SYMBOL_GPL vmlinux 0x1b90ac8a	ata_bmdma32_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x1b9aca3f	jprobe_return
+EXPORT_SYMBOL_GPL vmlinux 0x1bcdc539	__crypto_alloc_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x1c5ab484	k_handler
+EXPORT_SYMBOL_GPL vmlinux 0x1c7b6c2a	eventfd_ctx_fdget
+EXPORT_SYMBOL_GPL vmlinux 0x1c852e7c	xfrm_calg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x1c87a811	__round_jiffies_up
+EXPORT_SYMBOL_GPL vmlinux 0x1ccb1b0d	ata_sff_freeze
+EXPORT_SYMBOL_GPL vmlinux 0x1d28d92f	debugfs_create_dir
+EXPORT_SYMBOL_GPL vmlinux 0x1d801b8b	ip_build_and_send_pkt
+EXPORT_SYMBOL_GPL vmlinux 0x1d8f8059	__tracepoint_power_end
+EXPORT_SYMBOL_GPL vmlinux 0x1d9cd49a	ata_scsi_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x1db21d74	__tracepoint_kfree_skb
+EXPORT_SYMBOL_GPL vmlinux 0x1dee2629	trace_current_buffer_lock_reserve
+EXPORT_SYMBOL_GPL vmlinux 0x1e0aaaaf	inet_twsk_purge
+EXPORT_SYMBOL_GPL vmlinux 0x1e682e94	pci_enable_sriov
+EXPORT_SYMBOL_GPL vmlinux 0x1e7bbcb3	kernel_restart
+EXPORT_SYMBOL_GPL vmlinux 0x1e929cf7	user_describe
+EXPORT_SYMBOL_GPL vmlinux 0x1eb8e160	isa_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0x1eb9516e	round_jiffies_relative
+EXPORT_SYMBOL_GPL vmlinux 0x1ebf6c2a	pci_power_names
+EXPORT_SYMBOL_GPL vmlinux 0x1ee9c7dc	inet_csk_route_req
+EXPORT_SYMBOL_GPL vmlinux 0x1eed061e	xfrm_output
+EXPORT_SYMBOL_GPL vmlinux 0x1f3d1b77	crypto_alg_sem
+EXPORT_SYMBOL_GPL vmlinux 0x1f8ec1b3	acpi_get_pci_rootbridge_handle
+EXPORT_SYMBOL_GPL vmlinux 0x1fa2f0c2	sysdev_store_int
+EXPORT_SYMBOL_GPL vmlinux 0x1fcece42	inet_twdr_twcal_tick
+EXPORT_SYMBOL_GPL vmlinux 0x205dcd7a	klist_add_tail
+EXPORT_SYMBOL_GPL vmlinux 0x20bc3470	orderly_poweroff
+EXPORT_SYMBOL_GPL vmlinux 0x20d80fdf	usb_sg_init
+EXPORT_SYMBOL_GPL vmlinux 0x20e01bc9	__class_create
+EXPORT_SYMBOL_GPL vmlinux 0x20edf1bd	pid_vnr
+EXPORT_SYMBOL_GPL vmlinux 0x20f64759	__ring_buffer_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x215db6e9	tracepoint_probe_register_noupdate
+EXPORT_SYMBOL_GPL vmlinux 0x216b983e	usb_get_current_frame_number
+EXPORT_SYMBOL_GPL vmlinux 0x216d19f0	dm_path_uevent
+EXPORT_SYMBOL_GPL vmlinux 0x21e0a633	dm_rh_start_recovery
+EXPORT_SYMBOL_GPL vmlinux 0x22095df2	fuse_conn_get
+EXPORT_SYMBOL_GPL vmlinux 0x2224dfa0	crypto_enqueue_request
+EXPORT_SYMBOL_GPL vmlinux 0x223064b9	pm_runtime_idle
+EXPORT_SYMBOL_GPL vmlinux 0x2296c00d	crypto_attr_u32
+EXPORT_SYMBOL_GPL vmlinux 0x22eda46b	regulator_count_voltages
+EXPORT_SYMBOL_GPL vmlinux 0x22ff0c83	pci_msi_off
+EXPORT_SYMBOL_GPL vmlinux 0x23253735	power_supply_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x23314a32	inotify_rm_watch
+EXPORT_SYMBOL_GPL vmlinux 0x23679939	__iowrite32_copy
+EXPORT_SYMBOL_GPL vmlinux 0x23864ce7	cpuset_mem_spread_node
+EXPORT_SYMBOL_GPL vmlinux 0x23869dc7	cancel_work_sync
+EXPORT_SYMBOL_GPL vmlinux 0x239a44bf	crypto_grab_aead
+EXPORT_SYMBOL_GPL vmlinux 0x2405ef3f	spi_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0x240b739a	iomap_create_wc
+EXPORT_SYMBOL_GPL vmlinux 0x2426ba64	scsi_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x24297e77	scsi_dh_detach
+EXPORT_SYMBOL_GPL vmlinux 0x2447533c	ktime_get_real
+EXPORT_SYMBOL_GPL vmlinux 0x246f4153	pv_time_ops
+EXPORT_SYMBOL_GPL vmlinux 0x24748a9c	get_current_tty
+EXPORT_SYMBOL_GPL vmlinux 0x24a0d51d	ring_buffer_reset_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x24a2611e	hvc_instantiate
+EXPORT_SYMBOL_GPL vmlinux 0x24d11b77	skb_cow_data
+EXPORT_SYMBOL_GPL vmlinux 0x24eb7e32	leds_list
+EXPORT_SYMBOL_GPL vmlinux 0x252a3ccb	tcp_unregister_congestion_control
+EXPORT_SYMBOL_GPL vmlinux 0x25a09262	scsi_internal_device_block
+EXPORT_SYMBOL_GPL vmlinux 0x25addbd8	ring_buffer_peek
+EXPORT_SYMBOL_GPL vmlinux 0x25bcf256	shash_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0x25d46f3e	da903x_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x260dc92b	usb_hcd_platform_shutdown
+EXPORT_SYMBOL_GPL vmlinux 0x264886e9	rtc_set_time
+EXPORT_SYMBOL_GPL vmlinux 0x267cd1c0	platform_bus
+EXPORT_SYMBOL_GPL vmlinux 0x2698e29c	rtc_update_irq_enable
+EXPORT_SYMBOL_GPL vmlinux 0x26c90ea4	scsi_eh_get_sense
+EXPORT_SYMBOL_GPL vmlinux 0x26d4723d	unregister_net_sysctl_table
+EXPORT_SYMBOL_GPL vmlinux 0x26df3c61	crypto_shoot_alg
+EXPORT_SYMBOL_GPL vmlinux 0x26eba495	synchronize_srcu
+EXPORT_SYMBOL_GPL vmlinux 0x2714a01f	device_find_child
+EXPORT_SYMBOL_GPL vmlinux 0x272bec72	usb_root_hub_lost_power
+EXPORT_SYMBOL_GPL vmlinux 0x2747cb18	tcp_twsk_destructor
+EXPORT_SYMBOL_GPL vmlinux 0x275045ed	crypto_unregister_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0x2787db00	vbin_printf
+EXPORT_SYMBOL_GPL vmlinux 0x27893d39	usb_match_id
+EXPORT_SYMBOL_GPL vmlinux 0x27adf232	tracing_generic_entry_update
+EXPORT_SYMBOL_GPL vmlinux 0x27b74afd	crypto_alloc_aead
+EXPORT_SYMBOL_GPL vmlinux 0x28290453	init_srcu_struct
+EXPORT_SYMBOL_GPL vmlinux 0x284be072	usb_driver_release_interface
+EXPORT_SYMBOL_GPL vmlinux 0x2894d26d	debugfs_create_x32
+EXPORT_SYMBOL_GPL vmlinux 0x28d3eaa7	crypto_ahash_finup
+EXPORT_SYMBOL_GPL vmlinux 0x28d664ff	__raw_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x28e23139	xfrm_probe_algs
+EXPORT_SYMBOL_GPL vmlinux 0x2916edfa	tcp_reno_ssthresh
+EXPORT_SYMBOL_GPL vmlinux 0x292132ed	usb_deregister
+EXPORT_SYMBOL_GPL vmlinux 0x29501527	klist_iter_init_node
+EXPORT_SYMBOL_GPL vmlinux 0x2980c410	power_supply_am_i_supplied
+EXPORT_SYMBOL_GPL vmlinux 0x298ba62f	__inet_hash_nolisten
+EXPORT_SYMBOL_GPL vmlinux 0x2a010ab1	usb_get_status
+EXPORT_SYMBOL_GPL vmlinux 0x2a56e017	filter_match_preds
+EXPORT_SYMBOL_GPL vmlinux 0x2a678a13	__suspend_report_result
+EXPORT_SYMBOL_GPL vmlinux 0x2a7209a1	md_do_sync
+EXPORT_SYMBOL_GPL vmlinux 0x2a8474dd	securityfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x2aa10291	usb_lock_device_for_reset
+EXPORT_SYMBOL_GPL vmlinux 0x2ab7cd0b	ata_sff_qc_fill_rtf
+EXPORT_SYMBOL_GPL vmlinux 0x2ac1d500	__mmdrop
+EXPORT_SYMBOL_GPL vmlinux 0x2af90271	speedstep_get_frequency
+EXPORT_SYMBOL_GPL vmlinux 0x2b9f8e23	nf_net_ipv4_netfilter_sysctl_path
+EXPORT_SYMBOL_GPL vmlinux 0x2bbaf669	tty_get_pgrp
+EXPORT_SYMBOL_GPL vmlinux 0x2bbbd9fe	ata_eh_qc_complete
+EXPORT_SYMBOL_GPL vmlinux 0x2bc06b1f	blk_rq_err_bytes
+EXPORT_SYMBOL_GPL vmlinux 0x2be3a2eb	sata_pmp_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x2be7fb8e	disable_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0x2bfc4d7f	tracepoint_get_iter_range
+EXPORT_SYMBOL_GPL vmlinux 0x2bfd8ad2	xfrm_audit_state_icvfail
+EXPORT_SYMBOL_GPL vmlinux 0x2c208607	power_supply_is_system_supplied
+EXPORT_SYMBOL_GPL vmlinux 0x2c8af2a8	pci_configure_slot
+EXPORT_SYMBOL_GPL vmlinux 0x2ce07e63	seq_release_net
+EXPORT_SYMBOL_GPL vmlinux 0x2ce98559	kcrypto_wq
+EXPORT_SYMBOL_GPL vmlinux 0x2d49dea5	dev_attr_unload_heads
+EXPORT_SYMBOL_GPL vmlinux 0x2d53afee	anon_transport_class_register
+EXPORT_SYMBOL_GPL vmlinux 0x2d7ec441	__pm_runtime_get
+EXPORT_SYMBOL_GPL vmlinux 0x2d9f2ce3	sched_clock_idle_wakeup_event
+EXPORT_SYMBOL_GPL vmlinux 0x2dd11777	devres_remove_group
+EXPORT_SYMBOL_GPL vmlinux 0x2dd8444c	trace_seq_printf
+EXPORT_SYMBOL_GPL vmlinux 0x2de0bb64	crypto_dequeue_request
+EXPORT_SYMBOL_GPL vmlinux 0x2e082fe1	fuse_sync_release
+EXPORT_SYMBOL_GPL vmlinux 0x2e47f677	xfrm_aalg_get_byidx
+EXPORT_SYMBOL_GPL vmlinux 0x2e5e53b7	scsi_mode_select
+EXPORT_SYMBOL_GPL vmlinux 0x2e81a831	init_user_ns
+EXPORT_SYMBOL_GPL vmlinux 0x2eb91dfe	scatterwalk_map
+EXPORT_SYMBOL_GPL vmlinux 0x2ebd80f3	scsi_internal_device_unblock
+EXPORT_SYMBOL_GPL vmlinux 0x2f0209e1	rt_mutex_trylock
+EXPORT_SYMBOL_GPL vmlinux 0x2f47d8c7	cpufreq_frequency_get_table
+EXPORT_SYMBOL_GPL vmlinux 0x2f857551	machine_check_poll
+EXPORT_SYMBOL_GPL vmlinux 0x2fcd9e17	dpm_resume_noirq
+EXPORT_SYMBOL_GPL vmlinux 0x3032b4cf	platform_device_put
+EXPORT_SYMBOL_GPL vmlinux 0x30634b60	usb_match_one_id
+EXPORT_SYMBOL_GPL vmlinux 0x307941da	dev_change_net_namespace
+EXPORT_SYMBOL_GPL vmlinux 0x30a4f4ca	bstr_printf
+EXPORT_SYMBOL_GPL vmlinux 0x30b97b1e	usb_store_new_id
+EXPORT_SYMBOL_GPL vmlinux 0x30bfce97	usb_reset_device
+EXPORT_SYMBOL_GPL vmlinux 0x30e40b90	usb_ifnum_to_if
+EXPORT_SYMBOL_GPL vmlinux 0x3103d84d	rtc_class_close
+EXPORT_SYMBOL_GPL vmlinux 0x3131b8e2	fib_rules_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x318920b1	register_dock_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x3189d4df	driver_register
+EXPORT_SYMBOL_GPL vmlinux 0x31988ac0	sata_sff_hardreset
+EXPORT_SYMBOL_GPL vmlinux 0x31c54454	spi_unregister_master
+EXPORT_SYMBOL_GPL vmlinux 0x31d5bcfe	sata_scr_write
+EXPORT_SYMBOL_GPL vmlinux 0x31edbcb2	crypto_find_alg
+EXPORT_SYMBOL_GPL vmlinux 0x3202cf22	bdi_writeout_inc
+EXPORT_SYMBOL_GPL vmlinux 0x321d948a	dm_region_hash_create
+EXPORT_SYMBOL_GPL vmlinux 0x32d5e7fc	xfrm_aalg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x32d5ec86	ring_buffer_read
+EXPORT_SYMBOL_GPL vmlinux 0x32f17454	ring_buffer_event_data
+EXPORT_SYMBOL_GPL vmlinux 0x333da16b	pci_find_next_capability
+EXPORT_SYMBOL_GPL vmlinux 0x334e6848	__blkdev_driver_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x33606b39	usb_reset_configuration
+EXPORT_SYMBOL_GPL vmlinux 0x33cb1562	get_dcookie
+EXPORT_SYMBOL_GPL vmlinux 0x34275124	trace_current_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0x3441c3d6	gpio_set_value_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x34459182	usb_hcd_pci_pm_ops
+EXPORT_SYMBOL_GPL vmlinux 0x34636486	usb_debug_root
+EXPORT_SYMBOL_GPL vmlinux 0x347d81d9	regulator_set_voltage
+EXPORT_SYMBOL_GPL vmlinux 0x34828ee8	inet6_destroy_sock
+EXPORT_SYMBOL_GPL vmlinux 0x34e767ac	relay_close
+EXPORT_SYMBOL_GPL vmlinux 0x34f34c5a	tcp_slow_start
+EXPORT_SYMBOL_GPL vmlinux 0x353942ea	queue_delayed_work_on
+EXPORT_SYMBOL_GPL vmlinux 0x35a87ef2	acpi_ec_remove_query_handler
+EXPORT_SYMBOL_GPL vmlinux 0x35b44d01	blk_queue_lld_busy
+EXPORT_SYMBOL_GPL vmlinux 0x35be5708	transport_class_register
+EXPORT_SYMBOL_GPL vmlinux 0x35d8c94a	sdev_evt_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x35fa3962	sdio_release_irq
+EXPORT_SYMBOL_GPL vmlinux 0x35fd0312	per_cpu__injectm
+EXPORT_SYMBOL_GPL vmlinux 0x361b8930	firmware_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x361e2bcc	save_stack_trace
+EXPORT_SYMBOL_GPL vmlinux 0x362e23ec	call_rcu_bh
+EXPORT_SYMBOL_GPL vmlinux 0x365d2a67	fuse_abort_conn
+EXPORT_SYMBOL_GPL vmlinux 0x3714af78	put_device
+EXPORT_SYMBOL_GPL vmlinux 0x371c525f	init_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0x372c9ba3	devres_get
+EXPORT_SYMBOL_GPL vmlinux 0x374a690c	device_create
+EXPORT_SYMBOL_GPL vmlinux 0x375f57ef	sdio_readl
+EXPORT_SYMBOL_GPL vmlinux 0x377000f0	da903x_write
+EXPORT_SYMBOL_GPL vmlinux 0x37ad4176	__tracepoint_block_bio_complete
+EXPORT_SYMBOL_GPL vmlinux 0x37dc0546	platform_device_add_data
+EXPORT_SYMBOL_GPL vmlinux 0x383dd870	ata_ehi_clear_desc
+EXPORT_SYMBOL_GPL vmlinux 0x3841ab01	unregister_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0x3854b16c	__rt_mutex_init
+EXPORT_SYMBOL_GPL vmlinux 0x38840b4e	__dma_request_channel
+EXPORT_SYMBOL_GPL vmlinux 0x388d75b8	regulator_disable
+EXPORT_SYMBOL_GPL vmlinux 0x38a9c2c7	input_ff_effect_from_user
+EXPORT_SYMBOL_GPL vmlinux 0x38b08e90	fs_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x38ea936e	__memory_failure
+EXPORT_SYMBOL_GPL vmlinux 0x3916cb7b	ata_dev_disable
+EXPORT_SYMBOL_GPL vmlinux 0x39287f45	pcie_port_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x393fa9cb	dm_rh_update_states
+EXPORT_SYMBOL_GPL vmlinux 0x3950fd25	usb_alloc_urb
+EXPORT_SYMBOL_GPL vmlinux 0x3955b1a7	regulator_bulk_get
+EXPORT_SYMBOL_GPL vmlinux 0x3968d9f0	device_del
+EXPORT_SYMBOL_GPL vmlinux 0x3987ba15	ring_buffer_write
+EXPORT_SYMBOL_GPL vmlinux 0x39b14247	pci_disable_sriov
+EXPORT_SYMBOL_GPL vmlinux 0x3a18960c	unregister_kretprobe
+EXPORT_SYMBOL_GPL vmlinux 0x3a8ab7ae	__ata_ehi_push_desc
+EXPORT_SYMBOL_GPL vmlinux 0x3ab2b357	ata_eh_qc_retry
+EXPORT_SYMBOL_GPL vmlinux 0x3ab8ea8d	ata_sff_dev_classify
+EXPORT_SYMBOL_GPL vmlinux 0x3ac2ef70	devres_close_group
+EXPORT_SYMBOL_GPL vmlinux 0x3af5ccc6	usb_autopm_put_interface
+EXPORT_SYMBOL_GPL vmlinux 0x3b54bb9c	srcu_batches_completed
+EXPORT_SYMBOL_GPL vmlinux 0x3ba57bd2	crypto_register_shash
+EXPORT_SYMBOL_GPL vmlinux 0x3bba0f8a	blk_rq_unprep_clone
+EXPORT_SYMBOL_GPL vmlinux 0x3bd04670	class_find_device
+EXPORT_SYMBOL_GPL vmlinux 0x3be7af02	get_max_files
+EXPORT_SYMBOL_GPL vmlinux 0x3be89d3c	usb_register_notify
+EXPORT_SYMBOL_GPL vmlinux 0x3c01f67c	ata_sff_dma_pause
+EXPORT_SYMBOL_GPL vmlinux 0x3c2044f6	led_trigger_store
+EXPORT_SYMBOL_GPL vmlinux 0x3c2eefcf	generic_fh_to_dentry
+EXPORT_SYMBOL_GPL vmlinux 0x3c3cea8a	ata_sas_port_init
+EXPORT_SYMBOL_GPL vmlinux 0x3c5cba5f	__fsnotify_inode_delete
+EXPORT_SYMBOL_GPL vmlinux 0x3c6c45ca	__tracepoint_power_frequency
+EXPORT_SYMBOL_GPL vmlinux 0x3c80ced3	ata_sff_irq_clear
+EXPORT_SYMBOL_GPL vmlinux 0x3c884996	rdev_get_id
+EXPORT_SYMBOL_GPL vmlinux 0x3c942368	profile_event_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x3cd06035	add_input_randomness
+EXPORT_SYMBOL_GPL vmlinux 0x3cdd5d2c	elv_register
+EXPORT_SYMBOL_GPL vmlinux 0x3cfdfae5	trace_current_buffer_discard_commit
+EXPORT_SYMBOL_GPL vmlinux 0x3cfedb3f	register_pm_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x3d388324	dpm_resume_end
+EXPORT_SYMBOL_GPL vmlinux 0x3d6f8695	pci_destroy_slot
+EXPORT_SYMBOL_GPL vmlinux 0x3d9c52bd	ring_buffer_time_stamp
+EXPORT_SYMBOL_GPL vmlinux 0x3d9eacdf	inet_diag_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x3dd4d3a7	bprintf
+EXPORT_SYMBOL_GPL vmlinux 0x3dd52c77	generic_detach_inode
+EXPORT_SYMBOL_GPL vmlinux 0x3dd5d829	add_timer_on
+EXPORT_SYMBOL_GPL vmlinux 0x3dde0e07	amd_get_nb_id
+EXPORT_SYMBOL_GPL vmlinux 0x3e2004e9	platform_device_add
+EXPORT_SYMBOL_GPL vmlinux 0x3e757637	cpu_bit_bitmap
+EXPORT_SYMBOL_GPL vmlinux 0x3ecf6cfc	wmi_install_notify_handler
+EXPORT_SYMBOL_GPL vmlinux 0x3ef9d0ce	blk_abort_queue
+EXPORT_SYMBOL_GPL vmlinux 0x3efb35c9	get_online_cpus
+EXPORT_SYMBOL_GPL vmlinux 0x3f01570a	probe_kernel_write
+EXPORT_SYMBOL_GPL vmlinux 0x3f032c39	cpuidle_register_device
+EXPORT_SYMBOL_GPL vmlinux 0x3f0e7a1c	crypto_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x3f238101	dcookie_register
+EXPORT_SYMBOL_GPL vmlinux 0x3f3346f3	__fsnotify_parent
+EXPORT_SYMBOL_GPL vmlinux 0x3f5a1050	sysdev_driver_register
+EXPORT_SYMBOL_GPL vmlinux 0x3fc03ac8	inet_twsk_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x3fcfd6ba	crypto_unregister_template
+EXPORT_SYMBOL_GPL vmlinux 0x3ff6944c	__rtnl_register
+EXPORT_SYMBOL_GPL vmlinux 0x40af0dec	ata_xfer_mode2mask
+EXPORT_SYMBOL_GPL vmlinux 0x40be2c41	blocking_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x40c2ccae	uhci_reset_hc
+EXPORT_SYMBOL_GPL vmlinux 0x40c38f7b	rtc_read_time
+EXPORT_SYMBOL_GPL vmlinux 0x40da6366	__pci_hp_register
+EXPORT_SYMBOL_GPL vmlinux 0x40dff36f	dev_attr_link_power_management_policy
+EXPORT_SYMBOL_GPL vmlinux 0x40e6016f	dev_attr_sw_activity
+EXPORT_SYMBOL_GPL vmlinux 0x41390ab9	netlink_has_listeners
+EXPORT_SYMBOL_GPL vmlinux 0x413c9b2a	spi_alloc_device
+EXPORT_SYMBOL_GPL vmlinux 0x41538d6d	regulator_list_voltage
+EXPORT_SYMBOL_GPL vmlinux 0x42494cea	ring_buffer_event_length
+EXPORT_SYMBOL_GPL vmlinux 0x426f13b9	e820_all_mapped
+EXPORT_SYMBOL_GPL vmlinux 0x426fac16	ata_sff_exec_command
+EXPORT_SYMBOL_GPL vmlinux 0x42745d9f	usb_hcd_check_unlink_urb
+EXPORT_SYMBOL_GPL vmlinux 0x429622e1	ata_sff_data_xfer
+EXPORT_SYMBOL_GPL vmlinux 0x42987e4e	da903x_read
+EXPORT_SYMBOL_GPL vmlinux 0x42b364ef	scatterwalk_done
+EXPORT_SYMBOL_GPL vmlinux 0x42b42291	debugfs_remove
+EXPORT_SYMBOL_GPL vmlinux 0x42d5d96b	ata_std_postreset
+EXPORT_SYMBOL_GPL vmlinux 0x42ec50eb	pm_runtime_barrier
+EXPORT_SYMBOL_GPL vmlinux 0x432fd7f6	__gpio_set_value
+EXPORT_SYMBOL_GPL vmlinux 0x435c24a4	spi_write_then_read
+EXPORT_SYMBOL_GPL vmlinux 0x43709069	uart_console_write
+EXPORT_SYMBOL_GPL vmlinux 0x43f56e82	ata_xfer_mode2shift
+EXPORT_SYMBOL_GPL vmlinux 0x4426b8a7	pci_cleanup_aer_uncorrect_error_status
+EXPORT_SYMBOL_GPL vmlinux 0x447b2c51	pci_slots_kset
+EXPORT_SYMBOL_GPL vmlinux 0x4484a5a4	wait_for_device_probe
+EXPORT_SYMBOL_GPL vmlinux 0x44a65d5c	lock_policy_rwsem_read
+EXPORT_SYMBOL_GPL vmlinux 0x44d0232b	ata_cable_40wire
+EXPORT_SYMBOL_GPL vmlinux 0x44f43555	ring_buffer_size
+EXPORT_SYMBOL_GPL vmlinux 0x4541fe0d	mtrr_state
+EXPORT_SYMBOL_GPL vmlinux 0x454d5c01	blocking_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x455cfd98	aead_geniv_free
+EXPORT_SYMBOL_GPL vmlinux 0x457594fa	crypto_alg_list
+EXPORT_SYMBOL_GPL vmlinux 0x45b3c924	ip6_dst_blackhole
+EXPORT_SYMBOL_GPL vmlinux 0x45bf1ff3	crypto_inc
+EXPORT_SYMBOL_GPL vmlinux 0x45dc0b07	regulator_set_mode
+EXPORT_SYMBOL_GPL vmlinux 0x460f31aa	rodata_test_data
+EXPORT_SYMBOL_GPL vmlinux 0x4648a74f	driver_find
+EXPORT_SYMBOL_GPL vmlinux 0x4672e88b	__crypto_dequeue_request
+EXPORT_SYMBOL_GPL vmlinux 0x467ccee5	hvc_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x47206b84	sdev_evt_send_simple
+EXPORT_SYMBOL_GPL vmlinux 0x47229b5c	gpio_request
+EXPORT_SYMBOL_GPL vmlinux 0x472ccfa7	bsg_register_queue
+EXPORT_SYMBOL_GPL vmlinux 0x472ee99a	ring_buffer_read_page
+EXPORT_SYMBOL_GPL vmlinux 0x474543e2	fuse_conn_put
+EXPORT_SYMBOL_GPL vmlinux 0x4746fb45	tty_perform_flush
+EXPORT_SYMBOL_GPL vmlinux 0x477e571d	__pm_runtime_set_status
+EXPORT_SYMBOL_GPL vmlinux 0x48b81617	ata_sff_error_handler
+EXPORT_SYMBOL_GPL vmlinux 0x48c6c97e	ata_bmdma_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x499043d3	crypto_init_queue
+EXPORT_SYMBOL_GPL vmlinux 0x49db8db4	register_jprobes
+EXPORT_SYMBOL_GPL vmlinux 0x49f787d2	relay_buf_full
+EXPORT_SYMBOL_GPL vmlinux 0x4a31d8ab	usb_get_intf
+EXPORT_SYMBOL_GPL vmlinux 0x4a63b329	debugfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x4a68541b	usb_hcd_giveback_urb
+EXPORT_SYMBOL_GPL vmlinux 0x4a714c36	ring_buffer_resize
+EXPORT_SYMBOL_GPL vmlinux 0x4a7a57b3	tty_wakeup
+EXPORT_SYMBOL_GPL vmlinux 0x4aafcfaa	crypto_init_ahash_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x4aecccc5	ring_buffer_free_read_page
+EXPORT_SYMBOL_GPL vmlinux 0x4b64f065	inotify_remove_watch_locked
+EXPORT_SYMBOL_GPL vmlinux 0x4b94c084	dm_rh_recovery_prepare
+EXPORT_SYMBOL_GPL vmlinux 0x4b9f2fbd	ring_buffer_iter_peek
+EXPORT_SYMBOL_GPL vmlinux 0x4c2f30d4	power_supply_class
+EXPORT_SYMBOL_GPL vmlinux 0x4c4295bc	inet_csk_addr2sockaddr
+EXPORT_SYMBOL_GPL vmlinux 0x4c4f0ec9	put_pid
+EXPORT_SYMBOL_GPL vmlinux 0x4c759827	byte_rev_table
+EXPORT_SYMBOL_GPL vmlinux 0x4c96fcfd	crypto_hash_walk_done
+EXPORT_SYMBOL_GPL vmlinux 0x4cb30da8	dm_get_rq_mapinfo
+EXPORT_SYMBOL_GPL vmlinux 0x4cec82ee	crypto_chain
+EXPORT_SYMBOL_GPL vmlinux 0x4cf7961f	sysfs_add_file_to_group
+EXPORT_SYMBOL_GPL vmlinux 0x4d39e7a0	ata_sff_dumb_qc_prep
+EXPORT_SYMBOL_GPL vmlinux 0x4d3b7584	sdio_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0x4d8f4c15	klist_add_before
+EXPORT_SYMBOL_GPL vmlinux 0x4dd477d2	ata_sff_postreset
+EXPORT_SYMBOL_GPL vmlinux 0x4ddbfacf	regulator_put
+EXPORT_SYMBOL_GPL vmlinux 0x4ec32a28	__pci_reset_function
+EXPORT_SYMBOL_GPL vmlinux 0x4f0bce29	hwmon_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x4f4a53fb	ata_host_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x4f79850f	ring_buffer_read_start
+EXPORT_SYMBOL_GPL vmlinux 0x4f95f211	spi_register_master
+EXPORT_SYMBOL_GPL vmlinux 0x4fb3daa0	kallsyms_on_each_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x4fb429bd	ata_sas_port_stop
+EXPORT_SYMBOL_GPL vmlinux 0x4fdc945d	sata_deb_timing_normal
+EXPORT_SYMBOL_GPL vmlinux 0x501f0c99	pci_test_config_bits
+EXPORT_SYMBOL_GPL vmlinux 0x503b69b8	ring_buffer_record_enable
+EXPORT_SYMBOL_GPL vmlinux 0x50547c12	find_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0x5086ac3a	alg_test
+EXPORT_SYMBOL_GPL vmlinux 0x50c89f23	__alloc_percpu
+EXPORT_SYMBOL_GPL vmlinux 0x50d1f870	pgprot_writecombine
+EXPORT_SYMBOL_GPL vmlinux 0x50e7193a	__i2c_first_dynamic_bus_num
+EXPORT_SYMBOL_GPL vmlinux 0x50f37cae	sysfs_create_link
+EXPORT_SYMBOL_GPL vmlinux 0x50f5e532	call_rcu_sched
+EXPORT_SYMBOL_GPL vmlinux 0x50fad434	round_jiffies_up
+EXPORT_SYMBOL_GPL vmlinux 0x5108b3fc	acpi_os_map_memory
+EXPORT_SYMBOL_GPL vmlinux 0x510b5dec	rt_mutex_timed_lock
+EXPORT_SYMBOL_GPL vmlinux 0x513a7f9e	ata_pci_remove_one
+EXPORT_SYMBOL_GPL vmlinux 0x51475910	net_assign_generic
+EXPORT_SYMBOL_GPL vmlinux 0x518c2fc6	hpet_rtc_dropped_irq
+EXPORT_SYMBOL_GPL vmlinux 0x5198b603	sysfs_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x51aed35d	usb_register_dev
+EXPORT_SYMBOL_GPL vmlinux 0x5210c759	inotify_init_watch
+EXPORT_SYMBOL_GPL vmlinux 0x5212785e	get_user_pages_fast
+EXPORT_SYMBOL_GPL vmlinux 0x521452ad	ata_bmdma_start
+EXPORT_SYMBOL_GPL vmlinux 0x5232ba5a	sata_scr_write_flush
+EXPORT_SYMBOL_GPL vmlinux 0x5243b132	__pci_complete_power_transition
+EXPORT_SYMBOL_GPL vmlinux 0x52496c50	fixed_phy_set_link_update
+EXPORT_SYMBOL_GPL vmlinux 0x52bff0dc	vma_kernel_pagesize
+EXPORT_SYMBOL_GPL vmlinux 0x52d111ea	pm_qos_update_requirement
+EXPORT_SYMBOL_GPL vmlinux 0x52d45324	find_vpid
+EXPORT_SYMBOL_GPL vmlinux 0x52f15a0e	usb_autopm_get_interface_async
+EXPORT_SYMBOL_GPL vmlinux 0x52f512bd	dm_rh_get_region_size
+EXPORT_SYMBOL_GPL vmlinux 0x5317f07e	regulator_get_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0x531b4e82	pci_intx
+EXPORT_SYMBOL_GPL vmlinux 0x531f884c	sysfs_update_group
+EXPORT_SYMBOL_GPL vmlinux 0x532aa03e	usb_deregister_dev
+EXPORT_SYMBOL_GPL vmlinux 0x533340e7	trace_define_field
+EXPORT_SYMBOL_GPL vmlinux 0x5334ed3e	pci_hp_deregister
+EXPORT_SYMBOL_GPL vmlinux 0x53614269	get_cpu_idle_time_us
+EXPORT_SYMBOL_GPL vmlinux 0x5370f0c7	kobject_rename
+EXPORT_SYMBOL_GPL vmlinux 0x5372dede	unregister_acpi_bus_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x53986488	register_die_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x53d02b03	tty_encode_baud_rate
+EXPORT_SYMBOL_GPL vmlinux 0x540113cd	i2c_new_device
+EXPORT_SYMBOL_GPL vmlinux 0x540a7fb9	usb_kill_urb
+EXPORT_SYMBOL_GPL vmlinux 0x5414732b	screen_glyph
+EXPORT_SYMBOL_GPL vmlinux 0x542a293a	usb_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0x545ac9a6	platform_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x545bcd5c	pci_enable_rom
+EXPORT_SYMBOL_GPL vmlinux 0x545fc1c5	simple_attr_open
+EXPORT_SYMBOL_GPL vmlinux 0x5460c8d8	fsnotify_get_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x5492ef1b	kobject_get_path
+EXPORT_SYMBOL_GPL vmlinux 0x549525ef	handle_nested_irq
+EXPORT_SYMBOL_GPL vmlinux 0x54cfe1c7	class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x54edad3a	nf_unregister_queue_handlers
+EXPORT_SYMBOL_GPL vmlinux 0x554a4d25	sdio_f0_writeb
+EXPORT_SYMBOL_GPL vmlinux 0x555313fc	ata_pci_sff_prepare_host
+EXPORT_SYMBOL_GPL vmlinux 0x5585f3cb	usb_buffer_unmap_sg
+EXPORT_SYMBOL_GPL vmlinux 0x55ae7aad	queue_delayed_work
+EXPORT_SYMBOL_GPL vmlinux 0x55cb4a02	fl6_sock_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x55cc78d9	srcu_read_unlock
+EXPORT_SYMBOL_GPL vmlinux 0x55f957df	ata_sff_irq_on
+EXPORT_SYMBOL_GPL vmlinux 0x56310925	regulator_mode_to_status
+EXPORT_SYMBOL_GPL vmlinux 0x56398615	mark_tsc_unstable
+EXPORT_SYMBOL_GPL vmlinux 0x563fb5c8	__trace_bprintk
+EXPORT_SYMBOL_GPL vmlinux 0x5641485b	tty_termios_encode_baud_rate
+EXPORT_SYMBOL_GPL vmlinux 0x5648b99b	vfs_test_lock
+EXPORT_SYMBOL_GPL vmlinux 0x564cfe53	crypto_aead_setauthsize
+EXPORT_SYMBOL_GPL vmlinux 0x56947347	dmi_walk
+EXPORT_SYMBOL_GPL vmlinux 0x569b6134	da903x_reads
+EXPORT_SYMBOL_GPL vmlinux 0x579e0bf5	rtnl_unregister_all
+EXPORT_SYMBOL_GPL vmlinux 0x57cfb339	do_sync_mapping_range
+EXPORT_SYMBOL_GPL vmlinux 0x58286771	bus_for_each_dev
+EXPORT_SYMBOL_GPL vmlinux 0x583de0ef	crypto_unregister_ahash
+EXPORT_SYMBOL_GPL vmlinux 0x585dfab4	tty_ldisc_ref_wait
+EXPORT_SYMBOL_GPL vmlinux 0x58665763	rtc_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x589f3eab	dm_kill_unmapped_request
+EXPORT_SYMBOL_GPL vmlinux 0x58ba8963	__pneigh_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x58eeff44	rtc_set_mmss
+EXPORT_SYMBOL_GPL vmlinux 0x590e2dad	preempt_notifier_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x590f4bb3	acpi_smbus_read
+EXPORT_SYMBOL_GPL vmlinux 0x5916acb3	gpiochip_remove
+EXPORT_SYMBOL_GPL vmlinux 0x593a36c2	scsi_dh_handler_exist
+EXPORT_SYMBOL_GPL vmlinux 0x595cee03	inet6_csk_bind_conflict
+EXPORT_SYMBOL_GPL vmlinux 0x59629b7e	relay_reset
+EXPORT_SYMBOL_GPL vmlinux 0x5978f450	ring_buffer_discard_commit
+EXPORT_SYMBOL_GPL vmlinux 0x59a1294b	i2c_new_probed_device
+EXPORT_SYMBOL_GPL vmlinux 0x59ca3224	inet_twdr_twkill_work
+EXPORT_SYMBOL_GPL vmlinux 0x59d26f28	sysdev_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x5a6ec452	device_reprobe
+EXPORT_SYMBOL_GPL vmlinux 0x5a7bfe41	crypto_probing_notify
+EXPORT_SYMBOL_GPL vmlinux 0x5afe5890	regulator_get_mode
+EXPORT_SYMBOL_GPL vmlinux 0x5b31f8cd	ata_sff_prereset
+EXPORT_SYMBOL_GPL vmlinux 0x5b42c496	dma_release_channel
+EXPORT_SYMBOL_GPL vmlinux 0x5bd224ce	crypto_alg_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x5bfc03c3	unregister_keyboard_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5c11b85d	spi_add_device
+EXPORT_SYMBOL_GPL vmlinux 0x5c290344	rdev_get_dev
+EXPORT_SYMBOL_GPL vmlinux 0x5c30c250	crypto_larval_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x5c3e7099	class_dev_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0x5c8c4ea4	rtc_update_irq
+EXPORT_SYMBOL_GPL vmlinux 0x5c9b768d	attribute_container_register
+EXPORT_SYMBOL_GPL vmlinux 0x5d0f6f57	kbd_table
+EXPORT_SYMBOL_GPL vmlinux 0x5d51bcf7	scatterwalk_start
+EXPORT_SYMBOL_GPL vmlinux 0x5d730e7b	raw_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x5d87c067	register_acpi_bus_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5d8d0297	srcu_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x5dbdab3b	skb_icv_walk
+EXPORT_SYMBOL_GPL vmlinux 0x5dc78542	sdio_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0x5dd67618	register_netevent_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5e51671d	platform_driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x5ea947fa	scsi_nl_add_driver
+EXPORT_SYMBOL_GPL vmlinux 0x5ec3dcf8	usb_set_device_state
+EXPORT_SYMBOL_GPL vmlinux 0x5ed42d90	usb_driver_set_configuration
+EXPORT_SYMBOL_GPL vmlinux 0x5ef081a7	ata_host_register
+EXPORT_SYMBOL_GPL vmlinux 0x5f2da8c4	check_tsc_unstable
+EXPORT_SYMBOL_GPL vmlinux 0x5f3ec9e0	inotify_inode_queue_event
+EXPORT_SYMBOL_GPL vmlinux 0x5f726c20	fuse_request_send
+EXPORT_SYMBOL_GPL vmlinux 0x5f7b23ac	usb_submit_urb
+EXPORT_SYMBOL_GPL vmlinux 0x5f81412c	crypto_alloc_base
+EXPORT_SYMBOL_GPL vmlinux 0x5f85a9f8	platform_get_resource_byname
+EXPORT_SYMBOL_GPL vmlinux 0x5fb026c7	invalidate_inode_pages2_range
+EXPORT_SYMBOL_GPL vmlinux 0x5fcdec5d	xfrm_ealg_get_byidx
+EXPORT_SYMBOL_GPL vmlinux 0x5fcee70e	crypto_rng_type
+EXPORT_SYMBOL_GPL vmlinux 0x5fcf4b05	rtc_irq_set_freq
+EXPORT_SYMBOL_GPL vmlinux 0x5fd5b103	pci_rescan_bus
+EXPORT_SYMBOL_GPL vmlinux 0x6088aeaf	sg_scsi_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x60a13e90	rcu_barrier
+EXPORT_SYMBOL_GPL vmlinux 0x60cad649	__rtnl_link_register
+EXPORT_SYMBOL_GPL vmlinux 0x60cd73ed	pv_apic_ops
+EXPORT_SYMBOL_GPL vmlinux 0x60e5f765	spi_busnum_to_master
+EXPORT_SYMBOL_GPL vmlinux 0x60ff63d4	usb_find_interface
+EXPORT_SYMBOL_GPL vmlinux 0x61328f66	usb_driver_claim_interface
+EXPORT_SYMBOL_GPL vmlinux 0x6157ad2a	rtnl_link_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x61747e09	blocking_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x61eda3c8	pm_schedule_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x6231e666	use_module
+EXPORT_SYMBOL_GPL vmlinux 0x6248e402	cpufreq_frequency_table_verify
+EXPORT_SYMBOL_GPL vmlinux 0x627ce923	scsi_get_vpd_page
+EXPORT_SYMBOL_GPL vmlinux 0x629a7f6e	do_posix_clock_nonanosleep
+EXPORT_SYMBOL_GPL vmlinux 0x62e749ef	alloc_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0x63006e3b	dm_rh_dirty_log
+EXPORT_SYMBOL_GPL vmlinux 0x6341631a	sdio_writeb
+EXPORT_SYMBOL_GPL vmlinux 0x63583f91	hrtimer_cancel
+EXPORT_SYMBOL_GPL vmlinux 0x63668979	ata_bmdma_status
+EXPORT_SYMBOL_GPL vmlinux 0x636a6e2c	ring_buffer_entries_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x63aa7a65	tty_ldisc_deref
+EXPORT_SYMBOL_GPL vmlinux 0x63cf18ec	ata_cable_sata
+EXPORT_SYMBOL_GPL vmlinux 0x643a1944	ata_bmdma_setup
+EXPORT_SYMBOL_GPL vmlinux 0x6448f312	pci_reset_function
+EXPORT_SYMBOL_GPL vmlinux 0x64d6374c	ata_link_abort
+EXPORT_SYMBOL_GPL vmlinux 0x64ddffad	hvc_poll
+EXPORT_SYMBOL_GPL vmlinux 0x64e06003	default_backing_dev_info
+EXPORT_SYMBOL_GPL vmlinux 0x64e163f1	xfrm_output_resume
+EXPORT_SYMBOL_GPL vmlinux 0x64ebe677	wmi_query_block
+EXPORT_SYMBOL_GPL vmlinux 0x653f9a6b	rt_mutex_lock_interruptible
+EXPORT_SYMBOL_GPL vmlinux 0x654c49e2	aer_irq
+EXPORT_SYMBOL_GPL vmlinux 0x65bbbc78	schedule_hrtimeout_range
+EXPORT_SYMBOL_GPL vmlinux 0x65ccb6f0	call_netevent_notifiers
+EXPORT_SYMBOL_GPL vmlinux 0x65d6d0f0	gpio_direction_input
+EXPORT_SYMBOL_GPL vmlinux 0x660b41aa	debugfs_create_x16
+EXPORT_SYMBOL_GPL vmlinux 0x661601de	sprint_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x6652835a	usb_hc_died
+EXPORT_SYMBOL_GPL vmlinux 0x6674c364	blkdev_aio_write
+EXPORT_SYMBOL_GPL vmlinux 0x668402aa	crypto_put_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x668f928e	usb_hcd_pci_shutdown
+EXPORT_SYMBOL_GPL vmlinux 0x66b2a859	nr_free_buffer_pages
+EXPORT_SYMBOL_GPL vmlinux 0x66d87d38	symbol_put_addr
+EXPORT_SYMBOL_GPL vmlinux 0x66fab731	spi_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x66fc6128	bus_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x6759541b	ata_slave_link_init
+EXPORT_SYMBOL_GPL vmlinux 0x6776bfbf	scsi_schedule_eh
+EXPORT_SYMBOL_GPL vmlinux 0x67955ce6	profile_hits
+EXPORT_SYMBOL_GPL vmlinux 0x67c36a6a	raw_seq_stop
+EXPORT_SYMBOL_GPL vmlinux 0x67cefbc6	crypto_shash_finup
+EXPORT_SYMBOL_GPL vmlinux 0x67e032ac	power_supply_register
+EXPORT_SYMBOL_GPL vmlinux 0x686c703f	xfrm_count_auth_supported
+EXPORT_SYMBOL_GPL vmlinux 0x688fa032	clockevents_register_device
+EXPORT_SYMBOL_GPL vmlinux 0x6892088c	unregister_pm_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x68a668cb	hrtimer_forward
+EXPORT_SYMBOL_GPL vmlinux 0x68ddf21b	usb_deregister_device_driver
+EXPORT_SYMBOL_GPL vmlinux 0x6901119a	trace_nowake_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0x6903b103	usb_hcd_pci_remove
+EXPORT_SYMBOL_GPL vmlinux 0x690f1ab5	page_cache_sync_readahead
+EXPORT_SYMBOL_GPL vmlinux 0x69357a76	filter_current_check_discard
+EXPORT_SYMBOL_GPL vmlinux 0x69371c4d	platform_device_register_simple
+EXPORT_SYMBOL_GPL vmlinux 0x698a3f53	eventfd_fget
+EXPORT_SYMBOL_GPL vmlinux 0x69921f1b	acpi_get_pci_dev
+EXPORT_SYMBOL_GPL vmlinux 0x69e9a2cb	ata_scsi_slave_config
+EXPORT_SYMBOL_GPL vmlinux 0x69fc88e0	xfrm_audit_state_add
+EXPORT_SYMBOL_GPL vmlinux 0x6a08d025	get_inotify_watch
+EXPORT_SYMBOL_GPL vmlinux 0x6a72cd28	sock_prot_inuse_get
+EXPORT_SYMBOL_GPL vmlinux 0x6a8441be	cpci_hp_start
+EXPORT_SYMBOL_GPL vmlinux 0x6ab50ade	single_open_net
+EXPORT_SYMBOL_GPL vmlinux 0x6ad2337e	devres_remove
+EXPORT_SYMBOL_GPL vmlinux 0x6adde166	rt_mutex_unlock
+EXPORT_SYMBOL_GPL vmlinux 0x6b6cd3a9	tcp_reno_min_cwnd
+EXPORT_SYMBOL_GPL vmlinux 0x6b81a703	sysfs_remove_file_from_group
+EXPORT_SYMBOL_GPL vmlinux 0x6b92424a	crypto_tfm_in_queue
+EXPORT_SYMBOL_GPL vmlinux 0x6b94c408	enable_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0x6b9b4596	module_mutex
+EXPORT_SYMBOL_GPL vmlinux 0x6be8e97c	register_pernet_gen_device
+EXPORT_SYMBOL_GPL vmlinux 0x6c19e73b	led_trigger_register_simple
+EXPORT_SYMBOL_GPL vmlinux 0x6c25e9a7	crypto_larval_kill
+EXPORT_SYMBOL_GPL vmlinux 0x6c49c4f2	clockevents_notify
+EXPORT_SYMBOL_GPL vmlinux 0x6c8bb56c	blk_end_request_err
+EXPORT_SYMBOL_GPL vmlinux 0x6c8d5ae8	__gpio_get_value
+EXPORT_SYMBOL_GPL vmlinux 0x6c8eb98f	xfrm_aalg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0x6c9deb13	blk_insert_cloned_request
+EXPORT_SYMBOL_GPL vmlinux 0x6cd22e7e	srcu_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x6d2fc5a6	net_namespace_list
+EXPORT_SYMBOL_GPL vmlinux 0x6da5a97b	trace_define_common_fields
+EXPORT_SYMBOL_GPL vmlinux 0x6e7474fc	xfrm_ealg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x6eb787ee	klist_add_head
+EXPORT_SYMBOL_GPL vmlinux 0x6ee3f6c7	ata_sff_busy_sleep
+EXPORT_SYMBOL_GPL vmlinux 0x6ef6cbbe	__mmu_notifier_register
+EXPORT_SYMBOL_GPL vmlinux 0x6efa29b3	tracepoint_iter_start
+EXPORT_SYMBOL_GPL vmlinux 0x6f9853b3	sync_filesystem
+EXPORT_SYMBOL_GPL vmlinux 0x6fb43d2d	da903x_set_bits
+EXPORT_SYMBOL_GPL vmlinux 0x6fbdacd7	acpi_pci_check_ejectable
+EXPORT_SYMBOL_GPL vmlinux 0x6fe3d8cf	ktime_add_safe
+EXPORT_SYMBOL_GPL vmlinux 0x6fefcc9e	set_task_ioprio
+EXPORT_SYMBOL_GPL vmlinux 0x6ff607b6	crypto_get_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x7015b73c	transport_configure_device
+EXPORT_SYMBOL_GPL vmlinux 0x7036ec22	crypto_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0x7037d79d	k8_flush_garts
+EXPORT_SYMBOL_GPL vmlinux 0x706b3a33	cpufreq_frequency_table_get_attr
+EXPORT_SYMBOL_GPL vmlinux 0x70734d8a	ata_pci_bmdma_init
+EXPORT_SYMBOL_GPL vmlinux 0x707ff1bb	ata_xfer_mask2mode
+EXPORT_SYMBOL_GPL vmlinux 0x70cdae65	user_match
+EXPORT_SYMBOL_GPL vmlinux 0x70d79741	pci_bus_add_device
+EXPORT_SYMBOL_GPL vmlinux 0x71152ada	dm_rh_region_to_sector
+EXPORT_SYMBOL_GPL vmlinux 0x7122c2f3	usb_get_dev
+EXPORT_SYMBOL_GPL vmlinux 0x712e4e74	skcipher_geniv_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x716265c7	debugfs_initialized
+EXPORT_SYMBOL_GPL vmlinux 0x7177bcc2	ata_host_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x71ab6911	regulator_get_voltage
+EXPORT_SYMBOL_GPL vmlinux 0x71b2ab15	acpi_bus_trim
+EXPORT_SYMBOL_GPL vmlinux 0x71c8bc95	kgdb_unregister_io_module
+EXPORT_SYMBOL_GPL vmlinux 0x722c4f65	usb_scuttle_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0x724a57d7	fsstack_copy_attr_all
+EXPORT_SYMBOL_GPL vmlinux 0x72741f25	trace_vbprintk
+EXPORT_SYMBOL_GPL vmlinux 0x7278d328	all_vm_events
+EXPORT_SYMBOL_GPL vmlinux 0x7285f84f	unregister_jprobe
+EXPORT_SYMBOL_GPL vmlinux 0x72c2a9d7	ring_buffer_empty_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x72e03bae	stop_machine_create
+EXPORT_SYMBOL_GPL vmlinux 0x72f32a87	scsi_dh_set_params
+EXPORT_SYMBOL_GPL vmlinux 0x72fd1d0b	ata_noop_qc_prep
+EXPORT_SYMBOL_GPL vmlinux 0x72fe780a	task_active_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0x735e6a2f	sata_pmp_error_handler
+EXPORT_SYMBOL_GPL vmlinux 0x739adef0	attribute_container_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x73a48b4a	ata_sff_std_ports
+EXPORT_SYMBOL_GPL vmlinux 0x73d0c1fa	__lock_page_killable
+EXPORT_SYMBOL_GPL vmlinux 0x73ff4175	led_trigger_register
+EXPORT_SYMBOL_GPL vmlinux 0x740b7860	vfs_cancel_lock
+EXPORT_SYMBOL_GPL vmlinux 0x743a165e	ata_pack_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0x74645723	fuse_conn_init
+EXPORT_SYMBOL_GPL vmlinux 0x749aefa0	sock_prot_inuse_add
+EXPORT_SYMBOL_GPL vmlinux 0x74abdafa	task_handoff_register
+EXPORT_SYMBOL_GPL vmlinux 0x74b2e5cc	fsstack_copy_inode_size
+EXPORT_SYMBOL_GPL vmlinux 0x74baf17a	tracing_is_on
+EXPORT_SYMBOL_GPL vmlinux 0x74cc2852	udp4_lib_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x74deb10c	used_vectors
+EXPORT_SYMBOL_GPL vmlinux 0x7521afb6	leave_mm
+EXPORT_SYMBOL_GPL vmlinux 0x7571894c	regulator_set_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0x75a6afc2	sync_page_io
+EXPORT_SYMBOL_GPL vmlinux 0x75b1e45b	fb_deferred_io_fsync
+EXPORT_SYMBOL_GPL vmlinux 0x75c0d33b	inet_csk_get_port
+EXPORT_SYMBOL_GPL vmlinux 0x75e8f3c3	crypto_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x75f47f59	pci_hp_create_module_link
+EXPORT_SYMBOL_GPL vmlinux 0x761188fd	dpm_suspend_noirq
+EXPORT_SYMBOL_GPL vmlinux 0x762186c8	sata_pmp_qc_defer_cmd_switch
+EXPORT_SYMBOL_GPL vmlinux 0x764dd992	usb_unlink_urb
+EXPORT_SYMBOL_GPL vmlinux 0x767080d1	add_to_page_cache_lru
+EXPORT_SYMBOL_GPL vmlinux 0x76ad995c	device_for_each_child
+EXPORT_SYMBOL_GPL vmlinux 0x76bed0f5	mnt_want_write
+EXPORT_SYMBOL_GPL vmlinux 0x76c8b95f	ata_std_prereset
+EXPORT_SYMBOL_GPL vmlinux 0x76df63bb	inet_hash_connect
+EXPORT_SYMBOL_GPL vmlinux 0x771f211f	crypto_alloc_instance2
+EXPORT_SYMBOL_GPL vmlinux 0x773ca527	init_uts_ns
+EXPORT_SYMBOL_GPL vmlinux 0x775783de	register_kretprobes
+EXPORT_SYMBOL_GPL vmlinux 0x778cf73f	usb_get_urb
+EXPORT_SYMBOL_GPL vmlinux 0x77dc3387	ring_buffer_record_enable_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x780eed89	acpi_processor_ffh_cstate_enter
+EXPORT_SYMBOL_GPL vmlinux 0x780f8418	fuse_request_send_background
+EXPORT_SYMBOL_GPL vmlinux 0x7819cd6c	sata_async_notification
+EXPORT_SYMBOL_GPL vmlinux 0x7867be87	usb_unpoison_urb
+EXPORT_SYMBOL_GPL vmlinux 0x7868c054	sysfs_create_group
+EXPORT_SYMBOL_GPL vmlinux 0x78a4043d	__pm_runtime_disable
+EXPORT_SYMBOL_GPL vmlinux 0x78ae96cf	inotify_find_watch
+EXPORT_SYMBOL_GPL vmlinux 0x78e4a4ee	klist_add_after
+EXPORT_SYMBOL_GPL vmlinux 0x793629c6	ring_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0x7940f2e1	platform_device_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x7944e0fc	tracing_off
+EXPORT_SYMBOL_GPL vmlinux 0x79a8277a	sdio_writew
+EXPORT_SYMBOL_GPL vmlinux 0x79aaa52a	cpuidle_unregister_device
+EXPORT_SYMBOL_GPL vmlinux 0x79ca97d9	ata_port_disable
+EXPORT_SYMBOL_GPL vmlinux 0x7a12a4e8	tcp_init_congestion_ops
+EXPORT_SYMBOL_GPL vmlinux 0x7a2892d2	iomap_atomic_prot_pfn
+EXPORT_SYMBOL_GPL vmlinux 0x7a4c1438	pv_info
+EXPORT_SYMBOL_GPL vmlinux 0x7a4f65e1	apply_to_page_range
+EXPORT_SYMBOL_GPL vmlinux 0x7ab3c122	edac_handlers
+EXPORT_SYMBOL_GPL vmlinux 0x7ae1ae8e	cpufreq_frequency_table_put_attr
+EXPORT_SYMBOL_GPL vmlinux 0x7ae8eda1	user_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x7b0db8b5	xfrm_audit_state_replay_overflow
+EXPORT_SYMBOL_GPL vmlinux 0x7b1d544d	edac_handler_set
+EXPORT_SYMBOL_GPL vmlinux 0x7b31db56	dm_dispatch_request
+EXPORT_SYMBOL_GPL vmlinux 0x7b3de126	regulator_enable
+EXPORT_SYMBOL_GPL vmlinux 0x7bb39690	cpufreq_freq_attr_scaling_available_freqs
+EXPORT_SYMBOL_GPL vmlinux 0x7bc5aeff	inet6_hash_connect
+EXPORT_SYMBOL_GPL vmlinux 0x7bc5dfb7	usb_mon_register
+EXPORT_SYMBOL_GPL vmlinux 0x7bcd2ded	klist_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0x7c11208e	ata_wait_after_reset
+EXPORT_SYMBOL_GPL vmlinux 0x7c9c70aa	da903x_clr_bits
+EXPORT_SYMBOL_GPL vmlinux 0x7ccb85a9	__blk_put_request
+EXPORT_SYMBOL_GPL vmlinux 0x7ce1aa41	ata_host_alloc_pinfo
+EXPORT_SYMBOL_GPL vmlinux 0x7cf3931e	crypto_alloc_ahash
+EXPORT_SYMBOL_GPL vmlinux 0x7d2a310d	ata_link_next
+EXPORT_SYMBOL_GPL vmlinux 0x7d4280a6	bsg_unregister_queue
+EXPORT_SYMBOL_GPL vmlinux 0x7d5354d6	scsi_flush_work
+EXPORT_SYMBOL_GPL vmlinux 0x7dab1ae5	cpci_hp_register_controller
+EXPORT_SYMBOL_GPL vmlinux 0x7dc5d0b6	crypto_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x7dd3bfb8	inet_csk_reqsk_queue_hash_add
+EXPORT_SYMBOL_GPL vmlinux 0x7dd51bd1	ata_host_resume
+EXPORT_SYMBOL_GPL vmlinux 0x7de2c322	ata_host_activate
+EXPORT_SYMBOL_GPL vmlinux 0x7e1183c9	async_schedule
+EXPORT_SYMBOL_GPL vmlinux 0x7e275ea8	scsi_complete_async_scans
+EXPORT_SYMBOL_GPL vmlinux 0x7e64181d	usb_calc_bus_time
+EXPORT_SYMBOL_GPL vmlinux 0x7e7a3398	cpufreq_cpu_put
+EXPORT_SYMBOL_GPL vmlinux 0x7ea349df	rtc_alarm_irq_enable
+EXPORT_SYMBOL_GPL vmlinux 0x7ec6155c	cpci_hp_unregister_controller
+EXPORT_SYMBOL_GPL vmlinux 0x7ed2c908	ata_pio_need_iordy
+EXPORT_SYMBOL_GPL vmlinux 0x7ee35b05	device_rename
+EXPORT_SYMBOL_GPL vmlinux 0x7f15bae7	ata_sff_qc_prep
+EXPORT_SYMBOL_GPL vmlinux 0x7f19c836	unlock_policy_rwsem_write
+EXPORT_SYMBOL_GPL vmlinux 0x7f220180	gpio_export_link
+EXPORT_SYMBOL_GPL vmlinux 0x7f78db05	d_materialise_unique
+EXPORT_SYMBOL_GPL vmlinux 0x7fbbf29f	crypto_mod_get
+EXPORT_SYMBOL_GPL vmlinux 0x7fd6e315	bus_find_device_by_name
+EXPORT_SYMBOL_GPL vmlinux 0x7ff0dffa	spi_async
+EXPORT_SYMBOL_GPL vmlinux 0x7ff10ccf	raw_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x8014b6af	input_event_from_user
+EXPORT_SYMBOL_GPL vmlinux 0x8039d043	selinux_secmark_relabel_packet_permission
+EXPORT_SYMBOL_GPL vmlinux 0x806b7a87	preempt_notifier_register
+EXPORT_SYMBOL_GPL vmlinux 0x808ebe01	inet_twsk_schedule
+EXPORT_SYMBOL_GPL vmlinux 0x808ec1a3	crypto_alg_tested
+EXPORT_SYMBOL_GPL vmlinux 0x80d8805d	cpuidle_disable_device
+EXPORT_SYMBOL_GPL vmlinux 0x80e94635	__rtnl_link_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x80ee55c3	selinux_secmark_refcount_inc
+EXPORT_SYMBOL_GPL vmlinux 0x80efb732	register_kretprobe
+EXPORT_SYMBOL_GPL vmlinux 0x8103b13f	ata_bus_reset
+EXPORT_SYMBOL_GPL vmlinux 0x8115961f	sdio_claim_host
+EXPORT_SYMBOL_GPL vmlinux 0x8149ea54	ata_timing_find_mode
+EXPORT_SYMBOL_GPL vmlinux 0x81620cee	fuse_do_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x817b3b7f	find_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x81d17d0c	ring_buffer_commit_overrun_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x81f25b66	dequeue_signal
+EXPORT_SYMBOL_GPL vmlinux 0x82124b1c	regulator_get_exclusive
+EXPORT_SYMBOL_GPL vmlinux 0x8226642f	__gpio_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x823b58ac	blk_add_driver_data
+EXPORT_SYMBOL_GPL vmlinux 0x825eb777	register_pernet_subsys
+EXPORT_SYMBOL_GPL vmlinux 0x826609a4	tracepoint_iter_stop
+EXPORT_SYMBOL_GPL vmlinux 0x8271e59c	platform_get_irq
+EXPORT_SYMBOL_GPL vmlinux 0x8271ee5f	usb_buffer_map_sg
+EXPORT_SYMBOL_GPL vmlinux 0x82939ebd	rcu_batches_completed_sched
+EXPORT_SYMBOL_GPL vmlinux 0x82945f8a	vfs_setxattr
+EXPORT_SYMBOL_GPL vmlinux 0x82d79b51	sysctl_vfs_cache_pressure
+EXPORT_SYMBOL_GPL vmlinux 0x82ee09e8	drop_file_write_access
+EXPORT_SYMBOL_GPL vmlinux 0x82f776b7	gpio_export
+EXPORT_SYMBOL_GPL vmlinux 0x834d8eee	attribute_container_classdev_to_container
+EXPORT_SYMBOL_GPL vmlinux 0x8376e03e	securityfs_remove
+EXPORT_SYMBOL_GPL vmlinux 0x843ad4e4	ata_sff_lost_interrupt
+EXPORT_SYMBOL_GPL vmlinux 0x843d70ef	acpi_is_root_bridge
+EXPORT_SYMBOL_GPL vmlinux 0x8442a557	class_compat_register
+EXPORT_SYMBOL_GPL vmlinux 0x844c5600	debugfs_create_u64
+EXPORT_SYMBOL_GPL vmlinux 0x8453dcb7	sysfs_chmod_file
+EXPORT_SYMBOL_GPL vmlinux 0x847dc5ed	usb_bulk_msg
+EXPORT_SYMBOL_GPL vmlinux 0x8484b14f	blkcipher_walk_virt_block
+EXPORT_SYMBOL_GPL vmlinux 0x8486984e	fb_deferred_io_open
+EXPORT_SYMBOL_GPL vmlinux 0x84d544b2	ata_acpi_gtm
+EXPORT_SYMBOL_GPL vmlinux 0x85478a0b	inet6_hash_frag
+EXPORT_SYMBOL_GPL vmlinux 0x85774ef4	kick_process
+EXPORT_SYMBOL_GPL vmlinux 0x85c10896	rcu_batches_completed_bh
+EXPORT_SYMBOL_GPL vmlinux 0x85d7edfd	hpet_set_periodic_freq
+EXPORT_SYMBOL_GPL vmlinux 0x8619b681	kill_pid_info_as_uid
+EXPORT_SYMBOL_GPL vmlinux 0x862ac4f3	do_kern_mount
+EXPORT_SYMBOL_GPL vmlinux 0x8643517d	crypto_spawn_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x867c684a	setup_APIC_eilvt_ibs
+EXPORT_SYMBOL_GPL vmlinux 0x86856b0d	dm_register_path_selector
+EXPORT_SYMBOL_GPL vmlinux 0x868784cb	__symbol_get
+EXPORT_SYMBOL_GPL vmlinux 0x86b1667d	hwrng_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x86d2870f	usb_ep0_reinit
+EXPORT_SYMBOL_GPL vmlinux 0x86f6b99d	synchronize_rcu_expedited
+EXPORT_SYMBOL_GPL vmlinux 0x87198bbd	input_ff_event
+EXPORT_SYMBOL_GPL vmlinux 0x873fbaea	edac_atomic_assert_error
+EXPORT_SYMBOL_GPL vmlinux 0x87754115	raw_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x877c1897	dm_set_device_limits
+EXPORT_SYMBOL_GPL vmlinux 0x8788fcd2	fb_deferred_io_init
+EXPORT_SYMBOL_GPL vmlinux 0x87b2a522	crypto_grab_skcipher
+EXPORT_SYMBOL_GPL vmlinux 0x87bc750b	shash_attr_alg
+EXPORT_SYMBOL_GPL vmlinux 0x87c336c1	crypto_attr_alg2
+EXPORT_SYMBOL_GPL vmlinux 0x87c78af3	destroy_workqueue
+EXPORT_SYMBOL_GPL vmlinux 0x880b189a	__atomic_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x8810ad5e	crypto_xor
+EXPORT_SYMBOL_GPL vmlinux 0x8823a488	acpi_pci_find_root
+EXPORT_SYMBOL_GPL vmlinux 0x885142a6	nf_net_netfilter_sysctl_path
+EXPORT_SYMBOL_GPL vmlinux 0x885efe7a	ata_cable_80wire
+EXPORT_SYMBOL_GPL vmlinux 0x886736fc	olpc_platform_info
+EXPORT_SYMBOL_GPL vmlinux 0x88a87a85	ata_acpi_cbl_80wire
+EXPORT_SYMBOL_GPL vmlinux 0x88d11928	ata_ehi_push_desc
+EXPORT_SYMBOL_GPL vmlinux 0x88eea58a	aead_geniv_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x88f4beb8	sis_info133_for_sata
+EXPORT_SYMBOL_GPL vmlinux 0x897fd962	class_compat_remove_link
+EXPORT_SYMBOL_GPL vmlinux 0x89e59c93	ata_std_error_handler
+EXPORT_SYMBOL_GPL vmlinux 0x8a294f67	usb_get_from_anchor
+EXPORT_SYMBOL_GPL vmlinux 0x8a9f7fb2	pm_runtime_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x8aa85b89	crypto_spawn_tfm2
+EXPORT_SYMBOL_GPL vmlinux 0x8abd4b65	usb_hcd_poll_rh_status
+EXPORT_SYMBOL_GPL vmlinux 0x8ae58547	disk_map_sector_rcu
+EXPORT_SYMBOL_GPL vmlinux 0x8ae8f1f9	tasklet_hrtimer_init
+EXPORT_SYMBOL_GPL vmlinux 0x8b1e6608	inet_ctl_sock_create
+EXPORT_SYMBOL_GPL vmlinux 0x8b752ac1	ata_tf_to_fis
+EXPORT_SYMBOL_GPL vmlinux 0x8b7db255	device_register
+EXPORT_SYMBOL_GPL vmlinux 0x8b8a0c21	crypto_mod_put
+EXPORT_SYMBOL_GPL vmlinux 0x8c225b5f	crypto_register_ahash
+EXPORT_SYMBOL_GPL vmlinux 0x8c9d686d	__wake_up_sync_key
+EXPORT_SYMBOL_GPL vmlinux 0x8cd7a730	sysdev_show_int
+EXPORT_SYMBOL_GPL vmlinux 0x8d033df4	klist_node_attached
+EXPORT_SYMBOL_GPL vmlinux 0x8d421742	scsi_unregister_device_handler
+EXPORT_SYMBOL_GPL vmlinux 0x8d7b40fb	set_cpus_allowed_ptr
+EXPORT_SYMBOL_GPL vmlinux 0x8d935c5a	anon_inode_getfile
+EXPORT_SYMBOL_GPL vmlinux 0x8d97e2f9	dm_rh_flush
+EXPORT_SYMBOL_GPL vmlinux 0x8da17b42	scatterwalk_copychunks
+EXPORT_SYMBOL_GPL vmlinux 0x8dbbbfe4	input_ff_create
+EXPORT_SYMBOL_GPL vmlinux 0x8dffb94d	usb_control_msg
+EXPORT_SYMBOL_GPL vmlinux 0x8e2e50ae	__class_register
+EXPORT_SYMBOL_GPL vmlinux 0x8e335804	relay_open
+EXPORT_SYMBOL_GPL vmlinux 0x8e8ba44e	aead_geniv_exit
+EXPORT_SYMBOL_GPL vmlinux 0x8eae69ba	kobject_init_and_add
+EXPORT_SYMBOL_GPL vmlinux 0x8eb58c6e	__wake_up_sync
+EXPORT_SYMBOL_GPL vmlinux 0x8eb7c009	__inet_twsk_hashdance
+EXPORT_SYMBOL_GPL vmlinux 0x8ec5ea02	__audit_inode_child
+EXPORT_SYMBOL_GPL vmlinux 0x8f50121a	__module_text_address
+EXPORT_SYMBOL_GPL vmlinux 0x8f6cee77	__round_jiffies_relative
+EXPORT_SYMBOL_GPL vmlinux 0x8fa74514	sysdev_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x8fe2b959	sata_link_debounce
+EXPORT_SYMBOL_GPL vmlinux 0x8ff3da26	rt_mutex_lock
+EXPORT_SYMBOL_GPL vmlinux 0x9000b132	regulator_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x9009602a	acpi_bus_get_ejd
+EXPORT_SYMBOL_GPL vmlinux 0x904be910	transport_setup_device
+EXPORT_SYMBOL_GPL vmlinux 0x9061444e	ata_sff_softreset
+EXPORT_SYMBOL_GPL vmlinux 0x906d3eec	br_fdb_test_addr_hook
+EXPORT_SYMBOL_GPL vmlinux 0x90790b53	blk_abort_request
+EXPORT_SYMBOL_GPL vmlinux 0x90a1004a	crypto_has_alg
+EXPORT_SYMBOL_GPL vmlinux 0x90e7a79d	rt_mutex_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x91102f82	led_trigger_unregister_simple
+EXPORT_SYMBOL_GPL vmlinux 0x91482eef	usb_anchor_empty
+EXPORT_SYMBOL_GPL vmlinux 0x9148a9fa	i2c_unregister_device
+EXPORT_SYMBOL_GPL vmlinux 0x9159b9d6	profile_event_register
+EXPORT_SYMBOL_GPL vmlinux 0x91a704fe	sysfs_remove_group
+EXPORT_SYMBOL_GPL vmlinux 0x91f94ca3	ata_port_start
+EXPORT_SYMBOL_GPL vmlinux 0x92300ec6	srcu_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x92673c36	vfs_kern_mount
+EXPORT_SYMBOL_GPL vmlinux 0x92732398	put_driver
+EXPORT_SYMBOL_GPL vmlinux 0x929f800d	xfrm_inner_extract_output
+EXPORT_SYMBOL_GPL vmlinux 0x92d31cfb	fixed_phy_add
+EXPORT_SYMBOL_GPL vmlinux 0x92d74e64	sysdev_class_register
+EXPORT_SYMBOL_GPL vmlinux 0x92eef345	regulator_register
+EXPORT_SYMBOL_GPL vmlinux 0x92fb217b	dcookie_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x9311a5c9	relay_flush
+EXPORT_SYMBOL_GPL vmlinux 0x931e94ee	page_cache_async_readahead
+EXPORT_SYMBOL_GPL vmlinux 0x937b6b42	eventfd_ctx_fileget
+EXPORT_SYMBOL_GPL vmlinux 0x937fd941	ata_pci_sff_init_one
+EXPORT_SYMBOL_GPL vmlinux 0x93885ace	pci_find_next_ht_capability
+EXPORT_SYMBOL_GPL vmlinux 0x93946999	raw_unhash_sk
+EXPORT_SYMBOL_GPL vmlinux 0x93bf114b	cpufreq_cpu_get
+EXPORT_SYMBOL_GPL vmlinux 0x93c36363	ata_sg_init
+EXPORT_SYMBOL_GPL vmlinux 0x93d2422d	snmp_mib_free
+EXPORT_SYMBOL_GPL vmlinux 0x93f17b6a	ring_buffer_iter_reset
+EXPORT_SYMBOL_GPL vmlinux 0x945d5bae	security_inode_mkdir
+EXPORT_SYMBOL_GPL vmlinux 0x94a68723	ata_scsi_slave_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x94aa8400	bus_register
+EXPORT_SYMBOL_GPL vmlinux 0x94de3391	kobject_create_and_add
+EXPORT_SYMBOL_GPL vmlinux 0x94e6418a	ata_port_abort
+EXPORT_SYMBOL_GPL vmlinux 0x94ef4d05	cpci_hp_stop
+EXPORT_SYMBOL_GPL vmlinux 0x94fcbe03	ata_host_detach
+EXPORT_SYMBOL_GPL vmlinux 0x952664c5	do_exit
+EXPORT_SYMBOL_GPL vmlinux 0x9543bc5d	device_create_vargs
+EXPORT_SYMBOL_GPL vmlinux 0x95646231	user_read
+EXPORT_SYMBOL_GPL vmlinux 0x956a91ba	gpio_get_value_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x95758050	__blocking_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x95c9395a	ata_sas_port_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x961a8cd3	unlock_policy_rwsem_read
+EXPORT_SYMBOL_GPL vmlinux 0x964920c5	raw_seq_next
+EXPORT_SYMBOL_GPL vmlinux 0x9668f06d	inet_hashinfo_init
+EXPORT_SYMBOL_GPL vmlinux 0x9699cc8d	console_drivers
+EXPORT_SYMBOL_GPL vmlinux 0x96cbcf31	pm_qos_add_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x96d14974	dm_rh_get_state
+EXPORT_SYMBOL_GPL vmlinux 0x970b9fcf	crypto_ablkcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0x9716c401	inet6_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x971ea812	alloc_page_buffers
+EXPORT_SYMBOL_GPL vmlinux 0x975aeeab	raw_seq_open
+EXPORT_SYMBOL_GPL vmlinux 0x975c56a3	devres_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x976eab5d	pci_get_hp_params
+EXPORT_SYMBOL_GPL vmlinux 0x97982542	hrtimer_start_range_ns
+EXPORT_SYMBOL_GPL vmlinux 0x97a4ccaf	usb_clear_halt
+EXPORT_SYMBOL_GPL vmlinux 0x97c68536	spi_setup
+EXPORT_SYMBOL_GPL vmlinux 0x98173363	usb_put_dev
+EXPORT_SYMBOL_GPL vmlinux 0x9833bc0c	hvc_kick
+EXPORT_SYMBOL_GPL vmlinux 0x986cf200	rtc_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x9886df5d	crypto_alloc_instance
+EXPORT_SYMBOL_GPL vmlinux 0x98bff275	seq_open_net
+EXPORT_SYMBOL_GPL vmlinux 0x991437bd	inverse_translate
+EXPORT_SYMBOL_GPL vmlinux 0x9924c496	__usb_get_extra_descriptor
+EXPORT_SYMBOL_GPL vmlinux 0x995d1071	prof_on
+EXPORT_SYMBOL_GPL vmlinux 0x9984c858	usb_unpoison_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0x99ba3077	skb_to_sgvec
+EXPORT_SYMBOL_GPL vmlinux 0x99c3775c	kmap_atomic_pfn
+EXPORT_SYMBOL_GPL vmlinux 0x9a04c379	ring_buffer_read_finish
+EXPORT_SYMBOL_GPL vmlinux 0x9a11a0fc	crypto_attr_alg_name
+EXPORT_SYMBOL_GPL vmlinux 0x9a1444dc	transport_destroy_device
+EXPORT_SYMBOL_GPL vmlinux 0x9a95d243	attribute_container_find_class_device
+EXPORT_SYMBOL_GPL vmlinux 0x9aefb022	ring_buffer_consume
+EXPORT_SYMBOL_GPL vmlinux 0x9b2d12da	root_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x9b31d285	sysdev_register
+EXPORT_SYMBOL_GPL vmlinux 0x9b849f94	blk_rq_prep_clone
+EXPORT_SYMBOL_GPL vmlinux 0x9b8b3e51	acpi_processor_ffh_cstate_probe
+EXPORT_SYMBOL_GPL vmlinux 0x9ba0501e	unregister_vt_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x9bab1cf0	power_supply_set_battery_charged
+EXPORT_SYMBOL_GPL vmlinux 0x9bc8c8a7	cpufreq_frequency_table_target
+EXPORT_SYMBOL_GPL vmlinux 0x9bd95409	ata_sff_tf_read
+EXPORT_SYMBOL_GPL vmlinux 0x9be55be7	page_mkclean
+EXPORT_SYMBOL_GPL vmlinux 0x9c311efd	device_attach
+EXPORT_SYMBOL_GPL vmlinux 0x9c31d063	vfs_setlease
+EXPORT_SYMBOL_GPL vmlinux 0x9c33d049	pci_create_slot
+EXPORT_SYMBOL_GPL vmlinux 0x9c4897f6	generic_fh_to_parent
+EXPORT_SYMBOL_GPL vmlinux 0x9cb8037b	xfrm_count_enc_supported
+EXPORT_SYMBOL_GPL vmlinux 0x9d030b99	stop_machine
+EXPORT_SYMBOL_GPL vmlinux 0x9d0d447b	inet6_csk_xmit
+EXPORT_SYMBOL_GPL vmlinux 0x9d14ae6c	ata_scsi_queuecmd
+EXPORT_SYMBOL_GPL vmlinux 0x9d2b6a58	hpet_register_irq_handler
+EXPORT_SYMBOL_GPL vmlinux 0x9d308c4d	hrtimer_try_to_cancel
+EXPORT_SYMBOL_GPL vmlinux 0x9d675b0b	pci_ioremap_bar
+EXPORT_SYMBOL_GPL vmlinux 0x9d7ff4c9	crypto_unregister_shash
+EXPORT_SYMBOL_GPL vmlinux 0x9dad2d45	sdio_writesb
+EXPORT_SYMBOL_GPL vmlinux 0x9dd53ad0	dm_rh_bio_to_region
+EXPORT_SYMBOL_GPL vmlinux 0x9e01f6d4	eventfd_signal
+EXPORT_SYMBOL_GPL vmlinux 0x9e5c9d7d	scsi_dh_activate
+EXPORT_SYMBOL_GPL vmlinux 0x9e6687f8	vfs_lock_file
+EXPORT_SYMBOL_GPL vmlinux 0x9e711ad2	pm_qos_requirement
+EXPORT_SYMBOL_GPL vmlinux 0x9e922c95	tty_ldisc_flush
+EXPORT_SYMBOL_GPL vmlinux 0x9ebff902	start_thread
+EXPORT_SYMBOL_GPL vmlinux 0x9edf10f8	get_device
+EXPORT_SYMBOL_GPL vmlinux 0x9f40a6d6	async_synchronize_full_domain
+EXPORT_SYMBOL_GPL vmlinux 0x9f418ff9	fuse_request_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x9f7192a2	class_interface_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x9f807b95	ata_sff_port_start
+EXPORT_SYMBOL_GPL vmlinux 0x9f85ed90	klist_remove
+EXPORT_SYMBOL_GPL vmlinux 0x9f99df43	skcipher_geniv_exit
+EXPORT_SYMBOL_GPL vmlinux 0x9fce80db	fb_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x9fedee71	ata_pci_device_do_resume
+EXPORT_SYMBOL_GPL vmlinux 0xa0255440	net_ipv4_ctl_path
+EXPORT_SYMBOL_GPL vmlinux 0xa077d353	crypto_nivaead_type
+EXPORT_SYMBOL_GPL vmlinux 0xa08ee79a	get_task_mm
+EXPORT_SYMBOL_GPL vmlinux 0xa0e22e1f	ata_dev_next
+EXPORT_SYMBOL_GPL vmlinux 0xa14b0a98	tty_init_termios
+EXPORT_SYMBOL_GPL vmlinux 0xa15e65a8	crypto_blkcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0xa18f3d5c	iounmap_atomic
+EXPORT_SYMBOL_GPL vmlinux 0xa1a9c957	pci_set_pcie_reset_state
+EXPORT_SYMBOL_GPL vmlinux 0xa1ab74c8	cpuidle_enable_device
+EXPORT_SYMBOL_GPL vmlinux 0xa1b66cb1	ata_port_desc
+EXPORT_SYMBOL_GPL vmlinux 0xa1c72b1b	locks_release_private
+EXPORT_SYMBOL_GPL vmlinux 0xa1d766e9	tcp_death_row
+EXPORT_SYMBOL_GPL vmlinux 0xa28d8527	usb_poison_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0xa2978799	crypto_shash_setkey
+EXPORT_SYMBOL_GPL vmlinux 0xa2e67f08	acpi_bus_generate_proc_event4
+EXPORT_SYMBOL_GPL vmlinux 0xa2f71244	sysdev_driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xa336cd95	unregister_pernet_device
+EXPORT_SYMBOL_GPL vmlinux 0xa3c0910e	ahash_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0xa3c7c686	proc_net_remove
+EXPORT_SYMBOL_GPL vmlinux 0xa3d292c9	relay_file_operations
+EXPORT_SYMBOL_GPL vmlinux 0xa40a8590	input_event_to_user
+EXPORT_SYMBOL_GPL vmlinux 0xa452c297	hpet_mask_rtc_irq_bit
+EXPORT_SYMBOL_GPL vmlinux 0xa4f3460a	usb_buffer_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xa4ffe211	inotify_find_update_watch
+EXPORT_SYMBOL_GPL vmlinux 0xa5633362	fuse_conn_kill
+EXPORT_SYMBOL_GPL vmlinux 0xa5798f45	blk_trace_startstop
+EXPORT_SYMBOL_GPL vmlinux 0xa5bf5c3e	pm_qos_add_requirement
+EXPORT_SYMBOL_GPL vmlinux 0xa5bfb061	acpi_smbus_register_callback
+EXPORT_SYMBOL_GPL vmlinux 0xa5c36cec	inotify_unmount_inodes
+EXPORT_SYMBOL_GPL vmlinux 0xa5ee6c3d	sata_link_resume
+EXPORT_SYMBOL_GPL vmlinux 0xa5efbf4c	async_synchronize_full
+EXPORT_SYMBOL_GPL vmlinux 0xa616f7a2	dev_attr_em_message_type
+EXPORT_SYMBOL_GPL vmlinux 0xa649959e	platform_device_del
+EXPORT_SYMBOL_GPL vmlinux 0xa6598651	shash_ahash_update
+EXPORT_SYMBOL_GPL vmlinux 0xa66ca854	class_dev_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0xa68381e6	driver_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xa74f50b8	dm_put
+EXPORT_SYMBOL_GPL vmlinux 0xa7b3d2c3	xfrm_audit_state_notfound
+EXPORT_SYMBOL_GPL vmlinux 0xa7e1e2a1	bus_rescan_devices
+EXPORT_SYMBOL_GPL vmlinux 0xa8023e23	inotify_add_watch
+EXPORT_SYMBOL_GPL vmlinux 0xa81bb815	device_schedule_callback_owner
+EXPORT_SYMBOL_GPL vmlinux 0xa8543488	ata_sff_port_start32
+EXPORT_SYMBOL_GPL vmlinux 0xa877b045	ip6_sk_dst_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xa8817b28	tracepoint_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0xa8ea0331	inet6_csk_addr2sockaddr
+EXPORT_SYMBOL_GPL vmlinux 0xa8f59416	gpio_direction_output
+EXPORT_SYMBOL_GPL vmlinux 0xa9126bff	hpet_set_rtc_irq_bit
+EXPORT_SYMBOL_GPL vmlinux 0xa990200c	ata_acpi_gtm_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0xa9936cf7	dm_rh_recovery_in_flight
+EXPORT_SYMBOL_GPL vmlinux 0xa9a480bf	usb_autopm_put_interface_async
+EXPORT_SYMBOL_GPL vmlinux 0xa9b7afd8	wmi_set_block
+EXPORT_SYMBOL_GPL vmlinux 0xa9c530b8	unregister_oom_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xaa028894	disk_part_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0xaa250bfb	skcipher_geniv_init
+EXPORT_SYMBOL_GPL vmlinux 0xaa2a72bf	__iowrite64_copy
+EXPORT_SYMBOL_GPL vmlinux 0xaa3e3aea	__i2c_board_lock
+EXPORT_SYMBOL_GPL vmlinux 0xaa5310f9	__tracepoint_napi_poll
+EXPORT_SYMBOL_GPL vmlinux 0xaa718c53	inotify_rm_wd
+EXPORT_SYMBOL_GPL vmlinux 0xaa8c4696	cpu_clock
+EXPORT_SYMBOL_GPL vmlinux 0xaaddf6ca	blocking_notifier_chain_cond_register
+EXPORT_SYMBOL_GPL vmlinux 0xaaec1bde	xattr_getsecurity
+EXPORT_SYMBOL_GPL vmlinux 0xaafed964	dm_noflush_suspending
+EXPORT_SYMBOL_GPL vmlinux 0xab18606e	blk_queue_rq_timeout
+EXPORT_SYMBOL_GPL vmlinux 0xab410444	bus_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0xab41bd91	led_trigger_remove
+EXPORT_SYMBOL_GPL vmlinux 0xab57e311	tracepoint_probe_register
+EXPORT_SYMBOL_GPL vmlinux 0xabb326ba	sata_std_hardreset
+EXPORT_SYMBOL_GPL vmlinux 0xac157aa6	usb_put_hcd
+EXPORT_SYMBOL_GPL vmlinux 0xac76fb45	usb_register_device_driver
+EXPORT_SYMBOL_GPL vmlinux 0xac83ef60	dm_rh_recovery_start
+EXPORT_SYMBOL_GPL vmlinux 0xacafa8e7	vector_used_by_percpu_irq
+EXPORT_SYMBOL_GPL vmlinux 0xacc19485	ibft_addr
+EXPORT_SYMBOL_GPL vmlinux 0xacc8b52e	driver_find_device
+EXPORT_SYMBOL_GPL vmlinux 0xace5c0fc	usb_bus_list
+EXPORT_SYMBOL_GPL vmlinux 0xad0dcf5b	inotify_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xad13c8d5	tty_find_polling_driver
+EXPORT_SYMBOL_GPL vmlinux 0xad3ba9f0	class_dev_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0xad3d8b6a	crypto_ahash_final
+EXPORT_SYMBOL_GPL vmlinux 0xad64be2a	crypto_drop_spawn
+EXPORT_SYMBOL_GPL vmlinux 0xad7a93e8	crypto_shash_digest
+EXPORT_SYMBOL_GPL vmlinux 0xada09a43	rtc_set_alarm
+EXPORT_SYMBOL_GPL vmlinux 0xadbc3638	bus_get_device_klist
+EXPORT_SYMBOL_GPL vmlinux 0xae066077	sk_clone
+EXPORT_SYMBOL_GPL vmlinux 0xae0c87ee	pm_qos_remove_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xae47dd1c	queue_work_on
+EXPORT_SYMBOL_GPL vmlinux 0xaea2b045	ata_sff_pause
+EXPORT_SYMBOL_GPL vmlinux 0xaeb793c3	usb_init_urb
+EXPORT_SYMBOL_GPL vmlinux 0xaf3d67e7	fb_deferred_io_cleanup
+EXPORT_SYMBOL_GPL vmlinux 0xaf3f6fe0	ata_sff_interrupt
+EXPORT_SYMBOL_GPL vmlinux 0xafc7c996	usb_unlink_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0xafef2086	elv_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xaffd105e	debugfs_create_u32
+EXPORT_SYMBOL_GPL vmlinux 0xb0223109	klist_next
+EXPORT_SYMBOL_GPL vmlinux 0xb0911f4e	dm_rh_delay
+EXPORT_SYMBOL_GPL vmlinux 0xb096da39	sdio_enable_func
+EXPORT_SYMBOL_GPL vmlinux 0xb0aa812e	fips_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xb0eedea9	usb_wait_anchor_empty_timeout
+EXPORT_SYMBOL_GPL vmlinux 0xb0fe34d3	fb_bl_default_curve
+EXPORT_SYMBOL_GPL vmlinux 0xb10d55bc	cn_netlink_send
+EXPORT_SYMBOL_GPL vmlinux 0xb12ba28a	__pm_runtime_put
+EXPORT_SYMBOL_GPL vmlinux 0xb1451ff3	kernel_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xb1827505	tcp_get_info
+EXPORT_SYMBOL_GPL vmlinux 0xb18429eb	suspend_device_irqs
+EXPORT_SYMBOL_GPL vmlinux 0xb18506b9	smp_ops
+EXPORT_SYMBOL_GPL vmlinux 0xb1acbcce	rcu_barrier_sched
+EXPORT_SYMBOL_GPL vmlinux 0xb23232b2	srcu_init_notifier_head
+EXPORT_SYMBOL_GPL vmlinux 0xb28b72e2	vfs_removexattr
+EXPORT_SYMBOL_GPL vmlinux 0xb2ddff96	usb_create_hcd
+EXPORT_SYMBOL_GPL vmlinux 0xb2ffe518	macvlan_handle_frame_hook
+EXPORT_SYMBOL_GPL vmlinux 0xb31b2140	add_page_wait_queue
+EXPORT_SYMBOL_GPL vmlinux 0xb3253ed9	hpet_rtc_timer_init
+EXPORT_SYMBOL_GPL vmlinux 0xb3a3cac9	blk_execute_rq_nowait
+EXPORT_SYMBOL_GPL vmlinux 0xb3ae8971	dma_wait_for_async_tx
+EXPORT_SYMBOL_GPL vmlinux 0xb3b66cf6	cpci_hp_unregister_bus
+EXPORT_SYMBOL_GPL vmlinux 0xb3d03316	ata_port_pbar_desc
+EXPORT_SYMBOL_GPL vmlinux 0xb47bbaf9	sk_setup_caps
+EXPORT_SYMBOL_GPL vmlinux 0xb49cd28b	inotify_init
+EXPORT_SYMBOL_GPL vmlinux 0xb4ea7cf7	kgdb_connected
+EXPORT_SYMBOL_GPL vmlinux 0xb4ef0d32	sysdev_show_ulong
+EXPORT_SYMBOL_GPL vmlinux 0xb51fbd64	edac_op_state
+EXPORT_SYMBOL_GPL vmlinux 0xb52eaf2d	tty_buffer_request_room
+EXPORT_SYMBOL_GPL vmlinux 0xb53ae573	cpu_idle_wait
+EXPORT_SYMBOL_GPL vmlinux 0xb54f9fbd	driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xb58dcfa2	synchronize_sched_expedited
+EXPORT_SYMBOL_GPL vmlinux 0xb5954e71	ata_pci_sff_init_host
+EXPORT_SYMBOL_GPL vmlinux 0xb5a6ebe2	wmi_remove_notify_handler
+EXPORT_SYMBOL_GPL vmlinux 0xb5b5ee9d	sdio_readw
+EXPORT_SYMBOL_GPL vmlinux 0xb5d8913d	register_jprobe
+EXPORT_SYMBOL_GPL vmlinux 0xb65091b3	selinux_secmark_refcount_dec
+EXPORT_SYMBOL_GPL vmlinux 0xb694f8e9	rtnl_put_cacheinfo
+EXPORT_SYMBOL_GPL vmlinux 0xb6aeb661	ata_id_c_string
+EXPORT_SYMBOL_GPL vmlinux 0xb6c018f4	dm_rh_inc_pending
+EXPORT_SYMBOL_GPL vmlinux 0xb6ea78ea	get_net_ns_by_pid
+EXPORT_SYMBOL_GPL vmlinux 0xb718f2f9	sfi_table_parse
+EXPORT_SYMBOL_GPL vmlinux 0xb744fa43	xfrm_ealg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0xb781becd	regulator_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xb7d7c12e	hpet_set_alarm_time
+EXPORT_SYMBOL_GPL vmlinux 0xb7db42b0	sysfs_create_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0xb7e2eb91	mce_cpu_specific_poll
+EXPORT_SYMBOL_GPL vmlinux 0xb7fdd0df	eventfd_ctx_put
+EXPORT_SYMBOL_GPL vmlinux 0xb84e4c47	iomap_free
+EXPORT_SYMBOL_GPL vmlinux 0xb8857caf	class_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xb888c736	bd_claim_by_disk
+EXPORT_SYMBOL_GPL vmlinux 0xb8af6c97	sdio_f0_readb
+EXPORT_SYMBOL_GPL vmlinux 0xb8de734f	mm_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xb8e3d5e7	ata_bmdma_stop
+EXPORT_SYMBOL_GPL vmlinux 0xb90045b4	device_add
+EXPORT_SYMBOL_GPL vmlinux 0xb94ba2f8	ata_bmdma_mode_filter
+EXPORT_SYMBOL_GPL vmlinux 0xb956f9f3	bus_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xb97d43a5	pci_bus_max_busnr
+EXPORT_SYMBOL_GPL vmlinux 0xb986cc6e	bd_release_from_disk
+EXPORT_SYMBOL_GPL vmlinux 0xb9b40802	dm_rh_stop_recovery
+EXPORT_SYMBOL_GPL vmlinux 0xb9eb3aa9	add_uevent_var
+EXPORT_SYMBOL_GPL vmlinux 0xb9f9f0e7	skb_morph
+EXPORT_SYMBOL_GPL vmlinux 0xba002a90	regulator_set_current_limit
+EXPORT_SYMBOL_GPL vmlinux 0xba690e41	transport_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xbaa52d5d	led_trigger_show
+EXPORT_SYMBOL_GPL vmlinux 0xbae34c27	scsi_nl_remove_transport
+EXPORT_SYMBOL_GPL vmlinux 0xbaf79647	ata_do_eh
+EXPORT_SYMBOL_GPL vmlinux 0xbb1e85ea	bus_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xbb4a1408	klist_init
+EXPORT_SYMBOL_GPL vmlinux 0xbb4a79c5	usb_autopm_get_interface
+EXPORT_SYMBOL_GPL vmlinux 0xbb6254ce	proc_net_fops_create
+EXPORT_SYMBOL_GPL vmlinux 0xbb81bfe5	__ip_route_output_key
+EXPORT_SYMBOL_GPL vmlinux 0xbbb98859	edid_info
+EXPORT_SYMBOL_GPL vmlinux 0xbbfb1bb6	dm_send_uevents
+EXPORT_SYMBOL_GPL vmlinux 0xbc42bffa	dm_rh_recovery_end
+EXPORT_SYMBOL_GPL vmlinux 0xbcb7c376	dma_run_dependencies
+EXPORT_SYMBOL_GPL vmlinux 0xbcfdcf35	platform_device_register
+EXPORT_SYMBOL_GPL vmlinux 0xbd0f69f2	blk_trace_remove
+EXPORT_SYMBOL_GPL vmlinux 0xbd506a46	unregister_hotplug_dock_device
+EXPORT_SYMBOL_GPL vmlinux 0xbd93cef7	dm_underlying_device_busy
+EXPORT_SYMBOL_GPL vmlinux 0xbdacd6a8	devm_kfree
+EXPORT_SYMBOL_GPL vmlinux 0xbdd295f0	trace_vprintk
+EXPORT_SYMBOL_GPL vmlinux 0xbe116723	do_posix_clock_nosettime
+EXPORT_SYMBOL_GPL vmlinux 0xbe1887e4	ata_unpack_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0xbe584033	spi_sync
+EXPORT_SYMBOL_GPL vmlinux 0xbec73a3e	xfrm_audit_state_delete
+EXPORT_SYMBOL_GPL vmlinux 0xbed2bb47	ring_buffer_entries
+EXPORT_SYMBOL_GPL vmlinux 0xbef0ce12	unregister_kretprobes
+EXPORT_SYMBOL_GPL vmlinux 0xbf16fe3f	dm_region_hash_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xbf41ee5c	ring_buffer_lock_reserve
+EXPORT_SYMBOL_GPL vmlinux 0xbf991722	platform_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xbfa23701	sdio_memcpy_toio
+EXPORT_SYMBOL_GPL vmlinux 0xbfd5655a	crypto_init_shash_spawn
+EXPORT_SYMBOL_GPL vmlinux 0xc00a9714	rtnl_kill_links
+EXPORT_SYMBOL_GPL vmlinux 0xc012daf6	nf_unregister_afinfo
+EXPORT_SYMBOL_GPL vmlinux 0xc01d4154	inet6_lookup_listener
+EXPORT_SYMBOL_GPL vmlinux 0xc02a9829	debugfs_create_symlink
+EXPORT_SYMBOL_GPL vmlinux 0xc03712a3	ata_sff_thaw
+EXPORT_SYMBOL_GPL vmlinux 0xc05beb8d	dm_rh_dec
+EXPORT_SYMBOL_GPL vmlinux 0xc0a3ea77	inet_csk_listen_stop
+EXPORT_SYMBOL_GPL vmlinux 0xc10370cd	ip_local_out
+EXPORT_SYMBOL_GPL vmlinux 0xc1139676	led_trigger_set_default
+EXPORT_SYMBOL_GPL vmlinux 0xc126e890	klist_del
+EXPORT_SYMBOL_GPL vmlinux 0xc163ae64	ata_eh_thaw_port
+EXPORT_SYMBOL_GPL vmlinux 0xc17515d7	usb_hcds_loaded
+EXPORT_SYMBOL_GPL vmlinux 0xc1916594	crypto_register_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0xc1b79bab	dm_disk
+EXPORT_SYMBOL_GPL vmlinux 0xc2026d3c	ring_buffer_free
+EXPORT_SYMBOL_GPL vmlinux 0xc20f7a94	disk_part_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0xc22a3091	vm_unmap_aliases
+EXPORT_SYMBOL_GPL vmlinux 0xc22b5d4e	regulator_get
+EXPORT_SYMBOL_GPL vmlinux 0xc24403bd	sysdev_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0xc297055e	ring_buffer_empty
+EXPORT_SYMBOL_GPL vmlinux 0xc2ef3694	inet6_csk_search_req
+EXPORT_SYMBOL_GPL vmlinux 0xc309445c	crypto_init_spawn
+EXPORT_SYMBOL_GPL vmlinux 0xc3301f02	rcu_expedited_torture_stats
+EXPORT_SYMBOL_GPL vmlinux 0xc34efe27	snmp_fold_field
+EXPORT_SYMBOL_GPL vmlinux 0xc35f3692	ring_buffer_overrun_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xc399468f	scsi_nl_remove_driver
+EXPORT_SYMBOL_GPL vmlinux 0xc3aded03	kobject_uevent
+EXPORT_SYMBOL_GPL vmlinux 0xc3dbf0f0	crypto_ahash_type
+EXPORT_SYMBOL_GPL vmlinux 0xc403fcfc	simple_attr_release
+EXPORT_SYMBOL_GPL vmlinux 0xc428068d	sata_deb_timing_long
+EXPORT_SYMBOL_GPL vmlinux 0xc48b7ccf	ata_mode_string
+EXPORT_SYMBOL_GPL vmlinux 0xc4b33aa6	tracepoint_probe_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xc502554d	md_allow_write
+EXPORT_SYMBOL_GPL vmlinux 0xc50bea5a	register_pernet_device
+EXPORT_SYMBOL_GPL vmlinux 0xc512626a	__supported_pte_mask
+EXPORT_SYMBOL_GPL vmlinux 0xc51b5f4d	transport_add_device
+EXPORT_SYMBOL_GPL vmlinux 0xc532a021	srcu_read_lock
+EXPORT_SYMBOL_GPL vmlinux 0xc539b0dc	tracepoint_iter_reset
+EXPORT_SYMBOL_GPL vmlinux 0xc580fe3f	ata_sas_slave_configure
+EXPORT_SYMBOL_GPL vmlinux 0xc58cdb60	lookup_address
+EXPORT_SYMBOL_GPL vmlinux 0xc5a5d116	mnt_clone_write
+EXPORT_SYMBOL_GPL vmlinux 0xc5bb71c7	dev_attr_em_message
+EXPORT_SYMBOL_GPL vmlinux 0xc5e2e9fd	dev_set_name
+EXPORT_SYMBOL_GPL vmlinux 0xc5e3dddf	wmi_get_event_data
+EXPORT_SYMBOL_GPL vmlinux 0xc60f75ec	__ftrace_vprintk
+EXPORT_SYMBOL_GPL vmlinux 0xc654e643	sysfs_notify_dirent
+EXPORT_SYMBOL_GPL vmlinux 0xc673e23e	ata_scsi_change_queue_depth
+EXPORT_SYMBOL_GPL vmlinux 0xc6844749	mmput
+EXPORT_SYMBOL_GPL vmlinux 0xc6aca21a	driver_attach
+EXPORT_SYMBOL_GPL vmlinux 0xc6e7e932	usb_free_urb
+EXPORT_SYMBOL_GPL vmlinux 0xc6ffa8bc	platform_driver_probe
+EXPORT_SYMBOL_GPL vmlinux 0xc77a6cf6	usb_hcd_pci_probe
+EXPORT_SYMBOL_GPL vmlinux 0xc7830b9e	tcp_twsk_unique
+EXPORT_SYMBOL_GPL vmlinux 0xc7bf2dea	i2c_new_dummy
+EXPORT_SYMBOL_GPL vmlinux 0xc7d19f6b	ata_sff_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0xc7ec11f6	atomic_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xc80ee048	pci_sriov_migration
+EXPORT_SYMBOL_GPL vmlinux 0xc87c1f84	ktime_get
+EXPORT_SYMBOL_GPL vmlinux 0xc87e487a	sched_clock_idle_sleep_event
+EXPORT_SYMBOL_GPL vmlinux 0xc8c3b41d	pciserial_suspend_ports
+EXPORT_SYMBOL_GPL vmlinux 0xc8ca93c2	ring_buffer_iter_empty
+EXPORT_SYMBOL_GPL vmlinux 0xc908fe6f	ip6_local_out
+EXPORT_SYMBOL_GPL vmlinux 0xc9119655	sata_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0xc94c7f5b	do_add_mount
+EXPORT_SYMBOL_GPL vmlinux 0xc9561772	fb_destroy_modelist
+EXPORT_SYMBOL_GPL vmlinux 0xc9999c5a	anon_inode_getfd
+EXPORT_SYMBOL_GPL vmlinux 0xc9a28931	find_module
+EXPORT_SYMBOL_GPL vmlinux 0xc9d4d6d1	wmi_has_guid
+EXPORT_SYMBOL_GPL vmlinux 0xc9e6ccdf	cpufreq_register_governor
+EXPORT_SYMBOL_GPL vmlinux 0xc9ec4e21	free_percpu
+EXPORT_SYMBOL_GPL vmlinux 0xc9f5c1f2	usb_autopm_set_interface
+EXPORT_SYMBOL_GPL vmlinux 0xca01f51c	tcp_orphan_count
+EXPORT_SYMBOL_GPL vmlinux 0xca0ae6e9	ring_buffer_record_disable_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xca85d8cf	tracepoint_probe_update_all
+EXPORT_SYMBOL_GPL vmlinux 0xca8eb935	devres_release_group
+EXPORT_SYMBOL_GPL vmlinux 0xcabe04de	cpuidle_resume_and_unlock
+EXPORT_SYMBOL_GPL vmlinux 0xcafb88ce	aead_geniv_init
+EXPORT_SYMBOL_GPL vmlinux 0xcafe2511	fuse_do_open
+EXPORT_SYMBOL_GPL vmlinux 0xcaffab2b	ahash_free_instance
+EXPORT_SYMBOL_GPL vmlinux 0xcb02579e	devres_find
+EXPORT_SYMBOL_GPL vmlinux 0xcb85cf0d	blk_lld_busy
+EXPORT_SYMBOL_GPL vmlinux 0xcba265a6	bus_find_device
+EXPORT_SYMBOL_GPL vmlinux 0xcba688bd	blkdev_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xcbd2239f	pci_renumber_slot
+EXPORT_SYMBOL_GPL vmlinux 0xcc1f1c3d	inet_twdr_hangman
+EXPORT_SYMBOL_GPL vmlinux 0xcc6ab305	is_dock_device
+EXPORT_SYMBOL_GPL vmlinux 0xcca67bb8	crypto_alg_mod_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xcccfb2fa	sata_deb_timing_hotplug
+EXPORT_SYMBOL_GPL vmlinux 0xcd132c85	device_remove_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0xcd2f83d3	power_supply_get_by_name
+EXPORT_SYMBOL_GPL vmlinux 0xcd405f28	pci_enable_pcie_error_reporting
+EXPORT_SYMBOL_GPL vmlinux 0xcdca3691	nr_irqs
+EXPORT_SYMBOL_GPL vmlinux 0xce33b02c	bus_get_kset
+EXPORT_SYMBOL_GPL vmlinux 0xce74aa27	sched_setscheduler
+EXPORT_SYMBOL_GPL vmlinux 0xceb80716	rtnl_link_register
+EXPORT_SYMBOL_GPL vmlinux 0xceb918a2	unregister_ftrace_event
+EXPORT_SYMBOL_GPL vmlinux 0xcebc36bd	acpi_ec_add_query_handler
+EXPORT_SYMBOL_GPL vmlinux 0xcef25677	rtc_irq_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xcf7a962e	cn_add_callback
+EXPORT_SYMBOL_GPL vmlinux 0xcfc68341	synchronize_rcu_bh
+EXPORT_SYMBOL_GPL vmlinux 0xcfcc83ad	register_vt_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xcfd905c0	ata_sff_data_xfer32
+EXPORT_SYMBOL_GPL vmlinux 0xd0189dd0	invalidate_inode_pages2
+EXPORT_SYMBOL_GPL vmlinux 0xd02965ec	get_cpu_sysdev
+EXPORT_SYMBOL_GPL vmlinux 0xd03c7700	secure_ipv4_port_ephemeral
+EXPORT_SYMBOL_GPL vmlinux 0xd03fdcc0	hrtimer_start
+EXPORT_SYMBOL_GPL vmlinux 0xd0c05159	emergency_restart
+EXPORT_SYMBOL_GPL vmlinux 0xd0e598b9	mnt_drop_write
+EXPORT_SYMBOL_GPL vmlinux 0xd0fce4e1	usb_poison_urb
+EXPORT_SYMBOL_GPL vmlinux 0xd12ac59b	olpc_ec_cmd
+EXPORT_SYMBOL_GPL vmlinux 0xd137168a	driver_add_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xd1392c43	sata_scr_read
+EXPORT_SYMBOL_GPL vmlinux 0xd1568727	dma_get_required_mask
+EXPORT_SYMBOL_GPL vmlinux 0xd16712f3	crypto_check_attr_type
+EXPORT_SYMBOL_GPL vmlinux 0xd19bbcea	devres_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xd2020f92	disk_get_part
+EXPORT_SYMBOL_GPL vmlinux 0xd2338f6a	skb_gro_receive
+EXPORT_SYMBOL_GPL vmlinux 0xd270827c	blkcipher_walk_virt
+EXPORT_SYMBOL_GPL vmlinux 0xd273b1b1	__round_jiffies_up_relative
+EXPORT_SYMBOL_GPL vmlinux 0xd2a8caf0	work_on_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xd3632b0f	nf_register_afinfo
+EXPORT_SYMBOL_GPL vmlinux 0xd3867882	regulator_get_init_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0xd3a48732	ata_pci_device_resume
+EXPORT_SYMBOL_GPL vmlinux 0xd3a6d7b9	sdio_release_host
+EXPORT_SYMBOL_GPL vmlinux 0xd3c230b4	driver_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0xd3c583b6	ring_buffer_normalize_time_stamp
+EXPORT_SYMBOL_GPL vmlinux 0xd3c5a8d3	sysdev_store_ulong
+EXPORT_SYMBOL_GPL vmlinux 0xd3e2fd0a	ring_buffer_record_disable
+EXPORT_SYMBOL_GPL vmlinux 0xd48ece34	sdio_set_block_size
+EXPORT_SYMBOL_GPL vmlinux 0xd494ee54	speedstep_get_freqs
+EXPORT_SYMBOL_GPL vmlinux 0xd49f211c	device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xd49f5e68	pci_find_ht_capability
+EXPORT_SYMBOL_GPL vmlinux 0xd4bc6c21	ata_host_init
+EXPORT_SYMBOL_GPL vmlinux 0xd4e3ab88	dm_rh_mark_nosync
+EXPORT_SYMBOL_GPL vmlinux 0xd5051eb7	anon_transport_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xd55488d6	__inet_lookup_listener
+EXPORT_SYMBOL_GPL vmlinux 0xd56529fd	usb_sg_wait
+EXPORT_SYMBOL_GPL vmlinux 0xd5b89c2b	class_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xd66a4d4a	device_bind_driver
+EXPORT_SYMBOL_GPL vmlinux 0xd687079c	ata_port_probe
+EXPORT_SYMBOL_GPL vmlinux 0xd6f534ad	ata_std_qc_defer
+EXPORT_SYMBOL_GPL vmlinux 0xd6f54ade	ata_pci_device_do_suspend
+EXPORT_SYMBOL_GPL vmlinux 0xd6f889f5	pciserial_init_ports
+EXPORT_SYMBOL_GPL vmlinux 0xd705b4c7	schedule_hrtimeout
+EXPORT_SYMBOL_GPL vmlinux 0xd73ef534	sysdev_resume
+EXPORT_SYMBOL_GPL vmlinux 0xd757577f	sysdev_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xd76412eb	usb_get_hcd
+EXPORT_SYMBOL_GPL vmlinux 0xd768e985	regulator_has_full_constraints
+EXPORT_SYMBOL_GPL vmlinux 0xd7888ff4	ata_pci_device_suspend
+EXPORT_SYMBOL_GPL vmlinux 0xd7a6c612	simple_attr_write
+EXPORT_SYMBOL_GPL vmlinux 0xd7d79132	put_online_cpus
+EXPORT_SYMBOL_GPL vmlinux 0xd8290e75	mmu_notifier_register
+EXPORT_SYMBOL_GPL vmlinux 0xd83018f7	fib_rules_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xd83eb380	ahash_attr_alg
+EXPORT_SYMBOL_GPL vmlinux 0xd8a481db	usb_reset_endpoint
+EXPORT_SYMBOL_GPL vmlinux 0xd8f04835	debugfs_create_blob
+EXPORT_SYMBOL_GPL vmlinux 0xd92963ac	__blk_end_request_err
+EXPORT_SYMBOL_GPL vmlinux 0xd9b037de	handle_level_irq
+EXPORT_SYMBOL_GPL vmlinux 0xda093834	tty_prepare_flip_string_flags
+EXPORT_SYMBOL_GPL vmlinux 0xda0b4bc2	pci_unblock_user_cfg_access
+EXPORT_SYMBOL_GPL vmlinux 0xda1be8e1	async_synchronize_cookie_domain
+EXPORT_SYMBOL_GPL vmlinux 0xda5430ee	sysfs_put
+EXPORT_SYMBOL_GPL vmlinux 0xda6aa81b	device_create_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0xda807fed	fuse_get_req
+EXPORT_SYMBOL_GPL vmlinux 0xda93c09d	regulator_set_optimum_mode
+EXPORT_SYMBOL_GPL vmlinux 0xda95a7c0	ipv6_find_tlv
+EXPORT_SYMBOL_GPL vmlinux 0xda965789	ata_sff_qc_issue
+EXPORT_SYMBOL_GPL vmlinux 0xdaa61f0c	proc_net_mkdir
+EXPORT_SYMBOL_GPL vmlinux 0xdab911c4	fuse_file_poll
+EXPORT_SYMBOL_GPL vmlinux 0xdaea0006	blk_update_request
+EXPORT_SYMBOL_GPL vmlinux 0xdaf4dfb3	fb_mode_option
+EXPORT_SYMBOL_GPL vmlinux 0xdafa0010	devm_kzalloc
+EXPORT_SYMBOL_GPL vmlinux 0xdb274e52	monotonic_to_bootbased
+EXPORT_SYMBOL_GPL vmlinux 0xdb47881c	crypto_larval_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xdb65723c	lookup_instantiate_filp
+EXPORT_SYMBOL_GPL vmlinux 0xdba64f1c	eventfd_ctx_get
+EXPORT_SYMBOL_GPL vmlinux 0xdbe469b0	pci_scan_child_bus
+EXPORT_SYMBOL_GPL vmlinux 0xdc15007d	class_compat_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xdc26874b	pciserial_resume_ports
+EXPORT_SYMBOL_GPL vmlinux 0xdc3bc370	devres_open_group
+EXPORT_SYMBOL_GPL vmlinux 0xdc66219e	task_current_syscall
+EXPORT_SYMBOL_GPL vmlinux 0xdc714560	register_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0xdc739b86	md_new_event
+EXPORT_SYMBOL_GPL vmlinux 0xdc7c5ef7	sysdev_class_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xdceef46b	ata_link_online
+EXPORT_SYMBOL_GPL vmlinux 0xddd62f58	usb_buffer_free
+EXPORT_SYMBOL_GPL vmlinux 0xddd9c97d	save_stack_trace_tsk
+EXPORT_SYMBOL_GPL vmlinux 0xddf5b55a	pci_stop_bus_device
+EXPORT_SYMBOL_GPL vmlinux 0xde393dd2	fuse_dev_operations
+EXPORT_SYMBOL_GPL vmlinux 0xde417b81	async_schedule_domain
+EXPORT_SYMBOL_GPL vmlinux 0xde48df18	__cpufreq_driver_target
+EXPORT_SYMBOL_GPL vmlinux 0xde680cd6	sysfs_remove_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0xdec589d4	cpufreq_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0xdf017948	inet_csk_reqsk_queue_prune
+EXPORT_SYMBOL_GPL vmlinux 0xdf04f345	fuse_dev_release
+EXPORT_SYMBOL_GPL vmlinux 0xdf0c74a4	shash_ahash_digest
+EXPORT_SYMBOL_GPL vmlinux 0xdf128c80	ata_link_offline
+EXPORT_SYMBOL_GPL vmlinux 0xdf370352	pciserial_remove_ports
+EXPORT_SYMBOL_GPL vmlinux 0xdf6178f9	posix_timer_event
+EXPORT_SYMBOL_GPL vmlinux 0xdf800229	device_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0xdfa13ef4	bus_sort_breadthfirst
+EXPORT_SYMBOL_GPL vmlinux 0xdfafb983	per_cpu__gdt_page
+EXPORT_SYMBOL_GPL vmlinux 0xe02208ba	usb_string
+EXPORT_SYMBOL_GPL vmlinux 0xe03c00fb	__scsi_get_command
+EXPORT_SYMBOL_GPL vmlinux 0xe08c0b3e	skb_tstamp_tx
+EXPORT_SYMBOL_GPL vmlinux 0xe099346d	ata_scsi_simulate
+EXPORT_SYMBOL_GPL vmlinux 0xe09a97c8	__module_address
+EXPORT_SYMBOL_GPL vmlinux 0xe0a5d6a7	ata_sas_port_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xe0a6febe	tcp_reno_cong_avoid
+EXPORT_SYMBOL_GPL vmlinux 0xe0c77bb5	mce_notify_irq
+EXPORT_SYMBOL_GPL vmlinux 0xe0cca33e	xfrm_aead_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0xe0f36f81	led_trigger_event
+EXPORT_SYMBOL_GPL vmlinux 0xe118f713	cpuidle_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0xe1628399	debugfs_create_u16
+EXPORT_SYMBOL_GPL vmlinux 0xe16a74cd	crypto_alloc_shash
+EXPORT_SYMBOL_GPL vmlinux 0xe18a9ac4	ip6_dst_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xe1b795b2	__cpufreq_driver_getavg
+EXPORT_SYMBOL_GPL vmlinux 0xe1e1cecf	pci_disable_rom
+EXPORT_SYMBOL_GPL vmlinux 0xe227c607	cleanup_srcu_struct
+EXPORT_SYMBOL_GPL vmlinux 0xe2426710	wmi_evaluate_method
+EXPORT_SYMBOL_GPL vmlinux 0xe247343b	hrtimer_get_remaining
+EXPORT_SYMBOL_GPL vmlinux 0xe24ceb02	security_inode_setattr
+EXPORT_SYMBOL_GPL vmlinux 0xe2530bfc	user_instantiate
+EXPORT_SYMBOL_GPL vmlinux 0xe26d91bd	flush_workqueue
+EXPORT_SYMBOL_GPL vmlinux 0xe27551b7	driver_for_each_device
+EXPORT_SYMBOL_GPL vmlinux 0xe295c0ff	is_hpet_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xe2b55128	usb_set_interface
+EXPORT_SYMBOL_GPL vmlinux 0xe2f08344	blkcipher_walk_done
+EXPORT_SYMBOL_GPL vmlinux 0xe2f8b772	unregister_pernet_gen_device
+EXPORT_SYMBOL_GPL vmlinux 0xe30c9973	pci_hp_change_slot_info
+EXPORT_SYMBOL_GPL vmlinux 0xe30cd6cb	__get_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0xe311f468	ata_cable_unknown
+EXPORT_SYMBOL_GPL vmlinux 0xe34c44ae	class_compat_create_link
+EXPORT_SYMBOL_GPL vmlinux 0xe41d6788	ata_acpi_stm
+EXPORT_SYMBOL_GPL vmlinux 0xe439006a	zap_vma_ptes
+EXPORT_SYMBOL_GPL vmlinux 0xe46390b8	unregister_pernet_subsys
+EXPORT_SYMBOL_GPL vmlinux 0xe49ff3b0	ata_wait_register
+EXPORT_SYMBOL_GPL vmlinux 0xe4a1b66b	platform_get_irq_byname
+EXPORT_SYMBOL_GPL vmlinux 0xe4c331b6	acpi_os_unmap_memory
+EXPORT_SYMBOL_GPL vmlinux 0xe513afc0	cache_k8_northbridges
+EXPORT_SYMBOL_GPL vmlinux 0xe530071c	pm_qos_remove_requirement
+EXPORT_SYMBOL_GPL vmlinux 0xe544200b	raw_hash_sk
+EXPORT_SYMBOL_GPL vmlinux 0xe55173ea	crypto_givcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0xe566144c	cpufreq_frequency_table_cpuinfo
+EXPORT_SYMBOL_GPL vmlinux 0xe609efac	tty_prepare_flip_string
+EXPORT_SYMBOL_GPL vmlinux 0xe61a6d2f	gpio_unexport
+EXPORT_SYMBOL_GPL vmlinux 0xe6488b47	cpufreq_notify_transition
+EXPORT_SYMBOL_GPL vmlinux 0xe651f76e	selinux_is_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xe6a4bcd7	ata_sff_host_intr
+EXPORT_SYMBOL_GPL vmlinux 0xe6b48291	cpci_hp_register_bus
+EXPORT_SYMBOL_GPL vmlinux 0xe747e1eb	ata_eh_analyze_ncq_error
+EXPORT_SYMBOL_GPL vmlinux 0xe7608aba	crypto_create_tfm
+EXPORT_SYMBOL_GPL vmlinux 0xe78c5a2e	usb_add_hcd
+EXPORT_SYMBOL_GPL vmlinux 0xe79a1f9f	__inet_inherit_port
+EXPORT_SYMBOL_GPL vmlinux 0xe7b78b3d	security_inode_create
+EXPORT_SYMBOL_GPL vmlinux 0xe7ffe877	pcpu_base_addr
+EXPORT_SYMBOL_GPL vmlinux 0xe862c4b7	dpm_suspend_start
+EXPORT_SYMBOL_GPL vmlinux 0xe893cc39	remove_irq
+EXPORT_SYMBOL_GPL vmlinux 0xe89e2d5c	sdio_disable_func
+EXPORT_SYMBOL_GPL vmlinux 0xe8b31877	relay_switch_subbuf
+EXPORT_SYMBOL_GPL vmlinux 0xe8c54fb7	crypto_shash_update
+EXPORT_SYMBOL_GPL vmlinux 0xe8fcc4df	__root_device_register
+EXPORT_SYMBOL_GPL vmlinux 0xe901175f	__dev_addr_unsync
+EXPORT_SYMBOL_GPL vmlinux 0xe9241c59	securityfs_create_dir
+EXPORT_SYMBOL_GPL vmlinux 0xe92cf210	rtnl_register
+EXPORT_SYMBOL_GPL vmlinux 0xe93e49c3	devres_free
+EXPORT_SYMBOL_GPL vmlinux 0xe943e015	blk_queue_rq_timed_out
+EXPORT_SYMBOL_GPL vmlinux 0xe94489f6	find_get_pid
+EXPORT_SYMBOL_GPL vmlinux 0xe9587909	usb_unregister_notify
+EXPORT_SYMBOL_GPL vmlinux 0xe95e1142	dm_rh_get_region_key
+EXPORT_SYMBOL_GPL vmlinux 0xe9c334a9	inet_twsk_put
+EXPORT_SYMBOL_GPL vmlinux 0xea065e01	task_handoff_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xea124bd1	gcd
+EXPORT_SYMBOL_GPL vmlinux 0xea173bf4	tcp_done
+EXPORT_SYMBOL_GPL vmlinux 0xea1f03f3	fib_rules_register
+EXPORT_SYMBOL_GPL vmlinux 0xea25831a	usb_bus_list_lock
+EXPORT_SYMBOL_GPL vmlinux 0xea2eca10	i2c_add_numbered_adapter
+EXPORT_SYMBOL_GPL vmlinux 0xea418e0f	atapi_cmd_type
+EXPORT_SYMBOL_GPL vmlinux 0xea45e036	pci_restore_msi_state
+EXPORT_SYMBOL_GPL vmlinux 0xea480abf	pm_request_resume
+EXPORT_SYMBOL_GPL vmlinux 0xea4ac873	debugfs_create_size_t
+EXPORT_SYMBOL_GPL vmlinux 0xea5a1f98	dm_requeue_unmapped_request
+EXPORT_SYMBOL_GPL vmlinux 0xeaa2d895	isa_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0xeac3f3ed	sata_scr_valid
+EXPORT_SYMBOL_GPL vmlinux 0xeae74760	scsi_nl_send_transport_msg
+EXPORT_SYMBOL_GPL vmlinux 0xeb42cc02	shmem_file_setup
+EXPORT_SYMBOL_GPL vmlinux 0xeb4c1fc8	__tracepoint_block_remap
+EXPORT_SYMBOL_GPL vmlinux 0xeb58fab0	gpiochip_is_requested
+EXPORT_SYMBOL_GPL vmlinux 0xeb80d8f9	usb_hcd_unlink_urb_from_ep
+EXPORT_SYMBOL_GPL vmlinux 0xebae4832	regulator_bulk_enable
+EXPORT_SYMBOL_GPL vmlinux 0xebcf95ef	led_trigger_set
+EXPORT_SYMBOL_GPL vmlinux 0xebd0e2cc	map_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0xec19d5cf	ata_qc_complete
+EXPORT_SYMBOL_GPL vmlinux 0xec1a75a9	__dev_addr_sync
+EXPORT_SYMBOL_GPL vmlinux 0xec1b043e	regulator_suspend_prepare
+EXPORT_SYMBOL_GPL vmlinux 0xec5c7970	generic_drop_inode
+EXPORT_SYMBOL_GPL vmlinux 0xeceb611d	kern_mount_data
+EXPORT_SYMBOL_GPL vmlinux 0xed3fa7a5	ata_sff_post_internal_cmd
+EXPORT_SYMBOL_GPL vmlinux 0xed97ff07	fsnotify
+EXPORT_SYMBOL_GPL vmlinux 0xedf3f1f1	do_machine_check
+EXPORT_SYMBOL_GPL vmlinux 0xedfe2400	ring_buffer_alloc_read_page
+EXPORT_SYMBOL_GPL vmlinux 0xee19dfaf	scsi_nl_add_transport
+EXPORT_SYMBOL_GPL vmlinux 0xee477fb9	sdio_readb
+EXPORT_SYMBOL_GPL vmlinux 0xee86f997	ata_sff_dev_select
+EXPORT_SYMBOL_GPL vmlinux 0xeeca39f0	pci_block_user_cfg_access
+EXPORT_SYMBOL_GPL vmlinux 0xeef1b9af	inet_csk_bind_conflict
+EXPORT_SYMBOL_GPL vmlinux 0xef6c3f70	round_jiffies_up_relative
+EXPORT_SYMBOL_GPL vmlinux 0xef744b29	user_update
+EXPORT_SYMBOL_GPL vmlinux 0xefa91775	rtc_irq_register
+EXPORT_SYMBOL_GPL vmlinux 0xefd2efcf	ata_eh_freeze_port
+EXPORT_SYMBOL_GPL vmlinux 0xefdd5a63	ktime_get_ts
+EXPORT_SYMBOL_GPL vmlinux 0xefe21106	snmp_mib_init
+EXPORT_SYMBOL_GPL vmlinux 0xefef0909	register_kprobes
+EXPORT_SYMBOL_GPL vmlinux 0xf0070e01	__inet_lookup_established
+EXPORT_SYMBOL_GPL vmlinux 0xf0237768	ata_sas_scsi_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xf0696401	acpi_pci_detect_ejectable
+EXPORT_SYMBOL_GPL vmlinux 0xf06c1cc7	unregister_timer_hook
+EXPORT_SYMBOL_GPL vmlinux 0xf08c0b27	queue_work
+EXPORT_SYMBOL_GPL vmlinux 0xf0cd21d4	rtc_class_open
+EXPORT_SYMBOL_GPL vmlinux 0xf0de55cd	skb_pull_rcsum
+EXPORT_SYMBOL_GPL vmlinux 0xf1463412	execute_in_process_context
+EXPORT_SYMBOL_GPL vmlinux 0xf16ac418	usb_hcd_resume_root_hub
+EXPORT_SYMBOL_GPL vmlinux 0xf181aa95	ata_qc_complete_multiple
+EXPORT_SYMBOL_GPL vmlinux 0xf184d189	kernel_power_off
+EXPORT_SYMBOL_GPL vmlinux 0xf19d9b59	scsi_target_unblock
+EXPORT_SYMBOL_GPL vmlinux 0xf1a1548d	debugfs_rename
+EXPORT_SYMBOL_GPL vmlinux 0xf1e6dca5	scsi_queue_work
+EXPORT_SYMBOL_GPL vmlinux 0xf2214ae1	__create_workqueue_key
+EXPORT_SYMBOL_GPL vmlinux 0xf24f1aa3	__mnt_is_readonly
+EXPORT_SYMBOL_GPL vmlinux 0xf2690ba8	crypto_shash_final
+EXPORT_SYMBOL_GPL vmlinux 0xf27c8490	input_ff_erase
+EXPORT_SYMBOL_GPL vmlinux 0xf2910c52	device_move
+EXPORT_SYMBOL_GPL vmlinux 0xf2a94fb5	ata_sas_queuecmd
+EXPORT_SYMBOL_GPL vmlinux 0xf2ce933a	shash_free_instance
+EXPORT_SYMBOL_GPL vmlinux 0xf2de3a68	ata_host_start
+EXPORT_SYMBOL_GPL vmlinux 0xf2fca922	uart_parse_options
+EXPORT_SYMBOL_GPL vmlinux 0xf302b004	sysfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xf3099352	disk_part_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0xf313ae7a	uhci_check_and_reset_hc
+EXPORT_SYMBOL_GPL vmlinux 0xf32f420c	mmu_notifier_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xf34236f3	acpi_smbus_unregister_callback
+EXPORT_SYMBOL_GPL vmlinux 0xf34445d6	i2c_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0xf34806ec	hrtimer_get_res
+EXPORT_SYMBOL_GPL vmlinux 0xf34c1c9f	relay_subbufs_consumed
+EXPORT_SYMBOL_GPL vmlinux 0xf37a5eb3	xfrm_audit_policy_delete
+EXPORT_SYMBOL_GPL vmlinux 0xf3c1c0a0	leds_list_lock
+EXPORT_SYMBOL_GPL vmlinux 0xf3fb6430	crypto_init_spawn2
+EXPORT_SYMBOL_GPL vmlinux 0xf420a2b1	power_supply_changed
+EXPORT_SYMBOL_GPL vmlinux 0xf43fa2b2	inotify_inode_is_dead
+EXPORT_SYMBOL_GPL vmlinux 0xf44617f1	device_initialize
+EXPORT_SYMBOL_GPL vmlinux 0xf44f8dc8	regulator_bulk_free
+EXPORT_SYMBOL_GPL vmlinux 0xf47f8c8b	pci_add_dynid
+EXPORT_SYMBOL_GPL vmlinux 0xf499fdb2	rcu_barrier_bh
+EXPORT_SYMBOL_GPL vmlinux 0xf4e55653	usb_queue_reset_device
+EXPORT_SYMBOL_GPL vmlinux 0xf50379ad	blk_rq_check_limits
+EXPORT_SYMBOL_GPL vmlinux 0xf5384ac1	__trace_printk
+EXPORT_SYMBOL_GPL vmlinux 0xf5388bd9	platform_driver_register
+EXPORT_SYMBOL_GPL vmlinux 0xf53ed33d	device_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xf54bd49b	lcm
+EXPORT_SYMBOL_GPL vmlinux 0xf553318d	cpuidle_pause_and_lock
+EXPORT_SYMBOL_GPL vmlinux 0xf5758b4f	tcp_is_cwnd_limited
+EXPORT_SYMBOL_GPL vmlinux 0xf5799f7a	stop_machine_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xf59b4051	ring_buffer_swap_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xf5a691cd	invalidate_bh_lrus
+EXPORT_SYMBOL_GPL vmlinux 0xf5add1c7	debugfs_create_u8
+EXPORT_SYMBOL_GPL vmlinux 0xf5ae201d	da903x_writes
+EXPORT_SYMBOL_GPL vmlinux 0xf5c56eaf	scsi_register_device_handler
+EXPORT_SYMBOL_GPL vmlinux 0xf5ff0452	ata_sas_port_start
+EXPORT_SYMBOL_GPL vmlinux 0xf6238d75	scsi_eh_ready_devs
+EXPORT_SYMBOL_GPL vmlinux 0xf68bda75	rdev_get_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0xf6bcbd73	hwrng_register
+EXPORT_SYMBOL_GPL vmlinux 0xf6e6f74e	usb_get_descriptor
+EXPORT_SYMBOL_GPL vmlinux 0xf6e874f5	ata_timing_merge
+EXPORT_SYMBOL_GPL vmlinux 0xf74599db	sysfs_remove_link
+EXPORT_SYMBOL_GPL vmlinux 0xf80d8c80	__hvc_resize
+EXPORT_SYMBOL_GPL vmlinux 0xf82ea8f2	crypto_destroy_tfm
+EXPORT_SYMBOL_GPL vmlinux 0xf863e82a	flush_work
+EXPORT_SYMBOL_GPL vmlinux 0xf87df534	ata_dev_pair
+EXPORT_SYMBOL_GPL vmlinux 0xf8802492	print_stack_trace
+EXPORT_SYMBOL_GPL vmlinux 0xf8928fe7	usb_altnum_to_altsetting
+EXPORT_SYMBOL_GPL vmlinux 0xf89f175a	rtc_read_alarm
+EXPORT_SYMBOL_GPL vmlinux 0xf8a04774	input_ff_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xf8f3a0fb	ata_ratelimit
+EXPORT_SYMBOL_GPL vmlinux 0xf8fd8cee	regulator_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xf90cef5e	debugfs_create_bool
+EXPORT_SYMBOL_GPL vmlinux 0xf92fddf2	pci_disable_pcie_error_reporting
+EXPORT_SYMBOL_GPL vmlinux 0xf94fad1a	crypto_register_alg
+EXPORT_SYMBOL_GPL vmlinux 0xf9765833	dmi_match
+EXPORT_SYMBOL_GPL vmlinux 0xf97666a0	set_memory_rw
+EXPORT_SYMBOL_GPL vmlinux 0xf97d6dc4	usb_interrupt_msg
+EXPORT_SYMBOL_GPL vmlinux 0xf98332fb	ata_sff_data_xfer_noirq
+EXPORT_SYMBOL_GPL vmlinux 0xf9945569	class_interface_register
+EXPORT_SYMBOL_GPL vmlinux 0xf9a054b5	__round_jiffies
+EXPORT_SYMBOL_GPL vmlinux 0xf9ca3160	ata_id_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0xf9fcd8d8	da903x_update
+EXPORT_SYMBOL_GPL vmlinux 0xf9ff787e	input_class
+EXPORT_SYMBOL_GPL vmlinux 0xfb072362	cpufreq_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0xfb2a3293	math_state_restore
+EXPORT_SYMBOL_GPL vmlinux 0xfb2b278a	crypto_alloc_ablkcipher
+EXPORT_SYMBOL_GPL vmlinux 0xfb5d2b97	platform_add_devices
+EXPORT_SYMBOL_GPL vmlinux 0xfb69281a	kset_create_and_add
+EXPORT_SYMBOL_GPL vmlinux 0xfb8c9507	device_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xfbf9be5d	register_oom_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xfc0f5306	ata_timing_compute
+EXPORT_SYMBOL_GPL vmlinux 0xfc182f70	inet6_sk_rebuild_header
+EXPORT_SYMBOL_GPL vmlinux 0xfc2cf564	free_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0xfc5adc1d	skb_segment
+EXPORT_SYMBOL_GPL vmlinux 0xfcce8a14	transport_remove_device
+EXPORT_SYMBOL_GPL vmlinux 0xfce54680	dm_rh_region_context
+EXPORT_SYMBOL_GPL vmlinux 0xfce8f444	devres_add
+EXPORT_SYMBOL_GPL vmlinux 0xfd02e89a	spi_new_device
+EXPORT_SYMBOL_GPL vmlinux 0xfd090b91	register_pernet_gen_subsys
+EXPORT_SYMBOL_GPL vmlinux 0xfd477fb8	vfs_getxattr
+EXPORT_SYMBOL_GPL vmlinux 0xfdc60be7	init_dummy_netdev
+EXPORT_SYMBOL_GPL vmlinux 0xfde0b92c	crypto_larval_error
+EXPORT_SYMBOL_GPL vmlinux 0xfe43b9d6	inet_csk_clone
+EXPORT_SYMBOL_GPL vmlinux 0xfe990052	gpio_free
+EXPORT_SYMBOL_GPL vmlinux 0xfed11ed1	usb_mon_deregister
+EXPORT_SYMBOL_GPL vmlinux 0xff157bae	fuse_direct_io
+EXPORT_SYMBOL_GPL vmlinux 0xff213256	ata_pci_sff_activate_host
+EXPORT_SYMBOL_GPL vmlinux 0xff5a8cfe	cn_del_callback
+EXPORT_SYMBOL_GPL vmlinux 0xffb39319	debugfs_create_x8
+EXPORT_SYMBOL_GPL vmlinux 0xffc503d2	spi_alloc_master
+EXPORT_SYMBOL_GPL vmlinux 0xffde5450	sata_link_hardreset
+EXPORT_UNUSED_SYMBOL vmlinux 0x00000000	simple_prepare_write
--- linux-mvl-dove-2.6.32.orig/debian.master/abi/2.6.32-34.73/i386/generic.modules
+++ linux-mvl-dove-2.6.32/debian.master/abi/2.6.32-34.73/i386/generic.modules
@@ -0,0 +1,2799 @@
+3c359
+3c501
+3c503
+3c505
+3c507
+3c509
+3c515
+3c523
+3c527
+3c574_cs
+3c589_cs
+3c59x
+3w-9xxx
+3w-xxxx
+53c700
+6pack
+8021q
+8139cp
+8139too
+8250_accent
+8250_boca
+8250_exar_st16c554
+8250_fourport
+8250_hub6
+8250_mca
+8255
+82596
+8390
+8390p
+9p
+9pnet
+9pnet_rdma
+9pnet_virtio
+a100u2w
+a3d
+aacraid
+ab3100
+ab3100-core
+ab3100-otp
+abituguru
+abituguru3
+abyss
+ac3200
+ac97_bus
+acecad
+acenic
+acerhdf
+acer-wmi
+acl7225b
+acpi_pad
+acpiphp
+acpiphp_ibm
+acquirewdt
+act2000
+act200l-sir
+act_gact
+act_ipt
+actisys-sir
+act_mirred
+act_nat
+act_pedit
+act_police
+act_simple
+act_skbedit
+ad1848
+ad7414
+ad7418
+ad7877
+ad7879
+adcxx
+addi_apci_035
+addi_apci_1032
+addi_apci_1500
+addi_apci_1516
+addi_apci_1564
+addi_apci_16xx
+addi_apci_2016
+addi_apci_2032
+addi_apci_2200
+addi_apci_3001
+addi_apci_3120
+addi_apci_3501
+addi_apci_3xxx
+adfs
+adi
+adl_pci6208
+adl_pci7296
+adl_pci7432
+adl_pci8164
+adl_pci9111
+adl_pci9118
+adm1021
+adm1025
+adm1026
+adm1029
+adm1031
+adm8211
+adm9240
+adp5588-keys
+adq12b
+ads7828
+ads7846
+adt7462
+adt7470
+adt7473
+adt7475
+adutux
+adv7170
+adv7175
+advansys
+advantechwdt
+adv_pci1710
+adv_pci1723
+adv_pci_dio
+aedsp16
+aes_generic
+aes-i586
+af_802154
+af9013
+affs
+af_key
+af-rxrpc
+agpgart
+ah4
+ah6
+aha152x
+aha152x_cs
+aha1542
+aha1740
+ahci
+aic79xx
+aic7xxx
+aic94xx
+aio_aio12_8
+aio_iiro_16
+aiptek
+aircable
+airo
+airo_cs
+alauda
+ali-agp
+ali-ircc
+alim1535_wdt
+alim7101_wdt
+alphatrack
+altpciechdma
+ambassador
+amd64-agp
+amd76x_edac
+amd76xrom
+amd8111e
+amd-k7-agp
+amd-rng
+amplc_dio200
+amplc_pc236
+amplc_pc263
+amplc_pci224
+amplc_pci230
+analog
+ansi_cprng
+anubis
+aoe
+apm
+appledisplay
+applesmc
+appletalk
+appletouch
+applicom
+ar7part
+ar9170usb
+arc4
+arcfb
+arcmsr
+arcnet
+arc-rawmode
+arc-rimi
+ark3116
+arkfb
+arlan
+arptable_filter
+arp_tables
+arpt_mangle
+asb100
+asix
+asus_atk0110
+asus-laptop
+asus_oled
+async_memcpy
+async_pq
+async_raid6_recov
+async_tx
+async_xor
+at1700
+at24
+at25
+at76c50x-usb
+aten
+ath
+ath5k
+ath9k
+ati-agp
+ati_remote
+ati_remote2
+atl1
+atl1c
+atl1e
+atl2
+atlas_btns
+atm
+atmel
+atmel_cs
+atmel_pci
+atmtcp
+atp
+atp870u
+atxp1
+aty128fb
+atyfb
+au0828
+au8522
+aufs
+authenc
+auth_rpcgss
+autofs
+autofs4
+av5100
+avma1_cs
+avm_cs
+avmfritz
+ax25
+axnet_cs
+b1
+b1dma
+b1isa
+b1pci
+b1pcmcia
+b2c2-flexcop
+b2c2-flexcop-pci
+b2c2-flexcop-usb
+b3dfg
+b43
+b43legacy
+b44
+bas_gigaset
+baycom_epp
+baycom_par
+baycom_ser_fdx
+baycom_ser_hdx
+bcm203x
+bcm3510
+bcm5974
+be2iscsi
+be2net
+befs
+belkin_sa
+berry_charge
+bfa
+bfs
+bfusb
+binfmt_aout
+binfmt_misc
+bitblit
+block2mtd
+blowfish
+bluecard_cs
+bluetooth
+bnep
+bnx2
+bnx2i
+bnx2x
+bonding
+bpa10x
+bpck
+bpck6
+bpqether
+bq24022
+bq27x00_battery
+br2684
+bridge
+broadsheetfb
+bsd_comp
+bt3c_cs
+bt819
+bt856
+bt866
+bt878
+btcx-risc
+btmrvl
+btmrvl_sdio
+btrfs
+btsdio
+bttv
+btuart_cs
+btusb
+budget
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+budget-ci
+budget-core
+budget-patch
+BusLogic
+bw-qcam
+c101
+c2port-duramar2150
+c4
+c67x00
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+cafe_ccic
+cafe_nand
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+cb_pcimdda
+cciss
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+cdc-phonet
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+cfg80211
+cfi_cmdset_0001
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+ch
+ch341
+ch7006
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+cls_tcindex
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+contec_pci_dio
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+coretemp
+cosa
+cp210x
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+c-qcam
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+cr_bllcd
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+cs5535_gpio
+cs553x_nand
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+ctr
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+cuse
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+cyber2000fb
+cyberjack
+cyclades
+cyclomx
+cycx_drv
+cypress_cy7c63
+cypress_m8
+cytherm
+da9030_battery
+da9034-ts
+da903x
+da903x_bl
+dabusb
+DAC960
+daqboard2000
+das08
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+das16
+das16m1
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+das800
+db9
+dc395x
+dca
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+dccp_ipv4
+dccp_ipv6
+dccp_probe
+dcdbas
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+decnet
+deflate
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+dell-led
+dell_rbu
+dell-wmi
+depca
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+dib0070
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+dib3000mc
+dib7000m
+dib7000p
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+digi_acceleport
+diskonchip
+display
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+dmfe
+dmm32at
+dm-queue-length
+dm-raid45
+dm-service-time
+dmx3191d
+dm-zero
+dnet
+dn_rtmsg
+doc2000
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+docecc
+docprobe
+donauboe
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+drm
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+ds1621
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+ds2760_battery
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+dsbr100
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+dss1_divert
+dst
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+dstr
+dt2801
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+dummy
+dummy_hcd
+dv1394
+dvb-bt8xx
+dvb-core
+dvb-pll
+dvb-ttpci
+dvb-ttusb-budget
+dvb-usb
+dvb-usb-a800
+dvb-usb-af9005
+dvb-usb-af9005-remote
+dvb-usb-af9015
+dvb-usb-anysee
+dvb-usb-au6610
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+dvb-usb-cinergyT2
+dvb-usb-cxusb
+dvb-usb-dib0700
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+dvb-usb-dibusb-mb
+dvb-usb-dibusb-mc
+dvb-usb-digitv
+dvb-usb-dtt200u
+dvb-usb-dtv5100
+dvb-usb-dw2102
+dvb-usb-friio
+dvb-usb-gl861
+dvb-usb-gp8psk
+dvb-usb-m920x
+dvb-usb-nova-t-usb2
+dvb-usb-opera
+dvb-usb-ttusb2
+dvb-usb-umt-010
+dvb-usb-vp702x
+dvb-usb-vp7045
+e100
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+e2100
+e752x_edac
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+eata
+ebt_802_3
+ebtable_broute
+ebtable_filter
+ebtable_nat
+ebtables
+ebt_among
+ebt_arp
+ebt_arpreply
+ebt_dnat
+ebt_ip
+ebt_ip6
+ebt_limit
+ebt_log
+ebt_mark
+ebt_mark_m
+ebt_nflog
+ebt_pkttype
+ebt_redirect
+ebt_snat
+ebt_stp
+ebt_ulog
+ebt_vlan
+echo
+econet
+edac_core
+edac_mce_amd
+eeepc-laptop
+eepro
+eeprom
+eeprom_93cx6
+eeti_ts
+eexpress
+efficeon-agp
+efs
+elo
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+em28xx
+em28xx-alsa
+em28xx-dvb
+em_cmp
+emi26
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+em_meta
+em_nbyte
+empeg
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+enclosure
+eni
+enic
+epat
+epca
+epia
+epic100
+e_powersaver
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+esi-sir
+esp4
+esp6
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+ethoc
+eurotechwdt
+evbug
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+f71805f
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+f75375s
+fakephp
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+fat
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+fb_ddc
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+fcoe
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+fd_mcs
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+fdomain_cs
+fealnx
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+firedtv
+firestream
+firewire-core
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+firewire-ohci
+firewire-sbp2
+fit2
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+fl512
+floppy
+fm801-gp
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+fnic
+font
+forcedeth
+fore_200e
+freevxfs
+friq
+frpw
+fsam7400
+fscache
+fschmd
+ftdi-elan
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+ftl
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+fujitsu_ts
+funsoft
+g450_pll
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+gadgetfs
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+gameport
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+gfs2
+ghash-generic
+gigaset
+girbil-sir
+gl518sm
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+gluebi
+g_midi
+g_NCR5380
+g_NCR5380_mmio
+gpio-addr-flash
+gpio_keys
+gpio_mouse
+gpio_vbus
+g_printer
+grip
+grip_mp
+gsc_hpdi
+g_serial
+gspca_conex
+gspca_etoms
+gspca_finepix
+gspca_gl860
+gspca_jeilinj
+gspca_m5602
+gspca_main
+gspca_mars
+gspca_mr97310a
+gspca_ov519
+gspca_ov534
+gspca_pac207
+gspca_pac7311
+gspca_sn9c20x
+gspca_sonixb
+gspca_sonixj
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+gspca_spca501
+gspca_spca505
+gspca_spca506
+gspca_spca508
+gspca_spca561
+gspca_sq905
+gspca_sq905c
+gspca_stk014
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+gspca_tv8532
+gspca_vc032x
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+gtco
+guillemot
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+hci_uart
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+hdlc
+hdlc_cisco
+hdlcdrv
+hdlc_fr
+hdlc_ppp
+hdlc_raw
+hdlc_raw_eth
+hdlc_x25
+hdpvr
+he
+hecubafb
+hexium_gemini
+hexium_orion
+hfc4s8s_l1
+hfcmulti
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+hfs
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+hid-apple
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+hisax
+hisax_fcpcipnp
+hisax_isac
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+horizon
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+hostess_sv11
+hp
+hp100
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+hpfs
+hpilo
+hp-plus
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+hp-wmi
+hso
+htc-pasic3
+htcpen
+hv_blkvsc
+hv_netvsc
+hv_storvsc
+hv_vmbus
+hwa-hc
+hwa-rc
+hwmon-vid
+hysdn
+i1480-dfu-usb
+i1480-est
+i1480u-wlp
+i2400m
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+i2400m-usb
+i2c-algo-bit
+i2c-algo-pca
+i2c-algo-pcf
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+i2c-amd756-s4882
+i2c-amd8111
+i2c-dev
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+i2c-i801
+i2c-isch
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+i2c-pca-isa
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+i2c-simtec
+i2c-sis5595
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+i2c-sis96x
+i2c-stub
+i2c-taos-evm
+i2c-tiny-usb
+i2c-via
+i2c-viapro
+i2c-voodoo3
+i2o_block
+i2o_bus
+i2o_config
+i2o_core
+i2o_proc
+i2o_scsi
+i3000_edac
+i3200_edac
+i5000_edac
+i5100_edac
+i5400_edac
+i5k_amb
+i6300esb
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+i830
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+ib_addr
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+ib_ipoib
+ib_iser
+ib_mad
+ibmaem
+ibmasm
+ibmasr
+ibmcam
+ibmlana
+ibmmca
+ibmpex
+ibmphp
+ib_mthca
+ibmtr
+ibmtr_cs
+ib_sa
+ib_srp
+ib_ucm
+ib_umad
+ib_uverbs
+ichxrom
+icn
+icp_multi
+ics932s401
+idmouse
+idt77252
+ieee1394
+ifb
+iforce
+igb
+igbvf
+ii_pci20kc
+ili9320
+imm
+in2000
+industrialio
+inexio
+inftl
+initio
+inport
+input-polldev
+int51x1
+intel-agp
+intel_menlow
+intel-rng
+intel_vr_nor
+interact
+ioatdma
+ioc4
+io_edgeport
+io_ti
+iowarrior
+ip2
+ip6_queue
+ip6table_filter
+ip6table_mangle
+ip6table_raw
+ip6_tables
+ip6table_security
+ip6t_ah
+ip6t_eui64
+ip6t_frag
+ip6t_hbh
+ip6t_ipv6header
+ip6t_LOG
+ip6t_mh
+ip6t_REJECT
+ip6t_rt
+ip6_tunnel
+ipaq
+ipcomp
+ipcomp6
+ipddp
+ipg
+ip_gre
+iphase
+ipip
+ipmi_devintf
+ipmi_msghandler
+ipmi_poweroff
+ipmi_si
+ipmi_watchdog
+ip_queue
+ipr
+ips
+iptable_filter
+iptable_mangle
+iptable_nat
+iptable_raw
+ip_tables
+iptable_security
+ipt_addrtype
+ipt_ah
+ipt_CLUSTERIP
+ipt_ecn
+ipt_ECN
+ipt_LOG
+ipt_MASQUERADE
+ipt_NETMAP
+ipt_REDIRECT
+ipt_REJECT
+ipt_ULOG
+ip_vs
+ip_vs_dh
+ip_vs_ftp
+ip_vs_lblc
+ip_vs_lblcr
+ip_vs_lc
+ip_vs_nq
+ip_vs_rr
+ip_vs_sed
+ip_vs_sh
+ip_vs_wlc
+ip_vs_wrr
+ipw
+ipw2100
+ipw2200
+ipwireless
+ipx
+ircomm
+ir-common
+ircomm-tty
+irda
+irda-usb
+ir-kbd-i2c
+irlan
+irnet
+irtty-sir
+ir-usb
+iscsi_ibft
+iscsi_tcp
+iscsi_trgt
+isdn
+isdn_bsdcomp
+isdnhdlc
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+isl29003
+isl6405
+isl6421
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+isofs
+isp116x-hcd
+isp1362-hcd
+isp1760
+istallion
+it87
+it8712f_wdt
+it87_wdt
+iTCO_vendor_support
+iTCO_wdt
+itd1000
+iuu_phoenix
+ivtv
+ivtvfb
+iw_c2
+iw_cm
+iw_cxgb3
+iwl3945
+iwlagn
+iwlcore
+iwmc3200wifi
+ixgb
+ixgbe
+ixj
+ixj_pcmcia
+jedec_probe
+jffs2
+jfs
+jmb38x_ms
+jme
+joydev
+joydump
+jr3_pci
+jsm
+k8temp
+kafs
+kahlua
+kaweth
+kb3886_bl
+kbic
+kbtab
+kcomedilib
+ke_counter
+kernelcapi
+keyspan
+keyspan_pda
+keyspan_remote
+khazad
+kingsun-sir
+kl5kusb105
+kobil_sct
+konicawc
+ks0108
+ks0127
+ks8842
+ks8851
+ks8851_mll
+ks959-sir
+ksdazzle-sir
+ktti
+kvaser_pci
+kvm
+kvm-amd
+kvm-intel
+kxsd9
+kyrofb
+l1oip
+l2cap
+l440gx
+l64781
+lanai
+lance
+lanstreamer
+lapb
+lapbether
+lcd
+ldusb
+lec
+led-class
+leds-alix2
+leds-bd2802
+leds-da903x
+leds-dac124s085
+leds-gpio
+leds-lp3944
+leds-net48xx
+leds-pca9532
+leds-pca955x
+leds-wm831x-status
+leds-wm8350
+leds-wrap
+ledtrig-backlight
+ledtrig-default-on
+ledtrig-gpio
+ledtrig-heartbeat
+ledtrig-timer
+legousbtower
+lgdt3305
+lgdt330x
+lgs8gxx
+lib80211
+lib80211_crypt_ccmp
+lib80211_crypt_tkip
+lib80211_crypt_wep
+libcrc32c
+libertas
+libertas_cs
+libertas_sdio
+libertas_spi
+libertas_tf
+libertas_tf_usb
+libfc
+libfcoe
+libipw
+libiscsi
+libiscsi_tcp
+libosd
+libsas
+libsrp
+lightning
+line6usb
+linear
+lirc_atiusb
+lirc_bt829
+lirc_dev
+lirc_ene0100
+lirc_i2c
+lirc_igorplugusb
+lirc_imon
+lirc_it87
+lirc_ite8709
+lirc_mceusb
+lirc_sasem
+lirc_serial
+lirc_sir
+lirc_streamzap
+lirc_ttusbir
+lis3l02dq
+lis3lv02d
+litelink-sir
+lkkbd
+llc2
+lm63
+lm70
+lm75
+lm77
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+lm80
+lm83
+lm8323
+lm85
+lm87
+lm90
+lm92
+lm93
+lm95241
+lmc
+lms283gf05
+lnbp21
+lne390
+lockd
+logibm
+lp
+lp3971
+lp486e
+lpddr_cmds
+lpfc
+lrw
+ltc4215
+ltc4245
+ltpc
+ltv350qv
+lxfb
+lzo
+lzo_compress
+lzo_decompress
+m25p80
+m52790
+ma600-sir
+mac80211
+mac80211_hwsim
+machzwd
+macmodes
+macvlan
+madgemc
+magellan
+map_absent
+map_funcs
+map_ram
+map_rom
+matrix_keypad
+matroxfb_accel
+matroxfb_base
+matroxfb_crtc2
+matroxfb_DAC1064
+matroxfb_g450
+matroxfb_maven
+matroxfb_misc
+matroxfb_Ti3026
+matrox_w1
+max1111
+max1363
+max1586
+max1619
+max17040_battery
+max3100
+max6650
+max6875
+max7301
+max732x
+max7359_keypad
+mb862xxfb
+mbp_nvidia_bl
+mc13783
+mc13783-core
+mc33880
+mc44s803
+mce-inject
+mce-xeon75xx
+mcp2120-sir
+mcp23s08
+mcs5000_ts
+mcs7780
+mcs7830
+mct_u232
+md4
+mdacon
+mdc800
+mdio
+me4000
+me_daq
+megaraid
+megaraid_mbox
+megaraid_mm
+megaraid_sas
+memstick
+metronomefb
+meye
+mfd-core
+mga
+michael_mic
+microcode
+microtek
+mii
+minix
+mISDN_core
+mISDN_dsp
+mISDNinfineon
+mISDNipac
+mISDNisar
+mite
+mixcomwd
+mk712
+mkiss
+mlx4_core
+mlx4_en
+mlx4_ib
+mmc_block
+mos7720
+mos7840
+moto_modem
+moxa
+mpc624
+mpoa
+mpt2sas
+mptbase
+mptctl
+mptfc
+mptlan
+mptsas
+mptscsih
+mptspi
+mpu401
+msdos
+msi-laptop
+msnd
+msnd_classic
+msnd_pinnacle
+msp3400
+mspro_block
+msr
+mt2060
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+mt2131
+mt2266
+mt312
+mt352
+mt9m001
+mt9m111
+mt9t031
+mt9v011
+mt9v022
+mtd
+mtd_blkdevs
+mtdblock
+mtdblock_ro
+mtdchar
+mtdconcat
+mtd_dataflash
+mtd_oobtest
+mtdoops
+mtd_pagetest
+mtdram
+mtd_readtest
+mtd_speedtest
+mtd_stresstest
+mtd_subpagetest
+mtd_torturetest
+mtouch
+multipath
+multiq3
+mvsas
+mwave
+mwl8k
+mxb
+mxl5005s
+mxl5007t
+mxser
+myri10ge
+n2
+n411
+nand
+nand_ecc
+nand_ids
+nandsim
+natsemi
+navman
+nbd
+ncpfs
+NCR53c406a
+NCR_D700
+NCR_Q720_mod
+ndiswrapper
+ne
+ne2
+ne2k-pci
+ne3210
+neofb
+net1080
+netconsole
+netjet
+netrom
+netsc520
+nettel
+netwave_cs
+netxen_nic
+newtonkbd
+nf_conntrack
+nf_conntrack_amanda
+nf_conntrack_ftp
+nf_conntrack_h323
+nf_conntrack_ipv4
+nf_conntrack_ipv6
+nf_conntrack_irc
+nf_conntrack_netbios_ns
+nf_conntrack_netlink
+nf_conntrack_pptp
+nf_conntrack_proto_dccp
+nf_conntrack_proto_gre
+nf_conntrack_proto_sctp
+nf_conntrack_proto_udplite
+nf_conntrack_sane
+nf_conntrack_sip
+nf_conntrack_tftp
+nf_defrag_ipv4
+nf_nat
+nf_nat_amanda
+nf_nat_ftp
+nf_nat_h323
+nf_nat_irc
+nf_nat_pptp
+nf_nat_proto_dccp
+nf_nat_proto_gre
+nf_nat_proto_sctp
+nf_nat_proto_udplite
+nf_nat_sip
+nf_nat_snmp_basic
+nf_nat_tftp
+nfnetlink
+nfnetlink_log
+nfnetlink_queue
+nfs
+nfs_acl
+nfsd
+nftl
+nf_tproxy_core
+n_hdlc
+ni52
+ni65
+ni_6527
+ni_65xx
+ni_660x
+ni_670x
+ni_at_a2150
+ni_at_ao
+ni_atmio
+ni_atmio16d
+nicstar
+ni_daq_700
+ni_daq_dio24
+ni_labpc
+ni_labpc_cs
+nilfs2
+ni_mio_cs
+ni_pcidio
+ni_pcimio
+ni_tio
+ni_tiocmd
+niu
+nl802154
+nls_ascii
+nls_cp1250
+nls_cp1251
+nls_cp1255
+nls_cp437
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+nls_cp869
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+nls_iso8859-3
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+nls_iso8859-6
+nls_iso8859-7
+nls_iso8859-9
+nls_koi8-r
+nls_koi8-ru
+nls_koi8-u
+nls_utf8
+nmclan_cs
+nop-usb-xceiv
+nouveau
+nozomi
+n_r3964
+ns558
+ns83820
+nsc_gpio
+nsc-ircc
+nsp32
+nsp_cs
+nst
+ntfs
+nvidia-agp
+nvidiafb
+nvram
+nxt200x
+nxt6000
+ocfs2
+ocfs2_dlm
+ocfs2_dlmfs
+ocfs2_nodemanager
+ocfs2_stackglue
+ocfs2_stack_o2cb
+ocfs2_stack_user
+ohci1394
+old_belkin-sir
+olpc_battery
+olympic
+omfs
+omnibook
+omninet
+on20
+on26
+onenand
+onenand_sim
+opencores-kbd
+opl3
+oprofile
+opticon
+option
+or51132
+or51211
+orinoco
+orinoco_cs
+orinoco_nortel
+orinoco_pci
+orinoco_plx
+orinoco_tmd
+osd
+osdblk
+osst
+oti6858
+output
+ov7670
+ov772x
+ovcamchip
+oxu210hp-hcd
+p4-clockmod
+p54common
+p54pci
+p54spi
+p54usb
+p8023
+p9auth
+padlock-aes
+padlock-sha
+panasonic-laptop
+panel
+paride
+parkbd
+parport
+parport_ax88796
+parport_cs
+parport_pc
+parport_serial
+pas16
+pas2
+pata_ali
+pata_amd
+pata_artop
+pata_atiixp
+pata_atp867x
+pata_cmd640
+pata_cmd64x
+pata_cs5520
+pata_cs5530
+pata_cs5535
+pata_cs5536
+pata_cypress
+pata_efar
+pata_hpt366
+pata_hpt37x
+pata_hpt3x2n
+pata_hpt3x3
+pata_isapnp
+pata_it8213
+pata_it821x
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+pata_marvell
+pata_mpiix
+pata_netcell
+pata_ninja32
+pata_ns87410
+pata_ns87415
+pata_oldpiix
+pata_opti
+pata_optidma
+pata_pcmcia
+pata_pdc2027x
+pata_pdc202xx_old
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+pata_rz1000
+pata_sc1200
+pata_sch
+pata_serverworks
+pata_sil680
+pata_sl82c105
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+pata_winbond
+pbe5
+pc110pad
+pc87360
+pc8736x_gpio
+pc87413_wdt
+pc87427
+pca953x
+pcbc
+pcbit
+pcd
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+pcf50633-core
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+pcf50633-input
+pcf50633-regulator
+pcf857x
+pcf8591
+pci
+pci200syn
+pcilynx
+pcips2
+pci-stub
+pcl711
+pcl724
+pcl725
+pcl726
+pcl730
+pcl812
+pcl816
+pcl818
+pcm3724
+pcm3730
+pcmad
+pcmcia
+pcmcia_core
+pcm_common
+pcmda12
+pcmmio
+pcmuio
+pcnet32
+pcnet_cs
+pcspkr
+pcwd
+pcwd_pci
+pcwd_usb
+pd
+pd6729
+pda_power
+pegasus
+penmount
+pf
+pg
+phantom
+phison
+phonedev
+phonet
+phram
+physmap
+pktgen
+pl2303
+platform_lcd
+plat_nand
+plat-ram
+plip
+plusb
+pluto2
+pm2fb
+pm3fb
+pmc551
+pmcraid
+pms
+pn_pep
+poc
+poch
+pohmelfs
+powermate
+power_meter
+ppa
+ppdev
+ppp_async
+ppp_deflate
+ppp_mppe
+pppoatm
+pppoe
+pppol2tp
+pppox
+ppp_synctty
+pps_core
+prism2_usb
+prism54
+progear_bl
+proteon
+psmouse
+pss
+pt
+pvrusb2
+pwc
+qcserial
+qinfo_probe
+qla1280
+qla2xxx
+qla3xxx
+qla4xxx
+qlge
+qlogic_cs
+qlogicfas
+qlogicfas408
+qnx4
+qt1010
+quatech_daqp_cs
+quatech_usb2
+quickcam_messenger
+quota_tree
+quota_v1
+quota_v2
+r128
+r8169
+r8192_pci
+r8192se_pci
+r8192s_usb
+r82600_edac
+r8a66597-hcd
+radeon
+radeonfb
+radio-aimslab
+radio-aztech
+radio-cadet
+radio-gemtek
+radio-gemtek-pci
+radio-i2c-si470x
+radio-maestro
+radio-maxiradio
+radio-mr800
+radio-rtrack2
+radio-sf16fmi
+radio-sf16fmr2
+radio-si4713
+radio-tea5764
+radio-terratec
+radio-trust
+radio-typhoon
+radio-usb-si470x
+radio-zoltrix
+raid0
+raid1
+raid10
+raid456
+raid6_pq
+raid6test
+raid_class
+ramzswap
+rar_driver
+raw
+raw1394
+ray_cs
+rdma_cm
+rdma_ucm
+rds
+rds_rdma
+rds_tcp
+redboot
+reed_solomon
+reiserfs
+rfc1051
+rfc1201
+rfcomm
+rfd_ftl
+ricoh_mmc
+rio500
+riscom8
+rivafb
+rmd128
+rmd160
+rmd256
+rmd320
+rndis_host
+rndis_wlan
+rocket
+romfs
+rose
+rotary_encoder
+rpcsec_gss_krb5
+rpcsec_gss_spkm3
+rrunner
+rsrc_nonstatic
+rt2400pci
+rt2500pci
+rt2500usb
+rt2800usb
+rt2860sta
+rt2870sta
+rt2x00lib
+rt2x00pci
+rt2x00usb
+rt3090sta
+rt61pci
+rt73usb
+rtc-ab3100
+rtc-bq4802
+rtc-ds1286
+rtc-ds1305
+rtc-ds1307
+rtc-ds1374
+rtc-ds1390
+rtc-ds1511
+rtc-ds1553
+rtc-ds1672
+rtc-ds1742
+rtc-ds3234
+rtc-fm3130
+rtc-isl1208
+rtc-m41t80
+rtc-m41t94
+rtc-m48t35
+rtc-m48t59
+rtc-m48t86
+rtc-max6900
+rtc-max6902
+rtc-pcf2123
+rtc-pcf50633
+rtc-pcf8563
+rtc-pcf8583
+rtc-r9701
+rtc-rs5c348
+rtc-rs5c372
+rtc-rx8025
+rtc-rx8581
+rtc-s35390a
+rtc-stk17ta8
+rtc-test
+rtc-twl4030
+rtc-v3020
+rtc-wm831x
+rtc-wm8350
+rtc-x1205
+rtd520
+rti800
+rti802
+rtl8150
+rtl8180
+rtl8187
+rtl8187se
+rxkad
+s1d13xxxfb
+s2255drv
+s2io
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+s526
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+saa7134-dvb
+saa7134-empress
+saa7146
+saa7146_vv
+saa7164
+saa717x
+saa7185
+safe_serial
+salsa20_generic
+salsa20-i586
+sata_inic162x
+sata_mv
+sata_nv
+sata_promise
+sata_qstor
+sata_sil
+sata_sil24
+sata_sis
+sata_svw
+sata_sx4
+sata_uli
+sata_via
+sata_vsc
+savage
+savagefb
+sb
+sb1000
+sbc60xxwdt
+sbc7240_wdt
+sbc8360
+sbc_epx_c3
+sbc_fitpc2_wdt
+sbc_gxx
+sb_lib
+sbni
+sbp2
+sc
+sc1200wdt
+sc520cdp
+sc520_wdt
+sc92031
+scb2_flash
+scc
+sch311x_wdt
+sch_atm
+sch_cbq
+sch_drr
+sch_dsmark
+sch_gred
+sch_hfsc
+sch_htb
+sch_ingress
+sch_multiq
+sch_netem
+sch_prio
+sch_red
+sch_sfq
+sch_tbf
+sch_teql
+sco
+scsi_debug
+scsi_dh_alua
+scsi_dh_emc
+scsi_dh_hp_sw
+scsi_dh_rdac
+scsi_tgt
+scsi_transport_fc
+scsi_transport_iscsi
+scsi_transport_sas
+scsi_transport_spi
+scsi_transport_srp
+scsi_wait_scan
+sctp
+scx200
+scx200_acb
+scx200_docflash
+scx200_gpio
+scx200_hrt
+scx200_i2c
+scx200_wdt
+sdhci
+sdhci-pci
+sdhci-pltfm
+sdio_uart
+sdla
+sdricoh_cs
+se401
+sealevel
+sedlbauer_cs
+seed
+seeq8005
+sep_driver
+seqiv
+ser_gigaset
+serial2002
+serial_cs
+serio_raw
+sermouse
+serpent
+serport
+serqt_usb2
+ses
+sfc
+sha1_generic
+sha256_generic
+sha512_generic
+shpchp
+sht15
+si21xx
+si4713-i2c
+sidewinder
+siemens_mpi
+sierra
+sim710
+sir-dev
+sis
+sis190
+sis5595
+sis900
+sis-agp
+sisfb
+sisusbvga
+sit
+sja1000
+sja1000_isa
+sja1000_platform
+skel
+skfp
+skge
+skisa
+sky2
+sl811_cs
+sl811-hcd
+slicoss
+slip
+slram
+sm501
+sm501fb
+smbfs
+smc9194
+smc91c92_cs
+smc-mca
+smctr
+smc-ultra
+smc-ultra32
+smsc37b787_wdt
+smsc47b397
+smsc47m1
+smsc47m192
+smsc9420
+smsc95xx
+smsc-ircc2
+smsdvb
+smsmdtv
+smssdio
+smsusb
+sn9c102
+snd
+snd-ac97-codec
+snd-ad1816a
+snd-ad1848
+snd-ad1889
+snd-adlib
+snd-ak4114
+snd-ak4117
+snd-ak4xxx-adda
+snd-ali5451
+snd-als100
+snd-als300
+snd-als4000
+snd-atiixp
+snd-atiixp-modem
+snd-au8810
+snd-au8820
+snd-au8830
+snd-aw2
+snd-azt2320
+snd-azt3328
+snd-bt87x
+snd-ca0106
+snd-cmi8330
+snd-cmipci
+snd-cs4231
+snd-cs4236
+snd-cs4281
+snd-cs46xx
+snd-cs5530
+snd-cs5535audio
+snd-cs8427
+snd-ctxfi
+snd-darla20
+snd-darla24
+snd-dt019x
+snd-dummy
+snd-echo3g
+snd-emu10k1
+snd-emu10k1-synth
+snd-emu10k1x
+snd-emu8000-synth
+snd-emux-synth
+snd-ens1370
+snd-ens1371
+snd-es1688
+snd-es1688-lib
+snd-es18xx
+snd-es1938
+snd-es1968
+snd-es968
+snd-fm801
+snd-gina20
+snd-gina24
+snd-gusclassic
+snd-gusextreme
+snd-gus-lib
+snd-gusmax
+snd-hda-codec
+snd-hda-codec-analog
+snd-hda-codec-atihdmi
+snd-hda-codec-ca0110
+snd-hda-codec-cirrus
+snd-hda-codec-cmedia
+snd-hda-codec-conexant
+snd-hda-codec-idt
+snd-hda-codec-intelhdmi
+snd-hda-codec-nvhdmi
+snd-hda-codec-realtek
+snd-hda-codec-si3054
+snd-hda-codec-via
+snd-hda-intel
+snd-hdsp
+snd-hdspm
+snd-hifier
+snd-hrtimer
+snd-hwdep
+snd-i2c
+snd-ice1712
+snd-ice1724
+snd-ice17xx-ak4xxx
+snd-indigo
+snd-indigodj
+snd-indigodjx
+snd-indigoio
+snd-indigoiox
+snd-intel8x0
+snd-intel8x0m
+snd-interwave
+snd-interwave-stb
+snd-korg1212
+snd-layla20
+snd-layla24
+snd-lx6464es
+snd-maestro3
+snd-mia
+snd-miro
+snd-mixart
+snd-mixer-oss
+snd-mona
+snd-mpu401
+snd-mpu401-uart
+snd-msnd-classic
+snd-msnd-lib
+snd-msnd-pinnacle
+snd-mtpav
+snd-mts64
+snd-nm256
+snd-opl3-lib
+snd-opl3sa2
+snd-opl3-synth
+snd-opl4-lib
+snd-opl4-synth
+snd-opti92x-ad1848
+snd-opti92x-cs4231
+snd-opti93x
+snd-oxygen
+snd-oxygen-lib
+snd-page-alloc
+snd-pcm
+snd-pcm-oss
+snd-pcsp
+snd-pcxhr
+snd-pdaudiocf
+snd-portman2x4
+snd-pt2258
+snd-rawmidi
+snd-riptide
+snd-rme32
+snd-rme96
+snd-rme9652
+snd-sb16
+snd-sb16-csp
+snd-sb16-dsp
+snd-sb8
+snd-sb8-dsp
+snd-sbawe
+snd-sb-common
+snd-sc6000
+snd-seq
+snd-seq-device
+snd-seq-dummy
+snd-seq-midi
+snd-seq-midi-emul
+snd-seq-midi-event
+snd-seq-oss
+snd-seq-virmidi
+snd-serial-u16550
+snd-sgalaxy
+snd-sis7019
+snd-soc-ad1836
+snd-soc-ad1938
+snd-soc-ad73311
+snd-soc-ak4104
+snd-soc-ak4535
+snd-soc-ak4642
+snd-soc-core
+snd-soc-cs4270
+snd-soc-l3
+snd-soc-max9877
+snd-soc-pcm3008
+snd-soc-spdif
+snd-soc-ssm2602
+snd-soc-tlv320aic23
+snd-soc-tlv320aic26
+snd-soc-tlv320aic3x
+snd-soc-twl4030
+snd-soc-uda134x
+snd-soc-uda1380
+snd-soc-wm8350
+snd-soc-wm8400
+snd-soc-wm8510
+snd-soc-wm8523
+snd-soc-wm8580
+snd-soc-wm8728
+snd-soc-wm8731
+snd-soc-wm8750
+snd-soc-wm8753
+snd-soc-wm8776
+snd-soc-wm8900
+snd-soc-wm8903
+snd-soc-wm8940
+snd-soc-wm8960
+snd-soc-wm8961
+snd-soc-wm8971
+snd-soc-wm8974
+snd-soc-wm8988
+snd-soc-wm8990
+snd-soc-wm8993
+snd-soc-wm9081
+snd-soc-wm-hubs
+snd-sonicvibes
+snd-sscape
+snd-tea575x-tuner
+snd-tea6330t
+snd-timer
+snd-trident
+snd-usb-audio
+snd-usb-caiaq
+snd-usb-lib
+snd-usb-us122l
+snd-usb-usx2y
+snd-util-mem
+snd-via82xx
+snd-via82xx-modem
+snd-virmidi
+snd-virtuoso
+snd-vx222
+snd-vx-lib
+snd-vxpocket
+snd-wavefront
+snd-wss-lib
+snd-ymfpci
+soc_camera
+soc_camera_platform
+softcursor
+softdog
+solos-pci
+sony-laptop
+sonypi
+sound
+soundcore
+sound_firmware
+sp8870
+sp887x
+spaceball
+spaceorb
+spcp8x5
+specialix
+spectrum_cs
+speedfax
+speedtch
+spi_bitbang
+spi_butterfly
+spidev
+spi_gpio
+spi_lm70llp
+squashfs
+ssb
+sscape
+ssfdc
+sst25l
+sstfb
+ssv_dnp
+st
+stallion
+starfire
+stb0899
+stb6000
+stb6100
+stex
+stinger
+stir4200
+stkwebcam
+stowaway
+stp
+stradis
+strip
+stv0288
+stv0297
+stv0299
+stv0900
+stv090x
+stv6110
+stv6110x
+stv680
+sundance
+sungem
+sungem_phy
+sunhme
+suni
+sunkbd
+sunrpc
+svcrdma
+svgalib
+sworks-agp
+sx8
+sym53c416
+sym53c500_cs
+sym53c8xx
+symbolserial
+synaptics_i2c
+synclink
+synclink_cs
+synclink_gt
+synclinkmp
+syscopyarea
+sysfillrect
+sysimgblt
+sysv
+t128
+t1isa
+t1pci
+tc1100-wmi
+tcic
+tcp_bic
+tcp_highspeed
+tcp_htcp
+tcp_hybla
+tcp_illinois
+tcp_lp
+tcp_probe
+tcp_scalable
+tcp_vegas
+tcp_veno
+tcp_westwood
+tcp_yeah
+tcrypt
+tda10021
+tda10023
+tda10048
+tda1004x
+tda10086
+tda18271
+tda7432
+tda8083
+tda8261
+tda826x
+tda827x
+tda8290
+tda9840
+tda9887
+tdfx
+tdfxfb
+tdo24m
+tea
+tea5761
+tea5767
+tea6415c
+tea6420
+tehuti
+tekram-sir
+teles_cs
+tg3
+tgr192
+thinkpad_acpi
+thmc50
+tifm_7xx1
+tifm_core
+tifm_ms
+tifm_sd
+tileblit
+timeriomem-rng
+tipc
+ti_usb_3410_5052
+tlan
+tlclk
+tle62x0
+tmdc
+tmiofb
+tmp401
+tmp421
+tms380tr
+tmscsim
+tmspci
+toim3232-sir
+topstar-laptop
+toshiba_acpi
+touchit213
+touchright
+touchwin
+tpm
+tpm_atmel
+tpm_bios
+tpm_infineon
+tpm_nsc
+tpm_tis
+tps65010
+tps65023-regulator
+tps6507x-regulator
+trancevibrator
+tranzport
+tridentfb
+trix
+ts5500_flash
+ts_bm
+tsc2007
+ts_fsm
+ts_kmp
+tsl2550
+tsl2561
+ttm
+ttpci-eeprom
+ttusb_dec
+ttusbdecfe
+tua6100
+tulip
+tuner
+tuner-simple
+tuner-types
+tuner-xc2028
+tunnel4
+tunnel6
+turbografx
+tvaudio
+tveeprom
+tvp5150
+tw9910
+twidjoy
+twl4030-gpio
+twl4030_keypad
+twl4030-pwrbutton
+twl4030-usb
+twl4030_wdt
+twofish
+twofish_common
+twofish-i586
+typhoon
+u132-hcd
+u14-34f
+uart401
+uart6850
+ubi
+ubifs
+ucb1400_core
+ucb1400_ts
+udf
+udlfb
+ueagle-atm
+ufs
+uinput
+uio
+uio_aec
+uio_cif
+uio_pci_generic
+uio_pdrv
+uio_pdrv_genirq
+uio_sercos3
+uio_smx
+uli526x
+ultracam
+ultrastor
+umc
+umem
+ums-alauda
+ums-cypress
+ums-datafab
+ums-freecom
+ums-isd200
+ums-jumpshot
+ums-karma
+ums-onetouch
+ums-sddr09
+ums-sddr55
+ums-usbat
+unioxx5
+upd64031a
+upd64083
+uPD98402
+usb8xxx
+usbatm
+usb_debug
+usbdux
+usbduxfast
+usb_gigaset
+usbhid
+usbip
+usbip_common_mod
+usblcd
+usbled
+usblp
+usbnet
+usbserial
+usbsevseg
+usb-storage
+usbtest
+usbtmc
+usbtouchscreen
+usbvideo
+usbvision
+userspace-consumer
+uss720
+uvcvideo
+uvesafb
+uwb
+v4l1-compat
+v4l2-common
+v4l2-int-device
+vcan
+ves1820
+ves1x93
+vesafb
+veth
+vfat
+vga16fb
+vgastate
+vgg2432a4
+vhci-hcd
+via
+via686a
+via-agp
+viafb
+via-ircc
+via-rhine
+via-rng
+via-sdmmc
+via-velocity
+vicam
+video
+video1394
+videobuf-core
+videobuf-dma-sg
+videobuf-dvb
+videobuf-vmalloc
+videocodec
+videodev
+virtio
+virtio_balloon
+virtio_blk
+virtio_console
+virtio_net
+virtio_pci
+virtio_ring
+virtio-rng
+virtual
+visor
+vivi
+vlsi_ir
+vmac
+vme
+vme_ca91cx42
+vme_tsi148
+vme_user
+v_midi
+vmk80xx
+vmlfb
+vmw_pvscsi
+vmxnet3
+vp27smpx
+vpx3220
+vstusb
+vsxxxaa
+vt1211
+vt6656_stage
+vt8231
+vt8623fb
+vxge
+w1_bq27000
+w1_ds2431
+w1_ds2433
+w1_ds2760
+w1-gpio
+w1_smem
+w1_therm
+w6692
+w83627ehf
+w83627hf
+w83627hf_wdt
+w83697hf_wdt
+w83697ug_wdt
+w83781d
+w83791d
+w83792d
+w83793
+w83877f_wdt
+w83977af_ir
+w83977f_wdt
+w83l785ts
+w83l786ng
+w9966
+w9968cf
+wacom
+wacom_w8001
+wafer5823wdt
+walkera0701
+wanrouter
+wanxl
+warrior
+wavelan
+wavelan_cs
+wbsd
+wd
+wd7000
+wdt
+wdt_pci
+whci
+whci-hcd
+whc-rc
+whiteheat
+wimax
+winbond-840
+winbond-cir
+wire
+wistron_btns
+wl1251
+wl1251_sdio
+wl1251_spi
+wl1271
+wl3501_cs
+wlp
+wm831x
+wm831x_bl
+wm831x-dcdc
+wm831x-gpio
+wm831x-hwmon
+wm831x-isink
+wm831x-ldo
+wm831x-on
+wm831x_power
+wm831x_wdt
+wm8350
+wm8350-hwmon
+wm8350-i2c
+wm8350_power
+wm8350-regulator
+wm8350_wdt
+wm8400-core
+wm8400-regulator
+wm8739
+wm8775
+wm97xx-ts
+wp512
+wpan-class
+wusb-cbaf
+wusbcore
+wusb-wa
+x25
+x25_asy
+x38_edac
+xc5000
+xcbc
+xfrm4_mode_beet
+xfrm4_mode_transport
+xfrm4_mode_tunnel
+xfrm4_tunnel
+xfrm6_mode_beet
+xfrm6_mode_ro
+xfrm6_mode_transport
+xfrm6_mode_tunnel
+xfrm6_tunnel
+xfrm_ipcomp
+xfrm_user
+xfs
+xhci
+xirc2ps_cs
+xircom_cb
+xor
+xpad
+xprtrdma
+x_tables
+xt_CLASSIFY
+xt_cluster
+xt_comment
+xt_connbytes
+xt_connlimit
+xt_connmark
+xt_CONNMARK
+xt_CONNSECMARK
+xt_conntrack
+xt_dccp
+xt_dscp
+xt_DSCP
+xt_esp
+xt_hashlimit
+xt_helper
+xt_hl
+xt_HL
+xt_iprange
+xtkbd
+xt_LED
+xt_length
+xt_limit
+xt_mac
+xt_mark
+xt_MARK
+xt_multiport
+xt_NFLOG
+xt_NFQUEUE
+xt_NOTRACK
+xt_osf
+xt_owner
+xt_physdev
+xt_pkttype
+xt_policy
+xt_quota
+xt_rateest
+xt_RATEEST
+xt_realm
+xt_recent
+xts
+xt_sctp
+xt_SECMARK
+xt_socket
+xt_state
+xt_statistic
+xt_string
+xt_tcpmss
+xt_TCPMSS
+xt_tcpudp
+xt_time
+xt_TPROXY
+xt_TRACE
+xt_u32
+xusbatm
+xvmalloc
+yam
+yealink
+yellowfin
+yenta_socket
+z85230
+zatm
+zaurus
+zc0301
+zd1201
+zd1211rw
+zhenhua
+zl10036
+zl10039
+zl10353
+zlib
+zlib_deflate
+znet
+zr36016
+zr36050
+zr36060
+zr36067
+zr364xx
--- linux-mvl-dove-2.6.32.orig/debian.master/abi/2.6.32-34.73/armel/versatile.modules
+++ linux-mvl-dove-2.6.32/debian.master/abi/2.6.32-34.73/armel/versatile.modules
@@ -0,0 +1,1561 @@
+3c359
+3c59x
+3w-9xxx
+3w-xxxx
+6pack
+8021q
+8139cp
+8139too
+8250
+8250_pci
+8390
+9p
+9pnet
+9pnet_rdma
+a100u2w
+aacraid
+ab3100
+ab3100-core
+ab3100-otp
+abyss
+ac97_bus
+acecad
+acenic
+act_gact
+act_ipt
+act_mirred
+act_nat
+act_pedit
+act_police
+act_simple
+act_skbedit
+adfs
+adm8211
+adp5588-keys
+adutux
+aes_generic
+af_802154
+af9013
+affs
+af_key
+af-rxrpc
+ah4
+ah6
+ahci
+aic79xx
+aic7xxx
+aic94xx
+aiptek
+aircable
+alphatrack
+altpciechdma
+amd8111e
+ansi_cprng
+anubis
+aoe
+apm-emulation
+apm_power
+appledisplay
+appletouch
+applicom
+ar7part
+ar9170usb
+arc4
+arcmsr
+arcnet
+arc-rawmode
+arc-rimi
+ark3116
+arkfb
+arptable_filter
+arp_tables
+arpt_mangle
+asix
+asus_oled
+async_memcpy
+async_pq
+async_raid6_recov
+async_tx
+async_xor
+at24
+at76c50x-usb
+ath
+ath5k
+ath9k
+ati_remote
+ati_remote2
+atl1
+atl1c
+atl1e
+atl2
+atmel
+atmel_pci
+aty128fb
+atyfb
+aufs
+authenc
+auth_rpcgss
+autofs
+autofs4
+ax25
+ax88796
+b2c2-flexcop
+b2c2-flexcop-pci
+b2c2-flexcop-usb
+b3dfg
+baycom_ser_fdx
+baycom_ser_hdx
+bcm3510
+bcm5974
+be2iscsi
+be2net
+befs
+belkin_sa
+berry_charge
+bfa
+bfs
+binfmt_aout
+binfmt_misc
+block2mtd
+blowfish
+bnx2
+bnx2i
+bnx2x
+bonding
+bpqether
+bq24022
+bq27x00_battery
+bridge
+broadsheetfb
+bsd_comp
+btrfs
+budget
+budget-ci
+budget-core
+c67x00
+cachefiles
+camellia
+can
+can-bcm
+can-dev
+can-raw
+capmode
+carminefb
+cassini
+cast5
+cast6
+catc
+cb710
+cb710-mmc
+cciss
+ccm
+cdc-acm
+cdc_eem
+cdc_ether
+cdc-phonet
+cdc_subset
+cdc-wdm
+cfg80211
+ch
+ch341
+ch7006
+cifs
+cirrusfb
+cls_basic
+cls_flow
+cls_fw
+cls_route
+cls_rsvp
+cls_rsvp6
+cls_tcindex
+cls_u32
+cm109
+cnic
+coda
+com20020
+com20020-pci
+com90io
+com90xx
+configfs
+core
+cp210x
+cpqarray
+cramfs
+crc32c
+crc7
+crc-ccitt
+crc-itu-t
+cryptd
+cryptoloop
+crypto_null
+ctr
+cts
+cuse
+cx22700
+cx22702
+cx24113
+cx24116
+cx24123
+cxgb
+cxgb3
+cxgb3i
+cyber2000fb
+cyberjack
+cyclades
+cypress_cy7c63
+cypress_m8
+cytherm
+da9030_battery
+da903x
+da903x_bl
+dabusb
+DAC960
+dc395x
+dccp
+dccp_diag
+dccp_ipv4
+dccp_ipv6
+dccp_probe
+de2104x
+de4x5
+decnet
+deflate
+defxx
+des_generic
+dib0070
+dib3000mb
+dib3000mc
+dib7000m
+dib7000p
+dib8000
+dibx000_common
+digi_acceleport
+display
+dlm
+dm1105
+dm9601
+dm-crypt
+dmfe
+dm-queue-length
+dm-raid45
+dm-service-time
+dmx3191d
+dm-zero
+dnet
+dn_rtmsg
+dpt_i2o
+drm
+drm_kms_helper
+ds1682
+ds1wm
+ds2482
+ds2490
+ds2760_battery
+ds2782_battery
+dummy
+dv1394
+dvb-core
+dvb-pll
+dvb-ttusb-budget
+dvb-usb
+dvb-usb-a800
+dvb-usb-af9005
+dvb-usb-af9005-remote
+dvb-usb-af9015
+dvb-usb-anysee
+dvb-usb-au6610
+dvb-usb-ce6230
+dvb-usb-cinergyT2
+dvb-usb-cxusb
+dvb-usb-dib0700
+dvb-usb-dibusb-common
+dvb-usb-dibusb-mb
+dvb-usb-dibusb-mc
+dvb-usb-digitv
+dvb-usb-dtt200u
+dvb-usb-dtv5100
+dvb-usb-dw2102
+dvb-usb-friio
+dvb-usb-gl861
+dvb-usb-gp8psk
+dvb-usb-m920x
+dvb-usb-nova-t-usb2
+dvb-usb-opera
+dvb-usb-ttusb2
+dvb-usb-umt-010
+dvb-usb-vp702x
+dvb-usb-vp7045
+e100
+e1000
+e1000e
+earth-pt1
+ebt_802_3
+ebtable_broute
+ebtable_filter
+ebtable_nat
+ebtables
+ebt_among
+ebt_arp
+ebt_arpreply
+ebt_dnat
+ebt_ip
+ebt_ip6
+ebt_limit
+ebt_log
+ebt_mark
+ebt_mark_m
+ebt_nflog
+ebt_pkttype
+ebt_redirect
+ebt_snat
+ebt_stp
+ebt_ulog
+ebt_vlan
+echo
+econet
+eeprom
+eeprom_93cx6
+efs
+ehci-hcd
+em_cmp
+emi26
+emi62
+em_meta
+em_nbyte
+empeg
+ems_pci
+ems_usb
+em_text
+em_u32
+enclosure
+enic
+epca
+epic100
+eql
+esp4
+esp6
+et131x
+eth1394
+ethoc
+evbug
+exportfs
+fat
+faulty
+fb_ddc
+fb_sys_fops
+fcoe
+fcrypt
+fdomain
+fealnx
+ff-memless
+firedtv
+firewire-core
+firewire-net
+firewire-ohci
+firewire-sbp2
+forcedeth
+freevxfs
+fscache
+ftdi-elan
+ftdi_sio
+funsoft
+g450_pll
+garmin_gps
+garp
+gcm
+generic_bl
+gf128mul
+gfs2
+ghash-generic
+gl620a
+gluebi
+gpio_keys
+gpio_mouse
+gpio_vbus
+gtco
+hamachi
+hdlcdrv
+hfs
+hfsplus
+hid
+hid-3m-pct
+hid-a4tech
+hid-apple
+hid-belkin
+hid-cherry
+hid-chicony
+hid-cypress
+hid-drff
+hid-ezkey
+hid-gaff
+hid-gyration
+hid-kensington
+hid-kye
+hid-logitech
+hid-microsoft
+hid-monterey
+hid-mosart
+hid-ntrig
+hid-ortek
+hid-petalynx
+hid-pl
+hid-quanta
+hid-samsung
+hid-sjoy
+hid-sony
+hid-stantum
+hid-sunplus
+hid-tmff
+hid-topseed
+hid-twinhan
+hid-zpff
+hifn_795x
+hostap
+hostap_pci
+hostap_plx
+hp100
+hp4x
+hpfs
+hpilo
+hptiop
+hso
+htc-pasic3
+hwa-hc
+hwa-rc
+i1480-dfu-usb
+i1480-est
+i1480u-wlp
+i2400m
+i2400m-sdio
+i2400m-usb
+i2c-algo-bit
+i2c-algo-pca
+i2c-algo-pcf
+i2c-ali1535
+i2c-ali1563
+i2c-ali15x3
+i2c-amd756
+i2c-amd8111
+i2c-designware
+i2c-dev
+i2c-gpio
+i2c-i801
+i2c-isch
+i2c-matroxfb
+i2c-nforce2
+i2c-ocores
+i2c-parport-light
+i2c-pca-platform
+i2c-piix4
+i2c-simtec
+i2c-sis5595
+i2c-sis630
+i2c-sis96x
+i2c-stub
+i2c-taos-evm
+i2c-tiny-usb
+i2c-versatile
+i2c-via
+i2c-viapro
+i2c-voodoo3
+i2o_block
+i2o_bus
+i2o_config
+i2o_core
+i2o_proc
+i2o_scsi
+ib_addr
+ib_cm
+ib_core
+ib_ipoib
+ib_iser
+ib_mad
+ib_mthca
+ib_sa
+ib_srp
+ib_ucm
+ib_umad
+ib_uverbs
+ics932s401
+idmouse
+ieee1394
+ifb
+igb
+igbvf
+industrialio
+inftl
+initio
+input-polldev
+int51x1
+intel_vr_nor
+ioc4
+io_edgeport
+io_ti
+iowarrior
+ip2
+ip6_queue
+ip6table_filter
+ip6table_mangle
+ip6table_raw
+ip6_tables
+ip6table_security
+ip6t_ah
+ip6t_eui64
+ip6t_frag
+ip6t_hbh
+ip6t_ipv6header
+ip6t_LOG
+ip6t_mh
+ip6t_REJECT
+ip6t_rt
+ip6_tunnel
+ipaq
+ipcomp
+ipcomp6
+ipg
+ip_gre
+ipip
+ip_queue
+ipr
+ips
+iptable_filter
+iptable_mangle
+iptable_nat
+iptable_raw
+ip_tables
+iptable_security
+ipt_addrtype
+ipt_ah
+ipt_CLUSTERIP
+ipt_ecn
+ipt_ECN
+ipt_LOG
+ipt_MASQUERADE
+ipt_NETMAP
+ipt_REDIRECT
+ipt_REJECT
+ipt_ULOG
+ip_vs
+ip_vs_dh
+ip_vs_ftp
+ip_vs_lblc
+ip_vs_lblcr
+ip_vs_lc
+ip_vs_nq
+ip_vs_rr
+ip_vs_sed
+ip_vs_sh
+ip_vs_wlc
+ip_vs_wrr
+ipw
+ipw2100
+ipw2200
+ipx
+ir-common
+ir-usb
+iscsi_tcp
+iscsi_trgt
+isight_firmware
+isl29003
+isl6421
+isl6423
+isofs
+isp116x-hcd
+isp1760
+istallion
+itd1000
+iuu_phoenix
+iw_c2
+iw_cm
+iw_cxgb3
+iwl3945
+iwlagn
+iwlcore
+iwmc3200wifi
+ixgb
+ixgbe
+ixj
+jffs2
+jfs
+jmb38x_ms
+jme
+jsm
+kafs
+kaweth
+kbtab
+keyspan
+keyspan_pda
+keyspan_remote
+khazad
+kl5kusb105
+kobil_sct
+ks8842
+ks8851_mll
+kvaser_pci
+kyrofb
+l64781
+lanstreamer
+lcd
+ldusb
+led-class
+leds-bd2802
+leds-da903x
+leds-gpio
+leds-lp3944
+leds-pca9532
+leds-pca955x
+leds-wm831x-status
+leds-wm8350
+ledtrig-backlight
+ledtrig-default-on
+ledtrig-gpio
+ledtrig-heartbeat
+ledtrig-timer
+legousbtower
+lgdt3305
+lgdt330x
+lgs8gxx
+lib80211
+lib80211_crypt_ccmp
+lib80211_crypt_tkip
+lib80211_crypt_wep
+libcrc32c
+libertas
+libertas_sdio
+libertas_tf
+libertas_tf_usb
+libfc
+libfcoe
+libipw
+libiscsi
+libiscsi_tcp
+libsas
+libsrp
+line6usb
+linear
+lirc_atiusb
+lirc_bt829
+lirc_dev
+lirc_ene0100
+lirc_i2c
+lirc_igorplugusb
+lirc_imon
+lirc_it87
+lirc_ite8709
+lirc_mceusb
+lirc_sasem
+lirc_serial
+lirc_sir
+lirc_streamzap
+lirc_ttusbir
+lm8323
+lnbp21
+lockd
+lp3971
+lpddr_cmds
+lpfc
+lrw
+lzo
+lzo_compress
+lzo_decompress
+mac80211
+mac80211_hwsim
+macmodes
+macvlan
+matrix_keypad
+matroxfb_accel
+matroxfb_base
+matroxfb_crtc2
+matroxfb_DAC1064
+matroxfb_g450
+matroxfb_maven
+matroxfb_misc
+matroxfb_Ti3026
+matrox_w1
+max1363
+max1586
+max17040_battery
+max6875
+max732x
+max7359_keypad
+mb862xxfb
+mc44s803
+mcs7830
+mct_u232
+md4
+mdc800
+mdio
+megaraid
+megaraid_mbox
+megaraid_mm
+megaraid_sas
+memstick
+metronomefb
+mfd-core
+mga
+mg_disk
+michael_mic
+microtek
+minix
+mkiss
+mlx4_core
+mlx4_en
+mlx4_ib
+mos7720
+mos7840
+moto_modem
+moxa
+mpt2sas
+mptbase
+mptctl
+mptfc
+mptlan
+mptsas
+mptscsih
+mptspi
+msdos
+mspro_block
+mt2060
+mt20xx
+mt2266
+mt312
+mt352
+mtd_oobtest
+mtdoops
+mtd_pagetest
+mtd_readtest
+mtd_speedtest
+mtd_stresstest
+mtd_subpagetest
+mtd_torturetest
+multipath
+mvsas
+mwl8k
+mxl5005s
+mxl5007t
+mxser
+myri10ge
+natsemi
+navman
+nbd
+ncpfs
+ne2k-pci
+neofb
+net1080
+netconsole
+netrom
+netxen_nic
+nf_conntrack
+nf_conntrack_amanda
+nf_conntrack_ftp
+nf_conntrack_h323
+nf_conntrack_ipv4
+nf_conntrack_ipv6
+nf_conntrack_irc
+nf_conntrack_netbios_ns
+nf_conntrack_netlink
+nf_conntrack_pptp
+nf_conntrack_proto_dccp
+nf_conntrack_proto_gre
+nf_conntrack_proto_sctp
+nf_conntrack_proto_udplite
+nf_conntrack_sane
+nf_conntrack_sip
+nf_conntrack_tftp
+nf_defrag_ipv4
+nf_nat
+nf_nat_amanda
+nf_nat_ftp
+nf_nat_h323
+nf_nat_irc
+nf_nat_pptp
+nf_nat_proto_dccp
+nf_nat_proto_gre
+nf_nat_proto_sctp
+nf_nat_proto_udplite
+nf_nat_sip
+nf_nat_snmp_basic
+nf_nat_tftp
+nfnetlink
+nfnetlink_log
+nfnetlink_queue
+nfs
+nfs_acl
+nfsd
+nf_tproxy_core
+n_hdlc
+nilfs2
+niu
+nl802154
+nls_ascii
+nls_cp1250
+nls_cp1251
+nls_cp1255
+nls_cp437
+nls_cp737
+nls_cp775
+nls_cp850
+nls_cp852
+nls_cp855
+nls_cp857
+nls_cp860
+nls_cp861
+nls_cp862
+nls_cp863
+nls_cp864
+nls_cp865
+nls_cp866
+nls_cp869
+nls_cp874
+nls_cp932
+nls_cp936
+nls_cp949
+nls_cp950
+nls_euc-jp
+nls_iso8859-1
+nls_iso8859-13
+nls_iso8859-14
+nls_iso8859-15
+nls_iso8859-2
+nls_iso8859-3
+nls_iso8859-4
+nls_iso8859-5
+nls_iso8859-6
+nls_iso8859-7
+nls_iso8859-9
+nls_koi8-r
+nls_koi8-ru
+nls_koi8-u
+nls_utf8
+nop-usb-xceiv
+nouveau
+nozomi
+ns83820
+nst
+ntfs
+nvidiafb
+nvram
+nxt200x
+nxt6000
+ocfs2
+ocfs2_dlm
+ocfs2_dlmfs
+ocfs2_nodemanager
+ocfs2_stackglue
+ocfs2_stack_o2cb
+ocfs2_stack_user
+ohci1394
+ohci-hcd
+olympic
+omfs
+omninet
+opencores-kbd
+oprofile
+opticon
+option
+orinoco
+orinoco_nortel
+orinoco_pci
+orinoco_plx
+orinoco_tmd
+osst
+oti6858
+output
+oxu210hp-hcd
+p54common
+p54pci
+p54usb
+p8023
+p9auth
+pata_ali
+pata_amd
+pata_artop
+pata_atiixp
+pata_atp867x
+pata_cmd640
+pata_cmd64x
+pata_cs5520
+pata_cs5530
+pata_cypress
+pata_efar
+pata_hpt366
+pata_hpt37x
+pata_hpt3x2n
+pata_hpt3x3
+pata_it8213
+pata_it821x
+pata_jmicron
+pata_marvell
+pata_mpiix
+pata_netcell
+pata_ninja32
+pata_ns87410
+pata_ns87415
+pata_oldpiix
+pata_opti
+pata_optidma
+pata_pdc2027x
+pata_pdc202xx_old
+pata_radisys
+pata_rdc
+pata_rz1000
+pata_sc1200
+pata_sch
+pata_serverworks
+pata_sil680
+pata_sl82c105
+pata_triflex
+pata_via
+pca953x
+pcbc
+pcf50633-adc
+pcf50633-charger
+pcf50633-core
+pcf50633-gpio
+pcf50633-input
+pcf50633-regulator
+pcf857x
+pcilynx
+pcips2
+pci-stub
+pcnet32
+pda_power
+pegasus
+phantom
+phison
+phonedev
+phonet
+pktgen
+pl2303
+platform_lcd
+plusb
+pluto2
+pm2fb
+pm3fb
+pmc551
+pmcraid
+pn_pep
+pohmelfs
+powermate
+ppp_async
+ppp_deflate
+ppp_mppe
+pppoe
+pppol2tp
+pppox
+ppp_synctty
+pps_core
+prism2_usb
+prism54
+qcserial
+qinfo_probe
+qla1280
+qla2xxx
+qla3xxx
+qla4xxx
+qlge
+qnx4
+qt1010
+quatech_usb2
+quota_tree
+quota_v1
+quota_v2
+r128
+r8169
+r8192_pci
+r8192s_usb
+r8a66597-hcd
+radeonfb
+raid0
+raid1
+raid10
+raid456
+raid6_pq
+raid6test
+ramzswap
+rar_driver
+raw
+raw1394
+rdma_cm
+rdma_ucm
+rds
+rds_rdma
+rds_tcp
+reiserfs
+rfc1051
+rfc1201
+ricoh_mmc
+rio500
+riscom8
+rivafb
+rmd128
+rmd160
+rmd256
+rmd320
+rndis_host
+rndis_wlan
+rocket
+romfs
+rose
+rotary_encoder
+rpcsec_gss_krb5
+rrunner
+rt2400pci
+rt2500pci
+rt2500usb
+rt2800usb
+rt2x00lib
+rt2x00pci
+rt2x00usb
+rt61pci
+rt73usb
+rtc-ab3100
+rtc-bq4802
+rtc-ds1286
+rtc-ds1307
+rtc-ds1374
+rtc-ds1511
+rtc-ds1553
+rtc-ds1672
+rtc-ds1742
+rtc-fm3130
+rtc-isl1208
+rtc-m41t80
+rtc-m48t35
+rtc-m48t59
+rtc-m48t86
+rtc-max6900
+rtc-pcf50633
+rtc-pcf8563
+rtc-pcf8583
+rtc-rs5c372
+rtc-rx8025
+rtc-rx8581
+rtc-s35390a
+rtc-stk17ta8
+rtc-test
+rtc-twl4030
+rtc-v3020
+rtc-wm831x
+rtc-wm8350
+rtc-x1205
+rtl8150
+rtl8180
+rtl8187
+rtl8187se
+rxkad
+s2io
+s3fb
+s5h1411
+s5h1420
+saa7146
+safe_serial
+salsa20_generic
+sata_inic162x
+sata_mv
+sata_nv
+sata_promise
+sata_qstor
+sata_sil
+sata_sil24
+sata_sis
+sata_svw
+sata_sx4
+sata_uli
+sata_via
+sata_vsc
+savage
+sbp2
+sc92031
+sch_cbq
+sch_drr
+sch_dsmark
+sch_gred
+sch_hfsc
+sch_htb
+sch_ingress
+sch_multiq
+sch_netem
+sch_prio
+sch_red
+sch_sfq
+sch_tbf
+sch_teql
+scsi_debug
+scsi_dh_alua
+scsi_dh_emc
+scsi_dh_hp_sw
+scsi_dh_rdac
+scsi_tgt
+scsi_transport_fc
+scsi_transport_iscsi
+scsi_transport_sas
+scsi_transport_srp
+scsi_wait_scan
+sctp
+sdhci
+sdhci-pci
+sdhci-pltfm
+sdio_uart
+seed
+sep_driver
+seqiv
+serio_raw
+sermouse
+serpent
+serport
+serqt_usb2
+ses
+sfc
+sha1_generic
+sha256_generic
+sha512_generic
+si21xx
+siemens_mpi
+sierra
+sis190
+sis900
+sisfb
+sisusbvga
+sit
+sja1000
+sja1000_platform
+skfp
+skge
+sky2
+sl811-hcd
+slip
+sm501
+sm501fb
+smbfs
+smc911x
+smsc911x
+smsc9420
+smsc95xx
+smsdvb
+smsmdtv
+smssdio
+smsusb
+snd
+snd-aaci
+snd-ac97-codec
+snd-ad1889
+snd-ak4114
+snd-ak4xxx-adda
+snd-als300
+snd-atiixp
+snd-atiixp-modem
+snd-au8810
+snd-au8820
+snd-au8830
+snd-aw2
+snd-azt3328
+snd-bt87x
+snd-ca0106
+snd-cmipci
+snd-cs4281
+snd-cs46xx
+snd-cs5535audio
+snd-cs8427
+snd-ctxfi
+snd-darla20
+snd-darla24
+snd-dummy
+snd-echo3g
+snd-emu10k1
+snd-emu10k1x
+snd-ens1370
+snd-ens1371
+snd-es1938
+snd-es1968
+snd-fm801
+snd-gina20
+snd-gina24
+snd-hda-codec
+snd-hda-codec-analog
+snd-hda-codec-atihdmi
+snd-hda-codec-ca0110
+snd-hda-codec-cirrus
+snd-hda-codec-cmedia
+snd-hda-codec-conexant
+snd-hda-codec-idt
+snd-hda-codec-intelhdmi
+snd-hda-codec-nvhdmi
+snd-hda-codec-realtek
+snd-hda-codec-si3054
+snd-hda-codec-via
+snd-hda-intel
+snd-hdsp
+snd-hdspm
+snd-hifier
+snd-hwdep
+snd-i2c
+snd-ice1712
+snd-ice1724
+snd-ice17xx-ak4xxx
+snd-indigo
+snd-indigodj
+snd-indigodjx
+snd-indigoio
+snd-indigoiox
+snd-intel8x0
+snd-intel8x0m
+snd-korg1212
+snd-layla20
+snd-layla24
+snd-lx6464es
+snd-maestro3
+snd-mia
+snd-mixart
+snd-mixer-oss
+snd-mona
+snd-mpu401-uart
+snd-nm256
+snd-opl3-lib
+snd-oxygen
+snd-oxygen-lib
+snd-page-alloc
+snd-pcm
+snd-pcm-oss
+snd-pcxhr
+snd-pt2258
+snd-rawmidi
+snd-riptide
+snd-rme32
+snd-rme96
+snd-rme9652
+snd-soc-ad73311
+snd-soc-ak4535
+snd-soc-ak4642
+snd-soc-core
+snd-soc-cs4270
+snd-soc-l3
+snd-soc-max9877
+snd-soc-pcm3008
+snd-soc-spdif
+snd-soc-ssm2602
+snd-soc-tlv320aic23
+snd-soc-tlv320aic3x
+snd-soc-twl4030
+snd-soc-uda134x
+snd-soc-uda1380
+snd-soc-wm8350
+snd-soc-wm8400
+snd-soc-wm8510
+snd-soc-wm8523
+snd-soc-wm8580
+snd-soc-wm8728
+snd-soc-wm8731
+snd-soc-wm8750
+snd-soc-wm8753
+snd-soc-wm8776
+snd-soc-wm8900
+snd-soc-wm8903
+snd-soc-wm8940
+snd-soc-wm8960
+snd-soc-wm8961
+snd-soc-wm8971
+snd-soc-wm8974
+snd-soc-wm8988
+snd-soc-wm8990
+snd-soc-wm8993
+snd-soc-wm9081
+snd-soc-wm-hubs
+snd-sonicvibes
+snd-timer
+snd-trident
+snd-usb-audio
+snd-usb-caiaq
+snd-usb-lib
+snd-util-mem
+snd-via82xx
+snd-via82xx-modem
+snd-virtuoso
+snd-vx222
+snd-vx-lib
+snd-ymfpci
+soundcore
+sound_firmware
+spcp8x5
+specialix
+squashfs
+ssb
+ssfdc
+sstfb
+st
+stallion
+starfire
+stb0899
+stb6000
+stb6100
+stex
+stowaway
+stp
+strip
+stv0288
+stv0297
+stv0299
+stv090x
+stv6110x
+sundance
+sunhme
+sunrpc
+svcrdma
+svgalib
+sx8
+symbolserial
+synaptics_i2c
+synclink_gt
+synclinkmp
+syscopyarea
+sysfillrect
+sysimgblt
+sysv
+tcp_probe
+tcrypt
+tda10021
+tda10023
+tda1004x
+tda10086
+tda18271
+tda8083
+tda826x
+tda827x
+tda8290
+tda9887
+tdfx
+tdfxfb
+tea
+tea5761
+tea5767
+tehuti
+tg3
+tgr192
+tifm_7xx1
+tifm_core
+tifm_ms
+tifm_sd
+timeriomem-rng
+ti_usb_3410_5052
+tlan
+tmiofb
+tms380tr
+tmscsim
+tmspci
+tps65010
+tps65023-regulator
+tps6507x-regulator
+trancevibrator
+tranzport
+tridentfb
+ts_bm
+ts_fsm
+ts_kmp
+tsl2550
+tsl2561
+ttm
+ttpci-eeprom
+ttusb_dec
+ttusbdecfe
+tulip
+tuner-simple
+tuner-types
+tuner-xc2028
+tunnel4
+tunnel6
+twl4030-gpio
+twl4030_keypad
+twl4030-pwrbutton
+twl4030-usb
+twofish
+twofish_common
+typhoon
+u132-hcd
+ubi
+ubifs
+ucb1400_core
+udf
+udlfb
+ufs
+uhci-hcd
+uinput
+uio
+uio_aec
+uio_cif
+uio_pci_generic
+uio_pdrv
+uio_pdrv_genirq
+uio_sercos3
+uio_smx
+uli526x
+umc
+umem
+ums-alauda
+ums-cypress
+ums-datafab
+ums-freecom
+ums-isd200
+ums-jumpshot
+ums-karma
+ums-onetouch
+ums-sddr09
+ums-sddr55
+ums-usbat
+usb8xxx
+usbcore
+usb_debug
+usbhid
+usbip
+usbip_common_mod
+usblcd
+usbled
+usblp
+usbmon
+usbnet
+usbserial
+usbsevseg
+usb-storage
+usbtest
+usbtmc
+userspace-consumer
+uvesafb
+uwb
+vcan
+ves1820
+ves1x93
+veth
+vfat
+vgastate
+vhci-hcd
+via
+viafb
+via-rhine
+via-sdmmc
+via-velocity
+video1394
+virtual
+visor
+vmac
+vme
+vme_user
+vstusb
+vt8623fb
+vxge
+w1_bq27000
+w1_ds2431
+w1_ds2433
+w1_ds2760
+w1-gpio
+w1_smem
+w1_therm
+wacom
+whci
+whci-hcd
+whc-rc
+whiteheat
+wimax
+winbond-840
+wire
+wl1251
+wl1251_sdio
+wlp
+wm831x
+wm831x_bl
+wm831x-dcdc
+wm831x-gpio
+wm831x-isink
+wm831x-ldo
+wm831x-on
+wm831x_power
+wm8350
+wm8350-i2c
+wm8350_power
+wm8350-regulator
+wm8400-core
+wm8400-regulator
+wp512
+wpan-class
+wusb-cbaf
+wusbcore
+wusb-wa
+xc5000
+xcbc
+xfrm4_mode_beet
+xfrm4_mode_transport
+xfrm4_mode_tunnel
+xfrm4_tunnel
+xfrm6_mode_beet
+xfrm6_mode_ro
+xfrm6_mode_transport
+xfrm6_mode_tunnel
+xfrm6_tunnel
+xfrm_ipcomp
+xfrm_user
+xfs
+xhci
+xor
+xprtrdma
+x_tables
+xt_CLASSIFY
+xt_cluster
+xt_comment
+xt_connbytes
+xt_connlimit
+xt_connmark
+xt_CONNMARK
+xt_CONNSECMARK
+xt_conntrack
+xt_dccp
+xt_dscp
+xt_DSCP
+xt_esp
+xt_hashlimit
+xt_helper
+xt_hl
+xt_HL
+xt_iprange
+xt_LED
+xt_length
+xt_limit
+xt_mac
+xt_mark
+xt_MARK
+xt_multiport
+xt_NFLOG
+xt_NFQUEUE
+xt_NOTRACK
+xt_osf
+xt_owner
+xt_physdev
+xt_pkttype
+xt_policy
+xt_quota
+xt_rateest
+xt_RATEEST
+xt_realm
+xt_recent
+xts
+xt_sctp
+xt_SECMARK
+xt_socket
+xt_state
+xt_statistic
+xt_string
+xt_tcpmss
+xt_TCPMSS
+xt_tcpudp
+xt_time
+xt_TPROXY
+xt_TRACE
+xt_u32
+xvmalloc
+yam
+yealink
+yellowfin
+zaurus
+zd1201
+zd1211rw
+zl10039
+zl10353
+zlib
+zlib_deflate
--- linux-mvl-dove-2.6.32.orig/debian.master/abi/2.6.32-34.73/armel/versatile
+++ linux-mvl-dove-2.6.32/debian.master/abi/2.6.32-34.73/armel/versatile
@@ -0,0 +1,8250 @@
+EXPORT_SYMBOL crypto/gf128mul 0x0c2f123f	gf128mul_4k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x1068004b	gf128mul_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x2f2889a0	gf128mul_init_64k_lle
+EXPORT_SYMBOL crypto/gf128mul 0x3755f990	gf128mul_init_64k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x384ef9ce	gf128mul_64k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x56af0dbd	gf128mul_x_ble
+EXPORT_SYMBOL crypto/gf128mul 0x83581089	gf128mul_init_4k_lle
+EXPORT_SYMBOL crypto/gf128mul 0x9b2560b9	gf128mul_init_4k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x9e13f6f6	gf128mul_lle
+EXPORT_SYMBOL crypto/gf128mul 0xbd17a0df	gf128mul_4k_lle
+EXPORT_SYMBOL crypto/gf128mul 0xc0890413	gf128mul_64k_lle
+EXPORT_SYMBOL crypto/gf128mul 0xd60736ec	gf128mul_free_64k
+EXPORT_SYMBOL crypto/xor 0x5b6c00e6	xor_blocks
+EXPORT_SYMBOL drivers/char/apm-emulation 0x129e74f2	apm_get_power_status
+EXPORT_SYMBOL drivers/char/apm-emulation 0xdf3329b8	apm_queue_event
+EXPORT_SYMBOL drivers/char/nvram 0x0f28cb91	nvram_read_byte
+EXPORT_SYMBOL drivers/char/nvram 0x17ff2c1d	__nvram_read_byte
+EXPORT_SYMBOL drivers/char/nvram 0x2adec1e0	__nvram_check_checksum
+EXPORT_SYMBOL drivers/char/nvram 0x7da28f12	nvram_check_checksum
+EXPORT_SYMBOL drivers/char/nvram 0x9ce3f83f	nvram_write_byte
+EXPORT_SYMBOL drivers/char/nvram 0xa8813189	__nvram_write_byte
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x04dd92ce	fw_core_add_descriptor
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x0b553fa7	fw_core_initiate_bus_reset
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x1c22888b	fw_run_transaction
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x24c7eb4d	fw_iso_context_create
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x4059de00	fw_card_add
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x4333d98f	fw_core_handle_response
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x47fcf22e	fw_bus_type
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x4d5d4eca	fw_core_remove_descriptor
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x4ed7efd9	fw_iso_context_stop
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x4f724aaf	fw_iso_context_destroy
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x5e5df87f	fw_core_handle_bus_reset
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x63eb1b8a	fw_iso_buffer_init
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x739c097a	fw_iso_context_queue
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x7989b6e8	fw_fill_response
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x7d7e10ae	fw_iso_context_start
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x86b7c172	fw_core_add_address_handler
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x90863005	fw_high_memory_region
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x95c69f46	fw_core_remove_address_handler
+EXPORT_SYMBOL drivers/firewire/firewire-core 0x9f12c1c4	fw_send_request
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xa49e3226	fw_core_handle_request
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xa672e1b0	fw_send_response
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xadee432c	fw_cancel_transaction
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xafc1c793	fw_csr_iterator_next
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xb047a2c6	fw_csr_iterator_init
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xe25c2348	fw_card_initialize
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xe2c10f33	fw_iso_buffer_destroy
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xe84ee19d	fw_core_remove_card
+EXPORT_SYMBOL drivers/firewire/firewire-core 0xf23acf32	fw_device_enable_phys_dma
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0096e80f	drm_mode_config_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x05d840f4	drm_vblank_pre_modeset
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0612cc51	drm_mm_scan_remove_block
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0836695c	drm_sman_takedown
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x088ddf1f	drm_mm_clean
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x09e3aee1	drm_exit
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0b9bdd1e	drm_core_ioremapfree
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0cddabe2	drm_crtc_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0d3dffa2	drm_ioctl
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0da19e97	drm_sysfs_hotplug_event
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x134f4d62	drm_i_have_hw_lock
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1573fa78	drm_lock_take
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x16a43509	drm_encoder_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x173b87e7	drm_gtf_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1771170f	drm_mm_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1d8ba2e8	drm_pci_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1dd21d16	drm_mode_create_dirty_info_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1e7b1976	drm_sg_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1f072c59	drm_property_add_enum
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1f41d9d7	drm_vblank_off
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x20645642	drm_debug
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x21451ac4	drm_sman_owner_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2178d5be	drm_mode_remove
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x26bf33c9	drm_add_edid_modes
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2916bf63	drm_sman_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x29dac398	drm_mm_search_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2a718c44	drm_mode_detachmode_crtc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2cf148a9	drm_debugfs_create_files
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2eb2f903	drm_sman_free_key
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3074f033	drm_order
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3100920f	drm_addmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3233958f	drm_mode_prune_invalid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x33c0b336	drm_mode_connector_detach_encoder
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x35fd0891	drm_mode_validate_clocks
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3c9a1409	drm_ht_just_insert_please
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x400d4d61	drm_connector_attach_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x413b0880	drm_release
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x428cc1a6	drm_debugfs_remove_files
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x453a4305	drm_mode_connector_attach_encoder
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x455b6eb9	drm_pci_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x46de9f34	drm_clflush_pages
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x49982230	drm_vblank_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4a900f10	drm_crtc_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4b4c0615	drm_mode_config_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4ff5a484	drm_mode_connector_update_edid_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x55f060ee	drm_sman_set_range
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x580830f0	drm_mode_set_name
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5aae92a5	drm_get_connector_name
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5d0f8e7d	drm_mm_takedown
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5ea53c9c	drm_mm_debug_table
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5eca9af9	drm_mm_scan_add_block
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6344e510	drm_gem_mmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x64cd2440	drm_fasync
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6566c539	drm_mm_put_block
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x659d0c8a	drm_get_resource_start
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x65d88b21	drm_put_dev
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6679151d	drm_master_get
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x691b62fd	drm_irq_install
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6ca4a5e2	drm_read
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6d2e5837	drm_ut_debug_printk
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6fc30481	drm_mode_hsync
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x709c9d60	drm_add_modes_noedid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7584503f	drm_do_probe_ddc_edid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x784915eb	drm_mode_vrefresh
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7a190368	drm_rmmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7af7aea3	drm_vblank_post_modeset
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7becf9f2	drm_gem_object_handle_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7c1fd6c8	drm_mode_equal
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x83008264	drm_ati_pcigart_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x83a466f3	drm_mm_dump_table
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x85de09f5	drm_mode_width
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x87052549	drm_connector_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x87175e46	drm_get_dev
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x872c1d45	drm_mode_attachmode_crtc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x87d6e7ef	drm_detect_hdmi_monitor
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8b07529b	drm_core_get_reg_ofs
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8b594099	drm_mode_validate_size
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8e856d53	drm_vblank_get
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8fd164cf	drm_rmmap_locked
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x920fc600	drm_lock_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9604d97c	drm_i2c_encoder_destroy
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9adf31e6	drm_i2c_encoder_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9b1a3f83	drm_handle_vblank
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9bd99924	drm_core_ioremap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9d380e91	drm_vblank_count
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9dad7c06	drm_mode_object_find
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa11b98c6	drm_framebuffer_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa1b2565b	drm_gem_vm_open
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa1eabd87	drm_mode_list_concat
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa670b23d	drm_mode_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xaa54c009	drm_irq_uninstall
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xab0e76af	drm_framebuffer_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xab500096	drm_get_drawable_info
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xac191238	drm_sysfs_connector_add
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xaf29788e	drm_sman_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb1512670	drm_idlelock_take
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb79f1d46	drm_property_destroy
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb7aefa7b	drm_gem_object_lookup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xbe05581b	drm_property_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xbf949cec	drm_mode_create_tv_properties
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc18e612c	drm_get_edid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc1a45cd4	drm_idlelock_release
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc2719b64	drm_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc294b330	drm_getsarea
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc6794f16	drm_core_get_map_ofs
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc69bd111	drm_vblank_put
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc6f2730d	drm_mode_destroy
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc9cb5805	drm_cvt_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcae8d219	drm_vblank_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcc4072f0	drm_ati_pcigart_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcdf2eff4	drm_mode_height
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcf87c815	drm_master_put
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd0634f3a	drm_mode_crtc_set_gamma_size
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd08fa3f0	drm_mode_set_crtcinfo
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd0ea79e2	drm_gem_object_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3028e75	drm_sman_set_manager
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3f2a994	drm_mm_pre_get
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3ffab51	drm_ht_remove
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd47e9950	drm_get_resource_len
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd4e04b69	drm_gem_vm_close
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd5d2a3e6	drm_mode_create_dithering_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd6676de9	drm_mode_connector_list_update
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd74cfd7a	drm_core_ioremap_wc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdac2f57a	drm_sysfs_connector_remove
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdb7f62c8	drm_mm_get_block_generic
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdc4e6525	drm_core_reclaim_buffers
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd3febe2	drm_gem_object_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd49095c	drm_ht_insert_item
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdeea95fa	drm_poll
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdf77b07e	drm_get_encoder_name
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe1457735	drm_ht_remove_item
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe24a7b88	drm_ht_find_item
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe33f4949	drm_connector_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe39e563a	drm_open
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe3bf9212	drm_connector_property_get_value
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe5bdce7e	drm_mode_debug_printmodeline
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe603c380	drm_mode_duplicate
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe7c41432	drm_mmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe919dd5c	drm_sman_owner_clean
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xeb6c8f0d	drm_mm_init_scan
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xeb908c30	drm_mode_probed_add
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xecff39b7	drm_gem_handle_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xef0a73d3	drm_mm_get_block_range_generic
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf0cba3fd	drm_encoder_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf1421d13	drm_mode_sort
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf1d27a58	drm_connector_property_set_value
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf2d4ab9a	drm_mode_create_dvi_i_properties
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf2f75812	drm_mm_search_free_in_range
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf42a2b26	drm_ht_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfb36277d	drm_addbufs_pci
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfc1c9bde	drm_mode_create_scaling_mode_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfdfbad19	drm_sman_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x0225e187	drm_crtc_helper_set_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x1219f8e1	drm_fb_helper_setcolreg
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x17f231f6	drm_helper_probe_connector_modes
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x1ebf82bb	drm_fb_helper_free
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x20b4d1f8	drm_helper_probe_single_connector_modes
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x20efc742	drm_fb_helper_pan_display
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x2bc52aec	drm_helper_initial_config
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x321914c6	drm_fb_helper_setcmap
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x437fd830	drm_helper_resume_force_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x4a1bd365	drm_crtc_helper_set_config
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x701c1d23	drm_fb_helper_check_var
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x708e6a8b	drm_helper_connector_dpms
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x77be6281	drm_helper_hotplug_stage_two
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x85f2ee9e	drm_fb_helper_single_fb_probe
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x9a97c624	drm_helper_encoder_in_use
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x9be1ec57	drm_fb_helper_init_crtc_count
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x9d251144	drm_fb_helper_panic
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xa06f8bbc	drm_helper_mode_fill_fb_struct
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xa5fae4cc	drm_fb_helper_blank
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xafbf31e7	drm_helper_crtc_in_use
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xc469c244	drm_fb_helper_restore
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xd0556bac	drm_fb_helper_set_par
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xd45bb898	drm_fb_helper_fill_fix
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xde98407e	drm_helper_disable_unused_functions
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xe6316773	i2c_dp_aux_add_bus
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xf784db0f	drm_fb_helper_add_connector
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xf85b2556	drm_fb_helper_fill_var
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x0440ec56	ttm_object_device_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x07787990	ttm_bo_global_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x09005038	ttm_bo_kmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x0cce8bc0	ttm_bo_kunmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x0de98dc9	ttm_write_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x11896be5	ttm_bo_move_accel_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x11d92c11	ttm_ref_object_add
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x132b05be	ttm_round_pot
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x1773b2da	ttm_bo_device_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x19e1819e	ttm_bo_validate
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x1c74c2bc	ttm_bo_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x22d8c4b4	ttm_suspend_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x24536b5d	ttm_write_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x255f4a57	ttm_mem_global_free
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x2a1a7541	ttm_bo_clean_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x2f9ffb34	ttm_bo_synccpu_write_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x2fd5244e	ttm_bo_reserve
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x31dbda73	ttm_bo_mem_space
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x34704ea7	ttm_global_item_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x34790b98	ttm_base_object_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x361f3e56	ttm_mem_global_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x365feb2e	ttm_eu_reserve_buffers
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x376ac7be	ttm_read_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x3c3c3af1	ttm_bo_global_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x45c95639	ttm_bo_move_memcpy
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x52bba757	ttm_bo_move_ttm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x59609446	ttm_suspend_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x5cf7871a	ttm_object_device_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x5ff8f0c7	ttm_object_file_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x61bdb34f	ttm_eu_fence_buffer_objects
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x66666d70	ttm_global_item_ref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x6b7426a8	ttm_bo_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x79dc0f96	ttm_bo_init_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x7b567ab4	ttm_mem_global_alloc
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x7cf70f0c	ttm_tt_set_placement_caching
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x854c9346	ttm_bo_unreserve
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x86a4066d	ttm_eu_backoff_reservation
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x91a09f83	ttm_bo_device_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x967315bc	ttm_bo_mmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x997c79fb	ttm_tt_populate
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x9df2d215	ttm_bo_wait_unreserved
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x9f9bad52	ttm_bo_evict_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xa77b51bc	ttm_vt_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xacc80e98	ttm_read_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xb8f9d883	ttm_lock_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc111e2f4	ttm_base_object_lookup
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc43b400c	ttm_vt_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc566911c	ttm_bo_unmap_virtual
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xca98ebdf	ttm_base_object_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xcb1655af	ttm_ref_object_base_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xcee74341	ttm_bo_synccpu_write_grab
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xcf456adf	ttm_bo_wait_cpu
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xd101feb1	ttm_bo_swapout_all
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xe006b316	ttm_bo_wait
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xeb426cca	ttm_mem_global_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xf3f109ff	ttm_object_file_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xf723fd5d	ttm_fbdev_mmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xfa6e7726	ttm_tt_bind
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xfe362a63	ttm_io_prot
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-bit 0x12e9d053	i2c_bit_add_numbered_bus
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-bit 0x8efd292c	i2c_bit_add_bus
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0x1a4036ac	i2c_pca_add_numbered_bus
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0x5a998b50	i2c_pca_add_bus
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pcf 0x25c9216f	i2c_pcf_add_bus
+EXPORT_SYMBOL drivers/i2c/busses/i2c-amd756 0x941d0ab2	amd756_smbus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x04a900eb	hpsb_iso_recv_release_packets
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x06ec0dc4	hpsb_make_phypacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0e466ec5	hpsb_free_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0f65267a	hpsb_set_packet_complete_task
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x198ef14e	hpsb_alloc_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1a200e5a	csr1212_release_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1c8e31f0	hpsb_make_lock64packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1d706d60	hpsb_packet_sent
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x202dac20	hpsb_iso_recv_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x219cbabe	dma_region_offset_to_bus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x260be297	hpsb_create_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2a4cc36b	csr1212_attach_keyval_to_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2a620957	hpsb_iso_xmit_queue_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2c9a843b	hpsb_iso_recv_flush
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x30d18149	hpsb_selfid_complete
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3ba773c5	hpsb_update_config_rom_image
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3cb01bc7	hpsb_iso_shutdown
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4060e0a7	hpsb_protocol_class
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4599f4da	hpsb_get_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4dc46aaa	hpsb_iso_packet_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x517972c7	hpsb_get_hostinfo_bykey
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x57f98332	hpsb_iso_xmit_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5ab2bba5	hpsb_iso_xmit_sync
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5d537711	hpsb_iso_recv_set_channel_mask
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5ee14831	hpsb_iso_recv_start
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5f5fdd2f	csr1212_new_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6138beb8	__hpsb_register_protocol
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x672ad148	dma_region_sync_for_device
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6a1b8562	hpsb_make_readpacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6b85f4a6	hpsb_make_lockpacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6f3afd84	hpsb_make_writepacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x6f6cfd11	hpsb_unregister_protocol
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x72797392	hpsb_iso_wake
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x76bc1a5c	dma_region_free
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x78135af2	hpsb_set_hostinfo_key
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x78950ee5	hpsb_read
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7b47edbb	hpsb_unregister_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7fac5f73	hpsb_set_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x81e99347	hpsb_read_cycle_timer
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x831cfaef	hpsb_iso_packet_sent
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x86021bf1	hpsb_iso_stop
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8879f8f0	dma_region_sync_for_cpu
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x89a619ff	hpsb_resume_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8aa00c72	hpsb_free_tlabel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8b7902bd	hpsb_update_config_rom
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8d0f682b	hpsb_bus_reset
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8ec2b312	dma_region_alloc
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9339797e	hpsb_allocate_and_register_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x94bce230	csr1212_get_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x979b3052	dma_prog_region_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x99992fd9	hpsb_node_write
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9c22a3b6	hpsb_write
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9e2703e3	hpsb_reset_bus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa924dac6	dma_prog_region_alloc
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaef36a24	hpsb_packet_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaef57bb5	csr1212_detach_keyval_from_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaefbd374	csr1212_parse_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb1ee11cd	hpsb_selfid_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbb1ec485	hpsb_destroy_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbba70620	dma_prog_region_free
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc11e00f9	hpsb_alloc_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc1632a34	hpsb_packet_success
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc75d963c	hpsb_lock
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc828fcc2	hpsb_unregister_highlevel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xca0f05d1	hpsb_iso_recv_unlisten_channel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xcae53a81	hpsb_get_tlabel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xcd59f491	hpsb_register_highlevel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd0921fe0	hpsb_iso_xmit_start
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xd6b9e573	hpsb_remove_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xdb4d1aa2	hpsb_iso_n_ready
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xdd2022f8	hpsb_send_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe0da264c	dma_region_mmap
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe12ae4e0	hpsb_iso_recv_listen_channel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe42d633f	hpsb_make_streampacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xea4152ff	dma_region_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xec1e0489	hpsb_add_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xece0b6c0	hpsb_register_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xefe824dc	hpsb_node_fill_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfab27536	csr1212_read
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfba57f51	hpsb_speedto_str
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x1d5aeebc	ohci1394_init_iso_tasklet
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x2e75decc	ohci1394_unregister_iso_tasklet
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x3989b03f	ohci1394_register_iso_tasklet
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0xac6ff3de	ohci1394_stop_context
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x08a37740	rdma_addr_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x190e2225	rdma_translate_ip
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x21e100d3	rdma_addr_cancel
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xb0900f14	rdma_addr_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xb1f75ad7	rdma_copy_addr
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xd7b7687d	rdma_resolve_ip
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x044e2672	ib_send_cm_rep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x0724ce4f	ib_send_cm_drep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x09bae299	ib_send_cm_dreq
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x11977888	ib_cm_listen
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x1aa10ffa	ib_cm_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x3fa54628	ib_destroy_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x41d7dd2e	ib_send_cm_sidr_rep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x45b5209f	ib_cm_notify
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x5267c6c0	ib_send_cm_apr
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x6bbcb7ab	ib_send_cm_rtu
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x9ce60bee	cm_class
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x9e7221d8	ib_create_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xb2196cb7	ib_send_cm_req
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xbcbcb7e0	ib_send_cm_lap
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xf064ee78	ib_send_cm_mra
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xf587cb31	ib_send_cm_rej
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xfac59133	ib_send_cm_sidr_req
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0307e8f8	ib_get_cached_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x04a992bc	ib_query_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0d6ab2e4	ib_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x142b15b9	ib_create_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x14dac0f7	ib_alloc_fast_reg_page_list
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x14dedf7e	ib_modify_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x174ec2dd	ib_modify_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1e491a04	ib_unmap_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x20cba6f1	ib_fmr_pool_map_phys
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x28275dc0	ib_find_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x28466ed5	ib_find_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2fda1580	ib_destroy_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x31ed7d9e	ib_umem_page_count
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x363336fb	ib_umem_release
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x37adff18	ib_unregister_event_handler
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3f7567fd	ib_rate_to_mult
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x42ca37b3	ib_set_client_data
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x42e99ff2	ib_get_dma_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x43364dc0	ib_attach_mcast
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x44255281	ib_register_event_handler
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x463e1fda	ib_query_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x520b2638	ib_pack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x59a80404	ib_create_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5b2b74e6	ib_destroy_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x5ba4cbf5	ib_alloc_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x602fa9c7	ib_register_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x616f22a7	ib_find_cached_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x69eca3c7	ib_flush_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x70bbd557	ib_modify_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x72c75a45	ib_free_fast_reg_page_list
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x791815f2	ib_alloc_fast_reg_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7bc39ff4	ib_query_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7c90c050	ib_destroy_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8060487b	ib_init_ah_from_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x837aefa7	ib_query_port
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x84a37960	ib_detach_mcast
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x84dd669b	ib_create_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8640eaeb	ib_modify_qp_is_ok
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x869540d9	ib_destroy_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x87b156b0	ib_dealloc_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x87b614d8	ib_ud_header_pack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8acb9d96	ib_umem_get
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8d2f1ac4	ib_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x925b2eb4	ib_alloc_pd
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9567c537	ib_get_client_data
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x96ce6c46	rdma_node_get_transport
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x98bd6d56	ib_modify_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9c76b97a	ib_query_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9d804fa1	mult_to_ib_rate
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9eb548db	ib_dealloc_pd
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xacbe4468	ib_unregister_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xad61661a	ib_create_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xadf50ab1	ib_fmr_pool_unmap
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xae8ba7e1	ib_query_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb08b7e12	ib_alloc_mw
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb1a312e1	ib_unpack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb362f8c0	ib_modify_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xb4cc6cec	ib_find_cached_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xbffe4b59	ib_dealloc_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xcbc61294	ib_dereg_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xccfdc022	ib_alloc_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xcd7847e3	ib_create_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xcf2afa22	ib_query_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd17ba9d1	ib_ud_header_init
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd880b76a	ib_modify_port
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xda8cace7	ib_dispatch_event
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xdd0b83ef	ib_rereg_phys_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe92e443f	ib_dealloc_mw
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xeb429ed8	ib_query_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xede2f25d	ib_destroy_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf36498b9	ib_ud_header_unpack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf6211941	ib_create_ah_from_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf6f673a8	ib_get_cached_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xfacec8b1	ib_reg_phys_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xfb7aa04d	ib_get_cached_lmc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xffcf040d	ib_resize_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x1dab4075	ib_free_recv_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x249d3b79	ib_create_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x4247d28b	ib_unregister_mad_agent
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x57d839a4	ib_cancel_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6713ed57	ib_free_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6ef787ed	ib_response_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6f077fcf	ib_get_mad_data_offset
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x7b5d4b7a	ib_is_mad_class_rmpp
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x82def097	ib_get_rmpp_segment
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x84eb2056	ib_modify_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x9793a267	ib_post_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xb69c3d5c	ib_register_mad_agent
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xdf43d1de	ib_redirect_mad_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xe619e7b6	ib_register_mad_snoop
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xee1504dd	ib_process_mad_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x1cc266e3	ib_sa_service_rec_query
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x37deafe5	ib_sa_join_multicast
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x576fdbac	ib_sa_free_multicast
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x5d72dabc	ib_sa_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x70e41822	ib_init_ah_from_mcmember
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x70ed99c4	ib_init_ah_from_path
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x73a64cb5	ib_sa_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x93456a60	ib_sa_get_mcmember_rec
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xa53ad7ef	ib_sa_path_rec_get
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xdb8bad19	ib_sa_cancel_query
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x02f847bc	ib_copy_path_rec_from_user
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x07cf5a51	ib_copy_ah_attr_to_user
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x18382f6a	ib_copy_path_rec_to_user
+EXPORT_SYMBOL drivers/infiniband/core/ib_uverbs 0x184f3575	ib_copy_qp_attr_to_user
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x12d5d1db	iw_cm_reject
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x1318fdb7	iw_cm_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x1ae5de66	iw_cm_connect
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x56e7fc4d	iw_cm_disconnect
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xaafde47b	iw_cm_listen
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xb963a7b1	iw_cm_accept
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xbdde4a3c	iw_create_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xfe6c517c	iw_destroy_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x06dcf08f	rdma_listen
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x1b0d82a6	rdma_bind_addr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x1f2b82c2	rdma_notify
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x2d25bdb8	rdma_leave_multicast
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x38607ad9	rdma_accept
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x4bded5a2	rdma_create_id
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x4c5952c3	rdma_set_service_type
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x4d926f91	rdma_disconnect
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x4df47221	rdma_resolve_route
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x525de5bb	rdma_create_qp
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x6cd808dc	rdma_destroy_qp
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x75da310e	rdma_reject
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x909d36b0	rdma_connect
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xa82b4b39	rdma_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xada69623	rdma_destroy_id
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xc30bc5d9	rdma_resolve_addr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xe9e86666	rdma_set_ib_paths
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xf87d1c61	rdma_join_multicast
+EXPORT_SYMBOL drivers/input/input-polldev 0x4b68be10	input_free_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0xba47e3bd	input_allocate_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0xc21353a0	input_unregister_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0xd972405d	input_register_polled_device
+EXPORT_SYMBOL drivers/md/raid6_pq 0x0bd662f6	raid6_gfmul
+EXPORT_SYMBOL drivers/md/raid6_pq 0x15fe0cd3	raid6_gfexp
+EXPORT_SYMBOL drivers/md/raid6_pq 0x5ba93f9d	raid6_gfinv
+EXPORT_SYMBOL drivers/md/raid6_pq 0xb0d904b7	raid6_empty_zero_page
+EXPORT_SYMBOL drivers/md/raid6_pq 0xce45a6f1	raid6_gfexi
+EXPORT_SYMBOL drivers/media/common/tuners/mc44s803 0x689a5afe	mc44s803_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mt2060 0x42af4961	mt2060_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mt2266 0xa84f6956	mt2266_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mxl5005s 0x1b661090	mxl5005s_attach
+EXPORT_SYMBOL drivers/media/common/tuners/qt1010 0xe16e83bf	qt1010_attach
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0x0cb4b189	tuners
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0xc2821775	tuner_count
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-xc2028 0x93e8c7ff	xc2028_attach
+EXPORT_SYMBOL drivers/media/common/tuners/xc5000 0xb482052d	xc5000_attach
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x26978e99	flexcop_eeprom_check_mac_addr
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x2c41997d	flexcop_device_initialize
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x3a07f55c	flexcop_dma_allocate
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x417ac8dd	flexcop_sram_set_dest
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x50301b6a	flexcop_pid_feed_control
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x590e5d36	flexcop_wan_set_speed
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x5c293c91	flexcop_sram_ctrl
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x68dc86b7	flexcop_pass_dmx_packets
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x696db5f9	flexcop_dma_xfer_control
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x6ce832f5	flexcop_dma_free
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x6e2fc1dd	flexcop_device_kmalloc
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x7c98ada5	flexcop_dma_control_size_irq
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x81979254	flexcop_dma_config_timer
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x8bdd8f5c	flexcop_dma_config
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x951b8c94	flexcop_pass_dmx_data
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xa58afedb	flexcop_device_exit
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xb2f78440	flexcop_dump_reg
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xc7073373	flexcop_device_kfree
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xe44dd6f4	flexcop_dma_control_timer_irq
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xf27ad1da	flexcop_i2c_request
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x00cbdc37	dvb_ringbuffer_flush_spinlock_wakeup
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0c4d4a14	dvb_frontend_sleep_until
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0c79ee0f	dvb_register_frontend
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x13ee8494	dvb_ringbuffer_free
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x14ab1afc	dvb_generic_ioctl
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x14c136db	dvb_ringbuffer_empty
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x16f0683b	dvb_register_adapter
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x1e60b7a1	dvb_dmx_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x2e75ad26	dvb_ca_en50221_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x3842c7a4	dvb_generic_open
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x3baee7dd	dvb_net_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x4a5ad2b0	dvb_ringbuffer_read_user
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x4b016fe5	dvb_dmxdev_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x5908fe37	dvb_dmx_swfilter
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6b00c62c	dvb_ringbuffer_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x74a5a698	dvb_filter_pes2ts_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x7774728b	dvb_register_device
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x7b6bfd1d	dvb_unregister_adapter
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x80e3832d	dvb_filter_get_ac3info
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x84813a02	dvb_dmx_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x893066b5	dvb_ca_en50221_camready_irq
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x939d743b	dvb_unregister_frontend
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x9ba8112e	dvb_frontend_detach
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x9dc1d596	dvb_unregister_device
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x9fc64f54	dvb_generic_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xa758a60c	dvb_dmxdev_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xaa493a14	dvb_ca_en50221_camchange_irq
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xac4ca1b0	intlog2
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xbc0d91e1	timeval_usec_diff
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xcc41083f	dvb_ringbuffer_write
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xd4d78742	dvb_net_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe20c965c	dvb_dmx_swfilter_204
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe54b83ca	dvb_ringbuffer_read
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe5ae8707	intlog10
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe8074fa5	dvb_ringbuffer_avail
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xeaf34d9f	dvb_frontend_reinitialise
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xef28ba30	dvb_ca_en50221_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf2031ad9	dvb_dmx_swfilter_packets
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf56739d6	dvb_ca_en50221_frda_irq
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf826deb0	dvb_filter_pes2ts
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x130c8952	dvb_usb_device_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x2b005797	dvb_usb_generic_rw
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x340d2b23	dvb_usb_device_exit
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x5e0cf72a	dvb_usb_get_hexline
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xb7f9f654	dvb_usb_generic_write
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xcae91bed	dvb_usb_nec_rc_key_to_event
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xdde77eb5	usb_cypress_load_firmware
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x3693500b	af9005_rc_keys
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x8ea2efe0	af9005_rc_decode
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0xd3383957	af9005_rc_keys_size
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x00ca3f6f	dibusb_pid_filter
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x1410422e	dibusb_dib3000mc_frontend_attach
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x1b80ce9e	dibusb_power_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x232f276c	dibusb_dib3000mc_tuner_attach
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x2bcc5344	dibusb_rc_query
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x81f78716	dibusb_streaming_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x84c440de	dibusb2_0_streaming_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x8b4d9040	dibusb_read_eeprom_byte
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xa3de3405	dibusb2_0_power_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xcc9ccaff	dibusb_rc_keys
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xcf5aaa6b	dibusb_i2c_algo
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xf0f624c1	dibusb_pid_filter_ctrl
+EXPORT_SYMBOL drivers/media/dvb/frontends/af9013 0x8e88177c	af9013_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/bcm3510 0x39bb6fc5	bcm3510_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx22700 0xfab513ef	cx22700_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx22702 0xbb1ec326	cx22702_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0xaf64eeaa	cx24113_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0xc91e17cf	cx24113_agc_callback
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24116 0x5e638062	cx24116_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0x326cccf7	cx24123_get_tuner_i2c_adapter
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0xe1f6a466	cx24123_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0x04aaa866	dib0070_wbd_offset
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0x7f142145	dib0070_ctrl_agc_filter
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0xb31e3879	dib0070_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mb 0xb2d7c92e	dib3000mb_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x29f217e5	dib3000mc_get_tuner_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x8a58baab	dib3000mc_pid_control
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x91c805de	dib3000mc_pid_parse
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xc05ea7c4	dib3000mc_i2c_enumeration
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xe7938c1a	dib3000mc_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xefba8317	dib3000mc_set_config
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0x229d7cf1	dib7000m_get_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0x891a4f96	dib7000m_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x10a4bfa2	dib7000p_set_wbd_ref
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x5b49f157	dib7000p_set_gpio
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x78be2269	dib7000p_get_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x89b22ec4	dib7000pc_detection
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xd3ff86b8	dib7000p_i2c_enumeration
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xe5e0c030	dib7000p_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x3992d172	dib8000_get_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x446fb059	dib8000_set_wbd_ref
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x6cb56037	dib8000_set_gpio
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x7c26d606	dib8000_i2c_enumeration
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0xe67759fd	dib8000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x4f37e3db	dibx000_init_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x72ae4033	dibx000_get_i2c_adapter
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x89f934b3	dibx000_reset_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0xca1835cf	dibx000_exit_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dvb-pll 0x9387d4d8	dvb_pll_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/isl6421 0x26ddb478	isl6421_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/isl6423 0x3217b69d	isl6423_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/itd1000 0x98a5563a	itd1000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/l64781 0xc32d4a64	l64781_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt3305 0xcc017a2d	lgdt3305_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt330x 0xcff09a60	lgdt330x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lgs8gxx 0x2f41f92e	lgs8gxx_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0x9d8b34c6	lnbp21_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0xdd1fefa0	lnbh24_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/mt312 0x6ebe0027	mt312_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/mt352 0xb716335a	mt352_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/nxt200x 0x270c35ce	nxt200x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/nxt6000 0x1f80ec9d	nxt6000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1411 0x1f5ed61b	s5h1411_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0xe1f5354a	s5h1420_get_tuner_i2c_adapter
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0xf9c8ac50	s5h1420_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/si21xx 0xb5c26e8d	si21xx_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stb0899 0x982dfc3b	stb0899_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stb6000 0x572ca9d1	stb6000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stb6100 0xf8ca8d95	stb6100_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0288 0x7a2e6f8b	stv0288_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0297 0x5f3ed8a6	stv0297_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0299 0xd37f576c	stv0299_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv090x 0x11964839	stv090x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv6110x 0x5af45cfa	stv6110x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10021 0xcef43203	tda10021_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10023 0xc1e3003e	tda10023_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x960b9b92	tda10046_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0xf76f6f98	tda10045_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10086 0x87a26ba1	tda10086_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda8083 0xd5731ada	tda8083_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda826x 0x7c5bad88	tda826x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/ves1820 0x313bcae5	ves1820_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/ves1x93 0xce06f6db	ves1x93_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/zl10039 0xfa425f76	zl10039_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/zl10353 0x024291ac	zl10353_attach
+EXPORT_SYMBOL drivers/media/dvb/ttpci/ttpci-eeprom 0xd2d5be71	ttpci_eeprom_parse_mac
+EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0xcb8a4ab5	ttusbdecfe_dvbt_attach
+EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0xe04d4b7f	ttusbdecfe_dvbs_attach
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x1586d69d	memstick_free_host
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x29aeefd5	memstick_detect_change
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x2dc810d9	memstick_set_rw_addr
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x59a4a44e	memstick_resume_host
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x69a99839	memstick_remove_host
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x7650759f	memstick_suspend_host
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x886593a6	memstick_register_driver
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x8947184e	memstick_unregister_driver
+EXPORT_SYMBOL drivers/memstick/core/memstick 0x8e1c48c5	memstick_init_req
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xa823ba11	memstick_next_req
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xad22d87a	memstick_alloc_host
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xcab02ae9	memstick_init_req_sg
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xdb46e650	memstick_add_host
+EXPORT_SYMBOL drivers/memstick/core/memstick 0xedb26092	memstick_new_req
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x08ebc8d1	mpt_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x0aac0add	mpt_raid_phys_disk_pg1
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x0abbfff7	mpt_suspend
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x0ac6ee6e	mpt_clear_taskmgmt_in_progress_flag
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x1f0d6ee4	mpt_event_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x21fc83dd	mpt_free_fw_memory
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x29a14970	mpt_free_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x2e78bb08	mpt_raid_phys_disk_pg0
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x2f9b497b	mpt_HardResetHandler
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x3b53b8de	mpt_print_ioc_summary
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4526289b	mpt_event_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x49d0c4a3	mpt_verify_adapter
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x502108d0	mpt_fwfault_debug
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x50ab21d2	mpt_put_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x5a4d46e7	mpt_alloc_fw_memory
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x5fa20613	mpt_device_driver_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x65188a5b	mpt_halt_firmware
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x90e077bf	mpt_raid_phys_disk_get_num_paths
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x9155f5ac	mpt_put_msg_frame_hi_pri
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x9ba4da44	mpt_detach
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xa4a6309f	mpt_findImVolumes
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xb718a9d5	mpt_reset_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc0e69f82	mpt_device_driver_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc113cd9c	mpt_set_taskmgmt_in_progress_flag
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc47c22e8	mpt_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xcbf041e8	mpt_send_handshake_request
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd2d9403d	mpt_GetIocState
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd9485245	mptbase_sas_persist_operation
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd9a92a75	mpt_reset_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xdccd2efc	mpt_get_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xdd805159	ioc_list
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xde092f7a	mpt_config
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xf298c034	mpt_attach
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xfb2c7643	mpt_resume
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x11728bf7	mptscsih_remove
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x1b89556e	mptscsih_io_done
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x1c5019d0	mptscsih_get_scsi_lookup
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x1e8dccbb	mptscsih_bios_param
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x3b4a9e20	mptscsih_info
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x3fd077a6	mptscsih_raid_id_to_num
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x41ca23d9	mptscsih_qcmd
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x4b708372	mptscsih_dev_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x4d3f39bd	mptscsih_taskmgmt_response_code
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x5d3dc0f7	mptscsih_host_attrs
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x685e1b30	mptscsih_proc_info
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x7b1c51cb	mptscsih_event_process
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x7cd7deae	mptscsih_slave_configure
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xa04d78d6	mptscsih_abort
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xa53a494d	mptscsih_host_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xb0a5e561	mptscsih_bus_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xb2946f5a	mptscsih_suspend
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xb335d0e4	mptscsih_scandv_complete
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xb900753e	mptscsih_is_phys_disk
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xc7b1e7d3	mptscsih_slave_destroy
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xc99f6022	mptscsih_shutdown
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xca07079c	mptscsih_ioc_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xd732f755	mptscsih_change_queue_depth
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xe86e3427	mptscsih_IssueTaskMgmt
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xeb064521	mptscsih_taskmgmt_complete
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xed7cc76f	mptscsih_resume
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x0c8ff038	i2o_driver_notify_controller_add_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x1b9afee0	i2o_event_register
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x28efe199	i2o_parm_issue
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2a843bef	i2o_dump_message
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x33604e7f	i2o_device_claim_release
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x42f7eadf	i2o_driver_unregister
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x49517ce0	i2o_driver_notify_controller_remove_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x4fe9c777	i2o_status_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x5a0dd54e	i2o_find_iop
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x5f8dfc0b	i2o_driver_notify_device_remove_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x609795b7	i2o_iop_find_device
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x6827af28	i2o_msg_get_wait
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x6996b0da	i2o_driver_register
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x6ac85678	i2o_driver_notify_device_add_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x7733fdc0	i2o_device_claim
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x8324e921	i2o_msg_post_wait_mem
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb4c00dcf	i2o_controllers
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb8f69e3b	i2o_exec_lct_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xc46ea303	i2o_parm_table_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xf2d38b48	i2o_parm_field_get
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x0408e139	ab3100_set_register_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x08be8d6b	ab3100_event_unregister
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x48ca6848	ab3100_get_register_page_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x61ec1999	ab3100_event_register
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x84ccee37	ab3100_event_registers_startup_state_get
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x8d67fa57	ab3100_mask_and_set_register_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x95a5050b	ab3100_get_register_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xd0262e87	ab3100_get_chip_type
+EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x71b42414	pasic3_read_register
+EXPORT_SYMBOL drivers/mfd/htc-pasic3 0xadb5572b	pasic3_write_register
+EXPORT_SYMBOL drivers/mfd/mfd-core 0x2aac8a67	mfd_add_devices
+EXPORT_SYMBOL drivers/mfd/mfd-core 0x43974255	mfd_remove_devices
+EXPORT_SYMBOL drivers/mfd/tps65010 0x02d4ad0f	tps65013_set_low_pwr
+EXPORT_SYMBOL drivers/mfd/tps65010 0x28485130	tps65010_config_vregs1
+EXPORT_SYMBOL drivers/mfd/tps65010 0x33739de7	tps65010_set_vib
+EXPORT_SYMBOL drivers/mfd/tps65010 0x9fd44c69	tps65010_set_led
+EXPORT_SYMBOL drivers/mfd/tps65010 0xb14080cc	tps65010_set_low_pwr
+EXPORT_SYMBOL drivers/mfd/tps65010 0xd5bb106d	tps65010_set_vbus_draw
+EXPORT_SYMBOL drivers/mfd/tps65010 0xe99b3f36	tps65010_set_gpio_out_value
+EXPORT_SYMBOL drivers/misc/c2port/core 0x2da244b2	c2port_device_unregister
+EXPORT_SYMBOL drivers/misc/c2port/core 0xe3f95139	c2port_device_register
+EXPORT_SYMBOL drivers/misc/ioc4 0x189a54ba	ioc4_register_submodule
+EXPORT_SYMBOL drivers/misc/ioc4 0xa5888da7	ioc4_unregister_submodule
+EXPORT_SYMBOL drivers/misc/tifm_core 0x17d421ca	tifm_queue_work
+EXPORT_SYMBOL drivers/misc/tifm_core 0x26697783	tifm_free_device
+EXPORT_SYMBOL drivers/misc/tifm_core 0x506f6f8d	tifm_unmap_sg
+EXPORT_SYMBOL drivers/misc/tifm_core 0x660eae88	tifm_alloc_device
+EXPORT_SYMBOL drivers/misc/tifm_core 0x6e0145be	tifm_free_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0x8b205979	tifm_map_sg
+EXPORT_SYMBOL drivers/misc/tifm_core 0xc61334d2	tifm_unregister_driver
+EXPORT_SYMBOL drivers/misc/tifm_core 0xcddcbd45	tifm_add_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0xd63a98f5	tifm_remove_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0xd90f4ba2	tifm_alloc_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0xeb6479ca	tifm_register_driver
+EXPORT_SYMBOL drivers/misc/tifm_core 0xf0caf6c6	tifm_has_ms_pif
+EXPORT_SYMBOL drivers/misc/tifm_core 0xf89b8058	tifm_eject
+EXPORT_SYMBOL drivers/mtd/lpddr/lpddr_cmds 0xd1cdb4de	lpddr_cmdset
+EXPORT_SYMBOL drivers/net/8390 0x0773d45d	ei_close
+EXPORT_SYMBOL drivers/net/8390 0x0adb1a79	ei_get_stats
+EXPORT_SYMBOL drivers/net/8390 0x249c0f62	ei_tx_timeout
+EXPORT_SYMBOL drivers/net/8390 0x4c938a26	ei_netdev_ops
+EXPORT_SYMBOL drivers/net/8390 0xa27b02e8	NS8390_init
+EXPORT_SYMBOL drivers/net/8390 0xb64ebd5a	ei_open
+EXPORT_SYMBOL drivers/net/8390 0xbe65b333	ei_set_multicast_list
+EXPORT_SYMBOL drivers/net/8390 0xcb3c54c0	ei_start_xmit
+EXPORT_SYMBOL drivers/net/8390 0xdd365790	ei_interrupt
+EXPORT_SYMBOL drivers/net/8390 0xe7085beb	__alloc_ei_netdev
+EXPORT_SYMBOL drivers/net/8390 0xf7538a1c	ei_poll
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x1c5b985f	arcnet_unregister_proto
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x23f86078	arcnet_interrupt
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x4ecc11a5	arc_bcast_proto
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x5984e0bb	arcnet_open
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x59e3e52d	arc_raw_proto
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x6534792a	arcnet_debug
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x6ebf5f71	arc_proto_map
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x7fa61159	alloc_arcdev
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xc46392e9	arcnet_send_packet
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xea8e84bf	arc_proto_default
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xf096daae	arcnet_timeout
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xf0b6abe2	arcnet_close
+EXPORT_SYMBOL drivers/net/arcnet/com20020 0x899a676f	com20020_check
+EXPORT_SYMBOL drivers/net/arcnet/com20020 0xb209e4ff	com20020_found
+EXPORT_SYMBOL drivers/net/arcnet/com20020 0xed31b267	com20020_netdev_ops
+EXPORT_SYMBOL drivers/net/bnx2 0xf83addb3	bnx2_cnic_probe
+EXPORT_SYMBOL drivers/net/cnic 0x636af174	cnic_unregister_driver
+EXPORT_SYMBOL drivers/net/cnic 0xd3e8316d	cnic_register_driver
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x0847efc1	dev2t3cdev
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x53611865	cxgb3_free_atid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x56d4d601	cxgb3_alloc_atid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x5d3d8103	t3_l2t_send_slow
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x6199affa	t3_l2e_free
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x626dec3d	cxgb3_insert_tid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x6726204a	cxgb3_unregister_client
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x6ca9dbb8	t3_l2t_send_event
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x7cb8f937	cxgb3_free_stid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x847f89a9	t3_l2t_get
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x9a62cfa0	cxgb3_remove_tid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xc292c50b	cxgb3_alloc_stid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xcddbf697	t3_register_cpl_handler
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xe43f8b3f	cxgb3_ofld_send
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xf1ac232a	cxgb3_register_client
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xff162f72	cxgb3_queue_tid_release
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x3bcc8361	hdlcdrv_arbitrate
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x43bfc923	hdlcdrv_unregister
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x464bf121	hdlcdrv_receiver
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xa0d293db	hdlcdrv_register
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xbe4efcc8	hdlcdrv_transmitter
+EXPORT_SYMBOL drivers/net/mdio 0x0f934475	mdio45_ethtool_gset_npage
+EXPORT_SYMBOL drivers/net/mdio 0x22bce513	mdio_mii_ioctl
+EXPORT_SYMBOL drivers/net/mdio 0x43e4defc	mdio45_nway_restart
+EXPORT_SYMBOL drivers/net/mdio 0x7577f992	mdio_set_flag
+EXPORT_SYMBOL drivers/net/mdio 0xa1a29548	mdio45_probe
+EXPORT_SYMBOL drivers/net/mdio 0xb34a7575	mdio45_ethtool_spauseparam_an
+EXPORT_SYMBOL drivers/net/mdio 0xc6b1163f	mdio45_links_ok
+EXPORT_SYMBOL drivers/net/pppox 0x69281f70	pppox_ioctl
+EXPORT_SYMBOL drivers/net/pppox 0x727f3390	register_pppox_proto
+EXPORT_SYMBOL drivers/net/pppox 0x8da56a10	pppox_unbind_sock
+EXPORT_SYMBOL drivers/net/pppox 0xe0ff7a18	unregister_pppox_proto
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x01cca907	tms380tr_netdev_ops
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x41bbe1ec	tms380tr_open
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x4c2ae5d7	tmsdev_init
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x8484359d	tms380tr_close
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xc5ce1ba8	tmsdev_term
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd2328794	tms380tr_wait
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd49af46e	tms380tr_interrupt
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x296dae59	ath_rxbuf_alloc
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x31219afb	ath_is_world_regd
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x4f8c6a7e	ath_regd_init
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xbe25b39d	ath_regd_get_band_ctl
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xfee118ad	ath_reg_notifier_apply
+EXPORT_SYMBOL drivers/net/wireless/atmel 0x5a9b4587	stop_atmel_card
+EXPORT_SYMBOL drivers/net/wireless/atmel 0x8bd0f86b	atmel_open
+EXPORT_SYMBOL drivers/net/wireless/atmel 0xea5fe851	init_atmel_card
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x0dc1d1a1	hostap_init_ap_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x1aafafc7	prism2_update_comms_qual
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x324ac6df	hostap_set_hostapd
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x4ce5e8ed	hostap_set_string
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x4d382b47	hostap_set_antsel
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x540102f9	hostap_set_word
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x5db6419a	hostap_info_init
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x5de534da	hostap_handle_sta_tx_exc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x763c9576	hostap_init_data
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x7809ac29	hostap_set_hostapd_sta
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x7a322c96	hostap_80211_rx
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x7f55a924	hostap_set_multicast_list_queue
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x877d892c	hostap_set_auth_algs
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x8d05ee62	hostap_check_sta_fw_version
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x9a3d0daf	hostap_setup_dev
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa03f101d	hostap_free_data
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa12ad27f	hostap_dump_tx_header
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xaca7155c	hostap_add_interface
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb2a945e0	hostap_dump_rx_header
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb4b77c8b	hostap_80211_get_hdrlen
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb4f20c21	hostap_remove_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb9bb3638	hostap_info_process
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xbf5be031	hostap_set_encryption
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xbf666afe	hostap_set_roaming
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xd498a690	hostap_80211_ops
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xd9282caa	hostap_master_start_xmit
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xeaa464dc	hostap_remove_interface
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xfb93f96e	hostap_get_porttype
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xfdc071d0	hostap_init_proc
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x017e6b2c	libipw_networks_age
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x200e81ed	libipw_xmit
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x461371a3	libipw_wx_get_encode
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x4bd0475e	libipw_change_mtu
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x4cd86d05	libipw_channel_to_freq
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x6eab7fe5	libipw_get_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x719561c4	libipw_get_geo
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x86b24168	libipw_get_channel_flags
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x88c34495	libipw_wx_get_encodeext
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x978e2238	libipw_rx
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x9e02b6fc	libipw_wx_get_scan
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xa060de4e	libipw_txb_free
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xb18709dd	libipw_channel_to_index
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xb6e17ae0	libipw_is_valid_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xbd5d29b0	free_ieee80211
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xc25623ad	libipw_rx_mgt
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xd1bafd71	libipw_freq_to_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xd3f5b7ff	libipw_set_geo
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xda5f19e1	libipw_wx_set_encodeext
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xdaa093f3	libipw_wx_set_encode
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xee84819f	alloc_ieee80211
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0277ad79	iwlcore_eeprom_verify_signature
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0492d3b0	iwl_rx_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x05584d26	iwl_reset_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x05b48b04	iwl_txq_update_write_ptr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x05ef9272	iwl_tt_handler
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x064bd976	iwl_sta_tx_modify_enable_tid
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x097d5fea	iwl_activate_qos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0b68f256	iwl_mac_get_tx_stats
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0c73fee5	iwl_configure_filter
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0ef92155	iwl_rx_reply_rx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x12a03d7c	iwl_rx_replenish
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x15575f92	iwl_tt_exit
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x15e7e01c	iwl_eeprom_check_version
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x165ac099	iwl_send_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x19f0e900	iwl_debug_level
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1bec9f44	iwl_rate_get_lowest_plcp
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1bf3ce29	iwl_mac_conf_tx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1c15eed4	iwl_set_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1c520b3e	iwl_mac_hw_scan
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1c8d44c1	iwl_rxq_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d2d3af1	iwl_cmd_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d77b399	iwl_bcast_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x22334007	iwl_pci_resume
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x234a8c7b	iwl_rx_queue_space
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x25303798	iwl_rx_replenish_now
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x269b1002	iwl_rx_reply_error
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x26de0ea0	iwl_get_free_ucode_key_index
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x274ed017	iwl_send_cmd_pdu_async
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x278f6d4e	iwl_power_initialize
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x288cc680	iwl_alloc_all
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x29028672	iwl_eeprom_get_mac
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2bcd5e38	iwl_tx_agg_start
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2d11e570	iwl_rx_reply_rx_phy
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2e43a75a	iwlcore_eeprom_enhanced_txpower
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2f350697	iwl_send_add_sta
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2f5fa21f	iwl_get_ra_sta_id
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x30966d18	iwl_tx_cmd_complete
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x32d81a89	iwl_rx_missed_beacon_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x37cb33a1	iwlcore_free_geos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x42e624e3	iwl_mac_remove_interface
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x43948012	iwlcore_init_geos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4469667b	iwl_setup_mac
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x44f65d5c	iwl_get_sta_id
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x480ee2f0	iwl_clear_stations_table
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x494c29bb	iwl_chain_noise_calibration
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4b2b62a5	iwl_reset_run_time_calib
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4b34c138	iwl_update_tkip_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4cce7197	iwl_tt_exit_ct_kill
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4e2db998	iwlcore_eeprom_query_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4e89eb43	iwl_mac_add_interface
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x523daed9	iwl_free_tfds_in_queue
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x538ad7a5	iwl_rx_queue_alloc
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x543ebe0a	iwl_tx_ant_restriction
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x550bc26e	iwl_set_default_wep_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x55fc1e28	iwl_power_update_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x57cbf908	iwl_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5dc819df	iwlcore_eeprom_release_semaphore
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x61ed639d	iwl_tx_skb
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x62727d56	iwl_calib_set
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x62d5ddae	iwl_hwrate_to_tx_control
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x62dfd3e9	iwl_set_rxon_hwcrypto
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x642d284a	iwl_mac_beacon_update
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x653c0015	iwl_irq_handle_error
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x69d2cc64	iwl_fill_probe_req
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x69dd9c3b	iwl_eeprom_query16
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x69eb6df2	iwl_rf_kill_ct_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6ce8e5e7	iwl_get_active_dwell_time
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x73c68011	iwl_init_drv
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x74cb79fc	iwl_verify_ucode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x78976e61	iwl_isr_legacy
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7dde1287	iwl_reset_qos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7eab7732	iwl_is_ht40_tx_allowed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x818447e8	iwl_rx_statistics
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8621d851	iwl_set_rxon_channel
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8670273d	iwl_hwrate_to_plcp_idx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8c0c11d9	iwl_disable_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9123ff66	iwl_remove_dynamic_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x91250824	iwl_leds_register
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x93513f51	iwl_free_channel_map
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9408f883	iwl_free_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x947bdabd	iwl_sensitivity_calibration
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x96e9b728	iwl_tx_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9705e4e4	iwl_send_lq_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x971ab948	iwl_set_dynamic_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9759c785	iwlcore_eeprom_acquire_semaphore
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x98f6c13b	iwl_set_decrypted_flag
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9a60af0b	iwl_bg_scan_check
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9b5271de	iwl_init_channel_map
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9cde1f24	iwl_queue_space
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9e86e8e0	iwl_bg_abort_scan
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9f7e1705	iwl_find_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa087f10e	iwl_rxon_add_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa2385f65	iwl_full_rxon_required
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa44c43f0	iwl_init_sensitivity
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaad0846e	iwl_bg_scan_completed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xab4428d7	iwl_rx_pm_sleep_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xabd37b87	iwl_send_calib_results
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xacab525d	iwl_get_passive_dwell_time
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xae8272bb	iwl_send_static_wepkey_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xaee18e83	iwl_bss_info_changed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb1186ba6	iwl_uninit_drv
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb182410f	iwl_leds_unregister
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb3a256d0	iwl_hw_txq_ctx_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb54c2b45	iwl_tt_initialize
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb90ad298	iwl_txq_ctx_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb9c2cf6e	iwl_is_monitor_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbb47a7a7	iwl_setup_scan_deferred_work
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbb55598d	iwl_connection_init_rx_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbcd23960	iwl_alloc_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc010fb79	iwl_send_bt_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc05c8dc4	iwl_set_rxon_ht
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc180c20a	iwl_setup_rxon_timing
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc520a895	iwl_hw_nic_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc712c828	iwl_setup_rx_scan_handlers
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc76f045c	iwl_tx_queue_reclaim
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc7756b36	iwl_mac_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc889b153	iwl_eeprom_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcb25786e	iwl_send_cmd_sync
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcbaf4931	get_cmd_string
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xce078b99	iwl_pci_suspend
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd04e9dd4	iwl_send_cmd_pdu
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd0915392	iwl_send_statistics_request
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd104b26e	iwl_tx_agg_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd1fde53d	iwl_tx_queue_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd29f83be	iwl_mac_reset_tsf
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd5559edc	iwl_sta_rx_agg_start
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd6f41028	iwl_set_tx_power
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd8796d13	iwl_set_rxon_chain
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdaf8f32b	iwl_remove_default_wep_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdce360c7	iwl_rx_queue_update_write_ptr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdda659d6	iwl_txq_check_empty
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdfabcfab	iwl_rx_queue_restock
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe7ce5d70	iwl_rates
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe8994ba6	iwl_rx_csa
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe925dcf0	iwl_add_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe981a60e	iwl_sta_rx_agg_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xefe6d6e2	iwl_get_channel_info
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf06d6fee	iwl_ht_enabled
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf0c2b276	iwl_set_hw_params
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf0df5d9f	iwl_rx_reply_compressed_ba
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf4273b9b	iwl_scan_cancel_timeout
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfa3b5d24	iwl_tt_enter_ct_kill
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfade259e	iwl_eeprom_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfca5961b	iwl_check_rxon_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfdccc84d	iwl_eeprom_query_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfe9fd464	iwl_rx_pm_debug_statistics_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfecd6ea1	iwl_hw_detect
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xff829c57	iwl_scan_cancel
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x06b38588	orinoco_if_add
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x0f276c17	orinoco_init
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x4196c38b	hermes_write_ltv
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x56b4c709	orinoco_if_del
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x6a927e18	orinoco_interrupt
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x8fff73cd	alloc_orinocodev
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xa031d8e4	hermes_doicmd_wait
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xacd97e16	orinoco_up
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc60b5e9e	hermes_bap_pwrite
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd38d8ae2	hermes_read_ltv
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd3f714e5	hermes_bap_pread
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5168829	hermes_allocate
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5336e5d	hermes_init
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd54e219d	hermes_docmd_wait
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xed47b224	hermes_struct_init
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xfbc03bbb	free_orinocodev
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xfe0ba684	orinoco_down
+EXPORT_SYMBOL drivers/pps/pps_core 0x1a5ae581	pps_register_source
+EXPORT_SYMBOL drivers/pps/pps_core 0x1e145952	pps_unregister_source
+EXPORT_SYMBOL drivers/pps/pps_core 0xe6a16116	pps_event
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x1e7cd232	fcoe_ctlr_recv_flogi
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x3ff87109	fcoe_ctlr_destroy
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x8d3560a1	fcoe_ctlr_els_send
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x8e387a63	fcoe_ctlr_init
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xac1315c6	fcoe_ctlr_recv
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xcfdafb50	fcoe_ctlr_link_down
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xdd013a2c	fcoe_ctlr_link_up
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x00d3fb30	fc_fcp_ddp_setup
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0347e32d	fc_exch_recv
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0411056e	__fc_frame_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x076a0909	fc_seq_start_next
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0b1cecf6	fc_fabric_login
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1bb46f65	fc_seq_els_rsp_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x27a07390	fc_set_rport_loss_tmo
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x2a9845b5	fc_exch_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x31879313	fc_exch_mgr_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x344a7ae0	fc_lport_destroy
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x36e5fbaf	fc_cpu_mask
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x3eace2b1	fc_linkdown
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x40909132	fc_lport_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x40939b5f	fc_queuecommand
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x4422e1b0	fc_linkup
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x56183917	fc_destroy_rport
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x585f8523	fc_change_queue_type
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x5f577b5c	fc_exch_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6080dc52	fc_elsct_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x67750428	fc_exch_done
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6781def8	fc_set_mfs
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x69ebeec3	fc_fcp_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6ed629d6	fc_rport_terminate_io
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x778980c1	fc_get_host_speed
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x790f57ba	fc_seq_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x8dc3685c	fc_eh_host_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x96db33f5	fc_fabric_logoff
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa8372742	fc_exch_seq_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa8d75b21	fc_get_host_port_state
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xaa7ce63b	fc_get_host_stats
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xabd8e275	fc_exch_mgr_add
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xad6fde2e	fc_get_host_port_type
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb7301bdc	fc_eh_abort
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb9468089	fc_exch_mgr_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb99f3313	fc_exch_mgr_free
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xbdd113d4	fc_eh_device_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xc58e9b47	fc_frame_crc_check
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xc65eba3e	fc_slave_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xcb91b9e7	fc_rport_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xcefdcbe3	fc_disc_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd6cb3359	fc_setup_rport
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd81068b9	fc_change_queue_depth
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xdacdecd9	fc_fcp_destroy
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xdbec21b7	fc_lport_config
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xdffba745	fc_lport_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe748d5c1	fc_fcp_complete
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf7365d60	fc_seq_exch_abort
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xfefb47cc	fc_exch_mgr_del
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x2250c66e	mraid_mm_adapter_app_handle
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x512c956d	mraid_mm_unregister_adp
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0xb5efbd56	mraid_mm_register_adp
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x265ca6e6	fc_host_post_event
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x442678a9	fc_remove_host
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x48932570	scsi_is_fc_rport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x490d5c77	fc_remote_port_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x701b6041	fc_host_post_vendor_event
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x7954b1ea	fc_get_event_number
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x84dd763c	scsi_is_fc_vport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xa466c0c3	fc_vport_create
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xa579ed1d	fc_remote_port_rolechg
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xe4003930	fc_vport_terminate
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xf3189973	fc_remote_port_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xf34da03b	fc_attach_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xfe9653e3	fc_release_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x08a639de	scsi_is_sas_port
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x18a082fe	sas_remove_children
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x1ec904bb	sas_port_delete_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x3ee770df	sas_port_alloc_num
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x42fbdbb7	sas_port_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x4a653cea	sas_port_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x6ddcf638	sas_phy_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x7d467fa4	sas_port_add_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x7f37a229	sas_phy_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x82f6adf3	sas_release_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x940fd0ab	sas_remove_host
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x950b7725	sas_attach_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x9a16e787	sas_phy_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xa3ed4012	sas_read_port_mode_page
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xaeeb5736	sas_rphy_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xb119a03c	scsi_is_sas_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xb1318e01	sas_end_device_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xb57d190c	sas_phy_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xc2800a36	sas_port_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xc910b43f	sas_rphy_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xcab07e6e	sas_port_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xcd0cdb03	sas_port_mark_backlink
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xe612a36a	sas_rphy_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xf02f09de	scsi_is_sas_rphy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xf25e008b	sas_expander_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xf2ef2f45	sas_rphy_remove
+EXPORT_SYMBOL drivers/serial/8250 0x52175c93	serial8250_register_port
+EXPORT_SYMBOL drivers/serial/8250 0xc7208c3a	serial8250_resume_port
+EXPORT_SYMBOL drivers/serial/8250 0xcc248d26	serial8250_suspend_port
+EXPORT_SYMBOL drivers/serial/8250 0xcefcd99a	serial8250_unregister_port
+EXPORT_SYMBOL drivers/ssb/ssb 0x01a5bc87	ssb_clockspeed
+EXPORT_SYMBOL drivers/ssb/ssb 0x0e9f2bad	ssb_bus_suspend
+EXPORT_SYMBOL drivers/ssb/ssb 0x19b466a5	ssb_dma_alloc_consistent
+EXPORT_SYMBOL drivers/ssb/ssb 0x373af2e4	ssb_dma_set_mask
+EXPORT_SYMBOL drivers/ssb/ssb 0x47e90d51	ssb_device_disable
+EXPORT_SYMBOL drivers/ssb/ssb 0x52acad41	ssb_device_is_enabled
+EXPORT_SYMBOL drivers/ssb/ssb 0x559edf03	ssb_pmu_set_ldo_voltage
+EXPORT_SYMBOL drivers/ssb/ssb 0x579afc48	__ssb_driver_register
+EXPORT_SYMBOL drivers/ssb/ssb 0x696e460e	ssb_pmu_set_ldo_paref
+EXPORT_SYMBOL drivers/ssb/ssb 0x9bcc3fc2	ssb_bus_powerup
+EXPORT_SYMBOL drivers/ssb/ssb 0x9f765694	ssb_bus_resume
+EXPORT_SYMBOL drivers/ssb/ssb 0xba4bbc79	ssb_dma_translation
+EXPORT_SYMBOL drivers/ssb/ssb 0xc0512e0f	ssb_admatch_base
+EXPORT_SYMBOL drivers/ssb/ssb 0xc101ba73	ssb_bus_may_powerdown
+EXPORT_SYMBOL drivers/ssb/ssb 0xcf27b567	ssb_set_devtypedata
+EXPORT_SYMBOL drivers/ssb/ssb 0xd481192b	ssb_admatch_size
+EXPORT_SYMBOL drivers/ssb/ssb 0xd53e16b1	ssb_pcicore_dev_irqvecs_enable
+EXPORT_SYMBOL drivers/ssb/ssb 0xdc2a26f5	ssb_dma_free_consistent
+EXPORT_SYMBOL drivers/ssb/ssb 0xdeab4a69	ssb_bus_unregister
+EXPORT_SYMBOL drivers/ssb/ssb 0xe24eeb45	ssb_bus_sdiobus_register
+EXPORT_SYMBOL drivers/ssb/ssb 0xea9ea9bd	ssb_pcihost_register
+EXPORT_SYMBOL drivers/ssb/ssb 0xec9f34b7	ssb_bus_pcibus_register
+EXPORT_SYMBOL drivers/ssb/ssb 0xeccdc4e7	ssb_device_enable
+EXPORT_SYMBOL drivers/ssb/ssb 0xed642a00	ssb_driver_unregister
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x0e655aa3	iio_class
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x196c22a3	iio_push_event
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x3d77575c	__iio_change_event
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x439d0167	iio_free_device
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x4e3b12ca	iio_unregister_interrupt_line
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x739ae300	iio_devt
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x816eaddc	iio_device_register
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x84a5ce70	iio_device_unregister
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x85f6f948	iio_allocate_device
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0x98267333	iio_remove_event_from_list
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xbf0f3065	__iio_push_event
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xcda27160	iio_free_idr_val
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xe9784f42	iio_get_new_idr_val
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xeca2294d	iio_read_const_attr
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xf64ae03f	iio_add_event_to_list
+EXPORT_SYMBOL drivers/staging/iio/industrialio 0xf8156343	iio_register_interrupt_line
+EXPORT_SYMBOL drivers/staging/line6/line6usb 0x2950f711	variax_remove_files
+EXPORT_SYMBOL drivers/staging/line6/line6usb 0x4bab34ff	pod_remove_files
+EXPORT_SYMBOL drivers/staging/line6/line6usb 0x7092de60	pod_create_files
+EXPORT_SYMBOL drivers/staging/line6/line6usb 0xd573b8c3	variax_create_files
+EXPORT_SYMBOL drivers/staging/rar/rar_driver 0xf8017f03	get_rar_address
+EXPORT_SYMBOL drivers/staging/vme/vme 0x00d7e722	vme_lm_count
+EXPORT_SYMBOL drivers/staging/vme/vme 0x072f901c	vme_master_rmw
+EXPORT_SYMBOL drivers/staging/vme/vme 0x08ead735	vme_master_request
+EXPORT_SYMBOL drivers/staging/vme/vme 0x0e10859d	vme_lm_get
+EXPORT_SYMBOL drivers/staging/vme/vme 0x0e32a330	vme_request_irq
+EXPORT_SYMBOL drivers/staging/vme/vme 0x0ec5babe	vme_dma_free
+EXPORT_SYMBOL drivers/staging/vme/vme 0x251b9ed8	vme_slave_set
+EXPORT_SYMBOL drivers/staging/vme/vme 0x398b03fe	vme_unregister_driver
+EXPORT_SYMBOL drivers/staging/vme/vme 0x3d1af350	vme_dma_pci_attribute
+EXPORT_SYMBOL drivers/staging/vme/vme 0x3f68d4cf	vme_lm_set
+EXPORT_SYMBOL drivers/staging/vme/vme 0x44846485	vme_dma_list_add
+EXPORT_SYMBOL drivers/staging/vme/vme 0x48b99a13	vme_lm_free
+EXPORT_SYMBOL drivers/staging/vme/vme 0x50fa5866	vme_new_dma_list
+EXPORT_SYMBOL drivers/staging/vme/vme 0x5b79528f	vme_request_dma
+EXPORT_SYMBOL drivers/staging/vme/vme 0x66227eae	vme_alloc_consistent
+EXPORT_SYMBOL drivers/staging/vme/vme 0x76bab4d4	vme_master_set
+EXPORT_SYMBOL drivers/staging/vme/vme 0x7797a741	vme_dma_vme_attribute
+EXPORT_SYMBOL drivers/staging/vme/vme 0x7cf35220	vme_master_free
+EXPORT_SYMBOL drivers/staging/vme/vme 0x7fde2edb	vme_master_read
+EXPORT_SYMBOL drivers/staging/vme/vme 0x8e12daf0	vme_unregister_bridge
+EXPORT_SYMBOL drivers/staging/vme/vme 0x92fa5abb	vme_lm_detach
+EXPORT_SYMBOL drivers/staging/vme/vme 0x93dff61f	vme_slave_get
+EXPORT_SYMBOL drivers/staging/vme/vme 0x94b2590f	vme_free_consistent
+EXPORT_SYMBOL drivers/staging/vme/vme 0x954cdb9d	vme_slot_get
+EXPORT_SYMBOL drivers/staging/vme/vme 0x9aeb07e8	vme_lm_attach
+EXPORT_SYMBOL drivers/staging/vme/vme 0x9c50cf04	vme_dma_list_exec
+EXPORT_SYMBOL drivers/staging/vme/vme 0xa4dbed16	vme_register_bridge
+EXPORT_SYMBOL drivers/staging/vme/vme 0xaa4333e8	vme_bus_type
+EXPORT_SYMBOL drivers/staging/vme/vme 0xb7f31567	vme_register_driver
+EXPORT_SYMBOL drivers/staging/vme/vme 0xc07d1ef3	vme_slave_request
+EXPORT_SYMBOL drivers/staging/vme/vme 0xc8352002	vme_dma_pattern_attribute
+EXPORT_SYMBOL drivers/staging/vme/vme 0xd3448224	vme_lm_request
+EXPORT_SYMBOL drivers/staging/vme/vme 0xd60268f5	vme_dma_list_free
+EXPORT_SYMBOL drivers/staging/vme/vme 0xd797b9a5	vme_master_write
+EXPORT_SYMBOL drivers/staging/vme/vme 0xdff905e5	vme_slave_free
+EXPORT_SYMBOL drivers/staging/vme/vme 0xe60cbb2f	vme_master_get
+EXPORT_SYMBOL drivers/staging/vme/vme 0xe693a6ce	vme_get_size
+EXPORT_SYMBOL drivers/staging/vme/vme 0xe7da370a	vme_generate_irq
+EXPORT_SYMBOL drivers/staging/vme/vme 0xebd0fa26	vme_free_irq
+EXPORT_SYMBOL drivers/staging/vme/vme 0xeccbeafc	vme_dma_free_attribute
+EXPORT_SYMBOL drivers/telephony/ixj 0x0a562462	ixj_pcmcia_probe
+EXPORT_SYMBOL drivers/telephony/phonedev 0x2c02446b	phone_unregister_device
+EXPORT_SYMBOL drivers/telephony/phonedev 0x56fcf748	phone_register_device
+EXPORT_SYMBOL drivers/usb/host/sl811-hcd 0x0dfd2ee7	sl811h_driver
+EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xa64a4cea	usb_nop_xceiv_unregister
+EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xd0e43207	usb_nop_xceiv_register
+EXPORT_SYMBOL drivers/usb/serial/usbserial 0x41cfe460	usb_serial_resume
+EXPORT_SYMBOL drivers/usb/serial/usbserial 0xb2d6dab6	usb_serial_suspend
+EXPORT_SYMBOL drivers/video/backlight/generic_bl 0xc86baa7c	corgibl_limit_intensity
+EXPORT_SYMBOL drivers/video/backlight/lcd 0x5bd9568f	lcd_device_unregister
+EXPORT_SYMBOL drivers/video/backlight/lcd 0xe9da6c2d	lcd_device_register
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x0cc3ede5	cyber2000fb_detach
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x58b772d5	cyber2000fb_get_fb_var
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x62869922	cyber2000fb_attach
+EXPORT_SYMBOL drivers/video/cyber2000fb 0xcc137b81	cyber2000fb_enable_extregs
+EXPORT_SYMBOL drivers/video/cyber2000fb 0xce2cf2c1	cyber2000fb_disable_extregs
+EXPORT_SYMBOL drivers/video/display/display 0xce2a87ab	display_device_unregister
+EXPORT_SYMBOL drivers/video/display/display 0xe41cb677	display_device_register
+EXPORT_SYMBOL drivers/video/macmodes 0x08ed0b62	mac_vmode_to_var
+EXPORT_SYMBOL drivers/video/macmodes 0xd43c26a2	mac_find_mode
+EXPORT_SYMBOL drivers/video/macmodes 0xe2304303	mac_map_monitor_sense
+EXPORT_SYMBOL drivers/video/matrox/g450_pll 0x4633103a	g450_mnp2f
+EXPORT_SYMBOL drivers/video/matrox/g450_pll 0x75b2bf6f	matroxfb_g450_setpll_cond
+EXPORT_SYMBOL drivers/video/matrox/g450_pll 0xf99471c8	matroxfb_g450_setclk
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0x33598e37	matrox_G100
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0x8889b02e	matrox_mystique
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0xa08f0caf	DAC1064_global_restore
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_DAC1064 0xabc9c45d	DAC1064_global_init
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_Ti3026 0x93ba1c68	matrox_millennium
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_accel 0x2ebe2a30	matrox_cfbX_init
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0x12ba581c	matroxfb_wait_for_sync
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0x21e9fcb5	matroxfb_register_driver
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0x6596c31a	matroxfb_unregister_driver
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_base 0xc3ff502d	matroxfb_enable_irq
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_g450 0x1dc7c168	matroxfb_g450_shutdown
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_g450 0xc1afcf0d	matroxfb_g450_connect
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x14cfc5cc	matroxfb_read_pins
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x25cf8049	matroxfb_PLL_calcclock
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x3c5cd864	matroxfb_DAC_in
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x7edb0624	matroxfb_vgaHWrestore
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x8d393910	matroxfb_vgaHWinit
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0x9f35d6ba	matroxfb_DAC_out
+EXPORT_SYMBOL drivers/video/matrox/matroxfb_misc 0xabd8e427	matroxfb_var2my
+EXPORT_SYMBOL drivers/video/output 0xeb22bb6a	video_output_unregister
+EXPORT_SYMBOL drivers/video/output 0xff6f6e52	video_output_register
+EXPORT_SYMBOL drivers/video/sis/sisfb 0x3037658e	sis_malloc
+EXPORT_SYMBOL drivers/video/sis/sisfb 0x454a3cf0	sis_free
+EXPORT_SYMBOL drivers/video/svgalib 0x00d1fce9	svga_set_default_seq_regs
+EXPORT_SYMBOL drivers/video/svgalib 0x07b3da30	svga_wseq_multi
+EXPORT_SYMBOL drivers/video/svgalib 0x0fa2c204	svga_get_tilemax
+EXPORT_SYMBOL drivers/video/svgalib 0x1b95c56a	svga_check_timings
+EXPORT_SYMBOL drivers/video/svgalib 0x2881ca61	svga_get_caps
+EXPORT_SYMBOL drivers/video/svgalib 0x63e898d1	svga_set_default_crt_regs
+EXPORT_SYMBOL drivers/video/svgalib 0x73fb175f	svga_tilefill
+EXPORT_SYMBOL drivers/video/svgalib 0x7a3ae959	svga_wcrt_multi
+EXPORT_SYMBOL drivers/video/svgalib 0x80408443	svga_set_timings
+EXPORT_SYMBOL drivers/video/svgalib 0x8fa8438b	svga_set_textmode_vga_regs
+EXPORT_SYMBOL drivers/video/svgalib 0xa12be525	svga_tilecursor
+EXPORT_SYMBOL drivers/video/svgalib 0xab3b22ad	svga_set_default_gfx_regs
+EXPORT_SYMBOL drivers/video/svgalib 0xc85c9542	svga_tilecopy
+EXPORT_SYMBOL drivers/video/svgalib 0xc92eca1d	svga_tileblit
+EXPORT_SYMBOL drivers/video/svgalib 0xd246ecc3	svga_settile
+EXPORT_SYMBOL drivers/video/svgalib 0xdad682b1	svga_set_default_atc_regs
+EXPORT_SYMBOL drivers/video/svgalib 0xec83c473	svga_match_format
+EXPORT_SYMBOL drivers/video/svgalib 0xef774f5d	svga_compute_pll
+EXPORT_SYMBOL drivers/video/syscopyarea 0xa9898c83	sys_copyarea
+EXPORT_SYMBOL drivers/video/sysfillrect 0x2a68080c	sys_fillrect
+EXPORT_SYMBOL drivers/video/sysimgblt 0xb4b08baf	sys_imageblit
+EXPORT_SYMBOL drivers/video/vgastate 0x686de290	restore_vga
+EXPORT_SYMBOL drivers/video/vgastate 0xe7a2620e	save_vga
+EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x39c560ed	w1_bq27000_write
+EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0xf64f31d3	w1_bq27000_read
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x0eba9152	w1_ds2760_recall_eeprom
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x43c1f966	w1_ds2760_read
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x467dc0f9	w1_ds2760_write
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x66c2495e	w1_ds2760_store_eeprom
+EXPORT_SYMBOL drivers/w1/wire 0x2a468345	w1_add_master_device
+EXPORT_SYMBOL drivers/w1/wire 0x42841c9a	w1_remove_master_device
+EXPORT_SYMBOL drivers/w1/wire 0xe220b69f	w1_register_family
+EXPORT_SYMBOL drivers/w1/wire 0xefe8b952	w1_unregister_family
+EXPORT_SYMBOL fs/configfs/configfs 0x52616088	config_item_get
+EXPORT_SYMBOL fs/configfs/configfs 0x52662026	configfs_register_subsystem
+EXPORT_SYMBOL fs/configfs/configfs 0x570e77bd	configfs_depend_item
+EXPORT_SYMBOL fs/configfs/configfs 0x6274aecf	config_item_init_type_name
+EXPORT_SYMBOL fs/configfs/configfs 0x89696ba2	configfs_undepend_item
+EXPORT_SYMBOL fs/configfs/configfs 0x8fad5827	config_group_init
+EXPORT_SYMBOL fs/configfs/configfs 0xd4557837	configfs_unregister_subsystem
+EXPORT_SYMBOL fs/configfs/configfs 0xd593b919	config_item_init
+EXPORT_SYMBOL fs/configfs/configfs 0xd66bda53	config_item_set_name
+EXPORT_SYMBOL fs/configfs/configfs 0xd976d844	config_group_find_item
+EXPORT_SYMBOL fs/configfs/configfs 0xf9de6b7f	config_group_init_type_name
+EXPORT_SYMBOL fs/configfs/configfs 0xfaaad5a3	config_item_put
+EXPORT_SYMBOL fs/fscache/fscache 0x07d9b576	fscache_wait_bit_interruptible
+EXPORT_SYMBOL fs/fscache/fscache 0x169d2efa	fscache_enqueue_operation
+EXPORT_SYMBOL fs/fscache/fscache 0x1ac74b41	__fscache_register_netfs
+EXPORT_SYMBOL fs/fscache/fscache 0x2e130e16	fscache_put_operation
+EXPORT_SYMBOL fs/fscache/fscache 0x2ee5b4ff	fscache_init_cache
+EXPORT_SYMBOL fs/fscache/fscache 0x305a5127	__fscache_relinquish_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0x367efd2e	fscache_fsdef_index
+EXPORT_SYMBOL fs/fscache/fscache 0x37b116ff	__fscache_uncache_page
+EXPORT_SYMBOL fs/fscache/fscache 0x3fc23318	fscache_wait_bit
+EXPORT_SYMBOL fs/fscache/fscache 0x411cbb68	fscache_obtained_object
+EXPORT_SYMBOL fs/fscache/fscache 0x4138e8f9	__fscache_acquire_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0x49260749	fscache_object_lookup_negative
+EXPORT_SYMBOL fs/fscache/fscache 0x496932b9	fscache_op_debug_id
+EXPORT_SYMBOL fs/fscache/fscache 0x51c063b7	__fscache_maybe_release_page
+EXPORT_SYMBOL fs/fscache/fscache 0x5f735588	__fscache_read_or_alloc_page
+EXPORT_SYMBOL fs/fscache/fscache 0x661bb22d	fscache_check_aux
+EXPORT_SYMBOL fs/fscache/fscache 0x69c9046d	__fscache_alloc_page
+EXPORT_SYMBOL fs/fscache/fscache 0x868905ed	fscache_object_slow_work_ops
+EXPORT_SYMBOL fs/fscache/fscache 0x86f8894f	fscache_object_states
+EXPORT_SYMBOL fs/fscache/fscache 0x8b001ea0	__fscache_unregister_netfs
+EXPORT_SYMBOL fs/fscache/fscache 0xa0260920	__fscache_update_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0xaaefa6c8	fscache_withdraw_cache
+EXPORT_SYMBOL fs/fscache/fscache 0xbf17b872	fscache_mark_pages_cached
+EXPORT_SYMBOL fs/fscache/fscache 0xc0abbf06	__fscache_check_page_write
+EXPORT_SYMBOL fs/fscache/fscache 0xd780062d	__fscache_wait_on_page_write
+EXPORT_SYMBOL fs/fscache/fscache 0xdae130ce	fscache_io_error
+EXPORT_SYMBOL fs/fscache/fscache 0xe3e5d2e0	fscache_add_cache
+EXPORT_SYMBOL fs/fscache/fscache 0xebd812a8	fscache_cache_cleared_wq
+EXPORT_SYMBOL fs/fscache/fscache 0xee40e64b	__fscache_write_page
+EXPORT_SYMBOL fs/fscache/fscache 0xf107ac10	__fscache_read_or_alloc_pages
+EXPORT_SYMBOL fs/fscache/fscache 0xf90bd124	__fscache_attr_changed
+EXPORT_SYMBOL fs/nfsd/nfsd 0x0e195c1c	nfs4_acl_nfsv4_to_posix
+EXPORT_SYMBOL fs/nfsd/nfsd 0x2095976a	nfs4_acl_new
+EXPORT_SYMBOL fs/nfsd/nfsd 0x28fb929b	nfs4_acl_posix_to_nfsv4
+EXPORT_SYMBOL fs/nfsd/nfsd 0x35e33c1e	nfs4_acl_write_who
+EXPORT_SYMBOL fs/nfsd/nfsd 0x5a157ae4	nfs4_acl_get_whotype
+EXPORT_SYMBOL fs/quota/quota_tree 0x07c79f50	qtree_read_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0x2d9efc04	qtree_write_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0x4c66b0aa	qtree_delete_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0x80a49dd6	qtree_release_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0xac474abe	qtree_entry_unused
+EXPORT_SYMBOL lib/crc-ccitt 0x3771b461	crc_ccitt
+EXPORT_SYMBOL lib/crc-ccitt 0x75811312	crc_ccitt_table
+EXPORT_SYMBOL lib/crc-itu-t 0xd29b009f	crc_itu_t_table
+EXPORT_SYMBOL lib/crc-itu-t 0xf5b4a948	crc_itu_t
+EXPORT_SYMBOL lib/crc7 0xa7587646	crc7
+EXPORT_SYMBOL lib/crc7 0xd80c3603	crc7_syndrome_table
+EXPORT_SYMBOL lib/libcrc32c 0x27000b29	crc32c
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x315c65fd	zlib_deflateInit2
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x48034724	zlib_deflateReset
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xaf64ad0d	zlib_deflate
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf0caf44b	zlib_deflate_workspacesize
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf741c793	zlib_deflateEnd
+EXPORT_SYMBOL net/802/p8023 0x317ca74b	destroy_8023_client
+EXPORT_SYMBOL net/802/p8023 0x43e3ae53	make_8023_client
+EXPORT_SYMBOL net/9p/9pnet 0x06b04ecb	p9_client_create
+EXPORT_SYMBOL net/9p/9pnet 0x0b11ff5a	p9_idpool_put
+EXPORT_SYMBOL net/9p/9pnet 0x3194730b	p9_client_auth
+EXPORT_SYMBOL net/9p/9pnet 0x3d73a797	p9_errstr2errno
+EXPORT_SYMBOL net/9p/9pnet 0x451b3eb7	p9_client_wstat
+EXPORT_SYMBOL net/9p/9pnet 0x4783e6c0	p9_client_remove
+EXPORT_SYMBOL net/9p/9pnet 0x4fa0def9	v9fs_get_default_trans
+EXPORT_SYMBOL net/9p/9pnet 0x51d1e99a	p9_tag_lookup
+EXPORT_SYMBOL net/9p/9pnet 0x5220c0e6	p9_client_disconnect
+EXPORT_SYMBOL net/9p/9pnet 0x5ee047c5	p9_client_open
+EXPORT_SYMBOL net/9p/9pnet 0x6b754e6f	p9_parse_header
+EXPORT_SYMBOL net/9p/9pnet 0x6f230b67	v9fs_get_trans_by_name
+EXPORT_SYMBOL net/9p/9pnet 0x707165bd	p9_client_cb
+EXPORT_SYMBOL net/9p/9pnet 0x707fa3dc	p9_client_walk
+EXPORT_SYMBOL net/9p/9pnet 0x7310a66f	p9_idpool_create
+EXPORT_SYMBOL net/9p/9pnet 0x76b79bf1	p9stat_read
+EXPORT_SYMBOL net/9p/9pnet 0x8a345b50	v9fs_unregister_trans
+EXPORT_SYMBOL net/9p/9pnet 0x8f34fe15	p9_idpool_check
+EXPORT_SYMBOL net/9p/9pnet 0x99a7f30f	p9_idpool_destroy
+EXPORT_SYMBOL net/9p/9pnet 0x99aa7841	p9_idpool_get
+EXPORT_SYMBOL net/9p/9pnet 0x9acde21c	p9_client_write
+EXPORT_SYMBOL net/9p/9pnet 0x9c964743	p9stat_free
+EXPORT_SYMBOL net/9p/9pnet 0xa447d6d1	p9_client_stat
+EXPORT_SYMBOL net/9p/9pnet 0xb2a44baf	p9_client_read
+EXPORT_SYMBOL net/9p/9pnet 0xb8cbc599	p9_client_fcreate
+EXPORT_SYMBOL net/9p/9pnet 0xbd8cca47	p9_client_destroy
+EXPORT_SYMBOL net/9p/9pnet 0xce07b413	p9_client_version
+EXPORT_SYMBOL net/9p/9pnet 0xd331fc1d	p9pdu_dump
+EXPORT_SYMBOL net/9p/9pnet 0xd74ec547	p9_client_attach
+EXPORT_SYMBOL net/9p/9pnet 0xe58a3360	p9_error_init
+EXPORT_SYMBOL net/9p/9pnet 0xe66e2d65	p9_client_clunk
+EXPORT_SYMBOL net/9p/9pnet 0xefa5094a	v9fs_register_trans
+EXPORT_SYMBOL net/ax25/ax25 0x1a83bd2f	ax25_listen_register
+EXPORT_SYMBOL net/ax25/ax25 0x242852b9	ax25_uid_policy
+EXPORT_SYMBOL net/ax25/ax25 0x33512103	ax25_header_ops
+EXPORT_SYMBOL net/ax25/ax25 0x3d2d82ec	ax25_display_timer
+EXPORT_SYMBOL net/ax25/ax25 0x4502c65a	asc2ax
+EXPORT_SYMBOL net/ax25/ax25 0x53dea1ff	ax2asc
+EXPORT_SYMBOL net/ax25/ax25 0x564d9f14	ax25_findbyuid
+EXPORT_SYMBOL net/ax25/ax25 0x606a2913	ax25_linkfail_register
+EXPORT_SYMBOL net/ax25/ax25 0x6f906ce2	ax25_hard_header
+EXPORT_SYMBOL net/ax25/ax25 0x7b0a4953	ax25_listen_release
+EXPORT_SYMBOL net/ax25/ax25 0x8ede9e26	ax25_protocol_release
+EXPORT_SYMBOL net/ax25/ax25 0x9c5affa7	ax25_find_cb
+EXPORT_SYMBOL net/ax25/ax25 0x9f49fdb0	ax25_rebuild_header
+EXPORT_SYMBOL net/ax25/ax25 0xaf158c6d	ax25_linkfail_release
+EXPORT_SYMBOL net/ax25/ax25 0xc1444946	ax25cmp
+EXPORT_SYMBOL net/ax25/ax25 0xc4bfe458	ax25_send_frame
+EXPORT_SYMBOL net/ax25/ax25 0xd43ecbf1	null_ax25_address
+EXPORT_SYMBOL net/bridge/bridge 0xac7e7efe	br_should_route_hook
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x22249981	ebt_register_table
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x397f3674	ebt_do_table
+EXPORT_SYMBOL net/bridge/netfilter/ebtables 0x946241c6	ebt_unregister_table
+EXPORT_SYMBOL net/can/can 0x053f7df2	can_proto_register
+EXPORT_SYMBOL net/can/can 0x3c8c2850	can_proto_unregister
+EXPORT_SYMBOL net/can/can 0x4f95502d	can_rx_unregister
+EXPORT_SYMBOL net/can/can 0x878566ec	can_rx_register
+EXPORT_SYMBOL net/can/can 0xd07c5088	can_send
+EXPORT_SYMBOL net/ieee802154/nl802154 0x029e774a	ieee802154_nl_beacon_indic
+EXPORT_SYMBOL net/ieee802154/nl802154 0x10079b2c	ieee802154_nl_disassoc_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0x2274eecf	ieee802154_nl_start_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0x3985172f	ieee802154_nl_assoc_indic
+EXPORT_SYMBOL net/ieee802154/nl802154 0x53c9d4c7	ieee802154_nl_disassoc_indic
+EXPORT_SYMBOL net/ieee802154/nl802154 0x5cd25bff	ieee802154_nl_assoc_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0xbd79cfac	ieee802154_nl_scan_confirm
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x165e807e	wpan_phy_find
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x2d7048c4	wpan_phy_register
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x75f3ed62	wpan_phy_free
+EXPORT_SYMBOL net/ieee802154/wpan-class 0xa0c6e6ab	wpan_phy_alloc
+EXPORT_SYMBOL net/ieee802154/wpan-class 0xb86ed85b	wpan_phy_unregister
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x19929a32	arpt_do_table
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x1f93fc60	arpt_unregister_table
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xb11ec3b4	arpt_register_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x5edbc2e3	ipt_do_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x7ee5a778	ipt_unregister_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0xc5b82d81	ipt_register_table
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x14838dd6	nf_nat_protocol_unregister
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x244c7a2e	nf_nat_mangle_tcp_packet
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x298965ac	nf_nat_follow_master
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x2e47035a	nf_nat_protocol_register
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x99b3595a	nf_nat_mangle_udp_packet
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xcdae09e5	nf_nat_used_tuple
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xcf8693c9	nf_nat_setup_info
+EXPORT_SYMBOL net/ipv4/tunnel4 0x1068616d	xfrm4_tunnel_deregister
+EXPORT_SYMBOL net/ipv4/tunnel4 0xa37009fa	xfrm4_tunnel_register
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x0a10bc5e	ipv6_find_hdr
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x48d32e42	ip6t_unregister_table
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xa931127d	ip6t_register_table
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xb8bddf33	ip6t_ext_hdr
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xea1827c2	ip6t_do_table
+EXPORT_SYMBOL net/ipv6/tunnel6 0x0eaffd4f	xfrm6_tunnel_register
+EXPORT_SYMBOL net/ipv6/tunnel6 0xa316a72c	xfrm6_tunnel_deregister
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0x9cd013f2	xfrm6_tunnel_alloc_spi
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xab14e193	xfrm6_tunnel_free_spi
+EXPORT_SYMBOL net/ipv6/xfrm6_tunnel 0xdb1b42d1	xfrm6_tunnel_spi_lookup
+EXPORT_SYMBOL net/mac80211/mac80211 0x00ee76e2	ieee80211_get_tkip_key
+EXPORT_SYMBOL net/mac80211/mac80211 0x0953e1bc	ieee80211_free_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x0ed47567	ieee80211_rts_get
+EXPORT_SYMBOL net/mac80211/mac80211 0x0f0a6380	ieee80211_queue_work
+EXPORT_SYMBOL net/mac80211/mac80211 0x15ffe5c2	ieee80211_alloc_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x213b346b	ieee80211_ctstoself_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0x276fa461	ieee80211_queue_delayed_work
+EXPORT_SYMBOL net/mac80211/mac80211 0x2b968478	ieee80211_stop_tx_ba_session
+EXPORT_SYMBOL net/mac80211/mac80211 0x2d982853	ieee80211_tx_status_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0x31163d7d	ieee80211_find_sta
+EXPORT_SYMBOL net/mac80211/mac80211 0x37ca0998	ieee80211_wake_queues
+EXPORT_SYMBOL net/mac80211/mac80211 0x37f7a126	ieee80211_start_tx_ba_cb
+EXPORT_SYMBOL net/mac80211/mac80211 0x4267820e	ieee80211_register_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x42768ad9	ieee80211_rate_control_register
+EXPORT_SYMBOL net/mac80211/mac80211 0x48e197d0	ieee80211_tx_status
+EXPORT_SYMBOL net/mac80211/mac80211 0x4ed628b3	ieee80211_stop_tx_ba_cb
+EXPORT_SYMBOL net/mac80211/mac80211 0x52b6c979	__ieee80211_get_rx_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0x5b3479e0	ieee80211_generic_frame_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0x5d2666fd	ieee80211_scan_completed
+EXPORT_SYMBOL net/mac80211/mac80211 0x5ecc83c8	ieee80211_start_tx_ba_session
+EXPORT_SYMBOL net/mac80211/mac80211 0x6b2f9ea1	ieee80211_start_tx_ba_cb_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0x770c08fc	ieee80211_ctstoself_get
+EXPORT_SYMBOL net/mac80211/mac80211 0x839a90df	__ieee80211_get_tx_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0x86c29ea0	ieee80211_unregister_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x8a2f1140	ieee80211_rts_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0x947e21bf	ieee80211_stop_queues
+EXPORT_SYMBOL net/mac80211/mac80211 0x95703245	ieee80211_rate_control_unregister
+EXPORT_SYMBOL net/mac80211/mac80211 0xa1cae257	wiphy_to_ieee80211_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xa7021bfa	__ieee80211_get_assoc_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0xa8f00f8e	__ieee80211_get_radio_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0xb65dc67f	ieee80211_wake_queue
+EXPORT_SYMBOL net/mac80211/mac80211 0xc7346d22	rate_control_send_low
+EXPORT_SYMBOL net/mac80211/mac80211 0xc9ff696c	ieee80211_get_buffered_bc
+EXPORT_SYMBOL net/mac80211/mac80211 0xccf67c6c	ieee80211_queue_stopped
+EXPORT_SYMBOL net/mac80211/mac80211 0xd08404f9	ieee80211_stop_tx_ba_cb_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0xd34bc240	ieee80211_beacon_get
+EXPORT_SYMBOL net/mac80211/mac80211 0xddaf71a6	ieee80211_rx_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0xddd33b75	ieee80211_restart_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xe7470b5c	ieee80211_stop_queue
+EXPORT_SYMBOL net/mac80211/mac80211 0xe8abe42d	ieee80211_beacon_loss
+EXPORT_SYMBOL net/mac80211/mac80211 0xfa66c272	ieee80211_rx
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x00f869ed	unregister_ip_vs_app
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x107b7be7	register_ip_vs_app_inc
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x2277f968	ip_vs_conn_out_get
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x390fb308	ip_vs_tcp_conn_listen
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x6ffe1d27	ip_vs_conn_in_get
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x7c07d703	unregister_ip_vs_scheduler
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x913232c4	register_ip_vs_app
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xa1dbc2d8	ip_vs_proto_name
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xadd88a1b	ip_vs_conn_put
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xae9849aa	ip_vs_skb_replace
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xe2975cb2	ip_vs_conn_new
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xfa8d14fc	register_ip_vs_scheduler
+EXPORT_SYMBOL net/netfilter/nf_conntrack 0x69abcf36	__nf_ct_ext_add
+EXPORT_SYMBOL net/netfilter/nf_conntrack 0x840e6941	__nf_ct_ext_destroy
+EXPORT_SYMBOL net/netfilter/nf_conntrack_proto_gre 0xb8cc3694	nf_ct_gre_keymap_flush
+EXPORT_SYMBOL net/netfilter/x_tables 0x16a5e826	xt_free_table_info
+EXPORT_SYMBOL net/netfilter/x_tables 0x2040fea1	xt_unregister_targets
+EXPORT_SYMBOL net/netfilter/x_tables 0x2918c166	xt_register_targets
+EXPORT_SYMBOL net/netfilter/x_tables 0x3b9abdfb	xt_register_match
+EXPORT_SYMBOL net/netfilter/x_tables 0x4e7a1161	xt_unregister_match
+EXPORT_SYMBOL net/netfilter/x_tables 0x642883e2	xt_register_matches
+EXPORT_SYMBOL net/netfilter/x_tables 0x754c231f	xt_unregister_matches
+EXPORT_SYMBOL net/netfilter/x_tables 0xb55dc1f8	xt_find_match
+EXPORT_SYMBOL net/netfilter/x_tables 0xbc9b1f2c	xt_unregister_target
+EXPORT_SYMBOL net/netfilter/x_tables 0xc3ff5dff	xt_alloc_table_info
+EXPORT_SYMBOL net/netfilter/x_tables 0xcc683ea8	xt_find_target
+EXPORT_SYMBOL net/netfilter/x_tables 0xf9927ee3	xt_register_target
+EXPORT_SYMBOL net/phonet/phonet 0x1e482777	phonet_proto_unregister
+EXPORT_SYMBOL net/phonet/phonet 0x23c45179	pn_sock_get_port
+EXPORT_SYMBOL net/phonet/phonet 0x2ab84c51	pn_sock_hash
+EXPORT_SYMBOL net/phonet/phonet 0x6743cc8f	pn_sock_unhash
+EXPORT_SYMBOL net/phonet/phonet 0xba53ae16	phonet_header_ops
+EXPORT_SYMBOL net/phonet/phonet 0xcfd3c5ec	phonet_stream_ops
+EXPORT_SYMBOL net/phonet/phonet 0xd777aa91	pn_skb_send
+EXPORT_SYMBOL net/phonet/phonet 0xfbac3068	phonet_proto_register
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x147ca879	rxrpc_get_null_key
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x1c96ceea	rxrpc_kernel_get_abort_code
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x22fc1576	rxrpc_kernel_abort_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x471c40bb	rxrpc_kernel_is_data_last
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x58a72318	rxrpc_get_server_data_key
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x5b69e8a1	rxrpc_kernel_intercept_rx_messages
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x71a38b55	rxrpc_kernel_end_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x7b027f88	key_type_rxrpc
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x7d85326b	rxrpc_kernel_get_error_number
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x7d885d68	rxrpc_kernel_begin_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x84210197	rxrpc_kernel_reject_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x8b6f9f23	rxrpc_kernel_send_data
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x90c1f3d6	rxrpc_kernel_free_skb
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xf15de5a2	rxrpc_kernel_data_delivered
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xf968af07	rxrpc_kernel_accept_call
+EXPORT_SYMBOL net/sunrpc/sunrpc 0xe5e31c23	svc_pool_stats_open
+EXPORT_SYMBOL net/wimax/wimax 0x434908ea	wimax_rfkill
+EXPORT_SYMBOL net/wimax/wimax 0x8483b3cf	wimax_reset
+EXPORT_SYMBOL net/wireless/cfg80211 0x01d2ad1e	cfg80211_connect_result
+EXPORT_SYMBOL net/wireless/cfg80211 0x07e7ac5a	ieee80211_radiotap_iterator_init
+EXPORT_SYMBOL net/wireless/cfg80211 0x09c64fbd	ieee80211_frequency_to_channel
+EXPORT_SYMBOL net/wireless/cfg80211 0x0fcb4a66	wiphy_new
+EXPORT_SYMBOL net/wireless/cfg80211 0x105cfed8	regulatory_hint
+EXPORT_SYMBOL net/wireless/cfg80211 0x10c4ad12	cfg80211_get_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0x1879fcbd	bridge_tunnel_header
+EXPORT_SYMBOL net/wireless/cfg80211 0x196030f5	wiphy_apply_custom_regulatory
+EXPORT_SYMBOL net/wireless/cfg80211 0x1b70d358	cfg80211_send_auth_timeout
+EXPORT_SYMBOL net/wireless/cfg80211 0x2019495e	wiphy_rfkill_stop_polling
+EXPORT_SYMBOL net/wireless/cfg80211 0x266c3135	cfg80211_send_rx_assoc
+EXPORT_SYMBOL net/wireless/cfg80211 0x34778522	wiphy_register
+EXPORT_SYMBOL net/wireless/cfg80211 0x36c10253	cfg80211_get_mesh
+EXPORT_SYMBOL net/wireless/cfg80211 0x37ac8d05	ieee80211_get_response_rate
+EXPORT_SYMBOL net/wireless/cfg80211 0x469bd6bb	cfg80211_send_assoc_timeout
+EXPORT_SYMBOL net/wireless/cfg80211 0x474ac598	cfg80211_roamed
+EXPORT_SYMBOL net/wireless/cfg80211 0x47a1ce1a	wiphy_rfkill_set_hw_state
+EXPORT_SYMBOL net/wireless/cfg80211 0x48c46d5a	cfg80211_testmode_alloc_reply_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0x54f1b734	cfg80211_testmode_event
+EXPORT_SYMBOL net/wireless/cfg80211 0x554fc5c2	cfg80211_inform_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0x69b18f43	rfc1042_header
+EXPORT_SYMBOL net/wireless/cfg80211 0x70c599c0	cfg80211_send_disassoc
+EXPORT_SYMBOL net/wireless/cfg80211 0x756b4279	ieee80211_data_from_8023
+EXPORT_SYMBOL net/wireless/cfg80211 0x758ff9f8	cfg80211_disconnected
+EXPORT_SYMBOL net/wireless/cfg80211 0x77dc3cbe	cfg80211_testmode_alloc_event_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0x8c35d732	ieee80211_hdrlen
+EXPORT_SYMBOL net/wireless/cfg80211 0x90eb5e02	cfg80211_put_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0x985e8e37	cfg80211_send_deauth
+EXPORT_SYMBOL net/wireless/cfg80211 0xa2c2772d	cfg80211_classify8021d
+EXPORT_SYMBOL net/wireless/cfg80211 0xa97d2569	wiphy_unregister
+EXPORT_SYMBOL net/wireless/cfg80211 0xb056ef03	ieee80211_get_hdrlen_from_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0xb078eadd	__ieee80211_get_channel
+EXPORT_SYMBOL net/wireless/cfg80211 0xb40d2363	ieee80211_data_to_8023
+EXPORT_SYMBOL net/wireless/cfg80211 0xba60b603	cfg80211_send_rx_auth
+EXPORT_SYMBOL net/wireless/cfg80211 0xc4911338	cfg80211_testmode_reply
+EXPORT_SYMBOL net/wireless/cfg80211 0xc4e85ec5	ieee80211_radiotap_iterator_next
+EXPORT_SYMBOL net/wireless/cfg80211 0xc5215ad4	freq_reg_info
+EXPORT_SYMBOL net/wireless/cfg80211 0xc82d8177	cfg80211_unlink_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0xc931a03d	ieee80211_bss_get_ie
+EXPORT_SYMBOL net/wireless/cfg80211 0xccc291b3	ieee80211_channel_to_frequency
+EXPORT_SYMBOL net/wireless/cfg80211 0xd0a57c2b	cfg80211_inform_bss_frame
+EXPORT_SYMBOL net/wireless/cfg80211 0xe5c7ff83	cfg80211_scan_done
+EXPORT_SYMBOL net/wireless/cfg80211 0xea70c053	wiphy_rfkill_start_polling
+EXPORT_SYMBOL net/wireless/cfg80211 0xf461c380	cfg80211_michael_mic_failure
+EXPORT_SYMBOL net/wireless/cfg80211 0xf7aaf201	cfg80211_ibss_joined
+EXPORT_SYMBOL net/wireless/cfg80211 0xfc3505ae	wiphy_free
+EXPORT_SYMBOL net/wireless/lib80211 0x03997daf	lib80211_crypt_info_free
+EXPORT_SYMBOL net/wireless/lib80211 0x230f3ffb	lib80211_crypt_deinit_handler
+EXPORT_SYMBOL net/wireless/lib80211 0x2d0f99e5	print_ssid
+EXPORT_SYMBOL net/wireless/lib80211 0x41ec02ad	lib80211_crypt_deinit_entries
+EXPORT_SYMBOL net/wireless/lib80211 0x6a9caaab	lib80211_register_crypto_ops
+EXPORT_SYMBOL net/wireless/lib80211 0x72abd401	lib80211_get_crypto_ops
+EXPORT_SYMBOL net/wireless/lib80211 0x75abac3f	lib80211_crypt_quiescing
+EXPORT_SYMBOL net/wireless/lib80211 0x7c7fd4f4	lib80211_unregister_crypto_ops
+EXPORT_SYMBOL net/wireless/lib80211 0x7e4ccb20	lib80211_crypt_delayed_deinit
+EXPORT_SYMBOL net/wireless/lib80211 0xcbb5d8b1	lib80211_crypt_info_init
+EXPORT_SYMBOL sound/ac97_bus 0x28078673	ac97_bus_type
+EXPORT_SYMBOL sound/core/oss/snd-mixer-oss 0xc8685765	snd_mixer_oss_ioctl_card
+EXPORT_SYMBOL sound/core/snd 0x0212c343	snd_card_disconnect
+EXPORT_SYMBOL sound/core/snd 0x03382d9b	snd_ctl_find_id
+EXPORT_SYMBOL sound/core/snd 0x0a3a1cc0	snd_add_device_sysfs_file
+EXPORT_SYMBOL sound/core/snd 0x0b677db7	snd_card_file_add
+EXPORT_SYMBOL sound/core/snd 0x0ee7771d	snd_device_free
+EXPORT_SYMBOL sound/core/snd 0x198788b4	snd_lookup_oss_minor_data
+EXPORT_SYMBOL sound/core/snd 0x24344948	snd_device_register
+EXPORT_SYMBOL sound/core/snd 0x24a94b26	snd_info_get_line
+EXPORT_SYMBOL sound/core/snd 0x2609f6e2	snd_ctl_boolean_mono_info
+EXPORT_SYMBOL sound/core/snd 0x27f32239	snd_jack_report
+EXPORT_SYMBOL sound/core/snd 0x3717634a	snd_register_oss_device
+EXPORT_SYMBOL sound/core/snd 0x37bfcc65	snd_ctl_unregister_ioctl
+EXPORT_SYMBOL sound/core/snd 0x393c6e68	snd_ctl_make_virtual_master
+EXPORT_SYMBOL sound/core/snd 0x3971b4df	snd_ecards_limit
+EXPORT_SYMBOL sound/core/snd 0x41bfc4da	snd_card_register
+EXPORT_SYMBOL sound/core/snd 0x4719764f	snd_card_free_when_closed
+EXPORT_SYMBOL sound/core/snd 0x47b8b497	snd_jack_set_parent
+EXPORT_SYMBOL sound/core/snd 0x4a3ea5c0	snd_request_card
+EXPORT_SYMBOL sound/core/snd 0x51c88a6e	snd_register_device_for_dev
+EXPORT_SYMBOL sound/core/snd 0x58135c45	snd_ctl_boolean_stereo_info
+EXPORT_SYMBOL sound/core/snd 0x59b278a0	snd_info_free_entry
+EXPORT_SYMBOL sound/core/snd 0x5bb4e85a	snd_ctl_rename_id
+EXPORT_SYMBOL sound/core/snd 0x5be190df	snd_pci_quirk_lookup
+EXPORT_SYMBOL sound/core/snd 0x5d46d7ec	snd_device_new
+EXPORT_SYMBOL sound/core/snd 0x602c96f0	copy_to_user_fromio
+EXPORT_SYMBOL sound/core/snd 0x62171b29	snd_component_add
+EXPORT_SYMBOL sound/core/snd 0x647a9181	snd_card_set_id
+EXPORT_SYMBOL sound/core/snd 0x64dda487	snd_ctl_remove
+EXPORT_SYMBOL sound/core/snd 0x6c00e717	snd_card_file_remove
+EXPORT_SYMBOL sound/core/snd 0x74cad64d	_snd_ctl_add_slave
+EXPORT_SYMBOL sound/core/snd 0x776ee022	snd_seq_root
+EXPORT_SYMBOL sound/core/snd 0x804931c5	snd_info_create_card_entry
+EXPORT_SYMBOL sound/core/snd 0x865e53c2	snd_ctl_remove_id
+EXPORT_SYMBOL sound/core/snd 0x8df3789f	snd_oss_info_register
+EXPORT_SYMBOL sound/core/snd 0x8f595b11	snd_major
+EXPORT_SYMBOL sound/core/snd 0x92ee916a	snd_ctl_add
+EXPORT_SYMBOL sound/core/snd 0x9669e348	snd_unregister_device
+EXPORT_SYMBOL sound/core/snd 0x96a469f4	snd_ctl_free_one
+EXPORT_SYMBOL sound/core/snd 0x9a7937f1	snd_ctl_find_numid
+EXPORT_SYMBOL sound/core/snd 0x9e6d79f8	snd_info_get_str
+EXPORT_SYMBOL sound/core/snd 0xa2effb61	snd_ctl_register_ioctl
+EXPORT_SYMBOL sound/core/snd 0xa912e5c3	snd_info_create_module_entry
+EXPORT_SYMBOL sound/core/snd 0xabeba497	snd_unregister_oss_device
+EXPORT_SYMBOL sound/core/snd 0xb2e5ae4a	snd_lookup_minor_data
+EXPORT_SYMBOL sound/core/snd 0xb5f4eaf9	snd_ctl_new1
+EXPORT_SYMBOL sound/core/snd 0xc487ed3e	snd_card_proc_new
+EXPORT_SYMBOL sound/core/snd 0xcb9adc8a	snd_mixer_oss_notify_callback
+EXPORT_SYMBOL sound/core/snd 0xcbb1a51e	snd_card_create
+EXPORT_SYMBOL sound/core/snd 0xce3ca308	copy_from_user_toio
+EXPORT_SYMBOL sound/core/snd 0xd1157735	release_and_free_resource
+EXPORT_SYMBOL sound/core/snd 0xd2366314	snd_jack_new
+EXPORT_SYMBOL sound/core/snd 0xd3df3061	snd_card_free
+EXPORT_SYMBOL sound/core/snd 0xd651e8a7	snd_cards
+EXPORT_SYMBOL sound/core/snd 0xd72cd7ae	snd_ctl_notify
+EXPORT_SYMBOL sound/core/snd 0xd9a9e8a8	snd_info_register
+EXPORT_SYMBOL sound/core/snd 0xe20c9214	snd_iprintf
+EXPORT_SYMBOL sound/core/snd 0xfa63eb25	snd_power_wait
+EXPORT_SYMBOL sound/core/snd-hwdep 0xfc6b833a	snd_hwdep_new
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x3b91f3af	snd_free_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x6bd150bc	snd_dma_free_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x960b772f	snd_dma_alloc_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xade88e76	snd_malloc_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xb5368f4c	snd_dma_get_reserved_buf
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xcd9d574c	snd_dma_reserve_buf
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xe19b9663	snd_dma_alloc_pages_fallback
+EXPORT_SYMBOL sound/core/snd-pcm 0x0283dfe3	_snd_pcm_hw_params_any
+EXPORT_SYMBOL sound/core/snd-pcm 0x04cda566	snd_interval_refine
+EXPORT_SYMBOL sound/core/snd-pcm 0x1d027e4b	snd_pcm_format_signed
+EXPORT_SYMBOL sound/core/snd-pcm 0x2127276c	snd_pcm_hw_constraint_pow2
+EXPORT_SYMBOL sound/core/snd-pcm 0x214418bd	snd_pcm_lib_preallocate_pages_for_all
+EXPORT_SYMBOL sound/core/snd-pcm 0x2479cb54	snd_pcm_lib_read
+EXPORT_SYMBOL sound/core/snd-pcm 0x2f59803a	snd_pcm_new_stream
+EXPORT_SYMBOL sound/core/snd-pcm 0x36ba5012	snd_pcm_lib_preallocate_free_for_all
+EXPORT_SYMBOL sound/core/snd-pcm 0x3796bdcc	snd_pcm_format_little_endian
+EXPORT_SYMBOL sound/core/snd-pcm 0x395e287f	snd_pcm_link_rwlock
+EXPORT_SYMBOL sound/core/snd-pcm 0x39bf9301	_snd_pcm_hw_param_setempty
+EXPORT_SYMBOL sound/core/snd-pcm 0x3cee44ab	snd_pcm_mmap_data
+EXPORT_SYMBOL sound/core/snd-pcm 0x483a2765	snd_pcm_hw_param_first
+EXPORT_SYMBOL sound/core/snd-pcm 0x4d9b6d35	snd_pcm_format_size
+EXPORT_SYMBOL sound/core/snd-pcm 0x4f816e9b	snd_pcm_format_big_endian
+EXPORT_SYMBOL sound/core/snd-pcm 0x511d4e69	snd_pcm_lib_readv
+EXPORT_SYMBOL sound/core/snd-pcm 0x52e3e4a5	snd_pcm_hw_param_value
+EXPORT_SYMBOL sound/core/snd-pcm 0x57f0d7d3	snd_pcm_hw_constraint_minmax
+EXPORT_SYMBOL sound/core/snd-pcm 0x58997429	snd_pcm_lib_free_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0x5e7f4920	snd_pcm_format_set_silence
+EXPORT_SYMBOL sound/core/snd-pcm 0x5f346e40	snd_pcm_release_substream
+EXPORT_SYMBOL sound/core/snd-pcm 0x650f8603	snd_pcm_format_silence_64
+EXPORT_SYMBOL sound/core/snd-pcm 0x68a24153	snd_pcm_format_physical_width
+EXPORT_SYMBOL sound/core/snd-pcm 0x69d8f3e1	snd_pcm_limit_hw_rates
+EXPORT_SYMBOL sound/core/snd-pcm 0x6ef8fcd8	snd_pcm_format_linear
+EXPORT_SYMBOL sound/core/snd-pcm 0x7ad22213	snd_pcm_suspend
+EXPORT_SYMBOL sound/core/snd-pcm 0x7f3ada95	snd_pcm_lib_malloc_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0x7fdc2135	snd_pcm_hw_rule_add
+EXPORT_SYMBOL sound/core/snd-pcm 0x842fbc7b	snd_pcm_set_sync
+EXPORT_SYMBOL sound/core/snd-pcm 0x869c74f1	snd_pcm_hw_constraint_step
+EXPORT_SYMBOL sound/core/snd-pcm 0x8e933db9	snd_pcm_notify
+EXPORT_SYMBOL sound/core/snd-pcm 0x90fcaad7	snd_pcm_hw_constraint_list
+EXPORT_SYMBOL sound/core/snd-pcm 0x943dc315	snd_pcm_lib_preallocate_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0x99338f81	snd_pcm_hw_constraint_ratnums
+EXPORT_SYMBOL sound/core/snd-pcm 0x99a81eb5	snd_pcm_hw_constraint_ratdens
+EXPORT_SYMBOL sound/core/snd-pcm 0x9f826591	snd_pcm_suspend_all
+EXPORT_SYMBOL sound/core/snd-pcm 0xa154986b	snd_pcm_new
+EXPORT_SYMBOL sound/core/snd-pcm 0xa5a1dbb1	snd_pcm_stop
+EXPORT_SYMBOL sound/core/snd-pcm 0xa61aa028	snd_pcm_format_unsigned
+EXPORT_SYMBOL sound/core/snd-pcm 0xa723a93f	snd_pcm_set_ops
+EXPORT_SYMBOL sound/core/snd-pcm 0xaafc0ed0	snd_pcm_hw_refine
+EXPORT_SYMBOL sound/core/snd-pcm 0xb076c0c5	snd_pcm_lib_write
+EXPORT_SYMBOL sound/core/snd-pcm 0xb93728f5	snd_pcm_period_elapsed
+EXPORT_SYMBOL sound/core/snd-pcm 0xb9638db4	snd_pcm_rate_to_rate_bit
+EXPORT_SYMBOL sound/core/snd-pcm 0xc2f8a2de	snd_pcm_lib_writev
+EXPORT_SYMBOL sound/core/snd-pcm 0xc89953bf	snd_pcm_open_substream
+EXPORT_SYMBOL sound/core/snd-pcm 0xd0b9b8b8	snd_interval_list
+EXPORT_SYMBOL sound/core/snd-pcm 0xd2f92a50	snd_pcm_lib_ioctl
+EXPORT_SYMBOL sound/core/snd-pcm 0xdcd84f61	snd_pcm_hw_constraint_integer
+EXPORT_SYMBOL sound/core/snd-pcm 0xe56a9336	snd_pcm_format_width
+EXPORT_SYMBOL sound/core/snd-pcm 0xe79a3f25	snd_pcm_hw_constraint_msbits
+EXPORT_SYMBOL sound/core/snd-pcm 0xf3797152	snd_interval_ratnum
+EXPORT_SYMBOL sound/core/snd-pcm 0xf611151e	snd_pcm_kernel_ioctl
+EXPORT_SYMBOL sound/core/snd-pcm 0xf6b8c9fc	snd_pcm_hw_param_last
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x087b9045	snd_rawmidi_new
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x2939b285	snd_rawmidi_kernel_release
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x2eef35b8	snd_rawmidi_kernel_write
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x35ac2404	snd_rawmidi_transmit_peek
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x35ba8045	snd_rawmidi_drop_output
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x36e67bc9	snd_rawmidi_input_params
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x4258985f	snd_rawmidi_drain_output
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x5d96890f	snd_rawmidi_transmit_ack
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x793aada4	snd_rawmidi_transmit
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x7d33d1d4	snd_rawmidi_output_params
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x7d361a3c	snd_rawmidi_kernel_read
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xabbcd154	snd_rawmidi_drain_input
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xacb88f0d	snd_rawmidi_set_ops
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xb3e8f855	snd_rawmidi_kernel_open
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xbde14463	snd_rawmidi_info_select
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xc3371ec2	snd_rawmidi_receive
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xe1be9b79	snd_rawmidi_transmit_empty
+EXPORT_SYMBOL sound/core/snd-timer 0x0e8bfbc0	snd_timer_new
+EXPORT_SYMBOL sound/core/snd-timer 0x320ff9c4	snd_timer_pause
+EXPORT_SYMBOL sound/core/snd-timer 0x344a276b	snd_timer_stop
+EXPORT_SYMBOL sound/core/snd-timer 0x5a38aba4	snd_timer_global_new
+EXPORT_SYMBOL sound/core/snd-timer 0x8907753a	snd_timer_continue
+EXPORT_SYMBOL sound/core/snd-timer 0x99d82c5a	snd_timer_resolution
+EXPORT_SYMBOL sound/core/snd-timer 0xa5548268	snd_timer_interrupt
+EXPORT_SYMBOL sound/core/snd-timer 0xb9aa842b	snd_timer_global_register
+EXPORT_SYMBOL sound/core/snd-timer 0xbcf87c6e	snd_timer_open
+EXPORT_SYMBOL sound/core/snd-timer 0xdbf19f1a	snd_timer_global_free
+EXPORT_SYMBOL sound/core/snd-timer 0xdf1c789e	snd_timer_start
+EXPORT_SYMBOL sound/core/snd-timer 0xeb204c39	snd_timer_notify
+EXPORT_SYMBOL sound/core/snd-timer 0xf49b1a7f	snd_timer_close
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x4bbb7f27	snd_mpu401_uart_interrupt_tx
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x6d4f158f	snd_mpu401_uart_new
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xc43a3940	snd_mpu401_uart_interrupt
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x05060a19	snd_opl3_regmap
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x1368502f	snd_opl3_init
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x5f1cfd67	snd_opl3_hwdep_new
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x6d1d400e	snd_opl3_interrupt
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xa90046c2	snd_opl3_reset
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xe9925365	snd_opl3_new
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xf6038853	snd_opl3_create
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xfd6681f0	snd_opl3_timer_new
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x43353334	snd_vx_check_reg_bit
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x48edc5fa	snd_vx_suspend
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x6053c012	snd_vx_free_firmware
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x895985df	snd_vx_resume
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x94453ca0	snd_vx_load_boot_image
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x99b88ede	snd_vx_irq_handler
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xa14d2ca6	snd_vx_dsp_boot
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xbd5cad9d	snd_vx_dsp_load
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xcf0ebabf	snd_vx_create
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xdc85f843	snd_vx_setup_firmware
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x1f87bf33	snd_ak4114_reg_write
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x42d18038	snd_ak4114_check_rate_and_errors
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x437a71d2	snd_ak4114_reinit
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xa04d984b	snd_ak4114_build
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xe5a4ad00	snd_ak4114_create
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xf9495630	snd_ak4114_external_rate
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x502924e3	snd_akm4xxx_build_controls
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x61fc9602	snd_akm4xxx_reset
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xac39f96e	snd_akm4xxx_write
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xdc0a4a48	snd_akm4xxx_init
+EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0x2ffc79a9	snd_pt2258_build_controls
+EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0x53f7284f	snd_pt2258_reset
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x81dfe6f5	snd_cs8427_iec958_active
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0xa98ebe48	snd_cs8427_iec958_pcm
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0xbe4880cd	snd_cs8427_reg_write
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0xc2218e9a	snd_cs8427_create
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0xc445e77a	snd_cs8427_iec958_build
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x4e46f536	snd_i2c_device_free
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x4f0aeb09	snd_i2c_readbytes
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x7c1af134	snd_i2c_bus_create
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x7c8a8911	snd_i2c_device_create
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x8ac6e056	snd_i2c_sendbytes
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x950e7da5	snd_i2c_probeaddr
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x1e6cef5f	snd_ac97_update
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x28669647	snd_ac97_pcm_close
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x35791c52	snd_ac97_resume
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x409d8e7a	snd_ac97_set_rate
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x6131c5a9	snd_ac97_pcm_open
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x66347cac	snd_ac97_mixer
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x68f928cf	snd_ac97_write
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x7ae60c32	snd_ac97_read
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x7e162141	snd_ac97_write_cache
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x8f4152e3	snd_ac97_tune_hardware
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xbec2ea5d	snd_ac97_suspend
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xc0e12b34	snd_ac97_bus
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xd2973f92	snd_ac97_update_power
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xd3402429	snd_ac97_pcm_assign
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xe6bf7564	snd_ac97_update_bits
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xe95ceb5b	snd_ac97_pcm_double_rate_rules
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xea69d393	snd_ac97_get_short_name
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x13e1eb20	snd_emu10k1_voice_free
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x1c651944	snd_emu10k1_synth_copy_from_user
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x6083abc4	snd_emu10k1_voice_alloc
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x60a64bb4	snd_emu10k1_synth_free
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x74170ea7	snd_emu10k1_synth_alloc
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x8c6c2454	snd_emu10k1_ptr_write
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xa2414aa2	snd_emu10k1_synth_bzero
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xe56028f7	snd_emu10k1_ptr_read
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xec446d8c	snd_emu10k1_memblk_map
+EXPORT_SYMBOL sound/pci/hda/snd-hda-codec 0xe1e49c4e	snd_hda_parse_generic_codec
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x0b19cbe7	snd_ice1712_akm4xxx_init
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x1a51bd88	snd_ice1712_akm4xxx_free
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x4be98a28	snd_ice1712_akm4xxx_build_controls
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x1688e182	oxygen_write8_masked
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x25af839a	oxygen_pci_probe
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x2c1f8b99	oxygen_write32
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x3a0eea88	oxygen_write_ac97_masked
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x4c1fb87f	oxygen_reset_uart
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x64e683e1	oxygen_write_i2c
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x65ce12b4	oxygen_write_uart
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x755bf386	oxygen_read_ac97
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x7ec013b1	oxygen_write_spi
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x98b9a3af	oxygen_pci_resume
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0x9de9eb7a	oxygen_pci_suspend
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xa09c23a2	oxygen_read8
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xb61e1ea3	oxygen_write16_masked
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xc1d54c0b	oxygen_read16
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xcfb46a2d	oxygen_write16
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xd6f25618	oxygen_read32
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xdef4e934	oxygen_write32_masked
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xf4a7f91b	oxygen_write8
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xf930eb45	oxygen_write_ac97
+EXPORT_SYMBOL sound/pci/oxygen/snd-oxygen-lib 0xfb3e0136	oxygen_pci_remove
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x142bb6cd	snd_trident_write_voice_regs
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x453ae941	snd_trident_stop_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x8bd5e355	snd_trident_free_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0xc6b7fb3b	snd_trident_alloc_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0xefdc091c	snd_trident_start_voice
+EXPORT_SYMBOL sound/soc/codecs/snd-soc-uda134x 0x7dd4fe5e	uda134x_dai
+EXPORT_SYMBOL sound/sound_firmware 0x39e3dd23	mod_firmware_load
+EXPORT_SYMBOL sound/soundcore 0x0cfed660	register_sound_special_device
+EXPORT_SYMBOL sound/soundcore 0x1bb6b8a7	register_sound_mixer
+EXPORT_SYMBOL sound/soundcore 0x3309f2ad	register_sound_special
+EXPORT_SYMBOL sound/soundcore 0x786a6c13	register_sound_midi
+EXPORT_SYMBOL sound/soundcore 0x7afc9d8a	unregister_sound_mixer
+EXPORT_SYMBOL sound/soundcore 0x8cf57ebc	sound_class
+EXPORT_SYMBOL sound/soundcore 0x99c95fa5	unregister_sound_special
+EXPORT_SYMBOL sound/soundcore 0x9cb463bb	register_sound_dsp
+EXPORT_SYMBOL sound/soundcore 0xcd083b10	unregister_sound_dsp
+EXPORT_SYMBOL sound/soundcore 0xfdab6de3	unregister_sound_midi
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x01e234f2	__snd_util_mem_alloc
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x0895e1a9	__snd_util_mem_free
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x15cfaea4	snd_util_memhdr_new
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x2ba29873	snd_util_mem_avail
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x45c2abb1	snd_util_memhdr_free
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x5d2130f4	snd_util_mem_alloc
+EXPORT_SYMBOL sound/synth/snd-util-mem 0xab810f2e	__snd_util_memblk_new
+EXPORT_SYMBOL sound/synth/snd-util-mem 0xb2676a58	snd_util_mem_free
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0x16756dc0	snd_usbmidi_input_start
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0x1e782fb0	snd_usb_create_midi_interface
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0x63343b1d	snd_usbmidi_input_stop
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0xd9d2bb03	snd_usbmidi_disconnect
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x0e255b70	dm_mem_cache_client_create
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x4263f6d6	dm_mem_cache_client_destroy
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x68f455c9	dm_mem_cache_grow
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x920a7a41	dm_message_parse
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0x92734834	dm_mem_cache_shrink
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0xa1379dfb	dm_mem_cache_free
+EXPORT_SYMBOL ubuntu/dm-raid4-5/dm-raid45 0xf68ebb23	dm_mem_cache_alloc
+EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x04dca738	lirc_unregister_driver
+EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x28dfea68	lirc_register_driver
+EXPORT_SYMBOL ubuntu/lirc/lirc_dev/lirc_dev 0x5231d45e	lirc_get_pdata
+EXPORT_SYMBOL vmlinux 0x00000000	fp_printk
+EXPORT_SYMBOL vmlinux 0x00000000	fp_send_sig
+EXPORT_SYMBOL vmlinux 0x00000000	kern_fp_enter
+EXPORT_SYMBOL vmlinux 0x00000000	per_cpu__softirq_work_list
+EXPORT_SYMBOL vmlinux 0x000cdf3a	udplite_prot
+EXPORT_SYMBOL vmlinux 0x000eec0d	init_task
+EXPORT_SYMBOL vmlinux 0x00164b27	i2c_del_adapter
+EXPORT_SYMBOL vmlinux 0x001f2bcc	ipv6_push_nfrag_opts
+EXPORT_SYMBOL vmlinux 0x0044116f	sk_send_sigurg
+EXPORT_SYMBOL vmlinux 0x0045e321	phy_ethtool_gset
+EXPORT_SYMBOL vmlinux 0x004a143e	clear_bdi_congested
+EXPORT_SYMBOL vmlinux 0x005c9113	ps2_command
+EXPORT_SYMBOL vmlinux 0x006d6859	xfrm_policy_bysel_ctx
+EXPORT_SYMBOL vmlinux 0x00801678	flush_scheduled_work
+EXPORT_SYMBOL vmlinux 0x00b177ec	splice_from_pipe_next
+EXPORT_SYMBOL vmlinux 0x00c4dc87	timecounter_init
+EXPORT_SYMBOL vmlinux 0x00e8097b	csum_partial_copy_fromiovecend
+EXPORT_SYMBOL vmlinux 0x00eef49e	__strnlen_user
+EXPORT_SYMBOL vmlinux 0x00ff08fe	sock_map_fd
+EXPORT_SYMBOL vmlinux 0x01000e51	schedule
+EXPORT_SYMBOL vmlinux 0x01139ffc	max_mapnr
+EXPORT_SYMBOL vmlinux 0x01482235	pci_remove_behind_bridge
+EXPORT_SYMBOL vmlinux 0x01591f61	____pagevec_lru_add
+EXPORT_SYMBOL vmlinux 0x0160ec06	dquot_alloc_inode
+EXPORT_SYMBOL vmlinux 0x01902adf	netpoll_trap
+EXPORT_SYMBOL vmlinux 0x01a4aab6	set_irq_chip_data
+EXPORT_SYMBOL vmlinux 0x01a710fe	fb_firmware_edid
+EXPORT_SYMBOL vmlinux 0x01e05a68	load_nls
+EXPORT_SYMBOL vmlinux 0x0201c9f5	skb_queue_head
+EXPORT_SYMBOL vmlinux 0x020627ac	vfs_statfs
+EXPORT_SYMBOL vmlinux 0x02124474	ip_send_check
+EXPORT_SYMBOL vmlinux 0x021668e0	skb_copy_expand
+EXPORT_SYMBOL vmlinux 0x02196324	__aeabi_idiv
+EXPORT_SYMBOL vmlinux 0x0222461d	do_splice_to
+EXPORT_SYMBOL vmlinux 0x0228dc70	netlink_kernel_create
+EXPORT_SYMBOL vmlinux 0x024594ba	dm_kcopyd_client_create
+EXPORT_SYMBOL vmlinux 0x02649054	security_sock_rcv_skb
+EXPORT_SYMBOL vmlinux 0x027d6218	journal_blocks_per_page
+EXPORT_SYMBOL vmlinux 0x0298c28a	jbd2_log_start_commit
+EXPORT_SYMBOL vmlinux 0x02a6ce5a	crc16_table
+EXPORT_SYMBOL vmlinux 0x02abccc3	dquot_commit
+EXPORT_SYMBOL vmlinux 0x02ac9c53	__elv_add_request
+EXPORT_SYMBOL vmlinux 0x02c8317c	bio_copy_user
+EXPORT_SYMBOL vmlinux 0x02eb24ef	write_inode_now
+EXPORT_SYMBOL vmlinux 0x02ee26c1	free_pages_exact
+EXPORT_SYMBOL vmlinux 0x031487b0	dm_get_mapinfo
+EXPORT_SYMBOL vmlinux 0x0334da4e	scsi_command_size_tbl
+EXPORT_SYMBOL vmlinux 0x0337973e	pid_task
+EXPORT_SYMBOL vmlinux 0x0350e2f4	up_read
+EXPORT_SYMBOL vmlinux 0x036c3ee6	bio_copy_kern
+EXPORT_SYMBOL vmlinux 0x037a0cba	kfree
+EXPORT_SYMBOL vmlinux 0x039f9bc7	register_sysctl_paths
+EXPORT_SYMBOL vmlinux 0x03a54d97	dma_mark_declared_memory_occupied
+EXPORT_SYMBOL vmlinux 0x03ad715d	dev_getfirstbyhwtype
+EXPORT_SYMBOL vmlinux 0x03c06156	bitmap_fold
+EXPORT_SYMBOL vmlinux 0x03c86379	tty_unregister_driver
+EXPORT_SYMBOL vmlinux 0x03c87e10	genphy_resume
+EXPORT_SYMBOL vmlinux 0x03fa11a2	blk_queue_alignment_offset
+EXPORT_SYMBOL vmlinux 0x03fd2571	vm_unmap_ram
+EXPORT_SYMBOL vmlinux 0x0400429e	set_irq_chip
+EXPORT_SYMBOL vmlinux 0x0400b644	ilookup5
+EXPORT_SYMBOL vmlinux 0x0402aa08	inet_stream_ops
+EXPORT_SYMBOL vmlinux 0x0422fe4a	inet_csk_timer_bug_msg
+EXPORT_SYMBOL vmlinux 0x043a77a9	netif_receive_skb
+EXPORT_SYMBOL vmlinux 0x043b8483	__kfifo_get
+EXPORT_SYMBOL vmlinux 0x0446e70f	vfs_symlink
+EXPORT_SYMBOL vmlinux 0x045e795c	amba_request_regions
+EXPORT_SYMBOL vmlinux 0x0487f831	fb_find_best_display
+EXPORT_SYMBOL vmlinux 0x04dd2148	sock_create
+EXPORT_SYMBOL vmlinux 0x04ed04f7	blk_queue_dma_alignment
+EXPORT_SYMBOL vmlinux 0x04ff5035	dm_register_target
+EXPORT_SYMBOL vmlinux 0x051d0a92	ip6_frag_init
+EXPORT_SYMBOL vmlinux 0x051e084e	i2c_smbus_write_byte_data
+EXPORT_SYMBOL vmlinux 0x0529a34a	xfrm_alloc_spi
+EXPORT_SYMBOL vmlinux 0x054124b6	jbd2_journal_init_inode
+EXPORT_SYMBOL vmlinux 0x0554b572	fb_find_mode
+EXPORT_SYMBOL vmlinux 0x056584a9	pci_assign_resource
+EXPORT_SYMBOL vmlinux 0x057ce975	hex_dump_to_buffer
+EXPORT_SYMBOL vmlinux 0x05a07305	drop_super
+EXPORT_SYMBOL vmlinux 0x05d6674f	splice_from_pipe_end
+EXPORT_SYMBOL vmlinux 0x05ebfbbc	bio_integrity_get_tag
+EXPORT_SYMBOL vmlinux 0x05f885b0	xfrm_state_flush
+EXPORT_SYMBOL vmlinux 0x06090de7	__sg_free_table
+EXPORT_SYMBOL vmlinux 0x0609a075	pci_clear_master
+EXPORT_SYMBOL vmlinux 0x061651be	strcat
+EXPORT_SYMBOL vmlinux 0x06184902	ilookup5_nowait
+EXPORT_SYMBOL vmlinux 0x0618e633	dump_fpu
+EXPORT_SYMBOL vmlinux 0x061efd7e	tty_chars_in_buffer
+EXPORT_SYMBOL vmlinux 0x06239bf2	ps2_handle_response
+EXPORT_SYMBOL vmlinux 0x062aba95	mempool_free
+EXPORT_SYMBOL vmlinux 0x062bc91e	__vlan_hwaccel_rx
+EXPORT_SYMBOL vmlinux 0x064938f9	sock_i_ino
+EXPORT_SYMBOL vmlinux 0x064e3439	kobject_set_name
+EXPORT_SYMBOL vmlinux 0x0654c3cf	unlock_buffer
+EXPORT_SYMBOL vmlinux 0x066d0797	sock_wfree
+EXPORT_SYMBOL vmlinux 0x067a9b62	mdiobus_write
+EXPORT_SYMBOL vmlinux 0x067d8d35	security_release_secctx
+EXPORT_SYMBOL vmlinux 0x06b60306	tty_throttle
+EXPORT_SYMBOL vmlinux 0x06beea04	pneigh_lookup
+EXPORT_SYMBOL vmlinux 0x06d728b1	tcp_parse_md5sig_option
+EXPORT_SYMBOL vmlinux 0x06d8bae1	idr_get_new
+EXPORT_SYMBOL vmlinux 0x06e49a48	arp_tbl
+EXPORT_SYMBOL vmlinux 0x06f2d33f	journal_init_dev
+EXPORT_SYMBOL vmlinux 0x06fe3b14	default_grn
+EXPORT_SYMBOL vmlinux 0x0747daf4	pci_bus_read_config_byte
+EXPORT_SYMBOL vmlinux 0x075727d6	mmc_host_disable
+EXPORT_SYMBOL vmlinux 0x075a43b1	rfkill_set_states
+EXPORT_SYMBOL vmlinux 0x076a5184	inode_sub_bytes
+EXPORT_SYMBOL vmlinux 0x0772eabb	neigh_parms_release
+EXPORT_SYMBOL vmlinux 0x07818cb9	kernel_bind
+EXPORT_SYMBOL vmlinux 0x0799aca4	local_bh_enable
+EXPORT_SYMBOL vmlinux 0x0799c50a	param_set_ulong
+EXPORT_SYMBOL vmlinux 0x07a890c8	fb_alloc_cmap
+EXPORT_SYMBOL vmlinux 0x07ab8c3e	__xfrm_lookup
+EXPORT_SYMBOL vmlinux 0x07cc4a5d	printk_timed_ratelimit
+EXPORT_SYMBOL vmlinux 0x07d9b783	scsi_nl_send_vendor_msg
+EXPORT_SYMBOL vmlinux 0x07f5e8e1	try_to_release_page
+EXPORT_SYMBOL vmlinux 0x07fb6792	vfs_get_dqblk
+EXPORT_SYMBOL vmlinux 0x0823e353	netif_device_detach
+EXPORT_SYMBOL vmlinux 0x082b8f7f	pci_enable_device
+EXPORT_SYMBOL vmlinux 0x082c3213	pci_root_buses
+EXPORT_SYMBOL vmlinux 0x0833de84	do_sync_write
+EXPORT_SYMBOL vmlinux 0x0862a895	fb_set_var
+EXPORT_SYMBOL vmlinux 0x08728140	malloc_sizes
+EXPORT_SYMBOL vmlinux 0x08773744	generic_read_dir
+EXPORT_SYMBOL vmlinux 0x087a21fe	mnt_pin
+EXPORT_SYMBOL vmlinux 0x08b35093	fb_show_logo
+EXPORT_SYMBOL vmlinux 0x08d174b5	vfs_read
+EXPORT_SYMBOL vmlinux 0x08d66a3a	warn_slowpath_fmt
+EXPORT_SYMBOL vmlinux 0x0908a70c	block_prepare_write
+EXPORT_SYMBOL vmlinux 0x090e0471	vfs_mknod
+EXPORT_SYMBOL vmlinux 0x09144253	sysctl_string
+EXPORT_SYMBOL vmlinux 0x092b007a	sleep_on_timeout
+EXPORT_SYMBOL vmlinux 0x0948cde9	num_physpages
+EXPORT_SYMBOL vmlinux 0x095573b2	md_set_array_sectors
+EXPORT_SYMBOL vmlinux 0x095bb830	down_interruptible
+EXPORT_SYMBOL vmlinux 0x0989b56c	tcp_tso_segment
+EXPORT_SYMBOL vmlinux 0x098b71c6	fb_dealloc_cmap
+EXPORT_SYMBOL vmlinux 0x09b798f9	init_special_inode
+EXPORT_SYMBOL vmlinux 0x09b96c8c	remove_proc_entry
+EXPORT_SYMBOL vmlinux 0x09ba8377	scsi_reset_provider
+EXPORT_SYMBOL vmlinux 0x09c55cec	schedule_timeout_interruptible
+EXPORT_SYMBOL vmlinux 0x09c8eb55	font_vga_8x16
+EXPORT_SYMBOL vmlinux 0x09e08173	d_validate
+EXPORT_SYMBOL vmlinux 0x0a09b7a7	tcp_enter_memory_pressure
+EXPORT_SYMBOL vmlinux 0x0a1bebc5	kernel_execve
+EXPORT_SYMBOL vmlinux 0x0a1f204a	dquot_claim_space
+EXPORT_SYMBOL vmlinux 0x0a2487e0	unblock_all_signals
+EXPORT_SYMBOL vmlinux 0x0a3131f6	strnchr
+EXPORT_SYMBOL vmlinux 0x0a3e9673	nf_ip_checksum
+EXPORT_SYMBOL vmlinux 0x0a460b6e	tcp_gro_complete
+EXPORT_SYMBOL vmlinux 0x0a4747ff	allocate_resource
+EXPORT_SYMBOL vmlinux 0x0a4d2f3a	dev_set_drvdata
+EXPORT_SYMBOL vmlinux 0x0a59d116	mpage_readpage
+EXPORT_SYMBOL vmlinux 0x0a6eb641	mmc_cleanup_queue
+EXPORT_SYMBOL vmlinux 0x0a7859ab	inode_claim_rsv_space
+EXPORT_SYMBOL vmlinux 0x0a90dc50	do_SAK
+EXPORT_SYMBOL vmlinux 0x0a93e936	audit_log_end
+EXPORT_SYMBOL vmlinux 0x0aa13d05	__raw_readsw
+EXPORT_SYMBOL vmlinux 0x0aacbac5	__blk_end_request
+EXPORT_SYMBOL vmlinux 0x0ac9b683	vlan_dev_real_dev
+EXPORT_SYMBOL vmlinux 0x0acb1a3c	__bitmap_shift_right
+EXPORT_SYMBOL vmlinux 0x0addeeef	scsi_is_target_device
+EXPORT_SYMBOL vmlinux 0x0aee44c1	ethtool_op_set_flags
+EXPORT_SYMBOL vmlinux 0x0af72b6d	skb_queue_purge
+EXPORT_SYMBOL vmlinux 0x0b0d888b	icmpv6_err_convert
+EXPORT_SYMBOL vmlinux 0x0b147935	jbd2_journal_set_triggers
+EXPORT_SYMBOL vmlinux 0x0b199534	blk_integrity_unregister
+EXPORT_SYMBOL vmlinux 0x0b1beb31	vmalloc_32_user
+EXPORT_SYMBOL vmlinux 0x0b1f81b1	inet_del_protocol
+EXPORT_SYMBOL vmlinux 0x0b264409	qdisc_destroy
+EXPORT_SYMBOL vmlinux 0x0b3a9a0e	tcf_unregister_action
+EXPORT_SYMBOL vmlinux 0x0b5f2d2c	sg_next
+EXPORT_SYMBOL vmlinux 0x0b742fd7	simple_strtol
+EXPORT_SYMBOL vmlinux 0x0b878f64	mddev_congested
+EXPORT_SYMBOL vmlinux 0x0b8969ef	iw_handler_get_thrspy
+EXPORT_SYMBOL vmlinux 0x0bbba273	jbd2_journal_force_commit_nested
+EXPORT_SYMBOL vmlinux 0x0bdaf780	inode_init_once
+EXPORT_SYMBOL vmlinux 0x0bf46b92	tcp_parse_options
+EXPORT_SYMBOL vmlinux 0x0c03132a	tty_insert_flip_string
+EXPORT_SYMBOL vmlinux 0x0c1a0396	ipv6_skip_exthdr
+EXPORT_SYMBOL vmlinux 0x0c234804	skb_add_rx_frag
+EXPORT_SYMBOL vmlinux 0x0c3a70f2	simple_rename
+EXPORT_SYMBOL vmlinux 0x0c65e73c	scsi_normalize_sense
+EXPORT_SYMBOL vmlinux 0x0c76e015	serio_close
+EXPORT_SYMBOL vmlinux 0x0c81f1aa	sk_receive_skb
+EXPORT_SYMBOL vmlinux 0x0c8c9e99	scsi_show_extd_sense
+EXPORT_SYMBOL vmlinux 0x0ca12ca0	nf_log_register
+EXPORT_SYMBOL vmlinux 0x0cae232b	utf16s_to_utf8s
+EXPORT_SYMBOL vmlinux 0x0cd150c7	pcix_set_mmrbc
+EXPORT_SYMBOL vmlinux 0x0cd8d82c	thaw_process
+EXPORT_SYMBOL vmlinux 0x0cdbdc00	fb_get_mode
+EXPORT_SYMBOL vmlinux 0x0ce0781a	jbd2_journal_forget
+EXPORT_SYMBOL vmlinux 0x0cfbc1a3	locks_remove_posix
+EXPORT_SYMBOL vmlinux 0x0d0afa2c	xfrm_dst_ifdown
+EXPORT_SYMBOL vmlinux 0x0d0fe2f4	down_trylock
+EXPORT_SYMBOL vmlinux 0x0d19537c	skb_copy_and_csum_bits
+EXPORT_SYMBOL vmlinux 0x0d2e3abe	neigh_table_clear
+EXPORT_SYMBOL vmlinux 0x0d3def21	idr_pre_get
+EXPORT_SYMBOL vmlinux 0x0d3f57a2	_find_next_bit_le
+EXPORT_SYMBOL vmlinux 0x0d542439	__ipv6_addr_type
+EXPORT_SYMBOL vmlinux 0x0d5e05c8	tty_port_close_start
+EXPORT_SYMBOL vmlinux 0x0d6aea12	hippi_neigh_setup_dev
+EXPORT_SYMBOL vmlinux 0x0d85e6f3	revalidate_disk
+EXPORT_SYMBOL vmlinux 0x0d8e27e0	arp_find
+EXPORT_SYMBOL vmlinux 0x0d8f19f4	open_bdev_exclusive
+EXPORT_SYMBOL vmlinux 0x0da10ec3	security_sock_graft
+EXPORT_SYMBOL vmlinux 0x0da67366	ethtool_op_get_ufo
+EXPORT_SYMBOL vmlinux 0x0db60916	__pskb_pull_tail
+EXPORT_SYMBOL vmlinux 0x0dc7b10e	dma_declare_coherent_memory
+EXPORT_SYMBOL vmlinux 0x0de4f8f9	get_sb_pseudo
+EXPORT_SYMBOL vmlinux 0x0decb38a	md_check_recovery
+EXPORT_SYMBOL vmlinux 0x0e25b2b8	xfrm_state_update
+EXPORT_SYMBOL vmlinux 0x0e295bc5	blk_stop_queue
+EXPORT_SYMBOL vmlinux 0x0e2b81e9	sock_no_getsockopt
+EXPORT_SYMBOL vmlinux 0x0e2cde27	proc_dostring
+EXPORT_SYMBOL vmlinux 0x0e3bcf99	scsi_rescan_device
+EXPORT_SYMBOL vmlinux 0x0e52592a	panic
+EXPORT_SYMBOL vmlinux 0x0e5a4712	pci_choose_state
+EXPORT_SYMBOL vmlinux 0x0e5e6c32	invalidate_inodes
+EXPORT_SYMBOL vmlinux 0x0e8a21be	rfkill_alloc
+EXPORT_SYMBOL vmlinux 0x0ebc9885	proc_doulongvec_ms_jiffies_minmax
+EXPORT_SYMBOL vmlinux 0x0ec29d23	netdev_state_change
+EXPORT_SYMBOL vmlinux 0x0f0d00db	inet_csk_delete_keepalive_timer
+EXPORT_SYMBOL vmlinux 0x0f1b04b4	blk_run_queue
+EXPORT_SYMBOL vmlinux 0x0f1ef871	posix_acl_alloc
+EXPORT_SYMBOL vmlinux 0x0f21212e	zero_fill_bio
+EXPORT_SYMBOL vmlinux 0x0f331b41	skb_copy
+EXPORT_SYMBOL vmlinux 0x0f3ab19c	__ip_select_ident
+EXPORT_SYMBOL vmlinux 0x0f446b10	request_key_async
+EXPORT_SYMBOL vmlinux 0x0f560bb6	dm_table_event
+EXPORT_SYMBOL vmlinux 0x0f7c4a83	get_sb_single
+EXPORT_SYMBOL vmlinux 0x0f8c05b5	cfi_varsize_frob
+EXPORT_SYMBOL vmlinux 0x0fa2a45e	__memzero
+EXPORT_SYMBOL vmlinux 0x0fd191b1	mmc_detect_change
+EXPORT_SYMBOL vmlinux 0x0fd77d84	mb_cache_shrink
+EXPORT_SYMBOL vmlinux 0x0ff178f6	__aeabi_idivmod
+EXPORT_SYMBOL vmlinux 0x0ff29bdd	nf_reinject
+EXPORT_SYMBOL vmlinux 0x0ff2b602	slhc_compress
+EXPORT_SYMBOL vmlinux 0x101a639f	scsi_calculate_bounce_limit
+EXPORT_SYMBOL vmlinux 0x103917e5	dm_get_device
+EXPORT_SYMBOL vmlinux 0x1052009f	nla_put_nohdr
+EXPORT_SYMBOL vmlinux 0x10579454	sg_copy_from_buffer
+EXPORT_SYMBOL vmlinux 0x105e2727	__tracepoint_kmalloc
+EXPORT_SYMBOL vmlinux 0x1068ba20	submit_bh
+EXPORT_SYMBOL vmlinux 0x106b8fd9	genl_register_family_with_ops
+EXPORT_SYMBOL vmlinux 0x1072a394	csum_partial_copy_from_user
+EXPORT_SYMBOL vmlinux 0x107697a9	scsi_command_normalize_sense
+EXPORT_SYMBOL vmlinux 0x108e8985	param_get_uint
+EXPORT_SYMBOL vmlinux 0x109728bf	vmalloc_to_page
+EXPORT_SYMBOL vmlinux 0x109dc42c	ip_fragment
+EXPORT_SYMBOL vmlinux 0x10b6dcb8	read_cache_page
+EXPORT_SYMBOL vmlinux 0x10c1c75f	skb_realloc_headroom
+EXPORT_SYMBOL vmlinux 0x10d1aff8	default_unplug_io_fn
+EXPORT_SYMBOL vmlinux 0x10ee20bb	default_blu
+EXPORT_SYMBOL vmlinux 0x10fad90a	f_setown
+EXPORT_SYMBOL vmlinux 0x1101d997	cdrom_media_changed
+EXPORT_SYMBOL vmlinux 0x11130039	nf_register_hook
+EXPORT_SYMBOL vmlinux 0x111470b3	keyring_search
+EXPORT_SYMBOL vmlinux 0x11267875	scsi_extd_sense_format
+EXPORT_SYMBOL vmlinux 0x1132f866	filemap_write_and_wait
+EXPORT_SYMBOL vmlinux 0x11573bc1	inet_bind
+EXPORT_SYMBOL vmlinux 0x1163f0a7	blk_max_low_pfn
+EXPORT_SYMBOL vmlinux 0x117093be	qdisc_class_hash_init
+EXPORT_SYMBOL vmlinux 0x1185a871	security_inode_permission
+EXPORT_SYMBOL vmlinux 0x119b50e7	elf_check_arch
+EXPORT_SYMBOL vmlinux 0x11bcb381	i2c_smbus_read_i2c_block_data
+EXPORT_SYMBOL vmlinux 0x11cab901	journal_wipe
+EXPORT_SYMBOL vmlinux 0x11f5be3d	nlmsg_notify
+EXPORT_SYMBOL vmlinux 0x1211f90f	dma_pool_destroy
+EXPORT_SYMBOL vmlinux 0x1245f05c	sock_get_timestampns
+EXPORT_SYMBOL vmlinux 0x1267b316	vm_insert_mixed
+EXPORT_SYMBOL vmlinux 0x127d5800	inet_stream_connect
+EXPORT_SYMBOL vmlinux 0x12883674	notify_change
+EXPORT_SYMBOL vmlinux 0x12af4f63	sock_no_poll
+EXPORT_SYMBOL vmlinux 0x12bbed38	pipe_lock
+EXPORT_SYMBOL vmlinux 0x12da5bb2	__kmalloc
+EXPORT_SYMBOL vmlinux 0x12fda2d0	kobject_get
+EXPORT_SYMBOL vmlinux 0x1302c211	simple_release_fs
+EXPORT_SYMBOL vmlinux 0x1331ec81	kill_block_super
+EXPORT_SYMBOL vmlinux 0x133761e3	sock_common_recvmsg
+EXPORT_SYMBOL vmlinux 0x1377a92d	inet6_getname
+EXPORT_SYMBOL vmlinux 0x13a35758	lookup_bdev
+EXPORT_SYMBOL vmlinux 0x13a4ee7f	tcf_em_tree_dump
+EXPORT_SYMBOL vmlinux 0x13b66321	dma_alloc_from_coherent
+EXPORT_SYMBOL vmlinux 0x13cbc885	call_usermodehelper_stdinpipe
+EXPORT_SYMBOL vmlinux 0x14109c87	blk_queue_physical_block_size
+EXPORT_SYMBOL vmlinux 0x14198b2e	journal_create
+EXPORT_SYMBOL vmlinux 0x144dc8fa	dev_addr_del_multiple
+EXPORT_SYMBOL vmlinux 0x144ed3a1	dev_base_lock
+EXPORT_SYMBOL vmlinux 0x147393c4	jbd2_journal_abort
+EXPORT_SYMBOL vmlinux 0x14778cad	proc_dointvec
+EXPORT_SYMBOL vmlinux 0x14805ed4	phy_start_aneg
+EXPORT_SYMBOL vmlinux 0x1494e683	generic_file_llseek_unlocked
+EXPORT_SYMBOL vmlinux 0x14a75e4c	pci_bus_size_bridges
+EXPORT_SYMBOL vmlinux 0x14c6389f	input_allocate_device
+EXPORT_SYMBOL vmlinux 0x14ca0430	poll_freewait
+EXPORT_SYMBOL vmlinux 0x14cdb4ef	fddi_change_mtu
+EXPORT_SYMBOL vmlinux 0x14cdc4f9	bio_get_nr_vecs
+EXPORT_SYMBOL vmlinux 0x14cfc74b	mb_cache_entry_free
+EXPORT_SYMBOL vmlinux 0x150f916c	nf_afinfo
+EXPORT_SYMBOL vmlinux 0x154891a1	slow_work_unregister_user
+EXPORT_SYMBOL vmlinux 0x1551dc51	bitmap_find_free_region
+EXPORT_SYMBOL vmlinux 0x1568971f	ethtool_op_get_sg
+EXPORT_SYMBOL vmlinux 0x156d2207	vfs_fsync
+EXPORT_SYMBOL vmlinux 0x1578fc68	skb_dequeue_tail
+EXPORT_SYMBOL vmlinux 0x157aec20	cdrom_ioctl
+EXPORT_SYMBOL vmlinux 0x158bc340	pci_unmap_rom
+EXPORT_SYMBOL vmlinux 0x15ba4e07	__starget_for_each_device
+EXPORT_SYMBOL vmlinux 0x15da844a	generic_file_aio_read
+EXPORT_SYMBOL vmlinux 0x15ea6e24	free_buffer_head
+EXPORT_SYMBOL vmlinux 0x15f20c73	ioremap_page
+EXPORT_SYMBOL vmlinux 0x1615ef32	disk_stack_limits
+EXPORT_SYMBOL vmlinux 0x16305289	warn_slowpath_null
+EXPORT_SYMBOL vmlinux 0x163c5e39	twl4030_i2c_read
+EXPORT_SYMBOL vmlinux 0x16456451	mii_check_link
+EXPORT_SYMBOL vmlinux 0x16479e8f	panic_notifier_list
+EXPORT_SYMBOL vmlinux 0x165936b7	pci_clear_mwi
+EXPORT_SYMBOL vmlinux 0x166e74a2	cpu_v7_set_pte_ext
+EXPORT_SYMBOL vmlinux 0x168c7b1d	hippi_type_trans
+EXPORT_SYMBOL vmlinux 0x16a10faf	dev_unicast_add
+EXPORT_SYMBOL vmlinux 0x16d10e54	blk_cleanup_queue
+EXPORT_SYMBOL vmlinux 0x16e2db1a	end_buffer_read_sync
+EXPORT_SYMBOL vmlinux 0x16e5d970	mii_ethtool_sset
+EXPORT_SYMBOL vmlinux 0x16eb5738	locks_copy_lock
+EXPORT_SYMBOL vmlinux 0x16fba40e	bio_endio
+EXPORT_SYMBOL vmlinux 0x171566f1	uart_suspend_port
+EXPORT_SYMBOL vmlinux 0x172b0153	key_unlink
+EXPORT_SYMBOL vmlinux 0x17692db1	scsi_unblock_requests
+EXPORT_SYMBOL vmlinux 0x1781f8e6	ps2_handle_ack
+EXPORT_SYMBOL vmlinux 0x1799136e	register_netdev
+EXPORT_SYMBOL vmlinux 0x17a142df	__copy_from_user
+EXPORT_SYMBOL vmlinux 0x17a64cb6	mmc_wait_for_req
+EXPORT_SYMBOL vmlinux 0x17a66d75	skb_trim
+EXPORT_SYMBOL vmlinux 0x17ad5e79	unbind_con_driver
+EXPORT_SYMBOL vmlinux 0x17bafc2d	fbcon_set_tileops
+EXPORT_SYMBOL vmlinux 0x17c7219a	clk_get
+EXPORT_SYMBOL vmlinux 0x17df17bc	sysctl_tcp_ecn
+EXPORT_SYMBOL vmlinux 0x18268a5a	pci_get_subsys
+EXPORT_SYMBOL vmlinux 0x183282fe	register_framebuffer
+EXPORT_SYMBOL vmlinux 0x183e3ac1	mtd_do_chip_probe
+EXPORT_SYMBOL vmlinux 0x183fa88b	mempool_alloc_slab
+EXPORT_SYMBOL vmlinux 0x184b82fb	mmc_vddrange_to_ocrmask
+EXPORT_SYMBOL vmlinux 0x1879b3b1	skb_push
+EXPORT_SYMBOL vmlinux 0x187c8d7c	directly_mappable_cdev_bdi
+EXPORT_SYMBOL vmlinux 0x18bdd582	get_unmapped_area_prot
+EXPORT_SYMBOL vmlinux 0x18c6e104	pci_release_regions
+EXPORT_SYMBOL vmlinux 0x18e3ca2e	__dst_free
+EXPORT_SYMBOL vmlinux 0x18f1e2d8	ip_getsockopt
+EXPORT_SYMBOL vmlinux 0x1903b673	task_nice
+EXPORT_SYMBOL vmlinux 0x192498c4	block_fsync
+EXPORT_SYMBOL vmlinux 0x195532a9	phy_sanitize_settings
+EXPORT_SYMBOL vmlinux 0x1955670a	journal_ack_err
+EXPORT_SYMBOL vmlinux 0x19722341	prepare_kernel_cred
+EXPORT_SYMBOL vmlinux 0x1976bc16	__tracepoint_kmem_cache_free
+EXPORT_SYMBOL vmlinux 0x198fb19b	eth_mac_addr
+EXPORT_SYMBOL vmlinux 0x19927079	dmam_pool_destroy
+EXPORT_SYMBOL vmlinux 0x199ed0cd	net_disable_timestamp
+EXPORT_SYMBOL vmlinux 0x19a9c0d4	scsi_execute_req
+EXPORT_SYMBOL vmlinux 0x19fc04ec	udp_disconnect
+EXPORT_SYMBOL vmlinux 0x1a142bae	scsi_adjust_queue_depth
+EXPORT_SYMBOL vmlinux 0x1a19f0c3	dquot_alloc_space
+EXPORT_SYMBOL vmlinux 0x1a29e601	jbd2_journal_revoke
+EXPORT_SYMBOL vmlinux 0x1a4058a2	eth_rebuild_header
+EXPORT_SYMBOL vmlinux 0x1a65f4ad	__arm_ioremap_pfn
+EXPORT_SYMBOL vmlinux 0x1a78cdb8	pci_read_vpd
+EXPORT_SYMBOL vmlinux 0x1a8f8be5	dmam_release_declared_memory
+EXPORT_SYMBOL vmlinux 0x1ac5fb81	pagevec_lookup_tag
+EXPORT_SYMBOL vmlinux 0x1ace138d	bitmap_allocate_region
+EXPORT_SYMBOL vmlinux 0x1ad1f2e7	_memcpy_fromio
+EXPORT_SYMBOL vmlinux 0x1aff3368	redirty_page_for_writepage
+EXPORT_SYMBOL vmlinux 0x1b015d25	bitmap_parselist
+EXPORT_SYMBOL vmlinux 0x1b4a295e	eth_validate_addr
+EXPORT_SYMBOL vmlinux 0x1b6314fd	in_aton
+EXPORT_SYMBOL vmlinux 0x1b6f24c9	icmp_send
+EXPORT_SYMBOL vmlinux 0x1b931317	blk_queue_io_min
+EXPORT_SYMBOL vmlinux 0x1b9981cc	set_irq_wake
+EXPORT_SYMBOL vmlinux 0x1b9e0ff1	scsilun_to_int
+EXPORT_SYMBOL vmlinux 0x1bab0a63	phy_stop_interrupts
+EXPORT_SYMBOL vmlinux 0x1be0aac6	aio_complete
+EXPORT_SYMBOL vmlinux 0x1be6d238	init_timer_deferrable_key
+EXPORT_SYMBOL vmlinux 0x1c01a258	__serio_register_driver
+EXPORT_SYMBOL vmlinux 0x1c1abb3f	journal_abort
+EXPORT_SYMBOL vmlinux 0x1c1af916	set_normalized_timespec
+EXPORT_SYMBOL vmlinux 0x1c2f6f30	tcp_check_req
+EXPORT_SYMBOL vmlinux 0x1c3206d4	dev_mc_delete
+EXPORT_SYMBOL vmlinux 0x1c324357	idr_replace
+EXPORT_SYMBOL vmlinux 0x1c390bdc	jbd2_journal_wipe
+EXPORT_SYMBOL vmlinux 0x1c808484	bioset_integrity_free
+EXPORT_SYMBOL vmlinux 0x1c869a4a	alloc_buffer_head
+EXPORT_SYMBOL vmlinux 0x1c9dce62	ethtool_op_set_tx_csum
+EXPORT_SYMBOL vmlinux 0x1c9fabff	xfrm4_prepare_output
+EXPORT_SYMBOL vmlinux 0x1cc394e4	skb_checksum_help
+EXPORT_SYMBOL vmlinux 0x1cc6719a	register_reboot_notifier
+EXPORT_SYMBOL vmlinux 0x1ceea920	blk_rq_map_integrity_sg
+EXPORT_SYMBOL vmlinux 0x1ceebdf2	deactivate_locked_super
+EXPORT_SYMBOL vmlinux 0x1cf16491	__seq_open_private
+EXPORT_SYMBOL vmlinux 0x1d0aaf41	scsi_kmap_atomic_sg
+EXPORT_SYMBOL vmlinux 0x1d1ac5e7	bio_integrity_advance
+EXPORT_SYMBOL vmlinux 0x1d20873c	dma_cache_maint_page
+EXPORT_SYMBOL vmlinux 0x1d2e87c6	do_gettimeofday
+EXPORT_SYMBOL vmlinux 0x1d4f35a9	__nla_reserve_nohdr
+EXPORT_SYMBOL vmlinux 0x1d6a77f5	__sk_mem_reclaim
+EXPORT_SYMBOL vmlinux 0x1dc36131	fb_destroy_modedb
+EXPORT_SYMBOL vmlinux 0x1dc45029	register_nls
+EXPORT_SYMBOL vmlinux 0x1dc80673	find_lock_page
+EXPORT_SYMBOL vmlinux 0x1dced8ad	writeback_inodes_sb
+EXPORT_SYMBOL vmlinux 0x1dd571e6	fb_copy_cmap
+EXPORT_SYMBOL vmlinux 0x1ddbe147	qdisc_watchdog_init
+EXPORT_SYMBOL vmlinux 0x1e02d217	tcp_v4_syn_recv_sock
+EXPORT_SYMBOL vmlinux 0x1e263c8e	single_open
+EXPORT_SYMBOL vmlinux 0x1e30f732	scsi_block_requests
+EXPORT_SYMBOL vmlinux 0x1e35c71f	pci_try_set_mwi
+EXPORT_SYMBOL vmlinux 0x1e49daa8	sg_init_one
+EXPORT_SYMBOL vmlinux 0x1e6aabb2	simple_empty
+EXPORT_SYMBOL vmlinux 0x1e6d26a8	strstr
+EXPORT_SYMBOL vmlinux 0x1ebddd63	tcp_ioctl
+EXPORT_SYMBOL vmlinux 0x1ec9ece7	per_cpu__softnet_data
+EXPORT_SYMBOL vmlinux 0x1ecb9943	posix_acl_to_xattr
+EXPORT_SYMBOL vmlinux 0x1ed17a8c	ip_defrag
+EXPORT_SYMBOL vmlinux 0x1edc9598	_atomic_dec_and_lock
+EXPORT_SYMBOL vmlinux 0x1ef195f4	remap_pfn_range
+EXPORT_SYMBOL vmlinux 0x1efe283f	__cap_full_set
+EXPORT_SYMBOL vmlinux 0x1f253f6f	skb_over_panic
+EXPORT_SYMBOL vmlinux 0x1f2afc36	xfrm_user_policy
+EXPORT_SYMBOL vmlinux 0x1f70d32d	dma_cache_maint
+EXPORT_SYMBOL vmlinux 0x1f7bb82e	input_unregister_device
+EXPORT_SYMBOL vmlinux 0x1f7cc628	mempool_create
+EXPORT_SYMBOL vmlinux 0x1f81ca12	sk_alloc
+EXPORT_SYMBOL vmlinux 0x1fae7a0b	wait_for_completion_timeout
+EXPORT_SYMBOL vmlinux 0x1fbd3639	tcp_md5_hash_skb_data
+EXPORT_SYMBOL vmlinux 0x1fd6a977	skb_copy_datagram_const_iovec
+EXPORT_SYMBOL vmlinux 0x1fdf7fc1	scsi_add_device
+EXPORT_SYMBOL vmlinux 0x1ff69dd8	vfs_fstatat
+EXPORT_SYMBOL vmlinux 0x20000329	simple_strtoul
+EXPORT_SYMBOL vmlinux 0x2014fad2	add_timer
+EXPORT_SYMBOL vmlinux 0x202a45bf	phy_start_interrupts
+EXPORT_SYMBOL vmlinux 0x20385c58	genl_register_mc_group
+EXPORT_SYMBOL vmlinux 0x203dc388	sock_get_timestamp
+EXPORT_SYMBOL vmlinux 0x208d6156	fb_blank
+EXPORT_SYMBOL vmlinux 0x20b66878	udp_lib_setsockopt
+EXPORT_SYMBOL vmlinux 0x20cd6d2e	xfrm6_find_1stfragopt
+EXPORT_SYMBOL vmlinux 0x20dfec5d	audit_log_start
+EXPORT_SYMBOL vmlinux 0x20e271ec	inet_getname
+EXPORT_SYMBOL vmlinux 0x210cc8fc	icst307_khz
+EXPORT_SYMBOL vmlinux 0x211331fa	__divsi3
+EXPORT_SYMBOL vmlinux 0x212c6664	scsi_remove_target
+EXPORT_SYMBOL vmlinux 0x212e0cb1	in_dev_finish_destroy
+EXPORT_SYMBOL vmlinux 0x212f7eeb	jbd2_journal_file_inode
+EXPORT_SYMBOL vmlinux 0x21327ab8	phy_connect
+EXPORT_SYMBOL vmlinux 0x2141d0f3	dm_table_get
+EXPORT_SYMBOL vmlinux 0x2143a139	cfi_fixup
+EXPORT_SYMBOL vmlinux 0x215ebd78	bitrev16
+EXPORT_SYMBOL vmlinux 0x21616fae	register_tcf_proto_ops
+EXPORT_SYMBOL vmlinux 0x216de517	console_stop
+EXPORT_SYMBOL vmlinux 0x21a105b6	skb_under_panic
+EXPORT_SYMBOL vmlinux 0x21ca86f9	qdisc_watchdog_cancel
+EXPORT_SYMBOL vmlinux 0x21ed0984	input_set_keycode
+EXPORT_SYMBOL vmlinux 0x21ee0152	scsi_host_lookup
+EXPORT_SYMBOL vmlinux 0x222e7ce2	sysfs_streq
+EXPORT_SYMBOL vmlinux 0x22456724	jbd2_journal_get_create_access
+EXPORT_SYMBOL vmlinux 0x2265ade9	vfs_unlink
+EXPORT_SYMBOL vmlinux 0x226e86a9	audit_log
+EXPORT_SYMBOL vmlinux 0x227ccb17	ip_dev_find
+EXPORT_SYMBOL vmlinux 0x2288378f	system_state
+EXPORT_SYMBOL vmlinux 0x229cdb2f	netlink_dump_start
+EXPORT_SYMBOL vmlinux 0x22a73912	__tcp_put_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x22b325d5	kd_mksound
+EXPORT_SYMBOL vmlinux 0x22b54a42	sock_release
+EXPORT_SYMBOL vmlinux 0x22b62fb7	try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0x22b6533b	xfrm_sad_getinfo
+EXPORT_SYMBOL vmlinux 0x22bcd18b	seq_path
+EXPORT_SYMBOL vmlinux 0x22c41a9e	ip_generic_getfrag
+EXPORT_SYMBOL vmlinux 0x22c98034	put_tty_driver
+EXPORT_SYMBOL vmlinux 0x22dfd5c5	security_path_symlink
+EXPORT_SYMBOL vmlinux 0x22f5b404	sk_free
+EXPORT_SYMBOL vmlinux 0x23009e13	spi_attach_transport
+EXPORT_SYMBOL vmlinux 0x230a4a46	simple_link
+EXPORT_SYMBOL vmlinux 0x231cf494	up_write
+EXPORT_SYMBOL vmlinux 0x23269a13	strict_strtoul
+EXPORT_SYMBOL vmlinux 0x2346464b	unregister_quota_format
+EXPORT_SYMBOL vmlinux 0x2356cc1d	nf_unregister_queue_handler
+EXPORT_SYMBOL vmlinux 0x23647df3	cfb_imageblit
+EXPORT_SYMBOL vmlinux 0x23838107	__down_write
+EXPORT_SYMBOL vmlinux 0x23950028	serio_unregister_port
+EXPORT_SYMBOL vmlinux 0x23a51359	dm_io_client_resize
+EXPORT_SYMBOL vmlinux 0x23b193e1	tcf_exts_dump_stats
+EXPORT_SYMBOL vmlinux 0x23b724df	ip_route_me_harder
+EXPORT_SYMBOL vmlinux 0x23c4215d	__xfrm_state_destroy
+EXPORT_SYMBOL vmlinux 0x23c8f257	slhc_uncompress
+EXPORT_SYMBOL vmlinux 0x23f675e0	flush_signals
+EXPORT_SYMBOL vmlinux 0x23fd3028	vmalloc_node
+EXPORT_SYMBOL vmlinux 0x243fe173	ndisc_mc_map
+EXPORT_SYMBOL vmlinux 0x2459bbcc	console_set_on_cmdline
+EXPORT_SYMBOL vmlinux 0x24624544	ftrace_print_flags_seq
+EXPORT_SYMBOL vmlinux 0x248c157a	tcp4_gro_complete
+EXPORT_SYMBOL vmlinux 0x24fdac79	wake_bit_function
+EXPORT_SYMBOL vmlinux 0x2501039f	unload_nls
+EXPORT_SYMBOL vmlinux 0x250113b4	memory_read_from_buffer
+EXPORT_SYMBOL vmlinux 0x251698b7	unregister_exec_domain
+EXPORT_SYMBOL vmlinux 0x25280c23	register_8022_client
+EXPORT_SYMBOL vmlinux 0x25809a0a	dev_unicast_unsync
+EXPORT_SYMBOL vmlinux 0x25820c64	fs_overflowuid
+EXPORT_SYMBOL vmlinux 0x2582a6ec	netdev_bonding_change
+EXPORT_SYMBOL vmlinux 0x258355b4	fb_find_best_mode
+EXPORT_SYMBOL vmlinux 0x2587755f	dev_set_promiscuity
+EXPORT_SYMBOL vmlinux 0x25b15a09	set_user_nice
+EXPORT_SYMBOL vmlinux 0x25ba121c	mempool_resize
+EXPORT_SYMBOL vmlinux 0x25fa6f17	wait_for_completion
+EXPORT_SYMBOL vmlinux 0x25ff2858	xfrm_register_type
+EXPORT_SYMBOL vmlinux 0x2610c648	dst_destroy
+EXPORT_SYMBOL vmlinux 0x261c1766	__backtrace
+EXPORT_SYMBOL vmlinux 0x261e6f55	mutex_lock_killable
+EXPORT_SYMBOL vmlinux 0x262852fe	jbd2_journal_lock_updates
+EXPORT_SYMBOL vmlinux 0x26477c07	__vmalloc
+EXPORT_SYMBOL vmlinux 0x26687451	shrink_dcache_parent
+EXPORT_SYMBOL vmlinux 0x267fc65b	__tasklet_hi_schedule
+EXPORT_SYMBOL vmlinux 0x2690658f	serio_interrupt
+EXPORT_SYMBOL vmlinux 0x269931dc	i2c_smbus_process_call
+EXPORT_SYMBOL vmlinux 0x26bdd2ba	pci_find_next_bus
+EXPORT_SYMBOL vmlinux 0x26e76fb8	sysctl_udp_wmem_min
+EXPORT_SYMBOL vmlinux 0x2704eb8f	dev_addr_del
+EXPORT_SYMBOL vmlinux 0x2765b034	neigh_seq_stop
+EXPORT_SYMBOL vmlinux 0x2768b42a	cdrom_mode_select
+EXPORT_SYMBOL vmlinux 0x276e63fe	bio_integrity_add_page
+EXPORT_SYMBOL vmlinux 0x27864d57	memparse
+EXPORT_SYMBOL vmlinux 0x27ac42e4	generic_file_llseek
+EXPORT_SYMBOL vmlinux 0x27bbf221	disable_irq_nosync
+EXPORT_SYMBOL vmlinux 0x27c3865c	pcibios_resource_to_bus
+EXPORT_SYMBOL vmlinux 0x27c61ece	qdisc_put_stab
+EXPORT_SYMBOL vmlinux 0x27cab75e	xfrm_unregister_type
+EXPORT_SYMBOL vmlinux 0x27d38909	block_commit_write
+EXPORT_SYMBOL vmlinux 0x28118cb6	__get_user_1
+EXPORT_SYMBOL vmlinux 0x284f920a	inet_csk_init_xmit_timers
+EXPORT_SYMBOL vmlinux 0x285ac517	strict_strtoll
+EXPORT_SYMBOL vmlinux 0x2868474c	xfrm_policy_walk
+EXPORT_SYMBOL vmlinux 0x288be554	__set_page_dirty_nobuffers
+EXPORT_SYMBOL vmlinux 0x28a2ed02	scsi_build_sense_buffer
+EXPORT_SYMBOL vmlinux 0x28d4a1e7	km_policy_notify
+EXPORT_SYMBOL vmlinux 0x28e73b33	filemap_fdatawait
+EXPORT_SYMBOL vmlinux 0x28f9662b	mmc_resume_host
+EXPORT_SYMBOL vmlinux 0x28fd6a39	sock_no_recvmsg
+EXPORT_SYMBOL vmlinux 0x28feef4c	uart_get_baud_rate
+EXPORT_SYMBOL vmlinux 0x292343ba	__netdev_alloc_page
+EXPORT_SYMBOL vmlinux 0x293094a2	uart_update_timeout
+EXPORT_SYMBOL vmlinux 0x2950a46b	bitmap_unplug
+EXPORT_SYMBOL vmlinux 0x29537c9e	alloc_chrdev_region
+EXPORT_SYMBOL vmlinux 0x298098d8	lro_vlan_hwaccel_receive_frags
+EXPORT_SYMBOL vmlinux 0x29982fb6	__secpath_destroy
+EXPORT_SYMBOL vmlinux 0x29bd4c46	__cap_init_eff_set
+EXPORT_SYMBOL vmlinux 0x29cbb8a1	i2c_smbus_write_byte
+EXPORT_SYMBOL vmlinux 0x2a193298	phy_disable_interrupts
+EXPORT_SYMBOL vmlinux 0x2a29feab	__tcp_get_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x2a303d4d	check_signature
+EXPORT_SYMBOL vmlinux 0x2a3974bc	write_one_page
+EXPORT_SYMBOL vmlinux 0x2a658775	get_sb_ns
+EXPORT_SYMBOL vmlinux 0x2a77dd3d	d_obtain_alias
+EXPORT_SYMBOL vmlinux 0x2a79ac13	clkdev_add
+EXPORT_SYMBOL vmlinux 0x2a90f749	elv_rb_find
+EXPORT_SYMBOL vmlinux 0x2a943adb	mmc_card_awake
+EXPORT_SYMBOL vmlinux 0x2aa0e4fc	strncasecmp
+EXPORT_SYMBOL vmlinux 0x2aacd0df	simple_transaction_get
+EXPORT_SYMBOL vmlinux 0x2ac7b461	address_space_init_once
+EXPORT_SYMBOL vmlinux 0x2adf1f58	udp_proc_register
+EXPORT_SYMBOL vmlinux 0x2adf6e37	bio_integrity_prep
+EXPORT_SYMBOL vmlinux 0x2afa0c04	kill_pgrp
+EXPORT_SYMBOL vmlinux 0x2b0ba2b0	scsi_sense_desc_find
+EXPORT_SYMBOL vmlinux 0x2b3bb7b4	ethtool_op_get_flags
+EXPORT_SYMBOL vmlinux 0x2b40baff	__down_write_nested
+EXPORT_SYMBOL vmlinux 0x2b415ec4	get_sb_bdev
+EXPORT_SYMBOL vmlinux 0x2b570dc0	ida_pre_get
+EXPORT_SYMBOL vmlinux 0x2b62b6e9	cap_netlink_recv
+EXPORT_SYMBOL vmlinux 0x2b7dd661	key_payload_reserve
+EXPORT_SYMBOL vmlinux 0x2ba707a8	sysctl_tcp_low_latency
+EXPORT_SYMBOL vmlinux 0x2ba9db60	dquot_mark_dquot_dirty
+EXPORT_SYMBOL vmlinux 0x2bd297c5	nobh_write_begin
+EXPORT_SYMBOL vmlinux 0x2bdeef6d	remap_vmalloc_range
+EXPORT_SYMBOL vmlinux 0x2bf87030	log_wait_commit
+EXPORT_SYMBOL vmlinux 0x2bf9feef	module_layout
+EXPORT_SYMBOL vmlinux 0x2c15121b	__nla_put_nohdr
+EXPORT_SYMBOL vmlinux 0x2c86190d	call_usermodehelper_pipe
+EXPORT_SYMBOL vmlinux 0x2c9fc360	scsi_host_alloc
+EXPORT_SYMBOL vmlinux 0x2ca091ad	pcim_iounmap
+EXPORT_SYMBOL vmlinux 0x2cbb7ab7	backlight_force_update
+EXPORT_SYMBOL vmlinux 0x2ccf97c5	mark_page_accessed
+EXPORT_SYMBOL vmlinux 0x2d121c88	follow_pfn
+EXPORT_SYMBOL vmlinux 0x2d2d27cb	ethtool_op_get_rx_csum
+EXPORT_SYMBOL vmlinux 0x2d2f6e2c	key_task_permission
+EXPORT_SYMBOL vmlinux 0x2d509213	check_disk_change
+EXPORT_SYMBOL vmlinux 0x2d53c035	scsi_bios_ptable
+EXPORT_SYMBOL vmlinux 0x2d6507b5	_find_next_zero_bit_le
+EXPORT_SYMBOL vmlinux 0x2d6ab8aa	netdev_rx_csum_fault
+EXPORT_SYMBOL vmlinux 0x2d6e96f2	bitmap_close_sync
+EXPORT_SYMBOL vmlinux 0x2d7ca72a	xfrm_policy_alloc
+EXPORT_SYMBOL vmlinux 0x2d89342a	scsi_show_sense_hdr
+EXPORT_SYMBOL vmlinux 0x2dcb0123	schedule_delayed_work_on
+EXPORT_SYMBOL vmlinux 0x2dcf7a95	journal_destroy
+EXPORT_SYMBOL vmlinux 0x2e0e0af8	tcp4_gro_receive
+EXPORT_SYMBOL vmlinux 0x2e171ea8	arp_create
+EXPORT_SYMBOL vmlinux 0x2e1ca751	clk_put
+EXPORT_SYMBOL vmlinux 0x2e238745	amba_device_unregister
+EXPORT_SYMBOL vmlinux 0x2e2ce9e0	sysctl_tcp_syncookies
+EXPORT_SYMBOL vmlinux 0x2e3794e3	vfs_quota_on
+EXPORT_SYMBOL vmlinux 0x2e4a39f8	sysctl_udp_mem
+EXPORT_SYMBOL vmlinux 0x2e52550f	dev_unicast_sync
+EXPORT_SYMBOL vmlinux 0x2e5810c6	__aeabi_unwind_cpp_pr1
+EXPORT_SYMBOL vmlinux 0x2e651a5d	elv_add_request
+EXPORT_SYMBOL vmlinux 0x2e699610	kernel_recvmsg
+EXPORT_SYMBOL vmlinux 0x2e7ce199	get_io_context
+EXPORT_SYMBOL vmlinux 0x2ea01558	fb_set_cmap
+EXPORT_SYMBOL vmlinux 0x2ebc950b	journal_clear_err
+EXPORT_SYMBOL vmlinux 0x2edf3b28	ppp_unregister_compressor
+EXPORT_SYMBOL vmlinux 0x2ef5e70c	__blk_end_request_cur
+EXPORT_SYMBOL vmlinux 0x2f3cb0bc	ethtool_op_get_tx_csum
+EXPORT_SYMBOL vmlinux 0x2f65ce8a	netif_notify_peers
+EXPORT_SYMBOL vmlinux 0x2f7ef568	kmap_high
+EXPORT_SYMBOL vmlinux 0x2f95ad68	__inet6_lookup_established
+EXPORT_SYMBOL vmlinux 0x2f969bc8	framebuffer_release
+EXPORT_SYMBOL vmlinux 0x2fedbbe8	blk_queue_make_request
+EXPORT_SYMBOL vmlinux 0x2ffbeeef	ipv6_setsockopt
+EXPORT_SYMBOL vmlinux 0x30123eb5	icmpv6_statistics
+EXPORT_SYMBOL vmlinux 0x301438ae	genphy_config_aneg
+EXPORT_SYMBOL vmlinux 0x303a4ef9	skb_insert
+EXPORT_SYMBOL vmlinux 0x303c4878	d_add_ci
+EXPORT_SYMBOL vmlinux 0x304fb2dd	free_netdev
+EXPORT_SYMBOL vmlinux 0x306ba72d	__pci_register_driver
+EXPORT_SYMBOL vmlinux 0x30751fb5	nf_unregister_hook
+EXPORT_SYMBOL vmlinux 0x308af673	get_fs_type
+EXPORT_SYMBOL vmlinux 0x30a06b9c	key_negate_and_link
+EXPORT_SYMBOL vmlinux 0x30af1f0b	skb_copy_and_csum_datagram_iovec
+EXPORT_SYMBOL vmlinux 0x30bbb3fb	pci_dev_put
+EXPORT_SYMBOL vmlinux 0x30e74134	tty_termios_copy_hw
+EXPORT_SYMBOL vmlinux 0x310917fe	sort
+EXPORT_SYMBOL vmlinux 0x31121fe1	genl_unregister_mc_group
+EXPORT_SYMBOL vmlinux 0x3124e4ca	filemap_write_and_wait_range
+EXPORT_SYMBOL vmlinux 0x31285081	generic_delete_inode
+EXPORT_SYMBOL vmlinux 0x313341a3	_set_bit_le
+EXPORT_SYMBOL vmlinux 0x3145216f	pci_dev_present
+EXPORT_SYMBOL vmlinux 0x3147857d	default_red
+EXPORT_SYMBOL vmlinux 0x3168c503	skb_prepare_seq_read
+EXPORT_SYMBOL vmlinux 0x3191f109	__krealloc
+EXPORT_SYMBOL vmlinux 0x31b21f51	bdget_disk
+EXPORT_SYMBOL vmlinux 0x31b31f5c	csum_partial_copy_nocheck
+EXPORT_SYMBOL vmlinux 0x31bb03ee	loop_register_transfer
+EXPORT_SYMBOL vmlinux 0x31bd4b0d	pci_reenable_device
+EXPORT_SYMBOL vmlinux 0x31ca55cf	log_start_commit
+EXPORT_SYMBOL vmlinux 0x31d55832	rtnl_create_link
+EXPORT_SYMBOL vmlinux 0x31f0db3f	llc_sap_open
+EXPORT_SYMBOL vmlinux 0x3207d7e0	give_up_console
+EXPORT_SYMBOL vmlinux 0x323222ba	mutex_unlock
+EXPORT_SYMBOL vmlinux 0x32323d9e	do_mmap_pgoff
+EXPORT_SYMBOL vmlinux 0x323b48d9	nf_log_unregister
+EXPORT_SYMBOL vmlinux 0x3248d9f2	no_llseek
+EXPORT_SYMBOL vmlinux 0x326def6c	dev_get_by_index
+EXPORT_SYMBOL vmlinux 0x326df9e1	vfs_stat
+EXPORT_SYMBOL vmlinux 0x3285cc48	param_set_uint
+EXPORT_SYMBOL vmlinux 0x328a05f1	strncpy
+EXPORT_SYMBOL vmlinux 0x32ce623a	sg_last
+EXPORT_SYMBOL vmlinux 0x32e48af5	tty_schedule_flip
+EXPORT_SYMBOL vmlinux 0x32eb9c78	read_cache_pages
+EXPORT_SYMBOL vmlinux 0x33561407	udp_sendmsg
+EXPORT_SYMBOL vmlinux 0x33590a0a	pcim_iomap_table
+EXPORT_SYMBOL vmlinux 0x3363d22a	serio_rescan
+EXPORT_SYMBOL vmlinux 0x338923b7	nf_register_hooks
+EXPORT_SYMBOL vmlinux 0x33f89ff1	abort_creds
+EXPORT_SYMBOL vmlinux 0x33fbfb48	spi_release_transport
+EXPORT_SYMBOL vmlinux 0x3428eb13	rtnl_notify
+EXPORT_SYMBOL vmlinux 0x343a0759	gnet_stats_start_copy
+EXPORT_SYMBOL vmlinux 0x34461905	find_get_pages_contig
+EXPORT_SYMBOL vmlinux 0x345295fe	vga_get
+EXPORT_SYMBOL vmlinux 0x3455d373	tcp_proc_register
+EXPORT_SYMBOL vmlinux 0x34566617	phy_start
+EXPORT_SYMBOL vmlinux 0x3457cb68	param_set_long
+EXPORT_SYMBOL vmlinux 0x34908c14	print_hex_dump_bytes
+EXPORT_SYMBOL vmlinux 0x3490f209	redraw_screen
+EXPORT_SYMBOL vmlinux 0x3499a140	tcf_generic_walker
+EXPORT_SYMBOL vmlinux 0x349cba85	strchr
+EXPORT_SYMBOL vmlinux 0x34b3d2af	sock_no_listen
+EXPORT_SYMBOL vmlinux 0x34d42b53	vfs_readlink
+EXPORT_SYMBOL vmlinux 0x353e3fa5	__get_user_4
+EXPORT_SYMBOL vmlinux 0x35620d84	inet_release
+EXPORT_SYMBOL vmlinux 0x35ac2736	scsi_prep_return
+EXPORT_SYMBOL vmlinux 0x35b13e90	input_close_device
+EXPORT_SYMBOL vmlinux 0x35c2ba9e	refrigerator
+EXPORT_SYMBOL vmlinux 0x35da2e61	radix_tree_tag_get
+EXPORT_SYMBOL vmlinux 0x35f09bdb	pcim_iomap_regions
+EXPORT_SYMBOL vmlinux 0x35f62a74	ppp_unit_number
+EXPORT_SYMBOL vmlinux 0x360b1afe	probe_irq_mask
+EXPORT_SYMBOL vmlinux 0x36404e0a	page_symlink_inode_operations
+EXPORT_SYMBOL vmlinux 0x36784180	jbd2_journal_force_commit
+EXPORT_SYMBOL vmlinux 0x3686ea09	spi_print_msg
+EXPORT_SYMBOL vmlinux 0x36e47222	remove_wait_queue
+EXPORT_SYMBOL vmlinux 0x36ebe42d	kmem_cache_free
+EXPORT_SYMBOL vmlinux 0x36f5f0ae	sk_release_kernel
+EXPORT_SYMBOL vmlinux 0x37047501	udp_ioctl
+EXPORT_SYMBOL vmlinux 0x371c829d	mpage_writepage
+EXPORT_SYMBOL vmlinux 0x37242530	pci_remove_bus_device
+EXPORT_SYMBOL vmlinux 0x3727ed90	i2c_smbus_read_word_data
+EXPORT_SYMBOL vmlinux 0x3744cf36	vmalloc_to_pfn
+EXPORT_SYMBOL vmlinux 0x374ed073	scnprintf
+EXPORT_SYMBOL vmlinux 0x375d8c17	vm_insert_pfn
+EXPORT_SYMBOL vmlinux 0x3782ef33	vfs_dq_quota_on_remount
+EXPORT_SYMBOL vmlinux 0x37af6a0a	abort_exclusive_wait
+EXPORT_SYMBOL vmlinux 0x37befc70	jiffies_to_msecs
+EXPORT_SYMBOL vmlinux 0x37e74642	get_jiffies_64
+EXPORT_SYMBOL vmlinux 0x3807af14	pci_set_dma_seg_boundary
+EXPORT_SYMBOL vmlinux 0x381c4bb1	cancel_delayed_work_sync
+EXPORT_SYMBOL vmlinux 0x3821f2c6	sk_reset_timer
+EXPORT_SYMBOL vmlinux 0x3837d08f	dquot_acquire
+EXPORT_SYMBOL vmlinux 0x384f55d4	textsearch_find_continuous
+EXPORT_SYMBOL vmlinux 0x385474a7	i2c_master_send
+EXPORT_SYMBOL vmlinux 0x388f9128	xfrm_state_walk_done
+EXPORT_SYMBOL vmlinux 0x38b92846	llc_remove_pack
+EXPORT_SYMBOL vmlinux 0x38d079cf	kobject_init
+EXPORT_SYMBOL vmlinux 0x38e8378d	pgprot_kernel
+EXPORT_SYMBOL vmlinux 0x3918f092	blk_queue_bounce
+EXPORT_SYMBOL vmlinux 0x3941b9ec	llc_mac_hdr_init
+EXPORT_SYMBOL vmlinux 0x395ff552	bio_alloc
+EXPORT_SYMBOL vmlinux 0x3980aac1	unregister_reboot_notifier
+EXPORT_SYMBOL vmlinux 0x399ec6c1	ipv6_chk_addr
+EXPORT_SYMBOL vmlinux 0x39c42bbd	secpath_dup
+EXPORT_SYMBOL vmlinux 0x39d9355f	blk_integrity_compare
+EXPORT_SYMBOL vmlinux 0x39e28f08	jbd2_journal_flush
+EXPORT_SYMBOL vmlinux 0x39f17d13	mmc_suspend_host
+EXPORT_SYMBOL vmlinux 0x39f3a0d5	gnet_stats_finish_copy
+EXPORT_SYMBOL vmlinux 0x3a0e0aec	backlight_device_unregister
+EXPORT_SYMBOL vmlinux 0x3a0f3564	sg_miter_start
+EXPORT_SYMBOL vmlinux 0x3a2204c6	security_netlink_recv
+EXPORT_SYMBOL vmlinux 0x3a363d03	inet_add_protocol
+EXPORT_SYMBOL vmlinux 0x3a4f20bb	mb_cache_create
+EXPORT_SYMBOL vmlinux 0x3a51e364	netif_device_attach
+EXPORT_SYMBOL vmlinux 0x3a5f4e7a	cont_write_begin
+EXPORT_SYMBOL vmlinux 0x3a636e32	i2c_use_client
+EXPORT_SYMBOL vmlinux 0x3a6679fb	register_sysctl_table
+EXPORT_SYMBOL vmlinux 0x3a9b6fb9	blk_unregister_region
+EXPORT_SYMBOL vmlinux 0x3ab8bb5b	phy_enable_interrupts
+EXPORT_SYMBOL vmlinux 0x3adc15b9	posix_acl_from_mode
+EXPORT_SYMBOL vmlinux 0x3ae831b6	kref_init
+EXPORT_SYMBOL vmlinux 0x3af0dfa8	stop_tty
+EXPORT_SYMBOL vmlinux 0x3aff44b6	scsi_nonblockable_ioctl
+EXPORT_SYMBOL vmlinux 0x3bb78130	set_current_groups
+EXPORT_SYMBOL vmlinux 0x3bb9410b	scsi_report_device_reset
+EXPORT_SYMBOL vmlinux 0x3bd1b1f6	msecs_to_jiffies
+EXPORT_SYMBOL vmlinux 0x3c24b2b7	tcp_md5_hash_header
+EXPORT_SYMBOL vmlinux 0x3c27fee5	kernel_setsockopt
+EXPORT_SYMBOL vmlinux 0x3c2c5af5	sprintf
+EXPORT_SYMBOL vmlinux 0x3c345cdc	scsi_eh_restore_cmnd
+EXPORT_SYMBOL vmlinux 0x3c356f1e	atomic_dec_and_mutex_lock
+EXPORT_SYMBOL vmlinux 0x3c47dc86	pci_back_from_sleep
+EXPORT_SYMBOL vmlinux 0x3c4c97bc	mark_buffer_dirty
+EXPORT_SYMBOL vmlinux 0x3c57b075	register_exec_domain
+EXPORT_SYMBOL vmlinux 0x3c871f7e	sk_stream_write_space
+EXPORT_SYMBOL vmlinux 0x3c9d1211	string_get_size
+EXPORT_SYMBOL vmlinux 0x3cc0a3bb	xfrm_spd_getinfo
+EXPORT_SYMBOL vmlinux 0x3ce12edd	cpu_user
+EXPORT_SYMBOL vmlinux 0x3ce4ca6f	disable_irq
+EXPORT_SYMBOL vmlinux 0x3d3c540f	elf_hwcap
+EXPORT_SYMBOL vmlinux 0x3d5a4545	amba_driver_register
+EXPORT_SYMBOL vmlinux 0x3d674e95	bh_submit_read
+EXPORT_SYMBOL vmlinux 0x3d68bd4b	flow_cache_genid
+EXPORT_SYMBOL vmlinux 0x3d931f95	devm_free_irq
+EXPORT_SYMBOL vmlinux 0x3daa69da	vfs_lstat
+EXPORT_SYMBOL vmlinux 0x3daf0ff6	vfs_get_dqinfo
+EXPORT_SYMBOL vmlinux 0x3dd7328c	scsi_device_get
+EXPORT_SYMBOL vmlinux 0x3e0550e1	dev_driver_string
+EXPORT_SYMBOL vmlinux 0x3e37809c	d_invalidate
+EXPORT_SYMBOL vmlinux 0x3e383385	nf_hooks
+EXPORT_SYMBOL vmlinux 0x3e45e9ff	register_inetaddr_notifier
+EXPORT_SYMBOL vmlinux 0x3e474c2b	end_buffer_async_write
+EXPORT_SYMBOL vmlinux 0x3e579c79	sk_stream_error
+EXPORT_SYMBOL vmlinux 0x3e6caebd	add_wait_queue_exclusive
+EXPORT_SYMBOL vmlinux 0x3e74b02b	end_page_writeback
+EXPORT_SYMBOL vmlinux 0x3e899c9d	blk_limits_io_min
+EXPORT_SYMBOL vmlinux 0x3e8d450f	iget5_locked
+EXPORT_SYMBOL vmlinux 0x3e974f31	pci_enable_device_io
+EXPORT_SYMBOL vmlinux 0x3e9cab9c	filemap_flush
+EXPORT_SYMBOL vmlinux 0x3ea2d4f5	ip6_route_output
+EXPORT_SYMBOL vmlinux 0x3ed63055	zlib_inflateReset
+EXPORT_SYMBOL vmlinux 0x3ef7d8af	tcf_em_register
+EXPORT_SYMBOL vmlinux 0x3f04a5da	__skb_checksum_complete
+EXPORT_SYMBOL vmlinux 0x3f123f0a	ip_mc_inc_group
+EXPORT_SYMBOL vmlinux 0x3f342c20	da903x_query_status
+EXPORT_SYMBOL vmlinux 0x3f4547a7	put_unused_fd
+EXPORT_SYMBOL vmlinux 0x3f6533ca	tcp_hashinfo
+EXPORT_SYMBOL vmlinux 0x3f80f3f8	dma_pool_create
+EXPORT_SYMBOL vmlinux 0x3f876563	fb_validate_mode
+EXPORT_SYMBOL vmlinux 0x3f9a4410	qdisc_calculate_pkt_len
+EXPORT_SYMBOL vmlinux 0x3fb7f775	xfrm_state_unregister_afinfo
+EXPORT_SYMBOL vmlinux 0x3fc96924	register_netdevice
+EXPORT_SYMBOL vmlinux 0x3ff62317	local_bh_disable
+EXPORT_SYMBOL vmlinux 0x40123aeb	idr_for_each
+EXPORT_SYMBOL vmlinux 0x402d66e0	d_genocide
+EXPORT_SYMBOL vmlinux 0x4047fdc7	mem_map
+EXPORT_SYMBOL vmlinux 0x40513e61	tcp_poll
+EXPORT_SYMBOL vmlinux 0x4059792f	print_hex_dump
+EXPORT_SYMBOL vmlinux 0x405c1144	get_seconds
+EXPORT_SYMBOL vmlinux 0x407136b1	__put_user_8
+EXPORT_SYMBOL vmlinux 0x40833478	unregister_snap_client
+EXPORT_SYMBOL vmlinux 0x409873e3	tty_termios_baud_rate
+EXPORT_SYMBOL vmlinux 0x40a27c37	scsi_dev_info_remove_list
+EXPORT_SYMBOL vmlinux 0x40a6f522	__arm_ioremap
+EXPORT_SYMBOL vmlinux 0x40b831bb	fasync_helper
+EXPORT_SYMBOL vmlinux 0x40c5eecd	cdev_init
+EXPORT_SYMBOL vmlinux 0x40d3e8ff	seq_release
+EXPORT_SYMBOL vmlinux 0x40d6d334	set_device_ro
+EXPORT_SYMBOL vmlinux 0x40f07981	__ashldi3
+EXPORT_SYMBOL vmlinux 0x4101bbde	param_set_copystring
+EXPORT_SYMBOL vmlinux 0x4108e69a	fb_match_mode
+EXPORT_SYMBOL vmlinux 0x4111316c	may_umount
+EXPORT_SYMBOL vmlinux 0x41166725	inet_frags_init_net
+EXPORT_SYMBOL vmlinux 0x412ddc0c	dcache_lock
+EXPORT_SYMBOL vmlinux 0x41344088	param_get_charp
+EXPORT_SYMBOL vmlinux 0x413ffa29	d_rehash
+EXPORT_SYMBOL vmlinux 0x41482d8b	strndup_user
+EXPORT_SYMBOL vmlinux 0x41645826	jbd2_journal_invalidatepage
+EXPORT_SYMBOL vmlinux 0x416983d9	netdev_fix_features
+EXPORT_SYMBOL vmlinux 0x4183091f	blk_queue_ordered
+EXPORT_SYMBOL vmlinux 0x4185cf4b	radix_tree_lookup_slot
+EXPORT_SYMBOL vmlinux 0x41885ac6	tty_port_init
+EXPORT_SYMBOL vmlinux 0x4188d439	neigh_rand_reach_time
+EXPORT_SYMBOL vmlinux 0x418957ef	input_register_handler
+EXPORT_SYMBOL vmlinux 0x41d2f991	start_tty
+EXPORT_SYMBOL vmlinux 0x4211c3c1	zlib_inflateInit2
+EXPORT_SYMBOL vmlinux 0x42224298	sscanf
+EXPORT_SYMBOL vmlinux 0x4226acdb	ps2_drain
+EXPORT_SYMBOL vmlinux 0x422890ee	pci_bus_write_config_byte
+EXPORT_SYMBOL vmlinux 0x424b1e91	tcp_v4_md5_lookup
+EXPORT_SYMBOL vmlinux 0x424f32ae	bio_unmap_user
+EXPORT_SYMBOL vmlinux 0x4252bd10	page_symlink
+EXPORT_SYMBOL vmlinux 0x425f7208	generic_writepages
+EXPORT_SYMBOL vmlinux 0x426b8f1b	__insert_inode_hash
+EXPORT_SYMBOL vmlinux 0x428b8c1c	pci_find_capability
+EXPORT_SYMBOL vmlinux 0x430205aa	__sg_alloc_table
+EXPORT_SYMBOL vmlinux 0x4302d0eb	free_pages
+EXPORT_SYMBOL vmlinux 0x4316e0c8	blk_get_request
+EXPORT_SYMBOL vmlinux 0x4333eadb	param_set_short
+EXPORT_SYMBOL vmlinux 0x434fa55c	release_console_sem
+EXPORT_SYMBOL vmlinux 0x436cd5d8	netif_carrier_off
+EXPORT_SYMBOL vmlinux 0x4395531b	scsi_register_driver
+EXPORT_SYMBOL vmlinux 0x43962bed	ip6_xmit
+EXPORT_SYMBOL vmlinux 0x43ab66c3	param_array_get
+EXPORT_SYMBOL vmlinux 0x4410d36d	journal_get_undo_access
+EXPORT_SYMBOL vmlinux 0x44161c19	unregister_shrinker
+EXPORT_SYMBOL vmlinux 0x44314efb	radix_tree_gang_lookup_tag_slot
+EXPORT_SYMBOL vmlinux 0x444738f7	skb_abort_seq_read
+EXPORT_SYMBOL vmlinux 0x444779c4	nla_find
+EXPORT_SYMBOL vmlinux 0x44643b93	__aeabi_lmul
+EXPORT_SYMBOL vmlinux 0x446a3938	pci_bus_type
+EXPORT_SYMBOL vmlinux 0x44923180	page_readlink
+EXPORT_SYMBOL vmlinux 0x44b911c3	rb_replace_node
+EXPORT_SYMBOL vmlinux 0x44bf0b0f	sg_miter_next
+EXPORT_SYMBOL vmlinux 0x44c13315	jbd2_journal_init_jbd_inode
+EXPORT_SYMBOL vmlinux 0x44c214d1	__wake_up_bit
+EXPORT_SYMBOL vmlinux 0x44cc3366	tty_port_raise_dtr_rts
+EXPORT_SYMBOL vmlinux 0x44d9b38e	netpoll_poll
+EXPORT_SYMBOL vmlinux 0x44da5d0f	__csum_ipv6_magic
+EXPORT_SYMBOL vmlinux 0x44e9a829	match_token
+EXPORT_SYMBOL vmlinux 0x44f21fab	dm_table_get_md
+EXPORT_SYMBOL vmlinux 0x45206242	tcp_initialize_rcv_mss
+EXPORT_SYMBOL vmlinux 0x455ef116	neigh_destroy
+EXPORT_SYMBOL vmlinux 0x4575315d	utf8s_to_utf16s
+EXPORT_SYMBOL vmlinux 0x4586229f	dma_mmap_writecombine
+EXPORT_SYMBOL vmlinux 0x45936267	dma_mmap_coherent
+EXPORT_SYMBOL vmlinux 0x45947727	param_array_set
+EXPORT_SYMBOL vmlinux 0x45a55ec8	__iounmap
+EXPORT_SYMBOL vmlinux 0x45b4c8db	generic_file_splice_write
+EXPORT_SYMBOL vmlinux 0x45bda0d5	system_serial_low
+EXPORT_SYMBOL vmlinux 0x45f42d31	alloc_fddidev
+EXPORT_SYMBOL vmlinux 0x4619ce4f	elv_rb_add
+EXPORT_SYMBOL vmlinux 0x4627e498	bio_integrity_tag_size
+EXPORT_SYMBOL vmlinux 0x462a2e75	match_strlcpy
+EXPORT_SYMBOL vmlinux 0x463bbc0e	inode_init_always
+EXPORT_SYMBOL vmlinux 0x465fa56e	lock_fb_info
+EXPORT_SYMBOL vmlinux 0x46616d6f	scsi_test_unit_ready
+EXPORT_SYMBOL vmlinux 0x46675343	inetdev_by_index
+EXPORT_SYMBOL vmlinux 0x469f5d8b	inode_get_bytes
+EXPORT_SYMBOL vmlinux 0x46a94707	ethtool_op_get_tso
+EXPORT_SYMBOL vmlinux 0x46bec63e	blk_dump_rq_flags
+EXPORT_SYMBOL vmlinux 0x46d3b28c	__div0
+EXPORT_SYMBOL vmlinux 0x46d7fd71	xfrm_find_acq
+EXPORT_SYMBOL vmlinux 0x46f2420f	__napi_schedule
+EXPORT_SYMBOL vmlinux 0x46f840f4	xfrm4_rcv
+EXPORT_SYMBOL vmlinux 0x47031bb2	mdiobus_scan
+EXPORT_SYMBOL vmlinux 0x4711062d	__blk_end_request_all
+EXPORT_SYMBOL vmlinux 0x4719ba4e	kfifo_free
+EXPORT_SYMBOL vmlinux 0x471a2e72	nf_ct_attach
+EXPORT_SYMBOL vmlinux 0x472702ed	generic_unplug_device
+EXPORT_SYMBOL vmlinux 0x472d2a9a	radix_tree_lookup
+EXPORT_SYMBOL vmlinux 0x4749f217	phy_device_create
+EXPORT_SYMBOL vmlinux 0x475100c2	inet_get_local_port_range
+EXPORT_SYMBOL vmlinux 0x47e2be0c	journal_start_commit
+EXPORT_SYMBOL vmlinux 0x47e8d092	security_path_truncate
+EXPORT_SYMBOL vmlinux 0x47f757de	elf_platform
+EXPORT_SYMBOL vmlinux 0x4801fb40	xfrm_state_delete_tunnel
+EXPORT_SYMBOL vmlinux 0x481f027f	generic_permission
+EXPORT_SYMBOL vmlinux 0x484d738e	dquot_scan_active
+EXPORT_SYMBOL vmlinux 0x4859b8bb	rtc_year_days
+EXPORT_SYMBOL vmlinux 0x4867ef36	simple_readpage
+EXPORT_SYMBOL vmlinux 0x486b6407	hweight64
+EXPORT_SYMBOL vmlinux 0x487b92f2	dev_remove_pack
+EXPORT_SYMBOL vmlinux 0x489c3b71	mod_timer_pinned
+EXPORT_SYMBOL vmlinux 0x48a5b067	__machine_arch_type
+EXPORT_SYMBOL vmlinux 0x48bbe618	mmc_add_host
+EXPORT_SYMBOL vmlinux 0x48dc8591	d_lookup
+EXPORT_SYMBOL vmlinux 0x48f9f12d	complete_all
+EXPORT_SYMBOL vmlinux 0x490440d2	xfrm_state_register_afinfo
+EXPORT_SYMBOL vmlinux 0x4908adf1	security_path_rmdir
+EXPORT_SYMBOL vmlinux 0x4912233f	aio_put_req
+EXPORT_SYMBOL vmlinux 0x49439411	genl_unregister_family
+EXPORT_SYMBOL vmlinux 0x49443594	clk_round_rate
+EXPORT_SYMBOL vmlinux 0x49603fb8	security_sb_copy_data
+EXPORT_SYMBOL vmlinux 0x49633863	kfree_skb
+EXPORT_SYMBOL vmlinux 0x49884041	tty_insert_flip_string_flags
+EXPORT_SYMBOL vmlinux 0x49b7f0ab	phy_device_register
+EXPORT_SYMBOL vmlinux 0x49cecab5	pci_write_vpd
+EXPORT_SYMBOL vmlinux 0x49db6385	blk_complete_request
+EXPORT_SYMBOL vmlinux 0x49e182c0	param_get_string
+EXPORT_SYMBOL vmlinux 0x49f0f8ff	set_bdi_congested
+EXPORT_SYMBOL vmlinux 0x49f29c2d	scsi_get_host_dev
+EXPORT_SYMBOL vmlinux 0x4a1f6b7a	pci_wake_from_d3
+EXPORT_SYMBOL vmlinux 0x4a294e1e	dev_alloc_skb
+EXPORT_SYMBOL vmlinux 0x4a358252	__bitmap_subset
+EXPORT_SYMBOL vmlinux 0x4a72e2b1	bd_release
+EXPORT_SYMBOL vmlinux 0x4a809ca1	skb_recv_datagram
+EXPORT_SYMBOL vmlinux 0x4a971ec7	radix_tree_delete
+EXPORT_SYMBOL vmlinux 0x4a9f4914	rfkill_set_led_trigger_name
+EXPORT_SYMBOL vmlinux 0x4af39e3e	sync_dirty_buffer
+EXPORT_SYMBOL vmlinux 0x4afba478	rfkill_get_led_trigger_name
+EXPORT_SYMBOL vmlinux 0x4afe9a77	scsi_partsize
+EXPORT_SYMBOL vmlinux 0x4b06fd74	netdev_set_master
+EXPORT_SYMBOL vmlinux 0x4b1099c5	rtc_dev_update_irq_enable_emul
+EXPORT_SYMBOL vmlinux 0x4b12580f	__blockdev_direct_IO
+EXPORT_SYMBOL vmlinux 0x4b17dffa	wait_on_page_bit
+EXPORT_SYMBOL vmlinux 0x4b204d5d	sync_mapping_buffers
+EXPORT_SYMBOL vmlinux 0x4b34fbf5	block_all_signals
+EXPORT_SYMBOL vmlinux 0x4b3bbaf4	rfkill_pause_polling
+EXPORT_SYMBOL vmlinux 0x4b5fae97	simple_write_end
+EXPORT_SYMBOL vmlinux 0x4b79975a	save_time_delta
+EXPORT_SYMBOL vmlinux 0x4b7fd036	set_create_files_as
+EXPORT_SYMBOL vmlinux 0x4b8edde9	complete_and_exit
+EXPORT_SYMBOL vmlinux 0x4b9ad1f5	textsearch_unregister
+EXPORT_SYMBOL vmlinux 0x4b9f3684	kfifo_init
+EXPORT_SYMBOL vmlinux 0x4bbc3e5f	pm_flags
+EXPORT_SYMBOL vmlinux 0x4be89934	blk_queue_merge_bvec
+EXPORT_SYMBOL vmlinux 0x4c1182cb	bitmap_scnprintf
+EXPORT_SYMBOL vmlinux 0x4c349f6f	alloc_hippi_dev
+EXPORT_SYMBOL vmlinux 0x4c7a7489	xfrm_register_mode
+EXPORT_SYMBOL vmlinux 0x4c835d1a	fb_class
+EXPORT_SYMBOL vmlinux 0x4c9f6838	rt6_lookup
+EXPORT_SYMBOL vmlinux 0x4cbbd171	__bitmap_weight
+EXPORT_SYMBOL vmlinux 0x4cd41b24	bio_kmalloc
+EXPORT_SYMBOL vmlinux 0x4d0d163d	copy_page
+EXPORT_SYMBOL vmlinux 0x4d34c695	phy_attach_direct
+EXPORT_SYMBOL vmlinux 0x4d3c153f	sigprocmask
+EXPORT_SYMBOL vmlinux 0x4d5c913d	sock_create_lite
+EXPORT_SYMBOL vmlinux 0x4d8a6f2c	jbd2_journal_destroy
+EXPORT_SYMBOL vmlinux 0x4d936809	current_fs_time
+EXPORT_SYMBOL vmlinux 0x4dc45be9	nf_log_unbind_pf
+EXPORT_SYMBOL vmlinux 0x4dc9a04a	dcache_dir_close
+EXPORT_SYMBOL vmlinux 0x4dcb0eed	hippi_mac_addr
+EXPORT_SYMBOL vmlinux 0x4dec6038	memscan
+EXPORT_SYMBOL vmlinux 0x4df119fa	__bitmap_parse
+EXPORT_SYMBOL vmlinux 0x4e0009da	idr_get_new_above
+EXPORT_SYMBOL vmlinux 0x4e069249	security_tun_dev_post_create
+EXPORT_SYMBOL vmlinux 0x4e125e6d	rfkill_set_hw_state
+EXPORT_SYMBOL vmlinux 0x4e2646eb	truncate_pagecache
+EXPORT_SYMBOL vmlinux 0x4e301a4d	kunmap
+EXPORT_SYMBOL vmlinux 0x4e3567f7	match_int
+EXPORT_SYMBOL vmlinux 0x4e41c847	gen_pool_create
+EXPORT_SYMBOL vmlinux 0x4e6e8ea7	fg_console
+EXPORT_SYMBOL vmlinux 0x4e830a3e	strnicmp
+EXPORT_SYMBOL vmlinux 0x4e833757	unregister_mtd_chip_driver
+EXPORT_SYMBOL vmlinux 0x4e83879c	udp_lib_get_port
+EXPORT_SYMBOL vmlinux 0x4e967d91	xfrm_prepare_input
+EXPORT_SYMBOL vmlinux 0x4ee2d00a	tcp_recvmsg
+EXPORT_SYMBOL vmlinux 0x4ee4f9d7	seq_bitmap
+EXPORT_SYMBOL vmlinux 0x4eefaf04	close_bdev_exclusive
+EXPORT_SYMBOL vmlinux 0x4ef041b0	serio_open
+EXPORT_SYMBOL vmlinux 0x4ef374b9	generic_error_remove_page
+EXPORT_SYMBOL vmlinux 0x4efa54e3	__generic_file_aio_write
+EXPORT_SYMBOL vmlinux 0x4f0ea0c0	up
+EXPORT_SYMBOL vmlinux 0x4f1cd128	security_tun_dev_create
+EXPORT_SYMBOL vmlinux 0x4f25becb	pci_request_selected_regions_exclusive
+EXPORT_SYMBOL vmlinux 0x4f4044fb	file_fsync
+EXPORT_SYMBOL vmlinux 0x4f476e96	init_cdrom_command
+EXPORT_SYMBOL vmlinux 0x4f578376	genphy_config_advert
+EXPORT_SYMBOL vmlinux 0x4fb0feaa	xfrm_state_lookup
+EXPORT_SYMBOL vmlinux 0x4fb8cd7a	journal_stop
+EXPORT_SYMBOL vmlinux 0x4fd32a4e	ip6_route_me_harder
+EXPORT_SYMBOL vmlinux 0x4fdf3169	con_set_default_unimap
+EXPORT_SYMBOL vmlinux 0x4fe11eaf	vfs_write
+EXPORT_SYMBOL vmlinux 0x50013a63	nla_append
+EXPORT_SYMBOL vmlinux 0x5006262f	__set_page_dirty_buffers
+EXPORT_SYMBOL vmlinux 0x50211ee3	tcp_free_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x506746b6	getrawmonotonic
+EXPORT_SYMBOL vmlinux 0x507485c4	sock_no_socketpair
+EXPORT_SYMBOL vmlinux 0x50800676	alloc_trdev
+EXPORT_SYMBOL vmlinux 0x50870c2a	n_tty_ioctl_helper
+EXPORT_SYMBOL vmlinux 0x508cf41d	check_disk_size_change
+EXPORT_SYMBOL vmlinux 0x5093fa82	_clear_bit_le
+EXPORT_SYMBOL vmlinux 0x51047ae2	tcf_action_exec
+EXPORT_SYMBOL vmlinux 0x5107a5c4	seq_write
+EXPORT_SYMBOL vmlinux 0x511510ca	wait_for_key_construction
+EXPORT_SYMBOL vmlinux 0x5118c382	secure_dccp_sequence_number
+EXPORT_SYMBOL vmlinux 0x5126dae8	__mmc_claim_host
+EXPORT_SYMBOL vmlinux 0x51493d94	finish_wait
+EXPORT_SYMBOL vmlinux 0x51908eb8	__raw_writesl
+EXPORT_SYMBOL vmlinux 0x51dce73b	xfrm_state_walk_init
+EXPORT_SYMBOL vmlinux 0x51e77c97	pfn_valid
+EXPORT_SYMBOL vmlinux 0x51ef33b8	kstrndup
+EXPORT_SYMBOL vmlinux 0x52026cdf	security_sb_parse_opts_str
+EXPORT_SYMBOL vmlinux 0x522129a2	input_filter_device
+EXPORT_SYMBOL vmlinux 0x52301ced	__devm_request_region
+EXPORT_SYMBOL vmlinux 0x52354a0b	mutex_trylock
+EXPORT_SYMBOL vmlinux 0x52609b9f	phy_register_fixup_for_id
+EXPORT_SYMBOL vmlinux 0x52760ca9	getnstimeofday
+EXPORT_SYMBOL vmlinux 0x528be3a2	__tcf_em_tree_match
+EXPORT_SYMBOL vmlinux 0x528c709d	simple_read_from_buffer
+EXPORT_SYMBOL vmlinux 0x528c911c	del_timer
+EXPORT_SYMBOL vmlinux 0x52a58c24	ifla_policy
+EXPORT_SYMBOL vmlinux 0x52d7b2fd	llc_sap_list
+EXPORT_SYMBOL vmlinux 0x52ebb126	param_get_ushort
+EXPORT_SYMBOL vmlinux 0x52f53c4a	__mark_inode_dirty
+EXPORT_SYMBOL vmlinux 0x530b1e98	pm_suspend
+EXPORT_SYMBOL vmlinux 0x53248d0f	__xfrm_policy_check
+EXPORT_SYMBOL vmlinux 0x53326531	mempool_alloc_pages
+EXPORT_SYMBOL vmlinux 0x5339f1f9	pci_fixup_cardbus
+EXPORT_SYMBOL vmlinux 0x53575a64	sk_wait_data
+EXPORT_SYMBOL vmlinux 0x538383c0	unregister_inet6addr_notifier
+EXPORT_SYMBOL vmlinux 0x5383c379	invalidate_inode_buffers
+EXPORT_SYMBOL vmlinux 0x53c0767c	sk_chk_filter
+EXPORT_SYMBOL vmlinux 0x53ece63d	blk_recount_segments
+EXPORT_SYMBOL vmlinux 0x54004c7e	sk_stream_kill_queues
+EXPORT_SYMBOL vmlinux 0x5415b3ba	dmam_alloc_coherent
+EXPORT_SYMBOL vmlinux 0x54290dc9	nla_validate
+EXPORT_SYMBOL vmlinux 0x542f0714	bdi_register_dev
+EXPORT_SYMBOL vmlinux 0x54388724	tcp_disconnect
+EXPORT_SYMBOL vmlinux 0x543f5bd5	free_task
+EXPORT_SYMBOL vmlinux 0x5468124b	single_release
+EXPORT_SYMBOL vmlinux 0x546edf23	sock_no_mmap
+EXPORT_SYMBOL vmlinux 0x5474cfad	security_inode_notifysecctx
+EXPORT_SYMBOL vmlinux 0x54817cc1	posix_test_lock
+EXPORT_SYMBOL vmlinux 0x54a9050b	sock_wmalloc
+EXPORT_SYMBOL vmlinux 0x54d42936	seq_printf
+EXPORT_SYMBOL vmlinux 0x54e6fcdd	net_enable_timestamp
+EXPORT_SYMBOL vmlinux 0x54eacb45	lookup_hash
+EXPORT_SYMBOL vmlinux 0x54f6fb78	blk_unplug
+EXPORT_SYMBOL vmlinux 0x551affeb	input_unregister_handler
+EXPORT_SYMBOL vmlinux 0x553c093a	dev_set_mac_address
+EXPORT_SYMBOL vmlinux 0x5559fcc4	blk_queue_max_segment_size
+EXPORT_SYMBOL vmlinux 0x556643e3	llc_sap_list_lock
+EXPORT_SYMBOL vmlinux 0x5594be03	bitmap_remap
+EXPORT_SYMBOL vmlinux 0x55a533dc	generic_file_mmap
+EXPORT_SYMBOL vmlinux 0x55c77acf	__destroy_inode
+EXPORT_SYMBOL vmlinux 0x55d6ac37	blk_remove_plug
+EXPORT_SYMBOL vmlinux 0x55fdaf24	i2c_smbus_xfer
+EXPORT_SYMBOL vmlinux 0x5600904f	fb_get_color_depth
+EXPORT_SYMBOL vmlinux 0x5602ad9d	tcf_exts_destroy
+EXPORT_SYMBOL vmlinux 0x5603cf43	do_settimeofday
+EXPORT_SYMBOL vmlinux 0x5614b010	xfrm_policy_walk_done
+EXPORT_SYMBOL vmlinux 0x5635a60a	vmalloc_user
+EXPORT_SYMBOL vmlinux 0x5658a77b	mapping_tagged
+EXPORT_SYMBOL vmlinux 0x5668caf0	icst307_khz_to_vco
+EXPORT_SYMBOL vmlinux 0x5679490d	scsi_dma_unmap
+EXPORT_SYMBOL vmlinux 0x568655e4	invalidate_mapping_pages
+EXPORT_SYMBOL vmlinux 0x56c76e2f	blk_end_request_all
+EXPORT_SYMBOL vmlinux 0x56c8799d	scsi_kunmap_atomic_sg
+EXPORT_SYMBOL vmlinux 0x56d5ef51	tty_vhangup
+EXPORT_SYMBOL vmlinux 0x56df5a59	mmc_regulator_set_ocr
+EXPORT_SYMBOL vmlinux 0x56e75408	bio_clone
+EXPORT_SYMBOL vmlinux 0x56e99062	security_inode_readlink
+EXPORT_SYMBOL vmlinux 0x56ff54be	inet_frag_find
+EXPORT_SYMBOL vmlinux 0x571eb7b8	skb_copy_bits
+EXPORT_SYMBOL vmlinux 0x572e85d4	blk_lookup_devt
+EXPORT_SYMBOL vmlinux 0x573a8d01	jbd2_journal_release_jbd_inode
+EXPORT_SYMBOL vmlinux 0x574134cb	phy_driver_unregister
+EXPORT_SYMBOL vmlinux 0x5796a7d4	i2c_smbus_write_block_data
+EXPORT_SYMBOL vmlinux 0x57a6504e	vsnprintf
+EXPORT_SYMBOL vmlinux 0x57b57ebe	jiffies_to_timespec
+EXPORT_SYMBOL vmlinux 0x57bea600	ethtool_op_set_tx_ipv6_csum
+EXPORT_SYMBOL vmlinux 0x57c28d47	pci_enable_wake
+EXPORT_SYMBOL vmlinux 0x57db7242	mangle_path
+EXPORT_SYMBOL vmlinux 0x57e88617	do_munmap
+EXPORT_SYMBOL vmlinux 0x57f4c344	pcim_iounmap_regions
+EXPORT_SYMBOL vmlinux 0x5838f6c9	rtc_valid_tm
+EXPORT_SYMBOL vmlinux 0x5843a469	pci_iomap
+EXPORT_SYMBOL vmlinux 0x5857e434	groups_free
+EXPORT_SYMBOL vmlinux 0x5863c58f	posix_lock_file
+EXPORT_SYMBOL vmlinux 0x5869b2fe	inet_register_protosw
+EXPORT_SYMBOL vmlinux 0x586f3832	generic_file_buffered_write
+EXPORT_SYMBOL vmlinux 0x58944779	get_phy_id
+EXPORT_SYMBOL vmlinux 0x58e8d79b	cdrom_get_last_written
+EXPORT_SYMBOL vmlinux 0x58ff05f6	ip_xfrm_me_harder
+EXPORT_SYMBOL vmlinux 0x590aba7b	sg_miter_stop
+EXPORT_SYMBOL vmlinux 0x591363e7	thermal_zone_device_unregister
+EXPORT_SYMBOL vmlinux 0x592ba314	get_phy_device
+EXPORT_SYMBOL vmlinux 0x5934392b	fb_register_client
+EXPORT_SYMBOL vmlinux 0x5947ef0d	noop_qdisc
+EXPORT_SYMBOL vmlinux 0x594bf15b	ioport_map
+EXPORT_SYMBOL vmlinux 0x594e1317	__modsi3
+EXPORT_SYMBOL vmlinux 0x59586d4f	ethtool_op_set_tso
+EXPORT_SYMBOL vmlinux 0x5997c5df	iget_locked
+EXPORT_SYMBOL vmlinux 0x59b44d6b	security_path_unlink
+EXPORT_SYMBOL vmlinux 0x59bb9685	skb_gso_segment
+EXPORT_SYMBOL vmlinux 0x59d5c0bf	inet_addr_type
+EXPORT_SYMBOL vmlinux 0x59d696b6	register_module_notifier
+EXPORT_SYMBOL vmlinux 0x59d8223a	ioport_resource
+EXPORT_SYMBOL vmlinux 0x59e5070d	__do_div64
+EXPORT_SYMBOL vmlinux 0x59fa9727	pci_remove_bus
+EXPORT_SYMBOL vmlinux 0x5a4d92ce	scsi_free_host_dev
+EXPORT_SYMBOL vmlinux 0x5a744b86	netlink_set_nonroot
+EXPORT_SYMBOL vmlinux 0x5a9fee1a	qdisc_create_dflt
+EXPORT_SYMBOL vmlinux 0x5ac7961e	blk_alloc_queue
+EXPORT_SYMBOL vmlinux 0x5ae3201a	sk_run_filter
+EXPORT_SYMBOL vmlinux 0x5af42b66	bio_add_pc_page
+EXPORT_SYMBOL vmlinux 0x5b19634d	div_s64_rem
+EXPORT_SYMBOL vmlinux 0x5b249ead	netif_rx
+EXPORT_SYMBOL vmlinux 0x5b3499e0	netpoll_setup
+EXPORT_SYMBOL vmlinux 0x5b36fe43	backlight_device_register
+EXPORT_SYMBOL vmlinux 0x5b474ddd	sock_no_sendmsg
+EXPORT_SYMBOL vmlinux 0x5b5e7e91	tty_port_free_xmit_buf
+EXPORT_SYMBOL vmlinux 0x5b778e04	__netdev_alloc_skb
+EXPORT_SYMBOL vmlinux 0x5b90605b	sock_queue_rcv_skb
+EXPORT_SYMBOL vmlinux 0x5c13b3e1	bioset_free
+EXPORT_SYMBOL vmlinux 0x5c2b08c6	uart_resume_port
+EXPORT_SYMBOL vmlinux 0x5c673bc8	tty_mutex
+EXPORT_SYMBOL vmlinux 0x5c917b71	sock_no_shutdown
+EXPORT_SYMBOL vmlinux 0x5c9284a0	processor_id
+EXPORT_SYMBOL vmlinux 0x5cac41f6	scsi_device_lookup_by_target
+EXPORT_SYMBOL vmlinux 0x5cb25b1c	scsi_is_host_device
+EXPORT_SYMBOL vmlinux 0x5cd5491e	bh_uptodate_or_lock
+EXPORT_SYMBOL vmlinux 0x5cdaaf6c	fd_install
+EXPORT_SYMBOL vmlinux 0x5d05cb2c	cdrom_open
+EXPORT_SYMBOL vmlinux 0x5d12b3fc	twl4030_i2c_write_u8
+EXPORT_SYMBOL vmlinux 0x5d3f039d	gnet_stats_copy_basic
+EXPORT_SYMBOL vmlinux 0x5d49da54	sock_create_kern
+EXPORT_SYMBOL vmlinux 0x5d56ac3f	dcache_dir_open
+EXPORT_SYMBOL vmlinux 0x5dae54b4	mutex_lock_interruptible
+EXPORT_SYMBOL vmlinux 0x5db604b4	ps2_sendbyte
+EXPORT_SYMBOL vmlinux 0x5dcdff00	dst_discard
+EXPORT_SYMBOL vmlinux 0x5dd7048a	setup_new_exec
+EXPORT_SYMBOL vmlinux 0x5df3ce71	mmc_power_save_host
+EXPORT_SYMBOL vmlinux 0x5df6652d	nf_ip6_checksum
+EXPORT_SYMBOL vmlinux 0x5dfb1936	ppp_register_net_channel
+EXPORT_SYMBOL vmlinux 0x5e017bbc	tcp_make_synack
+EXPORT_SYMBOL vmlinux 0x5e0bb06d	pci_request_selected_regions
+EXPORT_SYMBOL vmlinux 0x5e1a9538	generic_removexattr
+EXPORT_SYMBOL vmlinux 0x5e576325	fifo_set_limit
+EXPORT_SYMBOL vmlinux 0x5e627f4b	call_usermodehelper_setup
+EXPORT_SYMBOL vmlinux 0x5e95b1cd	current_umask
+EXPORT_SYMBOL vmlinux 0x5ea520c5	tcp_select_initial_window
+EXPORT_SYMBOL vmlinux 0x5eb4a4c5	tty_port_tty_get
+EXPORT_SYMBOL vmlinux 0x5ebb56fb	down_read
+EXPORT_SYMBOL vmlinux 0x5ed040b0	pm_set_vt_switch
+EXPORT_SYMBOL vmlinux 0x5edd0762	bin2bcd
+EXPORT_SYMBOL vmlinux 0x5ef9b966	dquot_alloc
+EXPORT_SYMBOL vmlinux 0x5f1c09fd	key_validate
+EXPORT_SYMBOL vmlinux 0x5f3d0eeb	i2c_smbus_read_block_data
+EXPORT_SYMBOL vmlinux 0x5f3feab1	vfs_llseek
+EXPORT_SYMBOL vmlinux 0x5f70d23d	starget_for_each_device
+EXPORT_SYMBOL vmlinux 0x5f737f20	__scm_destroy
+EXPORT_SYMBOL vmlinux 0x5f754e5a	memset
+EXPORT_SYMBOL vmlinux 0x5f8a904e	__scsi_device_lookup
+EXPORT_SYMBOL vmlinux 0x5fabd393	create_empty_buffers
+EXPORT_SYMBOL vmlinux 0x5feaed55	scsi_setup_blk_pc_cmnd
+EXPORT_SYMBOL vmlinux 0x60002231	xfrm_policy_destroy
+EXPORT_SYMBOL vmlinux 0x600683d3	do_unblank_screen
+EXPORT_SYMBOL vmlinux 0x6029b2c1	uart_remove_one_port
+EXPORT_SYMBOL vmlinux 0x60414316	pci_bus_assign_resources
+EXPORT_SYMBOL vmlinux 0x6047c4da	gen_pool_destroy
+EXPORT_SYMBOL vmlinux 0x6070dfa5	dm_exception_store_destroy
+EXPORT_SYMBOL vmlinux 0x6090c5ce	blk_rq_unmap_user
+EXPORT_SYMBOL vmlinux 0x609f1c7e	synchronize_net
+EXPORT_SYMBOL vmlinux 0x60a0ebad	__tracepoint_kmem_cache_alloc_node
+EXPORT_SYMBOL vmlinux 0x60a32ea9	pm_power_off
+EXPORT_SYMBOL vmlinux 0x60a4efe2	ida_get_new
+EXPORT_SYMBOL vmlinux 0x60e01104	restore_time_delta
+EXPORT_SYMBOL vmlinux 0x60e1ce0a	open_exec
+EXPORT_SYMBOL vmlinux 0x612390ad	netpoll_set_trap
+EXPORT_SYMBOL vmlinux 0x612ec6df	key_put
+EXPORT_SYMBOL vmlinux 0x615490c8	d_path
+EXPORT_SYMBOL vmlinux 0x618d8299	set_notify_swap_entry_free
+EXPORT_SYMBOL vmlinux 0x6193995f	posix_unblock_lock
+EXPORT_SYMBOL vmlinux 0x61b7b126	simple_strtoull
+EXPORT_SYMBOL vmlinux 0x61bfa972	inet_ioctl
+EXPORT_SYMBOL vmlinux 0x61ce558c	vc_resize
+EXPORT_SYMBOL vmlinux 0x621102f1	bdput
+EXPORT_SYMBOL vmlinux 0x62235e08	release_firmware
+EXPORT_SYMBOL vmlinux 0x62283f90	scsi_free_command
+EXPORT_SYMBOL vmlinux 0x62378d6c	i2c_add_adapter
+EXPORT_SYMBOL vmlinux 0x624770bd	delayed_slow_work_enqueue
+EXPORT_SYMBOL vmlinux 0x625d0937	jbd2_journal_errno
+EXPORT_SYMBOL vmlinux 0x62607586	flock_lock_file_wait
+EXPORT_SYMBOL vmlinux 0x62737e1d	sock_unregister
+EXPORT_SYMBOL vmlinux 0x62827bec	security_secctx_to_secid
+EXPORT_SYMBOL vmlinux 0x62994ec4	scsi_target_quiesce
+EXPORT_SYMBOL vmlinux 0x62a741b8	security_inode_setsecctx
+EXPORT_SYMBOL vmlinux 0x62b37737	key_link
+EXPORT_SYMBOL vmlinux 0x62b501cf	neigh_ifdown
+EXPORT_SYMBOL vmlinux 0x62cc569e	cpu_present_mask
+EXPORT_SYMBOL vmlinux 0x62cec5f4	thermal_cooling_device_unregister
+EXPORT_SYMBOL vmlinux 0x62eaf132	pci_vpd_truncate
+EXPORT_SYMBOL vmlinux 0x62f2e03c	register_gifconf
+EXPORT_SYMBOL vmlinux 0x62f37cba	vfs_quota_sync
+EXPORT_SYMBOL vmlinux 0x633bc4af	llc_build_and_send_ui_pkt
+EXPORT_SYMBOL vmlinux 0x6368cd77	__skb_recv_datagram
+EXPORT_SYMBOL vmlinux 0x6381840d	security_inode_getsecctx
+EXPORT_SYMBOL vmlinux 0x63863c25	netif_napi_del
+EXPORT_SYMBOL vmlinux 0x63ab1248	sync_blockdev
+EXPORT_SYMBOL vmlinux 0x63ecad53	register_netdevice_notifier
+EXPORT_SYMBOL vmlinux 0x63efc536	radix_tree_prev_hole
+EXPORT_SYMBOL vmlinux 0x63fa5c17	mmc_unregister_driver
+EXPORT_SYMBOL vmlinux 0x6403e338	tcp_memory_pressure
+EXPORT_SYMBOL vmlinux 0x640a7078	posix_acl_create_masq
+EXPORT_SYMBOL vmlinux 0x641749b2	napi_gro_receive
+EXPORT_SYMBOL vmlinux 0x6452354c	request_key
+EXPORT_SYMBOL vmlinux 0x64534b35	nonseekable_open
+EXPORT_SYMBOL vmlinux 0x6457112f	inet_frag_destroy
+EXPORT_SYMBOL vmlinux 0x64722851	blk_start_request
+EXPORT_SYMBOL vmlinux 0x64924f5d	tty_kref_put
+EXPORT_SYMBOL vmlinux 0x64999478	congestion_wait
+EXPORT_SYMBOL vmlinux 0x64b1f4fb	i2c_del_driver
+EXPORT_SYMBOL vmlinux 0x64b59bee	sock_no_accept
+EXPORT_SYMBOL vmlinux 0x64c3f8cb	kill_litter_super
+EXPORT_SYMBOL vmlinux 0x64c989b3	jbd2_journal_restart
+EXPORT_SYMBOL vmlinux 0x64e5666a	xfrm_state_check_expire
+EXPORT_SYMBOL vmlinux 0x64efed0d	nf_hook_slow
+EXPORT_SYMBOL vmlinux 0x64f80bf4	dmam_pool_create
+EXPORT_SYMBOL vmlinux 0x6511ddb9	security_sb_set_mnt_opts
+EXPORT_SYMBOL vmlinux 0x651a4139	test_taint
+EXPORT_SYMBOL vmlinux 0x65378645	scsi_device_set_state
+EXPORT_SYMBOL vmlinux 0x65408378	zlib_inflate_blob
+EXPORT_SYMBOL vmlinux 0x65414e67	dev_valid_name
+EXPORT_SYMBOL vmlinux 0x65417dd4	xfrm_state_delete
+EXPORT_SYMBOL vmlinux 0x65553d2c	bdi_init
+EXPORT_SYMBOL vmlinux 0x6566e3ad	rfkill_set_sw_state
+EXPORT_SYMBOL vmlinux 0x659311d4	follow_down
+EXPORT_SYMBOL vmlinux 0x65a70ba1	sock_no_ioctl
+EXPORT_SYMBOL vmlinux 0x65a7faad	sk_common_release
+EXPORT_SYMBOL vmlinux 0x661ba793	blk_queue_logical_block_size
+EXPORT_SYMBOL vmlinux 0x665bd53d	vfs_dq_transfer
+EXPORT_SYMBOL vmlinux 0x666a586d	inet_frag_evictor
+EXPORT_SYMBOL vmlinux 0x668da8d5	zlib_inflateIncomp
+EXPORT_SYMBOL vmlinux 0x668fc90d	clk_enable
+EXPORT_SYMBOL vmlinux 0x66bb63ca	kobject_del
+EXPORT_SYMBOL vmlinux 0x67053080	current_kernel_time
+EXPORT_SYMBOL vmlinux 0x673beda0	i2c_get_adapter
+EXPORT_SYMBOL vmlinux 0x67672529	ip_setsockopt
+EXPORT_SYMBOL vmlinux 0x678e988d	blk_rq_map_user
+EXPORT_SYMBOL vmlinux 0x67a05823	nf_log_bind_pf
+EXPORT_SYMBOL vmlinux 0x67a0cffe	per_cpu____irq_regs
+EXPORT_SYMBOL vmlinux 0x67b27ec1	tty_std_termios
+EXPORT_SYMBOL vmlinux 0x67be1d3d	cpu_active_mask
+EXPORT_SYMBOL vmlinux 0x67e50d6e	destroy_EII_client
+EXPORT_SYMBOL vmlinux 0x67f2cee5	udp_table
+EXPORT_SYMBOL vmlinux 0x6806e58e	pci_pme_capable
+EXPORT_SYMBOL vmlinux 0x680f2f82	pci_set_consistent_dma_mask
+EXPORT_SYMBOL vmlinux 0x681636ac	clear_page_dirty_for_io
+EXPORT_SYMBOL vmlinux 0x6819f69a	ethtool_op_set_ufo
+EXPORT_SYMBOL vmlinux 0x685d91a1	blk_queue_bounce_limit
+EXPORT_SYMBOL vmlinux 0x6894a34b	pci_find_parent_resource
+EXPORT_SYMBOL vmlinux 0x6898a756	sg_init_table
+EXPORT_SYMBOL vmlinux 0x68b8daa9	cfb_fillrect
+EXPORT_SYMBOL vmlinux 0x690198e6	clocksource_unregister
+EXPORT_SYMBOL vmlinux 0x6934a4b5	mmc_alloc_host
+EXPORT_SYMBOL vmlinux 0x6958744e	scsi_add_host_with_dma
+EXPORT_SYMBOL vmlinux 0x695b3c55	set_blocksize
+EXPORT_SYMBOL vmlinux 0x695b4354	scsi_eh_prep_cmnd
+EXPORT_SYMBOL vmlinux 0x6971447a	rtc_month_days
+EXPORT_SYMBOL vmlinux 0x69759caf	bitmap_endwrite
+EXPORT_SYMBOL vmlinux 0x6980fe91	param_get_int
+EXPORT_SYMBOL vmlinux 0x69827a86	jbd2_journal_update_format
+EXPORT_SYMBOL vmlinux 0x69927dff	try_acquire_console_sem
+EXPORT_SYMBOL vmlinux 0x69aceb7e	udp_poll
+EXPORT_SYMBOL vmlinux 0x69af2327	idr_init
+EXPORT_SYMBOL vmlinux 0x69c8c1d5	security_req_classify_flow
+EXPORT_SYMBOL vmlinux 0x69cde25d	unlock_rename
+EXPORT_SYMBOL vmlinux 0x69d38ed9	__scsi_print_sense
+EXPORT_SYMBOL vmlinux 0x69e27c7a	bitmap_copy_le
+EXPORT_SYMBOL vmlinux 0x6a037cf1	mempool_kfree
+EXPORT_SYMBOL vmlinux 0x6a18e5e5	sock_alloc_send_pskb
+EXPORT_SYMBOL vmlinux 0x6a4650af	pcibios_bus_to_resource
+EXPORT_SYMBOL vmlinux 0x6a47571d	__set_personality
+EXPORT_SYMBOL vmlinux 0x6a47b6a2	tcp_getsockopt
+EXPORT_SYMBOL vmlinux 0x6a54fd4e	unregister_md_personality
+EXPORT_SYMBOL vmlinux 0x6a76f3ac	blk_iopoll_enable
+EXPORT_SYMBOL vmlinux 0x6a832946	lock_may_write
+EXPORT_SYMBOL vmlinux 0x6ab9fecc	pci_get_device
+EXPORT_SYMBOL vmlinux 0x6ac22bb2	d_delete
+EXPORT_SYMBOL vmlinux 0x6ac45c28	__up_write
+EXPORT_SYMBOL vmlinux 0x6ad065f4	param_set_charp
+EXPORT_SYMBOL vmlinux 0x6b173ff6	scsi_device_resume
+EXPORT_SYMBOL vmlinux 0x6b1b67d3	__bdevname
+EXPORT_SYMBOL vmlinux 0x6b28395b	sysctl_jiffies
+EXPORT_SYMBOL vmlinux 0x6b2dc060	dump_stack
+EXPORT_SYMBOL vmlinux 0x6bb8458e	generic_mii_ioctl
+EXPORT_SYMBOL vmlinux 0x6bc3fbc0	__unregister_chrdev
+EXPORT_SYMBOL vmlinux 0x6bdcfd99	qdisc_class_hash_remove
+EXPORT_SYMBOL vmlinux 0x6c1ce5ce	strcspn
+EXPORT_SYMBOL vmlinux 0x6c2e1707	keyring_clear
+EXPORT_SYMBOL vmlinux 0x6c36a5c1	__mutex_init
+EXPORT_SYMBOL vmlinux 0x6c61ce70	num_registered_fb
+EXPORT_SYMBOL vmlinux 0x6c702af7	sysctl_udp_rmem_min
+EXPORT_SYMBOL vmlinux 0x6c7df0b5	llc_add_pack
+EXPORT_SYMBOL vmlinux 0x6c83208a	otg_put_transceiver
+EXPORT_SYMBOL vmlinux 0x6c930c20	tcf_hash_lookup
+EXPORT_SYMBOL vmlinux 0x6cba3052	misc_register
+EXPORT_SYMBOL vmlinux 0x6cc63561	genphy_update_link
+EXPORT_SYMBOL vmlinux 0x6cc700f7	devm_ioport_unmap
+EXPORT_SYMBOL vmlinux 0x6cdc5c6b	nla_strlcpy
+EXPORT_SYMBOL vmlinux 0x6ceeac39	bio_alloc_bioset
+EXPORT_SYMBOL vmlinux 0x6d06679d	generic_fillattr
+EXPORT_SYMBOL vmlinux 0x6d27ef64	__bitmap_empty
+EXPORT_SYMBOL vmlinux 0x6d288375	radix_tree_next_hole
+EXPORT_SYMBOL vmlinux 0x6d294e43	clock_t_to_jiffies
+EXPORT_SYMBOL vmlinux 0x6d340f64	tty_termios_input_baud_rate
+EXPORT_SYMBOL vmlinux 0x6d5eadcf	bitmap_end_sync
+EXPORT_SYMBOL vmlinux 0x6d662533	_find_first_bit_le
+EXPORT_SYMBOL vmlinux 0x6d6cbadc	rb_last
+EXPORT_SYMBOL vmlinux 0x6def2db2	half_md4_transform
+EXPORT_SYMBOL vmlinux 0x6e04baba	inet_dev_addr_type
+EXPORT_SYMBOL vmlinux 0x6e05b659	blk_peek_request
+EXPORT_SYMBOL vmlinux 0x6e1f5971	jbd2_journal_check_available_features
+EXPORT_SYMBOL vmlinux 0x6e4baba8	i2c_smbus_read_byte_data
+EXPORT_SYMBOL vmlinux 0x6e611cb7	vga_client_register
+EXPORT_SYMBOL vmlinux 0x6e67218e	input_grab_device
+EXPORT_SYMBOL vmlinux 0x6e6cb5b8	qdisc_class_hash_grow
+EXPORT_SYMBOL vmlinux 0x6e720ff2	rtnl_unlock
+EXPORT_SYMBOL vmlinux 0x6e749094	tty_port_close
+EXPORT_SYMBOL vmlinux 0x6e9dd606	__symbol_put
+EXPORT_SYMBOL vmlinux 0x6ea0a611	register_md_personality
+EXPORT_SYMBOL vmlinux 0x6eb3d276	dev_add_pack
+EXPORT_SYMBOL vmlinux 0x6eedefb7	tr_type_trans
+EXPORT_SYMBOL vmlinux 0x6f144950	vfs_path_lookup
+EXPORT_SYMBOL vmlinux 0x6f2b6f0a	__generic_block_fiemap
+EXPORT_SYMBOL vmlinux 0x6f4e1ad0	bio_integrity_endio
+EXPORT_SYMBOL vmlinux 0x6f5639a7	sock_no_sendpage
+EXPORT_SYMBOL vmlinux 0x6f7b418c	skb_tx_hash
+EXPORT_SYMBOL vmlinux 0x6f9d50d5	registered_fb
+EXPORT_SYMBOL vmlinux 0x6f9fac71	blk_queue_prep_rq
+EXPORT_SYMBOL vmlinux 0x6fa331e3	tty_shutdown
+EXPORT_SYMBOL vmlinux 0x6fcb87a1	touch_softlockup_watchdog
+EXPORT_SYMBOL vmlinux 0x6fff393f	time_to_tm
+EXPORT_SYMBOL vmlinux 0x701d0ebd	snprintf
+EXPORT_SYMBOL vmlinux 0x70321bb8	blk_init_queue_node
+EXPORT_SYMBOL vmlinux 0x70523a7a	__cond_resched_softirq
+EXPORT_SYMBOL vmlinux 0x706b001f	deactivate_super
+EXPORT_SYMBOL vmlinux 0x70b46b9a	dev_get_by_name
+EXPORT_SYMBOL vmlinux 0x70ba27a6	test_set_page_writeback
+EXPORT_SYMBOL vmlinux 0x70bc17d7	inode_wait
+EXPORT_SYMBOL vmlinux 0x70d820d4	block_write_full_page_endio
+EXPORT_SYMBOL vmlinux 0x70eddaf7	find_get_page
+EXPORT_SYMBOL vmlinux 0x7108a262	phy_device_free
+EXPORT_SYMBOL vmlinux 0x71104fad	xfrm6_rcv_spi
+EXPORT_SYMBOL vmlinux 0x7117752f	cancel_dirty_page
+EXPORT_SYMBOL vmlinux 0x7129e5f8	hex_asc
+EXPORT_SYMBOL vmlinux 0x7138864e	km_query
+EXPORT_SYMBOL vmlinux 0x71398aee	mdiobus_free
+EXPORT_SYMBOL vmlinux 0x713f6d95	cpu_sysdev_class
+EXPORT_SYMBOL vmlinux 0x7158463f	fbcon_set_bitops
+EXPORT_SYMBOL vmlinux 0x7171121c	overflowgid
+EXPORT_SYMBOL vmlinux 0x717c2e3a	qdisc_watchdog_schedule
+EXPORT_SYMBOL vmlinux 0x719243a1	bio_sector_offset
+EXPORT_SYMBOL vmlinux 0x719564ec	blk_rq_count_integrity_sg
+EXPORT_SYMBOL vmlinux 0x71a50dbc	register_blkdev
+EXPORT_SYMBOL vmlinux 0x71ab03da	bdevname
+EXPORT_SYMBOL vmlinux 0x71c90087	memcmp
+EXPORT_SYMBOL vmlinux 0x71e2c598	key_type_keyring
+EXPORT_SYMBOL vmlinux 0x71e9e3f2	scsi_cmd_ioctl
+EXPORT_SYMBOL vmlinux 0x71f6d94a	cdrom_get_media_event
+EXPORT_SYMBOL vmlinux 0x71fc168c	flush_dcache_page
+EXPORT_SYMBOL vmlinux 0x721a16e7	inet_put_port
+EXPORT_SYMBOL vmlinux 0x725cae61	wake_up_process
+EXPORT_SYMBOL vmlinux 0x72913f47	dm_exception_store_type_unregister
+EXPORT_SYMBOL vmlinux 0x72921a18	locks_mandatory_area
+EXPORT_SYMBOL vmlinux 0x72b183af	cfi_read_pri
+EXPORT_SYMBOL vmlinux 0x72c3be87	param_set_byte
+EXPORT_SYMBOL vmlinux 0x72caf0ce	dev_addr_add
+EXPORT_SYMBOL vmlinux 0x72d41e5b	pci_set_power_state
+EXPORT_SYMBOL vmlinux 0x72d5af61	try_wait_for_completion
+EXPORT_SYMBOL vmlinux 0x72ea7b2d	scsi_device_type
+EXPORT_SYMBOL vmlinux 0x732449fd	pci_dev_get
+EXPORT_SYMBOL vmlinux 0x732a4c4f	iput
+EXPORT_SYMBOL vmlinux 0x735116d3	tcp_close
+EXPORT_SYMBOL vmlinux 0x7362dd1e	vfs_fstat
+EXPORT_SYMBOL vmlinux 0x73631a70	genlmsg_multicast_allns
+EXPORT_SYMBOL vmlinux 0x736f3aa1	module_refcount
+EXPORT_SYMBOL vmlinux 0x737540f7	mpage_readpages
+EXPORT_SYMBOL vmlinux 0x7388057a	commit_creds
+EXPORT_SYMBOL vmlinux 0x73c97f58	clk_set_rate
+EXPORT_SYMBOL vmlinux 0x73e20c1c	strlcpy
+EXPORT_SYMBOL vmlinux 0x73e4ae7a	pci_get_bus_and_slot
+EXPORT_SYMBOL vmlinux 0x740893ac	get_empty_filp
+EXPORT_SYMBOL vmlinux 0x74225296	inet_shutdown
+EXPORT_SYMBOL vmlinux 0x744c0c68	param_get_byte
+EXPORT_SYMBOL vmlinux 0x7452799e	kobject_put
+EXPORT_SYMBOL vmlinux 0x74731d26	blk_integrity_register
+EXPORT_SYMBOL vmlinux 0x747dd1a3	blk_free_tags
+EXPORT_SYMBOL vmlinux 0x7485e15e	unregister_chrdev_region
+EXPORT_SYMBOL vmlinux 0x749260ea	mmc_host_lazy_disable
+EXPORT_SYMBOL vmlinux 0x7492b410	__invalidate_device
+EXPORT_SYMBOL vmlinux 0x74954462	timecounter_read
+EXPORT_SYMBOL vmlinux 0x749c91e0	__neigh_event_send
+EXPORT_SYMBOL vmlinux 0x74be9cc8	jbd2_journal_extend
+EXPORT_SYMBOL vmlinux 0x74bfc369	__tracepoint_kmem_cache_alloc
+EXPORT_SYMBOL vmlinux 0x74e75e0b	truncate_inode_pages_range
+EXPORT_SYMBOL vmlinux 0x74edf933	phy_driver_register
+EXPORT_SYMBOL vmlinux 0x74fe5de9	security_task_getsecid
+EXPORT_SYMBOL vmlinux 0x75037ef1	vfs_quota_disable
+EXPORT_SYMBOL vmlinux 0x758eb0c3	rfkill_register
+EXPORT_SYMBOL vmlinux 0x75963ae4	xfrm6_input_addr
+EXPORT_SYMBOL vmlinux 0x75acbb9f	scsi_execute
+EXPORT_SYMBOL vmlinux 0x75b257d8	scsi_device_quiesce
+EXPORT_SYMBOL vmlinux 0x75d6489f	llc_sap_close
+EXPORT_SYMBOL vmlinux 0x75fee7fd	__raw_writesb
+EXPORT_SYMBOL vmlinux 0x760a0f4f	yield
+EXPORT_SYMBOL vmlinux 0x760b2465	icst307_ps_to_vco
+EXPORT_SYMBOL vmlinux 0x760b437a	unregister_inetaddr_notifier
+EXPORT_SYMBOL vmlinux 0x762e0b40	misc_deregister
+EXPORT_SYMBOL vmlinux 0x763d15ff	pci_request_region_exclusive
+EXPORT_SYMBOL vmlinux 0x765f75fb	pgprot_user
+EXPORT_SYMBOL vmlinux 0x766aeea4	pci_set_master
+EXPORT_SYMBOL vmlinux 0x76700b1c	gnet_stats_copy_rate_est
+EXPORT_SYMBOL vmlinux 0x7683ab30	unregister_sysctl_table
+EXPORT_SYMBOL vmlinux 0x76881360	leds_event
+EXPORT_SYMBOL vmlinux 0x76bf656d	__bitmap_shift_left
+EXPORT_SYMBOL vmlinux 0x76c15913	mpage_writepages
+EXPORT_SYMBOL vmlinux 0x76cf47f6	__aeabi_llsl
+EXPORT_SYMBOL vmlinux 0x76d3cd60	laptop_mode
+EXPORT_SYMBOL vmlinux 0x76f88e41	ethtool_op_get_link
+EXPORT_SYMBOL vmlinux 0x76fca30b	contig_page_data
+EXPORT_SYMBOL vmlinux 0x770c4f61	tcp_mtup_init
+EXPORT_SYMBOL vmlinux 0x7737a38d	vfs_quota_enable
+EXPORT_SYMBOL vmlinux 0x773a9c94	blk_iopoll_enabled
+EXPORT_SYMBOL vmlinux 0x77551ada	inet6_del_protocol
+EXPORT_SYMBOL vmlinux 0x77695bc8	make_bad_inode
+EXPORT_SYMBOL vmlinux 0x77ba254a	kset_register
+EXPORT_SYMBOL vmlinux 0x77cfcfde	__tracepoint_kmalloc_node
+EXPORT_SYMBOL vmlinux 0x77d002e3	udp_proc_unregister
+EXPORT_SYMBOL vmlinux 0x77ecac9f	zlib_inflateEnd
+EXPORT_SYMBOL vmlinux 0x77fa5d1f	ns_to_timespec
+EXPORT_SYMBOL vmlinux 0x78143277	write_cache_pages
+EXPORT_SYMBOL vmlinux 0x787f67fd	scsi_host_put
+EXPORT_SYMBOL vmlinux 0x788fe103	iomem_resource
+EXPORT_SYMBOL vmlinux 0x78b23cad	mb_cache_entry_insert
+EXPORT_SYMBOL vmlinux 0x78b6edad	vfs_readv
+EXPORT_SYMBOL vmlinux 0x78df6bd7	no_pci_devices
+EXPORT_SYMBOL vmlinux 0x78e8a086	pci_request_regions
+EXPORT_SYMBOL vmlinux 0x791eff5f	__f_setown
+EXPORT_SYMBOL vmlinux 0x793ab729	dma_release_declared_memory
+EXPORT_SYMBOL vmlinux 0x794487ee	disable_hlt
+EXPORT_SYMBOL vmlinux 0x794e21a0	igrab
+EXPORT_SYMBOL vmlinux 0x79600d4a	wait_for_completion_killable
+EXPORT_SYMBOL vmlinux 0x7963359b	block_write_full_page
+EXPORT_SYMBOL vmlinux 0x796fc5ce	scsi_get_sense_info_fld
+EXPORT_SYMBOL vmlinux 0x7974ec5e	bio_init
+EXPORT_SYMBOL vmlinux 0x79a4b540	tcf_exts_validate
+EXPORT_SYMBOL vmlinux 0x79aa04a2	get_random_bytes
+EXPORT_SYMBOL vmlinux 0x79ad224b	tasklet_kill
+EXPORT_SYMBOL vmlinux 0x79ad98ac	inet6_unregister_protosw
+EXPORT_SYMBOL vmlinux 0x7a06d891	kick_iocb
+EXPORT_SYMBOL vmlinux 0x7a070314	call_usermodehelper_freeinfo
+EXPORT_SYMBOL vmlinux 0x7a1b7b12	sock_recvmsg
+EXPORT_SYMBOL vmlinux 0x7a2a837d	strict_strtol
+EXPORT_SYMBOL vmlinux 0x7a4497db	kzfree
+EXPORT_SYMBOL vmlinux 0x7a6e68ec	task_tgid_nr_ns
+EXPORT_SYMBOL vmlinux 0x7a6ed7e0	request_firmware
+EXPORT_SYMBOL vmlinux 0x7a91726b	clkdev_alloc
+EXPORT_SYMBOL vmlinux 0x7ab749d5	netpoll_parse_options
+EXPORT_SYMBOL vmlinux 0x7ad38cab	tcf_hash_check
+EXPORT_SYMBOL vmlinux 0x7aebd222	scsi_eh_finish_cmd
+EXPORT_SYMBOL vmlinux 0x7aeed933	phy_attach
+EXPORT_SYMBOL vmlinux 0x7b07284e	vfs_set_dqinfo
+EXPORT_SYMBOL vmlinux 0x7b129646	neigh_compat_output
+EXPORT_SYMBOL vmlinux 0x7b135227	i2c_smbus_write_i2c_block_data
+EXPORT_SYMBOL vmlinux 0x7b2ec30c	blk_plug_device_unlocked
+EXPORT_SYMBOL vmlinux 0x7b57056e	__wait_on_buffer
+EXPORT_SYMBOL vmlinux 0x7b81270f	init_buffer
+EXPORT_SYMBOL vmlinux 0x7b860e16	phy_print_status
+EXPORT_SYMBOL vmlinux 0x7b9435f9	__scsi_device_lookup_by_target
+EXPORT_SYMBOL vmlinux 0x7bba21e1	block_page_mkwrite
+EXPORT_SYMBOL vmlinux 0x7bbaa695	dm_kcopyd_client_destroy
+EXPORT_SYMBOL vmlinux 0x7be7f3e0	scsi_put_command
+EXPORT_SYMBOL vmlinux 0x7c2564af	__neigh_for_each_release
+EXPORT_SYMBOL vmlinux 0x7c418c72	udp_prot
+EXPORT_SYMBOL vmlinux 0x7c60d66e	getname
+EXPORT_SYMBOL vmlinux 0x7c904ded	unregister_module_notifier
+EXPORT_SYMBOL vmlinux 0x7cc035a7	__ucmpdi2
+EXPORT_SYMBOL vmlinux 0x7cd7dde0	pci_scan_single_device
+EXPORT_SYMBOL vmlinux 0x7d06b1a8	touch_atime
+EXPORT_SYMBOL vmlinux 0x7d11c268	jiffies
+EXPORT_SYMBOL vmlinux 0x7d1fd8e9	blk_rq_map_user_iov
+EXPORT_SYMBOL vmlinux 0x7d623c22	__break_lease
+EXPORT_SYMBOL vmlinux 0x7d64b7c0	end_buffer_write_sync
+EXPORT_SYMBOL vmlinux 0x7d83085d	skb_free_datagram
+EXPORT_SYMBOL vmlinux 0x7d83d3c2	netdev_boot_setup_check
+EXPORT_SYMBOL vmlinux 0x7da3f580	block_read_full_page
+EXPORT_SYMBOL vmlinux 0x7dae5f0f	generic_write_sync
+EXPORT_SYMBOL vmlinux 0x7dceceac	capable
+EXPORT_SYMBOL vmlinux 0x7df8c4dd	amba_device_register
+EXPORT_SYMBOL vmlinux 0x7e146db2	tty_name
+EXPORT_SYMBOL vmlinux 0x7e1ae9bc	key_alloc
+EXPORT_SYMBOL vmlinux 0x7e236f55	ndisc_send_skb
+EXPORT_SYMBOL vmlinux 0x7e4bc506	vfs_set_dqblk
+EXPORT_SYMBOL vmlinux 0x7e5f9a4b	per_cpu__ftrace_event_seq
+EXPORT_SYMBOL vmlinux 0x7e9ebb05	kernel_thread
+EXPORT_SYMBOL vmlinux 0x7ebf5b8e	key_instantiate_and_link
+EXPORT_SYMBOL vmlinux 0x7ed96fc9	xfrm_state_insert
+EXPORT_SYMBOL vmlinux 0x7f15c1b6	skb_checksum
+EXPORT_SYMBOL vmlinux 0x7f24de73	jiffies_to_usecs
+EXPORT_SYMBOL vmlinux 0x7f4ebb4b	dqput
+EXPORT_SYMBOL vmlinux 0x7f5b82e7	xfrm_policy_flush
+EXPORT_SYMBOL vmlinux 0x7f63b31e	_memcpy_toio
+EXPORT_SYMBOL vmlinux 0x7f70a7e0	tty_register_driver
+EXPORT_SYMBOL vmlinux 0x7f714fc5	neigh_sysctl_unregister
+EXPORT_SYMBOL vmlinux 0x7f93cbbd	tcp_sync_mss
+EXPORT_SYMBOL vmlinux 0x800e4ffa	__muldi3
+EXPORT_SYMBOL vmlinux 0x80129e50	writeback_inodes_sb_if_idle
+EXPORT_SYMBOL vmlinux 0x802d8a51	inet_listen
+EXPORT_SYMBOL vmlinux 0x8063f83d	radix_tree_gang_lookup
+EXPORT_SYMBOL vmlinux 0x806fd865	__breadahead
+EXPORT_SYMBOL vmlinux 0x8085c7b1	prepare_to_wait
+EXPORT_SYMBOL vmlinux 0x809200ab	__bio_clone
+EXPORT_SYMBOL vmlinux 0x80a3a218	dma_sync_sg_for_device
+EXPORT_SYMBOL vmlinux 0x80db5795	serio_unregister_driver
+EXPORT_SYMBOL vmlinux 0x80ed4265	journal_revoke
+EXPORT_SYMBOL vmlinux 0x80f39596	filp_open
+EXPORT_SYMBOL vmlinux 0x8100025b	vm_map_ram
+EXPORT_SYMBOL vmlinux 0x811748b4	bio_integrity_split
+EXPORT_SYMBOL vmlinux 0x811ac567	textsearch_register
+EXPORT_SYMBOL vmlinux 0x8126dfb0	iunique
+EXPORT_SYMBOL vmlinux 0x813bd1bb	bio_map_user
+EXPORT_SYMBOL vmlinux 0x815b5dd4	match_octal
+EXPORT_SYMBOL vmlinux 0x8176fb97	call_usermodehelper_setcleanup
+EXPORT_SYMBOL vmlinux 0x81799cee	vscnprintf
+EXPORT_SYMBOL vmlinux 0x817c05ce	rtnl_set_sk_err
+EXPORT_SYMBOL vmlinux 0x8187776b	mdio_bus_type
+EXPORT_SYMBOL vmlinux 0x81ba15e0	scsi_target_resume
+EXPORT_SYMBOL vmlinux 0x81c92973	scsi_host_get
+EXPORT_SYMBOL vmlinux 0x81e88780	tty_unregister_device
+EXPORT_SYMBOL vmlinux 0x820d225f	print_mac
+EXPORT_SYMBOL vmlinux 0x8251bcc3	bitmap_release_region
+EXPORT_SYMBOL vmlinux 0x8262f64b	tcp_sockets_allocated
+EXPORT_SYMBOL vmlinux 0x8268ed02	scsi_remove_host
+EXPORT_SYMBOL vmlinux 0x82692209	kref_set
+EXPORT_SYMBOL vmlinux 0x8271822c	rfkill_unregister
+EXPORT_SYMBOL vmlinux 0x829af375	proc_symlink
+EXPORT_SYMBOL vmlinux 0x82a223f7	dm_unregister_target
+EXPORT_SYMBOL vmlinux 0x82a3e151	del_gendisk
+EXPORT_SYMBOL vmlinux 0x82acfb70	blk_iopoll_sched
+EXPORT_SYMBOL vmlinux 0x82e5a238	vm_get_page_prot
+EXPORT_SYMBOL vmlinux 0x8320bea8	__umodsi3
+EXPORT_SYMBOL vmlinux 0x83246bdb	unlock_new_inode
+EXPORT_SYMBOL vmlinux 0x8344df65	eth_header_cache
+EXPORT_SYMBOL vmlinux 0x836bd0d2	pci_restore_state
+EXPORT_SYMBOL vmlinux 0x839d89ea	tty_set_operations
+EXPORT_SYMBOL vmlinux 0x83a476ce	bitmap_scnlistprintf
+EXPORT_SYMBOL vmlinux 0x83b18fa1	napi_get_frags
+EXPORT_SYMBOL vmlinux 0x83ef3e58	skb_dma_unmap
+EXPORT_SYMBOL vmlinux 0x840a5032	xfrm_unregister_mode
+EXPORT_SYMBOL vmlinux 0x84175768	wait_on_sync_kiocb
+EXPORT_SYMBOL vmlinux 0x841efe07	ps2_init
+EXPORT_SYMBOL vmlinux 0x8430787c	sk_filter
+EXPORT_SYMBOL vmlinux 0x846c5be5	clk_disable
+EXPORT_SYMBOL vmlinux 0x84717409	__pagevec_release
+EXPORT_SYMBOL vmlinux 0x8475122b	iget_failed
+EXPORT_SYMBOL vmlinux 0x84a85550	gnet_stats_start_copy_compat
+EXPORT_SYMBOL vmlinux 0x84ab882c	journal_extend
+EXPORT_SYMBOL vmlinux 0x84b183ae	strncmp
+EXPORT_SYMBOL vmlinux 0x84f4b377	rtnl_unicast
+EXPORT_SYMBOL vmlinux 0x851b8ab9	__skb_warn_lro_forwarding
+EXPORT_SYMBOL vmlinux 0x855fc049	cdev_index
+EXPORT_SYMBOL vmlinux 0x85670f1d	rtnl_is_locked
+EXPORT_SYMBOL vmlinux 0x85994f76	grab_cache_page_write_begin
+EXPORT_SYMBOL vmlinux 0x85a69949	send_sig
+EXPORT_SYMBOL vmlinux 0x85a6daf1	devm_request_threaded_irq
+EXPORT_SYMBOL vmlinux 0x85ac7f10	posix_acl_from_xattr
+EXPORT_SYMBOL vmlinux 0x85d00d36	md_integrity_add_rdev
+EXPORT_SYMBOL vmlinux 0x85d22bc1	mmc_release_host
+EXPORT_SYMBOL vmlinux 0x85df9b6c	strsep
+EXPORT_SYMBOL vmlinux 0x85e7deb2	iov_iter_fault_in_readable
+EXPORT_SYMBOL vmlinux 0x868a4e4b	i2c_master_recv
+EXPORT_SYMBOL vmlinux 0x868acba5	get_options
+EXPORT_SYMBOL vmlinux 0x86aa688c	pci_add_new_bus
+EXPORT_SYMBOL vmlinux 0x86d29bea	tcp_sendmsg
+EXPORT_SYMBOL vmlinux 0x86fb9b05	bitmap_parse_user
+EXPORT_SYMBOL vmlinux 0x870940ac	eth_header
+EXPORT_SYMBOL vmlinux 0x87198f96	tcf_hash_new_index
+EXPORT_SYMBOL vmlinux 0x871c0a7e	fiemap_check_flags
+EXPORT_SYMBOL vmlinux 0x872927b8	down_timeout
+EXPORT_SYMBOL vmlinux 0x874e8c45	xfrm_policy_delete
+EXPORT_SYMBOL vmlinux 0x876522ce	blk_insert_request
+EXPORT_SYMBOL vmlinux 0x877d41c9	register_mtd_chip_driver
+EXPORT_SYMBOL vmlinux 0x878ab3ce	sysctl_tcp_adv_win_scale
+EXPORT_SYMBOL vmlinux 0x879754dd	journal_try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0x87b312f0	dmam_declare_coherent_memory
+EXPORT_SYMBOL vmlinux 0x87b644c6	do_sync_read
+EXPORT_SYMBOL vmlinux 0x87ca328a	__lock_page
+EXPORT_SYMBOL vmlinux 0x87d2db3c	bio_put
+EXPORT_SYMBOL vmlinux 0x87f438a2	sysctl_intvec
+EXPORT_SYMBOL vmlinux 0x881039d0	zlib_inflate
+EXPORT_SYMBOL vmlinux 0x8836a156	filemap_fdatawrite
+EXPORT_SYMBOL vmlinux 0x884a8672	file_update_time
+EXPORT_SYMBOL vmlinux 0x886529a6	scsi_scan_host
+EXPORT_SYMBOL vmlinux 0x888e355e	qdisc_list_del
+EXPORT_SYMBOL vmlinux 0x88a0b530	set_security_override_from_ctx
+EXPORT_SYMBOL vmlinux 0x88cb1e05	simple_unlink
+EXPORT_SYMBOL vmlinux 0x88fc8812	i2c_clients_command
+EXPORT_SYMBOL vmlinux 0x88ff7577	rfkill_init_sw_state
+EXPORT_SYMBOL vmlinux 0x890bfcbf	elv_rb_del
+EXPORT_SYMBOL vmlinux 0x89144f59	arp_xmit
+EXPORT_SYMBOL vmlinux 0x891e32b8	wait_for_completion_interruptible
+EXPORT_SYMBOL vmlinux 0x89207bf3	input_unfilter_device
+EXPORT_SYMBOL vmlinux 0x8927cddd	thermal_cooling_device_register
+EXPORT_SYMBOL vmlinux 0x897473df	mktime
+EXPORT_SYMBOL vmlinux 0x89d5538d	fb_pad_aligned_buffer
+EXPORT_SYMBOL vmlinux 0x89d66811	build_ehash_secret
+EXPORT_SYMBOL vmlinux 0x89f4b2c1	file_permission
+EXPORT_SYMBOL vmlinux 0x89fb4905	lro_receive_skb
+EXPORT_SYMBOL vmlinux 0x89fc9523	__register_binfmt
+EXPORT_SYMBOL vmlinux 0x8a1203a9	kref_get
+EXPORT_SYMBOL vmlinux 0x8a373fd7	twl4030_i2c_write
+EXPORT_SYMBOL vmlinux 0x8a3c98ce	set_binfmt
+EXPORT_SYMBOL vmlinux 0x8a4ba84d	submit_bio
+EXPORT_SYMBOL vmlinux 0x8a4fa83b	__aeabi_llsr
+EXPORT_SYMBOL vmlinux 0x8a73d2aa	otg_set_transceiver
+EXPORT_SYMBOL vmlinux 0x8a7d1c31	high_memory
+EXPORT_SYMBOL vmlinux 0x8a99a016	mempool_free_slab
+EXPORT_SYMBOL vmlinux 0x8aa47fc7	simple_fsync
+EXPORT_SYMBOL vmlinux 0x8aa51c14	__netif_schedule
+EXPORT_SYMBOL vmlinux 0x8acf6a63	__xfrm_route_forward
+EXPORT_SYMBOL vmlinux 0x8ae77528	proc_dointvec_minmax
+EXPORT_SYMBOL vmlinux 0x8b005e88	scsi_prep_state_check
+EXPORT_SYMBOL vmlinux 0x8b05240c	napi_gro_flush
+EXPORT_SYMBOL vmlinux 0x8b0f0355	bdev_stack_limits
+EXPORT_SYMBOL vmlinux 0x8b1389cc	__bforget
+EXPORT_SYMBOL vmlinux 0x8b185d14	md_write_end
+EXPORT_SYMBOL vmlinux 0x8b1f60f0	inet_csk_accept
+EXPORT_SYMBOL vmlinux 0x8b339bce	inet_frags_init
+EXPORT_SYMBOL vmlinux 0x8b38078e	__free_pages
+EXPORT_SYMBOL vmlinux 0x8b49863f	inet_frag_kill
+EXPORT_SYMBOL vmlinux 0x8b4c9549	dev_trans_start
+EXPORT_SYMBOL vmlinux 0x8b618d08	overflowuid
+EXPORT_SYMBOL vmlinux 0x8b79f30b	create_proc_entry
+EXPORT_SYMBOL vmlinux 0x8b82b0ca	mnt_unpin
+EXPORT_SYMBOL vmlinux 0x8b9a4149	ida_destroy
+EXPORT_SYMBOL vmlinux 0x8bbad426	skb_make_writable
+EXPORT_SYMBOL vmlinux 0x8bc2cffa	kill_anon_super
+EXPORT_SYMBOL vmlinux 0x8bcb8abd	kmap_atomic
+EXPORT_SYMBOL vmlinux 0x8bcd0e88	rfkill_destroy
+EXPORT_SYMBOL vmlinux 0x8bd313b8	__tracepoint_kfree
+EXPORT_SYMBOL vmlinux 0x8bd5b603	param_get_long
+EXPORT_SYMBOL vmlinux 0x8c3cb225	security_path_link
+EXPORT_SYMBOL vmlinux 0x8c3f63ed	blk_queue_segment_boundary
+EXPORT_SYMBOL vmlinux 0x8c543f59	alloc_etherdev_mq
+EXPORT_SYMBOL vmlinux 0x8c7bc348	ida_remove
+EXPORT_SYMBOL vmlinux 0x8c82f918	shrink_dcache_sb
+EXPORT_SYMBOL vmlinux 0x8c882ccf	scsi_scan_target
+EXPORT_SYMBOL vmlinux 0x8cb4d6f1	journal_start
+EXPORT_SYMBOL vmlinux 0x8cca3af8	tcp_create_openreq_child
+EXPORT_SYMBOL vmlinux 0x8cd43b28	dmam_alloc_noncoherent
+EXPORT_SYMBOL vmlinux 0x8ce6252f	ppp_input_error
+EXPORT_SYMBOL vmlinux 0x8d0da404	kernel_sendmsg
+EXPORT_SYMBOL vmlinux 0x8d1dbdd6	blk_register_region
+EXPORT_SYMBOL vmlinux 0x8d24211b	tcf_destroy_chain
+EXPORT_SYMBOL vmlinux 0x8d3894f2	_ctype
+EXPORT_SYMBOL vmlinux 0x8d488843	ps2_cmd_aborted
+EXPORT_SYMBOL vmlinux 0x8d551bef	sysctl_tcp_rmem
+EXPORT_SYMBOL vmlinux 0x8d5642fc	wait_for_completion_interruptible_timeout
+EXPORT_SYMBOL vmlinux 0x8d603f58	bio_integrity_alloc_bioset
+EXPORT_SYMBOL vmlinux 0x8d6f81b4	__div64_32
+EXPORT_SYMBOL vmlinux 0x8d820e7d	fget
+EXPORT_SYMBOL vmlinux 0x8d84d92c	tty_port_close_end
+EXPORT_SYMBOL vmlinux 0x8d9869c5	tcp_timewait_state_process
+EXPORT_SYMBOL vmlinux 0x8dcb5c27	idr_remove
+EXPORT_SYMBOL vmlinux 0x8e0b7743	ipv6_ext_hdr
+EXPORT_SYMBOL vmlinux 0x8e0db50e	inet_csk_clear_xmit_timers
+EXPORT_SYMBOL vmlinux 0x8e3c9cc3	vprintk
+EXPORT_SYMBOL vmlinux 0x8e426a7f	mod_timer_pending
+EXPORT_SYMBOL vmlinux 0x8e63261e	d_alloc
+EXPORT_SYMBOL vmlinux 0x8e763ae1	send_remote_softirq
+EXPORT_SYMBOL vmlinux 0x8e871963	kernel_sock_ioctl
+EXPORT_SYMBOL vmlinux 0x8e8cd6e6	unregister_cdrom
+EXPORT_SYMBOL vmlinux 0x8ec2704c	__napi_complete
+EXPORT_SYMBOL vmlinux 0x8ee69235	timeval_to_jiffies
+EXPORT_SYMBOL vmlinux 0x8eef0a0d	call_usermodehelper_exec
+EXPORT_SYMBOL vmlinux 0x8efee06b	dst_release
+EXPORT_SYMBOL vmlinux 0x8f043619	dev_unicast_delete
+EXPORT_SYMBOL vmlinux 0x8f078994	file_remove_suid
+EXPORT_SYMBOL vmlinux 0x8f07d8ca	__wait_on_bit
+EXPORT_SYMBOL vmlinux 0x8f21eb99	nla_reserve_nohdr
+EXPORT_SYMBOL vmlinux 0x8f22d827	do_truncate
+EXPORT_SYMBOL vmlinux 0x8f3b8921	mmc_free_host
+EXPORT_SYMBOL vmlinux 0x8f48679a	rb_prev
+EXPORT_SYMBOL vmlinux 0x8f573c9b	simple_getattr
+EXPORT_SYMBOL vmlinux 0x8f6674e8	find_get_pages_tag
+EXPORT_SYMBOL vmlinux 0x8f69a242	__timecompare_update
+EXPORT_SYMBOL vmlinux 0x8f6b7950	set_irq_data
+EXPORT_SYMBOL vmlinux 0x8f7a1e9c	scsi_device_lookup
+EXPORT_SYMBOL vmlinux 0x8f8adfc5	blk_put_request
+EXPORT_SYMBOL vmlinux 0x8f914147	inet6_bind
+EXPORT_SYMBOL vmlinux 0x8f92ed70	register_sysrq_key
+EXPORT_SYMBOL vmlinux 0x8f9b86b2	kfifo_alloc
+EXPORT_SYMBOL vmlinux 0x8fa5c4e8	vfs_quota_off
+EXPORT_SYMBOL vmlinux 0x8fda70a7	xfrm6_prepare_output
+EXPORT_SYMBOL vmlinux 0x8fe3dd47	kmap
+EXPORT_SYMBOL vmlinux 0x8ff9d61a	seq_release_private
+EXPORT_SYMBOL vmlinux 0x8ffdb3b8	crc16
+EXPORT_SYMBOL vmlinux 0x90035333	secure_tcpv6_sequence_number
+EXPORT_SYMBOL vmlinux 0x900e6871	dget_locked
+EXPORT_SYMBOL vmlinux 0x90326b18	splice_direct_to_actor
+EXPORT_SYMBOL vmlinux 0x90c9023c	unlock_super
+EXPORT_SYMBOL vmlinux 0x90e3a7a7	phy_register_fixup_for_uid
+EXPORT_SYMBOL vmlinux 0x90f97507	register_snap_client
+EXPORT_SYMBOL vmlinux 0x91009452	schedule_delayed_work
+EXPORT_SYMBOL vmlinux 0x910538c0	in6_dev_finish_destroy
+EXPORT_SYMBOL vmlinux 0x9105f400	dcache_dir_lseek
+EXPORT_SYMBOL vmlinux 0x91481982	__ratelimit
+EXPORT_SYMBOL vmlinux 0x914b3a4b	neigh_sysctl_register
+EXPORT_SYMBOL vmlinux 0x91598b69	unregister_key_type
+EXPORT_SYMBOL vmlinux 0x915e4a12	complete_request_key
+EXPORT_SYMBOL vmlinux 0x915f4310	pci_disable_device
+EXPORT_SYMBOL vmlinux 0x91766c09	param_get_ulong
+EXPORT_SYMBOL vmlinux 0x9181daa4	pagecache_write_end
+EXPORT_SYMBOL vmlinux 0x918b5d94	devm_ioport_map
+EXPORT_SYMBOL vmlinux 0x919029aa	__readwrite_bug
+EXPORT_SYMBOL vmlinux 0x919d4818	prepare_binprm
+EXPORT_SYMBOL vmlinux 0x9214ed8a	param_get_bool
+EXPORT_SYMBOL vmlinux 0x9235b54d	sock_common_getsockopt
+EXPORT_SYMBOL vmlinux 0x926401f2	sg_copy_to_buffer
+EXPORT_SYMBOL vmlinux 0x929eecac	__strncpy_from_user
+EXPORT_SYMBOL vmlinux 0x92a6594d	journal_lock_updates
+EXPORT_SYMBOL vmlinux 0x92c439e5	ppp_input
+EXPORT_SYMBOL vmlinux 0x92ca4788	eth_type_trans
+EXPORT_SYMBOL vmlinux 0x92caf18e	netif_carrier_on
+EXPORT_SYMBOL vmlinux 0x933316f3	dcache_readdir
+EXPORT_SYMBOL vmlinux 0x93541470	pagecache_write_begin
+EXPORT_SYMBOL vmlinux 0x937fd3a0	amba_driver_unregister
+EXPORT_SYMBOL vmlinux 0x93a6e0b2	io_schedule
+EXPORT_SYMBOL vmlinux 0x93d4fc99	generic_show_options
+EXPORT_SYMBOL vmlinux 0x93fb4b67	unregister_console
+EXPORT_SYMBOL vmlinux 0x93fca811	__get_free_pages
+EXPORT_SYMBOL vmlinux 0x94078388	d_prune_aliases
+EXPORT_SYMBOL vmlinux 0x9436fe22	sock_alloc_send_skb
+EXPORT_SYMBOL vmlinux 0x943f8dd4	pci_bus_find_capability
+EXPORT_SYMBOL vmlinux 0x94431793	mb_cache_entry_get
+EXPORT_SYMBOL vmlinux 0x944832d6	ftrace_print_symbols_seq
+EXPORT_SYMBOL vmlinux 0x945a458b	search_binary_handler
+EXPORT_SYMBOL vmlinux 0x94847b23	nf_ct_destroy
+EXPORT_SYMBOL vmlinux 0x948768a7	cad_pid
+EXPORT_SYMBOL vmlinux 0x94961283	vunmap
+EXPORT_SYMBOL vmlinux 0x94fd3cbc	vfs_quota_on_path
+EXPORT_SYMBOL vmlinux 0x9501d078	__wait_on_bit_lock
+EXPORT_SYMBOL vmlinux 0x95109798	tcp_v4_md5_hash_skb
+EXPORT_SYMBOL vmlinux 0x95169807	pipe_unlock
+EXPORT_SYMBOL vmlinux 0x9528ce42	__devm_release_region
+EXPORT_SYMBOL vmlinux 0x954488a4	syncookie_secret
+EXPORT_SYMBOL vmlinux 0x954cbb26	vsprintf
+EXPORT_SYMBOL vmlinux 0x95a57ca6	find_or_create_page
+EXPORT_SYMBOL vmlinux 0x95ac603d	bdi_unregister
+EXPORT_SYMBOL vmlinux 0x95dbe078	__get_user_2
+EXPORT_SYMBOL vmlinux 0x95f246fd	sock_no_connect
+EXPORT_SYMBOL vmlinux 0x95f70e1c	md_wakeup_thread
+EXPORT_SYMBOL vmlinux 0x961815dc	pcim_iomap
+EXPORT_SYMBOL vmlinux 0x9631e358	simple_statfs
+EXPORT_SYMBOL vmlinux 0x967b394f	add_disk
+EXPORT_SYMBOL vmlinux 0x96898769	sysfs_format_mac
+EXPORT_SYMBOL vmlinux 0x96ccf9cf	i2c_transfer
+EXPORT_SYMBOL vmlinux 0x96cd2b04	scsi_sense_key_string
+EXPORT_SYMBOL vmlinux 0x96f9a24b	blk_plug_device
+EXPORT_SYMBOL vmlinux 0x971997d2	netdev_class_create_file
+EXPORT_SYMBOL vmlinux 0x97235f4b	mark_info_dirty
+EXPORT_SYMBOL vmlinux 0x97255bdf	strlen
+EXPORT_SYMBOL vmlinux 0x972605ae	mmc_wait_for_app_cmd
+EXPORT_SYMBOL vmlinux 0x972f366a	dm_dirty_log_destroy
+EXPORT_SYMBOL vmlinux 0x97325fa9	lease_modify
+EXPORT_SYMBOL vmlinux 0x973b78bb	simple_transaction_read
+EXPORT_SYMBOL vmlinux 0x9754ec10	radix_tree_preload
+EXPORT_SYMBOL vmlinux 0x9785c272	inode_add_rsv_space
+EXPORT_SYMBOL vmlinux 0x97889c66	serio_unregister_child_port
+EXPORT_SYMBOL vmlinux 0x9795bb05	scsi_track_queue_full
+EXPORT_SYMBOL vmlinux 0x97a04163	set_groups
+EXPORT_SYMBOL vmlinux 0x97f00138	seq_read
+EXPORT_SYMBOL vmlinux 0x97f7053b	tcp_v4_remember_stamp
+EXPORT_SYMBOL vmlinux 0x97fea11f	tty_unthrottle
+EXPORT_SYMBOL vmlinux 0x97fea540	register_quota_format
+EXPORT_SYMBOL vmlinux 0x98082893	__copy_to_user
+EXPORT_SYMBOL vmlinux 0x9808b877	nla_reserve
+EXPORT_SYMBOL vmlinux 0x980f4132	tcp_init_xmit_timers
+EXPORT_SYMBOL vmlinux 0x981ea9e5	simple_transaction_release
+EXPORT_SYMBOL vmlinux 0x983ab6e3	i2c_smbus_read_byte
+EXPORT_SYMBOL vmlinux 0x986d2fe7	pci_set_mwi
+EXPORT_SYMBOL vmlinux 0x986e6135	fb_pad_unaligned_buffer
+EXPORT_SYMBOL vmlinux 0x98b44777	unregister_tcf_proto_ops
+EXPORT_SYMBOL vmlinux 0x98b5dc7c	__blk_run_queue
+EXPORT_SYMBOL vmlinux 0x990023c0	generic_getxattr
+EXPORT_SYMBOL vmlinux 0x991dd654	scsi_print_result
+EXPORT_SYMBOL vmlinux 0x99434da2	pci_set_dma_max_seg_size
+EXPORT_SYMBOL vmlinux 0x99480fab	phy_disconnect
+EXPORT_SYMBOL vmlinux 0x99531fae	journal_get_write_access
+EXPORT_SYMBOL vmlinux 0x9953ea1c	tty_flip_buffer_push
+EXPORT_SYMBOL vmlinux 0x9994c0ca	ps2_is_keyboard_id
+EXPORT_SYMBOL vmlinux 0x999c3148	__raw_readsb
+EXPORT_SYMBOL vmlinux 0x999e8297	vfree
+EXPORT_SYMBOL vmlinux 0x99ad6936	__kill_fasync
+EXPORT_SYMBOL vmlinux 0x99bb8806	memmove
+EXPORT_SYMBOL vmlinux 0x99bfbe39	get_unused_fd
+EXPORT_SYMBOL vmlinux 0x99c7a8b8	jbd2_dev_to_name
+EXPORT_SYMBOL vmlinux 0x99cdc86b	sysctl_tcp_reordering
+EXPORT_SYMBOL vmlinux 0x99d7a2bd	lro_flush_pkt
+EXPORT_SYMBOL vmlinux 0x99ea12ce	panic_blink
+EXPORT_SYMBOL vmlinux 0x9a178d91	security_inode_init_security
+EXPORT_SYMBOL vmlinux 0x9a1dfd65	strpbrk
+EXPORT_SYMBOL vmlinux 0x9a52c798	kset_unregister
+EXPORT_SYMBOL vmlinux 0x9a58cc24	dev_open
+EXPORT_SYMBOL vmlinux 0x9a6a846a	blk_queue_max_hw_sectors
+EXPORT_SYMBOL vmlinux 0x9a7b6d7f	unregister_framebuffer
+EXPORT_SYMBOL vmlinux 0x9aa13341	unlock_page
+EXPORT_SYMBOL vmlinux 0x9aac385e	alloc_tty_driver
+EXPORT_SYMBOL vmlinux 0x9abac1cd	inet6_ioctl
+EXPORT_SYMBOL vmlinux 0x9ae8296f	get_sb_nodev
+EXPORT_SYMBOL vmlinux 0x9afc790c	pci_unregister_driver
+EXPORT_SYMBOL vmlinux 0x9b11e340	d_instantiate_unique
+EXPORT_SYMBOL vmlinux 0x9b191d92	kunmap_high
+EXPORT_SYMBOL vmlinux 0x9b1e635b	genl_register_ops
+EXPORT_SYMBOL vmlinux 0x9b2f2603	skb_clone
+EXPORT_SYMBOL vmlinux 0x9b388444	get_zeroed_page
+EXPORT_SYMBOL vmlinux 0x9b3ac998	d_splice_alias
+EXPORT_SYMBOL vmlinux 0x9b4cf83c	sock_i_uid
+EXPORT_SYMBOL vmlinux 0x9b6eb137	ksize
+EXPORT_SYMBOL vmlinux 0x9b8b6202	input_inject_event
+EXPORT_SYMBOL vmlinux 0x9b8d5d4f	ppp_output_wakeup
+EXPORT_SYMBOL vmlinux 0x9ba7089d	argv_split
+EXPORT_SYMBOL vmlinux 0x9baee6e2	md_check_no_bitmap
+EXPORT_SYMBOL vmlinux 0x9bce482f	__release_region
+EXPORT_SYMBOL vmlinux 0x9bd98b18	timecompare_offset
+EXPORT_SYMBOL vmlinux 0x9be9eec3	alloc_disk_node
+EXPORT_SYMBOL vmlinux 0x9c012508	fb_parse_edid
+EXPORT_SYMBOL vmlinux 0x9c0f2750	sock_rfree
+EXPORT_SYMBOL vmlinux 0x9c2571f4	__down_read
+EXPORT_SYMBOL vmlinux 0x9c2c735a	input_get_keycode
+EXPORT_SYMBOL vmlinux 0x9c40dbae	skb_dma_map
+EXPORT_SYMBOL vmlinux 0x9c7077bd	enable_hlt
+EXPORT_SYMBOL vmlinux 0x9c7f7984	generic_make_request
+EXPORT_SYMBOL vmlinux 0x9c9481c9	generic_file_readonly_mmap
+EXPORT_SYMBOL vmlinux 0x9c96517f	blk_make_request
+EXPORT_SYMBOL vmlinux 0x9c9ae8a7	gnet_stats_copy_app
+EXPORT_SYMBOL vmlinux 0x9cb96e92	qdisc_put_rtab
+EXPORT_SYMBOL vmlinux 0x9cd0bf12	journal_force_commit
+EXPORT_SYMBOL vmlinux 0x9cdd11b3	jbd2_journal_blocks_per_page
+EXPORT_SYMBOL vmlinux 0x9ce1acfc	nobh_truncate_page
+EXPORT_SYMBOL vmlinux 0x9ceb163c	memcpy_toiovec
+EXPORT_SYMBOL vmlinux 0x9cf5b882	napi_gro_frags
+EXPORT_SYMBOL vmlinux 0x9cf899c9	unregister_netdevice
+EXPORT_SYMBOL vmlinux 0x9cfd56c5	scsi_print_status
+EXPORT_SYMBOL vmlinux 0x9d03b366	names_cachep
+EXPORT_SYMBOL vmlinux 0x9d246ec0	page_zero_new_buffers
+EXPORT_SYMBOL vmlinux 0x9d36b138	dm_dirty_log_type_unregister
+EXPORT_SYMBOL vmlinux 0x9d3a4299	sget
+EXPORT_SYMBOL vmlinux 0x9d3aa376	blk_iopoll_init
+EXPORT_SYMBOL vmlinux 0x9d669763	memcpy
+EXPORT_SYMBOL vmlinux 0x9d8ce7b6	d_move
+EXPORT_SYMBOL vmlinux 0x9da0c783	put_page
+EXPORT_SYMBOL vmlinux 0x9deb2d78	ip_mc_join_group
+EXPORT_SYMBOL vmlinux 0x9df388cb	copy_strings_kernel
+EXPORT_SYMBOL vmlinux 0x9df59743	pci_scan_bus_parented
+EXPORT_SYMBOL vmlinux 0x9dfb17af	override_creds
+EXPORT_SYMBOL vmlinux 0x9e0c43bb	blk_queue_max_discard_sectors
+EXPORT_SYMBOL vmlinux 0x9e0c5619	dqget
+EXPORT_SYMBOL vmlinux 0x9e10dda1	send_sig_info
+EXPORT_SYMBOL vmlinux 0x9e120414	ida_get_new_above
+EXPORT_SYMBOL vmlinux 0x9e2000a7	memcpy_toiovecend
+EXPORT_SYMBOL vmlinux 0x9e31a655	unregister_sysrq_key
+EXPORT_SYMBOL vmlinux 0x9e3af692	tcf_register_action
+EXPORT_SYMBOL vmlinux 0x9e45e85f	jbd2_journal_init_dev
+EXPORT_SYMBOL vmlinux 0x9e7a6ea6	__task_pid_nr_ns
+EXPORT_SYMBOL vmlinux 0x9e7d6bd0	__udelay
+EXPORT_SYMBOL vmlinux 0x9e9c4b0c	pskb_expand_head
+EXPORT_SYMBOL vmlinux 0x9e9f1714	__bitmap_andnot
+EXPORT_SYMBOL vmlinux 0x9ec56ee3	sb_min_blocksize
+EXPORT_SYMBOL vmlinux 0x9ed685ee	iov_iter_advance
+EXPORT_SYMBOL vmlinux 0x9eecde16	do_brk
+EXPORT_SYMBOL vmlinux 0x9f100139	jiffies_to_clock_t
+EXPORT_SYMBOL vmlinux 0x9f26d91c	handle_sysrq
+EXPORT_SYMBOL vmlinux 0x9f2bdaac	__bitmap_or
+EXPORT_SYMBOL vmlinux 0x9f2d613e	param_set_bool
+EXPORT_SYMBOL vmlinux 0x9f2f02de	xfrm_state_alloc
+EXPORT_SYMBOL vmlinux 0x9f30550e	fddi_type_trans
+EXPORT_SYMBOL vmlinux 0x9f411008	unmap_mapping_range
+EXPORT_SYMBOL vmlinux 0x9f424093	free_user_ns
+EXPORT_SYMBOL vmlinux 0x9f5a3e30	kthread_create
+EXPORT_SYMBOL vmlinux 0x9f5a6685	dm_table_put
+EXPORT_SYMBOL vmlinux 0x9f729ccd	set_disk_ro
+EXPORT_SYMBOL vmlinux 0x9f72c2eb	init_timer_key
+EXPORT_SYMBOL vmlinux 0x9f984513	strrchr
+EXPORT_SYMBOL vmlinux 0x9fa23b2a	input_flush_device
+EXPORT_SYMBOL vmlinux 0x9fa325c0	tcf_hash_insert
+EXPORT_SYMBOL vmlinux 0x9fa9396d	dev_alloc_name
+EXPORT_SYMBOL vmlinux 0x9fb3dd30	memcpy_fromiovec
+EXPORT_SYMBOL vmlinux 0x9fcae273	elv_rb_latter_request
+EXPORT_SYMBOL vmlinux 0x9fe16148	dput
+EXPORT_SYMBOL vmlinux 0x9fe2ad4a	otg_get_transceiver
+EXPORT_SYMBOL vmlinux 0xa00c7b7d	pci_bus_set_ops
+EXPORT_SYMBOL vmlinux 0xa01b3277	netpoll_send_udp
+EXPORT_SYMBOL vmlinux 0xa03523d5	security_unix_stream_connect
+EXPORT_SYMBOL vmlinux 0xa04a01bd	qdisc_class_hash_insert
+EXPORT_SYMBOL vmlinux 0xa05b24bc	journal_get_create_access
+EXPORT_SYMBOL vmlinux 0xa05c03df	mempool_kmalloc
+EXPORT_SYMBOL vmlinux 0xa05eb0d5	remove_arg_zero
+EXPORT_SYMBOL vmlinux 0xa068e4ff	mmc_card_can_sleep
+EXPORT_SYMBOL vmlinux 0xa07a8d22	sleep_on
+EXPORT_SYMBOL vmlinux 0xa07ac24b	irq_stat
+EXPORT_SYMBOL vmlinux 0xa08dcb52	bd_claim
+EXPORT_SYMBOL vmlinux 0xa0a3a22f	journal_errno
+EXPORT_SYMBOL vmlinux 0xa0a814b3	d_alloc_root
+EXPORT_SYMBOL vmlinux 0xa0b04675	vmalloc_32
+EXPORT_SYMBOL vmlinux 0xa0b20b4f	thermal_zone_device_update
+EXPORT_SYMBOL vmlinux 0xa0ceef51	out_of_line_wait_on_bit
+EXPORT_SYMBOL vmlinux 0xa0d64ce7	inet6_release
+EXPORT_SYMBOL vmlinux 0xa0da501d	path_put
+EXPORT_SYMBOL vmlinux 0xa0e640fa	pci_release_region
+EXPORT_SYMBOL vmlinux 0xa0f0cd2c	do_map_probe
+EXPORT_SYMBOL vmlinux 0xa0fa4157	register_cdrom
+EXPORT_SYMBOL vmlinux 0xa0fbac79	wake_up_bit
+EXPORT_SYMBOL vmlinux 0xa0ff1fb7	simple_dir_inode_operations
+EXPORT_SYMBOL vmlinux 0xa108eb4d	sysctl_optmem_max
+EXPORT_SYMBOL vmlinux 0xa11b0cdf	skb_copy_datagram_iovec
+EXPORT_SYMBOL vmlinux 0xa120d33c	tty_unregister_ldisc
+EXPORT_SYMBOL vmlinux 0xa134a4e8	netlink_unicast
+EXPORT_SYMBOL vmlinux 0xa13613b1	blk_queue_update_dma_pad
+EXPORT_SYMBOL vmlinux 0xa13798f8	printk_ratelimit
+EXPORT_SYMBOL vmlinux 0xa160f384	vfs_readdir
+EXPORT_SYMBOL vmlinux 0xa166a2f4	neigh_table_init
+EXPORT_SYMBOL vmlinux 0xa16ca870	mb_cache_entry_find_first
+EXPORT_SYMBOL vmlinux 0xa17e6b16	uart_unregister_driver
+EXPORT_SYMBOL vmlinux 0xa18e32f8	get_super
+EXPORT_SYMBOL vmlinux 0xa19ca792	__kfifo_put
+EXPORT_SYMBOL vmlinux 0xa1a79320	__nla_reserve
+EXPORT_SYMBOL vmlinux 0xa1b1a389	netlink_set_err
+EXPORT_SYMBOL vmlinux 0xa1b759ce	fb_add_videomode
+EXPORT_SYMBOL vmlinux 0xa1c26771	pci_map_rom
+EXPORT_SYMBOL vmlinux 0xa1c76e0a	_cond_resched
+EXPORT_SYMBOL vmlinux 0xa20ce1b8	net_msg_warn
+EXPORT_SYMBOL vmlinux 0xa218bf61	complete
+EXPORT_SYMBOL vmlinux 0xa21f6f54	alloc_file
+EXPORT_SYMBOL vmlinux 0xa22bb77e	datagram_poll
+EXPORT_SYMBOL vmlinux 0xa2361b19	pci_bus_read_config_dword
+EXPORT_SYMBOL vmlinux 0xa259c573	dma_pool_alloc
+EXPORT_SYMBOL vmlinux 0xa28ba446	inode_change_ok
+EXPORT_SYMBOL vmlinux 0xa28f8f05	xfrm_policy_unregister_afinfo
+EXPORT_SYMBOL vmlinux 0xa29a506f	blk_queue_softirq_done
+EXPORT_SYMBOL vmlinux 0xa29b1708	tcp_memory_allocated
+EXPORT_SYMBOL vmlinux 0xa2a5fd77	inet_ehash_secret
+EXPORT_SYMBOL vmlinux 0xa2bc33a3	lock_super
+EXPORT_SYMBOL vmlinux 0xa2c41a7a	ip_route_input
+EXPORT_SYMBOL vmlinux 0xa2da7b60	tcp_alloc_md5sig_pool
+EXPORT_SYMBOL vmlinux 0xa2e986c9	cdev_alloc
+EXPORT_SYMBOL vmlinux 0xa329f07e	register_shrinker
+EXPORT_SYMBOL vmlinux 0xa332cdd1	security_tun_dev_attach
+EXPORT_SYMBOL vmlinux 0xa334d852	jbd2_journal_set_features
+EXPORT_SYMBOL vmlinux 0xa3388bdb	inet_csk_destroy_sock
+EXPORT_SYMBOL vmlinux 0xa34f1ef5	crc32_le
+EXPORT_SYMBOL vmlinux 0xa35380c2	dev_get_flags
+EXPORT_SYMBOL vmlinux 0xa35de80f	ipv4_config
+EXPORT_SYMBOL vmlinux 0xa35f9a1a	remove_inode_hash
+EXPORT_SYMBOL vmlinux 0xa39d45d5	mmc_wait_for_cmd
+EXPORT_SYMBOL vmlinux 0xa3b42876	alloc_netdev_mq
+EXPORT_SYMBOL vmlinux 0xa3c34a79	md_wait_for_blocked_rdev
+EXPORT_SYMBOL vmlinux 0xa3e230fd	mii_check_gmii_support
+EXPORT_SYMBOL vmlinux 0xa3e34687	sk_stream_wait_memory
+EXPORT_SYMBOL vmlinux 0xa3e95894	pci_scan_bridge
+EXPORT_SYMBOL vmlinux 0xa3f85854	mmc_request_done
+EXPORT_SYMBOL vmlinux 0xa4239b3f	xrlim_allow
+EXPORT_SYMBOL vmlinux 0xa434979e	security_path_mkdir
+EXPORT_SYMBOL vmlinux 0xa43b9539	memcpy_fromiovecend
+EXPORT_SYMBOL vmlinux 0xa43bd414	__skb_checksum_complete_head
+EXPORT_SYMBOL vmlinux 0xa4c93b29	tty_driver_flush_buffer
+EXPORT_SYMBOL vmlinux 0xa5148eb5	rfkill_resume_polling
+EXPORT_SYMBOL vmlinux 0xa51b8b6b	block_is_partially_uptodate
+EXPORT_SYMBOL vmlinux 0xa53e835c	dev_addr_add_multiple
+EXPORT_SYMBOL vmlinux 0xa547ab12	security_path_rename
+EXPORT_SYMBOL vmlinux 0xa5632711	con_is_bound
+EXPORT_SYMBOL vmlinux 0xa568d4b2	elv_rb_former_request
+EXPORT_SYMBOL vmlinux 0xa5808bbf	tasklet_init
+EXPORT_SYMBOL vmlinux 0xa58b6804	nla_parse
+EXPORT_SYMBOL vmlinux 0xa598e29c	vesa_modes
+EXPORT_SYMBOL vmlinux 0xa5bbb17e	proc_dointvec_userhz_jiffies
+EXPORT_SYMBOL vmlinux 0xa5cef8ad	release_resource
+EXPORT_SYMBOL vmlinux 0xa5e03f04	input_register_device
+EXPORT_SYMBOL vmlinux 0xa610cc65	__scsi_iterate_devices
+EXPORT_SYMBOL vmlinux 0xa612bb59	tty_port_tty_set
+EXPORT_SYMBOL vmlinux 0xa62ceb8e	pfifo_qdisc_ops
+EXPORT_SYMBOL vmlinux 0xa63a7f9f	blkdev_issue_discard
+EXPORT_SYMBOL vmlinux 0xa63d85ab	slhc_remember
+EXPORT_SYMBOL vmlinux 0xa68124fa	hweight8
+EXPORT_SYMBOL vmlinux 0xa681fe88	generate_random_uuid
+EXPORT_SYMBOL vmlinux 0xa69e2e28	thaw_bdev
+EXPORT_SYMBOL vmlinux 0xa6b961b3	i2c_register_driver
+EXPORT_SYMBOL vmlinux 0xa6c4d953	generic_readlink
+EXPORT_SYMBOL vmlinux 0xa6dcc773	rb_insert_color
+EXPORT_SYMBOL vmlinux 0xa6e6018f	md_register_thread
+EXPORT_SYMBOL vmlinux 0xa6e6b245	genphy_suspend
+EXPORT_SYMBOL vmlinux 0xa6ebb049	simple_fill_super
+EXPORT_SYMBOL vmlinux 0xa6f5655b	block_sync_page
+EXPORT_SYMBOL vmlinux 0xa6f822f3	del_mtd_partitions
+EXPORT_SYMBOL vmlinux 0xa6ff6c20	should_remove_suid
+EXPORT_SYMBOL vmlinux 0xa74478ac	amba_find_device
+EXPORT_SYMBOL vmlinux 0xa77583b4	jbd2_journal_begin_ordered_truncate
+EXPORT_SYMBOL vmlinux 0xa7782370	netlink_ack
+EXPORT_SYMBOL vmlinux 0xa794ba03	scsi_register
+EXPORT_SYMBOL vmlinux 0xa7c379c2	security_d_instantiate
+EXPORT_SYMBOL vmlinux 0xa7eea97a	d_instantiate
+EXPORT_SYMBOL vmlinux 0xa7f6460f	pci_select_bars
+EXPORT_SYMBOL vmlinux 0xa7f76c61	bio_integrity_alloc
+EXPORT_SYMBOL vmlinux 0xa8125f00	journal_force_commit_nested
+EXPORT_SYMBOL vmlinux 0xa817d5e6	simple_rmdir
+EXPORT_SYMBOL vmlinux 0xa834f836	register_console
+EXPORT_SYMBOL vmlinux 0xa846980d	__ps2_command
+EXPORT_SYMBOL vmlinux 0xa875cbdb	dquot_destroy
+EXPORT_SYMBOL vmlinux 0xa877e305	boot_tvec_bases
+EXPORT_SYMBOL vmlinux 0xa8ac4d52	copy_io_context
+EXPORT_SYMBOL vmlinux 0xa8e1db28	inet_unregister_protosw
+EXPORT_SYMBOL vmlinux 0xa8fef7bb	security_unix_may_send
+EXPORT_SYMBOL vmlinux 0xa90f0a6d	jbd2_journal_release_buffer
+EXPORT_SYMBOL vmlinux 0xa940f81e	dev_get_stats
+EXPORT_SYMBOL vmlinux 0xa9466e3b	bioset_create
+EXPORT_SYMBOL vmlinux 0xa95007d3	soft_cursor
+EXPORT_SYMBOL vmlinux 0xa97e687a	blk_end_request_cur
+EXPORT_SYMBOL vmlinux 0xa988cee0	dev_mc_sync
+EXPORT_SYMBOL vmlinux 0xa990f88a	bdget
+EXPORT_SYMBOL vmlinux 0xa99b52e9	revert_creds
+EXPORT_SYMBOL vmlinux 0xa9b949e7	pci_prepare_to_sleep
+EXPORT_SYMBOL vmlinux 0xa9d02c9e	blk_execute_rq
+EXPORT_SYMBOL vmlinux 0xa9e51183	pci_lost_interrupt
+EXPORT_SYMBOL vmlinux 0xa9f1ed23	bit_waitqueue
+EXPORT_SYMBOL vmlinux 0xaa3d8e9f	release_sock
+EXPORT_SYMBOL vmlinux 0xaa548e4d	iw_handler_set_thrspy
+EXPORT_SYMBOL vmlinux 0xaa85d4d8	blk_init_tags
+EXPORT_SYMBOL vmlinux 0xaa8c28a5	save_mount_options
+EXPORT_SYMBOL vmlinux 0xaad25a52	unregister_qdisc
+EXPORT_SYMBOL vmlinux 0xaaf20fe1	dma_unmap_sg
+EXPORT_SYMBOL vmlinux 0xaaf86c30	generic_setxattr
+EXPORT_SYMBOL vmlinux 0xaafdc258	strcasecmp
+EXPORT_SYMBOL vmlinux 0xab04e990	lease_get_mtime
+EXPORT_SYMBOL vmlinux 0xab1b36e8	__scsi_put_command
+EXPORT_SYMBOL vmlinux 0xab2fbe9c	pcim_enable_device
+EXPORT_SYMBOL vmlinux 0xab53b0a8	mempool_alloc
+EXPORT_SYMBOL vmlinux 0xab560842	bio_integrity_trim
+EXPORT_SYMBOL vmlinux 0xab58eb4f	pci_release_selected_regions
+EXPORT_SYMBOL vmlinux 0xab600421	probe_irq_off
+EXPORT_SYMBOL vmlinux 0xab63be2a	vfs_follow_link
+EXPORT_SYMBOL vmlinux 0xab680c96	__down_read_trylock
+EXPORT_SYMBOL vmlinux 0xab7badd9	posix_acl_permission
+EXPORT_SYMBOL vmlinux 0xab7fd0f3	blk_fetch_request
+EXPORT_SYMBOL vmlinux 0xab838bf7	vga_set_legacy_decoding
+EXPORT_SYMBOL vmlinux 0xabbb181f	dev_get_by_flags
+EXPORT_SYMBOL vmlinux 0xabd0c91c	rtc_time_to_tm
+EXPORT_SYMBOL vmlinux 0xabd47787	down_killable
+EXPORT_SYMBOL vmlinux 0xabdeb7fb	neigh_seq_start
+EXPORT_SYMBOL vmlinux 0xac0ba8c1	blk_iopoll_disable
+EXPORT_SYMBOL vmlinux 0xac235c19	journal_invalidatepage
+EXPORT_SYMBOL vmlinux 0xac54fc9f	mempool_destroy
+EXPORT_SYMBOL vmlinux 0xac5c8d79	__getblk
+EXPORT_SYMBOL vmlinux 0xac5da09f	kmem_cache_create
+EXPORT_SYMBOL vmlinux 0xac5f113d	cpu_all_bits
+EXPORT_SYMBOL vmlinux 0xac6855b0	gen_kill_estimator
+EXPORT_SYMBOL vmlinux 0xac6b3ad0	vlan_gro_receive
+EXPORT_SYMBOL vmlinux 0xac7e0817	dev_load
+EXPORT_SYMBOL vmlinux 0xacba9bba	cdrom_mode_sense
+EXPORT_SYMBOL vmlinux 0xacc2d0e4	blk_queue_end_tag
+EXPORT_SYMBOL vmlinux 0xacca9176	seq_bitmap_list
+EXPORT_SYMBOL vmlinux 0xaccabc6a	in4_pton
+EXPORT_SYMBOL vmlinux 0xaccb0cee	dquot_free_inode
+EXPORT_SYMBOL vmlinux 0xacda9b8e	inode_sub_rsv_space
+EXPORT_SYMBOL vmlinux 0xacdeb154	__tracepoint_module_get
+EXPORT_SYMBOL vmlinux 0xacf4d843	match_strdup
+EXPORT_SYMBOL vmlinux 0xad00fd52	blk_queue_invalidate_tags
+EXPORT_SYMBOL vmlinux 0xad0413d4	match_hex
+EXPORT_SYMBOL vmlinux 0xad53a0f1	jbd2_journal_clear_err
+EXPORT_SYMBOL vmlinux 0xad631b86	blk_init_queue
+EXPORT_SYMBOL vmlinux 0xad96dd2f	pcie_set_readrq
+EXPORT_SYMBOL vmlinux 0xadb2f8e8	unregister_nls
+EXPORT_SYMBOL vmlinux 0xadb792c2	prepare_to_wait_exclusive
+EXPORT_SYMBOL vmlinux 0xadf42bd5	__request_region
+EXPORT_SYMBOL vmlinux 0xae013d0b	amba_release_regions
+EXPORT_SYMBOL vmlinux 0xae0193db	phy_connect_direct
+EXPORT_SYMBOL vmlinux 0xae1074c9	inet_frags_exit_net
+EXPORT_SYMBOL vmlinux 0xae10765b	scsi_device_put
+EXPORT_SYMBOL vmlinux 0xae13f7e0	scsi_release_buffers
+EXPORT_SYMBOL vmlinux 0xae1ee0db	proto_register
+EXPORT_SYMBOL vmlinux 0xae266d3b	scsi_allocate_command
+EXPORT_SYMBOL vmlinux 0xae395308	per_cpu__vm_event_states
+EXPORT_SYMBOL vmlinux 0xae3f827e	lro_receive_frags
+EXPORT_SYMBOL vmlinux 0xae5367d7	kill_fasync
+EXPORT_SYMBOL vmlinux 0xae5793df	generic_file_splice_read
+EXPORT_SYMBOL vmlinux 0xae98ce0c	md_write_start
+EXPORT_SYMBOL vmlinux 0xaec655c7	alloc_pages_exact
+EXPORT_SYMBOL vmlinux 0xaed013b9	posix_acl_valid
+EXPORT_SYMBOL vmlinux 0xaee7307c	__brelse
+EXPORT_SYMBOL vmlinux 0xaef05c21	jbd2_journal_get_undo_access
+EXPORT_SYMBOL vmlinux 0xaef9c0e1	page_put_link
+EXPORT_SYMBOL vmlinux 0xaf3dd7dc	scsi_logging_level
+EXPORT_SYMBOL vmlinux 0xaf3f7dd5	dmam_free_noncoherent
+EXPORT_SYMBOL vmlinux 0xaf466237	poll_initwait
+EXPORT_SYMBOL vmlinux 0xaf50e76d	elf_set_personality
+EXPORT_SYMBOL vmlinux 0xaf881586	journal_release_buffer
+EXPORT_SYMBOL vmlinux 0xaf8aa518	system_rev
+EXPORT_SYMBOL vmlinux 0xafb32d7d	kernel_accept
+EXPORT_SYMBOL vmlinux 0xafbacadb	tcf_hash_release
+EXPORT_SYMBOL vmlinux 0xafce482a	init_file
+EXPORT_SYMBOL vmlinux 0xafe72d4e	journal_restart
+EXPORT_SYMBOL vmlinux 0xb035c5a4	filemap_fdatawrite_range
+EXPORT_SYMBOL vmlinux 0xb0418788	scsi_prep_fn
+EXPORT_SYMBOL vmlinux 0xb047614b	xfrm_policy_byid
+EXPORT_SYMBOL vmlinux 0xb057e4d7	__rta_fill
+EXPORT_SYMBOL vmlinux 0xb076c890	splice_from_pipe_begin
+EXPORT_SYMBOL vmlinux 0xb07ff304	dm_kcopyd_copy
+EXPORT_SYMBOL vmlinux 0xb08ec161	dev_mc_unsync
+EXPORT_SYMBOL vmlinux 0xb09e427b	ethtool_op_set_sg
+EXPORT_SYMBOL vmlinux 0xb0b847ac	__bitmap_full
+EXPORT_SYMBOL vmlinux 0xb0cd9c2b	netdev_class_remove_file
+EXPORT_SYMBOL vmlinux 0xb0e10781	get_option
+EXPORT_SYMBOL vmlinux 0xb0eed911	tcp_v4_connect
+EXPORT_SYMBOL vmlinux 0xb0fc6ed3	brioctl_set
+EXPORT_SYMBOL vmlinux 0xb102c22d	dev_close
+EXPORT_SYMBOL vmlinux 0xb121390a	probe_irq_on
+EXPORT_SYMBOL vmlinux 0xb1272253	dev_kfree_skb_irq
+EXPORT_SYMBOL vmlinux 0xb1473412	security_path_mknod
+EXPORT_SYMBOL vmlinux 0xb14f0fd3	dma_free_coherent
+EXPORT_SYMBOL vmlinux 0xb1819d33	journal_init_inode
+EXPORT_SYMBOL vmlinux 0xb19760c3	bitmap_onto
+EXPORT_SYMBOL vmlinux 0xb1ad28e0	__gnu_mcount_nc
+EXPORT_SYMBOL vmlinux 0xb1c3a01a	oops_in_progress
+EXPORT_SYMBOL vmlinux 0xb1cca7d8	md_done_sync
+EXPORT_SYMBOL vmlinux 0xb224fbe2	param_get_short
+EXPORT_SYMBOL vmlinux 0xb22fe6a3	netdev_increment_features
+EXPORT_SYMBOL vmlinux 0xb232f666	sock_no_getname
+EXPORT_SYMBOL vmlinux 0xb24fc0a9	filemap_fault
+EXPORT_SYMBOL vmlinux 0xb25b5e25	ppp_register_compressor
+EXPORT_SYMBOL vmlinux 0xb261a8e3	pci_save_state
+EXPORT_SYMBOL vmlinux 0xb2632081	skb_copy_and_csum_dev
+EXPORT_SYMBOL vmlinux 0xb2668bcd	seq_puts
+EXPORT_SYMBOL vmlinux 0xb2682405	utf8_to_utf32
+EXPORT_SYMBOL vmlinux 0xb272fd2a	proc_dointvec_jiffies
+EXPORT_SYMBOL vmlinux 0xb2849dfe	tc_classify
+EXPORT_SYMBOL vmlinux 0xb28a7bbe	request_key_async_with_auxdata
+EXPORT_SYMBOL vmlinux 0xb291acf4	mdiobus_register
+EXPORT_SYMBOL vmlinux 0xb298f487	blk_queue_start_tag
+EXPORT_SYMBOL vmlinux 0xb2bf1312	__up_read
+EXPORT_SYMBOL vmlinux 0xb2c76829	ether_setup
+EXPORT_SYMBOL vmlinux 0xb2c9de27	tty_register_device
+EXPORT_SYMBOL vmlinux 0xb2d72cc7	gen_replace_estimator
+EXPORT_SYMBOL vmlinux 0xb2f338b1	put_disk
+EXPORT_SYMBOL vmlinux 0xb3393c77	kunmap_atomic
+EXPORT_SYMBOL vmlinux 0xb345b0ad	dmam_free_coherent
+EXPORT_SYMBOL vmlinux 0xb376d79d	radix_tree_tagged
+EXPORT_SYMBOL vmlinux 0xb37e0f15	nf_log_packet
+EXPORT_SYMBOL vmlinux 0xb3a307c6	si_meminfo
+EXPORT_SYMBOL vmlinux 0xb3b66e1b	module_put
+EXPORT_SYMBOL vmlinux 0xb3c1ac6e	inet_sendmsg
+EXPORT_SYMBOL vmlinux 0xb3e7dccb	dm_io_client_destroy
+EXPORT_SYMBOL vmlinux 0xb3fe02b1	down_write
+EXPORT_SYMBOL vmlinux 0xb423dba1	console_blanked
+EXPORT_SYMBOL vmlinux 0xb42453d3	param_get_invbool
+EXPORT_SYMBOL vmlinux 0xb436ffa3	__cond_resched_lock
+EXPORT_SYMBOL vmlinux 0xb4381295	scm_fp_dup
+EXPORT_SYMBOL vmlinux 0xb4390f9a	mcount
+EXPORT_SYMBOL vmlinux 0xb43afe1e	lock_rename
+EXPORT_SYMBOL vmlinux 0xb43c56a6	dev_set_allmulti
+EXPORT_SYMBOL vmlinux 0xb44b996c	block_invalidatepage
+EXPORT_SYMBOL vmlinux 0xb46def87	jbd2_journal_ack_err
+EXPORT_SYMBOL vmlinux 0xb4709322	scsi_dev_info_add_list
+EXPORT_SYMBOL vmlinux 0xb47789a5	xfrm_register_km
+EXPORT_SYMBOL vmlinux 0xb4aaeeaa	bio_uncopy_user
+EXPORT_SYMBOL vmlinux 0xb4e237bc	pskb_copy
+EXPORT_SYMBOL vmlinux 0xb5044271	vsscanf
+EXPORT_SYMBOL vmlinux 0xb50c3b4e	mmc_set_data_timeout
+EXPORT_SYMBOL vmlinux 0xb51966cf	km_new_mapping
+EXPORT_SYMBOL vmlinux 0xb534763c	sg_free_table
+EXPORT_SYMBOL vmlinux 0xb54533f7	usecs_to_jiffies
+EXPORT_SYMBOL vmlinux 0xb548b765	generic_file_aio_write
+EXPORT_SYMBOL vmlinux 0xb54a76f2	vlan_dev_vlan_id
+EXPORT_SYMBOL vmlinux 0xb54b88e9	inet_select_addr
+EXPORT_SYMBOL vmlinux 0xb57c72b2	dev_getbyhwaddr
+EXPORT_SYMBOL vmlinux 0xb5a459dc	unregister_blkdev
+EXPORT_SYMBOL vmlinux 0xb5b204b4	dm_io_client_create
+EXPORT_SYMBOL vmlinux 0xb5b7ecbf	generic_splice_sendpage
+EXPORT_SYMBOL vmlinux 0xb5ca1c46	slhc_free
+EXPORT_SYMBOL vmlinux 0xb62ed484	read_cache_page_async
+EXPORT_SYMBOL vmlinux 0xb678366f	int_sqrt
+EXPORT_SYMBOL vmlinux 0xb67a0d2f	bitmap_startwrite
+EXPORT_SYMBOL vmlinux 0xb6896671	crc_t10dif
+EXPORT_SYMBOL vmlinux 0xb6a61a86	qdisc_get_rtab
+EXPORT_SYMBOL vmlinux 0xb6a68816	find_last_bit
+EXPORT_SYMBOL vmlinux 0xb6bffb99	kstat_irqs_cpu
+EXPORT_SYMBOL vmlinux 0xb6c5a973	scsi_show_result
+EXPORT_SYMBOL vmlinux 0xb6c70a7d	__wake_up
+EXPORT_SYMBOL vmlinux 0xb6cabbdf	uart_get_divisor
+EXPORT_SYMBOL vmlinux 0xb6cb62a8	blk_end_request
+EXPORT_SYMBOL vmlinux 0xb6d5b4d3	spi_schedule_dv_device
+EXPORT_SYMBOL vmlinux 0xb716ddde	phy_mii_ioctl
+EXPORT_SYMBOL vmlinux 0xb726d05d	inet_frags_fini
+EXPORT_SYMBOL vmlinux 0xb798b8e4	flow_cache_lookup
+EXPORT_SYMBOL vmlinux 0xb79e55be	consume_skb
+EXPORT_SYMBOL vmlinux 0xb7a851c5	make_EII_client
+EXPORT_SYMBOL vmlinux 0xb7ad3321	ida_init
+EXPORT_SYMBOL vmlinux 0xb7b61546	crc32_be
+EXPORT_SYMBOL vmlinux 0xb7ba76c7	__aeabi_unwind_cpp_pr2
+EXPORT_SYMBOL vmlinux 0xb7ccb3c7	twl4030_i2c_read_u8
+EXPORT_SYMBOL vmlinux 0xb7ceecd2	dquot_free_space
+EXPORT_SYMBOL vmlinux 0xb7d34e90	jbd2_journal_unlock_updates
+EXPORT_SYMBOL vmlinux 0xb80a1bcd	con_copy_unimap
+EXPORT_SYMBOL vmlinux 0xb80ca345	pci_match_id
+EXPORT_SYMBOL vmlinux 0xb8172886	ppp_register_channel
+EXPORT_SYMBOL vmlinux 0xb83df960	nobh_write_end
+EXPORT_SYMBOL vmlinux 0xb84ed32f	proc_doulongvec_minmax
+EXPORT_SYMBOL vmlinux 0xb86e4ab9	random32
+EXPORT_SYMBOL vmlinux 0xb8708fc4	__dev_getfirstbyhwtype
+EXPORT_SYMBOL vmlinux 0xb87916cb	vfs_rmdir
+EXPORT_SYMBOL vmlinux 0xb89af9bf	srandom32
+EXPORT_SYMBOL vmlinux 0xb8aa2342	__check_region
+EXPORT_SYMBOL vmlinux 0xb8abb705	napi_frags_finish
+EXPORT_SYMBOL vmlinux 0xb8b1b9f7	tcf_exts_change
+EXPORT_SYMBOL vmlinux 0xb902453f	genphy_restart_aneg
+EXPORT_SYMBOL vmlinux 0xb9113d19	request_firmware_nowait
+EXPORT_SYMBOL vmlinux 0xb95f98d6	_memset_io
+EXPORT_SYMBOL vmlinux 0xb9646c53	sock_wake_async
+EXPORT_SYMBOL vmlinux 0xb979ed6e	mark_buffer_async_write
+EXPORT_SYMBOL vmlinux 0xb97d4c9c	mutex_lock
+EXPORT_SYMBOL vmlinux 0xb98a0185	rtc_tm_to_time
+EXPORT_SYMBOL vmlinux 0xb98ef804	vm_stat
+EXPORT_SYMBOL vmlinux 0xb9acd3d9	__put_user_2
+EXPORT_SYMBOL vmlinux 0xb9c97b86	dev_queue_xmit
+EXPORT_SYMBOL vmlinux 0xba1b80e3	blk_rq_map_sg
+EXPORT_SYMBOL vmlinux 0xba3bda2a	__downgrade_write
+EXPORT_SYMBOL vmlinux 0xba421985	sock_tx_timestamp
+EXPORT_SYMBOL vmlinux 0xba48f299	set_security_override
+EXPORT_SYMBOL vmlinux 0xba497f13	loops_per_jiffy
+EXPORT_SYMBOL vmlinux 0xba4fade2	phy_ethtool_sset
+EXPORT_SYMBOL vmlinux 0xba555d83	devcgroup_inode_permission
+EXPORT_SYMBOL vmlinux 0xba66e738	dquot_release
+EXPORT_SYMBOL vmlinux 0xba700dd2	tc_classify_compat
+EXPORT_SYMBOL vmlinux 0xba8dd9e1	netpoll_print_options
+EXPORT_SYMBOL vmlinux 0xba8f8b68	completion_done
+EXPORT_SYMBOL vmlinux 0xbaaab8ae	timespec_to_jiffies
+EXPORT_SYMBOL vmlinux 0xbaba9dda	blk_rq_init
+EXPORT_SYMBOL vmlinux 0xbad15cfb	fsync_bdev
+EXPORT_SYMBOL vmlinux 0xbada2072	dev_disable_lro
+EXPORT_SYMBOL vmlinux 0xbb0a6cf8	take_over_console
+EXPORT_SYMBOL vmlinux 0xbb0bedfb	ethtool_op_set_tx_hw_csum
+EXPORT_SYMBOL vmlinux 0xbb167766	fb_var_to_videomode
+EXPORT_SYMBOL vmlinux 0xbb189cad	disallow_signal
+EXPORT_SYMBOL vmlinux 0xbb485c4e	vfs_create
+EXPORT_SYMBOL vmlinux 0xbb4f7b20	path_get
+EXPORT_SYMBOL vmlinux 0xbb5d343d	xfrm_get_acqseq
+EXPORT_SYMBOL vmlinux 0xbb6d2099	pci_find_device
+EXPORT_SYMBOL vmlinux 0xbb72d4fe	__put_user_1
+EXPORT_SYMBOL vmlinux 0xbb76722e	skb_seq_read
+EXPORT_SYMBOL vmlinux 0xbb7c3976	put_mnt_ns
+EXPORT_SYMBOL vmlinux 0xbb85eb88	skb_pull
+EXPORT_SYMBOL vmlinux 0xbb88100e	scsi_unregister
+EXPORT_SYMBOL vmlinux 0xbb99125c	get_default_font
+EXPORT_SYMBOL vmlinux 0xbbc6ab4a	pci_bus_write_config_word
+EXPORT_SYMBOL vmlinux 0xbbf50c87	dma_alloc_writecombine
+EXPORT_SYMBOL vmlinux 0xbc0ea1b1	request_key_with_auxdata
+EXPORT_SYMBOL vmlinux 0xbc10dd97	__put_user_4
+EXPORT_SYMBOL vmlinux 0xbc147455	blk_requeue_request
+EXPORT_SYMBOL vmlinux 0xbc3e5a99	block_write_end
+EXPORT_SYMBOL vmlinux 0xbc52dd08	kthread_bind
+EXPORT_SYMBOL vmlinux 0xbc61dd46	qdisc_warn_nonwc
+EXPORT_SYMBOL vmlinux 0xbc634111	mii_ethtool_gset
+EXPORT_SYMBOL vmlinux 0xbc8a403d	simple_lookup
+EXPORT_SYMBOL vmlinux 0xbca4b7a9	get_write_access
+EXPORT_SYMBOL vmlinux 0xbcb0a41b	may_umount_tree
+EXPORT_SYMBOL vmlinux 0xbd0908c2	insert_inode_locked
+EXPORT_SYMBOL vmlinux 0xbd3fadb5	dev_gro_receive
+EXPORT_SYMBOL vmlinux 0xbd8c68ad	security_sb_clone_mnt_opts
+EXPORT_SYMBOL vmlinux 0xbdb80ef1	clk_add_alias
+EXPORT_SYMBOL vmlinux 0xbdb9e7dd	sync_inodes_sb
+EXPORT_SYMBOL vmlinux 0xbdc371b4	vga_tryget
+EXPORT_SYMBOL vmlinux 0xbdc8cf24	simple_write_begin
+EXPORT_SYMBOL vmlinux 0xbdf2580d	__raw_readsl
+EXPORT_SYMBOL vmlinux 0xbdf2d3f1	blkdev_get
+EXPORT_SYMBOL vmlinux 0xbdf5c25c	rb_next
+EXPORT_SYMBOL vmlinux 0xbe019abe	xfrm_unregister_km
+EXPORT_SYMBOL vmlinux 0xbe02ac02	bdi_set_max_ratio
+EXPORT_SYMBOL vmlinux 0xbe02bf92	mb_cache_entry_find_next
+EXPORT_SYMBOL vmlinux 0xbe0e5118	nla_memcmp
+EXPORT_SYMBOL vmlinux 0xbe5f144e	ip_route_output_key
+EXPORT_SYMBOL vmlinux 0xbe63ee40	request_resource
+EXPORT_SYMBOL vmlinux 0xbe834d03	scsi_dma_map
+EXPORT_SYMBOL vmlinux 0xbea96756	pipe_to_file
+EXPORT_SYMBOL vmlinux 0xbeca8c76	fifo_create_dflt
+EXPORT_SYMBOL vmlinux 0xbecd81e8	alloc_fcdev
+EXPORT_SYMBOL vmlinux 0xbedb2276	have_submounts
+EXPORT_SYMBOL vmlinux 0xbef43296	console_conditional_schedule
+EXPORT_SYMBOL vmlinux 0xbf01db90	generic_ro_fops
+EXPORT_SYMBOL vmlinux 0xbf11e350	input_open_device
+EXPORT_SYMBOL vmlinux 0xbf276fdd	textsearch_prepare
+EXPORT_SYMBOL vmlinux 0xbf36dd51	sk_stream_wait_close
+EXPORT_SYMBOL vmlinux 0xbf4d2a7d	tty_register_ldisc
+EXPORT_SYMBOL vmlinux 0xbf7fd2f5	schedule_timeout_killable
+EXPORT_SYMBOL vmlinux 0xbf9bcc8d	__cap_empty_set
+EXPORT_SYMBOL vmlinux 0xbf9c1e58	kernel_sendpage
+EXPORT_SYMBOL vmlinux 0xbfb87011	dm_io
+EXPORT_SYMBOL vmlinux 0xbfbbc4dd	pcibios_fixup_bus
+EXPORT_SYMBOL vmlinux 0xbfee3ad5	loop_unregister_transfer
+EXPORT_SYMBOL vmlinux 0xc0044724	blk_set_default_limits
+EXPORT_SYMBOL vmlinux 0xc00f9590	pci_claim_resource
+EXPORT_SYMBOL vmlinux 0xc011560f	bio_phys_segments
+EXPORT_SYMBOL vmlinux 0xc02cf69b	clkdev_drop
+EXPORT_SYMBOL vmlinux 0xc02ec41b	scsi_remove_device
+EXPORT_SYMBOL vmlinux 0xc036fb51	udp_lib_unhash
+EXPORT_SYMBOL vmlinux 0xc044c7be	generic_file_direct_write
+EXPORT_SYMBOL vmlinux 0xc0580937	rb_erase
+EXPORT_SYMBOL vmlinux 0xc090ce11	gen_pool_alloc
+EXPORT_SYMBOL vmlinux 0xc09a0af5	spi_display_xfer_agreement
+EXPORT_SYMBOL vmlinux 0xc0bf6ead	timecounter_cyc2time
+EXPORT_SYMBOL vmlinux 0xc0cb394a	vga_put
+EXPORT_SYMBOL vmlinux 0xc0ec2570	xfrm_state_lookup_byaddr
+EXPORT_SYMBOL vmlinux 0xc0edbff5	__register_chrdev
+EXPORT_SYMBOL vmlinux 0xc1060804	ip_mc_rejoin_group
+EXPORT_SYMBOL vmlinux 0xc11d8093	iov_shorten
+EXPORT_SYMBOL vmlinux 0xc1322758	blk_queue_resize_tags
+EXPORT_SYMBOL vmlinux 0xc1338d2a	sock_no_bind
+EXPORT_SYMBOL vmlinux 0xc1513e89	cdrom_release
+EXPORT_SYMBOL vmlinux 0xc151ebf4	slow_work_enqueue
+EXPORT_SYMBOL vmlinux 0xc1601a4f	_change_bit_le
+EXPORT_SYMBOL vmlinux 0xc1a52562	inet_accept
+EXPORT_SYMBOL vmlinux 0xc1b76199	bd_set_size
+EXPORT_SYMBOL vmlinux 0xc1fc4511	_test_and_change_bit_le
+EXPORT_SYMBOL vmlinux 0xc200732f	is_container_init
+EXPORT_SYMBOL vmlinux 0xc204e84f	xfrm4_rcv_encap
+EXPORT_SYMBOL vmlinux 0xc208215c	tcp_splice_read
+EXPORT_SYMBOL vmlinux 0xc21e5d0c	pci_set_dma_mask
+EXPORT_SYMBOL vmlinux 0xc223b5d3	dm_table_unplug_all
+EXPORT_SYMBOL vmlinux 0xc22616f1	__init_rwsem
+EXPORT_SYMBOL vmlinux 0xc24b17b6	nf_unregister_hooks
+EXPORT_SYMBOL vmlinux 0xc256e762	__bitmap_equal
+EXPORT_SYMBOL vmlinux 0xc26aef12	mdiobus_read
+EXPORT_SYMBOL vmlinux 0xc26d3d36	mmc_power_restore_host
+EXPORT_SYMBOL vmlinux 0xc27487dd	__bug
+EXPORT_SYMBOL vmlinux 0xc29531e2	map_destroy
+EXPORT_SYMBOL vmlinux 0xc2d711e1	krealloc
+EXPORT_SYMBOL vmlinux 0xc2e587d1	reset_devices
+EXPORT_SYMBOL vmlinux 0xc2ebd5a9	md_unregister_thread
+EXPORT_SYMBOL vmlinux 0xc3174b06	devm_ioremap
+EXPORT_SYMBOL vmlinux 0xc32880ca	tty_port_carrier_raised
+EXPORT_SYMBOL vmlinux 0xc359fb65	abort
+EXPORT_SYMBOL vmlinux 0xc36819eb	create_mnt_ns
+EXPORT_SYMBOL vmlinux 0xc3758f28	set_bh_page
+EXPORT_SYMBOL vmlinux 0xc38140bf	cdev_del
+EXPORT_SYMBOL vmlinux 0xc38d7a0e	blk_queue_update_dma_alignment
+EXPORT_SYMBOL vmlinux 0xc3c19d02	seq_putc
+EXPORT_SYMBOL vmlinux 0xc3c41dbe	journal_flush
+EXPORT_SYMBOL vmlinux 0xc3cb09b8	bdev_read_only
+EXPORT_SYMBOL vmlinux 0xc3cf1128	in_group_p
+EXPORT_SYMBOL vmlinux 0xc4282f88	tcp_v4_send_check
+EXPORT_SYMBOL vmlinux 0xc440c451	sg_alloc_table
+EXPORT_SYMBOL vmlinux 0xc4429c76	scsi_finish_command
+EXPORT_SYMBOL vmlinux 0xc458b2ea	gen_pool_add
+EXPORT_SYMBOL vmlinux 0xc466b1e9	slow_work_cancel
+EXPORT_SYMBOL vmlinux 0xc4992fa9	get_disk
+EXPORT_SYMBOL vmlinux 0xc499ae1e	kstrdup
+EXPORT_SYMBOL vmlinux 0xc50aeb49	blk_alloc_queue_node
+EXPORT_SYMBOL vmlinux 0xc516dde0	vfs_dq_drop
+EXPORT_SYMBOL vmlinux 0xc52f5714	fb_videomode_to_var
+EXPORT_SYMBOL vmlinux 0xc57b43f1	scsi_init_io
+EXPORT_SYMBOL vmlinux 0xc598fd98	deny_write_access
+EXPORT_SYMBOL vmlinux 0xc5e9aa0b	tcp_child_process
+EXPORT_SYMBOL vmlinux 0xc6144a0f	kmem_cache_size
+EXPORT_SYMBOL vmlinux 0xc6184045	cpu_possible_mask
+EXPORT_SYMBOL vmlinux 0xc6246eb6	pcim_iomap_regions_request_all
+EXPORT_SYMBOL vmlinux 0xc62eb10c	vm_insert_page
+EXPORT_SYMBOL vmlinux 0xc633495b	schedule_work
+EXPORT_SYMBOL vmlinux 0xc695baae	jbd2_journal_load
+EXPORT_SYMBOL vmlinux 0xc6ab86a1	mdiobus_unregister
+EXPORT_SYMBOL vmlinux 0xc6c6a76f	tcf_em_tree_destroy
+EXPORT_SYMBOL vmlinux 0xc6cf16e1	ip6_frag_match
+EXPORT_SYMBOL vmlinux 0xc6e0e167	clocksource_change_rating
+EXPORT_SYMBOL vmlinux 0xc6e375a0	inet_dgram_connect
+EXPORT_SYMBOL vmlinux 0xc7038dde	set_anon_super
+EXPORT_SYMBOL vmlinux 0xc7168a2f	neigh_update
+EXPORT_SYMBOL vmlinux 0xc722227e	posix_acl_clone
+EXPORT_SYMBOL vmlinux 0xc757669b	skb_put
+EXPORT_SYMBOL vmlinux 0xc77397be	input_free_device
+EXPORT_SYMBOL vmlinux 0xc79bcd36	dm_vcalloc
+EXPORT_SYMBOL vmlinux 0xc7a4fbed	rtnl_lock
+EXPORT_SYMBOL vmlinux 0xc7abf073	bfifo_qdisc_ops
+EXPORT_SYMBOL vmlinux 0xc7c3e3c1	pci_find_bus
+EXPORT_SYMBOL vmlinux 0xc7d5d13c	__dev_get_by_name
+EXPORT_SYMBOL vmlinux 0xc7d85e85	tcp_gro_receive
+EXPORT_SYMBOL vmlinux 0xc7ec4e02	tty_get_baud_rate
+EXPORT_SYMBOL vmlinux 0xc7ec6c27	strspn
+EXPORT_SYMBOL vmlinux 0xc7eee87e	get_mem_type
+EXPORT_SYMBOL vmlinux 0xc7f8874b	seq_escape
+EXPORT_SYMBOL vmlinux 0xc80de694	down_write_trylock
+EXPORT_SYMBOL vmlinux 0xc82c328a	scsi_ioctl
+EXPORT_SYMBOL vmlinux 0xc85033bc	serio_reconnect
+EXPORT_SYMBOL vmlinux 0xc88fcbcf	xfrm_input_resume
+EXPORT_SYMBOL vmlinux 0xc8b57c27	autoremove_wake_function
+EXPORT_SYMBOL vmlinux 0xc8d9fd17	read_cache_page_gfp
+EXPORT_SYMBOL vmlinux 0xc8ec544f	skb_free_datagram_locked
+EXPORT_SYMBOL vmlinux 0xc8ee036a	blk_sync_queue
+EXPORT_SYMBOL vmlinux 0xc8fa8acf	ps2_end_command
+EXPORT_SYMBOL vmlinux 0xc9084d37	cdev_add
+EXPORT_SYMBOL vmlinux 0xc9242666	mod_timer
+EXPORT_SYMBOL vmlinux 0xc930cbc6	lro_flush_all
+EXPORT_SYMBOL vmlinux 0xc95d0fe7	add_to_page_cache_locked
+EXPORT_SYMBOL vmlinux 0xc974485d	__splice_from_pipe
+EXPORT_SYMBOL vmlinux 0xc987bba0	tty_pair_get_tty
+EXPORT_SYMBOL vmlinux 0xc998d641	icmp_err_convert
+EXPORT_SYMBOL vmlinux 0xc9a208fd	iw_handler_set_spy
+EXPORT_SYMBOL vmlinux 0xc9cff711	journal_check_used_features
+EXPORT_SYMBOL vmlinux 0xc9e4a1e3	__put_cred
+EXPORT_SYMBOL vmlinux 0xca2b85fc	scsi_mode_sense
+EXPORT_SYMBOL vmlinux 0xca42a592	sock_setsockopt
+EXPORT_SYMBOL vmlinux 0xca455345	generic_file_open
+EXPORT_SYMBOL vmlinux 0xca470daf	tcp_read_sock
+EXPORT_SYMBOL vmlinux 0xca5dbc50	scsi_print_sense_hdr
+EXPORT_SYMBOL vmlinux 0xca6c2e40	sync_inode
+EXPORT_SYMBOL vmlinux 0xca7ae4ed	page_follow_link_light
+EXPORT_SYMBOL vmlinux 0xcaded1d5	user_path_at
+EXPORT_SYMBOL vmlinux 0xcadf9455	__lock_buffer
+EXPORT_SYMBOL vmlinux 0xcb0fcf3b	set_page_dirty_lock
+EXPORT_SYMBOL vmlinux 0xcb35341b	__alloc_pages_nodemask
+EXPORT_SYMBOL vmlinux 0xcb6517eb	xfrm6_rcv
+EXPORT_SYMBOL vmlinux 0xcb6beb40	hweight32
+EXPORT_SYMBOL vmlinux 0xcb7131fb	fb_get_options
+EXPORT_SYMBOL vmlinux 0xcbc29f4e	gen_new_estimator
+EXPORT_SYMBOL vmlinux 0xcbd417d8	register_qdisc
+EXPORT_SYMBOL vmlinux 0xcbdad435	mii_check_media
+EXPORT_SYMBOL vmlinux 0xcbe94a5b	__scsi_alloc_queue
+EXPORT_SYMBOL vmlinux 0xcbf0db94	tcf_hash_create
+EXPORT_SYMBOL vmlinux 0xcc060dd7	timecompare_transform
+EXPORT_SYMBOL vmlinux 0xcc36f32e	fb_unregister_client
+EXPORT_SYMBOL vmlinux 0xcc378ff8	framebuffer_alloc
+EXPORT_SYMBOL vmlinux 0xcc5005fe	msleep_interruptible
+EXPORT_SYMBOL vmlinux 0xcc5a1d23	scsi_print_sense
+EXPORT_SYMBOL vmlinux 0xcc68ef05	ip_queue_xmit
+EXPORT_SYMBOL vmlinux 0xcc7fa952	local_bh_enable_ip
+EXPORT_SYMBOL vmlinux 0xcc93002f	bio_integrity_set_tag
+EXPORT_SYMBOL vmlinux 0xcc9995df	blkdev_issue_flush
+EXPORT_SYMBOL vmlinux 0xcc9c14d3	freeze_bdev
+EXPORT_SYMBOL vmlinux 0xccbf5024	invalidate_partition
+EXPORT_SYMBOL vmlinux 0xcccca482	_test_and_clear_bit_le
+EXPORT_SYMBOL vmlinux 0xcd06f3c0	__module_put_and_exit
+EXPORT_SYMBOL vmlinux 0xcd63c845	__aeabi_lasr
+EXPORT_SYMBOL vmlinux 0xcd91668b	scsi_print_command
+EXPORT_SYMBOL vmlinux 0xcd963b46	pci_request_region
+EXPORT_SYMBOL vmlinux 0xcdbb616b	bitmap_start_sync
+EXPORT_SYMBOL vmlinux 0xcdcd61b1	icmpv6_send
+EXPORT_SYMBOL vmlinux 0xcde1a283	neigh_lookup_nodev
+EXPORT_SYMBOL vmlinux 0xcde42114	slow_work_sleep_till_thread_needed
+EXPORT_SYMBOL vmlinux 0xcdfe9ffc	tcp_v4_conn_request
+EXPORT_SYMBOL vmlinux 0xce19bac5	register_inet6addr_notifier
+EXPORT_SYMBOL vmlinux 0xce23f08b	scsi_is_sdev_device
+EXPORT_SYMBOL vmlinux 0xce2e4788	kmem_cache_shrink
+EXPORT_SYMBOL vmlinux 0xce36ded6	sysctl_tcp_mem
+EXPORT_SYMBOL vmlinux 0xce5ac24f	zlib_inflate_workspacesize
+EXPORT_SYMBOL vmlinux 0xce6f1026	force_sig
+EXPORT_SYMBOL vmlinux 0xce855cfc	nf_register_sockopt
+EXPORT_SYMBOL vmlinux 0xceb2a11e	textsearch_destroy
+EXPORT_SYMBOL vmlinux 0xceeca4de	elv_dispatch_add_tail
+EXPORT_SYMBOL vmlinux 0xcef32ffe	pneigh_enqueue
+EXPORT_SYMBOL vmlinux 0xcef3ce69	nla_put
+EXPORT_SYMBOL vmlinux 0xcefba83d	simple_transaction_set
+EXPORT_SYMBOL vmlinux 0xcf504fd4	tty_pair_get_pty
+EXPORT_SYMBOL vmlinux 0xcf8a1fed	__sk_dst_check
+EXPORT_SYMBOL vmlinux 0xcf952ffd	bdi_register
+EXPORT_SYMBOL vmlinux 0xcfa20942	nf_getsockopt
+EXPORT_SYMBOL vmlinux 0xcfada491	bioset_integrity_create
+EXPORT_SYMBOL vmlinux 0xcfb9006e	jiffies_to_timeval
+EXPORT_SYMBOL vmlinux 0xcfe18f23	__alloc_skb
+EXPORT_SYMBOL vmlinux 0xcff53400	kref_put
+EXPORT_SYMBOL vmlinux 0xd00fbd1b	mmc_register_driver
+EXPORT_SYMBOL vmlinux 0xd014b035	__dev_remove_pack
+EXPORT_SYMBOL vmlinux 0xd0181f4f	__bitmap_xor
+EXPORT_SYMBOL vmlinux 0xd0204255	dm_exception_store_create
+EXPORT_SYMBOL vmlinux 0xd0319d6a	inode_add_bytes
+EXPORT_SYMBOL vmlinux 0xd04e731e	per_cpu__kstat
+EXPORT_SYMBOL vmlinux 0xd06435e0	grab_cache_page_nowait
+EXPORT_SYMBOL vmlinux 0xd09f8f4b	open_by_devnum
+EXPORT_SYMBOL vmlinux 0xd0ee38b8	schedule_timeout_uninterruptible
+EXPORT_SYMBOL vmlinux 0xd1245ffd	tcf_hash_search
+EXPORT_SYMBOL vmlinux 0xd1300d73	unregister_con_driver
+EXPORT_SYMBOL vmlinux 0xd14a86ef	generic_write_checks
+EXPORT_SYMBOL vmlinux 0xd1780a83	devm_iounmap
+EXPORT_SYMBOL vmlinux 0xd17a6eff	tcf_em_tree_validate
+EXPORT_SYMBOL vmlinux 0xd196c0c1	pci_iounmap
+EXPORT_SYMBOL vmlinux 0xd19e3e01	bdi_destroy
+EXPORT_SYMBOL vmlinux 0xd1c1c168	default_file_splice_read
+EXPORT_SYMBOL vmlinux 0xd1efb47f	iov_iter_copy_from_user_atomic
+EXPORT_SYMBOL vmlinux 0xd1f77dbd	sock_sendmsg
+EXPORT_SYMBOL vmlinux 0xd1fb24d1	sysctl_ms_jiffies
+EXPORT_SYMBOL vmlinux 0xd20b5b85	simple_pin_fs
+EXPORT_SYMBOL vmlinux 0xd2320158	blk_queue_free_tags
+EXPORT_SYMBOL vmlinux 0xd25093ec	blk_queue_find_tag
+EXPORT_SYMBOL vmlinux 0xd251d7b0	security_socket_getpeersec_dgram
+EXPORT_SYMBOL vmlinux 0xd2555f19	jiffies_64_to_clock_t
+EXPORT_SYMBOL vmlinux 0xd25d4f74	console_blank_hook
+EXPORT_SYMBOL vmlinux 0xd2763640	follow_up
+EXPORT_SYMBOL vmlinux 0xd27c1c54	__xfrm_decode_session
+EXPORT_SYMBOL vmlinux 0xd2965f6f	kthread_should_stop
+EXPORT_SYMBOL vmlinux 0xd2a68761	proc_dointvec_ms_jiffies
+EXPORT_SYMBOL vmlinux 0xd2b10ca8	vfs_mkdir
+EXPORT_SYMBOL vmlinux 0xd2c27d3b	blkdev_put
+EXPORT_SYMBOL vmlinux 0xd2d4f4d0	uart_add_one_port
+EXPORT_SYMBOL vmlinux 0xd2d8df6e	dm_table_get_size
+EXPORT_SYMBOL vmlinux 0xd2df09e8	update_region
+EXPORT_SYMBOL vmlinux 0xd2e9e016	ndisc_build_skb
+EXPORT_SYMBOL vmlinux 0xd32e52c7	posix_acl_chmod_masq
+EXPORT_SYMBOL vmlinux 0xd3427f73	mempool_create_node
+EXPORT_SYMBOL vmlinux 0xd3648265	inet_csk_reset_keepalive_timer
+EXPORT_SYMBOL vmlinux 0xd38f6073	kernel_listen
+EXPORT_SYMBOL vmlinux 0xd39325e5	km_policy_expired
+EXPORT_SYMBOL vmlinux 0xd39a1f8e	__find_get_block
+EXPORT_SYMBOL vmlinux 0xd39e8327	netif_rx_ni
+EXPORT_SYMBOL vmlinux 0xd3dbfbc4	_find_first_zero_bit_le
+EXPORT_SYMBOL vmlinux 0xd3e6db54	install_exec_creds
+EXPORT_SYMBOL vmlinux 0xd3fad1f9	do_splice_from
+EXPORT_SYMBOL vmlinux 0xd418e1c0	adjust_resource
+EXPORT_SYMBOL vmlinux 0xd4389dca	sock_kmalloc
+EXPORT_SYMBOL vmlinux 0xd45c9a9a	input_event
+EXPORT_SYMBOL vmlinux 0xd464e348	tty_hung_up_p
+EXPORT_SYMBOL vmlinux 0xd4944778	skb_pad
+EXPORT_SYMBOL vmlinux 0xd4b51a9c	generic_block_fiemap
+EXPORT_SYMBOL vmlinux 0xd4df9a18	unmap_underlying_metadata
+EXPORT_SYMBOL vmlinux 0xd4e2d07e	xfrm_stateonly_find
+EXPORT_SYMBOL vmlinux 0xd5263820	mb_cache_destroy
+EXPORT_SYMBOL vmlinux 0xd53baf25	simple_sync_file
+EXPORT_SYMBOL vmlinux 0xd5688a7a	radix_tree_insert
+EXPORT_SYMBOL vmlinux 0xd57868bc	cdrom_number_of_slots
+EXPORT_SYMBOL vmlinux 0xd5a6e632	put_io_context
+EXPORT_SYMBOL vmlinux 0xd5b461a6	get_user_pages
+EXPORT_SYMBOL vmlinux 0xd5c06ef1	scsi_get_device_flags_keyed
+EXPORT_SYMBOL vmlinux 0xd5c8ba50	input_set_capability
+EXPORT_SYMBOL vmlinux 0xd5d8bfad	pcix_get_mmrbc
+EXPORT_SYMBOL vmlinux 0xd618bc0c	neigh_parms_alloc
+EXPORT_SYMBOL vmlinux 0xd627480b	strncat
+EXPORT_SYMBOL vmlinux 0xd62c833f	schedule_timeout
+EXPORT_SYMBOL vmlinux 0xd62ec627	mmc_try_claim_host
+EXPORT_SYMBOL vmlinux 0xd65ee9f3	simple_set_mnt
+EXPORT_SYMBOL vmlinux 0xd66c6228	down_read_trylock
+EXPORT_SYMBOL vmlinux 0xd66edf37	__scsi_add_device
+EXPORT_SYMBOL vmlinux 0xd6a78d08	smp_call_function_single
+EXPORT_SYMBOL vmlinux 0xd6d8a8f9	km_state_expired
+EXPORT_SYMBOL vmlinux 0xd6de1124	journal_dirty_metadata
+EXPORT_SYMBOL vmlinux 0xd6ee688f	vmalloc
+EXPORT_SYMBOL vmlinux 0xd7253deb	xfrm_init_state
+EXPORT_SYMBOL vmlinux 0xd73ba198	bio_add_page
+EXPORT_SYMBOL vmlinux 0xd75830a8	elv_rq_merge_ok
+EXPORT_SYMBOL vmlinux 0xd77a1fe5	journal_unlock_updates
+EXPORT_SYMBOL vmlinux 0xd77a5aa5	__bitmap_and
+EXPORT_SYMBOL vmlinux 0xd78ccf8b	neigh_seq_next
+EXPORT_SYMBOL vmlinux 0xd79ae4cb	eth_header_parse
+EXPORT_SYMBOL vmlinux 0xd79b5a02	allow_signal
+EXPORT_SYMBOL vmlinux 0xd7b69fae	idr_find
+EXPORT_SYMBOL vmlinux 0xd7ba52fd	pci_request_regions_exclusive
+EXPORT_SYMBOL vmlinux 0xd7be3339	skb_split
+EXPORT_SYMBOL vmlinux 0xd7e7ebd5	truncate_inode_pages
+EXPORT_SYMBOL vmlinux 0xd8282ff0	posix_acl_equiv_mode
+EXPORT_SYMBOL vmlinux 0xd830f411	skb_queue_tail
+EXPORT_SYMBOL vmlinux 0xd83791bc	nf_conntrack_destroy
+EXPORT_SYMBOL vmlinux 0xd8463b5c	input_unregister_handle
+EXPORT_SYMBOL vmlinux 0xd854df8c	neigh_resolve_output
+EXPORT_SYMBOL vmlinux 0xd8735fd6	posix_lock_file_wait
+EXPORT_SYMBOL vmlinux 0xd89e0334	qdisc_reset
+EXPORT_SYMBOL vmlinux 0xd8a2ab95	in_egroup_p
+EXPORT_SYMBOL vmlinux 0xd8cdd05e	user_revoke
+EXPORT_SYMBOL vmlinux 0xd8e484f0	register_chrdev_region
+EXPORT_SYMBOL vmlinux 0xd901ad3b	elevator_init
+EXPORT_SYMBOL vmlinux 0xd90cd369	devm_ioremap_nocache
+EXPORT_SYMBOL vmlinux 0xd92e7d57	xfrm_find_acq_byseq
+EXPORT_SYMBOL vmlinux 0xd9436ed9	tcp_sendpage
+EXPORT_SYMBOL vmlinux 0xd95220fb	kernel_connect
+EXPORT_SYMBOL vmlinux 0xd954f352	seq_lseek
+EXPORT_SYMBOL vmlinux 0xd963a74a	flush_delayed_work
+EXPORT_SYMBOL vmlinux 0xd964d491	replace_mount_options
+EXPORT_SYMBOL vmlinux 0xd985dc99	mempool_free_pages
+EXPORT_SYMBOL vmlinux 0xd99effe4	tcp_v4_md5_do_add
+EXPORT_SYMBOL vmlinux 0xd9c46441	iw_handler_get_spy
+EXPORT_SYMBOL vmlinux 0xd9ce8f0c	strnlen
+EXPORT_SYMBOL vmlinux 0xda1a7335	kasprintf
+EXPORT_SYMBOL vmlinux 0xda1fc224	cpu_cache
+EXPORT_SYMBOL vmlinux 0xda3b0f40	ipv4_specific
+EXPORT_SYMBOL vmlinux 0xda3cb8b1	tcf_hash_destroy
+EXPORT_SYMBOL vmlinux 0xda5ea696	_test_and_set_bit_le
+EXPORT_SYMBOL vmlinux 0xda6f22b3	vc_cons
+EXPORT_SYMBOL vmlinux 0xda7379fa	vfs_link
+EXPORT_SYMBOL vmlinux 0xda7a7853	xfrm_state_walk
+EXPORT_SYMBOL vmlinux 0xda7ca6cb	fb_mode_is_equal
+EXPORT_SYMBOL vmlinux 0xda8af7ad	fb_find_nearest_mode
+EXPORT_SYMBOL vmlinux 0xda8b5096	xfrm_cfg_mutex
+EXPORT_SYMBOL vmlinux 0xda97fc7f	sb_set_blocksize
+EXPORT_SYMBOL vmlinux 0xda9e25e5	alloc_mdio_bitbang
+EXPORT_SYMBOL vmlinux 0xdaa57ec3	totalhigh_pages
+EXPORT_SYMBOL vmlinux 0xdac18216	tcp_v4_destroy_sock
+EXPORT_SYMBOL vmlinux 0xdaec947f	insert_inode_locked4
+EXPORT_SYMBOL vmlinux 0xdb02b264	pci_get_slot
+EXPORT_SYMBOL vmlinux 0xdb2247ff	elv_dispatch_sort
+EXPORT_SYMBOL vmlinux 0xdb4c88b4	groups_alloc
+EXPORT_SYMBOL vmlinux 0xdb66dcb7	sock_common_setsockopt
+EXPORT_SYMBOL vmlinux 0xdb7aee85	vmap
+EXPORT_SYMBOL vmlinux 0xdb864d65	iov_iter_single_seg_count
+EXPORT_SYMBOL vmlinux 0xdb9ee394	thermal_zone_unbind_cooling_device
+EXPORT_SYMBOL vmlinux 0xdba37084	kernel_read
+EXPORT_SYMBOL vmlinux 0xdba44fea	journal_dirty_data
+EXPORT_SYMBOL vmlinux 0xdba90f24	fb_set_suspend
+EXPORT_SYMBOL vmlinux 0xdbcd416e	sysctl_ip_nonlocal_bind
+EXPORT_SYMBOL vmlinux 0xdbd887d9	proc_mkdir
+EXPORT_SYMBOL vmlinux 0xdc047fc4	scsi_dev_info_list_add_keyed
+EXPORT_SYMBOL vmlinux 0xdc053205	udp_memory_allocated
+EXPORT_SYMBOL vmlinux 0xdc14eda7	pci_pci_problems
+EXPORT_SYMBOL vmlinux 0xdc1fbae0	dentry_unhash
+EXPORT_SYMBOL vmlinux 0xdc244c44	nf_setsockopt
+EXPORT_SYMBOL vmlinux 0xdc2adb35	add_taint
+EXPORT_SYMBOL vmlinux 0xdc2e7c2f	pci_pme_active
+EXPORT_SYMBOL vmlinux 0xdc380e38	kernel_getpeername
+EXPORT_SYMBOL vmlinux 0xdc43a9c8	daemonize
+EXPORT_SYMBOL vmlinux 0xdc74cc24	kmem_cache_alloc
+EXPORT_SYMBOL vmlinux 0xdca0e950	genl_register_family
+EXPORT_SYMBOL vmlinux 0xdca85cf5	eth_change_mtu
+EXPORT_SYMBOL vmlinux 0xdcb0349b	sys_close
+EXPORT_SYMBOL vmlinux 0xdcb2c64c	tty_wait_until_sent
+EXPORT_SYMBOL vmlinux 0xdcfca1d6	llc_sap_find
+EXPORT_SYMBOL vmlinux 0xdd01255b	tcp_v4_do_rcv
+EXPORT_SYMBOL vmlinux 0xdd0a2ba2	strlcat
+EXPORT_SYMBOL vmlinux 0xdd157e32	scsi_host_set_state
+EXPORT_SYMBOL vmlinux 0xdd1f4305	blk_queue_stack_limits
+EXPORT_SYMBOL vmlinux 0xdd27fa87	memchr
+EXPORT_SYMBOL vmlinux 0xdd42282d	pci_fixup_device
+EXPORT_SYMBOL vmlinux 0xdd6bfccd	radix_tree_tag_set
+EXPORT_SYMBOL vmlinux 0xdda89018	fb_get_buffer_offset
+EXPORT_SYMBOL vmlinux 0xddc4007b	tty_port_lower_dtr_rts
+EXPORT_SYMBOL vmlinux 0xde04dcf2	call_usermodehelper_setkeys
+EXPORT_SYMBOL vmlinux 0xde2d287d	genl_unregister_ops
+EXPORT_SYMBOL vmlinux 0xde31b902	blk_limits_io_opt
+EXPORT_SYMBOL vmlinux 0xde3c68a6	cpu_online_mask
+EXPORT_SYMBOL vmlinux 0xde40243d	dquot_commit_info
+EXPORT_SYMBOL vmlinux 0xde4b0ac8	dma_sync_sg_for_cpu
+EXPORT_SYMBOL vmlinux 0xde5d413e	block_write_begin
+EXPORT_SYMBOL vmlinux 0xde6faa03	mii_link_ok
+EXPORT_SYMBOL vmlinux 0xde75b689	set_irq_type
+EXPORT_SYMBOL vmlinux 0xde8d0a6b	inode_setattr
+EXPORT_SYMBOL vmlinux 0xde9360ba	totalram_pages
+EXPORT_SYMBOL vmlinux 0xde98ed39	blk_queue_io_opt
+EXPORT_SYMBOL vmlinux 0xde9cf8e5	uart_match_port
+EXPORT_SYMBOL vmlinux 0xde9e33f7	tty_free_termios
+EXPORT_SYMBOL vmlinux 0xde9f5200	skb_store_bits
+EXPORT_SYMBOL vmlinux 0xdeb5d796	generic_cont_expand_simple
+EXPORT_SYMBOL vmlinux 0xdeb695f1	xfrm_policy_register_afinfo
+EXPORT_SYMBOL vmlinux 0xdee075ba	gen_pool_free
+EXPORT_SYMBOL vmlinux 0xdefc7cc7	bio_free
+EXPORT_SYMBOL vmlinux 0xdf1623e7	tty_hangup
+EXPORT_SYMBOL vmlinux 0xdf16efc2	vfsmount_lock
+EXPORT_SYMBOL vmlinux 0xdf1b904e	pagevec_lookup
+EXPORT_SYMBOL vmlinux 0xdf2f198e	sock_no_setsockopt
+EXPORT_SYMBOL vmlinux 0xdf2f3fcf	jbd2_journal_get_write_access
+EXPORT_SYMBOL vmlinux 0xdf4c8767	ns_to_timeval
+EXPORT_SYMBOL vmlinux 0xdf52e673	dquot_release_reserved_space
+EXPORT_SYMBOL vmlinux 0xdf60cc27	__print_symbol
+EXPORT_SYMBOL vmlinux 0xdf69f578	dma_map_sg
+EXPORT_SYMBOL vmlinux 0xdf821c6a	dm_put_device
+EXPORT_SYMBOL vmlinux 0xdf929370	fs_overflowgid
+EXPORT_SYMBOL vmlinux 0xdf9c961b	spi_dv_device
+EXPORT_SYMBOL vmlinux 0xdfb01a80	cpu_v7_dcache_clean_area
+EXPORT_SYMBOL vmlinux 0xdfc5169b	slhc_init
+EXPORT_SYMBOL vmlinux 0xdfcf996e	udp_flush_pending_frames
+EXPORT_SYMBOL vmlinux 0xdfde8ce8	free_mdio_bitbang
+EXPORT_SYMBOL vmlinux 0xdfe6470c	blk_queue_init_tags
+EXPORT_SYMBOL vmlinux 0xe036c8fb	bio_integrity_free
+EXPORT_SYMBOL vmlinux 0xe0607d6e	pcix_get_max_mmrbc
+EXPORT_SYMBOL vmlinux 0xe075d6eb	iter_div_u64_rem
+EXPORT_SYMBOL vmlinux 0xe0768351	phy_scan_fixups
+EXPORT_SYMBOL vmlinux 0xe08c57a6	tcp_prot
+EXPORT_SYMBOL vmlinux 0xe09d3a94	jbd2_journal_start
+EXPORT_SYMBOL vmlinux 0xe0abc94a	inet_dgram_ops
+EXPORT_SYMBOL vmlinux 0xe0b13336	argv_free
+EXPORT_SYMBOL vmlinux 0xe0b6babd	neigh_create
+EXPORT_SYMBOL vmlinux 0xe0bc24a1	param_set_ushort
+EXPORT_SYMBOL vmlinux 0xe0e3cbf1	gnet_stats_copy_queue
+EXPORT_SYMBOL vmlinux 0xe0f0c1d1	mb_cache_entry_alloc
+EXPORT_SYMBOL vmlinux 0xe113bbbc	csum_partial
+EXPORT_SYMBOL vmlinux 0xe144e18d	inet_proto_csum_replace4
+EXPORT_SYMBOL vmlinux 0xe14b6e47	napi_frags_skb
+EXPORT_SYMBOL vmlinux 0xe154df7c	pci_bus_write_config_dword
+EXPORT_SYMBOL vmlinux 0xe162a5ee	napi_complete
+EXPORT_SYMBOL vmlinux 0xe1761617	security_inet_conn_request
+EXPORT_SYMBOL vmlinux 0xe1787358	kthread_stop
+EXPORT_SYMBOL vmlinux 0xe17d7e86	__kfree_skb
+EXPORT_SYMBOL vmlinux 0xe1a065b3	unregister_netdev
+EXPORT_SYMBOL vmlinux 0xe1a81c3a	icmpv6msg_statistics
+EXPORT_SYMBOL vmlinux 0xe1c9dd8d	ps2_begin_command
+EXPORT_SYMBOL vmlinux 0xe1d8ca2a	tcp_rcv_established
+EXPORT_SYMBOL vmlinux 0xe1dc2dfb	__serio_register_port
+EXPORT_SYMBOL vmlinux 0xe1ec3f99	bitmap_cond_end_sync
+EXPORT_SYMBOL vmlinux 0xe204aa1b	pci_target_state
+EXPORT_SYMBOL vmlinux 0xe217cab9	__lookup_one_len
+EXPORT_SYMBOL vmlinux 0xe23728e6	tty_port_hangup
+EXPORT_SYMBOL vmlinux 0xe23ae481	blk_iopoll_complete
+EXPORT_SYMBOL vmlinux 0xe2490dea	tcp_shutdown
+EXPORT_SYMBOL vmlinux 0xe24d3a97	jiffies_64
+EXPORT_SYMBOL vmlinux 0xe260abda	elevator_exit
+EXPORT_SYMBOL vmlinux 0xe272db51	netpoll_cleanup
+EXPORT_SYMBOL vmlinux 0xe286f981	clk_get_rate
+EXPORT_SYMBOL vmlinux 0xe2c8e2e1	find_inode_number
+EXPORT_SYMBOL vmlinux 0xe2d5255a	strcmp
+EXPORT_SYMBOL vmlinux 0xe2e5e19c	ip4_datagram_connect
+EXPORT_SYMBOL vmlinux 0xe2e8065e	memdup_user
+EXPORT_SYMBOL vmlinux 0xe2f4753f	fib_default_rule_add
+EXPORT_SYMBOL vmlinux 0xe2fae716	kmemdup
+EXPORT_SYMBOL vmlinux 0xe3139778	pci_setup_cardbus
+EXPORT_SYMBOL vmlinux 0xe335bd44	elv_abort_queue
+EXPORT_SYMBOL vmlinux 0xe34ee931	pci_enable_bridges
+EXPORT_SYMBOL vmlinux 0xe3610db6	wireless_send_event
+EXPORT_SYMBOL vmlinux 0xe3612091	dma_pool_free
+EXPORT_SYMBOL vmlinux 0xe3820c5c	vmtruncate
+EXPORT_SYMBOL vmlinux 0xe39b676a	__sk_mem_schedule
+EXPORT_SYMBOL vmlinux 0xe3c277b0	dev_change_flags
+EXPORT_SYMBOL vmlinux 0xe3c6af69	skb_recycle_check
+EXPORT_SYMBOL vmlinux 0xe3dadecf	journal_forget
+EXPORT_SYMBOL vmlinux 0xe3f393f3	scsi_register_interface
+EXPORT_SYMBOL vmlinux 0xe426ea7b	path_lookup
+EXPORT_SYMBOL vmlinux 0xe43c7577	neigh_table_init_no_netlink
+EXPORT_SYMBOL vmlinux 0xe448a8ad	scsi_get_command
+EXPORT_SYMBOL vmlinux 0xe473d63a	rtnetlink_put_metrics
+EXPORT_SYMBOL vmlinux 0xe4a968d1	bio_split
+EXPORT_SYMBOL vmlinux 0xe4a97c71	__down_write_trylock
+EXPORT_SYMBOL vmlinux 0xe4c80097	cacheid
+EXPORT_SYMBOL vmlinux 0xe4dd4a39	sysctl_data
+EXPORT_SYMBOL vmlinux 0xe4dda3ab	lock_may_read
+EXPORT_SYMBOL vmlinux 0xe4f1695e	cookie_check_timestamp
+EXPORT_SYMBOL vmlinux 0xe4f9c9ae	prepare_creds
+EXPORT_SYMBOL vmlinux 0xe501b88c	jbd2_journal_try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0xe523ad75	synchronize_irq
+EXPORT_SYMBOL vmlinux 0xe54d5c83	inode_set_bytes
+EXPORT_SYMBOL vmlinux 0xe5739162	arp_send
+EXPORT_SYMBOL vmlinux 0xe57878a1	in6_pton
+EXPORT_SYMBOL vmlinux 0xe5867808	dlci_ioctl_set
+EXPORT_SYMBOL vmlinux 0xe5aaa03f	seq_open
+EXPORT_SYMBOL vmlinux 0xe5ad28e4	scsi_report_bus_reset
+EXPORT_SYMBOL vmlinux 0xe5c11aed	sk_stream_wait_connect
+EXPORT_SYMBOL vmlinux 0xe5c78a99	do_blank_screen
+EXPORT_SYMBOL vmlinux 0xe5c89670	skb_gro_reset_offset
+EXPORT_SYMBOL vmlinux 0xe5cac621	kill_pid
+EXPORT_SYMBOL vmlinux 0xe5d799c8	__xfrm_state_delete
+EXPORT_SYMBOL vmlinux 0xe5db40c2	napi_reuse_skb
+EXPORT_SYMBOL vmlinux 0xe5ed5467	xfrm_policy_walk_init
+EXPORT_SYMBOL vmlinux 0xe60914e8	pci_enable_device_mem
+EXPORT_SYMBOL vmlinux 0xe6193d94	ip_ct_attach
+EXPORT_SYMBOL vmlinux 0xe641de09	init_net
+EXPORT_SYMBOL vmlinux 0xe6562614	udplite_table
+EXPORT_SYMBOL vmlinux 0xe6608ac2	sock_kfree_s
+EXPORT_SYMBOL vmlinux 0xe67649af	napi_skb_finish
+EXPORT_SYMBOL vmlinux 0xe690b8fd	__ipv6_isatap_ifid
+EXPORT_SYMBOL vmlinux 0xe697d108	__blk_iopoll_complete
+EXPORT_SYMBOL vmlinux 0xe6c3ebb0	__raw_writesw
+EXPORT_SYMBOL vmlinux 0xe6e1ef5a	rfkill_blocked
+EXPORT_SYMBOL vmlinux 0xe6e5fe37	tty_port_block_til_ready
+EXPORT_SYMBOL vmlinux 0xe6ebc016	key_create_or_update
+EXPORT_SYMBOL vmlinux 0xe6f9636f	genphy_read_status
+EXPORT_SYMBOL vmlinux 0xe6fbe430	can_do_mlock
+EXPORT_SYMBOL vmlinux 0xe6fcafb1	tcp_v4_md5_do_del
+EXPORT_SYMBOL vmlinux 0xe707d823	__aeabi_uidiv
+EXPORT_SYMBOL vmlinux 0xe714375c	__tasklet_hi_schedule_first
+EXPORT_SYMBOL vmlinux 0xe7196208	__scm_send
+EXPORT_SYMBOL vmlinux 0xe719dd28	ipv6_dev_get_saddr
+EXPORT_SYMBOL vmlinux 0xe72d6e09	blk_queue_dma_pad
+EXPORT_SYMBOL vmlinux 0xe734ac4f	blk_start_queue
+EXPORT_SYMBOL vmlinux 0xe7635c17	phy_detach
+EXPORT_SYMBOL vmlinux 0xe7a70500	inode_permission
+EXPORT_SYMBOL vmlinux 0xe7d2aca1	security_sk_classify_flow
+EXPORT_SYMBOL vmlinux 0xe7d4daac	seq_list_next
+EXPORT_SYMBOL vmlinux 0xe7d56679	jbd2_journal_stop
+EXPORT_SYMBOL vmlinux 0xe7dae90e	register_key_type
+EXPORT_SYMBOL vmlinux 0xe7ed9c44	dm_dirty_log_create
+EXPORT_SYMBOL vmlinux 0xe7fa97e3	register_filesystem
+EXPORT_SYMBOL vmlinux 0xe8182a56	bmap
+EXPORT_SYMBOL vmlinux 0xe81f0d72	ppp_channel_index
+EXPORT_SYMBOL vmlinux 0xe824a0ff	xfrm_policy_insert
+EXPORT_SYMBOL vmlinux 0xe85602ff	nf_register_queue_handler
+EXPORT_SYMBOL vmlinux 0xe866412d	xfrm_bundle_ok
+EXPORT_SYMBOL vmlinux 0xe8794ce1	slhc_toss
+EXPORT_SYMBOL vmlinux 0xe894750c	ip_mc_dec_group
+EXPORT_SYMBOL vmlinux 0xe8958ccf	pcie_get_readrq
+EXPORT_SYMBOL vmlinux 0xe8992803	key_revoke
+EXPORT_SYMBOL vmlinux 0xe8a1c56c	tty_write_room
+EXPORT_SYMBOL vmlinux 0xe8b0b057	vfs_fsync_range
+EXPORT_SYMBOL vmlinux 0xe8cd902e	hweight16
+EXPORT_SYMBOL vmlinux 0xe8d843e3	ip_nat_decode_session
+EXPORT_SYMBOL vmlinux 0xe8e4c09d	pci_get_class
+EXPORT_SYMBOL vmlinux 0xe90416d6	sock_init_data
+EXPORT_SYMBOL vmlinux 0xe90dcae0	__request_module
+EXPORT_SYMBOL vmlinux 0xe914e41e	strcpy
+EXPORT_SYMBOL vmlinux 0xe9164872	flush_old_exec
+EXPORT_SYMBOL vmlinux 0xe95861f8	neigh_lookup
+EXPORT_SYMBOL vmlinux 0xe9a940a5	bio_map_kern
+EXPORT_SYMBOL vmlinux 0xe9b4dbf3	alloc_disk
+EXPORT_SYMBOL vmlinux 0xe9cb6572	blk_queue_max_hw_segments
+EXPORT_SYMBOL vmlinux 0xe9d016bf	skb_append_datato_frags
+EXPORT_SYMBOL vmlinux 0xe9df4633	bio_integrity_clone
+EXPORT_SYMBOL vmlinux 0xe9e779f5	mb_cache_entry_release
+EXPORT_SYMBOL vmlinux 0xea054b22	nla_policy_len
+EXPORT_SYMBOL vmlinux 0xea10212a	int_to_scsilun
+EXPORT_SYMBOL vmlinux 0xea10655a	__bitmap_intersects
+EXPORT_SYMBOL vmlinux 0xea147363	printk
+EXPORT_SYMBOL vmlinux 0xea1b7f24	clear_inode
+EXPORT_SYMBOL vmlinux 0xea2d33a2	radix_tree_gang_lookup_slot
+EXPORT_SYMBOL vmlinux 0xea3ff406	mmc_host_enable
+EXPORT_SYMBOL vmlinux 0xea4ef7a6	uart_register_driver
+EXPORT_SYMBOL vmlinux 0xea7987f1	key_update
+EXPORT_SYMBOL vmlinux 0xea83d916	locks_init_lock
+EXPORT_SYMBOL vmlinux 0xea858cb5	radix_tree_gang_lookup_tag
+EXPORT_SYMBOL vmlinux 0xea9679ee	neigh_event_ns
+EXPORT_SYMBOL vmlinux 0xeab6c5b9	journal_check_available_features
+EXPORT_SYMBOL vmlinux 0xeabffa2e	tcp_connect
+EXPORT_SYMBOL vmlinux 0xeaceebbd	kernel_sock_shutdown
+EXPORT_SYMBOL vmlinux 0xead4dc7f	journal_set_features
+EXPORT_SYMBOL vmlinux 0xead9a16b	__inet6_hash
+EXPORT_SYMBOL vmlinux 0xeae3dfd6	__const_udelay
+EXPORT_SYMBOL vmlinux 0xeafff3ca	generic_write_end
+EXPORT_SYMBOL vmlinux 0xeb4a712a	kernel_getsockname
+EXPORT_SYMBOL vmlinux 0xeb595e26	cfb_copyarea
+EXPORT_SYMBOL vmlinux 0xeb7c6f65	neigh_changeaddr
+EXPORT_SYMBOL vmlinux 0xeb8f54b3	strstrip
+EXPORT_SYMBOL vmlinux 0xeb992d78	tcp_setsockopt
+EXPORT_SYMBOL vmlinux 0xeba6bbe5	inet_sk_rebuild_header
+EXPORT_SYMBOL vmlinux 0xebcdc989	dev_set_mtu
+EXPORT_SYMBOL vmlinux 0xebd273a6	strict_strtoull
+EXPORT_SYMBOL vmlinux 0xebe785b7	tty_check_change
+EXPORT_SYMBOL vmlinux 0xebf04e85	inet_sock_destruct
+EXPORT_SYMBOL vmlinux 0xebfc73d2	dev_kfree_skb_any
+EXPORT_SYMBOL vmlinux 0xebfdcbdf	system_serial_high
+EXPORT_SYMBOL vmlinux 0xec17cbb5	unregister_8022_client
+EXPORT_SYMBOL vmlinux 0xec216124	scsi_set_medium_removal
+EXPORT_SYMBOL vmlinux 0xec24ee3b	__page_symlink
+EXPORT_SYMBOL vmlinux 0xec45f0f0	jbd2_log_wait_commit
+EXPORT_SYMBOL vmlinux 0xec4d9e3a	clk_get_sys
+EXPORT_SYMBOL vmlinux 0xec794ba0	__send_remote_softirq
+EXPORT_SYMBOL vmlinux 0xec9d589f	__dev_get_by_index
+EXPORT_SYMBOL vmlinux 0xec9f4673	uart_write_wakeup
+EXPORT_SYMBOL vmlinux 0xecd70e42	netlink_kernel_release
+EXPORT_SYMBOL vmlinux 0xece3964b	generic_block_bmap
+EXPORT_SYMBOL vmlinux 0xeceebb3c	linkwatch_fire_event
+EXPORT_SYMBOL vmlinux 0xed4be8eb	netlink_broadcast
+EXPORT_SYMBOL vmlinux 0xed8d4953	simple_dir_operations
+EXPORT_SYMBOL vmlinux 0xeda0d76e	gen_estimator_active
+EXPORT_SYMBOL vmlinux 0xedbaee5e	nla_strcmp
+EXPORT_SYMBOL vmlinux 0xedc95a25	__bread
+EXPORT_SYMBOL vmlinux 0xedd64bf6	mntput_no_expire
+EXPORT_SYMBOL vmlinux 0xedd9106d	__ashrdi3
+EXPORT_SYMBOL vmlinux 0xedda906e	jbd2_journal_start_commit
+EXPORT_SYMBOL vmlinux 0xeddbf9e0	dma_alloc_coherent
+EXPORT_SYMBOL vmlinux 0xedf86a63	md_integrity_register
+EXPORT_SYMBOL vmlinux 0xedfea240	unregister_filesystem
+EXPORT_SYMBOL vmlinux 0xee0115db	i2c_put_adapter
+EXPORT_SYMBOL vmlinux 0xee1c240d	clocksource_register
+EXPORT_SYMBOL vmlinux 0xee2d0fc7	_local_bh_enable
+EXPORT_SYMBOL vmlinux 0xee355e6a	mdiobus_alloc
+EXPORT_SYMBOL vmlinux 0xee42293d	neigh_for_each
+EXPORT_SYMBOL vmlinux 0xee6fcc72	fb_pan_display
+EXPORT_SYMBOL vmlinux 0xee90884e	dq_data_lock
+EXPORT_SYMBOL vmlinux 0xeea9dbaf	bitmap_bitremap
+EXPORT_SYMBOL vmlinux 0xeebeec31	journal_update_format
+EXPORT_SYMBOL vmlinux 0xeeeac2ed	dm_table_get_mode
+EXPORT_SYMBOL vmlinux 0xeeecc2bd	md_error
+EXPORT_SYMBOL vmlinux 0xeefd15bd	block_truncate_page
+EXPORT_SYMBOL vmlinux 0xef1a561a	add_mtd_partitions
+EXPORT_SYMBOL vmlinux 0xef6ed1ba	param_set_invbool
+EXPORT_SYMBOL vmlinux 0xef6f6b64	is_bad_inode
+EXPORT_SYMBOL vmlinux 0xef785270	balance_dirty_pages_ratelimited_nr
+EXPORT_SYMBOL vmlinux 0xef9043f7	journal_load
+EXPORT_SYMBOL vmlinux 0xef90c6d8	dst_alloc
+EXPORT_SYMBOL vmlinux 0xefd6cf06	__aeabi_unwind_cpp_pr0
+EXPORT_SYMBOL vmlinux 0xefdd70ce	security_secid_to_secctx
+EXPORT_SYMBOL vmlinux 0xf0009fee	put_pages_list
+EXPORT_SYMBOL vmlinux 0xf0145554	ipv6_chk_prefix
+EXPORT_SYMBOL vmlinux 0xf05f297c	qdisc_tree_decrease_qlen
+EXPORT_SYMBOL vmlinux 0xf05f9d83	ilookup
+EXPORT_SYMBOL vmlinux 0xf08911d8	tcp_simple_retransmit
+EXPORT_SYMBOL vmlinux 0xf0c7d664	console_start
+EXPORT_SYMBOL vmlinux 0xf0d79bec	lro_vlan_hwaccel_receive_skb
+EXPORT_SYMBOL vmlinux 0xf0ef15b4	list_sort
+EXPORT_SYMBOL vmlinux 0xf0f1246c	kvasprintf
+EXPORT_SYMBOL vmlinux 0xf0f89796	scm_detach_fds
+EXPORT_SYMBOL vmlinux 0xf15d6165	tcp_rcv_state_process
+EXPORT_SYMBOL vmlinux 0xf15dee60	invalidate_bdev
+EXPORT_SYMBOL vmlinux 0xf173f4ec	empty_zero_page
+EXPORT_SYMBOL vmlinux 0xf174ed48	acquire_console_sem
+EXPORT_SYMBOL vmlinux 0xf18c0436	inet6_register_protosw
+EXPORT_SYMBOL vmlinux 0xf194ed35	mii_nway_restart
+EXPORT_SYMBOL vmlinux 0xf195c682	fb_invert_cmaps
+EXPORT_SYMBOL vmlinux 0xf1a1a0c1	filp_close
+EXPORT_SYMBOL vmlinux 0xf1b7c6dd	jbd2_journal_dirty_metadata
+EXPORT_SYMBOL vmlinux 0xf1db1704	nla_memcpy
+EXPORT_SYMBOL vmlinux 0xf1deabf2	div64_u64
+EXPORT_SYMBOL vmlinux 0xf1e98c74	avenrun
+EXPORT_SYMBOL vmlinux 0xf20dabd8	free_irq
+EXPORT_SYMBOL vmlinux 0xf21cc787	tty_driver_kref_put
+EXPORT_SYMBOL vmlinux 0xf2200924	d_alloc_name
+EXPORT_SYMBOL vmlinux 0xf24129b5	ppp_unregister_channel
+EXPORT_SYMBOL vmlinux 0xf272df4e	pci_bus_read_config_word
+EXPORT_SYMBOL vmlinux 0xf27cef3b	sk_dst_check
+EXPORT_SYMBOL vmlinux 0xf2965ff7	blk_queue_max_sectors
+EXPORT_SYMBOL vmlinux 0xf2997713	tty_termios_hw_change
+EXPORT_SYMBOL vmlinux 0xf29c461a	wireless_spy_update
+EXPORT_SYMBOL vmlinux 0xf2b4dced	__nla_put
+EXPORT_SYMBOL vmlinux 0xf313da4e	sha_transform
+EXPORT_SYMBOL vmlinux 0xf326f24e	skb_copy_datagram_from_iovec
+EXPORT_SYMBOL vmlinux 0xf3341268	__clear_user
+EXPORT_SYMBOL vmlinux 0xf338d4c3	netlink_unregister_notifier
+EXPORT_SYMBOL vmlinux 0xf346231f	seq_list_start_head
+EXPORT_SYMBOL vmlinux 0xf376d81b	scsi_cmd_print_sense_hdr
+EXPORT_SYMBOL vmlinux 0xf378c1b4	jbd2_journal_clear_features
+EXPORT_SYMBOL vmlinux 0xf37b2283	i2c_smbus_write_word_data
+EXPORT_SYMBOL vmlinux 0xf385c998	tcp_proc_unregister
+EXPORT_SYMBOL vmlinux 0xf388fe74	alloc_pci_dev
+EXPORT_SYMBOL vmlinux 0xf38abed3	new_inode
+EXPORT_SYMBOL vmlinux 0xf397b9aa	__tasklet_schedule
+EXPORT_SYMBOL vmlinux 0xf39945ff	netif_napi_add
+EXPORT_SYMBOL vmlinux 0xf39bf4d9	put_cmsg
+EXPORT_SYMBOL vmlinux 0xf3bf0bce	__bitmap_complement
+EXPORT_SYMBOL vmlinux 0xf3fac1c0	generic_setlease
+EXPORT_SYMBOL vmlinux 0xf410a412	generic_listxattr
+EXPORT_SYMBOL vmlinux 0xf43b7fba	security_file_permission
+EXPORT_SYMBOL vmlinux 0xf455547b	vfs_writev
+EXPORT_SYMBOL vmlinux 0xf4621a12	mmc_card_sleep
+EXPORT_SYMBOL vmlinux 0xf47fa6c4	ioctl_by_bdev
+EXPORT_SYMBOL vmlinux 0xf4895874	d_find_alias
+EXPORT_SYMBOL vmlinux 0xf492a7c4	dentry_open
+EXPORT_SYMBOL vmlinux 0xf494f618	mmc_regulator_get_ocrmask
+EXPORT_SYMBOL vmlinux 0xf49f5d78	mmc_align_data_size
+EXPORT_SYMBOL vmlinux 0xf4af3c6f	skb_dequeue
+EXPORT_SYMBOL vmlinux 0xf4c87bbb	skb_unlink
+EXPORT_SYMBOL vmlinux 0xf4f14de6	rtnl_trylock
+EXPORT_SYMBOL vmlinux 0xf4f52f93	dqstats
+EXPORT_SYMBOL vmlinux 0xf5043fe3	tty_port_alloc_xmit_buf
+EXPORT_SYMBOL vmlinux 0xf50dc8a2	vfs_rename
+EXPORT_SYMBOL vmlinux 0xf51c639f	interruptible_sleep_on_timeout
+EXPORT_SYMBOL vmlinux 0xf53d4c26	qdisc_class_hash_destroy
+EXPORT_SYMBOL vmlinux 0xf543052d	nf_unregister_sockopt
+EXPORT_SYMBOL vmlinux 0xf55219b5	skb_find_text
+EXPORT_SYMBOL vmlinux 0xf564412a	__aeabi_ulcmp
+EXPORT_SYMBOL vmlinux 0xf56b10f1	find_vma
+EXPORT_SYMBOL vmlinux 0xf574ac18	xfrm_input
+EXPORT_SYMBOL vmlinux 0xf5bc27b1	tty_devnum
+EXPORT_SYMBOL vmlinux 0xf5c05914	generic_segment_checks
+EXPORT_SYMBOL vmlinux 0xf5c9012e	timespec_trunc
+EXPORT_SYMBOL vmlinux 0xf5ccdffd	blk_stack_limits
+EXPORT_SYMBOL vmlinux 0xf5d2d609	phy_stop
+EXPORT_SYMBOL vmlinux 0xf5e06a6a	arp_broken_ops
+EXPORT_SYMBOL vmlinux 0xf5e6899b	dquot_reserve_space
+EXPORT_SYMBOL vmlinux 0xf5eb86ea	blk_verify_command
+EXPORT_SYMBOL vmlinux 0xf60cd93d	register_con_driver
+EXPORT_SYMBOL vmlinux 0xf6156130	dquot_initialize
+EXPORT_SYMBOL vmlinux 0xf67adea1	input_release_device
+EXPORT_SYMBOL vmlinux 0xf686362c	dquot_transfer
+EXPORT_SYMBOL vmlinux 0xf691ec94	pci_bus_alloc_resource
+EXPORT_SYMBOL vmlinux 0xf694f344	nobh_writepage
+EXPORT_SYMBOL vmlinux 0xf69a454d	generic_shutdown_super
+EXPORT_SYMBOL vmlinux 0xf69f9f3f	default_llseek
+EXPORT_SYMBOL vmlinux 0xf6bb4729	color_table
+EXPORT_SYMBOL vmlinux 0xf6ebc03b	net_ratelimit
+EXPORT_SYMBOL vmlinux 0xf7243d79	dev_mc_add
+EXPORT_SYMBOL vmlinux 0xf728221a	unregister_binfmt
+EXPORT_SYMBOL vmlinux 0xf7384f52	downgrade_write
+EXPORT_SYMBOL vmlinux 0xf73da67d	scsi_block_when_processing_errors
+EXPORT_SYMBOL vmlinux 0xf7584a9c	find_font
+EXPORT_SYMBOL vmlinux 0xf75c176c	iov_iter_copy_from_user
+EXPORT_SYMBOL vmlinux 0xf7623914	radix_tree_tag_clear
+EXPORT_SYMBOL vmlinux 0xf77fbb46	idr_remove_all
+EXPORT_SYMBOL vmlinux 0xf7802486	__aeabi_uidivmod
+EXPORT_SYMBOL vmlinux 0xf7821f03	ip_cmsg_recv
+EXPORT_SYMBOL vmlinux 0xf78af3f0	fput
+EXPORT_SYMBOL vmlinux 0xf78d04ab	netlink_register_notifier
+EXPORT_SYMBOL vmlinux 0xf7a6d38c	scsi_setup_fs_cmnd
+EXPORT_SYMBOL vmlinux 0xf811e69d	scsi_eh_flush_done_q
+EXPORT_SYMBOL vmlinux 0xf82abc1d	isa_dma_bridge_buggy
+EXPORT_SYMBOL vmlinux 0xf82c577c	seq_open_private
+EXPORT_SYMBOL vmlinux 0xf86d7138	xfrm_lookup
+EXPORT_SYMBOL vmlinux 0xf87e8703	lock_sock_nested
+EXPORT_SYMBOL vmlinux 0xf890fe7f	pm_idle
+EXPORT_SYMBOL vmlinux 0xf89729a0	inet6_add_protocol
+EXPORT_SYMBOL vmlinux 0xf8a28881	vfs_getattr
+EXPORT_SYMBOL vmlinux 0xf8aeaf01	bio_integrity_enabled
+EXPORT_SYMBOL vmlinux 0xf8ef0819	i2c_release_client
+EXPORT_SYMBOL vmlinux 0xf8fbb4f0	__bad_xchg
+EXPORT_SYMBOL vmlinux 0xf93c0530	vfs_quota_on_mount
+EXPORT_SYMBOL vmlinux 0xf94bd11e	poll_schedule_timeout
+EXPORT_SYMBOL vmlinux 0xf95f2f3e	thermal_zone_bind_cooling_device
+EXPORT_SYMBOL vmlinux 0xf95f75c7	setup_arg_pages
+EXPORT_SYMBOL vmlinux 0xf9632abc	kernel_getsockopt
+EXPORT_SYMBOL vmlinux 0xf97dbb0d	pci_dev_driver
+EXPORT_SYMBOL vmlinux 0xf989f26e	blk_rq_map_kern
+EXPORT_SYMBOL vmlinux 0xf9958d5c	vlan_gro_frags
+EXPORT_SYMBOL vmlinux 0xf99f843d	dquot_drop
+EXPORT_SYMBOL vmlinux 0xf9a482f9	msleep
+EXPORT_SYMBOL vmlinux 0xf9b28bac	interruptible_sleep_on
+EXPORT_SYMBOL vmlinux 0xf9d2ea02	filemap_fdatawait_range
+EXPORT_SYMBOL vmlinux 0xf9f301ef	audit_log_format
+EXPORT_SYMBOL vmlinux 0xfa135705	skb_append
+EXPORT_SYMBOL vmlinux 0xfa251f08	load_nls_default
+EXPORT_SYMBOL vmlinux 0xfa2cc040	phy_register_fixup
+EXPORT_SYMBOL vmlinux 0xfa3131b8	set_page_dirty
+EXPORT_SYMBOL vmlinux 0xfa32c62d	slow_work_register_user
+EXPORT_SYMBOL vmlinux 0xfa331c82	kern_path
+EXPORT_SYMBOL vmlinux 0xfa52351b	inet_twsk_deschedule
+EXPORT_SYMBOL vmlinux 0xfa8405c1	dm_exception_store_type_register
+EXPORT_SYMBOL vmlinux 0xfa920a83	mark_buffer_dirty_inode
+EXPORT_SYMBOL vmlinux 0xfaa4ead2	sk_stop_timer
+EXPORT_SYMBOL vmlinux 0xfabc8468	__locks_copy_lock
+EXPORT_SYMBOL vmlinux 0xfac68eba	arm_elf_read_implies_exec
+EXPORT_SYMBOL vmlinux 0xfad466de	proc_create_data
+EXPORT_SYMBOL vmlinux 0xfada0c96	dev_get_drvdata
+EXPORT_SYMBOL vmlinux 0xfae6270d	blk_queue_max_phys_segments
+EXPORT_SYMBOL vmlinux 0xfaed5386	i2c_verify_client
+EXPORT_SYMBOL vmlinux 0xfaf98462	bitrev32
+EXPORT_SYMBOL vmlinux 0xfb0a5e22	neigh_connected_output
+EXPORT_SYMBOL vmlinux 0xfb0cf2e9	touch_all_softlockup_watchdogs
+EXPORT_SYMBOL vmlinux 0xfb115930	elv_queue_empty
+EXPORT_SYMBOL vmlinux 0xfb296ae1	I_BDEV
+EXPORT_SYMBOL vmlinux 0xfb326a5d	down
+EXPORT_SYMBOL vmlinux 0xfb336e55	dma_release_from_coherent
+EXPORT_SYMBOL vmlinux 0xfb352068	tcf_action_dump_1
+EXPORT_SYMBOL vmlinux 0xfb58121b	__init_waitqueue_head
+EXPORT_SYMBOL vmlinux 0xfb606392	sockfd_lookup
+EXPORT_SYMBOL vmlinux 0xfb6af58d	recalc_sigpending
+EXPORT_SYMBOL vmlinux 0xfb7d9c45	__udivsi3
+EXPORT_SYMBOL vmlinux 0xfb88a1bd	tcp_md5_hash_key
+EXPORT_SYMBOL vmlinux 0xfb9a60f6	udp_lib_getsockopt
+EXPORT_SYMBOL vmlinux 0xfbc3f862	xfrm_state_add
+EXPORT_SYMBOL vmlinux 0xfbc4c8f9	proc_net_netfilter
+EXPORT_SYMBOL vmlinux 0xfbd118f0	lookup_one_len
+EXPORT_SYMBOL vmlinux 0xfbdf07c0	kmem_cache_destroy
+EXPORT_SYMBOL vmlinux 0xfbe27a1c	rb_first
+EXPORT_SYMBOL vmlinux 0xfbf5262b	hippi_change_mtu
+EXPORT_SYMBOL vmlinux 0xfc01902d	sock_register
+EXPORT_SYMBOL vmlinux 0xfc02b7ad	sysctl_tcp_wmem
+EXPORT_SYMBOL vmlinux 0xfc102970	dm_dirty_log_type_register
+EXPORT_SYMBOL vmlinux 0xfc39e32f	ioport_unmap
+EXPORT_SYMBOL vmlinux 0xfc533f85	schedule_work_on
+EXPORT_SYMBOL vmlinux 0xfc556427	bio_pair_release
+EXPORT_SYMBOL vmlinux 0xfc61f2ee	km_state_notify
+EXPORT_SYMBOL vmlinux 0xfcaa04a0	out_of_line_wait_on_bit_lock
+EXPORT_SYMBOL vmlinux 0xfcb4fae4	read_dev_sector
+EXPORT_SYMBOL vmlinux 0xfcb5dc94	splice_from_pipe_feed
+EXPORT_SYMBOL vmlinux 0xfcc29a16	ipv6_getsockopt
+EXPORT_SYMBOL vmlinux 0xfcc2a43c	utf32_to_utf8
+EXPORT_SYMBOL vmlinux 0xfcda63a3	node_states
+EXPORT_SYMBOL vmlinux 0xfcec0987	enable_irq
+EXPORT_SYMBOL vmlinux 0xfcfa03ff	fb_videomode_to_modelist
+EXPORT_SYMBOL vmlinux 0xfd0b7f04	page_address
+EXPORT_SYMBOL vmlinux 0xfd19c45d	inode_newsize_ok
+EXPORT_SYMBOL vmlinux 0xfd2e9047	vlan_ioctl_set
+EXPORT_SYMBOL vmlinux 0xfd305341	walk_stackframe
+EXPORT_SYMBOL vmlinux 0xfd33ae6c	scsicam_bios_param
+EXPORT_SYMBOL vmlinux 0xfd35d588	jbd2_journal_check_used_features
+EXPORT_SYMBOL vmlinux 0xfd4f4d08	inode_needs_sync
+EXPORT_SYMBOL vmlinux 0xfd8dba4c	add_wait_queue
+EXPORT_SYMBOL vmlinux 0xfd91ab38	blk_get_backing_dev_info
+EXPORT_SYMBOL vmlinux 0xfda85a7d	request_threaded_irq
+EXPORT_SYMBOL vmlinux 0xfdb3e65a	kblockd_schedule_work
+EXPORT_SYMBOL vmlinux 0xfdfc0b3b	fiemap_fill_next_extent
+EXPORT_SYMBOL vmlinux 0xfe0c7e87	ll_rw_block
+EXPORT_SYMBOL vmlinux 0xfe16775f	idr_destroy
+EXPORT_SYMBOL vmlinux 0xfe25d909	pci_scan_slot
+EXPORT_SYMBOL vmlinux 0xfe2c5a7d	___pskb_trim
+EXPORT_SYMBOL vmlinux 0xfe2d0d59	llc_set_station_handler
+EXPORT_SYMBOL vmlinux 0xfe37b4f3	tcf_exts_dump
+EXPORT_SYMBOL vmlinux 0xfe4dbede	tcf_em_unregister
+EXPORT_SYMBOL vmlinux 0xfe5d4bb2	sys_tz
+EXPORT_SYMBOL vmlinux 0xfe769456	unregister_netdevice_notifier
+EXPORT_SYMBOL vmlinux 0xfe83bc90	input_register_handle
+EXPORT_SYMBOL vmlinux 0xfe90865d	kobject_add
+EXPORT_SYMBOL vmlinux 0xfea497d9	skb_kill_datagram
+EXPORT_SYMBOL vmlinux 0xfec3c2f2	bcd2bin
+EXPORT_SYMBOL vmlinux 0xfedd35fc	console_suspend_enabled
+EXPORT_SYMBOL vmlinux 0xfee77804	eth_header_cache_update
+EXPORT_SYMBOL vmlinux 0xfef96e23	__scsi_print_command
+EXPORT_SYMBOL vmlinux 0xff0af52c	proto_unregister
+EXPORT_SYMBOL vmlinux 0xff1768a5	pcim_pin_device
+EXPORT_SYMBOL vmlinux 0xff1e9dd8	seq_list_start
+EXPORT_SYMBOL vmlinux 0xff46256c	netdev_features_change
+EXPORT_SYMBOL vmlinux 0xff59f046	pci_bus_add_devices
+EXPORT_SYMBOL vmlinux 0xff67b37f	__lshrdi3
+EXPORT_SYMBOL vmlinux 0xff6878cf	fb_default_cmap
+EXPORT_SYMBOL vmlinux 0xff7b8641	km_report
+EXPORT_SYMBOL vmlinux 0xff964b25	param_set_int
+EXPORT_SYMBOL vmlinux 0xff9ca065	fb_edid_to_monspecs
+EXPORT_SYMBOL vmlinux 0xffa7d8ba	netlink_rcv_skb
+EXPORT_SYMBOL vmlinux 0xffb57cfa	thermal_zone_device_register
+EXPORT_SYMBOL vmlinux 0xffd5a395	default_wake_function
+EXPORT_SYMBOL vmlinux 0xffe14324	mmc_remove_host
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x0cc1e40f	crypto_it_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x2241df41	crypto_aes_set_key
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x24aac4d9	crypto_aes_expand_key
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x3dc916b6	crypto_fl_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x40d46b21	crypto_ft_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x71dc9998	crypto_il_tab
+EXPORT_SYMBOL_GPL crypto/async_tx/async_memcpy 0x6fbb17af	async_memcpy
+EXPORT_SYMBOL_GPL crypto/async_tx/async_pq 0x268e126e	async_syndrome_val
+EXPORT_SYMBOL_GPL crypto/async_tx/async_pq 0x3533a45f	async_gen_syndrome
+EXPORT_SYMBOL_GPL crypto/async_tx/async_raid6_recov 0xe68b3665	async_raid6_2data_recov
+EXPORT_SYMBOL_GPL crypto/async_tx/async_raid6_recov 0xfddd333a	async_raid6_datap_recov
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x31bb293c	async_trigger_callback
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0xbe09062e	async_tx_quiesce
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0xf7f95dd7	async_tx_submit
+EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0x40b19cd2	async_xor
+EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0x464dcd2a	async_xor_val
+EXPORT_SYMBOL_GPL crypto/cryptd 0x45cd45ea	cryptd_alloc_ablkcipher
+EXPORT_SYMBOL_GPL crypto/cryptd 0x6f6775d1	cryptd_ablkcipher_child
+EXPORT_SYMBOL_GPL crypto/cryptd 0xab0ad485	cryptd_shash_desc
+EXPORT_SYMBOL_GPL crypto/cryptd 0xc338a251	cryptd_free_ahash
+EXPORT_SYMBOL_GPL crypto/cryptd 0xc93c4990	cryptd_ahash_child
+EXPORT_SYMBOL_GPL crypto/cryptd 0xf2c1e8e8	cryptd_free_ablkcipher
+EXPORT_SYMBOL_GPL crypto/cryptd 0xf72084c1	cryptd_alloc_ahash
+EXPORT_SYMBOL_GPL crypto/des_generic 0xcfd9a2c0	des_ekey
+EXPORT_SYMBOL_GPL crypto/twofish_common 0xd2d9c8c4	twofish_setkey
+EXPORT_SYMBOL_GPL drivers/gpu/drm/drm 0x04a3d2c7	drm_class_device_unregister
+EXPORT_SYMBOL_GPL drivers/gpu/drm/drm 0x2fece9fb	drm_class_device_register
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x05495392	hid_debug
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x1f2bf5db	hid_output_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x22988e86	hid_check_keys_pressed
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x2e365915	__hid_register_driver
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x2ffc8fc8	hidinput_report_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x36e2d20d	hid_parse_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x373aa3dc	hid_dump_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x380a202d	hid_report_raw_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x4d7148dc	hid_set_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x52c17db8	hidinput_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x58b51d49	hidraw_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x6da6d5a0	hidraw_report_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x79e8af42	hid_debug_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xa0bf3242	hid_allocate_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xa46a164f	hid_destroy_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xb444af07	hid_dump_input
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xbc2f73ab	hid_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xd4502d50	hidinput_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xd6aab10a	hid_unregister_driver
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xdc11aea9	hidraw_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xddf27dd1	hidinput_find_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xe02166f7	hid_add_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xe6c12872	hid_resolv_usage
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xe8475030	hid_input_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xf590f7ba	hid_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xfe167984	hid_dump_field
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x01fd453e	usbhid_lookup_quirk
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x3ec9965a	usbhid_set_leds
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0xb488d8c0	hiddev_hid_event
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0xef89506c	usbhid_submit_report
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0x3528a4d2	hpsb_config_rom_ip1394_remove
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0x7666e301	hpsb_config_rom_ip1394_add
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0xec8d18cf	hpsb_disable_irm
+EXPORT_SYMBOL_GPL drivers/input/ff-memless 0xe8f7bcb8	input_ff_create_memless
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0x1c351dbc	led_classdev_register
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0x423427c6	led_classdev_suspend
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0x5d9d6736	led_classdev_resume
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0x9734cff4	led_classdev_unregister
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0x05513b71	raid6_call
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0x0b8ef590	raid6_2data_recov
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0x4a48d81c	raid6_datap_recov
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x0349c9bd	ir_codes_proteus_2309_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x0366dcdf	ir_codes_videomate_s350_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x110b053a	ir_codes_pixelview_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x124cb753	ir_codes_encore_enltv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x183fdfdd	ir_codes_gotview7135_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x19b4d61c	ir_codes_nebula_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x19cd2826	ir_codes_behold_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x1a9009d6	ir_codes_dm1105_nec_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x1cb148f5	ir_extract_bits
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2456e513	ir_decode_pulsedistance
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2cc459b5	ir_codes_flydvb_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2d0e9a49	ir_codes_em_terratec_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3136d8ff	ir_codes_dntv_live_dvbt_pro_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x32b9033b	ir_codes_apac_viewcomp_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3909f4ad	ir_codes_terratec_cinergy_xs_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3a84be27	ir_codes_avermedia_a16d_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x4267d749	ir_codes_budget_ci_old_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x43c89ef4	ir_decode_biphase
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x4c1442c1	ir_codes_real_audio_220_32_keys_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x51ba1643	ir_codes_kworld_plus_tv_analog_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x543db4ff	ir_codes_avermedia_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x5e95da31	ir_codes_tt_1500_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x5fbe6515	ir_codes_pinnacle_color_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x61d039d7	ir_codes_behold_columbus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6427a3fb	ir_codes_pinnacle_grey_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x64b02fed	ir_codes_avermedia_dvbt_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6606596a	ir_rc5_timer_keyup
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6809de82	ir_codes_pctv_sedna_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6d6511e7	ir_dump_samples
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x703fc738	ir_codes_avertv_303_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x7283f81d	ir_codes_purpletv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x72c2992e	ir_codes_powercolor_real_angel_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x76d71b8e	ir_codes_dntv_live_dvb_t_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x784e176d	ir_codes_asus_pc39_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x828b3ce5	ir_codes_encore_enltv_fm53_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x8acae3dd	ir_codes_pinnacle_pctv_hd_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x92d1d181	ir_codes_flyvideo_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x94651dab	ir_codes_ati_tv_wonder_hd_600_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x97c35dab	ir_codes_msi_tvanywhere_plus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x9944e2e5	ir_codes_hauppauge_new_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x9d39179e	ir_input_keydown
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xa69aa6ad	ir_codes_pv951_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xa95157c5	ir_codes_cinergy_1400_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xac15f6c8	ir_codes_kaiomy_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xaff22e87	ir_codes_pixelview_new_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb01a1998	ir_codes_manli_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb0a8ef38	ir_codes_rc5_tv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb361dbd2	ir_input_nokey
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb57445f7	ir_codes_eztv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb5adb754	ir_codes_cinergy_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xbd3ce6f0	ir_codes_avermedia_cardbus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xbeaccbdc	ir_codes_gadmei_rm008z_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xcba36c62	ir_codes_videomate_tv_pvr_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xd30c491f	ir_codes_norwood_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xdc23fec4	ir_codes_fusionhdtv_mce_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xdd4c0a07	ir_codes_evga_indtube_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xe1101f4d	ir_codes_avermedia_m135a_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xe4140c60	ir_codes_genius_tvgo_a11mce_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xeb82b24f	ir_input_init
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xeb9bb08f	ir_codes_npgtech_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xebf345b4	ir_codes_encore_enltv2_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xeec89db8	ir_codes_empty_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xef29c40d	ir_codes_adstech_dvb_t_pci_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf33c155d	ir_codes_msi_tvanywhere_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf3d619ec	ir_codes_iodata_bctv7e_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf4f7a4d6	ir_rc5_timer_end
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf5e15e65	ir_codes_winfast_table
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x0fabb3e6	saa7146_i2c_adapter_prepare
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x15f8b32e	saa7146_pgtable_build_single
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x20312007	saa7146_unregister_extension
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x5f9b45b5	saa7146_wait_for_debi_done
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x6c6ef107	saa7146_vfree_destroy_pgtable
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x7ef68416	saa7146_devices_lock
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x81509b2f	saa7146_vmalloc_build_pgtable
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x87fa918b	saa7146_pgtable_alloc
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x912cd740	saa7146_pgtable_free
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xbffa3d83	saa7146_register_extension
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xcf683cf2	saa7146_devices
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xe3cd9b5c	saa7146_debug
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xe6273964	saa7146_setgpio
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/mt20xx 0x7cd88c94	microtune_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/mxl5007t 0x6353473c	mxl5007t_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda18271 0xeabc2f31	tda18271_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda827x 0xdf20c04e	tda827x_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda8290 0x3f9f91c7	tda829x_probe
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda8290 0x87e1054b	tda829x_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda9887 0xb3042408	tda9887_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5761 0x91d8e566	tea5761_autodetection
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5761 0xdbbaeafc	tea5761_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5767 0x01ade73c	tea5767_autodetection
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5767 0xe1f21456	tea5767_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tuner-simple 0xcd64095e	simple_tuner_attach
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x0a7a515e	smscore_onresponse
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x108a8a05	smscore_getbuffer
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x21e36bf2	smscore_registry_getmode
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x3001b9c2	smscore_start_device
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x37d91069	smsendian_handle_tx_message
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x38a32c2e	sms_board_power
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x45284ae9	smsendian_handle_rx_message
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x58199243	smscore_get_board_id
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x5a84f245	smscore_unregister_device
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x628a4a84	smscore_register_client
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x6abd80c6	smscore_register_hotplug
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x6ea0cef9	smscore_register_device
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x74ee9098	sms_board_load_modules
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x7c576277	smsendian_handle_message_header
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x8e2edaad	smsclient_sendrequest
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x9350dbb2	sms_board_event
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xa68903bf	smscore_putbuffer
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xa8bffcac	smscore_set_board_id
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xa9a145bc	sms_board_setup
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xd0f0c8d0	sms_board_lna_control
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xd72090db	smscore_unregister_hotplug
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xd895c1fc	smscore_get_device_mode
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xe55b2f41	smscore_unregister_client
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xf0af32c9	sms_board_led_feedback
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xfda878c5	sms_get_board
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x4f7f1296	ttpci_budget_init_hooks
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x59a912ac	ttpci_budget_set_video_port
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x7948c222	budget_debug
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x89a59214	ttpci_budget_irq10_handler
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0x927fa1a5	ttpci_budget_init
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0xd7fb7c37	ttpci_budget_deinit
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0xfb134433	ttpci_budget_debiread
+EXPORT_SYMBOL_GPL drivers/media/dvb/ttpci/budget-core 0xfc89528d	ttpci_budget_debiwrite
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x083cb622	i2o_dma_realloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x0a9d36bd	i2o_dma_free
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x1987a31b	i2o_sg_tablesize
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x311c8768	i2o_pool_free
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x48119e5b	i2o_dma_alloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x9d02bf07	i2o_dma_map_single
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xa0c8f9b7	i2o_dma_map_sg
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xfd629517	i2o_pool_alloc
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-adc 0x5d3dda5b	pcf50633_adc_sync_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-adc 0x7c16cf62	pcf50633_adc_async_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x3267c623	pcf50633_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x4283881c	pcf50633_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x5263ac73	pcf50633_read_block
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x748bf6b1	pcf50633_irq_mask_get
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x76fc5ec6	pcf50633_reg_clear_bits
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x88cd4e86	pcf50633_write_block
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x8bcd8759	pcf50633_irq_mask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x9a619908	pcf50633_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xd82a5978	pcf50633_irq_unmask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xe78e503a	pcf50633_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xf587b81c	pcf50633_reg_set_bit_mask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x060910fc	pcf50633_gpio_power_supply_set
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x30ae97bb	pcf50633_gpio_invert_set
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x4cf4d1fa	pcf50633_gpio_set
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0xa9ec5071	pcf50633_gpio_get
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0xbfefad2d	pcf50633_gpio_invert_get
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x25a96500	sm501_find_clock
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x3f40501d	sm501_misc_control
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x4b799d9b	sm501_set_clock
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x77434774	sm501_modify_reg
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0xf68f3ef9	sm501_unit_power
+EXPORT_SYMBOL_GPL drivers/mfd/ucb1400_core 0xb4e4ae47	ucb1400_adc_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x0366bf0b	wm831x_reg_lock
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x17853b21	wm831x_enable_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x578b5d90	wm831x_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x5e92aff6	wm831x_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x5ef9863b	wm831x_auxadc_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x7dab26b6	wm831x_isinkv_values
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x9366e29d	wm831x_reg_unlock
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x9aa73a2e	wm831x_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x9b151f6e	wm831x_bulk_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xadeb13e5	wm831x_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xc98c8716	wm831x_disable_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xef180b7d	wm831x_auxadc_read_uv
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xef6a840f	wm831x_request_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x0aed7057	wm8350_reg_lock
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x0dd99293	wm8350_mask_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x13f289e2	wm8350_unmask_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x27ab1371	wm8350_device_init
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x30858675	wm8350_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x3cb4b271	wm8350_clear_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x467c7cd3	wm8350_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x4ea82ee9	wm8350_reg_unlock
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x6b879004	wm8350_read_auxadc
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x70a1062f	wm8350_device_exit
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x7b5315ef	wm8350_block_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x7e58ebff	wm8350_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x845a3388	wm8350_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x97de3939	wm8350_block_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xd406cf0b	wm8350_gpio_config
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xed3f9c88	wm8350_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x0ef9cc61	wm8400_block_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x236d7f90	wm8400_reset_codec_reg_cache
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x7eb46a6c	wm8400_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0xfc891a40	wm8400_reg_read
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x256bb964	cb710_sg_dwiter_write_next_block
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x50f96107	cb710_pci_update_config_reg
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x9bb5ee0f	cb710_set_irq_handler
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0xe255369d	cb710_sg_dwiter_read_next_block
+EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x2df115d4	eeprom_93cx6_multiread
+EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x63d14d2f	eeprom_93cx6_read
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x04e295c2	enclosure_register
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x0862abf8	enclosure_component_register
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x2ee3f196	enclosure_unregister
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x8492f663	enclosure_remove_device
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0x97c13aef	enclosure_add_device
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0xacd4a897	enclosure_find
+EXPORT_SYMBOL_GPL drivers/misc/enclosure 0xf647b5b1	enclosure_for_each_device
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x2ec02a9b	sdhci_alloc_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x328d187b	sdhci_remove_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x7b13071c	sdhci_free_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x8178ee20	sdhci_resume_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xa6078e59	sdhci_suspend_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xd8f4e1ae	sdhci_add_host
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x0487e49c	ubi_open_volume
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x057ee459	ubi_leb_write
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x20a3193e	ubi_leb_map
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x35f9505e	ubi_leb_read
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x3e8982e5	ubi_open_volume_nm
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x42801d20	ubi_sync
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x6f09ba8a	ubi_register_volume_notifier
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x75630132	ubi_do_get_device_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x7d18773c	ubi_leb_change
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x90d409ee	ubi_leb_unmap
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x913b9a2b	ubi_is_mapped
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x99090c22	ubi_get_volume_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xac4b2974	ubi_leb_erase
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xbc505df4	ubi_get_device_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xdca430a8	ubi_close_volume
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xfd6f0ef9	ubi_unregister_volume_notifier
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x2f7659ec	alloc_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x34572bec	can_free_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x4d4a34e8	open_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x4f6e4ce4	free_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x60bfe08d	register_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x65200b6a	can_get_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x7684664b	close_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x7d84b44d	unregister_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x88f37451	can_put_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xd93f65cf	can_bus_off
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x0676dccb	register_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x40a5224c	free_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x7d99843e	unregister_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xb49b38a0	alloc_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xdc9bd500	sja1000_interrupt
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x00e57a5a	mlx4_alloc_hwq_res
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x08892f26	mlx4_mr_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x0b9584ff	mlx4_srq_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1066e91d	mlx4_qp_reserve_range
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x125403c3	mlx4_register_interface
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1d9bddb9	mlx4_fmr_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x29041f36	mlx4_fmr_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x2bb05f4e	mlx4_cq_modify
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x349960f7	mlx4_pd_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x3766ad75	mlx4_mtt_addr
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x39dd34c1	mlx4_buf_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x3ad05097	mlx4_qp_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x3c2317e5	mlx4_qp_remove
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x44eaa87c	mlx4_CLOSE_PORT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x46d09fa7	mlx4_map_phys_fmr
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x56cbb379	mlx4_qp_to_ready
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x597c0e6c	mlx4_qp_modify
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x5b286b98	mlx4_uar_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x6af801c9	mlx4_srq_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x79d16a47	mlx4_pd_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x7a7e4952	mlx4_write_mtt
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x7e80dfad	mlx4_qp_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x8611cb77	mlx4_mr_enable
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x8af46778	mlx4_buf_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x8de2ef86	mlx4_unregister_mac
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x8efa9e34	mlx4_buf_write_mtt
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9406126e	mlx4_srq_query
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x957dab64	mlx4_alloc_cmd_mailbox
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x966edc08	__mlx4_cmd
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9c570f04	mlx4_qp_release_range
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9d062f08	mlx4_qp_query
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9fd21b7c	mlx4_db_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa0a8e251	mlx4_srq_arm
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa3a82d1e	mlx4_mtt_init
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa8e70fad	mlx4_mtt_cleanup
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xca0a9075	mlx4_fmr_enable
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd1b271ac	mlx4_register_mac
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd253caa5	mlx4_multicast_attach
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd4c141ec	mlx4_cq_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd4e4c5f5	mlx4_register_vlan
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd606dafb	mlx4_fmr_unmap
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xda7a7f2c	mlx4_cq_resize
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xdec39ac6	mlx4_free_hwq_res
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe4bbf8b1	mlx4_free_cmd_mailbox
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xe802b0d7	mlx4_SYNC_TPT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xebb11911	mlx4_unregister_vlan
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf639ddaa	mlx4_uar_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf64f7a4d	mlx4_multicast_detach
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf64f81c3	mlx4_INIT_PORT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xf9d1f679	mlx4_mr_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xfa0b16c5	mlx4_unregister_interface
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xfaa7a577	mlx4_cq_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xff022dfc	mlx4_db_free
+EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0x86dc2cf3	usbnet_cdc_unbind
+EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0xb4465bfa	usbnet_generic_cdc_bind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x0fadf0c0	rndis_rx_fixup
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x221180a0	rndis_unbind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x8678ff08	rndis_status
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xbf4cc491	rndis_command
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xf75993a1	generic_rndis_bind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xfaabb530	rndis_tx_fixup
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x0c22a68a	usbnet_get_drvinfo
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x0efe0714	usbnet_tx_timeout
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x11a42683	usbnet_resume_rx
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x125d91e0	usbnet_get_settings
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x139a182d	usbnet_pause_rx
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x25b458c4	usbnet_set_settings
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x2d9fc3ee	usbnet_purge_paused_rxq
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x32a9a080	usbnet_change_mtu
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x32cba51f	usbnet_stop
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x7c9e344b	usbnet_get_endpoints
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x927ef1f3	usbnet_open
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xa31a787d	usbnet_nway_reset
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xac438dfc	usbnet_start_xmit
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xb15519fd	usbnet_suspend
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xb376cc4b	usbnet_skb_return
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xc21c1a9a	usbnet_disconnect
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xccbc5739	usbnet_get_link
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xd5f4f8b2	usbnet_probe
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xe0e6cc18	usbnet_get_msglevel
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xe14cea72	usbnet_set_msglevel
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xe62c5143	usbnet_get_ethernet_addr
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xf8414d69	usbnet_defer_kevent
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xf92c0415	usbnet_resume
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xfea08e3e	usbnet_unlink_rx_urbs
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x0db4341b	i2400m_tx_msg_sent
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x4380bad2	i2400m_rx
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x4f39bba7	i2400m_setup
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x590d3d19	i2400m_tx
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x68603d27	i2400m_cmd_enter_powersave
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x6b7daaf0	i2400m_set_init_config
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x7cfb981a	i2400m_dev_bootstrap
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x88389c43	i2400m_tx_msg_get
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xb00b793c	i2400m_bm_cmd_prepare
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xb6efcbbd	i2400m_dev_reset_handle
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xc188d620	i2400m_cmd_get_state
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xe02a448c	i2400m_queue_work
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xec7340fa	i2400m_netdev_setup
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xf5cacc99	i2400m_release
+EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0x1c820b19	libipw_debug_level
+EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0x7b02a077	libipw_rx_any
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x1009b349	__lbs_cmd
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x141c3471	lbs_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x19f5cc53	lbs_remove_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x1ac2d27d	lbs_cmd_802_11_rate_adapt_rateset
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x398f596f	lbs_process_rxed_packet
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x48891f8e	lbs_stop_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x5f9b9532	lbs_queue_event
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x6fee82f8	lbs_host_sleep_cfg
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x94e35fb0	lbs_host_to_card_done
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xa66232c8	lbs_send_tx_feedback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xb6f2d8f0	lbs_cmd_copyback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xb8348f60	lbs_start_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xbbf774d6	lbs_add_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xe8b1c3fd	lbs_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf46f2c3f	lbs_notify_command_response
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf64277de	lbs_debug
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x0475e49f	lbtf_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x39caf56d	lbtf_cmd_response_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x5a87c723	__lbtf_cmd
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x968d1c55	lbtf_cmd_copyback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xc804b722	lbtf_bcn_sent
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xd923b266	lbtf_add_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xf2e2e155	lbtf_remove_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xf6522049	lbtf_send_tx_feedback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0x378d718a	if_usb_reset_device
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0xb28f4c29	if_usb_prog_firmware
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x0ccc25fb	p54_unregister_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x0cd8069e	p54_free_skb
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x1bf4856c	p54_register_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x23ae205c	p54_free_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x62508d04	p54_parse_firmware
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x79a56932	p54_init_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x7a928897	p54_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xae301bfa	p54_read_eeprom
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xbc3d4249	p54_parse_eeprom
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x02200def	rt2x00mac_stop
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x02d99fa8	rt2x00mac_start
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x1de082c7	rt2x00lib_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x210b7cf8	rt2x00mac_remove_interface
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x27058ab3	rt2x00mac_rfkill_poll
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x2b35e1c1	rt2x00mac_tx
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x34fa3802	rt2x00mac_get_stats
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x35a00d88	rt2x00mac_set_key
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x5b0e0c8f	rt2x00mac_set_tim
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x6be591e6	rt2x00mac_get_tx_stats
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x967c7680	rt2x00mac_bss_info_changed
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x97322374	rt2x00mac_configure_filter
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x97f3804e	rt2x00mac_conf_tx
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xb8855242	rt2x00lib_remove_dev
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xbc4419e4	rt2x00mac_config
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xc3be9141	rt2x00lib_rxdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xc8b242b2	rt2x00mac_add_interface
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xcdd5e8e7	rt2x00lib_beacondone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xd040638a	rt2x00lib_probe_dev
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xda174f59	rt2x00queue_map_txskb
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xdb9fba88	rt2x00queue_get_entry
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xea89ee64	rt2x00queue_get_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xf0eeb770	rt2x00lib_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xf98a6224	rt2x00lib_txdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x00cda391	rt2x00pci_regbusy_read
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x0b97015f	rt2x00pci_write_tx_data
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x2f448175	rt2x00pci_rxdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x3e43ac40	rt2x00pci_probe
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x58bfbc58	rt2x00pci_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x71bba487	rt2x00pci_uninitialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xa62a5d33	rt2x00pci_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xbb73109d	rt2x00pci_initialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xdc20b110	rt2x00pci_remove
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x210117a6	rt2x00usb_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x2c07db9e	rt2x00usb_vendor_request_large_buff
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x300edcbd	rt2x00usb_write_tx_data
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x34f8880a	rt2x00usb_kick_tx_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x418ecec8	rt2x00usb_kill_tx_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x4d556ad2	rt2x00usb_disconnect
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x4fc1076f	rt2x00usb_initialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x60a66e48	rt2x00usb_vendor_req_buff_lock
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x64e89fb7	rt2x00usb_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x6e231553	rt2x00usb_disable_radio
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x7179dd63	rt2x00usb_clear_entry
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x89a2bee7	rt2x00usb_probe
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x95f5e9b3	rt2x00usb_uninitialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xd318322a	rt2x00usb_vendor_request
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xe18cd6e5	rt2x00usb_regbusy_read
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xf05a30f8	rt2x00usb_vendor_request_buff
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0x66e075a0	wl1251_alloc_hw
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0x73b732b5	wl1251_init_ieee80211
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0xcf6fb6a5	wl1251_free_hw
+EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0x0c67f5dc	pcf50633_mbc_get_status
+EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0xbadf5715	pcf50633_mbc_usb_curlim_set
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x3ae07288	wm8350_register_regulator
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x43f0f4f1	wm8350_dcdc25_set_mode
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x64b61d11	wm8350_ldo_set_slot
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x91bc64b3	wm8350_dcdc_set_slot
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xa30309fb	wm8350_register_led
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xac36fa4d	wm8350_isink_set_flash
+EXPORT_SYMBOL_GPL drivers/regulator/wm8400-regulator 0xbed3bf1d	wm8400_register_regulator
+EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x374c1e1c	fcoe_wwn_from_mac
+EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x93be33e8	fcoe_libfc_config
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x00206cd4	iscsi_host_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x042c5ad1	__iscsi_get_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0569fe1c	iscsi_set_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x06659959	iscsi_session_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0949f921	iscsi_host_remove
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x09bff150	iscsi_prep_data_out_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x106b6fe8	iscsi_verify_itt
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x1f3f9916	iscsi_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x24ea2898	iscsi_conn_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x26a32a99	iscsi_change_queue_depth
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x36e0c211	iscsi_conn_stop
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x3f60c8d3	iscsi_eh_target_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x409dde22	iscsi_complete_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x454e9453	iscsi_host_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4d1d6954	iscsi_conn_failure
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x4f655b78	iscsi_suspend_queue
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x51d4f859	iscsi_queuecommand
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x58b75d1f	iscsi_session_recovery_timedout
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x6648bb5f	iscsi_suspend_tx
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x6c4e149f	iscsi_eh_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x7500667f	iscsi_put_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x7d9c9441	iscsi_eh_device_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x805bd2db	iscsi_session_failure
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x84913f87	iscsi_host_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x8b7d377b	iscsi_conn_start
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x8bd58b23	iscsi_conn_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x902e8753	iscsi_conn_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x90d1e58b	iscsi_requeue_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x93086cea	iscsi_pool_init
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x9ecd87b3	iscsi_host_set_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb3451014	iscsi_session_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xbea76ac0	iscsi_pool_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xc2b823a6	__iscsi_complete_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xca0eeff9	iscsi_conn_send_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xcf9ac07f	iscsi_itt_to_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xd9875748	iscsi_host_add
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xda66800b	iscsi_update_cmdsn
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe9631e07	iscsi_session_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xebc3e42a	iscsi_complete_scsi_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xec0b73a8	iscsi_itt_to_ctask
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xef76ed09	iscsi_conn_queue_work
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xfda30614	iscsi_conn_bind
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x16987291	iscsi_tcp_r2tpool_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x1fa3fd97	iscsi_tcp_cleanup_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x3f4fcd6c	iscsi_tcp_dgst_header
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x5494d560	iscsi_tcp_conn_get_stats
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x6528f4ad	iscsi_tcp_r2tpool_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x67acba98	iscsi_tcp_conn_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x7b2b68ac	iscsi_tcp_recv_segment_is_hdr
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x825824d1	iscsi_tcp_hdr_recv_prep
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x827853f9	iscsi_tcp_segment_unmap
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x89781702	iscsi_segment_init_linear
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x8a45825d	iscsi_tcp_recv_skb
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x921b32bc	iscsi_tcp_conn_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xa0ba43ac	iscsi_tcp_task_init
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xf3d40c03	iscsi_tcp_segment_done
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xf8194f8e	iscsi_segment_seek_sg
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xfe448ed6	iscsi_tcp_task_xmit
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x17f7ba93	sas_request_addr
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x1981968d	sas_task_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x22f6d44a	sas_domain_attach_transport
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x27e6d9ca	sas_eh_device_reset_handler
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x2fa64f60	sas_eh_bus_reset_handler
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x370480c5	sas_slave_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x3c0ec7e3	sas_bios_param
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x4a2e0a6c	sas_slave_configure
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x4c3cb1ff	__sas_task_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x517c50b6	sas_find_local_phy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x641e3248	sas_slave_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x6a514a3f	sas_register_ha
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x7d463c58	sas_target_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x8705944e	sas_phy_enable
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x8e14dbc6	sas_change_queue_depth
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x938a6346	sas_queuecommand
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x955b6bcd	sas_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xa5acbc43	sas_domain_release_transport
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xb5d19776	sas_unregister_ha
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xc986a38d	sas_phy_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xdca5f81e	sas_change_queue_type
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xe74627f3	sas_ioctl
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xf371da4e	sas_ssp_task_response
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x098d3a52	srp_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x187065cb	srp_iu_get
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x48fa0343	srp_cmd_queue
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x617c0806	srp_iu_put
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xc4b7d4dc	srp_target_free
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0xe7aaf206	srp_transfer_data
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x0f07589b	scsi_tgt_free_queue
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x381ecb80	scsi_tgt_alloc_queue
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x3f45ae1c	scsi_host_put_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x99b12e6a	scsi_tgt_it_nexus_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xc4049f22	scsi_tgt_it_nexus_create
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xd46566db	scsi_tgt_queue_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xe0df28b7	scsi_tgt_tsk_mgmt_request
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xeaaafed3	scsi_host_get_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xef0e312b	scsi_tgt_cmd_to_host
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x0d993de2	iscsi_destroy_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x0e901298	iscsi_block_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x13258dee	iscsi_unregister_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x19d69761	iscsi_alloc_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x46133dbb	iscsi_unblock_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x5aedc945	iscsi_create_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x5ed43ff2	iscsi_host_for_each_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x638a395e	iscsi_register_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x6bdd3b41	iscsi_free_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x77c1ef4c	iscsi_session_chkready
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x77cccb22	iscsi_add_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x8b565d5a	iscsi_recv_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x9a1de61c	iscsi_remove_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xa76c936d	iscsi_destroy_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xa9fb3096	iscsi_scan_finished
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xaa992f7e	iscsi_offload_mesg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xbd051d35	iscsi_destroy_conn
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xc5aef058	iscsi_create_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xd6de3f00	iscsi_create_conn
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xdaf5380b	iscsi_lookup_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xf6bac0b2	iscsi_session_event
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xf714ddf0	iscsi_conn_error_event
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x31daf641	srp_rport_add
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x7c8786c5	srp_remove_host
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xb8cc4b27	srp_rport_del
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xc7e3274e	srp_attach_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xe1df514d	srp_release_transport
+EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0x057bb125	pciserial_suspend_ports
+EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0x6dcc6505	pciserial_init_ports
+EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0x93b09b08	pciserial_remove_ports
+EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0xbf1e2fd3	pciserial_resume_ports
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x2468ed34	oslec_hpf_tx
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x579d2806	oslec_snapshot
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x587711de	oslec_create
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0x882d5f27	oslec_adaption_mode
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xf828c15b	oslec_flush
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xf923a5b1	oslec_free
+EXPORT_SYMBOL_GPL drivers/staging/echo/echo 0xfabc3747	oslec_update
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x04a4e04e	usbip_pack_pdu
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x434ac3ee	usbip_xmit
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x5312425d	usbip_event_happened
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x6607fe51	usbip_alloc_iso_desc_pdu
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x675570e6	usbip_task_init
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x6b7fbeb3	usbip_pad_iso
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x6e9017dc	usbip_stop_eh
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x74e5873a	usbip_recv_xbuff
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0x78b72f44	usbip_debug_flag
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xb9ea52eb	usbip_recv_iso
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xc542b84b	usbip_stop_threads
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xc6511d8c	usbip_dump_urb
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xd02753dc	usbip_header_correct_endian
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xe1ea0586	usbip_dump_header
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xe7eda0e0	usbip_event_add
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xe84588d3	sockfd_to_socket
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xe879ed54	dev_attr_usbip_debug
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xf0bc11c1	usbip_start_threads
+EXPORT_SYMBOL_GPL drivers/staging/usbip/usbip_common_mod 0xfde31499	usbip_start_eh
+EXPORT_SYMBOL_GPL drivers/uio/uio 0x8883a932	__uio_register_device
+EXPORT_SYMBOL_GPL drivers/uio/uio 0xb56c4e16	uio_unregister_device
+EXPORT_SYMBOL_GPL drivers/uio/uio 0xeb5a9618	uio_event_notify
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x010276e9	usb_get_intf
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x03411be7	usb_find_interface
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x03509b1f	usb_ep0_reinit
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x06a3d1b8	usb_get_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x0e9e6682	usb_register_device_driver
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x10e823e2	usb_string
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x1752b06f	usb_deregister_dev
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x19a304ba	usb_disabled
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x1c771d92	usb_set_interface
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x1c8b740d	usb_autopm_put_interface_async
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x20596565	usb_wait_anchor_empty_timeout
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x251a82a3	usb_deregister_device_driver
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x2ae3e42c	usb_sg_wait
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x36c7a32e	usb_unlink_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x3be89d3c	usb_register_notify
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x3d969d43	usb_control_msg
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x3f0f6af9	usb_put_hcd
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x41e8d0f3	usb_get_from_anchor
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x44e8c363	usb_hcd_pci_probe
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x45f7e674	usb_poison_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x46c72860	usb_bus_list_lock
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x4afdc480	usb_alloc_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x4c23aab4	usb_register_dev
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x4c53eb60	usb_hcd_check_unlink_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x4fa650fc	usb_get_dev
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x54553993	usb_driver_release_interface
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x56cc10ed	usb_hub_clear_tt_buffer
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x5b7dae12	ehci_cf_port_reset_rwsem
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x5cbec9d9	usb_root_hub_lost_power
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x5e9325d1	usb_driver_set_configuration
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x5ed4d3fd	usb_reset_configuration
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x5f1149a7	usb_mon_register
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x63d46b54	usb_reset_device
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x651d41ea	usb_autopm_get_interface_async
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x68a025f0	usb_register_driver
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x6ab4495c	usb_put_dev
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x6bd78c60	usb_buffer_map_sg
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x6f71af5a	usb_create_hcd
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x7119623d	usb_altnum_to_altsetting
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x78253cf9	usb_debug_root
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x79d2f8a1	usb_anchor_empty
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x7d1a156b	usb_anchor_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x7e64181d	usb_calc_bus_time
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x812b6309	usb_get_status
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x84f09717	usb_deregister
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x8561cbe9	usb_poison_anchored_urbs
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x87326f2a	usb_queue_reset_device
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x886c2ad0	usb_init_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x8d2831ad	usb_unlink_anchored_urbs
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x93d2f41f	usb_get_descriptor
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x9924c496	__usb_get_extra_descriptor
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x99452897	usb_hcd_giveback_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x9950171e	usb_buffer_free
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x9a8a0173	usb_reset_endpoint
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x9bdc0f2e	usb_hcd_resume_root_hub
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0x9d2f0a17	usb_bulk_msg
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xa29a1214	usb_scuttle_anchored_urbs
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xa4c60823	usb_buffer_alloc
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xa5afcb95	usb_interrupt_msg
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xa6eaeb66	usb_hcd_unlink_urb_from_ep
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xa81ce159	usb_autopm_put_interface
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xaba87b2e	usb_match_id
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xabaceef8	usb_ifnum_to_if
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xace5c0fc	usb_bus_list
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xad915028	usb_set_device_state
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xafcefc3b	usb_match_one_id
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xb36b646b	usb_hcd_pci_pm_ops
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xb5f2e170	usb_store_new_id
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xb7ca6a6d	usb_hcd_pci_remove
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xbfe7385b	usb_kill_anchored_urbs
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xc17515d7	usb_hcds_loaded
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xc1f16eaf	usb_remove_hcd
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xc2d24c80	usb_submit_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xc65b5e1e	usb_sg_cancel
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xcc344f44	usb_sg_init
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xcc79a266	usb_put_intf
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xcf3f30e2	usb_unanchor_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xcfcaeab4	usb_unpoison_anchored_urbs
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xd74d4456	usb_autopm_set_interface
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xd84de7e8	usb_autopm_get_interface
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xda4d7d96	usb_hc_died
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xdb4202dd	usb_add_hcd
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xdef94546	usb_get_current_frame_number
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xdfb19238	usb_lock_device_for_reset
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xdfeac457	usb_get_hcd
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xe4a3b13f	usb_free_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xe714a704	usb_hcd_platform_shutdown
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xe9587909	usb_unregister_notify
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xea80a580	usb_clear_halt
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xee3dc084	usb_hcd_link_urb_to_ep
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xee4096d8	usb_kill_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xf1e38f0c	usb_hcd_pci_shutdown
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xf3f6721b	usb_buffer_unmap_sg
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xfa055a94	usb_driver_claim_interface
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xfb676f66	usb_unpoison_urb
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xfdfb8c25	usb_hcd_poll_rh_status
+EXPORT_SYMBOL_GPL drivers/usb/core/usbcore 0xfed11ed1	usb_mon_deregister
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x451a0cd0	usb_ftdi_elan_read_pcimem
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x4864649a	usb_ftdi_elan_write_pcimem
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x4a4c69e7	usb_ftdi_elan_edset_empty
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x719125d0	ftdi_elan_gone_away
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x7c7eb398	usb_ftdi_elan_edset_input
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xb1822a51	usb_ftdi_elan_edset_flush
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xb72e9a9e	usb_ftdi_elan_edset_output
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xe863e7d3	usb_ftdi_elan_edset_setup
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xf89c9fd3	usb_ftdi_elan_edset_single
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x03f56c50	ezusb_set_reset
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x0a65f303	usb_serial_handle_dcd_change
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x1c7668a5	ezusb_writememory
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x1e09dfa4	usb_serial_deregister
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x32856ee7	usb_serial_generic_open
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x4eba2178	usb_serial_generic_resubmit_read_urb
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x514063ca	usb_serial_generic_write_bulk_callback
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x555351ae	usb_serial_generic_resume
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x5599a2e5	usb_serial_register
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x97c156d0	usb_serial_generic_write
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xa1fad340	usb_serial_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xb3236d52	usb_serial_generic_read_bulk_callback
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xc39f6297	usb_serial_handle_sysrq_char
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xe3d85093	usb_serial_port_softint
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xeba89552	usb_serial_probe
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xf7e2a1b9	usb_serial_handle_break
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x0be13004	usb_storage_usb_ids
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1bc3edc2	usb_stor_sense_invalidCDB
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x201626f5	usb_stor_Bulk_transport
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x2776e48f	usb_stor_Bulk_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x2c04941d	usb_stor_bulk_transfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x2c0d22b1	usb_stor_access_xfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x384217d7	usb_stor_pre_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x3a854a4b	usb_usual_ignore_device
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x3c255062	usb_stor_suspend
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x58fb8aa6	usb_stor_clear_halt
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x68938991	usb_stor_probe1
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x7ef8cc60	usb_stor_bulk_transfer_sg
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x8380845b	usb_stor_post_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x8a37b15a	usb_stor_CB_transport
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x906bbe37	usb_stor_CB_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x971e7f03	usb_stor_probe2
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xaf98dca5	usb_stor_reset_resume
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xbb2c8792	usb_stor_transparent_scsi_command
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xbeea182f	usb_stor_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xc4cf3235	usb_stor_set_xfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xd090066a	usb_stor_control_msg
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xd6f5bedd	usb_stor_resume
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xe78fc8fe	usb_stor_ctrl_transfer
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xe7ad2cfe	fill_inquiry_response
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xf06d64c4	usb_stor_bulk_srb
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x09f3c921	wa_urb_enqueue_run
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x3e558e21	__wa_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x7b11bf00	wa_urb_enqueue
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x8668d134	rpipe_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x939ff09c	rpipe_ep_disable
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xdcb2e7e1	wa_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xf2d807b6	wa_urb_dequeue
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x03800919	wusbhc_rh_suspend
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x0bb6bf5e	wusb_cluster_id_get
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x13e519e6	__wusb_dev_get_by_usb_dev
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x1b52ef65	wusbhc_rh_resume
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x28f38bfa	wusbhc_rh_control
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x40e2ab88	wusbhc_mmcie_rm
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x7a8af95d	wusbhc_mmcie_set
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x80a85c6d	wusbhc_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x94c81d11	wusbhc_handle_dn
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x9ea1c6fa	wusbhc_giveback_urb
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xa303f375	wusbhc_b_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb0df6451	wusbhc_rh_status_data
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb725d128	wusb_cluster_id_put
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xc54e28f8	wusbhc_rh_start_port_reset
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xce3ae22f	wusbhc_chid_set
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xd4159e2b	wusbhc_b_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xdf6e4f08	wusb_dev_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xee4b8e3f	wusbhc_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf17a3c5b	wusbhc_reset_all
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf770a6b4	wusbd
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xfe2e17d7	wusb_et_name
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x275ac102	i1480_cmd
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x3a9109f7	i1480_rceb_check
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0x54a654eb	i1480_fw_upload
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x1885a194	uwb_phy_rate_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x268be260	uwb_pca_base_priority_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x943bec09	uwb_ack_policy_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x96f9997a	uwb_rts_cts_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xa768d07f	uwb_rts_cts_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xb3aa3381	uwb_phy_rate_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xd001a229	uwb_pca_base_priority_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xefde0736	uwb_ack_policy_store
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x1ca1f060	umc_bus_type
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x4e86ed0f	umc_device_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x61900d47	umc_controller_reset
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x84b272d5	umc_device_register
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x9c1ed202	umc_match_pci_id
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xb7cf374f	umc_driver_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xc7ae9ba6	umc_device_create
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xc9732964	__umc_driver_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0b11b463	uwb_radio_stop
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0b8aad57	uwb_est_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0e725dd1	uwb_rsv_create
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x11c776b3	uwb_rc_neh_error
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x12500cc5	uwb_rc_add
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x12d8a2c7	uwb_rc_pre_reset
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x1c0be0c9	uwb_pal_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x1f1eadbd	uwb_rc_vcmd
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x2baf9ba5	uwb_notifs_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x35017aa1	uwb_est_find_size
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x356164df	uwb_rc_reset_all
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x409a3601	uwb_pal_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x428da45f	uwb_rc_rm
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x45f2a191	uwb_rsv_get_usable_mas
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x47858022	uwb_rc_neh_grok
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4d57ae3c	uwb_rsv_type_str
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4da60469	uwb_rsv_modify
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5763c71d	uwb_rsv_accept
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x595b12ab	uwb_rsv_establish
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5af6bb70	uwb_dev_for_each
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5e4bc088	__uwb_addr_print
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x631308ec	uwb_rc_post_reset
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x63fbe76f	uwb_rc_cmd_async
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x67db435f	uwb_dev_try_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x7140d3f7	uwb_rc_dev_addr_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x7893db27	uwb_rc_get_by_grandpa
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x7b940b58	uwb_rc_get_by_dev
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x7dcfcd23	uwb_ie_next
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x84559ea6	uwb_rc_mac_addr_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x92d47406	uwb_rc_alloc
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x95c4228d	uwb_rc_init
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x98413234	uwb_rsv_state_str
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xa79aaa6a	uwb_rsv_terminate
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xcb85889c	uwb_rc_ie_add
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd5200c29	uwb_notifs_deregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd769baca	uwb_rc_put
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe1716f06	uwb_est_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe6101ebb	uwb_rsv_destroy
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xe88ded72	__uwb_rc_try_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xeac09471	uwb_radio_start
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xeae4394a	uwb_rc_cmd
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf285b2d4	uwb_rc_ie_rm
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xff74ca0f	uwb_pal_init
+EXPORT_SYMBOL_GPL drivers/uwb/whci 0xfe8f1afb	whci_wait_for
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x075c932e	wlp_reset_all
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x08d1d68b	wlp_uuid_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x0e871d35	wlp_dev_model_name_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x11d66096	wlp_neighborhood_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x14718ea1	wlp_eda_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x356ec564	wlp_dev_prim_OUI_sub_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x3f7ddb5a	wlp_dev_name_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x46fee648	wlp_dev_manufacturer_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x68f1e2ac	wlp_prepare_tx_frame
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x79195f39	wlp_dev_prim_subcat_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x7a263140	wlp_dev_manufacturer_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x7edd4f79	wlp_dev_prim_subcat_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x86353a83	wlp_dev_model_nr_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x8b33f6d7	wlp_wss_remove
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x92726402	wlp_dev_model_nr_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x95c68023	wlp_dev_prim_category_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x9992422a	wlp_dev_model_name_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x99e8276c	wlp_dev_serial_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xa36db215	wlp_dev_prim_category_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xa5e89e27	wlp_receive_frame
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xa8934c37	wlp_dev_prim_OUI_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xaaf6628e	wlp_wss_activate_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xabe0f66c	wlp_remove
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xb8c0f2f8	wlp_dev_serial_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xccbe8d31	wlp_dev_name_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xd1e0f4db	wlp_wss_activate_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xd9855738	wlp_uuid_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xd9ffeaf5	wlp_dev_prim_OUI_sub_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xe5bf5adb	wlp_dev_prim_OUI_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xe82714eb	wlp_wss_setup
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xf3670fa7	wlp_eda_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xfa31a3c9	wlp_setup
+EXPORT_SYMBOL_GPL drivers/video/fb_ddc 0xc18bb0fb	fb_ddc_read
+EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0x337208d8	fb_sys_read
+EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0x5a1a2c38	fb_sys_write
+EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0x312e3746	sis_malloc_new
+EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0xdc23655c	sis_free_new
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x07145ca3	w1_write_block
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x26b3f460	w1_next_pullup
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x3865b4e7	w1_read_8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x4798910e	w1_read_block
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x7c2f2afb	w1_calc_crc8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x87f654e3	w1_reset_select_slave
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x9ba1287a	w1_reset_bus
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xbf685c5a	w1_write_8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xddf1f7f3	w1_touch_block
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x0864c4a4	dlm_new_lockspace
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x4c08d83d	dlm_posix_get
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x5009ce1b	dlm_posix_unlock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x8a02d95f	dlm_posix_lock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x9321df95	dlm_lock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xcf9f3328	dlm_release_lockspace
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xdc583c08	dlm_unlock
+EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0x6868a07a	exportfs_decode_fh
+EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0xc5109656	exportfs_encode_fh
+EXPORT_SYMBOL_GPL fs/fat/fat 0x149e60b9	fat_get_dotdot_entry
+EXPORT_SYMBOL_GPL fs/fat/fat 0x21d28997	fat_sync_inode
+EXPORT_SYMBOL_GPL fs/fat/fat 0x2e44a9b4	fat_setattr
+EXPORT_SYMBOL_GPL fs/fat/fat 0x31859791	fat_build_inode
+EXPORT_SYMBOL_GPL fs/fat/fat 0x639220d7	fat_attach
+EXPORT_SYMBOL_GPL fs/fat/fat 0x67712c30	fat_add_entries
+EXPORT_SYMBOL_GPL fs/fat/fat 0x799b4804	fat_detach
+EXPORT_SYMBOL_GPL fs/fat/fat 0x82aca8a4	fat_search_long
+EXPORT_SYMBOL_GPL fs/fat/fat 0x84ca94e0	fat_getattr
+EXPORT_SYMBOL_GPL fs/fat/fat 0x8e86dab8	fat_free_clusters
+EXPORT_SYMBOL_GPL fs/fat/fat 0x938fa5c5	fat_alloc_new_dir
+EXPORT_SYMBOL_GPL fs/fat/fat 0x9f7513b7	fat_scan
+EXPORT_SYMBOL_GPL fs/fat/fat 0xac524b2e	fat_fill_super
+EXPORT_SYMBOL_GPL fs/fat/fat 0xc5c44995	fat_remove_entries
+EXPORT_SYMBOL_GPL fs/fat/fat 0xc9cdbbf1	fat_time_unix2fat
+EXPORT_SYMBOL_GPL fs/fat/fat 0xe0c0d07c	fat_flush_inodes
+EXPORT_SYMBOL_GPL fs/fat/fat 0xe4e823e9	fat_dir_empty
+EXPORT_SYMBOL_GPL fs/fat/fat 0xfd660e41	fat_fs_error
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x0bc23d86	nlmclnt_proc
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x17ce645d	locks_end_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x1a618932	nlmsvc_unlock_all_by_ip
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x6f4610ea	nlmsvc_unlock_all_by_sb
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x6f959b35	locks_in_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x887c9a1c	nlmsvc_ops
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x96877ac4	locks_start_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xa7b91a7b	lockd_down
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xcd55a193	nlmclnt_init
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xdd784f1f	nlmclnt_done
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xf6933c48	lockd_up
+EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0x6970ab6e	nfsacl_encode
+EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0xbddb7f75	nfsacl_decode
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1b89c6ee	o2hb_fill_node_map
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1cb231d0	mlog_not_bits
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1d00ef40	o2nm_get_node_by_num
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1d747ce3	o2hb_check_node_heartbeating
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x36418553	o2net_send_message
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x4900035b	o2hb_stop_all_regions
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x547e529e	o2hb_setup_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x687f6251	mlog_and_bits
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa0e6ec7e	o2hb_unregister_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa82a8645	o2nm_this_node
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa87bc9e7	o2nm_configured_node_map
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa9f5379a	o2net_send_message_vec
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xae808bac	o2net_register_handler
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xb65bbf5c	o2nm_node_get
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xbaeb4700	o2hb_check_node_heartbeating_from_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xcad49070	o2hb_register_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xd60f2c6c	o2hb_check_local_node_heartbeating
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xe1f7c005	o2nm_get_node_by_ip
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xe4cb2a7d	o2nm_node_put
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf1a5611d	o2net_unregister_handler_list
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x00d67caf	dlmlock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x0edb9ca2	dlm_register_domain
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x1eabcd96	dlm_unregister_domain
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x7a1211f8	dlm_setup_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x7cd2d372	dlmunlock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd7ba575e	dlm_errmsg
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd8fa57a6	dlm_unregister_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xe3ead532	dlm_print_one_lock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xebc5770d	dlm_register_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xfb86b96f	dlm_errname
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0562c415	ocfs2_cluster_this_node
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x06379db6	ocfs2_dlm_lvb_valid
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0e27f909	ocfs2_dlm_lock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x21db5b88	ocfs2_cluster_disconnect
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4a1f6fe9	ocfs2_cluster_connect
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4d3af7fa	ocfs2_cluster_hangup
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x53b6a5c2	ocfs2_plock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x6f233a40	ocfs2_stack_glue_unregister
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x7a37fb61	ocfs2_stack_glue_register
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x81c85a68	ocfs2_dlm_lock_status
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x91fab465	ocfs2_dlm_lvb
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x963932a3	ocfs2_stack_glue_set_locking_protocol
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xa7d5c1c0	ocfs2_dlm_unlock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xbbc4ef97	ocfs2_stack_supports_plocks
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xd066711e	ocfs2_dlm_dump_lksb
+EXPORT_SYMBOL_GPL lib/lzo/lzo_compress 0x56b63670	lzo1x_1_compress
+EXPORT_SYMBOL_GPL lib/lzo/lzo_decompress 0xf30fda27	lzo1x_decompress_safe
+EXPORT_SYMBOL_GPL net/802/garp 0x007492ea	garp_request_join
+EXPORT_SYMBOL_GPL net/802/garp 0x3b6d23ea	garp_init_applicant
+EXPORT_SYMBOL_GPL net/802/garp 0x6fb5475b	garp_unregister_application
+EXPORT_SYMBOL_GPL net/802/garp 0x88d20e93	garp_uninit_applicant
+EXPORT_SYMBOL_GPL net/802/garp 0xc2c2deca	garp_register_application
+EXPORT_SYMBOL_GPL net/802/garp 0xceab9e4f	garp_request_leave
+EXPORT_SYMBOL_GPL net/802/stp 0x0f0ee543	stp_proto_unregister
+EXPORT_SYMBOL_GPL net/802/stp 0xa00757da	stp_proto_register
+EXPORT_SYMBOL_GPL net/ax25/ax25 0x17f88019	ax25_register_pid
+EXPORT_SYMBOL_GPL net/ax25/ax25 0xac93ae05	ax25_bcast
+EXPORT_SYMBOL_GPL net/ax25/ax25 0xaeb7451e	ax25_defaddr
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x06def127	dccp_setsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x1d99d49a	dccp_timestamp
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x1f92c2f8	dccp_init_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x238167ce	dccp_hashinfo
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x31d994bc	dccp_poll
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x348d0c87	dccp_rcv_state_process
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x378e1295	dccp_set_state
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x383827f1	dccp_shutdown
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x39a417ea	dccp_destroy_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x3a17ba01	dccp_insert_option
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x3a8b726e	dccp_ioctl
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x3ce1aced	dccp_getsockopt
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x433441f4	dccp_orphan_count
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x46092777	dccp_create_openreq_child
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x48cdf5c4	dccp_disconnect
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x4bd82af8	inet_dccp_listen
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x4cdd391d	dccp_feat_list_purge
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x4f43280f	dccp_send_sync
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x4f48388e	dccp_parse_options
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x53928889	dccp_ctl_make_reset
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x56ea266a	dccp_state_name
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x603e2973	dccp_death_row
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x6b475af8	dccp_close
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x754d5b24	dccp_sync_mss
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x79a719e3	dccp_check_req
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x7f935541	dccp_child_process
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x8040396f	dccp_insert_option_elapsed_time
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x86be7924	dccp_packet_name
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x8b7d8caf	dccp_statistics
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x8f39a2fb	dccp_sendmsg
+EXPORT_SYMBOL_GPL net/dccp/dccp 0x9cc123c2	dccp_connect
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xa55d376a	dccp_send_ack
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xabd8ee33	dccp_rcv_established
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xb689a137	dccp_done
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xbb8368fc	dccp_reqsk_init
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xc161c780	dccp_insert_option_timestamp
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xc713679f	dccp_make_response
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xd39c85aa	dccp_reqsk_send_ack
+EXPORT_SYMBOL_GPL net/dccp/dccp 0xd7425f8d	dccp_recvmsg
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x5dd8fc07	dccp_v4_connect
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0x97bb1eb2	dccp_v4_send_check
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xd527e661	dccp_v4_conn_request
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xe7e92a45	dccp_invalid_packet
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xede2d44c	dccp_v4_request_recv_sock
+EXPORT_SYMBOL_GPL net/dccp/dccp_ipv4 0xfbab715a	dccp_v4_do_rcv
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0x14193459	nf_nat_seq_adjust_hook
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0x6d40a921	need_ipv4_conntrack
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_defrag_ipv4 0x6b6c3d10	nf_defrag_ipv4_enable
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x07ae60b6	nf_nat_proto_in_range
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x0895b806	nf_nat_icmp_reply_translation
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x19ec1bf4	nf_nat_proto_unique_tuple
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x1febca0d	nf_nat_packet
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x3e1c3840	nf_nat_proto_put
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x73ce6c08	nf_nat_get_offset
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x7ae72ac0	nf_nat_proto_find_get
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x94a08134	nf_nat_proto_nlattr_to_range
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xe8b77876	nf_nat_proto_range_to_nlattr
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat_proto_gre 0x636b12c8	nf_nat_need_gre
+EXPORT_SYMBOL_GPL net/mac80211/mac80211 0xa4cd0022	ieee80211_iterate_active_interfaces_atomic
+EXPORT_SYMBOL_GPL net/mac80211/mac80211 0xd2da3d97	ieee80211_iterate_active_interfaces
+EXPORT_SYMBOL_GPL net/netfilter/ipvs/ip_vs 0xe6476b4a	net_vs_ctl_path
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x03e48f14	nf_ct_iterate_cleanup
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x045072cd	nf_ct_port_nla_policy
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x0c4b9d49	nf_ct_get_tuplepr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x115c8e93	nf_ct_expect_related_report
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x14bad6e2	nf_ct_port_tuple_to_nlattr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x15bcff01	nf_conntrack_l4proto_tcp4
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x17052d3c	nf_ct_deliver_cached_events
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x1e366f38	nf_conntrack_l4proto_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x2677736c	nf_ct_expect_alloc
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x274e6e83	nf_ct_nat_offset
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x278a9d83	nf_conntrack_l4proto_tcp6
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x286ac416	nf_conntrack_l3proto_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x2ef988e0	nf_ct_l3protos
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x2f54036f	nf_conntrack_unregister_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3996ac2b	__nf_ct_refresh_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3d107e34	nf_ct_expect_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3f5b1415	nf_ct_port_nlattr_to_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x436a9381	nf_ct_expect_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x43c8f9fb	__nf_ct_kill_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4542b821	__nf_ct_try_assign_helper
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x481ea7bb	nf_conntrack_l4proto_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4b9065a9	nf_ct_alloc_hashtable
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x51eb9d3c	nf_ct_remove_expectations
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x51f23741	__nf_conntrack_helper_find_byname
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x55f328f5	nf_conntrack_flush_report
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5882ba33	nf_conntrack_set_hashsize
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x598915d2	nf_conntrack_hash_insert
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5ab9a0be	nf_ct_invert_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5ba7f1f3	__nf_ct_expect_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5c72cf27	nf_conntrack_register_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5ddffffc	nf_ct_insert_dying_list
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x62813e5c	nf_ct_port_nlattr_tuple_size
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x67f902a0	nf_conntrack_helper_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6e224a7a	need_conntrack
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x77525ab7	nf_ct_expect_register_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x78f9b710	nf_ct_l3proto_try_module_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x86797883	nf_conntrack_free
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x87482e69	nf_conntrack_alloc
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x887048b3	nf_conntrack_l4proto_udp4
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x89da66a2	nf_ct_get_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8ad2b1a2	nf_ct_l3proto_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8b953d7c	nf_conntrack_alter_reply
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8ffe7e89	nf_conntrack_htable_size
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x905111a1	seq_print_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9067606c	nf_conntrack_tuple_taken
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x90ff6c9f	nf_ct_invert_tuplepr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x93b6fbb4	__nf_ct_l4proto_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9757a148	nf_conntrack_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9a81e8e1	print_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9af3f6c1	nf_ct_free_hashtable
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9d404edf	nf_ct_unexpect_related
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xa0d469ab	nf_ct_delete_from_lists
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xa7825346	nf_conntrack_l3proto_generic
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb4407714	nf_conntrack_in
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb602c57e	nf_ct_l3proto_module_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb98eda4f	nf_conntrack_event_cb
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xba462a31	nf_conntrack_l4proto_udp6
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc0bdcf10	nf_ct_helper_ext_add
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc18ac88d	nf_ct_expect_hsize
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc48943ea	nf_ct_l3proto_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc62cb241	nf_ct_expect_init
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc7490a6a	nfnetlink_parse_nat_setup_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc758b990	nf_conntrack_untracked
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xce597eb5	nf_ct_expect_unregister_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xd3d96685	nf_ct_extend_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xd5af974a	nf_ct_extend_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xdbef8b57	nf_conntrack_lock
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xdf34da69	nf_conntrack_l3proto_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xe4212a1d	nf_ct_unlink_expect
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xe67d4664	nf_conntrack_helper_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf38bcdf3	nf_conntrack_max
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf6182a7b	__nf_conntrack_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf852ac34	nf_expect_event_cb
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf8a0a0c4	__nf_conntrack_confirm
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_amanda 0x68faec4c	nf_nat_amanda_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_ftp 0x115c6e08	nf_nat_ftp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x05a8cf85	nat_h245_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x1719d225	set_h245_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x2aebaf03	nat_q931_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x61d53513	nat_rtp_rtcp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x72ad8e02	set_ras_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x9651c1d3	get_h225_addr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xa52ebec1	set_h225_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xaccc6ee7	set_sig_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xad8e8f38	nat_callforwarding_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xe1e5a140	nat_t120_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_irc 0xb6a3572a	nf_nat_irc_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x0ba4664d	nf_nat_pptp_hook_inbound
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x0c3aa68b	nf_nat_pptp_hook_exp_gre
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x59bb9c4a	nf_nat_pptp_hook_outbound
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0xa1f640fc	nf_nat_pptp_hook_expectfn
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_proto_gre 0x3cc14252	nf_ct_gre_keymap_destroy
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_proto_gre 0x528830ff	nf_ct_gre_keymap_add
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x0568a3f3	nf_nat_sdp_port_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x08d9e2c4	ct_sip_parse_request
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x12760710	nf_nat_sdp_session_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x19702880	nf_nat_sdp_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x4fe45503	ct_sip_parse_address_param
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x6b81663a	ct_sip_parse_numerical_param
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x76b968b0	ct_sip_get_sdp_header
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xb156f233	ct_sip_parse_header_uri
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xb5c0ef51	nf_nat_sip_expect_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xcf22e1fe	nf_nat_sip_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xd2228164	nf_nat_sdp_media_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xf7798e0a	ct_sip_get_header
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_tftp 0xcd464cff	nf_nat_tftp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_tproxy_core 0x4ecac405	nf_tproxy_get_sock_v4
+EXPORT_SYMBOL_GPL net/netfilter/nf_tproxy_core 0x6890d941	nf_tproxy_assign_sock
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x0f001b86	nfnetlink_subsys_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x170fc998	nfnetlink_subsys_register
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x1f58e71b	nfnl_lock
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x3895cd7a	nfnl_unlock
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x4dfb94dd	nfnetlink_unicast
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x9f624449	nfnetlink_send
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xeca95329	nfnetlink_has_listeners
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xef9b4bbd	nfnetlink_set_err
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink_log 0x761d31ff	nfulnl_log_packet
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x0d730f0f	xt_find_table_lock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x32670a0d	xt_replace_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x40728a63	xt_find_revision
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x6c247891	xt_table_unlock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x78e846bf	xt_request_find_target
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x9b1c0a89	xt_unregister_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x9b6f2a2b	xt_proto_fini
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xa1cce8f9	per_cpu__xt_info_locks
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xf19c8471	xt_register_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xf9f6527c	xt_check_match
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xfcbf08c2	xt_proto_init
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xfd41b99c	xt_check_target
+EXPORT_SYMBOL_GPL net/netfilter/xt_RATEEST 0x3d225a19	xt_rateest_put
+EXPORT_SYMBOL_GPL net/netfilter/xt_RATEEST 0xa8ac8b53	xt_rateest_lookup
+EXPORT_SYMBOL_GPL net/rds/rds 0x00a467af	rds_wq
+EXPORT_SYMBOL_GPL net/rds/rds 0x134297f7	rds_for_each_conn_info
+EXPORT_SYMBOL_GPL net/rds/rds 0x19de3688	rds_info_deregister_func
+EXPORT_SYMBOL_GPL net/rds/rds 0x2b4d5a0a	rds_recv_incoming
+EXPORT_SYMBOL_GPL net/rds/rds 0x2bf7812a	rds_conn_destroy
+EXPORT_SYMBOL_GPL net/rds/rds 0x2c5c5514	rds_message_add_rdma_dest_extension
+EXPORT_SYMBOL_GPL net/rds/rds 0x3101936e	rds_message_add_extension
+EXPORT_SYMBOL_GPL net/rds/rds 0x4a53cebb	rds_rdma_send_complete
+EXPORT_SYMBOL_GPL net/rds/rds 0x6cbc7a05	rds_cong_map_updated
+EXPORT_SYMBOL_GPL net/rds/rds 0x70a241ba	rds_trans_unregister
+EXPORT_SYMBOL_GPL net/rds/rds 0x73aac73d	rds_message_populate_header
+EXPORT_SYMBOL_GPL net/rds/rds 0x7b90bedb	rds_conn_drop
+EXPORT_SYMBOL_GPL net/rds/rds 0x894d32f9	per_cpu__rds_stats
+EXPORT_SYMBOL_GPL net/rds/rds 0x8c6c1918	rds_page_copy_user
+EXPORT_SYMBOL_GPL net/rds/rds 0x8de6aaa8	rds_conn_create_outgoing
+EXPORT_SYMBOL_GPL net/rds/rds 0x9050a902	rds_conn_create
+EXPORT_SYMBOL_GPL net/rds/rds 0x96fafe85	rds_stats_info_copy
+EXPORT_SYMBOL_GPL net/rds/rds 0x976756d6	rds_info_register_func
+EXPORT_SYMBOL_GPL net/rds/rds 0x9a3afac2	rds_inc_init
+EXPORT_SYMBOL_GPL net/rds/rds 0x9bf94059	rds_message_put
+EXPORT_SYMBOL_GPL net/rds/rds 0x9e2091dc	rds_inc_put
+EXPORT_SYMBOL_GPL net/rds/rds 0xb0bfc44b	rds_message_unmapped
+EXPORT_SYMBOL_GPL net/rds/rds 0xb6d66863	rds_send_get_message
+EXPORT_SYMBOL_GPL net/rds/rds 0xb840a2fb	rds_inc_addref
+EXPORT_SYMBOL_GPL net/rds/rds 0xcee11b0f	rds_send_drop_acked
+EXPORT_SYMBOL_GPL net/rds/rds 0xf101f29f	rds_trans_register
+EXPORT_SYMBOL_GPL net/rds/rds 0xf5587fc3	rds_info_copy
+EXPORT_SYMBOL_GPL net/rds/rds 0xf8f4602d	rds_connect_complete
+EXPORT_SYMBOL_GPL net/rds/rds 0xf910757b	rds_message_addref
+EXPORT_SYMBOL_GPL net/rxrpc/af-rxrpc 0x503a158d	rxrpc_unregister_security
+EXPORT_SYMBOL_GPL net/rxrpc/af-rxrpc 0xf006301d	rxrpc_register_security
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x00c52ef5	g_make_token_header
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x1641a983	gss_mech_get_by_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x1dc4e901	gss_mech_get
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x35975653	svc_gss_principal
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x3fb0d236	gss_mech_register
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x621f3a75	gss_svc_to_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x64e37b5a	gss_mech_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x6877f026	gss_pseudoflavor_to_service
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x8d1a827e	svcauth_gss_register_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x9900a2be	svcauth_gss_flavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xa53dbd1b	gss_mech_get_by_name
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xb5dea7ef	g_token_size
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xbbb2d6fe	gss_mech_put
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xc950f5d1	gss_service_to_auth_domain_name
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xf8b2ff6e	g_verify_token_header
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x000d7999	rpc_destroy_wait_queue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x00443611	svc_destroy
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x00519d4d	svc_wake_up
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x00a0638f	rpc_shutdown_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x00d7dbcc	rpc_delay
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x01e98b5d	svc_create_pooled
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x02fbc8d5	rpcauth_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x053f98e6	svc_close_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x05e807a9	xdr_encode_string
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x065994f1	xdr_encode_opaque_fixed
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x078223b1	xprt_unregister_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0e36017c	xprt_reserve_xprt_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0e92169f	rpcb_getport_async
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0f0472ba	svc_recv
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0f668ba9	svc_auth_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0f9fd9c0	rpc_ntop
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x12896c91	rpc_proc_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x12e280e3	svc_proc_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x13f197a2	svc_max_payload
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x143b6668	rpc_peeraddr2str
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x158a48e3	rpcauth_init_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x16662d3a	svc_print_addr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x17ce65e9	rpc_bind_new_program
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x19511259	xprt_release_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1a0df1f8	rpc_peeraddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1a5ea26e	rpc_exit_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1bc94fcd	rpcauth_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1cd4d1af	svc_xprt_names
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1d11ced9	svc_set_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x20a5d393	unix_domain_find
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x21c02197	svc_xprt_enqueue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x253aa001	xdr_skb_read_bits
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x25b1d831	rpc_get_mount
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2919b156	xdr_decode_string_inplace
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2aa17774	rpc_free_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2c43b733	rpc_lookup_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2da273ad	svc_addsock
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2eec63c9	xdr_encode_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x31a89d59	rpc_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3387395e	xprt_update_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3442ae02	xdr_init_encode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3520a95c	svc_sock_names
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x362d05fc	xdr_partial_copy_from_skb
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3701e25b	xdr_shift_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3822adff	auth_unix_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x39d229fc	auth_domain_put
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3a36de2c	xdr_decode_array2
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x409a08a0	svc_sock_update_bufs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4646f163	svc_drop
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x470f0129	cache_check
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x496c4cd7	rpcauth_init_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4ad2c33e	svc_sock_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4ae432c3	rpcauth_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4b881494	rpc_print_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4b9de6de	rpc_wake_up
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4ed9bd4f	cache_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4f805243	xdr_write_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x51a3dfbc	cache_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x53445f68	nlm_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x58d55ae4	xprt_wake_pending_tasks
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x59262a5d	svc_sock_destroy
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5aa5a7ef	svc_exit_thread
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5af43e0b	rpc_call_null
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5b14ec1a	rpc_put_mount
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5bd26000	rpc_proc_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5c3c9fa0	rpc_call_start
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5de9b15d	sunrpc_cache_register_pipefs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5e9fa43a	svcauth_unix_set_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5eb0b46f	cache_purge
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x62f9b7d1	rpc_alloc_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6606000b	xprt_write_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x675524ec	rpc_sockaddr2uaddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x678c8184	rpc_killall_tasks
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x682effee	svc_unreg_xprt_class
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x68faaefe	svc_xprt_put
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6c5304c5	rpcb_getport_sync
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6cc5da21	svc_authenticate
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6eea229d	svcauth_unix_purge
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x71076974	xdr_buf_subsegment
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x716c1856	xprt_set_retrans_timeout_def
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x71fa908a	cache_flush
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x725c6800	auth_unix_add_addr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x77698f3d	rpc_run_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7903655b	xprt_release_xprt_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x799c1644	xdr_enter_page
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7de53067	rpc_init_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x809606e2	rpc_wake_up_queued_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x81e4a79e	xdr_encode_word
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x826cc6be	put_rpccred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x86d38594	rpc_sleep_on
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x86ed282a	rpc_uaddr2sockaddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x87bf4d9d	xprt_complete_rqst
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8970bd54	svc_find_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8985d78d	xdr_read_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x89dc7f2e	svc_create_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8a61e636	sunrpc_cache_pipe_upcall
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8b5c6c81	rpc_unlink
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8c9f7f0b	rpc_init_wait_queue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8d670ebe	svc_reserve
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x90e1c91d	rpc_queue_upcall
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x922f31c0	xdr_process_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x926f5413	sunrpc_cache_unregister_pipefs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x929c34be	xdr_buf_from_iov
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x94432a7c	rpc_force_rebind
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x96ce329c	xdr_buf_read_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9db7ee84	rpc_max_payload
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa02c08a8	rpc_lookup_machine_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa0f0741b	xdr_encode_array2
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa184fb22	xprt_disconnect_done
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xaf5bf6ef	nfs_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb19205e2	svc_seq_show
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb2560026	sunrpc_cache_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb5fd93f2	svc_auth_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb88dc3b0	rpc_wake_up_status
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb9621fc8	xprt_reserve_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xba030b67	rpcauth_destroy_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbaa623e2	xprt_release_rqst_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbcdd4df3	xprt_wait_for_buffer_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbe44edec	rpc_put_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbf9d1b96	nfsd_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc12435e3	rpc_calc_rto
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc2a9271a	rpc_restart_call_prepare
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc3880471	xdr_decode_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc3c55efe	rpcauth_lookup_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc4cd7047	sunrpc_cache_update
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc5692219	xprt_register_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc8e96dea	qword_addhex
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcc483dc7	auth_domain_find
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xccc2372e	rpc_pton
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcee467f3	xprt_load_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcfd28646	auth_domain_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd05c4f0b	xdr_encode_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd110127f	xdr_inline_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd25e3341	svc_xprt_received
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd2d19daa	xdr_inline_decode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd3c2c123	rpc_restart_call
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd4e3de17	rpc_clone_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd4e4579d	xprt_adjust_cwnd
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd518b324	rpc_call_async
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd56db238	svc_xprt_copy_addrs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd60e18da	rpc_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd90c3e17	rpc_mkpipe
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdabf3e66	xdr_reserve_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdcef4478	rpc_call_sync
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xde6bd624	svc_xprt_init
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xdf89ea71	xdr_decode_word
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe2639fe4	csum_partial_copy_to_xdr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe32f7b7e	svc_set_num_threads
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe5919cb1	xdr_encode_opaque
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe61fb8d1	auth_unix_forget_old
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe6bc9574	svc_reg_xprt_class
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe6d62ca4	svc_process
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe97dba45	rpcauth_generic_bind_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe97f4ce5	qword_get
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe9d28b2f	rpc_malloc
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xeb266d55	__rpc_wait_for_completion_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xecff67ec	rpc_setbufsize
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xedcf6be4	qword_add
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xee665b85	svc_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xeeacab69	rpc_update_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf1c418be	read_bytes_from_xdr_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf4436717	xprt_lookup_rqst
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf61cea4b	svc_prepare_thread
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf7ebe3d2	xdr_init_decode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf9d1164c	rpc_free
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfc241e84	rpc_wake_up_next
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfdb5eb0d	xprt_set_retrans_timeout_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfe496a1e	svc_proc_register
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x3cc1d72d	wimax_msg_data
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x47f63cd6	wimax_msg_len
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x4e323044	wimax_msg
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x5224e04a	wimax_dev_rm
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x7299f705	wimax_msg_send
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x90042451	wimax_state_change
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x9263ad93	wimax_dev_init
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x9b8408fd	wimax_msg_data_len
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x9f5ca0e9	wimax_report_rfkill_sw
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xa5ad5f80	wimax_state_get
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xaa630570	wimax_report_rfkill_hw
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xc20611bc	wimax_dev_add
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xfe10955f	wimax_msg_alloc
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x0b45501e	cfg80211_wext_siwencode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x1da4ad1f	cfg80211_wext_siwmlme
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x22b85c29	cfg80211_wext_siwscan
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x2ca5fab1	cfg80211_wext_siwgenie
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x3c4e8a1b	cfg80211_wext_siwap
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x49e40331	cfg80211_wext_giwessid
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x5e371cd5	cfg80211_wext_siwauth
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x603e9d29	cfg80211_wireless_stats
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x6473e47b	cfg80211_wext_giwap
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x68612e89	cfg80211_wext_siwpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x6a55e132	cfg80211_wext_siwrate
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x7b4bbbd7	cfg80211_wext_siwfrag
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x7c6c9311	cfg80211_wext_giwretry
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x7d72d04f	cfg80211_wext_giwencode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x805d24b9	cfg80211_wext_giwtxpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x83a0efc9	cfg80211_wext_giwpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x91c06310	cfg80211_wext_giwauth
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x97ad5251	cfg80211_wext_siwretry
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x9a8b543b	cfg80211_wext_giwfreq
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xa225c271	cfg80211_wext_siwessid
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xa5a29ef7	cfg80211_wext_giwrate
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xae9501ff	cfg80211_wext_siwmode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xb01eb3c5	cfg80211_wext_siwencodeext
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xb4bcc412	cfg80211_wext_giwfrag
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xb8f7ba19	cfg80211_wext_giwrts
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xcbcb61ca	cfg80211_wext_giwscan
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xce45bdbb	cfg80211_wext_siwtxpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xd34ef596	cfg80211_wext_giwname
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xd761080d	cfg80211_wext_siwfreq
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xe73bf1de	cfg80211_wext_giwmode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xea2bfef2	cfg80211_wext_giwrange
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xf51de62f	cfg80211_wext_siwrts
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x1a02ccc5	ipcomp_input
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x3b309c2d	ipcomp_init_state
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x4e260678	ipcomp_output
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x66b0639b	ipcomp_destroy
+EXPORT_SYMBOL_GPL sound/core/snd-pcm 0xa286a234	snd_pcm_format_name
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0876966f	snd_hda_query_pin_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0943ea5c	snd_hda_override_amp_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x09c825c8	snd_hda_codec_resume_amp
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0bb11256	snd_hda_codec_set_pincfg
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0e1fa6e6	snd_hda_suspend
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x121e747f	snd_hda_ch_mode_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1a7b38ad	snd_hda_bind_vol
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1ac7baab	snd_hda_check_board_codec_sid_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1c7c29b2	snd_hda_codec_resume_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1e9331a3	snd_hda_load_patch
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2c355de4	snd_hda_mixer_bind_switch_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3234fdd0	snd_hda_get_connections
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x32f7dac2	snd_hda_mixer_bind_ctls_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x33d7adc0	snd_hda_set_vmaster_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x38f2d449	snd_hda_mixer_bind_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3d68908a	snd_hda_codec_read
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3eaba582	snd_hda_sequence_write
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x402fe0cd	snd_hda_multi_out_dig_open
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4392c01f	snd_hda_codec_amp_stereo
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x43b84373	snd_hda_create_spdif_out_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x466726b3	snd_hda_multi_out_analog_cleanup
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4af2f959	snd_hda_mixer_amp_switch_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4de5c68c	snd_hda_get_hint
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4fd0a3cd	snd_hda_codec_setup_stream
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5002e09d	snd_hda_codec_configure
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x514d94c9	snd_hda_queue_unsol_event
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x519ba643	snd_hda_get_bool_hint
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5238c8c7	snd_hda_multi_out_analog_prepare
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x546326b7	snd_hda_detach_beep_device
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x553cf71b	snd_hda_bind_sw
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x55f19389	snd_hda_attach_beep_device
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5ae76f73	auto_pin_cfg_labels
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5c5546e5	snd_hda_mixer_amp_volume_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5ec37d06	snd_hda_multi_out_dig_cleanup
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x622e3e55	snd_hda_create_spdif_in_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x632fd9f3	snd_hda_add_vmaster
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x650607e8	snd_hda_mixer_amp_volume_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x69df7b92	snd_hda_codec_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6bfc496e	snd_hda_codec_cleanup_stream
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6dd10184	snd_hda_add_new_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6f0d994a	snd_hda_check_board_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7597ed51	snd_hda_get_sub_nodes
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7ad980eb	snd_hda_power_up
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x7f6dc891	snd_hda_resume
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x80845359	snd_hda_parse_pin_def_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8cf58f41	snd_hda_mixer_amp_switch_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8e52410b	snd_hda_bus_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9a8e1877	snd_array_free
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9b59f3c5	snd_hda_build_pcms
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa032c361	snd_hda_add_codec_preset
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa0fc8d00	snd_hda_multi_out_dig_close
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa206255e	snd_hda_check_amp_list_power
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa2827d76	snd_hda_get_jack_location
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa30171f0	snd_hda_mixer_amp_volume_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa357abaa	snd_hda_input_mux_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa78180f5	snd_hda_delete_codec_preset
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa90153d1	snd_hda_sequence_write_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xad87613e	snd_print_pcm_rates
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb20680b4	snd_hda_multi_out_dig_prepare
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb3082868	snd_hda_build_controls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb5a6ce4c	snd_hda_mixer_amp_switch_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbe03cf87	snd_hda_ctl_add
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbe7dd7dc	snd_array_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc34a54c6	snd_hda_calc_stream_format
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc48ea487	snd_hda_codec_get_pincfg
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc508e99d	snd_hda_codec_write_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc63459e8	snd_hda_codec_write
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc652fd69	snd_hda_get_jack_connectivity
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc8af6bb8	snd_hda_create_spdif_share_sw
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc9305a3b	snd_hda_is_supported_format
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcb301b6e	snd_hda_get_jack_type
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcce27eb0	snd_hda_input_mux_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcda3edd7	snd_hda_mixer_bind_ctls_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xce2611bd	snd_hda_ch_mode_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd3616af1	snd_hda_mixer_bind_switch_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xdb6ce202	snd_hda_power_down
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe059726c	snd_hda_multi_out_analog_open
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe0666c00	snd_hda_mixer_amp_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe084c141	query_amp_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe702eeb9	snd_hda_find_mixer_ctl
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe74672ff	snd_hda_codec_amp_read
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe958e061	snd_hda_ch_mode_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeda3a721	snd_print_pcm_bits
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf0398469	snd_hda_codec_amp_update
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf4f0acda	snd_hda_mixer_bind_ctls_info
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0x6c7898be	soc_codec_dev_ad73311
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0x92598257	ad73311_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0xd1249748	ak4535_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0xec26517d	soc_codec_dev_ak4535
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4642 0x87099e9d	ak4642_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4642 0xb49d7ed1	soc_codec_dev_ak4642
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0x1376532c	cs4270_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0x1e8d7863	soc_codec_device_cs4270
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-l3 0x78c84c7e	l3_write
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-max9877 0x8cf60ae0	max9877_add_controls
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0x766ec284	soc_codec_dev_pcm3008
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0x8d1e7d59	pcm3008_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-spdif 0x62c82dbb	dit_stub_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0x24f955c0	ssm2602_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0x7ddbc74f	soc_codec_dev_ssm2602
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0x21c2d349	soc_codec_dev_tlv320aic23
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0x6d6d3172	tlv320aic23_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x1c0e412b	soc_codec_dev_aic3x
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x33acd4cc	aic3x_button_pressed
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xa74a65f6	aic3x_set_gpio
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xc9d26ba0	aic3x_set_headset_detection
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xd27a75f5	aic3x_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xdd123606	aic3x_headset_detected
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xfd2853af	aic3x_get_gpio
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0xd2564f47	soc_codec_dev_twl4030
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0xd2e83bb9	twl4030_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda134x 0x13ee2942	soc_codec_dev_uda134x
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x2254152b	soc_codec_dev_uda1380
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x60a84e6e	uda1380_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0x253e70c2	wm_hubs_add_analogue_controls
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0x757206d5	wm_hubs_spkmix_tlv
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0xcf6ae807	wm_hubs_add_analogue_routes
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x5456d888	soc_codec_dev_wm8350
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0xa9a88a00	wm8350_hp_jack_detect
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0xd6644658	wm8350_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x8e9960e6	wm8400_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0xcf4a22da	soc_codec_dev_wm8400
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0x8572d6be	soc_codec_dev_wm8510
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0xbb1f9a09	wm8510_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8523 0x0c63f23a	wm8523_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8523 0xac193b24	soc_codec_dev_wm8523
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0x56563a3d	wm8580_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0x8aa3ed31	soc_codec_dev_wm8580
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0x24810584	wm8728_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0xe5e42a64	soc_codec_dev_wm8728
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x35e4fb1a	soc_codec_dev_wm8731
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0xa5f95ff8	wm8731_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x0d75b967	wm8750_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x2872b6e9	soc_codec_dev_wm8750
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0x035fe52a	soc_codec_dev_wm8753
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0x6bdf4702	wm8753_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8776 0x248b2023	wm8776_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8776 0x7dacc501	soc_codec_dev_wm8776
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0x4ac784f2	wm8900_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0xce660331	soc_codec_dev_wm8900
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0xcc53f65c	wm8903_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0xe54b50f2	soc_codec_dev_wm8903
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0xbe88a0e1	wm8940_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0xc96fabed	soc_codec_dev_wm8940
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0x2917b1c8	wm8960_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0xcaeb7f83	soc_codec_dev_wm8960
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8961 0xd3f04ec2	soc_codec_dev_wm8961
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8961 0xe24b626d	wm8961_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0x443c69d9	wm8971_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0xd23224f5	soc_codec_dev_wm8971
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8974 0x14f1f86a	wm8974_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8974 0xaf45d0b0	soc_codec_dev_wm8974
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0x08acd881	soc_codec_dev_wm8988
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0x957b48f8	wm8988_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0xc1b738be	soc_codec_dev_wm8990
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0xdf5fc121	wm8990_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8993 0x59cbb38f	wm8993_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8993 0xea9a6b7d	soc_codec_dev_wm8993
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0x990605f2	soc_codec_dev_wm9081
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0xba401658	wm9081_dai
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x00fa487c	snd_soc_put_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x025913da	snd_soc_register_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x03ae20e6	snd_soc_update_bits
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0617f0e0	snd_soc_cnew
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x06747124	snd_soc_dai_set_sysclk
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x06bcd1bc	snd_soc_put_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x075a1251	snd_soc_dapm_get_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x075c1f5e	snd_soc_codec_set_cache_io
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x0f1149a2	snd_soc_dapm_get_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1334ec9c	snd_soc_dapm_get_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x162bb0ee	snd_soc_free_ac97_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x17daa9f6	snd_soc_dapm_new_controls
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x17fb5812	snd_soc_jack_free_gpios
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1bca3570	snd_soc_dapm_new_control
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1c8858bd	dapm_reg_event
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2db9532a	snd_soc_unregister_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x33bc9c17	snd_soc_register_dai
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3718dc2c	snd_soc_get_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3ef4559c	snd_soc_unregister_dais
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x41b1dc7c	snd_soc_test_bits
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x41d2421b	snd_soc_dapm_nc_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x43faa91f	snd_soc_get_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x445b4e0c	snd_soc_new_pcms
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x45d0ab23	snd_soc_info_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x47f9fc26	snd_soc_dai_set_clkdiv
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x48d52ab9	snd_soc_dai_set_tdm_slot
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x49406503	snd_soc_suspend_device
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4c4f8c07	snd_soc_dapm_info_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4dba42f7	snd_soc_dapm_get_pin_status
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4e036e1c	snd_soc_get_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4ef02ac6	snd_soc_dai_set_tristate
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4ef67954	snd_soc_dapm_put_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x519366f6	snd_soc_dai_set_fmt
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5853db52	snd_soc_unregister_platform
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x597f44d5	snd_soc_free_pcms
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5b7e4474	snd_soc_get_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x65e833f5	snd_soc_set_runtime_hwparams
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x68cbf34d	snd_soc_dapm_stream_event
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6ad66e16	snd_soc_dapm_put_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6f437d11	snd_soc_dapm_enable_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6f62de5f	snd_soc_dapm_new_widgets
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7cf516ce	snd_soc_info_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x820ce538	snd_soc_get_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x84f549e9	snd_soc_info_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8c7833e6	snd_soc_dapm_put_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x96fb5429	snd_soc_register_dais
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9841408e	snd_soc_resume_device
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9f445832	snd_soc_dai_set_pll
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa4aa981a	snd_soc_jack_report
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xaa74c8ab	snd_soc_new_ac97_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb06befc6	snd_soc_jack_add_gpios
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb1adbff4	snd_soc_dapm_free
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb471a668	snd_soc_put_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xbdeaf3d7	snd_soc_jack_new
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xbe0609d3	snd_soc_dapm_disable_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc0749cc0	snd_soc_add_controls
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc8525444	snd_soc_jack_add_pins
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc8a8fbe9	snd_soc_unregister_dai
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd5d7c400	snd_soc_put_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd82e0303	snd_soc_put_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd9561d99	snd_soc_dai_digital_mute
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xe56a24cc	snd_soc_info_enum_ext
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xe820c352	snd_soc_dapm_get_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xe8582b44	snd_soc_info_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xe92109da	snd_soc_dapm_sync
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf05cdae7	snd_soc_register_platform
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf0aaa5a0	snd_soc_codec_volatile_register
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf3efa7f1	snd_soc_info_volsw_ext
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf80a694e	snd_soc_init_card
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf9039707	snd_soc_dapm_put_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf9e6781e	snd_soc_dapm_add_routes
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x24e660a0	xv_create_pool
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0x67ed7575	xv_malloc
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0xa3b7474c	xv_free
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0xaf69699e	xv_get_object_size
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0xbf39bf05	xv_destroy_pool
+EXPORT_SYMBOL_GPL ubuntu/compcache/xvmalloc 0xc96aa6af	xv_get_total_size_bytes
+EXPORT_SYMBOL_GPL vmlinux 0x000e5a79	unregister_ftrace_event
+EXPORT_SYMBOL_GPL vmlinux 0x00566d8f	inotify_get_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x0058ae24	locks_release_private
+EXPORT_SYMBOL_GPL vmlinux 0x0067df75	ata_tf_from_fis
+EXPORT_SYMBOL_GPL vmlinux 0x007ae0f5	fuse_request_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x007f69e6	ata_sff_hsm_move
+EXPORT_SYMBOL_GPL vmlinux 0x00ebcb5d	ata_id_string
+EXPORT_SYMBOL_GPL vmlinux 0x016b9869	xfrm_calg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0x01749e90	sysfs_remove_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0x017df910	blkdev_aio_write
+EXPORT_SYMBOL_GPL vmlinux 0x018a21bf	dm_set_device_limits
+EXPORT_SYMBOL_GPL vmlinux 0x01a39fce	__create_workqueue_key
+EXPORT_SYMBOL_GPL vmlinux 0x01a4ea6d	unregister_die_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x01e1a8de	kgdb_breakpoint
+EXPORT_SYMBOL_GPL vmlinux 0x023b99a2	power_supply_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x028137ad	__mnt_is_readonly
+EXPORT_SYMBOL_GPL vmlinux 0x029373c1	sysdev_show_int
+EXPORT_SYMBOL_GPL vmlinux 0x03100b09	queue_delayed_work
+EXPORT_SYMBOL_GPL vmlinux 0x0340cbab	pm_runtime_enable
+EXPORT_SYMBOL_GPL vmlinux 0x0343bdf1	__i2c_board_list
+EXPORT_SYMBOL_GPL vmlinux 0x0380ac6e	__class_create
+EXPORT_SYMBOL_GPL vmlinux 0x03829f74	ata_sff_dev_classify
+EXPORT_SYMBOL_GPL vmlinux 0x03886af6	power_supply_register
+EXPORT_SYMBOL_GPL vmlinux 0x03dd4557	scsi_dh_activate
+EXPORT_SYMBOL_GPL vmlinux 0x03e3686c	ata_timing_cycle2mode
+EXPORT_SYMBOL_GPL vmlinux 0x04069b1d	set_irq_nested_thread
+EXPORT_SYMBOL_GPL vmlinux 0x04486e88	rcu_batches_completed
+EXPORT_SYMBOL_GPL vmlinux 0x0448db91	relay_reset
+EXPORT_SYMBOL_GPL vmlinux 0x0495a4d2	fuse_do_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x04c2785c	regulator_get_exclusive
+EXPORT_SYMBOL_GPL vmlinux 0x04e57697	sata_scr_write_flush
+EXPORT_SYMBOL_GPL vmlinux 0x0507457a	mtd_table
+EXPORT_SYMBOL_GPL vmlinux 0x052f7ab3	klist_add_tail
+EXPORT_SYMBOL_GPL vmlinux 0x0531dcb8	ata_dev_classify
+EXPORT_SYMBOL_GPL vmlinux 0x054e550b	kernel_halt
+EXPORT_SYMBOL_GPL vmlinux 0x05965169	tty_perform_flush
+EXPORT_SYMBOL_GPL vmlinux 0x05fb3da5	ata_pci_sff_activate_host
+EXPORT_SYMBOL_GPL vmlinux 0x0619ca8a	getboottime
+EXPORT_SYMBOL_GPL vmlinux 0x064d133a	proc_net_remove
+EXPORT_SYMBOL_GPL vmlinux 0x064db9a5	mark_mounts_for_expiry
+EXPORT_SYMBOL_GPL vmlinux 0x0668ce5f	ata_sff_busy_sleep
+EXPORT_SYMBOL_GPL vmlinux 0x0683047a	ata_sas_port_stop
+EXPORT_SYMBOL_GPL vmlinux 0x069f22c2	get_cpu_sysdev
+EXPORT_SYMBOL_GPL vmlinux 0x06afa15d	ata_bmdma_mode_filter
+EXPORT_SYMBOL_GPL vmlinux 0x06d13f1f	ring_buffer_entries_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x06d85e44	ata_sff_drain_fifo
+EXPORT_SYMBOL_GPL vmlinux 0x0766d37d	inet6_csk_search_req
+EXPORT_SYMBOL_GPL vmlinux 0x079793da	ata_pci_sff_init_host
+EXPORT_SYMBOL_GPL vmlinux 0x07b52e38	rtnl_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x07ce7344	trace_seq_vprintf
+EXPORT_SYMBOL_GPL vmlinux 0x07f74407	eventfd_ctx_put
+EXPORT_SYMBOL_GPL vmlinux 0x085af1b0	dm_rh_region_to_sector
+EXPORT_SYMBOL_GPL vmlinux 0x087bf1d8	ring_buffer_empty
+EXPORT_SYMBOL_GPL vmlinux 0x0889dc75	sk_clone
+EXPORT_SYMBOL_GPL vmlinux 0x08a3e5d1	net_ipv6_ctl_path
+EXPORT_SYMBOL_GPL vmlinux 0x08a475ad	fuse_put_request
+EXPORT_SYMBOL_GPL vmlinux 0x08ab6b3b	__pneigh_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x08c6c60b	led_trigger_set
+EXPORT_SYMBOL_GPL vmlinux 0x08d17de8	power_supply_set_battery_charged
+EXPORT_SYMBOL_GPL vmlinux 0x08d21013	ata_dummy_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x08f3817b	fib_rules_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x091eb9b4	round_jiffies
+EXPORT_SYMBOL_GPL vmlinux 0x091f7530	ata_port_start
+EXPORT_SYMBOL_GPL vmlinux 0x09d63f0f	devm_kfree
+EXPORT_SYMBOL_GPL vmlinux 0x0a105793	proc_net_fops_create
+EXPORT_SYMBOL_GPL vmlinux 0x0a93432b	vfs_getxattr
+EXPORT_SYMBOL_GPL vmlinux 0x0ac28669	nf_unregister_queue_handlers
+EXPORT_SYMBOL_GPL vmlinux 0x0b07abe2	unshare_fs_struct
+EXPORT_SYMBOL_GPL vmlinux 0x0b2c080d	pci_stop_bus_device
+EXPORT_SYMBOL_GPL vmlinux 0x0b353396	kobject_uevent_env
+EXPORT_SYMBOL_GPL vmlinux 0x0b3af906	bsg_register_queue
+EXPORT_SYMBOL_GPL vmlinux 0x0b5a5c69	init_dummy_netdev
+EXPORT_SYMBOL_GPL vmlinux 0x0b87bfe5	register_jprobe
+EXPORT_SYMBOL_GPL vmlinux 0x0be15b27	register_mtd_user
+EXPORT_SYMBOL_GPL vmlinux 0x0c0c41a5	ring_buffer_read_finish
+EXPORT_SYMBOL_GPL vmlinux 0x0c22a0ce	udp4_lib_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x0c2cdbf1	synchronize_sched
+EXPORT_SYMBOL_GPL vmlinux 0x0c34a5c9	dequeue_signal
+EXPORT_SYMBOL_GPL vmlinux 0x0cb88680	__tracepoint_block_rq_remap
+EXPORT_SYMBOL_GPL vmlinux 0x0cc34556	uhci_reset_hc
+EXPORT_SYMBOL_GPL vmlinux 0x0d076c16	platform_driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x0d5d5c3f	crypto_init_ahash_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x0d63cf9d	skb_cow_data
+EXPORT_SYMBOL_GPL vmlinux 0x0d6aa66b	crypto_register_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0x0ddb73cd	cfi_cmdset_0200
+EXPORT_SYMBOL_GPL vmlinux 0x0df0ea18	ata_port_desc
+EXPORT_SYMBOL_GPL vmlinux 0x0e19d1de	sysfs_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x0ece1a35	power_supply_class
+EXPORT_SYMBOL_GPL vmlinux 0x0eda90ed	simple_attr_read
+EXPORT_SYMBOL_GPL vmlinux 0x0ee65cbb	rtnl_link_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x0ef06974	spi_populate_ppr_msg
+EXPORT_SYMBOL_GPL vmlinux 0x0f165b60	fib_rules_cleanup_ops
+EXPORT_SYMBOL_GPL vmlinux 0x0f4cf1bb	device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x0f7833ad	vfs_listxattr
+EXPORT_SYMBOL_GPL vmlinux 0x0f84b5f0	fb_deferred_io_fsync
+EXPORT_SYMBOL_GPL vmlinux 0x0f893a71	ata_dev_disable
+EXPORT_SYMBOL_GPL vmlinux 0x0fe49f65	register_jprobes
+EXPORT_SYMBOL_GPL vmlinux 0x0ff193c6	pm_runtime_resume
+EXPORT_SYMBOL_GPL vmlinux 0x0fffd966	inet6_lookup_listener
+EXPORT_SYMBOL_GPL vmlinux 0x10138352	tracing_on
+EXPORT_SYMBOL_GPL vmlinux 0x101c923e	__tracepoint_power_start
+EXPORT_SYMBOL_GPL vmlinux 0x105b9208	ata_do_set_mode
+EXPORT_SYMBOL_GPL vmlinux 0x109f71ab	mnt_want_write_file
+EXPORT_SYMBOL_GPL vmlinux 0x11b10b3c	crypto_alloc_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x11d3672b	regulator_register
+EXPORT_SYMBOL_GPL vmlinux 0x11f447ce	__gpio_to_irq
+EXPORT_SYMBOL_GPL vmlinux 0x124f2056	crypto_get_attr_type
+EXPORT_SYMBOL_GPL vmlinux 0x1251d30f	call_rcu
+EXPORT_SYMBOL_GPL vmlinux 0x1256c3e9	sysfs_notify_dirent
+EXPORT_SYMBOL_GPL vmlinux 0x12639aa2	rtc_irq_set_freq
+EXPORT_SYMBOL_GPL vmlinux 0x1268f357	resume_device_irqs
+EXPORT_SYMBOL_GPL vmlinux 0x1272ef77	pci_ioremap_bar
+EXPORT_SYMBOL_GPL vmlinux 0x130cb9e8	sysfs_create_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0x137dca36	fuse_dev_release
+EXPORT_SYMBOL_GPL vmlinux 0x139a9c9b	unregister_net_sysctl_table
+EXPORT_SYMBOL_GPL vmlinux 0x13b2a946	register_keyboard_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x142b6408	crypto_hash_walk_done
+EXPORT_SYMBOL_GPL vmlinux 0x14485194	ring_buffer_iter_peek
+EXPORT_SYMBOL_GPL vmlinux 0x1449f832	platform_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x144ca71b	klist_iter_init_node
+EXPORT_SYMBOL_GPL vmlinux 0x146d606f	class_for_each_device
+EXPORT_SYMBOL_GPL vmlinux 0x149db923	selinux_string_to_sid
+EXPORT_SYMBOL_GPL vmlinux 0x14e636cc	ring_buffer_lock_reserve
+EXPORT_SYMBOL_GPL vmlinux 0x150f91f5	alloc_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0x1547ea65	crypto_ahash_finup
+EXPORT_SYMBOL_GPL vmlinux 0x15892417	async_synchronize_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x1598dc9d	unregister_netevent_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x16413bdc	invalidate_inode_pages2
+EXPORT_SYMBOL_GPL vmlinux 0x16f76869	probe_kernel_read
+EXPORT_SYMBOL_GPL vmlinux 0x174c0954	crypto_spawn_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x174d0364	add_mtd_blktrans_dev
+EXPORT_SYMBOL_GPL vmlinux 0x17507c44	sdio_readb
+EXPORT_SYMBOL_GPL vmlinux 0x17556865	__pm_runtime_disable
+EXPORT_SYMBOL_GPL vmlinux 0x17808720	ata_bmdma32_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x17b6cb54	ata_sff_check_status
+EXPORT_SYMBOL_GPL vmlinux 0x17ee5eab	crypto_alg_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x182243ed	filter_match_preds
+EXPORT_SYMBOL_GPL vmlinux 0x18447ca9	apply_to_page_range
+EXPORT_SYMBOL_GPL vmlinux 0x18d53420	kgdb_register_io_module
+EXPORT_SYMBOL_GPL vmlinux 0x18e6f676	inet_csk_route_req
+EXPORT_SYMBOL_GPL vmlinux 0x18efe1fc	pci_sriov_migration
+EXPORT_SYMBOL_GPL vmlinux 0x191fb096	srcu_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x1972c35c	attribute_container_find_class_device
+EXPORT_SYMBOL_GPL vmlinux 0x19f081a3	unregister_pernet_gen_device
+EXPORT_SYMBOL_GPL vmlinux 0x1a208e4f	skb_morph
+EXPORT_SYMBOL_GPL vmlinux 0x1a323362	__ftrace_vbprintk
+EXPORT_SYMBOL_GPL vmlinux 0x1a3311d9	i2c_unregister_device
+EXPORT_SYMBOL_GPL vmlinux 0x1a399f32	ring_buffer_overruns
+EXPORT_SYMBOL_GPL vmlinux 0x1a406c97	ata_eh_freeze_port
+EXPORT_SYMBOL_GPL vmlinux 0x1a474901	tracepoint_probe_unregister_noupdate
+EXPORT_SYMBOL_GPL vmlinux 0x1a5ed4e5	ata_sas_port_start
+EXPORT_SYMBOL_GPL vmlinux 0x1b24178e	relay_subbufs_consumed
+EXPORT_SYMBOL_GPL vmlinux 0x1b4c4c5b	ata_base_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x1b7f9f8a	klist_add_head
+EXPORT_SYMBOL_GPL vmlinux 0x1b83ed42	fl6_sock_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x1b9aca3f	jprobe_return
+EXPORT_SYMBOL_GPL vmlinux 0x1c852e7c	xfrm_calg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x1c87a811	__round_jiffies_up
+EXPORT_SYMBOL_GPL vmlinux 0x1d1271a0	ata_slave_link_init
+EXPORT_SYMBOL_GPL vmlinux 0x1d1280e0	crypto_alloc_base
+EXPORT_SYMBOL_GPL vmlinux 0x1d54cfba	ata_sas_port_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x1d667a1e	bus_register
+EXPORT_SYMBOL_GPL vmlinux 0x1d8f8059	__tracepoint_power_end
+EXPORT_SYMBOL_GPL vmlinux 0x1db21d74	__tracepoint_kfree_skb
+EXPORT_SYMBOL_GPL vmlinux 0x1dd5d0a7	dev_attr_em_message_type
+EXPORT_SYMBOL_GPL vmlinux 0x1dee2629	trace_current_buffer_lock_reserve
+EXPORT_SYMBOL_GPL vmlinux 0x1e0090f6	scsi_nl_sock
+EXPORT_SYMBOL_GPL vmlinux 0x1e1012be	ata_host_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x1e7bbcb3	kernel_restart
+EXPORT_SYMBOL_GPL vmlinux 0x1e7edb7e	shash_ahash_update
+EXPORT_SYMBOL_GPL vmlinux 0x1eb9516e	round_jiffies_relative
+EXPORT_SYMBOL_GPL vmlinux 0x1ebc18d7	inet6_destroy_sock
+EXPORT_SYMBOL_GPL vmlinux 0x1ebd1d07	inet6_csk_bind_conflict
+EXPORT_SYMBOL_GPL vmlinux 0x1ebf6c2a	pci_power_names
+EXPORT_SYMBOL_GPL vmlinux 0x1ec7c603	simple_attr_open
+EXPORT_SYMBOL_GPL vmlinux 0x1ed1fb6e	sdio_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0x1f16fb92	ata_sff_dma_pause
+EXPORT_SYMBOL_GPL vmlinux 0x1f67e238	pci_destroy_slot
+EXPORT_SYMBOL_GPL vmlinux 0x1f689cb9	dm_rh_stop_recovery
+EXPORT_SYMBOL_GPL vmlinux 0x1f9bbf49	device_create
+EXPORT_SYMBOL_GPL vmlinux 0x1fcbacd9	scsi_target_unblock
+EXPORT_SYMBOL_GPL vmlinux 0x1fcece42	inet_twdr_twcal_tick
+EXPORT_SYMBOL_GPL vmlinux 0x1fefdae5	ring_buffer_commit_overrun_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x201601b5	ata_port_disable
+EXPORT_SYMBOL_GPL vmlinux 0x202873d4	sysdev_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x204c2d35	part_round_stats
+EXPORT_SYMBOL_GPL vmlinux 0x208bf772	cfi_cmdset_0003
+EXPORT_SYMBOL_GPL vmlinux 0x20bc3470	orderly_poweroff
+EXPORT_SYMBOL_GPL vmlinux 0x20ddf9bf	firmware_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x215b1703	__trace_note_message
+EXPORT_SYMBOL_GPL vmlinux 0x215bcbe0	klist_next
+EXPORT_SYMBOL_GPL vmlinux 0x215db6e9	tracepoint_probe_register_noupdate
+EXPORT_SYMBOL_GPL vmlinux 0x21615692	bus_sort_breadthfirst
+EXPORT_SYMBOL_GPL vmlinux 0x21ba6b49	__ip_route_output_key
+EXPORT_SYMBOL_GPL vmlinux 0x2210f2ba	task_active_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0x224f12a3	relay_switch_subbuf
+EXPORT_SYMBOL_GPL vmlinux 0x2254264e	sysdev_store_int
+EXPORT_SYMBOL_GPL vmlinux 0x227f1ffa	debugfs_create_u16
+EXPORT_SYMBOL_GPL vmlinux 0x2296c00d	crypto_attr_u32
+EXPORT_SYMBOL_GPL vmlinux 0x22a70925	bus_find_device
+EXPORT_SYMBOL_GPL vmlinux 0x22ccb60b	class_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x22e2c20b	atomic_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x230c339a	crypto_find_alg
+EXPORT_SYMBOL_GPL vmlinux 0x2359beef	pci_disable_sriov
+EXPORT_SYMBOL_GPL vmlinux 0x2362ecad	platform_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x23679939	__iowrite32_copy
+EXPORT_SYMBOL_GPL vmlinux 0x237c2a85	skcipher_geniv_free
+EXPORT_SYMBOL_GPL vmlinux 0x238165de	devres_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x23864ce7	cpuset_mem_spread_node
+EXPORT_SYMBOL_GPL vmlinux 0x23869dc7	cancel_work_sync
+EXPORT_SYMBOL_GPL vmlinux 0x238c0465	raw_unhash_sk
+EXPORT_SYMBOL_GPL vmlinux 0x23b68302	find_vpid
+EXPORT_SYMBOL_GPL vmlinux 0x23be95e0	dm_device_name
+EXPORT_SYMBOL_GPL vmlinux 0x23c5b936	get_sb_mtd
+EXPORT_SYMBOL_GPL vmlinux 0x23dfd49a	ata_pci_sff_init_one
+EXPORT_SYMBOL_GPL vmlinux 0x2409a830	screen_glyph
+EXPORT_SYMBOL_GPL vmlinux 0x241db1df	user_update
+EXPORT_SYMBOL_GPL vmlinux 0x241e61c3	driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x243b8267	inet_ctl_sock_create
+EXPORT_SYMBOL_GPL vmlinux 0x2493924a	ring_buffer_resize
+EXPORT_SYMBOL_GPL vmlinux 0x24eb7e32	leds_list
+EXPORT_SYMBOL_GPL vmlinux 0x25b3874e	seq_release_net
+EXPORT_SYMBOL_GPL vmlinux 0x25dd3d1d	ipv6_opt_accepted
+EXPORT_SYMBOL_GPL vmlinux 0x25f2d751	dm_rh_recovery_prepare
+EXPORT_SYMBOL_GPL vmlinux 0x266482bd	sata_async_notification
+EXPORT_SYMBOL_GPL vmlinux 0x2680b9ba	mnt_clone_write
+EXPORT_SYMBOL_GPL vmlinux 0x26987dfd	blkdev_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x26b1d6ff	fuse_dev_operations
+EXPORT_SYMBOL_GPL vmlinux 0x26c90ea4	scsi_eh_get_sense
+EXPORT_SYMBOL_GPL vmlinux 0x26d62830	da903x_update
+EXPORT_SYMBOL_GPL vmlinux 0x2787db00	vbin_printf
+EXPORT_SYMBOL_GPL vmlinux 0x27adf232	tracing_generic_entry_update
+EXPORT_SYMBOL_GPL vmlinux 0x27fd12c2	posix_timer_event
+EXPORT_SYMBOL_GPL vmlinux 0x283caebd	ata_cable_ignore
+EXPORT_SYMBOL_GPL vmlinux 0x286e062b	sysdev_show_ulong
+EXPORT_SYMBOL_GPL vmlinux 0x2871c05b	inet6_sk_rebuild_header
+EXPORT_SYMBOL_GPL vmlinux 0x288cbdfa	ata_sff_tf_load
+EXPORT_SYMBOL_GPL vmlinux 0x28a07236	da903x_read
+EXPORT_SYMBOL_GPL vmlinux 0x28b2cc80	atomic_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x28d664ff	__raw_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x28e23139	xfrm_probe_algs
+EXPORT_SYMBOL_GPL vmlinux 0x28f20666	rt_mutex_lock
+EXPORT_SYMBOL_GPL vmlinux 0x29adaa7a	crypto_dequeue_request
+EXPORT_SYMBOL_GPL vmlinux 0x29f1ac14	pm_runtime_idle
+EXPORT_SYMBOL_GPL vmlinux 0x29f620c0	scsi_nl_add_transport
+EXPORT_SYMBOL_GPL vmlinux 0x2a0f43a8	clockevent_delta2ns
+EXPORT_SYMBOL_GPL vmlinux 0x2a1442f4	put_pid
+EXPORT_SYMBOL_GPL vmlinux 0x2a410616	ip6_sk_dst_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x2a678a13	__suspend_report_result
+EXPORT_SYMBOL_GPL vmlinux 0x2abbef92	single_release_net
+EXPORT_SYMBOL_GPL vmlinux 0x2ac61e0f	unregister_kretprobes
+EXPORT_SYMBOL_GPL vmlinux 0x2ae548d0	inet_csk_bind_conflict
+EXPORT_SYMBOL_GPL vmlinux 0x2b02be26	__pci_reset_function
+EXPORT_SYMBOL_GPL vmlinux 0x2b1f1c03	inet6_csk_xmit
+EXPORT_SYMBOL_GPL vmlinux 0x2b582f55	page_cache_async_readahead
+EXPORT_SYMBOL_GPL vmlinux 0x2b8c3f26	pci_set_pcie_reset_state
+EXPORT_SYMBOL_GPL vmlinux 0x2b9f8e23	nf_net_ipv4_netfilter_sysctl_path
+EXPORT_SYMBOL_GPL vmlinux 0x2bd14911	blk_queue_rq_timed_out
+EXPORT_SYMBOL_GPL vmlinux 0x2bf67733	devres_remove
+EXPORT_SYMBOL_GPL vmlinux 0x2bfc4d7f	tracepoint_get_iter_range
+EXPORT_SYMBOL_GPL vmlinux 0x2c1c635d	__pci_complete_power_transition
+EXPORT_SYMBOL_GPL vmlinux 0x2c208607	power_supply_is_system_supplied
+EXPORT_SYMBOL_GPL vmlinux 0x2c7c4da9	ata_link_abort
+EXPORT_SYMBOL_GPL vmlinux 0x2c7f26c4	tcp_register_congestion_control
+EXPORT_SYMBOL_GPL vmlinux 0x2ce98559	kcrypto_wq
+EXPORT_SYMBOL_GPL vmlinux 0x2d0cd818	ahash_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0x2d314652	blk_end_request_err
+EXPORT_SYMBOL_GPL vmlinux 0x2d74c220	debugfs_create_bool
+EXPORT_SYMBOL_GPL vmlinux 0x2dd8444c	trace_seq_printf
+EXPORT_SYMBOL_GPL vmlinux 0x2de66e84	kernel_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x2deb25d1	blk_rq_err_bytes
+EXPORT_SYMBOL_GPL vmlinux 0x2e107235	fsnotify
+EXPORT_SYMBOL_GPL vmlinux 0x2e1209c7	crypto_alloc_aead
+EXPORT_SYMBOL_GPL vmlinux 0x2e3b261a	attribute_container_classdev_to_container
+EXPORT_SYMBOL_GPL vmlinux 0x2e3d08b9	crypto_chain
+EXPORT_SYMBOL_GPL vmlinux 0x2e47f677	xfrm_aalg_get_byidx
+EXPORT_SYMBOL_GPL vmlinux 0x2e4d6280	shash_free_instance
+EXPORT_SYMBOL_GPL vmlinux 0x2e611142	ring_buffer_record_enable_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x2e76ca39	dev_change_net_namespace
+EXPORT_SYMBOL_GPL vmlinux 0x2e7d3e8a	rtnl_link_register
+EXPORT_SYMBOL_GPL vmlinux 0x2ea00c05	sdio_disable_func
+EXPORT_SYMBOL_GPL vmlinux 0x2ea8cc50	sysdev_class_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x2ec50edd	__pm_runtime_put
+EXPORT_SYMBOL_GPL vmlinux 0x2efd7c83	file_ra_state_init
+EXPORT_SYMBOL_GPL vmlinux 0x2f246937	regulator_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x2f27fdd3	__module_address
+EXPORT_SYMBOL_GPL vmlinux 0x2fae1ae2	sdio_set_block_size
+EXPORT_SYMBOL_GPL vmlinux 0x2fcd9e17	dpm_resume_noirq
+EXPORT_SYMBOL_GPL vmlinux 0x2fcea969	ata_std_error_handler
+EXPORT_SYMBOL_GPL vmlinux 0x301ad50c	pm_runtime_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x304273d7	dm_rh_update_states
+EXPORT_SYMBOL_GPL vmlinux 0x306e6c9f	__mmdrop
+EXPORT_SYMBOL_GPL vmlinux 0x307cf300	device_create_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0x30a4f4ca	bstr_printf
+EXPORT_SYMBOL_GPL vmlinux 0x30b70233	dm_rh_flush
+EXPORT_SYMBOL_GPL vmlinux 0x30e6770c	put_inotify_watch
+EXPORT_SYMBOL_GPL vmlinux 0x3128507d	inotify_find_watch
+EXPORT_SYMBOL_GPL vmlinux 0x31526ceb	del_mtd_blktrans_dev
+EXPORT_SYMBOL_GPL vmlinux 0x31a07d7b	tty_prepare_flip_string_flags
+EXPORT_SYMBOL_GPL vmlinux 0x31d8db1d	class_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x32059a0a	crypto_hash_walk_first
+EXPORT_SYMBOL_GPL vmlinux 0x327338ae	crypto_unregister_ahash
+EXPORT_SYMBOL_GPL vmlinux 0x3281fc9d	get_user_pages_fast
+EXPORT_SYMBOL_GPL vmlinux 0x32829b14	blk_add_driver_data
+EXPORT_SYMBOL_GPL vmlinux 0x32b59b39	securityfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x32d5e7fc	xfrm_aalg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x32f17454	ring_buffer_event_data
+EXPORT_SYMBOL_GPL vmlinux 0x33262c67	fuse_abort_conn
+EXPORT_SYMBOL_GPL vmlinux 0x333ae26f	ata_qc_complete
+EXPORT_SYMBOL_GPL vmlinux 0x3354df2a	inotify_rm_watch
+EXPORT_SYMBOL_GPL vmlinux 0x33809cb0	dm_rh_recovery_end
+EXPORT_SYMBOL_GPL vmlinux 0x3399e5f8	ring_buffer_entries
+EXPORT_SYMBOL_GPL vmlinux 0x33dac172	regulator_get_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0x33fb5729	__blk_put_request
+EXPORT_SYMBOL_GPL vmlinux 0x34275124	trace_current_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0x3441c3d6	gpio_set_value_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x3466683d	sdio_claim_irq
+EXPORT_SYMBOL_GPL vmlinux 0x34e02f6c	inet_csk_addr2sockaddr
+EXPORT_SYMBOL_GPL vmlinux 0x3502bb46	crypto_shash_setkey
+EXPORT_SYMBOL_GPL vmlinux 0x3514aa55	ipv6_dup_options
+EXPORT_SYMBOL_GPL vmlinux 0x35349876	kern_mount_data
+EXPORT_SYMBOL_GPL vmlinux 0x35cfb192	nf_unregister_afinfo
+EXPORT_SYMBOL_GPL vmlinux 0x35d8c94a	sdev_evt_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x361e2bcc	save_stack_trace
+EXPORT_SYMBOL_GPL vmlinux 0x362e23ec	call_rcu_bh
+EXPORT_SYMBOL_GPL vmlinux 0x363157cb	sysdev_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x3677371c	__rt_mutex_init
+EXPORT_SYMBOL_GPL vmlinux 0x36846ea1	platform_get_irq_byname
+EXPORT_SYMBOL_GPL vmlinux 0x36a08832	__root_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x36ae4ca6	anon_transport_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x36bd4105	alloc_page_buffers
+EXPORT_SYMBOL_GPL vmlinux 0x372d2421	bd_release_from_disk
+EXPORT_SYMBOL_GPL vmlinux 0x3730b71e	fuse_direct_io
+EXPORT_SYMBOL_GPL vmlinux 0x3752e992	pci_unblock_user_cfg_access
+EXPORT_SYMBOL_GPL vmlinux 0x3761cdd5	ata_sff_freeze
+EXPORT_SYMBOL_GPL vmlinux 0x37ad4176	__tracepoint_block_bio_complete
+EXPORT_SYMBOL_GPL vmlinux 0x37e41008	platform_device_add_data
+EXPORT_SYMBOL_GPL vmlinux 0x384f175a	net_assign_generic
+EXPORT_SYMBOL_GPL vmlinux 0x3858697a	dm_rh_recovery_in_flight
+EXPORT_SYMBOL_GPL vmlinux 0x38a9c2c7	input_ff_effect_from_user
+EXPORT_SYMBOL_GPL vmlinux 0x390ff1d7	regulator_disable
+EXPORT_SYMBOL_GPL vmlinux 0x3910e137	blk_insert_cloned_request
+EXPORT_SYMBOL_GPL vmlinux 0x393378d9	ata_sff_wait_ready
+EXPORT_SYMBOL_GPL vmlinux 0x393e6e9a	eventfd_signal
+EXPORT_SYMBOL_GPL vmlinux 0x3946f814	ata_dev_pair
+EXPORT_SYMBOL_GPL vmlinux 0x396b7558	transport_configure_device
+EXPORT_SYMBOL_GPL vmlinux 0x396d31b4	rtc_class_close
+EXPORT_SYMBOL_GPL vmlinux 0x39819646	atomic_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x3996329e	ata_sff_error_handler
+EXPORT_SYMBOL_GPL vmlinux 0x39b233ab	fb_deferred_io_open
+EXPORT_SYMBOL_GPL vmlinux 0x3a0a1030	dm_put
+EXPORT_SYMBOL_GPL vmlinux 0x3a5a7736	tracepoint_iter_stop
+EXPORT_SYMBOL_GPL vmlinux 0x3aab337a	driver_register
+EXPORT_SYMBOL_GPL vmlinux 0x3ab17bf8	hrtimer_start
+EXPORT_SYMBOL_GPL vmlinux 0x3adb362c	eventfd_ctx_fdget
+EXPORT_SYMBOL_GPL vmlinux 0x3af230bd	ata_port_freeze
+EXPORT_SYMBOL_GPL vmlinux 0x3af74f71	device_rename
+EXPORT_SYMBOL_GPL vmlinux 0x3b15c694	crypto_shash_final
+EXPORT_SYMBOL_GPL vmlinux 0x3b9cd243	inotify_inode_is_dead
+EXPORT_SYMBOL_GPL vmlinux 0x3bc33f65	cleanup_srcu_struct
+EXPORT_SYMBOL_GPL vmlinux 0x3be7af02	get_max_files
+EXPORT_SYMBOL_GPL vmlinux 0x3c380a14	put_mtd_device
+EXPORT_SYMBOL_GPL vmlinux 0x3c486d7a	get_current_tty
+EXPORT_SYMBOL_GPL vmlinux 0x3c4ca177	__i2c_board_lock
+EXPORT_SYMBOL_GPL vmlinux 0x3c6c45ca	__tracepoint_power_frequency
+EXPORT_SYMBOL_GPL vmlinux 0x3c8b2e72	tty_encode_baud_rate
+EXPORT_SYMBOL_GPL vmlinux 0x3c942368	profile_event_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x3cd06035	add_input_randomness
+EXPORT_SYMBOL_GPL vmlinux 0x3cd97234	kill_mtd_super
+EXPORT_SYMBOL_GPL vmlinux 0x3cfdfae5	trace_current_buffer_discard_commit
+EXPORT_SYMBOL_GPL vmlinux 0x3cfe49b9	tty_prepare_flip_string
+EXPORT_SYMBOL_GPL vmlinux 0x3cfedb3f	register_pm_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x3d21a254	crypto_enqueue_request
+EXPORT_SYMBOL_GPL vmlinux 0x3d388324	dpm_resume_end
+EXPORT_SYMBOL_GPL vmlinux 0x3d7187c4	ring_buffer_iter_reset
+EXPORT_SYMBOL_GPL vmlinux 0x3da7c21a	sysfs_add_file_to_group
+EXPORT_SYMBOL_GPL vmlinux 0x3dceb955	__rtnl_register
+EXPORT_SYMBOL_GPL vmlinux 0x3dd0e1b6	ata_sas_slave_configure
+EXPORT_SYMBOL_GPL vmlinux 0x3dd4d3a7	bprintf
+EXPORT_SYMBOL_GPL vmlinux 0x3dfc8f00	__sock_recv_timestamp
+EXPORT_SYMBOL_GPL vmlinux 0x3e55d9c6	i2c_new_dummy
+EXPORT_SYMBOL_GPL vmlinux 0x3e5ca12d	ata_ehi_push_desc
+EXPORT_SYMBOL_GPL vmlinux 0x3ef7cc22	led_trigger_register
+EXPORT_SYMBOL_GPL vmlinux 0x3f01570a	probe_kernel_write
+EXPORT_SYMBOL_GPL vmlinux 0x3f1b7a42	sk_setup_caps
+EXPORT_SYMBOL_GPL vmlinux 0x3f238101	dcookie_register
+EXPORT_SYMBOL_GPL vmlinux 0x3f5c1da6	disk_get_part
+EXPORT_SYMBOL_GPL vmlinux 0x3f64d961	debugfs_create_u8
+EXPORT_SYMBOL_GPL vmlinux 0x3f6d8b6e	deregister_mtd_blktrans
+EXPORT_SYMBOL_GPL vmlinux 0x3fa8a75e	__inet_lookup_established
+EXPORT_SYMBOL_GPL vmlinux 0x3fd29f0e	devres_release_group
+EXPORT_SYMBOL_GPL vmlinux 0x3fde26b6	bus_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x40033b87	scsi_dh_set_params
+EXPORT_SYMBOL_GPL vmlinux 0x40127b0b	class_interface_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x4022b239	ahash_free_instance
+EXPORT_SYMBOL_GPL vmlinux 0x40af0dec	ata_xfer_mode2mask
+EXPORT_SYMBOL_GPL vmlinux 0x40b97e38	input_ff_upload
+EXPORT_SYMBOL_GPL vmlinux 0x40c30178	da903x_write
+EXPORT_SYMBOL_GPL vmlinux 0x4146d8cd	debugfs_create_size_t
+EXPORT_SYMBOL_GPL vmlinux 0x41d83ef1	crypto_alloc_instance2
+EXPORT_SYMBOL_GPL vmlinux 0x41df969d	user_match
+EXPORT_SYMBOL_GPL vmlinux 0x42494cea	ring_buffer_event_length
+EXPORT_SYMBOL_GPL vmlinux 0x42873aae	pci_find_next_ht_capability
+EXPORT_SYMBOL_GPL vmlinux 0x42c1d798	ata_sff_data_xfer_noirq
+EXPORT_SYMBOL_GPL vmlinux 0x42c9d8ae	d_materialise_unique
+EXPORT_SYMBOL_GPL vmlinux 0x42d6d7e7	inet_csk_get_port
+EXPORT_SYMBOL_GPL vmlinux 0x42fefd60	kobject_init_and_add
+EXPORT_SYMBOL_GPL vmlinux 0x43108ddb	disable_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0x4325b4ad	blk_lld_busy
+EXPORT_SYMBOL_GPL vmlinux 0x432fd7f6	__gpio_set_value
+EXPORT_SYMBOL_GPL vmlinux 0x438a113f	pci_enable_sriov
+EXPORT_SYMBOL_GPL vmlinux 0x438e5116	inet_csk_listen_start
+EXPORT_SYMBOL_GPL vmlinux 0x43b3bf39	platform_device_register_simple
+EXPORT_SYMBOL_GPL vmlinux 0x43c9c61f	tracepoint_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0x43d8d54c	led_trigger_register_simple
+EXPORT_SYMBOL_GPL vmlinux 0x43da657b	device_register
+EXPORT_SYMBOL_GPL vmlinux 0x43f56e82	ata_xfer_mode2shift
+EXPORT_SYMBOL_GPL vmlinux 0x44126ac7	class_compat_remove_link
+EXPORT_SYMBOL_GPL vmlinux 0x447c49b6	dma_get_required_mask
+EXPORT_SYMBOL_GPL vmlinux 0x4484a5a4	wait_for_device_probe
+EXPORT_SYMBOL_GPL vmlinux 0x449e76a3	__pm_runtime_set_status
+EXPORT_SYMBOL_GPL vmlinux 0x456f3cf5	rtnl_put_cacheinfo
+EXPORT_SYMBOL_GPL vmlinux 0x457594fa	crypto_alg_list
+EXPORT_SYMBOL_GPL vmlinux 0x457dc1a5	devres_find
+EXPORT_SYMBOL_GPL vmlinux 0x4588ad03	parse_mtd_partitions
+EXPORT_SYMBOL_GPL vmlinux 0x45ab792e	inotify_add_watch
+EXPORT_SYMBOL_GPL vmlinux 0x45bf1ff3	crypto_inc
+EXPORT_SYMBOL_GPL vmlinux 0x460eccd9	rdev_get_id
+EXPORT_SYMBOL_GPL vmlinux 0x4672e88b	__crypto_dequeue_request
+EXPORT_SYMBOL_GPL vmlinux 0x46dd7d67	tty_wakeup
+EXPORT_SYMBOL_GPL vmlinux 0x46eab828	sdio_f0_readb
+EXPORT_SYMBOL_GPL vmlinux 0x47229b5c	gpio_request
+EXPORT_SYMBOL_GPL vmlinux 0x4751ca63	debugfs_create_u64
+EXPORT_SYMBOL_GPL vmlinux 0x47695c9a	__class_register
+EXPORT_SYMBOL_GPL vmlinux 0x47888ecd	debugfs_create_dir
+EXPORT_SYMBOL_GPL vmlinux 0x47b71231	fb_deferred_io_init
+EXPORT_SYMBOL_GPL vmlinux 0x47cd4fba	tcp_set_state
+EXPORT_SYMBOL_GPL vmlinux 0x48044b36	rtc_read_time
+EXPORT_SYMBOL_GPL vmlinux 0x481e9bcc	unregister_kretprobe
+EXPORT_SYMBOL_GPL vmlinux 0x4826193a	ata_pci_remove_one
+EXPORT_SYMBOL_GPL vmlinux 0x4863259b	driver_find_device
+EXPORT_SYMBOL_GPL vmlinux 0x48e457a3	rdev_get_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0x49878df7	dm_unregister_path_selector
+EXPORT_SYMBOL_GPL vmlinux 0x499043d3	crypto_init_queue
+EXPORT_SYMBOL_GPL vmlinux 0x49ffeabd	inode_add_to_lists
+EXPORT_SYMBOL_GPL vmlinux 0x4a4db27e	vfs_test_lock
+EXPORT_SYMBOL_GPL vmlinux 0x4a548620	register_kretprobe
+EXPORT_SYMBOL_GPL vmlinux 0x4a67b130	regulator_list_voltage
+EXPORT_SYMBOL_GPL vmlinux 0x4aa84925	dm_underlying_device_busy
+EXPORT_SYMBOL_GPL vmlinux 0x4ad4fba6	inotify_dentry_parent_queue_event
+EXPORT_SYMBOL_GPL vmlinux 0x4ae4e16b	ata_port_schedule_eh
+EXPORT_SYMBOL_GPL vmlinux 0x4ae5a3e4	crypto_rng_type
+EXPORT_SYMBOL_GPL vmlinux 0x4aee44e8	get_inotify_watch
+EXPORT_SYMBOL_GPL vmlinux 0x4b0781ba	blk_trace_remove
+EXPORT_SYMBOL_GPL vmlinux 0x4b30118c	da903x_set_bits
+EXPORT_SYMBOL_GPL vmlinux 0x4b88d4b0	drop_file_write_access
+EXPORT_SYMBOL_GPL vmlinux 0x4bc920c1	bus_rescan_devices
+EXPORT_SYMBOL_GPL vmlinux 0x4bd4a279	regulator_bulk_enable
+EXPORT_SYMBOL_GPL vmlinux 0x4bdbbbdd	cpuidle_enable_device
+EXPORT_SYMBOL_GPL vmlinux 0x4be2118c	regulator_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x4c3f7079	ata_host_detach
+EXPORT_SYMBOL_GPL vmlinux 0x4c759827	byte_rev_table
+EXPORT_SYMBOL_GPL vmlinux 0x4c848371	tcp_orphan_count
+EXPORT_SYMBOL_GPL vmlinux 0x4c889200	cpuidle_disable_device
+EXPORT_SYMBOL_GPL vmlinux 0x4c8c3a12	debugfs_create_x8
+EXPORT_SYMBOL_GPL vmlinux 0x4c98d4b8	inet_csk_reqsk_queue_prune
+EXPORT_SYMBOL_GPL vmlinux 0x4cb9c842	inet_diag_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x4d1f052c	__module_text_address
+EXPORT_SYMBOL_GPL vmlinux 0x4d4be508	rtc_update_irq_enable
+EXPORT_SYMBOL_GPL vmlinux 0x4d8f4c15	klist_add_before
+EXPORT_SYMBOL_GPL vmlinux 0x4dc513fd	scsi_dh_attach
+EXPORT_SYMBOL_GPL vmlinux 0x4e11415a	add_page_wait_queue
+EXPORT_SYMBOL_GPL vmlinux 0x4ed08e8d	crypto_drop_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x4f6ab79e	ring_buffer_reset_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x4fdc945d	sata_deb_timing_normal
+EXPORT_SYMBOL_GPL vmlinux 0x4fe08422	attribute_container_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x4fe49e75	blkcipher_walk_done
+EXPORT_SYMBOL_GPL vmlinux 0x5086ac3a	alg_test
+EXPORT_SYMBOL_GPL vmlinux 0x50e7193a	__i2c_first_dynamic_bus_num
+EXPORT_SYMBOL_GPL vmlinux 0x50f5e532	call_rcu_sched
+EXPORT_SYMBOL_GPL vmlinux 0x50fad434	round_jiffies_up
+EXPORT_SYMBOL_GPL vmlinux 0x5109aead	ip6_local_out
+EXPORT_SYMBOL_GPL vmlinux 0x51347d59	transport_class_register
+EXPORT_SYMBOL_GPL vmlinux 0x520309dd	__fsnotify_parent
+EXPORT_SYMBOL_GPL vmlinux 0x5217f2c7	da903x_reads
+EXPORT_SYMBOL_GPL vmlinux 0x521c4dd3	pci_find_next_capability
+EXPORT_SYMBOL_GPL vmlinux 0x524b2b42	sata_scr_write
+EXPORT_SYMBOL_GPL vmlinux 0x5279f521	skb_icv_walk
+EXPORT_SYMBOL_GPL vmlinux 0x52b8d49d	vfs_cancel_lock
+EXPORT_SYMBOL_GPL vmlinux 0x52d111ea	pm_qos_update_requirement
+EXPORT_SYMBOL_GPL vmlinux 0x52f9ba01	disk_part_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0x5326b6f2	sysdev_store_ulong
+EXPORT_SYMBOL_GPL vmlinux 0x5348a7a0	ata_bmdma_stop
+EXPORT_SYMBOL_GPL vmlinux 0x5384d780	dm_region_hash_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x53919352	eventfd_ctx_fileget
+EXPORT_SYMBOL_GPL vmlinux 0x53986488	register_die_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5415375a	crypto_init_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x542a37d8	platform_device_add_resources
+EXPORT_SYMBOL_GPL vmlinux 0x5449d317	regulator_get_mode
+EXPORT_SYMBOL_GPL vmlinux 0x5460c8d8	fsnotify_get_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x549525ef	handle_nested_irq
+EXPORT_SYMBOL_GPL vmlinux 0x54f4e1aa	register_mtd_parser
+EXPORT_SYMBOL_GPL vmlinux 0x551d8d2f	hrtimer_get_remaining
+EXPORT_SYMBOL_GPL vmlinux 0x553dffc4	register_net_sysctl_table
+EXPORT_SYMBOL_GPL vmlinux 0x5542b913	cpu_bit_bitmap
+EXPORT_SYMBOL_GPL vmlinux 0x55858c4e	ata_pci_sff_prepare_host
+EXPORT_SYMBOL_GPL vmlinux 0x55b1e7e1	synchronize_srcu
+EXPORT_SYMBOL_GPL vmlinux 0x55d733ca	skb_pull_rcsum
+EXPORT_SYMBOL_GPL vmlinux 0x5619c8c6	scsi_nl_add_driver
+EXPORT_SYMBOL_GPL vmlinux 0x56310925	regulator_mode_to_status
+EXPORT_SYMBOL_GPL vmlinux 0x563fb5c8	__trace_bprintk
+EXPORT_SYMBOL_GPL vmlinux 0x5641485b	tty_termios_encode_baud_rate
+EXPORT_SYMBOL_GPL vmlinux 0x56966617	cpuidle_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0x56bd6eef	ata_sff_irq_clear
+EXPORT_SYMBOL_GPL vmlinux 0x56c1b115	fuse_request_send_background
+EXPORT_SYMBOL_GPL vmlinux 0x56d42418	thread_notify_head
+EXPORT_SYMBOL_GPL vmlinux 0x56d88e69	crypto_mod_put
+EXPORT_SYMBOL_GPL vmlinux 0x56e23078	fuse_conn_kill
+EXPORT_SYMBOL_GPL vmlinux 0x5752c65c	ata_do_eh
+EXPORT_SYMBOL_GPL vmlinux 0x579e0bf5	rtnl_unregister_all
+EXPORT_SYMBOL_GPL vmlinux 0x58157640	scatterwalk_map
+EXPORT_SYMBOL_GPL vmlinux 0x581d0c04	regulator_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x58cd1179	rtc_set_mmss
+EXPORT_SYMBOL_GPL vmlinux 0x58d284ad	led_trigger_unregister_simple
+EXPORT_SYMBOL_GPL vmlinux 0x5931f175	__scsi_get_command
+EXPORT_SYMBOL_GPL vmlinux 0x593a36c2	scsi_dh_handler_exist
+EXPORT_SYMBOL_GPL vmlinux 0x595cc3dc	inet_diag_register
+EXPORT_SYMBOL_GPL vmlinux 0x59ca3224	inet_twdr_twkill_work
+EXPORT_SYMBOL_GPL vmlinux 0x5a15c2af	uart_console_write
+EXPORT_SYMBOL_GPL vmlinux 0x5a48f457	ring_buffer_free_read_page
+EXPORT_SYMBOL_GPL vmlinux 0x5a543d32	inet_hashinfo_init
+EXPORT_SYMBOL_GPL vmlinux 0x5a5e7797	add_mtd_device
+EXPORT_SYMBOL_GPL vmlinux 0x5a7bfe41	crypto_probing_notify
+EXPORT_SYMBOL_GPL vmlinux 0x5a7c8e1a	dm_rh_dirty_log
+EXPORT_SYMBOL_GPL vmlinux 0x5ac74803	dm_noflush_suspending
+EXPORT_SYMBOL_GPL vmlinux 0x5acf2882	bus_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x5aeb7d93	tcp_get_info
+EXPORT_SYMBOL_GPL vmlinux 0x5b34494d	da903x_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5b8ba6df	devres_open_group
+EXPORT_SYMBOL_GPL vmlinux 0x5bfc03c3	unregister_keyboard_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5c5f17e2	ring_buffer_reset
+EXPORT_SYMBOL_GPL vmlinux 0x5c89dd89	tty_ldisc_ref
+EXPORT_SYMBOL_GPL vmlinux 0x5cec0157	led_trigger_show
+EXPORT_SYMBOL_GPL vmlinux 0x5d0f6f57	kbd_table
+EXPORT_SYMBOL_GPL vmlinux 0x5d19f076	class_find_device
+EXPORT_SYMBOL_GPL vmlinux 0x5d22fd55	ata_sff_prereset
+EXPORT_SYMBOL_GPL vmlinux 0x5d455509	sysfs_create_group
+EXPORT_SYMBOL_GPL vmlinux 0x5d4a4572	ktime_sub_ns
+EXPORT_SYMBOL_GPL vmlinux 0x5d51c295	regulator_bulk_disable
+EXPORT_SYMBOL_GPL vmlinux 0x5d52ae36	do_kern_mount
+EXPORT_SYMBOL_GPL vmlinux 0x5d695a65	inotify_init
+EXPORT_SYMBOL_GPL vmlinux 0x5d730e7b	raw_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x5d754bd1	crypto_shoot_alg
+EXPORT_SYMBOL_GPL vmlinux 0x5dd67618	register_netevent_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5de7abd8	ahash_attr_alg
+EXPORT_SYMBOL_GPL vmlinux 0x5df8b4f3	power_supply_changed
+EXPORT_SYMBOL_GPL vmlinux 0x5e1a84b8	rtc_read_alarm
+EXPORT_SYMBOL_GPL vmlinux 0x5e787b27	tasklet_hrtimer_init
+EXPORT_SYMBOL_GPL vmlinux 0x5e940cd3	ata_eh_qc_complete
+EXPORT_SYMBOL_GPL vmlinux 0x5ed612c0	ip_route_output_flow
+EXPORT_SYMBOL_GPL vmlinux 0x5f1cced5	scatterwalk_start
+EXPORT_SYMBOL_GPL vmlinux 0x5f3416e8	inet_unhash
+EXPORT_SYMBOL_GPL vmlinux 0x5f387f6b	dev_set_name
+EXPORT_SYMBOL_GPL vmlinux 0x5f9623ec	ata_do_dev_read_id
+EXPORT_SYMBOL_GPL vmlinux 0x5fb3a523	rtc_alarm_irq_enable
+EXPORT_SYMBOL_GPL vmlinux 0x5fcc1c94	regulator_get
+EXPORT_SYMBOL_GPL vmlinux 0x5fcd39f2	crypto_register_template
+EXPORT_SYMBOL_GPL vmlinux 0x5fcdec5d	xfrm_ealg_get_byidx
+EXPORT_SYMBOL_GPL vmlinux 0x600d3f4f	inotify_init_watch
+EXPORT_SYMBOL_GPL vmlinux 0x60668857	transport_remove_device
+EXPORT_SYMBOL_GPL vmlinux 0x6077686f	rt_mutex_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x60a13e90	rcu_barrier
+EXPORT_SYMBOL_GPL vmlinux 0x61150930	ata_sff_softreset
+EXPORT_SYMBOL_GPL vmlinux 0x615346e2	__inet_lookup_listener
+EXPORT_SYMBOL_GPL vmlinux 0x615e41f2	sdio_memcpy_toio
+EXPORT_SYMBOL_GPL vmlinux 0x6172b469	tty_buffer_request_room
+EXPORT_SYMBOL_GPL vmlinux 0x61a0005c	ata_pio_need_iordy
+EXPORT_SYMBOL_GPL vmlinux 0x61c8ea20	raw_seq_start
+EXPORT_SYMBOL_GPL vmlinux 0x61e23a07	ata_cable_80wire
+EXPORT_SYMBOL_GPL vmlinux 0x622b235f	ata_pci_bmdma_clear_simplex
+EXPORT_SYMBOL_GPL vmlinux 0x622b3e2c	srcu_read_lock
+EXPORT_SYMBOL_GPL vmlinux 0x629a7f6e	do_posix_clock_nonanosleep
+EXPORT_SYMBOL_GPL vmlinux 0x62cf655e	dm_dispatch_request
+EXPORT_SYMBOL_GPL vmlinux 0x631bb094	dm_rh_mark_nosync
+EXPORT_SYMBOL_GPL vmlinux 0x631cf71e	kobject_get_path
+EXPORT_SYMBOL_GPL vmlinux 0x638c65cd	input_class
+EXPORT_SYMBOL_GPL vmlinux 0x63be58a6	remove_irq
+EXPORT_SYMBOL_GPL vmlinux 0x63f22fb1	crypto_alloc_ahash
+EXPORT_SYMBOL_GPL vmlinux 0x6430a86f	dm_send_uevents
+EXPORT_SYMBOL_GPL vmlinux 0x649e9592	klist_init
+EXPORT_SYMBOL_GPL vmlinux 0x64fce0f9	aead_geniv_free
+EXPORT_SYMBOL_GPL vmlinux 0x656ea05f	inet_twsk_schedule
+EXPORT_SYMBOL_GPL vmlinux 0x65ccb6f0	call_netevent_notifiers
+EXPORT_SYMBOL_GPL vmlinux 0x65d6d0f0	gpio_direction_input
+EXPORT_SYMBOL_GPL vmlinux 0x65e2a655	disk_part_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0x65e83590	inet_hash_connect
+EXPORT_SYMBOL_GPL vmlinux 0x661601de	sprint_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x668402aa	crypto_put_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x66b2a859	nr_free_buffer_pages
+EXPORT_SYMBOL_GPL vmlinux 0x66d87d38	symbol_put_addr
+EXPORT_SYMBOL_GPL vmlinux 0x66da735c	tty_put_char
+EXPORT_SYMBOL_GPL vmlinux 0x66f43953	simple_attr_release
+EXPORT_SYMBOL_GPL vmlinux 0x66f5b2e0	sdio_writesb
+EXPORT_SYMBOL_GPL vmlinux 0x67124029	sata_std_hardreset
+EXPORT_SYMBOL_GPL vmlinux 0x675b1831	sysdev_driver_register
+EXPORT_SYMBOL_GPL vmlinux 0x67955ce6	profile_hits
+EXPORT_SYMBOL_GPL vmlinux 0x67afee17	input_ff_event
+EXPORT_SYMBOL_GPL vmlinux 0x67d5915f	sysdev_class_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x67d9ef27	driver_add_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x67f203c8	ata_qc_complete_multiple
+EXPORT_SYMBOL_GPL vmlinux 0x680fe947	ata_ehi_clear_desc
+EXPORT_SYMBOL_GPL vmlinux 0x68225a03	sdio_claim_host
+EXPORT_SYMBOL_GPL vmlinux 0x683b25f6	fsstack_copy_attr_all
+EXPORT_SYMBOL_GPL vmlinux 0x683d5869	get_dcookie
+EXPORT_SYMBOL_GPL vmlinux 0x685c5de4	crypto_alloc_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0x686c703f	xfrm_count_auth_supported
+EXPORT_SYMBOL_GPL vmlinux 0x6892088c	unregister_pm_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x6897de4c	inet_twsk_put
+EXPORT_SYMBOL_GPL vmlinux 0x6901119a	trace_nowake_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0x6911bdbc	user_instantiate
+EXPORT_SYMBOL_GPL vmlinux 0x692f5c47	ata_bmdma_status
+EXPORT_SYMBOL_GPL vmlinux 0x695d79b3	fuse_sync_release
+EXPORT_SYMBOL_GPL vmlinux 0x6994cd30	device_bind_driver
+EXPORT_SYMBOL_GPL vmlinux 0x69ae2127	get_mtd_device_nm
+EXPORT_SYMBOL_GPL vmlinux 0x69da8136	tcp_is_cwnd_limited
+EXPORT_SYMBOL_GPL vmlinux 0x69e9a2cb	ata_scsi_slave_config
+EXPORT_SYMBOL_GPL vmlinux 0x6a48ab9e	__rtnl_link_register
+EXPORT_SYMBOL_GPL vmlinux 0x6a5fb821	scsi_unregister_device_handler
+EXPORT_SYMBOL_GPL vmlinux 0x6a6a7113	sysfs_remove_file_from_group
+EXPORT_SYMBOL_GPL vmlinux 0x6a941275	hrtimer_init_sleeper
+EXPORT_SYMBOL_GPL vmlinux 0x6aa4f8b6	platform_device_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x6ab0a014	sysdev_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x6ab76f06	crypto_shash_update
+EXPORT_SYMBOL_GPL vmlinux 0x6ada04a5	lookup_instantiate_filp
+EXPORT_SYMBOL_GPL vmlinux 0x6adc3245	i2c_add_numbered_adapter
+EXPORT_SYMBOL_GPL vmlinux 0x6c2a0d9b	regulator_set_optimum_mode
+EXPORT_SYMBOL_GPL vmlinux 0x6c49c4f2	clockevents_notify
+EXPORT_SYMBOL_GPL vmlinux 0x6c8d5ae8	__gpio_get_value
+EXPORT_SYMBOL_GPL vmlinux 0x6c8eb98f	xfrm_aalg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0x6c922418	fixed_phy_set_link_update
+EXPORT_SYMBOL_GPL vmlinux 0x6ce08c3d	debugfs_create_u32
+EXPORT_SYMBOL_GPL vmlinux 0x6ce41874	inet6_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x6d2fc5a6	net_namespace_list
+EXPORT_SYMBOL_GPL vmlinux 0x6d3a59fb	crypto_unregister_template
+EXPORT_SYMBOL_GPL vmlinux 0x6d4ae3ab	tty_ldisc_ref_wait
+EXPORT_SYMBOL_GPL vmlinux 0x6d50e282	ring_buffer_iter_empty
+EXPORT_SYMBOL_GPL vmlinux 0x6d615808	relay_file_operations
+EXPORT_SYMBOL_GPL vmlinux 0x6d6da22d	shmem_file_setup
+EXPORT_SYMBOL_GPL vmlinux 0x6da7dda4	scsi_schedule_eh
+EXPORT_SYMBOL_GPL vmlinux 0x6dc8ad1b	ata_host_resume
+EXPORT_SYMBOL_GPL vmlinux 0x6e1024dc	bd_claim_by_disk
+EXPORT_SYMBOL_GPL vmlinux 0x6e1a5ef5	sis_info133_for_sata
+EXPORT_SYMBOL_GPL vmlinux 0x6e63f648	crypto_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0x6e6a3de1	generic_fh_to_dentry
+EXPORT_SYMBOL_GPL vmlinux 0x6e7474fc	xfrm_ealg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x6ee2a94f	platform_add_devices
+EXPORT_SYMBOL_GPL vmlinux 0x6f03a075	platform_bus
+EXPORT_SYMBOL_GPL vmlinux 0x6f4113aa	bus_for_each_drv
+EXPORT_SYMBOL_GPL vmlinux 0x6ff607b6	crypto_get_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x7019a40b	ata_cable_sata
+EXPORT_SYMBOL_GPL vmlinux 0x7033980a	regulator_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x7033a466	ring_buffer_normalize_time_stamp
+EXPORT_SYMBOL_GPL vmlinux 0x707ff1bb	ata_xfer_mask2mode
+EXPORT_SYMBOL_GPL vmlinux 0x70d60cf0	user_describe
+EXPORT_SYMBOL_GPL vmlinux 0x71063b40	ata_sff_wait_after_reset
+EXPORT_SYMBOL_GPL vmlinux 0x7141ac42	pci_intx
+EXPORT_SYMBOL_GPL vmlinux 0x71424bac	driver_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x71586ac7	ipv6_find_tlv
+EXPORT_SYMBOL_GPL vmlinux 0x716265c7	debugfs_initialized
+EXPORT_SYMBOL_GPL vmlinux 0x7169eeda	ata_link_offline
+EXPORT_SYMBOL_GPL vmlinux 0x7193ace6	i2c_new_device
+EXPORT_SYMBOL_GPL vmlinux 0x71be7335	bus_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x71c8bc95	kgdb_unregister_io_module
+EXPORT_SYMBOL_GPL vmlinux 0x71f2aeb3	fs_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x71f9246a	leds_list_lock
+EXPORT_SYMBOL_GPL vmlinux 0x71fa3af5	default_mtd_writev
+EXPORT_SYMBOL_GPL vmlinux 0x720d1bf9	regulator_put
+EXPORT_SYMBOL_GPL vmlinux 0x7222fe91	ata_sff_dev_select
+EXPORT_SYMBOL_GPL vmlinux 0x72741f25	trace_vbprintk
+EXPORT_SYMBOL_GPL vmlinux 0x7278d328	all_vm_events
+EXPORT_SYMBOL_GPL vmlinux 0x729ba9c8	ip_build_and_send_pkt
+EXPORT_SYMBOL_GPL vmlinux 0x72ca215c	ata_sff_exec_command
+EXPORT_SYMBOL_GPL vmlinux 0x73114c02	rt_mutex_lock_interruptible
+EXPORT_SYMBOL_GPL vmlinux 0x732ec1f2	pci_msi_off
+EXPORT_SYMBOL_GPL vmlinux 0x73a48b4a	ata_sff_std_ports
+EXPORT_SYMBOL_GPL vmlinux 0x7406b339	shash_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0x743a165e	ata_pack_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0x7455e389	pci_block_user_cfg_access
+EXPORT_SYMBOL_GPL vmlinux 0x748f91ab	da903x_clr_bits
+EXPORT_SYMBOL_GPL vmlinux 0x74abdafa	task_handoff_register
+EXPORT_SYMBOL_GPL vmlinux 0x74aecc04	kill_pid_info_as_uid
+EXPORT_SYMBOL_GPL vmlinux 0x74baf17a	tracing_is_on
+EXPORT_SYMBOL_GPL vmlinux 0x75240f23	class_dev_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0x753ebc18	regulator_force_disable
+EXPORT_SYMBOL_GPL vmlinux 0x754337c8	set_task_ioprio
+EXPORT_SYMBOL_GPL vmlinux 0x755efe14	hrtimer_forward
+EXPORT_SYMBOL_GPL vmlinux 0x75e8f3c3	crypto_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x761188fd	dpm_suspend_noirq
+EXPORT_SYMBOL_GPL vmlinux 0x761237c2	blk_queue_lld_busy
+EXPORT_SYMBOL_GPL vmlinux 0x7649be08	regulator_count_voltages
+EXPORT_SYMBOL_GPL vmlinux 0x767b26c2	fuse_file_poll
+EXPORT_SYMBOL_GPL vmlinux 0x76a5b7ec	crypto_larval_kill
+EXPORT_SYMBOL_GPL vmlinux 0x76cff3e3	device_schedule_callback_owner
+EXPORT_SYMBOL_GPL vmlinux 0x76dea4ca	scsi_eh_ready_devs
+EXPORT_SYMBOL_GPL vmlinux 0x7704bdcf	relay_close
+EXPORT_SYMBOL_GPL vmlinux 0x77199f61	sysdev_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x773ca527	init_uts_ns
+EXPORT_SYMBOL_GPL vmlinux 0x77a0073e	sdio_readsb
+EXPORT_SYMBOL_GPL vmlinux 0x781acb7a	__ring_buffer_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x78324ad8	ata_sff_tf_read
+EXPORT_SYMBOL_GPL vmlinux 0x783efacf	ata_host_start
+EXPORT_SYMBOL_GPL vmlinux 0x7868fa4b	pci_renumber_slot
+EXPORT_SYMBOL_GPL vmlinux 0x786e88f5	netlink_has_listeners
+EXPORT_SYMBOL_GPL vmlinux 0x78970809	crypto_ablkcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0x78af7c8f	init_srcu_struct
+EXPORT_SYMBOL_GPL vmlinux 0x78c16bd4	crypto_shash_finup
+EXPORT_SYMBOL_GPL vmlinux 0x78e4a4ee	klist_add_after
+EXPORT_SYMBOL_GPL vmlinux 0x78f0f82a	blkcipher_walk_virt
+EXPORT_SYMBOL_GPL vmlinux 0x7924ed63	class_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x793e5501	sdev_evt_send
+EXPORT_SYMBOL_GPL vmlinux 0x793f5cf0	device_add
+EXPORT_SYMBOL_GPL vmlinux 0x7944e0fc	tracing_off
+EXPORT_SYMBOL_GPL vmlinux 0x7948d109	srcu_read_unlock
+EXPORT_SYMBOL_GPL vmlinux 0x79546a3d	rtnl_kill_links
+EXPORT_SYMBOL_GPL vmlinux 0x79dd5ec0	ring_buffer_peek
+EXPORT_SYMBOL_GPL vmlinux 0x7a14eee9	pci_slots_kset
+EXPORT_SYMBOL_GPL vmlinux 0x7a604bff	dm_rh_get_region_size
+EXPORT_SYMBOL_GPL vmlinux 0x7a703c5b	elv_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x7a78b670	mnt_want_write
+EXPORT_SYMBOL_GPL vmlinux 0x7ac05a87	tcp_reno_ssthresh
+EXPORT_SYMBOL_GPL vmlinux 0x7af68cfc	ata_std_postreset
+EXPORT_SYMBOL_GPL vmlinux 0x7b133668	ata_pci_device_do_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x7b34f7d0	pci_scan_child_bus
+EXPORT_SYMBOL_GPL vmlinux 0x7b398cab	platform_device_add
+EXPORT_SYMBOL_GPL vmlinux 0x7b3d39f9	raw_seq_stop
+EXPORT_SYMBOL_GPL vmlinux 0x7b4884b4	ata_sff_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x7b5ec9ac	pci_enable_rom
+EXPORT_SYMBOL_GPL vmlinux 0x7c2eb9f7	ring_buffer_free
+EXPORT_SYMBOL_GPL vmlinux 0x7c595934	ring_buffer_alloc_read_page
+EXPORT_SYMBOL_GPL vmlinux 0x7c6784ef	ktime_get_real
+EXPORT_SYMBOL_GPL vmlinux 0x7dab8911	input_ff_create
+EXPORT_SYMBOL_GPL vmlinux 0x7dc5d0b6	crypto_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x7dd240be	tcp_init_congestion_ops
+EXPORT_SYMBOL_GPL vmlinux 0x7e1183c9	async_schedule
+EXPORT_SYMBOL_GPL vmlinux 0x7e275ea8	scsi_complete_async_scans
+EXPORT_SYMBOL_GPL vmlinux 0x7e6f51f7	skb_segment
+EXPORT_SYMBOL_GPL vmlinux 0x7e981b83	inet_twsk_purge
+EXPORT_SYMBOL_GPL vmlinux 0x7e9f1181	ata_host_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x7ebd2045	trace_define_field
+EXPORT_SYMBOL_GPL vmlinux 0x7ebf81bc	security_inode_mkdir
+EXPORT_SYMBOL_GPL vmlinux 0x7edd76c2	tty_ldisc_flush
+EXPORT_SYMBOL_GPL vmlinux 0x7ee2cf15	crypto_ahash_digest
+EXPORT_SYMBOL_GPL vmlinux 0x7eef4ba0	fuse_request_send
+EXPORT_SYMBOL_GPL vmlinux 0x7f0448b4	dev_attr_link_power_management_policy
+EXPORT_SYMBOL_GPL vmlinux 0x7f474966	fuse_conn_init
+EXPORT_SYMBOL_GPL vmlinux 0x7fbfa401	rtc_set_time
+EXPORT_SYMBOL_GPL vmlinux 0x7ff10ccf	raw_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x8014b6af	input_event_from_user
+EXPORT_SYMBOL_GPL vmlinux 0x8033bb17	led_trigger_event
+EXPORT_SYMBOL_GPL vmlinux 0x8039d043	selinux_secmark_relabel_packet_permission
+EXPORT_SYMBOL_GPL vmlinux 0x808ec1a3	crypto_alg_tested
+EXPORT_SYMBOL_GPL vmlinux 0x80c55238	unregister_mtd_user
+EXPORT_SYMBOL_GPL vmlinux 0x80ee55c3	selinux_secmark_refcount_inc
+EXPORT_SYMBOL_GPL vmlinux 0x811b22d3	scsi_internal_device_unblock
+EXPORT_SYMBOL_GPL vmlinux 0x813558af	zap_vma_ptes
+EXPORT_SYMBOL_GPL vmlinux 0x813ea8cd	inotify_remove_watch_locked
+EXPORT_SYMBOL_GPL vmlinux 0x8141860a	bus_for_each_dev
+EXPORT_SYMBOL_GPL vmlinux 0x8146251b	__pm_runtime_get
+EXPORT_SYMBOL_GPL vmlinux 0x8149ea54	ata_timing_find_mode
+EXPORT_SYMBOL_GPL vmlinux 0x81dded66	register_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0x820555b2	tty_find_polling_driver
+EXPORT_SYMBOL_GPL vmlinux 0x8226642f	__gpio_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x8227e990	fuse_conn_get
+EXPORT_SYMBOL_GPL vmlinux 0x82939ebd	rcu_batches_completed_sched
+EXPORT_SYMBOL_GPL vmlinux 0x82c34125	ata_eh_qc_retry
+EXPORT_SYMBOL_GPL vmlinux 0x82d0313a	ata_pio_queue_task
+EXPORT_SYMBOL_GPL vmlinux 0x82d79b51	sysctl_vfs_cache_pressure
+EXPORT_SYMBOL_GPL vmlinux 0x82e4eba6	skcipher_geniv_init
+EXPORT_SYMBOL_GPL vmlinux 0x82f776b7	gpio_export
+EXPORT_SYMBOL_GPL vmlinux 0x834926cd	pci_find_ht_capability
+EXPORT_SYMBOL_GPL vmlinux 0x83553786	scatterwalk_copychunks
+EXPORT_SYMBOL_GPL vmlinux 0x836d2cc9	__blocking_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x8377f7ca	mnt_drop_write
+EXPORT_SYMBOL_GPL vmlinux 0x83892cf0	tracepoint_iter_reset
+EXPORT_SYMBOL_GPL vmlinux 0x83b6014a	ring_buffer_size
+EXPORT_SYMBOL_GPL vmlinux 0x83b7fa72	tty_mode_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x8412e3c5	srcu_batches_completed
+EXPORT_SYMBOL_GPL vmlinux 0x8444c619	sdio_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0x848086e8	device_for_each_child
+EXPORT_SYMBOL_GPL vmlinux 0x848ddd59	device_release_driver
+EXPORT_SYMBOL_GPL vmlinux 0x84d6cf68	gpiochip_is_requested
+EXPORT_SYMBOL_GPL vmlinux 0x84e7eaaf	dm_rh_recovery_start
+EXPORT_SYMBOL_GPL vmlinux 0x851fbc43	inotify_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x8536f971	anon_inode_getfd
+EXPORT_SYMBOL_GPL vmlinux 0x85478a0b	inet6_hash_frag
+EXPORT_SYMBOL_GPL vmlinux 0x85521819	ata_pci_device_resume
+EXPORT_SYMBOL_GPL vmlinux 0x855c3290	sdio_readl
+EXPORT_SYMBOL_GPL vmlinux 0x857e9b6d	mtd_erase_callback
+EXPORT_SYMBOL_GPL vmlinux 0x859714fc	crypto_grab_skcipher
+EXPORT_SYMBOL_GPL vmlinux 0x85bbba00	ata_host_init
+EXPORT_SYMBOL_GPL vmlinux 0x85c10896	rcu_batches_completed_bh
+EXPORT_SYMBOL_GPL vmlinux 0x860b9b02	handle_level_irq
+EXPORT_SYMBOL_GPL vmlinux 0x864a1baa	__inet_inherit_port
+EXPORT_SYMBOL_GPL vmlinux 0x865ddb2f	ring_buffer_swap_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x86875836	driver_for_each_device
+EXPORT_SYMBOL_GPL vmlinux 0x868784cb	__symbol_get
+EXPORT_SYMBOL_GPL vmlinux 0x86b1667d	hwrng_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x86ce34e1	sysdev_driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x86f6b99d	synchronize_rcu_expedited
+EXPORT_SYMBOL_GPL vmlinux 0x86ff1104	crypto_spawn_tfm2
+EXPORT_SYMBOL_GPL vmlinux 0x873642f3	attribute_container_register
+EXPORT_SYMBOL_GPL vmlinux 0x8736e4b6	skb_partial_csum_set
+EXPORT_SYMBOL_GPL vmlinux 0x875f0349	ata_sas_port_init
+EXPORT_SYMBOL_GPL vmlinux 0x87754115	raw_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x87766cb2	cfi_qry_mode_off
+EXPORT_SYMBOL_GPL vmlinux 0x87804d15	tcp_unregister_congestion_control
+EXPORT_SYMBOL_GPL vmlinux 0x87ac1bc6	klist_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0x87b32ba3	ata_bmdma_setup
+EXPORT_SYMBOL_GPL vmlinux 0x8810ad5e	crypto_xor
+EXPORT_SYMBOL_GPL vmlinux 0x8846902f	inotify_inode_queue_event
+EXPORT_SYMBOL_GPL vmlinux 0x8850c7d5	transport_destroy_device
+EXPORT_SYMBOL_GPL vmlinux 0x885142a6	nf_net_netfilter_sysctl_path
+EXPORT_SYMBOL_GPL vmlinux 0x88558b82	get_device
+EXPORT_SYMBOL_GPL vmlinux 0x88566529	queue_work_on
+EXPORT_SYMBOL_GPL vmlinux 0x88ad8e34	page_mkclean
+EXPORT_SYMBOL_GPL vmlinux 0x88c6dbe4	crypto_tfm_in_queue
+EXPORT_SYMBOL_GPL vmlinux 0x8926e70b	crypto_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x892d47b4	tracepoint_iter_start
+EXPORT_SYMBOL_GPL vmlinux 0x8935816f	user_read
+EXPORT_SYMBOL_GPL vmlinux 0x896162ff	fib_rules_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x896c712c	platform_device_del
+EXPORT_SYMBOL_GPL vmlinux 0x8a30c374	da903x_writes
+EXPORT_SYMBOL_GPL vmlinux 0x8a73f634	queue_work
+EXPORT_SYMBOL_GPL vmlinux 0x8a95326a	kmem_cache_name
+EXPORT_SYMBOL_GPL vmlinux 0x8b752ac1	ata_tf_to_fis
+EXPORT_SYMBOL_GPL vmlinux 0x8c5d9086	sync_page_io
+EXPORT_SYMBOL_GPL vmlinux 0x8c840138	ata_sas_port_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x8c8c470e	regulator_set_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0x8ca37080	crypto_init_spawn2
+EXPORT_SYMBOL_GPL vmlinux 0x8ca3fb7c	get_mtd_device
+EXPORT_SYMBOL_GPL vmlinux 0x8cc69fcd	dm_path_uevent
+EXPORT_SYMBOL_GPL vmlinux 0x8cccc9c0	ata_sff_postreset
+EXPORT_SYMBOL_GPL vmlinux 0x8cee00ec	ata_port_pbar_desc
+EXPORT_SYMBOL_GPL vmlinux 0x8d033df4	klist_node_attached
+EXPORT_SYMBOL_GPL vmlinux 0x8d20bd1c	scsi_internal_device_block
+EXPORT_SYMBOL_GPL vmlinux 0x8d217692	sata_link_hardreset
+EXPORT_SYMBOL_GPL vmlinux 0x8dff0c86	filter_current_check_discard
+EXPORT_SYMBOL_GPL vmlinux 0x8e15a0d7	crypto_attr_alg2
+EXPORT_SYMBOL_GPL vmlinux 0x8e408015	sata_pmp_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x8e6e52d3	ata_sff_host_intr
+EXPORT_SYMBOL_GPL vmlinux 0x8e7a7eab	sock_prot_inuse_add
+EXPORT_SYMBOL_GPL vmlinux 0x8e87181f	ata_sff_dumb_qc_prep
+EXPORT_SYMBOL_GPL vmlinux 0x8ee7ee50	blkcipher_walk_phys
+EXPORT_SYMBOL_GPL vmlinux 0x8f5ff02d	pci_disable_rom
+EXPORT_SYMBOL_GPL vmlinux 0x8f64f15a	device_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x8f6a8bcc	hrtimer_start_range_ns
+EXPORT_SYMBOL_GPL vmlinux 0x8f6cee77	__round_jiffies_relative
+EXPORT_SYMBOL_GPL vmlinux 0x8f976992	crypto_ahash_type
+EXPORT_SYMBOL_GPL vmlinux 0x8fa4fa68	inet_csk_clone
+EXPORT_SYMBOL_GPL vmlinux 0x8fa74514	sysdev_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x901f137b	regulator_bulk_get
+EXPORT_SYMBOL_GPL vmlinux 0x90337ef4	ata_sff_irq_on
+EXPORT_SYMBOL_GPL vmlinux 0x906aef54	flush_workqueue
+EXPORT_SYMBOL_GPL vmlinux 0x90a1004a	crypto_has_alg
+EXPORT_SYMBOL_GPL vmlinux 0x90adad13	use_module
+EXPORT_SYMBOL_GPL vmlinux 0x90df51c7	input_ff_erase
+EXPORT_SYMBOL_GPL vmlinux 0x9138e3b0	sysfs_get
+EXPORT_SYMBOL_GPL vmlinux 0x9159b9d6	profile_event_register
+EXPORT_SYMBOL_GPL vmlinux 0x9170bbf3	bus_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x91b5727b	ata_host_alloc_pinfo
+EXPORT_SYMBOL_GPL vmlinux 0x92297c6d	__set_irq_handler
+EXPORT_SYMBOL_GPL vmlinux 0x924d61be	init_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0x92d31cfb	fixed_phy_add
+EXPORT_SYMBOL_GPL vmlinux 0x92d6ba1a	tcp_twsk_unique
+EXPORT_SYMBOL_GPL vmlinux 0x92e70cde	power_supply_get_by_name
+EXPORT_SYMBOL_GPL vmlinux 0x92fb217b	dcookie_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x93404e04	root_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x93484658	disk_map_sector_rcu
+EXPORT_SYMBOL_GPL vmlinux 0x9384a808	pci_add_dynid
+EXPORT_SYMBOL_GPL vmlinux 0x938e6927	dm_requeue_unmapped_request
+EXPORT_SYMBOL_GPL vmlinux 0x93d2422d	snmp_mib_free
+EXPORT_SYMBOL_GPL vmlinux 0x949c0fed	pm_runtime_barrier
+EXPORT_SYMBOL_GPL vmlinux 0x94a68723	ata_scsi_slave_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x94ced84c	sdio_release_host
+EXPORT_SYMBOL_GPL vmlinux 0x94e41b24	sdio_f0_writeb
+EXPORT_SYMBOL_GPL vmlinux 0x951a9044	register_posix_clock
+EXPORT_SYMBOL_GPL vmlinux 0x952664c5	do_exit
+EXPORT_SYMBOL_GPL vmlinux 0x9533fd22	uhci_check_and_reset_hc
+EXPORT_SYMBOL_GPL vmlinux 0x95539fa1	crypto_larval_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x956a91ba	gpio_get_value_cansleep
+EXPORT_SYMBOL_GPL vmlinux 0x95913b33	tcp_done
+EXPORT_SYMBOL_GPL vmlinux 0x959a45f6	fuse_do_open
+EXPORT_SYMBOL_GPL vmlinux 0x95a1e54b	crypto_alg_mod_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x96b9c843	tcp_cong_avoid_ai
+EXPORT_SYMBOL_GPL vmlinux 0x96cbcf31	pm_qos_add_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x975bdb3c	class_compat_create_link
+EXPORT_SYMBOL_GPL vmlinux 0x977389e9	unregister_kprobes
+EXPORT_SYMBOL_GPL vmlinux 0x97edf007	ata_sas_queuecmd
+EXPORT_SYMBOL_GPL vmlinux 0x9818cddb	clockevents_register_device
+EXPORT_SYMBOL_GPL vmlinux 0x98196f5b	blocking_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x98739c1b	ata_bus_reset
+EXPORT_SYMBOL_GPL vmlinux 0x98c4c682	dm_rh_get_region_key
+EXPORT_SYMBOL_GPL vmlinux 0x98c671f2	debugfs_create_symlink
+EXPORT_SYMBOL_GPL vmlinux 0x98deb6ba	module_mutex
+EXPORT_SYMBOL_GPL vmlinux 0x9905328f	ring_buffer_write
+EXPORT_SYMBOL_GPL vmlinux 0x9910c0d5	xfrm_inner_extract_output
+EXPORT_SYMBOL_GPL vmlinux 0x992403a0	class_compat_register
+EXPORT_SYMBOL_GPL vmlinux 0x995d1071	prof_on
+EXPORT_SYMBOL_GPL vmlinux 0x9989dd4f	sock_prot_inuse_get
+EXPORT_SYMBOL_GPL vmlinux 0x9991e6d9	crypto_register_alg
+EXPORT_SYMBOL_GPL vmlinux 0x99cb36c9	i2c_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x9a112161	device_initialize
+EXPORT_SYMBOL_GPL vmlinux 0x9a11a0fc	crypto_attr_alg_name
+EXPORT_SYMBOL_GPL vmlinux 0x9a3b914c	platform_get_irq
+EXPORT_SYMBOL_GPL vmlinux 0x9a42912b	trace_define_common_fields
+EXPORT_SYMBOL_GPL vmlinux 0x9a832ba7	scsi_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x9a8f48a5	raw_seq_open
+EXPORT_SYMBOL_GPL vmlinux 0x9abb70c6	crypto_unregister_alg
+EXPORT_SYMBOL_GPL vmlinux 0x9aef5b89	invalidate_inode_pages2_range
+EXPORT_SYMBOL_GPL vmlinux 0x9b683b45	scatterwalk_done
+EXPORT_SYMBOL_GPL vmlinux 0x9ba0501e	unregister_vt_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x9bb8f3bb	fsstack_copy_inode_size
+EXPORT_SYMBOL_GPL vmlinux 0x9bbfa820	aead_geniv_exit
+EXPORT_SYMBOL_GPL vmlinux 0x9c11db7d	unregister_jprobes
+EXPORT_SYMBOL_GPL vmlinux 0x9c30347e	sg_scsi_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x9c3e1a6b	devres_close_group
+EXPORT_SYMBOL_GPL vmlinux 0x9c3ecdf0	sata_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0x9c674e57	ata_sas_scsi_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x9c8ef204	debugfs_remove
+EXPORT_SYMBOL_GPL vmlinux 0x9c8f578b	ata_sff_port_start
+EXPORT_SYMBOL_GPL vmlinux 0x9cb8037b	xfrm_count_enc_supported
+EXPORT_SYMBOL_GPL vmlinux 0x9d05ffbd	crypto_alg_sem
+EXPORT_SYMBOL_GPL vmlinux 0x9d1d57a9	driver_find
+EXPORT_SYMBOL_GPL vmlinux 0x9d2df0c6	blk_update_request
+EXPORT_SYMBOL_GPL vmlinux 0x9d49c8f7	lookup_create
+EXPORT_SYMBOL_GPL vmlinux 0x9d6c0f43	ata_cable_unknown
+EXPORT_SYMBOL_GPL vmlinux 0x9d99dff7	ata_scsi_queuecmd
+EXPORT_SYMBOL_GPL vmlinux 0x9df77049	crypto_ahash_setkey
+EXPORT_SYMBOL_GPL vmlinux 0x9e0b4335	sata_sff_hardreset
+EXPORT_SYMBOL_GPL vmlinux 0x9e66cb8d	ata_sff_thaw
+EXPORT_SYMBOL_GPL vmlinux 0x9e711ad2	pm_qos_requirement
+EXPORT_SYMBOL_GPL vmlinux 0x9e7d95f3	register_mtd_blktrans
+EXPORT_SYMBOL_GPL vmlinux 0x9ef6dbec	regulator_bulk_free
+EXPORT_SYMBOL_GPL vmlinux 0x9f0247de	ata_sff_qc_fill_rtf
+EXPORT_SYMBOL_GPL vmlinux 0x9f40a6d6	async_synchronize_full_domain
+EXPORT_SYMBOL_GPL vmlinux 0x9f4e70b3	put_device
+EXPORT_SYMBOL_GPL vmlinux 0x9f760d2c	driver_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x9f805872	crypto_unregister_shash
+EXPORT_SYMBOL_GPL vmlinux 0x9f85ed90	klist_remove
+EXPORT_SYMBOL_GPL vmlinux 0x9fb088b6	console_drivers
+EXPORT_SYMBOL_GPL vmlinux 0x9fce80db	fb_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xa0255440	net_ipv4_ctl_path
+EXPORT_SYMBOL_GPL vmlinux 0xa06364f5	ip6_dst_blackhole
+EXPORT_SYMBOL_GPL vmlinux 0xa0c71dac	spi_populate_sync_msg
+EXPORT_SYMBOL_GPL vmlinux 0xa0fba45a	rtc_irq_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xa141f8b6	crypto_nivaead_type
+EXPORT_SYMBOL_GPL vmlinux 0xa16bdd5f	cfi_qry_mode_on
+EXPORT_SYMBOL_GPL vmlinux 0xa3c59a17	platform_device_put
+EXPORT_SYMBOL_GPL vmlinux 0xa40a8590	input_event_to_user
+EXPORT_SYMBOL_GPL vmlinux 0xa4616f27	i2c_new_probed_device
+EXPORT_SYMBOL_GPL vmlinux 0xa485284f	blk_abort_request
+EXPORT_SYMBOL_GPL vmlinux 0xa516ddc9	debugfs_create_x16
+EXPORT_SYMBOL_GPL vmlinux 0xa57afc74	ktime_get
+EXPORT_SYMBOL_GPL vmlinux 0xa580012d	register_ftrace_event
+EXPORT_SYMBOL_GPL vmlinux 0xa5919f4e	device_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0xa5bf5c3e	pm_qos_add_requirement
+EXPORT_SYMBOL_GPL vmlinux 0xa5c36cec	inotify_unmount_inodes
+EXPORT_SYMBOL_GPL vmlinux 0xa5cb3083	rtc_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xa5da6d18	kobject_rename
+EXPORT_SYMBOL_GPL vmlinux 0xa5dd6fae	arm_pm_restart
+EXPORT_SYMBOL_GPL vmlinux 0xa5ded5f5	bus_get_kset
+EXPORT_SYMBOL_GPL vmlinux 0xa5e3939b	__inet_hash_nolisten
+EXPORT_SYMBOL_GPL vmlinux 0xa5efbf4c	async_synchronize_full
+EXPORT_SYMBOL_GPL vmlinux 0xa60b0f24	skb_to_sgvec
+EXPORT_SYMBOL_GPL vmlinux 0xa63cafb3	sysfs_update_group
+EXPORT_SYMBOL_GPL vmlinux 0xa6473a69	register_pernet_subsys
+EXPORT_SYMBOL_GPL vmlinux 0xa65f9329	raw_seq_next
+EXPORT_SYMBOL_GPL vmlinux 0xa69aec7a	inet_twsk_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xa6aeee4e	map_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0xa6cdd8eb	inotify_find_update_watch
+EXPORT_SYMBOL_GPL vmlinux 0xa70c7f6f	crypto_create_tfm
+EXPORT_SYMBOL_GPL vmlinux 0xa719fd13	crypto_lookup_template
+EXPORT_SYMBOL_GPL vmlinux 0xa71bb34d	rdev_get_dev
+EXPORT_SYMBOL_GPL vmlinux 0xa72f885c	enable_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0xa7412a72	register_pernet_gen_device
+EXPORT_SYMBOL_GPL vmlinux 0xa7b8bfe1	proc_net_mkdir
+EXPORT_SYMBOL_GPL vmlinux 0xa884d7b6	rt_mutex_trylock
+EXPORT_SYMBOL_GPL vmlinux 0xa8cdc826	platform_driver_register
+EXPORT_SYMBOL_GPL vmlinux 0xa8d7947d	register_pernet_device
+EXPORT_SYMBOL_GPL vmlinux 0xa8f59416	gpio_direction_output
+EXPORT_SYMBOL_GPL vmlinux 0xa903bc4d	ata_port_probe
+EXPORT_SYMBOL_GPL vmlinux 0xa95479e8	unregister_timer_hook
+EXPORT_SYMBOL_GPL vmlinux 0xa98f8cba	crypto_register_shash
+EXPORT_SYMBOL_GPL vmlinux 0xa9c530b8	unregister_oom_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xa9f47e25	transport_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xa9fcae4b	bus_get_device_klist
+EXPORT_SYMBOL_GPL vmlinux 0xaa2a72bf	__iowrite64_copy
+EXPORT_SYMBOL_GPL vmlinux 0xaa3774c5	pci_test_config_bits
+EXPORT_SYMBOL_GPL vmlinux 0xaa44aa45	gpiochip_remove
+EXPORT_SYMBOL_GPL vmlinux 0xaa5310f9	__tracepoint_napi_poll
+EXPORT_SYMBOL_GPL vmlinux 0xaa89d802	__rtnl_link_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xaa8c4696	cpu_clock
+EXPORT_SYMBOL_GPL vmlinux 0xaaafe871	__lock_page_killable
+EXPORT_SYMBOL_GPL vmlinux 0xaabac924	__blk_end_request_err
+EXPORT_SYMBOL_GPL vmlinux 0xaac4417c	single_open_net
+EXPORT_SYMBOL_GPL vmlinux 0xaace3560	default_backing_dev_info
+EXPORT_SYMBOL_GPL vmlinux 0xaad89928	scsi_register_device_handler
+EXPORT_SYMBOL_GPL vmlinux 0xab3a62c9	queue_delayed_work_on
+EXPORT_SYMBOL_GPL vmlinux 0xab57e311	tracepoint_probe_register
+EXPORT_SYMBOL_GPL vmlinux 0xab815ae2	pid_vnr
+EXPORT_SYMBOL_GPL vmlinux 0xab8e6d31	rtc_device_register
+EXPORT_SYMBOL_GPL vmlinux 0xab974cab	sysfs_remove_group
+EXPORT_SYMBOL_GPL vmlinux 0xac03f0bb	platform_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0xac69f337	xfrm_output_resume
+EXPORT_SYMBOL_GPL vmlinux 0xac779a4e	blk_queue_rq_timeout
+EXPORT_SYMBOL_GPL vmlinux 0xac8191f9	mm_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xac8a169c	driver_attach
+EXPORT_SYMBOL_GPL vmlinux 0xac9a2298	key_type_user
+EXPORT_SYMBOL_GPL vmlinux 0xacd4e5ca	input_ff_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xacd69fa9	crypto_givcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0xad03a8cd	ring_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0xad67e0a2	sata_set_spd
+EXPORT_SYMBOL_GPL vmlinux 0xad88f272	crypto_destroy_tfm
+EXPORT_SYMBOL_GPL vmlinux 0xae0c87ee	pm_qos_remove_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xae40df74	bdi_writeout_inc
+EXPORT_SYMBOL_GPL vmlinux 0xaeb3bf2d	dm_rh_bio_to_region
+EXPORT_SYMBOL_GPL vmlinux 0xaef1f613	ata_std_bios_param
+EXPORT_SYMBOL_GPL vmlinux 0xaef27b65	sdio_writeb
+EXPORT_SYMBOL_GPL vmlinux 0xaf3b7b70	bus_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xaf3f6fe0	ata_sff_interrupt
+EXPORT_SYMBOL_GPL vmlinux 0xaf43ff70	do_add_mount
+EXPORT_SYMBOL_GPL vmlinux 0xaf488c18	led_trigger_remove
+EXPORT_SYMBOL_GPL vmlinux 0xaf5b4d6b	ata_eh_analyze_ncq_error
+EXPORT_SYMBOL_GPL vmlinux 0xaf63294b	sysfs_schedule_callback
+EXPORT_SYMBOL_GPL vmlinux 0xafdb2c8b	device_remove_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0xafe0af7d	__wake_up_sync_key
+EXPORT_SYMBOL_GPL vmlinux 0xafe50c92	ata_sff_lost_interrupt
+EXPORT_SYMBOL_GPL vmlinux 0xb01d6e9b	md_new_event
+EXPORT_SYMBOL_GPL vmlinux 0xb02a7869	vfs_lock_file
+EXPORT_SYMBOL_GPL vmlinux 0xb0aa812e	fips_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xb0cb520b	devres_remove_group
+EXPORT_SYMBOL_GPL vmlinux 0xb0f4c4a9	debugfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xb10cae45	get_driver
+EXPORT_SYMBOL_GPL vmlinux 0xb10d55bc	cn_netlink_send
+EXPORT_SYMBOL_GPL vmlinux 0xb18429eb	suspend_device_irqs
+EXPORT_SYMBOL_GPL vmlinux 0xb191db14	inet_csk_reqsk_queue_hash_add
+EXPORT_SYMBOL_GPL vmlinux 0xb1acbcce	rcu_barrier_sched
+EXPORT_SYMBOL_GPL vmlinux 0xb1ed290d	relay_buf_full
+EXPORT_SYMBOL_GPL vmlinux 0xb24ca866	__get_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0xb28c57aa	ring_buffer_consume
+EXPORT_SYMBOL_GPL vmlinux 0xb2bb709e	inet_csk_search_req
+EXPORT_SYMBOL_GPL vmlinux 0xb2d104e8	transport_setup_device
+EXPORT_SYMBOL_GPL vmlinux 0xb2d30f88	ring_buffer_read
+EXPORT_SYMBOL_GPL vmlinux 0xb3708846	ata_std_qc_defer
+EXPORT_SYMBOL_GPL vmlinux 0xb3ba64f7	dm_rh_start_recovery
+EXPORT_SYMBOL_GPL vmlinux 0xb3ce537c	relay_open
+EXPORT_SYMBOL_GPL vmlinux 0xb41ceaf0	sysfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xb449ed11	mtd_table_mutex
+EXPORT_SYMBOL_GPL vmlinux 0xb45a9be7	device_attach
+EXPORT_SYMBOL_GPL vmlinux 0xb4a4b9fb	blocking_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xb4ea7cf7	kgdb_connected
+EXPORT_SYMBOL_GPL vmlinux 0xb50ca928	unregister_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0xb54e18df	del_mtd_device
+EXPORT_SYMBOL_GPL vmlinux 0xb560d9db	destroy_workqueue
+EXPORT_SYMBOL_GPL vmlinux 0xb58dcfa2	synchronize_sched_expedited
+EXPORT_SYMBOL_GPL vmlinux 0xb6086f49	skcipher_geniv_exit
+EXPORT_SYMBOL_GPL vmlinux 0xb65091b3	selinux_secmark_refcount_dec
+EXPORT_SYMBOL_GPL vmlinux 0xb662f2f6	inet_csk_listen_stop
+EXPORT_SYMBOL_GPL vmlinux 0xb693efc1	device_del
+EXPORT_SYMBOL_GPL vmlinux 0xb6a1997e	ata_cable_40wire
+EXPORT_SYMBOL_GPL vmlinux 0xb6aeb661	ata_id_c_string
+EXPORT_SYMBOL_GPL vmlinux 0xb705db7b	ata_pci_device_suspend
+EXPORT_SYMBOL_GPL vmlinux 0xb7174b04	vfs_setxattr
+EXPORT_SYMBOL_GPL vmlinux 0xb730edeb	uart_set_options
+EXPORT_SYMBOL_GPL vmlinux 0xb744fa43	xfrm_ealg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0xb7ad2c3f	do_sync_mapping_range
+EXPORT_SYMBOL_GPL vmlinux 0xb7af628d	__fsnotify_inode_delete
+EXPORT_SYMBOL_GPL vmlinux 0xb7dbe5db	fuse_conn_put
+EXPORT_SYMBOL_GPL vmlinux 0xb8759c2c	srcu_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0xb876d8be	sata_link_resume
+EXPORT_SYMBOL_GPL vmlinux 0xb893ff0d	simple_attr_write
+EXPORT_SYMBOL_GPL vmlinux 0xb8fee532	blocking_notifier_chain_cond_register
+EXPORT_SYMBOL_GPL vmlinux 0xb917b6d7	return_address
+EXPORT_SYMBOL_GPL vmlinux 0xb9230e05	vfs_setlease
+EXPORT_SYMBOL_GPL vmlinux 0xb9eb3aa9	add_uevent_var
+EXPORT_SYMBOL_GPL vmlinux 0xba571c61	blk_rq_prep_clone
+EXPORT_SYMBOL_GPL vmlinux 0xbabf93b4	class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xbad0e73b	dm_get_rq_mapinfo
+EXPORT_SYMBOL_GPL vmlinux 0xbae34c27	scsi_nl_remove_transport
+EXPORT_SYMBOL_GPL vmlinux 0xbaf7a7e6	hrtimer_cancel
+EXPORT_SYMBOL_GPL vmlinux 0xbb6759a3	find_module
+EXPORT_SYMBOL_GPL vmlinux 0xbb731012	find_symbol
+EXPORT_SYMBOL_GPL vmlinux 0xbb9685da	relay_flush
+EXPORT_SYMBOL_GPL vmlinux 0xbb9a2c75	ktime_add_ns
+EXPORT_SYMBOL_GPL vmlinux 0xbba189dd	sdev_evt_send_simple
+EXPORT_SYMBOL_GPL vmlinux 0xbba90166	raw_hash_sk
+EXPORT_SYMBOL_GPL vmlinux 0xbbaa26dd	xfrm_output
+EXPORT_SYMBOL_GPL vmlinux 0xbbac4449	scsi_flush_work
+EXPORT_SYMBOL_GPL vmlinux 0xbc51c3b8	blk_queue_dma_drain
+EXPORT_SYMBOL_GPL vmlinux 0xbcb8cfc4	blk_abort_queue
+EXPORT_SYMBOL_GPL vmlinux 0xbcc9c336	register_kretprobes
+EXPORT_SYMBOL_GPL vmlinux 0xbcd80d23	regulator_set_mode
+EXPORT_SYMBOL_GPL vmlinux 0xbceb667d	skcipher_geniv_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xbcf15716	each_symbol
+EXPORT_SYMBOL_GPL vmlinux 0xbcf987c4	aead_geniv_init
+EXPORT_SYMBOL_GPL vmlinux 0xbd4c1176	pci_reset_function
+EXPORT_SYMBOL_GPL vmlinux 0xbd5de87d	crypto_alloc_ablkcipher
+EXPORT_SYMBOL_GPL vmlinux 0xbdafa8f4	shash_ahash_digest
+EXPORT_SYMBOL_GPL vmlinux 0xbdd295f0	trace_vprintk
+EXPORT_SYMBOL_GPL vmlinux 0xbdf77348	rtc_update_irq
+EXPORT_SYMBOL_GPL vmlinux 0xbe0541d4	ata_sff_data_xfer32
+EXPORT_SYMBOL_GPL vmlinux 0xbe116723	do_posix_clock_nosettime
+EXPORT_SYMBOL_GPL vmlinux 0xbe1887e4	ata_unpack_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0xbe612f47	crypto_shash_digest
+EXPORT_SYMBOL_GPL vmlinux 0xbeabd021	register_kprobes
+EXPORT_SYMBOL_GPL vmlinux 0xbedc62da	schedule_hrtimeout_range
+EXPORT_SYMBOL_GPL vmlinux 0xbeea7a2b	srcu_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xc046b946	sdio_enable_func
+EXPORT_SYMBOL_GPL vmlinux 0xc0691435	sdio_memcpy_fromio
+EXPORT_SYMBOL_GPL vmlinux 0xc0891ced	vfs_removexattr
+EXPORT_SYMBOL_GPL vmlinux 0xc126e890	klist_del
+EXPORT_SYMBOL_GPL vmlinux 0xc13cfcd2	kallsyms_on_each_symbol
+EXPORT_SYMBOL_GPL vmlinux 0xc18bf5d4	generic_drop_inode
+EXPORT_SYMBOL_GPL vmlinux 0xc22a3091	vm_unmap_aliases
+EXPORT_SYMBOL_GPL vmlinux 0xc312f5b3	ata_bmdma_start
+EXPORT_SYMBOL_GPL vmlinux 0xc3301f02	rcu_expedited_torture_stats
+EXPORT_SYMBOL_GPL vmlinux 0xc34efe27	snmp_fold_field
+EXPORT_SYMBOL_GPL vmlinux 0xc3527505	schedule_hrtimeout
+EXPORT_SYMBOL_GPL vmlinux 0xc3576979	crypto_alloc_shash
+EXPORT_SYMBOL_GPL vmlinux 0xc38fc193	ring_buffer_record_enable
+EXPORT_SYMBOL_GPL vmlinux 0xc399468f	scsi_nl_remove_driver
+EXPORT_SYMBOL_GPL vmlinux 0xc3eb68e1	scsi_queue_work
+EXPORT_SYMBOL_GPL vmlinux 0xc40365db	ata_bmdma_port_ops
+EXPORT_SYMBOL_GPL vmlinux 0xc417fec5	class_compat_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xc428068d	sata_deb_timing_long
+EXPORT_SYMBOL_GPL vmlinux 0xc44208f4	tcp_twsk_destructor
+EXPORT_SYMBOL_GPL vmlinux 0xc48b7ccf	ata_mode_string
+EXPORT_SYMBOL_GPL vmlinux 0xc4adbbbd	sysfs_chmod_file
+EXPORT_SYMBOL_GPL vmlinux 0xc4b33aa6	tracepoint_probe_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xc514b827	seq_open_net
+EXPORT_SYMBOL_GPL vmlinux 0xc60f75ec	__ftrace_vprintk
+EXPORT_SYMBOL_GPL vmlinux 0xc673e23e	ata_scsi_change_queue_depth
+EXPORT_SYMBOL_GPL vmlinux 0xc6ffcb2d	init_user_ns
+EXPORT_SYMBOL_GPL vmlinux 0xc720d7db	dev_attr_unload_heads
+EXPORT_SYMBOL_GPL vmlinux 0xc721c0b2	devres_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xc7477c87	device_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xc7c6e88d	regulator_get_current_limit
+EXPORT_SYMBOL_GPL vmlinux 0xc7fc30fe	tty_ldisc_deref
+EXPORT_SYMBOL_GPL vmlinux 0xc86b144f	pci_bus_add_device
+EXPORT_SYMBOL_GPL vmlinux 0xc8dc2dc3	fib_rules_register
+EXPORT_SYMBOL_GPL vmlinux 0xc9561772	fb_destroy_modelist
+EXPORT_SYMBOL_GPL vmlinux 0xc9e5b8ac	ata_scsi_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xc9eba7ee	power_supply_am_i_supplied
+EXPORT_SYMBOL_GPL vmlinux 0xca85d8cf	tracepoint_probe_update_all
+EXPORT_SYMBOL_GPL vmlinux 0xcab7edf2	sata_pmp_error_handler
+EXPORT_SYMBOL_GPL vmlinux 0xcabe04de	cpuidle_resume_and_unlock
+EXPORT_SYMBOL_GPL vmlinux 0xcac3f09b	macvlan_handle_frame_hook
+EXPORT_SYMBOL_GPL vmlinux 0xcaf2d00b	ata_wait_after_reset
+EXPORT_SYMBOL_GPL vmlinux 0xcb0c2ebf	__srcu_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xcb4cf82a	pci_rescan_bus
+EXPORT_SYMBOL_GPL vmlinux 0xcb51cabe	klist_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0xcc05dca1	sysfs_get_dirent
+EXPORT_SYMBOL_GPL vmlinux 0xcc1f1c3d	inet_twdr_hangman
+EXPORT_SYMBOL_GPL vmlinux 0xcc33b832	crypto_unregister_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0xcc5c2035	dm_rh_dec
+EXPORT_SYMBOL_GPL vmlinux 0xcca39e14	md_do_sync
+EXPORT_SYMBOL_GPL vmlinux 0xcccfb2fa	sata_deb_timing_hotplug
+EXPORT_SYMBOL_GPL vmlinux 0xcd3a1101	fuse_get_req
+EXPORT_SYMBOL_GPL vmlinux 0xcd9335ba	get_net_ns_by_pid
+EXPORT_SYMBOL_GPL vmlinux 0xcdca3691	nr_irqs
+EXPORT_SYMBOL_GPL vmlinux 0xce0c45d8	generic_fh_to_parent
+EXPORT_SYMBOL_GPL vmlinux 0xce429bd7	put_driver
+EXPORT_SYMBOL_GPL vmlinux 0xceb728a0	elv_register
+EXPORT_SYMBOL_GPL vmlinux 0xcebbad10	pm_schedule_suspend
+EXPORT_SYMBOL_GPL vmlinux 0xcecb5842	ata_pci_bmdma_init
+EXPORT_SYMBOL_GPL vmlinux 0xced1a4f4	pskb_put
+EXPORT_SYMBOL_GPL vmlinux 0xced31b44	setup_irq
+EXPORT_SYMBOL_GPL vmlinux 0xced9ff39	ata_sff_qc_prep
+EXPORT_SYMBOL_GPL vmlinux 0xcefc1212	class_dev_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0xcefc5182	dm_rh_inc_pending
+EXPORT_SYMBOL_GPL vmlinux 0xcf4e9da6	gpio_export_link
+EXPORT_SYMBOL_GPL vmlinux 0xcf69c3d9	sysfs_remove_link
+EXPORT_SYMBOL_GPL vmlinux 0xcf7a962e	cn_add_callback
+EXPORT_SYMBOL_GPL vmlinux 0xcfc68341	synchronize_rcu_bh
+EXPORT_SYMBOL_GPL vmlinux 0xcfcc83ad	register_vt_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xcffa2aff	spi_populate_width_msg
+EXPORT_SYMBOL_GPL vmlinux 0xd0398e12	unregister_pernet_device
+EXPORT_SYMBOL_GPL vmlinux 0xd03c7700	secure_ipv4_port_ephemeral
+EXPORT_SYMBOL_GPL vmlinux 0xd091b075	inotify_rm_wd
+EXPORT_SYMBOL_GPL vmlinux 0xd0c05159	emergency_restart
+EXPORT_SYMBOL_GPL vmlinux 0xd1341db1	blk_rq_check_limits
+EXPORT_SYMBOL_GPL vmlinux 0xd1546fff	ata_link_online
+EXPORT_SYMBOL_GPL vmlinux 0xd1593e0a	ata_link_next
+EXPORT_SYMBOL_GPL vmlinux 0xd16712f3	crypto_check_attr_type
+EXPORT_SYMBOL_GPL vmlinux 0xd1886e8e	find_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0xd2013048	dm_rh_delay
+EXPORT_SYMBOL_GPL vmlinux 0xd21ec21f	ata_host_activate
+EXPORT_SYMBOL_GPL vmlinux 0xd25ab479	led_trigger_store
+EXPORT_SYMBOL_GPL vmlinux 0xd261f035	ring_buffer_record_disable
+EXPORT_SYMBOL_GPL vmlinux 0xd273b1b1	__round_jiffies_up_relative
+EXPORT_SYMBOL_GPL vmlinux 0xd2ae5dac	platform_driver_probe
+EXPORT_SYMBOL_GPL vmlinux 0xd331fc06	ring_buffer_empty_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xd332f796	sysfs_create_link
+EXPORT_SYMBOL_GPL vmlinux 0xd381c91a	ata_sff_qc_issue
+EXPORT_SYMBOL_GPL vmlinux 0xd42457d2	sdio_writew
+EXPORT_SYMBOL_GPL vmlinux 0xd42b26d5	pci_create_slot
+EXPORT_SYMBOL_GPL vmlinux 0xd463bce7	eventfd_fget
+EXPORT_SYMBOL_GPL vmlinux 0xd4948607	blk_trace_setup
+EXPORT_SYMBOL_GPL vmlinux 0xd4d8fb87	sysfs_notify
+EXPORT_SYMBOL_GPL vmlinux 0xd4f3fe7d	sysdev_register
+EXPORT_SYMBOL_GPL vmlinux 0xd517df80	ring_buffer_read_page
+EXPORT_SYMBOL_GPL vmlinux 0xd590c960	debugfs_remove_recursive
+EXPORT_SYMBOL_GPL vmlinux 0xd6cdbea0	pci_bus_max_busnr
+EXPORT_SYMBOL_GPL vmlinux 0xd7009a60	blkcipher_walk_virt_block
+EXPORT_SYMBOL_GPL vmlinux 0xd71206a2	xattr_getsecurity
+EXPORT_SYMBOL_GPL vmlinux 0xd73ef534	sysdev_resume
+EXPORT_SYMBOL_GPL vmlinux 0xd741cfcf	blocking_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xd74f8463	fb_bl_default_curve
+EXPORT_SYMBOL_GPL vmlinux 0xd768e985	regulator_has_full_constraints
+EXPORT_SYMBOL_GPL vmlinux 0xd78e08bc	security_inode_setattr
+EXPORT_SYMBOL_GPL vmlinux 0xd7efa4b4	ata_host_register
+EXPORT_SYMBOL_GPL vmlinux 0xd7f0f764	get_task_mm
+EXPORT_SYMBOL_GPL vmlinux 0xd821964e	add_timer_on
+EXPORT_SYMBOL_GPL vmlinux 0xd876a369	inet_hash
+EXPORT_SYMBOL_GPL vmlinux 0xd87afa0a	crypto_mod_get
+EXPORT_SYMBOL_GPL vmlinux 0xd8b358fe	inverse_translate
+EXPORT_SYMBOL_GPL vmlinux 0xd8cba368	rtc_irq_set_state
+EXPORT_SYMBOL_GPL vmlinux 0xd8da6499	blk_trace_startstop
+EXPORT_SYMBOL_GPL vmlinux 0xd8e7da0a	ring_buffer_overrun_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xd911222d	sata_pmp_qc_defer_cmd_switch
+EXPORT_SYMBOL_GPL vmlinux 0xd92859a6	kset_create_and_add
+EXPORT_SYMBOL_GPL vmlinux 0xd9300760	unregister_jprobe
+EXPORT_SYMBOL_GPL vmlinux 0xd939846c	dm_region_hash_create
+EXPORT_SYMBOL_GPL vmlinux 0xd97442e7	ip_local_out
+EXPORT_SYMBOL_GPL vmlinux 0xd9ec8251	scsi_dh_detach
+EXPORT_SYMBOL_GPL vmlinux 0xda1be8e1	async_synchronize_cookie_domain
+EXPORT_SYMBOL_GPL vmlinux 0xda431189	class_interface_register
+EXPORT_SYMBOL_GPL vmlinux 0xda469529	md_allow_write
+EXPORT_SYMBOL_GPL vmlinux 0xdab21aec	k_handler
+EXPORT_SYMBOL_GPL vmlinux 0xdae247c3	sata_link_debounce
+EXPORT_SYMBOL_GPL vmlinux 0xdaf4dfb3	fb_mode_option
+EXPORT_SYMBOL_GPL vmlinux 0xdb274e52	monotonic_to_bootbased
+EXPORT_SYMBOL_GPL vmlinux 0xdb469bb0	ata_noop_qc_prep
+EXPORT_SYMBOL_GPL vmlinux 0xdb494ff9	pm_request_idle
+EXPORT_SYMBOL_GPL vmlinux 0xdb94755b	ata_scsi_simulate
+EXPORT_SYMBOL_GPL vmlinux 0xdbdc84fb	nf_register_afinfo
+EXPORT_SYMBOL_GPL vmlinux 0xdc659687	crypto_aead_type
+EXPORT_SYMBOL_GPL vmlinux 0xdc9d99b2	aead_geniv_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xdcadcc32	fb_deferred_io_cleanup
+EXPORT_SYMBOL_GPL vmlinux 0xdcdaf06f	regulator_get_voltage
+EXPORT_SYMBOL_GPL vmlinux 0xdcf325c1	anon_inode_getfile
+EXPORT_SYMBOL_GPL vmlinux 0xdcf65061	device_reprobe
+EXPORT_SYMBOL_GPL vmlinux 0xdd006572	scsi_target_block
+EXPORT_SYMBOL_GPL vmlinux 0xdd225f1d	pm_request_resume
+EXPORT_SYMBOL_GPL vmlinux 0xddea1370	cpuidle_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0xde0a87ff	regulator_set_voltage
+EXPORT_SYMBOL_GPL vmlinux 0xde417b81	async_schedule_domain
+EXPORT_SYMBOL_GPL vmlinux 0xde88001b	ata_common_sdev_attrs
+EXPORT_SYMBOL_GPL vmlinux 0xdea92006	unregister_pernet_subsys
+EXPORT_SYMBOL_GPL vmlinux 0xdf41f63d	regulator_enable
+EXPORT_SYMBOL_GPL vmlinux 0xdf9f4280	page_cache_sync_readahead
+EXPORT_SYMBOL_GPL vmlinux 0xe03043db	sdio_release_irq
+EXPORT_SYMBOL_GPL vmlinux 0xe08847a8	regulator_is_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xe0935a57	platform_get_resource_byname
+EXPORT_SYMBOL_GPL vmlinux 0xe0962f47	ata_std_prereset
+EXPORT_SYMBOL_GPL vmlinux 0xe0a8d811	crypto_grab_aead
+EXPORT_SYMBOL_GPL vmlinux 0xe0cca33e	xfrm_aead_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0xe0e7af06	scsi_get_vpd_page
+EXPORT_SYMBOL_GPL vmlinux 0xe1504d99	ata_dev_next
+EXPORT_SYMBOL_GPL vmlinux 0xe153b88d	sata_scr_valid
+EXPORT_SYMBOL_GPL vmlinux 0xe172d9b7	inet6_csk_reqsk_queue_hash_add
+EXPORT_SYMBOL_GPL vmlinux 0xe194081d	tcp_slow_start
+EXPORT_SYMBOL_GPL vmlinux 0xe1af2615	rt_mutex_timed_lock
+EXPORT_SYMBOL_GPL vmlinux 0xe24e8dc2	rtnl_register
+EXPORT_SYMBOL_GPL vmlinux 0xe2ada94e	regulator_get_init_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0xe2b42ee8	blk_execute_rq_nowait
+EXPORT_SYMBOL_GPL vmlinux 0xe2ba19cf	platform_get_resource
+EXPORT_SYMBOL_GPL vmlinux 0xe3505b66	ip6_dst_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xe361c5f1	sched_setscheduler
+EXPORT_SYMBOL_GPL vmlinux 0xe36ac442	sdio_readw
+EXPORT_SYMBOL_GPL vmlinux 0xe38d8016	__inet_twsk_hashdance
+EXPORT_SYMBOL_GPL vmlinux 0xe3fb5d3e	cpuidle_register_device
+EXPORT_SYMBOL_GPL vmlinux 0xe49709d5	gpiochip_add
+EXPORT_SYMBOL_GPL vmlinux 0xe49e1f6c	ring_buffer_record_disable_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xe49ff3b0	ata_wait_register
+EXPORT_SYMBOL_GPL vmlinux 0xe4e5765e	anon_transport_class_register
+EXPORT_SYMBOL_GPL vmlinux 0xe514fafa	disk_part_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0xe530071c	pm_qos_remove_requirement
+EXPORT_SYMBOL_GPL vmlinux 0xe538c574	securityfs_remove
+EXPORT_SYMBOL_GPL vmlinux 0xe56f6cba	__crypto_alloc_tfm
+EXPORT_SYMBOL_GPL vmlinux 0xe5923561	ring_buffer_time_stamp
+EXPORT_SYMBOL_GPL vmlinux 0xe5dbc620	ata_timing_compute
+EXPORT_SYMBOL_GPL vmlinux 0xe5e022df	da903x_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xe61a6d2f	gpio_unexport
+EXPORT_SYMBOL_GPL vmlinux 0xe651f76e	selinux_is_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xe6a91c0c	crypto_register_ahash
+EXPORT_SYMBOL_GPL vmlinux 0xe6db00ba	scsi_mode_select
+EXPORT_SYMBOL_GPL vmlinux 0xe706fcb1	devres_add
+EXPORT_SYMBOL_GPL vmlinux 0xe795a7bd	pci_find_ext_capability
+EXPORT_SYMBOL_GPL vmlinux 0xe7d09d27	tty_get_pgrp
+EXPORT_SYMBOL_GPL vmlinux 0xe8214cbb	skb_tstamp_tx
+EXPORT_SYMBOL_GPL vmlinux 0xe862c4b7	dpm_suspend_start
+EXPORT_SYMBOL_GPL vmlinux 0xe8789a12	eventfd_ctx_get
+EXPORT_SYMBOL_GPL vmlinux 0xe893262c	crypto_larval_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xe89d9da3	ata_dummy_port_info
+EXPORT_SYMBOL_GPL vmlinux 0xe8d989eb	crypto_blkcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0xe901175f	__dev_addr_unsync
+EXPORT_SYMBOL_GPL vmlinux 0xe917e733	ktime_add_safe
+EXPORT_SYMBOL_GPL vmlinux 0xe93e49c3	devres_free
+EXPORT_SYMBOL_GPL vmlinux 0xe943b912	security_inode_create
+EXPORT_SYMBOL_GPL vmlinux 0xe9672de7	shash_ahash_finup
+EXPORT_SYMBOL_GPL vmlinux 0xe99d3880	sysdev_class_register
+EXPORT_SYMBOL_GPL vmlinux 0xe9dd54bf	ata_sff_port_start32
+EXPORT_SYMBOL_GPL vmlinux 0xe9fec34f	tcp_death_row
+EXPORT_SYMBOL_GPL vmlinux 0xea065e01	task_handoff_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xea124bd1	gcd
+EXPORT_SYMBOL_GPL vmlinux 0xea3fffb0	register_timer_hook
+EXPORT_SYMBOL_GPL vmlinux 0xea418e0f	atapi_cmd_type
+EXPORT_SYMBOL_GPL vmlinux 0xea7215b2	register_pernet_gen_subsys
+EXPORT_SYMBOL_GPL vmlinux 0xea8715c4	ata_eh_thaw_port
+EXPORT_SYMBOL_GPL vmlinux 0xead09d5a	rt_mutex_unlock
+EXPORT_SYMBOL_GPL vmlinux 0xeae74760	scsi_nl_send_transport_msg
+EXPORT_SYMBOL_GPL vmlinux 0xeb4c1fc8	__tracepoint_block_remap
+EXPORT_SYMBOL_GPL vmlinux 0xeb62c375	cfi_cmdset_0001
+EXPORT_SYMBOL_GPL vmlinux 0xeb894e0e	debugfs_create_x32
+EXPORT_SYMBOL_GPL vmlinux 0xeb9e5b26	crypto_init_shash_spawn
+EXPORT_SYMBOL_GPL vmlinux 0xebb23e4a	ata_sff_data_xfer
+EXPORT_SYMBOL_GPL vmlinux 0xec1a75a9	__dev_addr_sync
+EXPORT_SYMBOL_GPL vmlinux 0xec1b043e	regulator_suspend_prepare
+EXPORT_SYMBOL_GPL vmlinux 0xec1faafe	inet6_csk_addr2sockaddr
+EXPORT_SYMBOL_GPL vmlinux 0xeceb1301	register_net_sysctl_rotable
+EXPORT_SYMBOL_GPL vmlinux 0xed1d971c	rtc_class_open
+EXPORT_SYMBOL_GPL vmlinux 0xed2ff1c6	cfi_qry_present
+EXPORT_SYMBOL_GPL vmlinux 0xed4e6718	led_trigger_set_default
+EXPORT_SYMBOL_GPL vmlinux 0xed5837ed	debugfs_rename
+EXPORT_SYMBOL_GPL vmlinux 0xed5919ea	crypto_aead_setauthsize
+EXPORT_SYMBOL_GPL vmlinux 0xed7fef76	dev_attr_em_message
+EXPORT_SYMBOL_GPL vmlinux 0xeda7ed92	generic_detach_inode
+EXPORT_SYMBOL_GPL vmlinux 0xedb49cec	device_move
+EXPORT_SYMBOL_GPL vmlinux 0xedceff04	hrtimer_try_to_cancel
+EXPORT_SYMBOL_GPL vmlinux 0xedf893c5	kobject_uevent
+EXPORT_SYMBOL_GPL vmlinux 0xee3cfe9a	crypto_alloc_instance
+EXPORT_SYMBOL_GPL vmlinux 0xee9a6ec5	vfs_kern_mount
+EXPORT_SYMBOL_GPL vmlinux 0xeedc5ce4	debugfs_create_blob
+EXPORT_SYMBOL_GPL vmlinux 0xef2af2f1	br_handle_frame_hook
+EXPORT_SYMBOL_GPL vmlinux 0xef44f32e	crypto_ahash_final
+EXPORT_SYMBOL_GPL vmlinux 0xef4e963e	__atomic_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xef5e94fc	dm_kill_unmapped_request
+EXPORT_SYMBOL_GPL vmlinux 0xef6c3f70	round_jiffies_up_relative
+EXPORT_SYMBOL_GPL vmlinux 0xef82fdba	srcu_init_notifier_head
+EXPORT_SYMBOL_GPL vmlinux 0xef98423b	blk_rq_unprep_clone
+EXPORT_SYMBOL_GPL vmlinux 0xefa643ff	rtc_irq_register
+EXPORT_SYMBOL_GPL vmlinux 0xefd18aab	devres_get
+EXPORT_SYMBOL_GPL vmlinux 0xefdd5a63	ktime_get_ts
+EXPORT_SYMBOL_GPL vmlinux 0xefe21106	snmp_mib_init
+EXPORT_SYMBOL_GPL vmlinux 0xefee7800	skb_gro_receive
+EXPORT_SYMBOL_GPL vmlinux 0xf0634e87	ata_sff_pause
+EXPORT_SYMBOL_GPL vmlinux 0xf1463412	execute_in_process_context
+EXPORT_SYMBOL_GPL vmlinux 0xf184d189	kernel_power_off
+EXPORT_SYMBOL_GPL vmlinux 0xf18edc86	devm_kzalloc
+EXPORT_SYMBOL_GPL vmlinux 0xf1fea8ad	free_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0xf209739d	sata_scr_read
+EXPORT_SYMBOL_GPL vmlinux 0xf24071cf	hrtimer_init
+EXPORT_SYMBOL_GPL vmlinux 0xf2bb71c5	__ata_ehi_push_desc
+EXPORT_SYMBOL_GPL vmlinux 0xf2fca922	uart_parse_options
+EXPORT_SYMBOL_GPL vmlinux 0xf2feaec4	sdio_align_size
+EXPORT_SYMBOL_GPL vmlinux 0xf34806ec	hrtimer_get_res
+EXPORT_SYMBOL_GPL vmlinux 0xf3503b1c	ata_pci_device_do_resume
+EXPORT_SYMBOL_GPL vmlinux 0xf3590657	ata_port_abort
+EXPORT_SYMBOL_GPL vmlinux 0xf38a0a5b	device_create_vargs
+EXPORT_SYMBOL_GPL vmlinux 0xf41989a1	dm_disk
+EXPORT_SYMBOL_GPL vmlinux 0xf43d17e6	deregister_mtd_parser
+EXPORT_SYMBOL_GPL vmlinux 0xf47a7b27	device_find_child
+EXPORT_SYMBOL_GPL vmlinux 0xf499fdb2	rcu_barrier_bh
+EXPORT_SYMBOL_GPL vmlinux 0xf4a46f4d	user_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xf53115ed	regulator_set_current_limit
+EXPORT_SYMBOL_GPL vmlinux 0xf5384ac1	__trace_printk
+EXPORT_SYMBOL_GPL vmlinux 0xf5446db6	class_dev_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0xf54bd49b	lcm
+EXPORT_SYMBOL_GPL vmlinux 0xf553318d	cpuidle_pause_and_lock
+EXPORT_SYMBOL_GPL vmlinux 0xf5a50701	led_trigger_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xf5a691cd	invalidate_bh_lrus
+EXPORT_SYMBOL_GPL vmlinux 0xf5d9d1a1	sync_filesystem
+EXPORT_SYMBOL_GPL vmlinux 0xf5f49572	sysfs_put
+EXPORT_SYMBOL_GPL vmlinux 0xf6bcbd73	hwrng_register
+EXPORT_SYMBOL_GPL vmlinux 0xf6e874f5	ata_timing_merge
+EXPORT_SYMBOL_GPL vmlinux 0xf70076be	find_get_pid
+EXPORT_SYMBOL_GPL vmlinux 0xf7116669	cpuidle_unregister_device
+EXPORT_SYMBOL_GPL vmlinux 0xf770959c	dm_rh_region_context
+EXPORT_SYMBOL_GPL vmlinux 0xf785b6df	tty_init_termios
+EXPORT_SYMBOL_GPL vmlinux 0xf7fbc574	ring_buffer_read_start
+EXPORT_SYMBOL_GPL vmlinux 0xf807fd65	scatterwalk_map_and_copy
+EXPORT_SYMBOL_GPL vmlinux 0xf85e7c98	tcp_reno_min_cwnd
+EXPORT_SYMBOL_GPL vmlinux 0xf863e82a	flush_work
+EXPORT_SYMBOL_GPL vmlinux 0xf8802492	print_stack_trace
+EXPORT_SYMBOL_GPL vmlinux 0xf8d2786d	sdio_writel
+EXPORT_SYMBOL_GPL vmlinux 0xf8f3a0fb	ata_ratelimit
+EXPORT_SYMBOL_GPL vmlinux 0xf923e40f	__blkdev_driver_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xf97e2c77	unregister_pernet_gen_subsys
+EXPORT_SYMBOL_GPL vmlinux 0xf9a054b5	__round_jiffies
+EXPORT_SYMBOL_GPL vmlinux 0xf9ca3160	ata_id_xfermask
+EXPORT_SYMBOL_GPL vmlinux 0xfa03f3fa	ring_buffer_discard_commit
+EXPORT_SYMBOL_GPL vmlinux 0xfa1a3410	dm_rh_get_state
+EXPORT_SYMBOL_GPL vmlinux 0xfa6bf2bd	rtc_set_alarm
+EXPORT_SYMBOL_GPL vmlinux 0xfad546e2	transport_add_device
+EXPORT_SYMBOL_GPL vmlinux 0xfb916080	dm_register_path_selector
+EXPORT_SYMBOL_GPL vmlinux 0xfb91c743	inet6_hash_connect
+EXPORT_SYMBOL_GPL vmlinux 0xfb9bd2b9	bsg_unregister_queue
+EXPORT_SYMBOL_GPL vmlinux 0xfbf9be5d	register_oom_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xfca846eb	dev_attr_sw_activity
+EXPORT_SYMBOL_GPL vmlinux 0xfd8b2c49	tcp_reno_cong_avoid
+EXPORT_SYMBOL_GPL vmlinux 0xfdb81a04	bus_find_device_by_name
+EXPORT_SYMBOL_GPL vmlinux 0xfde0b92c	crypto_larval_error
+EXPORT_SYMBOL_GPL vmlinux 0xfdea39fb	add_to_page_cache_lru
+EXPORT_SYMBOL_GPL vmlinux 0xfe7dcb1c	ata_sg_init
+EXPORT_SYMBOL_GPL vmlinux 0xfe8ed3e0	mmput
+EXPORT_SYMBOL_GPL vmlinux 0xfe990052	gpio_free
+EXPORT_SYMBOL_GPL vmlinux 0xfee58a16	shash_attr_alg
+EXPORT_SYMBOL_GPL vmlinux 0xfefe0271	securityfs_create_dir
+EXPORT_SYMBOL_GPL vmlinux 0xfefe68b4	kobject_create_and_add
+EXPORT_SYMBOL_GPL vmlinux 0xff5a8cfe	cn_del_callback
+EXPORT_SYMBOL_GPL vmlinux 0xff787b33	ata_sff_post_internal_cmd
+EXPORT_SYMBOL_GPL vmlinux 0xffaf7bbb	__wake_up_sync
+EXPORT_UNUSED_SYMBOL vmlinux 0x00000000	simple_prepare_write
--- linux-mvl-dove-2.6.32.orig/debian.master/abi/2.6.32-34.73/ia64/ia64.modules
+++ linux-mvl-dove-2.6.32/debian.master/abi/2.6.32-34.73/ia64/ia64.modules
@@ -0,0 +1,2061 @@
+3c359
+3c574_cs
+3c589_cs
+3c59x
+3w-9xxx
+3w-xxxx
+6pack
+8021q
+8139cp
+8139too
+8250
+8250_pci
+8250_pnp
+8390
+9p
+9pnet
+9pnet_rdma
+a100u2w
+a3d
+aacraid
+ab3100
+ab3100-core
+ab3100-otp
+abyss
+ac97_bus
+acecad
+acenic
+act200l-sir
+act_gact
+act_ipt
+actisys-sir
+act_mirred
+act_nat
+act_pedit
+act_police
+act_simple
+act_skbedit
+ad7414
+ad7418
+ad7877
+ad7879
+adcxx
+adfs
+adi
+adm1021
+adm1025
+adm1026
+adm1029
+adm1031
+adm8211
+adm9240
+adp5588-keys
+ads7846
+adt7462
+adt7470
+adt7475
+adutux
+adv7170
+adv7175
+adv7180
+adv7343
+advansys
+aes_generic
+af_802154
+af9013
+affs
+af_key
+af-rxrpc
+agpgart
+ah4
+ahci
+aic79xx
+aic7xxx
+aic94xx
+aiptek
+aircable
+airo
+airo_cs
+alauda
+ambassador
+amd8111e
+analog
+ansi_cprng
+anubis
+aoe
+appledisplay
+appletalk
+appletouch
+applicom
+ar7part
+ar9170usb
+arc4
+arcmsr
+arcnet
+arc-rawmode
+arc-rimi
+ark3116
+arkfb
+arptable_filter
+arp_tables
+arpt_mangle
+asix
+async_memcpy
+async_pq
+async_raid6_recov
+async_tx
+async_xor
+at24
+at25
+at76c50x-usb
+ata_generic
+ata_piix
+aten
+ath
+ath9k
+ati_remote
+ati_remote2
+atl1
+atl1c
+atl1e
+atl2
+atm
+atmel
+atmel_cs
+atmel_pci
+atmtcp
+atp870u
+atxp1
+aty128fb
+atyfb
+au0828
+au8522
+authenc
+auth_rpcgss
+autofs
+autofs4
+avmfritz
+ax25
+axnet_cs
+b2c2-flexcop
+b2c2-flexcop-pci
+b2c2-flexcop-usb
+b43
+b43legacy
+b44
+baycom_par
+baycom_ser_fdx
+baycom_ser_hdx
+bcm203x
+bcm3510
+bcm5974
+be2iscsi
+be2net
+befs
+belkin_sa
+berry_charge
+bfa
+bfs
+bfusb
+binfmt_misc
+block2mtd
+blowfish
+bluecard_cs
+bluetooth
+bnep
+bnx2
+bnx2i
+bpa10x
+bpck
+bpqether
+bq24022
+bq27x00_battery
+br2684
+bridge
+broadcom
+broadsheetfb
+bsd_comp
+bt3c_cs
+bt819
+bt856
+bt866
+bt878
+btcx-risc
+btmrvl
+btmrvl_sdio
+btrfs
+btsdio
+bttv
+btuart_cs
+btusb
+button
+bw-qcam
+c67x00
+cachefiles
+cafe_ccic
+cafe_nand
+camellia
+can
+can-bcm
+can-dev
+can-raw
+capmode
+carminefb
+cassini
+cast5
+cast6
+catc
+cb710
+cb710-mmc
+cbc
+cciss
+cdc-acm
+cdc_eem
+cdc_ether
+cdc-phonet
+cdc_subset
+cdc-wdm
+cdrom
+cfg80211
+cfi_cmdset_0001
+cfi_cmdset_0002
+cfi_cmdset_0020
+cfi_probe
+cfi_util
+ch
+ch341
+chipreg
+cicada
+cifs
+cirrusfb
+clip
+cls_basic
+cls_flow
+cls_fw
+cls_route
+cls_rsvp
+cls_rsvp6
+cls_tcindex
+cls_u32
+cm109
+cn
+cnic
+cobra
+coda
+com20020
+com20020_cs
+com20020-pci
+com90io
+com90xx
+comm
+configfs
+container
+core
+cp210x
+cpia
+cpia2
+cpia_pp
+cpia_usb
+cpqarray
+cpufreq_stats
+c-qcam
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+crc32c
+crc7
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+crc-itu-t
+crc-t10dif
+cryptd
+cryptoloop
+crypto_null
+cs5345
+cs53l32a
+cts
+cuse
+cx18
+cx22700
+cx22702
+cx231xx
+cx231xx-alsa
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+cx2341x
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+cyberjack
+cyclades
+cyclomx
+cycx_drv
+cypress_cy7c63
+cypress_m8
+cytherm
+da9030_battery
+da9034-ts
+da903x
+da903x_bl
+DAC960
+davicom
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+de600
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+decnet
+deflate
+defxx
+des_generic
+dib0070
+dib3000mb
+dib3000mc
+dib7000m
+dib7000p
+dib8000
+dibx000_common
+digi_acceleport
+diskonchip
+display
+dl2k
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+dm-multipath
+dm-queue-length
+dm-region-hash
+dm-round-robin
+dm-service-time
+dm-snapshot
+dmx3191d
+dm-zero
+dnet
+dn_rtmsg
+doc2000
+doc2001
+doc2001plus
+docecc
+docprobe
+dpt_i2o
+drm
+drm_kms_helper
+ds1621
+ds1682
+ds2482
+ds2490
+ds2760_battery
+ds2782_battery
+dsbr100
+dscc4
+dst
+dst_ca
+dstr
+dtl1_cs
+dummy
+dv1394
+dvb-bt8xx
+dvb-core
+dvb-pll
+dvb-ttpci
+dvb-ttusb-budget
+dvb-usb
+dvb-usb-a800
+dvb-usb-af9005
+dvb-usb-af9005-remote
+dvb-usb-af9015
+dvb-usb-anysee
+dvb-usb-au6610
+dvb-usb-ce6230
+dvb-usb-cinergyT2
+dvb-usb-cxusb
+dvb-usb-dib0700
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+dvb-usb-dibusb-mb
+dvb-usb-dibusb-mc
+dvb-usb-digitv
+dvb-usb-dtt200u
+dvb-usb-dtv5100
+dvb-usb-dw2102
+dvb-usb-friio
+dvb-usb-gl861
+dvb-usb-gp8psk
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+dvb-usb-opera
+dvb-usb-ttusb2
+dvb-usb-umt-010
+dvb-usb-vp702x
+dvb-usb-vp7045
+e100
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+ecryptfs
+eeprom
+eeprom_93cx6
+eeti_ts
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+efs
+elo
+em28xx
+em28xx-dvb
+em_cmp
+emi26
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+em_meta
+em_nbyte
+empeg
+ems_pci
+ems_usb
+em_text
+emu10k1-gp
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+enic
+epat
+epca
+epia
+epic100
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+et61x251
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+ethoc
+evbug
+evdev
+exofs
+exportfs
+f71805f
+f71882fg
+f75375s
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+farsync
+fat
+faulty
+fb_sys_fops
+fcoe
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+fdomain
+fdomain_cs
+fealnx
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+firedtv
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+fit2
+fit3
+fm801-gp
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+forcedeth
+fore_200e
+freevxfs
+friq
+frpw
+fscache
+ftdi-elan
+ftdi_sio
+ftl
+fujitsu_ts
+funsoft
+g760a
+gadgetfs
+gamecon
+gameport
+garmin_gps
+garp
+g_audio
+g_cdc
+generic
+generic_bl
+gen_probe
+g_ether
+gf128mul
+gf2k
+g_file_storage
+gfs2
+ghash-generic
+girbil-sir
+gl518sm
+gl520sm
+gl620a
+gluebi
+g_midi
+g_printer
+grip
+grip_mp
+g_serial
+gspca_conex
+gspca_etoms
+gspca_finepix
+gspca_gl860
+gspca_jeilinj
+gspca_m5602
+gspca_main
+gspca_mars
+gspca_mr97310a
+gspca_ov519
+gspca_ov534
+gspca_pac207
+gspca_pac7311
+gspca_sn9c20x
+gspca_sonixb
+gspca_sonixj
+gspca_spca500
+gspca_spca501
+gspca_spca505
+gspca_spca506
+gspca_spca508
+gspca_spca561
+gspca_sq905
+gspca_sq905c
+gspca_stk014
+gspca_stv06xx
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+gspca_t613
+gspca_tv8532
+gspca_vc032x
+gspca_zc3xx
+gtco
+guillemot
+gunze
+g_zero
+hamachi
+hangcheck-timer
+hci_uart
+hci_vhci
+hdlc
+hdlc_cisco
+hdlcdrv
+hdlc_fr
+hdlc_ppp
+hdlc_raw
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+hdlc_x25
+hdpvr
+he
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+hexium_orion
+hfs
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+hid
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+hid-kensington
+hid-kye
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+hid-monterey
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+hid-sunplus
+hid-tmff
+hid-topseed
+hid-twinhan
+hid-wacom
+hid-zpff
+horizon
+hostap
+hostap_cs
+hostap_pci
+hostap_plx
+hp100
+hp4x
+hp_accel
+hpfs
+hpilo
+hptiop
+hso
+htc-pasic3
+hwa-hc
+hwa-rc
+hwmon-vid
+i1480-dfu-usb
+i1480-est
+i1480u-wlp
+i2400m
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+i2400m-usb
+i2c-algo-pca
+i2c-ali1535
+i2c-ali1563
+i2c-ali15x3
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+i2c-amd8111
+i2c-dev
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+i2c-isch
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+i2c-ocores
+i2c-parport
+i2c-parport-light
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+i2c-piix4
+i2c-scmi
+i2c-simtec
+i2c-sis5595
+i2c-sis630
+i2c-sis96x
+i2c-stub
+i2c-taos-evm
+i2c-tiny-usb
+i2c-via
+i2c-viapro
+i2c-voodoo3
+i2o_block
+i2o_bus
+i2o_config
+i2o_core
+i2o_proc
+i2o_scsi
+i5k_amb
+i82092
+ib_addr
+ib_cm
+ib_core
+ib_ipoib
+ib_mad
+ibmcam
+ib_mthca
+ibmtr_cs
+ib_sa
+icplus
+ics932s401
+idmouse
+idt77252
+ieee1394
+ifb
+iforce
+igbvf
+ili9320
+imm
+inexio
+initio
+input-polldev
+int51x1
+intel-rng
+intel_vr_nor
+interact
+ioc3
+ioc4
+io_edgeport
+io_ti
+iowarrior
+ip2
+ip6_queue
+ip6table_filter
+ip6table_mangle
+ip6table_raw
+ip6_tables
+ip6table_security
+ip6t_ah
+ip6t_eui64
+ip6t_frag
+ip6t_hbh
+ip6t_ipv6header
+ip6t_LOG
+ip6t_mh
+ip6t_REJECT
+ip6t_rt
+ipaq
+ipcomp
+ipddp
+ip_gre
+iphase
+ipip
+ipr
+ips
+iptable_filter
+iptable_mangle
+iptable_nat
+iptable_raw
+ip_tables
+iptable_security
+ipt_addrtype
+ipt_ah
+ipt_CLUSTERIP
+ipt_ecn
+ipt_ECN
+ipt_LOG
+ipt_MASQUERADE
+ipt_NETMAP
+ipt_REDIRECT
+ipt_REJECT
+ipt_ULOG
+ipv6
+ip_vs
+ip_vs_dh
+ip_vs_ftp
+ip_vs_lblc
+ip_vs_lblcr
+ip_vs_lc
+ip_vs_nq
+ip_vs_rr
+ip_vs_sed
+ip_vs_sh
+ip_vs_wlc
+ip_vs_wrr
+ipw
+ipw2100
+ipw2200
+ipx
+ircomm
+ir-common
+ircomm-tty
+irda
+irda-usb
+ir-kbd-i2c
+irlan
+irnet
+irtty-sir
+ir-usb
+iscsi_tcp
+isdn
+isdnhdlc
+isight_firmware
+isl29003
+isl6405
+isl6421
+isofs
+isp116x-hcd
+isp1362-hcd
+isp1760
+istallion
+it87
+iTCO_vendor_support
+iTCO_wdt
+itd1000
+iuu_phoenix
+ivtv
+ivtvfb
+iw_cm
+iw_cxgb3
+iwlagn
+iwlcore
+iwmc3200wifi
+ixgb
+ixgbe
+ixj
+ixj_pcmcia
+jedec_probe
+jffs2
+jfs
+jme
+joydev
+joydump
+jsm
+kafs
+kaweth
+kbic
+kbtab
+kernelcapi
+keyspan
+keyspan_pda
+keyspan_remote
+khazad
+kingsun-sir
+kl5kusb105
+kobil_sct
+konicawc
+ks0108
+ks0127
+ks8842
+ks8851
+ks8851_mll
+ks959-sir
+ksdazzle-sir
+ktti
+kvaser_pci
+kyrofb
+l2cap
+l64781
+lanai
+lapb
+lapbether
+lcd
+ldusb
+lec
+led-class
+leds-bd2802
+leds-da903x
+leds-dac124s085
+leds-lp3944
+leds-pca9532
+leds-pca955x
+leds-wm831x-status
+leds-wm8350
+ledtrig-backlight
+ledtrig-default-on
+ledtrig-heartbeat
+ledtrig-timer
+legousbtower
+lgdt3305
+lgdt330x
+lgs8gxx
+lib80211
+lib80211_crypt_ccmp
+lib80211_crypt_tkip
+lib80211_crypt_wep
+libata
+libcrc32c
+libertas
+libertas_cs
+libertas_sdio
+libertas_spi
+libertas_tf
+libertas_tf_usb
+libfc
+libfcoe
+libipw
+libiscsi
+libiscsi_tcp
+libosd
+libsas
+libsrp
+lightning
+linear
+lis3lv02d
+litelink-sir
+lkkbd
+llc2
+lm63
+lm70
+lm75
+lm77
+lm78
+lm80
+lm83
+lm8323
+lm85
+lm87
+lm90
+lm92
+lm93
+lm95241
+lmc
+lnbp21
+lockd
+loop
+lp
+lp3971
+lpddr_cmds
+lpfc
+lrw
+ltc4215
+ltc4245
+ltv350qv
+lxt
+lzo
+lzo_compress
+lzo_decompress
+m25p80
+m52790
+ma600-sir
+mac80211
+mac80211_hwsim
+macmodes
+magellan
+map_absent
+map_funcs
+map_ram
+map_rom
+marvell
+matroxfb_maven
+matrox_w1
+max1111
+max1586
+max1619
+max17040_battery
+max3100
+max6650
+max6875
+max7359_keypad
+mb862xxfb
+mc13783
+mc13783-core
+mc44s803
+mcp2120-sir
+mcs5000_ts
+mcs7780
+mcs7830
+mct_u232
+md4
+mdc800
+mdio
+mdio-bitbang
+md-mod
+megaraid
+megaraid_mbox
+megaraid_mm
+megaraid_sas
+metronomefb
+mfd-core
+mga
+michael_mic
+microtek
+mii
+minix
+mISDN_core
+mISDNinfineon
+mISDNipac
+mISDNisar
+mk712
+mkiss
+mlx4_core
+mlx4_en
+mlx4_ib
+mmc_block
+mmc_core
+mmc_spi
+mos7720
+mos7840
+moto_modem
+moxa
+mpoa
+mpt2sas
+mptbase
+mptctl
+mptfc
+mptlan
+mptsas
+mptscsih
+mptspi
+msdos
+msp3400
+mt2060
+mt20xx
+mt2131
+mt2266
+mt312
+mt352
+mt9m001
+mt9m111
+mt9t031
+mt9v011
+mt9v022
+mtd
+mtd_blkdevs
+mtdblock
+mtdblock_ro
+mtdchar
+mtdconcat
+mtd_dataflash
+mtd_oobtest
+mtdoops
+mtd_pagetest
+mtdram
+mtd_readtest
+mtd_speedtest
+mtd_stresstest
+mtd_subpagetest
+mtd_torturetest
+mtouch
+multipath
+mwl8k
+mxl5005s
+mxl5007t
+myri10ge
+nand
+nand_ecc
+nand_ids
+nandsim
+national
+natsemi
+navman
+nbd
+ncpfs
+ne2k-pci
+neofb
+net1080
+net2280
+netconsole
+netjet
+netrom
+netwave_cs
+netxen_nic
+newtonkbd
+nf_conntrack
+nf_conntrack_amanda
+nf_conntrack_ftp
+nf_conntrack_h323
+nf_conntrack_ipv4
+nf_conntrack_ipv6
+nf_conntrack_irc
+nf_conntrack_netbios_ns
+nf_conntrack_netlink
+nf_conntrack_pptp
+nf_conntrack_proto_dccp
+nf_conntrack_proto_gre
+nf_conntrack_proto_sctp
+nf_conntrack_proto_udplite
+nf_conntrack_sane
+nf_conntrack_sip
+nf_conntrack_tftp
+nf_defrag_ipv4
+nf_nat
+nf_nat_amanda
+nf_nat_ftp
+nf_nat_h323
+nf_nat_irc
+nf_nat_pptp
+nf_nat_proto_dccp
+nf_nat_proto_gre
+nf_nat_proto_sctp
+nf_nat_proto_udplite
+nf_nat_sip
+nf_nat_snmp_basic
+nf_nat_tftp
+nfnetlink
+nfnetlink_log
+nfnetlink_queue
+nfs
+nfs_acl
+nfsd
+nftl
+nf_tproxy_core
+n_hdlc
+nilfs2
+nl802154
+nls_ascii
+nls_cp1250
+nls_cp1251
+nls_cp1255
+nls_cp437
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+nls_cp775
+nls_cp850
+nls_cp852
+nls_cp855
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+nls_cp860
+nls_cp861
+nls_cp862
+nls_cp863
+nls_cp864
+nls_cp865
+nls_cp866
+nls_cp869
+nls_cp874
+nls_cp932
+nls_cp936
+nls_cp949
+nls_cp950
+nls_euc-jp
+nls_iso8859-1
+nls_iso8859-13
+nls_iso8859-14
+nls_iso8859-15
+nls_iso8859-2
+nls_iso8859-3
+nls_iso8859-4
+nls_iso8859-5
+nls_iso8859-6
+nls_iso8859-7
+nls_iso8859-9
+nls_koi8-r
+nls_koi8-ru
+nls_koi8-u
+nls_utf8
+nmclan_cs
+nop-usb-xceiv
+n_r3964
+ns558
+ns83820
+ntfs
+nvidiafb
+nxt200x
+nxt6000
+ocfs2
+ocfs2_dlm
+ocfs2_dlmfs
+ocfs2_nodemanager
+ocfs2_stackglue
+ocfs2_stack_o2cb
+ocfs2_stack_user
+ohci1394
+old_belkin-sir
+olympic
+omfs
+omninet
+on20
+on26
+onenand
+onenand_sim
+opencores-kbd
+oprofile
+opticon
+option
+or51132
+or51211
+orinoco
+orinoco_cs
+osd
+osdblk
+osst
+oti6858
+output
+ov7670
+ov772x
+ovcamchip
+oxu210hp-hcd
+p54common
+p54pci
+p54spi
+p54usb
+p8023
+paride
+parkbd
+parport
+parport_ax88796
+parport_cs
+parport_pc
+parport_serial
+pata_acpi
+pata_amd
+pata_atp867x
+pata_cs5520
+pata_efar
+pata_it8213
+pata_it821x
+pata_jmicron
+pata_marvell
+pata_mpiix
+pata_netcell
+pata_ninja32
+pata_oldpiix
+pata_pcmcia
+pata_pdc2027x
+pata_rdc
+pata_rz1000
+pata_sch
+pata_serverworks
+pata_sil680
+pata_sis
+pata_sl82c105
+pata_triflex
+pata_via
+pc87360
+pc87427
+pcap_keys
+pcap-regulator
+pcap_ts
+pcbc
+pcd
+pcf50633-adc
+pcf50633-charger
+pcf50633-core
+pcf50633-gpio
+pcf50633-input
+pcf50633-regulator
+pcf8591
+pci
+pci200syn
+pcips2
+pci_slot
+pcmcia
+pcmcia_core
+pcnet32
+pcnet_cs
+pcwd_pci
+pcwd_usb
+pd
+pd6729
+pda_power
+pdc_adma
+pegasus
+penmount
+pf
+pg
+phantom
+phonedev
+phonet
+phram
+physmap
+pktcdvd
+pktgen
+pl2303
+platform_lcd
+plat_nand
+plat-ram
+plip
+plusb
+pluto2
+pm2fb
+pm3fb
+pmc551
+pmcraid
+pn_pep
+powermate
+power_meter
+ppa
+ppdev
+ppp_async
+ppp_deflate
+ppp_generic
+ppp_mppe
+pppoatm
+pppoe
+pppol2tp
+pppox
+ppp_synctty
+pps_core
+prism54
+processor
+psmouse
+pt
+pvrusb2
+pwc
+qcserial
+qinfo_probe
+qla1280
+qla2xxx
+qla3xxx
+qla4xxx
+qlge
+qlogic_cs
+qlogicfas408
+qnx4
+qsemi
+qt1010
+quickcam_messenger
+quota_tree
+quota_v1
+quota_v2
+r128
+r8169
+r8a66597-hcd
+radeon
+radio-gemtek-pci
+radio-i2c-si470x
+radio-maestro
+radio-maxiradio
+radio-mr800
+radio-si4713
+radio-tea5764
+raid0
+raid1
+raid10
+raid456
+raid6_pq
+raid6test
+raid_class
+raw
+raw1394
+ray_cs
+rdma_cm
+rds
+rds_rdma
+rds_tcp
+redboot
+reed_solomon
+reiserfs
+rfc1051
+rfc1201
+rfcomm
+rfd_ftl
+rfkill
+ricoh_mmc
+rio500
+riscom8
+rivafb
+rmd128
+rmd160
+rmd256
+rmd320
+rndis_host
+rocket
+romfs
+rose
+rpcsec_gss_krb5
+rpcsec_gss_spkm3
+rrunner
+rsrc_nonstatic
+rt2400pci
+rt2500pci
+rt2500usb
+rt2800usb
+rt2x00lib
+rt2x00pci
+rt2x00usb
+rt61pci
+rt73usb
+rtc-ab3100
+rtc-bq4802
+rtc-ds1286
+rtc-ds1305
+rtc-ds1307
+rtc-ds1374
+rtc-ds1390
+rtc-ds1511
+rtc-ds1553
+rtc-ds1672
+rtc-ds1742
+rtc-ds3234
+rtc-efi
+rtc-fm3130
+rtc-isl1208
+rtc-m41t80
+rtc-m41t94
+rtc-m48t35
+rtc-m48t59
+rtc-m48t86
+rtc-max6900
+rtc-max6902
+rtc-pcap
+rtc-pcf2123
+rtc-pcf50633
+rtc-pcf8563
+rtc-pcf8583
+rtc-r9701
+rtc-rs5c348
+rtc-rs5c372
+rtc-rx8025
+rtc-rx8581
+rtc-s35390a
+rtc-stk17ta8
+rtc-twl4030
+rtc-v3020
+rtc-wm831x
+rtc-wm8350
+rtc-x1205
+rtl8150
+rtl8187
+rxkad
+s1d13xxxfb
+s2255drv
+s2io
+s3fb
+s5h1409
+s5h1411
+s5h1420
+saa5246a
+saa5249
+saa6588
+saa6752hs
+saa7110
+saa7115
+saa7127
+saa7134
+saa7134-alsa
+saa7134-dvb
+saa7134-empress
+saa7146
+saa7146_vv
+saa7164
+saa717x
+saa7185
+saa7191
+safe_serial
+sata_inic162x
+sata_mv
+sata_nv
+sata_promise
+sata_qstor
+sata_sil
+sata_sil24
+sata_sis
+sata_svw
+sata_sx4
+sata_uli
+sata_via
+sata_vsc
+savage
+savagefb
+sbp2
+sc92031
+sch_atm
+sch_cbq
+sch_drr
+sch_dsmark
+sch_gred
+sch_hfsc
+sch_htb
+sch_ingress
+sch_multiq
+sch_netem
+sch_prio
+sch_red
+sch_sfq
+sch_tbf
+sch_teql
+sco
+scsi_debug
+scsi_dh
+scsi_dh_alua
+scsi_dh_emc
+scsi_dh_hp_sw
+scsi_dh_rdac
+scsi_mod
+scsi_tgt
+scsi_transport_fc
+scsi_transport_iscsi
+scsi_transport_sas
+scsi_transport_spi
+scsi_transport_srp
+scsi_wait_scan
+sctp
+sdhci
+sdhci-pci
+sdhci-pltfm
+sdio_uart
+sd_mod
+sdricoh_cs
+se401
+seed
+serial_core
+serial_cs
+serio_raw
+sermouse
+serpent
+serport
+sfc
+sg
+sha1_generic
+sha256_generic
+sha512_generic
+si21xx
+si4713-i2c
+sidewinder
+siemens_mpi
+sierra
+sir-dev
+sis
+sis190
+sis5595
+sis900
+sisfb
+sisusbvga
+sit
+sja1000
+sja1000_platform
+skfp
+skge
+sky2
+sl811_cs
+sl811-hcd
+slhc
+slip
+slram
+sm501
+sm501fb
+smbfs
+smc91c92_cs
+smsc
+smsc47b397
+smsc47m1
+smsc47m192
+smsc9420
+smsc95xx
+smsdvb
+smsmdtv
+smssdio
+smsusb
+sn9c102
+snd
+snd-ac97-codec
+snd-ad1889
+snd-ak4114
+snd-ak4117
+snd-ak4xxx-adda
+snd-ali5451
+snd-als300
+snd-atiixp
+snd-atiixp-modem
+snd-au8810
+snd-au8820
+snd-au8830
+snd-aw2
+snd-azt3328
+snd-bt87x
+snd-ca0106
+snd-cmipci
+snd-cs4281
+snd-cs46xx
+snd-cs5535audio
+snd-cs8427
+snd-ctxfi
+snd-darla20
+snd-darla24
+snd-dummy
+snd-echo3g
+snd-emu10k1
+snd-emu10k1-synth
+snd-emu10k1x
+snd-emux-synth
+snd-ens1370
+snd-ens1371
+snd-es1938
+snd-es1968
+snd-fm801
+snd-gina20
+snd-gina24
+snd-hda-codec
+snd-hda-codec-analog
+snd-hda-codec-atihdmi
+snd-hda-codec-ca0110
+snd-hda-codec-cirrus
+snd-hda-codec-cmedia
+snd-hda-codec-conexant
+snd-hda-codec-idt
+snd-hda-codec-intelhdmi
+snd-hda-codec-nvhdmi
+snd-hda-codec-realtek
+snd-hda-codec-si3054
+snd-hda-codec-via
+snd-hda-intel
+snd-hdsp
+snd-hdspm
+snd-hwdep
+snd-i2c
+snd-ice1712
+snd-ice1724
+snd-ice17xx-ak4xxx
+snd-indigo
+snd-indigodj
+snd-indigodjx
+snd-indigoio
+snd-indigoiox
+snd-intel8x0
+snd-intel8x0m
+snd-korg1212
+snd-layla20
+snd-layla24
+snd-lx6464es
+snd-maestro3
+snd-mia
+snd-mixart
+snd-mixer-oss
+snd-mona
+snd-mpu401
+snd-mpu401-uart
+snd-mtpav
+snd-mts64
+snd-nm256
+snd-opl3-lib
+snd-opl3-synth
+snd-page-alloc
+snd-pcm
+snd-pcm-oss
+snd-pcxhr
+snd-pdaudiocf
+snd-portman2x4
+snd-pt2258
+snd-rawmidi
+snd-riptide
+snd-rme32
+snd-rme96
+snd-rme9652
+snd-seq
+snd-seq-device
+snd-seq-dummy
+snd-seq-midi
+snd-seq-midi-emul
+snd-seq-midi-event
+snd-seq-oss
+snd-seq-virmidi
+snd-serial-u16550
+snd-soc-ad1836
+snd-soc-ad1938
+snd-soc-ad73311
+snd-soc-ak4104
+snd-soc-ak4535
+snd-soc-ak4642
+snd-soc-core
+snd-soc-cs4270
+snd-soc-l3
+snd-soc-max9877
+snd-soc-pcm3008
+snd-soc-spdif
+snd-soc-ssm2602
+snd-soc-tlv320aic23
+snd-soc-tlv320aic26
+snd-soc-tlv320aic3x
+snd-soc-twl4030
+snd-soc-uda134x
+snd-soc-uda1380
+snd-soc-wm8350
+snd-soc-wm8400
+snd-soc-wm8510
+snd-soc-wm8523
+snd-soc-wm8580
+snd-soc-wm8728
+snd-soc-wm8731
+snd-soc-wm8750
+snd-soc-wm8753
+snd-soc-wm8776
+snd-soc-wm8900
+snd-soc-wm8903
+snd-soc-wm8940
+snd-soc-wm8960
+snd-soc-wm8961
+snd-soc-wm8971
+snd-soc-wm8974
+snd-soc-wm8988
+snd-soc-wm8990
+snd-soc-wm8993
+snd-soc-wm9081
+snd-soc-wm-hubs
+snd-sonicvibes
+snd-tea575x-tuner
+snd-timer
+snd-trident
+snd-usb-audio
+snd-usb-caiaq
+snd-usb-lib
+snd-util-mem
+snd-via82xx
+snd-via82xx-modem
+snd-virmidi
+snd-vx222
+snd-vx-lib
+snd-vxpocket
+snd-ymfpci
+soc_camera
+soc_camera_platform
+softdog
+solos-pci
+soundcore
+sound_firmware
+sp8870
+sp887x
+spaceball
+spaceorb
+spcp8x5
+specialix
+spectrum_cs
+speedfax
+speedtch
+spi_bitbang
+spi_butterfly
+spidev
+spi_lm70llp
+squashfs
+sr_mod
+ssb
+ssfdc
+sst25l
+st
+stallion
+starfire
+stb6000
+ste10Xp
+stex
+stinger
+stir4200
+stowaway
+stp
+stradis
+strip
+stv0288
+stv0297
+stv0299
+stv0900
+stv6110
+stv680
+sundance
+sungem
+sungem_phy
+sunhme
+suni
+sunkbd
+sunrpc
+svcrdma
+svgalib
+sx8
+sym53c500_cs
+sym53c8xx
+symbolserial
+synaptics_i2c
+synclink_cs
+synclink_gt
+synclinkmp
+syscopyarea
+sysfillrect
+sysimgblt
+sysv
+tcm825x
+tcp_bic
+tcp_highspeed
+tcp_htcp
+tcp_hybla
+tcp_illinois
+tcp_lp
+tcp_probe
+tcp_scalable
+tcp_vegas
+tcp_veno
+tcp_westwood
+tcp_yeah
+tcrypt
+tda10021
+tda10023
+tda10048
+tda1004x
+tda10086
+tda18271
+tda7432
+tda8083
+tda826x
+tda827x
+tda8290
+tda9840
+tda9875
+tda9887
+tdfx
+tdo24m
+tea
+tea5761
+tea5767
+tea6415c
+tea6420
+tehuti
+tekram-sir
+tg3
+tgr192
+thermal
+thermal_sys
+thmc50
+ths7303
+tifm_7xx1
+tifm_core
+tifm_sd
+timeriomem-rng
+tipc
+ti_usb_3410_5052
+tlan
+tle62x0
+tlv320aic23b
+tmdc
+tmiofb
+tmp401
+tmp421
+tms380tr
+tmscsim
+tmspci
+toim3232-sir
+touchit213
+touchright
+touchwin
+tpm
+tpm_atmel
+tpm_bios
+tpm_nsc
+tps65023-regulator
+tps6507x-regulator
+trancevibrator
+tridentfb
+ts_bm
+tsc2007
+ts_fsm
+ts_kmp
+tsl2550
+ttm
+ttpci-eeprom
+ttusb_dec
+ttusbdecfe
+tulip
+tuner
+tuner-simple
+tuner-types
+tuner-xc2028
+tunnel4
+turbografx
+tvaudio
+tveeprom
+tvp514x
+tvp5150
+tw9910
+twidjoy
+twl4030_keypad
+twl4030-pwrbutton
+twl4030-usb
+twl4030_wdt
+twofish
+twofish_common
+typhoon
+u132-hcd
+ubi
+ubifs
+udf
+ueagle-atm
+uinput
+uio
+uio_aec
+uio_cif
+uio_pci_generic
+uio_pdrv
+uio_pdrv_genirq
+uio_sercos3
+uio_smx
+uli526x
+ultracam
+umc
+umem
+ums-alauda
+ums-cypress
+ums-datafab
+ums-freecom
+ums-isd200
+ums-jumpshot
+ums-karma
+ums-onetouch
+ums-sddr09
+ums-sddr55
+ums-usbat
+upd64031a
+upd64083
+uPD98402
+usb8xxx
+usbatm
+usb_debug
+usbhid
+usblcd
+usbled
+usblp
+usbnet
+usbserial
+usbsevseg
+usb-storage
+usbtest
+usbtmc
+usbtouchscreen
+usbvideo
+usbvision
+userspace-consumer
+uss720
+uvcvideo
+uvesafb
+uwb
+v4l1-compat
+v4l2-common
+v4l2-compat-ioctl32
+v4l2-int-device
+vcan
+ves1820
+ves1x93
+veth
+vfat
+vgastate
+vgg2432a4
+via
+via686a
+viafb
+via-rhine
+via-sdmmc
+via-velocity
+vicam
+video1394
+videobuf-core
+videobuf-dma-sg
+videobuf-dvb
+videobuf-vmalloc
+videocodec
+videodev
+virtual
+visor
+vitesse
+vivi
+vlsi_ir
+vmac
+vp27smpx
+vpx3220
+vstusb
+vsxxxaa
+vt1211
+vt8231
+vt8623fb
+vxge
+w1_bq27000
+w1_ds2431
+w1_ds2433
+w1_ds2760
+w1_smem
+w1_therm
+w6692
+w83627ehf
+w83627hf
+w83781d
+w83791d
+w83792d
+w83793
+w83l785ts
+w9966
+w9968cf
+wacom
+wacom_w8001
+wanrouter
+wanxl
+warrior
+wavelan_cs
+wdt_pci
+whci
+whci-hcd
+whc-rc
+whiteheat
+wimax
+winbond-840
+wire
+wl1251
+wl1251_sdio
+wl1251_spi
+wl1271
+wl3501_cs
+wlp
+wm831x
+wm831x_bl
+wm831x-dcdc
+wm831x-hwmon
+wm831x-isink
+wm831x-ldo
+wm831x-on
+wm831x_power
+wm831x_wdt
+wm8350
+wm8350-hwmon
+wm8350-i2c
+wm8350_power
+wm8350-regulator
+wm8350_wdt
+wm8400-core
+wm8400-regulator
+wm8739
+wm8775
+wm97xx-ts
+wp512
+wpan-class
+wusb-cbaf
+wusbcore
+wusb-wa
+x25
+x25_asy
+xc5000
+xcbc
+xfrm4_mode_beet
+xfrm4_mode_transport
+xfrm4_mode_tunnel
+xfrm4_tunnel
+xfrm6_mode_beet
+xfrm6_mode_transport
+xfrm6_mode_tunnel
+xfrm_ipcomp
+xfrm_user
+xfs
+xhci
+xirc2ps_cs
+xircom_cb
+xor
+xp
+xpad
+xpc
+xpnet
+xprtrdma
+x_tables
+xt_CLASSIFY
+xt_cluster
+xt_comment
+xt_connbytes
+xt_connlimit
+xt_connmark
+xt_CONNMARK
+xt_CONNSECMARK
+xt_conntrack
+xt_dccp
+xt_dscp
+xt_DSCP
+xt_esp
+xt_hashlimit
+xt_helper
+xt_hl
+xt_HL
+xtkbd
+xt_LED
+xt_length
+xt_limit
+xt_mac
+xt_mark
+xt_MARK
+xt_multiport
+xt_NFLOG
+xt_NFQUEUE
+xt_NOTRACK
+xt_osf
+xt_physdev
+xt_pkttype
+xt_policy
+xt_quota
+xt_realm
+xt_recent
+xts
+xt_sctp
+xt_SECMARK
+xt_socket
+xt_state
+xt_statistic
+xt_string
+xt_tcpmss
+xt_TCPMSS
+xt_tcpudp
+xt_time
+xt_TPROXY
+xt_TRACE
+xt_u32
+xusbatm
+yam
+yealink
+yellowfin
+yenta_socket
+zatm
+zc0301
+zd1201
+zd1211rw
+zhenhua
+zl10036
+zl10039
+zl10353
+zlib
+zlib_deflate
+zr36016
+zr36050
+zr36060
+zr36067
+zr364xx
--- linux-mvl-dove-2.6.32.orig/debian.master/abi/2.6.32-34.73/ia64/ia64
+++ linux-mvl-dove-2.6.32/debian.master/abi/2.6.32-34.73/ia64/ia64
@@ -0,0 +1,9276 @@
+EXPORT_SYMBOL crypto/gf128mul 0x0c2f123f	gf128mul_4k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x1068004b	gf128mul_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x2f2889a0	gf128mul_init_64k_lle
+EXPORT_SYMBOL crypto/gf128mul 0x3755f990	gf128mul_init_64k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x384ef9ce	gf128mul_64k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x56af0dbd	gf128mul_x_ble
+EXPORT_SYMBOL crypto/gf128mul 0x83581089	gf128mul_init_4k_lle
+EXPORT_SYMBOL crypto/gf128mul 0x9b2560b9	gf128mul_init_4k_bbe
+EXPORT_SYMBOL crypto/gf128mul 0x9e13f6f6	gf128mul_lle
+EXPORT_SYMBOL crypto/gf128mul 0xbd17a0df	gf128mul_4k_lle
+EXPORT_SYMBOL crypto/gf128mul 0xc0890413	gf128mul_64k_lle
+EXPORT_SYMBOL crypto/gf128mul 0xd60736ec	gf128mul_free_64k
+EXPORT_SYMBOL crypto/xor 0x5b6c00e6	xor_blocks
+EXPORT_SYMBOL drivers/acpi/button 0x48193639	acpi_lid_open
+EXPORT_SYMBOL drivers/acpi/button 0x7b56bd05	acpi_lid_notifier_register
+EXPORT_SYMBOL drivers/acpi/button 0xaaf45875	acpi_lid_notifier_unregister
+EXPORT_SYMBOL drivers/acpi/processor 0x01ea811f	acpi_processor_unregister_performance
+EXPORT_SYMBOL drivers/acpi/processor 0x4e6904ba	acpi_processor_preregister_performance
+EXPORT_SYMBOL drivers/acpi/processor 0x8c87579c	acpi_processor_notify_smm
+EXPORT_SYMBOL drivers/acpi/processor 0xa5c3de7f	acpi_processor_register_performance
+EXPORT_SYMBOL drivers/acpi/processor 0xe8a3605f	acpi_processor_set_thermal_limit
+EXPORT_SYMBOL drivers/atm/suni 0x76110414	suni_init
+EXPORT_SYMBOL drivers/atm/uPD98402 0xd187074c	uPD98402_init
+EXPORT_SYMBOL drivers/block/loop 0x0f8be505	loop_register_transfer
+EXPORT_SYMBOL drivers/block/loop 0xbfee3ad5	loop_unregister_transfer
+EXPORT_SYMBOL drivers/block/paride/paride 0x15f8c057	pi_init
+EXPORT_SYMBOL drivers/block/paride/paride 0x364eee31	pi_write_block
+EXPORT_SYMBOL drivers/block/paride/paride 0x3fe7704a	pi_schedule_claimed
+EXPORT_SYMBOL drivers/block/paride/paride 0x48d9f824	paride_register
+EXPORT_SYMBOL drivers/block/paride/paride 0x4cd1a2de	pi_do_claimed
+EXPORT_SYMBOL drivers/block/paride/paride 0x7d378308	pi_read_regr
+EXPORT_SYMBOL drivers/block/paride/paride 0x8fd0de0c	pi_release
+EXPORT_SYMBOL drivers/block/paride/paride 0xba42243c	pi_read_block
+EXPORT_SYMBOL drivers/block/paride/paride 0xbaa50acf	pi_disconnect
+EXPORT_SYMBOL drivers/block/paride/paride 0xc71127f4	paride_unregister
+EXPORT_SYMBOL drivers/block/paride/paride 0xe04ab43b	pi_connect
+EXPORT_SYMBOL drivers/block/paride/paride 0xee7f698e	pi_write_regr
+EXPORT_SYMBOL drivers/cdrom/cdrom 0x068cf7e6	unregister_cdrom
+EXPORT_SYMBOL drivers/cdrom/cdrom 0x45b3b6a1	cdrom_number_of_slots
+EXPORT_SYMBOL drivers/cdrom/cdrom 0x4f476e96	init_cdrom_command
+EXPORT_SYMBOL drivers/cdrom/cdrom 0x575a1603	cdrom_media_changed
+EXPORT_SYMBOL drivers/cdrom/cdrom 0x74641398	cdrom_release
+EXPORT_SYMBOL drivers/cdrom/cdrom 0x865bf0c4	register_cdrom
+EXPORT_SYMBOL drivers/cdrom/cdrom 0x887c6f44	cdrom_mode_select
+EXPORT_SYMBOL drivers/cdrom/cdrom 0x915dd6f7	cdrom_get_last_written
+EXPORT_SYMBOL drivers/cdrom/cdrom 0x96bdca78	cdrom_ioctl
+EXPORT_SYMBOL drivers/cdrom/cdrom 0xafc59326	cdrom_mode_sense
+EXPORT_SYMBOL drivers/cdrom/cdrom 0xc44af78a	cdrom_get_media_event
+EXPORT_SYMBOL drivers/cdrom/cdrom 0xe1fba2e2	cdrom_open
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x10d7f4ac	agp_collect_device_status
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x1dd00873	agp_backend_acquire
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x2662d476	get_agp_version
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x291f7fe9	agp_generic_free_by_type
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x30226ddf	agp_device_command
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x31b7135f	agp_generic_enable
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x3421314a	agp_generic_create_gatt_table
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x3acfe815	agp_generic_mask_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x44487afb	agp_generic_free_gatt_table
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x47a5cb08	agp_bridge
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x4b085dbf	agp3_generic_configure
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x50d0735a	agp_generic_destroy_pages
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x52406291	agp_flush_chipset
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x55c93821	agp_generic_insert_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x575da4ac	agp_bind_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x5b3d1a3b	agp_find_bridge
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x5bc57bee	agp_generic_alloc_user
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x5bd30a02	agp_backend_release
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x5d0d8f08	agp_free_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x5e99b2a5	agp_generic_type_to_mask_type
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x63200482	agp_generic_alloc_by_type
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x673f815e	agp_bridges
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x6848be46	agp_generic_alloc_pages
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x742064bc	agp_generic_remove_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x7538b132	agp_off
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x8337aebb	agp3_generic_tlbflush
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x852dfb29	agp_allocate_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0x9b1f5dee	agp_generic_alloc_page
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xa4d4f0e6	global_cache_flush
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xac11064f	agp_copy_info
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xafc6acaa	agp_enable
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xb04ea8f0	agp_rebind_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xb9bd1331	agp_unbind_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xc2424641	agp3_generic_cleanup
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xc5d9c46c	agp_try_unsupported_boot
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xc65abeb7	agp3_generic_sizes
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xc84efb7c	agp_alloc_page_array
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xd0fef3b2	agp_free_key
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xd29506ef	agp_generic_destroy_page
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xde9b17ed	agp3_generic_fetch_size
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xeb65dc5c	agp_put_bridge
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xeb9f9bd5	agp_create_memory
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xf66c2730	agp_free_page_array
+EXPORT_SYMBOL drivers/char/agp/agpgart 0xf7a76617	agp_alloc_bridge
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x013e4536	drm_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x03b1fc82	drm_mode_create_dithering_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0836695c	drm_sman_takedown
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0937471f	drm_connector_property_get_value
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0c884fb3	drm_agp_unbind
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0e1e0935	drm_vblank_get
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x0e701519	drm_mm_put_block
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1298e233	drm_getsarea
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x141c68c1	drm_mode_create_dvi_i_properties
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1499c9e5	drm_vblank_put
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x16a16b8d	drm_agp_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1800ce81	drm_vblank_pre_modeset
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x197c7a06	drm_mm_takedown
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x19facacc	drm_get_drawable_info
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1a3ca15a	drm_core_ioremap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1b6e0b2a	drm_mm_dump_table
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1f072c59	drm_property_add_enum
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1f64b151	drm_exit
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x1fcfcf2d	drm_mode_attachmode_crtc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x20645642	drm_debug
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x207cf0cc	drm_framebuffer_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x21451ac4	drm_sman_owner_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x22d998d4	drm_agp_acquire
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x243e37fa	drm_mode_detachmode_crtc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x24679768	drm_master_put
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x24a5f714	drm_property_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x277d2911	drm_mode_config_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2804c797	drm_agp_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x28352286	drm_lock_take
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2916bf63	drm_sman_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2a001a1d	drm_agp_bind
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2a5b4213	drm_pci_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2a627f87	drm_gtf_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2a969a69	drm_free_agp
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2ae90f63	drm_mode_remove
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2c192842	drm_open
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x2eb2f903	drm_sman_free_key
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3060eb2b	drm_mode_create_scaling_mode_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3074f033	drm_order
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x30f023c2	drm_get_connector_name
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x33733ebc	drm_mode_destroy
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x35adcd2c	drm_core_ioremapfree
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x35d4dc61	drm_connector_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x36550753	drm_i2c_encoder_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x36dbc2ef	drm_mode_validate_clocks
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3c9a1409	drm_ht_just_insert_please
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3da45a06	drm_add_edid_modes
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x3e6ba30b	drm_sysfs_hotplug_event
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x444a631b	drm_mode_connector_list_update
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x47f82665	drm_mode_object_find
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x489e0a12	drm_core_ioremap_wc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x4db443f7	drm_mmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5523a08f	drm_connector_property_set_value
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x55f060ee	drm_sman_set_range
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x568a617b	drm_mm_debug_table
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x57f3bd20	drm_mode_config_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x580830f0	drm_mode_set_name
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x58fbf4db	drm_mode_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5b83ce3f	drm_agp_bind_pages
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x5ed5fb1c	drm_get_encoder_name
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x60123ae2	drm_sysfs_connector_remove
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x603b6319	drm_gem_mmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x60661a3d	drm_mode_create_tv_properties
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x60d247a9	drm_mm_get_block_range_generic
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6430ad81	drm_cvt_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6523efe1	drm_vblank_post_modeset
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x66ed6dac	drm_encoder_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x67ce2f08	drm_mode_probed_add
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x686321bf	drm_get_resource_start
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6cb8b8e4	drm_sysfs_connector_add
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6d2e5837	drm_ut_debug_printk
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6fa0e150	drm_crtc_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x6fc30481	drm_mode_hsync
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x705293bf	drm_compat_ioctl
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x72071bb2	drm_i_have_hw_lock
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7398b624	drm_fasync
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x747a7c27	drm_mode_validate_size
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x749d41fe	drm_rmmap_locked
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7524e5a1	drm_add_modes_noedid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x75ca0745	drm_get_resource_len
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x784915eb	drm_mode_vrefresh
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7becf9f2	drm_gem_object_handle_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7c1fd6c8	drm_mode_equal
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7c4dd2dd	drm_release
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7c9ee2e9	drm_gem_object_lookup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x7ca3118a	drm_connector_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8057f144	drm_mm_pre_get
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8591d9c6	drm_framebuffer_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x859923a1	drm_core_get_reg_ofs
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x85de09f5	drm_mode_width
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x87d6e7ef	drm_detect_hdmi_monitor
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8839be38	drm_handle_vblank
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x894e77d9	drm_ioctl
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8d74818b	drm_addbufs_pci
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x8f537f33	drm_get_dev
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x908c00a3	drm_vblank_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x90c9a14b	drm_mode_prune_invalid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x928f5a49	drm_mode_connector_attach_encoder
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x92f222bd	drm_crtc_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x94c0e017	drm_mm_scan_remove_block
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x95663f84	drm_get_edid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x983b926c	drm_mode_connector_update_edid_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9afa5c0a	drm_debugfs_remove_files
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9d00d725	drm_i2c_encoder_destroy
+EXPORT_SYMBOL drivers/gpu/drm/drm 0x9e386f74	drm_pci_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa0503b6c	drm_poll
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa1eabd87	drm_mode_list_concat
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa365ad96	drm_irq_install
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xa5c5cdce	drm_put_dev
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xaa55d16b	drm_do_probe_ddc_edid
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xac5bb14b	drm_vblank_count
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xae6d007a	drm_gem_vm_open
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xaf29788e	drm_sman_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xaf5f253a	drm_clflush_pages
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb168d800	drm_lock_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb2ce0505	drm_connector_attach_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb393a56f	drm_agp_enable
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb6da5c16	drm_mode_create_dirty_info_property
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xb80b99b3	drm_gem_handle_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xba6ed3df	drm_mm_search_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xbb5afb46	drm_mm_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xbbc4647f	drm_debugfs_create_files
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xbc87aec1	drm_mode_duplicate
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc0204c80	drm_property_destroy
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xc1c7458d	drm_mm_init_scan
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xca687468	drm_addbufs_agp
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcd4ffd3f	drm_idlelock_take
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xcdf2eff4	drm_mode_height
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd02160d6	drm_agp_release
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd08fa3f0	drm_mode_set_crtcinfo
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd2a984d3	drm_vblank_off
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3028e75	drm_sman_set_manager
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3bdb0dd	drm_irq_uninstall
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd3ffab51	drm_ht_remove
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd605fa17	drm_core_reclaim_buffers
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd63d6819	drm_core_get_map_ofs
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xd9dd0933	drm_gem_object_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdb6ae30b	drm_gem_vm_close
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd3febe2	drm_gem_object_free
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xdd49095c	drm_ht_insert_item
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe141cc71	drm_ati_pcigart_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe1457735	drm_ht_remove_item
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe1ad9948	drm_idlelock_release
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe24a7b88	drm_ht_find_item
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe4fd1468	drm_read
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe58098e2	drm_mm_search_free_in_range
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe5bdce7e	drm_mode_debug_printmodeline
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe5ce945e	drm_master_get
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe7ee142a	drm_rmmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe898eba4	drm_mm_clean
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe919dd5c	drm_sman_owner_clean
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe931d80e	drm_mode_connector_detach_encoder
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xe9c04bc8	drm_mm_scan_add_block
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xec97355a	drm_mode_crtc_set_gamma_size
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf1421d13	drm_mode_sort
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf42a2b26	drm_ht_create
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf4f6d3a2	drm_agp_chipset_flush
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf514425d	drm_encoder_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf7d0ccfb	drm_ati_pcigart_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf8445b48	drm_unbind_agp
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xf98e3e1b	drm_mm_get_block_generic
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfa4db7c7	drm_addmap
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfa710945	drm_vblank_init
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfdfbad19	drm_sman_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfe5d3a99	drm_sg_alloc
+EXPORT_SYMBOL drivers/gpu/drm/drm 0xfe5e7d0f	drm_agp_info
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x00f45606	drm_fb_helper_check_var
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x0e9c76cd	drm_helper_initial_config
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x173b5f32	drm_helper_resume_force_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x50d56f1f	drm_helper_hotplug_stage_two
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x5387c6f0	drm_helper_crtc_in_use
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x578de63d	drm_helper_disable_unused_functions
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x5ca255b6	drm_fb_helper_single_fb_probe
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x73136361	drm_fb_helper_fill_var
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x741c6e08	drm_helper_probe_single_connector_modes
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x74429fe7	drm_fb_helper_setcmap
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x8a7d924a	drm_fb_helper_add_connector
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x8fdace93	drm_crtc_helper_set_mode
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x9d251144	drm_fb_helper_panic
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0x9e0198a4	drm_fb_helper_blank
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xa1276d33	drm_helper_encoder_in_use
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xa78ceee4	drm_fb_helper_set_par
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xab4ce35c	drm_fb_helper_setcolreg
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xb719e8be	drm_fb_helper_free
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xb85c6e8c	drm_helper_connector_dpms
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xbf447b64	i2c_dp_aux_add_bus
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xc469c244	drm_fb_helper_restore
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xce8fc710	drm_helper_mode_fill_fb_struct
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xd37559fc	drm_helper_probe_connector_modes
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xe36345f3	drm_fb_helper_fill_fix
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xfad22d84	drm_crtc_helper_set_config
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xfc9eca70	drm_fb_helper_pan_display
+EXPORT_SYMBOL drivers/gpu/drm/drm_kms_helper 0xffa0be8f	drm_fb_helper_init_crtc_count
+EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0x1245222d	radeonfb_resize
+EXPORT_SYMBOL drivers/gpu/drm/radeon/radeon 0xc830f21d	radeonfb_remove
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x0136382e	ttm_suspend_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x041ffdc9	ttm_base_object_lookup
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x06e40763	ttm_bo_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x08281e80	ttm_bo_kmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x0902a271	ttm_bo_kunmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x138988af	ttm_tt_bind
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x227074a4	ttm_write_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x2359a5e3	ttm_ref_object_base_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x2e8d799b	ttm_read_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x2ffbf217	ttm_agp_backend_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x333ceaee	ttm_bo_move_memcpy
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x33f3e3b2	ttm_bo_wait
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x365feb2e	ttm_eu_reserve_buffers
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x3f59abf8	ttm_bo_wait_unreserved
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x40cca60c	ttm_base_object_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x44409a13	ttm_global_item_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x44810b88	ttm_bo_swapout_all
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x540f785c	ttm_bo_device_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x54163163	ttm_tt_populate
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x54715879	ttm_bo_wait_cpu
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x5511f853	ttm_bo_unreserve
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x586e7aec	ttm_bo_evict_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x58abe8f4	ttm_vt_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x5a101489	ttm_lock_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x5ca5cb47	ttm_global_item_ref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x5e695541	ttm_object_device_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x61bdb34f	ttm_eu_fence_buffer_objects
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x672d55bb	ttm_bo_unmap_virtual
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x673c26dc	ttm_bo_mmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x67d0846d	ttm_read_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x6a81ac15	ttm_mem_global_free
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x6c6cdd98	ttm_ref_object_add
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x6dfbf60f	ttm_vt_lock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x7cabc03c	ttm_bo_init_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x8239ce13	ttm_bo_clean_mm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x82e8f971	ttm_suspend_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x86a4066d	ttm_eu_backoff_reservation
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x8ae685b9	ttm_io_prot
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x8b03a9ee	ttm_fbdev_mmap
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x8b1c4419	ttm_tt_set_placement_caching
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x8d7f8017	ttm_bo_reserve
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x9384aa45	ttm_bo_move_accel_cleanup
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x938dc78d	ttm_bo_move_ttm
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x9645d08c	ttm_base_object_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0x9caf2968	ttm_mem_global_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xa128007c	ttm_object_device_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xa723d544	ttm_bo_mem_space
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xac0e50d1	ttm_round_pot
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xaf8246fa	ttm_bo_synccpu_write_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xbab583c6	ttm_object_file_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xc64022a6	ttm_bo_global_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xd18f7a9f	ttm_write_unlock
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xd61498ee	ttm_bo_validate
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xed221a14	ttm_object_file_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xed9e2764	ttm_bo_unref
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xf7255468	ttm_mem_global_init
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xf8ef27e6	ttm_bo_device_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xf9ae88dd	ttm_bo_synccpu_write_grab
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xfcce372b	ttm_bo_global_release
+EXPORT_SYMBOL drivers/gpu/drm/ttm/ttm 0xff5b368e	ttm_mem_global_alloc
+EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0x0903c239	vid_from_reg
+EXPORT_SYMBOL drivers/hwmon/hwmon-vid 0xef1c781c	vid_which_vrm
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0x4e9b33ce	i2c_pca_add_numbered_bus
+EXPORT_SYMBOL drivers/i2c/algos/i2c-algo-pca 0xc02f486c	i2c_pca_add_bus
+EXPORT_SYMBOL drivers/i2c/busses/i2c-amd756 0x2ab07607	amd756_smbus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x054e4c09	hpsb_selfid_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x05edc744	hpsb_iso_recv_listen_channel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x07958e3a	hpsb_iso_recv_set_channel_mask
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x090910a8	hpsb_node_write
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0918f5d3	hpsb_iso_shutdown
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0b234c4e	dma_prog_region_alloc
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0e2c8f7e	hpsb_read
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x0efd21dd	hpsb_make_readpacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x11992c7b	hpsb_iso_recv_start
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x158ac548	dma_region_offset_to_bus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x160b8ef1	hpsb_iso_wake
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1672c4a6	hpsb_iso_recv_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1a200e5a	csr1212_release_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1b0c378e	hpsb_free_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1c3fb60e	hpsb_unregister_highlevel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x1db8bfa1	hpsb_create_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x279f2d6f	hpsb_unregister_protocol
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2901adc2	hpsb_read_cycle_timer
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2a4cc36b	csr1212_attach_keyval_to_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2a9acf8a	hpsb_packet_sent
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2c04f388	hpsb_alloc_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x2ebf6e5a	dma_prog_region_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x35a91e6d	hpsb_iso_recv_release_packets
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3ac636f9	hpsb_register_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x3f10f9c8	hpsb_make_lock64packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x403f6a51	hpsb_get_hostinfo_bykey
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x481b3c9e	hpsb_make_lockpacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x48aaa608	hpsb_lock
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x498bf4e0	hpsb_unregister_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x49a95dc4	csr1212_get_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x4a9cd770	csr1212_parse_keyval
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x55ebc1dc	hpsb_free_tlabel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5773b57c	hpsb_get_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x588058dd	hpsb_packet_success
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x5f5fdd2f	csr1212_new_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x61a6ebb4	hpsb_iso_xmit_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x672ad148	dma_region_sync_for_device
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x68a16839	hpsb_iso_recv_flush
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x68b51e47	csr1212_read
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x71ecfc41	hpsb_destroy_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x71fa94bd	hpsb_node_fill_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x76bc1a5c	dma_region_free
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x76e12822	hpsb_register_highlevel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x796ba9d6	hpsb_allocate_and_register_addrspace
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7a17db82	hpsb_iso_stop
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7a20154e	hpsb_iso_xmit_sync
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x7ad1649f	hpsb_iso_xmit_queue_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x860dfc46	hpsb_get_tlabel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8879f8f0	dma_region_sync_for_cpu
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8dfdc78a	hpsb_iso_recv_unlisten_channel
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8ea97ebb	hpsb_bus_reset
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x8ec2b312	dma_region_alloc
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x99074c63	hpsb_packet_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9c9f156d	hpsb_selfid_complete
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9ddf980e	hpsb_set_hostinfo_key
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0x9e6ed0ef	hpsb_protocol_class
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa00d9a6f	hpsb_resume_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xa34d5da5	hpsb_make_streampacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xab6517fd	hpsb_add_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xae97cd18	hpsb_make_phypacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xaef57bb5	csr1212_detach_keyval_from_directory
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb5503258	dma_region_mmap
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xb72c63d4	hpsb_iso_packet_sent
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbcd8bc16	__hpsb_register_protocol
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xbf1324c0	hpsb_iso_xmit_start
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc2e1f482	hpsb_set_hostinfo
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc77c68c9	hpsb_update_config_rom
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc79e28cc	hpsb_iso_packet_received
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xc833183b	hpsb_alloc_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xcb0100b1	hpsb_make_writepacket
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xccadd770	hpsb_reset_bus
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xcd9e772b	dma_prog_region_free
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xdbffd0c2	hpsb_iso_n_ready
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xdd497b31	hpsb_send_packet
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xe4d91b1e	hpsb_update_config_rom_image
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xea4152ff	dma_region_init
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf05fd2d0	hpsb_set_packet_complete_task
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xf80ecd6e	hpsb_remove_host
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfba57f51	hpsb_speedto_str
+EXPORT_SYMBOL drivers/ieee1394/ieee1394 0xfdfcc4ec	hpsb_write
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x1d5aeebc	ohci1394_init_iso_tasklet
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0x4e5b43ea	ohci1394_stop_context
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0xbe2354df	ohci1394_register_iso_tasklet
+EXPORT_SYMBOL drivers/ieee1394/ohci1394 0xfd88324a	ohci1394_unregister_iso_tasklet
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x063e80b1	rdma_addr_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x4f73ddb2	rdma_copy_addr
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x5ba400d6	rdma_addr_cancel
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0x9f7b5224	rdma_addr_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xd76bc53c	rdma_translate_ip
+EXPORT_SYMBOL drivers/infiniband/core/ib_addr 0xf0faf990	rdma_resolve_ip
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x0cb2befd	ib_cm_listen
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x11dfd233	ib_send_cm_sidr_rep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x15874bc1	ib_send_cm_drep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x1dbc2c21	ib_send_cm_rej
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x350bf233	ib_send_cm_rtu
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x53e1231f	ib_send_cm_rep
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x6321a1db	ib_destroy_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x66ad20a6	ib_send_cm_mra
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x6e47a093	ib_send_cm_req
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x7ef133f4	ib_cm_notify
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x81fd4e7d	ib_create_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0x9b2fef18	cm_class
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xa058d6c1	ib_cm_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xadde3517	ib_send_cm_lap
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xb0ec0a7f	ib_send_cm_sidr_req
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xd6d97b39	ib_send_cm_apr
+EXPORT_SYMBOL drivers/infiniband/core/ib_cm 0xda12ce80	ib_send_cm_dreq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x00edee09	ib_get_dma_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x045d9380	ib_dispatch_event
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x06830b9a	ib_pack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0752a610	ib_free_fast_reg_page_list
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0afabeb8	ib_create_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0b2853c1	ib_destroy_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x0c7560e5	ib_alloc_pd
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x10e49414	ib_register_event_handler
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1173f78b	ib_resize_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x148ee941	ib_create_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1b8293c3	ib_alloc_fast_reg_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1bcd078b	ib_destroy_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1cfd3d86	ib_unregister_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1e491a04	ib_unmap_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x1e7c9a0b	ib_alloc_mw
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x2017d778	ib_find_cached_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x220a13e2	ib_unregister_event_handler
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x253095b4	ib_query_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3be43cee	ib_query_port
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x3f7567fd	ib_rate_to_mult
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x557a7bf3	ib_init_ah_from_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x568766db	ib_alloc_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6458f080	ib_modify_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x65d73a7b	ib_query_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x67e4268a	ib_rereg_phys_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6aaa50e2	ib_get_cached_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x6eab2717	ib_modify_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x763f8510	ib_dealloc_fmr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x79b49cb7	ib_destroy_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x7afe2b73	ib_modify_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x80d8666d	ib_destroy_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x80f51686	ib_alloc_fast_reg_page_list
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x813537ee	ib_set_client_data
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8640eaeb	ib_modify_qp_is_ok
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x87543d9c	ib_fmr_pool_unmap
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x87b614d8	ib_ud_header_pack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8bc05e63	ib_get_cached_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8d211d87	ib_alloc_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x8ee38e83	ib_create_cq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x93a7d21f	ib_get_cached_lmc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x96ce6c46	rdma_node_get_transport
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x981b7fc3	ib_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9d804fa1	mult_to_ib_rate
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0x9f6cb8f4	ib_dealloc_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa14346e7	ib_dereg_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xa40caf84	ib_create_ah_from_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xabb68943	ib_destroy_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xac26171a	ib_create_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xbe35bbd5	ib_attach_mcast
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc211921f	ib_modify_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc888da71	ib_find_gid
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xc8dea97d	ib_find_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xca3af3c0	ib_register_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xca43adf5	ib_query_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xcd1e4165	ib_fmr_pool_map_phys
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xce08fe03	ib_query_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xce9e8648	ib_modify_device
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xcefcf93f	ib_get_client_data
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd17ba9d1	ib_ud_header_init
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xd80afd64	ib_create_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xdc282508	ib_dealloc_mw
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xdd60b3bb	ib_query_srq
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xde4af885	ib_dealloc_pd
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe4d8b0ca	ib_modify_port
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe5f359a8	ib_flush_fmr_pool
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xe6352d41	ib_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xee9b4f82	ib_query_ah
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf258f22e	ib_query_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf36498b9	ib_ud_header_unpack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf859f29f	ib_find_cached_pkey
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xf96fc9de	ib_unpack
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xfec88e28	ib_reg_phys_mr
+EXPORT_SYMBOL drivers/infiniband/core/ib_core 0xffcfe265	ib_detach_mcast
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x0269da70	ib_process_mad_wc
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x0a16d556	ib_free_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x138ad6b5	ib_cancel_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x235c093b	ib_unregister_mad_agent
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x2b32dc3f	ib_register_mad_agent
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6d1c81b9	ib_get_rmpp_segment
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6ef787ed	ib_response_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x6f077fcf	ib_get_mad_data_offset
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x7b5d4b7a	ib_is_mad_class_rmpp
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x85d3933f	ib_register_mad_snoop
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0x9b9ad586	ib_post_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xaf06bf02	ib_modify_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xb52c93f0	ib_free_recv_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xb6f1c412	ib_redirect_mad_qp
+EXPORT_SYMBOL drivers/infiniband/core/ib_mad 0xfb7186ee	ib_create_send_mad
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x576fdbac	ib_sa_free_multicast
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x67b1b207	ib_init_ah_from_mcmember
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x7d977e2c	ib_sa_unregister_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x92d34866	ib_sa_register_client
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0x95f860cd	ib_sa_path_rec_get
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xadb04b88	ib_sa_service_rec_query
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xb48bf9f8	ib_init_ah_from_path
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xc0af403b	ib_sa_cancel_query
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xc7847eb6	ib_sa_get_mcmember_rec
+EXPORT_SYMBOL drivers/infiniband/core/ib_sa 0xd1bc63e2	ib_sa_join_multicast
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x08a16a5c	iw_cm_listen
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x0a2cf1dd	iw_cm_disconnect
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x35654647	iw_cm_connect
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x5ab757af	iw_cm_accept
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x60ec5902	iw_create_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x655d87ac	iw_cm_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0x898e98d5	iw_destroy_cm_id
+EXPORT_SYMBOL drivers/infiniband/core/iw_cm 0xd0eb59ee	iw_cm_reject
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x0f90d053	rdma_join_multicast
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x16f4ed11	rdma_set_service_type
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x21b9ca80	rdma_resolve_addr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x479ca00d	rdma_init_qp_attr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x5379a8df	rdma_connect
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0x8bcc1b68	rdma_set_ib_paths
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xa57da6f7	rdma_notify
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xac6fdf82	rdma_accept
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xadfbf8b4	rdma_bind_addr
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xb91bc17f	rdma_reject
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xc8f54221	rdma_disconnect
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xca1fdd06	rdma_leave_multicast
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xcc3911e9	rdma_listen
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xda4a470c	rdma_create_id
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xdd7b39e4	rdma_create_qp
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xe1a586f7	rdma_destroy_qp
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xef6bdbf9	rdma_destroy_id
+EXPORT_SYMBOL drivers/infiniband/core/rdma_cm 0xf43649cd	rdma_resolve_route
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x2d9e028e	gameport_unregister_driver
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x4bcb088a	gameport_close
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x4fe41352	gameport_set_phys
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x50cd60de	__gameport_register_driver
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x51d58d27	__gameport_register_port
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x6d290ec0	gameport_stop_polling
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x7ff17f1b	gameport_start_polling
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x8826fd50	gameport_open
+EXPORT_SYMBOL drivers/input/gameport/gameport 0x9b265499	gameport_unregister_port
+EXPORT_SYMBOL drivers/input/input-polldev 0x4c099c64	input_free_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0x6203c8f5	input_unregister_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0xd3c3a82d	input_register_polled_device
+EXPORT_SYMBOL drivers/input/input-polldev 0xe3a4ad31	input_allocate_polled_device
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x04403fcf	unregister_capi_driver
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x14f2aa5a	capi20_get_version
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2b8eab1f	capilib_free_ncci
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x2baa6586	capilib_new_ncci
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x318cb437	capi_ctr_ready
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x31c24aa4	capi20_isinstalled
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x36490d3b	capi_ctr_resume_output
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x47d3fc51	capi_info2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x47dbfa0a	capi_message2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x4e71f065	attach_capi_ctr
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x50b33ca4	capi_cmsg2message
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x5901e365	capi20_put_message
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x5d90499f	capi_ctr_suspend_output
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x6037e6d4	capi20_register
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x6057c6f3	capi_message2cmsg
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x60f7fdd2	detach_capi_ctr
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x62e32d43	capilib_data_b3_conf
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x71b1e196	capi_ctr_down
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x71e8d5ba	capilib_data_b3_req
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x788d398c	capi_cmsg2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7a33596c	capi20_get_serial
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x7e6f1307	capi20_get_manufacturer
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x8f699913	capilib_release
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x9eb92b18	capi20_release
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0x9f823278	register_capi_driver
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xa0b92597	capi_ctr_handle_message
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xaa165d27	capilib_release_appl
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb19fda8d	capi_cmd2str
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xb60e5e5f	capi_cmsg_header
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe19a11ac	capi20_get_profile
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xe9f62f29	cdebbuf_free
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xed061606	capi20_manufacturer
+EXPORT_SYMBOL drivers/isdn/capi/kernelcapi 0xf6282788	capi20_set_callback
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNipac 0x41d81c46	mISDNisac_irq
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNipac 0x6d885799	mISDNipac_init
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNipac 0xf17bc64f	mISDNipac_irq
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNipac 0xf9c6f721	mISDNisac_init
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNisar 0x6197085b	mISDNisar_init
+EXPORT_SYMBOL drivers/isdn/hardware/mISDN/mISDNisar 0x78680fae	mISDNisar_irq
+EXPORT_SYMBOL drivers/isdn/i4l/isdn 0x6d3cb529	register_isdn
+EXPORT_SYMBOL drivers/isdn/i4l/isdnhdlc 0x3b71e4fc	isdnhdlc_decode
+EXPORT_SYMBOL drivers/isdn/i4l/isdnhdlc 0x59cc8a7e	isdnhdlc_out_init
+EXPORT_SYMBOL drivers/isdn/i4l/isdnhdlc 0x8ee38862	isdnhdlc_rcv_init
+EXPORT_SYMBOL drivers/isdn/i4l/isdnhdlc 0xfd9d4c09	isdnhdlc_encode
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x2348cc3c	mISDN_FsmFree
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x31f1412a	recv_Echannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x33ab49be	get_next_dframe
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3a44a001	mISDN_freebchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3cbf13fc	mISDN_initbchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x3ea336fd	mISDN_FsmAddTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x413517c4	mISDN_clear_bchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x429129f2	mISDN_FsmRestartTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x4d15013d	queue_ch_frame
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x50c2230c	mISDN_FsmChangeState
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x50d7d54e	mISDN_unregister_device
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x5dc7400a	mISDN_clock_update
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x661ca44e	recv_Bchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x69a05e11	mISDN_unregister_Bprotocol
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x6eb284e1	get_next_bframe
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x8e869dea	create_l1
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0x9c03651d	bchannel_senddata
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xac9be359	mISDN_freedchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xace35cae	mISDN_FsmDelTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xb3daac61	l1_event
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xb4898e9b	recv_Dchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc3401729	mISDN_register_clock
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xc395ee84	recv_Bchannel_skb
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd113cb1b	recv_Dchannel_skb
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd285995f	mISDN_clock_get
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd5145151	mISDN_FsmEvent
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd5e9817c	confirm_Bsend
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd9a7fbfd	mISDN_FsmInitTimer
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xd9f2bc46	mISDN_register_device
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xda4db1c7	mISDN_register_Bprotocol
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe42f2c98	dchannel_senddata
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xe8f617eb	mISDN_unregister_clock
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf10fc17e	mISDN_initdchannel
+EXPORT_SYMBOL drivers/isdn/mISDN/mISDN_core 0xf9e7832f	mISDN_FsmNew
+EXPORT_SYMBOL drivers/md/dm-log 0x07506bf6	dm_dirty_log_create
+EXPORT_SYMBOL drivers/md/dm-log 0x78338dcd	dm_dirty_log_type_unregister
+EXPORT_SYMBOL drivers/md/dm-log 0xb9558907	dm_dirty_log_destroy
+EXPORT_SYMBOL drivers/md/dm-log 0xf15efb24	dm_dirty_log_type_register
+EXPORT_SYMBOL drivers/md/dm-snapshot 0x2247c324	dm_exception_store_create
+EXPORT_SYMBOL drivers/md/dm-snapshot 0x3d1222fa	dm_exception_store_type_register
+EXPORT_SYMBOL drivers/md/dm-snapshot 0x6ed2052f	dm_exception_store_type_unregister
+EXPORT_SYMBOL drivers/md/dm-snapshot 0xfe56402f	dm_exception_store_destroy
+EXPORT_SYMBOL drivers/md/md-mod 0x0462bf9e	md_unregister_thread
+EXPORT_SYMBOL drivers/md/md-mod 0x079e93c6	md_integrity_add_rdev
+EXPORT_SYMBOL drivers/md/md-mod 0x08b4b696	md_check_recovery
+EXPORT_SYMBOL drivers/md/md-mod 0x22e71f29	unregister_md_personality
+EXPORT_SYMBOL drivers/md/md-mod 0x2c7781c8	bitmap_cond_end_sync
+EXPORT_SYMBOL drivers/md/md-mod 0x32dff5f8	bitmap_close_sync
+EXPORT_SYMBOL drivers/md/md-mod 0x380c8131	md_check_no_bitmap
+EXPORT_SYMBOL drivers/md/md-mod 0x3e77cf35	md_integrity_register
+EXPORT_SYMBOL drivers/md/md-mod 0x44c8aac7	register_md_personality
+EXPORT_SYMBOL drivers/md/md-mod 0x4544cc2b	bitmap_endwrite
+EXPORT_SYMBOL drivers/md/md-mod 0x726b5811	md_set_array_sectors
+EXPORT_SYMBOL drivers/md/md-mod 0x731b3a0b	mddev_congested
+EXPORT_SYMBOL drivers/md/md-mod 0x75faa890	bitmap_unplug
+EXPORT_SYMBOL drivers/md/md-mod 0x8c8037b0	bitmap_start_sync
+EXPORT_SYMBOL drivers/md/md-mod 0x8f615354	md_done_sync
+EXPORT_SYMBOL drivers/md/md-mod 0xa6245f40	bitmap_end_sync
+EXPORT_SYMBOL drivers/md/md-mod 0xa723aa61	md_write_end
+EXPORT_SYMBOL drivers/md/md-mod 0xafe8dce7	md_wakeup_thread
+EXPORT_SYMBOL drivers/md/md-mod 0xe5a192c5	md_register_thread
+EXPORT_SYMBOL drivers/md/md-mod 0xef04ddcd	md_error
+EXPORT_SYMBOL drivers/md/md-mod 0xf3831c5a	md_write_start
+EXPORT_SYMBOL drivers/md/md-mod 0xf6257028	bitmap_startwrite
+EXPORT_SYMBOL drivers/md/md-mod 0xfe26cd15	md_wait_for_blocked_rdev
+EXPORT_SYMBOL drivers/md/raid6_pq 0x0bd662f6	raid6_gfmul
+EXPORT_SYMBOL drivers/md/raid6_pq 0x15fe0cd3	raid6_gfexp
+EXPORT_SYMBOL drivers/md/raid6_pq 0x5ba93f9d	raid6_gfinv
+EXPORT_SYMBOL drivers/md/raid6_pq 0xa20f2f7c	raid6_empty_zero_page
+EXPORT_SYMBOL drivers/md/raid6_pq 0xce45a6f1	raid6_gfexi
+EXPORT_SYMBOL drivers/media/common/tuners/mc44s803 0xcc7030a5	mc44s803_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mt2060 0x6ec9f3a3	mt2060_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mt2131 0x75419e43	mt2131_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mt2266 0x3573d8d9	mt2266_attach
+EXPORT_SYMBOL drivers/media/common/tuners/mxl5005s 0x1245fb2b	mxl5005s_attach
+EXPORT_SYMBOL drivers/media/common/tuners/qt1010 0x7c523230	qt1010_attach
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0x0cb4b189	tuners
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-types 0xc2821775	tuner_count
+EXPORT_SYMBOL drivers/media/common/tuners/tuner-xc2028 0x2c77c742	xc2028_attach
+EXPORT_SYMBOL drivers/media/common/tuners/xc5000 0xcaf63a06	xc5000_attach
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x00182210	flexcop_sram_ctrl
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x0fc831d7	flexcop_dma_config_timer
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x1de34de6	flexcop_i2c_request
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x1e858c20	flexcop_dma_free
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x256d0cde	flexcop_device_kmalloc
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x35d5921c	flexcop_pid_feed_control
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x3820a952	flexcop_dma_control_size_irq
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x3842d1db	flexcop_dma_config
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x39ffa8ea	flexcop_dma_control_timer_irq
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x3ee3400b	flexcop_pass_dmx_data
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x4c365de8	flexcop_device_initialize
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x57ce6a0a	flexcop_dma_allocate
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0x79103e2f	flexcop_device_kfree
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xb1dd8923	flexcop_dma_xfer_control
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xb791f07f	flexcop_wan_set_speed
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xbb0e7959	flexcop_sram_set_dest
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xc5163021	flexcop_eeprom_check_mac_addr
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xcad58019	flexcop_dump_reg
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xda51034e	flexcop_pass_dmx_packets
+EXPORT_SYMBOL drivers/media/dvb/b2c2/b2c2-flexcop 0xe13017b4	flexcop_device_exit
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x8fcaaaeb	bt878_start
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x93fa5c9e	bt878
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0x9d80ce37	bt878_device_control
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xc4678c84	bt878_stop
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/bt878 0xd5d0bdef	bt878_num
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x19b298cc	dst_error_bailout
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x3d4314e9	write_dst
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x48c39993	dst_wait_dst_ready
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x4e4272db	read_dst
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x71fc43ae	dst_pio_disable
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0x8d024bfd	dst_attach
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xa6998b74	dst_comm_init
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xb72d1b98	dst_error_recovery
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xe94b8c9c	dst_check_sum
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst 0xf825c40f	rdc_reset_state
+EXPORT_SYMBOL drivers/media/dvb/bt8xx/dst_ca 0x696e9fb9	dst_ca_attach
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x07d298c1	dvb_ringbuffer_empty
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x0c4d4a14	dvb_frontend_sleep_until
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x12ac9225	dvb_ringbuffer_flush_spinlock_wakeup
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x16cc7d44	dvb_ca_en50221_camchange_irq
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x21a47c8a	dvb_ca_en50221_camready_irq
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x37c4f727	dvb_generic_open
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x3b110bc1	dvb_frontend_reinitialise
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x4711487a	dvb_ca_en50221_frda_irq
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x476f1cca	dvb_net_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x4dc74624	dvb_ringbuffer_write
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x55e7cdfe	dvb_unregister_device
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x5d9942b9	dvb_unregister_adapter
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x6d3aedd3	dvb_ringbuffer_read
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x70accb4b	dvb_ringbuffer_free
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x74a5a698	dvb_filter_pes2ts_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x7cf5f1dd	dvb_register_device
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x80e3832d	dvb_filter_get_ac3info
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x8cccf787	dvb_generic_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x8fa4fc0a	dvb_dmx_swfilter_packets
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0x92bad3d5	dvb_net_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xa31783e1	dvb_ringbuffer_avail
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xa660408c	dvb_dmx_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xac4ca1b0	intlog2
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xac56e088	dvb_dmx_swfilter_204
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xb26796e0	dvb_ringbuffer_read_user
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xbbbea5b8	dvb_frontend_detach
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xbc0d91e1	timeval_usec_diff
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xc42cb472	dvb_dmxdev_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xc93a1999	dvb_dmx_swfilter
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xcb04ddda	dvb_dmx_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xd831d82a	dvb_dmxdev_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xd91c4778	dvb_ca_en50221_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe3e711d9	dvb_ringbuffer_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe5ae8707	intlog10
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xe91e012d	dvb_ca_en50221_release
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xefe7fced	dvb_generic_ioctl
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf46fe8cb	dvb_unregister_frontend
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf54b8028	dvb_register_frontend
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf6ecedc2	dvb_register_adapter
+EXPORT_SYMBOL drivers/media/dvb/dvb-core/dvb-core 0xf826deb0	dvb_filter_pes2ts
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x17029b26	dvb_usb_nec_rc_key_to_event
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x3b15a8ed	dvb_usb_get_hexline
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0x8a250d2d	usb_cypress_load_firmware
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xae279d20	dvb_usb_generic_rw
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xb73038e9	dvb_usb_device_exit
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xde5b3b0a	dvb_usb_device_init
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb 0xffcfb35a	dvb_usb_generic_write
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x08c4e4f8	af9005_rc_decode
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0x3693500b	af9005_rc_keys
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-af9005-remote 0xd3383957	af9005_rc_keys_size
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x03fccb7a	dibusb_rc_query
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x11f16725	dibusb2_0_power_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x16165660	dibusb_dib3000mc_tuner_attach
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x1f0916cc	dibusb_pid_filter
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x30660f93	dibusb_power_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x7da83cae	dibusb_i2c_algo
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0x8c8730bc	dibusb_read_eeprom_byte
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xa8ebff45	dibusb_streaming_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xbd3d668b	dibusb2_0_streaming_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xcc9ccaff	dibusb_rc_keys
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xd57dfba2	dibusb_pid_filter_ctrl
+EXPORT_SYMBOL drivers/media/dvb/dvb-usb/dvb-usb-dibusb-common 0xfe814a4d	dibusb_dib3000mc_frontend_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/af9013 0xf1399f1e	af9013_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/au8522 0x8ee32f49	au8522_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/bcm3510 0xb2617318	bcm3510_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx22700 0xa4977fdc	cx22700_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx22702 0x83c67c78	cx22702_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24110 0x5626ad13	cx24110_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0x1040a714	cx24113_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24113 0x82498481	cx24113_agc_callback
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24116 0x49a2f72b	cx24116_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0x03eec3f9	cx24123_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/cx24123 0x67c4191a	cx24123_get_tuner_i2c_adapter
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0x69741558	dib0070_wbd_offset
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0xb98bd221	dib0070_ctrl_agc_filter
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib0070 0xe36d1bdf	dib0070_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mb 0x144b4aab	dib3000mb_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x35c7f234	dib3000mc_i2c_enumeration
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x627fc4b2	dib3000mc_pid_control
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0x8498666b	dib3000mc_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xb28bb201	dib3000mc_pid_parse
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xb5f27669	dib3000mc_get_tuner_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib3000mc 0xf96a3629	dib3000mc_set_config
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0xb7890270	dib7000m_get_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000m 0xd0a2cbd6	dib7000m_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x4885e118	dib7000pc_detection
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0x4e9c8131	dib7000p_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xae8ceade	dib7000p_i2c_enumeration
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xba39a446	dib7000p_set_wbd_ref
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xe9533dde	dib7000p_set_gpio
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib7000p 0xedaa5ce8	dib7000p_get_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x0923cfc9	dib8000_i2c_enumeration
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x7c8b696d	dib8000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x7e03c2fa	dib8000_set_wbd_ref
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x92a6d2ba	dib8000_get_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dib8000 0x9b194a64	dib8000_set_gpio
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x1e05a040	dibx000_reset_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x2d9d61e3	dibx000_exit_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0x39cdc6df	dibx000_get_i2c_adapter
+EXPORT_SYMBOL drivers/media/dvb/frontends/dibx000_common 0xab72e2f3	dibx000_init_i2c_master
+EXPORT_SYMBOL drivers/media/dvb/frontends/dvb-pll 0xbb46b487	dvb_pll_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/isl6405 0x64ebd171	isl6405_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/isl6421 0xedf27d12	isl6421_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/itd1000 0x98d8cc98	itd1000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/l64781 0xef984e3f	l64781_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt3305 0x582e9218	lgdt3305_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lgdt330x 0x9d014638	lgdt330x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lgs8gxx 0xf65a3556	lgs8gxx_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0x737afef9	lnbp21_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/lnbp21 0x93650910	lnbh24_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/mt312 0x92a36231	mt312_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/mt352 0x9a260ddb	mt352_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/nxt200x 0x618cbbb5	nxt200x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/nxt6000 0xe62d5f25	nxt6000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/or51132 0x71c510f4	or51132_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/or51211 0x5bc03b45	or51211_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1409 0x272f7f0b	s5h1409_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1411 0x163eca37	s5h1411_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0x3d5bde0e	s5h1420_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/s5h1420 0xb45de0a7	s5h1420_get_tuner_i2c_adapter
+EXPORT_SYMBOL drivers/media/dvb/frontends/si21xx 0x8d1ad1d3	si21xx_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/sp8870 0x6be5fa92	sp8870_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/sp887x 0xffd9d920	sp887x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stb6000 0xff9a1db7	stb6000_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0288 0x716d8303	stv0288_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0297 0xb60eda09	stv0297_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0299 0xbf2e21d9	stv0299_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv0900 0xf6fc3193	stv0900_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/stv6110 0xc4a465af	stv6110_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10021 0xb112d41c	tda10021_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10023 0x228b48c0	tda10023_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10048 0x9c046314	tda10048_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x3a7e7d05	tda10046_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda1004x 0x5b1a890f	tda10045_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda10086 0xdd2b7110	tda10086_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda8083 0x8b5176e9	tda8083_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/tda826x 0xa8c3f285	tda826x_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/ves1820 0x88bcafed	ves1820_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/ves1x93 0xf5a8c0bd	ves1x93_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/zl10036 0xf432e08c	zl10036_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/zl10039 0x2b296cdb	zl10039_attach
+EXPORT_SYMBOL drivers/media/dvb/frontends/zl10353 0x7caf604b	zl10353_attach
+EXPORT_SYMBOL drivers/media/dvb/ttpci/ttpci-eeprom 0xec82aade	ttpci_eeprom_parse_mac
+EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0x9ee52729	ttusbdecfe_dvbs_attach
+EXPORT_SYMBOL drivers/media/dvb/ttusb-dec/ttusbdecfe 0xb52226e3	ttusbdecfe_dvbt_attach
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x11dc4b6d	bttv_gpio_enable
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x31c7142d	bttv_sub_unregister
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x88dc8714	bttv_get_pcidev
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x8c63ac64	bttv_sub_register
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0x8ecf4acc	bttv_write_gpio
+EXPORT_SYMBOL drivers/media/video/bt8xx/bttv 0xbcf2d2fb	bttv_read_gpio
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0x495e4b0c	btcx_calc_skips
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0x91b5326a	btcx_riscmem_free
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xad2fe38b	btcx_sort_clips
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xc368f8e6	btcx_align
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xcda0ded2	btcx_screen_clips
+EXPORT_SYMBOL drivers/media/video/btcx-risc 0xe6be2ba5	btcx_riscmem_alloc
+EXPORT_SYMBOL drivers/media/video/cpia 0xbe73e792	cpia_unregister_camera
+EXPORT_SYMBOL drivers/media/video/cpia 0xd2563712	cpia_register_camera
+EXPORT_SYMBOL drivers/media/video/cx18/cx18 0x2cdea06d	cx18_reset_ir_gpio
+EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0xa291bf15	cx231xx_unregister_extension
+EXPORT_SYMBOL drivers/media/video/cx231xx/cx231xx 0xf2287583	cx231xx_register_extension
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x155650f3	cx2341x_ctrl_get_menu
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x1ca0c084	cx2341x_log_status
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x2f25eee2	cx2341x_update
+EXPORT_SYMBOL drivers/media/video/cx2341x 0x5b88faf6	cx2341x_ext_ctrls
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf76ce95	cx2341x_fill_defaults
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xcf8b77a4	cx2341x_mpeg_ctrls
+EXPORT_SYMBOL drivers/media/video/cx2341x 0xe2c2b5eb	cx2341x_ctrl_query
+EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0xefd31f2b	vp3054_i2c_probe
+EXPORT_SYMBOL drivers/media/video/cx88/cx88-vp3054-i2c 0xf201812d	vp3054_i2c_remove
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x263e61df	cx88_video_mux
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x29aaaa88	cx88_set_control
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x964d35a6	cx88_set_freq
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0x9780421d	cx88_get_control
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xac4e53b9	cx88_user_ctrls
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xb0b25f7d	cx88_enum_input
+EXPORT_SYMBOL drivers/media/video/cx88/cx8800 0xd18001c3	cx8800_ctrl_query
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x248d10e5	cx8802_register_driver
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x377aefc8	cx8802_get_device
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x3a3516c9	cx8802_cancel_buffers
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x3c5b67ec	cx8802_unregister_driver
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x5e7bdfa2	cx8802_get_driver
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0x6bd5e65c	cx8802_buf_queue
+EXPORT_SYMBOL drivers/media/video/cx88/cx8802 0xdb3f5ccc	cx8802_buf_prepare
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x08cab33d	cx88_risc_buffer
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x0aff1ab7	cx88_sram_channel_setup
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x0cf3ef63	cx88_get_stereo
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x127ea4e7	cx88_dsp_detect_stereo_sap
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x43208524	cx88_vdev_init
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x4baeac5d	cx88_ir_stop
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x56ea8599	cx88_core_get
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x57d446f3	cx88_newstation
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x5d50aab5	cx88_set_scale
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x6141c8c5	cx88_tuner_callback
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x756d2c6b	cx88_reset
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x855f931b	cx88_set_tvnorm
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x86a81d40	cx88_wakeup
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x89ad7ac0	cx88_ir_start
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x904b8696	cx88_audio_thread
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x951a5dcf	cx88_set_stereo
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0x9b140fff	cx88_sram_channels
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xa070a0ce	cx88_sram_channel_dump
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xa087b5d9	cx88_shutdown
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb47f6cda	cx88_print_irqbits
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xb9580e0f	cx88_risc_databuffer
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xc0e0fda3	cx88_set_tvaudio
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xc2c9e343	cx88_core_irq
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xd1162037	cx88_free_buffer
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xd5f78f19	cx88_core_put
+EXPORT_SYMBOL drivers/media/video/cx88/cx88xx 0xddd65d74	cx88_risc_stopper
+EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0x5fcf4e4d	em28xx_register_extension
+EXPORT_SYMBOL drivers/media/video/em28xx/em28xx 0x7d4759c0	em28xx_unregister_extension
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x0c2c4b22	gspca_resume
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x1af98d79	gspca_frame_add
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x6c002619	gspca_suspend
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x75226e18	gspca_get_i_frame
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x7cc6804c	gspca_disconnect
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x7d2debb7	gspca_dev_probe
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x9670af2c	gspca_debug
+EXPORT_SYMBOL drivers/media/video/gspca/gspca_main 0x9eb9c354	gspca_auto_gain_n_exposure
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x14f67530	ivtv_debug
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x2878f06a	ivtv_init_on_first_open
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x2a370e16	ivtv_vapi_result
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x2c80ea31	ivtv_set_irq_mask
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x32a313eb	ivtv_reset_ir_gpio
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x35221fbe	ivtv_api
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x3710a677	ivtv_vapi
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x4470e17e	ivtv_udma_prepare
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x48c0a610	ivtv_udma_setup
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0x7716e154	ivtv_udma_unmap
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xe466031c	ivtv_udma_alloc
+EXPORT_SYMBOL drivers/media/video/ivtv/ivtv 0xe5b32ae5	ivtv_clear_irq_mask
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x04e83446	saa7134_tuner_callback
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x1211df5d	saa7134_devlist
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x14dfecc6	saa7134_boards
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x27c60234	saa7134_pgtable_alloc
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x3351e4c1	saa7134_pgtable_build
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x395ea01f	saa7134_ts_register
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x3b5b89ad	saa7134_set_dmabits
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x525db9c6	saa7134_dmasound_init
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0x5f2d3635	saa7134_pgtable_free
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xa2d03c8b	saa7134_dmasound_exit
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xc351d7f6	saa7134_set_gpio
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xc6397f5f	saa7134_devlist_lock
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xdc6bcd2c	saa7134_tvaudio_setmute
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xe61f589b	saa7134_ts_unregister
+EXPORT_SYMBOL drivers/media/video/saa7134/saa7134 0xf5851085	saa_dsp_writel
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x4654d80a	soc_camera_host_register
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x6b5fcceb	soc_camera_format_by_fourcc
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x86e4be9e	soc_camera_xlate_by_fourcc
+EXPORT_SYMBOL drivers/media/video/soc_camera 0x91c639c6	soc_camera_apply_sensor_flags
+EXPORT_SYMBOL drivers/media/video/soc_camera 0xbffd8541	soc_camera_host_unregister
+EXPORT_SYMBOL drivers/media/video/tveeprom 0xc7f0de57	tveeprom_read
+EXPORT_SYMBOL drivers/media/video/tveeprom 0xf280cba4	tveeprom_hauppauge_analog
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x0b9b1dc3	usbvideo_register
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x23ecbae1	RingQueue_Enqueue
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x37b98ec4	usbvideo_TestPattern
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x53c2849f	usbvideo_RegisterVideoDevice
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x5e1d70f4	RingQueue_WakeUpInterruptible
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x8291d20b	usbvideo_DeinterlaceFrame
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0x8d9ad30c	usbvideo_AllocateDevice
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xd5112b23	RingQueue_Dequeue
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xf4dcb853	RingQueue_Flush
+EXPORT_SYMBOL drivers/media/video/usbvideo/usbvideo 0xfba128bd	usbvideo_Deregister
+EXPORT_SYMBOL drivers/media/video/v4l1-compat 0x3b2c39e7	v4l_compat_translate_ioctl
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x03165a85	v4l2_ctrl_get_menu
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1dcaa0c8	v4l2_prio_max
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x1e326b97	v4l2_ctrl_query_fill
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x2f639468	v4l2_prio_check
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x42c8e001	v4l2_ctrl_next
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x495426ee	v4l2_ctrl_get_name
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x4ed5e0d7	v4l2_chip_match_host
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x50766d69	v4l2_ctrl_query_menu_valid_items
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x76ba9a9a	v4l2_prio_open
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x95284709	v4l2_prio_close
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9c7de443	v4l2_prio_change
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9eb43ee2	v4l2_ctrl_check
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0x9f144490	v4l2_chip_ident_i2c_client
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0xbecd2858	v4l2_prio_init
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0xd4b9f29f	v4l2_chip_match_i2c_client
+EXPORT_SYMBOL drivers/media/video/v4l2-common 0xd9ee1e3f	v4l2_ctrl_query_menu
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x233470a0	videobuf_dvb_find_frontend
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x3e632b9f	videobuf_dvb_alloc_frontend
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x7d5048f7	videobuf_dvb_dealloc_frontends
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0x947440db	videobuf_dvb_unregister_bus
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xb4228570	videobuf_dvb_register_bus
+EXPORT_SYMBOL drivers/media/video/videobuf-dvb 0xbab3f32e	videobuf_dvb_get_frontend
+EXPORT_SYMBOL drivers/media/video/videodev 0x0614dd5a	v4l2_video_std_frame_period
+EXPORT_SYMBOL drivers/media/video/videodev 0x123959a1	v4l2_type_names
+EXPORT_SYMBOL drivers/media/video/videodev 0x1ae7d7ff	video_ioctl2
+EXPORT_SYMBOL drivers/media/video/videodev 0x1f729620	video_devdata
+EXPORT_SYMBOL drivers/media/video/videodev 0x3adbd595	v4l2_field_names
+EXPORT_SYMBOL drivers/media/video/videodev 0x5ebefe4b	v4l_printk_ioctl
+EXPORT_SYMBOL drivers/media/video/videodev 0x9e54516a	video_device_release_empty
+EXPORT_SYMBOL drivers/media/video/videodev 0xab26c5a1	video_device_release
+EXPORT_SYMBOL drivers/media/video/videodev 0xb4427b3e	video_unregister_device
+EXPORT_SYMBOL drivers/media/video/videodev 0xcc0fea3f	video_usercopy
+EXPORT_SYMBOL drivers/media/video/videodev 0xe2b92059	v4l2_video_std_construct
+EXPORT_SYMBOL drivers/media/video/videodev 0xed846f7e	video_register_device
+EXPORT_SYMBOL drivers/media/video/videodev 0xf1165e46	video_device_alloc
+EXPORT_SYMBOL drivers/media/video/videodev 0xf233590e	video_register_device_no_warn
+EXPORT_SYMBOL drivers/media/video/videodev 0xf3251e7b	v4l2_norm_to_name
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0x259a40e8	videocodec_attach
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0xe5633292	videocodec_register
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0xe7a5fa4b	videocodec_detach
+EXPORT_SYMBOL drivers/media/video/zoran/videocodec 0xec67b461	videocodec_unregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x1b0cd486	mpt_set_taskmgmt_in_progress_flag
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x3bded850	mpt_print_ioc_summary
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4526289b	mpt_event_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4ceeb2c2	mpt_event_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x4f6b97a8	mpt_detach
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x502108d0	mpt_fwfault_debug
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x52d8984b	mpt_suspend
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x55f0bd44	mpt_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x568ca029	mpt_resume
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x569f5861	mptbase_sas_persist_operation
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x571eacad	mpt_clear_taskmgmt_in_progress_flag
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x64067b3e	mpt_put_msg_frame_hi_pri
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x6f127590	mpt_HardResetHandler
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x7828bef0	mpt_raid_phys_disk_pg0
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x847fee4b	mpt_halt_firmware
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x9349f6d5	mpt_free_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0x972ab65f	mpt_attach
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xa29765a9	mpt_put_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xa972ed18	mpt_free_fw_memory
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xb4f2f020	mpt_reset_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xb52cc526	mpt_send_handshake_request
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xbfe9ff7a	mpt_alloc_fw_memory
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc0e69f82	mpt_device_driver_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc2895034	mpt_verify_adapter
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc47c22e8	mpt_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xc84fed91	mpt_config
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xcc7a6ad4	mpt_get_msg_frame
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd05efa66	mpt_findImVolumes
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xd9a92a75	mpt_reset_deregister
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xdb0a691c	mpt_device_driver_register
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xdd805159	ioc_list
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xe5480c1d	mpt_raid_phys_disk_get_num_paths
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xe7145f33	mpt_raid_phys_disk_pg1
+EXPORT_SYMBOL drivers/message/fusion/mptbase 0xfa8522c4	mpt_GetIocState
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x02de2819	mptscsih_remove
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x08379db9	mptscsih_slave_configure
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x10b5170f	mptscsih_proc_info
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x10b5dec0	mptscsih_host_attrs
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x15fa79ee	mptscsih_get_scsi_lookup
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x2f870173	mptscsih_bios_param
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x4bc4eb5f	mptscsih_is_phys_disk
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x546e6eca	mptscsih_ioc_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x5dd6e0d5	mptscsih_qcmd
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x64fdd7fa	mptscsih_io_done
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x6cbaed72	mptscsih_event_process
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x6f6c8b02	mptscsih_change_queue_depth
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x7b4b64ad	mptscsih_bus_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x7f66e100	mptscsih_abort
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x7fec090e	mptscsih_host_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x7ffe85ab	mptscsih_dev_reset
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x8219ab6b	mptscsih_taskmgmt_response_code
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x824598a6	mptscsih_resume
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x8624e070	mptscsih_suspend
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x9eb7d261	mptscsih_shutdown
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x9f94f45b	mptscsih_raid_id_to_num
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0x9fbfe497	mptscsih_info
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xd77a4ba2	mptscsih_taskmgmt_complete
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xea9f3898	mptscsih_IssueTaskMgmt
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xf3ef86ff	mptscsih_slave_destroy
+EXPORT_SYMBOL drivers/message/fusion/mptscsih 0xfddbcc20	mptscsih_scandv_complete
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x1ca8e310	i2o_device_claim
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x238d49ef	i2o_msg_get_wait
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x268862d4	i2o_msg_post_wait_mem
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x29cc42db	i2o_parm_issue
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x29e54509	i2o_driver_unregister
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2a843bef	i2o_dump_message
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x2b578ba8	i2o_status_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x38d6c08c	i2o_cntxt_list_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x3b0246e8	i2o_driver_register
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x52d5c7f9	i2o_device_claim_release
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x656301d2	i2o_parm_table_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x6e106151	i2o_driver_notify_device_add_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x735e2bd8	i2o_event_register
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x79f94777	i2o_driver_notify_controller_remove_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x8af816bc	i2o_parm_field_get
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x96046f70	i2o_find_iop
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x9745d0c4	i2o_cntxt_list_add
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0x98a779e9	i2o_driver_notify_device_remove_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xa6cf0dfb	i2o_cntxt_list_remove
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb026b592	i2o_cntxt_list_get_ptr
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xb4c00dcf	i2o_controllers
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xc86b7936	i2o_iop_find_device
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xf26227c1	i2o_driver_notify_controller_add_all
+EXPORT_SYMBOL drivers/message/i2o/i2o_core 0xf7b16788	i2o_exec_lct_get
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x36d89a89	ab3100_set_register_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x58e5e92c	ab3100_get_register_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x595dd545	ab3100_event_registers_startup_state_get
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x5dcabc49	ab3100_get_register_page_interruptible
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x90dddb62	ab3100_get_chip_type
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0x9af5beb0	ab3100_event_register
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xf16d1d80	ab3100_event_unregister
+EXPORT_SYMBOL drivers/mfd/ab3100-core 0xfc6f7b0a	ab3100_mask_and_set_register_interruptible
+EXPORT_SYMBOL drivers/mfd/htc-pasic3 0x24285368	pasic3_write_register
+EXPORT_SYMBOL drivers/mfd/htc-pasic3 0xe777269d	pasic3_read_register
+EXPORT_SYMBOL drivers/mfd/mfd-core 0x1ff1e66f	mfd_add_devices
+EXPORT_SYMBOL drivers/mfd/mfd-core 0xd4de9269	mfd_remove_devices
+EXPORT_SYMBOL drivers/misc/c2port/core 0x00afa58f	c2port_device_unregister
+EXPORT_SYMBOL drivers/misc/c2port/core 0x27eeceb4	c2port_device_register
+EXPORT_SYMBOL drivers/misc/ioc4 0x883d6fe3	ioc4_register_submodule
+EXPORT_SYMBOL drivers/misc/ioc4 0xd293b723	ioc4_unregister_submodule
+EXPORT_SYMBOL drivers/misc/tifm_core 0x3c1aa9db	tifm_free_device
+EXPORT_SYMBOL drivers/misc/tifm_core 0x425201ce	tifm_map_sg
+EXPORT_SYMBOL drivers/misc/tifm_core 0x4ffb837b	tifm_has_ms_pif
+EXPORT_SYMBOL drivers/misc/tifm_core 0x5ba46973	tifm_free_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0x7df8587d	tifm_register_driver
+EXPORT_SYMBOL drivers/misc/tifm_core 0x870cc270	tifm_eject
+EXPORT_SYMBOL drivers/misc/tifm_core 0x9122149e	tifm_unmap_sg
+EXPORT_SYMBOL drivers/misc/tifm_core 0x9f1a0975	tifm_add_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0xc445460d	tifm_alloc_device
+EXPORT_SYMBOL drivers/misc/tifm_core 0xcd153284	tifm_queue_work
+EXPORT_SYMBOL drivers/misc/tifm_core 0xd932545b	tifm_unregister_driver
+EXPORT_SYMBOL drivers/misc/tifm_core 0xf6e86243	tifm_alloc_adapter
+EXPORT_SYMBOL drivers/misc/tifm_core 0xfb848021	tifm_remove_adapter
+EXPORT_SYMBOL drivers/mmc/card/mmc_block 0x973fa588	mmc_cleanup_queue
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x049da46f	mmc_power_restore_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x081f205a	mmc_free_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x0e848575	mmc_wait_for_cmd
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x0ead10e5	mmc_add_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x16360d07	mmc_card_sleep
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x184b82fb	mmc_vddrange_to_ocrmask
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x1b248759	mmc_host_enable
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x34ba2750	mmc_host_lazy_disable
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x401cb11d	mmc_card_awake
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x4b31b8be	mmc_wait_for_req
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x4d244288	mmc_resume_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x56df5a59	mmc_regulator_set_ocr
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x7635029b	__mmc_claim_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x8ad59cb9	mmc_release_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x8e31a44c	mmc_try_claim_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x8e3ec900	mmc_alloc_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x9d8d1803	mmc_host_disable
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x9f0da54a	mmc_request_done
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0x9fea46b0	mmc_detect_change
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xa174a91a	mmc_wait_for_app_cmd
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xb22fc9bc	mmc_suspend_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xbf410aef	mmc_register_driver
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xc549a5ec	mmc_power_save_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xe07889f0	mmc_align_data_size
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xe770fe67	mmc_remove_host
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xed243861	mmc_unregister_driver
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xeee4173a	mmc_card_can_sleep
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xf494f618	mmc_regulator_get_ocrmask
+EXPORT_SYMBOL drivers/mmc/core/mmc_core 0xff37eb62	mmc_set_data_timeout
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x80c821d1	cfi_varsize_frob
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0x990cf453	cfi_fixup
+EXPORT_SYMBOL drivers/mtd/chips/cfi_util 0xd3e88b07	cfi_read_pri
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x1a4b8661	register_mtd_chip_driver
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x1bbf59ed	do_map_probe
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x38a3e747	unregister_mtd_chip_driver
+EXPORT_SYMBOL drivers/mtd/chips/chipreg 0x827f8779	map_destroy
+EXPORT_SYMBOL drivers/mtd/chips/gen_probe 0x5bbf05b3	mtd_do_chip_probe
+EXPORT_SYMBOL drivers/mtd/lpddr/lpddr_cmds 0x152df1c4	lpddr_cmdset
+EXPORT_SYMBOL drivers/mtd/maps/map_funcs 0xb6dfdaf1	simple_map_init
+EXPORT_SYMBOL drivers/mtd/mtd 0x5a9b0a0e	add_mtd_partitions
+EXPORT_SYMBOL drivers/mtd/mtd 0xfcdad9a4	del_mtd_partitions
+EXPORT_SYMBOL drivers/mtd/mtdconcat 0x1a49b2a1	mtd_concat_create
+EXPORT_SYMBOL drivers/mtd/mtdconcat 0x33a3607c	mtd_concat_destroy
+EXPORT_SYMBOL drivers/mtd/nand/nand 0x97a39eae	nand_default_bbt
+EXPORT_SYMBOL drivers/mtd/nand/nand 0xed63e4b6	nand_scan_bbt
+EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0x45ffa944	nand_calculate_ecc
+EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0xb4b94377	__nand_correct_data
+EXPORT_SYMBOL drivers/mtd/nand/nand_ecc 0xf0f4c6e3	nand_correct_data
+EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0x836bdb72	nand_flash_ids
+EXPORT_SYMBOL drivers/mtd/nand/nand_ids 0xa336feb7	nand_manuf_ids
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x158beeae	onenand_scan_bbt
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x43d7a9b4	onenand_default_bbt
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x4ea477b7	flexonenand_region
+EXPORT_SYMBOL drivers/mtd/onenand/onenand 0x8fd39da4	onenand_addr
+EXPORT_SYMBOL drivers/net/8390 0x06b992b7	ei_start_xmit
+EXPORT_SYMBOL drivers/net/8390 0x12b1905b	ei_get_stats
+EXPORT_SYMBOL drivers/net/8390 0x2565c907	ei_close
+EXPORT_SYMBOL drivers/net/8390 0x39d403b5	__alloc_ei_netdev
+EXPORT_SYMBOL drivers/net/8390 0x5f1c709f	ei_set_multicast_list
+EXPORT_SYMBOL drivers/net/8390 0x865eb705	NS8390_init
+EXPORT_SYMBOL drivers/net/8390 0x86c9400e	ei_tx_timeout
+EXPORT_SYMBOL drivers/net/8390 0xaa0b2591	ei_poll
+EXPORT_SYMBOL drivers/net/8390 0xb0cc2df8	ei_open
+EXPORT_SYMBOL drivers/net/8390 0xd7f9998d	ei_netdev_ops
+EXPORT_SYMBOL drivers/net/8390 0xdd365790	ei_interrupt
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x23f86078	arcnet_interrupt
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x28dacba3	arc_proto_default
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x2b2f8c46	arcnet_timeout
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x2df26ab2	arc_bcast_proto
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x6534792a	arcnet_debug
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x701c4008	arcnet_open
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x7ce7aedc	arcnet_unregister_proto
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x91d21e01	arcnet_send_packet
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0x96ef3c8f	arc_raw_proto
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xa40b4667	arc_proto_map
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xd0ee9349	alloc_arcdev
+EXPORT_SYMBOL drivers/net/arcnet/arcnet 0xe7443eea	arcnet_close
+EXPORT_SYMBOL drivers/net/arcnet/com20020 0x1419dc37	com20020_check
+EXPORT_SYMBOL drivers/net/arcnet/com20020 0x1c77fe6e	com20020_netdev_ops
+EXPORT_SYMBOL drivers/net/arcnet/com20020 0x441b2ff5	com20020_found
+EXPORT_SYMBOL drivers/net/bnx2 0x251db192	bnx2_cnic_probe
+EXPORT_SYMBOL drivers/net/cnic 0x3abe4641	cnic_register_driver
+EXPORT_SYMBOL drivers/net/cnic 0x636af174	cnic_unregister_driver
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x24c1e38f	cxgb3_unregister_client
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x2d2e0ece	cxgb3_free_stid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x3cfe3213	t3_l2t_send_event
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x4ce82579	cxgb3_alloc_atid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x4e872f13	cxgb3_free_atid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x4fe06bc1	cxgb3_alloc_stid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x529638b5	cxgb3_ofld_send
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x5b0bd735	t3_l2t_get
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x5f1b0634	t3_l2t_send_slow
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0x6b77c11c	dev2t3cdev
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xa42eec17	cxgb3_remove_tid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xc80ac39f	cxgb3_insert_tid
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xc8bc34c6	t3_register_cpl_handler
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xce9152e3	t3_l2e_free
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xe96f1ea8	cxgb3_queue_tid_release
+EXPORT_SYMBOL drivers/net/cxgb3/cxgb3 0xf004b4a8	cxgb3_register_client
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x1e460697	hdlcdrv_arbitrate
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x20988768	hdlcdrv_receiver
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0x4cb7594b	hdlcdrv_register
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xa63b492f	hdlcdrv_transmitter
+EXPORT_SYMBOL drivers/net/hamradio/hdlcdrv 0xade16e73	hdlcdrv_unregister
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x95b2b431	sirdev_raw_read
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0x9e531b83	sirdev_set_dongle
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xba8690e9	sirdev_raw_write
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xbd4b9023	sirdev_set_dtr_rts
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xd46ce33f	irda_unregister_dongle
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xd76244e8	sirdev_write_complete
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xdd5ff539	irda_register_dongle
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xe6c01d72	sirdev_get_instance
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xf097cdcd	sirdev_receive
+EXPORT_SYMBOL drivers/net/irda/sir-dev 0xff179cff	sirdev_put_instance
+EXPORT_SYMBOL drivers/net/mdio 0x0f934475	mdio45_ethtool_gset_npage
+EXPORT_SYMBOL drivers/net/mdio 0x22bce513	mdio_mii_ioctl
+EXPORT_SYMBOL drivers/net/mdio 0x43e4defc	mdio45_nway_restart
+EXPORT_SYMBOL drivers/net/mdio 0x7577f992	mdio_set_flag
+EXPORT_SYMBOL drivers/net/mdio 0xa1a29548	mdio45_probe
+EXPORT_SYMBOL drivers/net/mdio 0xb34a7575	mdio45_ethtool_spauseparam_an
+EXPORT_SYMBOL drivers/net/mdio 0xc6b1163f	mdio45_links_ok
+EXPORT_SYMBOL drivers/net/mii 0x10ce5961	mii_check_link
+EXPORT_SYMBOL drivers/net/mii 0x12124bbd	mii_ethtool_gset
+EXPORT_SYMBOL drivers/net/mii 0x2baccea4	mii_check_media
+EXPORT_SYMBOL drivers/net/mii 0x4810c76d	mii_nway_restart
+EXPORT_SYMBOL drivers/net/mii 0x64877ddd	generic_mii_ioctl
+EXPORT_SYMBOL drivers/net/mii 0x7ad666cc	mii_check_gmii_support
+EXPORT_SYMBOL drivers/net/mii 0x87e17770	mii_link_ok
+EXPORT_SYMBOL drivers/net/mii 0xe85cc4cd	mii_ethtool_sset
+EXPORT_SYMBOL drivers/net/phy/mdio-bitbang 0x9e3c6a7b	alloc_mdio_bitbang
+EXPORT_SYMBOL drivers/net/phy/mdio-bitbang 0xc3492e83	free_mdio_bitbang
+EXPORT_SYMBOL drivers/net/ppp_generic 0x1e2e33f1	ppp_unit_number
+EXPORT_SYMBOL drivers/net/ppp_generic 0x2c972540	ppp_unregister_channel
+EXPORT_SYMBOL drivers/net/ppp_generic 0x5e57abaa	ppp_input
+EXPORT_SYMBOL drivers/net/ppp_generic 0x69343322	ppp_input_error
+EXPORT_SYMBOL drivers/net/ppp_generic 0x6d5de4ba	ppp_output_wakeup
+EXPORT_SYMBOL drivers/net/ppp_generic 0x8f10ef99	ppp_register_net_channel
+EXPORT_SYMBOL drivers/net/ppp_generic 0xa11cd107	ppp_register_compressor
+EXPORT_SYMBOL drivers/net/ppp_generic 0xcf19434c	ppp_register_channel
+EXPORT_SYMBOL drivers/net/ppp_generic 0xd1bc0eab	ppp_unregister_compressor
+EXPORT_SYMBOL drivers/net/ppp_generic 0xd981202e	ppp_channel_index
+EXPORT_SYMBOL drivers/net/pppox 0x3bc2b85e	register_pppox_proto
+EXPORT_SYMBOL drivers/net/pppox 0x7482aed3	pppox_unbind_sock
+EXPORT_SYMBOL drivers/net/pppox 0xbde71cfd	pppox_ioctl
+EXPORT_SYMBOL drivers/net/pppox 0xe0ff7a18	unregister_pppox_proto
+EXPORT_SYMBOL drivers/net/slhc 0x0ff2b602	slhc_compress
+EXPORT_SYMBOL drivers/net/slhc 0x23c8f257	slhc_uncompress
+EXPORT_SYMBOL drivers/net/slhc 0xa63d85ab	slhc_remember
+EXPORT_SYMBOL drivers/net/slhc 0xb5ca1c46	slhc_free
+EXPORT_SYMBOL drivers/net/slhc 0xdfc5169b	slhc_init
+EXPORT_SYMBOL drivers/net/slhc 0xe8794ce1	slhc_toss
+EXPORT_SYMBOL drivers/net/sungem_phy 0x140282ac	mii_phy_probe
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x1305d717	tms380tr_open
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x1573ff14	tms380tr_close
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x179b10fd	tmsdev_term
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0x9ec84a48	tmsdev_init
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xced07713	tms380tr_netdev_ops
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd2328794	tms380tr_wait
+EXPORT_SYMBOL drivers/net/tokenring/tms380tr 0xd49af46e	tms380tr_interrupt
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x38da4725	cycx_intr
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x62be23ea	cycx_setup
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x66a4c4e6	cycx_down
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0x968458a6	cycx_peek
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xb6f383de	cycx_poke
+EXPORT_SYMBOL drivers/net/wan/cycx_drv 0xfe7cd576	cycx_exec
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x1a663025	hdlc_ioctl
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x2ef92829	register_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x32834679	unregister_hdlc_device
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x410e6593	alloc_hdlcdev
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x4f952786	unregister_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x74f82bce	hdlc_close
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x81f830a1	hdlc_change_mtu
+EXPORT_SYMBOL drivers/net/wan/hdlc 0x93ad0efa	detach_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xb844155a	hdlc_open
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xd383e9ff	attach_hdlc_protocol
+EXPORT_SYMBOL drivers/net/wan/hdlc 0xd8996c3d	hdlc_start_xmit
+EXPORT_SYMBOL drivers/net/wireless/airo 0x7549e0d8	reset_airo_card
+EXPORT_SYMBOL drivers/net/wireless/airo 0x93a3659f	stop_airo_card
+EXPORT_SYMBOL drivers/net/wireless/airo 0xb95ef10b	init_airo_card
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x0bcc0fed	ath_reg_notifier_apply
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0x31219afb	ath_is_world_regd
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xbe25b39d	ath_regd_get_band_ctl
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xccbc8daa	ath_rxbuf_alloc
+EXPORT_SYMBOL drivers/net/wireless/ath/ath 0xf52bd7d9	ath_regd_init
+EXPORT_SYMBOL drivers/net/wireless/atmel 0x01f75f9a	atmel_open
+EXPORT_SYMBOL drivers/net/wireless/atmel 0x852e350b	init_atmel_card
+EXPORT_SYMBOL drivers/net/wireless/atmel 0xe7f01cd3	stop_atmel_card
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x078c6eb3	hostap_set_multicast_list_queue
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x0a318305	hostap_info_init
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x0d13abe4	prism2_update_comms_qual
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x2434b9a2	hostap_set_roaming
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x3c3d2db1	hostap_set_hostapd
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x48d74c9c	hostap_set_string
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x49237bb5	hostap_set_encryption
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x549851ab	hostap_info_process
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x62eeafd5	hostap_init_ap_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x684a0d25	hostap_set_antsel
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x6b9034ce	hostap_set_auth_algs
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x7098baec	hostap_master_start_xmit
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x7281ff57	hostap_80211_rx
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x72fe8cd8	hostap_remove_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x8f4056a8	hostap_handle_sta_tx_exc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0x97df5f6a	hostap_remove_interface
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa12ad27f	hostap_dump_tx_header
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xa70fb6c0	hostap_add_interface
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xac773084	hostap_setup_dev
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb2a945e0	hostap_dump_rx_header
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xb4b77c8b	hostap_80211_get_hdrlen
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xc829daec	hostap_init_data
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xdb0720ac	hostap_check_sta_fw_version
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xe439e3df	hostap_init_proc
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xe6a62164	hostap_free_data
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xea25e9f6	hostap_set_hostapd_sta
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf12dc53d	hostap_80211_ops
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf151d46c	hostap_set_word
+EXPORT_SYMBOL drivers/net/wireless/hostap/hostap 0xf7851616	hostap_get_porttype
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x031651c9	libipw_get_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x1303e1ae	libipw_get_channel_flags
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x26c0f885	libipw_freq_to_channel
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x28e8731c	libipw_channel_to_index
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x5162dbbc	libipw_set_geo
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x574387eb	libipw_networks_age
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x666517db	libipw_wx_get_encode
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x738ba7c1	libipw_get_geo
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x74e177dc	libipw_rx
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x7ad3ec15	libipw_rx_mgt
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x7bc5ae2f	libipw_wx_set_encode
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x8aaa8ef2	libipw_xmit
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x8af38ddb	libipw_wx_get_encodeext
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x95c72024	libipw_change_mtu
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0x96fc376c	libipw_channel_to_freq
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xa124a05a	alloc_ieee80211
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xaee87928	libipw_txb_free
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xc2aab35b	libipw_wx_get_scan
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xd7894cf8	free_ieee80211
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xdbefe0d3	libipw_wx_set_encodeext
+EXPORT_SYMBOL drivers/net/wireless/ipw2x00/libipw 0xdf684c32	libipw_is_valid_channel
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x01dab803	iwl_rx_csa
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x01e8d9ac	iwlcore_free_geos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x05af18c5	iwl_get_channel_info
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x08f14871	iwl_disable_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x096fd05b	iwl_uninit_drv
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0a6490dc	iwl_send_statistics_request
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0aa24213	iwl_sta_rx_agg_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0aa6c33f	iwl_tx_agg_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x0e72ee53	iwl_set_hw_params
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x10c8d3e1	iwl_send_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1286ff71	iwl_get_active_dwell_time
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x130b1bfd	iwl_send_bt_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x14306752	iwl_tx_ant_restriction
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x17a4cb1e	iwl_sta_rx_agg_start
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x19f0e900	iwl_debug_level
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1c311726	iwl_alloc_all
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d1397d3	iwl_init_sensitivity
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d16a645	iwl_pci_resume
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1d77b399	iwl_bcast_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x1db6f902	iwl_rx_reply_compressed_ba
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x20088db8	iwl_mac_add_interface
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x22023b21	iwl_send_calib_results
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x22fef6e7	iwl_mac_conf_tx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x24812537	iwl_remove_default_wep_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x24dc1691	iwl_cmd_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x276d976e	iwlcore_init_geos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2a74c120	iwl_get_sta_id
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2dd3f534	iwl_hw_nic_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x2fdbf77e	iwlcore_eeprom_acquire_semaphore
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x309fddd4	iwl_eeprom_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3104875c	iwl_pci_suspend
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x320534ae	iwl_eeprom_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x34740c2e	iwl_bg_scan_check
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x35878599	iwl_reset_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x360d76b9	iwl_set_rxon_chain
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x39d7d360	iwl_rx_statistics
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3a23a260	iwl_send_lq_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3c70f6dd	iwl_is_monitor_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3cd8ea4a	iwl_set_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x3e3fcb36	iwl_irq_handle_error
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4349c999	iwl_rate_get_lowest_plcp
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4628b0cb	iwl_rxq_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x464fb446	iwl_reset_run_time_calib
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x473d40f9	iwl_set_rxon_ht
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x479d8ea0	iwl_free_channel_map
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x49b54134	iwl_hw_detect
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x49e758d3	iwl_clear_stations_table
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4c5e7058	iwl_rx_reply_rx_phy
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4c7860b3	iwl_ht_enabled
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x4e27f0f5	iwl_bss_info_changed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x52ef485b	iwl_get_free_ucode_key_index
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x57682c86	iwl_tt_exit_ct_kill
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x57cbf908	iwl_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5c824008	iwl_set_rxon_hwcrypto
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5cf3ea80	iwl_reset_qos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5d6b167e	iwl_rx_missed_beacon_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5f6e0cda	iwl_eeprom_check_version
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5f739f3f	iwl_tt_exit
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x5fdb62f2	iwl_sta_tx_modify_enable_tid
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x60774702	iwl_queue_space
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6154e4d3	iwl_activate_qos
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x622f0f69	iwl_rx_queue_alloc
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x636d16b4	iwl_set_decrypted_flag
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x65b8bcb1	iwl_full_rxon_required
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6788aaf7	iwl_configure_filter
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6792ade4	iwl_bg_abort_scan
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6baf283c	iwl_set_dynamic_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x6dfb7804	iwl_leds_register
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x72da6a46	iwl_txq_ctx_stop
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x742dc004	iwl_mac_remove_interface
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x745c5873	iwl_eeprom_query16
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7709e1b2	iwl_tx_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7755586a	iwl_init_drv
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x78976e61	iwl_isr_legacy
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x789f32ba	iwl_mac_beacon_update
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x79864fec	iwl_is_ht40_tx_allowed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7a121ef1	iwl_verify_ucode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7bf3f446	iwl_txq_check_empty
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7c454ab5	iwl_check_rxon_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x7d551d08	iwl_eeprom_query_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8073392d	iwl_rx_queue_update_write_ptr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8670273d	iwl_hwrate_to_plcp_idx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x873f2a9a	iwl_set_tx_power
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x87ade394	iwlcore_eeprom_query_addr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x88abc528	iwlcore_eeprom_enhanced_txpower
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x89101674	iwl_txq_update_write_ptr
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x89a4587e	iwl_send_cmd_pdu_async
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x89a89de7	iwl_power_initialize
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8b2f89a7	iwl_rx_replenish
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8b76a3da	iwl_find_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8bd10aec	iwl_send_cmd_pdu
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8cc27038	iwl_send_static_wepkey_cmd
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x8d352c71	iwl_tx_queue_reclaim
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x927ee62f	iwl_rx_pm_debug_statistics_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x94dd8282	iwl_scan_cancel
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9888a771	iwl_setup_scan_deferred_work
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9976061f	iwl_leds_unregister
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9ac6c0e7	iwl_rx_queue_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9c0e541a	iwl_get_ra_sta_id
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9d4a3dc4	iwlcore_eeprom_verify_signature
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9e0c2fa5	iwl_set_rxon_channel
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9e8b17d7	iwl_chain_noise_calibration
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0x9faced57	iwl_calib_set
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa2e85be2	iwlcore_eeprom_release_semaphore
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa4933d7b	iwl_rx_reply_rx
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa51a55c0	iwl_init_channel_map
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xa6f26da2	iwl_get_passive_dwell_time
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xae017bb9	iwl_mac_get_tx_stats
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb147bf99	iwl_fill_probe_req
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb304c3c7	iwl_rxon_add_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb3f7fcc6	iwl_tt_handler
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb71c0812	iwl_mac_hw_scan
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xb7d402a2	iwl_rf_kill_ct_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbb6a3320	iwl_set_default_wep_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbc4e9dfb	iwl_rx_reply_error
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbce48158	iwl_hw_txq_ctx_free
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbe08aba7	iwl_tt_enter_ct_kill
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbf274ce7	iwl_mac_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xbfe114ee	iwl_setup_rx_scan_handlers
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc1f81969	iwl_send_cmd_sync
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xc7794b30	iwl_bg_scan_completed
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xca6d29cc	iwl_tx_skb
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcbaf4931	get_cmd_string
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xcfa0ae0e	iwl_rx_queue_restock
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd0769fda	iwl_connection_init_rx_config
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd1828cf3	iwl_scan_cancel_timeout
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd29c7e24	iwl_setup_mac
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd780b13a	iwl_alloc_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd7a5c2b8	iwl_update_tkip_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xd9c27a5b	iwl_rx_queue_space
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xdc0cc5ca	iwl_send_add_sta
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xddee84da	iwl_hwrate_to_tx_control
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe14a2ba9	iwl_tx_cmd_complete
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe7ce5d70	iwl_rates
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe894eadb	iwl_tx_agg_start
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xe8e346ed	iwl_remove_dynamic_key
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xea521414	iwl_power_update_mode
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xed29e92a	iwl_rx_pm_sleep_notif
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xeee89b02	iwl_free_isr_ict
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf171650b	iwl_setup_rxon_timing
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf65581fd	iwl_add_station
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf6940ab2	iwl_free_tfds_in_queue
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf6f570cf	iwl_eeprom_get_mac
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xf72353fd	iwl_mac_reset_tsf
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfb9cbbce	iwl_tt_initialize
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfc33bc6b	iwl_tx_queue_init
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xfdc20ca4	iwl_sensitivity_calibration
+EXPORT_SYMBOL drivers/net/wireless/iwlwifi/iwlcore 0xff93dd8f	iwl_rx_replenish_now
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x323eab78	orinoco_init
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x4196c38b	hermes_write_ltv
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x6a927e18	orinoco_interrupt
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0x7c8f8fc6	orinoco_if_add
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xa031d8e4	hermes_doicmd_wait
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xb150f505	orinoco_down
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xbe30465b	free_orinocodev
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xc60b5e9e	hermes_bap_pwrite
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd0c68cc4	orinoco_if_del
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd14c7f9a	alloc_orinocodev
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd38d8ae2	hermes_read_ltv
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd3f714e5	hermes_bap_pread
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5168829	hermes_allocate
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd5336e5d	hermes_init
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xd54e219d	hermes_docmd_wait
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xdc93ebd5	orinoco_up
+EXPORT_SYMBOL drivers/net/wireless/orinoco/orinoco 0xed47b224	hermes_struct_init
+EXPORT_SYMBOL drivers/parport/parport 0x06ec4e30	parport_remove_port
+EXPORT_SYMBOL drivers/parport/parport 0x1cb27956	parport_ieee1284_write_compat
+EXPORT_SYMBOL drivers/parport/parport 0x241cadcf	parport_unregister_device
+EXPORT_SYMBOL drivers/parport/parport 0x3011b41d	parport_ieee1284_epp_write_addr
+EXPORT_SYMBOL drivers/parport/parport 0x31f49cd5	parport_find_number
+EXPORT_SYMBOL drivers/parport/parport 0x3479cd79	parport_find_base
+EXPORT_SYMBOL drivers/parport/parport 0x479c1495	parport_ieee1284_ecp_read_data
+EXPORT_SYMBOL drivers/parport/parport 0x4ab2e93f	parport_unregister_driver
+EXPORT_SYMBOL drivers/parport/parport 0x4d2a941b	parport_ieee1284_interrupt
+EXPORT_SYMBOL drivers/parport/parport 0x525df55e	parport_set_timeout
+EXPORT_SYMBOL drivers/parport/parport 0x6cca6e93	parport_wait_peripheral
+EXPORT_SYMBOL drivers/parport/parport 0x7211f518	parport_register_driver
+EXPORT_SYMBOL drivers/parport/parport 0x77175b48	parport_ieee1284_ecp_write_addr
+EXPORT_SYMBOL drivers/parport/parport 0x7bc0bab0	parport_ieee1284_read_byte
+EXPORT_SYMBOL drivers/parport/parport 0x90d3d69d	parport_ieee1284_read_nibble
+EXPORT_SYMBOL drivers/parport/parport 0x92302ddd	parport_read
+EXPORT_SYMBOL drivers/parport/parport 0x96fe38bc	parport_ieee1284_epp_read_addr
+EXPORT_SYMBOL drivers/parport/parport 0x9d5eff70	parport_irq_handler
+EXPORT_SYMBOL drivers/parport/parport 0xa26af00e	parport_get_port
+EXPORT_SYMBOL drivers/parport/parport 0xa9c60fe4	parport_release
+EXPORT_SYMBOL drivers/parport/parport 0xaf13189d	parport_register_device
+EXPORT_SYMBOL drivers/parport/parport 0xba1cae51	parport_claim
+EXPORT_SYMBOL drivers/parport/parport 0xbdc76887	parport_ieee1284_epp_write_data
+EXPORT_SYMBOL drivers/parport/parport 0xc203691b	parport_claim_or_block
+EXPORT_SYMBOL drivers/parport/parport 0xcc512892	parport_put_port
+EXPORT_SYMBOL drivers/parport/parport 0xd121387f	parport_wait_event
+EXPORT_SYMBOL drivers/parport/parport 0xdb6084a6	parport_write
+EXPORT_SYMBOL drivers/parport/parport 0xde3b76ba	parport_register_port
+EXPORT_SYMBOL drivers/parport/parport 0xe69d9d50	parport_negotiate
+EXPORT_SYMBOL drivers/parport/parport 0xf25b7d44	parport_announce_port
+EXPORT_SYMBOL drivers/parport/parport 0xf7ca8487	parport_ieee1284_epp_read_data
+EXPORT_SYMBOL drivers/parport/parport 0xfac187d2	parport_ieee1284_ecp_write_data
+EXPORT_SYMBOL drivers/parport/parport_pc 0x0757eb7e	parport_pc_probe_port
+EXPORT_SYMBOL drivers/parport/parport_pc 0x23db0b90	parport_pc_unregister_port
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x22f90b2c	pcmcia_unregister_driver
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x3f81d1ea	pcmcia_loop_config
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x48fa7e08	pcmcia_dev_present
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x4fd033a0	pcmcia_error_func
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x5ff2fe5c	pcmcia_modify_configuration
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x6db654f9	pcmcia_get_window
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0x8a6fb436	pcmcia_request_io
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xa4dde000	pcmcia_map_mem_page
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xa60e4340	pcmcia_request_configuration
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xb77741e8	pcmcia_request_window
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xbe80ecda	pcmcia_disable_device
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xd372502b	pcmcia_request_irq
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xda6a1b96	pcmcia_get_mem_page
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xde3ab5db	pcmcia_register_driver
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xe8d410ab	pcmcia_release_window
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xe8f5889d	pcmcia_access_configuration_register
+EXPORT_SYMBOL drivers/pcmcia/pcmcia 0xf0a25e12	pcmcia_error_ret
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x00eddcee	pccard_read_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x025f03fe	pcmcia_put_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x0293a9a0	pcmcia_socket_dev_resume
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x0d1735fa	pcmcia_reset_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x17435e36	pccard_get_first_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x18fee911	pcmcia_socket_dev_suspend
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x212db8d2	pcmcia_socket_list
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x2bf4d08d	pcmcia_adjust_io_region
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x30308ca7	pcmcia_get_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x315c01de	pcmcia_suspend_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x3b67dc67	pccard_register_pcmcia
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x449d9b2e	pcmcia_find_mem_region
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x4da7dfb4	pccard_get_next_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x4e956d1e	pcmcia_replace_cis
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x5b68dda6	pccard_validate_cis
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x66c0f307	pcmcia_register_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x67c6cb4d	pcmcia_insert_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x73626915	pcmcia_socket_class
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x80727131	pcmcia_socket_dev_early_resume
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x827a5d23	pcmcia_eject_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x85c0f74f	pcmcia_write_cis_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x8c167670	pccard_get_tuple_data
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x92a92101	pccard_static_ops
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x9a034df0	pcmcia_unregister_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0x9ad321dd	pcmcia_socket_dev_late_resume
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xb533d105	pcmcia_socket_list_rwsem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xbb122df8	release_cis_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc02061eb	pcmcia_validate_mem
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc02ef2c8	pcmcia_parse_tuple
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xc7e4bbdb	pcmcia_resume_card
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcd9fcba1	pcmcia_get_socket_by_nr
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xcf97f3bd	dead_socket
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xda3cbfe6	destroy_cis_cache
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xdb627cd8	pcmcia_parse_events
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xef30fd59	pcmcia_find_io_region
+EXPORT_SYMBOL drivers/pcmcia/pcmcia_core 0xeff36b9b	pcmcia_read_cis_mem
+EXPORT_SYMBOL drivers/pcmcia/rsrc_nonstatic 0x16dc93b6	pccard_nonstatic_ops
+EXPORT_SYMBOL drivers/pps/pps_core 0x1e145952	pps_unregister_source
+EXPORT_SYMBOL drivers/pps/pps_core 0x3ffabec2	pps_register_source
+EXPORT_SYMBOL drivers/pps/pps_core 0xe6a16116	pps_event
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x0255447a	fcoe_ctlr_link_down
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x07534969	fcoe_ctlr_init
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x1b5a8072	fcoe_ctlr_els_send
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x4462a04d	fcoe_ctlr_recv
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0x78c666a9	fcoe_ctlr_destroy
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xbccda57d	fcoe_ctlr_recv_flogi
+EXPORT_SYMBOL drivers/scsi/fcoe/libfcoe 0xfc088d28	fcoe_ctlr_link_up
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x02e7f0f5	fc_lport_destroy
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x06c14e61	fc_get_host_speed
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x076a0909	fc_seq_start_next
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x0f77bfe0	fc_lport_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1972c8c5	fc_lport_config
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1d6ffb8b	fc_eh_device_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x1eda7b25	fc_seq_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x2063731c	fc_exch_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x21a976ff	fc_linkup
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x2e040537	fc_get_host_port_state
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x36e5fbaf	fc_cpu_mask
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x3e85e6a2	fc_fcp_complete
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x509cef25	fc_elsct_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x56183917	fc_destroy_rport
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x5aad7df6	fc_linkdown
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x5cc15dcf	fc_rport_terminate_io
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x611b48e7	fc_set_mfs
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x67750428	fc_exch_done
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6e093cd3	fc_get_host_port_type
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x6efcedc0	fc_exch_mgr_del
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x7b05cbd6	fc_seq_els_rsp_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x7c26bba5	fc_exch_mgr_add
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x7e7d2680	fc_fcp_destroy
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x804d3292	fc_slave_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x8bb09387	fc_get_host_stats
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x911c269d	fc_fcp_ddp_setup
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0x9210b040	fc_fabric_logoff
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xa0f3d281	fc_exch_mgr_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xac238a7a	fc_frame_crc_check
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xb54cf9ff	fc_exch_seq_send
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xbdbc2ac3	fc_exch_mgr_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xc042182b	fc_fabric_login
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xca31c07a	fc_fcp_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xcc09d63c	fc_change_queue_type
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xcce1410d	fc_exch_mgr_free
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xcd12bf26	fc_eh_host_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xd6cb3359	fc_setup_rport
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xdef98b2b	fc_change_queue_depth
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xdf91889d	fc_queuecommand
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xe8cb206c	fc_rport_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xee445814	__fc_frame_alloc
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xefcfaba4	fc_set_rport_loss_tmo
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf5547eb2	fc_disc_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf7365d60	fc_seq_exch_abort
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xf8143805	fc_eh_abort
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xfa032a37	fc_lport_reset
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xfaf115d5	fc_exch_init
+EXPORT_SYMBOL drivers/scsi/libfc/libfc 0xfebdada7	fc_exch_recv
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x2250c66e	mraid_mm_adapter_app_handle
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x512c956d	mraid_mm_unregister_adp
+EXPORT_SYMBOL drivers/scsi/megaraid/megaraid_mm 0x8c1eac45	mraid_mm_register_adp
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x012480da	osd_req_write
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x0c17edb1	osd_sec_init_nosec_doall_caps
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x113649b3	osd_req_list_collection_objects
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x114742ae	osd_req_add_set_attr_list
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x15a56c68	osd_req_list_dev_partitions
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x17513416	osd_start_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x1ad7b134	osd_req_create_partition
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x33282040	osd_req_create_object
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x35705b34	osd_req_write_kern
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x36eb13c5	osd_req_read
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x440d29ff	osd_finalize_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x4ab4b132	osd_req_decode_get_attr_list
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x5f2df434	osd_execute_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x61fba4f9	osd_req_flush_partition
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x84d9fa63	osd_req_list_partition_collections
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x942be56f	osd_dev_fini
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0x9bdc1205	osd_auto_detect_ver
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xa61f900e	osd_execute_request_async
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xaa9b935f	osd_req_set_attributes
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xb10ed0da	osd_req_add_get_attr_page
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xb1e44fb4	osd_req_decode_sense_full
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xbceb97bd	osd_req_flush_obsd
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xc6931653	osd_req_flush_object
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xc8226e0c	osd_req_read_kern
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xc86a63be	osd_req_get_attributes
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xcbddbdd5	osd_dev_init
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xcf418d5c	osd_req_add_get_attr_list
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xd1a1be83	osd_req_list_partition_objects
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xdeea1ff9	osd_req_format
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe05bbe44	osd_end_request
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xe61c8b03	osd_req_remove_partition
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xf8d1c8c9	osd_req_remove_object
+EXPORT_SYMBOL drivers/scsi/osd/libosd 0xfdfa3ce3	osd_req_flush_collection
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x446ed1f5	osduld_register_test
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x5fc48609	osduld_unregister_test
+EXPORT_SYMBOL drivers/scsi/osd/osd 0x60fa896f	osduld_path_lookup
+EXPORT_SYMBOL drivers/scsi/osd/osd 0xe997d60d	osduld_put_device
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x016d9f52	qlogicfas408_disable_ints
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x3fd8cd71	qlogicfas408_detect
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x42f1a6ed	qlogicfas408_abort
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x747bde89	qlogicfas408_queuecommand
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0x8209b075	qlogicfas408_info
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xa5560236	qlogicfas408_biosparam
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xd88cf9f7	qlogicfas408_bus_reset
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xdc310b12	qlogicfas408_ihandl
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xe76b3b20	qlogicfas408_get_chip_type
+EXPORT_SYMBOL drivers/scsi/qlogicfas408 0xf2b95199	qlogicfas408_setup
+EXPORT_SYMBOL drivers/scsi/raid_class 0x2944314f	raid_class_attach
+EXPORT_SYMBOL drivers/scsi/raid_class 0x4b605fac	raid_class_release
+EXPORT_SYMBOL drivers/scsi/raid_class 0x5446af52	raid_component_add
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x01244e13	scsi_execute_req
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x07d9b783	scsi_nl_send_vendor_msg
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x0c65e73c	scsi_normalize_sense
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x0c8c9e99	scsi_show_extd_sense
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x11267875	scsi_extd_sense_format
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x1540d2a0	scsi_report_device_reset
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x17f71dd7	scsi_track_queue_full
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x18631068	scsi_device_lookup
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x19bd09fb	scsi_execute
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x1b9e0ff1	scsilun_to_int
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x1e2710cd	scsi_host_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x1e42ac00	scsi_setup_blk_pc_cmnd
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x1f93d52b	scsi_rescan_device
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x277e549c	scsi_unregister
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x28a2ed02	scsi_build_sense_buffer
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x2b0ba2b0	scsi_sense_desc_find
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x2c261153	scsi_host_put
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x2c83ca52	scsi_prep_state_check
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x2d89342a	scsi_show_sense_hdr
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x39d2e264	scsicam_bios_param
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x39ddcd4d	scsi_print_command
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x3a3aa03e	scsi_host_lookup
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x3d3a829d	scsi_device_resume
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x40a27c37	scsi_dev_info_remove_list
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x413d65ae	starget_for_each_device
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x4674e0da	scsi_test_unit_ready
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x47514e7b	scsi_remove_device
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x4987c164	scsi_eh_restore_cmnd
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x4afe9a77	scsi_partsize
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x4bcc406a	scsi_device_set_state
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x4f387455	scsi_reset_provider
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x56c8799d	scsi_kunmap_atomic_sg
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x58817ecf	scsi_register_driver
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x5b590436	scsi_release_buffers
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x63379708	scsi_device_put
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x66d51f35	__starget_for_each_device
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x671309e9	scsi_get_device_flags_keyed
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x69d38ed9	__scsi_print_sense
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x6bdbae4a	scsi_is_sdev_device
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x6d18e9a6	scsi_is_target_device
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x7024aea1	scsi_calculate_bounce_limit
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x72ea7b2d	scsi_device_type
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x7364b547	scsi_setup_fs_cmnd
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x74953b99	scsi_unblock_requests
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x795e14ea	scsi_bios_ptable
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x796fc5ce	scsi_get_sense_info_fld
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x7ac18f8a	scsi_prep_return
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x7bd2b7ac	scsi_dma_unmap
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x806565dc	scsi_allocate_command
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x82003400	scsi_ioctl
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x82c33c28	__scsi_add_device
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x857099b8	scsi_device_get
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x85846e40	__scsi_alloc_queue
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x85ee112e	scsi_is_host_device
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x89cb21a2	scsi_command_normalize_sense
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x8f4458f6	scsi_mode_sense
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x8fd84a5c	scsi_print_result
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x90d1b809	scsi_remove_host
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x96cd2b04	scsi_sense_key_string
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x96e6635a	scsi_remove_target
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x991cc34a	scsi_target_resume
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0x9cfd56c5	scsi_print_status
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xa48a5cb3	scsi_set_medium_removal
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xa854439c	scsi_register
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xaf3dd7dc	scsi_logging_level
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xb11b303f	scsi_cmd_print_sense_hdr
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xb3c0d731	scsi_prep_fn
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xb4709322	scsi_dev_info_add_list
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xb6c5a973	scsi_show_result
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xb8180cc1	scsi_add_host_with_dma
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xba6d3970	scsi_dma_map
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xbcd51338	scsi_free_command
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xbec1e993	scsi_eh_prep_cmnd
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xc3c582bd	scsi_scan_host
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xc5d6d0a1	scsi_host_get
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xc8d6a765	scsi_get_command
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xc8e20ee9	__scsi_device_lookup
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xca5dbc50	scsi_print_sense_hdr
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xce8c3094	scsi_scan_target
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xcfb395d5	scsi_init_io
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xd10c86c9	__scsi_put_command
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xd267fed6	scsi_nonblockable_ioctl
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xd386acdb	scsi_register_interface
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xd3c20fd6	scsi_report_bus_reset
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xd733f2d0	scsi_eh_finish_cmd
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xd846c167	scsi_finish_command
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xdc047fc4	scsi_dev_info_list_add_keyed
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xdd4f5b39	scsi_adjust_queue_depth
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xdf3a18ea	__scsi_iterate_devices
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xdfb7d559	scsi_device_quiesce
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xe2cb8e71	scsi_block_when_processing_errors
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xe64a7904	scsi_get_host_dev
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xea039dbb	scsi_block_requests
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xea10212a	int_to_scsilun
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xea63c646	scsi_device_lookup_by_target
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xead6b15e	scsi_print_sense
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xec8d3b0d	__scsi_device_lookup_by_target
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xece8166e	scsi_target_quiesce
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xef0e9584	scsi_free_host_dev
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xf1c1061e	scsi_add_device
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xf32aead3	scsi_host_set_state
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xf4528073	scsi_kmap_atomic_sg
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xf811e69d	scsi_eh_flush_done_q
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xfc4b4adf	scsi_put_command
+EXPORT_SYMBOL drivers/scsi/scsi_mod 0xfef96e23	__scsi_print_command
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x0011e452	fc_release_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x3c08f8f9	fc_remote_port_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x4e5feb66	scsi_is_fc_vport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x59997555	fc_vport_terminate
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x69fb70d3	fc_remote_port_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x76552aed	fc_host_post_vendor_event
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x7954b1ea	fc_get_event_number
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0x97fc503a	fc_remote_port_rolechg
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xa35725f2	fc_attach_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xa503f077	fc_remove_host
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xae1bab87	scsi_is_fc_rport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xbb31c08b	fc_vport_create
+EXPORT_SYMBOL drivers/scsi/scsi_transport_fc 0xdafcef2b	fc_host_post_event
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x0b425248	sas_phy_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x1ac8ec71	scsi_is_sas_rphy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x25890a4c	sas_rphy_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x26add6e5	sas_phy_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x2d3b4e96	sas_remove_host
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x2f336468	sas_release_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x329df80b	sas_phy_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x34206bc2	scsi_is_sas_port
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x47b49836	sas_end_device_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x5114315c	sas_read_port_mode_page
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x5bbc1694	sas_port_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x69415add	sas_remove_children
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x7bb06ce4	sas_rphy_add
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x7bb0d629	sas_port_add_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x7e27455a	sas_port_free
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0x8d6fabd1	sas_port_alloc_num
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xa01dc97a	sas_phy_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xb1c95b28	sas_rphy_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xc0daa43c	sas_attach_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xc381931c	sas_port_delete
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xc5e7a9b0	sas_port_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xce0db3a9	sas_port_mark_backlink
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xd173dbab	sas_port_delete_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xe5ea33c3	sas_rphy_remove
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xee941cb1	sas_expander_alloc
+EXPORT_SYMBOL drivers/scsi/scsi_transport_sas 0xf64b4b92	scsi_is_sas_phy
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x3686ea09	spi_print_msg
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x47383d86	spi_attach_transport
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x8d92f82a	spi_schedule_dv_device
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0x8e6a412a	spi_dv_device
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0xaa5c3129	spi_display_xfer_agreement
+EXPORT_SYMBOL drivers/scsi/scsi_transport_spi 0xdbe7c09f	spi_release_transport
+EXPORT_SYMBOL drivers/serial/8250 0x832309e6	serial8250_register_port
+EXPORT_SYMBOL drivers/serial/8250 0xc7208c3a	serial8250_resume_port
+EXPORT_SYMBOL drivers/serial/8250 0xcc248d26	serial8250_suspend_port
+EXPORT_SYMBOL drivers/serial/8250 0xcefcd99a	serial8250_unregister_port
+EXPORT_SYMBOL drivers/serial/serial_core 0x1af15347	uart_update_timeout
+EXPORT_SYMBOL drivers/serial/serial_core 0x36592c93	uart_unregister_driver
+EXPORT_SYMBOL drivers/serial/serial_core 0x475b9ff0	uart_suspend_port
+EXPORT_SYMBOL drivers/serial/serial_core 0x52bc57a0	uart_remove_one_port
+EXPORT_SYMBOL drivers/serial/serial_core 0x64e06bc7	uart_match_port
+EXPORT_SYMBOL drivers/serial/serial_core 0x7cf85e2e	uart_resume_port
+EXPORT_SYMBOL drivers/serial/serial_core 0x80dae971	uart_add_one_port
+EXPORT_SYMBOL drivers/serial/serial_core 0x9b723c3f	uart_get_divisor
+EXPORT_SYMBOL drivers/serial/serial_core 0xd87c35a0	uart_get_baud_rate
+EXPORT_SYMBOL drivers/serial/serial_core 0xdb1d7d2b	uart_register_driver
+EXPORT_SYMBOL drivers/serial/serial_core 0xeb4d8794	uart_write_wakeup
+EXPORT_SYMBOL drivers/ssb/ssb 0x10ecf1a3	ssb_pcihost_register
+EXPORT_SYMBOL drivers/ssb/ssb 0x22a7b06b	ssb_pmu_set_ldo_voltage
+EXPORT_SYMBOL drivers/ssb/ssb 0x2800e874	ssb_dma_translation
+EXPORT_SYMBOL drivers/ssb/ssb 0x32a287cf	ssb_dma_free_consistent
+EXPORT_SYMBOL drivers/ssb/ssb 0x4e55a4c2	ssb_set_devtypedata
+EXPORT_SYMBOL drivers/ssb/ssb 0x55c1d49e	ssb_bus_pcibus_register
+EXPORT_SYMBOL drivers/ssb/ssb 0x678a1c7d	ssb_pmu_set_ldo_paref
+EXPORT_SYMBOL drivers/ssb/ssb 0x6ac053d3	ssb_device_enable
+EXPORT_SYMBOL drivers/ssb/ssb 0x7596effc	ssb_bus_suspend
+EXPORT_SYMBOL drivers/ssb/ssb 0x7c2854d8	ssb_driver_unregister
+EXPORT_SYMBOL drivers/ssb/ssb 0x8416d324	ssb_bus_powerup
+EXPORT_SYMBOL drivers/ssb/ssb 0x87154475	ssb_dma_set_mask
+EXPORT_SYMBOL drivers/ssb/ssb 0x89c001c9	__ssb_driver_register
+EXPORT_SYMBOL drivers/ssb/ssb 0x91ccac55	ssb_device_disable
+EXPORT_SYMBOL drivers/ssb/ssb 0xab35eed0	ssb_clockspeed
+EXPORT_SYMBOL drivers/ssb/ssb 0xb6b3afb9	ssb_pcicore_dev_irqvecs_enable
+EXPORT_SYMBOL drivers/ssb/ssb 0xc0512e0f	ssb_admatch_base
+EXPORT_SYMBOL drivers/ssb/ssb 0xd481192b	ssb_admatch_size
+EXPORT_SYMBOL drivers/ssb/ssb 0xd49d147b	ssb_bus_sdiobus_register
+EXPORT_SYMBOL drivers/ssb/ssb 0xe096b20c	ssb_bus_unregister
+EXPORT_SYMBOL drivers/ssb/ssb 0xea1c223e	ssb_bus_may_powerdown
+EXPORT_SYMBOL drivers/ssb/ssb 0xeb93fa10	ssb_dma_alloc_consistent
+EXPORT_SYMBOL drivers/ssb/ssb 0xed1c4610	ssb_bus_resume
+EXPORT_SYMBOL drivers/ssb/ssb 0xfd47d3fe	ssb_device_is_enabled
+EXPORT_SYMBOL drivers/telephony/ixj 0xcfb9b92c	ixj_pcmcia_probe
+EXPORT_SYMBOL drivers/telephony/phonedev 0xabd2e0c7	phone_unregister_device
+EXPORT_SYMBOL drivers/telephony/phonedev 0xe2437625	phone_register_device
+EXPORT_SYMBOL drivers/thermal/thermal_sys 0x6c5dd51d	thermal_zone_bind_cooling_device
+EXPORT_SYMBOL drivers/thermal/thermal_sys 0xbf4682d2	thermal_zone_device_unregister
+EXPORT_SYMBOL drivers/thermal/thermal_sys 0xc95e2e25	thermal_zone_unbind_cooling_device
+EXPORT_SYMBOL drivers/thermal/thermal_sys 0xd65da166	thermal_zone_device_update
+EXPORT_SYMBOL drivers/thermal/thermal_sys 0xd67f82af	thermal_cooling_device_register
+EXPORT_SYMBOL drivers/thermal/thermal_sys 0xee3d317c	thermal_zone_device_register
+EXPORT_SYMBOL drivers/thermal/thermal_sys 0xf96a0442	thermal_cooling_device_unregister
+EXPORT_SYMBOL drivers/usb/gadget/net2280 0xc8241b70	usb_gadget_unregister_driver
+EXPORT_SYMBOL drivers/usb/gadget/net2280 0xd0b69f7d	net2280_set_fifo_mode
+EXPORT_SYMBOL drivers/usb/gadget/net2280 0xf551dc0a	usb_gadget_register_driver
+EXPORT_SYMBOL drivers/usb/host/sl811-hcd 0xa98197a0	sl811h_driver
+EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xa64a4cea	usb_nop_xceiv_unregister
+EXPORT_SYMBOL drivers/usb/otg/nop-usb-xceiv 0xd0e43207	usb_nop_xceiv_register
+EXPORT_SYMBOL drivers/usb/serial/usbserial 0x1fb43df8	usb_serial_resume
+EXPORT_SYMBOL drivers/usb/serial/usbserial 0xa7e22027	usb_serial_suspend
+EXPORT_SYMBOL drivers/video/backlight/generic_bl 0xc86baa7c	corgibl_limit_intensity
+EXPORT_SYMBOL drivers/video/backlight/lcd 0x34126c5f	lcd_device_register
+EXPORT_SYMBOL drivers/video/backlight/lcd 0x6381293b	lcd_device_unregister
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x0cc3ede5	cyber2000fb_detach
+EXPORT_SYMBOL drivers/video/cyber2000fb 0x73840539	cyber2000fb_disable_extregs
+EXPORT_SYMBOL drivers/video/cyber2000fb 0xafff6d1d	cyber2000fb_enable_extregs
+EXPORT_SYMBOL drivers/video/cyber2000fb 0xe3570895	cyber2000fb_get_fb_var
+EXPORT_SYMBOL drivers/video/cyber2000fb 0xf51cc12c	cyber2000fb_attach
+EXPORT_SYMBOL drivers/video/display/display 0x1411a2c6	display_device_register
+EXPORT_SYMBOL drivers/video/display/display 0x33f4aa3e	display_device_unregister
+EXPORT_SYMBOL drivers/video/macmodes 0x08ed0b62	mac_vmode_to_var
+EXPORT_SYMBOL drivers/video/macmodes 0x0a186a76	mac_find_mode
+EXPORT_SYMBOL drivers/video/macmodes 0xe2304303	mac_map_monitor_sense
+EXPORT_SYMBOL drivers/video/output 0x04893e05	video_output_register
+EXPORT_SYMBOL drivers/video/output 0xecd6283e	video_output_unregister
+EXPORT_SYMBOL drivers/video/sis/sisfb 0x3037658e	sis_malloc
+EXPORT_SYMBOL drivers/video/sis/sisfb 0x454a3cf0	sis_free
+EXPORT_SYMBOL drivers/video/svgalib 0x00d1fce9	svga_set_default_seq_regs
+EXPORT_SYMBOL drivers/video/svgalib 0x07b3da30	svga_wseq_multi
+EXPORT_SYMBOL drivers/video/svgalib 0x1b95c56a	svga_check_timings
+EXPORT_SYMBOL drivers/video/svgalib 0x21e4e5df	svga_settile
+EXPORT_SYMBOL drivers/video/svgalib 0x413f6c01	svga_tileblit
+EXPORT_SYMBOL drivers/video/svgalib 0x63e898d1	svga_set_default_crt_regs
+EXPORT_SYMBOL drivers/video/svgalib 0x7a3ae959	svga_wcrt_multi
+EXPORT_SYMBOL drivers/video/svgalib 0x80408443	svga_set_timings
+EXPORT_SYMBOL drivers/video/svgalib 0x8fa8438b	svga_set_textmode_vga_regs
+EXPORT_SYMBOL drivers/video/svgalib 0x99a06d05	svga_tilecursor
+EXPORT_SYMBOL drivers/video/svgalib 0xab3b22ad	svga_set_default_gfx_regs
+EXPORT_SYMBOL drivers/video/svgalib 0xb10d59f6	svga_tilefill
+EXPORT_SYMBOL drivers/video/svgalib 0xcf60d261	svga_get_tilemax
+EXPORT_SYMBOL drivers/video/svgalib 0xd2507ba5	svga_tilecopy
+EXPORT_SYMBOL drivers/video/svgalib 0xd2a13e48	svga_get_caps
+EXPORT_SYMBOL drivers/video/svgalib 0xdad682b1	svga_set_default_atc_regs
+EXPORT_SYMBOL drivers/video/svgalib 0xec83c473	svga_match_format
+EXPORT_SYMBOL drivers/video/svgalib 0xef774f5d	svga_compute_pll
+EXPORT_SYMBOL drivers/video/syscopyarea 0x062dc077	sys_copyarea
+EXPORT_SYMBOL drivers/video/sysfillrect 0x269c4c31	sys_fillrect
+EXPORT_SYMBOL drivers/video/sysimgblt 0x1e19a3ce	sys_imageblit
+EXPORT_SYMBOL drivers/video/vgastate 0x686de290	restore_vga
+EXPORT_SYMBOL drivers/video/vgastate 0xe7a2620e	save_vga
+EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0x067f36bd	w1_bq27000_write
+EXPORT_SYMBOL drivers/w1/slaves/w1_bq27000 0xa0b95ed6	w1_bq27000_read
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x26c14a0b	w1_ds2760_write
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0x4a3fc081	w1_ds2760_store_eeprom
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0xaba6b39e	w1_ds2760_recall_eeprom
+EXPORT_SYMBOL drivers/w1/slaves/w1_ds2760 0xb0f27e22	w1_ds2760_read
+EXPORT_SYMBOL drivers/w1/wire 0x0eb3d615	w1_register_family
+EXPORT_SYMBOL drivers/w1/wire 0xbefb7ab7	w1_unregister_family
+EXPORT_SYMBOL drivers/w1/wire 0xc81c6474	w1_remove_master_device
+EXPORT_SYMBOL drivers/w1/wire 0xe4a7cc8a	w1_add_master_device
+EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0x04e133fc	iTCO_vendor_check_noreboot_on
+EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0x672c9d44	iTCO_vendor_pre_keepalive
+EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xa78bd894	iTCO_vendor_pre_set_heartbeat
+EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xa8d6daac	iTCO_vendor_pre_start
+EXPORT_SYMBOL drivers/watchdog/iTCO_vendor_support 0xd0efe320	iTCO_vendor_pre_stop
+EXPORT_SYMBOL fs/configfs/configfs 0x188566ac	config_item_init_type_name
+EXPORT_SYMBOL fs/configfs/configfs 0x198e9acc	config_group_init_type_name
+EXPORT_SYMBOL fs/configfs/configfs 0x22f86b2a	configfs_depend_item
+EXPORT_SYMBOL fs/configfs/configfs 0x47d33b6e	configfs_undepend_item
+EXPORT_SYMBOL fs/configfs/configfs 0x59f17ec5	config_group_init
+EXPORT_SYMBOL fs/configfs/configfs 0x5cd7487b	configfs_register_subsystem
+EXPORT_SYMBOL fs/configfs/configfs 0x8756c125	config_item_get
+EXPORT_SYMBOL fs/configfs/configfs 0x98343db6	config_item_put
+EXPORT_SYMBOL fs/configfs/configfs 0x9ccc20ed	config_item_set_name
+EXPORT_SYMBOL fs/configfs/configfs 0xbb45737d	config_group_find_item
+EXPORT_SYMBOL fs/configfs/configfs 0xbb7fa6c9	configfs_unregister_subsystem
+EXPORT_SYMBOL fs/configfs/configfs 0xd3898828	config_item_init
+EXPORT_SYMBOL fs/fscache/fscache 0x07d9b576	fscache_wait_bit_interruptible
+EXPORT_SYMBOL fs/fscache/fscache 0x111c84fb	__fscache_write_page
+EXPORT_SYMBOL fs/fscache/fscache 0x122db371	__fscache_acquire_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0x1b634655	__fscache_read_or_alloc_pages
+EXPORT_SYMBOL fs/fscache/fscache 0x36bfcf53	fscache_cache_cleared_wq
+EXPORT_SYMBOL fs/fscache/fscache 0x3c44946f	__fscache_wait_on_page_write
+EXPORT_SYMBOL fs/fscache/fscache 0x3ee97807	__fscache_read_or_alloc_page
+EXPORT_SYMBOL fs/fscache/fscache 0x3fc23318	fscache_wait_bit
+EXPORT_SYMBOL fs/fscache/fscache 0x496932b9	fscache_op_debug_id
+EXPORT_SYMBOL fs/fscache/fscache 0x503694b2	__fscache_register_netfs
+EXPORT_SYMBOL fs/fscache/fscache 0x517481fd	fscache_withdraw_cache
+EXPORT_SYMBOL fs/fscache/fscache 0x5b1cedf1	fscache_object_slow_work_ops
+EXPORT_SYMBOL fs/fscache/fscache 0x75a7c783	fscache_enqueue_operation
+EXPORT_SYMBOL fs/fscache/fscache 0x76085a44	fscache_put_operation
+EXPORT_SYMBOL fs/fscache/fscache 0x7783d104	__fscache_update_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0x793ab332	__fscache_unregister_netfs
+EXPORT_SYMBOL fs/fscache/fscache 0x82abb7d2	__fscache_uncache_page
+EXPORT_SYMBOL fs/fscache/fscache 0x84f8a206	__fscache_maybe_release_page
+EXPORT_SYMBOL fs/fscache/fscache 0x86f8894f	fscache_object_states
+EXPORT_SYMBOL fs/fscache/fscache 0x8b6a81c4	fscache_fsdef_index
+EXPORT_SYMBOL fs/fscache/fscache 0xa3ae2964	__fscache_attr_changed
+EXPORT_SYMBOL fs/fscache/fscache 0xa8559bbc	fscache_check_aux
+EXPORT_SYMBOL fs/fscache/fscache 0xb60f414b	fscache_obtained_object
+EXPORT_SYMBOL fs/fscache/fscache 0xc429580f	__fscache_check_page_write
+EXPORT_SYMBOL fs/fscache/fscache 0xd765b7bb	fscache_io_error
+EXPORT_SYMBOL fs/fscache/fscache 0xd7e701a8	__fscache_alloc_page
+EXPORT_SYMBOL fs/fscache/fscache 0xe50c82f7	fscache_add_cache
+EXPORT_SYMBOL fs/fscache/fscache 0xea33c816	fscache_object_lookup_negative
+EXPORT_SYMBOL fs/fscache/fscache 0xf780cb37	__fscache_relinquish_cookie
+EXPORT_SYMBOL fs/fscache/fscache 0xf983613c	fscache_init_cache
+EXPORT_SYMBOL fs/fscache/fscache 0xf9dd9dc6	fscache_mark_pages_cached
+EXPORT_SYMBOL fs/nfsd/nfsd 0x1f573533	nfs4_acl_posix_to_nfsv4
+EXPORT_SYMBOL fs/nfsd/nfsd 0x35e33c1e	nfs4_acl_write_who
+EXPORT_SYMBOL fs/nfsd/nfsd 0x5a157ae4	nfs4_acl_get_whotype
+EXPORT_SYMBOL fs/nfsd/nfsd 0x96ce9bb4	nfs4_acl_new
+EXPORT_SYMBOL fs/nfsd/nfsd 0xdb389aec	nfs4_acl_nfsv4_to_posix
+EXPORT_SYMBOL fs/quota/quota_tree 0x004ed9cc	qtree_release_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0x2fb3386d	qtree_delete_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0x56026146	qtree_write_dquot
+EXPORT_SYMBOL fs/quota/quota_tree 0x7e8458f2	qtree_entry_unused
+EXPORT_SYMBOL fs/quota/quota_tree 0xd554474f	qtree_read_dquot
+EXPORT_SYMBOL lib/crc-ccitt 0x651c2313	crc_ccitt
+EXPORT_SYMBOL lib/crc-ccitt 0x75811312	crc_ccitt_table
+EXPORT_SYMBOL lib/crc-itu-t 0x276c7e62	crc_itu_t
+EXPORT_SYMBOL lib/crc-itu-t 0xd29b009f	crc_itu_t_table
+EXPORT_SYMBOL lib/crc-t10dif 0x782acba5	crc_t10dif
+EXPORT_SYMBOL lib/crc7 0xc086bfba	crc7
+EXPORT_SYMBOL lib/crc7 0xd80c3603	crc7_syndrome_table
+EXPORT_SYMBOL lib/libcrc32c 0x27000b29	crc32c
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x315c65fd	zlib_deflateInit2
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0x48034724	zlib_deflateReset
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xaf64ad0d	zlib_deflate
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf0caf44b	zlib_deflate_workspacesize
+EXPORT_SYMBOL lib/zlib_deflate/zlib_deflate 0xf741c793	zlib_deflateEnd
+EXPORT_SYMBOL net/802/p8023 0x63470826	destroy_8023_client
+EXPORT_SYMBOL net/802/p8023 0x99d9145e	make_8023_client
+EXPORT_SYMBOL net/9p/9pnet 0x01506fcf	p9_idpool_create
+EXPORT_SYMBOL net/9p/9pnet 0x0ab0a55c	p9_client_stat
+EXPORT_SYMBOL net/9p/9pnet 0x0b3ac49a	p9pdu_dump
+EXPORT_SYMBOL net/9p/9pnet 0x0e1b02b6	p9_client_create
+EXPORT_SYMBOL net/9p/9pnet 0x22dc9060	p9_client_disconnect
+EXPORT_SYMBOL net/9p/9pnet 0x24b9e87f	v9fs_register_trans
+EXPORT_SYMBOL net/9p/9pnet 0x334f210c	p9_client_walk
+EXPORT_SYMBOL net/9p/9pnet 0x3c58ca4d	p9_idpool_get
+EXPORT_SYMBOL net/9p/9pnet 0x3d73a797	p9_errstr2errno
+EXPORT_SYMBOL net/9p/9pnet 0x41e6bc51	p9_parse_header
+EXPORT_SYMBOL net/9p/9pnet 0x42976e7b	v9fs_unregister_trans
+EXPORT_SYMBOL net/9p/9pnet 0x51c265ab	p9_client_fcreate
+EXPORT_SYMBOL net/9p/9pnet 0x563fc9bc	p9_tag_lookup
+EXPORT_SYMBOL net/9p/9pnet 0x592cc6c1	v9fs_get_trans_by_name
+EXPORT_SYMBOL net/9p/9pnet 0x6b878893	p9_client_read
+EXPORT_SYMBOL net/9p/9pnet 0x6d942660	p9_idpool_destroy
+EXPORT_SYMBOL net/9p/9pnet 0x6f186d3a	p9_idpool_check
+EXPORT_SYMBOL net/9p/9pnet 0x76b79bf1	p9stat_read
+EXPORT_SYMBOL net/9p/9pnet 0x7a5a273a	v9fs_get_default_trans
+EXPORT_SYMBOL net/9p/9pnet 0x8bd543bc	p9_client_attach
+EXPORT_SYMBOL net/9p/9pnet 0x8fd31a98	p9_idpool_put
+EXPORT_SYMBOL net/9p/9pnet 0x99627f36	p9_client_write
+EXPORT_SYMBOL net/9p/9pnet 0x9c964743	p9stat_free
+EXPORT_SYMBOL net/9p/9pnet 0xb065299c	p9_client_open
+EXPORT_SYMBOL net/9p/9pnet 0xb4a6a558	p9_client_wstat
+EXPORT_SYMBOL net/9p/9pnet 0xc5e223a5	p9_client_auth
+EXPORT_SYMBOL net/9p/9pnet 0xc6072e74	p9_client_remove
+EXPORT_SYMBOL net/9p/9pnet 0xc807f10a	p9_client_clunk
+EXPORT_SYMBOL net/9p/9pnet 0xda79944e	p9_client_destroy
+EXPORT_SYMBOL net/9p/9pnet 0xe58a3360	p9_error_init
+EXPORT_SYMBOL net/9p/9pnet 0xf16ff650	p9_client_cb
+EXPORT_SYMBOL net/9p/9pnet 0xf35c5e32	p9_client_version
+EXPORT_SYMBOL net/appletalk/appletalk 0x03aa2785	aarp_send_ddp
+EXPORT_SYMBOL net/appletalk/appletalk 0x4f5e6807	alloc_ltalkdev
+EXPORT_SYMBOL net/appletalk/appletalk 0xa032e635	atrtr_get_dev
+EXPORT_SYMBOL net/appletalk/appletalk 0xcc559de9	atalk_find_dev_addr
+EXPORT_SYMBOL net/atm/atm 0x058cc072	deregister_atm_ioctl
+EXPORT_SYMBOL net/atm/atm 0x0f66622e	vcc_release_async
+EXPORT_SYMBOL net/atm/atm 0x1a24e5e2	sonet_subtract_stats
+EXPORT_SYMBOL net/atm/atm 0x288ce055	atm_charge
+EXPORT_SYMBOL net/atm/atm 0x2923da43	vcc_sklist_lock
+EXPORT_SYMBOL net/atm/atm 0x2cc2d52d	vcc_hash
+EXPORT_SYMBOL net/atm/atm 0x390bcd75	atm_alloc_charge
+EXPORT_SYMBOL net/atm/atm 0x46afbb90	atm_dev_deregister
+EXPORT_SYMBOL net/atm/atm 0x48ff4502	register_atm_ioctl
+EXPORT_SYMBOL net/atm/atm 0x4cb2b0de	vcc_insert_socket
+EXPORT_SYMBOL net/atm/atm 0x68d8f1f4	atm_proc_root
+EXPORT_SYMBOL net/atm/atm 0x89195dc3	sonet_copy_stats
+EXPORT_SYMBOL net/atm/atm 0xb5a27224	atm_dev_lookup
+EXPORT_SYMBOL net/atm/atm 0xbc24d1d9	atm_init_aal5
+EXPORT_SYMBOL net/atm/atm 0xe5c49517	atm_dev_register
+EXPORT_SYMBOL net/atm/atm 0xf49bc67a	atm_pcr_goal
+EXPORT_SYMBOL net/ax25/ax25 0x0843a049	ax25_header_ops
+EXPORT_SYMBOL net/ax25/ax25 0x1195800f	ax25_send_frame
+EXPORT_SYMBOL net/ax25/ax25 0x1c75bc48	ax25_listen_register
+EXPORT_SYMBOL net/ax25/ax25 0x242852b9	ax25_uid_policy
+EXPORT_SYMBOL net/ax25/ax25 0x3d2d82ec	ax25_display_timer
+EXPORT_SYMBOL net/ax25/ax25 0x4502c65a	asc2ax
+EXPORT_SYMBOL net/ax25/ax25 0x53dea1ff	ax2asc
+EXPORT_SYMBOL net/ax25/ax25 0x5595aa4c	ax25_hard_header
+EXPORT_SYMBOL net/ax25/ax25 0x562c902c	ax25_linkfail_register
+EXPORT_SYMBOL net/ax25/ax25 0x5fc6280f	ax25_findbyuid
+EXPORT_SYMBOL net/ax25/ax25 0x8ede9e26	ax25_protocol_release
+EXPORT_SYMBOL net/ax25/ax25 0x9945c67f	ax25_linkfail_release
+EXPORT_SYMBOL net/ax25/ax25 0x9cdfd9fb	ax25_rebuild_header
+EXPORT_SYMBOL net/ax25/ax25 0xafbedb51	ax25_find_cb
+EXPORT_SYMBOL net/ax25/ax25 0xc1444946	ax25cmp
+EXPORT_SYMBOL net/ax25/ax25 0xd43ecbf1	null_ax25_address
+EXPORT_SYMBOL net/ax25/ax25 0xfc050c18	ax25_listen_release
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x067c4467	hci_send_sco
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x16e90308	hci_resume_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x179e45d8	hci_register_proto
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x1a8a25d6	hci_send_acl
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x243b51e7	bt_sock_recvmsg
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x2a1069fe	hci_conn_change_link_key
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x360a45d6	hci_recv_fragment
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x374c925c	hci_conn_hold_device
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x3f3c80e1	hci_connect
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x40d28299	hci_suspend_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x42696e97	hci_conn_put_device
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x5804b645	bt_sock_poll
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x5e1567d3	hci_unregister_proto
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x6acaa4ad	bt_accept_dequeue
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x7094f8ae	bt_err
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x7532db52	hci_conn_check_link_mode
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x76745026	hci_register_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x8ae98646	hci_unregister_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x8e824e99	hci_conn_security
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x906d0fb5	bt_sock_wait_state
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x941ad063	bt_sock_unlink
+EXPORT_SYMBOL net/bluetooth/bluetooth 0x9c2612c7	bt_sock_register
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xa6365ef6	hci_unregister_cb
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xae14c740	hci_alloc_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xb76bd38a	hci_free_dev
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xc2066af0	batostr
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xc4d7b53b	hci_get_route
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xc9b0e168	hci_conn_switch_role
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xcc1fb551	baswap
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xd74d0c2f	bt_accept_enqueue
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xdce7e91a	hci_register_cb
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xde3f6e24	bt_sock_ioctl
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xf19294db	bt_sock_unregister
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xf24857aa	bt_accept_unlink
+EXPORT_SYMBOL net/bluetooth/bluetooth 0xf3b8fb10	bt_sock_link
+EXPORT_SYMBOL net/bluetooth/l2cap 0xfc31fe88	l2cap_load
+EXPORT_SYMBOL net/bridge/bridge 0xe794bcb4	br_should_route_hook
+EXPORT_SYMBOL net/can/can 0x4f62d538	can_rx_register
+EXPORT_SYMBOL net/can/can 0x6963c642	can_proto_register
+EXPORT_SYMBOL net/can/can 0x6fc8e390	can_rx_unregister
+EXPORT_SYMBOL net/can/can 0x84f7a30a	can_send
+EXPORT_SYMBOL net/can/can 0xd6606905	can_proto_unregister
+EXPORT_SYMBOL net/ieee802154/nl802154 0x359f4798	ieee802154_nl_assoc_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0x3d408489	ieee802154_nl_beacon_indic
+EXPORT_SYMBOL net/ieee802154/nl802154 0xa5a3df1f	ieee802154_nl_disassoc_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0xafe7a9dc	ieee802154_nl_start_confirm
+EXPORT_SYMBOL net/ieee802154/nl802154 0xd4878793	ieee802154_nl_assoc_indic
+EXPORT_SYMBOL net/ieee802154/nl802154 0xd699078d	ieee802154_nl_disassoc_indic
+EXPORT_SYMBOL net/ieee802154/nl802154 0xda76ee61	ieee802154_nl_scan_confirm
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x23554f46	wpan_phy_find
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x33a6684d	wpan_phy_unregister
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x63bfc074	wpan_phy_alloc
+EXPORT_SYMBOL net/ieee802154/wpan-class 0x8119f250	wpan_phy_register
+EXPORT_SYMBOL net/ieee802154/wpan-class 0xcde1f699	wpan_phy_free
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0x9c384cdf	arpt_unregister_table
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xad4bf447	arpt_register_table
+EXPORT_SYMBOL net/ipv4/netfilter/arp_tables 0xe2547360	arpt_do_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0x7bb1a049	ipt_unregister_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0xaa3f57de	ipt_do_table
+EXPORT_SYMBOL net/ipv4/netfilter/ip_tables 0xf1620beb	ipt_register_table
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x46b02a4b	nf_nat_mangle_tcp_packet
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x57bf61d6	nf_nat_mangle_udp_packet
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x79e5dd38	nf_nat_protocol_register
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x82bd1eca	nf_nat_follow_master
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0x8b195a31	nf_nat_protocol_unregister
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xc972f966	nf_nat_setup_info
+EXPORT_SYMBOL net/ipv4/netfilter/nf_nat 0xd1da7206	nf_nat_used_tuple
+EXPORT_SYMBOL net/ipv4/tunnel4 0x7e01adca	xfrm4_tunnel_register
+EXPORT_SYMBOL net/ipv4/tunnel4 0x87af3a9f	xfrm4_tunnel_deregister
+EXPORT_SYMBOL net/ipv6/ipv6 0x007648bb	xfrm6_prepare_output
+EXPORT_SYMBOL net/ipv6/ipv6 0x00b4b2ca	inet6_getname
+EXPORT_SYMBOL net/ipv6/ipv6 0x04cb3c23	ipv6_push_nfrag_opts
+EXPORT_SYMBOL net/ipv6/ipv6 0x0b0d888b	icmpv6_err_convert
+EXPORT_SYMBOL net/ipv6/ipv6 0x0b40072b	inet6_del_protocol
+EXPORT_SYMBOL net/ipv6/ipv6 0x0b8aa674	ip6_frag_match
+EXPORT_SYMBOL net/ipv6/ipv6 0x1a4a2f37	xfrm6_find_1stfragopt
+EXPORT_SYMBOL net/ipv6/ipv6 0x2d9dfa8f	ipv6_dev_get_saddr
+EXPORT_SYMBOL net/ipv6/ipv6 0x30123eb5	icmpv6_statistics
+EXPORT_SYMBOL net/ipv6/ipv6 0x3268dfe2	xfrm6_rcv_spi
+EXPORT_SYMBOL net/ipv6/ipv6 0x348d224b	xfrm6_input_addr
+EXPORT_SYMBOL net/ipv6/ipv6 0x39eb0d8f	ndisc_mc_map
+EXPORT_SYMBOL net/ipv6/ipv6 0x3b4446a1	inet6_register_protosw
+EXPORT_SYMBOL net/ipv6/ipv6 0x40cb2622	ndisc_build_skb
+EXPORT_SYMBOL net/ipv6/ipv6 0x4111f97e	ip6_route_me_harder
+EXPORT_SYMBOL net/ipv6/ipv6 0x44eee360	inet6_unregister_protosw
+EXPORT_SYMBOL net/ipv6/ipv6 0x49a52d13	ip6_route_output
+EXPORT_SYMBOL net/ipv6/ipv6 0x4a09dcf4	compat_ipv6_getsockopt
+EXPORT_SYMBOL net/ipv6/ipv6 0x51e6fe4a	nf_ip6_checksum
+EXPORT_SYMBOL net/ipv6/ipv6 0x52263761	ipv6_getsockopt
+EXPORT_SYMBOL net/ipv6/ipv6 0x538383c0	unregister_inet6addr_notifier
+EXPORT_SYMBOL net/ipv6/ipv6 0x66520e8b	ip6_frag_init
+EXPORT_SYMBOL net/ipv6/ipv6 0x6c9ea699	rt6_lookup
+EXPORT_SYMBOL net/ipv6/ipv6 0x712d19b0	icmpv6_send
+EXPORT_SYMBOL net/ipv6/ipv6 0x716f2e6d	inet6_bind
+EXPORT_SYMBOL net/ipv6/ipv6 0x74e88a7d	ndisc_send_skb
+EXPORT_SYMBOL net/ipv6/ipv6 0x74ea68b8	inet6_release
+EXPORT_SYMBOL net/ipv6/ipv6 0x76f06bca	xfrm6_rcv
+EXPORT_SYMBOL net/ipv6/ipv6 0x800ea807	ipv6_chk_prefix
+EXPORT_SYMBOL net/ipv6/ipv6 0x9e127b26	ip6_xmit
+EXPORT_SYMBOL net/ipv6/ipv6 0xb63b0387	inet6_add_protocol
+EXPORT_SYMBOL net/ipv6/ipv6 0xc0ff79c5	inet6_ioctl
+EXPORT_SYMBOL net/ipv6/ipv6 0xc3ff40e7	in6_dev_finish_destroy
+EXPORT_SYMBOL net/ipv6/ipv6 0xc45f28d6	ipv6_chk_addr
+EXPORT_SYMBOL net/ipv6/ipv6 0xce19bac5	register_inet6addr_notifier
+EXPORT_SYMBOL net/ipv6/ipv6 0xe1604544	ipv6_setsockopt
+EXPORT_SYMBOL net/ipv6/ipv6 0xe1a81c3a	icmpv6msg_statistics
+EXPORT_SYMBOL net/ipv6/ipv6 0xe690b8fd	__ipv6_isatap_ifid
+EXPORT_SYMBOL net/ipv6/ipv6 0xf62f303b	compat_ipv6_setsockopt
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x4f97fcbd	ip6t_register_table
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0x6f7bc1ec	ipv6_find_hdr
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xa755e3b4	ip6t_do_table
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xb8bddf33	ip6t_ext_hdr
+EXPORT_SYMBOL net/ipv6/netfilter/ip6_tables 0xff809be1	ip6t_unregister_table
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x1cb8007b	ircomm_disconnect_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x382dfbf4	ircomm_control_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0x6567715e	ircomm_close
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0xaa360fdf	ircomm_data_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0xb29744f8	ircomm_open
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0xc4a24d7c	ircomm_connect_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0xd2833184	ircomm_flow_request
+EXPORT_SYMBOL net/irda/ircomm/ircomm 0xedd46074	ircomm_connect_response
+EXPORT_SYMBOL net/irda/irda 0x06a3ee58	irias_new_integer_value
+EXPORT_SYMBOL net/irda/irda 0x07d3647c	irlmp_register_service
+EXPORT_SYMBOL net/irda/irda 0x0e58de80	irlmp_data_request
+EXPORT_SYMBOL net/irda/irda 0x19a84e80	irttp_dup
+EXPORT_SYMBOL net/irda/irda 0x1a617b1d	irias_find_object
+EXPORT_SYMBOL net/irda/irda 0x2036ad06	irda_param_insert
+EXPORT_SYMBOL net/irda/irda 0x20869965	irttp_connect_request
+EXPORT_SYMBOL net/irda/irda 0x263f5ab4	hashbin_get_next
+EXPORT_SYMBOL net/irda/irda 0x2aec1c1e	irttp_open_tsap
+EXPORT_SYMBOL net/irda/irda 0x2b752a70	iriap_open
+EXPORT_SYMBOL net/irda/irda 0x38a20e5b	irda_debug
+EXPORT_SYMBOL net/irda/irda 0x4096621c	irias_delete_object
+EXPORT_SYMBOL net/irda/irda 0x448b8aaa	irda_qos_bits_to_value
+EXPORT_SYMBOL net/irda/irda 0x46057977	irda_device_set_media_busy
+EXPORT_SYMBOL net/irda/irda 0x46c1c4a2	irlmp_unregister_service
+EXPORT_SYMBOL net/irda/irda 0x4ba5dc74	hashbin_delete
+EXPORT_SYMBOL net/irda/irda 0x4ed2ddb1	irlmp_disconnect_request
+EXPORT_SYMBOL net/irda/irda 0x5b8b95bb	hashbin_lock_find
+EXPORT_SYMBOL net/irda/irda 0x5d1487c7	irias_insert_object
+EXPORT_SYMBOL net/irda/irda 0x5e1a17b2	iriap_getvaluebyclass_request
+EXPORT_SYMBOL net/irda/irda 0x62b13534	irttp_data_request
+EXPORT_SYMBOL net/irda/irda 0x62c83096	irias_add_integer_attrib
+EXPORT_SYMBOL net/irda/irda 0x698ecec5	irttp_close_tsap
+EXPORT_SYMBOL net/irda/irda 0x6b043eba	irda_init_max_qos_capabilies
+EXPORT_SYMBOL net/irda/irda 0x7042bc54	irlmp_register_client
+EXPORT_SYMBOL net/irda/irda 0x74d027d3	irda_notify_init
+EXPORT_SYMBOL net/irda/irda 0x763e54a4	irlmp_unregister_client
+EXPORT_SYMBOL net/irda/irda 0x7783ca32	irlap_open
+EXPORT_SYMBOL net/irda/irda 0x7957f728	irlmp_update_client
+EXPORT_SYMBOL net/irda/irda 0x7d6931a8	irttp_udata_request
+EXPORT_SYMBOL net/irda/irda 0x80c5a3a0	irlmp_open_lsap
+EXPORT_SYMBOL net/irda/irda 0x8d92d5bc	irttp_connect_response
+EXPORT_SYMBOL net/irda/irda 0x91815586	irda_param_pack
+EXPORT_SYMBOL net/irda/irda 0x9694bb4c	hashbin_remove_this
+EXPORT_SYMBOL net/irda/irda 0x982b6b09	hashbin_new
+EXPORT_SYMBOL net/irda/irda 0x993ad14b	irda_param_extract_all
+EXPORT_SYMBOL net/irda/irda 0x9ba19681	irlmp_connect_request
+EXPORT_SYMBOL net/irda/irda 0x9fea5965	hashbin_remove
+EXPORT_SYMBOL net/irda/irda 0xa0c1868b	async_unwrap_char
+EXPORT_SYMBOL net/irda/irda 0xa45993f4	hashbin_get_first
+EXPORT_SYMBOL net/irda/irda 0xa8d697e0	irttp_flow_request
+EXPORT_SYMBOL net/irda/irda 0xb422d1e3	irlmp_connect_response
+EXPORT_SYMBOL net/irda/irda 0xb57c4342	irlmp_close_lsap
+EXPORT_SYMBOL net/irda/irda 0xb8f34717	iriap_close
+EXPORT_SYMBOL net/irda/irda 0xb9394173	irias_delete_value
+EXPORT_SYMBOL net/irda/irda 0xbcd3ef13	irias_object_change_attribute
+EXPORT_SYMBOL net/irda/irda 0xbde32277	hashbin_insert
+EXPORT_SYMBOL net/irda/irda 0xbe40ace9	irlmp_discovery_request
+EXPORT_SYMBOL net/irda/irda 0xc10f5acd	irias_new_object
+EXPORT_SYMBOL net/irda/irda 0xd3edad11	hashbin_find
+EXPORT_SYMBOL net/irda/irda 0xd56a4665	async_wrap_skb
+EXPORT_SYMBOL net/irda/irda 0xd82d7881	irlap_close
+EXPORT_SYMBOL net/irda/irda 0xdc0f10d6	alloc_irdadev
+EXPORT_SYMBOL net/irda/irda 0xde4c6b3c	irlmp_service_to_hint
+EXPORT_SYMBOL net/irda/irda 0xdfaf55d4	irias_add_string_attrib
+EXPORT_SYMBOL net/irda/irda 0xe157e77b	proc_irda
+EXPORT_SYMBOL net/irda/irda 0xe51835c6	irttp_disconnect_request
+EXPORT_SYMBOL net/irda/irda 0xe541e2c2	irias_add_octseq_attrib
+EXPORT_SYMBOL net/irda/irda 0xedd521c2	irlmp_get_discoveries
+EXPORT_SYMBOL net/lapb/lapb 0x10265557	lapb_getparms
+EXPORT_SYMBOL net/lapb/lapb 0x1aa475ba	lapb_setparms
+EXPORT_SYMBOL net/lapb/lapb 0x2071b451	lapb_unregister
+EXPORT_SYMBOL net/lapb/lapb 0x566c4f69	lapb_data_received
+EXPORT_SYMBOL net/lapb/lapb 0x86f3af1f	lapb_register
+EXPORT_SYMBOL net/lapb/lapb 0xbd3923d2	lapb_data_request
+EXPORT_SYMBOL net/lapb/lapb 0xecce2e84	lapb_disconnect_request
+EXPORT_SYMBOL net/lapb/lapb 0xf9f36f77	lapb_connect_request
+EXPORT_SYMBOL net/mac80211/mac80211 0x0007be68	ieee80211_queue_delayed_work
+EXPORT_SYMBOL net/mac80211/mac80211 0x05b68265	ieee80211_find_sta
+EXPORT_SYMBOL net/mac80211/mac80211 0x07ca47b9	ieee80211_queue_stopped
+EXPORT_SYMBOL net/mac80211/mac80211 0x0eac0b61	ieee80211_get_tkip_key
+EXPORT_SYMBOL net/mac80211/mac80211 0x1499a3f5	ieee80211_alloc_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x1e1f7ced	ieee80211_ctstoself_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0x1f0fce58	ieee80211_scan_completed
+EXPORT_SYMBOL net/mac80211/mac80211 0x200419da	__ieee80211_get_assoc_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0x20164006	ieee80211_queue_work
+EXPORT_SYMBOL net/mac80211/mac80211 0x299a0747	ieee80211_rate_control_unregister
+EXPORT_SYMBOL net/mac80211/mac80211 0x2df3e392	ieee80211_start_tx_ba_cb_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0x37d41897	ieee80211_beacon_get
+EXPORT_SYMBOL net/mac80211/mac80211 0x4097bd5f	ieee80211_stop_tx_ba_cb
+EXPORT_SYMBOL net/mac80211/mac80211 0x4865f4d9	ieee80211_stop_tx_ba_cb_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0x52d99c6f	ieee80211_start_tx_ba_cb
+EXPORT_SYMBOL net/mac80211/mac80211 0x5cbfbc5d	ieee80211_stop_tx_ba_session
+EXPORT_SYMBOL net/mac80211/mac80211 0x5da995fd	ieee80211_free_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x63bc6181	ieee80211_tx_status
+EXPORT_SYMBOL net/mac80211/mac80211 0x6fd22727	ieee80211_rts_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0x73be1604	ieee80211_start_tx_ba_session
+EXPORT_SYMBOL net/mac80211/mac80211 0x779e5afd	ieee80211_get_buffered_bc
+EXPORT_SYMBOL net/mac80211/mac80211 0x81935677	ieee80211_rts_get
+EXPORT_SYMBOL net/mac80211/mac80211 0x819ffaba	ieee80211_restart_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0x82710d79	ieee80211_generic_frame_duration
+EXPORT_SYMBOL net/mac80211/mac80211 0x87705750	ieee80211_wake_queues
+EXPORT_SYMBOL net/mac80211/mac80211 0x8c7e27e3	ieee80211_rate_control_register
+EXPORT_SYMBOL net/mac80211/mac80211 0x917bb119	rate_control_send_low
+EXPORT_SYMBOL net/mac80211/mac80211 0x9e08dd78	__ieee80211_get_rx_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0xa95bffa0	__ieee80211_get_radio_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0xadb9ef43	ieee80211_stop_queues
+EXPORT_SYMBOL net/mac80211/mac80211 0xbb6fd5e4	wiphy_to_ieee80211_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xc7da41dc	ieee80211_rx_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0xd47bf042	ieee80211_stop_queue
+EXPORT_SYMBOL net/mac80211/mac80211 0xdae81a82	ieee80211_wake_queue
+EXPORT_SYMBOL net/mac80211/mac80211 0xdfe7084a	ieee80211_unregister_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xe1f28b3c	__ieee80211_get_tx_led_name
+EXPORT_SYMBOL net/mac80211/mac80211 0xe8abe42d	ieee80211_beacon_loss
+EXPORT_SYMBOL net/mac80211/mac80211 0xec9fa8fc	ieee80211_register_hw
+EXPORT_SYMBOL net/mac80211/mac80211 0xf41ec08b	ieee80211_ctstoself_get
+EXPORT_SYMBOL net/mac80211/mac80211 0xf49b74cd	ieee80211_tx_status_irqsafe
+EXPORT_SYMBOL net/mac80211/mac80211 0xf50d18ef	ieee80211_rx
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x171303a9	register_ip_vs_scheduler
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x1e55eb04	unregister_ip_vs_scheduler
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x5b68f8bb	register_ip_vs_app
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x954dd6b2	ip_vs_skb_replace
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0x9dd15184	ip_vs_conn_put
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xa1dbc2d8	ip_vs_proto_name
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xa2a7f887	ip_vs_conn_in_get
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xa7b154b2	ip_vs_conn_new
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xab74263b	ip_vs_tcp_conn_listen
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xd5d974f6	unregister_ip_vs_app
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xde43448e	register_ip_vs_app_inc
+EXPORT_SYMBOL net/netfilter/ipvs/ip_vs 0xf46c0365	ip_vs_conn_out_get
+EXPORT_SYMBOL net/netfilter/nf_conntrack 0x44a8f843	__nf_ct_ext_destroy
+EXPORT_SYMBOL net/netfilter/nf_conntrack 0x5b128ecb	__nf_ct_ext_add
+EXPORT_SYMBOL net/netfilter/nf_conntrack_proto_gre 0xd0291a16	nf_ct_gre_keymap_flush
+EXPORT_SYMBOL net/netfilter/x_tables 0x12da17c5	xt_register_match
+EXPORT_SYMBOL net/netfilter/x_tables 0x16a5e826	xt_free_table_info
+EXPORT_SYMBOL net/netfilter/x_tables 0x23ee19ef	xt_register_targets
+EXPORT_SYMBOL net/netfilter/x_tables 0x39b3a24a	xt_unregister_matches
+EXPORT_SYMBOL net/netfilter/x_tables 0x54ded707	xt_register_target
+EXPORT_SYMBOL net/netfilter/x_tables 0x6326b8fa	xt_find_target
+EXPORT_SYMBOL net/netfilter/x_tables 0x687c6e70	xt_unregister_targets
+EXPORT_SYMBOL net/netfilter/x_tables 0xc3ff5dff	xt_alloc_table_info
+EXPORT_SYMBOL net/netfilter/x_tables 0xc4880090	xt_find_match
+EXPORT_SYMBOL net/netfilter/x_tables 0xc75828c7	xt_register_matches
+EXPORT_SYMBOL net/netfilter/x_tables 0xf21da20f	xt_unregister_target
+EXPORT_SYMBOL net/netfilter/x_tables 0xf3856200	xt_unregister_match
+EXPORT_SYMBOL net/phonet/phonet 0x09af7781	pn_sock_unhash
+EXPORT_SYMBOL net/phonet/phonet 0x619cf4c6	phonet_proto_register
+EXPORT_SYMBOL net/phonet/phonet 0x62fe193d	phonet_header_ops
+EXPORT_SYMBOL net/phonet/phonet 0x851b4b6c	phonet_stream_ops
+EXPORT_SYMBOL net/phonet/phonet 0xa7e438bf	phonet_proto_unregister
+EXPORT_SYMBOL net/phonet/phonet 0xb063f6c5	pn_sock_get_port
+EXPORT_SYMBOL net/phonet/phonet 0xd57259cf	pn_skb_send
+EXPORT_SYMBOL net/phonet/phonet 0xd84e2263	pn_sock_hash
+EXPORT_SYMBOL net/rfkill/rfkill 0x01458a58	rfkill_destroy
+EXPORT_SYMBOL net/rfkill/rfkill 0x122b289d	rfkill_set_led_trigger_name
+EXPORT_SYMBOL net/rfkill/rfkill 0x18af7f1d	rfkill_blocked
+EXPORT_SYMBOL net/rfkill/rfkill 0x29b698e5	rfkill_set_sw_state
+EXPORT_SYMBOL net/rfkill/rfkill 0x2d95bda4	rfkill_alloc
+EXPORT_SYMBOL net/rfkill/rfkill 0x3056638c	rfkill_init_sw_state
+EXPORT_SYMBOL net/rfkill/rfkill 0x4deee3cf	rfkill_unregister
+EXPORT_SYMBOL net/rfkill/rfkill 0x508661d1	rfkill_pause_polling
+EXPORT_SYMBOL net/rfkill/rfkill 0x615dcb87	rfkill_get_led_trigger_name
+EXPORT_SYMBOL net/rfkill/rfkill 0x764d9677	rfkill_set_states
+EXPORT_SYMBOL net/rfkill/rfkill 0xc4d81cfe	rfkill_register
+EXPORT_SYMBOL net/rfkill/rfkill 0xcd160376	rfkill_set_hw_state
+EXPORT_SYMBOL net/rfkill/rfkill 0xfa3f5b95	rfkill_resume_polling
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x1db957ab	rxrpc_get_null_key
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x2bd2c8c0	key_type_rxrpc
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x389a4406	rxrpc_kernel_abort_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x4f8ed704	rxrpc_kernel_free_skb
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x62b4a99d	rxrpc_kernel_end_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x72eec6c2	rxrpc_kernel_is_data_last
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x76092af8	rxrpc_kernel_reject_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x859f1d5e	rxrpc_kernel_get_error_number
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0x9e516ce4	rxrpc_get_server_data_key
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xa6b73090	rxrpc_kernel_send_data
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xae1d1ffd	rxrpc_kernel_get_abort_code
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xb8ba7126	rxrpc_kernel_intercept_rx_messages
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xc049fa8f	rxrpc_kernel_data_delivered
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xc5b0e78f	rxrpc_kernel_accept_call
+EXPORT_SYMBOL net/rxrpc/af-rxrpc 0xe3b49481	rxrpc_kernel_begin_call
+EXPORT_SYMBOL net/sunrpc/sunrpc 0xd1d5396d	svc_pool_stats_open
+EXPORT_SYMBOL net/tipc/tipc 0x083c104d	tipc_createport
+EXPORT_SYMBOL net/tipc/tipc 0x08acf310	tipc_available_nodes
+EXPORT_SYMBOL net/tipc/tipc 0x0b074a7b	tipc_multicast
+EXPORT_SYMBOL net/tipc/tipc 0x0f94d12f	tipc_get_port
+EXPORT_SYMBOL net/tipc/tipc 0x10d40fcd	tipc_isconnected
+EXPORT_SYMBOL net/tipc/tipc 0x120c167d	tipc_register_media
+EXPORT_SYMBOL net/tipc/tipc 0x1472b270	tipc_disconnect
+EXPORT_SYMBOL net/tipc/tipc 0x1479cb03	tipc_deleteport
+EXPORT_SYMBOL net/tipc/tipc 0x15b5ecde	tipc_set_portunreliable
+EXPORT_SYMBOL net/tipc/tipc 0x16f27683	tipc_block_bearer
+EXPORT_SYMBOL net/tipc/tipc 0x23daecbd	tipc_send
+EXPORT_SYMBOL net/tipc/tipc 0x259b74f9	tipc_acknowledge
+EXPORT_SYMBOL net/tipc/tipc 0x2e330d05	tipc_recv_msg
+EXPORT_SYMBOL net/tipc/tipc 0x310d1bc9	tipc_detach
+EXPORT_SYMBOL net/tipc/tipc 0x3712e340	tipc_portunreliable
+EXPORT_SYMBOL net/tipc/tipc 0x3976041f	tipc_set_portimportance
+EXPORT_SYMBOL net/tipc/tipc 0x419b02fc	tipc_send2port
+EXPORT_SYMBOL net/tipc/tipc 0x456d3f5a	tipc_send_buf2name
+EXPORT_SYMBOL net/tipc/tipc 0x47380408	tipc_send_buf
+EXPORT_SYMBOL net/tipc/tipc 0x4b2243c6	tipc_portimportance
+EXPORT_SYMBOL net/tipc/tipc 0x538b228a	tipc_withdraw
+EXPORT_SYMBOL net/tipc/tipc 0x5637ed44	tipc_get_mode
+EXPORT_SYMBOL net/tipc/tipc 0x5c0d4b5c	tipc_ref_valid
+EXPORT_SYMBOL net/tipc/tipc 0x62a681a3	tipc_portunreturnable
+EXPORT_SYMBOL net/tipc/tipc 0x6e32cff6	tipc_forward_buf2name
+EXPORT_SYMBOL net/tipc/tipc 0x7443d394	tipc_send_buf2port
+EXPORT_SYMBOL net/tipc/tipc 0x88b73627	tipc_get_addr
+EXPORT_SYMBOL net/tipc/tipc 0x9c45558e	tipc_enable_bearer
+EXPORT_SYMBOL net/tipc/tipc 0xa1b42d32	tipc_forward2port
+EXPORT_SYMBOL net/tipc/tipc 0xa762af43	tipc_continue
+EXPORT_SYMBOL net/tipc/tipc 0xadd203d0	tipc_connect2port
+EXPORT_SYMBOL net/tipc/tipc 0xae0103c3	tipc_shutdown
+EXPORT_SYMBOL net/tipc/tipc 0xb1f8eacc	tipc_send2name
+EXPORT_SYMBOL net/tipc/tipc 0xb35b672c	tipc_publish
+EXPORT_SYMBOL net/tipc/tipc 0xcec8514a	tipc_set_portunreturnable
+EXPORT_SYMBOL net/tipc/tipc 0xcee290be	tipc_forward2name
+EXPORT_SYMBOL net/tipc/tipc 0xd44731e5	tipc_ownidentity
+EXPORT_SYMBOL net/tipc/tipc 0xda7f9d3f	tipc_attach
+EXPORT_SYMBOL net/tipc/tipc 0xdf5008fc	tipc_peer
+EXPORT_SYMBOL net/tipc/tipc 0xe0e61259	tipc_send_buf_fast
+EXPORT_SYMBOL net/tipc/tipc 0xe7aece47	tipc_ispublished
+EXPORT_SYMBOL net/tipc/tipc 0xec18e07e	tipc_createport_raw
+EXPORT_SYMBOL net/tipc/tipc 0xeca12291	tipc_reject_msg
+EXPORT_SYMBOL net/tipc/tipc 0xeefd49b3	tipc_get_handle
+EXPORT_SYMBOL net/tipc/tipc 0xef50a1ef	tipc_disable_bearer
+EXPORT_SYMBOL net/tipc/tipc 0xf079322d	tipc_forward_buf2port
+EXPORT_SYMBOL net/wanrouter/wanrouter 0x0ebe03d1	unregister_wan_device
+EXPORT_SYMBOL net/wanrouter/wanrouter 0x1c858cfe	register_wan_device
+EXPORT_SYMBOL net/wimax/wimax 0x6acb72ea	wimax_rfkill
+EXPORT_SYMBOL net/wimax/wimax 0xadf284ed	wimax_reset
+EXPORT_SYMBOL net/wireless/cfg80211 0x02d35c98	cfg80211_send_rx_assoc
+EXPORT_SYMBOL net/wireless/cfg80211 0x07e7ac5a	ieee80211_radiotap_iterator_init
+EXPORT_SYMBOL net/wireless/cfg80211 0x09c64fbd	ieee80211_frequency_to_channel
+EXPORT_SYMBOL net/wireless/cfg80211 0x1879fcbd	bridge_tunnel_header
+EXPORT_SYMBOL net/wireless/cfg80211 0x18c92fe6	cfg80211_send_disassoc
+EXPORT_SYMBOL net/wireless/cfg80211 0x29936229	ieee80211_get_hdrlen_from_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0x2d50189b	wiphy_new
+EXPORT_SYMBOL net/wireless/cfg80211 0x2f48eb79	cfg80211_send_auth_timeout
+EXPORT_SYMBOL net/wireless/cfg80211 0x35ded94c	wiphy_unregister
+EXPORT_SYMBOL net/wireless/cfg80211 0x37ac8d05	ieee80211_get_response_rate
+EXPORT_SYMBOL net/wireless/cfg80211 0x3f08cfef	cfg80211_testmode_reply
+EXPORT_SYMBOL net/wireless/cfg80211 0x44f87d54	cfg80211_unlink_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0x45a7e455	cfg80211_testmode_event
+EXPORT_SYMBOL net/wireless/cfg80211 0x4efdf175	wiphy_rfkill_stop_polling
+EXPORT_SYMBOL net/wireless/cfg80211 0x571da8d5	cfg80211_get_mesh
+EXPORT_SYMBOL net/wireless/cfg80211 0x5839a25c	wiphy_apply_custom_regulatory
+EXPORT_SYMBOL net/wireless/cfg80211 0x5f71a9d2	wiphy_rfkill_set_hw_state
+EXPORT_SYMBOL net/wireless/cfg80211 0x604d2817	wiphy_free
+EXPORT_SYMBOL net/wireless/cfg80211 0x6079eaf2	cfg80211_michael_mic_failure
+EXPORT_SYMBOL net/wireless/cfg80211 0x69b18f43	rfc1042_header
+EXPORT_SYMBOL net/wireless/cfg80211 0x7c3fddc1	ieee80211_bss_get_ie
+EXPORT_SYMBOL net/wireless/cfg80211 0x86e1e57d	cfg80211_inform_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0x8c35d732	ieee80211_hdrlen
+EXPORT_SYMBOL net/wireless/cfg80211 0x903cbeb1	freq_reg_info
+EXPORT_SYMBOL net/wireless/cfg80211 0x9fc82e9e	cfg80211_get_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0xa0d82ebc	cfg80211_send_assoc_timeout
+EXPORT_SYMBOL net/wireless/cfg80211 0xa1a499db	cfg80211_testmode_alloc_event_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0xa8ada72e	cfg80211_ibss_joined
+EXPORT_SYMBOL net/wireless/cfg80211 0xadc66ac4	ieee80211_data_to_8023
+EXPORT_SYMBOL net/wireless/cfg80211 0xafc292cd	ieee80211_data_from_8023
+EXPORT_SYMBOL net/wireless/cfg80211 0xb4ef4fc2	cfg80211_scan_done
+EXPORT_SYMBOL net/wireless/cfg80211 0xb8402b0e	__ieee80211_get_channel
+EXPORT_SYMBOL net/wireless/cfg80211 0xc2944d45	cfg80211_send_deauth
+EXPORT_SYMBOL net/wireless/cfg80211 0xc2f4280a	cfg80211_classify8021d
+EXPORT_SYMBOL net/wireless/cfg80211 0xc4e85ec5	ieee80211_radiotap_iterator_next
+EXPORT_SYMBOL net/wireless/cfg80211 0xccc291b3	ieee80211_channel_to_frequency
+EXPORT_SYMBOL net/wireless/cfg80211 0xd0e84efa	cfg80211_roamed
+EXPORT_SYMBOL net/wireless/cfg80211 0xd113c526	cfg80211_disconnected
+EXPORT_SYMBOL net/wireless/cfg80211 0xd1c205a7	cfg80211_testmode_alloc_reply_skb
+EXPORT_SYMBOL net/wireless/cfg80211 0xd5fd169e	cfg80211_connect_result
+EXPORT_SYMBOL net/wireless/cfg80211 0xe2db4d6e	wiphy_register
+EXPORT_SYMBOL net/wireless/cfg80211 0xe49f8244	cfg80211_put_bss
+EXPORT_SYMBOL net/wireless/cfg80211 0xe8ea97da	wiphy_rfkill_start_polling
+EXPORT_SYMBOL net/wireless/cfg80211 0xe9df47d0	regulatory_hint
+EXPORT_SYMBOL net/wireless/cfg80211 0xed4148d2	cfg80211_send_rx_auth
+EXPORT_SYMBOL net/wireless/cfg80211 0xef723ed3	cfg80211_inform_bss_frame
+EXPORT_SYMBOL net/wireless/lib80211 0x0db6276b	lib80211_register_crypto_ops
+EXPORT_SYMBOL net/wireless/lib80211 0x193949e2	lib80211_crypt_delayed_deinit
+EXPORT_SYMBOL net/wireless/lib80211 0x230f3ffb	lib80211_crypt_deinit_handler
+EXPORT_SYMBOL net/wireless/lib80211 0x2d0f99e5	print_ssid
+EXPORT_SYMBOL net/wireless/lib80211 0x4199e694	lib80211_crypt_deinit_entries
+EXPORT_SYMBOL net/wireless/lib80211 0x5141694c	lib80211_unregister_crypto_ops
+EXPORT_SYMBOL net/wireless/lib80211 0x5f3bfe99	lib80211_crypt_quiescing
+EXPORT_SYMBOL net/wireless/lib80211 0x5fee56bc	lib80211_crypt_info_init
+EXPORT_SYMBOL net/wireless/lib80211 0x63a59ec8	lib80211_get_crypto_ops
+EXPORT_SYMBOL net/wireless/lib80211 0xe1064a85	lib80211_crypt_info_free
+EXPORT_SYMBOL sound/ac97_bus 0x232211de	ac97_bus_type
+EXPORT_SYMBOL sound/core/oss/snd-mixer-oss 0xe826dc1c	snd_mixer_oss_ioctl_card
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x1a724fcc	snd_seq_kernel_client_ctl
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x2a87c425	snd_seq_kernel_client_write_poll
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x3fb4d161	snd_seq_kernel_client_dispatch
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x4016531c	snd_seq_kernel_client_enqueue_blocking
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x6bb71038	snd_seq_delete_kernel_client
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x7ac2f329	snd_seq_expand_var_event
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x7b8699eb	snd_seq_event_port_detach
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x89947013	snd_use_lock_sync_helper
+EXPORT_SYMBOL sound/core/seq/snd-seq 0x930d2d97	snd_seq_create_kernel_client
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xb8bd955d	snd_seq_event_port_attach
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xb8e448a0	snd_seq_set_queue_tempo
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xcac0a3be	snd_seq_kernel_client_enqueue
+EXPORT_SYMBOL sound/core/seq/snd-seq 0xe934da1d	snd_seq_dump_var_event
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x26b49e0a	snd_seq_device_register_driver
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x3a57f235	snd_seq_autoload_unlock
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0x6339b6d0	snd_seq_device_load_drivers
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xb90668b2	snd_seq_autoload_lock
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xc622fb29	snd_seq_device_unregister_driver
+EXPORT_SYMBOL sound/core/seq/snd-seq-device 0xe5ebca69	snd_seq_device_new
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x6ea09972	snd_midi_channel_alloc_set
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0x833a3e07	snd_midi_channel_set_clear
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xb9948d2c	snd_midi_channel_free_set
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-emul 0xf0a1fdb3	snd_midi_process_event
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x025ed7ec	snd_midi_event_no_status
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x08ef1bf8	snd_midi_event_encode_byte
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x484f6d65	snd_midi_event_decode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x6a19e5da	snd_midi_event_encode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0x9d1d1cfe	snd_midi_event_reset_encode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xa343a003	snd_midi_event_reset_decode
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xcca03770	snd_midi_event_free
+EXPORT_SYMBOL sound/core/seq/snd-seq-midi-event 0xf222f56c	snd_midi_event_new
+EXPORT_SYMBOL sound/core/seq/snd-seq-virmidi 0x27cdcfa9	snd_virmidi_new
+EXPORT_SYMBOL sound/core/snd 0x0363f118	snd_card_proc_new
+EXPORT_SYMBOL sound/core/snd 0x08c7c62b	snd_device_free
+EXPORT_SYMBOL sound/core/snd 0x095ac237	snd_card_file_remove
+EXPORT_SYMBOL sound/core/snd 0x0a4d2e85	snd_ctl_register_ioctl
+EXPORT_SYMBOL sound/core/snd 0x0fac13d5	snd_card_file_add
+EXPORT_SYMBOL sound/core/snd 0x198788b4	snd_lookup_oss_minor_data
+EXPORT_SYMBOL sound/core/snd 0x1b54eabf	snd_register_oss_device
+EXPORT_SYMBOL sound/core/snd 0x1c6a7a11	snd_register_device_for_dev
+EXPORT_SYMBOL sound/core/snd 0x24a94b26	snd_info_get_line
+EXPORT_SYMBOL sound/core/snd 0x297a686a	snd_ctl_make_virtual_master
+EXPORT_SYMBOL sound/core/snd 0x2a25eab0	snd_ctl_find_id
+EXPORT_SYMBOL sound/core/snd 0x2ae3deaa	release_and_free_resource
+EXPORT_SYMBOL sound/core/snd 0x2eaf11d8	snd_info_free_entry
+EXPORT_SYMBOL sound/core/snd 0x366b43a4	snd_ctl_rename_id
+EXPORT_SYMBOL sound/core/snd 0x375f2245	snd_seq_root
+EXPORT_SYMBOL sound/core/snd 0x3971b4df	snd_ecards_limit
+EXPORT_SYMBOL sound/core/snd 0x3e5468c2	snd_ctl_notify
+EXPORT_SYMBOL sound/core/snd 0x3f15acb8	snd_card_free_when_closed
+EXPORT_SYMBOL sound/core/snd 0x3f2fbcf4	snd_card_free
+EXPORT_SYMBOL sound/core/snd 0x4169360a	snd_card_create
+EXPORT_SYMBOL sound/core/snd 0x419a5b41	snd_component_add
+EXPORT_SYMBOL sound/core/snd 0x4258c62d	snd_ctl_remove
+EXPORT_SYMBOL sound/core/snd 0x4331ac72	snd_pci_quirk_lookup
+EXPORT_SYMBOL sound/core/snd 0x4921ea48	snd_info_create_card_entry
+EXPORT_SYMBOL sound/core/snd 0x4a3ea5c0	snd_request_card
+EXPORT_SYMBOL sound/core/snd 0x4a553482	snd_ctl_remove_id
+EXPORT_SYMBOL sound/core/snd 0x518bb7f8	copy_from_user_toio
+EXPORT_SYMBOL sound/core/snd 0x5c99394f	snd_ctl_unregister_ioctl
+EXPORT_SYMBOL sound/core/snd 0x607a3e4e	snd_info_create_module_entry
+EXPORT_SYMBOL sound/core/snd 0x643be0ca	snd_jack_set_parent
+EXPORT_SYMBOL sound/core/snd 0x734c8cfd	_snd_ctl_add_slave
+EXPORT_SYMBOL sound/core/snd 0x7e80c342	snd_ctl_unregister_ioctl_compat
+EXPORT_SYMBOL sound/core/snd 0x7efe0da9	snd_device_new
+EXPORT_SYMBOL sound/core/snd 0x8122e593	snd_unregister_device
+EXPORT_SYMBOL sound/core/snd 0x8df3789f	snd_oss_info_register
+EXPORT_SYMBOL sound/core/snd 0x8f595b11	snd_major
+EXPORT_SYMBOL sound/core/snd 0x94f6cca2	snd_card_disconnect
+EXPORT_SYMBOL sound/core/snd 0x97286b08	snd_ctl_boolean_mono_info
+EXPORT_SYMBOL sound/core/snd 0x99d121d7	snd_add_device_sysfs_file
+EXPORT_SYMBOL sound/core/snd 0x9a2db843	snd_ctl_register_ioctl_compat
+EXPORT_SYMBOL sound/core/snd 0x9e6d79f8	snd_info_get_str
+EXPORT_SYMBOL sound/core/snd 0xb2e5ae4a	snd_lookup_minor_data
+EXPORT_SYMBOL sound/core/snd 0xb4b5db1c	snd_ctl_find_numid
+EXPORT_SYMBOL sound/core/snd 0xb74bbf90	snd_unregister_oss_device
+EXPORT_SYMBOL sound/core/snd 0xb79e1cbe	snd_jack_new
+EXPORT_SYMBOL sound/core/snd 0xbe7547a7	snd_ctl_add
+EXPORT_SYMBOL sound/core/snd 0xbf196a08	snd_power_wait
+EXPORT_SYMBOL sound/core/snd 0xc2555335	snd_info_register
+EXPORT_SYMBOL sound/core/snd 0xcb33c8ca	snd_card_set_id
+EXPORT_SYMBOL sound/core/snd 0xcf7e5861	snd_ctl_free_one
+EXPORT_SYMBOL sound/core/snd 0xdaf3b12b	snd_jack_report
+EXPORT_SYMBOL sound/core/snd 0xdde42b43	snd_ctl_boolean_stereo_info
+EXPORT_SYMBOL sound/core/snd 0xe20c9214	snd_iprintf
+EXPORT_SYMBOL sound/core/snd 0xe243dde3	copy_to_user_fromio
+EXPORT_SYMBOL sound/core/snd 0xe3916c93	snd_device_register
+EXPORT_SYMBOL sound/core/snd 0xe83bd6ff	snd_mixer_oss_notify_callback
+EXPORT_SYMBOL sound/core/snd 0xee6ce14e	snd_cards
+EXPORT_SYMBOL sound/core/snd 0xf296cf69	snd_ctl_new1
+EXPORT_SYMBOL sound/core/snd 0xfb90c615	snd_card_register
+EXPORT_SYMBOL sound/core/snd-hwdep 0xe65511e1	snd_hwdep_new
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x19cc2ce3	snd_free_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x33f7000c	snd_dma_reserve_buf
+EXPORT_SYMBOL sound/core/snd-page-alloc 0x60c939b7	snd_dma_alloc_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xc6829020	snd_malloc_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xcb0546e9	snd_dma_get_reserved_buf
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xd2e1d5fc	snd_dma_free_pages
+EXPORT_SYMBOL sound/core/snd-page-alloc 0xd3342d6d	snd_dma_alloc_pages_fallback
+EXPORT_SYMBOL sound/core/snd-pcm 0x0283dfe3	_snd_pcm_hw_params_any
+EXPORT_SYMBOL sound/core/snd-pcm 0x04cda566	snd_interval_refine
+EXPORT_SYMBOL sound/core/snd-pcm 0x1145e09e	snd_pcm_hw_param_last
+EXPORT_SYMBOL sound/core/snd-pcm 0x1af06034	snd_pcm_lib_write
+EXPORT_SYMBOL sound/core/snd-pcm 0x1d027e4b	snd_pcm_format_signed
+EXPORT_SYMBOL sound/core/snd-pcm 0x1f5b9d11	snd_pcm_kernel_ioctl
+EXPORT_SYMBOL sound/core/snd-pcm 0x308485f2	snd_pcm_lib_preallocate_pages_for_all
+EXPORT_SYMBOL sound/core/snd-pcm 0x34c35a38	snd_pcm_link_rwlock
+EXPORT_SYMBOL sound/core/snd-pcm 0x3796bdcc	snd_pcm_format_little_endian
+EXPORT_SYMBOL sound/core/snd-pcm 0x38b26580	snd_pcm_hw_constraint_ratnums
+EXPORT_SYMBOL sound/core/snd-pcm 0x39bf9301	_snd_pcm_hw_param_setempty
+EXPORT_SYMBOL sound/core/snd-pcm 0x3af8aa6f	snd_pcm_hw_rule_add
+EXPORT_SYMBOL sound/core/snd-pcm 0x412716c2	snd_pcm_suspend
+EXPORT_SYMBOL sound/core/snd-pcm 0x4b02fe8a	snd_pcm_new_stream
+EXPORT_SYMBOL sound/core/snd-pcm 0x4ccb5510	snd_pcm_limit_hw_rates
+EXPORT_SYMBOL sound/core/snd-pcm 0x4f816e9b	snd_pcm_format_big_endian
+EXPORT_SYMBOL sound/core/snd-pcm 0x52e3e4a5	snd_pcm_hw_param_value
+EXPORT_SYMBOL sound/core/snd-pcm 0x5c325643	snd_pcm_hw_constraint_pow2
+EXPORT_SYMBOL sound/core/snd-pcm 0x5e7f4920	snd_pcm_format_set_silence
+EXPORT_SYMBOL sound/core/snd-pcm 0x6385c9ef	snd_pcm_hw_constraint_msbits
+EXPORT_SYMBOL sound/core/snd-pcm 0x64938883	snd_pcm_open_substream
+EXPORT_SYMBOL sound/core/snd-pcm 0x650f8603	snd_pcm_format_silence_64
+EXPORT_SYMBOL sound/core/snd-pcm 0x668fb30b	snd_pcm_hw_refine
+EXPORT_SYMBOL sound/core/snd-pcm 0x68a24153	snd_pcm_format_physical_width
+EXPORT_SYMBOL sound/core/snd-pcm 0x6ef8fcd8	snd_pcm_format_linear
+EXPORT_SYMBOL sound/core/snd-pcm 0x70d52268	snd_pcm_period_elapsed
+EXPORT_SYMBOL sound/core/snd-pcm 0x72e8ca6d	snd_pcm_lib_preallocate_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0x7aa8f99b	snd_pcm_lib_ioctl
+EXPORT_SYMBOL sound/core/snd-pcm 0x802e48e5	snd_pcm_set_sync
+EXPORT_SYMBOL sound/core/snd-pcm 0x80ce2e78	snd_pcm_notify
+EXPORT_SYMBOL sound/core/snd-pcm 0x8b717c68	snd_pcm_lib_malloc_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0x9053276b	snd_pcm_hw_param_first
+EXPORT_SYMBOL sound/core/snd-pcm 0x91733823	snd_pcm_new
+EXPORT_SYMBOL sound/core/snd-pcm 0x91e312d8	snd_pcm_lib_writev
+EXPORT_SYMBOL sound/core/snd-pcm 0x92801e08	snd_pcm_stop
+EXPORT_SYMBOL sound/core/snd-pcm 0xa0641bec	snd_pcm_hw_constraint_step
+EXPORT_SYMBOL sound/core/snd-pcm 0xa3c28f32	snd_pcm_hw_constraint_minmax
+EXPORT_SYMBOL sound/core/snd-pcm 0xa59a0a1f	snd_pcm_hw_constraint_list
+EXPORT_SYMBOL sound/core/snd-pcm 0xa5d39fdf	snd_pcm_mmap_data
+EXPORT_SYMBOL sound/core/snd-pcm 0xa61aa028	snd_pcm_format_unsigned
+EXPORT_SYMBOL sound/core/snd-pcm 0xa9869db9	snd_pcm_hw_constraint_ratdens
+EXPORT_SYMBOL sound/core/snd-pcm 0xb4edf756	snd_pcm_lib_preallocate_free_for_all
+EXPORT_SYMBOL sound/core/snd-pcm 0xb9638db4	snd_pcm_rate_to_rate_bit
+EXPORT_SYMBOL sound/core/snd-pcm 0xbbdfd5c7	snd_pcm_lib_free_pages
+EXPORT_SYMBOL sound/core/snd-pcm 0xc1bf6453	snd_pcm_set_ops
+EXPORT_SYMBOL sound/core/snd-pcm 0xc1c95308	snd_pcm_suspend_all
+EXPORT_SYMBOL sound/core/snd-pcm 0xd056be6e	snd_pcm_hw_constraint_integer
+EXPORT_SYMBOL sound/core/snd-pcm 0xd0b9b8b8	snd_interval_list
+EXPORT_SYMBOL sound/core/snd-pcm 0xe2674213	snd_pcm_release_substream
+EXPORT_SYMBOL sound/core/snd-pcm 0xe51a1c64	snd_pcm_format_size
+EXPORT_SYMBOL sound/core/snd-pcm 0xe56a9336	snd_pcm_format_width
+EXPORT_SYMBOL sound/core/snd-pcm 0xe5d93194	snd_pcm_lib_readv
+EXPORT_SYMBOL sound/core/snd-pcm 0xf3797152	snd_interval_ratnum
+EXPORT_SYMBOL sound/core/snd-pcm 0xf9bd5a12	snd_pcm_lib_read
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x1a0f6180	snd_rawmidi_input_params
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x22fbebf9	snd_rawmidi_kernel_read
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x27b51503	snd_rawmidi_transmit
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x3e078270	snd_rawmidi_new
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x48a5f5f6	snd_rawmidi_transmit_peek
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x4c5d6f75	snd_rawmidi_receive
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x60a711ca	snd_rawmidi_kernel_open
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x659bac7e	snd_rawmidi_kernel_release
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x6f35f83f	snd_rawmidi_drain_output
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x71943239	snd_rawmidi_set_ops
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x8bed692d	snd_rawmidi_transmit_empty
+EXPORT_SYMBOL sound/core/snd-rawmidi 0x9a1b544a	snd_rawmidi_output_params
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xa6e3a2ec	snd_rawmidi_transmit_ack
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xd8bfe524	snd_rawmidi_info_select
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xe8b3f407	snd_rawmidi_drop_output
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xee401319	snd_rawmidi_drain_input
+EXPORT_SYMBOL sound/core/snd-rawmidi 0xffbf6f7c	snd_rawmidi_kernel_write
+EXPORT_SYMBOL sound/core/snd-timer 0x0b828a8b	snd_timer_notify
+EXPORT_SYMBOL sound/core/snd-timer 0x1642ed53	snd_timer_close
+EXPORT_SYMBOL sound/core/snd-timer 0x20fdcd59	snd_timer_start
+EXPORT_SYMBOL sound/core/snd-timer 0x214a68f3	snd_timer_resolution
+EXPORT_SYMBOL sound/core/snd-timer 0x274ef033	snd_timer_new
+EXPORT_SYMBOL sound/core/snd-timer 0x404f8e5f	snd_timer_global_register
+EXPORT_SYMBOL sound/core/snd-timer 0x5743ff62	snd_timer_pause
+EXPORT_SYMBOL sound/core/snd-timer 0xb890b5d0	snd_timer_global_new
+EXPORT_SYMBOL sound/core/snd-timer 0xc87e81ff	snd_timer_stop
+EXPORT_SYMBOL sound/core/snd-timer 0xd8803147	snd_timer_open
+EXPORT_SYMBOL sound/core/snd-timer 0xdd85261f	snd_timer_interrupt
+EXPORT_SYMBOL sound/core/snd-timer 0xf3c615a6	snd_timer_continue
+EXPORT_SYMBOL sound/core/snd-timer 0xfab03387	snd_timer_global_free
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x127a243c	snd_mpu401_uart_new
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0x4bbb7f27	snd_mpu401_uart_interrupt_tx
+EXPORT_SYMBOL sound/drivers/mpu401/snd-mpu401-uart 0xc43a3940	snd_mpu401_uart_interrupt
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x05060a19	snd_opl3_regmap
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x26aedde4	snd_opl3_load_patch
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x306ba5bd	snd_opl3_new
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x4da8ae32	snd_opl3_interrupt
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x58b735f4	snd_opl3_find_patch
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x603732a3	snd_opl3_create
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x6360f4d5	snd_opl3_timer_new
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0x78bbdcd4	snd_opl3_reset
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xab2ce030	snd_opl3_init
+EXPORT_SYMBOL sound/drivers/opl3/snd-opl3-lib 0xc961852c	snd_opl3_hwdep_new
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x191f33d1	snd_vx_dsp_boot
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x2e7f5c92	snd_vx_suspend
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x4504df5a	snd_vx_check_reg_bit
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x54447ab3	snd_vx_load_boot_image
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x5cd1025c	snd_vx_dsp_load
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x82b949d0	snd_vx_create
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0x99b88ede	snd_vx_irq_handler
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xcd581fc6	snd_vx_setup_firmware
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xcf2a12d5	snd_vx_resume
+EXPORT_SYMBOL sound/drivers/vx/snd-vx-lib 0xf5a62ff2	snd_vx_free_firmware
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0x0f05813d	snd_ak4114_reinit
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xae35c8c3	snd_ak4114_reg_write
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xb528c497	snd_ak4114_check_rate_and_errors
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xd8f13f07	snd_ak4114_create
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xdc9fc44b	snd_ak4114_external_rate
+EXPORT_SYMBOL sound/i2c/other/snd-ak4114 0xf76debec	snd_ak4114_build
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x3b2dfa9a	snd_ak4117_check_rate_and_errors
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x5008d4dd	snd_ak4117_reg_write
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x53e84a62	snd_ak4117_external_rate
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0x5d032604	snd_ak4117_create
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xc425f602	snd_ak4117_reinit
+EXPORT_SYMBOL sound/i2c/other/snd-ak4117 0xd5088973	snd_ak4117_build
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x85b5c553	snd_akm4xxx_write
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0x944bfcc9	snd_akm4xxx_build_controls
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xe807fa24	snd_akm4xxx_init
+EXPORT_SYMBOL sound/i2c/other/snd-ak4xxx-adda 0xfbbfb8a9	snd_akm4xxx_reset
+EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0x3aef6775	snd_pt2258_reset
+EXPORT_SYMBOL sound/i2c/other/snd-pt2258 0xadbc4710	snd_pt2258_build_controls
+EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0x02c2e262	snd_tea575x_exit
+EXPORT_SYMBOL sound/i2c/other/snd-tea575x-tuner 0x99906410	snd_tea575x_init
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x7a2776c5	snd_cs8427_iec958_active
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x8eff58be	snd_cs8427_reg_write
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0x9e139e03	snd_cs8427_create
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0xce2ad93e	snd_cs8427_iec958_pcm
+EXPORT_SYMBOL sound/i2c/snd-cs8427 0xd4eeccd5	snd_cs8427_iec958_build
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x1dd000f5	snd_i2c_probeaddr
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x40e66e5b	snd_i2c_sendbytes
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x6a1ef4b1	snd_i2c_readbytes
+EXPORT_SYMBOL sound/i2c/snd-i2c 0x6ebe2ae6	snd_i2c_device_free
+EXPORT_SYMBOL sound/i2c/snd-i2c 0xc7479ad9	snd_i2c_bus_create
+EXPORT_SYMBOL sound/i2c/snd-i2c 0xd94484d5	snd_i2c_device_create
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x2f8ea557	snd_ac97_pcm_open
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x5fb5fd9b	snd_ac97_read
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x70ab3713	snd_ac97_update_bits
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x7db49980	snd_ac97_write
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x89706331	snd_ac97_set_rate
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x8fd29f5a	snd_ac97_update
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x903e584e	snd_ac97_pcm_double_rate_rules
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x99874fc0	snd_ac97_update_power
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x9a2b7cde	snd_ac97_write_cache
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0x9b40951a	snd_ac97_suspend
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xa81eb61f	snd_ac97_tune_hardware
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xb0690a66	snd_ac97_mixer
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xdb94bb56	snd_ac97_get_short_name
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xea1d3aae	snd_ac97_pcm_assign
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xef5a050b	snd_ac97_resume
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xf61c3f65	snd_ac97_pcm_close
+EXPORT_SYMBOL sound/pci/ac97/snd-ac97-codec 0xf7ca4ac0	snd_ac97_bus
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x16de91d9	snd_emu10k1_synth_bzero
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x2898b618	snd_emu10k1_synth_free
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x4e5e742f	snd_emu10k1_voice_alloc
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x571899b9	snd_emu10k1_ptr_read
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x69e71c04	snd_emu10k1_memblk_map
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x7d279033	snd_emu10k1_ptr_write
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0x967a11c8	snd_emu10k1_voice_free
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xb363134e	snd_emu10k1_synth_alloc
+EXPORT_SYMBOL sound/pci/emu10k1/snd-emu10k1 0xe5a0dc50	snd_emu10k1_synth_copy_from_user
+EXPORT_SYMBOL sound/pci/hda/snd-hda-codec 0x8d0cbfc9	snd_hda_parse_generic_codec
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x3537a65d	snd_ice1712_akm4xxx_free
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0x85c0a952	snd_ice1712_akm4xxx_init
+EXPORT_SYMBOL sound/pci/ice1712/snd-ice17xx-ak4xxx 0xfd34c8db	snd_ice1712_akm4xxx_build_controls
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x1d4d933c	snd_trident_alloc_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x7839a4f0	snd_trident_write_voice_regs
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0x9685c682	snd_trident_free_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0xb152b292	snd_trident_start_voice
+EXPORT_SYMBOL sound/pci/trident/snd-trident 0xf57ec234	snd_trident_stop_voice
+EXPORT_SYMBOL sound/soc/codecs/snd-soc-uda134x 0x08784f07	uda134x_dai
+EXPORT_SYMBOL sound/sound_firmware 0x39e3dd23	mod_firmware_load
+EXPORT_SYMBOL sound/soundcore 0x04d06cf9	register_sound_mixer
+EXPORT_SYMBOL sound/soundcore 0x37efff27	register_sound_special
+EXPORT_SYMBOL sound/soundcore 0x3a036449	register_sound_special_device
+EXPORT_SYMBOL sound/soundcore 0x77db71b7	register_sound_dsp
+EXPORT_SYMBOL sound/soundcore 0x7afc9d8a	unregister_sound_mixer
+EXPORT_SYMBOL sound/soundcore 0x98a9bc26	register_sound_midi
+EXPORT_SYMBOL sound/soundcore 0x99c95fa5	unregister_sound_special
+EXPORT_SYMBOL sound/soundcore 0xa4174152	sound_class
+EXPORT_SYMBOL sound/soundcore 0xcd083b10	unregister_sound_dsp
+EXPORT_SYMBOL sound/soundcore 0xfdab6de3	unregister_sound_midi
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x22ea05c1	snd_emux_register
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x37d44b21	snd_emux_free
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x63b3c14d	snd_emux_terminate_all
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x655cb202	snd_sf_linear_to_log
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x7d47d050	snd_emux_unlock_voice
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0x953e7215	snd_emux_new
+EXPORT_SYMBOL sound/synth/emux/snd-emux-synth 0xb1dd2e83	snd_emux_lock_voice
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x31b2374f	snd_util_mem_avail
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x56c16712	__snd_util_memblk_new
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x6278f0d4	snd_util_memhdr_free
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x84adad8b	__snd_util_mem_alloc
+EXPORT_SYMBOL sound/synth/snd-util-mem 0x9e7daabc	snd_util_mem_free
+EXPORT_SYMBOL sound/synth/snd-util-mem 0xd86b1d10	snd_util_memhdr_new
+EXPORT_SYMBOL sound/synth/snd-util-mem 0xdb22ddd3	snd_util_mem_alloc
+EXPORT_SYMBOL sound/synth/snd-util-mem 0xdefd41fe	__snd_util_mem_free
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0x16756dc0	snd_usbmidi_input_start
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0x63343b1d	snd_usbmidi_input_stop
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0xd9d2bb03	snd_usbmidi_disconnect
+EXPORT_SYMBOL sound/usb/snd-usb-lib 0xedb7a4cd	snd_usb_create_midi_interface
+EXPORT_SYMBOL vmlinux 0x00000000	per_cpu__softirq_work_list
+EXPORT_SYMBOL vmlinux 0x0012c403	matroxfb_g450_setpll_cond
+EXPORT_SYMBOL vmlinux 0x005e3723	cfb_fillrect
+EXPORT_SYMBOL vmlinux 0x00801678	flush_scheduled_work
+EXPORT_SYMBOL vmlinux 0x009d8229	generic_file_aio_read
+EXPORT_SYMBOL vmlinux 0x00c4dc87	timecounter_init
+EXPORT_SYMBOL vmlinux 0x00cbf0ac	generic_getxattr
+EXPORT_SYMBOL vmlinux 0x00e7bf74	vlan_ioctl_set
+EXPORT_SYMBOL vmlinux 0x00eef49e	__strnlen_user
+EXPORT_SYMBOL vmlinux 0x010f2241	kill_litter_super
+EXPORT_SYMBOL vmlinux 0x011c1605	inet_select_addr
+EXPORT_SYMBOL vmlinux 0x0179fdd9	per_cpu__cpu_info
+EXPORT_SYMBOL vmlinux 0x01902adf	netpoll_trap
+EXPORT_SYMBOL vmlinux 0x019778d1	pci_enable_wake
+EXPORT_SYMBOL vmlinux 0x01987856	unregister_snap_client
+EXPORT_SYMBOL vmlinux 0x01a0e3a9	call_usermodehelper_exec
+EXPORT_SYMBOL vmlinux 0x01a4aab6	set_irq_chip_data
+EXPORT_SYMBOL vmlinux 0x01d19038	acpi_enable_subsystem
+EXPORT_SYMBOL vmlinux 0x01d38e70	dqput
+EXPORT_SYMBOL vmlinux 0x02124474	ip_send_check
+EXPORT_SYMBOL vmlinux 0x0237b57a	arch_unregister_cpu
+EXPORT_SYMBOL vmlinux 0x02397355	tcp_gro_receive
+EXPORT_SYMBOL vmlinux 0x02649054	security_sock_rcv_skb
+EXPORT_SYMBOL vmlinux 0x02672e43	inode_change_ok
+EXPORT_SYMBOL vmlinux 0x02931a03	ethtool_op_set_sg
+EXPORT_SYMBOL vmlinux 0x02a6ce5a	crc16_table
+EXPORT_SYMBOL vmlinux 0x02ab1afe	end_buffer_read_sync
+EXPORT_SYMBOL vmlinux 0x02aff2f4	acpi_install_gpe_handler
+EXPORT_SYMBOL vmlinux 0x02b1007a	vfs_write
+EXPORT_SYMBOL vmlinux 0x02b8d6f0	xfrm_policy_alloc
+EXPORT_SYMBOL vmlinux 0x02d0cad2	neigh_table_clear
+EXPORT_SYMBOL vmlinux 0x02d81845	audit_log_task_context
+EXPORT_SYMBOL vmlinux 0x0334da4e	scsi_command_size_tbl
+EXPORT_SYMBOL vmlinux 0x0336fb4d	sock_wfree
+EXPORT_SYMBOL vmlinux 0x0340d0e1	acpi_pci_osc_control_set
+EXPORT_SYMBOL vmlinux 0x0340e0ae	schedule_delayed_work
+EXPORT_SYMBOL vmlinux 0x035bcc46	vm_insert_pfn
+EXPORT_SYMBOL vmlinux 0x037a0cba	kfree
+EXPORT_SYMBOL vmlinux 0x038f52e0	register_qdisc
+EXPORT_SYMBOL vmlinux 0x039e5940	remove_arg_zero
+EXPORT_SYMBOL vmlinux 0x03a60757	blk_get_request
+EXPORT_SYMBOL vmlinux 0x03c06156	bitmap_fold
+EXPORT_SYMBOL vmlinux 0x03e150e4	phy_connect_direct
+EXPORT_SYMBOL vmlinux 0x03f0cc90	set_user_nice
+EXPORT_SYMBOL vmlinux 0x03fd2571	vm_unmap_ram
+EXPORT_SYMBOL vmlinux 0x0422fe4a	inet_csk_timer_bug_msg
+EXPORT_SYMBOL vmlinux 0x0428aecf	dev_set_mtu
+EXPORT_SYMBOL vmlinux 0x0487f831	fb_find_best_display
+EXPORT_SYMBOL vmlinux 0x04ae4399	gnet_stats_copy_rate_est
+EXPORT_SYMBOL vmlinux 0x04d43090	igrab
+EXPORT_SYMBOL vmlinux 0x04f51d3a	proto_register
+EXPORT_SYMBOL vmlinux 0x05101413	textsearch_register
+EXPORT_SYMBOL vmlinux 0x051a5f61	udp_flush_pending_frames
+EXPORT_SYMBOL vmlinux 0x05240ee7	percpu_counter_batch
+EXPORT_SYMBOL vmlinux 0x053ea22b	sn_region_size
+EXPORT_SYMBOL vmlinux 0x05776976	tcp_simple_retransmit
+EXPORT_SYMBOL vmlinux 0x0585a0d0	security_path_symlink
+EXPORT_SYMBOL vmlinux 0x0586e30a	lookup_hash
+EXPORT_SYMBOL vmlinux 0x05f4946a	serio_unregister_child_port
+EXPORT_SYMBOL vmlinux 0x060d680f	xor_ia64_4
+EXPORT_SYMBOL vmlinux 0x061651be	strcat
+EXPORT_SYMBOL vmlinux 0x06494d61	vga_get
+EXPORT_SYMBOL vmlinux 0x06533b82	pci_enable_device_io
+EXPORT_SYMBOL vmlinux 0x06774741	pci_wake_from_d3
+EXPORT_SYMBOL vmlinux 0x06777c7d	simple_write_begin
+EXPORT_SYMBOL vmlinux 0x067d8d35	security_release_secctx
+EXPORT_SYMBOL vmlinux 0x0683511f	blk_rq_map_sg
+EXPORT_SYMBOL vmlinux 0x06a485f2	__krealloc
+EXPORT_SYMBOL vmlinux 0x06bc75b4	bd_release
+EXPORT_SYMBOL vmlinux 0x06bdaa1b	generic_file_llseek_unlocked
+EXPORT_SYMBOL vmlinux 0x06bfd4f6	interruptible_sleep_on
+EXPORT_SYMBOL vmlinux 0x06d728b1	tcp_parse_md5sig_option
+EXPORT_SYMBOL vmlinux 0x06dc649e	__dev_remove_pack
+EXPORT_SYMBOL vmlinux 0x06debc85	framebuffer_release
+EXPORT_SYMBOL vmlinux 0x06e12a13	____pagevec_lru_add
+EXPORT_SYMBOL vmlinux 0x06fe3b14	default_grn
+EXPORT_SYMBOL vmlinux 0x0700f391	sock_alloc_send_skb
+EXPORT_SYMBOL vmlinux 0x0718c22c	_write_lock_irq
+EXPORT_SYMBOL vmlinux 0x0727c4f3	iowrite8
+EXPORT_SYMBOL vmlinux 0x07644abe	security_inode_setsecctx
+EXPORT_SYMBOL vmlinux 0x077ad7bd	__page_cache_alloc
+EXPORT_SYMBOL vmlinux 0x077b14bb	sk_common_release
+EXPORT_SYMBOL vmlinux 0x077f50e0	sock_no_recvmsg
+EXPORT_SYMBOL vmlinux 0x0797b393	cont_write_begin
+EXPORT_SYMBOL vmlinux 0x0799aca4	local_bh_enable
+EXPORT_SYMBOL vmlinux 0x0799c50a	param_set_ulong
+EXPORT_SYMBOL vmlinux 0x07a890c8	fb_alloc_cmap
+EXPORT_SYMBOL vmlinux 0x07cc4a5d	printk_timed_ratelimit
+EXPORT_SYMBOL vmlinux 0x07d708c1	blk_queue_stack_limits
+EXPORT_SYMBOL vmlinux 0x07ea53d5	ethtool_op_set_tx_hw_csum
+EXPORT_SYMBOL vmlinux 0x080b4c30	pci_bus_read_config_word
+EXPORT_SYMBOL vmlinux 0x081a9d9a	elv_rb_find
+EXPORT_SYMBOL vmlinux 0x082c3213	pci_root_buses
+EXPORT_SYMBOL vmlinux 0x0859e7a7	i2c_smbus_xfer
+EXPORT_SYMBOL vmlinux 0x0899eb2a	DAC1064_global_restore
+EXPORT_SYMBOL vmlinux 0x08bc8fdb	napi_get_frags
+EXPORT_SYMBOL vmlinux 0x08d66a3a	warn_slowpath_fmt
+EXPORT_SYMBOL vmlinux 0x08d8dc75	unregister_framebuffer
+EXPORT_SYMBOL vmlinux 0x08e6b007	ia64_iobase
+EXPORT_SYMBOL vmlinux 0x08ef857c	writeback_inodes_sb
+EXPORT_SYMBOL vmlinux 0x08f2df3b	unmap_underlying_metadata
+EXPORT_SYMBOL vmlinux 0x08fbdd71	netpoll_send_udp
+EXPORT_SYMBOL vmlinux 0x0919323f	tcp_v4_remember_stamp
+EXPORT_SYMBOL vmlinux 0x0920be86	inode_init_once
+EXPORT_SYMBOL vmlinux 0x092c5c03	journal_blocks_per_page
+EXPORT_SYMBOL vmlinux 0x0948cde9	num_physpages
+EXPORT_SYMBOL vmlinux 0x0948cea7	poll_initwait
+EXPORT_SYMBOL vmlinux 0x097a00b5	sg_miter_next
+EXPORT_SYMBOL vmlinux 0x098431ba	acpi_get_current_resources
+EXPORT_SYMBOL vmlinux 0x098b71c6	fb_dealloc_cmap
+EXPORT_SYMBOL vmlinux 0x09991e7b	kfifo_init
+EXPORT_SYMBOL vmlinux 0x099cbf5b	mb_cache_shrink
+EXPORT_SYMBOL vmlinux 0x09bcd569	__kfree_skb
+EXPORT_SYMBOL vmlinux 0x09c55cec	schedule_timeout_interruptible
+EXPORT_SYMBOL vmlinux 0x09c8eb55	font_vga_8x16
+EXPORT_SYMBOL vmlinux 0x09d44df9	in_lock_functions
+EXPORT_SYMBOL vmlinux 0x09d5a7ba	pcix_get_mmrbc
+EXPORT_SYMBOL vmlinux 0x09d84cb8	bio_pair_release
+EXPORT_SYMBOL vmlinux 0x09ea7404	ip_ct_attach
+EXPORT_SYMBOL vmlinux 0x0a2487e0	unblock_all_signals
+EXPORT_SYMBOL vmlinux 0x0a2c5fcb	inet_getname
+EXPORT_SYMBOL vmlinux 0x0a75a6ea	sk_wait_data
+EXPORT_SYMBOL vmlinux 0x0a823f91	blk_init_tags
+EXPORT_SYMBOL vmlinux 0x0ab850cf	ip_dev_find
+EXPORT_SYMBOL vmlinux 0x0ab925a1	ip_defrag
+EXPORT_SYMBOL vmlinux 0x0acb1a3c	__bitmap_shift_right
+EXPORT_SYMBOL vmlinux 0x0acca637	min_low_pfn
+EXPORT_SYMBOL vmlinux 0x0ad670aa	bdevname
+EXPORT_SYMBOL vmlinux 0x0ad95464	block_invalidatepage
+EXPORT_SYMBOL vmlinux 0x0ae4c718	pci_disable_msi
+EXPORT_SYMBOL vmlinux 0x0ae55b39	per_cpu__kstat
+EXPORT_SYMBOL vmlinux 0x0b1beb31	vmalloc_32_user
+EXPORT_SYMBOL vmlinux 0x0b3221af	shrink_dcache_parent
+EXPORT_SYMBOL vmlinux 0x0b742fd7	simple_strtol
+EXPORT_SYMBOL vmlinux 0x0b8e8a7a	__alloc_skb
+EXPORT_SYMBOL vmlinux 0x0bb0a997	sn_sharing_domain_size
+EXPORT_SYMBOL vmlinux 0x0beccd01	key_task_permission
+EXPORT_SYMBOL vmlinux 0x0c25373a	current_fs_time
+EXPORT_SYMBOL vmlinux 0x0c2d7674	tcp_ioctl
+EXPORT_SYMBOL vmlinux 0x0c3b5d1b	nobh_writepage
+EXPORT_SYMBOL vmlinux 0x0c56a293	i2c_smbus_write_word_data
+EXPORT_SYMBOL vmlinux 0x0c5d6a07	inet_add_protocol
+EXPORT_SYMBOL vmlinux 0x0c5f4c1f	gen_pool_alloc
+EXPORT_SYMBOL vmlinux 0x0c8c3813	xfrm_register_mode
+EXPORT_SYMBOL vmlinux 0x0ca759b0	console_start
+EXPORT_SYMBOL vmlinux 0x0ca7b7a8	acpi_check_region
+EXPORT_SYMBOL vmlinux 0x0ca87a83	dev_add_pack
+EXPORT_SYMBOL vmlinux 0x0caa805d	sk_stream_error
+EXPORT_SYMBOL vmlinux 0x0cae232b	utf16s_to_utf8s
+EXPORT_SYMBOL vmlinux 0x0cd7d26b	_read_lock
+EXPORT_SYMBOL vmlinux 0x0cec741c	pipe_to_file
+EXPORT_SYMBOL vmlinux 0x0d3205ec	simple_dir_operations
+EXPORT_SYMBOL vmlinux 0x0d3dda14	acpi_get_type
+EXPORT_SYMBOL vmlinux 0x0d477f49	pskb_copy
+EXPORT_SYMBOL vmlinux 0x0d542439	__ipv6_addr_type
+EXPORT_SYMBOL vmlinux 0x0d824087	xfrm4_prepare_output
+EXPORT_SYMBOL vmlinux 0x0da10ec3	security_sock_graft
+EXPORT_SYMBOL vmlinux 0x0dbce1b9	idr_for_each
+EXPORT_SYMBOL vmlinux 0x0df40966	pci_release_regions
+EXPORT_SYMBOL vmlinux 0x0e06bd5a	qdisc_watchdog_schedule
+EXPORT_SYMBOL vmlinux 0x0e21ab0d	dquot_scan_active
+EXPORT_SYMBOL vmlinux 0x0e52592a	panic
+EXPORT_SYMBOL vmlinux 0x0e53c48f	vfs_get_dqblk
+EXPORT_SYMBOL vmlinux 0x0e76089a	misc_deregister
+EXPORT_SYMBOL vmlinux 0x0e8105b1	xfrm_dst_ifdown
+EXPORT_SYMBOL vmlinux 0x0e81f0e4	cpu_present_mask
+EXPORT_SYMBOL vmlinux 0x0e86d1e2	sock_rfree
+EXPORT_SYMBOL vmlinux 0x0e906fdf	i2c_smbus_write_block_data
+EXPORT_SYMBOL vmlinux 0x0ebcadb9	dm_table_put
+EXPORT_SYMBOL vmlinux 0x0ec07dc3	arp_find
+EXPORT_SYMBOL vmlinux 0x0f028a51	block_truncate_page
+EXPORT_SYMBOL vmlinux 0x0f0ccdfa	sock_wake_async
+EXPORT_SYMBOL vmlinux 0x0f1ef871	posix_acl_alloc
+EXPORT_SYMBOL vmlinux 0x0f564e92	tcp_disconnect
+EXPORT_SYMBOL vmlinux 0x0fc5e8eb	radix_tree_gang_lookup_slot
+EXPORT_SYMBOL vmlinux 0x0fd00a68	acpi_clear_event
+EXPORT_SYMBOL vmlinux 0x102b5b21	sn_system_serial_number_string
+EXPORT_SYMBOL vmlinux 0x102e3d45	get_disk
+EXPORT_SYMBOL vmlinux 0x104d432b	kfifo_free
+EXPORT_SYMBOL vmlinux 0x1072a394	csum_partial_copy_from_user
+EXPORT_SYMBOL vmlinux 0x1089df0d	da903x_query_status
+EXPORT_SYMBOL vmlinux 0x108e8985	param_get_uint
+EXPORT_SYMBOL vmlinux 0x1092da2e	get_sb_single
+EXPORT_SYMBOL vmlinux 0x10b50a18	mb_cache_entry_find_next
+EXPORT_SYMBOL vmlinux 0x10b71a58	sock_no_getsockopt
+EXPORT_SYMBOL vmlinux 0x10d1b32b	pci_enable_msix
+EXPORT_SYMBOL vmlinux 0x10ee20bb	default_blu
+EXPORT_SYMBOL vmlinux 0x110097c6	journal_flush
+EXPORT_SYMBOL vmlinux 0x110f8cb5	panic_notifier_list
+EXPORT_SYMBOL vmlinux 0x11114427	fb_show_logo
+EXPORT_SYMBOL vmlinux 0x114ed1ce	schedule_work_on
+EXPORT_SYMBOL vmlinux 0x1157b1dd	alloc_fcdev
+EXPORT_SYMBOL vmlinux 0x1163f0a7	blk_max_low_pfn
+EXPORT_SYMBOL vmlinux 0x117093be	qdisc_class_hash_init
+EXPORT_SYMBOL vmlinux 0x1175fa7e	I_BDEV
+EXPORT_SYMBOL vmlinux 0x118f01ea	putname
+EXPORT_SYMBOL vmlinux 0x11ab8bd7	netlink_kernel_release
+EXPORT_SYMBOL vmlinux 0x12189a5a	dquot_initialize
+EXPORT_SYMBOL vmlinux 0x124c9939	prepare_to_wait
+EXPORT_SYMBOL vmlinux 0x1262e07e	vlan_gro_receive
+EXPORT_SYMBOL vmlinux 0x126be65c	wait_for_completion_interruptible
+EXPORT_SYMBOL vmlinux 0x1282e58c	block_write_begin
+EXPORT_SYMBOL vmlinux 0x129697b8	memcpy_toio
+EXPORT_SYMBOL vmlinux 0x133a482d	set_security_override
+EXPORT_SYMBOL vmlinux 0x133d730b	new_inode
+EXPORT_SYMBOL vmlinux 0x1373fe41	prepare_binprm
+EXPORT_SYMBOL vmlinux 0x13787d65	mb_cache_entry_insert
+EXPORT_SYMBOL vmlinux 0x13895013	matroxfb_wait_for_sync
+EXPORT_SYMBOL vmlinux 0x138a78d1	set_current_groups
+EXPORT_SYMBOL vmlinux 0x138d4c21	path_get
+EXPORT_SYMBOL vmlinux 0x13963526	find_get_pages_contig
+EXPORT_SYMBOL vmlinux 0x13da4d2a	inode_newsize_ok
+EXPORT_SYMBOL vmlinux 0x13e3f1bc	truncate_inode_pages
+EXPORT_SYMBOL vmlinux 0x13ef8985	bio_integrity_enabled
+EXPORT_SYMBOL vmlinux 0x1414c3bd	pnp_is_active
+EXPORT_SYMBOL vmlinux 0x14232da8	nf_ct_attach
+EXPORT_SYMBOL vmlinux 0x1430e6e0	unregister_acpi_notifier
+EXPORT_SYMBOL vmlinux 0x14448f3a	gen_new_estimator
+EXPORT_SYMBOL vmlinux 0x14533049	ps2_command
+EXPORT_SYMBOL vmlinux 0x145e1681	pnp_activate_dev
+EXPORT_SYMBOL vmlinux 0x14705cbf	replace_mount_options
+EXPORT_SYMBOL vmlinux 0x1470e26b	udp_prot
+EXPORT_SYMBOL vmlinux 0x147b4369	force_sig
+EXPORT_SYMBOL vmlinux 0x1486965c	dev_unicast_delete
+EXPORT_SYMBOL vmlinux 0x1499db9b	bio_integrity_split
+EXPORT_SYMBOL vmlinux 0x149f121e	kernel_connect
+EXPORT_SYMBOL vmlinux 0x14d0db48	tcp_shutdown
+EXPORT_SYMBOL vmlinux 0x15072faa	__sk_dst_check
+EXPORT_SYMBOL vmlinux 0x154d9b2e	__xfrm_route_forward
+EXPORT_SYMBOL vmlinux 0x1551dc51	bitmap_find_free_region
+EXPORT_SYMBOL vmlinux 0x15576588	dquot_alloc_space
+EXPORT_SYMBOL vmlinux 0x15688353	genphy_restart_aneg
+EXPORT_SYMBOL vmlinux 0x15c7605a	pci_get_class
+EXPORT_SYMBOL vmlinux 0x15ef0548	kernel_sendmsg
+EXPORT_SYMBOL vmlinux 0x1612bd20	key_unlink
+EXPORT_SYMBOL vmlinux 0x161a7162	pcim_iounmap_regions
+EXPORT_SYMBOL vmlinux 0x16305289	warn_slowpath_null
+EXPORT_SYMBOL vmlinux 0x163c5e39	twl4030_i2c_read
+EXPORT_SYMBOL vmlinux 0x165569c3	clip_tbl_hook
+EXPORT_SYMBOL vmlinux 0x166e8cc3	ethtool_op_set_ufo
+EXPORT_SYMBOL vmlinux 0x1675606f	bad_dma_address
+EXPORT_SYMBOL vmlinux 0x16a6cb65	pci_try_set_mwi
+EXPORT_SYMBOL vmlinux 0x16f86b59	inet_bind
+EXPORT_SYMBOL vmlinux 0x170c25ee	acpi_get_next_object
+EXPORT_SYMBOL vmlinux 0x173f22f6	mdiobus_unregister
+EXPORT_SYMBOL vmlinux 0x1750ac88	pci_enable_device
+EXPORT_SYMBOL vmlinux 0x175f433f	tcp_close
+EXPORT_SYMBOL vmlinux 0x1763305a	kernel_getsockopt
+EXPORT_SYMBOL vmlinux 0x17959c91	mdio_bus_type
+EXPORT_SYMBOL vmlinux 0x17a4fc8f	udp_proc_register
+EXPORT_SYMBOL vmlinux 0x17c85a66	radix_tree_tagged
+EXPORT_SYMBOL vmlinux 0x17c99625	qdisc_watchdog_init
+EXPORT_SYMBOL vmlinux 0x17ccd151	pneigh_enqueue
+EXPORT_SYMBOL vmlinux 0x17d213de	xfrm_state_delete_tunnel
+EXPORT_SYMBOL vmlinux 0x17d4a276	remove_proc_entry
+EXPORT_SYMBOL vmlinux 0x17d6ea6a	pneigh_lookup
+EXPORT_SYMBOL vmlinux 0x17df17bc	sysctl_tcp_ecn
+EXPORT_SYMBOL vmlinux 0x17f341a0	i8042_lock_chip
+EXPORT_SYMBOL vmlinux 0x181b6685	idr_remove
+EXPORT_SYMBOL vmlinux 0x181d3d5c	skb_kill_datagram
+EXPORT_SYMBOL vmlinux 0x183fa88b	mempool_alloc_slab
+EXPORT_SYMBOL vmlinux 0x185a5f73	input_get_keycode
+EXPORT_SYMBOL vmlinux 0x186ec89b	ps2_end_command
+EXPORT_SYMBOL vmlinux 0x187d634c	__bread
+EXPORT_SYMBOL vmlinux 0x188058e9	blk_queue_dma_alignment
+EXPORT_SYMBOL vmlinux 0x1890472e	jbd2_journal_ack_err
+EXPORT_SYMBOL vmlinux 0x189b6bac	memory_read_from_buffer
+EXPORT_SYMBOL vmlinux 0x18a28b21	bfifo_qdisc_ops
+EXPORT_SYMBOL vmlinux 0x18e4a753	rtc_dev_update_irq_enable_emul
+EXPORT_SYMBOL vmlinux 0x18e8401d	proc_dointvec_jiffies
+EXPORT_SYMBOL vmlinux 0x192b140a	pci_enable_device_mem
+EXPORT_SYMBOL vmlinux 0x19391763	iov_iter_fault_in_readable
+EXPORT_SYMBOL vmlinux 0x19456bf2	dm_table_get_size
+EXPORT_SYMBOL vmlinux 0x19475ea0	call_usermodehelper_setcleanup
+EXPORT_SYMBOL vmlinux 0x1952b4f4	lro_vlan_hwaccel_receive_skb
+EXPORT_SYMBOL vmlinux 0x199ed0cd	net_disable_timestamp
+EXPORT_SYMBOL vmlinux 0x19be13bc	ip_getsockopt
+EXPORT_SYMBOL vmlinux 0x19d5d20a	acpi_walk_namespace
+EXPORT_SYMBOL vmlinux 0x19e107ec	posix_unblock_lock
+EXPORT_SYMBOL vmlinux 0x1a072435	generic_listxattr
+EXPORT_SYMBOL vmlinux 0x1a0adefa	sock_release
+EXPORT_SYMBOL vmlinux 0x1a234f91	__module_put_and_exit
+EXPORT_SYMBOL vmlinux 0x1a8a845e	idle_nomwait
+EXPORT_SYMBOL vmlinux 0x1a8ac98d	devm_ioremap_nocache
+EXPORT_SYMBOL vmlinux 0x1a978d4c	dcache_dir_open
+EXPORT_SYMBOL vmlinux 0x1aa069e5	serio_close
+EXPORT_SYMBOL vmlinux 0x1aa4158d	xfrm_input
+EXPORT_SYMBOL vmlinux 0x1abc930e	phy_stop
+EXPORT_SYMBOL vmlinux 0x1ace138d	bitmap_allocate_region
+EXPORT_SYMBOL vmlinux 0x1af660c4	ilookup
+EXPORT_SYMBOL vmlinux 0x1b015d25	bitmap_parselist
+EXPORT_SYMBOL vmlinux 0x1b6314fd	in_aton
+EXPORT_SYMBOL vmlinux 0x1b7a189b	pci_reenable_device
+EXPORT_SYMBOL vmlinux 0x1b7ea8a1	journal_check_available_features
+EXPORT_SYMBOL vmlinux 0x1b8b95ad	i8042_unlock_chip
+EXPORT_SYMBOL vmlinux 0x1b8d4b7d	pci_release_region
+EXPORT_SYMBOL vmlinux 0x1b99746e	simple_write_end
+EXPORT_SYMBOL vmlinux 0x1b9981cc	set_irq_wake
+EXPORT_SYMBOL vmlinux 0x1bb47646	llc_add_pack
+EXPORT_SYMBOL vmlinux 0x1bc9aa95	tcp_create_openreq_child
+EXPORT_SYMBOL vmlinux 0x1bdcd868	i2c_register_driver
+EXPORT_SYMBOL vmlinux 0x1bde5a37	down
+EXPORT_SYMBOL vmlinux 0x1be1babf	add_wait_queue_exclusive
+EXPORT_SYMBOL vmlinux 0x1be31cc0	qdisc_tree_decrease_qlen
+EXPORT_SYMBOL vmlinux 0x1be6550f	vfs_stat
+EXPORT_SYMBOL vmlinux 0x1c1af916	set_normalized_timespec
+EXPORT_SYMBOL vmlinux 0x1c32adfe	dma_ops
+EXPORT_SYMBOL vmlinux 0x1c588a8c	del_timer_sync
+EXPORT_SYMBOL vmlinux 0x1c793da4	xfrm_unregister_type
+EXPORT_SYMBOL vmlinux 0x1c8a04b0	acpi_reset
+EXPORT_SYMBOL vmlinux 0x1c8a8391	sk_send_sigurg
+EXPORT_SYMBOL vmlinux 0x1c8ace45	fbcon_set_tileops
+EXPORT_SYMBOL vmlinux 0x1ca4748e	pci_scan_slot
+EXPORT_SYMBOL vmlinux 0x1caa31a3	request_firmware
+EXPORT_SYMBOL vmlinux 0x1cbabdf7	cpufreq_get_policy
+EXPORT_SYMBOL vmlinux 0x1cc6719a	register_reboot_notifier
+EXPORT_SYMBOL vmlinux 0x1cdf2d00	bio_integrity_alloc
+EXPORT_SYMBOL vmlinux 0x1d1b721b	set_page_dirty_lock
+EXPORT_SYMBOL vmlinux 0x1d2e87c6	do_gettimeofday
+EXPORT_SYMBOL vmlinux 0x1d5c968c	ia64_pal_call_stacked
+EXPORT_SYMBOL vmlinux 0x1d64c915	read_cache_page
+EXPORT_SYMBOL vmlinux 0x1d70a835	lro_vlan_hwaccel_receive_frags
+EXPORT_SYMBOL vmlinux 0x1d9a5464	invalidate_mapping_pages
+EXPORT_SYMBOL vmlinux 0x1dbc7191	dm_table_unplug_all
+EXPORT_SYMBOL vmlinux 0x1dbff285	xfrm4_rcv
+EXPORT_SYMBOL vmlinux 0x1dc36131	fb_destroy_modedb
+EXPORT_SYMBOL vmlinux 0x1dd571e6	fb_copy_cmap
+EXPORT_SYMBOL vmlinux 0x1de6c386	i2c_del_adapter
+EXPORT_SYMBOL vmlinux 0x1de92d67	matroxfb_DAC_out
+EXPORT_SYMBOL vmlinux 0x1e3e9535	pci_bus_type
+EXPORT_SYMBOL vmlinux 0x1e6c23de	blk_start_queue
+EXPORT_SYMBOL vmlinux 0x1e6d26a8	strstr
+EXPORT_SYMBOL vmlinux 0x1ec2e690	tcf_exts_validate
+EXPORT_SYMBOL vmlinux 0x1ec35c64	i2c_verify_client
+EXPORT_SYMBOL vmlinux 0x1ed99ef7	matroxfb_enable_irq
+EXPORT_SYMBOL vmlinux 0x1ee49abc	km_state_notify
+EXPORT_SYMBOL vmlinux 0x1ef6c3fe	write_one_page
+EXPORT_SYMBOL vmlinux 0x1efe283f	__cap_full_set
+EXPORT_SYMBOL vmlinux 0x1f009f79	blk_queue_bounce_limit
+EXPORT_SYMBOL vmlinux 0x1f15f497	tty_throttle
+EXPORT_SYMBOL vmlinux 0x1f3b42a8	eth_validate_addr
+EXPORT_SYMBOL vmlinux 0x1f3d7b23	neigh_for_each
+EXPORT_SYMBOL vmlinux 0x1f3eaf90	register_filesystem
+EXPORT_SYMBOL vmlinux 0x1f4662d6	tty_driver_kref_put
+EXPORT_SYMBOL vmlinux 0x1f61a6c6	neigh_table_init
+EXPORT_SYMBOL vmlinux 0x1fa4e1a0	try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0x1fb4ba26	revalidate_disk
+EXPORT_SYMBOL vmlinux 0x1fedf0f4	__request_region
+EXPORT_SYMBOL vmlinux 0x20000329	simple_strtoul
+EXPORT_SYMBOL vmlinux 0x2005e68a	acpi_remove_fixed_event_handler
+EXPORT_SYMBOL vmlinux 0x20229513	block_write_full_page_endio
+EXPORT_SYMBOL vmlinux 0x20301636	physical_node_map
+EXPORT_SYMBOL vmlinux 0x20385c58	genl_register_mc_group
+EXPORT_SYMBOL vmlinux 0x204857ac	proc_dostring
+EXPORT_SYMBOL vmlinux 0x206c48f6	mdiobus_alloc
+EXPORT_SYMBOL vmlinux 0x208739f6	acpi_load_table
+EXPORT_SYMBOL vmlinux 0x20dc6250	blk_alloc_queue_node
+EXPORT_SYMBOL vmlinux 0x20eadeb6	ip_compute_csum
+EXPORT_SYMBOL vmlinux 0x20ee01e7	swiotlb_map_sg_attrs
+EXPORT_SYMBOL vmlinux 0x20efbb65	cfb_copyarea
+EXPORT_SYMBOL vmlinux 0x21080ad2	sock_recvmsg
+EXPORT_SYMBOL vmlinux 0x211331fa	__divsi3
+EXPORT_SYMBOL vmlinux 0x211a26df	skb_tx_hash
+EXPORT_SYMBOL vmlinux 0x215ebd78	bitrev16
+EXPORT_SYMBOL vmlinux 0x216fbd61	jbd2_journal_clear_err
+EXPORT_SYMBOL vmlinux 0x21758da3	generic_shutdown_super
+EXPORT_SYMBOL vmlinux 0x21982f93	simple_transaction_get
+EXPORT_SYMBOL vmlinux 0x219f7134	mdiobus_free
+EXPORT_SYMBOL vmlinux 0x21b3192d	create_empty_buffers
+EXPORT_SYMBOL vmlinux 0x21ddd248	pci_scan_bridge
+EXPORT_SYMBOL vmlinux 0x21e0ea22	acpi_get_id
+EXPORT_SYMBOL vmlinux 0x21e5d3d8	bioset_create
+EXPORT_SYMBOL vmlinux 0x21f3d57b	netdev_class_create_file
+EXPORT_SYMBOL vmlinux 0x22064444	nlmsg_notify
+EXPORT_SYMBOL vmlinux 0x22238f75	hippi_change_mtu
+EXPORT_SYMBOL vmlinux 0x222e7ce2	sysfs_streq
+EXPORT_SYMBOL vmlinux 0x2250e352	tty_register_ldisc
+EXPORT_SYMBOL vmlinux 0x2252fffb	mb_cache_entry_find_first
+EXPORT_SYMBOL vmlinux 0x226e86a9	audit_log
+EXPORT_SYMBOL vmlinux 0x227a2b05	redraw_screen
+EXPORT_SYMBOL vmlinux 0x2288378f	system_state
+EXPORT_SYMBOL vmlinux 0x228a6ef6	skb_clone
+EXPORT_SYMBOL vmlinux 0x228c535f	pcibios_bus_to_resource
+EXPORT_SYMBOL vmlinux 0x2296df6b	netdev_features_change
+EXPORT_SYMBOL vmlinux 0x22a73912	__tcp_put_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x22b325d5	kd_mksound
+EXPORT_SYMBOL vmlinux 0x22b6533b	xfrm_sad_getinfo
+EXPORT_SYMBOL vmlinux 0x22fe1359	mutex_lock_killable
+EXPORT_SYMBOL vmlinux 0x23269a13	strict_strtoul
+EXPORT_SYMBOL vmlinux 0x234509f3	strncat
+EXPORT_SYMBOL vmlinux 0x23759ebc	seq_puts
+EXPORT_SYMBOL vmlinux 0x23998f33	kmalloc_caches
+EXPORT_SYMBOL vmlinux 0x239a1bb3	__inc_zone_page_state
+EXPORT_SYMBOL vmlinux 0x23caec7d	i2c_smbus_write_byte_data
+EXPORT_SYMBOL vmlinux 0x23eb8bbd	sn_bus_store_sysdata
+EXPORT_SYMBOL vmlinux 0x23fd3028	vmalloc_node
+EXPORT_SYMBOL vmlinux 0x24232050	inode_sub_bytes
+EXPORT_SYMBOL vmlinux 0x242d6041	add_wait_queue
+EXPORT_SYMBOL vmlinux 0x244f1f70	pci_enable_msi_block
+EXPORT_SYMBOL vmlinux 0x245178c7	sock_create_kern
+EXPORT_SYMBOL vmlinux 0x2459bbcc	console_set_on_cmdline
+EXPORT_SYMBOL vmlinux 0x24686293	proc_doulongvec_minmax
+EXPORT_SYMBOL vmlinux 0x24724830	sn_dma_flush
+EXPORT_SYMBOL vmlinux 0x2482481b	block_read_full_page
+EXPORT_SYMBOL vmlinux 0x24869b45	vfs_set_dqblk
+EXPORT_SYMBOL vmlinux 0x249e2261	xfrm_state_alloc
+EXPORT_SYMBOL vmlinux 0x24e03f73	qdisc_reset
+EXPORT_SYMBOL vmlinux 0x24f262b7	elv_dispatch_sort
+EXPORT_SYMBOL vmlinux 0x24fdac79	wake_bit_function
+EXPORT_SYMBOL vmlinux 0x25293d57	jbd2_journal_force_commit_nested
+EXPORT_SYMBOL vmlinux 0x253e9c17	generic_file_mmap
+EXPORT_SYMBOL vmlinux 0x25820c64	fs_overflowuid
+EXPORT_SYMBOL vmlinux 0x258355b4	fb_find_best_mode
+EXPORT_SYMBOL vmlinux 0x258990b1	audit_log_end
+EXPORT_SYMBOL vmlinux 0x25b4eb5e	_read_lock_irq
+EXPORT_SYMBOL vmlinux 0x25cf8049	matroxfb_PLL_calcclock
+EXPORT_SYMBOL vmlinux 0x25fe43a1	ethtool_op_get_sg
+EXPORT_SYMBOL vmlinux 0x260e13fd	dev_mc_sync
+EXPORT_SYMBOL vmlinux 0x262bd011	__mark_inode_dirty
+EXPORT_SYMBOL vmlinux 0x262ee82d	matrox_cfbX_init
+EXPORT_SYMBOL vmlinux 0x265f08e4	skb_copy_and_csum_dev
+EXPORT_SYMBOL vmlinux 0x26719449	tcp_v4_conn_request
+EXPORT_SYMBOL vmlinux 0x267f8060	tcp_md5_hash_skb_data
+EXPORT_SYMBOL vmlinux 0x267fc65b	__tasklet_hi_schedule
+EXPORT_SYMBOL vmlinux 0x2685c3d7	__sg_alloc_table
+EXPORT_SYMBOL vmlinux 0x26b5774a	blk_queue_io_opt
+EXPORT_SYMBOL vmlinux 0x26cc8572	tcp_tso_segment
+EXPORT_SYMBOL vmlinux 0x26e38449	seq_lseek
+EXPORT_SYMBOL vmlinux 0x26e76fb8	sysctl_udp_wmem_min
+EXPORT_SYMBOL vmlinux 0x26eaeae0	page_put_link
+EXPORT_SYMBOL vmlinux 0x271cba95	acpi_bus_private_data_handler
+EXPORT_SYMBOL vmlinux 0x27637dc9	soft_cursor
+EXPORT_SYMBOL vmlinux 0x277557ee	vfs_writev
+EXPORT_SYMBOL vmlinux 0x277673d8	smp_call_function_many
+EXPORT_SYMBOL vmlinux 0x27864d57	memparse
+EXPORT_SYMBOL vmlinux 0x27a7e855	tcp_connect
+EXPORT_SYMBOL vmlinux 0x27bbf221	disable_irq_nosync
+EXPORT_SYMBOL vmlinux 0x27c33efe	csum_ipv6_magic
+EXPORT_SYMBOL vmlinux 0x27c61ece	qdisc_put_stab
+EXPORT_SYMBOL vmlinux 0x27dabe07	tty_port_block_til_ready
+EXPORT_SYMBOL vmlinux 0x27e3bd86	lock_fb_info
+EXPORT_SYMBOL vmlinux 0x28010f92	ida_pre_get
+EXPORT_SYMBOL vmlinux 0x282b5899	_read_trylock
+EXPORT_SYMBOL vmlinux 0x2846b417	key_validate
+EXPORT_SYMBOL vmlinux 0x285135e6	acpi_evaluate_integer
+EXPORT_SYMBOL vmlinux 0x285ac517	strict_strtoll
+EXPORT_SYMBOL vmlinux 0x285bd183	setup_arg_pages
+EXPORT_SYMBOL vmlinux 0x2865cead	arch_acpi_processor_init_pdc
+EXPORT_SYMBOL vmlinux 0x287637ed	bio_clone
+EXPORT_SYMBOL vmlinux 0x2876a6d3	memcpy_toiovec
+EXPORT_SYMBOL vmlinux 0x288eb45c	d_lookup
+EXPORT_SYMBOL vmlinux 0x28932537	sn_coherency_id
+EXPORT_SYMBOL vmlinux 0x28934a19	bdi_set_max_ratio
+EXPORT_SYMBOL vmlinux 0x289aa9f8	phy_ethtool_gset
+EXPORT_SYMBOL vmlinux 0x28a80a88	request_key_async
+EXPORT_SYMBOL vmlinux 0x28ac678d	bio_integrity_set_tag
+EXPORT_SYMBOL vmlinux 0x28bd833e	__find_get_block
+EXPORT_SYMBOL vmlinux 0x28f20744	commit_creds
+EXPORT_SYMBOL vmlinux 0x29537c9e	alloc_chrdev_region
+EXPORT_SYMBOL vmlinux 0x297c7029	sn_partition_serial_number
+EXPORT_SYMBOL vmlinux 0x297c8eec	noop_qdisc
+EXPORT_SYMBOL vmlinux 0x2990adcb	mark_buffer_dirty
+EXPORT_SYMBOL vmlinux 0x29a6ba4b	dm_kcopyd_client_create
+EXPORT_SYMBOL vmlinux 0x29bd4c46	__cap_init_eff_set
+EXPORT_SYMBOL vmlinux 0x29e084e3	get_phy_id
+EXPORT_SYMBOL vmlinux 0x29fdee68	inet_frags_fini
+EXPORT_SYMBOL vmlinux 0x2a0534d3	try_to_del_timer_sync
+EXPORT_SYMBOL vmlinux 0x2a07ec51	dst_release
+EXPORT_SYMBOL vmlinux 0x2a303d4d	check_signature
+EXPORT_SYMBOL vmlinux 0x2a3231ab	netdev_bonding_change
+EXPORT_SYMBOL vmlinux 0x2a3b2a16	__init_waitqueue_head
+EXPORT_SYMBOL vmlinux 0x2a3f0879	i2c_smbus_write_byte
+EXPORT_SYMBOL vmlinux 0x2a48a09a	nf_unregister_hooks
+EXPORT_SYMBOL vmlinux 0x2a5465cf	vmalloc_end
+EXPORT_SYMBOL vmlinux 0x2a660221	qdisc_create_dflt
+EXPORT_SYMBOL vmlinux 0x2a692ed1	dev_open
+EXPORT_SYMBOL vmlinux 0x2a6bb2c8	mempool_free
+EXPORT_SYMBOL vmlinux 0x2a8f69b4	blk_queue_invalidate_tags
+EXPORT_SYMBOL vmlinux 0x2a921e32	sock_no_sendmsg
+EXPORT_SYMBOL vmlinux 0x2b1f885f	matroxfb_g450_setclk
+EXPORT_SYMBOL vmlinux 0x2b536a4e	follow_up
+EXPORT_SYMBOL vmlinux 0x2b606088	ia64_pal_call_phys_static
+EXPORT_SYMBOL vmlinux 0x2b609663	dcache_readdir
+EXPORT_SYMBOL vmlinux 0x2b882c4a	blk_integrity_register
+EXPORT_SYMBOL vmlinux 0x2ba707a8	sysctl_tcp_low_latency
+EXPORT_SYMBOL vmlinux 0x2ba97510	d_find_alias
+EXPORT_SYMBOL vmlinux 0x2baa4cb6	module_refcount
+EXPORT_SYMBOL vmlinux 0x2bb3ac3f	dev_get_by_index
+EXPORT_SYMBOL vmlinux 0x2bb55d6e	acpi_remove_notify_handler
+EXPORT_SYMBOL vmlinux 0x2bc04f02	acpi_root_dir
+EXPORT_SYMBOL vmlinux 0x2be51954	lease_get_mtime
+EXPORT_SYMBOL vmlinux 0x2bfeb410	acpi_get_handle
+EXPORT_SYMBOL vmlinux 0x2c165548	ida_get_new_above
+EXPORT_SYMBOL vmlinux 0x2c19b269	writeback_inodes_sb_if_idle
+EXPORT_SYMBOL vmlinux 0x2c27ed39	blk_requeue_request
+EXPORT_SYMBOL vmlinux 0x2c385669	sock_get_timestampns
+EXPORT_SYMBOL vmlinux 0x2c489655	jbd2_journal_init_dev
+EXPORT_SYMBOL vmlinux 0x2c563059	udp_disconnect
+EXPORT_SYMBOL vmlinux 0x2c5749e6	acpi_clear_gpe
+EXPORT_SYMBOL vmlinux 0x2c61b737	kernel_listen
+EXPORT_SYMBOL vmlinux 0x2c873db3	fb_find_mode
+EXPORT_SYMBOL vmlinux 0x2c8d8a69	cpu_active_mask
+EXPORT_SYMBOL vmlinux 0x2c9367fb	mempool_create
+EXPORT_SYMBOL vmlinux 0x2ca64cbb	posix_test_lock
+EXPORT_SYMBOL vmlinux 0x2cd32e87	per_cpu__cpu_sibling_map
+EXPORT_SYMBOL vmlinux 0x2ce1e27f	__sn_mmiowb
+EXPORT_SYMBOL vmlinux 0x2d1058a7	tc_classify
+EXPORT_SYMBOL vmlinux 0x2d134d8a	posix_acl_permission
+EXPORT_SYMBOL vmlinux 0x2d291fb8	down_killable
+EXPORT_SYMBOL vmlinux 0x2d5114bd	do_sync_read
+EXPORT_SYMBOL vmlinux 0x2d5528c9	sg_copy_to_buffer
+EXPORT_SYMBOL vmlinux 0x2d74471c	ipv6_skip_exthdr
+EXPORT_SYMBOL vmlinux 0x2daba339	n_tty_ioctl_helper
+EXPORT_SYMBOL vmlinux 0x2dd16564	arch_register_cpu
+EXPORT_SYMBOL vmlinux 0x2dd6b6aa	idr_pre_get
+EXPORT_SYMBOL vmlinux 0x2dedc4c2	acpi_format_exception
+EXPORT_SYMBOL vmlinux 0x2e2ce9e0	sysctl_tcp_syncookies
+EXPORT_SYMBOL vmlinux 0x2e30da00	create_mnt_ns
+EXPORT_SYMBOL vmlinux 0x2e3e2b04	neigh_parms_release
+EXPORT_SYMBOL vmlinux 0x2e41f271	rtnl_create_link
+EXPORT_SYMBOL vmlinux 0x2e475449	deny_write_access
+EXPORT_SYMBOL vmlinux 0x2e4a39f8	sysctl_udp_mem
+EXPORT_SYMBOL vmlinux 0x2e6763a6	idr_find
+EXPORT_SYMBOL vmlinux 0x2e939357	vc_resize
+EXPORT_SYMBOL vmlinux 0x2ebb3f10	vfs_quota_sync
+EXPORT_SYMBOL vmlinux 0x2ec487e5	otg_set_transceiver
+EXPORT_SYMBOL vmlinux 0x2ed432d7	swiotlb_free_coherent
+EXPORT_SYMBOL vmlinux 0x2f0348b6	pci_request_region
+EXPORT_SYMBOL vmlinux 0x2f0b40ae	printk
+EXPORT_SYMBOL vmlinux 0x2f111fe5	fifo_set_limit
+EXPORT_SYMBOL vmlinux 0x2f2e357c	i2c_release_client
+EXPORT_SYMBOL vmlinux 0x2f367d8c	xor_ia64_3
+EXPORT_SYMBOL vmlinux 0x2f397e24	__insert_inode_hash
+EXPORT_SYMBOL vmlinux 0x2f7ea3b9	textsearch_destroy
+EXPORT_SYMBOL vmlinux 0x2f7f766e	vprintk
+EXPORT_SYMBOL vmlinux 0x2f98a933	i2c_add_adapter
+EXPORT_SYMBOL vmlinux 0x2fbfeb6a	acpi_bus_unregister_driver
+EXPORT_SYMBOL vmlinux 0x2fc2df76	__destroy_inode
+EXPORT_SYMBOL vmlinux 0x2ff063b5	acpi_get_name
+EXPORT_SYMBOL vmlinux 0x3007a99b	pci_scan_bus_parented
+EXPORT_SYMBOL vmlinux 0x301271da	udplite_table
+EXPORT_SYMBOL vmlinux 0x3016765c	module_layout
+EXPORT_SYMBOL vmlinux 0x3038b987	vmap
+EXPORT_SYMBOL vmlinux 0x3074fa9d	udp_poll
+EXPORT_SYMBOL vmlinux 0x307f7776	timecompare_offset
+EXPORT_SYMBOL vmlinux 0x30802ce6	pcie_set_readrq
+EXPORT_SYMBOL vmlinux 0x308bb679	dst_discard
+EXPORT_SYMBOL vmlinux 0x309ccf4d	seq_read
+EXPORT_SYMBOL vmlinux 0x309f3d34	pci_release_selected_regions
+EXPORT_SYMBOL vmlinux 0x30ae745c	hippi_type_trans
+EXPORT_SYMBOL vmlinux 0x30b01c02	kern_path
+EXPORT_SYMBOL vmlinux 0x30b772c9	dquot_mark_dquot_dirty
+EXPORT_SYMBOL vmlinux 0x30d9d1a3	sock_no_bind
+EXPORT_SYMBOL vmlinux 0x30e74134	tty_termios_copy_hw
+EXPORT_SYMBOL vmlinux 0x30fa4b8e	d_add_ci
+EXPORT_SYMBOL vmlinux 0x30ffe1f7	cancel_delayed_work_sync
+EXPORT_SYMBOL vmlinux 0x310032eb	genphy_update_link
+EXPORT_SYMBOL vmlinux 0x310d828a	set_anon_super
+EXPORT_SYMBOL vmlinux 0x31121fe1	genl_unregister_mc_group
+EXPORT_SYMBOL vmlinux 0x3145216f	pci_dev_present
+EXPORT_SYMBOL vmlinux 0x3147857d	default_red
+EXPORT_SYMBOL vmlinux 0x315bb5d1	pcim_pin_device
+EXPORT_SYMBOL vmlinux 0x3173b28a	mutex_lock
+EXPORT_SYMBOL vmlinux 0x317f0155	nobh_write_begin
+EXPORT_SYMBOL vmlinux 0x319699c9	address_space_init_once
+EXPORT_SYMBOL vmlinux 0x31a64f11	arp_xmit
+EXPORT_SYMBOL vmlinux 0x31b1129e	filp_open
+EXPORT_SYMBOL vmlinux 0x31b31f5c	csum_partial_copy_nocheck
+EXPORT_SYMBOL vmlinux 0x31ebadcd	in_group_p
+EXPORT_SYMBOL vmlinux 0x32047ad5	__per_cpu_offset
+EXPORT_SYMBOL vmlinux 0x32093cc7	__udivdi3
+EXPORT_SYMBOL vmlinux 0x32247429	__xfrm_decode_session
+EXPORT_SYMBOL vmlinux 0x3266877f	unbind_con_driver
+EXPORT_SYMBOL vmlinux 0x327e3abf	tcp_splice_read
+EXPORT_SYMBOL vmlinux 0x3285cc48	param_set_uint
+EXPORT_SYMBOL vmlinux 0x32d8ee92	page_readlink
+EXPORT_SYMBOL vmlinux 0x32f60b87	__napi_complete
+EXPORT_SYMBOL vmlinux 0x32fba0d1	insert_inode_locked4
+EXPORT_SYMBOL vmlinux 0x330be9df	sync_inode
+EXPORT_SYMBOL vmlinux 0x331f4654	swiotlb_sync_single_for_device
+EXPORT_SYMBOL vmlinux 0x33541342	__breadahead
+EXPORT_SYMBOL vmlinux 0x338215f0	proto_unregister
+EXPORT_SYMBOL vmlinux 0x338a5c91	scm_detach_fds
+EXPORT_SYMBOL vmlinux 0x33950d0c	dev_kfree_skb_any
+EXPORT_SYMBOL vmlinux 0x33b76caf	napi_frags_finish
+EXPORT_SYMBOL vmlinux 0x33b84f74	copy_page
+EXPORT_SYMBOL vmlinux 0x33f97dc5	netif_receive_skb
+EXPORT_SYMBOL vmlinux 0x341ddd06	pcim_iomap_table
+EXPORT_SYMBOL vmlinux 0x343b4c54	lookup_one_len
+EXPORT_SYMBOL vmlinux 0x343da08c	__wake_up_bit
+EXPORT_SYMBOL vmlinux 0x3457cb68	param_set_long
+EXPORT_SYMBOL vmlinux 0x34668785	pnp_device_attach
+EXPORT_SYMBOL vmlinux 0x3470b9e2	down_write_trylock
+EXPORT_SYMBOL vmlinux 0x348256fe	__pskb_pull_tail
+EXPORT_SYMBOL vmlinux 0x3489c9f1	unw_access_br
+EXPORT_SYMBOL vmlinux 0x349cba85	strchr
+EXPORT_SYMBOL vmlinux 0x34a350d1	qdisc_class_hash_grow
+EXPORT_SYMBOL vmlinux 0x34b645b5	phy_device_free
+EXPORT_SYMBOL vmlinux 0x34d38dad	fb_validate_mode
+EXPORT_SYMBOL vmlinux 0x34ea780a	tty_shutdown
+EXPORT_SYMBOL vmlinux 0x3556ca38	input_unfilter_device
+EXPORT_SYMBOL vmlinux 0x35962a73	qdisc_watchdog_cancel
+EXPORT_SYMBOL vmlinux 0x35a9027f	blkdev_put
+EXPORT_SYMBOL vmlinux 0x35b0650f	vsnprintf
+EXPORT_SYMBOL vmlinux 0x35b83682	tty_port_lower_dtr_rts
+EXPORT_SYMBOL vmlinux 0x35c2ba9e	refrigerator
+EXPORT_SYMBOL vmlinux 0x35d85e2c	i2c_clients_command
+EXPORT_SYMBOL vmlinux 0x35f17102	keyring_search
+EXPORT_SYMBOL vmlinux 0x35f339e2	acpi_bus_start
+EXPORT_SYMBOL vmlinux 0x360652ea	pci_clear_master
+EXPORT_SYMBOL vmlinux 0x360b1afe	probe_irq_mask
+EXPORT_SYMBOL vmlinux 0x360f0a56	xfrm_prepare_input
+EXPORT_SYMBOL vmlinux 0x36139a51	memcpy_fromiovec
+EXPORT_SYMBOL vmlinux 0x3618aaec	dev_alloc_skb
+EXPORT_SYMBOL vmlinux 0x3656bf5a	lock_kernel
+EXPORT_SYMBOL vmlinux 0x36596e97	jbd2_journal_invalidatepage
+EXPORT_SYMBOL vmlinux 0x36646158	fb_pan_display
+EXPORT_SYMBOL vmlinux 0x3668777d	vfs_quota_off
+EXPORT_SYMBOL vmlinux 0x3675a81d	create_proc_entry
+EXPORT_SYMBOL vmlinux 0x36875389	__timecompare_update
+EXPORT_SYMBOL vmlinux 0x36a84a06	framebuffer_alloc
+EXPORT_SYMBOL vmlinux 0x36b7063f	file_permission
+EXPORT_SYMBOL vmlinux 0x3717dbf9	ia64_pfn_valid
+EXPORT_SYMBOL vmlinux 0x3733c019	skb_dequeue
+EXPORT_SYMBOL vmlinux 0x373d90f3	dmam_free_noncoherent
+EXPORT_SYMBOL vmlinux 0x37407344	key_payload_reserve
+EXPORT_SYMBOL vmlinux 0x3744cf36	vmalloc_to_pfn
+EXPORT_SYMBOL vmlinux 0x374f4761	bio_map_kern
+EXPORT_SYMBOL vmlinux 0x375465a7	radix_tree_gang_lookup_tag_slot
+EXPORT_SYMBOL vmlinux 0x375633d1	tty_port_free_xmit_buf
+EXPORT_SYMBOL vmlinux 0x3760332b	dmam_alloc_noncoherent
+EXPORT_SYMBOL vmlinux 0x3762cb6e	ioremap_nocache
+EXPORT_SYMBOL vmlinux 0x3770c9c1	skb_copy_and_csum_datagram_iovec
+EXPORT_SYMBOL vmlinux 0x37ae8b99	fb_get_mode
+EXPORT_SYMBOL vmlinux 0x37befc70	jiffies_to_msecs
+EXPORT_SYMBOL vmlinux 0x37cb2bb1	napi_gro_frags
+EXPORT_SYMBOL vmlinux 0x37db8f19	dmi_get_date
+EXPORT_SYMBOL vmlinux 0x3811c39d	tty_port_carrier_raised
+EXPORT_SYMBOL vmlinux 0x38145e90	block_write_end
+EXPORT_SYMBOL vmlinux 0x386dc3cc	ia64_sal_oemcall_nolock
+EXPORT_SYMBOL vmlinux 0x3886170e	blk_queue_update_dma_pad
+EXPORT_SYMBOL vmlinux 0x388d0797	unregister_key_type
+EXPORT_SYMBOL vmlinux 0x388f9128	xfrm_state_walk_done
+EXPORT_SYMBOL vmlinux 0x38b92846	llc_remove_pack
+EXPORT_SYMBOL vmlinux 0x38c83be7	pci_back_from_sleep
+EXPORT_SYMBOL vmlinux 0x38c90e53	sock_get_timestamp
+EXPORT_SYMBOL vmlinux 0x38cde479	nf_register_hook
+EXPORT_SYMBOL vmlinux 0x3904810a	unregister_sysctl_table
+EXPORT_SYMBOL vmlinux 0x390c858a	pci_fixup_device
+EXPORT_SYMBOL vmlinux 0x392480cb	fb_class
+EXPORT_SYMBOL vmlinux 0x393d35fc	sn_acpi_slot_fixup
+EXPORT_SYMBOL vmlinux 0x39493f64	___pskb_trim
+EXPORT_SYMBOL vmlinux 0x396d14b0	tcp_child_process
+EXPORT_SYMBOL vmlinux 0x3970a5f8	blk_queue_end_tag
+EXPORT_SYMBOL vmlinux 0x397eb254	tcf_hash_create
+EXPORT_SYMBOL vmlinux 0x3980aac1	unregister_reboot_notifier
+EXPORT_SYMBOL vmlinux 0x3990f874	cdev_init
+EXPORT_SYMBOL vmlinux 0x39966222	dquot_commit
+EXPORT_SYMBOL vmlinux 0x39a876e3	journal_forget
+EXPORT_SYMBOL vmlinux 0x39c32889	eth_change_mtu
+EXPORT_SYMBOL vmlinux 0x39d309db	unregister_console
+EXPORT_SYMBOL vmlinux 0x39e5fed4	inetdev_by_index
+EXPORT_SYMBOL vmlinux 0x3a1c9cdc	kernel_bind
+EXPORT_SYMBOL vmlinux 0x3a2204c6	security_netlink_recv
+EXPORT_SYMBOL vmlinux 0x3a7aea25	tcp_sendpage
+EXPORT_SYMBOL vmlinux 0x3a9b6fb9	blk_unregister_region
+EXPORT_SYMBOL vmlinux 0x3adb10e6	cpu_all_bits
+EXPORT_SYMBOL vmlinux 0x3ae831b6	kref_init
+EXPORT_SYMBOL vmlinux 0x3aea3f34	notify_change
+EXPORT_SYMBOL vmlinux 0x3aed7527	isa_irq_to_vector_map
+EXPORT_SYMBOL vmlinux 0x3b11b87a	inet_stream_connect
+EXPORT_SYMBOL vmlinux 0x3b3016d3	cpufreq_unregister_notifier
+EXPORT_SYMBOL vmlinux 0x3b448d42	register_con_driver
+EXPORT_SYMBOL vmlinux 0x3b587299	do_splice_from
+EXPORT_SYMBOL vmlinux 0x3b78cd1a	rwsem_down_read_failed
+EXPORT_SYMBOL vmlinux 0x3bbf23a8	__xfrm_state_destroy
+EXPORT_SYMBOL vmlinux 0x3bc9fbca	textsearch_prepare
+EXPORT_SYMBOL vmlinux 0x3bd1b1f6	msecs_to_jiffies
+EXPORT_SYMBOL vmlinux 0x3bf33ec4	skb_copy
+EXPORT_SYMBOL vmlinux 0x3c0d7df7	vfs_rename
+EXPORT_SYMBOL vmlinux 0x3c2c5af5	sprintf
+EXPORT_SYMBOL vmlinux 0x3c3fe719	vmem_map
+EXPORT_SYMBOL vmlinux 0x3c5acd45	km_policy_notify
+EXPORT_SYMBOL vmlinux 0x3c6c892b	kmem_cache_name
+EXPORT_SYMBOL vmlinux 0x3c9d1211	string_get_size
+EXPORT_SYMBOL vmlinux 0x3ca07b73	remap_vmalloc_range
+EXPORT_SYMBOL vmlinux 0x3cafda29	blk_rq_count_integrity_sg
+EXPORT_SYMBOL vmlinux 0x3cb30b64	sock_wmalloc
+EXPORT_SYMBOL vmlinux 0x3cb8912e	genl_register_ops
+EXPORT_SYMBOL vmlinux 0x3cc0a3bb	xfrm_spd_getinfo
+EXPORT_SYMBOL vmlinux 0x3cc899f2	tty_vhangup
+EXPORT_SYMBOL vmlinux 0x3cdde3b7	ia64_ivt
+EXPORT_SYMBOL vmlinux 0x3ce4ca6f	disable_irq
+EXPORT_SYMBOL vmlinux 0x3ce4f2c9	journal_start
+EXPORT_SYMBOL vmlinux 0x3cef7329	blk_queue_prep_rq
+EXPORT_SYMBOL vmlinux 0x3cf53151	journal_get_undo_access
+EXPORT_SYMBOL vmlinux 0x3cf78c75	do_truncate
+EXPORT_SYMBOL vmlinux 0x3d067311	netdev_class_remove_file
+EXPORT_SYMBOL vmlinux 0x3d07acff	default_llseek
+EXPORT_SYMBOL vmlinux 0x3d18763c	_read_lock_irqsave
+EXPORT_SYMBOL vmlinux 0x3d45cc02	scsi_cmd_ioctl
+EXPORT_SYMBOL vmlinux 0x3d501983	dm_get_mapinfo
+EXPORT_SYMBOL vmlinux 0x3d58a9bd	mb_cache_entry_release
+EXPORT_SYMBOL vmlinux 0x3d68bd4b	flow_cache_genid
+EXPORT_SYMBOL vmlinux 0x3d8728bb	memcpy_toiovecend
+EXPORT_SYMBOL vmlinux 0x3d9a97fe	__page_symlink
+EXPORT_SYMBOL vmlinux 0x3d9ee9f0	clear_page
+EXPORT_SYMBOL vmlinux 0x3db2e258	radix_tree_gang_lookup
+EXPORT_SYMBOL vmlinux 0x3dbf2ab0	skb_queue_purge
+EXPORT_SYMBOL vmlinux 0x3df0346d	skb_find_text
+EXPORT_SYMBOL vmlinux 0x3e084631	blk_rq_map_kern
+EXPORT_SYMBOL vmlinux 0x3e2ae3a8	acpi_release_global_lock
+EXPORT_SYMBOL vmlinux 0x3e3518d4	d_genocide
+EXPORT_SYMBOL vmlinux 0x3e383385	nf_hooks
+EXPORT_SYMBOL vmlinux 0x3e45e9ff	register_inetaddr_notifier
+EXPORT_SYMBOL vmlinux 0x3e4fb545	pagecache_write_end
+EXPORT_SYMBOL vmlinux 0x3e6677ba	load_nls
+EXPORT_SYMBOL vmlinux 0x3e6c7a14	__ip_select_ident
+EXPORT_SYMBOL vmlinux 0x3e899c9d	blk_limits_io_min
+EXPORT_SYMBOL vmlinux 0x3ec4d0d6	journal_lock_updates
+EXPORT_SYMBOL vmlinux 0x3ed63055	zlib_inflateReset
+EXPORT_SYMBOL vmlinux 0x3f0546a8	ioread32_rep
+EXPORT_SYMBOL vmlinux 0x3f168ef0	tcf_hash_search
+EXPORT_SYMBOL vmlinux 0x3f292c07	read_cache_page_async
+EXPORT_SYMBOL vmlinux 0x3f2e0a96	dev_unicast_sync
+EXPORT_SYMBOL vmlinux 0x3f2fba2b	vfs_follow_link
+EXPORT_SYMBOL vmlinux 0x3f4547a7	put_unused_fd
+EXPORT_SYMBOL vmlinux 0x3f5c8646	iommu_dma_supported
+EXPORT_SYMBOL vmlinux 0x3f6bc633	__do_clear_user
+EXPORT_SYMBOL vmlinux 0x3f90f0b6	tcp_md5_hash_header
+EXPORT_SYMBOL vmlinux 0x3f9edc37	splice_direct_to_actor
+EXPORT_SYMBOL vmlinux 0x3fa03a97	memset
+EXPORT_SYMBOL vmlinux 0x3fa913da	strspn
+EXPORT_SYMBOL vmlinux 0x3fbe3378	idr_get_new_above
+EXPORT_SYMBOL vmlinux 0x3fec048f	sg_next
+EXPORT_SYMBOL vmlinux 0x3ff62317	local_bh_disable
+EXPORT_SYMBOL vmlinux 0x4057a322	netif_device_attach
+EXPORT_SYMBOL vmlinux 0x4058fa9d	pci_pme_capable
+EXPORT_SYMBOL vmlinux 0x405c1144	get_seconds
+EXPORT_SYMBOL vmlinux 0x405e8c65	dcache_dir_close
+EXPORT_SYMBOL vmlinux 0x40693125	llc_build_and_send_ui_pkt
+EXPORT_SYMBOL vmlinux 0x408d2d21	sk_release_kernel
+EXPORT_SYMBOL vmlinux 0x4097fa45	acpi_read_bit_register
+EXPORT_SYMBOL vmlinux 0x409873e3	tty_termios_baud_rate
+EXPORT_SYMBOL vmlinux 0x40c89d46	acpi_get_table_by_index
+EXPORT_SYMBOL vmlinux 0x40e61e9a	inet_frags_init
+EXPORT_SYMBOL vmlinux 0x40fc6fb5	swiotlb_unmap_sg_attrs
+EXPORT_SYMBOL vmlinux 0x4101bbde	param_set_copystring
+EXPORT_SYMBOL vmlinux 0x4108e69a	fb_match_mode
+EXPORT_SYMBOL vmlinux 0x41166725	inet_frags_init_net
+EXPORT_SYMBOL vmlinux 0x41344088	param_get_charp
+EXPORT_SYMBOL vmlinux 0x414531b8	__splice_from_pipe
+EXPORT_SYMBOL vmlinux 0x41482d8b	strndup_user
+EXPORT_SYMBOL vmlinux 0x416983d9	netdev_fix_features
+EXPORT_SYMBOL vmlinux 0x4169a660	eth_header_cache_update
+EXPORT_SYMBOL vmlinux 0x4185cb89	security_inode_readlink
+EXPORT_SYMBOL vmlinux 0x4188d439	neigh_rand_reach_time
+EXPORT_SYMBOL vmlinux 0x418ab7ef	xfrm_find_acq_byseq
+EXPORT_SYMBOL vmlinux 0x41c26eb7	is_container_init
+EXPORT_SYMBOL vmlinux 0x41d512f8	vfs_fstat
+EXPORT_SYMBOL vmlinux 0x41e6577d	set_page_dirty
+EXPORT_SYMBOL vmlinux 0x4211c3c1	zlib_inflateInit2
+EXPORT_SYMBOL vmlinux 0x42224298	sscanf
+EXPORT_SYMBOL vmlinux 0x4226ce73	bh_submit_read
+EXPORT_SYMBOL vmlinux 0x424ec515	phy_attach_direct
+EXPORT_SYMBOL vmlinux 0x427e829a	locks_mandatory_area
+EXPORT_SYMBOL vmlinux 0x428527ca	tcf_generic_walker
+EXPORT_SYMBOL vmlinux 0x4289d147	dev_get_drvdata
+EXPORT_SYMBOL vmlinux 0x428c8d73	llc_sap_list_lock
+EXPORT_SYMBOL vmlinux 0x42a37148	unlock_super
+EXPORT_SYMBOL vmlinux 0x42a4bdf2	in_egroup_p
+EXPORT_SYMBOL vmlinux 0x42acbf72	posix_acl_from_xattr
+EXPORT_SYMBOL vmlinux 0x42c6641d	get_user_pages
+EXPORT_SYMBOL vmlinux 0x42f4850b	pcie_get_readrq
+EXPORT_SYMBOL vmlinux 0x4302d0eb	free_pages
+EXPORT_SYMBOL vmlinux 0x4333eadb	param_set_short
+EXPORT_SYMBOL vmlinux 0x43385ad9	acpi_pci_unregister_driver
+EXPORT_SYMBOL vmlinux 0x434a8424	acpi_bus_get_device
+EXPORT_SYMBOL vmlinux 0x434fa55c	release_console_sem
+EXPORT_SYMBOL vmlinux 0x436bad05	xfrm_state_insert
+EXPORT_SYMBOL vmlinux 0x436c2179	iowrite32
+EXPORT_SYMBOL vmlinux 0x43748997	jbd2_journal_update_format
+EXPORT_SYMBOL vmlinux 0x439090b9	kernel_thread
+EXPORT_SYMBOL vmlinux 0x43a4938f	vm_get_page_prot
+EXPORT_SYMBOL vmlinux 0x43ab66c3	param_array_get
+EXPORT_SYMBOL vmlinux 0x43c2a511	__dev_getfirstbyhwtype
+EXPORT_SYMBOL vmlinux 0x43c2eab5	vfs_lstat
+EXPORT_SYMBOL vmlinux 0x43e56148	pnp_register_driver
+EXPORT_SYMBOL vmlinux 0x43ec913a	put_cmsg
+EXPORT_SYMBOL vmlinux 0x44031b18	elv_dispatch_add_tail
+EXPORT_SYMBOL vmlinux 0x4415635d	dquot_reserve_space
+EXPORT_SYMBOL vmlinux 0x44161c19	unregister_shrinker
+EXPORT_SYMBOL vmlinux 0x443b1a07	d_prune_aliases
+EXPORT_SYMBOL vmlinux 0x443e1513	bio_unmap_user
+EXPORT_SYMBOL vmlinux 0x44416c20	__xfrm_lookup
+EXPORT_SYMBOL vmlinux 0x444779c4	nla_find
+EXPORT_SYMBOL vmlinux 0x446a8c57	cpu_to_node_map
+EXPORT_SYMBOL vmlinux 0x4479760c	swiotlb_map_sg
+EXPORT_SYMBOL vmlinux 0x448ccf70	bdput
+EXPORT_SYMBOL vmlinux 0x44b911c3	rb_replace_node
+EXPORT_SYMBOL vmlinux 0x44cac182	dev_remove_pack
+EXPORT_SYMBOL vmlinux 0x44cb63e3	user_path_at
+EXPORT_SYMBOL vmlinux 0x44e5fe5b	__brelse
+EXPORT_SYMBOL vmlinux 0x44e9a829	match_token
+EXPORT_SYMBOL vmlinux 0x451df143	unlock_rename
+EXPORT_SYMBOL vmlinux 0x45313e73	fput
+EXPORT_SYMBOL vmlinux 0x453c8403	pci_msi_enabled
+EXPORT_SYMBOL vmlinux 0x454fb519	ioremap
+EXPORT_SYMBOL vmlinux 0x4550ba8a	register_cpu_notifier
+EXPORT_SYMBOL vmlinux 0x455d68de	pci_unmap_rom
+EXPORT_SYMBOL vmlinux 0x45704798	print_hex_dump_bytes
+EXPORT_SYMBOL vmlinux 0x4575315d	utf8s_to_utf16s
+EXPORT_SYMBOL vmlinux 0x45947727	param_array_set
+EXPORT_SYMBOL vmlinux 0x45b301d5	dput
+EXPORT_SYMBOL vmlinux 0x45b621be	pci_find_parent_resource
+EXPORT_SYMBOL vmlinux 0x45bf19c8	netif_notify_peers
+EXPORT_SYMBOL vmlinux 0x45d8000a	downgrade_write
+EXPORT_SYMBOL vmlinux 0x46020447	per_cpu__vm_event_states
+EXPORT_SYMBOL vmlinux 0x4610c0c2	pci_bus_set_ops
+EXPORT_SYMBOL vmlinux 0x46140497	tcp4_gro_receive
+EXPORT_SYMBOL vmlinux 0x4631a537	phy_ethtool_sset
+EXPORT_SYMBOL vmlinux 0x466a5ce2	iw_handler_get_thrspy
+EXPORT_SYMBOL vmlinux 0x4686b61c	serio_open
+EXPORT_SYMBOL vmlinux 0x4696be0a	wait_for_completion_timeout
+EXPORT_SYMBOL vmlinux 0x46d9cefe	__percpu_counter_init
+EXPORT_SYMBOL vmlinux 0x46e687e2	vfs_readdir
+EXPORT_SYMBOL vmlinux 0x47244913	bio_copy_kern
+EXPORT_SYMBOL vmlinux 0x47291a5a	inet_sk_rebuild_header
+EXPORT_SYMBOL vmlinux 0x47297f48	dma_get_cache_alignment
+EXPORT_SYMBOL vmlinux 0x475100c2	inet_get_local_port_range
+EXPORT_SYMBOL vmlinux 0x475f010b	acpi_purge_cached_objects
+EXPORT_SYMBOL vmlinux 0x47636033	swiotlb
+EXPORT_SYMBOL vmlinux 0x4763d43f	pipe_lock
+EXPORT_SYMBOL vmlinux 0x4771e1bd	vfs_readv
+EXPORT_SYMBOL vmlinux 0x477f8e76	kernel_sock_ioctl
+EXPORT_SYMBOL vmlinux 0x4798c46e	devm_free_irq
+EXPORT_SYMBOL vmlinux 0x479c3c86	find_next_zero_bit
+EXPORT_SYMBOL vmlinux 0x47a64733	elv_add_request
+EXPORT_SYMBOL vmlinux 0x47a9f591	kobject_set_name
+EXPORT_SYMBOL vmlinux 0x47bb33ca	datagram_poll
+EXPORT_SYMBOL vmlinux 0x47f5cb24	xfrm_state_add
+EXPORT_SYMBOL vmlinux 0x481cb9ab	acpi_enter_sleep_state_prep
+EXPORT_SYMBOL vmlinux 0x4827172a	skb_dma_map
+EXPORT_SYMBOL vmlinux 0x4859b8bb	rtc_year_days
+EXPORT_SYMBOL vmlinux 0x4866d3ef	acpi_lock_ac_dir
+EXPORT_SYMBOL vmlinux 0x48a04926	open_bdev_exclusive
+EXPORT_SYMBOL vmlinux 0x48b89996	init_file
+EXPORT_SYMBOL vmlinux 0x48c5cf69	bio_kmalloc
+EXPORT_SYMBOL vmlinux 0x48d4e765	jbd2_journal_extend
+EXPORT_SYMBOL vmlinux 0x48d82e3b	i2c_smbus_process_call
+EXPORT_SYMBOL vmlinux 0x48ea52dd	fb_set_cmap
+EXPORT_SYMBOL vmlinux 0x48fffdb1	ia64_pal_call_phys_stacked
+EXPORT_SYMBOL vmlinux 0x491689d6	kmem_cache_size
+EXPORT_SYMBOL vmlinux 0x49439411	genl_unregister_family
+EXPORT_SYMBOL vmlinux 0x49506e22	pci_clear_mwi
+EXPORT_SYMBOL vmlinux 0x4951d4b7	register_8022_client
+EXPORT_SYMBOL vmlinux 0x4953864e	journal_dirty_metadata
+EXPORT_SYMBOL vmlinux 0x49596c42	blk_cleanup_queue
+EXPORT_SYMBOL vmlinux 0x495f2ff8	dev_get_by_flags
+EXPORT_SYMBOL vmlinux 0x49603fb8	security_sb_copy_data
+EXPORT_SYMBOL vmlinux 0x499235f7	input_free_device
+EXPORT_SYMBOL vmlinux 0x499d2e26	genphy_config_advert
+EXPORT_SYMBOL vmlinux 0x49d4df99	save_mount_options
+EXPORT_SYMBOL vmlinux 0x49e182c0	param_get_string
+EXPORT_SYMBOL vmlinux 0x4a29f892	dev_mc_add
+EXPORT_SYMBOL vmlinux 0x4a2e39f2	wait_for_completion
+EXPORT_SYMBOL vmlinux 0x4a358252	__bitmap_subset
+EXPORT_SYMBOL vmlinux 0x4a3b74dd	lock_may_write
+EXPORT_SYMBOL vmlinux 0x4a47dd9d	fddi_type_trans
+EXPORT_SYMBOL vmlinux 0x4a541e2a	__umoddi3
+EXPORT_SYMBOL vmlinux 0x4a64e56f	gnet_stats_copy_basic
+EXPORT_SYMBOL vmlinux 0x4a866e7e	ia64_sal_oemcall
+EXPORT_SYMBOL vmlinux 0x4a8f3d6e	unregister_qdisc
+EXPORT_SYMBOL vmlinux 0x4a8faa88	swiotlb_dma_mapping_error
+EXPORT_SYMBOL vmlinux 0x4abf188d	dm_kcopyd_client_destroy
+EXPORT_SYMBOL vmlinux 0x4acd93d3	release_resource
+EXPORT_SYMBOL vmlinux 0x4af7dea5	nla_put_nohdr
+EXPORT_SYMBOL vmlinux 0x4b03f2c8	bio_endio
+EXPORT_SYMBOL vmlinux 0x4b11099a	mb_cache_entry_alloc
+EXPORT_SYMBOL vmlinux 0x4b82329b	dev_load
+EXPORT_SYMBOL vmlinux 0x4bbc3e5f	pm_flags
+EXPORT_SYMBOL vmlinux 0x4bfe39a3	nf_unregister_hook
+EXPORT_SYMBOL vmlinux 0x4c1182cb	bitmap_scnprintf
+EXPORT_SYMBOL vmlinux 0x4c467067	otg_get_transceiver
+EXPORT_SYMBOL vmlinux 0x4c4c956e	nla_memcmp
+EXPORT_SYMBOL vmlinux 0x4c71d643	xfrm_policy_delete
+EXPORT_SYMBOL vmlinux 0x4c8ae963	cdev_add
+EXPORT_SYMBOL vmlinux 0x4c96907a	__tcp_get_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x4c9e6bec	pci_find_bus
+EXPORT_SYMBOL vmlinux 0x4ca0118d	kill_pid
+EXPORT_SYMBOL vmlinux 0x4cbbd171	__bitmap_weight
+EXPORT_SYMBOL vmlinux 0x4d201838	proc_create_data
+EXPORT_SYMBOL vmlinux 0x4d4173c7	__put_cred
+EXPORT_SYMBOL vmlinux 0x4d41d32f	unw_init_from_blocked_task
+EXPORT_SYMBOL vmlinux 0x4d467753	blk_free_tags
+EXPORT_SYMBOL vmlinux 0x4d4a921b	generic_file_splice_write
+EXPORT_SYMBOL vmlinux 0x4d6dc3e1	_read_unlock_bh
+EXPORT_SYMBOL vmlinux 0x4d7e5b1b	jbd2_journal_check_used_features
+EXPORT_SYMBOL vmlinux 0x4d9d29fc	splice_from_pipe_next
+EXPORT_SYMBOL vmlinux 0x4da08f97	generic_file_buffered_write
+EXPORT_SYMBOL vmlinux 0x4dc45be9	nf_log_unbind_pf
+EXPORT_SYMBOL vmlinux 0x4dda726b	match_strlcpy
+EXPORT_SYMBOL vmlinux 0x4ddd3427	vm_insert_page
+EXPORT_SYMBOL vmlinux 0x4df119fa	__bitmap_parse
+EXPORT_SYMBOL vmlinux 0x4e069249	security_tun_dev_post_create
+EXPORT_SYMBOL vmlinux 0x4e0ab21d	ethtool_op_set_tso
+EXPORT_SYMBOL vmlinux 0x4e16378e	security_task_getsecid
+EXPORT_SYMBOL vmlinux 0x4e321fc0	dmam_pool_create
+EXPORT_SYMBOL vmlinux 0x4e3567f7	match_int
+EXPORT_SYMBOL vmlinux 0x4e4ca35d	tcf_em_unregister
+EXPORT_SYMBOL vmlinux 0x4e6e8ea7	fg_console
+EXPORT_SYMBOL vmlinux 0x4e9dffb5	ip_fast_csum
+EXPORT_SYMBOL vmlinux 0x4ea44356	i8042_check_port_owner
+EXPORT_SYMBOL vmlinux 0x4eb8b319	acpi_bus_get_status
+EXPORT_SYMBOL vmlinux 0x4ec793b8	mpage_readpages
+EXPORT_SYMBOL vmlinux 0x4ed17f65	blk_queue_logical_block_size
+EXPORT_SYMBOL vmlinux 0x4edd72f7	block_all_signals
+EXPORT_SYMBOL vmlinux 0x4f0cfaf9	up
+EXPORT_SYMBOL vmlinux 0x4f1cd128	security_tun_dev_create
+EXPORT_SYMBOL vmlinux 0x4f2e4515	dget_locked
+EXPORT_SYMBOL vmlinux 0x4f5438c1	idle_halt
+EXPORT_SYMBOL vmlinux 0x4f5b5362	simple_rename
+EXPORT_SYMBOL vmlinux 0x4f673462	input_register_handler
+EXPORT_SYMBOL vmlinux 0x4f783f30	acpi_read
+EXPORT_SYMBOL vmlinux 0x4f937ba7	dev_addr_del_multiple
+EXPORT_SYMBOL vmlinux 0x4fb5839a	per_cpu____sn_hub_info
+EXPORT_SYMBOL vmlinux 0x4fd54fbc	netpoll_setup
+EXPORT_SYMBOL vmlinux 0x4fdee897	i8042_command
+EXPORT_SYMBOL vmlinux 0x4feb7678	blk_register_region
+EXPORT_SYMBOL vmlinux 0x4febe864	serio_interrupt
+EXPORT_SYMBOL vmlinux 0x50048ed0	swiotlb_alloc_coherent
+EXPORT_SYMBOL vmlinux 0x50146ed7	napi_skb_finish
+EXPORT_SYMBOL vmlinux 0x501fcf83	gnet_stats_start_copy
+EXPORT_SYMBOL vmlinux 0x50211ee3	tcp_free_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x5027e0c5	__inet6_hash
+EXPORT_SYMBOL vmlinux 0x50383bf9	xfrm_stateonly_find
+EXPORT_SYMBOL vmlinux 0x5040e5a4	filemap_fault
+EXPORT_SYMBOL vmlinux 0x50509d8f	key_link
+EXPORT_SYMBOL vmlinux 0x505f465e	alloc_netdev_mq
+EXPORT_SYMBOL vmlinux 0x506746b6	getrawmonotonic
+EXPORT_SYMBOL vmlinux 0x506f37e4	tcf_exts_dump_stats
+EXPORT_SYMBOL vmlinux 0x5083e97d	call_usermodehelper_freeinfo
+EXPORT_SYMBOL vmlinux 0x50a20ee9	try_wait_for_completion
+EXPORT_SYMBOL vmlinux 0x50a49e6a	tcp_alloc_md5sig_pool
+EXPORT_SYMBOL vmlinux 0x50a9ca85	llc_sap_close
+EXPORT_SYMBOL vmlinux 0x50ade7ff	ll_rw_block
+EXPORT_SYMBOL vmlinux 0x50d2acbc	gen_pool_free
+EXPORT_SYMBOL vmlinux 0x50d56018	posix_acl_equiv_mode
+EXPORT_SYMBOL vmlinux 0x50fde80d	dma_pool_destroy
+EXPORT_SYMBOL vmlinux 0x51061496	skb_recycle_check
+EXPORT_SYMBOL vmlinux 0x51116334	search_binary_handler
+EXPORT_SYMBOL vmlinux 0x511ab5dd	inet_listen
+EXPORT_SYMBOL vmlinux 0x513c7e11	generic_ro_fops
+EXPORT_SYMBOL vmlinux 0x51459bd6	hp_acpi_csr_space
+EXPORT_SYMBOL vmlinux 0x51544484	__dec_zone_page_state
+EXPORT_SYMBOL vmlinux 0x5160deb7	block_prepare_write
+EXPORT_SYMBOL vmlinux 0x51663b9e	pnp_release_card_device
+EXPORT_SYMBOL vmlinux 0x5167d121	compat_sock_common_setsockopt
+EXPORT_SYMBOL vmlinux 0x516a05f6	bioset_free
+EXPORT_SYMBOL vmlinux 0x51761eee	sb_min_blocksize
+EXPORT_SYMBOL vmlinux 0x519428dc	release_sock
+EXPORT_SYMBOL vmlinux 0x51d470b8	d_invalidate
+EXPORT_SYMBOL vmlinux 0x51d8373e	bio_init
+EXPORT_SYMBOL vmlinux 0x51dc6e48	pnp_register_card_driver
+EXPORT_SYMBOL vmlinux 0x51dce73b	xfrm_state_walk_init
+EXPORT_SYMBOL vmlinux 0x51fee8bb	inet_csk_delete_keepalive_timer
+EXPORT_SYMBOL vmlinux 0x52026cdf	security_sb_parse_opts_str
+EXPORT_SYMBOL vmlinux 0x52095e19	acpi_get_data
+EXPORT_SYMBOL vmlinux 0x521b397b	genl_register_family_with_ops
+EXPORT_SYMBOL vmlinux 0x526aa6e8	neigh_create
+EXPORT_SYMBOL vmlinux 0x52760ca9	getnstimeofday
+EXPORT_SYMBOL vmlinux 0x52926d6f	mdiobus_scan
+EXPORT_SYMBOL vmlinux 0x52a58c24	ifla_policy
+EXPORT_SYMBOL vmlinux 0x52d7b2fd	llc_sap_list
+EXPORT_SYMBOL vmlinux 0x52d9ecd4	set_irq_chip
+EXPORT_SYMBOL vmlinux 0x52dc5f2c	dm_table_get_md
+EXPORT_SYMBOL vmlinux 0x52ebb126	param_get_ushort
+EXPORT_SYMBOL vmlinux 0x5311037c	ia64_sal_oemcall_reentrant
+EXPORT_SYMBOL vmlinux 0x53326531	mempool_alloc_pages
+EXPORT_SYMBOL vmlinux 0x5347195e	__devm_release_region
+EXPORT_SYMBOL vmlinux 0x53528e5a	ida_get_new
+EXPORT_SYMBOL vmlinux 0x535d2604	udplite_prot
+EXPORT_SYMBOL vmlinux 0x53782dca	blkdev_get
+EXPORT_SYMBOL vmlinux 0x53b51777	pnp_unregister_driver
+EXPORT_SYMBOL vmlinux 0x53c0767c	sk_chk_filter
+EXPORT_SYMBOL vmlinux 0x53da4882	otg_put_transceiver
+EXPORT_SYMBOL vmlinux 0x53e0d2e7	vfs_set_dqinfo
+EXPORT_SYMBOL vmlinux 0x5402e89b	cfb_imageblit
+EXPORT_SYMBOL vmlinux 0x54290dc9	nla_validate
+EXPORT_SYMBOL vmlinux 0x54493f28	abort_creds
+EXPORT_SYMBOL vmlinux 0x54ae358e	blk_start_request
+EXPORT_SYMBOL vmlinux 0x54b6ad1c	inet_dgram_ops
+EXPORT_SYMBOL vmlinux 0x54c63114	dev_set_allmulti
+EXPORT_SYMBOL vmlinux 0x54e6fcdd	net_enable_timestamp
+EXPORT_SYMBOL vmlinux 0x54e93a52	swiotlb_unmap_sg
+EXPORT_SYMBOL vmlinux 0x54f0452d	pcie_port_service_unregister
+EXPORT_SYMBOL vmlinux 0x54f2e656	tcp_v4_syn_recv_sock
+EXPORT_SYMBOL vmlinux 0x54faef22	dmam_alloc_coherent
+EXPORT_SYMBOL vmlinux 0x5500934c	boot_tvec_bases
+EXPORT_SYMBOL vmlinux 0x5520616f	rtnetlink_put_metrics
+EXPORT_SYMBOL vmlinux 0x554f0a48	groups_alloc
+EXPORT_SYMBOL vmlinux 0x557e6d68	km_state_expired
+EXPORT_SYMBOL vmlinux 0x558e7a63	tcf_em_register
+EXPORT_SYMBOL vmlinux 0x55925991	bio_integrity_clone
+EXPORT_SYMBOL vmlinux 0x5594be03	bitmap_remap
+EXPORT_SYMBOL vmlinux 0x55a286bf	proc_dointvec_minmax
+EXPORT_SYMBOL vmlinux 0x55a774af	pci_bus_assign_resources
+EXPORT_SYMBOL vmlinux 0x55bfadb9	inet_put_port
+EXPORT_SYMBOL vmlinux 0x55e2899f	mutex_trylock
+EXPORT_SYMBOL vmlinux 0x5600904f	fb_get_color_depth
+EXPORT_SYMBOL vmlinux 0x5603cf43	do_settimeofday
+EXPORT_SYMBOL vmlinux 0x5610d2bc	balance_dirty_pages_ratelimited_nr
+EXPORT_SYMBOL vmlinux 0x5614b010	xfrm_policy_walk_done
+EXPORT_SYMBOL vmlinux 0x563109a8	vfs_dq_drop
+EXPORT_SYMBOL vmlinux 0x5635a60a	vmalloc_user
+EXPORT_SYMBOL vmlinux 0x566e5b04	km_new_mapping
+EXPORT_SYMBOL vmlinux 0x567c4b00	register_netdevice
+EXPORT_SYMBOL vmlinux 0x56a10763	csum_tcpudp_magic
+EXPORT_SYMBOL vmlinux 0x56b326a4	request_firmware_nowait
+EXPORT_SYMBOL vmlinux 0x56ca38ff	_spin_lock_irq
+EXPORT_SYMBOL vmlinux 0x56f38712	schedule_delayed_work_on
+EXPORT_SYMBOL vmlinux 0x56f494e0	smp_call_function
+EXPORT_SYMBOL vmlinux 0x572e85d4	blk_lookup_devt
+EXPORT_SYMBOL vmlinux 0x573f8679	sock_no_mmap
+EXPORT_SYMBOL vmlinux 0x575ea7c4	_spin_unlock_irqrestore
+EXPORT_SYMBOL vmlinux 0x579c00ed	dev_unicast_add
+EXPORT_SYMBOL vmlinux 0x57abf1c7	bte_unaligned_copy
+EXPORT_SYMBOL vmlinux 0x57b57ebe	jiffies_to_timespec
+EXPORT_SYMBOL vmlinux 0x57db7242	mangle_path
+EXPORT_SYMBOL vmlinux 0x57dfab03	journal_clear_err
+EXPORT_SYMBOL vmlinux 0x5806b2a8	serio_rescan
+EXPORT_SYMBOL vmlinux 0x581f434b	__secpath_destroy
+EXPORT_SYMBOL vmlinux 0x5833fbd9	bioset_integrity_create
+EXPORT_SYMBOL vmlinux 0x5838f6c9	rtc_valid_tm
+EXPORT_SYMBOL vmlinux 0x5840971e	sock_no_sendpage
+EXPORT_SYMBOL vmlinux 0x5857b225	ioread16_rep
+EXPORT_SYMBOL vmlinux 0x5877eda4	generic_splice_sendpage
+EXPORT_SYMBOL vmlinux 0x58857ee2	lock_may_read
+EXPORT_SYMBOL vmlinux 0x58d9e623	atomic_dec_and_mutex_lock
+EXPORT_SYMBOL vmlinux 0x58f6a200	start_tty
+EXPORT_SYMBOL vmlinux 0x59128c81	wireless_send_event
+EXPORT_SYMBOL vmlinux 0x5934392b	fb_register_client
+EXPORT_SYMBOL vmlinux 0x594bbcec	do_mmap_pgoff
+EXPORT_SYMBOL vmlinux 0x594bf15b	ioport_map
+EXPORT_SYMBOL vmlinux 0x594c25f1	down_read_trylock
+EXPORT_SYMBOL vmlinux 0x594e1317	__modsi3
+EXPORT_SYMBOL vmlinux 0x59614a6d	elevator_init
+EXPORT_SYMBOL vmlinux 0x599add67	bio_integrity_tag_size
+EXPORT_SYMBOL vmlinux 0x59b71ded	__blk_end_request
+EXPORT_SYMBOL vmlinux 0x59bc9609	acpi_write_bit_register
+EXPORT_SYMBOL vmlinux 0x59d696b6	register_module_notifier
+EXPORT_SYMBOL vmlinux 0x5a291c25	unregister_8022_client
+EXPORT_SYMBOL vmlinux 0x5a34a45c	__kmalloc
+EXPORT_SYMBOL vmlinux 0x5a4ac5fa	keyring_clear
+EXPORT_SYMBOL vmlinux 0x5a5e7ea3	simple_read_from_buffer
+EXPORT_SYMBOL vmlinux 0x5a5f321d	pci_bus_add_devices
+EXPORT_SYMBOL vmlinux 0x5a744b86	netlink_set_nonroot
+EXPORT_SYMBOL vmlinux 0x5a84c8ca	ps2_begin_command
+EXPORT_SYMBOL vmlinux 0x5aa81170	audit_log_format
+EXPORT_SYMBOL vmlinux 0x5ab30ba7	tty_pair_get_tty
+EXPORT_SYMBOL vmlinux 0x5ac376a5	acpi_install_fixed_event_handler
+EXPORT_SYMBOL vmlinux 0x5accfcd3	netpoll_poll
+EXPORT_SYMBOL vmlinux 0x5ae74cd1	tcp_proc_register
+EXPORT_SYMBOL vmlinux 0x5af9618e	pci_set_dma_max_seg_size
+EXPORT_SYMBOL vmlinux 0x5b1a68c5	touch_atime
+EXPORT_SYMBOL vmlinux 0x5b213e4d	neigh_destroy
+EXPORT_SYMBOL vmlinux 0x5b27bcec	sysctl_intvec
+EXPORT_SYMBOL vmlinux 0x5b4a28c4	unregister_netdevice
+EXPORT_SYMBOL vmlinux 0x5b4f2c97	netpoll_cleanup
+EXPORT_SYMBOL vmlinux 0x5b51c6a7	acpi_walk_resources
+EXPORT_SYMBOL vmlinux 0x5b563526	tioca_fastwrite_enable
+EXPORT_SYMBOL vmlinux 0x5b72307c	__lookup_one_len
+EXPORT_SYMBOL vmlinux 0x5b847dad	neigh_lookup
+EXPORT_SYMBOL vmlinux 0x5ba1cedc	elv_rb_del
+EXPORT_SYMBOL vmlinux 0x5bae2eac	acpi_extract_package
+EXPORT_SYMBOL vmlinux 0x5bb5673c	skb_seq_read
+EXPORT_SYMBOL vmlinux 0x5bc629a0	journal_get_write_access
+EXPORT_SYMBOL vmlinux 0x5c1b4f94	blkdev_issue_flush
+EXPORT_SYMBOL vmlinux 0x5c270416	unregister_binfmt
+EXPORT_SYMBOL vmlinux 0x5c4e5b7e	interruptible_sleep_on_timeout
+EXPORT_SYMBOL vmlinux 0x5c64ffd3	tty_pair_get_pty
+EXPORT_SYMBOL vmlinux 0x5c6fe2ef	may_umount
+EXPORT_SYMBOL vmlinux 0x5c98dabc	init_task
+EXPORT_SYMBOL vmlinux 0x5c9b19e7	path_put
+EXPORT_SYMBOL vmlinux 0x5c9d36e4	skb_queue_tail
+EXPORT_SYMBOL vmlinux 0x5cc8e015	iov_iter_single_seg_count
+EXPORT_SYMBOL vmlinux 0x5ce67580	bmap
+EXPORT_SYMBOL vmlinux 0x5d105279	__mod_zone_page_state
+EXPORT_SYMBOL vmlinux 0x5d12b3fc	twl4030_i2c_write_u8
+EXPORT_SYMBOL vmlinux 0x5d45c0d9	ida_init
+EXPORT_SYMBOL vmlinux 0x5d74dbcf	pnp_range_reserved
+EXPORT_SYMBOL vmlinux 0x5dbbe98e	memmove
+EXPORT_SYMBOL vmlinux 0x5dc4583c	__percpu_counter_add
+EXPORT_SYMBOL vmlinux 0x5ddc39c0	pci_unregister_driver
+EXPORT_SYMBOL vmlinux 0x5de8db66	pci_read_vpd
+EXPORT_SYMBOL vmlinux 0x5e2b66fe	fb_blank
+EXPORT_SYMBOL vmlinux 0x5e2bbd0a	dm_table_event
+EXPORT_SYMBOL vmlinux 0x5e2e47f7	generic_setxattr
+EXPORT_SYMBOL vmlinux 0x5e675b25	journal_release_buffer
+EXPORT_SYMBOL vmlinux 0x5e7aad32	generic_file_splice_read
+EXPORT_SYMBOL vmlinux 0x5e8c8c05	pnp_start_dev
+EXPORT_SYMBOL vmlinux 0x5e95b1cd	current_umask
+EXPORT_SYMBOL vmlinux 0x5ea520c5	tcp_select_initial_window
+EXPORT_SYMBOL vmlinux 0x5eb2187c	swiotlb_sync_sg_for_cpu
+EXPORT_SYMBOL vmlinux 0x5ebc5377	ethtool_op_get_link
+EXPORT_SYMBOL vmlinux 0x5ec28371	jbd2_journal_start_commit
+EXPORT_SYMBOL vmlinux 0x5ec2ebe0	alloc_pages_current
+EXPORT_SYMBOL vmlinux 0x5ed040b0	pm_set_vt_switch
+EXPORT_SYMBOL vmlinux 0x5edd0762	bin2bcd
+EXPORT_SYMBOL vmlinux 0x5f0e34a5	path_lookup
+EXPORT_SYMBOL vmlinux 0x5f2b859b	dma_pool_alloc
+EXPORT_SYMBOL vmlinux 0x5f35e985	inode_set_bytes
+EXPORT_SYMBOL vmlinux 0x5f452156	dquot_release_reserved_space
+EXPORT_SYMBOL vmlinux 0x5f610fbf	mb_cache_entry_get
+EXPORT_SYMBOL vmlinux 0x5f7518c9	dm_io_client_resize
+EXPORT_SYMBOL vmlinux 0x5fa91a91	skb_insert
+EXPORT_SYMBOL vmlinux 0x5fc2bc3a	neigh_sysctl_register
+EXPORT_SYMBOL vmlinux 0x5fe3b794	__skb_warn_lro_forwarding
+EXPORT_SYMBOL vmlinux 0x5ffc85f9	xrlim_allow
+EXPORT_SYMBOL vmlinux 0x600683d3	do_unblank_screen
+EXPORT_SYMBOL vmlinux 0x6016f03e	netlink_set_err
+EXPORT_SYMBOL vmlinux 0x601e0972	eth_header_parse
+EXPORT_SYMBOL vmlinux 0x602ed00d	acpi_current_gpe_count
+EXPORT_SYMBOL vmlinux 0x605c8bde	radix_tree_delete
+EXPORT_SYMBOL vmlinux 0x6067a146	memcpy
+EXPORT_SYMBOL vmlinux 0x60973ff3	vfs_mkdir
+EXPORT_SYMBOL vmlinux 0x609ccde7	blk_make_request
+EXPORT_SYMBOL vmlinux 0x609f1c7e	synchronize_net
+EXPORT_SYMBOL vmlinux 0x60a32ea9	pm_power_off
+EXPORT_SYMBOL vmlinux 0x60a355d1	sock_i_uid
+EXPORT_SYMBOL vmlinux 0x60a6eef5	pnp_possible_config
+EXPORT_SYMBOL vmlinux 0x60b0570e	ioctl_by_bdev
+EXPORT_SYMBOL vmlinux 0x60bb5f26	ip_mc_inc_group
+EXPORT_SYMBOL vmlinux 0x60c8a508	nf_register_queue_handler
+EXPORT_SYMBOL vmlinux 0x60d3219b	bio_get_nr_vecs
+EXPORT_SYMBOL vmlinux 0x60d59fae	phy_register_fixup
+EXPORT_SYMBOL vmlinux 0x6102dac2	eth_header
+EXPORT_SYMBOL vmlinux 0x612390ad	netpoll_set_trap
+EXPORT_SYMBOL vmlinux 0x612600b9	register_nls
+EXPORT_SYMBOL vmlinux 0x61360275	genl_unregister_ops
+EXPORT_SYMBOL vmlinux 0x61394c96	jbd2_journal_load
+EXPORT_SYMBOL vmlinux 0x613c189b	__lock_buffer
+EXPORT_SYMBOL vmlinux 0x6148dc6b	generic_unplug_device
+EXPORT_SYMBOL vmlinux 0x617e7890	ip_setsockopt
+EXPORT_SYMBOL vmlinux 0x618d8299	set_notify_swap_entry_free
+EXPORT_SYMBOL vmlinux 0x61b7b126	simple_strtoull
+EXPORT_SYMBOL vmlinux 0x61bb82f4	kill_block_super
+EXPORT_SYMBOL vmlinux 0x61bdb814	flock_lock_file_wait
+EXPORT_SYMBOL vmlinux 0x61cb8f37	bio_put
+EXPORT_SYMBOL vmlinux 0x62049256	acpi_disable
+EXPORT_SYMBOL vmlinux 0x6205846c	matroxfb_unregister_driver
+EXPORT_SYMBOL vmlinux 0x622b67cb	unw_init_frame_info
+EXPORT_SYMBOL vmlinux 0x6237a757	sg_miter_start
+EXPORT_SYMBOL vmlinux 0x6237f6b5	acpi_enable_event
+EXPORT_SYMBOL vmlinux 0x62737e1d	sock_unregister
+EXPORT_SYMBOL vmlinux 0x62748e70	acpi_set_current_resources
+EXPORT_SYMBOL vmlinux 0x627906f0	__neigh_for_each_release
+EXPORT_SYMBOL vmlinux 0x62827bec	security_secctx_to_secid
+EXPORT_SYMBOL vmlinux 0x62858aa7	pci_remove_behind_bridge
+EXPORT_SYMBOL vmlinux 0x6288a205	con_is_bound
+EXPORT_SYMBOL vmlinux 0x62a85022	kick_iocb
+EXPORT_SYMBOL vmlinux 0x62ab3202	tcp_poll
+EXPORT_SYMBOL vmlinux 0x62d05d25	give_up_console
+EXPORT_SYMBOL vmlinux 0x62dd85bd	register_exec_domain
+EXPORT_SYMBOL vmlinux 0x62ef2863	pci_save_state
+EXPORT_SYMBOL vmlinux 0x62f32c04	node_to_cpu_mask
+EXPORT_SYMBOL vmlinux 0x631223eb	efi_mem_attributes
+EXPORT_SYMBOL vmlinux 0x6326e487	dev_getfirstbyhwtype
+EXPORT_SYMBOL vmlinux 0x633a333a	dm_put_device
+EXPORT_SYMBOL vmlinux 0x6363700d	xfrm_state_flush
+EXPORT_SYMBOL vmlinux 0x636a5691	acpi_register_ioapic
+EXPORT_SYMBOL vmlinux 0x638f6a9e	wait_for_key_construction
+EXPORT_SYMBOL vmlinux 0x63b3d1bc	__skb_checksum_complete_head
+EXPORT_SYMBOL vmlinux 0x63ecad53	register_netdevice_notifier
+EXPORT_SYMBOL vmlinux 0x6403e338	tcp_memory_pressure
+EXPORT_SYMBOL vmlinux 0x6419cd00	proc_net_netfilter
+EXPORT_SYMBOL vmlinux 0x641eb6c0	__seq_open_private
+EXPORT_SYMBOL vmlinux 0x642d7008	skb_unlink
+EXPORT_SYMBOL vmlinux 0x64770fc6	zero_fill_bio
+EXPORT_SYMBOL vmlinux 0x6478134c	ec_burst_enable
+EXPORT_SYMBOL vmlinux 0x64999478	congestion_wait
+EXPORT_SYMBOL vmlinux 0x64cff611	udp_lib_get_port
+EXPORT_SYMBOL vmlinux 0x64dfb345	pci_claim_resource
+EXPORT_SYMBOL vmlinux 0x650080be	clocksource_change_rating
+EXPORT_SYMBOL vmlinux 0x65022a24	radix_tree_prev_hole
+EXPORT_SYMBOL vmlinux 0x65031a5f	jbd2_journal_clear_features
+EXPORT_SYMBOL vmlinux 0x651a4139	test_taint
+EXPORT_SYMBOL vmlinux 0x65251129	dev_get_stats
+EXPORT_SYMBOL vmlinux 0x65408378	zlib_inflate_blob
+EXPORT_SYMBOL vmlinux 0x65414e67	dev_valid_name
+EXPORT_SYMBOL vmlinux 0x6554cfd4	request_key_with_auxdata
+EXPORT_SYMBOL vmlinux 0x65692253	page_symlink
+EXPORT_SYMBOL vmlinux 0x65b9b28d	tcp_v4_md5_do_del
+EXPORT_SYMBOL vmlinux 0x661a5783	proc_dointvec_userhz_jiffies
+EXPORT_SYMBOL vmlinux 0x662d0745	mb_cache_create
+EXPORT_SYMBOL vmlinux 0x66412ac3	sock_no_setsockopt
+EXPORT_SYMBOL vmlinux 0x6684d4dd	__set_page_dirty_buffers
+EXPORT_SYMBOL vmlinux 0x668da8d5	zlib_inflateIncomp
+EXPORT_SYMBOL vmlinux 0x66a45777	aio_complete
+EXPORT_SYMBOL vmlinux 0x67053080	current_kernel_time
+EXPORT_SYMBOL vmlinux 0x672144bd	strlcpy
+EXPORT_SYMBOL vmlinux 0x67218df8	backlight_device_unregister
+EXPORT_SYMBOL vmlinux 0x673aa1de	rwsem_wake
+EXPORT_SYMBOL vmlinux 0x677a3e25	generic_write_checks
+EXPORT_SYMBOL vmlinux 0x677e97d5	tcp_v4_destroy_sock
+EXPORT_SYMBOL vmlinux 0x67a53662	genphy_config_aneg
+EXPORT_SYMBOL vmlinux 0x67afa9e7	grab_cache_page_write_begin
+EXPORT_SYMBOL vmlinux 0x67b27ec1	tty_std_termios
+EXPORT_SYMBOL vmlinux 0x67c66eb4	nf_log_bind_pf
+EXPORT_SYMBOL vmlinux 0x68141832	skb_over_panic
+EXPORT_SYMBOL vmlinux 0x6815a3db	unw_init_running
+EXPORT_SYMBOL vmlinux 0x6818155f	blk_queue_find_tag
+EXPORT_SYMBOL vmlinux 0x68250011	input_unregister_device
+EXPORT_SYMBOL vmlinux 0x683243cc	pci_request_regions
+EXPORT_SYMBOL vmlinux 0x685df2a2	generic_error_remove_page
+EXPORT_SYMBOL vmlinux 0x68948192	compat_sock_common_getsockopt
+EXPORT_SYMBOL vmlinux 0x68b13c1e	mark_info_dirty
+EXPORT_SYMBOL vmlinux 0x68bc1f36	ethtool_op_get_tso
+EXPORT_SYMBOL vmlinux 0x68cd1238	bte_copy
+EXPORT_SYMBOL vmlinux 0x68f3ebe7	acpi_match_device_ids
+EXPORT_SYMBOL vmlinux 0x690d781e	bd_claim
+EXPORT_SYMBOL vmlinux 0x691f23a6	inet_twsk_deschedule
+EXPORT_SYMBOL vmlinux 0x693e80f1	get_write_access
+EXPORT_SYMBOL vmlinux 0x6964f8e0	generic_file_direct_write
+EXPORT_SYMBOL vmlinux 0x69668817	cdev_index
+EXPORT_SYMBOL vmlinux 0x6971447a	rtc_month_days
+EXPORT_SYMBOL vmlinux 0x697cb0a0	sysctl_ms_jiffies
+EXPORT_SYMBOL vmlinux 0x6980fe91	param_get_int
+EXPORT_SYMBOL vmlinux 0x69856fec	nobh_truncate_page
+EXPORT_SYMBOL vmlinux 0x698ea9d2	blk_queue_start_tag
+EXPORT_SYMBOL vmlinux 0x69927dff	try_acquire_console_sem
+EXPORT_SYMBOL vmlinux 0x69a0ca7d	iowrite16be
+EXPORT_SYMBOL vmlinux 0x69a358a6	iomem_resource
+EXPORT_SYMBOL vmlinux 0x69b705f4	task_nice
+EXPORT_SYMBOL vmlinux 0x69b9d90e	tc_classify_compat
+EXPORT_SYMBOL vmlinux 0x69be03cf	netlink_kernel_create
+EXPORT_SYMBOL vmlinux 0x69c8c1d5	security_req_classify_flow
+EXPORT_SYMBOL vmlinux 0x69cc8078	xfrm_input_resume
+EXPORT_SYMBOL vmlinux 0x69d2575f	efi
+EXPORT_SYMBOL vmlinux 0x69e27c7a	bitmap_copy_le
+EXPORT_SYMBOL vmlinux 0x6a03560a	complete_and_exit
+EXPORT_SYMBOL vmlinux 0x6a037cf1	mempool_kfree
+EXPORT_SYMBOL vmlinux 0x6a406408	i2c_smbus_read_block_data
+EXPORT_SYMBOL vmlinux 0x6a466e3d	napi_frags_skb
+EXPORT_SYMBOL vmlinux 0x6a47571d	__set_personality
+EXPORT_SYMBOL vmlinux 0x6a58ce24	blk_end_request_cur
+EXPORT_SYMBOL vmlinux 0x6a5c76cb	netlink_unicast
+EXPORT_SYMBOL vmlinux 0x6a5fa363	sigprocmask
+EXPORT_SYMBOL vmlinux 0x6a76f3ac	blk_iopoll_enable
+EXPORT_SYMBOL vmlinux 0x6aad4cd2	dcache_dir_lseek
+EXPORT_SYMBOL vmlinux 0x6ac3d17e	blk_recount_segments
+EXPORT_SYMBOL vmlinux 0x6acb973d	iowrite32be
+EXPORT_SYMBOL vmlinux 0x6ad065f4	param_set_charp
+EXPORT_SYMBOL vmlinux 0x6ad85887	acpi_enable_gpe
+EXPORT_SYMBOL vmlinux 0x6add5c9a	dmi_find_device
+EXPORT_SYMBOL vmlinux 0x6b1b67d3	__bdevname
+EXPORT_SYMBOL vmlinux 0x6b2a0e3d	handle_sysrq
+EXPORT_SYMBOL vmlinux 0x6b2dc060	dump_stack
+EXPORT_SYMBOL vmlinux 0x6b43f056	xfrm4_rcv_encap
+EXPORT_SYMBOL vmlinux 0x6b4e5a52	radix_tree_lookup_slot
+EXPORT_SYMBOL vmlinux 0x6b653a47	blk_init_queue
+EXPORT_SYMBOL vmlinux 0x6b93988c	locks_remove_posix
+EXPORT_SYMBOL vmlinux 0x6bc3fbc0	__unregister_chrdev
+EXPORT_SYMBOL vmlinux 0x6bc56c67	radix_tree_next_hole
+EXPORT_SYMBOL vmlinux 0x6bdcfd99	qdisc_class_hash_remove
+EXPORT_SYMBOL vmlinux 0x6be669ac	vfs_path_lookup
+EXPORT_SYMBOL vmlinux 0x6bf4a4be	invalidate_bdev
+EXPORT_SYMBOL vmlinux 0x6bfafefb	consume_skb
+EXPORT_SYMBOL vmlinux 0x6c389761	acpi_bus_get_private_data
+EXPORT_SYMBOL vmlinux 0x6c61ce70	num_registered_fb
+EXPORT_SYMBOL vmlinux 0x6c702af7	sysctl_udp_rmem_min
+EXPORT_SYMBOL vmlinux 0x6c823df6	journal_force_commit
+EXPORT_SYMBOL vmlinux 0x6ca6bebb	kmem_cache_alloc
+EXPORT_SYMBOL vmlinux 0x6cba4fc4	arp_create
+EXPORT_SYMBOL vmlinux 0x6cbae3bd	bd_set_size
+EXPORT_SYMBOL vmlinux 0x6cd5dbe7	splice_from_pipe_end
+EXPORT_SYMBOL vmlinux 0x6cd78daa	kernel_getsockname
+EXPORT_SYMBOL vmlinux 0x6cedc82f	sock_queue_rcv_skb
+EXPORT_SYMBOL vmlinux 0x6cf7dbdd	tty_port_close_end
+EXPORT_SYMBOL vmlinux 0x6d0b77fe	sysctl_data
+EXPORT_SYMBOL vmlinux 0x6d0bed07	jbd2_journal_get_write_access
+EXPORT_SYMBOL vmlinux 0x6d199917	console_stop
+EXPORT_SYMBOL vmlinux 0x6d244d38	udp_lib_setsockopt
+EXPORT_SYMBOL vmlinux 0x6d27ef64	__bitmap_empty
+EXPORT_SYMBOL vmlinux 0x6d294e43	clock_t_to_jiffies
+EXPORT_SYMBOL vmlinux 0x6d2a96a7	simple_statfs
+EXPORT_SYMBOL vmlinux 0x6d340f64	tty_termios_input_baud_rate
+EXPORT_SYMBOL vmlinux 0x6d38ce7c	tcf_exts_change
+EXPORT_SYMBOL vmlinux 0x6d48af5c	prepare_kernel_cred
+EXPORT_SYMBOL vmlinux 0x6d4c4fde	security_path_link
+EXPORT_SYMBOL vmlinux 0x6d6cbadc	rb_last
+EXPORT_SYMBOL vmlinux 0x6d6eb230	call_usermodehelper_stdinpipe
+EXPORT_SYMBOL vmlinux 0x6d824298	_read_lock_bh
+EXPORT_SYMBOL vmlinux 0x6da173b4	__generic_file_aio_write
+EXPORT_SYMBOL vmlinux 0x6dce12a5	skb_copy_and_csum_bits
+EXPORT_SYMBOL vmlinux 0x6dce9f35	acpi_enter_sleep_state
+EXPORT_SYMBOL vmlinux 0x6de6bf83	radix_tree_lookup
+EXPORT_SYMBOL vmlinux 0x6de8b9e4	find_inode_number
+EXPORT_SYMBOL vmlinux 0x6def2db2	half_md4_transform
+EXPORT_SYMBOL vmlinux 0x6e07a54e	acpi_get_gpe_status
+EXPORT_SYMBOL vmlinux 0x6e2166a4	filemap_write_and_wait
+EXPORT_SYMBOL vmlinux 0x6e39f0cb	d_obtain_alias
+EXPORT_SYMBOL vmlinux 0x6e4661a7	alloc_pci_dev
+EXPORT_SYMBOL vmlinux 0x6e720ff2	rtnl_unlock
+EXPORT_SYMBOL vmlinux 0x6e7adc41	user_revoke
+EXPORT_SYMBOL vmlinux 0x6e802324	radix_tree_tag_get
+EXPORT_SYMBOL vmlinux 0x6e87f490	ps2_handle_response
+EXPORT_SYMBOL vmlinux 0x6e9dd606	__symbol_put
+EXPORT_SYMBOL vmlinux 0x6ecb6645	dcache_lock
+EXPORT_SYMBOL vmlinux 0x6edb70d2	blk_insert_request
+EXPORT_SYMBOL vmlinux 0x6ef24b19	journal_invalidatepage
+EXPORT_SYMBOL vmlinux 0x6ef34de0	cpufreq_global_kobject
+EXPORT_SYMBOL vmlinux 0x6f04c8a3	tcp_init_xmit_timers
+EXPORT_SYMBOL vmlinux 0x6f13742d	pci_find_capability
+EXPORT_SYMBOL vmlinux 0x6f206a2f	hippi_mac_addr
+EXPORT_SYMBOL vmlinux 0x6f4e0e3d	phy_mii_ioctl
+EXPORT_SYMBOL vmlinux 0x6f556bdb	acpi_get_gpe_device
+EXPORT_SYMBOL vmlinux 0x6f854878	filp_close
+EXPORT_SYMBOL vmlinux 0x6fadebe2	dm_register_target
+EXPORT_SYMBOL vmlinux 0x6fcb87a1	touch_softlockup_watchdog
+EXPORT_SYMBOL vmlinux 0x6fd0d074	linkwatch_fire_event
+EXPORT_SYMBOL vmlinux 0x6fd5c518	xfrm_cfg_mutex
+EXPORT_SYMBOL vmlinux 0x6fe87073	bdget_disk
+EXPORT_SYMBOL vmlinux 0x6feb2039	acpi_write
+EXPORT_SYMBOL vmlinux 0x6fff393f	time_to_tm
+EXPORT_SYMBOL vmlinux 0x70283084	prepare_creds
+EXPORT_SYMBOL vmlinux 0x70523a7a	__cond_resched_softirq
+EXPORT_SYMBOL vmlinux 0x70a91c5c	pci_find_device
+EXPORT_SYMBOL vmlinux 0x70bc17d7	inode_wait
+EXPORT_SYMBOL vmlinux 0x70cacd30	i2c_get_adapter
+EXPORT_SYMBOL vmlinux 0x70d8ab82	acpi_acquire_global_lock
+EXPORT_SYMBOL vmlinux 0x70d939ee	__free_pages
+EXPORT_SYMBOL vmlinux 0x7105cd3d	sg_miter_stop
+EXPORT_SYMBOL vmlinux 0x711ade22	neigh_ifdown
+EXPORT_SYMBOL vmlinux 0x7126165b	tcf_unregister_action
+EXPORT_SYMBOL vmlinux 0x7129e5f8	hex_asc
+EXPORT_SYMBOL vmlinux 0x71306e68	sk_alloc
+EXPORT_SYMBOL vmlinux 0x713a3f79	try_to_release_page
+EXPORT_SYMBOL vmlinux 0x71446379	get_super
+EXPORT_SYMBOL vmlinux 0x7145ebce	sk_stream_wait_memory
+EXPORT_SYMBOL vmlinux 0x71716d43	sk_stream_wait_close
+EXPORT_SYMBOL vmlinux 0x719f337b	scm_fp_dup
+EXPORT_SYMBOL vmlinux 0x71a50dbc	register_blkdev
+EXPORT_SYMBOL vmlinux 0x71c2ab93	disk_stack_limits
+EXPORT_SYMBOL vmlinux 0x71c5f9a3	bio_alloc
+EXPORT_SYMBOL vmlinux 0x71e34083	__f_setown
+EXPORT_SYMBOL vmlinux 0x71e88564	jbd2_journal_wipe
+EXPORT_SYMBOL vmlinux 0x71f6eb38	sg_copy_from_buffer
+EXPORT_SYMBOL vmlinux 0x720e7bbf	blk_end_request_all
+EXPORT_SYMBOL vmlinux 0x7210fd00	flush_signals
+EXPORT_SYMBOL vmlinux 0x723d69a6	skb_abort_seq_read
+EXPORT_SYMBOL vmlinux 0x7242e96d	strnchr
+EXPORT_SYMBOL vmlinux 0x724e8eaa	bio_copy_user
+EXPORT_SYMBOL vmlinux 0x726fcdb4	vfs_fsync_range
+EXPORT_SYMBOL vmlinux 0x727e50f4	unregister_sysrq_key
+EXPORT_SYMBOL vmlinux 0x728b8243	ethtool_op_get_flags
+EXPORT_SYMBOL vmlinux 0x729819a9	security_sb_clone_mnt_opts
+EXPORT_SYMBOL vmlinux 0x729d9782	inode_sub_rsv_space
+EXPORT_SYMBOL vmlinux 0x729fa476	tty_port_init
+EXPORT_SYMBOL vmlinux 0x72b28441	skb_append
+EXPORT_SYMBOL vmlinux 0x72b6d9c9	tcf_em_tree_validate
+EXPORT_SYMBOL vmlinux 0x72c09215	set_security_override_from_ctx
+EXPORT_SYMBOL vmlinux 0x72c3be87	param_set_byte
+EXPORT_SYMBOL vmlinux 0x72e8ed40	nla_put
+EXPORT_SYMBOL vmlinux 0x735bb3e5	tty_wait_until_sent
+EXPORT_SYMBOL vmlinux 0x737172bd	rwsem_downgrade_wake
+EXPORT_SYMBOL vmlinux 0x7389c9a8	acpi_bus_get_power
+EXPORT_SYMBOL vmlinux 0x73d27fbf	dquot_release
+EXPORT_SYMBOL vmlinux 0x7421bd3b	con_copy_unimap
+EXPORT_SYMBOL vmlinux 0x74319d18	blk_rq_map_integrity_sg
+EXPORT_SYMBOL vmlinux 0x743bc873	single_release
+EXPORT_SYMBOL vmlinux 0x74428afe	phy_device_register
+EXPORT_SYMBOL vmlinux 0x744c0c68	param_get_byte
+EXPORT_SYMBOL vmlinux 0x7479e1fe	register_sysctl_paths
+EXPORT_SYMBOL vmlinux 0x748287ef	simple_link
+EXPORT_SYMBOL vmlinux 0x7483c369	i2c_use_client
+EXPORT_SYMBOL vmlinux 0x7485e15e	unregister_chrdev_region
+EXPORT_SYMBOL vmlinux 0x74954462	timecounter_read
+EXPORT_SYMBOL vmlinux 0x74cc1cbe	unregister_cpu_notifier
+EXPORT_SYMBOL vmlinux 0x74d5deb3	netdev_state_change
+EXPORT_SYMBOL vmlinux 0x74ea1265	cpumask_next_and
+EXPORT_SYMBOL vmlinux 0x75033447	tcp_mtup_init
+EXPORT_SYMBOL vmlinux 0x750868d1	journal_abort
+EXPORT_SYMBOL vmlinux 0x750eecfc	input_set_keycode
+EXPORT_SYMBOL vmlinux 0x75179177	simple_dir_inode_operations
+EXPORT_SYMBOL vmlinux 0x752005c2	kobject_get
+EXPORT_SYMBOL vmlinux 0x75671caf	jbd2_journal_unlock_updates
+EXPORT_SYMBOL vmlinux 0x756e6992	strnicmp
+EXPORT_SYMBOL vmlinux 0x7594cdd8	blk_queue_ordered
+EXPORT_SYMBOL vmlinux 0x75a8462b	input_inject_event
+EXPORT_SYMBOL vmlinux 0x75bdea12	iommu_area_alloc
+EXPORT_SYMBOL vmlinux 0x75c7ff9b	locks_init_lock
+EXPORT_SYMBOL vmlinux 0x75f671b4	do_splice_to
+EXPORT_SYMBOL vmlinux 0x75fb6fc5	register_sysctl_table
+EXPORT_SYMBOL vmlinux 0x760a0f4f	yield
+EXPORT_SYMBOL vmlinux 0x760b437a	unregister_inetaddr_notifier
+EXPORT_SYMBOL vmlinux 0x762c71ad	sock_create_lite
+EXPORT_SYMBOL vmlinux 0x7641708f	netif_rx
+EXPORT_SYMBOL vmlinux 0x764bd77c	request_resource
+EXPORT_SYMBOL vmlinux 0x76578ef7	inet_del_protocol
+EXPORT_SYMBOL vmlinux 0x76605446	nf_log_unregister
+EXPORT_SYMBOL vmlinux 0x7664fc3b	security_path_unlink
+EXPORT_SYMBOL vmlinux 0x766db360	generic_file_aio_write
+EXPORT_SYMBOL vmlinux 0x766fa166	xfrm_state_check_expire
+EXPORT_SYMBOL vmlinux 0x767dd8fd	acpi_get_irq_routing_table
+EXPORT_SYMBOL vmlinux 0x76a495c1	cpu_possible_mask
+EXPORT_SYMBOL vmlinux 0x76ba7653	tcp_v4_send_check
+EXPORT_SYMBOL vmlinux 0x76bf656d	__bitmap_shift_left
+EXPORT_SYMBOL vmlinux 0x76cfd455	neigh_sysctl_unregister
+EXPORT_SYMBOL vmlinux 0x76d3cd60	laptop_mode
+EXPORT_SYMBOL vmlinux 0x76d53d2d	__sk_mem_reclaim
+EXPORT_SYMBOL vmlinux 0x76f34a7f	proc_symlink
+EXPORT_SYMBOL vmlinux 0x76ffc0e3	napi_gro_receive
+EXPORT_SYMBOL vmlinux 0x770e5050	i2c_put_adapter
+EXPORT_SYMBOL vmlinux 0x773a9c94	blk_iopoll_enabled
+EXPORT_SYMBOL vmlinux 0x773d669c	tty_port_close
+EXPORT_SYMBOL vmlinux 0x7741c19b	truncate_inode_pages_range
+EXPORT_SYMBOL vmlinux 0x774d6e05	idr_remove_all
+EXPORT_SYMBOL vmlinux 0x77642499	input_set_capability
+EXPORT_SYMBOL vmlinux 0x779314ea	__bio_clone
+EXPORT_SYMBOL vmlinux 0x7795c3ce	dqget
+EXPORT_SYMBOL vmlinux 0x77afe88c	netdev_set_master
+EXPORT_SYMBOL vmlinux 0x77e80fa7	__xfrm_state_delete
+EXPORT_SYMBOL vmlinux 0x77e8fe5b	kill_anon_super
+EXPORT_SYMBOL vmlinux 0x77ecac9f	zlib_inflateEnd
+EXPORT_SYMBOL vmlinux 0x77f53abc	acpi_get_vendor_resource
+EXPORT_SYMBOL vmlinux 0x77fa5d1f	ns_to_timespec
+EXPORT_SYMBOL vmlinux 0x7815a775	skb_make_writable
+EXPORT_SYMBOL vmlinux 0x7829d3c9	qdisc_warn_nonwc
+EXPORT_SYMBOL vmlinux 0x782b524e	make_bad_inode
+EXPORT_SYMBOL vmlinux 0x7832c58a	jbd2_journal_release_buffer
+EXPORT_SYMBOL vmlinux 0x7836db69	lease_modify
+EXPORT_SYMBOL vmlinux 0x783f079b	dm_unregister_target
+EXPORT_SYMBOL vmlinux 0x7883763a	pci_pme_active
+EXPORT_SYMBOL vmlinux 0x78863871	sock_map_fd
+EXPORT_SYMBOL vmlinux 0x789394b9	_write_unlock_irqrestore
+EXPORT_SYMBOL vmlinux 0x78adbb14	skb_queue_head
+EXPORT_SYMBOL vmlinux 0x78b9e7ff	blk_integrity_compare
+EXPORT_SYMBOL vmlinux 0x78be3d21	g450_mnp2f
+EXPORT_SYMBOL vmlinux 0x78c8d3e6	dev_addr_del
+EXPORT_SYMBOL vmlinux 0x78df6bd7	no_pci_devices
+EXPORT_SYMBOL vmlinux 0x790305b0	__percpu_counter_sum
+EXPORT_SYMBOL vmlinux 0x79068fda	acpi_install_method
+EXPORT_SYMBOL vmlinux 0x7910d0f6	netif_carrier_off
+EXPORT_SYMBOL vmlinux 0x79199d32	revert_creds
+EXPORT_SYMBOL vmlinux 0x792590dc	pfifo_qdisc_ops
+EXPORT_SYMBOL vmlinux 0x7937c05b	kobject_put
+EXPORT_SYMBOL vmlinux 0x7937ea00	cpu_sysdev_class
+EXPORT_SYMBOL vmlinux 0x79443ef9	kblockd_schedule_work
+EXPORT_SYMBOL vmlinux 0x79a2fd35	ia64_unreg_MCA_extension
+EXPORT_SYMBOL vmlinux 0x79aa04a2	get_random_bytes
+EXPORT_SYMBOL vmlinux 0x79ad224b	tasklet_kill
+EXPORT_SYMBOL vmlinux 0x79eaa8c7	input_filter_device
+EXPORT_SYMBOL vmlinux 0x79f15bd4	journal_stop
+EXPORT_SYMBOL vmlinux 0x79f28983	set_bh_page
+EXPORT_SYMBOL vmlinux 0x79f711c3	udp_proc_unregister
+EXPORT_SYMBOL vmlinux 0x7a2a837d	strict_strtol
+EXPORT_SYMBOL vmlinux 0x7a4497db	kzfree
+EXPORT_SYMBOL vmlinux 0x7a4e033f	ida_destroy
+EXPORT_SYMBOL vmlinux 0x7a4ea243	i2c_smbus_read_byte_data
+EXPORT_SYMBOL vmlinux 0x7a83ed84	call_usermodehelper_pipe
+EXPORT_SYMBOL vmlinux 0x7ab1d153	mod_timer_pending
+EXPORT_SYMBOL vmlinux 0x7ae73de1	alloc_pages_exact
+EXPORT_SYMBOL vmlinux 0x7b01f1ea	matroxfb_read_pins
+EXPORT_SYMBOL vmlinux 0x7b09da0a	do_SAK
+EXPORT_SYMBOL vmlinux 0x7b0c84c4	acpi_remove_table_handler
+EXPORT_SYMBOL vmlinux 0x7b21a7cb	inode_permission
+EXPORT_SYMBOL vmlinux 0x7b2a732d	lro_receive_frags
+EXPORT_SYMBOL vmlinux 0x7b56a174	xfrm_state_walk
+EXPORT_SYMBOL vmlinux 0x7b64b1b2	tty_get_baud_rate
+EXPORT_SYMBOL vmlinux 0x7b65abfd	check_disk_size_change
+EXPORT_SYMBOL vmlinux 0x7b79ed54	lro_receive_skb
+EXPORT_SYMBOL vmlinux 0x7b8702d3	load_nls_default
+EXPORT_SYMBOL vmlinux 0x7b8f4c40	key_create_or_update
+EXPORT_SYMBOL vmlinux 0x7ba8ce0d	registered_fb
+EXPORT_SYMBOL vmlinux 0x7bac0ba8	dm_table_get
+EXPORT_SYMBOL vmlinux 0x7bb1990e	skb_prepare_seq_read
+EXPORT_SYMBOL vmlinux 0x7bbe2a52	gnet_stats_copy_app
+EXPORT_SYMBOL vmlinux 0x7bd3a42e	jbd2_journal_get_create_access
+EXPORT_SYMBOL vmlinux 0x7bde9d46	page_follow_link_light
+EXPORT_SYMBOL vmlinux 0x7bf8978a	ethtool_op_get_rx_csum
+EXPORT_SYMBOL vmlinux 0x7bff3be7	iov_iter_advance
+EXPORT_SYMBOL vmlinux 0x7c1cde82	proc_dointvec_ms_jiffies
+EXPORT_SYMBOL vmlinux 0x7c46233a	cpufreq_quick_get
+EXPORT_SYMBOL vmlinux 0x7c60d66e	getname
+EXPORT_SYMBOL vmlinux 0x7c61340c	__release_region
+EXPORT_SYMBOL vmlinux 0x7c702bca	neigh_connected_output
+EXPORT_SYMBOL vmlinux 0x7c904ded	unregister_module_notifier
+EXPORT_SYMBOL vmlinux 0x7c9bbc10	bh_uptodate_or_lock
+EXPORT_SYMBOL vmlinux 0x7ca86d8d	tty_insert_flip_string_flags
+EXPORT_SYMBOL vmlinux 0x7cb1ae69	cpu_down
+EXPORT_SYMBOL vmlinux 0x7cc559fb	pci_setup_cardbus
+EXPORT_SYMBOL vmlinux 0x7ccb165b	filemap_fdatawrite
+EXPORT_SYMBOL vmlinux 0x7ce362b2	llc_set_station_handler
+EXPORT_SYMBOL vmlinux 0x7cef7f98	__task_pid_nr_ns
+EXPORT_SYMBOL vmlinux 0x7cf29a3f	sync_dirty_buffer
+EXPORT_SYMBOL vmlinux 0x7d11c268	jiffies
+EXPORT_SYMBOL vmlinux 0x7d1c2e25	udp_lib_getsockopt
+EXPORT_SYMBOL vmlinux 0x7d2a4f23	phy_attach
+EXPORT_SYMBOL vmlinux 0x7d599072	nf_ip_checksum
+EXPORT_SYMBOL vmlinux 0x7d834188	matroxfb_g450_connect
+EXPORT_SYMBOL vmlinux 0x7d94f746	acpi_os_write_port
+EXPORT_SYMBOL vmlinux 0x7dbdac94	skb_checksum
+EXPORT_SYMBOL vmlinux 0x7dc4bfa8	simple_getattr
+EXPORT_SYMBOL vmlinux 0x7dceceac	capable
+EXPORT_SYMBOL vmlinux 0x7dda521d	pci_target_state
+EXPORT_SYMBOL vmlinux 0x7dead16c	blk_rq_unmap_user
+EXPORT_SYMBOL vmlinux 0x7df90adb	bdev_stack_limits
+EXPORT_SYMBOL vmlinux 0x7e0f8651	seq_release
+EXPORT_SYMBOL vmlinux 0x7e191512	jbd2_journal_set_features
+EXPORT_SYMBOL vmlinux 0x7e394b69	jbd2_journal_begin_ordered_truncate
+EXPORT_SYMBOL vmlinux 0x7e408935	set_binfmt
+EXPORT_SYMBOL vmlinux 0x7e602d18	input_open_device
+EXPORT_SYMBOL vmlinux 0x7e8d844e	seq_escape
+EXPORT_SYMBOL vmlinux 0x7e98a51b	pci_choose_state
+EXPORT_SYMBOL vmlinux 0x7eb18cc1	mpage_readpage
+EXPORT_SYMBOL vmlinux 0x7ec50b5c	__register_binfmt
+EXPORT_SYMBOL vmlinux 0x7ec9bfbc	strncpy
+EXPORT_SYMBOL vmlinux 0x7eef2112	i2c_smbus_read_i2c_block_data
+EXPORT_SYMBOL vmlinux 0x7f19d217	pci_set_consistent_dma_mask
+EXPORT_SYMBOL vmlinux 0x7f24de73	jiffies_to_usecs
+EXPORT_SYMBOL vmlinux 0x7f295d31	__scm_send
+EXPORT_SYMBOL vmlinux 0x7f3485ef	sock_no_poll
+EXPORT_SYMBOL vmlinux 0x7f59b7dc	blk_init_queue_node
+EXPORT_SYMBOL vmlinux 0x7f5d95e9	compat_ip_getsockopt
+EXPORT_SYMBOL vmlinux 0x7f5f3f1e	sn_pci_unfixup_slot
+EXPORT_SYMBOL vmlinux 0x7f71f65e	alloc_buffer_head
+EXPORT_SYMBOL vmlinux 0x7f8039d0	tcp_rcv_state_process
+EXPORT_SYMBOL vmlinux 0x7f8839d7	d_alloc_root
+EXPORT_SYMBOL vmlinux 0x7ffabea2	d_delete
+EXPORT_SYMBOL vmlinux 0x80238873	d_splice_alias
+EXPORT_SYMBOL vmlinux 0x804b7064	simple_readpage
+EXPORT_SYMBOL vmlinux 0x80671888	sleep_on_timeout
+EXPORT_SYMBOL vmlinux 0x809c8798	ethtool_op_set_flags
+EXPORT_SYMBOL vmlinux 0x809dccc3	input_unregister_handle
+EXPORT_SYMBOL vmlinux 0x809f6d0a	dev_addr_add
+EXPORT_SYMBOL vmlinux 0x80d79185	idr_destroy
+EXPORT_SYMBOL vmlinux 0x80f32595	generic_make_request
+EXPORT_SYMBOL vmlinux 0x80f61c67	bio_add_pc_page
+EXPORT_SYMBOL vmlinux 0x81135629	sk_run_filter
+EXPORT_SYMBOL vmlinux 0x81472677	acpi_get_table
+EXPORT_SYMBOL vmlinux 0x81479af5	fbcon_set_bitops
+EXPORT_SYMBOL vmlinux 0x815b5dd4	match_octal
+EXPORT_SYMBOL vmlinux 0x81864552	find_get_pages_tag
+EXPORT_SYMBOL vmlinux 0x81be00fc	devm_request_threaded_irq
+EXPORT_SYMBOL vmlinux 0x81e6b37f	dmi_get_system_info
+EXPORT_SYMBOL vmlinux 0x81f47d27	pci_scan_single_device
+EXPORT_SYMBOL vmlinux 0x81f61bc2	ip_xfrm_me_harder
+EXPORT_SYMBOL vmlinux 0x82005950	__bforget
+EXPORT_SYMBOL vmlinux 0x820d225f	print_mac
+EXPORT_SYMBOL vmlinux 0x820db01b	dquot_drop
+EXPORT_SYMBOL vmlinux 0x82206f08	xfrm_state_lookup
+EXPORT_SYMBOL vmlinux 0x824bbd38	vfs_dq_quota_on_remount
+EXPORT_SYMBOL vmlinux 0x8251bcc3	bitmap_release_region
+EXPORT_SYMBOL vmlinux 0x82529044	ip_queue_xmit
+EXPORT_SYMBOL vmlinux 0x8257cba0	per_cpu____sn_nodepda
+EXPORT_SYMBOL vmlinux 0x8257d920	open_exec
+EXPORT_SYMBOL vmlinux 0x825a0679	install_exec_creds
+EXPORT_SYMBOL vmlinux 0x82692209	kref_set
+EXPORT_SYMBOL vmlinux 0x82891f7f	vfs_get_dqinfo
+EXPORT_SYMBOL vmlinux 0x82acfb70	blk_iopoll_sched
+EXPORT_SYMBOL vmlinux 0x82b3e82e	tty_schedule_flip
+EXPORT_SYMBOL vmlinux 0x82bc1962	phy_driver_register
+EXPORT_SYMBOL vmlinux 0x82ca29da	remove_wait_queue
+EXPORT_SYMBOL vmlinux 0x82e9c083	csum_partial_copy_fromiovecend
+EXPORT_SYMBOL vmlinux 0x82ec4a3f	phy_register_fixup_for_id
+EXPORT_SYMBOL vmlinux 0x8320bea8	__umodsi3
+EXPORT_SYMBOL vmlinux 0x83315d34	invalidate_inodes
+EXPORT_SYMBOL vmlinux 0x8348ea44	xfrm_policy_insert
+EXPORT_SYMBOL vmlinux 0x83632992	bio_map_user
+EXPORT_SYMBOL vmlinux 0x8375b2e0	inet_frags_exit_net
+EXPORT_SYMBOL vmlinux 0x8378ea25	gnet_stats_copy_queue
+EXPORT_SYMBOL vmlinux 0x83942b1b	kthread_stop
+EXPORT_SYMBOL vmlinux 0x83998b0b	ia64_save_scratch_fpregs
+EXPORT_SYMBOL vmlinux 0x839edfd3	get_sb_nodev
+EXPORT_SYMBOL vmlinux 0x83a476ce	bitmap_scnlistprintf
+EXPORT_SYMBOL vmlinux 0x83bb74ca	journal_set_features
+EXPORT_SYMBOL vmlinux 0x83bddc28	dquot_commit_info
+EXPORT_SYMBOL vmlinux 0x83c43dc1	posix_acl_chmod_masq
+EXPORT_SYMBOL vmlinux 0x83f96a77	__nla_reserve
+EXPORT_SYMBOL vmlinux 0x8430342d	elv_rb_add
+EXPORT_SYMBOL vmlinux 0x845a2a88	pci_bus_write_config_dword
+EXPORT_SYMBOL vmlinux 0x846f70ec	simple_empty
+EXPORT_SYMBOL vmlinux 0x84aa4aa4	key_negate_and_link
+EXPORT_SYMBOL vmlinux 0x84acc945	security_path_rename
+EXPORT_SYMBOL vmlinux 0x84c4ef50	dev_alloc_name
+EXPORT_SYMBOL vmlinux 0x84ca4e8c	unregister_quota_format
+EXPORT_SYMBOL vmlinux 0x84eb12a3	__blk_end_request_cur
+EXPORT_SYMBOL vmlinux 0x84ed891c	pci_set_mwi
+EXPORT_SYMBOL vmlinux 0x84f08301	proc_mkdir
+EXPORT_SYMBOL vmlinux 0x8512cd3d	vfs_quota_enable
+EXPORT_SYMBOL vmlinux 0x85670f1d	rtnl_is_locked
+EXPORT_SYMBOL vmlinux 0x8579cf13	xfrm_alloc_spi
+EXPORT_SYMBOL vmlinux 0x858706a2	__break_lease
+EXPORT_SYMBOL vmlinux 0x8596bce8	security_d_instantiate
+EXPORT_SYMBOL vmlinux 0x85abc85f	strncmp
+EXPORT_SYMBOL vmlinux 0x85acfd6f	pci_find_next_bus
+EXPORT_SYMBOL vmlinux 0x85c1b8bb	phy_disconnect
+EXPORT_SYMBOL vmlinux 0x85c1bc00	jbd2_journal_forget
+EXPORT_SYMBOL vmlinux 0x85df9b6c	strsep
+EXPORT_SYMBOL vmlinux 0x85f1371e	ip_cmsg_recv
+EXPORT_SYMBOL vmlinux 0x8618183e	tcp_md5_hash_key
+EXPORT_SYMBOL vmlinux 0x8631f188	radix_tree_tag_set
+EXPORT_SYMBOL vmlinux 0x86521ce8	free_netdev
+EXPORT_SYMBOL vmlinux 0x865893d8	journal_try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0x865e837b	blk_queue_max_discard_sectors
+EXPORT_SYMBOL vmlinux 0x8664f62e	cpufreq_update_policy
+EXPORT_SYMBOL vmlinux 0x8667d944	insert_inode_locked
+EXPORT_SYMBOL vmlinux 0x866a7695	complete
+EXPORT_SYMBOL vmlinux 0x868acba5	get_options
+EXPORT_SYMBOL vmlinux 0x868d6276	tcf_hash_new_index
+EXPORT_SYMBOL vmlinux 0x86be43ad	inet_stream_ops
+EXPORT_SYMBOL vmlinux 0x86d38e8d	tcf_em_tree_dump
+EXPORT_SYMBOL vmlinux 0x86ec89d7	vfs_symlink
+EXPORT_SYMBOL vmlinux 0x86fb9b05	bitmap_parse_user
+EXPORT_SYMBOL vmlinux 0x86fd1e75	backlight_device_register
+EXPORT_SYMBOL vmlinux 0x8716021f	tioca_list
+EXPORT_SYMBOL vmlinux 0x871c0a7e	fiemap_check_flags
+EXPORT_SYMBOL vmlinux 0x87620616	mod_timer_pinned
+EXPORT_SYMBOL vmlinux 0x876dafc3	ec_write
+EXPORT_SYMBOL vmlinux 0x87765aec	llc_sap_open
+EXPORT_SYMBOL vmlinux 0x878ab3ce	sysctl_tcp_adv_win_scale
+EXPORT_SYMBOL vmlinux 0x879ad472	blk_queue_resize_tags
+EXPORT_SYMBOL vmlinux 0x881039d0	zlib_inflate
+EXPORT_SYMBOL vmlinux 0x881e703a	blk_queue_update_dma_alignment
+EXPORT_SYMBOL vmlinux 0x883fd946	machvec_dma_sync_single
+EXPORT_SYMBOL vmlinux 0x885b10eb	blk_peek_request
+EXPORT_SYMBOL vmlinux 0x886aa274	posix_acl_create_masq
+EXPORT_SYMBOL vmlinux 0x88871af9	__devm_request_region
+EXPORT_SYMBOL vmlinux 0x888c4167	__skb_checksum_complete
+EXPORT_SYMBOL vmlinux 0x8894115c	idr_init
+EXPORT_SYMBOL vmlinux 0x88f44191	xfrm_user_policy
+EXPORT_SYMBOL vmlinux 0x8912a979	sk_receive_skb
+EXPORT_SYMBOL vmlinux 0x894d0198	tcp_initialize_rcv_mss
+EXPORT_SYMBOL vmlinux 0x8959eda5	migrate_page
+EXPORT_SYMBOL vmlinux 0x897473df	mktime
+EXPORT_SYMBOL vmlinux 0x89d3c547	blk_queue_max_sectors
+EXPORT_SYMBOL vmlinux 0x89d5538d	fb_pad_aligned_buffer
+EXPORT_SYMBOL vmlinux 0x89d66811	build_ehash_secret
+EXPORT_SYMBOL vmlinux 0x89eb963f	__ps2_command
+EXPORT_SYMBOL vmlinux 0x89ed4fee	mempool_destroy
+EXPORT_SYMBOL vmlinux 0x89fccef2	zero_page_memmap_ptr
+EXPORT_SYMBOL vmlinux 0x8a0ba840	_spin_trylock
+EXPORT_SYMBOL vmlinux 0x8a1203a9	kref_get
+EXPORT_SYMBOL vmlinux 0x8a1733f1	dquot_alloc_inode
+EXPORT_SYMBOL vmlinux 0x8a274c1e	jbd2_journal_abort
+EXPORT_SYMBOL vmlinux 0x8a2d9054	backlight_force_update
+EXPORT_SYMBOL vmlinux 0x8a373fd7	twl4030_i2c_write
+EXPORT_SYMBOL vmlinux 0x8a407f86	matroxfb_register_driver
+EXPORT_SYMBOL vmlinux 0x8a4ff9f8	phy_connect
+EXPORT_SYMBOL vmlinux 0x8a648b43	blkdev_issue_discard
+EXPORT_SYMBOL vmlinux 0x8a7c3f4a	pci_fixup_cardbus
+EXPORT_SYMBOL vmlinux 0x8a7d1c31	high_memory
+EXPORT_SYMBOL vmlinux 0x8a99a016	mempool_free_slab
+EXPORT_SYMBOL vmlinux 0x8ac40297	iommu_area_free
+EXPORT_SYMBOL vmlinux 0x8adeda8a	_spin_lock
+EXPORT_SYMBOL vmlinux 0x8b10d319	copy_strings_kernel
+EXPORT_SYMBOL vmlinux 0x8b35e873	sg_last
+EXPORT_SYMBOL vmlinux 0x8b4f8cf7	pci_prepare_to_sleep
+EXPORT_SYMBOL vmlinux 0x8b530ba3	tcf_hash_check
+EXPORT_SYMBOL vmlinux 0x8b7fe311	kmemdup
+EXPORT_SYMBOL vmlinux 0x8b966b63	sn_rtc_cycles_per_second
+EXPORT_SYMBOL vmlinux 0x8b989cf9	acpi_bus_can_wakeup
+EXPORT_SYMBOL vmlinux 0x8ba515a8	__lock_page
+EXPORT_SYMBOL vmlinux 0x8bcd5145	compat_mc_getsockopt
+EXPORT_SYMBOL vmlinux 0x8bd5b603	param_get_long
+EXPORT_SYMBOL vmlinux 0x8bfa5b03	fb_firmware_edid
+EXPORT_SYMBOL vmlinux 0x8c097f84	d_rehash
+EXPORT_SYMBOL vmlinux 0x8c0c1613	jbd2_journal_lock_updates
+EXPORT_SYMBOL vmlinux 0x8c183cbe	iowrite16
+EXPORT_SYMBOL vmlinux 0x8c433cd2	submit_bh
+EXPORT_SYMBOL vmlinux 0x8c4909d4	deactivate_super
+EXPORT_SYMBOL vmlinux 0x8c537c45	posix_acl_from_mode
+EXPORT_SYMBOL vmlinux 0x8c6ed2e8	simple_set_mnt
+EXPORT_SYMBOL vmlinux 0x8c8d384e	pcix_set_mmrbc
+EXPORT_SYMBOL vmlinux 0x8c8de214	key_instantiate_and_link
+EXPORT_SYMBOL vmlinux 0x8c96ec35	phy_detach
+EXPORT_SYMBOL vmlinux 0x8c9a3379	tcf_register_action
+EXPORT_SYMBOL vmlinux 0x8cc79cab	iowrite16_rep
+EXPORT_SYMBOL vmlinux 0x8cef4799	llc_sap_find
+EXPORT_SYMBOL vmlinux 0x8d0f409c	netif_device_detach
+EXPORT_SYMBOL vmlinux 0x8d2d723f	ia64_pal_call_static
+EXPORT_SYMBOL vmlinux 0x8d3894f2	_ctype
+EXPORT_SYMBOL vmlinux 0x8d43854e	destroy_EII_client
+EXPORT_SYMBOL vmlinux 0x8d551bef	sysctl_tcp_rmem
+EXPORT_SYMBOL vmlinux 0x8d6a276b	completion_done
+EXPORT_SYMBOL vmlinux 0x8d888113	filemap_write_and_wait_range
+EXPORT_SYMBOL vmlinux 0x8d8d96c6	acpi_get_sleep_type_data
+EXPORT_SYMBOL vmlinux 0x8d9398ae	km_report
+EXPORT_SYMBOL vmlinux 0x8da7cecb	bio_integrity_trim
+EXPORT_SYMBOL vmlinux 0x8da8b28d	bio_add_page
+EXPORT_SYMBOL vmlinux 0x8dbae138	__rta_fill
+EXPORT_SYMBOL vmlinux 0x8dd6c48c	generic_write_end
+EXPORT_SYMBOL vmlinux 0x8dfa7ca3	tty_unregister_device
+EXPORT_SYMBOL vmlinux 0x8e002cda	acpi_remove_gpe_block
+EXPORT_SYMBOL vmlinux 0x8e0b7743	ipv6_ext_hdr
+EXPORT_SYMBOL vmlinux 0x8e21bb4b	jbd2_log_start_commit
+EXPORT_SYMBOL vmlinux 0x8e2af3fa	bio_sector_offset
+EXPORT_SYMBOL vmlinux 0x8e3679c9	tty_port_hangup
+EXPORT_SYMBOL vmlinux 0x8e3d9276	eth_rebuild_header
+EXPORT_SYMBOL vmlinux 0x8e4a7daf	register_tcf_proto_ops
+EXPORT_SYMBOL vmlinux 0x8e5c9a62	inet_csk_clear_xmit_timers
+EXPORT_SYMBOL vmlinux 0x8e6184a3	tcp_parse_options
+EXPORT_SYMBOL vmlinux 0x8e763ae1	send_remote_softirq
+EXPORT_SYMBOL vmlinux 0x8e7c49c6	tcp_v4_md5_do_add
+EXPORT_SYMBOL vmlinux 0x8e879bb7	__vmalloc
+EXPORT_SYMBOL vmlinux 0x8e90f5d3	neigh_parms_alloc
+EXPORT_SYMBOL vmlinux 0x8e973058	call_usermodehelper_setkeys
+EXPORT_SYMBOL vmlinux 0x8ea88d22	sk_stream_write_space
+EXPORT_SYMBOL vmlinux 0x8eac9f4e	i2c_bit_add_numbered_bus
+EXPORT_SYMBOL vmlinux 0x8eb313e9	task_tgid_nr_ns
+EXPORT_SYMBOL vmlinux 0x8ee69235	timeval_to_jiffies
+EXPORT_SYMBOL vmlinux 0x8ee745d9	pci_match_id
+EXPORT_SYMBOL vmlinux 0x8ef65cf5	blk_fetch_request
+EXPORT_SYMBOL vmlinux 0x8f193220	secpath_dup
+EXPORT_SYMBOL vmlinux 0x8f1cdcf6	fb_set_suspend
+EXPORT_SYMBOL vmlinux 0x8f439ea5	delayed_slow_work_enqueue
+EXPORT_SYMBOL vmlinux 0x8f48679a	rb_prev
+EXPORT_SYMBOL vmlinux 0x8f617122	default_unplug_io_fn
+EXPORT_SYMBOL vmlinux 0x8f6b7950	set_irq_data
+EXPORT_SYMBOL vmlinux 0x8fb51d4f	end_buffer_write_sync
+EXPORT_SYMBOL vmlinux 0x8fbf7294	dm_get_device
+EXPORT_SYMBOL vmlinux 0x8feb2891	vfs_link
+EXPORT_SYMBOL vmlinux 0x90035333	secure_tcpv6_sequence_number
+EXPORT_SYMBOL vmlinux 0x90052dc4	tcp_setsockopt
+EXPORT_SYMBOL vmlinux 0x900d0f3d	journal_ack_err
+EXPORT_SYMBOL vmlinux 0x901b2f41	napi_gro_flush
+EXPORT_SYMBOL vmlinux 0x903ab395	__moddi3
+EXPORT_SYMBOL vmlinux 0x904409c6	acpi_set_firmware_waking_vector
+EXPORT_SYMBOL vmlinux 0x90441ad0	bdev_read_only
+EXPORT_SYMBOL vmlinux 0x9048dd5e	ether_setup
+EXPORT_SYMBOL vmlinux 0x90527e60	bio_free
+EXPORT_SYMBOL vmlinux 0x90686935	inet_release
+EXPORT_SYMBOL vmlinux 0x90767e6c	journal_create
+EXPORT_SYMBOL vmlinux 0x909d649b	send_sig
+EXPORT_SYMBOL vmlinux 0x90a1601f	dmi_check_system
+EXPORT_SYMBOL vmlinux 0x90bc0105	cdev_del
+EXPORT_SYMBOL vmlinux 0x90c527db	inode_needs_sync
+EXPORT_SYMBOL vmlinux 0x90d5b2ea	kmem_cache_free
+EXPORT_SYMBOL vmlinux 0x90f9f7b9	module_put
+EXPORT_SYMBOL vmlinux 0x9112a76c	__nla_reserve_nohdr
+EXPORT_SYMBOL vmlinux 0x912caabf	journal_destroy
+EXPORT_SYMBOL vmlinux 0x9142f46a	kmem_cache_destroy
+EXPORT_SYMBOL vmlinux 0x9144a8e2	ec_burst_disable
+EXPORT_SYMBOL vmlinux 0x91481982	__ratelimit
+EXPORT_SYMBOL vmlinux 0x9160cb46	phy_device_create
+EXPORT_SYMBOL vmlinux 0x9169289f	pci_bus_find_capability
+EXPORT_SYMBOL vmlinux 0x91766c09	param_get_ulong
+EXPORT_SYMBOL vmlinux 0x919eefc3	unw_access_ar
+EXPORT_SYMBOL vmlinux 0x91a73df2	block_write_full_page
+EXPORT_SYMBOL vmlinux 0x91bbb74b	nf_afinfo
+EXPORT_SYMBOL vmlinux 0x91e9c64d	skb_store_bits
+EXPORT_SYMBOL vmlinux 0x92138e7f	kernel_sock_shutdown
+EXPORT_SYMBOL vmlinux 0x9214ed8a	param_get_bool
+EXPORT_SYMBOL vmlinux 0x92283434	elv_rb_latter_request
+EXPORT_SYMBOL vmlinux 0x92392cd9	iov_shorten
+EXPORT_SYMBOL vmlinux 0x9288718c	dev_getbyhwaddr
+EXPORT_SYMBOL vmlinux 0x92ca6119	seq_printf
+EXPORT_SYMBOL vmlinux 0x92de5ffc	__dev_get_by_index
+EXPORT_SYMBOL vmlinux 0x92ea4ae4	crc32_le
+EXPORT_SYMBOL vmlinux 0x9305f8e6	cpufreq_get
+EXPORT_SYMBOL vmlinux 0x93386e86	__dev_get_by_name
+EXPORT_SYMBOL vmlinux 0x93425793	simple_fill_super
+EXPORT_SYMBOL vmlinux 0x937958a6	mempool_resize
+EXPORT_SYMBOL vmlinux 0x93a6e0b2	io_schedule
+EXPORT_SYMBOL vmlinux 0x93c651be	acpi_info
+EXPORT_SYMBOL vmlinux 0x93fca811	__get_free_pages
+EXPORT_SYMBOL vmlinux 0x940182b6	fifo_create_dflt
+EXPORT_SYMBOL vmlinux 0x9448fe59	__invalidate_device
+EXPORT_SYMBOL vmlinux 0x94847b23	nf_ct_destroy
+EXPORT_SYMBOL vmlinux 0x94961283	vunmap
+EXPORT_SYMBOL vmlinux 0x949d3beb	jbd2_journal_stop
+EXPORT_SYMBOL vmlinux 0x94c0048c	init_timer_deferrable_key
+EXPORT_SYMBOL vmlinux 0x94d8fb60	tcp_recvmsg
+EXPORT_SYMBOL vmlinux 0x94d990e1	dev_unicast_unsync
+EXPORT_SYMBOL vmlinux 0x94e0a1fa	pci_request_selected_regions_exclusive
+EXPORT_SYMBOL vmlinux 0x94f18602	iput
+EXPORT_SYMBOL vmlinux 0x94f224d2	generic_file_open
+EXPORT_SYMBOL vmlinux 0x95029d85	tty_port_tty_get
+EXPORT_SYMBOL vmlinux 0x950ffff2	cpu_online_mask
+EXPORT_SYMBOL vmlinux 0x951b96c6	blk_queue_max_phys_segments
+EXPORT_SYMBOL vmlinux 0x95352ea9	acpi_check_mem_region
+EXPORT_SYMBOL vmlinux 0x954488a4	syncookie_secret
+EXPORT_SYMBOL vmlinux 0x9544d192	fasync_helper
+EXPORT_SYMBOL vmlinux 0x954cbb26	vsprintf
+EXPORT_SYMBOL vmlinux 0x9553fb5e	__mutex_init
+EXPORT_SYMBOL vmlinux 0x9560cd3f	dev_set_promiscuity
+EXPORT_SYMBOL vmlinux 0x95804161	tty_set_operations
+EXPORT_SYMBOL vmlinux 0x95851f8c	may_umount_tree
+EXPORT_SYMBOL vmlinux 0x95bbfc1b	tty_register_device
+EXPORT_SYMBOL vmlinux 0x95c2885e	misc_register
+EXPORT_SYMBOL vmlinux 0x95ceb864	key_update
+EXPORT_SYMBOL vmlinux 0x95e3a780	kernel_accept
+EXPORT_SYMBOL vmlinux 0x960686b8	mod_zone_page_state
+EXPORT_SYMBOL vmlinux 0x9646134c	del_gendisk
+EXPORT_SYMBOL vmlinux 0x967bac6f	rtnl_unicast
+EXPORT_SYMBOL vmlinux 0x967fda00	kill_pgrp
+EXPORT_SYMBOL vmlinux 0x9685ed9b	netif_napi_add
+EXPORT_SYMBOL vmlinux 0x96aacc66	skb_pull
+EXPORT_SYMBOL vmlinux 0x96d48416	tcp_proc_unregister
+EXPORT_SYMBOL vmlinux 0x9710c39f	blk_stack_limits
+EXPORT_SYMBOL vmlinux 0x971727b6	unlock_page
+EXPORT_SYMBOL vmlinux 0x97367d8c	generic_file_llseek
+EXPORT_SYMBOL vmlinux 0x974c697c	pcim_iounmap
+EXPORT_SYMBOL vmlinux 0x9754ec10	radix_tree_preload
+EXPORT_SYMBOL vmlinux 0x9773634a	kobject_del
+EXPORT_SYMBOL vmlinux 0x9773dd0c	vlan_dev_vlan_id
+EXPORT_SYMBOL vmlinux 0x9786bf57	locks_copy_lock
+EXPORT_SYMBOL vmlinux 0x978aaf2b	get_fs_type
+EXPORT_SYMBOL vmlinux 0x9795c26d	compat_mc_setsockopt
+EXPORT_SYMBOL vmlinux 0x97996f1b	sk_stream_kill_queues
+EXPORT_SYMBOL vmlinux 0x97a1776a	input_grab_device
+EXPORT_SYMBOL vmlinux 0x97a1cc9f	xfrm_register_km
+EXPORT_SYMBOL vmlinux 0x97a56aab	gen_pool_add
+EXPORT_SYMBOL vmlinux 0x97a9681e	inode_init_always
+EXPORT_SYMBOL vmlinux 0x97ad1793	skb_dma_unmap
+EXPORT_SYMBOL vmlinux 0x97bde103	input_allocate_device
+EXPORT_SYMBOL vmlinux 0x97d1cd1c	dec_zone_page_state
+EXPORT_SYMBOL vmlinux 0x97d2d1a2	register_console
+EXPORT_SYMBOL vmlinux 0x97de0ddd	acpi_install_gpe_block
+EXPORT_SYMBOL vmlinux 0x97df8450	skb_put
+EXPORT_SYMBOL vmlinux 0x981a4a60	invalidate_inode_buffers
+EXPORT_SYMBOL vmlinux 0x981f40ec	kmem_cache_shrink
+EXPORT_SYMBOL vmlinux 0x9821bcca	tty_devnum
+EXPORT_SYMBOL vmlinux 0x9827873a	generic_permission
+EXPORT_SYMBOL vmlinux 0x9843f1fc	add_to_page_cache_locked
+EXPORT_SYMBOL vmlinux 0x986e6135	fb_pad_unaligned_buffer
+EXPORT_SYMBOL vmlinux 0x9875a829	mutex_unlock
+EXPORT_SYMBOL vmlinux 0x988278d3	test_set_page_writeback
+EXPORT_SYMBOL vmlinux 0x98b91a6b	vfs_quota_on
+EXPORT_SYMBOL vmlinux 0x98c7e0bc	__getblk
+EXPORT_SYMBOL vmlinux 0x98f55431	uncached_free_page
+EXPORT_SYMBOL vmlinux 0x9910a899	d_alloc_name
+EXPORT_SYMBOL vmlinux 0x993e6e37	__next_cpu
+EXPORT_SYMBOL vmlinux 0x99428311	down_trylock
+EXPORT_SYMBOL vmlinux 0x995dd10b	ps2_handle_ack
+EXPORT_SYMBOL vmlinux 0x997dd646	journal_errno
+EXPORT_SYMBOL vmlinux 0x9994c0ca	ps2_is_keyboard_id
+EXPORT_SYMBOL vmlinux 0x999e8297	vfree
+EXPORT_SYMBOL vmlinux 0x99b9b09e	dquot_claim_space
+EXPORT_SYMBOL vmlinux 0x99bfbe39	get_unused_fd
+EXPORT_SYMBOL vmlinux 0x99c75675	dm_io_client_destroy
+EXPORT_SYMBOL vmlinux 0x99c7a8b8	jbd2_dev_to_name
+EXPORT_SYMBOL vmlinux 0x99c91df9	bio_integrity_prep
+EXPORT_SYMBOL vmlinux 0x99cdc86b	sysctl_tcp_reordering
+EXPORT_SYMBOL vmlinux 0x99d296d1	tty_kref_put
+EXPORT_SYMBOL vmlinux 0x99ea12ce	panic_blink
+EXPORT_SYMBOL vmlinux 0x9a19db20	down_interruptible
+EXPORT_SYMBOL vmlinux 0x9a1dfd65	strpbrk
+EXPORT_SYMBOL vmlinux 0x9a310a80	acpi_enter_sleep_state_s4bios
+EXPORT_SYMBOL vmlinux 0x9a5b0f7e	pci_get_slot
+EXPORT_SYMBOL vmlinux 0x9a5c64af	pci_set_dma_mask
+EXPORT_SYMBOL vmlinux 0x9a65e56b	init_buffer
+EXPORT_SYMBOL vmlinux 0x9a6ec726	swiotlb_sync_sg_for_device
+EXPORT_SYMBOL vmlinux 0x9a79131d	xfrm_unregister_km
+EXPORT_SYMBOL vmlinux 0x9a81448b	devm_iounmap
+EXPORT_SYMBOL vmlinux 0x9a9ded9f	override_creds
+EXPORT_SYMBOL vmlinux 0x9aabc564	crc16
+EXPORT_SYMBOL vmlinux 0x9abf5303	dma_pool_create
+EXPORT_SYMBOL vmlinux 0x9abfb6dd	max_low_pfn
+EXPORT_SYMBOL vmlinux 0x9ad697ec	ip_route_input
+EXPORT_SYMBOL vmlinux 0x9b02c91e	inet_frag_find
+EXPORT_SYMBOL vmlinux 0x9b089cc2	_write_lock
+EXPORT_SYMBOL vmlinux 0x9b13aba5	pci_request_region_exclusive
+EXPORT_SYMBOL vmlinux 0x9b1c9ea8	slow_work_enqueue
+EXPORT_SYMBOL vmlinux 0x9b388444	get_zeroed_page
+EXPORT_SYMBOL vmlinux 0x9b3a78f7	dev_get_by_name
+EXPORT_SYMBOL vmlinux 0x9b4480ad	blk_unplug
+EXPORT_SYMBOL vmlinux 0x9b586978	free_task
+EXPORT_SYMBOL vmlinux 0x9b5a7679	tty_write_room
+EXPORT_SYMBOL vmlinux 0x9b62741e	seq_write
+EXPORT_SYMBOL vmlinux 0x9b6433c6	bio_split
+EXPORT_SYMBOL vmlinux 0x9b80fe79	fd_install
+EXPORT_SYMBOL vmlinux 0x9b957567	tr_type_trans
+EXPORT_SYMBOL vmlinux 0x9ba7089d	argv_split
+EXPORT_SYMBOL vmlinux 0x9bac4bd1	bdi_register_dev
+EXPORT_SYMBOL vmlinux 0x9baf0405	blk_put_request
+EXPORT_SYMBOL vmlinux 0x9be42e50	security_inode_init_security
+EXPORT_SYMBOL vmlinux 0x9bed833b	nf_hook_slow
+EXPORT_SYMBOL vmlinux 0x9c012508	fb_parse_edid
+EXPORT_SYMBOL vmlinux 0x9c0ea3cd	memscan
+EXPORT_SYMBOL vmlinux 0x9c35661a	complete_request_key
+EXPORT_SYMBOL vmlinux 0x9c382170	tcf_hash_insert
+EXPORT_SYMBOL vmlinux 0x9c491f60	sg_alloc_table
+EXPORT_SYMBOL vmlinux 0x9ca95a0e	sort
+EXPORT_SYMBOL vmlinux 0x9cb96e92	qdisc_put_rtab
+EXPORT_SYMBOL vmlinux 0x9cc3b0d4	seq_release_private
+EXPORT_SYMBOL vmlinux 0x9cf43aeb	redirty_page_for_writepage
+EXPORT_SYMBOL vmlinux 0x9d0e8bac	xfrm_policy_bysel_ctx
+EXPORT_SYMBOL vmlinux 0x9d236565	acpi_device_hid
+EXPORT_SYMBOL vmlinux 0x9d33ef5e	acpi_enable
+EXPORT_SYMBOL vmlinux 0x9d3aa376	blk_iopoll_init
+EXPORT_SYMBOL vmlinux 0x9d4974cb	remove_inode_hash
+EXPORT_SYMBOL vmlinux 0x9d53c862	input_release_device
+EXPORT_SYMBOL vmlinux 0x9d98aaea	blk_rq_init
+EXPORT_SYMBOL vmlinux 0x9db21624	hex_dump_to_buffer
+EXPORT_SYMBOL vmlinux 0x9dc13f17	pci_remove_bus
+EXPORT_SYMBOL vmlinux 0x9e363b6b	acpi_disable_gpe
+EXPORT_SYMBOL vmlinux 0x9e4405e7	vc_cons
+EXPORT_SYMBOL vmlinux 0x9e68a2aa	jbd2_log_wait_commit
+EXPORT_SYMBOL vmlinux 0x9e73b7bc	clear_page_dirty_for_io
+EXPORT_SYMBOL vmlinux 0x9e8b8544	blk_plug_device_unlocked
+EXPORT_SYMBOL vmlinux 0x9e9ef1a9	ip_nat_decode_session
+EXPORT_SYMBOL vmlinux 0x9e9f1714	__bitmap_andnot
+EXPORT_SYMBOL vmlinux 0x9ea0ad49	__sg_free_table
+EXPORT_SYMBOL vmlinux 0x9ea28ec7	acpi_evaluate_object
+EXPORT_SYMBOL vmlinux 0x9ebd4c04	adjust_resource
+EXPORT_SYMBOL vmlinux 0x9edbecae	snprintf
+EXPORT_SYMBOL vmlinux 0x9eecde16	do_brk
+EXPORT_SYMBOL vmlinux 0x9eee23de	read_cache_pages
+EXPORT_SYMBOL vmlinux 0x9f100139	jiffies_to_clock_t
+EXPORT_SYMBOL vmlinux 0x9f1b11d7	tcf_destroy_chain
+EXPORT_SYMBOL vmlinux 0x9f2bdaac	__bitmap_or
+EXPORT_SYMBOL vmlinux 0x9f2d613e	param_set_bool
+EXPORT_SYMBOL vmlinux 0x9f3b29fa	down_timeout
+EXPORT_SYMBOL vmlinux 0x9f499b80	find_get_page
+EXPORT_SYMBOL vmlinux 0x9f7cbcaf	alloc_hippi_dev
+EXPORT_SYMBOL vmlinux 0x9f984513	strrchr
+EXPORT_SYMBOL vmlinux 0x9fab4520	inet_addr_type
+EXPORT_SYMBOL vmlinux 0x9fdba446	fib_default_rule_add
+EXPORT_SYMBOL vmlinux 0xa03523d5	security_unix_stream_connect
+EXPORT_SYMBOL vmlinux 0xa04a01bd	qdisc_class_hash_insert
+EXPORT_SYMBOL vmlinux 0xa04e14ce	kernel_getpeername
+EXPORT_SYMBOL vmlinux 0xa05c03df	mempool_kmalloc
+EXPORT_SYMBOL vmlinux 0xa089e047	inet_sendmsg
+EXPORT_SYMBOL vmlinux 0xa0ac7e9b	tcp_sendmsg
+EXPORT_SYMBOL vmlinux 0xa0b04675	vmalloc_32
+EXPORT_SYMBOL vmlinux 0xa0b627fa	security_file_permission
+EXPORT_SYMBOL vmlinux 0xa0c74c89	percpu_counter_destroy
+EXPORT_SYMBOL vmlinux 0xa0ceef51	out_of_line_wait_on_bit
+EXPORT_SYMBOL vmlinux 0xa0d3d560	ksize
+EXPORT_SYMBOL vmlinux 0xa0e55d1f	pid_task
+EXPORT_SYMBOL vmlinux 0xa0ee7054	skb_checksum_help
+EXPORT_SYMBOL vmlinux 0xa0fbac79	wake_up_bit
+EXPORT_SYMBOL vmlinux 0xa108eb4d	sysctl_optmem_max
+EXPORT_SYMBOL vmlinux 0xa11fac34	uncached_alloc_page
+EXPORT_SYMBOL vmlinux 0xa120d33c	tty_unregister_ldisc
+EXPORT_SYMBOL vmlinux 0xa13798f8	printk_ratelimit
+EXPORT_SYMBOL vmlinux 0xa15ea19b	swiotlb_sync_single_for_cpu
+EXPORT_SYMBOL vmlinux 0xa1649c85	skb_copy_datagram_iovec
+EXPORT_SYMBOL vmlinux 0xa1921598	rtnl_notify
+EXPORT_SYMBOL vmlinux 0xa1b759ce	fb_add_videomode
+EXPORT_SYMBOL vmlinux 0xa1ba4b95	memcpy_fromiovecend
+EXPORT_SYMBOL vmlinux 0xa1c76e0a	_cond_resched
+EXPORT_SYMBOL vmlinux 0xa1ce1b29	netlink_ack
+EXPORT_SYMBOL vmlinux 0xa1cea0b8	proc_dointvec
+EXPORT_SYMBOL vmlinux 0xa1d2934d	sn_hwperf_get_nearest_node
+EXPORT_SYMBOL vmlinux 0xa1da0922	__napi_schedule
+EXPORT_SYMBOL vmlinux 0xa1f78eb4	llc_mac_hdr_init
+EXPORT_SYMBOL vmlinux 0xa20ce1b8	net_msg_warn
+EXPORT_SYMBOL vmlinux 0xa234226a	netdev_rx_csum_fault
+EXPORT_SYMBOL vmlinux 0xa239506a	put_tty_driver
+EXPORT_SYMBOL vmlinux 0xa23fec86	ip_route_me_harder
+EXPORT_SYMBOL vmlinux 0xa245944a	__locks_copy_lock
+EXPORT_SYMBOL vmlinux 0xa2755c7b	fpswa_interface
+EXPORT_SYMBOL vmlinux 0xa28e76e6	schedule_work
+EXPORT_SYMBOL vmlinux 0xa29232d0	get_empty_filp
+EXPORT_SYMBOL vmlinux 0xa29b1708	tcp_memory_allocated
+EXPORT_SYMBOL vmlinux 0xa2a5fd77	inet_ehash_secret
+EXPORT_SYMBOL vmlinux 0xa2ccc7cb	jbd2_journal_release_jbd_inode
+EXPORT_SYMBOL vmlinux 0xa2e1aadb	end_buffer_async_write
+EXPORT_SYMBOL vmlinux 0xa2e5ef2e	ip_mc_join_group
+EXPORT_SYMBOL vmlinux 0xa2f24785	machvec_timer_interrupt
+EXPORT_SYMBOL vmlinux 0xa303135f	vfs_create
+EXPORT_SYMBOL vmlinux 0xa329adfc	dev_driver_string
+EXPORT_SYMBOL vmlinux 0xa329f07e	register_shrinker
+EXPORT_SYMBOL vmlinux 0xa32a90f7	con_set_default_unimap
+EXPORT_SYMBOL vmlinux 0xa332cdd1	security_tun_dev_attach
+EXPORT_SYMBOL vmlinux 0xa33f7c7c	nla_strlcpy
+EXPORT_SYMBOL vmlinux 0xa35de80f	ipv4_config
+EXPORT_SYMBOL vmlinux 0xa36f89aa	eth_header_cache
+EXPORT_SYMBOL vmlinux 0xa380c003	__netdev_alloc_page
+EXPORT_SYMBOL vmlinux 0xa39b4cf2	udelay
+EXPORT_SYMBOL vmlinux 0xa39f308b	set_device_ro
+EXPORT_SYMBOL vmlinux 0xa3bbcd80	acpi_set_gpe_type
+EXPORT_SYMBOL vmlinux 0xa3c1928f	kernel_setsockopt
+EXPORT_SYMBOL vmlinux 0xa40ad81c	ipv4_specific
+EXPORT_SYMBOL vmlinux 0xa40d48fa	ps2_sendbyte
+EXPORT_SYMBOL vmlinux 0xa41be86e	nonseekable_open
+EXPORT_SYMBOL vmlinux 0xa431e1bb	vga_set_legacy_decoding
+EXPORT_SYMBOL vmlinux 0xa44fffc1	schedule
+EXPORT_SYMBOL vmlinux 0xa4511ada	end_page_writeback
+EXPORT_SYMBOL vmlinux 0xa45f65f3	nf_register_sockopt
+EXPORT_SYMBOL vmlinux 0xa46ff180	security_path_mknod
+EXPORT_SYMBOL vmlinux 0xa4b94fea	iowrite8_rep
+EXPORT_SYMBOL vmlinux 0xa4c11355	pci_vpd_truncate
+EXPORT_SYMBOL vmlinux 0xa4c243e1	shrink_dcache_sb
+EXPORT_SYMBOL vmlinux 0xa4f5982d	__kfifo_put
+EXPORT_SYMBOL vmlinux 0xa521acf5	DAC1064_global_init
+EXPORT_SYMBOL vmlinux 0xa527d3a8	skb_split
+EXPORT_SYMBOL vmlinux 0xa562d183	bio_integrity_endio
+EXPORT_SYMBOL vmlinux 0xa57003b0	bit_waitqueue
+EXPORT_SYMBOL vmlinux 0xa5808bbf	tasklet_init
+EXPORT_SYMBOL vmlinux 0xa58b6804	nla_parse
+EXPORT_SYMBOL vmlinux 0xa598e29c	vesa_modes
+EXPORT_SYMBOL vmlinux 0xa5a1a444	pci_assign_resource
+EXPORT_SYMBOL vmlinux 0xa5cb816f	journal_init_dev
+EXPORT_SYMBOL vmlinux 0xa5cebfed	dev_base_lock
+EXPORT_SYMBOL vmlinux 0xa5db7043	pcim_enable_device
+EXPORT_SYMBOL vmlinux 0xa5f02070	filemap_fdatawait
+EXPORT_SYMBOL vmlinux 0xa5f3993d	blk_end_request
+EXPORT_SYMBOL vmlinux 0xa5faba0d	mempool_alloc
+EXPORT_SYMBOL vmlinux 0xa614f0db	pnp_request_card_device
+EXPORT_SYMBOL vmlinux 0xa62fa221	lro_flush_all
+EXPORT_SYMBOL vmlinux 0xa6358294	devm_ioport_unmap
+EXPORT_SYMBOL vmlinux 0xa63dd16c	skb_copy_datagram_from_iovec
+EXPORT_SYMBOL vmlinux 0xa681fe88	generate_random_uuid
+EXPORT_SYMBOL vmlinux 0xa6c62886	nf_register_hooks
+EXPORT_SYMBOL vmlinux 0xa6c6a0db	napi_reuse_skb
+EXPORT_SYMBOL vmlinux 0xa6dcc773	rb_insert_color
+EXPORT_SYMBOL vmlinux 0xa6ffb267	put_page
+EXPORT_SYMBOL vmlinux 0xa70da7e6	ps2_init
+EXPORT_SYMBOL vmlinux 0xa7175364	init_net
+EXPORT_SYMBOL vmlinux 0xa72a0f5b	nr_online_nodes
+EXPORT_SYMBOL vmlinux 0xa7414fae	seq_bitmap
+EXPORT_SYMBOL vmlinux 0xa75b2363	__first_cpu
+EXPORT_SYMBOL vmlinux 0xa7608269	skb_copy_bits
+EXPORT_SYMBOL vmlinux 0xa79bff2d	hpage_shift
+EXPORT_SYMBOL vmlinux 0xa7b9e5b2	inet_unregister_protosw
+EXPORT_SYMBOL vmlinux 0xa800ea54	textsearch_unregister
+EXPORT_SYMBOL vmlinux 0xa821427b	dev_trans_start
+EXPORT_SYMBOL vmlinux 0xa823f217	fddi_change_mtu
+EXPORT_SYMBOL vmlinux 0xa82f9563	matrox_G100
+EXPORT_SYMBOL vmlinux 0xa84f6b1b	__any_online_cpu
+EXPORT_SYMBOL vmlinux 0xa8518e2f	generic_read_dir
+EXPORT_SYMBOL vmlinux 0xa886a958	krealloc
+EXPORT_SYMBOL vmlinux 0xa88a02f5	elv_rb_former_request
+EXPORT_SYMBOL vmlinux 0xa895f2e9	skb_trim
+EXPORT_SYMBOL vmlinux 0xa8a6f639	__check_region
+EXPORT_SYMBOL vmlinux 0xa8b8e355	vfs_read
+EXPORT_SYMBOL vmlinux 0xa8d68abd	acpi_warning
+EXPORT_SYMBOL vmlinux 0xa8f77ad3	tcf_action_dump_1
+EXPORT_SYMBOL vmlinux 0xa8fef7bb	security_unix_may_send
+EXPORT_SYMBOL vmlinux 0xa908a9e0	skb_gro_reset_offset
+EXPORT_SYMBOL vmlinux 0xa913bc70	iw_handler_set_thrspy
+EXPORT_SYMBOL vmlinux 0xa9435c95	compat_ip_setsockopt
+EXPORT_SYMBOL vmlinux 0xa94bff30	simple_sync_file
+EXPORT_SYMBOL vmlinux 0xa94e1d1d	wait_on_sync_kiocb
+EXPORT_SYMBOL vmlinux 0xa967669c	vfs_quota_on_mount
+EXPORT_SYMBOL vmlinux 0xaa1aabfc	__serio_register_port
+EXPORT_SYMBOL vmlinux 0xaa36831d	jbd2_journal_errno
+EXPORT_SYMBOL vmlinux 0xaace1a11	take_over_console
+EXPORT_SYMBOL vmlinux 0xaae8ab0e	acpi_bus_power_manageable
+EXPORT_SYMBOL vmlinux 0xaafdc258	strcasecmp
+EXPORT_SYMBOL vmlinux 0xab06d024	inet_register_protosw
+EXPORT_SYMBOL vmlinux 0xab0bd492	compat_tcp_getsockopt
+EXPORT_SYMBOL vmlinux 0xab162b36	journal_start_commit
+EXPORT_SYMBOL vmlinux 0xab33e2b3	__blk_run_queue
+EXPORT_SYMBOL vmlinux 0xab3b3452	nobh_write_end
+EXPORT_SYMBOL vmlinux 0xab600421	probe_irq_off
+EXPORT_SYMBOL vmlinux 0xaba9ff34	allocate_resource
+EXPORT_SYMBOL vmlinux 0xabadaf52	cdev_alloc
+EXPORT_SYMBOL vmlinux 0xabb35812	bio_alloc_bioset
+EXPORT_SYMBOL vmlinux 0xabb8a8f1	udp_lib_unhash
+EXPORT_SYMBOL vmlinux 0xabd0c91c	rtc_time_to_tm
+EXPORT_SYMBOL vmlinux 0xabd8e427	matroxfb_var2my
+EXPORT_SYMBOL vmlinux 0xabe23450	idr_get_new
+EXPORT_SYMBOL vmlinux 0xabe39d31	cad_pid
+EXPORT_SYMBOL vmlinux 0xabee18ee	netif_carrier_on
+EXPORT_SYMBOL vmlinux 0xac0372cd	sock_no_accept
+EXPORT_SYMBOL vmlinux 0xac0833fd	pnp_unregister_card_driver
+EXPORT_SYMBOL vmlinux 0xac0ba8c1	blk_iopoll_disable
+EXPORT_SYMBOL vmlinux 0xac0e253c	jbd2_journal_revoke
+EXPORT_SYMBOL vmlinux 0xac1d2ca1	sync_inodes_sb
+EXPORT_SYMBOL vmlinux 0xac2f7c40	directly_mappable_cdev_bdi
+EXPORT_SYMBOL vmlinux 0xac383451	radix_tree_tag_clear
+EXPORT_SYMBOL vmlinux 0xac58ea5e	acpi_unload_table_id
+EXPORT_SYMBOL vmlinux 0xac6855b0	gen_kill_estimator
+EXPORT_SYMBOL vmlinux 0xac812950	sn_send_IPI_phys
+EXPORT_SYMBOL vmlinux 0xac85bd0c	netlink_dump_start
+EXPORT_SYMBOL vmlinux 0xac87584b	matrox_millennium
+EXPORT_SYMBOL vmlinux 0xacb6816b	phy_print_status
+EXPORT_SYMBOL vmlinux 0xaccabc6a	in4_pton
+EXPORT_SYMBOL vmlinux 0xacce3fd0	tcp_v4_do_rcv
+EXPORT_SYMBOL vmlinux 0xacdab7c5	blk_queue_io_min
+EXPORT_SYMBOL vmlinux 0xace24004	tcf_action_exec
+EXPORT_SYMBOL vmlinux 0xacf4d843	match_strdup
+EXPORT_SYMBOL vmlinux 0xacf6df3a	neigh_lookup_nodev
+EXPORT_SYMBOL vmlinux 0xad0413d4	match_hex
+EXPORT_SYMBOL vmlinux 0xad13c689	acpi_os_execute
+EXPORT_SYMBOL vmlinux 0xad4767f0	pci_bus_read_config_byte
+EXPORT_SYMBOL vmlinux 0xad8a2683	phy_driver_unregister
+EXPORT_SYMBOL vmlinux 0xad8de1b3	acpi_remove_address_space_handler
+EXPORT_SYMBOL vmlinux 0xadaa2657	cpufreq_register_notifier
+EXPORT_SYMBOL vmlinux 0xadaf7574	acpi_lock_battery_dir
+EXPORT_SYMBOL vmlinux 0xadfde17d	neigh_compat_output
+EXPORT_SYMBOL vmlinux 0xae13f703	wait_for_completion_interruptible_timeout
+EXPORT_SYMBOL vmlinux 0xae1a9bb1	inet_csk_accept
+EXPORT_SYMBOL vmlinux 0xae4a1bda	csum_tcpudp_nofold
+EXPORT_SYMBOL vmlinux 0xae4a5b24	phy_start
+EXPORT_SYMBOL vmlinux 0xae649140	_spin_trylock_bh
+EXPORT_SYMBOL vmlinux 0xae76d81b	bioset_integrity_free
+EXPORT_SYMBOL vmlinux 0xae87ba31	security_path_mkdir
+EXPORT_SYMBOL vmlinux 0xaeb6739a	bdi_init
+EXPORT_SYMBOL vmlinux 0xaecf64c0	vfs_rmdir
+EXPORT_SYMBOL vmlinux 0xaed013b9	posix_acl_valid
+EXPORT_SYMBOL vmlinux 0xaedb5da6	netpoll_parse_options
+EXPORT_SYMBOL vmlinux 0xaeed71e6	__tcf_em_tree_match
+EXPORT_SYMBOL vmlinux 0xaef22b65	blk_get_backing_dev_info
+EXPORT_SYMBOL vmlinux 0xaf48b696	register_quota_format
+EXPORT_SYMBOL vmlinux 0xaf6209f6	get_unmapped_area_prot
+EXPORT_SYMBOL vmlinux 0xaf6bbc60	machvec_setup
+EXPORT_SYMBOL vmlinux 0xaf6bc37a	__pci_register_driver
+EXPORT_SYMBOL vmlinux 0xaf777c17	dev_set_mac_address
+EXPORT_SYMBOL vmlinux 0xaf7ae892	jbd2_journal_dirty_metadata
+EXPORT_SYMBOL vmlinux 0xaf907da2	gnet_stats_start_copy_compat
+EXPORT_SYMBOL vmlinux 0xaf9cdf92	unlock_buffer
+EXPORT_SYMBOL vmlinux 0xafe82e10	strcspn
+EXPORT_SYMBOL vmlinux 0xafeac35e	unregister_tcf_proto_ops
+EXPORT_SYMBOL vmlinux 0xafee00c5	elv_queue_empty
+EXPORT_SYMBOL vmlinux 0xaff4b47d	blk_queue_alignment_offset
+EXPORT_SYMBOL vmlinux 0xb0057d79	input_register_handle
+EXPORT_SYMBOL vmlinux 0xb00ef5ac	proc_doulongvec_ms_jiffies_minmax
+EXPORT_SYMBOL vmlinux 0xb02d9b18	blk_queue_softirq_done
+EXPORT_SYMBOL vmlinux 0xb03e3b9d	rtnl_set_sk_err
+EXPORT_SYMBOL vmlinux 0xb03e6332	generic_readlink
+EXPORT_SYMBOL vmlinux 0xb0499b5b	tcf_exts_destroy
+EXPORT_SYMBOL vmlinux 0xb0518b49	arp_send
+EXPORT_SYMBOL vmlinux 0xb055d8da	posix_acl_to_xattr
+EXPORT_SYMBOL vmlinux 0xb05e4688	nf_setsockopt
+EXPORT_SYMBOL vmlinux 0xb06d81b4	ia64_reg_MCA_extension
+EXPORT_SYMBOL vmlinux 0xb07dfb3d	acpi_remove_gpe_handler
+EXPORT_SYMBOL vmlinux 0xb089c8af	xfrm_unregister_mode
+EXPORT_SYMBOL vmlinux 0xb0946ac2	vlan_gro_frags
+EXPORT_SYMBOL vmlinux 0xb099297e	register_gifconf
+EXPORT_SYMBOL vmlinux 0xb0a47660	blk_run_queue
+EXPORT_SYMBOL vmlinux 0xb0b847ac	__bitmap_full
+EXPORT_SYMBOL vmlinux 0xb0c80996	dst_destroy
+EXPORT_SYMBOL vmlinux 0xb0d77e2e	phy_sanitize_settings
+EXPORT_SYMBOL vmlinux 0xb0e10781	get_option
+EXPORT_SYMBOL vmlinux 0xb1155d64	inode_add_bytes
+EXPORT_SYMBOL vmlinux 0xb11fa1ce	strlcat
+EXPORT_SYMBOL vmlinux 0xb121390a	probe_irq_on
+EXPORT_SYMBOL vmlinux 0xb12b00da	eth_type_trans
+EXPORT_SYMBOL vmlinux 0xb1645a2e	sg_free_table
+EXPORT_SYMBOL vmlinux 0xb18e02c3	radix_tree_gang_lookup_tag
+EXPORT_SYMBOL vmlinux 0xb19760c3	bitmap_onto
+EXPORT_SYMBOL vmlinux 0xb1a91683	blk_queue_physical_block_size
+EXPORT_SYMBOL vmlinux 0xb1c3a01a	oops_in_progress
+EXPORT_SYMBOL vmlinux 0xb1f2816f	sb_set_blocksize
+EXPORT_SYMBOL vmlinux 0xb1f32d3d	ia64_max_iommu_merge_mask
+EXPORT_SYMBOL vmlinux 0xb1f975aa	unlock_kernel
+EXPORT_SYMBOL vmlinux 0xb20605ad	xfrm_init_state
+EXPORT_SYMBOL vmlinux 0xb2064692	__netif_schedule
+EXPORT_SYMBOL vmlinux 0xb20ecf88	acpi_run_osc
+EXPORT_SYMBOL vmlinux 0xb219bf03	jbd2_journal_destroy
+EXPORT_SYMBOL vmlinux 0xb21bcfd2	dquot_destroy
+EXPORT_SYMBOL vmlinux 0xb2236107	flush_tlb_range
+EXPORT_SYMBOL vmlinux 0xb224fbe2	param_get_short
+EXPORT_SYMBOL vmlinux 0xb22fe6a3	netdev_increment_features
+EXPORT_SYMBOL vmlinux 0xb23584e0	blk_execute_rq
+EXPORT_SYMBOL vmlinux 0xb23a612d	blk_rq_map_user_iov
+EXPORT_SYMBOL vmlinux 0xb249c669	put_io_context
+EXPORT_SYMBOL vmlinux 0xb2682405	utf8_to_utf32
+EXPORT_SYMBOL vmlinux 0xb27b12da	sn_partition_id
+EXPORT_SYMBOL vmlinux 0xb2c0352c	tcf_hash_release
+EXPORT_SYMBOL vmlinux 0xb2c078b9	register_key_type
+EXPORT_SYMBOL vmlinux 0xb2ef0ef7	__generic_block_fiemap
+EXPORT_SYMBOL vmlinux 0xb309f003	skb_recv_datagram
+EXPORT_SYMBOL vmlinux 0xb30c96c2	simple_rmdir
+EXPORT_SYMBOL vmlinux 0xb31f2e3e	dm_table_get_mode
+EXPORT_SYMBOL vmlinux 0xb3284531	acpi_dbg_layer
+EXPORT_SYMBOL vmlinux 0xb3352e0f	sn_io_slot_fixup
+EXPORT_SYMBOL vmlinux 0xb33df839	i2c_master_send
+EXPORT_SYMBOL vmlinux 0xb34d4c2e	acpi_terminate
+EXPORT_SYMBOL vmlinux 0xb36168a9	ia64_mv
+EXPORT_SYMBOL vmlinux 0xb3a307c6	si_meminfo
+EXPORT_SYMBOL vmlinux 0xb3c5185b	journal_update_format
+EXPORT_SYMBOL vmlinux 0xb3d78047	neigh_resolve_output
+EXPORT_SYMBOL vmlinux 0xb3e49ffc	inet_shutdown
+EXPORT_SYMBOL vmlinux 0xb3ff1f69	free_pages_exact
+EXPORT_SYMBOL vmlinux 0xb402007c	sock_common_getsockopt
+EXPORT_SYMBOL vmlinux 0xb423dba1	console_blanked
+EXPORT_SYMBOL vmlinux 0xb42453d3	param_get_invbool
+EXPORT_SYMBOL vmlinux 0xb42c62c3	tcp_sockets_allocated
+EXPORT_SYMBOL vmlinux 0xb42dcdcb	phy_scan_fixups
+EXPORT_SYMBOL vmlinux 0xb45583c5	follow_pfn
+EXPORT_SYMBOL vmlinux 0xb471b325	dev_addr_add_multiple
+EXPORT_SYMBOL vmlinux 0xb47f5519	neigh_update
+EXPORT_SYMBOL vmlinux 0xb4964308	gen_pool_create
+EXPORT_SYMBOL vmlinux 0xb4b16791	sock_no_getname
+EXPORT_SYMBOL vmlinux 0xb4c2afa5	rwsem_down_write_failed
+EXPORT_SYMBOL vmlinux 0xb4c3f906	iov_iter_copy_from_user
+EXPORT_SYMBOL vmlinux 0xb4e875f9	dquot_free_inode
+EXPORT_SYMBOL vmlinux 0xb4eba325	arp_tbl
+EXPORT_SYMBOL vmlinux 0xb500b936	ip_generic_getfrag
+EXPORT_SYMBOL vmlinux 0xb5044271	vsscanf
+EXPORT_SYMBOL vmlinux 0xb5142186	audit_log_start
+EXPORT_SYMBOL vmlinux 0xb5211157	blk_queue_bounce
+EXPORT_SYMBOL vmlinux 0xb521f50b	find_or_create_page
+EXPORT_SYMBOL vmlinux 0xb5424cb4	set_create_files_as
+EXPORT_SYMBOL vmlinux 0xb54533f7	usecs_to_jiffies
+EXPORT_SYMBOL vmlinux 0xb54fedd0	dev_disable_lro
+EXPORT_SYMBOL vmlinux 0xb5529be7	pipe_unlock
+EXPORT_SYMBOL vmlinux 0xb5600f3b	nla_reserve_nohdr
+EXPORT_SYMBOL vmlinux 0xb5935563	fsync_bdev
+EXPORT_SYMBOL vmlinux 0xb5a459dc	unregister_blkdev
+EXPORT_SYMBOL vmlinux 0xb5c41d22	slow_work_cancel
+EXPORT_SYMBOL vmlinux 0xb5d52c27	ec_transaction
+EXPORT_SYMBOL vmlinux 0xb5e48e92	__kfifo_get
+EXPORT_SYMBOL vmlinux 0xb5fa504a	mdiobus_read
+EXPORT_SYMBOL vmlinux 0xb6244511	sg_init_one
+EXPORT_SYMBOL vmlinux 0xb6452f22	journal_restart
+EXPORT_SYMBOL vmlinux 0xb66445a3	finish_wait
+EXPORT_SYMBOL vmlinux 0xb665e703	nf_unregister_queue_handler
+EXPORT_SYMBOL vmlinux 0xb678366f	int_sqrt
+EXPORT_SYMBOL vmlinux 0xb683b942	vga_client_register
+EXPORT_SYMBOL vmlinux 0xb68d0ee1	vfs_mknod
+EXPORT_SYMBOL vmlinux 0xb6a476a2	wait_for_completion_killable
+EXPORT_SYMBOL vmlinux 0xb6a61a86	qdisc_get_rtab
+EXPORT_SYMBOL vmlinux 0xb6a68816	find_last_bit
+EXPORT_SYMBOL vmlinux 0xb6bffb99	kstat_irqs_cpu
+EXPORT_SYMBOL vmlinux 0xb6cbe886	acpi_get_node
+EXPORT_SYMBOL vmlinux 0xb7179b7c	filemap_fdatawrite_range
+EXPORT_SYMBOL vmlinux 0xb7316cf0	acpi_bus_register_driver
+EXPORT_SYMBOL vmlinux 0xb73a721e	netdev_boot_setup_check
+EXPORT_SYMBOL vmlinux 0xb758b225	acpi_disable_event
+EXPORT_SYMBOL vmlinux 0xb762ac6e	sock_kfree_s
+EXPORT_SYMBOL vmlinux 0xb78f5b07	release_firmware
+EXPORT_SYMBOL vmlinux 0xb797371a	mb_cache_entry_free
+EXPORT_SYMBOL vmlinux 0xb798b8e4	flow_cache_lookup
+EXPORT_SYMBOL vmlinux 0xb79af110	journal_force_commit_nested
+EXPORT_SYMBOL vmlinux 0xb7c4f38f	up_write
+EXPORT_SYMBOL vmlinux 0xb7ccb3c7	twl4030_i2c_read_u8
+EXPORT_SYMBOL vmlinux 0xb7d20554	tty_port_raise_dtr_rts
+EXPORT_SYMBOL vmlinux 0xb7d411d5	kern_mem_attribute
+EXPORT_SYMBOL vmlinux 0xb7ddcfec	ps2_cmd_aborted
+EXPORT_SYMBOL vmlinux 0xb7f7f3b6	inet_accept
+EXPORT_SYMBOL vmlinux 0xb813ce5a	timecompare_transform
+EXPORT_SYMBOL vmlinux 0xb81404fd	tcp_gro_complete
+EXPORT_SYMBOL vmlinux 0xb8252306	phy_start_interrupts
+EXPORT_SYMBOL vmlinux 0xb82de801	input_flush_device
+EXPORT_SYMBOL vmlinux 0xb846f650	no_llseek
+EXPORT_SYMBOL vmlinux 0xb84a263f	splice_from_pipe_feed
+EXPORT_SYMBOL vmlinux 0xb84abfee	bdi_register
+EXPORT_SYMBOL vmlinux 0xb853ef87	xfrm_register_type
+EXPORT_SYMBOL vmlinux 0xb86dfe3c	key_put
+EXPORT_SYMBOL vmlinux 0xb86e4ab9	random32
+EXPORT_SYMBOL vmlinux 0xb89af9bf	srandom32
+EXPORT_SYMBOL vmlinux 0xb8a5def8	mark_buffer_dirty_inode
+EXPORT_SYMBOL vmlinux 0xb8a78af7	dev_queue_xmit
+EXPORT_SYMBOL vmlinux 0xb8abf1a0	genphy_read_status
+EXPORT_SYMBOL vmlinux 0xb918f893	register_netdev
+EXPORT_SYMBOL vmlinux 0xb9446042	_read_unlock_irqrestore
+EXPORT_SYMBOL vmlinux 0xb957c62f	bio_integrity_get_tag
+EXPORT_SYMBOL vmlinux 0xb965d4e4	ilookup5
+EXPORT_SYMBOL vmlinux 0xb96b5902	nf_reinject
+EXPORT_SYMBOL vmlinux 0xb974acdb	block_is_partially_uptodate
+EXPORT_SYMBOL vmlinux 0xb98a0185	rtc_tm_to_time
+EXPORT_SYMBOL vmlinux 0xb9990d72	open_by_devnum
+EXPORT_SYMBOL vmlinux 0xb9cbd8f6	acpi_notifier_call_chain
+EXPORT_SYMBOL vmlinux 0xb9f02c50	simple_transaction_release
+EXPORT_SYMBOL vmlinux 0xba073134	put_mnt_ns
+EXPORT_SYMBOL vmlinux 0xba0b8f36	dev_kfree_skb_irq
+EXPORT_SYMBOL vmlinux 0xba0f1b4a	pci_restore_state
+EXPORT_SYMBOL vmlinux 0xba18e85d	xfrm_state_update
+EXPORT_SYMBOL vmlinux 0xba2720ca	inode_claim_rsv_space
+EXPORT_SYMBOL vmlinux 0xba2d8594	ec_read
+EXPORT_SYMBOL vmlinux 0xba3da36e	sock_kmalloc
+EXPORT_SYMBOL vmlinux 0xba455a47	ilookup5_nowait
+EXPORT_SYMBOL vmlinux 0xba497f13	loops_per_jiffy
+EXPORT_SYMBOL vmlinux 0xba81f97e	pci_write_vpd
+EXPORT_SYMBOL vmlinux 0xba9c5b6a	init_special_inode
+EXPORT_SYMBOL vmlinux 0xbaa2782a	kstrndup
+EXPORT_SYMBOL vmlinux 0xbaaab8ae	timespec_to_jiffies
+EXPORT_SYMBOL vmlinux 0xbabbefa1	i2c_smbus_read_byte
+EXPORT_SYMBOL vmlinux 0xbafc51e6	sget
+EXPORT_SYMBOL vmlinux 0xbb167766	fb_var_to_videomode
+EXPORT_SYMBOL vmlinux 0xbb189cad	disallow_signal
+EXPORT_SYMBOL vmlinux 0xbb1fad26	jbd2_journal_try_to_free_buffers
+EXPORT_SYMBOL vmlinux 0xbb1fad6a	flush_delayed_work
+EXPORT_SYMBOL vmlinux 0xbb2fda5b	vga_tryget
+EXPORT_SYMBOL vmlinux 0xbb3c7bd4	arp_broken_ops
+EXPORT_SYMBOL vmlinux 0xbb4213aa	filemap_fdatawait_range
+EXPORT_SYMBOL vmlinux 0xbb5828df	tcp_read_sock
+EXPORT_SYMBOL vmlinux 0xbb5d343d	xfrm_get_acqseq
+EXPORT_SYMBOL vmlinux 0xbb5daf32	skb_copy_datagram_const_iovec
+EXPORT_SYMBOL vmlinux 0xbb615b57	__kill_fasync
+EXPORT_SYMBOL vmlinux 0xbb796f26	thaw_process
+EXPORT_SYMBOL vmlinux 0xbb848501	skb_dequeue_tail
+EXPORT_SYMBOL vmlinux 0xbb96f877	acpi_bus_add
+EXPORT_SYMBOL vmlinux 0xbb99125c	get_default_font
+EXPORT_SYMBOL vmlinux 0xbbca07dc	jbd2_journal_set_triggers
+EXPORT_SYMBOL vmlinux 0xbbcb4c7a	pci_remove_bus_device
+EXPORT_SYMBOL vmlinux 0xbc0d7515	set_blocksize
+EXPORT_SYMBOL vmlinux 0xbc5e1258	set_disk_ro
+EXPORT_SYMBOL vmlinux 0xbc9518eb	single_open
+EXPORT_SYMBOL vmlinux 0xbd139d58	journal_unlock_updates
+EXPORT_SYMBOL vmlinux 0xbd25a13e	generic_removexattr
+EXPORT_SYMBOL vmlinux 0xbd4767b5	kfree_skb
+EXPORT_SYMBOL vmlinux 0xbd47cd61	mpage_writepages
+EXPORT_SYMBOL vmlinux 0xbd4ba214	sock_i_ino
+EXPORT_SYMBOL vmlinux 0xbd510042	close_bdev_exclusive
+EXPORT_SYMBOL vmlinux 0xbd57a130	input_register_device
+EXPORT_SYMBOL vmlinux 0xbd5f4678	inet_ioctl
+EXPORT_SYMBOL vmlinux 0xbdaf5b07	acpi_os_read_port
+EXPORT_SYMBOL vmlinux 0xbdc7fb98	tcf_hash_lookup
+EXPORT_SYMBOL vmlinux 0xbdf5c25c	rb_next
+EXPORT_SYMBOL vmlinux 0xbe40e1d9	pci_disable_device
+EXPORT_SYMBOL vmlinux 0xbe659d36	udp_sendmsg
+EXPORT_SYMBOL vmlinux 0xbe6ca6a3	seq_open_private
+EXPORT_SYMBOL vmlinux 0xbe833f59	drop_super
+EXPORT_SYMBOL vmlinux 0xbe9b8a00	unw_unwind_to_user
+EXPORT_SYMBOL vmlinux 0xbec650e9	follow_down
+EXPORT_SYMBOL vmlinux 0xbee04c4f	ip_mc_dec_group
+EXPORT_SYMBOL vmlinux 0xbef43296	console_conditional_schedule
+EXPORT_SYMBOL vmlinux 0xbefc8b79	sock_sendmsg
+EXPORT_SYMBOL vmlinux 0xbf632d7c	d_instantiate_unique
+EXPORT_SYMBOL vmlinux 0xbf6d1908	dm_kcopyd_copy
+EXPORT_SYMBOL vmlinux 0xbf7fd2f5	schedule_timeout_killable
+EXPORT_SYMBOL vmlinux 0xbf9bcc8d	__cap_empty_set
+EXPORT_SYMBOL vmlinux 0xbfba5589	pnp_disable_dev
+EXPORT_SYMBOL vmlinux 0xbfc177bc	iowrite32_rep
+EXPORT_SYMBOL vmlinux 0xc003c637	__strncpy_from_user
+EXPORT_SYMBOL vmlinux 0xc0044724	blk_set_default_limits
+EXPORT_SYMBOL vmlinux 0xc01285a4	vfs_llseek
+EXPORT_SYMBOL vmlinux 0xc043adf4	genphy_resume
+EXPORT_SYMBOL vmlinux 0xc0580937	rb_erase
+EXPORT_SYMBOL vmlinux 0xc0766ddd	sockfd_lookup
+EXPORT_SYMBOL vmlinux 0xc07d43ae	acpi_evaluate_reference
+EXPORT_SYMBOL vmlinux 0xc08feff7	ip_mc_rejoin_group
+EXPORT_SYMBOL vmlinux 0xc09651d9	crc32_be
+EXPORT_SYMBOL vmlinux 0xc0a3d105	find_next_bit
+EXPORT_SYMBOL vmlinux 0xc0bf6ead	timecounter_cyc2time
+EXPORT_SYMBOL vmlinux 0xc0d22f1e	xfrm_policy_destroy
+EXPORT_SYMBOL vmlinux 0xc0d23f46	qdisc_destroy
+EXPORT_SYMBOL vmlinux 0xc0d2b1cf	dmam_free_coherent
+EXPORT_SYMBOL vmlinux 0xc0dd1df7	dma_pool_free
+EXPORT_SYMBOL vmlinux 0xc0edcaf0	kernel_sendpage
+EXPORT_SYMBOL vmlinux 0xc11b9c46	vmtruncate
+EXPORT_SYMBOL vmlinux 0xc127bda3	unw_unwind
+EXPORT_SYMBOL vmlinux 0xc141eb5f	have_submounts
+EXPORT_SYMBOL vmlinux 0xc14def50	__scm_destroy
+EXPORT_SYMBOL vmlinux 0xc154a9c0	xfrm_state_delete
+EXPORT_SYMBOL vmlinux 0xc159e476	jbd2_journal_init_inode
+EXPORT_SYMBOL vmlinux 0xc1915dd6	bio_integrity_free
+EXPORT_SYMBOL vmlinux 0xc1a25747	dev_get_flags
+EXPORT_SYMBOL vmlinux 0xc1a77d4c	kill_fasync
+EXPORT_SYMBOL vmlinux 0xc1e22203	f_setown
+EXPORT_SYMBOL vmlinux 0xc1e30651	_spin_unlock_bh
+EXPORT_SYMBOL vmlinux 0xc1e3816a	security_inode_notifysecctx
+EXPORT_SYMBOL vmlinux 0xc1fc268c	tty_chars_in_buffer
+EXPORT_SYMBOL vmlinux 0xc205243a	dquot_alloc
+EXPORT_SYMBOL vmlinux 0xc20d16f6	xfrm_find_acq
+EXPORT_SYMBOL vmlinux 0xc225fd87	skb_add_rx_frag
+EXPORT_SYMBOL vmlinux 0xc22df0f6	matrox_mystique
+EXPORT_SYMBOL vmlinux 0xc230e3d0	swiotlb_dma_supported
+EXPORT_SYMBOL vmlinux 0xc24d05c9	generic_write_sync
+EXPORT_SYMBOL vmlinux 0xc256e762	__bitmap_equal
+EXPORT_SYMBOL vmlinux 0xc268a4bb	sk_dst_check
+EXPORT_SYMBOL vmlinux 0xc274e681	bdi_destroy
+EXPORT_SYMBOL vmlinux 0xc2790caf	__neigh_event_send
+EXPORT_SYMBOL vmlinux 0xc29d5343	sn_flush_all_caches
+EXPORT_SYMBOL vmlinux 0xc2a105bb	clear_bdi_congested
+EXPORT_SYMBOL vmlinux 0xc2a66826	skb_push
+EXPORT_SYMBOL vmlinux 0xc2bf0a67	vfs_getattr
+EXPORT_SYMBOL vmlinux 0xc2e587d1	reset_devices
+EXPORT_SYMBOL vmlinux 0xc316a5cc	d_instantiate
+EXPORT_SYMBOL vmlinux 0xc3199495	generic_writepages
+EXPORT_SYMBOL vmlinux 0xc33f6f4c	on_each_cpu
+EXPORT_SYMBOL vmlinux 0xc350c341	mark_buffer_async_write
+EXPORT_SYMBOL vmlinux 0xc39b0087	iov_iter_copy_from_user_atomic
+EXPORT_SYMBOL vmlinux 0xc39f0360	pci_dev_put
+EXPORT_SYMBOL vmlinux 0xc3bd892e	_write_lock_bh
+EXPORT_SYMBOL vmlinux 0xc3ca6846	unw_access_fr
+EXPORT_SYMBOL vmlinux 0xc3d81576	neigh_seq_stop
+EXPORT_SYMBOL vmlinux 0xc3ddbfcb	jbd2_journal_flush
+EXPORT_SYMBOL vmlinux 0xc3edc955	gen_replace_estimator
+EXPORT_SYMBOL vmlinux 0xc402cc99	register_acpi_notifier
+EXPORT_SYMBOL vmlinux 0xc40f1cc4	simple_lookup
+EXPORT_SYMBOL vmlinux 0xc41f7a25	netif_rx_ni
+EXPORT_SYMBOL vmlinux 0xc42bec84	i2c_bit_add_bus
+EXPORT_SYMBOL vmlinux 0xc44b1f21	sock_alloc_send_pskb
+EXPORT_SYMBOL vmlinux 0xc44c7376	blk_alloc_queue
+EXPORT_SYMBOL vmlinux 0xc4754275	dm_io_client_create
+EXPORT_SYMBOL vmlinux 0xc499ae1e	kstrdup
+EXPORT_SYMBOL vmlinux 0xc51ed94b	icmp_send
+EXPORT_SYMBOL vmlinux 0xc52a220c	do_sync_write
+EXPORT_SYMBOL vmlinux 0xc52f5714	fb_videomode_to_var
+EXPORT_SYMBOL vmlinux 0xc5534d64	ioread16
+EXPORT_SYMBOL vmlinux 0xc5a151a7	get_sb_bdev
+EXPORT_SYMBOL vmlinux 0xc5a520ed	key_type_keyring
+EXPORT_SYMBOL vmlinux 0xc5ae6145	per_cpu____sn_cnodeid_to_nasid
+EXPORT_SYMBOL vmlinux 0xc5eb30a9	pci_map_rom
+EXPORT_SYMBOL vmlinux 0xc6301553	request_key
+EXPORT_SYMBOL vmlinux 0xc66c17c6	is_bad_inode
+EXPORT_SYMBOL vmlinux 0xc66fd7f6	sync_mapping_buffers
+EXPORT_SYMBOL vmlinux 0xc6e3e03d	acpi_unlock_ac_dir
+EXPORT_SYMBOL vmlinux 0xc7159cd7	aio_put_req
+EXPORT_SYMBOL vmlinux 0xc7198e9d	mapping_tagged
+EXPORT_SYMBOL vmlinux 0xc71ed4ad	dst_alloc
+EXPORT_SYMBOL vmlinux 0xc72157be	mnt_unpin
+EXPORT_SYMBOL vmlinux 0xc721cee8	generic_setlease
+EXPORT_SYMBOL vmlinux 0xc722227e	posix_acl_clone
+EXPORT_SYMBOL vmlinux 0xc7264b52	tty_hangup
+EXPORT_SYMBOL vmlinux 0xc73c76ac	clocksource_unregister
+EXPORT_SYMBOL vmlinux 0xc740c64a	memchr
+EXPORT_SYMBOL vmlinux 0xc75f3a30	__netdev_alloc_skb
+EXPORT_SYMBOL vmlinux 0xc7629b78	compat_nf_getsockopt
+EXPORT_SYMBOL vmlinux 0xc783b7cf	xor_ia64_5
+EXPORT_SYMBOL vmlinux 0xc79bcd36	dm_vcalloc
+EXPORT_SYMBOL vmlinux 0xc7a24d76	sysfs_format_mac
+EXPORT_SYMBOL vmlinux 0xc7a4fbed	rtnl_lock
+EXPORT_SYMBOL vmlinux 0xc7a8dba1	do_munmap
+EXPORT_SYMBOL vmlinux 0xc7e03e0b	blk_dump_rq_flags
+EXPORT_SYMBOL vmlinux 0xc7ec28b0	memcmp
+EXPORT_SYMBOL vmlinux 0xc83d48b5	__set_page_dirty_nobuffers
+EXPORT_SYMBOL vmlinux 0xc84ee355	should_remove_suid
+EXPORT_SYMBOL vmlinux 0xc86cd4eb	tcp4_gro_complete
+EXPORT_SYMBOL vmlinux 0xc86fa40c	prepare_to_wait_exclusive
+EXPORT_SYMBOL vmlinux 0xc88048da	unregister_nls
+EXPORT_SYMBOL vmlinux 0xc88fbc5c	__alloc_pages_nodemask
+EXPORT_SYMBOL vmlinux 0xc897c382	sg_init_table
+EXPORT_SYMBOL vmlinux 0xc8b24c78	dev_mc_delete
+EXPORT_SYMBOL vmlinux 0xc8b57c27	autoremove_wake_function
+EXPORT_SYMBOL vmlinux 0xc8bfc3ae	generic_delete_inode
+EXPORT_SYMBOL vmlinux 0xc8c30d68	qdisc_calculate_pkt_len
+EXPORT_SYMBOL vmlinux 0xc8ca3e25	acpi_get_child
+EXPORT_SYMBOL vmlinux 0xc8cc31e4	blk_sync_queue
+EXPORT_SYMBOL vmlinux 0xc8f3d1c6	dquot_free_space
+EXPORT_SYMBOL vmlinux 0xc904544a	mntput_no_expire
+EXPORT_SYMBOL vmlinux 0xc90d9d8a	journal_wipe
+EXPORT_SYMBOL vmlinux 0xc919fe52	input_event
+EXPORT_SYMBOL vmlinux 0xc9266a5a	ia64_load_scratch_fpregs
+EXPORT_SYMBOL vmlinux 0xc926feea	file_fsync
+EXPORT_SYMBOL vmlinux 0xc93093f0	inet_csk_reset_keepalive_timer
+EXPORT_SYMBOL vmlinux 0xc97ae628	get_io_context
+EXPORT_SYMBOL vmlinux 0xc981f399	tty_hung_up_p
+EXPORT_SYMBOL vmlinux 0xc98690d8	dquot_acquire
+EXPORT_SYMBOL vmlinux 0xc998d641	icmp_err_convert
+EXPORT_SYMBOL vmlinux 0xc9ab2eef	acpi_os_wait_events_complete
+EXPORT_SYMBOL vmlinux 0xc9acf4cd	jbd2_journal_check_available_features
+EXPORT_SYMBOL vmlinux 0xc9d83ede	vfs_dq_transfer
+EXPORT_SYMBOL vmlinux 0xc9db6a91	freeze_bdev
+EXPORT_SYMBOL vmlinux 0xc9e8b460	xfrm_policy_byid
+EXPORT_SYMBOL vmlinux 0xc9e9e2aa	per_cpu____irq_regs
+EXPORT_SYMBOL vmlinux 0xc9f757a4	key_revoke
+EXPORT_SYMBOL vmlinux 0xca116950	textsearch_find_continuous
+EXPORT_SYMBOL vmlinux 0xca18d870	pci_bus_write_config_byte
+EXPORT_SYMBOL vmlinux 0xca5b86dc	page_symlink_inode_operations
+EXPORT_SYMBOL vmlinux 0xca87690b	jbd2_journal_file_inode
+EXPORT_SYMBOL vmlinux 0xca8acc78	acpi_dbg_level
+EXPORT_SYMBOL vmlinux 0xca996cf0	ip4_datagram_connect
+EXPORT_SYMBOL vmlinux 0xcaa400f8	sock_register
+EXPORT_SYMBOL vmlinux 0xcad74c4c	pnp_stop_dev
+EXPORT_SYMBOL vmlinux 0xcadb50ec	inet_csk_init_xmit_timers
+EXPORT_SYMBOL vmlinux 0xcaebf878	tcp_enter_memory_pressure
+EXPORT_SYMBOL vmlinux 0xcb0bcb89	skb_pad
+EXPORT_SYMBOL vmlinux 0xcb1baeca	dentry_open
+EXPORT_SYMBOL vmlinux 0xcb1bb358	__next_cpu_nr
+EXPORT_SYMBOL vmlinux 0xcb407910	d_move
+EXPORT_SYMBOL vmlinux 0xcb41a080	sync_blockdev
+EXPORT_SYMBOL vmlinux 0xcb66ed48	tcp_sync_mss
+EXPORT_SYMBOL vmlinux 0xcb686e8b	posix_lock_file
+EXPORT_SYMBOL vmlinux 0xcb7131fb	fb_get_options
+EXPORT_SYMBOL vmlinux 0xcb733bf2	acpi_bus_set_power
+EXPORT_SYMBOL vmlinux 0xcb9b53e2	pci_request_regions_exclusive
+EXPORT_SYMBOL vmlinux 0xcbb9d7db	groups_free
+EXPORT_SYMBOL vmlinux 0xcbdfb65d	i2c_smbus_read_word_data
+EXPORT_SYMBOL vmlinux 0xcbfe6008	cap_netlink_recv
+EXPORT_SYMBOL vmlinux 0xcbff1c6c	__pagevec_release
+EXPORT_SYMBOL vmlinux 0xcc07af75	strnlen
+EXPORT_SYMBOL vmlinux 0xcc12d05e	__dst_free
+EXPORT_SYMBOL vmlinux 0xcc2faa29	inet_frag_kill
+EXPORT_SYMBOL vmlinux 0xcc3323e0	phy_register_fixup_for_uid
+EXPORT_SYMBOL vmlinux 0xcc36f32e	fb_unregister_client
+EXPORT_SYMBOL vmlinux 0xcc40ed1d	nf_getsockopt
+EXPORT_SYMBOL vmlinux 0xcc5005fe	msleep_interruptible
+EXPORT_SYMBOL vmlinux 0xcc6d37b3	pci_enable_bridges
+EXPORT_SYMBOL vmlinux 0xcc7fa952	local_bh_enable_ip
+EXPORT_SYMBOL vmlinux 0xccb6b312	__vlan_hwaccel_rx
+EXPORT_SYMBOL vmlinux 0xccd589ad	buffer_migrate_page
+EXPORT_SYMBOL vmlinux 0xccf882e1	xfrm_policy_flush
+EXPORT_SYMBOL vmlinux 0xcd422bfd	in_dev_finish_destroy
+EXPORT_SYMBOL vmlinux 0xcd43b970	jbd2_journal_force_commit
+EXPORT_SYMBOL vmlinux 0xcd473329	memset_io
+EXPORT_SYMBOL vmlinux 0xcd56914f	inode_get_bytes
+EXPORT_SYMBOL vmlinux 0xcd5eae66	slow_work_unregister_user
+EXPORT_SYMBOL vmlinux 0xcd83a4ff	blk_queue_init_tags
+EXPORT_SYMBOL vmlinux 0xcd8e19df	blk_queue_merge_bvec
+EXPORT_SYMBOL vmlinux 0xcda52648	pagecache_write_begin
+EXPORT_SYMBOL vmlinux 0xce314636	fail_migrate_page
+EXPORT_SYMBOL vmlinux 0xce36ded6	sysctl_tcp_mem
+EXPORT_SYMBOL vmlinux 0xce4904a4	acpi_leave_sleep_state
+EXPORT_SYMBOL vmlinux 0xce54ae66	per_cpu__softnet_data
+EXPORT_SYMBOL vmlinux 0xce5ac24f	zlib_inflate_workspacesize
+EXPORT_SYMBOL vmlinux 0xce8001e8	alloc_disk
+EXPORT_SYMBOL vmlinux 0xceb401d7	kobject_init
+EXPORT_SYMBOL vmlinux 0xcedbd1b7	inet_dev_addr_type
+EXPORT_SYMBOL vmlinux 0xcee73e9e	sk_stream_wait_connect
+EXPORT_SYMBOL vmlinux 0xcee82a5a	tty_register_driver
+EXPORT_SYMBOL vmlinux 0xceedf09a	slow_work_register_user
+EXPORT_SYMBOL vmlinux 0xcf07f9bf	thaw_bdev
+EXPORT_SYMBOL vmlinux 0xcf0eb78e	udp_ioctl
+EXPORT_SYMBOL vmlinux 0xcf1d28ab	acpi_error
+EXPORT_SYMBOL vmlinux 0xcf2fc87e	inet_frag_destroy
+EXPORT_SYMBOL vmlinux 0xcf327fb6	ps2_drain
+EXPORT_SYMBOL vmlinux 0xcf36b77c	pci_get_device
+EXPORT_SYMBOL vmlinux 0xcf55576a	nf_log_register
+EXPORT_SYMBOL vmlinux 0xcfb9006e	jiffies_to_timeval
+EXPORT_SYMBOL vmlinux 0xcff53400	kref_put
+EXPORT_SYMBOL vmlinux 0xcfff88d3	down_write
+EXPORT_SYMBOL vmlinux 0xd0181f4f	__bitmap_xor
+EXPORT_SYMBOL vmlinux 0xd02f4ae9	xfrm_state_unregister_afinfo
+EXPORT_SYMBOL vmlinux 0xd03af197	neigh_seq_start
+EXPORT_SYMBOL vmlinux 0xd06f8509	add_disk
+EXPORT_SYMBOL vmlinux 0xd08197fa	acpi_load_tables
+EXPORT_SYMBOL vmlinux 0xd0bdba64	dev_gro_receive
+EXPORT_SYMBOL vmlinux 0xd0ee38b8	schedule_timeout_uninterruptible
+EXPORT_SYMBOL vmlinux 0xd122e35a	bio_integrity_add_page
+EXPORT_SYMBOL vmlinux 0xd1472061	acpi_pci_register_driver
+EXPORT_SYMBOL vmlinux 0xd166c042	__wait_on_bit
+EXPORT_SYMBOL vmlinux 0xd16dbc53	vfs_quota_disable
+EXPORT_SYMBOL vmlinux 0xd17c10d3	kthread_create
+EXPORT_SYMBOL vmlinux 0xd1844a21	abort_exclusive_wait
+EXPORT_SYMBOL vmlinux 0xd18b6eb2	acpi_unmap_lsapic
+EXPORT_SYMBOL vmlinux 0xd18c4cc0	jbd2_journal_restart
+EXPORT_SYMBOL vmlinux 0xd19bb294	acpi_install_address_space_handler
+EXPORT_SYMBOL vmlinux 0xd1be8b06	pci_bus_read_config_dword
+EXPORT_SYMBOL vmlinux 0xd1d49171	jbd2_journal_blocks_per_page
+EXPORT_SYMBOL vmlinux 0xd20677d5	mark_page_accessed
+EXPORT_SYMBOL vmlinux 0xd233d941	simple_pin_fs
+EXPORT_SYMBOL vmlinux 0xd251d7b0	security_socket_getpeersec_dgram
+EXPORT_SYMBOL vmlinux 0xd252d80a	generic_fillattr
+EXPORT_SYMBOL vmlinux 0xd2555f19	jiffies_64_to_clock_t
+EXPORT_SYMBOL vmlinux 0xd25d4f74	console_blank_hook
+EXPORT_SYMBOL vmlinux 0xd2965f6f	kthread_should_stop
+EXPORT_SYMBOL vmlinux 0xd29ea1e4	blk_queue_max_hw_sectors
+EXPORT_SYMBOL vmlinux 0xd2a75ee0	dmi_first_match
+EXPORT_SYMBOL vmlinux 0xd2c10673	bdi_unregister
+EXPORT_SYMBOL vmlinux 0xd2c81507	hwsw_dma_get_ops
+EXPORT_SYMBOL vmlinux 0xd315eda4	devm_ioremap
+EXPORT_SYMBOL vmlinux 0xd3346405	sk_stop_timer
+EXPORT_SYMBOL vmlinux 0xd34646ad	find_lock_page
+EXPORT_SYMBOL vmlinux 0xd36b0b44	__wait_on_buffer
+EXPORT_SYMBOL vmlinux 0xd37093fe	bdget
+EXPORT_SYMBOL vmlinux 0xd39461d4	netlink_rcv_skb
+EXPORT_SYMBOL vmlinux 0xd3951da4	acpi_resource_to_address64
+EXPORT_SYMBOL vmlinux 0xd39b10cb	netif_napi_del
+EXPORT_SYMBOL vmlinux 0xd3a843a4	pci_iounmap
+EXPORT_SYMBOL vmlinux 0xd3af979c	memdup_user
+EXPORT_SYMBOL vmlinux 0xd3b87a1b	copy_io_context
+EXPORT_SYMBOL vmlinux 0xd3e78cce	input_close_device
+EXPORT_SYMBOL vmlinux 0xd3f0446b	register_snap_client
+EXPORT_SYMBOL vmlinux 0xd4005163	setup_new_exec
+EXPORT_SYMBOL vmlinux 0xd41c82b7	jbd2_journal_init_jbd_inode
+EXPORT_SYMBOL vmlinux 0xd436aca8	dev_change_flags
+EXPORT_SYMBOL vmlinux 0xd454f06f	pci_bus_write_config_word
+EXPORT_SYMBOL vmlinux 0xd460d66e	free_buffer_head
+EXPORT_SYMBOL vmlinux 0xd48f4b0e	get_sb_pseudo
+EXPORT_SYMBOL vmlinux 0xd4a55960	pci_add_new_bus
+EXPORT_SYMBOL vmlinux 0xd4c9b323	inet_csk_destroy_sock
+EXPORT_SYMBOL vmlinux 0xd4dbd9de	get_phy_device
+EXPORT_SYMBOL vmlinux 0xd50fef48	acpi_detach_data
+EXPORT_SYMBOL vmlinux 0xd5180cc8	block_commit_write
+EXPORT_SYMBOL vmlinux 0xd5196efa	vfsmount_lock
+EXPORT_SYMBOL vmlinux 0xd5263820	mb_cache_destroy
+EXPORT_SYMBOL vmlinux 0xd5361dbe	blk_integrity_unregister
+EXPORT_SYMBOL vmlinux 0xd55df564	iget5_locked
+EXPORT_SYMBOL vmlinux 0xd57450bc	up_read
+EXPORT_SYMBOL vmlinux 0xd57f8789	iommu_num_pages
+EXPORT_SYMBOL vmlinux 0xd58d4045	unregister_filesystem
+EXPORT_SYMBOL vmlinux 0xd5909f59	hippi_neigh_setup_dev
+EXPORT_SYMBOL vmlinux 0xd5b34feb	bio_uncopy_user
+EXPORT_SYMBOL vmlinux 0xd5c7c61d	sysctl_string
+EXPORT_SYMBOL vmlinux 0xd5e51905	generic_block_fiemap
+EXPORT_SYMBOL vmlinux 0xd5f8382b	tty_flip_buffer_push
+EXPORT_SYMBOL vmlinux 0xd60f1bc9	vm_map_ram
+EXPORT_SYMBOL vmlinux 0xd62c833f	schedule_timeout
+EXPORT_SYMBOL vmlinux 0xd645549d	blk_queue_max_segment_size
+EXPORT_SYMBOL vmlinux 0xd65c84e2	journal_check_used_features
+EXPORT_SYMBOL vmlinux 0xd69357ed	key_alloc
+EXPORT_SYMBOL vmlinux 0xd6a78d08	smp_call_function_single
+EXPORT_SYMBOL vmlinux 0xd6ada3c1	kmem_ptr_validate
+EXPORT_SYMBOL vmlinux 0xd6d4728b	file_remove_suid
+EXPORT_SYMBOL vmlinux 0xd6d68c6b	vm_stat
+EXPORT_SYMBOL vmlinux 0xd6dd6aaa	tcp_hashinfo
+EXPORT_SYMBOL vmlinux 0xd6ee688f	vmalloc
+EXPORT_SYMBOL vmlinux 0xd6fc77fd	inet_proto_csum_replace4
+EXPORT_SYMBOL vmlinux 0xd7068cd3	posix_lock_file_wait
+EXPORT_SYMBOL vmlinux 0xd70f816c	dev_mc_unsync
+EXPORT_SYMBOL vmlinux 0xd713d7e9	ip_fragment
+EXPORT_SYMBOL vmlinux 0xd77a5aa5	__bitmap_and
+EXPORT_SYMBOL vmlinux 0xd77ef754	serio_unregister_port
+EXPORT_SYMBOL vmlinux 0xd79b5a02	allow_signal
+EXPORT_SYMBOL vmlinux 0xd7a1cb06	tty_port_alloc_xmit_buf
+EXPORT_SYMBOL vmlinux 0xd7a89cd9	mpage_writepage
+EXPORT_SYMBOL vmlinux 0xd7cc3f50	tcp_v4_connect
+EXPORT_SYMBOL vmlinux 0xd7ef1694	per_cpu__local_per_cpu_offset
+EXPORT_SYMBOL vmlinux 0xd81255e5	find_vma
+EXPORT_SYMBOL vmlinux 0xd81a434e	blk_complete_request
+EXPORT_SYMBOL vmlinux 0xd83791bc	nf_conntrack_destroy
+EXPORT_SYMBOL vmlinux 0xd83d6598	skb_gso_segment
+EXPORT_SYMBOL vmlinux 0xd8403fd4	filemap_flush
+EXPORT_SYMBOL vmlinux 0xd8499a47	dev_close
+EXPORT_SYMBOL vmlinux 0xd84d3415	stop_tty
+EXPORT_SYMBOL vmlinux 0xd853fd7d	d_validate
+EXPORT_SYMBOL vmlinux 0xd869be1e	inode_setattr
+EXPORT_SYMBOL vmlinux 0xd871c5d2	nf_unregister_sockopt
+EXPORT_SYMBOL vmlinux 0xd89da37f	movable_zone
+EXPORT_SYMBOL vmlinux 0xd8ab3073	compat_nf_setsockopt
+EXPORT_SYMBOL vmlinux 0xd8e484f0	register_chrdev_region
+EXPORT_SYMBOL vmlinux 0xd9091363	acpi_install_notify_handler
+EXPORT_SYMBOL vmlinux 0xd93055cc	write_cache_pages
+EXPORT_SYMBOL vmlinux 0xd935bbc7	ia64_mca_printk
+EXPORT_SYMBOL vmlinux 0xd93cb8be	sn_bus_free_sysdata
+EXPORT_SYMBOL vmlinux 0xd94a87a0	matroxfb_vgaHWrestore
+EXPORT_SYMBOL vmlinux 0xd96c9264	vga_put
+EXPORT_SYMBOL vmlinux 0xd985dc99	mempool_free_pages
+EXPORT_SYMBOL vmlinux 0xd99b8b1c	netlink_broadcast
+EXPORT_SYMBOL vmlinux 0xd9ecbff9	_spin_lock_bh
+EXPORT_SYMBOL vmlinux 0xda0a6b0e	acpi_map_lsapic
+EXPORT_SYMBOL vmlinux 0xda1a7335	kasprintf
+EXPORT_SYMBOL vmlinux 0xda293e7c	skb_free_datagram
+EXPORT_SYMBOL vmlinux 0xda309424	alloc_tty_driver
+EXPORT_SYMBOL vmlinux 0xda3cfb01	add_timer
+EXPORT_SYMBOL vmlinux 0xda4629e4	radix_tree_insert
+EXPORT_SYMBOL vmlinux 0xda54376a	pci_iomap
+EXPORT_SYMBOL vmlinux 0xda58ac5a	ethtool_op_set_tx_ipv6_csum
+EXPORT_SYMBOL vmlinux 0xda66fcb2	fb_set_var
+EXPORT_SYMBOL vmlinux 0xda6dc46a	netpoll_print_options
+EXPORT_SYMBOL vmlinux 0xda7ca6cb	fb_mode_is_equal
+EXPORT_SYMBOL vmlinux 0xda7fd064	xfrm_policy_walk
+EXPORT_SYMBOL vmlinux 0xda83c4f4	cancel_dirty_page
+EXPORT_SYMBOL vmlinux 0xda8af7ad	fb_find_nearest_mode
+EXPORT_SYMBOL vmlinux 0xdad6ea49	iw_handler_set_spy
+EXPORT_SYMBOL vmlinux 0xdaf38650	journal_revoke
+EXPORT_SYMBOL vmlinux 0xdb22ec6b	sn_prom_feature_available
+EXPORT_SYMBOL vmlinux 0xdb289476	pci_set_power_state
+EXPORT_SYMBOL vmlinux 0xdb3ca90e	poll_freewait
+EXPORT_SYMBOL vmlinux 0xdb4b3099	journal_dirty_data
+EXPORT_SYMBOL vmlinux 0xdb5c8104	complete_all
+EXPORT_SYMBOL vmlinux 0xdb95799a	tty_free_termios
+EXPORT_SYMBOL vmlinux 0xdbcd416e	sysctl_ip_nonlocal_bind
+EXPORT_SYMBOL vmlinux 0xdbeb4eeb	sock_no_connect
+EXPORT_SYMBOL vmlinux 0xdc053205	udp_memory_allocated
+EXPORT_SYMBOL vmlinux 0xdc0f21a9	__blockdev_direct_IO
+EXPORT_SYMBOL vmlinux 0xdc11f7ec	sock_no_shutdown
+EXPORT_SYMBOL vmlinux 0xdc14eda7	pci_pci_problems
+EXPORT_SYMBOL vmlinux 0xdc2674ca	pcie_port_service_register
+EXPORT_SYMBOL vmlinux 0xdc2adb35	add_taint
+EXPORT_SYMBOL vmlinux 0xdc344c5d	del_timer
+EXPORT_SYMBOL vmlinux 0xdc3fad3d	tcp_v4_md5_lookup
+EXPORT_SYMBOL vmlinux 0xdc43a9c8	daemonize
+EXPORT_SYMBOL vmlinux 0xdc477230	sn_io_addr
+EXPORT_SYMBOL vmlinux 0xdca0e950	genl_register_family
+EXPORT_SYMBOL vmlinux 0xdcaeea8a	block_fsync
+EXPORT_SYMBOL vmlinux 0xdcb5671d	strlen
+EXPORT_SYMBOL vmlinux 0xdd1777a1	udp_table
+EXPORT_SYMBOL vmlinux 0xdd2575d3	km_query
+EXPORT_SYMBOL vmlinux 0xdd4377ed	blk_queue_max_hw_segments
+EXPORT_SYMBOL vmlinux 0xdd52491e	iget_locked
+EXPORT_SYMBOL vmlinux 0xddb404c9	d_alloc
+EXPORT_SYMBOL vmlinux 0xddd243a5	skb_copy_expand
+EXPORT_SYMBOL vmlinux 0xdde9972b	dma_get_ops
+EXPORT_SYMBOL vmlinux 0xddefa07a	register_sysrq_key
+EXPORT_SYMBOL vmlinux 0xde3128a3	put_disk
+EXPORT_SYMBOL vmlinux 0xde31b902	blk_limits_io_opt
+EXPORT_SYMBOL vmlinux 0xde3bb204	tty_unthrottle
+EXPORT_SYMBOL vmlinux 0xde558e02	ia64_mlogbuf_dump
+EXPORT_SYMBOL vmlinux 0xde63485d	alloc_disk_node
+EXPORT_SYMBOL vmlinux 0xde75b689	set_irq_type
+EXPORT_SYMBOL vmlinux 0xde76e7bc	sys_close
+EXPORT_SYMBOL vmlinux 0xde8fc208	jbd2_journal_get_undo_access
+EXPORT_SYMBOL vmlinux 0xde9360ba	totalram_pages
+EXPORT_SYMBOL vmlinux 0xde96c72b	_write_trylock
+EXPORT_SYMBOL vmlinux 0xde9fa490	__nla_put
+EXPORT_SYMBOL vmlinux 0xdea386e3	__serio_register_driver
+EXPORT_SYMBOL vmlinux 0xded41679	alloc_etherdev_mq
+EXPORT_SYMBOL vmlinux 0xdf0da3cc	acpi_get_devices
+EXPORT_SYMBOL vmlinux 0xdf2fb3ba	kfifo_alloc
+EXPORT_SYMBOL vmlinux 0xdf2ff185	blk_remove_plug
+EXPORT_SYMBOL vmlinux 0xdf4b8122	acpi_get_physical_device
+EXPORT_SYMBOL vmlinux 0xdf4c8767	ns_to_timeval
+EXPORT_SYMBOL vmlinux 0xdf5ef949	call_usermodehelper_setup
+EXPORT_SYMBOL vmlinux 0xdf60cc27	__print_symbol
+EXPORT_SYMBOL vmlinux 0xdf8b70e7	tcp_rcv_established
+EXPORT_SYMBOL vmlinux 0xdf90ef1a	read_dev_sector
+EXPORT_SYMBOL vmlinux 0xdf929370	fs_overflowgid
+EXPORT_SYMBOL vmlinux 0xdfb7bada	acpi_check_resource_conflict
+EXPORT_SYMBOL vmlinux 0xdfb7c842	node_states
+EXPORT_SYMBOL vmlinux 0xdfdb0105	cpu_core_map
+EXPORT_SYMBOL vmlinux 0xdffc9a4c	nf_log_packet
+EXPORT_SYMBOL vmlinux 0xe0092c45	vfs_fsync
+EXPORT_SYMBOL vmlinux 0xe047ad91	neigh_changeaddr
+EXPORT_SYMBOL vmlinux 0xe05da972	unregister_netdev
+EXPORT_SYMBOL vmlinux 0xe069c8a8	vmalloc_to_page
+EXPORT_SYMBOL vmlinux 0xe075d6eb	iter_div_u64_rem
+EXPORT_SYMBOL vmlinux 0xe0ac8bd2	acpi_bus_generate_netlink_event
+EXPORT_SYMBOL vmlinux 0xe0b13336	argv_free
+EXPORT_SYMBOL vmlinux 0xe0bc24a1	param_set_ushort
+EXPORT_SYMBOL vmlinux 0xe0c56442	vfs_fstatat
+EXPORT_SYMBOL vmlinux 0xe0f7b6a8	generic_cont_expand_simple
+EXPORT_SYMBOL vmlinux 0xe0ff8c99	default_file_splice_read
+EXPORT_SYMBOL vmlinux 0xe1080317	simple_transaction_read
+EXPORT_SYMBOL vmlinux 0xe113bbbc	csum_partial
+EXPORT_SYMBOL vmlinux 0xe1177557	mdiobus_register
+EXPORT_SYMBOL vmlinux 0xe11810a8	blk_queue_segment_boundary
+EXPORT_SYMBOL vmlinux 0xe12d3a86	sock_no_socketpair
+EXPORT_SYMBOL vmlinux 0xe13cd8a7	dmi_name_in_vendors
+EXPORT_SYMBOL vmlinux 0xe1761617	security_inet_conn_request
+EXPORT_SYMBOL vmlinux 0xe1bce398	deactivate_locked_super
+EXPORT_SYMBOL vmlinux 0xe1bf97c0	dq_data_lock
+EXPORT_SYMBOL vmlinux 0xe1cc2491	__inet6_lookup_established
+EXPORT_SYMBOL vmlinux 0xe1dc9530	phy_enable_interrupts
+EXPORT_SYMBOL vmlinux 0xe2323d80	__init_rwsem
+EXPORT_SYMBOL vmlinux 0xe23ae481	blk_iopoll_complete
+EXPORT_SYMBOL vmlinux 0xe24050c7	scnprintf
+EXPORT_SYMBOL vmlinux 0xe24d3a97	jiffies_64
+EXPORT_SYMBOL vmlinux 0xe2538c0c	tcp_check_req
+EXPORT_SYMBOL vmlinux 0xe29b04e9	acpi_set_firmware_waking_vector64
+EXPORT_SYMBOL vmlinux 0xe29cb7d0	percpu_counter_set
+EXPORT_SYMBOL vmlinux 0xe2a32a7c	_atomic_dec_and_lock
+EXPORT_SYMBOL vmlinux 0xe2d5255a	strcmp
+EXPORT_SYMBOL vmlinux 0xe30e3d4f	phy_disable_interrupts
+EXPORT_SYMBOL vmlinux 0xe3235eef	d_path
+EXPORT_SYMBOL vmlinux 0xe3714852	genlmsg_multicast_allns
+EXPORT_SYMBOL vmlinux 0xe38272eb	tcf_em_tree_destroy
+EXPORT_SYMBOL vmlinux 0xe3b0192b	vscnprintf
+EXPORT_SYMBOL vmlinux 0xe3eda69e	tty_port_close_start
+EXPORT_SYMBOL vmlinux 0xe3edc47f	unregister_exec_domain
+EXPORT_SYMBOL vmlinux 0xe3fbbd14	ethtool_op_get_tx_csum
+EXPORT_SYMBOL vmlinux 0xe3fbe148	acpi_install_table_handler
+EXPORT_SYMBOL vmlinux 0xe405e230	xfrm_lookup
+EXPORT_SYMBOL vmlinux 0xe405f8e0	pcix_get_max_mmrbc
+EXPORT_SYMBOL vmlinux 0xe40e69ab	log_wait_commit
+EXPORT_SYMBOL vmlinux 0xe431978a	xfrm_bundle_ok
+EXPORT_SYMBOL vmlinux 0xe43617f7	acpi_gbl_FADT
+EXPORT_SYMBOL vmlinux 0xe4368e1e	tty_check_change
+EXPORT_SYMBOL vmlinux 0xe43ec601	vfs_readlink
+EXPORT_SYMBOL vmlinux 0xe47907a3	__sk_mem_schedule
+EXPORT_SYMBOL vmlinux 0xe47c4d3e	unw_access_gr
+EXPORT_SYMBOL vmlinux 0xe484e35f	ioread32
+EXPORT_SYMBOL vmlinux 0xe4f1695e	cookie_check_timestamp
+EXPORT_SYMBOL vmlinux 0xe51f922b	inc_zone_page_state
+EXPORT_SYMBOL vmlinux 0xe523ad75	synchronize_irq
+EXPORT_SYMBOL vmlinux 0xe526f136	__copy_user
+EXPORT_SYMBOL vmlinux 0xe52d755f	ia64_cpu_to_sapicid
+EXPORT_SYMBOL vmlinux 0xe53a8dad	inode_add_rsv_space
+EXPORT_SYMBOL vmlinux 0xe545bca4	names_cachep
+EXPORT_SYMBOL vmlinux 0xe56b37b5	dquot_transfer
+EXPORT_SYMBOL vmlinux 0xe577b644	alloc_file
+EXPORT_SYMBOL vmlinux 0xe57878a1	in6_pton
+EXPORT_SYMBOL vmlinux 0xe5867808	dlci_ioctl_set
+EXPORT_SYMBOL vmlinux 0xe59a2766	bio_phys_segments
+EXPORT_SYMBOL vmlinux 0xe5a41976	wait_on_page_bit
+EXPORT_SYMBOL vmlinux 0xe5b96efa	pci_bus_alloc_resource
+EXPORT_SYMBOL vmlinux 0xe5c264eb	arch_acpi_processor_cleanup_pdc
+EXPORT_SYMBOL vmlinux 0xe5c78a99	do_blank_screen
+EXPORT_SYMBOL vmlinux 0xe5d01f87	sock_common_setsockopt
+EXPORT_SYMBOL vmlinux 0xe5db9a86	kmem_cache_alloc_node
+EXPORT_SYMBOL vmlinux 0xe5e30c95	devm_ioport_map
+EXPORT_SYMBOL vmlinux 0xe5ed5467	xfrm_policy_walk_init
+EXPORT_SYMBOL vmlinux 0xe5f04a52	vfs_quota_on_path
+EXPORT_SYMBOL vmlinux 0xe606f05c	fget
+EXPORT_SYMBOL vmlinux 0xe63ce738	_write_lock_irqsave
+EXPORT_SYMBOL vmlinux 0xe6809775	__nla_put_nohdr
+EXPORT_SYMBOL vmlinux 0xe6952f1f	pcibios_resource_to_bus
+EXPORT_SYMBOL vmlinux 0xe697d108	__blk_iopoll_complete
+EXPORT_SYMBOL vmlinux 0xe6b1a085	check_disk_change
+EXPORT_SYMBOL vmlinux 0xe6b27fda	neigh_table_init_no_netlink
+EXPORT_SYMBOL vmlinux 0xe6c98487	skb_free_datagram_locked
+EXPORT_SYMBOL vmlinux 0xe6f4ae81	matroxfb_g450_shutdown
+EXPORT_SYMBOL vmlinux 0xe6fbe430	can_do_mlock
+EXPORT_SYMBOL vmlinux 0xe714375c	__tasklet_hi_schedule_first
+EXPORT_SYMBOL vmlinux 0xe716baed	acpi_unregister_ioapic
+EXPORT_SYMBOL vmlinux 0xe73f241e	xfrm_policy_register_afinfo
+EXPORT_SYMBOL vmlinux 0xe765a324	simple_release_fs
+EXPORT_SYMBOL vmlinux 0xe77bb847	idr_replace
+EXPORT_SYMBOL vmlinux 0xe7aa453d	generic_file_readonly_mmap
+EXPORT_SYMBOL vmlinux 0xe7ad8376	nla_reserve
+EXPORT_SYMBOL vmlinux 0xe7d2aca1	security_sk_classify_flow
+EXPORT_SYMBOL vmlinux 0xe7d4daac	seq_list_next
+EXPORT_SYMBOL vmlinux 0xe7e355d6	lock_rename
+EXPORT_SYMBOL vmlinux 0xe800fd81	register_framebuffer
+EXPORT_SYMBOL vmlinux 0xe8116e08	__kmalloc_node
+EXPORT_SYMBOL vmlinux 0xe81925ad	bio_integrity_advance
+EXPORT_SYMBOL vmlinux 0xe835da29	remap_pfn_range
+EXPORT_SYMBOL vmlinux 0xe8567719	kset_unregister
+EXPORT_SYMBOL vmlinux 0xe85d74ba	read_cache_page_gfp
+EXPORT_SYMBOL vmlinux 0xe8679178	__divdi3
+EXPORT_SYMBOL vmlinux 0xe88b8783	tcf_hash_destroy
+EXPORT_SYMBOL vmlinux 0xe89005fc	security_inode_permission
+EXPORT_SYMBOL vmlinux 0xe8bb1012	bio_integrity_alloc_bioset
+EXPORT_SYMBOL vmlinux 0xe8e501a9	eth_mac_addr
+EXPORT_SYMBOL vmlinux 0xe8ed7bc0	sock_no_listen
+EXPORT_SYMBOL vmlinux 0xe90dcae0	__request_module
+EXPORT_SYMBOL vmlinux 0xe914e41e	strcpy
+EXPORT_SYMBOL vmlinux 0xe919f92e	xfrm_policy_unregister_afinfo
+EXPORT_SYMBOL vmlinux 0xe939a40b	simple_transaction_set
+EXPORT_SYMBOL vmlinux 0xe93c3380	matroxfb_vgaHWinit
+EXPORT_SYMBOL vmlinux 0xe9472403	tcp_prot
+EXPORT_SYMBOL vmlinux 0xe9953aa9	sn_system_size
+EXPORT_SYMBOL vmlinux 0xe9afa771	mod_timer
+EXPORT_SYMBOL vmlinux 0xe9c6aef4	down_read
+EXPORT_SYMBOL vmlinux 0xe9ca26d1	i2c_transfer
+EXPORT_SYMBOL vmlinux 0xe9f356a5	neigh_event_ns
+EXPORT_SYMBOL vmlinux 0xea054b22	nla_policy_len
+EXPORT_SYMBOL vmlinux 0xea0f1d87	invalidate_partition
+EXPORT_SYMBOL vmlinux 0xea10655a	__bitmap_intersects
+EXPORT_SYMBOL vmlinux 0xea59cd02	request_key_async_with_auxdata
+EXPORT_SYMBOL vmlinux 0xea90bdd3	acpi_attach_data
+EXPORT_SYMBOL vmlinux 0xead5050f	sk_reset_timer
+EXPORT_SYMBOL vmlinux 0xead58fb9	print_hex_dump
+EXPORT_SYMBOL vmlinux 0xeaf69388	machvec_dma_sync_sg
+EXPORT_SYMBOL vmlinux 0xeb16163b	io_space
+EXPORT_SYMBOL vmlinux 0xeb276bac	wake_up_process
+EXPORT_SYMBOL vmlinux 0xeb2e78de	iget_failed
+EXPORT_SYMBOL vmlinux 0xeb3472ee	submit_bio
+EXPORT_SYMBOL vmlinux 0xeb37275f	vm_insert_mixed
+EXPORT_SYMBOL vmlinux 0xeb3d33ff	phy_stop_interrupts
+EXPORT_SYMBOL vmlinux 0xeb64e3d9	pci_get_bus_and_slot
+EXPORT_SYMBOL vmlinux 0xeb866c79	sock_init_data
+EXPORT_SYMBOL vmlinux 0xeb8b6612	napi_complete
+EXPORT_SYMBOL vmlinux 0xeb8f54b3	strstrip
+EXPORT_SYMBOL vmlinux 0xeb9809e2	xfrm_state_lookup_byaddr
+EXPORT_SYMBOL vmlinux 0xebbf1dba	strncasecmp
+EXPORT_SYMBOL vmlinux 0xebd273a6	strict_strtoull
+EXPORT_SYMBOL vmlinux 0xebe74707	__skb_recv_datagram
+EXPORT_SYMBOL vmlinux 0xec1445a1	tty_driver_flush_buffer
+EXPORT_SYMBOL vmlinux 0xec279c73	dm_io
+EXPORT_SYMBOL vmlinux 0xec681b6a	skb_under_panic
+EXPORT_SYMBOL vmlinux 0xec697e1a	clear_inode
+EXPORT_SYMBOL vmlinux 0xec794ba0	__send_remote_softirq
+EXPORT_SYMBOL vmlinux 0xeca3cf79	acpi_unlock_battery_dir
+EXPORT_SYMBOL vmlinux 0xeca52252	generic_block_bmap
+EXPORT_SYMBOL vmlinux 0xecc60201	fb_get_buffer_offset
+EXPORT_SYMBOL vmlinux 0xeccec227	blk_rq_map_user
+EXPORT_SYMBOL vmlinux 0xece795d1	tcp_v4_md5_hash_skb
+EXPORT_SYMBOL vmlinux 0xed073ddf	flush_old_exec
+EXPORT_SYMBOL vmlinux 0xed1d8a81	file_update_time
+EXPORT_SYMBOL vmlinux 0xed2bc1d2	input_unregister_handler
+EXPORT_SYMBOL vmlinux 0xed80d1ab	tcf_exts_dump
+EXPORT_SYMBOL vmlinux 0xed962738	matroxfb_DAC_in
+EXPORT_SYMBOL vmlinux 0xeda0d76e	gen_estimator_active
+EXPORT_SYMBOL vmlinux 0xeda7f381	skb_realloc_headroom
+EXPORT_SYMBOL vmlinux 0xeda88a82	mempool_create_node
+EXPORT_SYMBOL vmlinux 0xeda8ced9	__register_chrdev
+EXPORT_SYMBOL vmlinux 0xedaa8cae	make_EII_client
+EXPORT_SYMBOL vmlinux 0xedbaee5e	nla_strcmp
+EXPORT_SYMBOL vmlinux 0xedc03953	iounmap
+EXPORT_SYMBOL vmlinux 0xedc9c6f7	security_path_rmdir
+EXPORT_SYMBOL vmlinux 0xede71966	slow_work_sleep_till_thread_needed
+EXPORT_SYMBOL vmlinux 0xee05d942	tty_port_tty_set
+EXPORT_SYMBOL vmlinux 0xee0c0280	sk_free
+EXPORT_SYMBOL vmlinux 0xee2d0fc7	_local_bh_enable
+EXPORT_SYMBOL vmlinux 0xee407684	dev_set_drvdata
+EXPORT_SYMBOL vmlinux 0xee513b67	pnp_device_detach
+EXPORT_SYMBOL vmlinux 0xee7eb9e1	pnp_platform_devices
+EXPORT_SYMBOL vmlinux 0xee98dea7	__elv_add_request
+EXPORT_SYMBOL vmlinux 0xeea9dbaf	bitmap_bitremap
+EXPORT_SYMBOL vmlinux 0xeeb8a24c	xor_ia64_2
+EXPORT_SYMBOL vmlinux 0xeeceb077	__cond_resched_lock
+EXPORT_SYMBOL vmlinux 0xeedebeee	init_timer_key
+EXPORT_SYMBOL vmlinux 0xef2a0730	phy_start_aneg
+EXPORT_SYMBOL vmlinux 0xef38b7b9	i2c_smbus_write_i2c_block_data
+EXPORT_SYMBOL vmlinux 0xef508089	tty_mutex
+EXPORT_SYMBOL vmlinux 0xef5d6b77	mdiobus_write
+EXPORT_SYMBOL vmlinux 0xef6ea7b5	sock_common_recvmsg
+EXPORT_SYMBOL vmlinux 0xef6ed1ba	param_set_invbool
+EXPORT_SYMBOL vmlinux 0xef750d49	mutex_lock_interruptible
+EXPORT_SYMBOL vmlinux 0xef9aedfc	boot_option_idle_override
+EXPORT_SYMBOL vmlinux 0xefa4e536	kthread_bind
+EXPORT_SYMBOL vmlinux 0xefb7e77a	block_sync_page
+EXPORT_SYMBOL vmlinux 0xefd5ddab	simple_unlink
+EXPORT_SYMBOL vmlinux 0xefdd70ce	security_secid_to_secctx
+EXPORT_SYMBOL vmlinux 0xefe099c3	acpi_get_event_status
+EXPORT_SYMBOL vmlinux 0xeffef300	dmam_pool_destroy
+EXPORT_SYMBOL vmlinux 0xf0009fee	put_pages_list
+EXPORT_SYMBOL vmlinux 0xf021a7e0	truncate_pagecache
+EXPORT_SYMBOL vmlinux 0xf0279e68	security_path_truncate
+EXPORT_SYMBOL vmlinux 0xf030668b	tcp_getsockopt
+EXPORT_SYMBOL vmlinux 0xf0349e14	serio_reconnect
+EXPORT_SYMBOL vmlinux 0xf03d9db5	kmem_cache_create
+EXPORT_SYMBOL vmlinux 0xf065f629	ioread16be
+EXPORT_SYMBOL vmlinux 0xf092fb99	pv_cpu_ops
+EXPORT_SYMBOL vmlinux 0xf0938d00	elevator_exit
+EXPORT_SYMBOL vmlinux 0xf0b60e86	elv_rq_merge_ok
+EXPORT_SYMBOL vmlinux 0xf0db8d27	kernel_read
+EXPORT_SYMBOL vmlinux 0xf0e9e5c5	pagevec_lookup
+EXPORT_SYMBOL vmlinux 0xf0ef15b4	list_sort
+EXPORT_SYMBOL vmlinux 0xf0f1246c	kvasprintf
+EXPORT_SYMBOL vmlinux 0xf1018e50	__xfrm_policy_check
+EXPORT_SYMBOL vmlinux 0xf106ecb3	acpi_evaluate_object_typed
+EXPORT_SYMBOL vmlinux 0xf10de535	ioread8
+EXPORT_SYMBOL vmlinux 0xf1127418	set_groups
+EXPORT_SYMBOL vmlinux 0xf1394a2a	__strlen_user
+EXPORT_SYMBOL vmlinux 0xf16edaec	tioca_gart_found
+EXPORT_SYMBOL vmlinux 0xf174ed48	acquire_console_sem
+EXPORT_SYMBOL vmlinux 0xf182438c	sock_tx_timestamp
+EXPORT_SYMBOL vmlinux 0xf18475c8	tty_unregister_driver
+EXPORT_SYMBOL vmlinux 0xf19061f9	sock_setsockopt
+EXPORT_SYMBOL vmlinux 0xf195c682	fb_invert_cmaps
+EXPORT_SYMBOL vmlinux 0xf19db688	sn_dma_set_mask
+EXPORT_SYMBOL vmlinux 0xf1b95495	journal_get_create_access
+EXPORT_SYMBOL vmlinux 0xf1db1704	nla_memcpy
+EXPORT_SYMBOL vmlinux 0xf1e4166e	__wait_on_bit_lock
+EXPORT_SYMBOL vmlinux 0xf1e5e2bc	security_sb_set_mnt_opts
+EXPORT_SYMBOL vmlinux 0xf1e98c74	avenrun
+EXPORT_SYMBOL vmlinux 0xf20ac299	sn_generate_path
+EXPORT_SYMBOL vmlinux 0xf20dabd8	free_irq
+EXPORT_SYMBOL vmlinux 0xf2133071	pci_disable_msix
+EXPORT_SYMBOL vmlinux 0xf2997713	tty_termios_hw_change
+EXPORT_SYMBOL vmlinux 0xf2b0cfe5	pcim_iomap_regions
+EXPORT_SYMBOL vmlinux 0xf2b9c613	pci_dev_driver
+EXPORT_SYMBOL vmlinux 0xf2c59f68	iw_handler_get_spy
+EXPORT_SYMBOL vmlinux 0xf2c60162	__blk_end_request_all
+EXPORT_SYMBOL vmlinux 0xf2f43917	inet_sock_destruct
+EXPORT_SYMBOL vmlinux 0xf313da4e	sha_transform
+EXPORT_SYMBOL vmlinux 0xf31f0a4c	mnt_pin
+EXPORT_SYMBOL vmlinux 0xf338d4c3	netlink_unregister_notifier
+EXPORT_SYMBOL vmlinux 0xf3447fd8	_write_unlock_bh
+EXPORT_SYMBOL vmlinux 0xf346231f	seq_list_start_head
+EXPORT_SYMBOL vmlinux 0xf37728a9	sleep_on
+EXPORT_SYMBOL vmlinux 0xf3861829	km_policy_expired
+EXPORT_SYMBOL vmlinux 0xf397b9aa	__tasklet_schedule
+EXPORT_SYMBOL vmlinux 0xf3a59506	unload_nls
+EXPORT_SYMBOL vmlinux 0xf3bf0bce	__bitmap_complement
+EXPORT_SYMBOL vmlinux 0xf3e5567c	kernel_recvmsg
+EXPORT_SYMBOL vmlinux 0xf3e813f2	vfs_unlink
+EXPORT_SYMBOL vmlinux 0xf409b8fe	iunique
+EXPORT_SYMBOL vmlinux 0xf42bfe13	ida_remove
+EXPORT_SYMBOL vmlinux 0xf441ac43	ioread8_rep
+EXPORT_SYMBOL vmlinux 0xf4614a5c	pci_set_dma_seg_boundary
+EXPORT_SYMBOL vmlinux 0xf466290e	pcim_iomap
+EXPORT_SYMBOL vmlinux 0xf468b6d5	simple_fsync
+EXPORT_SYMBOL vmlinux 0xf469e96c	lock_super
+EXPORT_SYMBOL vmlinux 0xf46caaa1	sock_no_ioctl
+EXPORT_SYMBOL vmlinux 0xf46f5265	seq_bitmap_list
+EXPORT_SYMBOL vmlinux 0xf4823a87	splice_from_pipe_begin
+EXPORT_SYMBOL vmlinux 0xf490326c	i2c_master_recv
+EXPORT_SYMBOL vmlinux 0xf494c772	skb_append_datato_frags
+EXPORT_SYMBOL vmlinux 0xf4b487b4	i2c_del_driver
+EXPORT_SYMBOL vmlinux 0xf4f14de6	rtnl_trylock
+EXPORT_SYMBOL vmlinux 0xf4f52f93	dqstats
+EXPORT_SYMBOL vmlinux 0xf50576ba	kobject_add
+EXPORT_SYMBOL vmlinux 0xf50f3673	gen_pool_destroy
+EXPORT_SYMBOL vmlinux 0xf522396a	log_start_commit
+EXPORT_SYMBOL vmlinux 0xf528d60e	tcp_timewait_state_process
+EXPORT_SYMBOL vmlinux 0xf53d4c26	qdisc_class_hash_destroy
+EXPORT_SYMBOL vmlinux 0xf56707a5	grab_cache_page_nowait
+EXPORT_SYMBOL vmlinux 0xf569d964	poll_schedule_timeout
+EXPORT_SYMBOL vmlinux 0xf57682c8	acpi_get_object_info
+EXPORT_SYMBOL vmlinux 0xf5b22be2	ethtool_op_set_tx_csum
+EXPORT_SYMBOL vmlinux 0xf5c9012e	timespec_trunc
+EXPORT_SYMBOL vmlinux 0xf5da01f8	write_inode_now
+EXPORT_SYMBOL vmlinux 0xf5eb86ea	blk_verify_command
+EXPORT_SYMBOL vmlinux 0xf5eff793	jbd2_journal_start
+EXPORT_SYMBOL vmlinux 0xf6256ae7	nla_append
+EXPORT_SYMBOL vmlinux 0xf6425e34	generic_show_options
+EXPORT_SYMBOL vmlinux 0xf65685db	lro_flush_pkt
+EXPORT_SYMBOL vmlinux 0xf65ae936	alloc_fddidev
+EXPORT_SYMBOL vmlinux 0xf65b3d11	unregister_con_driver
+EXPORT_SYMBOL vmlinux 0xf6703fba	lookup_bdev
+EXPORT_SYMBOL vmlinux 0xf6bb4729	color_table
+EXPORT_SYMBOL vmlinux 0xf6ebc03b	net_ratelimit
+EXPORT_SYMBOL vmlinux 0xf711bead	neigh_seq_next
+EXPORT_SYMBOL vmlinux 0xf71f3c5e	ethtool_op_get_ufo
+EXPORT_SYMBOL vmlinux 0xf7518193	block_page_mkwrite
+EXPORT_SYMBOL vmlinux 0xf7584a9c	find_font
+EXPORT_SYMBOL vmlinux 0xf7616ea0	gnet_stats_finish_copy
+EXPORT_SYMBOL vmlinux 0xf78d04ab	netlink_register_notifier
+EXPORT_SYMBOL vmlinux 0xf79ec8fe	dentry_unhash
+EXPORT_SYMBOL vmlinux 0xf7fa24fc	pci_bus_size_bridges
+EXPORT_SYMBOL vmlinux 0xf81ea941	blk_stop_queue
+EXPORT_SYMBOL vmlinux 0xf82abc1d	isa_dma_bridge_buggy
+EXPORT_SYMBOL vmlinux 0xf82e3d47	acpi_initialize_objects
+EXPORT_SYMBOL vmlinux 0xf834fdc3	blk_queue_make_request
+EXPORT_SYMBOL vmlinux 0xf85846c4	pnp_get_resource
+EXPORT_SYMBOL vmlinux 0xf88673ba	journal_init_inode
+EXPORT_SYMBOL vmlinux 0xf88e0ee2	acpi_get_table_header
+EXPORT_SYMBOL vmlinux 0xf890fe7f	pm_idle
+EXPORT_SYMBOL vmlinux 0xf89dd4ea	elv_abort_queue
+EXPORT_SYMBOL vmlinux 0xf8a56891	seq_putc
+EXPORT_SYMBOL vmlinux 0xf8afc83e	seq_path
+EXPORT_SYMBOL vmlinux 0xf8e3070d	lock_sock_nested
+EXPORT_SYMBOL vmlinux 0xf8fd1bdd	get_sb_ns
+EXPORT_SYMBOL vmlinux 0xf927abf5	wireless_spy_update
+EXPORT_SYMBOL vmlinux 0xf9342206	send_sig_info
+EXPORT_SYMBOL vmlinux 0xf9a071c8	qdisc_list_del
+EXPORT_SYMBOL vmlinux 0xf9a482f9	msleep
+EXPORT_SYMBOL vmlinux 0xf9a5646e	tty_insert_flip_string
+EXPORT_SYMBOL vmlinux 0xf9b46fd5	sk_filter
+EXPORT_SYMBOL vmlinux 0xf9d34884	genphy_suspend
+EXPORT_SYMBOL vmlinux 0xfa42cc11	update_region
+EXPORT_SYMBOL vmlinux 0xfa8ee6c9	pci_lost_interrupt
+EXPORT_SYMBOL vmlinux 0xfa908648	sysctl_jiffies
+EXPORT_SYMBOL vmlinux 0xfaae85bc	__wake_up
+EXPORT_SYMBOL vmlinux 0xfaf98462	bitrev32
+EXPORT_SYMBOL vmlinux 0xfb0443fb	acpi_get_parent
+EXPORT_SYMBOL vmlinux 0xfb05527b	inet_dgram_connect
+EXPORT_SYMBOL vmlinux 0xfb0cf2e9	touch_all_softlockup_watchdogs
+EXPORT_SYMBOL vmlinux 0xfb1c9e34	pskb_expand_head
+EXPORT_SYMBOL vmlinux 0xfb596c11	pci_request_selected_regions
+EXPORT_SYMBOL vmlinux 0xfb6af58d	recalc_sigpending
+EXPORT_SYMBOL vmlinux 0xfb7d9c45	__udivsi3
+EXPORT_SYMBOL vmlinux 0xfba585e8	serio_unregister_driver
+EXPORT_SYMBOL vmlinux 0xfbd28888	tty_name
+EXPORT_SYMBOL vmlinux 0xfbe27a1c	rb_first
+EXPORT_SYMBOL vmlinux 0xfc010d9c	page_zero_new_buffers
+EXPORT_SYMBOL vmlinux 0xfc02b7ad	sysctl_tcp_wmem
+EXPORT_SYMBOL vmlinux 0xfc20851f	journal_load
+EXPORT_SYMBOL vmlinux 0xfc2501cc	_spin_lock_irqsave
+EXPORT_SYMBOL vmlinux 0xfc39e32f	ioport_unmap
+EXPORT_SYMBOL vmlinux 0xfc61df1a	tcp_make_synack
+EXPORT_SYMBOL vmlinux 0xfc71234b	blk_plug_device
+EXPORT_SYMBOL vmlinux 0xfc76c494	vlan_dev_real_dev
+EXPORT_SYMBOL vmlinux 0xfca7d9e4	inet_frag_evictor
+EXPORT_SYMBOL vmlinux 0xfcaa04a0	out_of_line_wait_on_bit_lock
+EXPORT_SYMBOL vmlinux 0xfcc092d1	kset_register
+EXPORT_SYMBOL vmlinux 0xfcc2a43c	utf32_to_utf8
+EXPORT_SYMBOL vmlinux 0xfcd8a0bb	pagevec_lookup_tag
+EXPORT_SYMBOL vmlinux 0xfce33383	set_bdi_congested
+EXPORT_SYMBOL vmlinux 0xfcec0987	enable_irq
+EXPORT_SYMBOL vmlinux 0xfcfa03ff	fb_videomode_to_modelist
+EXPORT_SYMBOL vmlinux 0xfcfb4318	xfrm_state_register_afinfo
+EXPORT_SYMBOL vmlinux 0xfd19eaeb	memcpy_fromio
+EXPORT_SYMBOL vmlinux 0xfd2964ec	pci_select_bars
+EXPORT_SYMBOL vmlinux 0xfd58c1bc	compat_sock_get_timestampns
+EXPORT_SYMBOL vmlinux 0xfd7d7713	acpi_exception
+EXPORT_SYMBOL vmlinux 0xfd8e9fa9	pci_dev_get
+EXPORT_SYMBOL vmlinux 0xfd9447ca	acpi_bus_generate_proc_event
+EXPORT_SYMBOL vmlinux 0xfda38c1e	blk_queue_dma_pad
+EXPORT_SYMBOL vmlinux 0xfda85a7d	request_threaded_irq
+EXPORT_SYMBOL vmlinux 0xfda9b020	compat_sock_get_timestamp
+EXPORT_SYMBOL vmlinux 0xfda9fa88	sock_create
+EXPORT_SYMBOL vmlinux 0xfdb1e361	pci_get_subsys
+EXPORT_SYMBOL vmlinux 0xfdb9b629	ioread32be
+EXPORT_SYMBOL vmlinux 0xfdde1d46	ip_route_output_key
+EXPORT_SYMBOL vmlinux 0xfdf2c3e7	pci_set_master
+EXPORT_SYMBOL vmlinux 0xfdfc0b3b	fiemap_fill_next_extent
+EXPORT_SYMBOL vmlinux 0xfe26fc7c	nr_node_ids
+EXPORT_SYMBOL vmlinux 0xfe392bcd	generic_segment_checks
+EXPORT_SYMBOL vmlinux 0xfe58e518	vfs_statfs
+EXPORT_SYMBOL vmlinux 0xfe5d4bb2	sys_tz
+EXPORT_SYMBOL vmlinux 0xfe769456	unregister_netdevice_notifier
+EXPORT_SYMBOL vmlinux 0xfe7c4287	nr_cpu_ids
+EXPORT_SYMBOL vmlinux 0xfe8a167c	brioctl_set
+EXPORT_SYMBOL vmlinux 0xfe936804	unmap_mapping_range
+EXPORT_SYMBOL vmlinux 0xfeaddd0c	pcim_iomap_regions_request_all
+EXPORT_SYMBOL vmlinux 0xfeb8a41c	seq_open
+EXPORT_SYMBOL vmlinux 0xfec3c2f2	bcd2bin
+EXPORT_SYMBOL vmlinux 0xfedd35fc	console_suspend_enabled
+EXPORT_SYMBOL vmlinux 0xfeea7bba	unw_access_pr
+EXPORT_SYMBOL vmlinux 0xff1a3643	alloc_trdev
+EXPORT_SYMBOL vmlinux 0xff1e9dd8	seq_list_start
+EXPORT_SYMBOL vmlinux 0xff217f64	unlock_new_inode
+EXPORT_SYMBOL vmlinux 0xff6878cf	fb_default_cmap
+EXPORT_SYMBOL vmlinux 0xff7559e4	ioport_resource
+EXPORT_SYMBOL vmlinux 0xff964b25	param_set_int
+EXPORT_SYMBOL vmlinux 0xff9ca065	fb_edid_to_monspecs
+EXPORT_SYMBOL vmlinux 0xffa74c4f	journal_extend
+EXPORT_SYMBOL vmlinux 0xffb245c2	security_inode_getsecctx
+EXPORT_SYMBOL vmlinux 0xffbc4793	compat_tcp_setsockopt
+EXPORT_SYMBOL vmlinux 0xffc2fe00	clocksource_register
+EXPORT_SYMBOL vmlinux 0xffd5a395	default_wake_function
+EXPORT_SYMBOL vmlinux 0xffd70402	blk_queue_free_tags
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x0cc1e40f	crypto_it_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x24aac4d9	crypto_aes_expand_key
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x3dc916b6	crypto_fl_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x40d46b21	crypto_ft_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0x71dc9998	crypto_il_tab
+EXPORT_SYMBOL_GPL crypto/aes_generic 0xc0912a5e	crypto_aes_set_key
+EXPORT_SYMBOL_GPL crypto/async_tx/async_memcpy 0x38662401	async_memcpy
+EXPORT_SYMBOL_GPL crypto/async_tx/async_pq 0x6467868c	async_gen_syndrome
+EXPORT_SYMBOL_GPL crypto/async_tx/async_pq 0xbd8560d7	async_syndrome_val
+EXPORT_SYMBOL_GPL crypto/async_tx/async_raid6_recov 0x3d3746f6	async_raid6_datap_recov
+EXPORT_SYMBOL_GPL crypto/async_tx/async_raid6_recov 0x99feb009	async_raid6_2data_recov
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0x503c490e	async_tx_submit
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0xb349d6ac	async_trigger_callback
+EXPORT_SYMBOL_GPL crypto/async_tx/async_tx 0xd4000caa	async_tx_quiesce
+EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0x0b225948	async_xor_val
+EXPORT_SYMBOL_GPL crypto/async_tx/async_xor 0x9b929380	async_xor
+EXPORT_SYMBOL_GPL crypto/cryptd 0x2b1c6faa	cryptd_free_ahash
+EXPORT_SYMBOL_GPL crypto/cryptd 0x4d977df4	cryptd_free_ablkcipher
+EXPORT_SYMBOL_GPL crypto/cryptd 0x52bdeb11	cryptd_alloc_ablkcipher
+EXPORT_SYMBOL_GPL crypto/cryptd 0x697db22f	cryptd_ablkcipher_child
+EXPORT_SYMBOL_GPL crypto/cryptd 0x75d28dfc	cryptd_shash_desc
+EXPORT_SYMBOL_GPL crypto/cryptd 0xc5d4b1c9	cryptd_alloc_ahash
+EXPORT_SYMBOL_GPL crypto/cryptd 0xd5b667d8	cryptd_ahash_child
+EXPORT_SYMBOL_GPL crypto/des_generic 0xcfd9a2c0	des_ekey
+EXPORT_SYMBOL_GPL crypto/twofish_common 0x22687359	twofish_setkey
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x0067df75	ata_tf_from_fis
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x00ebcb5d	ata_id_string
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x01d04a7d	ata_dummy_port_ops
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x03e3686c	ata_timing_cycle2mode
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x0415d888	ata_sas_port_alloc
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x0531dcb8	ata_dev_classify
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x0645de9a	ata_eh_analyze_ncq_error
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x0705006c	ata_port_pbar_desc
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x079d018e	ata_port_start
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x0a7b5ae0	ata_acpi_gtm
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x0a9e6ceb	__ata_ehi_push_desc
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x0aab367e	ata_sff_thaw
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x0c6a5be4	ata_dev_pair
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x0ddd55bf	ata_std_bios_param
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x1245bd58	ata_host_init
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x164ce81a	ata_pci_sff_activate_host
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x16f412a3	ata_host_start
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x17584393	ata_port_schedule_eh
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x194d0603	ata_scsi_ioctl
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x1b4a1050	ata_eh_qc_retry
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x1bb1fee1	ata_qc_complete_multiple
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x1ccfaecf	ata_eh_freeze_port
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x1fadda2a	sata_std_hardreset
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x20815c21	pci_test_config_bits
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x20daaaee	ata_sff_wait_after_reset
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x2189315d	ata_sff_data_xfer32
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x228aa695	ata_bmdma_mode_filter
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x25b256b9	ata_port_disable
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x274edbcf	sata_pmp_port_ops
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x28500d4b	sata_sff_hardreset
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x29c21789	ata_sas_port_start
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x2e744ded	ata_eh_thaw_port
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x2eec1d44	ata_sff_irq_clear
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x2f2c7777	sata_async_notification
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x305980e8	ata_sff_exec_command
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x32386b11	ata_sff_host_intr
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x32b4d863	ata_link_next
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x34cb1606	ata_sff_pause
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x3653f928	ata_do_dev_read_id
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x3771dd2d	ata_bmdma_start
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x38183a4e	ata_bmdma_port_ops
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x383f43db	ata_sff_port_start
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x39568598	ata_sff_qc_prep
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x3d1e892a	ata_acpi_cbl_80wire
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x3e42cb84	ata_ehi_push_desc
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x3ec1991f	ata_wait_after_reset
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x3f0716e0	ata_port_freeze
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x4034cc72	ata_cable_ignore
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x40af0dec	ata_xfer_mode2mask
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x421d4f24	ata_sas_scsi_ioctl
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x429aa741	ata_qc_complete
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x43be2c63	ata_sff_dumb_qc_prep
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x43f56e82	ata_xfer_mode2shift
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x4a49f4b2	ata_bmdma_stop
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x4eeac48c	ata_dummy_port_info
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x4fcdba0a	ata_dev_disable
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x4fdc945d	sata_deb_timing_normal
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x52cccfd3	ata_do_set_mode
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x5343e64f	ata_sff_wait_ready
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x54e07430	ata_bus_reset
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x58018a45	ata_sff_softreset
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x583487ff	ata_pci_device_do_suspend
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x5a2f8530	sata_link_hardreset
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x5b49f6c8	ata_sas_port_stop
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x5d449a01	ata_sff_hsm_move
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x5e6c3a6c	ata_pci_device_resume
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x6131717a	ata_pci_bmdma_clear_simplex
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x617e87db	ata_host_resume
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x6364b765	ata_std_error_handler
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x654e79ec	ata_link_offline
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x66eed0f9	ata_std_qc_defer
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x67280b31	ata_bmdma_setup
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x673fc382	sata_link_debounce
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x69bae598	ata_host_register
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x69e9a2cb	ata_scsi_slave_config
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x6b9a6e48	ata_pio_need_iordy
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x6d00a3ba	ata_acpi_gtm_xfermask
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x6e428028	ata_sas_port_destroy
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x6f1c7a6f	ata_pci_remove_one
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x6fba96c9	sata_port_ops
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x707ff1bb	ata_xfer_mask2mode
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x73a48b4a	ata_sff_std_ports
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x743a165e	ata_pack_xfermask
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x7645b95c	ata_ehi_clear_desc
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x76fc490e	sata_scr_write
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x77151863	ata_sff_freeze
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x775ca6db	ata_sg_init
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x77782fe7	ata_sff_error_handler
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x78be9755	ata_sff_busy_sleep
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x7d370692	sata_set_spd
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x7ecf5ea3	ata_scsi_queuecmd
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x8109a802	ata_do_eh
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x8149ea54	ata_timing_find_mode
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x8242b56a	ata_cable_sata
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x84965879	ata_sff_port_start32
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x863c5d88	ata_pci_device_do_resume
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x87dd5520	ata_cable_40wire
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x8860af07	ata_link_abort
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x89808068	ata_timing_compute
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x8b752ac1	ata_tf_to_fis
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x8bd8935e	ata_sff_qc_fill_rtf
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x8dddc4c8	ata_base_port_ops
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x9348ae05	ata_host_detach
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x94a68723	ata_scsi_slave_destroy
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x965779a3	sata_scr_write_flush
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x97a961cf	ata_sff_drain_fifo
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x9ac5ec1a	ata_pci_bmdma_init
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x9ae09e10	ata_port_abort
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x9cf13aa0	ata_sff_postreset
+EXPORT_SYMBOL_GPL drivers/ata/libata 0x9dfad9a5	ata_link_online
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xa140197d	ata_std_prereset
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xa28df41f	ata_eh_qc_complete
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xa6ca2ecc	sata_link_resume
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xa8f1b2f6	ata_host_alloc_pinfo
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xaf3f6fe0	ata_sff_interrupt
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xb255cf8e	sata_scr_valid
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xb3285511	ata_sff_data_xfer_noirq
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xb36e469a	ata_pci_sff_init_host
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xb3d0d5c3	ata_port_probe
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xb41712ba	ata_cable_80wire
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xb56fd29f	ata_slave_link_init
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xb5c43cf9	ata_dev_next
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xb6aeb661	ata_id_c_string
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xba4af82a	ata_sff_dma_pause
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xbac0d54b	ata_sas_port_init
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xbb37e038	dev_attr_sw_activity
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xbe1887e4	ata_unpack_xfermask
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xbe4f2a64	dev_attr_link_power_management_policy
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xc0164398	dev_attr_em_message
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xc0e50d85	ata_sas_queuecmd
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xc2f5df63	sata_pmp_qc_defer_cmd_switch
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xc3b8cd83	ata_cable_unknown
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xc428068d	sata_deb_timing_long
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xc48b7ccf	ata_mode_string
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xc673e23e	ata_scsi_change_queue_depth
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xc93b0318	ata_port_desc
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xcbd0ad97	ata_sff_port_ops
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xcc41858b	ata_sff_tf_load
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xcccfb2fa	sata_deb_timing_hotplug
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xce09dc9c	ata_sff_data_xfer
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xceca4f9f	sata_pmp_error_handler
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xcf67e3a2	ata_pci_sff_init_one
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xd842fd4e	ata_pio_queue_task
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xd8bdcb13	dev_attr_unload_heads
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xd977e709	ata_sff_dev_classify
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xdc38aa86	ata_sff_check_status
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xde6af2bc	ata_pci_device_suspend
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xde733b75	ata_common_sdev_attrs
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xdf4d7d9b	ata_sff_dev_select
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xe0624901	ata_bmdma32_port_ops
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xe28ac57d	ata_sff_prereset
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xe2c12d54	ata_host_alloc
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xe49ff3b0	ata_wait_register
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xe784728b	ata_sff_post_internal_cmd
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xe7cda3ae	sata_scr_read
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xe8e6f7f6	ata_sff_qc_issue
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xea418e0f	atapi_cmd_type
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xeaa0a5e4	dev_attr_em_message_type
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xec294ecf	ata_sas_slave_configure
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xec4e0d87	ata_std_postreset
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xecec5418	ata_acpi_stm
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xed33af68	ata_pci_sff_prepare_host
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xf25baca8	ata_host_suspend
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xf377a84f	ata_sff_lost_interrupt
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xf3904544	ata_noop_qc_prep
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xf4d0fe82	ata_host_activate
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xf4e856bd	ata_sff_irq_on
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xf6e874f5	ata_timing_merge
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xf8f3a0fb	ata_ratelimit
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xf9ca3160	ata_id_xfermask
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xf9cb75e9	ata_bmdma_status
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xfcd633ae	ata_sff_tf_read
+EXPORT_SYMBOL_GPL drivers/ata/libata 0xfdd65c99	ata_scsi_simulate
+EXPORT_SYMBOL_GPL drivers/ata/pata_sis 0x791a8303	sis_info133_for_sata
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x14102f23	ks0108_displaystate
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x48a70518	ks0108_writedata
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x4f506333	ks0108_startline
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0x6edae968	ks0108_isinited
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xbf4774db	ks0108_writecontrol
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xedde6df2	ks0108_page
+EXPORT_SYMBOL_GPL drivers/auxdisplay/ks0108 0xfee8ef7b	ks0108_address
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0x2c54cb89	btmrvl_remove_card
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0x5ce9d5d4	btmrvl_check_evtpkt
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0xd98070bd	btmrvl_interrupt
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0xdd5f8c46	btmrvl_send_module_cfg_cmd
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0xf8d33460	btmrvl_process_event
+EXPORT_SYMBOL_GPL drivers/bluetooth/btmrvl 0xfacaffd1	btmrvl_add_card
+EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0x1ec437cd	agp_remove_bridge
+EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0x69634cec	agp_add_bridge
+EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0xd6feefa5	agp_num_entries
+EXPORT_SYMBOL_GPL drivers/char/agp/agpgart 0xe089cfcc	agp_memory_reserved
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x0221ffee	tpm_show_enabled
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x1d7754c0	tpm_store_cancel
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x1fdfce07	tpm_continue_selftest
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x286eac4a	tpm_pm_resume
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x34256ed2	tpm_show_timeouts
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x398f4801	tpm_dev_release
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x3e7e4c88	tpm_register_hardware
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x465ef42e	tpm_calc_ordinal_duration
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x469c069e	tpm_gen_interrupt
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x482b7c35	tpm_get_timeouts
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x48e2235a	tpm_show_caps_1_2
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x5406ce9f	tpm_pm_suspend
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x65cc719c	tpm_show_pubek
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x7045663c	tpm_read
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x7b5102c0	tpm_show_pcrs
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x7c1ae409	tpm_release
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x8212e231	tpm_write
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0x8c195f49	tpm_remove_hardware
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xadae7e85	tpm_dev_vendor_release
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xadf6aa4d	tpm_pcr_read
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xbe44dc33	tpm_show_temp_deactivated
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xc37226a5	tpm_pcr_extend
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xcccd4931	tpm_open
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xe308f69c	tpm_show_owned
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xe96eb315	tpm_show_active
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm 0xf6b0e75d	tpm_show_caps
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm_bios 0x1e43cf9d	tpm_bios_log_teardown
+EXPORT_SYMBOL_GPL drivers/char/tpm/tpm_bios 0x554df423	tpm_bios_log_setup
+EXPORT_SYMBOL_GPL drivers/connector/cn 0xb10d55bc	cn_netlink_send
+EXPORT_SYMBOL_GPL drivers/connector/cn 0xcf7a962e	cn_add_callback
+EXPORT_SYMBOL_GPL drivers/connector/cn 0xff5a8cfe	cn_del_callback
+EXPORT_SYMBOL_GPL drivers/gpu/drm/drm 0x7761e877	drm_class_device_unregister
+EXPORT_SYMBOL_GPL drivers/gpu/drm/drm 0x97ef61ee	drm_class_device_register
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x0515afba	hid_dump_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x05495392	hid_debug
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x0a71fd21	hidraw_report_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x0bcc5cbc	hid_debug_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x17d03c8b	hid_set_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x212b272f	hidraw_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x366d83d8	hidraw_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x5138a9a7	__hid_register_driver
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x5b6a6f50	hid_report_raw_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x66271687	hid_dump_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x6a2e6cd1	hid_add_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x6dc80bbe	hid_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x7b132820	hid_output_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x8852ad13	hidinput_report_event
+EXPORT_SYMBOL_GPL drivers/hid/hid 0x9b3c9b95	hid_resolv_usage
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xa1382ec9	hid_unregister_driver
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xa22bc13f	hid_dump_input
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xa267b3c5	hid_destroy_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xa7f233fd	hidinput_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xb017b43a	hid_parse_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xdca0da2f	hid_allocate_device
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xe090215a	hid_input_report
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xebe4665b	hid_check_keys_pressed
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xef59ce60	hid_connect
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xf147e049	hidinput_find_field
+EXPORT_SYMBOL_GPL drivers/hid/hid 0xfb822844	hidinput_disconnect
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x01fd453e	usbhid_lookup_quirk
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0x154b313e	usbhid_submit_report
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0xb158cc64	hiddev_hid_event
+EXPORT_SYMBOL_GPL drivers/hid/usbhid/usbhid 0xca5b351e	usbhid_set_leds
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x27649967	lis3lv02d_poweroff
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x6c33e494	lis3lv02d_joystick_disable
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0x9bfba7c1	lis3lv02d_poweron
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xba2e886a	lis3lv02d_init_device
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xe6af28c8	lis3lv02d_joystick_enable
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xef26b4d6	lis3lv02d_remove_fs
+EXPORT_SYMBOL_GPL drivers/hwmon/lis3lv02d 0xfec87c26	lis3_dev
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0x486ed80d	hpsb_config_rom_ip1394_remove
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0xb3ac8b2b	hpsb_config_rom_ip1394_add
+EXPORT_SYMBOL_GPL drivers/ieee1394/ieee1394 0xec8d18cf	hpsb_disable_irm
+EXPORT_SYMBOL_GPL drivers/input/ff-memless 0x02aaaf0b	input_ff_create_memless
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x2f751b0d	wm97xx_get_gpio
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x3d4b2cd9	wm97xx_reg_write
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x5096a3b1	wm97xx_config_gpio
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0x648b2a3e	wm9713_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xa7b46c26	wm97xx_set_gpio
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xa8212aa0	wm9712_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xaeb28480	wm97xx_read_aux_adc
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xb59f37fa	wm9705_codec
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xc525c568	wm97xx_register_mach_ops
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xd0c78356	wm97xx_set_suspend_mode
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xef516c7b	wm97xx_reg_read
+EXPORT_SYMBOL_GPL drivers/input/touchscreen/wm97xx-ts 0xfeaee2f9	wm97xx_unregister_mach_ops
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0x1d95a69a	led_classdev_register
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0x37265dd3	led_classdev_suspend
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0x3e299567	led_classdev_resume
+EXPORT_SYMBOL_GPL drivers/leds/led-class 0x8f884b49	led_classdev_unregister
+EXPORT_SYMBOL_GPL drivers/md/dm-multipath 0x0052dcc3	dm_register_path_selector
+EXPORT_SYMBOL_GPL drivers/md/dm-multipath 0x182aadd9	dm_unregister_path_selector
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x08b4a31a	dm_rh_update_states
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x0bcd38d4	dm_region_hash_create
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x196a2239	dm_rh_stop_recovery
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x1f705b7e	dm_rh_recovery_start
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x405d1a81	dm_rh_mark_nosync
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x4d51fff2	dm_rh_delay
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x6765db5d	dm_region_hash_destroy
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x6efb11c6	dm_rh_get_state
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x87b5d63d	dm_rh_flush
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x8996fa91	dm_rh_bio_to_region
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x8bc9f911	dm_rh_recovery_prepare
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x93aa9722	dm_rh_inc_pending
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0x9e6c01e6	dm_rh_recovery_in_flight
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xa62a6f9a	dm_rh_dirty_log
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xab396c79	dm_rh_get_region_size
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xab432a7e	dm_rh_recovery_end
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xc77435e9	dm_rh_region_context
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xcb807e52	dm_rh_get_region_key
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xe6740153	dm_rh_region_to_sector
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xe70a5f48	dm_rh_dec
+EXPORT_SYMBOL_GPL drivers/md/dm-region-hash 0xfe114057	dm_rh_start_recovery
+EXPORT_SYMBOL_GPL drivers/md/md-mod 0x34ec07ee	md_allow_write
+EXPORT_SYMBOL_GPL drivers/md/md-mod 0x4df7a577	sync_page_io
+EXPORT_SYMBOL_GPL drivers/md/md-mod 0x5b9a0196	md_new_event
+EXPORT_SYMBOL_GPL drivers/md/md-mod 0xb9c1c931	md_do_sync
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0x24935f26	raid6_call
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0xcdc24ab5	raid6_2data_recov
+EXPORT_SYMBOL_GPL drivers/md/raid6_pq 0xdbab0c01	raid6_datap_recov
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x0349c9bd	ir_codes_proteus_2309_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x0366dcdf	ir_codes_videomate_s350_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x0a662b32	ir_input_keydown
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x110b053a	ir_codes_pixelview_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x124cb753	ir_codes_encore_enltv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x183fdfdd	ir_codes_gotview7135_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x19b4d61c	ir_codes_nebula_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x19cd2826	ir_codes_behold_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x1a9009d6	ir_codes_dm1105_nec_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x1cb148f5	ir_extract_bits
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2456e513	ir_decode_pulsedistance
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2cc459b5	ir_codes_flydvb_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x2d0e9a49	ir_codes_em_terratec_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3136d8ff	ir_codes_dntv_live_dvbt_pro_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x32b9033b	ir_codes_apac_viewcomp_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3909f4ad	ir_codes_terratec_cinergy_xs_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x3a84be27	ir_codes_avermedia_a16d_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x4267d749	ir_codes_budget_ci_old_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x43c89ef4	ir_decode_biphase
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x4c1442c1	ir_codes_real_audio_220_32_keys_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x51ba1643	ir_codes_kworld_plus_tv_analog_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x543db4ff	ir_codes_avermedia_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x5e95da31	ir_codes_tt_1500_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x5fbe6515	ir_codes_pinnacle_color_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x61d039d7	ir_codes_behold_columbus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6427a3fb	ir_codes_pinnacle_grey_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x64b02fed	ir_codes_avermedia_dvbt_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6606596a	ir_rc5_timer_keyup
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6809de82	ir_codes_pctv_sedna_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x6d6511e7	ir_dump_samples
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x703fc738	ir_codes_avertv_303_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x7283f81d	ir_codes_purpletv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x72c2992e	ir_codes_powercolor_real_angel_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x76d71b8e	ir_codes_dntv_live_dvb_t_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x784e176d	ir_codes_asus_pc39_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x828b3ce5	ir_codes_encore_enltv_fm53_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x8acae3dd	ir_codes_pinnacle_pctv_hd_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x903274c1	ir_input_nokey
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x92d1d181	ir_codes_flyvideo_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x94651dab	ir_codes_ati_tv_wonder_hd_600_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x97c35dab	ir_codes_msi_tvanywhere_plus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0x9944e2e5	ir_codes_hauppauge_new_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xa69aa6ad	ir_codes_pv951_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xa95157c5	ir_codes_cinergy_1400_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xac15f6c8	ir_codes_kaiomy_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xaff22e87	ir_codes_pixelview_new_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb01a1998	ir_codes_manli_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb0a8ef38	ir_codes_rc5_tv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb57445f7	ir_codes_eztv_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xb5adb754	ir_codes_cinergy_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xbd3ce6f0	ir_codes_avermedia_cardbus_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xbeaccbdc	ir_codes_gadmei_rm008z_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xcba36c62	ir_codes_videomate_tv_pvr_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xcc13f396	ir_input_init
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xd30c491f	ir_codes_norwood_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xdc23fec4	ir_codes_fusionhdtv_mce_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xdd4c0a07	ir_codes_evga_indtube_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xe1101f4d	ir_codes_avermedia_m135a_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xe4140c60	ir_codes_genius_tvgo_a11mce_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xeb9bb08f	ir_codes_npgtech_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xebf345b4	ir_codes_encore_enltv2_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xeec89db8	ir_codes_empty_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xef29c40d	ir_codes_adstech_dvb_t_pci_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf33c155d	ir_codes_msi_tvanywhere_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf3d619ec	ir_codes_iodata_bctv7e_table
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf4f7a4d6	ir_rc5_timer_end
+EXPORT_SYMBOL_GPL drivers/media/common/ir-common 0xf5e15e65	ir_codes_winfast_table
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x0f877652	saa7146_register_extension
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x19c7d4ef	saa7146_pgtable_free
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x65148f07	saa7146_unregister_extension
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x74939c3a	saa7146_setgpio
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x7aae08d9	saa7146_wait_for_debi_done
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x873c93da	saa7146_vfree_destroy_pgtable
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x8f57bf14	saa7146_devices_lock
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0x9cf24509	saa7146_pgtable_build_single
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xa9d3f6b9	saa7146_i2c_adapter_prepare
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xc6f7a0bf	saa7146_vmalloc_build_pgtable
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xcf683cf2	saa7146_devices
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xe0cae865	saa7146_pgtable_alloc
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146 0xe3cd9b5c	saa7146_debug
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x0940c41f	saa7146_unregister_device
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x0e6d43c0	saa7146_vv_release
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x3dbe84ef	saa7146_set_hps_source_and_sync
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0x6d09393c	saa7146_vv_init
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xbf8db2c9	saa7146_start_preview
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xdbc2ce17	saa7146_register_device
+EXPORT_SYMBOL_GPL drivers/media/common/saa7146_vv 0xec6388b9	saa7146_stop_preview
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/mt20xx 0xd8a1fe4d	microtune_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/mxl5007t 0xc188dc4e	mxl5007t_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda18271 0xf2687efd	tda18271_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda827x 0x278fc26c	tda827x_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda8290 0xc1618b30	tda829x_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda8290 0xc6fbc3e9	tda829x_probe
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tda9887 0x408d9be4	tda9887_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5761 0x0ad1d951	tea5761_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5761 0x42bd11d7	tea5761_autodetection
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5767 0x1d1531e8	tea5767_autodetection
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tea5767 0x309927fb	tea5767_attach
+EXPORT_SYMBOL_GPL drivers/media/common/tuners/tuner-simple 0x6d252777	simple_tuner_attach
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x0f38b6b2	smscore_putbuffer
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x147a143b	smscore_register_hotplug
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x1da1fff3	smscore_get_board_id
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x21e36bf2	smscore_registry_getmode
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x37d91069	smsendian_handle_tx_message
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x3ee8d70e	smscore_onresponse
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x3fc94f61	sms_board_lna_control
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x42db69d6	smsclient_sendrequest
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x45284ae9	smsendian_handle_rx_message
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x54cebdf9	smscore_register_client
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x5bb61fb7	smscore_register_device
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x5ccf753d	smscore_unregister_device
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x69eb74b1	sms_board_event
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x6e08a646	smscore_getbuffer
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x6e0ca97e	smscore_set_board_id
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x6ee3d23a	sms_board_setup
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x74ee9098	sms_board_load_modules
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0x7c576277	smsendian_handle_message_header
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xba1b3c35	smscore_unregister_client
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xcba69729	smscore_get_device_mode
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xcef54cd0	smscore_start_device
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xe116f263	sms_board_power
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xf0ca10c9	smscore_unregister_hotplug
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xfae9e604	sms_board_led_feedback
+EXPORT_SYMBOL_GPL drivers/media/dvb/siano/smsmdtv 0xfda878c5	sms_get_board
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x017ea7c7	cx231xx_tuner_callback
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x0716e903	cx231xx_uninit_vbi_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x2007cd84	cx231xx_dev_init
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x2b01ceac	cx231xx_dev_uninit
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x59a3eeb5	cx231xx_send_gpio_cmd
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x5bf3db80	cx231xx_capture_start
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0x638c5e6e	cx231xx_set_alt_setting
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xc6e4ea95	cx231xx_set_mode
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xca1bb26a	cx231xx_send_usb_command
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xd6297dbb	cx231xx_uninit_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xee4fed0e	cx231xx_init_vbi_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx231xx/cx231xx 0xf8e4e479	cx231xx_init_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/cx88/cx88xx 0xf2ae3ea3	cx88_setup_xc3028
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x4d729b9a	em28xx_init_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x7fc8652c	em28xx_tuner_callback
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x840bbb55	em28xx_audio_analog_set
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x859084fe	em28xx_audio_setup
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0x8bbacd45	em28xx_uninit_isoc
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0xaaf96205	em28xx_set_mode
+EXPORT_SYMBOL_GPL drivers/media/video/em28xx/em28xx 0xb587004b	em28xx_isoc_dvb_max_packetsize
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x0c5e7110	saa7134_ts_qops
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x73fcbe67	saa7134_g_ctrl_internal
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0x834ce8bb	saa7134_s_ctrl_internal
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0xc432e9b3	saa7134_queryctrl
+EXPORT_SYMBOL_GPL drivers/media/video/saa7134/saa7134 0xd894ee44	saa7134_s_std_internal
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x28f01ae3	v4l2_i2c_subdev_init
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0x713983e9	v4l2_i2c_new_subdev_cfg
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xacbe33ba	v4l2_i2c_subdev_addr
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xedf5f853	v4l2_i2c_new_subdev_board
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xf2a353ac	v4l2_i2c_tuner_addrs
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-common 0xf5ef842e	v4l_bound_align_image
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-compat-ioctl32 0x323dcdbe	v4l2_compat_ioctl32
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x69288f3d	v4l2_int_ioctl_0
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x698d0a49	v4l2_int_device_register
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0x7490eb58	v4l2_int_ioctl_1
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xa5228b24	v4l2_int_device_try_attach_all
+EXPORT_SYMBOL_GPL drivers/media/video/v4l2-int-device 0xb3232d5d	v4l2_int_device_unregister
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x1e8222b2	videobuf_mmap_mapper
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x23fe7791	videobuf_cgmbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x25e921cb	videobuf_queue_core_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x27083c5f	videobuf_mmap_setup
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x2a6fa698	__videobuf_mmap_setup
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x52af356d	videobuf_read_stream
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x5a6c5eeb	videobuf_waiton
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x6c30c43d	videobuf_qbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x792c48f9	videobuf_stop
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x7e05076d	videobuf_iolock
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x7faf2ace	videobuf_mmap_free
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x83242d46	videobuf_streamon
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x84b0eb09	videobuf_queue_is_busy
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x8dee8873	videobuf_reqbufs
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x97538daa	videobuf_next_field
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0x9cbfb68c	videobuf_poll_stream
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xa08939bd	videobuf_read_stop
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xa1966cf5	videobuf_dqbuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xa46110f3	videobuf_queue_to_vmalloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xb0a6c86c	videobuf_read_one
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xb77ac1a9	videobuf_streamoff
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xb7c11c0e	videobuf_read_start
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xdb48d681	videobuf_alloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xe36d97f7	videobuf_queue_cancel
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-core 0xfacfc678	videobuf_querybuf
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x10ad77e7	videobuf_sg_dma_unmap
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x163d05ec	videobuf_dma_init_kernel
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x1c628625	videobuf_sg_dma_map
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x32bf83af	videobuf_dma_init_overlay
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x675a774c	videobuf_dma_unmap
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x74f69681	videobuf_dma_init_user
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0x933dfb43	videobuf_vmalloc_to_sg
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xa38faed2	videobuf_sg_alloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xa8860f72	videobuf_dma_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xb2684c03	videobuf_queue_sg_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xc127550c	videobuf_dma_sync
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xd88c3b8c	videobuf_dma_map
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xdb5314eb	videobuf_dma_free
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-dma-sg 0xdfa611ac	videobuf_to_dma
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0x3a79976c	videobuf_queue_vmalloc_init
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0xd5cdcf8c	videobuf_to_vmalloc
+EXPORT_SYMBOL_GPL drivers/media/video/videobuf-vmalloc 0xf8f890a7	videobuf_vmalloc_free
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x22e3e744	v4l2_device_register
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x234db967	v4l2_device_register_subdev
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x23778f4f	v4l2_device_disconnect
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0x306d0d6f	v4l2_device_unregister_subdev
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0xb354042a	v4l2_device_unregister
+EXPORT_SYMBOL_GPL drivers/media/video/videodev 0xef4c1517	v4l2_device_set_name
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x00806b43	i2o_sg_tablesize
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x4d6a85ef	i2o_pool_free
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x6b6e2f4d	i2o_dma_realloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x70bffc43	i2o_dma_map_single
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x737d69b3	i2o_dma_alloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x82a01031	i2o_pool_alloc
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0x972bab73	i2o_dma_free
+EXPORT_SYMBOL_GPL drivers/message/i2o/i2o_core 0xb9b3d9e7	i2o_dma_map_sg
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x200dff0d	mc13783_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x2ab3e705	mc13783_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x43110e3c	mc13783_adc_set_ts_status
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x5cecec40	mc13783_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x60a20878	mc13783_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0x98fb7998	mc13783_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/mc13783-core 0xcd94a885	mc13783_adc_do_conversion
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-adc 0x164f0754	pcf50633_adc_async_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-adc 0x7aab6967	pcf50633_adc_sync_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x13c05732	pcf50633_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x4a7a9843	pcf50633_write_block
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x548bd205	pcf50633_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x54ee45bf	pcf50633_irq_mask_get
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x6f455970	pcf50633_reg_clear_bits
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0x84a5f6af	pcf50633_read_block
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xae7e3f66	pcf50633_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xbccb3a45	pcf50633_reg_set_bit_mask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xd79a53c7	pcf50633_irq_mask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xe52d20ae	pcf50633_irq_unmask
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-core 0xf94f8e4c	pcf50633_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x005025e7	pcf50633_gpio_power_supply_set
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x08c7bfdd	pcf50633_gpio_set
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x40eb5519	pcf50633_gpio_get
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0x861103e9	pcf50633_gpio_invert_get
+EXPORT_SYMBOL_GPL drivers/mfd/pcf50633-gpio 0xe0dd5f52	pcf50633_gpio_invert_set
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x1a6e9c21	sm501_modify_reg
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x35da8239	sm501_find_clock
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0x3e164d06	sm501_set_clock
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0xbe2735cb	sm501_misc_control
+EXPORT_SYMBOL_GPL drivers/mfd/sm501 0xdadbcc50	sm501_unit_power
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x1842a986	wm831x_enable_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x19012013	wm831x_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x31e4d07d	wm831x_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x334074bc	wm831x_auxadc_read_uv
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x45d5bc94	wm831x_request_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x5f7b550f	wm831x_disable_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x7dab26b6	wm831x_isinkv_values
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0x9a0b8658	wm831x_reg_unlock
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xb5eec078	wm831x_bulk_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xb6a0b3d7	wm831x_reg_lock
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xdc7023be	wm831x_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xe03b2392	wm831x_auxadc_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm831x 0xf1e60f52	wm831x_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x156cc4a8	wm8350_reg_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x184f1313	wm8350_block_write
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x33970b44	wm8350_register_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x4448cb9b	wm8350_set_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x4540c1c8	wm8350_device_exit
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x4ae6bd75	wm8350_clear_bits
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x6611743b	wm8350_unmask_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0x70985dba	wm8350_read_auxadc
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xb98e8203	wm8350_free_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xbdf4f8aa	wm8350_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xcdea918c	wm8350_reg_unlock
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xcfd03fc1	wm8350_mask_irq
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xd3d2bc66	wm8350_gpio_config
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xd5b5deb5	wm8350_reg_lock
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xd945ce8b	wm8350_device_init
+EXPORT_SYMBOL_GPL drivers/mfd/wm8350 0xda02190a	wm8350_block_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x07d41aae	wm8400_reg_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0x784a2c39	wm8400_block_read
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0xb2b60c99	wm8400_reset_codec_reg_cache
+EXPORT_SYMBOL_GPL drivers/mfd/wm8400-core 0xcd0b0d79	wm8400_set_bits
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x18ce2913	cb710_pci_update_config_reg
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x4826f8b1	cb710_sg_dwiter_read_next_block
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0x4cd68e6f	cb710_sg_dwiter_write_next_block
+EXPORT_SYMBOL_GPL drivers/misc/cb710/cb710 0xa938564a	cb710_set_irq_handler
+EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x2df115d4	eeprom_93cx6_multiread
+EXPORT_SYMBOL_GPL drivers/misc/eeprom/eeprom_93cx6 0x63d14d2f	eeprom_93cx6_read
+EXPORT_SYMBOL_GPL drivers/misc/sgi-xp/xp 0x1018eee0	xp_restrict_memprotect
+EXPORT_SYMBOL_GPL drivers/misc/sgi-xp/xp 0x345c9217	xpc_disconnect
+EXPORT_SYMBOL_GPL drivers/misc/sgi-xp/xp 0x39046c7a	xpc_clear_interface
+EXPORT_SYMBOL_GPL drivers/misc/sgi-xp/xp 0x4b1ca752	xp_nofault_PIOR_target
+EXPORT_SYMBOL_GPL drivers/misc/sgi-xp/xp 0x5797cfbc	xpc_set_interface
+EXPORT_SYMBOL_GPL drivers/misc/sgi-xp/xp 0x6285dfe8	xp_cpu_to_nasid
+EXPORT_SYMBOL_GPL drivers/misc/sgi-xp/xp 0x64ba5017	xp_pa
+EXPORT_SYMBOL_GPL drivers/misc/sgi-xp/xp 0x68d27065	xp_expand_memprotect
+EXPORT_SYMBOL_GPL drivers/misc/sgi-xp/xp 0x7204e746	xp_remote_memcpy
+EXPORT_SYMBOL_GPL drivers/misc/sgi-xp/xp 0x76e36d39	xp_region_size
+EXPORT_SYMBOL_GPL drivers/misc/sgi-xp/xp 0x7c3462de	xp_nofault_PIOR
+EXPORT_SYMBOL_GPL drivers/misc/sgi-xp/xp 0x902b9392	xpc_registrations
+EXPORT_SYMBOL_GPL drivers/misc/sgi-xp/xp 0x937be528	xpc_interface
+EXPORT_SYMBOL_GPL drivers/misc/sgi-xp/xp 0xcd468100	xpc_connect
+EXPORT_SYMBOL_GPL drivers/misc/sgi-xp/xp 0xead4f7fe	xp_max_npartitions
+EXPORT_SYMBOL_GPL drivers/misc/sgi-xp/xp 0xf3b47f67	xp_partition_id
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x10f35406	sdio_writeb
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x160f16bf	sdio_align_size
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x23d3fafb	sdio_readw
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x27553c64	sdio_enable_func
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x2ae1455d	sdio_release_irq
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x2dc2b60f	sdio_memcpy_toio
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x3a3e35ca	sdio_f0_writeb
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x3af5a044	sdio_set_block_size
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x5605787a	sdio_claim_host
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x7ce7b94a	sdio_release_host
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x81b0cd67	sdio_disable_func
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x93bd9fa8	sdio_memcpy_fromio
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0x96f0dd31	sdio_readb
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xa2cac489	sdio_register_driver
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xa66c85ae	sdio_readsb
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xb3f00957	sdio_readl
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xb5095097	sdio_writel
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xc6cd5f6d	sdio_f0_readb
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xd065c4bc	sdio_writew
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xe760d7f3	sdio_unregister_driver
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xf2a177f8	sdio_writesb
+EXPORT_SYMBOL_GPL drivers/mmc/core/mmc_core 0xfdf3d48f	sdio_claim_irq
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x502e7b7e	sdhci_resume_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x571edce2	sdhci_free_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0x7f3e1847	sdhci_alloc_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xec7ad7cf	sdhci_remove_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xf8d84e27	sdhci_suspend_host
+EXPORT_SYMBOL_GPL drivers/mmc/host/sdhci 0xf955b958	sdhci_add_host
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x28a635be	cfi_cmdset_0200
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x57ccdd48	cfi_cmdset_0003
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0001 0x7ed626eb	cfi_cmdset_0001
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0002 0xaef923b9	cfi_cmdset_0002
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_cmdset_0020 0xc81530b3	cfi_cmdset_0020
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x4043c74d	cfi_qry_mode_on
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0x75e7f9ba	cfi_qry_mode_off
+EXPORT_SYMBOL_GPL drivers/mtd/chips/cfi_util 0xa48e06e5	cfi_qry_present
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2000 0xda140c19	DoC2k_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001 0xf6402054	DoCMil_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/doc2001plus 0xef7d2962	DoCMilPlus_init
+EXPORT_SYMBOL_GPL drivers/mtd/devices/docecc 0x45937659	doc_decode_ecc
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x28869f35	register_mtd_parser
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x46e6e125	register_mtd_user
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x595ef56d	deregister_mtd_parser
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x5b60df66	default_mtd_writev
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x5ee18b01	get_mtd_device_nm
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x6c167026	unregister_mtd_user
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x74e4715f	mtd_erase_callback
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0x8f915cb6	del_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xa6c618ef	mtd_table
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xbd6ec0a2	get_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xcd5de631	put_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xd1e72a2c	add_mtd_device
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xd21729b2	get_sb_mtd
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xf6770a42	kill_mtd_super
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xf6d473ac	parse_mtd_partitions
+EXPORT_SYMBOL_GPL drivers/mtd/mtd 0xfacdb8a2	mtd_table_mutex
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x271714a4	del_mtd_blktrans_dev
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x699010b8	register_mtd_blktrans
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0x99c61676	add_mtd_blktrans_dev
+EXPORT_SYMBOL_GPL drivers/mtd/mtd_blkdevs 0xeb9d3afc	deregister_mtd_blktrans
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x10b44a8f	nand_scan
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x19e6430d	nand_scan_ident
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0x34ddc36a	nand_release
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xa0e06031	nand_scan_tail
+EXPORT_SYMBOL_GPL drivers/mtd/nand/nand 0xa747fb79	nand_wait_ready
+EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0x8db2a445	onenand_scan
+EXPORT_SYMBOL_GPL drivers/mtd/onenand/onenand 0xaed00020	onenand_release
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x12a41b3d	ubi_leb_map
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x14a32ac6	ubi_leb_change
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x2e674c6a	ubi_open_volume_nm
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x30ce50d7	ubi_is_mapped
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x31c5bfe6	ubi_leb_read
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x418ea1e5	ubi_leb_unmap
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x42801d20	ubi_sync
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x4fc73277	ubi_leb_erase
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x52640a76	ubi_close_volume
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x6f09ba8a	ubi_register_volume_notifier
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0x78d0aab3	ubi_get_volume_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xa7c5a976	ubi_leb_write
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xa88a6b31	ubi_do_get_device_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xbc505df4	ubi_get_device_info
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xd27f111e	ubi_open_volume
+EXPORT_SYMBOL_GPL drivers/mtd/ubi/ubi 0xfd6f0ef9	ubi_unregister_volume_notifier
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x184c3490	can_free_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x539a04eb	can_get_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x65e1c0b8	can_bus_off
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x6c1ca6de	unregister_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x73f0aaa1	can_put_echo_skb
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0x83250cb4	open_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xa5aa7f6b	alloc_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xb3d4a3f8	register_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xefd1a652	free_candev
+EXPORT_SYMBOL_GPL drivers/net/can/can-dev 0xfc9f6d69	close_candev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x4329c117	unregister_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x503880a5	free_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x562dc146	register_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0x9ef8ea1f	alloc_sja1000dev
+EXPORT_SYMBOL_GPL drivers/net/can/sja1000/sja1000 0xdc9bd500	sja1000_interrupt
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x0195ed24	mlx4_qp_modify
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x05f21af3	mlx4_fmr_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x096c6aa4	mlx4_alloc_cmd_mailbox
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x0ca5a377	mlx4_cq_modify
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x1beb9752	mlx4_db_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x24f3800f	mlx4_register_interface
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x2c334e7e	mlx4_unregister_vlan
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x2cd8976d	mlx4_pd_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x2d3eec2e	mlx4_fmr_enable
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x33afda14	mlx4_buf_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x381193c3	mlx4_srq_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x3e09538b	mlx4_cq_resize
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x44a07692	mlx4_qp_to_ready
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x48c01425	mlx4_mr_enable
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x4e2bda77	mlx4_multicast_detach
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x512c9bc0	mlx4_CLOSE_PORT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x5330d6fc	mlx4_cq_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x5520ec05	mlx4_alloc_hwq_res
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x57b48ff6	mlx4_srq_query
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x60eabbf0	mlx4_fmr_unmap
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x6647ef7f	mlx4_register_vlan
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x66e974c7	mlx4_qp_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x6d262b91	mlx4_map_phys_fmr
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x71f3e380	mlx4_write_mtt
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x7c3c1c82	mlx4_db_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x7e3287ba	mlx4_unregister_interface
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x81ca27a6	mlx4_multicast_attach
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x81caccc4	mlx4_buf_write_mtt
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x8622215f	mlx4_qp_remove
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x93a76f61	mlx4_free_hwq_res
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x94675dce	mlx4_uar_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x96bc95e1	__mlx4_cmd
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9b2e4118	mlx4_pd_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9c1d5b0e	mlx4_register_mac
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0x9d1981e2	mlx4_qp_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa0b96eba	mlx4_qp_release_range
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xa60508c5	mlx4_mr_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xaa122a46	mlx4_mtt_cleanup
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xaa458fcc	mlx4_qp_reserve_range
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xafe4183e	mlx4_mtt_addr
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb01149f4	mlx4_free_cmd_mailbox
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb5690cc5	mlx4_qp_query
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb62b436d	mlx4_srq_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xb8842937	mlx4_fmr_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xbdac6205	mlx4_buf_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc0e63e07	mlx4_mr_free
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xc245a911	mlx4_cq_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xce44f95a	mlx4_INIT_PORT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd8932fe4	mlx4_srq_arm
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xd8b66eba	mlx4_SYNC_TPT
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xea5a9e64	mlx4_mtt_init
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xedaf6978	mlx4_uar_alloc
+EXPORT_SYMBOL_GPL drivers/net/mlx4/mlx4_core 0xfb13f717	mlx4_unregister_mac
+EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0x85d5a7fd	usbnet_generic_cdc_bind
+EXPORT_SYMBOL_GPL drivers/net/usb/cdc_ether 0xf1dcc971	usbnet_cdc_unbind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x12f8228f	rndis_tx_fixup
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x736ccedc	rndis_command
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0x9cefd9eb	rndis_unbind
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xad4b0571	rndis_status
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xe2a2a0f5	rndis_rx_fixup
+EXPORT_SYMBOL_GPL drivers/net/usb/rndis_host 0xfa97d538	generic_rndis_bind
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x126ca262	usbnet_defer_kevent
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x26271d4f	usbnet_set_settings
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x318744db	usbnet_tx_timeout
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x351a4e6b	usbnet_resume_rx
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x3f04b6d2	usbnet_stop
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x557b658d	usbnet_get_settings
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x5926c093	usbnet_get_ethernet_addr
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x597a4f5c	usbnet_get_endpoints
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x8eaee675	usbnet_get_msglevel
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x96b19fb0	usbnet_resume
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x99f439f7	usbnet_get_drvinfo
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x9ccc4cb5	usbnet_set_msglevel
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0x9f12a756	usbnet_start_xmit
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xa44b6e46	usbnet_skb_return
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xaa2b391c	usbnet_unlink_rx_urbs
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xb191a681	usbnet_change_mtu
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xb685e55c	usbnet_disconnect
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xb85fd0f1	usbnet_purge_paused_rxq
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xcb345f2a	usbnet_get_link
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xd508a9fb	usbnet_suspend
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xda3dabf4	usbnet_nway_reset
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xdad25c65	usbnet_open
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xed5ebc7d	usbnet_probe
+EXPORT_SYMBOL_GPL drivers/net/usb/usbnet 0xf8fa8a96	usbnet_pause_rx
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x26a9669e	i2400m_tx_msg_sent
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x2bccc63a	i2400m_dev_reset_handle
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x30d4af14	i2400m_cmd_enter_powersave
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x31d60977	i2400m_set_init_config
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x57de610d	i2400m_cmd_get_state
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x5a1af1ea	i2400m_tx_msg_get
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0x93721275	i2400m_tx
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xa50d8a9e	i2400m_release
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xae5119c2	i2400m_rx
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xb00b793c	i2400m_bm_cmd_prepare
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xcd42aef2	i2400m_netdev_setup
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xf63b0a2a	i2400m_setup
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xf708d886	i2400m_queue_work
+EXPORT_SYMBOL_GPL drivers/net/wimax/i2400m/i2400m 0xf756bc50	i2400m_dev_bootstrap
+EXPORT_SYMBOL_GPL drivers/net/wireless/ipw2x00/libipw 0xdd444aed	libipw_rx_any
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x1a664dff	lbs_process_rxed_packet
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x2c34d08f	lbs_queue_event
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x2fb54713	lbs_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x4ba4c5ef	lbs_host_sleep_cfg
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x57ad23b4	lbs_cmd_copyback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x6e99a20c	lbs_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x78e7ec41	lbs_send_tx_feedback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x84180b2d	lbs_add_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x8860e3ba	__lbs_cmd
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x89abcf2a	lbs_stop_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0x949d65bb	lbs_remove_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xa16e49cb	lbs_notify_command_response
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xcf08881c	lbs_cmd_802_11_rate_adapt_rateset
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xdbeccbd5	lbs_host_to_card_done
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf5cbb314	lbs_start_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas/libertas 0xf64277de	lbs_debug
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x0bb1f3f1	lbtf_cmd_copyback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x271b5661	lbtf_cmd_response_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x3eea193b	lbtf_bcn_sent
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x5bb2d6c7	lbtf_send_tx_feedback
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x7dfb4ead	lbtf_remove_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x95bf0b7e	lbtf_add_card
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0x9c07fada	lbtf_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf 0xf774953f	__lbtf_cmd
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0x9e24ae57	if_usb_prog_firmware
+EXPORT_SYMBOL_GPL drivers/net/wireless/libertas_tf/libertas_tf_usb 0xdb8f2229	if_usb_reset_device
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x15e8ac64	p54_unregister_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x23d662c3	p54_rx
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x2f11900c	p54_init_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x34a7de65	p54_register_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x4ac4d902	p54_parse_firmware
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0x930ba7df	p54_parse_eeprom
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xd6564c34	p54_free_skb
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xe32509ef	p54_free_common
+EXPORT_SYMBOL_GPL drivers/net/wireless/p54/p54common 0xf0ced83d	p54_read_eeprom
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x0d49b205	rt2x00mac_config
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x19e63d58	rt2x00mac_stop
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x1b320d82	rt2x00mac_set_key
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x28f22119	rt2x00mac_add_interface
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x29fb7c20	rt2x00queue_get_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x31c614ff	rt2x00lib_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x3cd41c53	rt2x00lib_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x463ee467	rt2x00mac_conf_tx
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x47e48e83	rt2x00lib_remove_dev
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x4daa378f	rt2x00mac_tx
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x627b5a96	rt2x00mac_rfkill_poll
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x65025436	rt2x00queue_map_txskb
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x72f61809	rt2x00lib_rxdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x93022679	rt2x00mac_get_tx_stats
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0x97f01938	rt2x00lib_beacondone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xb52cd429	rt2x00mac_get_stats
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xb535969d	rt2x00mac_bss_info_changed
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xce67b015	rt2x00mac_start
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xce922564	rt2x00lib_txdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xcffd99d0	rt2x00mac_remove_interface
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xe4a7be04	rt2x00lib_probe_dev
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xe972e8bc	rt2x00mac_set_tim
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xf28f5e30	rt2x00queue_get_entry
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00lib 0xfe932533	rt2x00mac_configure_filter
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x12edb856	rt2x00pci_regbusy_read
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0x3bc80581	rt2x00pci_probe
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xaab99887	rt2x00pci_write_tx_data
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xab3038fb	rt2x00pci_initialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xade52f18	rt2x00pci_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xb8224a69	rt2x00pci_rxdone
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xd65036f4	rt2x00pci_remove
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xf23b0049	rt2x00pci_uninitialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00pci 0xf85d93fd	rt2x00pci_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x07a828a4	rt2x00usb_uninitialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x1495d058	rt2x00usb_disable_radio
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x14cee3e4	rt2x00usb_probe
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x1bb9adfa	rt2x00usb_disconnect
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x1d7978bb	rt2x00usb_regbusy_read
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x3b705888	rt2x00usb_resume
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x3d43dfb6	rt2x00usb_kill_tx_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x4e8cc63f	rt2x00usb_initialize
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x74dc484f	rt2x00usb_write_tx_data
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x7cbae9dd	rt2x00usb_suspend
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x80033f44	rt2x00usb_vendor_request_buff
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0x8da0926c	rt2x00usb_clear_entry
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xafb0ad3f	rt2x00usb_vendor_request
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xc5b3bc62	rt2x00usb_kick_tx_queue
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xdd6d16c9	rt2x00usb_vendor_request_large_buff
+EXPORT_SYMBOL_GPL drivers/net/wireless/rt2x00/rt2x00usb 0xfb8acf67	rt2x00usb_vendor_req_buff_lock
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0x363959a4	wl1251_alloc_hw
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0x7d3c2aaa	wl1251_free_hw
+EXPORT_SYMBOL_GPL drivers/net/wireless/wl12xx/wl1251 0xe3730c46	wl1251_init_ieee80211
+EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0xe8a1d539	pcf50633_mbc_usb_curlim_set
+EXPORT_SYMBOL_GPL drivers/power/pcf50633-charger 0xf1d01fd2	pcf50633_mbc_get_status
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x0436511c	wm8350_dcdc25_set_mode
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x17aa7f9a	wm8350_isink_set_flash
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x2e54b093	wm8350_register_led
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0x7d8dba6d	wm8350_register_regulator
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xa25ccc12	wm8350_ldo_set_slot
+EXPORT_SYMBOL_GPL drivers/regulator/wm8350-regulator 0xc4df2354	wm8350_dcdc_set_slot
+EXPORT_SYMBOL_GPL drivers/regulator/wm8400-regulator 0x78692ecc	wm8400_register_regulator
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x254de5e4	scsi_dh_attach
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x25849863	scsi_unregister_device_handler
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x593a36c2	scsi_dh_handler_exist
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x65a79fa4	scsi_dh_detach
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0x68977e76	scsi_register_device_handler
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0xabcec009	scsi_dh_set_params
+EXPORT_SYMBOL_GPL drivers/scsi/device_handler/scsi_dh 0xac6fe8fe	scsi_dh_activate
+EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x374c1e1c	fcoe_wwn_from_mac
+EXPORT_SYMBOL_GPL drivers/scsi/fcoe/libfcoe 0x5b212996	fcoe_libfc_config
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x0e6e857b	iscsi_requeue_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x108a1892	iscsi_conn_bind
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x1898376a	iscsi_session_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x1a0d7405	iscsi_update_cmdsn
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x1c4856b8	iscsi_suspend_queue
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x1e5bffb2	iscsi_conn_failure
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x246b8d47	iscsi_conn_send_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x254fb531	iscsi_change_queue_depth
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x2f01394a	iscsi_conn_stop
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x34de9d6f	iscsi_host_remove
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x37737208	iscsi_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x412e2714	iscsi_eh_device_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x494072f5	iscsi_conn_queue_work
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5d403da9	iscsi_set_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x5dadc84b	iscsi_itt_to_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x7a0ed48b	iscsi_verify_itt
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x7e609e84	iscsi_host_add
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x8431e194	iscsi_eh_target_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x851ffdcd	iscsi_conn_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x86b04bdc	iscsi_conn_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x89dfc675	iscsi_eh_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x8af42c4c	__iscsi_get_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x8b2397b9	iscsi_put_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x9705df0a	iscsi_conn_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x9785ec28	iscsi_pool_init
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0x9d42aae8	__iscsi_complete_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xa2956867	iscsi_suspend_tx
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xac8f4667	iscsi_host_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xafa48746	iscsi_host_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb1491fb1	iscsi_complete_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb7a82329	iscsi_complete_scsi_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xb8938ef3	iscsi_host_get_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xcc9ddb1e	iscsi_queuecommand
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xcd2db015	iscsi_itt_to_ctask
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xd30cc52b	iscsi_session_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xd7422033	iscsi_session_failure
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xde6be962	iscsi_conn_start
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe2cf1a82	iscsi_pool_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe31d9306	iscsi_session_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xe5360fa4	iscsi_prep_data_out_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xea752d6f	iscsi_session_recovery_timedout
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi 0xf1b3c2a8	iscsi_host_set_param
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x04cb2bb2	iscsi_tcp_recv_skb
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x1b12371b	iscsi_segment_seek_sg
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x256c8b85	iscsi_tcp_recv_segment_is_hdr
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x30c331fc	iscsi_tcp_r2tpool_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x323469fc	iscsi_tcp_task_init
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x3440262d	iscsi_tcp_hdr_recv_prep
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x90f45376	iscsi_tcp_dgst_header
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x9622050b	iscsi_tcp_segment_done
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x9e4f6064	iscsi_tcp_task_xmit
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0x9f4f6605	iscsi_tcp_cleanup_task
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xa75e3308	iscsi_tcp_r2tpool_free
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xad4bb859	iscsi_segment_init_linear
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xca5abbfe	iscsi_tcp_conn_get_stats
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xcb41aa34	iscsi_tcp_segment_unmap
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xcd81ab9a	iscsi_tcp_conn_teardown
+EXPORT_SYMBOL_GPL drivers/scsi/libiscsi_tcp 0xd034ff21	iscsi_tcp_conn_setup
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x13420164	sas_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x1f9f77d9	sas_bios_param
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x252debe0	sas_phy_enable
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x327467e7	sas_change_queue_depth
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x36c49c79	sas_task_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x3b9900c7	sas_slave_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x3c623886	sas_find_local_phy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x43238ffa	sas_ssp_task_response
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x4734c1ca	sas_phy_reset
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x4a371270	sas_slave_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x5a5c81fe	__sas_task_abort
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x738c7e26	sas_unregister_ha
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x884c1b3f	sas_ioctl
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x91902869	sas_eh_device_reset_handler
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0x9a78b15b	sas_slave_configure
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xc51e3c12	sas_domain_release_transport
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xca1e8577	sas_request_addr
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xd16195ae	sas_target_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xd17582fa	sas_change_queue_type
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xdca7f1d4	sas_eh_bus_reset_handler
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xf7bb1369	sas_queuecommand
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xfe76129e	sas_domain_attach_transport
+EXPORT_SYMBOL_GPL drivers/scsi/libsas/libsas 0xfea8c45c	sas_register_ha
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x072c2c6c	srp_iu_put
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x6749ff7a	srp_target_free
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x675b24ef	srp_iu_get
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x6b7257ad	srp_cmd_queue
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x6d7cb8ff	srp_transfer_data
+EXPORT_SYMBOL_GPL drivers/scsi/libsrp 0x7a960e35	srp_target_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x116b6066	scsi_target_unblock
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x26c90ea4	scsi_eh_get_sense
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x2720c60e	scsi_flush_work
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x2d23fda2	scsi_internal_device_unblock
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x35d8c94a	sdev_evt_alloc
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x484bf5ba	scsi_eh_ready_devs
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x75affebd	__scsi_get_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x7e275ea8	scsi_complete_async_scans
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0x82c70257	scsi_nl_sock
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xa0366f59	scsi_bus_type
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xa6e9c94f	scsi_schedule_eh
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xb7e072a6	scsi_mode_select
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xb98e016e	scsi_queue_work
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xbae34c27	scsi_nl_remove_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xc2fa0330	scsi_target_block
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xc399468f	scsi_nl_remove_driver
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xc8f8c777	sdev_evt_send
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xc9ee5b15	scsi_nl_add_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xd2522ad2	scsi_nl_add_driver
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xd6e589e0	scsi_get_vpd_page
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xe76806fb	scsi_internal_device_block
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xeae74760	scsi_nl_send_transport_msg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_mod 0xedece8d4	sdev_evt_send_simple
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x2d08de52	scsi_tgt_free_queue
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x38c40d2d	scsi_tgt_it_nexus_create
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x39d0a3e7	scsi_tgt_tsk_mgmt_request
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0x53dcf3d5	scsi_tgt_cmd_to_host
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xc9646b4b	scsi_tgt_queue_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xd4d7704f	scsi_tgt_it_nexus_destroy
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xd71be831	scsi_host_get_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xe695fc8a	scsi_tgt_alloc_queue
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_tgt 0xefa59361	scsi_host_put_command
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x17c7a523	iscsi_create_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x1e873a8a	iscsi_session_chkready
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x2509e8a4	iscsi_block_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x26bdef3f	iscsi_destroy_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x384b9d0d	iscsi_remove_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x44299809	iscsi_create_conn
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x45030bb9	iscsi_add_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x4b443524	iscsi_unregister_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x643e1543	iscsi_lookup_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x78539fae	iscsi_unblock_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x7bef334a	iscsi_offload_mesg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x7f9d6137	iscsi_destroy_conn
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0x844a4633	iscsi_recv_pdu
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xb794fbec	iscsi_free_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xca6bc9e0	iscsi_destroy_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xd9d12188	iscsi_session_event
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xdd1afb39	iscsi_conn_error_event
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xe426e40d	iscsi_create_endpoint
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xedb0c834	iscsi_register_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xeedd6afb	iscsi_alloc_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xf424dca4	iscsi_host_for_each_session
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_iscsi 0xf65c7010	iscsi_scan_finished
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0x0ef06974	spi_populate_ppr_msg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xa0c71dac	spi_populate_sync_msg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_spi 0xcffa2aff	spi_populate_width_msg
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x13663762	srp_attach_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x464e7c74	srp_rport_del
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0x63516fa9	srp_release_transport
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xb41a6ea2	srp_rport_add
+EXPORT_SYMBOL_GPL drivers/scsi/scsi_transport_srp 0xddd2d2f7	srp_remove_host
+EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0x43ef3a1b	pciserial_remove_ports
+EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0xa1044f7c	pciserial_resume_ports
+EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0xc7f7a379	pciserial_init_ports
+EXPORT_SYMBOL_GPL drivers/serial/8250_pci 0xd728c72d	pciserial_suspend_ports
+EXPORT_SYMBOL_GPL drivers/sn/ioc3 0x051468b8	ioc3_register_submodule
+EXPORT_SYMBOL_GPL drivers/sn/ioc3 0x08f716ff	ioc3_enable
+EXPORT_SYMBOL_GPL drivers/sn/ioc3 0x16394162	ioc3_ack
+EXPORT_SYMBOL_GPL drivers/sn/ioc3 0x4858a04d	ioc3_unregister_submodule
+EXPORT_SYMBOL_GPL drivers/sn/ioc3 0xc505cdc9	ioc3_disable
+EXPORT_SYMBOL_GPL drivers/sn/ioc3 0xf21aaa6b	ioc3_gpcr_set
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x15030d36	spi_bitbang_cleanup
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0x49576f7e	spi_bitbang_setup_transfer
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xab0a7f8a	spi_bitbang_transfer
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xdf89ef9d	spi_bitbang_start
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xf85ab1f5	spi_bitbang_setup
+EXPORT_SYMBOL_GPL drivers/spi/spi_bitbang 0xfc41dac7	spi_bitbang_stop
+EXPORT_SYMBOL_GPL drivers/uio/uio 0x9f0b30e5	uio_unregister_device
+EXPORT_SYMBOL_GPL drivers/uio/uio 0xa7e65980	__uio_register_device
+EXPORT_SYMBOL_GPL drivers/uio/uio 0xab76e5a1	uio_event_notify
+EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0x65080138	usbatm_usb_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/atm/usbatm 0xe2cab6f8	usbatm_usb_probe
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x15182b79	usb_ftdi_elan_edset_output
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x17e18cb8	usb_ftdi_elan_edset_empty
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x1a27520f	usb_ftdi_elan_read_pcimem
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x2b2965b9	usb_ftdi_elan_edset_input
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x4b03b3ba	usb_ftdi_elan_edset_flush
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x56f329ac	usb_ftdi_elan_write_pcimem
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0x8de3cfe9	usb_ftdi_elan_edset_setup
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xba6d4412	ftdi_elan_gone_away
+EXPORT_SYMBOL_GPL drivers/usb/misc/ftdi-elan 0xc5a4c773	usb_ftdi_elan_edset_single
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x0c373f36	usb_serial_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x5906fbd8	usb_serial_generic_write
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x797e5882	usb_serial_generic_resume
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x7b207526	ezusb_set_reset
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x7d95fd81	usb_serial_handle_break
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0x856b8585	usb_serial_register
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xaef324ee	usb_serial_port_softint
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xbd948954	usb_serial_generic_open
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xc2159d45	usb_serial_probe
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xcc55b5e8	usb_serial_generic_resubmit_read_urb
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xe4aef706	usb_serial_generic_write_bulk_callback
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xe7b5ab04	usb_serial_deregister
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xe84565cf	usb_serial_generic_read_bulk_callback
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xebfe3c49	usb_serial_handle_sysrq_char
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xf149acd2	usb_serial_handle_dcd_change
+EXPORT_SYMBOL_GPL drivers/usb/serial/usbserial 0xfcf464c2	ezusb_writememory
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x070be41d	usb_stor_access_xfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x0be13004	usb_storage_usb_ids
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1865f79e	usb_stor_bulk_transfer_sg
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1ad0f08f	usb_stor_clear_halt
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1bc3edc2	usb_stor_sense_invalidCDB
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x1e604d24	usb_stor_pre_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x20224034	usb_stor_ctrl_transfer
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x264f5eb7	usb_stor_CB_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x36f4f10b	usb_stor_control_msg
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x38a3bb9f	usb_stor_bulk_transfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x47f36f12	usb_stor_set_xfer_buf
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x4864a4b9	usb_stor_transparent_scsi_command
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x53e0b1f3	usb_stor_probe2
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x5e212a3a	usb_stor_post_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x7fa98f45	usb_stor_resume
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x92597360	fill_inquiry_response
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0x98d4e4c1	usb_usual_ignore_device
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xac10dc35	usb_stor_reset_resume
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xbcc3c050	usb_stor_Bulk_transport
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xc1703239	usb_stor_suspend
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xcb49c3d2	usb_stor_Bulk_reset
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xd257b57b	usb_stor_bulk_srb
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xdc2ba25a	usb_stor_probe1
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xf27719a3	usb_stor_disconnect
+EXPORT_SYMBOL_GPL drivers/usb/storage/usb-storage 0xf336d160	usb_stor_CB_transport
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x116a6de3	wa_urb_dequeue
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x5b0fc154	wa_urb_enqueue_run
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x71a1ca82	wa_urb_enqueue
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x801bed91	wa_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0x8668d134	rpipe_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xc422dc10	rpipe_ep_disable
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusb-wa 0xf8caae81	__wa_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x04da44f6	__wusb_dev_get_by_usb_dev
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x07730991	wusbhc_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x0bb6bf5e	wusb_cluster_id_get
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x1d9992e7	wusbhc_rh_status_data
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x2bb566eb	wusbhc_rh_resume
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x30eaff92	wusbhc_handle_dn
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x42a0c1ae	wusbhc_b_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x63a06234	wusbhc_mmcie_rm
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x6dc53aa9	wusbhc_b_create
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x715a8549	wusbhc_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x7595b3e0	wusbhc_rh_start_port_reset
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0x81eb3c65	wusbhc_rh_suspend
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xa4b86630	wusbhc_rh_control
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb0b8d391	wusbhc_giveback_urb
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xb725d128	wusb_cluster_id_put
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xccce4e36	wusbhc_reset_all
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xdf6e4f08	wusb_dev_destroy
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xef22e7a7	wusbhc_mmcie_set
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf296a200	wusbhc_chid_set
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xf770a6b4	wusbd
+EXPORT_SYMBOL_GPL drivers/usb/wusbcore/wusbcore 0xfe2e17d7	wusb_et_name
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0xcf97fa78	i1480_rceb_check
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0xd3323d10	i1480_fw_upload
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/dfu/i1480-dfu-usb 0xf3f7be5c	i1480_cmd
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x0f2a764b	uwb_pca_base_priority_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x41b4c318	uwb_ack_policy_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x5e4ac55e	uwb_phy_rate_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x69f52b76	uwb_phy_rate_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x77017798	uwb_pca_base_priority_store
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0x90dcc8c6	uwb_rts_cts_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xa39bd71e	uwb_ack_policy_show
+EXPORT_SYMBOL_GPL drivers/uwb/i1480/i1480u-wlp/i1480u-wlp 0xc4d8f53e	uwb_rts_cts_store
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x0eac82fc	umc_bus_type
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x13777731	umc_driver_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x2bbd64f1	umc_device_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x5caf46ac	umc_controller_reset
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x64cc6ea3	umc_device_register
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0x935a1e62	umc_match_pci_id
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xa43337c5	umc_device_create
+EXPORT_SYMBOL_GPL drivers/uwb/umc 0xd1c1affe	__umc_driver_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x004e8968	uwb_rsv_destroy
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x022d573b	uwb_rsv_modify
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0bf89d1e	uwb_est_find_size
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x0e4465f3	uwb_pal_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x118e28e9	uwb_rsv_establish
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x184365b0	uwb_notifs_deregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x1ce3b275	uwb_rc_dev_addr_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x36224ae7	uwb_rc_cmd
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x3897127c	uwb_rc_reset_all
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x443a76fd	uwb_rc_put
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4d57ae3c	uwb_rsv_type_str
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x4f967d79	uwb_rc_get_by_grandpa
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x51babbda	uwb_rc_init
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5bb3bc6a	uwb_rsv_terminate
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5bd8d4ca	uwb_rc_add
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x5c1298f5	uwb_rc_ie_add
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x60194a5a	uwb_rc_get_by_dev
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x61b3df73	uwb_pal_init
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6951c9db	uwb_rc_neh_error
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x6b9377c5	uwb_ie_next
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x712799af	uwb_rc_cmd_async
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x74110844	uwb_rc_alloc
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x79e33be9	uwb_notifs_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x875f8d64	uwb_rc_rm
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x8cb42db6	__uwb_addr_print
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x9306b5c2	uwb_rc_neh_grok
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x9759e2f7	uwb_radio_stop
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x98413234	uwb_rsv_state_str
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0x9cce0da2	uwb_rsv_accept
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xacc450ea	uwb_dev_for_each
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xad401815	uwb_radio_start
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xada1087d	uwb_rc_post_reset
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xb54f59d5	uwb_rc_pre_reset
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xd691010d	uwb_rsv_create
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xeb4cab9a	uwb_est_register
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xed0aa451	__uwb_rc_try_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xedfd05e1	uwb_pal_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xee09f337	uwb_rsv_get_usable_mas
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xeeb1f467	uwb_rc_mac_addr_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf654d545	uwb_rc_ie_rm
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf7ca313a	uwb_est_unregister
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xf9da8fde	uwb_dev_try_get
+EXPORT_SYMBOL_GPL drivers/uwb/uwb 0xfeca04e4	uwb_rc_vcmd
+EXPORT_SYMBOL_GPL drivers/uwb/whci 0xb0240c80	whci_wait_for
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x09d486fe	wlp_reset_all
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x0e30d8a1	wlp_wss_activate_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x20965517	wlp_dev_serial_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x22825c38	wlp_eda_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x2638f033	wlp_receive_frame
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x2978a458	wlp_eda_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x2e7266dc	wlp_dev_prim_OUI_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x350e2e07	wlp_dev_prim_category_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x49cb3785	wlp_dev_name_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x4c62d46a	wlp_dev_prim_subcat_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x58073099	wlp_dev_prim_subcat_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x606352ea	wlp_dev_model_name_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x63267b62	wlp_wss_activate_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x714187fa	wlp_uuid_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x79b3692b	wlp_dev_manufacturer_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x7db3fa19	wlp_wss_setup
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0x987f1983	wlp_dev_model_name_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xa30fc849	wlp_dev_model_nr_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xa5df159c	wlp_prepare_tx_frame
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xa869024d	wlp_dev_prim_category_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xb3f2e74b	wlp_setup
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xb7ae3676	wlp_dev_prim_OUI_sub_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xc0fbb137	wlp_dev_prim_OUI_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xc12d1c7e	wlp_dev_manufacturer_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xc85a4e35	wlp_uuid_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xcba4b8d4	wlp_neighborhood_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xce178d04	wlp_remove
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xd191e43d	wlp_dev_model_nr_show
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xd99da94c	wlp_dev_serial_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xe1ced9e5	wlp_wss_remove
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xec6645d7	wlp_dev_prim_OUI_sub_store
+EXPORT_SYMBOL_GPL drivers/uwb/wlp/wlp 0xf5a1cd9f	wlp_dev_name_show
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x03d62703	ili9320_remove
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x0c10b8e7	ili9320_suspend
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0x791a67b2	ili9320_write
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xdafc2c97	ili9320_write_regs
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xddbefaab	ili9320_shutdown
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xfbda18e2	ili9320_resume
+EXPORT_SYMBOL_GPL drivers/video/backlight/ili9320 0xfc4b002e	ili9320_probe_spi
+EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0x79a542f7	fb_sys_read
+EXPORT_SYMBOL_GPL drivers/video/fb_sys_fops 0x9fd057c4	fb_sys_write
+EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0xd4cd1472	sis_free_new
+EXPORT_SYMBOL_GPL drivers/video/sis/sisfb 0xd89e4290	sis_malloc_new
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x1064c68a	w1_touch_block
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x49e4ac1e	w1_write_8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x77d9732b	w1_read_block
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x7c2f2afb	w1_calc_crc8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x7df1cf7b	w1_reset_select_slave
+EXPORT_SYMBOL_GPL drivers/w1/wire 0x8e11046f	w1_read_8
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xc333009b	w1_next_pullup
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xe5b3970f	w1_reset_bus
+EXPORT_SYMBOL_GPL drivers/w1/wire 0xe83f5038	w1_write_block
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x0864c4a4	dlm_new_lockspace
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x2cea5b84	dlm_posix_get
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x4a5dc572	dlm_posix_unlock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x9321df95	dlm_lock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0x93abd075	dlm_posix_lock
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xcf9f3328	dlm_release_lockspace
+EXPORT_SYMBOL_GPL fs/dlm/dlm 0xdc583c08	dlm_unlock
+EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0x2a8dd08f	exportfs_decode_fh
+EXPORT_SYMBOL_GPL fs/exportfs/exportfs 0x617a2074	exportfs_encode_fh
+EXPORT_SYMBOL_GPL fs/fat/fat 0x0b5b6bf5	fat_free_clusters
+EXPORT_SYMBOL_GPL fs/fat/fat 0x2f5e210e	fat_time_unix2fat
+EXPORT_SYMBOL_GPL fs/fat/fat 0x2f7fcbf5	fat_setattr
+EXPORT_SYMBOL_GPL fs/fat/fat 0x45458239	fat_build_inode
+EXPORT_SYMBOL_GPL fs/fat/fat 0x45bd0338	fat_alloc_new_dir
+EXPORT_SYMBOL_GPL fs/fat/fat 0x4d70de95	fat_sync_inode
+EXPORT_SYMBOL_GPL fs/fat/fat 0x56d73f0f	fat_remove_entries
+EXPORT_SYMBOL_GPL fs/fat/fat 0x7329497e	fat_add_entries
+EXPORT_SYMBOL_GPL fs/fat/fat 0x76f85868	fat_fill_super
+EXPORT_SYMBOL_GPL fs/fat/fat 0x7c3f515a	fat_detach
+EXPORT_SYMBOL_GPL fs/fat/fat 0x84426ba5	fat_fs_error
+EXPORT_SYMBOL_GPL fs/fat/fat 0x8a9c4d1d	fat_getattr
+EXPORT_SYMBOL_GPL fs/fat/fat 0x92c916e8	fat_get_dotdot_entry
+EXPORT_SYMBOL_GPL fs/fat/fat 0x9aa4fa57	fat_attach
+EXPORT_SYMBOL_GPL fs/fat/fat 0x9de86a7c	fat_flush_inodes
+EXPORT_SYMBOL_GPL fs/fat/fat 0xaf6a1178	fat_dir_empty
+EXPORT_SYMBOL_GPL fs/fat/fat 0xb593a8bf	fat_scan
+EXPORT_SYMBOL_GPL fs/fat/fat 0xef3e8462	fat_search_long
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x17ce645d	locks_end_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x1a618932	nlmsvc_unlock_all_by_ip
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x26f95d39	nlmclnt_done
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x2ed0796b	nlmsvc_unlock_all_by_sb
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x47e6649e	nlmclnt_proc
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x6f959b35	locks_in_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x87f0bd4a	nlmclnt_init
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0x96877ac4	locks_start_grace
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xa7b91a7b	lockd_down
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xeb1ba1f4	nlmsvc_ops
+EXPORT_SYMBOL_GPL fs/lockd/lockd 0xf6933c48	lockd_up
+EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0x52953376	nfsacl_encode
+EXPORT_SYMBOL_GPL fs/nfs_common/nfs_acl 0x91834d40	nfsacl_decode
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x054f4f43	o2nm_get_node_by_ip
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1b89c6ee	o2hb_fill_node_map
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x1d747ce3	o2hb_check_node_heartbeating
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x36418553	o2net_send_message
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x3adad3a0	o2hb_unregister_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x41234997	o2nm_get_node_by_num
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x4900035b	o2hb_stop_all_regions
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x521e0726	o2net_send_message_vec
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x7291c08e	o2nm_node_put
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x81a17396	mlog_and_bits
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x9291be13	o2hb_setup_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0x9c070fb5	o2nm_node_get
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa82a8645	o2nm_this_node
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xa87bc9e7	o2nm_configured_node_map
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xae808bac	o2net_register_handler
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xbaeb4700	o2hb_check_node_heartbeating_from_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xc91c0827	o2hb_register_callback
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xd60f2c6c	o2hb_check_local_node_heartbeating
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf1a5611d	o2net_unregister_handler_list
+EXPORT_SYMBOL_GPL fs/ocfs2/cluster/ocfs2_nodemanager 0xf56c2017	mlog_not_bits
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x00950468	dlm_register_domain
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x6a30c1a2	dlm_print_one_lock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x7a1211f8	dlm_setup_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0x80b1f00e	dlmunlock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xa7ffd302	dlm_register_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd7ba575e	dlm_errmsg
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xd8fa57a6	dlm_unregister_eviction_cb
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xda0d827d	dlmlock
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xe2001810	dlm_unregister_domain
+EXPORT_SYMBOL_GPL fs/ocfs2/dlm/ocfs2_dlm 0xfb86b96f	dlm_errname
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0562c415	ocfs2_cluster_this_node
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x06379db6	ocfs2_dlm_lvb_valid
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x0e27f909	ocfs2_dlm_lock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x21db5b88	ocfs2_cluster_disconnect
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x233cc1c8	ocfs2_stack_glue_register
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x3eec30e4	ocfs2_plock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4a1f6fe9	ocfs2_cluster_connect
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x4d3af7fa	ocfs2_cluster_hangup
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x81c85a68	ocfs2_dlm_lock_status
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x91fab465	ocfs2_dlm_lvb
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0x963932a3	ocfs2_stack_glue_set_locking_protocol
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xa7d5c1c0	ocfs2_dlm_unlock
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xbbc4ef97	ocfs2_stack_supports_plocks
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xc3e622ad	ocfs2_stack_glue_unregister
+EXPORT_SYMBOL_GPL fs/ocfs2/ocfs2_stackglue 0xd066711e	ocfs2_dlm_dump_lksb
+EXPORT_SYMBOL_GPL lib/lzo/lzo_compress 0x2e1d43cf	lzo1x_1_compress
+EXPORT_SYMBOL_GPL lib/lzo/lzo_decompress 0x2a1538ca	lzo1x_decompress_safe
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x300d7e57	free_rs
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0x6fbb3bd9	init_rs_non_canonical
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xabda1e2e	decode_rs16
+EXPORT_SYMBOL_GPL lib/reed_solomon/reed_solomon 0xb050f329	init_rs
+EXPORT_SYMBOL_GPL net/802/garp 0x05538c27	garp_unregister_application
+EXPORT_SYMBOL_GPL net/802/garp 0x15dcfa5f	garp_register_application
+EXPORT_SYMBOL_GPL net/802/garp 0x59ce6fe4	garp_init_applicant
+EXPORT_SYMBOL_GPL net/802/garp 0x8ca2a78e	garp_request_join
+EXPORT_SYMBOL_GPL net/802/garp 0xb0fdb022	garp_uninit_applicant
+EXPORT_SYMBOL_GPL net/802/garp 0xe5321dd3	garp_request_leave
+EXPORT_SYMBOL_GPL net/802/stp 0x034fb3e9	stp_proto_register
+EXPORT_SYMBOL_GPL net/802/stp 0x1d55a5fd	stp_proto_unregister
+EXPORT_SYMBOL_GPL net/ax25/ax25 0xa4e1dc91	ax25_register_pid
+EXPORT_SYMBOL_GPL net/ax25/ax25 0xac93ae05	ax25_bcast
+EXPORT_SYMBOL_GPL net/ax25/ax25 0xaeb7451e	ax25_defaddr
+EXPORT_SYMBOL_GPL net/bluetooth/bluetooth 0x1fa69c23	bt_class
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0x6d40a921	need_ipv4_conntrack
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_conntrack_ipv4 0xe99a2b4f	nf_nat_seq_adjust_hook
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_defrag_ipv4 0x6b6c3d10	nf_defrag_ipv4_enable
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x07ae60b6	nf_nat_proto_in_range
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x1117ca78	nf_nat_proto_range_to_nlattr
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x1ccc2f00	nf_nat_proto_put
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x2d709321	nf_nat_get_offset
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x331284da	nf_nat_proto_find_get
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x535b37fa	nf_nat_proto_unique_tuple
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x6fbd1a02	nf_nat_icmp_reply_translation
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0x94a08134	nf_nat_proto_nlattr_to_range
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat 0xe50c69a4	nf_nat_packet
+EXPORT_SYMBOL_GPL net/ipv4/netfilter/nf_nat_proto_gre 0x636b12c8	nf_nat_need_gre
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0x0c5a2a61	tcp_vegas_state
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xae9ed303	tcp_vegas_init
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xb2eea0e0	tcp_vegas_cwnd_event
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xb522376d	tcp_vegas_pkts_acked
+EXPORT_SYMBOL_GPL net/ipv4/tcp_vegas 0xc48c3467	tcp_vegas_get_info
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x08a3e5d1	net_ipv6_ctl_path
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x2f97cfcc	ip6_local_out
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x346676ca	fl6_sock_lookup
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x5ab9b284	inet6_sk_rebuild_header
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x64d68cea	ipv6_find_tlv
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x79904077	inet6_csk_search_req
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x8156758a	inet6_csk_reqsk_queue_hash_add
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x8414e9b4	inet6_csk_addr2sockaddr
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x85478a0b	inet6_hash_frag
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x8c7ce9bb	inet6_destroy_sock
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0x8d22a56b	ipv6_opt_accepted
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xade11d9d	inet6_csk_bind_conflict
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xbfbadf29	ipv6_dup_options
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xcd67ba15	ip6_dst_lookup
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xddc04360	ip6_sk_dst_lookup
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xe57c2dab	inet6_csk_xmit
+EXPORT_SYMBOL_GPL net/ipv6/ipv6 0xf1dccb2c	ip6_dst_blackhole
+EXPORT_SYMBOL_GPL net/mac80211/mac80211 0xb3e2e728	ieee80211_iterate_active_interfaces
+EXPORT_SYMBOL_GPL net/mac80211/mac80211 0xea948951	ieee80211_iterate_active_interfaces_atomic
+EXPORT_SYMBOL_GPL net/netfilter/ipvs/ip_vs 0xe6476b4a	net_vs_ctl_path
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x045072cd	nf_ct_port_nla_policy
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x0c41d4c8	nf_ct_helper_ext_add
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x12874095	nf_ct_nat_offset
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x18bb5102	nf_conntrack_unregister_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x1a477f8c	nf_ct_remove_expectations
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x1ba9e338	__nf_ct_expect_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x1c6e1a67	nf_ct_l3proto_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x1e42a589	nfnetlink_parse_nat_setup_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x1e587154	nf_conntrack_l4proto_tcp6
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x1e94c81a	__nf_conntrack_helper_find_byname
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x255e0ff7	nf_ct_insert_dying_list
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x29e3b56c	nf_conntrack_hash_insert
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x2c0e63b7	nf_ct_get_tuplepr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x2c6e13d6	nf_conntrack_l4proto_tcp4
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x2d4ee9d5	seq_print_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x2f030f38	nf_conntrack_l4proto_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x332be5cd	__nf_conntrack_confirm
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3ba3d396	nf_conntrack_event_cb
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3cb8480d	nf_ct_expect_register_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x3f5b1415	nf_ct_port_nlattr_to_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4a6807f0	nf_conntrack_flush_report
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x4b9065a9	nf_ct_alloc_hashtable
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5882ba33	nf_conntrack_set_hashsize
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5b27f2a9	nf_conntrack_helper_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x5fce44bc	nf_conntrack_l3proto_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x62813e5c	nf_ct_port_nlattr_tuple_size
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x64ee78b2	nf_conntrack_untracked
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x69cadf7f	nf_conntrack_lock
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6e224a7a	need_conntrack
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x6f951554	nf_conntrack_register_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x70c86c78	nf_ct_extend_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x770710df	__nf_ct_l4proto_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x78f9b710	nf_ct_l3proto_try_module_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x7ebffe3d	nf_ct_expect_unregister_notifier
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x7fd81776	nf_ct_expect_alloc
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x83573190	nf_conntrack_in
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x843f7ebc	nf_conntrack_free
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x86092fc0	nf_ct_get_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8672f3f4	nf_expect_event_cb
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x8ffe7e89	nf_conntrack_htable_size
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x90ff6c9f	nf_ct_invert_tuplepr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x99db49dc	nf_conntrack_alter_reply
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9af3f6c1	nf_ct_free_hashtable
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9bc256ee	nf_conntrack_l4proto_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9d648d32	nf_ct_unexpect_related
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9f5a302f	nf_ct_expect_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9f693f28	nf_ct_expect_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0x9fd2f0ed	nf_conntrack_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xa22692e1	nf_ct_invert_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xa436b3c2	nf_conntrack_l3proto_generic
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xa9798b23	nf_conntrack_helper_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xaac4813c	nf_ct_iterate_cleanup
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xad32ee88	nf_conntrack_l3proto_register
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xaf098cf5	nf_conntrack_alloc
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb4f75459	nf_ct_port_tuple_to_nlattr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb5b2a1c9	print_tuple
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb602c57e	nf_ct_l3proto_module_put
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xb97246d7	nf_ct_delete_from_lists
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc00af520	nf_conntrack_tuple_taken
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc11e74a9	__nf_conntrack_find
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xc18ac88d	nf_ct_expect_hsize
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xd416da3d	__nf_ct_kill_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xddcb3dc8	nf_ct_expect_init
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xddd93ed7	__nf_ct_try_assign_helper
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xdf985ace	nf_conntrack_l4proto_udp6
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xe65d2909	nf_ct_l3proto_find_get
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xe8fa1f77	nf_ct_deliver_cached_events
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xedae384c	nf_conntrack_l4proto_udp4
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xefcc732f	nf_ct_extend_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf3215f8b	nf_ct_l3protos
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xf38bcdf3	nf_conntrack_max
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xfa31e57e	__nf_ct_refresh_acct
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xfa5b5655	nf_ct_expect_related_report
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack 0xfd2eba7e	nf_ct_unlink_expect
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_amanda 0x4c5be7cf	nf_nat_amanda_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_ftp 0x4f695ba9	nf_nat_ftp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x10b1c5f5	nat_rtp_rtcp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x29fbe847	set_h225_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x6176efbe	set_h245_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0x935aba15	set_sig_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xa2af2b8e	nat_callforwarding_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xa2e4b74e	nat_t120_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xa75dcee5	nat_h245_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xc771d34a	get_h225_addr
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xce444d6b	set_ras_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_h323 0xd175c11f	nat_q931_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_irc 0x5a29b03a	nf_nat_irc_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x10f3459f	nf_nat_pptp_hook_expectfn
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x2ed8784d	nf_nat_pptp_hook_outbound
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0x91917940	nf_nat_pptp_hook_exp_gre
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_pptp 0xfeabfb05	nf_nat_pptp_hook_inbound
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_proto_gre 0x500f3745	nf_ct_gre_keymap_destroy
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_proto_gre 0xc45a512c	nf_ct_gre_keymap_add
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x01dde057	ct_sip_get_header
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x0e524be9	nf_nat_sip_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x0fd700a9	nf_nat_sip_expect_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x1327741c	nf_nat_sdp_media_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x22e0e067	ct_sip_get_sdp_header
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x64a5affc	ct_sip_parse_numerical_param
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x756f0007	ct_sip_parse_header_uri
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x8db1d71f	nf_nat_sdp_port_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0x937f500f	nf_nat_sdp_addr_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xa88277ac	ct_sip_parse_address_param
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xee73f2cc	nf_nat_sdp_session_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_sip 0xf7959c88	ct_sip_parse_request
+EXPORT_SYMBOL_GPL net/netfilter/nf_conntrack_tftp 0x673da83c	nf_nat_tftp_hook
+EXPORT_SYMBOL_GPL net/netfilter/nf_tproxy_core 0x377b1326	nf_tproxy_assign_sock
+EXPORT_SYMBOL_GPL net/netfilter/nf_tproxy_core 0xeb55c8f5	nf_tproxy_get_sock_v4
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x0c23101e	nfnetlink_subsys_unregister
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x1f58e71b	nfnl_lock
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x20708563	nfnetlink_send
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x3895cd7a	nfnl_unlock
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0x67539f92	nfnetlink_subsys_register
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xe267ca3c	nfnetlink_unicast
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xeca95329	nfnetlink_has_listeners
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink 0xef9b4bbd	nfnetlink_set_err
+EXPORT_SYMBOL_GPL net/netfilter/nfnetlink_log 0x7958035d	nfulnl_log_packet
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x07ec5c3d	per_cpu__xt_info_locks
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x161d1417	xt_compat_unlock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x2b36a4c8	xt_compat_match_to_user
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x301288c6	xt_check_target
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x40728a63	xt_find_revision
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x43080e97	xt_request_find_target
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x507dbc38	xt_compat_target_to_user
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x526986c7	xt_unregister_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x52fb96d4	xt_replace_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x5f82f1f7	xt_compat_flush_offsets
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x6155dde8	xt_proto_init
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x684694c5	xt_compat_add_offset
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x6f9aa2fb	xt_compat_calc_jump
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0x8b4d913c	xt_table_unlock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xa4713f18	xt_compat_target_offset
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xb2e2bd4f	xt_compat_match_offset
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xbf213d05	xt_compat_match_from_user
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xe0b4971b	xt_compat_lock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xeaaa5d87	xt_check_match
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xef25e138	xt_proto_fini
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xf003575b	xt_find_table_lock
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xf291ebd0	xt_register_table
+EXPORT_SYMBOL_GPL net/netfilter/x_tables 0xf5a5c766	xt_compat_target_from_user
+EXPORT_SYMBOL_GPL net/rds/rds 0x00a467af	rds_wq
+EXPORT_SYMBOL_GPL net/rds/rds 0x0890594e	rds_rdma_send_complete
+EXPORT_SYMBOL_GPL net/rds/rds 0x1abe527e	rds_page_copy_user
+EXPORT_SYMBOL_GPL net/rds/rds 0x23c3759b	rds_cong_map_updated
+EXPORT_SYMBOL_GPL net/rds/rds 0x2c5c5514	rds_message_add_rdma_dest_extension
+EXPORT_SYMBOL_GPL net/rds/rds 0x3101936e	rds_message_add_extension
+EXPORT_SYMBOL_GPL net/rds/rds 0x31e428a9	rds_message_put
+EXPORT_SYMBOL_GPL net/rds/rds 0x32312e1e	rds_info_register_func
+EXPORT_SYMBOL_GPL net/rds/rds 0x566df283	rds_conn_create_outgoing
+EXPORT_SYMBOL_GPL net/rds/rds 0x62ba2f44	rds_trans_register
+EXPORT_SYMBOL_GPL net/rds/rds 0x6ef82838	rds_for_each_conn_info
+EXPORT_SYMBOL_GPL net/rds/rds 0x73aac73d	rds_message_populate_header
+EXPORT_SYMBOL_GPL net/rds/rds 0x77751e3c	rds_recv_incoming
+EXPORT_SYMBOL_GPL net/rds/rds 0x8def75dd	rds_inc_addref
+EXPORT_SYMBOL_GPL net/rds/rds 0x90534b6d	rds_connect_complete
+EXPORT_SYMBOL_GPL net/rds/rds 0x93e5d198	rds_inc_put
+EXPORT_SYMBOL_GPL net/rds/rds 0x962d5309	rds_trans_unregister
+EXPORT_SYMBOL_GPL net/rds/rds 0xb1357652	rds_info_copy
+EXPORT_SYMBOL_GPL net/rds/rds 0xb8261c27	rds_message_addref
+EXPORT_SYMBOL_GPL net/rds/rds 0xb89ded6f	rds_conn_destroy
+EXPORT_SYMBOL_GPL net/rds/rds 0xbec164ad	per_cpu__rds_stats
+EXPORT_SYMBOL_GPL net/rds/rds 0xc2da8e38	rds_stats_info_copy
+EXPORT_SYMBOL_GPL net/rds/rds 0xd02ed81e	rds_info_deregister_func
+EXPORT_SYMBOL_GPL net/rds/rds 0xd0b92364	rds_send_get_message
+EXPORT_SYMBOL_GPL net/rds/rds 0xdeb7a132	rds_inc_init
+EXPORT_SYMBOL_GPL net/rds/rds 0xf05cbddc	rds_message_unmapped
+EXPORT_SYMBOL_GPL net/rds/rds 0xf16600b0	rds_conn_create
+EXPORT_SYMBOL_GPL net/rds/rds 0xf38ed081	rds_send_drop_acked
+EXPORT_SYMBOL_GPL net/rds/rds 0xff031ec5	rds_conn_drop
+EXPORT_SYMBOL_GPL net/rxrpc/af-rxrpc 0x57ae63a7	rxrpc_unregister_security
+EXPORT_SYMBOL_GPL net/rxrpc/af-rxrpc 0xfb5308a7	rxrpc_register_security
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x008523c0	gss_service_to_auth_domain_name
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x00c52ef5	g_make_token_header
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x13c0e720	svcauth_gss_flavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x447c5da1	gss_mech_put
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x568bc601	gss_svc_to_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x5c6a87f9	gss_pseudoflavor_to_service
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x6389f229	gss_mech_get_by_name
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x83cfaab8	gss_mech_register
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x8d1a827e	svcauth_gss_register_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0x929963ed	svc_gss_principal
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xaaa4160a	gss_mech_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xaed729b9	gss_mech_get_by_pseudoflavor
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xb5dea7ef	g_token_size
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xd5d50cce	gss_mech_get
+EXPORT_SYMBOL_GPL net/sunrpc/auth_gss/auth_rpcgss 0xf8b2ff6e	g_verify_token_header
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x00644607	svc_proc_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x00d2c51a	svc_set_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0228c15e	svc_print_addr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x03b379ef	rpcauth_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x05e807a9	xdr_encode_string
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x060d9c22	rpc_call_async
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x065994f1	xdr_encode_opaque_fixed
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x09373ee0	svc_find_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x09dd8729	__rpc_wait_for_completion_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0efcda21	rpc_pton
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x0f668ba9	svc_auth_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x10ba4c35	svc_sock_destroy
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x110fa330	xprt_set_retrans_timeout_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x117f53e4	svc_recv
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x12e280e3	svc_proc_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x13187ebe	sunrpc_cache_update
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x13e20b4f	xprt_release_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x147cd4e2	sunrpc_cache_register_pipefs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x15055f6f	cache_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x15b9c2eb	sunrpc_cache_pipe_upcall
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x19ecf3d3	csum_partial_copy_to_xdr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1c29f6d9	xdr_encode_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1cf3e5d6	rpc_restart_call_prepare
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1dd5589b	xdr_encode_array2
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x1e145aef	xprt_update_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x24e593b9	unix_domain_find
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x263c8a9a	rpc_wake_up_queued_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x26ea1e3d	sunrpc_cache_unregister_pipefs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2919b156	xdr_decode_string_inplace
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2a0048af	rpc_killall_tasks
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2aa17774	rpc_free_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2b814e26	svc_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2cca390f	auth_domain_find
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2e076bd4	rpc_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2e6ca547	rpc_clone_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x2eec63c9	xdr_encode_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x31657592	xdr_inline_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x31a89d59	rpc_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x32a1c367	rpc_restart_call
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3486cf22	svc_xprt_init
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x36d61661	sunrpc_cache_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x38080282	xprt_unregister_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x388d75fc	xprt_lookup_rqst
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3a29c4c6	xprt_reserve_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x3a3552cc	xdr_buf_from_iov
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x46432c8e	xprt_adjust_cwnd
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x49e121ec	xdr_read_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4a0e0e7b	xdr_enter_page
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4aacdc3e	svc_xprt_enqueue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4c44a276	cache_check
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4ceeb036	auth_domain_put
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4d13f9f0	rpc_run_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x4e9d23af	xdr_init_decode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x50bf8d7c	rpc_peeraddr2str
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x50eb0c67	rpc_print_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x52cc1548	put_rpccred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x53445f68	nlm_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x54412baa	rpc_peeraddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x55a16ac5	rpc_lookup_machine_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5b14ec1a	rpc_put_mount
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5bbc6592	rpc_lookup_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5bd26000	rpc_proc_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x5e7f6838	rpc_queue_upcall
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6095d198	svc_set_num_threads
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x61f124cb	svc_max_payload
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x62352003	rpc_exit_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x675524ec	rpc_sockaddr2uaddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x68062ca7	xdr_partial_copy_from_skb
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6988cf2c	rpc_get_mount
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6c5304c5	rpcb_getport_sync
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6df9ba0b	svc_exit_thread
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x6eea229d	svcauth_unix_purge
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x70206e9b	xdr_encode_word
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x708e7c18	svc_create_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x70cf0f0b	rpc_wake_up
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x71fa908a	cache_flush
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7231219c	rpc_ntop
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7260a8ab	svc_seq_show
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x72996819	svc_xprt_names
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x72a23c0b	svc_drop
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x76816731	svc_wake_up
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x76db0f50	svc_sock_update_bufs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x775adaf6	rpc_uaddr2sockaddr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x77d04a1d	xprt_wait_for_buffer_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x77e630a6	auth_domain_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7b67b340	svc_create_pooled
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7bd06bf2	cache_purge
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7bf20b4c	rpcauth_init_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7c34597a	svcauth_unix_set_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7de53067	rpc_init_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7df58681	auth_unix_add_addr
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x7e3f9b2d	rpc_shutdown_client
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x81dbff63	rpcauth_generic_bind_cred
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8417ec5c	rpc_max_payload
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x88314cfd	rpc_unlink
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8940f440	rpc_mkpipe
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x8df22904	svc_reg_xprt_class
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x901add51	rpcauth_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x90279a12	svc_xprt_copy_addrs
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9066416e	rpc_force_rebind
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x91d236cb	xprt_complete_rqst
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x91f09e54	svc_prepare_thread
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x939408e2	cache_unregister
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9476400a	rpcauth_init_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x957e3d8b	rpc_delay
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x95c0adc5	svc_close_xprt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x97aeaba1	rpcauth_destroy_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x987370f1	auth_unix_lookup
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x988af966	xdr_decode_array2
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0x9ff920d3	rpc_destroy_wait_queue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa062d629	rpc_call_null
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa2215342	rpc_call_start
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa2b1a3f5	svc_process
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa2f2371c	xdr_buf_read_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa4622684	rpcauth_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xa7d34f50	rpc_call_sync
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xaaf03954	svc_xprt_received
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xadca2135	xprt_write_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xae7b27c6	xdr_init_encode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xaf5bf6ef	nfs_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb142eb59	xprt_wake_pending_tasks
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xb974bfea	xprt_release_xprt_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xba989146	xdr_write_pages
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbb3c099d	xdr_process_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbc3642f7	xdr_buf_subsegment
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbd0a033d	rpc_setbufsize
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xbf9d1b96	nfsd_debug
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc07ebfd9	rpc_wake_up_next
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc0825e86	xprt_register_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc12435e3	rpc_calc_rto
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc3880471	xdr_decode_netobj
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc43c2897	xprt_set_retrans_timeout_def
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc531c37f	rpc_put_task
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xc8e96dea	qword_addhex
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcadd201b	rpcb_getport_async
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcda8be30	rpc_alloc_iostats
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcee467f3	xprt_load_transport
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xcfb79afe	svc_addsock
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd0c68299	xdr_decode_word
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd1e40416	svc_unreg_xprt_class
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd25b1486	rpc_sleep_on
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd2f2fde9	svc_reserve
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd308961e	xdr_inline_decode
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd4236c81	svc_destroy
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xd81f000d	xprt_reserve_xprt_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xde377b92	rpc_bind_new_program
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe5919cb1	xdr_encode_opaque
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe5da0c66	xdr_skb_read_bits
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe8a41fd0	svc_auth_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe9323a1c	read_bytes_from_xdr_buf
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe97f4ce5	qword_get
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xe9b4b8de	xprt_disconnect_done
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xec37326a	auth_unix_forget_old
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xedcf6be4	qword_add
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xeeacab69	rpc_update_rtt
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xef33081c	svc_sock_names
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf2bdfcfd	rpcauth_lookup_credcache
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf3113634	svc_authenticate
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf35e45cd	svc_sock_create
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf3e2de54	svc_xprt_put
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf6c0aee3	xprt_release_rqst_cong
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf725776d	xdr_reserve_space
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf733d94a	rpc_init_wait_queue
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf9551d6b	rpc_malloc
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xf9d1164c	rpc_free
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfd008fca	rpc_proc_register
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xfd844326	rpc_wake_up_status
+EXPORT_SYMBOL_GPL net/sunrpc/sunrpc 0xff40a3d7	xdr_shift_buf
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x214d9018	wimax_state_change
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x273d2fc9	wimax_msg_alloc
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x28a4d653	wimax_msg_len
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x29211d09	wimax_msg_data_len
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x3512f2ba	wimax_msg_data
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x48d044da	wimax_state_get
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x63ad5cfa	wimax_report_rfkill_hw
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x79872298	wimax_report_rfkill_sw
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x81c46222	wimax_dev_rm
+EXPORT_SYMBOL_GPL net/wimax/wimax 0x8221a69a	wimax_dev_add
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xd771786b	wimax_msg
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xf169eac2	wimax_msg_send
+EXPORT_SYMBOL_GPL net/wimax/wimax 0xfa1c0093	wimax_dev_init
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x02b85995	cfg80211_wext_giwap
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x0354b9f3	cfg80211_wext_giwfrag
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x0522c404	cfg80211_wext_giwname
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x0ec0f9e1	cfg80211_wext_siwauth
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x17d01a36	cfg80211_wext_giwencode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x1b312b7d	cfg80211_wireless_stats
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x1cd5f170	cfg80211_wext_siwpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x1e22d53a	cfg80211_wext_siwap
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x1fbeddb6	cfg80211_wext_siwfreq
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x2a8514ac	cfg80211_wext_siwrate
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x3b2478d4	cfg80211_wext_siwretry
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x491d462c	cfg80211_wext_giwpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x49f75022	cfg80211_wext_giwmode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x59cbf943	cfg80211_wext_giwfreq
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x652c8b5a	cfg80211_wext_siwmlme
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x6eeccf88	cfg80211_wext_giwretry
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x7558cf5e	cfg80211_wext_siwencode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x838c69ad	cfg80211_wext_giwrts
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x86bae02a	cfg80211_wext_giwrange
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x8c512980	cfg80211_wext_siwtxpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0x94bc55b2	cfg80211_wext_siwessid
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xab90980c	cfg80211_wext_siwmode
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xabc6cbbb	cfg80211_wext_siwgenie
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xc174e2ee	cfg80211_wext_giwessid
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xc3518a56	cfg80211_wext_giwauth
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xc5f94d58	cfg80211_wext_siwrts
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xc74358f5	cfg80211_wext_siwscan
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xcec5ca44	cfg80211_wext_siwfrag
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xd7cc8cfc	cfg80211_wext_giwtxpower
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xe714671b	cfg80211_wext_giwrate
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xece25806	cfg80211_wext_giwscan
+EXPORT_SYMBOL_GPL net/wireless/cfg80211 0xf1e5bd94	cfg80211_wext_siwencodeext
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x5681467b	ipcomp_destroy
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x70dbb5a7	ipcomp_input
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0x98871582	ipcomp_init_state
+EXPORT_SYMBOL_GPL net/xfrm/xfrm_ipcomp 0xf9460ee9	ipcomp_output
+EXPORT_SYMBOL_GPL sound/core/snd-pcm 0xa286a234	snd_pcm_format_name
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0436c142	snd_hda_codec_amp_update
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0593f305	snd_hda_power_down
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x06769a4a	snd_hda_delete_codec_preset
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x08309046	snd_hda_create_spdif_out_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x08c850d8	snd_hda_set_vmaster_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0a0604c1	snd_hda_load_patch
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x0c1fdbaa	snd_hda_multi_out_analog_prepare
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x105e69c5	snd_hda_input_mux_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x10f9d89c	snd_hda_get_connections
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x11012004	snd_hda_multi_out_dig_open
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1a4e897b	snd_hda_mixer_bind_ctls_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1aa67313	snd_hda_create_spdif_share_sw
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1b580252	snd_hda_sequence_write_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x1c1a2d03	snd_hda_mixer_bind_switch_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2149d3c0	query_amp_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x27150e60	snd_hda_check_board_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x287b4fa5	snd_hda_codec_resume_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2a85496b	snd_hda_ch_mode_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x2fe11202	snd_hda_multi_out_dig_close
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x30c4816c	snd_hda_multi_out_analog_cleanup
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x30d1a215	snd_hda_codec_amp_stereo
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x30d9d057	snd_hda_mixer_bind_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3adca301	snd_hda_bind_vol
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x3e934273	snd_hda_find_mixer_ctl
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4872ef89	snd_hda_mixer_bind_ctls_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4ba587ba	snd_hda_add_vmaster
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4e264bf1	snd_hda_mixer_bind_switch_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4ee6e92a	snd_hda_mixer_bind_ctls_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x4ffa7cd9	snd_hda_is_supported_format
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5264f7e6	snd_hda_suspend
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x548c873d	snd_hda_codec_configure
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x5ae76f73	auto_pin_cfg_labels
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x62eb54f4	snd_hda_check_amp_list_power
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x68ebc046	snd_hda_queue_unsol_event
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x698d93b7	snd_hda_query_pin_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x6df0a553	snd_hda_ctl_add
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x70f992b2	snd_hda_mixer_amp_tlv
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x80248d31	snd_hda_bus_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8a164d0c	snd_hda_resume
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x8f7878a7	snd_hda_multi_out_dig_prepare
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9351655f	snd_hda_detach_beep_device
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x94c366e9	snd_hda_codec_cleanup_stream
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9a8e1877	snd_array_free
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9b2fe398	snd_hda_power_up
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9d22e86e	snd_hda_bind_sw
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0x9d6a6135	snd_hda_get_bool_hint
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa215f617	snd_hda_attach_beep_device
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa2827d76	snd_hda_get_jack_location
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa439006f	snd_hda_codec_read
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xa87cb171	snd_hda_create_spdif_in_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xad87613e	snd_print_pcm_rates
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xae778042	snd_hda_build_pcms
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb16fc81b	snd_hda_mixer_amp_switch_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb265126e	snd_hda_ch_mode_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb2bc93f6	snd_hda_codec_get_pincfg
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb3c05de9	snd_hda_get_sub_nodes
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb596ff96	snd_hda_codec_setup_stream
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xb6e006b3	snd_hda_sequence_write
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xba421489	snd_hda_mixer_amp_volume_put
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xba70ffc9	snd_hda_ch_mode_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbc27d4fd	snd_hda_add_codec_preset
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xbe7dd7dc	snd_array_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc34a54c6	snd_hda_calc_stream_format
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc60d868a	snd_hda_check_board_codec_sid_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xc652fd69	snd_hda_get_jack_connectivity
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcad9c60d	snd_hda_codec_new
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcb0d7c9c	snd_hda_codec_set_pincfg
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcb301b6e	snd_hda_get_jack_type
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcce27eb0	snd_hda_input_mux_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcd70f413	snd_hda_parse_pin_def_config
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xcfa0bf15	snd_hda_override_amp_caps
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd2a908ef	snd_hda_codec_amp_read
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd48793b7	snd_hda_codec_write
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xd733b82d	snd_hda_multi_out_dig_cleanup
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe18d7f08	snd_hda_codec_resume_amp
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe353aee9	snd_hda_mixer_amp_switch_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe5c7a84a	snd_hda_mixer_amp_switch_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe67144df	snd_hda_build_controls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xe87e727b	snd_hda_mixer_amp_volume_get
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeaa3f00c	snd_hda_add_new_ctls
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeda3a721	snd_print_pcm_bits
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xeeea74d8	snd_hda_mixer_amp_volume_info
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf2d12e7e	snd_hda_get_hint
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xf9a99660	snd_hda_codec_write_cache
+EXPORT_SYMBOL_GPL sound/pci/hda/snd-hda-codec 0xfa3d7f48	snd_hda_multi_out_analog_open
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1836 0x54b01797	soc_codec_dev_ad1836
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1836 0xb13b2b37	ad1836_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1938 0x479b4ad9	ad1938_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad1938 0x728f5d7c	soc_codec_dev_ad1938
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0x704c9e2c	soc_codec_dev_ad73311
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ad73311 0xe7f5330e	ad73311_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4104 0xbf15c44a	soc_codec_device_ak4104
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0x1736528a	ak4535_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4535 0xb441a12c	soc_codec_dev_ak4535
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4642 0x411b5b5f	ak4642_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ak4642 0xecfa8e80	soc_codec_dev_ak4642
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0xb49929fa	soc_codec_device_cs4270
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-cs4270 0xd56496ee	cs4270_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-l3 0x78c84c7e	l3_write
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-max9877 0xbdb30bba	max9877_add_controls
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0x6a5ac416	soc_codec_dev_pcm3008
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-pcm3008 0xf8b2cc00	pcm3008_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-spdif 0x700a685a	dit_stub_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0x5155e499	ssm2602_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-ssm2602 0x61efc1dd	soc_codec_dev_ssm2602
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0x3d29932b	tlv320aic23_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic23 0x9d2d296c	soc_codec_dev_tlv320aic23
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0x5f436567	aic26_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic26 0xcf09912c	aic26_soc_codec_dev
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x136c237e	aic3x_set_gpio
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x13b20116	soc_codec_dev_aic3x
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x68295734	aic3x_button_pressed
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0x92552b04	aic3x_get_gpio
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xa709d94b	aic3x_headset_detected
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xca0838f5	aic3x_set_headset_detection
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-tlv320aic3x 0xcc6605cf	aic3x_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0x81494f24	twl4030_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-twl4030 0xce6249d5	soc_codec_dev_twl4030
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda134x 0x0fda2fd0	soc_codec_dev_uda134x
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x33093af3	uda1380_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-uda1380 0x3e6013b9	soc_codec_dev_uda1380
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0x757206d5	wm_hubs_spkmix_tlv
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0xace2f03b	wm_hubs_add_analogue_controls
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm-hubs 0xb030bc2e	wm_hubs_add_analogue_routes
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0x2df45231	wm8350_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0xd5dbe356	soc_codec_dev_wm8350
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8350 0xe1369489	wm8350_hp_jack_detect
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x4ec71904	soc_codec_dev_wm8400
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8400 0x7509748f	wm8400_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0x7d0d5fcb	wm8510_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8510 0xdd1526ef	soc_codec_dev_wm8510
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8523 0xca7137f8	wm8523_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8523 0xf47ecb75	soc_codec_dev_wm8523
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0x17855f4d	wm8580_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8580 0xd2c41d60	soc_codec_dev_wm8580
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0xbd83da35	soc_codec_dev_wm8728
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8728 0xe293c046	wm8728_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x63eb9a3a	wm8731_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8731 0x6d830b4b	soc_codec_dev_wm8731
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0x701546b8	soc_codec_dev_wm8750
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8750 0xcb677ca5	wm8750_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0x5b38157b	soc_codec_dev_wm8753
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8753 0x7938eaf0	wm8753_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8776 0x25cb3550	soc_codec_dev_wm8776
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8776 0x65584553	wm8776_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0x8cd54130	wm8900_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8900 0x9601f360	soc_codec_dev_wm8900
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0x0a41339e	wm8903_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8903 0xbd2ca0a3	soc_codec_dev_wm8903
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0x789a6523	wm8940_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8940 0x91085bbc	soc_codec_dev_wm8940
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0x928c8fd2	soc_codec_dev_wm8960
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8960 0xef05740a	wm8960_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8961 0x2459a7af	wm8961_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8961 0x8b97be93	soc_codec_dev_wm8961
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0x822eac1b	wm8971_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8971 0x8a55d4a4	soc_codec_dev_wm8971
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8974 0xd2e33da8	wm8974_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8974 0xf72220e1	soc_codec_dev_wm8974
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0x50cb28d0	soc_codec_dev_wm8988
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8988 0x53698d3a	wm8988_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0x194d04e3	wm8990_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8990 0x99d0c8ef	soc_codec_dev_wm8990
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8993 0x9fd9764d	wm8993_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm8993 0xb2fd9b2c	soc_codec_dev_wm8993
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0x7c52d39a	wm9081_dai
+EXPORT_SYMBOL_GPL sound/soc/codecs/snd-soc-wm9081 0xc161f5a3	soc_codec_dev_wm9081
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x094e0303	snd_soc_free_ac97_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1051a96a	snd_soc_dai_set_sysclk
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1f3af47d	snd_soc_dapm_get_pin_status
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x1fc20721	snd_soc_set_runtime_hwparams
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x230d4ef6	snd_soc_dai_set_fmt
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2359bd92	snd_soc_add_controls
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2a915c69	snd_soc_jack_report
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2b1fa110	snd_soc_get_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x2bf31719	snd_soc_unregister_dai
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3306e208	snd_soc_dapm_get_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x33a0a46f	snd_soc_suspend_device
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3468a3e4	snd_soc_dapm_new_widgets
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x36c58eb1	snd_soc_new_pcms
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3fbe3a6f	snd_soc_free_pcms
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3fc2912b	snd_soc_dai_set_tdm_slot
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x3ff71bf8	snd_soc_dapm_get_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x401f7a5d	snd_soc_put_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4061da87	snd_soc_dapm_stream_event
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x443dff35	snd_soc_put_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x477df820	snd_soc_unregister_platform
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x4a1ea377	snd_soc_new_ac97_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x50c1b01f	snd_soc_dapm_nc_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5558c0e8	snd_soc_get_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x561cd4bf	snd_soc_dapm_enable_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x58dee796	snd_soc_put_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x5c38eca5	snd_soc_test_bits
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x601e69dd	snd_soc_dapm_new_controls
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x64cf7976	snd_soc_jack_add_pins
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x663e31a3	snd_soc_unregister_dais
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6811d94f	snd_soc_info_volsw_ext
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x692b65a9	snd_soc_dapm_new_control
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6be4e75e	snd_soc_put_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6c59b911	snd_soc_dai_digital_mute
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6cec4d07	snd_soc_resume_device
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6ec460de	snd_soc_init_card
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x6fb0f127	snd_soc_dapm_put_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x77ead29e	snd_soc_dapm_sync
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x7afe26ca	snd_soc_register_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x83c1cadc	snd_soc_info_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8685cc87	snd_soc_codec_set_cache_io
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8b15de76	snd_soc_dapm_free
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x8f5d1afe	snd_soc_dapm_get_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9efddd52	snd_soc_get_value_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0x9f7a896f	snd_soc_dai_set_tristate
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa2a512f4	snd_soc_update_bits
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa705e4f6	snd_soc_codec_volatile_register
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa7af6db5	snd_soc_dapm_disable_pin
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa84e67a7	snd_soc_register_dai
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xa854b166	snd_soc_dapm_add_routes
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xab1e85ea	snd_soc_put_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb1a435f9	snd_soc_info_volsw_2r
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xb1e13d48	snd_soc_dapm_put_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xbe6dbd3c	snd_soc_info_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xc01e5ea7	snd_soc_get_volsw_s8
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd12e5996	snd_soc_cnew
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd3ecb366	snd_soc_register_platform
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xd7a06ecb	snd_soc_info_enum_double
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xdfd0780d	snd_soc_get_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xe1568fef	snd_soc_dapm_put_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xeb76fe2c	snd_soc_info_enum_ext
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xee2f21bf	snd_soc_dai_set_clkdiv
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xeff53ed9	dapm_reg_event
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf1d596cb	snd_soc_jack_new
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf2af7ae5	snd_soc_register_dais
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf45d761f	snd_soc_dapm_get_volsw
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf678755c	snd_soc_unregister_codec
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf8348606	snd_soc_dapm_info_pin_switch
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf981a9f8	snd_soc_dai_set_pll
+EXPORT_SYMBOL_GPL sound/soc/snd-soc-core 0xf9d4213c	snd_soc_dapm_put_value_enum_double
+EXPORT_SYMBOL_GPL vmlinux 0x0026560e	usb_add_hcd
+EXPORT_SYMBOL_GPL vmlinux 0x004da4b9	skb_tstamp_tx
+EXPORT_SYMBOL_GPL vmlinux 0x00566d8f	inotify_get_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x00593c92	anon_transport_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x00a5cbe1	iommu_iova_to_phys
+EXPORT_SYMBOL_GPL vmlinux 0x00b7785d	platform_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x00b8ecf8	__iowrite32_copy
+EXPORT_SYMBOL_GPL vmlinux 0x00c3bbac	regulator_set_current_limit
+EXPORT_SYMBOL_GPL vmlinux 0x0110b3d1	register_hotplug_dock_device
+EXPORT_SYMBOL_GPL vmlinux 0x011a6bc3	device_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x015f757c	ring_buffer_consume
+EXPORT_SYMBOL_GPL vmlinux 0x016b9869	xfrm_calg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0x01a4ea6d	unregister_die_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x01a70732	class_dev_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0x0254716c	crypto_alloc_ablkcipher
+EXPORT_SYMBOL_GPL vmlinux 0x02699763	regulator_enable
+EXPORT_SYMBOL_GPL vmlinux 0x02b123b7	i2c_add_numbered_adapter
+EXPORT_SYMBOL_GPL vmlinux 0x02ccea56	lock_policy_rwsem_write
+EXPORT_SYMBOL_GPL vmlinux 0x02d76c68	crypto_spawn_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x02ebb98f	power_supply_register
+EXPORT_SYMBOL_GPL vmlinux 0x03057b94	xfrm_audit_policy_add
+EXPORT_SYMBOL_GPL vmlinux 0x0343bdf1	__i2c_board_list
+EXPORT_SYMBOL_GPL vmlinux 0x03d624ed	disk_part_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0x03e7c188	root_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x03f1d5e7	crypto_ahash_final
+EXPORT_SYMBOL_GPL vmlinux 0x04069b1d	set_irq_nested_thread
+EXPORT_SYMBOL_GPL vmlinux 0x04486e88	rcu_batches_completed
+EXPORT_SYMBOL_GPL vmlinux 0x0457d110	led_trigger_register
+EXPORT_SYMBOL_GPL vmlinux 0x049a3bef	__inet_twsk_hashdance
+EXPORT_SYMBOL_GPL vmlinux 0x04a9dbb8	usb_string
+EXPORT_SYMBOL_GPL vmlinux 0x04b9d20b	spi_get_device_id
+EXPORT_SYMBOL_GPL vmlinux 0x04d8a2ed	tty_wakeup
+EXPORT_SYMBOL_GPL vmlinux 0x04ea8706	__iowrite64_copy
+EXPORT_SYMBOL_GPL vmlinux 0x051dd8f8	pci_scan_child_bus
+EXPORT_SYMBOL_GPL vmlinux 0x054e550b	kernel_halt
+EXPORT_SYMBOL_GPL vmlinux 0x05c718fa	crypto_ahash_setkey
+EXPORT_SYMBOL_GPL vmlinux 0x0619ca8a	getboottime
+EXPORT_SYMBOL_GPL vmlinux 0x064db9a5	mark_mounts_for_expiry
+EXPORT_SYMBOL_GPL vmlinux 0x07194dc3	uhci_reset_hc
+EXPORT_SYMBOL_GPL vmlinux 0x071e021a	tty_mode_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x072d93a8	usb_free_urb
+EXPORT_SYMBOL_GPL vmlinux 0x073bfc5b	mnt_drop_write
+EXPORT_SYMBOL_GPL vmlinux 0x079dbabf	usb_anchor_urb
+EXPORT_SYMBOL_GPL vmlinux 0x07b52e38	rtnl_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x07c76688	power_supply_am_i_supplied
+EXPORT_SYMBOL_GPL vmlinux 0x081ba38b	bus_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x08452f30	inotify_find_watch
+EXPORT_SYMBOL_GPL vmlinux 0x0853081a	skb_morph
+EXPORT_SYMBOL_GPL vmlinux 0x08d8708f	cancel_work_sync
+EXPORT_SYMBOL_GPL vmlinux 0x091eb9b4	round_jiffies
+EXPORT_SYMBOL_GPL vmlinux 0x09f3291b	__cpufreq_driver_getavg
+EXPORT_SYMBOL_GPL vmlinux 0x09fe5618	class_for_each_device
+EXPORT_SYMBOL_GPL vmlinux 0x0a1f3660	crypto_shash_setkey
+EXPORT_SYMBOL_GPL vmlinux 0x0a5d1f8f	crypto_destroy_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x0a93c611	dm_path_uevent
+EXPORT_SYMBOL_GPL vmlinux 0x0a9ee654	sal_pcibr_slot_disable
+EXPORT_SYMBOL_GPL vmlinux 0x0aca24ce	pci_find_ht_capability
+EXPORT_SYMBOL_GPL vmlinux 0x0aff0e8a	crypto_blkcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0x0b07abe2	unshare_fs_struct
+EXPORT_SYMBOL_GPL vmlinux 0x0bbd3d13	kobject_get_path
+EXPORT_SYMBOL_GPL vmlinux 0x0bd2e354	rtc_set_time
+EXPORT_SYMBOL_GPL vmlinux 0x0be80544	class_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x0bec7085	platform_get_resource
+EXPORT_SYMBOL_GPL vmlinux 0x0bfd1bc8	crypto_rng_type
+EXPORT_SYMBOL_GPL vmlinux 0x0c01f8eb	device_attach
+EXPORT_SYMBOL_GPL vmlinux 0x0c2cdbf1	synchronize_sched
+EXPORT_SYMBOL_GPL vmlinux 0x0c40f3a3	regulator_get_mode
+EXPORT_SYMBOL_GPL vmlinux 0x0cb78c4e	__pci_complete_power_transition
+EXPORT_SYMBOL_GPL vmlinux 0x0cd4527c	shash_ahash_digest
+EXPORT_SYMBOL_GPL vmlinux 0x0cf4155a	pcap_adc_async
+EXPORT_SYMBOL_GPL vmlinux 0x0d0d291e	blkcipher_walk_phys
+EXPORT_SYMBOL_GPL vmlinux 0x0d1b3f09	__inet_hash_nolisten
+EXPORT_SYMBOL_GPL vmlinux 0x0d287df1	platform_device_del
+EXPORT_SYMBOL_GPL vmlinux 0x0d816fd0	firmware_kobj
+EXPORT_SYMBOL_GPL vmlinux 0x0df66d3b	platform_device_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x0ea906e9	mmput
+EXPORT_SYMBOL_GPL vmlinux 0x0ec8206b	fib_rules_register
+EXPORT_SYMBOL_GPL vmlinux 0x0f7930e0	xfrm_audit_state_add
+EXPORT_SYMBOL_GPL vmlinux 0x0fc458b8	shmem_file_setup
+EXPORT_SYMBOL_GPL vmlinux 0x100c48a2	unregister_dock_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x10138352	tracing_on
+EXPORT_SYMBOL_GPL vmlinux 0x10c00caa	rtnl_link_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x110fb6f4	kobject_init_and_add
+EXPORT_SYMBOL_GPL vmlinux 0x111c6ac1	__set_irq_handler
+EXPORT_SYMBOL_GPL vmlinux 0x112ba0a3	disk_get_part
+EXPORT_SYMBOL_GPL vmlinux 0x11ac153d	input_ff_create
+EXPORT_SYMBOL_GPL vmlinux 0x120fff57	ring_buffer_lock_reserve
+EXPORT_SYMBOL_GPL vmlinux 0x122a4ea2	vfs_setxattr
+EXPORT_SYMBOL_GPL vmlinux 0x124f2056	crypto_get_attr_type
+EXPORT_SYMBOL_GPL vmlinux 0x1251d30f	call_rcu
+EXPORT_SYMBOL_GPL vmlinux 0x12e326ec	elv_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x13652fd0	usb_set_interface
+EXPORT_SYMBOL_GPL vmlinux 0x1381a048	iommu_map_range
+EXPORT_SYMBOL_GPL vmlinux 0x13b2a946	register_keyboard_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x13baabe4	blk_rq_unprep_clone
+EXPORT_SYMBOL_GPL vmlinux 0x13e1daaf	platform_device_add_data
+EXPORT_SYMBOL_GPL vmlinux 0x13eb035c	generic_fh_to_dentry
+EXPORT_SYMBOL_GPL vmlinux 0x141943e1	register_kretprobe
+EXPORT_SYMBOL_GPL vmlinux 0x1451306c	ia64_sal_cache_flush
+EXPORT_SYMBOL_GPL vmlinux 0x149db923	selinux_string_to_sid
+EXPORT_SYMBOL_GPL vmlinux 0x14b2c4f5	rt_mutex_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x14f0a152	udp4_lib_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x152a37d7	init_srcu_struct
+EXPORT_SYMBOL_GPL vmlinux 0x15596414	power_supply_class
+EXPORT_SYMBOL_GPL vmlinux 0x15892417	async_synchronize_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x1598dc9d	unregister_netevent_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x166e8181	platform_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x168c3e71	fsstack_copy_attr_all
+EXPORT_SYMBOL_GPL vmlinux 0x171d23b7	devm_kzalloc
+EXPORT_SYMBOL_GPL vmlinux 0x17493a3f	usb_buffer_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x17533aa8	usb_register_dev
+EXPORT_SYMBOL_GPL vmlinux 0x179c93f6	kallsyms_on_each_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x17aab9cd	shash_free_instance
+EXPORT_SYMBOL_GPL vmlinux 0x18a582b8	part_round_stats
+EXPORT_SYMBOL_GPL vmlinux 0x18df9397	led_trigger_register_simple
+EXPORT_SYMBOL_GPL vmlinux 0x18ea4f99	pci_destroy_slot
+EXPORT_SYMBOL_GPL vmlinux 0x19089a75	xfrm_inner_extract_output
+EXPORT_SYMBOL_GPL vmlinux 0x190cba6a	usb_reset_endpoint
+EXPORT_SYMBOL_GPL vmlinux 0x19109266	crypto_init_ahash_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x194f8dce	ring_buffer_resize
+EXPORT_SYMBOL_GPL vmlinux 0x195c95df	sal_pcibr_slot_enable
+EXPORT_SYMBOL_GPL vmlinux 0x19a304ba	usb_disabled
+EXPORT_SYMBOL_GPL vmlinux 0x19d6a3b3	hrtimer_start
+EXPORT_SYMBOL_GPL vmlinux 0x1a3b82bd	register_net_sysctl_rotable
+EXPORT_SYMBOL_GPL vmlinux 0x1abe8f08	srcu_read_lock
+EXPORT_SYMBOL_GPL vmlinux 0x1b15acf9	register_timer_hook
+EXPORT_SYMBOL_GPL vmlinux 0x1b943980	vfs_removexattr
+EXPORT_SYMBOL_GPL vmlinux 0x1b9aca3f	jprobe_return
+EXPORT_SYMBOL_GPL vmlinux 0x1c19f2c7	inet_diag_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x1c3af716	execute_in_process_context
+EXPORT_SYMBOL_GPL vmlinux 0x1c852e7c	xfrm_calg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x1c87a811	__round_jiffies_up
+EXPORT_SYMBOL_GPL vmlinux 0x1cf5050c	fuse_dev_release
+EXPORT_SYMBOL_GPL vmlinux 0x1d009c2e	usb_autopm_get_interface
+EXPORT_SYMBOL_GPL vmlinux 0x1d5608c6	ip_build_and_send_pkt
+EXPORT_SYMBOL_GPL vmlinux 0x1d5e345a	generic_detach_inode
+EXPORT_SYMBOL_GPL vmlinux 0x1d87eef8	ring_buffer_entries_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x1df08c38	blk_lld_busy
+EXPORT_SYMBOL_GPL vmlinux 0x1df15301	find_get_pid
+EXPORT_SYMBOL_GPL vmlinux 0x1df8d0ae	regulator_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x1e12a285	platform_get_resource_byname
+EXPORT_SYMBOL_GPL vmlinux 0x1e2ff1db	spi_new_device
+EXPORT_SYMBOL_GPL vmlinux 0x1e5f29b2	spi_add_device
+EXPORT_SYMBOL_GPL vmlinux 0x1e7bbcb3	kernel_restart
+EXPORT_SYMBOL_GPL vmlinux 0x1eb9516e	round_jiffies_relative
+EXPORT_SYMBOL_GPL vmlinux 0x1ebf6c2a	pci_power_names
+EXPORT_SYMBOL_GPL vmlinux 0x1ef15eb9	pid_vnr
+EXPORT_SYMBOL_GPL vmlinux 0x1f3077a0	bus_sort_breadthfirst
+EXPORT_SYMBOL_GPL vmlinux 0x1f4cd604	usb_deregister_device_driver
+EXPORT_SYMBOL_GPL vmlinux 0x1f8e2cab	tty_ldisc_flush
+EXPORT_SYMBOL_GPL vmlinux 0x1f8e6bbc	debugfs_create_u64
+EXPORT_SYMBOL_GPL vmlinux 0x1f8ec1b3	acpi_get_pci_rootbridge_handle
+EXPORT_SYMBOL_GPL vmlinux 0x1fb8bd1b	pci_enable_pcie_error_reporting
+EXPORT_SYMBOL_GPL vmlinux 0x1fcece42	inet_twdr_twcal_tick
+EXPORT_SYMBOL_GPL vmlinux 0x208548a0	leds_list_lock
+EXPORT_SYMBOL_GPL vmlinux 0x2088dae4	generic_drop_inode
+EXPORT_SYMBOL_GPL vmlinux 0x209bf4f1	devres_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x20a0fe21	inet6_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x20b28296	ahash_attr_alg
+EXPORT_SYMBOL_GPL vmlinux 0x20bc3470	orderly_poweroff
+EXPORT_SYMBOL_GPL vmlinux 0x20d22764	iommu_found
+EXPORT_SYMBOL_GPL vmlinux 0x20d7038e	anon_inode_getfile
+EXPORT_SYMBOL_GPL vmlinux 0x20e14c97	get_current_tty
+EXPORT_SYMBOL_GPL vmlinux 0x20fa75a0	add_page_wait_queue
+EXPORT_SYMBOL_GPL vmlinux 0x21491d56	acpi_ec_remove_query_handler
+EXPORT_SYMBOL_GPL vmlinux 0x21780986	__pm_runtime_put
+EXPORT_SYMBOL_GPL vmlinux 0x221235f5	__inet_lookup_established
+EXPORT_SYMBOL_GPL vmlinux 0x224c80e3	usb_poison_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0x229554eb	crypto_mod_put
+EXPORT_SYMBOL_GPL vmlinux 0x2296c00d	crypto_attr_u32
+EXPORT_SYMBOL_GPL vmlinux 0x22a12b2b	devres_add
+EXPORT_SYMBOL_GPL vmlinux 0x22aa408a	fuse_direct_io
+EXPORT_SYMBOL_GPL vmlinux 0x23653e57	fuse_put_request
+EXPORT_SYMBOL_GPL vmlinux 0x237df7db	sysdev_store_int
+EXPORT_SYMBOL_GPL vmlinux 0x23864ce7	cpuset_mem_spread_node
+EXPORT_SYMBOL_GPL vmlinux 0x241cebb2	transport_class_register
+EXPORT_SYMBOL_GPL vmlinux 0x2447533c	ktime_get_real
+EXPORT_SYMBOL_GPL vmlinux 0x2461aa8d	get_cpu_sysdev
+EXPORT_SYMBOL_GPL vmlinux 0x248903a6	mnt_clone_write
+EXPORT_SYMBOL_GPL vmlinux 0x24bb7b1c	get_device
+EXPORT_SYMBOL_GPL vmlinux 0x24eb7e32	leds_list
+EXPORT_SYMBOL_GPL vmlinux 0x24fec351	blk_rq_prep_clone
+EXPORT_SYMBOL_GPL vmlinux 0x25ffb375	rt_mutex_unlock
+EXPORT_SYMBOL_GPL vmlinux 0x26219b54	pci_find_next_ht_capability
+EXPORT_SYMBOL_GPL vmlinux 0x26cbb182	sysfs_create_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0x26f7ffad	usb_hcd_unlink_urb_from_ep
+EXPORT_SYMBOL_GPL vmlinux 0x27c5c886	pcie_port_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x2823ff61	crypto_unregister_ahash
+EXPORT_SYMBOL_GPL vmlinux 0x284df5f6	class_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x287951ba	pm_runtime_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x28d664ff	__raw_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x28e23139	xfrm_probe_algs
+EXPORT_SYMBOL_GPL vmlinux 0x2931245e	proc_net_mkdir
+EXPORT_SYMBOL_GPL vmlinux 0x2967a68c	__cpufreq_driver_target
+EXPORT_SYMBOL_GPL vmlinux 0x298f60c9	platform_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x2a35f06d	sysfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x2a64293f	skb_gro_receive
+EXPORT_SYMBOL_GPL vmlinux 0x2ab28551	atomic_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x2af23615	spi_write_then_read
+EXPORT_SYMBOL_GPL vmlinux 0x2b174bfd	attribute_container_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x2b402b67	usb_autopm_set_interface
+EXPORT_SYMBOL_GPL vmlinux 0x2b5c303b	smp_send_reschedule
+EXPORT_SYMBOL_GPL vmlinux 0x2b9f8e23	nf_net_ipv4_netfilter_sysctl_path
+EXPORT_SYMBOL_GPL vmlinux 0x2bcaa8e3	flush_work
+EXPORT_SYMBOL_GPL vmlinux 0x2bce1739	usb_scuttle_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0x2c208607	power_supply_is_system_supplied
+EXPORT_SYMBOL_GPL vmlinux 0x2c524b56	skcipher_geniv_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x2c7e34be	tcp_orphan_count
+EXPORT_SYMBOL_GPL vmlinux 0x2ce98559	kcrypto_wq
+EXPORT_SYMBOL_GPL vmlinux 0x2cfbc018	fuse_dev_operations
+EXPORT_SYMBOL_GPL vmlinux 0x2d0f17d6	platform_driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x2d9d7aac	usb_get_descriptor
+EXPORT_SYMBOL_GPL vmlinux 0x2d9f2ce3	sched_clock_idle_wakeup_event
+EXPORT_SYMBOL_GPL vmlinux 0x2e3ad8d6	kick_process
+EXPORT_SYMBOL_GPL vmlinux 0x2e47f677	xfrm_aalg_get_byidx
+EXPORT_SYMBOL_GPL vmlinux 0x2e4f07e4	securityfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x2ec92012	scatterwalk_copychunks
+EXPORT_SYMBOL_GPL vmlinux 0x2edc1675	device_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x2eed2630	iommu_domain_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x2ef8b95b	acpi_bus_trim
+EXPORT_SYMBOL_GPL vmlinux 0x2f1323df	sysfs_chmod_file
+EXPORT_SYMBOL_GPL vmlinux 0x2f47d8c7	cpufreq_frequency_get_table
+EXPORT_SYMBOL_GPL vmlinux 0x2ffdbf2b	led_trigger_store
+EXPORT_SYMBOL_GPL vmlinux 0x302e8e87	xfrm_audit_state_icvfail
+EXPORT_SYMBOL_GPL vmlinux 0x3059ad61	inet_csk_reqsk_queue_prune
+EXPORT_SYMBOL_GPL vmlinux 0x307538b6	eventfd_ctx_get
+EXPORT_SYMBOL_GPL vmlinux 0x30af4d52	tcp_twsk_destructor
+EXPORT_SYMBOL_GPL vmlinux 0x3142d59f	usb_driver_set_configuration
+EXPORT_SYMBOL_GPL vmlinux 0x318920b1	register_dock_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x3214a434	ring_buffer_read
+EXPORT_SYMBOL_GPL vmlinux 0x32326345	blkcipher_walk_virt_block
+EXPORT_SYMBOL_GPL vmlinux 0x324b11a2	usb_buffer_map_sg
+EXPORT_SYMBOL_GPL vmlinux 0x32d5e7fc	xfrm_aalg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x32f17454	ring_buffer_event_data
+EXPORT_SYMBOL_GPL vmlinux 0x334b73db	find_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x3395d983	device_for_each_child
+EXPORT_SYMBOL_GPL vmlinux 0x33a288c0	cpufreq_register_governor
+EXPORT_SYMBOL_GPL vmlinux 0x33d7f11c	sysdev_show_ulong
+EXPORT_SYMBOL_GPL vmlinux 0x3422e26f	inet_hashinfo_init
+EXPORT_SYMBOL_GPL vmlinux 0x343f2de2	debugfs_create_u32
+EXPORT_SYMBOL_GPL vmlinux 0x34d04c1e	platform_get_irq_byname
+EXPORT_SYMBOL_GPL vmlinux 0x3552f07f	regulator_is_enabled
+EXPORT_SYMBOL_GPL vmlinux 0x35766a3f	ring_buffer_iter_empty
+EXPORT_SYMBOL_GPL vmlinux 0x3582547c	skb_partial_csum_set
+EXPORT_SYMBOL_GPL vmlinux 0x35e7b146	raw_seq_open
+EXPORT_SYMBOL_GPL vmlinux 0x360883bb	crypto_shash_update
+EXPORT_SYMBOL_GPL vmlinux 0x362e23ec	call_rcu_bh
+EXPORT_SYMBOL_GPL vmlinux 0x3630e984	pci_restore_msi_state
+EXPORT_SYMBOL_GPL vmlinux 0x3647ab88	sysfs_put
+EXPORT_SYMBOL_GPL vmlinux 0x368239c1	sysdev_class_register
+EXPORT_SYMBOL_GPL vmlinux 0x37393461	dm_underlying_device_busy
+EXPORT_SYMBOL_GPL vmlinux 0x37588ef1	unregister_net_sysctl_table
+EXPORT_SYMBOL_GPL vmlinux 0x37876df5	sysfs_create_link
+EXPORT_SYMBOL_GPL vmlinux 0x37e71d45	skb_icv_walk
+EXPORT_SYMBOL_GPL vmlinux 0x37f9f962	tcp_reno_min_cwnd
+EXPORT_SYMBOL_GPL vmlinux 0x3813d1a7	tty_ldisc_ref_wait
+EXPORT_SYMBOL_GPL vmlinux 0x38363de0	tcp_is_cwnd_limited
+EXPORT_SYMBOL_GPL vmlinux 0x3894cbcd	blocking_notifier_chain_cond_register
+EXPORT_SYMBOL_GPL vmlinux 0x38f8bb7b	da903x_write
+EXPORT_SYMBOL_GPL vmlinux 0x39030b26	nf_register_afinfo
+EXPORT_SYMBOL_GPL vmlinux 0x393338e6	posix_timer_event
+EXPORT_SYMBOL_GPL vmlinux 0x395fca96	usb_remove_hcd
+EXPORT_SYMBOL_GPL vmlinux 0x3975069a	regulator_put
+EXPORT_SYMBOL_GPL vmlinux 0x39f94a6d	inotify_inode_is_dead
+EXPORT_SYMBOL_GPL vmlinux 0x3a0fa0ae	tcp_twsk_unique
+EXPORT_SYMBOL_GPL vmlinux 0x3a7375ab	tcp_register_congestion_control
+EXPORT_SYMBOL_GPL vmlinux 0x3aac5403	pci_reset_function
+EXPORT_SYMBOL_GPL vmlinux 0x3b02a3e3	usb_debug_root
+EXPORT_SYMBOL_GPL vmlinux 0x3b32e319	unregister_kprobes
+EXPORT_SYMBOL_GPL vmlinux 0x3b40d2c4	debugfs_create_bool
+EXPORT_SYMBOL_GPL vmlinux 0x3b47939a	fb_ddc_read
+EXPORT_SYMBOL_GPL vmlinux 0x3b88586d	crypto_drop_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x3b91216e	ahash_free_instance
+EXPORT_SYMBOL_GPL vmlinux 0x3b92b5bf	sysfs_notify_dirent
+EXPORT_SYMBOL_GPL vmlinux 0x3be7af02	get_max_files
+EXPORT_SYMBOL_GPL vmlinux 0x3be89d3c	usb_register_notify
+EXPORT_SYMBOL_GPL vmlinux 0x3c46c5c4	ring_buffer_read_page
+EXPORT_SYMBOL_GPL vmlinux 0x3c576fe0	pci_msi_off
+EXPORT_SYMBOL_GPL vmlinux 0x3c942368	profile_event_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x3cd06035	add_input_randomness
+EXPORT_SYMBOL_GPL vmlinux 0x3d15e99f	bdi_writeout_inc
+EXPORT_SYMBOL_GPL vmlinux 0x3d320620	hrtimer_init
+EXPORT_SYMBOL_GPL vmlinux 0x3d3f7429	crypto_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0x3d5f392d	acpi_os_unmap_memory
+EXPORT_SYMBOL_GPL vmlinux 0x3eb00775	skb_pull_rcsum
+EXPORT_SYMBOL_GPL vmlinux 0x3eba8382	usb_hcd_pci_probe
+EXPORT_SYMBOL_GPL vmlinux 0x3efb35c9	get_online_cpus
+EXPORT_SYMBOL_GPL vmlinux 0x3f1815bd	tty_ldisc_ref
+EXPORT_SYMBOL_GPL vmlinux 0x3f238101	dcookie_register
+EXPORT_SYMBOL_GPL vmlinux 0x3f4b2d73	blk_insert_cloned_request
+EXPORT_SYMBOL_GPL vmlinux 0x3f592715	crypto_larval_kill
+EXPORT_SYMBOL_GPL vmlinux 0x3f5eb9e1	xfrm_audit_policy_delete
+EXPORT_SYMBOL_GPL vmlinux 0x3f72cfde	crypto_aead_setauthsize
+EXPORT_SYMBOL_GPL vmlinux 0x3fbb0f6b	regulator_set_optimum_mode
+EXPORT_SYMBOL_GPL vmlinux 0x3fd1a761	usb_ep0_reinit
+EXPORT_SYMBOL_GPL vmlinux 0x3ff653fa	rtc_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x4059a0d4	input_ff_upload
+EXPORT_SYMBOL_GPL vmlinux 0x408a0635	queue_work
+EXPORT_SYMBOL_GPL vmlinux 0x40bdcdbe	cpufreq_freq_attr_scaling_available_freqs
+EXPORT_SYMBOL_GPL vmlinux 0x4114350a	debugfs_create_blob
+EXPORT_SYMBOL_GPL vmlinux 0x4142fdb1	rdev_get_dev
+EXPORT_SYMBOL_GPL vmlinux 0x41473aa2	__fsnotify_inode_delete
+EXPORT_SYMBOL_GPL vmlinux 0x415f12a2	eventfd_signal
+EXPORT_SYMBOL_GPL vmlinux 0x4208ebc3	i2c_new_device
+EXPORT_SYMBOL_GPL vmlinux 0x42494cea	ring_buffer_event_length
+EXPORT_SYMBOL_GPL vmlinux 0x424acc6d	scatterwalk_done
+EXPORT_SYMBOL_GPL vmlinux 0x4293b918	inet_csk_clone
+EXPORT_SYMBOL_GPL vmlinux 0x42b90681	dm_device_name
+EXPORT_SYMBOL_GPL vmlinux 0x42c07f40	crypto_ablkcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0x43152492	inet6_lookup_listener
+EXPORT_SYMBOL_GPL vmlinux 0x43f7d97f	raw_hash_sk
+EXPORT_SYMBOL_GPL vmlinux 0x441764a8	device_reprobe
+EXPORT_SYMBOL_GPL vmlinux 0x441c757e	find_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0x4429a831	class_find_device
+EXPORT_SYMBOL_GPL vmlinux 0x4484a5a4	wait_for_device_probe
+EXPORT_SYMBOL_GPL vmlinux 0x44a65d5c	lock_policy_rwsem_read
+EXPORT_SYMBOL_GPL vmlinux 0x44bbe223	class_compat_register
+EXPORT_SYMBOL_GPL vmlinux 0x452c09b4	spi_sync
+EXPORT_SYMBOL_GPL vmlinux 0x455e2d62	elv_register
+EXPORT_SYMBOL_GPL vmlinux 0x455e4d9a	sg_scsi_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x457594fa	crypto_alg_list
+EXPORT_SYMBOL_GPL vmlinux 0x45bf1ff3	crypto_inc
+EXPORT_SYMBOL_GPL vmlinux 0x46030290	cpufreq_frequency_table_cpuinfo
+EXPORT_SYMBOL_GPL vmlinux 0x461a7cd8	regulator_list_voltage
+EXPORT_SYMBOL_GPL vmlinux 0x46574766	regulator_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x4672e88b	__crypto_dequeue_request
+EXPORT_SYMBOL_GPL vmlinux 0x46a88f6d	fsstack_copy_inode_size
+EXPORT_SYMBOL_GPL vmlinux 0x4752a336	tty_encode_baud_rate
+EXPORT_SYMBOL_GPL vmlinux 0x4774b711	blk_abort_request
+EXPORT_SYMBOL_GPL vmlinux 0x47b71e81	setup_irq
+EXPORT_SYMBOL_GPL vmlinux 0x47f16814	inotify_inode_queue_event
+EXPORT_SYMBOL_GPL vmlinux 0x4857781c	xfrm_output_resume
+EXPORT_SYMBOL_GPL vmlinux 0x4861152c	account_system_vtime
+EXPORT_SYMBOL_GPL vmlinux 0x48a1c799	mnt_want_write_file
+EXPORT_SYMBOL_GPL vmlinux 0x492e80af	spi_busnum_to_master
+EXPORT_SYMBOL_GPL vmlinux 0x4932eba2	cpufreq_frequency_table_verify
+EXPORT_SYMBOL_GPL vmlinux 0x49476326	platform_device_put
+EXPORT_SYMBOL_GPL vmlinux 0x495929e6	sysfs_create_group
+EXPORT_SYMBOL_GPL vmlinux 0x495de2bc	__i2c_board_lock
+EXPORT_SYMBOL_GPL vmlinux 0x496352dc	__lock_page_killable
+EXPORT_SYMBOL_GPL vmlinux 0x49815a0c	rtc_set_alarm
+EXPORT_SYMBOL_GPL vmlinux 0x498bc45e	hrtimer_init_sleeper
+EXPORT_SYMBOL_GPL vmlinux 0x499043d3	crypto_init_queue
+EXPORT_SYMBOL_GPL vmlinux 0x49ad55e1	fuse_do_open
+EXPORT_SYMBOL_GPL vmlinux 0x49d48258	rtc_read_time
+EXPORT_SYMBOL_GPL vmlinux 0x4a12d1a1	regulator_bulk_free
+EXPORT_SYMBOL_GPL vmlinux 0x4a1c95bd	crypto_alloc_aead
+EXPORT_SYMBOL_GPL vmlinux 0x4a6b059a	do_sync_mapping_range
+EXPORT_SYMBOL_GPL vmlinux 0x4a73a288	regulator_get
+EXPORT_SYMBOL_GPL vmlinux 0x4b289f5e	fuse_conn_init
+EXPORT_SYMBOL_GPL vmlinux 0x4b3e49d9	usb_clear_halt
+EXPORT_SYMBOL_GPL vmlinux 0x4b6b0bbe	sysfs_notify
+EXPORT_SYMBOL_GPL vmlinux 0x4b92edd5	tcp_init_congestion_ops
+EXPORT_SYMBOL_GPL vmlinux 0x4ba9a796	bus_rescan_devices
+EXPORT_SYMBOL_GPL vmlinux 0x4bd3e59d	securityfs_remove
+EXPORT_SYMBOL_GPL vmlinux 0x4c24db71	bus_for_each_drv
+EXPORT_SYMBOL_GPL vmlinux 0x4c41c996	usb_wait_anchor_empty_timeout
+EXPORT_SYMBOL_GPL vmlinux 0x4c6154a0	br_handle_frame_hook
+EXPORT_SYMBOL_GPL vmlinux 0x4c759827	byte_rev_table
+EXPORT_SYMBOL_GPL vmlinux 0x4c829a02	__srcu_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x4c999cad	ia64_itr_entry
+EXPORT_SYMBOL_GPL vmlinux 0x4d1c4b3b	blk_execute_rq_nowait
+EXPORT_SYMBOL_GPL vmlinux 0x4d28848c	skb_to_sgvec
+EXPORT_SYMBOL_GPL vmlinux 0x4d6ddd9f	disk_part_iter_next
+EXPORT_SYMBOL_GPL vmlinux 0x4d828ff1	get_net_ns_by_pid
+EXPORT_SYMBOL_GPL vmlinux 0x4d8f4c15	klist_add_before
+EXPORT_SYMBOL_GPL vmlinux 0x4d9031eb	bus_find_device_by_name
+EXPORT_SYMBOL_GPL vmlinux 0x4e2326e5	fuse_conn_kill
+EXPORT_SYMBOL_GPL vmlinux 0x4e5c0811	register_pernet_device
+EXPORT_SYMBOL_GPL vmlinux 0x4e6de187	attribute_container_find_class_device
+EXPORT_SYMBOL_GPL vmlinux 0x4e83049f	fb_deferred_io_init
+EXPORT_SYMBOL_GPL vmlinux 0x4eb1ffd9	inet_ctl_sock_create
+EXPORT_SYMBOL_GPL vmlinux 0x4eedb54d	dev_change_net_namespace
+EXPORT_SYMBOL_GPL vmlinux 0x4ef018c8	crypto_givcipher_type
+EXPORT_SYMBOL_GPL vmlinux 0x4f500439	hwmon_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x4fb207dc	usb_sg_init
+EXPORT_SYMBOL_GPL vmlinux 0x4fb8a01e	driver_attach
+EXPORT_SYMBOL_GPL vmlinux 0x4fc56cce	iommu_detach_device
+EXPORT_SYMBOL_GPL vmlinux 0x4ff5df80	pci_ioremap_bar
+EXPORT_SYMBOL_GPL vmlinux 0x5002494a	fb_bl_default_curve
+EXPORT_SYMBOL_GPL vmlinux 0x500c73ee	inotify_add_watch
+EXPORT_SYMBOL_GPL vmlinux 0x5086ac3a	alg_test
+EXPORT_SYMBOL_GPL vmlinux 0x50afa71d	klist_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0x50d8a861	sync_filesystem
+EXPORT_SYMBOL_GPL vmlinux 0x50e7193a	__i2c_first_dynamic_bus_num
+EXPORT_SYMBOL_GPL vmlinux 0x50f5e532	call_rcu_sched
+EXPORT_SYMBOL_GPL vmlinux 0x50fad434	round_jiffies_up
+EXPORT_SYMBOL_GPL vmlinux 0x513df7e7	debugfs_remove
+EXPORT_SYMBOL_GPL vmlinux 0x520a8b61	crypto_unregister_template
+EXPORT_SYMBOL_GPL vmlinux 0x5247837e	rt_mutex_timed_lock
+EXPORT_SYMBOL_GPL vmlinux 0x527adc4b	cpufreq_frequency_table_target
+EXPORT_SYMBOL_GPL vmlinux 0x52ba785e	bd_release_from_disk
+EXPORT_SYMBOL_GPL vmlinux 0x52c1bec0	pm_runtime_resume
+EXPORT_SYMBOL_GPL vmlinux 0x52d111ea	pm_qos_update_requirement
+EXPORT_SYMBOL_GPL vmlinux 0x53644048	page_mkclean
+EXPORT_SYMBOL_GPL vmlinux 0x53712f93	device_find_child
+EXPORT_SYMBOL_GPL vmlinux 0x5372dede	unregister_acpi_bus_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x53986488	register_die_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x539c3563	sysfs_schedule_callback
+EXPORT_SYMBOL_GPL vmlinux 0x53caefb3	inet_csk_get_port
+EXPORT_SYMBOL_GPL vmlinux 0x53d0cbaa	fuse_do_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x53dbaf6a	inotify_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x53f97007	ring_buffer_size
+EXPORT_SYMBOL_GPL vmlinux 0x5407d036	fuse_request_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x545d2839	class_compat_remove_link
+EXPORT_SYMBOL_GPL vmlinux 0x5460c8d8	fsnotify_get_cookie
+EXPORT_SYMBOL_GPL vmlinux 0x54858a08	hrtimer_try_to_cancel
+EXPORT_SYMBOL_GPL vmlinux 0x549525ef	handle_nested_irq
+EXPORT_SYMBOL_GPL vmlinux 0x552eb4fe	hrtimer_get_remaining
+EXPORT_SYMBOL_GPL vmlinux 0x5586586f	get_task_mm
+EXPORT_SYMBOL_GPL vmlinux 0x55f2580b	__alloc_percpu
+EXPORT_SYMBOL_GPL vmlinux 0x56310925	regulator_mode_to_status
+EXPORT_SYMBOL_GPL vmlinux 0x5641485b	tty_termios_encode_baud_rate
+EXPORT_SYMBOL_GPL vmlinux 0x564705fd	usb_sg_cancel
+EXPORT_SYMBOL_GPL vmlinux 0x56947347	dmi_walk
+EXPORT_SYMBOL_GPL vmlinux 0x56d45189	fib_rules_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x56e259aa	usb_autopm_put_interface
+EXPORT_SYMBOL_GPL vmlinux 0x579e0bf5	rtnl_unregister_all
+EXPORT_SYMBOL_GPL vmlinux 0x57b85758	task_current_syscall
+EXPORT_SYMBOL_GPL vmlinux 0x57ead62c	regulator_set_mode
+EXPORT_SYMBOL_GPL vmlinux 0x580ab1f4	__get_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0x587b6aa7	__module_text_address
+EXPORT_SYMBOL_GPL vmlinux 0x58b16e4a	user_instantiate
+EXPORT_SYMBOL_GPL vmlinux 0x58b96f2b	zap_vma_ptes
+EXPORT_SYMBOL_GPL vmlinux 0x592640fb	crypto_lookup_template
+EXPORT_SYMBOL_GPL vmlinux 0x5962f094	power_supply_get_by_name
+EXPORT_SYMBOL_GPL vmlinux 0x598bdeed	sysfs_add_file_to_group
+EXPORT_SYMBOL_GPL vmlinux 0x5996b575	platform_get_irq
+EXPORT_SYMBOL_GPL vmlinux 0x59dbc361	shash_attr_alg
+EXPORT_SYMBOL_GPL vmlinux 0x5a02ef2d	rtc_alarm_irq_enable
+EXPORT_SYMBOL_GPL vmlinux 0x5a07f895	usb_ifnum_to_if
+EXPORT_SYMBOL_GPL vmlinux 0x5a2df955	driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x5a445cd3	ring_buffer_swap_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x5a7bfe41	crypto_probing_notify
+EXPORT_SYMBOL_GPL vmlinux 0x5aa78749	__blk_end_request_err
+EXPORT_SYMBOL_GPL vmlinux 0x5ad20436	enable_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0x5ad81ae2	inotify_rm_watch
+EXPORT_SYMBOL_GPL vmlinux 0x5ae6c3e9	inet_csk_listen_stop
+EXPORT_SYMBOL_GPL vmlinux 0x5ae8b2aa	sock_prot_inuse_get
+EXPORT_SYMBOL_GPL vmlinux 0x5aea5093	__rt_mutex_init
+EXPORT_SYMBOL_GPL vmlinux 0x5afac41f	find_module
+EXPORT_SYMBOL_GPL vmlinux 0x5b309500	__inet_lookup_listener
+EXPORT_SYMBOL_GPL vmlinux 0x5b4c2418	__rtnl_link_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x5b5fa9a0	atomic_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x5ba0c1b7	ring_buffer_time_stamp
+EXPORT_SYMBOL_GPL vmlinux 0x5bc2f8b5	add_to_page_cache_lru
+EXPORT_SYMBOL_GPL vmlinux 0x5bfc03c3	unregister_keyboard_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5c6884d1	device_move
+EXPORT_SYMBOL_GPL vmlinux 0x5c7da688	queue_work_on
+EXPORT_SYMBOL_GPL vmlinux 0x5d0f6f57	kbd_table
+EXPORT_SYMBOL_GPL vmlinux 0x5d29e983	key_type_user
+EXPORT_SYMBOL_GPL vmlinux 0x5d730e7b	raw_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x5d87c067	register_acpi_bus_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5d8a454b	sysdev_show_int
+EXPORT_SYMBOL_GPL vmlinux 0x5dbb667f	raw_unhash_sk
+EXPORT_SYMBOL_GPL vmlinux 0x5dbf7bd6	usb_queue_reset_device
+EXPORT_SYMBOL_GPL vmlinux 0x5dd67618	register_netevent_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5e56967d	usb_reset_configuration
+EXPORT_SYMBOL_GPL vmlinux 0x5e56f07c	device_del
+EXPORT_SYMBOL_GPL vmlinux 0x5ea0775e	da903x_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x5ef324a6	i2c_new_probed_device
+EXPORT_SYMBOL_GPL vmlinux 0x5efc5948	hrtimer_start_range_ns
+EXPORT_SYMBOL_GPL vmlinux 0x5f58ed0b	crypto_alloc_instance
+EXPORT_SYMBOL_GPL vmlinux 0x5f95aab6	sn_acpi_rev
+EXPORT_SYMBOL_GPL vmlinux 0x5fcdec5d	xfrm_ealg_get_byidx
+EXPORT_SYMBOL_GPL vmlinux 0x5ffbf7a3	get_user_pages_fast
+EXPORT_SYMBOL_GPL vmlinux 0x6012eb01	sysdev_class_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x6073b411	usb_autopm_put_interface_async
+EXPORT_SYMBOL_GPL vmlinux 0x6073de5e	__rtnl_register
+EXPORT_SYMBOL_GPL vmlinux 0x60a13e90	rcu_barrier
+EXPORT_SYMBOL_GPL vmlinux 0x60db377d	swiotlb_sync_single_range_for_device
+EXPORT_SYMBOL_GPL vmlinux 0x60e5d9b8	blk_queue_rq_timed_out
+EXPORT_SYMBOL_GPL vmlinux 0x60f0cad0	fb_deferred_io_open
+EXPORT_SYMBOL_GPL vmlinux 0x61124b36	kern_mount_data
+EXPORT_SYMBOL_GPL vmlinux 0x611e05d5	br_fdb_test_addr_hook
+EXPORT_SYMBOL_GPL vmlinux 0x61394469	inet_csk_search_req
+EXPORT_SYMBOL_GPL vmlinux 0x616124a2	regulator_get_init_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0x61e1a6da	unregister_pernet_device
+EXPORT_SYMBOL_GPL vmlinux 0x61e4a380	spi_setup
+EXPORT_SYMBOL_GPL vmlinux 0x623f8080	__atomic_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x629a7f6e	do_posix_clock_nonanosleep
+EXPORT_SYMBOL_GPL vmlinux 0x62a03dc7	sk_clone
+EXPORT_SYMBOL_GPL vmlinux 0x62a4214a	usb_interrupt_msg
+EXPORT_SYMBOL_GPL vmlinux 0x62be6c20	klist_next
+EXPORT_SYMBOL_GPL vmlinux 0x62cebfd3	da903x_set_bits
+EXPORT_SYMBOL_GPL vmlinux 0x633b4f70	queue_delayed_work
+EXPORT_SYMBOL_GPL vmlinux 0x636ea74b	module_mutex
+EXPORT_SYMBOL_GPL vmlinux 0x63ad648d	bus_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x644c2474	__create_workqueue_key
+EXPORT_SYMBOL_GPL vmlinux 0x64561f65	device_remove_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0x653d0690	netlink_has_listeners
+EXPORT_SYMBOL_GPL vmlinux 0x654c49e2	aer_irq
+EXPORT_SYMBOL_GPL vmlinux 0x6552ac08	ring_buffer_reset
+EXPORT_SYMBOL_GPL vmlinux 0x658bb324	klist_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0x65aed4b5	kset_create_and_add
+EXPORT_SYMBOL_GPL vmlinux 0x65b2b3c1	sysfs_get
+EXPORT_SYMBOL_GPL vmlinux 0x65bbbc78	schedule_hrtimeout_range
+EXPORT_SYMBOL_GPL vmlinux 0x65ccb6f0	call_netevent_notifiers
+EXPORT_SYMBOL_GPL vmlinux 0x661601de	sprint_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x666d2119	usb_match_id
+EXPORT_SYMBOL_GPL vmlinux 0x668402aa	crypto_put_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x66b2a859	nr_free_buffer_pages
+EXPORT_SYMBOL_GPL vmlinux 0x66bb1692	d_materialise_unique
+EXPORT_SYMBOL_GPL vmlinux 0x66cca3f9	ring_buffer_overruns
+EXPORT_SYMBOL_GPL vmlinux 0x66cdf2ae	hrtimer_cancel
+EXPORT_SYMBOL_GPL vmlinux 0x66d87d38	symbol_put_addr
+EXPORT_SYMBOL_GPL vmlinux 0x66ff61f8	set_cpus_allowed_ptr
+EXPORT_SYMBOL_GPL vmlinux 0x670c1539	tcp_get_info
+EXPORT_SYMBOL_GPL vmlinux 0x675e4164	rtc_irq_register
+EXPORT_SYMBOL_GPL vmlinux 0x675ec084	atomic_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x67858a6e	crypto_unregister_alg
+EXPORT_SYMBOL_GPL vmlinux 0x67955ce6	profile_hits
+EXPORT_SYMBOL_GPL vmlinux 0x67bac539	sysdev_create_file
+EXPORT_SYMBOL_GPL vmlinux 0x67d7618a	__wake_up_sync_key
+EXPORT_SYMBOL_GPL vmlinux 0x67dceb56	__wake_up_sync
+EXPORT_SYMBOL_GPL vmlinux 0x67ddc25d	blk_rq_check_limits
+EXPORT_SYMBOL_GPL vmlinux 0x67fc7d1b	inet_hash_connect
+EXPORT_SYMBOL_GPL vmlinux 0x68083357	cpufreq_driver_target
+EXPORT_SYMBOL_GPL vmlinux 0x685ef9e2	sysdev_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x686c703f	xfrm_count_auth_supported
+EXPORT_SYMBOL_GPL vmlinux 0x6896bc5b	transport_configure_device
+EXPORT_SYMBOL_GPL vmlinux 0x68adddd8	platform_device_add
+EXPORT_SYMBOL_GPL vmlinux 0x69d3e6bc	security_inode_mkdir
+EXPORT_SYMBOL_GPL vmlinux 0x69d9fc6a	regulator_count_voltages
+EXPORT_SYMBOL_GPL vmlinux 0x6a8bb155	unregister_jprobes
+EXPORT_SYMBOL_GPL vmlinux 0x6ad4d5e0	fuse_request_send
+EXPORT_SYMBOL_GPL vmlinux 0x6b2166a8	power_supply_changed
+EXPORT_SYMBOL_GPL vmlinux 0x6b56c192	ring_buffer_write
+EXPORT_SYMBOL_GPL vmlinux 0x6bd0a7d1	register_kprobes
+EXPORT_SYMBOL_GPL vmlinux 0x6be62dfd	probe_kernel_read
+EXPORT_SYMBOL_GPL vmlinux 0x6bef1882	device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x6c347001	user_read
+EXPORT_SYMBOL_GPL vmlinux 0x6c43bfb4	input_class
+EXPORT_SYMBOL_GPL vmlinux 0x6c8eb98f	xfrm_aalg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0x6cae3ad4	pcap_adc_sync
+EXPORT_SYMBOL_GPL vmlinux 0x6cb0c56c	i2c_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0x6cd09f7a	inet6_hash_connect
+EXPORT_SYMBOL_GPL vmlinux 0x6cd22362	crypto_grab_aead
+EXPORT_SYMBOL_GPL vmlinux 0x6d2fc5a6	net_namespace_list
+EXPORT_SYMBOL_GPL vmlinux 0x6d7c597f	sysfs_get_dirent
+EXPORT_SYMBOL_GPL vmlinux 0x6d93e829	unregister_kretprobes
+EXPORT_SYMBOL_GPL vmlinux 0x6e567c8b	register_pernet_gen_subsys
+EXPORT_SYMBOL_GPL vmlinux 0x6e7474fc	xfrm_ealg_get_byid
+EXPORT_SYMBOL_GPL vmlinux 0x6e80b63a	led_trigger_event
+EXPORT_SYMBOL_GPL vmlinux 0x6e9c8fd2	inode_add_to_lists
+EXPORT_SYMBOL_GPL vmlinux 0x6eda5dc4	attribute_container_classdev_to_container
+EXPORT_SYMBOL_GPL vmlinux 0x6edd46a6	__sock_recv_timestamp
+EXPORT_SYMBOL_GPL vmlinux 0x6ee463e1	__audit_inode_child
+EXPORT_SYMBOL_GPL vmlinux 0x6f28c3e1	blocking_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x6f585059	led_trigger_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x6f6b364a	tcp_done
+EXPORT_SYMBOL_GPL vmlinux 0x6f751754	register_posix_clock
+EXPORT_SYMBOL_GPL vmlinux 0x6f8ee50b	blk_queue_rq_timeout
+EXPORT_SYMBOL_GPL vmlinux 0x6fce3b05	inotify_find_update_watch
+EXPORT_SYMBOL_GPL vmlinux 0x6fe3d8cf	ktime_add_safe
+EXPORT_SYMBOL_GPL vmlinux 0x6ff607b6	crypto_get_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x701fec6c	blk_abort_queue
+EXPORT_SYMBOL_GPL vmlinux 0x7060bb66	tcp_reno_ssthresh
+EXPORT_SYMBOL_GPL vmlinux 0x706b3a33	cpufreq_frequency_table_get_attr
+EXPORT_SYMBOL_GPL vmlinux 0x709d78f5	inet_twsk_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x70d21287	rtnl_put_cacheinfo
+EXPORT_SYMBOL_GPL vmlinux 0x7100336b	swiotlb_unmap_page
+EXPORT_SYMBOL_GPL vmlinux 0x71131788	sysfs_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x713d19a7	fuse_conn_get
+EXPORT_SYMBOL_GPL vmlinux 0x716265c7	debugfs_initialized
+EXPORT_SYMBOL_GPL vmlinux 0x71bce689	default_backing_dev_info
+EXPORT_SYMBOL_GPL vmlinux 0x71f7a5d2	usb_hub_clear_tt_buffer
+EXPORT_SYMBOL_GPL vmlinux 0x722ccc33	crypto_init_shash_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x7278d328	all_vm_events
+EXPORT_SYMBOL_GPL vmlinux 0x72a15ad2	crypto_alloc_tfm
+EXPORT_SYMBOL_GPL vmlinux 0x72b22b9c	fuse_conn_put
+EXPORT_SYMBOL_GPL vmlinux 0x72b3d75d	do_kern_mount
+EXPORT_SYMBOL_GPL vmlinux 0x72c56fab	pci_disable_rom
+EXPORT_SYMBOL_GPL vmlinux 0x72e03bae	stop_machine_create
+EXPORT_SYMBOL_GPL vmlinux 0x7398f64b	pci_unblock_user_cfg_access
+EXPORT_SYMBOL_GPL vmlinux 0x745e34dc	apply_to_page_range
+EXPORT_SYMBOL_GPL vmlinux 0x746a0f5a	blk_rq_err_bytes
+EXPORT_SYMBOL_GPL vmlinux 0x746ca2a5	init_user_ns
+EXPORT_SYMBOL_GPL vmlinux 0x74abdafa	task_handoff_register
+EXPORT_SYMBOL_GPL vmlinux 0x74baf17a	tracing_is_on
+EXPORT_SYMBOL_GPL vmlinux 0x74e78eaf	empty_zero_page
+EXPORT_SYMBOL_GPL vmlinux 0x75546f09	debugfs_rename
+EXPORT_SYMBOL_GPL vmlinux 0x75aa7535	cleanup_srcu_struct
+EXPORT_SYMBOL_GPL vmlinux 0x75bcbfa7	hrtimer_forward
+EXPORT_SYMBOL_GPL vmlinux 0x75e8ad2b	fuse_request_send_background
+EXPORT_SYMBOL_GPL vmlinux 0x75e8f3c3	crypto_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x75f024b0	skcipher_geniv_free
+EXPORT_SYMBOL_GPL vmlinux 0x7613718a	init_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0x76248c99	mnt_want_write
+EXPORT_SYMBOL_GPL vmlinux 0x76afb191	class_compat_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x7707ae60	crypto_shash_finup
+EXPORT_SYMBOL_GPL vmlinux 0x773ca527	init_uts_ns
+EXPORT_SYMBOL_GPL vmlinux 0x7762dc0a	cpufreq_cpu_get
+EXPORT_SYMBOL_GPL vmlinux 0x77a8ac9a	usb_reset_device
+EXPORT_SYMBOL_GPL vmlinux 0x77d29251	ring_buffer_record_disable
+EXPORT_SYMBOL_GPL vmlinux 0x7824693f	crypto_shoot_alg
+EXPORT_SYMBOL_GPL vmlinux 0x78388038	crypto_spawn_tfm2
+EXPORT_SYMBOL_GPL vmlinux 0x784062cc	pm_runtime_idle
+EXPORT_SYMBOL_GPL vmlinux 0x7866d317	usb_unlink_urb
+EXPORT_SYMBOL_GPL vmlinux 0x789acd66	arch_fix_phys_package_id
+EXPORT_SYMBOL_GPL vmlinux 0x78d74286	ring_buffer_iter_peek
+EXPORT_SYMBOL_GPL vmlinux 0x78e4a4ee	klist_add_after
+EXPORT_SYMBOL_GPL vmlinux 0x79073fa7	__pci_reset_function
+EXPORT_SYMBOL_GPL vmlinux 0x792fe8d6	user_destroy
+EXPORT_SYMBOL_GPL vmlinux 0x7944e0fc	tracing_off
+EXPORT_SYMBOL_GPL vmlinux 0x7975163f	platform_driver_register
+EXPORT_SYMBOL_GPL vmlinux 0x7a9335e8	__blkdev_driver_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0x7aa0be25	debugfs_create_u16
+EXPORT_SYMBOL_GPL vmlinux 0x7ac57401	crypto_alg_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x7ae1ae8e	cpufreq_frequency_table_put_attr
+EXPORT_SYMBOL_GPL vmlinux 0x7b293868	cpufreq_cpu_put
+EXPORT_SYMBOL_GPL vmlinux 0x7bfb7cd9	shash_ahash_update
+EXPORT_SYMBOL_GPL vmlinux 0x7c0a1a77	tty_prepare_flip_string_flags
+EXPORT_SYMBOL_GPL vmlinux 0x7c0e7ce8	led_trigger_set
+EXPORT_SYMBOL_GPL vmlinux 0x7c7efce8	tcp_slow_start
+EXPORT_SYMBOL_GPL vmlinux 0x7c9095c3	user_match
+EXPORT_SYMBOL_GPL vmlinux 0x7cd09b27	i2c_new_dummy
+EXPORT_SYMBOL_GPL vmlinux 0x7d11a946	rdev_get_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0x7d3e08fe	security_inode_create
+EXPORT_SYMBOL_GPL vmlinux 0x7d6f2673	hwmon_device_register
+EXPORT_SYMBOL_GPL vmlinux 0x7daa17d7	bd_claim_by_disk
+EXPORT_SYMBOL_GPL vmlinux 0x7daee025	regulator_get_voltage
+EXPORT_SYMBOL_GPL vmlinux 0x7dc5d0b6	crypto_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x7e1183c9	async_schedule
+EXPORT_SYMBOL_GPL vmlinux 0x7e64181d	usb_calc_bus_time
+EXPORT_SYMBOL_GPL vmlinux 0x7eb6ac79	inet_csk_compat_setsockopt
+EXPORT_SYMBOL_GPL vmlinux 0x7f19c836	unlock_policy_rwsem_write
+EXPORT_SYMBOL_GPL vmlinux 0x7f261e34	queue_delayed_work_on
+EXPORT_SYMBOL_GPL vmlinux 0x7f650721	unregister_pernet_gen_device
+EXPORT_SYMBOL_GPL vmlinux 0x7faaf9a9	relay_reset
+EXPORT_SYMBOL_GPL vmlinux 0x7fdb5a5d	rtc_device_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x7fe22d5e	aead_geniv_free
+EXPORT_SYMBOL_GPL vmlinux 0x7ff10ccf	raw_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0x800684ed	pci_create_slot
+EXPORT_SYMBOL_GPL vmlinux 0x800b144e	ip_route_output_flow
+EXPORT_SYMBOL_GPL vmlinux 0x8014b6af	input_event_from_user
+EXPORT_SYMBOL_GPL vmlinux 0x8039d043	selinux_secmark_relabel_packet_permission
+EXPORT_SYMBOL_GPL vmlinux 0x805ec55d	lookup_instantiate_filp
+EXPORT_SYMBOL_GPL vmlinux 0x808ec1a3	crypto_alg_tested
+EXPORT_SYMBOL_GPL vmlinux 0x80ee55c3	selinux_secmark_refcount_inc
+EXPORT_SYMBOL_GPL vmlinux 0x81814dd2	usb_buffer_unmap_sg
+EXPORT_SYMBOL_GPL vmlinux 0x819640fd	usb_mon_register
+EXPORT_SYMBOL_GPL vmlinux 0x81c02a32	da903x_update
+EXPORT_SYMBOL_GPL vmlinux 0x81ea6c4d	swiotlb_map_page
+EXPORT_SYMBOL_GPL vmlinux 0x828afdcf	led_trigger_unregister_simple
+EXPORT_SYMBOL_GPL vmlinux 0x82939ebd	rcu_batches_completed_sched
+EXPORT_SYMBOL_GPL vmlinux 0x82ab9d01	usb_get_status
+EXPORT_SYMBOL_GPL vmlinux 0x82d79b51	sysctl_vfs_cache_pressure
+EXPORT_SYMBOL_GPL vmlinux 0x831cfc4d	proc_net_fops_create
+EXPORT_SYMBOL_GPL vmlinux 0x832cedb7	pci_cleanup_aer_uncorrect_error_status
+EXPORT_SYMBOL_GPL vmlinux 0x8384952c	regulator_force_disable
+EXPORT_SYMBOL_GPL vmlinux 0x83c67557	regulator_get_exclusive
+EXPORT_SYMBOL_GPL vmlinux 0x84152155	eventfd_fget
+EXPORT_SYMBOL_GPL vmlinux 0x8419be48	__rtnl_link_register
+EXPORT_SYMBOL_GPL vmlinux 0x842a44a4	crypto_nivaead_type
+EXPORT_SYMBOL_GPL vmlinux 0x843d70ef	acpi_is_root_bridge
+EXPORT_SYMBOL_GPL vmlinux 0x84689f68	bsg_register_queue
+EXPORT_SYMBOL_GPL vmlinux 0x8469a5c7	acpi_ec_add_query_handler
+EXPORT_SYMBOL_GPL vmlinux 0x84704dc8	dm_send_uevents
+EXPORT_SYMBOL_GPL vmlinux 0x849dd2a4	pm_request_resume
+EXPORT_SYMBOL_GPL vmlinux 0x84cdbf11	each_symbol
+EXPORT_SYMBOL_GPL vmlinux 0x852108bd	get_dcookie
+EXPORT_SYMBOL_GPL vmlinux 0x8596f2b6	debugfs_create_x8
+EXPORT_SYMBOL_GPL vmlinux 0x85ba264d	inet_diag_register
+EXPORT_SYMBOL_GPL vmlinux 0x85c10896	rcu_batches_completed_bh
+EXPORT_SYMBOL_GPL vmlinux 0x862cd214	acpi_pci_find_root
+EXPORT_SYMBOL_GPL vmlinux 0x863de26a	usb_kill_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0x864af958	klist_add_tail
+EXPORT_SYMBOL_GPL vmlinux 0x868784cb	__symbol_get
+EXPORT_SYMBOL_GPL vmlinux 0x86b1667d	hwrng_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x86f6b99d	synchronize_rcu_expedited
+EXPORT_SYMBOL_GPL vmlinux 0x8715d5f7	pci_find_next_capability
+EXPORT_SYMBOL_GPL vmlinux 0x87754115	raw_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x87f75c0c	ring_buffer_record_enable_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x8810ad5e	crypto_xor
+EXPORT_SYMBOL_GPL vmlinux 0x885142a6	nf_net_netfilter_sysctl_path
+EXPORT_SYMBOL_GPL vmlinux 0x88aafba5	fib_rules_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x88d02212	srcu_batches_completed
+EXPORT_SYMBOL_GPL vmlinux 0x88db6e37	raw_seq_start
+EXPORT_SYMBOL_GPL vmlinux 0x88e6ef56	ring_buffer_empty
+EXPORT_SYMBOL_GPL vmlinux 0x8921db3f	devm_kfree
+EXPORT_SYMBOL_GPL vmlinux 0x893c5626	__ring_buffer_alloc
+EXPORT_SYMBOL_GPL vmlinux 0x89d3dfd8	platform_bus
+EXPORT_SYMBOL_GPL vmlinux 0x8a6dc8a5	da903x_read
+EXPORT_SYMBOL_GPL vmlinux 0x8ab9a69e	invalidate_inode_pages2
+EXPORT_SYMBOL_GPL vmlinux 0x8b253e07	regulator_set_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0x8b5d1b6c	dma_get_required_mask
+EXPORT_SYMBOL_GPL vmlinux 0x8ba72463	sysdev_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0x8bb4c393	relay_flush
+EXPORT_SYMBOL_GPL vmlinux 0x8be5dfd3	usb_put_hcd
+EXPORT_SYMBOL_GPL vmlinux 0x8bfa94d7	regulator_register
+EXPORT_SYMBOL_GPL vmlinux 0x8c85ba54	driver_register
+EXPORT_SYMBOL_GPL vmlinux 0x8cb2927c	sock_prot_inuse_add
+EXPORT_SYMBOL_GPL vmlinux 0x8cb34e92	__module_address
+EXPORT_SYMBOL_GPL vmlinux 0x8ce14c92	pci_enable_rom
+EXPORT_SYMBOL_GPL vmlinux 0x8cea8609	sn_ioboard_to_pci_bus
+EXPORT_SYMBOL_GPL vmlinux 0x8d033df4	klist_node_attached
+EXPORT_SYMBOL_GPL vmlinux 0x8d201514	is_multithreading_enabled
+EXPORT_SYMBOL_GPL vmlinux 0x8d4ee2f2	put_driver
+EXPORT_SYMBOL_GPL vmlinux 0x8d94a1fe	usb_root_hub_lost_power
+EXPORT_SYMBOL_GPL vmlinux 0x8dbdc8f0	inet_twsk_put
+EXPORT_SYMBOL_GPL vmlinux 0x8de35411	register_net_sysctl_table
+EXPORT_SYMBOL_GPL vmlinux 0x8e3138e8	transport_add_device
+EXPORT_SYMBOL_GPL vmlinux 0x8f071e2e	fixed_phy_set_link_update
+EXPORT_SYMBOL_GPL vmlinux 0x8f6ac316	bus_for_each_dev
+EXPORT_SYMBOL_GPL vmlinux 0x8f6cee77	__round_jiffies_relative
+EXPORT_SYMBOL_GPL vmlinux 0x8fa2efd2	dm_kill_unmapped_request
+EXPORT_SYMBOL_GPL vmlinux 0x8fa74514	sysdev_suspend
+EXPORT_SYMBOL_GPL vmlinux 0x8fb2c9e6	tcp_cong_avoid_ai
+EXPORT_SYMBOL_GPL vmlinux 0x8fce7551	xfrm_audit_state_notfound_simple
+EXPORT_SYMBOL_GPL vmlinux 0x8fe19af9	crypto_default_rng
+EXPORT_SYMBOL_GPL vmlinux 0x8ffa5e28	devres_open_group
+EXPORT_SYMBOL_GPL vmlinux 0x8ffdef12	blk_queue_dma_drain
+EXPORT_SYMBOL_GPL vmlinux 0x9009602a	acpi_bus_get_ejd
+EXPORT_SYMBOL_GPL vmlinux 0x9061a415	crypto_enqueue_request
+EXPORT_SYMBOL_GPL vmlinux 0x906fc4d7	crypto_alloc_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0x90709818	__pm_runtime_set_status
+EXPORT_SYMBOL_GPL vmlinux 0x908597c7	seq_open_net
+EXPORT_SYMBOL_GPL vmlinux 0x908bab2f	eventfd_ctx_fdget
+EXPORT_SYMBOL_GPL vmlinux 0x90a1004a	crypto_has_alg
+EXPORT_SYMBOL_GPL vmlinux 0x90bbf3bf	aead_geniv_init
+EXPORT_SYMBOL_GPL vmlinux 0x914ef6b2	__pm_runtime_disable
+EXPORT_SYMBOL_GPL vmlinux 0x9159b9d6	profile_event_register
+EXPORT_SYMBOL_GPL vmlinux 0x91d4db29	usb_alloc_urb
+EXPORT_SYMBOL_GPL vmlinux 0x92042afa	eventfd_ctx_fileget
+EXPORT_SYMBOL_GPL vmlinux 0x9254aa73	__inet_inherit_port
+EXPORT_SYMBOL_GPL vmlinux 0x92d3179e	tty_get_pgrp
+EXPORT_SYMBOL_GPL vmlinux 0x92d31cfb	fixed_phy_add
+EXPORT_SYMBOL_GPL vmlinux 0x92d79886	input_ff_event
+EXPORT_SYMBOL_GPL vmlinux 0x92f98de9	usb_kill_urb
+EXPORT_SYMBOL_GPL vmlinux 0x92fb217b	dcookie_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x9317b92b	single_release_net
+EXPORT_SYMBOL_GPL vmlinux 0x93d2422d	snmp_mib_free
+EXPORT_SYMBOL_GPL vmlinux 0x942a41f4	iommu_unmap_range
+EXPORT_SYMBOL_GPL vmlinux 0x9475ae92	usb_get_urb
+EXPORT_SYMBOL_GPL vmlinux 0x9491b8de	get_driver
+EXPORT_SYMBOL_GPL vmlinux 0x94a05b90	crypto_register_ahash
+EXPORT_SYMBOL_GPL vmlinux 0x94a4ac31	__mmdrop
+EXPORT_SYMBOL_GPL vmlinux 0x952664c5	do_exit
+EXPORT_SYMBOL_GPL vmlinux 0x954530a8	crypto_attr_alg2
+EXPORT_SYMBOL_GPL vmlinux 0x9551ca76	blk_queue_lld_busy
+EXPORT_SYMBOL_GPL vmlinux 0x955a2f0c	tcp_reno_cong_avoid
+EXPORT_SYMBOL_GPL vmlinux 0x95714ebe	__pneigh_lookup
+EXPORT_SYMBOL_GPL vmlinux 0x9589b181	net_assign_generic
+EXPORT_SYMBOL_GPL vmlinux 0x96169642	class_dev_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0x961a8cd3	unlock_policy_rwsem_read
+EXPORT_SYMBOL_GPL vmlinux 0x964d5c39	acpi_os_map_memory
+EXPORT_SYMBOL_GPL vmlinux 0x967a0da3	security_inode_setattr
+EXPORT_SYMBOL_GPL vmlinux 0x96898726	rtc_set_mmss
+EXPORT_SYMBOL_GPL vmlinux 0x96cbcf31	pm_qos_add_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x96ed0cbf	ring_buffer_alloc_read_page
+EXPORT_SYMBOL_GPL vmlinux 0x9738ba7a	tty_ldisc_deref
+EXPORT_SYMBOL_GPL vmlinux 0x97f1b169	remove_irq
+EXPORT_SYMBOL_GPL vmlinux 0x980d213a	crypto_aead_type
+EXPORT_SYMBOL_GPL vmlinux 0x981b8cab	crypto_init_spawn
+EXPORT_SYMBOL_GPL vmlinux 0x98275841	blkcipher_walk_virt
+EXPORT_SYMBOL_GPL vmlinux 0x9924c496	__usb_get_extra_descriptor
+EXPORT_SYMBOL_GPL vmlinux 0x99477825	rtc_class_close
+EXPORT_SYMBOL_GPL vmlinux 0x995d1071	prof_on
+EXPORT_SYMBOL_GPL vmlinux 0x9a11a0fc	crypto_attr_alg_name
+EXPORT_SYMBOL_GPL vmlinux 0x9a13ab00	crypto_find_alg
+EXPORT_SYMBOL_GPL vmlinux 0x9a8a13a3	ring_buffer_entries
+EXPORT_SYMBOL_GPL vmlinux 0x9accea6d	rt_mutex_trylock
+EXPORT_SYMBOL_GPL vmlinux 0x9acddfd1	vfs_test_lock
+EXPORT_SYMBOL_GPL vmlinux 0x9ae9e76d	device_create_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0x9b110656	relay_switch_subbuf
+EXPORT_SYMBOL_GPL vmlinux 0x9b3845f0	usb_get_from_anchor
+EXPORT_SYMBOL_GPL vmlinux 0x9b744c63	inet_twsk_schedule
+EXPORT_SYMBOL_GPL vmlinux 0x9b8c7b67	do_add_mount
+EXPORT_SYMBOL_GPL vmlinux 0x9b900e90	power_supply_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x9ba0501e	unregister_vt_notifier
+EXPORT_SYMBOL_GPL vmlinux 0x9bb90e62	kobject_uevent_env
+EXPORT_SYMBOL_GPL vmlinux 0x9bb9faa3	rtc_irq_set_state
+EXPORT_SYMBOL_GPL vmlinux 0x9bdc3bec	k_handler
+EXPORT_SYMBOL_GPL vmlinux 0x9bf49b3b	crypto_register_shash
+EXPORT_SYMBOL_GPL vmlinux 0x9c0fb088	srcu_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0x9c2867d0	klist_init
+EXPORT_SYMBOL_GPL vmlinux 0x9c2c370b	ring_buffer_reset_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x9c4bc5d2	sysfs_remove_link
+EXPORT_SYMBOL_GPL vmlinux 0x9c691f99	pci_bus_max_busnr
+EXPORT_SYMBOL_GPL vmlinux 0x9c7d0c36	platform_add_devices
+EXPORT_SYMBOL_GPL vmlinux 0x9c9623ef	power_supply_set_battery_charged
+EXPORT_SYMBOL_GPL vmlinux 0x9c9e54e2	page_cache_async_readahead
+EXPORT_SYMBOL_GPL vmlinux 0x9ca489f4	ring_buffer_record_disable_cpu
+EXPORT_SYMBOL_GPL vmlinux 0x9cb8037b	xfrm_count_enc_supported
+EXPORT_SYMBOL_GPL vmlinux 0x9cd884e9	crypto_alloc_shash
+EXPORT_SYMBOL_GPL vmlinux 0x9d3a0658	crypto_register_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0x9d727492	spi_unregister_master
+EXPORT_SYMBOL_GPL vmlinux 0x9e448068	input_ff_erase
+EXPORT_SYMBOL_GPL vmlinux 0x9e711ad2	pm_qos_requirement
+EXPORT_SYMBOL_GPL vmlinux 0x9e7f3e34	pci_block_user_cfg_access
+EXPORT_SYMBOL_GPL vmlinux 0x9eea9107	stop_machine
+EXPORT_SYMBOL_GPL vmlinux 0x9f38c33e	per_cpu____uv_hub_info
+EXPORT_SYMBOL_GPL vmlinux 0x9f40a6d6	async_synchronize_full_domain
+EXPORT_SYMBOL_GPL vmlinux 0x9f6368d7	rdev_get_id
+EXPORT_SYMBOL_GPL vmlinux 0x9f85ed90	klist_remove
+EXPORT_SYMBOL_GPL vmlinux 0x9f8678aa	rtc_irq_unregister
+EXPORT_SYMBOL_GPL vmlinux 0x9fc1672d	usb_bulk_msg
+EXPORT_SYMBOL_GPL vmlinux 0x9fce80db	fb_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xa00f30af	inotify_remove_watch_locked
+EXPORT_SYMBOL_GPL vmlinux 0xa0255440	net_ipv4_ctl_path
+EXPORT_SYMBOL_GPL vmlinux 0xa05a5afd	devres_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xa06cb188	bus_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0xa0ea9d87	set_task_ioprio
+EXPORT_SYMBOL_GPL vmlinux 0xa115164d	driver_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xa16b4ae2	tasklet_hrtimer_init
+EXPORT_SYMBOL_GPL vmlinux 0xa1924050	class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xa197bcac	klist_add_head
+EXPORT_SYMBOL_GPL vmlinux 0xa1d53059	ring_buffer_record_enable
+EXPORT_SYMBOL_GPL vmlinux 0xa237df8c	crypto_larval_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xa2873ad6	blkdev_aio_write
+EXPORT_SYMBOL_GPL vmlinux 0xa2aca346	ahash_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0xa2e67f08	acpi_bus_generate_proc_event4
+EXPORT_SYMBOL_GPL vmlinux 0xa2fa07c7	transport_remove_device
+EXPORT_SYMBOL_GPL vmlinux 0xa3067530	sched_setscheduler
+EXPORT_SYMBOL_GPL vmlinux 0xa3557205	register_kretprobes
+EXPORT_SYMBOL_GPL vmlinux 0xa3a5aa04	add_timer_on
+EXPORT_SYMBOL_GPL vmlinux 0xa3a5e1f0	pcibios_fixup_device_resources
+EXPORT_SYMBOL_GPL vmlinux 0xa3ba3310	device_initialize
+EXPORT_SYMBOL_GPL vmlinux 0xa3ef1c7e	ring_buffer_read_start
+EXPORT_SYMBOL_GPL vmlinux 0xa40a8590	input_event_to_user
+EXPORT_SYMBOL_GPL vmlinux 0xa42e7c3b	dm_disk
+EXPORT_SYMBOL_GPL vmlinux 0xa4ada164	crypto_init_spawn2
+EXPORT_SYMBOL_GPL vmlinux 0xa58a0f25	tcp_set_state
+EXPORT_SYMBOL_GPL vmlinux 0xa5bf5c3e	pm_qos_add_requirement
+EXPORT_SYMBOL_GPL vmlinux 0xa5c36cec	inotify_unmount_inodes
+EXPORT_SYMBOL_GPL vmlinux 0xa5efbf4c	async_synchronize_full
+EXPORT_SYMBOL_GPL vmlinux 0xa5fbc8fb	class_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xa6db0422	crypto_alloc_base
+EXPORT_SYMBOL_GPL vmlinux 0xa6f0a6f2	map_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0xa77fe18c	simple_attr_read
+EXPORT_SYMBOL_GPL vmlinux 0xa82629a5	unregister_pernet_gen_subsys
+EXPORT_SYMBOL_GPL vmlinux 0xa89e64b0	invalidate_inode_pages2_range
+EXPORT_SYMBOL_GPL vmlinux 0xa8faefa3	usb_unpoison_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0xa90c8dc5	dev_set_name
+EXPORT_SYMBOL_GPL vmlinux 0xa9231bca	cpu_bit_bitmap
+EXPORT_SYMBOL_GPL vmlinux 0xa940fe3a	disk_part_iter_init
+EXPORT_SYMBOL_GPL vmlinux 0xa9c530b8	unregister_oom_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xaa8b72b8	sk_setup_caps
+EXPORT_SYMBOL_GPL vmlinux 0xaa8c4696	cpu_clock
+EXPORT_SYMBOL_GPL vmlinux 0xab1552a6	inet_csk_route_req
+EXPORT_SYMBOL_GPL vmlinux 0xab703da6	anon_transport_class_register
+EXPORT_SYMBOL_GPL vmlinux 0xac31edb2	cpufreq_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0xace13dd8	vma_kernel_pagesize
+EXPORT_SYMBOL_GPL vmlinux 0xace5c0fc	usb_bus_list
+EXPORT_SYMBOL_GPL vmlinux 0xad2455a8	blk_update_request
+EXPORT_SYMBOL_GPL vmlinux 0xad2f9265	usb_get_dev
+EXPORT_SYMBOL_GPL vmlinux 0xad474116	kobject_rename
+EXPORT_SYMBOL_GPL vmlinux 0xad55a22e	usb_deregister
+EXPORT_SYMBOL_GPL vmlinux 0xad755c4b	sn_dma_get_required_mask
+EXPORT_SYMBOL_GPL vmlinux 0xadab6ee4	usb_get_intf
+EXPORT_SYMBOL_GPL vmlinux 0xadb42433	device_add
+EXPORT_SYMBOL_GPL vmlinux 0xadfa9101	__class_create
+EXPORT_SYMBOL_GPL vmlinux 0xae0c87ee	pm_qos_remove_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xae2f8a71	pci_add_dynid
+EXPORT_SYMBOL_GPL vmlinux 0xaed078bd	class_compat_create_link
+EXPORT_SYMBOL_GPL vmlinux 0xaed13f47	usb_lock_device_for_reset
+EXPORT_SYMBOL_GPL vmlinux 0xafe845e8	iommu_attach_device
+EXPORT_SYMBOL_GPL vmlinux 0xb01cca47	led_trigger_remove
+EXPORT_SYMBOL_GPL vmlinux 0xb061e63f	pci_slots_kset
+EXPORT_SYMBOL_GPL vmlinux 0xb06a50b4	regulator_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xb081c6cf	skcipher_geniv_init
+EXPORT_SYMBOL_GPL vmlinux 0xb0aa812e	fips_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xb0d636c2	usb_create_hcd
+EXPORT_SYMBOL_GPL vmlinux 0xb0f88f91	klist_iter_init_node
+EXPORT_SYMBOL_GPL vmlinux 0xb1acbcce	rcu_barrier_sched
+EXPORT_SYMBOL_GPL vmlinux 0xb1c9c70e	devres_find
+EXPORT_SYMBOL_GPL vmlinux 0xb1f190c2	relay_subbufs_consumed
+EXPORT_SYMBOL_GPL vmlinux 0xb1f58d03	uhci_check_and_reset_hc
+EXPORT_SYMBOL_GPL vmlinux 0xb2030832	disable_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0xb24f59a1	regulator_bulk_enable
+EXPORT_SYMBOL_GPL vmlinux 0xb263a3db	relay_buf_full
+EXPORT_SYMBOL_GPL vmlinux 0xb29e3106	ring_buffer_free
+EXPORT_SYMBOL_GPL vmlinux 0xb30f12be	rtnl_register
+EXPORT_SYMBOL_GPL vmlinux 0xb3334b70	alloc_page_buffers
+EXPORT_SYMBOL_GPL vmlinux 0xb356efd1	debugfs_create_x32
+EXPORT_SYMBOL_GPL vmlinux 0xb37213b9	crypto_shash_final
+EXPORT_SYMBOL_GPL vmlinux 0xb38d7b65	generic_fh_to_parent
+EXPORT_SYMBOL_GPL vmlinux 0xb3ba27d8	kill_pid_info_as_uid
+EXPORT_SYMBOL_GPL vmlinux 0xb40f0822	tcp_death_row
+EXPORT_SYMBOL_GPL vmlinux 0xb4145bce	blk_end_request_err
+EXPORT_SYMBOL_GPL vmlinux 0xb43bb876	usb_store_new_id
+EXPORT_SYMBOL_GPL vmlinux 0xb4645ad9	pm_schedule_suspend
+EXPORT_SYMBOL_GPL vmlinux 0xb53ae573	cpu_idle_wait
+EXPORT_SYMBOL_GPL vmlinux 0xb560914c	tty_buffer_request_room
+EXPORT_SYMBOL_GPL vmlinux 0xb58dcfa2	synchronize_sched_expedited
+EXPORT_SYMBOL_GPL vmlinux 0xb5faea26	spi_register_master
+EXPORT_SYMBOL_GPL vmlinux 0xb612444d	snmp_mib_init
+EXPORT_SYMBOL_GPL vmlinux 0xb65091b3	selinux_secmark_refcount_dec
+EXPORT_SYMBOL_GPL vmlinux 0xb6bd4aaa	user_describe
+EXPORT_SYMBOL_GPL vmlinux 0xb6d3fedc	drop_file_write_access
+EXPORT_SYMBOL_GPL vmlinux 0xb70ce519	kernel_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xb744fa43	xfrm_ealg_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0xb75b92f4	bsg_unregister_queue
+EXPORT_SYMBOL_GPL vmlinux 0xb79542bf	usb_unpoison_urb
+EXPORT_SYMBOL_GPL vmlinux 0xb7c18d58	pm_runtime_enable
+EXPORT_SYMBOL_GPL vmlinux 0xb7c38c9c	acpi_get_pci_dev
+EXPORT_SYMBOL_GPL vmlinux 0xb7d8c0c6	unregister_kretprobe
+EXPORT_SYMBOL_GPL vmlinux 0xb83ada96	rtc_class_open
+EXPORT_SYMBOL_GPL vmlinux 0xb878069c	da903x_clr_bits
+EXPORT_SYMBOL_GPL vmlinux 0xb8952a53	ring_buffer_free_read_page
+EXPORT_SYMBOL_GPL vmlinux 0xb8a057d4	usb_get_current_frame_number
+EXPORT_SYMBOL_GPL vmlinux 0xb903674c	scatterwalk_map_and_copy
+EXPORT_SYMBOL_GPL vmlinux 0xb9345171	bus_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xb939f35f	usb_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0xb9eb3aa9	add_uevent_var
+EXPORT_SYMBOL_GPL vmlinux 0xba333167	debugfs_create_file
+EXPORT_SYMBOL_GPL vmlinux 0xba9af32f	device_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xbae6a7ef	regulator_get_current_limit
+EXPORT_SYMBOL_GPL vmlinux 0xbb1c3c34	crypto_create_tfm
+EXPORT_SYMBOL_GPL vmlinux 0xbb32100e	usb_register_device_driver
+EXPORT_SYMBOL_GPL vmlinux 0xbb4aa232	da903x_writes
+EXPORT_SYMBOL_GPL vmlinux 0xbbc3d098	rt_mutex_lock_interruptible
+EXPORT_SYMBOL_GPL vmlinux 0xbbd772e6	bus_get_kset
+EXPORT_SYMBOL_GPL vmlinux 0xbc08b62a	screen_glyph
+EXPORT_SYMBOL_GPL vmlinux 0xbca9461f	pci_renumber_slot
+EXPORT_SYMBOL_GPL vmlinux 0xbcad92f6	eventfd_ctx_put
+EXPORT_SYMBOL_GPL vmlinux 0xbd506a46	unregister_hotplug_dock_device
+EXPORT_SYMBOL_GPL vmlinux 0xbd639604	spi_register_driver
+EXPORT_SYMBOL_GPL vmlinux 0xbd886209	ezx_pcap_write
+EXPORT_SYMBOL_GPL vmlinux 0xbe08977a	put_pid
+EXPORT_SYMBOL_GPL vmlinux 0xbe116723	do_posix_clock_nosettime
+EXPORT_SYMBOL_GPL vmlinux 0xbe681626	vfs_cancel_lock
+EXPORT_SYMBOL_GPL vmlinux 0xbe89af79	driver_for_each_device
+EXPORT_SYMBOL_GPL vmlinux 0xbeb51087	fb_deferred_io_cleanup
+EXPORT_SYMBOL_GPL vmlinux 0xbee52ccc	devres_remove_group
+EXPORT_SYMBOL_GPL vmlinux 0xbf4ebb1d	unregister_jprobe
+EXPORT_SYMBOL_GPL vmlinux 0xbf74eb20	probe_kernel_write
+EXPORT_SYMBOL_GPL vmlinux 0xbfa2d79f	regulator_set_voltage
+EXPORT_SYMBOL_GPL vmlinux 0xbfe7c468	sysdev_driver_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xbffde8ec	compat_alloc_user_space
+EXPORT_SYMBOL_GPL vmlinux 0xc0109c11	pci_stop_bus_device
+EXPORT_SYMBOL_GPL vmlinux 0xc05db2d6	ring_buffer_normalize_time_stamp
+EXPORT_SYMBOL_GPL vmlinux 0xc091e1df	raw_seq_next
+EXPORT_SYMBOL_GPL vmlinux 0xc0ad751f	pskb_put
+EXPORT_SYMBOL_GPL vmlinux 0xc0c5b9cb	seq_release_net
+EXPORT_SYMBOL_GPL vmlinux 0xc11937b5	sysdev_store_ulong
+EXPORT_SYMBOL_GPL vmlinux 0xc126e890	klist_del
+EXPORT_SYMBOL_GPL vmlinux 0xc17515d7	usb_hcds_loaded
+EXPORT_SYMBOL_GPL vmlinux 0xc1c923a3	relay_open
+EXPORT_SYMBOL_GPL vmlinux 0xc22a3091	vm_unmap_aliases
+EXPORT_SYMBOL_GPL vmlinux 0xc22b56d1	crypto_tfm_in_queue
+EXPORT_SYMBOL_GPL vmlinux 0xc29b42b1	bus_register
+EXPORT_SYMBOL_GPL vmlinux 0xc2cdc497	aead_geniv_alloc
+EXPORT_SYMBOL_GPL vmlinux 0xc3301f02	rcu_expedited_torture_stats
+EXPORT_SYMBOL_GPL vmlinux 0xc34cdffe	pci_find_ext_capability
+EXPORT_SYMBOL_GPL vmlinux 0xc34efe27	snmp_fold_field
+EXPORT_SYMBOL_GPL vmlinux 0xc355ba79	da903x_reads
+EXPORT_SYMBOL_GPL vmlinux 0xc35dd73a	inotify_init_watch
+EXPORT_SYMBOL_GPL vmlinux 0xc3a61d10	dequeue_signal
+EXPORT_SYMBOL_GPL vmlinux 0xc3a67949	usb_put_dev
+EXPORT_SYMBOL_GPL vmlinux 0xc41e6ee6	usb_autopm_get_interface_async
+EXPORT_SYMBOL_GPL vmlinux 0xc4217eb3	transport_class_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xc44ed63d	xfrm_audit_state_replay_overflow
+EXPORT_SYMBOL_GPL vmlinux 0xc477e786	irq_to_pcap
+EXPORT_SYMBOL_GPL vmlinux 0xc4798dcc	srcu_read_unlock
+EXPORT_SYMBOL_GPL vmlinux 0xc4acf2b5	inet_twsk_purge
+EXPORT_SYMBOL_GPL vmlinux 0xc5b0d348	usb_set_device_state
+EXPORT_SYMBOL_GPL vmlinux 0xc5b2c0ff	usb_unanchor_urb
+EXPORT_SYMBOL_GPL vmlinux 0xc6356cca	sysfs_remove_group
+EXPORT_SYMBOL_GPL vmlinux 0xc6671189	inet_csk_bind_conflict
+EXPORT_SYMBOL_GPL vmlinux 0xc67fb00b	crypto_register_alg
+EXPORT_SYMBOL_GPL vmlinux 0xc6cabd57	usb_init_urb
+EXPORT_SYMBOL_GPL vmlinux 0xc706a0c6	tty_prepare_flip_string
+EXPORT_SYMBOL_GPL vmlinux 0xc752f47c	rtnl_kill_links
+EXPORT_SYMBOL_GPL vmlinux 0xc765675b	usb_control_msg
+EXPORT_SYMBOL_GPL vmlinux 0xc7ca1902	skb_segment
+EXPORT_SYMBOL_GPL vmlinux 0xc7d7194d	driver_find
+EXPORT_SYMBOL_GPL vmlinux 0xc7de3f90	crypto_alg_mod_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xc80b95d4	crypto_dequeue_request
+EXPORT_SYMBOL_GPL vmlinux 0xc8490ca2	vfs_listxattr
+EXPORT_SYMBOL_GPL vmlinux 0xc84a34c4	get_inotify_watch
+EXPORT_SYMBOL_GPL vmlinux 0xc87c1f84	ktime_get
+EXPORT_SYMBOL_GPL vmlinux 0xc87e487a	sched_clock_idle_sleep_event
+EXPORT_SYMBOL_GPL vmlinux 0xc8e1c325	ring_buffer_commit_overrun_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xc9561772	fb_destroy_modelist
+EXPORT_SYMBOL_GPL vmlinux 0xc98e301b	xattr_getsecurity
+EXPORT_SYMBOL_GPL vmlinux 0xc99f1e8e	destroy_workqueue
+EXPORT_SYMBOL_GPL vmlinux 0xc9c800d8	xfrm_audit_state_notfound
+EXPORT_SYMBOL_GPL vmlinux 0xc9ec4e21	free_percpu
+EXPORT_SYMBOL_GPL vmlinux 0xca06ed4e	bus_find_device
+EXPORT_SYMBOL_GPL vmlinux 0xca4998d5	dm_dispatch_request
+EXPORT_SYMBOL_GPL vmlinux 0xcaf742c8	usb_poison_urb
+EXPORT_SYMBOL_GPL vmlinux 0xcaf85fee	single_open_net
+EXPORT_SYMBOL_GPL vmlinux 0xcb04f88f	blocking_notifier_chain_register
+EXPORT_SYMBOL_GPL vmlinux 0xcb08d0db	driver_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0xcb9ab1e3	mm_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xcc1f1c3d	inet_twdr_hangman
+EXPORT_SYMBOL_GPL vmlinux 0xcc2ffdf0	srcu_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xcc6ab305	is_dock_device
+EXPORT_SYMBOL_GPL vmlinux 0xcc799377	crypto_alg_sem
+EXPORT_SYMBOL_GPL vmlinux 0xccb23ee5	usb_unlink_anchored_urbs
+EXPORT_SYMBOL_GPL vmlinux 0xccddf3c0	crypto_alloc_ahash
+EXPORT_SYMBOL_GPL vmlinux 0xccf6e14e	da903x_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xcd04c146	kobject_create_and_add
+EXPORT_SYMBOL_GPL vmlinux 0xcd0d0739	relay_file_operations
+EXPORT_SYMBOL_GPL vmlinux 0xcd1ca2cb	iommu_domain_has_cap
+EXPORT_SYMBOL_GPL vmlinux 0xcd2eef1a	crypto_unregister_pcomp
+EXPORT_SYMBOL_GPL vmlinux 0xcd4b2da0	fuse_file_poll
+EXPORT_SYMBOL_GPL vmlinux 0xcd5fb04c	crypto_chain
+EXPORT_SYMBOL_GPL vmlinux 0xcdca3691	nr_irqs
+EXPORT_SYMBOL_GPL vmlinux 0xcdd4a188	console_drivers
+EXPORT_SYMBOL_GPL vmlinux 0xce81813d	spi_bus_type
+EXPORT_SYMBOL_GPL vmlinux 0xcec292a8	cpufreq_unregister_governor
+EXPORT_SYMBOL_GPL vmlinux 0xcfc68341	synchronize_rcu_bh
+EXPORT_SYMBOL_GPL vmlinux 0xcfcc83ad	register_vt_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xcfdeedf2	register_pernet_subsys
+EXPORT_SYMBOL_GPL vmlinux 0xd000c4c9	usb_hcd_link_urb_to_ep
+EXPORT_SYMBOL_GPL vmlinux 0xd03798a2	find_vpid
+EXPORT_SYMBOL_GPL vmlinux 0xd03c7700	secure_ipv4_port_ephemeral
+EXPORT_SYMBOL_GPL vmlinux 0xd0c05159	emergency_restart
+EXPORT_SYMBOL_GPL vmlinux 0xd16712f3	crypto_check_attr_type
+EXPORT_SYMBOL_GPL vmlinux 0xd19d1e6d	crypto_ahash_digest
+EXPORT_SYMBOL_GPL vmlinux 0xd1e81068	fuse_abort_conn
+EXPORT_SYMBOL_GPL vmlinux 0xd20529ff	register_jprobe
+EXPORT_SYMBOL_GPL vmlinux 0xd2052ed7	pm_request_idle
+EXPORT_SYMBOL_GPL vmlinux 0xd23c0eda	__root_device_register
+EXPORT_SYMBOL_GPL vmlinux 0xd24734b9	blkdev_ioctl
+EXPORT_SYMBOL_GPL vmlinux 0xd273b1b1	__round_jiffies_up_relative
+EXPORT_SYMBOL_GPL vmlinux 0xd27c3c34	crypto_unregister_shash
+EXPORT_SYMBOL_GPL vmlinux 0xd2a8caf0	work_on_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xd2eee696	ip_local_out
+EXPORT_SYMBOL_GPL vmlinux 0xd2f9e150	usb_altnum_to_altsetting
+EXPORT_SYMBOL_GPL vmlinux 0xd3080d77	sysdev_register
+EXPORT_SYMBOL_GPL vmlinux 0xd317e472	securityfs_create_dir
+EXPORT_SYMBOL_GPL vmlinux 0xd330c388	device_create
+EXPORT_SYMBOL_GPL vmlinux 0xd37ac6d8	__blk_put_request
+EXPORT_SYMBOL_GPL vmlinux 0xd386ccf3	platform_device_register_simple
+EXPORT_SYMBOL_GPL vmlinux 0xd3ab8460	devres_close_group
+EXPORT_SYMBOL_GPL vmlinux 0xd3b63e0b	transport_destroy_device
+EXPORT_SYMBOL_GPL vmlinux 0xd3eff337	regulator_get_drvdata
+EXPORT_SYMBOL_GPL vmlinux 0xd51e5cf9	rtc_read_alarm
+EXPORT_SYMBOL_GPL vmlinux 0xd532570a	regulator_unregister_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xd5b732de	sysdev_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xd5bfe80b	inet_csk_addr2sockaddr
+EXPORT_SYMBOL_GPL vmlinux 0xd6057119	usb_anchor_empty
+EXPORT_SYMBOL_GPL vmlinux 0xd618855a	file_ra_state_init
+EXPORT_SYMBOL_GPL vmlinux 0xd64a98fb	vfs_kern_mount
+EXPORT_SYMBOL_GPL vmlinux 0xd681b19b	attribute_container_register
+EXPORT_SYMBOL_GPL vmlinux 0xd6d2a672	unregister_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0xd6d9d0b5	raw_seq_stop
+EXPORT_SYMBOL_GPL vmlinux 0xd70544fd	regulator_disable
+EXPORT_SYMBOL_GPL vmlinux 0xd705b4c7	schedule_hrtimeout
+EXPORT_SYMBOL_GPL vmlinux 0xd737dac5	platform_device_add_resources
+EXPORT_SYMBOL_GPL vmlinux 0xd73ef534	sysdev_resume
+EXPORT_SYMBOL_GPL vmlinux 0xd743911a	ia64_sal_freq_base
+EXPORT_SYMBOL_GPL vmlinux 0xd74d0f10	tty_put_char
+EXPORT_SYMBOL_GPL vmlinux 0xd74d1ccd	devres_get
+EXPORT_SYMBOL_GPL vmlinux 0xd768e985	regulator_has_full_constraints
+EXPORT_SYMBOL_GPL vmlinux 0xd7d79132	put_online_cpus
+EXPORT_SYMBOL_GPL vmlinux 0xd9042fa8	scatterwalk_map
+EXPORT_SYMBOL_GPL vmlinux 0xda1be8e1	async_synchronize_cookie_domain
+EXPORT_SYMBOL_GPL vmlinux 0xda27650e	crypto_ahash_finup
+EXPORT_SYMBOL_GPL vmlinux 0xda3a096c	register_kprobe
+EXPORT_SYMBOL_GPL vmlinux 0xdaf4dfb3	fb_mode_option
+EXPORT_SYMBOL_GPL vmlinux 0xdb274e52	monotonic_to_bootbased
+EXPORT_SYMBOL_GPL vmlinux 0xdb67581c	shash_register_instance
+EXPORT_SYMBOL_GPL vmlinux 0xdc289107	bus_get_device_klist
+EXPORT_SYMBOL_GPL vmlinux 0xdc36bfc1	srcu_init_notifier_head
+EXPORT_SYMBOL_GPL vmlinux 0xdcad7fc8	ring_buffer_discard_commit
+EXPORT_SYMBOL_GPL vmlinux 0xdcb672a3	pcap_set_ts_bits
+EXPORT_SYMBOL_GPL vmlinux 0xdd154d63	ezx_pcap_read
+EXPORT_SYMBOL_GPL vmlinux 0xdd576b72	rtc_update_irq
+EXPORT_SYMBOL_GPL vmlinux 0xddefa895	pci_rescan_bus
+EXPORT_SYMBOL_GPL vmlinux 0xde1eeed5	blocking_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xde3516df	fs_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xde417b81	async_schedule_domain
+EXPORT_SYMBOL_GPL vmlinux 0xde51b48d	usb_submit_urb
+EXPORT_SYMBOL_GPL vmlinux 0xdee26cc9	swiotlb_sync_single_range_for_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xdf2aa7a1	crypto_shash_digest
+EXPORT_SYMBOL_GPL vmlinux 0xdf4e2707	relay_close
+EXPORT_SYMBOL_GPL vmlinux 0xdfc1603b	pci_set_pcie_reset_state
+EXPORT_SYMBOL_GPL vmlinux 0xe015a595	driver_add_kobj
+EXPORT_SYMBOL_GPL vmlinux 0xe0634339	unregister_pernet_subsys
+EXPORT_SYMBOL_GPL vmlinux 0xe0cca33e	xfrm_aead_get_byname
+EXPORT_SYMBOL_GPL vmlinux 0xe0d7e876	bus_register_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xe12934eb	disk_map_sector_rcu
+EXPORT_SYMBOL_GPL vmlinux 0xe135b15b	pm_runtime_barrier
+EXPORT_SYMBOL_GPL vmlinux 0xe14ecab4	ia64_dma_get_required_mask
+EXPORT_SYMBOL_GPL vmlinux 0xe16c5b28	ring_buffer_peek
+EXPORT_SYMBOL_GPL vmlinux 0xe18263e5	tcp_unregister_congestion_control
+EXPORT_SYMBOL_GPL vmlinux 0xe18896b3	register_jprobes
+EXPORT_SYMBOL_GPL vmlinux 0xe19559de	aead_geniv_exit
+EXPORT_SYMBOL_GPL vmlinux 0xe1dd80cc	put_inotify_watch
+EXPORT_SYMBOL_GPL vmlinux 0xe216ac1a	free_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0xe24784a0	device_bind_driver
+EXPORT_SYMBOL_GPL vmlinux 0xe25e69a8	device_rename
+EXPORT_SYMBOL_GPL vmlinux 0xe29f39c2	sysdev_class_remove_file
+EXPORT_SYMBOL_GPL vmlinux 0xe34d96d1	device_register
+EXPORT_SYMBOL_GPL vmlinux 0xe3639d4a	usb_hcd_giveback_urb
+EXPORT_SYMBOL_GPL vmlinux 0xe3e1f28b	unregister_timer_hook
+EXPORT_SYMBOL_GPL vmlinux 0xe40922d4	cpufreq_unregister_driver
+EXPORT_SYMBOL_GPL vmlinux 0xe4289823	synchronize_srcu
+EXPORT_SYMBOL_GPL vmlinux 0xe445e9cb	inet_csk_compat_getsockopt
+EXPORT_SYMBOL_GPL vmlinux 0xe45abd6a	spi_alloc_device
+EXPORT_SYMBOL_GPL vmlinux 0xe530071c	pm_qos_remove_requirement
+EXPORT_SYMBOL_GPL vmlinux 0xe543b72b	ring_buffer_iter_reset
+EXPORT_SYMBOL_GPL vmlinux 0xe566797b	tty_perform_flush
+EXPORT_SYMBOL_GPL vmlinux 0xe5738754	platform_driver_probe
+EXPORT_SYMBOL_GPL vmlinux 0xe58b7d57	spi_alloc_master
+EXPORT_SYMBOL_GPL vmlinux 0xe599372a	regulator_bulk_disable
+EXPORT_SYMBOL_GPL vmlinux 0xe5cd0e1b	fb_deferred_io_fsync
+EXPORT_SYMBOL_GPL vmlinux 0xe5ec1ced	led_trigger_show
+EXPORT_SYMBOL_GPL vmlinux 0xe5f9db2a	sysdev_driver_register
+EXPORT_SYMBOL_GPL vmlinux 0xe6300743	put_device
+EXPORT_SYMBOL_GPL vmlinux 0xe6488b47	cpufreq_notify_transition
+EXPORT_SYMBOL_GPL vmlinux 0xe651f76e	selinux_is_enabled
+EXPORT_SYMBOL_GPL vmlinux 0xe6c5f6e6	usb_hcd_pci_remove
+EXPORT_SYMBOL_GPL vmlinux 0xe6d08ab6	usb_hcd_poll_rh_status
+EXPORT_SYMBOL_GPL vmlinux 0xe7233c03	pci_bus_add_device
+EXPORT_SYMBOL_GPL vmlinux 0xe7db24ee	vfs_getxattr
+EXPORT_SYMBOL_GPL vmlinux 0xe809c5e1	usb_hcd_pci_shutdown
+EXPORT_SYMBOL_GPL vmlinux 0xe8549f70	task_active_pid_ns
+EXPORT_SYMBOL_GPL vmlinux 0xe8649461	skb_cow_data
+EXPORT_SYMBOL_GPL vmlinux 0xe893a156	regulator_bulk_get
+EXPORT_SYMBOL_GPL vmlinux 0xe8ef121f	device_schedule_callback_owner
+EXPORT_SYMBOL_GPL vmlinux 0xe901175f	__dev_addr_unsync
+EXPORT_SYMBOL_GPL vmlinux 0xe9214b3a	rtc_irq_set_freq
+EXPORT_SYMBOL_GPL vmlinux 0xe93e49c3	devres_free
+EXPORT_SYMBOL_GPL vmlinux 0xe9587909	usb_unregister_notify
+EXPORT_SYMBOL_GPL vmlinux 0xe966991d	crypto_hash_walk_done
+EXPORT_SYMBOL_GPL vmlinux 0xe9af0f06	input_ff_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xe9ba5f0c	inotify_init
+EXPORT_SYMBOL_GPL vmlinux 0xe9ee37af	init_dummy_netdev
+EXPORT_SYMBOL_GPL vmlinux 0xea065e01	task_handoff_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xea124bd1	gcd
+EXPORT_SYMBOL_GPL vmlinux 0xea70e5c8	pci_disable_pcie_error_reporting
+EXPORT_SYMBOL_GPL vmlinux 0xeaba521c	device_create_vargs
+EXPORT_SYMBOL_GPL vmlinux 0xeac4babf	crypto_alloc_instance2
+EXPORT_SYMBOL_GPL vmlinux 0xeaee6226	nf_unregister_queue_handlers
+EXPORT_SYMBOL_GPL vmlinux 0xeb55f687	spi_async
+EXPORT_SYMBOL_GPL vmlinux 0xeb5c910c	rtc_update_irq_enable
+EXPORT_SYMBOL_GPL vmlinux 0xeb5f8393	fuse_get_req
+EXPORT_SYMBOL_GPL vmlinux 0xeb7c405c	dm_set_device_limits
+EXPORT_SYMBOL_GPL vmlinux 0xeb89f326	anon_inode_getfd
+EXPORT_SYMBOL_GPL vmlinux 0xebe34617	lookup_create
+EXPORT_SYMBOL_GPL vmlinux 0xebead2d4	crypto_grab_skcipher
+EXPORT_SYMBOL_GPL vmlinux 0xebf10d81	locks_release_private
+EXPORT_SYMBOL_GPL vmlinux 0xec1a75a9	__dev_addr_sync
+EXPORT_SYMBOL_GPL vmlinux 0xec1b043e	regulator_suspend_prepare
+EXPORT_SYMBOL_GPL vmlinux 0xec25a1b8	ring_buffer_empty_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xec593321	usb_hcd_check_unlink_urb
+EXPORT_SYMBOL_GPL vmlinux 0xec812fd0	simple_attr_open
+EXPORT_SYMBOL_GPL vmlinux 0xec9d3744	usb_find_interface
+EXPORT_SYMBOL_GPL vmlinux 0xece57697	simple_attr_write
+EXPORT_SYMBOL_GPL vmlinux 0xece57a67	debugfs_create_symlink
+EXPORT_SYMBOL_GPL vmlinux 0xed6ffb48	register_pernet_gen_device
+EXPORT_SYMBOL_GPL vmlinux 0xed89fe68	i2c_unregister_device
+EXPORT_SYMBOL_GPL vmlinux 0xeda95aed	usb_bus_list_lock
+EXPORT_SYMBOL_GPL vmlinux 0xedc3266f	use_module
+EXPORT_SYMBOL_GPL vmlinux 0xee1e8698	alloc_vm_area
+EXPORT_SYMBOL_GPL vmlinux 0xee4b8170	ia64_ptr_entry
+EXPORT_SYMBOL_GPL vmlinux 0xee4ff681	inet_unhash
+EXPORT_SYMBOL_GPL vmlinux 0xeeda655d	pcap_to_irq
+EXPORT_SYMBOL_GPL vmlinux 0xef0c485c	sysfs_remove_bin_file
+EXPORT_SYMBOL_GPL vmlinux 0xef296163	usb_deregister_dev
+EXPORT_SYMBOL_GPL vmlinux 0xef4426a6	__mnt_is_readonly
+EXPORT_SYMBOL_GPL vmlinux 0xef6c3f70	round_jiffies_up_relative
+EXPORT_SYMBOL_GPL vmlinux 0xef7557bb	crypto_hash_walk_first
+EXPORT_SYMBOL_GPL vmlinux 0xefdd5a63	ktime_get_ts
+EXPORT_SYMBOL_GPL vmlinux 0xefeb5e5b	device_release_driver
+EXPORT_SYMBOL_GPL vmlinux 0xf0459468	__crypto_alloc_tfm
+EXPORT_SYMBOL_GPL vmlinux 0xf0b6f29e	__pm_runtime_get
+EXPORT_SYMBOL_GPL vmlinux 0xf0ea2416	ehci_cf_port_reset_rwsem
+EXPORT_SYMBOL_GPL vmlinux 0xf0ec6d7c	usb_hcd_platform_shutdown
+EXPORT_SYMBOL_GPL vmlinux 0xf111a337	usb_get_hcd
+EXPORT_SYMBOL_GPL vmlinux 0xf117fb9c	xfrm_audit_state_delete
+EXPORT_SYMBOL_GPL vmlinux 0xf178f316	debugfs_create_dir
+EXPORT_SYMBOL_GPL vmlinux 0xf17d0ebf	user_update
+EXPORT_SYMBOL_GPL vmlinux 0xf184d189	kernel_power_off
+EXPORT_SYMBOL_GPL vmlinux 0xf1cb78f8	fib_rules_cleanup_ops
+EXPORT_SYMBOL_GPL vmlinux 0xf1d92d19	handle_level_irq
+EXPORT_SYMBOL_GPL vmlinux 0xf222b5a0	page_cache_sync_readahead
+EXPORT_SYMBOL_GPL vmlinux 0xf2296d4e	ezx_pcap_set_bits
+EXPORT_SYMBOL_GPL vmlinux 0xf264aed3	flush_workqueue
+EXPORT_SYMBOL_GPL vmlinux 0xf2927deb	inet_hash
+EXPORT_SYMBOL_GPL vmlinux 0xf2936abe	usb_match_one_id
+EXPORT_SYMBOL_GPL vmlinux 0xf2a0995b	ring_buffer_unlock_commit
+EXPORT_SYMBOL_GPL vmlinux 0xf2acc7b0	crypto_register_template
+EXPORT_SYMBOL_GPL vmlinux 0xf2bfb371	class_interface_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xf30d25c3	usb_driver_claim_interface
+EXPORT_SYMBOL_GPL vmlinux 0xf34806ec	hrtimer_get_res
+EXPORT_SYMBOL_GPL vmlinux 0xf35ca90e	vfs_lock_file
+EXPORT_SYMBOL_GPL vmlinux 0xf38cf142	xfrm_output
+EXPORT_SYMBOL_GPL vmlinux 0xf3dd80b4	__ip_route_output_key
+EXPORT_SYMBOL_GPL vmlinux 0xf3f116d6	debugfs_create_size_t
+EXPORT_SYMBOL_GPL vmlinux 0xf499fdb2	rcu_barrier_bh
+EXPORT_SYMBOL_GPL vmlinux 0xf4a8385f	iommu_domain_free
+EXPORT_SYMBOL_GPL vmlinux 0xf4d6a81f	srcu_notifier_chain_unregister
+EXPORT_SYMBOL_GPL vmlinux 0xf50842b0	dm_noflush_suspending
+EXPORT_SYMBOL_GPL vmlinux 0xf51605d0	class_dev_iter_exit
+EXPORT_SYMBOL_GPL vmlinux 0xf54bd49b	lcm
+EXPORT_SYMBOL_GPL vmlinux 0xf56bc2e1	usb_hc_died
+EXPORT_SYMBOL_GPL vmlinux 0xf5799f7a	stop_machine_destroy
+EXPORT_SYMBOL_GPL vmlinux 0xf589b391	inet_twdr_twkill_work
+EXPORT_SYMBOL_GPL vmlinux 0xf5a691cd	invalidate_bh_lrus
+EXPORT_SYMBOL_GPL vmlinux 0xf5b32c0d	tty_init_termios
+EXPORT_SYMBOL_GPL vmlinux 0xf5bf178a	proc_net_remove
+EXPORT_SYMBOL_GPL vmlinux 0xf5d470fc	inotify_rm_wd
+EXPORT_SYMBOL_GPL vmlinux 0xf60eb070	ring_buffer_overrun_cpu
+EXPORT_SYMBOL_GPL vmlinux 0xf634bb01	transport_setup_device
+EXPORT_SYMBOL_GPL vmlinux 0xf66a57e3	led_trigger_set_default
+EXPORT_SYMBOL_GPL vmlinux 0xf67e11c5	debugfs_create_u8
+EXPORT_SYMBOL_GPL vmlinux 0xf69dfe6c	usb_put_intf
+EXPORT_SYMBOL_GPL vmlinux 0xf6bcbd73	hwrng_register
+EXPORT_SYMBOL_GPL vmlinux 0xf6c6de16	__fsnotify_parent
+EXPORT_SYMBOL_GPL vmlinux 0xf7520a65	ring_buffer_read_finish
+EXPORT_SYMBOL_GPL vmlinux 0xf765277e	shash_ahash_finup
+EXPORT_SYMBOL_GPL vmlinux 0xf77a9327	inverse_translate
+EXPORT_SYMBOL_GPL vmlinux 0xf7a8884b	usb_driver_release_interface
+EXPORT_SYMBOL_GPL vmlinux 0xf7f5dc81	class_interface_register
+EXPORT_SYMBOL_GPL vmlinux 0xf8133d8e	usb_buffer_free
+EXPORT_SYMBOL_GPL vmlinux 0xf84e781c	usb_hcd_resume_root_hub
+EXPORT_SYMBOL_GPL vmlinux 0xf8769707	sysfs_remove_file_from_group
+EXPORT_SYMBOL_GPL vmlinux 0xf890e937	usb_sg_wait
+EXPORT_SYMBOL_GPL vmlinux 0xf8db2b60	dm_requeue_unmapped_request
+EXPORT_SYMBOL_GPL vmlinux 0xf8e95527	driver_find_device
+EXPORT_SYMBOL_GPL vmlinux 0xf9765833	dmi_match
+EXPORT_SYMBOL_GPL vmlinux 0xf9a054b5	__round_jiffies
+EXPORT_SYMBOL_GPL vmlinux 0xf9a70235	dm_put
+EXPORT_SYMBOL_GPL vmlinux 0xf9a9fa3e	__blocking_notifier_call_chain
+EXPORT_SYMBOL_GPL vmlinux 0xfa1f4662	scatterwalk_start
+EXPORT_SYMBOL_GPL vmlinux 0xfa24ec2f	inotify_dentry_parent_queue_event
+EXPORT_SYMBOL_GPL vmlinux 0xfa735b78	mca_recover_range
+EXPORT_SYMBOL_GPL vmlinux 0xfa97faae	crypto_ahash_type
+EXPORT_SYMBOL_GPL vmlinux 0xfac42c46	kobject_uevent
+EXPORT_SYMBOL_GPL vmlinux 0xfb077c51	nf_unregister_afinfo
+EXPORT_SYMBOL_GPL vmlinux 0xfb1f472c	__class_register
+EXPORT_SYMBOL_GPL vmlinux 0xfb24bfc7	pci_intx
+EXPORT_SYMBOL_GPL vmlinux 0xfb863c25	sysfs_update_group
+EXPORT_SYMBOL_GPL vmlinux 0xfbf9be5d	register_oom_notifier
+EXPORT_SYMBOL_GPL vmlinux 0xfc121436	blkcipher_walk_done
+EXPORT_SYMBOL_GPL vmlinux 0xfc2d214d	inet_csk_reqsk_queue_hash_add
+EXPORT_SYMBOL_GPL vmlinux 0xfc315f9a	vfs_setlease
+EXPORT_SYMBOL_GPL vmlinux 0xfc3f66b2	rtnl_link_register
+EXPORT_SYMBOL_GPL vmlinux 0xfc8930f1	crypto_mod_get
+EXPORT_SYMBOL_GPL vmlinux 0xfd9481dc	fsnotify
+EXPORT_SYMBOL_GPL vmlinux 0xfdbc0d88	devres_release_group
+EXPORT_SYMBOL_GPL vmlinux 0xfdc97c16	debugfs_create_x16
+EXPORT_SYMBOL_GPL vmlinux 0xfde0b92c	crypto_larval_error
+EXPORT_SYMBOL_GPL vmlinux 0xfde4b0d0	devres_remove
+EXPORT_SYMBOL_GPL vmlinux 0xfdff0460	inet_csk_listen_start
+EXPORT_SYMBOL_GPL vmlinux 0xfe94da10	fuse_sync_release
+EXPORT_SYMBOL_GPL vmlinux 0xfed11ed1	usb_mon_deregister
+EXPORT_SYMBOL_GPL vmlinux 0xfee3c031	dm_get_rq_mapinfo
+EXPORT_SYMBOL_GPL vmlinux 0xfefa2adb	input_ff_effect_from_user
+EXPORT_SYMBOL_GPL vmlinux 0xff1a7e70	rt_mutex_lock
+EXPORT_SYMBOL_GPL vmlinux 0xff48f6bd	skcipher_geniv_exit
+EXPORT_SYMBOL_GPL vmlinux 0xff9b3429	simple_attr_release
+EXPORT_SYMBOL_GPL vmlinux 0xffabcb9f	crypto_larval_lookup
+EXPORT_SYMBOL_GPL vmlinux 0xffd64be0	debugfs_remove_recursive
+EXPORT_UNUSED_SYMBOL vmlinux 0x00000000	simple_prepare_write
--- linux-mvl-dove-2.6.32.orig/cesa/openswan/mv_openswan_2_6_24.patch
+++ linux-mvl-dove-2.6.32/cesa/openswan/mv_openswan_2_6_24.patch
@@ -0,0 +1,255 @@
+--- openswan-2.6.24/linux/include/openswan/ipsec_param.h	2010-01-10 03:34:38.000000000 +0200
++++ openswan-2.6.24/linux/include/openswan/ipsec_param.h	2010-02-10 12:10:27.000000000 +0200
+@@ -179,6 +179,7 @@
+ /*
+  * debugging routines.
+  */
++#ifdef CONFIG_KLIPS_DEBUG
+         #define KLIPS_ERROR(flag, format, args...) if(printk_ratelimit() || flag) printk(KERN_ERR "KLIPS " format, ## args)
+ 	#define KLIPS_PRINT(flag, format, args...) \
+ 		((flag) ? printk(KERN_INFO format , ## args) : 0)
+@@ -188,7 +189,8 @@
+ 		((flag) ? ipsec_print_ip(ip) : 0)
+ 	#define KLIPS_SATOT(flag, sa, format, dst, dstlen) \
+ 		((flag) ? satot(sa, format, dst, dstlen) : 0)
+-#if 0 /* not CONFIG_KLIPS_DEBUG */
++#else 
++//#if 0 /* not CONFIG_KLIPS_DEBUG */
+         #define KLIPS_ERROR(flag, format, args...) if(printk_ratelimit()) printk(KERN_ERR "KLIPS " format, ## args)
+ 	#define KLIPS_PRINT(flag, format, args...) do ; while(0)
+ 	#define KLIPS_PRINTMORE(flag, format, args...) do ; while(0)
+--- openswan-2.6.24/linux/net/ipsec/defconfig	2010-01-10 03:34:38.000000000 +0200
++++ openswan-2.6.24/linux/net/ipsec/defconfig	2010-02-10 12:02:32.000000000 +0200
+@@ -59,5 +59,5 @@
+ CONFIG_KLIPS_DEBUG=y
+ 
+ # OCF HW offloading, requires kernel patch
+-# CONFIG_KLIPS_OCF is not set
++CONFIG_KLIPS_OCF=y
+ 
+--- openswan-2.6.24/linux/net/ipsec/ipsec_tunnel.c	2010-01-10 03:34:38.000000000 +0200
++++ openswan-2.6.24/linux/net/ipsec/ipsec_tunnel.c	2010-02-10 12:18:15.000000000 +0200
+@@ -104,9 +104,9 @@
+ DEBUG_NO_STATIC int ipsec_tunnel_detach(struct net_device *dev);
+ extern const struct net_device_ops klips_device_ops;
+ 
+-#ifdef CONFIG_KLIPS_DEBUG
++//#ifdef CONFIG_KLIPS_DEBUG
+ int debug_tunnel = 0;
+-#endif /* CONFIG_KLIPS_DEBUG */
++//#endif /* CONFIG_KLIPS_DEBUG */
+ 
+ DEBUG_NO_STATIC int
+ ipsec_tunnel_open(struct net_device *dev)
+--- openswan-2.6.24/packaging/linus/config-all.h	2010-01-10 03:34:38.000000000 +0200
++++ openswan-2.6.24/packaging/linus/config-all.h	2010-02-10 11:06:22.000000000 +0200
+@@ -22,9 +22,11 @@
+ #define CONFIG_KLIPS_AH 1
+ #endif
+ 
++#if 0
+ #ifndef CONFIG_KLIPS_DEBUG 
+ #define CONFIG_KLIPS_DEBUG 1
+ #endif
++#endif
+ 
+ #ifndef CONFIG_KLIPS_ESP
+ #define CONFIG_KLIPS_ESP 1
+@@ -78,6 +80,7 @@
+ #define CONFIG_KLIPS_OCF 0
+ #endif
+ #endif
++#define CONFIG_KLIPS_OCF 1
+ 
+ #ifndef CONFIG_KLIPS_ALG_AES_MAC
+ #define CONFIG_KLIPS_ALG_AES_MAC 1
+--- openswan-2.6.24/packaging/makefiles/module.defs	2010-01-10 03:34:38.000000000 +0200
++++ openswan-2.6.24/packaging/makefiles/module.defs	2010-02-10 11:54:13.000000000 +0200
+@@ -37,7 +37,7 @@
+ CONFIG_KLIPS_IPCOMP=y
+ 
+ # To enable userspace-switchable KLIPS debugging, say 'y'.
+-CONFIG_KLIPS_DEBUG=y
++CONFIG_KLIPS_DEBUG=n
+ 
+ #
+ #
+--- openswan-2.6.24/linux/net/ipsec/ipsec_mast.c.orig	2010-02-10 12:23:35.000000000 +0200
++++ openswan-2.6.24/linux/net/ipsec/ipsec_mast.c	2010-02-10 12:23:47.000000000 +0200
+@@ -700,6 +700,9 @@
+ 	dev->addr_len		= 0;
+ 	dev->type		= ARPHRD_NONE;
+ 	dev->tx_queue_len	= 10;		
++#ifdef IFF_XMIT_DST_RELEASE
++	dev->priv_flags	       &= ~IFF_XMIT_DST_RELEASE;
++#endif
+ 	memset((caddr_t)(dev->broadcast),0xFF, ETH_ALEN);	/* what if this is not attached to ethernet? */
+ 
+ 	/* New-style flags. */
+--- openswan-2.6.24/linux/net/ipsec/ipsec_tunnel.c.orig	2010-02-10 12:18:15.000000000 +0200
++++ openswan-2.6.24/linux/net/ipsec/ipsec_tunnel.c	2010-02-10 12:23:47.000000000 +0200
+@@ -1840,6 +1840,9 @@
+ 	dev->addr_len		= 0;
+ 	dev->type		= ARPHRD_VOID; /* ARPHRD_TUNNEL; */ /* ARPHRD_ETHER; */
+ 	dev->tx_queue_len	= 10;		/* Small queue */
++#ifdef IFF_XMIT_DST_RELEASE
++	dev->priv_flags	       &= ~IFF_XMIT_DST_RELEASE;
++#endif
+ 	memset((caddr_t)(dev->broadcast),0xFF, ETH_ALEN);	/* what if this is not attached to ethernet? */
+ 
+ 	/* New-style flags. */
+--- openswan-2.6.24/linux/net/ipsec/ipsec_tunnel.c	2010-02-10 10:33:28.000000000 +0200
++++ openswan-2.6.24/linux/net/ipsec/ipsec_tunnel.c	2010-02-10 10:33:53.000000000 +0200
+@@ -1791,7 +1791,9 @@
+ 		    (unsigned long) sizeof(struct ipsecpriv),
+ 		    dev->name ? dev->name : "NULL");
+ 
++#ifdef alloc_netdev
+ 	dev->destructor         = free_netdev;
++#endif
+ 
+ #ifndef HAVE_NETDEV_PRIV
+ 	{
+@@ -2004,13 +2006,11 @@
+ 		    atomic_read(&dev_ipsec->refcnt));
+ 	unregister_netdev(dev_ipsec);
+ 	KLIPS_PRINT(debug_tunnel, "Unregisted %s\n", dev_ipsec->name);
+-#ifdef alloc_netdev
+-	free_netdev(dev_ipsec);
+-#else
+ #ifndef NETDEV_23
+ 	kfree(dev_ipsec->name);
+ 	dev_ipsec->name=NULL;
+ #endif /* !NETDEV_23 */
++#ifndef alloc_netdev
+ 	kfree(dev_ipsec->priv);
+ 	dev_ipsec->priv=NULL;
+ #endif /* alloc_netdev */
+@@ -2057,13 +2057,11 @@
+ 			    atomic_read(&dev_ipsec->refcnt));
+ 		unregister_netdev(dev_ipsec);
+ 		KLIPS_PRINT(debug_tunnel, "Unregisted %s\n", dev_ipsec->name);
+-#ifdef alloc_netdev
+-		free_netdev(dev_ipsec);
+-#else
+ #ifndef NETDEV_23
+ 		kfree(dev_ipsec->name);
+ 		dev_ipsec->name=NULL;
+ #endif /* !NETDEV_23 */
++#ifndef alloc_netdev
+ 		kfree(dev_ipsec->priv);
+ 		dev_ipsec->priv=NULL;
+ #endif /* alloc_netdev */
+From: David McCullough <david_mccullough@securecomputing.com>
+Date: Wed, 3 Feb 2010 05:26:26 +0000 (+1000)
+Subject: Fix KLIPS_IP_SELECT_IDENT usage on newer kernels
+X-Git-Url: http://git.openswan.org/cgi-bin/gitweb.cgi?p=openswan.public%2F.git;a=commitdiff_plain;h=e5b4fa6375f93ae9d9a90f2f45e7fdc54193eeac
+
+Fix KLIPS_IP_SELECT_IDENT usage on newer kernels
+
+Make sure we have the skb->dst in place (ip_route'd) before we call
+ip_select_ident (KLIPS_IP_SELECT_IDENT) otherwise we get kernel trace
+to say things are less than ideal and performance is killed.
+
+Also cleanup KLIPS_IP_SELECT_IDENT definitions.  It's also in ipsec_param2.h
+but it really should be moved ipsec_kversion IMHO.
+---
+
+diff --git a/linux/net/ipsec/ipsec_ipip.c b/linux/net/ipsec/ipsec_ipip.c
+index 70f8015..15210ed 100644
+--- a/linux/net/ipsec/ipsec_ipip.c
++++ b/linux/net/ipsec/ipsec_ipip.c
+@@ -92,8 +92,6 @@ ipsec_xmit_ipip_setup(struct ipsec_xmit_state *ixs)
+   ixs->iph->protocol = IPPROTO_IPIP;
+   ixs->iph->ihl      = sizeof(struct iphdr) >> 2;
+   
+-  KLIPS_IP_SELECT_IDENT(ixs->iph, ixs->skb);
+-  
+   ixs->newdst = (__u32)ixs->iph->daddr;
+   ixs->newsrc = (__u32)ixs->iph->saddr;
+   
+diff --git a/linux/net/ipsec/ipsec_xmit.c b/linux/net/ipsec/ipsec_xmit.c
+index 1c10b10..f4a0b51 100644
+--- a/linux/net/ipsec/ipsec_xmit.c
++++ b/linux/net/ipsec/ipsec_xmit.c
+@@ -95,37 +95,6 @@
+ #include "openswan/ipsec_alg.h"
+ #include "ipsec_ocf.h"
+ 
+-
+-/* 
+- * Stupid kernel API differences in APIs. Not only do some
+- * kernels not have ip_select_ident, but some have differing APIs,
+- * and SuSE has one with one parameter, but no way of checking to
+- * see what is really what.
+- */
+-
+-#ifdef SUSE_LINUX_2_4_19_IS_STUPID
+-#define KLIPS_IP_SELECT_IDENT(iph, skb) ip_select_ident(iph)
+-#else
+-
+-/* simplest case, nothing */
+-#if !defined(IP_SELECT_IDENT)
+-#define KLIPS_IP_SELECT_IDENT(iph, skb)  do { iph->id = htons(ip_id_count++); } while(0)
+-#endif
+-
+-/* kernels > 2.3.37-ish */
+-#if defined(IP_SELECT_IDENT) && !defined(IP_SELECT_IDENT_NEW)
+-#define KLIPS_IP_SELECT_IDENT(iph, skb) ip_select_ident(iph, skb->dst)
+-#endif
+-
+-/* kernels > 2.4.2 */
+-#if defined(IP_SELECT_IDENT) && defined(IP_SELECT_IDENT_NEW)
+-#define KLIPS_IP_SELECT_IDENT(iph, skb) ip_select_ident(iph, skb_dst(skb), NULL)
+-#endif
+-
+-#endif /* SUSE_LINUX_2_4_19_IS_STUPID */
+-
+-
+-
+ #if defined(CONFIG_KLIPS_AH)
+ #if defined(CONFIG_KLIPS_AUTH_HMAC_MD5) || defined(CONFIG_KLIPS_AUTH_HMAC_SHA1)
+ static __u32 zeroes[64];
+@@ -1004,8 +973,6 @@ ipsec_xmit_ipip(struct ipsec_xmit_state *ixs)
+ 	ixs->iph->protocol = IPPROTO_IPIP;
+ 	ixs->iph->ihl      = sizeof(struct iphdr) >> 2;
+ 
+-	KLIPS_IP_SELECT_IDENT(ixs->iph, ixs->skb);
+-
+ 	ixs->newdst = (__u32)ixs->iph->daddr;
+ 	ixs->newsrc = (__u32)ixs->iph->saddr;
+ 	
+@@ -1079,8 +1046,16 @@ ipsec_xmit_cont(struct ipsec_xmit_state *ixs)
+ #else /* NET_21 */
+ 	ixs->skb->ip_hdr = ixs->skb->h.iph = (struct iphdr *) ixs->skb->data;
+ #endif /* NET_21 */
+-	ixs->iph->check = 0;
+-	ixs->iph->check = ip_fast_csum((unsigned char *)ixs->iph, ixs->iph->ihl);
++
++	/*
++	 * if we have more work to do,  it's likely this checksum is getting
++	 * encapsulated,  and we must do it.  Otherwise,  we do a final one
++	 * just before the ip_send/nf hook in ipsec_xmit_send.
++	 */
++	if (ixs->ipsp->ips_next) {
++		ixs->iph->check = 0;
++		ixs->iph->check = ip_fast_csum((unsigned char *)ixs->iph, ixs->iph->ihl);
++	}
+ 			
+ 	KLIPS_PRINT(debug_tunnel & DB_TN_XMIT,
+ 		    "klips_debug:ipsec_xmit_encap_once: "
+@@ -2065,6 +2040,14 @@ ipsec_xmit_send(struct ipsec_xmit_state*ixs, struct flowi *fl)
+ 		ipsec_nf_reset(ixs->skb);
+ 	}
+ 
++	/* newer kernels require skb->dst to be set in KLIPS_IP_SELECT_IDENT */
++	KLIPS_IP_SELECT_IDENT(ip_hdr(ixs->skb), ixs->skb);
++
++	/* fix up the checksum after changes to the header */
++	ip_hdr(ixs->skb)->check = 0;
++	ip_hdr(ixs->skb)->check =
++		ip_fast_csum((unsigned char *)ip_hdr(ixs->skb), ip_hdr(ixs->skb)->ihl);
++
+ 	KLIPS_PRINT(debug_tunnel & DB_TN_XMIT,
+ 		    "klips_debug:ipsec_xmit_send: "
+ 		    "...done, calling ip_send() on device:%s\n",
--- linux-mvl-dove-2.6.32.orig/cesa/openswan/mv_openswan_2.6.21.patch
+++ linux-mvl-dove-2.6.32/cesa/openswan/mv_openswan_2.6.21.patch
@@ -0,0 +1,387 @@
+diff -Nur openswan-2.6.21/linux/net/ipsec/ipsec_mast.c openswan-2.6.21.patched/linux/net/ipsec/ipsec_mast.c
+--- openswan-2.6.21/linux/net/ipsec/ipsec_mast.c	2009-03-30 16:11:28.000000000 +0300
++++ openswan-2.6.21.patched/linux/net/ipsec/ipsec_mast.c	2009-07-12 16:41:04.000000000 +0300
+@@ -87,7 +87,7 @@
+ DEBUG_NO_STATIC int
+ ipsec_mast_open(struct net_device *dev)
+ {
+-        struct mastpriv *prv = dev->priv; 
++        struct mastpriv *prv = netdev_priv(dev); 
+ 
+ 	prv = prv;
+ 
+@@ -334,7 +334,7 @@
+ DEBUG_NO_STATIC struct net_device_stats *
+ ipsec_mast_get_stats(struct net_device *dev)
+ {
+-	return &(((struct mastpriv *)(dev->priv))->mystats);
++	return &(((struct mastpriv *)netdev_priv(dev))->mystats);
+ }
+ 
+ #if 0
+@@ -496,7 +496,7 @@
+ ipsec_mast_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
+ {
+ 	struct ipsecmastconf *cf = (struct ipsecmastconf *)&ifr->ifr_data;
+-	struct ipsecpriv *prv = dev->priv;
++	struct ipsecpriv *prv = netdev_priv(dev);
+ 
+ 	cf = cf;
+ 	prv=prv;
+@@ -529,7 +529,7 @@
+ ipsec_mast_device_event(struct notifier_block *unused, unsigned long event, void *ptr)
+ {
+ 	struct net_device *dev = ptr;
+-	struct mastpriv *priv = dev->priv;
++	struct mastpriv *priv = netdev_priv(dev);
+ 
+ 	priv = priv;
+ 
+@@ -664,10 +664,10 @@
+ 	dev->hard_start_xmit	= ipsec_mast_start_xmit;
+ 	dev->get_stats		= ipsec_mast_get_stats;
+ 
+-	dev->priv = kmalloc(sizeof(struct mastpriv), GFP_KERNEL);
+-	if (dev->priv == NULL)
+-		return -ENOMEM;
+-	memset((caddr_t)(dev->priv), 0, sizeof(struct mastpriv));
++	//dev->priv = kmalloc(sizeof(struct mastpriv), GFP_KERNEL);
++	//if (dev->priv == NULL)
++	//	return -ENOMEM;
++	//memset((caddr_t)(dev->priv), 0, sizeof(struct mastpriv));
+ 
+ 	for(i = 0; i < sizeof(zeroes); i++) {
+ 		((__u8*)(zeroes))[i] = 0;
+@@ -729,7 +729,7 @@
+ 	snprintf(name, IFNAMSIZ, MAST_DEV_FORMAT, vifnum);
+ 	
+ #ifdef alloc_netdev
+-	im = alloc_netdev(0, name, ipsec_mast_netdev_setup);
++	im = alloc_netdev(sizeof(struct mastpriv), name, ipsec_mast_netdev_setup);
+ #else
+ 	im = (struct net_device *)kmalloc(sizeof(struct net_device),GFP_KERNEL);
+ #endif
+@@ -785,8 +785,8 @@
+ 	kfree(dev_ipsec->name);
+ 	dev_ipsec->name=NULL;
+ #endif /* !NETDEV_23 */
+-	kfree(dev_ipsec->priv);
+-	dev_ipsec->priv=NULL;
++	//kfree(dev_ipsec->priv);
++	//dev_ipsec->priv=NULL;
+ 
+ 	return 0;
+ }
+@@ -853,8 +853,8 @@
+ 			dev_mast = mastdevices[i];
+ 			ipsec_dev_put(dev_mast);
+ 			unregister_netdev(dev_mast);
+-			kfree(dev_mast->priv);
+-			dev_mast->priv=NULL;
++			//kfree(dev_mast->priv);
++			//dev_mast->priv=NULL;
+ 			dev_put(mastdevices[i]);
+ 			mastdevices[i]=NULL;
+ 		}
+diff -Nur openswan-2.6.21/linux/net/ipsec/ipsec_ocf.c openswan-2.6.21.patched/linux/net/ipsec/ipsec_ocf.c
+--- openswan-2.6.21/linux/net/ipsec/ipsec_ocf.c	2009-03-30 16:11:28.000000000 +0300
++++ openswan-2.6.21.patched/linux/net/ipsec/ipsec_ocf.c	2009-07-12 16:41:04.000000000 +0300
+@@ -367,7 +367,7 @@
+ 
+ 		/* OCF needs cri_mlen initialized in order to properly migrate the
+ 		 * session to another driver */
+-		crda->crd_mlen = 12;
++		//crda->crd_mlen = 12;
+ 
+ 		/* Copy the authenticator to check aganinst later */
+ 		memcpy(irs->hash, irs->authenticator, 12);
+@@ -599,7 +599,7 @@
+ 
+ 		/* OCF needs cri_mlen initialized in order to properly migrate
+ 		 * the session to another driver */
+-		crda->crd_mlen = 12;
++		//crda->crd_mlen = 12;
+ 
+ 		crda->crd_key    = ipsp->ips_key_a;
+ 		crda->crd_klen   = ipsp->ips_key_bits_a;
+diff -Nur openswan-2.6.21/linux/net/ipsec/ipsec_proc.c openswan-2.6.21.patched/linux/net/ipsec/ipsec_proc.c
+--- openswan-2.6.21/linux/net/ipsec/ipsec_proc.c	2009-03-30 16:11:28.000000000 +0300
++++ openswan-2.6.21.patched/linux/net/ipsec/ipsec_proc.c	2009-07-13 08:55:25.000000000 +0300
+@@ -550,7 +550,7 @@
+ 		ipsec_snprintf(name, (ssize_t) sizeof(name), IPSEC_DEV_FORMAT, i);
+ 		dev = __ipsec_dev_get(name);
+ 		if(dev) {
+-			priv = (struct ipsecpriv *)(dev->priv);
++			priv = (struct ipsecpriv *)netdev_priv(dev);
+ 			len += ipsec_snprintf(buffer+len, length-len, "%s",
+ 				       dev->name);
+ 			if(priv) {
+@@ -947,9 +947,11 @@
+ 				item->read_proc  = it->readthing;
+ 				item->write_proc = it->writething;
+ 				item->data       = it->data;
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30)
+ #ifdef MODULE
+ 				item->owner = THIS_MODULE;
+ #endif
++#endif
+ 			} else {
+ 				error |= 1;
+ 			}
+diff -Nur openswan-2.6.21/linux/net/ipsec/ipsec_rcv.c openswan-2.6.21.patched/linux/net/ipsec/ipsec_rcv.c
+--- openswan-2.6.21/linux/net/ipsec/ipsec_rcv.c	2009-03-30 16:11:28.000000000 +0300
++++ openswan-2.6.21.patched/linux/net/ipsec/ipsec_rcv.c	2009-07-12 16:41:04.000000000 +0300
+@@ -843,7 +843,7 @@
+ 
+ 		for(i = 0; i <= ipsecdevices_max; i++) {
+ 			if(ipsecdevices[i] == NULL) continue;
+-			prvdev = ipsecdevices[i]->priv;
++			prvdev = netdev_priv(ipsecdevices[i]);
+ 			
+ 			if(prvdev == NULL) continue;
+ 
+@@ -1992,7 +1992,7 @@
+ 		   {
+ 		    snprintf(name, IFNAMSIZ, IPSEC_DEV_FORMAT, i);
+ 		    ipsecdev = __ipsec_dev_get(name);
+-		    prv = ipsecdev ? (struct ipsecpriv *)(ipsecdev->priv) : NULL;
++		    prv = ipsecdev ? (struct ipsecpriv *)netdev_priv(ipsecdev) : NULL;
+ 		    prvdev = prv ? (struct net_device *)(prv->dev) : NULL;
+ 		    if(prvdev && !strncmp(prvdev->name, skb->dev->name, IFNAMSIZ))
+ 			{
+diff -Nur openswan-2.6.21/linux/net/ipsec/ipsec_tunnel.c openswan-2.6.21.patched/linux/net/ipsec/ipsec_tunnel.c
+--- openswan-2.6.21/linux/net/ipsec/ipsec_tunnel.c	2009-03-30 16:11:28.000000000 +0300
++++ openswan-2.6.21.patched/linux/net/ipsec/ipsec_tunnel.c	2009-07-12 16:41:04.000000000 +0300
+@@ -104,7 +104,7 @@
+ DEBUG_NO_STATIC int
+ ipsec_tunnel_open(struct net_device *dev)
+ {
+-	struct ipsecpriv *prv = dev->priv;
++	struct ipsecpriv *prv = netdev_priv(dev);
+ 	
+ 	/*
+ 	 * Can't open until attached.
+@@ -610,7 +610,7 @@
+ 	if (! ixs) {
+ 		struct ipsecpriv *prv;
+ 		struct net_device_stats *stats;
+-		prv = dev->priv;
++		prv = netdev_priv(dev);
+ 		stats = (struct net_device_stats *) &(prv->mystats);
+ 		stats->tx_dropped++;
+ 		goto alloc_error;
+@@ -661,7 +661,7 @@
+ DEBUG_NO_STATIC struct net_device_stats *
+ ipsec_tunnel_get_stats(struct net_device *dev)
+ {
+-	return &(((struct ipsecpriv *)(dev->priv))->mystats);
++	return &(((struct ipsecpriv *)netdev_priv(dev))->mystats);
+ }
+ 
+ /*
+@@ -673,7 +673,7 @@
+ ipsec_tunnel_hard_header(struct sk_buff *skb, struct net_device *dev,
+ 	unsigned short type, const void *daddr, const void *saddr, unsigned len)
+ {
+-	struct ipsecpriv *prv = dev->priv;
++	struct ipsecpriv *prv = netdev_priv(dev);
+ 	struct net_device *tmp;
+ 	int ret;
+ 	struct net_device_stats *stats;	/* This device's statistics */
+@@ -805,7 +805,7 @@
+ 			unsigned long raddr, struct sk_buff *skb)
+ #endif /* NET_21 */
+ {
+-	struct ipsecpriv *prv = skb->dev->priv;
++	struct ipsecpriv *prv = netdev_priv(skb->dev);
+ 	struct net_device *tmp;
+ 	int ret;
+ 	struct net_device_stats *stats;	/* This device's statistics */
+@@ -895,7 +895,7 @@
+ DEBUG_NO_STATIC int
+ ipsec_tunnel_set_mac_address(struct net_device *dev, void *addr)
+ {
+-	struct ipsecpriv *prv = dev->priv;
++	struct ipsecpriv *prv = netdev_priv(dev);
+ 	
+ 	struct net_device_stats *stats;	/* This device's statistics */
+ 	
+@@ -998,7 +998,7 @@
+ ipsec_tunnel_cache_update(struct hh_cache *hh, const struct net_device *dev,
+ 				const unsigned char *  haddr)
+ {
+-	struct ipsecpriv *prv = dev->priv;
++	struct ipsecpriv *prv = netdev_priv(dev);
+ 	
+ 	struct net_device_stats *stats;	/* This device's statistics */
+ 	
+@@ -1099,7 +1099,7 @@
+ ipsec_tunnel_attach(struct net_device *dev, struct net_device *physdev)
+ {
+         int i;
+-	struct ipsecpriv *prv = dev->priv;
++	struct ipsecpriv *prv = netdev_priv(dev);
+ 
+ 	if(dev == NULL) {
+ 		KLIPS_PRINT(debug_tunnel & DB_TN_REVEC,
+@@ -1198,7 +1198,7 @@
+ ipsec_tunnel_detach(struct net_device *dev)
+ {
+         int i;
+-	struct ipsecpriv *prv = dev->priv;
++	struct ipsecpriv *prv = netdev_priv(dev);
+ 
+ 	if(dev == NULL) {
+ 		KLIPS_PRINT(debug_tunnel & DB_TN_REVEC,
+@@ -1287,7 +1287,7 @@
+ 	for(i = 0; i < IPSEC_NUM_IF; i++) {
+    	        ipsecdev = ipsecdevices[i];
+ 		if(ipsecdev != NULL) {
+-			if((prv = (struct ipsecpriv *)(ipsecdev->priv))) {
++			if((prv = (struct ipsecpriv *)netdev_priv(ipsecdev))) {
+ 				prvdev = (struct net_device *)(prv->dev);
+ 				if(prvdev) {
+ 					KLIPS_PRINT(debug_tunnel & DB_TN_INIT,
+@@ -1316,7 +1316,7 @@
+ ipsec_tunnel_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
+ {
+ 	struct ipsectunnelconf *cf = (struct ipsectunnelconf *)&ifr->ifr_data;
+-	struct ipsecpriv *prv = dev->priv;
++	struct ipsecpriv *prv = netdev_priv(dev);
+ 	struct net_device *them; /* physical device */
+ #ifdef CONFIG_IP_ALIAS
+ 	char *colon;
+@@ -1510,7 +1510,7 @@
+ 			ipsec_dev = ipsecdevices[i];
+ 
+ 			if(ipsec_dev) {
+-				priv = (struct ipsecpriv *)(ipsec_dev->priv);
++				priv = (struct ipsecpriv *)netdev_priv(ipsec_dev);
+ 				if(priv) {
+ 					;
+ 					if(((struct net_device *)(priv->dev)) == dev) {
+@@ -1616,10 +1616,10 @@
+ 	dev->hard_start_xmit	= ipsec_tunnel_start_xmit;
+ 	dev->get_stats		= ipsec_tunnel_get_stats;
+ 
+-	dev->priv = kmalloc(sizeof(struct ipsecpriv), GFP_KERNEL);
+-	if (dev->priv == NULL)
+-		return -ENOMEM;
+-	memset((caddr_t)(dev->priv), 0, sizeof(struct ipsecpriv));
++	//dev->priv = kmalloc(sizeof(struct ipsecpriv), GFP_KERNEL);
++	//if (dev->priv == NULL)
++	//	return -ENOMEM;
++	//memset((caddr_t)(dev->priv), 0, sizeof(struct ipsecpriv));
+ 
+ 	for(i = 0; i < sizeof(zeroes); i++) {
+ 		((__u8*)(zeroes))[i] = 0;
+@@ -1711,7 +1711,7 @@
+ 
+ 	sprintf(name, IPSEC_DEV_FORMAT, ifnum);
+ #ifdef alloc_netdev
+-	dev_ipsec = alloc_netdev(0, name, ipsec_tunnel_netdev_setup);
++	dev_ipsec = alloc_netdev(sizeof(struct ipsecpriv), name, ipsec_tunnel_netdev_setup);
+ #else
+ 	dev_ipsec = (struct net_device*)kmalloc(sizeof(struct net_device), GFP_KERNEL);
+ #endif
+@@ -1818,9 +1818,9 @@
+ 	kfree(dev_ipsec->name);
+ 	dev_ipsec->name=NULL;
+ #endif /* !NETDEV_23 */
+-	kfree(dev_ipsec->priv);
++	//kfree(dev_ipsec->priv);
+ #endif /* alloc_netdev */
+-	dev_ipsec->priv=NULL;
++	//dev_ipsec->priv=NULL;
+ 
+ 	return 0;
+ }
+@@ -1871,9 +1871,9 @@
+ 		kfree(dev_ipsec->name);
+ 		dev_ipsec->name=NULL;
+ #endif /* !NETDEV_23 */
+-		kfree(dev_ipsec->priv);
++		//kfree(dev_ipsec->priv);
+ #endif /* alloc_netdev */
+-		dev_ipsec->priv=NULL;
++		//dev_ipsec->priv=NULL;
+ 	}
+ 	return error;
+ }
+diff -Nur openswan-2.6.21/linux/net/ipsec/ipsec_xmit.c openswan-2.6.21.patched/linux/net/ipsec/ipsec_xmit.c
+--- openswan-2.6.21/linux/net/ipsec/ipsec_xmit.c	2009-03-30 16:11:28.000000000 +0300
++++ openswan-2.6.21.patched/linux/net/ipsec/ipsec_xmit.c	2009-07-12 16:41:04.000000000 +0300
+@@ -425,7 +425,7 @@
+ 		return IPSEC_XMIT_NODEV;
+ 	}
+ 
+-	ixs->prv = ixs->dev->priv;
++	ixs->prv = netdev_priv(ixs->dev);
+ 	if (ixs->prv == NULL) {
+ 		KLIPS_PRINT(debug_tunnel & DB_TN_XMIT,
+ 			    "klips_error:ipsec_xmit_sanity_check_dev: "
+diff -Nur openswan-2.6.21/linux/net/ipsec/pfkey_v2.c openswan-2.6.21.patched/linux/net/ipsec/pfkey_v2.c
+--- openswan-2.6.21/linux/net/ipsec/pfkey_v2.c	2009-03-30 16:11:28.000000000 +0300
++++ openswan-2.6.21.patched/linux/net/ipsec/pfkey_v2.c	2009-07-12 16:41:04.000000000 +0300
+@@ -672,7 +672,7 @@
+ 		return -EPROTONOSUPPORT;
+ 	}
+ 
+-	if((current->uid != 0)) {
++	if((current_uid() != 0)) {
+ 		KLIPS_PRINT(debug_pfkey,
+ 			    "klips_debug:pfkey_create: "
+ 			    "must be root to open pfkey sockets.\n");
+@@ -872,7 +872,7 @@
+ 		SENDERR(-error);
+ 	}
+ 
+-	if((current->uid != 0)) {
++	if((current_uid() != 0)) {
+ 		KLIPS_PRINT(debug_pfkey,
+ 			    "klips_debug:pfkey_sendmsg: "
+ 			    "must be root to send messages to pfkey sockets.\n");
+diff -Nur openswan-2.6.21/packaging/linus/config-all.h openswan-2.6.21.patched/packaging/linus/config-all.h
+--- openswan-2.6.21/packaging/linus/config-all.h	2009-03-30 16:11:28.000000000 +0300
++++ openswan-2.6.21.patched/packaging/linus/config-all.h	2009-07-12 16:41:04.000000000 +0300
+@@ -22,9 +22,11 @@
+ #define CONFIG_KLIPS_AH 1
+ #endif
+ 
++#if 0
+ #ifndef CONFIG_KLIPS_DEBUG 
+ #define CONFIG_KLIPS_DEBUG 1
+ #endif
++#endif
+ 
+ #ifndef CONFIG_KLIPS_ESP
+ #define CONFIG_KLIPS_ESP 1
+@@ -72,13 +74,12 @@
+ #define CONFIG_KLIPS_ALG_CRYPTOAPI #error
+ #define CONFIG_KLIPS_ALG_AES #error
+ 
+-#if 0
+-/* off by default requiers kernel patch */
++
+ #ifndef CONFIG_KLIPS_OCF
+-#define CONFIG_KLIPS_OCF 0
+-#endif
++#define CONFIG_KLIPS_OCF 1
+ #endif
+ 
++
+ #ifndef CONFIG_KLIPS_ALG_AES_MAC
+ #define CONFIG_KLIPS_ALG_AES_MAC 1
+ #endif
+diff -Nur openswan-2.6.21/packaging/makefiles/module.defs openswan-2.6.21.patched/packaging/makefiles/module.defs
+--- openswan-2.6.21/packaging/makefiles/module.defs	2009-03-30 16:11:28.000000000 +0300
++++ openswan-2.6.21.patched/packaging/makefiles/module.defs	2009-07-12 16:41:04.000000000 +0300
+@@ -1,5 +1,7 @@
+ # To config as static (preferred), 'y'.  To config as module, 'm'.
+-CONFIG_KLIPS=m
++CONFIG_KLIPS=y
++
++CONFIG_KLIPS_OCF=y
+ 
+ # To enable authentication without encryption, say 'y'.   (Not so recommended)
+ CONFIG_KLIPS_AH=y
--- linux-mvl-dove-2.6.32.orig/cesa/openswan/ipsec_setup_dove.sh
+++ linux-mvl-dove-2.6.32/cesa/openswan/ipsec_setup_dove.sh
@@ -0,0 +1,36 @@
+# This is an example how to setup the network interfaces in order to run IPSec routing
+
+ifconfig eth0 192.168.0.1 hw ether 00:00:00:00:61:92 netmask 255.255.0.0
+ifconfig eth1 192.167.0.1 hw ether 00:00:00:00:62:81 netmask 255.255.0.0
+echo 1 > /proc/sys/net/ipv4/ip_forward
+arp -s 192.167.0.250 00:00:00:00:00:12
+arp -s 192.168.1.1 00:00:00:00:00:11
+#IPSec Configuration
+insmod /openswan-2.6.18/modobj26/ipsec.ko
+
+#SmartBit Configuration
+#eth0 - 192.168.1.1 --> 192.167.0.250
+#         00:00:00:00:00:12 --> 00:00:00:00:61:92
+#eth1   - 192.167.0.250 --> 192.168.1.1
+#         00:00:00:00:00:11 -> 00:00:00:00:62:81
+
+
+# unmark this to disble flow control for Yukon/E1000 NICs
+#ethtool -A eth0 tx off
+#ethtool -A eth0 rx off
+#ethtool -A eth2 tx off
+#ethtool -A eth2 rx off
+
+# Here we build static SA database since it is not supported anymore within OpenSWAN 2.6.18 and on 
+# This is example setup for ESP AES128/SHA1
+ipsec spi --clear
+ipsec eroute --clear
+enckey=0x123456789abcdef02468ace02468ace0
+authkey=0x0123456789abcdef02468ace13579bdf12345678
+ipsec spi --af inet --edst 192.168.1.1 --spi 0x12345678 --proto esp --src 192.168.0.1 --esp aes128-sha1 --enckey $enckey --authkey $authkey
+ipsec spi --af inet --edst 192.168.1.1 --spi 0x12345678 --proto tun --src 192.168.0.1 --dst 192.168.1.1 --ip4
+ipsec spigrp inet 192.168.1.1 0x12345678 tun inet 192.168.1.1 0x12345678 esp
+ipsec eroute --add --eraf inet --src 192.167.0.0/16 --dst 192.168.1.0/24 --said tun0x12345678@192.168.1.1
+ipsec tncfg --attach --virtual ipsec0 --physical eth0
+ifconfig ipsec0 inet 192.168.0.1 netmask 255.255.0.0 broadcast 192.168.255.255 up
+route add -host 192.168.1.1 gw 192.168.0.1 dev ipsec0
--- linux-mvl-dove-2.6.32.orig/cesa/openswan/README
+++ linux-mvl-dove-2.6.32/cesa/openswan/README
@@ -0,0 +1,59 @@
+OpenSWAN
+=========
+ In order to explore the CESA through the OpenSWAN, 1 patch should be applied to the OpenSWAN.
+
+ download openswan-2.6.24 (http://www.openswan.org/), then untar+unzip it.
+ apply the patch:
+
+ - mv_openswan_2_6_24.patch - 
+	change default configs to remove DEBUG and to include OCF.
+	Fixes:
+		- fix icmp_send failure caused by IFF_XMIT_DST_RELEASE flag set on the net dev.
+		- fix rmmod BUG by removing duplicated free_netdev call.
+		- include patch from openswan git that make sure we have the skb->dst in place before we call
+		  ip_select_ident otherwise we get kernel warn: "rt_bind_peer(0) .. "
+
+and compile:
+
+ + ipsec module (cross compilation) :
+  'make KERNELSRC=<path to this release, after config> module ARCH=arm CC=<path_to_cross_compile> LD=<path_to_cross_loader>' HAVE_OCF=1
+  then copy the module to the host FS: /lib/modules/<kernel_name>/kernel/net/ipsec/
+
+ + ipsec user (native) :
+  make sure that you have the kernel source on the FS.
+  'make KERNELSRC=<path to this release, after config> programs'
+  'make install'
+
+
+IPSec routing using encryption/authentication only
+
+  basic vpn connection:
+  +++++++++++++++++++++
+ - platform: conncted with egiga.
+ - make sure you have 'ip' (part of the iproute package) installed.
+ - edit /etc/ipsec.conf (on both sides) ,check the "man ipsec.conf" :
+
+config setup
+        interfaces="ipsec0=eth0"    # Virtual/physical interfaces
+        klipsdebug="none"             # Debug KLIPS
+        plutodebug="none"             # Debug PLUTO
+
+conn dove_psk_vpn
+    type=tunnel                    # type of the connection: tunnel(default),passthrough,transport,reject,drop
+    authby=secret
+    left=192.168.1.1
+    leftsubnet=192.168.1.0/16
+    right=192.168.0.1              # Remote information
+    rightsubnet=192.168.0.0/16
+    auto=start                     # start this connection at startup
+
+
+ - edit /etc/ipsec.secrets (on both sides) to have shared secret.
+192.168.1.1 192.168.0.1 : PSK "123456"
+
+ - side1: 'ifconfig eth0 192.168.0.1 netmask 255.255.0.0'
+ - side2: 'ifconfig eth0 192.168.1.1 netmask 255.255.0.0'
+ - check connectivity: ping from side1 to 192.168.1.1
+ - '/etc/init.d/ipsec start' (on both sides), create new interface ipsec0.
+ - check connectivity: ping from side1 to 192.168.1.1 --> VPN is working (make sure by sniffing)
+
--- linux-mvl-dove-2.6.32.orig/cesa/openssl/openssl_ocf.patch
+++ linux-mvl-dove-2.6.32/cesa/openssl/openssl_ocf.patch
@@ -0,0 +1,5958 @@
+diff -Nru openssl-0.9.8l_a/apps/apps.h openssl-0.9.8l_b/apps/apps.h
+--- openssl-0.9.8l_a/apps/apps.h	2008-11-24 18:14:13.000000000 +0200
++++ openssl-0.9.8l_b/apps/apps.h	2009-12-08 17:44:45.000000000 +0200
+@@ -112,7 +112,7 @@
+ #ifndef HEADER_APPS_H
+ #define HEADER_APPS_H
+ 
+-#include "e_os.h"
++#include <openssl/e_os.h>
+ 
+ #include <openssl/bio.h>
+ #include <openssl/x509.h>
+diff -Nru openssl-0.9.8l_a/apps/progs.h openssl-0.9.8l_b/apps/progs.h
+--- openssl-0.9.8l_a/apps/progs.h	2008-04-04 02:03:41.000000000 +0300
++++ openssl-0.9.8l_b/apps/progs.h	2009-12-08 17:44:45.000000000 +0200
+@@ -129,7 +129,9 @@
+ #ifndef OPENSSL_NO_ENGINE
+ 	{FUNC_TYPE_GENERAL,"engine",engine_main},
+ #endif
++#ifndef OPENSSL_NO_OCSP
+ 	{FUNC_TYPE_GENERAL,"ocsp",ocsp_main},
++#endif
+ 	{FUNC_TYPE_GENERAL,"prime",prime_main},
+ #ifndef OPENSSL_NO_MD2
+ 	{FUNC_TYPE_MD,"md2",dgst_main},
+diff -Nru openssl-0.9.8l_a/apps/speed.c openssl-0.9.8l_b/apps/speed.c
+--- openssl-0.9.8l_a/apps/speed.c	2009-01-07 12:48:22.000000000 +0200
++++ openssl-0.9.8l_b/apps/speed.c	2009-12-08 17:44:45.000000000 +0200
+@@ -292,7 +292,7 @@
+   "evp","sha256","sha512",
+   "aes-128 ige","aes-192 ige","aes-256 ige"};
+ static double results[ALGOR_NUM][SIZE_NUM];
+-static int lengths[SIZE_NUM]={16,64,256,1024,8*1024};
++static int lengths[SIZE_NUM]={16,64,256,1024,2*1024,4*1024};
+ static double rsa_results[RSA_NUM][2];
+ static double dsa_results[DSA_NUM][2];
+ #ifndef OPENSSL_NO_ECDSA
+@@ -328,6 +328,79 @@
+ #define START	0
+ #define STOP	1
+ 
++#ifdef __linux__
++/*
++ * record CPU usage as well
++ */
++
++static int do_cpu = 0;
++
++struct cpu_stat {
++	unsigned int	user;
++	unsigned int	nice;
++	unsigned int	system;
++	unsigned int	idle;
++	unsigned int	total;
++};
++
++static unsigned int cpu_usage[ALGOR_NUM][SIZE_NUM];
++static unsigned int rsa_cpu_usage[RSA_NUM][2];
++static unsigned int dsa_cpu_usage[DSA_NUM][2];
++static struct cpu_stat cpu_start, cpu_finish;
++
++static void
++get_cpu(int s)
++{
++	FILE *fp = NULL;
++	unsigned char	buf[80];
++	struct cpu_stat *st = s == START ? &cpu_start : &cpu_finish;
++
++	memset(st, 0, sizeof(*st));
++
++	if (fp == NULL)
++		fp = fopen("/proc/stat", "r");
++	if (!fp)
++		return;
++	if (fseek(fp, 0, SEEK_SET) == -1) {
++		fclose(fp);
++		return;
++	}
++	fscanf(fp, "%s %d %d %d %d", &buf[0], &st->user, &st->nice,
++		&st->system, &st->idle);
++	st->total = st->user + st->nice + st->system + st->idle;
++	fclose(fp);
++}
++
++static unsigned int
++calc_cpu()
++{
++	unsigned int total, res;
++
++	total  = cpu_finish.total - cpu_start.total;
++	if (total <= 0)
++		return 0;
++#if 1 // busy
++	res   = ((cpu_finish.system + cpu_finish.user + cpu_finish.nice) -
++			 (cpu_start.system + cpu_start.user + cpu_start.nice)) *
++			 100 / total;
++#endif
++#if 0 // system
++	res   = (cpu_finish.system - cpu_start.system) * 100 / total;
++#endif
++#if 0 // user
++	res   = (cpu_finish.user   - cpu_start.user)   * 100 / total;
++#endif
++#if 0 // nice
++	res   = (cpu_finish.nice   - cpu_start.nice)   * 100 / total;
++#endif
++#if 0 // idle
++	res   = (cpu_finish.idle   - cpu_start.idle)   * 100 / total;
++#endif
++	return(res);
++}
++
++#endif
++
+ #if defined(OPENSSL_SYS_NETWARE)
+ 
+    /* for NetWare the best we can do is use clock() which returns the
+@@ -358,6 +431,11 @@
+ 	{
+ 	double ret;
+ 
++#ifdef __linux__
++	if (do_cpu)
++		get_cpu(s);
++#endif
++
+ #ifdef USE_TOD
+ 	if(usertime)
+ 		{
+@@ -832,6 +910,14 @@
+ 			j--;	/* Otherwise, -elapsed gets confused with
+ 				   an algorithm. */
+ 			}
++#ifdef __linux__
++		else if	((argc > 0) && (strcmp(*argv,"-cpu") == 0))
++			{
++			do_cpu = 1;
++			j--;	/* Otherwise, -cpu gets confused with
++				   an algorithm. */
++			}
++#endif
+ 		else if	((argc > 0) && (strcmp(*argv,"-evp") == 0))
+ 			{
+ 			argc--;
+@@ -1260,6 +1346,9 @@
+ #ifdef HAVE_FORK
+ 			BIO_printf(bio_err,"-multi n        run n benchmarks in parallel.\n");
+ #endif
++#ifdef __linux__
++			BIO_printf(bio_err,"-cpu            calculate cpu utilisation.\n");
++#endif
+ 			goto end;
+ 			}
+ 		argc--;
+@@ -1267,11 +1356,6 @@
+ 		j++;
+ 		}
+ 
+-#ifdef HAVE_FORK
+-	if(multi && do_multi(multi))
+-		goto show_res;
+-#endif
+-
+ 	if (j == 0)
+ 		{
+ 		for (i=0; i<ALGOR_NUM; i++)
+@@ -1604,6 +1688,11 @@
+ 	signal(SIGALRM,sig_done);
+ #endif /* SIGALRM */
+ 
++#ifdef HAVE_FORK /* DM */
++	if(multi && do_multi(multi))
++		goto show_res;
++#endif
++
+ #ifndef OPENSSL_NO_MD2
+ 	if (doit[D_MD2])
+ 		{
+@@ -2033,8 +2122,6 @@
+ 				/* -O3 -fschedule-insns messes up an
+ 				 * optimization here!  names[D_EVP]
+ 				 * somehow becomes NULL */
+-				print_message(names[D_EVP],save_count,
+-					lengths[j]);
+ 
+ 				EVP_CIPHER_CTX_init(&ctx);
+ 				if(decrypt)
+@@ -2043,6 +2130,9 @@
+ 					EVP_EncryptInit_ex(&ctx,evp_cipher,NULL,key16,iv);
+ 				EVP_CIPHER_CTX_set_padding(&ctx, 0);
+ 
++				print_message(names[D_EVP],save_count,
++					lengths[j]);
++
+ 				Time_F(START);
+ 				if(decrypt)
+ 					for (count=0,run=1; COND(save_count*4*lengths[0]/lengths[j]); count++)
+@@ -2107,6 +2197,8 @@
+ 					}
+ 				}
+ 			d=Time_F(STOP);
++			if (do_cpu)
++				rsa_cpu_usage[j][0] = calc_cpu();
+ 			BIO_printf(bio_err,mr ? "+R1:%ld:%d:%.2f\n"
+ 				   : "%ld %d bit private RSA's in %.2fs\n",
+ 				   count,rsa_bits[j],d);
+@@ -2142,6 +2234,8 @@
+ 					}
+ 				}
+ 			d=Time_F(STOP);
++			if (do_cpu)
++				rsa_cpu_usage[j][1] = calc_cpu();
+ 			BIO_printf(bio_err,mr ? "+R2:%ld:%d:%.2f\n"
+ 				   : "%ld %d bit public RSA's in %.2fs\n",
+ 				   count,rsa_bits[j],d);
+@@ -2201,6 +2295,8 @@
+ 					}
+ 				}
+ 			d=Time_F(STOP);
++			if (do_cpu)
++				dsa_cpu_usage[j][0] = calc_cpu();
+ 			BIO_printf(bio_err,mr ? "+R3:%ld:%d:%.2f\n"
+ 				   : "%ld %d bit DSA signs in %.2fs\n",
+ 				   count,dsa_bits[j],d);
+@@ -2236,6 +2332,8 @@
+ 					}
+ 				}
+ 			d=Time_F(STOP);
++			if (do_cpu)
++				dsa_cpu_usage[j][1] = calc_cpu();
+ 			BIO_printf(bio_err,mr ? "+R4:%ld:%d:%.2f\n"
+ 				   : "%ld %d bit DSA verify in %.2fs\n",
+ 				   count,dsa_bits[j],d);
+@@ -2530,14 +2628,23 @@
+ 			fprintf(stdout,"The 'numbers' are in 1000s of bytes per second processed.\n"); 
+ 			fprintf(stdout,"type        ");
+ 			}
+-		for (j=0;  j<SIZE_NUM; j++)
++		for (j=0;  j<SIZE_NUM; j++) {
+ 			fprintf(stdout,mr ? ":%d" : "%7d bytes",lengths[j]);
++			if (do_cpu && !mr)
++				fprintf(stdout, " /cpu");
++		}
+ 		fprintf(stdout,"\n");
+ 		}
+ 
+ 	for (k=0; k<ALGOR_NUM; k++)
+ 		{
+ 		if (!doit[k]) continue;
++		if (k == D_EVP) {
++			if (evp_cipher)
++				names[D_EVP]=OBJ_nid2ln(evp_cipher->nid);
++			else
++				names[D_EVP]=OBJ_nid2ln(evp_md->type);
++		}
+ 		if(mr)
+ 			fprintf(stdout,"+F:%d:%s",k,names[k]);
+ 		else
+@@ -2548,6 +2655,8 @@
+ 				fprintf(stdout," %11.2fk",results[k][j]/1e3);
+ 			else
+ 				fprintf(stdout,mr ? ":%.2f" : " %11.2f ",results[k][j]);
++			if (do_cpu)
++				fprintf(stdout, mr ? "/%d" : "/%%%-3d", cpu_usage[k][j]);
+ 			}
+ 		fprintf(stdout,"\n");
+ 		}
+@@ -2562,13 +2671,18 @@
+ 			j=0;
+ 			}
+ 		if(mr)
+-			fprintf(stdout,"+F2:%u:%u:%f:%f\n",
+-				k,rsa_bits[k],rsa_results[k][0],
+-				rsa_results[k][1]);
+-		else
+-			fprintf(stdout,"rsa %4u bits %8.6fs %8.6fs %8.1f %8.1f\n",
+-				rsa_bits[k],rsa_results[k][0],rsa_results[k][1],
+-				1.0/rsa_results[k][0],1.0/rsa_results[k][1]);
++			fprintf(stdout,"+F2:%u:%u:%f", k,rsa_bits[k],rsa_results[k][0]);
++		else
++			fprintf(stdout,"rsa %4u bits %8.6fs",rsa_bits[k],rsa_results[k][0]);
++		if (do_cpu)
++			fprintf(stdout, mr ? "/%d": "/%%%-3d", rsa_cpu_usage[k][0]);
++		fprintf(stdout, mr ? ":%f" : " %8.6fs", rsa_results[k][1]);
++		if (do_cpu)
++			fprintf(stdout, mr ? "/%d": "/%%%-3d", rsa_cpu_usage[k][1]);
++		if(!mr)
++			fprintf(stdout, " %8.1f %8.1f",
++					1.0/rsa_results[k][0],1.0/rsa_results[k][1]);
++		fprintf(stdout, "\n");
+ 		}
+ #endif
+ #ifndef OPENSSL_NO_DSA
+@@ -2582,12 +2696,18 @@
+ 			j=0;
+ 			}
+ 		if(mr)
+-			fprintf(stdout,"+F3:%u:%u:%f:%f\n",
+-				k,dsa_bits[k],dsa_results[k][0],dsa_results[k][1]);
++			fprintf(stdout,"+F3:%u:%u:%f", k,dsa_bits[k],dsa_results[k][0]);
+ 		else
+-			fprintf(stdout,"dsa %4u bits %8.6fs %8.6fs %8.1f %8.1f\n",
+-				dsa_bits[k],dsa_results[k][0],dsa_results[k][1],
+-				1.0/dsa_results[k][0],1.0/dsa_results[k][1]);
++			fprintf(stdout,"dsa %4u bits %8.6fs",dsa_bits[k],dsa_results[k][0]);
++		if (do_cpu)
++			fprintf(stdout, mr ? "/%d": "/%%%-3d", dsa_cpu_usage[k][0]);
++		fprintf(stdout, mr ? ":%f" : " %8.6fs", dsa_results[k][1]);
++		if (do_cpu)
++			fprintf(stdout, mr ? "/%d": "/%%%-3d", dsa_cpu_usage[k][1]);
++		if(!mr)
++			fprintf(stdout, " %8.1f %8.1f",
++					1.0/dsa_results[k][0],1.0/dsa_results[k][1]);
++		fprintf(stdout, "\n");
+ 		}
+ #endif
+ #ifndef OPENSSL_NO_ECDSA
+@@ -2712,8 +2832,10 @@
+ 
+ static void print_result(int alg,int run_no,int count,double time_used)
+ 	{
+-	BIO_printf(bio_err,mr ? "+R:%d:%s:%f\n"
+-		   : "%d %s's in %.2fs\n",count,names[alg],time_used);
++	if (do_cpu)
++	    cpu_usage[alg][run_no] = calc_cpu();
++	BIO_printf(bio_err,mr ? "+R:%ld:%s:%f\n"
++		   : "%ld %s's in %.2fs\n",count,names[alg],time_used);
+ 	results[alg][run_no]=((double)count)/time_used*lengths[run_no];
+ 	}
+ 
+@@ -2808,29 +2930,11 @@
+ 				p=buf+3;
+ 				alg=atoi(sstrsep(&p,sep));
+ 				sstrsep(&p,sep);
+-				for(j=0 ; j < SIZE_NUM ; ++j)
++				for(j=0 ; j < SIZE_NUM ; ++j) {
++					if (do_cpu && strchr(p, '/'))
++						cpu_usage[alg][j] = atoi(strchr(p, '/') + 1);
+ 					results[alg][j]+=atof(sstrsep(&p,sep));
+ 				}
+-			else if(!strncmp(buf,"+F2:",4))
+-				{
+-				int k;
+-				double d;
+-				
+-				p=buf+4;
+-				k=atoi(sstrsep(&p,sep));
+-				sstrsep(&p,sep);
+-
+-				d=atof(sstrsep(&p,sep));
+-				if(n)
+-					rsa_results[k][0]=1/(1/rsa_results[k][0]+1/d);
+-				else
+-					rsa_results[k][0]=d;
+-
+-				d=atof(sstrsep(&p,sep));
+-				if(n)
+-					rsa_results[k][1]=1/(1/rsa_results[k][1]+1/d);
+-				else
+-					rsa_results[k][1]=d;
+ 				}
+ 			else if(!strncmp(buf,"+F2:",4))
+ 				{
+@@ -2841,12 +2945,18 @@
+ 				k=atoi(sstrsep(&p,sep));
+ 				sstrsep(&p,sep);
+ 
++				/* before we move the token along */
++				if (do_cpu && strchr(p, '/'))
++					rsa_cpu_usage[k][0] = atoi(strchr(p, '/') + 1);
+ 				d=atof(sstrsep(&p,sep));
+ 				if(n)
+ 					rsa_results[k][0]=1/(1/rsa_results[k][0]+1/d);
+ 				else
+ 					rsa_results[k][0]=d;
+ 
++				/* before we move the token along */
++				if (do_cpu && strchr(p, '/'))
++					rsa_cpu_usage[k][1] = atoi(strchr(p, '/') + 1);
+ 				d=atof(sstrsep(&p,sep));
+ 				if(n)
+ 					rsa_results[k][1]=1/(1/rsa_results[k][1]+1/d);
+@@ -2862,12 +2972,18 @@
+ 				k=atoi(sstrsep(&p,sep));
+ 				sstrsep(&p,sep);
+ 
++				/* before we move the token along */
++				if (do_cpu && strchr(p, '/'))
++					dsa_cpu_usage[k][0] = atoi(strchr(p, '/') + 1);
+ 				d=atof(sstrsep(&p,sep));
+ 				if(n)
+ 					dsa_results[k][0]=1/(1/dsa_results[k][0]+1/d);
+ 				else
+ 					dsa_results[k][0]=d;
+ 
++				/* before we move the token along */
++				if (do_cpu && strchr(p, '/'))
++					dsa_cpu_usage[k][1] = atoi(strchr(p, '/') + 1);
+ 				d=atof(sstrsep(&p,sep));
+ 				if(n)
+ 					dsa_results[k][1]=1/(1/dsa_results[k][1]+1/d);
+diff -Nru openssl-0.9.8l_a/apps/speed.c.orig openssl-0.9.8l_b/apps/speed.c.orig
+--- openssl-0.9.8l_a/apps/speed.c.orig	1970-01-01 02:00:00.000000000 +0200
++++ openssl-0.9.8l_b/apps/speed.c.orig	2009-01-07 12:48:22.000000000 +0200
+@@ -0,0 +1,2930 @@
++/* apps/speed.c -*- mode:C; c-file-style: "eay" -*- */
++/* Copyright (C) 1995-1998 Eric Young (eay@cryptsoft.com)
++ * All rights reserved.
++ *
++ * This package is an SSL implementation written
++ * by Eric Young (eay@cryptsoft.com).
++ * The implementation was written so as to conform with Netscapes SSL.
++ * 
++ * This library is free for commercial and non-commercial use as long as
++ * the following conditions are aheared to.  The following conditions
++ * apply to all code found in this distribution, be it the RC4, RSA,
++ * lhash, DES, etc., code; not just the SSL code.  The SSL documentation
++ * included with this distribution is covered by the same copyright terms
++ * except that the holder is Tim Hudson (tjh@cryptsoft.com).
++ * 
++ * Copyright remains Eric Young's, and as such any Copyright notices in
++ * the code are not to be removed.
++ * If this package is used in a product, Eric Young should be given attribution
++ * as the author of the parts of the library used.
++ * This can be in the form of a textual message at program startup or
++ * in documentation (online or textual) provided with the package.
++ * 
++ * Redistribution and use in source and binary forms, with or without
++ * modification, are permitted provided that the following conditions
++ * are met:
++ * 1. Redistributions of source code must retain the copyright
++ *    notice, this list of conditions and the following disclaimer.
++ * 2. Redistributions in binary form must reproduce the above copyright
++ *    notice, this list of conditions and the following disclaimer in the
++ *    documentation and/or other materials provided with the distribution.
++ * 3. All advertising materials mentioning features or use of this software
++ *    must display the following acknowledgement:
++ *    "This product includes cryptographic software written by
++ *     Eric Young (eay@cryptsoft.com)"
++ *    The word 'cryptographic' can be left out if the rouines from the library
++ *    being used are not cryptographic related :-).
++ * 4. If you include any Windows specific code (or a derivative thereof) from 
++ *    the apps directory (application code) you must include an acknowledgement:
++ *    "This product includes software written by Tim Hudson (tjh@cryptsoft.com)"
++ * 
++ * THIS SOFTWARE IS PROVIDED BY ERIC YOUNG ``AS IS'' AND
++ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
++ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
++ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
++ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
++ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
++ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
++ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
++ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
++ * SUCH DAMAGE.
++ * 
++ * The licence and distribution terms for any publically available version or
++ * derivative of this code cannot be changed.  i.e. this code cannot simply be
++ * copied and put under another distribution licence
++ * [including the GNU Public Licence.]
++ */
++/* ====================================================================
++ * Copyright 2002 Sun Microsystems, Inc. ALL RIGHTS RESERVED.
++ *
++ * Portions of the attached software ("Contribution") are developed by 
++ * SUN MICROSYSTEMS, INC., and are contributed to the OpenSSL project.
++ *
++ * The Contribution is licensed pursuant to the OpenSSL open source
++ * license provided above.
++ *
++ * The ECDH and ECDSA speed test software is originally written by 
++ * Sumit Gupta of Sun Microsystems Laboratories.
++ *
++ */
++
++/* most of this code has been pilfered from my libdes speed.c program */
++
++#ifndef OPENSSL_NO_SPEED
++
++#undef SECONDS
++#define SECONDS		3	
++#define RSA_SECONDS	10
++#define DSA_SECONDS	10
++#define ECDSA_SECONDS   10
++#define ECDH_SECONDS    10
++
++/* 11-Sep-92 Andrew Daviel   Support for Silicon Graphics IRIX added */
++/* 06-Apr-92 Luke Brennan    Support for VMS and add extra signal calls */
++
++#undef PROG
++#define PROG speed_main
++
++#include <stdio.h>
++#include <stdlib.h>
++
++#include <string.h>
++#include <math.h>
++#include "apps.h"
++#ifdef OPENSSL_NO_STDIO
++#define APPS_WIN16
++#endif
++#include <openssl/crypto.h>
++#include <openssl/rand.h>
++#include <openssl/err.h>
++#include <openssl/evp.h>
++#include <openssl/objects.h>
++#if !defined(OPENSSL_SYS_MSDOS)
++#include OPENSSL_UNISTD
++#endif
++
++#ifndef OPENSSL_SYS_NETWARE
++#include <signal.h>
++#endif
++
++#if defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__) || defined(OPENSSL_SYS_MACOSX)
++# define USE_TOD
++#elif !defined(OPENSSL_SYS_MSDOS) && !defined(OPENSSL_SYS_VXWORKS) && (!defined(OPENSSL_SYS_VMS) || defined(__DECC))
++# define TIMES
++#endif
++#if !defined(_UNICOS) && !defined(__OpenBSD__) && !defined(sgi) && !defined(__FreeBSD__) && !(defined(__bsdi) || defined(__bsdi__)) && !defined(_AIX) && !defined(OPENSSL_SYS_MPE) && !defined(__NetBSD__) && !defined(OPENSSL_SYS_VXWORKS) /* FIXME */
++# define TIMEB
++#endif
++
++#if defined(OPENSSL_SYS_NETWARE)
++#undef TIMES
++#undef TIMEB
++#include <time.h>
++#endif
++
++#ifndef _IRIX
++# include <time.h>
++#endif
++#ifdef TIMES
++# include <sys/types.h>
++# include <sys/times.h>
++#endif
++#ifdef USE_TOD
++# include <sys/time.h>
++# include <sys/resource.h>
++#endif
++
++/* Depending on the VMS version, the tms structure is perhaps defined.
++   The __TMS macro will show if it was.  If it wasn't defined, we should
++   undefine TIMES, since that tells the rest of the program how things
++   should be handled.				-- Richard Levitte */
++#if defined(OPENSSL_SYS_VMS_DECC) && !defined(__TMS)
++#undef TIMES
++#endif
++
++#ifdef TIMEB
++#include <sys/timeb.h>
++#endif
++
++#if !defined(TIMES) && !defined(TIMEB) && !defined(USE_TOD) && !defined(OPENSSL_SYS_VXWORKS) && !defined(OPENSSL_SYS_NETWARE)
++#error "It seems neither struct tms nor struct timeb is supported in this platform!"
++#endif
++
++#if defined(sun) || defined(__ultrix)
++#define _POSIX_SOURCE
++#include <limits.h>
++#include <sys/param.h>
++#endif
++
++#include <openssl/bn.h>
++#ifndef OPENSSL_NO_DES
++#include <openssl/des.h>
++#endif
++#ifndef OPENSSL_NO_AES
++#include <openssl/aes.h>
++#endif
++#ifndef OPENSSL_NO_CAMELLIA
++#include <openssl/camellia.h>
++#endif
++#ifndef OPENSSL_NO_MD2
++#include <openssl/md2.h>
++#endif
++#ifndef OPENSSL_NO_MDC2
++#include <openssl/mdc2.h>
++#endif
++#ifndef OPENSSL_NO_MD4
++#include <openssl/md4.h>
++#endif
++#ifndef OPENSSL_NO_MD5
++#include <openssl/md5.h>
++#endif
++#ifndef OPENSSL_NO_HMAC
++#include <openssl/hmac.h>
++#endif
++#include <openssl/evp.h>
++#ifndef OPENSSL_NO_SHA
++#include <openssl/sha.h>
++#endif
++#ifndef OPENSSL_NO_RIPEMD
++#include <openssl/ripemd.h>
++#endif
++#ifndef OPENSSL_NO_RC4
++#include <openssl/rc4.h>
++#endif
++#ifndef OPENSSL_NO_RC5
++#include <openssl/rc5.h>
++#endif
++#ifndef OPENSSL_NO_RC2
++#include <openssl/rc2.h>
++#endif
++#ifndef OPENSSL_NO_IDEA
++#include <openssl/idea.h>
++#endif
++#ifndef OPENSSL_NO_SEED
++#include <openssl/seed.h>
++#endif
++#ifndef OPENSSL_NO_BF
++#include <openssl/blowfish.h>
++#endif
++#ifndef OPENSSL_NO_CAST
++#include <openssl/cast.h>
++#endif
++#ifndef OPENSSL_NO_RSA
++#include <openssl/rsa.h>
++#include "./testrsa.h"
++#endif
++#include <openssl/x509.h>
++#ifndef OPENSSL_NO_DSA
++#include <openssl/dsa.h>
++#include "./testdsa.h"
++#endif
++#ifndef OPENSSL_NO_ECDSA
++#include <openssl/ecdsa.h>
++#endif
++#ifndef OPENSSL_NO_ECDH
++#include <openssl/ecdh.h>
++#endif
++
++/*
++ * The following "HZ" timing stuff should be sync'd up with the code in
++ * crypto/tmdiff.[ch]. That appears to try to do the same job, though I think
++ * this code is more up to date than libcrypto's so there may be features to
++ * migrate over first. This is used in two places further down AFAICS. 
++ * The point is that nothing in openssl actually *uses* that tmdiff stuff, so
++ * either speed.c should be using it or it should go because it's obviously not
++ * useful enough. Anyone want to do a janitorial job on this?
++ */
++
++/* The following if from times(3) man page.  It may need to be changed */
++#ifndef HZ
++# if defined(_SC_CLK_TCK) \
++     && (!defined(OPENSSL_SYS_VMS) || __CTRL_VER >= 70000000)
++#  define HZ sysconf(_SC_CLK_TCK)
++# else
++#  ifndef CLK_TCK
++#   ifndef _BSD_CLK_TCK_ /* FreeBSD hack */
++#    define HZ	100.0
++#   else /* _BSD_CLK_TCK_ */
++#    define HZ ((double)_BSD_CLK_TCK_)
++#   endif
++#  else /* CLK_TCK */
++#   define HZ ((double)CLK_TCK)
++#  endif
++# endif
++#endif
++
++#if !defined(OPENSSL_SYS_VMS) && !defined(OPENSSL_SYS_WINDOWS) && !defined(OPENSSL_SYS_MACINTOSH_CLASSIC) && !defined(OPENSSL_SYS_OS2) && !defined(OPENSSL_SYS_NETWARE)
++# define HAVE_FORK 1
++#endif
++
++#undef BUFSIZE
++#define BUFSIZE	((long)1024*8+1)
++int run=0;
++
++static char ftime_used = 0, times_used = 0, gettimeofday_used = 0, getrusage_used = 0;
++static int mr=0;
++static int usertime=1;
++
++static double Time_F(int s);
++static void print_message(const char *s,long num,int length);
++static void pkey_print_message(const char *str, const char *str2,
++	long num, int bits, int sec);
++static void print_result(int alg,int run_no,int count,double time_used);
++#ifdef HAVE_FORK
++static int do_multi(int multi);
++#endif
++
++#define ALGOR_NUM	28
++#define SIZE_NUM	5
++#define RSA_NUM		4
++#define DSA_NUM		3
++
++#define EC_NUM       16
++#define MAX_ECDH_SIZE 256
++
++static const char *names[ALGOR_NUM]={
++  "md2","mdc2","md4","md5","hmac(md5)","sha1","rmd160","rc4",
++  "des cbc","des ede3","idea cbc","seed cbc",
++  "rc2 cbc","rc5-32/12 cbc","blowfish cbc","cast cbc",
++  "aes-128 cbc","aes-192 cbc","aes-256 cbc",
++  "camellia-128 cbc","camellia-192 cbc","camellia-256 cbc",
++  "evp","sha256","sha512",
++  "aes-128 ige","aes-192 ige","aes-256 ige"};
++static double results[ALGOR_NUM][SIZE_NUM];
++static int lengths[SIZE_NUM]={16,64,256,1024,8*1024};
++static double rsa_results[RSA_NUM][2];
++static double dsa_results[DSA_NUM][2];
++#ifndef OPENSSL_NO_ECDSA
++static double ecdsa_results[EC_NUM][2];
++#endif
++#ifndef OPENSSL_NO_ECDH
++static double ecdh_results[EC_NUM][1];
++#endif
++
++#if defined(OPENSSL_NO_DSA) && !(defined(OPENSSL_NO_ECDSA) && defined(OPENSSL_NO_ECDH))
++static const char rnd_seed[] = "string to make the random number generator think it has entropy";
++static int rnd_fake = 0;
++#endif
++
++#ifdef SIGALRM
++#if defined(__STDC__) || defined(sgi) || defined(_AIX)
++#define SIGRETTYPE void
++#else
++#define SIGRETTYPE int
++#endif 
++
++static SIGRETTYPE sig_done(int sig);
++static SIGRETTYPE sig_done(int sig)
++	{
++	signal(SIGALRM,sig_done);
++	run=0;
++#ifdef LINT
++	sig=sig;
++#endif
++	}
++#endif
++
++#define START	0
++#define STOP	1
++
++#if defined(OPENSSL_SYS_NETWARE)
++
++   /* for NetWare the best we can do is use clock() which returns the
++    * time, in hundredths of a second, since the NLM began executing
++   */
++static double Time_F(int s)
++	{
++	double ret;
++
++   static clock_t tstart,tend;
++
++   if (s == START)
++   {
++      tstart=clock();
++      return(0);
++   }
++   else
++   {
++      tend=clock();
++      ret=(double)((double)(tend)-(double)(tstart));
++      return((ret < 0.001)?0.001:ret);
++   }
++   }
++
++#else
++
++static double Time_F(int s)
++	{
++	double ret;
++
++#ifdef USE_TOD
++	if(usertime)
++		{
++		static struct rusage tstart,tend;
++
++		getrusage_used = 1;
++		if (s == START)
++			{
++			getrusage(RUSAGE_SELF,&tstart);
++			return(0);
++			}
++		else
++			{
++			long i;
++
++			getrusage(RUSAGE_SELF,&tend);
++			i=(long)tend.ru_utime.tv_usec-(long)tstart.ru_utime.tv_usec;
++			ret=((double)(tend.ru_utime.tv_sec-tstart.ru_utime.tv_sec))
++			  +((double)i)/1000000.0;
++			return((ret < 0.001)?0.001:ret);
++			}
++		}
++	else
++		{
++		static struct timeval tstart,tend;
++		long i;
++
++		gettimeofday_used = 1;
++		if (s == START)
++			{
++			gettimeofday(&tstart,NULL);
++			return(0);
++			}
++		else
++			{
++			gettimeofday(&tend,NULL);
++			i=(long)tend.tv_usec-(long)tstart.tv_usec;
++			ret=((double)(tend.tv_sec-tstart.tv_sec))+((double)i)/1000000.0;
++			return((ret < 0.001)?0.001:ret);
++			}
++		}
++#else  /* ndef USE_TOD */
++		
++# ifdef TIMES
++	if (usertime)
++		{
++		static struct tms tstart,tend;
++
++		times_used = 1;
++		if (s == START)
++			{
++			times(&tstart);
++			return(0);
++			}
++		else
++			{
++			times(&tend);
++			ret = HZ;
++			ret=(double)(tend.tms_utime-tstart.tms_utime) / ret;
++			return((ret < 1e-3)?1e-3:ret);
++			}
++		}
++# endif /* times() */
++# if defined(TIMES) && defined(TIMEB)
++	else
++# endif
++# ifdef OPENSSL_SYS_VXWORKS
++                {
++		static unsigned long tick_start, tick_end;
++
++		if( s == START )
++			{
++			tick_start = tickGet();
++			return 0;
++			}
++		else
++			{
++			tick_end = tickGet();
++			ret = (double)(tick_end - tick_start) / (double)sysClkRateGet();
++			return((ret < 0.001)?0.001:ret);
++			}
++                }
++# elif defined(TIMEB)
++		{
++		static struct timeb tstart,tend;
++		long i;
++
++		ftime_used = 1;
++		if (s == START)
++			{
++			ftime(&tstart);
++			return(0);
++			}
++		else
++			{
++			ftime(&tend);
++			i=(long)tend.millitm-(long)tstart.millitm;
++			ret=((double)(tend.time-tstart.time))+((double)i)/1000.0;
++			return((ret < 0.001)?0.001:ret);
++			}
++		}
++# endif
++#endif
++	}
++#endif /* if defined(OPENSSL_SYS_NETWARE) */
++
++
++#ifndef OPENSSL_NO_ECDH
++static const int KDF1_SHA1_len = 20;
++static void *KDF1_SHA1(const void *in, size_t inlen, void *out, size_t *outlen)
++	{
++#ifndef OPENSSL_NO_SHA
++	if (*outlen < SHA_DIGEST_LENGTH)
++		return NULL;
++	else
++		*outlen = SHA_DIGEST_LENGTH;
++	return SHA1(in, inlen, out);
++#else
++	return NULL;
++#endif	/* OPENSSL_NO_SHA */
++	}
++#endif	/* OPENSSL_NO_ECDH */
++
++
++int MAIN(int, char **);
++
++int MAIN(int argc, char **argv)
++	{
++#ifndef OPENSSL_NO_ENGINE
++	ENGINE *e = NULL;
++#endif
++	unsigned char *buf=NULL,*buf2=NULL;
++	int mret=1;
++	long count=0,save_count=0;
++	int i,j,k;
++#if !defined(OPENSSL_NO_RSA) || !defined(OPENSSL_NO_DSA)
++	long rsa_count;
++#endif
++#ifndef OPENSSL_NO_RSA
++	unsigned rsa_num;
++#endif
++	unsigned char md[EVP_MAX_MD_SIZE];
++#ifndef OPENSSL_NO_MD2
++	unsigned char md2[MD2_DIGEST_LENGTH];
++#endif
++#ifndef OPENSSL_NO_MDC2
++	unsigned char mdc2[MDC2_DIGEST_LENGTH];
++#endif
++#ifndef OPENSSL_NO_MD4
++	unsigned char md4[MD4_DIGEST_LENGTH];
++#endif
++#ifndef OPENSSL_NO_MD5
++	unsigned char md5[MD5_DIGEST_LENGTH];
++	unsigned char hmac[MD5_DIGEST_LENGTH];
++#endif
++#ifndef OPENSSL_NO_SHA
++	unsigned char sha[SHA_DIGEST_LENGTH];
++#ifndef OPENSSL_NO_SHA256
++	unsigned char sha256[SHA256_DIGEST_LENGTH];
++#endif
++#ifndef OPENSSL_NO_SHA512
++	unsigned char sha512[SHA512_DIGEST_LENGTH];
++#endif
++#endif
++#ifndef OPENSSL_NO_RIPEMD
++	unsigned char rmd160[RIPEMD160_DIGEST_LENGTH];
++#endif
++#ifndef OPENSSL_NO_RC4
++	RC4_KEY rc4_ks;
++#endif
++#ifndef OPENSSL_NO_RC5
++	RC5_32_KEY rc5_ks;
++#endif
++#ifndef OPENSSL_NO_RC2
++	RC2_KEY rc2_ks;
++#endif
++#ifndef OPENSSL_NO_IDEA
++	IDEA_KEY_SCHEDULE idea_ks;
++#endif
++#ifndef OPENSSL_NO_SEED
++	SEED_KEY_SCHEDULE seed_ks;
++#endif
++#ifndef OPENSSL_NO_BF
++	BF_KEY bf_ks;
++#endif
++#ifndef OPENSSL_NO_CAST
++	CAST_KEY cast_ks;
++#endif
++	static const unsigned char key16[16]=
++		{0x12,0x34,0x56,0x78,0x9a,0xbc,0xde,0xf0,
++		 0x34,0x56,0x78,0x9a,0xbc,0xde,0xf0,0x12};
++#ifndef OPENSSL_NO_AES
++	static const unsigned char key24[24]=
++		{0x12,0x34,0x56,0x78,0x9a,0xbc,0xde,0xf0,
++		 0x34,0x56,0x78,0x9a,0xbc,0xde,0xf0,0x12,
++		 0x56,0x78,0x9a,0xbc,0xde,0xf0,0x12,0x34};
++	static const unsigned char key32[32]=
++		{0x12,0x34,0x56,0x78,0x9a,0xbc,0xde,0xf0,
++		 0x34,0x56,0x78,0x9a,0xbc,0xde,0xf0,0x12,
++		 0x56,0x78,0x9a,0xbc,0xde,0xf0,0x12,0x34,
++		 0x78,0x9a,0xbc,0xde,0xf0,0x12,0x34,0x56};
++#endif
++#ifndef OPENSSL_NO_CAMELLIA
++	static const unsigned char ckey24[24]=
++		{0x12,0x34,0x56,0x78,0x9a,0xbc,0xde,0xf0,
++		 0x34,0x56,0x78,0x9a,0xbc,0xde,0xf0,0x12,
++		 0x56,0x78,0x9a,0xbc,0xde,0xf0,0x12,0x34};
++	static const unsigned char ckey32[32]=
++		{0x12,0x34,0x56,0x78,0x9a,0xbc,0xde,0xf0,
++		 0x34,0x56,0x78,0x9a,0xbc,0xde,0xf0,0x12,
++		 0x56,0x78,0x9a,0xbc,0xde,0xf0,0x12,0x34,
++		 0x78,0x9a,0xbc,0xde,0xf0,0x12,0x34,0x56};
++#endif
++#ifndef OPENSSL_NO_AES
++#define MAX_BLOCK_SIZE 128
++#else
++#define MAX_BLOCK_SIZE 64
++#endif
++	unsigned char DES_iv[8];
++	unsigned char iv[2*MAX_BLOCK_SIZE/8];
++#ifndef OPENSSL_NO_DES
++	DES_cblock *buf_as_des_cblock = NULL;
++	static DES_cblock key ={0x12,0x34,0x56,0x78,0x9a,0xbc,0xde,0xf0};
++	static DES_cblock key2={0x34,0x56,0x78,0x9a,0xbc,0xde,0xf0,0x12};
++	static DES_cblock key3={0x56,0x78,0x9a,0xbc,0xde,0xf0,0x12,0x34};
++	DES_key_schedule sch;
++	DES_key_schedule sch2;
++	DES_key_schedule sch3;
++#endif
++#ifndef OPENSSL_NO_AES
++	AES_KEY aes_ks1, aes_ks2, aes_ks3;
++#endif
++#ifndef OPENSSL_NO_CAMELLIA
++	CAMELLIA_KEY camellia_ks1, camellia_ks2, camellia_ks3;
++#endif
++#define	D_MD2		0
++#define	D_MDC2		1
++#define	D_MD4		2
++#define	D_MD5		3
++#define	D_HMAC		4
++#define	D_SHA1		5
++#define D_RMD160	6
++#define	D_RC4		7
++#define	D_CBC_DES	8
++#define	D_EDE3_DES	9
++#define	D_CBC_IDEA	10
++#define	D_CBC_SEED	11
++#define	D_CBC_RC2	12
++#define	D_CBC_RC5	13
++#define	D_CBC_BF	14
++#define	D_CBC_CAST	15
++#define D_CBC_128_AES	16
++#define D_CBC_192_AES	17
++#define D_CBC_256_AES	18
++#define D_CBC_128_CML   19 
++#define D_CBC_192_CML   20
++#define D_CBC_256_CML   21 
++#define D_EVP		22
++#define D_SHA256	23	
++#define D_SHA512	24
++#define D_IGE_128_AES   25
++#define D_IGE_192_AES   26
++#define D_IGE_256_AES   27
++	double d=0.0;
++	long c[ALGOR_NUM][SIZE_NUM];
++#define	R_DSA_512	0
++#define	R_DSA_1024	1
++#define	R_DSA_2048	2
++#define	R_RSA_512	0
++#define	R_RSA_1024	1
++#define	R_RSA_2048	2
++#define	R_RSA_4096	3
++
++#define R_EC_P160    0
++#define R_EC_P192    1	
++#define R_EC_P224    2
++#define R_EC_P256    3
++#define R_EC_P384    4
++#define R_EC_P521    5
++#define R_EC_K163    6
++#define R_EC_K233    7
++#define R_EC_K283    8
++#define R_EC_K409    9
++#define R_EC_K571    10
++#define R_EC_B163    11
++#define R_EC_B233    12
++#define R_EC_B283    13
++#define R_EC_B409    14
++#define R_EC_B571    15
++
++#ifndef OPENSSL_NO_RSA
++	RSA *rsa_key[RSA_NUM];
++	long rsa_c[RSA_NUM][2];
++	static unsigned int rsa_bits[RSA_NUM]={512,1024,2048,4096};
++	static unsigned char *rsa_data[RSA_NUM]=
++		{test512,test1024,test2048,test4096};
++	static int rsa_data_length[RSA_NUM]={
++		sizeof(test512),sizeof(test1024),
++		sizeof(test2048),sizeof(test4096)};
++#endif
++#ifndef OPENSSL_NO_DSA
++	DSA *dsa_key[DSA_NUM];
++	long dsa_c[DSA_NUM][2];
++	static unsigned int dsa_bits[DSA_NUM]={512,1024,2048};
++#endif
++#ifndef OPENSSL_NO_EC
++	/* We only test over the following curves as they are representative, 
++	 * To add tests over more curves, simply add the curve NID
++	 * and curve name to the following arrays and increase the 
++	 * EC_NUM value accordingly. 
++	 */
++	static unsigned int test_curves[EC_NUM] = 
++	{	
++	/* Prime Curves */
++	NID_secp160r1,
++	NID_X9_62_prime192v1,
++	NID_secp224r1,
++	NID_X9_62_prime256v1,
++	NID_secp384r1,
++	NID_secp521r1,
++	/* Binary Curves */
++	NID_sect163k1,
++	NID_sect233k1,
++	NID_sect283k1,
++	NID_sect409k1,
++	NID_sect571k1,
++	NID_sect163r2,
++	NID_sect233r1,
++	NID_sect283r1,
++	NID_sect409r1,
++	NID_sect571r1
++	}; 
++	static const char * test_curves_names[EC_NUM] = 
++	{
++	/* Prime Curves */
++	"secp160r1",
++	"nistp192",
++	"nistp224",
++	"nistp256",
++	"nistp384",
++	"nistp521",
++	/* Binary Curves */
++	"nistk163",
++	"nistk233",
++	"nistk283",
++	"nistk409",
++	"nistk571",
++	"nistb163",
++	"nistb233",
++	"nistb283",
++	"nistb409",
++	"nistb571"
++	};
++	static int test_curves_bits[EC_NUM] =
++        {
++        160, 192, 224, 256, 384, 521,
++        163, 233, 283, 409, 571,
++        163, 233, 283, 409, 571
++        };
++
++#endif
++
++#ifndef OPENSSL_NO_ECDSA
++	unsigned char ecdsasig[256];
++	unsigned int ecdsasiglen;
++	EC_KEY *ecdsa[EC_NUM];
++	long ecdsa_c[EC_NUM][2];
++#endif
++
++#ifndef OPENSSL_NO_ECDH
++	EC_KEY *ecdh_a[EC_NUM], *ecdh_b[EC_NUM];
++	unsigned char secret_a[MAX_ECDH_SIZE], secret_b[MAX_ECDH_SIZE];
++	int secret_size_a, secret_size_b;
++	int ecdh_checks = 0;
++	int secret_idx = 0;
++	long ecdh_c[EC_NUM][2];
++#endif
++
++	int rsa_doit[RSA_NUM];
++	int dsa_doit[DSA_NUM];
++#ifndef OPENSSL_NO_ECDSA
++	int ecdsa_doit[EC_NUM];
++#endif
++#ifndef OPENSSL_NO_ECDH
++        int ecdh_doit[EC_NUM];
++#endif
++	int doit[ALGOR_NUM];
++	int pr_header=0;
++	const EVP_CIPHER *evp_cipher=NULL;
++	const EVP_MD *evp_md=NULL;
++	int decrypt=0;
++#ifdef HAVE_FORK
++	int multi=0;
++#endif
++
++#ifndef TIMES
++	usertime=-1;
++#endif
++
++	apps_startup();
++	memset(results, 0, sizeof(results));
++#ifndef OPENSSL_NO_DSA
++	memset(dsa_key,0,sizeof(dsa_key));
++#endif
++#ifndef OPENSSL_NO_ECDSA
++	for (i=0; i<EC_NUM; i++) ecdsa[i] = NULL;
++#endif
++#ifndef OPENSSL_NO_ECDH
++	for (i=0; i<EC_NUM; i++)
++		{
++		ecdh_a[i] = NULL;
++		ecdh_b[i] = NULL;
++		}
++#endif
++
++
++	if (bio_err == NULL)
++		if ((bio_err=BIO_new(BIO_s_file())) != NULL)
++			BIO_set_fp(bio_err,stderr,BIO_NOCLOSE|BIO_FP_TEXT);
++
++	if (!load_config(bio_err, NULL))
++		goto end;
++
++#ifndef OPENSSL_NO_RSA
++	memset(rsa_key,0,sizeof(rsa_key));
++	for (i=0; i<RSA_NUM; i++)
++		rsa_key[i]=NULL;
++#endif
++
++	if ((buf=(unsigned char *)OPENSSL_malloc((int)BUFSIZE)) == NULL)
++		{
++		BIO_printf(bio_err,"out of memory\n");
++		goto end;
++		}
++#ifndef OPENSSL_NO_DES
++	buf_as_des_cblock = (DES_cblock *)buf;
++#endif
++	if ((buf2=(unsigned char *)OPENSSL_malloc((int)BUFSIZE)) == NULL)
++		{
++		BIO_printf(bio_err,"out of memory\n");
++		goto end;
++		}
++
++	memset(c,0,sizeof(c));
++	memset(DES_iv,0,sizeof(DES_iv));
++	memset(iv,0,sizeof(iv));
++
++	for (i=0; i<ALGOR_NUM; i++)
++		doit[i]=0;
++	for (i=0; i<RSA_NUM; i++)
++		rsa_doit[i]=0;
++	for (i=0; i<DSA_NUM; i++)
++		dsa_doit[i]=0;
++#ifndef OPENSSL_NO_ECDSA
++	for (i=0; i<EC_NUM; i++)
++		ecdsa_doit[i]=0;
++#endif
++#ifndef OPENSSL_NO_ECDH
++	for (i=0; i<EC_NUM; i++)
++		ecdh_doit[i]=0;
++#endif
++
++	
++	j=0;
++	argc--;
++	argv++;
++	while (argc)
++		{
++		if	((argc > 0) && (strcmp(*argv,"-elapsed") == 0))
++			{
++			usertime = 0;
++			j--;	/* Otherwise, -elapsed gets confused with
++				   an algorithm. */
++			}
++		else if	((argc > 0) && (strcmp(*argv,"-evp") == 0))
++			{
++			argc--;
++			argv++;
++			if(argc == 0)
++				{
++				BIO_printf(bio_err,"no EVP given\n");
++				goto end;
++				}
++			evp_cipher=EVP_get_cipherbyname(*argv);
++			if(!evp_cipher)
++				{
++				evp_md=EVP_get_digestbyname(*argv);
++				}
++			if(!evp_cipher && !evp_md)
++				{
++				BIO_printf(bio_err,"%s is an unknown cipher or digest\n",*argv);
++				goto end;
++				}
++			doit[D_EVP]=1;
++			}
++		else if (argc > 0 && !strcmp(*argv,"-decrypt"))
++			{
++			decrypt=1;
++			j--;	/* Otherwise, -elapsed gets confused with
++				   an algorithm. */
++			}
++#ifndef OPENSSL_NO_ENGINE
++		else if	((argc > 0) && (strcmp(*argv,"-engine") == 0))
++			{
++			argc--;
++			argv++;
++			if(argc == 0)
++				{
++				BIO_printf(bio_err,"no engine given\n");
++				goto end;
++				}
++                        e = setup_engine(bio_err, *argv, 0);
++			/* j will be increased again further down.  We just
++			   don't want speed to confuse an engine with an
++			   algorithm, especially when none is given (which
++			   means all of them should be run) */
++			j--;
++			}
++#endif
++#ifdef HAVE_FORK
++		else if	((argc > 0) && (strcmp(*argv,"-multi") == 0))
++			{
++			argc--;
++			argv++;
++			if(argc == 0)
++				{
++				BIO_printf(bio_err,"no multi count given\n");
++				goto end;
++				}
++			multi=atoi(argv[0]);
++			if(multi <= 0)
++			    {
++				BIO_printf(bio_err,"bad multi count\n");
++				goto end;
++				}				
++			j--;	/* Otherwise, -mr gets confused with
++				   an algorithm. */
++			}
++#endif
++		else if (argc > 0 && !strcmp(*argv,"-mr"))
++			{
++			mr=1;
++			j--;	/* Otherwise, -mr gets confused with
++				   an algorithm. */
++			}
++		else
++#ifndef OPENSSL_NO_MD2
++		if	(strcmp(*argv,"md2") == 0) doit[D_MD2]=1;
++		else
++#endif
++#ifndef OPENSSL_NO_MDC2
++			if (strcmp(*argv,"mdc2") == 0) doit[D_MDC2]=1;
++		else
++#endif
++#ifndef OPENSSL_NO_MD4
++			if (strcmp(*argv,"md4") == 0) doit[D_MD4]=1;
++		else
++#endif
++#ifndef OPENSSL_NO_MD5
++			if (strcmp(*argv,"md5") == 0) doit[D_MD5]=1;
++		else
++#endif
++#ifndef OPENSSL_NO_MD5
++			if (strcmp(*argv,"hmac") == 0) doit[D_HMAC]=1;
++		else
++#endif
++#ifndef OPENSSL_NO_SHA
++			if (strcmp(*argv,"sha1") == 0) doit[D_SHA1]=1;
++		else
++			if (strcmp(*argv,"sha") == 0)	doit[D_SHA1]=1,
++							doit[D_SHA256]=1,
++							doit[D_SHA512]=1;
++		else
++#ifndef OPENSSL_NO_SHA256
++			if (strcmp(*argv,"sha256") == 0) doit[D_SHA256]=1;
++		else
++#endif
++#ifndef OPENSSL_NO_SHA512
++			if (strcmp(*argv,"sha512") == 0) doit[D_SHA512]=1;
++		else
++#endif
++#endif
++#ifndef OPENSSL_NO_RIPEMD
++			if (strcmp(*argv,"ripemd") == 0) doit[D_RMD160]=1;
++		else
++			if (strcmp(*argv,"rmd160") == 0) doit[D_RMD160]=1;
++		else
++			if (strcmp(*argv,"ripemd160") == 0) doit[D_RMD160]=1;
++		else
++#endif
++#ifndef OPENSSL_NO_RC4
++			if (strcmp(*argv,"rc4") == 0) doit[D_RC4]=1;
++		else 
++#endif
++#ifndef OPENSSL_NO_DES
++			if (strcmp(*argv,"des-cbc") == 0) doit[D_CBC_DES]=1;
++		else	if (strcmp(*argv,"des-ede3") == 0) doit[D_EDE3_DES]=1;
++		else
++#endif
++#ifndef OPENSSL_NO_AES
++			if (strcmp(*argv,"aes-128-cbc") == 0) doit[D_CBC_128_AES]=1;
++		else	if (strcmp(*argv,"aes-192-cbc") == 0) doit[D_CBC_192_AES]=1;
++		else	if (strcmp(*argv,"aes-256-cbc") == 0) doit[D_CBC_256_AES]=1;
++		else    if (strcmp(*argv,"aes-128-ige") == 0) doit[D_IGE_128_AES]=1;
++		else	if (strcmp(*argv,"aes-192-ige") == 0) doit[D_IGE_192_AES]=1;
++		else	if (strcmp(*argv,"aes-256-ige") == 0) doit[D_IGE_256_AES]=1;
++                else
++#endif
++#ifndef OPENSSL_NO_CAMELLIA
++			if (strcmp(*argv,"camellia-128-cbc") == 0) doit[D_CBC_128_CML]=1;
++		else    if (strcmp(*argv,"camellia-192-cbc") == 0) doit[D_CBC_192_CML]=1;
++		else    if (strcmp(*argv,"camellia-256-cbc") == 0) doit[D_CBC_256_CML]=1;
++		else
++#endif
++#ifndef OPENSSL_NO_RSA
++#if 0 /* was: #ifdef RSAref */
++			if (strcmp(*argv,"rsaref") == 0) 
++			{
++			RSA_set_default_openssl_method(RSA_PKCS1_RSAref());
++			j--;
++			}
++		else
++#endif
++#ifndef RSA_NULL
++			if (strcmp(*argv,"openssl") == 0) 
++			{
++			RSA_set_default_method(RSA_PKCS1_SSLeay());
++			j--;
++			}
++		else
++#endif
++#endif /* !OPENSSL_NO_RSA */
++		     if (strcmp(*argv,"dsa512") == 0) dsa_doit[R_DSA_512]=2;
++		else if (strcmp(*argv,"dsa1024") == 0) dsa_doit[R_DSA_1024]=2;
++		else if (strcmp(*argv,"dsa2048") == 0) dsa_doit[R_DSA_2048]=2;
++		else if (strcmp(*argv,"rsa512") == 0) rsa_doit[R_RSA_512]=2;
++		else if (strcmp(*argv,"rsa1024") == 0) rsa_doit[R_RSA_1024]=2;
++		else if (strcmp(*argv,"rsa2048") == 0) rsa_doit[R_RSA_2048]=2;
++		else if (strcmp(*argv,"rsa4096") == 0) rsa_doit[R_RSA_4096]=2;
++		else
++#ifndef OPENSSL_NO_RC2
++		     if (strcmp(*argv,"rc2-cbc") == 0) doit[D_CBC_RC2]=1;
++		else if (strcmp(*argv,"rc2") == 0) doit[D_CBC_RC2]=1;
++		else
++#endif
++#ifndef OPENSSL_NO_RC5
++		     if (strcmp(*argv,"rc5-cbc") == 0) doit[D_CBC_RC5]=1;
++		else if (strcmp(*argv,"rc5") == 0) doit[D_CBC_RC5]=1;
++		else
++#endif
++#ifndef OPENSSL_NO_IDEA
++		     if (strcmp(*argv,"idea-cbc") == 0) doit[D_CBC_IDEA]=1;
++		else if (strcmp(*argv,"idea") == 0) doit[D_CBC_IDEA]=1;
++		else
++#endif
++#ifndef OPENSSL_NO_SEED
++		     if (strcmp(*argv,"seed-cbc") == 0) doit[D_CBC_SEED]=1;
++		else if (strcmp(*argv,"seed") == 0) doit[D_CBC_SEED]=1;
++		else
++#endif
++#ifndef OPENSSL_NO_BF
++		     if (strcmp(*argv,"bf-cbc") == 0) doit[D_CBC_BF]=1;
++		else if (strcmp(*argv,"blowfish") == 0) doit[D_CBC_BF]=1;
++		else if (strcmp(*argv,"bf") == 0) doit[D_CBC_BF]=1;
++		else
++#endif
++#ifndef OPENSSL_NO_CAST
++		     if (strcmp(*argv,"cast-cbc") == 0) doit[D_CBC_CAST]=1;
++		else if (strcmp(*argv,"cast") == 0) doit[D_CBC_CAST]=1;
++		else if (strcmp(*argv,"cast5") == 0) doit[D_CBC_CAST]=1;
++		else
++#endif
++#ifndef OPENSSL_NO_DES
++			if (strcmp(*argv,"des") == 0)
++			{
++			doit[D_CBC_DES]=1;
++			doit[D_EDE3_DES]=1;
++			}
++		else
++#endif
++#ifndef OPENSSL_NO_AES
++			if (strcmp(*argv,"aes") == 0)
++			{
++			doit[D_CBC_128_AES]=1;
++			doit[D_CBC_192_AES]=1;
++			doit[D_CBC_256_AES]=1;
++			}
++		else
++#endif
++#ifndef OPENSSL_NO_CAMELLIA
++			if (strcmp(*argv,"camellia") == 0)
++			{
++			doit[D_CBC_128_CML]=1;
++			doit[D_CBC_192_CML]=1;
++			doit[D_CBC_256_CML]=1;
++			}
++		else
++#endif
++#ifndef OPENSSL_NO_RSA
++			if (strcmp(*argv,"rsa") == 0)
++			{
++			rsa_doit[R_RSA_512]=1;
++			rsa_doit[R_RSA_1024]=1;
++			rsa_doit[R_RSA_2048]=1;
++			rsa_doit[R_RSA_4096]=1;
++			}
++		else
++#endif
++#ifndef OPENSSL_NO_DSA
++			if (strcmp(*argv,"dsa") == 0)
++			{
++			dsa_doit[R_DSA_512]=1;
++			dsa_doit[R_DSA_1024]=1;
++			dsa_doit[R_DSA_2048]=1;
++			}
++		else
++#endif
++#ifndef OPENSSL_NO_ECDSA
++		     if (strcmp(*argv,"ecdsap160") == 0) ecdsa_doit[R_EC_P160]=2;
++		else if (strcmp(*argv,"ecdsap192") == 0) ecdsa_doit[R_EC_P192]=2;
++		else if (strcmp(*argv,"ecdsap224") == 0) ecdsa_doit[R_EC_P224]=2;
++		else if (strcmp(*argv,"ecdsap256") == 0) ecdsa_doit[R_EC_P256]=2;
++		else if (strcmp(*argv,"ecdsap384") == 0) ecdsa_doit[R_EC_P384]=2;
++		else if (strcmp(*argv,"ecdsap521") == 0) ecdsa_doit[R_EC_P521]=2;
++		else if (strcmp(*argv,"ecdsak163") == 0) ecdsa_doit[R_EC_K163]=2;
++		else if (strcmp(*argv,"ecdsak233") == 0) ecdsa_doit[R_EC_K233]=2;
++		else if (strcmp(*argv,"ecdsak283") == 0) ecdsa_doit[R_EC_K283]=2;
++		else if (strcmp(*argv,"ecdsak409") == 0) ecdsa_doit[R_EC_K409]=2;
++		else if (strcmp(*argv,"ecdsak571") == 0) ecdsa_doit[R_EC_K571]=2;
++		else if (strcmp(*argv,"ecdsab163") == 0) ecdsa_doit[R_EC_B163]=2;
++		else if (strcmp(*argv,"ecdsab233") == 0) ecdsa_doit[R_EC_B233]=2;
++		else if (strcmp(*argv,"ecdsab283") == 0) ecdsa_doit[R_EC_B283]=2;
++		else if (strcmp(*argv,"ecdsab409") == 0) ecdsa_doit[R_EC_B409]=2;
++		else if (strcmp(*argv,"ecdsab571") == 0) ecdsa_doit[R_EC_B571]=2;
++		else if (strcmp(*argv,"ecdsa") == 0)
++			{
++			for (i=0; i < EC_NUM; i++)
++				ecdsa_doit[i]=1;
++			}
++		else
++#endif
++#ifndef OPENSSL_NO_ECDH
++		     if (strcmp(*argv,"ecdhp160") == 0) ecdh_doit[R_EC_P160]=2;
++		else if (strcmp(*argv,"ecdhp192") == 0) ecdh_doit[R_EC_P192]=2;
++		else if (strcmp(*argv,"ecdhp224") == 0) ecdh_doit[R_EC_P224]=2;
++		else if (strcmp(*argv,"ecdhp256") == 0) ecdh_doit[R_EC_P256]=2;
++		else if (strcmp(*argv,"ecdhp384") == 0) ecdh_doit[R_EC_P384]=2;
++		else if (strcmp(*argv,"ecdhp521") == 0) ecdh_doit[R_EC_P521]=2;
++		else if (strcmp(*argv,"ecdhk163") == 0) ecdh_doit[R_EC_K163]=2;
++		else if (strcmp(*argv,"ecdhk233") == 0) ecdh_doit[R_EC_K233]=2;
++		else if (strcmp(*argv,"ecdhk283") == 0) ecdh_doit[R_EC_K283]=2;
++		else if (strcmp(*argv,"ecdhk409") == 0) ecdh_doit[R_EC_K409]=2;
++		else if (strcmp(*argv,"ecdhk571") == 0) ecdh_doit[R_EC_K571]=2;
++		else if (strcmp(*argv,"ecdhb163") == 0) ecdh_doit[R_EC_B163]=2;
++		else if (strcmp(*argv,"ecdhb233") == 0) ecdh_doit[R_EC_B233]=2;
++		else if (strcmp(*argv,"ecdhb283") == 0) ecdh_doit[R_EC_B283]=2;
++		else if (strcmp(*argv,"ecdhb409") == 0) ecdh_doit[R_EC_B409]=2;
++		else if (strcmp(*argv,"ecdhb571") == 0) ecdh_doit[R_EC_B571]=2;
++		else if (strcmp(*argv,"ecdh") == 0)
++			{
++			for (i=0; i < EC_NUM; i++)
++				ecdh_doit[i]=1;
++			}
++		else
++#endif
++			{
++			BIO_printf(bio_err,"Error: bad option or value\n");
++			BIO_printf(bio_err,"\n");
++			BIO_printf(bio_err,"Available values:\n");
++#ifndef OPENSSL_NO_MD2
++			BIO_printf(bio_err,"md2      ");
++#endif
++#ifndef OPENSSL_NO_MDC2
++			BIO_printf(bio_err,"mdc2     ");
++#endif
++#ifndef OPENSSL_NO_MD4
++			BIO_printf(bio_err,"md4      ");
++#endif
++#ifndef OPENSSL_NO_MD5
++			BIO_printf(bio_err,"md5      ");
++#ifndef OPENSSL_NO_HMAC
++			BIO_printf(bio_err,"hmac     ");
++#endif
++#endif
++#ifndef OPENSSL_NO_SHA1
++			BIO_printf(bio_err,"sha1     ");
++#endif
++#ifndef OPENSSL_NO_SHA256
++			BIO_printf(bio_err,"sha256   ");
++#endif
++#ifndef OPENSSL_NO_SHA512
++			BIO_printf(bio_err,"sha512   ");
++#endif
++#ifndef OPENSSL_NO_RIPEMD160
++			BIO_printf(bio_err,"rmd160");
++#endif
++#if !defined(OPENSSL_NO_MD2) || !defined(OPENSSL_NO_MDC2) || \
++    !defined(OPENSSL_NO_MD4) || !defined(OPENSSL_NO_MD5) || \
++    !defined(OPENSSL_NO_SHA1) || !defined(OPENSSL_NO_RIPEMD160)
++			BIO_printf(bio_err,"\n");
++#endif
++
++#ifndef OPENSSL_NO_IDEA
++			BIO_printf(bio_err,"idea-cbc ");
++#endif
++#ifndef OPENSSL_NO_SEED
++			BIO_printf(bio_err,"seed-cbc ");
++#endif
++#ifndef OPENSSL_NO_RC2
++			BIO_printf(bio_err,"rc2-cbc  ");
++#endif
++#ifndef OPENSSL_NO_RC5
++			BIO_printf(bio_err,"rc5-cbc  ");
++#endif
++#ifndef OPENSSL_NO_BF
++			BIO_printf(bio_err,"bf-cbc");
++#endif
++#if !defined(OPENSSL_NO_IDEA) || !defined(OPENSSL_NO_SEED) || !defined(OPENSSL_NO_RC2) || \
++    !defined(OPENSSL_NO_BF) || !defined(OPENSSL_NO_RC5)
++			BIO_printf(bio_err,"\n");
++#endif
++#ifndef OPENSSL_NO_DES
++			BIO_printf(bio_err,"des-cbc  des-ede3 ");
++#endif
++#ifndef OPENSSL_NO_AES
++			BIO_printf(bio_err,"aes-128-cbc aes-192-cbc aes-256-cbc ");
++			BIO_printf(bio_err,"aes-128-ige aes-192-ige aes-256-ige ");
++#endif
++#ifndef OPENSSL_NO_CAMELLIA
++			BIO_printf(bio_err,"\n");
++			BIO_printf(bio_err,"camellia-128-cbc camellia-192-cbc camellia-256-cbc ");
++#endif
++#ifndef OPENSSL_NO_RC4
++			BIO_printf(bio_err,"rc4");
++#endif
++			BIO_printf(bio_err,"\n");
++
++#ifndef OPENSSL_NO_RSA
++			BIO_printf(bio_err,"rsa512   rsa1024  rsa2048  rsa4096\n");
++#endif
++
++#ifndef OPENSSL_NO_DSA
++			BIO_printf(bio_err,"dsa512   dsa1024  dsa2048\n");
++#endif
++#ifndef OPENSSL_NO_ECDSA
++			BIO_printf(bio_err,"ecdsap160 ecdsap192 ecdsap224 ecdsap256 ecdsap384 ecdsap521\n");
++			BIO_printf(bio_err,"ecdsak163 ecdsak233 ecdsak283 ecdsak409 ecdsak571\n");
++			BIO_printf(bio_err,"ecdsab163 ecdsab233 ecdsab283 ecdsab409 ecdsab571\n");
++			BIO_printf(bio_err,"ecdsa\n");
++#endif
++#ifndef OPENSSL_NO_ECDH
++			BIO_printf(bio_err,"ecdhp160  ecdhp192  ecdhp224  ecdhp256  ecdhp384  ecdhp521\n");
++			BIO_printf(bio_err,"ecdhk163  ecdhk233  ecdhk283  ecdhk409  ecdhk571\n");
++			BIO_printf(bio_err,"ecdhb163  ecdhb233  ecdhb283  ecdhb409  ecdhb571\n");
++			BIO_printf(bio_err,"ecdh\n");
++#endif
++
++#ifndef OPENSSL_NO_IDEA
++			BIO_printf(bio_err,"idea     ");
++#endif
++#ifndef OPENSSL_NO_SEED
++			BIO_printf(bio_err,"seed     ");
++#endif
++#ifndef OPENSSL_NO_RC2
++			BIO_printf(bio_err,"rc2      ");
++#endif
++#ifndef OPENSSL_NO_DES
++			BIO_printf(bio_err,"des      ");
++#endif
++#ifndef OPENSSL_NO_AES
++			BIO_printf(bio_err,"aes      ");
++#endif
++#ifndef OPENSSL_NO_CAMELLIA
++			BIO_printf(bio_err,"camellia ");
++#endif
++#ifndef OPENSSL_NO_RSA
++			BIO_printf(bio_err,"rsa      ");
++#endif
++#ifndef OPENSSL_NO_BF
++			BIO_printf(bio_err,"blowfish");
++#endif
++#if !defined(OPENSSL_NO_IDEA) || !defined(OPENSSL_NO_SEED) || \
++    !defined(OPENSSL_NO_RC2) || !defined(OPENSSL_NO_DES) || \
++    !defined(OPENSSL_NO_RSA) || !defined(OPENSSL_NO_BF) || \
++    !defined(OPENSSL_NO_AES) || !defined(OPENSSL_NO_CAMELLIA)
++			BIO_printf(bio_err,"\n");
++#endif
++
++			BIO_printf(bio_err,"\n");
++			BIO_printf(bio_err,"Available options:\n");
++#if defined(TIMES) || defined(USE_TOD)
++			BIO_printf(bio_err,"-elapsed        measure time in real time instead of CPU user time.\n");
++#endif
++#ifndef OPENSSL_NO_ENGINE
++			BIO_printf(bio_err,"-engine e       use engine e, possibly a hardware device.\n");
++#endif
++			BIO_printf(bio_err,"-evp e          use EVP e.\n");
++			BIO_printf(bio_err,"-decrypt        time decryption instead of encryption (only EVP).\n");
++			BIO_printf(bio_err,"-mr             produce machine readable output.\n");
++#ifdef HAVE_FORK
++			BIO_printf(bio_err,"-multi n        run n benchmarks in parallel.\n");
++#endif
++			goto end;
++			}
++		argc--;
++		argv++;
++		j++;
++		}
++
++#ifdef HAVE_FORK
++	if(multi && do_multi(multi))
++		goto show_res;
++#endif
++
++	if (j == 0)
++		{
++		for (i=0; i<ALGOR_NUM; i++)
++			{
++			if (i != D_EVP)
++				doit[i]=1;
++			}
++		for (i=0; i<RSA_NUM; i++)
++			rsa_doit[i]=1;
++		for (i=0; i<DSA_NUM; i++)
++			dsa_doit[i]=1;
++		}
++	for (i=0; i<ALGOR_NUM; i++)
++		if (doit[i]) pr_header++;
++
++	if (usertime == 0 && !mr)
++		BIO_printf(bio_err,"You have chosen to measure elapsed time instead of user CPU time.\n");
++	if (usertime <= 0 && !mr)
++		{
++		BIO_printf(bio_err,"To get the most accurate results, try to run this\n");
++		BIO_printf(bio_err,"program when this computer is idle.\n");
++		}
++
++#ifndef OPENSSL_NO_RSA
++	for (i=0; i<RSA_NUM; i++)
++		{
++		const unsigned char *p;
++
++		p=rsa_data[i];
++		rsa_key[i]=d2i_RSAPrivateKey(NULL,&p,rsa_data_length[i]);
++		if (rsa_key[i] == NULL)
++			{
++			BIO_printf(bio_err,"internal error loading RSA key number %d\n",i);
++			goto end;
++			}
++#if 0
++		else
++			{
++			BIO_printf(bio_err,mr ? "+RK:%d:"
++				   : "Loaded RSA key, %d bit modulus and e= 0x",
++				   BN_num_bits(rsa_key[i]->n));
++			BN_print(bio_err,rsa_key[i]->e);
++			BIO_printf(bio_err,"\n");
++			}
++#endif
++		}
++#endif
++
++#ifndef OPENSSL_NO_DSA
++	dsa_key[0]=get_dsa512();
++	dsa_key[1]=get_dsa1024();
++	dsa_key[2]=get_dsa2048();
++#endif
++
++#ifndef OPENSSL_NO_DES
++	DES_set_key_unchecked(&key,&sch);
++	DES_set_key_unchecked(&key2,&sch2);
++	DES_set_key_unchecked(&key3,&sch3);
++#endif
++#ifndef OPENSSL_NO_AES
++	AES_set_encrypt_key(key16,128,&aes_ks1);
++	AES_set_encrypt_key(key24,192,&aes_ks2);
++	AES_set_encrypt_key(key32,256,&aes_ks3);
++#endif
++#ifndef OPENSSL_NO_CAMELLIA
++	Camellia_set_key(key16,128,&camellia_ks1);
++	Camellia_set_key(ckey24,192,&camellia_ks2);
++	Camellia_set_key(ckey32,256,&camellia_ks3);
++#endif
++#ifndef OPENSSL_NO_IDEA
++	idea_set_encrypt_key(key16,&idea_ks);
++#endif
++#ifndef OPENSSL_NO_SEED
++	SEED_set_key(key16,&seed_ks);
++#endif
++#ifndef OPENSSL_NO_RC4
++	RC4_set_key(&rc4_ks,16,key16);
++#endif
++#ifndef OPENSSL_NO_RC2
++	RC2_set_key(&rc2_ks,16,key16,128);
++#endif
++#ifndef OPENSSL_NO_RC5
++	RC5_32_set_key(&rc5_ks,16,key16,12);
++#endif
++#ifndef OPENSSL_NO_BF
++	BF_set_key(&bf_ks,16,key16);
++#endif
++#ifndef OPENSSL_NO_CAST
++	CAST_set_key(&cast_ks,16,key16);
++#endif
++#ifndef OPENSSL_NO_RSA
++	memset(rsa_c,0,sizeof(rsa_c));
++#endif
++#ifndef SIGALRM
++#ifndef OPENSSL_NO_DES
++	BIO_printf(bio_err,"First we calculate the approximate speed ...\n");
++	count=10;
++	do	{
++		long it;
++		count*=2;
++		Time_F(START);
++		for (it=count; it; it--)
++			DES_ecb_encrypt(buf_as_des_cblock,buf_as_des_cblock,
++				&sch,DES_ENCRYPT);
++		d=Time_F(STOP);
++		} while (d <3);
++	save_count=count;
++	c[D_MD2][0]=count/10;
++	c[D_MDC2][0]=count/10;
++	c[D_MD4][0]=count;
++	c[D_MD5][0]=count;
++	c[D_HMAC][0]=count;
++	c[D_SHA1][0]=count;
++	c[D_RMD160][0]=count;
++	c[D_RC4][0]=count*5;
++	c[D_CBC_DES][0]=count;
++	c[D_EDE3_DES][0]=count/3;
++	c[D_CBC_IDEA][0]=count;
++	c[D_CBC_SEED][0]=count;
++	c[D_CBC_RC2][0]=count;
++	c[D_CBC_RC5][0]=count;
++	c[D_CBC_BF][0]=count;
++	c[D_CBC_CAST][0]=count;
++	c[D_CBC_128_AES][0]=count;
++	c[D_CBC_192_AES][0]=count;
++	c[D_CBC_256_AES][0]=count;
++	c[D_CBC_128_CML][0]=count;
++	c[D_CBC_192_CML][0]=count;
++	c[D_CBC_256_CML][0]=count;
++	c[D_SHA256][0]=count;
++	c[D_SHA512][0]=count;
++	c[D_IGE_128_AES][0]=count;
++	c[D_IGE_192_AES][0]=count;
++	c[D_IGE_256_AES][0]=count;
++
++	for (i=1; i<SIZE_NUM; i++)
++		{
++		c[D_MD2][i]=c[D_MD2][0]*4*lengths[0]/lengths[i];
++		c[D_MDC2][i]=c[D_MDC2][0]*4*lengths[0]/lengths[i];
++		c[D_MD4][i]=c[D_MD4][0]*4*lengths[0]/lengths[i];
++		c[D_MD5][i]=c[D_MD5][0]*4*lengths[0]/lengths[i];
++		c[D_HMAC][i]=c[D_HMAC][0]*4*lengths[0]/lengths[i];
++		c[D_SHA1][i]=c[D_SHA1][0]*4*lengths[0]/lengths[i];
++		c[D_RMD160][i]=c[D_RMD160][0]*4*lengths[0]/lengths[i];
++		c[D_SHA256][i]=c[D_SHA256][0]*4*lengths[0]/lengths[i];
++		c[D_SHA512][i]=c[D_SHA512][0]*4*lengths[0]/lengths[i];
++		}
++	for (i=1; i<SIZE_NUM; i++)
++		{
++		long l0,l1;
++
++		l0=(long)lengths[i-1];
++		l1=(long)lengths[i];
++		c[D_RC4][i]=c[D_RC4][i-1]*l0/l1;
++		c[D_CBC_DES][i]=c[D_CBC_DES][i-1]*l0/l1;
++		c[D_EDE3_DES][i]=c[D_EDE3_DES][i-1]*l0/l1;
++		c[D_CBC_IDEA][i]=c[D_CBC_IDEA][i-1]*l0/l1;
++		c[D_CBC_SEED][i]=c[D_CBC_SEED][i-1]*l0/l1;
++		c[D_CBC_RC2][i]=c[D_CBC_RC2][i-1]*l0/l1;
++		c[D_CBC_RC5][i]=c[D_CBC_RC5][i-1]*l0/l1;
++		c[D_CBC_BF][i]=c[D_CBC_BF][i-1]*l0/l1;
++		c[D_CBC_CAST][i]=c[D_CBC_CAST][i-1]*l0/l1;
++		c[D_CBC_128_AES][i]=c[D_CBC_128_AES][i-1]*l0/l1;
++		c[D_CBC_192_AES][i]=c[D_CBC_192_AES][i-1]*l0/l1;
++		c[D_CBC_256_AES][i]=c[D_CBC_256_AES][i-1]*l0/l1;
++ 		c[D_CBC_128_CML][i]=c[D_CBC_128_CML][i-1]*l0/l1;
++		c[D_CBC_192_CML][i]=c[D_CBC_192_CML][i-1]*l0/l1;
++		c[D_CBC_256_CML][i]=c[D_CBC_256_CML][i-1]*l0/l1;
++		c[D_IGE_128_AES][i]=c[D_IGE_128_AES][i-1]*l0/l1;
++		c[D_IGE_192_AES][i]=c[D_IGE_192_AES][i-1]*l0/l1;
++		c[D_IGE_256_AES][i]=c[D_IGE_256_AES][i-1]*l0/l1;
++		}
++#ifndef OPENSSL_NO_RSA
++	rsa_c[R_RSA_512][0]=count/2000;
++	rsa_c[R_RSA_512][1]=count/400;
++	for (i=1; i<RSA_NUM; i++)
++		{
++		rsa_c[i][0]=rsa_c[i-1][0]/8;
++		rsa_c[i][1]=rsa_c[i-1][1]/4;
++		if ((rsa_doit[i] <= 1) && (rsa_c[i][0] == 0))
++			rsa_doit[i]=0;
++		else
++			{
++			if (rsa_c[i][0] == 0)
++				{
++				rsa_c[i][0]=1;
++				rsa_c[i][1]=20;
++				}
++			}				
++		}
++#endif
++
++#ifndef OPENSSL_NO_DSA
++	dsa_c[R_DSA_512][0]=count/1000;
++	dsa_c[R_DSA_512][1]=count/1000/2;
++	for (i=1; i<DSA_NUM; i++)
++		{
++		dsa_c[i][0]=dsa_c[i-1][0]/4;
++		dsa_c[i][1]=dsa_c[i-1][1]/4;
++		if ((dsa_doit[i] <= 1) && (dsa_c[i][0] == 0))
++			dsa_doit[i]=0;
++		else
++			{
++			if (dsa_c[i] == 0)
++				{
++				dsa_c[i][0]=1;
++				dsa_c[i][1]=1;
++				}
++			}				
++		}
++#endif
++
++#ifndef OPENSSL_NO_ECDSA
++	ecdsa_c[R_EC_P160][0]=count/1000;
++	ecdsa_c[R_EC_P160][1]=count/1000/2;
++	for (i=R_EC_P192; i<=R_EC_P521; i++)
++		{
++		ecdsa_c[i][0]=ecdsa_c[i-1][0]/2;
++		ecdsa_c[i][1]=ecdsa_c[i-1][1]/2;
++		if ((ecdsa_doit[i] <= 1) && (ecdsa_c[i][0] == 0))
++			ecdsa_doit[i]=0;
++		else
++			{
++			if (ecdsa_c[i] == 0)
++				{
++				ecdsa_c[i][0]=1;
++				ecdsa_c[i][1]=1;
++				}
++			}
++		}
++	ecdsa_c[R_EC_K163][0]=count/1000;
++	ecdsa_c[R_EC_K163][1]=count/1000/2;
++	for (i=R_EC_K233; i<=R_EC_K571; i++)
++		{
++		ecdsa_c[i][0]=ecdsa_c[i-1][0]/2;
++		ecdsa_c[i][1]=ecdsa_c[i-1][1]/2;
++		if ((ecdsa_doit[i] <= 1) && (ecdsa_c[i][0] == 0))
++			ecdsa_doit[i]=0;
++		else
++			{
++			if (ecdsa_c[i] == 0)
++				{
++				ecdsa_c[i][0]=1;
++				ecdsa_c[i][1]=1;
++				}
++			}
++		}
++	ecdsa_c[R_EC_B163][0]=count/1000;
++	ecdsa_c[R_EC_B163][1]=count/1000/2;
++	for (i=R_EC_B233; i<=R_EC_B571; i++)
++		{
++		ecdsa_c[i][0]=ecdsa_c[i-1][0]/2;
++		ecdsa_c[i][1]=ecdsa_c[i-1][1]/2;
++		if ((ecdsa_doit[i] <= 1) && (ecdsa_c[i][0] == 0))
++			ecdsa_doit[i]=0;
++		else
++			{
++			if (ecdsa_c[i] == 0)
++				{
++				ecdsa_c[i][0]=1;
++				ecdsa_c[i][1]=1;
++				}
++			}
++		}
++#endif
++
++#ifndef OPENSSL_NO_ECDH
++	ecdh_c[R_EC_P160][0]=count/1000;
++	ecdh_c[R_EC_P160][1]=count/1000;
++	for (i=R_EC_P192; i<=R_EC_P521; i++)
++		{
++		ecdh_c[i][0]=ecdh_c[i-1][0]/2;
++		ecdh_c[i][1]=ecdh_c[i-1][1]/2;
++		if ((ecdh_doit[i] <= 1) && (ecdh_c[i][0] == 0))
++			ecdh_doit[i]=0;
++		else
++			{
++			if (ecdh_c[i] == 0)
++				{
++				ecdh_c[i][0]=1;
++				ecdh_c[i][1]=1;
++				}
++			}
++		}
++	ecdh_c[R_EC_K163][0]=count/1000;
++	ecdh_c[R_EC_K163][1]=count/1000;
++	for (i=R_EC_K233; i<=R_EC_K571; i++)
++		{
++		ecdh_c[i][0]=ecdh_c[i-1][0]/2;
++		ecdh_c[i][1]=ecdh_c[i-1][1]/2;
++		if ((ecdh_doit[i] <= 1) && (ecdh_c[i][0] == 0))
++			ecdh_doit[i]=0;
++		else
++			{
++			if (ecdh_c[i] == 0)
++				{
++				ecdh_c[i][0]=1;
++				ecdh_c[i][1]=1;
++				}
++			}
++		}
++	ecdh_c[R_EC_B163][0]=count/1000;
++	ecdh_c[R_EC_B163][1]=count/1000;
++	for (i=R_EC_B233; i<=R_EC_B571; i++)
++		{
++		ecdh_c[i][0]=ecdh_c[i-1][0]/2;
++		ecdh_c[i][1]=ecdh_c[i-1][1]/2;
++		if ((ecdh_doit[i] <= 1) && (ecdh_c[i][0] == 0))
++			ecdh_doit[i]=0;
++		else
++			{
++			if (ecdh_c[i] == 0)
++				{
++				ecdh_c[i][0]=1;
++				ecdh_c[i][1]=1;
++				}
++			}
++		}
++#endif
++
++#define COND(d)	(count < (d))
++#define COUNT(d) (d)
++#else
++/* not worth fixing */
++# error "You cannot disable DES on systems without SIGALRM."
++#endif /* OPENSSL_NO_DES */
++#else
++#define COND(c)	(run)
++#define COUNT(d) (count)
++	signal(SIGALRM,sig_done);
++#endif /* SIGALRM */
++
++#ifndef OPENSSL_NO_MD2
++	if (doit[D_MD2])
++		{
++		for (j=0; j<SIZE_NUM; j++)
++			{
++			print_message(names[D_MD2],c[D_MD2][j],lengths[j]);
++			Time_F(START);
++			for (count=0,run=1; COND(c[D_MD2][j]); count++)
++				EVP_Digest(buf,(unsigned long)lengths[j],&(md2[0]),NULL,EVP_md2(),NULL);
++			d=Time_F(STOP);
++			print_result(D_MD2,j,count,d);
++			}
++		}
++#endif
++#ifndef OPENSSL_NO_MDC2
++	if (doit[D_MDC2])
++		{
++		for (j=0; j<SIZE_NUM; j++)
++			{
++			print_message(names[D_MDC2],c[D_MDC2][j],lengths[j]);
++			Time_F(START);
++			for (count=0,run=1; COND(c[D_MDC2][j]); count++)
++				EVP_Digest(buf,(unsigned long)lengths[j],&(mdc2[0]),NULL,EVP_mdc2(),NULL);
++			d=Time_F(STOP);
++			print_result(D_MDC2,j,count,d);
++			}
++		}
++#endif
++
++#ifndef OPENSSL_NO_MD4
++	if (doit[D_MD4])
++		{
++		for (j=0; j<SIZE_NUM; j++)
++			{
++			print_message(names[D_MD4],c[D_MD4][j],lengths[j]);
++			Time_F(START);
++			for (count=0,run=1; COND(c[D_MD4][j]); count++)
++				EVP_Digest(&(buf[0]),(unsigned long)lengths[j],&(md4[0]),NULL,EVP_md4(),NULL);
++			d=Time_F(STOP);
++			print_result(D_MD4,j,count,d);
++			}
++		}
++#endif
++
++#ifndef OPENSSL_NO_MD5
++	if (doit[D_MD5])
++		{
++		for (j=0; j<SIZE_NUM; j++)
++			{
++			print_message(names[D_MD5],c[D_MD5][j],lengths[j]);
++			Time_F(START);
++			for (count=0,run=1; COND(c[D_MD5][j]); count++)
++				EVP_Digest(&(buf[0]),(unsigned long)lengths[j],&(md5[0]),NULL,EVP_get_digestbyname("md5"),NULL);
++			d=Time_F(STOP);
++			print_result(D_MD5,j,count,d);
++			}
++		}
++#endif
++
++#if !defined(OPENSSL_NO_MD5) && !defined(OPENSSL_NO_HMAC)
++	if (doit[D_HMAC])
++		{
++		HMAC_CTX hctx;
++
++		HMAC_CTX_init(&hctx);
++		HMAC_Init_ex(&hctx,(unsigned char *)"This is a key...",
++			16,EVP_md5(), NULL);
++
++		for (j=0; j<SIZE_NUM; j++)
++			{
++			print_message(names[D_HMAC],c[D_HMAC][j],lengths[j]);
++			Time_F(START);
++			for (count=0,run=1; COND(c[D_HMAC][j]); count++)
++				{
++				HMAC_Init_ex(&hctx,NULL,0,NULL,NULL);
++				HMAC_Update(&hctx,buf,lengths[j]);
++				HMAC_Final(&hctx,&(hmac[0]),NULL);
++				}
++			d=Time_F(STOP);
++			print_result(D_HMAC,j,count,d);
++			}
++		HMAC_CTX_cleanup(&hctx);
++		}
++#endif
++#ifndef OPENSSL_NO_SHA
++	if (doit[D_SHA1])
++		{
++		for (j=0; j<SIZE_NUM; j++)
++			{
++			print_message(names[D_SHA1],c[D_SHA1][j],lengths[j]);
++			Time_F(START);
++			for (count=0,run=1; COND(c[D_SHA1][j]); count++)
++				EVP_Digest(buf,(unsigned long)lengths[j],&(sha[0]),NULL,EVP_sha1(),NULL);
++			d=Time_F(STOP);
++			print_result(D_SHA1,j,count,d);
++			}
++		}
++
++#ifndef OPENSSL_NO_SHA256
++	if (doit[D_SHA256])
++		{
++		for (j=0; j<SIZE_NUM; j++)
++			{
++			print_message(names[D_SHA256],c[D_SHA256][j],lengths[j]);
++			Time_F(START);
++			for (count=0,run=1; COND(c[D_SHA256][j]); count++)
++				SHA256(buf,lengths[j],sha256);
++			d=Time_F(STOP);
++			print_result(D_SHA256,j,count,d);
++			}
++		}
++#endif
++
++#ifndef OPENSSL_NO_SHA512
++	if (doit[D_SHA512])
++		{
++		for (j=0; j<SIZE_NUM; j++)
++			{
++			print_message(names[D_SHA512],c[D_SHA512][j],lengths[j]);
++			Time_F(START);
++			for (count=0,run=1; COND(c[D_SHA512][j]); count++)
++				SHA512(buf,lengths[j],sha512);
++			d=Time_F(STOP);
++			print_result(D_SHA512,j,count,d);
++			}
++		}
++#endif
++
++#endif
++#ifndef OPENSSL_NO_RIPEMD
++	if (doit[D_RMD160])
++		{
++		for (j=0; j<SIZE_NUM; j++)
++			{
++			print_message(names[D_RMD160],c[D_RMD160][j],lengths[j]);
++			Time_F(START);
++			for (count=0,run=1; COND(c[D_RMD160][j]); count++)
++				EVP_Digest(buf,(unsigned long)lengths[j],&(rmd160[0]),NULL,EVP_ripemd160(),NULL);
++			d=Time_F(STOP);
++			print_result(D_RMD160,j,count,d);
++			}
++		}
++#endif
++#ifndef OPENSSL_NO_RC4
++	if (doit[D_RC4])
++		{
++		for (j=0; j<SIZE_NUM; j++)
++			{
++			print_message(names[D_RC4],c[D_RC4][j],lengths[j]);
++			Time_F(START);
++			for (count=0,run=1; COND(c[D_RC4][j]); count++)
++				RC4(&rc4_ks,(unsigned int)lengths[j],
++					buf,buf);
++			d=Time_F(STOP);
++			print_result(D_RC4,j,count,d);
++			}
++		}
++#endif
++#ifndef OPENSSL_NO_DES
++	if (doit[D_CBC_DES])
++		{
++		for (j=0; j<SIZE_NUM; j++)
++			{
++			print_message(names[D_CBC_DES],c[D_CBC_DES][j],lengths[j]);
++			Time_F(START);
++			for (count=0,run=1; COND(c[D_CBC_DES][j]); count++)
++				DES_ncbc_encrypt(buf,buf,lengths[j],&sch,
++						 &DES_iv,DES_ENCRYPT);
++			d=Time_F(STOP);
++			print_result(D_CBC_DES,j,count,d);
++			}
++		}
++
++	if (doit[D_EDE3_DES])
++		{
++		for (j=0; j<SIZE_NUM; j++)
++			{
++			print_message(names[D_EDE3_DES],c[D_EDE3_DES][j],lengths[j]);
++			Time_F(START);
++			for (count=0,run=1; COND(c[D_EDE3_DES][j]); count++)
++				DES_ede3_cbc_encrypt(buf,buf,lengths[j],
++						     &sch,&sch2,&sch3,
++						     &DES_iv,DES_ENCRYPT);
++			d=Time_F(STOP);
++			print_result(D_EDE3_DES,j,count,d);
++			}
++		}
++#endif
++#ifndef OPENSSL_NO_AES
++	if (doit[D_CBC_128_AES])
++		{
++		for (j=0; j<SIZE_NUM; j++)
++			{
++			print_message(names[D_CBC_128_AES],c[D_CBC_128_AES][j],lengths[j]);
++			Time_F(START);
++			for (count=0,run=1; COND(c[D_CBC_128_AES][j]); count++)
++				AES_cbc_encrypt(buf,buf,
++					(unsigned long)lengths[j],&aes_ks1,
++					iv,AES_ENCRYPT);
++			d=Time_F(STOP);
++			print_result(D_CBC_128_AES,j,count,d);
++			}
++		}
++	if (doit[D_CBC_192_AES])
++		{
++		for (j=0; j<SIZE_NUM; j++)
++			{
++			print_message(names[D_CBC_192_AES],c[D_CBC_192_AES][j],lengths[j]);
++			Time_F(START);
++			for (count=0,run=1; COND(c[D_CBC_192_AES][j]); count++)
++				AES_cbc_encrypt(buf,buf,
++					(unsigned long)lengths[j],&aes_ks2,
++					iv,AES_ENCRYPT);
++			d=Time_F(STOP);
++			print_result(D_CBC_192_AES,j,count,d);
++			}
++		}
++	if (doit[D_CBC_256_AES])
++		{
++		for (j=0; j<SIZE_NUM; j++)
++			{
++			print_message(names[D_CBC_256_AES],c[D_CBC_256_AES][j],lengths[j]);
++			Time_F(START);
++			for (count=0,run=1; COND(c[D_CBC_256_AES][j]); count++)
++				AES_cbc_encrypt(buf,buf,
++					(unsigned long)lengths[j],&aes_ks3,
++					iv,AES_ENCRYPT);
++			d=Time_F(STOP);
++			print_result(D_CBC_256_AES,j,count,d);
++			}
++		}
++
++	if (doit[D_IGE_128_AES])
++		{
++		for (j=0; j<SIZE_NUM; j++)
++			{
++			print_message(names[D_IGE_128_AES],c[D_IGE_128_AES][j],lengths[j]);
++			Time_F(START);
++			for (count=0,run=1; COND(c[D_IGE_128_AES][j]); count++)
++				AES_ige_encrypt(buf,buf2,
++					(unsigned long)lengths[j],&aes_ks1,
++					iv,AES_ENCRYPT);
++			d=Time_F(STOP);
++			print_result(D_IGE_128_AES,j,count,d);
++			}
++		}
++	if (doit[D_IGE_192_AES])
++		{
++		for (j=0; j<SIZE_NUM; j++)
++			{
++			print_message(names[D_IGE_192_AES],c[D_IGE_192_AES][j],lengths[j]);
++			Time_F(START);
++			for (count=0,run=1; COND(c[D_IGE_192_AES][j]); count++)
++				AES_ige_encrypt(buf,buf2,
++					(unsigned long)lengths[j],&aes_ks2,
++					iv,AES_ENCRYPT);
++			d=Time_F(STOP);
++			print_result(D_IGE_192_AES,j,count,d);
++			}
++		}
++	if (doit[D_IGE_256_AES])
++		{
++		for (j=0; j<SIZE_NUM; j++)
++			{
++			print_message(names[D_IGE_256_AES],c[D_IGE_256_AES][j],lengths[j]);
++			Time_F(START);
++			for (count=0,run=1; COND(c[D_IGE_256_AES][j]); count++)
++				AES_ige_encrypt(buf,buf2,
++					(unsigned long)lengths[j],&aes_ks3,
++					iv,AES_ENCRYPT);
++			d=Time_F(STOP);
++			print_result(D_IGE_256_AES,j,count,d);
++			}
++		}
++#endif
++#ifndef OPENSSL_NO_CAMELLIA
++	if (doit[D_CBC_128_CML])
++		{
++		for (j=0; j<SIZE_NUM; j++)
++			{
++			print_message(names[D_CBC_128_CML],c[D_CBC_128_CML][j],lengths[j]);
++			Time_F(START);
++			for (count=0,run=1; COND(c[D_CBC_128_CML][j]); count++)
++				Camellia_cbc_encrypt(buf,buf,
++				        (unsigned long)lengths[j],&camellia_ks1,
++				        iv,CAMELLIA_ENCRYPT);
++			d=Time_F(STOP);
++			print_result(D_CBC_128_CML,j,count,d);
++			}
++		}
++	if (doit[D_CBC_192_CML])
++		{
++		for (j=0; j<SIZE_NUM; j++)
++			{
++			print_message(names[D_CBC_192_CML],c[D_CBC_192_CML][j],lengths[j]);
++			Time_F(START);
++			for (count=0,run=1; COND(c[D_CBC_192_CML][j]); count++)
++				Camellia_cbc_encrypt(buf,buf,
++				        (unsigned long)lengths[j],&camellia_ks2,
++				        iv,CAMELLIA_ENCRYPT);
++			d=Time_F(STOP);
++			print_result(D_CBC_192_CML,j,count,d);
++			}
++		}
++	if (doit[D_CBC_256_CML])
++		{
++		for (j=0; j<SIZE_NUM; j++)
++			{
++			print_message(names[D_CBC_256_CML],c[D_CBC_256_CML][j],lengths[j]);
++			Time_F(START);
++			for (count=0,run=1; COND(c[D_CBC_256_CML][j]); count++)
++				Camellia_cbc_encrypt(buf,buf,
++				        (unsigned long)lengths[j],&camellia_ks3,
++				        iv,CAMELLIA_ENCRYPT);
++			d=Time_F(STOP);
++			print_result(D_CBC_256_CML,j,count,d);
++			}
++		}
++
++#endif
++#ifndef OPENSSL_NO_IDEA
++	if (doit[D_CBC_IDEA])
++		{
++		for (j=0; j<SIZE_NUM; j++)
++			{
++			print_message(names[D_CBC_IDEA],c[D_CBC_IDEA][j],lengths[j]);
++			Time_F(START);
++			for (count=0,run=1; COND(c[D_CBC_IDEA][j]); count++)
++				idea_cbc_encrypt(buf,buf,
++					(unsigned long)lengths[j],&idea_ks,
++					iv,IDEA_ENCRYPT);
++			d=Time_F(STOP);
++			print_result(D_CBC_IDEA,j,count,d);
++			}
++		}
++#endif
++#ifndef OPENSSL_NO_SEED
++	if (doit[D_CBC_SEED])
++		{
++		for (j=0; j<SIZE_NUM; j++)
++			{
++			print_message(names[D_CBC_SEED],c[D_CBC_SEED][j],lengths[j]);
++			Time_F(START);
++			for (count=0,run=1; COND(c[D_CBC_SEED][j]); count++)
++				SEED_cbc_encrypt(buf,buf,
++					(unsigned long)lengths[j],&seed_ks,iv,1);
++			d=Time_F(STOP);
++			print_result(D_CBC_SEED,j,count,d);
++			}
++		}
++#endif
++#ifndef OPENSSL_NO_RC2
++	if (doit[D_CBC_RC2])
++		{
++		for (j=0; j<SIZE_NUM; j++)
++			{
++			print_message(names[D_CBC_RC2],c[D_CBC_RC2][j],lengths[j]);
++			Time_F(START);
++			for (count=0,run=1; COND(c[D_CBC_RC2][j]); count++)
++				RC2_cbc_encrypt(buf,buf,
++					(unsigned long)lengths[j],&rc2_ks,
++					iv,RC2_ENCRYPT);
++			d=Time_F(STOP);
++			print_result(D_CBC_RC2,j,count,d);
++			}
++		}
++#endif
++#ifndef OPENSSL_NO_RC5
++	if (doit[D_CBC_RC5])
++		{
++		for (j=0; j<SIZE_NUM; j++)
++			{
++			print_message(names[D_CBC_RC5],c[D_CBC_RC5][j],lengths[j]);
++			Time_F(START);
++			for (count=0,run=1; COND(c[D_CBC_RC5][j]); count++)
++				RC5_32_cbc_encrypt(buf,buf,
++					(unsigned long)lengths[j],&rc5_ks,
++					iv,RC5_ENCRYPT);
++			d=Time_F(STOP);
++			print_result(D_CBC_RC5,j,count,d);
++			}
++		}
++#endif
++#ifndef OPENSSL_NO_BF
++	if (doit[D_CBC_BF])
++		{
++		for (j=0; j<SIZE_NUM; j++)
++			{
++			print_message(names[D_CBC_BF],c[D_CBC_BF][j],lengths[j]);
++			Time_F(START);
++			for (count=0,run=1; COND(c[D_CBC_BF][j]); count++)
++				BF_cbc_encrypt(buf,buf,
++					(unsigned long)lengths[j],&bf_ks,
++					iv,BF_ENCRYPT);
++			d=Time_F(STOP);
++			print_result(D_CBC_BF,j,count,d);
++			}
++		}
++#endif
++#ifndef OPENSSL_NO_CAST
++	if (doit[D_CBC_CAST])
++		{
++		for (j=0; j<SIZE_NUM; j++)
++			{
++			print_message(names[D_CBC_CAST],c[D_CBC_CAST][j],lengths[j]);
++			Time_F(START);
++			for (count=0,run=1; COND(c[D_CBC_CAST][j]); count++)
++				CAST_cbc_encrypt(buf,buf,
++					(unsigned long)lengths[j],&cast_ks,
++					iv,CAST_ENCRYPT);
++			d=Time_F(STOP);
++			print_result(D_CBC_CAST,j,count,d);
++			}
++		}
++#endif
++
++	if (doit[D_EVP])
++		{
++		for (j=0; j<SIZE_NUM; j++)
++			{
++			if (evp_cipher)
++				{
++				EVP_CIPHER_CTX ctx;
++				int outl;
++
++				names[D_EVP]=OBJ_nid2ln(evp_cipher->nid);
++				/* -O3 -fschedule-insns messes up an
++				 * optimization here!  names[D_EVP]
++				 * somehow becomes NULL */
++				print_message(names[D_EVP],save_count,
++					lengths[j]);
++
++				EVP_CIPHER_CTX_init(&ctx);
++				if(decrypt)
++					EVP_DecryptInit_ex(&ctx,evp_cipher,NULL,key16,iv);
++				else
++					EVP_EncryptInit_ex(&ctx,evp_cipher,NULL,key16,iv);
++				EVP_CIPHER_CTX_set_padding(&ctx, 0);
++
++				Time_F(START);
++				if(decrypt)
++					for (count=0,run=1; COND(save_count*4*lengths[0]/lengths[j]); count++)
++						EVP_DecryptUpdate(&ctx,buf,&outl,buf,lengths[j]);
++				else
++					for (count=0,run=1; COND(save_count*4*lengths[0]/lengths[j]); count++)
++						EVP_EncryptUpdate(&ctx,buf,&outl,buf,lengths[j]);
++				if(decrypt)
++					EVP_DecryptFinal_ex(&ctx,buf,&outl);
++				else
++					EVP_EncryptFinal_ex(&ctx,buf,&outl);
++				d=Time_F(STOP);
++				EVP_CIPHER_CTX_cleanup(&ctx);
++				}
++			if (evp_md)
++				{
++				names[D_EVP]=OBJ_nid2ln(evp_md->type);
++				print_message(names[D_EVP],save_count,
++					lengths[j]);
++
++				Time_F(START);
++				for (count=0,run=1; COND(save_count*4*lengths[0]/lengths[j]); count++)
++					EVP_Digest(buf,lengths[j],&(md[0]),NULL,evp_md,NULL);
++
++				d=Time_F(STOP);
++				}
++			print_result(D_EVP,j,count,d);
++			}
++		}
++
++	RAND_pseudo_bytes(buf,36);
++#ifndef OPENSSL_NO_RSA
++	for (j=0; j<RSA_NUM; j++)
++		{
++		int ret;
++		if (!rsa_doit[j]) continue;
++		ret=RSA_sign(NID_md5_sha1, buf,36, buf2, &rsa_num, rsa_key[j]);
++		if (ret == 0)
++			{
++			BIO_printf(bio_err,"RSA sign failure.  No RSA sign will be done.\n");
++			ERR_print_errors(bio_err);
++			rsa_count=1;
++			}
++		else
++			{
++			pkey_print_message("private","rsa",
++				rsa_c[j][0],rsa_bits[j],
++				RSA_SECONDS);
++/*			RSA_blinding_on(rsa_key[j],NULL); */
++			Time_F(START);
++			for (count=0,run=1; COND(rsa_c[j][0]); count++)
++				{
++				ret=RSA_sign(NID_md5_sha1, buf,36, buf2,
++					&rsa_num, rsa_key[j]);
++				if (ret == 0)
++					{
++					BIO_printf(bio_err,
++						"RSA sign failure\n");
++					ERR_print_errors(bio_err);
++					count=1;
++					break;
++					}
++				}
++			d=Time_F(STOP);
++			BIO_printf(bio_err,mr ? "+R1:%ld:%d:%.2f\n"
++				   : "%ld %d bit private RSA's in %.2fs\n",
++				   count,rsa_bits[j],d);
++			rsa_results[j][0]=d/(double)count;
++			rsa_count=count;
++			}
++
++#if 1
++		ret=RSA_verify(NID_md5_sha1, buf,36, buf2, rsa_num, rsa_key[j]);
++		if (ret <= 0)
++			{
++			BIO_printf(bio_err,"RSA verify failure.  No RSA verify will be done.\n");
++			ERR_print_errors(bio_err);
++			rsa_doit[j] = 0;
++			}
++		else
++			{
++			pkey_print_message("public","rsa",
++				rsa_c[j][1],rsa_bits[j],
++				RSA_SECONDS);
++			Time_F(START);
++			for (count=0,run=1; COND(rsa_c[j][1]); count++)
++				{
++				ret=RSA_verify(NID_md5_sha1, buf,36, buf2,
++					rsa_num, rsa_key[j]);
++				if (ret <= 0)
++					{
++					BIO_printf(bio_err,
++						"RSA verify failure\n");
++					ERR_print_errors(bio_err);
++					count=1;
++					break;
++					}
++				}
++			d=Time_F(STOP);
++			BIO_printf(bio_err,mr ? "+R2:%ld:%d:%.2f\n"
++				   : "%ld %d bit public RSA's in %.2fs\n",
++				   count,rsa_bits[j],d);
++			rsa_results[j][1]=d/(double)count;
++			}
++#endif
++
++		if (rsa_count <= 1)
++			{
++			/* if longer than 10s, don't do any more */
++			for (j++; j<RSA_NUM; j++)
++				rsa_doit[j]=0;
++			}
++		}
++#endif
++
++	RAND_pseudo_bytes(buf,20);
++#ifndef OPENSSL_NO_DSA
++	if (RAND_status() != 1)
++		{
++		RAND_seed(rnd_seed, sizeof rnd_seed);
++		rnd_fake = 1;
++		}
++	for (j=0; j<DSA_NUM; j++)
++		{
++		unsigned int kk;
++		int ret;
++
++		if (!dsa_doit[j]) continue;
++/*		DSA_generate_key(dsa_key[j]); */
++/*		DSA_sign_setup(dsa_key[j],NULL); */
++		ret=DSA_sign(EVP_PKEY_DSA,buf,20,buf2,
++			&kk,dsa_key[j]);
++		if (ret == 0)
++			{
++			BIO_printf(bio_err,"DSA sign failure.  No DSA sign will be done.\n");
++			ERR_print_errors(bio_err);
++			rsa_count=1;
++			}
++		else
++			{
++			pkey_print_message("sign","dsa",
++				dsa_c[j][0],dsa_bits[j],
++				DSA_SECONDS);
++			Time_F(START);
++			for (count=0,run=1; COND(dsa_c[j][0]); count++)
++				{
++				ret=DSA_sign(EVP_PKEY_DSA,buf,20,buf2,
++					&kk,dsa_key[j]);
++				if (ret == 0)
++					{
++					BIO_printf(bio_err,
++						"DSA sign failure\n");
++					ERR_print_errors(bio_err);
++					count=1;
++					break;
++					}
++				}
++			d=Time_F(STOP);
++			BIO_printf(bio_err,mr ? "+R3:%ld:%d:%.2f\n"
++				   : "%ld %d bit DSA signs in %.2fs\n",
++				   count,dsa_bits[j],d);
++			dsa_results[j][0]=d/(double)count;
++			rsa_count=count;
++			}
++
++		ret=DSA_verify(EVP_PKEY_DSA,buf,20,buf2,
++			kk,dsa_key[j]);
++		if (ret <= 0)
++			{
++			BIO_printf(bio_err,"DSA verify failure.  No DSA verify will be done.\n");
++			ERR_print_errors(bio_err);
++			dsa_doit[j] = 0;
++			}
++		else
++			{
++			pkey_print_message("verify","dsa",
++				dsa_c[j][1],dsa_bits[j],
++				DSA_SECONDS);
++			Time_F(START);
++			for (count=0,run=1; COND(dsa_c[j][1]); count++)
++				{
++				ret=DSA_verify(EVP_PKEY_DSA,buf,20,buf2,
++					kk,dsa_key[j]);
++				if (ret <= 0)
++					{
++					BIO_printf(bio_err,
++						"DSA verify failure\n");
++					ERR_print_errors(bio_err);
++					count=1;
++					break;
++					}
++				}
++			d=Time_F(STOP);
++			BIO_printf(bio_err,mr ? "+R4:%ld:%d:%.2f\n"
++				   : "%ld %d bit DSA verify in %.2fs\n",
++				   count,dsa_bits[j],d);
++			dsa_results[j][1]=d/(double)count;
++			}
++
++		if (rsa_count <= 1)
++			{
++			/* if longer than 10s, don't do any more */
++			for (j++; j<DSA_NUM; j++)
++				dsa_doit[j]=0;
++			}
++		}
++	if (rnd_fake) RAND_cleanup();
++#endif
++
++#ifndef OPENSSL_NO_ECDSA
++	if (RAND_status() != 1) 
++		{
++		RAND_seed(rnd_seed, sizeof rnd_seed);
++		rnd_fake = 1;
++		}
++	for (j=0; j<EC_NUM; j++) 
++		{
++		int ret;
++
++		if (!ecdsa_doit[j]) continue; /* Ignore Curve */ 
++		ecdsa[j] = EC_KEY_new_by_curve_name(test_curves[j]);
++		if (ecdsa[j] == NULL) 
++			{
++			BIO_printf(bio_err,"ECDSA failure.\n");
++			ERR_print_errors(bio_err);
++			rsa_count=1;
++			} 
++		else 
++			{
++#if 1
++			EC_KEY_precompute_mult(ecdsa[j], NULL);
++#endif
++			/* Perform ECDSA signature test */
++			EC_KEY_generate_key(ecdsa[j]);
++			ret = ECDSA_sign(0, buf, 20, ecdsasig, 
++				&ecdsasiglen, ecdsa[j]);
++			if (ret == 0) 
++				{
++				BIO_printf(bio_err,"ECDSA sign failure.  No ECDSA sign will be done.\n");
++				ERR_print_errors(bio_err);
++				rsa_count=1;
++				} 
++			else 
++				{
++				pkey_print_message("sign","ecdsa",
++					ecdsa_c[j][0], 
++					test_curves_bits[j],
++					ECDSA_SECONDS);
++
++				Time_F(START);
++				for (count=0,run=1; COND(ecdsa_c[j][0]);
++					count++) 
++					{
++					ret=ECDSA_sign(0, buf, 20, 
++						ecdsasig, &ecdsasiglen,
++						ecdsa[j]);
++					if (ret == 0) 
++						{
++						BIO_printf(bio_err, "ECDSA sign failure\n");
++						ERR_print_errors(bio_err);
++						count=1;
++						break;
++						}
++					}
++				d=Time_F(STOP);
++
++				BIO_printf(bio_err, mr ? "+R5:%ld:%d:%.2f\n" :
++					"%ld %d bit ECDSA signs in %.2fs \n", 
++					count, test_curves_bits[j], d);
++				ecdsa_results[j][0]=d/(double)count;
++				rsa_count=count;
++				}
++
++			/* Perform ECDSA verification test */
++			ret=ECDSA_verify(0, buf, 20, ecdsasig, 
++				ecdsasiglen, ecdsa[j]);
++			if (ret != 1) 
++				{
++				BIO_printf(bio_err,"ECDSA verify failure.  No ECDSA verify will be done.\n");
++				ERR_print_errors(bio_err);
++				ecdsa_doit[j] = 0;
++				} 
++			else 
++				{
++				pkey_print_message("verify","ecdsa",
++				ecdsa_c[j][1],
++				test_curves_bits[j],
++				ECDSA_SECONDS);
++				Time_F(START);
++				for (count=0,run=1; COND(ecdsa_c[j][1]); count++) 
++					{
++					ret=ECDSA_verify(0, buf, 20, ecdsasig, ecdsasiglen, ecdsa[j]);
++					if (ret != 1) 
++						{
++						BIO_printf(bio_err, "ECDSA verify failure\n");
++						ERR_print_errors(bio_err);
++						count=1;
++						break;
++						}
++					}
++				d=Time_F(STOP);
++				BIO_printf(bio_err, mr? "+R6:%ld:%d:%.2f\n"
++						: "%ld %d bit ECDSA verify in %.2fs\n",
++				count, test_curves_bits[j], d);
++				ecdsa_results[j][1]=d/(double)count;
++				}
++
++			if (rsa_count <= 1) 
++				{
++				/* if longer than 10s, don't do any more */
++				for (j++; j<EC_NUM; j++)
++				ecdsa_doit[j]=0;
++				}
++			}
++		}
++	if (rnd_fake) RAND_cleanup();
++#endif
++
++#ifndef OPENSSL_NO_ECDH
++	if (RAND_status() != 1)
++		{
++		RAND_seed(rnd_seed, sizeof rnd_seed);
++		rnd_fake = 1;
++		}
++	for (j=0; j<EC_NUM; j++)
++		{
++		if (!ecdh_doit[j]) continue;
++		ecdh_a[j] = EC_KEY_new_by_curve_name(test_curves[j]);
++		ecdh_b[j] = EC_KEY_new_by_curve_name(test_curves[j]);
++		if ((ecdh_a[j] == NULL) || (ecdh_b[j] == NULL))
++			{
++			BIO_printf(bio_err,"ECDH failure.\n");
++			ERR_print_errors(bio_err);
++			rsa_count=1;
++			}
++		else
++			{
++			/* generate two ECDH key pairs */
++			if (!EC_KEY_generate_key(ecdh_a[j]) ||
++				!EC_KEY_generate_key(ecdh_b[j]))
++				{
++				BIO_printf(bio_err,"ECDH key generation failure.\n");
++				ERR_print_errors(bio_err);
++				rsa_count=1;		
++				}
++			else
++				{
++				/* If field size is not more than 24 octets, then use SHA-1 hash of result;
++				 * otherwise, use result (see section 4.8 of draft-ietf-tls-ecc-03.txt).
++				 */
++				int field_size, outlen;
++				void *(*kdf)(const void *in, size_t inlen, void *out, size_t *xoutlen);
++				field_size = EC_GROUP_get_degree(EC_KEY_get0_group(ecdh_a[j]));
++				if (field_size <= 24 * 8)
++					{
++					outlen = KDF1_SHA1_len;
++					kdf = KDF1_SHA1;
++					}
++				else
++					{
++					outlen = (field_size+7)/8;
++					kdf = NULL;
++					}
++				secret_size_a = ECDH_compute_key(secret_a, outlen,
++					EC_KEY_get0_public_key(ecdh_b[j]),
++					ecdh_a[j], kdf);
++				secret_size_b = ECDH_compute_key(secret_b, outlen,
++					EC_KEY_get0_public_key(ecdh_a[j]),
++					ecdh_b[j], kdf);
++				if (secret_size_a != secret_size_b) 
++					ecdh_checks = 0;
++				else
++					ecdh_checks = 1;
++
++				for (secret_idx = 0; 
++				    (secret_idx < secret_size_a)
++					&& (ecdh_checks == 1);
++				    secret_idx++)
++					{
++					if (secret_a[secret_idx] != secret_b[secret_idx])
++					ecdh_checks = 0;
++					}
++
++				if (ecdh_checks == 0)
++					{
++					BIO_printf(bio_err,"ECDH computations don't match.\n");
++					ERR_print_errors(bio_err);
++					rsa_count=1;		
++					}
++
++				pkey_print_message("","ecdh",
++				ecdh_c[j][0], 
++				test_curves_bits[j],
++				ECDH_SECONDS);
++				Time_F(START);
++				for (count=0,run=1; COND(ecdh_c[j][0]); count++)
++					{
++					ECDH_compute_key(secret_a, outlen,
++					EC_KEY_get0_public_key(ecdh_b[j]),
++					ecdh_a[j], kdf);
++					}
++				d=Time_F(STOP);
++				BIO_printf(bio_err, mr ? "+R7:%ld:%d:%.2f\n" :"%ld %d-bit ECDH ops in %.2fs\n",
++				count, test_curves_bits[j], d);
++				ecdh_results[j][0]=d/(double)count;
++				rsa_count=count;
++				}
++			}
++
++
++		if (rsa_count <= 1)
++			{
++			/* if longer than 10s, don't do any more */
++			for (j++; j<EC_NUM; j++)
++			ecdh_doit[j]=0;
++			}
++		}
++	if (rnd_fake) RAND_cleanup();
++#endif
++#ifdef HAVE_FORK
++show_res:
++#endif
++	if(!mr)
++		{
++		fprintf(stdout,"%s\n",SSLeay_version(SSLEAY_VERSION));
++        fprintf(stdout,"%s\n",SSLeay_version(SSLEAY_BUILT_ON));
++		printf("options:");
++		printf("%s ",BN_options());
++#ifndef OPENSSL_NO_MD2
++		printf("%s ",MD2_options());
++#endif
++#ifndef OPENSSL_NO_RC4
++		printf("%s ",RC4_options());
++#endif
++#ifndef OPENSSL_NO_DES
++		printf("%s ",DES_options());
++#endif
++#ifndef OPENSSL_NO_AES
++		printf("%s ",AES_options());
++#endif
++#ifndef OPENSSL_NO_IDEA
++		printf("%s ",idea_options());
++#endif
++#ifndef OPENSSL_NO_BF
++		printf("%s ",BF_options());
++#endif
++		fprintf(stdout,"\n%s\n",SSLeay_version(SSLEAY_CFLAGS));
++		printf("available timing options: ");
++#ifdef TIMES
++		printf("TIMES ");
++#endif
++#ifdef TIMEB
++		printf("TIMEB ");
++#endif
++#ifdef USE_TOD
++		printf("USE_TOD ");
++#endif
++#ifdef HZ
++#define as_string(s) (#s)
++		{
++		double dbl = HZ;
++		printf("HZ=%g", dbl);
++		}
++# ifdef _SC_CLK_TCK
++		printf(" [sysconf value]");
++# endif
++#endif
++		printf("\n");
++		printf("timing function used: %s%s%s%s%s%s%s\n",
++		       (ftime_used ? "ftime" : ""),
++		       (ftime_used + times_used > 1 ? "," : ""),
++		       (times_used ? "times" : ""),
++		       (ftime_used + times_used + gettimeofday_used > 1 ? "," : ""),
++		       (gettimeofday_used ? "gettimeofday" : ""),
++		       (ftime_used + times_used + gettimeofday_used + getrusage_used > 1 ? "," : ""),
++		       (getrusage_used ? "getrusage" : ""));
++		}
++
++	if (pr_header)
++		{
++		if(mr)
++			fprintf(stdout,"+H");
++		else
++			{
++			fprintf(stdout,"The 'numbers' are in 1000s of bytes per second processed.\n"); 
++			fprintf(stdout,"type        ");
++			}
++		for (j=0;  j<SIZE_NUM; j++)
++			fprintf(stdout,mr ? ":%d" : "%7d bytes",lengths[j]);
++		fprintf(stdout,"\n");
++		}
++
++	for (k=0; k<ALGOR_NUM; k++)
++		{
++		if (!doit[k]) continue;
++		if(mr)
++			fprintf(stdout,"+F:%d:%s",k,names[k]);
++		else
++			fprintf(stdout,"%-13s",names[k]);
++		for (j=0; j<SIZE_NUM; j++)
++			{
++			if (results[k][j] > 10000 && !mr)
++				fprintf(stdout," %11.2fk",results[k][j]/1e3);
++			else
++				fprintf(stdout,mr ? ":%.2f" : " %11.2f ",results[k][j]);
++			}
++		fprintf(stdout,"\n");
++		}
++#ifndef OPENSSL_NO_RSA
++	j=1;
++	for (k=0; k<RSA_NUM; k++)
++		{
++		if (!rsa_doit[k]) continue;
++		if (j && !mr)
++			{
++			printf("%18ssign    verify    sign/s verify/s\n"," ");
++			j=0;
++			}
++		if(mr)
++			fprintf(stdout,"+F2:%u:%u:%f:%f\n",
++				k,rsa_bits[k],rsa_results[k][0],
++				rsa_results[k][1]);
++		else
++			fprintf(stdout,"rsa %4u bits %8.6fs %8.6fs %8.1f %8.1f\n",
++				rsa_bits[k],rsa_results[k][0],rsa_results[k][1],
++				1.0/rsa_results[k][0],1.0/rsa_results[k][1]);
++		}
++#endif
++#ifndef OPENSSL_NO_DSA
++	j=1;
++	for (k=0; k<DSA_NUM; k++)
++		{
++		if (!dsa_doit[k]) continue;
++		if (j && !mr)
++			{
++			printf("%18ssign    verify    sign/s verify/s\n"," ");
++			j=0;
++			}
++		if(mr)
++			fprintf(stdout,"+F3:%u:%u:%f:%f\n",
++				k,dsa_bits[k],dsa_results[k][0],dsa_results[k][1]);
++		else
++			fprintf(stdout,"dsa %4u bits %8.6fs %8.6fs %8.1f %8.1f\n",
++				dsa_bits[k],dsa_results[k][0],dsa_results[k][1],
++				1.0/dsa_results[k][0],1.0/dsa_results[k][1]);
++		}
++#endif
++#ifndef OPENSSL_NO_ECDSA
++	j=1;
++	for (k=0; k<EC_NUM; k++)
++		{
++		if (!ecdsa_doit[k]) continue;
++		if (j && !mr)
++			{
++			printf("%30ssign    verify    sign/s verify/s\n"," ");
++			j=0;
++			}
++
++		if (mr)
++			fprintf(stdout,"+F4:%u:%u:%f:%f\n", 
++				k, test_curves_bits[k],
++				ecdsa_results[k][0],ecdsa_results[k][1]);
++		else
++			fprintf(stdout,
++				"%4u bit ecdsa (%s) %8.4fs %8.4fs %8.1f %8.1f\n", 
++				test_curves_bits[k],
++				test_curves_names[k],
++				ecdsa_results[k][0],ecdsa_results[k][1], 
++				1.0/ecdsa_results[k][0],1.0/ecdsa_results[k][1]);
++		}
++#endif
++
++
++#ifndef OPENSSL_NO_ECDH
++	j=1;
++	for (k=0; k<EC_NUM; k++)
++		{
++		if (!ecdh_doit[k]) continue;
++		if (j && !mr)
++			{
++			printf("%30sop      op/s\n"," ");
++			j=0;
++			}
++		if (mr)
++			fprintf(stdout,"+F5:%u:%u:%f:%f\n",
++				k, test_curves_bits[k],
++				ecdh_results[k][0], 1.0/ecdh_results[k][0]);
++
++		else
++			fprintf(stdout,"%4u bit ecdh (%s) %8.4fs %8.1f\n",
++				test_curves_bits[k],
++				test_curves_names[k],
++				ecdh_results[k][0], 1.0/ecdh_results[k][0]);
++		}
++#endif
++
++	mret=0;
++
++end:
++	ERR_print_errors(bio_err);
++	if (buf != NULL) OPENSSL_free(buf);
++	if (buf2 != NULL) OPENSSL_free(buf2);
++#ifndef OPENSSL_NO_RSA
++	for (i=0; i<RSA_NUM; i++)
++		if (rsa_key[i] != NULL)
++			RSA_free(rsa_key[i]);
++#endif
++#ifndef OPENSSL_NO_DSA
++	for (i=0; i<DSA_NUM; i++)
++		if (dsa_key[i] != NULL)
++			DSA_free(dsa_key[i]);
++#endif
++
++#ifndef OPENSSL_NO_ECDSA
++	for (i=0; i<EC_NUM; i++)
++		if (ecdsa[i] != NULL)
++			EC_KEY_free(ecdsa[i]);
++#endif
++#ifndef OPENSSL_NO_ECDH
++	for (i=0; i<EC_NUM; i++)
++	{
++		if (ecdh_a[i] != NULL)
++			EC_KEY_free(ecdh_a[i]);
++		if (ecdh_b[i] != NULL)
++			EC_KEY_free(ecdh_b[i]);
++	}
++#endif
++
++	apps_shutdown();
++	OPENSSL_EXIT(mret);
++	}
++
++static void print_message(const char *s, long num, int length)
++	{
++#ifdef SIGALRM
++	BIO_printf(bio_err,mr ? "+DT:%s:%d:%d\n"
++		   : "Doing %s for %ds on %d size blocks: ",s,SECONDS,length);
++	(void)BIO_flush(bio_err);
++	alarm(SECONDS);
++#else
++	BIO_printf(bio_err,mr ? "+DN:%s:%ld:%d\n"
++		   : "Doing %s %ld times on %d size blocks: ",s,num,length);
++	(void)BIO_flush(bio_err);
++#endif
++#ifdef LINT
++	num=num;
++#endif
++	}
++
++static void pkey_print_message(const char *str, const char *str2, long num,
++	int bits, int tm)
++	{
++#ifdef SIGALRM
++	BIO_printf(bio_err,mr ? "+DTP:%d:%s:%s:%d\n"
++			   : "Doing %d bit %s %s's for %ds: ",bits,str,str2,tm);
++	(void)BIO_flush(bio_err);
++	alarm(RSA_SECONDS);
++#else
++	BIO_printf(bio_err,mr ? "+DNP:%ld:%d:%s:%s\n"
++			   : "Doing %ld %d bit %s %s's: ",num,bits,str,str2);
++	(void)BIO_flush(bio_err);
++#endif
++#ifdef LINT
++	num=num;
++#endif
++	}
++
++static void print_result(int alg,int run_no,int count,double time_used)
++	{
++	BIO_printf(bio_err,mr ? "+R:%d:%s:%f\n"
++		   : "%d %s's in %.2fs\n",count,names[alg],time_used);
++	results[alg][run_no]=((double)count)/time_used*lengths[run_no];
++	}
++
++#ifdef HAVE_FORK
++static char *sstrsep(char **string, const char *delim)
++    {
++    char isdelim[256];
++    char *token = *string;
++
++    if (**string == 0)
++        return NULL;
++
++    memset(isdelim, 0, sizeof isdelim);
++    isdelim[0] = 1;
++
++    while (*delim)
++        {
++        isdelim[(unsigned char)(*delim)] = 1;
++        delim++;
++        }
++
++    while (!isdelim[(unsigned char)(**string)])
++        {
++        (*string)++;
++        }
++
++    if (**string)
++        {
++        **string = 0;
++        (*string)++;
++        }
++
++    return token;
++    }
++
++static int do_multi(int multi)
++	{
++	int n;
++	int fd[2];
++	int *fds;
++	static char sep[]=":";
++
++	fds=malloc(multi*sizeof *fds);
++	for(n=0 ; n < multi ; ++n)
++		{
++		pipe(fd);
++		fflush(stdout);
++		fflush(stderr);
++		if(fork())
++			{
++			close(fd[1]);
++			fds[n]=fd[0];
++			}
++		else
++			{
++			close(fd[0]);
++			close(1);
++			dup(fd[1]);
++			close(fd[1]);
++			mr=1;
++			usertime=0;
++			return 0;
++			}
++		printf("Forked child %d\n",n);
++		}
++
++	/* for now, assume the pipe is long enough to take all the output */
++	for(n=0 ; n < multi ; ++n)
++		{
++		FILE *f;
++		char buf[1024];
++		char *p;
++
++		f=fdopen(fds[n],"r");
++		while(fgets(buf,sizeof buf,f))
++			{
++			p=strchr(buf,'\n');
++			if(p)
++				*p='\0';
++			if(buf[0] != '+')
++				{
++				fprintf(stderr,"Don't understand line '%s' from child %d\n",
++						buf,n);
++				continue;
++				}
++			printf("Got: %s from %d\n",buf,n);
++			if(!strncmp(buf,"+F:",3))
++				{
++				int alg;
++				int j;
++
++				p=buf+3;
++				alg=atoi(sstrsep(&p,sep));
++				sstrsep(&p,sep);
++				for(j=0 ; j < SIZE_NUM ; ++j)
++					results[alg][j]+=atof(sstrsep(&p,sep));
++				}
++			else if(!strncmp(buf,"+F2:",4))
++				{
++				int k;
++				double d;
++				
++				p=buf+4;
++				k=atoi(sstrsep(&p,sep));
++				sstrsep(&p,sep);
++
++				d=atof(sstrsep(&p,sep));
++				if(n)
++					rsa_results[k][0]=1/(1/rsa_results[k][0]+1/d);
++				else
++					rsa_results[k][0]=d;
++
++				d=atof(sstrsep(&p,sep));
++				if(n)
++					rsa_results[k][1]=1/(1/rsa_results[k][1]+1/d);
++				else
++					rsa_results[k][1]=d;
++				}
++			else if(!strncmp(buf,"+F2:",4))
++				{
++				int k;
++				double d;
++				
++				p=buf+4;
++				k=atoi(sstrsep(&p,sep));
++				sstrsep(&p,sep);
++
++				d=atof(sstrsep(&p,sep));
++				if(n)
++					rsa_results[k][0]=1/(1/rsa_results[k][0]+1/d);
++				else
++					rsa_results[k][0]=d;
++
++				d=atof(sstrsep(&p,sep));
++				if(n)
++					rsa_results[k][1]=1/(1/rsa_results[k][1]+1/d);
++				else
++					rsa_results[k][1]=d;
++				}
++			else if(!strncmp(buf,"+F3:",4))
++				{
++				int k;
++				double d;
++				
++				p=buf+4;
++				k=atoi(sstrsep(&p,sep));
++				sstrsep(&p,sep);
++
++				d=atof(sstrsep(&p,sep));
++				if(n)
++					dsa_results[k][0]=1/(1/dsa_results[k][0]+1/d);
++				else
++					dsa_results[k][0]=d;
++
++				d=atof(sstrsep(&p,sep));
++				if(n)
++					dsa_results[k][1]=1/(1/dsa_results[k][1]+1/d);
++				else
++					dsa_results[k][1]=d;
++				}
++#ifndef OPENSSL_NO_ECDSA
++			else if(!strncmp(buf,"+F4:",4))
++				{
++				int k;
++				double d;
++				
++				p=buf+4;
++				k=atoi(sstrsep(&p,sep));
++				sstrsep(&p,sep);
++
++				d=atof(sstrsep(&p,sep));
++				if(n)
++					ecdsa_results[k][0]=1/(1/ecdsa_results[k][0]+1/d);
++				else
++					ecdsa_results[k][0]=d;
++
++				d=atof(sstrsep(&p,sep));
++				if(n)
++					ecdsa_results[k][1]=1/(1/ecdsa_results[k][1]+1/d);
++				else
++					ecdsa_results[k][1]=d;
++				}
++#endif 
++
++#ifndef OPENSSL_NO_ECDH
++			else if(!strncmp(buf,"+F5:",4))
++				{
++				int k;
++				double d;
++				
++				p=buf+4;
++				k=atoi(sstrsep(&p,sep));
++				sstrsep(&p,sep);
++
++				d=atof(sstrsep(&p,sep));
++				if(n)
++					ecdh_results[k][0]=1/(1/ecdh_results[k][0]+1/d);
++				else
++					ecdh_results[k][0]=d;
++
++				}
++#endif
++
++			else if(!strncmp(buf,"+H:",3))
++				{
++				}
++			else
++				fprintf(stderr,"Unknown type '%s' from child %d\n",buf,n);
++			}
++		}
++	return 1;
++	}
++#endif
++#endif
+diff -Nru openssl-0.9.8l_a/config openssl-0.9.8l_b/config
+--- openssl-0.9.8l_a/config	2009-02-16 10:43:41.000000000 +0200
++++ openssl-0.9.8l_b/config	2009-12-08 17:44:45.000000000 +0200
+@@ -48,10 +48,10 @@
+ 
+ # First get uname entries that we use below
+ 
+-MACHINE=`(uname -m) 2>/dev/null` || MACHINE="unknown"
+-RELEASE=`(uname -r) 2>/dev/null` || RELEASE="unknown"
+-SYSTEM=`(uname -s) 2>/dev/null`  || SYSTEM="unknown"
+-VERSION=`(uname -v) 2>/dev/null` || VERSION="unknown"
++[ "$MACHINE" ] || MACHINE=`(uname -m) 2>/dev/null` || MACHINE="unknown"
++[ "$RELEASE" ] || RELEASE=`(uname -r) 2>/dev/null` || RELEASE="unknown"
++[ "$SYSTEM" ]  || SYSTEM=`(uname -s) 2>/dev/null`  || SYSTEM="unknown"
++[ "$VERSION" ] || VERSION=`(uname -v) 2>/dev/null` || VERSION="unknown"
+ 
+ 
+ # Now test for ISC and SCO, since it is has a braindamaged uname.
+@@ -270,7 +270,7 @@
+ 		echo "ppc-apple-darwin${VERSION}"
+ 		;;
+ 	    *)
+-		echo "i386-apple-darwin${VERSION}"
++		echo "${MACHINE}-apple-darwin${VERSION}"
+ 		;;
+ 	esac
+ 	exit 0
+@@ -488,6 +488,9 @@
+ # script above so we end up with values in vars but that would take
+ # more time that I want to waste at the moment
+ case "$GUESSOS" in
++  uClinux*)
++    OUT=uClinux-dist
++	;;
+   mips2-sgi-irix)
+ 	CPU=`(hinv -t cpu) 2>/dev/null | head -1 | sed 's/^CPU:[^R]*R\([0-9]*\).*/\1/'`
+ 	CPU=${CPU:-0}
+diff -Nru openssl-0.9.8l_a/config.orig openssl-0.9.8l_b/config.orig
+--- openssl-0.9.8l_a/config.orig	1970-01-01 02:00:00.000000000 +0200
++++ openssl-0.9.8l_b/config.orig	2009-02-16 10:43:41.000000000 +0200
+@@ -0,0 +1,888 @@
++#!/bin/sh
++#
++# OpenSSL config: determine the operating system and run ./Configure
++#
++# "config -h" for usage information.
++#
++#          this is a merge of minarch and GuessOS from the Apache Group.
++#          Originally written by Tim Hudson <tjh@cryptsoft.com>.
++
++# Original Apache Group comments on GuessOS
++
++# Simple OS/Platform guesser. Similar to config.guess but
++# much, much smaller. Since it was developed for use with
++# Apache, it follows under Apache's regular licensing
++# with one specific addition: Any changes or additions
++# to this script should be Emailed to the Apache
++# group (apache@apache.org) in general and to
++# Jim Jagielski (jim@jaguNET.com) in specific.
++#
++# Be as similar to the output of config.guess/config.sub
++# as possible.
++
++PREFIX=""
++SUFFIX=""
++TEST="false"
++EXE=""
++
++# pick up any command line args to config
++for i
++do
++case "$i" in 
++-d) PREFIX="debug-";;
++-t*) TEST="true";;
++-h*) TEST="true"; cat <<EOF
++Usage: config [options]
++ -d	Add a debug- prefix to machine choice.
++ -t	Test mode, do not run the Configure perl script.
++ -h	This help.
++
++Any other text will be passed to the Configure perl script.
++See INSTALL for instructions.
++
++EOF
++;;
++*) options=$options" $i" ;;
++esac
++done
++
++# First get uname entries that we use below
++
++MACHINE=`(uname -m) 2>/dev/null` || MACHINE="unknown"
++RELEASE=`(uname -r) 2>/dev/null` || RELEASE="unknown"
++SYSTEM=`(uname -s) 2>/dev/null`  || SYSTEM="unknown"
++VERSION=`(uname -v) 2>/dev/null` || VERSION="unknown"
++
++
++# Now test for ISC and SCO, since it is has a braindamaged uname.
++#
++# We need to work around FreeBSD 1.1.5.1 
++(
++XREL=`uname -X 2>/dev/null | grep "^Release" | awk '{print $3}'`
++if [ "x$XREL" != "x" ]; then
++    if [ -f /etc/kconfig ]; then
++	case "$XREL" in
++	    4.0|4.1)
++		    echo "${MACHINE}-whatever-isc4"; exit 0
++		;;
++	esac
++    else
++	case "$XREL" in
++	    3.2v4.2)
++		echo "whatever-whatever-sco3"; exit 0
++		;;
++	    3.2v5.0*)
++		echo "whatever-whatever-sco5"; exit 0
++		;;
++	    4.2MP)
++		case "x${VERSION}" in
++		    x2.0*) echo "whatever-whatever-unixware20"; exit 0 ;;
++		    x2.1*) echo "whatever-whatever-unixware21"; exit 0 ;;
++		    x2*)   echo "whatever-whatever-unixware2";  exit 0 ;;
++		esac
++		;;
++	    4.2)
++		echo "whatever-whatever-unixware1"; exit 0
++		;;
++	    5*)
++		case "x${VERSION}" in
++		    # We hardcode i586 in place of ${MACHINE} for the
++		    # following reason. The catch is that even though Pentium
++		    # is minimum requirement for platforms in question,
++		    # ${MACHINE} gets always assigned to i386. Now, problem
++		    # with i386 is that it makes ./config pass 386 to
++		    # ./Configure, which in turn makes make generate
++		    # inefficient SHA-1 (for this moment) code.
++		    x[678]*)  echo "i586-sco-unixware7"; exit 0 ;;
++		esac
++		;;
++	esac
++    fi
++fi
++# Now we simply scan though... In most cases, the SYSTEM info is enough
++#
++case "${SYSTEM}:${RELEASE}:${VERSION}:${MACHINE}" in
++    MPE/iX:*)
++	MACHINE=`echo "$MACHINE" | sed -e 's/-/_/g'`
++	echo "parisc-hp-MPE/iX"; exit 0
++	;;
++    A/UX:*)
++	echo "m68k-apple-aux3"; exit 0
++	;;
++
++    AIX:[3-9]:4:*)
++	echo "${MACHINE}-ibm-aix"; exit 0
++	;;
++
++    AIX:*:[5-9]:*)
++	echo "${MACHINE}-ibm-aix"; exit 0
++	;;
++
++    AIX:*)
++	echo "${MACHINE}-ibm-aix3"; exit 0
++	;;
++
++    dgux:*)
++	echo "${MACHINE}-dg-dgux"; exit 0
++	;;
++
++    HI-UX:*)
++	echo "${MACHINE}-hi-hiux"; exit 0
++	;;
++
++    HP-UX:*)
++	HPUXVER=`echo ${RELEASE}|sed -e 's/[^.]*.[0B]*//'`
++	case "$HPUXVER" in
++	    1[0-9].*)	# HPUX 10 and 11 targets are unified
++		echo "${MACHINE}-hp-hpux1x"; exit 0
++		;;
++	    *)
++		echo "${MACHINE}-hp-hpux"; exit 0
++		;;
++	esac
++	;;
++
++    IRIX:5.*)
++	echo "mips2-sgi-irix"; exit 0
++	;;
++
++    IRIX:6.*)
++	echo "mips3-sgi-irix"; exit 0
++	;;
++
++    IRIX64:*)
++	echo "mips4-sgi-irix64"; exit 0
++	;;
++
++    Linux:[2-9].*)
++	echo "${MACHINE}-whatever-linux2"; exit 0
++	;;
++
++    Linux:1.*)
++	echo "${MACHINE}-whatever-linux1"; exit 0
++	;;
++
++    GNU*)
++	echo "hurd-x86"; exit 0;
++	;;
++
++    LynxOS:*)
++	echo "${MACHINE}-lynx-lynxos"; exit 0
++	;;
++
++    BSD/OS:4.*)  # BSD/OS always says 386
++	echo "i486-whatever-bsdi4"; exit 0
++	;;
++
++    BSD/386:*:*:*486*|BSD/OS:*:*:*:*486*)
++        case `/sbin/sysctl -n hw.model` in
++	    Pentium*)
++                echo "i586-whatever-bsdi"; exit 0
++                ;;
++            *)
++                echo "i386-whatever-bsdi"; exit 0
++                ;;
++            esac;
++	;;
++
++    BSD/386:*|BSD/OS:*)
++	echo "${MACHINE}-whatever-bsdi"; exit 0
++	;;
++
++    FreeBSD:*:*:*386*)
++        VERS=`echo ${RELEASE} | sed -e 's/[-(].*//'`
++        MACH=`sysctl -n hw.model`
++        ARCH='whatever'
++        case ${MACH} in
++           *386*       ) MACH="i386"     ;;
++           *486*       ) MACH="i486"     ;;
++           Pentium\ II*) MACH="i686"     ;;
++           Pentium*    ) MACH="i586"     ;;
++           *           ) MACH="$MACHINE" ;;
++        esac
++        case ${MACH} in
++           i[0-9]86 ) ARCH="pc" ;;
++        esac
++        echo "${MACH}-${ARCH}-freebsd${VERS}"; exit 0
++        ;;
++
++    FreeBSD:*)
++	echo "${MACHINE}-whatever-freebsd"; exit 0
++	;;
++
++    NetBSD:*:*:*386*)
++        echo "`(/usr/sbin/sysctl -n hw.model || /sbin/sysctl -n hw.model) | sed 's,.*\(.\)86-class.*,i\186,'`-whatever-netbsd"; exit 0
++	;;
++
++    NetBSD:*)
++	echo "${MACHINE}-whatever-netbsd"; exit 0
++	;;
++
++    OpenBSD:*)
++	echo "${MACHINE}-whatever-openbsd"; exit 0
++	;;
++
++    OpenUNIX:*)
++	echo "${MACHINE}-unknown-OpenUNIX${VERSION}"; exit 0
++	;;
++
++    OSF1:*:*:*alpha*)
++	OSFMAJOR=`echo ${RELEASE}| sed -e 's/^V\([0-9]*\)\..*$/\1/'`
++	case "$OSFMAJOR" in
++	    4|5)
++		echo "${MACHINE}-dec-tru64"; exit 0
++		;;
++	    1|2|3)
++		echo "${MACHINE}-dec-osf"; exit 0
++		;;
++	    *)
++		echo "${MACHINE}-dec-osf"; exit 0
++		;;
++	esac
++	;;
++
++    QNX:*)
++	case "$RELEASE" in
++	    4*)
++		echo "${MACHINE}-whatever-qnx4"
++		;;
++	    6*)
++		echo "${MACHINE}-whatever-qnx6"
++		;;
++	    *)
++		echo "${MACHINE}-whatever-qnx"
++		;;
++	esac
++	exit 0
++	;;
++
++    Paragon*:*:*:*)
++	echo "i860-intel-osf1"; exit 0
++	;;
++
++    Rhapsody:*)
++	echo "ppc-apple-rhapsody"; exit 0
++	;;
++
++    Darwin:*)
++	case "$MACHINE" in
++	    Power*)
++		echo "ppc-apple-darwin${VERSION}"
++		;;
++	    *)
++		echo "i386-apple-darwin${VERSION}"
++		;;
++	esac
++	exit 0
++	;;
++
++    SunOS:5.*)
++	echo "${MACHINE}-whatever-solaris2"; exit 0
++	;;
++
++    SunOS:*)
++	echo "${MACHINE}-sun-sunos4"; exit 0
++	;;
++
++    UNIX_System_V:4.*:*)
++	echo "${MACHINE}-whatever-sysv4"; exit 0
++	;;
++
++    VOS:*:*:i786)
++     echo "i386-stratus-vos"; exit 0
++     ;;
++
++    VOS:*:*:*)
++     echo "hppa1.1-stratus-vos"; exit 0
++     ;;
++
++    *:4*:R4*:m88k)
++	echo "${MACHINE}-whatever-sysv4"; exit 0
++	;;
++
++    DYNIX/ptx:4*:*)
++	echo "${MACHINE}-whatever-sysv4"; exit 0
++	;;
++
++    *:4.0:3.0:3[34]?? | *:4.0:3.0:3[34]??,*)
++	echo "i486-ncr-sysv4"; exit 0
++	;;
++
++    ULTRIX:*)
++	echo "${MACHINE}-unknown-ultrix"; exit 0
++	;;
++
++    SINIX*|ReliantUNIX*)
++	echo "${MACHINE}-siemens-sysv4"; exit 0
++	;;
++
++    POSIX-BC*)
++	echo "${MACHINE}-siemens-sysv4"; exit 0   # Here, $MACHINE == "BS2000"
++	;;
++
++    machten:*)
++       echo "${MACHINE}-tenon-${SYSTEM}"; exit 0;
++       ;;
++
++    library:*)
++	echo "${MACHINE}-ncr-sysv4"; exit 0
++	;;
++
++    ConvexOS:*:11.0:*)
++	echo "${MACHINE}-v11-${SYSTEM}"; exit 0;
++	;;
++
++    NEWS-OS:4.*)
++	echo "mips-sony-newsos4"; exit 0;
++	;;
++
++    MINGW*)
++	echo "${MACHINE}-whatever-mingw"; exit 0;
++	;;
++    CYGWIN*)
++	case "$RELEASE" in
++	    [bB]*|1.0|1.[12].*)
++		echo "${MACHINE}-whatever-cygwin_pre1.3"
++		;;
++	    *)
++		echo "${MACHINE}-whatever-cygwin"
++		;;
++	esac
++	exit 0
++	;;
++
++    *"CRAY T3E")
++       echo "t3e-cray-unicosmk"; exit 0;
++       ;;
++
++    *CRAY*)
++       echo "j90-cray-unicos"; exit 0;
++       ;;
++
++    NONSTOP_KERNEL*)
++       echo "nsr-tandem-nsk"; exit 0;
++       ;;
++esac
++
++#
++# Ugg. These are all we can determine by what we know about
++# the output of uname. Be more creative:
++#
++
++# Do the Apollo stuff first. Here, we just simply assume
++# that the existance of the /usr/apollo directory is proof
++# enough
++if [ -d /usr/apollo ]; then
++    echo "whatever-apollo-whatever"
++    exit 0
++fi
++
++# Now NeXT
++ISNEXT=`hostinfo 2>/dev/null`
++case "$ISNEXT" in
++    *'NeXT Mach 3.3'*)
++	echo "whatever-next-nextstep3.3"; exit 0
++	;;
++    *NeXT*)
++	echo "whatever-next-nextstep"; exit 0
++	;;
++esac
++
++# At this point we gone through all the one's
++# we know of: Punt
++
++echo "${MACHINE}-whatever-${SYSTEM}" 
++exit 0
++) 2>/dev/null | (
++
++# ---------------------------------------------------------------------------
++# this is where the translation occurs into SSLeay terms
++# ---------------------------------------------------------------------------
++
++GCCVER=`(gcc -dumpversion) 2>/dev/null`
++if [ "$GCCVER" != "" ]; then
++  # then strip off whatever prefix egcs prepends the number with...
++  # Hopefully, this will work for any future prefixes as well.
++  GCCVER=`echo $GCCVER | LC_ALL=C sed 's/^[a-zA-Z]*\-//'`
++  # Since gcc 3.1 gcc --version behaviour has changed.  gcc -dumpversion
++  # does give us what we want though, so we use that.  We just just the
++  # major and minor version numbers.
++  # peak single digit before and after first dot, e.g. 2.95.1 gives 29
++  GCCVER=`echo $GCCVER | sed 's/\([0-9]\)\.\([0-9]\).*/\1\2/'`
++fi
++
++# Only set CC if not supplied already
++if [ -z "$CC" ]; then
++# figure out if gcc is available and if so we use it otherwise
++# we fallback to whatever cc does on the system
++  if [ "$GCCVER" != "" ]; then
++    CC=gcc
++  else
++    CC=cc
++  fi
++fi
++GCCVER=${GCCVER:-0}
++if [ "$SYSTEM" = "HP-UX" ];then
++  # By default gcc is a ILP32 compiler (with long long == 64).
++  GCC_BITS="32"
++  if [ $GCCVER -ge 30 ]; then
++    # PA64 support only came in with gcc 3.0.x.
++    # We check if the preprocessor symbol __LP64__ is defined...
++    if echo "__LP64__" | gcc -v -E -x c - 2>/dev/null | grep "^__LP64__" 2>&1 > /dev/null; then
++      : # __LP64__ has slipped through, it therefore is not defined
++    else
++      GCC_BITS="64"
++    fi
++  fi
++fi
++if [ "$SYSTEM" = "SunOS" ]; then
++  if [ $GCCVER -ge 30 ]; then
++    # 64-bit ABI isn't officially supported in gcc 3.0, but it appears
++    # to be working, at the very least 'make test' passes...
++    if gcc -v -E -x c /dev/null 2>&1 | grep __arch64__ > /dev/null; then
++      GCC_ARCH="-m64"
++    else
++      GCC_ARCH="-m32"
++    fi
++  fi
++  # check for WorkShop C, expected output is "cc: blah-blah C x.x"
++  CCVER=`(cc -V 2>&1) 2>/dev/null | \
++  	egrep -e '^cc: .* C [0-9]\.[0-9]' | \
++	sed 's/.* C \([0-9]\)\.\([0-9]\).*/\1\2/'`
++  CCVER=${CCVER:-0}
++  if [ $MACHINE != i86pc -a $CCVER -gt 40 ]; then
++    CC=cc	# overrides gcc!!!
++    if [ $CCVER -eq 50 ]; then
++      echo "WARNING! Detected WorkShop C 5.0. Do make sure you have"
++      echo "         patch #107357-01 or later applied."
++      sleep 5
++    fi
++  fi
++fi
++
++if [ "${SYSTEM}-${MACHINE}" = "Linux-alpha" ]; then
++  # check for Compaq C, expected output is "blah-blah C Vx.x"
++  CCCVER=`(ccc -V 2>&1) 2>/dev/null | \
++	egrep -e '.* C V[0-9]\.[0-9]' | \
++	sed 's/.* C V\([0-9]\)\.\([0-9]\).*/\1\2/'`
++  CCCVER=${CCCVER:-0}
++  if [ $CCCVER -gt 60 ]; then
++    CC=ccc	# overrides gcc!!! well, ccc outperforms inoticeably
++		# only on hash routines and des, otherwise gcc (2.95)
++		# keeps along rather tight...
++  fi
++fi
++
++if [ "${SYSTEM}" = "AIX" ]; then	# favor vendor cc over gcc
++    (cc) 2>&1 | grep -iv "not found" > /dev/null && CC=cc
++fi
++
++CCVER=${CCVER:-0}
++
++# read the output of the embedded GuessOS 
++read GUESSOS
++
++echo Operating system: $GUESSOS
++
++# now map the output into SSLeay terms ... really should hack into the
++# script above so we end up with values in vars but that would take
++# more time that I want to waste at the moment
++case "$GUESSOS" in
++  mips2-sgi-irix)
++	CPU=`(hinv -t cpu) 2>/dev/null | head -1 | sed 's/^CPU:[^R]*R\([0-9]*\).*/\1/'`
++	CPU=${CPU:-0}
++	if [ $CPU -ge 4000 ]; then
++		options="$options -mips2"
++	fi
++	OUT="irix-$CC"
++	;;
++  mips3-sgi-irix)
++	#CPU=`(hinv -t cpu) 2>/dev/null | head -1 | sed 's/^CPU:[^R]*R\([0-9]*\).*/\1/'`
++	#CPU=${CPU:-0}
++	#if [ $CPU -ge 5000 ]; then
++	#	options="$options -mips4"
++	#else
++	#	options="$options -mips3"
++	#fi
++	OUT="irix-mips3-$CC"
++	;;
++  mips4-sgi-irix64)
++	echo "WARNING! If you wish to build 64-bit library, then you have to"
++	echo "         invoke './Configure irix64-mips4-$CC' *manually*."
++	if [ "$TEST" = "false" -a -t 1 ]; then
++	  echo "         You have about 5 seconds to press Ctrl-C to abort."
++	  (trap "stty `stty -g`" 2 0; stty -icanon min 0 time 50; read waste) <&1
++	fi
++        #CPU=`(hinv -t cpu) 2>/dev/null | head -1 | sed 's/^CPU:[^R]*R\([0-9]*\).*/\1/'`
++        #CPU=${CPU:-0}
++        #if [ $CPU -ge 5000 ]; then
++        #        options="$options -mips4"
++        #else
++        #        options="$options -mips3"
++        #fi
++	OUT="irix-mips3-$CC"
++	;;
++  ppc-apple-rhapsody) OUT="rhapsody-ppc-cc" ;;
++  ppc-apple-darwin*) OUT="darwin-ppc-cc" ;;
++  i386-apple-darwin*) OUT="darwin-i386-cc" ;;
++  alpha-*-linux2)
++        ISA=`awk '/cpu model/{print$4;exit(0);}' /proc/cpuinfo`
++	case ${ISA:-generic} in
++	*[678])	OUT="linux-alpha+bwx-$CC" ;;
++	*)	OUT="linux-alpha-$CC" ;;
++	esac
++	if [ "$CC" = "gcc" ]; then
++	    case ${ISA:-generic} in
++	    EV5|EV45)		options="$options -mcpu=ev5";;
++	    EV56|PCA56)		options="$options -mcpu=ev56";;
++	    *)			options="$options -mcpu=ev6";;
++	    esac
++	fi
++	;;
++  ppc64-*-linux2)
++	echo "WARNING! If you wish to build 64-bit library, then you have to"
++	echo "         invoke './Configure linux-ppc64' *manually*."
++	if [ "$TEST" = "false" -a -t 1 ]; then
++	    echo "         You have about 5 seconds to press Ctrl-C to abort."
++	    (trap "stty `stty -g`" 2 0; stty -icanon min 0 time 50; read waste) <&1
++	fi
++	OUT="linux-ppc"
++	;;
++  ppc-*-linux2) OUT="linux-ppc" ;;
++  ia64-*-linux?) OUT="linux-ia64" ;;
++  sparc64-*-linux2)
++	echo "WARNING! If you *know* that your GNU C supports 64-bit/V9 ABI"
++	echo "         and wish to build 64-bit library, then you have to"
++	echo "         invoke './Configure linux64-sparcv9' *manually*."
++	if [ "$TEST" = "false" -a -t 1 ]; then
++	  echo "          You have about 5 seconds to press Ctrl-C to abort."
++	  (trap "stty `stty -g`" 2 0; stty -icanon min 0 time 50; read waste) <&1
++	fi
++	OUT="linux-sparcv9" ;;
++  sparc-*-linux2)
++	KARCH=`awk '/^type/{print$3;exit(0);}' /proc/cpuinfo`
++	case ${KARCH:-sun4} in
++	sun4u*)	OUT="linux-sparcv9" ;;
++	sun4m)	OUT="linux-sparcv8" ;;
++	sun4d)	OUT="linux-sparcv8" ;;
++	*)	OUT="linux-generic32"; options="$options -DB_ENDIAN" ;;
++	esac ;;
++  parisc*-*-linux2)
++	# 64-bit builds under parisc64 linux are not supported and
++	# compiler is expected to generate 32-bit objects...
++	CPUARCH=`awk '/cpu family/{print substr($5,1,3); exit(0);}' /proc/cpuinfo`
++	CPUSCHEDULE=`awk '/^cpu.[ 	]*: PA/{print substr($3,3); exit(0);}' /proc/cpuinfo`
++
++	# ??TODO ??  Model transformations
++	# 0. CPU Architecture for the 1.1 processor has letter suffixes. We strip that off
++	#    assuming no further arch. identification will ever be used by GCC.
++	# 1. I'm most concerned about whether is a 7300LC is closer to a 7100 versus a 7100LC.
++	# 2. The variant 64-bit processors cause concern should GCC support explicit schedulers
++	#    for these chips in the future.
++	#         PA7300LC -> 7100LC (1.1)
++	#         PA8200   -> 8000   (2.0)
++	#         PA8500   -> 8000   (2.0)
++	#         PA8600   -> 8000   (2.0)
++
++	CPUSCHEDULE=`echo $CPUSCHEDULE|sed -e 's/7300LC/7100LC/' -e 's/8.00/8000/'`
++	# Finish Model transformations
++
++	options="$options -DB_ENDIAN -mschedule=$CPUSCHEDULE -march=$CPUARCH"
++	OUT="linux-generic32" ;;
++  arm*b-*-linux2) OUT="linux-generic32"; options="$options -DB_ENDIAN" ;;
++  arm*l-*-linux2) OUT="linux-generic32"; options="$options -DL_ENDIAN" ;;
++  sh*b-*-linux2) OUT="linux-generic32"; options="$options -DB_ENDIAN" ;;
++  sh*-*-linux2)  OUT="linux-generic32"; options="$options -DL_ENDIAN" ;;
++  m68k*-*-linux2) OUT="linux-generic32"; options="$options -DB_ENDIAN" ;;
++  s390-*-linux2) OUT="linux-generic32"; options="$options -DB_ENDIAN -DNO_ASM" ;;
++  s390x-*-linux2) OUT="linux-generic64"; options="$options -DB_ENDIAN" ;;
++  x86_64-*-linux?) OUT="linux-x86_64" ;;
++  *86-*-linux2) OUT="linux-elf"
++	if [ "$GCCVER" -gt 28 ]; then
++          if grep '^model.*Pentium' /proc/cpuinfo >/dev/null ; then
++	    options="$options -march=pentium"
++          fi
++          if grep '^model.*Pentium Pro' /proc/cpuinfo >/dev/null ; then
++	    options="$options -march=pentiumpro"
++          fi
++          if grep '^model.*K6' /proc/cpuinfo >/dev/null ; then
++	    options="$options -march=k6"
++          fi
++        fi ;;
++  *-*-linux1) OUT="linux-aout" ;;
++  *-*-linux2) OUT="linux-generic32" ;;
++  sun4[uv]*-*-solaris2)
++	OUT="solaris-sparcv9-$CC"
++	ISA64=`(isalist) 2>/dev/null | grep sparcv9`
++	if [ "$ISA64" != "" ]; then
++	    if [ "$CC" = "cc" -a $CCVER -ge 50 ]; then
++		echo "WARNING! If you wish to build 64-bit library, then you have to"
++		echo "         invoke './Configure solaris64-sparcv9-cc' *manually*."
++		if [ "$TEST" = "false" -a -t 1 ]; then
++		  echo "         You have about 5 seconds to press Ctrl-C to abort."
++		  (trap "stty `stty -g`" 2 0; stty -icanon min 0 time 50; read waste) <&1
++		fi
++	    elif [ "$CC" = "gcc" -a "$GCC_ARCH" = "-m64" ]; then
++		# $GCC_ARCH denotes default ABI chosen by compiler driver
++		# (first one found on the $PATH). I assume that user
++		# expects certain consistency with the rest of his builds
++		# and therefore switch over to 64-bit. <appro>
++		OUT="solaris64-sparcv9-gcc"
++		echo "WARNING! If you wish to build 32-bit library, then you have to"
++		echo "         invoke './Configure solaris-sparcv9-gcc' *manually*."
++		if [ "$TEST" = "false" -a -t 1 ]; then
++		  echo "         You have about 5 seconds to press Ctrl-C to abort."
++		  (trap "stty `stty -g`" 2 0; stty -icanon min 0 time 50; read waste) <&1
++		fi
++	    elif [ "$GCC_ARCH" = "-m32" ]; then
++		echo "NOTICE! If you *know* that your GNU C supports 64-bit/V9 ABI"
++		echo "        and wish to build 64-bit library, then you have to"
++		echo "        invoke './Configure solaris64-sparcv9-gcc' *manually*."
++		if [ "$TEST" = "false" -a -t 1 ]; then
++		  echo "         You have about 5 seconds to press Ctrl-C to abort."
++		  (trap "stty `stty -g`" 2 0; stty -icanon min 0 time 50; read waste) <&1
++		fi
++	    fi
++	fi
++	;;
++  sun4m-*-solaris2)	OUT="solaris-sparcv8-$CC" ;;
++  sun4d-*-solaris2)	OUT="solaris-sparcv8-$CC" ;;
++  sun4*-*-solaris2)	OUT="solaris-sparcv7-$CC" ;;
++  *86*-*-solaris2)
++	ISA64=`(isalist) 2>/dev/null | grep amd64`
++	if [ "$ISA64" != "" ]; then
++	    OUT="solaris64-x86_64-$CC"
++	else
++	    OUT="solaris-x86-$CC"
++	    if [ `uname -r | sed -e 's/5\.//'` -lt 10 ]; then
++		options="$options no-sse2"
++	    fi
++	fi
++	;;
++  *-*-sunos4)		OUT="sunos-$CC" ;;
++
++  *86*-*-bsdi4)		OUT="BSD-x86-elf"; options="$options no-sse2 -ldl" ;;
++  alpha*-*-*bsd*)	OUT="BSD-generic64"; options="$options -DL_ENDIAN" ;;
++  powerpc64-*-*bsd*)	OUT="BSD-generic64"; options="$options -DB_ENDIAN" ;;
++  sparc64-*-*bsd*)	OUT="BSD-sparc64" ;;
++  ia64-*-*bsd*)		OUT="BSD-ia64" ;;
++  amd64-*-*bsd*)	OUT="BSD-x86_64" ;;
++  *86*-*-*bsd*)		# mimic ld behaviour when it's looking for libc...
++			if [ -L /usr/lib/libc.so ]; then	# [Free|Net]BSD
++			    libc=/usr/lib/libc.so
++			else					# OpenBSD
++			    # ld searches for highest libc.so.* and so do we
++			    libc=`(ls /usr/lib/libc.so.* | tail -1) 2>/dev/null`
++			fi
++			case "`(file -L $libc) 2>/dev/null`" in
++			*ELF*)	OUT="BSD-x86-elf" ;;
++			*)	OUT="BSD-x86"; options="$options no-sse2" ;;
++			esac ;;
++  *-*-*bsd*)		OUT="BSD-generic32" ;;
++
++  *-*-osf)		OUT="osf1-alpha-cc" ;;
++  *-*-tru64)		OUT="tru64-alpha-cc" ;;
++  *-*-[Uu]nix[Ww]are7)
++	if [ "$CC" = "gcc" ]; then
++	  OUT="unixware-7-gcc" ; options="$options no-sse2"
++	else    
++	  OUT="unixware-7" ; options="$options no-sse2 -D__i386__"
++	fi
++	;;
++  *-*-[Uu]nix[Ww]are20*) OUT="unixware-2.0"; options="$options no-sse2 no-sha512" ;;
++  *-*-[Uu]nix[Ww]are21*) OUT="unixware-2.1"; options="$options no-sse2 no-sha512" ;;
++  *-*-vos)
++	options="$options no-threads no-shared no-asm no-dso"
++	EXE=".pm"
++	OUT="vos-$CC" ;;
++  BS2000-siemens-sysv4) OUT="BS2000-OSD" ;;
++  RM*-siemens-sysv4) OUT="ReliantUNIX" ;;
++  *-siemens-sysv4) OUT="SINIX" ;;
++  *-hpux1*)
++	if [ $CC = "gcc" -a $GCC_BITS = "64" ]; then
++	    OUT="hpux64-parisc2-gcc"
++	fi
++	KERNEL_BITS=`(getconf KERNEL_BITS) 2>/dev/null`
++	KERNEL_BITS=${KERNEL_BITS:-32}
++	CPU_VERSION=`(getconf CPU_VERSION) 2>/dev/null`
++	CPU_VERSION=${CPU_VERSION:-0}
++	# See <sys/unistd.h> for further info on CPU_VERSION.
++	if   [ $CPU_VERSION -ge 768 ]; then	# IA-64 CPU
++	     echo "WARNING! 64-bit ABI is the default configured ABI on HP-UXi."
++	     echo "         If you wish to build 32-bit library, the you have to"
++	     echo "         invoke './Configure hpux-ia64-cc' *manually*."
++	     if [ "$TEST" = "false" -a -t 1 ]; then
++		echo "         You have about 5 seconds to press Ctrl-C to abort."
++		(trap "stty `stty -g`" 2 0; stty -icanon min 0 time 50; read waste) <&1
++	     fi
++	     OUT="hpux64-ia64-cc"
++	elif [ $CPU_VERSION -ge 532 ]; then	# PA-RISC 2.x CPU
++	     OUT=${OUT:-"hpux-parisc2-${CC}"}
++	     if [ $KERNEL_BITS -eq 64 -a "$CC" = "cc" ]; then
++		echo "WARNING! If you wish to build 64-bit library then you have to"
++		echo "         invoke './Configure hpux64-parisc2-cc' *manually*."
++		if [ "$TEST" = "false" -a -t 1 ]; then
++		  echo "         You have about 5 seconds to press Ctrl-C to abort."
++		  (trap "stty `stty -g`" 2 0; stty -icanon min 0 time 50; read waste) <&1
++		fi
++	     fi
++	elif [ $CPU_VERSION -ge 528 ]; then	# PA-RISC 1.1+ CPU
++	     OUT="hpux-parisc-${CC}"
++	elif [ $CPU_VERSION -ge 523 ]; then	# PA-RISC 1.0 CPU
++	     OUT="hpux-parisc-${CC}"
++	else					# Motorola(?) CPU
++	     OUT="hpux-$CC"
++	fi
++	options="$options -D_REENTRANT" ;;
++  *-hpux)	OUT="hpux-parisc-$CC" ;;
++  *-aix)
++	KERNEL_BITS=`(getconf KERNEL_BITMODE) 2>/dev/null`
++	KERNEL_BITS=${KERNEL_BITS:-32}
++	OBJECT_MODE=${OBJECT_MODE:-32}
++	if [ "$CC" = "gcc" ]; then
++	    OUT="aix-gcc"
++	elif [ $OBJECT_MODE -eq 64 ]; then
++	    echo 'Your $OBJECT_MODE was found to be set to 64' 
++	    OUT="aix64-cc"
++	else
++	    OUT="aix-cc"
++	    if [ $KERNEL_BITS -eq 64 ]; then
++		echo "WARNING! If you wish to build 64-bit kit, then you have to"
++		echo "         invoke './Configure aix64-cc' *manually*."
++		if [ "$TEST" = "false" -a -t 1 ]; then
++		    echo "         You have ~5 seconds to press Ctrl-C to abort."
++		    (trap "stty `stty -g`" 2 0; stty -icanon min 0 time 50; read waste) <&1
++		fi
++	    fi
++	fi
++	if (lsattr -E -O -l `lsdev -c processor|awk '{print$1;exit}'` | grep -i powerpc) >/dev/null 2>&1; then
++	    :	# this applies even to Power3 and later, as they return PowerPC_POWER[345]
++	else
++	    options="$options no-asm"
++	fi
++	;;
++  # these are all covered by the catchall below
++  # *-dgux) OUT="dgux" ;;
++  mips-sony-newsos4) OUT="newsos4-gcc" ;;
++  *-*-cygwin_pre1.3) OUT="Cygwin-pre1.3" ;;
++  *-*-cygwin) OUT="Cygwin" ;;
++  t3e-cray-unicosmk) OUT="cray-t3e" ;;
++  j90-cray-unicos) OUT="cray-j90" ;;
++  nsr-tandem-nsk) OUT="tandem-c89" ;;
++  *) OUT=`echo $GUESSOS | awk -F- '{print $3}'`;;
++esac
++
++# NB: This atalla support has been superceded by the ENGINE support
++# That contains its own header and definitions anyway. Support can
++# be enabled or disabled on any supported platform without external
++# headers, eg. by adding the "hw-atalla" switch to ./config or
++# perl Configure
++#
++# See whether we can compile Atalla support
++#if [ -f /usr/include/atasi.h ]
++#then
++#  options="$options -DATALLA"
++#fi
++
++# gcc < 2.8 does not support -march=ultrasparc
++if [ "$OUT" = solaris-sparcv9-gcc -a $GCCVER -lt 28 ]
++then
++  echo "WARNING! Falling down to 'solaris-sparcv8-gcc'."
++  echo "         Upgrade to gcc-2.8 or later."
++  sleep 5
++  OUT=solaris-sparcv8-gcc
++fi
++if [ "$OUT" = "linux-sparcv9" -a $GCCVER -lt 28 ]
++then
++  echo "WARNING! Falling down to 'linux-sparcv8'."
++  echo "         Upgrade to gcc-2.8 or later."
++  sleep 5
++  OUT=linux-sparcv8
++fi
++
++case "$GUESSOS" in
++  i386-*) options="$options 386" ;;
++esac
++
++for i in aes bf camellia cast des dh dsa ec hmac idea md2 md5 mdc2 rc2 rc4 rc5 ripemd rsa seed sha
++do
++  if [ ! -d crypto/$i ]
++  then
++    options="$options no-$i"
++  fi
++done
++
++# Discover Kerberos 5 (since it's still a prototype, we don't
++# do any guesses yet, that's why this section is commented away.
++#if [ -d /usr/kerberos ]; then
++#    krb5_dir=/usr/kerberos
++#    if [ \( -f $krb5_dir/lib/libgssapi_krb5.a -o -f $krb5_dir/lib/libgssapi_krb5.so* \)\
++#	-a \( -f $krb5_dir/lib/libkrb5.a -o -f $krb5_dir/lib/libkrb5.so* \)\
++#	-a \( -f $krb5_dir/lib/libcom_err.a -o -f $krb5_dir/lib/libcom_err.so* \)\
++#	-a \( -f $krb5_dir/lib/libk5crypto.a -o -f $krb5_dir/lib/libk5crypto.so* \)\
++#	-a \( -f $krb5_dir/include/krb5.h \) ]; then
++#	options="$options --with-krb5-flavor=MIT"
++#    fi
++#elif [ -d /usr/heimdal ]; then
++#    krb5_dir=/usr/heimdal
++#    if [ \( -f $krb5_dir/lib/libgssapi.a -o -f $krb5_dir/lib/libgssapi.so* \)\
++#	-a \( -f $krb5_dir/lib/libkrb5.a -o -f $krb5_dir/lib/libkrb5.so* \)\
++#	-a \( -f $krb5_dir/lib/libcom_err.a -o -f $krb5_dir/lib/libcom_err.so* \)\
++#	-a \( -f $krb5_dir/include/krb5.h \) ]; then
++#	options="$options --with-krb5-flavor=Heimdal"
++#    fi
++#fi
++
++if [ -z "$OUT" ]; then
++  OUT="$CC"
++fi
++
++if [ ".$PERL" = . ] ; then
++	for i in . `echo $PATH | sed 's/:/ /g'`; do
++		if [ -f "$i/perl5$EXE" ] ; then
++			PERL="$i/perl5$EXE"
++			break;
++		fi;
++	done
++fi
++
++if [ ".$PERL" = . ] ; then
++	for i in . `echo $PATH | sed 's/:/ /g'`; do
++		if [ -f "$i/perl$EXE" ] ; then
++			if "$i/perl$EXE" -e 'exit($]<5.0)'; then
++				PERL="$i/perl$EXE"
++				break;
++			fi;
++		fi;
++	done
++fi
++
++if [ ".$PERL" = . ] ; then
++	echo "You need Perl 5."
++	exit 1
++fi
++
++# run Configure to check to see if we need to specify the 
++# compiler for the platform ... in which case we add it on
++# the end ... otherwise we leave it off
++
++$PERL ./Configure LIST | grep "$OUT-$CC" > /dev/null
++if [ $? = "0" ]; then
++  OUT="$OUT-$CC"
++fi
++
++OUT="$PREFIX$OUT"
++
++$PERL ./Configure LIST | grep "$OUT" > /dev/null
++if [ $? = "0" ]; then
++  echo Configuring for $OUT
++
++  if [ "$TEST" = "true" ]; then
++    echo $PERL ./Configure $OUT $options
++  else
++    $PERL ./Configure $OUT $options
++  fi
++else
++  echo "This system ($OUT) is not supported. See file INSTALL for details."
++fi
++)
+diff -Nru openssl-0.9.8l_a/Configure openssl-0.9.8l_b/Configure
+--- openssl-0.9.8l_a/Configure	2009-11-05 14:07:06.000000000 +0200
++++ openssl-0.9.8l_b/Configure	2009-12-08 17:44:45.000000000 +0200
+@@ -36,6 +36,8 @@
+ #		(Default: KRB5_DIR/include)
+ # --with-krb5-flavor  Declare what flavor of Kerberos 5 is used.  Currently
+ #		supported values are "MIT" and "Heimdal".  A value is required.
++# --with-cryptodev Force support for cryptodev (ie., ocf-linux)
++# --with-cryptodev-digests Force support for cryptodev digests (generally slow)
+ #
+ # --test-sanity Make a number of sanity checks on the data in this file.
+ #               This is a debugging tool for OpenSSL developers.
+@@ -545,6 +547,9 @@
+ ##### Compaq Non-Stop Kernel (Tandem)
+ "tandem-c89","c89:-Ww -D__TANDEM -D_XOPEN_SOURCE -D_XOPEN_SOURCE_EXTENDED=1 -D_TANDEM_SOURCE -DB_ENDIAN::(unknown):::THIRTY_TWO_BIT:::",
+ 
++# uClinux
++"uClinux-dist","$ENV{'CC'}:\$(CFLAGS)::-D_REENTRANT::\$(LDFLAGS) \$(LDLIBS):BN_LLONG::::::::::::\$(LIBSSL_dlfcn):linux-shared:-fPIC:-shared:.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR):$ENV{'RANLIB'}",
++
+ );
+ 
+ my @MK1MF_Builds=qw(VC-WIN64I VC-WIN64A
+@@ -599,6 +604,8 @@
+ my $no_asm=0;
+ my $no_dso=0;
+ my $no_gmp=0;
++my $have_cryptodev=0;
++my $use_cryptodev_digests=0;
+ my @skip=();
+ my $Makefile="Makefile";
+ my $des_locl="crypto/des/des_locl.h";
+@@ -747,6 +754,14 @@
+ 			{
+ 			exit(&test_sanity());
+ 			}
++		elsif (/^--with-cryptodev$/)
++			{
++				$have_cryptodev = 1;
++			}
++		elsif (/^--with-cryptodev-digests$/)
++			{
++				$use_cryptodev_digests = 1;
++			}
+ 		elsif (/^reconfigure/ || /^reconf/)
+ 			{
+ 			if (open(IN,"<$Makefile"))
+@@ -1035,6 +1050,7 @@
+ 			print " OPENSSL_NO_$ALGO";
+ 		
+ 			if (/^err$/)	{ $flags .= "-DOPENSSL_NO_ERR "; }
++			elsif (/^hw$/)	{ $flags .= "-DOPENSSL_NO_HW "; }
+ 			elsif (/^asm$/)	{ $no_asm = 1; }
+ 			}
+ 		else
+@@ -1159,6 +1175,16 @@
+ 		   $withargs{"krb5-dir"} ne "";
+ 	}
+ 
++# enable the linux cryptodev (ocf-linux) support
++if ($have_cryptodev)
++	{
++	if ($use_cryptodev_digests)
++		{
++		$cflags = "-DUSE_CRYPTODEV_DIGESTS $cflags";
++		}
++	$cflags = "-DHAVE_CRYPTODEV $cflags";
++	}
++
+ # The DSO code currently always implements all functions so that no
+ # applications will have to worry about that from a compilation point
+ # of view. However, the "method"s may return zero unless that platform
+diff -Nru openssl-0.9.8l_a/Configure.rej openssl-0.9.8l_b/Configure.rej
+--- openssl-0.9.8l_a/Configure.rej	2009-11-05 14:07:06.000000000 +0200
++++ openssl-0.9.8l_b/Configure.rej	1970-01-01 02:00:00.000000000 +0200
+@@ -1,16 +0,0 @@
+-***************
+-*** 162,167 ****
+-  "debug-ben-openbsd","gcc:-DBN_DEBUG -DREF_CHECK -DCONF_DEBUG -DBN_CTX_DEBUG -DCRYPTO_MDEBUG -DPEDANTIC -DDEBUG_SAFESTACK -DOPENSSL_OPENBSD_DEV_CRYPTO -DOPENSSL_NO_ASM -O2 -pedantic -Wall -Wshadow -Werror -pipe::(unknown)::::",
+-  "debug-ben-openbsd-debug","gcc:-DBN_DEBUG -DREF_CHECK -DCONF_DEBUG -DBN_CTX_DEBUG -DCRYPTO_MDEBUG -DPEDANTIC -DDEBUG_SAFESTACK -DOPENSSL_OPENBSD_DEV_CRYPTO -DOPENSSL_NO_ASM -g3 -O2 -pedantic -Wall -Wshadow -Werror -pipe::(unknown)::::",
+-  "debug-ben-debug",	"gcc:$gcc_devteam_warn -DBN_DEBUG -DREF_CHECK -DCONF_DEBUG  -DDEBUG_SAFESTACK -g3 -O2 -pipe::(unknown)::::::",
+-  "debug-ben-strict",	"gcc:-DBN_DEBUG -DREF_CHECK -DCONF_DEBUG -DBN_CTX_DEBUG -DCRYPTO_MDEBUG -DCONST_STRICT -O2 -Wall -Wshadow -Werror -Wpointer-arith -Wcast-qual -Wwrite-strings -pipe::(unknown)::::::",
+-  "debug-rse","cc:-DTERMIOS -DL_ENDIAN -pipe -O -g -ggdb3 -Wall::(unknown):::BN_LLONG ${x86_gcc_des} ${x86_gcc_opts}:${x86_elf_asm}",
+-  "debug-bodo",	"gcc:-DL_ENDIAN -DBN_DEBUG -DREF_CHECK -DCONF_DEBUG -DBIO_PAIR_DEBUG -DPEDANTIC -g -march=i486 -pedantic -Wshadow -Wall -Wcast-align -Wstrict-prototypes -Wmissing-prototypes -Wno-long-long -Wundef -Wconversion -pipe::-D_REENTRANT:::BN_LLONG ${x86_gcc_des} ${x86_gcc_opts}:${x86_elf_asm}",
+---- 162,168 ----
+-  "debug-ben-openbsd","gcc:-DBN_DEBUG -DREF_CHECK -DCONF_DEBUG -DBN_CTX_DEBUG -DCRYPTO_MDEBUG -DPEDANTIC -DDEBUG_SAFESTACK -DOPENSSL_OPENBSD_DEV_CRYPTO -DOPENSSL_NO_ASM -O2 -pedantic -Wall -Wshadow -Werror -pipe::(unknown)::::",
+-  "debug-ben-openbsd-debug","gcc:-DBN_DEBUG -DREF_CHECK -DCONF_DEBUG -DBN_CTX_DEBUG -DCRYPTO_MDEBUG -DPEDANTIC -DDEBUG_SAFESTACK -DOPENSSL_OPENBSD_DEV_CRYPTO -DOPENSSL_NO_ASM -g3 -O2 -pedantic -Wall -Wshadow -Werror -pipe::(unknown)::::",
+-  "debug-ben-debug",	"gcc:$gcc_devteam_warn -DBN_DEBUG -DREF_CHECK -DCONF_DEBUG  -DDEBUG_SAFESTACK -g3 -O2 -pipe::(unknown)::::::",
+-+ "debug-ben-no-renegotiation",	"gcc:$gcc_devteam_warn -DBN_DEBUG -DREF_CHECK -DCONF_DEBUG  -DDEBUG_SAFESTACK -DNO_RENEGOTIATION -g3 -O2 -pipe::(unknown)::::::",
+-  "debug-ben-strict",	"gcc:-DBN_DEBUG -DREF_CHECK -DCONF_DEBUG -DBN_CTX_DEBUG -DCRYPTO_MDEBUG -DCONST_STRICT -O2 -Wall -Wshadow -Werror -Wpointer-arith -Wcast-qual -Wwrite-strings -pipe::(unknown)::::::",
+-  "debug-rse","cc:-DTERMIOS -DL_ENDIAN -pipe -O -g -ggdb3 -Wall::(unknown):::BN_LLONG ${x86_gcc_des} ${x86_gcc_opts}:${x86_elf_asm}",
+-  "debug-bodo",	"gcc:-DL_ENDIAN -DBN_DEBUG -DREF_CHECK -DCONF_DEBUG -DBIO_PAIR_DEBUG -DPEDANTIC -g -march=i486 -pedantic -Wshadow -Wall -Wcast-align -Wstrict-prototypes -Wmissing-prototypes -Wno-long-long -Wundef -Wconversion -pipe::-D_REENTRANT:::BN_LLONG ${x86_gcc_des} ${x86_gcc_opts}:${x86_elf_asm}",
+diff -Nru openssl-0.9.8l_a/crypto/cryptlib.h openssl-0.9.8l_b/crypto/cryptlib.h
+--- openssl-0.9.8l_a/crypto/cryptlib.h	2008-06-06 18:52:31.000000000 +0300
++++ openssl-0.9.8l_b/crypto/cryptlib.h	2009-12-08 17:44:45.000000000 +0200
+@@ -62,7 +62,7 @@
+ #include <stdlib.h>
+ #include <string.h>
+ 
+-#include "e_os.h"
++#include <openssl/e_os.h>
+ 
+ #ifdef OPENSSL_USE_APPLINK
+ #define BIO_FLAGS_UPLINK 0x8000
+diff -Nru openssl-0.9.8l_a/crypto/engine/eng_all.c openssl-0.9.8l_b/crypto/engine/eng_all.c
+--- openssl-0.9.8l_a/crypto/engine/eng_all.c	2008-06-04 21:01:39.000000000 +0300
++++ openssl-0.9.8l_b/crypto/engine/eng_all.c	2009-12-08 17:44:45.000000000 +0200
+@@ -104,7 +104,7 @@
+ #endif
+ #endif
+ #ifndef OPENSSL_NO_HW
+-#if defined(__OpenBSD__) || defined(__FreeBSD__)
++#if defined(__OpenBSD__) || defined(__FreeBSD__) || defined(HAVE_CRYPTODEV)
+ 	ENGINE_load_cryptodev();
+ #endif
+ #if defined(OPENSSL_SYS_WIN32) && !defined(OPENSSL_NO_CAPIENG)
+@@ -113,7 +113,7 @@
+ #endif
+ 	}
+ 
+-#if defined(__OpenBSD__) || defined(__FreeBSD__)
++#if defined(__OpenBSD__) || defined(__FreeBSD__) || defined(HAVE_CRYPTODEV)
+ void ENGINE_setup_bsd_cryptodev(void) {
+ 	static int bsd_cryptodev_default_loaded = 0;
+ 	if (!bsd_cryptodev_default_loaded) {
+diff -Nru openssl-0.9.8l_a/crypto/engine/eng_cryptodev.c openssl-0.9.8l_b/crypto/engine/eng_cryptodev.c
+--- openssl-0.9.8l_a/crypto/engine/eng_cryptodev.c	2004-06-15 14:45:42.000000000 +0300
++++ openssl-0.9.8l_b/crypto/engine/eng_cryptodev.c	2009-12-08 17:44:45.000000000 +0200
+@@ -68,6 +68,16 @@
+ struct dev_crypto_state {
+ 	struct session_op d_sess;
+ 	int d_fd;
++
++#ifdef USE_CRYPTODEV_DIGESTS
++	char dummy_mac_key[20];
++
++	unsigned char digest_res[20];
++	char *mac_data;
++	int mac_len;
++
++	int copy;
++#endif
+ };
+ 
+ static u_int32_t cryptodev_asymfeat = 0;
+@@ -75,9 +85,11 @@
+ static int get_asym_dev_crypto(void);
+ static int open_dev_crypto(void);
+ static int get_dev_crypto(void);
++#if 0
+ static int cryptodev_max_iv(int cipher);
+ static int cryptodev_key_length_valid(int cipher, int len);
+ static int cipher_nid_to_cryptodev(int nid);
++#endif
+ static int get_cryptodev_ciphers(const int **cnids);
+ static int get_cryptodev_digests(const int **cnids);
+ static int cryptodev_usable_ciphers(const int **nids);
+@@ -100,7 +112,7 @@
+ static int cryptodev_bn_mod_exp(BIGNUM *r, const BIGNUM *a,
+     const BIGNUM *p, const BIGNUM *m, BN_CTX *ctx, BN_MONT_CTX *m_ctx);
+ static int cryptodev_rsa_nocrt_mod_exp(BIGNUM *r0, const BIGNUM *I,
+-    RSA *rsa);
++    RSA *rsa, BN_CTX *ctx);
+ static int cryptodev_rsa_mod_exp(BIGNUM *r0, const BIGNUM *I, RSA *rsa, BN_CTX *ctx);
+ static int cryptodev_dsa_bn_mod_exp(DSA *dsa, BIGNUM *r, BIGNUM *a,
+     const BIGNUM *p, const BIGNUM *m, BN_CTX *ctx, BN_MONT_CTX *m_ctx);
+@@ -130,9 +142,12 @@
+ 	int	ivmax;
+ 	int	keylen;
+ } ciphers[] = {
++	{ CRYPTO_ARC4,			NID_rc4,		0,	16, },
+ 	{ CRYPTO_DES_CBC,		NID_des_cbc,		8,	 8, },
+ 	{ CRYPTO_3DES_CBC,		NID_des_ede3_cbc,	8,	24, },
+ 	{ CRYPTO_AES_CBC,		NID_aes_128_cbc,	16,	16, },
++	{ CRYPTO_AES_CBC,		NID_aes_192_cbc,	16,	24, },
++	{ CRYPTO_AES_CBC,		NID_aes_256_cbc,	16,	32, },
+ 	{ CRYPTO_BLF_CBC,		NID_bf_cbc,		8,	16, },
+ 	{ CRYPTO_CAST_CBC,		NID_cast5_cbc,		8,	16, },
+ 	{ CRYPTO_SKIPJACK_CBC,		NID_undef,		0,	 0, },
+@@ -142,14 +157,15 @@
+ static struct {
+ 	int	id;
+ 	int	nid;
++	int 	keylen;
+ } digests[] = {
+-	{ CRYPTO_SHA1_HMAC,		NID_hmacWithSHA1,	},
+-	{ CRYPTO_RIPEMD160_HMAC,	NID_ripemd160,		},
+-	{ CRYPTO_MD5_KPDK,		NID_undef,		},
+-	{ CRYPTO_SHA1_KPDK,		NID_undef,		},
+-	{ CRYPTO_MD5,			NID_md5,		},
+-	{ CRYPTO_SHA1,			NID_undef,		},
+-	{ 0,				NID_undef,		},
++	{ CRYPTO_SHA1_HMAC,		NID_hmacWithSHA1,	20},
++	{ CRYPTO_RIPEMD160_HMAC,	NID_ripemd160,		16/*?*/},
++	{ CRYPTO_MD5_KPDK,		NID_undef,		0},
++	{ CRYPTO_SHA1_KPDK,		NID_undef,		0},
++	{ CRYPTO_MD5,			NID_md5,		16},
++	{ CRYPTO_SHA1,			NID_sha1,		20},
++	{ 0,				NID_undef,		0},
+ };
+ 
+ /*
+@@ -176,10 +192,17 @@
+ static int
+ get_dev_crypto(void)
+ {
+-	int fd, retfd;
++	static int fd = -1;
++	int retfd;
+ 
+-	if ((fd = open_dev_crypto()) == -1)
+-		return (-1);
++	if (fd == -1) {
++		if ((fd = open_dev_crypto()) == -1)
++			return (-1);
++		if (fcntl(fd, F_SETFD, 1) == -1) {
++			close(fd);
++			return (-1);
++		}
++	}
+ 	if (ioctl(fd, CRIOGET, &retfd) == -1)
+ 		return (-1);
+ 
+@@ -202,6 +225,7 @@
+ 	return fd;
+ }
+ 
++#if 0
+ /*
+  * XXXX this needs to be set for each alg - and determined from
+  * a running card.
+@@ -245,6 +269,7 @@
+ 			return (ciphers[i].id);
+ 	return (0);
+ }
++#endif
+ 
+ /*
+  * Find out what ciphers /dev/crypto will let us have a session for.
+@@ -264,7 +289,7 @@
+ 		return (0);
+ 	}
+ 	memset(&sess, 0, sizeof(sess));
+-	sess.key = (caddr_t)"123456781234567812345678";
++	sess.key = (caddr_t)"123456789abcdefghijklmno";
+ 
+ 	for (i = 0; ciphers[i].id && count < CRYPTO_ALGORITHM_MAX; i++) {
+ 		if (ciphers[i].nid == NID_undef)
+@@ -303,10 +328,12 @@
+ 		return (0);
+ 	}
+ 	memset(&sess, 0, sizeof(sess));
++	sess.mackey = (caddr_t)"123456789abcdefghijklmno";
+ 	for (i = 0; digests[i].id && count < CRYPTO_ALGORITHM_MAX; i++) {
+ 		if (digests[i].nid == NID_undef)
+ 			continue;
+ 		sess.mac = digests[i].id;
++		sess.mackeylen = digests[i].keylen;
+ 		sess.cipher = 0;
+ 		if (ioctl(fd, CIOCGSESSION, &sess) != -1 &&
+ 		    ioctl(fd, CIOCFSESSION, &sess.ses) != -1)
+@@ -351,6 +378,9 @@
+ static int
+ cryptodev_usable_digests(const int **nids)
+ {
++#ifdef USE_CRYPTODEV_DIGESTS
++	return (get_cryptodev_digests(nids));
++#else
+ 	/*
+ 	 * XXXX just disable all digests for now, because it sucks.
+ 	 * we need a better way to decide this - i.e. I may not
+@@ -365,6 +395,7 @@
+ 	 */
+ 	*nids = NULL;
+ 	return (0);
++#endif
+ }
+ 
+ static int
+@@ -427,16 +458,20 @@
+ {
+ 	struct dev_crypto_state *state = ctx->cipher_data;
+ 	struct session_op *sess = &state->d_sess;
+-	int cipher;
++	int cipher, i;
+ 
+-	if ((cipher = cipher_nid_to_cryptodev(ctx->cipher->nid)) == NID_undef)
+-		return (0);
+-
+-	if (ctx->cipher->iv_len > cryptodev_max_iv(cipher))
+-		return (0);
++	for (i = 0; ciphers[i].id; i++)
++		if (ctx->cipher->nid == ciphers[i].nid &&
++		    ctx->cipher->iv_len <= ciphers[i].ivmax &&
++		    ctx->key_len == ciphers[i].keylen) {
++			cipher = ciphers[i].id;
++			break;
++		}
+ 
+-	if (!cryptodev_key_length_valid(cipher, ctx->key_len))
++	if (!ciphers[i].id) {
++		state->d_fd = -1;
+ 		return (0);
++	}
+ 
+ 	memset(sess, 0, sizeof(struct session_op));
+ 
+@@ -496,6 +531,20 @@
+  * gets called when libcrypto requests a cipher NID.
+  */
+ 
++/* RC4 */
++const EVP_CIPHER cryptodev_rc4 = {
++	NID_rc4,
++	1, 16, 0,
++	EVP_CIPH_VARIABLE_LENGTH,
++	cryptodev_init_key,
++	cryptodev_cipher,
++	cryptodev_cleanup,
++	sizeof(struct dev_crypto_state),
++	NULL,
++	NULL,
++	NULL
++};
++
+ /* DES CBC EVP */
+ const EVP_CIPHER cryptodev_des_cbc = {
+ 	NID_des_cbc,
+@@ -563,6 +612,32 @@
+ 	NULL
+ };
+ 
++const EVP_CIPHER cryptodev_aes_192_cbc = {
++	NID_aes_192_cbc,
++	16, 24, 16,
++	EVP_CIPH_CBC_MODE,
++	cryptodev_init_key,
++	cryptodev_cipher,
++	cryptodev_cleanup,
++	sizeof(struct dev_crypto_state),
++	EVP_CIPHER_set_asn1_iv,
++	EVP_CIPHER_get_asn1_iv,
++	NULL
++};
++
++const EVP_CIPHER cryptodev_aes_256_cbc = {
++	NID_aes_256_cbc,
++	16, 32, 16,
++	EVP_CIPH_CBC_MODE,
++	cryptodev_init_key,
++	cryptodev_cipher,
++	cryptodev_cleanup,
++	sizeof(struct dev_crypto_state),
++	EVP_CIPHER_set_asn1_iv,
++	EVP_CIPHER_get_asn1_iv,
++	NULL
++};
++
+ /*
+  * Registered by the ENGINE when used to find out how to deal with
+  * a particular NID in the ENGINE. this says what we'll do at the
+@@ -576,6 +651,9 @@
+ 		return (cryptodev_usable_ciphers(nids));
+ 
+ 	switch (nid) {
++	case NID_rc4:
++		*cipher = &cryptodev_rc4;
++		break;
+ 	case NID_des_ede3_cbc:
+ 		*cipher = &cryptodev_3des_cbc;
+ 		break;
+@@ -591,6 +669,12 @@
+ 	case NID_aes_128_cbc:
+ 		*cipher = &cryptodev_aes_cbc;
+ 		break;
++	case NID_aes_192_cbc:
++		*cipher = &cryptodev_aes_192_cbc;
++		break;
++	case NID_aes_256_cbc:
++		*cipher = &cryptodev_aes_256_cbc;
++		break;
+ 	default:
+ 		*cipher = NULL;
+ 		break;
+@@ -598,6 +682,234 @@
+ 	return (*cipher != NULL);
+ }
+ 
++
++#ifdef USE_CRYPTODEV_DIGESTS
++
++/* convert digest type to cryptodev */
++static int
++digest_nid_to_cryptodev(int nid)
++{
++	int i;
++
++	for (i = 0; digests[i].id; i++)
++		if (digests[i].nid == nid)
++			return (digests[i].id);
++	return (0);
++}
++
++
++static int
++digest_key_length(int nid)
++{
++	int i;
++
++	for (i = 0; digests[i].id; i++)
++		if (digests[i].nid == nid)
++			return digests[i].keylen;
++	return (0);
++}
++
++
++static int cryptodev_digest_init(EVP_MD_CTX *ctx)
++{
++	struct dev_crypto_state *state = ctx->md_data;
++	struct session_op *sess = &state->d_sess;
++	int digest;
++
++	if ((digest = digest_nid_to_cryptodev(ctx->digest->type)) == NID_undef){
++		printf("cryptodev_digest_init: Can't get digest \n");
++		return (0);
++	}
++
++	memset(state, 0, sizeof(struct dev_crypto_state));
++
++	if ((state->d_fd = get_dev_crypto()) < 0) {
++		printf("cryptodev_digest_init: Can't get Dev \n");
++		return (0);
++	}
++
++	sess->mackey = state->dummy_mac_key;
++	sess->mackeylen = digest_key_length(ctx->digest->type);
++	sess->mac = digest;
++
++	if (ioctl(state->d_fd, CIOCGSESSION, sess) < 0) {
++		close(state->d_fd);
++		state->d_fd = -1;
++		printf("cryptodev_digest_init: Open session failed\n");
++		return (0);
++	}
++
++	return (1);
++}
++
++static int cryptodev_digest_update(EVP_MD_CTX *ctx, const void *data,
++		size_t count)
++{
++	struct crypt_op cryp;
++	struct dev_crypto_state *state = ctx->md_data;
++	struct session_op *sess = &state->d_sess;
++
++	if (!data || state->d_fd < 0) {
++		printf("cryptodev_digest_update: illegal inputs \n");
++		return (0);
++	}
++
++	if (!count) {
++		return (0);
++	}
++
++	if (!(ctx->flags & EVP_MD_CTX_FLAG_ONESHOT)) {
++		/* if application doesn't support one buffer */
++		state->mac_data = OPENSSL_realloc(state->mac_data, state->mac_len + count);
++
++		if (!state->mac_data) {
++			printf("cryptodev_digest_update: realloc failed\n");
++			return (0);
++		}
++
++		memcpy(state->mac_data + state->mac_len, data, count);
++   		state->mac_len += count;
++	
++		return (1);
++	}
++
++	memset(&cryp, 0, sizeof(cryp));
++
++	cryp.ses = sess->ses;
++	cryp.flags = 0;
++	cryp.len = count;
++	cryp.src = (caddr_t) data;
++	cryp.dst = NULL;
++	cryp.mac = state->digest_res;
++	if (ioctl(state->d_fd, CIOCCRYPT, &cryp) < 0) {
++		printf("cryptodev_digest_update: digest failed\n");
++		return (0);
++	}
++	return (1);
++}
++
++
++static int cryptodev_digest_final(EVP_MD_CTX *ctx, unsigned char *md)
++{
++	struct crypt_op cryp;
++	struct dev_crypto_state *state = ctx->md_data;
++	struct session_op *sess = &state->d_sess;
++
++	int ret = 1;
++
++	if (!md || state->d_fd < 0) {
++		printf("cryptodev_digest_final: illegal input\n");
++		return(0);
++	}
++
++	if (! (ctx->flags & EVP_MD_CTX_FLAG_ONESHOT) ) {
++		/* if application doesn't support one buffer */
++		memset(&cryp, 0, sizeof(cryp));
++
++		cryp.ses = sess->ses;
++		cryp.flags = 0;
++		cryp.len = state->mac_len;
++		cryp.src = state->mac_data;
++		cryp.dst = NULL;
++		cryp.mac = md;
++
++		if (ioctl(state->d_fd, CIOCCRYPT, &cryp) < 0) {
++			printf("cryptodev_digest_final: digest failed\n");
++			return (0);
++		}
++
++		return 1;
++	}
++
++	memcpy(md, state->digest_res, ctx->digest->md_size);
++
++	return (ret);
++}
++
++
++static int cryptodev_digest_cleanup(EVP_MD_CTX *ctx)
++{
++	int ret = 1;
++	struct dev_crypto_state *state = ctx->md_data;
++	struct session_op *sess = &state->d_sess;
++
++	if (state->d_fd < 0) {
++		printf("cryptodev_digest_cleanup: illegal input\n");
++		return (0);
++	}
++
++	if (state->mac_data) {
++		OPENSSL_free(state->mac_data);
++		state->mac_data = NULL;
++		state->mac_len = 0;
++	}
++
++	if (state->copy)
++		return 1;
++
++	if (ioctl(state->d_fd, CIOCFSESSION, &sess->ses) < 0) {
++		printf("cryptodev_digest_cleanup: failed to close session\n");
++		ret = 0;
++	} else {
++		ret = 1;
++	}
++	close(state->d_fd);	
++	state->d_fd = -1;
++
++	return (ret);
++}
++
++static int cryptodev_digest_copy(EVP_MD_CTX *to,const EVP_MD_CTX *from)
++{
++	struct dev_crypto_state *fstate = from->md_data;
++	struct dev_crypto_state *dstate = to->md_data;
++
++	memcpy(dstate, fstate, sizeof(struct dev_crypto_state));
++
++	if (fstate->mac_len != 0) {
++		dstate->mac_data = OPENSSL_malloc(fstate->mac_len);
++		memcpy(dstate->mac_data, fstate->mac_data, fstate->mac_len);
++	}
++
++	dstate->copy = 1;
++
++	return 1;
++}
++
++
++const EVP_MD cryptodev_sha1 = {
++	NID_sha1,
++	NID_undef, 
++	SHA_DIGEST_LENGTH, 
++	EVP_MD_FLAG_ONESHOT,
++	cryptodev_digest_init,
++	cryptodev_digest_update,
++	cryptodev_digest_final,
++	cryptodev_digest_copy,
++	cryptodev_digest_cleanup,
++	EVP_PKEY_NULL_method,
++	SHA_CBLOCK,
++	sizeof(struct dev_crypto_state),
++};
++
++const EVP_MD cryptodev_md5 = {
++	NID_md5,
++	NID_undef, 
++	16 /* MD5_DIGEST_LENGTH */, 
++	EVP_MD_FLAG_ONESHOT,
++	cryptodev_digest_init,
++	cryptodev_digest_update,
++	cryptodev_digest_final,
++	cryptodev_digest_copy,
++	cryptodev_digest_cleanup,
++	EVP_PKEY_NULL_method,
++	64 /* MD5_CBLOCK */,
++	sizeof(struct dev_crypto_state),
++};
++
++#endif /* USE_CRYPTODEV_DIGESTS */
++
++
+ static int
+ cryptodev_engine_digests(ENGINE *e, const EVP_MD **digest,
+     const int **nids, int nid)
+@@ -606,10 +918,15 @@
+ 		return (cryptodev_usable_digests(nids));
+ 
+ 	switch (nid) {
++#ifdef USE_CRYPTODEV_DIGESTS
+ 	case NID_md5:
+-		*digest = NULL; /* need to make a clean md5 critter */
++		*digest = &cryptodev_md5; 
+ 		break;
++	case NID_sha1:
++		*digest = &cryptodev_sha1;
++ 		break;
+ 	default:
++#endif /* USE_CRYPTODEV_DIGESTS */
+ 		*digest = NULL;
+ 		break;
+ 	}
+@@ -625,7 +942,7 @@
+ bn2crparam(const BIGNUM *a, struct crparam *crp)
+ {
+ 	int i, j, k;
+-	ssize_t words, bytes, bits;
++	ssize_t bytes, bits;
+ 	u_char *b;
+ 
+ 	crp->crp_p = NULL;
+@@ -637,6 +954,7 @@
+ 	b = malloc(bytes);
+ 	if (b == NULL)
+ 		return (1);
++	memset(b, 0, bytes);
+ 
+ 	crp->crp_p = b;
+ 	crp->crp_nbits = bits;
+@@ -681,7 +999,7 @@
+ {
+ 	int i;
+ 
+-	for (i = 0; i <= kop->crk_iparams + kop->crk_oparams; i++) {
++	for (i = 0; i < kop->crk_iparams + kop->crk_oparams; i++) {
+ 		if (kop->crk_param[i].crp_p)
+ 			free(kop->crk_param[i].crp_p);
+ 		kop->crk_param[i].crp_p = NULL;
+@@ -756,12 +1074,10 @@
+ }
+ 
+ static int
+-cryptodev_rsa_nocrt_mod_exp(BIGNUM *r0, const BIGNUM *I, RSA *rsa)
++cryptodev_rsa_nocrt_mod_exp(BIGNUM *r0, const BIGNUM *I, RSA *rsa, BN_CTX *ctx)
+ {
+ 	int r;
+-	BN_CTX *ctx;
+-
+-	ctx = BN_CTX_new();
++	ctx = BN_CTX_new(); /* not sure why we reallocate this. DM */
+ 	r = cryptodev_bn_mod_exp(r0, I, rsa->d, rsa->n, ctx, NULL);
+ 	BN_CTX_free(ctx);
+ 	return (r);
+diff -Nru openssl-0.9.8l_a/crypto/engine/engine.h openssl-0.9.8l_b/crypto/engine/engine.h
+--- openssl-0.9.8l_a/crypto/engine/engine.h	2008-06-04 21:01:40.000000000 +0300
++++ openssl-0.9.8l_b/crypto/engine/engine.h	2009-12-08 17:44:45.000000000 +0200
+@@ -703,7 +703,7 @@
+  * values. */
+ void *ENGINE_get_static_state(void);
+ 
+-#if defined(__OpenBSD__) || defined(__FreeBSD__)
++#if defined(__OpenBSD__) || defined(__FreeBSD__) || defined(HAVE_CRYPTODEV)
+ void ENGINE_setup_bsd_cryptodev(void);
+ #endif
+ 
+diff -Nru openssl-0.9.8l_a/crypto/evp/c_all.c openssl-0.9.8l_b/crypto/evp/c_all.c
+--- openssl-0.9.8l_a/crypto/evp/c_all.c	2004-08-29 19:36:04.000000000 +0300
++++ openssl-0.9.8l_b/crypto/evp/c_all.c	2009-12-08 17:44:45.000000000 +0200
+@@ -83,7 +83,7 @@
+ 	OpenSSL_add_all_ciphers();
+ 	OpenSSL_add_all_digests();
+ #ifndef OPENSSL_NO_ENGINE
+-# if defined(__OpenBSD__) || defined(__FreeBSD__)
++# if defined(__OpenBSD__) || defined(__FreeBSD__) || defined(HAVE_CRYPTODEV)
+ 	ENGINE_setup_bsd_cryptodev();
+ # endif
+ #endif
+diff -Nru openssl-0.9.8l_a/crypto/evp/c_alld.c openssl-0.9.8l_b/crypto/evp/c_alld.c
+--- openssl-0.9.8l_a/crypto/evp/c_alld.c	2005-05-01 00:51:40.000000000 +0300
++++ openssl-0.9.8l_b/crypto/evp/c_alld.c	2009-12-08 17:44:45.000000000 +0200
+@@ -81,7 +81,7 @@
+ 	EVP_add_digest(EVP_dss());
+ #endif
+ #endif
+-#ifndef OPENSSL_NO_SHA
++#if !defined(OPENSSL_NO_SHA) && !defined(OPENSSL_NO_SHA1)
+ 	EVP_add_digest(EVP_sha1());
+ 	EVP_add_digest_alias(SN_sha1,"ssl3-sha1");
+ 	EVP_add_digest_alias(SN_sha1WithRSAEncryption,SN_sha1WithRSA);
+diff -Nru openssl-0.9.8l_a/engines/Makefile openssl-0.9.8l_b/engines/Makefile
+--- openssl-0.9.8l_a/engines/Makefile	2009-11-05 15:54:01.000000000 +0200
++++ openssl-0.9.8l_b/engines/Makefile	2009-12-08 17:44:45.000000000 +0200
+@@ -96,6 +96,7 @@
+ 			( echo installing $$l; \
+ 			  if [ "$(PLATFORM)" != "Cygwin" ]; then \
+ 				case "$(CFLAGS)" in \
++				*OPENSSL_NO_HW*)	continue;;	\
+ 				*DSO_DLFCN*)	sfx="so";;	\
+ 				*DSO_DL*)	sfx="sl";;	\
+ 				*)		sfx="bad";;	\
+diff -Nru openssl-0.9.8l_a/include/openssl/engine.h openssl-0.9.8l_b/include/openssl/engine.h
+--- openssl-0.9.8l_a/include/openssl/engine.h	2008-06-04 21:01:40.000000000 +0300
++++ openssl-0.9.8l_b/include/openssl/engine.h	2009-12-08 17:44:45.000000000 +0200
+@@ -703,7 +703,7 @@
+  * values. */
+ void *ENGINE_get_static_state(void);
+ 
+-#if defined(__OpenBSD__) || defined(__FreeBSD__)
++#if defined(__OpenBSD__) || defined(__FreeBSD__) || defined(HAVE_CRYPTODEV)
+ void ENGINE_setup_bsd_cryptodev(void);
+ #endif
+ 
+diff -Nru openssl-0.9.8l_a/INSTALL openssl-0.9.8l_b/INSTALL
+--- openssl-0.9.8l_a/INSTALL	2008-04-07 09:35:41.000000000 +0300
++++ openssl-0.9.8l_b/INSTALL	2009-12-08 17:44:45.000000000 +0200
+@@ -103,6 +103,12 @@
+                 define preprocessor symbols, specify additional libraries,
+                 library directories or other compiler options.
+ 
++  --with-cryptodev Enabled the BSD cryptodev engine even if we are not using
++		BSD.  Useful if you are running ocf-linux or something
++		similar.  Once enabled you can also enable the use of
++		cryptodev digests,  with is usually slower unless you have
++		large amounts data.  Use --with-cryptodev-digests to force
++		it.
+ 
+  Installation in Detail
+  ----------------------
+diff -Nru openssl-0.9.8l_a/Makefile.org openssl-0.9.8l_b/Makefile.org
+--- openssl-0.9.8l_a/Makefile.org	2009-03-04 00:40:29.000000000 +0200
++++ openssl-0.9.8l_b/Makefile.org	2009-12-08 17:44:45.000000000 +0200
+@@ -502,7 +502,7 @@
+ 
+ links:
+ 	@$(PERL) $(TOP)/util/mkdir-p.pl include/openssl
+-	@$(PERL) $(TOP)/util/mklink.pl include/openssl $(EXHEADER)
++	@$(PERL) $(TOP)/util/mklink.pl include/openssl $(HEADER) $(EXHEADER)
+ 	@set -e; target=links; $(RECURSIVE_BUILD_CMD)
+ 	@if [ -z "$(FIPSCANLIB)" ]; then \
+ 		set -e; target=links; dir=fips ; $(BUILD_CMD) ; \
+diff -Nru openssl-0.9.8l_a/Makefile.org.orig openssl-0.9.8l_b/Makefile.org.orig
+--- openssl-0.9.8l_a/Makefile.org.orig	1970-01-01 02:00:00.000000000 +0200
++++ openssl-0.9.8l_b/Makefile.org.orig	2009-03-04 00:40:29.000000000 +0200
+@@ -0,0 +1,726 @@
++##
++## Makefile for OpenSSL
++##
++
++VERSION=
++MAJOR=
++MINOR=
++SHLIB_VERSION_NUMBER=
++SHLIB_VERSION_HISTORY=
++SHLIB_MAJOR=
++SHLIB_MINOR=
++SHLIB_EXT=
++PLATFORM=dist
++OPTIONS=
++CONFIGURE_ARGS=
++SHLIB_TARGET=
++
++# HERE indicates where this Makefile lives.  This can be used to indicate
++# where sub-Makefiles are expected to be.  Currently has very limited usage,
++# and should probably not be bothered with at all.
++HERE=.
++
++# INSTALL_PREFIX is for package builders so that they can configure
++# for, say, /usr/ and yet have everything installed to /tmp/somedir/usr/.
++# Normally it is left empty.
++INSTALL_PREFIX=
++INSTALLTOP=/usr/local/ssl
++
++# Do not edit this manually. Use Configure --openssldir=DIR do change this!
++OPENSSLDIR=/usr/local/ssl
++
++# NO_IDEA - Define to build without the IDEA algorithm
++# NO_RC4  - Define to build without the RC4 algorithm
++# NO_RC2  - Define to build without the RC2 algorithm
++# THREADS - Define when building with threads, you will probably also need any
++#           system defines as well, i.e. _REENTERANT for Solaris 2.[34]
++# TERMIO  - Define the termio terminal subsystem, needed if sgtty is missing.
++# TERMIOS - Define the termios terminal subsystem, Silicon Graphics.
++# LONGCRYPT - Define to use HPUX 10.x's long password modification to crypt(3).
++# DEVRANDOM - Give this the value of the 'random device' if your OS supports
++#           one.  32 bytes will be read from this when the random
++#           number generator is initalised.
++# SSL_FORBID_ENULL - define if you want the server to be not able to use the
++#           NULL encryption ciphers.
++#
++# LOCK_DEBUG - turns on lots of lock debug output :-)
++# REF_CHECK - turn on some xyz_free() assertions.
++# REF_PRINT - prints some stuff on structure free.
++# CRYPTO_MDEBUG - turns on my 'memory leak' detecting stuff
++# MFUNC - Make all Malloc/Free/Realloc calls call
++#       CRYPTO_malloc/CRYPTO_free/CRYPTO_realloc which can be setup to
++#       call application defined callbacks via CRYPTO_set_mem_functions()
++# MD5_ASM needs to be defined to use the x86 assembler for MD5
++# SHA1_ASM needs to be defined to use the x86 assembler for SHA1
++# RMD160_ASM needs to be defined to use the x86 assembler for RIPEMD160
++# Do not define B_ENDIAN or L_ENDIAN if 'unsigned long' == 8.  It must
++# equal 4.
++# PKCS1_CHECK - pkcs1 tests.
++
++CC= cc
++CFLAG= -O
++DEPFLAG= 
++PEX_LIBS= 
++EX_LIBS= 
++EXE_EXT= 
++ARFLAGS=
++AR=ar $(ARFLAGS) r
++ARD=ar $(ARFLAGS) d
++RANLIB= ranlib
++PERL= perl
++TAR= tar
++TARFLAGS= --no-recursion
++MAKEDEPPROG=makedepend
++
++# We let the C compiler driver to take care of .s files. This is done in
++# order to be excused from maintaining a separate set of architecture
++# dependent assembler flags. E.g. if you throw -mcpu=ultrasparc at SPARC
++# gcc, then the driver will automatically translate it to -xarch=v8plus
++# and pass it down to assembler.
++AS=$(CC) -c
++ASFLAG=$(CFLAG)
++
++# For x86 assembler: Set PROCESSOR to 386 if you want to support
++# the 80386.
++PROCESSOR=
++
++# CPUID module collects small commonly used assembler snippets
++CPUID_OBJ= 
++BN_ASM= bn_asm.o
++DES_ENC= des_enc.o fcrypt_b.o
++AES_ASM_OBJ=aes_core.o aes_cbc.o
++BF_ENC= bf_enc.o
++CAST_ENC= c_enc.o
++RC4_ENC= rc4_enc.o
++RC5_ENC= rc5_enc.o
++MD5_ASM_OBJ= 
++SHA1_ASM_OBJ= 
++RMD160_ASM_OBJ= 
++
++# KRB5 stuff
++KRB5_INCLUDES=
++LIBKRB5=
++
++# Zlib stuff
++ZLIB_INCLUDE=
++LIBZLIB=
++
++# This is the location of fipscanister.o and friends.
++# The FIPS module build will place it $(INSTALLTOP)/lib
++# but since $(INSTALLTOP) can only take the default value
++# when the module is built it will be in /usr/local/ssl/lib
++# $(INSTALLTOP) for this build make be different so hard
++# code the path.
++
++FIPSLIBDIR=/usr/local/ssl/lib/
++
++# This is set to "y" if fipscanister.o is compiled internally as
++# opposed to coming from an external validated location.
++
++FIPSCANISTERINTERNAL=n
++
++# The location of the library which contains fipscanister.o
++# normally it will be libcrypto unless fipsdso is set in which
++# case it will be libfips. If not compiling in FIPS mode at all
++# this is empty making it a useful test for a FIPS compile.
++
++FIPSCANLIB=
++
++# Shared library base address. Currently only used on Windows.
++#
++
++BASEADDR=
++
++DIRS=   crypto fips ssl engines apps test tools
++SHLIBDIRS= crypto ssl fips
++
++# dirs in crypto to build
++SDIRS=  \
++	objects \
++	md2 md4 md5 sha mdc2 hmac ripemd \
++	des aes rc2 rc4 rc5 idea bf cast camellia seed \
++	bn ec rsa dsa ecdsa dh ecdh dso engine \
++	buffer bio stack lhash rand err \
++	evp asn1 pem x509 x509v3 conf txt_db pkcs7 pkcs12 comp ocsp ui krb5 \
++	store cms pqueue jpake
++# keep in mind that the above list is adjusted by ./Configure
++# according to no-xxx arguments...
++
++# tests to perform.  "alltests" is a special word indicating that all tests
++# should be performed.
++TESTS = alltests
++
++MAKEFILE= Makefile
++
++MANDIR=$(OPENSSLDIR)/man
++MAN1=1
++MAN3=3
++MANSUFFIX=
++SHELL=/bin/sh
++
++TOP=    .
++ONEDIRS=out tmp
++EDIRS=  times doc bugs util include certs ms shlib mt demos perl sf dep VMS
++WDIRS=  windows
++LIBS=   libcrypto.a libssl.a
++SHARED_CRYPTO=libcrypto$(SHLIB_EXT)
++SHARED_SSL=libssl$(SHLIB_EXT)
++SHARED_FIPS=
++SHARED_LIBS=
++SHARED_LIBS_LINK_EXTS=
++SHARED_LDFLAGS=
++
++GENERAL=        Makefile
++BASENAME=       openssl
++NAME=           $(BASENAME)-$(VERSION)
++TARFILE=        $(NAME).tar
++WTARFILE=       $(NAME)-win.tar
++EXHEADER=       e_os2.h
++HEADER=         e_os.h
++
++all: Makefile build_all openssl.pc libssl.pc libcrypto.pc
++
++# as we stick to -e, CLEARENV ensures that local variables in lower
++# Makefiles remain local and variable. $${VAR+VAR} is tribute to Korn
++# shell, which [annoyingly enough] terminates unset with error if VAR
++# is not present:-( TOP= && unset TOP is tribute to HP-UX /bin/sh,
++# which terminates unset with error if no variable was present:-(
++CLEARENV=	TOP= && unset TOP $${LIB+LIB} $${LIBS+LIBS}	\
++		$${INCLUDE+INCLUDE} $${INCLUDES+INCLUDES}	\
++		$${DIR+DIR} $${DIRS+DIRS} $${SRC+SRC}		\
++		$${LIBSRC+LIBSRC} $${LIBOBJ+LIBOBJ} $${ALL+ALL}	\
++		$${EXHEADER+EXHEADER} $${HEADER+HEADER}		\
++		$${GENERAL+GENERAL} $${CFLAGS+CFLAGS}		\
++		$${ASFLAGS+ASFLAGS} $${AFLAGS+AFLAGS}		\
++		$${LDCMD+LDCMD} $${LDFLAGS+LDFLAGS}		\
++		$${SHAREDCMD+SHAREDCMD} $${SHAREDFLAGS+SHAREDFLAGS}	\
++		$${SHARED_LIB+SHARED_LIB} $${LIBEXTRAS+LIBEXTRAS}
++
++BUILDENV=	PLATFORM='${PLATFORM}' PROCESSOR='${PROCESSOR}' \
++		CC='${CC}' CFLAG='${CFLAG}' 			\
++		AS='${CC}' ASFLAG='${CFLAG} -c'			\
++		AR='${AR}' PERL='${PERL}' RANLIB='${RANLIB}'	\
++		SDIRS='${SDIRS}' LIBRPATH='${INSTALLTOP}/lib'	\
++		INSTALL_PREFIX='${INSTALL_PREFIX}'		\
++		INSTALLTOP='${INSTALLTOP}' OPENSSLDIR='${OPENSSLDIR}'	\
++		MAKEDEPEND='$$$${TOP}/util/domd $$$${TOP} -MD ${MAKEDEPPROG}' \
++		DEPFLAG='-DOPENSSL_NO_DEPRECATED ${DEPFLAG}'	\
++		MAKEDEPPROG='${MAKEDEPPROG}'			\
++		SHARED_LDFLAGS='${SHARED_LDFLAGS}'		\
++		KRB5_INCLUDES='${KRB5_INCLUDES}' LIBKRB5='${LIBKRB5}'	\
++		EXE_EXT='${EXE_EXT}' SHARED_LIBS='${SHARED_LIBS}'	\
++		SHLIB_EXT='${SHLIB_EXT}' SHLIB_TARGET='${SHLIB_TARGET}'	\
++		PEX_LIBS='${PEX_LIBS}' EX_LIBS='${EX_LIBS}'	\
++		CPUID_OBJ='${CPUID_OBJ}'			\
++		BN_ASM='${BN_ASM}' DES_ENC='${DES_ENC}' 	\
++		AES_ASM_OBJ='${AES_ASM_OBJ}'			\
++		BF_ENC='${BF_ENC}' CAST_ENC='${CAST_ENC}'	\
++		RC4_ENC='${RC4_ENC}' RC5_ENC='${RC5_ENC}'	\
++		SHA1_ASM_OBJ='${SHA1_ASM_OBJ}'			\
++		MD5_ASM_OBJ='${MD5_ASM_OBJ}'			\
++		RMD160_ASM_OBJ='${RMD160_ASM_OBJ}'		\
++		FIPSLIBDIR='${FIPSLIBDIR}'			\
++		FIPSCANLIB="$${FIPSCANLIB:-$(FIPSCANLIB)}"	\
++		FIPSCANISTERINTERNAL='${FIPSCANISTERINTERNAL}'	\
++		FIPS_EX_OBJ='${FIPS_EX_OBJ}'	\
++		THIS=$${THIS:-$@} MAKEFILE=Makefile MAKEOVERRIDES=
++# MAKEOVERRIDES= effectively "equalizes" GNU-ish and SysV-ish make flavors,
++# which in turn eliminates ambiguities in variable treatment with -e.
++
++# BUILD_CMD is a generic macro to build a given target in a given
++# subdirectory.  The target must be given through the shell variable
++# `target' and the subdirectory to build in must be given through `dir'.
++# This macro shouldn't be used directly, use RECURSIVE_BUILD_CMD or
++# BUILD_ONE_CMD instead.
++#
++# BUILD_ONE_CMD is a macro to build a given target in a given
++# subdirectory if that subdirectory is part of $(DIRS).  It requires
++# exactly the same shell variables as BUILD_CMD.
++#
++# RECURSIVE_BUILD_CMD is a macro to build a given target in all
++# subdirectories defined in $(DIRS).  It requires that the target
++# is given through the shell variable `target'.
++BUILD_CMD=  if [ -d "$$dir" ]; then \
++	    (	[ $$target != all -a -z "$(FIPSCANLIB)" ] && FIPSCANLIB=/dev/null; \
++		cd $$dir && echo "making $$target in $$dir..." && \
++		$(CLEARENV) && $(MAKE) -e $(BUILDENV) TOP=.. DIR=$$dir $$target \
++	    ) || exit 1; \
++	    fi
++RECURSIVE_BUILD_CMD=for dir in $(DIRS); do $(BUILD_CMD); done
++BUILD_ONE_CMD=\
++	if echo " $(DIRS) " | grep " $$dir " >/dev/null 2>/dev/null; then \
++		$(BUILD_CMD); \
++	fi
++
++reflect:
++	@[ -n "$(THIS)" ] && $(CLEARENV) && $(MAKE) $(THIS) -e $(BUILDENV)
++
++FIPS_EX_OBJ= ../crypto/aes/aes_cfb.o \
++	../crypto/aes/aes_ecb.o \
++	../crypto/aes/aes_ofb.o \
++	../crypto/bn/bn_add.o \
++	../crypto/bn/bn_blind.o \
++	../crypto/bn/bn_ctx.o \
++	../crypto/bn/bn_div.o \
++	../crypto/bn/bn_exp2.o \
++	../crypto/bn/bn_exp.o \
++	../crypto/bn/bn_gcd.o \
++	../crypto/bn/bn_lib.o \
++	../crypto/bn/bn_mod.o \
++	../crypto/bn/bn_mont.o \
++	../crypto/bn/bn_mul.o \
++	../crypto/bn/bn_prime.o \
++	../crypto/bn/bn_rand.o \
++	../crypto/bn/bn_recp.o \
++	../crypto/bn/bn_shift.o \
++	../crypto/bn/bn_sqr.o \
++	../crypto/bn/bn_word.o \
++	../crypto/bn/bn_x931p.o \
++	../crypto/buffer/buf_str.o \
++	../crypto/cryptlib.o \
++	../crypto/des/cfb64ede.o \
++	../crypto/des/cfb64enc.o \
++	../crypto/des/cfb_enc.o \
++	../crypto/des/ecb3_enc.o \
++	../crypto/des/ecb_enc.o \
++	../crypto/des/ofb64ede.o \
++	../crypto/des/ofb64enc.o \
++	../crypto/des/fcrypt.o \
++	../crypto/des/set_key.o \
++	../crypto/dsa/dsa_utl.o \
++	../crypto/dsa/dsa_sign.o \
++	../crypto/dsa/dsa_vrf.o \
++	../crypto/err/err.o \
++	../crypto/evp/digest.o \
++	../crypto/evp/enc_min.o \
++	../crypto/evp/e_aes.o \
++	../crypto/evp/e_des3.o \
++	../crypto/evp/p_sign.o \
++	../crypto/evp/p_verify.o \
++	../crypto/mem_clr.o \
++	../crypto/mem.o \
++	../crypto/rand/md_rand.o \
++	../crypto/rand/rand_egd.o \
++	../crypto/rand/randfile.o \
++	../crypto/rand/rand_lib.o \
++	../crypto/rand/rand_os2.o \
++	../crypto/rand/rand_unix.o \
++	../crypto/rand/rand_win.o \
++	../crypto/rsa/rsa_lib.o \
++	../crypto/rsa/rsa_none.o \
++	../crypto/rsa/rsa_oaep.o \
++	../crypto/rsa/rsa_pk1.o \
++	../crypto/rsa/rsa_pss.o \
++	../crypto/rsa/rsa_ssl.o \
++	../crypto/rsa/rsa_x931.o \
++	../crypto/sha/sha1dgst.o \
++	../crypto/sha/sha256.o \
++	../crypto/sha/sha512.o \
++	../crypto/uid.o
++
++sub_all: build_all
++build_all: build_libs build_apps build_tests build_tools
++
++build_libs: build_crypto build_fips build_ssl build_shared build_engines
++
++build_crypto:
++	if [ -n "$(FIPSCANLIB)" ]; then \
++		EXCL_OBJ='$(AES_ASM_OBJ) $(BN_ASM) $(DES_ENC) $(CPUID_OBJ) $(SHA1_ASM_OBJ) $(FIPS_EX_OBJ)' ; export EXCL_OBJ ; \
++		ARX='$(PERL) $${TOP}/util/arx.pl $(AR)' ; \
++	else \
++		ARX='${AR}' ; \
++	fi ; export ARX ; \
++		dir=crypto; target=all; $(BUILD_ONE_CMD)
++build_fips:
++	@dir=fips; target=all; [ -z "$(FIPSCANLIB)" ] || $(BUILD_ONE_CMD)
++build_ssl:
++	@dir=ssl; target=all; $(BUILD_ONE_CMD)
++build_engines:
++	@dir=engines; target=all; $(BUILD_ONE_CMD)
++build_apps:
++	@dir=apps; target=all; $(BUILD_ONE_CMD)
++build_tests:
++	@dir=test; target=all; $(BUILD_ONE_CMD)
++build_tools:
++	@dir=tools; target=all; $(BUILD_ONE_CMD)
++
++all_testapps: build_libs build_testapps
++build_testapps:
++	@dir=crypto; target=testapps; $(BUILD_ONE_CMD)
++
++build_shared:	$(SHARED_LIBS)
++libcrypto$(SHLIB_EXT): libcrypto.a $(SHARED_FIPS)
++	@if [ "$(SHLIB_TARGET)" != "" ]; then \
++		if [ "$(FIPSCANLIB)" = "libfips" ]; then \
++			$(ARD) libcrypto.a fipscanister.o ; \
++			$(MAKE) SHLIBDIRS='crypto' SHLIBDEPS='-lfips' build-shared; \
++			$(AR) libcrypto.a fips/fipscanister.o ; \
++		else \
++			if [ "$(FIPSCANLIB)" = "libcrypto" ]; then \
++				FIPSLD_CC=$(CC); CC=fips/fipsld; \
++				export CC FIPSLD_CC; \
++			fi; \
++			$(MAKE) -e SHLIBDIRS='crypto' build-shared; \
++		fi \
++	else \
++		echo "There's no support for shared libraries on this platform" >&2; \
++		exit 1; \
++	fi
++
++libssl$(SHLIB_EXT): libcrypto$(SHLIB_EXT) libssl.a
++	@if [ "$(SHLIB_TARGET)" != "" ]; then \
++		shlibdeps=-lcrypto; \
++		[ "$(FIPSCANLIB)" = "libfips" ] && shlibdeps="$$shlibdeps -lfips"; \
++		$(MAKE) SHLIBDIRS=ssl SHLIBDEPS="$$shlibdeps" build-shared; \
++	else \
++		echo "There's no support for shared libraries on this platform" >&2 ; \
++		exit 1; \
++	fi
++
++fips/fipscanister.o:	build_fips
++libfips$(SHLIB_EXT):		fips/fipscanister.o
++	@if [ "$(SHLIB_TARGET)" != "" ]; then \
++		FIPSLD_CC=$(CC); CC=fips/fipsld; export CC FIPSLD_CC; \
++		$(MAKE) -f Makefile.shared -e $(BUILDENV) \
++			CC=$${CC} LIBNAME=fips THIS=$@ \
++			LIBEXTRAS=fips/fipscanister.o \
++			LIBDEPS="$(EX_LIBS)" \
++			LIBVERSION=${SHLIB_MAJOR}.${SHLIB_MINOR} \
++			link_o.$(SHLIB_TARGET) || { rm -f $@; exit 1; } \
++	else \
++		echo "There's no support for shared libraries on this platform" >&2; \
++		exit 1; \
++	fi
++
++libfips.a:
++	dir=fips; target=all; $(BUILD_ONE_CMD)
++
++clean-shared:
++	@set -e; for i in $(SHLIBDIRS); do \
++		if [ -n "$(SHARED_LIBS_LINK_EXTS)" ]; then \
++			tmp="$(SHARED_LIBS_LINK_EXTS)"; \
++			for j in $${tmp:-x}; do \
++				( set -x; rm -f lib$$i$$j ); \
++			done; \
++		fi; \
++		( set -x; rm -f lib$$i$(SHLIB_EXT) ); \
++		if [ "$(PLATFORM)" = "Cygwin" ]; then \
++			( set -x; rm -f cyg$$i$(SHLIB_EXT) lib$$i$(SHLIB_EXT).a ); \
++		fi; \
++	done
++
++link-shared:
++	@ set -e; for i in ${SHLIBDIRS}; do \
++		$(MAKE) -f $(HERE)/Makefile.shared -e $(BUILDENV) \
++			LIBNAME=$$i LIBVERSION=${SHLIB_MAJOR}.${SHLIB_MINOR} \
++			LIBCOMPATVERSIONS=";${SHLIB_VERSION_HISTORY}" \
++			symlink.$(SHLIB_TARGET); \
++		libs="$$libs -l$$i"; \
++	done
++
++build-shared: do_$(SHLIB_TARGET) link-shared
++
++do_$(SHLIB_TARGET):
++	@ set -e; libs='-L. ${SHLIBDEPS}'; for i in ${SHLIBDIRS}; do \
++		if [ "${SHLIBDIRS}" = "ssl" -a -n "$(LIBKRB5)" ]; then \
++			libs="$(LIBKRB5) $$libs"; \
++		fi; \
++		$(CLEARENV) && $(MAKE) -f Makefile.shared -e $(BUILDENV) \
++			LIBNAME=$$i LIBVERSION=${SHLIB_MAJOR}.${SHLIB_MINOR} \
++			LIBCOMPATVERSIONS=";${SHLIB_VERSION_HISTORY}" \
++			LIBDEPS="$$libs $(EX_LIBS)" \
++			link_a.$(SHLIB_TARGET); \
++		libs="-l$$i $$libs"; \
++	done
++
++libcrypto.pc: Makefile
++	@ ( echo 'prefix=$(INSTALLTOP)'; \
++	    echo 'exec_prefix=$${prefix}'; \
++	    echo 'libdir=$${exec_prefix}/lib'; \
++	    echo 'includedir=$${prefix}/include'; \
++	    echo ''; \
++	    echo 'Name: OpenSSL-libcrypto'; \
++	    echo 'Description: OpenSSL cryptography library'; \
++	    echo 'Version: '$(VERSION); \
++	    echo 'Requires: '; \
++	    echo 'Libs: -L$${libdir} -lcrypto $(EX_LIBS)'; \
++	    echo 'Cflags: -I$${includedir} $(KRB5_INCLUDES)' ) > libcrypto.pc
++
++libssl.pc: Makefile
++	@ ( echo 'prefix=$(INSTALLTOP)'; \
++	    echo 'exec_prefix=$${prefix}'; \
++	    echo 'libdir=$${exec_prefix}/lib'; \
++	    echo 'includedir=$${prefix}/include'; \
++	    echo ''; \
++	    echo 'Name: OpenSSL'; \
++	    echo 'Description: Secure Sockets Layer and cryptography libraries'; \
++	    echo 'Version: '$(VERSION); \
++	    echo 'Requires: '; \
++	    echo 'Libs: -L$${libdir} -lssl -lcrypto $(EX_LIBS)'; \
++	    echo 'Cflags: -I$${includedir} $(KRB5_INCLUDES)' ) > libssl.pc
++
++openssl.pc: Makefile
++	@ ( echo 'prefix=$(INSTALLTOP)'; \
++	    echo 'exec_prefix=$${prefix}'; \
++	    echo 'libdir=$${exec_prefix}/lib'; \
++	    echo 'includedir=$${prefix}/include'; \
++	    echo ''; \
++	    echo 'Name: OpenSSL'; \
++	    echo 'Description: Secure Sockets Layer and cryptography libraries and tools'; \
++	    echo 'Version: '$(VERSION); \
++	    echo 'Requires: '; \
++	    echo 'Libs: -L$${libdir} -lssl -lcrypto $(EX_LIBS)'; \
++	    echo 'Cflags: -I$${includedir} $(KRB5_INCLUDES)' ) > openssl.pc
++
++Makefile: Makefile.org Configure config
++	@echo "Makefile is older than Makefile.org, Configure or config."
++	@echo "Reconfigure the source tree (via './config' or 'perl Configure'), please."
++	@false
++
++libclean:
++	rm -f *.map *.so *.so.* *.dll engines/*.so engines/*.dll *.a engines/*.a */lib */*/lib
++
++clean:	libclean
++	rm -f shlib/*.o *.o core a.out fluff rehash.time testlog make.log cctest cctest.c
++	@set -e; target=clean; $(RECURSIVE_BUILD_CMD)
++	rm -f $(LIBS)
++	rm -f openssl.pc libssl.pc libcrypto.pc
++	rm -f speed.* .pure
++	rm -f $(TARFILE)
++	@set -e; for i in $(ONEDIRS) ;\
++	do \
++	rm -fr $$i/*; \
++	done
++
++makefile.one: files
++	$(PERL) util/mk1mf.pl >makefile.one; \
++	sh util/do_ms.sh
++
++files:
++	$(PERL) $(TOP)/util/files.pl Makefile > $(TOP)/MINFO
++	@set -e; target=files; $(RECURSIVE_BUILD_CMD)
++
++links:
++	@$(PERL) $(TOP)/util/mkdir-p.pl include/openssl
++	@$(PERL) $(TOP)/util/mklink.pl include/openssl $(EXHEADER)
++	@set -e; target=links; $(RECURSIVE_BUILD_CMD)
++	@if [ -z "$(FIPSCANLIB)" ]; then \
++		set -e; target=links; dir=fips ; $(BUILD_CMD) ; \
++	fi
++
++gentests:
++	@(cd test && echo "generating dummy tests (if needed)..." && \
++	$(CLEARENV) && $(MAKE) -e $(BUILDENV) TESTS='${TESTS}' OPENSSL_DEBUG_MEMORY=on generate );
++
++dclean:
++	rm -f *.bak
++	@set -e; target=dclean; $(RECURSIVE_BUILD_CMD)
++
++rehash: rehash.time
++rehash.time: certs
++	@(OPENSSL="`pwd`/util/opensslwrap.sh"; \
++	  OPENSSL_DEBUG_MEMORY=on; \
++	  export OPENSSL OPENSSL_DEBUG_MEMORY; \
++	  $(PERL) tools/c_rehash certs)
++	touch rehash.time
++
++test:   tests
++
++tests: rehash
++	@(cd test && echo "testing..." && \
++	$(CLEARENV) && $(MAKE) -e $(BUILDENV) TOP=.. TESTS='${TESTS}' OPENSSL_DEBUG_MEMORY=on tests );
++	util/opensslwrap.sh version -a
++
++report:
++	@$(PERL) util/selftest.pl
++
++depend:
++	@set -e; target=depend; $(RECURSIVE_BUILD_CMD)
++
++lint:
++	@set -e; target=lint; $(RECURSIVE_BUILD_CMD)
++
++tags:
++	rm -f TAGS
++	find . -name '[^.]*.[ch]' | xargs etags -a
++
++errors:
++	$(PERL) util/mkerr.pl -recurse -write
++	(cd engines; $(MAKE) PERL=$(PERL) errors)
++	$(PERL) util/ck_errf.pl */*.c */*/*.c
++
++stacks:
++	$(PERL) util/mkstack.pl -write
++
++util/libeay.num::
++	$(PERL) util/mkdef.pl crypto update
++
++util/ssleay.num::
++	$(PERL) util/mkdef.pl ssl update
++
++crypto/objects/obj_dat.h: crypto/objects/obj_dat.pl crypto/objects/obj_mac.h
++	$(PERL) crypto/objects/obj_dat.pl crypto/objects/obj_mac.h crypto/objects/obj_dat.h
++crypto/objects/obj_mac.h: crypto/objects/objects.pl crypto/objects/objects.txt crypto/objects/obj_mac.num
++	$(PERL) crypto/objects/objects.pl crypto/objects/objects.txt crypto/objects/obj_mac.num crypto/objects/obj_mac.h
++
++apps/openssl-vms.cnf: apps/openssl.cnf
++	$(PERL) VMS/VMSify-conf.pl < apps/openssl.cnf > apps/openssl-vms.cnf
++
++crypto/bn/bn_prime.h: crypto/bn/bn_prime.pl
++	$(PERL) crypto/bn/bn_prime.pl >crypto/bn/bn_prime.h
++
++
++TABLE: Configure
++	(echo 'Output of `Configure TABLE'"':"; \
++	$(PERL) Configure TABLE) > TABLE
++
++update: errors stacks util/libeay.num util/ssleay.num crypto/objects/obj_dat.h apps/openssl-vms.cnf crypto/bn/bn_prime.h TABLE depend
++
++# Build distribution tar-file. As the list of files returned by "find" is
++# pretty long, on several platforms a "too many arguments" error or similar
++# would occur. Therefore the list of files is temporarily stored into a file
++# and read directly, requiring GNU-Tar. Call "make TAR=gtar dist" if the normal
++# tar does not support the --files-from option.
++tar:
++	find . -type d -print | xargs chmod 755
++	find . -type f -print | xargs chmod a+r
++	find . -type f -perm -0100 -print | xargs chmod a+x
++	find * \! -path CVS/\* \! -path \*/CVS/\* \! -name CVS \! -name .cvsignore \! -name STATUS \! -name TABLE | sort > ../$(TARFILE).list; \
++	$(TAR) $(TARFLAGS) --files-from ../$(TARFILE).list -cvf - | \
++	tardy --user_number=0  --user_name=openssl \
++	      --group_number=0 --group_name=openssl \
++	      --prefix=openssl-$(VERSION) - |\
++	gzip --best >../$(TARFILE).gz; \
++	rm -f ../$(TARFILE).list; \
++	ls -l ../$(TARFILE).gz
++
++tar-snap:
++	@$(TAR) $(TARFLAGS) -cvf - \
++		`find * \! -path CVS/\* \! -path \*/CVS/\* \! -name CVS \! -name .cvsignore \! -name STATUS \! -name TABLE \! -name '*.o' \! -name '*.a' \! -name '*.so' \! -name '*.so.*'  \! -name 'openssl' \! -name '*test' \! -name '.#*' \! -name '*~' | sort` |\
++	tardy --user_number=0  --user_name=openssl \
++	      --group_number=0 --group_name=openssl \
++	      --prefix=openssl-$(VERSION) - > ../$(TARFILE);\
++	ls -l ../$(TARFILE)
++
++dist:   
++	$(PERL) Configure dist
++	@$(MAKE) dist_pem_h
++	@$(MAKE) SDIRS='${SDIRS}' clean
++	@$(MAKE) TAR='${TAR}' TARFLAGS='${TARFLAGS}' tar
++
++dist_pem_h:
++	(cd crypto/pem; $(MAKE) -e $(BUILDENV) pem.h; $(MAKE) clean)
++
++install: all install_docs install_sw
++
++install_sw:
++	@$(PERL) $(TOP)/util/mkdir-p.pl $(INSTALL_PREFIX)$(INSTALLTOP)/bin \
++		$(INSTALL_PREFIX)$(INSTALLTOP)/lib \
++		$(INSTALL_PREFIX)$(INSTALLTOP)/lib/engines \
++		$(INSTALL_PREFIX)$(INSTALLTOP)/lib/pkgconfig \
++		$(INSTALL_PREFIX)$(INSTALLTOP)/include/openssl \
++		$(INSTALL_PREFIX)$(OPENSSLDIR)/misc \
++		$(INSTALL_PREFIX)$(OPENSSLDIR)/certs \
++		$(INSTALL_PREFIX)$(OPENSSLDIR)/private
++	@set -e; headerlist="$(EXHEADER)"; for i in $$headerlist;\
++	do \
++	(cp $$i $(INSTALL_PREFIX)$(INSTALLTOP)/include/openssl/$$i; \
++	chmod 644 $(INSTALL_PREFIX)$(INSTALLTOP)/include/openssl/$$i ); \
++	done;
++	@set -e; target=install; $(RECURSIVE_BUILD_CMD)
++	@set -e; for i in $(LIBS) ;\
++	do \
++		if [ -f "$$i" ]; then \
++		(       echo installing $$i; \
++			cp $$i $(INSTALL_PREFIX)$(INSTALLTOP)/lib/$$i.new; \
++			$(RANLIB) $(INSTALL_PREFIX)$(INSTALLTOP)/lib/$$i.new; \
++			chmod 644 $(INSTALL_PREFIX)$(INSTALLTOP)/lib/$$i.new; \
++			mv -f $(INSTALL_PREFIX)$(INSTALLTOP)/lib/$$i.new $(INSTALL_PREFIX)$(INSTALLTOP)/lib/$$i ); \
++		fi; \
++	done;
++	@set -e; if [ -n "$(SHARED_LIBS)" ]; then \
++		tmp="$(SHARED_LIBS)"; \
++		for i in $${tmp:-x}; \
++		do \
++			if [ -f "$$i" -o -f "$$i.a" ]; then \
++			(       echo installing $$i; \
++				if [ "$(PLATFORM)" != "Cygwin" ]; then \
++					cp $$i $(INSTALL_PREFIX)$(INSTALLTOP)/lib/$$i.new; \
++					chmod 555 $(INSTALL_PREFIX)$(INSTALLTOP)/lib/$$i.new; \
++					mv -f $(INSTALL_PREFIX)$(INSTALLTOP)/lib/$$i.new $(INSTALL_PREFIX)$(INSTALLTOP)/lib/$$i; \
++				else \
++					c=`echo $$i | sed 's/^lib\(.*\)\.dll\.a/cyg\1-$(SHLIB_VERSION_NUMBER).dll/'`; \
++					cp $$c $(INSTALL_PREFIX)$(INSTALLTOP)/bin/$$c.new; \
++					chmod 755 $(INSTALL_PREFIX)$(INSTALLTOP)/bin/$$c.new; \
++					mv -f $(INSTALL_PREFIX)$(INSTALLTOP)/bin/$$c.new $(INSTALL_PREFIX)$(INSTALLTOP)/bin/$$c; \
++					cp $$i $(INSTALL_PREFIX)$(INSTALLTOP)/lib/$$i.new; \
++					chmod 644 $(INSTALL_PREFIX)$(INSTALLTOP)/lib/$$i.new; \
++					mv -f $(INSTALL_PREFIX)$(INSTALLTOP)/lib/$$i.new $(INSTALL_PREFIX)$(INSTALLTOP)/lib/$$i; \
++				fi ); \
++			fi; \
++		done; \
++		(	here="`pwd`"; \
++			cd $(INSTALL_PREFIX)$(INSTALLTOP)/lib; \
++			$(MAKE) -f $$here/Makefile HERE="$$here" link-shared ); \
++		if [ "$(INSTALLTOP)" != "/usr" ]; then \
++			echo 'OpenSSL shared libraries have been installed in:'; \
++			echo '  $(INSTALLTOP)'; \
++			echo ''; \
++			sed -e '1,/^$$/d' doc/openssl-shared.txt; \
++		fi; \
++	fi
++	cp libcrypto.pc $(INSTALL_PREFIX)$(INSTALLTOP)/lib/pkgconfig
++	chmod 644 $(INSTALL_PREFIX)$(INSTALLTOP)/lib/pkgconfig/libcrypto.pc
++	cp libssl.pc $(INSTALL_PREFIX)$(INSTALLTOP)/lib/pkgconfig
++	chmod 644 $(INSTALL_PREFIX)$(INSTALLTOP)/lib/pkgconfig/libssl.pc
++	cp openssl.pc $(INSTALL_PREFIX)$(INSTALLTOP)/lib/pkgconfig
++	chmod 644 $(INSTALL_PREFIX)$(INSTALLTOP)/lib/pkgconfig/openssl.pc
++
++install_docs:
++	@$(PERL) $(TOP)/util/mkdir-p.pl \
++		$(INSTALL_PREFIX)$(MANDIR)/man1 \
++		$(INSTALL_PREFIX)$(MANDIR)/man3 \
++		$(INSTALL_PREFIX)$(MANDIR)/man5 \
++		$(INSTALL_PREFIX)$(MANDIR)/man7
++	@pod2man="`cd util; ./pod2mantest $(PERL)`"; \
++	here="`pwd`"; \
++	filecase=; \
++	if [ "$(PLATFORM)" = "DJGPP" -o "$(PLATFORM)" = "Cygwin" -o "$(PLATFORM)" = "mingw" ]; then \
++		filecase=-i; \
++	fi; \
++	set -e; for i in doc/apps/*.pod; do \
++		fn=`basename $$i .pod`; \
++		sec=`$(PERL) util/extract-section.pl 1 < $$i`; \
++		echo "installing man$$sec/$$fn.$${sec}$(MANSUFFIX)"; \
++		(cd `$(PERL) util/dirname.pl $$i`; \
++		sh -c "$$pod2man \
++			--section=$$sec --center=OpenSSL \
++			--release=$(VERSION) `basename $$i`") \
++			>  $(INSTALL_PREFIX)$(MANDIR)/man$$sec/$$fn.$${sec}$(MANSUFFIX); \
++		$(PERL) util/extract-names.pl < $$i | \
++			(grep -v $$filecase "^$$fn\$$"; true) | \
++			(grep -v "[	]"; true) | \
++			(cd $(INSTALL_PREFIX)$(MANDIR)/man$$sec/; \
++			 while read n; do \
++				$$here/util/point.sh $$fn.$${sec}$(MANSUFFIX) "$$n".$${sec}$(MANSUFFIX); \
++			 done); \
++	done; \
++	set -e; for i in doc/crypto/*.pod doc/ssl/*.pod; do \
++		fn=`basename $$i .pod`; \
++		sec=`$(PERL) util/extract-section.pl 3 < $$i`; \
++		echo "installing man$$sec/$$fn.$${sec}$(MANSUFFIX)"; \
++		(cd `$(PERL) util/dirname.pl $$i`; \
++		sh -c "$$pod2man \
++			--section=$$sec --center=OpenSSL \
++			--release=$(VERSION) `basename $$i`") \
++			>  $(INSTALL_PREFIX)$(MANDIR)/man$$sec/$$fn.$${sec}$(MANSUFFIX); \
++		$(PERL) util/extract-names.pl < $$i | \
++			(grep -v $$filecase "^$$fn\$$"; true) | \
++			(grep -v "[	]"; true) | \
++			(cd $(INSTALL_PREFIX)$(MANDIR)/man$$sec/; \
++			 while read n; do \
++				$$here/util/point.sh $$fn.$${sec}$(MANSUFFIX) "$$n".$${sec}$(MANSUFFIX); \
++			 done); \
++	done
++
++# DO NOT DELETE THIS LINE -- make depend depends on it.
+diff -Nru openssl-0.9.8l_a/Makefile.shared openssl-0.9.8l_b/Makefile.shared
+--- openssl-0.9.8l_a/Makefile.shared	2008-09-17 18:56:40.000000000 +0300
++++ openssl-0.9.8l_b/Makefile.shared	2009-12-08 17:44:45.000000000 +0200
+@@ -6,13 +6,13 @@
+ # properly
+ 
+ # CC contains the current compiler.  This one MUST be defined
+-CC=cc
+-CFLAGS=$(CFLAG)
++CC?=cc
++CFLAGS?=$(CFLAG)
+ # LDFLAGS contains flags to be used when temporary object files (when building
+ # shared libraries) are created, or when an application is linked.
+ # SHARED_LDFLAGS contains flags to be used when the shared library is created.
+-LDFLAGS=
+-SHARED_LDFLAGS=
++LDFLAGS?=
++SHARED_LDFLAGS?=
+ 
+ # LIBNAME contains just the name of the library, without prefix ("lib"
+ # on Unix, "cyg" for certain forms under Cygwin...) or suffix (.a, .so,
+diff -Nru openssl-0.9.8l_a/makefile-uclinuxdist openssl-0.9.8l_b/makefile-uclinuxdist
+--- openssl-0.9.8l_a/makefile-uclinuxdist	1970-01-01 02:00:00.000000000 +0200
++++ openssl-0.9.8l_b/makefile-uclinuxdist	2009-12-08 17:44:45.000000000 +0200
+@@ -0,0 +1,138 @@
++#
++# this makefile gets recursed through by various bits of the build
++# so we need to only setup some things when invoked from outside
++# this directory.
++#
++# davidm@snapgear.com
++#
++
++IN_LIBSSL := true
++export IN_LIBSSL
++
++CONFIG_OPTS  := --prefix=// --install_prefix=$(shell pwd)/build/install
++
++ifdef CONFIG_USER_FLATFSD_FLATFSD
++CONFIG_OPTS += --openssldir=/etc/config
++else
++CONFIG_OPTS += --openssldir=/etc
++endif
++ifdef DISABLE_SHARED_SSL
++CONFIG_OPTS += no-shared
++else
++CONFIG_OPTS += shared
++endif
++
++CONFIG_OPTS += no-rc2
++CONFIG_OPTS += no-krb5
++CONFIG_OPTS += no-rc5
++CONFIG_OPTS += no-md2
++CONFIG_OPTS += no-idea
++#CONFIG_OPTS += no-pem
++#CONFIG_OPTS += no-md5
++#CONFIG_OPTS += no-sha
++#CONFIG_OPTS += no-hmac
++#CONFIG_OPTS += no-des
++#CONFIG_OPTS += no-aes
++#CONFIG_OPTS += no-bn
++CONFIG_OPTS += no-ec
++#CONFIG_OPTS += no-rsa
++#CONFIG_OPTS += no-dsa
++CONFIG_OPTS += no-ecdsa
++#CONFIG_OPTS += no-dh
++CONFIG_OPTS += no-ecdh
++CONFIG_OPTS += no-dso
++#CONFIG_OPTS += no-engine
++#CONFIG_OPTS += no-buffer
++#CONFIG_OPTS += no-bio
++#CONFIG_OPTS += no-stack
++#CONFIG_OPTS += no-lhash
++#CONFIG_OPTS += no-rand
++CONFIG_OPTS += no-err
++#CONFIG_OPTS += no-evp
++#CONFIG_OPTS += no-asn1
++#CONFIG_OPTS += no-x509
++#CONFIG_OPTS += no-x509v3
++#CONFIG_OPTS += no-txt_db
++#CONFIG_OPTS += no-pkcs7
++#CONFIG_OPTS += no-pkcs12
++#CONFIG_OPTS += no-comp
++#CONFIG_OPTS += no-ocsp
++#CONFIG_OPTS += no-ui
++#CONFIG_OPTS += no-store
++CONFIG_OPTS += no-pqueue
++
++# REVISIT: It would be better to have OPENSSL config options
++# which turn on this support as needed
++ifeq ($(CONFIG_USER_NESSUS_NASL)$(CONFIG_USER_SSH_SSH),)
++CONFIG_OPTS += no-ripemd
++CONFIG_OPTS += no-cast
++CONFIG_OPTS += no-rc4
++endif
++
++ifeq ($(CONFIG_USER_NESSUS_NASL)$(CONFIG_USER_SSH_SSH)$(CONFIG_PROP_SSCEP_SSCEP),)
++CONFIG_OPTS += no-bf
++endif
++
++ifeq ($(CONFIG_USER_OPENVPN_OPENVPN)$(CONFIG_USER_WGET),)
++CONFIG_OPTS += no-md4
++endif
++
++ifdef CONFIG_OCF_OCF
++CONFIG_OPTS += --with-cryptodev
++#CONFIG_OPTS += --with-cryptodev-digests
++endif
++
++#
++# if you want engines (they are dl loaded),  a few things
++# need to be setup,  you will also need to mod everything
++# to link against -ldl if it uses libcrypto.  By default we
++# disable it (cryptodev suport is still included).
++#
++ifdef YOU_WANT_DYNAMIC_HW_ENGINES_ENABLED
++LIBSSL_dlfcn = dlfcn
++else
++CONFIG_OPTS += no-hw
++LIBSSL_dlfcn =
++endif
++
++#
++# our libs aren't in the default location yet
++#
++LDFLAGS += -L$(ROOTDIR)/lib/libssl/build
++export LDFLAGS
++
++all: build/configured
++	$(MAKE) -C build
++	$(MAKE) -C build install_sw
++
++build/configured: makefile config Configure
++	rm -rf build
++	find . -type d > .dirs
++	find . ! -type d | grep -v ./makefile > .files
++	while read t; do mkdir -p build/$$t; done < .dirs
++	while read t; do ln -s `pwd`/$$t build/$$t; done < .files
++	rm -f .dirs .files
++	chmod +x build/config
++	cd build; MACHINE=uClinux-dist ./config $(CONFIG_OPTS)
++	$(MAKE) -C build depend
++	$(MAKE) -C build links
++	touch build/configured
++
++clean:
++	-rm -rf build
++
++romfs:
++	cd build/install/lib; \
++	for i in *.so*; do \
++		if [ -L $$i ]; then \
++			$(ROMFSINST) -s `find $$i -printf %l` /lib/$$i; \
++		elif [ -f $$i ]; then \
++			$(ROMFSINST) /lib/$$i; \
++		fi; \
++	done
++
++romfs_user:
++	$(ROMFSINST) -e CONFIG_USER_OPENSSL_APPS build/install/bin/openssl /bin/openssl
++	# $(ROMFSINST) -e CONFIG_USER_OPENSSL_APPS build/install/bin/c_rehash /bin/c_rehash
++
++
+diff -Nru openssl-0.9.8l_a/util/domd.orig openssl-0.9.8l_b/util/domd.orig
+--- openssl-0.9.8l_a/util/domd.orig	1970-01-01 02:00:00.000000000 +0200
++++ openssl-0.9.8l_b/util/domd.orig	2009-01-21 23:44:52.000000000 +0200
+@@ -0,0 +1,34 @@
++#!/bin/sh
++# Do a makedepend, only leave out the standard headers
++# Written by Ben Laurie <ben@algroup.co.uk> 19 Jan 1999
++
++TOP=$1
++shift
++if [ "$1" = "-MD" ]; then
++    shift
++    MAKEDEPEND=$1
++    shift
++fi
++if [ "$MAKEDEPEND" = "" ]; then MAKEDEPEND=makedepend; fi
++
++cp Makefile Makefile.save
++# fake the presence of Kerberos
++touch $TOP/krb5.h
++if [ "$MAKEDEPEND" = "gcc" ]; then
++    args=""
++    while [ $# -gt 0 ]; do
++	if [ "$1" != "--" ]; then args="$args $1"; fi
++	shift
++    done
++    sed -e '/^# DO NOT DELETE.*/,$d' < Makefile > Makefile.tmp
++    echo '# DO NOT DELETE THIS LINE -- make depend depends on it.' >> Makefile.tmp
++    ${CC:-gcc} -D OPENSSL_DOING_MAKEDEPEND -M $args >> Makefile.tmp
++    ${PERL} $TOP/util/clean-depend.pl < Makefile.tmp > Makefile.new
++    rm -f Makefile.tmp
++else
++    ${MAKEDEPEND} -D OPENSSL_DOING_MAKEDEPEND $@
++    ${PERL} $TOP/util/clean-depend.pl < Makefile > Makefile.new
++fi
++mv Makefile.new Makefile
++# unfake the presence of Kerberos
++rm $TOP/krb5.h
--- linux-mvl-dove-2.6.32.orig/cesa/openssl/README
+++ linux-mvl-dove-2.6.32/cesa/openssl/README
@@ -0,0 +1,26 @@
+OpenSSL
+===========
+ In order to explore the CESA unit through the OpenSSL, you have to use the 
+ OpenSSL OCF cryptodev engine.By default the cryptodev engine will use the CESA 
+ accelerator.
+
+ o Create a crypto device: mknod /dev/crypto c 10 70
+ o download openssl-0.9.8l (http://www.openssl.org/), then untar+unzip it.
+ o apply the patches (in the following order):
+ 	- openssl_ocf.patch: a patch from OCF for the OpenSSL cryptodev.
+ o copy from kernel crypto/ocf/cryptodev.h to FS /usr/include/crypto .
+ o Run: `./config --with-cryptodev shared `
+ o and compile ...('make' and 'make install')
+ o When the compilation is finished, copy the following files(from openssl root directory) to /lib:
+	- libcrypto.so
+	- libcrypto.so.0.9.8
+	- libssl.so
+	- libssl.so.0.9.8
+
+ you can run a speed test to make sure everything is working:
+	openssl speed -evp des3 -elapsed 
+ Modify /dev/crypto to /dev/crypto_tmp so that the speed test will use
+ now software encryption.
+ Run again:
+        openssl speed -evp des3 -elapsed
+ Compare results.
--- linux-mvl-dove-2.6.32.orig/virt/kvm/eventfd.c
+++ linux-mvl-dove-2.6.32/virt/kvm/eventfd.c
@@ -168,7 +168,7 @@
 static int
 kvm_irqfd_assign(struct kvm *kvm, int fd, int gsi)
 {
-	struct _irqfd *irqfd;
+	struct _irqfd *irqfd, *tmp;
 	struct file *file = NULL;
 	struct eventfd_ctx *eventfd = NULL;
 	int ret;
@@ -205,9 +205,20 @@
 	init_waitqueue_func_entry(&irqfd->wait, irqfd_wakeup);
 	init_poll_funcptr(&irqfd->pt, irqfd_ptable_queue_proc);
 
+	spin_lock_irq(&kvm->irqfds.lock);
+
+	ret = 0;
+	list_for_each_entry(tmp, &kvm->irqfds.items, list) {
+		if (irqfd->eventfd != tmp->eventfd)
+			continue;
+		/* This fd is used for another irq already. */
+		ret = -EBUSY;
+		spin_unlock_irq(&kvm->irqfds.lock);
+		goto fail;
+	}
+
 	events = file->f_op->poll(file, &irqfd->pt);
 
-	spin_lock_irq(&kvm->irqfds.lock);
 	list_add_tail(&irqfd->list, &kvm->irqfds.items);
 	spin_unlock_irq(&kvm->irqfds.lock);
 
--- linux-mvl-dove-2.6.32.orig/virt/kvm/irq_comm.c
+++ linux-mvl-dove-2.6.32/virt/kvm/irq_comm.c
@@ -205,16 +205,17 @@
 	int irq_source_id;
 
 	mutex_lock(&kvm->irq_lock);
-	irq_source_id = find_first_zero_bit(bitmap,
-				sizeof(kvm->arch.irq_sources_bitmap));
+	irq_source_id = find_first_zero_bit(bitmap, BITS_PER_LONG);
 
-	if (irq_source_id >= sizeof(kvm->arch.irq_sources_bitmap)) {
+	if (irq_source_id >= BITS_PER_LONG) {
 		printk(KERN_WARNING "kvm: exhaust allocatable IRQ sources!\n");
-		return -EFAULT;
+		irq_source_id = -EFAULT;
+		goto unlock;
 	}
 
 	ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
 	set_bit(irq_source_id, bitmap);
+unlock:
 	mutex_unlock(&kvm->irq_lock);
 
 	return irq_source_id;
@@ -228,13 +229,17 @@
 
 	mutex_lock(&kvm->irq_lock);
 	if (irq_source_id < 0 ||
-	    irq_source_id >= sizeof(kvm->arch.irq_sources_bitmap)) {
+	    irq_source_id >= BITS_PER_LONG) {
 		printk(KERN_ERR "kvm: IRQ source ID out of range!\n");
-		return;
+		goto unlock;
 	}
+	clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap);
+	if (!irqchip_in_kernel(kvm))
+		goto unlock;
+
 	for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++)
 		clear_bit(irq_source_id, &kvm->arch.irq_states[i]);
-	clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap);
+unlock:
 	mutex_unlock(&kvm->irq_lock);
 }
 
--- linux-mvl-dove-2.6.32.orig/virt/kvm/kvm_main.c
+++ linux-mvl-dove-2.6.32/virt/kvm/kvm_main.c
@@ -1226,7 +1226,7 @@
 
 	/* Allocate page dirty bitmap if needed */
 	if ((new.flags & KVM_MEM_LOG_DIRTY_PAGES) && !new.dirty_bitmap) {
-		unsigned dirty_bytes = ALIGN(npages, BITS_PER_LONG) / 8;
+		unsigned long dirty_bytes = kvm_dirty_bitmap_bytes(&new);
 
 		new.dirty_bitmap = vmalloc(dirty_bytes);
 		if (!new.dirty_bitmap)
@@ -1309,7 +1309,7 @@
 {
 	struct kvm_memory_slot *memslot;
 	int r, i;
-	int n;
+	unsigned long n;
 	unsigned long any = 0;
 
 	r = -EINVAL;
@@ -1321,7 +1321,7 @@
 	if (!memslot->dirty_bitmap)
 		goto out;
 
-	n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
+	n = kvm_dirty_bitmap_bytes(memslot);
 
 	for (i = 0; !any && i < n/sizeof(long); ++i)
 		any = memslot->dirty_bitmap[i];
@@ -1663,10 +1663,13 @@
 	memslot = gfn_to_memslot_unaliased(kvm, gfn);
 	if (memslot && memslot->dirty_bitmap) {
 		unsigned long rel_gfn = gfn - memslot->base_gfn;
+		unsigned long *p = memslot->dirty_bitmap +
+					rel_gfn / BITS_PER_LONG;
+		int offset = rel_gfn % BITS_PER_LONG;
 
 		/* avoid RMW */
-		if (!test_bit(rel_gfn, memslot->dirty_bitmap))
-			set_bit(rel_gfn, memslot->dirty_bitmap);
+		if (!test_bit(offset, p))
+			set_bit(offset, p);
 	}
 }
 
@@ -1705,6 +1708,21 @@
 }
 EXPORT_SYMBOL_GPL(kvm_resched);
 
+void kvm_vcpu_on_spin(struct kvm_vcpu *vcpu)
+{
+	ktime_t expires;
+	DEFINE_WAIT(wait);
+
+	prepare_to_wait(&vcpu->wq, &wait, TASK_INTERRUPTIBLE);
+
+	/* Sleep for 100 us, and hope lock-holder got scheduled */
+	expires = ktime_add_ns(ktime_get(), 100000UL);
+	schedule_hrtimeout(&expires, HRTIMER_MODE_ABS);
+
+	finish_wait(&vcpu->wq, &wait);
+}
+EXPORT_SYMBOL_GPL(kvm_vcpu_on_spin);
+
 static int kvm_vcpu_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
 {
 	struct kvm_vcpu *vcpu = vma->vm_file->private_data;
--- linux-mvl-dove-2.6.32.orig/arch/Kconfig
+++ linux-mvl-dove-2.6.32/arch/Kconfig
@@ -6,8 +6,6 @@
 	tristate "OProfile system profiling (EXPERIMENTAL)"
 	depends on PROFILING
 	depends on HAVE_OPROFILE
-	depends on TRACING_SUPPORT
-	select TRACING
 	select RING_BUFFER
 	select RING_BUFFER_ALLOW_SWAP
 	help
--- linux-mvl-dove-2.6.32.orig/arch/h8300/kernel/syscalls.S
+++ linux-mvl-dove-2.6.32/arch/h8300/kernel/syscalls.S
@@ -206,7 +206,7 @@
 	.long SYMBOL_NAME(sys_ni_syscall)	/* streams2 */
 	.long SYMBOL_NAME(sys_vfork)            /* 190 */
 	.long SYMBOL_NAME(sys_getrlimit)
-	.long SYMBOL_NAME(sys_mmap2)
+	.long SYMBOL_NAME(sys_mmap_pgoff)
 	.long SYMBOL_NAME(sys_truncate64)
 	.long SYMBOL_NAME(sys_ftruncate64)
 	.long SYMBOL_NAME(sys_stat64)		/* 195 */
--- linux-mvl-dove-2.6.32.orig/arch/h8300/kernel/sys_h8300.c
+++ linux-mvl-dove-2.6.32/arch/h8300/kernel/sys_h8300.c
@@ -26,39 +26,6 @@
 #include <asm/traps.h>
 #include <asm/unistd.h>
 
-/* common code for old and new mmaps */
-static inline long do_mmap2(
-	unsigned long addr, unsigned long len,
-	unsigned long prot, unsigned long flags,
-	unsigned long fd, unsigned long pgoff)
-{
-	int error = -EBADF;
-	struct file * file = NULL;
-
-	flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-	if (!(flags & MAP_ANONYMOUS)) {
-		file = fget(fd);
-		if (!file)
-			goto out;
-	}
-
-	down_write(&current->mm->mmap_sem);
-	error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
-	up_write(&current->mm->mmap_sem);
-
-	if (file)
-		fput(file);
-out:
-	return error;
-}
-
-asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
-	unsigned long prot, unsigned long flags,
-	unsigned long fd, unsigned long pgoff)
-{
-	return do_mmap2(addr, len, prot, flags, fd, pgoff);
-}
-
 /*
  * Perform the select(nd, in, out, ex, tv) and mmap() system
  * calls. Linux/m68k cloned Linux/i386, which didn't use to be able to
@@ -87,58 +54,12 @@
 	if (a.offset & ~PAGE_MASK)
 		goto out;
 
-	a.flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-
-	error = do_mmap2(a.addr, a.len, a.prot, a.flags, a.fd, a.offset >> PAGE_SHIFT);
+	error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd,
+			       a.offset >> PAGE_SHIFT);
 out:
 	return error;
 }
 
-#if 0 /* DAVIDM - do we want this */
-struct mmap_arg_struct64 {
-	__u32 addr;
-	__u32 len;
-	__u32 prot;
-	__u32 flags;
-	__u64 offset; /* 64 bits */
-	__u32 fd;
-};
-
-asmlinkage long sys_mmap64(struct mmap_arg_struct64 *arg)
-{
-	int error = -EFAULT;
-	struct file * file = NULL;
-	struct mmap_arg_struct64 a;
-	unsigned long pgoff;
-
-	if (copy_from_user(&a, arg, sizeof(a)))
-		return -EFAULT;
-
-	if ((long)a.offset & ~PAGE_MASK)
-		return -EINVAL;
-
-	pgoff = a.offset >> PAGE_SHIFT;
-	if ((a.offset >> PAGE_SHIFT) != pgoff)
-		return -EINVAL;
-
-	if (!(a.flags & MAP_ANONYMOUS)) {
-		error = -EBADF;
-		file = fget(a.fd);
-		if (!file)
-			goto out;
-	}
-	a.flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-
-	down_write(&current->mm->mmap_sem);
-	error = do_mmap_pgoff(file, a.addr, a.len, a.prot, a.flags, pgoff);
-	up_write(&current->mm->mmap_sem);
-	if (file)
-		fput(file);
-out:
-	return error;
-}
-#endif
-
 struct sel_arg_struct {
 	unsigned long n;
 	fd_set *inp, *outp, *exp;
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/Kconfig
+++ linux-mvl-dove-2.6.32/arch/powerpc/Kconfig
@@ -935,6 +935,8 @@
 
 source "drivers/Kconfig"
 
+source "ubuntu/Kconfig"
+
 source "fs/Kconfig"
 
 source "arch/powerpc/sysdev/qe_lib/Kconfig"
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/Makefile
+++ linux-mvl-dove-2.6.32/arch/powerpc/Makefile
@@ -158,9 +158,11 @@
 # Default to zImage, override when needed
 all: zImage
 
-BOOT_TARGETS = zImage zImage.initrd uImage zImage% dtbImage% treeImage.% cuImage.% simpleImage.%
+# With make 3.82 we cannot mix normal and wildcard targets
+BOOT_TARGETS1 := zImage zImage.initrd uImage
+BOOT_TARGETS2 := zImage% dtbImage% treeImage.% cuImage.% simpleImage.%
 
-PHONY += $(BOOT_TARGETS)
+PHONY += $(BOOT_TARGETS1) $(BOOT_TARGETS2)
 
 boot := arch/$(ARCH)/boot
 
@@ -175,10 +177,16 @@
 zImage: relocs_check
 endif
 
-$(BOOT_TARGETS): vmlinux
+$(BOOT_TARGETS1): vmlinux
+	$(Q)$(MAKE) ARCH=ppc64 $(build)=$(boot) $(patsubst %,$(boot)/%,$@)
+$(BOOT_TARGETS2): vmlinux
+	$(Q)$(MAKE) ARCH=ppc64 $(build)=$(boot) $(patsubst %,$(boot)/%,$@)
+
+
+bootwrapper_install:
 	$(Q)$(MAKE) ARCH=ppc64 $(build)=$(boot) $(patsubst %,$(boot)/%,$@)
 
-bootwrapper_install %.dtb:
+%.dtb:
 	$(Q)$(MAKE) ARCH=ppc64 $(build)=$(boot) $(patsubst %,$(boot)/%,$@)
 
 define archhelp
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/boot/Makefile
+++ linux-mvl-dove-2.6.32/arch/powerpc/boot/Makefile
@@ -364,7 +364,7 @@
 extra-installed		:= $(patsubst $(obj)/%, $(DESTDIR)$(WRAPPER_OBJDIR)/%, $(extra-y))
 hostprogs-installed	:= $(patsubst %, $(DESTDIR)$(WRAPPER_BINDIR)/%, $(hostprogs-y))
 wrapper-installed	:= $(DESTDIR)$(WRAPPER_BINDIR)/wrapper
-dts-installed		:= $(patsubst $(obj)/dts/%, $(DESTDIR)$(WRAPPER_DTSDIR)/%, $(wildcard $(obj)/dts/*.dts))
+dts-installed		:= $(patsubst $(dtstree)/%, $(DESTDIR)$(WRAPPER_DTSDIR)/%, $(wildcard $(dtstree)/*.dts))
 
 all-installed		:= $(extra-installed) $(hostprogs-installed) $(wrapper-installed) $(dts-installed)
 
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/include/asm/module.h
+++ linux-mvl-dove-2.6.32/arch/powerpc/include/asm/module.h
@@ -87,5 +87,10 @@
 void sort_ex_table(struct exception_table_entry *start,
 		   struct exception_table_entry *finish);
 
+#ifdef CONFIG_MODVERSIONS
+#define ARCH_RELOCATES_KCRCTAB
+
+extern const unsigned long reloc_start[];
+#endif
 #endif /* __KERNEL__ */
 #endif	/* _ASM_POWERPC_MODULE_H */
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/include/asm/elf.h
+++ linux-mvl-dove-2.6.32/arch/powerpc/include/asm/elf.h
@@ -236,14 +236,10 @@
 #ifdef __powerpc64__
 # define SET_PERSONALITY(ex)					\
 do {								\
-	unsigned long new_flags = 0;				\
 	if ((ex).e_ident[EI_CLASS] == ELFCLASS32)		\
-		new_flags = _TIF_32BIT;				\
-	if ((current_thread_info()->flags & _TIF_32BIT)		\
-	    != new_flags)					\
-		set_thread_flag(TIF_ABI_PENDING);		\
+		set_thread_flag(TIF_32BIT);			\
 	else							\
-		clear_thread_flag(TIF_ABI_PENDING);		\
+		clear_thread_flag(TIF_32BIT);			\
 	if (personality(current->personality) != PER_LINUX32)	\
 		set_personality(PER_LINUX |			\
 			(current->personality & (~PER_MASK)));	\
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/include/asm/paca.h
+++ linux-mvl-dove-2.6.32/arch/powerpc/include/asm/paca.h
@@ -56,7 +56,7 @@
 	struct lppaca *lppaca_ptr;	/* Pointer to LpPaca for PLIC */
 #endif /* CONFIG_PPC_BOOK3S */
 	/*
-	 * MAGIC: the spinlock functions in arch/powerpc/lib/locks.c 
+	 * MAGIC: the spinlock functions in arch/powerpc/lib/locks.c
 	 * load lock_token and paca_index with a single lwz
 	 * instruction.  They must travel together and be properly
 	 * aligned.
@@ -76,6 +76,7 @@
 	s16 hw_cpu_id;			/* Physical processor number */
 	u8 cpu_start;			/* At startup, processor spins until */
 					/* this becomes non-zero. */
+	u8 kexec_state;         /* set when kexec down has irqs off */
 #ifdef CONFIG_PPC_STD_MMU_64
 	struct slb_shadow *slb_shadow_ptr;
 
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/include/asm/thread_info.h
+++ linux-mvl-dove-2.6.32/arch/powerpc/include/asm/thread_info.h
@@ -111,7 +111,6 @@
 #define TIF_NOTIFY_RESUME	13	/* callback before returning to user */
 #define TIF_FREEZE		14	/* Freezing for suspend */
 #define TIF_RUNLATCH		15	/* Is the runlatch enabled? */
-#define TIF_ABI_PENDING		16	/* 32/64 bit switch needed */
 
 /* as above, but as bit values */
 #define _TIF_SYSCALL_TRACE	(1<<TIF_SYSCALL_TRACE)
@@ -129,7 +128,6 @@
 #define _TIF_NOTIFY_RESUME	(1<<TIF_NOTIFY_RESUME)
 #define _TIF_FREEZE		(1<<TIF_FREEZE)
 #define _TIF_RUNLATCH		(1<<TIF_RUNLATCH)
-#define _TIF_ABI_PENDING	(1<<TIF_ABI_PENDING)
 #define _TIF_SYSCALL_T_OR_A	(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SECCOMP)
 
 #define _TIF_USER_WORK_MASK	(_TIF_SIGPENDING | _TIF_NEED_RESCHED | \
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/include/asm/kexec.h
+++ linux-mvl-dove-2.6.32/arch/powerpc/include/asm/kexec.h
@@ -31,6 +31,10 @@
 #define KEXEC_ARCH KEXEC_ARCH_PPC
 #endif
 
+#define KEXEC_STATE_NONE 0
+#define KEXEC_STATE_IRQS_OFF 1
+#define KEXEC_STATE_REAL_MODE 2
+
 #ifndef __ASSEMBLY__
 #include <linux/cpumask.h>
 #include <asm/reg.h>
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/include/asm/ppc-pci.h
+++ linux-mvl-dove-2.6.32/arch/powerpc/include/asm/ppc-pci.h
@@ -137,6 +137,11 @@
 void eeh_sysfs_add_device(struct pci_dev *pdev);
 void eeh_sysfs_remove_device(struct pci_dev *pdev);
 
+static inline const char *eeh_pci_name(struct pci_dev *pdev)
+{
+	return pdev ? pci_name(pdev) : "<null>";
+}
+
 #endif /* CONFIG_EEH */
 
 #else /* CONFIG_PCI */
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/include/asm/system.h
+++ linux-mvl-dove-2.6.32/arch/powerpc/include/asm/system.h
@@ -540,10 +540,6 @@
 
 #define PTRRELOC(x)	((typeof(x)) add_reloc_offset((unsigned long)(x)))
 
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
-extern void account_system_vtime(struct task_struct *);
-#endif
-
 extern struct dentry *powerpc_debugfs_root;
 
 #endif /* __KERNEL__ */
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/include/asm/reg.h
+++ linux-mvl-dove-2.6.32/arch/powerpc/include/asm/reg.h
@@ -858,6 +858,7 @@
 #define PV_970		0x0039
 #define PV_POWER5	0x003A
 #define PV_POWER5p	0x003B
+#define PV_POWER7	0x003F
 #define PV_970FX	0x003C
 #define PV_630		0x0040
 #define PV_630p	0x0041
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/include/asm/compat.h
+++ linux-mvl-dove-2.6.32/arch/powerpc/include/asm/compat.h
@@ -133,7 +133,7 @@
 	return (u32)(unsigned long)uptr;
 }
 
-static inline void __user *compat_alloc_user_space(long len)
+static inline void __user *arch_compat_alloc_user_space(long len)
 {
 	struct pt_regs *regs = current->thread.regs;
 	unsigned long usp = regs->gpr[1];
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/include/asm/hvcall.h
+++ linux-mvl-dove-2.6.32/arch/powerpc/include/asm/hvcall.h
@@ -268,6 +268,7 @@
  */
 #define PLPAR_HCALL9_BUFSIZE 9
 long plpar_hcall9(unsigned long opcode, unsigned long *retbuf, ...);
+long plpar_hcall9_raw(unsigned long opcode, unsigned long *retbuf, ...);
 
 /* For hcall instrumentation.  One structure per-hcall, per-CPU */
 struct hcall_stats {
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/include/asm/hw_irq.h
+++ linux-mvl-dove-2.6.32/arch/powerpc/include/asm/hw_irq.h
@@ -135,43 +135,5 @@
  */
 struct irq_chip;
 
-#ifdef CONFIG_PERF_EVENTS
-
-#ifdef CONFIG_PPC64
-static inline unsigned long test_perf_event_pending(void)
-{
-	unsigned long x;
-
-	asm volatile("lbz %0,%1(13)"
-		: "=r" (x)
-		: "i" (offsetof(struct paca_struct, perf_event_pending)));
-	return x;
-}
-
-static inline void set_perf_event_pending(void)
-{
-	asm volatile("stb %0,%1(13)" : :
-		"r" (1),
-		"i" (offsetof(struct paca_struct, perf_event_pending)));
-}
-
-static inline void clear_perf_event_pending(void)
-{
-	asm volatile("stb %0,%1(13)" : :
-		"r" (0),
-		"i" (offsetof(struct paca_struct, perf_event_pending)));
-}
-#endif /* CONFIG_PPC64 */
-
-#else  /* CONFIG_PERF_EVENTS */
-
-static inline unsigned long test_perf_event_pending(void)
-{
-	return 0;
-}
-
-static inline void clear_perf_event_pending(void) {}
-#endif /* CONFIG_PERF_EVENTS */
-
 #endif	/* __KERNEL__ */
 #endif	/* _ASM_POWERPC_HW_IRQ_H */
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/platforms/pseries/eeh_event.c
+++ linux-mvl-dove-2.6.32/arch/powerpc/platforms/pseries/eeh_event.c
@@ -80,7 +80,7 @@
 	eeh_mark_slot(event->dn, EEH_MODE_RECOVERING);
 
 	printk(KERN_INFO "EEH: Detected PCI bus error on device %s\n",
-	       pci_name(event->dev));
+	       eeh_pci_name(event->dev));
 
 	pdn = handle_eeh_events(event);
 
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/platforms/pseries/eeh_driver.c
+++ linux-mvl-dove-2.6.32/arch/powerpc/platforms/pseries/eeh_driver.c
@@ -353,7 +353,7 @@
 		location = location ? location : "unknown";
 		printk(KERN_ERR "EEH: Error: Cannot find partition endpoint "
 		                "for location=%s pci addr=%s\n",
-		        location, pci_name(event->dev));
+		        location, eeh_pci_name(event->dev));
 		return NULL;
 	}
 
@@ -384,7 +384,7 @@
 		pci_str = pci_name (frozen_pdn->pcidev);
 		drv_str = pcid_name (frozen_pdn->pcidev);
 	} else {
-		pci_str = pci_name (event->dev);
+		pci_str = eeh_pci_name(event->dev);
 		drv_str = pcid_name (event->dev);
 	}
 	
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/platforms/pseries/lpar.c
+++ linux-mvl-dove-2.6.32/arch/powerpc/platforms/pseries/lpar.c
@@ -366,21 +366,28 @@
 {
 	unsigned long size_bytes = 1UL << ppc64_pft_size;
 	unsigned long hpte_count = size_bytes >> 4;
-	unsigned long dummy1, dummy2, dword0;
+	struct {
+		unsigned long pteh;
+		unsigned long ptel;
+	} ptes[4];
 	long lpar_rc;
-	int i;
+	int i, j;
 
-	/* TODO: Use bulk call */
-	for (i = 0; i < hpte_count; i++) {
-		/* dont remove HPTEs with VRMA mappings */
-		lpar_rc = plpar_pte_remove_raw(H_ANDCOND, i, HPTE_V_1TB_SEG,
-						&dummy1, &dummy2);
-		if (lpar_rc == H_NOT_FOUND) {
-			lpar_rc = plpar_pte_read_raw(0, i, &dword0, &dummy1);
-			if (!lpar_rc && ((dword0 & HPTE_V_VRMA_MASK)
-				!= HPTE_V_VRMA_MASK))
-				/* Can be hpte for 1TB Seg. So remove it */
-				plpar_pte_remove_raw(0, i, 0, &dummy1, &dummy2);
+	/* Read in batches of 4,
+	 * invalidate only valid entries not in the VRMA
+	 * hpte_count will be a multiple of 4
+         */
+	for (i = 0; i < hpte_count; i += 4) {
+		lpar_rc = plpar_pte_read_4_raw(0, i, (void *)ptes);
+		if (lpar_rc != H_SUCCESS)
+			continue;
+		for (j = 0; j < 4; j++){
+			if ((ptes[j].pteh & HPTE_V_VRMA_MASK) ==
+				HPTE_V_VRMA_MASK)
+				continue;
+			if (ptes[j].pteh & HPTE_V_VALID)
+				plpar_pte_remove_raw(0, i + j, 0,
+					&(ptes[j].pteh), &(ptes[j].ptel));
 		}
 	}
 }
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/platforms/pseries/hvCall.S
+++ linux-mvl-dove-2.6.32/arch/powerpc/platforms/pseries/hvCall.S
@@ -202,3 +202,41 @@
 	mtcrf	0xff,r0
 
 	blr				/* return r3 = status */
+
+/* See plpar_hcall_raw to see why this is needed */
+_GLOBAL(plpar_hcall9_raw)
+	HMT_MEDIUM
+
+	mfcr	r0
+	stw	r0,8(r1)
+
+	std     r4,STK_PARM(r4)(r1)     /* Save ret buffer */
+
+	mr	r4,r5
+	mr	r5,r6
+	mr	r6,r7
+	mr	r7,r8
+	mr	r8,r9
+	mr	r9,r10
+	ld	r10,STK_PARM(r11)(r1)	 /* put arg7 in R10 */
+	ld	r11,STK_PARM(r12)(r1)	 /* put arg8 in R11 */
+	ld	r12,STK_PARM(r13)(r1)    /* put arg9 in R12 */
+
+	HVSC				/* invoke the hypervisor */
+
+	mr	r0,r12
+	ld	r12,STK_PARM(r4)(r1)
+	std	r4,  0(r12)
+	std	r5,  8(r12)
+	std	r6, 16(r12)
+	std	r7, 24(r12)
+	std	r8, 32(r12)
+	std	r9, 40(r12)
+	std	r10,48(r12)
+	std	r11,56(r12)
+	std	r0, 64(r12)
+
+	lwz	r0,8(r1)
+	mtcrf	0xff,r0
+
+	blr				/* return r3 = status */
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/platforms/pseries/hvconsole.c
+++ linux-mvl-dove-2.6.32/arch/powerpc/platforms/pseries/hvconsole.c
@@ -73,7 +73,7 @@
 	if (ret == H_SUCCESS)
 		return count;
 	if (ret == H_BUSY)
-		return 0;
+		return -EAGAIN;
 	return -EIO;
 }
 
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/platforms/pseries/smp.c
+++ linux-mvl-dove-2.6.32/arch/powerpc/platforms/pseries/smp.c
@@ -56,6 +56,28 @@
  */
 static cpumask_t of_spin_map;
 
+/* Query where a cpu is now.  Return codes #defined in plpar_wrappers.h */
+int smp_query_cpu_stopped(unsigned int pcpu)
+{
+	int cpu_status, status;
+	int qcss_tok = rtas_token("query-cpu-stopped-state");
+
+	if (qcss_tok == RTAS_UNKNOWN_SERVICE) {
+		printk(KERN_INFO "Firmware doesn't support "
+				"query-cpu-stopped-state\n");
+		return QCSS_HARDWARE_ERROR;
+	}
+
+	status = rtas_call(qcss_tok, 1, 2, &cpu_status, pcpu);
+	if (status != 0) {
+		printk(KERN_ERR
+		       "RTAS query-cpu-stopped-state failed: %i\n", status);
+		return status;
+	}
+
+	return cpu_status;
+}
+
 /**
  * smp_startup_cpu() - start the given cpu
  *
@@ -81,6 +103,12 @@
 
 	pcpu = get_hard_smp_processor_id(lcpu);
 
+	/* Check to see if the CPU out of FW already for kexec */
+	if (smp_query_cpu_stopped(pcpu) == QCSS_NOT_STOPPED){
+		cpu_set(lcpu, of_spin_map);
+		return 1;
+	}
+
 	/* Fixup atomic count: it exited inside IRQ handler. */
 	task_thread_info(paca[lcpu].__current)->preempt_count	= 0;
 
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/platforms/pseries/eeh.c
+++ linux-mvl-dove-2.6.32/arch/powerpc/platforms/pseries/eeh.c
@@ -491,7 +491,7 @@
 	    pdn->eeh_mode & EEH_MODE_NOCHECK) {
 		ignored_check++;
 		pr_debug("EEH: Ignored check (%x) for %s %s\n",
-			 pdn->eeh_mode, pci_name (dev), dn->full_name);
+			 pdn->eeh_mode, eeh_pci_name(dev), dn->full_name);
 		return 0;
 	}
 
@@ -515,7 +515,7 @@
 			printk (KERN_ERR "EEH: %d reads ignored for recovering device at "
 				"location=%s driver=%s pci addr=%s\n",
 				pdn->eeh_check_count, location,
-				dev->driver->name, pci_name(dev));
+				dev->driver->name, eeh_pci_name(dev));
 			printk (KERN_ERR "EEH: Might be infinite loop in %s driver\n",
 				dev->driver->name);
 			dump_stack();
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/platforms/pseries/plpar_wrappers.h
+++ linux-mvl-dove-2.6.32/arch/powerpc/platforms/pseries/plpar_wrappers.h
@@ -4,6 +4,14 @@
 #include <asm/hvcall.h>
 #include <asm/page.h>
 
+/* Get state of physical CPU from query_cpu_stopped */
+int smp_query_cpu_stopped(unsigned int pcpu);
+#define QCSS_STOPPED 0
+#define QCSS_STOPPING 1
+#define QCSS_NOT_STOPPED 2
+#define QCSS_HARDWARE_ERROR -1
+#define QCSS_HARDWARE_BUSY -2
+
 static inline long poll_pending(void)
 {
 	return plpar_hcall_norets(H_POLL_PENDING);
@@ -161,6 +169,24 @@
 	return rc;
 }
 
+/*
+ * plpar_pte_read_4_raw can be called in real mode.
+ * ptes must be 8*sizeof(unsigned long)
+ */
+static inline long plpar_pte_read_4_raw(unsigned long flags, unsigned long ptex,
+					unsigned long *ptes)
+
+{
+	long rc;
+	unsigned long retbuf[PLPAR_HCALL9_BUFSIZE];
+
+	rc = plpar_hcall9_raw(H_READ, retbuf, flags | H_READ_4, ptex);
+
+	memcpy(ptes, retbuf, 8*sizeof(unsigned long));
+
+	return rc;
+}
+
 static inline long plpar_pte_protect(unsigned long flags, unsigned long ptex,
 		unsigned long avpn)
 {
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/platforms/pseries/hotplug-cpu.c
+++ linux-mvl-dove-2.6.32/arch/powerpc/platforms/pseries/hotplug-cpu.c
@@ -66,30 +66,6 @@
 	for(;;);
 }
 
-static int qcss_tok;	/* query-cpu-stopped-state token */
-
-/* Get state of physical CPU.
- * Return codes:
- *	0	- The processor is in the RTAS stopped state
- *	1	- stop-self is in progress
- *	2	- The processor is not in the RTAS stopped state
- *	-1	- Hardware Error
- *	-2	- Hardware Busy, Try again later.
- */
-static int query_cpu_stopped(unsigned int pcpu)
-{
-	int cpu_status, status;
-
-	status = rtas_call(qcss_tok, 1, 2, &cpu_status, pcpu);
-	if (status != 0) {
-		printk(KERN_ERR
-		       "RTAS query-cpu-stopped-state failed: %i\n", status);
-		return status;
-	}
-
-	return cpu_status;
-}
-
 static int pseries_cpu_disable(void)
 {
 	int cpu = smp_processor_id();
@@ -113,8 +89,9 @@
 	unsigned int pcpu = get_hard_smp_processor_id(cpu);
 
 	for (tries = 0; tries < 25; tries++) {
-		cpu_status = query_cpu_stopped(pcpu);
-		if (cpu_status == 0 || cpu_status == -1)
+		cpu_status = smp_query_cpu_stopped(pcpu);
+		if (cpu_status == QCSS_STOPPED ||
+		    cpu_status == QCSS_HARDWARE_ERROR)
 			break;
 		cpu_relax();
 	}
@@ -256,6 +233,7 @@
 {
 	struct device_node *np;
 	const char *typep;
+	int qcss_tok;
 
 	for_each_node_by_name(np, "interrupt-controller") {
 		typep = of_get_property(np, "compatible", NULL);
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/oprofile/op_model_cell.c
+++ linux-mvl-dove-2.6.32/arch/powerpc/oprofile/op_model_cell.c
@@ -1077,7 +1077,7 @@
 		index = ENTRIES-1;
 
 	/* make sure index is valid */
-	if ((index > ENTRIES) || (index < 0))
+	if ((index >= ENTRIES) || (index < 0))
 		index = ENTRIES-1;
 
 	return initial_lfsr[index];
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/oprofile/op_model_power4.c
+++ linux-mvl-dove-2.6.32/arch/powerpc/oprofile/op_model_power4.c
@@ -261,6 +261,28 @@
 	return is_kernel;
 }
 
+static bool pmc_overflow(unsigned long val)
+{
+	if ((int)val < 0)
+		return true;
+
+	/*
+	 * Events on POWER7 can roll back if a speculative event doesn't
+	 * eventually complete. Unfortunately in some rare cases they will
+	 * raise a performance monitor exception. We need to catch this to
+	 * ensure we reset the PMC. In all cases the PMC will be 256 or less
+	 * cycles from overflow.
+	 *
+	 * We only do this if the first pass fails to find any overflowing
+	 * PMCs because a user might set a period of less than 256 and we
+	 * don't want to mistakenly reset them.
+	 */
+	if (__is_processor(PV_POWER7) && ((0x80000000 - val) <= 256))
+		return true;
+
+	return false;
+}
+
 static void power4_handle_interrupt(struct pt_regs *regs,
 				    struct op_counter_config *ctr)
 {
@@ -281,7 +303,7 @@
 
 	for (i = 0; i < cur_cpu_spec->num_pmcs; ++i) {
 		val = classic_ctr_read(i);
-		if (val < 0) {
+		if (pmc_overflow(val)) {
 			if (oprofile_running && ctr[i].enabled) {
 				oprofile_add_ext_sample(pc, regs, i, is_kernel);
 				classic_ctr_write(i, reset_value[i]);
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/lib/string.S
+++ linux-mvl-dove-2.6.32/arch/powerpc/lib/string.S
@@ -71,7 +71,7 @@
 
 _GLOBAL(strncmp)
 	PPC_LCMPI r5,0
-	beqlr
+	ble-	2f
 	mtctr	r5
 	addi	r5,r3,-1
 	addi	r4,r4,-1
@@ -82,6 +82,8 @@
 	beqlr	1
 	bdnzt	eq,1b
 	blr
+2:	li	r3,0
+	blr
 
 _GLOBAL(strlen)
 	addi	r4,r3,-1
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/mm/fsl_booke_mmu.c
+++ linux-mvl-dove-2.6.32/arch/powerpc/mm/fsl_booke_mmu.c
@@ -131,15 +131,10 @@
 	TLBCAM[index].MAS3 = (phys & PAGE_MASK) | MAS3_SX | MAS3_SR;
 	TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_SW : 0);
 
-#ifndef CONFIG_KGDB /* want user access for breakpoints */
 	if (flags & _PAGE_USER) {
 	   TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR;
 	   TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0);
 	}
-#else
-	TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR;
-	TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0);
-#endif
 
 	tlbcam_addrs[index].start = virt;
 	tlbcam_addrs[index].limit = virt + size - 1;
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/kernel/vmlinux.lds.S
+++ linux-mvl-dove-2.6.32/arch/powerpc/kernel/vmlinux.lds.S
@@ -38,6 +38,9 @@
 #endif
 SECTIONS
 {
+	. = 0;
+	reloc_start = .;
+
 	. = KERNELBASE;
 
 /*
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/kernel/head_64.S
+++ linux-mvl-dove-2.6.32/arch/powerpc/kernel/head_64.S
@@ -563,15 +563,21 @@
 	/* Set thread priority to MEDIUM */
 	HMT_MEDIUM
 
-	/* Do early setup for that CPU (stab, slb, hash table pointer) */
-	bl	.early_setup_secondary
-
 	/* Initialize the kernel stack.  Just a repeat for iSeries.	 */
 	LOAD_REG_ADDR(r3, current_set)
 	sldi	r28,r24,3		/* get current_set[cpu#]	 */
-	ldx	r1,r3,r28
-	addi	r1,r1,THREAD_SIZE-STACK_FRAME_OVERHEAD
-	std	r1,PACAKSAVE(r13)
+	ldx	r14,r3,r28
+	addi	r14,r14,THREAD_SIZE-STACK_FRAME_OVERHEAD
+	std	r14,PACAKSAVE(r13)
+
+	/* Do early setup for that CPU (stab, slb, hash table pointer) */
+	bl	.early_setup_secondary
+
+	/*
+	 * setup the new stack pointer, but *don't* use this until
+	 * translation is on.
+	 */
+	mr	r1, r14
 
 	/* Clear backchain so we get nice backtraces */
 	li	r7,0
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/kernel/paca.c
+++ linux-mvl-dove-2.6.32/arch/powerpc/kernel/paca.c
@@ -14,6 +14,7 @@
 #include <asm/paca.h>
 #include <asm/sections.h>
 #include <asm/pgtable.h>
+#include <asm/kexec.h>
 
 /* This symbol is provided by the linker - let it fill in the paca
  * field correctly */
@@ -97,6 +98,7 @@
 		new_paca->kernelbase = (unsigned long) _stext;
 		new_paca->kernel_msr = MSR_KERNEL;
 		new_paca->hw_cpu_id = 0xffff;
+		new_paca->kexec_state = KEXEC_STATE_NONE;
 		new_paca->__current = &init_task;
 #ifdef CONFIG_PPC_STD_MMU_64
 		new_paca->slb_shadow_ptr = &slb_shadow[cpu];
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/kernel/setup_64.c
+++ linux-mvl-dove-2.6.32/arch/powerpc/kernel/setup_64.c
@@ -432,9 +432,18 @@
 	DBG(" <- setup_system()\n");
 }
 
+static u64 slb0_limit(void)
+{
+	if (cpu_has_feature(CPU_FTR_1T_SEGMENT)) {
+		return 1UL << SID_SHIFT_1T;
+	}
+	return 1UL << SID_SHIFT;
+}
+
 #ifdef CONFIG_IRQSTACKS
 static void __init irqstack_early_init(void)
 {
+	u64 limit = slb0_limit();
 	unsigned int i;
 
 	/*
@@ -444,10 +453,10 @@
 	for_each_possible_cpu(i) {
 		softirq_ctx[i] = (struct thread_info *)
 			__va(lmb_alloc_base(THREAD_SIZE,
-					    THREAD_SIZE, 0x10000000));
+					    THREAD_SIZE, limit));
 		hardirq_ctx[i] = (struct thread_info *)
 			__va(lmb_alloc_base(THREAD_SIZE,
-					    THREAD_SIZE, 0x10000000));
+					    THREAD_SIZE, limit));
 	}
 }
 #else
@@ -478,7 +487,7 @@
  */
 static void __init emergency_stack_init(void)
 {
-	unsigned long limit;
+	u64 limit;
 	unsigned int i;
 
 	/*
@@ -490,7 +499,7 @@
 	 * bringup, we need to get at them in real mode. This means they
 	 * must also be within the RMO region.
 	 */
-	limit = min(0x10000000ULL, lmb.rmo_size);
+	limit = min(slb0_limit(), lmb.rmo_size);
 
 	for_each_possible_cpu(i) {
 		unsigned long sp;
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/kernel/align.c
+++ linux-mvl-dove-2.6.32/arch/powerpc/kernel/align.c
@@ -642,10 +642,14 @@
  */
 static int emulate_vsx(unsigned char __user *addr, unsigned int reg,
 		       unsigned int areg, struct pt_regs *regs,
-		       unsigned int flags, unsigned int length)
+		       unsigned int flags, unsigned int length,
+		       unsigned int elsize)
 {
 	char *ptr;
+	unsigned long *lptr;
 	int ret = 0;
+	int sw = 0;
+	int i, j;
 
 	flush_vsx_to_thread(current);
 
@@ -654,19 +658,35 @@
 	else
 		ptr = (char *) &current->thread.vr[reg - 32];
 
-	if (flags & ST)
-		ret = __copy_to_user(addr, ptr, length);
-        else {
-		if (flags & SPLT){
-			ret = __copy_from_user(ptr, addr, length);
-			ptr += length;
+	lptr = (unsigned long *) ptr;
+
+	if (flags & SW)
+		sw = elsize-1;
+
+	for (j = 0; j < length; j += elsize) {
+		for (i = 0; i < elsize; ++i) {
+			if (flags & ST)
+				ret |= __put_user(ptr[i^sw], addr + i);
+			else
+				ret |= __get_user(ptr[i^sw], addr + i);
 		}
-		ret |= __copy_from_user(ptr, addr, length);
+		ptr  += elsize;
+		addr += elsize;
 	}
-	if (flags & U)
-		regs->gpr[areg] = regs->dar;
-	if (ret)
+
+	if (!ret) {
+		if (flags & U)
+			regs->gpr[areg] = regs->dar;
+
+		/* Splat load copies the same data to top and bottom 8 bytes */
+		if (flags & SPLT)
+			lptr[1] = lptr[0];
+		/* For 8 byte loads, zero the top 8 bytes */
+		else if (!(flags & ST) && (8 == length))
+			lptr[1] = 0;
+	} else
 		return -EFAULT;
+
 	return 1;
 }
 #endif
@@ -767,16 +787,25 @@
 
 #ifdef CONFIG_VSX
 	if ((instruction & 0xfc00003e) == 0x7c000018) {
-		/* Additional register addressing bit (64 VSX vs 32 FPR/GPR */
+		unsigned int elsize;
+
+		/* Additional register addressing bit (64 VSX vs 32 FPR/GPR) */
 		reg |= (instruction & 0x1) << 5;
 		/* Simple inline decoder instead of a table */
+		/* VSX has only 8 and 16 byte memory accesses */
+		nb = 8;
 		if (instruction & 0x200)
 			nb = 16;
-		else if (instruction & 0x080)
-			nb = 8;
-		else
-			nb = 4;
+
+		/* Vector stores in little-endian mode swap individual
+		   elements, so process them separately */
+		elsize = 4;
+		if (instruction & 0x80)
+			elsize = 8;
+
 		flags = 0;
+		if (regs->msr & MSR_LE)
+			flags |= SW;
 		if (instruction & 0x100)
 			flags |= ST;
 		if (instruction & 0x040)
@@ -787,7 +816,7 @@
 			nb = 8;
 		}
 		PPC_WARN_EMULATED(vsx);
-		return emulate_vsx(addr, reg, areg, regs, flags, nb);
+		return emulate_vsx(addr, reg, areg, regs, flags, nb, elsize);
 	}
 #endif
 	/* A size of 0 indicates an instruction we don't support, with
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/kernel/asm-offsets.c
+++ linux-mvl-dove-2.6.32/arch/powerpc/kernel/asm-offsets.c
@@ -133,7 +133,6 @@
 	DEFINE(PACAKMSR, offsetof(struct paca_struct, kernel_msr));
 	DEFINE(PACASOFTIRQEN, offsetof(struct paca_struct, soft_enabled));
 	DEFINE(PACAHARDIRQEN, offsetof(struct paca_struct, hard_enabled));
-	DEFINE(PACAPERFPEND, offsetof(struct paca_struct, perf_event_pending));
 	DEFINE(PACACONTEXTID, offsetof(struct paca_struct, context.id));
 #ifdef CONFIG_PPC_MM_SLICES
 	DEFINE(PACALOWSLICESPSIZE, offsetof(struct paca_struct,
@@ -184,6 +183,7 @@
 #endif /* CONFIG_PPC_STD_MMU_64 */
 	DEFINE(PACAEMERGSP, offsetof(struct paca_struct, emergency_sp));
 	DEFINE(PACAHWCPUID, offsetof(struct paca_struct, hw_cpu_id));
+	DEFINE(PACAKEXECSTATE, offsetof(struct paca_struct, kexec_state));
 	DEFINE(PACA_STARTPURR, offsetof(struct paca_struct, startpurr));
 	DEFINE(PACA_STARTSPURR, offsetof(struct paca_struct, startspurr));
 	DEFINE(PACA_USER_TIME, offsetof(struct paca_struct, user_time));
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/kernel/irq.c
+++ linux-mvl-dove-2.6.32/arch/powerpc/kernel/irq.c
@@ -53,7 +53,6 @@
 #include <linux/bootmem.h>
 #include <linux/pci.h>
 #include <linux/debugfs.h>
-#include <linux/perf_event.h>
 
 #include <asm/uaccess.h>
 #include <asm/system.h>
@@ -138,11 +137,6 @@
 	}
 #endif /* CONFIG_PPC_STD_MMU_64 */
 
-	if (test_perf_event_pending()) {
-		clear_perf_event_pending();
-		perf_event_do_pending();
-	}
-
 	/*
 	 * if (get_paca()->hard_enabled) return;
 	 * But again we need to take care that gcc gets hard_enabled directly
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/kernel/rtas_flash.c
+++ linux-mvl-dove-2.6.32/arch/powerpc/kernel/rtas_flash.c
@@ -93,12 +93,8 @@
 	struct flash_block_list *next;
 	struct flash_block blocks[FLASH_BLOCKS_PER_NODE];
 };
-struct flash_block_list_header { /* just the header of flash_block_list */
-	unsigned long num_blocks;
-	struct flash_block_list *next;
-};
 
-static struct flash_block_list_header rtas_firmware_flash_list = {0, NULL};
+static struct flash_block_list *rtas_firmware_flash_list;
 
 /* Use slab cache to guarantee 4k alignment */
 static struct kmem_cache *flash_block_cache = NULL;
@@ -107,13 +103,14 @@
 
 /* Local copy of the flash block list.
  * We only allow one open of the flash proc file and create this
- * list as we go.  This list will be put in the
- * rtas_firmware_flash_list var once it is fully read.
+ * list as we go.  The rtas_firmware_flash_list varable will be
+ * set once the data is fully read.
  *
  * For convenience as we build the list we use virtual addrs,
  * we do not fill in the version number, and the length field
  * is treated as the number of entries currently in the block
- * (i.e. not a byte count).  This is all fixed on release.
+ * (i.e. not a byte count).  This is all fixed when calling
+ * the flash routine.
  */
 
 /* Status int must be first member of struct */
@@ -200,16 +197,16 @@
 	if (uf->flist) {    
 		/* File was opened in write mode for a new flash attempt */
 		/* Clear saved list */
-		if (rtas_firmware_flash_list.next) {
-			free_flash_list(rtas_firmware_flash_list.next);
-			rtas_firmware_flash_list.next = NULL;
+		if (rtas_firmware_flash_list) {
+			free_flash_list(rtas_firmware_flash_list);
+			rtas_firmware_flash_list = NULL;
 		}
 
 		if (uf->status != FLASH_AUTH)  
 			uf->status = flash_list_valid(uf->flist);
 
 		if (uf->status == FLASH_IMG_READY) 
-			rtas_firmware_flash_list.next = uf->flist;
+			rtas_firmware_flash_list = uf->flist;
 		else
 			free_flash_list(uf->flist);
 
@@ -592,7 +589,7 @@
 	unsigned long rtas_block_list;
 	int i, status, update_token;
 
-	if (rtas_firmware_flash_list.next == NULL)
+	if (rtas_firmware_flash_list == NULL)
 		return;		/* nothing to do */
 
 	if (reboot_type != SYS_RESTART) {
@@ -609,20 +606,25 @@
 		return;
 	}
 
-	/* NOTE: the "first" block list is a global var with no data
-	 * blocks in the kernel data segment.  We do this because
-	 * we want to ensure this block_list addr is under 4GB.
+	/*
+	 * NOTE: the "first" block must be under 4GB, so we create
+	 * an entry with no data blocks in the reserved buffer in
+	 * the kernel data segment.
 	 */
-	rtas_firmware_flash_list.num_blocks = 0;
-	flist = (struct flash_block_list *)&rtas_firmware_flash_list;
+	spin_lock(&rtas_data_buf_lock);
+	flist = (struct flash_block_list *)&rtas_data_buf[0];
+	flist->num_blocks = 0;
+	flist->next = rtas_firmware_flash_list;
 	rtas_block_list = virt_to_abs(flist);
 	if (rtas_block_list >= 4UL*1024*1024*1024) {
 		printk(KERN_ALERT "FLASH: kernel bug...flash list header addr above 4GB\n");
+		spin_unlock(&rtas_data_buf_lock);
 		return;
 	}
 
 	printk(KERN_ALERT "FLASH: preparing saved firmware image for flash\n");
 	/* Update the block_list in place. */
+	rtas_firmware_flash_list = NULL; /* too hard to backout on error */
 	image_size = 0;
 	for (f = flist; f; f = next) {
 		/* Translate data addrs to absolute */
@@ -663,6 +665,7 @@
 		printk(KERN_ALERT "FLASH: unknown flash return code %d\n", status);
 		break;
 	}
+	spin_unlock(&rtas_data_buf_lock);
 }
 
 static void remove_flash_pde(struct proc_dir_entry *dp)
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/kernel/vector.S
+++ linux-mvl-dove-2.6.32/arch/powerpc/kernel/vector.S
@@ -58,7 +58,7 @@
 	 * all 1's
 	 */
 	mfspr	r4,SPRN_VRSAVE
-	cmpdi	0,r4,0
+	cmpwi	0,r4,0
 	bne+	1f
 	li	r4,-1
 	mtspr	SPRN_VRSAVE,r4
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/kernel/machine_kexec_64.c
+++ linux-mvl-dove-2.6.32/arch/powerpc/kernel/machine_kexec_64.c
@@ -15,6 +15,7 @@
 #include <linux/thread_info.h>
 #include <linux/init_task.h>
 #include <linux/errno.h>
+#include <linux/cpu.h>
 
 #include <asm/page.h>
 #include <asm/current.h>
@@ -155,33 +156,62 @@
 
 #ifdef CONFIG_SMP
 
-/* FIXME: we should schedule this function to be called on all cpus based
- * on calling the interrupts, but we would like to call it off irq level
- * so that the interrupt controller is clean.
- */
+static int kexec_all_irq_disabled;
+
 static void kexec_smp_down(void *arg)
 {
+	local_irq_disable();
+	mb(); /* make sure our irqs are disabled before we say they are */
+	get_paca()->kexec_state = KEXEC_STATE_IRQS_OFF;
+	while (kexec_all_irq_disabled == 0)
+		cpu_relax();
+	mb(); /* make sure all irqs are disabled before this */
+	/*
+	 * Now every CPU has IRQs off, we can clear out any pending
+	 * IPIs and be sure that no more will come in after this.
+	 */
 	if (ppc_md.kexec_cpu_down)
 		ppc_md.kexec_cpu_down(0, 1);
 
-	local_irq_disable();
 	kexec_smp_wait();
 	/* NOTREACHED */
 }
 
-static void kexec_prepare_cpus(void)
+/*
+ * We need to make sure each present CPU is online.  The next kernel will scan
+ * the device tree and assume primary threads are online and query secondary
+ * threads via RTAS to online them if required.  If we don't online primary
+ * threads, they will be stuck.  However, we also online secondary threads as we
+ * may be using 'cede offline'.  In this case RTAS doesn't see the secondary
+ * threads as offline -- and again, these CPUs will be stuck.
+ *
+ * So, we online all CPUs that should be running, including secondary threads.
+ */
+static void wake_offline_cpus(void)
+{
+	int cpu = 0;
+
+	for_each_present_cpu(cpu) {
+		if (!cpu_online(cpu)) {
+			printk(KERN_INFO "kexec: Waking offline cpu %d.\n",
+					cpu);
+			cpu_up(cpu);
+		}
+	}
+}
+
+static void kexec_prepare_cpus_wait(int wait_state)
 {
 	int my_cpu, i, notified=-1;
 
-	smp_call_function(kexec_smp_down, NULL, /* wait */0);
+	wake_offline_cpus();
 	my_cpu = get_cpu();
-
-	/* check the others cpus are now down (via paca hw cpu id == -1) */
+	/* Make sure each CPU has atleast made it to the state we need */
 	for (i=0; i < NR_CPUS; i++) {
 		if (i == my_cpu)
 			continue;
 
-		while (paca[i].hw_cpu_id != -1) {
+		while (paca[i].kexec_state < wait_state) {
 			barrier();
 			if (!cpu_possible(i)) {
 				printk("kexec: cpu %d hw_cpu_id %d is not"
@@ -201,20 +231,35 @@
 			}
 			if (i != notified) {
 				printk( "kexec: waiting for cpu %d (physical"
-						" %d) to go down\n",
-						i, paca[i].hw_cpu_id);
+						" %d) to enter %i state\n",
+					i, paca[i].hw_cpu_id, wait_state);
 				notified = i;
 			}
 		}
 	}
+	mb();
+}
+
+static void kexec_prepare_cpus(void)
+{
+
+	smp_call_function(kexec_smp_down, NULL, /* wait */0);
+	local_irq_disable();
+	mb(); /* make sure IRQs are disabled before we say they are */
+	get_paca()->kexec_state = KEXEC_STATE_IRQS_OFF;
+
+	kexec_prepare_cpus_wait(KEXEC_STATE_IRQS_OFF);
+	/* we are sure every CPU has IRQs off at this point */
+	kexec_all_irq_disabled = 1;
 
 	/* after we tell the others to go down */
 	if (ppc_md.kexec_cpu_down)
 		ppc_md.kexec_cpu_down(0, 0);
 
-	put_cpu();
+/* Before removing MMU mapings make sure all CPUs have entered real mode */
+	kexec_prepare_cpus_wait(KEXEC_STATE_REAL_MODE);
 
-	local_irq_disable();
+	put_cpu();
 }
 
 #else /* ! SMP */
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/kernel/misc_64.S
+++ linux-mvl-dove-2.6.32/arch/powerpc/kernel/misc_64.S
@@ -24,6 +24,7 @@
 #include <asm/asm-offsets.h>
 #include <asm/cputable.h>
 #include <asm/thread_info.h>
+#include <asm/kexec.h>
 
 	.text
 
@@ -462,7 +463,8 @@
  * wait for the flag to change, indicating this kernel is going away but
  * the slave code for the next one is at addresses 0 to 100.
  *
- * This is used by all slaves.
+ * This is used by all slaves, even those that did not find a matching
+ * paca in the secondary startup code.
  *
  * Physical (hardware) cpu id should be in r3.
  */
@@ -494,15 +496,18 @@
  * note: this is a terminal routine, it does not save lr
  *
  * get phys id from paca
- * set paca id to -1 to say we got here
  * switch to real mode
+ * mark the paca as no longer used
  * join other cpus in kexec_wait(phys_id)
  */
 _GLOBAL(kexec_smp_wait)
 	lhz	r3,PACAHWCPUID(r13)
-	li	r4,-1
-	sth	r4,PACAHWCPUID(r13)	/* let others know we left */
 	bl	real_mode
+
+	li	r4,KEXEC_STATE_REAL_MODE
+	stb	r4,PACAKEXECSTATE(r13)
+	SYNC
+
 	b	.kexec_wait
 
 /*
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/kernel/ppc970-pmu.c
+++ linux-mvl-dove-2.6.32/arch/powerpc/kernel/ppc970-pmu.c
@@ -173,9 +173,11 @@
 	switch (unit) {
 	case PM_VPU:
 		mask = 0x4c;		/* byte 0 bits 2,3,6 */
+		break;
 	case PM_LSU0:
 		/* byte 2 bits 0,2,3,4,6; all of byte 1 */
 		mask = 0x085dff00;
+		break;
 	case PM_LSU1L:
 		mask = 0x50 << 24;	/* byte 3 bits 4,6 */
 		break;
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/kernel/pci-common.c
+++ linux-mvl-dove-2.6.32/arch/powerpc/kernel/pci-common.c
@@ -1107,6 +1107,12 @@
 	list_for_each_entry(dev, &bus->devices, bus_list) {
 		struct dev_archdata *sd = &dev->dev.archdata;
 
+		/* Cardbus can call us to add new devices to a bus, so ignore
+		 * those who are already fully discovered
+		 */
+		if (dev->is_added)
+			continue;
+
 		/* Setup OF node pointer in archdata */
 		sd->of_node = pci_device_to_OF_node(dev);
 
@@ -1147,6 +1153,13 @@
 }
 EXPORT_SYMBOL(pcibios_fixup_bus);
 
+void __devinit pci_fixup_cardbus(struct pci_bus *bus)
+{
+	/* Now fixup devices on that bus */
+	pcibios_setup_bus_devices(bus);
+}
+
+
 static int skip_isa_ioresource_align(struct pci_dev *dev)
 {
 	if ((ppc_pci_flags & PPC_PCI_CAN_SKIP_ISA_ALIGN) &&
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/kernel/entry_64.S
+++ linux-mvl-dove-2.6.32/arch/powerpc/kernel/entry_64.S
@@ -556,15 +556,6 @@
 2:
 	TRACE_AND_RESTORE_IRQ(r5);
 
-#ifdef CONFIG_PERF_EVENTS
-	/* check paca->perf_event_pending if we're enabling ints */
-	lbz	r3,PACAPERFPEND(r13)
-	and.	r3,r3,r5
-	beq	27f
-	bl	.perf_event_do_pending
-27:
-#endif /* CONFIG_PERF_EVENTS */
-
 	/* extract EE bit and use it to restore paca->hard_enabled */
 	ld	r3,_MSR(r1)
 	rldicl	r4,r3,49,63		/* r0 = (r3 >> 15) & 1 */
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/kernel/cpu_setup_6xx.S
+++ linux-mvl-dove-2.6.32/arch/powerpc/kernel/cpu_setup_6xx.S
@@ -18,7 +18,7 @@
 #include <asm/mmu.h>
 
 _GLOBAL(__setup_cpu_603)
-	mflr	r4
+	mflr	r5
 BEGIN_MMU_FTR_SECTION
 	li	r10,0
 	mtspr	SPRN_SPRG_603_LRU,r10		/* init SW LRU tracking */
@@ -27,60 +27,60 @@
 	bl	__init_fpu_registers
 END_FTR_SECTION_IFCLR(CPU_FTR_FPU_UNAVAILABLE)
 	bl	setup_common_caches
-	mtlr	r4
+	mtlr	r5
 	blr
 _GLOBAL(__setup_cpu_604)
-	mflr	r4
+	mflr	r5
 	bl	setup_common_caches
 	bl	setup_604_hid0
-	mtlr	r4
+	mtlr	r5
 	blr
 _GLOBAL(__setup_cpu_750)
-	mflr	r4
+	mflr	r5
 	bl	__init_fpu_registers
 	bl	setup_common_caches
 	bl	setup_750_7400_hid0
-	mtlr	r4
+	mtlr	r5
 	blr
 _GLOBAL(__setup_cpu_750cx)
-	mflr	r4
+	mflr	r5
 	bl	__init_fpu_registers
 	bl	setup_common_caches
 	bl	setup_750_7400_hid0
 	bl	setup_750cx
-	mtlr	r4
+	mtlr	r5
 	blr
 _GLOBAL(__setup_cpu_750fx)
-	mflr	r4
+	mflr	r5
 	bl	__init_fpu_registers
 	bl	setup_common_caches
 	bl	setup_750_7400_hid0
 	bl	setup_750fx
-	mtlr	r4
+	mtlr	r5
 	blr
 _GLOBAL(__setup_cpu_7400)
-	mflr	r4
+	mflr	r5
 	bl	__init_fpu_registers
 	bl	setup_7400_workarounds
 	bl	setup_common_caches
 	bl	setup_750_7400_hid0
-	mtlr	r4
+	mtlr	r5
 	blr
 _GLOBAL(__setup_cpu_7410)
-	mflr	r4
+	mflr	r5
 	bl	__init_fpu_registers
 	bl	setup_7410_workarounds
 	bl	setup_common_caches
 	bl	setup_750_7400_hid0
 	li	r3,0
 	mtspr	SPRN_L2CR2,r3
-	mtlr	r4
+	mtlr	r5
 	blr
 _GLOBAL(__setup_cpu_745x)
-	mflr	r4
+	mflr	r5
 	bl	setup_common_caches
 	bl	setup_745x_specifics
-	mtlr	r4
+	mtlr	r5
 	blr
 
 /* Enable caches for 603's, 604, 750 & 7400 */
@@ -194,10 +194,10 @@
 	cror	4*cr0+eq,4*cr0+eq,4*cr1+eq
 	cror	4*cr0+eq,4*cr0+eq,4*cr2+eq
 	bnelr
-	lwz	r6,CPU_SPEC_FEATURES(r5)
+	lwz	r6,CPU_SPEC_FEATURES(r4)
 	li	r7,CPU_FTR_CAN_NAP
 	andc	r6,r6,r7
-	stw	r6,CPU_SPEC_FEATURES(r5)
+	stw	r6,CPU_SPEC_FEATURES(r4)
 	blr
 
 /* 750fx specific
@@ -225,12 +225,12 @@
 	andis.	r11,r11,L3CR_L3E@h
 	beq	1f
 END_FTR_SECTION_IFSET(CPU_FTR_L3CR)
-	lwz	r6,CPU_SPEC_FEATURES(r5)
+	lwz	r6,CPU_SPEC_FEATURES(r4)
 	andi.	r0,r6,CPU_FTR_L3_DISABLE_NAP
 	beq	1f
 	li	r7,CPU_FTR_CAN_NAP
 	andc	r6,r6,r7
-	stw	r6,CPU_SPEC_FEATURES(r5)
+	stw	r6,CPU_SPEC_FEATURES(r4)
 1:
 	mfspr	r11,SPRN_HID0
 
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/kernel/time.c
+++ linux-mvl-dove-2.6.32/arch/powerpc/kernel/time.c
@@ -530,25 +530,60 @@
 }
 #endif /* CONFIG_PPC_ISERIES */
 
-#if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_PPC32)
-DEFINE_PER_CPU(u8, perf_event_pending);
+#ifdef CONFIG_PERF_EVENTS
 
-void set_perf_event_pending(void)
+/*
+ * 64-bit uses a byte in the PACA, 32-bit uses a per-cpu variable...
+ */
+#ifdef CONFIG_PPC64
+static inline unsigned long test_perf_event_pending(void)
 {
-	get_cpu_var(perf_event_pending) = 1;
-	set_dec(1);
-	put_cpu_var(perf_event_pending);
+	unsigned long x;
+
+	asm volatile("lbz %0,%1(13)"
+		: "=r" (x)
+		: "i" (offsetof(struct paca_struct, perf_event_pending)));
+	return x;
 }
 
+static inline void set_perf_event_pending_flag(void)
+{
+	asm volatile("stb %0,%1(13)" : :
+		"r" (1),
+		"i" (offsetof(struct paca_struct, perf_event_pending)));
+}
+
+static inline void clear_perf_event_pending(void)
+{
+	asm volatile("stb %0,%1(13)" : :
+		"r" (0),
+		"i" (offsetof(struct paca_struct, perf_event_pending)));
+}
+
+#else /* 32-bit */
+
+DEFINE_PER_CPU(u8, perf_event_pending);
+
+#define set_perf_event_pending_flag()	__get_cpu_var(perf_event_pending) = 1
 #define test_perf_event_pending()	__get_cpu_var(perf_event_pending)
 #define clear_perf_event_pending()	__get_cpu_var(perf_event_pending) = 0
 
-#else  /* CONFIG_PERF_EVENTS && CONFIG_PPC32 */
+#endif /* 32 vs 64 bit */
+
+void set_perf_event_pending(void)
+{
+	preempt_disable();
+	set_perf_event_pending_flag();
+	set_dec(1);
+	preempt_enable();
+}
+
+#else  /* CONFIG_PERF_EVENTS */
 
 #define test_perf_event_pending()	0
 #define clear_perf_event_pending()
 
-#endif /* CONFIG_PERF_EVENTS && CONFIG_PPC32 */
+#endif /* CONFIG_PERF_EVENTS */
 
 /*
  * For iSeries shared processors, we have to let the hypervisor
@@ -576,10 +611,6 @@
 	set_dec(DECREMENTER_MAX);
 
 #ifdef CONFIG_PPC32
-	if (test_perf_event_pending()) {
-		clear_perf_event_pending();
-		perf_event_do_pending();
-	}
 	if (atomic_read(&ppc_n_lost_interrupts) != 0)
 		do_IRQ(regs);
 #endif
@@ -597,6 +628,11 @@
 
 	calculate_steal_time();
 
+	if (test_perf_event_pending()) {
+		clear_perf_event_pending();
+		perf_event_do_pending();
+	}
+
 #ifdef CONFIG_PPC_ISERIES
 	if (firmware_has_feature(FW_FEATURE_ISERIES))
 		get_lppaca()->int_dword.fields.decr_int = 0;
@@ -828,7 +864,8 @@
 	return (cycle_t)get_tb();
 }
 
-void update_vsyscall(struct timespec *wall_time, struct clocksource *clock)
+void update_vsyscall(struct timespec *wall_time, struct clocksource *clock,
+		     u32 mult)
 {
 	u64 t2x, stamp_xsec;
 
@@ -841,7 +878,7 @@
 
 	/* XXX this assumes clock->shift == 22 */
 	/* 4611686018 ~= 2^(20+64-22) / 1e9 */
-	t2x = (u64) clock->mult * 4611686018ULL;
+	t2x = (u64) mult * 4611686018ULL;
 	stamp_xsec = (u64) xtime.tv_nsec * XSEC_PER_SEC;
 	do_div(stamp_xsec, 1000000000);
 	stamp_xsec += (u64) xtime.tv_sec * XSEC_PER_SEC;
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/kernel/crash.c
+++ linux-mvl-dove-2.6.32/arch/powerpc/kernel/crash.c
@@ -162,6 +162,30 @@
 	/* Leave the IPI callback set */
 }
 
+/* wait for all the CPUs to hit real mode but timeout if they don't come in */
+#ifdef CONFIG_PPC_STD_MMU_64
+static void crash_kexec_wait_realmode(int cpu)
+{
+	unsigned int msecs;
+	int i;
+
+	msecs = 10000;
+	for (i=0; i < NR_CPUS && msecs > 0; i++) {
+		if (i == cpu)
+			continue;
+
+		while (paca[i].kexec_state < KEXEC_STATE_REAL_MODE) {
+			barrier();
+			if (!cpu_possible(i) || !cpu_online(i) || (msecs <= 0))
+				break;
+			msecs--;
+			mdelay(1);
+		}
+	}
+	mb();
+}
+#endif
+
 /*
  * This function will be called by secondary cpus or by kexec cpu
  * if soft-reset is activated to stop some CPUs.
@@ -347,10 +371,12 @@
 EXPORT_SYMBOL(crash_shutdown_unregister);
 
 static unsigned long crash_shutdown_buf[JMP_BUF_LEN];
+static int crash_shutdown_cpu = -1;
 
 static int handle_fault(struct pt_regs *regs)
 {
-	longjmp(crash_shutdown_buf, 1);
+	if (crash_shutdown_cpu == smp_processor_id())
+		longjmp(crash_shutdown_buf, 1);
 	return 0;
 }
 
@@ -375,11 +401,14 @@
 	for_each_irq(i) {
 		struct irq_desc *desc = irq_desc + i;
 
+		if (!desc || !desc->chip || !desc->chip->eoi)
+			continue;
+
 		if (desc->status & IRQ_INPROGRESS)
 			desc->chip->eoi(i);
 
 		if (!(desc->status & IRQ_DISABLED))
-			desc->chip->disable(i);
+			desc->chip->shutdown(i);
 	}
 
 	/*
@@ -388,6 +417,7 @@
 	 */
 	old_handler = __debugger_fault_handler;
 	__debugger_fault_handler = handle_fault;
+	crash_shutdown_cpu = smp_processor_id();
 	for (i = 0; crash_shutdown_handles[i]; i++) {
 		if (setjmp(crash_shutdown_buf) == 0) {
 			/*
@@ -401,6 +431,7 @@
 			asm volatile("sync; isync");
 		}
 	}
+	crash_shutdown_cpu = -1;
 	__debugger_fault_handler = old_handler;
 
 	/*
@@ -412,6 +443,9 @@
 	crash_kexec_prepare_cpus(crashing_cpu);
 	cpu_set(crashing_cpu, cpus_in_crash);
 	crash_kexec_stop_spus();
+#if defined(CONFIG_PPC_STD_MMU_64) && defined(CONFIG_SMP)
+	crash_kexec_wait_realmode(crashing_cpu);
+#endif
 	if (ppc_md.kexec_cpu_down)
 		ppc_md.kexec_cpu_down(1, 0);
 }
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/kernel/process.c
+++ linux-mvl-dove-2.6.32/arch/powerpc/kernel/process.c
@@ -554,18 +554,6 @@
 
 void flush_thread(void)
 {
-#ifdef CONFIG_PPC64
-	struct thread_info *t = current_thread_info();
-
-	if (test_ti_thread_flag(t, TIF_ABI_PENDING)) {
-		clear_ti_thread_flag(t, TIF_ABI_PENDING);
-		if (test_ti_thread_flag(t, TIF_32BIT))
-			clear_ti_thread_flag(t, TIF_32BIT);
-		else
-			set_ti_thread_flag(t, TIF_32BIT);
-	}
-#endif
-
 	discard_lazy_cpu_state();
 
 	if (current->thread.dabr) {
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/kernel/perf_event.c
+++ linux-mvl-dove-2.6.32/arch/powerpc/kernel/perf_event.c
@@ -1220,6 +1220,28 @@
 	return ip;
 }
 
+static bool pmc_overflow(unsigned long val)
+{
+	if ((int)val < 0)
+		return true;
+
+	/*
+	 * Events on POWER7 can roll back if a speculative event doesn't
+	 * eventually complete. Unfortunately in some rare cases they will
+	 * raise a performance monitor exception. We need to catch this to
+	 * ensure we reset the PMC. In all cases the PMC will be 256 or less
+	 * cycles from overflow.
+	 *
+	 * We only do this if the first pass fails to find any overflowing
+	 * PMCs because a user might set a period of less than 256 and we
+	 * don't want to mistakenly reset them.
+	 */
+	if (__is_processor(PV_POWER7) && ((0x80000000 - val) <= 256))
+		return true;
+
+	return false;
+}
+
 /*
  * Performance monitor interrupt stuff
  */
@@ -1267,7 +1289,7 @@
 			if (is_limited_pmc(i + 1))
 				continue;
 			val = read_pmc(i + 1);
-			if ((int)val < 0)
+			if (pmc_overflow(val))
 				write_pmc(i + 1, 0);
 		}
 	}
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/kernel/syscalls.c
+++ linux-mvl-dove-2.6.32/arch/powerpc/kernel/syscalls.c
@@ -140,7 +140,6 @@
 			unsigned long prot, unsigned long flags,
 			unsigned long fd, unsigned long off, int shift)
 {
-	struct file * file = NULL;
 	unsigned long ret = -EINVAL;
 
 	if (!arch_validate_prot(prot))
@@ -151,20 +150,8 @@
 			goto out;
 		off >>= shift;
 	}
-		
-	ret = -EBADF;
-	if (!(flags & MAP_ANONYMOUS)) {
-		if (!(file = fget(fd)))
-			goto out;
-	}
-
-	flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
 
-	down_write(&current->mm->mmap_sem);
-	ret = do_mmap_pgoff(file, addr, len, prot, flags, off);
-	up_write(&current->mm->mmap_sem);
-	if (file)
-		fput(file);
+	ret = sys_mmap_pgoff(addr, len, prot, flags, fd, off);
 out:
 	return ret;
 }
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/kvm/powerpc.c
+++ linux-mvl-dove-2.6.32/arch/powerpc/kvm/powerpc.c
@@ -176,7 +176,8 @@
 {
 	struct kvm_vcpu *vcpu;
 	vcpu = kvmppc_core_vcpu_create(kvm, id);
-	kvmppc_create_vcpu_debugfs(vcpu, id);
+	if (!IS_ERR(vcpu))
+		kvmppc_create_vcpu_debugfs(vcpu, id);
 	return vcpu;
 }
 
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/sysdev/fsl_rio.c
+++ linux-mvl-dove-2.6.32/arch/powerpc/sysdev/fsl_rio.c
@@ -832,7 +832,6 @@
 	if (dsr & DOORBELL_DSR_QFI) {
 		pr_info("RIO: doorbell queue full\n");
 		out_be32(&priv->msg_regs->dsr, DOORBELL_DSR_QFI);
-		goto out;
 	}
 
 	/* XXX Need to check/dispatch until queue empty */
--- linux-mvl-dove-2.6.32.orig/arch/powerpc/sysdev/fsl_pci.c
+++ linux-mvl-dove-2.6.32/arch/powerpc/sysdev/fsl_pci.c
@@ -392,8 +392,22 @@
 DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641, quirk_fsl_pcie_header);
 DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641D, quirk_fsl_pcie_header);
 DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8610, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1011E, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1011, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1013E, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1013, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1020E, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1020, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1022E, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1022, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P2010E, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P2010, quirk_fsl_pcie_header);
 DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P2020E, quirk_fsl_pcie_header);
 DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P2020, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P4040E, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P4040, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P4080E, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P4080, quirk_fsl_pcie_header);
 #endif /* CONFIG_PPC_85xx || CONFIG_PPC_86xx */
 
 #if defined(CONFIG_PPC_83xx) || defined(CONFIG_PPC_MPC512x)
--- linux-mvl-dove-2.6.32.orig/arch/alpha/kernel/err_marvel.c
+++ linux-mvl-dove-2.6.32/arch/alpha/kernel/err_marvel.c
@@ -109,7 +109,7 @@
 #define IO7__ERR_CYC__CYCLE__M	(0x7)
 
 	printk("%s        Packet In Error: %s\n"
-	       "%s        Error in %s, cycle %ld%s%s\n",
+	       "%s        Error in %s, cycle %lld%s%s\n",
 	       err_print_prefix, 
 	       packet_desc[EXTRACT(err_cyc, IO7__ERR_CYC__PACKET)],
 	       err_print_prefix,
@@ -313,7 +313,7 @@
 	}
 
 	printk("%s      Up Hose Garbage Symptom:\n"
-	       "%s        Source Port: %ld - Dest PID: %ld - OpCode: %s\n", 
+	       "%s        Source Port: %lld - Dest PID: %lld - OpCode: %s\n",
 	       err_print_prefix,
 	       err_print_prefix, 
 	       EXTRACT(ugbge_sym, IO7__PO7_UGBGE_SYM__UPH_SRC_PORT),
@@ -552,7 +552,7 @@
 #define IO7__POX_SPLCMPLT__REM_BYTE_COUNT__M	(0xfff)
 
 	printk("%s      Split Completion Error:\n"	
-	       "%s         Source (Bus:Dev:Func): %ld:%ld:%ld\n",
+	       "%s         Source (Bus:Dev:Func): %lld:%lld:%lld\n",
 	       err_print_prefix,
 	       err_print_prefix,
 	       EXTRACT(spl_cmplt, IO7__POX_SPLCMPLT__SOURCE_BUS),
--- linux-mvl-dove-2.6.32.orig/arch/alpha/kernel/osf_sys.c
+++ linux-mvl-dove-2.6.32/arch/alpha/kernel/osf_sys.c
@@ -178,25 +178,18 @@
 		unsigned long, prot, unsigned long, flags, unsigned long, fd,
 		unsigned long, off)
 {
-	struct file *file = NULL;
-	unsigned long ret = -EBADF;
+	unsigned long ret = -EINVAL;
 
 #if 0
 	if (flags & (_MAP_HASSEMAPHORE | _MAP_INHERIT | _MAP_UNALIGNED))
 		printk("%s: unimplemented OSF mmap flags %04lx\n", 
 			current->comm, flags);
 #endif
-	if (!(flags & MAP_ANONYMOUS)) {
-		file = fget(fd);
-		if (!file)
-			goto out;
-	}
-	flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-	down_write(&current->mm->mmap_sem);
-	ret = do_mmap(file, addr, len, prot, flags, off);
-	up_write(&current->mm->mmap_sem);
-	if (file)
-		fput(file);
+	if ((off + PAGE_ALIGN(len)) < off)
+		goto out;
+	if (off & ~PAGE_MASK)
+		goto out;
+	ret = sys_mmap_pgoff(addr, len, prot, flags, fd, off >> PAGE_SHIFT);
  out:
 	return ret;
 }
@@ -438,7 +431,7 @@
 		return -EFAULT;
 
 	len = namelen;
-	if (namelen > 32)
+	if (len > 32)
 		len = 32;
 
 	down_read(&uts_sem);
@@ -625,7 +618,7 @@
 	down_read(&uts_sem);
 	res = sysinfo_table[offset];
 	len = strlen(res)+1;
-	if (len > count)
+	if ((unsigned long)len > (unsigned long)count)
 		len = count;
 	if (copy_to_user(buf, res, len))
 		err = -EFAULT;
@@ -680,7 +673,7 @@
 		return 1;
 
 	case GSI_GET_HWRPB:
-		if (nbytes < sizeof(*hwrpb))
+		if (nbytes > sizeof(*hwrpb))
 			return -EINVAL;
 		if (copy_to_user(buffer, hwrpb, nbytes) != 0)
 			return -EFAULT;
@@ -1042,6 +1035,7 @@
 {
 	struct rusage r;
 	long ret, err;
+	unsigned int status = 0;
 	mm_segment_t old_fs;
 
 	if (!ur)
@@ -1050,13 +1044,15 @@
 	old_fs = get_fs();
 		
 	set_fs (KERNEL_DS);
-	ret = sys_wait4(pid, ustatus, options, (struct rusage __user *) &r);
+	ret = sys_wait4(pid, (unsigned int __user *) &status, options,
+			(struct rusage __user *) &r);
 	set_fs (old_fs);
 
 	if (!access_ok(VERIFY_WRITE, ur, sizeof(*ur)))
 		return -EFAULT;
 
 	err = 0;
+	err |= put_user(status, ustatus);
 	err |= __put_user(r.ru_utime.tv_sec, &ur->ru_utime.tv_sec);
 	err |= __put_user(r.ru_utime.tv_usec, &ur->ru_utime.tv_usec);
 	err |= __put_user(r.ru_stime.tv_sec, &ur->ru_stime.tv_sec);
--- linux-mvl-dove-2.6.32.orig/arch/parisc/include/asm/compat.h
+++ linux-mvl-dove-2.6.32/arch/parisc/include/asm/compat.h
@@ -146,7 +146,7 @@
 	return (u32)(unsigned long)uptr;
 }
 
-static __inline__ void __user *compat_alloc_user_space(long len)
+static __inline__ void __user *arch_compat_alloc_user_space(long len)
 {
 	struct pt_regs *regs = &current->thread.regs;
 	return (void __user *)regs->gr[30];
--- linux-mvl-dove-2.6.32.orig/arch/parisc/math-emu/decode_exc.c
+++ linux-mvl-dove-2.6.32/arch/parisc/math-emu/decode_exc.c
@@ -342,6 +342,7 @@
 		return SIGNALCODE(SIGFPE, FPE_FLTINV);
 	  case DIVISIONBYZEROEXCEPTION:
 		update_trap_counts(Fpu_register, aflags, bflags, trap_counts);
+		Clear_excp_register(exception_index);
 	  	return SIGNALCODE(SIGFPE, FPE_FLTDIV);
 	  case INEXACTEXCEPTION:
 		update_trap_counts(Fpu_register, aflags, bflags, trap_counts);
--- linux-mvl-dove-2.6.32.orig/arch/parisc/mm/init.c
+++ linux-mvl-dove-2.6.32/arch/parisc/mm/init.c
@@ -265,8 +265,10 @@
 	}
 	memset(pfnnid_map, 0xff, sizeof(pfnnid_map));
 
-	for (i = 0; i < npmem_ranges; i++)
+	for (i = 0; i < npmem_ranges; i++) {
+		node_set_state(i, N_NORMAL_MEMORY);
 		node_set_online(i);
+	}
 #endif
 
 	/*
--- linux-mvl-dove-2.6.32.orig/arch/parisc/kernel/irq.c
+++ linux-mvl-dove-2.6.32/arch/parisc/kernel/irq.c
@@ -117,7 +117,7 @@
 	int cpu_dest;
 
 	/* timer and ipi have to always be received on all CPUs */
-	if (CHECK_IRQ_PER_CPU(irq)) {
+	if (CHECK_IRQ_PER_CPU(irq_to_desc(irq)->status)) {
 		/* Bad linux design decision.  The mask has already
 		 * been set; we must reset it */
 		cpumask_setall(irq_desc[irq].affinity);
--- linux-mvl-dove-2.6.32.orig/arch/parisc/kernel/firmware.c
+++ linux-mvl-dove-2.6.32/arch/parisc/kernel/firmware.c
@@ -1123,42 +1123,23 @@
  */
 int pdc_iodc_print(const unsigned char *str, unsigned count)
 {
-	static int posx;        /* for simple TAB-Simulation... */
 	unsigned int i;
 	unsigned long flags;
 
-	for (i = 0; i < count && i < 79;) {
+	for (i = 0; i < count;) {
 		switch(str[i]) {
 		case '\n':
 			iodc_dbuf[i+0] = '\r';
 			iodc_dbuf[i+1] = '\n';
 			i += 2;
-			posx = 0;
 			goto print;
-		case '\t':
-			while (posx & 7) {
-				iodc_dbuf[i] = ' ';
-				i++, posx++;
-			}
-			break;
-		case '\b':	/* BS */
-			posx -= 2;
 		default:
 			iodc_dbuf[i] = str[i];
-			i++, posx++;
+			i++;
 			break;
 		}
 	}
 
-	/* if we're at the end of line, and not already inserting a newline,
-	 * insert one anyway. iodc console doesn't claim to support >79 char
-	 * lines. don't account for this in the return value.
-	 */
-	if (i == 79 && iodc_dbuf[i-1] != '\n') {
-		iodc_dbuf[i+0] = '\r';
-		iodc_dbuf[i+1] = '\n';
-	}
-
 print:
         spin_lock_irqsave(&pdc_lock, flags);
         real32_call(PAGE0->mem_cons.iodc_io,
--- linux-mvl-dove-2.6.32.orig/arch/parisc/kernel/sys_parisc.c
+++ linux-mvl-dove-2.6.32/arch/parisc/kernel/sys_parisc.c
@@ -110,37 +110,14 @@
 	return addr;
 }
 
-static unsigned long do_mmap2(unsigned long addr, unsigned long len,
-	unsigned long prot, unsigned long flags, unsigned long fd,
-	unsigned long pgoff)
-{
-	struct file * file = NULL;
-	unsigned long error = -EBADF;
-	if (!(flags & MAP_ANONYMOUS)) {
-		file = fget(fd);
-		if (!file)
-			goto out;
-	}
-
-	flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-
-	down_write(&current->mm->mmap_sem);
-	error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
-	up_write(&current->mm->mmap_sem);
-
-	if (file != NULL)
-		fput(file);
-out:
-	return error;
-}
-
 asmlinkage unsigned long sys_mmap2(unsigned long addr, unsigned long len,
 	unsigned long prot, unsigned long flags, unsigned long fd,
 	unsigned long pgoff)
 {
 	/* Make sure the shift for mmap2 is constant (12), no matter what PAGE_SIZE
 	   we have. */
-	return do_mmap2(addr, len, prot, flags, fd, pgoff >> (PAGE_SHIFT - 12));
+	return sys_mmap_pgoff(addr, len, prot, flags, fd,
+			      pgoff >> (PAGE_SHIFT - 12));
 }
 
 asmlinkage unsigned long sys_mmap(unsigned long addr, unsigned long len,
@@ -148,7 +125,8 @@
 		unsigned long offset)
 {
 	if (!(offset & ~PAGE_MASK)) {
-		return do_mmap2(addr, len, prot, flags, fd, offset >> PAGE_SHIFT);
+		return sys_mmap_pgoff(addr, len, prot, flags, fd,
+					offset >> PAGE_SHIFT);
 	} else {
 		return -EINVAL;
 	}
--- linux-mvl-dove-2.6.32.orig/arch/sparc/Makefile
+++ linux-mvl-dove-2.6.32/arch/sparc/Makefile
@@ -27,6 +27,7 @@
 LDFLAGS        := -m elf32_sparc
 CHECKFLAGS     += -D__sparc__
 export BITS    := 32
+UTS_MACHINE    := sparc
 
 #KBUILD_CFLAGS += -g -pipe -fcall-used-g5 -fcall-used-g7
 KBUILD_CFLAGS += -m32 -pipe -mno-fpu -fcall-used-g5 -fcall-used-g7
@@ -46,6 +47,7 @@
 
 LDFLAGS              := -m elf64_sparc
 export BITS          := 64
+UTS_MACHINE          := sparc64
 
 KBUILD_CFLAGS += -m64 -pipe -mno-fpu -mcpu=ultrasparc -mcmodel=medlow   \
                  -ffixed-g4 -ffixed-g5 -fcall-used-g7 -Wno-sign-compare \
--- linux-mvl-dove-2.6.32.orig/arch/sparc/include/asm/oplib_64.h
+++ linux-mvl-dove-2.6.32/arch/sparc/include/asm/oplib_64.h
@@ -185,9 +185,8 @@
 			   char *buf, int buflen);
 
 /* Retain physical memory to the caller across soft resets. */
-extern unsigned long prom_retain(const char *name,
-				 unsigned long pa_low, unsigned long pa_high,
-				 long size, long align);
+extern int prom_retain(const char *name, unsigned long size,
+		       unsigned long align, unsigned long *paddr);
 
 /* Load explicit I/D TLB entries into the calling processor. */
 extern long prom_itlb_load(unsigned long index,
@@ -287,26 +286,6 @@
 extern int prom_ihandle2path(int handle, char *buffer, int bufsize);
 
 /* Client interface level routines. */
-extern long p1275_cmd(const char *, long, ...);
-
-#if 0
-#define P1275_SIZE(x) ((((long)((x) / 32)) << 32) | (x))
-#else
-#define P1275_SIZE(x) x
-#endif
-
-/* We support at most 16 input and 1 output argument */
-#define P1275_ARG_NUMBER		0
-#define P1275_ARG_IN_STRING		1
-#define P1275_ARG_OUT_BUF		2
-#define P1275_ARG_OUT_32B		3
-#define P1275_ARG_IN_FUNCTION		4
-#define P1275_ARG_IN_BUF		5
-#define P1275_ARG_IN_64B		6
-
-#define P1275_IN(x) ((x) & 0xf)
-#define P1275_OUT(x) (((x) << 4) & 0xf0)
-#define P1275_INOUT(i,o) (P1275_IN(i)|P1275_OUT(o))
-#define P1275_ARG(n,x) ((x) << ((n)*3 + 8))
+extern void p1275_cmd_direct(unsigned long *);
 
 #endif /* !(__SPARC64_OPLIB_H) */
--- linux-mvl-dove-2.6.32.orig/arch/sparc/include/asm/parport.h
+++ linux-mvl-dove-2.6.32/arch/sparc/include/asm/parport.h
@@ -228,6 +228,10 @@
 		.name = "parallel",
 		.compatible = "ns87317-ecpp",
 	},
+	{
+		.name = "parallel",
+		.compatible = "pnpALI,1533,3",
+	},
 	{},
 };
 
--- linux-mvl-dove-2.6.32.orig/arch/sparc/include/asm/elf_64.h
+++ linux-mvl-dove-2.6.32/arch/sparc/include/asm/elf_64.h
@@ -196,17 +196,10 @@
 #define ELF_PLATFORM	(NULL)
 
 #define SET_PERSONALITY(ex)				\
-do {	unsigned long new_flags = current_thread_info()->flags; \
-	new_flags &= _TIF_32BIT;			\
-	if ((ex).e_ident[EI_CLASS] == ELFCLASS32)	\
-		new_flags |= _TIF_32BIT;		\
+do {	if ((ex).e_ident[EI_CLASS] == ELFCLASS32)	\
+		set_thread_flag(TIF_32BIT);		\
 	else						\
-		new_flags &= ~_TIF_32BIT;		\
-	if ((current_thread_info()->flags & _TIF_32BIT) \
-	    != new_flags)				\
-		set_thread_flag(TIF_ABI_PENDING);	\
-	else						\
-		clear_thread_flag(TIF_ABI_PENDING);	\
+		clear_thread_flag(TIF_32BIT);		\
 	/* flush_thread will update pgd cache */	\
 	if (personality(current->personality) != PER_LINUX32)	\
 		set_personality(PER_LINUX |		\
--- linux-mvl-dove-2.6.32.orig/arch/sparc/include/asm/io_64.h
+++ linux-mvl-dove-2.6.32/arch/sparc/include/asm/io_64.h
@@ -468,10 +468,14 @@
 
 #define ioread8(X)			readb(X)
 #define ioread16(X)			readw(X)
+#define ioread16be(X)			__raw_readw(X)
 #define ioread32(X)			readl(X)
+#define ioread32be(X)			__raw_readl(X)
 #define iowrite8(val,X)			writeb(val,X)
 #define iowrite16(val,X)		writew(val,X)
+#define iowrite16be(val,X)		__raw_writew(val,X)
 #define iowrite32(val,X)		writel(val,X)
+#define iowrite32be(val,X)		__raw_writel(val,X)
 
 /* Create a virtual mapping cookie for an IO port range */
 extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
--- linux-mvl-dove-2.6.32.orig/arch/sparc/include/asm/page_32.h
+++ linux-mvl-dove-2.6.32/arch/sparc/include/asm/page_32.h
@@ -143,7 +143,7 @@
 #define phys_to_virt		__va
 
 #define ARCH_PFN_OFFSET		(pfn_base)
-#define virt_to_page(kaddr)	(mem_map + ((((unsigned long)(kaddr)-PAGE_OFFSET)>>PAGE_SHIFT)))
+#define virt_to_page(kaddr)	pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
 
 #define pfn_valid(pfn)		(((pfn) >= (pfn_base)) && (((pfn)-(pfn_base)) < max_mapnr))
 #define virt_addr_valid(kaddr)	((((unsigned long)(kaddr)-PAGE_OFFSET)>>PAGE_SHIFT) < max_mapnr)
--- linux-mvl-dove-2.6.32.orig/arch/sparc/include/asm/thread_info_64.h
+++ linux-mvl-dove-2.6.32/arch/sparc/include/asm/thread_info_64.h
@@ -227,12 +227,11 @@
 /* flag bit 8 is available */
 #define TIF_SECCOMP		9	/* secure computing */
 #define TIF_SYSCALL_AUDIT	10	/* syscall auditing active */
-/* flag bit 11 is available */
 /* NOTE: Thread flags >= 12 should be ones we have no interest
  *       in using in assembly, else we can't use the mask as
  *       an immediate value in instructions such as andcc.
  */
-#define TIF_ABI_PENDING		12
+/* flag bit 12 is available */
 #define TIF_MEMDIE		13
 #define TIF_POLLING_NRFLAG	14
 #define TIF_FREEZE		15	/* is freezing for suspend */
@@ -246,7 +245,6 @@
 #define _TIF_32BIT		(1<<TIF_32BIT)
 #define _TIF_SECCOMP		(1<<TIF_SECCOMP)
 #define _TIF_SYSCALL_AUDIT	(1<<TIF_SYSCALL_AUDIT)
-#define _TIF_ABI_PENDING	(1<<TIF_ABI_PENDING)
 #define _TIF_POLLING_NRFLAG	(1<<TIF_POLLING_NRFLAG)
 #define _TIF_FREEZE		(1<<TIF_FREEZE)
 
--- linux-mvl-dove-2.6.32.orig/arch/sparc/include/asm/compat.h
+++ linux-mvl-dove-2.6.32/arch/sparc/include/asm/compat.h
@@ -166,7 +166,7 @@
 	return (u32)(unsigned long)uptr;
 }
 
-static inline void __user *compat_alloc_user_space(long len)
+static inline void __user *arch_compat_alloc_user_space(long len)
 {
 	struct pt_regs *regs = current_thread_info()->kregs;
 	unsigned long usp = regs->u_regs[UREG_I6];
--- linux-mvl-dove-2.6.32.orig/arch/sparc/include/asm/atomic_64.h
+++ linux-mvl-dove-2.6.32/arch/sparc/include/asm/atomic_64.h
@@ -20,14 +20,14 @@
 #define atomic64_set(v, i)	(((v)->counter) = i)
 
 extern void atomic_add(int, atomic_t *);
-extern void atomic64_add(int, atomic64_t *);
+extern void atomic64_add(long, atomic64_t *);
 extern void atomic_sub(int, atomic_t *);
-extern void atomic64_sub(int, atomic64_t *);
+extern void atomic64_sub(long, atomic64_t *);
 
 extern int atomic_add_ret(int, atomic_t *);
-extern int atomic64_add_ret(int, atomic64_t *);
+extern long atomic64_add_ret(long, atomic64_t *);
 extern int atomic_sub_ret(int, atomic_t *);
-extern int atomic64_sub_ret(int, atomic64_t *);
+extern long atomic64_sub_ret(long, atomic64_t *);
 
 #define atomic_dec_return(v) atomic_sub_ret(1, v)
 #define atomic64_dec_return(v) atomic64_sub_ret(1, v)
@@ -91,7 +91,7 @@
 	((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n)))
 #define atomic64_xchg(v, new) (xchg(&((v)->counter), new))
 
-static inline int atomic64_add_unless(atomic64_t *v, long a, long u)
+static inline long atomic64_add_unless(atomic64_t *v, long a, long u)
 {
 	long c, old;
 	c = atomic64_read(v);
--- linux-mvl-dove-2.6.32.orig/arch/sparc/include/asm/io_32.h
+++ linux-mvl-dove-2.6.32/arch/sparc/include/asm/io_32.h
@@ -8,7 +8,7 @@
 #include <asm/page.h>      /* IO address mapping routines need this */
 #include <asm/system.h>
 
-#define page_to_phys(page)	(((page) - mem_map) << PAGE_SHIFT)
+#define page_to_phys(page)	(page_to_pfn(page) << PAGE_SHIFT)
 
 static inline u32 flip_dword (u32 l)
 {
@@ -249,10 +249,14 @@
 
 #define ioread8(X)			readb(X)
 #define ioread16(X)			readw(X)
+#define ioread16be(X)			__raw_readw(X)
 #define ioread32(X)			readl(X)
+#define ioread32be(X)			__raw_readl(X)
 #define iowrite8(val,X)			writeb(val,X)
 #define iowrite16(val,X)		writew(val,X)
+#define iowrite16be(val,X)		__raw_writew(val,X)
 #define iowrite32(val,X)		writel(val,X)
+#define iowrite32be(val,X)		__raw_writel(val,X)
 
 static inline void ioread8_rep(void __iomem *port, void *buf, unsigned long count)
 {
--- linux-mvl-dove-2.6.32.orig/arch/sparc/include/asm/rwsem-const.h
+++ linux-mvl-dove-2.6.32/arch/sparc/include/asm/rwsem-const.h
@@ -5,7 +5,7 @@
 #define RWSEM_UNLOCKED_VALUE		0x00000000
 #define RWSEM_ACTIVE_BIAS		0x00000001
 #define RWSEM_ACTIVE_MASK		0x0000ffff
-#define RWSEM_WAITING_BIAS		0xffff0000
+#define RWSEM_WAITING_BIAS		(-0x00010000)
 #define RWSEM_ACTIVE_READ_BIAS		RWSEM_ACTIVE_BIAS
 #define RWSEM_ACTIVE_WRITE_BIAS		(RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
 
--- linux-mvl-dove-2.6.32.orig/arch/sparc/include/asm/stat.h
+++ linux-mvl-dove-2.6.32/arch/sparc/include/asm/stat.h
@@ -53,8 +53,8 @@
 	ino_t		st_ino;
 	mode_t		st_mode;
 	short		st_nlink;
-	uid_t		st_uid;
-	gid_t		st_gid;
+	unsigned short	st_uid;
+	unsigned short	st_gid;
 	unsigned short	st_rdev;
 	off_t		st_size;
 	time_t		st_atime;
--- linux-mvl-dove-2.6.32.orig/arch/sparc/lib/mcount.S
+++ linux-mvl-dove-2.6.32/arch/sparc/lib/mcount.S
@@ -64,8 +64,9 @@
 2:	 sethi		%hi(softirq_stack), %g3
 	or		%g3, %lo(softirq_stack), %g3
 	ldx		[%g3 + %g1], %g7
+	sub		%g7, STACK_BIAS, %g7
 	cmp		%sp, %g7
-	bleu,pt		%xcc, 2f
+	bleu,pt		%xcc, 3f
 	 sethi		%hi(THREAD_SIZE), %g3
 	add		%g7, %g3, %g7
 	cmp		%sp, %g7
@@ -75,7 +76,7 @@
 	 * again, we are already trying to output the stack overflow
 	 * message.
 	 */
-	sethi		%hi(ovstack), %g7		! cant move to panic stack fast enough
+3:	sethi		%hi(ovstack), %g7		! cant move to panic stack fast enough
 	 or		%g7, %lo(ovstack), %g7
 	add		%g7, OVSTACKSIZE, %g3
 	sub		%g3, STACK_BIAS + 192, %g3
--- linux-mvl-dove-2.6.32.orig/arch/sparc/kernel/systbls.h
+++ linux-mvl-dove-2.6.32/arch/sparc/kernel/systbls.h
@@ -9,7 +9,6 @@
 struct new_utsname;
 
 extern asmlinkage unsigned long sys_getpagesize(void);
-extern asmlinkage unsigned long sparc_brk(unsigned long brk);
 extern asmlinkage long sparc_pipe(struct pt_regs *regs);
 extern asmlinkage long sys_ipc(unsigned int call, int first,
 			       unsigned long second,
--- linux-mvl-dove-2.6.32.orig/arch/sparc/kernel/process_64.c
+++ linux-mvl-dove-2.6.32/arch/sparc/kernel/process_64.c
@@ -365,14 +365,6 @@
 	struct thread_info *t = current_thread_info();
 	struct mm_struct *mm;
 
-	if (test_ti_thread_flag(t, TIF_ABI_PENDING)) {
-		clear_ti_thread_flag(t, TIF_ABI_PENDING);
-		if (test_ti_thread_flag(t, TIF_32BIT))
-			clear_ti_thread_flag(t, TIF_32BIT);
-		else
-			set_ti_thread_flag(t, TIF_32BIT);
-	}
-
 	mm = t->task->mm;
 	if (mm)
 		tsb_context_switch(mm);
@@ -406,11 +398,11 @@
 	} else
 		__get_user(fp, &(((struct reg_window32 __user *)psp)->ins[6]));
 
-	/* Now 8-byte align the stack as this is mandatory in the
-	 * Sparc ABI due to how register windows work.  This hides
-	 * the restriction from thread libraries etc.  -DaveM
+	/* Now align the stack as this is mandatory in the Sparc ABI
+	 * due to how register windows work.  This hides the
+	 * restriction from thread libraries etc.
 	 */
-	csp &= ~7UL;
+	csp &= ~15UL;
 
 	distance = fp - psp;
 	rval = (csp - distance);
--- linux-mvl-dove-2.6.32.orig/arch/sparc/kernel/systbls_64.S
+++ linux-mvl-dove-2.6.32/arch/sparc/kernel/systbls_64.S
@@ -21,7 +21,7 @@
 /*0*/	.word sys_restart_syscall, sys32_exit, sys_fork, sys_read, sys_write
 /*5*/	.word sys32_open, sys_close, sys32_wait4, sys32_creat, sys_link
 /*10*/  .word sys_unlink, sunos_execv, sys_chdir, sys_chown16, sys32_mknod
-/*15*/	.word sys_chmod, sys_lchown16, sys_sparc_brk, sys32_perfctr, sys32_lseek
+/*15*/	.word sys_chmod, sys_lchown16, sys_brk, sys32_perfctr, sys32_lseek
 /*20*/	.word sys_getpid, sys_capget, sys_capset, sys_setuid16, sys_getuid16
 /*25*/	.word sys32_vmsplice, compat_sys_ptrace, sys_alarm, sys32_sigaltstack, sys_pause
 /*30*/	.word compat_sys_utime, sys_lchown, sys_fchown, sys32_access, sys32_nice
@@ -96,7 +96,7 @@
 /*0*/	.word sys_restart_syscall, sparc_exit, sys_fork, sys_read, sys_write
 /*5*/	.word sys_open, sys_close, sys_wait4, sys_creat, sys_link
 /*10*/  .word sys_unlink, sys_nis_syscall, sys_chdir, sys_chown, sys_mknod
-/*15*/	.word sys_chmod, sys_lchown, sys_sparc_brk, sys_perfctr, sys_lseek
+/*15*/	.word sys_chmod, sys_lchown, sys_brk, sys_perfctr, sys_lseek
 /*20*/	.word sys_getpid, sys_capget, sys_capset, sys_setuid, sys_getuid
 /*25*/	.word sys_vmsplice, sys_ptrace, sys_alarm, sys_sigaltstack, sys_nis_syscall
 /*30*/	.word sys_utime, sys_nis_syscall, sys_nis_syscall, sys_access, sys_nice
--- linux-mvl-dove-2.6.32.orig/arch/sparc/kernel/central.c
+++ linux-mvl-dove-2.6.32/arch/sparc/kernel/central.c
@@ -99,7 +99,7 @@
 
 	p->leds_resource.start = (unsigned long)
 		(p->clock_regs + CLOCK_CTRL);
-	p->leds_resource.end = p->leds_resource.end;
+	p->leds_resource.end = p->leds_resource.start;
 	p->leds_resource.name = "leds";
 
 	p->leds_pdev.name = "sunfire-clockboard-leds";
@@ -194,7 +194,7 @@
 	if (!p->central) {
 		p->leds_resource.start = (unsigned long)
 			(p->pregs + FHC_PREGS_CTRL);
-		p->leds_resource.end = p->leds_resource.end;
+		p->leds_resource.end = p->leds_resource.start;
 		p->leds_resource.name = "leds";
 
 		p->leds_pdev.name = "sunfire-fhc-leds";
--- linux-mvl-dove-2.6.32.orig/arch/sparc/kernel/sys_sparc_32.c
+++ linux-mvl-dove-2.6.32/arch/sparc/kernel/sys_sparc_32.c
@@ -45,7 +45,8 @@
 		/* We do not accept a shared mapping if it would violate
 		 * cache aliasing constraints.
 		 */
-		if ((flags & MAP_SHARED) && (addr & (SHMLBA - 1)))
+		if ((flags & MAP_SHARED) &&
+		    ((addr - (pgoff << PAGE_SHIFT)) & (SHMLBA - 1)))
 			return -EINVAL;
 		return addr;
 	}
@@ -79,15 +80,6 @@
 	}
 }
 
-asmlinkage unsigned long sparc_brk(unsigned long brk)
-{
-	if(ARCH_SUN4C) {
-		if ((brk & 0xe0000000) != (current->mm->brk & 0xe0000000))
-			return current->mm->brk;
-	}
-	return sys_brk(brk);
-}
-
 /*
  * sys_pipe() is the normal C calling standard for creating
  * a pipe. It's not the way unix traditionally does this, though.
@@ -234,31 +226,6 @@
 }
 
 /* Linux version of mmap */
-static unsigned long do_mmap2(unsigned long addr, unsigned long len,
-	unsigned long prot, unsigned long flags, unsigned long fd,
-	unsigned long pgoff)
-{
-	struct file * file = NULL;
-	unsigned long retval = -EBADF;
-
-	if (!(flags & MAP_ANONYMOUS)) {
-		file = fget(fd);
-		if (!file)
-			goto out;
-	}
-
-	len = PAGE_ALIGN(len);
-	flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-
-	down_write(&current->mm->mmap_sem);
-	retval = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
-	up_write(&current->mm->mmap_sem);
-
-	if (file)
-		fput(file);
-out:
-	return retval;
-}
 
 asmlinkage unsigned long sys_mmap2(unsigned long addr, unsigned long len,
 	unsigned long prot, unsigned long flags, unsigned long fd,
@@ -266,14 +233,16 @@
 {
 	/* Make sure the shift for mmap2 is constant (12), no matter what PAGE_SIZE
 	   we have. */
-	return do_mmap2(addr, len, prot, flags, fd, pgoff >> (PAGE_SHIFT - 12));
+	return sys_mmap_pgoff(addr, len, prot, flags, fd,
+			      pgoff >> (PAGE_SHIFT - 12));
 }
 
 asmlinkage unsigned long sys_mmap(unsigned long addr, unsigned long len,
 	unsigned long prot, unsigned long flags, unsigned long fd,
 	unsigned long off)
 {
-	return do_mmap2(addr, len, prot, flags, fd, off >> PAGE_SHIFT);
+	/* no alignment check? */
+	return sys_mmap_pgoff(addr, len, prot, flags, fd, off >> PAGE_SHIFT);
 }
 
 long sparc_remap_file_pages(unsigned long start, unsigned long size,
@@ -287,27 +256,6 @@
 				    (pgoff >> (PAGE_SHIFT - 12)), flags);
 }
 
-extern unsigned long do_mremap(unsigned long addr,
-	unsigned long old_len, unsigned long new_len,
-	unsigned long flags, unsigned long new_addr);
-                
-asmlinkage unsigned long sparc_mremap(unsigned long addr,
-	unsigned long old_len, unsigned long new_len,
-	unsigned long flags, unsigned long new_addr)
-{
-	unsigned long ret = -EINVAL;
-
-	if (unlikely(sparc_mmap_check(addr, old_len)))
-		goto out;
-	if (unlikely(sparc_mmap_check(new_addr, new_len)))
-		goto out;
-	down_write(&current->mm->mmap_sem);
-	ret = do_mremap(addr, old_len, new_len, flags, new_addr);
-	up_write(&current->mm->mmap_sem);
-out:
-	return ret;       
-}
-
 /* we come to here via sys_nis_syscall so it can setup the regs argument */
 asmlinkage unsigned long
 c_sys_nis_syscall (struct pt_regs *regs)
--- linux-mvl-dove-2.6.32.orig/arch/sparc/kernel/signal_64.c
+++ linux-mvl-dove-2.6.32/arch/sparc/kernel/signal_64.c
@@ -353,7 +353,7 @@
 /* Checks if the fp is valid */
 static int invalid_frame_pointer(void __user *fp, int fplen)
 {
-	if (((unsigned long) fp) & 7)
+	if (((unsigned long) fp) & 15)
 		return 1;
 	return 0;
 }
@@ -396,18 +396,20 @@
 			sp = current->sas_ss_sp + current->sas_ss_size;
 	}
 
+	sp -= framesize;
+
 	/* Always align the stack frame.  This handles two cases.  First,
 	 * sigaltstack need not be mindful of platform specific stack
 	 * alignment.  Second, if we took this signal because the stack
 	 * is not aligned properly, we'd like to take the signal cleanly
 	 * and report that.
 	 */
-	sp &= ~7UL;
+	sp &= ~15UL;
 
-	return (void __user *)(sp - framesize);
+	return (void __user *) sp;
 }
 
-static inline void
+static inline int
 setup_rt_frame(struct k_sigaction *ka, struct pt_regs *regs,
 	       int signo, sigset_t *oldset, siginfo_t *info)
 {
@@ -481,26 +483,37 @@
 	}
 	/* 4. return to kernel instructions */
 	regs->u_regs[UREG_I7] = (unsigned long)ka->ka_restorer;
-	return;
+	return 0;
 
 sigill:
 	do_exit(SIGILL);
+	return -EINVAL;
+
 sigsegv:
 	force_sigsegv(signo, current);
+	return -EFAULT;
 }
 
-static inline void handle_signal(unsigned long signr, struct k_sigaction *ka,
-				 siginfo_t *info,
-				 sigset_t *oldset, struct pt_regs *regs)
+static inline int handle_signal(unsigned long signr, struct k_sigaction *ka,
+				siginfo_t *info,
+				sigset_t *oldset, struct pt_regs *regs)
 {
-	setup_rt_frame(ka, regs, signr, oldset,
-		       (ka->sa.sa_flags & SA_SIGINFO) ? info : NULL);
+	int err;
+
+	err = setup_rt_frame(ka, regs, signr, oldset,
+			     (ka->sa.sa_flags & SA_SIGINFO) ? info : NULL);
+	if (err)
+		return err;
 	spin_lock_irq(&current->sighand->siglock);
 	sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
 	if (!(ka->sa.sa_flags & SA_NOMASK))
 		sigaddset(&current->blocked,signr);
 	recalc_sigpending();
 	spin_unlock_irq(&current->sighand->siglock);
+
+	tracehook_signal_handler(signr, info, ka, regs, 0);
+
+	return 0;
 }
 
 static inline void syscall_restart(unsigned long orig_i0, struct pt_regs *regs,
@@ -569,16 +582,14 @@
 	if (signr > 0) {
 		if (restart_syscall)
 			syscall_restart(orig_i0, regs, &ka.sa);
-		handle_signal(signr, &ka, &info, oldset, regs);
-
-		/* A signal was successfully delivered; the saved
-		 * sigmask will have been stored in the signal frame,
-		 * and will be restored by sigreturn, so we can simply
-		 * clear the TS_RESTORE_SIGMASK flag.
-		 */
-		current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
-
-		tracehook_signal_handler(signr, &info, &ka, regs, 0);
+		if (handle_signal(signr, &ka, &info, oldset, regs) == 0) {
+			/* A signal was successfully delivered; the saved
+			 * sigmask will have been stored in the signal frame,
+			 * and will be restored by sigreturn, so we can simply
+			 * clear the TS_RESTORE_SIGMASK flag.
+			 */
+			current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
+		}
 		return;
 	}
 	if (restart_syscall &&
@@ -589,12 +600,14 @@
 		regs->u_regs[UREG_I0] = orig_i0;
 		regs->tpc -= 4;
 		regs->tnpc -= 4;
+		pt_regs_clear_syscall(regs);
 	}
 	if (restart_syscall &&
 	    regs->u_regs[UREG_I0] == ERESTART_RESTARTBLOCK) {
 		regs->u_regs[UREG_G1] = __NR_restart_syscall;
 		regs->tpc -= 4;
 		regs->tnpc -= 4;
+		pt_regs_clear_syscall(regs);
 	}
 
 	/* If there's no signal to deliver, we just put the saved sigmask
--- linux-mvl-dove-2.6.32.orig/arch/sparc/kernel/nmi.c
+++ linux-mvl-dove-2.6.32/arch/sparc/kernel/nmi.c
@@ -96,7 +96,6 @@
 	int cpu = smp_processor_id();
 
 	clear_softint(1 << irq);
-	pcr_ops->write(PCR_PIC_PRIV);
 
 	local_cpu_data().__nmi_count++;
 
@@ -105,6 +104,8 @@
 	if (notify_die(DIE_NMI, "nmi", regs, 0,
 		       pt_regs_trap_type(regs), SIGINT) == NOTIFY_STOP)
 		touched = 1;
+	else
+		pcr_ops->write(PCR_PIC_PRIV);
 
 	sum = kstat_irqs_cpu(0, cpu);
 	if (__get_cpu_var(nmi_touch)) {
--- linux-mvl-dove-2.6.32.orig/arch/sparc/kernel/signal_32.c
+++ linux-mvl-dove-2.6.32/arch/sparc/kernel/signal_32.c
@@ -267,15 +267,17 @@
 			sp = current->sas_ss_sp + current->sas_ss_size;
 	}
 
+	sp -= framesize;
+
 	/* Always align the stack frame.  This handles two cases.  First,
 	 * sigaltstack need not be mindful of platform specific stack
 	 * alignment.  Second, if we took this signal because the stack
 	 * is not aligned properly, we'd like to take the signal cleanly
 	 * and report that.
 	 */
-	sp &= ~7UL;
+	sp &= ~15UL;
 
-	return (void __user *)(sp - framesize);
+	return (void __user *) sp;
 }
 
 static inline int
@@ -313,8 +315,8 @@
 	return err;
 }
 
-static void setup_frame(struct k_sigaction *ka, struct pt_regs *regs,
-			int signo, sigset_t *oldset)
+static int setup_frame(struct k_sigaction *ka, struct pt_regs *regs,
+		       int signo, sigset_t *oldset)
 {
 	struct signal_frame __user *sf;
 	int sigframe_size, err;
@@ -382,16 +384,19 @@
 		/* Flush instruction space. */
 		flush_sig_insns(current->mm, (unsigned long) &(sf->insns[0]));
 	}
-	return;
+	return 0;
 
 sigill_and_return:
 	do_exit(SIGILL);
+	return -EINVAL;
+
 sigsegv:
 	force_sigsegv(signo, current);
+	return -EFAULT;
 }
 
-static void setup_rt_frame(struct k_sigaction *ka, struct pt_regs *regs,
-			   int signo, sigset_t *oldset, siginfo_t *info)
+static int setup_rt_frame(struct k_sigaction *ka, struct pt_regs *regs,
+			  int signo, sigset_t *oldset, siginfo_t *info)
 {
 	struct rt_signal_frame __user *sf;
 	int sigframe_size;
@@ -464,22 +469,30 @@
 		/* Flush instruction space. */
 		flush_sig_insns(current->mm, (unsigned long) &(sf->insns[0]));
 	}
-	return;
+	return 0;
 
 sigill:
 	do_exit(SIGILL);
+	return -EINVAL;
+
 sigsegv:
 	force_sigsegv(signo, current);
+	return -EFAULT;
 }
 
-static inline void
+static inline int
 handle_signal(unsigned long signr, struct k_sigaction *ka,
 	      siginfo_t *info, sigset_t *oldset, struct pt_regs *regs)
 {
+	int err;
+
 	if (ka->sa.sa_flags & SA_SIGINFO)
-		setup_rt_frame(ka, regs, signr, oldset, info);
+		err = setup_rt_frame(ka, regs, signr, oldset, info);
 	else
-		setup_frame(ka, regs, signr, oldset);
+		err = setup_frame(ka, regs, signr, oldset);
+
+	if (err)
+		return err;
 
 	spin_lock_irq(&current->sighand->siglock);
 	sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
@@ -487,6 +500,10 @@
 		sigaddset(&current->blocked, signr);
 	recalc_sigpending();
 	spin_unlock_irq(&current->sighand->siglock);
+
+	tracehook_signal_handler(signr, info, ka, regs, 0);
+
+	return 0;
 }
 
 static inline void syscall_restart(unsigned long orig_i0, struct pt_regs *regs,
@@ -544,17 +561,15 @@
 	if (signr > 0) {
 		if (restart_syscall)
 			syscall_restart(orig_i0, regs, &ka.sa);
-		handle_signal(signr, &ka, &info, oldset, regs);
-
-		/* a signal was successfully delivered; the saved
-		 * sigmask will have been stored in the signal frame,
-		 * and will be restored by sigreturn, so we can simply
-		 * clear the TIF_RESTORE_SIGMASK flag.
-		 */
-		if (test_thread_flag(TIF_RESTORE_SIGMASK))
-			clear_thread_flag(TIF_RESTORE_SIGMASK);
-
-		tracehook_signal_handler(signr, &info, &ka, regs, 0);
+		if (handle_signal(signr, &ka, &info, oldset, regs) == 0) {
+			/* a signal was successfully delivered; the saved
+			 * sigmask will have been stored in the signal frame,
+			 * and will be restored by sigreturn, so we can simply
+			 * clear the TIF_RESTORE_SIGMASK flag.
+			 */
+			if (test_thread_flag(TIF_RESTORE_SIGMASK))
+				clear_thread_flag(TIF_RESTORE_SIGMASK);
+		}
 		return;
 	}
 	if (restart_syscall &&
@@ -565,12 +580,14 @@
 		regs->u_regs[UREG_I0] = orig_i0;
 		regs->pc -= 4;
 		regs->npc -= 4;
+		pt_regs_clear_syscall(regs);
 	}
 	if (restart_syscall &&
 	    regs->u_regs[UREG_I0] == ERESTART_RESTARTBLOCK) {
 		regs->u_regs[UREG_G1] = __NR_restart_syscall;
 		regs->pc -= 4;
 		regs->npc -= 4;
+		pt_regs_clear_syscall(regs);
 	}
 
 	/* if there's no signal to deliver, we just put the saved sigmask
--- linux-mvl-dove-2.6.32.orig/arch/sparc/kernel/process_32.c
+++ linux-mvl-dove-2.6.32/arch/sparc/kernel/process_32.c
@@ -526,7 +526,7 @@
 			 * Set some valid stack frames to give to the child.
 			 */
 			childstack = (struct sparc_stackf __user *)
-				(sp & ~0x7UL);
+				(sp & ~0xfUL);
 			parentstack = (struct sparc_stackf __user *)
 				regs->u_regs[UREG_FP];
 
--- linux-mvl-dove-2.6.32.orig/arch/sparc/kernel/systbls_32.S
+++ linux-mvl-dove-2.6.32/arch/sparc/kernel/systbls_32.S
@@ -19,7 +19,7 @@
 /*0*/	.long sys_restart_syscall, sys_exit, sys_fork, sys_read, sys_write
 /*5*/	.long sys_open, sys_close, sys_wait4, sys_creat, sys_link
 /*10*/  .long sys_unlink, sunos_execv, sys_chdir, sys_chown16, sys_mknod
-/*15*/	.long sys_chmod, sys_lchown16, sparc_brk, sys_nis_syscall, sys_lseek
+/*15*/	.long sys_chmod, sys_lchown16, sys_brk, sys_nis_syscall, sys_lseek
 /*20*/	.long sys_getpid, sys_capget, sys_capset, sys_setuid16, sys_getuid16
 /*25*/	.long sys_vmsplice, sys_ptrace, sys_alarm, sys_sigaltstack, sys_pause
 /*30*/	.long sys_utime, sys_lchown, sys_fchown, sys_access, sys_nice
@@ -67,7 +67,7 @@
 /*235*/	.long sys_fstatfs64, sys_llseek, sys_mlock, sys_munlock, sys_mlockall
 /*240*/	.long sys_munlockall, sys_sched_setparam, sys_sched_getparam, sys_sched_setscheduler, sys_sched_getscheduler
 /*245*/	.long sys_sched_yield, sys_sched_get_priority_max, sys_sched_get_priority_min, sys_sched_rr_get_interval, sys_nanosleep
-/*250*/	.long sparc_mremap, sys_sysctl, sys_getsid, sys_fdatasync, sys_nfsservctl
+/*250*/	.long sys_mremap, sys_sysctl, sys_getsid, sys_fdatasync, sys_nfsservctl
 /*255*/	.long sys_sync_file_range, sys_clock_settime, sys_clock_gettime, sys_clock_getres, sys_clock_nanosleep
 /*260*/	.long sys_sched_getaffinity, sys_sched_setaffinity, sys_timer_settime, sys_timer_gettime, sys_timer_getoverrun
 /*265*/	.long sys_timer_delete, sys_timer_create, sys_nis_syscall, sys_io_setup, sys_io_destroy
--- linux-mvl-dove-2.6.32.orig/arch/sparc/kernel/tsb.S
+++ linux-mvl-dove-2.6.32/arch/sparc/kernel/tsb.S
@@ -191,10 +191,12 @@
 
 tsb_itlb_load:
 	/* Executable bit must be set.  */
-661:	andcc		%g5, _PAGE_EXEC_4U, %g0
-	.section	.sun4v_1insn_patch, "ax"
+661:	sethi		%hi(_PAGE_EXEC_4U), %g4
+	andcc		%g5, %g4, %g0
+	.section	.sun4v_2insn_patch, "ax"
 	.word		661b
 	andcc		%g5, _PAGE_EXEC_4V, %g0
+	nop
 	.previous
 
 	be,pn		%xcc, tsb_do_fault
--- linux-mvl-dove-2.6.32.orig/arch/sparc/kernel/sys_sparc_64.c
+++ linux-mvl-dove-2.6.32/arch/sparc/kernel/sys_sparc_64.c
@@ -317,10 +317,14 @@
 unsigned long get_fb_unmapped_area(struct file *filp, unsigned long orig_addr, unsigned long len, unsigned long pgoff, unsigned long flags)
 {
 	unsigned long align_goal, addr = -ENOMEM;
+	unsigned long (*get_area)(struct file *, unsigned long,
+				  unsigned long, unsigned long, unsigned long);
+
+	get_area = current->mm->get_unmapped_area;
 
 	if (flags & MAP_FIXED) {
 		/* Ok, don't mess with it. */
-		return get_unmapped_area(NULL, orig_addr, len, pgoff, flags);
+		return get_area(NULL, orig_addr, len, pgoff, flags);
 	}
 	flags &= ~MAP_SHARED;
 
@@ -333,7 +337,7 @@
 		align_goal = (64UL * 1024);
 
 	do {
-		addr = get_unmapped_area(NULL, orig_addr, len + (align_goal - PAGE_SIZE), pgoff, flags);
+		addr = get_area(NULL, orig_addr, len + (align_goal - PAGE_SIZE), pgoff, flags);
 		if (!(addr & ~PAGE_MASK)) {
 			addr = (addr + (align_goal - 1UL)) & ~(align_goal - 1UL);
 			break;
@@ -351,7 +355,7 @@
 	 * be obtained.
 	 */
 	if (addr & ~PAGE_MASK)
-		addr = get_unmapped_area(NULL, orig_addr, len, pgoff, flags);
+		addr = get_area(NULL, orig_addr, len, pgoff, flags);
 
 	return addr;
 }
@@ -399,18 +403,6 @@
 	}
 }
 
-SYSCALL_DEFINE1(sparc_brk, unsigned long, brk)
-{
-	/* People could try to be nasty and use ta 0x6d in 32bit programs */
-	if (test_thread_flag(TIF_32BIT) && brk >= STACK_TOP32)
-		return current->mm->brk;
-
-	if (unlikely(straddles_64bit_va_hole(current->mm->brk, brk)))
-		return current->mm->brk;
-
-	return sys_brk(brk);
-}
-                                                                
 /*
  * sys_pipe() is the normal C calling standard for creating
  * a pipe. It's not the way unix traditionally does this, though.
@@ -568,23 +560,13 @@
 		unsigned long, prot, unsigned long, flags, unsigned long, fd,
 		unsigned long, off)
 {
-	struct file * file = NULL;
-	unsigned long retval = -EBADF;
-
-	if (!(flags & MAP_ANONYMOUS)) {
-		file = fget(fd);
-		if (!file)
-			goto out;
-	}
-	flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-	len = PAGE_ALIGN(len);
+	unsigned long retval = -EINVAL;
 
-	down_write(&current->mm->mmap_sem);
-	retval = do_mmap(file, addr, len, prot, flags, off);
-	up_write(&current->mm->mmap_sem);
-
-	if (file)
-		fput(file);
+	if ((off + PAGE_ALIGN(len)) < off)
+		goto out;
+	if (off & ~PAGE_MASK)
+		goto out;
+	retval = sys_mmap_pgoff(addr, len, prot, flags, fd, off >> PAGE_SHIFT);
 out:
 	return retval;
 }
@@ -614,12 +596,6 @@
 
 	if (test_thread_flag(TIF_32BIT))
 		goto out;
-	if (unlikely(new_len >= VA_EXCLUDE_START))
-		goto out;
-	if (unlikely(sparc_mmap_check(addr, old_len)))
-		goto out;
-	if (unlikely(sparc_mmap_check(new_addr, new_len)))
-		goto out;
 
 	down_write(&current->mm->mmap_sem);
 	ret = do_mremap(addr, old_len, new_len, flags, new_addr);
--- linux-mvl-dove-2.6.32.orig/arch/sparc/kernel/signal32.c
+++ linux-mvl-dove-2.6.32/arch/sparc/kernel/signal32.c
@@ -120,8 +120,8 @@
 };
 
 /* Align macros */
-#define SF_ALIGNEDSZ  (((sizeof(struct signal_frame32) + 7) & (~7)))
-#define RT_ALIGNEDSZ  (((sizeof(struct rt_signal_frame32) + 7) & (~7)))
+#define SF_ALIGNEDSZ  (((sizeof(struct signal_frame32) + 15) & (~15)))
+#define RT_ALIGNEDSZ  (((sizeof(struct rt_signal_frame32) + 15) & (~15)))
 
 int copy_siginfo_to_user32(compat_siginfo_t __user *to, siginfo_t *from)
 {
@@ -420,15 +420,17 @@
 			sp = current->sas_ss_sp + current->sas_ss_size;
 	}
 
+	sp -= framesize;
+
 	/* Always align the stack frame.  This handles two cases.  First,
 	 * sigaltstack need not be mindful of platform specific stack
 	 * alignment.  Second, if we took this signal because the stack
 	 * is not aligned properly, we'd like to take the signal cleanly
 	 * and report that.
 	 */
-	sp &= ~7UL;
+	sp &= ~15UL;
 
-	return (void __user *)(sp - framesize);
+	return (void __user *) sp;
 }
 
 static int save_fpu_state32(struct pt_regs *regs, __siginfo_fpu_t __user *fpu)
@@ -451,8 +453,66 @@
 	return err;
 }
 
-static void setup_frame32(struct k_sigaction *ka, struct pt_regs *regs,
-			  int signo, sigset_t *oldset)
+/* The I-cache flush instruction only works in the primary ASI, which
+ * right now is the nucleus, aka. kernel space.
+ *
+ * Therefore we have to kick the instructions out using the kernel
+ * side linear mapping of the physical address backing the user
+ * instructions.
+ */
+static void flush_signal_insns(unsigned long address)
+{
+	unsigned long pstate, paddr;
+	pte_t *ptep, pte;
+	pgd_t *pgdp;
+	pud_t *pudp;
+	pmd_t *pmdp;
+
+	/* Commit all stores of the instructions we are about to flush.  */
+	wmb();
+
+	/* Disable cross-call reception.  In this way even a very wide
+	 * munmap() on another cpu can't tear down the page table
+	 * hierarchy from underneath us, since that can't complete
+	 * until the IPI tlb flush returns.
+	 */
+
+	__asm__ __volatile__("rdpr %%pstate, %0" : "=r" (pstate));
+	__asm__ __volatile__("wrpr %0, %1, %%pstate"
+				: : "r" (pstate), "i" (PSTATE_IE));
+
+	pgdp = pgd_offset(current->mm, address);
+	if (pgd_none(*pgdp))
+		goto out_irqs_on;
+	pudp = pud_offset(pgdp, address);
+	if (pud_none(*pudp))
+		goto out_irqs_on;
+	pmdp = pmd_offset(pudp, address);
+	if (pmd_none(*pmdp))
+		goto out_irqs_on;
+
+	ptep = pte_offset_map(pmdp, address);
+	pte = *ptep;
+	if (!pte_present(pte))
+		goto out_unmap;
+
+	paddr = (unsigned long) page_address(pte_page(pte));
+
+	__asm__ __volatile__("flush	%0 + %1"
+			     : /* no outputs */
+			     : "r" (paddr),
+			       "r" (address & (PAGE_SIZE - 1))
+			     : "memory");
+
+out_unmap:
+	pte_unmap(ptep);
+out_irqs_on:
+	__asm__ __volatile__("wrpr %0, 0x0, %%pstate" : : "r" (pstate));
+
+}
+
+static int setup_frame32(struct k_sigaction *ka, struct pt_regs *regs,
+			 int signo, sigset_t *oldset)
 {
 	struct signal_frame32 __user *sf;
 	int sigframe_size;
@@ -545,13 +605,7 @@
 	if (ka->ka_restorer) {
 		regs->u_regs[UREG_I7] = (unsigned long)ka->ka_restorer;
 	} else {
-		/* Flush instruction space. */
 		unsigned long address = ((unsigned long)&(sf->insns[0]));
-		pgd_t *pgdp = pgd_offset(current->mm, address);
-		pud_t *pudp = pud_offset(pgdp, address);
-		pmd_t *pmdp = pmd_offset(pudp, address);
-		pte_t *ptep;
-		pte_t pte;
 
 		regs->u_regs[UREG_I7] = (unsigned long) (&(sf->insns[0]) - 2);
 	
@@ -560,34 +614,22 @@
 		if (err)
 			goto sigsegv;
 
-		preempt_disable();
-		ptep = pte_offset_map(pmdp, address);
-		pte = *ptep;
-		if (pte_present(pte)) {
-			unsigned long page = (unsigned long)
-				page_address(pte_page(pte));
-
-			wmb();
-			__asm__ __volatile__("flush	%0 + %1"
-					     : /* no outputs */
-					     : "r" (page),
-					       "r" (address & (PAGE_SIZE - 1))
-					     : "memory");
-		}
-		pte_unmap(ptep);
-		preempt_enable();
+		flush_signal_insns(address);
 	}
-	return;
+	return 0;
 
 sigill:
 	do_exit(SIGILL);
+	return -EINVAL;
+
 sigsegv:
 	force_sigsegv(signo, current);
+	return -EFAULT;
 }
 
-static void setup_rt_frame32(struct k_sigaction *ka, struct pt_regs *regs,
-			     unsigned long signr, sigset_t *oldset,
-			     siginfo_t *info)
+static int setup_rt_frame32(struct k_sigaction *ka, struct pt_regs *regs,
+			    unsigned long signr, sigset_t *oldset,
+			    siginfo_t *info)
 {
 	struct rt_signal_frame32 __user *sf;
 	int sigframe_size;
@@ -685,12 +727,7 @@
 	if (ka->ka_restorer)
 		regs->u_regs[UREG_I7] = (unsigned long)ka->ka_restorer;
 	else {
-		/* Flush instruction space. */
 		unsigned long address = ((unsigned long)&(sf->insns[0]));
-		pgd_t *pgdp = pgd_offset(current->mm, address);
-		pud_t *pudp = pud_offset(pgdp, address);
-		pmd_t *pmdp = pmd_offset(pudp, address);
-		pte_t *ptep;
 
 		regs->u_regs[UREG_I7] = (unsigned long) (&(sf->insns[0]) - 2);
 	
@@ -702,38 +739,32 @@
 		if (err)
 			goto sigsegv;
 
-		preempt_disable();
-		ptep = pte_offset_map(pmdp, address);
-		if (pte_present(*ptep)) {
-			unsigned long page = (unsigned long)
-				page_address(pte_page(*ptep));
-
-			wmb();
-			__asm__ __volatile__("flush	%0 + %1"
-					     : /* no outputs */
-					     : "r" (page),
-					       "r" (address & (PAGE_SIZE - 1))
-					     : "memory");
-		}
-		pte_unmap(ptep);
-		preempt_enable();
+		flush_signal_insns(address);
 	}
-	return;
+	return 0;
 
 sigill:
 	do_exit(SIGILL);
+	return -EINVAL;
+
 sigsegv:
 	force_sigsegv(signr, current);
+	return -EFAULT;
 }
 
-static inline void handle_signal32(unsigned long signr, struct k_sigaction *ka,
-				   siginfo_t *info,
-				   sigset_t *oldset, struct pt_regs *regs)
+static inline int handle_signal32(unsigned long signr, struct k_sigaction *ka,
+				  siginfo_t *info,
+				  sigset_t *oldset, struct pt_regs *regs)
 {
+	int err;
+
 	if (ka->sa.sa_flags & SA_SIGINFO)
-		setup_rt_frame32(ka, regs, signr, oldset, info);
+		err = setup_rt_frame32(ka, regs, signr, oldset, info);
 	else
-		setup_frame32(ka, regs, signr, oldset);
+		err = setup_frame32(ka, regs, signr, oldset);
+
+	if (err)
+		return err;
 
 	spin_lock_irq(&current->sighand->siglock);
 	sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
@@ -741,6 +772,10 @@
 		sigaddset(&current->blocked,signr);
 	recalc_sigpending();
 	spin_unlock_irq(&current->sighand->siglock);
+
+	tracehook_signal_handler(signr, info, ka, regs, 0);
+
+	return 0;
 }
 
 static inline void syscall_restart32(unsigned long orig_i0, struct pt_regs *regs,
@@ -787,16 +822,14 @@
 	if (signr > 0) {
 		if (restart_syscall)
 			syscall_restart32(orig_i0, regs, &ka.sa);
-		handle_signal32(signr, &ka, &info, oldset, regs);
-
-		/* A signal was successfully delivered; the saved
-		 * sigmask will have been stored in the signal frame,
-		 * and will be restored by sigreturn, so we can simply
-		 * clear the TS_RESTORE_SIGMASK flag.
-		 */
-		current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
-
-		tracehook_signal_handler(signr, &info, &ka, regs, 0);
+		if (handle_signal32(signr, &ka, &info, oldset, regs) == 0) {
+			/* A signal was successfully delivered; the saved
+			 * sigmask will have been stored in the signal frame,
+			 * and will be restored by sigreturn, so we can simply
+			 * clear the TS_RESTORE_SIGMASK flag.
+			 */
+			current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
+		}
 		return;
 	}
 	if (restart_syscall &&
@@ -807,12 +840,14 @@
 		regs->u_regs[UREG_I0] = orig_i0;
 		regs->tpc -= 4;
 		regs->tnpc -= 4;
+		pt_regs_clear_syscall(regs);
 	}
 	if (restart_syscall &&
 	    regs->u_regs[UREG_I0] == ERESTART_RESTARTBLOCK) {
 		regs->u_regs[UREG_G1] = __NR_restart_syscall;
 		regs->tpc -= 4;
 		regs->tnpc -= 4;
+		pt_regs_clear_syscall(regs);
 	}
 
 	/* If there's no signal to deliver, we just put the saved sigmask
--- linux-mvl-dove-2.6.32.orig/arch/sparc/kernel/of_device_64.c
+++ linux-mvl-dove-2.6.32/arch/sparc/kernel/of_device_64.c
@@ -104,9 +104,19 @@
 	int i;
 
 	/* Check address type match */
-	if ((addr[0] ^ range[0]) & 0x03000000)
-		return -EINVAL;
+	if (!((addr[0] ^ range[0]) & 0x03000000))
+		goto type_match;
+
+	/* Special exception, we can map a 64-bit address into
+	 * a 32-bit range.
+	 */
+	if ((addr[0] & 0x03000000) == 0x03000000 &&
+	    (range[0] & 0x03000000) == 0x02000000)
+		goto type_match;
+
+	return -EINVAL;
 
+type_match:
 	if (of_out_of_range(addr + 1, range + 1, range + na + pna,
 			    na - 1, ns))
 		return -EINVAL;
--- linux-mvl-dove-2.6.32.orig/arch/sparc/kernel/ldc.c
+++ linux-mvl-dove-2.6.32/arch/sparc/kernel/ldc.c
@@ -1242,13 +1242,13 @@
 	snprintf(lp->tx_irq_name, LDC_IRQ_NAME_MAX, "%s TX", name);
 
 	err = request_irq(lp->cfg.rx_irq, ldc_rx,
-			  IRQF_SAMPLE_RANDOM | IRQF_DISABLED | IRQF_SHARED,
+			  IRQF_SAMPLE_RANDOM | IRQF_DISABLED,
 			  lp->rx_irq_name, lp);
 	if (err)
 		return err;
 
 	err = request_irq(lp->cfg.tx_irq, ldc_tx,
-			  IRQF_SAMPLE_RANDOM | IRQF_DISABLED | IRQF_SHARED,
+			  IRQF_SAMPLE_RANDOM | IRQF_DISABLED,
 			  lp->tx_irq_name, lp);
 	if (err) {
 		free_irq(lp->cfg.rx_irq, lp);
--- linux-mvl-dove-2.6.32.orig/arch/sparc/kernel/perf_event.c
+++ linux-mvl-dove-2.6.32/arch/sparc/kernel/perf_event.c
@@ -986,6 +986,17 @@
 	data.addr = 0;
 
 	cpuc = &__get_cpu_var(cpu_hw_events);
+
+	/* If the PMU has the TOE IRQ enable bits, we need to do a
+	 * dummy write to the %pcr to clear the overflow bits and thus
+	 * the interrupt.
+	 *
+	 * Do this before we peek at the counters to determine
+	 * overflow so we don't lose any events.
+	 */
+	if (sparc_pmu->irq_bit)
+		pcr_ops->write(cpuc->pcr);
+
 	for (idx = 0; idx < MAX_HWEVENTS; idx++) {
 		struct perf_event *event = cpuc->events[idx];
 		struct hw_perf_event *hwc;
--- linux-mvl-dove-2.6.32.orig/arch/sparc/prom/misc_64.c
+++ linux-mvl-dove-2.6.32/arch/sparc/prom/misc_64.c
@@ -20,10 +20,17 @@
 
 int prom_service_exists(const char *service_name)
 {
-	int err = p1275_cmd("test", P1275_ARG(0, P1275_ARG_IN_STRING) |
-			    P1275_INOUT(1, 1), service_name);
+	unsigned long args[5];
 
-	if (err)
+	args[0] = (unsigned long) "test";
+	args[1] = 1;
+	args[2] = 1;
+	args[3] = (unsigned long) service_name;
+	args[4] = (unsigned long) -1;
+
+	p1275_cmd_direct(args);
+
+	if (args[4])
 		return 0;
 	return 1;
 }
@@ -31,30 +38,47 @@
 void prom_sun4v_guest_soft_state(void)
 {
 	const char *svc = "SUNW,soft-state-supported";
+	unsigned long args[3];
 
 	if (!prom_service_exists(svc))
 		return;
-	p1275_cmd(svc, P1275_INOUT(0, 0));
+	args[0] = (unsigned long) svc;
+	args[1] = 0;
+	args[2] = 0;
+	p1275_cmd_direct(args);
 }
 
 /* Reset and reboot the machine with the command 'bcommand'. */
 void prom_reboot(const char *bcommand)
 {
+	unsigned long args[4];
+
 #ifdef CONFIG_SUN_LDOMS
 	if (ldom_domaining_enabled)
 		ldom_reboot(bcommand);
 #endif
-	p1275_cmd("boot", P1275_ARG(0, P1275_ARG_IN_STRING) |
-		  P1275_INOUT(1, 0), bcommand);
+	args[0] = (unsigned long) "boot";
+	args[1] = 1;
+	args[2] = 0;
+	args[3] = (unsigned long) bcommand;
+
+	p1275_cmd_direct(args);
 }
 
 /* Forth evaluate the expression contained in 'fstring'. */
 void prom_feval(const char *fstring)
 {
+	unsigned long args[5];
+
 	if (!fstring || fstring[0] == 0)
 		return;
-	p1275_cmd("interpret", P1275_ARG(0, P1275_ARG_IN_STRING) |
-		  P1275_INOUT(1, 1), fstring);
+	args[0] = (unsigned long) "interpret";
+	args[1] = 1;
+	args[2] = 1;
+	args[3] = (unsigned long) fstring;
+	args[4] = (unsigned long) -1;
+
+	p1275_cmd_direct(args);
 }
 EXPORT_SYMBOL(prom_feval);
 
@@ -68,6 +92,7 @@
  */
 void prom_cmdline(void)
 {
+	unsigned long args[3];
 	unsigned long flags;
 
 	local_irq_save(flags);
@@ -76,7 +101,11 @@
 	smp_capture();
 #endif
 
-	p1275_cmd("enter", P1275_INOUT(0, 0));
+	args[0] = (unsigned long) "enter";
+	args[1] = 0;
+	args[2] = 0;
+
+	p1275_cmd_direct(args);
 
 #ifdef CONFIG_SMP
 	smp_release();
@@ -90,22 +119,32 @@
  */
 void notrace prom_halt(void)
 {
+	unsigned long args[3];
+
 #ifdef CONFIG_SUN_LDOMS
 	if (ldom_domaining_enabled)
 		ldom_power_off();
 #endif
 again:
-	p1275_cmd("exit", P1275_INOUT(0, 0));
+	args[0] = (unsigned long) "exit";
+	args[1] = 0;
+	args[2] = 0;
+	p1275_cmd_direct(args);
 	goto again; /* PROM is out to get me -DaveM */
 }
 
 void prom_halt_power_off(void)
 {
+	unsigned long args[3];
+
 #ifdef CONFIG_SUN_LDOMS
 	if (ldom_domaining_enabled)
 		ldom_power_off();
 #endif
-	p1275_cmd("SUNW,power-off", P1275_INOUT(0, 0));
+	args[0] = (unsigned long) "SUNW,power-off";
+	args[1] = 0;
+	args[2] = 0;
+	p1275_cmd_direct(args);
 
 	/* if nothing else helps, we just halt */
 	prom_halt();
@@ -114,10 +153,15 @@
 /* Set prom sync handler to call function 'funcp'. */
 void prom_setcallback(callback_func_t funcp)
 {
+	unsigned long args[5];
 	if (!funcp)
 		return;
-	p1275_cmd("set-callback", P1275_ARG(0, P1275_ARG_IN_FUNCTION) |
-		  P1275_INOUT(1, 1), funcp);
+	args[0] = (unsigned long) "set-callback";
+	args[1] = 1;
+	args[2] = 1;
+	args[3] = (unsigned long) funcp;
+	args[4] = (unsigned long) -1;
+	p1275_cmd_direct(args);
 }
 
 /* Get the idprom and stuff it into buffer 'idbuf'.  Returns the
@@ -173,57 +217,61 @@
 }
 
 /* Load explicit I/D TLB entries. */
+static long tlb_load(const char *type, unsigned long index,
+		     unsigned long tte_data, unsigned long vaddr)
+{
+	unsigned long args[9];
+
+	args[0] = (unsigned long) prom_callmethod_name;
+	args[1] = 5;
+	args[2] = 1;
+	args[3] = (unsigned long) type;
+	args[4] = (unsigned int) prom_get_mmu_ihandle();
+	args[5] = vaddr;
+	args[6] = tte_data;
+	args[7] = index;
+	args[8] = (unsigned long) -1;
+
+	p1275_cmd_direct(args);
+
+	return (long) args[8];
+}
+
 long prom_itlb_load(unsigned long index,
 		    unsigned long tte_data,
 		    unsigned long vaddr)
 {
-	return p1275_cmd(prom_callmethod_name,
-			 (P1275_ARG(0, P1275_ARG_IN_STRING) |
-			  P1275_ARG(2, P1275_ARG_IN_64B) |
-			  P1275_ARG(3, P1275_ARG_IN_64B) |
-			  P1275_INOUT(5, 1)),
-			 "SUNW,itlb-load",
-			 prom_get_mmu_ihandle(),
-			 /* And then our actual args are pushed backwards. */
-			 vaddr,
-			 tte_data,
-			 index);
+	return tlb_load("SUNW,itlb-load", index, tte_data, vaddr);
 }
 
 long prom_dtlb_load(unsigned long index,
 		    unsigned long tte_data,
 		    unsigned long vaddr)
 {
-	return p1275_cmd(prom_callmethod_name,
-			 (P1275_ARG(0, P1275_ARG_IN_STRING) |
-			  P1275_ARG(2, P1275_ARG_IN_64B) |
-			  P1275_ARG(3, P1275_ARG_IN_64B) |
-			  P1275_INOUT(5, 1)),
-			 "SUNW,dtlb-load",
-			 prom_get_mmu_ihandle(),
-			 /* And then our actual args are pushed backwards. */
-			 vaddr,
-			 tte_data,
-			 index);
+	return tlb_load("SUNW,dtlb-load", index, tte_data, vaddr);
 }
 
 int prom_map(int mode, unsigned long size,
 	     unsigned long vaddr, unsigned long paddr)
 {
-	int ret = p1275_cmd(prom_callmethod_name,
-			    (P1275_ARG(0, P1275_ARG_IN_STRING) |
-			     P1275_ARG(3, P1275_ARG_IN_64B) |
-			     P1275_ARG(4, P1275_ARG_IN_64B) |
-			     P1275_ARG(6, P1275_ARG_IN_64B) |
-			     P1275_INOUT(7, 1)),
-			    prom_map_name,
-			    prom_get_mmu_ihandle(),
-			    mode,
-			    size,
-			    vaddr,
-			    0,
-			    paddr);
+	unsigned long args[11];
+	int ret;
 
+	args[0] = (unsigned long) prom_callmethod_name;
+	args[1] = 7;
+	args[2] = 1;
+	args[3] = (unsigned long) prom_map_name;
+	args[4] = (unsigned int) prom_get_mmu_ihandle();
+	args[5] = (unsigned int) mode;
+	args[6] = size;
+	args[7] = vaddr;
+	args[8] = 0;
+	args[9] = paddr;
+	args[10] = (unsigned long) -1;
+
+	p1275_cmd_direct(args);
+
+	ret = (int) args[10];
 	if (ret == 0)
 		ret = -1;
 	return ret;
@@ -231,40 +279,51 @@
 
 void prom_unmap(unsigned long size, unsigned long vaddr)
 {
-	p1275_cmd(prom_callmethod_name,
-		  (P1275_ARG(0, P1275_ARG_IN_STRING) |
-		   P1275_ARG(2, P1275_ARG_IN_64B) |
-		   P1275_ARG(3, P1275_ARG_IN_64B) |
-		   P1275_INOUT(4, 0)),
-		  prom_unmap_name,
-		  prom_get_mmu_ihandle(),
-		  size,
-		  vaddr);
+	unsigned long args[7];
+
+	args[0] = (unsigned long) prom_callmethod_name;
+	args[1] = 4;
+	args[2] = 0;
+	args[3] = (unsigned long) prom_unmap_name;
+	args[4] = (unsigned int) prom_get_mmu_ihandle();
+	args[5] = size;
+	args[6] = vaddr;
+
+	p1275_cmd_direct(args);
 }
 
 /* Set aside physical memory which is not touched or modified
  * across soft resets.
  */
-unsigned long prom_retain(const char *name,
-			  unsigned long pa_low, unsigned long pa_high,
-			  long size, long align)
-{
-	/* XXX I don't think we return multiple values correctly.
-	 * XXX OBP supposedly returns pa_low/pa_high here, how does
-	 * XXX it work?
-	 */
+int prom_retain(const char *name, unsigned long size,
+		unsigned long align, unsigned long *paddr)
+{
+	unsigned long args[11];
 
-	/* If align is zero, the pa_low/pa_high args are passed,
-	 * else they are not.
+	args[0] = (unsigned long) prom_callmethod_name;
+	args[1] = 5;
+	args[2] = 3;
+	args[3] = (unsigned long) "SUNW,retain";
+	args[4] = (unsigned int) prom_get_memory_ihandle();
+	args[5] = align;
+	args[6] = size;
+	args[7] = (unsigned long) name;
+	args[8] = (unsigned long) -1;
+	args[9] = (unsigned long) -1;
+	args[10] = (unsigned long) -1;
+
+	p1275_cmd_direct(args);
+
+	if (args[8])
+		return (int) args[8];
+
+	/* Next we get "phys_high" then "phys_low".  On 64-bit
+	 * the phys_high cell is don't care since the phys_low
+	 * cell has the full value.
 	 */
-	if (align == 0)
-		return p1275_cmd("SUNW,retain",
-				 (P1275_ARG(0, P1275_ARG_IN_BUF) | P1275_INOUT(5, 2)),
-				 name, pa_low, pa_high, size, align);
-	else
-		return p1275_cmd("SUNW,retain",
-				 (P1275_ARG(0, P1275_ARG_IN_BUF) | P1275_INOUT(3, 2)),
-				 name, size, align);
+	*paddr = args[10];
+
+	return 0;
 }
 
 /* Get "Unumber" string for the SIMM at the given
@@ -277,62 +336,129 @@
 		    unsigned long phys_addr,
 		    char *buf, int buflen)
 {
-	return p1275_cmd(prom_callmethod_name,
-			 (P1275_ARG(0, P1275_ARG_IN_STRING)	|
-			  P1275_ARG(3, P1275_ARG_OUT_BUF)	|
-			  P1275_ARG(6, P1275_ARG_IN_64B)	|
-			  P1275_INOUT(8, 2)),
-			 "SUNW,get-unumber", prom_get_memory_ihandle(),
-			 buflen, buf, P1275_SIZE(buflen),
-			 0, phys_addr, syndrome_code);
+	unsigned long args[12];
+
+	args[0] = (unsigned long) prom_callmethod_name;
+	args[1] = 7;
+	args[2] = 2;
+	args[3] = (unsigned long) "SUNW,get-unumber";
+	args[4] = (unsigned int) prom_get_memory_ihandle();
+	args[5] = buflen;
+	args[6] = (unsigned long) buf;
+	args[7] = 0;
+	args[8] = phys_addr;
+	args[9] = (unsigned int) syndrome_code;
+	args[10] = (unsigned long) -1;
+	args[11] = (unsigned long) -1;
+
+	p1275_cmd_direct(args);
+
+	return (int) args[10];
 }
 
 /* Power management extensions. */
 void prom_sleepself(void)
 {
-	p1275_cmd("SUNW,sleep-self", P1275_INOUT(0, 0));
+	unsigned long args[3];
+
+	args[0] = (unsigned long) "SUNW,sleep-self";
+	args[1] = 0;
+	args[2] = 0;
+	p1275_cmd_direct(args);
 }
 
 int prom_sleepsystem(void)
 {
-	return p1275_cmd("SUNW,sleep-system", P1275_INOUT(0, 1));
+	unsigned long args[4];
+
+	args[0] = (unsigned long) "SUNW,sleep-system";
+	args[1] = 0;
+	args[2] = 1;
+	args[3] = (unsigned long) -1;
+	p1275_cmd_direct(args);
+
+	return (int) args[3];
 }
 
 int prom_wakeupsystem(void)
 {
-	return p1275_cmd("SUNW,wakeup-system", P1275_INOUT(0, 1));
+	unsigned long args[4];
+
+	args[0] = (unsigned long) "SUNW,wakeup-system";
+	args[1] = 0;
+	args[2] = 1;
+	args[3] = (unsigned long) -1;
+	p1275_cmd_direct(args);
+
+	return (int) args[3];
 }
 
 #ifdef CONFIG_SMP
 void prom_startcpu(int cpunode, unsigned long pc, unsigned long arg)
 {
-	p1275_cmd("SUNW,start-cpu", P1275_INOUT(3, 0), cpunode, pc, arg);
+	unsigned long args[6];
+
+	args[0] = (unsigned long) "SUNW,start-cpu";
+	args[1] = 3;
+	args[2] = 0;
+	args[3] = (unsigned int) cpunode;
+	args[4] = pc;
+	args[5] = arg;
+	p1275_cmd_direct(args);
 }
 
 void prom_startcpu_cpuid(int cpuid, unsigned long pc, unsigned long arg)
 {
-	p1275_cmd("SUNW,start-cpu-by-cpuid", P1275_INOUT(3, 0),
-		  cpuid, pc, arg);
+	unsigned long args[6];
+
+	args[0] = (unsigned long) "SUNW,start-cpu-by-cpuid";
+	args[1] = 3;
+	args[2] = 0;
+	args[3] = (unsigned int) cpuid;
+	args[4] = pc;
+	args[5] = arg;
+	p1275_cmd_direct(args);
 }
 
 void prom_stopcpu_cpuid(int cpuid)
 {
-	p1275_cmd("SUNW,stop-cpu-by-cpuid", P1275_INOUT(1, 0),
-		  cpuid);
+	unsigned long args[4];
+
+	args[0] = (unsigned long) "SUNW,stop-cpu-by-cpuid";
+	args[1] = 1;
+	args[2] = 0;
+	args[3] = (unsigned int) cpuid;
+	p1275_cmd_direct(args);
 }
 
 void prom_stopself(void)
 {
-	p1275_cmd("SUNW,stop-self", P1275_INOUT(0, 0));
+	unsigned long args[3];
+
+	args[0] = (unsigned long) "SUNW,stop-self";
+	args[1] = 0;
+	args[2] = 0;
+	p1275_cmd_direct(args);
 }
 
 void prom_idleself(void)
 {
-	p1275_cmd("SUNW,idle-self", P1275_INOUT(0, 0));
+	unsigned long args[3];
+
+	args[0] = (unsigned long) "SUNW,idle-self";
+	args[1] = 0;
+	args[2] = 0;
+	p1275_cmd_direct(args);
 }
 
 void prom_resumecpu(int cpunode)
 {
-	p1275_cmd("SUNW,resume-cpu", P1275_INOUT(1, 0), cpunode);
+	unsigned long args[4];
+
+	args[0] = (unsigned long) "SUNW,resume-cpu";
+	args[1] = 1;
+	args[2] = 0;
+	args[3] = (unsigned int) cpunode;
+	p1275_cmd_direct(args);
 }
 #endif
--- linux-mvl-dove-2.6.32.orig/arch/sparc/prom/p1275.c
+++ linux-mvl-dove-2.6.32/arch/sparc/prom/p1275.c
@@ -22,126 +22,32 @@
 	long prom_callback;			/* 0x00 */
 	void (*prom_cif_handler)(long *);	/* 0x08 */
 	unsigned long prom_cif_stack;		/* 0x10 */
-	unsigned long prom_args [23];		/* 0x18 */
-	char prom_buffer [3000];
 } p1275buf;
 
 extern void prom_world(int);
 
-extern void prom_cif_interface(void);
+extern void prom_cif_direct(unsigned long *args);
 extern void prom_cif_callback(void);
 
 /*
- * This provides SMP safety on the p1275buf. prom_callback() drops this lock
- * to allow recursuve acquisition.
+ * This provides SMP safety on the p1275buf.
  */
 DEFINE_SPINLOCK(prom_entry_lock);
 
-long p1275_cmd(const char *service, long fmt, ...)
+void p1275_cmd_direct(unsigned long *args)
 {
-	char *p, *q;
 	unsigned long flags;
-	int nargs, nrets, i;
-	va_list list;
-	long attrs, x;
-	
-	p = p1275buf.prom_buffer;
-
-	spin_lock_irqsave(&prom_entry_lock, flags);
-
-	p1275buf.prom_args[0] = (unsigned long)p;		/* service */
-	strcpy (p, service);
-	p = (char *)(((long)(strchr (p, 0) + 8)) & ~7);
-	p1275buf.prom_args[1] = nargs = (fmt & 0x0f);		/* nargs */
-	p1275buf.prom_args[2] = nrets = ((fmt & 0xf0) >> 4); 	/* nrets */
-	attrs = fmt >> 8;
-	va_start(list, fmt);
-	for (i = 0; i < nargs; i++, attrs >>= 3) {
-		switch (attrs & 0x7) {
-		case P1275_ARG_NUMBER:
-			p1275buf.prom_args[i + 3] =
-						(unsigned)va_arg(list, long);
-			break;
-		case P1275_ARG_IN_64B:
-			p1275buf.prom_args[i + 3] =
-				va_arg(list, unsigned long);
-			break;
-		case P1275_ARG_IN_STRING:
-			strcpy (p, va_arg(list, char *));
-			p1275buf.prom_args[i + 3] = (unsigned long)p;
-			p = (char *)(((long)(strchr (p, 0) + 8)) & ~7);
-			break;
-		case P1275_ARG_OUT_BUF:
-			(void) va_arg(list, char *);
-			p1275buf.prom_args[i + 3] = (unsigned long)p;
-			x = va_arg(list, long);
-			i++; attrs >>= 3;
-			p = (char *)(((long)(p + (int)x + 7)) & ~7);
-			p1275buf.prom_args[i + 3] = x;
-			break;
-		case P1275_ARG_IN_BUF:
-			q = va_arg(list, char *);
-			p1275buf.prom_args[i + 3] = (unsigned long)p;
-			x = va_arg(list, long);
-			i++; attrs >>= 3;
-			memcpy (p, q, (int)x);
-			p = (char *)(((long)(p + (int)x + 7)) & ~7);
-			p1275buf.prom_args[i + 3] = x;
-			break;
-		case P1275_ARG_OUT_32B:
-			(void) va_arg(list, char *);
-			p1275buf.prom_args[i + 3] = (unsigned long)p;
-			p += 32;
-			break;
-		case P1275_ARG_IN_FUNCTION:
-			p1275buf.prom_args[i + 3] =
-					(unsigned long)prom_cif_callback;
-			p1275buf.prom_callback = va_arg(list, long);
-			break;
-		}
-	}
-	va_end(list);
+
+	raw_local_save_flags(flags);
+	raw_local_irq_restore(PIL_NMI);
+	spin_lock(&prom_entry_lock);
 
 	prom_world(1);
-	prom_cif_interface();
+	prom_cif_direct(args);
 	prom_world(0);
 
-	attrs = fmt >> 8;
-	va_start(list, fmt);
-	for (i = 0; i < nargs; i++, attrs >>= 3) {
-		switch (attrs & 0x7) {
-		case P1275_ARG_NUMBER:
-			(void) va_arg(list, long);
-			break;
-		case P1275_ARG_IN_STRING:
-			(void) va_arg(list, char *);
-			break;
-		case P1275_ARG_IN_FUNCTION:
-			(void) va_arg(list, long);
-			break;
-		case P1275_ARG_IN_BUF:
-			(void) va_arg(list, char *);
-			(void) va_arg(list, long);
-			i++; attrs >>= 3;
-			break;
-		case P1275_ARG_OUT_BUF:
-			p = va_arg(list, char *);
-			x = va_arg(list, long);
-			memcpy (p, (char *)(p1275buf.prom_args[i + 3]), (int)x);
-			i++; attrs >>= 3;
-			break;
-		case P1275_ARG_OUT_32B:
-			p = va_arg(list, char *);
-			memcpy (p, (char *)(p1275buf.prom_args[i + 3]), 32);
-			break;
-		}
-	}
-	va_end(list);
-	x = p1275buf.prom_args [nargs + 3];
-
-	spin_unlock_irqrestore(&prom_entry_lock, flags);
-
-	return x;
+	spin_unlock(&prom_entry_lock);
+	raw_local_irq_restore(flags);
 }
 
 void prom_cif_init(void *cif_handler, void *cif_stack)
--- linux-mvl-dove-2.6.32.orig/arch/sparc/prom/tree_64.c
+++ linux-mvl-dove-2.6.32/arch/sparc/prom/tree_64.c
@@ -16,22 +16,39 @@
 #include <asm/oplib.h>
 #include <asm/ldc.h>
 
+static int prom_node_to_node(const char *type, int node)
+{
+	unsigned long args[5];
+
+	args[0] = (unsigned long) type;
+	args[1] = 1;
+	args[2] = 1;
+	args[3] = (unsigned int) node;
+	args[4] = (unsigned long) -1;
+
+	p1275_cmd_direct(args);
+
+	return (int) args[4];
+}
+
 /* Return the child of node 'node' or zero if no this node has no
  * direct descendent.
  */
 inline int __prom_getchild(int node)
 {
-	return p1275_cmd ("child", P1275_INOUT(1, 1), node);
+	return prom_node_to_node("child", node);
 }
 
 inline int prom_getchild(int node)
 {
 	int cnode;
 
-	if(node == -1) return 0;
+	if (node == -1)
+		return 0;
 	cnode = __prom_getchild(node);
-	if(cnode == -1) return 0;
-	return (int)cnode;
+	if (cnode == -1)
+		return 0;
+	return cnode;
 }
 EXPORT_SYMBOL(prom_getchild);
 
@@ -39,10 +56,12 @@
 {
 	int cnode;
 
-	if(node == -1) return 0;
-	cnode = p1275_cmd ("parent", P1275_INOUT(1, 1), node);
-	if(cnode == -1) return 0;
-	return (int)cnode;
+	if (node == -1)
+		return 0;
+	cnode = prom_node_to_node("parent", node);
+	if (cnode == -1)
+		return 0;
+	return cnode;
 }
 
 /* Return the next sibling of node 'node' or zero if no more siblings
@@ -50,7 +69,7 @@
  */
 inline int __prom_getsibling(int node)
 {
-	return p1275_cmd(prom_peer_name, P1275_INOUT(1, 1), node);
+	return prom_node_to_node(prom_peer_name, node);
 }
 
 inline int prom_getsibling(int node)
@@ -72,11 +91,21 @@
  */
 inline int prom_getproplen(int node, const char *prop)
 {
-	if((!node) || (!prop)) return -1;
-	return p1275_cmd ("getproplen", 
-			  P1275_ARG(1,P1275_ARG_IN_STRING)|
-			  P1275_INOUT(2, 1), 
-			  node, prop);
+	unsigned long args[6];
+
+	if (!node || !prop)
+		return -1;
+
+	args[0] = (unsigned long) "getproplen";
+	args[1] = 2;
+	args[2] = 1;
+	args[3] = (unsigned int) node;
+	args[4] = (unsigned long) prop;
+	args[5] = (unsigned long) -1;
+
+	p1275_cmd_direct(args);
+
+	return (int) args[5];
 }
 EXPORT_SYMBOL(prom_getproplen);
 
@@ -87,19 +116,25 @@
 inline int prom_getproperty(int node, const char *prop,
 			    char *buffer, int bufsize)
 {
+	unsigned long args[8];
 	int plen;
 
 	plen = prom_getproplen(node, prop);
-	if ((plen > bufsize) || (plen == 0) || (plen == -1)) {
+	if ((plen > bufsize) || (plen == 0) || (plen == -1))
 		return -1;
-	} else {
-		/* Ok, things seem all right. */
-		return p1275_cmd(prom_getprop_name, 
-				 P1275_ARG(1,P1275_ARG_IN_STRING)|
-				 P1275_ARG(2,P1275_ARG_OUT_BUF)|
-				 P1275_INOUT(4, 1), 
-				 node, prop, buffer, P1275_SIZE(plen));
-	}
+
+	args[0] = (unsigned long) prom_getprop_name;
+	args[1] = 4;
+	args[2] = 1;
+	args[3] = (unsigned int) node;
+	args[4] = (unsigned long) prop;
+	args[5] = (unsigned long) buffer;
+	args[6] = bufsize;
+	args[7] = (unsigned long) -1;
+
+	p1275_cmd_direct(args);
+
+	return (int) args[7];
 }
 EXPORT_SYMBOL(prom_getproperty);
 
@@ -110,7 +145,7 @@
 {
 	int intprop;
 
-	if(prom_getproperty(node, prop, (char *) &intprop, sizeof(int)) != -1)
+	if (prom_getproperty(node, prop, (char *) &intprop, sizeof(int)) != -1)
 		return intprop;
 
 	return -1;
@@ -126,7 +161,8 @@
 	int retval;
 
 	retval = prom_getint(node, property);
-	if(retval == -1) return deflt;
+	if (retval == -1)
+		return deflt;
 
 	return retval;
 }
@@ -138,7 +174,8 @@
 	int retval;
 
 	retval = prom_getproplen(node, prop);
-	if(retval == -1) return 0;
+	if (retval == -1)
+		return 0;
 	return 1;
 }
 EXPORT_SYMBOL(prom_getbool);
@@ -152,7 +189,8 @@
 	int len;
 
 	len = prom_getproperty(node, prop, user_buf, ubuf_size);
-	if(len != -1) return;
+	if (len != -1)
+		return;
 	user_buf[0] = 0;
 	return;
 }
@@ -165,7 +203,8 @@
 {
 	char namebuf[128];
 	prom_getproperty(node, "name", namebuf, sizeof(namebuf));
-	if(strcmp(namebuf, name) == 0) return 1;
+	if (strcmp(namebuf, name) == 0)
+		return 1;
 	return 0;
 }
 
@@ -191,16 +230,29 @@
 }
 EXPORT_SYMBOL(prom_searchsiblings);
 
+static const char *prom_nextprop_name = "nextprop";
+
 /* Return the first property type for node 'node'.
  * buffer should be at least 32B in length
  */
 inline char *prom_firstprop(int node, char *buffer)
 {
+	unsigned long args[7];
+
 	*buffer = 0;
-	if(node == -1) return buffer;
-	p1275_cmd ("nextprop", P1275_ARG(2,P1275_ARG_OUT_32B)|
-			       P1275_INOUT(3, 0), 
-			       node, (char *) 0x0, buffer);
+	if (node == -1)
+		return buffer;
+
+	args[0] = (unsigned long) prom_nextprop_name;
+	args[1] = 3;
+	args[2] = 1;
+	args[3] = (unsigned int) node;
+	args[4] = 0;
+	args[5] = (unsigned long) buffer;
+	args[6] = (unsigned long) -1;
+
+	p1275_cmd_direct(args);
+
 	return buffer;
 }
 EXPORT_SYMBOL(prom_firstprop);
@@ -211,9 +263,10 @@
  */
 inline char *prom_nextprop(int node, const char *oprop, char *buffer)
 {
+	unsigned long args[7];
 	char buf[32];
 
-	if(node == -1) {
+	if (node == -1) {
 		*buffer = 0;
 		return buffer;
 	}
@@ -221,10 +274,17 @@
 		strcpy (buf, oprop);
 		oprop = buf;
 	}
-	p1275_cmd ("nextprop", P1275_ARG(1,P1275_ARG_IN_STRING)|
-				    P1275_ARG(2,P1275_ARG_OUT_32B)|
-				    P1275_INOUT(3, 0), 
-				    node, oprop, buffer); 
+
+	args[0] = (unsigned long) prom_nextprop_name;
+	args[1] = 3;
+	args[2] = 1;
+	args[3] = (unsigned int) node;
+	args[4] = (unsigned long) oprop;
+	args[5] = (unsigned long) buffer;
+	args[6] = (unsigned long) -1;
+
+	p1275_cmd_direct(args);
+
 	return buffer;
 }
 EXPORT_SYMBOL(prom_nextprop);
@@ -232,12 +292,19 @@
 int
 prom_finddevice(const char *name)
 {
+	unsigned long args[5];
+
 	if (!name)
 		return 0;
-	return p1275_cmd(prom_finddev_name,
-			 P1275_ARG(0,P1275_ARG_IN_STRING)|
-			 P1275_INOUT(1, 1), 
-			 name);
+	args[0] = (unsigned long) "finddevice";
+	args[1] = 1;
+	args[2] = 1;
+	args[3] = (unsigned long) name;
+	args[4] = (unsigned long) -1;
+
+	p1275_cmd_direct(args);
+
+	return (int) args[4];
 }
 EXPORT_SYMBOL(prom_finddevice);
 
@@ -248,7 +315,7 @@
 	*buf = 0;
 	do {
 		prom_nextprop(node, buf, buf);
-		if(!strcmp(buf, prop))
+		if (!strcmp(buf, prop))
 			return 1;
 	} while (*buf);
 	return 0;
@@ -261,6 +328,8 @@
 int
 prom_setprop(int node, const char *pname, char *value, int size)
 {
+	unsigned long args[8];
+
 	if (size == 0)
 		return 0;
 	if ((pname == 0) || (value == 0))
@@ -272,19 +341,37 @@
 		return 0;
 	}
 #endif
-	return p1275_cmd ("setprop", P1275_ARG(1,P1275_ARG_IN_STRING)|
-					  P1275_ARG(2,P1275_ARG_IN_BUF)|
-					  P1275_INOUT(4, 1), 
-					  node, pname, value, P1275_SIZE(size));
+	args[0] = (unsigned long) "setprop";
+	args[1] = 4;
+	args[2] = 1;
+	args[3] = (unsigned int) node;
+	args[4] = (unsigned long) pname;
+	args[5] = (unsigned long) value;
+	args[6] = size;
+	args[7] = (unsigned long) -1;
+
+	p1275_cmd_direct(args);
+
+	return (int) args[7];
 }
 EXPORT_SYMBOL(prom_setprop);
 
 inline int prom_inst2pkg(int inst)
 {
+	unsigned long args[5];
 	int node;
 	
-	node = p1275_cmd ("instance-to-package", P1275_INOUT(1, 1), inst);
-	if (node == -1) return 0;
+	args[0] = (unsigned long) "instance-to-package";
+	args[1] = 1;
+	args[2] = 1;
+	args[3] = (unsigned int) inst;
+	args[4] = (unsigned long) -1;
+
+	p1275_cmd_direct(args);
+
+	node = (int) args[4];
+	if (node == -1)
+		return 0;
 	return node;
 }
 
@@ -297,17 +384,28 @@
 	int node, inst;
 
 	inst = prom_devopen (path);
-	if (inst == 0) return 0;
-	node = prom_inst2pkg (inst);
-	prom_devclose (inst);
-	if (node == -1) return 0;
+	if (inst == 0)
+		return 0;
+	node = prom_inst2pkg(inst);
+	prom_devclose(inst);
+	if (node == -1)
+		return 0;
 	return node;
 }
 
 int prom_ihandle2path(int handle, char *buffer, int bufsize)
 {
-	return p1275_cmd("instance-to-path",
-			 P1275_ARG(1,P1275_ARG_OUT_BUF)|
-			 P1275_INOUT(3, 1),
-			 handle, buffer, P1275_SIZE(bufsize));
+	unsigned long args[7];
+
+	args[0] = (unsigned long) "instance-to-path";
+	args[1] = 3;
+	args[2] = 1;
+	args[3] = (unsigned int) handle;
+	args[4] = (unsigned long) buffer;
+	args[5] = bufsize;
+	args[6] = (unsigned long) -1;
+
+	p1275_cmd_direct(args);
+
+	return (int) args[6];
 }
--- linux-mvl-dove-2.6.32.orig/arch/sparc/prom/cif.S
+++ linux-mvl-dove-2.6.32/arch/sparc/prom/cif.S
@@ -9,18 +9,18 @@
 #include <asm/thread_info.h>
 
 	.text
-	.globl	prom_cif_interface
-prom_cif_interface:
-	sethi	%hi(p1275buf), %o0
-	or	%o0, %lo(p1275buf), %o0
-	ldx	[%o0 + 0x010], %o1	! prom_cif_stack
-	save	%o1, -192, %sp
-	ldx	[%i0 + 0x008], %l2	! prom_cif_handler
+	.globl	prom_cif_direct
+prom_cif_direct:
+	sethi	%hi(p1275buf), %o1
+	or	%o1, %lo(p1275buf), %o1
+	ldx	[%o1 + 0x0010], %o2	! prom_cif_stack
+	save	%o2, -192, %sp
+	ldx	[%i1 + 0x0008], %l2	! prom_cif_handler
 	mov	%g4, %l0
 	mov	%g5, %l1
 	mov	%g6, %l3
 	call	%l2
-	 add	%i0, 0x018, %o0		! prom_args
+	 mov	%i0, %o0		! prom_args
 	mov	%l0, %g4
 	mov	%l1, %g5
 	mov	%l3, %g6
--- linux-mvl-dove-2.6.32.orig/arch/sparc/prom/devops_64.c
+++ linux-mvl-dove-2.6.32/arch/sparc/prom/devops_64.c
@@ -18,16 +18,32 @@
 int
 prom_devopen(const char *dstr)
 {
-	return p1275_cmd ("open", P1275_ARG(0,P1275_ARG_IN_STRING)|
-				  P1275_INOUT(1,1),
-				  dstr);
+	unsigned long args[5];
+
+	args[0] = (unsigned long) "open";
+	args[1] = 1;
+	args[2] = 1;
+	args[3] = (unsigned long) dstr;
+	args[4] = (unsigned long) -1;
+
+	p1275_cmd_direct(args);
+
+	return (int) args[4];
 }
 
 /* Close the device described by device handle 'dhandle'. */
 int
 prom_devclose(int dhandle)
 {
-	p1275_cmd ("close", P1275_INOUT(1,0), dhandle);
+	unsigned long args[4];
+
+	args[0] = (unsigned long) "close";
+	args[1] = 1;
+	args[2] = 0;
+	args[3] = (unsigned int) dhandle;
+
+	p1275_cmd_direct(args);
+
 	return 0;
 }
 
@@ -37,5 +53,15 @@
 void
 prom_seek(int dhandle, unsigned int seekhi, unsigned int seeklo)
 {
-	p1275_cmd ("seek", P1275_INOUT(3,1), dhandle, seekhi, seeklo);
+	unsigned long args[7];
+
+	args[0] = (unsigned long) "seek";
+	args[1] = 3;
+	args[2] = 1;
+	args[3] = (unsigned int) dhandle;
+	args[4] = seekhi;
+	args[5] = seeklo;
+	args[6] = (unsigned long) -1;
+
+	p1275_cmd_direct(args);
 }
--- linux-mvl-dove-2.6.32.orig/arch/sparc/prom/console_64.c
+++ linux-mvl-dove-2.6.32/arch/sparc/prom/console_64.c
@@ -21,14 +21,22 @@
 inline int
 prom_nbgetchar(void)
 {
+	unsigned long args[7];
 	char inc;
 
-	if (p1275_cmd("read", P1275_ARG(1,P1275_ARG_OUT_BUF)|
-			      P1275_INOUT(3,1),
-			      prom_stdin, &inc, P1275_SIZE(1)) == 1)
+	args[0] = (unsigned long) "read";
+	args[1] = 3;
+	args[2] = 1;
+	args[3] = (unsigned int) prom_stdin;
+	args[4] = (unsigned long) &inc;
+	args[5] = 1;
+	args[6] = (unsigned long) -1;
+
+	p1275_cmd_direct(args);
+
+	if (args[6] == 1)
 		return inc;
-	else
-		return -1;
+	return -1;
 }
 
 /* Non blocking put character to console device, returns -1 if
@@ -37,12 +45,22 @@
 inline int
 prom_nbputchar(char c)
 {
+	unsigned long args[7];
 	char outc;
 	
 	outc = c;
-	if (p1275_cmd("write", P1275_ARG(1,P1275_ARG_IN_BUF)|
-			       P1275_INOUT(3,1),
-			       prom_stdout, &outc, P1275_SIZE(1)) == 1)
+
+	args[0] = (unsigned long) "write";
+	args[1] = 3;
+	args[2] = 1;
+	args[3] = (unsigned int) prom_stdout;
+	args[4] = (unsigned long) &outc;
+	args[5] = 1;
+	args[6] = (unsigned long) -1;
+
+	p1275_cmd_direct(args);
+
+	if (args[6] == 1)
 		return 0;
 	else
 		return -1;
@@ -68,7 +86,15 @@
 void
 prom_puts(const char *s, int len)
 {
-	p1275_cmd("write", P1275_ARG(1,P1275_ARG_IN_BUF)|
-			   P1275_INOUT(3,1),
-			   prom_stdout, s, P1275_SIZE(len));
+	unsigned long args[7];
+
+	args[0] = (unsigned long) "write";
+	args[1] = 3;
+	args[2] = 1;
+	args[3] = (unsigned int) prom_stdout;
+	args[4] = (unsigned long) s;
+	args[5] = len;
+	args[6] = (unsigned long) -1;
+
+	p1275_cmd_direct(args);
 }
--- linux-mvl-dove-2.6.32.orig/arch/avr32/include/asm/syscalls.h
+++ linux-mvl-dove-2.6.32/arch/avr32/include/asm/syscalls.h
@@ -29,10 +29,6 @@
 			       struct pt_regs *);
 asmlinkage int sys_rt_sigreturn(struct pt_regs *);
 
-/* kernel/sys_avr32.c */
-asmlinkage long sys_mmap2(unsigned long, unsigned long, unsigned long,
-			  unsigned long, unsigned long, off_t);
-
 /* mm/cache.c */
 asmlinkage int sys_cacheflush(int, void __user *, size_t);
 
--- linux-mvl-dove-2.6.32.orig/arch/avr32/kernel/syscall-stubs.S
+++ linux-mvl-dove-2.6.32/arch/avr32/kernel/syscall-stubs.S
@@ -61,7 +61,7 @@
 __sys_mmap2:
 	pushm	lr
 	st.w	--sp, ARG6
-	call	sys_mmap2
+	call	sys_mmap_pgoff
 	sub	sp, -4
 	popm	pc
 
--- linux-mvl-dove-2.6.32.orig/arch/avr32/kernel/sys_avr32.c
+++ linux-mvl-dove-2.6.32/arch/avr32/kernel/sys_avr32.c
@@ -5,39 +5,8 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
-#include <linux/errno.h>
-#include <linux/fs.h>
-#include <linux/file.h>
-#include <linux/mm.h>
 #include <linux/unistd.h>
 
-#include <asm/mman.h>
-#include <asm/uaccess.h>
-#include <asm/syscalls.h>
-
-asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
-			  unsigned long prot, unsigned long flags,
-			  unsigned long fd, off_t offset)
-{
-	int error = -EBADF;
-	struct file *file = NULL;
-
-	flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-	if (!(flags & MAP_ANONYMOUS)) {
-		file = fget(fd);
-		if (!file)
-			return error;
-	}
-
-	down_write(&current->mm->mmap_sem);
-	error = do_mmap_pgoff(file, addr, len, prot, flags, offset);
-	up_write(&current->mm->mmap_sem);
-
-	if (file)
-		fput(file);
-	return error;
-}
-
 int kernel_execve(const char *file, char **argv, char **envp)
 {
 	register long scno asm("r8") = __NR_execve;
--- linux-mvl-dove-2.6.32.orig/arch/um/os-Linux/mem.c
+++ linux-mvl-dove-2.6.32/arch/um/os-Linux/mem.c
@@ -10,6 +10,7 @@
 #include <errno.h>
 #include <fcntl.h>
 #include <string.h>
+#include <sys/stat.h>
 #include <sys/mman.h>
 #include <sys/param.h>
 #include "init.h"
--- linux-mvl-dove-2.6.32.orig/arch/um/os-Linux/time.c
+++ linux-mvl-dove-2.6.32/arch/um/os-Linux/time.c
@@ -60,7 +60,7 @@
 long long disable_timer(void)
 {
 	struct itimerval time = ((struct itimerval) { { 0, 0 }, { 0, 0 } });
-	int remain, max = UM_NSEC_PER_SEC / UM_HZ;
+	long long remain, max = UM_NSEC_PER_SEC / UM_HZ;
 
 	if (setitimer(ITIMER_VIRTUAL, &time, &time) < 0)
 		printk(UM_KERN_ERR "disable_timer - setitimer failed, "
--- linux-mvl-dove-2.6.32.orig/arch/um/drivers/ubd_kern.c
+++ linux-mvl-dove-2.6.32/arch/um/drivers/ubd_kern.c
@@ -160,6 +160,7 @@
 	struct scatterlist sg[MAX_SG];
 	struct request *request;
 	int start_sg, end_sg;
+	sector_t rq_pos;
 };
 
 #define DEFAULT_COW { \
@@ -184,6 +185,7 @@
 	.request =		NULL, \
 	.start_sg =		0, \
 	.end_sg =		0, \
+	.rq_pos =		0, \
 }
 
 /* Protected by ubd_lock */
@@ -1222,7 +1224,6 @@
 {
 	struct io_thread_req *io_req;
 	struct request *req;
-	sector_t sector;
 	int n;
 
 	while(1){
@@ -1233,12 +1234,12 @@
 				return;
 
 			dev->request = req;
+			dev->rq_pos = blk_rq_pos(req);
 			dev->start_sg = 0;
 			dev->end_sg = blk_rq_map_sg(q, req, dev->sg);
 		}
 
 		req = dev->request;
-		sector = blk_rq_pos(req);
 		while(dev->start_sg < dev->end_sg){
 			struct scatterlist *sg = &dev->sg[dev->start_sg];
 
@@ -1250,10 +1251,9 @@
 				return;
 			}
 			prepare_request(req, io_req,
-					(unsigned long long)sector << 9,
+					(unsigned long long)dev->rq_pos << 9,
 					sg->offset, sg->length, sg_page(sg));
 
-			sector += sg->length >> 9;
 			n = os_write_file(thread_fd, &io_req,
 					  sizeof(struct io_thread_req *));
 			if(n != sizeof(struct io_thread_req *)){
@@ -1266,6 +1266,7 @@
 				return;
 			}
 
+			dev->rq_pos += sg->length >> 9;
 			dev->start_sg++;
 		}
 		dev->end_sg = 0;
--- linux-mvl-dove-2.6.32.orig/arch/um/drivers/line.c
+++ linux-mvl-dove-2.6.32/arch/um/drivers/line.c
@@ -727,6 +727,9 @@
 
 static void free_winch(struct winch *winch, int free_irq_ok)
 {
+	if (free_irq_ok)
+		free_irq(WINCH_IRQ, winch);
+
 	list_del(&winch->list);
 
 	if (winch->pid != -1)
@@ -735,8 +738,6 @@
 		os_close_file(winch->fd);
 	if (winch->stack != 0)
 		free_stack(winch->stack, 0);
-	if (free_irq_ok)
-		free_irq(WINCH_IRQ, winch);
 	kfree(winch);
 }
 
--- linux-mvl-dove-2.6.32.orig/arch/um/kernel/dyn.lds.S
+++ linux-mvl-dove-2.6.32/arch/um/kernel/dyn.lds.S
@@ -50,8 +50,18 @@
   .rela.got       : { *(.rela.got) }
   .rel.bss        : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) }
   .rela.bss       : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) }
-  .rel.plt        : { *(.rel.plt) }
-  .rela.plt       : { *(.rela.plt) }
+  .rel.plt : {
+	*(.rel.plt)
+	PROVIDE_HIDDEN(__rel_iplt_start = .);
+	*(.rel.iplt)
+	PROVIDE_HIDDEN(__rel_iplt_end = .);
+  }
+  .rela.plt : {
+	*(.rela.plt)
+	PROVIDE_HIDDEN(__rela_iplt_start = .);
+	*(.rela.iplt)
+	PROVIDE_HIDDEN(__rela_iplt_end = .);
+  }
   .init           : {
     KEEP (*(.init))
   } =0x90909090
--- linux-mvl-dove-2.6.32.orig/arch/um/kernel/syscall.c
+++ linux-mvl-dove-2.6.32/arch/um/kernel/syscall.c
@@ -8,6 +8,7 @@
 #include "linux/mm.h"
 #include "linux/sched.h"
 #include "linux/utsname.h"
+#include "linux/syscalls.h"
 #include "asm/current.h"
 #include "asm/mman.h"
 #include "asm/uaccess.h"
@@ -37,31 +38,6 @@
 	return ret;
 }
 
-/* common code for old and new mmaps */
-long sys_mmap2(unsigned long addr, unsigned long len,
-	       unsigned long prot, unsigned long flags,
-	       unsigned long fd, unsigned long pgoff)
-{
-	long error = -EBADF;
-	struct file * file = NULL;
-
-	flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-	if (!(flags & MAP_ANONYMOUS)) {
-		file = fget(fd);
-		if (!file)
-			goto out;
-	}
-
-	down_write(&current->mm->mmap_sem);
-	error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
-	up_write(&current->mm->mmap_sem);
-
-	if (file)
-		fput(file);
- out:
-	return error;
-}
-
 long old_mmap(unsigned long addr, unsigned long len,
 	      unsigned long prot, unsigned long flags,
 	      unsigned long fd, unsigned long offset)
@@ -70,7 +46,7 @@
 	if (offset & ~PAGE_MASK)
 		goto out;
 
-	err = sys_mmap2(addr, len, prot, flags, fd, offset >> PAGE_SHIFT);
+	err = sys_mmap_pgoff(addr, len, prot, flags, fd, offset >> PAGE_SHIFT);
  out:
 	return err;
 }
--- linux-mvl-dove-2.6.32.orig/arch/um/kernel/uml.lds.S
+++ linux-mvl-dove-2.6.32/arch/um/kernel/uml.lds.S
@@ -22,7 +22,7 @@
   _text = .;
   _stext = .;
   __init_begin = .;
-  INIT_TEXT_SECTION(PAGE_SIZE)
+  INIT_TEXT_SECTION(0)
   . = ALIGN(PAGE_SIZE);
 
   .text      :
@@ -43,6 +43,23 @@
 	__syscall_stub_end = .;
   }
 
+  /*
+   * These are needed even in a static link, even if they wind up being empty.
+   * Newer glibc needs these __rel{,a}_iplt_{start,end} symbols.
+   */
+  .rel.plt : {
+	*(.rel.plt)
+	PROVIDE_HIDDEN(__rel_iplt_start = .);
+	*(.rel.iplt)
+	PROVIDE_HIDDEN(__rel_iplt_end = .);
+  }
+  .rela.plt : {
+	*(.rela.plt)
+	PROVIDE_HIDDEN(__rela_iplt_start = .);
+	*(.rela.iplt)
+	PROVIDE_HIDDEN(__rela_iplt_end = .);
+  }
+
   #include "asm/common.lds.S"
 
   init.data : { INIT_DATA }
--- linux-mvl-dove-2.6.32.orig/arch/um/sys-x86_64/Makefile
+++ linux-mvl-dove-2.6.32/arch/um/sys-x86_64/Makefile
@@ -8,7 +8,8 @@
 	setjmp.o signal.o stub.o stub_segv.o syscalls.o syscall_table.o \
 	sysrq.o ksyms.o tls.o
 
-subarch-obj-y = lib/csum-partial_64.o lib/memcpy_64.o lib/thunk_64.o
+subarch-obj-y = lib/csum-partial_64.o lib/memcpy_64.o lib/thunk_64.o \
+		lib/rwsem_64.o
 subarch-obj-$(CONFIG_MODULES) += kernel/module.o
 
 ldt-y = ../sys-i386/ldt.o
--- linux-mvl-dove-2.6.32.orig/arch/um/sys-i386/shared/sysdep/syscalls.h
+++ linux-mvl-dove-2.6.32/arch/um/sys-i386/shared/sysdep/syscalls.h
@@ -20,7 +20,3 @@
 #define EXECUTE_SYSCALL(syscall, regs) \
 	((long (*)(struct syscall_args)) \
 	 (*sys_call_table[syscall]))(SYSCALL_ARGS(&regs->regs))
-
-extern long sys_mmap2(unsigned long addr, unsigned long len,
-		      unsigned long prot, unsigned long flags,
-		      unsigned long fd, unsigned long pgoff);
--- linux-mvl-dove-2.6.32.orig/arch/m68knommu/kernel/sys_m68k.c
+++ linux-mvl-dove-2.6.32/arch/m68knommu/kernel/sys_m68k.c
@@ -27,39 +27,6 @@
 #include <asm/cacheflush.h>
 #include <asm/unistd.h>
 
-/* common code for old and new mmaps */
-static inline long do_mmap2(
-	unsigned long addr, unsigned long len,
-	unsigned long prot, unsigned long flags,
-	unsigned long fd, unsigned long pgoff)
-{
-	int error = -EBADF;
-	struct file * file = NULL;
-
-	flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-	if (!(flags & MAP_ANONYMOUS)) {
-		file = fget(fd);
-		if (!file)
-			goto out;
-	}
-
-	down_write(&current->mm->mmap_sem);
-	error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
-	up_write(&current->mm->mmap_sem);
-
-	if (file)
-		fput(file);
-out:
-	return error;
-}
-
-asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
-	unsigned long prot, unsigned long flags,
-	unsigned long fd, unsigned long pgoff)
-{
-	return do_mmap2(addr, len, prot, flags, fd, pgoff);
-}
-
 /*
  * Perform the select(nd, in, out, ex, tv) and mmap() system
  * calls. Linux/m68k cloned Linux/i386, which didn't use to be able to
@@ -88,9 +55,8 @@
 	if (a.offset & ~PAGE_MASK)
 		goto out;
 
-	a.flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-
-	error = do_mmap2(a.addr, a.len, a.prot, a.flags, a.fd, a.offset >> PAGE_SHIFT);
+	error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd,
+				a.offset >> PAGE_SHIFT);
 out:
 	return error;
 }
--- linux-mvl-dove-2.6.32.orig/arch/m68knommu/kernel/syscalltable.S
+++ linux-mvl-dove-2.6.32/arch/m68knommu/kernel/syscalltable.S
@@ -210,7 +210,7 @@
 	.long sys_ni_syscall	/* streams2 */
 	.long sys_vfork		/* 190 */
 	.long sys_getrlimit
-	.long sys_mmap2
+	.long sys_mmap_pgoff
 	.long sys_truncate64
 	.long sys_ftruncate64
 	.long sys_stat64	/* 195 */
--- linux-mvl-dove-2.6.32.orig/arch/mips/include/asm/mipsregs.h
+++ linux-mvl-dove-2.6.32/arch/mips/include/asm/mipsregs.h
@@ -135,6 +135,12 @@
 #define FPU_CSR_COND7   0x80000000      /* $fcc7 */
 
 /*
+ * Bits 18 - 20 of the FPU Status Register will be read as 0,
+ * and should be written as zero.
+ */
+#define FPU_CSR_RSVD	0x001c0000
+
+/*
  * X the exception cause indicator
  * E the exception enable
  * S the sticky/flag bit
@@ -161,7 +167,8 @@
 #define FPU_CSR_UDF_S   0x00000008
 #define FPU_CSR_INE_S   0x00000004
 
-/* rounding mode */
+/* Bits 0 and 1 of FPU Status Register specify the rounding mode */
+#define FPU_CSR_RM	0x00000003
 #define FPU_CSR_RN      0x0     /* nearest */
 #define FPU_CSR_RZ      0x1     /* towards zero */
 #define FPU_CSR_RU      0x2     /* towards +Infinity */
--- linux-mvl-dove-2.6.32.orig/arch/mips/include/asm/compat.h
+++ linux-mvl-dove-2.6.32/arch/mips/include/asm/compat.h
@@ -144,7 +144,7 @@
 	return (u32)(unsigned long)uptr;
 }
 
-static inline void __user *compat_alloc_user_space(long len)
+static inline void __user *arch_compat_alloc_user_space(long len)
 {
 	struct pt_regs *regs = (struct pt_regs *)
 		((unsigned long) current_thread_info() + THREAD_SIZE - 32) - 1;
--- linux-mvl-dove-2.6.32.orig/arch/mips/include/asm/atomic.h
+++ linux-mvl-dove-2.6.32/arch/mips/include/asm/atomic.h
@@ -434,7 +434,7 @@
 		__asm__ __volatile__(
 		"	.set	mips3					\n"
 		"1:	lld	%0, %1		# atomic64_add		\n"
-		"	addu	%0, %2					\n"
+		"	daddu	%0, %2					\n"
 		"	scd	%0, %1					\n"
 		"	beqzl	%0, 1b					\n"
 		"	.set	mips0					\n"
@@ -446,7 +446,7 @@
 		__asm__ __volatile__(
 		"	.set	mips3					\n"
 		"1:	lld	%0, %1		# atomic64_add		\n"
-		"	addu	%0, %2					\n"
+		"	daddu	%0, %2					\n"
 		"	scd	%0, %1					\n"
 		"	beqz	%0, 2f					\n"
 		"	.subsection 2					\n"
@@ -479,7 +479,7 @@
 		__asm__ __volatile__(
 		"	.set	mips3					\n"
 		"1:	lld	%0, %1		# atomic64_sub		\n"
-		"	subu	%0, %2					\n"
+		"	dsubu	%0, %2					\n"
 		"	scd	%0, %1					\n"
 		"	beqzl	%0, 1b					\n"
 		"	.set	mips0					\n"
@@ -491,7 +491,7 @@
 		__asm__ __volatile__(
 		"	.set	mips3					\n"
 		"1:	lld	%0, %1		# atomic64_sub		\n"
-		"	subu	%0, %2					\n"
+		"	dsubu	%0, %2					\n"
 		"	scd	%0, %1					\n"
 		"	beqz	%0, 2f					\n"
 		"	.subsection 2					\n"
@@ -524,10 +524,10 @@
 		__asm__ __volatile__(
 		"	.set	mips3					\n"
 		"1:	lld	%1, %2		# atomic64_add_return	\n"
-		"	addu	%0, %1, %3				\n"
+		"	daddu	%0, %1, %3				\n"
 		"	scd	%0, %2					\n"
 		"	beqzl	%0, 1b					\n"
-		"	addu	%0, %1, %3				\n"
+		"	daddu	%0, %1, %3				\n"
 		"	.set	mips0					\n"
 		: "=&r" (result), "=&r" (temp), "=m" (v->counter)
 		: "Ir" (i), "m" (v->counter)
@@ -538,10 +538,10 @@
 		__asm__ __volatile__(
 		"	.set	mips3					\n"
 		"1:	lld	%1, %2		# atomic64_add_return	\n"
-		"	addu	%0, %1, %3				\n"
+		"	daddu	%0, %1, %3				\n"
 		"	scd	%0, %2					\n"
 		"	beqz	%0, 2f					\n"
-		"	addu	%0, %1, %3				\n"
+		"	daddu	%0, %1, %3				\n"
 		"	.subsection 2					\n"
 		"2:	b	1b					\n"
 		"	.previous					\n"
@@ -576,10 +576,10 @@
 		__asm__ __volatile__(
 		"	.set	mips3					\n"
 		"1:	lld	%1, %2		# atomic64_sub_return	\n"
-		"	subu	%0, %1, %3				\n"
+		"	dsubu	%0, %1, %3				\n"
 		"	scd	%0, %2					\n"
 		"	beqzl	%0, 1b					\n"
-		"	subu	%0, %1, %3				\n"
+		"	dsubu	%0, %1, %3				\n"
 		"	.set	mips0					\n"
 		: "=&r" (result), "=&r" (temp), "=m" (v->counter)
 		: "Ir" (i), "m" (v->counter)
@@ -590,10 +590,10 @@
 		__asm__ __volatile__(
 		"	.set	mips3					\n"
 		"1:	lld	%1, %2		# atomic64_sub_return	\n"
-		"	subu	%0, %1, %3				\n"
+		"	dsubu	%0, %1, %3				\n"
 		"	scd	%0, %2					\n"
 		"	beqz	%0, 2f					\n"
-		"	subu	%0, %1, %3				\n"
+		"	dsubu	%0, %1, %3				\n"
 		"	.subsection 2					\n"
 		"2:	b	1b					\n"
 		"	.previous					\n"
--- linux-mvl-dove-2.6.32.orig/arch/mips/include/asm/mach-sibyte/war.h
+++ linux-mvl-dove-2.6.32/arch/mips/include/asm/mach-sibyte/war.h
@@ -16,7 +16,11 @@
 #if defined(CONFIG_SB1_PASS_1_WORKAROUNDS) || \
     defined(CONFIG_SB1_PASS_2_WORKAROUNDS)
 
-#define BCM1250_M3_WAR	1
+#ifndef __ASSEMBLY__
+extern int sb1250_m3_workaround_needed(void);
+#endif
+
+#define BCM1250_M3_WAR	sb1250_m3_workaround_needed()
 #define SIBYTE_1956_WAR	1
 
 #else
--- linux-mvl-dove-2.6.32.orig/arch/mips/math-emu/cp1emu.c
+++ linux-mvl-dove-2.6.32/arch/mips/math-emu/cp1emu.c
@@ -75,6 +75,9 @@
 #define FPCREG_RID	0	/* $0  = revision id */
 #define FPCREG_CSR	31	/* $31 = csr */
 
+/* Determine rounding mode from the RM bits of the FCSR */
+#define modeindex(v) ((v) & FPU_CSR_RM)
+
 /* Convert Mips rounding mode (0..3) to IEEE library modes. */
 static const unsigned char ieee_rm[4] = {
 	[FPU_CSR_RN] = IEEE754_RN,
@@ -381,10 +384,14 @@
 					(void *) (xcp->cp0_epc),
 					MIPSInst_RT(ir), value);
 #endif
-				value &= (FPU_CSR_FLUSH | FPU_CSR_ALL_E | FPU_CSR_ALL_S | 0x03);
-				ctx->fcr31 &= ~(FPU_CSR_FLUSH | FPU_CSR_ALL_E | FPU_CSR_ALL_S | 0x03);
-				/* convert to ieee library modes */
-				ctx->fcr31 |= (value & ~0x3) | ieee_rm[value & 0x3];
+
+				/*
+				 * Don't write reserved bits,
+				 * and convert to ieee library modes
+				 */
+				ctx->fcr31 = (value &
+						~(FPU_CSR_RSVD | FPU_CSR_RM)) |
+						ieee_rm[modeindex(value)];
 			}
 			if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) {
 				return SIGFPE;
--- linux-mvl-dove-2.6.32.orig/arch/mips/alchemy/mtx-1/platform.c
+++ linux-mvl-dove-2.6.32/arch/mips/alchemy/mtx-1/platform.c
@@ -28,6 +28,8 @@
 #include <linux/mtd/physmap.h>
 #include <mtd/mtd-abi.h>
 
+#include <asm/mach-au1x00/au1xxx_eth.h>
+
 static struct gpio_keys_button mtx1_gpio_button[] = {
 	{
 		.gpio = 207,
@@ -140,10 +142,17 @@
 	&mtx1_mtd,
 };
 
+static struct au1000_eth_platform_data mtx1_au1000_eth0_pdata = {
+	.phy_search_highest_addr	= 1,
+	.phy1_search_mac0 		= 1,
+};
+
 static int __init mtx1_register_devices(void)
 {
 	int rc;
 
+	au1xxx_override_eth_cfg(0, &mtx1_au1000_eth0_pdata);
+
 	rc = gpio_request(mtx1_gpio_button[0].gpio,
 					mtx1_gpio_button[0].desc);
 	if (rc < 0) {
--- linux-mvl-dove-2.6.32.orig/arch/mips/nxp/pnx8550/common/setup.c
+++ linux-mvl-dove-2.6.32/arch/mips/nxp/pnx8550/common/setup.c
@@ -113,7 +113,7 @@
 	PNX8550_GLB2_ENAB_INTA_O = 0;
 
 	/* IO/MEM resources. */
-	set_io_port_base(KSEG1);
+	set_io_port_base(PNX8550_PORT_BASE);
 	ioport_resource.start = 0;
 	ioport_resource.end = ~0;
 	iomem_resource.start = 0;
--- linux-mvl-dove-2.6.32.orig/arch/mips/nxp/pnx8550/common/pci.c
+++ linux-mvl-dove-2.6.32/arch/mips/nxp/pnx8550/common/pci.c
@@ -44,6 +44,7 @@
 
 static struct pci_controller pnx8550_controller = {
 	.pci_ops	= &pnx8550_pci_ops,
+	.io_map_base	= PNX8550_PORT_BASE,
 	.io_resource	= &pci_io_resource,
 	.mem_resource	= &pci_mem_resource,
 };
--- linux-mvl-dove-2.6.32.orig/arch/mips/mm/dma-default.c
+++ linux-mvl-dove-2.6.32/arch/mips/mm/dma-default.c
@@ -43,27 +43,39 @@
 
 static gfp_t massage_gfp_flags(const struct device *dev, gfp_t gfp)
 {
+	gfp_t dma_flag;
+
 	/* ignore region specifiers */
 	gfp &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM);
 
-#ifdef CONFIG_ZONE_DMA
+#ifdef CONFIG_ISA
 	if (dev == NULL)
-		gfp |= __GFP_DMA;
-	else if (dev->coherent_dma_mask < DMA_BIT_MASK(24))
-		gfp |= __GFP_DMA;
+		dma_flag = __GFP_DMA;
 	else
 #endif
-#ifdef CONFIG_ZONE_DMA32
+#if defined(CONFIG_ZONE_DMA32) && defined(CONFIG_ZONE_DMA)
 	     if (dev->coherent_dma_mask < DMA_BIT_MASK(32))
-		gfp |= __GFP_DMA32;
+			dma_flag = __GFP_DMA;
+	else if (dev->coherent_dma_mask < DMA_BIT_MASK(64))
+			dma_flag = __GFP_DMA32;
+	else
+#endif
+#if defined(CONFIG_ZONE_DMA32) && !defined(CONFIG_ZONE_DMA)
+	     if (dev->coherent_dma_mask < DMA_BIT_MASK(64))
+		dma_flag = __GFP_DMA32;
+	else
+#endif
+#if defined(CONFIG_ZONE_DMA) && !defined(CONFIG_ZONE_DMA32)
+	     if (dev->coherent_dma_mask < DMA_BIT_MASK(64))
+		dma_flag = __GFP_DMA;
 	else
 #endif
-		;
+		dma_flag = 0;
 
 	/* Don't invoke OOM killer */
 	gfp |= __GFP_NORETRY;
 
-	return gfp;
+	return gfp | dma_flag;
 }
 
 void *dma_alloc_noncoherent(struct device *dev, size_t size,
--- linux-mvl-dove-2.6.32.orig/arch/mips/mm/uasm.h
+++ linux-mvl-dove-2.6.32/arch/mips/mm/uasm.h
@@ -78,6 +78,7 @@
 Ip_u1u2u3(_mfc0);
 Ip_u1u2u3(_mtc0);
 Ip_u2u1u3(_ori);
+Ip_u3u1u2(_or);
 Ip_u2s3u1(_pref);
 Ip_0(_rfe);
 Ip_u2s3u1(_sc);
--- linux-mvl-dove-2.6.32.orig/arch/mips/mm/uasm.c
+++ linux-mvl-dove-2.6.32/arch/mips/mm/uasm.c
@@ -62,7 +62,7 @@
 	insn_dmtc0, insn_dsll, insn_dsll32, insn_dsra, insn_dsrl,
 	insn_dsrl32, insn_dsubu, insn_eret, insn_j, insn_jal, insn_jr,
 	insn_ld, insn_ll, insn_lld, insn_lui, insn_lw, insn_mfc0,
-	insn_mtc0, insn_ori, insn_pref, insn_rfe, insn_sc, insn_scd,
+	insn_mtc0, insn_or, insn_ori, insn_pref, insn_rfe, insn_sc, insn_scd,
 	insn_sd, insn_sll, insn_sra, insn_srl, insn_subu, insn_sw,
 	insn_tlbp, insn_tlbwi, insn_tlbwr, insn_xor, insn_xori
 };
@@ -116,6 +116,7 @@
 	{ insn_lw,  M(lw_op, 0, 0, 0, 0, 0),  RS | RT | SIMM },
 	{ insn_mfc0,  M(cop0_op, mfc_op, 0, 0, 0, 0),  RT | RD | SET},
 	{ insn_mtc0,  M(cop0_op, mtc_op, 0, 0, 0, 0),  RT | RD | SET},
+	{ insn_or,  M(spec_op, 0, 0, 0, 0, or_op),  RS | RT | RD },
 	{ insn_ori,  M(ori_op, 0, 0, 0, 0, 0),  RS | RT | UIMM },
 	{ insn_pref,  M(pref_op, 0, 0, 0, 0, 0),  RS | RT | SIMM },
 	{ insn_rfe,  M(cop0_op, cop_op, 0, 0, 0, rfe_op),  0 },
@@ -362,6 +363,7 @@
 I_u1u2u3(_mfc0)
 I_u1u2u3(_mtc0)
 I_u2u1u3(_ori)
+I_u3u1u2(_or)
 I_u2s3u1(_pref)
 I_0(_rfe)
 I_u2s3u1(_sc)
--- linux-mvl-dove-2.6.32.orig/arch/mips/mm/tlbex.c
+++ linux-mvl-dove-2.6.32/arch/mips/mm/tlbex.c
@@ -73,9 +73,6 @@
 enum label_id {
 	label_second_part = 1,
 	label_leave,
-#ifdef MODULE_START
-	label_module_alloc,
-#endif
 	label_vmalloc,
 	label_vmalloc_done,
 	label_tlbw_hazard,
@@ -92,9 +89,6 @@
 
 UASM_L_LA(_second_part)
 UASM_L_LA(_leave)
-#ifdef MODULE_START
-UASM_L_LA(_module_alloc)
-#endif
 UASM_L_LA(_vmalloc)
 UASM_L_LA(_vmalloc_done)
 UASM_L_LA(_tlbw_hazard)
@@ -731,10 +725,15 @@
 	 * create the plain linear handler
 	 */
 	if (bcm1250_m3_war()) {
-		UASM_i_MFC0(&p, K0, C0_BADVADDR);
-		UASM_i_MFC0(&p, K1, C0_ENTRYHI);
+		unsigned int segbits = 44;
+
+		uasm_i_dmfc0(&p, K0, C0_BADVADDR);
+		uasm_i_dmfc0(&p, K1, C0_ENTRYHI);
 		uasm_i_xor(&p, K0, K0, K1);
-		UASM_i_SRL(&p, K0, K0, PAGE_SHIFT + 1);
+		uasm_i_dsrl32(&p, K1, K0, 62 - 32);
+		uasm_i_dsrl(&p, K0, K0, 12 + 1);
+		uasm_i_dsll32(&p, K0, K0, 64 + 12 + 1 - segbits - 32);
+		uasm_i_or(&p, K0, K0, K1);
 		uasm_il_bnez(&p, &r, K0, label_leave);
 		/* No need for uasm_i_nop */
 	}
@@ -802,8 +801,6 @@
 	} else {
 #if defined(CONFIG_HUGETLB_PAGE)
 		const enum label_id ls = label_tlb_huge_update;
-#elif defined(MODULE_START)
-		const enum label_id ls = label_module_alloc;
 #else
 		const enum label_id ls = label_vmalloc;
 #endif
@@ -1250,10 +1247,15 @@
 	memset(relocs, 0, sizeof(relocs));
 
 	if (bcm1250_m3_war()) {
-		UASM_i_MFC0(&p, K0, C0_BADVADDR);
-		UASM_i_MFC0(&p, K1, C0_ENTRYHI);
+		unsigned int segbits = 44;
+
+		uasm_i_dmfc0(&p, K0, C0_BADVADDR);
+		uasm_i_dmfc0(&p, K1, C0_ENTRYHI);
 		uasm_i_xor(&p, K0, K0, K1);
-		UASM_i_SRL(&p, K0, K0, PAGE_SHIFT + 1);
+		uasm_i_dsrl32(&p, K1, K0, 62 - 32);
+		uasm_i_dsrl(&p, K0, K0, 12 + 1);
+		uasm_i_dsll32(&p, K0, K0, 64 + 12 + 1 - segbits - 32);
+		uasm_i_or(&p, K0, K0, K1);
 		uasm_il_bnez(&p, &r, K0, label_leave);
 		/* No need for uasm_i_nop */
 	}
--- linux-mvl-dove-2.6.32.orig/arch/mips/kernel/linux32.c
+++ linux-mvl-dove-2.6.32/arch/mips/kernel/linux32.c
@@ -67,28 +67,13 @@
 	unsigned long, prot, unsigned long, flags, unsigned long, fd,
 	unsigned long, pgoff)
 {
-	struct file * file = NULL;
 	unsigned long error;
 
 	error = -EINVAL;
 	if (pgoff & (~PAGE_MASK >> 12))
 		goto out;
-	pgoff >>= PAGE_SHIFT-12;
-
-	if (!(flags & MAP_ANONYMOUS)) {
-		error = -EBADF;
-		file = fget(fd);
-		if (!file)
-			goto out;
-	}
-	flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-
-	down_write(&current->mm->mmap_sem);
-	error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
-	up_write(&current->mm->mmap_sem);
-	if (file)
-		fput(file);
-
+	error = sys_mmap_pgoff(addr, len, prot, flags, fd,
+			       pgoff >> (PAGE_SHIFT-12));
 out:
 	return error;
 }
--- linux-mvl-dove-2.6.32.orig/arch/mips/kernel/syscall.c
+++ linux-mvl-dove-2.6.32/arch/mips/kernel/syscall.c
@@ -93,7 +93,8 @@
 		 * We do not accept a shared mapping if it would violate
 		 * cache aliasing constraints.
 		 */
-		if ((flags & MAP_SHARED) && (addr & shm_align_mask))
+		if ((flags & MAP_SHARED) &&
+		    ((addr - (pgoff << PAGE_SHIFT)) & shm_align_mask))
 			return -EINVAL;
 		return addr;
 	}
@@ -129,31 +130,6 @@
 	}
 }
 
-/* common code for old and new mmaps */
-static inline unsigned long
-do_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
-        unsigned long flags, unsigned long fd, unsigned long pgoff)
-{
-	unsigned long error = -EBADF;
-	struct file * file = NULL;
-
-	flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-	if (!(flags & MAP_ANONYMOUS)) {
-		file = fget(fd);
-		if (!file)
-			goto out;
-	}
-
-	down_write(&current->mm->mmap_sem);
-	error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
-	up_write(&current->mm->mmap_sem);
-
-	if (file)
-		fput(file);
-out:
-	return error;
-}
-
 SYSCALL_DEFINE6(mips_mmap, unsigned long, addr, unsigned long, len,
 	unsigned long, prot, unsigned long, flags, unsigned long,
 	fd, off_t, offset)
@@ -164,7 +140,7 @@
 	if (offset & ~PAGE_MASK)
 		goto out;
 
-	result = do_mmap2(addr, len, prot, flags, fd, offset >> PAGE_SHIFT);
+	result = sys_mmap_pgoff(addr, len, prot, flags, fd, offset >> PAGE_SHIFT);
 
 out:
 	return result;
@@ -177,7 +153,7 @@
 	if (pgoff & (~PAGE_MASK >> 12))
 		return -EINVAL;
 
-	return do_mmap2(addr, len, prot, flags, fd, pgoff >> (PAGE_SHIFT-12));
+	return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff >> (PAGE_SHIFT-12));
 }
 
 save_static_function(sys_fork);
--- linux-mvl-dove-2.6.32.orig/arch/mips/sibyte/sb1250/setup.c
+++ linux-mvl-dove-2.6.32/arch/mips/sibyte/sb1250/setup.c
@@ -87,6 +87,21 @@
 	return ret;
 }
 
+int sb1250_m3_workaround_needed(void)
+{
+	switch (soc_type) {
+	case K_SYS_SOC_TYPE_BCM1250:
+	case K_SYS_SOC_TYPE_BCM1250_ALT:
+	case K_SYS_SOC_TYPE_BCM1250_ALT2:
+	case K_SYS_SOC_TYPE_BCM1125:
+	case K_SYS_SOC_TYPE_BCM1125H:
+		return soc_pass < K_SYS_REVISION_BCM1250_C0;
+
+	default:
+		return 0;
+	}
+}
+
 static int __init setup_bcm112x(void)
 {
 	int ret = 0;
--- linux-mvl-dove-2.6.32.orig/arch/mips/pci/ops-pmcmsp.c
+++ linux-mvl-dove-2.6.32/arch/mips/pci/ops-pmcmsp.c
@@ -944,6 +944,7 @@
 	.pci_ops	= &msp_pci_ops,
 	.mem_resource	= &pci_mem_resource,
 	.mem_offset	= 0,
+	.io_map_base	= MSP_PCI_IOSPACE_BASE,
 	.io_resource	= &pci_io_resource,
 	.io_offset	= 0
 };
--- linux-mvl-dove-2.6.32.orig/arch/mips/pci/pci-yosemite.c
+++ linux-mvl-dove-2.6.32/arch/mips/pci/pci-yosemite.c
@@ -54,6 +54,7 @@
 		panic(ioremap_failed);
 
 	set_io_port_base(io_v_base);
+	py_controller.io_map_base = io_v_base;
 	TITAN_WRITE(RM9000x2_OCD_LKM7, TITAN_READ(RM9000x2_OCD_LKM7) | 1);
 
 	ioport_resource.end = TITAN_IO_SIZE - 1;
--- linux-mvl-dove-2.6.32.orig/arch/mips/mti-malta/malta-pci.c
+++ linux-mvl-dove-2.6.32/arch/mips/mti-malta/malta-pci.c
@@ -247,6 +247,8 @@
 	iomem_resource.end &= 0xfffffffffULL;			/* 64 GB */
 	ioport_resource.end = controller->io_resource->end;
 
+	controller->io_map_base = mips_io_port_base;
+
 	register_pci_controller(controller);
 }
 
--- linux-mvl-dove-2.6.32.orig/arch/cris/kernel/sys_cris.c
+++ linux-mvl-dove-2.6.32/arch/cris/kernel/sys_cris.c
@@ -26,31 +26,6 @@
 #include <asm/uaccess.h>
 #include <asm/segment.h>
 
-/* common code for old and new mmaps */
-static inline long
-do_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
-        unsigned long flags, unsigned long fd, unsigned long pgoff)
-{
-        int error = -EBADF;
-        struct file * file = NULL;
-
-        flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-        if (!(flags & MAP_ANONYMOUS)) {
-                file = fget(fd);
-                if (!file)
-                        goto out;
-        }
-
-        down_write(&current->mm->mmap_sem);
-        error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
-        up_write(&current->mm->mmap_sem);
-
-        if (file)
-                fput(file);
-out:
-        return error;
-}
-
 asmlinkage unsigned long old_mmap(unsigned long __user *args)
 {        
 	unsigned long buffer[6];
@@ -63,7 +38,7 @@
 	if (buffer[5] & ~PAGE_MASK) /* verify that offset is on page boundary */
 		goto out;
 
-	err = do_mmap2(buffer[0], buffer[1], buffer[2], buffer[3],
+	err = sys_mmap_pgoff(buffer[0], buffer[1], buffer[2], buffer[3],
                        buffer[4], buffer[5] >> PAGE_SHIFT);
 out:
 	return err;
@@ -73,7 +48,8 @@
 sys_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
           unsigned long flags, unsigned long fd, unsigned long pgoff)
 {
-        return do_mmap2(addr, len, prot, flags, fd, pgoff);
+	/* bug(?): 8Kb pages here */
+        return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff);
 }
 
 /*
--- linux-mvl-dove-2.6.32.orig/arch/arm/Kconfig
+++ linux-mvl-dove-2.6.32/arch/arm/Kconfig
@@ -163,12 +163,12 @@
 
 config OPROFILE_ARMV6
 	def_bool y
-	depends on CPU_V6 && !SMP
+	depends on CPU_V6 && !SMP && !CPU_PJ4
 	select OPROFILE_ARM11_CORE
 
 config OPROFILE_MPCORE
 	def_bool y
-	depends on CPU_V6 && SMP
+	depends on CPU_V6 && SMP && !CPU_PJ4
 	select OPROFILE_ARM11_CORE
 
 config OPROFILE_ARM11_CORE
@@ -176,7 +176,12 @@
 
 config OPROFILE_ARMV7
 	def_bool y
-	depends on CPU_V7 && !SMP
+	depends on CPU_V7 && !SMP && !CPU_PJ4
+	bool
+
+config OPROFILE_MRVL_PJ4
+	def_bool y
+	depends on CPU_PJ4 && (CPU_V6 || CPU_V7)
 	bool
 
 endif
@@ -446,6 +451,20 @@
 	  Support for the following Marvell Kirkwood series SoCs:
 	  88F6180, 88F6192 and 88F6281.
 
+config ARCH_DOVE
+	bool "Marvell Dove"
+	select PCI
+	select GENERIC_GPIO
+	select ARCH_REQUIRE_GPIOLIB
+	select GENERIC_TIME
+	select GENERIC_CLOCKEVENTS
+	select ARCH_HAS_CPUFREQ
+	select HAVE_CLK
+	select COMMON_CLKDEV
+	select PLAT_ORION
+	help
+	  Support for the Marvell Dove SoC MV88F6781
+
 config ARCH_LOKI
 	bool "Marvell Loki (88RC8480)"
 	select CPU_FEROCEON
@@ -747,6 +766,10 @@
 
 source "arch/arm/mach-kirkwood/Kconfig"
 
+source "arch/arm/mach-dove/Kconfig"
+
+source "arch/arm/plat-orion/mv_hal_drivers/Kconfig"
+
 source "arch/arm/plat-s3c24xx/Kconfig"
 source "arch/arm/plat-s3c64xx/Kconfig"
 source "arch/arm/plat-s3c/Kconfig"
@@ -821,7 +844,7 @@
 
 config IWMMXT
 	bool "Enable iWMMXt support"
-	depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK
+	depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
 	default y if PXA27x || PXA3xx || ARCH_MMP
 	help
 	  Enable support for iWMMXt context switching at run time if
@@ -837,6 +860,15 @@
 source "arch/arm/Kconfig-nommu"
 endif
 
+config MRVL_ERRATA_THUMB_VLDR
+	bool "Marvell errata: VLDR from a PC-relative address in Thumb-2 mode can cause DABT exception"
+	depends on CPU_PJ4 && ARM_THUMB && VFP
+	help
+	  This option enables the workaround for the Thumb-2 VLDR PJ4 erratum.
+	  If a VLDR in thumb-2 mode is not aligned to 4 and trying to load from a
+	  PC-relative address, a DABT exception will happen. The workaround handles
+	  the exception and load correct data to VFP register.
+
 config ARM_ERRATA_411920
 	bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
 	depends on CPU_V6 && !SMP
@@ -887,14 +919,27 @@
 	  ACTLR register. Note that setting specific bits in the ACTLR register
 	  may not be available in non-secure mode.
 
+config ARM_ERRATA_720789
+	bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
+	depends on CPU_V7 && SMP
+	help
+	  This option enables the workaround for the 720789 Cortex-A9 (prior to
+	  r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
+	  broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
+	  As a consequence of this erratum, some TLB entries which should be
+	  invalidated are not, resulting in an incoherency in the system page
+	  tables. The workaround changes the TLB flushing routines to invalidate
+	  entries regardless of the ASID.
+
 endmenu
 
 source "arch/arm/common/Kconfig"
 
 config FORCE_MAX_ZONEORDER
 	int
-	depends on SA1111
-	default "9"
+	depends on SA1111 || ARCH_DOVE
+	default "9" if SA1111
+	default "19" if ARCH_DOVE
 
 menu "Bus support"
 
@@ -1325,7 +1370,6 @@
 menu "CPU Power Management"
 
 if ARCH_HAS_CPUFREQ
-
 source "drivers/cpufreq/Kconfig"
 
 config CPU_FREQ_SA1100
@@ -1405,6 +1449,13 @@
 	help
 	  Export status information via debugfs.
 
+config CPU_FREQ_DOVE
+	tristate "CPUfreq driver for Dove SoC"
+	depends on CPU_FREQ && ARCH_DOVE
+	default n
+	help
+	  This enables the CPUfreq driver for Dove SoC.
+
 endif
 
 source "drivers/cpuidle/Kconfig"
@@ -1502,12 +1553,17 @@
 config ARCH_SUSPEND_POSSIBLE
 	def_bool y
 
+config ARCH_HIBERNATION_POSSIBLE
+	def_bool y
+
 endmenu
 
 source "net/Kconfig"
 
 source "drivers/Kconfig"
 
+source "ubuntu/Kconfig"
+
 source "fs/Kconfig"
 
 source "arch/arm/Kconfig.debug"
--- linux-mvl-dove-2.6.32.orig/arch/arm/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/Makefile
@@ -122,6 +122,7 @@
 machine-$(CONFIG_ARCH_BCMRING)		:= bcmring
 machine-$(CONFIG_ARCH_CLPS711X)		:= clps711x
 machine-$(CONFIG_ARCH_DAVINCI)		:= davinci
+machine-$(CONFIG_ARCH_DOVE)       := dove
 machine-$(CONFIG_ARCH_EBSA110)		:= ebsa110
 machine-$(CONFIG_ARCH_EP93XX)		:= ep93xx
 machine-$(CONFIG_ARCH_GEMINI)		:= gemini
@@ -197,7 +198,7 @@
 ifneq ($(machine-y),)
 MACHINE  := arch/arm/mach-$(word 1,$(machine-y))/
 else
-MACHINE  :=
+MACHINE  := arch/arm/mach-kirkwood
 endif
 
 machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y))
@@ -210,6 +211,7 @@
 endif
 
 export	TEXT_OFFSET GZFLAGS MMUEXT
+export MV_RULES_PATH := $(MACHINE)/mv_hal_support
 
 # Do we have FASTFPE?
 FASTFPE		:=arch/arm/fastfpe
--- linux-mvl-dove-2.6.32.orig/arch/arm/boot/compressed/head.S
+++ linux-mvl-dove-2.6.32/arch/arm/boot/compressed/head.S
@@ -27,6 +27,14 @@
 		.macro	writeb, ch, rb
 		mcr	p14, 0, \ch, c0, c5, 0
 		.endm
+#elif defined(CONFIG_CPU_V7)
+		.macro	loadsp, rb
+		.endm
+		.macro	writeb, ch, rb
+wait:		mrc	p14, 0, pc, c0, c1, 0
+		bcs	wait
+		mcr	p14, 0, \ch, c0, c5, 0
+		.endm
 #elif defined(CONFIG_CPU_XSCALE)
 		.macro	loadsp, rb
 		.endm
@@ -162,9 +170,9 @@
 
 		.text
 		adr	r0, LC0
- ARM(		ldmia	r0, {r1, r2, r3, r4, r5, r6, ip, sp}	)
- THUMB(		ldmia	r0, {r1, r2, r3, r4, r5, r6, ip}	)
- THUMB(		ldr	sp, [r0, #28]				)
+ ARM(		ldmia	r0, {r1, r2, r3, r4, r5, r6, r11, ip, sp})
+ THUMB(		ldmia	r0, {r1, r2, r3, r4, r5, r6, r11, ip}	)
+ THUMB(		ldr	sp, [r0, #32]				)
 		subs	r0, r0, r1		@ calculate the delta offset
 
 						@ if delta is zero, we are
@@ -174,12 +182,13 @@
 		/*
 		 * We're running at a different address.  We need to fix
 		 * up various pointers:
-		 *   r5 - zImage base address
-		 *   r6 - GOT start
+		 *   r5 - zImage base address (_start)
+		 *   r6 - size of decompressed image
+		 *   r11 - GOT start
 		 *   ip - GOT end
 		 */
 		add	r5, r5, r0
-		add	r6, r6, r0
+		add	r11, r11, r0
 		add	ip, ip, r0
 
 #ifndef CONFIG_ZBOOT_ROM
@@ -197,10 +206,10 @@
 		/*
 		 * Relocate all entries in the GOT table.
 		 */
-1:		ldr	r1, [r6, #0]		@ relocate entries in the GOT
+1:		ldr	r1, [r11, #0]		@ relocate entries in the GOT
 		add	r1, r1, r0		@ table.  This fixes up the
-		str	r1, [r6], #4		@ C references.
-		cmp	r6, ip
+		str	r1, [r11], #4		@ C references.
+		cmp	r11, ip
 		blo	1b
 #else
 
@@ -208,12 +217,12 @@
 		 * Relocate entries in the GOT table.  We only relocate
 		 * the entries that are outside the (relocated) BSS region.
 		 */
-1:		ldr	r1, [r6, #0]		@ relocate entries in the GOT
+1:		ldr	r1, [r11, #0]		@ relocate entries in the GOT
 		cmp	r1, r2			@ entry < bss_start ||
 		cmphs	r3, r1			@ _end < entry
 		addlo	r1, r1, r0		@ table.  This fixes up the
-		str	r1, [r6], #4		@ C references.
-		cmp	r6, ip
+		str	r1, [r11], #4		@ C references.
+		cmp	r11, ip
 		blo	1b
 #endif
 
@@ -239,6 +248,7 @@
  * Check to see if we will overwrite ourselves.
  *   r4 = final kernel address
  *   r5 = start of this image
+ *   r6 = size of decompressed image
  *   r2 = end of malloc space (and therefore this image)
  * We basically want:
  *   r4 >= r2 -> OK
@@ -246,8 +256,7 @@
  */
 		cmp	r4, r2
 		bhs	wont_overwrite
-		sub	r3, sp, r5		@ > compressed kernel size
-		add	r0, r4, r3, lsl #2	@ allow for 4x expansion
+		add	r0, r4, r6
 		cmp	r0, r5
 		bls	wont_overwrite
 
@@ -263,7 +272,6 @@
  * r1-r3  = unused
  * r4     = kernel execution address
  * r5     = decompressed kernel start
- * r6     = processor ID
  * r7     = architecture ID
  * r8     = atags pointer
  * r9-r12,r14 = corrupted
@@ -304,7 +312,8 @@
 		.word	_end			@ r3
 		.word	zreladdr		@ r4
 		.word	_start			@ r5
-		.word	_got_start		@ r6
+		.word	_image_size		@ r6
+		.word	_got_start		@ r11
 		.word	_got_end		@ ip
 		.word	user_stack+4096		@ sp
 LC1:		.word	reloc_end - reloc_start
@@ -328,7 +337,6 @@
  *
  * On entry,
  *  r4 = kernel execution address
- *  r6 = processor ID
  *  r7 = architecture number
  *  r8 = atags pointer
  *  r9 = run-time address of "start"  (???)
@@ -481,6 +489,7 @@
 		mcr	p15, 0, r0, c1, c0, 0	@ load control register
 		mrc	p15, 0, r0, c1, c0, 0	@ and read it back
 		mov	r0, #0
+		mcr	p15, 0, r0, c8, c7, 0	@ invalidate I,D TLBs
 		mcr	p15, 0, r0, c7, c5, 4	@ ISB
 		mov	pc, r12
 
@@ -534,7 +543,6 @@
  * r1-r3  = unused
  * r4     = kernel execution address
  * r5     = decompressed kernel start
- * r6     = processor ID
  * r7     = architecture ID
  * r8     = atags pointer
  * r9-r12,r14 = corrupted
@@ -573,19 +581,19 @@
  *  r1  = corrupted
  *  r2  = corrupted
  *  r3  = block offset
- *  r6  = corrupted
+ *  r9  = corrupted
  *  r12 = corrupted
  */
 
 call_cache_fn:	adr	r12, proc_types
 #ifdef CONFIG_CPU_CP15
-		mrc	p15, 0, r6, c0, c0	@ get processor ID
+		mrc	p15, 0, r9, c0, c0	@ get processor ID
 #else
-		ldr	r6, =CONFIG_PROCESSOR_ID
+		ldr	r9, =CONFIG_PROCESSOR_ID
 #endif
 1:		ldr	r1, [r12, #0]		@ get value
 		ldr	r2, [r12, #4]		@ get mask
-		eor	r1, r1, r6		@ (real ^ match)
+		eor	r1, r1, r9		@ (real ^ match)
 		tst	r1, r2			@       & mask
  ARM(		addeq	pc, r12, r3		) @ call cache function
  THUMB(		addeq	r12, r3			)
@@ -737,12 +745,13 @@
 		W(b)	__armv4_mmu_cache_off
 		W(b)	__armv4_mmu_cache_flush
 
-		.word	0x0007b000		@ ARMv6
-		.word	0x000ff000
+#ifdef CONFIG_DOVE_DEBUGGER_MODE_V6
+		.word	0x000f0000		@ ARMv6
+		.word	0x000f0000
 		W(b)	__armv4_mmu_cache_on
 		W(b)	__armv4_mmu_cache_off
 		W(b)	__armv6_mmu_cache_flush
-
+#endif
 		.word	0x000f0000		@ new CPU Id
 		.word	0x000f0000
 		W(b)	__armv7_mmu_cache_on
@@ -764,8 +773,7 @@
  * Turn off the Cache and MMU.  ARMv3 does not support
  * reading the control register, but ARMv4 does.
  *
- * On entry,  r6 = processor ID
- * On exit,   r0, r1, r2, r3, r12 corrupted
+ * On exit, r0, r1, r2, r3, r9, r12 corrupted
  * This routine must preserve: r4, r6, r7
  */
 		.align	5
@@ -838,10 +846,8 @@
 /*
  * Clean and flush the cache to maintain consistency.
  *
- * On entry,
- *  r6 = processor ID
  * On exit,
- *  r1, r2, r3, r11, r12 corrupted
+ *  r1, r2, r3, r9, r11, r12 corrupted
  * This routine must preserve:
  *  r0, r4, r5, r6, r7
  */
@@ -953,7 +959,7 @@
 		mov	r2, #64*1024		@ default: 32K dcache size (*2)
 		mov	r11, #32		@ default: 32 byte line size
 		mrc	p15, 0, r3, c0, c0, 1	@ read cache type
-		teq	r3, r6			@ cache ID register present?
+		teq	r3, r9			@ cache ID register present?
 		beq	no_cache_id
 		mov	r1, r3, lsr #18
 		and	r1, r1, #7
--- linux-mvl-dove-2.6.32.orig/arch/arm/boot/compressed/misc.c
+++ linux-mvl-dove-2.6.32/arch/arm/boot/compressed/misc.c
@@ -48,6 +48,18 @@
 
 	asm("mcr p14, 0, %0, c0, c5, 0" : : "r" (ch));
 }
+
+#elif defined(CONFIG_CPU_V7)
+
+static void icedcc_putc(int ch)
+{
+	asm(
+	"wait:	mrc	p14, 0, pc, c0, c1, 0			\n\
+		bcs	wait					\n\
+		mcr     p14, 0, %0, c0, c5, 0			"
+	: : "r" (ch));
+}
+
 #elif defined(CONFIG_CPU_XSCALE)
 
 static void icedcc_putc(int ch)
--- linux-mvl-dove-2.6.32.orig/arch/arm/boot/compressed/vmlinux.lds.in
+++ linux-mvl-dove-2.6.32/arch/arm/boot/compressed/vmlinux.lds.in
@@ -36,6 +36,9 @@
 
   _etext = .;
 
+  /* Assume size of decompressed image is 4x the compressed image */
+  _image_size = (_etext - _text) * 4;
+
   _got_start = .;
   .got			: { *(.got) }
   _got_end = .;
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/pcie.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/pcie.c
@@ -75,7 +75,7 @@
 	return (stat >> PCIE_STAT_BUS_OFFS) & PCIE_STAT_BUS_MASK;
 }
 
-void __init orion_pcie_set_local_bus_nr(void __iomem *base, int nr)
+void orion_pcie_set_local_bus_nr(void __iomem *base, int nr)
 {
 	u32 stat;
 
@@ -90,12 +90,15 @@
  * BAR[0,2] -> disabled, BAR[1] -> covers all DRAM banks
  * WIN[0-3] -> DRAM bank[0-3]
  */
-static void __init orion_pcie_setup_wins(void __iomem *base,
+static void orion_pcie_setup_wins(void __iomem *base,
 					 struct mbus_dram_target_info *dram)
 {
 	u32 size;
 	int i;
 
+	if (dram == NULL)
+		return;
+
 	/*
 	 * First, disable and clear BARs and windows.
 	 */
@@ -140,7 +143,7 @@
 	writel(((size - 1) & 0xffff0000) | 1, base + PCIE_BAR_CTRL_OFF(1));
 }
 
-void __init orion_pcie_setup(void __iomem *base,
+void orion_pcie_setup(void __iomem *base,
 			     struct mbus_dram_target_info *dram)
 {
 	u16 cmd;
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/Makefile
@@ -8,3 +8,5 @@
 obj-	:=
 
 obj-$(CONFIG_GENERIC_GPIO) += gpio.o
+
+obj-$(CONFIG_MV_HAL_DRIVERS_SUPPORT) += mv_hal_drivers/
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/time.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/time.c
@@ -20,7 +20,7 @@
 #include <linux/irq.h>
 #include <asm/mach/time.h>
 #include <mach/bridge-regs.h>
-#include <mach/hardware.h>
+#include <plat/time.h>
 
 /*
  * Number of timer ticks per jiffy.
@@ -29,20 +29,6 @@
 
 
 /*
- * Timer block registers.
- */
-#define TIMER_CTRL		(TIMER_VIRT_BASE + 0x0000)
-#define  TIMER0_EN		0x0001
-#define  TIMER0_RELOAD_EN	0x0002
-#define  TIMER1_EN		0x0004
-#define  TIMER1_RELOAD_EN	0x0008
-#define TIMER0_RELOAD		(TIMER_VIRT_BASE + 0x0010)
-#define TIMER0_VAL		(TIMER_VIRT_BASE + 0x0014)
-#define TIMER1_RELOAD		(TIMER_VIRT_BASE + 0x0018)
-#define TIMER1_VAL		(TIMER_VIRT_BASE + 0x001c)
-
-
-/*
  * Orion's sched_clock implementation. It has a resolution of
  * at least 7.5ns (133MHz TCLK) and a maximum value of 834 days.
  *
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/gpio.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/gpio.c
@@ -323,12 +323,18 @@
 	return 0;
 }
 
+int	gpio_irq_set_wake(unsigned int irq, unsigned int on)
+{
+	return 0;
+}
+
 struct irq_chip orion_gpio_irq_chip = {
 	.name		= "orion_gpio_irq",
 	.ack		= gpio_irq_ack,
 	.mask		= gpio_irq_mask,
 	.unmask		= gpio_irq_unmask,
 	.set_type	= gpio_irq_set_type,
+	.set_wake	= gpio_irq_set_wake,
 };
 
 void orion_gpio_irq_handler(int pinoff)
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/include/plat/mv_cesa.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/include/plat/mv_cesa.h
@@ -0,0 +1,18 @@
+/*
+ * Marvell Cesa platform device data definition file.
+ */
+
+#ifndef __ASM_PLAT_ORION_MV_CESA_H
+#define __ASM_PLAT_ORION_MV_CESA_H
+
+#include <linux/dmaengine.h>
+#include <linux/mbus.h>
+
+
+struct mbus_dram_target_info;
+
+struct mv_cesa_addr_dec_platform_data {
+	struct mbus_dram_target_info	*dram;
+};
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/include/plat/i2s-orion.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/include/plat/i2s-orion.h
@@ -0,0 +1,23 @@
+/*
+ * include/asm-arm/plat-orion/i2s-orion.h
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __ASM_PLAT_ORION_I2S_ORION_H
+#define __ASM_PLAT_ORION_I2S_ORION_H
+
+#include <linux/mbus.h>
+
+struct orion_i2s_platform_data {
+	struct mbus_dram_target_info	*dram;
+	int	spdif_rec;
+	int	spdif_play;
+	int	i2s_rec;
+	int	i2s_play;
+};
+
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/include/plat/time.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/include/plat/time.h
@@ -1,5 +1,5 @@
 /*
- * arch/arm/plat-orion/include/plat/time.h
+ * include/asm-arm/plat-orion/time.h
  *
  * Marvell Orion SoC time handling.
  *
@@ -8,8 +8,19 @@
  * warranty of any kind, whether express or implied.
  */
 
-#ifndef __PLAT_TIME_H
-#define __PLAT_TIME_H
+#ifndef __ASM_PLAT_ORION_TIME_H
+#define __ASM_PLAT_ORION_TIME_H
+#define   TIMER_CTRL		(TIMER_VIRT_BASE + 0x0000)
+#define    TIMER0_EN		0x0001
+#define    TIMER0_RELOAD_EN	0x0002
+#define    TIMER1_EN		0x0004
+#define    TIMER1_RELOAD_EN	0x0008
+#define   TIMER0_RELOAD		(TIMER_VIRT_BASE + 0x0010)
+#define   TIMER0_VAL		(TIMER_VIRT_BASE + 0x0014)
+#define   TIMER1_RELOAD		(TIMER_VIRT_BASE + 0x0018)
+#define   TIMER1_VAL		(TIMER_VIRT_BASE + 0x001c)
+#define   TIMER_WD_RELOAD		(TIMER_VIRT_BASE + 0x0020)
+#define   TIMER_WD_VAL		(TIMER_VIRT_BASE + 0x0024)
 
 void orion_time_init(unsigned int irq, unsigned int tclk);
 
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/include/plat/cafe-orion.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/include/plat/cafe-orion.h
@@ -0,0 +1,18 @@
+/*
+ * include/asm-arm/plat-orion/cafe-orion.h
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __ASM_PLAT_ORION_CAFE_ORION_H
+#define __ASM_PLAT_ORION_CAFE_ORION_H
+
+struct cafe_cam_platform_data {
+	int power_down; /* value to set into GPR to power down the sensor*/ 
+	int reset;	/* value to set into GPR to reset the senser */
+	int numbered_i2c_bus;
+	unsigned int i2c_bus_id;
+};
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/include/plat/orion_nfc.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/include/plat/orion_nfc.h
@@ -0,0 +1,33 @@
+#ifndef __ASM_ARCH_ORION_NFC_H
+#define __ASM_ARCH_ORION_NFC_H
+
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "pdma/mvPdma.h"
+#include "nfc/mvNfc.h"
+
+enum nfc_page_size
+{
+	NFC_PAGE_512B = 0,
+	NFC_PAGE_2KB,
+	NFC_PAGE_4KB,
+	NFC_PAGE_8KB,
+	NFC_PAGE_16KB,
+	NFC_PAGE_SIZE_MAX_CNT
+};
+
+struct nfc_platform_data {
+	unsigned int		tclk;		/* Clock supplied to NFC */
+	unsigned int		nfc_width;	/* Width of NFC 16/8 bits */
+	unsigned int		num_devs;	/* Number of NAND devices 
+						   (2 for ganged mode).   */
+	unsigned int		num_cs;		/* Number of NAND devices 
+						   chip-selects.	  */
+	unsigned int		use_dma;	/* Enable/Disable DMA 1/0 */
+	MV_NFC_ECC_MODE		ecc_type;
+	struct mtd_partition *	parts;
+	unsigned int		nr_parts;	
+};
+#endif /* __ASM_ARCH_ORION_NFC_H */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/include/plat/ehci-orion.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/include/plat/ehci-orion.h
@@ -13,6 +13,7 @@
 
 enum orion_ehci_phy_ver {
 	EHCI_PHY_ORION,
+	EHCI_PHY_DOVE,
 	EHCI_PHY_DD,
 	EHCI_PHY_KW,
 	EHCI_PHY_NA,
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/include/plat/mv_eth.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/include/plat/mv_eth.h
@@ -0,0 +1,19 @@
+/*
+ * Marvell Ethernet platform device data definition file.
+ */
+
+#ifndef __ASM_PLAT_ORION_MV_ETH_H
+#define __ASM_PLAT_ORION_MV_ETH_H
+
+#include <linux/dmaengine.h>
+#include <linux/mbus.h>
+
+#define MV_ETH_ADDR_DEC_NAME	"mv_eth_addr_decode"
+
+struct mbus_dram_target_info;
+
+struct mv_eth_addr_dec_platform_data {
+	struct mbus_dram_target_info	*dram;
+};
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/Kconfig
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/Kconfig
@@ -0,0 +1,115 @@
+if PLAT_ORION
+
+menu "Orion SoC options"
+depends on MV_HAL_DRIVERS_SUPPORT
+#since the Kconfig parser dispatch all source commands, we call the machines Kconfigs from here and
+#not vice versa because otherwise the plat-feroceon Kconfig will be dispatched twice.     
+
+config MV_INCLUDE_IDMA
+	bool "IDMA Support"
+	default y
+        ---help---
+        Please don't change this configs unless you know what you are doing.
+
+config MV_INCLUDE_USB
+	bool "USB Support"
+	default y
+        ---help---
+        Please don't change this configs unless you know what you are doing.
+
+config MV_INCLUDE_XOR
+	bool "XOR Support"
+	default y
+        ---help---
+        Please don't change this configs unless you know what you are doing.
+
+config MV_INCLUDE_CESA
+	bool "CESA Support"
+	default y
+        ---help---
+        Please don't change this configs unless you know what you are doing.
+
+config MV_INCLUDE_GIG_ETH
+	bool "Giga Ethernet Support"
+	default y
+
+config MV_INCLUDE_AUDIO
+	bool "Audio Support"
+	default y
+        ---help---
+        Please don't change this configs unless you know what you are doing.
+
+config MV_INCLUDE_INTEG_SATA
+        bool "Integrated SATA Support"
+        default y
+        ---help---
+        Please don't change this configs unless you know what you are doing.
+
+config MV_INCLUDE_PMU
+	bool "PM Support"
+	depends on ARCH_DOVE
+	default y
+	---help---
+	Include the support of the Power Management Features.
+	Please don't change this configs unless you know what you are doing.
+
+config MV_INCLUDE_NFC
+	bool "Integrated Nand Flash Support"
+	depends on ARCH_DOVE
+	default y
+	---help---
+	Please don't change this configs unless you know what you are doing.
+
+
+config MV_DDRMMC
+	bool
+	depends on ARCH_DOVE
+	default y
+
+
+endmenu
+
+menu "Soc DMA accelerations"
+
+source arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_xor/Kconfig
+
+#source arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_dma/Kconfig
+
+endmenu
+
+menu "SoC Networking support"
+depends on MV_INCLUDE_GIG_ETH
+
+source arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_network/Kconfig
+
+endmenu
+
+
+source arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_cesa/Kconfig
+
+config  SCSI_MVSATA
+        tristate "Support for Marvell Sata Adapters"
+	depends on MV_HAL_DRIVERS_SUPPORT
+        depends on ( MV_INCLUDE_INTEG_SATA && SCSI ) || ( PCI && SCSI )
+        ---help---
+          Choosing this option will enable you to use the Marvell Sata
+          adapters support with emulation as SCSI adapters.
+          Note that the kernel scsi subsystem must be chosen too.
+
+source arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sata/Kconfig
+
+# Definitions to make life easier
+config MV_FAST_PATH_ETHERNET
+        bool
+endif
+
+source arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_key/Kconfig
+
+config  MV_DBG_TRACE
+        bool "Enable tracing utility"
+        default n
+        ---help---
+          Choosing this debug option will cause some kernel modules to log operations into
+          a cyclic buffer and dump them on failures. Enabling this feature decreases performance.
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/dummy.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/dummy.c
@@ -0,0 +1 @@
+/* This is empty C file */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/Makefile
@@ -0,0 +1,92 @@
+#*******************************************************************************
+# Marvell GPL License Option
+#
+# If you received this File from Marvell, you may opt to use, redistribute and/or 
+# modify this File in accordance with the terms and conditions of the General 
+# Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+# available along with the File in the license.txt file or by writing to the Free 
+# Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+# on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+#
+# THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+# WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+# DISCLAIMED.  The GPL License provides additional details about this warranty 
+# disclaimer.
+#*******************************************************************************/
+include $(srctree)/$(subst ",,$(CONFIG_MV_HAL_RULES_PATH))
+
+# Objects list
+
+SUBMAKE=@$(SHELL) $(srctree)/$(src)/mv_submake.sh
+
+COMMON_OBJS		= mvDebug.o mvCommon.o mvStack.o
+OSSERVICES_OBJS		= mvOs.o
+AUDIO_HAL_OBJS		= mvAudio.o
+DRAM_HAL_OBJS		= mvDramTmng.o
+PMU_HAL_OBJS		= mvPmu.o mvPmu_asm.o mvSram.o
+USB_HAL_OBJS		= mvUsb.o
+ETH_HAL_OBJS		= mvEth.o mvEthDebug.o
+ETHPHY_HAL_OBJS		= mvEthPhy.o
+CESA_HAL_OBJS		= mvCesa.o mvCesaDebug.o mvMD5.o mvSHA1.o
+CESA_TEST_HAL_OBJS	= mvCesaTest.o
+CESA_AES_HAL_OBJS	= mvAesAlg.o mvAesApi.o
+NFC_HAL_OBJS		= mvNfc.o
+PDMA_HAL_OBJS		= mvPdma.o
+SATA_HAL_OBJS		= mvSata.o mvStorageDev.o mvLog.o
+
+PHONY += dummy dummy_end FORCE
+
+mv_submake: FORCE
+	$(SUBMAKE) $(COMMON_DIR) $(COMMON_OBJS)
+	$(SUBMAKE) $(OSSERV_DIR) $(OSSERVICES_OBJS)
+	$(SUBMAKE) $(HAL_AUDIO_DIR) cond CONFIG_MV_INCLUDE_AUDIO $(AUDIO_HAL_OBJS)
+	$(SUBMAKE) $(HAL_PMU_DIR) cond CONFIG_MV_INCLUDE_PMU $(PMU_HAL_OBJS) opt "AFLAGS_mvPmu_asm.o := $(EXTRA_INCLUDE) $(MV_DEFINE)"
+	$(SUBMAKE) $(HAL_DDRMC_DIR) cond CONFIG_MV_DDRMMC $(DRAM_HAL_OBJS)
+	$(SUBMAKE) $(HAL_USB_DIR) cond CONFIG_MV_INCLUDE_USB $(USB_HAL_OBJS)
+	$(SUBMAKE) $(HAL_ETH_DIR) cond CONFIG_MV_INCLUDE_GIG_ETH $(ETH_HAL_OBJS)
+	$(SUBMAKE) $(HAL_ETHPHY_DIR) cond CONFIG_MV_INCLUDE_GIG_ETH $(ETHPHY_HAL_OBJS)
+	$(SUBMAKE) $(HAL_CESA_DIR) cond CONFIG_MV_INCLUDE_CESA $(CESA_HAL_OBJS) cond CONFIG_MV_CESA_TEST $(CESA_TEST_HAL_OBJS)
+	$(SUBMAKE) $(HAL_CESA_AES_DIR) cond CONFIG_MV_INCLUDE_CESA $(CESA_AES_HAL_OBJS)
+	$(SUBMAKE) $(HAL_NFC_DIR) cond CONFIG_MV_INCLUDE_NFC $(NFC_HAL_OBJS)
+	$(SUBMAKE) $(HAL_PDMA_DIR) cond CONFIG_MV_INCLUDE_NFC $(PDMA_HAL_OBJS)
+	$(SUBMAKE) $(HAL_SATA_DIR) cond CONFIG_SCSI_MVSATA $(SATA_HAL_OBJS)
+
+mv_submake_end: FORCE
+	@rm $(COMMON_DIR)/Makefile
+	@rm $(OSSERV_DIR)/Makefile
+	@rm $(HAL_AUDIO_DIR)/Makefile
+	@rm $(HAL_PMU_DIR)/Makefile
+	@rm $(HAL_DDRMC_DIR)/Makefile
+	@rm $(HAL_USB_DIR)/Makefile
+	@rm $(HAL_ETH_DIR)/Makefile
+	@rm $(HAL_ETHPHY_DIR)/Makefile
+	@rm $(HAL_CESA_DIR)/Makefile
+	@rm $(HAL_CESA_AES_DIR)/Makefile
+	@rm $(HAL_NFC_DIR)/Makefile
+	@rm $(HAL_PDMA_DIR)/Makefile
+	@rm $(HAL_SATA_DIR)/Makefile
+
+$(obj)/dummy.o: mv_submake
+
+$(obj)/dummy_end.o: mv_submake_end
+
+ifneq ($(KBUILD_BUILTIN),)
+obj-y +=  										\
+		common/ linux_oss/ mv_hal/audio/ mv_hal/pmu/ mv_hal/ddr/ddrmc/		\
+		mv_hal/usb/ mv_hal/eth/gbe/ mv_hal/eth-phy/ mv_hal/cesa/		\
+		mv_hal/cesa/AES/ mv_hal/nfc/ mv_hal/pdma/ mv_hal/sata/CoreDriver/
+endif
+# core drivers part
+
+obj-$(CONFIG_MV_USE_XOR_ENGINE) 	+= mv_drivers_lsp/mv_xor/
+obj-$(CONFIG_MV_CESA) 			+= mv_drivers_lsp/mv_cesa/
+
+# The rest of the drivers are compiled through the driver dir directly.
+
+obj-y   				+= mv_drivers_lsp/mv_key/
+
+
+# Opens:
+#	Flags (PMU)
+#	Conditional compilation
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/dummy_end.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/dummy_end.c
@@ -0,0 +1 @@
+/* This is empty C file */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_submake.sh
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_submake.sh
@@ -0,0 +1,38 @@
+#!/bin/bash
+# Create a Makefile in a given directory for a given list of objects.
+# $1 - Dir name.
+# $2... - List of files.
+# <dir name> [cond <compilation condition>] <file 1> [cond <compilation condition>] <file 2> ... <file n> [, <options>]
+
+OUTMAKE=$1/Makefile
+
+# Create a new makefile
+
+echo "include \$(srctree)/\$(subst \",,\$(CONFIG_MV_HAL_RULES_PATH))" > $OUTMAKE
+
+echo "# Objects list" >> $OUTMAKE
+
+OBJ_TYPE="y"
+
+shift
+while [ "$1" ]; do
+	if [ "$1" = "cond" ]; then
+		shift
+		OBJ_TYPE=\$\($1\)
+		shift
+	fi
+	if [ "$1" = "opt" ]; then
+		shift
+		break;
+	fi
+	echo "obj-$OBJ_TYPE += $1" >> $OUTMAKE
+        shift
+done
+echo "" >> $OUTMAKE
+
+while [ "$1" ]; do
+	echo "$1" >> $OUTMAKE
+        shift
+done
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_audio_soc/mv88fx-pcm.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_audio_soc/mv88fx-pcm.h
@@ -0,0 +1,134 @@
+/*
+ *
+ *	Marvell Orion Alsa SOC Sound driver
+ *
+ *	Author: Yuval Elmaliah
+ *	Copyright (C) 2008 Marvell Ltd
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation
+ *
+ */
+
+
+#ifndef _MV88FX_PCM_H
+#define _MV88FX_PCM_H
+
+#define DRIVER_NAME	"mv88fx_snd"
+
+#ifdef MV88FX_SND_DEBUG
+#define mv88fx_snd_debug(format, args...) \
+	printk(KERN_DEBUG "%s(%d): "format"\n", __func__, __LINE__, ##args)
+#else
+#define mv88fx_snd_debug(a...)
+#endif
+#define mv88fx_snd_error(format, args...) \
+	printk(KERN_ERR "%s(%d): "format"\n", __func__, __LINE__, ##args)
+
+
+struct mv88fx_snd_stream {
+
+unsigned int dig_mode;	/* i2s,spdif,both */
+
+#define I2S		1
+#define SPDIF		2
+	int mono_mode;	/* both mono, left mono, right mono */
+#define MONO_BOTH	0
+#define MONO_LEFT	1
+#define MONO_RIGHT	2
+	int clock_src;
+
+#define DCO_CLOCK	0
+#define SPCR_CLOCK	1
+#define EXTERN_CLOCK	2
+	int stat_mem;	/* Channel status source */
+
+ unsigned int spdif_status[4];	/* SPDIF status */
+
+};
+
+struct mv88fx_dma_window_config {
+	unsigned int 	playback_base;
+	unsigned int 	playback_ctrl;
+	unsigned int 	record_base;
+	unsigned int 	record_ctrl;
+};
+
+struct mv88fx_snd_chip {
+	struct snd_card *card;
+	struct snd_pcm *pcm;
+	struct device *dev;
+	int port;
+	struct orion_i2s_platform_data *pdata;	/* platform dara */
+	struct mv88fx_snd_stream stream[2];	/* run time values */
+	spinlock_t reg_lock;	/* Register access spinlock */
+	void __iomem *base;	/* base address of the host */
+	int loopback;		/* When Loopback is enabled, playback
+				data is looped back to be recorded */
+	int ch_stat_valid;	/* Playback SPDIF channel validity bit
+				   value when REG selected */
+	int burst;		/* DMA Burst Size */
+#define SPDIF_MEM_STAT		0
+#define SPDIF_REG_STAT		1
+	unsigned int dco_ctrl_offst;
+	int pcm_mode;		/* pcm, nonpcm */
+#define PCM		0
+#define NON_PCM		1
+	int irq;
+
+	struct mv88fx_dma_window_config dma_window_config;
+
+};
+
+
+
+struct mv88fx_snd_machine_data {
+	struct platform_device *snd_dev;
+	int port;
+	void __iomem *base;	/* base address of the host */
+	int irq;
+	struct resource *res;	/* resource for IRQ and base */
+	struct orion_i2s_platform_data *pdata;	/* platform dara */
+#if defined(CONFIG_HAVE_CLK)
+	struct clk		*clk;
+#endif
+};
+
+
+#define MV88FX_SND_MIN_PERIODS		8
+#define MV88FX_SND_MAX_PERIODS		16
+#define	MV88FX_SND_MIN_PERIOD_BYTES	0x100
+#define	MV88FX_SND_MAX_PERIOD_BYTES	0x1000
+
+
+/* read/write registers */
+#define mv88fx_snd_writel(base, offs, val)	\
+	writel((val), (base + offs))
+
+#define mv88fx_snd_readl(base, offs)	\
+	readl(base + offs)
+
+#define mv88fx_snd_bitset(base, offs, bitmask)	\
+	writel((readl(base + offs) | (bitmask)),	\
+	base + offs)
+
+#define mv88fx_snd_bitreset(base, offs, bitmask) \
+	writel((readl(base + offs) & (~(bitmask))), \
+	base + offs)
+
+
+
+
+extern struct mv88fx_snd_chip *mv88fx_pcm_snd_chip;
+
+#define mv88fx_pcm_get_chip() mv88fx_pcm_snd_chip
+#define mv88fx_pcm_is_stereo(runtime)        ((runtime)->channels != 1)
+
+
+extern struct snd_soc_platform mv88fx_soc_platform;
+
+
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_audio_soc/mv88fx-pcm.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_audio_soc/mv88fx-pcm.c
@@ -0,0 +1,643 @@
+/*
+ *
+ *	Marvell Orion Alsa SOC Sound driver
+ *
+ *	Author: Yuval Elmaliah
+ *	Copyright (C) 2008 Marvell Ltd.
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/dma-mapping.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <linux/platform_device.h>
+#include <sound/soc.h>
+#include <sound/soc-dai.h>
+#include <linux/mbus.h>
+#include <linux/irqreturn.h>
+#include <linux/version.h>
+#include <linux/interrupt.h>
+#include <asm/dma.h>
+#include <linux/io.h>
+#include <linux/scatterlist.h>
+#include <asm/sizes.h>
+#include <mvTypes.h>
+#include <plat/i2s-orion.h>
+#include "audio/mvAudioRegs.h"
+#include "mv88fx-pcm.h"
+
+#include "audio/mvAudio.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+
+#ifdef CONFIG_MACH_DOVE_RD_AVNG
+#include <linux/gpio.h>
+#include <asm/mach-types.h>
+#endif
+
+struct mv88fx_snd_chip *mv88fx_pcm_snd_chip;
+EXPORT_SYMBOL_GPL(mv88fx_pcm_snd_chip);
+
+static struct snd_pcm_hardware mv88fx_pcm_hardware = {
+	.info = (SNDRV_PCM_INFO_INTERLEAVED |
+		 SNDRV_PCM_INFO_MMAP |
+		 SNDRV_PCM_INFO_MMAP_VALID |
+		 SNDRV_PCM_INFO_BLOCK_TRANSFER | SNDRV_PCM_INFO_PAUSE),
+	.formats = (SNDRV_PCM_FMTBIT_S16_LE |
+		    SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE),
+	.rates = (SNDRV_PCM_RATE_44100 |
+		  SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000),
+	.rate_min = 44100,
+	.rate_max = 96000,
+	.channels_min = 1,
+	.channels_max = 2,
+	.buffer_bytes_max = (16 * 1024 * 1024),
+	.period_bytes_min = MV88FX_SND_MIN_PERIOD_BYTES,
+	.period_bytes_max = MV88FX_SND_MAX_PERIOD_BYTES,
+	.periods_min = MV88FX_SND_MIN_PERIODS,
+	.periods_max = MV88FX_SND_MAX_PERIODS,
+	.fifo_size = 0,
+
+};
+
+static void mv88fx_pcm_init_stream(struct mv88fx_snd_chip *chip,
+				   struct mv88fx_snd_stream *stream,
+				   int stream_id)
+{
+	memset(stream, 0, sizeof(*stream));
+	if (stream_id == SNDRV_PCM_STREAM_PLAYBACK) {
+		stream->dig_mode = 0;
+		if (chip->pdata->i2s_play)
+			stream->dig_mode |= I2S;
+		if (chip->pdata->spdif_play)
+			stream->dig_mode |= SPDIF;
+
+		stream->mono_mode = MONO_BOTH;
+		stream->stat_mem = 0;
+		stream->clock_src = DCO_CLOCK;
+	} else {
+		if (chip->pdata->i2s_rec)
+			stream->dig_mode = I2S;
+		else if (chip->pdata->spdif_rec)
+			stream->dig_mode = SPDIF;
+
+		stream->mono_mode = MONO_LEFT;
+		stream->stat_mem = 0;
+		stream->clock_src = DCO_CLOCK;
+	}
+}
+
+
+
+static int mv88fx_find_dram_cs(struct mbus_dram_target_info *dram,
+			       u32 base, u32 size)
+{
+	int i;
+
+	mv88fx_snd_debug("base=0x%x size=%u dram=%p", base, size, dram);
+
+	for (i = 0; i < dram->num_cs; i++) {
+		struct mbus_dram_window *cs = dram->cs + i;
+		/* check if we fit into one memory window only */
+		if ((base >= cs->base) &&
+		    ((base + size) <= cs->base + cs->size))
+			return i;
+
+	}
+
+	mv88fx_snd_error("");
+	return -1;
+}
+static int mv88fx_config_dma_window(struct mv88fx_snd_chip *chip,
+				    int dma, struct mbus_dram_target_info *dram)
+{
+	struct mbus_dram_window *cs;
+	struct snd_pcm_substream *substream = chip->pcm->streams[dma].substream;
+
+	int win;
+
+#define WINDOW_CTRL(dma)		(0xA0C - ((dma) << 3))
+#define WINDOW_BASE(dma)		(0xA08 - ((dma) << 3))
+
+	mv88fx_snd_debug("");
+	/*
+	 * we have one window for each dma (playback dma and recording),
+	 * confiure it to point to the dram window where the buffer falls in
+	 */
+	win = mv88fx_find_dram_cs(dram,
+				  (u32) substream->dma_buffer.addr,
+				  (u32) MV88FX_SND_MAX_PERIODS *
+				  MV88FX_SND_MAX_PERIOD_BYTES);
+	if (win < 0)
+		return -1;
+
+	cs = dram->cs + win;
+	writel(((cs->size - 1) & 0xffff0000) |
+	       (cs->mbus_attr << 8) |
+	       (dram->mbus_dram_target_id << 4) | 1,
+	       chip->base + MV_AUDIO_REGS_OFFSET(chip->port) + WINDOW_CTRL(dma));
+	writel(cs->base,
+	       chip->base + MV_AUDIO_REGS_OFFSET(chip->port) + WINDOW_BASE(dma));
+
+	if(dma==SNDRV_PCM_STREAM_PLAYBACK)
+	{
+		chip->dma_window_config.playback_base=
+		readl(chip->base + MV_AUDIO_REGS_OFFSET(chip->port) + WINDOW_BASE(dma));
+		chip->dma_window_config.playback_ctrl=
+		readl(chip->base + MV_AUDIO_REGS_OFFSET(chip->port) + WINDOW_CTRL(dma));
+	}
+	else
+	{
+		chip->dma_window_config.record_base=
+		readl(chip->base + MV_AUDIO_REGS_OFFSET(chip->port) + WINDOW_BASE(dma));
+		chip->dma_window_config.record_ctrl=
+		readl(chip->base + MV_AUDIO_REGS_OFFSET(chip->port) + WINDOW_CTRL(dma));
+	}
+		
+	
+
+
+#undef WINDOW_CTRL
+#undef WINDOW_BASE
+
+	return win;
+}
+static int mv88fx_conf_mbus_windows(struct mv88fx_snd_chip *chip,
+				    struct mbus_dram_target_info *dram)
+{
+	mv88fx_snd_debug("");
+	/*
+	 * we have one window for playback and one for recording
+	 */
+	if (mv88fx_config_dma_window(chip, SNDRV_PCM_STREAM_PLAYBACK, dram) < 0)
+		return -1;
+
+	if (mv88fx_config_dma_window(chip, SNDRV_PCM_STREAM_CAPTURE, dram) < 0)
+		return -1;
+	return 0;
+}
+
+
+static irqreturn_t mv88fx_pcm_dma_interrupt(int irq, void *dev_id)
+{
+	struct mv88fx_snd_chip *chip = dev_id;
+	struct snd_pcm_substream *play_stream =
+	    chip->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
+	struct snd_pcm_substream *capture_stream =
+	    chip->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream;
+	unsigned int status, mask;
+
+	mv88fx_snd_debug("");
+
+	spin_lock(&chip->reg_lock);
+
+	/* read the active interrupt */
+	mask = mv88fx_snd_readl(chip->base,
+			MV_AUDIO_INT_MASK_REG(chip->port));
+	status = mv88fx_snd_readl(chip->base,
+			MV_AUDIO_INT_CAUSE_REG(chip->port)) & mask;
+
+	do {
+
+		if (status & ~(AICR_RECORD_BYTES_INT | AICR_PLAY_BYTES_INT)) {
+			spin_unlock(&chip->reg_lock);
+			snd_BUG();/* FIXME: should enable error interrupts */
+			return IRQ_NONE;
+		}
+
+		/* acknowledge interrupt */
+		mv88fx_snd_writel(chip->base,
+			MV_AUDIO_INT_CAUSE_REG(chip->port), status);
+
+		/* This is record event */
+		if (status & AICR_RECORD_BYTES_INT) {
+			mv88fx_snd_debug("capture");
+			spin_unlock(&chip->reg_lock);
+			if (capture_stream)
+				snd_pcm_period_elapsed(capture_stream);
+			spin_lock(&chip->reg_lock);
+		}
+		/* This is play event */
+		if (status & AICR_PLAY_BYTES_INT) {
+			mv88fx_snd_debug("playback");
+			spin_unlock(&chip->reg_lock);
+			if (play_stream)
+				snd_pcm_period_elapsed(play_stream);
+			spin_lock(&chip->reg_lock);
+
+		}
+
+		/* read the active interrupt */
+		mask = mv88fx_snd_readl(chip->base,
+				MV_AUDIO_INT_MASK_REG(chip->port));
+		status = mv88fx_snd_readl(chip->base,
+				MV_AUDIO_INT_CAUSE_REG(chip->port)) & mask;
+
+	} while (status);
+
+	spin_unlock(&chip->reg_lock);
+	return IRQ_HANDLED;
+
+}
+
+static int mv88fx_pcm_hw_params(struct snd_pcm_substream *substream,
+				struct snd_pcm_hw_params *params)
+{
+	struct snd_pcm_runtime *runtime = substream->runtime;
+	int err = 0;
+
+	mv88fx_snd_debug("substream=%p", substream);
+
+	snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
+	runtime->dma_bytes = params_buffer_bytes(params);
+	return err;
+
+}
+
+static int mv88fx_pcm_hw_free(struct snd_pcm_substream *substream)
+{
+	struct snd_pcm_runtime *runtime = substream->runtime;
+	struct snd_dma_buffer *buf = runtime->dma_buffer_p;
+
+	mv88fx_snd_debug("");
+
+	if (runtime->dma_area == NULL)
+		return 0;
+
+	if (buf != &substream->dma_buffer)
+		kfree(runtime->dma_buffer_p);
+
+	snd_pcm_set_runtime_buffer(substream, NULL);
+	return 0;
+}
+
+static int mv88fx_pcm_prepare(struct snd_pcm_substream *substream)
+{
+	struct snd_pcm_runtime *runtime = substream->runtime;
+	struct mv88fx_snd_stream *audio_stream = runtime->private_data;
+	struct mv88fx_snd_chip *chip = mv88fx_pcm_get_chip();
+
+	mv88fx_snd_debug("substream=%p chip=%p,chip->base=%p audio_stream=%p",
+			 substream, chip, chip->base, audio_stream);
+
+	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+		if ((audio_stream->dig_mode == I2S) &&
+		    (chip->pcm_mode == NON_PCM)) {
+			mv88fx_snd_error("");
+			return -1;
+		}
+
+	return 0;
+}
+
+static int mv88fx_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
+{
+	mv88fx_snd_debug("");
+	return 0;
+}
+
+static snd_pcm_uframes_t mv88fx_pcm_pointer(struct snd_pcm_substream *substream)
+{
+	struct mv88fx_snd_chip *chip = mv88fx_pcm_get_chip();
+	struct snd_pcm_runtime *runtime = substream->runtime;
+	snd_pcm_uframes_t offset;
+	ssize_t size;
+
+	mv88fx_snd_debug("");
+
+	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+		size = (ssize_t) mv88fx_snd_readl(chip->base,
+		       MV_AUDIO_PLAYBACK_BUFF_BYTE_CNTR_REG(chip->port));
+		offset = bytes_to_frames(substream->runtime, size);
+	} else {
+		size = (ssize_t) mv88fx_snd_readl(chip->base,
+			MV_AUDIO_RECORD_BUF_BYTE_CNTR_REG(chip->port));
+		offset = bytes_to_frames(substream->runtime, size);
+	}
+	if (offset >= runtime->buffer_size)
+		offset = 0;
+
+	return offset;
+}
+
+static int mv88fx_pcm_open(struct snd_pcm_substream *substream)
+{
+	struct mv88fx_snd_chip *chip = mv88fx_pcm_get_chip();
+	struct snd_pcm_runtime *runtime = substream->runtime;
+	int err = 0;
+
+	mv88fx_snd_debug("");
+
+	runtime->private_data = &chip->stream[substream->stream];
+
+	snd_soc_set_runtime_hwparams(substream, &mv88fx_pcm_hardware);
+
+	err = snd_pcm_hw_constraint_minmax(runtime,
+					   SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
+					   chip->burst * 2,
+					   AUDIO_REG_TO_SIZE(APBBCR_SIZE_MAX));
+	if (err < 0)
+		return err;
+
+	err = snd_pcm_hw_constraint_step(runtime, 0,
+					 SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
+					 chip->burst);
+	if (err < 0)
+		return err;
+
+	err = snd_pcm_hw_constraint_step(runtime, 0,
+					 SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
+					 chip->burst);
+	if (err < 0)
+		return err;
+
+	err = snd_pcm_hw_constraint_minmax(runtime,
+					   SNDRV_PCM_HW_PARAM_PERIODS,
+					   MV88FX_SND_MIN_PERIODS,
+					   MV88FX_SND_MAX_PERIODS);
+	if (err < 0)
+		return err;
+
+	err = snd_pcm_hw_constraint_integer(runtime,
+					    SNDRV_PCM_HW_PARAM_PERIODS);
+	if (err < 0)
+		return err;
+
+	return 0;
+}
+
+static void mv88fx_pcm_reset_spdif_status(struct mv88fx_snd_chip *chip,
+					  int usr_bits)
+{
+	int i;
+
+	mv88fx_snd_debug("");
+
+	for (i = 0; i < 4; i++) {
+		chip->stream[SNDRV_PCM_STREAM_PLAYBACK].spdif_status[i] = 0;
+
+		mv88fx_snd_writel(chip->base,
+				  MV_AUDIO_SPDIF_PLAY_CH_STATUS_LEFT_REG(chip->
+									 port,
+									 i), 0);
+		mv88fx_snd_writel(chip->base,
+				  MV_AUDIO_SPDIF_PLAY_CH_STATUS_RIGHT_REG(chip->
+									  port,
+									  i),
+				  0);
+		if (usr_bits) {
+			mv88fx_snd_writel(chip->base,
+					  MV_AUDIO_SPDIF_PLAY_USR_BITS_LEFT_REG
+					  (chip->port, i), 0);
+			mv88fx_snd_writel(chip->base,
+					  MV_AUDIO_SPDIF_PLAY_USR_BITS_RIGHT_REG
+					  (chip->port, i), 0);
+		}
+	}
+
+}
+
+static int mv88fx_pcm_close(struct snd_pcm_substream *substream)
+{
+	struct mv88fx_snd_chip *chip = mv88fx_pcm_get_chip();
+
+	mv88fx_snd_debug("");
+
+	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+		chip->pcm_mode = PCM;
+		mv88fx_pcm_reset_spdif_status(chip, 0);
+	}
+	return 0;
+}
+
+static int mv88fx_pcm_mmap(struct snd_pcm_substream *substream,
+			   struct vm_area_struct *vma)
+{
+	struct snd_pcm_runtime *runtime = substream->runtime;
+
+	mv88fx_snd_debug("");
+
+	return dma_mmap_coherent(NULL, vma, runtime->dma_area,
+				 runtime->dma_addr, runtime->dma_bytes);
+}
+
+struct snd_pcm_ops mv88fx_pcm_ops = {
+	.open = mv88fx_pcm_open,
+	.close = mv88fx_pcm_close,
+	.ioctl = snd_pcm_lib_ioctl,
+	.hw_params = mv88fx_pcm_hw_params,
+	.hw_free = mv88fx_pcm_hw_free,
+	.prepare = mv88fx_pcm_prepare,
+	.trigger = mv88fx_pcm_trigger,
+	.pointer = mv88fx_pcm_pointer,
+	.mmap = mv88fx_pcm_mmap,
+};
+
+static int mv88fx_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream)
+{
+	struct snd_pcm_substream *substream = pcm->streams[stream].substream;
+	struct snd_dma_buffer *buf = &substream->dma_buffer;
+	size_t size = MV88FX_SND_MAX_PERIODS * MV88FX_SND_MAX_PERIOD_BYTES;
+
+	mv88fx_snd_debug("");
+
+	buf->dev.type = SNDRV_DMA_TYPE_DEV;
+	buf->dev.dev = pcm->card->dev;
+	buf->private_data = NULL;
+	buf->area = dma_alloc_coherent(pcm->card->dev,
+				       size, &buf->addr, GFP_KERNEL);
+	if (!buf->area) {
+		mv88fx_snd_error("unable to allocate");
+		return -ENOMEM;
+	}
+	buf->bytes = size;
+	return 0;
+}
+
+static struct mv88fx_snd_chip *mv88fx_pcm_init(struct snd_pcm *pcm,
+					       struct platform_device *pdev,
+					       struct mv88fx_snd_machine_data
+					       *machine_data)
+{
+	struct mv88fx_snd_chip *chip;
+
+	mv88fx_snd_debug("");
+	chip = mv88fx_pcm_snd_chip =
+	    kzalloc(sizeof(struct mv88fx_snd_chip), GFP_KERNEL);
+	if (!chip)
+		return NULL;
+
+	chip->base = machine_data->base;
+
+	spin_lock_init(&chip->reg_lock);
+	chip->dev = &pdev->dev;
+	chip->port = machine_data->port;
+	chip->pcm = pcm;
+	chip->pdata = machine_data->pdata;
+	chip->ch_stat_valid = 1;
+	chip->burst = 128;
+	chip->loopback = 0;
+	chip->dco_ctrl_offst = 0x800;
+	chip->irq = machine_data->irq;
+
+	if (request_irq(machine_data->irq, mv88fx_pcm_dma_interrupt,
+		0, DRIVER_NAME, (void *)chip)) {
+		mv88fx_snd_error("");
+		goto error;
+	}
+	if (chip->pdata->dram != NULL)
+		if (mv88fx_conf_mbus_windows(chip, chip->pdata->dram)) {
+			mv88fx_snd_error("");
+			goto error;
+
+		}
+
+
+	mv88fx_pcm_init_stream(chip, &chip->stream[SNDRV_PCM_STREAM_PLAYBACK],
+			       SNDRV_PCM_STREAM_PLAYBACK);
+	mv88fx_pcm_init_stream(chip, &chip->stream[SNDRV_PCM_STREAM_CAPTURE],
+			       SNDRV_PCM_STREAM_CAPTURE);
+	chip->pcm_mode = PCM;
+
+	mv88fx_pcm_reset_spdif_status(chip, 1);
+
+	return chip;
+error:
+	free_irq(chip->irq, chip);
+	kfree(chip);
+	mv88fx_pcm_snd_chip = NULL;
+	return NULL;
+}
+
+static int mv88fx_pcm_new(struct snd_card *card, struct snd_soc_dai *dai,
+			  struct snd_pcm *pcm)
+{
+	static u64 mv88fx_pcm_dmamask = DMA_32BIT_MASK;
+	int ret = 0;
+	struct platform_device *pdev = to_platform_device(card->dev);
+	struct mv88fx_snd_machine_data *machine_data = pdev->dev.platform_data;
+	struct mv88fx_snd_chip *chip;
+
+	mv88fx_snd_debug("");
+
+	if (!card->dev->dma_mask)
+		card->dev->dma_mask = &mv88fx_pcm_dmamask;
+	if (!card->dev->coherent_dma_mask)
+		card->dev->coherent_dma_mask = DMA_32BIT_MASK;
+
+	if (dai->playback.channels_min) {
+		ret = mv88fx_pcm_preallocate_dma_buffer(pcm,
+					SNDRV_PCM_STREAM_PLAYBACK);
+		if (ret) {
+			mv88fx_snd_error("");
+			goto out;
+		}
+	}
+
+	if (dai->capture.channels_min) {
+		ret = mv88fx_pcm_preallocate_dma_buffer(pcm,
+					SNDRV_PCM_STREAM_CAPTURE);
+		if (ret) {
+			mv88fx_snd_error("");
+			goto out;
+		}
+	}
+	chip = mv88fx_pcm_init(pcm, pdev, machine_data);
+	if (!chip)
+		return -ENOMEM;
+
+	return 0;
+out:
+	return ret;
+}
+
+static void mv88fx_pcm_free(struct snd_pcm *pcm)
+{
+	struct snd_pcm_substream *substream;
+	struct snd_dma_buffer *buf;
+	int stream;
+
+	mv88fx_snd_debug("");
+
+	for (stream = 0; stream < ARRAY_SIZE(pcm->streams); stream++) {
+		substream = pcm->streams[stream].substream;
+		if (!substream)
+			continue;
+
+		buf = &substream->dma_buffer;
+		if (!buf->area)
+			continue;
+		dma_free_coherent(pcm->card->dev,
+				  buf->bytes, buf->area, buf->addr);
+		buf->area = NULL;
+		buf->addr = 0;
+	}
+	free_irq(mv88fx_pcm_snd_chip->irq, mv88fx_pcm_snd_chip);
+	kfree(mv88fx_pcm_snd_chip);
+	mv88fx_pcm_snd_chip = NULL;
+}
+
+
+static int mv88fx_pcm_suspend(struct snd_soc_dai *cpu_dai)
+{
+	mv88fx_snd_debug("");
+	return 0;
+}
+
+
+
+static int mv88fx_pcm_resume(struct snd_soc_dai *cpu_dai)
+{
+	mv88fx_snd_debug("");
+	struct mv88fx_snd_chip *chip=mv88fx_pcm_snd_chip;
+	if (!chip)
+		return -1;
+
+	mv88fx_snd_writel(chip->base,
+		MV_AUDIO_REGS_OFFSET(chip->port) +0xA0C, chip->dma_window_config.playback_ctrl);
+	mv88fx_snd_writel(chip->base,
+		MV_AUDIO_REGS_OFFSET(chip->port) +0xA08, chip->dma_window_config.playback_base);
+	mv88fx_snd_writel(chip->base,
+		MV_AUDIO_REGS_OFFSET(chip->port) +0xA04, chip->dma_window_config.record_ctrl);
+	mv88fx_snd_writel(chip->base,
+		MV_AUDIO_REGS_OFFSET(chip->port) +0xA00, chip->dma_window_config.record_base);
+
+	return 0;
+}
+
+
+
+struct snd_soc_platform mv88fx_soc_platform = {
+	.name = DRIVER_NAME,
+	.pcm_new = mv88fx_pcm_new,
+	.pcm_free = mv88fx_pcm_free,
+	.suspend  = mv88fx_pcm_suspend,
+	.resume   = mv88fx_pcm_resume,
+	.pcm_ops = &mv88fx_pcm_ops,
+};
+EXPORT_SYMBOL_GPL(mv88fx_soc_platform);
+
+
+static int __init mv88fx_soc_platform_init(void)
+{
+	return snd_soc_register_platform(&mv88fx_soc_platform);
+}
+module_init(mv88fx_soc_platform_init);
+
+static void __exit mv88fx_soc_platform_exit(void)
+{
+	snd_soc_unregister_platform(&mv88fx_soc_platform);
+}
+module_exit(mv88fx_soc_platform_exit);
+
+
+
+
+MODULE_AUTHOR("Yuval Elmaliah <eyuval@marvell.com>");
+MODULE_DESCRIPTION("mv88fx ASoc Platform driver");
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_audio_soc/mv88fx-i2s.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_audio_soc/mv88fx-i2s.h
@@ -0,0 +1,20 @@
+/*
+ *
+ *	Marvell Orion Alsa SOC Sound driver
+ *
+ *	Author: Yuval Elmaliah
+ *	Copyright (C) 2008 Marvell Ltd.
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef _MV88FX_I2S_H
+#define _MV88FX_I2S_H
+
+extern struct snd_soc_dai mv88fx_i2s_dai0, mv88fx_i2s_dai1;
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_audio_soc/mv88fx-rt5630.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_audio_soc/mv88fx-rt5630.c
@@ -0,0 +1,362 @@
+/*
+ *
+ *	Marvell Orion Alsa SOC Sound driver
+ *
+ *	Author: Yuval Elmaliah
+ *	Author: Ethan Ku
+       Author: Brian Hsu
+ *	Copyright (C) 2008 Marvell Ltd.
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/device.h>
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/clk.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/soc.h>
+#include <sound/soc-dapm.h>
+#include <sound/asoundef.h>
+#include <asm/mach-types.h>
+//#include <asm/arch/hardware.h>
+#include "../sound/soc/codecs/rt5630.h"
+#include <linux/mbus.h>
+#include <asm/setup.h>
+#include <asm/mach/arch.h>
+#include <../arch/arm/mach-dove/common.h>
+//#include <asm/plat-orion/i2s-orion.h>
+#include "mv88fx-pcm.h"
+#include "mv88fx-i2s.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "audio/mvAudioRegs.h"
+
+extern int mvmpp_gpio_get_value(unsigned int);
+extern int mvmpp_gpio_set_value(unsigned int,int);
+
+static struct mv88fx_snd_machine_data mv88fx_machine_data;
+static struct rt5630_setup_data rt5630_setup;
+
+
+static int mv88fx_machine_hifi_startup(struct snd_pcm_substream *substream)
+{
+	return 0;
+}
+
+
+static void mv88fx_machine_hifi_shutdown(struct snd_pcm_substream *substream)
+{
+//	printk("%s\n",__func__);
+}
+
+
+static int mv88fx_machine_hifi_hw_params(struct snd_pcm_substream *substream,	
+				   struct snd_pcm_hw_params *params)
+{
+	struct snd_soc_pcm_runtime *rtd = substream->private_data;
+	struct snd_soc_dai *codec_dai = rtd->dai->codec_dai;
+	struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
+	unsigned int clk = 0;
+	int ret = 0;
+	unsigned int format;
+
+//	printk("%s\n",__func__);
+	/* set codec DAI configuration */
+
+	mv88fx_snd_debug("mv88fx_machine_hifi_hw_params");
+
+	switch (params_rate(params)) {
+	case 44100:
+		clk = 11289600;
+		break;
+	case 48000:
+		clk = 12288000;
+		break;
+	case 96000:
+		clk = 24576000;
+		break;
+	}
+
+	format = SND_SOC_DAIFMT_CBS_CFS | SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF;
+	ret = codec_dai->ops->set_fmt(codec_dai, format);
+	if (ret < 0)
+		return ret;
+
+	/* set cpu DAI configuration */
+	ret = cpu_dai->ops->set_fmt(cpu_dai, format);
+	if (ret < 0)
+		return ret;
+
+	/* cpu clock is the mv88fx master clock sent to codec */
+	ret = cpu_dai->ops->set_sysclk(cpu_dai, 0, 0, SND_SOC_CLOCK_IN);
+	if (ret < 0)
+		return ret;
+
+	/* codec system clock is supplied by codec pll1*/
+	ret = codec_dai->ops->set_pll(codec_dai, RT5630_PLL1_FROM_MCLK, clk,clk*2);
+	 if (ret < 0)
+	  	return ret;
+	 
+	/* codec system clock is supplied by mv88fx*/
+	ret = codec_dai->ops->set_sysclk(codec_dai, 0, clk*2, SND_SOC_CLOCK_IN);
+	if (ret < 0)
+		return ret;
+
+	return 0;
+}
+
+static int mv88fx_machine_hifi_trigger(struct snd_pcm_substream *substream,int cmd)
+{
+	switch (cmd) {
+	case SNDRV_PCM_TRIGGER_START:
+		if(substream->stream==SNDRV_PCM_STREAM_PLAYBACK)
+		{
+//			mvmpp_gpio_set_value(MPP_Amp_PwrDn,1);
+		}
+		break;
+	case SNDRV_PCM_TRIGGER_STOP:
+		if(substream->stream==SNDRV_PCM_STREAM_PLAYBACK)
+		{
+//			mvmpp_gpio_set_value(MPP_Amp_PwrDn,0);
+		}
+		break;
+
+	}
+	return 0;
+}
+
+static int mv88fx_rt5630_hifi_init(struct snd_soc_codec *codec)
+{
+	mv88fx_snd_debug("");
+//	mvmpp_gpio_set_value(MPP_Amp_PwrDn,0);
+	return 0;
+}
+
+static int mv88fx_machine_voice_startup(struct snd_pcm_substream *substream)
+{
+	return 0;
+}
+
+
+
+
+static int mv88fx_rt5630_init(struct snd_soc_codec *codec)
+{
+	mv88fx_snd_debug("");
+//	mvmpp_gpio_set_value(MPP_Amp_PwrDn,0);
+	return 0;
+}
+
+/* machine stream operations */
+static struct snd_soc_ops mv88fx_rt5630_machine_ops[] ={
+	{
+		.startup = mv88fx_machine_hifi_startup,
+		.shutdown = mv88fx_machine_hifi_shutdown,
+		.hw_params = mv88fx_machine_hifi_hw_params,
+		.trigger = mv88fx_machine_hifi_trigger,
+	},
+};
+
+static struct snd_soc_dai_link mv88fx_dai = {
+	.name = "RT5630",
+	.stream_name = "RT5630 HIFI",
+	.cpu_dai = &mv88fx_i2s_dai1,
+	.codec_dai = &rt5630_dai, //HiFi
+	.ops = &mv88fx_rt5630_machine_ops,
+};
+
+static int mv88fx_probe(struct platform_device *pdev)
+{
+	return 0;
+}
+
+static int mv88fx_remove(struct platform_device *pdev)
+{
+	return 0;
+}
+
+static struct snd_soc_card dove = {
+	.name = "Dove-I2S-RT5630",
+	.platform = &mv88fx_soc_platform,
+	.probe = mv88fx_probe,
+	.remove = mv88fx_remove,
+
+	/* CPU <--> Codec DAI links */
+	.dai_link = &mv88fx_dai,
+	.num_links = 1,
+};
+
+static struct rt5630_setup_data rt5630_setup = {
+	.i2c_address = 0x1F, //0x1E, depend on HW, bhsu
+	.i2c_bus =0, // to be checked
+};
+
+
+static struct snd_soc_device mv88fx_snd_devdata = {
+	.card = &dove,
+	.codec_dev = &soc_codec_dev_rt5630,
+	.codec_data = &rt5630_setup,
+};
+
+struct platform_device rt5630_codec_dev = {
+	.name           = "rt5630-codec",
+	.id             = -1,
+};
+
+static int mv88fx_initalize_machine_data(struct platform_device *pdev)
+{
+	struct resource *r = NULL;
+	int err = 0;
+
+	mv88fx_snd_debug("mv88fx_initalize_machine_data");
+
+	mv88fx_machine_data.port = pdev->id;
+	mv88fx_machine_data.pdata =
+		(struct orion_i2s_platform_data *)pdev->dev.platform_data;
+
+	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (!r) {
+		err = -ENXIO;
+		goto error;
+	}
+	r = request_mem_region(r->start, SZ_16K, DRIVER_NAME);
+	if (!r) {
+		err = -EBUSY;
+		goto error;
+	}
+	mv88fx_machine_data.res = r;
+	mv88fx_machine_data.base = ioremap(r->start, SZ_16K);
+
+	if (!mv88fx_machine_data.base) {
+		mv88fx_snd_error("ioremap failed");
+		err = -ENOMEM;
+		goto error;
+	}
+	mv88fx_machine_data.base -= MV_AUDIO_REGS_OFFSET(mv88fx_machine_data.port);
+
+	mv88fx_machine_data.irq = platform_get_irq(pdev, 0);
+	if (mv88fx_machine_data.irq == NO_IRQ) {
+		err = -ENXIO;
+		goto error;
+	}
+#if defined(CONFIG_HAVE_CLK)
+	mv88fx_machine_data.clk = clk_get(&pdev->dev, NULL);
+	if (IS_ERR(mv88fx_machine_data.clk))
+		dev_notice(&pdev->dev, "cannot get clkdev\n");
+	else
+		clk_enable(mv88fx_machine_data.clk);
+#endif
+	return 0;
+error:
+	if (mv88fx_machine_data.base) {
+		iounmap(mv88fx_machine_data.base);
+		mv88fx_machine_data.base = NULL;
+	}
+	release_mem_region(mv88fx_machine_data.res->start, SZ_16K);
+	return err;
+}
+
+static int mv88fx_snd_probe(struct platform_device *pdev)
+{
+	int ret = 0;
+
+	mv88fx_snd_debug("mv88fx_snd_probe");
+
+	if (mv88fx_initalize_machine_data(pdev) != 0)
+		goto error;
+
+	mv88fx_machine_data.snd_dev = platform_device_alloc("soc-audio", 0);
+	if (!mv88fx_machine_data.snd_dev) {
+		ret = -ENOMEM;
+		goto error;
+	}
+
+	platform_set_drvdata(mv88fx_machine_data.snd_dev, &mv88fx_snd_devdata);
+	mv88fx_snd_devdata.dev = &mv88fx_machine_data.snd_dev->dev;
+
+	mv88fx_machine_data.snd_dev->dev.platform_data = &mv88fx_machine_data;
+
+	ret = platform_device_add(mv88fx_machine_data.snd_dev);
+
+	if(ret)
+	{
+                platform_device_put(mv88fx_machine_data.snd_dev);
+	}
+
+	ret = platform_device_register(&rt5630_codec_dev);
+	if(ret)
+                platform_device_unregister(&rt5630_codec_dev);
+	return ret;
+error:
+	mv88fx_snd_error("");
+#if defined(CONFIG_HAVE_CLK)
+	if (!IS_ERR(mv88fx_machine_data.clk)) {
+		clk_disable(mv88fx_machine_data.clk);
+		clk_put(mv88fx_machine_data.clk);
+	}
+#endif
+	if (mv88fx_machine_data.snd_dev)
+		platform_device_unregister(mv88fx_machine_data.snd_dev);
+	return ret;
+
+}
+
+static int mv88fx_snd_remove(struct platform_device *dev)
+{
+	mv88fx_snd_debug("");
+#if defined(CONFIG_HAVE_CLK)
+	if (!IS_ERR(mv88fx_machine_data.clk)) {
+		clk_disable(mv88fx_machine_data.clk);
+		clk_put(mv88fx_machine_data.clk);
+	}
+#endif
+	mv88fx_machine_data.snd_dev->dev.platform_data = NULL;
+	platform_device_unregister(mv88fx_machine_data.snd_dev);
+	release_mem_region(mv88fx_machine_data.res->start, SZ_16K);
+        platform_device_unregister(&rt5630_codec_dev);	
+	return 0;
+}
+
+static struct platform_driver mv88fx_snd_driver = {
+	.probe = mv88fx_snd_probe,
+	.remove = mv88fx_snd_remove,
+	.suspend = NULL,
+	.resume = NULL,
+	.driver = {
+		   .name = DRIVER_NAME,
+		   },
+
+};
+
+static int __init mv88fx_snd_init(void)
+{
+	if (!machine_is_dove_rd_avng())
+		return -ENODEV;
+
+	mv88fx_snd_debug("");
+	return platform_driver_register(&mv88fx_snd_driver);
+}
+
+static void __exit mv88fx_snd_exit(void)
+{
+	mv88fx_snd_debug("");
+	platform_driver_unregister(&mv88fx_snd_driver);
+
+}
+
+module_init(mv88fx_snd_init);
+module_exit(mv88fx_snd_exit);
+
+/* Module information */
+MODULE_AUTHOR("Yuval Elmaliah <eyuval@marvell.com>");
+MODULE_AUTHOR("Ethan Ku <eku@marvell.com>");
+MODULE_AUTHOR("Brian Hsu <eku@marvell.com>");
+MODULE_DESCRIPTION("ALSA SoC Dove");
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_audio_soc/mv88fx-i2s.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_audio_soc/mv88fx-i2s.c
@@ -0,0 +1,879 @@
+/*
+ *
+ *	Marvell Orion Alsa SOC Sound driver
+ *
+ *	Author: Yuval Elmaliah
+ *	Copyright (C) 2008 Marvell Ltd.
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/version.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/initval.h>
+#include <linux/platform_device.h>
+#include <sound/soc.h>
+#include <sound/soc-dai.h>
+#include <asm/sizes.h>
+#include <linux/io.h>
+#include <plat/i2s-orion.h>
+#include <asm/dma.h>
+#include <linux/scatterlist.h>
+#include <asm/sizes.h>
+#include <mvTypes.h>
+#include "mv88fx-pcm.h"
+#include "audio/mvAudioRegs.h"
+#include "audio/mvAudio.h"
+#include "mvSysAudioApi.h"
+
+//#ifdef CONFIG_MACH_DOVE_RD_AVNG
+//#include <linux/gpio.h>
+//#include <asm/mach-types.h>
+//#endif
+
+
+struct mv88fx_i2s_info {
+	int		port;
+	void __iomem	*base;	/* base address of the host */
+	u32		irq_mask;
+	u32		playback_cntrl_reg;
+	u32		capture_cntrl_reg;
+};
+
+static struct mv88fx_i2s_info mv88fx_i2s_info;
+
+
+static int mv88fx_i2_hw_init(void)
+{
+	mv88fx_snd_debug("");
+
+	mv88fx_snd_writel(mv88fx_i2s_info.base,
+		MV_AUDIO_INT_CAUSE_REG(mv88fx_i2s_info.port), 0xffffffff);
+	mv88fx_snd_writel(mv88fx_i2s_info.base,
+		MV_AUDIO_INT_MASK_REG(mv88fx_i2s_info.port), 0);
+	mv88fx_snd_writel(mv88fx_i2s_info.base,
+		MV_AUDIO_SPDIF_REC_INT_CAUSE_MASK_REG(mv88fx_i2s_info.port), 0);
+
+//	if (MV_OK != mvAudioInit(mv88fx_i2s_info.port))
+//		return -EIO;
+	mvSysAudioInit(mv88fx_i2s_info.port);
+
+	/* Disable all playback/recording */
+	mv88fx_snd_bitreset(mv88fx_i2s_info.base,
+		MV_AUDIO_PLAYBACK_CTRL_REG(mv88fx_i2s_info.port),
+		(APCR_PLAY_I2S_ENABLE_MASK | APCR_PLAY_SPDIF_ENABLE_MASK));
+
+	mv88fx_snd_bitreset(mv88fx_i2s_info.base,
+		MV_AUDIO_RECORD_CTRL_REG(mv88fx_i2s_info.port),
+		(ARCR_RECORD_SPDIF_EN_MASK | ARCR_RECORD_I2S_EN_MASK));
+
+	if (MV_OK != mvSPDIFRecordTclockSet(mv88fx_i2s_info.port)) {
+		mv88fx_snd_error("mvSPDIFRecordTclockSet failed");
+		return -ENOMEM;
+	}
+	return 0;
+}
+
+
+static int mv88fx_i2s_snd_hw_playback_set(struct mv88fx_snd_chip *chip,
+					  struct snd_pcm_substream *substream)
+{
+	struct snd_pcm_runtime *runtime = substream->runtime;
+	struct mv88fx_snd_stream *audio_stream = runtime->private_data;
+	MV_AUDIO_PLAYBACK_CTRL pcm_play_ctrl;
+	MV_I2S_PLAYBACK_CTRL i2s_play_ctrl;
+	MV_SPDIF_PLAYBACK_CTRL spdif_play_ctrl;
+	MV_AUDIO_FREQ_DATA dco_ctrl;
+
+	mv88fx_snd_debug("chip=%p chip->base=%p", chip, chip->base);
+
+	memset(&pcm_play_ctrl, 0, sizeof(pcm_play_ctrl));
+	memset(&dco_ctrl, 0, sizeof(dco_ctrl));
+	memset(&i2s_play_ctrl, 0, sizeof(i2s_play_ctrl));
+	memset(&spdif_play_ctrl, 0, sizeof(spdif_play_ctrl));
+
+	dco_ctrl.offset = chip->dco_ctrl_offst;
+
+	mv88fx_snd_debug("rate: %u	", runtime->rate);
+	switch (runtime->rate) {
+	case 44100:
+		dco_ctrl.baseFreq = AUDIO_FREQ_44_1KH;
+		break;
+	case 48000:
+		dco_ctrl.baseFreq = AUDIO_FREQ_48KH;
+		break;
+	case 96000:
+		dco_ctrl.baseFreq = AUDIO_FREQ_96KH;
+		break;
+	default:
+		mv88fx_snd_error("Requested rate %d is not supported",
+				 runtime->rate);
+		return -1;
+	}
+
+	pcm_play_ctrl.burst = (chip->burst == 128) ? AUDIO_128BYTE_BURST :
+	    AUDIO_32BYTE_BURST;
+
+	pcm_play_ctrl.loopBack = chip->loopback;
+
+	if (mv88fx_pcm_is_stereo(runtime)) {
+		pcm_play_ctrl.monoMode = AUDIO_PLAY_MONO_OFF;
+	} else {
+
+		switch (audio_stream->mono_mode) {
+		case MONO_LEFT:
+			pcm_play_ctrl.monoMode = AUDIO_PLAY_LEFT_MONO;
+			break;
+		case MONO_RIGHT:
+			pcm_play_ctrl.monoMode = AUDIO_PLAY_RIGHT_MONO;
+			break;
+		case MONO_BOTH:
+		default:
+			pcm_play_ctrl.monoMode = AUDIO_PLAY_BOTH_MONO;
+			break;
+		}
+	}
+
+	if (runtime->format == SNDRV_PCM_FORMAT_S16_LE) {
+		pcm_play_ctrl.sampleSize = SAMPLE_16BIT;
+		i2s_play_ctrl.sampleSize = SAMPLE_16BIT;
+	} else if (runtime->format == SNDRV_PCM_FORMAT_S24_LE) {
+		pcm_play_ctrl.sampleSize = SAMPLE_24BIT;
+		i2s_play_ctrl.sampleSize = SAMPLE_24BIT;
+
+	} else if (runtime->format == SNDRV_PCM_FORMAT_S32_LE) {
+		pcm_play_ctrl.sampleSize = SAMPLE_32BIT;
+		i2s_play_ctrl.sampleSize = SAMPLE_32BIT;
+	} else {
+		mv88fx_snd_error("Requested format %d is not supported",
+				 runtime->format);
+		return -1;
+	}
+
+	/* buffer and period sizes in frame */
+	pcm_play_ctrl.bufferPhyBase = runtime->dma_addr;
+	pcm_play_ctrl.bufferSize =
+	    frames_to_bytes(runtime, runtime->buffer_size);
+	pcm_play_ctrl.intByteCount =
+	    frames_to_bytes(runtime, runtime->period_size);
+
+	/* I2S playback streem stuff */
+	/*i2s_play_ctrl.sampleSize = pcm_play_ctrl.sampleSize; */
+	i2s_play_ctrl.justification = I2S_JUSTIFIED;
+	i2s_play_ctrl.sendLastFrame = 0;
+
+	spdif_play_ctrl.nonPcm = MV_FALSE;
+
+	spdif_play_ctrl.validity = chip->ch_stat_valid;
+
+	if (audio_stream->stat_mem) {
+		spdif_play_ctrl.userBitsFromMemory = MV_TRUE;
+		spdif_play_ctrl.validityFromMemory = MV_TRUE;
+		spdif_play_ctrl.blockStartInternally = MV_FALSE;
+	} else {
+		spdif_play_ctrl.userBitsFromMemory = MV_FALSE;
+		spdif_play_ctrl.validityFromMemory = MV_FALSE;
+		spdif_play_ctrl.blockStartInternally = MV_TRUE;
+	}
+
+	mv88fx_snd_debug("");
+	/* If this is non-PCM sound, mute I2S channel */
+	spin_lock_irq(&chip->reg_lock);
+
+	mv88fx_snd_debug("chip=%p chip->base=%p port=%d", chip, chip->base,
+			 chip->port);
+
+	if (!(mv88fx_snd_readl(chip->base,
+		MV_AUDIO_PLAYBACK_CTRL_REG(chip->port)) &
+		(APCR_PLAY_I2S_ENABLE_MASK | APCR_PLAY_SPDIF_ENABLE_MASK))) {
+
+		mv88fx_snd_debug("");
+
+		if (MV_OK != mvAudioDCOCtrlSet(chip->port, &dco_ctrl)) {
+			mv88fx_snd_error
+			    ("Failed to initialize DCO clock control.");
+			return -1;
+			mv88fx_snd_debug("");
+
+		}
+	}
+
+	mv88fx_snd_debug("");
+
+	if (audio_stream->clock_src == DCO_CLOCK)
+		while ((mv88fx_snd_readl(chip->base,
+			 MV_AUDIO_SPCR_DCO_STATUS_REG(chip->port)) &
+			ASDSR_DCO_LOCK_MASK) == 0)
+			;
+	else if (audio_stream->clock_src == SPCR_CLOCK)
+		while ((mv88fx_snd_readl(chip->base,
+			 MV_AUDIO_SPCR_DCO_STATUS_REG(chip->port)) &
+			ASDSR_SPCR_LOCK_MASK) == 0)
+			;
+
+	mv88fx_snd_debug("");
+
+	if (MV_OK != mvAudioPlaybackControlSet(chip->port, &pcm_play_ctrl)) {
+		mv88fx_snd_error("Failed to initialize PCM playback control.");
+		return -1;
+	}
+	mv88fx_snd_debug("");
+
+	if (MV_OK != mvI2SPlaybackCtrlSet(chip->port, &i2s_play_ctrl)) {
+		mv88fx_snd_error("Failed to initialize I2S playback control.");
+		return -1;
+	}
+	mv88fx_snd_debug("");
+
+	mvSPDIFPlaybackCtrlSet(chip->port, &spdif_play_ctrl);
+
+	mv88fx_snd_debug("");
+
+	spin_unlock_irq(&chip->reg_lock);
+
+	return 0;
+}
+
+static int mv88fx_i2s_snd_hw_capture_set(struct mv88fx_snd_chip *chip,
+					 struct snd_pcm_substream *substream)
+{
+	struct snd_pcm_runtime *runtime = substream->runtime;
+	struct mv88fx_snd_stream *audio_stream = runtime->private_data;
+	MV_AUDIO_RECORD_CTRL pcm_rec_ctrl;
+	MV_I2S_RECORD_CTRL i2s_rec_ctrl;
+	MV_AUDIO_FREQ_DATA dco_ctrl;
+//#ifdef CONFIG_MACH_DOVE_RD_AVNG
+//	int phoneInDetected;
+//#endif
+
+	mv88fx_snd_debug("chip=%p chip->base=%p", chip, chip->base);
+
+	dco_ctrl.offset = chip->dco_ctrl_offst;
+
+	switch (runtime->rate) {
+	case 44100:
+		dco_ctrl.baseFreq = AUDIO_FREQ_44_1KH;
+		break;
+	case 48000:
+		dco_ctrl.baseFreq = AUDIO_FREQ_48KH;
+		break;
+	case 96000:
+		dco_ctrl.baseFreq = AUDIO_FREQ_96KH;
+		break;
+	default:
+		mv88fx_snd_debug("ERROR");
+		mv88fx_snd_error("Requested rate %d is not supported",
+				 runtime->rate);
+		return -1;
+	}
+
+	pcm_rec_ctrl.burst = (chip->burst == 128) ? AUDIO_128BYTE_BURST :
+	    AUDIO_32BYTE_BURST;
+
+	if (runtime->format == SNDRV_PCM_FORMAT_S16_LE) {
+		pcm_rec_ctrl.sampleSize = SAMPLE_16BIT;
+	} else if (runtime->format == SNDRV_PCM_FORMAT_S24_LE) {
+		pcm_rec_ctrl.sampleSize = SAMPLE_24BIT;
+	} else if (runtime->format == SNDRV_PCM_FORMAT_S32_LE) {
+		pcm_rec_ctrl.sampleSize = SAMPLE_32BIT;
+	} else {
+		mv88fx_snd_error("Requested format %d is not supported",
+				 runtime->format);
+		return -1;
+	}
+
+	pcm_rec_ctrl.mono =
+	    (mv88fx_pcm_is_stereo(runtime)) ? MV_FALSE : MV_TRUE;
+
+	if (pcm_rec_ctrl.mono) {
+		switch (audio_stream->mono_mode) {
+		case MONO_LEFT:
+			pcm_rec_ctrl.monoChannel = AUDIO_REC_LEFT_MONO;
+			break;
+		default:
+		case MONO_RIGHT:
+			pcm_rec_ctrl.monoChannel = AUDIO_REC_RIGHT_MONO;
+			break;
+		}
+
+	} else
+		pcm_rec_ctrl.monoChannel = AUDIO_REC_LEFT_MONO;
+
+	pcm_rec_ctrl.bufferPhyBase = runtime->dma_addr;
+	pcm_rec_ctrl.bufferSize =
+	    frames_to_bytes(runtime, runtime->buffer_size);
+	pcm_rec_ctrl.intByteCount =
+	    frames_to_bytes(runtime, runtime->period_size);
+
+	/* I2S record streem stuff */
+	i2s_rec_ctrl.sample = pcm_rec_ctrl.sampleSize;
+	i2s_rec_ctrl.justf = I2S_JUSTIFIED;
+
+	spin_lock_irq(&chip->reg_lock);
+
+	/* set clock only if record is not enabled */
+	if (!(mv88fx_snd_readl(chip->base,
+		MV_AUDIO_RECORD_CTRL_REG(chip->port)) &
+		(ARCR_RECORD_SPDIF_EN_MASK | ARCR_RECORD_I2S_EN_MASK))) {
+
+		if (MV_OK != mvAudioDCOCtrlSet(chip->port, &dco_ctrl)) {
+			mv88fx_snd_debug("ERROR");
+			mv88fx_snd_error
+			    ("Failed to initialize DCO clock control.");
+			return -1;
+		}
+	}
+	mv88fx_snd_debug("");
+	if (MV_OK != mvAudioRecordControlSet(chip->port, &pcm_rec_ctrl)) {
+		mv88fx_snd_error("Failed to initialize PCM record control.");
+		return -1;
+	}
+
+	if (MV_OK != mvI2SRecordCntrlSet(chip->port, &i2s_rec_ctrl)) {
+		mv88fx_snd_error("Failed to initialize I2S record control.");
+		return -1;
+	}
+	mv88fx_snd_debug("");
+
+//#ifdef CONFIG_MACH_DOVE_RD_AVNG
+//	if (machine_is_dove_rd_avng()) {
+//		phoneInDetected = gpio_get_value(53);
+//		if (phoneInDetected < 0)
+//			mv88fx_snd_error("Failed to detect phone-in.");
+//		else {
+//			int input_type;
+//			mv88fx_snd_error("detect phone-in.");
+//			if (!phoneInDetected)
+//				input_type = 2;	/* external MIC */
+//			else
+//				input_type = 1;	/* internal MIC */
+//		}
+//	}
+//#endif
+	mv88fx_snd_debug("");
+
+	spin_unlock_irq(&chip->reg_lock);
+
+	mv88fx_snd_debug("");
+
+	return 0;
+
+}
+
+static int mv88fx_i2s_capture_trigger(struct snd_pcm_substream *substream,
+				      int cmd)
+{
+	struct snd_pcm_runtime *runtime = substream->runtime;
+	struct mv88fx_snd_stream *audio_stream = runtime->private_data;
+	struct mv88fx_snd_chip *chip = mv88fx_pcm_get_chip();
+	int result = 0;
+
+	mv88fx_snd_debug("substream=%p cmd=%d audio_stream=%p", substream, cmd,
+			 audio_stream);
+
+	spin_lock(&chip->reg_lock);
+	switch (cmd) {
+	case SNDRV_PCM_TRIGGER_START:
+		/* FIXME: should check if busy before */
+		mv88fx_snd_debug("");
+		/* make sure the dma in pause state */
+		mv88fx_snd_bitset(chip->base,
+			MV_AUDIO_RECORD_CTRL_REG(chip->port),
+			ARCR_RECORD_PAUSE_MASK);
+
+		/* enable interrupt */
+		mv88fx_snd_bitset(chip->base, MV_AUDIO_INT_MASK_REG(chip->port),
+				  AICR_RECORD_BYTES_INT);
+
+		/* enable dma */
+		mv88fx_snd_debug("dig_mode=%x", audio_stream->dig_mode);
+		if (audio_stream->dig_mode & I2S) {
+			mv88fx_snd_debug("enable dma");
+			mv88fx_snd_bitset(chip->base,
+					  MV_AUDIO_RECORD_CTRL_REG(chip->port),
+					  ARCR_RECORD_I2S_EN_MASK);
+		}
+
+		if (audio_stream->dig_mode & SPDIF) {
+			mv88fx_snd_debug("enable spdif dma");
+			mv88fx_snd_bitset(chip->base,
+					  MV_AUDIO_RECORD_CTRL_REG(chip->port),
+					  ARCR_RECORD_SPDIF_EN_MASK);
+		}
+
+		/* start dma */
+		mv88fx_snd_bitreset(chip->base,
+			MV_AUDIO_RECORD_CTRL_REG(chip->port),
+			ARCR_RECORD_PAUSE_MASK);
+
+		break;
+	case SNDRV_PCM_TRIGGER_STOP:
+
+		/* make sure the dma in pause state */
+		mv88fx_snd_bitset(chip->base,
+			MV_AUDIO_RECORD_CTRL_REG(chip->port),
+			ARCR_RECORD_PAUSE_MASK);
+
+		/* disable interrupt */
+		mv88fx_snd_bitreset(chip->base,
+			MV_AUDIO_INT_MASK_REG(chip->port),
+			AICR_RECORD_BYTES_INT);
+
+		/* always stop both I2S and SPDIF */
+		mv88fx_snd_bitreset(chip->base,
+			MV_AUDIO_RECORD_CTRL_REG(chip->port),
+			(ARCR_RECORD_I2S_EN_MASK | ARCR_RECORD_SPDIF_EN_MASK));
+
+		/* FIXME: should check if busy after */
+
+		break;
+	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
+	case SNDRV_PCM_TRIGGER_SUSPEND:
+		mv88fx_snd_bitset(chip->base,
+			MV_AUDIO_RECORD_CTRL_REG(chip->port),
+			ARCR_RECORD_PAUSE_MASK);
+		break;
+	case SNDRV_PCM_TRIGGER_RESUME:
+	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
+		mv88fx_snd_bitreset(chip->base,
+			MV_AUDIO_RECORD_CTRL_REG(chip->port),
+			ARCR_RECORD_PAUSE_MASK);
+
+		break;
+	default:
+		result = -EINVAL;
+		break;
+	}
+	spin_unlock(&chip->reg_lock);
+	mv88fx_snd_debug("result=%d", result);
+	return result;
+}
+
+static int mv88fx_i2s_playback_trigger(struct snd_pcm_substream *substream,
+				       int cmd)
+{
+	struct snd_pcm_runtime *runtime = substream->runtime;
+	struct mv88fx_snd_stream *audio_stream = runtime->private_data;
+	struct mv88fx_snd_chip *chip = mv88fx_pcm_get_chip();
+	int result = 0;
+
+	mv88fx_snd_debug("substream=%p cmd=%d audio_stream=%p", substream, cmd,
+			 audio_stream);
+
+	spin_lock(&chip->reg_lock);
+	switch (cmd) {
+	case SNDRV_PCM_TRIGGER_START:
+
+		mv88fx_snd_debug("");
+		/* enable interrupt */
+		mv88fx_snd_bitset(chip->base, MV_AUDIO_INT_MASK_REG(chip->port),
+				  AICR_PLAY_BYTES_INT);
+
+		/* make sure the dma in pause state */
+		mv88fx_snd_bitset(chip->base,
+			MV_AUDIO_PLAYBACK_CTRL_REG(chip->port),
+			APCR_PLAY_PAUSE_MASK);
+
+		/* enable dma */
+		if ((audio_stream->dig_mode & I2S) && (chip->pcm_mode == PCM))
+			mv88fx_snd_bitset(chip->base,
+				MV_AUDIO_PLAYBACK_CTRL_REG(chip->port),
+				APCR_PLAY_I2S_ENABLE_MASK);
+
+		if (audio_stream->dig_mode & SPDIF)
+			mv88fx_snd_bitset(chip->base,
+				MV_AUDIO_PLAYBACK_CTRL_REG(chip->port),
+				APCR_PLAY_SPDIF_ENABLE_MASK);
+
+		/* start dma */
+		mv88fx_snd_bitreset(chip->base,
+				    MV_AUDIO_PLAYBACK_CTRL_REG(chip->port),
+				    APCR_PLAY_PAUSE_MASK);
+
+		break;
+	case SNDRV_PCM_TRIGGER_STOP:
+
+		mv88fx_snd_debug("");
+
+		/* disable interrupt */
+		mv88fx_snd_bitreset(chip->base,
+			MV_AUDIO_INT_MASK_REG(chip->port),
+			AICR_PLAY_BYTES_INT);
+
+		/* make sure the dma in pause state */
+		mv88fx_snd_bitset(chip->base,
+			MV_AUDIO_PLAYBACK_CTRL_REG(chip->port),
+			APCR_PLAY_PAUSE_MASK);
+
+		/* always stop both I2S and SPDIF */
+		mv88fx_snd_bitreset(chip->base,
+				    MV_AUDIO_PLAYBACK_CTRL_REG(chip->port),
+				    (APCR_PLAY_I2S_ENABLE_MASK |
+				     APCR_PLAY_SPDIF_ENABLE_MASK));
+
+		/* check if busy twice */
+		while (mv88fx_snd_readl(chip->base,
+			MV_AUDIO_PLAYBACK_CTRL_REG(chip->port)) &
+		       APCR_PLAY_BUSY_MASK)
+			;
+
+		while (mv88fx_snd_readl(chip->base,
+			MV_AUDIO_PLAYBACK_CTRL_REG(chip->port)) &
+		       APCR_PLAY_BUSY_MASK)
+			;
+
+		break;
+	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
+	case SNDRV_PCM_TRIGGER_SUSPEND:
+		mv88fx_snd_debug("");
+
+		mv88fx_snd_bitset(chip->base,
+			MV_AUDIO_PLAYBACK_CTRL_REG(chip->port),
+			APCR_PLAY_PAUSE_MASK);
+		break;
+	case SNDRV_PCM_TRIGGER_RESUME:
+	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
+		mv88fx_snd_debug("");
+
+		mv88fx_snd_bitreset(chip->base,
+				    MV_AUDIO_PLAYBACK_CTRL_REG(chip->port),
+				    APCR_PLAY_PAUSE_MASK);
+
+		break;
+	default:
+		result = -EINVAL;
+		break;
+	}
+	spin_unlock(&chip->reg_lock);
+	mv88fx_snd_debug("result=%d", result);
+	return result;
+}
+
+static int mv88fx_i2s_startup(struct snd_pcm_substream *stream,
+				struct snd_soc_dai *dai)
+{
+	mv88fx_snd_debug("");
+
+	return 0;
+}
+
+static void mv88fx_i2s_shutdown(struct snd_pcm_substream *stream,
+				struct snd_soc_dai *dai)
+{
+	mv88fx_snd_debug("");
+}
+
+static int mv88fx_i2s_hw_params(struct snd_pcm_substream *stream,
+				struct snd_pcm_hw_params *hw_params,
+				struct snd_soc_dai *dai)
+{
+	mv88fx_snd_debug("");
+
+	return 0;
+}
+
+static int mv88fx_i2s_hw_free(struct snd_pcm_substream *stream,
+				struct snd_soc_dai *dai)
+{
+	mv88fx_snd_debug("");
+
+	return 0;
+}
+
+static int mv88fx_i2s_prepare(struct snd_pcm_substream *substream,
+				struct snd_soc_dai *dai)
+{
+	struct mv88fx_snd_chip *chip = mv88fx_pcm_get_chip();
+	mv88fx_snd_debug("");
+
+	if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
+		return mv88fx_i2s_snd_hw_capture_set(chip, substream);
+	else
+		return mv88fx_i2s_snd_hw_playback_set(chip, substream);
+
+}
+
+static int mv88fx_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
+				struct snd_soc_dai *dai)
+{
+	if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
+		return mv88fx_i2s_capture_trigger(substream, cmd);
+	else
+		return mv88fx_i2s_playback_trigger(substream, cmd);
+}
+
+static int mv88fx_i2s_set_sysclk(struct snd_soc_dai *codec_dai,
+				 int clk_id, unsigned int freq, int dir)
+{
+	mv88fx_snd_debug("");
+
+	return 0;
+}
+
+static int mv88fx_i2s_set_fmt(struct snd_soc_dai *codec_dai,
+			      unsigned int fmt)
+{
+	mv88fx_snd_debug("");
+
+	return 0;
+}
+
+static int mv88fx_i2s_dai_probe(struct platform_device *pdev,
+				struct snd_soc_dai *dai)
+{
+	struct mv88fx_snd_machine_data *machine_data = pdev->dev.platform_data;
+
+	mv88fx_snd_debug(">%s machine_data=0x%p", __FUNCTION__, machine_data);
+
+	mv88fx_i2s_info.base = machine_data->base;
+	mv88fx_i2s_info.port = machine_data->port;
+
+
+	mv88fx_i2_hw_init();
+
+
+	return 0;
+}
+
+static void mv88fx_i2s_dai_remove(struct platform_device *pdev,
+				struct snd_soc_dai *dai)
+{
+	mv88fx_snd_debug("");
+
+}
+
+
+static int mv88fx_i2s_suspend(struct snd_soc_dai *cpu_dai)
+{
+	struct mv88fx_snd_chip *chip = mv88fx_pcm_get_chip();
+
+	mv88fx_snd_debug("");
+
+	if (!cpu_dai->active)
+		return 0;
+
+
+	spin_lock(&chip->reg_lock);
+
+	/* save registers */
+	mv88fx_i2s_info.irq_mask = mv88fx_snd_readl(chip->base,
+			MV_AUDIO_INT_MASK_REG(chip->port));
+	mv88fx_i2s_info.capture_cntrl_reg = mv88fx_snd_readl(chip->base,
+			MV_AUDIO_RECORD_CTRL_REG(chip->port));
+	mv88fx_i2s_info.playback_cntrl_reg = mv88fx_snd_readl(chip->base,
+			MV_AUDIO_PLAYBACK_CTRL_REG(chip->port));
+
+	/* clear all interrupts */
+	mv88fx_snd_writel(chip->base,
+		MV_AUDIO_INT_CAUSE_REG(chip->port), 0xffffffff);
+	/* disable all interrupts */
+	mv88fx_snd_writel(chip->base,
+		MV_AUDIO_INT_MASK_REG(chip->port), 0);
+	/* pause dma */
+	mv88fx_snd_bitset(chip->base,
+		MV_AUDIO_RECORD_CTRL_REG(chip->port), ARCR_RECORD_PAUSE_MASK);
+	mv88fx_snd_bitset(chip->base,
+		MV_AUDIO_PLAYBACK_CTRL_REG(chip->port), APCR_PLAY_PAUSE_MASK);
+
+
+	spin_unlock(&chip->reg_lock);
+
+	return 0;
+}
+
+
+
+static int mv88fx_i2s_resume(struct snd_soc_dai *cpu_dai)
+{
+	struct mv88fx_snd_chip *chip = mv88fx_pcm_get_chip();
+
+	mv88fx_snd_debug("");
+
+	if (!cpu_dai->active)
+		return 0;
+
+	mv88fx_i2_hw_init();
+
+	spin_lock(&chip->reg_lock);
+
+	mv88fx_snd_writel(chip->base,
+		MV_AUDIO_INT_CAUSE_REG(chip->port), 0xffffffff);
+	/* restore registers */
+	mv88fx_snd_writel(chip->base,
+		MV_AUDIO_RECORD_CTRL_REG(chip->port),
+		mv88fx_i2s_info.capture_cntrl_reg);
+	mv88fx_snd_writel(chip->base,
+		MV_AUDIO_PLAYBACK_CTRL_REG(chip->port),
+		mv88fx_i2s_info.playback_cntrl_reg);
+	/* enable interrupts */
+	mv88fx_snd_writel(chip->base,
+		MV_AUDIO_INT_MASK_REG(chip->port),
+		mv88fx_i2s_info.irq_mask);
+
+	spin_unlock(&chip->reg_lock);
+
+	return 0;
+}
+
+static struct snd_soc_dai_ops mv88fx_i2s_dai_ops = {
+	.startup = mv88fx_i2s_startup,
+	.shutdown = mv88fx_i2s_shutdown,
+	.hw_params = mv88fx_i2s_hw_params,
+	.hw_free = mv88fx_i2s_hw_free,
+	.prepare = mv88fx_i2s_prepare,
+	.trigger = mv88fx_i2s_trigger,
+	.hw_params = mv88fx_i2s_hw_params,
+	.set_sysclk = mv88fx_i2s_set_sysclk,
+	.set_fmt = mv88fx_i2s_set_fmt,
+};
+
+struct snd_soc_dai mv88fx_i2s_dai0 = {
+	.name = "mv88fx-i2s0",
+//	.id = 0,
+	.probe = mv88fx_i2s_dai_probe,
+	.remove = mv88fx_i2s_dai_remove,
+	.suspend = mv88fx_i2s_suspend,
+	.resume = mv88fx_i2s_resume,
+	.ops = &mv88fx_i2s_dai_ops,
+	.capture = {
+		    .stream_name = "i2s-capture",
+		    .formats = (SNDRV_PCM_FMTBIT_S16_LE |
+				SNDRV_PCM_FMTBIT_S24_LE |
+				SNDRV_PCM_FMTBIT_S32_LE),
+		    .rate_min = 44100,
+		    .rate_max = 96000,
+		    .rates = (SNDRV_PCM_RATE_44100 |
+			      SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000),
+		    .channels_min = 1,
+		    .channels_max = 2,
+		    },
+	.playback = {
+		     .stream_name = "i2s-playback",
+		     .formats = (SNDRV_PCM_FMTBIT_S16_LE |
+				 SNDRV_PCM_FMTBIT_S24_LE |
+				 SNDRV_PCM_FMTBIT_S32_LE),
+		     .rate_min = 44100,
+		     .rate_max = 96000,
+		     .rates = (SNDRV_PCM_RATE_44100 |
+			       SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000),
+		     .channels_min = 1,
+		     .channels_max = 2,
+		     },
+
+	.runtime = NULL,
+	.active = 0,
+	.dma_data = NULL,
+	.private_data = NULL,
+};
+EXPORT_SYMBOL_GPL(mv88fx_i2s_dai0);
+
+struct snd_soc_dai mv88fx_i2s_dai1 = {
+	.name = "mv88fx-i2s1",
+//	.id = 0,
+	.probe = mv88fx_i2s_dai_probe,
+	.remove = mv88fx_i2s_dai_remove,
+	.suspend = mv88fx_i2s_suspend,
+	.resume = mv88fx_i2s_resume,
+	.ops = &mv88fx_i2s_dai_ops,
+	.capture = {
+		    .stream_name = "i2s-capture",
+		    .formats = (SNDRV_PCM_FMTBIT_S16_LE |
+				SNDRV_PCM_FMTBIT_S24_LE |
+				SNDRV_PCM_FMTBIT_S32_LE),
+		    .rate_min = 44100,
+		    .rate_max = 96000,
+		    .rates = (SNDRV_PCM_RATE_44100 |
+			      SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000),
+		    .channels_min = 1,
+		    .channels_max = 2,
+		    },
+	.playback = {
+		     .stream_name = "i2s-playback",
+		     .formats = (SNDRV_PCM_FMTBIT_S16_LE |
+				 SNDRV_PCM_FMTBIT_S24_LE |
+				 SNDRV_PCM_FMTBIT_S32_LE),
+		     .rate_min = 44100,
+		     .rate_max = 96000,
+		     .rates = (SNDRV_PCM_RATE_44100 |
+			       SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000),
+		     .channels_min = 1,
+		     .channels_max = 2,
+		     },
+
+	.runtime = NULL,
+	.active = 0,
+	.dma_data = NULL,
+	.private_data = NULL,
+};
+EXPORT_SYMBOL_GPL(mv88fx_i2s_dai1);
+
+
+
+
+
+static int mv88fx_i2s_probe(struct platform_device *pdev)
+{
+	int ret;
+	struct snd_soc_dai *soc_dai;
+
+	if (pdev->id)
+		soc_dai = &mv88fx_i2s_dai1;
+	else
+		soc_dai = &mv88fx_i2s_dai0;
+
+	mv88fx_snd_debug(">%s\n",__FUNCTION__);
+	soc_dai->id = pdev->id;
+	soc_dai->dev = &pdev->dev;
+	mv88fx_snd_debug("pdev->dev = 0x%p\n pdev->id=%d",&pdev->dev, pdev->id);
+	ret = snd_soc_register_dai(soc_dai);
+	mv88fx_snd_debug("ret=%d",ret);
+	return ret;
+}
+
+static int __devexit mv88fx_i2s_remove(struct platform_device *pdev)
+{
+	if (pdev->id)
+		snd_soc_unregister_dai(&mv88fx_i2s_dai1);
+	else
+		snd_soc_unregister_dai(&mv88fx_i2s_dai0);
+	return 0;
+}
+
+static struct platform_driver mv88fx_i2s_driver = {
+	.probe = mv88fx_i2s_probe,
+	.remove = __devexit_p(mv88fx_i2s_remove),
+	.driver = {
+		.name = "mv88fx-i2s",
+		.owner = THIS_MODULE,
+	},
+};
+
+static int __init mv88fx_i2s_init(void)
+{
+	mv88fx_snd_debug("");
+	return platform_driver_register(&mv88fx_i2s_driver);
+}
+
+static void __exit mv88fx_i2s_exit(void)
+{
+	mv88fx_snd_debug("");
+	platform_driver_unregister(&mv88fx_i2s_driver);
+}
+
+module_init(mv88fx_i2s_init);
+module_exit(mv88fx_i2s_exit);
+
+
+/* Module information */
+MODULE_AUTHOR("Yuval Elmaliah <eyuval@marvell.com>");
+MODULE_DESCRIPTION("mv88fx I2S SoC Interface");
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_audio_soc/mv88fx-rt5623.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_audio_soc/mv88fx-rt5623.c
@@ -0,0 +1,359 @@
+/*
+ *
+ *	Marvell Orion Alsa SOC Sound driver
+ *
+ *	Author: Yuval Elmaliah
+ *	Author: Ethan Ku
+ *	Copyright (C) 2008 Marvell Ltd.
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/device.h>
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/clk.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/soc.h>
+#include <sound/soc-dapm.h>
+#include <sound/asoundef.h>
+#include <asm/mach-types.h>
+//#include <asm/arch/hardware.h>
+#include "../sound/soc/codecs/rt5623.h"
+#include <linux/mbus.h>
+#include <asm/setup.h>
+#include <asm/mach/arch.h>
+#include <../arch/arm/mach-dove/common.h>
+//#include <asm/plat-orion/i2s-orion.h>
+#include "mv88fx-pcm.h"
+#include "mv88fx-i2s.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "audio/mvAudioRegs.h"
+
+extern int mvmpp_gpio_get_value(unsigned int);
+extern int mvmpp_gpio_set_value(unsigned int,int);
+
+static struct mv88fx_snd_machine_data mv88fx_machine_data;
+static struct rt5623_setup_data rt5623_setup;
+
+
+static int mv88fx_machine_startup(struct snd_pcm_substream *substream)
+{
+//	struct snd_soc_pcm_runtime *rtd = substream->private_data;
+//	struct snd_soc_codec_dai *codec_dai = rtd->dai->codec_dai;
+//	struct snd_soc_cpu_dai *cpu_dai = rtd->dai->cpu_dai;
+//	int ret;
+#if 0
+	int phoneInDetected;
+
+//	printk("%s\n",__func__);
+
+	/* check the jack status at stream startup */
+	phoneInDetected = mvmpp_gpio_get_value(MPP_PhLine_IN);
+
+	if (phoneInDetected < 0) {
+		snd_printk("Failed to detect phone-in.\n");
+	} else {
+
+		if (! phoneInDetected) {
+			rt5623_setup.mic2_input = 0;
+		} else {
+			rt5623_setup.mic2_input = 1;
+		}
+	}
+#endif
+	return 0;
+
+}
+
+
+static void mv88fx_machine_shutdown(struct snd_pcm_substream *substream)
+{
+//	printk("%s\n",__func__);
+}
+
+
+
+static int mv88fx_machine_hw_params(struct snd_pcm_substream *substream,	
+				   struct snd_pcm_hw_params *params)
+{
+	struct snd_soc_pcm_runtime *rtd = substream->private_data;
+	struct snd_soc_dai *codec_dai = rtd->dai->codec_dai;
+	struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
+	unsigned int clk = 0;
+	int ret = 0;
+	unsigned int format;
+
+//	printk("%s\n",__func__);
+	/* set codec DAI configuration */
+
+
+	switch (params_rate(params)) {
+	case 44100:
+		clk = 11289600;
+		break;
+	case 48000:
+		clk = 12288000;
+		break;
+	case 96000:
+		clk = 24576000;
+		break;
+	}
+
+	format = SND_SOC_DAIFMT_CBS_CFS | SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF;
+	ret = codec_dai->ops->set_fmt(codec_dai, format);
+	if (ret < 0)
+		return ret;
+
+	/* set cpu DAI configuration */
+	ret = cpu_dai->ops->set_fmt(cpu_dai, format);
+	if (ret < 0)
+		return ret;
+
+	/* cpu clock is the mv88fx master clock sent to codec */
+	ret = cpu_dai->ops->set_sysclk(cpu_dai, 0, 0, SND_SOC_CLOCK_IN);
+	if (ret < 0)
+		return ret;
+
+	/* codec system clock is supplied by mv88fx*/
+	ret = codec_dai->ops->set_sysclk(codec_dai, 0, clk, SND_SOC_CLOCK_IN);
+	if (ret < 0)
+		return ret;
+
+	return 0;
+}
+
+static int mv88fx_machine_trigger(struct snd_pcm_substream *substream,int cmd)
+{
+	switch (cmd) {
+	case SNDRV_PCM_TRIGGER_START:
+		if(substream->stream==SNDRV_PCM_STREAM_PLAYBACK)
+		{
+//			mvmpp_gpio_set_value(MPP_Amp_PwrDn,1);
+		}
+		break;
+	case SNDRV_PCM_TRIGGER_STOP:
+		if(substream->stream==SNDRV_PCM_STREAM_PLAYBACK)
+		{
+//			mvmpp_gpio_set_value(MPP_Amp_PwrDn,0);
+		}
+		break;
+
+	}
+	return 0;
+}
+
+static int mv88fx_rt5623_init(struct snd_soc_codec *codec)
+{
+	mv88fx_snd_debug("");
+//	mvmpp_gpio_set_value(MPP_Amp_PwrDn,0);
+	return 0;
+}
+
+
+/* machine stream operations */
+static struct snd_soc_ops mv88fx_rt5623_machine_ops =
+{
+	.startup = mv88fx_machine_startup,
+	.shutdown = mv88fx_machine_shutdown,
+	.hw_params = mv88fx_machine_hw_params,
+	.trigger = mv88fx_machine_trigger,
+
+};
+
+
+
+static struct snd_soc_dai_link mv88fx_dai = {
+	.name = "RT5623",
+	.stream_name = "RT5623",
+	.cpu_dai = &mv88fx_i2s_dai1,
+	.codec_dai = &rt5623_dai,
+	.ops = &mv88fx_rt5623_machine_ops,
+	.init = mv88fx_rt5623_init,
+};
+
+static int mv88fx_probe(struct platform_device *pdev)
+{
+	return 0;
+}
+
+static int mv88fx_remove(struct platform_device *pdev)
+{
+	return 0;
+}
+
+static struct snd_soc_card dove = {
+	.name = "Dove",
+	.platform = &mv88fx_soc_platform,
+	.probe = mv88fx_probe,
+	.remove = mv88fx_remove,
+
+	/* CPU <--> Codec DAI links */
+	.dai_link = &mv88fx_dai,
+	.num_links = 1,
+};
+
+static struct rt5623_setup_data rt5623_setup = {
+	.i2c_address = 0x1a,
+	.mic2_input = 1,
+};
+
+
+static struct snd_soc_device mv88fx_snd_devdata = {
+	.card = &dove,
+	.codec_dev = &soc_codec_dev_rt5623,
+	.codec_data = &rt5623_setup,
+};
+
+static int mv88fx_initalize_machine_data(struct platform_device *pdev)
+{
+	struct resource *r = NULL;
+	int err = 0;
+
+	mv88fx_snd_debug("");
+
+	mv88fx_machine_data.port = pdev->id;
+	mv88fx_machine_data.pdata =
+		(struct orion_i2s_platform_data *)pdev->dev.platform_data;
+
+	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (!r) {
+		err = -ENXIO;
+		goto error;
+	}
+	r = request_mem_region(r->start, SZ_16K, DRIVER_NAME);
+	if (!r) {
+		err = -EBUSY;
+		goto error;
+	}
+	mv88fx_machine_data.res = r;
+	mv88fx_machine_data.base = ioremap(r->start, SZ_16K);
+
+	if (!mv88fx_machine_data.base) {
+		mv88fx_snd_error("ioremap failed");
+		err = -ENOMEM;
+		goto error;
+	}
+	mv88fx_machine_data.base -= MV_AUDIO_REGS_OFFSET(mv88fx_machine_data.port);
+
+	mv88fx_machine_data.irq = platform_get_irq(pdev, 0);
+	if (mv88fx_machine_data.irq == NO_IRQ) {
+		err = -ENXIO;
+		goto error;
+	}
+#if defined(CONFIG_HAVE_CLK)
+	mv88fx_machine_data.clk = clk_get(&pdev->dev, NULL);
+	if (IS_ERR(mv88fx_machine_data.clk))
+		dev_notice(&pdev->dev, "cannot get clkdev\n");
+	else
+		clk_enable(mv88fx_machine_data.clk);
+#endif
+	return 0;
+error:
+	if (mv88fx_machine_data.base) {
+		iounmap(mv88fx_machine_data.base);
+		mv88fx_machine_data.base = NULL;
+	}
+	release_mem_region(mv88fx_machine_data.res->start, SZ_16K);
+	return err;
+}
+
+static int mv88fx_snd_probe(struct platform_device *pdev)
+{
+	int ret = 0;
+
+	mv88fx_snd_debug("");
+
+	if (mv88fx_initalize_machine_data(pdev) != 0)
+		goto error;
+
+	mv88fx_machine_data.snd_dev = platform_device_alloc("soc-audio", pdev->id);
+	if (!mv88fx_machine_data.snd_dev) {
+		ret = -ENOMEM;
+		goto error;
+	}
+
+	platform_set_drvdata(mv88fx_machine_data.snd_dev, &mv88fx_snd_devdata);
+	mv88fx_snd_devdata.dev = &mv88fx_machine_data.snd_dev->dev;
+
+	mv88fx_machine_data.snd_dev->dev.platform_data = &mv88fx_machine_data;
+
+	ret = platform_device_add(mv88fx_machine_data.snd_dev);
+
+	if(ret)
+	{
+                platform_device_put(mv88fx_machine_data.snd_dev);
+	}
+
+	return ret;
+error:
+	mv88fx_snd_error("");
+#if defined(CONFIG_HAVE_CLK)
+	if (!IS_ERR(mv88fx_machine_data.clk)) {
+		clk_disable(mv88fx_machine_data.clk);
+		clk_put(mv88fx_machine_data.clk);
+	}
+#endif
+	if (mv88fx_machine_data.snd_dev)
+		platform_device_unregister(mv88fx_machine_data.snd_dev);
+	return ret;
+
+}
+
+static int mv88fx_snd_remove(struct platform_device *dev)
+{
+	mv88fx_snd_debug("");
+#if defined(CONFIG_HAVE_CLK)
+	if (!IS_ERR(mv88fx_machine_data.clk)) {
+		clk_disable(mv88fx_machine_data.clk);
+		clk_put(mv88fx_machine_data.clk);
+	}
+#endif
+	mv88fx_machine_data.snd_dev->dev.platform_data = NULL;
+	platform_device_unregister(mv88fx_machine_data.snd_dev);
+	release_mem_region(mv88fx_machine_data.res->start, SZ_16K);
+	return 0;
+}
+
+static struct platform_driver mv88fx_snd_driver = {
+	.probe = mv88fx_snd_probe,
+	.remove = mv88fx_snd_remove,
+	.suspend = NULL,
+	.resume = NULL,
+	.driver = {
+		   .name = DRIVER_NAME,
+		   },
+
+};
+
+static int __init mv88fx_snd_init(void)
+{
+	if (!machine_is_dove_rd_avng())
+		return -ENODEV;
+
+	mv88fx_snd_debug("");
+	return platform_driver_register(&mv88fx_snd_driver);
+}
+
+static void __exit mv88fx_snd_exit(void)
+{
+	mv88fx_snd_debug("");
+	platform_driver_unregister(&mv88fx_snd_driver);
+
+}
+
+module_init(mv88fx_snd_init);
+module_exit(mv88fx_snd_exit);
+
+/* Module information */
+MODULE_AUTHOR("Yuval Elmaliah <eyuval@marvell.com>");
+MODULE_AUTHOR("Ethan Ku <eku@marvell.com>");
+MODULE_DESCRIPTION("ALSA SoC Dove");
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_audio_soc/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_audio_soc/Makefile
@@ -0,0 +1,24 @@
+#
+# Makefile for the Marvell Audio ALSA Device Driver
+#
+
+ifdef CONFIG_MV_HAL_RULES_PATH
+include $(srctree)/$(subst ",,$(CONFIG_MV_HAL_RULES_PATH))
+endif
+
+obj-$(CONFIG_SND_DOVE_SOC_MRVL_AUDIO) += snd-mv88fx-soc.o
+obj-$(CONFIG_SND_DOVE_SOC_MRVL_AUDIO) += snd-mv88fx-i2s-soc.o
+obj-$(CONFIG_SND_DOVE_SOC_MRVL_AUDIO) += snd-mv88fx-pcm-soc.o
+
+snd-mv88fx-i2s-soc-objs               += mv88fx-i2s.o
+snd-mv88fx-pcm-soc-objs		      += mv88fx-pcm.o
+
+ifneq ("$(CONFIG_SND_SOC_RT5623)","")
+snd-mv88fx-soc-objs                  += mv88fx-rt5623.o
+endif
+ifneq ("$(CONFIG_SND_SOC_RT5630)","")
+snd-mv88fx-soc-objs                  += mv88fx-rt5630.o
+endif
+ifneq ("$(CONFIG_SND_SOC_CS42L51)","")
+snd-mv88fx-soc-objs                  += mv88fx.o
+endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_audio_soc/mv88fx.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_audio_soc/mv88fx.c
@@ -0,0 +1,682 @@
+/*
+ *
+ *	Marvell Orion Alsa SOC Sound driver
+ *
+ *	Author: Yuval Elmaliah
+ *	Copyright (C) 2008 Marvell Ltd.
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/device.h>
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/clk.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/soc.h>
+#include <sound/soc-dai.h>
+#include <sound/soc-dapm.h>
+#include <sound/asoundef.h>
+#include <asm/mach-types.h>
+#include "../sound/soc/codecs/cs42l51.h"
+#include <linux/mbus.h>
+#include <asm/setup.h>
+#include <asm/mach/arch.h>
+#include <../arch/arm/mach-dove/common.h>
+#include <plat/i2s-orion.h>
+#include "mv88fx-pcm.h"
+#include "mv88fx-i2s.h"
+#include "audio/mvAudioRegs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+
+static struct mv88fx_snd_machine_data mv88fx_machine_data;
+
+static int mv88fx_snd_spdif_mask_info(struct snd_kcontrol *kcontrol,
+				      struct snd_ctl_elem_info *uinfo)
+{
+	uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
+	uinfo->count = 1;
+	return 0;
+}
+
+static int mv88fx_snd_spdif_mask_get(struct snd_kcontrol *kcontrol,
+				     struct snd_ctl_elem_value *ucontrol)
+{
+	ucontrol->value.iec958.status[0] = 0xff;
+	ucontrol->value.iec958.status[1] = 0xff;
+	ucontrol->value.iec958.status[2] = 0xff;
+	ucontrol->value.iec958.status[3] = 0xff;
+	return 0;
+}
+
+static struct snd_kcontrol_new mv88fx_snd_spdif_mask = {
+	.access = SNDRV_CTL_ELEM_ACCESS_READ,
+	.iface = SNDRV_CTL_ELEM_IFACE_PCM,
+	.name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
+	.info = mv88fx_snd_spdif_mask_info,
+	.get = mv88fx_snd_spdif_mask_get,
+};
+
+static int mv88fx_snd_spdif_stream_info(struct snd_kcontrol *kcontrol,
+					struct snd_ctl_elem_info *uinfo)
+{
+	mv88fx_snd_debug("");
+	uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
+	uinfo->count = 1;
+	return 0;
+}
+
+static int mv88fx_snd_spdif_stream_get(struct snd_kcontrol *kcontrol,
+				       struct snd_ctl_elem_value *ucontrol)
+{
+	struct mv88fx_snd_chip *chip = snd_kcontrol_chip(kcontrol);
+	int i, word;
+
+	mv88fx_snd_debug("");
+	spin_lock_irq(&chip->reg_lock);
+	for (word = 0; word < 4; word++) {
+		chip->stream[SNDRV_PCM_STREAM_PLAYBACK].spdif_status[word] =
+		    mv88fx_snd_readl(chip->base,
+		     MV_AUDIO_SPDIF_PLAY_CH_STATUS_LEFT_REG(chip->port, word));
+		for (i = 0; i < 4; i++)
+			ucontrol->value.iec958.status[word + i] =
+			    (chip->stream[SNDRV_PCM_STREAM_PLAYBACK].
+			     spdif_status[word] >> (i * 8)) & 0xff;
+
+	}
+	spin_unlock_irq(&chip->reg_lock);
+	return 0;
+}
+
+static int mv88fx_snd_spdif_stream_put(struct snd_kcontrol *kcontrol,
+				       struct snd_ctl_elem_value *ucontrol)
+{
+	struct mv88fx_snd_chip *chip = snd_kcontrol_chip(kcontrol);
+	int i, change = 0, word;
+	unsigned int val;
+	struct mv88fx_snd_stream *pbstream =
+		&chip->stream[SNDRV_PCM_STREAM_PLAYBACK];
+	int port = chip->port;
+
+	mv88fx_snd_debug("");
+	val = 0;
+	port = port;
+	spin_lock_irq(&chip->reg_lock);
+	for (word = 0; word < 4; word++) {
+		for (i = 0; i < 4; i++) {
+			chip->stream[SNDRV_PCM_STREAM_PLAYBACK].
+			    spdif_status[word] |=
+			    ucontrol->value.iec958.status[word + i] << (i * 8);
+		}
+		mv88fx_snd_writel(chip->base,
+			MV_AUDIO_SPDIF_PLAY_CH_STATUS_LEFT_REG(port, word),
+			pbstream->spdif_status[word]);
+
+		mv88fx_snd_writel(chip->base,
+			MV_AUDIO_SPDIF_PLAY_CH_STATUS_RIGHT_REG(port, word),
+			pbstream->spdif_status[word]);
+
+	}
+
+	if (pbstream->spdif_status[0] & IEC958_AES0_NONAUDIO)
+		chip->pcm_mode = NON_PCM;
+
+	spin_unlock_irq(&chip->reg_lock);
+	return change;
+}
+
+static struct snd_kcontrol_new mv88fx_snd_spdif_stream = {
+	.access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
+	    SNDRV_CTL_ELEM_ACCESS_INACTIVE,
+	.iface = SNDRV_CTL_ELEM_IFACE_PCM,
+	.name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PCM_STREAM),
+	.info = mv88fx_snd_spdif_stream_info,
+	.get = mv88fx_snd_spdif_stream_get,
+	.put = mv88fx_snd_spdif_stream_put
+};
+
+static int mv88fx_snd_spdif_default_info(struct snd_kcontrol *kcontrol,
+					 struct snd_ctl_elem_info *uinfo)
+{
+	mv88fx_snd_debug("");
+	uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
+	uinfo->count = 1;
+	return 0;
+}
+
+static int mv88fx_snd_spdif_default_get(struct snd_kcontrol *kcontrol,
+					struct snd_ctl_elem_value *ucontrol)
+{
+	struct mv88fx_snd_chip *chip = snd_kcontrol_chip(kcontrol);
+	struct mv88fx_snd_stream *pbstream =
+		&chip->stream[SNDRV_PCM_STREAM_PLAYBACK];
+	int port = chip->port;
+	int i, word;
+
+	mv88fx_snd_debug("");
+
+	port = port;
+	spin_lock_irq(&chip->reg_lock);
+	for (word = 0; word < 4; word++) {
+		pbstream->spdif_status[word] =
+		    mv88fx_snd_readl(chip->base,
+			MV_AUDIO_SPDIF_PLAY_CH_STATUS_LEFT_REG(port, word));
+
+		for (i = 0; i < 4; i++)
+			ucontrol->value.iec958.status[word + i] =
+			(pbstream->spdif_status[word] >> (i * 8)) & 0xff;
+
+	}
+	spin_unlock_irq(&chip->reg_lock);
+	return 0;
+}
+
+static int mv88fx_snd_spdif_default_put(struct snd_kcontrol *kcontrol,
+					struct snd_ctl_elem_value *ucontrol)
+{
+	struct mv88fx_snd_chip *chip = snd_kcontrol_chip(kcontrol);
+	struct mv88fx_snd_stream *pbstream =
+		&chip->stream[SNDRV_PCM_STREAM_PLAYBACK];
+	int port = chip->port;
+	int i, change = 0, word;
+	unsigned int val;
+
+	mv88fx_snd_debug("");
+
+	port = port;
+	val = 0;
+	spin_lock_irq(&chip->reg_lock);
+	for (word = 0; word < 4; word++) {
+		for (i = 0; i < 4; i++) {
+			pbstream->spdif_status[word] |=
+			    ucontrol->value.iec958.status[word + i] << (i * 8);
+		}
+		mv88fx_snd_writel(chip->base,
+			MV_AUDIO_SPDIF_PLAY_CH_STATUS_LEFT_REG(port, word),
+			pbstream->spdif_status[word]);
+		mv88fx_snd_writel(chip->base,
+			MV_AUDIO_SPDIF_PLAY_CH_STATUS_RIGHT_REG(port, word),
+			pbstream->spdif_status[word]);
+
+	}
+	if (pbstream->spdif_status[0] & IEC958_AES0_NONAUDIO)
+		chip->pcm_mode = NON_PCM;
+
+
+	spin_unlock_irq(&chip->reg_lock);
+	return change;
+}
+static struct snd_kcontrol_new mv88fx_snd_spdif_default = {
+	.iface = SNDRV_CTL_ELEM_IFACE_PCM,
+	.name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
+	.info = mv88fx_snd_spdif_default_info,
+	.get = mv88fx_snd_spdif_default_get,
+	.put = mv88fx_snd_spdif_default_put
+};
+
+struct mv88fx_snd_mixer_enum {
+	char **names;		/* enum names */
+	int *values;		/* values to be updated */
+	int count;		/* number of elements */
+	void *rec;		/* field to be updated */
+};
+
+int mv88fx_snd_mixer_enum_info(struct snd_kcontrol *kcontrol,
+			       struct snd_ctl_elem_info *uinfo)
+{
+	struct mv88fx_snd_mixer_enum *mixer_enum =
+	    (struct mv88fx_snd_mixer_enum *)kcontrol->private_value;
+
+	mv88fx_snd_debug("");
+
+	uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
+	uinfo->count = 1;
+	uinfo->value.enumerated.items = mixer_enum->count;
+
+	if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
+		uinfo->value.enumerated.item =
+		    uinfo->value.enumerated.items - 1;
+
+	strcpy(uinfo->value.enumerated.name,
+	       mixer_enum->names[uinfo->value.enumerated.item]);
+
+	return 0;
+}
+int mv88fx_snd_mixer_enum_get(struct snd_kcontrol *kcontrol,
+			      struct snd_ctl_elem_value *ucontrol)
+{
+	struct mv88fx_snd_mixer_enum *mixer_enum =
+	    (struct mv88fx_snd_mixer_enum *)kcontrol->private_value;
+	int i;
+	unsigned int val;
+
+	mv88fx_snd_debug("");
+
+	val = *(unsigned int *)mixer_enum->rec;
+
+	for (i = 0; i < mixer_enum->count; i++) {
+
+		if (val == (unsigned int)mixer_enum->values[i]) {
+			ucontrol->value.enumerated.item[0] = i;
+			break;
+		}
+	}
+
+	return 0;
+}
+
+int mv88fx_snd_mixer_enum_put(struct snd_kcontrol *kcontrol,
+			      struct snd_ctl_elem_value *ucontrol)
+{
+	unsigned int val, *rec;
+	struct mv88fx_snd_mixer_enum *mixer_enum =
+	    (struct mv88fx_snd_mixer_enum *)kcontrol->private_value;
+	int i;
+
+	mv88fx_snd_debug("");
+
+	rec = (unsigned int *)mixer_enum->rec;
+	val = ucontrol->value.enumerated.item[0];
+
+	if (val < 0)
+		val = 0;
+	if (val > mixer_enum->count)
+		val = mixer_enum->count;
+
+	for (i = 0; i < mixer_enum->count; i++) {
+
+		if (val == i) {
+			*rec = (unsigned int)mixer_enum->values[i];
+			break;
+		}
+	}
+
+	return 0;
+}
+
+#define MV88FX_PCM_MIXER_ENUM(xname, xindex, value)	\
+{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
+  .name = xname, \
+  .index = xindex, \
+  .info = mv88fx_snd_mixer_enum_info, \
+  .get = mv88fx_snd_mixer_enum_get, \
+  .put = mv88fx_snd_mixer_enum_put, \
+  .private_value = (unsigned long)value,	\
+}
+
+char *playback_src_mixer_names[] = { "SPDIF", "I2S", "SPDIF And I2S" };
+int playback_src_mixer_values[] = { SPDIF, I2S, (SPDIF | I2S) };
+
+struct mv88fx_snd_mixer_enum playback_src_mixer = {
+	.names = playback_src_mixer_names,
+	.values = playback_src_mixer_values,
+	.count = 3,
+};
+
+char *playback_mono_mixer_names[] = { "Mono Both", "Mono Left", "Mono Right" };
+int playback_mono_mixer_values[] = { MONO_BOTH, MONO_LEFT, MONO_RIGHT };
+
+struct mv88fx_snd_mixer_enum playback_mono_mixer = {
+	.names = playback_mono_mixer_names,
+	.values = playback_mono_mixer_values,
+	.count = 3,
+};
+
+char *capture_src_mixer_names[] = { "SPDIF", "I2S" };
+int capture_src_mixer_values[] = { SPDIF, I2S };
+
+struct mv88fx_snd_mixer_enum capture_src_mixer = {
+	.names = capture_src_mixer_names,
+	.values = capture_src_mixer_values,
+	.count = 2,
+};
+
+char *capture_mono_mixer_names[] = { "Mono Left", "Mono Right" };
+int capture_mono_mixer_values[] = { MONO_LEFT, MONO_RIGHT };
+
+struct mv88fx_snd_mixer_enum capture_mono_mixer = {
+	.names = capture_mono_mixer_names,
+	.values = capture_mono_mixer_values,
+	.count = 2,
+};
+
+static struct snd_kcontrol_new mv88fx_snd_mixers[] = {
+	MV88FX_PCM_MIXER_ENUM("Playback output type", 0,
+			      &playback_src_mixer),
+
+	MV88FX_PCM_MIXER_ENUM("Playback mono type", 0,
+			      &playback_mono_mixer),
+
+	MV88FX_PCM_MIXER_ENUM("Capture input Type", 0,
+			      &capture_src_mixer),
+
+	MV88FX_PCM_MIXER_ENUM("Capture mono type", 0,
+			      &capture_mono_mixer),
+
+};
+
+#define	PLAYBACK_MIX_INDX	0
+#define PLAYBACK_MONO_MIX_INDX	1
+#define CAPTURE_MIX_INDX	2
+#define	CAPTURE_MONO_MIX_INDX	3
+
+static int mv88fx_snd_ctrl_new(struct snd_card *card)
+{
+	int err = 0;
+	struct mv88fx_snd_chip *chip = mv88fx_pcm_get_chip();
+
+	playback_src_mixer.rec =
+	    &chip->stream[SNDRV_PCM_STREAM_PLAYBACK].dig_mode;
+	playback_mono_mixer.rec =
+	    &chip->stream[SNDRV_PCM_STREAM_PLAYBACK].mono_mode;
+
+	capture_src_mixer.rec =
+	    &chip->stream[SNDRV_PCM_STREAM_CAPTURE].dig_mode;
+	capture_mono_mixer.rec =
+	    &chip->stream[SNDRV_PCM_STREAM_CAPTURE].mono_mode;
+
+	if (chip->pdata->i2s_play && chip->pdata->spdif_play) {
+		err =
+		    snd_ctl_add(card,
+				snd_ctl_new1(&mv88fx_snd_mixers
+					     [PLAYBACK_MIX_INDX], chip));
+		if (err < 0)
+			return err;
+	}
+
+	if (chip->pdata->i2s_play || chip->pdata->spdif_play) {
+		err =
+		    snd_ctl_add(card,
+				snd_ctl_new1(&mv88fx_snd_mixers
+					     [PLAYBACK_MONO_MIX_INDX], chip));
+		if (err < 0)
+			return err;
+	}
+
+	if (chip->pdata->i2s_rec && chip->pdata->spdif_rec) {
+		err =
+		    snd_ctl_add(card,
+				snd_ctl_new1(&mv88fx_snd_mixers
+					     [CAPTURE_MIX_INDX], chip));
+		if (err < 0)
+			return err;
+	}
+
+	if (chip->pdata->i2s_rec || chip->pdata->spdif_rec) {
+		err =
+		    snd_ctl_add(card,
+				snd_ctl_new1(&mv88fx_snd_mixers
+					     [CAPTURE_MONO_MIX_INDX], chip));
+		if (err < 0)
+			return err;
+	}
+
+	if (chip->pdata->spdif_play) {
+		err = snd_ctl_add(card, snd_ctl_new1(&mv88fx_snd_spdif_mask,
+						     chip));
+		if (err < 0)
+			return err;
+	}
+	if (chip->pdata->spdif_play) {
+		err = snd_ctl_add(card, snd_ctl_new1(&mv88fx_snd_spdif_default,
+						     chip));
+		if (err < 0)
+			return err;
+	}
+	if (chip->pdata->spdif_play) {
+		err = snd_ctl_add(card, snd_ctl_new1(&mv88fx_snd_spdif_stream,
+						     chip));
+		if (err < 0)
+			return err;
+	}
+
+	return err;
+}
+
+
+static int mv88fx_cs42l51_init(struct snd_soc_codec *codec)
+{
+	mv88fx_snd_debug("");
+
+#ifdef CONFIG_MACH_DOVE_RD_AVNG
+	/* Default Gain */
+	snd_soc_update_bits(codec, CS42L51_REG_DAC_OUTPUT_CTRL, 0xE0, 0xE0);
+
+#endif
+
+	mv88fx_snd_ctrl_new(codec->card);
+
+	return 0;
+}
+
+extern struct snd_soc_dai dit_stub_dai;
+
+static struct snd_soc_dai_link mv88fx_dai0[] = {
+	{
+	 .name = "CS42L51",
+	 .stream_name = "CS42L51",
+	 .cpu_dai = &mv88fx_i2s_dai0,
+	 .codec_dai = &cs42l51_dai,
+	 .init = mv88fx_cs42l51_init,
+	 },
+};
+
+static struct snd_soc_dai_link mv88fx_dai1[] = {
+	{
+	 .name = "CS42L51",
+	 .stream_name = "CS42L51",
+	 .cpu_dai = &mv88fx_i2s_dai1,
+	 .codec_dai = &cs42l51_dai,
+	 .init = mv88fx_cs42l51_init,
+	 },
+};
+
+
+static int mv88fx_probe(struct platform_device *pdev)
+{
+	return 0;
+}
+
+static int mv88fx_remove(struct platform_device *pdev)
+{
+	return 0;
+}
+
+static struct snd_soc_card dove = {
+	.name = "mv_i2s",
+	.platform = &mv88fx_soc_platform,
+	.probe = mv88fx_probe,
+	.remove = mv88fx_remove,
+	/* CPU <--> Codec DAI links */
+	.dai_link = mv88fx_dai0,
+	.num_links = ARRAY_SIZE(mv88fx_dai0),
+};
+
+struct cs42l51_setup_data mv88fx_codec_setup_data = {
+	.i2c_address = 0x4A,
+};
+
+static struct snd_soc_device mv88fx_snd_devdata = {
+	.card = &dove,
+	.codec_dev = &soc_codec_dev_cs42l51,
+	.codec_data = &mv88fx_codec_setup_data,
+};
+
+static struct snd_soc_card dove1 = {
+	.name = "mv_i2s1",
+	.platform = &mv88fx_soc_platform,
+	.probe = mv88fx_probe,
+	.remove = mv88fx_remove,
+	/* CPU <--> Codec DAI links */
+	.dai_link = mv88fx_dai1,
+	.num_links = ARRAY_SIZE(mv88fx_dai1),
+};
+
+static struct snd_soc_device mv88fx_snd_devdata1 = {
+	.card = &dove1,
+	.codec_dev = &soc_codec_dev_cs42l51,
+	.codec_data = &mv88fx_codec_setup_data,
+};
+
+static int mv88fx_initalize_machine_data(struct platform_device *pdev)
+{
+	struct resource *r = NULL;
+	int err = 0;
+
+	mv88fx_snd_debug("");
+
+	mv88fx_machine_data.port = pdev->id;
+	mv88fx_machine_data.pdata =
+	    (struct orion_i2s_platform_data *)pdev->dev.platform_data;
+
+	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (!r) {
+		mv88fx_snd_error("");
+		err = -ENXIO;
+		goto error;
+	}
+	r = request_mem_region(r->start, SZ_16K, DRIVER_NAME);
+	if (!r) {
+		mv88fx_snd_error("");
+		err = -EBUSY;
+		goto error;
+	}
+	mv88fx_machine_data.res = r;
+	mv88fx_machine_data.base = ioremap(r->start, SZ_16K);
+
+	if (!mv88fx_machine_data.base) {
+		mv88fx_snd_error("ioremap failed");
+		err = -ENOMEM;
+		goto error;
+	}
+	mv88fx_machine_data.base -= MV_AUDIO_REGS_OFFSET(mv88fx_machine_data.port);
+
+	mv88fx_machine_data.irq = platform_get_irq(pdev, 0);
+	if (mv88fx_machine_data.irq == NO_IRQ) {
+		mv88fx_snd_error("");
+		err = -ENXIO;
+		goto error;
+	}
+#if defined(CONFIG_HAVE_CLK)
+	mv88fx_machine_data.clk = clk_get(&pdev->dev, NULL);
+	if (IS_ERR(mv88fx_machine_data.clk))
+		dev_notice(&pdev->dev, "cannot get clkdev\n");
+	else
+		clk_enable(mv88fx_machine_data.clk);
+#endif
+
+	return 0;
+error:
+	if (mv88fx_machine_data.base) {
+		iounmap(mv88fx_machine_data.base);
+		mv88fx_machine_data.base = NULL;
+	}
+	release_mem_region(mv88fx_machine_data.res->start, SZ_16K);
+	return err;
+}
+
+static int mv88fx_snd_probe(struct platform_device *pdev)
+{
+	int ret = 0;
+	struct snd_soc_device	*soc_device;
+
+	mv88fx_snd_debug("pdev->id=%d\n",pdev->id);
+
+	if (mv88fx_initalize_machine_data(pdev) != 0)
+		goto error;
+
+	mv88fx_machine_data.snd_dev = platform_device_alloc("soc-audio", pdev->id);
+	if (!mv88fx_machine_data.snd_dev) {
+		ret = -ENOMEM;
+		goto error;
+	}
+
+	if (pdev->id)
+		soc_device = &mv88fx_snd_devdata1;
+	else
+		soc_device = &mv88fx_snd_devdata;
+
+	platform_set_drvdata(mv88fx_machine_data.snd_dev, soc_device);
+	soc_device->dev = &mv88fx_machine_data.snd_dev->dev;
+
+	mv88fx_machine_data.snd_dev->dev.platform_data = &mv88fx_machine_data;
+
+	ret = platform_device_add(mv88fx_machine_data.snd_dev);
+
+	mv88fx_snd_debug("");
+
+	return 0;
+error:
+	mv88fx_snd_error("");
+
+#if defined(CONFIG_HAVE_CLK)
+	if (!IS_ERR(mv88fx_machine_data.clk)) {
+		clk_disable(mv88fx_machine_data.clk);
+		clk_put(mv88fx_machine_data.clk);
+	}
+#endif
+
+	if (mv88fx_machine_data.snd_dev)
+		platform_device_unregister(mv88fx_machine_data.snd_dev);
+	return ret;
+
+}
+
+static int mv88fx_snd_remove(struct platform_device *dev)
+{
+	mv88fx_snd_debug("");
+
+#if defined(CONFIG_HAVE_CLK)
+	if (!IS_ERR(mv88fx_machine_data.clk)) {
+		clk_disable(mv88fx_machine_data.clk);
+		clk_put(mv88fx_machine_data.clk);
+	}
+#endif
+	mv88fx_machine_data.snd_dev->dev.platform_data = NULL;
+	platform_device_unregister(mv88fx_machine_data.snd_dev);
+	release_mem_region(mv88fx_machine_data.res->start, SZ_16K);
+	return 0;
+}
+
+static struct platform_driver mv88fx_snd_driver = {
+	.probe = mv88fx_snd_probe,
+	.remove = mv88fx_snd_remove,
+	.suspend = NULL,
+	.resume = NULL,
+	.driver = {
+		   .name = DRIVER_NAME,
+		   },
+
+};
+
+static int __init mv88fx_snd_init(void)
+{
+	if (!machine_is_dove_db() && !machine_is_dove_db_z0() && !machine_is_videoplug() && !machine_is_dove_db_b())
+		return -ENODEV;
+
+	mv88fx_snd_debug("");
+	return platform_driver_register(&mv88fx_snd_driver);
+}
+
+static void __exit mv88fx_snd_exit(void)
+{
+	mv88fx_snd_debug("");
+	platform_driver_unregister(&mv88fx_snd_driver);
+
+}
+
+module_init(mv88fx_snd_init);
+module_exit(mv88fx_snd_exit);
+
+/* Module information */
+MODULE_AUTHOR("Yuval Elmaliah <eyuval@marvell.com>");
+MODULE_DESCRIPTION("ALSA SoC Dove");
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_udc/mv_udc_main.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_udc/mv_udc_main.c
@@ -0,0 +1,1991 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+        this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+ 
+#include "mvOs.h"
+#include "mvSysHwConfig.h"
+#include "boardEnv/mvBoardEnvLib.h"
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "usb/api/mvUsbDevApi.h"
+#include "usb/api/mvUsbCh9.h"
+#include "usb/mvUsb.h"
+
+#include <linux/version.h>
+#include <linux/module.h> 
+#include <linux/moduleparam.h>
+#include <linux/wait.h>
+#include <linux/usb/ch9.h>
+#include <linux/usb/gadget.h>
+#include <linux/proc_fs.h>
+#include <linux/platform_device.h>
+
+#include <asm/irq.h>
+#include <linux/device.h>
+#include <linux/clk.h>
+#include <linux/workqueue.h>
+
+
+#ifdef MV_USB_VOLTAGE_FIX
+
+#define MV_USB_CONNECTED	1
+#define MV_USB_DISCONNECTED	2
+
+#endif /* MV_USB_VOLTAGE_FIX */
+
+#if defined(CONFIG_MV645xx) || defined(CONFIG_MV646xx)
+#   include "marvell_pic.h"
+#endif /* CONFIG_MV645xx */
+
+#ifdef CONFIG_SMP
+#define MV_SPIN_LOCK_IRQSAVE(spinlock,flags) \
+if(!in_interrupt())  \
+spin_lock_irqsave(spinlock, flags)
+
+#define MV_SPIN_UNLOCK_IRQRESTORE(spinlock,flags) \
+if(!in_interrupt())  \
+spin_unlock_irqrestore(spinlock, flags)
+
+#else /* CONFIG_SMP */
+
+#define MV_SPIN_LOCK_IRQSAVE(spinlock,flags) spin_lock_irqsave(spinlock, flags)
+#define MV_SPIN_UNLOCK_IRQRESTORE(spinlock,flags) spin_unlock_irqrestore(spinlock, flags)
+
+#endif /* CONFIG_SMP */
+
+
+/*  
+ *  Enable/Disable Streaming mode for USB Core
+ */
+/*#if (defined(CONFIG_MV88F6082) || defined(CONFIG_MV645xx) || defined(USB_UNDERRUN_WA))*/
+#if (MV_USB_VERSION >= 1) || defined(USB_UNDERRUN_WA)
+static int streaming = 1;  
+#else
+static int streaming = 0;  
+#endif
+module_param_named(streaming, streaming, int, S_IRUGO);
+MODULE_PARM_DESC(streaming, "0 - Streaming Disable, 1 - Streaming Enable");
+
+static int epin_first = 1;  
+module_param_named(epin_first, epin_first, int, S_IRUGO);
+MODULE_PARM_DESC(epin_first, "First choose of IN endpoint number");
+
+static int epout_first = 1;  
+module_param_named(epout_first, epout_first, int, S_IRUGO);
+MODULE_PARM_DESC(epout_first, "First choose of OUT endpoint number");
+
+#if defined(USB_UNDERRUN_WA)
+#include "mvIdma.h" 
+
+extern int              mv_idma_usage_get(int* free_map);
+extern unsigned char*   mv_sram_usage_get(int* sram_size_ptr);
+
+
+#define USB_IDMA_CTRL_LOW_VALUE       ICCLR_DST_BURST_LIM_128BYTE   \
+                                    | ICCLR_SRC_BURST_LIM_128BYTE   \
+                                    | ICCLR_BLOCK_MODE              \
+                                    | ICCLR_DESC_MODE_16M
+
+/*  
+ *  0..3   - use specifed IDMA engine. If the engine is busy - find free one.
+ *  Other  - don't use IDMA (use memcpy instead)
+ */
+static int idma = 1;  
+module_param_named(idma, idma, int, S_IRUGO);
+MODULE_PARM_DESC(idma, "IDMA engine used for copy from DRAM to SRAM [0..3]");
+
+/*  
+ */
+static int wa_sram_parts  = 2;  
+module_param_named(wa_sram_parts, wa_sram_parts, int, S_IRUGO);
+MODULE_PARM_DESC(wa_sram_parts, "");
+
+static int wa_sram_descr  = 1;  
+module_param_named(wa_sram_descr, wa_sram_descr, int, S_IRUGO);
+MODULE_PARM_DESC(wa_sram_descr, "");
+
+/*  
+ */
+static int wa_threshold = 64;  
+module_param_named(wa_threshold, wa_threshold, int, S_IRUGO);
+MODULE_PARM_DESC(wa_threshold, "");
+
+
+static char*    sramBase = (char*)NULL;
+static int      sramSize = 0;
+
+u32     mvUsbSramGet(u32* pSize)
+{
+    char*   pBuf;
+
+    /* Align address to 64 bytes */
+    pBuf = (char*)MV_ALIGN_UP((u32)sramBase, 64);
+
+    if(pSize != NULL)
+    {
+        *pSize = sramSize - (pBuf - sramBase);
+    }
+/*
+    mvOsPrintf("mvUsbSramGet: Base=%p (%p), Size=%d (%d)\n", 
+                sramBase, pBuf, sramSize, *pSize);
+*/
+    return (u32)pBuf;
+}
+
+void        mvUsbIdmaToSramCopy(void* sram_buf, void* src_buf, unsigned int size)
+{
+    unsigned long phys_addr;
+
+/*
+    mvOsPrintf("IdmaToSramCopy: idma=%d, sram=%p, src=%p (0x%x)\n", 
+                    usbWaIdma, sram_buf, src_buf, phys_addr);
+*/
+    if( (idma >= 0) && (idma < MV_IDMA_MAX_CHAN) )
+    {
+        phys_addr = pci_map_single(NULL, src_buf, size, PCI_DMA_TODEVICE );
+
+        /* !!!! SRAM Uncached */
+        /*mvOsCacheInvalidate(NULL, sram_buf, size);*/
+
+        mvDmaTransfer(idma, (MV_U32)phys_addr, 
+                      (MV_U32)sram_buf, size, 0);
+
+        /* Wait until copy is finished */
+        while( mvDmaStateGet(idma) != MV_IDLE );
+    }
+    else
+    {
+        /* mvOsPrintf("usbWA: copy to SRAM %d bytes: \n", size); */
+        memcpy(sram_buf, src_buf, size);
+        /* !!!! SRAM Uncached */
+        /*mvOsCacheFlush(NULL, sram_buf, size);*/
+    }
+}
+
+USB_WA_FUNCS    usbWaFuncs = 
+{
+    mvUsbSramGet,
+    mvUsbIdmaToSramCopy
+};
+
+int mv_usb_find_idma_engine(int idma_no)
+{
+    int idma, free = 0;
+    int free_map[MV_IDMA_MAX_CHAN];
+
+    if( (idma_no < 0) || (idma_no >= MV_IDMA_MAX_CHAN) )
+    {
+        mvOsPrintf("Wrong IDMA number (%d): Valid range [0..%d]\n", 
+                    idma_no, (MV_IDMA_MAX_CHAN-1) );
+        return -1;
+    }
+    free = mv_idma_usage_get(free_map);
+    if(free == 0)
+    {
+        mvOsPrintf("No free IDMAs for USB Underrun WA: use memcpy\n");
+        return -1;
+    }
+    /* First of all check user idma_no */
+    if(free_map[idma_no] != 0)
+        return idma_no;
+
+    /* User idma_no is Busy. Look for free IDMA engine */
+    for(idma=0; idma<MV_IDMA_MAX_CHAN; idma++)
+    {
+        if(free_map[idma] != 0)
+            break;
+    }
+    mvOsPrintf("IDMA engine #%d is Busy. Use IDMA engine #%d instead\n", idma_no, idma);
+    return idma;
+}
+#endif /* USB_UNDERRUN_WA */
+
+
+#undef DEBUG
+
+#ifdef DEBUG
+#define DBGMSG(fmt,args...)    \
+             mvOsPrintf(fmt , ## args)
+#else
+#   define DBGMSG(fmt,args...)
+#endif /* DEBUG */
+
+#define DRIVER_VERSION  "05-July-2006"
+#define DRIVER_DESC "Marvell Gadget USB Peripheral Controller"
+
+struct mv_usb_dev;
+static int mv_usb_initialize_kobject (struct mv_usb_dev    *mv_dev);
+struct mv_usb_ep 
+{
+    struct usb_ep       ep;
+    struct mv_usb_dev*  usb_dev;
+    struct list_head    req_list;
+    unsigned            num : 8,
+                        is_enabled : 1,
+                        is_in : 1;
+};
+
+struct mv_usb_dev 
+{
+    /* each pci device provides one gadget, several endpoints */
+    struct usb_gadget           gadget;
+    spinlock_t                  lock;
+    struct usb_gadget_driver    *driver;
+    struct mv_usb_ep            ep[2*ARC_USB_MAX_ENDPOINTS];
+    unsigned                    enabled : 1,
+                                protocol_stall : 1,
+                                got_irq : 1;
+    u16                         chiprev;
+    struct device               *dev; 
+    void*                       mv_usb_handle;
+    int                         dev_no;
+    MV_U8                       vbus_gpp_no;
+#if defined(CONFIG_HAVE_CLK)
+	struct clk              *clk;
+#endif
+
+};
+
+void    mv_usb_show(struct mv_usb_dev* mv_dev, unsigned int mode);
+
+extern void   _usb_dci_vusb20_isr(pointer);
+
+static void* mvUsbMalloc(unsigned int size)
+{
+    return kmalloc(size,GFP_ATOMIC);
+}
+
+static void mvUsbFree(void* buf)
+{
+    return kfree(buf);
+}
+
+static void* mvUsbIoUncachedMalloc( void* pDev, MV_U32 size, MV_U32 alignment, 
+                                    MV_ULONG* pPhyAddr )
+{
+#if defined(USB_UNDERRUN_WA)
+    if(wa_sram_descr != 0)
+    {
+        char*   pBuf;
+
+        pBuf = (char*)MV_ALIGN_UP((MV_U32)sramBase, alignment);
+        size += (pBuf - sramBase);
+        if( (sramSize < size) )
+        {
+            mvOsPrintf("SRAM malloc failed: Required %d bytes - Free %d bytes\n", 
+                        size, sramSize);
+            return NULL;
+        }
+        if(pPhyAddr != NULL)
+            *pPhyAddr = (MV_ULONG)sramBase;
+/*
+        mvOsPrintf("usbUncachedMalloc: , pBuf=%p (%p), size=%d, align=%d\n", 
+                sramBase, pBuf, size, alignment);
+*/
+        pBuf = sramBase;
+
+        sramSize -= size;
+        sramBase += size;
+
+        return pBuf;
+    }
+#endif 
+    return pci_alloc_consistent( pDev, size+alignment, (dma_addr_t *)pPhyAddr );
+}
+
+static void mvUsbIoUncachedFree( void* pDev, MV_U32 size, MV_ULONG phyAddr, void* pVirtAddr )
+{
+#if defined(USB_UNDERRUN_WA)
+    if(wa_sram_descr != 0)
+    {
+        return;
+    }
+#endif 
+    return pci_free_consistent( pDev, size, pVirtAddr, (dma_addr_t)phyAddr );
+} 
+
+static MV_ULONG mvUsbCacheInvalidate( void* pDev, void* p, int size )
+{
+#if defined(USB_UNDERRUN_WA)
+    if( ((char*)p >= sramBase) && 
+        ((char*)p < (sramBase + sramSize)) )
+        return (unsigned long)p;
+#endif
+
+    return pci_map_single( pDev, p, size, PCI_DMA_FROMDEVICE );
+}
+
+static MV_ULONG mvUsbCacheFlush( void* pDev, void* p, int size )
+{
+#if defined(USB_UNDERRUN_WA)
+    if( ((char*)p >= sramBase) && 
+        ((char*)p < (sramBase + sramSize)) )
+        return (unsigned long)p;
+#endif
+
+    return pci_map_single( pDev, p, size, PCI_DMA_TODEVICE );
+}
+
+static unsigned long mvUsbVirtToPhys(void* pDev, void* pVirtAddr)
+{
+#if defined(USB_UNDERRUN_WA)
+    if( ((char*)pVirtAddr >= sramBase) && 
+        ((char*)pVirtAddr < (sramBase + sramSize)) )
+        return (unsigned long)pVirtAddr;
+#endif 
+
+    return virt_to_phys(pVirtAddr);
+}
+
+static void   usbDevResetComplete(int devNo)
+{
+    MV_U32  regVal; 
+
+    regVal = MV_USB_CORE_MODE_DEVICE | MV_USB_CORE_SETUP_LOCK_DISABLE_MASK;
+    if(streaming == 0)    
+        regVal |= MV_USB_CORE_STREAM_DISABLE_MASK; 
+
+    /* Set USB_MODE register */
+    MV_REG_WRITE(MV_USB_CORE_MODE_REG(devNo), regVal); 
+}
+
+extern MV_U32   mvUsbGetCapRegAddr(int devNo);
+MV_U32   OrionmvUsbGetCapRegAddr(int devNo)
+{
+	return mvUsbGetCapRegAddr(devNo) + INTER_REGS_BASE;
+}
+
+
+USB_IMPORT_FUNCS    usbImportFuncs =
+{
+    mvOsPrintf,
+    mvOsSPrintf,
+    mvUsbIoUncachedMalloc,
+    mvUsbIoUncachedFree,
+    mvUsbMalloc,
+    mvUsbFree,
+    memset,
+    memcpy,
+    mvUsbCacheFlush,
+    mvUsbCacheInvalidate,
+    mvUsbVirtToPhys,
+    NULL,
+    NULL,
+    OrionmvUsbGetCapRegAddr,
+    usbDevResetComplete
+};
+
+
+static struct mv_usb_dev*   the_controllers[MV_USB_MAX_PORTS] = {NULL};
+
+static const char driver_name [] = "mv_udc";
+static const char driver_desc [] = DRIVER_DESC;
+
+static char ep_names [2*ARC_USB_MAX_ENDPOINTS][10] = 
+{
+    "ep0out", "ep0in",
+};
+
+static struct usb_ep_ops mv_usb_ep_ops;
+
+static void mv_usb_ep_cancel_all_req(struct mv_usb_ep *mv_ep)
+{
+    struct mv_usb_dev*      mv_dev = mv_ep->usb_dev;
+    struct usb_request*     usb_req;
+    int                     req_cntr, tr_cntr;
+
+    req_cntr = tr_cntr = 0;
+
+    /* Cancel all transfers */
+    while(_usb_device_get_transfer_status(mv_dev->mv_usb_handle, mv_ep->num, 
+           mv_ep->is_in ? ARC_USB_SEND : ARC_USB_RECV) != ARC_USB_STATUS_IDLE)
+   {
+        tr_cntr++;
+       _usb_device_cancel_transfer(mv_dev->mv_usb_handle, mv_ep->num, 
+                           mv_ep->is_in ? ARC_USB_SEND : ARC_USB_RECV);
+    }
+/*
+    if(tr_cntr > 0)
+    {
+        mvOsPrintf("Cancel ALL transfers: ep=%d-%s, %d transfers\n", 
+                        mv_ep->num, mv_ep->is_in ? "in" : "out", tr_cntr);
+    }
+*/
+    while (!list_empty (&mv_ep->req_list)) 
+    {
+        usb_req = list_entry (mv_ep->req_list.next, struct usb_request, list);
+
+        /* Dequeue request and call complete function */
+        list_del_init (&usb_req->list);
+
+        if (usb_req->status == -EINPROGRESS)
+            usb_req->status = -ESHUTDOWN;
+
+        usb_req->complete (&mv_ep->ep, usb_req);
+        req_cntr++;
+        if(req_cntr >= MAX_XDS_FOR_TR_CALLS)
+            break;
+    }
+/*
+    if(req_cntr > 0)
+    {
+        mvOsPrintf("Cancel ALL Requests: ep=%d-%s, %d requests\n", 
+                        mv_ep->num, mv_ep->is_in ? "in" : "out", req_cntr);
+        _usb_stats(mv_dev->mv_usb_handle);
+    }
+*/
+}
+
+static uint_8 mv_usb_start_ep0(struct mv_usb_dev *mv_dev)
+{
+    DBGMSG("%s: mv_dev=%p, mv_usb_handle=%p, mv_ep=%p, usb_ep=%p\n", 
+           __FUNCTION__, mv_dev, mv_dev->mv_usb_handle, &mv_dev->ep[0], &mv_dev->ep[0].ep);
+
+    /* Init ep0 IN and OUT */
+    mv_dev->ep[0].is_enabled = 1;
+
+    _usb_device_init_endpoint(mv_dev->mv_usb_handle, 0, mv_dev->ep[0].ep.maxpacket, 
+                                ARC_USB_SEND,  ARC_USB_CONTROL_ENDPOINT, 0);
+
+    _usb_device_init_endpoint(mv_dev->mv_usb_handle, 0, mv_dev->ep[0].ep.maxpacket, 
+                                ARC_USB_RECV, ARC_USB_CONTROL_ENDPOINT, 0);
+
+    return USB_OK;
+}
+
+static void   mv_usb_ep_init(struct mv_usb_ep *ep, int num, int is_in)
+{
+    sprintf(&ep_names[num*2+is_in][0], "ep%d%s", num, is_in ? "in" : "out");
+    ep->ep.name = &ep_names[num*2+is_in][0];
+
+    ep->num = num;
+    ep->is_in = is_in;
+    ep->is_enabled = 0;
+
+    INIT_LIST_HEAD (&ep->req_list);
+    
+    ep->ep.maxpacket = ~0;
+    ep->ep.ops = &mv_usb_ep_ops;
+}
+
+static uint_8 mv_usb_reinit (struct mv_usb_dev *usb_dev)
+{
+    int                 i, ep_num;
+    struct mv_usb_ep    *ep;
+
+    DBGMSG("%s: mv_dev=%p, mv_usb_handle=%p\n", 
+           __FUNCTION__, usb_dev, usb_dev->mv_usb_handle);
+
+    INIT_LIST_HEAD (&usb_dev->gadget.ep_list);
+
+    /* Enumerate IN endpoints */
+    ep_num = epin_first;
+    for(i=0; i<_usb_device_get_max_endpoint(usb_dev->mv_usb_handle); i++)
+    {
+        ep = &usb_dev->ep[ep_num*2+1];
+        if (ep_num != 0)
+        {
+            INIT_LIST_HEAD(&ep->ep.ep_list);
+            list_add_tail (&ep->ep.ep_list, &usb_dev->gadget.ep_list);
+        }
+        mv_usb_ep_init(ep, ep_num, 1);
+        ep->usb_dev = usb_dev;
+
+        ep_num++;
+        if(ep_num == _usb_device_get_max_endpoint(usb_dev->mv_usb_handle))
+            ep_num = 0;
+    }
+
+    /* Enumerate OUT endpoints */
+    ep_num = epout_first;
+    for(i=0; i<_usb_device_get_max_endpoint(usb_dev->mv_usb_handle); i++)
+    {
+        ep = &usb_dev->ep[ep_num*2];
+        if (ep_num != 0)
+        {
+            INIT_LIST_HEAD(&ep->ep.ep_list);
+            list_add_tail (&ep->ep.ep_list, &usb_dev->gadget.ep_list);
+        }
+        mv_usb_ep_init(ep, ep_num, 0);
+        ep->usb_dev = usb_dev;
+
+        ep_num++;
+        if(ep_num == _usb_device_get_max_endpoint(usb_dev->mv_usb_handle))
+            ep_num = 0;
+    }
+    usb_dev->ep[0].ep.maxpacket = 64;
+    usb_dev->gadget.ep0 = &usb_dev->ep[0].ep;
+    INIT_LIST_HEAD (&usb_dev->gadget.ep0->ep_list);
+    return USB_OK;
+}
+
+void mv_usb_bus_reset_service(void*      handle, 
+                               uint_8     type, 
+                               boolean    setup,
+                               uint_8     direction, 
+                               uint_8_ptr buffer,
+                               uint_32    length, 
+                               uint_8     error)
+{
+    int                     i, dev_no = _usb_device_get_dev_num(handle);
+    struct mv_usb_dev       *mv_dev = the_controllers[dev_no];
+    struct mv_usb_ep        *mv_ep;
+
+    if(setup == 0)
+    {
+        /* mv_usb_show(mv_dev, 0x3ff); */
+
+        /* Stop Hardware and cancel all pending requests */
+        for (i=0; i<2*_usb_device_get_max_endpoint(handle); i++)
+        {
+            mv_ep = &mv_dev->ep[i];
+
+            if(mv_ep->is_enabled == 0)
+                continue;
+
+            mv_usb_ep_cancel_all_req(mv_ep);
+        }
+        /* If connected call Function disconnect callback */
+        if( (mv_dev->gadget.speed != USB_SPEED_UNKNOWN) && 
+            (mv_dev->driver != NULL) &&
+            (mv_dev->driver->disconnect != NULL) )
+
+        {
+/*
+            USB_printf("USB gadget device disconnect or port reset: frindex=0x%x\n",
+                    MV_REG_READ(MV_USB_CORE_FRAME_INDEX_REG(dev_no)) );    
+*/
+            mv_dev->driver->disconnect (&mv_dev->gadget);
+        }
+        mv_dev->gadget.speed = USB_SPEED_UNKNOWN;
+
+        /* Reinit all endpoints */
+        mv_usb_reinit(mv_dev);
+    }
+    else
+    {
+        _usb_device_start(mv_dev->mv_usb_handle);
+        /* Restart Control Endpoint #0 */
+        mv_usb_start_ep0(mv_dev);
+    }
+}
+
+
+void mv_usb_speed_service(void*      handle, 
+                           uint_8     type, 
+                           boolean    setup,
+                           uint_8     direction, 
+                           uint_8_ptr buffer,
+                           uint_32    length, 
+                           uint_8     error)
+{
+    int                     dev_no = _usb_device_get_dev_num(handle);
+    struct mv_usb_dev       *mv_dev = the_controllers[dev_no];
+
+    DBGMSG("Speed = %s\n", (length == ARC_USB_SPEED_HIGH) ? "High" : "Full");
+
+    if(length == ARC_USB_SPEED_HIGH)
+        mv_dev->gadget.speed = USB_SPEED_HIGH;
+    else
+        mv_dev->gadget.speed = USB_SPEED_FULL;
+
+    return;
+}
+
+void mv_usb_suspend_service(void*      handle, 
+                            uint_8     type, 
+                            boolean    setup,
+                            uint_8     direction, 
+                            uint_8_ptr buffer,
+                            uint_32    length, 
+                            uint_8     error)
+{
+    int                     dev_no = _usb_device_get_dev_num(handle);
+    struct mv_usb_dev       *mv_dev = the_controllers[dev_no];
+
+    DBGMSG("%s\n", __FUNCTION__);
+
+    if( (mv_dev->driver != NULL) &&
+        (mv_dev->driver->suspend != NULL) )
+        mv_dev->driver->suspend (&mv_dev->gadget);
+}
+
+void mv_usb_resume_service(void*      handle, 
+                            uint_8     type, 
+                            boolean    setup,
+                            uint_8     direction, 
+                            uint_8_ptr buffer,
+                            uint_32    length, 
+                            uint_8     error)
+{
+    int                     dev_no = _usb_device_get_dev_num(handle);
+    struct mv_usb_dev       *mv_dev = the_controllers[dev_no];
+
+    DBGMSG("%s\n", __FUNCTION__);
+
+    if( (mv_dev->driver != NULL) &&
+        (mv_dev->driver->resume != NULL) )
+        mv_dev->driver->resume (&mv_dev->gadget);
+}
+
+void mv_usb_tr_complete_service(void*      handle, 
+                                 uint_8     type, 
+                                 boolean    setup,
+                                 uint_8     direction, 
+                                 uint_8_ptr buffer,
+                                 uint_32    length, 
+                                 uint_8     error)
+{
+    int                     dev_no = _usb_device_get_dev_num(handle);
+    struct mv_usb_dev       *mv_dev = the_controllers[dev_no];
+    struct mv_usb_ep       *mv_ep;
+    struct usb_request      *usb_req;
+    int                     ep_num = (type*2) + direction;
+
+    DBGMSG("%s: ep_num=%d, setup=%s, direction=%s, pBuf=0x%x, length=%d, error=0x%x\n", 
+             __FUNCTION__, type, setup ? "YES" : "NO", 
+             (direction == ARC_USB_RECV) ? "RECV" : "SEND", 
+             (unsigned)buffer, (int)length, error);
+
+    mv_ep = &mv_dev->ep[ep_num];
+    if( !list_empty(&mv_ep->req_list) )
+    {
+        usb_req = list_entry (mv_ep->req_list.next, struct usb_request, list);
+        if(usb_req->buf != buffer)
+        {
+                mvOsPrintf("ep=%d-%s: req=%p, Unexpected buffer pointer: %p, len=%d, expected=%p\n", 
+                    ep_num, (direction == ARC_USB_RECV) ? "out" : "in",
+                    usb_req, buffer, length, usb_req->buf);
+                return;       
+        }
+        /* Dequeue request and call complete function */
+        list_del_init (&usb_req->list);
+
+        usb_req->actual += length;
+        usb_req->status = error;
+
+        usb_req->complete (&mv_ep->ep, usb_req);
+
+        if(error != 0)
+        {
+            _usb_device_stall_endpoint(mv_ep->usb_dev->mv_usb_handle, mv_ep->num,
+                mv_ep->is_in ? ARC_USB_SEND : ARC_USB_RECV);
+        }
+    }
+    else
+        mvOsPrintf("ep=%p, epName=%s, epNum=%d - reqList EMPTY\n", 
+                mv_ep, mv_ep->ep.name, mv_ep->num);
+}
+
+void mv_usb_ep0_complete_service(void*      handle, 
+                                 uint_8     type, 
+                                 boolean    setup,
+                                 uint_8     direction, 
+                                 uint_8_ptr buffer,
+                                 uint_32    length, 
+                                 uint_8     error)
+{ /* Body */
+    int                     dev_no = _usb_device_get_dev_num(handle);
+    struct mv_usb_dev       *mv_dev = the_controllers[dev_no];
+    struct mv_usb_ep       *mv_ep;
+    struct usb_request*     usb_req;
+    int                     rc;
+    boolean                 is_delegate = FALSE;
+    static SETUP_STRUCT     mv_ctrl_req;
+   
+    DBGMSG("%s: EP0(%d), setup=%s, direction=%s, pBuf=0x%x, length=%d, error=0x%x\n", 
+                __FUNCTION__, type, setup ? "YES" : "NO", 
+                (direction == ARC_USB_RECV) ? "RECV" : "SEND", 
+                (unsigned)buffer, (int)length, error);
+
+    mv_ep = &mv_dev->ep[type];
+
+    if (setup) 
+    {
+        _usb_device_read_setup_data(handle, type, (u8 *)&mv_ctrl_req);
+        le16_to_cpus (&mv_ctrl_req.VALUE);
+        le16_to_cpus (&mv_ctrl_req.INDEX);
+        le16_to_cpus (&mv_ctrl_req.LENGTH);
+
+        while(_usb_device_get_transfer_status(handle, mv_ep->num, 
+                ARC_USB_SEND) != ARC_USB_STATUS_IDLE)
+        {
+            _usb_device_cancel_transfer(mv_dev->mv_usb_handle, mv_ep->num, 
+                           ARC_USB_SEND);
+        }
+        while(_usb_device_get_transfer_status(handle, mv_ep->num, 
+                ARC_USB_RECV) != ARC_USB_STATUS_IDLE)
+        {
+            _usb_device_cancel_transfer(mv_dev->mv_usb_handle, mv_ep->num, 
+                           ARC_USB_RECV);
+        }
+        /* make sure any leftover request state is cleared */
+        while (!list_empty (&mv_ep->req_list)) 
+        {
+            usb_req = list_entry (mv_ep->req_list.next, struct usb_request, list);
+
+            /* Dequeue request and call complete function */
+            list_del_init (&usb_req->list);
+
+            if (usb_req->status == -EINPROGRESS)
+                usb_req->status = -EPROTO;
+
+            usb_req->complete (&mv_ep->ep, usb_req);
+        }
+    }
+    /* Setup request direction */
+    mv_ep->is_in = (mv_ctrl_req.REQUESTTYPE & REQ_DIR_IN) != 0;     
+
+    if(setup)
+        DBGMSG("Setup: dir=%s, reqType=0x%x, req=0x%x, value=0x%02x, index=0x%02x, length=0x%02x\n", 
+                (direction == ARC_USB_SEND) ? "In" : "Out",
+                mv_ctrl_req.REQUESTTYPE, mv_ctrl_req.REQUEST, mv_ctrl_req.VALUE,
+                mv_ctrl_req.INDEX, mv_ctrl_req.LENGTH); 
+
+    /* Handle most lowlevel requests;
+     * everything else goes uplevel to the gadget code.
+     */
+    if( (mv_ctrl_req.REQUESTTYPE & REQ_TYPE_MASK) == REQ_TYPE_STANDARD)
+    {
+        switch (mv_ctrl_req.REQUEST) 
+        {
+            case REQ_GET_STATUS: 
+                mvUsbCh9GetStatus(handle, setup, &mv_ctrl_req);
+                break;
+
+            case REQ_CLEAR_FEATURE:
+                mvUsbCh9ClearFeature(handle, setup, &mv_ctrl_req);
+                break;
+
+            case REQ_SET_FEATURE:
+                mvUsbCh9SetFeature(handle, setup, &mv_ctrl_req);
+                break;
+
+            case REQ_SET_ADDRESS:
+                mvUsbCh9SetAddress(handle, setup, &mv_ctrl_req);
+                break;
+
+            default:
+                /* All others delegate call up-layer gadget code */
+                is_delegate = TRUE;
+        }
+    }
+    else
+        is_delegate = TRUE;
+
+    /* delegate call up-layer gadget code */
+    if(is_delegate)
+    {
+        if(setup)
+        {
+            rc = mv_dev->driver->setup (&mv_dev->gadget, (struct usb_ctrlrequest*)&mv_ctrl_req);
+            if(rc < 0)
+            {
+                mvOsPrintf("Setup is failed: rc=%d, req=0x%02x, reqType=0x%x, value=0x%04x, index=0x%04x\n", 
+                    rc, mv_ctrl_req.REQUEST, mv_ctrl_req.REQUESTTYPE, 
+                    mv_ctrl_req.VALUE, mv_ctrl_req.INDEX);
+                _usb_device_stall_endpoint(handle, 0, ARC_USB_RECV);
+                return;
+            }
+            /* Acknowledge  */
+            if( mv_ep->is_in ) {
+                _usb_device_recv_data(handle, 0, NULL, 0);
+            } 
+            else if( mv_ctrl_req.LENGTH ) {
+                _usb_device_send_data(handle, 0, NULL, 0);
+            }
+        }
+    }
+
+    if(!setup)
+    {
+        if( !list_empty(&mv_ep->req_list) )
+        {
+            usb_req = list_entry (mv_ep->req_list.next, struct usb_request, list);
+
+            /* Dequeue request and call complete function */
+            list_del_init (&usb_req->list);
+
+            usb_req->actual = length;
+            usb_req->status = error;
+            usb_req->complete (&mv_ep->ep, usb_req);
+        }
+        DBGMSG("Setup complete: dir=%s, is_in=%d, length=%d\n", 
+                (direction == ARC_USB_SEND) ? "In" : "Out",
+                mv_ep->is_in, length);
+    }
+}
+
+#ifdef MV_USB_VOLTAGE_FIX
+
+/* usb_state - state of usb:connected(1)/disconnected(2) */
+static int usb_state = MV_USB_DISCONNECTED;
+
+/* usb_device-device structure for kobject functionality */
+static struct device mv_usb_device;
+
+/* mv_usb_work_struct - workqueue structure using for creating and run work tasks */
+static struct work_struct mv_usb_work_struct;
+
+/* mv_bustype for inizialization usb_device structure */
+static struct bus_type mv_usb_bustype = {
+		.name		= "mv_udc",
+};
+
+/*******************************************************************************
+* mv_usb_work_struct_routine
+* DESCRIPTION: 	notify userspace by ending an uevent
+* INPUTS:       *ignored - structure work_struct - N/A
+* OUTPUTS:      N/A
+* RETURNS:      N/A
+*******************************************************************************/
+static int mv_usb_work_struct_routine(struct work_struct *ignored)
+{
+	int retval=1;
+
+	/* Usb device connected */
+	if(usb_state == MV_USB_CONNECTED)
+	{
+		retval = kobject_uevent(&mv_usb_device.kobj, KOBJ_ADD);
+		mvOsPrintf("Usb device connected\n");
+	}
+	/* Usb device disconnected */
+	else
+	{
+		retval = kobject_uevent(&mv_usb_device.kobj, KOBJ_REMOVE);
+		mvOsPrintf("Usb device disconnected\n");
+	}
+	
+	/* on error */
+	if(retval != 0)
+	{
+		mvOsPrintf("ERROR: %d, kobject_uevent() failed\n",retval);
+	}
+
+	return retval;
+}
+
+/* initialize a work-struct with work task -mv_usb_work_struct_routine */
+static DECLARE_WORK(mv_usb_work_struct, mv_usb_work_struct_routine);
+static irqreturn_t mv_usb_vbus_irq (int irq, void *_dev)
+{
+    struct mv_usb_dev       *mv_dev = _dev;
+    int                     vbus_change, retval=0;
+
+    vbus_change = mvUsbBackVoltageUpdate(mv_dev->dev_no, (int)mv_dev->vbus_gpp_no);
+    if(vbus_change == 2)
+    {
+        if( (mv_dev->gadget.speed != USB_SPEED_UNKNOWN) &&
+            (mv_dev->driver != NULL)                    &&
+            (mv_dev->driver->disconnect != NULL) )
+            mv_dev->driver->disconnect (&mv_dev->gadget);
+    }
+
+	usb_state=(vbus_change==2) ? MV_USB_DISCONNECTED : MV_USB_CONNECTED;
+	if(list_empty(&mv_usb_work_struct.entry))
+	{
+		retval = schedule_work(&mv_usb_work_struct);
+ 		if(retval == 0)
+		{
+			mvOsPrintf("ERROR: %d, schedule_work() failed\n",retval);
+		}
+	}
+    return IRQ_HANDLED;
+}
+#endif /* MV_USB_VOLTAGE_FIX */
+
+static irqreturn_t mv_usb_dev_irq (int irq, void *_dev)
+{
+    struct mv_usb_dev       *mv_dev = _dev;
+
+    spin_lock (&mv_dev->lock);
+
+    /* handle ARC USB Device interrupts */
+    _usb_dci_vusb20_isr(mv_dev->mv_usb_handle);
+
+    spin_unlock (&mv_dev->lock);
+
+    return IRQ_HANDLED;
+}
+
+#ifdef MV_USB_VOLTAGE_FIX
+
+/*******************************************************************************
+* mv_usb_initialize_kobject
+* DESCRIPTION: 	init device,set bus type, create and add kobject
+* INPUTS:       *dev - pointer for device structure
+* OUTPUTS:      N/A
+* RETURNS:      status USB_OK on success
+*******************************************************************************/
+static int mv_usb_initialize_kobject (struct mv_usb_dev       *mv_dev)
+{
+	int retval = 1;
+	int vbus_change;
+	/* init device */
+	device_initialize(&mv_usb_device);
+
+	/* set bus_type for device */
+	mv_usb_device.bus = &mv_usb_bustype;
+
+	/* init kobject */
+	retval = kobject_set_name(&mv_usb_device.kobj, "mv_udc_d");
+	if(retval != USB_OK)
+	{
+		mvOsPrintf("ERROR: %d, kobject_set_name() failed\n",retval);
+		return retval;
+	}
+
+	/* add kobject */
+	retval = kobject_add(&mv_usb_device.kobj, NULL, "mv_udc_d");
+	if(retval != USB_OK)
+	{
+		mvOsPrintf("ERROR: %d, kobject_add() failed\n",retval);
+		return retval;
+	}
+	vbus_change = mvUsbBackVoltageUpdate(mv_dev->dev_no, (int)mv_dev->vbus_gpp_no);
+	usb_state=(vbus_change==2) ? MV_USB_DISCONNECTED : MV_USB_CONNECTED;
+	mv_usb_work_struct_routine(NULL);
+	return USB_OK;
+}
+#endif /* MV_USB_VOLTAGE_FIX */
+
+/* when a driver is successfully registered, it will receive
+ * control requests including set_configuration(), which enables
+ * non-control requests.  then usb traffic follows until a
+ * disconnect is reported.  then a host may connect again, or
+ * the driver might get unbound.
+ */
+int usb_gadget_register_driver (struct usb_gadget_driver *driver)
+{
+    int                 retval, dev_no;
+    struct mv_usb_dev   *mv_dev = NULL;
+    uint_8              error;
+
+/*    mvOsPrintf("ENTER usb_gadget_register_driver: \n");*/
+
+    /* Find USB Gadget device controller */
+    for(dev_no=0; dev_no<mvCtrlUsbMaxGet(); dev_no++)
+    {
+        mv_dev = the_controllers[dev_no];
+        if(mv_dev != NULL)
+            break;
+    }
+
+    if ( (driver == NULL)
+            || (driver->speed != USB_SPEED_HIGH)
+            || !driver->bind
+//            || !driver->unbind
+            || !driver->setup)
+    {
+        mvOsPrintf("ERROR: speed=%d, bind=%p,  unbind=%p, setup=%p\n",
+                    driver->speed, driver->bind, driver->unbind, driver->setup);
+        return -EINVAL;
+    }
+
+    if (!mv_dev)
+    {
+        mvOsPrintf("ERROR: max_dev=%d, mv_dev=%p\n", mvCtrlUsbMaxGet(), mv_dev);
+        return -ENODEV;
+    }
+    if (mv_dev->driver)
+    {
+        mvOsPrintf("ERROR: driver=%p is busy\n", mv_dev->driver);
+        return -EBUSY;
+    }
+/*
+    mvOsPrintf("usb_gadget_register_driver: dev=%d, mv_dev=%p, pDriver=%p\n", 
+                dev_no, mv_dev, driver);
+*/
+    /* first hook up the driver ... */
+    mv_dev->driver = driver;
+    mv_dev->gadget.dev.driver = &driver->driver;
+    retval = driver->bind (&mv_dev->gadget);
+    if (retval) {
+        mvOsPrintf("bind to driver %s --> %d\n",
+                driver->driver.name, retval);
+        mv_dev->driver = 0;
+        mv_dev->gadget.dev.driver = 0;
+        return retval;
+    }
+
+    /* request_irq */
+    if (request_irq (IRQ_USB_CTRL(dev_no), mv_usb_dev_irq, IRQF_DISABLED, 
+                     driver_name, mv_dev) != 0) 
+    {
+        mvOsPrintf("%s register: request interrupt %d failed\n", 
+                driver->driver.name, IRQ_USB_CTRL(dev_no));
+        return -EBUSY;
+    }
+
+    _usb_device_start(mv_dev->mv_usb_handle);
+    error = mv_usb_start_ep0(mv_dev);
+
+    mvOsPrintf("registered Marvell USB-%d gadget driver %s\n", dev_no, driver->driver.name);
+    return error;
+}
+EXPORT_SYMBOL (usb_gadget_register_driver);
+
+int usb_gadget_unregister_driver (struct usb_gadget_driver *driver)
+{
+    int                 i, dev_no;
+    struct mv_usb_ep    *mv_ep;
+    struct mv_usb_dev   *mv_dev = NULL;
+    unsigned long       flags = 0;
+
+    /* Find USB Gadget device controller */
+    for(dev_no=0; dev_no<mvCtrlUsbMaxGet(); dev_no++)
+    {
+        if( (the_controllers[dev_no] != NULL) && (the_controllers[dev_no]->driver == driver) )
+        {
+            mv_dev = the_controllers[dev_no];
+            break;
+        }
+    }
+    
+    if (!mv_dev)
+    {
+        mvOsPrintf("usb_gadget_unregister_driver FAILED: no such device\n");
+        return -ENODEV;
+    }
+    if (!driver || (driver != mv_dev->driver) )
+    {
+        mvOsPrintf("usb_gadget_unregister_driver FAILED: no such driver, dev_no=%d\n", dev_no);
+        return -EINVAL;
+    }
+
+    /* Stop and Disable ARC USB device */
+    MV_SPIN_LOCK_IRQSAVE(&mv_dev->lock, flags);
+
+    /* Stop Endpoints */
+    for (i=0; i<2*_usb_device_get_max_endpoint(mv_dev->mv_usb_handle); i++)
+    {
+        mv_ep = &mv_dev->ep[i];
+        if(mv_ep->is_enabled == 0)
+            continue;
+
+        mv_ep->is_enabled = 0;
+        mv_usb_ep_cancel_all_req(mv_ep);
+
+        _usb_device_deinit_endpoint(mv_dev->mv_usb_handle, mv_ep->num, 
+                                mv_ep->is_in ? ARC_USB_SEND : ARC_USB_RECV);
+    }
+    _usb_device_stop(mv_dev->mv_usb_handle);
+
+    MV_SPIN_UNLOCK_IRQRESTORE(&mv_dev->lock, flags);
+
+    if (mv_dev->gadget.speed != USB_SPEED_UNKNOWN)
+        mv_dev->driver->disconnect (&mv_dev->gadget);
+
+    driver->unbind (&mv_dev->gadget);
+
+    /* free_irq */
+    free_irq (IRQ_USB_CTRL(dev_no), mv_dev);
+
+    mv_dev->gadget.dev.driver = 0;
+    mv_dev->driver = 0;
+
+    mv_dev->gadget.speed = USB_SPEED_UNKNOWN;
+
+    /* Reinit all endpoints */
+    mv_usb_reinit(mv_dev);
+
+    /*device_remove_file(dev->dev, &dev_attr_function); ?????*/
+    mvOsPrintf("unregistered Marvell USB %d gadget driver %s\n", dev_no, driver->driver.name);
+
+    return 0;
+}
+EXPORT_SYMBOL (usb_gadget_unregister_driver);
+
+void    mv_usb_show(struct mv_usb_dev* mv_dev, unsigned int mode)
+{
+    int     i;
+
+    mvOsPrintf("\n-------------------------------------------------------------\n");
+
+    if( MV_BIT_CHECK(mode, 0) )
+        _usb_regs(mv_dev->mv_usb_handle);
+
+    if( MV_BIT_CHECK(mode, 1) )
+        _usb_status(mv_dev->mv_usb_handle);
+
+    if( MV_BIT_CHECK(mode, 2) )
+        _usb_stats(mv_dev->mv_usb_handle);
+
+    if( MV_BIT_CHECK(mode, 3) )
+        _usb_debug_print_trace_log();
+
+    for(i=0; i<_usb_device_get_max_endpoint(mv_dev->mv_usb_handle); i++)
+    {
+        if( MV_BIT_CHECK(mode, (8+i)) )
+        {
+            _usb_ep_status(mv_dev->mv_usb_handle, i, ARC_USB_RECV);
+            _usb_ep_status(mv_dev->mv_usb_handle, i, ARC_USB_SEND);
+        }
+    }
+    mvOsPrintf("-------------------------------------------------------------\n\n");
+}
+EXPORT_SYMBOL (mv_usb_show);
+
+static int  mv_usb_ep_enable(struct usb_ep *_ep, 
+                              const struct usb_endpoint_descriptor *desc)
+{
+    struct mv_usb_dev* usb_dev;
+    struct mv_usb_ep*  usb_ep;
+    uint_16             maxSize;
+    uint_8              epType; 
+    unsigned long       flags = 0;
+
+    usb_ep = container_of (_ep, struct mv_usb_ep, ep);
+    if( (_ep == NULL) || (desc == NULL) )
+        return -EINVAL;
+    
+    usb_dev = usb_ep->usb_dev;
+
+    if(usb_ep->is_enabled)
+    {
+        mvOsPrintf("mv_usb: %d%s Endpoint (%s) is already in use\n", 
+                    usb_ep->num, usb_ep->is_in ? "In" : "Out", usb_ep->ep.name);
+        return -EINVAL;
+    }
+/*
+    mvOsPrintf("USB Enable %s: type=%d, maxPktSize=%d\n",
+                _ep->name, desc->bmAttributes & 0x3, desc->wMaxPacketSize);
+*/
+    if(usb_ep->num == 0)
+    {
+        mvOsPrintf("mv_usb: ep0 is reserved\n");
+        return -EINVAL;
+    }
+
+    if(desc->bDescriptorType != USB_DT_ENDPOINT)
+    {
+        mvOsPrintf("mv_usb: wrong descriptor type %d\n", desc->bDescriptorType);
+        return -EINVAL;
+    }
+
+    MV_SPIN_LOCK_IRQSAVE(&usb_dev->lock, flags);
+
+    usb_dev = usb_ep->usb_dev;
+    if( (usb_dev->driver == NULL) || 
+        (usb_dev->gadget.speed == USB_SPEED_UNKNOWN) )
+    {
+        MV_SPIN_UNLOCK_IRQRESTORE(&usb_dev->lock, flags);
+        return -ESHUTDOWN;
+    }
+    /* Max packet size */
+    maxSize = le16_to_cpu (desc->wMaxPacketSize);
+
+    /* Endpoint type */
+    if( (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_CONTROL)
+        epType = ARC_USB_CONTROL_ENDPOINT;
+    else if( (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_ISOC) 
+        epType = ARC_USB_ISOCHRONOUS_ENDPOINT;
+    else if( (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_BULK) 
+        epType = ARC_USB_BULK_ENDPOINT;
+    else
+        epType = ARC_USB_INTERRUPT_ENDPOINT;
+
+    _ep->maxpacket = maxSize & 0x7ff;
+    usb_ep->is_enabled = 1;
+
+    _usb_device_init_endpoint(usb_dev->mv_usb_handle, usb_ep->num, maxSize, 
+            usb_ep->is_in ? ARC_USB_SEND : ARC_USB_RECV, epType,
+            (epType == ARC_USB_BULK_ENDPOINT) ? ARC_USB_DEVICE_DONT_ZERO_TERMINATE : 0);
+
+    MV_SPIN_UNLOCK_IRQRESTORE(&usb_dev->lock, flags);
+    return 0;
+}
+
+static int  mv_usb_ep_disable (struct usb_ep *_ep)
+{
+    struct mv_usb_dev*  mv_dev;
+    struct mv_usb_ep*   mv_ep;
+    unsigned long       flags = 0;
+    uint_8              direction;
+
+    mv_ep = container_of (_ep, struct mv_usb_ep, ep);
+    if( (_ep == NULL) || (mv_ep->is_enabled == 0) || (mv_ep->num == 0))
+        return -EINVAL;
+
+    mv_dev = mv_ep->usb_dev;
+/*
+    mvOsPrintf("mv_usb_ep_disable: mv_dev=%p, ep=0x%x (%d-%s), name=%s\n", 
+                mv_dev, (unsigned)_ep, mv_ep->num, mv_ep->is_in ? "in" : "out", 
+                _ep->name);
+*/    
+    MV_SPIN_LOCK_IRQSAVE(&mv_dev->lock, flags);
+
+    direction = mv_ep->is_in ? ARC_USB_SEND : ARC_USB_RECV;
+
+    mv_ep->is_enabled = 0;
+
+    /* Cancell all requests */
+    mv_usb_ep_cancel_all_req(mv_ep);
+
+    /* Disable endpoint */
+    _usb_device_deinit_endpoint(mv_dev->mv_usb_handle, mv_ep->num, direction);
+
+    MV_SPIN_UNLOCK_IRQRESTORE(&mv_dev->lock, flags);
+    return 0;
+}
+
+
+static struct usb_request* mv_usb_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
+{
+    struct usb_request* req;
+
+    if (!_ep)
+        return NULL;
+
+    req = kmalloc (sizeof *req, gfp_flags);
+    if (!req)
+        return NULL;
+
+    memset (req, 0, sizeof *req);
+    INIT_LIST_HEAD (&req->list);
+
+    return req;
+}
+
+static void     mv_usb_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
+{
+
+    if (!_ep || !_req)
+    {
+        mvOsPrintf("ep_free_request Error: _ep=%p, _req=%p\n", _ep, _req);
+        return;
+    }
+    if( !list_empty(&_req->list) )
+    {
+        mvOsPrintf("%s free_request: _req=0x%x\n",
+                    _ep->name, (unsigned)_req);
+        list_del_init (&_req->list);
+    }
+    kfree (_req);
+}
+
+static int      mv_usb_ep_queue (struct usb_ep *_ep, struct usb_request *_req, 
+                                 gfp_t gfp_flags)
+{
+    struct mv_usb_dev* usb_dev;
+    struct mv_usb_ep*  usb_ep;
+    unsigned long       flags = 0;
+    uint_8              error;
+
+    usb_ep = container_of (_ep, struct mv_usb_ep, ep);
+    /* check parameters */
+    if( (_ep == NULL) || (_req == NULL) )
+    {
+        mvOsPrintf("ep_queue Failed: _ep=%p, _req=%p\n", _ep, _req);
+        return -EINVAL;
+    }
+    usb_dev = usb_ep->usb_dev;
+
+    if ( (usb_dev->driver == NULL) || (usb_dev->gadget.speed == USB_SPEED_UNKNOWN) )
+        return -ESHUTDOWN;
+
+    if(usb_ep->is_enabled == 0)
+    {
+        mvOsPrintf("ep_queue Failed - %s is disabled: usb_ep=%p\n", _ep->name, usb_ep);
+        return -EINVAL;
+    }
+
+    DBGMSG("%s: num=%d-%s, name=%s, _req=%p, buf=%p, length=%d\n", 
+                __FUNCTION__, usb_ep->num, usb_ep->is_in ? "in" : "out", 
+                _ep->name, _req, _req->buf, _req->length);
+
+    MV_SPIN_LOCK_IRQSAVE(&usb_dev->lock, flags);
+                
+    _req->status = -EINPROGRESS;
+    _req->actual = 0;
+
+    /* Add request to list */
+    if( ((usb_ep->num == 0) && (_req->length == 0)) || (usb_ep->is_in) )
+    {
+        int     send_size, size;
+        uint_8  *send_ptr, *buf_ptr;
+
+        send_ptr = buf_ptr = _req->buf;
+        send_size = size = _req->length;
+        list_add_tail(&_req->list, &usb_ep->req_list);
+
+        error = _usb_device_send_data(usb_dev->mv_usb_handle, usb_ep->num, send_ptr, send_size);
+        if(error != USB_OK)
+        {
+            mvOsPrintf("ep_queue: Can't SEND data (err=%d): ep_num=%d, pBuf=0x%x, send_size=%d\n",
+                    error, usb_ep->num, (unsigned)_req->buf, _req->length);
+            list_del_init (&_req->list);
+        }
+
+        size -= send_size;
+        buf_ptr += send_size;
+    }
+    else
+    {
+        error = _usb_device_recv_data(usb_dev->mv_usb_handle, usb_ep->num, _req->buf, _req->length);
+        if(error != USB_OK)
+        {
+            mvOsPrintf("mv_usb_ep_queue: Can't RCV data (err=%d): ep_num=%d, pBuf=0x%x, size=%d\n",
+                        error, usb_ep->num, (unsigned)_req->buf, _req->length);
+        }
+        else
+            list_add_tail(&_req->list, &usb_ep->req_list);
+    }
+
+    MV_SPIN_UNLOCK_IRQRESTORE(&usb_dev->lock, flags);
+
+    return (int)error;
+}
+
+/* Cancell request */
+static int      mv_usb_ep_dequeue (struct usb_ep *_ep, struct usb_request *_req)
+{
+    struct mv_usb_dev* usb_dev;
+    struct usb_request *usb_req;
+    struct mv_usb_ep*  usb_ep;
+    unsigned long       flags = 0;
+    int                 status = 0;
+
+    usb_ep = container_of (_ep, struct mv_usb_ep, ep);
+    /* check parameters */
+    if( (_ep == NULL) || (_req == NULL) || (usb_ep->is_enabled == 0) )
+        return -EINVAL;
+
+    usb_dev = usb_ep->usb_dev;
+        
+    if ( (usb_dev->driver == NULL) || (usb_dev->gadget.speed == USB_SPEED_UNKNOWN) )
+    {
+        mvOsPrintf("mv_usb_ep_dequeue: ep=0x%x, num=%d-%s, name=%s, driver=0x%x, speed=%d\n", 
+                (unsigned)_ep, usb_ep->num, usb_ep->is_in ? "in" : "out", 
+                _ep->name, (unsigned)usb_dev->driver, usb_dev->gadget.speed);
+
+        return -ESHUTDOWN;
+    }
+
+    MV_SPIN_LOCK_IRQSAVE(&usb_dev->lock, flags);
+
+    /* ????? Currently supported only dequeue request from the HEAD of List */
+    if( !list_empty(&usb_ep->req_list) )
+    {
+        usb_req = list_entry (usb_ep->req_list.next, struct usb_request, list);
+
+        if(usb_req == _req)
+        {
+            /* Cancel transfer */
+            _usb_device_cancel_transfer(usb_dev->mv_usb_handle, usb_ep->num, 
+                            usb_ep->is_in ? ARC_USB_SEND : ARC_USB_RECV);
+            /* Dequeue request and call complete function */
+            list_del_init (&_req->list);
+
+            if (_req->status == -EINPROGRESS)
+                _req->status = -ECONNRESET;
+
+            /* ????? what about enable interrupts */
+            _req->complete (&usb_ep->ep, _req);
+        }
+        else
+        {
+            mvOsPrintf("Cancel request failed: ep=%p, usb_req=%p, req=%p\n", 
+                        _ep, usb_req, _req);
+            status = EINVAL;
+        }
+    }
+    /*
+    else
+        mvOsPrintf("%s: ep=%p, epName=%s, epNum=%d - reqList EMPTY\n", 
+                    __FUNCTION__, usb_ep, usb_ep->ep.name, usb_ep->num);
+    */
+    MV_SPIN_UNLOCK_IRQRESTORE(&usb_dev->lock, flags);
+
+    return status;
+}
+
+static int      mv_usb_ep_set_halt (struct usb_ep *_ep, int value)
+{
+    struct mv_usb_ep*   mv_ep;
+    unsigned long       flags = 0;
+    int                 retval = 0;
+
+    mv_ep = container_of (_ep, struct mv_usb_ep, ep);
+    if (_ep == NULL)
+        return -EINVAL;
+    if( (mv_ep->usb_dev->driver == NULL) || 
+        (mv_ep->usb_dev->gadget.speed == USB_SPEED_UNKNOWN) )
+        return -ESHUTDOWN;
+
+/*
+    mvOsPrintf("%s - %s \n", 
+                _ep->name, value ? "Stalled" : "Unstalled");
+*/
+    MV_SPIN_LOCK_IRQSAVE(&mv_ep->usb_dev->lock, flags);
+    if (!list_empty (&mv_ep->req_list))
+        retval = -EAGAIN;
+    else 
+    {
+        /* set/clear, then synch memory views with the device */
+        if (value) 
+        {
+            if (mv_ep->num == 0)
+                mv_ep->usb_dev->protocol_stall = 1;
+            else
+                _usb_device_stall_endpoint(mv_ep->usb_dev->mv_usb_handle, mv_ep->num,
+                mv_ep->is_in ? ARC_USB_SEND : ARC_USB_RECV);
+        } 
+        else
+        {
+            _usb_device_unstall_endpoint(mv_ep->usb_dev->mv_usb_handle, mv_ep->num, 
+                                    mv_ep->is_in ? ARC_USB_SEND : ARC_USB_RECV);
+        }
+    }
+    MV_SPIN_UNLOCK_IRQRESTORE(&mv_ep->usb_dev->lock, flags);
+
+    return retval;
+}
+
+
+static void     mv_usb_ep_fifo_flush (struct usb_ep *_ep)
+{
+    DBGMSG("%s: ep=%p, ep_name=%s - NOT supported\n", __FUNCTION__, _ep, _ep->name);
+}
+
+
+static struct usb_ep_ops mv_usb_ep_ops = 
+{
+    .enable         = mv_usb_ep_enable,
+    .disable        = mv_usb_ep_disable,
+
+    .alloc_request  = mv_usb_ep_alloc_request,
+    .free_request   = mv_usb_ep_free_request,
+
+    .queue          = mv_usb_ep_queue,
+    .dequeue        = mv_usb_ep_dequeue,
+
+    .set_halt       = mv_usb_ep_set_halt,
+    .fifo_flush     = mv_usb_ep_fifo_flush,
+    /*.fifo_status    =  Not supported */
+};
+
+static int mv_usb_get_frame (struct usb_gadget *_gadget)
+{
+    DBGMSG("Call mv_usb_get_frame - NOT supported\n");
+    return 0;
+}
+
+static int mv_usb_wakeup(struct usb_gadget *_gadget)
+{
+    DBGMSG("Call mv_usb_wakeup - NOT supported\n");
+    return 0;
+}
+
+static int mv_usb_set_selfpowered (struct usb_gadget *_gadget, int value)
+{
+    DBGMSG("Call mv_usb_set_selfpowered - NOT supported\n");
+    return 0;
+}
+
+static const struct usb_gadget_ops mv_usb_ops = 
+{
+    .get_frame       = mv_usb_get_frame,
+    .wakeup          = mv_usb_wakeup,
+    .set_selfpowered = mv_usb_set_selfpowered,
+    .ioctl           = NULL,
+};
+
+static void mv_usb_gadget_release (struct device *_dev)
+{
+    struct mv_usb_dev   *usb_dev = dev_get_drvdata (_dev);
+
+    /*mvOsPrintf("Call mv_usb_gadget_release \n");*/
+    mvOsFree(usb_dev);
+}
+
+
+static int __init mv_usb_gadget_probe(struct platform_device *pdev) 
+{
+    struct mv_usb_dev       *mv_dev;
+    int                     dev_no, retval, i;
+    uint_8                  error;
+
+    for(dev_no=0; dev_no<mvCtrlUsbMaxGet(); dev_no++)
+    {
+        if( (pdev->resource[1].flags == IORESOURCE_IRQ) &&
+            (pdev->resource[1].start == IRQ_USB_CTRL(dev_no)) )
+        {
+            break;
+        }
+    }
+    if(dev_no >= mvCtrlUsbMaxGet())
+    {
+        mvOsPrintf("mv_udc_probe: device is not found\n");
+        return -EINVAL;
+    }
+    mvOsPrintf("USB-%d Gadget driver probed\n", dev_no);
+
+    if (the_controllers[dev_no]) 
+    {
+        mvOsPrintf("mv_dev_load: USB-%d controller is BUSY\n", dev_no);
+        return -EBUSY;
+    }
+
+    /* alloc, and start init */
+    mv_dev = mvOsMalloc (sizeof(struct mv_usb_dev));
+    if (mv_dev == NULL)
+    {
+        mvOsPrintf("mv_dev_load: malloc failed\n");
+        return -ENOMEM;
+    }
+
+    memset (mv_dev, 0, sizeof *mv_dev);
+    spin_lock_init (&mv_dev->lock);
+    mv_dev->dev = &pdev->dev; 
+    mv_dev->gadget.ops = &mv_usb_ops;
+    mv_dev->gadget.is_dualspeed = 1;
+
+    /* the "gadget" abstracts/virtualizes the controller */
+//    strcpy (dev_name(&mv_dev->gadget.dev), "gadget");
+    dev_set_name(&mv_dev->gadget.dev, "gadget");
+    mv_dev->gadget.dev.parent = &pdev->dev;
+    mv_dev->gadget.dev.dma_mask = pdev->dev.dma_mask; /* ?????? */
+    mv_dev->gadget.dev.release = mv_usb_gadget_release ;
+    mv_dev->gadget.name = driver_name;
+    mv_dev->mv_usb_handle = NULL;
+    mv_dev->dev_no = dev_no;
+
+    platform_set_drvdata(pdev, mv_dev);
+    the_controllers[dev_no] = mv_dev;
+#if defined(CONFIG_HAVE_CLK)
+    if (dev_no == 0)
+	    mv_dev->clk = clk_get(NULL, "usb0");
+    else if (dev_no == 1)
+	    mv_dev->clk = clk_get(NULL, "usb1");
+    else {
+        mvOsPrintf("mv_udc_probe: unknown dev number\n");
+        return -EINVAL;
+    }
+    if (IS_ERR(mv_dev->clk))
+	    dev_notice(&pdev->dev, "cannot get clkdev\n");
+    else
+	    clk_enable(mv_dev->clk);
+#endif
+
+#ifdef MV_USB_VOLTAGE_FIX
+
+    mv_dev->vbus_gpp_no = mvUsbGppInit(dev_no);
+    mvOsPrintf("USB gadget device #%d: vbus_gpp_no = %d\n", 
+                    dev_no, mv_dev->vbus_gpp_no);
+
+    if(mv_dev->vbus_gpp_no != (MV_U8)N_A)
+    {
+        if (request_irq (IRQ_GPP_START + mv_dev->vbus_gpp_no, mv_usb_vbus_irq, IRQF_DISABLED |
+			 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, 
+                     driver_name, mv_dev) != 0) 
+        {
+            mvOsPrintf("%s probe: request interrupt %d failed\n", 
+                    driver_name, IRQ_GPP_START + mv_dev->vbus_gpp_no);
+            return -EBUSY;
+        }
+    }
+
+#endif /* MV_USB_VOLTAGE_FIX */
+
+    /* Reset ARC USB device ????? */
+    /* Reinit ARC USB device ????? */
+
+    /* First of all. */
+    _usb_device_set_bsp_funcs(&usbImportFuncs);
+
+#if defined(USB_UNDERRUN_WA)
+
+    if(wa_sram_parts > USB_SRAM_MAX_PARTS)
+    {
+        mvOsPrintf("Wrong <wa_sram_parts> param (%d): Valid range [1 .. %d]\n",
+                wa_sram_parts, USB_SRAM_MAX_PARTS);
+        return -EINVAL;
+    }
+
+    global_wa_funcs = &usbWaFuncs;
+    global_wa_threshold = wa_threshold;
+    global_wa_sram_parts = wa_sram_parts;
+
+    sramBase = mv_sram_usage_get(&sramSize);
+    if(sramBase == NULL)
+    {
+        mvOsPrintf("USB Underrun WA: No free SRAM space\n");
+        return -ENOMEM;
+    }
+    memset(sramBase, 0, sramSize);
+    
+    idma = mv_usb_find_idma_engine(idma);
+    if(idma != -1)
+    {
+        MV_REG_WRITE(IDMA_BYTE_COUNT_REG(idma), 0);
+        MV_REG_WRITE(IDMA_CURR_DESC_PTR_REG(idma), 0);
+        MV_REG_WRITE(IDMA_CTRL_HIGH_REG(idma), ICCHR_ENDIAN_LITTLE 
+#ifdef MV_CPU_LE
+					 | ICCHR_DESC_BYTE_SWAP_EN
+#endif
+					 );
+        MV_REG_WRITE(IDMA_CTRL_LOW_REG(idma), USB_IDMA_CTRL_LOW_VALUE);
+    }
+    mvOsPrintf("USB underrun WA: idma=%d, streaming=%d, threshold=%d, SRAM: base=%p, size=%d, parts=%d\n", 
+                idma, streaming, global_wa_threshold, sramBase, sramSize, global_wa_sram_parts);
+#endif /* USB_UNDERRUN_WA */
+
+    /*_usb_debug_set_flags(MV_USB_GADGET_DEBUG_FLAGS);*/
+
+    /* Enable ARC USB device */
+    retval = (int)_usb_device_init(dev_no, &mv_dev->mv_usb_handle);
+    if (retval != USB_OK) 
+    {
+        mvOsPrintf("\nUSB Initialization failed. Error: %x", retval);
+        return -EINVAL;
+    } /* Endif */
+
+    if( (epin_first < 1) || (epin_first >= _usb_device_get_max_endpoint(mv_dev->mv_usb_handle)) )
+    {
+        mvOsPrintf("\nUSB_%d: epin_first=%d is out of range 1..%d. Use default epin_first=1\n", 
+                    dev_no, epin_first, _usb_device_get_max_endpoint(mv_dev->mv_usb_handle) );
+        epin_first = 1;
+    }
+
+    if( (epout_first < 1) || (epout_first >= _usb_device_get_max_endpoint(mv_dev->mv_usb_handle)) )
+    {
+        mvOsPrintf("\nUSB_%d: epout_first=%d is out of range 1..%d. Use default epout_first=1\n", 
+                    dev_no, epout_first, _usb_device_get_max_endpoint(mv_dev->mv_usb_handle) );
+        epout_first = 1;
+    }
+
+    /* Self Power, Remote wakeup disable */
+    _usb_device_set_status(mv_dev->mv_usb_handle, ARC_USB_STATUS_DEVICE, (1 << DEVICE_SELF_POWERED));
+
+    /* Register all ARC Services */  
+    error = _usb_device_register_service(mv_dev->mv_usb_handle, 
+                                ARC_USB_SERVICE_BUS_RESET, mv_usb_bus_reset_service);
+    if (error != USB_OK) 
+    {
+        mvOsPrintf("\nUSB BUS_RESET Service Registration failed. Error: 0x%x", error);
+        return -EINVAL;
+    } /* Endif */
+   
+    error = _usb_device_register_service(mv_dev->mv_usb_handle, 
+                        ARC_USB_SERVICE_SPEED_DETECTION, mv_usb_speed_service);
+    if (error != USB_OK) 
+    {
+        mvOsPrintf("\nUSB SPEED_DETECTION Service Registration failed. Error: 0x%x", 
+                        error);
+        return -EINVAL;
+    } /* Endif */
+         
+    error = _usb_device_register_service(mv_dev->mv_usb_handle, 
+                                ARC_USB_SERVICE_SUSPEND, mv_usb_suspend_service);
+    if (error != USB_OK) 
+    {
+        mvOsPrintf("\nUSB SUSPEND Service Registration failed. Error: 0x%x", error);
+        return -EINVAL;
+    } /* Endif */
+
+    error = _usb_device_register_service(mv_dev->mv_usb_handle, 
+                                ARC_USB_SERVICE_SLEEP, mv_usb_suspend_service);
+    if (error != USB_OK) 
+    {
+        mvOsPrintf("\nUSB SUSPEND Service Registration failed. Error: 0x%x", error);
+        return -EINVAL;
+    } /* Endif */    
+
+    error = _usb_device_register_service(mv_dev->mv_usb_handle, 
+                                ARC_USB_SERVICE_RESUME, mv_usb_resume_service);
+    if (error != USB_OK) 
+    {
+        mvOsPrintf("\nUSB RESUME Service Registration failed. Error: 0x%x", error);
+        return -EINVAL;
+    } /* Endif */
+
+    error = _usb_device_register_service(mv_dev->mv_usb_handle, 0, 
+                                            mv_usb_ep0_complete_service);   
+    if (error != USB_OK) 
+    {
+        mvOsPrintf("\nUSB ep0 TR_COMPLETE Service Registration failed. Error: 0x%x", error);
+        return error;
+    } /* Endif */
+
+    for (i=1; i<_usb_device_get_max_endpoint(mv_dev->mv_usb_handle); i++)
+    {
+        error = _usb_device_register_service(mv_dev->mv_usb_handle, i, 
+                                                    mv_usb_tr_complete_service);   
+        if (error != USB_OK) 
+        {
+            mvOsPrintf("\nUSB ep0 TR_COMPLETE Service Registration failed. Error: 0x%x", error);
+            return error;
+        } /* Endif */
+    }
+    mv_dev->gadget.speed = USB_SPEED_UNKNOWN;
+
+    if( mv_usb_reinit (mv_dev) != USB_OK)
+        return -EINVAL;
+
+    retval = device_register (&mv_dev->gadget.dev);
+
+#ifdef MV_USB_VOLTAGE_FIX
+
+	if(retval!= USB_OK)
+	{
+		mvOsPrintf("ERROR: %d, device_register() failed\n", retval);
+		return retval;
+	}
+
+	/* create and init kobject */
+ 	retval = mv_usb_initialize_kobject(mv_dev);
+	if(retval != USB_OK)
+	{
+		mvOsPrintf("ERROR: %d, kobject_init() failed\n", retval);
+		return retval;
+	}
+
+#endif /* MV_USB_VOLTAGE_FIX */
+
+    return retval; 
+}
+
+static int __exit mv_usb_gadget_remove(struct platform_device *pdev)
+{
+    int                 i;
+    struct mv_usb_dev   *mv_dev = platform_get_drvdata(pdev); 
+
+    mvOsPrintf("mv_usb_gadget_remove: mv_dev=%p, driver=%p\n", 
+                mv_dev, mv_dev->driver);
+    /* start with the driver above us */
+    if (mv_dev->driver) 
+    {
+        /* should have been done already by driver model core */
+        mvOsPrintf("pci remove, driver '%s' is still registered\n",
+                    mv_dev->driver->driver.name);
+
+        usb_gadget_unregister_driver (mv_dev->driver);
+    }
+
+    spin_lock (&mv_dev->lock);
+
+    for (i=0; i<_usb_device_get_max_endpoint(mv_dev->mv_usb_handle); i++)
+        _usb_device_unregister_service(mv_dev->mv_usb_handle, i);   
+
+    /* Deregister all other services */
+    _usb_device_unregister_service(mv_dev->mv_usb_handle, ARC_USB_SERVICE_BUS_RESET);   
+    _usb_device_unregister_service(mv_dev->mv_usb_handle, ARC_USB_SERVICE_SPEED_DETECTION);
+
+    _usb_device_unregister_service(mv_dev->mv_usb_handle, ARC_USB_SERVICE_SUSPEND);
+
+    _usb_device_unregister_service(mv_dev->mv_usb_handle, ARC_USB_SERVICE_RESUME);
+
+    _usb_device_shutdown(mv_dev->mv_usb_handle);
+
+    spin_unlock (&mv_dev->lock);
+
+#ifdef MV_USB_VOLTAGE_FIX
+
+    if(mv_dev->vbus_gpp_no != (MV_U8)N_A)
+    {
+        free_irq (IRQ_GPP_START + mv_dev->vbus_gpp_no, mv_dev); 
+    }
+    /* delete kobject */
+	kobject_del(&mv_usb_device.kobj);
+
+#endif /* MV_USB_VOLTAGE_FIX */
+
+    the_controllers[mv_dev->dev_no] = 0;
+    device_unregister (&mv_dev->gadget.dev);
+
+#if defined(CONFIG_HAVE_CLK)
+    if (!IS_ERR(mv_dev->clk)) {
+	    clk_disable(mv_dev->clk);
+	    clk_put(mv_dev->clk);
+    }
+#endif
+
+    kfree(mv_dev);
+
+    platform_set_drvdata(pdev, 0);
+
+    return 0;
+}
+ 
+
+/* global variables from 'regdump' */
+static struct proc_dir_entry *usb_resource_dump;
+static u32  usb_resource_dump_result;
+
+int usb_resource_dump_write (struct file *file, const char *buffer,
+                      unsigned long count, void *data) 
+{
+    return 0;
+}
+
+int usb_resource_dump_read (char *buffer, char **buffer_location, off_t offset,
+                            int buffer_length, int *zero, void *ptr) 
+{
+    int                 i, dev;
+    static int          count = 0;
+    struct mv_usb_dev*  mv_dev;
+
+    printk("usb_resource_dump_read_%-3d\n",  count);
+    if(offset > 0)
+        return 0;
+
+    count++;
+    usb_resource_dump_result = count;
+
+    for(dev=0; dev<mvCtrlUsbMaxGet(); dev++)
+    {
+        mv_dev = the_controllers[dev];
+
+        if(mv_dev != NULL)
+        {
+            mv_usb_show(mv_dev, 0xff);
+
+            _usb_ep_status(mv_dev->mv_usb_handle, 0, ARC_USB_RECV);
+            _usb_ep_status(mv_dev->mv_usb_handle, 0, ARC_USB_SEND);
+
+            for(i=1; i<_usb_device_get_max_endpoint(mv_dev->mv_usb_handle); i++)
+            {
+                struct mv_usb_ep    *ep;
+
+                /* OUT endpoint (RECV) */ 
+                ep = &mv_dev->ep[i*2];
+                if(ep->is_enabled)
+                    _usb_ep_status(mv_dev->mv_usb_handle, i, ARC_USB_RECV);
+
+                /* IN endpoint (SEND) */
+                ep = &mv_dev->ep[i*2+1];
+                if(ep->is_enabled)
+                    _usb_ep_status(mv_dev->mv_usb_handle, i, ARC_USB_SEND);
+            }
+        }
+    }
+    return sprintf(buffer, "%x\n", usb_resource_dump_result);
+}
+
+int usb_start_resource_dump(void)
+{
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)
+  usb_resource_dump = create_proc_entry ("usb_dump" , 0666 , &proc_root);
+#else
+  usb_resource_dump = create_proc_entry ("usb_dump" , 0666 , NULL);
+#endif
+  usb_resource_dump->read_proc = usb_resource_dump_read;
+  usb_resource_dump->write_proc = usb_resource_dump_write;
+  usb_resource_dump->nlink = 1;
+  return 0;
+}
+
+#ifdef CONFIG_PM
+static int mv_usb_gadget_suspend(struct platform_device *pdev,
+				 pm_message_t state)
+{
+	/* this driver doesn't support PM yet*/
+	return -1;
+}
+#else
+#define mv_usb_gadget_suspend NULL
+#endif
+
+static struct platform_driver mv_usb_gadget_driver = 
+{
+	.driver = {
+		.name       = (char *) driver_name,
+		.owner = THIS_MODULE,
+	},
+//	.bus        = &platform_bus_type,
+	.probe      = mv_usb_gadget_probe,
+	.remove     = __exit_p(mv_usb_gadget_remove),
+	.suspend    = mv_usb_gadget_suspend,
+};
+
+MODULE_VERSION (DRIVER_VERSION);
+MODULE_DESCRIPTION (DRIVER_DESC);
+MODULE_AUTHOR ("Dima Epshtein");
+MODULE_LICENSE ("GPL");
+
+static int __init init (void)
+{
+    int dev_no;
+
+    mvOsPrintf("%s: version %s loaded\n", driver_name, DRIVER_VERSION);
+    for(dev_no=0; dev_no<mvCtrlUsbMaxGet(); dev_no++)
+    {
+	the_controllers[dev_no] = NULL;
+    }
+    usb_start_resource_dump();
+    return platform_driver_register(&mv_usb_gadget_driver); 
+}
+module_init (init);
+
+static void __exit cleanup (void)
+{
+    mvOsPrintf("%s: version %s unloaded\n", driver_name, DRIVER_VERSION);
+    
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)
+    remove_proc_entry("usb_dump" , &proc_root);
+#else
+    remove_proc_entry("usb_dump" , NULL);
+#endif
+    platform_driver_unregister(&mv_usb_gadget_driver);
+}
+module_exit (cleanup);
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_udc/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_udc/Makefile
@@ -0,0 +1,22 @@
+#
+# Makefile for the Marvell USB device controller
+#
+
+ifdef CONFIG_MV_HAL_RULES_PATH
+include $(srctree)/$(subst ",,$(CONFIG_MV_HAL_RULES_PATH))
+endif
+
+USB_DIR := ../mv_hal/usb/
+USB_PATH := $(srctree)/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb
+
+USB_DEV_DIR := $(USB_DIR)/device
+
+EXTRA_CFLAGS  += -I$(USB_PATH)/api -I$(USB_PATH)/common -I$(USB_PATH)/device
+
+OBJS        := mv_udc_main.o ../$(USB_DEV_DIR)/mvUsbDevCh9.o ../$(USB_DEV_DIR)/mvUsbDevMain.o 	\
+               ../$(USB_DEV_DIR)/mvUsbDevRecv.o ../$(USB_DEV_DIR)/mvUsbDevSend.o ../$(USB_DEV_DIR)/mvUsbDevUtl.o 	\
+	       ../$(USB_DEV_DIR)/mvUsbHsDevUtl.o  ../$(USB_DEV_DIR)/mvUsbHsDevMain.o ../$(USB_DEV_DIR)/mvUsbHsDevCncl.o
+
+mv_udc-objs := $(OBJS)
+obj-$(CONFIG_USB_MRVL) := mv_udc.o
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_udc/README
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_udc/README
@@ -0,0 +1,87 @@
+
+Introduction:
++++++++++++++
+This is a USB gadget driver for Marvell Orion chip:
+There are two Linux Gadget examples are working above the gadget driver
+mv_udc.ko  - an Orion USB device Gadget driver module.
+g_file_storage.ko - a Kernel USB file storage gadget module.
+g_ether.ko        - a Kernel USB Ethernet gadget module
+
+In order to use this module make sure that one of USB Controllers on the board 
+is configured as a USB device. It means that the UBoot environment variable usb0Mode 
+(or usb1Mode if exist) is set to "device".
+
+Compile:
+++++++++
+
+To compile mv_udc.ko:
+1. Go to linux Kernel directory
+2. Choose in the config option 'USB Gadget Support' 
+   and choose 'USB Peripheral Controller' to be 'Marvell USB Device Port'.
+   Select 'USB Gadget Drivers' as a module and select 'File-backed Storage Gadget' as a module.
+3. make modules
+4. Copy g_file_storage.ko and g_ether.ko from drivers/usb/gadget/
+5. Copy mv_udc.ko from arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_udc/
+
+
+Run g_file_storage.ko example:
+++++
+Under the ARM FS:
+    On the first time we need to create a file which will be use as the gadget file storage:
+    'dd bs=1M count=64 if=/dev/zero of=/root/diskFile'   # 64M file storage initialized with zeros 
+
+    Load modules:
+    'insmod mv_udc.ko'
+
+    With NFS:
+    --------
+    'insmod g_file_storage.ko file=/root/diskFile use_directio=0'
+
+    With HD:
+    --------
+    'insmod g_file_storage.ko file=/root/diskFile'	
+
+Connect a USB cable from the device connector on the Orion to a Host computer.
+
+On the first connection we need to initialize the disk:
+----------------------
+ on windows :
+	    choose my computer + right_click -> manage:
+	    choose Disk management:	
+	    initialize the new Disk and create a partition on it.
+ on Linux :
+  X - storage id (a,b,c ..)  Y - partition id (1,2,..) DIR - directory name.
+  --create partition table:
+        'fdisk /dev/sdX' (check help for more info, p - display all partition
+                                                n - create a new partition (use primary)
+                                                d - delete a partition
+                                                w - write changes made to the HD)
+  --create a new FS on one of the partitions:
+        'mkfs.ext3 /dev/sdXY'
+
+  --mount one of the partitions:
+        'mkdir /root/mnt/DIR'
+        'mount /dev/sdXY /root/mnt/DIR'
+
+
+Run g_ether.ko example:
+++++
+Under the ARM FS:
+-----------------
+    Load modules:
+    'insmod mv_udc.ko'
+    'insmod g_ether.ko'
+
+    Configure USB interface:
+    'ifconfig usb0 11.4.0.1'
+
+Connect a USB cable from the device connector on the Orion to a Host computer.
+
+On Host computer:
+-----------------
+on windows :
+    choose My Network Places + right_click -> Properties
+    choose Linux USB Ethernet/RNDIS Gadget connection + right_click -> Properties
+    Configure specific IP address for this interface (e.g. 11.4.0.100)
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_btns/btns_driver.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_btns/btns_driver.c
@@ -0,0 +1,357 @@
+/*******************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+*******************************************************************************/
+#include <linux/platform_device.h>
+#include <linux/miscdevice.h>
+#include "btns_dev.h"
+#include "gpp/mvGpp.h"
+#include "btns_driver.h"
+
+
+/* MACROS */
+#define GPP_GROUP(gpp) 	gpp/32
+#define GPP_ID(gpp)   	gpp%32
+#define GPP_BIT(gpp)	0x1 << GPP_ID(gpp)
+
+/* waiting Q */
+wait_queue_head_t btns_waitq;
+
+/*
+ * common debug for all
+ */
+#undef DEBUG
+
+#ifdef DEBUG
+#define dprintk   printk
+#else
+#define dprintk(a...)
+#endif
+
+/* At GPP initialization, this strucure is filled with what       
+ * operation will be monitored for each button (Push and/or          
+ * Release) */ 
+BTN_OP 	btn_op_cfg[CONFIG_MV_GPP_MAX_PINS] = {BTN_NO_OP};
+
+/* At GPP initialization, this strucure is filled with what       
+ * operation will be monitored for each button (Push and/or          
+ * Release) */ 
+u32 	gpp_default_val_cfg[CONFIG_MV_GPP_MAX_PINS] = {-1};
+
+/* This structures monitors how many time each button was 	  
+ * Push/Released since the last time it was sampled */ 
+BTN		btns_status[CONFIG_MV_GPP_MAX_PINS];
+
+u32		is_opend = 0;
+u32		gpp_changed = 0;
+u32		gpp_changed_id = -1;
+
+
+/*
+ * Get GPP real value....
+ * When Gpp is input:
+ * Since reading GPP_DATA_IN_REG return the GPP real value after considering the active polarity
+ * active low = 1, active high = 0
+ * we will use: val^0 -> val, val^1->not(val)
+ * when output don't consider the active polarity
+ */
+static unsigned int 
+mv_gpp_value_real_get(unsigned int gpp_group, unsigned int mask)
+{
+        unsigned int temp, in_out, gpp_val;
+        /* in ->1,  out -> 0 */
+        in_out = MV_REG_READ(GPP_DATA_OUT_EN_REG(gpp_group)) & mask;
+
+	gpp_val = MV_REG_READ(GPP_DATA_IN_REG(gpp_group)) & mask;
+
+        /* outputs values */
+        temp = (gpp_val & ~in_out);
+
+        /* input */
+        temp |= (( gpp_val ^ MV_REG_READ(GPP_DATA_IN_POL_REG(gpp_group)) ) & in_out) & mask;
+
+        return temp;
+}
+
+
+static irqreturn_t
+mv_btns_handler(int irq , void *dev_id)
+{
+	u32 gpp = (u32) irq - IRQ_GPP_START;
+	u32 gpp_level, gppVal;
+	BTN_OP btn_op;
+	
+	/* get gpp real val */
+	gppVal = mv_gpp_value_real_get(GPP_GROUP(gpp), GPP_BIT(gpp));
+
+	dprintk("Gpp value was changed: ");
+        if (btn_op_cfg[gpp] != BTN_NO_OP) {
+                dprintk("gpp %d has changed. now it's %x \n",gpp,
+				mv_gpp_value_real_get(GPP_GROUP(gpp), GPP_BIT(gpp)) );
+		
+		/* Count button Pushes/Releases
+		 * mv_gpp_value_real_get == gpp_default_val_cfg[gpp] --> Button push, 
+		 * else --> Button release
+		 */
+		btn_op = (gppVal == gpp_default_val_cfg[gpp]) ? BTN_PUSH : BTN_RELEASE;
+
+		if(btn_op == BTN_RELEASE)
+		{
+			dprintk("button (of gpp %d) was released \n",gpp);
+
+			btns_status[gpp].btn_release_cntr++;
+		} else {
+			dprintk("button (of gpp %d) was pressed \n",gpp);
+			
+			btns_status[gpp].btn_push_cntr++;
+		}
+		
+                /* change polarity */
+                gpp_level = MV_REG_READ(GPP_DATA_IN_POL_REG(GPP_GROUP(gpp)));
+                gpp_level = gpp_level^GPP_BIT(gpp);
+                MV_REG_WRITE(GPP_DATA_IN_POL_REG(GPP_GROUP(gpp)), gpp_level);
+
+		/* Check if current botton operation should be monitored */
+		if(btn_op_cfg[gpp] == btn_op || btn_op_cfg[gpp] == BTN_CHANGE)
+		{
+			gpp_changed = 1;
+			gpp_changed_id = gpp;
+			wake_up_interruptible(&btns_waitq);
+		}
+	}
+
+	return IRQ_HANDLED;
+}
+
+static int
+btnsdev_ioctl(
+        struct inode *inode,
+        struct file *filp,
+        unsigned int cmd,
+        unsigned long arg)
+{
+	unsigned int btn_id;
+	BTN btn_sts;
+	BTN_PTR user_btn_sts_ptr;
+	unsigned int error = 0;
+	int i;	
+
+        dprintk("%s()\n", __FUNCTION__);
+
+        switch (cmd) {
+        case CIOCWAIT_P:
+		/* Haim - Is the condition here correct? */
+            	error = wait_event_interruptible(btns_waitq, gpp_changed);
+		/* Reset Wait Q condition */
+		gpp_changed = 0;
+
+		if(error < 0)
+			dprintk("%s(CIOCWAIT_P) - got interrupted\n", __FUNCTION__);
+		
+		/* Set information for user*/
+		btn_sts.btn_id = gpp_changed_id;
+		btn_sts.btn_push_cntr   =btns_status[gpp_changed_id].btn_push_cntr;
+		btn_sts.btn_release_cntr=btns_status[gpp_changed_id].btn_release_cntr;
+		
+		dprintk("Button ID %d was pressed %d and released %d\n",gpp_changed_id,
+			btns_status[gpp_changed_id].btn_push_cntr,btns_status[gpp_changed_id].btn_release_cntr);
+
+		user_btn_sts_ptr = &(((BTNS_STS_PTR)arg)->btns[0]);
+		if ( copy_to_user((void*)user_btn_sts_ptr, &btn_sts,  sizeof(BTN)) ) {
+                        dprintk("%s(CIOCWAIT_P) - bad copy\n", __FUNCTION__);
+                        error = EFAULT;
+                }
+
+		/* Reset changed button operations counters*/
+		btns_status[gpp_changed_id].btn_push_cntr = 0;
+		btns_status[gpp_changed_id].btn_release_cntr = 0;
+
+                break;
+	case CIOCNOWAIT_P:
+		/* Eventhough we don't monitor for a button status change, we need to 
+ 			reset the indication of a change in case it happend */
+		gpp_changed = 0;
+
+		dprintk("There are %d buttons to be checked\n", ((BTNS_STS_PTR)arg)->btns_number);
+
+		/* Set information for user*/
+		for (i=0; i<((BTNS_STS_PTR)arg)->btns_number; i++)
+		{
+			btn_id = ((BTNS_STS_PTR)arg)->btns[i].btn_id;
+
+			/* initialize temp strucure which will be copied to user */
+			btn_sts.btn_id = btn_id;
+			btn_sts.btn_push_cntr = btns_status[btn_id].btn_push_cntr;
+			btn_sts.btn_release_cntr = btns_status[btn_id].btn_release_cntr;
+
+			/* Reset button's operations counters*/
+			btns_status[btn_id].btn_push_cntr = 0;
+			btns_status[btn_id].btn_release_cntr = 0;
+
+			/* Copy temp structure to user */
+			user_btn_sts_ptr = &(((BTNS_STS_PTR)arg)->btns[i]);
+
+			if ( copy_to_user((void*)user_btn_sts_ptr, &btn_sts,  sizeof(BTN)) ) {
+				dprintk("%s(CIOCNOWAIT_P) - bad copy\n", __FUNCTION__);
+				error = EFAULT;
+			}
+		}
+		
+		break;
+        default:
+                dprintk("%s(unknown ioctl 0x%x)\n", __FUNCTION__, cmd);
+                error = EINVAL;
+                break;
+        }
+        return(-error);
+}
+
+/*
+ * btn_gpp_init
+ * initialize on button's GPP and registers its IRQ
+ *
+ */
+static int  
+btn_gpp_init(unsigned int gpp, unsigned int default_gpp_val, BTN_OP btn_op, char* btn_name)
+{
+	unsigned int pol;
+	/* Set Polarity bit */
+	pol = MV_REG_READ(GPP_DATA_IN_POL_REG(GPP_GROUP(gpp)));
+	pol |= GPP_BIT(gpp);
+	MV_REG_WRITE(GPP_DATA_IN_POL_REG(GPP_GROUP(gpp)), pol);
+	
+	/* Set which button operation should be monitored */
+	btn_op_cfg[gpp] = btn_op;
+
+	/* Set GPP default value*/
+	gpp_default_val_cfg[gpp] = default_gpp_val;
+
+	/* Register IRQ */
+	if( request_irq( IRQ_GPP_START + gpp, mv_btns_handler,
+		IRQF_DISABLED, btn_name, NULL ) ) 
+	{
+		printk( KERN_ERR "btnsdev:  can't get irq for button %s (GPP %d)\n",btn_name,gpp );
+		return -1;
+	}
+
+	return 0;
+}
+
+static int
+btnsdev_open(struct inode *inode, struct file *filp)
+{
+        dprintk("%s()\n", __FUNCTION__);
+
+	if(!is_opend) {
+		is_opend = 1;
+		
+		/* Reset button operations counters*/
+		memset(&btns_status,0,CONFIG_MV_GPP_MAX_PINS);
+	}
+
+        return(0);
+}
+
+static int
+btnsdev_release(struct inode *inode, struct file *filp)
+{
+        dprintk("%s()\n", __FUNCTION__);
+        return(0);
+}
+
+
+static struct file_operations btnsdev_fops = {
+        .open = btnsdev_open,
+        .release = btnsdev_release,
+        .ioctl = btnsdev_ioctl,
+};
+
+static struct miscdevice btnsdev = {
+        .minor = BTNSDEV_MINOR,
+        .name = "btns",
+        .fops = &btnsdev_fops,
+};
+
+
+static int 
+btns_probe(struct platform_device *pdev)
+{
+        struct btns_platform_data *btns_data = pdev->dev.platform_data;
+        int ret, i;
+	
+	dprintk("%s\n", __FUNCTION__);
+	printk(KERN_NOTICE "MV Buttons Driver Load\n");
+
+        for (i = 0; i < btns_data->btns_num; i++) {
+		ret = btn_gpp_init(btns_data->btns_data_arr[i].gpp_id, btns_data->btns_data_arr[i].default_gpp_val, 
+					btns_data->btns_data_arr[i].btn_op, btns_data->btns_data_arr[i].btn_name);
+
+		if (ret != 0) {
+			return ret;
+		}
+        }
+
+        return 0;
+}
+
+
+static struct platform_driver btns_driver = {
+	.probe          = btns_probe,
+	.driver  = {
+        	.name		= MV_BTNS_NAME,
+	},
+};
+
+
+static int __init
+btnsdev_init(void)
+{
+	int rc;
+
+	dprintk("%s\n", __FUNCTION__);
+
+	/* Initialize Wait Q*/
+	init_waitqueue_head(&btns_waitq);
+	
+	/* Register btns device */
+	if (misc_register(&btnsdev)) 
+        {
+            printk(KERN_ERR "btnsdev: registration of /dev/btnsdev failed\n");
+            return -1;
+        }
+
+	/* Register platform driver*/
+	rc = platform_driver_register(&btns_driver);
+	if (rc) {
+		printk(KERN_ERR "btnsdev: registration of platform driver failed\n");
+		return rc;
+	}
+
+        return 0;
+}
+
+static void __exit
+btnsdev_exit(void)
+{
+	dprintk("%s() should never be called.\n", __FUNCTION__);
+}
+
+module_init(btnsdev_init);
+module_exit(btnsdev_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Ronen Shitrit & Haim Boot");
+MODULE_DESCRIPTION("PH: Buttons press handling.");
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_btns/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_btns/Makefile
@@ -0,0 +1,12 @@
+#
+# Makefile for the Marvell btns Driver
+#
+ifeq ($(CONFIG_ARCH_FEROCEON_ORION),y)
+	include $(srctree)/arch/arm/mach-feroceon-orion/config/mvRules.mk
+endif
+ 
+ifeq ($(CONFIG_ARCH_FEROCEON_KW),y)
+	include $(srctree)/arch/arm/mach-feroceon-kw/config/mvRules.mk
+endif
+
+obj-y += btns_driver.o
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_btns/btns_driver.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_btns/btns_driver.h
@@ -0,0 +1,60 @@
+/*******************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+*******************************************************************************/
+
+#ifndef _BTNS_DRIVER_H_
+#define _BTNS_DRIVER_H_
+
+typedef enum
+{
+	BTN_NO_OP,
+	BTN_PUSH,
+	BTN_RELEASE,
+	BTN_CHANGE /* Both Push & Release will be monitored */
+} BTN_OP;
+
+
+typedef struct {
+        unsigned int btn_id;
+        unsigned int btn_push_cntr;
+        unsigned int btn_release_cntr;
+} BTN, *BTN_PTR;
+
+
+typedef struct {
+	unsigned int btns_number;
+        BTN* btns;
+} BTNS_STS, *BTNS_STS_PTR;
+
+#define MV_BTNS_NAME       "BTNS"
+
+
+struct btn_data {
+        unsigned int    gpp_id;
+        unsigned int    default_gpp_val;
+        BTN_OP          btn_op;
+        char            *btn_name;
+};
+
+
+/*
+ *  done against open of /dev/gpp, to get a cloned descriptor.
+ */
+#define CIOCWAIT_P       _IOWR('c', 150, BTNS_STS)
+#define CIOCNOWAIT_P     _IOWR('c', 151, BTNS_STS)
+
+
+#endif /* _BTNS_DRIVER_H_ */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_network/Kconfig
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_network/Kconfig
@@ -0,0 +1,275 @@
+
+config MV_ETHERNET
+        bool "Networking Support"
+	depends on MV_INCLUDE_GIG_ETH
+        ---help---
+        Choose this option to support Marvell Gigabit Ethernet Controller 
+
+config MV_ETH_PORTS_NUM
+	int "Number of Marvell Giga Ethernet controllers"
+	depends on MV_ETHERNET
+	default 0 
+
+if MV_ETHERNET
+
+menu "Network Interface Configuration"
+
+config  MV_ETH_0_MTU
+	int "Giga port #0 MTU value"
+	depends on (MV_ETH_PORTS_NUM != 0)
+ 	default 1500
+        ---help---
+	Default MTU value for Marvell Giga port #0
+
+config  MV_ETH_0_MACADDR
+        string "Giga port #0 MAC Address"
+        depends on (MV_ETH_PORTS_NUM != 0)
+        default "00:00:00:00:00:80"
+        ---help---
+        Default MAC address for Marvell Giga port #0 
+
+config  MV_ETH_1_MTU
+        int "Giga port #1 MTU value"
+        depends on (MV_ETH_PORTS_NUM != 0) && (MV_ETH_PORTS_NUM != 1)
+        default 1500
+        ---help---
+	Default MTU value for Marvell Giga port #1
+
+config  MV_ETH_1_MACADDR
+        string "Giga port #1 MAC Address"
+        depends on (MV_ETH_PORTS_NUM != 0) && (MV_ETH_PORTS_NUM != 1)
+        default "00:00:00:00:00:81"
+        ---help---
+        Default MAC address for Marvell Giga port #1
+
+config  MV_ETH_2_MTU
+        int "Giga port #2 MTU value"
+        depends on (MV_ETH_PORTS_NUM != 0) && (MV_ETH_PORTS_NUM != 1) && (MV_ETH_PORTS_NUM != 2)
+        default 1500
+        ---help---
+        Default MTU value for Marvell Giga port #2
+
+config  MV_ETH_2_MACADDR
+        string "Giga port #2 MAC Address"
+        depends on (MV_ETH_PORTS_NUM != 0) && (MV_ETH_PORTS_NUM != 1) && (MV_ETH_PORTS_NUM != 2)
+        default "00:00:00:00:00:82"
+        ---help---
+        Default MAC address for Marvell Giga port #2
+
+config  MV_ETH_3_MTU
+        int "Giga port #3 MTU value"
+        depends on (MV_ETH_PORTS_NUM != 0) && (MV_ETH_PORTS_NUM != 1) && (MV_ETH_PORTS_NUM != 2) && (MV_ETH_PORTS_NUM != 3)
+        default 1500
+        ---help---
+        Default MTU value for Marvell Giga port #3
+
+config  MV_ETH_3_MACADDR
+        string "Giga port #3 MAC Address"
+        depends on (MV_ETH_PORTS_NUM != 0) && (MV_ETH_PORTS_NUM != 1) && (MV_ETH_PORTS_NUM != 2) && (MV_ETH_PORTS_NUM != 3)
+        default "00:00:00:00:00:83"
+        ---help---
+        Default MAC address for Marvell Giga port #3
+
+endmenu
+endif
+
+if MV_ETHERNET
+menu "Rx/Tx Queue Configuration"
+
+config  MV_ETH_RX_Q_NUM
+        int "Number of RX queues"
+        default 1
+        ---help---
+          Multiple RX queue support.
+
+config  MV_ETH_TX_Q_NUM
+        int "Number of TX queues"
+        default 1
+        ---help---
+          Multiple TX queue support.
+
+config MV_ETH_NUM_OF_RX_DESCR
+	int "Number of Rx descriptors"
+	depends on (MV_ETH_PORTS_NUM != 0)
+	default 128
+        ---help---
+	The number of Rx descriptors in each Rx queue.
+
+config MV_ETH_NUM_OF_TX_DESCR
+	int "Number of Tx descriptors"
+	depends on (MV_ETH_PORTS_NUM != 0)
+	default 532
+        ---help---
+	The number of Tx descriptors in each Tx queue.
+
+endmenu
+endif
+
+if MV_ETHERNET
+menu "TCP/UDP Offloading"
+
+config  MV_ETH_TSO
+        bool "TSO Support for Marvell network interface"
+	default y
+        ---help---
+        Adds TSO support for TCP segmentation offload on Marvell network interface.
+
+config  MV_ETH_UFO
+        bool "UFO Support for Marvell network interface"
+        ---help---
+        Adds UFO support for transmit UDP buffers larger than MTU size on 
+        Marvell network interface.
+        UFO stands for UDP Fragmentation Offload
+
+config  MV_ETH_INET_LRO
+        bool "LRO support for Marvell network interface"
+	depends on INET_LRO
+	default n
+        ---help---
+        Adds LRO support
+
+config  MV_ETH_LRO_UDP
+        bool "LRO UDP support for Marvell network interface"
+	depends on MV_ETH_INET_LRO
+        ---help---
+        Adds LRO support for receiving large UDP datagrams on Marvell network interface.
+        LRO stands for Large Receive Offload
+
+endmenu
+endif
+
+if MV_ETHERNET
+menu "Control and Statistics"
+
+config  MV_ETH_PROC
+	bool "Support eth proc FS "
+	default y
+	---help---
+	  Use mv_eth_tool to control Marvell network interface driver.
+
+config  MV_ETH_STATS_ERROR
+        bool "Collect error statistics"
+	---help---
+	Marvell network interface driver collect minimal number of statistics. 
+	Only for error conditions. Can be displayed using mv_eth_tool.
+
+config  MV_ETH_STATS_INFO
+        bool "Collect event statistics"
+        ---help---
+	Marvell network interface driver collect event statistics. 
+	Provide more information about driver functionality and almost doesn't 
+	effect performance. Can be displayed using mv_eth_tool.
+
+config  MV_ETH_STATS_DEBUG
+        bool "Collect debug statistics"
+        ---help---
+	Marvell network interface driver collect a lot of statistics. 
+	Used for Debug mode. Decrease performance. Can be displayed using mv_eth_tool.
+
+config  MV_LINUX_COUNTERS_DISABLE
+	bool "Disable collection of SNMP statistics and Netfilter Contract statistics"
+	default n
+	---help---
+	Disable collection of SNMP statistics and Netfilter Contract statistics to improve performance.
+
+endmenu
+endif
+
+if (MV_ETHERNET)
+menu "Advanced Features"
+
+config  MV_ETH_TIMER_PERIOD
+        int "Periodical timer period"
+        default 10
+        ---help---
+          Periodical timer period for clenup in [msec].
+config  MV_SKB_HEADROOM
+        int "SKB headroom size"
+        default 16
+        ---help---
+          Customize SKB headroom size. Must be power of 2.
+
+config	MV_SKB_REUSE
+	bool "Try to reuse SKB"
+	default y
+	---help---
+	  Reuse SKB from TX to RX
+
+config  MV_ETH_NFP
+        bool "Use Network Fast Processing (NFP)"
+	default y
+        ---help---
+        Choosing this option will include NFP support in the image.
+
+config MV_ETH_NFP_AGING_TIMER
+        int "NFP aging timer interval"
+        depends on MV_ETH_NFP
+        default 15
+        ---help---
+        The NFP aging mechanism timer interval. If unsure, leave default value.
+
+config MV_ETH_NFP_NAT_SUPPORT
+        bool "Support NFP NAT"
+        depends on MV_ETH_NFP && NF_CONNTRACK_ENABLED
+        ---help---
+        Choosing this option will enable NFP NAT support.
+
+config MV_ETH_NFP_FDB_SUPPORT
+	bool "Support NFP Bridging"
+	depends on MV_ETH_NFP && BRIDGE
+	default n
+	 ---help---
+	Choosing this option will enable NFP Bridging.
+
+config  MV_NFP_STATS
+        bool "Collect NFP statistics"
+	depends on MV_ETH_NFP
+        default n
+        ---help---
+        Collect NFP statistics. Can be displayed using mv_eth_tool.
+
+endmenu
+endif
+
+config MV_GATEWAY
+        bool "Gateway support"
+	depends on MV_ETHERNET
+        ---help---
+	Choose this option to support Gigabit Ethernet Controller connected to 
+        on-board QuarterDeck switch family
+
+if MV_GATEWAY
+
+menu "Gateway Interface Configuration"
+
+config  MV_GTW_CONFIG
+	string "Network interface configuration"
+	default "(00:11:66:11:66:11,0)(00:22:77:22:77:22,1:2:3:4),mtu=1500"
+	---help---
+	 Set the network interface configuration. For each interface, define the interface 
+	 name, MAC address and participating ports, at the end (optionally) set the 
+         interfaces MTU. For example, the default configuration defines two interfaces, 
+         eth0 and eth1, and sets the MTU to 1500.
+
+endmenu
+
+menu "Gateway Features"
+
+config  MV_GTW_IGMP
+        bool "L2 IGMP Snooping support"
+        default y
+        ---help---
+          Support L2 IGMP snooping at the switch level, i.e. directing L3 routed multicast
+          stream to the specific L2 port which originally received an IGMP Join message,
+          instead of fluding all VLAN ports.
+
+config  MV_GTW_LINK_STATUS
+	bool "Link status change indications"
+	default y
+	---help---
+	  Support Phy link status change indications.
+
+endmenu
+
+endif
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_network/nfp_mgr/mv_nfp_mgr.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_network/nfp_mgr/mv_nfp_mgr.c
@@ -0,0 +1,1880 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+*******************************************************************************/
+
+/*******************************************************************************
+* mv_nfp_mgr.c - Marvell Network Fast Processing Manager
+*
+* DESCRIPTION:
+*       
+*       Supported Features:
+*
+*******************************************************************************/
+
+/* includes */
+#include "mvCommon.h"  /* Should be included before mvSysHwConfig */
+#include "mvTypes.h"
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/version.h>
+#include <linux/netdevice.h>
+#include <linux/inetdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/skbuff.h>
+#include <linux/ip.h>
+#include <linux/in.h>
+#include <linux/tcp.h>
+#include <net/route.h>
+
+#ifdef CONFIG_MV_ETH_NFP_NAT_SUPPORT
+#include <net/netfilter/nf_nat.h>
+#endif
+
+#include "mvDebug.h"
+#include "mvOs.h"
+#include "mvSysHwConfig.h"
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "eth/nfp/mvNfp.h"
+#include "mv_nfp_mgr.h"
+
+/* defines */
+#define FP_MAX_STR_SIZE		256
+#define AGING_TIMER_PERIOD	((CONFIG_MV_ETH_NFP_AGING_TIMER)*HZ) 
+
+#define MV_FTP_CTRL_PORT 21
+
+/* debug control */
+#define FP_MGR_DEBUG
+#undef FP_MGR_DEBUG
+
+#define FP_MGR_DBG_OFF		0x0000
+#define FP_MGR_DBG_INIT		0x0001
+#define FP_MGR_DBG_CLR		0x0002
+#define FP_MGR_DBG_ARP		0x0004
+#define FP_MGR_DBG_ROUTE	0x0008
+#define FP_MGR_DBG_NAT		0x0010
+#define FP_MGR_DBG_ALL		0xffff
+
+#ifdef FP_MGR_DEBUG 
+static unsigned int mv_fp_mgr_dbg = FP_MGR_DBG_ALL; 
+#define FP_MGR_DBG(FLG, X) if( (mv_fp_mgr_dbg & (FLG)) == (FLG) ) printk X
+#else
+#define FP_MGR_DBG(FLG, X)
+#endif
+
+#define MAX_MSG_SIZE		128 - 4	
+/* structure definitions */
+#ifdef CONFIG_MV_ETH_NFP_NAT_SUPPORT
+#define MASQ_TARGET_NAME	"MASQUERADE"
+#define SNAT_TARGET_NAME	"SNAT"
+#define DNAT_TARGET_NAME	"DNAT"
+#define REDIRECT_TARGET_NAME	"REDIRECT"
+
+typedef struct _fp_iptables_nat_rule
+{
+	struct _fp_iptables_nat_rule *next;
+
+	/* Relevant target names are: */
+	/* SNAT, DNAT, MASQUERADE, REDIRECT */
+	char target_name[XT_FUNCTION_MAXNAMELEN-1];
+
+	/* Relevant for SNAT/DNAT: */
+	__be32 sip, dip, smsk, dmsk;
+
+	char iniface[IFNAMSIZ], outiface[IFNAMSIZ];	
+
+	/* Protocol, 0 = ANY */
+	u_int16_t proto;
+
+} FP_IPTABLES_NAT_RULE;
+
+typedef struct _fp_user_nat_table 
+{
+	FP_IPTABLES_NAT_RULE *rule_chain;
+} FP_USER_NAT_TABLE;
+struct nat_rule_db {
+	MV_FP_NAT_RULE *rule_chain;
+	u32 max_size;
+};
+
+static struct nat_rule_db   mgr_nat_rule_db;
+#endif /* CONFIG_MV_ETH_NFP_NAT_SUPPORT */
+
+typedef struct _mv_fp_arp_rule {
+	struct _mv_fp_arp_rule *next;
+
+	int     if_index;
+	u32     ip;
+	u8      mac[MV_MAC_ADDR_SIZE];
+	int     confirmed;
+
+} MV_FP_ARP_RULE; 
+
+struct rule_db {
+	MV_FP_RULE  *rule_chain;
+	u32         max_size;
+};
+
+struct arp_rule_db {
+	MV_FP_ARP_RULE *rule_chain;
+	u32 max_size;
+};
+
+/* global variables */
+static struct rule_db       mgr_rule_db;
+static struct arp_rule_db   mgr_arp_rule_db;
+static struct timer_list    aging_timer;
+static spinlock_t	        nfp_mgr_lock;
+
+int                         fp_disable_flag = 1;
+struct map_eth_devs         *fp_eth_devs = NULL;
+#ifdef CONFIG_MV_ETH_NFP_FDB_SUPPORT
+
+struct fdb_rule_db {
+	MV_FP_FDB_RULE *rule_chain;
+	u32 max_size;	
+};
+static struct fdb_rule_db   mgr_fdb_rule_db;
+
+#endif /* CONFIG_MV_ETH_NFP_FDB_SUPPORT */
+
+#ifdef CONFIG_MV_ETH_NFP_NAT_SUPPORT
+/* we have two tables: previous and current */
+static FP_USER_NAT_TABLE    fp_user_nat_table[2];	
+/* user NAT table: 0 or 1 */
+int                         curr_table, old_table;			
+#endif /* CONFIG_MV_ETH_NFP_NAT_SUPPORT */
+
+#ifdef CONFIG_MV_ETH_NFP_DUAL
+int mgr_to_fp_chan, fp_to_mgr_chan;
+#endif /* CONFIG_MV_ETH_NFP_DUAL */
+
+static void fp_arp_rule_print(const MV_FP_ARP_RULE *rule);
+#ifdef CONFIG_MV_ETH_NFP_NAT_SUPPORT
+static int fp_nat_db_clear_and_update(void);
+#endif
+
+
+static void __exit fp_exit_module(void)
+{
+	fp_rule_db_clear();
+	fp_arp_db_clear();
+
+	if (fp_eth_devs != NULL)
+		kfree(fp_eth_devs);
+
+#ifdef CONFIG_MV_ETH_NFP_DUAL
+	mvIpcChanMsgSend(mgr_to_fp_chan, MV_SERVICE_NFP_ID, MV_FP_RULE_DB_DESTROY_OPCODE, NULL, 0);
+#else
+	mvFpRuleDbDestroy();
+#endif /* CONFIG_MV_ETH_NFP_DUAL */
+
+#ifdef CONFIG_MV_ETH_NFP_NAT_SUPPORT
+    fp_nat_db_clear();
+#ifdef CONFIG_MV_ETH_NFP_DUAL
+	mvIpcChanMsgSend(mgr_to_fp_chan, MV_SERVICE_NFP_ID, MV_FP_NAT_DB_DESTROY_OPCODE, NULL, 0);
+#else
+	mvFpNatDbDestroy();	
+#endif /* CONFIG_MV_ETH_NFP_DUAL */
+#endif /* CONFIG_MV_ETH_NFP_NAT_SUPPORT */
+
+#ifdef CONFIG_MV_ETH_NFP_FDB_SUPPORT
+	fp_fdb_db_clear();
+    mvFpFdbDestroy();
+#endif /* CONFIG_MV_ETH_NFP_FDB_SUPPORT */
+}
+
+static int is_valid_index(int if_index)
+{
+	if( (if_index < 0) || (if_index >= ETH_FP_IFINDEX_MAX) )
+	{
+		/*printk("if_index %d is OUT of RANGE\n", if_index);*/
+		return 0;
+	}
+    if( (fp_eth_devs == NULL) || 
+	    (fp_eth_devs[if_index].if_type == MV_FP_IF_INV) )
+		return 0;
+
+	return 1;
+}
+
+/* Find and return the first matching rule in the ARP Database */
+static MV_FP_ARP_RULE* fp_arp_rule_find(u32 ip)
+{
+	MV_FP_ARP_RULE  *curr_rule;
+
+	for (curr_rule = mgr_arp_rule_db.rule_chain; curr_rule != NULL; curr_rule = curr_rule->next) {
+		if (curr_rule->ip == ip) {
+			return curr_rule;
+		}
+	}
+	return NULL;
+}
+
+static MV_FP_RULE* fp_rule_find(u32 sip, u32 dip)
+{
+	MV_FP_RULE      *curr_rule;
+
+	for (curr_rule = mgr_rule_db.rule_chain; curr_rule != NULL; curr_rule = curr_rule->next) {
+		if(	(curr_rule->routingInfo.srcIp == sip) && 
+			(curr_rule->routingInfo.dstIp == dip) ) {
+				return curr_rule;
+		}
+	}
+	return NULL;
+}
+
+static int ip_in_same_network(u32 ip1, u32 ip2, u32 mask)
+{
+	if ((mask != 0) && ((ip1 & mask) == (ip2 & mask)))
+		return 1;
+	return 0;
+}
+
+
+#ifdef CONFIG_MV_ETH_NFP_NAT_SUPPORT
+
+static MV_FP_NAT_RULE* fp_nat_rule_find(u32 sip, u32 dip, u16 sport, u16 dport, u8 proto) 
+{
+	MV_FP_NAT_RULE  *curr_rule;
+
+	for (curr_rule = mgr_nat_rule_db.rule_chain; curr_rule != NULL; curr_rule = curr_rule->next) {
+		if (	curr_rule->srcIp == sip && 
+			curr_rule->dstIp == dip && 
+			curr_rule->srcPort == sport && 
+			curr_rule->dstPort == dport && 
+			curr_rule->proto == proto) {
+				return curr_rule;
+		}
+	}
+	return NULL;
+}
+
+/* Update NFP Rule "NAT awareness" according to the given iptables rule */
+static void update_awareness(FP_IPTABLES_NAT_RULE *nat_rule, MV_FP_RULE *fp_rule, int add_del_flag)
+{
+	int                 in_dev_ifindex = -1, out_dev_ifindex = -1;
+	struct net_device   *dev;
+	int                 inport_avail = 0, outport_avail = 0;	
+
+	if (!strcmp(nat_rule->target_name, MASQ_TARGET_NAME) || !strcmp(nat_rule->target_name, SNAT_TARGET_NAME)) {
+		if ((nat_rule->outiface != NULL) && strcmp(nat_rule->outiface, "")) {
+			dev = dev_get_by_name(nat_rule->outiface);
+			if (dev != NULL) {
+				out_dev_ifindex = dev->ifindex;
+			dev_put(dev);
+			}
+		
+			if (is_valid_index(out_dev_ifindex)) {
+				outport_avail = 1;
+			}
+		}
+	}
+	else if (!strcmp(nat_rule->target_name, REDIRECT_TARGET_NAME) || !strcmp(nat_rule->target_name, DNAT_TARGET_NAME)) {
+		if ((nat_rule->iniface != NULL) && strcmp(nat_rule->iniface, "")) {
+			dev = dev_get_by_name(nat_rule->iniface);
+			if (dev != NULL) {
+				in_dev_ifindex = dev->ifindex;
+			dev_put(dev);
+			}
+		
+			if (is_valid_index(in_dev_ifindex)) {
+				inport_avail = 1;
+			}
+		}
+	}
+
+	if (!strcmp(nat_rule->target_name, MASQ_TARGET_NAME) || !strcmp(nat_rule->target_name, SNAT_TARGET_NAME)) {
+		if (	(ip_in_same_network(fp_rule->routingInfo.srcIp, nat_rule->sip, nat_rule->smsk)) || 
+			(outport_avail && fp_rule->routingInfo.outIfIndex == out_dev_ifindex) ) {
+			/* update SNAT awareness */
+			if (add_del_flag) {
+				FP_MGR_DBG(FP_MGR_DBG_NAT, ("adding snat awareness\n"));
+				fp_rule->mgmtInfo.snat_aware_refcnt++;
+				fp_rule->routingInfo.aware_flags |= MV_FP_SNAT_CMD_MAP;
+			}
+			else {
+				fp_rule->mgmtInfo.snat_aware_refcnt--;
+				if (fp_rule->mgmtInfo.snat_aware_refcnt == 0) {
+					FP_MGR_DBG(FP_MGR_DBG_NAT, ("deleting snat awareness\n"));
+					fp_rule->routingInfo.aware_flags &= ~MV_FP_SNAT_CMD_MAP;	
+				}
+			}
+		}
+		if (outport_avail && fp_rule->routingInfo.inIfIndex == out_dev_ifindex) {
+			/* update DNAT awareness, because this is the reverse direction of the SNAT */
+			if (add_del_flag) {
+				FP_MGR_DBG(FP_MGR_DBG_NAT, ("adding dnat awareness\n"));
+				fp_rule->mgmtInfo.dnat_aware_refcnt++;
+				fp_rule->routingInfo.aware_flags |= MV_FP_DNAT_CMD_MAP;
+			}
+			else {
+				fp_rule->mgmtInfo.dnat_aware_refcnt--;
+				if (fp_rule->mgmtInfo.dnat_aware_refcnt == 0) {
+					FP_MGR_DBG(FP_MGR_DBG_NAT, ("deleting dnat awareness\n"));
+					fp_rule->routingInfo.aware_flags &= ~MV_FP_DNAT_CMD_MAP;
+				}	
+			}
+		}
+	}
+	else if (!strcmp(nat_rule->target_name, REDIRECT_TARGET_NAME) || !strcmp(nat_rule->target_name, DNAT_TARGET_NAME)) {
+		if (	(ip_in_same_network(fp_rule->routingInfo.dstIp, nat_rule->dip, nat_rule->dmsk)) || 
+			(inport_avail && fp_rule->routingInfo.inIfIndex == in_dev_ifindex) ) {
+			/* update DNAT awareness */
+			if (add_del_flag) {
+				FP_MGR_DBG(FP_MGR_DBG_NAT, ("adding dnat awareness\n"));
+				fp_rule->mgmtInfo.dnat_aware_refcnt++;
+				fp_rule->routingInfo.aware_flags |= MV_FP_DNAT_CMD_MAP;
+			}
+			else {
+				fp_rule->mgmtInfo.dnat_aware_refcnt--;
+				if (fp_rule->mgmtInfo.dnat_aware_refcnt == 0) {
+					FP_MGR_DBG(FP_MGR_DBG_NAT, ("deleting dnat awareness\n"));
+					fp_rule->routingInfo.aware_flags &= ~MV_FP_DNAT_CMD_MAP;
+				}
+			}
+		}
+		if (inport_avail && fp_rule->routingInfo.outIfIndex == in_dev_ifindex) {
+			/* update SNAT awareness, because this is the reverse direction of the DNAT */
+			if (add_del_flag) {
+				FP_MGR_DBG(FP_MGR_DBG_NAT, ("adding snat awareness\n"));
+				fp_rule->mgmtInfo.snat_aware_refcnt++;
+				fp_rule->routingInfo.aware_flags |= MV_FP_SNAT_CMD_MAP;
+			}
+			else {
+				fp_rule->mgmtInfo.snat_aware_refcnt--;
+				if (fp_rule->mgmtInfo.snat_aware_refcnt == 0) {
+					FP_MGR_DBG(FP_MGR_DBG_NAT, ("deleting snat awareness\n"));
+					fp_rule->routingInfo.aware_flags &= ~MV_FP_SNAT_CMD_MAP;
+				}
+			}
+		}
+	}
+}
+#endif /* CONFIG_MV_ETH_NFP_NAT_SUPPORT */
+
+/* When setting a rule, check if it needs to be aware of any currently existing user NAT rules */
+static void fp_new_rule_awareness(MV_FP_RULE *rule)
+{
+#ifdef CONFIG_MV_ETH_NFP_NAT_SUPPORT
+	FP_IPTABLES_NAT_RULE *nat_rule;
+#endif
+	rule->mgmtInfo.snat_aware_refcnt = 0;
+	rule->mgmtInfo.dnat_aware_refcnt = 0;
+	rule->routingInfo.aware_flags = 0;
+#ifdef CONFIG_MV_ETH_NFP_NAT_SUPPORT
+	nat_rule = fp_user_nat_table[1-curr_table].rule_chain;
+	while (nat_rule != NULL) {
+		update_awareness(nat_rule, rule, 1);
+		nat_rule = nat_rule->next;
+	}
+#endif /* CONFIG_MV_ETH_NFP_NAT_SUPPORT */
+}
+
+/* Clear all NFP databases and update them with the contents of */
+/* the NFP Manager databases. */
+static int fp_db_clear_and_update(void)
+{
+	int status = 0;
+	unsigned long flags;
+	MV_FP_RULE *curr_rule;
+
+#ifdef CONFIG_MV_ETH_NFP_DUAL
+	status = mvIpcChanMsgSend(mgr_to_fp_chan, MV_SERVICE_NFP_ID, MV_FP_RULE_DB_CLEAR_OPCODE, NULL, 0);
+#else
+	status = mvFpRuleDbClear();
+#endif /* CONFIG_MV_ETH_NFP_DUAL */
+
+	spin_lock_irqsave(&nfp_mgr_lock, flags);
+	curr_rule = mgr_rule_db.rule_chain;
+	while (curr_rule != NULL) { 
+		if (!is_zero_ether_addr(curr_rule->routingInfo.dstMac)) {
+			fp_new_rule_awareness(curr_rule);
+#ifdef CONFIG_MV_ETH_NFP_DUAL
+			status |= mvIpcChanMsgSend(mgr_to_fp_chan, MV_SERVICE_NFP_ID, 
+							MV_FP_RULE_SET_OPCODE, curr_rule, sizeof(MV_FP_RULE));
+#else
+			status |= mvFpRuleSet(curr_rule);
+#endif /* CONFIG_MV_ETH_NFP_DUAL */
+		}
+		curr_rule = curr_rule->next;
+	}
+	spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+
+	return status;
+}
+
+
+#ifdef CONFIG_MV_ETH_NFP_DUAL
+static void aging_timer_function(unsigned long data)
+{
+	unsigned long       flags;
+	MV_FP_ARP_RULE      *curr_arp_rule;
+	MV_FP_RULE          *curr_rule;
+	int                 rule_index = 0;
+	ARP_RULE_AGING_MSG  arp_rule_aging_msg;
+	RULE_AGING_MSG      rule_aging_msg;
+	NAT_RULE_AGING_MSG nat_rule_aging_msg;
+#ifdef CONFIG_MV_ETH_NFP_NAT_SUPPORT
+	MV_FP_NAT_RULE  *curr_nat_rule;
+#endif
+	static int          current_arp_rule_position = 0;
+	static int          current_rule_position = 0;
+	static int          current_nat_rule_position = 0;
+
+
+	/* Collect ARP information from DB */
+	spin_lock_irqsave(&nfp_mgr_lock, flags);
+
+	/* move pointer to rule to the next group of rules we want to handle */
+	for (	curr_arp_rule = mgr_arp_rule_db.rule_chain, rule_index = 0; 
+		(curr_arp_rule != NULL) && (rule_index < (current_arp_rule_position*AGING_QUANTUM)); 
+		curr_arp_rule = curr_arp_rule->next, rule_index++);
+
+	rule_index = 0;
+	memset(&arp_rule_aging_msg, 0, sizeof(ARP_RULE_AGING_MSG));
+	while ((curr_arp_rule != NULL) && (rule_index < AGING_QUANTUM)) {
+		arp_rule_aging_msg.num_tuples++;
+		arp_rule_aging_msg.info[rule_index].ip = curr_arp_rule->ip;
+		curr_arp_rule = curr_arp_rule->next;
+		rule_index++;
+	}
+	current_arp_rule_position++;
+	if( (curr_arp_rule == NULL) || 
+        ((current_arp_rule_position*AGING_QUANTUM) >= mgr_arp_rule_db.max_size))
+		current_arp_rule_position = 0; 
+
+	mvIpcChanMsgSend(mgr_to_fp_chan, MV_SERVICE_NFP_ID, 
+				MV_FP_MAX_ARP_COUNT_GET_OPCODE, &arp_rule_aging_msg, sizeof(arp_rule_aging_msg));
+
+	/* Collect routing information from DB */	
+
+	/* move pointer to rule to the next group of rules we want to handle */
+	for (	curr_rule = mgr_rule_db.rule_chain, rule_index = 0; 
+		(curr_rule != NULL) && (rule_index < (current_rule_position*AGING_QUANTUM)); 
+		curr_rule = curr_rule->next, rule_index++);
+
+	rule_index = 0;
+	memset(&rule_aging_msg, 0, sizeof(RULE_AGING_MSG));
+
+	while ((curr_rule != NULL) && (rule_index < AGING_QUANTUM)) {
+		rule_aging_msg.num_tuples++;
+		rule_aging_msg.info[rule_index].sip = curr_rule->routingInfo.srcIp;
+		rule_aging_msg.info[rule_index].dip = curr_rule->routingInfo.dstIp;
+		curr_rule = curr_rule->next;
+		rule_index++;
+	}
+	current_rule_position++;
+	if ((curr_rule == NULL) || ((current_rule_position*AGING_QUANTUM) >= mgr_rule_db.max_size))
+		current_rule_position = 0; 
+	mvIpcChanMsgSend(mgr_to_fp_chan, MV_SERVICE_NFP_ID, 
+				MV_FP_ROUTE_COUNT_GET_OPCODE, &rule_aging_msg, sizeof(rule_aging_msg));
+
+#ifdef CONFIG_MV_ETH_NFP_NAT_SUPPORT
+	/* Collect NAT information from DB */
+
+	/* move pointer to rule to the next group of rules we want to handle */
+	for (	curr_nat_rule = mgr_nat_rule_db.rule_chain, rule_index = 0; 
+		(curr_nat_rule != NULL) && (rule_index < (current_nat_rule_position*AGING_QUANTUM)); 
+		curr_nat_rule = curr_nat_rule->next, rule_index++);
+
+	rule_index = 0;
+	memset(&nat_rule_aging_msg, 0, sizeof(NAT_RULE_AGING_MSG));
+
+	while ((curr_nat_rule != NULL) && (rule_index < AGING_QUANTUM)) {
+		nat_rule_aging_msg.num_tuples++;
+		nat_rule_aging_msg.info[rule_index].sip = curr_nat_rule->srcIp;
+		nat_rule_aging_msg.info[rule_index].dip = curr_nat_rule->dstIp;
+		nat_rule_aging_msg.info[rule_index].sport = curr_nat_rule->srcPort;
+		nat_rule_aging_msg.info[rule_index].dport = curr_nat_rule->dstPort;
+		nat_rule_aging_msg.info[rule_index].proto = curr_nat_rule->proto;
+		curr_nat_rule = curr_nat_rule->next;
+		rule_index++;
+	}
+
+	current_nat_rule_position++;
+	if( (curr_nat_rule == NULL) || 
+        	( (current_nat_rule_position*AGING_QUANTUM) >= mgr_nat_rule_db.max_size) )
+			current_nat_rule_position = 0; 
+
+	mvIpcChanMsgSend(mgr_to_fp_chan, MV_SERVICE_NFP_ID, 
+				MV_FP_NAT_COUNT_GET_OPCODE, &nat_rule_aging_msg, sizeof(nat_rule_aging_msg));
+
+#endif /* CONFIG_MV_ETH_NFP_NAT_SUPPORT */
+
+  	spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+
+	aging_timer.expires = jiffies + AGING_TIMER_PERIOD;
+    	add_timer(&aging_timer);
+}
+
+#else /* not CONFIG_MV_ETH_NFP_DUAL */
+
+static void aging_timer_function(unsigned long data)
+{
+	unsigned long   flags;
+	MV_FP_ARP_RULE  *curr_arp_rule;
+	MV_FP_RULE      *curr_rule;
+#ifdef CONFIG_MV_ETH_NFP_NAT_SUPPORT
+	MV_FP_NAT_RULE  *curr_nat_rule;
+#endif
+
+    	spin_lock_irqsave(&nfp_mgr_lock, flags);
+
+	/* Collect routing information from DB */	
+	curr_rule = mgr_rule_db.rule_chain;
+	while (curr_rule != NULL) 
+    	{
+		curr_rule->mgmtInfo.new_count = mvFpRouteCountGet(curr_rule->routingInfo.srcIp, 
+						                                  curr_rule->routingInfo.dstIp);
+        	if(curr_rule->mgmtInfo.new_count != curr_rule->mgmtInfo.old_count)
+        	{
+            		/* Lookup ARP entry to confirm */
+            		curr_arp_rule = fp_arp_rule_find(curr_rule->routingInfo.srcIp);
+            		if(curr_arp_rule != NULL)
+            		{
+                		/* ARP Entry Found - confirmed */
+                		curr_arp_rule->confirmed = 1;
+            		}
+            		else
+            		{
+                		/* ARP Entry Not Found - Confirm default gateway for incoming interface */
+                		curr_arp_rule = fp_arp_rule_find(fp_eth_devs[curr_rule->routingInfo.inIfIndex].def_gtw_ip);
+                		if(curr_arp_rule != NULL)
+                		{
+                    			curr_arp_rule->confirmed = 1;
+                		}       		
+            		}
+        	}
+		curr_rule = curr_rule->next;
+	}
+
+#ifdef CONFIG_MV_ETH_NFP_NAT_SUPPORT
+	/* Collect NAT information from DB */
+	curr_nat_rule = mgr_nat_rule_db.rule_chain;
+	while (curr_nat_rule != NULL) 
+    	{
+		curr_nat_rule->new_count = mvFpNatCountGet(curr_nat_rule->srcIp, 
+						                           curr_nat_rule->dstIp, 
+						                           curr_nat_rule->srcPort, 
+						                           curr_nat_rule->dstPort, 
+						                           curr_nat_rule->proto);
+		curr_nat_rule = curr_nat_rule->next;
+	}
+#endif /* CONFIG_MV_ETH_NFP_NAT_SUPPORT */
+	spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+
+	aging_timer.expires = jiffies + AGING_TIMER_PERIOD;
+   	add_timer(&aging_timer);
+}
+#endif /* CONFIG_MV_ETH_NFP_DUAL */
+
+/* Return ARP rule confirmation status */
+int fp_is_arp_confirmed(u32 ip, const u8 *mac)
+{
+	unsigned long   flags;
+	MV_FP_ARP_RULE  *curr_rule;
+    	int             confirmed;
+
+	if (fp_disable_flag == 1)
+		return 0;
+
+	spin_lock_irqsave(&nfp_mgr_lock, flags);
+	curr_rule = mgr_arp_rule_db.rule_chain;
+	while (curr_rule != NULL) {
+		if( (curr_rule->ip == ip) && (memcmp(curr_rule->mac, mac, MV_MAC_ADDR_SIZE) == 0) ) 
+        	{
+            		confirmed = curr_rule->confirmed;
+            		curr_rule->confirmed = 0;
+			spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+			return confirmed;
+		}
+		curr_rule = curr_rule->next;
+	}
+	spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+	return 0;
+}
+
+/* Return routing rule confirmation status */
+int fp_is_route_confirmed(u32 src_ip, u32 dst_ip)
+{
+	unsigned long   flags;
+	MV_FP_RULE      *curr_rule;
+    	int             confirmed = 0;
+
+	if (fp_disable_flag == 1)
+		return 0;
+
+	spin_lock_irqsave(&nfp_mgr_lock, flags);
+	curr_rule = mgr_rule_db.rule_chain;
+	while (curr_rule != NULL) {
+		if( (curr_rule->routingInfo.srcIp == src_ip) && 
+			(curr_rule->routingInfo.dstIp == dst_ip) ) 
+        	{
+            		if(curr_rule->mgmtInfo.new_count != curr_rule->mgmtInfo.old_count)
+            		{
+                		confirmed = 1;
+                		curr_rule->mgmtInfo.old_count = curr_rule->mgmtInfo.new_count;
+            		}
+			spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+			return confirmed;
+		}
+		curr_rule = curr_rule->next;
+	}
+	spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+	return 0;
+}
+
+#ifdef CONFIG_MV_ETH_NFP_DUAL
+void fp_rcv_info_msg(int from_cpu, u16 opcode, void* p_msg, u8 size)
+{
+	int                 i = 0;
+	ARP_RULE_AGING_MSG  *arp_rule_aging_msg;
+	RULE_AGING_MSG      *rule_aging_msg;
+	NAT_RULE_AGING_MSG  *nat_rule_aging_msg;
+	MV_FP_ARP_RULE      *curr_arp_rule;
+	MV_FP_RULE          *curr_rule;
+	MV_FP_NAT_RULE      *curr_nat_rule;
+
+	switch(opcode)
+	{
+		case MV_FP_MAX_ARP_COUNT_REPLY_OPCODE:
+			arp_rule_aging_msg = (ARP_RULE_AGING_MSG *)p_msg;
+			for (i = 0; i < arp_rule_aging_msg->num_tuples; i++) {
+				curr_arp_rule = fp_arp_rule_find(arp_rule_aging_msg->info[i].ip);
+				if (curr_arp_rule != NULL)
+					fp_update_arp_rule_aging(curr_arp_rule, arp_rule_aging_msg->info[i].count);
+			}
+			break;
+		case MV_FP_ROUTE_COUNT_REPLY_OPCODE:
+			rule_aging_msg = (RULE_AGING_MSG *)p_msg;
+			for (i = 0; i < rule_aging_msg->num_tuples; i++) {
+				curr_rule = fp_rule_find(rule_aging_msg->info[i].sip, 
+							rule_aging_msg->info[i].dip);
+				if (curr_rule != NULL) 
+					fp_update_rule_aging(curr_rule, rule_aging_msg->info[i].count);
+			}
+			break;
+		case MV_FP_NAT_COUNT_REPLY_OPCODE:
+			nat_rule_aging_msg = (NAT_RULE_AGING_MSG *)p_msg;
+			for (i = 0; i < nat_rule_aging_msg->num_tuples; i++) {
+				curr_nat_rule = fp_nat_rule_find(nat_rule_aging_msg->info[i].sip, 
+								nat_rule_aging_msg->info[i].dip, 
+								nat_rule_aging_msg->info[i].sport, 
+								nat_rule_aging_msg->info[i].dport, 
+								nat_rule_aging_msg->info[i].proto);
+				if (curr_nat_rule != NULL) 
+					fp_update_nat_rule_aging(curr_nat_rule, nat_rule_aging_msg->info[i].count);
+			}
+			break;
+		default:
+			printk("fp_rcv_info_msg: unknown message type\n"); 
+			break;
+	}
+}
+#endif /* CONFIG_MV_ETH_NFP_DUAL */
+
+/* Initialize NFP Manager */
+int fp_mgr_init(void)
+{
+	int i = 0;
+#ifdef CONFIG_MV_ETH_NFP_DUAL
+	int                 status = 0;
+	MV_FP_INIT_STRUCT   fpdb_init_struct;
+#endif /* CONFIG_MV_ETH_NFP_DUAL */
+
+    fp_disable_flag = 1;
+
+	fp_eth_devs = kmalloc((ETH_FP_IFINDEX_MAX * sizeof(struct map_eth_devs)), GFP_ATOMIC);
+	if (fp_eth_devs == NULL)
+		return -ENOMEM;
+
+	for (i = 0; i < ETH_FP_IFINDEX_MAX; i++) {
+		fp_eth_devs[i].if_type = MV_FP_IF_INV;
+        	fp_eth_devs[i].dev = NULL;
+        	fp_eth_devs[i].def_gtw_ip = 0;
+	}
+  	spin_lock_init(&nfp_mgr_lock);
+
+	memset(&aging_timer, 0, sizeof(struct timer_list));
+	init_timer(&aging_timer);
+    aging_timer.function = aging_timer_function;
+    aging_timer.data = -1;
+	aging_timer.expires = jiffies + AGING_TIMER_PERIOD;
+
+#ifdef CONFIG_MV_ETH_NFP_DUAL
+	mgr_to_fp_chan = mvIpcChanCreate(MV_IPC_HOST_ID, MV_IPC_COPROCESSOR_ID,
+                                        MV_IPC_RX_CB_MODE, MAX_MSG_SIZE, 64 /*mgr_rule_db.max_size*/);
+ 
+	fp_to_mgr_chan = mvIpcChanCreate(MV_IPC_COPROCESSOR_ID, MV_IPC_HOST_ID, 
+                                        MV_IPC_RX_CB_MODE, MAX_MSG_SIZE, 64 /*mgr_rule_db.max_size*/);
+
+	status = mvIpcChanRcvCbSet(fp_to_mgr_chan, fp_rcv_info_msg);
+	if ((status != 0) || (mgr_to_fp_chan < 0) || (fp_to_mgr_chan < 0))
+        {
+		printk("fp_mgr_init: Error setting up IPC channels\n");
+		return status;
+        }
+
+	/* Connect Channel Dispatch function */
+	mvIpcDbConnect(mvIpcChanDoorbellGet(fp_to_mgr_chan), mvIpcChanDispatchIsr, (void*)fp_to_mgr_chan);
+	/* Enable Doorbell interrupt */
+	MV_IPC_DOORBELL_ENABLE(MV_IPC_HOST_ID, mvIpcChanDoorbellGet(fp_to_mgr_chan));
+
+	memset(&fpdb_init_struct, 0, sizeof(MV_FP_INIT_STRUCT));
+	fpdb_init_struct.mgr_to_fp_chan = mgr_to_fp_chan;
+	fpdb_init_struct.fp_to_mgr_chan = fp_to_mgr_chan;
+	fpdb_init_struct.rule_db_size = mgr_rule_db.max_size;
+	status = mvIpcChanMsgSend(	mvIpcTxSharedChanGet(MV_IPC_COPROCESSOR_ID), 
+					MV_SERVICE_NFP_ID, MV_FP_RULE_DB_INIT_OPCODE,
+					&fpdb_init_struct, sizeof(MV_FP_INIT_STRUCT));
+	if (status != 0) 
+	{
+		printk("fp_mgr_init: Error sending NFP initialization message\n");
+		return status;
+	}
+	return 0;
+#else
+	/* Note at this stage the Manager DB is already initialized so mgr_rule_db.max_size is set */
+	mvFpRuleDbInit(mgr_rule_db.max_size);
+#endif /* CONFIG_MV_ETH_NFP_DUAL */
+
+    return 0;
+}
+
+/* Register a network interface that works with NFP */
+int fp_mgr_if_register(	int if_index, MV_FP_IF_TYPE if_type, 
+			            struct net_device* dev)
+{
+	/* sanity checks */
+	if( (fp_eth_devs == NULL) || 
+	    (if_index < 0) || (if_index >= ETH_FP_IFINDEX_MAX) )
+		return -1;
+
+	fp_eth_devs[if_index].dev = dev;
+	fp_eth_devs[if_index].if_type = if_type;
+
+	return 0;
+}
+
+int fp_mgr_if_unregister(int if_index)
+{
+	if ( (fp_eth_devs == NULL) || 
+		(if_index < 0) || 
+		(if_index >= ETH_FP_IFINDEX_MAX))
+		return -1;
+
+	memset(&fp_eth_devs[if_index], 0, sizeof(struct map_eth_devs));
+	return 0;
+}
+
+/* This function is called when user-space tool disables NFP */
+/* All databases are cleared, and learning of new rules is disabled	*/
+/* for all types of rules: static, dynamic, arp, routing etc.		*/
+void fp_mgr_disable(void)
+{
+	if (fp_disable_flag == 0) {
+		fp_disable_flag = 1;
+		del_timer(&aging_timer);
+	}
+	printk("Network Fast Processing Disabled\n");
+}
+
+/* This function is called when user-space tool enables NFP */
+int fp_mgr_enable(void)
+{
+	int status;
+
+	if (fp_disable_flag == 1) {
+		fp_disable_flag = 0;
+		status = fp_db_clear_and_update();
+
+#ifdef CONFIG_MV_ETH_NFP_NAT_SUPPORT
+        status |= fp_nat_db_clear_and_update();
+#endif /* CONFIG_MV_ETH_NFP_NAT_SUPPORT */
+		aging_timer.expires = jiffies + AGING_TIMER_PERIOD;
+		add_timer(&aging_timer);
+		printk("Network Fast Processing Enabled\n");
+		return status;
+	}
+	printk("Network Fast Processing Enabled\n");
+	return 0;
+}
+
+/* This function is called when user-space tool asks about NFP status (enabled/disabled) */
+int fp_mgr_status(void)
+{
+	if (fp_disable_flag == 0)
+		printk("Network Fast Processing is currently Enabled\n");
+	else
+		printk("Network Fast Processing is currently Disabled\n");
+
+	return 0;
+}
+
+/* Initialize NFP Rule Database (Routing + ARP information table) */
+int fp_rule_db_init(u32 db_size)
+{
+	FP_MGR_DBG(FP_MGR_DBG_INIT, ("FP_MGR: Initializing Rule Database\n"));
+	mgr_rule_db.rule_chain = NULL;
+	mgr_rule_db.max_size = db_size;
+	/* Initialization of the NFP HAL Database is called from fp_mgr_init */
+	return 0;
+}
+ 
+/* Initialize NFP Manager ARP Database */
+int fp_arp_db_init(u32 db_size)
+{
+	FP_MGR_DBG(FP_MGR_DBG_INIT, ("FP_MGR: Initializing ARP Rule Database\n"));
+	mgr_arp_rule_db.rule_chain = NULL;
+	mgr_arp_rule_db.max_size = db_size;
+	return 0;
+}
+
+/* Clear NFP Rule Database (Routing + ARP information table) */
+int fp_rule_db_clear(void)
+{
+	int status = 0;
+	unsigned long flags;
+	MV_FP_RULE *curr_rule;
+	MV_FP_RULE *tmp_rule;
+
+	FP_MGR_DBG(FP_MGR_DBG_CLR, ("FP_MGR: Clearing Rule Database\n"));
+	spin_lock_irqsave(&nfp_mgr_lock, flags);
+	curr_rule = mgr_rule_db.rule_chain;
+	while (curr_rule != NULL) {
+		tmp_rule = curr_rule;
+		curr_rule = curr_rule->next;
+		kfree(tmp_rule);
+	}
+	mgr_rule_db.rule_chain = NULL;
+
+#ifdef CONFIG_MV_ETH_NFP_DUAL
+	status = mvIpcChanMsgSend(mgr_to_fp_chan, MV_SERVICE_NFP_ID, MV_FP_RULE_DB_CLEAR_OPCODE, NULL, 0);
+#else
+	status = mvFpRuleDbClear();
+#endif /* CONFIG_MV_ETH_NFP_DUAL */
+
+	spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+	return status;
+}
+
+/* Clear NFP Manager ARP Database */
+int fp_arp_db_clear(void)
+{
+	unsigned long   flags;
+	MV_FP_ARP_RULE  *curr_rule;
+	MV_FP_ARP_RULE  *tmp_rule;
+
+	FP_MGR_DBG(FP_MGR_DBG_CLR, ("FP_MGR: Clearing ARP Rule Database\n"));
+	spin_lock_irqsave(&nfp_mgr_lock, flags);
+	curr_rule = mgr_arp_rule_db.rule_chain;
+	while (curr_rule != NULL) {
+		tmp_rule = curr_rule;
+		curr_rule = curr_rule->next;
+		kfree(tmp_rule);
+	}
+	mgr_arp_rule_db.rule_chain = NULL;
+	spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+	return 0;
+}
+
+/* Print NFP Rule Database (Routing + ARP information table) */
+int fp_rule_db_print(MV_FP_OP_TYPE op)
+{
+	int             status = 0;
+	unsigned long   flags;
+	MV_FP_RULE      *curr_rule;
+
+	spin_lock_irqsave(&nfp_mgr_lock, flags);
+	if (op == MV_FP_MANAGER) {
+		printk("Printing NFP Manager Rule Database: \n");
+		curr_rule = mgr_rule_db.rule_chain;
+		while (curr_rule != NULL) { 
+			mvFpRulePrint(curr_rule);
+			curr_rule = curr_rule->next;
+		}
+	}
+	else {
+#ifdef CONFIG_MV_ETH_NFP_DUAL
+		status = mvIpcChanMsgSend(mgr_to_fp_chan, MV_SERVICE_NFP_ID, MV_FP_RULE_DB_PRINT_OPCODE, NULL, 0);
+#else
+		status = mvFpRuleDbPrint();
+#endif /* CONFIG_MV_ETH_NFP_DUAL */
+	}
+	spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+	return status;
+}
+
+/* Print ARP Rule */
+static void fp_arp_rule_print(const MV_FP_ARP_RULE *rule)
+{
+	printk("ARP Rule: ");
+	printk("IP = %u.%u.%u.%u, ", NIPQUAD(rule->ip));
+	printk("MAC = %02X:%02X:%02X:%02X:%02X:%02X\n", rule->mac[0], rule->mac[1], rule->mac[2], 
+							rule->mac[3], rule->mac[4], rule->mac[5]);
+}
+
+/* Print NFP Manager ARP Database */
+int fp_arp_db_print(void)
+{
+	unsigned long   flags;
+	MV_FP_ARP_RULE  *curr_rule;
+
+	spin_lock_irqsave(&nfp_mgr_lock, flags);
+	printk("Printing NFP Manager ARP Rule Database: \n");
+	curr_rule = mgr_arp_rule_db.rule_chain;
+	while (curr_rule != NULL) {
+		fp_arp_rule_print(curr_rule);
+		curr_rule = curr_rule->next;
+	}
+	spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+	return 0;
+}
+
+/* Copy 6 bytes. Warning - doesn't perform any checks on memory, just copies */
+static inline void mac_addr_copy(u8 *dst, const u8 *src)
+{
+	dst[0] = src[0];
+	dst[1] = src[1];
+	dst[2] = src[2];
+	dst[3] = src[3];
+	dst[4] = src[4];
+	dst[5] = src[5];
+}
+
+/* Update the Routing + ARP database with new ARP information: */
+/* Go over the database and update the destination MAC address */
+/* for each entry with a matching default gateway IP address.  */
+static int fp_rule_db_arp_update(u32 ip, const u8 *mac)
+{
+	int             status = 0;
+	unsigned long   flags;
+	MV_FP_RULE      *curr_rule;
+
+	spin_lock_irqsave(&nfp_mgr_lock, flags);
+	for (curr_rule = mgr_rule_db.rule_chain; curr_rule != NULL; curr_rule = curr_rule->next) 
+    	{
+		if(	(curr_rule->routingInfo.defGtwIp == ip) && 
+			(curr_rule->mgmtInfo.ruleType != MV_FP_STATIC_RULE)) 
+        	{
+			mac_addr_copy(curr_rule->routingInfo.dstMac, mac);
+			if (!is_zero_ether_addr(mac)) 
+            		{
+				/* Now we have a full rule - we can update the NFP database */
+				fp_new_rule_awareness(curr_rule);
+#ifdef CONFIG_MV_ETH_NFP_DUAL
+				status |= mvIpcChanMsgSend(mgr_to_fp_chan, MV_SERVICE_NFP_ID, 
+						MV_FP_RULE_SET_OPCODE, curr_rule, sizeof(MV_FP_RULE));
+#else
+				status |= mvFpRuleSet(curr_rule);
+#endif /* CONFIG_MV_ETH_NFP_DUAL */
+			}
+			else
+            		{
+#ifdef CONFIG_MV_ETH_NFP_DUAL
+				status |= mvIpcChanMsgSend(mgr_to_fp_chan, MV_SERVICE_NFP_ID, 
+						MV_FP_RULE_DELETE_OPCODE, curr_rule, sizeof(MV_FP_RULE));
+#else
+				status |= mvFpRuleDelete(curr_rule);
+#endif /* CONFIG_MV_ETH_NFP_DUAL */
+            		}
+		}
+	}
+	spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+	return status;
+}
+
+/* Set ARP information in the ARP database, and update the Routing + ARP database if necessary */
+/* If we have a complete rule, update the NFP database */
+int fp_arp_info_set(int if_index, u32 ip, const u8 *mac)
+{
+	unsigned long   flags;
+	MV_FP_ARP_RULE  *curr_rule;
+	MV_FP_ARP_RULE  *new_rule;
+
+    	if(!is_valid_index(if_index))
+        	return 0;
+
+	FP_MGR_DBG(FP_MGR_DBG_ARP, ("nfp_mgr Set ARP: if=%d, IP=%u.%u.%u.%u, MAC=%02X:%02X:%02X:%02X:%02X:%02X\n",
+                                if_index, NIPQUAD(ip), mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]));
+
+	spin_lock_irqsave(&nfp_mgr_lock, flags);
+	for (curr_rule = mgr_arp_rule_db.rule_chain; curr_rule != NULL; curr_rule = curr_rule->next) {
+		if (curr_rule->ip == ip) {
+			/* We've found a match with an existing entry. Let's update it */
+			mac_addr_copy(curr_rule->mac, mac);
+			curr_rule->confirmed = 1;
+			spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+			return fp_rule_db_arp_update(ip, mac);
+		}
+	}
+	/* We haven't found a matching existing entry. Let's add a new one */
+	new_rule = kmalloc(sizeof(MV_FP_ARP_RULE), GFP_ATOMIC);
+	if (new_rule == NULL) {
+		spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+		return -ENOMEM;
+	}
+	new_rule->ip = ip;
+	mac_addr_copy(new_rule->mac, mac);
+	new_rule->confirmed = 1;
+    	new_rule->if_index = if_index;
+	new_rule->next = NULL;
+	
+	if (mgr_arp_rule_db.rule_chain == NULL) {
+		/* There is no rule in this table yet */
+		mgr_arp_rule_db.rule_chain = new_rule;
+	}
+	else {
+		/* Let's add this rule at the tail of the list */
+		curr_rule = mgr_arp_rule_db.rule_chain;
+		while (curr_rule->next != NULL)
+			curr_rule = curr_rule->next;
+		
+		curr_rule->next = new_rule;		
+	}
+	spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+	return fp_rule_db_arp_update(ip, mac);
+}
+
+/* Delete ARP information from the ARP database, and update the Routing + ARP database if necessary */
+/* If a rule became incomplete, update the NFP database */
+int fp_arp_info_delete(u32 ip)
+{
+	unsigned long   flags;
+	MV_FP_ARP_RULE  *curr_rule;
+	MV_FP_ARP_RULE  *prev_rule;
+	u8              mac[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
+
+	spin_lock_irqsave(&nfp_mgr_lock, flags);
+
+	prev_rule = NULL;	
+	for (	curr_rule = mgr_arp_rule_db.rule_chain; 
+		curr_rule != NULL; 
+		prev_rule = curr_rule, curr_rule = curr_rule->next) {
+		if (curr_rule->ip == ip) {
+			/* Note there should only be one matching entry for this IP address */
+			if (prev_rule == NULL)
+				mgr_arp_rule_db.rule_chain = curr_rule->next;	
+			else
+				prev_rule->next = curr_rule->next;
+			kfree(curr_rule);
+			spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+
+            		FP_MGR_DBG(FP_MGR_DBG_ARP, 
+                		("nfp_mgr: ARP delete: IP=%u.%u.%u.%u, MAC=%02X:%02X:%02X:%02X:%02X:%02X\n",
+                        	NIPQUAD(ip), mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]));
+
+			return fp_rule_db_arp_update(ip, mac);
+		}
+	}
+	/* We haven't found a matching entry, so nothing to do */
+	spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+	return 0;
+}
+
+/* Set a new rule or update an existing one  */
+/* When looking for an existing rule, search */
+/* a match for SIP, DIP, and default gateway IP */
+/* Rule type is also taken into account: */
+/* a new static rule can overrode an existing rule of any type, */
+/* while a new dynamic rule can only override an existing dynamic rule */
+int fp_rule_set(MV_FP_RULE *rule)
+{
+	unsigned long   flags;
+	MV_FP_RULE      *curr_rule;
+	MV_FP_RULE      *new_rule;
+	int             status = 0;
+
+	/* Static rules are supplied with GbE port numbers, while */
+	/* dynamic rules are supplied with Linux interface indices. */
+	if (rule->mgmtInfo.ruleType == MV_FP_DYNAMIC_RULE) {
+		struct net_device   *in_dev, *out_dev;
+
+		/* We are not interested in this rule if the input interface or */
+		/* the output interface is not one of our GbE interfaces.	*/
+		if( !(is_valid_index(rule->routingInfo.inIfIndex)) || 
+            	    !(is_valid_index(rule->routingInfo.outIfIndex)) )
+			return 0;
+
+		in_dev = dev_get_by_index(&init_net, rule->routingInfo.inIfIndex);
+		out_dev = dev_get_by_index(&init_net, rule->routingInfo.outIfIndex);
+		if ( (in_dev != NULL) && (out_dev != NULL) )
+		{
+			/* We are not interested in this rule if the MTU of the */
+			/* output interface is different from the MTU of the input interface */
+			/* We also don't support NFP rules if the MTU of the outgoing interface is too big, */
+			/* becasue HW doesn't calculate checksum. */
+			if (	(in_dev->mtu != out_dev->mtu) || 
+				(out_dev->mtu > ETH_CSUM_MAX_BYTE_COUNT) )
+			{
+				dev_put(in_dev);
+				dev_put(out_dev);
+				return 0;
+			}
+		}
+		if (in_dev != NULL)
+			dev_put(in_dev);
+		if (out_dev != NULL)
+		dev_put(out_dev);
+	}
+
+	spin_lock_irqsave(&nfp_mgr_lock, flags);
+    	curr_rule = fp_rule_find(rule->routingInfo.srcIp, rule->routingInfo.dstIp);
+    	if(curr_rule != NULL)
+    	{
+        	if( (curr_rule->mgmtInfo.ruleType == MV_FP_DYNAMIC_RULE) || 
+	        	(rule->mgmtInfo.ruleType == MV_FP_STATIC_RULE) ) 
+        	{
+	        	/* Update existing rule, but only if the current rule is a dynamic rule, */
+	        	/* or the new rule is a static rule which overrides the current rule. */		
+	        	mvFpRuleCopy(curr_rule, rule);
+
+	        	if (!is_zero_ether_addr(curr_rule->routingInfo.dstMac)) {
+		        	/* Now we have a full rule - we can update the NFP database */
+		        	fp_new_rule_awareness(curr_rule);
+#ifdef CONFIG_MV_ETH_NFP_DUAL
+			    	status = mvIpcChanMsgSend(mgr_to_fp_chan, MV_SERVICE_NFP_ID, 
+			                        MV_FP_RULE_SET_OPCODE, curr_rule, sizeof(MV_FP_RULE));
+#else
+			    	status = mvFpRuleSet(curr_rule);
+#endif /* CONFIG_MV_ETH_NFP_DUAL */
+		    	}
+	    	}
+        	/* else, we have found a matching entry, but the current rule is static and */
+	    	/* the new rule is dynamic, so static rule remains unchanged, and we can exit here. */
+	    	spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+	    	return status;
+    	}
+	/* We haven't found a matching existing entry. Let's add a new one */
+	new_rule = kmalloc(sizeof(MV_FP_RULE), GFP_ATOMIC);
+	if (new_rule == NULL) {
+		spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+		return -ENOMEM;
+	}
+	mvFpRuleCopy(new_rule, rule);	
+	new_rule->next = NULL;
+
+	if (mgr_rule_db.rule_chain == NULL) {
+		/* There is no rule in this table yet */
+		mgr_rule_db.rule_chain = new_rule;
+	}
+	else {
+		/* Let's add this rule at the tail of the list */
+		curr_rule = mgr_rule_db.rule_chain;		
+		while (curr_rule->next != NULL)
+			curr_rule = curr_rule->next;
+		curr_rule->next = new_rule;		
+	}
+	if (!is_zero_ether_addr(new_rule->routingInfo.dstMac)) {
+		/* Now we have a full rule - we can update the the NFP database */
+		fp_new_rule_awareness(new_rule);
+#ifdef CONFIG_MV_ETH_NFP_DUAL
+		status = mvIpcChanMsgSend(mgr_to_fp_chan, MV_SERVICE_NFP_ID, 
+				MV_FP_RULE_SET_OPCODE, new_rule, sizeof(MV_FP_RULE));
+#else
+		status = mvFpRuleSet(new_rule);
+#endif /* CONFIG_MV_ETH_NFP_DUAL */
+	}
+	spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+	return status;
+}
+
+/* Delete an existing rule */
+/* When looking for an existing rule, search */
+/* a match for SIP, DIP */
+int fp_rule_delete(u32 src_ip, u32 dst_ip, MV_FP_RULE_TYPE rule_type)
+{
+	unsigned long   flags;
+	MV_FP_RULE      *curr_rule;
+	MV_FP_RULE      *prev_rule;
+	int             status = 0;
+
+	spin_lock_irqsave(&nfp_mgr_lock, flags);
+	prev_rule = NULL;	
+
+	for(curr_rule = mgr_rule_db.rule_chain; 
+		curr_rule != NULL; 
+		prev_rule = curr_rule, curr_rule = curr_rule->next) {
+		if( (curr_rule->routingInfo.srcIp == src_ip) && 
+			(curr_rule->routingInfo.dstIp == dst_ip) && 
+			(curr_rule->mgmtInfo.ruleType == rule_type) ) {
+			/* Note there should only be one matching entry, if any */
+			if (prev_rule == NULL) {
+				mgr_rule_db.rule_chain = curr_rule->next;
+			}
+			else {
+				prev_rule->next = curr_rule->next;
+			}
+#ifdef CONFIG_MV_ETH_NFP_DUAL
+			status = mvIpcChanMsgSend(mgr_to_fp_chan, MV_SERVICE_NFP_ID, 
+						MV_FP_RULE_DELETE_OPCODE, curr_rule, sizeof(MV_FP_RULE));
+#else
+			status = mvFpRuleDelete(curr_rule);
+#endif /* CONFIG_MV_ETH_NFP_DUAL */
+			kfree(curr_rule);
+			spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+			return status;
+		}
+	}
+	/* We haven't found a matching entry, so nothing to do */
+	spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+	return 0;
+}
+
+/* Set Routing information received from the IP stack when a new Routing cache entry is created */
+/* Look for matching ARP information to complete the rule */
+/* If we have a complete rule, update the NFP database */
+int fp_routing_info_set(u32 src_ip, u32 dst_ip, u32 def_gtw_ip, int ingress_if, int egress_if)
+{
+	MV_FP_RULE          new_rule;
+	MV_FP_ARP_RULE      *arp_rule;
+	struct net_device   *dev;
+	u8                  invalid_mac[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
+
+	FP_MGR_DBG(FP_MGR_DBG_ROUTE, ("FP_MGR: Setting Routing Information\n"));
+	FP_MGR_DBG(FP_MGR_DBG_ROUTE, 
+			("SIP = %u.%u.%u.%u, DIP = %u.%u.%u.%u, GTW = %u.%u.%u.%u, In IF = %d, Out IF = %d\n", 
+			NIPQUAD(src_ip), NIPQUAD(dst_ip), 
+			NIPQUAD(def_gtw_ip), ingress_if, egress_if));
+
+	new_rule.mgmtInfo.actionType = MV_FP_ROUTE_CMD;
+	new_rule.mgmtInfo.new_count = 0;
+	new_rule.mgmtInfo.old_count = 0;
+	new_rule.mgmtInfo.ruleType = MV_FP_DYNAMIC_RULE; 
+
+	new_rule.routingInfo.srcIp = src_ip;
+	new_rule.routingInfo.dstIp = dst_ip;
+	new_rule.routingInfo.defGtwIp = def_gtw_ip;
+	
+	dev = dev_get_by_index(&init_net, egress_if);
+	if (dev != NULL) { 
+		mac_addr_copy(new_rule.routingInfo.srcMac, dev->dev_addr);
+		dev_put(dev);
+	}
+	else /* Should never happen */
+		mac_addr_copy(new_rule.routingInfo.srcMac, invalid_mac);
+
+    	fp_eth_devs[egress_if].def_gtw_ip = def_gtw_ip;
+
+	/* Note: searching destination MAC according to default gateway IP */
+	if ((arp_rule = fp_arp_rule_find(def_gtw_ip)) != NULL) 
+		mac_addr_copy(new_rule.routingInfo.dstMac, arp_rule->mac);
+	else 
+		mac_addr_copy(new_rule.routingInfo.dstMac, invalid_mac);
+
+	new_rule.routingInfo.inIfIndex = ingress_if;
+	new_rule.routingInfo.outIfIndex = egress_if;
+	new_rule.next = NULL;
+	return fp_rule_set(&new_rule);
+}
+
+/* Delete Routing information from the Routing + ARP database, and update the NFP database */
+int fp_routing_info_delete(u32 src_ip, u32 dst_ip)
+{
+	FP_MGR_DBG(FP_MGR_DBG_ROUTE, ("FP_MGR: Deleting Routing Information\n"));
+	FP_MGR_DBG(FP_MGR_DBG_ROUTE, (	"SIP = %u.%u.%u.%u, DIP = %u.%u.%u.%u\n", 
+					NIPQUAD(src_ip), NIPQUAD(dst_ip)));
+	return fp_rule_delete(src_ip, dst_ip, MV_FP_DYNAMIC_RULE);
+}
+
+#ifdef CONFIG_MV_ETH_NFP_NAT_SUPPORT
+
+/* Initialize NFP NAT Rule Database (SNAT + DNAT table) */
+int fp_nat_db_init(u32 db_size)
+{
+	FP_MGR_DBG(FP_MGR_DBG_INIT, ("FP_MGR: Initializing NAT Rule Database\n"));
+	mgr_nat_rule_db.rule_chain = NULL;
+	mgr_nat_rule_db.max_size = db_size;
+
+#ifdef CONFIG_MV_ETH_NFP_DUAL
+	return mvIpcChanMsgSend(mgr_to_fp_chan, MV_SERVICE_NFP_ID, MV_FP_NAT_DB_INIT_OPCODE, 
+				&(mgr_nat_rule_db.max_size), sizeof(mgr_nat_rule_db.max_size));
+#else
+	return mvFpNatDbInit(mgr_nat_rule_db.max_size);
+#endif /* CONFIG_MV_ETH_NFP_DUAL */
+}
+
+/* Clear NFP NAT Rule Database (SNAT + DNAT table) */
+int fp_nat_db_clear(void)
+{
+	int             status = 0;
+	unsigned long   flags;
+	MV_FP_NAT_RULE  *curr_rule;
+	MV_FP_NAT_RULE  *tmp_rule;
+
+	FP_MGR_DBG(FP_MGR_DBG_CLR, ("FP_MGR: Clearing NAT Rule Database\n"));
+	spin_lock_irqsave(&nfp_mgr_lock, flags);
+	curr_rule = mgr_nat_rule_db.rule_chain;
+	while (curr_rule != NULL) {
+		tmp_rule = curr_rule;
+		curr_rule = curr_rule->next;
+		kfree(tmp_rule);
+	}
+	mgr_nat_rule_db.rule_chain = NULL;
+#ifdef CONFIG_MV_ETH_NFP_DUAL
+	status = mvIpcChanMsgSend(mgr_to_fp_chan, MV_SERVICE_NFP_ID, MV_FP_NAT_DB_CLEAR_OPCODE, NULL, 0);
+#else
+	status = mvFpNatDbClear();
+#endif /* CONFIG_MV_ETH_NFP_DUAL */
+	spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+	return status;
+}
+
+static int fp_nat_db_clear_and_update(void)
+{
+    int             status = 0;
+	unsigned long   flags;
+    MV_FP_NAT_RULE  *curr_nat_rule = mgr_nat_rule_db.rule_chain;
+
+	spin_lock_irqsave(&nfp_mgr_lock, flags);
+
+#ifdef CONFIG_MV_ETH_NFP_DUAL
+	status = mvIpcChanMsgSend(mgr_to_fp_chan, MV_SERVICE_NFP_ID, MV_FP_NAT_DB_CLEAR_OPCODE, NULL, 0);
+#else
+	status = mvFpNatDbClear();
+#endif /* CONFIG_MV_ETH_NFP_DUAL */
+
+	while (curr_nat_rule != NULL) { 
+#ifdef CONFIG_MV_ETH_NFP_DUAL
+		status |= mvIpcChanMsgSend(mgr_to_fp_chan, MV_SERVICE_NFP_ID, 
+					MV_FP_NAT_RULE_SET_OPCODE, curr_nat_rule, sizeof(MV_FP_NAT_RULE));
+#else
+		status |= mvFpNatRuleSet(curr_nat_rule);
+#endif /* CONFIG_MV_ETH_NFP_DUAL */
+		curr_nat_rule = curr_nat_rule->next;
+    }
+	spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+    return status;
+}
+
+/* Print NFP NAT Rule Database (SNAT + DNAT table) */
+int fp_nat_db_print(MV_FP_OP_TYPE op)
+{
+	int             status = 0;
+	unsigned long   flags;
+	MV_FP_NAT_RULE  *curr_rule;
+
+	spin_lock_irqsave(&nfp_mgr_lock, flags);
+	if (op == MV_FP_MANAGER) {
+		printk("Printing NFP Manager NAT Rule Database: \n");
+		curr_rule = mgr_nat_rule_db.rule_chain;
+		while (curr_rule != NULL) {
+			mvFpNatRulePrint(curr_rule);
+			curr_rule = curr_rule->next;
+		}
+	}
+	else {
+#ifdef CONFIG_MV_ETH_NFP_DUAL
+		status = mvIpcChanMsgSend(mgr_to_fp_chan, MV_SERVICE_NFP_ID, MV_FP_NAT_DB_PRINT_OPCODE, NULL, 0);
+#else
+		status = mvFpNatDbPrint();
+#endif /* CONFIG_MV_ETH_NFP_DUAL */
+	}
+	spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+	return status;
+}
+
+static int is_relevant_nat_protocol(u8 proto)
+{
+	/* For now we only knw how to handle NAT rules for TCP/UDP/ICMP/Zero_Hop protocols */
+	/* so we disregard everything else */
+	if (	(proto == MV_IP_PROTO_TCP) || 
+		(proto == MV_IP_PROTO_UDP) || 
+		(proto == MV_IP_PROTO_ICMP) || 
+		(proto == MV_IP_PROTO_ZERO_HOP))
+		return 1;
+
+	return 0;
+}
+
+static int is_relevant_port(u16 src_port, u16 dst_port)
+{
+	/* We want to pass FTP control stream packets to Linux */
+	if (	(MV_16BIT_BE(src_port) != MV_FTP_CTRL_PORT) 
+		&& (MV_16BIT_BE(dst_port) != MV_FTP_CTRL_PORT))
+		return 1;
+	return 0;
+}
+
+/* Set a new NAT rule, or update an existing one */
+int fp_nat_info_set(u32 src_ip, u32 dst_ip, u16 src_port, u16 dst_port, u8 proto, 
+			        u32 new_src_ip, u32 new_dst_ip, u16 new_src_port, u16 new_dst_port, 
+			        int if_index, enum nf_nat_manip_type maniptype)
+{
+	unsigned long   flags;
+	MV_FP_NAT_RULE  *curr_rule;
+	MV_FP_NAT_RULE  *new_rule;
+	int             status = 0;
+
+	/* we are not interested in NAT rules that do not involve our interfaces */
+	if (!is_valid_index(if_index))
+		return 0;
+
+	if (!is_relevant_nat_protocol(proto))
+		return 0;
+
+	if (!is_relevant_port(src_port, dst_port))
+		return 0;
+
+	if (	(src_ip == new_src_ip) && (dst_ip == new_dst_ip) && 
+		(src_port == new_src_port) && (dst_port == new_dst_port) ) 
+    	{
+            		return 0;
+	}
+
+   	FP_MGR_DBG(FP_MGR_DBG_NAT, ("FP_MGR: Setting NAT Information\n"));
+	FP_MGR_DBG(FP_MGR_DBG_NAT,
+	        ("SIP=%u.%u.%u.%u, DIP=%u.%u.%u.%u, Proto=%u, SPort=%u, DPort=%u, if_index=%d\n",
+			        NIPQUAD(src_ip), NIPQUAD(dst_ip), proto, MV_16BIT_BE(src_port), 
+			        MV_16BIT_BE(dst_port), if_index));
+
+    	FP_MGR_DBG(FP_MGR_DBG_NAT,
+        	("\tNewSIP=%u.%u.%u.%u, NewDIP=%u.%u.%u.%u, NewSPort=%u, NewDPort=%u\n\n", 
+            	NIPQUAD(new_src_ip), NIPQUAD(new_dst_ip), 
+		MV_16BIT_BE(new_src_port), MV_16BIT_BE(new_dst_port)));
+
+	spin_lock_irqsave(&nfp_mgr_lock, flags);
+	for (curr_rule = mgr_nat_rule_db.rule_chain; curr_rule != NULL; curr_rule = curr_rule->next) {
+		if (	curr_rule->srcIp == src_ip && 
+			curr_rule->dstIp == dst_ip && 
+			curr_rule->srcPort == src_port && 
+			curr_rule->dstPort == dst_port && 
+			curr_rule->proto == proto) 
+        {
+
+			/* Updating existing rule */
+			curr_rule->new_count = 0;
+            		curr_rule->old_count = 0;
+
+			if (maniptype == IP_NAT_MANIP_DST) {
+				curr_rule->newIp = new_dst_ip;
+				curr_rule->newPort = new_dst_port;
+			}
+			else {
+				curr_rule->newIp = new_src_ip;
+				curr_rule->newPort = new_src_port;
+			}
+			if (maniptype == IP_NAT_MANIP_DST) {
+				if ((dst_port != 0) && (dst_port != new_dst_port))
+					curr_rule->flags |= MV_FP_DNAT_CMD_MAP;
+				else
+					curr_rule->flags |= MV_FP_DIP_CMD_MAP; 
+			}
+			else {
+				if ((src_port != 0) && (src_port != new_src_port))
+					curr_rule->flags |= MV_FP_SNAT_CMD_MAP;
+				else
+					curr_rule->flags |= MV_FP_SIP_CMD_MAP;
+			}	
+			/* Now we have a full rule - we can update the NFP database       */
+#ifdef CONFIG_MV_ETH_NFP_DUAL
+					status = mvIpcChanMsgSend(mgr_to_fp_chan, MV_SERVICE_NFP_ID, 
+						MV_FP_NAT_RULE_SET_OPCODE, curr_rule, sizeof(MV_FP_NAT_RULE));
+#else
+					status = mvFpNatRuleSet(curr_rule);
+#endif /* CONFIG_MV_ETH_NFP_DUAL */
+				spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+				return status;
+		}
+	}
+	/* We haven't found a matching existing entry. Let's add a new one */
+	new_rule = kmalloc(sizeof(MV_FP_NAT_RULE), GFP_ATOMIC);
+	if (new_rule == NULL) {
+		spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+		return -ENOMEM;
+	}
+	new_rule->srcIp = src_ip;
+	new_rule->dstIp = dst_ip;
+	new_rule->srcPort = src_port;
+	new_rule->dstPort = dst_port;
+	new_rule->proto = proto;
+	new_rule->old_count = 0;
+    	new_rule->new_count = 0;
+	if (maniptype == IP_NAT_MANIP_DST) {
+		new_rule->newIp = new_dst_ip;
+		new_rule->newPort = new_dst_port;
+	}
+	else {
+		new_rule->newIp = new_src_ip;
+		new_rule->newPort = new_src_port;
+	}
+		if (maniptype == IP_NAT_MANIP_DST) {
+			if ((dst_port != 0) && (dst_port != new_dst_port))
+				new_rule->flags = MV_FP_DNAT_CMD_MAP;
+			else
+				new_rule->flags = MV_FP_DIP_CMD_MAP;
+		}
+		else {
+			if ((src_port != 0) && (src_port != new_src_port))
+				new_rule->flags = MV_FP_SNAT_CMD_MAP;
+			else
+				new_rule->flags = MV_FP_SIP_CMD_MAP;
+	}
+	new_rule->next = NULL;
+
+	if (mgr_nat_rule_db.rule_chain == NULL) {
+		/* There is no rule in this table yet */
+		mgr_nat_rule_db.rule_chain = new_rule;
+	}
+	else {
+		/* Let's add this rule at the tail of the list */
+		curr_rule = mgr_nat_rule_db.rule_chain;		
+		while (curr_rule->next != NULL)
+			curr_rule = curr_rule->next;
+		curr_rule->next = new_rule;		
+	}
+#ifdef CONFIG_MV_ETH_NFP_DUAL
+		status = mvIpcChanMsgSend(mgr_to_fp_chan, MV_SERVICE_NFP_ID, 
+					MV_FP_NAT_RULE_SET_OPCODE, new_rule, sizeof(MV_FP_NAT_RULE));
+#else
+		status = mvFpNatRuleSet(new_rule);
+#endif /* CONFIG_MV_ETH_NFP_DUAL */
+	spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+	return status;
+}
+
+/* Delete a NAT rule */
+int fp_nat_info_delete(u32 src_ip, u32 dst_ip, u16 src_port, u16 dst_port, u8 proto)
+{
+	unsigned long   flags;
+	MV_FP_NAT_RULE  *curr_rule;
+	MV_FP_NAT_RULE  *prev_rule;
+	int             status = 0;
+
+	spin_lock_irqsave(&nfp_mgr_lock, flags);
+	prev_rule = NULL;
+	for (	curr_rule = mgr_nat_rule_db.rule_chain; 
+		curr_rule != NULL; 
+		prev_rule = curr_rule, curr_rule = curr_rule->next) {
+		if (	curr_rule->srcIp == src_ip && 
+			curr_rule->dstIp == dst_ip && 
+			curr_rule->srcPort == src_port && 
+			curr_rule->dstPort == dst_port && 
+			curr_rule->proto == proto) {
+
+			if (prev_rule == NULL)
+				mgr_nat_rule_db.rule_chain = curr_rule->next;	
+			else
+				prev_rule->next = curr_rule->next;
+#ifdef CONFIG_MV_ETH_NFP_DUAL
+			status = mvIpcChanMsgSend(mgr_to_fp_chan, MV_SERVICE_NFP_ID, 
+					MV_FP_NAT_RULE_DELETE_OPCODE, curr_rule, sizeof(MV_FP_NAT_RULE));
+#else
+			status = mvFpNatRuleDelete(curr_rule);
+#endif /* CONFIG_MV_ETH_NFP_DUAL */
+			kfree(curr_rule);
+			spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+			return status;
+		}
+	}
+	spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+	return 0;
+}
+
+/* Return NAT rule confirmation status */
+int fp_is_nat_confirmed(u32 src_ip, u32 dst_ip, u16 src_port, u16 dst_port, u8 proto)
+{
+	unsigned long   flags;
+	MV_FP_NAT_RULE  *curr_rule;
+    	int             confirmed = 0;
+
+	if (fp_disable_flag == 1)
+    	{
+		return 0;
+    	}
+	spin_lock_irqsave(&nfp_mgr_lock, flags);
+	curr_rule = mgr_nat_rule_db.rule_chain;
+	while (curr_rule != NULL) {
+		if( (curr_rule->srcIp == src_ip) && 
+			(curr_rule->dstIp == dst_ip) && 
+			(curr_rule->srcPort == src_port) && 
+			(curr_rule->dstPort == dst_port) && 
+			(curr_rule->proto == proto)) 
+        	{
+            		if(curr_rule->new_count != curr_rule->old_count)
+            		{
+                		curr_rule->old_count = curr_rule->new_count;
+                		confirmed = 1;
+            		}
+		    	spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+			return confirmed;
+		}
+		curr_rule = curr_rule->next;
+	}
+	spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+	return 0;
+}
+
+/* Set or clear the "NAT Aware" flags according to user's newly added or deleted iptables rule */
+static void fp_handle_user_nat_rule(FP_IPTABLES_NAT_RULE *nat_rule, int add_del_flag)
+{
+	/* This NAT rule that the user added can affect routing entries based on */
+	/* input interface, output interface, SIP, DIP */
+	/* For now, protocol and source/dest port are not taken into consideration */
+
+	MV_FP_RULE      *curr_rule;
+	unsigned long   flags;
+	
+	spin_lock_irqsave(&nfp_mgr_lock, flags);
+	curr_rule = mgr_rule_db.rule_chain; 
+	while (curr_rule != NULL) {
+		update_awareness(nat_rule, curr_rule, add_del_flag);		
+		mvFpRuleAwareSet(curr_rule);	
+		curr_rule = curr_rule->next;
+	}
+	spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+}
+
+/* Initialize our user NAT tables, mirroring iptables NAT rules table */
+void init_fp_user_nat_tables(void)
+{
+	fp_user_nat_table[0].rule_chain = NULL;
+	fp_user_nat_table[1].rule_chain = NULL;
+	curr_table = 0;
+	old_table = 1 - curr_table;
+}
+
+/* Add a user NAT rule to our mirror table */
+int add_fp_user_nat_rule(struct ipt_entry *e, int table)
+{
+	struct ipt_entry_target *t = NULL;
+	FP_IPTABLES_NAT_RULE *curr_rule = NULL, *new_rule = NULL;
+
+	t = ipt_get_target(e);
+	/* Disregard targets that do not interest us */
+	if (	strcmp(t->u.kernel.target->name, MASQ_TARGET_NAME) && 
+		strcmp(t->u.kernel.target->name, REDIRECT_TARGET_NAME) && 
+		strcmp(t->u.kernel.target->name, SNAT_TARGET_NAME) && 
+		strcmp(t->u.kernel.target->name, DNAT_TARGET_NAME))
+		return 0;
+
+	new_rule = kmalloc(sizeof(FP_IPTABLES_NAT_RULE), GFP_ATOMIC);
+	if (new_rule == NULL)
+		return -ENOMEM;
+	memset(new_rule, 0, sizeof(FP_IPTABLES_NAT_RULE));
+
+	strcpy(new_rule->target_name, t->u.kernel.target->name);
+	strcpy(new_rule->iniface, e->ip.iniface);
+	strcpy(new_rule->outiface, e->ip.outiface);
+	new_rule->sip = e->ip.src.s_addr; 
+	new_rule->dip = e->ip.dst.s_addr;
+	new_rule->smsk = e->ip.smsk.s_addr;
+	new_rule->dmsk = e->ip.dmsk.s_addr;
+	new_rule->proto = e->ip.proto;
+	new_rule->next = NULL;
+
+	if (fp_user_nat_table[table].rule_chain == NULL) {
+		/* There is no rule in this table yet */
+		fp_user_nat_table[table].rule_chain = new_rule;
+	}
+	else {
+		/* Let's add this rule at the tail of the list */
+		curr_rule = fp_user_nat_table[table].rule_chain;		
+		while (curr_rule->next != NULL)
+			curr_rule = curr_rule->next;
+		curr_rule->next = new_rule;		
+	}
+	return 0;
+}
+
+/* Clear our user NAT rule table */
+void clear_fp_user_nat_table(int table)
+{
+	FP_IPTABLES_NAT_RULE *curr_rule;
+	FP_IPTABLES_NAT_RULE *tmp_rule;
+
+	curr_rule = fp_user_nat_table[table].rule_chain;
+	while (curr_rule != NULL) {
+		tmp_rule = curr_rule;
+		curr_rule = curr_rule->next;
+		kfree(tmp_rule);
+	}
+	fp_user_nat_table[table].rule_chain = NULL;
+}
+
+/* Check if two user NAT rules are equal */
+static int rules_are_equal(FP_IPTABLES_NAT_RULE *r1, FP_IPTABLES_NAT_RULE *r2)
+{
+	if (strcmp(r1->target_name, r2->target_name))
+		return 0;
+
+	if (	(r1->sip != r2->sip) || (r1->dip != r2->dip) || 
+		(r1->smsk != r2->smsk) || (r2->dmsk != r2->dmsk) || 
+		(r1->proto != r2->proto))
+		return 0;
+
+	if (strcmp(r1->iniface, r2->iniface) || strcmp(r1->outiface, r2->outiface))
+		return 0;
+
+	return 1;
+}
+
+/* Check if a rule exists in our user NAT table */
+static int rule_exists_in_table(FP_IPTABLES_NAT_RULE *rule, int table)
+{
+	FP_IPTABLES_NAT_RULE *curr_rule;
+
+	curr_rule = fp_user_nat_table[table].rule_chain;
+	while (curr_rule != NULL) {
+		if (rules_are_equal(rule, curr_rule))
+			return 1;
+		curr_rule = curr_rule->next;
+	}
+	return 0;
+}
+
+/* Compare the two mirror tables to discover which new rules were added, and which rules were deleted */
+void compare_fp_user_nat_tables(void)
+{
+	FP_IPTABLES_NAT_RULE *curr_rule;
+	/* Stage 1: */
+	/* Compare current table to previous one to detect newly added rules */
+	/* For each rule in curr_table: */
+	/* If it exists also in old_table, we don't care */
+	/* If not, it is new */
+	curr_rule = fp_user_nat_table[curr_table].rule_chain;
+	while (curr_rule != NULL) {
+		if (!rule_exists_in_table(curr_rule, old_table)) {
+			fp_handle_user_nat_rule(curr_rule, 1); /* pass 1 for adding a new rule */
+		}
+		curr_rule = curr_rule->next;
+	}
+	
+	/* Stage 2: */
+	/* Compare previous table to current one to detect newly deleted rules */
+	/* For each rule in old_table: */
+	/* If it exists also in curr_table, we don't care */
+	/* If not, it was deleted */
+	curr_rule = fp_user_nat_table[old_table].rule_chain;
+	while (curr_rule != NULL) {
+		if (!rule_exists_in_table(curr_rule, curr_table)) {
+			fp_handle_user_nat_rule(curr_rule, 0); /* pass 0 for deleting a rule */
+		}
+		curr_rule = curr_rule->next;
+	}
+}
+
+#endif /* CONFIG_MV_ETH_NFP_NAT_SUPPORT */
+
+module_exit(fp_exit_module);
+
+#ifdef CONFIG_MV_ETH_NFP_FDB_SUPPORT
+
+/* Initialize Fast Bridge Rule Database */
+int fp_fdb_db_init(u32 db_size)
+{
+        FP_MGR_DBG(FP_MGR_DBG_INIT, ("FP_MGR: Initializing Bridge Rule Database\n"));
+
+		mgr_fdb_rule_db.rule_chain = NULL;
+		mgr_fdb_rule_db.max_size = db_size;
+
+		return mvFpFdbInit(db_size);
+}
+
+/* Set Bridging information in the FDB database */
+int fp_fdb_info_set(u32 if_bridge, u32 if_index, const u8 *mac, int is_local)
+{
+	unsigned long flags;
+	MV_FP_FDB_RULE rule;
+
+	if (is_local && fp_mgr_if_register(if_bridge, 
+									   MV_FP_IF_BRG, 
+									   __dev_get_by_index(if_bridge))) {
+		FP_MGR_DBG(FP_MGR_DBG_FDB, ("FDB_MNG: failed to register bridge=%d\n", if_bridge));
+	}
+
+	memset(&rule, 0, sizeof(MV_FP_FDB_RULE));
+	rule.mgmtInfo.actionType = MV_FP_BRIDGE_CMD;
+	rule.mgmtInfo.ruleType = MV_FP_DYNAMIC_RULE; 
+
+	mac_addr_copy(rule.fdbInfo.mac, mac);
+	rule.fdbInfo.ifIndex = if_index;
+	rule.fdbInfo.bridge = if_bridge;
+	rule.fdbInfo.flags = (unsigned short)is_local;
+
+	spin_lock_irqsave(&nfp_mgr_lock, flags);
+	mvFpFdbRuleSet(&rule);
+	spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+
+	return 0;
+}
+
+/* Delete bridging information in the FDB database */
+int fp_fdb_info_del(u32 if_bridge, u32 if_index, const u8 *mac, int is_local)
+{
+	unsigned long flags;
+	MV_FP_FDB_RULE rule;
+
+	if (is_local && !fp_mgr_if_unregister(if_bridge)) 
+		FP_MGR_DBG(FP_MGR_DBG_FDB, ("FDB_MNG: unregister bridge=%d\n", if_bridge));
+    
+	memset(&rule, 0, sizeof(MV_FP_FDB_RULE));
+
+	mac_addr_copy(rule.fdbInfo.mac, mac);
+	rule.fdbInfo.ifIndex = if_index;
+	rule.fdbInfo.bridge = if_bridge;
+	rule.fdbInfo.flags = (unsigned short)is_local;
+
+	/* has expired */
+	spin_lock_irqsave(&nfp_mgr_lock, flags);
+	if (!is_local && (mvFpFdbRuleAge(&rule) > 0)) {
+		spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+		return 1; 
+	}
+
+	mvFpFdbRuleDel(&rule);
+	spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+
+	return 0;
+}
+
+/* Clear Fast Path FDB Rule Database */
+int fp_fdb_db_clear(void)
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&nfp_mgr_lock, flags);
+	mvFpFdbClear();
+	spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+
+	return 0;
+}
+
+/* Print Fast Path FDB Rule Database */
+int fp_fdb_db_print(MV_FP_OP_TYPE op)
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&nfp_mgr_lock, flags);
+	mvFpFdbPrint();
+	spin_unlock_irqrestore(&nfp_mgr_lock, flags);
+
+	return 0;
+}
+
+#endif /* CONFIG_MV_ETH_NFP_FDB_SUPPORT */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_network/nfp_mgr/mv_nfp_mgr.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_network/nfp_mgr/mv_nfp_mgr.h
@@ -0,0 +1,215 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+*******************************************************************************/
+
+/*******************************************************************************
+* mv_nfp_mgr.h - Header File for Marvell NFP Manager
+*
+* DESCRIPTION:
+*       This header file contains macros, typedefs and function declarations 
+* 	specific to the Marvell Network Fast Processing Manager.
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+#ifndef __mv_nfp_mgr_h__
+#define __mv_nfp_mgr_h__
+
+/* includes */
+#ifdef CONFIG_MV_ETH_NFP_NAT_SUPPORT
+#include <linux/netfilter_ipv4/ip_tables.h>
+#include <net/netfilter/nf_nat.h>
+#endif
+#include "eth/nfp/mvNfp.h"
+
+/* defines */
+
+/* enumerations */
+
+typedef enum {
+	MV_FP_MANAGER = 0, 
+	MV_FP_DATABASE = 1
+
+} MV_FP_OP_TYPE;
+
+/* NFP interface type, used for registration */
+typedef enum {
+	MV_FP_IF_INV,   /* Invalid interface */
+	MV_FP_IF_INT,   /* use to register a Marvell GbE interface */
+	MV_FP_IF_BRG,   /* use to register a virtual interface such as bridge */
+	MV_FP_IF_EXT    /* use to register an external interface such as WLAN */
+
+} MV_FP_IF_TYPE;
+
+/* data types */
+struct map_eth_devs {
+	MV_FP_IF_TYPE       if_type;
+	struct net_device*  dev;
+    u32                 def_gtw_ip;
+};
+
+extern struct map_eth_devs *fp_eth_devs;
+extern int  fp_disable_flag;
+
+static INLINE int fp_is_enabled(void)
+{
+	return (!fp_disable_flag);
+}
+
+static INLINE MV_FP_IF_TYPE fp_mgr_get_if_type(int if_index)
+{
+    if(if_index >= ETH_FP_IFINDEX_MAX)
+    {
+        mvOsPrintf("if_index %d is OUT of RANGE\n", if_index);
+        return MV_FP_IF_INV;
+    }
+    return fp_eth_devs[if_index].if_type;
+}
+
+static INLINE struct net_device* fp_mgr_get_net_dev(int if_index)
+{
+    if(if_index >= ETH_FP_IFINDEX_MAX)
+    {
+        mvOsPrintf("if_index %d is OUT of RANGE\n", if_index);
+        return NULL;
+    }
+    return fp_eth_devs[if_index].dev;
+}
+
+/* function headers: */
+
+/* Initialize NFP Manager */
+int fp_mgr_init(void);
+
+/* Register a network interface that works with NFP	  */
+/* Parameters: 						  */
+/* if_index: Linux network interface index 		  */
+/* if_type: interface type (gateway, external)		  */
+/* dev: pointer to the Linux net_device			  */
+/* Returns port number 					  */
+int fp_mgr_if_register(	int if_index, MV_FP_IF_TYPE if_type, 
+			            struct net_device* dev);
+int fp_mgr_if_unregister(int if_index);
+
+/* This function is called when user-space tool disables the NFP.	*/
+/* All databases are cleared, and learning of new rules is disabled	*/
+/* for all types of rules: static, dynamic, arp, routing etc.		*/
+void fp_mgr_disable(void);
+
+/* This function is called when user-space tool enables the NFP.	*/
+int fp_mgr_enable(void);
+
+/* This function is called when user-space tool asks about NFP status (enabled/disabled) */
+int fp_mgr_status(void);
+
+/* Initialize NFP Rule Database (Routing + ARP information table) 	*/
+int fp_rule_db_init(u32 db_size);
+
+/* Initialize NFP NAT Rule Database (SNAT + DNAT table) 		*/
+int fp_nat_db_init(u32 db_size);
+
+/* Initialize NFP Manager ARP Database 					*/
+int fp_arp_db_init(u32 db_size);
+
+/* Clear NFP Rule Database (Routing + ARP information table) 		*/
+int fp_rule_db_clear(void);
+
+/* Clear NFP NAT Rule Database (SNAT + DNAT table) 			*/
+int fp_nat_db_clear(void);
+
+/* Clear NFP Manager ARP Database */
+int fp_arp_db_clear(void);
+
+/* Print NFPRule Database (Routing + ARP information table) */
+int fp_rule_db_print(MV_FP_OP_TYPE);
+
+/* Print NFP NAT Rule Database (SNAT + DNAT table) */
+int fp_nat_db_print(MV_FP_OP_TYPE);
+
+/* Print NFP Manager ARP Database */
+int fp_arp_db_print(void);
+
+/* Set a new rule or update an existing one  */
+/* When looking for an existing rule, search */
+/* a match for SIP, DIP, and default gateway IP */
+/* Rule type is also taken into account: */
+/* a new static rule can overrode an existing rule of any type, */
+/* while a new dynamic rule can only override an existing dynamic rule */
+int fp_rule_set(MV_FP_RULE *rule);
+
+/* Delete an existing rule */
+/* When looking for an existing rule, search */
+/* a match for SIP, DIP */
+int fp_rule_delete(u32 src_ip, u32 dst_ip, MV_FP_RULE_TYPE rule_type);
+
+/* Set Routing information received from the IP stack when a new Routing cache entry is created */
+/* Look for matching ARP information to complete the rule */
+/* If we have a complete rule, update the NFP database */
+int fp_routing_info_set(u32 src_ip, u32 dst_ip, u32 def_gtw_ip, int ingress_if, int egress_if);
+
+/* Delete Routing information from the Routing + ARP database, and update the NFP database */
+int fp_routing_info_delete(u32 src_ip, u32 dst_ip);
+
+/* Set ARP information in the ARP database, and update the Routing + ARP database if necessary */
+/* If we have a complete rule, update the NFP database */
+int fp_arp_info_set(int if_index, u32 ip, const u8 *mac);
+
+/* Delete ARP information from the ARP database, and update the Routing + ARP database if necessary */
+/* If a rule became incomplete, update the NFP database */
+int fp_arp_info_delete(u32 ip);
+
+/* Return ARP rule confirmation status */
+int fp_is_arp_confirmed(u32 ip, const u8 *mac);
+
+/* Return routing rule confirmation status */
+int fp_is_route_confirmed(u32 src_ip, u32 dst_ip);
+int fp_is_enabled(void);
+
+#ifdef CONFIG_MV_ETH_NFP_NAT_SUPPORT
+/* Set a new NAT rule, or update an existing one */
+int fp_nat_info_set(	u32 src_ip, u32 dst_ip, u16 src_port, u16 dst_port, u8 proto,  
+			u32 new_src_ip, u32 new_dst_ip, u16 new_src_port, u16 new_dst_port, 
+			int if_index, enum nf_nat_manip_type maniptype);
+
+int fp_nat_info_delete(u32 src_ip, u32 dst_ip, u16 src_port, u16 dst_port, u8 proto);
+
+/* Return NAT rule confirmation status */
+int fp_is_nat_confirmed(u32 src_ip, u32 dst_ip, u16 src_port, u16 dst_port, u8 proto);
+#endif /* CONFIG_MV_ETH_NFP_NAT_SUPPORT */
+
+#ifdef CONFIG_MV_ETH_NFP_FDB_SUPPORT
+int fp_fdb_db_init(u32 db_size);
+int fp_fdb_info_set(u32 ifvlan, u32 ifport, const u8 *mac, int is_local);
+int fp_fdb_info_del(u32 ifvlan, u32 ifport, const u8 *mac, int is_local);
+int fp_fdb_db_print(MV_FP_OP_TYPE op);
+int fp_fdb_db_clear(void);
+#endif	/* CONFIG_MV_ETH_NFP_FDB_SUPPORT */
+#endif /* __mv_nfp_mgr_h__ */
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_network/nfp_mgr/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_network/nfp_mgr/Makefile
@@ -0,0 +1,11 @@
+#
+# Makefile for the Marvell Gigabit Ethernet driver
+#
+
+ifdef CONFIG_MV_HAL_RULES_PATH
+include $(srctree)/include/config/auto.conf
+include $(srctree)/$(subst ",,$(CONFIG_MV_HAL_RULES_PATH))
+endif
+
+obj-$(CONFIG_MV_ETH_NFP) += mv_nfp_mgr.o
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_network/mv_ethernet/mv_eth_proc.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_network/mv_ethernet/mv_eth_proc.c
@@ -0,0 +1,546 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+*******************************************************************************/
+#ifndef LINUX_VERSION_CODE
+    #include <linux/version.h>
+#endif
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/reboot.h>
+#include <linux/pci.h>
+#include <linux/kdev_t.h>
+#include <linux/major.h>
+#include <linux/console.h>
+#include <linux/delay.h>
+#include <linux/ide.h>
+#include <linux/seq_file.h>
+
+#include <asm/system.h>
+#include <asm/dma.h>
+#include <asm/io.h>
+
+#include <linux/netdevice.h>
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "mv_eth_proc.h"
+
+#ifdef CONFIG_MV_ETH_NFP
+#include "../nfp_mgr/mv_nfp_mgr.h"
+#endif
+
+#include "mv_netdev.h"
+
+//#define MV_DEBUG
+#ifdef MV_DEBUG
+#define DP printk
+#else
+#define DP(fmt,args...)
+#endif
+
+
+/* global variables from 'regdump' */
+static struct proc_dir_entry *mv_eth_tool;
+
+static unsigned int port = 0, q = 0, weight = 0, status = 0, mac[6] = {0,};
+static unsigned int policy =0, command = 0, packet = 0;
+static unsigned int value = 0;
+
+static pm_message_t state;
+
+#ifdef CONFIG_MV_ETH_NFP
+static unsigned int  dip, sip, inport, outport;
+static unsigned int  da[6] = {0,}, sa[6] = {0,};
+static unsigned int  db_type;
+#endif /* CONFIG_MV_ETH_NFP */
+
+void run_com_srq(void) 
+{
+    void* port_hndl = mvEthPortHndlGet(port);
+
+    if(port_hndl == NULL)
+        return;
+
+    if(q >= MV_ETH_RX_Q_NUM)
+	    q = -1;
+
+    switch(packet) {
+	case PT_BPDU:
+		mvEthBpduRxQueue(port_hndl, q);
+		break;
+	case PT_ARP:
+		mvEthArpRxQueue(port_hndl, q);
+		break;
+	case PT_TCP:
+		mvEthTcpRxQueue(port_hndl, q);
+		break;
+	case PT_UDP:
+		mvEthUdpRxQueue(port_hndl, q);
+		break;
+	default:
+		printk("eth proc unknown packet type.\n");	
+    }
+	
+}
+
+extern void    		ethMcastAdd(int port, char* macStr, int queue);
+void run_com_sq(void) {
+
+    char mac_addr[20];
+
+    if(q >= MV_ETH_RX_Q_NUM)
+	    q = -1;
+    
+    sprintf(mac_addr, "%02x:%02x:%02x:%02x:%02x:%02x",mac[0],mac[1],mac[2],mac[3],mac[4],mac[5]);
+    ethMcastAdd(port, mac_addr, q);
+}
+
+extern void    	ethPortStatus (int port);
+extern void    	ethPortQueues( int port, int rxQueue, int txQueue, int mode);
+extern void    	ethPortMcast(int port);
+extern void    	ethPortUcastShow(int port);
+extern void    	ethPortRegs(int port);
+extern void     ethTxPolicyRegs(int port);
+extern void    	ethPortCounters(int port);
+extern void 	ethPortRmonCounters(int port);
+
+#ifdef CONFIG_MV_ETH_NFP_DUAL
+extern void    eth_remote_port_status_print(int port, int mode);
+#endif
+
+void run_com_stats(void) {
+	printk("\n\n#########################################################################################\n\n");
+	switch(status) {
+		case STS_PORT:
+			printk("  PORT %d: GET ETH STATUS\n\n",port);
+            mv_eth_status_print(port);
+			ethPortStatus(port);
+			break;
+
+        case STS_PORT_MAC:
+            ethPortUcastShow(port);
+			ethPortMcast(port);
+            break;
+
+		case STS_PORT_Q:
+			printk("  PORT %d: GET ETH STATUS ON Q %d\n\n",port,q);
+			ethPortQueues(port, q, q, 1);
+			break;
+
+#if (MV_ETH_RX_Q_NUM > 1)
+		case STS_PORT_RXP:
+			printk("  PORT %d: GET ETH RX POLICY STATUS\n\n",port);
+			printk("Not supported\n");
+			break;
+#endif /* MV_ETH_RX_Q_NUM > 1 */
+
+		case STS_PORT_TOS_MAP:
+			mv_eth_tos_map_show(port);
+			break;
+
+		case STS_PORT_TXP:
+			printk("  PORT %d: GET ETH TX POLICY STATUS\n\n",port);
+			ethTxPolicyRegs(port);
+			break;
+
+		case STS_PORT_REGS:
+			printk("  PORT %d: GET ETH PORT REGS STATUS\n\n",port);
+			ethPortRegs(port);
+			break;
+
+		case STS_PORT_MIB:
+			ethPortCounters(port);
+			ethPortRmonCounters(port);	
+			break;
+
+		case STS_PORT_STATS:
+			printk("  PORT %d: GET ETH STATISTIC STATUS\n\n",port);
+			mv_eth_stats_print(port);
+			break;
+
+        case STS_NETDEV:
+			mv_eth_netdev_print(port);
+            break;
+
+#ifdef CONFIG_MV_ETH_NFP
+		case STS_PORT_NFP_STATS:
+			printk("  PORT %d: NFP statistics\n\n",port);
+			mv_eth_nfp_stats_print(port);
+			break;
+#endif /* CONFIG_MV_ETH_NFP */
+
+#ifdef CONFIG_MV_GATEWAY
+        case STS_SWITCH_STATS:
+            mv_gtw_switch_stats(port);
+            break;
+#endif /* CONFIG_MV_GATEWAY */
+
+		default:
+			printk(" Unknown status command \n");
+	}
+#ifdef CONFIG_MV_ETH_NFP_DUAL
+    eth_remote_port_status_print(port, status);
+#endif
+}
+
+int run_eth_com(const char *buffer) {
+
+    int scan_count;
+    scan_count = sscanf(buffer, ETH_CMD_STRING, ETH_SCANF_LIST);
+    if( scan_count != ETH_LIST_LEN) {
+	printk("eth command bad format %x != %x\n", scan_count, ETH_LIST_LEN );
+	return 1;
+    }
+    switch(command) {
+
+        case COM_TXDONE_Q:
+            mv_eth_tx_done_quota = value;
+            break;
+
+#ifdef CONFIG_MV_SKB_REUSE
+        case COM_SKB_REUSE:
+            eth_skb_reuse_enable = value;
+            break;
+#endif
+	default:
+            printk(" Unknown ETH command \n");
+    }
+    return 0;
+}
+
+/* Giga Queue commands */
+int run_port_queue_cmd(const char *buffer) {
+
+        int scan_count;
+
+        scan_count = sscanf(buffer, QUEUE_CMD_STRING, QUEUE_SCANF_LIST);
+
+        if( scan_count != QUEUE_LIST_LEN) {
+                printk("eth port/queue command bad format %x != %x\n", scan_count, QUEUE_LIST_LEN );
+                return 1;
+        }
+
+        switch(command) {
+		case COM_TOS_MAP:
+			mv_eth_tos_map_set(port, value, q);
+			break;
+	
+		default:
+			printk(" Unknown port/queue command \n");
+	}
+	return 0;
+}
+
+/* Giga Port commands */
+int run_port_com(const char *buffer) {
+
+	int scan_count;
+    void*   port_hndl;
+
+	scan_count = sscanf(buffer, PORT_CMD_STRING, PORT_SCANF_LIST);
+    
+	if( scan_count != PORT_LIST_LEN) {
+		printk("eth port command bad format %x != %x\n", scan_count, PORT_LIST_LEN );
+		return 1;
+	}
+    port_hndl = mvEthPortHndlGet(port);
+    if(port_hndl == NULL)
+        return 1;
+
+    	switch(command) {
+        	case COM_RX_COAL:
+            	mvEthRxCoalSet(mvEthPortHndlGet(port), value);
+            	break;
+
+        	case COM_TX_COAL:
+            	mvEthTxCoalSet(mvEthPortHndlGet(port), value);
+        	break;
+
+#ifdef ETH_MV_TX_EN
+            case COM_TX_EN:
+                if(value > CONFIG_MV_ETH_NUM_OF_RX_DESCR)
+            {
+                    printk("Eth TX_EN command bad param: value=%d\n", value);
+                return 1;
+            }
+
+                eth_tx_en_config(port, value);
+            break;
+#endif /* ETH_MV_TX_EN */
+
+#if (MV_ETH_VERSION >= 4)
+        	case COM_EJP_MODE:
+            		mvEthEjpModeSet(mvEthPortHndlGet(port), value);
+            	break;
+#endif /* (MV_ETH_VERSION >= 4) */
+
+			case COM_TX_NOQUEUE:
+				mv_eth_set_noqueue(port, value);
+			break;
+
+  		default:
+			printk(" Unknown port command \n");
+    	}
+   	return 0;
+}
+
+#ifdef CONFIG_MV_ETH_NFP
+int run_ip_rule_set_com(const char *buffer)
+{
+    int scan_count, i;
+    MV_FP_RULE  ip_rule;
+    MV_STATUS   status = MV_OK;
+
+    scan_count = sscanf(buffer, IP_RULE_STRING, IP_RULE_SCANF_LIST);
+
+    if( scan_count != IP_RULE_LIST_LEN) {
+	printk("eth proc bad format %x != %x\n", scan_count, IP_RULE_LIST_LEN);
+	return 1;
+    }
+    memset(&ip_rule, 0, sizeof(ip_rule));
+    
+    printk("run_ip_rule_set_com: dip=%08x, sip=%08x, inport=%d, outport=%d\n", 
+            dip, sip, inport, outport);
+
+    ip_rule.routingInfo.dstIp = MV_32BIT_BE(dip);
+    ip_rule.routingInfo.srcIp = MV_32BIT_BE(sip);
+    ip_rule.routingInfo.defGtwIp = MV_32BIT_BE(dip);
+    ip_rule.routingInfo.inIfIndex = inport;
+    ip_rule.routingInfo.outIfIndex = outport;
+    ip_rule.routingInfo.aware_flags = 0;
+
+    for(i=0; i<MV_MAC_ADDR_SIZE; i++)
+    {
+        ip_rule.routingInfo.dstMac[i] = (MV_U8)(da[i] & 0xFF);
+        ip_rule.routingInfo.srcMac[i] = (MV_U8)(sa[i] & 0xFF);;
+    }
+    ip_rule.mgmtInfo.actionType = MV_FP_ROUTE_CMD;
+    ip_rule.mgmtInfo.ruleType = MV_FP_STATIC_RULE;
+
+    status = fp_rule_set(&ip_rule);
+    if(status != MV_OK)
+    {
+        printk("fp_rule_set FAILED: status=%d\n", status);
+    }
+    return status;
+}
+
+int run_ip_rule_del_com(const char *buffer)
+{
+    int scan_count;
+    MV_STATUS status = MV_OK;
+
+    scan_count = sscanf(buffer, IP_RULE_DEL_STRING, IP_RULE_DEL_SCANF_LIST);
+
+    if( scan_count != IP_RULE_DEL_LIST_LEN) {
+	printk("eth proc bad format %x != %x\n", scan_count, IP_RULE_DEL_LIST_LEN);
+	return 1;
+    }
+
+    status = fp_rule_delete(MV_32BIT_BE(sip), MV_32BIT_BE(dip), MV_FP_STATIC_RULE);
+    if(status != MV_OK)
+    {
+        printk("fp_rule_delete FAILED: status=%d\n", status);
+    }
+    return status;
+}
+
+int run_fp_db_print_com(const char *buffer)
+{
+    int scan_count;
+    MV_STATUS status = MV_OK;
+
+    scan_count = sscanf(buffer, FP_DB_PRINT_STRING, FP_DB_PRINT_SCANF_LIST);
+
+    if( scan_count != FP_DB_PRINT_LIST_LEN) {
+	    printk("eth proc bad format %x != %x\n", scan_count, FP_DB_PRINT_LIST_LEN);
+	    return 1;
+    }
+
+    if (db_type == DB_ROUTING)
+	    status = fp_rule_db_print(MV_FP_DATABASE); 
+#ifdef CONFIG_MV_ETH_NFP_NAT_SUPPORT 
+    else if (db_type == DB_NAT)
+	    status = fp_nat_db_print(MV_FP_DATABASE);
+#endif /* CONFIG_MV_ETH_NFP_NAT_SUPPORT */
+#ifdef CONFIG_MV_ETH_NFP_FDB_SUPPORT
+    else if (db_type == DB_FDB)
+            status = fp_fdb_db_print(MV_FP_DATABASE);
+#endif /* CONFIG_MV_ETH_NFP_FDB_SUPPORT */
+    else {
+	    printk("Failed to print rule database: unknown DB type\n");
+	    return 1;
+    }
+    return status;
+}
+#endif /* CONFIG_MV_ETH_NFP */
+
+int run_com_general(const char *buffer) {
+
+	int scan_count;
+
+	scan_count = sscanf(buffer, PROC_STRING, PROC_SCANF_LIST);
+
+	if( scan_count != LIST_LEN) {
+		printk("eth proc bad format %x != %x\n", scan_count, LIST_LEN );
+		return 1;
+	}
+
+	switch(command){
+		case COM_SRQ:
+			DP(" Port %x: Got SRQ command Q %x and packet type is %x <bpdu/arp/tcp/udp> \n",port,q,packet);
+			run_com_srq();
+			break;
+		case COM_SQ:
+			DP(" Port %x: Got SQ command Q %x mac %2x:%2x:%2x:%2x:%2x:%2x\n",port, q, 
+				mac[0],  mac[1],  mac[2],  mac[3],  mac[4],  mac[5]);
+			run_com_sq();
+			break;
+
+#if (MV_ETH_RX_Q_NUM > 1)
+		case COM_SRP:
+			DP(" Port %x: Got SRP command Q %x policy %x <Fixed/WRR> \n",port,q,policy); 
+            printk("Not supported\n");
+			break;
+		case COM_SRQW:
+			DP(" Port %x: Got SQRW command Q %x weight %x \n",port,q,weight);
+			printk("Not supported\n");
+			break;
+		case COM_STP:
+			DP("STP cmd - Unsupported: Port %x Q %x policy %x <WRR/FIXED> weight %x\n",port,q,policy,weight); 
+			break;
+#endif /* MV_ETH_RX_Q_NUM > 1 */
+
+		case COM_STS:
+			DP("  Port %x: Got STS command status %x\n",port,status);
+			run_com_stats();
+			break;
+		default:
+			printk("eth proc unknown command.\n");
+	}
+  	return 0;
+}
+
+int mv_eth_tool_write (struct file *file, const char *buffer,
+                      unsigned long count, void *data) {
+
+	sscanf(buffer,"%x",&command);
+
+	switch (command) {
+		case COM_RX_COAL:
+		case COM_TX_COAL:
+        case COM_TX_EN:
+        case COM_EJP_MODE:
+		case COM_TX_NOQUEUE:
+			run_port_com(buffer);
+			break;
+		case COM_TXDONE_Q:
+        case COM_SKB_REUSE:
+			run_eth_com(buffer);
+			break;
+
+		case COM_TOS_MAP:
+            run_port_queue_cmd(buffer);
+			break;
+
+#ifdef CONFIG_MV_ETH_NFP
+		case COM_IP_RULE_SET:
+			run_ip_rule_set_com(buffer);
+			break;
+		case COM_IP_RULE_DEL:
+			run_ip_rule_del_com(buffer);
+			break;
+		case COM_FP_DISABLE:
+			fp_mgr_disable();
+			break;
+		case COM_FP_ENABLE:
+			fp_mgr_enable();
+			break;
+		case COM_FP_STATUS:
+			fp_mgr_status();
+			break;
+		case COM_FP_PRINT:
+			run_fp_db_print_com(buffer);
+			break;
+#endif /* CONFIG_MV_ETH_NFP */
+#ifdef CONFIG_PM
+		/* liron, for debug only */
+		case COM_SUSPEND:
+			state.event = 0;
+			mv_eth_suspend(NULL, state);
+			break;
+		case COM_RESUME:
+			mv_eth_resume(NULL);
+			break;
+#endif /* CONFIG_PM */
+		default:
+			run_com_general(buffer);
+			break;
+	}
+	return count;
+}
+
+static int proc_calc_metrics(char *page, char **start, off_t off,
+                                 int count, int *eof, int len)
+{
+        if (len <= off+count) *eof = 1;
+        *start = page + off;
+        len -= off;
+        if (len>count) len = count;
+        if (len<0) len = 0;
+        return len;
+}
+
+
+
+int mv_eth_tool_read (char *page, char **start, off_t off,
+                            int count, int *eof, void *data) {
+	unsigned int len = 0;
+
+	//len  = sprintf(page, "\n");
+	//len += sprintf(page+len, "\n");
+	
+   	return proc_calc_metrics(page, start, off, count, eof, len);
+}
+
+
+
+int __init start_mv_eth_tool(void)
+{
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)
+     mv_eth_tool = proc_net_create(FILE_NAME , 0666 , NULL);
+#else
+     mv_eth_tool = create_proc_entry(FILE_NAME , 0666 , init_net.proc_net);
+#endif
+  mv_eth_tool->read_proc = mv_eth_tool_read;
+  mv_eth_tool->write_proc = mv_eth_tool_write;
+  mv_eth_tool->nlink = 1;
+  return 0;
+}
+
+module_init(start_mv_eth_tool);
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_network/mv_ethernet/mv_gateway.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_network/mv_ethernet/mv_gateway.c
@@ -0,0 +1,1428 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+*******************************************************************************/
+
+#include "mvCommon.h"  /* Should be included before mvSysHwConfig */
+#include <linux/kernel.h>
+#include <linux/version.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/skbuff.h>
+#include <linux/pci.h>
+#include <linux/ip.h>
+#include <linux/in.h>
+#include <linux/tcp.h>
+#include <net/ip.h>
+#include <net/xfrm.h>
+
+#include "mvOs.h"
+#include "dbg-trace.h"
+#include "mvSysHwConfig.h"
+#include "eth/mvEth.h"
+#include "eth-phy/mvEthPhy.h"
+#include "ctrlEnv/sys/mvSysGbe.h"
+#include "msApi.h"
+
+#include "mv_netdev.h"
+
+int SWITCH_PORT_CPU;
+int SWITCH_PORT_0;
+int SWITCH_PORT_1;
+int SWITCH_PORT_2;
+int SWITCH_PORT_3;
+int SWITCH_PORT_4;
+
+
+/* use this MACRO to find if a certain port (0-7) is actually connected */
+#define SWITCH_IS_PORT_CONNECTED(p)	                            \
+            ( ((p) == SWITCH_PORT_CPU) || ((p) == SWITCH_PORT_0) || \
+			  ((p) == SWITCH_PORT_1)   || ((p) == SWITCH_PORT_2) || \
+			  ((p) == SWITCH_PORT_3)   || ((p) == SWITCH_PORT_4) ) 
+
+/* helpers for VLAN tag handling */
+#define MV_GTW_PORT_VLAN_ID(grp,port)  ((grp)+(port)+1)
+#define MV_GTW_GROUP_VLAN_ID(grp)      (((grp)+1)<<8)
+#define MV_GTW_VLANID_TO_PORT(vlanid)  (((vlanid) & 0xf)-1)
+
+unsigned int        switch_enabled_ports;
+
+#ifdef CONFIG_MV_GTW_LINK_STATUS
+static int          switch_irq = -1;
+struct timer_list   switch_link_timer;
+#endif
+
+#ifdef CONFIG_MV_GTW_IGMP
+extern int mv_gtw_igmp_snoop_init(void);
+extern int mv_gtw_igmp_snoop_exit(void);
+extern int mv_gtw_igmp_snoop_process(struct sk_buff* skb, unsigned char port, unsigned char vlan_dbnum);
+#endif 
+
+/* Example: "mv_net_config=(eth0,00:99:88:88:99:77,0)(eth1,00:55:44:55:66:77,1:2:3:4),mtu=1500" */
+static char *cmdline = NULL;
+
+struct mv_gtw_config    gtw_config;
+
+GT_QD_DEV qddev,        *qd_dev = NULL;
+static GT_SYS_CONFIG    qd_cfg;
+
+static int mv_gtw_port2lport(int port)
+{
+    if(port==SWITCH_PORT_0) return 0;
+    if(port==SWITCH_PORT_1) return 1;
+    if(port==SWITCH_PORT_2) return 2;
+    if(port==SWITCH_PORT_3) return 3;
+    if(port==SWITCH_PORT_4) return 4;
+    return -1;
+} 
+
+/* Local function prototypes */
+
+/* Required to get the configuration string from the Kernel Command Line */
+int mv_gtw_cmdline_config(char *s);
+__setup("mv_net_config=", mv_gtw_cmdline_config);
+
+int mv_gtw_cmdline_config(char *s)
+{
+    cmdline = s;
+    return 1;
+}
+
+static int mv_gtw_check_open_bracket(char **p_net_config)
+{
+    if (**p_net_config == '(') {
+        (*p_net_config)++;
+	return 0;
+    }
+    printk("Syntax error: could not find opening bracket\n");
+    return -EINVAL;
+}
+
+static int mv_gtw_check_closing_bracket(char **p_net_config)
+{
+    if (**p_net_config == ')') {
+        (*p_net_config)++;
+	return 0;
+    }
+    printk("Syntax error: could not find closing bracket\n");
+    return -EINVAL;
+}
+
+static int mv_gtw_check_comma(char **p_net_config)
+{
+    if (**p_net_config == ',') {
+        (*p_net_config)++;
+	    return 0;
+    }
+    printk("Syntax error: could not find comma\n");
+    return -EINVAL;
+}
+
+
+static int mv_gtw_is_digit(char ch)
+{
+    if( ((ch >= '0') && (ch <= '9')) ||
+	((ch >= 'a') && (ch <= 'f')) ||
+	((ch >= 'A') && (ch <= 'F')) )
+	    return 0;
+
+    return -1;
+}
+
+static int mv_gtw_get_cmdline_mac_addr(char **p_net_config, int idx)
+{
+    /* the MAC address should look like: 00:99:88:88:99:77 */
+    /* that is, 6 two-digit numbers, separated by :        */
+    /* 6 times two-digits, plus 5 colons, total: 17 characters */
+    const int   exact_len = 17; 
+    int         i = 0;
+    int         syntax_err = 0;
+    char	    *p_mac_addr = *p_net_config;
+
+    /* check first 15 characters in groups of 3 characters at a time */
+    for (i = 0; i < exact_len-2; i+=3) 
+    {
+	    if ( (mv_gtw_is_digit(**p_net_config) == 0) &&
+	         (mv_gtw_is_digit(*(*p_net_config+1)) == 0) &&
+	         ((*(*p_net_config+2)) == ':') )
+	    {
+	        (*p_net_config) += 3;
+	    }
+	    else {
+	        syntax_err = 1;
+	        break;
+	    }
+    }
+
+    /* two characters remaining, must be two digits */
+    if ( (mv_gtw_is_digit(**p_net_config) == 0) &&
+         (mv_gtw_is_digit(*(*p_net_config+1)) == 0) )
+    {
+	    (*p_net_config) += 2;
+    }
+    else
+	    syntax_err = 1;
+
+    if (syntax_err == 0) {
+        mvMacStrToHex(p_mac_addr, gtw_config.vlan_cfg[idx].macaddr);
+        return 0;
+    }
+    printk("Syntax error while parsing MAC address from command line\n");
+    return -EINVAL;
+}
+
+static void mv_gtw_update_curr_port_mask(char digit, unsigned int *curr_port_mask)
+{
+    if (digit == '0')
+	    *curr_port_mask |= (1<<SWITCH_PORT_0);
+    if (digit == '1')
+	    *curr_port_mask |= (1<<SWITCH_PORT_1);
+    if (digit == '2')
+	    *curr_port_mask |= (1<<SWITCH_PORT_2);
+    if (digit == '3')
+	    *curr_port_mask |= (1<<SWITCH_PORT_3);
+    if (digit == '4')
+	    *curr_port_mask |= (1<<SWITCH_PORT_4);
+}
+
+static int mv_gtw_get_port_mask(char **p_net_config, int idx)
+{
+    /* the port mask should look like this: */
+    /* example 1: 0 */
+    /* example 2: 1:2:3:4 */
+    /* that is, one or more one-digit numbers, separated with : */
+    /* we have up to GTW_MAX_NUM_OF_IFS interfaces */
+
+    unsigned int curr_port_mask = 0, i = 0;
+    int syntax_err = 0;
+
+    for (i = 0; i < GTW_MAX_NUM_OF_IFS; i++) 
+    {
+	    if (mv_gtw_is_digit(**p_net_config) == 0) 
+        {
+	        if (*(*p_net_config+1) == ':') 
+            {
+		        mv_gtw_update_curr_port_mask(**p_net_config, &curr_port_mask);
+		        (*p_net_config) += 2;
+	        }
+	        else if (*(*p_net_config+1) == ')') 
+            {
+		        mv_gtw_update_curr_port_mask(**p_net_config, &curr_port_mask);
+		        (*p_net_config)++;
+		        break;
+	        }
+	        else {
+		        syntax_err = 1;
+		        break;
+	        }
+	    }
+	    else {
+	        syntax_err = 1;
+	        break;
+	    }
+    }
+
+    if (syntax_err == 0) {
+	    gtw_config.vlan_cfg[idx].ports_mask = curr_port_mask;
+	    return 0;
+    }
+    printk("Syntax error while parsing port mask from command line\n");
+    return -EINVAL;
+}
+
+static int mv_gtw_get_mtu(char **p_net_config)
+{
+    /* the mtu value is constructed as follows: */
+    /* mtu=value                                */
+    unsigned int mtu;
+    int syntax_err = 0;
+
+    if(strncmp(*p_net_config,"mtu=",4) == 0)
+    {
+        *p_net_config += 4;
+        mtu = 0;
+        while((**p_net_config >= '0') && (**p_net_config <= '9'))
+        {       
+            mtu = (mtu * 10) + (**p_net_config - '0');
+            *p_net_config += 1;
+        }
+        if(**p_net_config != '\0')
+            syntax_err = 1;
+    }
+    else
+    {
+        syntax_err = 1;
+    }
+
+    if(syntax_err == 0)
+    {
+        gtw_config.mtu = mtu;
+        printk("      o MTU set to %d.\n", mtu);
+        return 0;
+    }
+
+    printk("Syntax error while parsing mtu value from command line\n");
+    return -EINVAL;
+}
+
+static int mv_gtw_parse_net_config(char* cmdline)
+{
+    char    *p_net_config = cmdline;
+    int     i = 0;
+    int     status = 0;
+
+    if (p_net_config == NULL)
+	    return -EINVAL;
+
+    for (i=0; (i<GTW_MAX_NUM_OF_IFS) && (*p_net_config != '\0'); i++) 
+    {
+        status = mv_gtw_check_open_bracket(&p_net_config);
+	    if (status != 0)
+	        break;
+	    status = mv_gtw_get_cmdline_mac_addr(&p_net_config, i);
+	    if (status != 0)
+	        break;
+	    status = mv_gtw_check_comma(&p_net_config);
+	    if (status != 0)
+	        break;
+	    status = mv_gtw_get_port_mask(&p_net_config, i);
+	    if (status != 0)
+	        break;
+	    status = mv_gtw_check_closing_bracket(&p_net_config);
+	    if (status != 0)
+	        break;
+
+	    gtw_config.vlans_num++;
+
+        /* If we have a comma after the closing bracket, then interface */
+        /* definition is done.                                          */
+        if(*p_net_config == ',')
+            break;
+    }
+
+    if(*p_net_config != '\0')
+    {
+        status = mv_gtw_check_comma(&p_net_config);
+        if (status == 0)
+        {
+            status = mv_gtw_get_mtu(&p_net_config);
+        }
+    }
+    else
+    {
+        gtw_config.mtu = 1500;
+        printk("      o Using default MTU %d\n", gtw_config.mtu);
+    }
+    
+    /* at this point, we have parsed up to GTW_MAX_NUM_OF_IFS, and the mtu value */
+    /* if the net_config string is not finished yet, then its format is invalid */
+    if (*p_net_config != '\0')
+    {
+        printk("Gateway config string is too long: %s\n", p_net_config);
+        status = -EINVAL;
+    }
+    return status;
+}
+
+GT_BOOL gtwReadMiiWrap(GT_QD_DEV* dev, unsigned int portNumber, unsigned int MIIReg, unsigned int* value)
+{
+    unsigned long   flags;
+    unsigned short  tmp;
+    MV_STATUS       status;
+
+    spin_lock_irqsave(&mii_lock, flags);
+
+    status = mvEthPhyRegRead(portNumber, MIIReg , &tmp);
+    spin_unlock_irqrestore(&mii_lock, flags);
+    *value = tmp;
+
+    if (status == MV_OK)
+        return GT_TRUE;
+
+    return GT_FALSE;
+}
+
+
+GT_BOOL gtwWriteMiiWrap(GT_QD_DEV* dev, unsigned int portNumber, unsigned int MIIReg, unsigned int data)
+{
+    unsigned long   flags;
+    unsigned short  tmp;
+    MV_STATUS       status;
+
+    spin_lock_irqsave(&mii_lock, flags);
+    tmp = (unsigned short)data;
+    status = mvEthPhyRegWrite(portNumber, MIIReg, tmp);
+
+    spin_unlock_irqrestore(&mii_lock, flags);
+
+    if (status == MV_OK)
+        return GT_TRUE;
+
+    return GT_FALSE;
+} 
+
+static int mv_gtw_set_port_based_vlan(unsigned int ports_mask)
+{
+    unsigned int p, pl;
+    unsigned char cnt;
+    GT_LPORT port_list[MAX_SWITCH_PORTS];
+
+    for(p=0; p<qd_dev->numOfPorts; p++) {
+	if( MV_BIT_CHECK(ports_mask, p) && (p != SWITCH_PORT_CPU) ) {
+	    ETH_DBG( ETH_DBG_LOAD|ETH_DBG_MCAST|ETH_DBG_VLAN, ("port based vlan, port %d: ",p));
+	    for(pl=0,cnt=0; pl<qd_dev->numOfPorts; pl++) {
+		if( MV_BIT_CHECK(ports_mask, pl) && (pl != p) ) {
+		    ETH_DBG( ETH_DBG_LOAD|ETH_DBG_MCAST|ETH_DBG_VLAN, ("%d ",pl));
+		    port_list[cnt] = pl;
+                    cnt++;
+                }
+	    }
+            if( gvlnSetPortVlanPorts(qd_dev, p, port_list, cnt) != GT_OK) {
+	        printk("gvlnSetPortVlanPorts failed\n");
+                return -1;
+            }
+	    ETH_DBG( ETH_DBG_LOAD|ETH_DBG_MCAST|ETH_DBG_VLAN, ("\n"));
+        }
+    }
+    return 0;
+}
+
+
+static int mv_gtw_set_vlan_in_vtu(unsigned short vlan_id,unsigned int ports_mask)
+{
+    GT_VTU_ENTRY vtu_entry;
+    unsigned int p;
+
+    vtu_entry.vid = vlan_id;
+    vtu_entry.DBNum = MV_GTW_VLAN_TO_GROUP(vlan_id);
+    vtu_entry.vidPriOverride = GT_FALSE;
+    vtu_entry.vidPriority = 0;
+    vtu_entry.vidExInfo.useVIDFPri = GT_FALSE;
+    vtu_entry.vidExInfo.vidFPri = 0;
+    vtu_entry.vidExInfo.useVIDQPri = GT_FALSE;
+    vtu_entry.vidExInfo.vidQPri = 0;
+    vtu_entry.vidExInfo.vidNRateLimit = GT_FALSE;
+    ETH_DBG( ETH_DBG_LOAD|ETH_DBG_MCAST|ETH_DBG_VLAN, ("vtu entry: vid=0x%x, port ", vtu_entry.vid));
+    for(p=0; p<qd_dev->numOfPorts; p++) {
+        if(MV_BIT_CHECK(ports_mask, p)) {
+	    ETH_DBG( ETH_DBG_LOAD|ETH_DBG_MCAST|ETH_DBG_VLAN, ("%d ", p));
+	    if(qd_dev->deviceId == GT_88E6061) {
+                /* for 6061 device, no double/provider tag controlling on ingress. */
+                /* therefore, we need to strip the tag on egress on all ports except cpu port */
+                /* anyway, if we're using header mode no vlan-tag need to be added here */
+		vtu_entry.vtuData.memberTagP[p] = MEMBER_EGRESS_UNMODIFIED;
+	    }
+	    else {
+		vtu_entry.vtuData.memberTagP[p] = MEMBER_EGRESS_UNMODIFIED;
+	    }
+	}
+	else {
+	    vtu_entry.vtuData.memberTagP[p] = NOT_A_MEMBER;
+	}
+	vtu_entry.vtuData.portStateP[p] = 0;
+    }
+    if(gvtuAddEntry(qd_dev, &vtu_entry) != GT_OK) {
+        printk("gvtuAddEntry failed\n");
+        return -1;
+    }
+
+    ETH_DBG( ETH_DBG_LOAD|ETH_DBG_MCAST|ETH_DBG_VLAN, ("\n"));
+    return 0;
+}
+
+int mv_gtw_set_mac_addr_to_switch(unsigned char *mac_addr, unsigned char db, unsigned int ports_mask, unsigned char op)
+{
+    GT_ATU_ENTRY mac_entry;
+    struct mv_vlan_cfg *nc;
+
+    /* validate db with VLAN id */
+    nc = &gtw_config.vlan_cfg[db];
+    if(MV_GTW_VLAN_TO_GROUP(nc->vlan_grp_id) != db) {
+        printk("mv_gtw_set_mac_addr_to_switch (invalid db)\n");
+	return -1;
+    }
+
+    memset(&mac_entry,0,sizeof(GT_ATU_ENTRY));
+
+    mac_entry.trunkMember = GT_FALSE;
+    mac_entry.prio = 0;
+    mac_entry.exPrio.useMacFPri = GT_FALSE;
+    mac_entry.exPrio.macFPri = 0;
+    mac_entry.exPrio.macQPri = 0;
+    mac_entry.DBNum = db;
+    mac_entry.portVec = ports_mask;
+    memcpy(mac_entry.macAddr.arEther,mac_addr,6);
+
+    if(is_multicast_ether_addr(mac_addr))
+	mac_entry.entryState.mcEntryState = GT_MC_STATIC;
+    else
+	mac_entry.entryState.ucEntryState = GT_UC_NO_PRI_STATIC;
+
+    ETH_DBG(ETH_DBG_ALL, ("mv_gateway: db%d port-mask=0x%x, %02x:%02x:%02x:%02x:%02x:%02x ",
+	    db, (unsigned int)mac_entry.portVec,
+	    mac_entry.macAddr.arEther[0],mac_entry.macAddr.arEther[1],mac_entry.macAddr.arEther[2],
+	    mac_entry.macAddr.arEther[3],mac_entry.macAddr.arEther[4],mac_entry.macAddr.arEther[5]));
+
+    if((op == 0) || (mac_entry.portVec == 0)) {
+        if(gfdbDelAtuEntry(qd_dev, &mac_entry) != GT_OK) {
+	    printk("gfdbDelAtuEntry failed\n");
+	    return -1;
+        }
+	ETH_DBG(ETH_DBG_ALL, ("deleted\n"));
+    }
+    else {
+        if(gfdbAddMacEntry(qd_dev, &mac_entry) != GT_OK) {
+	    printk("gfdbAddMacEntry failed\n");
+	    return -1;
+        }
+	ETH_DBG(ETH_DBG_ALL, ("added\n"));
+    }
+
+    return 0;
+}
+
+#ifdef CONFIG_MV_GTW_IGMP
+int mv_gtw_enable_igmp(void)
+{
+    unsigned char p;
+
+    ETH_DBG( ETH_DBG_IGMP, ("enabling L2 IGMP snooping\n"));
+
+    /* enable IGMP snoop on all ports (except cpu port) */
+    for(p=0; p<qd_dev->numOfPorts; p++) {
+	if(p != SWITCH_PORT_CPU) {
+	    if(gprtSetIGMPSnoop(qd_dev, p, GT_TRUE) != GT_OK) {
+		printk("gprtSetIGMPSnoop failed\n");
+		return -1;
+	    }
+	}
+    }
+    return -1;
+}
+#endif /* CONFIG_MV_GTW_IGMP */
+
+
+int __init mv_gtw_net_setup(int port)
+{
+    struct mv_vlan_cfg  *nc;
+    int                 i = 0;
+
+    SWITCH_PORT_CPU = mvBoardSwitchCpuPortGet(port);
+    SWITCH_PORT_0   = mvBoardSwitchPortGet(port, 0);
+    SWITCH_PORT_1   = mvBoardSwitchPortGet(port, 1);
+    SWITCH_PORT_2   = mvBoardSwitchPortGet(port, 2);
+    SWITCH_PORT_3   = mvBoardSwitchPortGet(port, 3);
+    SWITCH_PORT_4   = mvBoardSwitchPortGet(port, 4);
+
+#ifdef CONFIG_MV_GTW_LINK_STATUS
+    switch_irq = mvBoardLinkStatusIrqGet(port);
+    if(switch_irq != -1)
+        switch_irq += IRQ_GPP_START;
+#endif
+
+    /* build the net config table */
+    memset(&gtw_config, 0, sizeof(struct mv_gtw_config));
+
+    if(cmdline != NULL) 
+    {
+	    printk("      o Using command line network interface configuration\n");
+    }
+    else
+    {
+	    printk("      o Using default network configuration, overriding boot MAC address\n");
+	    cmdline = CONFIG_MV_GTW_CONFIG;
+    }
+
+	if (mv_gtw_parse_net_config(cmdline) < 0) 
+    {
+	    printk("Error parsing mv_net_config\n");
+	    return -EINVAL;
+    }           
+
+    /* CPU port should always be enabled */
+    switch_enabled_ports = (1 << SWITCH_PORT_CPU); 
+
+    for(i=0, nc=&gtw_config.vlan_cfg[i]; i<gtw_config.vlans_num; i++, nc++) 
+    {
+	    /* VLAN ID */
+	    nc->vlan_grp_id = MV_GTW_GROUP_VLAN_ID(i);
+	    nc->ports_link = 0;
+	    nc->header = cpu_to_be16(	(MV_GTW_VLAN_TO_GROUP(nc->vlan_grp_id) << 12) 
+                    			| nc->ports_mask);
+	    /* print info */
+	    printk("      o mac_addr %02x:%02x:%02x:%02x:%02x:%02x, VID 0x%03x, port list: ", 
+                nc->macaddr[0], nc->macaddr[1], nc->macaddr[2], 
+		        nc->macaddr[3], nc->macaddr[4], nc->macaddr[5], nc->vlan_grp_id);
+
+	    if(nc->ports_mask & (1<<SWITCH_PORT_CPU)) 
+            printk("port-CPU ");
+	    if(nc->ports_mask & (1<<SWITCH_PORT_0)) 
+            printk("port-0 ");
+	    if(nc->ports_mask & (1<<SWITCH_PORT_1)) 
+            printk("port-1 ");
+	    if(nc->ports_mask & (1<<SWITCH_PORT_2)) 
+            printk("port-2 ");
+	    if(nc->ports_mask & (1<<SWITCH_PORT_3)) 
+            printk("port-3 ");
+	    if(nc->ports_mask & (1<<SWITCH_PORT_4)) 
+            printk("port-4 ");
+	    printk("\n");
+
+	    /* collect per-interface port_mask into a global port_mask, used for enabling the Switch ports */
+	    switch_enabled_ports |= nc->ports_mask;
+    }
+
+    return 0;
+}
+
+static int mv_switch_init(int port)
+{
+    unsigned int        i, p;
+    unsigned char       cnt;
+    GT_LPORT            port_list[MAX_SWITCH_PORTS];
+    struct mv_vlan_cfg  *nc;
+    GT_JUMBO_MODE       jumbo_mode;
+
+    /* printk("init switch layer... "); */
+
+    memset((char*)&qd_cfg,0,sizeof(GT_SYS_CONFIG));
+
+    /* init config structure for qd package */
+    qd_cfg.BSPFunctions.readMii   = gtwReadMiiWrap;
+    qd_cfg.BSPFunctions.writeMii  = gtwWriteMiiWrap;
+    qd_cfg.BSPFunctions.semCreate = NULL;
+    qd_cfg.BSPFunctions.semDelete = NULL;
+    qd_cfg.BSPFunctions.semTake   = NULL;
+    qd_cfg.BSPFunctions.semGive   = NULL;
+    qd_cfg.initPorts = GT_TRUE;
+    qd_cfg.cpuPortNum = SWITCH_PORT_CPU;
+    if (mvBoardSmiScanModeGet(port) == 1) {
+	qd_cfg.mode.baseAddr = 0;
+        qd_cfg.mode.scanMode = SMI_MANUAL_MODE;
+    }
+    else if (mvBoardSmiScanModeGet(port) == 2) {
+	qd_cfg.mode.baseAddr = 0xA;
+        qd_cfg.mode.scanMode = SMI_MULTI_ADDR_MODE;
+    }
+    /* load switch sw package */
+    if( qdLoadDriver(&qd_cfg, &qddev) != GT_OK) {
+	printk("qdLoadDriver failed\n");
+        return -1;
+    }
+    qd_dev = &qddev;
+
+    ETH_DBG( ETH_DBG_LOAD, ("Device ID     : 0x%x\n",qd_dev->deviceId));
+    ETH_DBG( ETH_DBG_LOAD, ("Base Reg Addr : 0x%x\n",qd_dev->baseRegAddr));
+    ETH_DBG( ETH_DBG_LOAD, ("No. of Ports  : %d\n",qd_dev->numOfPorts));
+    ETH_DBG( ETH_DBG_LOAD, ("CPU Ports     : %d\n",qd_dev->cpuPortNum));
+
+    /* disable all ports */
+    for(p=0; p<qd_dev->numOfPorts; p++) {
+	    gstpSetPortState(qd_dev, p, GT_PORT_DISABLE);
+    }
+
+    /* initialize Switch according to Switch ID */
+    switch (qd_dev->deviceId) 
+    {
+	    case GT_88E6131:
+	    case GT_88E6108:
+	        /* enable external ports */
+	        ETH_DBG( ETH_DBG_LOAD, ("enable phy polling for external ports\n"));
+	        if(gsysSetPPUEn(qd_dev, GT_TRUE) != GT_OK) {
+		        printk("gsysSetPPUEn failed\n");
+		        return -1;
+	        }
+	        /* Note: The GbE unit in SoCs connected to these switches does not support Marvell Header Mode */
+	        /* so we always use VLAN tags here */
+	        /* set cpu-port with ingress double-tag mode */
+	        ETH_DBG( ETH_DBG_LOAD, ("cpu port ingress double-tag mode\n"));
+	        if(gprtSetDoubleTag(qd_dev, SWITCH_PORT_CPU, GT_TRUE) != GT_OK) {
+	            printk("gprtSetDoubleTag failed\n");
+	            return -1;
+	        }
+	        /* set cpu-port with egrees add-tag mode */
+	        ETH_DBG( ETH_DBG_LOAD, ("cpu port egrees add-tag mode\n"));
+	        if(gprtSetEgressMode(qd_dev, SWITCH_PORT_CPU, GT_ADD_TAG) != GT_OK) {
+		        printk("gprtSetEgressMode failed\n");
+		    return -1;
+	        }
+	        /* config the switch to use the double tag data (relevant to cpu-port only) */
+	        ETH_DBG( ETH_DBG_LOAD, ("use double-tag and remove\n"));
+	        if(gsysSetUseDoubleTagData(qd_dev,GT_TRUE) != GT_OK) {
+	            printk("gsysSetUseDoubleTagData failed\n");
+	            return -1;
+	        }
+	        /* set cpu-port with 802.1q secured mode */
+	        ETH_DBG( ETH_DBG_LOAD, ("cpu port-based 802.1q secure mode\n"));
+	        if(gvlnSetPortVlanDot1qMode(qd_dev,SWITCH_PORT_CPU,GT_SECURE) != GT_OK) {
+		        printk("gvlnSetPortVlanDot1qMode failed\n");
+	            return -1;
+	        }
+	        break;
+	
+	    case GT_88E6065:
+	        /* set CPU port number */
+            if(gsysSetCPUPort(qd_dev, SWITCH_PORT_CPU) != GT_OK) {
+	            printk("gsysSetCPUPort failed\n");
+	            return -1;
+	        }
+
+	        if(gstatsFlushAll(qd_dev) != GT_OK)
+    	        printk("gstatsFlushAll failed\n");
+
+	        /* set all ports not to unmodify the vlan tag on egress */
+	        for(i=0; i<qd_dev->numOfPorts; i++) 
+            {
+		        if(gprtSetEgressMode(qd_dev, i, GT_UNMODIFY_EGRESS) != GT_OK) {
+		            printk("gprtSetEgressMode GT_UNMODIFY_EGRESS failed\n");
+		            return -1;
+		        }
+	        }
+	        if(gprtSetHeaderMode(qd_dev, SWITCH_PORT_CPU, GT_TRUE) != GT_OK) {
+		        printk("gprtSetHeaderMode GT_TRUE failed\n");
+		        return -1;
+	        }
+
+	        /* init counters */
+	        if(gprtClearAllCtr(qd_dev) != GT_OK)
+	            printk("gprtClearAllCtr failed\n");
+	        if(gprtSetCtrMode(qd_dev, GT_CTR_ALL) != GT_OK)
+	            printk("gprtSetCtrMode failed\n");
+
+	        break;
+
+	    case GT_88E6061: 
+	        /* set CPU port number */
+            if(gsysSetCPUPort(qd_dev, SWITCH_PORT_CPU) != GT_OK) {
+	            printk("gsysSetCPUPort failed\n");
+	            return -1;
+	        }
+
+	        /* set all ports not to unmodify the vlan tag on egress */
+	        for(i=0; i<qd_dev->numOfPorts; i++) {
+		        if(gprtSetEgressMode(qd_dev, i, GT_UNMODIFY_EGRESS) != GT_OK) {
+		            printk("gprtSetEgressMode GT_UNMODIFY_EGRESS failed\n");
+		            return -1;
+		        }
+	        }
+	    
+            if(gprtSetHeaderMode(qd_dev,SWITCH_PORT_CPU,GT_TRUE) != GT_OK) {
+		        printk("gprtSetHeaderMode GT_TRUE failed\n");
+		        return -1;
+	        }   
+
+	        /* init counters */
+	        if(gprtClearAllCtr(qd_dev) != GT_OK)
+	            printk("gprtClearAllCtr failed\n");
+	        if(gprtSetCtrMode(qd_dev, GT_CTR_ALL) != GT_OK)
+	            printk("gprtSetCtrMode failed\n");
+
+	        break;
+
+	    case GT_88E6161:
+	    case GT_88E6165:
+            if(gstatsFlushAll(qd_dev) != GT_OK) {
+                printk("gstatsFlushAll failed\n");
+            }
+
+	        /* set all ports not to unmodify the vlan tag on egress */
+	        for(i=0; i<qd_dev->numOfPorts; i++) {
+		        if(gprtSetEgressMode(qd_dev, i, GT_UNMODIFY_EGRESS) != GT_OK) {
+		            printk("gprtSetEgressMode GT_UNMODIFY_EGRESS failed\n");
+		            return -1;
+		        }
+	        }
+	        if(gprtSetHeaderMode(qd_dev,SWITCH_PORT_CPU,GT_TRUE) != GT_OK) {
+		        printk("gprtSetHeaderMode GT_TRUE failed\n");
+		        return -1;
+	        }
+
+            	/* Setup jumbo frames mode.                         */
+            	/* 2 bytes for header Marvell header.               */
+	        if((gtw_config.mtu) <= 1522)
+                	jumbo_mode = GT_JUMBO_MODE_1522;
+            	else if((gtw_config.mtu) <= 2048)
+                	jumbo_mode = GT_JUMBO_MODE_2048;
+            	else
+                	jumbo_mode = GT_JUMBO_MODE_10240;
+
+            	for(i=0; i<qd_dev->numOfPorts; i++) {
+                	if(gsysSetJumboMode(qd_dev, i, jumbo_mode) != GT_OK) {
+                    		printk("gsysSetJumboMode %d failed\n",jumbo_mode);
+                    		return -1;
+                	}
+            	}
+	        break;	
+
+	    default:
+	        printk("Unsupported Switch. Switch ID is 0x%X.\n",qd_dev->deviceId);
+	        return -1;
+    }
+
+    /* set priorities rules */
+    for(i=0; i<qd_dev->numOfPorts; i++) {
+        /* default port priority to queue zero */
+	    if(gcosSetPortDefaultTc(qd_dev, i, 0) != GT_OK)
+	        printk("gcosSetPortDefaultTc failed (port %d)\n", i);
+        
+        /* enable IP TOS Prio */
+	    if(gqosIpPrioMapEn(qd_dev, i, GT_TRUE) != GT_OK)
+	        printk("gqosIpPrioMapEn failed (port %d)\n",i);
+	
+        /* set IP QoS */
+	    if(gqosSetPrioMapRule(qd_dev, i, GT_FALSE) != GT_OK)
+	        printk("gqosSetPrioMapRule failed (port %d)\n",i);
+        
+        /* disable Vlan QoS Prio */
+	    if(gqosUserPrioMapEn(qd_dev, i, GT_FALSE) != GT_OK)
+	        printk("gqosUserPrioMapEn failed (port %d)\n",i);
+        
+        /* Set force flow control to FALSE for all ports */
+	    if(gprtSetForceFc(qd_dev, i, GT_FALSE) != GT_OK)
+	        printk("gprtSetForceFc failed (port %d)\n",i);
+    }
+
+    /* The switch CPU port is not part of the VLAN, but rather connected by tunneling to each */
+    /* of the VLAN's ports. Our MAC addr will be added during start operation to the VLAN DB  */
+    /* at switch level to forward packets with this DA to CPU port.                           */
+    ETH_DBG( ETH_DBG_LOAD, ("Enabling Tunneling on ports: "));
+    for(i=0; i<qd_dev->numOfPorts; i++) {
+	    if(i != SWITCH_PORT_CPU) {
+	        if(gprtSetVlanTunnel(qd_dev, i, GT_TRUE) != GT_OK) {
+		        printk("gprtSetVlanTunnel failed (port %d)\n",i);
+		        return -1;
+	        }
+	        else {
+		        ETH_DBG( ETH_DBG_LOAD, ("%d ",i));
+	        }
+	    }
+    }
+    ETH_DBG( ETH_DBG_LOAD, ("\n"));
+
+    /* configure ports (excluding CPU port) for each network interface (VLAN): */
+    for(i=0, nc=&gtw_config.vlan_cfg[i]; i<gtw_config.vlans_num; i++,nc++) {
+        ETH_DBG( ETH_DBG_LOAD, ("vlan%d configuration (nc->ports_mask = 0x%08x) \n",
+                                i, nc->ports_mask));
+	    /* set port's defaul private vlan id and database number (DB per group): */
+	    for(p=0; p<qd_dev->numOfPorts; p++) {
+	        if( MV_BIT_CHECK(nc->ports_mask, p) && (p != SWITCH_PORT_CPU) ) {
+		        ETH_DBG(ETH_DBG_LOAD,("port %d default private vlan id: 0x%x\n", p, MV_GTW_PORT_VLAN_ID(nc->vlan_grp_id,p)));
+		        if( gvlnSetPortVid(qd_dev, p, MV_GTW_PORT_VLAN_ID(nc->vlan_grp_id,p)) != GT_OK ) {
+			        printk("gvlnSetPortVid failed");
+			        return -1;
+		        }
+		        if( gvlnSetPortVlanDBNum(qd_dev, p, MV_GTW_VLAN_TO_GROUP(nc->vlan_grp_id)) != GT_OK) {
+		            printk("gvlnSetPortVlanDBNum failed\n");
+		            return -1;
+		        }
+	        }
+	    }
+
+	    /* set port's port-based vlan (CPU port is not part of VLAN) */
+        if(mv_gtw_set_port_based_vlan(nc->ports_mask & ~(1<<SWITCH_PORT_CPU)) != 0) {
+	        printk("mv_gtw_set_port_based_vlan failed\n");
+	    }
+
+        /* set vtu with group vlan id (used in tx) */
+        if(mv_gtw_set_vlan_in_vtu(nc->vlan_grp_id, nc->ports_mask | (1<<SWITCH_PORT_CPU)) != 0) {
+	        printk("mv_gtw_set_vlan_in_vtu failed\n");
+	    }
+
+        /* set vtu with each port private vlan id (used in rx) */
+ 	    for(p=0; p<qd_dev->numOfPorts; p++) {
+	        if(MV_BIT_CHECK(nc->ports_mask, p) && (p!=SWITCH_PORT_CPU)) {
+                if(mv_gtw_set_vlan_in_vtu(MV_GTW_PORT_VLAN_ID(nc->vlan_grp_id,p),
+                                          nc->ports_mask & ~(1<<SWITCH_PORT_CPU)) != 0) {
+		            printk("mv_gtw_set_vlan_in_vtu failed\n");
+		        }
+	        }
+	    }
+    }
+
+    /* set cpu-port with port-based vlan to all other ports */
+    ETH_DBG( ETH_DBG_LOAD, ("cpu port-based vlan:"));
+    for(p=0,cnt=0; p<qd_dev->numOfPorts; p++) {
+        if(p != SWITCH_PORT_CPU) {
+	        ETH_DBG( ETH_DBG_LOAD, ("%d ",p));
+            port_list[cnt] = p;
+            cnt++;
+        }
+    }
+    ETH_DBG( ETH_DBG_LOAD, ("\n"));
+    if( gvlnSetPortVlanPorts(qd_dev, SWITCH_PORT_CPU, port_list, cnt) != GT_OK) {
+        printk("gvlnSetPortVlanPorts failed\n");
+        return -1;
+    }
+
+    if(gfdbFlush(qd_dev,GT_FLUSH_ALL) != GT_OK) {
+	    printk("gfdbFlush failed\n");
+    }
+
+    /* done! enable all Switch ports according to the net config table */
+    ETH_DBG( ETH_DBG_LOAD, ("enabling: ports "));
+    for(p=0; p<qd_dev->numOfPorts; p++) {
+	    if (MV_BIT_CHECK(switch_enabled_ports, p)) {
+	        ETH_DBG( ETH_DBG_LOAD, ("%d ",p));
+	        if(gstpSetPortState(qd_dev, p, GT_PORT_FORWARDING) != GT_OK) {
+	            printk("gstpSetPortState failed\n");
+	        }
+	    }
+    }
+    ETH_DBG( ETH_DBG_LOAD, ("\n"));
+
+#ifdef CONFIG_MV_GTW_LINK_STATUS
+    /* Enable Phy Link Status Changed interrupt at Phy level for the all enabled ports */
+    for(p=0; p<qd_dev->numOfPorts; p++) {
+	    if(MV_BIT_CHECK(switch_enabled_ports, p) && (p != SWITCH_PORT_CPU)) {
+	        if(gprtPhyIntEnable(qd_dev, p, (GT_LINK_STATUS_CHANGED)) != GT_OK) {
+		        printk("gprtPhyIntEnable failed port %d\n", p);
+	        }
+	    }
+    }
+
+    if ((qd_dev->deviceId != GT_88E6161) && (qd_dev->deviceId != GT_88E6165)) {
+    	if (switch_irq != -1) {
+            if(eventSetActive(qd_dev, GT_PHY_INTERRUPT) != GT_OK) {
+	    	    printk("eventSetActive failed\n");
+            }
+    	}
+    }
+    else {
+	    GT_DEV_EVENT gt_event = {GT_DEV_INT_PHY, 0, 0x1F}; /* 0x1F is a bit mask for ports 0-4 */
+	    if (switch_irq != -1) {
+	        if(eventSetDevInt(qd_dev, &gt_event) != GT_OK) {
+		        printk("eventSetDevInt failed\n");
+	        }
+	        if(eventSetActive(qd_dev, GT_DEVICE_INT) != GT_OK) {
+    	    	printk("eventSetActive failed\n");
+            }
+	    }
+    }
+#endif /* CONFIG_MV_GTW_LINK_STATUS */
+
+    /* Configure Ethernet related LEDs, currently according to Switch ID */
+    switch (qd_dev->deviceId) {
+	    case GT_88E6131:
+	    case GT_88E6108:
+            /* config LEDs: Bi-Color Mode-4:  */
+            /* 1000 Mbps Link - Solid Green; 1000 Mbps Activity - Blinking Green */
+            /* 100 Mbps Link - Solid Red; 100 Mbps Activity - Blinking Red */
+            for(p=0; p<qd_dev->numOfPorts; p++) {	        
+                if( (p != SWITCH_PORT_CPU) && (SWITCH_IS_PORT_CONNECTED(p)) ) {
+			/* Configure Register 16 page 3 to 0x888F for mode 4 */
+	                if(gprtSetPagedPhyReg(qd_dev,p,16,3,0x888F)) { 
+		                printk("gprtSetPagedPhyReg failed (port=%d)\n", p);
+	                }
+			    /* Configure Register 17 page 3 to 0x4400 50% mixed LEDs */
+		            if(gprtSetPagedPhyReg(qd_dev,p,17,3,0x4400)) {
+		                printk("gprtSetPagedPhyReg failed (port=%d)\n", p);
+	                }
+	            }
+            }
+	        break;
+
+	    case GT_88E6161:
+	    case GT_88E6165:
+		    break; /* do nothing */
+
+	    default:
+	        for(p=0; p<qd_dev->numOfPorts; p++) {
+	            if( (p != SWITCH_PORT_CPU) && (SWITCH_IS_PORT_CONNECTED(p)) ) {
+	                if(gprtSetPhyReg(qd_dev,p,22,0x1FFA)) { 
+                        /* Configure Register 22 LED0 to 0xA for Link/Act */
+	    	            printk("gprtSetPhyReg failed (port=%d)\n", p);
+		            }
+	            }
+	        }
+	        break;
+    }
+
+    /* printk("done\n"); */
+
+    return 0;
+}
+
+int mv_gtw_switch_tos_get(int port, unsigned char tos)
+{
+    unsigned char   queue;
+    int             rc;
+
+    rc = gcosGetDscp2Tc(qd_dev, tos>>2, &queue);
+    if(rc)
+        return -1;
+
+    return (int)queue;
+}
+
+int mv_gtw_switch_tos_set(int port, unsigned char tos, int queue)
+{
+    return gcosSetDscp2Tc(qd_dev, tos>>2, (unsigned char)queue);
+}
+
+static struct net_device* mv_gtw_main_net_dev_get(void)
+{
+    int                 i;
+    mv_eth_priv         *priv;
+    struct net_device   *dev;
+
+    for (i=0; i<mv_net_devs_num; i++) {
+        dev = mv_net_devs[i];
+        priv = MV_ETH_PRIV(dev);
+
+        if (netif_running(dev) && priv->isGtw)
+            return dev;
+    }
+    return NULL;
+}
+
+int mv_gtw_set_mac_addr( struct net_device *dev, void *p )
+{
+    struct mv_vlan_cfg *vlan_cfg = MV_NETDEV_VLAN(dev);
+    struct sockaddr *addr = p;
+
+    if(!is_valid_ether_addr(addr->sa_data))
+	    return -EADDRNOTAVAIL;
+
+    /* remove old mac addr from VLAN DB */
+    mv_gtw_set_mac_addr_to_switch(dev->dev_addr,MV_GTW_VLAN_TO_GROUP(vlan_cfg->vlan_grp_id),(1<<SWITCH_PORT_CPU),0);
+
+    memcpy(dev->dev_addr, addr->sa_data, 6);
+
+    /* add new mac addr to VLAN DB */
+    mv_gtw_set_mac_addr_to_switch(dev->dev_addr,MV_GTW_VLAN_TO_GROUP(vlan_cfg->vlan_grp_id),(1<<SWITCH_PORT_CPU),1);
+
+    printk("mv_gateway: %s change mac address to %02x:%02x:%02x:%02x:%02x:%02x\n", 
+        dev->name, *(dev->dev_addr), *(dev->dev_addr+1), *(dev->dev_addr+2), 
+       *(dev->dev_addr+3), *(dev->dev_addr+4), *(dev->dev_addr+5));
+
+    return 0;
+}
+
+void    mv_gtw_set_multicast_list(struct net_device *dev)
+{
+    struct dev_mc_list *curr_addr = dev->mc_list;
+    struct mv_vlan_cfg *vlan_cfg = MV_NETDEV_VLAN(dev);
+    int i;
+    GT_ATU_ENTRY mac_entry;
+    GT_BOOL found = GT_FALSE;
+    GT_STATUS status;
+
+    if((dev->flags & IFF_PROMISC) || (dev->flags & IFF_ALLMULTI)) {
+	/* promiscuous mode - connect the CPU port to the VLAN (port based + 802.1q) */
+	/*
+	if(dev->flags & IFF_PROMISC)
+	    printk("mv_gateway: setting promiscuous mode\n");
+	if(dev->flags & IFF_ALLMULTI)
+	    printk("mv_gateway: setting multicast promiscuous mode\n");
+	*/
+	mv_gtw_set_port_based_vlan(vlan_cfg->ports_mask|(1<<SWITCH_PORT_CPU));
+	    for(i=0; i<qd_dev->numOfPorts; i++) 
+        {
+	        if(MV_BIT_CHECK(vlan_cfg->ports_mask, i) && (i!=SWITCH_PORT_CPU)) 
+            {
+		        if(mv_gtw_set_vlan_in_vtu(MV_GTW_PORT_VLAN_ID(vlan_cfg->vlan_grp_id,i),
+                                          vlan_cfg->ports_mask | (1<<SWITCH_PORT_CPU)) != 0) 
+                {
+		            printk("mv_gtw_set_vlan_in_vtu failed\n");
+		        }
+	        }
+	    }
+    }
+    else 
+    {
+	/* not in promiscuous or allmulti mode - disconnect the CPU port to the VLAN (port based + 802.1q) */
+	mv_gtw_set_port_based_vlan(vlan_cfg->ports_mask&(~(1<<SWITCH_PORT_CPU)));
+	for(i=0; i<qd_dev->numOfPorts; i++) {
+	    if(MV_BIT_CHECK(vlan_cfg->ports_mask, i) && (i!=SWITCH_PORT_CPU)) {
+		if(mv_gtw_set_vlan_in_vtu(MV_GTW_PORT_VLAN_ID(vlan_cfg->vlan_grp_id,i),vlan_cfg->ports_mask&(~(1<<SWITCH_PORT_CPU))) != 0) {
+		    printk("mv_gtw_set_vlan_in_vtu failed\n");
+		}
+	   }
+	}
+	if(dev->mc_count) {
+	    /* accept specific multicasts */
+	    for(i=0; i<dev->mc_count; i++, curr_addr = curr_addr->next) {
+	        if (!curr_addr)
+		    break;
+		/* The Switch may already have information about this multicast address in      */
+		/* its ATU. If this address is already in the ATU, use the existing port vector */
+		/* ORed with the CPU port. Otherwise, just use the CPU port.                    */
+		memset(&mac_entry,0,sizeof(GT_ATU_ENTRY));
+		        mac_entry.DBNum = MV_GTW_VLAN_TO_GROUP(vlan_cfg->vlan_grp_id);
+		memcpy(mac_entry.macAddr.arEther, curr_addr->dmi_addr, 6);
+		status = gfdbFindAtuMacEntry(qd_dev, &mac_entry, &found);
+		        if ( (status != GT_OK) || (found != GT_TRUE) ) 
+                {
+		            mv_gtw_set_mac_addr_to_switch(curr_addr->dmi_addr,
+		    				  MV_GTW_VLAN_TO_GROUP(vlan_cfg->vlan_grp_id),
+						  (1<<SWITCH_PORT_CPU)|(vlan_cfg->ports_mask), 1);
+		}
+		        else 
+                {
+		            mv_gtw_set_mac_addr_to_switch(curr_addr->dmi_addr,
+						  MV_GTW_VLAN_TO_GROUP(vlan_cfg->vlan_grp_id),
+						  (mac_entry.portVec | (1<<SWITCH_PORT_CPU)), 1);
+		        }
+	        }
+	    }
+    }
+}
+ 
+
+int mv_gtw_change_mtu(struct net_device *dev, int mtu)
+{
+	printk("mv_gateway does not support changing MTU at runtime.\n"); 
+	return -EPERM;
+} 
+
+
+int mv_gtw_start( struct net_device *dev )
+{
+    mv_eth_priv		*priv = MV_ETH_PRIV(dev);
+    struct 		    mv_vlan_cfg *vlan_cfg = MV_NETDEV_VLAN(dev);
+    unsigned char	broadcast[6] = {0xff,0xff,0xff,0xff,0xff,0xff};
+
+    printk("mv_gateway: starting %s\n",dev->name);
+
+    /* start upper layer */
+    netif_carrier_on(dev);
+    netif_wake_queue(dev);
+    netif_poll_enable(dev);
+
+    /* Add our MAC addr to the VLAN DB at switch level to forward packets with this DA */
+    /* to CPU port by using the tunneling feature. The device is always in promisc mode.      */
+    mv_gtw_set_mac_addr_to_switch(dev->dev_addr, MV_GTW_VLAN_TO_GROUP(vlan_cfg->vlan_grp_id), (1<<SWITCH_PORT_CPU), 1);
+
+    /* We also need to allow L2 broadcasts comming up for this interface */
+    mv_gtw_set_mac_addr_to_switch(broadcast, MV_GTW_VLAN_TO_GROUP(vlan_cfg->vlan_grp_id), 
+					vlan_cfg->ports_mask|(1<<SWITCH_PORT_CPU), 1);
+
+    if(priv->timer_flag == 0)
+    {
+        priv->timer.expires = jiffies + ((HZ*CONFIG_MV_ETH_TIMER_PERIOD)/1000); /*ms*/
+        add_timer( &(priv->timer) );
+        priv->timer_flag = 1;
+    }
+
+    if( (priv->net_dev == dev) || !netif_running(priv->net_dev) )
+    {
+        priv->net_dev = dev;
+
+		/* connect to MAC port interrupt line */
+    	if( request_irq( ETH_PORT_IRQ_NUM(priv->port), mv_eth_interrupt_handler, 
+            (IRQF_DISABLED | IRQF_SAMPLE_RANDOM), "mv_gateway", priv) ) 
+		{
+        	printk(KERN_ERR "failed to assign irq%d\n", ETH_PORT_IRQ_NUM(priv->port));
+    	}
+
+        /* unmask interrupts */
+        mv_eth_unmask_interrupts(priv);
+    }
+    
+    return 0;
+}
+
+
+int mv_gtw_stop( struct net_device *dev )
+{
+    mv_eth_priv		    *priv = MV_ETH_PRIV(dev);
+    struct mv_vlan_cfg	*vlan_cfg = MV_NETDEV_VLAN(dev);
+
+    printk("mv_gateway: stopping %s\n",dev->name);
+
+    /* stop upper layer */
+    netif_poll_disable(dev);
+    netif_carrier_off(dev);
+    netif_stop_queue(dev);
+
+    /* stop switch from forwarding packets from this VLAN toward CPU port */
+    if( gfdbFlushInDB(qd_dev, GT_FLUSH_ALL, MV_GTW_VLAN_TO_GROUP(vlan_cfg->vlan_grp_id)) != GT_OK) {
+        printk("gfdbFlushInDB failed\n");
+    }
+
+    if(priv->net_dev == dev)
+    {
+        struct net_device *main_dev = mv_gtw_main_net_dev_get();
+
+        if(main_dev == NULL)
+        {
+            mv_eth_mask_interrupts(priv);
+    	    priv->timer_flag = 0;
+            del_timer(&priv->timer);
+
+            free_irq( dev->irq, priv );
+        }
+        else
+        {
+            priv->net_dev = main_dev;
+        }
+    }
+    return 0;
+}
+
+#ifdef CONFIG_MV_GTW_LINK_STATUS
+static void mv_gtw_update_link_status(unsigned int p, unsigned int link_up)
+{
+    struct mv_vlan_cfg  *vlan_cfg;
+    int                 i = 0;
+    unsigned int        prev_ports_link = 0;
+
+    for(i=0; i<mv_net_devs_num; i++) {
+	if (mv_net_devs[i] == NULL)
+		break;
+        vlan_cfg = MV_NETDEV_VLAN(mv_net_devs[i]);
+	    if ( vlan_cfg != NULL) {
+
+	        if ((vlan_cfg->ports_mask & (1 << p)) == 0)
+		        continue;
+
+	        prev_ports_link = vlan_cfg->ports_link;
+ 
+	        if (link_up)
+	            vlan_cfg->ports_link |= (1 << p);
+	        else
+		        vlan_cfg->ports_link &= ~(1 << p);
+
+	        if ((vlan_cfg->ports_link & vlan_cfg->ports_mask) == 0) {
+                    netif_carrier_off(mv_net_devs[i]);
+                    netif_stop_queue(mv_net_devs[i]);
+	        }
+	        else if (prev_ports_link == 0) {
+		        netif_carrier_on(mv_net_devs[i]);
+                netif_wake_queue(mv_net_devs[i]);          
+	        }
+	    }
+    }
+}
+
+static irqreturn_t mv_gtw_link_interrupt_handler(int irq , void *dev_id)
+{
+    unsigned short switch_cause, phy_cause, phys_port, p;
+
+    if (switch_irq != -1 ) {
+	    if ( (qd_dev->deviceId == GT_88E6161) || (qd_dev->deviceId == GT_88E6165) ) {
+	        OUT GT_DEV_INT_STATUS devIntStatus;
+            /* required to clear the interrupt, and updates phys_port */
+	        geventGetDevIntStatus(qd_dev, &devIntStatus); 
+	        phys_port = devIntStatus.phyInt & 0xFF;
+	        if (phys_port)
+		        switch_cause = GT_PHY_INTERRUPT;
+	    }
+	    else {
+	        if(eventGetIntStatus(qd_dev, &switch_cause) != GT_OK)
+	            switch_cause = 0;
+	    }
+    }
+    else {
+	    switch_cause = GT_PHY_INTERRUPT;
+    }
+
+    if(switch_cause & GT_PHY_INTERRUPT) {
+	    /* If we're using a 6161/6165 Switch and using the Switch interrupt, we already have phys_port updated above */
+	    /* If we're using any other Switch, or if we're using polling, we need to update phys_port now */
+	    if ( (qd_dev->deviceId == GT_88E6161) || (qd_dev->deviceId == GT_88E6165)) {
+		    if (switch_irq == -1) {
+			    gprtGetPhyIntPortSummary(qd_dev,&phys_port);
+			    phys_port |= 0x18; /* we cannot get indication for these ports in this method, so check them */
+		    }
+	    }
+	    else {
+		    /* not 6161 or 6165 */
+        	gprtGetPhyIntPortSummary(qd_dev,&phys_port);
+	    }
+
+        for(p=0; p<qd_dev->numOfPorts; p++) {
+            if (MV_BIT_CHECK(phys_port, p)) {
+		        if(gprtGetPhyIntStatus(qd_dev,p,&phy_cause) == GT_OK) {
+		            if(phy_cause & GT_LINK_STATUS_CHANGED) 
+                    {
+			            char *link=NULL, *duplex=NULL, *speed=NULL;
+			            GT_BOOL flag;
+			            GT_PORT_SPEED_MODE speed_mode;
+
+			            if(gprtGetLinkState(qd_dev,p,&flag) != GT_OK) {
+			                printk("gprtGetLinkState failed (port %d)\n",p);
+			                link = "ERR";
+			            }
+                        else 
+                            link = (flag)?"up":"down";
+
+			            if(flag) {
+			                if(gprtGetDuplex(qd_dev,p,&flag) != GT_OK) {
+			                    printk("gprtGetDuplex failed (port %d)\n",p);
+			                    duplex = "ERR";
+			                }
+                            else 
+                                duplex = (flag)?"Full":"Half";
+
+			                if(gprtGetSpeedMode(qd_dev,p,&speed_mode) != GT_OK) {
+			                    printk("gprtGetSpeedMode failed (port %d)\n",p);
+			                    speed = "ERR";
+			                }
+			                else {
+			                    if (speed_mode == PORT_SPEED_1000_MBPS)
+			                        speed = "1000Mbps";
+			                    else if (speed_mode == PORT_SPEED_100_MBPS)
+			                        speed = "100Mbps";
+			                    else
+			                        speed = "10Mbps";
+			                }
+
+			                mv_gtw_update_link_status(p, 1);
+
+                            printk("Port %d: Link-%s, %s-duplex, Speed-%s.\n",
+                                   mv_gtw_port2lport(p),link,duplex,speed);
+                        }
+			            else {
+			                mv_gtw_update_link_status(p, 0);
+
+			                printk("Port %d: Link-down\n",mv_gtw_port2lport(p));
+			            }
+		            }
+		        }
+	        }
+	    }
+    }
+
+    if (switch_irq == -1 ) {
+    	switch_link_timer.expires = jiffies + (HZ); /* 1 second */
+    	add_timer(&switch_link_timer);
+    }
+
+    return IRQ_HANDLED;
+}
+
+static void mv_gtw_link_timer_function(unsigned long data)
+{
+    mv_gtw_link_interrupt_handler(switch_irq, NULL);
+}
+#endif /* CONFIG_MV_GTW_LINK_STATUS */
+
+
+/*********************************************************** 
+ * gtw_init_complete --                                    *
+ *   complete all initializations relevant for Gateway.    *
+ ***********************************************************/
+int  __init mv_gtw_init_complete(mv_eth_priv* priv)
+{
+    int status = 0;
+
+    status = mv_switch_init(priv->port);
+    if (status != 0)
+	return status;
+
+    status = mv_eth_start_internals(priv, gtw_config.mtu);
+    if (status != 0)
+	return status;
+
+    status = mvEthHeaderModeSet(priv->hal_priv, MV_ETH_ENABLE_HEADER_MODE_PRI_2_1);
+    if (status != 0)
+	return status;
+    
+    /* Mask interrupts */
+    mv_eth_mask_interrupts(priv);
+
+#ifdef CONFIG_MV_GTW_IGMP
+    /* Initialize the IGMP snooping handler */
+    if(mv_gtw_igmp_snoop_init()) {
+        printk("failed to init IGMP snooping handler\n");
+    }
+#endif
+
+#ifdef CONFIG_MV_GTW_LINK_STATUS
+    if (switch_irq != -1) {
+        if(request_irq(switch_irq, mv_gtw_link_interrupt_handler, 
+            (IRQF_DISABLED | IRQF_SAMPLE_RANDOM), "link status", NULL))
+	    {
+                printk(KERN_ERR "failed to assign irq%d\n", switch_irq);
+	    }
+    }
+    else {
+        memset( &switch_link_timer, 0, sizeof(struct timer_list) );
+	init_timer(&switch_link_timer);
+        switch_link_timer.function = mv_gtw_link_timer_function;
+        switch_link_timer.data = -1;
+   	switch_link_timer.expires = jiffies + (HZ); /* 1 second */
+    	add_timer(&switch_link_timer);
+    }
+#endif /* CONFIG_MV_GTW_LINK_STATUS */
+
+    return 0;
+}
+
+#define QD_FMT "%10lu %10lu %10lu %10lu %10lu %10lu\n"
+#define QD_CNT(c,f) c[0].f, c[1].f,c[2].f,c[3].f,c[4].f,c[5].f
+#define QD_MAX 6
+void    mv_gtw_switch_stats(int port)
+{
+    GT_STATS_COUNTER_SET3 counters[QD_MAX];
+    int p;
+
+    if(qd_dev == NULL) {
+        printk("Switch is not initialized\n");
+        return;
+    }
+    memset(counters, 0, sizeof(GT_STATS_COUNTER_SET3) * QD_MAX);
+
+    for (p=0; p<QD_MAX; p++)
+        gstatsGetPortAllCounters3(qd_dev, p, &counters[p]);
+
+    printk("PortNum         " QD_FMT,  (GT_U32)0, (GT_U32)1, (GT_U32)2, (GT_U32)3, (GT_U32)4, (GT_U32)5);
+    printk("-------------------------------------------------------------------------------------\n");
+    printk("InGoodOctetsLo  " QD_FMT,  QD_CNT(counters,InGoodOctetsLo));
+    printk("InGoodOctetsHi  " QD_FMT,  QD_CNT(counters,InGoodOctetsHi));
+    printk("InBadOctets     " QD_FMT,  QD_CNT(counters,InBadOctets));
+    printk("OutFCSErr       " QD_FMT,  QD_CNT(counters,OutFCSErr));
+    printk("Deferred        " QD_FMT,  QD_CNT(counters,Deferred));
+    printk("InBroadcasts    " QD_FMT,  QD_CNT(counters,InBroadcasts));
+    printk("InMulticasts    " QD_FMT,  QD_CNT(counters,InMulticasts));
+    printk("Octets64        " QD_FMT,  QD_CNT(counters,Octets64));
+    printk("Octets127       " QD_FMT,  QD_CNT(counters,Octets127));
+    printk("Octets255       " QD_FMT,  QD_CNT(counters,Octets255));
+    printk("Octets511       " QD_FMT,  QD_CNT(counters,Octets511));
+    printk("Octets1023      " QD_FMT,  QD_CNT(counters,Octets1023));
+    printk("OctetsMax       " QD_FMT,  QD_CNT(counters,OctetsMax));
+    printk("OutOctetsLo     " QD_FMT,  QD_CNT(counters,OutOctetsLo));
+    printk("OutOctetsHi     " QD_FMT,  QD_CNT(counters,OutOctetsHi));
+    printk("OutUnicasts     " QD_FMT,  QD_CNT(counters,OutOctetsHi));
+    printk("Excessive       " QD_FMT,  QD_CNT(counters,Excessive));
+    printk("OutMulticasts   " QD_FMT,  QD_CNT(counters,OutMulticasts));
+    printk("OutBroadcasts   " QD_FMT,  QD_CNT(counters,OutBroadcasts));
+    printk("Single          " QD_FMT,  QD_CNT(counters,OutBroadcasts));
+    printk("OutPause        " QD_FMT,  QD_CNT(counters,OutPause));
+    printk("InPause         " QD_FMT,  QD_CNT(counters,InPause));
+    printk("Multiple        " QD_FMT,  QD_CNT(counters,InPause));
+    printk("Undersize       " QD_FMT,  QD_CNT(counters,Undersize));
+    printk("Fragments       " QD_FMT,  QD_CNT(counters,Fragments));
+    printk("Oversize        " QD_FMT,  QD_CNT(counters,Oversize));
+    printk("Jabber          " QD_FMT,  QD_CNT(counters,Jabber));
+    printk("InMACRcvErr     " QD_FMT,  QD_CNT(counters,InMACRcvErr));
+    printk("InFCSErr        " QD_FMT,  QD_CNT(counters,InFCSErr));
+    printk("Collisions      " QD_FMT,  QD_CNT(counters,Collisions));
+    printk("Late            " QD_FMT,  QD_CNT(counters,Late));
+
+    gstatsFlushAll(qd_dev);
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_network/mv_ethernet/mv_netdev.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_network/mv_ethernet/mv_netdev.h
@@ -0,0 +1,522 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+*******************************************************************************/
+#ifndef __mv_netdev
+#define __mv_netdev
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/version.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/platform_device.h>
+#include <linux/skbuff.h>
+#include <linux/pci.h>
+#include <linux/ip.h>
+#include <linux/in.h>
+#include <linux/tcp.h>
+#include <net/ip.h>
+#include <net/xfrm.h>
+#include <linux/clk.h>
+
+#include "mvOs.h"
+#include "mvDebug.h"
+#include "mvStack.h"
+#include "mvSysHwConfig.h"
+#include "eth/mvEth.h"
+#include "eth/gbe/mvEthGbe.h"
+#include "eth-phy/mvEthPhy.h"
+#include "dbg-trace.h"
+
+#if defined(CONFIG_MV_ETH_TSO)
+#   define ETH_INCLUDE_TSO
+#endif /* CONFIG_MV_ETH_TSO */
+
+#if defined(CONFIG_MV_ETH_INET_LRO)
+#if defined(CONFIG_INET_LRO)
+  /* LRO support */
+#   include <linux/inet_lro.h>
+#   define ETH_INCLUDE_LRO
+#   define ETH_LRO_MAX_AGGR         	8
+#   define ETH_LRO_MAX_DESCRIPTORS	4
+
+#if defined(CONFIG_MV_ETH_LRO_UDP)
+#   define ETH_INCLUDE_LRO_UDP
+#endif /* CONFIG_MV_ETH_LRO_UDP */
+
+#endif /* CONFIG_INET_LRO */
+
+#if defined(CONFIG_MV_ETH_UFO)
+  /* UFO support */
+#   include <linux/udp.h>
+#   define ETH_INCLUDE_UFO
+#endif
+#endif /*CONFIG_MV_ETH_INET_LRO*/
+
+#ifdef CONFIG_MV_ETH_NFP
+#   include "eth/nfp/mvNfp.h"
+#   include "../nfp_mgr/mv_nfp_mgr.h"
+#endif /* CONFIG_MV_ETH_NFP */
+
+/***********************************************************************************************************************/
+
+#define MV_NETDEV_ETH_NAME		"mv_netdev"
+
+struct mv_netdev_platform_data {
+	int		port_number;
+#if defined(CONFIG_HAVE_CLK)
+	struct clk			*clk;
+#endif
+};
+
+/************************************************************************************************************************/
+
+/****************************************************** 
+ * driver debug control --                            *
+ ******************************************************/
+/* debug main on/off switch (more in debug control below ) */
+#define ETH_DEBUG
+#undef ETH_DEBUG
+
+#define ETH_DBG_OFF     0x0000
+#define ETH_DBG_RX      0x0001
+#define ETH_DBG_TX      0x0002
+#define ETH_DBG_RX_FILL 0x0004
+#define ETH_DBG_TX_DONE 0x0008
+#define ETH_DBG_LOAD    0x0010
+#define ETH_DBG_IOCTL   0x0020
+#define ETH_DBG_INT     0x0040
+#define ETH_DBG_STATS   0x0080
+#define ETH_DBG_POLL    0x0100
+#define ETH_DBG_GSO	    0x0200
+#define ETH_DBG_ALL     0xffff
+
+#ifdef ETH_DEBUG
+extern u32 eth_dbg;
+# define ETH_DBG(FLG, X) if( (eth_dbg & (FLG)) == (FLG) ) printk X
+#else
+# define ETH_DBG(FLG, X)
+#endif
+
+
+/****************************************************** 
+ * driver statistics control --                       *
+ ******************************************************/
+/* statistics main on/off switch (more in statistics control below ) */
+
+#ifdef CONFIG_MV_ETH_STATS_ERROR
+# define ETH_STAT_ERR(CODE) CODE;
+#else
+# define ETH_STAT_ERR(CODE) 
+#endif /* CONFIG_MV_ETH_STATS_ERROR */ 
+
+#ifdef CONFIG_MV_ETH_STATS_INFO
+# define ETH_STAT_INFO(CODE) CODE;
+#else
+# define ETH_STAT_INFO(CODE)
+#endif /* CONFIG_MV_ETH_STATS_INFO */
+
+#ifdef CONFIG_MV_ETH_STATS_DEBUG
+# define ETH_STAT_DBG(CODE) CODE;
+#else
+# define ETH_STAT_DBG(CODE)
+#endif /* CONFIG_MV_ETH_STATS_DEBUG */
+
+/* rx buffer size */ 
+/* 2(HW hdr) + 4(VLAN) + 14(MAC hdr) + 4(CRC) */
+#define MV_WRAP             (2 + 4 + ETH_HLEN + 4)  
+
+#define MV_RX_BUF_SIZE(mtu) MV_ALIGN_UP(((mtu) + MV_WRAP), CPU_D_CACHE_LINE_SIZE)
+
+/* Interrupt Cause Masks */
+#define ETH_TXQ_MASK		(((1 << MV_ETH_TX_Q_NUM) - 1) << ETH_CAUSE_TX_BUF_OFFSET) 
+#define ETH_LINK_MASK		((1 << ETH_CAUSE_PHY_STATUS_CHANGE_BIT) | (1 << ETH_CAUSE_LINK_STATE_CHANGE_BIT))
+#define ETH_RXQ_MASK		(((1 << MV_ETH_RX_Q_NUM) - 1) << ETH_CAUSE_RX_READY_OFFSET)
+#define ETH_RXQ_RES_MASK	(((1 << MV_ETH_RX_Q_NUM) - 1) << ETH_CAUSE_RX_ERROR_OFFSET)
+
+/* Gigabit Ethernet Port Interrupt Mask and Port Interrupt Mask Extend Registers (PIMR and PIMER) */
+#define ETH_PICR_MASK		(BIT1  | ETH_RXQ_MASK | ETH_RXQ_RES_MASK)
+/* phy/link-status-change, tx-done-q0 - q7 */
+#define ETH_PICER_MASK		(ETH_LINK_MASK | ETH_TXQ_MASK) 
+
+
+#if defined(CONFIG_MV_GATEWAY)
+#define GTW_MAX_NUM_OF_IFS  5
+
+struct mv_vlan_cfg {
+    char            name[IFNAMSIZ];
+    unsigned int    ports_mask;
+    unsigned int    ports_link;
+    unsigned short  vlan_grp_id;
+    unsigned short  header;
+    unsigned char   macaddr[ETH_ALEN]; 
+};
+
+struct mv_gtw_config
+{
+    int                 vlans_num;
+    int                 mtu;
+    struct mv_vlan_cfg  vlan_cfg[GTW_MAX_NUM_OF_IFS];
+};
+
+extern struct mv_gtw_config    gtw_config;
+
+#else
+#define GTW_MAX_NUM_OF_IFS  0
+#endif /* CONFIG_MV_GATEWAY */
+
+typedef struct _eth_statistics
+{
+    /* erorrs */
+    u32 skb_alloc_fail;
+    u32 tx_timeout, tx_netif_stop;
+    u32 tx_done_netif_wake;
+    u32 tx_skb_no_headroom;
+#if defined(CONFIG_MV_ETH_NFP) || defined(CONFIG_MV_SKB_REUSE)
+    u32 rx_pool_empty;
+#endif /* CONFIG_MV_ETH_NFP || CONFIG_MV_SKB_REUSE */
+
+#ifdef CONFIG_MV_ETH_STATS_INFO
+    /* Events */
+    u32 irq_total, irq_none, irq_while_polling;
+    u32 poll_events, poll_complete;
+    u32 tx_events;
+    u32 tx_done_events;
+    u32 timer_events;
+    u32 link_events;
+#endif /* CONFIG_MV_ETH_STATS_INFO */
+
+#ifdef CONFIG_MV_ETH_STATS_DEBUG
+    /* rx stats */
+    u32 rx_hal_ok[MV_ETH_RX_Q_NUM];
+    u32 rx_netif_drop;
+    u32 rx_dist[CONFIG_MV_ETH_NUM_OF_RX_DESCR+1];
+    u32 rx_csum_hw, rx_csum_hw_frags, rx_csum_sw;
+
+    /* skb stats */
+    u32 skb_alloc_ok, skb_free_ok;
+
+    /* rx-fill stats */
+    u32 rx_fill_ok[MV_ETH_RX_Q_NUM];
+
+    /* tx stats */
+    u32 tx_hal_ok[MV_ETH_TX_Q_NUM];
+    u32 tx_hal_no_resource[MV_ETH_TX_Q_NUM];
+    u32 tx_csum_hw, tx_csum_sw;
+    u32 tso_stats[64], ufo_stats[64];
+
+    /* tx-done stats */
+    u32 tx_done_hal_ok[MV_ETH_TX_Q_NUM];
+    u32 tx_done_dist[CONFIG_MV_ETH_NUM_OF_TX_DESCR*MV_ETH_TX_Q_NUM + 1];
+
+#ifdef ETH_MV_TX_EN
+    u32 tx_en_done, tx_en_wait, tx_en_wait_count, tx_en_busy;
+#endif /* ETH_MV_TX_EN */
+
+#ifdef CONFIG_MV_SKB_REUSE
+    u32 skb_reuse_rx, skb_reuse_tx, skb_reuse_alloc;
+#endif /* CONFIG_MV_SKB_REUSE */
+
+#endif /* CONFIG_MV_ETH_STATS_DEBUG */
+
+} eth_statistics;
+
+typedef struct _mv_eth_priv
+{
+    int                 port;
+    void*               hal_priv;
+    spinlock_t*         lock;
+    eth_statistics      eth_stat;
+    u32                 picr;
+    u32                 picer;
+    MV_STACK*           txPktInfoPool;
+    int                 tx_count[MV_ETH_TX_Q_NUM];
+    struct timer_list   timer;
+    unsigned int        timer_flag;
+    struct net_device   *net_dev;		/* back reference to the net_device */
+
+    struct net_device   *dev;
+    struct napi_struct  napi;
+
+#if defined(ETH_INCLUDE_TSO) || defined(ETH_INCLUDE_UFO) || defined(CONFIG_MV_GATEWAY)
+#  define TX_EXTRA_BUF_SIZE     128
+
+    char**  tx_extra_bufs[MV_ETH_TX_Q_NUM]; 
+    int     tx_extra_buf_idx[MV_ETH_TX_Q_NUM];
+#endif /* ETH_INCLUDE_TSO || ETH_INCLUDE_UFO */
+
+#ifdef ETH_INCLUDE_LRO
+    u32                 lro_max_aggr;
+    struct net_lro_mgr  lro_mgr;
+    struct net_lro_desc lro_desc[ETH_LRO_MAX_DESCRIPTORS];
+#endif /* ETH_INCLUDE_LRO */
+
+#ifdef CONFIG_MV_SKB_REUSE
+    MV_STACK*       skbReusePool;
+#endif /* CONFIG_MV_SKB_REUSE */
+
+#if defined(CONFIG_MV_ETH_NFP) || defined(CONFIG_MV_SKB_REUSE)
+    unsigned int    refill_needed_flag;
+#endif /* CONFIG_MV_ETH_NFP  || CONFIG_MV_SKB_REUSE */
+
+#if defined(CONFIG_MV_ETH_NFP)
+    MV_FP_STATS     fpStats;
+#endif /* CONFIG_MV_ETH_NFP */
+
+#if defined(CONFIG_MV_ETH_NFP) || defined(CONFIG_MV_SKB_REUSE)
+    MV_STACK*       fpRxPool;
+#endif /* (CONFIG_MV_ETH_NFP) || (CONFIG_MV_SKB_REUSE) */
+
+#if defined(CONFIG_MV_GATEWAY)
+    int             isGtw;
+#endif /* CONFIG_MV_GATEWAY */
+
+#ifdef ETH_MV_TX_EN
+    MV_BOOL         tx_en;
+    int             tx_en_deep;
+    MV_BOOL         tx_en_bk;
+#endif /* ETH_MV_TX_EN */
+
+} mv_eth_priv; 
+
+typedef struct _mv_priv 
+{
+    mv_eth_priv             *giga_priv;
+#ifdef CONFIG_MV_GATEWAY
+    struct mv_vlan_cfg      *vlan_cfg;		/* reference to entry in net config table */
+#endif
+
+} mv_net_priv;
+
+#define MV_ETH_PRIV(dev)        (((mv_net_priv*)(netdev_priv(dev)))->giga_priv)
+#define MV_NETDEV_STATS(dev)    (&((dev)->stats))
+#define MV_NETDEV_VLAN(dev)     (((mv_net_priv*)((dev)->priv))->vlan_cfg)
+#define MV_GTW_VLAN_TO_GROUP(vid)	((((vid) & 0xf00) >> 8)-1)
+
+extern int     mv_eth_rxq_desc[MV_ETH_RX_Q_NUM];
+extern int     mv_eth_txq_desc[MV_ETH_TX_Q_NUM];
+extern int     mv_eth_rx_desc_total;
+extern int     mv_eth_tx_desc_total;
+
+extern int      mv_eth_tx_done_quota;
+
+extern spinlock_t           mii_lock;
+extern spinlock_t           nfp_lock;
+
+extern struct net_device**  mv_net_devs;
+extern int                  mv_net_devs_num;
+
+extern mv_eth_priv**        mv_eth_ports;
+extern int                  mv_eth_ports_num;
+
+#ifdef CONFIG_MV_SKB_REUSE
+extern int eth_skb_reuse_enable;
+#endif /* CONFIG_MV_SKB_REUSE */
+
+static INLINE int  mv_eth_tos_to_q_map(unsigned char tos, unsigned char num_of_queues)
+{
+    int  prio;
+
+    if(tos == 0)
+        return 0;
+
+    prio = (tos >> 5);
+    if(prio == 0)
+        return 1;
+
+    if(prio >= num_of_queues)
+        return (num_of_queues - 1);
+    
+    return prio;
+}
+
+static INLINE void mv_eth_save_interrupts(mv_eth_priv *priv)
+{
+    priv->picr |= MV_REG_READ(ETH_INTR_CAUSE_REG(priv->port)) & ETH_PICR_MASK;
+    if(priv->picr & BIT1) 
+    {
+	    priv->picer |= MV_REG_READ(ETH_INTR_CAUSE_EXT_REG(priv->port)) & ETH_PICER_MASK;
+    }
+}
+/**************************************************************************************************************/
+
+static INLINE void mv_eth_mask_interrupts(mv_eth_priv *priv)
+{
+    MV_REG_WRITE( ETH_INTR_MASK_REG(priv->port), 0 );
+    MV_REG_WRITE( ETH_INTR_MASK_EXT_REG(priv->port), 0 );
+}
+
+/**************************************************************************************************************/
+
+static INLINE void mv_eth_unmask_interrupts(mv_eth_priv *priv)
+{
+    /* unmask GbE Rx and Tx interrupts */
+    MV_REG_WRITE( ETH_INTR_MASK_REG(priv->port), ETH_PICR_MASK);
+#ifdef ETH_TX_DONE_ISR
+    MV_REG_WRITE( ETH_INTR_MASK_EXT_REG(priv->port), ETH_PICER_MASK); 
+#else
+    MV_REG_WRITE( ETH_INTR_MASK_EXT_REG(priv->port), ETH_LINK_MASK); 
+#endif /* ETH_TX_DONE_ISR */
+}
+/**************************************************************************************************************/
+
+static INLINE void mv_eth_clear_saved_interrupts(mv_eth_priv *priv)
+{
+    /* clear interrupts */
+    MV_REG_WRITE( ETH_INTR_CAUSE_REG(priv->port), ~(priv->picr));
+    /* clear Tx interrupts */
+    MV_REG_WRITE( ETH_INTR_CAUSE_EXT_REG(priv->port), ~(priv->picer));
+}
+/**************************************************************************************************************/
+
+static INLINE void mv_eth_clear_interrupts(mv_eth_priv *priv)
+{
+    /* clear interrupts */
+    MV_REG_WRITE( ETH_INTR_CAUSE_REG(priv->port), 0 );
+    /* clear Tx interrupts */
+    MV_REG_WRITE( ETH_INTR_CAUSE_EXT_REG(priv->port), 0 );
+}
+/**************************************************************************************************************/
+
+/* Function prototypes */
+
+#ifdef CONFIG_MV_GATEWAY
+extern int  mv_gtw_start(struct net_device *dev);
+extern int  mv_gtw_stop(struct net_device *dev);
+extern int  mv_gtw_change_mtu(struct net_device *dev, int mtu);
+extern int  mv_gtw_set_mac_addr( struct net_device *dev, void *mac );
+extern void mv_gtw_set_multicast_list(struct net_device *dev);
+
+extern int  __init mv_gtw_net_setup(int port);
+extern int __init mv_gtw_init_complete(mv_eth_priv* priv);
+
+extern int  mv_gtw_switch_tos_get(int port, unsigned char codepoint);
+extern int  mv_gtw_switch_tos_set(int port, unsigned char codepoint, int queue);
+
+extern void mv_gtw_switch_stats(int port);
+
+#ifdef CONFIG_MV_GTW_IGMP
+int mv_gtw_igmp_snoop_process(struct sk_buff* skb, unsigned char port, unsigned char vlan);
+#endif /* CONFIG_MV_GTW_IGMP */
+
+/* Note: this function currently supports only working with Marvell Header mode */
+static INLINE struct net_device *mv_gtw_ingress_dev(char* data)
+{
+    return mv_net_devs[(((data[0] & 0xF0) >> 4) + 1)]; 
+}
+
+static INLINE char mv_gtw_ingress_port(char* data)
+{
+    return data[1] & 0x0F;	
+}
+
+static INLINE char mv_gtw_ingress_vlan(char* data)
+{
+    return (data[0] & 0xF0) >> 4;
+}
+
+static INLINE void mv_gtw_update_tx_skb(struct net_device *dev, MV_PKT_INFO *pPktInfo)
+{
+	/* Note: this function currently supports only working with Marvell Header mode */
+	struct mv_vlan_cfg  *vlan_cfg = MV_NETDEV_VLAN(dev); 
+	struct sk_buff      *skb = (struct sk_buff *)pPktInfo->osInfo;
+	MV_BUF_INFO         *p_buf_info_first = pPktInfo->pFrags;
+	MV_BUF_INFO         *p_buf_info_last = (pPktInfo->pFrags + pPktInfo->numFrags - 1);
+
+	/* check if we have place inside skb for the header */
+	if(skb_headroom(skb) >= ETH_MV_HEADER_SIZE) {
+		*(unsigned short *)((skb->data)-ETH_MV_HEADER_SIZE) = vlan_cfg->header;
+		pPktInfo->pFrags[0].bufVirtPtr -= ETH_MV_HEADER_SIZE;
+		pPktInfo->pFrags[0].dataSize += ETH_MV_HEADER_SIZE;
+		pPktInfo->pktSize += ETH_MV_HEADER_SIZE;
+	}
+	else {
+#ifdef CONFIG_MV_ETH_STATS_ERR
+            mv_eth_priv *priv = MV_ETH_PRIV(dev);
+            priv->eth_stat.tx_skb_no_headroom++;
+#endif /* CONFIG_MV_ETH_STATS_ERR */
+
+		/* make room for one cell (safe because the array is big enough) */
+		do {
+	        	*(p_buf_info_last+1) = *p_buf_info_last;
+        		p_buf_info_last--;
+		} while(p_buf_info_last >= p_buf_info_first);
+
+		/* the header (safe on stack) */		
+		p_buf_info_first->bufVirtPtr = (void*)&vlan_cfg->header;
+		p_buf_info_first->dataSize = ETH_MV_HEADER_SIZE;
+
+		/* count the new frags */
+		pPktInfo->numFrags += 1;
+		pPktInfo->pktSize += ETH_MV_HEADER_SIZE;
+	}
+}
+#endif /* CONFIG_MV_GATEWAY */
+
+extern int  mv_eth_open(struct net_device *dev);
+extern int  mv_eth_stop(struct net_device *dev);
+extern int  mv_eth_change_mtu(struct net_device *dev, int mtu);
+extern int  mv_eth_set_mac_addr( struct net_device *dev, void *mac );
+extern void mv_eth_set_multicast_list(struct net_device *dev);
+
+int __init                  mv_eth_hal_init(mv_eth_priv *priv, int mtu, u8* mac);
+int __init                  mv_eth_priv_init(mv_eth_priv *priv, int port);
+struct net_device* __init   mv_eth_netdev_init(mv_eth_priv *priv, int mtu, u8* mac);
+void __init                 mv_eth_priv_cleanup(mv_eth_priv *priv);
+
+void	            mv_eth_config_show(void);
+void                mv_eth_netdev_print(unsigned int idx);
+void                mv_eth_status_print( unsigned int port );
+void                mv_eth_stats_print( unsigned int port );
+void                mv_eth_set_noqueue(int port, int enable);
+
+MV_STATUS           mv_eth_rx_fill(mv_eth_priv *priv, int pool_size, int mtu);
+irqreturn_t         mv_eth_interrupt_handler(int irq , void *dev_id);
+int                 mv_eth_start_internals( mv_eth_priv *priv, int mtu );
+int                 mv_eth_stop_internals(mv_eth_priv *priv);
+int                 mv_eth_down_internals( struct net_device *dev );
+int                 mv_eth_change_mtu_internals( struct net_device *dev, int mtu );
+
+void                mv_eth_tos_map_show(int port);
+int                 mv_eth_tos_map_set(int port, unsigned char tos, int queue);
+
+void                print_skb(struct sk_buff* skb);
+
+#ifdef CONFIG_MV_ETH_NFP
+void                mv_eth_nfp_stats_print(unsigned int port);
+#endif /* CONFIG_MV_ETH_NFP */
+
+#ifdef ETH_MV_TX_EN
+void                eth_tx_en_config(int port, int value);
+#endif /* ETH_MV_TX_EN */
+
+#ifdef CONFIG_PM
+int mv_eth_suspend(struct platform_device *pdev, pm_message_t state);
+int mv_eth_resume(struct platform_device *pdev);
+#endif /* CONFIG_PM */
+
+#endif /* __mv_netdev */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_network/mv_ethernet/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_network/mv_ethernet/Makefile
@@ -0,0 +1,13 @@
+#
+# Makefile for the Marvell Gigabit Ethernet driver
+#
+
+ifdef CONFIG_MV_HAL_RULES_PATH
+include $(srctree)/$(subst ",,$(CONFIG_MV_HAL_RULES_PATH))
+endif
+
+obj-$(CONFIG_MV_ETHERNET) += mv_netdev_plat.o mv_ethernet.o mv_eth_addr_dec.o
+obj-$(CONFIG_MV_ETH_PROC) += mv_eth_proc.o
+obj-$(CONFIG_MV_GATEWAY) +=  mv_gateway.o
+obj-$(CONFIG_MV_GTW_IGMP) += mv_gtw_igmp.o
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_network/mv_ethernet/mv_eth_proc.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_network/mv_ethernet/mv_eth_proc.h
@@ -0,0 +1,134 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+*******************************************************************************/
+#ifndef __mv_eth_proc
+#define __mv_eth_proc
+
+#define FILE_NAME	"mv_eth_tool"
+#define FILE_PATH	"/proc/net/"
+#define STS_FILE	"mvethtool.sts"
+
+#define IP_RULE_STRING	    "%2x %2x %2x %4x %4x %2x:%2x:%2x:%2x:%2x:%2x %2x:%2x:%2x:%2x:%2x:%2x"
+#define IP_RULE_PRINT_LIST	 command, inport, outport, dip, sip, da[0], da[1], da[2], da[3], da[4], da[5], sa[0], sa[1], sa[2], sa[3], sa[4], sa[5]
+#define IP_RULE_SCANF_LIST	&command, &inport, &outport, &dip, &sip, &da[0], &da[1], &da[2], &da[3], &da[4], &da[5], &sa[0], &sa[1], &sa[2], &sa[3], &sa[4], &sa[5]
+#define IP_RULE_LIST_LEN	17
+
+#define IP_RULE_DEL_STRING	"%2x %4x %4x"
+#define IP_RULE_DEL_PRINT_LIST	command, dip, sip
+#define IP_RULE_DEL_SCANF_LIST	&command, &dip, &sip
+#define IP_RULE_DEL_LIST_LEN	3
+
+#define FP_EN_DIS_STRING	"%2x"
+#define FP_EN_DIS_PRINT_LIST	command
+
+#define FP_DB_PRINT_STRING	"%2x %2x"
+#define FP_DB_PRINT_PRINT_LIST	command, db_type
+#define FP_DB_PRINT_SCANF_LIST	&command, &db_type
+#define FP_DB_PRINT_LIST_LEN	2
+
+#define PROC_STRING	"%2x %2x %2x %2x %2x %2x %2x:%2x:%2x:%2x:%2x:%2x %x"
+#define PROC_PRINT_LIST	 command,  port,  q,  policy,  packet,  status,  mac[0],  mac[1],  mac[2],  mac[3],  mac[4],  mac[5],  weight
+#define PROC_SCANF_LIST	&command, &port, &q, &policy, &packet, &status, &mac[0], &mac[1], &mac[2], &mac[3], &mac[4], &mac[5], &weight
+#define LIST_LEN	13
+
+#define PORT_CMD_STRING     "%2x %2x %x"
+#define PORT_PRINTF_LIST    command, port, value
+#define PORT_SCANF_LIST     &command, &port, &value
+#define PORT_LIST_LEN       3
+
+#define QUEUE_CMD_STRING     "%2x %2x %2x %x"
+#define QUEUE_PRINTF_LIST    command, port, q, value
+#define QUEUE_SCANF_LIST     &command, &port, &q, &value
+#define QUEUE_LIST_LEN       4
+
+
+#define ETH_CMD_STRING     "%2x %x"
+#define ETH_PRINTF_LIST    command, value
+#define ETH_SCANF_LIST     &command, &value
+#define ETH_LIST_LEN       2
+
+typedef enum {
+	COM_SRQ = 0,
+	COM_SQ,
+	COM_SRP,
+	COM_SRQW,
+	COM_STP,
+	COM_STS,
+	COM_HEAD,
+	COM_RX_COAL,
+	COM_TX_COAL,
+	COM_TXDONE_Q,
+ 	COM_IP_RULE_SET,
+	COM_IP_RULE_DEL, 
+	COM_FP_DISABLE, 
+	COM_FP_ENABLE, 
+	COM_FP_PRINT,
+	COM_FP_STATUS,
+    COM_TX_EN,
+    COM_SKB_REUSE,
+    COM_EJP_MODE,
+    COM_TOS_MAP,
+	COM_TX_NOQUEUE,
+	COM_SUSPEND, 
+	COM_RESUME
+} command_t;
+
+typedef enum { 	/**/
+	WRR = 0,
+	FIXED
+} policy_t;
+
+typedef enum {
+	PT_BPDU = 0,
+	PT_ARP,
+	PT_TCP,
+	PT_UDP
+} packet_t;
+
+typedef enum {
+	STS_PORT = 0,
+	STS_PORT_Q,
+	STS_PORT_RXP,
+	STS_PORT_TXP,
+	STS_PORT_REGS,
+	STS_PORT_MIB,
+	STS_PORT_STATS,
+    STS_PORT_MAC,
+    STS_PORT_NFP_STATS,
+    STS_PORT_TOS_MAP,
+    STS_NETDEV,
+    STS_SWITCH_STATS,
+} status_t;
+
+typedef enum {
+	DB_ROUTING = 0, 
+	DB_NAT,
+	DB_FDB,
+} db_type_t;
+
+#endif
+	
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_network/mv_ethernet/mv_netdev_plat.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_network/mv_ethernet/mv_netdev_plat.c
@@ -0,0 +1,3243 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+*******************************************************************************/
+
+#include "mvCommon.h"  /* Should be included before mvSysHwConfig */
+#include <linux/kernel.h>
+#include <linux/version.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/platform_device.h>
+#include <linux/skbuff.h>
+#include <linux/pci.h>
+#include <linux/ip.h>
+#include <linux/in.h>
+#include <linux/tcp.h>
+#include <net/ip.h>
+#include <net/xfrm.h>
+
+#include "mvOs.h"
+#include "dbg-trace.h"
+#include "mvSysHwConfig.h"
+#include "eth/mvEth.h"
+#include "eth/gbe/mvEthGbe.h"
+#include "eth-phy/mvEthPhy.h"
+#include "mvSysEthApi.h"
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "mv_netdev.h"
+
+/*
+static int __init mv_eth_init_module( void );
+static void __exit mv_eth_exit_module( void );
+module_init( mv_eth_init_module );
+module_exit( mv_eth_exit_module);
+MODULE_DESCRIPTION("Marvell Ethernet Driver - www.marvell.com");
+MODULE_AUTHOR("Dmitri Epshtein <dima@marvell.com>");
+MODULE_LICENSE("GPL");
+*/
+#ifdef ETH_INCLUDE_LRO
+static int eth_get_skb_hdr(struct sk_buff *skb, void **iphdr,
+			   void **tcph, u64 *hdr_flags, void *private);
+#endif
+extern u8 mvMacAddr[CONFIG_MV_ETH_PORTS_NUM][6];
+extern u16 mvMtu[CONFIG_MV_ETH_PORTS_NUM];
+
+int     mv_eth_rxq_desc[MV_ETH_RX_Q_NUM];
+int     mv_eth_txq_desc[MV_ETH_TX_Q_NUM];
+
+int     mv_eth_rx_desc_total = 0;
+int     mv_eth_tx_desc_total = 0;
+
+int     mv_eth_tx_done_quota = 16;
+
+mv_eth_priv**       mv_eth_ports;
+int                 mv_eth_ports_num = 0;
+
+struct net_device** mv_net_devs;
+int                 mv_net_devs_num = 0;
+
+spinlock_t          mii_lock = SPIN_LOCK_UNLOCKED;
+spinlock_t          nfp_lock = SPIN_LOCK_UNLOCKED;
+
+void eth_print_irq_status(mv_eth_priv *priv);
+
+/***********************************************************************************
+ ***  get device by index
+ ***********************************************************************************/
+static struct net_device* eth_net_device_by_idx(unsigned int idx) 
+{
+    if(idx >= mv_net_devs_num)    
+    {
+        printk("No net_device for index %d\n", idx);
+        return NULL;
+    }
+    return mv_net_devs[idx];
+}
+
+#ifdef CONFIG_PM
+static int netdev_should_resume = 0;
+static MV_U32 ethBaseAddrEnableRegSave[CONFIG_MV_ETH_PORTS_NUM];
+static MV_U32 ethWinBaseRegSave[CONFIG_MV_ETH_PORTS_NUM][ETH_MAX_DECODE_WIN];
+static MV_U32 ethWinSizeRegSave[CONFIG_MV_ETH_PORTS_NUM][ETH_MAX_DECODE_WIN];
+static MV_U32 ethAccessProtectRegSave[CONFIG_MV_ETH_PORTS_NUM];
+
+int mv_eth_suspend(struct platform_device *pdev, pm_message_t state)
+{
+	int port = ((struct mv_netdev_platform_data *)(pdev->dev.platform_data))->port_number;
+	struct net_device *dev = mv_net_devs[port];
+	int status = 0, winNum = 0;
+
+	/* save address decoding */
+	for (winNum = 0; winNum < ETH_MAX_DECODE_WIN; winNum++)
+	{  
+		ethBaseAddrEnableRegSave[port] = MV_REG_READ(ETH_BASE_ADDR_ENABLE_REG(port));
+		ethWinBaseRegSave[port][winNum] = MV_REG_READ(ETH_WIN_BASE_REG(port, winNum));
+		ethWinSizeRegSave[port][winNum] = MV_REG_READ(ETH_WIN_SIZE_REG(port, winNum));
+		ethAccessProtectRegSave[port] = MV_REG_READ(ETH_ACCESS_PROTECT_REG(port));
+	}
+	if (netif_running(dev)) {
+		netdev_should_resume = 1;
+		status = mv_eth_stop(dev);
+	}
+	mvEthE1116PhyPower(port, MV_FALSE);
+	return status;
+}
+
+int mv_eth_resume(struct platform_device *pdev) 
+{
+	int port = ((struct mv_netdev_platform_data *)(pdev->dev.platform_data))->port_number;
+	struct net_device *dev = mv_net_devs[port];
+	/* mv_eth_priv     *priv = MV_ETH_PRIV(dev); */
+	int status = 0, winNum = 0, i = 0;
+
+	/* restore address decoding */
+
+	for (i = 0; i < ETH_MAX_DECODE_WIN; i++) {
+		MV_REG_WRITE(ETH_WIN_BASE_REG(port,i),0);
+		MV_REG_WRITE(ETH_WIN_SIZE_REG(port,i),0);
+		if (i < ETH_MAX_HIGH_ADDR_REMAP_WIN)
+			MV_REG_WRITE(ETH_WIN_REMAP_REG(port,i),0);
+	}
+
+	for (winNum = 0; winNum < ETH_MAX_DECODE_WIN; winNum++) 
+	{  
+		MV_REG_WRITE(ETH_WIN_BASE_REG(port, winNum), ethWinBaseRegSave[port][winNum]);
+		MV_REG_WRITE(ETH_WIN_SIZE_REG(port, winNum), ethWinSizeRegSave[port][winNum]);
+		MV_REG_WRITE(ETH_ACCESS_PROTECT_REG(port), ethAccessProtectRegSave[port]);
+		MV_REG_WRITE(ETH_BASE_ADDR_ENABLE_REG(port), ethBaseAddrEnableRegSave[port]);
+	}
+	mvEthE1116PhyPower(port, MV_TRUE);
+	/* Not needed: mvEthPhyAddrSet(priv->hal_priv, mvBoardPhyAddrGet(port)); */
+	/* Not needed: mvEthDefaultsSet(priv->hal_priv); */
+	if (netdev_should_resume) {
+		netdev_should_resume = 0;
+		status = mv_eth_open(dev);
+	}
+	return status;
+}
+#endif /* CONFIG_PM */
+
+/***********************************************************************************
+ ***  get eth_priv structure by port number
+ ***********************************************************************************/
+static INLINE mv_eth_priv*     eth_priv_by_port(unsigned int port)
+{
+    if(port >= mv_eth_ports_num)    
+    {
+        printk("No eth device for port %d\n", port);
+        return NULL;
+    }
+    return mv_eth_ports[port];
+}
+
+
+static void eth_print_link_status( struct net_device *dev ) 
+{
+    mv_eth_priv *priv = MV_ETH_PRIV(dev);
+    int         port = priv->port;
+    u32         port_status;
+
+    port_status = MV_REG_READ( ETH_PORT_STATUS_REG( port ) );
+    if(port_status & ETH_LINK_UP_MASK)
+    {
+	    printk( KERN_NOTICE "%s: link up", dev->name );
+
+        /* check port status register */
+        printk(", %s",(port_status & ETH_FULL_DUPLEX_MASK) ? "full duplex" : "half duplex" );
+
+        if( port_status & ETH_GMII_SPEED_1000_MASK ) 
+	        printk(", speed 1 Gbps" );
+        else 
+            printk(", %s", (port_status & ETH_MII_SPEED_100_MASK) ? "speed 100 Mbps" : "speed 10 Mbps" );
+	    printk("\n" );
+    }
+    else {
+	    printk( KERN_NOTICE "%s: link down\n", dev->name );
+    }
+}
+
+static int eth_get_config(mv_eth_priv* priv, MV_U8* mac_addr)
+{
+    char*   mac_str = NULL;
+    u8      zero_mac[ETH_ALEN] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
+    int     mtu;
+
+    switch(priv->port)
+    {
+        case 0:
+	    if (mvMtu[0] != 0)
+		mtu = mvMtu[0];
+            else
+		mtu = CONFIG_MV_ETH_0_MTU;
+	    /* use default MAC address from Kconfig only if the MAC address we got is all 0 */
+	    if (memcmp(mvMacAddr[0], zero_mac, ETH_ALEN) != 0)
+		memcpy(mac_addr, mvMacAddr[0], ETH_ALEN);
+	    else if (strlen(CONFIG_MV_ETH_0_MACADDR) != 0)
+            	mac_str = CONFIG_MV_ETH_0_MACADDR; 
+	    else
+		 /* if mvMacAddr is Zero then read from the Port itself */
+		 mvEthMacAddrGet(priv->port, mac_addr);
+	    break;
+
+#if (CONFIG_MV_ETH_PORTS_NUM > 1)
+        case 1:
+	    if (mvMtu[1] != 0)
+		mtu = mvMtu[1];
+            else
+		mtu = CONFIG_MV_ETH_1_MTU;
+	    /* use default MAC address from Kconfig only if the MAC address we got is all 0 */
+	    if (memcmp(mvMacAddr[1], zero_mac, ETH_ALEN) == 0)
+            	mac_str = CONFIG_MV_ETH_1_MACADDR;
+	    else
+		memcpy(mac_addr, mvMacAddr[1], ETH_ALEN);
+            break;
+#endif /* CONFIG_MV_ETH_PORTS_NUM > 1 */
+
+#if (CONFIG_MV_ETH_PORTS_NUM > 2)
+        case 2:
+	    if (mvMtu[2] != 0)
+		mtu = mvMtu[2];
+            else
+		mtu = CONFIG_MV_ETH_2_MTU;
+	    /* use default MAC address from Kconfig only if the MAC address we got is all 0 */
+	    if (memcmp(mvMacAddr[2], zero_mac, ETH_ALEN) == 0)
+            	mac_str = CONFIG_MV_ETH_2_MACADDR;
+	    else
+		memcpy(mac_addr, mvMacAddr[2], ETH_ALEN);
+            break;
+#endif /* CONFIG_MV_ETH_PORTS_NUM > 2 */
+
+#if (CONFIG_MV_ETH_PORTS_NUM > 3)
+        case 3:
+	    if (mvMtu[3] != 0)
+		mtu = mvMtu[3];
+            else
+		mtu = CONFIG_MV_ETH_3_MTU;
+	    /* use default MAC address from Kconfig only if the MAC address we got is all 0 */
+	    if (memcmp(mvMacAddr[3], zero_mac, ETH_ALEN) == 0)
+            	mac_str = CONFIG_MV_ETH_3_MACADDR;
+	    else
+		memcpy(mac_addr, mvMacAddr[3], ETH_ALEN);
+            break;
+#endif /* CONFIG_MV_ETH_PORTS_NUM > 3 */
+
+        default:
+            printk("eth_get_config: Unexpected port number %d\n", priv->port);
+            return -1;
+    }
+    if ((mac_str != NULL) && (mac_addr != NULL))
+            mvMacStrToHex(mac_str, mac_addr);
+
+    return mtu;
+}
+
+static void eth_print_rx_errors(MV_U32 pkt_status)
+{
+    switch(pkt_status & ETH_RX_ERROR_CODE_MASK)
+    {
+        case ETH_RX_CRC_ERROR:
+            printk("bad rx status %08x, (crc error)", (unsigned int)pkt_status);
+            break;
+
+        case ETH_RX_OVERRUN_ERROR:
+            printk("bad rx status %08x, (overrun error)", (unsigned int)pkt_status);
+            break;
+
+        case ETH_RX_MAX_FRAME_LEN_ERROR:
+            printk("bad rx status %08x, (max frame length error)", (unsigned int)pkt_status);
+            break;
+
+        case ETH_RX_RESOURCE_ERROR:
+            printk("bad rx status %08x, (resource error)", (unsigned int)pkt_status);
+            break;
+    }
+    printk("\n");
+}
+
+static INLINE struct sk_buff* eth_skb_alloc(mv_eth_priv *priv, MV_PKT_INFO* pPktInfo,
+                                            int mtu)
+{
+    int             buf_size;
+    struct sk_buff  *skb;
+
+    /* allocate new skb */
+    /* 32(extra for cache prefetch) + 8 to align on 8B */
+    buf_size = MV_RX_BUF_SIZE(mtu) + CPU_D_CACHE_LINE_SIZE  + 8;
+
+    skb = dev_alloc_skb( buf_size ); 
+    if( !skb ) {
+        ETH_DBG( ETH_DBG_RX_FILL, ("%s: rx_fill cannot allocate skb\n", dev->name) );
+        ETH_STAT_ERR(priv->eth_stat.skb_alloc_fail++);
+        return NULL;
+    }
+    ETH_STAT_DBG(priv->eth_stat.skb_alloc_ok++);
+
+    /* align the buffer on 8B */
+    if( (unsigned long)(skb->data) & 0x7 ) {
+        skb_reserve( skb, 8 - ((unsigned long)(skb->data) & 0x7) );
+    }
+        
+    /* Most of PktInfo and BufInfo parameters left unchanged */
+    pPktInfo->osInfo = (MV_ULONG)skb;
+    pPktInfo->pFrags->bufSize = MV_RX_BUF_SIZE( mtu);
+    pPktInfo->pktSize = pPktInfo->pFrags->bufSize;
+    pPktInfo->pFrags->bufPhysAddr = mvOsIoVirtToPhy(NULL, skb->data);
+    pPktInfo->pFrags->bufVirtPtr = skb->data;
+	
+	return skb;
+} 
+
+#ifdef CONFIG_MV_SKB_REUSE
+int eth_skb_reuse_enable = MV_ETH_SKB_REUSE_DEFAULT;
+static INLINE mv_eth_priv* eth_skb_reusable(struct sk_buff *skb)
+{
+    int i;
+
+    if( (!eth_skb_reuse_enable) )
+        return NULL;
+
+    if( (atomic_read(&skb->users) == 1) &&
+		(!skb_cloned(skb)) &&        
+		(skb->data_len == 0) &&
+        (skb_shinfo(skb)->nr_frags == 0) )
+    {
+        for(i=0; i<mv_eth_ports_num; i++) 
+        {
+            mv_eth_priv *priv = mv_eth_ports[i];
+
+	        if (priv != NULL) 
+            {
+                int         size = MV_RX_BUF_SIZE( priv->net_dev->mtu) +
+                                    CPU_D_CACHE_LINE_SIZE + 8 + NET_SKB_PAD;
+
+                size = SKB_DATA_ALIGN(size);
+/*
+                printk("port=%d: skb=%p, iff=%d, truesize=%d, size=%d, idx=%d\n", 
+                            priv->port, skb, skb->iif, skb->truesize, 
+                            size, mvStackIndex(priv->skbReusePool));
+*/
+                if( (mvStackIndex(priv->skbReusePool) > 0) &&
+                    ((skb->end - skb->head) >= size) )
+                {
+
+/*                  printk("skb=%p is Reusable\n", skb);*/
+                    return priv;
+                }
+            }
+        }
+    }
+/*    printk("skb=%p is NOT reusable\n", skb); */
+    return NULL;
+}
+
+static INLINE void  eth_skb_reset(struct sk_buff *skb)
+{
+    /* Taken from __kfree_skb() */
+    skb_dst_drop(skb);
+
+#ifdef CONFIG_XFRM
+    secpath_put(skb->sp);
+#endif /* CONFIG_XFRM */ 
+
+    if (skb->destructor) {
+            WARN_ON(in_irq());
+            skb->destructor(skb);
+            skb->destructor = NULL;
+    }
+
+#if defined(CONFIG_NF_CONNTRACK) || defined(CONFIG_NF_CONNTRACK_MODULE)
+    if(skb->nfct)
+    {
+        nf_conntrack_put(skb->nfct);
+        skb->nfct = 0;
+    }
+    if(skb->nfct_reasm)
+    {
+        nf_conntrack_put_reasm(skb->nfct_reasm);
+        skb->nfct_reasm = 0;
+    }
+#endif /* CONFIG_NF_CONNTRACK || CONFIG_NF_CONNTRACK_MODULE */
+
+#ifdef CONFIG_BRIDGE_NETFILTER
+        nf_bridge_put(skb->nf_bridge);
+        skb->nf_bridge = 0;
+#endif /* CONFIG_BRIDGE_NETFILTER */
+/* XXX: IS this still necessary? - JHS */
+#ifdef CONFIG_NET_SCHED
+        skb->tc_index = 0;
+#ifdef CONFIG_NET_CLS_ACT
+        skb->tc_verd = 0;
+#endif /* CONFIG_NET_CLS_ACT */
+#endif /* CONFIG_NET_SCHED */
+
+    skb->pkt_type = 0; 
+    skb->iif = 0;
+    skb->sk = 0; 
+    skb->len = 0;
+
+    skb->data = skb->tail = skb->head + NET_SKB_PAD;
+
+    /* align the buffer on 8B */
+    if( (unsigned long)(skb->data) & 0x7 ) {
+        skb_reserve( skb, 8 - ((unsigned long)(skb->data) & 0x7) );
+    }
+}
+
+static INLINE void eth_skb_alloc_for_reuse(mv_eth_priv *priv, int mtu)
+{
+    int             idx;
+    MV_PKT_INFO     *pPktInfo = NULL;
+    struct sk_buff  *skb;
+
+    idx = mvStackIndex(priv->skbReusePool);
+    while(idx > 0)
+    {
+        ETH_STAT_DBG(priv->eth_stat.skb_reuse_alloc++);
+        pPktInfo = (MV_PKT_INFO*)mvStackPop(priv->skbReusePool);
+        idx--;
+
+        skb = eth_skb_alloc(priv, pPktInfo, mtu);
+        if(skb == NULL)
+        {
+            /* return PktInfo to Pool */
+            mvStackPush(priv->skbReusePool, (MV_U32)pPktInfo);
+            break;
+        }
+        mvStackPush(priv->fpRxPool, (MV_U32)pPktInfo);
+    }
+}
+#endif /* CONFIG_MV_SKB_REUSE */
+
+#if defined(CONFIG_MV_ETH_NFP) || defined(CONFIG_MV_SKB_REUSE)
+static INLINE MV_PKT_INFO* eth_pkt_info_get(mv_eth_priv  *priv)
+{
+    if(mvStackIndex(priv->fpRxPool) > 0)
+        return (MV_PKT_INFO*)mvStackPop(priv->fpRxPool);
+
+    return NULL;
+}
+#endif /* CONFIG_MV_ETH_NFP || CONFIG_MV_SKB_REUSE */
+
+static INLINE void  eth_pkt_info_free(mv_eth_priv *priv, MV_PKT_INFO* pPktInfo)
+{
+#ifdef CONFIG_MV_ETH_NFP
+    if(pPktInfo->srcIdx != (char)-1)
+    {
+        mv_eth_priv  *src_priv = mv_eth_ports[(int)pPktInfo->srcIdx];
+
+        /* Return to the NFP pool */
+#ifdef CONFIG_MV_GATEWAY
+        if(!priv->isGtw)
+		    pPktInfo->pFrags->bufPhysAddr -= ETH_MV_HEADER_SIZE;
+#else
+        pPktInfo->pFrags->bufPhysAddr -= ETH_MV_HEADER_SIZE;
+#endif /* CONFIG_MV_GATEWAY */
+
+        mvStackPush(src_priv->fpRxPool, (MV_U32)pPktInfo);
+	    return;
+    }
+#endif /* CONFIG_MV_ETH_NFP */
+
+    if(pPktInfo->osInfo)
+    {
+        struct sk_buff *skb = (struct sk_buff *)pPktInfo->osInfo;
+
+#ifdef CONFIG_MV_SKB_REUSE
+        mv_eth_priv  *rx_priv = eth_skb_reusable(skb);
+
+        if( rx_priv != NULL)
+        {
+            MV_PKT_INFO*    pkt_info = NULL;
+
+            ETH_STAT_DBG(rx_priv->eth_stat.skb_reuse_tx++);
+            pkt_info = (MV_PKT_INFO*)mvStackPop(rx_priv->skbReusePool);
+            eth_skb_reset(skb);
+
+            pkt_info->osInfo = (MV_ULONG)skb;
+            pkt_info->pktSize = pkt_info->pFrags->bufSize;
+            pkt_info->pFrags->bufPhysAddr = mvOsIoVirtToPhy(NULL, skb->data);
+            pkt_info->pFrags->bufVirtPtr = skb->data;
+
+            mvStackPush(rx_priv->fpRxPool, (MV_U32)pkt_info);
+            pPktInfo->osInfo = 0;
+            mvStackPush(priv->txPktInfoPool, (MV_U32)pPktInfo);
+            return;
+        }
+#endif /* CONFIG_MV_SKB_REUSE */
+
+        dev_kfree_skb_any(skb);
+        ETH_STAT_DBG(priv->eth_stat.skb_free_ok++);
+        pPktInfo->osInfo = 0;
+    }
+    mvStackPush(priv->txPktInfoPool, (MV_U32)pPktInfo);
+}
+/**************************************************************************************************************/
+
+
+#ifdef ETH_MV_TX_EN
+void    eth_tx_en_config(int port, int value)
+{
+    MV_U32          port_status = 0;
+    mv_eth_priv     *priv = eth_priv_by_port(port);
+
+    if (priv == NULL)
+    {
+        printk("eth_tx_en_config: wrong port number %d\n", port);
+	    return;
+    }
+
+    if(value == 0)
+    {
+        /* Disable TX_EN support */
+        priv->tx_en_bk = priv->tx_en = MV_FALSE;
+    }
+    else
+    {
+        /* Enable TX_EN support if possible: Link is Down or Duplex != Half or Speed != 10 Mbps */
+        priv->tx_en_deep = value;
+        priv->tx_en_bk = MV_TRUE;
+
+        /* Check ethernet port status */
+        port_status = MV_REG_READ( ETH_PORT_STATUS_REG( port ) );
+        if( !(port_status & ETH_LINK_UP_MASK) || 
+             (port_status & ETH_FULL_DUPLEX_MASK) ||
+             (port_status & ETH_GMII_SPEED_1000_MASK) ||
+             (port_status & ETH_MII_SPEED_100_MASK) )
+            priv->tx_en = MV_TRUE;
+    }
+    printk("GbE port %d: TxEnable WA - %s, deep=%d, tx_en_bk=%d\n\n", 
+            priv->port, priv->tx_en ? "Enabled" : "Disabled", 
+            priv->tx_en_deep, priv->tx_en_bk);    
+}
+
+static INLINE void  eth_tx_enable(mv_eth_priv *priv, int queue)
+{
+    int             ret;
+
+    ret = mvEthPortTxEnable(priv->hal_priv, queue, priv->tx_en_deep);
+    if(ret < 0)
+    {
+        ETH_STAT_DBG(priv->eth_stat.tx_en_busy++);
+    }
+    else 
+    {
+        if(ret > 0)
+        {
+            ETH_STAT_DBG(priv->eth_stat.tx_en_wait++);
+            ETH_STAT_DBG(priv->eth_stat.tx_en_wait_count += ret);
+        }        
+        else
+        {
+            ETH_STAT_DBG(priv->eth_stat.tx_en_done++);
+        }
+    }
+}
+#endif /* ETH_MV_TX_EN */
+/**************************************************************************************************************/
+
+
+
+/***********************************************************
+ * mv_eth_down_internals --                                 *
+ *   down port rx/tx activity. free skb's from rx/tx rings.*
+ ***********************************************************/
+int     mv_eth_down_internals( struct net_device *dev )
+{
+    mv_eth_priv     *priv = MV_ETH_PRIV(dev);
+    MV_PKT_INFO     *pPktInfo;
+    unsigned int    queue;
+
+    /* stop the port activity, mask all interrupts */
+    if( mvEthPortDown( priv->hal_priv ) != MV_OK ) {
+        printk( KERN_ERR "%s: ethPortDown failed\n", dev->name );
+        goto error;
+    }
+
+    /* free the skb's in the hal tx ring */
+    for(queue=0; queue<MV_ETH_TX_Q_NUM; queue++) 
+    {
+        while( (pPktInfo = mvEthPortForceTxDone(priv->hal_priv, queue)) ) 
+        {
+            eth_pkt_info_free(priv, pPktInfo);
+        }
+        priv->tx_count[queue] = 0;
+    }
+    
+    return 0;
+
+error:
+    printk( KERN_ERR "%s: stop internals failed\n", dev->name );
+    return -1;
+}
+/**************************************************************************************************************/
+
+static void eth_check_link_status(struct net_device *dev)
+{
+    mv_eth_priv     *priv = MV_ETH_PRIV(dev);
+    MV_U32          port_status = 0;
+
+        ETH_STAT_INFO(priv->eth_stat.link_events++);
+
+    	/* Check Link status on ethernet port */
+        port_status = MV_REG_READ( ETH_PORT_STATUS_REG( priv->port ) );
+
+        spin_lock(priv->lock);
+
+        if(port_status & ETH_LINK_UP_MASK) { 
+
+#ifdef ETH_MV_TX_EN
+        /* Disable TX Enable WA if one of Giga ports is Half Duplex or 10 Mbps */
+        if( ((port_status & ETH_FULL_DUPLEX_MASK) ||
+             (port_status & ETH_GMII_SPEED_1000_MASK) ||
+             (port_status & ETH_MII_SPEED_100_MASK)) )
+        {
+            priv->tx_en = priv->tx_en_bk;
+        }
+        else
+        {
+            priv->tx_en_bk = priv->tx_en;
+            priv->tx_en = MV_FALSE;
+        }
+#endif /* ETH_MV_TX_EN */
+
+            mvEthPortUp( priv->hal_priv );
+            netif_carrier_on( dev );
+            netif_wake_queue( dev );            
+        }
+    	else
+        {
+            netif_carrier_off( dev );
+            netif_stop_queue( dev );
+            mv_eth_down_internals( dev );
+        }
+
+        spin_unlock(priv->lock);
+
+   	eth_print_link_status( dev );
+}
+/**************************************************************************************************************/
+
+static INLINE int   eth_rx_policy(mv_eth_priv *priv)
+{
+    u32     rxq_map;
+
+    rxq_map = ( ( (priv->picr & ETH_RXQ_MASK) >> ETH_CAUSE_RX_READY_OFFSET) | 
+		        ( (priv->picr & ETH_RXQ_RES_MASK) >> ETH_CAUSE_RX_ERROR_OFFSET) );
+    
+    return (fls(rxq_map) - 1);
+}
+
+
+static INLINE int   eth_tx_policy(mv_eth_priv *priv, struct sk_buff *skb)
+{
+    int     queue;
+
+#if (MV_ETH_TX_Q_NUM > 1) 
+    if( ip_hdr(skb) )
+    {
+        queue = mv_eth_tos_to_q_map(ip_hdr(skb)->tos, MV_ETH_TX_Q_NUM);
+    }
+    else
+#endif /* (MV_ETH_TX_Q_NUM > 1) */
+    {
+        /* no multiqueue. all packets go to one default queue. */
+        queue = ETH_DEF_TXQ;
+    }
+
+    return queue;
+}
+/**************************************************************************************************************/
+
+
+
+/*********************************************************** 
+ * eth_tx_done --                                             *
+ *   release transmitted packets. interrupt context.       *
+ ***********************************************************/
+static INLINE u32 eth_tx_done(mv_eth_priv *priv, int queue)
+{
+    MV_PKT_INFO*            pPktInfo;
+    u32                     count = 0;
+
+    ETH_DBG( ETH_DBG_TX_DONE, ("eth%s: tx-done ", priv->port) );
+    ETH_STAT_INFO(priv->eth_stat.tx_done_events++);
+
+    /* release the transmitted packets */
+    while( 1 ) 
+    {
+        /* get a packet */ 
+        pPktInfo = mvEthPortTxDone(priv->hal_priv, queue);
+        if(pPktInfo) 
+        {
+             /* handle tx error */
+            if( pPktInfo->status & (ETH_ERROR_SUMMARY_MASK) ) {
+                ETH_DBG( ETH_DBG_TX_DONE, ("GbE port %d: bad tx-done status\n", priv->port) );
+                priv->net_dev->stats.tx_errors++;
+            }
+
+            count++;
+            ETH_STAT_DBG( priv->eth_stat.tx_done_hal_ok[queue]++);
+
+            eth_pkt_info_free(priv, pPktInfo);
+            continue;
+        }
+        else 
+        {
+            /* no more work */
+            break;
+        }
+    }
+#if (MV_ETH_TX_Q_NUM == 1)
+    /* if transmission was previously stopped, now it can be restarted. */
+    if( netif_queue_stopped( priv->net_dev ) && (priv->net_dev->flags & IFF_UP) && (count > 0) ) {
+        ETH_DBG( ETH_DBG_TX_DONE, ("%s: restart transmit\n", priv->net_dev->name) );
+        ETH_STAT_ERR( priv->eth_stat.tx_done_netif_wake++);
+        netif_wake_queue( priv->net_dev );    
+    }
+#endif /* MV_ETH_TX_Q_NUM == 1 */
+
+    ETH_STAT_DBG( priv->eth_stat.tx_done_dist[count]++);
+    ETH_DBG( ETH_DBG_TX_DONE, ("GbE port %d: tx-done %d\n", priv->port, count) );
+    return count;
+}
+/**************************************************************************************************************/
+
+static INLINE int eth_rx(struct net_device *dev, unsigned int work_to_do, int queue)
+{
+    mv_eth_priv             *priv = MV_ETH_PRIV(dev);
+    struct net_device_stats	*stats = MV_NETDEV_STATS(dev);
+    struct sk_buff          *skb;
+    MV_U8                   *data;
+    MV_PKT_INFO             *pPktInfo;
+    int                     work_done = 0;
+    MV_STATUS               status;
+    struct net_device       *out_dev = NULL;
+    MV_U32		            rx_status; 
+#ifdef CONFIG_MV_ETH_NFP
+    int			            out_if_index;
+    MV_IP_HEADER            *pIpHdr;
+    int                     nfp = fp_is_enabled(); 
+#endif /* CONFIG_MV_ETH_NFP */
+
+    ETH_DBG( ETH_DBG_RX, ("%s: rx_poll work_to_do %d\n", dev->name, work_to_do) );
+
+    /* fairness NAPI loop */
+    while( work_done < work_to_do ) {
+
+        /* get rx packet */ 
+        pPktInfo = mvEthPortRx( priv->hal_priv, queue);
+        /* check status */
+        if( pPktInfo == NULL) 
+        {
+            /* no more rx packets ready */
+            break;
+        }
+        prefetch(pPktInfo->pFrags->bufVirtPtr);
+
+	    rx_status = pPktInfo->status;
+	    if (rx_status  & (ETH_ERROR_SUMMARY_MASK)) 
+	    {
+            eth_print_rx_errors(rx_status);
+	        mvEthPortRxDone(priv->hal_priv, queue, pPktInfo);
+            stats->rx_errors++;
+            continue;
+	    }
+
+        work_done++;
+        ETH_STAT_DBG( priv->eth_stat.rx_hal_ok[queue]++);
+
+        /* good rx */
+        skb = (struct sk_buff *)( pPktInfo->osInfo );
+        data = (MV_U8*)skb->data;
+        ETH_DBG( ETH_DBG_RX, ("good rx: skb=%p, skb->data=%p\n", skb, skb->data) );
+
+#ifdef CONFIG_MV_GATEWAY
+        if(priv->isGtw)
+        {
+	        dev = mv_gtw_ingress_dev(data);
+	        stats = MV_NETDEV_STATS(dev);
+        }
+#endif /* CONFIG_MV_GATEWAY */
+	
+        stats->rx_packets++;
+        stats->rx_bytes += pPktInfo->pFrags->dataSize - ETH_MV_HEADER_SIZE;
+
+#ifdef CONFIG_MV_ETH_NFP
+	    if (nfp)
+	    {
+            int txq = ETH_DEF_TXQ;
+
+            out_dev = NULL;
+            pIpHdr = mvFpParsing(pPktInfo, &priv->fpStats);
+            if(pIpHdr != NULL)
+            {
+                out_if_index = mvFpProcess(dev->ifindex, pPktInfo->pFrags->bufVirtPtr, pIpHdr, &priv->fpStats);
+                if(out_if_index != -1)
+                {
+                    out_dev = fp_mgr_get_net_dev(out_if_index);
+                    if(fp_mgr_get_if_type(out_if_index) == MV_FP_IF_INT)
+                    {
+                	    mv_eth_priv    *out_priv = MV_ETH_PRIV(out_dev);
+#if defined(CONFIG_MV_GATEWAY)
+                        if(out_priv->isGtw)
+                        {
+				            struct mv_vlan_cfg* vlan_cfg = MV_NETDEV_VLAN(out_dev);
+				            *(unsigned short *)(pPktInfo->pFrags->bufVirtPtr) = vlan_cfg->header;
+                        }
+                        else
+#endif /* CONFIG_MV_GATEWAY */
+                        {
+				            pPktInfo->pFrags->bufPhysAddr += ETH_MV_HEADER_SIZE;
+				            pPktInfo->pFrags->dataSize -= ETH_MV_HEADER_SIZE;
+                        }
+                        mvOsCacheLineFlushInv(NULL, pPktInfo->pFrags->bufVirtPtr);	
+                        mvOsCacheLineFlushInv(NULL, pPktInfo->pFrags->bufVirtPtr 
+                                                        + CPU_D_CACHE_LINE_SIZE);
+
+            	        spin_lock(out_priv->lock);
+
+            	        status = mvEthPortTx(out_priv->hal_priv, txq, pPktInfo);
+            	        if( status != MV_OK ) 
+            	        {
+				            out_dev->stats.tx_dropped++;
+				            spin_unlock(out_priv->lock);
+#if defined(CONFIG_MV_GATEWAY)
+				            if(!(out_priv->isGtw))
+#endif /* CONFIG_MV_GATEWAY */
+					            pPktInfo->pFrags->bufPhysAddr -= ETH_MV_HEADER_SIZE;
+
+				            mvEthPortRxDone( priv->hal_priv, queue, pPktInfo );
+				            continue;
+			            }
+                	    out_priv->tx_count[txq]++;
+                	    out_dev->stats.tx_packets++;
+                	    out_dev->stats.tx_bytes += pPktInfo->pFrags->dataSize;
+                	    ETH_STAT_DBG( out_priv->eth_stat.tx_hal_ok[txq]++);
+
+                	    spin_unlock(out_priv->lock);
+                	    /* refill RX queue */
+                	    pPktInfo = eth_pkt_info_get(priv);
+			            if (pPktInfo != NULL)
+                	        mvEthPortRxDone( priv->hal_priv, queue, pPktInfo );
+			            else
+			            {
+                            ETH_STAT_ERR(priv->eth_stat.rx_pool_empty++);
+			                priv->refill_needed_flag = 1;
+			            }
+                	    continue;
+                    }
+                }
+            }
+	    }
+#endif /* CONFIG_MV_ETH_NFP */
+
+	    /* skip on 2B Marvell-header */
+	    skb_reserve(skb, ETH_MV_HEADER_SIZE);
+	    skb_put(skb, pPktInfo->pFrags->dataSize - ETH_MV_HEADER_SIZE);
+
+        if(out_dev != NULL)
+        {
+            /* Send to external net_device */
+            out_dev->netdev_ops->ndo_start_xmit(skb, out_dev);
+        }
+        else
+        {
+            skb->dev = dev;
+
+            skb->ip_summed = CHECKSUM_NONE;
+            skb->protocol = eth_type_trans(skb, dev);
+
+#ifdef RX_CSUM_OFFLOAD
+	        if ((pPktInfo->pFrags->dataSize > (ETH_CSUM_MIN_BYTE_COUNT-4))  && 
+		        (rx_status & ETH_RX_IP_FRAME_TYPE_MASK) && 
+		        (rx_status & ETH_RX_IP_HEADER_OK_MASK)) 
+            {  
+			    if (!(pPktInfo->fragIP)		&&
+			        (!(rx_status & ETH_RX_L4_OTHER_TYPE)) &&
+			        (rx_status & ETH_RX_L4_CHECKSUM_OK_MASK)) 
+                { 
+				    skb->csum = 0;
+				    skb->ip_summed = CHECKSUM_UNNECESSARY;	
+				    ETH_STAT_DBG(priv->eth_stat.rx_csum_hw++);
+			    }
+			    else if (pPktInfo->fragIP && (rx_status & ETH_RX_L4_UDP_TYPE)) {	/* TBD: UDP only */
+				    skb->csum = ntohl(0xFFFF ^ ((rx_status & ETH_RX_L4_CHECKSUM_MASK) >> ETH_RX_L4_CHECKSUM_OFFSET));
+				    skb->ip_summed = CHECKSUM_COMPLETE;
+				    ETH_STAT_DBG( priv->eth_stat.rx_csum_hw_frags++);
+			    }
+                else
+                {
+                    ETH_STAT_DBG(priv->eth_stat.rx_csum_sw++);
+                }
+	        }
+            else {
+                ETH_DBG( ETH_DBG_RX, ("%s: no RX csum offload\n", dev->name) );
+		        ETH_STAT_DBG(priv->eth_stat.rx_csum_sw++);
+            }
+#endif /* RX_CSUM_OFFLOAD*/
+
+#ifdef CONFIG_MV_GTW_IGMP
+            if (priv->isGtw && (rx_status & ETH_RX_L4_OTHER_TYPE)) {
+				struct iphdr* iph = (struct iphdr*)skb->data;
+
+				if ((skb->protocol == htons(ETH_P_IP)) && 
+					(iph->protocol == IPPROTO_IGMP)) {
+					
+					mv_gtw_igmp_snoop_process(skb, mv_gtw_ingress_port(data),
+											       mv_gtw_ingress_vlan(data) );
+				}
+			}
+#endif /* CONFIG_MV_GTW_IGMP */
+
+#ifdef ETH_INCLUDE_LRO
+	        status = 0; /* FIXME: LRO receive is void */
+
+	        /* non-fragmented TCP */
+	        if( !(pPktInfo->fragIP || 
+                (rx_status & ETH_RX_L4_OTHER_TYPE) || 
+                (rx_status & ETH_RX_L4_UDP_TYPE)))
+            {
+		        lro_receive_skb(&priv->lro_mgr, skb, priv);
+            }
+	        else
+#endif /* ETH_INCLUDE_LRO */
+
+#ifdef ETH_INCLUDE_LRO_UDP
+		    /* fragmented UDP */
+		    if (pPktInfo->fragIP && (rx_status & ETH_RX_L4_UDP_TYPE))
+		        lro_receive_skb(&priv->lro_mgr, skb, priv);
+		    else 
+#endif	/* ETH_INCLUDE_LRO_UDP */	          
+            {
+                status = netif_receive_skb(skb);
+            }
+            ETH_STAT_DBG( if(status) (priv->eth_stat.rx_netif_drop++) );
+
+#ifdef CONFIG_MV_SKB_REUSE
+            if( eth_skb_reuse_enable && 
+        	    ( !mvStackIsFull(priv->skbReusePool)) )
+            {
+        	    ETH_STAT_DBG(priv->eth_stat.skb_reuse_rx++);
+        	    mvStackPush(priv->skbReusePool, (MV_U32)pPktInfo);
+        	    /* refill RX queue */
+        	    pPktInfo = eth_pkt_info_get(priv);
+        	    if(pPktInfo != NULL)
+                    mvEthPortRxDone( priv->hal_priv, queue, pPktInfo );
+                else
+                {
+                    ETH_STAT_ERR(priv->eth_stat.rx_pool_empty++);
+		            priv->refill_needed_flag = 1;
+                }
+        	    continue;
+            }
+#endif /* CONFIG_MV_SKB_REUSE */
+	    }
+
+        /* Refill this buffer */
+        skb = eth_skb_alloc(priv, pPktInfo, dev->mtu);
+        if(skb == NULL)
+            continue;
+
+        /* give the buffer to hal */
+        status = mvEthPortRxDone(priv->hal_priv, queue, pPktInfo);
+        if( (status != MV_OK) && (status != MV_FULL) )
+        {
+            printk( KERN_ERR "%s: error in rx-fill, status=%d\n", dev->name, status );
+        }
+        ETH_STAT_DBG( priv->eth_stat.rx_fill_ok[queue]++);
+    }
+
+    ETH_STAT_DBG( priv->eth_stat.rx_dist[work_done]++); 
+    ETH_DBG( ETH_DBG_RX, ("\nwork_done %d", work_done));
+
+    /* notify upper layer about more work to do */
+    return work_done;
+}
+/**************************************************************************************************************/
+
+
+/*********************************************************** 
+ * eth_rx_fill --                                        *
+ *   fill new rx buffers to ring.                          *
+ ***********************************************************/
+MV_STATUS   eth_rx_fill(mv_eth_priv *priv, int pool_size, int mtu)
+{
+    MV_PKT_INFO     *pPktInfo;
+    MV_BUF_INFO     *pBufInfo;
+    struct sk_buff  *skb;
+    u32             count;
+    MV_STATUS       status;
+    int             rxq = 0;
+
+	count = 0;
+    while(pool_size > count) {
+
+    /* First of all fill all RX QUEUEs */
+        for(; rxq<MV_ETH_RX_Q_NUM; rxq++)
+        {
+            if( mvEthRxResourceGet(priv->hal_priv, rxq) < mv_eth_rxq_desc[rxq] )
+            {
+                break;
+            }       
+        }
+#if defined(CONFIG_MV_ETH_NFP) || defined(CONFIG_MV_SKB_REUSE)
+#else
+        if(rxq >= MV_ETH_RX_Q_NUM)
+            return MV_OK;
+#endif /* CONFIG_MV_ETH_NFP || CONFIG_MV_SKB_REUSE */
+
+        pPktInfo = mvOsMalloc(sizeof(MV_PKT_INFO));
+        if(pPktInfo == NULL)
+        {
+            printk("GbE port %d: Can't allocate %d bytes for MV_PKT_INFO\n",
+                        priv->port, sizeof(MV_PKT_INFO));
+            return MV_OUT_OF_CPU_MEM;
+        }
+
+        pBufInfo = mvOsMalloc(sizeof(MV_BUF_INFO));
+        if(pBufInfo == NULL)
+        {
+            printk("GbE port %d: Can't allocate %d bytes for MV_BUF_INFO\n",
+                        priv->port, sizeof(MV_BUF_INFO));
+            mvOsFree(pPktInfo);
+            return MV_OUT_OF_CPU_MEM;
+        }
+
+        pBufInfo->dataSize = 0;
+        pPktInfo->pFrags = pBufInfo;
+        pPktInfo->numFrags = 1;
+        pPktInfo->status = 0;
+        pPktInfo->srcIdx = (char)priv->port;
+
+        skb = eth_skb_alloc(priv, pPktInfo, mtu);
+        if(skb == NULL)
+        {
+            mvOsFree(pPktInfo);
+            mvOsFree(pBufInfo);
+            return MV_OUT_OF_CPU_MEM;
+        }
+        count++;
+
+        if(rxq < MV_ETH_RX_Q_NUM)
+        {
+            status = mvEthPortRxDone(priv->hal_priv, rxq, pPktInfo);
+            if( (status != MV_OK) && (status != MV_FULL) )
+            {
+               printk("rx_fill: q=%d, resource=%d, status=%d\n", 
+                               rxq, mvEthRxResourceGet(priv->hal_priv, rxq), status);
+            }
+		    ETH_STAT_DBG( priv->eth_stat.rx_fill_ok[rxq]++);
+            continue;
+        }
+
+#if defined(CONFIG_MV_ETH_NFP) || defined(CONFIG_MV_SKB_REUSE)
+        /* Push extra RX buffers to fpRxPool */
+        mvStackPush(priv->fpRxPool, (MV_U32)pPktInfo);
+#endif /* CONFIG_MV_ETH_NFP || CONFIG_MV_SKB_REUSE*/
+    }
+    return MV_OK;
+}
+
+
+/*********************************************************** 
+ * mv_eth_interrupt_handler --                              *
+ *   serve rx-q0, tx-done-q0, phy/link state change.       *
+ *   phy is served in interrupt context.           *
+ *   tx and rx are scheduled out of interrupt context (NAPI poll)  *
+ ***********************************************************/
+irqreturn_t     mv_eth_interrupt_handler(int irq , void *dev_id)
+{
+    mv_eth_priv         *priv = (mv_eth_priv*)dev_id;
+    struct net_device   *dev  = priv->net_dev;
+
+    ETH_DBG( ETH_DBG_INT, ("\n%s: isr ", dev->name) );
+    ETH_STAT_INFO(priv->eth_stat.irq_total++);
+
+    /* read port interrupt cause register */
+    mv_eth_save_interrupts(priv);
+
+    ETH_DBG(ETH_DBG_INT, ("%s: mv_eth_interrupt_handler: picr=%x, picer=%x\n", 
+                            dev->name, priv->picr, priv->picer));
+
+#ifdef ETH_DEBUG
+    if( !priv->picr && !priv->picer) {
+        ETH_STAT_INFO(priv->eth_stat.irq_none++);
+        return IRQ_HANDLED;
+    }
+#endif /* ETH_DEBUG */
+
+    /* Verify that the device not already on the polling list */
+	 if (napi_schedule_prep(&priv->napi)) {
+	    /* schedule the work (rx+txdone+link) out of interrupt contxet */
+        mv_eth_mask_interrupts(priv);
+	__napi_schedule(&priv->napi);
+	 }    
+    else {
+	    if(netif_running(dev)) {
+            ETH_STAT_INFO(priv->eth_stat.irq_while_polling++);
+#ifdef ETH_DEBUG
+            printk("%s: Interrupt while in polling list\n", dev->name);
+	        eth_print_irq_status(priv);
+#endif /* ETH_DEBUG */
+	    }
+    }
+    mv_eth_clear_saved_interrupts(priv);
+
+    return IRQ_HANDLED;
+}
+
+
+static int eth_poll( struct napi_struct *napi, int budget )
+{
+    int             rx_done=0;
+    mv_eth_priv     *priv = container_of(napi, mv_eth_priv, napi);
+    struct net_device *dev = priv->dev;
+#ifdef ETH_TX_DONE_ISR
+    int             queue;
+#endif
+
+    ETH_STAT_INFO(priv->eth_stat.poll_events++);
+    ETH_DBG(ETH_DBG_POLL, ("%s: Start eth_poll\n", dev->name));
+
+    if( priv->picer & (1 << ETH_CAUSE_LINK_STATE_CHANGE_BIT) ) 
+    {
+        eth_check_link_status(dev);
+        priv->picer &= ~ETH_LINK_MASK;
+    }
+
+#ifdef ETH_TX_DONE_ISR
+        spin_lock(priv->lock);
+
+		queue = MV_ETH_TX_Q_NUM;
+		while(queue--)
+        {
+            if(priv->tx_count[queue] > 0)
+            {
+#ifdef ETH_MV_TX_EN
+                if(priv->tx_en)
+			        eth_tx_enable(priv, queue);
+#endif /* ETH_MV_TX_EN */
+
+		        priv->tx_count[queue] -= eth_tx_done(priv, queue);
+            }
+        }
+		spin_unlock(priv->lock);
+#endif /* ETH_TX_DONE_ISR */
+
+#if (MV_ETH_RX_Q_NUM > 1)
+    while(MV_TRUE)
+    {
+        queue = eth_rx_policy(priv);
+        if(queue == -1)
+            break;
+
+        rx_done += eth_rx( dev, budget, queue);
+        if(rx_done < budget)
+            priv->picr &= ~(ETH_CAUSE_RX_READY_MASK(queue) | 
+                            ETH_CAUSE_RX_ERROR_MASK(queue));
+        else
+            break;
+    }
+#else
+    rx_done = eth_rx( dev, budget, ETH_DEF_RXQ);
+#endif /* (MV_ETH_RX_Q_NUM > 1) */
+
+    budget -= rx_done;
+
+#if defined(CONFIG_MV_ETH_NFP) && !defined(ETH_TX_DONE_ISR)
+    if( fp_is_enabled() )
+    {
+        int i;
+
+        for(i=0; i<mv_eth_ports_num; i++) 
+        {
+          	mv_eth_priv  *tx_priv = mv_eth_ports[i];
+	        if (tx_priv != NULL) 
+            {		
+	       	    spin_lock(tx_priv->lock);
+
+		        queue = MV_ETH_TX_Q_NUM;
+		        while(queue--)
+                {
+			        if(tx_priv->tx_count[queue] > mv_eth_tx_done_quota)
+            	        tx_priv->tx_count[queue] -= eth_tx_done(tx_priv, queue);
+#ifdef ETH_MV_TX_EN
+                    if(tx_priv->tx_en && (tx_priv->tx_count[queue] > 0) )
+                        eth_tx_enable(tx_priv, queue);
+                }
+#endif /* ETH_MV_TX_EN */
+               	spin_unlock(tx_priv->lock);
+	        }
+        }
+    }
+#endif /* CONFIG_MV_ETH_NFP && !ETH_TX_DONE_ISR */
+
+#ifdef ETH_INCLUDE_LRO
+    if(rx_done)
+        lro_flush_all(&priv->lro_mgr);
+#endif	
+
+    ETH_DBG( ETH_DBG_POLL, ("poll work done: rx-%d\n", rx_done) );
+
+    if ( (!netif_running(dev)) || (rx_done < budget) )
+    { 
+        unsigned long flags;
+        local_irq_save(flags);
+	napi_complete(&priv->napi);
+        ETH_STAT_INFO(priv->eth_stat.poll_complete++);
+        mv_eth_unmask_interrupts(priv);
+	ETH_DBG( ETH_DBG_RX, ("unmask\n") );
+        local_irq_restore(flags);
+        return 0;
+    }
+    else
+    {
+#if (MV_ETH_RX_Q_NUM > 1)
+        /* Leave in NAPI context, so update picr and picer */
+        mv_eth_save_interrupts(priv);
+	mv_eth_clear_saved_interrupts(priv);
+#endif /* (MV_ETH_RX_Q_NUM > 1) */
+    }
+    return 1;
+}
+
+
+/* Show network driver configuration */
+void	mv_eth_config_show(void)
+{
+    int     i;
+
+    printk( "  o %s\n", ETH_DESCR_CONFIG_STR );
+
+#if defined(ETH_DESCR_IN_SRAM)
+    printk( "  o %s\n", INTEG_SRAM_CONFIG_STR );
+#endif
+
+    printk( "  o %s\n", ETH_SDRAM_CONFIG_STR );
+
+#if defined(ETH_INCLUDE_TSO) && !defined(TX_CSUM_OFFLOAD)
+#error "If TSO enabled - TX checksum offload must be enabled too"
+#endif
+
+#if (MV_ETH_RX_Q_NUM > 1)
+    printk( "  o Multi RX Queue support - %d RX queues\n", MV_ETH_RX_Q_NUM);
+#else
+    printk( "  o Single RX Queue support - ETH_DEF_RXQ=%d\n", ETH_DEF_RXQ);
+#endif /* MV_ETH_RX_Q_NUM > 1 */
+
+#if (MV_ETH_TX_Q_NUM > 1)
+    printk( "  o Multi TX Queue support - %d TX Queues\n", MV_ETH_TX_Q_NUM);
+#else
+    printk( "  o Single TX Queue support - ETH_DEF_TXQ=%d\n", ETH_DEF_TXQ);
+#endif /* MV_ETH_TX_Q_NUM > 1 */
+
+#if defined(ETH_INCLUDE_TSO)
+    printk("  o TCP segmentation offload enabled\n");
+#endif /* ETH_INCLUDE_TSO */
+
+#if defined(ETH_INCLUDE_UFO)
+    printk("  o UDP fragmentation offload enabled\n");
+#endif /* ETH_INCLUDE_UFO */
+
+#if defined(RX_CSUM_OFFLOAD)
+    printk("  o Receive checksum offload enabled\n");
+#endif
+#if defined(TX_CSUM_OFFLOAD)
+    printk("  o Transmit checksum offload enabled\n");
+#endif
+
+#ifdef CONFIG_MV_ETH_NFP
+    printk("  o Network Fast Processing (Routing) supported\n");
+
+#ifdef CONFIG_MV_ETH_NFP_NAT_SUPPORT
+    printk("  o Network Fast Processing (NAT) supported\n");
+#endif /* CONFIG_MV_ETH_NFP_NAT_SUPPORT */
+
+#endif /* CONFIG_MV_ETH_NFP */
+
+#ifdef CONFIG_MV_ETH_STATS_ERROR
+    printk("  o Driver ERROR statistics enabled\n");
+#endif
+
+#ifdef CONFIG_MV_ETH_STATS_INFO
+    printk("  o Driver INFO statistics enabled\n");
+#endif
+
+#ifdef CONFIG_MV_ETH_STATS_DEBUG
+    printk("  o Driver DEBUG statistics enabled\n");
+#endif
+
+#ifdef ETH_DEBUG
+    printk("  o Driver debug messages enabled\n");
+#endif
+
+#ifdef CONFIG_MV_ETH_PROC
+    printk("  o Proc tool API enabled\n");
+#endif
+
+#ifdef ETH_INCLUDE_LRO
+    printk("  o LRO TCP support enabled\n");
+#endif
+
+#ifdef ETH_INCLUDE_LRO_UDP
+    printk("  o LRO UDP support enabled\n");
+#endif
+
+#if defined(CONFIG_MV_GATEWAY)
+    printk("  o Gateway support enabled\n");
+
+    printk("     o Using Marvell Header Mode\n");
+
+#ifdef CONFIG_MV_GTW_IGMP
+    printk("     o L2 IGMP support\n");
+#endif /* CONFIG_MV_GTW_IGMP */
+
+#endif /* CONFIG_MV_GATEWAY */
+
+#if MV_ETH_RX_Q_NUM > MV_ETH_MAX_RXQ
+#error "MV_ETH_RX_Q_NUM is large than MV_ETH_MAX_RXQ"
+#endif 
+
+    printk("  o Rx descripors:");
+    for(i=0; i<MV_ETH_RX_Q_NUM; i++) {
+        printk(" q%d=%-3d", i, mv_eth_rxq_desc[i]);
+    }
+    printk("\n");
+
+#if MV_ETH_TX_Q_NUM > MV_ETH_MAX_TXQ
+#error "MV_ETH_TX_Q_NUM is large than MV_ETH_MAX_TXQ"
+#endif 
+
+    printk("  o Tx descripors:");
+    for(i=0; i<MV_ETH_TX_Q_NUM; i++) {
+        printk(" q%d=%-3d", i, mv_eth_txq_desc[i]);
+    }
+    printk("\n");
+}
+
+void    mv_netdev_set_features(struct net_device *dev)
+{
+    dev->features = NETIF_F_SG | NETIF_F_LLTX;
+
+#ifdef TX_CSUM_OFFLOAD
+        if(dev->mtu <= ETH_CSUM_MAX_BYTE_COUNT) 
+        {
+            dev->features |= NETIF_F_IP_CSUM;
+        }
+#endif /* TX_CSUM_OFFLOAD */
+
+#ifdef ETH_INCLUDE_TSO
+    if(dev->features & NETIF_F_IP_CSUM)
+	    dev->features |= NETIF_F_TSO;
+#endif /* ETH_INCLUDE_TSO */
+
+#ifdef ETH_INCLUDE_UFO
+    /* FIXME: HW_CSUM is required by dev.c */
+    if(dev->features & NETIF_F_IP_CSUM)
+        dev->features |= NETIF_F_UFO | NETIF_F_HW_CSUM; 
+#endif /* ETH_INCLUDE_UFO */
+}
+
+/*********************************************************** 
+ * mv_eth_start_internals --                                *
+ *   fill rx buffers. start rx/tx activity. set coalesing. *
+ *   clear and unmask interrupt bits                       *
+ ***********************************************************/
+int     mv_eth_start_internals(mv_eth_priv *priv, int mtu)
+{
+    unsigned long flags;
+    unsigned int status;
+
+    spin_lock_irqsave( priv->lock, flags); 
+
+    /* fill rx ring with buffers */
+    eth_rx_fill(priv, (mv_eth_rx_desc_total*2 + mv_eth_tx_desc_total), mtu);
+
+    mv_eth_clear_interrupts(priv);
+
+    /* start the hal - rx/tx activity */
+    status = mvEthPortEnable( priv->hal_priv );
+    if( (status != MV_OK) && (status != MV_NOT_READY)) {
+        printk( KERN_ERR "GbE port %d: ethPortEnable failed\n", priv->port);
+        spin_unlock_irqrestore( priv->lock, flags);
+      return -1;
+    }
+
+    /* set tx/rx coalescing mechanism */
+    mvEthTxCoalSet( priv->hal_priv, ETH_TX_COAL );
+    mvEthRxCoalSet( priv->hal_priv, ETH_RX_COAL );
+
+    spin_unlock_irqrestore( priv->lock, flags);
+
+    return 0;
+}
+
+/*********************************************************** 
+ * mv_eth_stop_internals --                                 *
+ *   stop port rx/tx activity. free skb's from rx/tx rings.*
+ ***********************************************************/
+int     mv_eth_stop_internals(mv_eth_priv *priv)
+{
+    MV_PKT_INFO     *pPktInfo;
+    unsigned int    queue;
+
+    /* stop the port activity, mask all interrupts */
+    if( mvEthPortDisable( priv->hal_priv ) != MV_OK ) {
+        printk( KERN_ERR "GbE port %d: ethPortDisable failed\n", priv->port );
+        goto error;
+    }
+
+    /* clear all ethernet port interrupts */
+    mv_eth_clear_interrupts(priv);
+
+    mv_eth_mask_interrupts(priv);
+
+    /* free the skb's in the hal tx ring and release memory */
+    for(queue=0; queue<MV_ETH_TX_Q_NUM; queue++)
+    {
+        while( (pPktInfo = mvEthPortForceTxDone(priv->hal_priv, queue)) ) 
+        {
+            eth_pkt_info_free(priv, pPktInfo);
+        }
+        priv->tx_count[queue] = 0;
+    }
+
+    /* free the skb's in the hal rx ring */
+    for(queue=0; queue<MV_ETH_RX_Q_NUM; queue++)
+    {    
+        while( (pPktInfo = mvEthPortForceRx( priv->hal_priv, queue)) ) {
+            dev_kfree_skb_any( (struct sk_buff *)pPktInfo->osInfo );
+            ETH_STAT_DBG(priv->eth_stat.skb_free_ok++);
+            mvOsFree(pPktInfo->pFrags);
+            mvOsFree(pPktInfo);
+        }
+    }
+
+#if defined(CONFIG_MV_ETH_NFP) || defined (CONFIG_MV_SKB_REUSE)
+    while( (pPktInfo = eth_pkt_info_get(priv)) )
+    {
+        dev_kfree_skb_any( (struct sk_buff *)pPktInfo->osInfo );
+        ETH_STAT_DBG(priv->eth_stat.skb_free_ok++);
+        mvOsFree(pPktInfo->pFrags);
+        mvOsFree(pPktInfo);
+    }
+#endif /* CONFIG_MV_ETH_NFP || CONFIG_MV_SKB_REUSE */
+
+    /* Reset Rx descriptors ring */
+    for(queue=0; queue<MV_ETH_RX_Q_NUM; queue++)
+    {
+        ethResetRxDescRing(priv->hal_priv, queue);
+    }
+    /* Reset Tx descriptors ring */
+    for(queue=0; queue<MV_ETH_TX_Q_NUM; queue++)
+    {
+        ethResetTxDescRing(priv->hal_priv, queue);
+    }
+
+    return 0;
+
+ error:
+    printk( KERN_ERR "GbE port %d: stop internals failed\n", priv->port );
+    return -1;
+}
+
+
+/*********************************************************** 
+ * mv_eth_change_mtu_internals --                                     *
+ *   stop port activity. release skb from rings. set new   *
+ *   mtu in device and hw. restart port activity and       *
+ *   and fill rx-buiffers with size according to new mtu.  *
+ ***********************************************************/
+int     mv_eth_change_mtu_internals( struct net_device *dev, int mtu )
+{
+    mv_eth_priv *priv = MV_ETH_PRIV(dev);
+
+    if(mtu < 1498 /* 1518 - 20 */) {
+        printk( "%s: Illegal MTU value %d, ", dev->name, mtu);
+        mtu = 1500;
+        printk(" rounding MTU to: %d \n",mtu);
+    }
+    else if(mtu > 9676 /* 9700 - 20 and rounding to 8 */) {
+        printk( "%s: Illegal MTU value %d, ", dev->name, mtu);
+        mtu = 9676;
+        printk(" rounding MTU to: %d \n",mtu);  
+    }
+
+    if(MV_RX_BUF_SIZE( mtu) & ~ETH_RX_BUFFER_MASK) {
+        printk( "%s: Illegal MTU value %d, ", dev->name, mtu);
+        mtu = 8 - (MV_RX_BUF_SIZE( mtu) & ~ETH_RX_BUFFER_MASK) + mtu;
+        printk(" rounding MTU to: %d \n",mtu);
+    }
+
+    /* set mtu in device and in hal sw structures */
+    if( mvEthMaxRxSizeSet( priv->hal_priv, MV_RX_BUF_SIZE( mtu)) ) {
+        printk( KERN_ERR "%s: ethPortSetMaxBufSize failed\n", dev->name );
+        return -1;
+    }
+
+    dev->mtu = mtu;
+
+    mv_netdev_set_features(dev);
+
+    return 0;
+}
+
+
+/*********************************************************** 
+ * mv_netdev_timer_callback --                                *
+ *   N msec periodic callback for cleanup.                 *
+ ***********************************************************/
+static void mv_netdev_timer_callback( unsigned long data )
+{
+    struct net_device   *dev = (struct net_device *)data;
+    mv_eth_priv         *priv = MV_ETH_PRIV(dev);
+    int                 queue;
+
+    ETH_DBG( ETH_DBG_TX, ("%s: timer_callback", dev->name) );
+    ETH_STAT_INFO(priv->eth_stat.timer_events++);
+    
+    spin_lock(priv->lock);
+
+#if defined(CONFIG_MV_ETH_NFP) || defined(CONFIG_MV_SKB_REUSE)
+    /* Refill pktInfo */
+	if (priv->refill_needed_flag) {
+        int             fill;
+        MV_PKT_INFO*    pPktInfo;
+
+  	    priv->refill_needed_flag = 0;
+        queue = MV_ETH_RX_Q_NUM;
+
+		while (queue--) {
+
+			fill = mv_eth_rxq_desc[queue] - mvEthRxResourceGet(priv->hal_priv, queue);
+
+            while (fill--) {
+		        pPktInfo = eth_pkt_info_get(priv);
+		        if (pPktInfo != NULL) {
+                	mvEthPortRxDone(priv->hal_priv, queue, pPktInfo);
+			        ETH_STAT_DBG(priv->eth_stat.rx_fill_ok[queue]++);
+		        }
+		        else {
+                    ETH_STAT_ERR(priv->eth_stat.rx_pool_empty++);
+                    priv->refill_needed_flag = 1;
+			        break;
+		        }
+            }
+        }
+    }
+#endif /* CONFIG_MV_ETH_NFP || CONFIG_MV_SKB_REUSE */
+
+    mvEthPortTxRestart(priv->hal_priv);
+
+
+#ifdef ETH_TX_DONE_ISR
+#else
+    /* Call TX done */
+	queue = MV_ETH_TX_Q_NUM;
+	while(queue--) {
+        if (priv->tx_count[queue] > 0) 
+			priv->tx_count[queue] -= eth_tx_done(priv, queue);
+    }
+#endif /* ETH_TX_DONE_ISR */ 
+
+
+#ifdef CONFIG_MV_SKB_REUSE
+    eth_skb_alloc_for_reuse(priv, dev->mtu);
+#endif /* CONFIG_MV_SKB_REUSE */
+
+    spin_unlock(priv->lock);
+
+    if(priv->timer_flag)
+    {
+        priv->timer.expires = jiffies + ((HZ*CONFIG_MV_ETH_TIMER_PERIOD)/1000); /*ms*/
+        add_timer( &priv->timer );
+    }
+}
+
+/* Initialize Ethernet port on chip */
+int    mv_eth_hal_init(mv_eth_priv *priv, int mtu, u8* mac)
+{
+    MV_ETH_PORT_INIT    hal_init_struct;
+
+        /* init the hal */
+    hal_init_struct.maxRxPktSize = MV_RX_BUF_SIZE(mtu);
+    hal_init_struct.rxDefQ = ETH_DEF_RXQ;
+    memcpy(hal_init_struct.rxDescrNum,  mv_eth_rxq_desc, sizeof(int)*MV_ETH_RX_Q_NUM);
+    memcpy(hal_init_struct.txDescrNum,  mv_eth_txq_desc, sizeof(int)*MV_ETH_TX_Q_NUM);
+    hal_init_struct.osHandle = NULL;
+
+    priv->hal_priv = mvEthPortInit( priv->port, &hal_init_struct );
+    if( !priv->hal_priv ) {
+        printk( KERN_ERR "eth port=%d: load failed\n", priv->port);
+        return -ENODEV;
+    }
+
+#ifdef CONFIG_ETH_FLOW_CONTROL
+    /* enable flow Control in MAC level */
+    mvEthFlowCtrlSet(priv->hal_priv, MV_ETH_FC_ENABLE);
+#endif
+
+    if(mac)
+    {
+        /* set new addr in hw */
+        if( mvEthMacAddrSet( priv->hal_priv, mac, ETH_DEF_RXQ) != MV_OK ) 
+        {
+            printk("mv_eth_hal_init: ethSetMacAddr failed for port=%d\n", priv->port);
+            return -ENODEV;
+        }
+    }
+    else
+    {
+        mvEthRxFilterModeSet(priv->hal_priv, MV_TRUE);
+    }
+
+    if( mvEthMaxRxSizeSet( priv->hal_priv, MV_RX_BUF_SIZE(mtu)) ) {
+        printk( "mv_eth_hal_init: ethPortSetMaxBufSize failed for port=%d\n", priv->port);
+        return -ENODEV;
+    }
+    return 0;
+}
+
+/* Initialize HAL level of Ethernet driver */
+int    mv_eth_priv_init(mv_eth_priv *priv, int port)
+{
+    int         txq, i;
+    MV_PKT_INFO *pkt_info;
+
+    memset(priv, 0, sizeof(mv_eth_priv) );
+
+#if defined(ETH_INCLUDE_TSO) || defined(ETH_INCLUDE_UFO) || defined(CONFIG_MV_GATEWAY)
+    for(txq=0; txq<MV_ETH_TX_Q_NUM; txq++)
+    {
+        priv->tx_extra_bufs[txq] = mvOsMalloc(mv_eth_txq_desc[txq]*sizeof(char*));
+        if(priv->tx_extra_bufs[txq] == NULL)
+        {
+            printk("GbE port %d TSO/UFO: txq=%d - Can't alloc %d bytes for tx_extra_bufs array\n", 
+                        port, txq, mv_eth_txq_desc[txq]*sizeof(char*));
+            return -ENOMEM;
+        }
+        for(i=0; i<mv_eth_txq_desc[txq]; i++)
+        {
+            priv->tx_extra_bufs[txq][i] = mvOsMalloc(TX_EXTRA_BUF_SIZE);
+            if(priv->tx_extra_bufs[txq][i] == NULL)
+            {
+                printk("GbE port %d TSO/UFO: txq=%d - Can't alloc %d extra TX buffer (%d bytes)\n", 
+                        port, txq, i, TX_EXTRA_BUF_SIZE);
+                return -ENOMEM;
+            }
+        }
+        priv->tx_extra_buf_idx[txq] = 0;
+    }
+#endif /* ETH_INCLUDE_TSO || ETH_INCLUDE_UFO || CONFIG_MV_GATEWAY */
+
+    priv->txPktInfoPool = mvStackCreate(mv_eth_tx_desc_total);
+    if(priv->txPktInfoPool == NULL)
+    {
+        printk("GbE port %d: Can't create txPktInfoPool for %d elements\n", 
+                    port, mv_eth_tx_desc_total);
+        return -ENOMEM;
+    }
+
+    for(i=0; i<mv_eth_tx_desc_total; i++)
+    {
+        pkt_info = mvOsMalloc(sizeof(MV_PKT_INFO));
+        if(pkt_info == NULL)
+        {
+            printk("GbE port %d: Can't alloc %d bytes for %d MV_PKT_INFO structure\n", 
+                    port, sizeof(MV_PKT_INFO), i);
+            return -ENOMEM;
+        }
+        memset(pkt_info, 0, sizeof(MV_PKT_INFO));
+        pkt_info->srcIdx = (char)-1; 
+
+        pkt_info->pFrags = mvOsMalloc(sizeof(MV_BUF_INFO)*(MAX_SKB_FRAGS+3));
+        if(pkt_info->pFrags == NULL)
+        {
+            printk("GbE port %d: Can't alloc %d bytes for %d MV_BUF_INFO array\n", 
+                    port, (int)(sizeof(MV_BUF_INFO)*(MAX_SKB_FRAGS+3)), i);
+            return -ENOMEM;
+        }
+        memset(pkt_info->pFrags, 0, sizeof(MV_BUF_INFO)*(MAX_SKB_FRAGS+3));
+        mvStackPush(priv->txPktInfoPool, (MV_U32)pkt_info);
+    }
+
+    memset(priv->tx_count, 0, sizeof(priv->tx_count));
+
+    /* init mv_eth_priv */
+    priv->port = port;
+
+    memset( &priv->timer, 0, sizeof(struct timer_list) );
+    priv->timer.function = mv_netdev_timer_callback;
+    init_timer(&priv->timer);
+    priv->timer_flag = 0;
+
+#ifdef ETH_INCLUDE_LRO
+    priv->lro_mgr.max_aggr = ETH_LRO_MAX_AGGR;
+    priv->lro_mgr.max_desc = ETH_LRO_MAX_DESCRIPTORS;
+    priv->lro_mgr.lro_arr = priv->lro_desc;
+    priv->lro_mgr.get_skb_header = eth_get_skb_hdr;
+    priv->lro_mgr.features = LRO_F_NAPI | LRO_F_EXTRACT_VLAN_ID;
+    priv->lro_mgr.dev = priv->dev;
+    priv->lro_mgr.ip_summed = CHECKSUM_UNNECESSARY;
+    priv->lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
+#endif
+
+#if defined(CONFIG_MV_ETH_NFP) || defined(CONFIG_MV_SKB_REUSE)
+    priv->fpRxPool = mvStackCreate(mv_eth_rx_desc_total*2 + mv_eth_tx_desc_total);
+    if(priv->fpRxPool == NULL)
+    {
+        mvOsPrintf("eth_priv_init_%d: Can't create fpRxPool for %d elements\n", 
+                port, (mv_eth_rx_desc_total*2 + mv_eth_tx_desc_total));
+        return -ENOMEM;
+    }
+#endif /* (CONFIG_MV_ETH_NFP) || (CONFIG_MV_SKB_REUSE) */
+
+#ifdef CONFIG_MV_ETH_NFP
+    priv->refill_needed_flag = 0;
+    memset(&priv->fpStats, 0, sizeof(priv->fpStats) );
+    priv->lock = &nfp_lock;
+#else
+    priv->lock = kmalloc(sizeof(spinlock_t), GFP_ATOMIC);
+    spin_lock_init( priv->lock );
+#endif /* CONFIG_MV_ETH_NFP */
+
+#ifdef CONFIG_MV_SKB_REUSE
+    priv->skbReusePool = mvStackCreate(mv_eth_rx_desc_total*2);
+    if(priv->skbReusePool == NULL)
+    {
+        printk("eth_priv_init_%d: Can't create skbReusePool for %d elements\n", 
+                port, mv_eth_rx_desc_total*2);
+        return -ENOMEM;
+    }
+#endif /* CONFIG_MV_SKB_REUSE */
+
+#ifdef ETH_MV_TX_EN
+    priv->tx_en = priv->tx_en_bk = MV_ETH_TX_EN_DEFAULT;
+    priv->tx_en_deep = 1;
+#endif /* ETH_MV_TX_EN */
+
+    return 0;
+}
+
+/* Release all allocated memory */
+void    mv_eth_priv_cleanup(mv_eth_priv *priv)
+{
+    MV_PKT_INFO *pkt_info;
+
+#ifdef CONFIG_MV_SKB_REUSE
+    if(priv->skbReusePool != NULL)
+    {
+        mvStackDelete(priv->skbReusePool);
+        priv->skbReusePool = NULL;
+    }
+#endif /* CONFIG_MV_SKB_REUSE */
+
+#ifdef CONFIG_MV_ETH_NFP
+#else
+    if(priv->lock != NULL)
+    {
+        kfree(priv->lock);
+        priv->lock = NULL;
+    }
+#endif /* CONFIG_MV_ETH_NFP */
+
+#if defined(CONFIG_MV_ETH_NFP) || defined(CONFIG_MV_SKB_REUSE)
+    if(priv->fpRxPool != NULL)
+    {
+        mvStackDelete(priv->fpRxPool);
+        priv->fpRxPool = NULL;
+    }
+#endif /* CONFIG_MV_ETH_NFP || CONFIG_MV_SKB_REUSE */
+
+#if defined(ETH_INCLUDE_TSO) || defined(ETH_INCLUDE_UFO) || defined(CONFIG_MV_GATEWAY)
+    {
+        int     i, txq;
+
+        for(txq=0; txq<MV_ETH_TX_Q_NUM; txq++)
+        {
+            if(priv->tx_extra_bufs[txq] != NULL)
+            {
+                for(i=0; i<mv_eth_txq_desc[txq]; i++)
+                {
+                    if(priv->tx_extra_bufs[txq][i] != NULL)
+                    {
+                        mvOsFree(priv->tx_extra_bufs[txq][i]);
+                        priv->tx_extra_bufs[txq][i] = NULL;
+                    }
+                }
+                mvOsFree(priv->tx_extra_bufs[txq]);
+                priv->tx_extra_bufs[txq] = NULL;
+            }
+        }
+    }
+#endif /* ETH_INCLUDE_TSO || ETH_INCLUDE_UFO || CONFIG_MV_GATEWAY */
+
+    if(priv->txPktInfoPool)
+    {
+        while(mvStackIsEmpty(priv->txPktInfoPool) == MV_FALSE)
+        {
+            pkt_info = (MV_PKT_INFO*)mvStackPop(priv->txPktInfoPool);
+            if(pkt_info != NULL)
+            {
+                if(pkt_info->pFrags != NULL)
+                {
+                    mvOsFree(pkt_info->pFrags);
+                }
+                mvOsFree(pkt_info);
+            }
+        }
+        mvStackDelete(priv->txPktInfoPool);
+    }
+}
+
+
+#ifdef ETH_INCLUDE_TSO
+/*********************************************************** 
+ * eth_tso_tx --                                             *
+ *   send a packet.                                        *
+ ***********************************************************/
+static int eth_tso_tx(struct sk_buff *skb, struct net_device *dev, int txq)
+{
+    MV_STATUS       status;
+    MV_PKT_INFO     *pPktInfo;
+    int             pkt, frag, buf;
+    int             total_len, hdr_len, mac_hdr_len, size, frag_size, data_left;
+    char            *frag_ptr, *extra_ptr;
+    MV_U16          ip_id;
+    MV_U32          tcp_seq;
+    struct iphdr    *iph;
+    struct tcphdr   *tcph;
+    skb_frag_t      *skb_frag_ptr;
+    mv_eth_priv     *priv = MV_ETH_PRIV(dev);
+    const struct tcphdr *th = tcp_hdr(skb);
+
+    pkt = 0;        
+    frag = 0;
+    total_len = skb->len;
+    hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
+    mac_hdr_len = skb_network_offset(skb);
+
+    total_len -= hdr_len;
+
+    if(skb_shinfo(skb)->frag_list != NULL)
+    {
+        printk("***** ERROR: frag_list is not null\n");
+        print_skb(skb);
+    }
+
+    if(skb_shinfo(skb)->gso_segs == 1)
+    {
+        printk("***** ERROR: only one TSO segment\n");
+        print_skb(skb);
+    }
+
+    if(total_len <= skb_shinfo(skb)->gso_size)
+    {
+        printk("***** ERROR: total_len less than gso_size\n");
+        print_skb(skb);
+    }
+
+    if( (htons(ETH_P_IP) != skb->protocol) || 
+        (ip_hdr(skb)->protocol != IPPROTO_TCP) )
+    {
+        printk("***** ERROR: Unexpected protocol\n");
+        print_skb(skb);
+    }
+
+    ip_id = ntohs(ip_hdr(skb)->id);
+    tcp_seq = ntohl(th->seq);
+
+    frag_size = skb_headlen(skb);
+    frag_ptr = skb->data;
+
+    if(frag_size < hdr_len){
+        printk("***** ERROR: frag_size=%d, hdr_len=%d\n", frag_size, hdr_len);
+        print_skb(skb);
+    }
+
+    frag_size -= hdr_len;
+    frag_ptr += hdr_len;
+    if(frag_size == 0)
+    {
+        skb_frag_ptr = &skb_shinfo(skb)->frags[frag];
+
+        /* Move to next segment */
+        frag_size = skb_frag_ptr->size;
+        frag_ptr = page_address(skb_frag_ptr->page) + skb_frag_ptr->page_offset;
+        frag++;
+    }
+
+    while(total_len > 0)
+    {            
+        pPktInfo = (MV_PKT_INFO*)mvStackPop(priv->txPktInfoPool);
+
+        extra_ptr = priv->tx_extra_bufs[txq][priv->tx_extra_buf_idx[txq]++];
+        if(priv->tx_extra_buf_idx[txq] == mv_eth_txq_desc[txq])
+            priv->tx_extra_buf_idx[txq] = 0;
+
+#ifdef CONFIG_MV_GATEWAY
+	    /* Note: supports Marvell Header mode, not VLAN mode */
+        if(priv->isGtw)
+        {
+            struct mv_vlan_cfg* vlan_cfg = MV_NETDEV_VLAN(dev);
+
+	        *(unsigned short *)(extra_ptr) = vlan_cfg->header;
+
+            pPktInfo->pFrags[0].bufVirtPtr = extra_ptr;
+            pPktInfo->pFrags[0].dataSize = ETH_MV_HEADER_SIZE;
+          	pPktInfo->pktSize = ETH_MV_HEADER_SIZE;
+        }
+        else
+#endif /* CONFIG_MV_GATEWAY */
+        {
+            pPktInfo->pFrags[0].dataSize = 0;
+            pPktInfo->pktSize = 0;
+            pPktInfo->pFrags[0].bufVirtPtr = extra_ptr + ETH_MV_HEADER_SIZE;
+        }
+
+        extra_ptr += ETH_MV_HEADER_SIZE;
+        memcpy(extra_ptr, skb->data, hdr_len);
+
+        pPktInfo->pFrags[0].dataSize += hdr_len;
+        pPktInfo->pFrags[0].bufSize = TX_EXTRA_BUF_SIZE;
+
+        data_left = MV_MIN(skb_shinfo(skb)->gso_size, total_len);
+        pPktInfo->pktSize += (data_left + hdr_len);
+        total_len -= data_left;
+
+        /* Update fields */
+        iph = (struct iphdr*)(extra_ptr + mac_hdr_len);
+        iph->tot_len = htons(data_left + hdr_len - mac_hdr_len);
+        iph->id = htons(ip_id);
+
+        tcph = (struct tcphdr*)(extra_ptr + skb_transport_offset(skb));
+        tcph->seq = htonl(tcp_seq);
+/*
+        printk("pkt=%d, extra=%p, left=%d, total=%d, iph=%p, tcph=%p, id=%d, seq=0x%x\n",
+                pkt, extra_ptr, data_left, total_len, iph, tcph, ip_id, tcp_seq);
+*/
+        tcp_seq += data_left;
+        ip_id++;
+        if(total_len == 0)
+        {
+            /* Only for last packet */
+            pPktInfo->osInfo = (MV_ULONG)skb;
+        }
+        else
+        {
+            /* Clear all special flags for not last packet */
+            tcph->psh = 0;
+            tcph->fin = 0;
+            tcph->rst = 0;
+            pPktInfo->osInfo = (MV_ULONG)0;
+        }
+
+        buf = 1;
+        while(data_left > 0)
+        {
+            size = MV_MIN(frag_size, data_left);
+            if(size == 0)
+            {
+                printk("***** ERROR: data_left=%d, frag_size=%d\n", data_left, frag_size);
+                print_skb(skb);
+            }
+            data_left -= size;
+            frag_size -= size;
+            pPktInfo->pFrags[buf].bufVirtPtr = frag_ptr;
+            pPktInfo->pFrags[buf].dataSize = size;
+            frag_ptr += size;
+            buf++;
+            if( (frag < skb_shinfo(skb)->nr_frags) && (frag_size == 0) )
+            {                 
+                skb_frag_ptr = &skb_shinfo(skb)->frags[frag];
+
+                /* Move to next segment */
+                frag_size = skb_frag_ptr->size;
+                frag_ptr = page_address(skb_frag_ptr->page) + skb_frag_ptr->page_offset;
+                frag++;
+            }
+        }
+        /* packet is full */
+        pPktInfo->numFrags = buf;
+        pPktInfo->status =  
+                (ETH_TX_IP_NO_FRAG | ETH_TX_L4_TCP_TYPE |
+                 ETH_TX_GENERATE_L4_CHKSUM_MASK | ETH_TX_GENERATE_IP_CHKSUM_MASK |
+                 ((ip_hdr(skb)->ihl) << ETH_TX_IP_HEADER_LEN_OFFSET) );
+
+        status = mvEthPortSgTx( priv->hal_priv, txq, pPktInfo);
+        if( status == MV_OK ) {
+            priv->tx_count[txq]++;
+            dev->stats.tx_packets++;
+            dev->stats.tx_bytes +=  pPktInfo->pktSize;
+            dev->trans_start = jiffies;
+            ETH_STAT_DBG( priv->eth_stat.tx_hal_ok[txq]++);
+        }
+        else
+        {
+            /* tx failed. */
+
+            /* For single TX queue it must not happen because 
+            *   we stop call to netif_stop_queue in advance 
+            * For Multu TX queue config, free skb and continue without stopping. 
+            */
+            dev->stats.tx_dropped++;
+
+            ETH_DBG( ETH_DBG_TX, ("%s: queue=%d is full, stop transmit\n", dev->name, txq) );
+
+            /* we need to reuse this pPktInfo because TX failed */
+            dev_kfree_skb_any(skb);
+            pPktInfo->osInfo = 0;
+            mvStackPush(priv->txPktInfoPool, (MV_U32)pPktInfo);
+
+            /* Release extra buffer too */            
+  			if(priv->tx_extra_buf_idx[txq] == 0)
+            {
+                priv->tx_extra_buf_idx[txq] = mv_eth_txq_desc[txq]-1;
+            }
+            else
+	    	{
+                priv->tx_extra_buf_idx[txq]--;
+            }
+
+            ETH_STAT_DBG( priv->eth_stat.tx_hal_no_resource[txq]++);
+            return 0;
+        }   
+        pkt++;
+    }    
+    return 0;
+}
+#endif /* ETH_INCLUDE_TSO */
+
+#ifdef ETH_INCLUDE_UFO
+/*********************************************************** 
+ * eth_ufo_tx --                                           *
+ *   send a large UDP packet.                              *
+ ***********************************************************/
+static int eth_ufo_tx(struct sk_buff *skb, struct net_device *dev, int txq)
+{
+   	MV_STATUS       status;
+	unsigned int    nr, fn;
+	skb_frag_t      *fp;
+	mv_eth_priv     *priv = MV_ETH_PRIV(dev);
+	struct iphdr    *iph;
+	MV_PKT_INFO     *pPktInfo;
+	int             buf;
+	char            *data;
+	unsigned int    pkt_sz, pkt_nm, size;
+	unsigned int    left, mtu, hlen, hhlen, dlen, offset;
+	int             extra_buf_used = 0;
+
+	ETH_DBG(ETH_DBG_GSO, ("UFO: sbk=%p len=%d gso_type=%d gso_segs=%d, gso_size=%d nr_frags=%d\n",              
+						  skb, skb->len, 
+						  skb_shinfo(skb)->gso_type, 
+						  skb_shinfo(skb)->gso_segs, 
+						  skb_shinfo(skb)->gso_size,
+						  skb_shinfo(skb)->nr_frags));
+
+	ETH_DBG(ETH_DBG_GSO, ("UFO: page[h] %d bytes\n", skb_headlen(skb)));
+
+#ifdef ETH_DEBUG
+	for (fn=0; fn<skb_shinfo(skb)->nr_frags; fn++)
+		ETH_DBG(ETH_DBG_GSO, ("UFO: page[%d] %d bytes\n", fn, skb_shinfo(skb)->frags[fn].size));
+#endif
+
+	iph = ip_hdr(skb);
+	hlen = iph->ihl * 4;
+	hhlen = skb_network_offset(skb);
+	mtu = dev->mtu + hhlen;
+
+	if (skb->ip_summed != CHECKSUM_NONE) {
+		struct udphdr *udph = udp_hdr(skb);
+		udph->check = 0;
+		offset = hhlen + hlen;
+		skb->csum = skb_checksum(skb, offset, skb->len - offset, 0);
+		udph->check = csum_tcpudp_magic(iph->saddr, iph->daddr, skb->len - hhlen - hlen, IPPROTO_UDP, skb->csum);
+	}
+
+	fn = 0;
+	nr = skb_shinfo(skb)->nr_frags;
+
+	/* skb_headlen */
+	size = skb_headlen(skb);
+	data = skb->data;
+	left = skb->len - hhlen - hlen; /* actual data to send */
+	offset = 0;
+
+	while (left) {
+       	pPktInfo = (MV_PKT_INFO*)mvStackPop(priv->txPktInfoPool);
+
+		extra_buf_used = 0;
+		/* ip header */
+		if (offset) { 	
+			data = priv->tx_extra_bufs[txq][priv->tx_extra_buf_idx[txq]++];
+            if(priv->tx_extra_buf_idx[txq] == mv_eth_txq_desc[txq])
+                priv->tx_extra_buf_idx[txq] = 0;
+
+#ifdef CONFIG_MV_GATEWAY
+	        /* Note: supports Marvell Header mode, not VLAN mode */
+            if(priv->isGtw)
+            {
+                struct mv_vlan_cfg *vlan_cfg = MV_NETDEV_VLAN(dev);
+
+	            *(unsigned short *)(data) = vlan_cfg->header;
+
+                pPktInfo->pFrags[0].bufVirtPtr = data;
+                pPktInfo->pFrags[0].dataSize = ETH_MV_HEADER_SIZE;
+          	    pPktInfo->pktSize = ETH_MV_HEADER_SIZE;
+            }
+            else
+#endif /* CONFIG_MV_GATEWAY */
+            {
+                pPktInfo->pFrags[0].dataSize = 0;
+                pPktInfo->pktSize = 0;
+                pPktInfo->pFrags[0].bufVirtPtr = data + ETH_MV_HEADER_SIZE;
+            }
+
+			extra_buf_used = 1;
+			data += 2; 
+			size = hhlen + hlen;
+			memcpy(data, skb->data, size);
+		}
+
+		iph = (struct iphdr*)(((u32)data)+hhlen);	
+		pPktInfo->pFrags[0].dataSize += size;
+		buf = 1;
+		pkt_nm = 1;
+		pkt_sz = size;
+		ETH_DBG(ETH_DBG_GSO, ("UFO: add pkt[%d] %d bytes total=%d\n", pkt_nm-1, size, pkt_sz));	
+
+		/* payload */
+		while (fn < nr) {
+			fp = &skb_shinfo(skb)->frags[fn];
+
+			BUG_ON(mtu < pkt_sz);
+
+			size = min_t(int, fp->size, mtu - pkt_sz);
+			data = page_address(fp->page) + fp->page_offset;
+
+			fp->page_offset += size;
+			fp->size -= size;
+
+			if (fp->size == 0)
+				fn++;
+
+			if (size) {
+				pPktInfo->pFrags[buf].dataSize = size;
+				pPktInfo->pFrags[buf].bufVirtPtr = data;
+				buf++;
+				pkt_sz += size; 
+				pkt_nm++;
+				BUG_ON(pkt_nm == MAX_SKB_FRAGS);
+				ETH_DBG(ETH_DBG_GSO, ("UFO: add pkt[%d] %d bytes total=%d frag=%d\n", 
+							pkt_nm-1, size, pkt_sz, fn));	
+			}
+
+			if (mtu == pkt_sz)
+				break;
+		}
+
+		/* fill ip header */
+		dlen = pkt_sz - hhlen - hlen;
+
+		ETH_DBG(ETH_DBG_GSO, ("UFO: ip_payload=%d (bad=%d), offset=%d\n", 
+							   dlen, dlen & 7, offset));
+
+		iph->tot_len = htons(pkt_sz - hhlen);		
+		iph->frag_off = htons(offset>>3);
+		offset += dlen;
+		left -= dlen;
+		if (left)
+			iph->frag_off |= htons(IP_MF);
+
+		pPktInfo->osInfo = left ? 0 : (MV_ULONG)skb;
+		pPktInfo->pktSize += pkt_sz;
+		pPktInfo->numFrags = pkt_nm;
+		pPktInfo->status = ETH_TX_GENERATE_IP_CHKSUM_MASK | ((iph->ihl) << ETH_TX_IP_HEADER_LEN_OFFSET);
+
+		status = mvEthPortSgTx(priv->hal_priv, txq, pPktInfo);
+		ETH_DBG(ETH_DBG_GSO, ("UFO: Tx (ok=%d) %d bytes in %d bufs left=%d\n", 
+			   status, pPktInfo->pktSize, pPktInfo->numFrags, left));
+
+		if (status == MV_OK) {
+			dev->stats.tx_packets++;
+			dev->stats.tx_bytes += pPktInfo->pktSize;
+			dev->trans_start = jiffies;
+			priv->tx_count[txq]++;
+			ETH_STAT_DBG(priv->eth_stat.tx_hal_ok[txq]++);
+		}
+		else {
+            /* tx failed. */
+
+            /* For single TX queue it must not happen because 
+            *   we stop call to netif_stop_queue in advance 
+            * For Multu TX queue config, free skb and continue without stopping. 
+            */
+			dev->stats.tx_dropped++;
+
+			ETH_DBG( ETH_DBG_TX, ("%s: q=%d is full, stop transmit\n", dev->name, txq) );
+
+            /* we need to reuse this pPktInfo because TX failed */
+            dev_kfree_skb_any(skb);
+            pPktInfo->osInfo = 0;
+            mvStackPush(priv->txPktInfoPool, (MV_U32)pPktInfo);
+
+            /* Release extra buffer too */            
+  			if(priv->tx_extra_buf_idx[txq] == 0)
+            {
+                priv->tx_extra_buf_idx[txq] = mv_eth_txq_desc[txq]-1;
+            }
+            else
+	    	{
+                priv->tx_extra_buf_idx[txq]--;
+            }
+
+			ETH_STAT_DBG(priv->eth_stat.tx_hal_no_resource[txq]++);
+			return 0;
+		}   		
+	}
+
+    return 0;
+}
+#endif /* ETH_INCLUDE_UFO */
+
+
+#ifdef ETH_INCLUDE_LRO
+static int eth_get_skb_hdr(struct sk_buff *skb, void **iphdr,
+		       void **tcph, u64 *hdr_flags, void *private)
+{
+	unsigned int hlen;
+	struct iphdr *iph;
+
+	skb_reset_network_header(skb);
+	iph = ip_hdr(skb);
+
+	if (iph->protocol == IPPROTO_TCP) {
+		hlen = ip_hdrlen(skb);
+		skb_set_transport_header(skb, hlen);
+		*tcph = tcp_hdr(skb);
+
+		/* check if ip header and tcp header are complete */
+		if (iph->tot_len < hlen + tcp_hdrlen(skb))
+			return -1;
+
+		*hdr_flags = LRO_IPV4 | LRO_TCP;
+		*iphdr = iph;
+	
+		return 0;
+	}
+#ifdef ETH_INCLUDE_LRO_UDP
+	else if (iph->protocol == IPPROTO_UDP) {
+			hlen = ip_hdrlen(skb);
+			skb_set_transport_header(skb, hlen);
+			*tcph = NULL;
+
+			/* fragmented udp/ip only */
+			if (!(iph->frag_off & htons(IP_MF | IP_OFFSET)))
+				return -1;
+
+			*hdr_flags = LRO_IPV4;
+			*iphdr = iph;
+			return 0;
+	}
+#endif /* ETH_INCLUDE_LRO_UDP */
+	return -1;
+}
+#endif /* ETH_INCLUDE_LRO */
+
+
+/*********************************************************** 
+ * mv_eth_tx --                                         *
+ *   send a packet.                                        *
+ ***********************************************************/
+static int eth_tx( struct sk_buff *skb , struct net_device *dev )
+{
+    mv_eth_priv             *priv = MV_ETH_PRIV(dev);
+    struct net_device_stats *stats = MV_NETDEV_STATS(dev);
+    unsigned long           flags = 0;
+    MV_STATUS               status;
+    MV_PKT_INFO             *pPktInfo;
+    int                     ret = 0, i, queue, tx_done_count;
+    int tx_in_interrupt	    = in_interrupt();
+
+    if( netif_queue_stopped( dev ) ) {
+        printk( KERN_ERR "%s: transmitting while stopped\n", dev->name );
+        return 1;
+    }
+
+    if (!tx_in_interrupt)
+    	local_irq_save(flags);
+
+    if (!spin_trylock(priv->lock)) {
+        /* Collision - tell upper layer to requeue */
+	    if (!tx_in_interrupt)
+            local_irq_restore(flags);
+        return NETDEV_TX_LOCKED;
+    }
+
+    ETH_DBG( ETH_DBG_TX, ("%s: tx len=%d headlen=%d frags=%d, ip_summed=%d gso_type=%d\n",
+             dev->name, skb->len, skb_headlen(skb), skb_shinfo(skb)->nr_frags, skb->ip_summed,skb_shinfo(skb)->gso_type));
+    ETH_STAT_INFO(priv->eth_stat.tx_events++);
+
+    /* At this point we need to decide to which tx queue this packet goes, */
+    /* and whether we need to prepend a proprietary header.                */
+    queue = eth_tx_policy(priv, skb);
+
+#ifdef ETH_INCLUDE_TSO
+    if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV4) {
+        ret = eth_tso_tx(skb, dev, queue);
+	    ETH_STAT_DBG( priv->eth_stat.tso_stats[skb->len >> 10]++);
+        goto tx_end;
+    }
+#endif /* ETH_INCLUDE_TSO */
+
+#ifdef ETH_INCLUDE_UFO
+    if (skb_shinfo(skb)->gso_type & SKB_GSO_UDP) {
+	    if (skb->len > dev->mtu) {
+	        ETH_STAT_DBG(priv->eth_stat.ufo_stats[skb->len >> 10]++);
+	        ret = eth_ufo_tx(skb, dev, queue);
+	        goto tx_end;
+	    }
+    }
+#endif /* ETH_INCLUDE_UFO */
+
+    pPktInfo = (MV_PKT_INFO*)mvStackPop(priv->txPktInfoPool);
+    pPktInfo->osInfo = (MV_ULONG)skb;
+    pPktInfo->pktSize = skb->len;
+    pPktInfo->status = 0;
+
+    /* see if this is a single/multiple buffered skb */
+    if( skb_shinfo(skb)->nr_frags == 0 ) {
+        pPktInfo->pFrags->bufVirtPtr = skb->data;
+        pPktInfo->pFrags->dataSize = skb->len;
+        pPktInfo->numFrags = 1;
+    }
+    else {
+
+        MV_BUF_INFO *p_buf_info = pPktInfo->pFrags;
+
+        /* first skb fragment */
+        p_buf_info->dataSize = skb_headlen(skb);
+        p_buf_info->bufVirtPtr = skb->data;
+        p_buf_info++;
+
+        /* now handle all other skb fragments */
+        for ( i = 0; i < skb_shinfo(skb)->nr_frags; i++ ) {
+
+            skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
+
+            p_buf_info->dataSize = frag->size;
+            p_buf_info->bufVirtPtr = page_address(frag->page) + frag->page_offset;
+            p_buf_info++;
+        }
+        pPktInfo->numFrags = skb_shinfo(skb)->nr_frags + 1;
+    }
+
+#ifdef TX_CSUM_OFFLOAD
+    /* if HW is suppose to offload layer3 and layer4 checksum, 
+     *   set some bits in the first pkt_info command.
+    */
+    if(skb->ip_summed == CHECKSUM_PARTIAL) {
+        struct iphdr *iph = ip_hdr(skb); 
+
+        ETH_DBG( ETH_DBG_TX, ("%s: tx csum offload\n", dev->name) );
+        ETH_STAT_DBG( priv->eth_stat.tx_csum_hw++);
+
+        /* we do not handle fragmented IP packets. add check inside iph!! */
+        pPktInfo->status = ETH_TX_IP_NO_FRAG | ETH_TX_GENERATE_IP_CHKSUM_MASK |          
+                           (iph->ihl << ETH_TX_IP_HEADER_LEN_OFFSET);   
+
+        if(iph->protocol == IPPROTO_TCP) 
+            pPktInfo->status |= (ETH_TX_L4_TCP_TYPE | ETH_TX_GENERATE_L4_CHKSUM_MASK);
+        else if(iph->protocol == IPPROTO_UDP)
+            pPktInfo->status |= (ETH_TX_L4_UDP_TYPE | ETH_TX_GENERATE_L4_CHKSUM_MASK);
+    }
+    else {
+        ETH_DBG( ETH_DBG_TX, ("%s: no tx csum offload\n", dev->name) );
+        ETH_STAT_DBG( priv->eth_stat.tx_csum_sw++);
+        pPktInfo->status = 0x5 << ETH_TX_IP_HEADER_LEN_OFFSET; /* Errata BTS #50 */
+    }
+#endif
+
+#ifdef CONFIG_MV_GATEWAY
+    if(priv->isGtw)
+        mv_gtw_update_tx_skb(dev, pPktInfo);
+#endif /* CONFIG_MV_GATEWAY */
+
+    /* now send the packet */
+    status = mvEthPortSgTx( priv->hal_priv, queue, pPktInfo);
+
+    /* check status */
+    if( status == MV_OK ) {
+        priv->tx_count[queue]++;
+        stats->tx_bytes += skb->len;
+        stats->tx_packets ++;
+        dev->trans_start = jiffies;
+        ETH_STAT_DBG( priv->eth_stat.tx_hal_ok[queue]++);
+    }
+    else {
+        /* tx failed. */
+
+        /* For single TX queue it must not happen because 
+         *   we stop call to netif_stop_queue in advance 
+         * For Multu TX queue config, free skb and continue without stopping. 
+         */
+        stats->tx_dropped++;
+
+        /* it must not happen because we call to netif_stop_queue in advance. */
+        ETH_DBG( ETH_DBG_TX, ("%s: TX queue=%d is full\n", dev->name, queue) );
+
+        /* we need to reuse this pPktInfo because TX failed */
+        dev_kfree_skb_any(skb);
+        pPktInfo->osInfo = 0;
+        mvStackPush(priv->txPktInfoPool, (MV_U32)pPktInfo);
+
+        ETH_STAT_DBG( priv->eth_stat.tx_hal_no_resource[queue]++);
+    }
+
+#if defined(ETH_INCLUDE_TSO) || defined(ETH_INCLUDE_UFO)
+tx_end:
+#endif
+
+#ifdef ETH_TX_DONE_ISR
+#else
+
+
+#ifdef ETH_MV_TX_EN
+        if(priv->tx_en)
+            eth_tx_enable(priv, queue);
+#endif /* ETH_MV_TX_EN */
+
+    if( priv->tx_count[queue] >= mv_eth_tx_done_quota)
+    {
+        tx_done_count = eth_tx_done(priv, queue);
+        priv->tx_count[queue] -= tx_done_count;
+    }
+#endif /* ETH_TX_DONE_ISR */ 
+
+#if (MV_ETH_TX_Q_NUM == 1)
+    /* if number of available descriptors left is less than  */
+    /* MAX_SKB_FRAGS stop the stack. if multi queue is used, */
+    /* don't stop the stack just because one queue is full.  */
+    if( mvEthTxResourceGet(priv->hal_priv, ETH_DEF_TXQ) <= MAX_SKB_FRAGS ) {
+        ETH_DBG( ETH_DBG_TX, ("%s: stopping network tx interface\n", dev->name) );
+        netif_stop_queue( dev );
+        ETH_STAT_ERR(priv->eth_stat.tx_netif_stop++);
+    }
+#endif /* (MV_ETH_TX_Q_NUM > 1) */
+
+    if (!tx_in_interrupt)
+	    spin_unlock_irqrestore(priv->lock, flags);	    
+    else
+        spin_unlock(priv->lock);
+
+    return ret;
+}
+
+/*********************************************************** 
+ * eth_tx_timeout --                                       *
+ *   nothing to be done (?)                                *
+ ***********************************************************/
+static void eth_tx_timeout( struct net_device *dev ) 
+{
+#ifdef CONFIG_MV_ETH_STATS_ERR
+    mv_eth_priv  *priv = MV_ETH_PRIV(dev);
+    
+    priv->eth_stat.tx_timeout++;
+#endif /* #ifdef CONFIG_MV_ETH_STATS_INFO */    
+
+    printk( KERN_INFO "%s: tx timeout\n", dev->name );
+}
+
+
+static const struct net_device_ops mv_eth_netdev_ops = {
+	.ndo_open		= mv_eth_open,
+	.ndo_stop		= mv_eth_stop,
+	.ndo_start_xmit		= eth_tx,
+	.ndo_set_multicast_list	= mv_eth_set_multicast_list,
+	.ndo_set_mac_address	= mv_eth_set_mac_addr,
+	.ndo_change_mtu		= mv_eth_change_mtu,
+	.ndo_tx_timeout		= eth_tx_timeout,
+};
+
+/*********************************************************** 
+ * mv_netdev_init -- Allocate and initialize net_device    *
+ *                   structure                             *
+ ***********************************************************/
+struct net_device* mv_netdev_init(mv_eth_priv *priv, int mtu, u8* mac)
+{
+    struct net_device   *dev;
+    mv_net_priv         *net_priv;
+
+    dev = alloc_etherdev(sizeof(mv_net_priv));
+    if( !dev ) {
+        return NULL;
+    }
+
+    net_priv = (mv_net_priv *)netdev_priv(dev);
+    if( !net_priv ) { 
+        return NULL;
+    }
+    memset( net_priv , 0, sizeof(mv_net_priv) );
+    net_priv->giga_priv = priv;
+
+    dev->irq = ETH_PORT_IRQ_NUM(priv->port);
+    dev->mtu = mtu;
+    memcpy(dev->dev_addr, mac, 6);
+    dev->tx_queue_len = CONFIG_MV_ETH_NUM_OF_TX_DESCR;
+    dev->watchdog_timeo = 5*HZ;
+
+    dev->netdev_ops = &mv_eth_netdev_ops;
+
+    priv->dev = dev;
+    netif_napi_add(dev, &priv->napi, eth_poll, ETH_NUM_OF_RX_DESCR / 2);
+
+#ifdef CONFIG_MV_GATEWAY
+    if(priv->isGtw)
+    {
+        /* For Gateway driver replace some of callback functions */
+	dev->netdev_ops->open = mv_gtw_start;
+        dev->netdev_ops->stop = mv_gtw_stop;
+        dev->netdev_ops->set_mac_address = mv_gtw_set_mac_addr;
+	dev->netdev_ops->set_multicast_list = mv_gtw_set_multicast_list;
+        dev->netdev_ops->change_mtu = &mv_gtw_change_mtu;
+        dev->hard_header_len += ETH_MV_HEADER_SIZE;
+    }
+#endif /* CONFIG_MV_GATEWAY */
+
+    priv->timer.data = (unsigned long)dev;
+
+    mv_netdev_set_features(dev);
+
+    if(register_netdev(dev)) {
+	printk(KERN_ERR "failed to register %s\n",dev->name);
+        free_netdev(dev);
+        return NULL;
+    }
+    else {
+	printk("    o %s, ifindex = %d, GbE port = %d\n",dev->name, dev->ifindex, priv->port);
+    }
+    return dev;
+}
+
+int     mv_eth_tos_map_set(int port, unsigned char tos, int queue)
+{
+    int             rc = 0;
+    mv_eth_priv     *priv = eth_priv_by_port(port);
+
+    if (priv == NULL)
+    {
+        printk("eth_status_print: wrong port number %d\n", port);
+	    return 1;
+    }
+#if defined(CONFIG_MV_GATEWAY)
+    if(priv->isGtw)
+    {
+        rc = mv_gtw_switch_tos_set(port, tos, queue);
+    }
+    else
+#endif /* CONFIG_MV_GATEWAY */
+    {
+        rc = mvEthTosToRxqSet(priv->hal_priv, tos, queue);
+    }
+    return rc;
+}
+
+void    mv_eth_tos_map_show(int port)
+{
+    unsigned int    tos;
+    int             queue;
+    mv_eth_priv     *priv = eth_priv_by_port(port);
+
+    if (priv == NULL)
+    {
+        printk("eth_status_print: wrong port number %d\n", port);
+	    return;
+    }
+    printk("ethPort_%d TOS Map: \n\n", port);
+
+    for(tos=0; tos<=0xFC; tos+=0x4) 
+    {
+#if defined(CONFIG_MV_GATEWAY)
+        if(priv->isGtw)
+        {
+            queue = mv_gtw_switch_tos_get(port, tos);
+        }
+        else
+#endif /* CONFIG_MV_GATEWAY */
+        {
+            queue = mvEthTosToRxqGet(priv->hal_priv, tos);
+        }
+	    if (queue != -1)
+        {
+		   printk("tos=0x%x: codepoint=0x%x, queue=%d\n", 
+                   tos, tos>>2, queue);
+        }
+	}
+}
+
+static void __init mv_eth_tos_map_init(int port)
+{
+    unsigned int    tos;
+
+    /* Set all codepoints to ETH_DEF_RXQ */
+    for(tos=0; tos<=0xFC; tos+=0x4) 
+    {
+        mv_eth_tos_map_set(port, tos, ETH_DEF_RXQ);
+    }
+
+#if (MV_ETH_RX_Q_NUM > 1)
+    for(tos=0; tos<=0xFC; tos+=0x4) 
+    {
+        int queue;
+
+        queue = mv_eth_tos_to_q_map(tos, MV_ETH_RX_Q_NUM);
+        mv_eth_tos_map_set(port, tos, queue);
+	}
+#endif /* MV_ETH_RX_Q_NUM > 1 */
+}
+
+/***********************************************************************************
+ ***  print net device status
+ ***********************************************************************************/
+void    mv_eth_netdev_print(unsigned int idx)
+{
+    struct net_device   *dev = eth_net_device_by_idx(idx);
+
+    printk("%s net_device status: dev=%p, priv=%p\n\n", 
+                dev->name, dev, MV_ETH_PRIV(dev));
+    printk("ifIdx=%d, features=0x%x, flags=0x%x, mtu=%u, size=%d\n", 
+            dev->ifindex, (unsigned int)(dev->features), (unsigned int)(dev->flags), 
+            dev->mtu, MV_RX_BUF_SIZE(dev->mtu));
+}
+
+
+/***********************************************************************************
+ ***  noqueue net device
+ ***********************************************************************************/
+extern struct Qdisc noop_qdisc;
+void mv_eth_set_noqueue(int idx, int enable)
+{
+/* TODO */
+#if 0
+    struct net_device *dev = eth_net_device_by_idx(idx);
+
+    if (dev->flags & IFF_UP) {
+            printk(KERN_ERR "%s: device or resource busy, take it down\n", dev->name);
+            return;
+    }
+    dev->tx_queue_len = enable ? 0 : CONFIG_MV_ETH_NUM_OF_TX_DESCR;
+    dev->qdisc_sleeping = &noop_qdisc;
+    printk(KERN_ERR "%s: device tx queue len is %d\n", dev->name, (int)dev->tx_queue_len);
+#endif
+}
+
+/* ***  print Ethernet port status
+ ***********************************************************************************/
+void    mv_eth_status_print( unsigned int port )
+{
+    mv_eth_priv         *priv = eth_priv_by_port(port);
+
+    if (priv == NULL)
+    {
+        printk("eth_status_print: wrong port number %d\n", port);
+	    return;
+    }
+    printk("ethPort_%d Status: priv=%p\n\n", port, priv);
+
+    printk("tx_total=%d, rx_total=%d, tx_done_quota=%d\n\n", 
+            mv_eth_tx_desc_total, mv_eth_rx_desc_total, mv_eth_tx_done_quota);
+
+#ifdef ETH_MV_TX_EN
+    printk("TxEnable WA - %s. deep=%d, tx_en_bk=%d\n\n", 
+            priv->tx_en ? "Enabled" : "Disabled", 
+            priv->tx_en_deep, priv->tx_en_bk);    
+#endif /* ETH_MV_TX_EN */
+
+#ifdef CONFIG_MV_SKB_REUSE
+    printk("SKB Reuse - %s. pktInfo pool status:\n", 
+            eth_skb_reuse_enable ? "Enabled" : "Disabled");
+    mvStackStatus(priv->skbReusePool, 0);
+    printk("\n");
+#endif /* CONFIG_MV_SKB_REUSE */
+
+    printk("TX pktInfo pool status:\n");
+    mvStackStatus(priv->txPktInfoPool, 0);
+    printk("\n");
+
+#ifdef CONFIG_MV_ETH_NFP
+    printk("NFP RX pool status:\n");
+    mvStackStatus(priv->fpRxPool, 0);
+#endif /* CONFIG_MV_ETH_NFP */
+}
+
+/***********************************************************************************
+ ***  print port statistics
+ ***********************************************************************************/
+#define   STAT_PER_Q(qnum,x) for(queue = 0; queue < qnum; queue++) \
+                printk("%10u ",x[queue]); \
+                    printk("\n");
+
+void mv_eth_stats_print( unsigned int port )
+{
+    mv_eth_priv         *priv = eth_priv_by_port(port);
+    eth_statistics      *stat = NULL;
+
+    TRC_OUTPUT();
+
+    if (priv == NULL)
+    {
+        printk("eth_stats_print: wrong port number %d\n", port);
+	    return;
+    }
+    stat = &(priv->eth_stat);
+
+    printk( "\n====================================================\n" );
+    printk( "ethPort_%d: Errors", port);
+    printk( "\n-------------------------------\n" );
+    printk( "skb_alloc_fail................%10u\n", stat->skb_alloc_fail );
+    printk( "tx_timeout....................%10u\n", stat->tx_timeout );
+    printk( "tx_netif_stop.................%10u\n", stat->tx_netif_stop );
+    printk( "tx_done_netif_wake............%10u\n", stat->tx_done_netif_wake );
+    printk( "tx_skb_no_headroom............%10u\n", stat->tx_skb_no_headroom );
+
+#ifdef CONFIG_MV_ETH_STATS_INFO
+    printk( "\n====================================================\n" );
+    printk( "ethPort_%d: interrupt statistics", port );
+    printk( "\n-------------------------------\n" );
+    printk( "irq_total.....................%10u\n", stat->irq_total );
+    printk( "irq_none_events...............%10u\n", stat->irq_none );
+    printk( "irq_while_polling.............%10u\n", stat->irq_while_polling );
+    printk( "picr is.......................%10x\n", priv->picr);
+    printk( "picer is......................%10x\n", priv->picer);
+
+    printk( "\n====================================================\n" );
+    printk( "ethPort_%d: Events", port );
+    printk( "\n-------------------------------\n" );
+    printk( "poll_events...................%10u\n", stat->poll_events );
+    printk( "poll_complete.................%10u\n", stat->poll_complete );
+    printk( "tx_events.....................%10u\n", stat->tx_events );
+    printk( "tx_done_events................%10u\n", stat->tx_done_events );
+    printk( "timer_events..................%10u\n", stat->timer_events);
+#if defined(CONFIG_MV_ETH_NFP) || defined(CONFIG_MV_SKB_REUSE)
+    printk( "rx_pool_empty.................%10u\n", stat->rx_pool_empty );
+#endif /* CONFIG_MV_ETH_NFP || CONFIG_MV_SKB_REUSE */
+
+#endif /* CONFIG_MV_ETH_STATS_INFO */
+
+#ifdef CONFIG_MV_ETH_STATS_DEBUG
+    {
+        unsigned int queue=0, i=0;
+
+        printk("\n");
+        printk("RXQs:.........................");
+        for(queue=0; queue<MV_ETH_RX_Q_NUM; queue++) 
+            printk( "%10d ", queue);
+        printk("\n");
+
+        printk( "rx_hal_ok....................."); STAT_PER_Q(MV_ETH_RX_Q_NUM, stat->rx_hal_ok);
+        printk( "rx_fill_ok...................."); STAT_PER_Q(MV_ETH_RX_Q_NUM, stat->rx_fill_ok);
+        printk("\n");
+
+        printk("TXQs:.........................");
+        for(queue=0; queue<MV_ETH_TX_Q_NUM; queue++) 
+            printk( "%10d ", queue);
+        printk("\n");
+        printk( "tx_count......................"); STAT_PER_Q(MV_ETH_TX_Q_NUM, priv->tx_count);
+        printk( "tx_hal_ok....................."); STAT_PER_Q(MV_ETH_TX_Q_NUM, stat->tx_hal_ok);
+        printk( "tx_hal_no_resource............"); STAT_PER_Q(MV_ETH_TX_Q_NUM, stat->tx_hal_no_resource );
+        printk( "tx_done_hal_ok................"); STAT_PER_Q(MV_ETH_TX_Q_NUM, stat->tx_done_hal_ok);
+        printk("\n");
+
+        printk( "skb_alloc_ok..................%10u\n", stat->skb_alloc_ok );
+        printk( "skb_free_ok...................%10u\n", stat->skb_free_ok );
+#ifdef CONFIG_MV_SKB_REUSE
+        printk( "skb_reuse_rx..................%10u\n", stat->skb_reuse_rx);
+        printk( "skb_reuse_tx..................%10u\n", stat->skb_reuse_tx);
+        printk( "skb_reuse_alloc...............%10u\n", stat->skb_reuse_alloc);
+#endif /* CONFIG_MV_SKB_REUSE */
+        printk("\n");
+
+	    printk( "tx_csum_hw....................%10u\n", stat->tx_csum_hw);
+	    printk( "tx_csum_sw....................%10u\n", stat->tx_csum_sw);
+        printk("\n");
+
+        printk( "rx_netif_drop.................%10u\n", stat->rx_netif_drop );
+	    printk( "rx_csum_hw....................%10u\n", stat->rx_csum_hw);
+	    printk( "rx_csum_hw_frags..............%10u\n", stat->rx_csum_hw_frags);
+	    printk( "rx_csum_sw....................%10u\n", stat->rx_csum_sw);
+
+#ifdef ETH_INCLUDE_LRO
+        printk( "\n");
+	    printk( "rx_lro_aggregated.............%10u\n", (u32)priv->lro_mgr.stats.aggregated);
+	    printk( "rx_lro_flushed................%10u\n", (u32)priv->lro_mgr.stats.flushed);
+	    printk( "rx_lro_defragmented...........%10u\n", (u32)priv->lro_mgr.stats.defragmented);
+	    printk( "rx_lro_no_resources...........%10u\n", (u32)priv->lro_mgr.stats.no_desc);
+#endif /* ETH_INCLUDE_LRO */
+
+
+
+#ifdef ETH_MV_TX_EN
+        printk( "\n");
+        printk( "tx_en_done....................%10u\n", stat->tx_en_done);
+        printk( "tx_en_busy....................%10u\n", stat->tx_en_busy);
+        printk( "tx_en_wait....................%10u\n", stat->tx_en_wait);
+        printk( "tx_en_wait_count..............%10u\n", stat->tx_en_wait_count);
+#endif /* ETH_MV_TX_EN */
+
+        printk("\n      Linux Path RX distribution\n");
+        for(i=0; i<sizeof(stat->rx_dist)/sizeof(u32); i++)
+        {
+            if(stat->rx_dist[i] != 0)
+                printk("%d RxPkts - %d times\n", i, stat->rx_dist[i]);
+        } 
+
+#ifdef ETH_INCLUDE_TSO
+        printk("\n      TSO stats\n");
+        for(i=0; i<64; i++)
+        {
+            if(stat->tso_stats[i] != 0)
+            {
+                printk("\t %d KBytes - %d times\n", i, stat->tso_stats[i]);
+                stat->tso_stats[i] = 0;
+            }
+        }
+#endif /* ETH_INCLUDE_TSO */
+
+#ifdef ETH_INCLUDE_UFO
+        printk("\n      UFO stats\n");
+        for(i=0; i<64; i++)
+        {
+	        if(stat->ufo_stats[i] != 0)
+	        {
+		        printk("\t %d KBytes - %d times\n", i, stat->ufo_stats[i]);
+		        stat->ufo_stats[i] = 0;
+	        }
+	    }
+#endif /* ETH_INCLUDE_UFO */
+
+        printk("\n      tx-done stats\n");
+        for(i=0; i<sizeof(stat->tx_done_dist)/sizeof(u32); i++)
+        {
+          if(stat->tx_done_dist[i] != 0)
+              printk("%d TxDonePkts - %d times\n", i, stat->tx_done_dist[i]);
+        } 
+    }
+#endif /* CONFIG_MV_ETH_STATS_DEBUG */
+
+    memset( stat, 0, sizeof(eth_statistics) );
+
+#ifdef ETH_INCLUDE_LRO
+	memset( &(priv->lro_mgr.stats), 0, sizeof(struct net_lro_stats) );
+#endif /* ETH_INCLUDE_LRO */
+
+}
+
+#ifdef CONFIG_MV_ETH_NFP
+void     mv_eth_nfp_stats_print(unsigned int port)
+{
+    mv_eth_priv         *priv = eth_priv_by_port(port);
+
+    if (priv == NULL)
+    {
+        printk("eth_nfp_stats_print: wrong port number %d\n", port);
+	    return;
+    }
+
+    mvFpStatsPrint(&priv->fpStats);
+    printk("\n");
+    printk("NFP RX pool status:\n");
+    mvStackStatus(priv->fpRxPool, 0);
+}
+#endif /* CONFIG_MV_ETH_NFP */ 
+
+void eth_print_irq_status(mv_eth_priv *priv)
+{
+    printk("Interrupt Cause Register = 0x%08x (0x%08x)\n", 
+            priv->picr, MV_REG_READ(ETH_INTR_CAUSE_REG(priv->port)));
+
+    printk("Interrupt Mask Register = 0x%08x\n", 
+            MV_REG_READ(ETH_INTR_MASK_REG(priv->port)));
+
+    printk("Interrupt Cause Extend Register = 0x%08x (0x%08x)\n", 
+            priv->picer, MV_REG_READ(ETH_INTR_CAUSE_EXT_REG(priv->port)));
+
+    printk("Interrupt Mask Extend Register = 0x%08x\n", 
+            MV_REG_READ(ETH_INTR_MASK_EXT_REG(priv->port)));
+}
+
+void print_iph(struct iphdr* iph)
+{
+    printk("**************** IP Header: ver=%d, ihl=%d ******************\n", 
+            iph->version, iph->ihl);
+    printk("tot_len=%d, id=0x%x, proto=%d, csum=0x%x, sip=0x%x, dip=0x%x\n",
+            ntohs(iph->tot_len & 0xFFFF), ntohs(iph->id & 0xFFFF), iph->protocol & 0xFF, 
+            ntohs(iph->check & 0xFFFF), ntohl(iph->saddr), ntohl(iph->daddr));
+}
+
+void print_tcph(struct tcphdr* hdr)
+{
+    printk("################## TCP Header: doff=%d ####################\n", hdr->doff); 
+    printk("sPort=%d, dPort=%d, seqId=0x%x, ackId=0x%x, win=0x%x, csum=0x%x\n", 
+            ntohs(hdr->source), ntohs(hdr->dest), ntohl(hdr->seq), ntohl(hdr->ack_seq),
+            ntohs(hdr->window), ntohs(hdr->check) );
+    printk("Flags: fin=%d, syn=%d, rst=%d, psh=%d, ack=%d, urg=%d, ece=%d, cwr=%d\n", 
+            hdr->fin, hdr->syn, hdr->rst, hdr->psh, hdr->ack, hdr->urg, hdr->ece, hdr->cwr);
+}
+
+
+void print_skb(struct sk_buff* skb)
+{
+    int i;
+
+    printk("\nskb=%p: head=%p, data=%p, tail=%p, end=%p\n", 
+                skb, skb->head, skb->data, skb->tail, skb->end);
+    printk("\t users=%d, truesize=%d, len=%d, data_len=%d, mac_len=%d\n", 
+            atomic_read(&skb->users), skb->truesize, skb->len, skb->data_len, skb->mac_len);
+    printk("\t next=%p, prev=%p, csum=0x%x, ip_summed=%d, pkt_type=%d, proto=0x%x, cloned=%d\n",
+            skb->next, skb->prev, skb->csum, skb->ip_summed, skb->pkt_type, 
+            ntohs(skb->protocol & 0xFFFF), skb->cloned);
+    printk("\t mac=%p, nh=%p, h=%p\n", skb_mac_header(skb),  ip_hdr(skb), tcp_hdr(skb));
+    printk("\t dataref=0x%x, nr_frags=%d, gso_size=%d, tso_segs=%d, frag_list=%p\n",
+            atomic_read(&skb_shinfo(skb)->dataref), skb_shinfo(skb)->nr_frags, skb_shinfo(skb)->gso_size,
+            skb_shinfo(skb)->gso_segs, skb_shinfo(skb)->frag_list);
+    for(i=0; i<skb_shinfo(skb)->nr_frags; i++)
+    {
+        printk("\t frag_%d. page=%p, page_offset=0x%x, size=%d\n",
+            i, page_address(skb_shinfo(skb)->frags[i].page), 
+            skb_shinfo(skb)->frags[i].page_offset & 0xFFFF, 
+            skb_shinfo(skb)->frags[i].size & 0xFFFF);
+    }
+    if( (skb->protocol == ntohs(ETH_P_IP)) && (ip_hdr(skb) != NULL) )
+    {
+        print_iph(ip_hdr(skb));
+        if(ip_hdr(skb)->protocol == IPPROTO_TCP)
+            print_tcph(tcp_hdr(skb));
+    }
+    printk("\n");
+}
+
+/*********************************************************** 
+ * eth_init_module --                                    *
+ *   main driver initialization. loading the interfaces.   *
+ ***********************************************************/
+static int mv_eth_probe(struct platform_device *pdev)
+{
+    struct mv_netdev_platform_data *pd = pdev->dev.platform_data;
+    u32             i, port, netdev=0;
+    mv_eth_priv     *priv;
+    u8              mac_addr[6];
+    int             mtu;
+
+    printk( "Load Marvell Ethernet Driver\n");
+
+#if defined(CONFIG_HAVE_CLK)
+	pd->clk = clk_get(&pdev->dev, NULL);
+	if (IS_ERR(pd->clk))
+		dev_notice(&pdev->dev, "cannot get clkdev\n");
+	else
+		clk_enable(pd->clk);
+#endif
+
+    /* Initialize mv_eth_rxq_desc array */
+    for(i=0; i<MV_ETH_RX_Q_NUM; i++) 
+    {
+        mv_eth_rxq_desc[i] = CONFIG_MV_ETH_NUM_OF_RX_DESCR;
+	    mv_eth_rx_desc_total += mv_eth_rxq_desc[i];
+    }
+    /* Initialize mv_eth_txq_desc array */
+    for(i=0; i<MV_ETH_TX_Q_NUM; i++) {
+        mv_eth_txq_desc[i] = CONFIG_MV_ETH_NUM_OF_TX_DESCR;
+
+        mv_eth_tx_desc_total += mv_eth_txq_desc[i];
+    }
+
+    spin_lock_init( &mii_lock );
+
+    /* init MAC Unit */
+    mvSysEthInit();
+
+    mv_eth_config_show();
+
+    /* TODO: need to port this to a nicer platform driver and platform device support */
+    mv_eth_ports_num = mvCtrlEthMaxPortGet();
+#ifdef CONFIG_MV_ETH_PORTS_NUM
+    if (CONFIG_MV_ETH_PORTS_NUM < mv_eth_ports_num)
+    {
+	    mv_eth_ports_num = CONFIG_MV_ETH_PORTS_NUM;
+    }
+#endif
+    mv_eth_ports = mvOsMalloc(mv_eth_ports_num*sizeof(mv_eth_priv*));
+    if(mv_eth_ports == NULL)
+    {
+        printk("eth_init_module: can't allocate mv_net_devs for %d devices\n", 
+                mv_eth_ports_num);
+        return 1; 
+    }
+    memset(mv_eth_ports, 0, (mv_eth_ports_num*sizeof(struct net_device*)));
+
+    mv_net_devs = mvOsMalloc((mv_eth_ports_num + GTW_MAX_NUM_OF_IFS)*sizeof(struct net_device*));
+    if(mv_net_devs == NULL)
+    {
+        printk("eth_init_module: can't allocate mv_net_devs for %d devices\n", 
+                mv_net_devs_num);
+        return 1; 
+    }
+    memset(mv_net_devs, 0, ((mv_eth_ports_num + GTW_MAX_NUM_OF_IFS) * sizeof(struct net_device*)));
+
+    printk("  o Loading network interface(s):\n");
+
+    for (port = 0; port < mv_eth_ports_num; port++)
+    {
+#ifdef CONFIG_MV78200
+	if (MV_FALSE == mvSocUnitIsMappedToThisCpu(GIGA0+port))
+	{
+		printk(KERN_INFO"GbE %d is not mapped to this CPU\n", port);
+		continue;
+	}		
+#endif
+#if 0
+	/* Dove: Assuming ports are not powered down because they were powered up first thing in mv_eth_probe */
+	if (MV_FALSE == mvCtrlPwrClckGet(ETH_GIG_UNIT_ID, port)) 
+	{
+	    printk("\nWarning: Giga %d is Powered Off\n", port);
+	    continue;
+        }
+#endif
+
+	/* we deal with gateway ports later */
+#if defined(CONFIG_MV_GATEWAY)
+	if (mvBoardIsSwitchConnected(port))
+		continue;
+#endif /* CONFIG_MV_GATEWAY */
+
+        /* Allocate mv_eth_priv structure */
+        priv = mvOsMalloc(sizeof(mv_eth_priv));
+        if(priv == NULL)
+        {
+            printk("GbE port %d: can't allocate mv_eth_priv structure\n", port);
+            return 1;
+        }
+        mv_eth_ports[port] = priv;
+
+        if( mv_eth_priv_init(priv, port) )
+        {
+            printk("GbE port %d: can't create mv_eth_priv structure\n", port);
+            mv_eth_priv_cleanup(priv);
+            return 1;
+        }
+#if defined(CONFIG_MV_GATEWAY)
+	priv->isGtw = mvBoardIsSwitchConnected(port);
+#endif /* CONFIG_MV_GATEWAY */
+        mtu = eth_get_config(priv, mac_addr);
+        if( mv_eth_hal_init(priv, mtu, mac_addr) )
+        {
+            printk("eth_init_module: can't init eth_hal driver\n");
+            mv_eth_priv_cleanup(priv);
+            return 1;
+        }
+
+        mv_net_devs[netdev] = mv_netdev_init(priv, mtu, mac_addr);
+        if(mv_net_devs[netdev] == NULL)
+        {
+            printk("eth_init_module: can't create netdevice\n");
+            mv_eth_priv_cleanup(priv);
+            return 1;
+        }
+        priv->net_dev = mv_net_devs[netdev];
+        netdev++;
+
+	mv_eth_tos_map_init(port);        
+    }
+
+    /* now deal with gateway ports */
+    /* We initialize the Gateway interface last to maintain interface name ordering, */
+    /* e.g: the non-gateway interface will be named eth0 and the gateway interface will be eth1 */
+    /* Naming is done according to the order of initialization. */
+#if defined(CONFIG_MV_GATEWAY)
+    for (port = 0; port < mv_eth_ports_num; port++)
+    {
+#if 0
+	/* Dove: Assuming ports are not powered down because they were powered up first thing in mv_eth_probe */
+	if (MV_FALSE == mvCtrlPwrClckGet(ETH_GIG_UNIT_ID, port)) 
+	{
+	    printk("\nWarning: Giga %d is Powered Off\n", port);
+	    continue;
+        }
+#endif
+	/* disregard non-gateway ports */
+	if (!(mvBoardIsSwitchConnected(port)))
+		continue;
+
+        /* Allocate mv_eth_priv structure */
+        priv = mvOsMalloc(sizeof(mv_eth_priv));
+        if(priv == NULL)
+        {
+            printk("GbE port %d: can't allocate mv_eth_priv structure\n", port);
+            return 1;
+        }
+        mv_eth_ports[port] = priv;
+
+        if( mv_eth_priv_init(priv, port) )
+        {
+            printk("GbE port %d: can't create mv_eth_priv structure\n", port);
+            mv_eth_priv_cleanup(priv);
+            return 1;
+        }
+
+        priv->isGtw = mvBoardIsSwitchConnected(port);
+	printk("  o Loading Gateway interface(s):\n");
+        if( mv_gtw_net_setup(port) < 0)
+        {
+            printk("GbE port %d: mv_gtw_net_setup FAILED\n", port);
+            mv_eth_priv_cleanup(priv);
+            return 1;
+        }
+        if( mv_eth_hal_init(priv, gtw_config.mtu, NULL) )
+        {
+            printk("eth_init_module: can't init eth_hal driver\n");
+            mv_eth_priv_cleanup(priv);
+            return 1;
+        }
+        for(i=0; i<gtw_config.vlans_num; i++)
+        {
+            mv_net_devs[netdev] = mv_netdev_init(priv, gtw_config.mtu, gtw_config.vlan_cfg[i].macaddr);
+            if(mv_net_devs[netdev] == NULL)
+            {
+                printk("eth_init_module: can't create netdevice\n");
+                mv_eth_priv_cleanup(priv);
+                return 1;
+            }
+            priv->net_dev = mv_net_devs[netdev];
+
+            ((mv_net_priv*)(mv_net_devs[netdev]->priv))->vlan_cfg = &gtw_config.vlan_cfg[i];
+            netdev++;
+        }
+        if (mv_gtw_init_complete(priv) != 0)
+	    return 1;
+
+	mv_eth_tos_map_init(port);
+    }
+#endif /* CONFIG_MV_GATEWAY */
+
+    mv_net_devs_num = netdev;
+    printk("\n");
+
+#ifdef CONFIG_MV_ETH_NFP
+    {
+        MV_STATUS       status;
+
+        status = fp_mgr_init();
+        if (status != MV_OK) {
+            printk("fp_mgr_init failed\n");
+	        return 1;
+        }
+        spin_lock_init( &nfp_lock );
+	    for(i=0; i<mv_net_devs_num; i++) 
+        {
+		    if (mv_net_devs[i] != NULL) 
+            {
+			    status = fp_mgr_if_register(mv_net_devs[i]->ifindex, MV_FP_IF_INT, 
+                                            mv_net_devs[i]);
+			    if (status != MV_OK) {
+				    printk("fp_mgr_if_register failed\n");
+				    return 1;
+			    }
+		    }
+        }
+    }
+#endif /* CONFIG_MV_ETH_NFP */
+
+    TRC_INIT(0, 0, 0, 0);
+    TRC_START();
+
+    return 0;
+}
+
+static int mv_eth_remove(struct platform_device *pdev)
+{
+#if defined(CONFIG_HAVE_CLK)
+	struct mv_netdev_platform_data *pd = pdev->dev.platform_data;
+
+	if (!IS_ERR(pd->clk)) {
+		clk_disable(pd->clk);
+		clk_put(pd->clk);
+	}
+#endif
+    printk("Marvell Ethernet Driver REMOVE\n");
+    return 0;
+}
+
+static void mv_eth_shutdown(struct platform_device *pdev)
+{
+    printk("Marvell Ethernet Driver SHUTDOWN\n");
+}
+
+static struct platform_driver mv_eth_driver = {
+	.probe = mv_eth_probe,
+	.remove = mv_eth_remove,
+	.shutdown = mv_eth_shutdown,
+#ifdef CONFIG_PM
+	.suspend = mv_eth_suspend,
+	.resume = mv_eth_resume,
+#endif /* CONFIG_PM */
+	.driver = {
+		.name = MV_NETDEV_ETH_NAME,
+	},
+};
+
+static int __init mv_eth_init_module(void)
+{
+	return platform_driver_register(&mv_eth_driver);
+}
+module_init(mv_eth_init_module);
+
+static void __exit mv_eth_cleanup_module(void)
+{
+	platform_driver_unregister(&mv_eth_driver);
+}
+module_exit(mv_eth_cleanup_module);
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_network/mv_ethernet/mv_gtw_igmp.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_network/mv_ethernet/mv_gtw_igmp.c
@@ -0,0 +1,532 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+*******************************************************************************/
+
+#include <linux/kernel.h>
+#include <linux/netdevice.h>
+#include <linux/ip.h>
+#include <linux/in.h>
+#include <linux/igmp.h>
+#include <linux/if_ether.h>
+#include <linux/list.h>
+#include <linux/inetdevice.h>
+#include <net/checksum.h>
+
+/* To enable debugging uncomment CONFIG_IGMPS_DEBUG */
+#define CONFIG_IGMPS_DEBUG
+
+#ifdef CONFIG_IGMPS_DEBUG
+#define IGMPSDEBUG(format, args...)  printk(format , ## args)
+#else
+#define IGMPSDEBUG(format, args...)
+#endif
+
+/* APIs exported by the "mv_gwy_main.c" */
+extern int mv_gtw_enable_igmp(void); 
+extern int mv_gtw_set_mac_addr_to_switch(unsigned char *mac_addr, unsigned char db, unsigned int ports_mask, unsigned char op);
+
+/* MAC node data structure (a member of "ipm_llist") */
+typedef struct mac_node 
+{
+    struct list_head ip_list;
+    unsigned char eth_addr[ETH_ALEN];
+    unsigned int port_bitmap;
+    struct list_head list_node;
+}_mac_node;
+
+/* IP node data structure */
+typedef struct ip_node 
+{
+    unsigned int ip_port_bitmap;
+    unsigned int ip_addr;
+    struct list_head ip_list_node;
+}_ip_node;
+
+static int _igmp_add_mac_node( unsigned char temp_addr[ETH_ALEN], unsigned char vlan_dbnum,
+				__u32		igmp_addr,
+				__u32		port_bitmap);
+			
+/* Linked list of the MAC addresses */
+static LIST_HEAD(ipm_llist);
+
+/* Main process routine */
+int mv_gtw_igmp_snoop_process(struct sk_buff* skb, unsigned char port, unsigned char vlan_dbnum)     
+{
+    struct iphdr      *ipheader;
+    struct igmphdr    *igmpheader;
+    __u32             igmp_addr, igmp_addr_host;
+    unsigned char     mac_found, ip_found, ip_port_found;
+    unsigned char     temp_mac_addr[ETH_ALEN];
+    struct list_head  *l, *ip_l;
+    __u32             temp_port_bitmap = 0;
+    _mac_node         *mac_node_entry;
+    _ip_node          *ip_node_entry;
+    __u16 	      old_igmp_csum, new_igmp_csum;
+
+    ipheader = (struct iphdr*)(skb->data);
+
+    /* First of all, let's filter out non-IGMP traffic */
+    if (ipheader->protocol != IPPROTO_IGMP)
+        goto out;
+		
+    /* Get the pointer to the IGMP header and its data */
+    igmpheader = (struct igmphdr*)((__u32)ipheader + (__u32)(ipheader->ihl * 4));
+
+    /* Filter out unsupported IGMP messages */
+    if ((igmpheader->type != IGMP_HOST_MEMBERSHIP_REPORT) &&
+	(igmpheader->type != IGMPV2_HOST_MEMBERSHIP_REPORT) &&
+	(igmpheader->type != IGMP_HOST_LEAVE_MESSAGE))    	
+	goto out;
+    
+    /* Filter out non-multicast messages */
+    if (!MULTICAST(igmpheader->group))
+    {
+    	printk(KERN_ERR "\nIGMP snoop: Non-multicast group address in IGMP header\n");
+	goto out;
+    }
+    
+    /* According to "draft-ietf-magma-snoop-12.txt" local multicast messages (224.0.0.x) must be flooded to all ports */
+    /* So, don't do anything with such messages */
+    if (LOCAL_MCAST(igmpheader->group))
+    {
+    	IGMPSDEBUG(KERN_INFO "\nIGMP snoop: Local IGMP messages (224.0.0.x) must be flooded \n");
+	goto out;
+    }
+    
+    /* According to RFC 2236 IGMP LEAVE messages should be sent to ALL-ROUTERS address (224.0.0.2) */
+    if (igmpheader->type == IGMP_HOST_LEAVE_MESSAGE)
+    {
+    	if (ntohl(ipheader->daddr) != 0xE0000002)
+	{
+		IGMPSDEBUG(KERN_INFO "\nIGMP snoop: Ignore IGMP LEAVE message sent to non-ALL-ROUTERS address (224.0.0.2) \n");
+		goto out;
+	}	
+    }
+    else
+    {
+    	/* According to RFC 2236 Membership Report (JOIN) IGMP messages should be sent to the IGMP group address */
+	if (ipheader->daddr != igmpheader->group)
+    	{
+    		IGMPSDEBUG(KERN_INFO "\nIGMP snoop: Ignore IGMP JOIN message with different destination IP(%u.%u.%u.%u) and IGMP group address(%u.%u.%u.%u) \n",
+			NIPQUAD(ipheader->daddr), NIPQUAD(igmpheader->group));
+		goto out;
+   	 }
+    }
+    
+    /* According to RFC 2236 the IGMP checksum must be checked before processing */
+    /* Before re-calculation of the IGMP checksum one needs to zero the checksum field */
+    old_igmp_csum = igmpheader->csum;
+    igmpheader->csum = 0;
+	 
+    /* Calculate a new checksum */
+    new_igmp_csum = ip_compute_csum((void *)igmpheader, sizeof(struct igmphdr));
+	
+    /* Restore the old checksum */
+    igmpheader->csum = old_igmp_csum;
+	
+    if (old_igmp_csum != new_igmp_csum)
+    {
+	printk(KERN_ERR "\nIGMP snoop: Wrong IGMP message checksum\n");
+	goto out;
+    }	
+        
+    igmp_addr = igmpheader->group;
+    igmp_addr_host = ntohl(igmpheader->group);
+
+    /* Build the multicast MAC address */
+    temp_mac_addr[0] = 0x01;
+    temp_mac_addr[1] = 0x00;
+    temp_mac_addr[2] = 0x5E;
+    temp_mac_addr[3] = (igmp_addr_host>>16) & 0x000000FF;
+    temp_mac_addr[4] = (igmp_addr_host>>8) & 0x000000FF;
+    temp_mac_addr[5] = igmp_addr_host & 0x000000FF;
+
+    /* Set the bit corresponding to the source port */
+    temp_port_bitmap = 1 << port;
+        
+    switch(igmpheader->type)
+    { 
+	case IGMP_HOST_MEMBERSHIP_REPORT:
+	case IGMPV2_HOST_MEMBERSHIP_REPORT:	
+	    IGMPSDEBUG(KERN_INFO "\n\nIGMP snoop: %s JOIN (if=\"%s\", group=%u.%u.%u.%u, port=%d, vlanDB=%d)\n",
+		(igmpheader->type == IGMP_HOST_MEMBERSHIP_REPORT) ? "IGMPv1" : "IGMPv2",
+		 skb->dev->name, NIPQUAD(igmp_addr), port, vlan_dbnum);
+			
+	    /* If the DB (linked list) is empty, create it and add the MAC node  */
+	    if (list_empty(&ipm_llist)) {
+		IGMPSDEBUG(KERN_INFO "IGMP snoop: Empty MAC node list \n");
+		if (_igmp_add_mac_node(temp_mac_addr, vlan_dbnum, igmp_addr, port) != 0) {
+		    printk(KERN_ERR "IGMP snoop: Failed to add MAC node \n");
+		    goto out;
+		}
+	    }
+	    else {
+		/* Non-empty MAC node list */
+		l = ipm_llist.next;
+		mac_found = 0;
+
+		IGMPSDEBUG(KERN_INFO "IGMP snoop: Searching for MAC(01:00:5e:%x:%x:%x) ...\n", 
+		   temp_mac_addr[3], temp_mac_addr[4], temp_mac_addr[5]); 
+
+		/* Check all entries of the MAC node list */
+		do {
+		    mac_node_entry = list_entry(l, struct mac_node, list_node);	
+	
+		    /* Check whether the node's MAC address is equal to the current one */
+		    if (memcmp(temp_mac_addr,mac_node_entry->eth_addr,ETH_ALEN) == 0) {
+
+			IGMPSDEBUG(KERN_INFO "IGMP snoop: MAC address was found in the list\n");
+			mac_found = 1; /* MAC node was found */
+	
+			/* Now look for ip entry */
+			ip_l = mac_node_entry->ip_list.next;
+			ip_found = 0;
+	
+			/* Check all entries of the IP address list */
+			IGMPSDEBUG(KERN_INFO "IGMP snoop: Searching for IP(%u.%u.%u.%u) ...\n", NIPQUAD(igmp_addr));
+
+			do {
+			    ip_node_entry = list_entry(ip_l, struct ip_node, ip_list_node);	
+	
+			    if (ip_node_entry->ip_addr != igmp_addr) {
+				/* Another IP address was found, continue */	
+				ip_l = ip_l->next;
+			    }
+			    else {
+				/* Current IP address is already in the list */
+				IGMPSDEBUG(KERN_INFO "IGMP snoop: IP address was found in the list\n");
+				ip_found = 1;
+	
+				/* Check whether the port bit is already set in the IP node bitmap */
+				if ((ip_node_entry->ip_port_bitmap & temp_port_bitmap) == 0) {
+				    IGMPSDEBUG(KERN_INFO "IGMP snoop: Port %d is not yet set in IP entry port bitmap\n", port);
+
+				    /* Bit is not set, add a new port to ip entry*/
+				    ip_node_entry->ip_port_bitmap |= temp_port_bitmap;
+	
+				    /* Check whether there is a need to update the MAC entry ? */
+				    if ((mac_node_entry->port_bitmap & temp_port_bitmap) == 0) {
+					/* Bit is not set yet and therefore the switch was not instructed */	
+					mac_node_entry->port_bitmap |= temp_port_bitmap;
+	
+					/* Instruct the switch to add the MAC address + port */
+					IGMPSDEBUG(KERN_INFO "IGMP snoop: Add port (%d) and MAC address (01:00:5e:%d:%d:%d) to switch DB (dbnum=%d)\n", 
+					   port, mac_node_entry->eth_addr[3], mac_node_entry->eth_addr[4], mac_node_entry->eth_addr[5],vlan_dbnum);
+
+					if (mv_gtw_set_mac_addr_to_switch(temp_mac_addr, vlan_dbnum, mac_node_entry->port_bitmap, 1) != 0)
+					    printk(KERN_ERR "IGMP snoop: mv_gtw_set_mac_addr_to_switch() failed \n");
+				    }
+				}
+			    }
+			} while((ip_l != &mac_node_entry->ip_list) && (ip_found==0));
+		
+			/* Check whether the IP node was found */
+			if (ip_found == 0) {
+			    /* Add a new ip node */
+			    _ip_node *new_ip_node;
+						
+			    IGMPSDEBUG(KERN_INFO "IGMP snoop: Add a new IP node to the list (ip=%u.%u.%u.%u port=%d)\n",NIPQUAD(igmp_addr),port);
+
+			    new_ip_node = kmalloc(sizeof(_ip_node), GFP_KERNEL);
+			    if (new_ip_node == NULL) {
+			    	printk(KERN_ERR "IGMP snoop: out-of-memory\n");
+				goto out;
+			    }
+	
+			    /* Fill the IP node with data */
+			    INIT_LIST_HEAD(&new_ip_node->ip_list_node);
+			    new_ip_node->ip_addr = igmp_addr;
+			    new_ip_node->ip_port_bitmap = temp_port_bitmap;
+	
+			    list_add_tail(&new_ip_node->ip_list_node, &mac_node_entry->ip_list);
+	
+			    /* if need to update the mac entry ? */
+			    if ((mac_node_entry->port_bitmap & temp_port_bitmap) == 0) {
+				mac_node_entry->port_bitmap |= temp_port_bitmap;
+				/* Instruct the switch to add the MAC address + port */
+				IGMPSDEBUG(KERN_INFO "IGMP snoop: Add port (%d) and MAC address (01:00:5e:%d:%d:%d) to switch DB (dbnum=%d)\n", 
+				   port,mac_node_entry->eth_addr[3], mac_node_entry->eth_addr[4], mac_node_entry->eth_addr[5],vlan_dbnum);
+
+				if (mv_gtw_set_mac_addr_to_switch(temp_mac_addr,vlan_dbnum,mac_node_entry->port_bitmap, 1) != 0)
+					printk(KERN_ERR "IGMP snoop: mv_gtw_set_mac_addr_to_switch() failed \n");
+			    }
+			}    /* if (ip_found == 0)  */
+		    }  /* if (memcmp(temp_mac_addr,mac_node_entry->eth_addr,ETH_ALEN) == 0)  */
+
+		    else {
+			/* Another MAC address is found in the MAC node linked list */
+			l = l->next;
+		    }
+		} while ((l != &ipm_llist) && (mac_found == 0));
+	
+		/* If the MAC entry was not found, than add a mac entry to the DB */
+		if (mac_found == 0) {
+		    if (_igmp_add_mac_node(temp_mac_addr, vlan_dbnum, igmp_addr, port) != 0) {
+			printk(KERN_ERR "Failed to add MAC node \n");
+			goto out;
+		    }
+		}
+	    }
+	    break;
+
+	case IGMP_HOST_LEAVE_MESSAGE:
+	    IGMPSDEBUG(KERN_INFO "\n\nIGMP snoop: IGMPv2 LEAVE (if=\"%s\", group=%u.%u.%u.%u, port=%d, vlanDB=%d)\n",
+	    skb->dev->name, NIPQUAD(igmp_addr), port, vlan_dbnum);
+
+	    /* Nothing to be done if the MAC node list is empty*/
+	    if (list_empty(&ipm_llist))
+		break;
+	
+	    /* Search for the MAC address in the list */
+	    IGMPSDEBUG(KERN_INFO "IGMP snoop: Searching for MAC(01:00:5e:%x:%x:%x) ...\n", 
+	    temp_mac_addr[3], temp_mac_addr[4], temp_mac_addr[5]); 
+	    l = ipm_llist.next;
+	    mac_found = 0;
+
+	    do {
+		mac_node_entry = list_entry(l, struct mac_node, list_node);
+
+		if (memcmp(temp_mac_addr, mac_node_entry->eth_addr, ETH_ALEN) == 0) {
+
+		    /* MAC address match */
+		    IGMPSDEBUG(KERN_INFO "IGMP snoop: MAC address was found in the list\n");
+		    mac_found = 1;
+		
+		    /* Now look for the IP entry */
+		    ip_l = mac_node_entry->ip_list.next;
+		    ip_found = 0;
+		    ip_port_found = 0;
+
+		    /* First of all, check whether the common bitamp has this bit set */
+		    if ((mac_node_entry->port_bitmap & temp_port_bitmap) != 0) {
+
+			IGMPSDEBUG(KERN_INFO "IGMP snoop: Searching for IP(%u.%u.%u.%u) ...\n", NIPQUAD(igmp_addr));
+								
+			do {
+			    ip_node_entry = list_entry(ip_l, struct ip_node, ip_list_node);
+						
+			    if (ip_node_entry->ip_addr != igmp_addr) {
+				/* Another IP multicast address but need to check if the port to be  */
+				/* removed is set. */ 
+				IGMPSDEBUG(KERN_INFO "IGMP snoop: Port %d is used by IP(%u.%u.%u.%u) ...\n", 
+				    port, NIPQUAD(ip_node_entry->ip_addr)); 
+
+				/* check if the port to be removed is present in the IP entry bitmap */	
+				if((ip_node_entry->ip_port_bitmap & temp_port_bitmap) != 0) {
+				    ip_port_found = 1;
+				}
+			    }
+
+			    else {
+				/* The multicast IP address to remove was found */
+				IGMPSDEBUG(KERN_INFO "IGMP snoop: IP address was found in the list\n");
+				ip_found = 1;
+		
+				/* Check whether the port is set in the IP entry bitmap */
+				if ((ip_node_entry->ip_port_bitmap & temp_port_bitmap) != 0) {
+				    /* Remove the port from the IP entry's bitmap */
+				    ip_node_entry->ip_port_bitmap &= ~temp_port_bitmap;
+			
+				    /* If there are no more bits set to 1, delete the IP entry node */
+				    if (ip_node_entry->ip_port_bitmap == 0) {
+					IGMPSDEBUG(KERN_INFO "IGMP snoop: Last port on IP node, delete the IP entry\n");
+					ip_l = ip_l->next;
+			
+					list_del(&ip_node_entry->ip_list_node);
+			
+					/* MUST FREE MEMORY */
+					kfree(ip_node_entry);
+					continue;
+				    }
+				}
+			    }
+		
+			    ip_l = ip_l->next;
+		
+			} while (ip_l != &mac_node_entry->ip_list); /* walkthrough of IP list */
+		
+		    }
+
+		    /* Check whether we need to update the MAC entry */
+		    if ((ip_found == 1) && (ip_port_found == 0)) {
+			/* If the port to remove is not associated with any IP address, */
+			/* instruct the switch component to remove it */
+			if ((mac_node_entry->port_bitmap & temp_port_bitmap) != 0) {
+			    mac_node_entry->port_bitmap ^= temp_port_bitmap;
+		
+			    /* Send the command to the switch */
+			    IGMPSDEBUG(KERN_INFO "IGMP snoop: Send port bitmap (0x%x) and MAC address (01:00:5e:%d:%d:%d) to switch DB (dbnum=%d)\n", 
+			    mac_node_entry->port_bitmap,mac_node_entry->eth_addr[3], mac_node_entry->eth_addr[4], mac_node_entry->eth_addr[5],vlan_dbnum);
+
+			    /* Is it the last port of the MAC entry ? */ 
+			    if (mac_node_entry->port_bitmap == 0) {
+				IGMPSDEBUG(KERN_INFO "IGMP snoop: Last port on MAC node, delete the MAC entry\n");
+
+				if (mv_gtw_set_mac_addr_to_switch(temp_mac_addr, vlan_dbnum, mac_node_entry->port_bitmap, 0) != 0)
+				    printk(KERN_ERR "IGMP snoop: mv_gtw_set_mac_addr_to_switch() failed \n");
+
+				list_del(&mac_node_entry->list_node);
+				/* MUST FREE MEMORY */
+				kfree(mac_node_entry);
+			    }
+			    else {
+				if (mv_gtw_set_mac_addr_to_switch(temp_mac_addr, vlan_dbnum, mac_node_entry->port_bitmap, 1) != 0)
+				    printk(KERN_ERR "IGMP snoop: mv_gtw_set_mac_addr_to_switch() failed \n");
+			    }
+		    	}
+		    }
+		} /* handling of the found MAC address match */
+		
+		else {
+		    l = l->next;
+		}
+	    } while ((l != &ipm_llist) && (mac_found==0));
+	
+	    break;
+	
+	default:
+	    break;	
+    }
+	
+out:
+    return 0; 
+}
+
+
+
+/* Initialization function */
+int __init mv_gtw_igmp_snoop_init(void)
+{
+    /* Enable the HW-based IGMP snooping */
+    mv_gtw_enable_igmp();
+    return 0;
+}
+
+/* Exit function */
+int __exit mv_gtw_igmp_snoop_exit(void)
+{
+    struct list_head *l, *ip_l;
+    _mac_node *node_entry;
+    _ip_node   *ip_node_entry;
+
+    /* should free all kmalloc allocated memory from llists */
+    if (list_empty(&ipm_llist))
+        goto out;
+
+    l = ipm_llist.next;
+    do
+    {
+        node_entry = list_entry(l, struct mac_node, list_node);
+        IGMPSDEBUG(KERN_INFO "IGMP snoop: Free MAC node (mac=01:00:5e:%x:%x:%x)\n", 
+               node_entry->eth_addr[3], node_entry->eth_addr[4], node_entry->eth_addr[5]); 
+
+	/* now look for ip entry */
+        ip_l = node_entry->ip_list.next;
+        
+	do
+        {
+            ip_node_entry = list_entry(ip_l, struct ip_node, ip_list_node);
+            IGMPSDEBUG(KERN_INFO "IGMP snoop: 	Free IP node (ip=%d.%d.%d.%d)\n", 
+					   NIPQUAD(ip_node_entry->ip_addr));
+                         
+            ip_l = ip_l->next;
+            list_del(&ip_node_entry->ip_list_node);
+
+             /* MUST FREE MEMORY */
+            kfree(ip_node_entry);
+	    
+        }while(ip_l != &node_entry->ip_list); /* walkthrough of IP list */
+
+	l = l->next;
+        
+	list_del(&node_entry->list_node);
+        kfree(node_entry);
+
+    }while(l != &ipm_llist);
+
+out:
+    IGMPSDEBUG(KERN_INFO "IGMP snoop: Exit completed\n");
+    
+    return 0;
+}
+
+/* Add a new MAC node to the list of multicast MAC address structures */
+static int _igmp_add_mac_node(	unsigned char	temp_mac_addr[ETH_ALEN],
+				unsigned char	vlan_dbnum,
+				__u32		igmp_addr,
+				__u32		port)
+{
+	/* should use label , or shorten the code in any other way, I know!!! */
+	_mac_node *new_mac_node;	
+	_ip_node  *new_ip_node;
+
+	IGMPSDEBUG(KERN_INFO "IGMP snoop: Add a new MAC node (mac=01:00:5e:%x:%x:%x, ip=%d.%d.%d.%d, port=%d)\n", 
+				temp_mac_addr[3], temp_mac_addr[4], temp_mac_addr[5], NIPQUAD(igmp_addr), port);
+
+	/* Allocate the memory chunk for the MAC node */
+	new_mac_node = kmalloc(sizeof(_mac_node), GFP_KERNEL);
+	if (new_mac_node == NULL) 
+	{
+		printk(KERN_ERR "out-of-memory\n");
+		return -ENOMEM;
+	}
+
+	/* Initialize the list node */
+	INIT_LIST_HEAD(&new_mac_node->list_node);
+
+	/* Copy the MAC address and port bitmap */
+	memcpy(new_mac_node->eth_addr, temp_mac_addr, ETH_ALEN);
+	new_mac_node->port_bitmap = (1 << port);
+
+	/* Init the head of the IP address list */
+	INIT_LIST_HEAD(&new_mac_node->ip_list);
+
+	/* Create the first element of the IP address list */
+	new_ip_node = kmalloc(sizeof(_ip_node), GFP_KERNEL);
+	if (new_ip_node == NULL) 
+	{
+		printk(KERN_ERR "out-of-memory\n");
+		kfree(new_mac_node);
+		return -ENOMEM;
+	}
+
+	/* Fill the IP address element with data */
+	INIT_LIST_HEAD(&new_ip_node->ip_list_node);	
+	new_ip_node->ip_addr = igmp_addr;
+	new_ip_node->ip_port_bitmap = (1 << port);
+
+	/* Add the IP address element to the list */
+	list_add_tail(&new_ip_node->ip_list_node, &new_mac_node->ip_list);
+
+	/* Add the MAC node element to the list */
+	list_add_tail(&new_mac_node->list_node, &ipm_llist);
+
+	/* Instruct the network driver to add the corresponding entry to the switch table */
+	mv_gtw_set_mac_addr_to_switch(temp_mac_addr, vlan_dbnum, new_mac_node->port_bitmap, 1);
+
+	return 0;
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_network/mv_ethernet/mv_ethernet.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_network/mv_ethernet/mv_ethernet.c
@@ -0,0 +1,375 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+*******************************************************************************/
+
+#include "mvCommon.h"  /* Should be included before mvSysHwConfig */
+#include <linux/kernel.h>
+#include <linux/version.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/skbuff.h>
+#include <linux/pci.h>
+#include <linux/ip.h>
+#include <linux/in.h>
+#include <linux/tcp.h>
+#include <net/ip.h>
+#include <net/xfrm.h>
+
+#include "mvOs.h"
+#include "dbg-trace.h"
+#include "mvSysHwConfig.h"
+#include "eth/mvEth.h"
+#include "eth/gbe/mvEthGbe.h"
+#include "eth-phy/mvEthPhy.h"
+#include "eth-phy/mvEthPhyRegs.h"
+#include "mvKW_HAL_glue.h"
+
+#include "mv_netdev.h"
+
+
+int mv_eth_read_mii(unsigned int portNumber, unsigned int MIIReg, unsigned int* value)
+{
+    unsigned long flags;
+    unsigned short tmp;
+    MV_STATUS status;
+
+    spin_lock_irqsave(&mii_lock, flags);
+    status = mvEthPhyRegRead(mvBoardPhyAddrGet(portNumber), MIIReg, &tmp);
+    spin_unlock_irqrestore(&mii_lock, flags);	
+    *value = tmp;
+    if (status == MV_OK)
+        return 0;
+
+    return -1;
+}
+
+
+int mv_eth_write_mii(unsigned int portNumber, unsigned int MIIReg, unsigned int data)
+{
+    unsigned long   flags;
+    unsigned short  tmp;
+    MV_STATUS       status;
+
+    spin_lock_irqsave(&mii_lock, flags);
+    tmp = (unsigned short)data;
+    status = mvEthPhyRegWrite(mvBoardPhyAddrGet(portNumber), MIIReg, tmp);
+    spin_unlock_irqrestore(&mii_lock, flags);
+
+    if (status == MV_OK)
+        return 0;
+
+    return -1;
+}
+
+static int mv_eth_restart_autoneg( int port )
+{
+    u32 phy_reg_val = 0;
+
+    /* enable auto-negotiation */
+    mv_eth_read_mii(port, ETH_PHY_CTRL_REG, &phy_reg_val);
+    phy_reg_val |= BIT12;
+    mv_eth_write_mii(port, ETH_PHY_CTRL_REG, phy_reg_val);
+
+    mdelay(10);
+
+    /* restart auto-negotiation */
+    phy_reg_val |= BIT9;
+    mv_eth_write_mii(port, ETH_PHY_CTRL_REG, phy_reg_val);
+
+    mdelay(10);
+
+    return 0;
+}
+
+
+/*********************************************************** 
+ * mv_eth_start --                                          *
+ *   start a network device. connect and enable interrupts *
+ *   set hw defaults. fill rx buffers. restart phy link    *
+ *   auto neg. set device link flags. report status.       *
+ ***********************************************************/
+static int mv_eth_start( struct net_device *dev ) 
+{
+    mv_eth_priv *priv = MV_ETH_PRIV(dev);
+
+    ETH_DBG( ETH_DBG_LOAD, ("%s: starting... ", dev->name ) );
+
+    /* in default link is down */
+    netif_carrier_off( dev );
+
+    /* Stop the TX queue - it will be enabled upon PHY status change after link-up interrupt/timer */
+    netif_stop_queue( dev );
+
+    /* enable polling on the port, must be used after netif_poll_disable */
+    napi_enable(&priv->napi);
+
+    /* fill rx buffers, start rx/tx activity, set coalescing */
+    if( mv_eth_start_internals( priv, dev->mtu) != 0 ) {
+        printk( KERN_ERR "%s: start internals failed\n", dev->name );
+        goto error;
+    }
+    mv_eth_restart_autoneg( priv->port );
+
+    if(priv->timer_flag == 0)
+    {
+        priv->timer.expires = jiffies + ((HZ*CONFIG_MV_ETH_TIMER_PERIOD)/1000); /*ms*/
+        add_timer( &priv->timer );
+        priv->timer_flag = 1;
+    }
+
+    /* connect to port interrupt line */
+    if( request_irq( dev->irq, mv_eth_interrupt_handler,
+        (IRQF_DISABLED | IRQF_SAMPLE_RANDOM), "mv_ethernet", priv) ) {
+        printk( KERN_ERR "cannot assign irq%d to %s port%d\n", dev->irq, dev->name, priv->port );
+        dev->irq = 0;
+    	goto error;
+    }
+
+    mv_eth_unmask_interrupts(priv);
+
+    ETH_DBG( ETH_DBG_LOAD, ("%s: start ok\n", dev->name) );
+
+    printk( KERN_NOTICE "%s: started\n", dev->name );
+
+    return 0;
+
+ error:
+
+    if( dev->irq != 0 )
+    {
+        free_irq( dev->irq, priv );
+    }
+
+    printk( KERN_ERR "%s: start failed\n", dev->name );
+    return -1;
+}
+
+/*********************************************************** 
+ * mv_eth_stop --                                       *
+ *   stop interface with linux core. stop port activity.   *
+ *   free skb's from rings.                                *
+ ***********************************************************/
+int mv_eth_stop( struct net_device *dev )
+{
+    unsigned long   flags;
+    mv_eth_priv     *priv = MV_ETH_PRIV(dev);
+
+    /* first make sure that the port finished its Rx polling - see tg3 */
+    /* otherwise it may cause issue in SMP, one CPU is here and the other is doing the polling
+    and both of it are messing with the descriptors rings!! */
+    napi_disable(&priv->napi);
+
+    spin_lock_irqsave( priv->lock, flags);
+
+    /* stop upper layer */
+    netif_carrier_off(dev);
+    netif_stop_queue(dev);
+
+    /* stop tx/rx activity, mask all interrupts, relese skb in rings,*/
+    mv_eth_stop_internals(priv);
+    
+    spin_unlock_irqrestore(priv->lock, flags);
+
+    if(dev->irq != 0)
+    {
+        free_irq(dev->irq, priv);
+    }
+
+    if(priv->timer_flag == 1)
+    {
+        del_timer( &priv->timer );
+        priv->timer_flag = 0;
+    }
+
+    printk( KERN_NOTICE "%s: stopped\n", dev->name );
+
+    return 0;
+}
+
+
+int mv_eth_change_mtu( struct net_device *dev, int mtu )
+{
+    int old_mtu = dev->mtu;
+
+    if(!netif_running(dev)) {
+    	if(mv_eth_change_mtu_internals(dev, mtu) == -1) {
+            goto error;
+    }
+        printk( KERN_NOTICE "%s: change mtu %d (buffer-size %d) to %d (buffer-size %d)\n",
+                dev->name, old_mtu, MV_RX_BUF_SIZE( old_mtu), 
+                dev->mtu, MV_RX_BUF_SIZE( dev->mtu) );
+        return 0;
+    }
+
+    if( mv_eth_stop( dev )) {
+        printk( KERN_ERR "%s: stop interface failed\n", dev->name );
+        goto error;
+    }
+
+    if(mv_eth_change_mtu_internals(dev, mtu) == -1) {
+        goto error;
+    }
+
+    if(mv_eth_start( dev )) {
+        printk( KERN_ERR "%s: start interface failed\n", dev->name );
+        goto error;
+    } 
+    printk( KERN_NOTICE "%s: change mtu %d (buffer-size %d) to %d (buffer-size %d)\n",
+                dev->name, old_mtu, MV_RX_BUF_SIZE(old_mtu), dev->mtu, 
+                MV_RX_BUF_SIZE(dev->mtu));
+ 
+    return 0;
+
+ error:
+    printk( "%s: change mtu failed\n", dev->name );
+    return -1;
+}
+
+/*********************************************************** 
+ * eth_set_mac_addr --                                   *
+ *   stop port activity. set new addr in device and hw.    *
+ *   restart port activity.                                *
+ ***********************************************************/
+static int mv_eth_set_mac_addr_internals(struct net_device *dev, void *addr )
+{
+    mv_eth_priv *priv = MV_ETH_PRIV(dev);
+    u8          *mac = &(((u8*)addr)[2]);  /* skip on first 2B (ether HW addr type) */
+    int i;
+
+    /* remove previous address table entry */
+    if( mvEthMacAddrSet( priv->hal_priv, dev->dev_addr, -1) != MV_OK ) {
+        printk( KERN_ERR "%s: ethSetMacAddr failed\n", dev->name );
+        return -1;
+    }
+
+    /* set new addr in hw */
+    if( mvEthMacAddrSet( priv->hal_priv, mac, ETH_DEF_RXQ) != MV_OK ) {
+        printk( KERN_ERR "%s: ethSetMacAddr failed\n", dev->name );
+    return -1;
+    }
+
+    /* set addr in the device */ 
+    for( i = 0; i < 6; i++ )
+        dev->dev_addr[i] = mac[i];
+
+    printk( KERN_NOTICE "%s: mac address changed\n", dev->name );
+
+    return 0;
+}
+
+/***********************************************************
+ * eth_set_multicast_list --                             *
+ *   Add multicast addresses or set promiscuous mode.      *
+ *   This function should have been but was not included   *
+ *   by Marvell. -bbozarth                                 *
+ ***********************************************************/
+void mv_eth_set_multicast_list(struct net_device *dev) {
+
+     mv_eth_priv        *priv = MV_ETH_PRIV(dev);
+     int                queue = ETH_DEF_RXQ;
+     struct dev_mc_list *curr_addr = dev->mc_list;
+     int                i;
+
+     if (dev->flags & IFF_PROMISC)
+     {
+        mvEthRxFilterModeSet(priv->hal_priv, 1);
+     }
+     else if (dev->flags & IFF_ALLMULTI)
+     {
+        mvEthRxFilterModeSet(priv->hal_priv, 0);
+        mvEthMacAddrSet(priv->hal_priv, dev->dev_addr, queue);
+        mvEthSetSpecialMcastTable(priv->port, queue);
+        mvEthSetOtherMcastTable(priv->port, queue);
+     }
+     else if (dev->mc_count)
+     {
+        mvEthRxFilterModeSet(priv->hal_priv, 0);
+        mvEthMacAddrSet(priv->hal_priv, dev->dev_addr, queue);
+        for (i=0; i<dev->mc_count; i++, curr_addr = curr_addr->next)
+        {
+            if (!curr_addr)
+                break;
+            mvEthMcastAddrSet(priv->hal_priv, curr_addr->dmi_addr, queue);
+        }
+     }
+     else /* No Mcast addrs, not promisc or all multi - clear tables */
+     {
+        mvEthRxFilterModeSet(priv->hal_priv, 0);
+        mvEthMacAddrSet(priv->hal_priv, dev->dev_addr, queue);
+     }
+}
+
+
+int     mv_eth_set_mac_addr( struct net_device *dev, void *addr )
+{
+    if(!netif_running(dev)) {
+        if(mv_eth_set_mac_addr_internals(dev, addr) == -1)
+            goto error;
+        return 0;
+    }
+
+    if( mv_eth_stop( dev )) {
+        printk( KERN_ERR "%s: stop interface failed\n", dev->name );
+        goto error;
+    }
+
+    if(mv_eth_set_mac_addr_internals(dev, addr) == -1)
+        goto error;
+
+    if(mv_eth_start( dev )) {
+        printk( KERN_ERR "%s: start interface failed\n", dev->name );
+    goto error;
+    } 
+
+    return 0;
+
+ error:
+    printk( "%s: set mac addr failed\n", dev->name );
+    return -1;
+}
+
+
+/************************************************************ 
+ * mv_eth_open -- Restore MAC address and call to   *
+ *                mv_eth_start                               *
+ ************************************************************/
+int mv_eth_open( struct net_device *dev )
+{
+    mv_eth_priv	*priv = MV_ETH_PRIV(dev);
+    int         queue = ETH_DEF_RXQ;
+
+    if( mvEthMacAddrSet( priv->hal_priv, dev->dev_addr, queue) != MV_OK ) {
+        printk( KERN_ERR "%s: ethSetMacAddr failed\n", dev->name );
+        return -1;
+    }
+
+    if(mv_eth_start( dev )){
+        printk( KERN_ERR "%s: start interface failed\n", dev->name );
+        return -1;
+    } 
+    return 0;
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_network/mv_ethernet/mv_eth_addr_dec.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_network/mv_ethernet/mv_eth_addr_dec.c
@@ -0,0 +1,120 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+*******************************************************************************/
+
+
+
+#include "mvCommon.h"  /* Should be included before mvSysHwConfig */
+#include "mvOs.h"
+#include <linux/kernel.h>
+#include <linux/version.h>
+#include <linux/platform_device.h>
+#include <plat/mv_eth.h>
+
+#include "eth/mvEth.h"
+#include "eth-phy/mvEthPhy.h"
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)
+
+/*
+** Address decoding driver.
+*/
+
+static void mv_eth_set_port_addr_dec(int port, struct mbus_dram_target_info *dram)
+{
+	int i;
+	u32 win_enable;
+	u32 win_protect;
+
+	for (i = 0; i < ETH_MAX_DECODE_WIN; i++) {
+		MV_REG_WRITE(ETH_WIN_BASE_REG(port,i),0);
+		MV_REG_WRITE(ETH_WIN_SIZE_REG(port,i),0);
+		if (i < ETH_MAX_HIGH_ADDR_REMAP_WIN)
+			MV_REG_WRITE(ETH_WIN_REMAP_REG(port,i),0);
+	}
+
+	win_enable = 0x3f;
+	win_protect = 0;
+
+	for (i = 0; i < dram->num_cs; i++) {
+		struct mbus_dram_window *cs = dram->cs + i;
+		
+		MV_REG_WRITE(ETH_WIN_BASE_REG(port,i),(cs->base & 0xffff0000) |
+				(cs->mbus_attr << 8) | dram->mbus_dram_target_id);
+		MV_REG_WRITE(ETH_WIN_SIZE_REG(port,i),(cs->size - 1) & 0xffff0000);
+
+		win_enable &= ~(1 << i);
+		win_protect |= 3 << (2 * i);
+	}
+	MV_REG_WRITE(ETH_BASE_ADDR_ENABLE_REG(port), win_enable);
+
+	return;
+}
+
+static int mv_eth_addr_dec_probe(struct platform_device *pdev)
+{
+	struct mv_eth_addr_dec_platform_data *pd = pdev->dev.platform_data;
+	int port = pdev->id;
+
+	mv_eth_set_port_addr_dec(port, pd->dram);
+
+	return 0;
+}
+
+static int mv_eth_addr_dec_remove(struct platform_device *pdev)
+{
+	return 0;
+}
+
+static struct platform_driver mv_eth_addr_dec_driver = {
+	.probe		= mv_eth_addr_dec_probe,
+	.remove		= mv_eth_addr_dec_remove,
+	.driver = {
+		.name	= MV_ETH_ADDR_DEC_NAME,
+		.owner	= THIS_MODULE,
+	},
+};
+
+static int __init mv_eth_addr_dec_init_module(void)
+{
+	int rc;
+
+	rc = platform_driver_register(&mv_eth_addr_dec_driver);
+
+	return rc;
+}
+module_init(mv_eth_addr_dec_init_module);
+
+static void __exit mv_eth_addr_dec_cleanup_module(void)
+{
+	platform_driver_unregister(&mv_eth_addr_dec_driver);
+}
+module_exit(mv_eth_addr_dec_cleanup_module);
+
+MODULE_ALIAS("platform:" MV_ETH_ADDR_DEC_NAME);
+
+#endif /* 2.6.26 */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_tsu/mv_tsu.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_tsu/mv_tsu.h
@@ -0,0 +1,49 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+*******************************************************************************/
+
+#ifndef __MV_TSU_H__
+#define __MV_TSU_H__
+
+
+#define MV_TSU_MAJOR		MV_TS_MAJOR
+
+#define TSU_DFLT_AGGR_MODE 	MV_TSU_AGGR_MODE_DISABLED
+#define TSU_DFLT_TMSTMP_OFFS	4
+#define TSU_DFLT_AGGR_PCKT_NUM	1
+#define TSU_DFLT_TS_DESC_NUM	64
+#define TSU_DFLT_TS_DONEQ_NUM	TSU_DFLT_TS_DESC_NUM * TSU_DFLT_AGGR_PCKT_NUM
+#define TSU_DFLT_DATA_READ_AT_ONCE	0
+#define TSU_DFLT_CLOCK_RATE	20000000
+
+
+#define TSU_DFLT_INT_MASK	(TSU_INT_TS_IF_ERROR |		\
+                                 TSU_INT_FIFO_OVFL_ERROR |	\
+                                 TSU_INT_TS_CONN_ERROR |	\
+                                 TSU_INT_CLOCK_SYNC_EXP | 0x7F)
+
+#endif /* __MV_TSU_H__ */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_tsu/mv_tsu_ioctl.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_tsu/mv_tsu_ioctl.h
@@ -0,0 +1,78 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+*******************************************************************************/
+
+#ifndef __MV_TSU_IOCTL_H__
+#define __MV_TSU_IOCTL_H__
+
+#define TSU_STATUS_ERROR_GET(status)		((status >> 28) & 0x1)
+#define TSU_STATUS_ERROR_SET(status)		(status = status | (0x1 << 28))
+#define TSU_STATUS_TMSSTMP_GET(status)		(status & 0xFFFFFFF)
+#define TSU_STATUS_TMSSTMP_SET(status,tms)	(status = status | (tms & 0xFFFFFFF))
+
+struct tsu_tmstmp_info {
+	unsigned int timestamp;
+	unsigned char enable_tms;
+};
+
+
+enum tsu_aggr_mode {
+	aggrModeDisabled,
+	aggrMode1,
+	aggrMode2
+};
+
+struct tsu_buff_info {
+	enum tsu_aggr_mode aggr_mode;
+	unsigned char aggr_mode2_tmstmp_off;
+	unsigned char aggr_num_packets;
+
+	unsigned int num_ts_desc;
+	unsigned int num_done_q_entries;
+	int pkt_size;
+};
+
+
+struct tsu_stat {
+	unsigned int ts_if_err;
+	unsigned int fifo_ovfl;
+	unsigned int ts_conn_err;
+	unsigned int clk_sync_exp;
+};
+
+
+#define MVTSU_IOC_MAGIC  'T'
+
+#define MVTSU_IOCFREQSET	_IOW(MVTSU_IOC_MAGIC,1, unsigned int)
+#define MVTSU_IOCTXTMSSET	_IOW(MVTSU_IOC_MAGIC,2, struct tsu_tmstmp_info)
+#define MVTSU_IOCTXDONE		_IO(MVTSU_IOC_MAGIC,3)
+#define MVTSU_IOCRDPKTATONCE	_IOW(MVTSU_IOC_MAGIC,4, unsigned int)
+#define MVTSU_IOCBUFFPARAMGET	_IOR(MVTSU_IOC_MAGIC,5, struct tsu_buff_info)
+#define MVTSU_IOCGETSTAT	_IOR(MVTSU_IOC_MAGIC,6, struct tsu_stat)
+#define MVTSU_IOCCLEARSTAT	_IO(MVTSU_IOC_MAGIC,7)
+
+#endif /* __MV_TSU_IOCTL_H__ */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_tsu/Kconfig
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_tsu/Kconfig
@@ -0,0 +1,63 @@
+menu "TSU options"
+	depends on MV_INCLUDE_TS
+
+config  MV_TSU
+	bool "Support for Marvell Transport Stream Interface"
+#	depends on MV_INCLUDE_TS
+	default n
+choice
+	prompt "TSU interface type"
+	depends on MV_TSU
+	default TSU_SERIAL_IF
+
+config TSU_SERIAL_IF
+	bool "Serial Interface"
+	---help---
+	The TSU will work in serial mode (2 ports).
+	
+config TSU_PARALLEL_IF
+	bool "Parallel Interface"
+	---help---
+	The TSU will work in parallel mode (1 port).
+endchoice
+
+
+choice
+	prompt "TSU Core-Clock"
+	depends on MV_TSU
+	default TSU_CORE_CLK_83MHZ
+
+config TSU_CORE_CLK_71MHZ
+	bool "71 MHz TSU Core Clock"
+
+config TSU_CORE_CLK_83MHZ
+	bool "83 MHz TSU Core Clock"
+
+config TSU_CORE_CLK_91MHZ
+	bool "91 MHz TSU Core Clock"
+config TSU_CORE_CLK_100MHZ
+	bool "100 MHz TSU Core Clock"
+
+endchoice
+
+config  MV_TSU_PKT_SIZE
+        int "TSU packet size"
+        depends on MV_TSU
+	default 188
+	range 188, 256
+        ---help---
+          Define the TS packet size to be used (Same for both ports)
+	  Must be >= 188 and <= 256.
+
+config  MV_TSU_PROC
+	bool "Support for TSU proc interface"
+	depends on MV_TSU
+	default y
+        ---help---
+          Support Proc-fs interface to configuring the TS control driver.
+
+endmenu
+
+	  
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_tsu/mv_tsu.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_tsu/mv_tsu.c
@@ -0,0 +1,1513 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+*******************************************************************************/
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/types.h>
+#include <linux/proc_fs.h>
+#include <linux/cdev.h>
+
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "ctrlEnv/sys/mvSysTs.h"
+#include "ts/mvTsu.h"
+#include "mv_tsu_ioctl.h"
+#include "mv_tsu.h"
+
+/*
+ * Local Macros and Definiions.
+ */
+#undef TSU_DEBUG
+//#define TSU_DEBUG
+#define TSU_DBG_OFF     0x00
+#define TSU_DBG_INIT    0x01
+#define TSU_DBG_OPEN    0x02
+#define TSU_DBG_RELEASE 0x04
+#define TSU_DBG_READ 	0x08
+#define TSU_DBG_WRITE 	0x10
+#define TSU_DBG_IOCTL 	0x20
+#define TSU_DBG_PROC    0x40
+#define TSU_DBG_INT     0x80
+#define TSU_DBG_ALL     0xFFFFFFFF
+
+#ifdef TSU_DEBUG
+static u32 mvtsu_dbg = TSU_DBG_READ;
+#define TSU_DPRINT(f, x) if((mvtsu_dbg & (f)) == (f)) printk x
+#else
+#define TSU_DPRINT(f, x)
+#endif
+#define TSU_ENTER(f, fname)	TSU_DPRINT(f, ("Entering " fname "()\n"))
+#define TSU_LEAVE(f, fname)	TSU_DPRINT(f, ("Leaving " fname "()\n"))
+
+#define TSU_UNCACHED_DATA_BUFFERS
+
+#define TSU_DATA_BUFF_HW_2_SW(buf)      (((MV_U32)(buf)) & ~(TSU_DMA_ALIGN - 1))
+
+#define TSU_IS_DEC_DIGIT(c)	(((c) >= '0') && ((c) <= '9'))
+
+#define TSU_DEV_NAME "tsu"
+#define TSU_NUM_DEVICES	2
+#ifdef CONFIG_TSU_SERIAL_IF
+#define DEF_TSU_MODE TSU_MODE_SERIAL
+#else
+#define DEF_TSU_MODE TSU_MODE_PARALLEL
+#endif
+
+#if defined(CONFIG_TSU_CORE_CLK_71MHZ)
+#define DEF_TSU_CORE_CLOCK TSU_CORE_CLK_71_MHZ
+#elif defined(CONFIG_TSU_CORE_CLK_83MHZ)
+#define DEF_TSU_CORE_CLOCK TSU_CORE_CLK_83_MHZ
+#elif defined(CONFIG_TSU_CORE_CLK_91MHZ)
+#define DEF_TSU_CORE_CLOCK TSU_CORE_CLK_91_MHZ
+#elif defined(CONFIG_TSU_CORE_CLK_100MHZ)
+#define DEF_TSU_CORE_CLOCK TSU_CORE_CLK_100_MHZ
+#endif
+
+#define TSU_MIN_READ_SIZE	8
+
+/*
+ * Local data-structures.
+ */
+struct mvtsu_dev {
+	u8 port;
+	struct cdev cdev;
+	MV_TSU_BUFF_INFO buff_info;
+	MV_TSU_PORT_DIRECTION port_dir;
+	u32 valid_data_size;	/* Size of data in HW buffers.		*/
+	u32 rd_rw_data_size;	/* Size of buffer for read / write.	*/
+	u8 *data_buff;
+	u32 *stat_buff;
+	u32 stat_buff_size;
+	u32 data_offs;
+	u32 buff_handle;
+	u8 read_all_at_once;
+	u32 clockrate;
+	u32 rd_wr_timeout;
+	spinlock_t lock;
+	struct tsu_stat int_stat;
+};
+
+
+/*
+ * Local control variables.
+ */
+static MV_TSU_PORTS_MODE cfg_tsu_mode;
+static MV_TSU_CORE_CLOCK cfg_core_clk;
+static int cfg_pkt_size;
+static struct mvtsu_dev mvtsu_devs[TSU_NUM_DEVICES];
+static dev_t mvtsu_device;
+char *mvtsu_cmdline;
+
+int mvtsu_cmdline_config(char *s);
+static int mvtsu_parse_cmdline(void);
+__setup("mv_tsu_config=", mvtsu_cmdline_config);
+
+#ifdef CONFIG_MV_TSU_PROC
+static struct proc_dir_entry *mvtsu_proc_entry;
+
+static int mvtsu_proc_init(void);
+#endif /* CONFIG_MV_TSU_PROC */
+
+void mvtsu_dump_regs(int port)
+{
+	int i;
+
+	for(i = 0x0; i <= 0x68; i+=4) {
+		printk("Reg 0x%08x --> 0x%08x.\n",TSU_REG_BASE(port) + i,
+		       MV_REG_READ(TSU_REG_BASE(port) + i));
+	}
+	return;
+}
+
+
+static void mvtsu_rd_wr_timeout_calc(struct mvtsu_dev *dev)
+{
+	dev->rd_wr_timeout = 0;
+	if(dev->clockrate >= 1000) {
+		/* How much time (in milisec) is needed for a single 	*/
+		/* block of data.					*/
+		printk("dev->valid_data_size - %d, dev->clockrate - %d.\n",
+		       dev->valid_data_size,dev->clockrate);
+		dev->rd_wr_timeout = ((dev->valid_data_size * 8) /
+				      (dev->clockrate / 1000));
+//		dev->rd_wr_timeout = ((dev->valid_data_size * 8) /
+//				      (dev->clockrate / 1000) + 100);
+	}
+//	if(!dev->rd_wr_timeout)
+//		dev->rd_wr_timeout = 500; /* 1/2 sec */
+	/* Double the timeout to be on the safe side.	*/
+	dev->rd_wr_timeout *= 2;
+	printk("dev->rd_wr_timeout = %d.\n",dev->rd_wr_timeout);
+	return;
+}
+
+
+static void mvtsu_set_defaults(struct mvtsu_dev *dev)
+{
+	TSU_ENTER(TSU_DBG_INIT, "mvtsu_set_defaults");
+
+	dev->buff_info.aggrMode = TSU_DFLT_AGGR_MODE;
+	dev->buff_info.aggrMode2TmstmpOff = TSU_DFLT_TMSTMP_OFFS;
+	dev->buff_info.aggrNumPackets = TSU_DFLT_AGGR_PCKT_NUM;
+	dev->buff_info.numTsDesc = TSU_DFLT_TS_DESC_NUM;
+	dev->buff_info.numDoneQEntry = TSU_DFLT_TS_DONEQ_NUM;
+	dev->buff_info.tsDataBuff = NULL;
+	dev->buff_info.tsDoneBuff = NULL;
+	dev->buff_info.dataBlockSize = 0;
+
+	dev->read_all_at_once = TSU_DFLT_DATA_READ_AT_ONCE;
+	dev->clockrate = TSU_DFLT_CLOCK_RATE;
+
+	TSU_LEAVE(TSU_DBG_INIT, "mvtsu_set_defaults");
+	return;
+}
+
+static irqreturn_t mvtsu_interrupt_handler(int irq , void *arg)
+{
+	struct mvtsu_dev* dev = (struct mvtsu_dev*)arg;
+	u32 cause;
+
+	TSU_ENTER(TSU_DBG_INT, "mvtsu_interrupt_handler");
+
+	cause = MV_REG_READ(MV_TSU_INTERRUPT_SRC_REG(dev->port));
+	TSU_DPRINT(TSU_DBG_INT, ("\tPort %d, Cause = 0x%08x.\n",dev->port,cause));
+
+	if(cause & TSU_INT_TS_IF_ERROR)
+		dev->int_stat.ts_if_err++;
+	if(cause & TSU_INT_FIFO_OVFL_ERROR)
+		dev->int_stat.fifo_ovfl++;
+	if(cause & TSU_INT_TS_CONN_ERROR)
+		dev->int_stat.ts_conn_err++;
+	if(cause & TSU_INT_CLOCK_SYNC_EXP)
+		dev->int_stat.clk_sync_exp++;
+        
+	TSU_LEAVE(TSU_DBG_INT, "mvtsu_interrupt_handler");
+	return IRQ_HANDLED;
+}
+
+int g_tx_cnt = 0;
+int mvtsu_open (struct inode *inode, struct file *filp)
+{
+	struct mvtsu_dev *dev;
+	MV_TSU_PORT_CONFIG port_cfg;
+	MV_TSU_BUFF_INFO *binfo = NULL;
+	MV_STATUS status;
+	int result = 0;
+	int stat_size = 0;
+	int data_size = 0;
+	int data_buff_offs;
+
+	TSU_ENTER(TSU_DBG_OPEN, "mvtsu_open");
+
+	if(MV_FALSE == mvCtrlPwrClckGet(TS_UNIT_ID, 0)) {
+		printk("Transport Stream interface is powered off.\n");
+		return 0;
+	}
+
+	g_tx_cnt = 0;
+	/*  Find the device structure.	*/
+	dev = container_of(inode->i_cdev, struct mvtsu_dev, cdev);
+
+    	/* Determine the port direction according to the read / write flag.*/
+	if ((filp->f_mode & (FMODE_WRITE | FMODE_READ)) == FMODE_WRITE) {
+		port_cfg.portDir = TSU_PORT_OUTPUT;
+	} else if ((filp->f_mode & (FMODE_WRITE | FMODE_READ)) == FMODE_READ) {
+		port_cfg.portDir = TSU_PORT_INPUT;
+	} else {
+		result = -EINVAL;
+		goto fail_init;
+	}
+
+	/* Reset the port.		*/
+	mvTsuPortReset(dev->port);
+#if 0
+#warning "TEMPORARY: Configure TSU to loopback mode.\n"
+	MV_REG_WRITE(0xB803C,0x2);
+	MV_REG_WRITE(0xB883C,0x2);
+#endif /* 0 */
+	/* Initialize the port.		*/
+	port_cfg.pktSize = cfg_pkt_size;
+       	status = mvTsuPortInit(dev->port,&port_cfg);
+	if(status != MV_OK) {
+		result = -EINVAL;
+		goto fail_init;
+	}
+
+	TSU_DPRINT(TSU_DBG_OPEN, ("\tTSU unit initialized successfully.\n"));
+
+	/* Initialize the port buffers.	*/
+	binfo = &dev->buff_info;
+	switch(binfo->aggrMode)
+	{
+	case (MV_TSU_AGGR_MODE_DISABLED):
+		binfo->dataBlockSize = port_cfg.pktSize;
+		dev->valid_data_size = port_cfg.pktSize;
+		dev->rd_rw_data_size = binfo->dataBlockSize + TSU_DONE_STATUS_ENTRY_SIZE;
+		binfo->aggrNumPackets = 1;
+		break;
+	case (MV_TSU_AGGR_MODE_1):
+		binfo->dataBlockSize = port_cfg.pktSize * binfo->aggrNumPackets;
+		if(port_cfg.portDir == TSU_PORT_OUTPUT) {
+			binfo->dataBlockSize += MV_MAX(TSU_DMA_ALIGN,TSU_MODE1_OUT_TMS_SIZE);
+			dev->rd_rw_data_size = binfo->dataBlockSize;
+		}
+		else {
+			dev->rd_rw_data_size = binfo->dataBlockSize + 
+				(binfo->aggrNumPackets * TSU_DONE_STATUS_ENTRY_SIZE);
+		}
+		dev->valid_data_size = port_cfg.pktSize * binfo->aggrNumPackets;
+		break;
+	case (MV_TSU_AGGR_MODE_2):
+		binfo->aggrMode2TmstmpOff = TSU_DMA_ALIGN - 
+			(port_cfg.pktSize & (TSU_DMA_ALIGN - 1)); 
+		binfo->dataBlockSize =
+			(binfo->aggrNumPackets * 
+			 (port_cfg.pktSize + binfo->aggrMode2TmstmpOff) + 
+			 TSU_DMA_ALIGN);
+		dev->valid_data_size = (binfo->aggrNumPackets * 
+					(port_cfg.pktSize + binfo->aggrMode2TmstmpOff));
+		dev->rd_rw_data_size = dev->valid_data_size;
+	default:
+		break;
+	}
+
+	dev->port_dir = port_cfg.portDir;
+
+	/* Align the data block size to a cache line.	*/
+	binfo->dataBlockSize = MV_ALIGN_UP(binfo->dataBlockSize,32);
+	data_size = binfo->dataBlockSize * binfo->numTsDesc;
+	printk("aggrMode2TmstmpOff = %d, dataBlockSize = %d\n",
+	       binfo->aggrMode2TmstmpOff,binfo->dataBlockSize);
+#ifdef TSU_UNCACHED_DATA_BUFFERS
+	binfo->tsDataBuff = 
+		mvOsIoUncachedMalloc(NULL,data_size,(MV_ULONG*)(&binfo->tsDataBuffPhys),
+				     NULL);
+#else 
+	binfo->tsDataBuff = 
+		mvOsIoCachedMalloc(NULL,data_size,(MV_ULONG*)(&binfo->tsDataBuffPhys),
+				   NULL);
+#endif /* TSU_UNCACHED_DATA_BUFFERS */
+	if(binfo->tsDataBuff == NULL) {
+		result = -ENOMEM;
+		goto fail_init;
+	}
+	memset(binfo->tsDataBuff,0x88,data_size);
+#ifndef TSU_UNCACHED_DATA_BUFFERS
+	mvOsCacheClear(NULL,(MV_U32*)TSU_DATA_BUFF_HW_2_SW(binfo->tsDataBuff),
+		       data_size);
+#endif /* TSU_UNCACHED_DATA_BUFFERS */
+
+	/* Align tsDataBuff according to the HW limitation.	*/
+	if(binfo->aggrMode == MV_TSU_AGGR_MODE_2) {
+		data_buff_offs = port_cfg.pktSize & (TSU_DMA_ALIGN - 1);
+	}
+	else if((binfo->aggrMode == MV_TSU_AGGR_MODE_1) &&
+		(port_cfg.portDir == TSU_PORT_OUTPUT)) {
+        	data_buff_offs = TSU_DMA_ALIGN - TSU_MODE1_OUT_TMS_SIZE;
+	}
+	else {
+		data_buff_offs = 0;
+	}
+	printk("data_buff_offs = %d.\n",data_buff_offs);
+
+	binfo->tsDataBuff = (MV_U32*)((MV_U32)binfo->tsDataBuff + data_buff_offs);
+	binfo->tsDataBuffPhys += data_buff_offs;
+
+	TSU_DPRINT(TSU_DBG_OPEN, ("\tTSU Data buffer allocated successfully "
+				  "(%p, %d).\n",binfo->tsDataBuff, data_size));
+	/* Allocate memory for done queue.	*/
+	stat_size = TSU_DONE_STATUS_ENTRY_SIZE * binfo->numDoneQEntry;
+	dev->stat_buff_size = stat_size;
+	binfo->tsDoneBuff =
+		mvOsIoUncachedMalloc(NULL,stat_size,
+				     (MV_ULONG*)(&binfo->tsDoneBuffPhys),NULL);
+	if(binfo->tsDoneBuff == NULL) {
+		result = -ENOMEM;
+		goto fail_init;
+	}
+
+	TSU_DPRINT(TSU_DBG_OPEN, ("\tTSU Done buffer allocated successfully"
+				  "(%p, %d).\n",binfo->tsDoneBuff, stat_size));
+
+	status = mvTsuBuffersInit(dev->port,&dev->buff_info);
+	if(status != MV_OK) {
+		TSU_DPRINT(TSU_DBG_OPEN, ("\tmvTsuBuffersInit() Failed (%d).",
+					  status));
+		result = -EINVAL;
+		goto fail_init;
+	}
+	TSU_DPRINT(TSU_DBG_OPEN, ("\tHAL Buffers initialized successfully.\n"));
+
+	mvtsu_rd_wr_timeout_calc(dev);
+
+	/* Register IRQ.	*/
+	MV_REG_WRITE(MV_TSU_INTERRUPT_MASK_REG(dev->port),TSU_DFLT_INT_MASK);
+	if(request_irq(IRQ_TS_INT(dev->port),mvtsu_interrupt_handler,
+		       IRQF_DISABLED | IRQF_SAMPLE_RANDOM,"tsu",dev)) {
+		printk(KERN_ERR "Cannot assign irq%d to TSU port%d\n",
+		       IRQ_TS_INT(dev->port), dev->port);
+		goto fail_init;
+	}
+	TSU_DPRINT(TSU_DBG_OPEN, ("\tTSU interrupt registered at IRQ %d.\n",
+				  IRQ_TS_INT(dev->port)));
+
+	if(port_cfg.portDir == TSU_PORT_INPUT) {
+		/* Enable Rx timestamp.	*/
+		mvTsuRxTimestampCntEn(dev->port,MV_TRUE);
+		mvTsuDmaWatermarkSet(dev->port,0x8);
+	}
+
+	/* Make the private_data hold the pointer to the device data.	*/
+	filp->private_data = dev;
+
+	TSU_LEAVE(TSU_DBG_OPEN, "mvtsu_open");
+	mvtsu_dump_regs(dev->port);
+	return 0;
+
+fail_init:
+	if(binfo != NULL) {
+		if(binfo->tsDataBuff != NULL)
+#ifdef TSU_UNCACHED_DATA_BUFFERS
+			mvOsIoUncachedFree(
+				NULL,data_size,
+				TSU_DATA_BUFF_HW_2_SW(binfo->tsDataBuffPhys),
+				(MV_U32*)TSU_DATA_BUFF_HW_2_SW(binfo->tsDataBuff),0);
+#else
+		mvOsIoCachedFree(
+			NULL,data_size,
+			TSU_DATA_BUFF_HW_2_SW(binfo->tsDataBuffPhys),
+			(MV_U32*)TSU_DATA_BUFF_HW_2_SW(binfo->tsDataBuff),0);
+#endif /* TSU_UNCACHED_DATA_BUFFERS */
+		if(binfo->tsDoneBuff != NULL)
+			mvOsIoUncachedFree(NULL,stat_size,binfo->tsDoneBuffPhys,
+					   binfo->tsDoneBuff,0);
+		binfo->tsDataBuff = NULL;
+		binfo->tsDoneBuff = NULL;
+	}
+	TSU_LEAVE(TSU_DBG_OPEN, "mvtsu_open");
+	return result;
+}
+
+
+int mvtsu_release (struct inode *inode, struct file *filp)
+{
+	struct mvtsu_dev *dev = (struct mvtsu_dev*)filp->private_data;
+	MV_TSU_BUFF_INFO *binfo;
+	int size;
+
+	TSU_ENTER(TSU_DBG_RELEASE, "mvtsu_release");
+
+	free_irq(IRQ_TS_INT(dev->port),dev);
+
+	if(dev->port_dir == TSU_PORT_INPUT) {
+		/* Stop Rx timestamp.	*/
+		mvTsuRxTimestampCntEn(dev->port,MV_FALSE);
+	}
+
+	/* Shutdown the port.		*/
+	mvTsuPortShutdown(dev->port);
+
+	/* Clear interrupt mask.	*/
+	MV_REG_WRITE(MV_TSU_INTERRUPT_MASK_REG(dev->port),0);
+
+	/* Free previously allocated buffers.	*/
+	binfo = &dev->buff_info;
+	if(binfo->tsDataBuff != NULL) {
+		size = binfo->dataBlockSize * binfo->numTsDesc;
+#ifdef TSU_UNCACHED_DATA_BUFFERS
+		mvOsIoUncachedFree(NULL,size,
+				   TSU_DATA_BUFF_HW_2_SW(binfo->tsDataBuffPhys),
+				   (MV_U32*)TSU_DATA_BUFF_HW_2_SW(binfo->tsDataBuff),0);
+#else
+		mvOsIoCachedFree(NULL,size,
+				 TSU_DATA_BUFF_HW_2_SW(binfo->tsDataBuffPhys),
+				 (MV_U32*)TSU_DATA_BUFF_HW_2_SW(binfo->tsDataBuff),0);
+#endif /* TSU_UNCACHED_DATA_BUFFERS */
+	}
+	if(binfo->tsDoneBuff != NULL) {
+		mvOsIoUncachedFree(NULL,dev->stat_buff_size,binfo->tsDoneBuffPhys,
+				   binfo->tsDoneBuff,0);
+	}
+	binfo->tsDataBuff = NULL;
+	binfo->tsDoneBuff = NULL;
+
+	mvtsu_set_defaults(dev);
+
+	TSU_LEAVE(TSU_DBG_RELEASE, "mvtsu_release");
+	return 0;
+}
+
+
+/*
+ * Helper function for retrying read buffer requests.
+ * Assume that the device spinlock is held.
+ */
+static int mvtsu_next_rx_buff_get(struct file *filp, u32 **data_buff,
+				  u32 **stat_buff, u32 *buff_handle,
+				  unsigned long *flags)
+{
+	struct mvtsu_dev *dev = (struct mvtsu_dev*)filp->private_data;
+	int timeout = 0;
+	int cnt = 0;
+	MV_STATUS status;
+
+	timeout = (dev->rd_wr_timeout == 0) ? 2000000 : (dev->rd_wr_timeout + 100);
+
+	while(cnt < timeout) {
+		status = mvTsuRxNextBuffGet(dev->port,data_buff,stat_buff,
+					    buff_handle);
+		if(status != MV_OK) {
+			if(status != MV_NO_MORE)
+				return -EIO;
+		}
+		else {
+			break;
+		}
+		if (filp->f_flags & O_NONBLOCK)
+			break;
+
+		spin_unlock_irqrestore(&(dev->lock), *flags);
+		if(dev->rd_wr_timeout) {
+			msleep_interruptible(100);
+			cnt += 100;
+		} else {
+			udelay(10);
+			cnt += 10;
+		}
+		spin_lock_irqsave(&(dev->lock), *flags);
+	}
+	if(cnt >= timeout) {
+		printk(KERN_INFO "TSU: Read timeout.\n");
+		return -EAGAIN;
+	}
+	return 0;
+}
+
+
+/*
+ * Helper function for copying timestamp info to user buffer.
+ */
+inline static void mvtsu_rx_tmsstmp_copy(struct mvtsu_dev *dev, u32 *stat_buff,
+					 char *out_buff, int *buf_offs,
+					 int *buf_size)
+{
+	MV_U32 size;
+	MV_U32 all;
+	MV_U32 avail;
+
+	all = TSU_DONE_STATUS_ENTRY_SIZE * dev->buff_info.aggrNumPackets;
+	/* Calculate avilable data at end of buffer.	*/
+	avail = dev->stat_buff_size - 
+		((MV_U32)stat_buff - (MV_U32)dev->buff_info.tsDoneBuff);
+	if(avail < all)
+		size = avail;
+	else
+		size = all;
+
+	if(copy_to_user(out_buff,stat_buff,size))
+		panic("TSU: copy_to_user failed.");
+	avail = all - size;
+	if(avail != 0) {
+		if(copy_to_user(out_buff + size,dev->buff_info.tsDoneBuff,avail))
+			panic("TSU: copy_to_user failed.");
+	}
+
+	*buf_offs += all;
+	*buf_size -= all;
+        return;
+}
+
+/*
+ * TSU data read
+ */
+ssize_t mvtsu_read(struct file *filp, char __user *buf, size_t count,
+		   loff_t *f_pos)
+{
+	struct mvtsu_dev *dev = filp->private_data;
+	MV_U8 port = dev->port;
+	MV_U8 *data_buff;
+	MV_U32 size;
+	int status;
+	int buf_offs = 0;
+	unsigned long flags;
+
+	TSU_ENTER(TSU_DBG_READ, "mvtsu_read");
+	spin_lock_irqsave(&(dev->lock), flags);
+
+	if((dev->buff_info.aggrMode != MV_TSU_AGGR_MODE_2) &&
+	   (count < (TSU_DONE_STATUS_ENTRY_SIZE * dev->buff_info.aggrNumPackets))) {
+		printk(KERN_ERR "TSU: Read operations must be at least of size "
+				"%d",
+		       TSU_DONE_STATUS_ENTRY_SIZE * dev->buff_info.aggrNumPackets);
+		status = -EINVAL;
+		goto no_data;
+	}
+
+	if(dev->data_buff == NULL) {
+		TSU_DPRINT(TSU_DBG_READ, ("\tGet new data buffer..."));
+		status = mvtsu_next_rx_buff_get(filp,(MV_U32**)(&dev->data_buff),
+						&dev->stat_buff,
+						&dev->buff_handle,&flags);
+		if(status) {
+			TSU_DPRINT(TSU_DBG_READ, ("FAILED.\n"));
+			goto no_data;
+		}
+
+		TSU_DPRINT(TSU_DBG_READ, ("OK.\n"));
+		if(dev->buff_info.aggrMode != MV_TSU_AGGR_MODE_2)
+			/* Copy the timestamp before the packet's data.	*/
+			mvtsu_rx_tmsstmp_copy(dev,dev->stat_buff,buf,&buf_offs,
+					      &count);
+		dev->data_offs = 0;
+	}
+	data_buff = dev->data_buff;
+	size = dev->rd_rw_data_size - dev->data_offs;
+
+	if(dev->read_all_at_once && (size > count)) {
+		status = -EINVAL;
+		printk(KERN_INFO "TSU: Read buffer too small, "
+				 "(Read All At Once mode)");
+		goto no_data;
+	}
+
+        /* Valid data in data_buff.	*/
+	if(size < count)
+		count = size;
+	TSU_DPRINT(TSU_DBG_READ, ("\tCopy %d Bytes (%d, %p, %d).\n", count,
+				  buf_offs,data_buff,dev->data_offs));
+	if(copy_to_user(buf + buf_offs,data_buff + dev->data_offs,count))
+		panic("TSU: copy_to_user failed.");
+
+	dev->data_offs += count;
+	*f_pos += (count + buf_offs);
+
+	if(dev->data_offs == dev->valid_data_size) {
+		TSU_DPRINT(TSU_DBG_READ, ("\tFree RX buffer.\n"));
+		memset(dev->data_buff,0x88,dev->buff_info.dataBlockSize);
+#ifndef TSU_UNCACHED_DATA_BUFFERS
+		mvOsCacheClear(NULL,
+			       (MV_U32*)TSU_DATA_BUFF_HW_2_SW(dev->data_buff),
+			       dev->buff_info.dataBlockSize);
+#endif /* TSU_UNCACHED_DATA_BUFFERS */
+		status = mvTsuRxBuffFree(port,(MV_U32*)dev->data_buff,
+					 dev->stat_buff,dev->buff_handle);
+		if(status != MV_OK) {
+			panic("TSU: Error in state machine, mvTsuRxBuffFree() "
+			      "Failed.");
+		}
+		dev->data_buff = NULL;
+		dev->stat_buff = NULL;
+	}
+
+	spin_unlock_irqrestore(&(dev->lock), flags);
+        TSU_LEAVE(TSU_DBG_READ, "mvtsu_read");
+	return count + buf_offs;
+
+no_data:
+	spin_unlock_irqrestore(&(dev->lock), flags);
+	printk(KERN_DEBUG "TSU: Failed to read.\n");
+        TSU_LEAVE(TSU_DBG_READ, "mvtsu_read");
+	return status;
+}
+
+
+/*
+ * Helper function for retrying write buffer requests.
+  * Assume that the device spinlock is held.
+ */
+static int mvtsu_next_tx_buff_get(struct file *filp, u32 **data_buff,
+				  u32 *buff_handle, unsigned long *flags)
+{
+	struct mvtsu_dev *dev = (struct mvtsu_dev*)filp->private_data;
+	int timeout = 0;
+	int cnt = 0;
+	MV_STATUS status;
+
+	timeout = (dev->rd_wr_timeout == 0) ? 2000000 : (dev->rd_wr_timeout + 100);
+
+	while(cnt < timeout) {
+		status = mvTsuTxNextBuffGet(dev->port,data_buff,buff_handle);
+		if(status != MV_OK) {
+			if(status != MV_NO_MORE)
+				return -EIO;
+		}
+		else {
+			break;
+		}
+
+		if (filp->f_flags & O_NONBLOCK)
+			break;
+		spin_unlock_irqrestore(&(dev->lock), *flags);
+		if(dev->rd_wr_timeout) {
+			msleep_interruptible(100);
+			cnt += 100;
+		} else {
+			udelay(10);
+			cnt += 10;
+		}
+		spin_lock_irqsave(&(dev->lock), *flags);
+
+		cnt += 1;
+	}
+	if(cnt >= timeout) {
+		printk(KERN_INFO "TSU: Write timeout.\n");
+		return -EAGAIN;
+	}
+	return 0;
+}
+
+
+/*
+ * TSU data write
+ */
+ssize_t mvtsu_write (struct file *filp, const char __user *buf, size_t count,
+		     loff_t *f_pos)
+{
+	struct mvtsu_dev *dev = filp->private_data;
+	MV_U8 port = dev->port;
+	int status;
+	int buf_offs = 0;
+	MV_BOOL tsErr = MV_FALSE;
+	MV_U32 tms = 0;
+	MV_U32 data;
+	unsigned long flags;
+	size_t orig_cnt = count;
+
+	TSU_ENTER(TSU_DBG_WRITE, "mvtsu_write");
+	spin_lock_irqsave(&(dev->lock), flags);
+
+	if(count < dev->rd_rw_data_size) {
+		printk(KERN_ERR "TSU: Write operations must hold at least a "
+				"single data block of data(%d , %d)",
+		       dev->rd_rw_data_size, count);
+		status = -EINVAL;
+		goto no_tx;
+	}
+
+	TSU_DPRINT(TSU_DBG_WRITE, ("\tGet new data buffer..."));
+	status = mvtsu_next_tx_buff_get(filp,(MV_U32**)(&dev->data_buff),
+					&dev->buff_handle,&flags);
+	if(status) {
+		TSU_DPRINT(TSU_DBG_WRITE, ("FAILED.\n"));
+		goto no_tx;
+	}
+
+	TSU_DPRINT(TSU_DBG_WRITE, ("OK.\n"));
+
+	if(dev->buff_info.aggrMode == MV_TSU_AGGR_MODE_DISABLED) {
+		TSU_DPRINT(TSU_DBG_WRITE, ("\tGet timestamp info.\n"));
+                /* Copy the timestamp from the beginning of data buffer. */
+		if(copy_from_user(&data,buf,TSU_DONE_STATUS_ENTRY_SIZE)) 
+			panic("TSU: copy_to_user failed.");
+
+		tsErr = TSU_STATUS_ERROR_GET(data);
+		tms = TSU_STATUS_TMSSTMP_GET(data);
+		buf_offs = TSU_DONE_STATUS_ENTRY_SIZE;
+		count -= TSU_DONE_STATUS_ENTRY_SIZE;
+		TSU_DPRINT(TSU_DBG_WRITE, ("\tTimestamp = %d.\n",tms));
+	}
+
+	/* Valid data in data_buff.	*/
+	if(dev->valid_data_size < count)
+		count = dev->valid_data_size;
+
+	TSU_DPRINT(TSU_DBG_WRITE, ("\tCopy %d Bytes.\n", count));
+	if(g_tx_cnt < 65536)
+		if(copy_from_user(dev->data_buff, buf + buf_offs, count))
+			panic("TSU Write: copy_to_user failed.");
+	*f_pos += orig_cnt;
+
+	TSU_DPRINT(TSU_DBG_WRITE, ("\tFree TX buffer.\n"));
+#ifndef TSU_UNCACHED_DATA_BUFFERS
+	mvOsCacheFlush(NULL,(MV_U32*)TSU_DATA_BUFF_HW_2_SW(dev->data_buff),
+		       dev->buff_info.dataBlockSize);
+#endif /* TSU_UNCACHED_DATA_BUFFERS */
+
+	status = mvTsuTxBuffPut(port,(MV_U32*)dev->data_buff,tms,tsErr,
+				dev->buff_handle);
+	g_tx_cnt++;
+	if(status != MV_OK)
+		panic("TSU: Error in state machine, mvTsuTxBuffPut() Failed.");
+
+	spin_unlock_irqrestore(&(dev->lock), flags);
+	TSU_LEAVE(TSU_DBG_WRITE, "mvtsu_write");
+	return orig_cnt;
+
+no_tx:
+	spin_unlock_irqrestore(&(dev->lock), flags);
+	printk(KERN_DEBUG "TSU: Failed to write.\n");
+	TSU_LEAVE(TSU_DBG_WRITE, "mvtsu_write");
+	return status;
+}
+
+/*
+ * TSU ioctl()
+ */
+int mvtsu_ioctl (struct inode *inode, struct file *filp, unsigned int cmd,
+		 unsigned long arg)
+{
+	struct mvtsu_dev *dev = filp->private_data;
+	int ret = 0;
+	u32 val;
+	unsigned long flags;
+	MV_STATUS status = MV_OK;
+	struct tsu_tmstmp_info tms_info;
+	struct tsu_buff_info buf_info;
+
+	TSU_ENTER(TSU_DBG_IOCTL, "mvtsu_ioctl"); 
+	TSU_DPRINT(TSU_DBG_IOCTL, ("\targ = 0x%08x.\n",(unsigned int)arg));
+
+	spin_lock_irqsave(&(dev->lock), flags);
+	
+	switch(cmd) {
+	case MVTSU_IOCFREQSET:
+		get_user(val,(u32 __user *)arg);
+		TSU_DPRINT(TSU_DBG_IOCTL, ("\tFrequency set to %d.\n",val));
+		if(dev->port_dir == TSU_PORT_OUTPUT)
+			status = mvTsuTxClockFreqSet(dev->port,val,MV_FALSE);
+		if(status == MV_OK) {
+			dev->clockrate = val;
+			mvtsu_rd_wr_timeout_calc(dev);
+		} else {
+			ret = -EINVAL;
+		}
+		break;
+	case MVTSU_IOCTXTMSSET:
+		if(copy_from_user(&tms_info,(struct tsu_tmstmp_info*)arg,
+				  sizeof(tms_info)))
+			panic("TSU IOCTL: copy_from_user failed.\n");
+		TSU_DPRINT(TSU_DBG_IOCTL, ("\tTx timestamp set to (%d,%d).\n",
+					   tms_info.timestamp,
+					   tms_info.enable_tms));
+		status = mvTsuTxInitTimeStampSet(
+			dev->port, (tms_info.enable_tms ? MV_TRUE : MV_FALSE),
+			tms_info.timestamp);
+		if(status != MV_OK)
+			ret = -EINVAL;
+		break;
+	case MVTSU_IOCTXDONE:
+		TSU_DPRINT(TSU_DBG_IOCTL, ("\tTx Done.\n"));
+		if(mvTsuTxDone(dev->port) != MV_OK)
+			ret = -EINVAL;
+		break;
+	case MVTSU_IOCRDPKTATONCE:
+		TSU_DPRINT(TSU_DBG_IOCTL, ("\tRx Read Packet At Once.\n"));
+		get_user(val,(u32 __user *)arg);
+                dev->read_all_at_once = val;
+		break;
+	case MVTSU_IOCBUFFPARAMGET:
+		TSU_DPRINT(TSU_DBG_IOCTL, ("\tGet Buffer Params.\n"));
+		switch(dev->buff_info.aggrMode) {
+		case MV_TSU_AGGR_MODE_DISABLED:
+			buf_info.aggr_mode = aggrModeDisabled;
+			break;
+		case MV_TSU_AGGR_MODE_1:
+			buf_info.aggr_mode = aggrMode1;
+			break;
+		case MV_TSU_AGGR_MODE_2:
+			buf_info.aggr_mode = aggrMode2;
+			break;
+		default:
+			ret = -EINVAL;
+		}
+		buf_info.aggr_mode2_tmstmp_off = 
+			dev->buff_info.aggrMode2TmstmpOff;
+		buf_info.aggr_num_packets = 
+			dev->buff_info.aggrNumPackets;
+		buf_info.num_done_q_entries = 
+			dev->buff_info.numDoneQEntry;
+		buf_info.num_ts_desc = 
+			dev->buff_info.numTsDesc;
+		buf_info.pkt_size = cfg_pkt_size;
+
+		if(copy_to_user((struct tsu_buff_info*)arg,&buf_info,
+				sizeof(buf_info)))
+			panic("TSU IOCTL: copy_to_user failed.\n");
+		break;
+	case MVTSU_IOCGETSTAT:
+		TSU_DPRINT(TSU_DBG_IOCTL, ("\tGet Statistics.\n"));
+		if(copy_to_user((struct tsu_stat*)arg,&dev->int_stat,
+				sizeof(struct tsu_stat)))
+			panic("TSU IOCTL: copy_to_user failed.\n");
+		break;
+	case MVTSU_IOCCLEARSTAT:
+		TSU_DPRINT(TSU_DBG_IOCTL, ("\tClear Statistics.\n"));
+		memset(&(dev->int_stat),0,sizeof(dev->int_stat));
+		break;
+	default:
+		TSU_DPRINT(TSU_DBG_IOCTL, ("\tInvalid request.\n"));
+		ret = -EINVAL;
+	}
+
+	spin_unlock_irqrestore(&(dev->lock), flags);
+
+	TSU_LEAVE(TSU_DBG_IOCTL, "mvtsu_ioctl"); 
+	return ret;
+}
+
+
+#ifdef CONFIG_MV_TSU_PROC
+
+/* 	
+	Parameter		Port	Value		Possible Values
+
+	sync_detect		x	x		int
+	sync_loss		x	x		int
+	aggr_mode		x	x		(mode1 / mode2 / dis)
+	aggr_mode2_off		x	x		int
+	aggr_num_pckts		x	x		int
+	num_desc		x	x		int
+	num_done_queue		x	x		int
+	sync_sig		x	x		(dis / high / low)
+	valid_sig		x	x		(dis / high / low)
+	error_sig		x	x		(dis / high / low)
+	data_edge		x	x		(fall / rise)
+	data_order		x	x		(msb / lsb)
+	sync_act		x	x		(1 / 8)
+	clk_mode		x	x		(cont / gap)
+*/
+
+#define TSU_AGGR_MODE_2_STR(mode)					\
+	((mode == MV_TSU_AGGR_MODE_DISABLED) ? "dis" : 			\
+	 ((mode == MV_TSU_AGGR_MODE_1) ? "mode1" : "mode2"))
+
+#define TSU_SIGNAL_MODE_2_STR(mode)					\
+	((mode == TSU_SIGNAL_DIS) ? "dis" : 				\
+	 ((mode == TSU_SIGNAL_EN_ACT_LOW) ? "low" : "high"))
+
+#define TSU_STR_2_SIGNAL_MODE(mode,str)					\
+	{								\
+		if(!strncmp((str),"dis",3))				\
+			mode = TSU_SIGNAL_DIS;				\
+		else if(!strncmp((str),"low",3))			\
+			mode = TSU_SIGNAL_EN_ACT_LOW;			\
+		else if(!strncmp((str),"high",4))			\
+			mode = TSU_SIGNAL_EN_ACT_HIGH;			\
+		else							\
+			mode = TSU_SIGNAL_KEEP_DEF;			\
+	}
+
+
+
+int mvtsu_proc_write(struct file *file, const char *buffer,unsigned long count,
+		     void *data)
+{
+	MV_TSU_SIGNAL_CONFIG	signal_cfg;
+	MV_U32 flags;
+	MV_U8 sync_detect;
+	MV_U8 sync_loss;
+	MV_BOOL write_signal = MV_FALSE;
+        MV_BOOL write_sync = MV_FALSE;
+	MV_U8 port;
+	int len = 0;
+	int tmp;
+	char *str;
+	struct mvtsu_dev *dev;
+
+	TSU_ENTER(TSU_DBG_PROC, "mvtsu_proc_write");
+
+	len = sscanf(buffer,"%d ",&tmp);
+
+	if(tmp >= MV_TSU_NUM_PORTS)
+		return count;
+	port = (MV_U8)tmp;
+        len++; /* Skip over the space.	*/
+
+	signal_cfg.tsDataEdge = TSU_SIGNAL_EDGE_FALL;
+	signal_cfg.tsError = TSU_SIGNAL_KEEP_DEF;
+	signal_cfg.tsSync = TSU_SIGNAL_KEEP_DEF;
+	signal_cfg.tsValid = TSU_SIGNAL_KEEP_DEF;
+	flags = 0;
+
+	if(mvTsuRxSyncDetectionGet(port,&sync_detect,&sync_loss) != MV_OK)
+		return count;
+	dev = &mvtsu_devs[port];
+
+	TSU_DPRINT(TSU_DBG_PROC, ("\tbuffer = %s.\n",buffer+len));
+	str = "sync_detect ";
+	if(!strncmp(buffer+len, str,strlen(str))) {
+		len += strlen(str);
+		len += sscanf(buffer+len,"%d",&tmp);
+		sync_detect = (MV_U8)tmp;
+		TSU_DPRINT(TSU_DBG_PROC, ("\tsync_detect = %d.\n",sync_detect));
+		write_sync = MV_TRUE;
+		goto done;
+	} 
+	str = "sync_loss ";
+	if(!strncmp(buffer+len, str,strlen(str))) {
+		len += strlen(str);
+		len += sscanf(buffer+len,"%d",&tmp);
+		sync_loss = (MV_U8)tmp;
+		TSU_DPRINT(TSU_DBG_PROC, ("\tsync_loss = %d.\n",sync_loss));
+		write_sync = MV_TRUE;
+		goto done;
+	}
+
+	str = "aggr_mode ";
+	if(!strncmp(buffer+len, str,strlen(str))) {
+		len += strlen(str);
+		str = "dis";
+		if(!strncmp(buffer+len, str,strlen(str))) {
+			len += strlen(str);
+			dev->buff_info.aggrMode = MV_TSU_AGGR_MODE_DISABLED;
+			goto done;
+		}
+		str = "mode1";
+		if(!strncmp(buffer+len, str,strlen(str))) {
+			len += strlen(str);
+			dev->buff_info.aggrMode = MV_TSU_AGGR_MODE_1;
+			goto done;
+		}
+		str = "mode2";
+		if(!strncmp(buffer+len, str,strlen(str))) {
+			len += strlen(str);
+			dev->buff_info.aggrMode = MV_TSU_AGGR_MODE_2;
+			goto done;
+		}
+		goto done;
+	}
+
+        str = "aggr_mode2_off ";
+	if(!strncmp(buffer+len, str,strlen(str))) {
+		len += strlen(str);
+		len += sscanf(buffer+len,"%d",&tmp);
+		dev->buff_info.aggrMode2TmstmpOff = tmp;
+		goto done;
+	}
+
+	str = "aggr_num_pckts ";
+	if(!strncmp(buffer+len, str,strlen(str))) {
+		len += strlen(str);
+		len += sscanf(buffer+len,"%d",&tmp);
+		dev->buff_info.aggrNumPackets = tmp;
+		goto done;
+	}
+
+	str = "num_desc ";
+	if(!strncmp(buffer+len, str,strlen(str))) {
+		len += strlen(str);
+		len += sscanf(buffer+len,"%d",&tmp);
+		dev->buff_info.numTsDesc = tmp;
+		goto done;
+	}
+
+	str = "num_done_queue ";
+	if(!strncmp(buffer+len, str,strlen(str))) {
+		len += strlen(str);
+		len += sscanf(buffer+len,"%d",&tmp);
+		dev->buff_info.numDoneQEntry = tmp;
+		goto done;
+	}
+
+	str = "sync_sig ";
+	if(!strncmp(buffer+len, str,strlen(str))) {
+		len += strlen(str);
+		TSU_STR_2_SIGNAL_MODE(signal_cfg.tsSync,buffer+len);
+                write_signal = MV_TRUE;
+		goto done;
+	}
+
+	str = "valid_sig ";
+	if(!strncmp(buffer+len, str,strlen(str))) {
+		len += strlen(str);
+		TSU_STR_2_SIGNAL_MODE(signal_cfg.tsValid,buffer+len);
+		write_signal = MV_TRUE;
+		goto done;
+	}
+
+	str = "error_sig ";
+	if(!strncmp(buffer+len, str,strlen(str))) {
+		len += strlen(str);
+		TSU_STR_2_SIGNAL_MODE(signal_cfg.tsError,buffer+len);
+		write_signal = MV_TRUE;
+		goto done;
+	}
+
+	str = "data_edge ";
+	if(!strncmp(buffer+len, str,strlen(str))) {
+		len += strlen(str);
+		str = "fall";
+		if(!strncmp(buffer+len, str,strlen(str))) {
+			len += strlen(str);
+			signal_cfg.tsDataEdge = TSU_SIGNAL_EDGE_FALL;
+			write_signal = MV_TRUE;
+			goto done;
+		}
+		str = "rise";
+		if(!strncmp(buffer+len, str,strlen(str))) {
+			len += strlen(str);
+			signal_cfg.tsDataEdge = TSU_SIGNAL_EDGE_RISE;
+			write_signal = MV_TRUE;
+			goto done;
+		}
+		goto done;
+	}
+
+	str = "data_order ";
+	if(!strncmp(buffer+len, str,strlen(str))) {
+		len += strlen(str);
+		str = "msb";
+		if(!strncmp(buffer+len, str,strlen(str))) {
+			len += strlen(str);
+			flags |= MV_TSU_SER_DATA_ORDER_MSB;
+			write_signal = MV_TRUE;
+			goto done;
+		}
+		str = "lsb";
+		if(!strncmp(buffer+len, str,strlen(str))) {
+			len += strlen(str);
+			flags |= MV_TSU_SER_DATA_ORDER_LSB;
+			write_signal = MV_TRUE;
+			goto done;
+		}
+		goto done;
+	}
+
+	str = "sync_act ";
+	if(!strncmp(buffer+len, str,strlen(str))) {
+		len += strlen(str);
+		len += sscanf(buffer+len,"%d",&tmp);
+		write_signal = MV_TRUE;
+		if(tmp == 1)
+			flags |= MV_TSU_SER_SYNC_ACT_1_BIT;
+		else if(tmp == 8)
+			flags |= MV_TSU_SER_SYNC_ACT_8_BIT;
+		else
+			write_signal = MV_FALSE;
+		goto done;
+	}
+
+	str = "clk_mode ";
+	if(!strncmp(buffer+len, str,strlen(str))) {
+		len += strlen(str);
+		str = "cont";
+		if(!strncmp(buffer+len, str,strlen(str))) {
+			len += strlen(str);
+			flags |= MV_TSU_SER_TX_CLK_MODE_CONT;
+			write_signal = MV_TRUE;
+			goto done;
+		}
+		str = "gap";
+		if(!strncmp(buffer+len, str,strlen(str))) {
+			len += strlen(str);
+			flags |= MV_TSU_SER_TX_CLK_MODE_GAPPED;
+			write_signal = MV_TRUE;
+			goto done;
+		}
+		goto done;
+	}
+
+done:
+	if(write_signal == MV_TRUE)
+		mvTsuPortSignalCfgSet(port,&signal_cfg,flags);
+	if(write_sync == MV_TRUE)
+		mvTsuRxSyncDetectionSet(port,sync_detect,sync_loss);
+
+	TSU_LEAVE(TSU_DBG_PROC, "mvtsu_proc_write");
+	return count;
+}
+
+
+int mvtsu_proc_read_port(int port, char *buf)
+{
+	MV_U8	sync_detect, sync_loss;
+	MV_TSU_SIGNAL_CONFIG signal_cfg;
+	MV_U32 flags;
+	int len=0;
+
+	if(mvTsuRxSyncDetectionGet(port,&sync_detect,&sync_loss) != MV_OK)
+		return -1;
+	len += sprintf(buf,"\tsync_detect\t\t%d\t%d\tint\n",port,sync_detect);
+	len += sprintf(buf+len,"\tsync_loss\t\t%d\t%d\tint\n",port,sync_loss);
+
+	len += sprintf(buf+len,"\taggr_mode\t\t%d\t%s\t(mode1 / mode2 / dis)\n",
+		       port,
+		       TSU_AGGR_MODE_2_STR(mvtsu_devs[port].buff_info.aggrMode));
+	len += sprintf(buf+len,"\taggr_mode2_off\t\t%d\t%d\tint\n",
+		       port,mvtsu_devs[port].buff_info.aggrMode2TmstmpOff);
+	len += sprintf(buf+len,"\taggr_num_pckts\t\t%d\t%d\tint\n",
+		       port,mvtsu_devs[port].buff_info.aggrNumPackets);
+	len += sprintf(buf+len,"\tnum_desc\t\t%d\t%d\tint\n",
+		       port,mvtsu_devs[port].buff_info.numTsDesc);
+	len += sprintf(buf+len,"\tnum_done_queue\t\t%d\t%d\tint\n",
+		       port,mvtsu_devs[port].buff_info.numDoneQEntry);
+
+	if(mvTsuPortSignalCfgGet(port,&signal_cfg,&flags) != MV_OK)
+		return -1;
+	len += sprintf(buf+len,"\tsync_sig\t\t%d\t%s\t(dis / high / low)\n",
+		       port,TSU_SIGNAL_MODE_2_STR(signal_cfg.tsSync));
+	len += sprintf(buf+len,"\tvalid_sig\t\t%d\t%s\t(dis / high / low)\n",
+		       port,TSU_SIGNAL_MODE_2_STR(signal_cfg.tsValid));
+	len += sprintf(buf+len,"\terror_sig\t\t%d\t%s\t(dis / high / low)\n",
+		       port,TSU_SIGNAL_MODE_2_STR(signal_cfg.tsError));
+	len += sprintf(buf+len,"\tdata_edge\t\t%d\t%s\t(fall / rise)\n",
+		       port,(signal_cfg.tsDataEdge == TSU_SIGNAL_EDGE_FALL) ?
+		       "fall" : "rise");
+
+	if(cfg_tsu_mode == TSU_MODE_SERIAL) {
+		len += sprintf(buf+len,"\tdata_order\t\t%d\t%s\t(msb / lsb)\n",
+			       port,(flags & MV_TSU_SER_DATA_ORDER_MSB) ? "msb" : "lsb");
+		len += sprintf(buf+len,"\tsync_act\t\t%d\t%d\t(1 / 8)\n",
+			       port,(flags & MV_TSU_SER_SYNC_ACT_1_BIT) ? 1 : 8);
+		len += sprintf(buf+len,"\tclk_mode\t\t%d\t%s\t(cont / gap)\n",
+			       port,
+			       (flags & MV_TSU_SER_TX_CLK_MODE_CONT) ? "cont" : "gap");
+	}
+	return len;
+}
+
+
+int mvtsu_proc_read(char* page, char** start, off_t off, int count,int* eof,
+		    void* data)
+{
+	int len = 0;
+	int i;
+	int res;
+
+	if(off > 0)
+		return 0;
+	len += sprintf(page,"\tParameter\t\tPort\tValue\tPossible Values\n\n");
+
+	for(i = 0; i < MV_TSU_NUM_PORTS; i++) {
+                res = mvtsu_proc_read_port(i,page+len);
+		if(res < 0) {
+			len = -1;
+			break;
+		}
+		len += res;
+	}
+	if(len != -1)
+		len += sprintf(page+len,"\nConfig String: <port> <attr> <val>\n");
+
+	return len;
+}
+
+
+/*
+ * Create TSU proc entry.
+ */
+static int mvtsu_proc_init(void)
+{
+	mvtsu_proc_entry = create_proc_entry("tsu", 0666, &proc_root);
+	mvtsu_proc_entry->read_proc = mvtsu_proc_read;
+	mvtsu_proc_entry->write_proc = mvtsu_proc_write;
+	mvtsu_proc_entry->owner = THIS_MODULE;
+	return 0;
+}
+
+#endif /* CONFIG_MV_TSU_PROC */
+
+
+/*
+ * Parse the TSU command line.
+ * The command line looks as follows:
+ * mv_tsu_config=<interface mode>,<packet size>,<core clock in MHz>
+ * e.g. serial,188,73
+ */
+int mvtsu_cmdline_config(char *s)
+{
+    mvtsu_cmdline = s;
+    return 1;
+}
+
+static int mvtsu_parse_core_clk(char **cmdline)
+{
+	char *str = *cmdline;
+	int num = 0;
+
+	while(*str != '\0') {
+		if(!TSU_IS_DEC_DIGIT(*str))
+			return -1;
+		num = (num * 10) + (*str - '0');
+		str++;
+	}
+
+	switch (num) {
+	case(71):
+		cfg_core_clk = TSU_CORE_CLK_71_MHZ;
+                break;
+	case(83):
+		cfg_core_clk = TSU_CORE_CLK_83_MHZ;
+		break;
+	case(91):
+		cfg_core_clk = TSU_CORE_CLK_91_MHZ;
+		break;
+	case(100):
+		cfg_core_clk = TSU_CORE_CLK_100_MHZ;
+		break;
+	default:
+		return -1;
+	}
+
+	*cmdline = str;
+	return 0;
+}
+
+
+static int mvtsu_parse_pkt_size(char **cmdline)
+{
+	char *str = *cmdline;
+	int num = 0;
+
+	while((*str != '\0') && (*str != ',')) {
+		if(!TSU_IS_DEC_DIGIT(*str))
+			return -1;
+		num = (num * 10) + (*str - '0');
+		str++;
+	}
+	if((*str == ',') && (num != 0)) {
+		cfg_pkt_size = num;
+		*cmdline = str;
+		return 0;
+	}
+	return -1;
+}
+
+
+static int mvtsu_parse_mode(char **cmdline)
+{
+	char *str;
+
+	str = "serial";
+	if(!strncmp(*cmdline,str,strlen(str))) {
+		cfg_tsu_mode = TSU_MODE_SERIAL;
+		*cmdline += strlen(str);
+	} else {
+                str = "parallel";
+		if(!strncmp(*cmdline,str,strlen(str))) {
+			cfg_tsu_mode = TSU_MODE_PARALLEL;
+			*cmdline += strlen(str);
+			return 0;
+		}
+	}
+	return 0;
+}
+
+
+static int mvtsu_parse_cmdline(void)
+{
+	char *cmdline;
+
+	if(mvtsu_cmdline) {
+		TSU_DPRINT(TSU_DBG_INIT, ("TSU command line: %s.\n",mvtsu_cmdline));
+		cmdline = mvtsu_cmdline;
+		if(mvtsu_parse_mode(&cmdline) != 0) {
+			printk(KERN_ERR "TSU: Bad interface mode option in command line, using default.\n");
+			goto set_default;
+		}
+                if(cmdline[0] != ',') {
+			printk(KERN_ERR "TSU: Bad command line format (Expected ',' found %c).\n",
+			       cmdline[0]);
+		}
+		cmdline++;
+		if(mvtsu_parse_pkt_size(&cmdline) != 0) {
+			printk(KERN_ERR "TSU: Bad packet size option in command line, using default.\n");
+			goto set_default;
+		}
+		if(cmdline[0] != ',') {
+			printk(KERN_ERR "TSU: Bad command line format (Expected ',' found %c).\n",
+			       cmdline[0]);
+		}
+		cmdline++;
+		if(mvtsu_parse_core_clk(&cmdline) != 0) {
+			printk(KERN_ERR "TSU: Bad core-clock option in command line "
+					"(Expected 71 / 83 / 91 / 100), using default.\n");
+			goto set_default;
+		}
+		goto success;
+	} else {
+		printk(KERN_INFO "TSU: No command line parameters, using default.\n");
+	}
+
+set_default:
+	cfg_tsu_mode = DEF_TSU_MODE;
+	cfg_core_clk = DEF_TSU_CORE_CLOCK;
+	cfg_pkt_size = CONFIG_MV_TSU_PKT_SIZE;
+success:
+	return 0;
+}
+
+
+struct file_operations mvtsu_fops = {
+	.owner =     THIS_MODULE,
+	.read =	     mvtsu_read,
+	.write =     mvtsu_write,
+	.ioctl =     mvtsu_ioctl,
+	.open =	     mvtsu_open,
+	.release =   mvtsu_release,
+};
+
+/*
+ * Initialize the TSU driver
+ */
+int mvtsu_init(void)
+{
+	int result, i;
+	dev_t dev;
+	MV_STATUS status;
+
+        TSU_ENTER(TSU_DBG_INIT, "mvtsu_init");
+
+#if 0
+#warning "TEMPORARY: Configure MPPs for TSU.\n"
+	{
+	MV_U32 reg;
+	reg = MV_REG_READ(0x10008);
+	reg &= 0xFFFF;
+	reg |= 0x11110000;
+	MV_REG_WRITE(0x10008,reg);
+	reg = 0x11111111;
+	MV_REG_WRITE(0x1000C,reg);
+	reg = MV_REG_READ(0x10010);
+	reg &= ~0xF;
+	reg |= 0x1;
+	MV_REG_WRITE(0x10010,reg);
+	}
+#else
+	/* Check unit power mode.		*/
+	if(mvCtrlPwrClckGet(TS_UNIT_ID,0) == MV_FALSE) {
+		printk("Warning: TS unit is powered off.\n");
+		TSU_LEAVE(TSU_DBG_INIT, "mvtsu_init");
+		return 0;
+	}
+#endif
+	/* Parse command line parameters.	*/
+	mvtsu_parse_cmdline();
+#if 0
+	result = alloc_chrdev_region(&dev, 0, TSU_NUM_DEVICES, TSU_DEV_NAME);
+	mvtsu_device = MAJOR(dev);
+#else
+	dev = MKDEV(MV_TSU_MAJOR, 0);
+	result = register_chrdev_region(dev, TSU_NUM_DEVICES, TSU_DEV_NAME);
+#endif /* 0 */
+	if (result < 0) {
+		printk("Failed to register char device (%d,%d)\n",result, TSU_NUM_DEVICES);
+		TSU_LEAVE(TSU_DBG_INIT, "mvtsu_init");
+		return result;
+	}
+
+	/* Perform unit initialization.	*/
+	result = mvTsuInit(cfg_core_clk, cfg_tsu_mode ,NULL);
+	if(result != MV_OK) {
+		goto fail_init;
+		result = -EINVAL;
+	}
+	TSU_DPRINT(TSU_DBG_INIT, ("\tTSU unit initialized successfully.\n"));
+
+	/* Initialize TSU windows.	*/
+	status = mvTsuWinInit();
+	if(status != MV_OK) {
+		goto fail_init;
+		result = -EINVAL;
+	}
+	TSU_DPRINT(TSU_DBG_INIT, ("\tTSU windows initialized successfully.\n"));
+
+	/* Create the char device.	*/
+	for (i = 0; i < TSU_NUM_DEVICES; i++) {
+		mvtsu_set_defaults(&mvtsu_devs[i]);
+		cdev_init(&mvtsu_devs[i].cdev, &mvtsu_fops);
+		mvtsu_devs[i].cdev.owner = THIS_MODULE;
+		mvtsu_devs[i].cdev.ops = &mvtsu_fops;
+		mvtsu_devs[i].port = i;
+		dev = MKDEV(MV_TSU_MAJOR, i);
+		result = cdev_add (&mvtsu_devs[i].cdev, dev, 1);
+		if (result) {
+			printk(KERN_ERR "Error %d adding tsu%d", result, i);
+			goto fail_add;
+		}
+		spin_lock_init(&mvtsu_devs[i].lock);
+		TSU_DPRINT(TSU_DBG_INIT, ("\tChar device %d initialized.\n",i));
+	}
+
+#ifdef CONFIG_MV_TSU_PROC
+	TSU_DPRINT(TSU_DBG_INIT, ("\tCreating Proc entry.\n"));
+	mvtsu_proc_init();
+#endif /* CONFIG_MV_TSU_PROC */
+
+	printk("Transport Stream interface registered.\n");
+	printk("  o %s Mode.\n",
+	       (cfg_tsu_mode == TSU_MODE_PARALLEL) ? "Paralle" : "Serial");
+	printk("  o Core-Clock - ");
+	switch (cfg_core_clk) {
+	case (TSU_CORE_CLK_83_MHZ):
+		printk("83");
+		break;
+	case (TSU_CORE_CLK_71_MHZ):
+		printk("71");
+		break;
+	case (TSU_CORE_CLK_91_MHZ):
+		printk("91");
+		break;
+	case (TSU_CORE_CLK_100_MHZ):
+		printk("100");
+		break;
+	}
+	printk(" MHz.\n");
+	printk("  o Packet Size - %d Bytes.\n",cfg_pkt_size);
+	TSU_LEAVE(TSU_DBG_INIT, "mvtsu_init");
+	return 0;
+
+fail_add:
+	while(i > 0) {
+		cdev_del(&mvtsu_devs[i-1].cdev);
+		i--;
+	}
+
+fail_init:
+	dev = MKDEV(MV_TSU_MAJOR, 0);
+	unregister_chrdev_region(dev, TSU_NUM_DEVICES);
+
+	TSU_LEAVE(TSU_DBG_INIT, "mvtsu_init");
+	return result;
+}
+
+
+/*
+ * Cleanup the TSU driver.
+ */
+void mvtsu_cleanup(void)
+{
+	int i;
+
+	TSU_ENTER(TSU_DBG_INIT, "mvtsu_cleanup");
+	for(i = 0; i < TSU_NUM_DEVICES; i++) {
+		cdev_del(&mvtsu_devs[i].cdev);
+	}
+
+	unregister_chrdev_region(mvtsu_device, TSU_NUM_DEVICES);
+
+	mvTsuShutdown();
+
+	TSU_LEAVE(TSU_DBG_INIT, "mvtsu_cleanup");
+}
+
+module_init(mvtsu_init);
+module_exit(mvtsu_cleanup);
+MODULE_LICENSE("GPL");
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_tsu/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_tsu/Makefile
@@ -0,0 +1,14 @@
+#
+# Makefile for the Marvell Transport Stream Unit driver
+#
+ifeq ($(CONFIG_ARCH_FEROCEON_ORION),y)
+	include $(srctree)/arch/arm/mach-feroceon-orion/config/mvRules.mk
+endif
+ 
+ifeq ($(CONFIG_ARCH_FEROCEON_KW),y)
+	include $(srctree)/arch/arm/mach-feroceon-kw/config/mvRules.mk
+endif
+
+obj-$(CONFIG_MV_TSU)	+= mv_tsu.o
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_phone/Kconfig
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_phone/Kconfig
@@ -0,0 +1,27 @@
+menu "Telephony options"
+	depends on MV_INCLUDE_TDM
+
+config  MV_PHONE
+	tristate "Support for Marvell telephony support (VoIP)"
+	depends on MV_INCLUDE_TDM && PHONE
+	default y
+	---help---
+	  Choosing this option enables the Marvell telephony underlying 
+	  support for various VoIP applications. 
+	  Note, kernel Telephony subsystem must be chosen too.
+
+choice 
+	prompt "Sampling mode"
+	depends on MV_PHONE
+
+config MV_TDM_LINEAR_MODE
+	bool "Linear (16-bit)"
+
+config MV_TDM_ULAW_MODE
+	bool "U-Law (8-bit)"
+
+endchoice
+
+endmenu
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_phone/mp.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_phone/mp.h
@@ -0,0 +1,44 @@
+/************************************  PROSLIC.H   *************************************************/
+#ifndef _MP_H_
+#define _MP_H_
+
+#include "voiceband/slic/proslic.h"
+#include "voiceband/daa/daa.h"
+#include "dbg-trace.h"
+#include "gpp/mvGppRegs.h"
+#include "voiceband/tdm/mvTdm.h"
+
+#define MP_IRQ	TDM_IRQ_INT
+
+/* Defines */
+#define EXCEPTION_ON		1
+#define EXCEPTION_OFF		0
+#define BASE_ENV_PARAM_OFF	5
+#define DEV_ENV_PARAM_OFF	9
+#define MPP_FXO_GROUP		0
+#define MPP_FXO_SELECT		0x1000
+#define DAISY_CHAIN_MODE	1
+#define DUAL_CHIP_SELECT_MODE   0
+#define INTERRUPT_TO_MPP        1
+#define INTERRUPT_TO_TDM	0
+
+/****************
+* DEBUG CONTROL *
+****************/
+/* Extra IOCTLs for debug (used by mv_voip_tool) */
+#define MV_IOCTL
+#ifdef MV_IOCTL
+#define PHONE_MV_READ_SLIC_REG	_IOWR ('q', 0xB0, unsigned char)
+#define PHONE_MV_WRITE_SLIC_REG	_IOW ('q', 0xB1, unsigned int)
+#define PHONE_MV_READ_REG	_IOWR ('q', 0xB2, unsigned int)
+#define PHONE_MV_WRITE_REG	_IOW ('q', 0xB3, unsigned int)
+#define PHONE_MV_SPI_TEST	_IO ('q', 0xB4)
+#endif
+
+
+
+
+
+
+#endif /*_MP_H_*/
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_phone/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_phone/Makefile
@@ -0,0 +1,25 @@
+
+
+#
+# Makefile for the Marvell Phone Device Driver
+#
+
+ifeq ($(CONFIG_ARCH_FEROCEON_ORION),y)
+	include $(srctree)/arch/arm/mach-feroceon-orion/config/mvRules.mk
+endif
+ 
+ifeq ($(CONFIG_ARCH_FEROCEON_KW),y)
+	include $(srctree)/arch/arm/mach-feroceon-kw/config/mvRules.mk
+endif
+
+
+obj-$(CONFIG_MV_PHONE) += mv_phone.o
+
+MP_OBJS = mp.o ../../mv_hal/voiceband/slic/proslic.o ../../mv_hal/voiceband/daa/daa.o
+
+ifeq ($(CONFIG_MV_INCLUDE_TDM),y)
+MP_OBJS += ../../mv_hal/voiceband/tdm/mvTdm.o
+endif
+
+mv_phone-objs := $(MP_OBJS)
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_phone/mp.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_phone/mp.c
@@ -0,0 +1,1218 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+******************************************************************************/
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/telephony.h>
+#include <linux/phonedev.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <linux/poll.h>
+#include "gpp/mvGpp.h"
+#include "mp.h"
+
+extern MV_U8 currRxSampleGet(MV_U8 ch);
+extern MV_U8 currTxSampleGet(MV_U8 ch);
+extern u32 mvVoiceIfType;
+
+
+#ifdef CONFIG_MV_GTW_QOS
+extern int mv_gtw_qos_tos_enable(void);
+extern int mv_gtw_qos_tos_disable(void);
+#endif
+
+
+/***********************
+* PHONE DRIVER'S STUFF *
+***********************/
+typedef struct {
+	struct phone_device p;
+	unsigned int ch_info;
+	unsigned int slic_dev;
+	unsigned int daa_dev;
+	unsigned char ch;
+	unsigned int irq;
+	unsigned char exception;
+	int readers, writers;
+	wait_queue_head_t poll_q;
+	wait_queue_head_t read_q;
+	wait_queue_head_t write_q;
+        MV_VOICE_IF_TYPE chType;
+        int cs;  /* for daisy chain */
+	unsigned char rxActive, txActive, started;
+} MV_PHONE;
+
+static MV_PHONE mv_phone[MV_TDM_MAX_CHANNELS];
+static char *cmdline = "dev0:fxs,dev1:fxs";
+static int work_mode = DAISY_CHAIN_MODE;
+static int interrupt_mode = INTERRUPT_TO_TDM;
+static struct class *phone_class;
+#define get_mp(ch) (&mv_phone[ch])
+
+
+
+/* Forward declarations */
+static int __init mp_init(void);
+static void __exit mp_exit(void);
+static int mp_open(struct phone_device *pdev, struct file *file_p);
+static int mp_close(struct inode *inode, struct file *file_p);
+static ssize_t mp_read(struct file * file_p, char __user *buf, size_t length, loff_t * ppos);
+static ssize_t mp_write(struct file *file_p, const char __user *buf, size_t count, loff_t * ppos);
+static unsigned int mp_poll(struct file *file_p, poll_table * wait);
+static int mp_ioctl(struct inode *inode, struct file *file_p, unsigned int cmd, unsigned long arg);
+static irqreturn_t mp_int_handler(int irq, void *dev_id);
+static void mp_spi_write(unsigned char addr, unsigned char data, MV_PHONE *mp);
+static void mp_spi_read(unsigned char addr, unsigned char *data, MV_PHONE *mp);
+static int slicRingBackTone(unsigned int slicDev);
+static int slicEventGet(unsigned char *offhook, MV_PHONE *mp);
+static int slicBusyTone(unsigned int slicDev);
+static void slicSetLineFeedControl(unsigned char val, unsigned int slicDev);
+static void slicReversDcPolarity(unsigned int slicDev);
+static int slicSpiTest(unsigned int loop, MV_PHONE *mp);
+static int fxdevInterruptBits(unsigned char ch, MV_PHONE *mp);
+static int mp_get_int(unsigned int* work_done);
+static int mp_cmdline_config(char *s);
+static int mp_parse_config(int ifNum);
+static int mp_check_config(void);
+
+
+
+
+
+
+/* Module stuff */
+module_init(mp_init);
+module_exit(mp_exit);
+MODULE_DESCRIPTION("Marvell Telephony Device Driver - www.marvell.com");
+MODULE_AUTHOR("Tzachi Perelstein <tzachi@marvell.com>");
+MODULE_LICENSE("GPL");
+
+/* Driver's operations */
+static struct file_operations mp_fops =
+{
+        .owner          = THIS_MODULE,
+        .read           = mp_read,
+        .write          = mp_write,
+        .poll           = mp_poll,
+        .ioctl          = mp_ioctl,
+        .release        = mp_close,
+};
+
+
+
+static int mp_parse_config(int ifNum)
+{
+	char type[4];
+	int size = 3, i = 0, offset;
+	offset = BASE_ENV_PARAM_OFF + (DEV_ENV_PARAM_OFF * ifNum); /* start of requested type in cmdline */
+
+	if(ifNum < MV_TDM_MAX_CHANNELS)
+	{
+		while(i < size)
+			type[i++] = cmdline[offset++];
+		type[i] = '\0';
+		if(!strcmp(type,"fxs"))
+			return MV_FXS;
+		else if(!strcmp(type,"fxo"))
+			return MV_FXO;
+	}
+
+	return MV_ERROR;                                                                                                                                                                                                                                  }
+
+static int mp_cmdline_config(char *s)
+{
+	cmdline = s;
+	return 1;
+}
+
+__setup("mv_phone_config=", mp_cmdline_config);
+
+
+static int mp_check_config(void)
+{
+
+#if defined(CONFIG_ARCH_FEROCEON_ORION)
+	int boardId;
+
+	boardId = mvBoardIdGet();
+
+	 /* print board detection info */
+ 	   switch(boardId) {
+		case RD_88F5181L_VOIP_GE:
+			printk("Detected RD_88F5181L_VOIP_GE\n");
+			work_mode = DAISY_CHAIN_MODE;
+			interrupt_mode = INTERRUPT_TO_TDM;
+               
+			break;
+		case RD_88F5181L_VOIP_FE:
+			printk("Detected RD_88F5181L_VOIP_FE\n");
+			work_mode = DAISY_CHAIN_MODE;
+			interrupt_mode = INTERRUPT_TO_TDM;
+			break;	
+		case DB_88F5181L_DDR2_2XTDM:
+			printk("Detected DB_88F5181L_DDR2_2XTDM\n");
+			work_mode = DUAL_CHIP_SELECT_MODE;
+			interrupt_mode = INTERRUPT_TO_MPP;
+               
+		    	break;
+
+		case RD_88F5181L_VOIP_FXO_GE: 
+		    	printk("Detected RD_88F5181L_VOIP_FXO_GE\n");
+			work_mode = DUAL_CHIP_SELECT_MODE;
+			interrupt_mode = INTERRUPT_TO_TDM;
+				
+               /* set life line control mpp */
+				/*mvGppValueSet(0, MV_GPP11, MV_GPP11);*/
+					
+		    	break;
+		default:
+		    	printk("Error, platform does not support telephony\n");
+		    	return MV_ERROR;
+  	  }
+#elif defined(CONFIG_ARCH_FEROCEON_KW)
+			work_mode = DUAL_CHIP_SELECT_MODE;
+			interrupt_mode = INTERRUPT_TO_TDM;
+			mvBoardTdmLifeLineSet();
+#endif
+		return MV_OK;
+
+	
+}
+
+static int __init mp_init(void)
+{
+	MV_PHONE *mp;
+	int i, retval;
+	u32 mpp0;
+int err;
+static int unit=0;
+char dev_name[10];
+
+	printk("Marvell Telephony Driver:\n");
+
+	if (MV_FALSE == mvCtrlPwrClckGet(TDM_UNIT_ID, 0)) 
+	{
+		printk("\nWarning Tdm is Powered Off\n");
+		return 0;
+	}
+
+	/* check system configuration */
+	if(MV_ERROR == mp_check_config())
+		return MV_ERROR; 
+
+	TRC_INIT(currRxSampleGet, currTxSampleGet, 0, 0);
+	TRC_REC("->%s\n",__FUNCTION__);
+
+	/* General TDM and SLIC init */
+	TRC_REC("tdm init\n");
+	mvTdmInit(work_mode, interrupt_mode);
+	mvTdmShowProperties();
+	
+    phone_class = class_create(THIS_MODULE, "telephony");
+    if (IS_ERR(phone_class))
+    {
+        err = PTR_ERR(phone_class);
+        return err;
+    }
+	
+	/* per channel init */
+	for(i=0; i<MV_TDM_MAX_CHANNELS; i++)
+	{
+		printk("Initializing channel %d\n",i);
+		TRC_REC("ch%d init\n",i);
+		mp = get_mp(i);
+		mp->chType = mp_parse_config(i);
+		if(mp->chType == MV_ERROR)
+		{
+			printk("%s: error, unknown device type (check u-boot config)\n",__FUNCTION__);
+			return MV_ERROR;
+		}
+#ifdef CONFIG_ARCH_FEROCEON_ORION
+		if((mvBoardIdGet() == RD_88F5181L_VOIP_FXO_GE) && (i != 0)) {
+			mpp0 = MV_REG_READ(MPP_CONTROL_REG0);
+					
+			
+			if(mp->chType == MV_FXO)
+			{ 
+	
+				mvGppValueSet(0, MV_GPP3, MV_GPP3); /* reset daa */	
+				mvGppValueSet(0, MV_GPP3, 0);
+
+			}
+			else {
+				mvGppValueSet(0, MV_GPP3, 0); /* reset slic */
+			   	mvGppValueSet(0, MV_GPP3, MV_GPP3);
+			}
+		}
+#endif
+        	printk("Unit Type: %s\n",mp->chType == MV_FXO ? "FXO":"FXS");                
+		mp->p.board = mp->ch = i;
+		mp->p.f_op = &mp_fops;
+		mp->p.open = mp_open;
+	
+
+		if(interrupt_mode == INTERRUPT_TO_MPP)
+		{
+			mp->irq = mvBoardSlicGpioPinGet(i) + IRQ_GPP_START;	
+		}
+		else
+			mp->irq = MP_IRQ; 
+
+		init_waitqueue_head(&mp->poll_q);
+		init_waitqueue_head(&mp->read_q);
+		init_waitqueue_head(&mp->write_q);
+                   
+		if(mvTdmChInit(&mp->p, i, &(mp->ch_info), mp->chType) == MV_OK)
+		{
+		 mp->rxActive = 0;
+		 mp->txActive = 0;
+		 mp->started =  0;
+		}
+		else
+		{
+            	 printk("mvTdmChInit() failed !\n");
+		 return -EIO;
+		}
+			
+		if(mp->chType == MV_FXS)
+			retval = initSlic(&(mp->slic_dev), mp->ch, work_mode, interrupt_mode);
+		else
+			retval = initDaa(&(mp->daa_dev), mp->ch, work_mode, interrupt_mode);
+		if(!retval)
+		{
+			phone_register_device(&mp->p, PHONE_UNIT_ANY);
+			printk("phone%d registered\n",i);
+		}
+		else
+			printk("%s: Unable to initialize %s-%d\n",__FUNCTION__, mp->chType == 0 ? "FXO":"FXS", i);
+
+        sprintf(dev_name, "phone%d", unit);
+        device_create(phone_class, NULL, MKDEV(PHONE_MAJOR, unit), dev_name);
+        unit++;
+	}
+
+	if (request_irq(MP_IRQ, mp_int_handler, IRQF_SHARED | IRQF_DISABLED, "mv-phone", &mv_phone[0])) {
+		printk("Failed to connect IRQ %d\n", MP_IRQ);
+		mp->irq = 0;
+		return -EIO;
+	}		
+
+	if(interrupt_mode == INTERRUPT_TO_MPP)
+	{
+		mp = get_mp(0);
+        	if (request_irq(mp->irq, mp_int_handler,  IRQF_DISABLED, "mv-voice0", (&mv_phone[0])+1)) {
+			printk("Failed to connect IRQ %d\n", mp->irq);
+			mp->irq = 0;
+			return -EIO;
+		}
+		mp = get_mp(1);
+        	if (request_irq(mp->irq, mp_int_handler,  IRQF_DISABLED, "mv-voice1", (&mv_phone[0])+2)) {
+			printk("Failed to connect IRQ %d\n", mp->irq);
+			mp->irq = 0;
+			return -EIO;
+		}	
+
+	}		
+
+	TRC_REC("<-%s\n",__FUNCTION__);
+	return 0;
+}
+
+static void __exit mp_exit(void)
+{
+	MV_PHONE *mp;
+	int i;
+
+	TRC_REC("->%s\n",__FUNCTION__);
+
+	free_irq(MP_IRQ, &mv_phone[0]);
+	TRC_REC("free irq %d\n",MP_IRQ);
+
+	for(i=0; i<MV_TDM_MAX_CHANNELS; i++) {
+		TRC_REC("ch%d remove\n",i);
+		mp = get_mp(i);
+		mvTdmChRemove(mp->ch_info);
+
+	if(interrupt_mode == INTERRUPT_TO_MPP) {
+		free_irq(mp->irq, (&mv_phone[0]) + i + 1);
+		TRC_REC("free irq %d\n",mp->irq);
+
+	}
+		if(mp->chType == MV_FXS)
+			slicFreeChannel(mp->slic_dev);
+		else
+			daaFreeChannel(mp->daa_dev);
+		mp->irq = 0;
+		mp->p.f_op = NULL;
+		mp->p.open = NULL;
+		mp->p.board = 0;
+		phone_unregister_device(&mp->p);
+		printk("phone%d removed\n",i);
+	}
+
+	TRC_REC("<-%s\n",__FUNCTION__);
+	TRC_OUTPUT();
+	TRC_RELEASE();
+}
+
+static int mp_open(struct phone_device *p, struct file *file_p)
+{
+	
+	MV_PHONE *mp = get_mp(p->board);
+	int i, first = 1;
+	file_p->private_data = mp;
+		
+	printk("Opening phone channel %d - \n",mp->ch);
+	TRC_REC("->%s ch%d\n",__FUNCTION__,mp->ch);
+
+        if (file_p->f_mode & FMODE_READ) {
+		if(!mp->readers) {
+	                mp->readers++;
+        	}
+		else {
+			printk("device is busy (read)\n");
+                	return -EBUSY;
+		}
+        }
+
+	if (file_p->f_mode & FMODE_WRITE) {
+		if(!mp->writers) {
+			mp->writers++;
+		} 
+		else {
+			if (file_p->f_mode & FMODE_READ) {
+				mp->readers--;
+			}
+			printk("device is busy (write)\n");
+			return -EBUSY;
+		}
+	}
+	
+	/* enable FXO/FXS interrupts */	
+	if(mp->chType == MV_FXS)
+		enableSlicInterrupts(mp->slic_dev);
+	else
+		enableDaaInterrupts(mp->daa_dev);
+
+	for (i = 0; i < MV_TDM_MAX_CHANNELS; i++)
+	{
+		if (mp->started)
+		{
+			first = 0;
+			break;
+		}
+	}
+	if (first)
+	{
+		MV_REG_WRITE(INT_STATUS_REG,0); 	
+		MV_REG_WRITE(INT_STATUS_MASK_REG,TDM_INT_SLIC); 
+	}
+
+	mp->started = 1;
+
+	
+	if(mvTdmChStart(mp->ch_info) == MV_OK)
+	  mp->rxActive = mp->txActive = 0;
+	else
+	  printk("mvTdmChStart() failed !\n");
+
+	TRC_REC("<-%s\n",__FUNCTION__);
+	return 0;
+}
+
+static int mp_close(struct inode *inode, struct file *file_p)
+{
+	MV_PHONE *mp = file_p->private_data;
+	int i, stillRunning = 0;
+    	
+
+	printk("Closing Marvell phone%d device\n",mp->ch);
+	TRC_REC("->%s ch%d\n",__FUNCTION__,mp->ch);
+
+	/* Disable Rx/Tx */
+	if(mp->rxActive)
+		mp->rxActive = 0;
+	
+	if(mp->txActive)
+		mp->txActive = 0;
+	
+	/* Clear cause and disable all interrupts */
+	mp->started = 0;
+	TRC_REC("disable all ch%d interrupts\n",mp->ch);
+	for (i = 0; i < MV_TDM_MAX_CHANNELS; i++)
+	{
+		if (mp->started)	
+		{
+			stillRunning = 1;
+			break;
+		}
+	}	
+	if (!stillRunning)
+	{			
+		MV_REG_WRITE(INT_STATUS_MASK_REG,0);
+		MV_REG_WRITE(INT_STATUS_REG,0);
+	}
+	
+
+	if(mvTdmChStop(mp->ch_info) == MV_OK)
+          mp->rxActive = mp->txActive = 0;
+	else
+	  printk("mvTdmChStop() failed !\n");
+
+
+	/* disable FXO/FXS interrupts */	
+	if(mp->chType == MV_FXS)
+		disableSlicInterrupts(mp->slic_dev);
+	else
+		disableDaaInterrupts(mp->daa_dev);
+ 
+
+	wake_up_interruptible(&mp->poll_q);
+	wake_up_interruptible(&mp->read_q);
+	wake_up_interruptible(&mp->write_q);
+
+	if (file_p->f_mode & FMODE_READ)
+		mp->readers--;
+	if (file_p->f_mode & FMODE_WRITE)
+		mp->writers--;
+
+	file_p->private_data = NULL;
+
+	TRC_REC("<-%s\n",__FUNCTION__);
+	TRC_OUTPUT();
+	return 0;
+}
+
+static ssize_t mp_read(struct file * file_p, char __user *buf, size_t length, loff_t * ppos)
+{
+	
+	MV_STATUS status;
+	unsigned long count = 0;
+	unsigned int err = 0;
+        MV_PHONE *mp = file_p->private_data;
+
+	TRC_REC("->%s ch%d\n",__FUNCTION__,mp->ch);
+
+
+	count = min(length, (size_t)MV_TDM_BUFF_SIZE);
+	do
+	{	
+		if(mp->rxActive)
+		   status = mvTdmChRx(mp->ch_info, buf, count);
+		else
+		{
+		   TRC_REC("rx is not active!\n");
+		   status = MV_NOT_READY;
+		}
+
+		if (status == MV_NOT_READY) 
+		{ 
+			if (file_p->f_flags & O_NONBLOCK) 
+			{		
+				TRC_REC("read not ready, try again\n");
+				err = -EAGAIN;
+				break;
+			}
+			else
+			{
+				
+				if(!mp->rxActive)
+				{
+					mp->rxActive = 1;			
+					interruptible_sleep_on(&mp->read_q);
+					if (signal_pending(current)) 
+					{
+						return -EINTR;
+					}
+				 } 
+				 else
+				 {				
+					err = -EFAULT;
+					break;
+				 }
+				
+			}
+		}	
+		else if(status == MV_FAIL) {
+			TRC_REC("copy to user failed\n");
+			printk("%s: copy to user failed\n", __FUNCTION__);
+			err = -EFAULT;			
+		}
+		else {
+			TRC_REC("copy to user %dB ok\n",count);
+			err = 0;			
+		}
+	} while (status == MV_NOT_READY);
+
+	TRC_REC("<-%s\n",__FUNCTION__);
+	return (err)?err:count;
+}
+
+static ssize_t mp_write(struct file *file_p, const char __user *buf, size_t length, loff_t * ppos)
+{
+	
+	MV_STATUS status;
+	unsigned long count = 0;
+	int err = 0;
+        MV_PHONE *mp = file_p->private_data;
+
+	TRC_REC("->%s ch%d\n",__FUNCTION__,mp->ch);
+	
+
+	count = min(length, (size_t)MV_TDM_BUFF_SIZE);
+	do
+	{
+		
+		if(mp->txActive)
+			status = mvTdmChTx(mp->ch_info, (MV_U8 *)buf, count);
+		else
+		{
+			TRC_REC("tx is not active!\n");
+			status = MV_NOT_READY;
+		}
+
+		if (status == MV_NOT_READY) 
+		{ 
+			if (file_p->f_flags & O_NONBLOCK) 
+			{				
+				TRC_REC("write not ready, try again\n");
+				err = -EAGAIN;
+				break;
+			}
+			else
+			{
+				if(!mp->txActive)
+				{
+					mp->txActive = 1;			
+					interruptible_sleep_on(&mp->write_q);
+					if (signal_pending(current)) 
+					{
+						return -EINTR;
+					}
+				}
+				else
+				{				
+					err = -EFAULT;
+					break;
+				}
+			}
+		}		
+		else if(status == MV_FAIL) {
+			TRC_REC("copy from user failed\n");
+			printk("%s: copy from user failed\n",__FUNCTION__);
+			err = -EFAULT;		
+		}
+		else {
+			TRC_REC("copy from user %dB ok\n",count);
+			err = 0;
+		}
+	} while (status == MV_NOT_READY);
+	TRC_REC("<-%s\n",__FUNCTION__);
+	return (err)?err:count;
+}
+
+static unsigned int mp_poll(struct file *file_p, poll_table * wait)
+{
+	
+	unsigned int mask = 0;
+        MV_PHONE *mp = file_p->private_data;
+
+	TRC_REC("->%s ch%d\n",__FUNCTION__,mp->ch);
+
+	poll_wait(file_p, &(mp->poll_q), wait);
+	
+        if(mp->rxActive)
+	{
+	 if(mvTdmChRxReady(mp->ch_info)) {
+		mask |= POLLIN | POLLRDNORM;	/* readable */
+		TRC_REC("poll can read\n");
+	 }
+	}
+	if(mp->txActive)
+	{
+	  if(mvTdmChTxReady(mp->ch_info)) {
+		mask |= POLLOUT | POLLWRNORM;	/* writable */
+		TRC_REC("poll can write\n");
+	  }
+	}
+	  if(mp->exception == EXCEPTION_ON) {
+		mask |= POLLPRI;		/* events */
+		TRC_REC("poll can get event\n");
+	  }
+
+
+
+	TRC_REC("<-%s\n",__FUNCTION__);
+	return mask;
+}
+
+static int mp_ioctl(struct inode *inode, struct file *file_p, unsigned int cmd, unsigned long arg)
+{
+	
+	int retval = 0;
+        MV_PHONE *mp = get_mp(iminor(inode) & 0xf);
+
+	TRC_REC("->%s ch%d\n",__FUNCTION__,mp->ch);
+
+	/* check ioctls only root can use */
+	if (!capable(CAP_SYS_ADMIN)) {
+		return -EPERM;
+	}
+
+	disable_irq(MP_IRQ);
+
+	if(interrupt_mode == INTERRUPT_TO_MPP) 
+		disable_irq(mp->irq);
+
+
+
+#ifdef CONFIG_MV_GTW_QOS
+	if(cmd == PHONE_REC_START || cmd == PHONE_PLAY_START) {
+		mv_gtw_qos_tos_enable();
+	}
+	if(cmd == PHONE_REC_STOP || cmd == PHONE_PLAY_STOP) {
+		mv_gtw_qos_tos_disable();
+	}
+#endif
+
+	switch (cmd) {
+		case PHONE_REC_START:
+			TRC_REC("PHONE_REC_START\n");
+			if(!mp->rxActive)
+		        {
+			   if(mvTdmChRxEnable(mp->ch_info) ==MV_OK)
+				mp->rxActive = 1;
+			   else TRC_REC("failed\n");
+			}
+			TRC_REC("rec already active\n");
+			break;
+		case PHONE_REC_STOP:
+			TRC_REC("PHONE_REC_STOP\n");			
+			if(mp->rxActive)
+				mp->rxActive = 0;
+			wake_up_interruptible(&mp->read_q);
+			break;
+		case PHONE_PLAY_START:
+			TRC_REC("PHONE_PLAY_START\n");
+			if(!mp->txActive)
+		        {
+				if(mvTdmChTxEnable(mp->ch_info) == MV_OK)
+					mp->txActive = 1;
+				else TRC_REC("failed\n");
+			}
+			TRC_REC("play already active\n");
+			break;
+		case PHONE_PLAY_STOP:
+			TRC_REC("PHONE_PLAY_STOP\n");
+			if(mp->txActive)
+				mp->txActive = 0;
+			wake_up_interruptible(&mp->write_q);
+			break;
+		case PHONE_EXCEPTION:
+		{
+			union telephony_exception ex;
+			TRC_REC("PHONE_EXCEPTION\n");
+			ex.bytes = 0;
+			if(mp->chType == MV_FXS)
+			{
+				MV_U8 offhook;
+				slicEventGet(&offhook, mp);
+				if(offhook) {
+					TRC_REC("off hook\n");				
+					ex.bits.hookstate = 1;
+				}
+				else 
+					TRC_REC("on hook\n");				
+			}
+			else
+			{
+				MV_U8 eventType;
+				daaEventTypeGet(&eventType, mp->daa_dev);
+				mp->exception = EXCEPTION_OFF;
+				if(eventType & 0x80)
+				{
+					TRC_REC("Ring Detected\n");				
+					ex.bits.pstn_ring = 1;
+				}
+				if(eventType & 0x1)
+				{
+					TRC_REC("Reverse Polarity Detected\n");				
+					ex.bits.reverse_polarity = 1;
+
+				}
+				if(eventType & 0x8)
+				{
+					TRC_REC("Drop Out Detected\n");				
+					ex.bits.drop_out = 1;
+
+				}
+	
+			}
+			retval = ex.bytes;
+		}
+			break;
+		case PHONE_PSTN_SET_STATE:
+			TRC_REC("PHONE_PSTN_SET_STATE\n");
+			setPstnState(arg, mp->daa_dev);
+			break;
+		case PHONE_SET_CID_STATE:
+			TRC_REC("PHONE_SET_CID_STATE\n");
+			setDaaCidState(arg, mp->daa_dev);
+			break;
+		case PHONE_SET_REVERSE_POLARITY:
+			TRC_REC("PHONE_SET_REVERSE_POLARITY\n");
+			enableDaaReveresePolarity(arg, mp->daa_dev);
+			break;
+		case PHONE_SET_DIGITAL_HYBRID:
+			TRC_REC("PHONE_SET_DIGITAL_HYBRID\n");
+			setDaaDigitalHybrid((unsigned int)arg, mp->daa_dev);
+			break;
+		case PHONE_GET_LINE_VOLTAGE:
+			TRC_REC("PHONE_GET_LINE_VOLTAGE\n");
+			retval = daaGetLineVoltage(mp->daa_dev);
+			break;
+		case PHONE_DIALTONE:
+			TRC_REC("PHONE_DIALTONE\n");
+			dialTone(mp->slic_dev);
+			break;
+		case PHONE_BUSY:
+			TRC_REC("PHONE_BUSY\n");
+			slicBusyTone(mp->slic_dev);
+			break;
+		case PHONE_CPT_STOP:
+			TRC_REC("PHONE_CPT_STOP\n");
+			stopTone(mp->slic_dev);
+			break;
+	 	case PHONE_RING_START:
+			TRC_REC("PHONE_RING_START\n");
+			activateRinging(mp->slic_dev);
+			break;
+		case PHONE_RING_STOP:
+			TRC_REC("PHONE_RING_STOP\n");
+			stopRinging(mp->slic_dev);
+			break;
+		case PHONE_RING_CADENCE:
+			TRC_REC("PHONE_RING_CADENCE\n");
+			slicRingCadence(arg, mp->slic_dev);
+			break;			
+		case PHONE_RINGBACK:
+			TRC_REC("PHONE_RINGBACK\n");
+			slicRingBackTone(mp->slic_dev);
+			break;
+		case PHONE_PSTN_REVERSE_POLARITY:	/* Timor */
+			TRC_REC("PHONE_PSTN_REVERSE_POLARITY\n");
+			slicReversDcPolarity(mp->slic_dev);
+			break;
+		case PHONE_PSTN_SEND_NTT_CRA:		/* Timor */
+			TRC_REC("PHONE_PSTN_SEND_NTT_CRA\n");
+			slicSendNTTCRATone(mp->slic_dev);
+			break;
+
+        	case PHONE_SET_LINE_FEED_CONTROL:               /* Timor */
+            		TRC_REC("PHONE_SET_LINE_FEED_CONTROL\n");
+            		slicSetLineFeedControl((unsigned char)arg, mp->slic_dev);
+            		break;
+
+		case PHONE_MV_READ_SLIC_REG:
+#ifdef MV_IOCTL
+	
+             		mp_spi_read(arg, (MV_U8*)&retval, mp);
+#else
+			printk("Driver is not configured to support this IOCTL\n");
+			retval = -1;
+#endif
+			break;
+		case PHONE_MV_WRITE_SLIC_REG:
+#ifdef MV_IOCTL
+			
+            		mp_spi_write((arg>>16)&0xff,arg&0xff, mp);
+#else
+			printk("Driver is not configured to support this IOCTL\n");
+			retval = -1;
+#endif
+			break;
+		case PHONE_MV_READ_REG:
+#ifdef MV_IOCTL
+			retval = *((unsigned int*)(0xf1000000|arg));
+#else
+			printk("Driver is not configured to support this IOCTL\n");
+			retval = -1;
+#endif
+			break;
+		case PHONE_MV_WRITE_REG:
+#ifdef MV_IOCTL
+			printk("not implemented yet\n");
+#else
+			printk("Driver is not configured to support this IOCTL\n");
+			retval = -1;
+#endif
+			break;
+		case PHONE_MV_SPI_TEST:
+#ifdef MV_IOCTL
+			slicSpiTest(10000, mp);
+#else
+			printk("Driver is not configured to support this IOCTL\n");
+			retval = -1;
+#endif
+			break;
+		default:
+			printk("mv_phone %s: unsupported IOCTL\n",__FUNCTION__);
+	}
+
+	TRC_REC("<-%s\n",__FUNCTION__);
+	enable_irq(MP_IRQ);
+
+	if(interrupt_mode == INTERRUPT_TO_MPP)
+		enable_irq(mp->irq);
+
+
+	return retval;
+}
+
+
+/* 
+** Two types of interrupts exists: 
+** (1) FXS/FXO async event (e.g. on/off-hook). 
+** (2) TDM sync 10ms event (data is ready for read+write)
+*/
+static irqreturn_t mp_int_handler(int irq, void *dev_id)
+{	
+	MV_U32 work_done = 0;
+	MV_U8 i;
+	MV_U8 wake_up_poll_q;
+
+	TRC_REC("->->->%s\n",__FUNCTION__);
+	if (!mp_get_int(&work_done)) 
+	{		
+		for (i = 0; i < MV_TDM_MAX_CHANNELS; i++)
+		{								
+			wake_up_poll_q = 0;
+			if (work_done & (MV_TDM_SLIC_INTR << MV_CHANNEL_INTR(i)))
+			{
+				TRC_REC("wake up for ex\n");
+				wake_up_poll_q = 1;
+			}
+			if (work_done & (MV_TDM_READ_INTR << MV_CHANNEL_INTR(i)))
+			{
+				wake_up_poll_q = 1;
+				TRC_REC("wake up for rd\n");
+				wake_up_interruptible(&mv_phone[i].read_q);
+			}
+			if (work_done & (MV_TDM_WRITE_INTR << MV_CHANNEL_INTR(i)))
+			{		
+				wake_up_poll_q = 1;
+				TRC_REC("wake up for wr\n");
+				wake_up_interruptible(&mv_phone[i].write_q);
+			}
+			if (wake_up_poll_q) {
+				TRC_REC("wake up poll\n");
+				wake_up_interruptible(&mv_phone[i].poll_q);	
+			}
+		}
+	}
+	TRC_REC("<-%s\n",__FUNCTION__);
+	return IRQ_HANDLED;
+}
+
+static void mp_spi_write(unsigned char addr, unsigned char data, MV_PHONE *mp)
+{
+	if(mp->chType == MV_FXS)
+		writeDirectReg(mp->slic_dev, addr, data);
+	else
+		writeDaaDirectReg(mp->daa_dev, addr, data);
+
+
+}
+
+static void mp_spi_read(unsigned char addr, unsigned char *data, MV_PHONE *mp)
+{
+	if(mp->chType == MV_FXS)
+		*data = readDirectReg(mp->slic_dev, addr);
+	else	
+		*data = readDaaDirectReg(mp->daa_dev, addr);
+
+
+}
+
+static int slicEventGet(unsigned char *offhook, MV_PHONE *mp)
+{
+	
+	MV_U8 tmp;
+
+	TRC_REC("->%s ch%d\n",__FUNCTION__,mp->ch);
+
+  
+    	mp_spi_read(68, &tmp, mp);
+
+	/* hook state (0-on, 1-off) */
+	*offhook = !(tmp & 4);
+
+	if(*offhook)
+		TRC_REC("off-hook\n");		
+	else		
+		TRC_REC("on-hook\n");	
+	mp->exception = EXCEPTION_OFF;
+	TRC_REC("<-%s\n",__FUNCTION__);
+	return 0;
+}
+
+static int slicBusyTone(unsigned int slicDev)
+{
+   
+#if 1
+	busyTone(slicDev);
+#else
+	busyJapanTone(slicDev);
+#endif
+	return 0;
+}
+
+
+static int slicRingBackTone(unsigned int slicDev)
+{
+#if 1
+	ringBackTone(slicDev);
+#else
+	ringBackJapanTone(slicDev);
+#endif
+	return 0;
+}
+
+static void slicSetLineFeedControl(unsigned char val, unsigned int slicDev)    /* Timor */
+{
+    writeDirectReg(slicDev, LINE_STATE, val);
+	return ;
+}
+
+static void slicReversDcPolarity(unsigned int slicDev)         /* Timor */
+{ 
+    MV_U8 data;
+    /* read value of On-Hook Line Voltage register */
+    data = readDirectReg(slicDev, OFF_HOOK_V);
+    /* toggle the VSGN bit - VTIP–VRING polarity */
+    writeDirectReg(slicDev, OFF_HOOK_V, data^0x40);
+    
+    return;
+}
+
+static int slicSpiTest(unsigned int loop, MV_PHONE *mp)
+{
+	
+	unsigned char  w,r;
+	int i,ch;
+
+	for(ch=0; ch<MV_TDM_MAX_CHANNELS; ch++)
+	{
+
+	    /*mvTdmSetCurrentUnit(mp->cs);*/
+		printk("SPI channel %d Write/Read test %d loops... ",mp->ch,loop);
+
+		for(i=0;i<loop;i++) 
+		{
+			w = (i & 0x7f);
+			r = 0;
+			mp_spi_write(2, w, mp);
+			mp_spi_read(2, &r, mp);
+			if(r!=w) 
+			{
+				printk("SPI: Wrote %x, Read = %x ",w,r);
+				break;
+			}
+		}
+
+		if(i != loop)
+		{
+			printk("failed\n");
+			return 1;
+		}
+
+		printk("ok\n");
+	}
+	return 0;
+}
+
+
+static int mp_get_int(unsigned int *work_done)
+{
+	MV_PHONE *mp;	
+	unsigned int cause, gppDataIn = 0, isFxInterrupt = 0;
+	unsigned char ch;
+	
+	/* Read and clear cause */
+	cause = MV_REG_READ(INT_STATUS_REG);
+	MV_REG_WRITE(INT_STATUS_REG, ~cause);
+
+	if(interrupt_mode == INTERRUPT_TO_MPP) {
+		gppDataIn = MV_REG_READ(GPP_DATA_IN_REG(0));
+		TRC_REC("->%s gppcause=0x%x\n",__FUNCTION__, gppDataIn);
+	}
+	else
+		TRC_REC("->%s tdmcause=0x%x mask=0x%x\n",__FUNCTION__, cause, MV_REG_READ(INT_STATUS_MASK_REG));
+
+
+
+	/* Refer only to unmasked bits */
+	cause &= (MV_REG_READ(INT_STATUS_MASK_REG));
+	isFxInterrupt = ((interrupt_mode == INTERRUPT_TO_MPP) ?  (gppDataIn & (BIT8 | BIT9)) : (cause & SLIC_INT_BIT)) ;
+
+	if(isFxInterrupt) 	
+	{
+		for (ch=0; ch<MV_TDM_MAX_CHANNELS; ch++)
+		{
+ 			mp = get_mp(ch);
+			
+			if (fxdevInterruptBits(ch, mp)) { 
+				mp->exception = EXCEPTION_ON;				
+				TRC_REC("ch%d voice unit interrupt\n",ch);				
+				*work_done |= MV_TDM_SLIC_INTR << MV_CHANNEL_INTR(ch);			
+			}			
+		}		
+	}
+
+	if(cause & DMA_ABORT_BIT)
+	{
+		mvOsPrintf("%s: DMA data abort. Address: 0x%08x, Info: 0x%08x\n",
+		__FUNCTION__, MV_REG_READ(DMA_ABORT_ADDR_REG), MV_REG_READ(DMA_ABORT_INFO_REG));
+		*work_done |= MV_TDM_DMA_ABORT_INTR;
+	}
+
+	for(ch=0; ch<MV_TDM_MAX_CHANNELS; ch++)
+	{
+		
+		mp = get_mp(ch);
+	
+		if (cause & TDM_INT_RX(ch))
+		{
+			if (cause & RX_BIT(ch)) 
+			{
+				/* Give next buff to TDM and set curr buff as full */				
+			
+				if (mp->rxActive)
+                           		mvTdmChRxLow(mp->ch_info);	
+						
+			}
+			if (cause & RX_OVERFLOW_BIT(ch))
+			{
+				/*Channel Rx goes to idle*/	
+				if (likely(!mp->rxActive))
+				{
+					MV_REG_WRITE(INT_STATUS_MASK_REG, MV_REG_READ(INT_STATUS_MASK_REG) & (~(TDM_INT_RX(mp->ch)))); 
+					TRC_REC("ch %d: Rx stopped.\n",mp->ch);
+				}
+				else
+				{
+					mvOsPrintf("ch %d: Rx overflow.\n",mp->ch);
+				}
+			}
+			*work_done |= MV_TDM_READ_INTR << MV_CHANNEL_INTR(ch);			
+		}
+
+		if (cause & TDM_INT_TX(ch))
+		{
+			/* Give next buff to TDM and set curr buff as empty */
+			if (cause & TX_BIT(ch))
+			{
+			     if (mp->txActive)			
+				mvTdmChTxLow(mp->ch_info); 
+				 					
+			}
+			if(cause & TX_UNDERFLOW_BIT(ch))
+			{
+				/*Channel Tx goes to idle*/	
+				if (likely(!mp->txActive))
+				{
+					MV_REG_WRITE(INT_STATUS_MASK_REG, MV_REG_READ(INT_STATUS_MASK_REG) & (~(TDM_INT_TX(mp->ch)))); 
+					TRC_REC("ch %d: Tx stopped.\n",mp->ch);
+				}
+				else
+				{
+					mvOsPrintf("ch %d: Tx underflow.\n",mp->ch);
+				}
+			}
+			*work_done |= MV_TDM_WRITE_INTR << MV_CHANNEL_INTR(ch);			
+		}
+	}
+	TRC_REC("<-%s\n",__FUNCTION__);
+	return( (*work_done) ? 0 : 1 );
+}
+
+
+static int fxdevInterruptBits(unsigned char ch, MV_PHONE *mp)
+{
+	MV_BOOL retVal; 
+	TRC_REC("<-%s: %s\n",__FUNCTION__, mp->chType == MV_FXS ? "FXS":"FXO");
+
+	if(mp->chType == MV_FXS)
+		retVal = checkSlicInterrupts(mp->slic_dev);  
+	else
+		retVal = checkDaaInterrupts(mp->daa_dev);
+     
+     
+    return retVal;
+
+}
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_mtd/mflash.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_mtd/mflash.c
@@ -0,0 +1,361 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************/
+
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/sched.h>
+#include <linux/errno.h>
+#include <linux/interrupt.h>
+#include <linux/mtd/map.h>
+#include <linux/mtd/mtd.h>
+#include <mflash/mvMFlash.h>
+#include "mflash/mvMFlashSpec.h"
+#include "ctrlEnv/mvCtrlEnvLib.h"
+
+/*#define MTD_MFLASH_DEBUG*/
+
+#ifdef MTD_MFLASH_DEBUG
+#define DB(x)	x
+#else
+#define DB(x)
+#endif
+
+
+/* Configuration options */
+static struct mtd_info *mflash_probe(struct map_info *map);
+static void mflash_destroy(struct mtd_info *mtd);
+static int mflash_read(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf);
+static int mflash_write(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, const u_char *buf);
+static int mflash_erase(struct mtd_info *mtd, struct erase_info *instr);
+static void mflash_sync(struct mtd_info *mtd);
+static int mflash_suspend(struct mtd_info *mtd);
+static void mflash_resume(struct mtd_info *mtd);
+static int mflash_lock (struct mtd_info *mtd, loff_t ofs, size_t len);
+static int mflash_unlock (struct mtd_info *mtd, loff_t ofs, size_t len);
+static int mflash_block_isbad (struct mtd_info *mtd, loff_t ofs);
+static int mflash_block_markbad (struct mtd_info *mtd, loff_t ofs);
+
+static struct mtd_chip_driver mflash_chipdrv = {
+	.probe		= mflash_probe,
+	.destroy	= mflash_destroy,
+	.name		= "mflash",
+	.module		= THIS_MODULE
+};
+
+
+static struct mtd_info *mflash_probe(struct map_info *map)
+{
+	struct mtd_info *mtd = NULL;
+	MV_MFLASH_INFO *mflash = NULL;
+	
+	DB(printk("\nINFO: enterring %s",__FUNCTION__));
+
+	/* allocate the memory for the mtd_info */
+	mtd = kmalloc(sizeof(*mtd), GFP_KERNEL);
+	if(!mtd)
+	{
+		printk(KERN_NOTICE "\nERROR: %s - Failed to allocate memory for mtd structure",__FUNCTION__);
+		return NULL;
+	}
+
+	/* allocate memory for the mflash private structure */
+	mflash = kmalloc(sizeof(MV_MFLASH_INFO), GFP_KERNEL);
+	if(!mflash) 
+	{
+		printk(KERN_NOTICE "\nERROR: %s - Failed to allocate memory for mflash structure",__FUNCTION__);
+		kfree(mtd);
+		return NULL;
+	}
+		
+	/* clear both structures before usage */
+	memset(mtd, 0, sizeof(*mtd));
+	memset(mflash, 0, sizeof(*mflash));
+	    
+	DB(printk("\nINFO: %s - Base address %08x",__FUNCTION__, mflash->baseAddr));
+	
+    /* based on the SPI mode try to detect the Mflash device interface type */
+    if (mvCtrlSpiBusModeDetect() == MV_SPI_CONN_TO_MFLASH)
+        mflash->ifMode = MV_MFLASH_SPI; 
+    else               
+        mflash->ifMode = MV_MFLASH_PARALLEL;
+	
+	/* Try to detect the Marvell flash and initialize */	
+	mflash->baseAddr = map->phys;
+	if (mvMFlashInit(mflash) != MV_OK)
+	{
+		printk(KERN_NOTICE "ERROR: %s - Failed to initialize the mflash.", __FUNCTION__);
+		kfree(mtd);
+		kfree(mflash);
+		return NULL;
+	}
+	
+	if (mvMFlashSectorSizeSet(mflash, 0x1000 /*4K*/) != MV_OK)
+	{
+		printk(KERN_NOTICE "ERROR: %s - Failed to sector sector size to small.", __FUNCTION__);
+		kfree(mtd);
+		kfree(mflash);
+		return NULL;
+	}
+	
+	/* After success fill in the MTD structure with the appropriate info */
+	mtd->erasesize = mflash->sectorSize;
+	mtd->size = mflash->sectorSize * mflash->sectorNumber;
+	mtd->priv = map;
+	mtd->type = MTD_NORFLASH;
+	mtd->erase = mflash_erase;
+	mtd->read = mflash_read;
+	mtd->write = mflash_write;
+	mtd->sync = mflash_sync;
+	mtd->suspend = mflash_suspend;
+	mtd->resume = mflash_resume;	
+	mtd->lock = mflash_lock;
+	mtd->unlock = mflash_unlock;
+	mtd->block_isbad = mflash_block_isbad;
+	mtd->block_markbad = mflash_block_markbad;	
+	mtd->flags = (MTD_WRITEABLE | MTD_BIT_WRITEABLE); /* just like MTD_CAP_NORFLASH */
+	mtd->name = map->name;
+	mtd->writesize = 1;
+	
+	map->fldrv = &mflash_chipdrv;
+	map->fldrv_priv = mflash;
+	
+	/* Print some debug messages with the detected mflash info */
+	DB(printk("\nINFO: %s - Detected mflash device (size %d)", __FUNCTION__, mtd->size));
+	DB(printk("\n           Base Address    : 0x%08x", mflash->baseAddr));
+	DB(printk("\n           Interface Mode  : %d", mflash->ifMode));
+	DB(printk("\n           Sector Size     : 0x%x", mflash->sectorSize));
+	DB(printk("\n           Sector Number   : %d", mflash->sectorNumber));
+	DB(printk("\n           Info Region Size: 0x%x", mflash->infoSize));
+	
+	printk("Marvell Flash Detected @ 0x%08x, %dKB Main region (%dsec x %dKB), %dKB Information region\n",
+	         mflash->baseAddr, ((mflash->sectorNumber * mflash->sectorSize)/1024),
+	         mflash->sectorNumber, (mflash->sectorSize/1024), (mflash->infoSize/1024));
+	
+	__module_get(THIS_MODULE);
+	return mtd;
+}
+
+static void mflash_destroy(struct mtd_info *mtd)
+{
+	struct map_info *map = mtd->priv;
+	MV_MFLASH_INFO *mflash = map->fldrv_priv;
+
+	DB(printk("\nINFO: %s called", __FUNCTION__));
+
+	/* free memory allocated at probe for the private mflash structure */
+	if (mflash)
+		kfree(mflash);	
+}
+
+static int mflash_read(struct mtd_info *mtd, loff_t from, size_t len,
+	size_t *retlen, u_char *buf)
+{
+	struct map_info *map = mtd->priv;
+	MV_MFLASH_INFO *mflash = map->fldrv_priv;
+	MV_U32 offset = ((MV_U32)from);
+	
+	*retlen = 0;
+
+	DB(printk("\nINFO: %s  - offset %08x, len %d",__FUNCTION__, offset, (int)len));
+		
+	if (mvMFlashBlockRd(mflash, offset, len, buf) != MV_OK)
+	{
+		printk(KERN_NOTICE "\nERROR: %s - Failed to read block.", __FUNCTION__);
+		return -1;
+	}
+	
+	*retlen = len;
+	
+	DB(printk(" - OK"));
+
+	return 0;	
+}
+
+static int mflash_write(struct mtd_info *mtd, loff_t to, size_t len,
+	size_t *retlen, const u_char *buf)
+{
+	struct map_info *map = mtd->priv;
+	MV_MFLASH_INFO *mflash = map->fldrv_priv;
+	MV_U32 offset = ((MV_U32)to);
+	
+	*retlen = 0;
+	
+	DB(printk("\nINFO: %s - offset %08x, len %d",__FUNCTION__, offset, len));
+		
+	if (mvMFlashBlockWr(mflash, offset, len, (MV_U8*)buf, MV_FALSE) != MV_OK)
+	{
+		printk(KERN_NOTICE "\nERROR: %s - Failed to write block", __FUNCTION__);
+		return -1;
+	}
+	
+	*retlen = len;
+	
+	DB(printk(" - OK"));
+
+	return 0;	
+
+}
+
+
+static int mflash_erase(struct mtd_info *mtd, struct erase_info *instr)
+{
+	struct map_info *map = mtd->priv;
+	MV_MFLASH_INFO *mflash = map->fldrv_priv;
+	MV_U32 fsec, lsec;
+	int i;
+
+	DB(printk("\nINFO: %s - Addr %08x, len %d",__FUNCTION__, instr->addr, instr->len));
+	
+	if(instr->addr & (mtd->erasesize - 1))
+	{
+		printk(KERN_NOTICE "\nError: %s - Erase address not sector alligned",__FUNCTION__);
+		return -EINVAL;
+	}
+	if(instr->len & (mtd->erasesize - 1))
+	{
+		printk(KERN_NOTICE "\nError: %s - Erase length is not sector alligned",__FUNCTION__);
+		return -EINVAL;
+	}
+	if(instr->len + instr->addr > mtd->size)
+	{
+		printk(KERN_NOTICE "\nError: %s - Erase exceeded flash size",__FUNCTION__);
+		return -EINVAL;
+	}
+
+	fsec = (instr->addr / mtd->erasesize);
+	lsec = (fsec +(instr->len / mtd->erasesize));
+	
+	DB(printk("\nINFO: %s - from sector %u to %u",__FUNCTION__, fsec, lsec));
+	
+	for (i=fsec; i<lsec; i++)
+	{
+		if (mvMFlashSecErase(mflash, i) != MV_OK)
+		{
+			printk(KERN_NOTICE "\nError: %s - mvMFlashSecErase on sector %d",__FUNCTION__, i);
+			return -1;
+		}
+	}
+	
+	instr->state = MTD_ERASE_DONE;
+	mtd_erase_callback(instr);
+
+	return 0;
+}
+
+static int mflash_lock (struct mtd_info *mtd, loff_t ofs, size_t len)
+{
+	struct map_info *map = mtd->priv;
+	MV_MFLASH_INFO *mflash = map->fldrv_priv;
+	
+	DB(printk("\nINFO: %s called", __FUNCTION__));
+	
+	if (mvMFlashWriteProtectSet(mflash, MV_TRUE) != MV_OK)
+	{
+		printk(KERN_NOTICE "\nError: %s - mvmflashWpRegionSet failed",__FUNCTION__);
+		return -1;
+	}
+	
+	printk("\nNotice: Marvell flash (%s) lock per sector is not supported!\n        Locking the whole device.", mtd->name);
+		
+	return 0;
+}
+
+static int mflash_unlock (struct mtd_info *mtd, loff_t ofs, size_t len)
+{
+	struct map_info *map = mtd->priv;
+	MV_MFLASH_INFO *mflash = map->fldrv_priv;
+
+	DB(printk("\nINFO: %s called", __FUNCTION__));
+	
+	if (mvMFlashWriteProtectSet(mflash, MV_FALSE) != MV_OK)
+	{
+		printk(KERN_NOTICE "\nError: %s - mvmflashWpRegionSet failed",__FUNCTION__);
+		return -1;
+	}
+		
+	printk("\nNotice: Marvell flash (%s) unlock per sector is not supported!\n        Unlocking the whole device.", mtd->name);
+	return 0;
+}
+
+static void mflash_sync(struct mtd_info *mtd)
+{
+	DB(printk("\nINFO: %s called - DUMMY", __FUNCTION__));
+}
+
+static int mflash_suspend(struct mtd_info *mtd)
+{
+	DB(printk("\nINFO: %s called - DUMMY()", __FUNCTION__));
+	return 0;
+}
+
+static void mflash_resume(struct mtd_info *mtd)
+{
+	DB(printk("\nINFO: %s called - DUMMY", __FUNCTION__));
+}
+
+static int mflash_block_isbad (struct mtd_info *mtd, loff_t ofs)
+{
+	DB(printk("\nINFO: %s called - DUMMY", __FUNCTION__));
+	return 0;
+}
+
+static int mflash_block_markbad (struct mtd_info *mtd, loff_t ofs)
+{
+	DB(printk("\nINFO: %s called - DUMMY", __FUNCTION__));
+	return 0;
+}
+
+static int __init mflash_probe_init(void)
+{
+	DB(printk("\nINFO: %s - MTD mflash chip driver.", __FUNCTION__));
+
+	register_mtd_chip_driver(&mflash_chipdrv);
+
+	return 0;
+}
+
+static void __exit mflash_probe_exit(void)
+{
+	DB(printk(KERN_ALERT "\nINFO: %s - MTD mflash driver exit", __FUNCTION__));
+	unregister_mtd_chip_driver(&mflash_chipdrv);
+}
+
+module_init(mflash_probe_init);
+module_exit(mflash_probe_exit);
+
+MODULE_LICENSE("Dual BSD/GPL");
+MODULE_DESCRIPTION("MTD chip driver for the Marvell SUNOL flash device");
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_mtd/sflash.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_mtd/sflash.c
@@ -0,0 +1,362 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************/
+
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/sched.h>
+#include <linux/errno.h>
+#include <linux/interrupt.h>
+#include <linux/mtd/map.h>
+#include <linux/mtd/mtd.h>
+#include "sflash/mvSFlash.h"
+#include "sflash/mvSFlashSpec.h"
+#include "ctrlEnv/mvCtrlEnvLib.h"
+
+/*#define MTD_SFLASH_DEBUG*/
+
+#ifdef MTD_SFLASH_DEBUG
+#define DB(x)	x
+#else
+#define DB(x)
+#endif
+
+
+/* Configuration options */
+static struct mtd_info *sflash_probe(struct map_info *map);
+static void sflash_destroy(struct mtd_info *mtd);
+static int sflash_read(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf);
+static int sflash_write(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, const u_char *buf);
+static int sflash_erase(struct mtd_info *mtd, struct erase_info *instr);
+static void sflash_sync(struct mtd_info *mtd);
+static int sflash_suspend(struct mtd_info *mtd);
+static void sflash_resume(struct mtd_info *mtd);
+static int sflash_lock (struct mtd_info *mtd, loff_t ofs, size_t len);
+static int sflash_unlock (struct mtd_info *mtd, loff_t ofs, size_t len);
+static int sflash_block_isbad (struct mtd_info *mtd, loff_t ofs);
+static int sflash_block_markbad (struct mtd_info *mtd, loff_t ofs);
+
+static struct mtd_chip_driver sflash_chipdrv = {
+	.probe		= sflash_probe,
+	.destroy	= sflash_destroy,
+	.name		= "sflash",
+	.module		= THIS_MODULE
+};
+
+
+static struct mtd_info *sflash_probe(struct map_info *map)
+{
+	struct mtd_info *mtd = NULL;
+	MV_SFLASH_INFO *sflash = NULL;
+	
+	DB(printk("\nINFO: entering %s",__FUNCTION__));
+
+	/* allocate the memory for the mtd_info */
+	mtd = kmalloc(sizeof(*mtd), GFP_KERNEL);
+	if(!mtd)
+	{
+		printk(KERN_NOTICE "\nERROR: %s - Failed to allocate memory for mtd structure",__FUNCTION__);
+		return NULL;
+	}
+
+	/* allocate memory for the sflash private structure */
+	sflash = kmalloc(sizeof(MV_SFLASH_INFO), GFP_KERNEL);
+	if(!sflash) 
+	{
+		printk(KERN_NOTICE "\nERROR: %s - Failed to allocate memory for sflash structure",__FUNCTION__);
+		kfree(mtd);
+		return NULL;
+	}
+		
+	/* clear both structures before usage */
+	memset(mtd, 0, sizeof(*mtd));
+	memset(sflash, 0, sizeof(*sflash));
+	    
+	DB(printk("\nINFO: %s - Base address %08x",__FUNCTION__, sflash->baseAddr));
+#ifdef CONFIG_ARCH_FEROCEON_ORION	
+	/* First check that SPI bus mode is configured to connect to an external SFlash */
+    if (mvCtrlSpiBusModeDetect() != MV_SPI_CONN_TO_EXT_FLASH)
+    {
+        printk(KERN_NOTICE "\nERROR: %s - SPI interface is not routed to external SPI flash!", __FUNCTION__);
+		kfree(mtd);
+		kfree(sflash);
+		return NULL;
+    }
+#endif
+	/* Try to detect the flash and initialize it over SPI */	
+	sflash->baseAddr         = map->phys;
+    sflash->index            = MV_INVALID_DEVICE_NUMBER; /* will be detected in init */	
+	if (mvSFlashInit(sflash) != MV_OK)
+	{
+		printk(KERN_NOTICE "ERROR: %s - Failed to initialize the SFlash.", __FUNCTION__);
+		kfree(mtd);
+		kfree(sflash);
+		return NULL;
+	}
+	
+	/* After success fill in the MTD structure with the appropriate info */
+	mtd->erasesize = sflash->sectorSize;
+	mtd->size = sflash->sectorSize * sflash->sectorNumber;
+	mtd->priv = map; /*sflash;*/
+	mtd->type = MTD_NORFLASH;
+	mtd->erase = sflash_erase;
+	mtd->read = sflash_read;
+	mtd->write = sflash_write;
+	mtd->sync = sflash_sync;
+	mtd->suspend = sflash_suspend;
+	mtd->resume = sflash_resume;	
+	mtd->lock = sflash_lock;
+	mtd->unlock = sflash_unlock;
+	mtd->block_isbad = sflash_block_isbad;
+	mtd->block_markbad = sflash_block_markbad;	
+	mtd->flags = (MTD_WRITEABLE | MTD_BIT_WRITEABLE); /* just like MTD_CAP_NORFLASH */
+	mtd->name = map->name;
+	mtd->writesize = 1;
+	
+	map->fldrv = &sflash_chipdrv;
+	map->fldrv_priv = sflash;
+	
+	/* Print some debug messages with the detected sflash info */
+	DB(printk("\nINFO: %s - Detected SFlash device (size %d)", __FUNCTION__, mtd->size));
+	DB(printk("\n           Base Address    : 0x%08x", sflash->baseAddr));
+	DB(printk("\n           Manufacturer ID : 0x%02x", sflash->manufacturerId));
+	DB(printk("\n           Device ID       : 0x%04x", sflash->deviceId));
+	DB(printk("\n           Sector Size     : 0x%x", sflash->sectorSize));
+	DB(printk("\n           Sector Number   : %d", sflash->sectorNumber));
+	
+	printk("SPI Serial flash detected @ 0x%08x, %dKB (%dsec x %dKB)\n",
+	         sflash->baseAddr, ((sflash->sectorNumber * sflash->sectorSize)/1024), 
+	         sflash->sectorNumber, (sflash->sectorSize/1024));
+	
+	__module_get(THIS_MODULE);
+	return mtd;
+}
+
+static void sflash_destroy(struct mtd_info *mtd)
+{
+	struct map_info *map = mtd->priv;
+	MV_SFLASH_INFO *sflash = map->fldrv_priv;
+
+	DB(printk("\nINFO: %s called", __FUNCTION__));
+
+	/* free memory allocated at probe for the private sflash structure */
+	if (sflash)
+		kfree(sflash);	
+}
+
+static int sflash_read(struct mtd_info *mtd, loff_t from, size_t len,
+	size_t *retlen, u_char *buf)
+{
+	struct map_info *map = mtd->priv;
+	MV_SFLASH_INFO *sflash = map->fldrv_priv;
+	MV_U32 offset = ((MV_U32)from);
+	
+	*retlen = 0;
+
+	DB(printk("\nINFO: %s  - offset %08x, len %d",__FUNCTION__, offset, (int)len));
+		
+	if (mvSFlashBlockRd(sflash, offset, buf, len) != MV_OK)
+	{
+		printk(KERN_NOTICE "\nERROR: %s - Failed to read block.", __FUNCTION__);
+		return -1;
+	}
+	
+	*retlen = len;
+	
+	DB(printk(" - OK"));
+
+	return 0;	
+}
+
+static int sflash_write(struct mtd_info *mtd, loff_t to, size_t len,
+	size_t *retlen, const u_char *buf)
+{
+	struct map_info *map = mtd->priv;
+	MV_SFLASH_INFO *sflash = map->fldrv_priv;
+/*	MV_SFLASH_INFO *sflash = mtd->priv;*/
+	MV_U32 offset = ((MV_U32)to);
+	
+	*retlen = 0;
+	
+	DB(printk("\nINFO: %s - offset %08x, len %d",__FUNCTION__, offset, len));
+		
+	if (mvSFlashBlockWr(sflash, offset, (MV_U8*)buf, len) != MV_OK)
+	{
+		printk(KERN_NOTICE "\nERROR: %s - Failed to write block", __FUNCTION__);
+		return -1;
+	}
+	
+	*retlen = len;
+	
+	DB(printk(" - OK"));
+
+	return 0;	
+
+}
+
+
+static int sflash_erase(struct mtd_info *mtd, struct erase_info *instr)
+{
+	struct map_info *map = mtd->priv;
+	MV_SFLASH_INFO *sflash = map->fldrv_priv;
+/*	MV_SFLASH_INFO *sflash = mtd->priv;*/
+	MV_U32 fsec, lsec;
+	int i;
+
+	DB(printk("\nINFO: %s - Addr %08x, len %d",__FUNCTION__, instr->addr, instr->len));
+	
+	if(instr->addr & (mtd->erasesize - 1))
+	{
+		printk(KERN_NOTICE "\nError: %s - Erase address not sector alligned",__FUNCTION__);
+		return -EINVAL;
+	}
+	if(instr->len & (mtd->erasesize - 1))
+	{
+		printk(KERN_NOTICE "\nError: %s - Erase length is not sector alligned",__FUNCTION__);
+		return -EINVAL;
+	}
+	if(instr->len + instr->addr > mtd->size)
+	{
+		printk(KERN_NOTICE "\nError: %s - Erase exceeded flash size",__FUNCTION__);
+		return -EINVAL;
+	}
+
+	fsec = (instr->addr / mtd->erasesize);
+	lsec = (fsec +(instr->len / mtd->erasesize));
+	
+	DB(printk("\nINFO: %s - from sector %u to %u",__FUNCTION__, fsec, 
+		  lsec-1));
+	
+	for (i=fsec; i<lsec; i++)
+	{
+		if (mvSFlashSectorErase(sflash, i) != MV_OK)
+		{
+			printk(KERN_NOTICE "\nError: %s - mvSFlashSectorErase on sector %d",__FUNCTION__, i);
+			return -1;
+		}
+	}
+	
+	instr->state = MTD_ERASE_DONE;
+	mtd_erase_callback(instr);
+
+	return 0;
+}
+
+static int sflash_lock (struct mtd_info *mtd, loff_t ofs, size_t len)
+{
+	struct map_info *map = mtd->priv;
+	MV_SFLASH_INFO *sflash = map->fldrv_priv;
+/*	MV_SFLASH_INFO *sflash = mtd->priv;*/
+	
+	DB(printk("\nINFO: %s called", __FUNCTION__));
+	
+	if (mvSFlashWpRegionSet(sflash, MV_WP_ALL) != MV_OK)
+	{
+		printk(KERN_NOTICE "\nError: %s - mvSFlashWpRegionSet failed",__FUNCTION__);
+		return -1;
+	}
+	
+	printk("\nNotice: Serial SPI flash (%s) lock per sector is not supported!\n        Locking the whole device.", mtd->name);
+		
+	return 0;
+}
+
+static int sflash_unlock (struct mtd_info *mtd, loff_t ofs, size_t len)
+{
+	struct map_info *map = mtd->priv;
+	MV_SFLASH_INFO *sflash = map->fldrv_priv;
+/*	MV_SFLASH_INFO *sflash = mtd->priv;*/
+
+	DB(printk("\nINFO: %s called", __FUNCTION__));
+	
+	if (mvSFlashWpRegionSet(sflash, MV_WP_NONE) != MV_OK)
+	{
+		printk(KERN_NOTICE "\nError: %s - mvSFlashWpRegionSet failed",__FUNCTION__);
+		return -1;
+	}
+		
+	printk("\nNotice: Serial SPI flash (%s) unlock per sector is not supported!\n        Unlocking the whole device.", mtd->name);
+	return 0;
+}
+
+static void sflash_sync(struct mtd_info *mtd)
+{
+	DB(printk("\nINFO: %s called - DUMMY", __FUNCTION__));
+}
+
+static int sflash_suspend(struct mtd_info *mtd)
+{
+	DB(printk("\nINFO: %s called - DUMMY()", __FUNCTION__));
+	return 0;
+}
+
+static void sflash_resume(struct mtd_info *mtd)
+{
+	DB(printk("\nINFO: %s called - DUMMY", __FUNCTION__));
+}
+
+static int sflash_block_isbad (struct mtd_info *mtd, loff_t ofs)
+{
+	DB(printk("\nINFO: %s called - DUMMY", __FUNCTION__));
+	return 0;
+}
+
+static int sflash_block_markbad (struct mtd_info *mtd, loff_t ofs)
+{
+	DB(printk("\nINFO: %s called - DUMMY", __FUNCTION__));
+	return 0;
+}
+
+static int __init sflash_probe_init(void)
+{
+	DB(printk("\nINFO: %s - MTD SFlash chip driver.\n", __FUNCTION__));
+
+	register_mtd_chip_driver(&sflash_chipdrv);
+
+	return 0;
+}
+
+static void __exit sflash_probe_exit(void)
+{
+	DB(printk(KERN_ALERT "\nINFO: %s - MTD SFlash driver exit", __FUNCTION__));
+	unregister_mtd_chip_driver(&sflash_chipdrv);
+}
+
+module_init(sflash_probe_init);
+module_exit(sflash_probe_exit);
+
+MODULE_LICENSE("Dual BSD/GPL");
+MODULE_DESCRIPTION("MTD chip driver for the SPI serial flash device");
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_mtd/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_mtd/Makefile
@@ -0,0 +1,17 @@
+
+ifeq ($(CONFIG_ARCH_FEROCEON_ORION),y)
+	include $(srctree)/arch/arm/mach-feroceon-orion/config/mvRules.mk
+endif
+ 
+ifeq ($(CONFIG_ARCH_FEROCEON_KW),y)
+	include $(srctree)/arch/arm/mach-feroceon-kw/config/mvRules.mk
+endif
+
+ifeq ($(CONFIG_ARCH_FEROCEON_MV78XX0),y)
+	include $(srctree)/arch/arm/mach-feroceon-kw/config/mvRules.mk
+endif
+
+
+obj-$(CONFIG_MV_INCLUDE_SFLASH_MTD) += sflash.o
+obj-$(CONFIG_MV_INCLUDE_MFLASH_MTD) += mflash.o
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_dma/Kconfig
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_dma/Kconfig
@@ -0,0 +1,55 @@
+config MV_USE_IDMA_ENGINE
+        bool "Use the IDMA engine to offload CPU tasks"   
+        depends on (MV_INCLUDE_IDMA && !MV_USE_XOR_ENGINE) && EXPERIMENTAL
+        default n
+        help
+            Say Y of you want to use the IDMA engine to offload some of the 
+            CPU tasks.
+
+config MV_IDMA_COPYUSER
+        bool "Use the IDMA enignes to accelerate the copy_to_user() and copy_from_user functions"
+        depends on (MV_USE_IDMA_ENGINE) && (!MV_USE_XOR_FOR_COPY_USER_BUFFERS)
+        default n
+        help
+          Say Y here if you want to use the IDMA engine to perform
+          copy_to_user() and copy_from_user() functionality.
+
+config MV_IDMA_COPYUSER_THRESHOLD
+        int "Minimum number of bytes to use IDMA acceleration for copy_to_user() and copy_from_user()"
+        depends on MV_IDMA_COPYUSER
+        default "1260"
+        help
+          This is the minimum buffer size needed in order to operate the IDMA engine
+          for accelerating the copy_to_user() and copy_from_user() operations
+
+config MV_IDMA_MEMZERO
+        bool "Use the IDMA to accelerate memzero"
+        depends on (MV_USE_IDMA_ENGINE) && (!MV_XORMEMZERO)
+        default n
+        help
+          Say Y here if you want to use the IDMA engine to perform the memzero.
+
+config MV_IDMA_MEMZERO_THRESHOLD
+        int "Minimum number of bytes to use IDMA acceleration for memzero()"
+        depends on MV_IDMA_MEMZERO
+        default "192"
+        help
+          This is the minimum buffer size needed in order to operate the IDMA engine
+          for accelerating the memzero operation
+
+config MV_IDMA_MEMCOPY
+        bool "Use the IDMA to accelerate memcpy and memmove"
+        depends on (MV_USE_IDMA_ENGINE) && (!MV_XORMEMCOPY)
+        default n
+        help
+          Say Y here if you want to use the IDMA engine to perform the memcpy 
+          and memmove.
+
+config MV_IDMA_MEMCOPY_THRESHOLD
+        int "Minimum number of bytes to use IDMA acceleration for memcpy()"
+        depends on MV_IDMA_MEMCOPY
+        default "128"
+        help
+          This is the minimum buffer size needed in order to operate the IDMA engine
+          for accelerating the memcpy() and memmove() operations
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_dma/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_dma/Makefile
@@ -0,0 +1,15 @@
+#
+# Makefile for the Marvell DMA Driver
+#
+
+ifeq ($(CONFIG_ARCH_FEROCEON_ORION),y)
+	include $(srctree)/arch/arm/mach-feroceon-orion/config/mvRules.mk
+endif
+
+ifeq ($(CONFIG_ARCH_FEROCEON_MV78XX0),y)
+	include $(srctree)/arch/arm/mach-feroceon-mv78xx0/config/mvRules.mk
+endif
+
+obj-$(CONFIG_MV_USE_IDMA_ENGINE) += mv_dma.o 
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_dma/mv_dma.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_dma/mv_dma.c
@@ -0,0 +1,776 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/list.h>
+#include <linux/device.h>
+#include <linux/slab.h>
+#include <linux/string.h>
+#include <linux/sysdev.h>
+#include <asm/mach/time.h>
+#include <asm/uaccess.h>
+#include <linux/proc_fs.h>
+
+#include "idma/mvIdma.h"
+
+#undef DEBUG
+//#define DEBUG
+
+#ifdef DEBUG
+	#define DPRINTK(s, args...)  printk("MV_DMA: " s, ## args)
+#else
+	#define DPRINTK(s, args...)
+#endif
+
+#undef CPY_USE_DESC
+#undef RT_DEBUG
+#define RT_DEBUG
+
+#define CPY_IDMA_CTRL_LOW_VALUE      ICCLR_DST_BURST_LIM_128BYTE   \
+                                    | ICCLR_SRC_BURST_LIM_128BYTE   \
+                                    | ICCLR_INT_MODE_MASK           \
+                                    | ICCLR_BLOCK_MODE              \
+                                    | ICCLR_CHAN_ENABLE             \
+                                    | ICCLR_DESC_MODE_16M
+
+#define CPY_CHAN1	2
+#define CPY_CHAN2	3
+
+#define CPY_DMA_TIMEOUT	0x100000
+
+#define NEXT_CHANNEL(channel) ((CPY_CHAN1 + CPY_CHAN2) - (channel))
+#define PREV_CHANNEL(channel) NEXT_CHANNEL(channel)
+static MV_U32 current_dma_channel =  CPY_CHAN1;
+static int idma_init = 0;
+static int idma_busy = 0;
+
+#ifdef RT_DEBUG
+static int dma_wait_loops = 0;
+#endif
+
+#ifdef CONFIG_MV_IDMA_MEMZERO
+#define	DMA_MEMZERO_CHUNK    0x80 /*128*/    /* this is based on the size of the DST and SRC burst limits */
+static MV_U8	dmaMemInitBuff[DMA_MEMZERO_CHUNK] __attribute__(( aligned(128) ));
+#endif
+
+#define IDMA_MIN_COPY_CHUNK CONFIG_MV_IDMA_COPYUSER_THRESHOLD
+
+static inline u32 page_remainder(u32 virt)
+{
+	return PAGE_SIZE - (virt & ~PAGE_MASK);
+}
+
+/*
+ * map a kernel virtual address or kernel logical address to a phys address
+ */
+static inline u32 physical_address(u32 virt, int write)
+{
+    struct page *page;
+       /* kernel static-mapped address */
+    DPRINTK(" get physical address: virt %x , write %d\n", virt, write);
+    if (virt_addr_valid(virt)) 
+    {
+        return __pa((u32) virt);
+    }
+    if (virt >= high_memory)
+	    return 0;
+    
+    if (virt >= TASK_SIZE)
+    {
+        page = follow_page(find_extend_vma(&init_mm, virt), (u32) virt, write);
+    }
+    else
+    {
+        page = follow_page(find_extend_vma(current->mm, virt), (u32) virt, write);
+    }
+    
+    if (pfn_valid(page_to_pfn(page)))
+    {
+        return ((page_to_pfn(page) << PAGE_SHIFT) |
+                       ((u32) virt & (PAGE_SIZE - 1)));
+    }
+    else
+    {
+        return 0;
+    }
+}
+
+unsigned int wait_for_idma(MV_U32   channel)
+{
+	u32 timeout = 0;
+
+	/* wait for completion */
+        while( mvDmaStateGet(channel) != MV_IDLE )
+	{
+		DPRINTK(" ctrl low is %x \n", MV_REG_READ(IDMA_CTRL_LOW_REG(channel)));
+		//udelay(1);
+#ifdef RT_DEBUG
+                dma_wait_loops++; 
+#endif
+		if(timeout++ > CPY_DMA_TIMEOUT)
+                {
+		    printk("dma_copy: IDMA %d timed out , ctrl low is %x \n",
+                    channel, MV_REG_READ(IDMA_CTRL_LOW_REG(channel)));
+                    return 1;
+                }		
+	}
+	DPRINTK("IDMA complete in %x \n", timeout);
+	return 0;
+}
+
+static struct proc_dir_entry *dma_proc_entry;
+static int dma_to_user = 0;
+static int dma_from_user = 0;
+static int dma_memcpy_cnt = 0;
+static int dma_memzero_cnt = 0;
+#ifdef RT_DEBUG
+static int dma_activations = 0;
+#endif
+static int dma_read_proc(char *, char **, off_t, int, int *, void *);
+
+static int dma_read_proc(char *buf, char **start, off_t offset, int len,
+						 int *eof, void *data)
+{
+	len = 0;
+#ifdef CONFIG_MV_IDMA_COPYUSER
+        len += sprintf(buf + len, "DMA min buffer size for copy to/from user %d\n", COPYUSER_MIN_SIZE);
+#endif
+#ifdef CONFIG_MV_IDMA_MEMCOPY
+	len += sprintf(buf + len, "DMA min buffer size for memcpy and memmove %d\n", CONFIG_MV_IDMA_MEMCOPY_THRESHOLD);
+#endif
+#ifdef CONFIG_MV_IDMA_MEMZERO
+	len += sprintf(buf + len, "DMA min buffer size for memzero %d\n", CONFIG_MV_IDMA_MEMZERO_THRESHOLD);
+#endif
+	len += sprintf(buf + len, "Number of DMA copy to user %d copy from user %d \n", dma_to_user, dma_from_user);
+	len += sprintf(buf + len, "Number of DMA memzero %d \n", dma_memzero_cnt);
+	len += sprintf(buf + len, "Number of DMA memcpy %d \n", dma_memcpy_cnt);
+#ifdef RT_DEBUG
+	len += sprintf(buf + len, "Number of dma activations %d\n", dma_activations);
+	len += sprintf(buf + len, "Number of wait for dma loops %d\n", dma_wait_loops);
+#endif
+        
+	return len;
+}
+#ifdef CONFIG_MV_IDMA_COPYUSER
+/*=======================================================================*/
+/*  Procedure:  dma_copy()                                               */
+/*                                                                       */
+/*  Description:    DMA-based copy_to_user.                              */
+/*                                                                       */
+/*  Parameters:  to: destination address                                 */
+/*               from: source address                                    */
+/*               n: number of bytes to transfer (n must be greater       */
+/*                   equal than 64)                                     */
+/*		 to_user: (1) Copy TO user (0) Copy FROM user	 	 */
+/*                                                                       */
+/*  Returns:     unsigned long: number of bytes NOT copied               */
+/*                                                                       */
+/*=======================================================================*/
+static unsigned long dma_copy(void *to, const void *from, unsigned long n, unsigned int to_user)
+{
+	u32 chunk,i;
+	u32 k_chunk = 0;
+	u32 u_chunk = 0;
+	u32 phys_from, phys_to;
+	
+        unsigned long flags;
+	u32 unaligned_to;
+	u32 index = 0;
+        u32 temp;
+
+        unsigned long uaddr, kaddr;
+        unsigned char kaddr_kernel_static = 0;
+	DPRINTK("dma_copy: entering\n");
+
+
+	/* 
+      	 * The unaligned is taken care seperatly since the dst might be part of a cache line that is changed 
+	 * by other process -> we must not invalidate this cache lines and we can't also flush it, since other 
+	 * process (or the exception handler) might fetch the cache line before we copied it. 
+	 */
+
+	/*
+	 * Ok, start addr is not cache line-aligned, so we need to make it so.
+	 */
+	unaligned_to = (u32)to & 31;
+	if(unaligned_to)
+	{
+		DPRINTK("Fixing up starting address %d bytes\n", 32 - unaligned_to);
+
+		if(to_user)
+			__arch_copy_to_user(to, from, 32 - unaligned_to);
+		else
+			__arch_copy_from_user(to, from, 32 - unaligned_to);
+
+		temp = (u32)to + (32 - unaligned_to);
+		to = (void *)temp;
+		temp = (u32)from + (32 - unaligned_to);
+		from = (void *)temp;
+
+                /*it's ok, n supposed to be greater than 32 bytes at this point*/
+		n -= (32 - unaligned_to);
+	}
+
+	/*
+	 * Ok, we're aligned at the top, now let's check the end
+	 * of the buffer and align that. After this we should have
+	 * a block that is a multiple of cache line size.
+	 */
+	unaligned_to = ((u32)to + n) & 31;
+	if(unaligned_to)
+	{	
+		u32 tmp_to = (u32)to + (n - unaligned_to);
+		u32 tmp_from = (u32)from + (n - unaligned_to);
+		DPRINTK("Fixing ending alignment %d bytes\n", unaligned_to);
+
+		if(to_user)
+			__arch_copy_to_user((void *)tmp_to, (void *)tmp_from, unaligned_to);
+		else
+			__arch_copy_from_user((void *)tmp_to, (void *)tmp_from, unaligned_to);
+
+                /*it's ok, n supposed to be greater than 32 bytes at this point*/
+		n -= unaligned_to;
+	}
+
+        if(to_user)
+        {
+            uaddr = (unsigned long)to;  
+            kaddr = (unsigned long)from;
+        }
+        else
+        {
+             uaddr = (unsigned long)from;
+             kaddr = (unsigned long)to;
+        }
+        if(virt_addr_valid(kaddr))
+        {
+            kaddr_kernel_static = 1;
+            k_chunk = n;
+        }
+	else
+	{
+		DPRINTK("kernel address is not linear, fall back\n");
+		goto exit_dma;
+	}
+         
+        spin_lock_irqsave(&current->mm->page_table_lock, flags);
+	if (idma_busy)
+	{
+	    BUG();
+	}
+	idma_busy = 1;
+     
+        i = 0;
+	while(n > 0)
+	{
+	    if(k_chunk == 0)
+	    {
+                /* virtual address */
+	        k_chunk = page_remainder((u32)kaddr);
+		DPRINTK("kaddr reminder %d \n",k_chunk);
+	    }
+
+	    if(u_chunk == 0)
+	    {
+                u_chunk = page_remainder((u32)uaddr);
+                DPRINTK("uaddr reminder %d \n", u_chunk);
+            }
+        
+            chunk = ((u_chunk < k_chunk) ? u_chunk : k_chunk);
+            if(n < chunk)
+	    {
+		chunk = n;
+	    }
+
+	    if(chunk == 0)
+	    {
+	    	break;
+	    }
+            phys_from = physical_address((u32)from, 0);
+            phys_to = physical_address((u32)to, 1);
+	    DPRINTK("choose chunk %d \n",chunk);
+	    /*
+	     *  Prepare the IDMA.
+	     */
+            if (chunk < IDMA_MIN_COPY_CHUNK)
+            {
+        	DPRINTK(" chunk %d too small , use memcpy \n",chunk);
+                /* the "to" address might cross cache line boundary, so part of the line*/  
+                /* may be subject to DMA, so we need to wait to last DMA engine to finish */
+                if (index > 0)
+                {
+                    if(wait_for_idma(PREV_CHANNEL(current_dma_channel)))
+                    {
+	                BUG();
+                    }
+                }
+                
+        	if(to_user)
+	       	    __arch_copy_to_user((void *)to, (void *)from, chunk);
+	        else
+		    __arch_copy_from_user((void *)to, (void *)from, chunk);
+            }
+            else if ((!phys_from) || (!phys_to))
+            {
+                /* The requested page isn't available, fall back to */
+                DPRINTK(" no physical address, fall back: from %p , to %p \n", from, to);
+                goto wait_for_idmas;
+   
+            }
+            else
+            {
+                /* 
+	 	 * Ensure that the cache is clean:
+	 	 *      - from range must be cleaned
+        	 *      - to range must be invalidated
+	         */
+		dmac_flush_range(from, from + chunk);
+		dmac_inv_range(to, to + chunk);
+               
+               	    if(index > 1)
+		    {
+		        if(wait_for_idma(current_dma_channel))
+                        {
+		            BUG(); 
+                            goto unlock_dma;
+                        }
+                    }
+		    /* Start DMA */
+                    DPRINTK(" activate DMA: channel %d from %x to %x len %x\n",
+                            current_dma_channel, phys_from, phys_to, chunk);
+		    mvDmaTransfer(current_dma_channel, phys_from, phys_to, chunk, 0);
+                    current_dma_channel = NEXT_CHANNEL(current_dma_channel); 
+#ifdef RT_DEBUG
+                    dma_activations++;
+#endif
+		    index++;
+                }
+                
+
+		/* go to next chunk */
+		from += chunk;
+		to += chunk;
+                kaddr += chunk;
+                uaddr += chunk;
+		n -= chunk;
+		u_chunk -= chunk;
+		k_chunk -= chunk;		
+	}
+        
+wait_for_idmas:
+        if (index > 1)
+        {
+	    if(wait_for_idma(current_dma_channel))
+            {
+	        BUG(); 
+            }
+        }
+
+        if (index > 0)
+        {
+            if(wait_for_idma(PREV_CHANNEL(current_dma_channel)))
+            {
+	        BUG();
+            }
+        }
+
+unlock_dma:    
+	idma_busy = 0;    
+        spin_unlock_irqrestore(&current->mm->page_table_lock, flags);
+ exit_dma:
+        
+        DPRINTK("dma_copy(0x%x, 0x%x, %lu): exiting\n", (u32) to,
+                (u32) from, n);
+       
+
+        if(n != 0)
+        {
+       	    if(to_user)
+                return __arch_copy_to_user((void *)to, (void *)from, n);
+	            else
+                return __arch_copy_from_user((void *)to, (void *)from, n);
+        }
+        return 0;
+}
+
+/*=======================================================================*/
+/*  Procedure:  dma_copy_to_user()                                       */
+/*                                                                       */
+/*  Description:    DMA-based copy_to_user.                              */
+/*                                                                       */
+/*  Parameters:  to: destination address                                 */
+/*               from: source address                                    */
+/*               n: number of bytes to transfer                          */
+/*                                                                       */
+/*  Returns:     unsigned long: number of bytes NOT copied               */
+/*                                                                       */
+/*  Notes/Assumptions:                                                   */
+/*              Assumes that kernel physical memory is contiguous, i.e., */
+/*              the physical addresses of contiguous virtual addresses   */
+/*              are also contiguous.                                     */
+/*              Assumes that kernel memory doesn't get paged.            */
+/*              Assumes that to/from memory regions cannot overlap       */
+/*                                                                       */
+/*=======================================================================*/
+unsigned long dma_copy_to_user(void *to, const void *from, unsigned long n)
+{
+	if(!idma_init)
+    		return __arch_copy_to_user((void *)to, (void *)from, n);
+
+     	dma_to_user++;
+     	DPRINTK(KERN_CRIT "dma_copy_to_user(%#10x, 0x%#10x, %lu): entering\n", (u32) to, (u32) from, n);
+    
+        return  dma_copy(to, from, n, 1);
+}
+
+/*=======================================================================*/
+/*  Procedure:  dma_copy_from_user()                                     */
+/*                                                                       */
+/*  Description:    DMA-based copy_from_user.                            */
+/*                                                                       */
+/*  Parameters:  to: destination address                                 */
+/*               from: source address                                    */
+/*               n: number of bytes to transfer                          */
+/*                                                                       */
+/*  Returns:     unsigned long: number of bytes NOT copied               */
+/*                                                                       */
+/*  Notes/Assumptions:                                                   */
+/*              Assumes that kernel virtual memory is contiguous, i.e.,  */
+/*              the physical addresses of contiguous virtual addresses   */
+/*              are also contiguous.                                     */
+/*              Assumes that kernel memory doesn't get paged.            */
+/*              Assumes that to/from memory regions cannot overlap       */
+/*              XXX this one doesn't quite work right yet                */
+/*                                                                       */
+/*=======================================================================*/
+unsigned long dma_copy_from_user(void *to, const void *from, unsigned long n)
+{
+	if(!idma_init)
+		return __arch_copy_from_user((void *)to, (void *)from, n);
+
+	dma_from_user++;
+	DPRINTK(KERN_CRIT "dma_copy_from_user(0x%x, 0x%x, %lu): entering\n", (u32) to, (u32) from, n);
+	return  dma_copy(to, from, n, 0);
+}
+
+#endif /* CONFIG_MV_IDMA_COPYUSER */
+
+#ifdef CONFIG_MV_IDMA_MEMZERO
+/*=======================================================================*/
+/*  Procedure:  dma_memzero()                                             */
+/*                                                                       */
+/*  Description:    DMA-based in-kernel memzero.                          */
+/*                                                                       */
+/*  Parameters:  to: destination address                                 */
+/*               n: number of bytes to transfer                          */
+/*                                                                       */
+/*  Notes/Assumptions:                                                   */
+/*              Assumes that kernel physical memory is contiguous, i.e., */
+/*              the physical addresses of contiguous virtual addresses   */
+/*              are also contiguous.                                     */
+/*              Assumes that kernel memory doesn't get paged.            */
+/*              The DMA is polling                                       */
+/*                                                                       */
+/*=======================================================================*/
+void dma_memzero(void *to, __kernel_size_t n)
+{
+	u32 phys_from, phys_to;	
+	u32 unaligned_to;
+	unsigned long flags;	
+
+	DPRINTK("dma_memcopy: entering\n");
+
+	/* This is used in the very early stages */
+	if(!idma_init)
+    		return asm_memzero(to ,n);
+
+	/* Fallback for the case that one or both buffers are not physically contiguous  */
+	if(!virt_addr_valid(to))
+        {
+		DPRINTK("Failing back to asm_memzero because of limitations\n");
+            return asm_memzero(to ,n);
+        }	
+
+	++dma_memzero_cnt;	
+
+	/*
+	 * If buffer start addr is not cache line-aligned, so we need to make it so.
+	 */
+	unaligned_to = (u32)to & 31;
+	if(unaligned_to)
+	{
+		DPRINTK("Fixing up starting address %d bytes\n", 32 - unaligned_to);
+
+		asm_memzero(to, 32 - unaligned_to);
+
+		to = (void*)((u32)to + (32 - unaligned_to));
+
+                /*it's ok, n supposed to be greater than 32 bytes at this point*/
+		n -= (32 - unaligned_to);
+	}	
+
+	/*
+	 * If buffer end addr is not cache line-aligned, so we need to make it so.
+	 */
+	unaligned_to = ((u32)to + n) & 31;
+	if(unaligned_to)
+	{	
+		u32 tmp_to = (u32)to + (n - unaligned_to);
+		DPRINTK("Fixing ending alignment %d bytes\n", unaligned_to);
+
+		asm_memzero((void *)tmp_to, unaligned_to);
+
+                /*it's ok, n supposed to be greater than 32 bytes at this point*/
+		n -= unaligned_to;
+	}
+
+	phys_from = physical_address((u32)dmaMemInitBuff, 0);
+        phys_to = physical_address((u32)to, 1);
+
+	/*
+	 *  Prepare the IDMA.
+	 */
+	if ((!phys_from) || (!phys_to))
+        {
+	    /* The requested page isn't available, fall back to */
+            DPRINTK(" no physical address, fall back: to %p \n", to);
+            return asm_memzero(to,n);
+        }
+
+        spin_lock_irqsave(&current->mm->page_table_lock, flags);
+	if (idma_busy)
+	{
+	    BUG();
+	}
+	idma_busy = 1;
+
+	/* Ensure that the destination revion is invalidated */
+	mvOsCacheInvalidate(NULL, (void *)to, n);
+	
+	/* Start DMA */
+        DPRINTK(" activate DMA: channel %d from %x with source hold to %x len %x\n",CPY_CHAN1, phys_from, phys_to, n);
+     	mvDmaMemInit(CPY_CHAN1, phys_from, phys_to, n);
+	
+#ifdef RT_DEBUG
+	dma_activations++;
+#endif
+        
+	if(wait_for_idma(CPY_CHAN1))
+        {
+	    BUG(); 
+	}	
+
+        DPRINTK("dma_memzero(0x%x, %lu): exiting\n", (u32) to, n);
+
+	idma_busy = 0;
+	spin_unlock_irqrestore(&current->mm->page_table_lock, flags);
+}
+#endif  /* CONFIG_MV_IDMA_MEMZERO */
+
+#ifdef CONFIG_MV_IDMA_MEMCOPY
+//*=======================================================================*/
+/*  Procedure:  dma_memcpy()                                             */
+/*                                                                       */
+/*  Description:    DMA-based in-kernel memcpy.                          */
+/*                                                                       */
+/*  Parameters:  to: destination address                                 */
+/*               from: source address                                    */
+/*               n: number of bytes to transfer                          */
+/*                                                                       */
+/*  Returns:     void*: to                                               */
+/*                                                                       */
+/*  Notes/Assumptions:                                                   */
+/*              Assumes that kernel physical memory is contiguous, i.e., */
+/*              the physical addresses of contiguous virtual addresses   */
+/*              are also contiguous.                                     */
+/*              Assumes that kernel memory doesn't get paged.            */
+/*              The DMA is polling                                       */
+/*		source and destination buffers can overlap(like memmove) */
+/*                                                                       */
+/*=======================================================================*/
+void *dma_memcpy(void *to, const void *from, __kernel_size_t n)
+{
+	u32 phys_from, phys_to;	
+	u32 unaligned_to;
+	unsigned long flags;
+
+	DPRINTK("dma_memcopy: entering\n");
+
+	/* This is used in the very early stages */
+	if(!idma_init)
+    		return asm_memmove(to, from,n);
+
+	/* Fallback for the case that one or both buffers are not physically contiguous  */
+	if(!virt_addr_valid(to) || !virt_addr_valid(from))
+        {
+		DPRINTK("Failing back to asm_memmove because of limitations\n");
+            return asm_memmove(to,from,n);
+        }	
+
+	/* Check for Overlap */
+	if (((to + n > from) && (to < from)) ||((from < to) && (from + n > to))) 
+	{
+		DPRINTK("overlapping copy region (0x%x, 0x%x, %lu), falling back\n",
+		     to, from, (unsigned long)n);
+		return asm_memmove(to, from, n);
+	}
+
+	++dma_memcpy_cnt;
+
+	/*
+	 * Ok, start addr is not cache line-aligned, so we need to make it so.
+	 */
+	unaligned_to = (u32)to & 31;
+	if(unaligned_to)
+	{
+		DPRINTK("Fixing up starting address %d bytes\n", 32 - unaligned_to);
+
+		asm_memmove(to, from, 32 - unaligned_to);
+
+		to = (void*)((u32)to + (32 - unaligned_to));
+		from = (void*)((u32)from + (32 - unaligned_to));
+
+                /*it's ok, n supposed to be greater than 32 bytes at this point*/
+		n -= (32 - unaligned_to);
+	}	
+
+        spin_lock_irqsave(&current->mm->page_table_lock, flags);
+	if (idma_busy)
+	{
+	    BUG();
+	}
+	idma_busy = 1;
+     
+        phys_from = physical_address((u32)from, 0);
+        phys_to = physical_address((u32)to, 1);
+	
+    	/*
+	 *  Prepare the IDMA.
+	 */
+	if ((!phys_from) || (!phys_to))
+        {
+	    /* The requested page isn't available, fall back to */
+            DPRINTK(" no physical address, fall back: from %p , to %p \n", from, to);
+	    idma_busy = 0;
+	    spin_unlock_irqrestore(&current->mm->page_table_lock, flags);
+            return asm_memmove(to, from,n);
+        }
+        else
+        {
+	    /* 
+	     * Ensure that the cache is clean:
+	     *      - from range must be cleaned
+	     *      - to range must be invalidated
+	     */
+		dmac_flush_range(from, from + n);
+		dmac_inv_range(to, to + n);
+
+               
+	    /* Start DMA */
+            DPRINTK(" activate DMA: channel %d from %x to %x len %x\n",CPY_CHAN1, phys_from, phys_to, n);
+	    mvDmaTransfer(CPY_CHAN1, phys_from, phys_to, n, 0);
+#ifdef RT_DEBUG
+                    dma_activations++;
+#endif
+	}
+        
+	if(wait_for_idma(CPY_CHAN1))
+        {
+	    BUG(); 
+	}	
+        
+        DPRINTK("dma_memcopy(0x%x, 0x%x, %lu): exiting\n", (u32) to, (u32) from, n);
+
+	idma_busy = 0;
+	spin_unlock_irqrestore(&current->mm->page_table_lock, flags);
+       
+        return 0;
+}
+
+#endif  /* CONFIG_MV_IDMA_MEMCOPY */
+
+int mv_dma_init(void)
+{
+	
+	printk(KERN_INFO "Use IDMA channels %d and %d for enhancing the following function:\n",
+                CPY_CHAN1, CPY_CHAN2);
+#ifdef CONFIG_MV_IDMA_COPYUSER
+        printk(KERN_INFO "  o Copy From/To user space operations.\n");
+#endif
+#ifdef CONFIG_MV_IDMA_MEMCOPY
+	printk(KERN_INFO "  o memcpy() and memmove() operations.\n");
+#endif
+#ifdef CONFIG_MV_IDMA_MEMZERO
+	printk(KERN_INFO "  o memzero() operations.\n");
+#endif
+
+#ifdef CONFIG_MV_IDMA_MEMZERO
+	DPRINTK(KERN_ERR "ZERO buffer address 0x%08x\n", (u32)dmaMemInitBuff);
+	
+	asm_memzero(dmaMemInitBuff, sizeof(dmaMemInitBuff));
+	dmac_flush_range(dmaMemInitBuff, dmaMemInitBuff + sizeof(dmaMemInitBuff));
+#endif
+
+        MV_REG_WRITE(IDMA_BYTE_COUNT_REG(CPY_CHAN1), 0);
+        MV_REG_WRITE(IDMA_CURR_DESC_PTR_REG(CPY_CHAN1), 0);
+        MV_REG_WRITE(IDMA_CTRL_HIGH_REG(CPY_CHAN1), ICCHR_ENDIAN_LITTLE 
+#ifdef MV_CPU_LE
+      		| ICCHR_DESC_BYTE_SWAP_EN
+#endif
+		 );
+        MV_REG_WRITE(IDMA_CTRL_LOW_REG(CPY_CHAN1), CPY_IDMA_CTRL_LOW_VALUE);
+
+        MV_REG_WRITE(IDMA_BYTE_COUNT_REG(CPY_CHAN2), 0);
+        MV_REG_WRITE(IDMA_CURR_DESC_PTR_REG(CPY_CHAN2), 0);
+        MV_REG_WRITE(IDMA_CTRL_HIGH_REG(CPY_CHAN2), ICCHR_ENDIAN_LITTLE 
+#ifdef MV_CPU_LE
+      		| ICCHR_DESC_BYTE_SWAP_EN
+#endif
+		 );
+        MV_REG_WRITE(IDMA_CTRL_LOW_REG(CPY_CHAN2), CPY_IDMA_CTRL_LOW_VALUE);
+
+        current_dma_channel = CPY_CHAN1;
+	dma_proc_entry = create_proc_entry("dma_copy", S_IFREG | S_IRUGO, 0);
+	dma_proc_entry->read_proc = dma_read_proc;
+//	dma_proc_entry->write_proc = dma_write_proc;
+	dma_proc_entry->nlink = 1;
+
+	idma_init = 1;
+
+	return 0;
+}
+
+void mv_dma_exit(void)
+{
+}
+
+module_init(mv_dma_init);
+module_exit(mv_dma_exit);
+MODULE_LICENSE(GPL);
+
+#ifdef CONFIG_MV_IDMA_MEMCOPY
+EXPORT_SYMBOL(dma_memcpy);
+#endif
+
+#ifdef CONFIG_MV_IDMA_MEMZERO
+EXPORT_SYMBOL(dma_memzero);
+#endif
+
+#ifdef CONFIG_MV_IDMA_COPYUSER
+EXPORT_SYMBOL(dma_copy_to_user);
+EXPORT_SYMBOL(dma_copy_from_user);			
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_key/mv_touch_key_slider.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_key/mv_touch_key_slider.h
@@ -0,0 +1,21 @@
+#ifndef MV_TOUCHKEY_H
+#define MV_TOUCHKEY_H
+
+
+struct mv_touch_key_platform_data {
+	int irq;
+	int code; /* input event code (KEY_*) */
+	int type; /* input event type (EV_KEY) */
+};
+
+struct mv_touch_slider_platform_data {
+	int irq;
+	int code; /* input event code (KEY_*) */
+	int type; /* input event type (EV_KEY) */
+};
+
+
+#define TOUCH_KEY_DRV_NAME "mv-touch-key"
+#define TOUCH_SLIDER_DRV_NAME "mv-touch-slider"
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_key/mv_ec_key.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_key/mv_ec_key.c
@@ -0,0 +1,455 @@
+/*
+ * Driver for keys on GPIO lines capable of generating interrupts.
+ *
+ * Copyright 2005 Phil Blundell
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+
+#include <linux/module.h>
+#include <linux/version.h>
+
+
+#include <linux/init.h>
+#include <linux/fs.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/sched.h>
+#include <linux/pm.h>
+#include <linux/sysctl.h>
+#include <linux/proc_fs.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+#include <linux/input.h>
+#include "mv_ec_key.h"
+#include <linux/i2c.h>
+#include <asm/gpio.h>
+
+
+//#define DEBUG 1
+
+/////////////////////////////////////////////////////////////////////////////////////
+//ec key
+/////////////////////////////////////////////////////////////////////////////////////
+#define NUM_EC_KEY 8
+#define EC_KEY_SLAVE_ADDR 0x2c
+#define EC_KEY_INTR_STATUS_OFFSET 0x40
+#define EC_KEY_DOWN_STATUS_OFFSET 0x41
+#define EC_KEY_UP_STATUS_OFFSET 0x42
+
+#define KEY_PRESS_INTR_CLR 0x0
+#define KEY_RELEASE_INTR_CLR 0x0
+#define KEY_PRESS_INTR 0x1
+#define KEY_RELEASE_INTR 0x2
+
+#define EC_KEY_PRESSING 0x01
+#define EC_KEY_RELEASED 0x10
+
+//#define KEY_DATA_COMMAND 0x01
+//#define FW_VERSION_COMMAND 0x16
+//#define TOUCH_KEY_ID 0x61
+//#define DUMMY_DATA 0x00
+
+
+#define POLLING_TIMER 50 //msec
+
+
+static const int ec_key_flag[NUM_EC_KEY]=
+{
+	0x01,
+	0x02,
+	0x04,
+	0x08,
+	0x10,
+	0x20,
+	0x40,
+	0x80,
+};
+
+static const int ec_key_code[NUM_EC_KEY]=
+{
+	KEY_HOME,
+	KEY_BACK,
+	KEY_UP,
+	KEY_DOWN,
+	KEY_POWER,
+	KEY_MENU,
+	KEY_F1,
+	KEY_F2,
+};
+
+#ifdef DEBUG
+static const char * ec_key_string[NUM_EC_KEY]=
+{
+	"KEY_HOME",
+	"KEY_BACK",
+	"KEY_UP",
+	"KEY_DOWN",
+	"KEY_POWER",
+	"KEY_MENU",
+	"KEY_F1",
+	"KEY_F2",
+
+};
+#endif
+
+struct ec_key
+{
+	struct input_dev *input_dev;
+
+	int ec_key_active;
+	int irq;
+
+	struct workqueue_struct *workqueue;
+	struct work_struct work;
+	struct timer_list polling_timer;
+
+	u8 key_pressing;
+
+	struct i2c_adapter      *i2c_adapter;
+	struct i2c_client *i2c_client;
+};
+
+
+/////////////////////////////////////////////////////////////////////////////////////
+//touch key
+/////////////////////////////////////////////////////////////////////////////////////
+
+static irqreturn_t ec_key_isr(int irq, void *dev_id)
+{
+	struct ec_key *ec_key = (struct ec_key *)dev_id;
+
+#ifdef DEBUG
+	printk("%s\n",__FUNCTION__);
+#endif
+
+	mod_timer(&ec_key->polling_timer, jiffies);
+	disable_irq_nosync(irq);
+	
+	return IRQ_HANDLED;
+}
+
+static void polling_timer_handler(unsigned long handle)
+{ 
+	struct ec_key *ec_key = (void *)handle;
+#ifdef DEBUG
+	printk("%s\n",__FUNCTION__);
+#endif
+	queue_work(ec_key->workqueue, &ec_key->work);
+}
+
+
+static void mv_ec_key_work(struct work_struct *work)
+{
+
+	struct ec_key *ec_key = container_of(work, struct ec_key, work);
+	unsigned char wr_cmd;
+	unsigned char wr_data;
+	unsigned char rd_data;
+	unsigned char key_status;
+
+	wr_cmd = EC_KEY_INTR_STATUS_OFFSET;
+	rd_data = i2c_smbus_read_byte_data(ec_key->i2c_client, wr_cmd);
+	if(rd_data < 0)
+	{
+		printk("EC_KEY Driver: Fail to Read I2C\n");
+		return;
+	}
+
+	if((rd_data & KEY_PRESS_INTR) || (rd_data & KEY_RELEASE_INTR)) {
+
+		if(rd_data & KEY_PRESS_INTR)
+			wr_data = KEY_PRESS_INTR_CLR;
+		else
+			wr_data = KEY_RELEASE_INTR_CLR;
+
+		// clear interrupt
+		if(i2c_smbus_write_byte_data(ec_key->i2c_client, wr_cmd, wr_data) != 0)
+		{
+			printk("EC_KEY Driver: Fail to Write I2C\n");
+			//return;
+		}
+
+		key_status = rd_data;
+
+		// key pressed
+		if(key_status & KEY_PRESS_INTR) {
+			int i = 0;
+			int key_code;
+
+			// check if ec_key still pressing
+			if(ec_key->key_pressing & EC_KEY_PRESSING) {
+#ifdef DEBUG
+				printk("ec_key still pressing\n");
+#endif
+				enable_irq(ec_key->irq);
+				return;
+			}
+
+			// read key code
+			wr_cmd = EC_KEY_DOWN_STATUS_OFFSET;
+			rd_data = i2c_smbus_read_byte_data(ec_key->i2c_client, wr_cmd);
+			if(rd_data < 0)
+			{
+				printk("EC_KEY Driver: Fail to Read I2C\n");
+				return;
+			}
+			wr_data = 0;
+			if(i2c_smbus_write_byte_data(ec_key->i2c_client, wr_cmd, wr_data) != 0)
+			{
+				printk("EC_KEY Driver: Fail to Write I2C\n");
+				//return;
+			}
+
+			key_code = rd_data;
+#ifdef DEBUG
+			printk("ec_key press read: %x\n",rd_data);
+#endif
+
+			// check which key been pressed
+			for (i=0; i<NUM_EC_KEY; i++) {
+				if(key_code == ec_key_flag[i]) {
+#ifdef DEBUG
+					printk("ec_key press: %s\n", ec_key_string[i]);
+#endif
+					input_report_key(ec_key->input_dev, ec_key_code[i], 1);
+					input_sync(ec_key->input_dev);
+					ec_key->key_pressing = EC_KEY_PRESSING;
+					break;
+				}
+			}
+		}
+
+		// key released
+		if(key_status & KEY_RELEASE_INTR) {
+			int i = 0;
+			int key_code;
+
+			// read key code
+			wr_cmd = EC_KEY_UP_STATUS_OFFSET;
+			rd_data = i2c_smbus_read_byte_data(ec_key->i2c_client, wr_cmd);
+			if(rd_data < 0)
+			{
+				printk("EC_KEY Driver: Fail to Read I2C\n");
+				return;
+			}
+			wr_data = 0;
+			if(i2c_smbus_write_byte_data(ec_key->i2c_client, wr_cmd, wr_data) != 0)
+			{
+				printk("EC_KEY Driver: Fail to Write I2C\n");
+				//return;
+			}
+
+			key_code = rd_data;
+
+#ifdef DEBUG
+			printk("ec_key release read: %x\n",rd_data);
+#endif
+
+			// check which key been released
+			for (i=0; i<NUM_EC_KEY; i++) {
+				if(key_code == ec_key_flag[i]) {
+#ifdef DEBUG
+					printk("ec_key released: %s\n", ec_key_string[i]);
+#endif
+					input_report_key(ec_key->input_dev, ec_key_code[i], 0);
+					input_sync(ec_key->input_dev);
+					ec_key->key_pressing = EC_KEY_RELEASED;
+					break;
+				}
+			}
+
+		}
+	} else {
+		// unknow status, clear interrupt
+		if (rd_data != 0) {
+			wr_data = 0;
+			if(i2c_smbus_write_byte_data(ec_key->i2c_client, wr_cmd, wr_data) != 0)
+			{
+				printk("EC_KEY Driver: Fail to Write I2C\n");
+				//return;
+			}
+		}
+
+	}
+
+	enable_irq(ec_key->irq);
+}
+
+static int mv_ec_key_init_gpio(struct ec_key *ec_key)
+{
+//	int error;
+//	int irq_gpio = ec_key->irq - IRQ_DOVE_GPIO_START;
+      
+//	error = gpio_request(irq_gpio,"TOUCH_KEY_IRQ");       
+//	if(error!=0)
+//		return -1;
+ 
+//	gpio_direction_input(irq_gpio);
+	set_irq_chip(ec_key->irq, &orion_gpio_irq_chip);
+	set_irq_handler(ec_key->irq, handle_level_irq);
+	set_irq_type(ec_key->irq, IRQ_TYPE_LEVEL_LOW);
+
+	return 0;
+}
+
+static int __devinit mv_ec_key_probe(struct i2c_client *client,
+			       const struct i2c_device_id *id)
+{
+	struct input_dev *input;
+	struct ec_key *ec_key;
+	int i;
+	int error;
+	struct i2c_adapter      *i2c_adapter = to_i2c_adapter(client->dev.parent);
+
+#ifdef DEBUG
+	printk("%s\n",__FUNCTION__);
+#endif
+
+	if (!i2c_check_functionality(i2c_adapter,
+				  I2C_FUNC_I2C))
+		return -EIO;
+
+
+//	if(touch_key_hw_init(client) != 0)
+//	{
+//		return -ENODEV;
+//	}
+
+	printk("MV EC_KEY I2C driver loaded successfully\n");
+
+	ec_key = kzalloc(sizeof(struct ec_key), GFP_KERNEL);
+
+	ec_key->i2c_adapter = i2c_adapter;
+	ec_key->i2c_client = client;
+
+	input = input_allocate_device();
+	if (!ec_key || !input)
+	{
+		error = -ENOMEM;
+		goto err_free_mem;
+	}
+
+	dev_set_drvdata(&client->dev, ec_key);
+	input->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_REP);
+
+	for(i=0; i<NUM_EC_KEY; i++)
+	{
+		input->keybit[BIT_WORD(ec_key_code[i])] |= BIT_MASK(ec_key_code[i]);
+	}
+
+
+	input->name = client->name;
+	input->dev.parent = &client->dev;
+
+	input->id.bustype = BUS_I2C;
+	input->id.vendor = 0x0001;
+	input->id.product = 0x0001;
+	input->id.version = 0x0100;
+
+	ec_key->input_dev = input;
+
+	ec_key->irq  = client->irq; 
+
+	mv_ec_key_init_gpio(ec_key);
+
+	error = input_register_device(input);
+	if (error) {
+		printk(KERN_ERR "Unable to register touch key input device\n");
+		goto err_free_mem;
+	}
+
+
+	init_timer(&ec_key->polling_timer);
+	ec_key->polling_timer.data = (unsigned long)ec_key;
+	ec_key->polling_timer.function = polling_timer_handler;
+
+	ec_key->workqueue = create_singlethread_workqueue("eckey_workqueue");
+
+	if (ec_key->workqueue == NULL) {
+		goto err_free_mem;
+	}
+
+	INIT_WORK(&ec_key->work, mv_ec_key_work);
+
+	error = request_irq(ec_key->irq, ec_key_isr, 0,
+				    "eckey_irq",
+				    ec_key);
+	if (error) {
+		printk(KERN_ERR "ec-keys: unable to claim irq %d; error %d\n",
+		       ec_key->irq, error);
+		goto err_free_irq;
+	}
+
+	return 0;
+
+
+err_free_irq:
+	destroy_workqueue(ec_key->workqueue);
+	if(ec_key->ec_key_active)
+		free_irq(ec_key->irq,NULL);
+err_free_mem:
+
+	input_free_device(input);
+	kfree(ec_key);
+	return error;
+}
+
+static int __devexit mv_ec_key_remove(struct i2c_client *client)
+{
+
+	struct ec_key *ec_key = dev_get_drvdata(&client->dev);
+	printk("%s\n",__FUNCTION__);	
+
+//	gpio_free(touch_key->irq - IRQ_DOVE_GPIO_START);       
+
+
+	flush_workqueue(ec_key->workqueue);
+	destroy_workqueue(ec_key->workqueue);
+
+	input_unregister_device(ec_key->input_dev);
+	input_free_device(ec_key->input_dev);
+
+	if(ec_key->ec_key_active)
+		free_irq(ec_key->irq,NULL);
+	ec_key->ec_key_active = 0;
+
+	kfree(ec_key);
+	return 0;
+}
+
+static const struct i2c_device_id ec_key_i2c_id[] = {
+     { "ec_key_i2c", 0 },
+     { }
+};
+
+static struct i2c_driver mv_ec_key_driver = {
+     .driver = {
+	  .name   = EC_KEY_DRV_NAME,
+	  .owner  = THIS_MODULE,
+     },
+     .probe          = mv_ec_key_probe,
+     .remove         = __devexit_p(mv_ec_key_remove),
+     .id_table       = ec_key_i2c_id,
+};
+
+static int __init mv_ec_key_init(void)
+{
+     return i2c_add_driver(&mv_ec_key_driver);
+}
+
+static void __exit mv_ec_key_exit(void)
+{
+     i2c_del_driver(&mv_ec_key_driver);
+}
+
+
+
+//late_initcall(mv_ec_key_init);
+module_init(mv_ec_key_init);
+module_exit(mv_ec_key_exit);
+
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_key/Kconfig
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_key/Kconfig
@@ -0,0 +1,31 @@
+menu "Marvell Key driver"
+
+config MV_GPIO_KEY
+	tristate "Marvell GPIO Key driver"
+	---help---
+	  This selects the Marvell GPIO Key driver
+	  say Y or M here.
+	  If unsure, say N.
+
+config MV_TOUCH_KEY
+	tristate "Marvell Touch Key driver"
+	---help---
+	  This selects the Marvell Touch Key driver
+	  say Y or M here.
+	  If unsure, say N.
+
+config MV_TOUCH_SLIDER
+	tristate "Marvell Touch Slider driver"
+	---help---
+	  This selects the Marvell Touch Slider driver
+	  say Y or M here.
+	  If unsure, say N.
+
+config MV_EC_KEY
+	tristate "Marvell EC Key driver"
+	---help---
+	  This selects the Marvell EC Key driver
+	  say Y or M here.
+	  If unsure, say N.
+
+endmenu
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_key/mv_gpio_key.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_key/mv_gpio_key.c
@@ -0,0 +1,300 @@
+/*
+ * Driver for keys on GPIO lines capable of generating interrupts.
+ *
+ * Copyright 2005 Phil Blundell
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/version.h>
+
+#include <linux/init.h>
+#include <linux/fs.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/sched.h>
+#include <linux/pm.h>
+#include <linux/sysctl.h>
+#include <linux/proc_fs.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+#include <linux/input.h>
+#include <linux/irq.h>
+#include <asm/gpio.h>
+
+#define NUM_GPIO_KEY 5
+
+
+static const int gpio_key_mpp[NUM_GPIO_KEY] =
+{
+	7,
+        8,
+	9,
+	10,
+	11,
+};
+
+
+static const int gpio_key_code[NUM_GPIO_KEY] = 
+{
+	KEY_WWW,
+	KEY_F11,
+	KEY_ESC,
+	KEY_UP,
+	KEY_DOWN,
+};
+
+
+static const char *gpio_key_string[NUM_GPIO_KEY] = 
+{
+	"KEY_WWW",
+	"KEY_F11",
+	"KEY_ESC",
+	"KEY_UP",
+	"KEY_DOWN",
+};
+
+
+struct gpio_key
+{
+	struct input_dev *input_dev;
+
+	int gpio_key_active;
+	int irq;
+
+
+	int gpio_key_pressed[NUM_GPIO_KEY];
+	int gpio_key_irq[NUM_GPIO_KEY];
+};
+
+//#define DEBUG
+
+
+/////////////////////////////////////////////////////////////////////////////////////
+//gpio key
+/////////////////////////////////////////////////////////////////////////////////////
+
+
+static irqreturn_t gpio_key_isr(int irq, void *dev_id)
+{
+	struct gpio_key *gpio_key = (struct gpio_key *)dev_id;
+	int i,j;
+
+#ifdef DEBUG
+	printk("%s = %d\n",__FUNCTION__,irq - IRQ_DOVE_GPIO_START);
+#endif
+	for(i=0;i<NUM_GPIO_KEY;i++)
+	{
+		if(irq == gpio_key->gpio_key_irq[i])
+			break;
+	}
+
+	if(i == NUM_GPIO_KEY)
+	{
+		return IRQ_HANDLED;
+	}
+
+
+	for(j=0;j<NUM_GPIO_KEY;j++)
+	{
+		if(j!=i && gpio_key->gpio_key_pressed[j])
+		{
+			return IRQ_HANDLED;
+		}
+	}
+
+
+	if(gpio_key->gpio_key_pressed[i] == 0)
+	{ //pressed
+#ifdef DEBUG
+		printk("%s pressed\n",gpio_key_string[i]);
+#endif
+
+		//we'll issue interrupt when release
+		set_irq_type(irq,IRQ_TYPE_LEVEL_LOW);
+		gpio_key->gpio_key_pressed[i] = 1;
+
+		input_report_key(gpio_key->input_dev, gpio_key_code[i], 1);
+		input_sync(gpio_key->input_dev);
+
+
+	}else{
+#ifdef DEBUG
+		printk("%s released\n",gpio_key_string[i]);
+#endif
+		//release
+		set_irq_type(irq,IRQ_TYPE_LEVEL_HIGH);		
+		gpio_key->gpio_key_pressed[i] = 0;
+		input_report_key(gpio_key->input_dev, gpio_key_code[i], 0);
+		input_sync(gpio_key->input_dev);
+
+	}
+
+	return IRQ_HANDLED;
+}
+
+
+static int gpio_key_hw_init(struct gpio_key *gpio_key)
+{
+
+	int i;
+	int ret;
+	int gpio;
+
+	for(i=0;i<NUM_GPIO_KEY;i++)
+	{
+		gpio = gpio_key_mpp[i];
+//		ret = gpio_request(gpio,gpio_key_string[i]);
+//		if(ret!=0)
+//			return -1;
+//		gpio_direction_input(gpio);
+		set_irq_type(gpio + IRQ_DOVE_GPIO_START ,IRQ_TYPE_LEVEL_HIGH);
+		gpio_key->gpio_key_irq[i] = gpio + IRQ_DOVE_GPIO_START;
+	}
+
+
+	return 0;
+
+}
+
+
+
+
+static int __devinit mv_gpio_key_probe(struct platform_device *pdev)
+{
+//	struct mv_gpio_key_platform_data *pdata = pdev->dev.platform_data;
+	struct input_dev *input;
+	struct gpio_key *gpio_key;
+	int i;
+	int error;
+#ifdef DEBUG
+	printk("%s\n",__FUNCTION__);
+#endif
+
+	gpio_key = kzalloc(sizeof(struct gpio_key), GFP_KERNEL);
+	input = input_allocate_device();
+	if (!gpio_key || !input)
+	{
+		error = -ENOMEM;
+		goto err_free_mem;
+	}
+	dev_set_drvdata(&pdev->dev, gpio_key);
+
+	platform_set_drvdata(pdev, input);
+
+	input->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_REP);
+
+	for(i=0;i<NUM_GPIO_KEY;i++)
+	{
+		input->keybit[BIT_WORD(gpio_key_code[i])] |= BIT_MASK(gpio_key_code[i]);
+	}
+
+	input->name = pdev->name;
+	input->dev.parent = &pdev->dev;
+
+	input->id.bustype = BUS_HOST;
+	input->id.vendor = 0x0001;
+	input->id.product = 0x0001;
+	input->id.version = 0x0100;
+
+	gpio_key->input_dev = input;
+
+
+	error = input_register_device(input);
+	if (error) {
+		printk(KERN_ERR "Unable to register gpio key input device\n");
+		goto err_free_mem;
+	}
+
+
+
+	if(gpio_key_hw_init(gpio_key) == -1)
+	{
+		error = -ENODEV;
+		printk(KERN_ERR " gpio key device didn't exist\n");
+		goto err_free_irq;
+	}
+
+
+	for(i=0;i<NUM_GPIO_KEY;i++)
+	{
+		
+		error = request_irq(gpio_key->gpio_key_irq[i], gpio_key_isr, 0,
+				    pdev->dev.driver->name,
+				    gpio_key);
+	
+		if (error) {
+			printk(KERN_ERR "gpio-keys: unable to claim irq %d; error %d\n",
+			       gpio_key->irq, error);
+			goto err_free_irq;
+		}
+	
+	}
+
+
+	return 0;
+
+
+err_free_irq:
+	if(gpio_key->gpio_key_active)
+		free_irq(gpio_key->irq,pdev);
+err_free_mem:
+
+	input_free_device(input);
+	kfree(gpio_key);
+	return error;
+}
+
+static int __devexit mv_gpio_key_remove(struct platform_device *pdev)
+{
+	int i;
+	struct gpio_key *gpio_key = dev_get_drvdata(&pdev->dev);
+#ifdef DEBUG
+	printk("%s\n",__FUNCTION__);	
+#endif
+	input_unregister_device(gpio_key->input_dev);
+	input_free_device(gpio_key->input_dev);
+
+	if(gpio_key->gpio_key_active)
+		free_irq(gpio_key->irq,pdev);
+
+
+	for(i=0;i<NUM_GPIO_KEY;i++)
+	{
+		gpio_free(gpio_key->gpio_key_irq[i] - IRQ_DOVE_GPIO_START );
+		free_irq(gpio_key->gpio_key_irq[i],pdev);
+	}
+
+	kfree(gpio_key);
+	return 0;
+}
+
+
+
+/*-------------------------------------------------------------------------*/
+struct platform_driver mv_gpio_key_device_driver = {
+	.probe		= mv_gpio_key_probe,
+	.remove		= __devexit_p(mv_gpio_key_remove),
+	.driver		= {
+		.name	= "mv_gpio_key",
+	}
+};
+
+static int __init mv_gpio_key_init(void)
+{
+//	printk("%s\n",__FUNCTION__);
+	return platform_driver_register(&mv_gpio_key_device_driver);
+}
+
+static void __exit mv_gpio_key_exit(void)
+{
+	platform_driver_unregister(&mv_gpio_key_device_driver);
+}
+
+late_initcall(mv_gpio_key_init);
+module_exit(mv_gpio_key_exit);
+
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_key/mv_ec_key.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_key/mv_ec_key.h
@@ -0,0 +1,13 @@
+#ifndef MV_EC_KEY_H
+#define MV_EC_KEY_H
+
+
+struct mv_ec_key_platform_data {
+	int irq;
+	int code; /* input event code (KEY_*) */
+	int type; /* input event type (EV_KEY) */
+};
+
+#define EC_KEY_DRV_NAME "mv-ec-key"
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_key/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_key/Makefile
@@ -0,0 +1,12 @@
+#
+# Makefile for the Marvell Key
+#
+ifdef CONFIG_MV_HAL_RULES_PATH
+include $(srctree)/$(subst ",,$(CONFIG_MV_HAL_RULES_PATH))
+endif
+
+obj-$(CONFIG_MV_TOUCH_KEY)	+= mv_touch_key.o
+obj-$(CONFIG_MV_TOUCH_SLIDER)	+= mv_touch_slider.o
+obj-$(CONFIG_MV_GPIO_KEY)	+= mv_gpio_key.o
+obj-$(CONFIG_MV_EC_KEY)		+= mv_ec_key.o
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_key/mv_touch_key.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_key/mv_touch_key.c
@@ -0,0 +1,422 @@
+/*
+ * Driver for keys on GPIO lines capable of generating interrupts.
+ *
+ * Copyright 2005 Phil Blundell
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/version.h>
+
+#include <linux/init.h>
+#include <linux/fs.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/sched.h>
+#include <linux/pm.h>
+#include <linux/sysctl.h>
+#include <linux/proc_fs.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+#include <linux/input.h>
+#include <linux/irq.h>
+#include "mv_touch_key_slider.h"
+#include <linux/i2c.h>
+#include <asm/gpio.h>
+
+//#define DEBUG
+
+/////////////////////////////////////////////////////////////////////////////////////
+//touch key
+/////////////////////////////////////////////////////////////////////////////////////
+#define NUM_TOUCH_KEY 2
+#define TOUCH_KEY_SLAVE_ADDR 0x0b
+#define KEY_DATA_COMMAND 0x01
+#define FW_VERSION_COMMAND 0x16
+#define TOUCH_KEY_ID 0x61
+#define DUMMY_DATA 0x00
+
+
+#define POLLING_TIMER 50 //msec
+
+
+static const int touch_key_flag[NUM_TOUCH_KEY]=
+{
+	0x04,
+	0x08,
+};
+
+static const int touch_key_code[NUM_TOUCH_KEY]=
+{
+	KEY_F11,
+	KEY_WWW,
+};
+
+#ifdef DEBUG
+static const char * touch_key_string[NUM_TOUCH_KEY]=
+{
+	"KEY_F11",
+	"KEY_WWW",
+};
+#endif
+
+struct touch_key
+{
+	struct input_dev *input_dev;
+
+	int touch_key_active;
+	int irq;
+
+	struct workqueue_struct *workqueue;
+	struct work_struct work;
+	struct timer_list polling_timer;
+
+	u8 touch_pressed;
+
+	struct i2c_adapter      *i2c_adapter;
+	struct i2c_client *i2c_client;
+};
+
+
+
+
+/////////////////////////////////////////////////////////////////////////////////////
+//touch key
+/////////////////////////////////////////////////////////////////////////////////////
+static irqreturn_t touch_key_isr(int irq, void *dev_id)
+{
+	struct touch_key *touch_key = (struct touch_key *)dev_id;
+
+#ifdef DEBUG
+	printk("%s\n",__FUNCTION__);
+#endif
+
+	if(touch_key->touch_pressed == 0)
+	{
+		mod_timer(&touch_key->polling_timer, jiffies);
+		disable_irq_nosync(irq);
+	}
+
+	
+	return IRQ_HANDLED;
+}
+
+static void polling_timer_handler(unsigned long handle)
+{
+
+	struct touch_key *touch_key = (void *)handle;
+#ifdef DEBUG
+	printk("%s\n",__FUNCTION__);
+#endif
+	queue_work(touch_key->workqueue, &touch_key->work);
+
+
+}
+
+
+
+static void mv_touch_key_work(struct work_struct *work)
+{
+
+	struct touch_key *touch_key = container_of(work, struct touch_key, work);
+	unsigned char wr_cmd[3];
+	unsigned char rd_data[3];
+
+
+	wr_cmd[0] = KEY_DATA_COMMAND;	
+	wr_cmd[1] = DUMMY_DATA;	
+	wr_cmd[2] = DUMMY_DATA;
+
+	if(i2c_master_send(touch_key->i2c_client,&wr_cmd[0],3) != 3)
+	{
+		printk("Fail to Write I2C\n");
+		return;
+   	}
+
+	if(i2c_master_recv(touch_key->i2c_client,&rd_data[0],3) !=3)
+	{
+		printk("Fail to Read I2C\n");
+	        return;
+   	}
+#ifdef DEBUG
+	printk("%x : %x : %x\n",rd_data[0],rd_data[1],rd_data[2]);
+#endif
+
+	if((touch_key->touch_pressed == 0) && (rd_data[1] == 0))
+	{
+		enable_irq(touch_key->irq);
+		return;
+	}
+	if(rd_data[1] & touch_key_flag[0])
+	{
+		if((touch_key->touch_pressed & touch_key_flag[0]) == 0)
+		{
+#ifdef DEBUG
+			printk("%s pressed\n",touch_key_string[0]);
+#endif
+			touch_key->touch_pressed |= touch_key_flag[0];
+			input_report_key(touch_key->input_dev, touch_key_code[0], 1);
+			input_sync(touch_key->input_dev);
+		}
+		mod_timer(&touch_key->polling_timer, jiffies + msecs_to_jiffies(POLLING_TIMER));
+
+	}else if(touch_key->touch_pressed & touch_key_flag[0]){
+#ifdef DEBUG
+		printk("%s released\n",touch_key_string[0]);
+#endif
+		touch_key->touch_pressed &= ~touch_key_flag[0];
+		input_report_key(touch_key->input_dev, touch_key_code[0], 0);
+		input_sync(touch_key->input_dev);
+		enable_irq(touch_key->irq);
+	}
+
+	if(rd_data[1] & touch_key_flag[1])
+	{
+		if((touch_key->touch_pressed & touch_key_flag[1])==0)
+		{
+#ifdef DEBUG
+			printk("%s pressed\n",touch_key_string[1]);
+#endif
+			touch_key->touch_pressed |= touch_key_flag[1];
+			input_report_key(touch_key->input_dev, touch_key_code[1], 1);
+			input_sync(touch_key->input_dev);
+		}
+		mod_timer(&touch_key->polling_timer, jiffies + msecs_to_jiffies(POLLING_TIMER));
+
+	}else if(touch_key->touch_pressed & touch_key_flag[1]){
+#ifdef DEBUG
+		printk("%s released\n",touch_key_string[1]);
+#endif
+		touch_key->touch_pressed &= ~touch_key_flag[1];
+		input_report_key(touch_key->input_dev, touch_key_code[1], 0);
+		input_sync(touch_key->input_dev);
+		enable_irq(touch_key->irq);
+	}
+
+
+}
+
+
+static int touch_key_hw_init(struct i2c_client *client)
+{
+
+	unsigned char wr_cmd[3];
+	unsigned char rd_data[3];
+
+	wr_cmd[0] = FW_VERSION_COMMAND;
+	wr_cmd[1] = DUMMY_DATA;
+	wr_cmd[2] = DUMMY_DATA;
+
+	if(i2c_master_send(client,wr_cmd,3) != 3)
+	{
+#ifdef DEBUG
+		printk("Fail to Write I2C\n");
+#endif
+		return -1;
+	}
+	if(i2c_master_recv(client,rd_data,3) !=3)
+	{
+#ifdef DEBUG
+		printk("Fail to Read I2C\n");
+#endif
+		return -1;
+	}
+	printk("[%s] %x : %x : %x\n",__FUNCTION__,rd_data[0],rd_data[1],rd_data[2]);
+
+	printk("[%s]id = %x\n", __FUNCTION__,rd_data[1]);
+	printk("[%s]version = %x\n", __FUNCTION__,rd_data[2]);
+	if(rd_data[0] != FW_VERSION_COMMAND)
+	{
+		printk("Fail to Verify command ack\n");
+		return -1;
+	}
+	if(rd_data[1] != TOUCH_KEY_ID)
+	{
+		printk("Fail to Verify ID\n");
+		return -1;
+	}
+
+	return 0;
+}
+
+
+static int mv_touch_key_init_gpio(struct touch_key *touch_key)
+{
+	int error;
+//	int irq_gpio = touch_key->irq - IRQ_DOVE_GPIO_START;
+      
+//	error = gpio_request(irq_gpio,"TOUCH_KEY_IRQ");       
+//	if(error!=0)
+//		return -1;
+
+//	gpio_direction_input(irq_gpio);
+	set_irq_type(touch_key->irq,IRQ_TYPE_LEVEL_HIGH);
+
+	return 0;
+
+}
+
+
+static int __devinit mv_touch_key_probe(struct i2c_client *client,
+			       const struct i2c_device_id *id)
+{
+	struct input_dev *input;
+	struct touch_key *touch_key;
+	int i;
+	int error;
+	struct i2c_adapter      *i2c_adapter = to_i2c_adapter(client->dev.parent);
+
+#ifdef DEBUG
+	printk("%s\n",__FUNCTION__);
+#endif
+
+	if (!i2c_check_functionality(i2c_adapter,
+				  I2C_FUNC_SMBUS_EMUL))
+		return -EIO;
+
+
+	if(touch_key_hw_init(client) != 0)
+	{
+		return -ENODEV;
+	}
+
+	printk("MV TOUCH_KEY I2C driver loaded successfully\n");
+
+	touch_key = kzalloc(sizeof(struct touch_key), GFP_KERNEL);
+
+	touch_key->i2c_adapter = i2c_adapter;
+	touch_key->i2c_client = client;
+
+	input = input_allocate_device();
+	if (!touch_key || !input)
+	{
+		error = -ENOMEM;
+		goto err_free_mem;
+	}
+
+
+	dev_set_drvdata(&client->dev,touch_key);
+	input->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_REP);
+
+	for(i=0;i<NUM_TOUCH_KEY;i++)
+	{
+		input->keybit[BIT_WORD(touch_key_code[i])] |= BIT_MASK(touch_key_code[i]);
+	}
+
+
+	input->name = client->name;
+	input->dev.parent = &client->dev;
+
+	input->id.bustype = BUS_I2C;
+	input->id.vendor = 0x0001;
+	input->id.product = 0x0001;
+	input->id.version = 0x0100;
+
+	touch_key->input_dev = input;
+
+	touch_key->irq  = client->irq;
+
+	mv_touch_key_init_gpio(touch_key);
+
+	error = input_register_device(input);
+	if (error) {
+		printk(KERN_ERR "Unable to register touch key input device\n");
+		goto err_free_mem;
+	}
+
+
+	init_timer(&touch_key->polling_timer);
+	touch_key->polling_timer.data = (unsigned long)touch_key;
+	touch_key->polling_timer.function = polling_timer_handler;
+
+	touch_key->workqueue = create_singlethread_workqueue("touchkey_workqueue");
+
+	if (touch_key->workqueue == NULL) {
+		goto err_free_mem;
+	}
+
+	INIT_WORK(&touch_key->work, mv_touch_key_work);
+
+	error = request_irq(touch_key->irq, touch_key_isr, 0,
+				    "touchkey_irq",
+				    touch_key);
+	if (error) {
+		printk(KERN_ERR "touch-keys: unable to claim irq %d; error %d\n",
+		       touch_key->irq, error);
+		goto err_free_irq;
+	}
+
+	return 0;
+
+
+err_free_irq:
+	destroy_workqueue(touch_key->workqueue);
+	if(touch_key->touch_key_active)
+		free_irq(touch_key->irq,NULL);
+err_free_mem:
+
+	input_free_device(input);
+	kfree(touch_key);
+	return error;
+}
+
+static int __devexit mv_touch_key_remove(struct i2c_client *client)
+{
+
+	struct touch_key *touch_key = dev_get_drvdata(&client->dev);
+	printk("%s\n",__FUNCTION__);	
+
+	gpio_free(touch_key->irq - IRQ_DOVE_GPIO_START);       
+
+
+	flush_workqueue(touch_key->workqueue);
+	destroy_workqueue(touch_key->workqueue);
+
+	input_unregister_device(touch_key->input_dev);
+	input_free_device(touch_key->input_dev);
+
+	if(touch_key->touch_key_active)
+		free_irq(touch_key->irq,NULL);
+
+
+	kfree(touch_key);
+	return 0;
+}
+
+
+
+
+static const struct i2c_device_id touch_key_i2c_id[] = {
+     { "touch_key_i2c", 0 },
+     { }
+};
+
+static struct i2c_driver mv_touch_key_driver = {
+     .driver = {
+	  .name   = TOUCH_KEY_DRV_NAME,
+	  .owner  = THIS_MODULE,
+     },
+     .probe          = mv_touch_key_probe,
+     .remove         = __devexit_p(mv_touch_key_remove),
+     .id_table       = touch_key_i2c_id,
+};
+
+static int __init mv_touch_key_init(void)
+{
+     return i2c_add_driver(&mv_touch_key_driver);
+}
+
+static void __exit mv_touch_key_exit(void)
+{
+     i2c_del_driver(&mv_touch_key_driver);
+}
+
+
+
+late_initcall(mv_touch_key_init);
+module_exit(mv_touch_key_exit);
+
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_key/mv_touch_slider.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_key/mv_touch_slider.c
@@ -0,0 +1,489 @@
+/*
+ * Driver for keys on GPIO lines capable of generating interrupts.
+ *
+ * Copyright 2005 Phil Blundell
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/version.h>
+
+#include <linux/init.h>
+#include <linux/fs.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/sched.h>
+#include <linux/pm.h>
+#include <linux/sysctl.h>
+#include <linux/proc_fs.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+#include <linux/input.h>
+#include <linux/irq.h>
+
+#include <linux/i2c.h>
+#include "mv_touch_key_slider.h"
+#include <asm/gpio.h>
+
+//#define DEBUG
+
+
+#define TOUCH_SLIDER_SLAVE_ADDR 0x0a
+
+
+#define SLIDER_DATA_COMMAND 0x01
+#define SLIDER_VELOCITY_DATA_COMMAND 0x02
+#define FW_VERSION_COMMAND 0x16
+#define TOUCH_SLIDER_ID 0x62
+#define DUMMY_DATA 0x00
+
+#define POLLING_TIMER 30 //msec
+
+#define JITTER_RANGE 2
+
+#define NUM_KEYS 8
+#define MIN_VAL 0x08
+#define MAX_VAL 0x30
+#define STEP (MAX_VAL - MIN_VAL ) / (NUM_KEYS-1)
+
+
+static const unsigned char mapping_table[] = 
+{
+	0,			//0
+	MIN_VAL,		//1
+	MIN_VAL + STEP,		//2
+	MIN_VAL + STEP*2 ,	//3
+	MIN_VAL + STEP*3 ,	//4
+	MIN_VAL + STEP*4 ,	//5
+	MIN_VAL + STEP*5 ,	//6
+	MIN_VAL + STEP*6 ,	//7
+	MAX_VAL,		//8
+	0xff,
+};
+
+
+//#define USE_WHEEL
+#define DECREASE 0
+#define INCREASE 1
+
+
+
+static const int touch_slider_code[2]=
+{
+	KEY_UP,		//DECREASE
+	KEY_DOWN,	//INCREASE
+};
+
+#ifdef DEBUG
+static const char * touch_slider_string[2]=
+{
+	"KEY_UP",		//DECREASE
+	"KEY_DOWN",	//INCREASE
+};
+#endif
+
+struct touch_slider
+{
+	struct input_dev *input_dev;
+	int irq;
+
+	int old_value;
+	int touch_pressed;
+	int current_touch_index;
+	int old_touch_index;
+	struct timer_list polling_timer;
+	struct workqueue_struct *workqueue;
+	struct work_struct work;
+
+	struct i2c_adapter      *i2c_adapter;
+	struct i2c_client *i2c_client;
+};
+
+
+
+
+static irqreturn_t touch_slider_isr(int irq, void *dev_id)
+{
+	struct touch_slider *touch_slider = (struct touch_slider *)dev_id;
+
+#ifdef DEBUG
+	printk("%s\n",__FUNCTION__);
+#endif
+
+	
+	if(touch_slider->touch_pressed == 0)
+	{
+		mod_timer(&touch_slider->polling_timer, jiffies);
+		disable_irq_nosync(irq);
+	}
+	
+	return IRQ_HANDLED;
+}
+
+
+static void polling_timer_handler(unsigned long handle)
+{
+
+	struct touch_slider *touch_slider = (void *)handle;
+#ifdef DEBUG
+	printk("%s\n",__FUNCTION__);
+#endif
+	queue_work(touch_slider->workqueue, &touch_slider->work);
+
+
+}
+
+
+static void mv_touch_slider_work(struct work_struct *work)
+{
+	struct touch_slider *touch_slider = container_of(work, struct touch_slider, work);
+	struct input_dev *ip = touch_slider->input_dev;
+	int movement;
+
+	int last_valid;
+	unsigned char rd_data[3];
+
+	int i;
+
+#ifdef DEBUG
+	printk("%s\n",__FUNCTION__);
+#endif
+
+	if(i2c_master_recv(touch_slider->i2c_client,rd_data,3) !=3)
+	{
+		printk("Fail to Read I2C\n");
+		return;
+	}
+#ifdef DEBUG
+	printk("%s: %x \n",__FUNCTION__,rd_data[1]);
+#endif
+
+
+	if(rd_data[1] == 0)
+	{ // touch released
+		#ifdef DEBUG
+		printk("untouched\n");
+		#endif
+		touch_slider->old_value = 0;
+		touch_slider->current_touch_index = 0;
+		touch_slider->touch_pressed = 0;
+		enable_irq(touch_slider->irq);
+	}
+	else
+	{ // touch pressed
+
+
+		if(abs(rd_data[1] - touch_slider->old_value) <= JITTER_RANGE)
+		{
+			rd_data[1] = touch_slider->old_value;
+#ifdef DEBUG
+			printk("after dejitter = %x \n",rd_data[1]);
+#endif
+
+		}else{
+			touch_slider->old_value = rd_data[1];
+
+		}
+
+#ifdef DEBUG
+		for(i = 0;mapping_table[i]!= 0xff ;i++)
+		{
+			printk("0x%x ",mapping_table[i]);
+		}
+
+		printk("\n");
+#endif
+		last_valid = 0;
+		for(i = 0; mapping_table[i]!=0xff ;i++)
+		{
+			if(rd_data[1] > mapping_table[i])
+			{
+				last_valid = i;
+			}
+		}
+		touch_slider->current_touch_index = last_valid;
+#ifdef DEBUG
+		printk("index = %d \n",touch_slider->current_touch_index);
+#endif
+
+//		touch_slider->current_touch_index = mapping_table[touch_slider->rd_data[1]];
+
+
+		if(touch_slider->touch_pressed)
+		{
+			movement = touch_slider->current_touch_index - touch_slider->old_touch_index;
+		}
+		else
+		{
+			movement = 0;
+			touch_slider->touch_pressed = 1;
+		}
+		
+		if(movement !=0 )
+		{
+			int index;
+			int i;
+
+
+			index = movement > 0 ? INCREASE : DECREASE;
+#ifdef DEBUG
+			printk("move =%d\n",movement);
+#endif
+
+			for(i=0; i< abs(movement); i++)
+			{
+#ifdef USE_WHEEL
+				input_report_key(touch_slider->input_dev, BTN_MIDDLE, 1);
+				input_report_rel(touch_slider->input_dev, REL_WHEEL, movement > 0?1:-1);
+				input_sync(touch_slider->input_dev);				
+#else
+
+				#ifdef DEBUG
+				printk("%s press\n",touch_slider_string[index]);
+				#endif
+				input_report_key(touch_slider->input_dev, touch_slider_code[index], 1);
+				input_sync(ip);
+
+				#ifdef DEBUG
+				printk("%s release\n",touch_slider_string[index]);
+				#endif
+				input_report_key(touch_slider->input_dev, touch_slider_code[index], 0);
+				input_sync(ip);
+#endif
+			
+			}
+		}
+		touch_slider->old_touch_index = touch_slider->current_touch_index;
+		mod_timer(&touch_slider->polling_timer, jiffies + msecs_to_jiffies(POLLING_TIMER));
+	}
+
+
+}
+
+
+
+
+
+
+static int touch_slider_hw_init(struct i2c_client *client)
+{
+
+	unsigned char wr_cmd[3];
+	unsigned char rd_data[3];
+
+	wr_cmd[0] = FW_VERSION_COMMAND;
+	wr_cmd[1] = DUMMY_DATA;
+	wr_cmd[2] = DUMMY_DATA;
+
+	if(i2c_master_send(client,wr_cmd,3) != 3)
+	{
+#ifdef DEBUG
+		printk("Fail to Write I2C\n");
+#endif
+		return -1;
+	}
+	if(i2c_master_recv(client,rd_data,3) !=3)
+	{
+#ifdef DEBUG
+		printk("Fail to Read I2C\n");
+#endif
+		return -1;
+	}
+	printk("[%s] %x : %x : %x\n",__FUNCTION__,rd_data[0],rd_data[1],rd_data[2]);
+
+	printk("[%s]id = %x\n", __FUNCTION__,rd_data[1]);
+	printk("[%s]version = %x\n", __FUNCTION__,rd_data[2]);
+	if(rd_data[0] != FW_VERSION_COMMAND)
+	{
+		printk("Fail to Verify command ack\n");
+		return -1;
+	}
+	if(rd_data[1] != TOUCH_SLIDER_ID)
+	{
+		printk("Fail to Verify ID\n");
+		return -1;
+	}
+
+	return 0;
+
+}
+
+
+
+static int mv_touch_slider_init_gpio(struct touch_slider *touch_slider)
+{
+	int ret = 0;
+//	int irq_gpio = touch_slider->irq - IRQ_DOVE_GPIO_START;
+//	printk("[%s] =%d\n",__FUNCTION__,irq_gpio);
+//	ret = gpio_request(irq_gpio,"TOUCH_SLIDER_IRQ");       
+//	if(ret!=0)
+//	{
+//		printk("[%s] request gpio err",__FUNCTION__);
+//		return -1;
+//	}
+//	gpio_direction_input(irq_gpio);
+	set_irq_type(touch_slider->irq,IRQ_TYPE_LEVEL_HIGH);
+
+	return 0;
+}
+
+
+
+static int __devinit mv_touch_slider_probe(struct i2c_client *client,
+			       const struct i2c_device_id *id)
+{
+
+	struct input_dev *input;
+	int error;
+	struct touch_slider *touch_slider;
+
+	struct i2c_adapter      *i2c_adapter = to_i2c_adapter(client->dev.parent);
+
+#ifdef DEBUG
+	printk("%s\n",__FUNCTION__);
+#endif
+
+	if (!i2c_check_functionality(i2c_adapter,
+				  I2C_FUNC_SMBUS_EMUL))
+		return -EIO;
+
+
+	if(touch_slider_hw_init(client) != 0)
+	{
+		return -ENODEV;
+	}
+
+	printk("MV TOUCH_SLIDER I2C driver loaded successfully\n");
+
+
+	touch_slider = kzalloc(sizeof(struct touch_slider), GFP_KERNEL);
+	input = input_allocate_device();
+	if (!touch_slider || !input)
+	{
+		error = -ENOMEM;
+		goto err_free_mem;
+	}
+	dev_set_drvdata(&client->dev, touch_slider);
+
+	#ifdef USE_WHEEL
+	input->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_REL);
+	input->relbit[0] = BIT_MASK(REL_WHEEL);
+	input->keybit[BIT_WORD(BTN_MIDDLE)] = BIT_MASK(BTN_MIDDLE);
+
+	#else
+	input->evbit[0] = BIT_MASK(EV_KEY);
+	input->keybit[BIT_WORD(KEY_UP)] = BIT_MASK(KEY_UP);
+	input->keybit[BIT_WORD(KEY_DOWN)] |= BIT_MASK(KEY_DOWN);
+	#endif
+
+	input->name = client->name;
+	input->dev.parent = &client->dev;
+
+	input->id.bustype = BUS_I2C;
+	input->id.vendor = 0x0001;
+	input->id.product = 0x0001;
+	input->id.version = 0x0100;
+
+	touch_slider->input_dev = input;
+
+	touch_slider->irq  = client->irq;
+
+
+	mv_touch_slider_init_gpio(touch_slider);
+
+	error = input_register_device(input);
+	if (error) {
+		printk(KERN_ERR "Unable to register touch key input device\n");
+		goto err_free_mem;
+	}
+
+	init_timer(&touch_slider->polling_timer);
+	touch_slider->polling_timer.data = (unsigned long)touch_slider;
+	touch_slider->polling_timer.function = polling_timer_handler;
+
+
+	touch_slider->workqueue = create_singlethread_workqueue("touchsilder_workqueue");
+
+	if (touch_slider->workqueue == NULL) {
+		goto err_free_mem;
+	}
+
+	INIT_WORK(&touch_slider->work, mv_touch_slider_work);
+     
+	error = request_irq(touch_slider->irq, touch_slider_isr, 0,
+			    "touchslider_irq",
+			    touch_slider);
+	if (error) {
+		printk(KERN_ERR "touch slider: unable to claim irq %d; error %d\n",
+		       touch_slider->irq, error);
+			goto err_free_irq;
+		}
+
+	return 0;
+
+
+
+err_free_irq:
+	destroy_workqueue(touch_slider->workqueue);
+	free_irq(touch_slider->irq,NULL);
+err_free_mem:
+
+	input_free_device(input);
+	kfree(touch_slider);
+	return error;
+}
+
+static int __devexit mv_touch_slider_remove(struct i2c_client *client)
+{
+	struct touch_slider *touch_slider = dev_get_drvdata(&client->dev);
+
+	gpio_free(touch_slider->irq);       
+
+	flush_workqueue(touch_slider->workqueue);
+	destroy_workqueue(touch_slider->workqueue);
+
+	input_unregister_device(touch_slider->input_dev);
+	input_free_device(touch_slider->input_dev);
+	free_irq(touch_slider->irq,NULL);
+	kfree(touch_slider);
+
+	return 0;
+}
+
+
+
+static const struct i2c_device_id touch_slider_i2c_id[] = {
+     { "touch_slider_i2c", 0 },
+     { }
+};
+
+static struct i2c_driver mv_touch_slider_driver = {
+     .driver = {
+	  .name   = TOUCH_SLIDER_DRV_NAME,
+	  .owner  = THIS_MODULE,
+     },
+     .probe          = mv_touch_slider_probe,
+     .remove         = __devexit_p(mv_touch_slider_remove),
+     .id_table       = touch_slider_i2c_id,
+};
+
+static int __init mv_touch_slider_init(void)
+{
+     return i2c_add_driver(&mv_touch_slider_driver);
+}
+
+static void __exit mv_touch_slider_exit(void)
+{
+     i2c_del_driver(&mv_touch_slider_driver);
+}
+
+
+
+late_initcall(mv_touch_slider_init);
+module_exit(mv_touch_slider_exit);
+
+
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sata/mvLinuxIalOs.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sata/mvLinuxIalOs.c
@@ -0,0 +1,55 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+*******************************************************************************/
+/*******************************************************************************
+* file_name - mvLinuxOs.c
+*
+* DESCRIPTION:  implementation for Linux Os layer
+*
+*
+* DEPENDENCIES:
+*   mvLinuxOs.h
+*   Linux header files.
+*
+*
+*******************************************************************************/
+/* Includes */
+#include "mvOsS.h"
+
+void mvMicroSecondsDelay(MV_VOID_PTR pSataAdapter, MV_U32 usecs)
+{
+    MV_U32 msecs = usecs / 1000;
+    MV_U32 i;        
+    MV_U32 tmp = usecs % 1000;
+    for (i = 0; i < msecs; i++)
+    {
+        udelay(1000);
+    }    
+    if (tmp > 0)
+        udelay(tmp);
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sata/mvLinuxIalLib.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sata/mvLinuxIalLib.h
@@ -0,0 +1,109 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+*******************************************************************************/
+/*******************************************************************************
+* mvLinuxIalLib - Header File for Linux IAL Lib.
+*
+* DESCRIPTION:
+*       None.
+*
+* DEPENDENCIES:
+*       None.
+*
+*
+*******************************************************************************/
+#ifndef __INCmvLinuxIalLibh
+#define __INCmvLinuxIalLibh
+
+#include "mvLinuxIalHt.h"
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION (2,4,23)
+#define irqreturn_t         void
+#define IRQ_RETVAL(foo)
+#endif
+#define MV_LINUX_ASYNC_TIMER_PERIOD       ((MV_IAL_ASYNC_TIMER_PERIOD * HZ) / 1000)
+
+struct pci_dev;
+struct IALAdapter;
+struct IALHost;
+struct mv_comp_info;
+
+
+/* Adapter Initialization */
+int mv_ial_lib_allocate_edma_queues(struct IALAdapter *pAdapter);
+
+void mv_ial_lib_free_edma_queues(struct IALAdapter *pAdapter);
+
+int mv_ial_lib_init_channel(struct IALAdapter *pAdapter, MV_U8 channelNum);
+
+void mv_ial_lib_free_channel(struct IALAdapter *pAdapter, MV_U8 channelNum);
+
+/* PRD Table Generation */
+#ifndef MV_PRD_TABLE_SIZE
+ #define MV_PRD_TABLE_SIZE                  64 /* 64 entries max in PRD table */
+#endif
+
+
+int mv_ial_lib_prd_destroy(struct IALHost *pHost);
+int mv_ial_lib_prd_init(struct IALHost *);
+
+
+
+int mv_ial_lib_generate_prd(MV_SATA_ADAPTER *pMvSataAdapter, struct scsi_cmnd *SCpnt,
+                            struct mv_comp_info *);
+
+
+/* Interrupt Service Routine*/
+irqreturn_t mv_ial_lib_int_handler (int irq, void *dev_id);
+
+
+/* Event Notification */
+MV_BOOLEAN mv_ial_lib_udma_command_completion_call_back(MV_SATA_ADAPTER *pMvSataAdapter,
+                                           MV_U8 channelNum,
+                                           MV_COMPLETION_TYPE comp_type,
+                                           void *commandId,
+                                           MV_U16 responseFlags,
+                                           MV_U32 timeStamp,
+                                           MV_STORAGE_DEVICE_REGISTERS *registerStruct);
+
+MV_BOOLEAN mv_ial_lib_event_notify(MV_SATA_ADAPTER *pMvSataAdapter, MV_EVENT_TYPE eventType,
+                             MV_U32 param1, MV_U32 param2);
+void asyncStartTimerFunction(unsigned long data);
+
+/* SCSI done queuing and callback */
+void mv_ial_lib_add_done_queue (struct IALAdapter *pAdapter,
+                                MV_U8 channel,
+                                struct scsi_cmnd   *scsi_cmnd);
+
+struct scsi_cmnd * mv_ial_lib_get_first_cmnd (struct IALAdapter *pAdapter,
+                                       MV_U8 channel);
+
+void mv_ial_lib_do_done (struct scsi_cmnd *cmnd);
+
+void mv_ial_block_requests(struct IALAdapter *pAdapter, MV_U8 channelIndex);
+
+#endif /* __INCmvLinuxIalLibh */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sata/Kconfig
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sata/Kconfig
@@ -0,0 +1,34 @@
+menu "Sata options"
+	depends on SCSI_MVSATA
+	depends on BLOCK
+	
+config  MV_SATA_SUPPORT_ATAPI
+        bool "Support ATAPI (CR-ROM/DVD-ROM) devices"
+        default n
+
+config  MV_SATA_ENABLE_1MB_IOS
+        bool "Enable 1 MByte requests"
+        default n
+        help
+          Set the maximum io request size to 1 MByte for HDD's the support LBA48 feature,
+          say No if you want to keep the maximum limit on 128KBytes.
+choice
+	prompt "Debug level"
+	default SATA_NO_DEBUG
+
+config SATA_NO_DEBUG
+	bool "No Debug"
+
+config SATA_DEBUG_ON_ERROR
+	bool "Debug on errors"
+	help
+	  print debug messages when EDMA/System/HDD errors occur.
+
+config SATA_FULL_DEBUG
+	bool "Full debug"
+
+endchoice
+
+endmenu
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sata/mvLinuxIalSmart.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sata/mvLinuxIalSmart.c
@@ -0,0 +1,428 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+*******************************************************************************/
+/*******************************************************************************
+* file_name - mvLinuxIALSmart.c
+*
+* DESCRIPTION: C file for S.M.A.R.T. features - smartmontools app
+*
+* DEPENDENCIES:
+*   None.
+*
+*
+*******************************************************************************/
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/string.h>
+#include <linux/slab.h>
+#include <linux/pci.h>
+#include <linux/ioport.h>
+#include <linux/delay.h>
+#include <linux/sched.h>
+#include <linux/proc_fs.h>
+#include <linux/stat.h>
+#include <linux/kdev_t.h>
+#include <linux/timer.h>
+#include <linux/spinlock.h>
+#include <asm/dma.h>
+#include <asm/system.h>
+#include <asm/io.h>
+#include <linux/version.h>
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+#include <scsi/scsi.h>
+#include <scsi/scsi_cmnd.h>
+#include <scsi/scsi_device.h>
+#include <scsi/scsi_host.h>
+#include <scsi/scsi_tcq.h>
+#else
+#include <linux/blk.h>
+#include "scsi.h"
+#include "hosts.h"
+#endif
+#include "mvScsiAtaLayer.h"
+#include "mvLinuxIalHt.h"
+#include "mvRegs.h"
+#include "mvIALCommon.h"
+#include "mvLinuxIalSmart.h"
+
+
+extern MV_VOID handleNoneUdmaError(MV_SATA_SCSI_CMD_BLOCK  *pScb,
+                                   MV_STORAGE_DEVICE_REGISTERS *registerStruct);
+
+extern MV_VOID handleUdmaError(MV_SATA_SCSI_CMD_BLOCK  *pScb,
+                               MV_U32 responseFlags,
+                               MV_STORAGE_DEVICE_REGISTERS *registerStruct);
+
+extern MV_VOID  checkQueueCommandResult(MV_SATA_SCSI_CMD_BLOCK *pScb,
+                                        MV_QUEUE_COMMAND_RESULT result);
+
+extern MV_VOID setSenseData(IN MV_SATA_SCSI_CMD_BLOCK *pScb, IN MV_U8 SenseKey,
+                            IN MV_U8 AdditionalSenseCode);
+
+static MV_BOOLEAN
+SmartCommandCompletionCB(MV_SATA_ADAPTER *pSataAdapter,
+                         MV_U8 channelNum,
+                         MV_COMPLETION_TYPE comp_type,
+                         MV_VOID_PTR commandId,
+                         MV_U16 responseFlags,
+                         MV_U32 timeStamp,
+                         MV_STORAGE_DEVICE_REGISTERS *registerStruct);
+
+static void swap_buf_le16(u16 *buf, unsigned int buf_words)
+{
+#ifdef __BIG_ENDIAN
+     unsigned int i;
+
+     for (i = 0; i < buf_words; i++)
+	  buf[i] = le16_to_cpu(buf[i]);
+#endif /* __BIG_ENDIAN */
+}
+
+MV_SCSI_COMMAND_STATUS_TYPE  mvScsiAtaSendSmartCommand(IN  MV_SATA_ADAPTER* pSataAdapter,
+                                                       IN  MV_SATA_SCSI_CMD_BLOCK *pScb)
+{
+    MV_U8 *buff = (MV_U8*)pScb->pDataBuffer;
+    MV_NON_UDMA_PROTOCOL protocolType = MV_NON_UDMA_PROTOCOL_NON_DATA;
+    MV_QUEUE_COMMAND_RESULT result = MV_QUEUE_COMMAND_RESULT_OK;
+    MV_QUEUE_COMMAND_INFO   qCommandInfo;
+    MV_SATA_SCSI_DRIVE_DATA *pDriveData = &pScb->pSalAdapterExtension->ataDriveData[pScb->bus][pScb->target];
+
+    mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "SMART command: command received, bufflen = %d.\n",
+             pScb->dataBufferLength);
+    pScb->dataTransfered = 0;
+    pScb->senseDataLength = 0;
+    if (pScb->bus >= pSataAdapter->numberOfChannels)
+    {
+        pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_INVALID_BUS;
+        pScb->dataTransfered = 0;
+        pScb->completionCallBack(pSataAdapter, pScb);
+        return MV_SCSI_COMMAND_STATUS_COMPLETED;
+    }
+
+    if ((pScb->target >= MV_SATA_PM_MAX_PORTS) ||
+        (pScb->pSalAdapterExtension->ataDriveData[pScb->bus][pScb->target].driveReady == MV_FALSE))
+    {
+        pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_NO_DEVICE;
+        pScb->dataTransfered = 0;
+        pScb->completionCallBack(pSataAdapter, pScb);
+        return MV_SCSI_COMMAND_STATUS_COMPLETED;
+    }
+
+    if (pScb->dataBufferLength <= 6 || /*six byte opcode*/
+        (buff[SMART_BUF_COMMAND_OFFSET] != WIN_IDENTIFY &&
+        buff[SMART_BUF_COMMAND_OFFSET] != MV_ATA_COMMAND_IDLE &&
+        buff[SMART_BUF_COMMAND_OFFSET] != MV_ATA_COMMAND_IDLE_IMMEDIATE &&
+        buff[SMART_BUF_COMMAND_OFFSET] != MV_ATA_COMMAND_STANDBY_IMMEDIATE &&
+         buff[SMART_BUF_COMMAND_OFFSET] != WIN_SMART))
+    {
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "invalid SMART command received");
+        setSenseData(pScb, SCSI_SENSE_ILLEGAL_REQUEST,
+                     SCSI_ADSENSE_NO_SENSE);
+        pScb->ScsiStatus = MV_SCSI_STATUS_CHECK_CONDITION;
+        pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_BAD_SCSI_COMMAND;
+        pScb->completionCallBack(pSataAdapter, pScb);
+        return MV_SCSI_COMMAND_STATUS_COMPLETED;
+    }
+
+    if (buff[SMART_BUF_COMMAND_OFFSET] == WIN_IDENTIFY)
+    {
+        if (pScb->dataBufferLength < MV_ATA_IDENTIFY_DEV_DATA_LENGTH*2 + 6)
+        {
+            mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "WIN_IDENTIFY: "
+                     "invalid buffer length.%d\n", pScb->dataBufferLength);
+            setSenseData(pScb, SCSI_SENSE_ILLEGAL_REQUEST,
+                         SCSI_ADSENSE_NO_SENSE);
+            pScb->ScsiStatus = MV_SCSI_STATUS_CHECK_CONDITION;
+            pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_BAD_SCSI_COMMAND;
+            pScb->completionCallBack(pSataAdapter, pScb);
+            return MV_SCSI_COMMAND_STATUS_COMPLETED;
+        }
+        protocolType = MV_NON_UDMA_PROTOCOL_PIO_DATA_IN;
+        buff[SMART_BUF_COMMAND_OFFSET] = MV_ATA_COMMAND_IDENTIFY;
+        buff[SMART_BUF_SECTORCOUNT_OFFSET] = 0;
+        buff[SMART_BUF_LBALOW_OFFSET] = 0;
+        buff[SMART_BUF_LBAMID_OFFSET] = 0;
+        buff[SMART_BUF_LBAHIGH_OFFSET] = 0;
+        buff[SMART_BUF_FEATURES_OFFSET] = 0;
+    }
+    else  if (buff[SMART_BUF_COMMAND_OFFSET] == MV_ATA_COMMAND_IDLE)
+    {
+         mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "SMART command: IDLE command received, sector count = %d.\n",
+              buff[SMART_BUF_SECTORCOUNT_OFFSET]);
+
+        protocolType = MV_NON_UDMA_PROTOCOL_NON_DATA;
+        buff[SMART_BUF_COMMAND_OFFSET] = MV_ATA_COMMAND_IDLE;
+        buff[SMART_BUF_LBALOW_OFFSET] = 0;
+        buff[SMART_BUF_LBAMID_OFFSET] = 0;
+        buff[SMART_BUF_LBAHIGH_OFFSET] = 0;
+        buff[SMART_BUF_FEATURES_OFFSET] = 0;
+    }
+    else  if (buff[SMART_BUF_COMMAND_OFFSET] == MV_ATA_COMMAND_IDLE_IMMEDIATE)
+    {
+         mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "SMART command: IDLE IMMEDIATE command received\n");
+              
+        protocolType = MV_NON_UDMA_PROTOCOL_NON_DATA;
+        buff[SMART_BUF_COMMAND_OFFSET] = MV_ATA_COMMAND_IDLE_IMMEDIATE;
+        buff[SMART_BUF_LBALOW_OFFSET] = 0;
+        buff[SMART_BUF_LBAMID_OFFSET] = 0;
+        buff[SMART_BUF_LBAHIGH_OFFSET] = 0;
+        buff[SMART_BUF_FEATURES_OFFSET] = 0;
+        buff[SMART_BUF_SECTORCOUNT_OFFSET] = 0;
+
+    }
+    else  if (buff[SMART_BUF_COMMAND_OFFSET] == MV_ATA_COMMAND_STANDBY_IMMEDIATE)
+    {
+         mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "SMART command: STANDBY IMMEDIATE command received\n");
+              
+        protocolType = MV_NON_UDMA_PROTOCOL_NON_DATA;
+        buff[SMART_BUF_COMMAND_OFFSET] = MV_ATA_COMMAND_STANDBY_IMMEDIATE;
+        buff[SMART_BUF_LBALOW_OFFSET] = 0;
+        buff[SMART_BUF_LBAMID_OFFSET] = 0;
+        buff[SMART_BUF_LBAHIGH_OFFSET] = 0;
+        buff[SMART_BUF_FEATURES_OFFSET] = 0;
+        buff[SMART_BUF_SECTORCOUNT_OFFSET] = 0;
+
+    }
+ 
+    else
+    {
+        buff[SMART_BUF_LBAMID_OFFSET] = 0x4F;
+        buff[SMART_BUF_LBAHIGH_OFFSET] = 0xC2;
+        switch (buff[SMART_BUF_FEATURES_OFFSET])
+        {
+        case SMART_READ_VALUES:
+        case SMART_READ_THRESHOLDS:
+        case SMART_READ_LOG_SECTOR:
+            if (pScb->dataBufferLength < ATA_SECTOR_SIZE + 6)
+            {
+                setSenseData(pScb, SCSI_SENSE_ILLEGAL_REQUEST,
+                             SCSI_ADSENSE_NO_SENSE);
+                pScb->ScsiStatus = MV_SCSI_STATUS_CHECK_CONDITION;
+                pScb->ScsiCommandCompletion =
+                MV_SCSI_COMPLETION_BAD_SCSI_COMMAND;
+                pScb->completionCallBack(pSataAdapter, pScb);
+                return MV_SCSI_COMMAND_STATUS_COMPLETED;
+            }
+            protocolType = MV_NON_UDMA_PROTOCOL_PIO_DATA_IN;
+            break;
+        case SMART_ENABLE:
+        case SMART_DISABLE:
+        case SMART_AUTO_OFFLINE:
+        case SMART_AUTOSAVE:
+        case SMART_IMMEDIATE_OFFLINE:
+        case SMART_STATUS:
+            protocolType = MV_NON_UDMA_PROTOCOL_NON_DATA;
+            break;
+        default:
+            setSenseData(pScb, SCSI_SENSE_ILLEGAL_REQUEST,
+                         SCSI_ADSENSE_NO_SENSE);
+            pScb->ScsiStatus = MV_SCSI_STATUS_CHECK_CONDITION;
+            pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_BAD_SCSI_COMMAND;
+            pScb->completionCallBack(pSataAdapter, pScb);
+            return MV_SCSI_COMMAND_STATUS_COMPLETED;
+        }
+    }
+    qCommandInfo.type = MV_QUEUED_COMMAND_TYPE_NONE_UDMA;
+    qCommandInfo.commandParams.NoneUdmaCommand.protocolType = protocolType;
+    qCommandInfo.commandParams.NoneUdmaCommand.isEXT = MV_FALSE;
+    qCommandInfo.PMPort = pScb->target;
+    if (protocolType == MV_NON_UDMA_PROTOCOL_NON_DATA)
+    {
+        qCommandInfo.commandParams.NoneUdmaCommand.bufPtr = NULL;
+        qCommandInfo.commandParams.NoneUdmaCommand.count = 0;
+    }
+    else
+    {
+        qCommandInfo.commandParams.NoneUdmaCommand.bufPtr =
+        (MV_U16_PTR)&buff[6];
+        qCommandInfo.commandParams.NoneUdmaCommand.count =
+        (MV_U32)(ATA_SECTOR_SIZE/2);
+        /*in words*/
+    }
+    qCommandInfo.commandParams.NoneUdmaCommand.features =
+    (MV_U16)buff[SMART_BUF_FEATURES_OFFSET];
+    qCommandInfo.commandParams.NoneUdmaCommand.sectorCount =
+    (MV_U16)buff[SMART_BUF_SECTORCOUNT_OFFSET];
+    qCommandInfo.commandParams.NoneUdmaCommand.lbaLow =
+    (MV_U16)buff[SMART_BUF_LBALOW_OFFSET];
+    qCommandInfo.commandParams.NoneUdmaCommand.lbaMid =
+    (MV_U16)buff[SMART_BUF_LBAMID_OFFSET];
+    qCommandInfo.commandParams.NoneUdmaCommand.lbaHigh =
+    (MV_U16)buff[SMART_BUF_LBAHIGH_OFFSET];
+    qCommandInfo.commandParams.NoneUdmaCommand.device = (MV_U8)(MV_BIT6);
+    qCommandInfo.commandParams.NoneUdmaCommand.command =
+    buff[SMART_BUF_COMMAND_OFFSET];
+    qCommandInfo.commandParams.NoneUdmaCommand.callBack =
+    SmartCommandCompletionCB;
+    qCommandInfo.commandParams.NoneUdmaCommand.commandId = (MV_VOID_PTR) pScb;
+    result = mvSataQueueCommand(pSataAdapter, pScb->bus, &qCommandInfo);
+    if (result != MV_QUEUE_COMMAND_RESULT_OK)
+    {
+        checkQueueCommandResult(pScb, result);
+        pScb->completionCallBack(pSataAdapter, pScb);
+        return MV_SCSI_COMMAND_STATUS_COMPLETED;
+    }
+    pDriveData->stats.totalIOs++;
+
+    mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "SMART command: SMART command %02X, queued\n",
+             buff[SMART_BUF_FEATURES_OFFSET]);
+    return MV_SCSI_COMMAND_STATUS_QUEUED;
+}
+
+static void SmartFillReturnBuffer(IN MV_U8* buff,
+                                  IN MV_STORAGE_DEVICE_REGISTERS *registerStruct)
+{
+
+    /*For PIO non-data return registers' values*/
+    if (buff[SMART_BUF_COMMAND_OFFSET] == WIN_SMART &&
+        buff[SMART_BUF_FEATURES_OFFSET] != SMART_READ_VALUES &&
+        buff[SMART_BUF_FEATURES_OFFSET] != SMART_READ_THRESHOLDS &&
+        buff[SMART_BUF_FEATURES_OFFSET] != SMART_READ_LOG_SECTOR)
+    {
+        buff[6+SMART_BUF_COMMAND_OFFSET] =
+        buff[SMART_BUF_COMMAND_OFFSET];
+        buff[6+SMART_BUF_FEATURES_OFFSET] =
+        buff[SMART_BUF_FEATURES_OFFSET];
+        buff[6+SMART_BUF_LBALOW_OFFSET] =
+        registerStruct->lbaLowRegister & 0xFF;
+        buff[6+SMART_BUF_SECTORCOUNT_OFFSET] =
+        registerStruct->sectorCountRegister & 0xFF;
+        buff[6+SMART_BUF_LBAMID_OFFSET] =
+        registerStruct->lbaMidRegister & 0xFF;
+        buff[6+SMART_BUF_LBAHIGH_OFFSET] =
+        registerStruct->lbaHighRegister & 0xFF;
+        buff[6+SMART_BUF_DEVICE_OFFSET] =
+        registerStruct->deviceRegister & 0xFF;
+        buff[6+SMART_BUF_ERROR_OFFSET] =
+        registerStruct->errorRegister & 0xFF;
+    }
+    else
+    {
+	 swap_buf_le16((u16 *) (buff + 6), ATA_SECTOR_SIZE/2);
+    }
+}
+
+static MV_BOOLEAN
+SmartCommandCompletionCB(MV_SATA_ADAPTER *pSataAdapter,
+                         MV_U8 channelNum,
+                         MV_COMPLETION_TYPE comp_type,
+                         MV_VOID_PTR commandId,
+                         MV_U16 responseFlags,
+                         MV_U32 timeStamp,
+                         MV_STORAGE_DEVICE_REGISTERS *registerStruct)
+{
+    MV_SATA_SCSI_CMD_BLOCK  *pScb;
+    struct scsi_cmnd   *SCpnt;
+    struct mv_comp_info *pInfo;
+
+    if (commandId == NULL)
+    {
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, " commandId is NULL, can't hanlde this !!!,adapterId=%d,"
+                 " channel=%d \n", pSataAdapter->adapterId, channelNum);
+        return MV_FALSE;
+    }
+
+    pScb = commandId;
+    SCpnt = (struct scsi_cmnd *)pScb->IALData;
+    pInfo = ( struct mv_comp_info *) &(SCpnt->SCp);
+
+    switch (comp_type)
+    {
+    case MV_COMPLETION_TYPE_NORMAL:
+        if (pScb->ScsiCdb[0] == SCSI_OPCODE_MVSATA_SMART)
+        {
+            SmartFillReturnBuffer(pScb->pDataBuffer, registerStruct);
+            mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "SMART PIO command completed: "
+                     "dev=%04X, Low=%04X, Mid=%04X, High=%04X, "
+                     "SC=%04X, status = %04X,\n",
+                     registerStruct->deviceRegister,
+                     registerStruct->lbaLowRegister,
+                     registerStruct->lbaMidRegister,
+                     registerStruct->lbaHighRegister,
+                     registerStruct->sectorCountRegister,
+                     registerStruct->statusRegister);
+
+	    if(pInfo->kmap_buffer)
+	    {
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)
+		    struct scatterlist *sg;
+		    MV_U8*		pBuffer;
+		    sg = (struct scatterlist *)SCpnt->request_buffer;
+		    
+		    mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "SMART PIO command needs kmap for Data-in buffer\n");
+		    
+		    pBuffer = kmap_atomic(sg->page, KM_IRQ0) + sg->offset;
+		    memcpy(pBuffer, pInfo->pSALBlock->pDataBuffer, sg->length); 	
+		    kunmap_atomic(pBuffer - sg->offset, KM_IRQ0);
+#else
+		    scsi_sg_copy_from_buffer(SCpnt, pInfo->pSALBlock->pDataBuffer,
+					     scsi_bufflen(SCpnt));
+#endif
+	    }
+		    
+        }
+        pScb->dataTransfered = MV_ATA_IDENTIFY_DEV_DATA_LENGTH*2;
+        pScb->ScsiStatus = MV_SCSI_STATUS_GOOD;
+        pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_SUCCESS;
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "command completed. pScb %p\n", pScb);
+        break;
+    case MV_COMPLETION_TYPE_ABORT:
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, " command Aborted. Cdb: %02x %02x %02x %02x %02x "
+                 "%02x %02x %02x %02x %02x\n", pScb->ScsiCdb[0],
+                 pScb->ScsiCdb[1], pScb->ScsiCdb[2], pScb->ScsiCdb[3],
+                 pScb->ScsiCdb[4], pScb->ScsiCdb[5], pScb->ScsiCdb[6],
+                 pScb->ScsiCdb[7], pScb->ScsiCdb[8], pScb->ScsiCdb[9]);
+        pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_ABORTED;
+        pScb->dataTransfered = 0;
+        pScb->senseDataLength = 0;
+        break;
+    case MV_COMPLETION_TYPE_ERROR:
+        pScb->dataTransfered = 0;
+        pScb->senseDataLength = 0;
+        pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_ATA_FAILED;
+
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, " completion error, adapter =%d, channel=%d, flags=%x\n"
+                 ,pSataAdapter->adapterId, channelNum, responseFlags);
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "Failed command Cdb: %02x %02x %02x %02x %02x "
+                 "%02x %02x %02x %02x %02x\n", pScb->ScsiCdb[0],
+                 pScb->ScsiCdb[1], pScb->ScsiCdb[2], pScb->ScsiCdb[3],
+                 pScb->ScsiCdb[4], pScb->ScsiCdb[5], pScb->ScsiCdb[6],
+                 pScb->ScsiCdb[7], pScb->ScsiCdb[8], pScb->ScsiCdb[9]);
+        /* here the  eDMA will be stopped, so we have to flush  */
+        /* the pending commands                                 */
+        handleNoneUdmaError(pScb, registerStruct);
+        break;
+    default:
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "Unknown completion type (%d)\n", comp_type);
+        return MV_FALSE;
+    }
+    pScb->completionCallBack(pSataAdapter, pScb);
+    return MV_TRUE;
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sata/mvLinuxIalLib.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sata/mvLinuxIalLib.c
@@ -0,0 +1,1411 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+*******************************************************************************/
+/*******************************************************************************
+* file_name - mvLinuxIalLib.c
+*
+* DESCRIPTION:
+*   implementation for linux IAL lib functions.
+*
+* DEPENDENCIES:
+*   mvLinuxIalLib.h
+*   mvLinuxIalHt.h
+*
+*
+*******************************************************************************/
+
+/* includes */
+#include <linux/version.h>
+#include <linux/kernel.h>
+#include <linux/autoconf.h>
+#include <linux/types.h>
+#include <linux/slab.h>
+#include <linux/pci.h>
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+    #include <linux/workqueue.h>
+#endif
+
+#include "mvLinuxIalLib.h"
+#include "mvIALCommon.h"
+
+#ifndef scsi_to_pci_dma_dir
+    #define scsi_to_pci_dma_dir(scsi_dir) ((int)(scsi_dir))
+#endif
+
+
+/* Connect / disconnect timers. */
+/* Note that the disconnect timer should be smaller than the SCSI */
+/* subsystem timer. */
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+struct rescan_wrapper
+{
+    struct work_struct     work;
+    IAL_ADAPTER_T       *pAdapter;
+    MV_U8                  channelIndex;
+    MV_U16                 targetsToRemove;
+    MV_U16                 targetsToAdd;
+};
+#endif
+
+
+static void *mv_ial_lib_prd_allocate(IAL_HOST_T *pHost);
+
+static int mv_ial_lib_add_buffer_to_prd_table(MV_SATA_ADAPTER   *pMvSataAdapter,
+                                              MV_SATA_EDMA_PRD_ENTRY *pPRD_table,
+                                              int table_size,
+                                              int *count, dma_addr_t buf_addr,
+                                              unsigned int buf_len, int isEOT);
+
+void release_ata_mem(struct mv_comp_info * pInfo);
+
+dma_addr_t inline pci64_map_page(struct pci_dev *hwdev, void* address,
+                                 size_t size, int direction)
+
+{
+    dma_addr_t mm = pci_map_page(hwdev, virt_to_page(address),
+                                 ((unsigned long)address & ~PAGE_MASK),
+                                 size, direction);
+    return mm;
+}
+
+
+void inline pci64_unmap_page(struct pci_dev *hwdev, dma_addr_t address,
+                             size_t size, int direction)
+{
+    pci_unmap_page(hwdev, address, size, direction);
+}
+
+
+int mv_ial_lib_prd_init(IAL_HOST_T *pHost)
+{
+    MV_U8  i;
+    MV_U32  boolSize = MV_SATA_SW_QUEUE_SIZE;
+
+    if ((pHost->pAdapter->mvSataAdapter.sataAdapterGeneration >= MV_SATA_GEN_IIE)&&
+        (pHost->pAdapter->mvSataAdapter.pciConfigDeviceId != MV_SATA_DEVICE_ID_6082))
+    {
+        boolSize = MV_SATA_GEN2E_SW_QUEUE_SIZE;
+    }
+    /*
+     * Allocate PRD Pool  -
+     * Since the driver supports 64 SG table, then each PRD table can go upto
+     * 1KByte (64 entries * 16byte)
+     */
+    for (i = 0 ; i < boolSize; i++)
+    {
+        pHost->prdPool[i] = kmalloc ((MV_EDMA_PRD_ENTRY_SIZE * MV_PRD_TABLE_SIZE * 2)
+				     + 16, 
+                                     GFP_KERNEL);
+        if (pHost->prdPool[i] == NULL)
+        {
+            mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "[%d %d]: Could not allocate PRD pool\n",
+                     pHost->pAdapter->mvSataAdapter.adapterId, pHost->channelIndex);
+            return -1;
+        }
+        pHost->prdPoolAligned[i] = (void *)(((ulong)(pHost->prdPool[i]) + 15 ) & ~0xf);
+    }
+
+    pHost->freePRDsNum = boolSize;
+
+    return 0;
+}
+
+static void *mv_ial_lib_prd_allocate(IAL_HOST_T *pHost)
+{
+    return pHost->prdPoolAligned[--pHost->freePRDsNum];
+}
+
+int mv_ial_lib_prd_free(IAL_HOST_T *pHost, int size, dma_addr_t dmaPtr,
+                        void *cpuPtr)
+{
+    pci64_unmap_page(pHost->pAdapter->pcidev,
+                     dmaPtr,
+                     size * MV_EDMA_PRD_ENTRY_SIZE,
+                     PCI_DMA_TODEVICE);
+
+    pHost->prdPoolAligned[pHost->freePRDsNum++] = cpuPtr;
+    return 0;
+}
+
+
+int mv_ial_lib_prd_destroy(IAL_HOST_T *pHost)
+{
+    MV_U8 temp;
+    MV_U32  boolSize = MV_SATA_SW_QUEUE_SIZE;
+
+    if ((pHost->pAdapter->mvSataAdapter.sataAdapterGeneration >= MV_SATA_GEN_IIE)&&
+        (pHost->pAdapter->mvSataAdapter.pciConfigDeviceId != MV_SATA_DEVICE_ID_6082))
+    {
+        boolSize = MV_SATA_GEN2E_SW_QUEUE_SIZE;
+    }
+    
+    for (temp = 0; temp < boolSize; temp++)
+    {
+        if (pHost->prdPool[temp] != NULL)
+        {
+            kfree (pHost->prdPool[temp]);
+        }
+    }
+    return 0;
+}
+
+
+/*******************************************************************************
+ *  Name:   mv_ial_lib_add_done_queue
+ *
+ *  Description:    Add scsi_cmnd to done list. Caller must take care of
+ *                  adapter_lock locking.
+ *
+ *  Parameters:     pAdapter - Adapter data structure
+ *                  scsi_cmnd - SCSI command data sturcture
+ *
+ ******************************************************************************/
+void mv_ial_lib_add_done_queue (struct IALAdapter *pAdapter,
+                                MV_U8 channel,
+                                struct scsi_cmnd   *scsi_cmnd)
+{
+    /* Put new command in the tail of the queue and make it point to NULL */
+    ((struct mv_comp_info *)(&scsi_cmnd->SCp))->next_done = NULL;
+
+    mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "Adding command @ %p to done queue, "
+             "channel %d\n",scsi_cmnd, channel);
+    if ((channel >= MV_SATA_CHANNELS_NUM) || (pAdapter->host[channel] == NULL))
+    {
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_FATAL_ERROR, "Adding command @ %p to "
+                 " invalid channel (%d)\n",scsi_cmnd, channel);
+    }
+    if (pAdapter->host[channel]->scsi_cmnd_done_head == NULL)
+    {
+        /* First command to the queue */
+        pAdapter->host[channel]->scsi_cmnd_done_head = scsi_cmnd;
+        pAdapter->host[channel]->scsi_cmnd_done_tail = scsi_cmnd;
+    }
+    else
+    {
+        /* We already have commands in the queue ; put this command in the tail */
+        ((struct mv_comp_info *)(&pAdapter->host[channel]->scsi_cmnd_done_tail->SCp))->next_done = scsi_cmnd;
+        pAdapter->host[channel]->scsi_cmnd_done_tail = scsi_cmnd;
+    }
+}
+
+/*******************************************************************************
+ *  Name:   mv_ial_lib_get_first_cmnd
+ *
+ *  Description:    Gets first scsi_cmnd from a chain of scsi commands to be
+ *                  completed, then sets NULL to head and tail.
+ *                  Caller must take care of adapter_lock locking.
+ *
+ *  Parameters:     pAdapter - Adapter data structure
+ *
+ *  Return Value:   Pointer to first scsi command in chain
+ ******************************************************************************/
+struct scsi_cmnd * mv_ial_lib_get_first_cmnd (struct IALAdapter *pAdapter, MV_U8 channel)
+{
+    if (pAdapter->host[channel] != NULL)
+    {
+        struct scsi_cmnd *cmnd = pAdapter->host[channel]->scsi_cmnd_done_head;
+        pAdapter->host[channel]->scsi_cmnd_done_head = NULL;
+        pAdapter->host[channel]->scsi_cmnd_done_tail = NULL;
+        return cmnd;
+    }
+    return NULL;
+}
+
+/*******************************************************************************
+ *  Name:   mv_ial_lib_do_done
+ *
+ *  Description:    Calls scsi_done of chain of scsi commands.
+ *                  Note that adapter_lock can be locked or unlocked, but
+ *                  caller must take care that io_request_lock is locked.
+ *
+ *  Parameters:     cmnd - First command in scsi commands chain
+ *
+ ******************************************************************************/
+void mv_ial_lib_do_done (struct scsi_cmnd *cmnd)
+{
+    /* Call done function for all commands in queue */
+    while (cmnd)
+    {
+        struct scsi_cmnd *temp;
+        temp = ((struct mv_comp_info *)(&cmnd->SCp))->next_done;
+
+        if (cmnd->scsi_done == NULL)
+        {
+            return;
+        }
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "Calling done to command @ %p "
+                 "scsi_done = %p\n",cmnd, cmnd->scsi_done);
+        cmnd->scsi_done(cmnd);
+        cmnd = temp;
+    }
+}
+
+
+/*******************************************************************************
+ *  Name:   mv_ial_lib_free_channel
+ *
+ *  Description:    free allocated queues for the given channel
+ *
+ *  Parameters:     pMvSataAdapter - pointer to the adapter controler this
+ *                  channel connected to.
+ *          channelNum - channel number.
+ *
+ ******************************************************************************/
+void mv_ial_lib_free_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum)
+{
+    MV_SATA_CHANNEL *pMvSataChannel;
+
+    if (channelNum >= pAdapter->mvSataAdapter.numberOfChannels)
+    {
+        mvLogMsg(MV_IAL_LOG_ID,  MV_DEBUG_ERROR, "[%d]: Bad channelNum=%d\n",
+                 pAdapter->mvSataAdapter.adapterId, channelNum);
+        return;
+    }
+
+    pMvSataChannel = pAdapter->mvSataAdapter.sataChannel[channelNum];
+    kfree(pMvSataChannel);
+    pAdapter->mvSataAdapter.sataChannel[channelNum] = NULL;
+    return;
+}
+/****************************************************************
+ *  Name:   mv_ial_lib_init_channel
+ *
+ *  Description:    allocate request and response queues for the EDMA of the
+ *                  given channel and sets other fields.
+ *
+ *  Parameters:
+ *      pAdapter - pointer to the emulated adapter data structure
+ *      channelNum - channel number.
+ *  Return: 0 on success, otherwise on failure
+ ****************************************************************/
+int mv_ial_lib_init_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum)
+{
+    MV_SATA_CHANNEL *pMvSataChannel;
+    dma_addr_t    req_dma_addr;
+    dma_addr_t    rsp_dma_addr;
+
+    if (channelNum >= pAdapter->mvSataAdapter.numberOfChannels)
+    {
+        mvLogMsg(MV_IAL_LOG_ID,  MV_DEBUG_ERROR, "[%d]: Bad channelNum=%d",
+                 pAdapter->mvSataAdapter.adapterId, channelNum);
+        return -1;
+    }
+
+    pMvSataChannel = (MV_SATA_CHANNEL *)kmalloc(sizeof(MV_SATA_CHANNEL),
+                                                GFP_ATOMIC);
+    if (pMvSataChannel == NULL)
+    {
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "[%d]: out of memory\n",
+                 pAdapter->mvSataAdapter.adapterId);
+        return -1;
+    }
+    pAdapter->mvSataAdapter.sataChannel[channelNum] = pMvSataChannel;
+    pMvSataChannel->channelNumber = channelNum;
+
+    pMvSataChannel->requestQueue = (struct mvDmaRequestQueueEntry *)
+                                   (pAdapter->requestsArrayBaseAlignedAddr +
+                                    (channelNum * pAdapter->requestQueueSize));
+    req_dma_addr = pAdapter->requestsArrayBaseDmaAlignedAddr +
+                   (channelNum * pAdapter->requestQueueSize);
+
+/* check the 1K alignment of the request queue*/
+    if (((u64)req_dma_addr) & 0x3ffULL)
+    {
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "[%d]: request queue allocated isn't 1 K aligned,"
+                 " dma_addr=%x.%x channel=%d\n", pAdapter->mvSataAdapter.adapterId,
+                 (unsigned int)pci64_dma_hi32(req_dma_addr),
+                 (unsigned int)pci64_dma_lo32(req_dma_addr),
+                 channelNum);
+        return -1;
+    }
+    pMvSataChannel->requestQueuePciLowAddress = pci64_dma_lo32(req_dma_addr);
+    pMvSataChannel->requestQueuePciHiAddress = pci64_dma_hi32(req_dma_addr);
+    mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "[%d,%d]: request queue allocated: 0x%p\n",
+             pAdapter->mvSataAdapter.adapterId, channelNum,
+             pMvSataChannel->requestQueue);
+    pMvSataChannel->responseQueue = (struct mvDmaResponseQueueEntry *)
+                                    (pAdapter->responsesArrayBaseAlignedAddr +
+                                     (channelNum * pAdapter->responseQueueSize));
+    rsp_dma_addr = pAdapter->responsesArrayBaseDmaAlignedAddr +
+                   (channelNum * pAdapter->responseQueueSize);
+
+/* check the 256 alignment of the response queue*/
+    if (((u64)rsp_dma_addr) & 0xff)
+    {
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "[%d,%d]: response queue allocated isn't 256 byte "
+                 "aligned, dma_addr=%x.%x\n",
+                 pAdapter->mvSataAdapter.adapterId, (unsigned int)pci64_dma_hi32(rsp_dma_addr),
+                 (unsigned int)pci64_dma_lo32(rsp_dma_addr), channelNum);
+        return -1;
+    }
+    pMvSataChannel->responseQueuePciLowAddress = pci64_dma_lo32(rsp_dma_addr);
+    pMvSataChannel->responseQueuePciHiAddress = pci64_dma_hi32(rsp_dma_addr);
+    mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "[%d,%d]: response queue allocated: 0x%p\n",
+             pAdapter->mvSataAdapter.adapterId, channelNum,
+             pMvSataChannel->responseQueue);
+    return 0;
+}
+
+/****************************************************************
+ *  Name:   mv_ial_lib_int_handler
+ *
+ *  Description:    Interrupt handler.
+ *
+ *  Parameters:     irq - Hardware IRQ number.assume that different cards will have
+ *                  different IRQ's TBD
+ *                  dev_id  - points to the mvxxxxxxDeviceStruct that generated
+ *                    the interrupt
+ *                  regs    -
+ *
+ *
+ ****************************************************************/
+irqreturn_t mv_ial_lib_int_handler (int irq, void *dev_id )
+{
+    IAL_ADAPTER_T       *pAdapter;
+    unsigned long       flags;
+    int                 handled = 0;
+    struct scsi_cmnd *cmnds_done_list = NULL;
+    pAdapter = (IAL_ADAPTER_T *)dev_id;
+
+/*
+ * Acquire the adapter spinlock. Meantime all completed commands will be added
+ * to done queue.
+ */
+    spin_lock_irqsave(&pAdapter->adapter_lock, flags);
+
+    if (mvSataInterruptServiceRoutine(&pAdapter->mvSataAdapter) == MV_TRUE)
+    {
+        handled = 1;
+        pAdapter->procNumOfInterrupts ++;
+        mvSataScsiPostIntService(pAdapter->ataScsiAdapterExt);
+    }
+    /* Unlock adapter lock */
+    spin_unlock_irqrestore(&pAdapter->adapter_lock, flags);
+    /* Check if there are commands in the done queue to be completed */
+    if (handled == 1)
+    {
+        MV_U8 i;
+
+        for (i = 0; i < pAdapter->maxHosts; i++)
+        {
+            spin_lock_irqsave(&pAdapter->adapter_lock, flags);
+            cmnds_done_list = mv_ial_lib_get_first_cmnd(pAdapter, i);
+            spin_unlock_irqrestore(&pAdapter->adapter_lock, flags);
+            if (cmnds_done_list)
+            {
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+                spin_lock_irqsave(&io_request_lock, flags);
+#else
+                spin_lock_irqsave(pAdapter->host[i]->scsihost->host_lock, flags);
+#endif
+                mv_ial_lib_do_done(cmnds_done_list);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+                spin_unlock_irqrestore(&io_request_lock, flags);
+#else
+                spin_unlock_irqrestore(pAdapter->host[i]->scsihost->host_lock, flags);
+#endif
+            }
+        }
+    }
+    return IRQ_RETVAL(handled);
+}
+
+/****************************************************************
+ *  Name: mv_ial_lib_add_buffer_to_prd_table
+ *
+ *  Description:    insert one buffer into number of entries in the PRD table,
+ *                  keeping 64KB boundaries
+ *
+ *  Parameters:     pPRD_table: pointer to the PRD table.
+ *          table_size: number of entries in the PRD table.
+ *          count: index of the next entry to add, should be updated by this
+ *          function
+ *          buf_addr,buf_len: the dma address and the size of the buffer to add.
+ *          isEOT: 1 if this is the last entry
+ *  Returns:        0 on success, otherwise onfailure.
+ *
+ ****************************************************************/
+
+static int mv_ial_lib_add_buffer_to_prd_table(MV_SATA_ADAPTER   *pMvSataAdapter,
+                                              MV_SATA_EDMA_PRD_ENTRY *pPRD_table,
+                                              int table_size, int *count,
+                                              dma_addr_t buf_addr,
+                                              unsigned int buf_len,
+                                              int isEOT)
+{
+    unsigned int    entry = *count;
+    u64             xcount = 0;
+
+    mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG,"insert to PRD table, count=%d, buf_addr=%x, buf_len=%x\n",
+             *count,(unsigned int) buf_addr, buf_len);
+
+
+
+    /*
+    The buffer is splitted in case then either the buffer size exceeds 64 KB
+    or 2 high address bits of all data in the buffer are not identical
+    */
+    while (buf_len)
+    {
+        if (entry >= table_size)
+        {
+            mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR,"PRD table too small (entry %d, table_size %d\n",
+                     entry, table_size);
+            mvLogMsg(MV_IAL_LOG_ID,  MV_DEBUG_ERROR,"[%d] insert to PRD table, count=%d,"
+                     " buf_addr=%x, buf_len=%x\n",
+                     pMvSataAdapter->adapterId,
+                     *count,(unsigned int) buf_addr, buf_len);
+            return -1;
+        }
+        else
+        {
+            u64 bcount = buf_len;
+            /*buffer size exceeds 64K*/
+            if (bcount > 0x10000)
+                bcount = 0x10000;
+            if (buf_addr & 0x1)
+            {
+                mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, " PRD entry low address is not 1 bit aligned\n");
+                return -1;
+            }
+#if (BITS_PER_LONG > 32) || defined(CONFIG_HIGHMEM64G)
+            /*Split the buffer if 2 high address bits of all
+            data in the buffer are not the same*/
+            if ((buf_addr | 0xFFFFFFFF)  !=
+                ((buf_addr + bcount - 1) | 0xFFFFFFFF))
+            {
+                bcount = 0x100000000ULL - (buf_addr & 0xFFFFFFFF);
+            }
+#endif
+	    if(((buf_addr & MRVL_SATA_BOUNDARY_MASK) + bcount) > 
+	       MRVL_SATA_BUFF_BOUNDARY)
+	    {
+		 bcount = MRVL_SATA_BUFF_BOUNDARY -
+		      (buf_addr & MRVL_SATA_BOUNDARY_MASK);
+	    }
+            /*In case then buffer size is 64K
+            PRD entry byte count is set to zero*/
+            xcount = bcount & 0xffff;
+            pPRD_table[entry].lowBaseAddr =
+            cpu_to_le32(pci64_dma_lo32(buf_addr));
+            pPRD_table[entry].highBaseAddr =
+            cpu_to_le32(pci64_dma_hi32(buf_addr));
+            pPRD_table[entry].byteCount = cpu_to_le16(xcount);
+            pPRD_table[entry].reserved = 0;
+            /* enable snoop on data buffers */
+            pPRD_table[entry].flags = 0;/*cpu_to_le16(MV_EDMA_PRD_NO_SNOOP_FLAG);*/
+            if (xcount & 0x1)
+            {
+                mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR," PRD entry byte count is not 1 bit aligned\n");
+                return -1;
+            }
+            buf_addr += bcount;
+            buf_len -= bcount;
+            entry++;
+        }
+    }
+
+    if (entry)
+    {
+        if (isEOT)/* enable snoop on data buffers */
+            pPRD_table[entry-1].flags = cpu_to_le16(MV_EDMA_PRD_EOT_FLAG /*|
+                                                    MV_EDMA_PRD_NO_SNOOP_FLAG*/);
+
+        *count = entry;
+        return 0;
+    }
+
+    mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "insert zero entries to PRD table \n");
+    return -1;
+}
+/* map to pci */
+int mv_ial_lib_generate_prd(MV_SATA_ADAPTER *pMvSataAdapter, struct scsi_cmnd *SCpnt,
+                            struct mv_comp_info *completion_info)
+{
+    IAL_ADAPTER_T   *pAdapter = MV_IAL_ADAPTER(SCpnt->device->host);
+    IAL_HOST_T      *pHost = HOSTDATA(SCpnt->device->host);
+    MV_SATA_EDMA_PRD_ENTRY *pPRD_table = NULL;
+    dma_addr_t PRD_dma_address = 0;
+    dma_addr_t busaddr = 0;
+    unsigned int prd_size = 0;
+    struct scatterlist *sg;
+    unsigned int prd_count;
+    MV_SATA_DEVICE_TYPE deviceType = pAdapter->ataScsiAdapterExt->ataDriveData[pHost->channelIndex][SCpnt->device->id].identifyInfo.deviceType;
+    /*should be removed*/
+#ifndef   MV_SUPPORT_1MBYTE_IOS 
+    if (scsi_bufflen(SCpnt) > (SCpnt->device->host->max_sectors << 9))
+    {
+        printk("ERROR: request length exceeds the maximum alowed value, %x %x\n",
+               pMvSataAdapter->pciConfigDeviceId,
+               pMvSataAdapter->pciConfigRevisionId);
+    }
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)
+    if (SCpnt->use_sg)
+    {
+        unsigned int sg_count;
+        unsigned int i;
+        sg = (struct scatterlist *) SCpnt->request_buffer;
+
+        sg_count = pci64_map_sg(pAdapter->pcidev, sg,
+                                SCpnt->use_sg,
+                                scsi_to_pci_dma_dir(SCpnt->sc_data_direction));
+
+        if (sg_count != SCpnt->use_sg)
+            printk("WARNING sg_count(%d) != SCpnt->use_sg(%d)\n",
+                   (unsigned int)sg_count, SCpnt->use_sg);
+#else
+	{
+        unsigned int sg_count;
+        unsigned int i;
+
+	sg = scsi_sglist(SCpnt);
+	sg_count = scsi_dma_map(SCpnt);
+	if (sg_count < 0) {
+		dev_err(&pAdapter->pcidev->dev, "pci_map_sg failed!\n");
+		return -1;
+	}
+
+#endif
+        if ((sg_count == 1) && (pAdapter->mvSataAdapter.sataAdapterGeneration >=
+                                MV_SATA_GEN_IIE) && (sg_dma_len(sg) <= 0x10000) && 
+            (deviceType != MV_SATA_DEVICE_TYPE_ATAPI_DEVICE))
+        {
+            completion_info->pSALBlock->singleDataRegion = MV_TRUE;
+            completion_info->cpu_PRDpnt = NULL;
+            completion_info->dma_PRDpnt = 0;
+            completion_info->allocated_entries = 0;
+            completion_info->single_buff_busaddr = 0;
+            PRD_dma_address = sg_dma_address(sg);
+            completion_info->pSALBlock->PRDTableLowPhyAddress = pci64_dma_lo32(PRD_dma_address);
+            completion_info->pSALBlock->PRDTableHighPhyAddress = pci64_dma_hi32(PRD_dma_address);
+            completion_info->pSALBlock->byteCount = sg_dma_len(sg);
+            mvLogMsg(MV_IAL_LOG_ID,  MV_DEBUG, "Use single data region"
+                     " buffer, size=%d\n",
+                     completion_info->pSALBlock->byteCount);
+
+            return 0;
+        }
+        completion_info->pSALBlock->singleDataRegion = MV_FALSE;
+        prd_size = MV_PRD_TABLE_SIZE;
+        pPRD_table = (MV_SATA_EDMA_PRD_ENTRY*)mv_ial_lib_prd_allocate(pHost);
+        if (pPRD_table == NULL)
+        {
+            mvLogMsg(MV_IAL_LOG_ID,  MV_DEBUG_ERROR, "Failed to allocate PRD table, requested size=%d\n"
+                     , prd_size);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)
+            pci64_unmap_sg(pAdapter->pcidev, sg, SCpnt->use_sg,
+                           scsi_to_pci_dma_dir(SCpnt->sc_data_direction));
+#else
+	    scsi_dma_unmap(SCpnt);
+#endif
+            return -1;
+        }
+        prd_count=0;
+        for (i=0; (i < sg_count) && (sg_dma_len(sg)); i++, sg++)
+        {
+            int isEOT;
+
+            isEOT =((i+1 < sg_count) && (sg_dma_len(&sg[1]))) ? 0 : 1;
+
+            if (mv_ial_lib_add_buffer_to_prd_table(pMvSataAdapter,
+                                                   pPRD_table,
+                                                   prd_size,
+                                                   &prd_count,
+                                                   sg_dma_address(sg),
+                                                   sg_dma_len(sg),
+                                                   isEOT))
+            {
+                mvLogMsg(MV_IAL_LOG_ID,  MV_DEBUG_ERROR," in building PRD table from scatterlist, "
+                         "prd_size=%d, prd_count=%d\n", prd_size,
+                         prd_count);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)
+                pci64_unmap_sg(pAdapter->pcidev,
+                               (struct scatterlist *)SCpnt->request_buffer,
+                               SCpnt->use_sg,
+                               scsi_to_pci_dma_dir(SCpnt->sc_data_direction));
+#else
+		scsi_dma_unmap(SCpnt);
+#endif
+
+                return -1;
+            }
+        }
+        PRD_dma_address = pci64_map_page(pAdapter->pcidev,
+                                         pPRD_table,
+                                         MV_EDMA_PRD_ENTRY_SIZE * (prd_size),
+                                         PCI_DMA_TODEVICE);
+    }
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)
+    else if (scsi_bufflen(SCpnt) && SCpnt->sc_data_direction != PCI_DMA_NONE)
+    {
+        if ((pAdapter->mvSataAdapter.sataAdapterGeneration >= MV_SATA_GEN_IIE)
+            && (scsi_bufflen(SCpnt) <= 0x10000) && 
+            (deviceType != MV_SATA_DEVICE_TYPE_ATAPI_DEVICE))
+        {
+            completion_info->pSALBlock->singleDataRegion = MV_TRUE;
+            completion_info->cpu_PRDpnt = NULL;
+            completion_info->dma_PRDpnt = 0;
+            completion_info->allocated_entries = 0;
+            busaddr = pci64_map_page(pAdapter->pcidev, SCpnt->request_buffer,
+                                     scsi_bufflen(SCpnt),
+                                     scsi_to_pci_dma_dir(SCpnt->sc_data_direction));
+            completion_info->single_buff_busaddr = busaddr;
+            completion_info->pSALBlock->PRDTableLowPhyAddress = pci64_dma_lo32(busaddr);
+            completion_info->pSALBlock->PRDTableHighPhyAddress = pci64_dma_hi32(busaddr);
+            completion_info->pSALBlock->byteCount = scsi_bufflen(SCpnt);
+            mvLogMsg(MV_IAL_LOG_ID,  MV_DEBUG, "Use single data region"
+                     " buffer, size=%d\n",
+                     completion_info->pSALBlock->byteCount);
+            return 0;
+        }
+        completion_info->pSALBlock->singleDataRegion = MV_FALSE;
+        prd_size = MV_PRD_TABLE_SIZE;
+        pPRD_table = (MV_SATA_EDMA_PRD_ENTRY*)mv_ial_lib_prd_allocate(pHost);
+        if (pPRD_table == NULL)
+        {
+            mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "Failed to allocate PRD table, requested size=%d\n",
+                     prd_size);
+            return -1;
+        }
+
+        busaddr = pci64_map_page(pAdapter->pcidev, SCpnt->request_buffer,
+                                 scsi_bufflen(SCpnt),
+                                 scsi_to_pci_dma_dir(SCpnt->sc_data_direction));
+        prd_count = 0;
+        if (mv_ial_lib_add_buffer_to_prd_table(pMvSataAdapter,
+                                               pPRD_table,
+                                               prd_size,
+                                               &prd_count, busaddr,
+                                               scsi_bufflen(SCpnt), 1))
+        {
+            mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, " in building PRD table from buffer\n");
+            pci64_unmap_page(pAdapter->pcidev, busaddr, scsi_bufflen(SCpnt),
+                             scsi_to_pci_dma_dir(SCpnt->sc_data_direction));
+            return -1;
+        }
+        PRD_dma_address = pci64_map_page(pAdapter->pcidev,
+                                         pPRD_table,
+                                         MV_EDMA_PRD_ENTRY_SIZE* (prd_size),
+                                         PCI_DMA_TODEVICE);
+    }
+#endif
+    completion_info->cpu_PRDpnt = pPRD_table;
+    completion_info->dma_PRDpnt = PRD_dma_address;
+    completion_info->allocated_entries = prd_size;
+    completion_info->single_buff_busaddr = busaddr;
+    completion_info->pSALBlock->PRDTableLowPhyAddress = pci64_dma_lo32(PRD_dma_address);
+    completion_info->pSALBlock->PRDTableHighPhyAddress = pci64_dma_hi32(PRD_dma_address);
+    mvLogMsg(MV_IAL_LOG_ID,  MV_DEBUG, "PRD table allocated %p\n", pPRD_table);
+    mvLogMsg(MV_IAL_LOG_ID,  MV_DEBUG, "PRD table allocated (dma) %x \n", PRD_dma_address);
+    return 0;
+}
+
+
+/****************************************************************
+ *  Name: mv_ial_block_requests
+ *
+ *  Description:    Blocks request from SCSI mid layer while channel
+ *                  initialization is in progress
+ *
+ *  Parameters:     pAdapter, pointer to the IAL adapter data structure.
+ *                  channelIndex, channel number
+ *
+ *  Returns:        None.
+ *
+ ****************************************************************/
+
+void mv_ial_block_requests(struct IALAdapter *pAdapter, MV_U8 channelIndex)
+{
+    if (MV_TRUE == pAdapter->host[channelIndex]->hostBlocked)
+    {
+        return;
+    }
+
+    if ((pAdapter->ialCommonExt.channelState[channelIndex] != CHANNEL_READY) &&
+        (pAdapter->ialCommonExt.channelState[channelIndex] != CHANNEL_NOT_CONNECTED))
+    {
+        pAdapter->host[channelIndex]->hostBlocked = MV_TRUE;
+        mvLogMsg(MV_IAL_LOG_ID,  MV_DEBUG, "[%d,%d]: blocking SCSI host.\n",
+                 pAdapter->mvSataAdapter.adapterId, channelIndex);
+        scsi_block_requests(pAdapter->host[channelIndex]->scsihost);
+    }
+    else
+    {
+        pAdapter->host[channelIndex]->hostBlocked = MV_FALSE;
+    }
+}
+
+/****************************************************************
+ *  Name: mv_ial_unblock_requests
+ *
+ *  Description:    Unblocks request from SCSI mid layer for non connected
+ *                  channels or channels whose initialization is finished
+ *
+ *  Parameters:     pAdapter -  pointer to the IAL adapter data structure.
+ *                  channelIndex -  channel number
+ *
+ *  Returns:        None.
+ *
+ ****************************************************************/
+static void mv_ial_unblock_requests(struct IALAdapter *pAdapter, MV_U8 channelIndex)
+{
+    if ((CHANNEL_NOT_CONNECTED == pAdapter->ialCommonExt.channelState[channelIndex]) ||
+        (CHANNEL_READY == pAdapter->ialCommonExt.channelState[channelIndex]))
+    {
+        pAdapter->host[channelIndex]->hostBlocked = MV_FALSE;
+        mvLogMsg(MV_IAL_LOG_ID,  MV_DEBUG, "[%d,%d]: unblocking SCSI host.\n",
+                 pAdapter->mvSataAdapter.adapterId, channelIndex);
+        scsi_unblock_requests(pAdapter->host[channelIndex]->scsihost);
+    }
+}
+
+
+
+
+/****************************************************************
+ *  Name: mv_ial_lib_event_notify
+ *
+ *  Description:    this function called by the low  level to notify a certain event
+ *
+ *  Parameters:     pMvSataAdapter, pointer to the Device data structure.
+ *
+ *  Returns:        MV_TRUE on success, MV_FALSE on failure.
+ *
+ ****************************************************************/
+MV_BOOLEAN mv_ial_lib_event_notify(MV_SATA_ADAPTER *pMvSataAdapter, MV_EVENT_TYPE eventType,
+                                   MV_U32 param1, MV_U32 param2)
+{
+    IAL_ADAPTER_T   *pAdapter = pMvSataAdapter->IALData;
+    MV_U8   channel = param2;
+
+    switch (eventType)
+    {
+    case MV_EVENT_TYPE_SATA_CABLE:
+        {
+
+
+            if (param1 == MV_SATA_CABLE_EVENT_CONNECT)
+            {
+
+                mvLogMsg(MV_IAL_LOG_ID,  MV_DEBUG, "[%d,%d]: device connected event received\n",
+                         pMvSataAdapter->adapterId, channel);
+                mvRestartChannel(&pAdapter->ialCommonExt, channel,
+                                 pAdapter->ataScsiAdapterExt, MV_FALSE);
+                mv_ial_block_requests(pAdapter, channel);
+            }
+            else if (param1 == MV_SATA_CABLE_EVENT_DISCONNECT)
+            {
+                mvLogMsg(MV_IAL_LOG_ID,  MV_DEBUG, "[%d,%d]: device disconnected event received \n",
+                         pMvSataAdapter->adapterId, channel);
+                if (mvSataIsStorageDeviceConnected(pMvSataAdapter, channel, NULL) ==
+                    MV_FALSE)
+                {
+                    mvStopChannel(&pAdapter->ialCommonExt, channel,
+                                  pAdapter->ataScsiAdapterExt);
+                }
+                else
+                {
+                    mvLogMsg(MV_IAL_LOG_ID,  MV_DEBUG, "[%d,%d]: device disconnected event ignored.\n",
+                             pMvSataAdapter->adapterId, channel);
+                }
+
+            }
+            else if (param1 == MV_SATA_CABLE_EVENT_PM_HOT_PLUG)
+            {
+                mvPMHotPlugDetected(&pAdapter->ialCommonExt, channel,
+                                    pAdapter->ataScsiAdapterExt);
+                mv_ial_block_requests(pAdapter, channel);
+            }
+            else
+            {
+
+                mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "illegal value for param1(%d) at "
+                         "connect/disconect event, host=%d\n", param1,
+                         pMvSataAdapter->adapterId );
+            }
+        }
+        break;
+    case MV_EVENT_TYPE_ADAPTER_ERROR:
+        mvLogMsg(MV_IAL_LOG_ID,  MV_DEBUG_ERROR, "DEVICE error event received, pci cause "
+                 "reg=%x, don't know how to handle this\n", param1);
+        return MV_TRUE;
+    case MV_EVENT_TYPE_SATA_ERROR:
+        switch (param1)
+        {
+        case MV_SATA_RECOVERABLE_COMMUNICATION_ERROR:
+            mvLogMsg(MV_IAL_LOG_ID,  MV_DEBUG_ERROR,
+                     " [%d %d] sata recoverable error occured\n",
+                     pMvSataAdapter->adapterId, channel);
+            break;
+        case MV_SATA_UNRECOVERABLE_COMMUNICATION_ERROR:
+            mvLogMsg(MV_IAL_LOG_ID,  MV_DEBUG_ERROR,
+                     " [%d %d] sata unrecoverable error occured, restart channel\n",
+                     pMvSataAdapter->adapterId, channel);
+            mvSataChannelHardReset(pMvSataAdapter, channel);
+            mvRestartChannel(&pAdapter->ialCommonExt, channel,
+                             pAdapter->ataScsiAdapterExt, MV_TRUE);
+            mv_ial_block_requests(pAdapter, channel);
+            break;
+        case MV_SATA_DEVICE_ERROR:
+            mvLogMsg(MV_IAL_LOG_ID,  MV_DEBUG_ERROR,
+                     " [%d %d] device error occured\n",
+                     pMvSataAdapter->adapterId, channel);
+            break;
+        }
+        break;
+    default:
+        mvLogMsg(MV_IAL_LOG_ID,  MV_DEBUG_ERROR,  " adapter %d unknown event %d"
+                 " param1= %x param2 = %x\n", pMvSataAdapter->adapterId,
+                 eventType - MV_EVENT_TYPE_ADAPTER_ERROR, param1, param2);
+        return MV_FALSE;
+
+    }/*switch*/
+    return MV_TRUE;
+}
+
+MV_BOOLEAN IALConfigQueuingMode(MV_SATA_ADAPTER *pSataAdapter,
+                                MV_U8 channelIndex,
+                                MV_EDMA_MODE mode,
+                                MV_SATA_SWITCHING_MODE switchingMode,
+                                MV_BOOLEAN  use128Entries)
+
+{
+    IAL_ADAPTER_T   *pAdapter = pSataAdapter->IALData;
+    pAdapter->host[channelIndex]->mode = mode;
+    pAdapter->host[channelIndex]->switchingMode = switchingMode;
+    pAdapter->host[channelIndex]->use128Entries = use128Entries;
+
+    if (mvSataConfigEdmaMode(pSataAdapter, channelIndex,
+                             mode, 31) == MV_FALSE)
+    {
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "[%d %d]: mvSataConfigEdmaMode failed\n",
+                 pSataAdapter->adapterId, channelIndex);
+        return -1;
+    }
+    return MV_TRUE;
+}
+
+MV_BOOLEAN IALInitChannel(MV_SATA_ADAPTER *pSataAdapter, MV_U8 channelIndex)
+{
+    if (mv_ial_lib_init_channel(pSataAdapter->IALData, channelIndex) == 0)
+    {
+        return MV_TRUE;
+    }
+    return MV_FALSE;
+}
+void IALReleaseChannel(MV_SATA_ADAPTER *pSataAdapter, MV_U8 channelIndex)
+{
+    mv_ial_lib_free_channel(pSataAdapter->IALData, channelIndex);
+}
+
+void IALChannelCommandsQueueFlushed(MV_SATA_ADAPTER *pSataAdapter, MV_U8 channelIndex)
+{
+
+}
+
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+
+static void channel_rescan(struct work_struct *work)
+{
+    struct rescan_wrapper* rescan = container_of(work, struct rescan_wrapper, work);
+    struct Scsi_Host *host;
+    struct scsi_device *sdev = NULL;
+    MV_U16 target;
+    if (rescan->pAdapter->host[rescan->channelIndex] == NULL)
+    {
+        kfree(rescan);
+        return;
+    }
+    host = rescan->pAdapter->host[rescan->channelIndex]->scsihost;
+    down(&rescan->pAdapter->rescan_mutex);
+    if (atomic_read(&rescan->pAdapter->stopped) > 0)
+    {
+        up(&rescan->pAdapter->rescan_mutex);
+        kfree(rescan);
+        return;
+    }
+    mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "[%d %d] channel_rescan(): "
+             "targets to add 0x%X, targets to remove 0x%X\n",
+             rescan->pAdapter->mvSataAdapter.adapterId,
+             rescan->channelIndex,
+             rescan->targetsToRemove,
+             rescan->targetsToAdd);
+
+    for (target = 0; (rescan->targetsToRemove != 0) && (target < host->max_id); target++)
+    {
+        if (rescan->targetsToRemove & (1 << target))
+        {
+            sdev = scsi_device_lookup(host, 0, target, 0);
+            if (sdev != NULL)
+            {
+		    /*scsi_device_cancel(sdev, 0);*/
+                scsi_remove_device(sdev);
+                scsi_device_put(sdev);
+            }
+	    else
+	    {
+		    mvLogMsg(MV_IAL_LOG_ID,
+                         MV_DEBUG_ERROR,
+                         "[%d %d %d] failed to deattach scsi device\n",
+                         rescan->pAdapter->mvSataAdapter.adapterId,
+                         rescan->channelIndex,
+                         target);
+	    }
+        }
+    }
+    sdev = NULL;
+    for (target = 0; (rescan->targetsToAdd != 0) && (target < host->max_id); target++)
+    {
+        if (rescan->targetsToAdd & (1 << target))
+        {
+            int error = scsi_add_device(host, 0, target, 0);
+            if (error)
+            {
+                mvLogMsg(MV_IAL_LOG_ID,
+                         MV_DEBUG_ERROR,
+                         "[%d %d %d] Error adding scsi device\n",
+                         rescan->pAdapter->mvSataAdapter.adapterId,
+                         rescan->channelIndex,
+                         target);
+            }
+        }
+    }
+    up(&rescan->pAdapter->rescan_mutex);
+    kfree(rescan);
+}
+#endif
+
+MV_BOOLEAN IALBusChangeNotify(MV_SATA_ADAPTER *pSataAdapter,
+                              MV_U8 channelIndex)
+{
+    return MV_TRUE;
+}
+
+MV_BOOLEAN IALBusChangeNotifyEx(MV_SATA_ADAPTER *pSataAdapter,
+                                MV_U8 channelIndex,
+                                MV_U16 targetsToRemove,
+                                MV_U16 targetsToAdd)
+{
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+    IAL_ADAPTER_T   *pAdapter = pSataAdapter->IALData;
+    if (0 == atomic_read(&pAdapter->stopped))
+    {
+        struct rescan_wrapper* rescan =
+        kmalloc(sizeof(struct rescan_wrapper), GFP_ATOMIC);
+        if (rescan != NULL)
+        {
+            INIT_WORK(&rescan->work, channel_rescan);
+            rescan->pAdapter = pAdapter;
+            rescan->channelIndex = channelIndex;
+            rescan->targetsToRemove = targetsToRemove;
+            rescan->targetsToAdd = targetsToAdd;
+            mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR,
+                     "[%d %d] Rescan bus: remove 0x%X, add 0x%X.\n",
+                     pSataAdapter->adapterId,
+                     channelIndex, targetsToRemove, targetsToAdd);
+            if (schedule_work(&rescan->work) == 0)
+            {
+                mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR,
+                         "[%d %d] Rescan bus: schedule_work() failed.\n",
+                         pSataAdapter->adapterId,
+                         channelIndex);
+                kfree(rescan);
+            }
+        }
+        else
+        {
+            mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR,
+                     "[%d %d] Rescan bus: memory allocation error.\n",
+                     pSataAdapter->adapterId,
+                     channelIndex);
+        }
+    }
+#endif
+    return MV_TRUE;
+}
+
+
+void asyncStartTimerFunction(unsigned long data)
+{
+    IAL_ADAPTER_T   *pAdapter = (IAL_ADAPTER_T *)data;
+    unsigned long       flags;
+    struct scsi_cmnd *cmnds_done_list = NULL;
+    MV_U8 i;
+
+    spin_lock_irqsave(&pAdapter->adapter_lock, flags);
+    if (pAdapter->stopAsyncTimer == MV_FALSE)
+    {
+        mvIALTimerCallback(&pAdapter->ialCommonExt,
+                           pAdapter->ataScsiAdapterExt);
+        for (i = 0; i < pAdapter->maxHosts; i++)
+        {
+            if (MV_TRUE == pAdapter->host[i]->hostBlocked)
+            {
+                spin_unlock_irqrestore(&pAdapter->adapter_lock, flags);
+                mv_ial_unblock_requests(pAdapter, i);
+                spin_lock_irqsave(&pAdapter->adapter_lock, flags);
+            }
+        }
+        pAdapter->asyncStartTimer.expires = jiffies + MV_LINUX_ASYNC_TIMER_PERIOD;
+        add_timer (&pAdapter->asyncStartTimer);
+    }
+    else
+    {
+        mvLogMsg(MV_IAL_LOG_ID,  MV_DEBUG,   "[%d]: Async timer stopped\n",
+                 pAdapter->mvSataAdapter.adapterId);
+    }
+    spin_unlock_irqrestore(&pAdapter->adapter_lock, flags);
+    /* Check if there are commands in the done queue to be completed */
+    for (i = 0; i < pAdapter->maxHosts; i++)
+    {
+        spin_lock_irqsave(&pAdapter->adapter_lock, flags);
+        cmnds_done_list = mv_ial_lib_get_first_cmnd(pAdapter, i);
+        spin_unlock_irqrestore(&pAdapter->adapter_lock, flags);
+        if (cmnds_done_list)
+        {
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+            spin_lock_irqsave(&io_request_lock, flags);
+#else
+            spin_lock_irqsave(pAdapter->host[i]->scsihost->host_lock, flags);
+#endif
+            mv_ial_lib_do_done(cmnds_done_list);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+            spin_unlock_irqrestore(&io_request_lock, flags);
+#else
+            spin_unlock_irqrestore(pAdapter->host[i]->scsihost->host_lock, flags);
+#endif
+        }
+    }
+}
+
+/****************************************************************
+ *  Name: release_ata_mem
+ *
+ *  Description:   free memory allocated to the PRD table
+ *          unmap the data buffers of the scsi command
+ *          free completion_info data structure.
+ *  Parameters:     pInfo: pointer to the data structure returned by the
+ *          completion call back function to identify the origial command
+ *
+ ****************************************************************/
+void release_ata_mem(struct mv_comp_info * pInfo)
+{
+    IAL_ADAPTER_T   *pAdapter = MV_IAL_ADAPTER(pInfo->SCpnt->device->host);
+    IAL_HOST_T      *pHost = HOSTDATA(pInfo->SCpnt->device->host);
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+    if(pInfo->kmap_buffer)
+    {
+	if( pInfo->SCpnt->sc_data_direction == DMA_FROM_DEVICE)
+	{
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)
+
+		struct scatterlist *sg;
+		MV_U8*		pBuffer;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)
+        	sg = (struct scatterlist *) pInfo->SCpnt->request_buffer;
+#else
+		sg = scsi_sglist(pInfo->SCpnt);
+#endif
+		mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "SCpnt %p: copy data from temp"
+			 " buffer to command buffer, length %d \n", pInfo->SCpnt, sg->length);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)
+		pBuffer = kmap_atomic(sg->page, KM_IRQ0) + sg->offset;
+#else
+		pBuffer = kmap_atomic(sg_page(sg), KM_IRQ0) + sg->offset;
+#endif
+		memcpy(pBuffer, pInfo->pSALBlock->pDataBuffer , sg->length); 	
+	        kunmap_atomic(pBuffer - sg->offset, KM_IRQ0);
+
+#else
+		scsi_sg_copy_from_buffer(pInfo->SCpnt, pInfo->pSALBlock->pDataBuffer,
+					 scsi_bufflen(pInfo->SCpnt));
+
+#endif
+
+	}
+	mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "SCpnt %p: free temp data "
+		 "buffer\n", pInfo->SCpnt);
+	kfree(pInfo->pSALBlock->pDataBuffer);
+    }
+#endif
+    if (pInfo->cpu_PRDpnt)
+    {
+        mv_ial_lib_prd_free(pHost,
+                            pInfo->allocated_entries,
+                            pInfo->dma_PRDpnt,
+                            pInfo->cpu_PRDpnt);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)
+        if (pInfo->SCpnt->use_sg)
+        {
+            pci64_unmap_sg(pAdapter->pcidev,
+                           (struct scatterlist *)pInfo->SCpnt->request_buffer,
+                           pInfo->SCpnt->use_sg,
+                           scsi_to_pci_dma_dir(pInfo->SCpnt->sc_data_direction));
+        }
+        else
+        {
+            pci64_unmap_page(pAdapter->pcidev,
+                             pInfo->single_buff_busaddr,
+                             scsi_bufflen(pInfo->SCpnt),
+                             scsi_to_pci_dma_dir(pInfo->SCpnt->sc_data_direction));
+        }
+#else
+	scsi_dma_unmap(pInfo->SCpnt);
+#endif
+    }
+    pInfo->cpu_PRDpnt = NULL;
+    kfree(pInfo->pSALBlock);
+}
+
+int mv_ial_lib_allocate_edma_queues(IAL_ADAPTER_T *pAdapter)
+{
+    ulong *tmp;
+    ulong   requests_array_size;
+    ulong   responses_array_size;
+
+    if ((pAdapter->mvSataAdapter.sataAdapterGeneration >= MV_SATA_GEN_IIE) && 
+		(pAdapter->mvSataAdapter.pciConfigDeviceId != MV_SATA_DEVICE_ID_6082))
+    {
+        pAdapter->requestQueueSize = MV_EDMA_GEN2E_REQUEST_QUEUE_SIZE;
+        pAdapter->responseQueueSize = MV_EDMA_GEN2E_RESPONSE_QUEUE_SIZE;
+    }
+    else
+    {
+        pAdapter->requestQueueSize = MV_EDMA_REQUEST_QUEUE_SIZE;
+        pAdapter->responseQueueSize = MV_EDMA_RESPONSE_QUEUE_SIZE;
+    }
+    
+    requests_array_size = (pAdapter->maxHosts + 1) * (pAdapter->requestQueueSize);
+    responses_array_size =(pAdapter->maxHosts + 1) * (pAdapter->responseQueueSize);
+
+    pAdapter->requestsArrayBaseAddr =
+    pci_alloc_consistent(pAdapter->pcidev,
+                         requests_array_size,
+                         &(pAdapter->requestsArrayBaseDmaAddr));
+    if (pAdapter->requestsArrayBaseAddr == NULL)
+    {
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "[%d]: Failed to allocate memory for EDMA request"
+                 " queues\n", pAdapter->mvSataAdapter.adapterId);
+        return -1;
+    }
+    pAdapter->requestsArrayBaseAlignedAddr = pAdapter->requestsArrayBaseAddr +
+                                             pAdapter->requestQueueSize;
+    tmp = (ulong*)&pAdapter->requestsArrayBaseAlignedAddr;
+    *tmp &= ~((ulong)pAdapter->requestQueueSize - 1);
+
+    pAdapter->requestsArrayBaseDmaAlignedAddr =
+    pAdapter->requestsArrayBaseDmaAddr + pAdapter->requestQueueSize;
+    pAdapter->requestsArrayBaseDmaAlignedAddr &=
+    ~(pAdapter->requestQueueSize - 1);
+
+    if ((pAdapter->requestsArrayBaseDmaAlignedAddr - pAdapter->requestsArrayBaseDmaAddr) !=
+        (pAdapter->requestsArrayBaseAlignedAddr - pAdapter->requestsArrayBaseAddr))
+    {
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "[%d]: Error in Request Queues Alignment\n",
+                 pAdapter->mvSataAdapter.adapterId
+                );
+        pci_free_consistent(pAdapter->pcidev, requests_array_size,
+                            pAdapter->requestsArrayBaseAddr,
+                            pAdapter->requestsArrayBaseDmaAddr);
+        return -1;
+    }
+/* response queues */
+    pAdapter->responsesArrayBaseAddr =
+    pci_alloc_consistent(pAdapter->pcidev,
+                         responses_array_size,
+                         &(pAdapter->responsesArrayBaseDmaAddr));
+    if (pAdapter->responsesArrayBaseAddr == NULL)
+    {
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "[%d]: Failed to allocate memory for EDMA response"
+                 " queues\n", pAdapter->mvSataAdapter.adapterId);
+        pci_free_consistent(pAdapter->pcidev, requests_array_size,
+                            pAdapter->requestsArrayBaseAddr,
+                            pAdapter->requestsArrayBaseDmaAddr);
+        return -1;
+    }
+    pAdapter->responsesArrayBaseAlignedAddr = pAdapter->responsesArrayBaseAddr
+                                              + pAdapter->responseQueueSize;
+    tmp = (ulong*)&pAdapter->responsesArrayBaseAlignedAddr;
+    *tmp &= ~((ulong)pAdapter->responseQueueSize - 1);
+
+    pAdapter->responsesArrayBaseDmaAlignedAddr =
+    pAdapter->responsesArrayBaseDmaAddr + pAdapter->responseQueueSize;
+    pAdapter->responsesArrayBaseDmaAlignedAddr &=
+    ~(pAdapter->responseQueueSize - 1);
+
+
+    if ((pAdapter->responsesArrayBaseDmaAlignedAddr - pAdapter->responsesArrayBaseDmaAddr) !=
+        (pAdapter->responsesArrayBaseAlignedAddr - pAdapter->responsesArrayBaseAddr))
+    {
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "[%d]: Error in Response Quueues Alignment\n",
+                 pAdapter->mvSataAdapter.adapterId);
+        pci_free_consistent(pAdapter->pcidev, responses_array_size,
+                            pAdapter->responsesArrayBaseAddr,
+                            pAdapter->responsesArrayBaseDmaAddr);
+        pci_free_consistent(pAdapter->pcidev, requests_array_size,
+                            pAdapter->requestsArrayBaseAddr,
+                            pAdapter->requestsArrayBaseDmaAddr);
+        return -1;
+    }
+    return 0;
+}
+
+void mv_ial_lib_free_edma_queues(IAL_ADAPTER_T *pAdapter)
+{
+    pci_free_consistent(pAdapter->pcidev,
+                        (pAdapter->maxHosts + 1) * (pAdapter->responseQueueSize),
+                        pAdapter->responsesArrayBaseAddr,
+                        pAdapter->responsesArrayBaseDmaAddr);
+    pci_free_consistent(pAdapter->pcidev,
+                        (pAdapter->maxHosts + 1) * (pAdapter->requestQueueSize),
+                        pAdapter->requestsArrayBaseAddr,
+                        pAdapter->requestsArrayBaseDmaAddr);
+}
+
+MV_BOOLEAN IALCompletion(struct mvSataAdapter *pSataAdapter,
+                         MV_SATA_SCSI_CMD_BLOCK *pCmdBlock)
+{
+    struct scsi_cmnd   *SCpnt = (struct scsi_cmnd *)pCmdBlock->IALData;
+    struct mv_comp_info *pInfo = ( struct mv_comp_info *) &(SCpnt->SCp);
+    MV_U8       host_status;
+
+
+     switch (pCmdBlock->ScsiCommandCompletion)
+    {
+    case MV_SCSI_COMPLETION_SUCCESS:
+        host_status = DID_OK;
+        break;
+    case MV_SCSI_COMPLETION_BAD_SCSI_COMMAND:
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "Scsi command completed with BAD_SCSI_COMMAND\n");
+        host_status = DID_OK;
+        break;
+    case MV_SCSI_COMPLETION_ATA_FAILED:
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "Scsi command completed with ATA FAILED\n");
+        host_status = DID_OK;
+        break;
+    case MV_SCSI_COMPLETION_UA_RESET:
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "Scsi command completed with UA BUS"
+                 " RESET\n");
+        scsi_report_bus_reset(pInfo->SCpnt->device->host, pInfo->SCpnt->device->channel);
+        host_status = DID_OK;
+        break;
+    case MV_SCSI_COMPLETION_UA_PARAMS_CHANGED:
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "Scsi command completed with UA "
+                 "PARAMETERS CHANGED\n");
+        scsi_report_bus_reset(pInfo->SCpnt->device->host, pInfo->SCpnt->device->channel);
+        host_status = DID_OK;
+        break;
+
+    case MV_SCSI_COMPLETION_QUEUE_FULL:
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "Scsi command completed with QUEUE FULL\n");
+        /* flushed from ial common*/
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+        if (pCmdBlock->ScsiStatus == MV_SCSI_STATUS_BUSY)
+        {
+            mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "Host status: DID_RESET\n");
+            host_status = DID_RESET;
+
+            pInfo->SCpnt->flags |= IS_RESETTING;
+        }
+        else
+#endif
+        {
+            host_status = DID_OK;
+        }
+        break;
+
+    case MV_SCSI_COMPLETION_ABORTED:
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "Scsi command completed with ABORTED\n");
+        host_status = DID_ERROR;
+        break;
+
+    case MV_SCSI_COMPLETION_OVERRUN:
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "Scsi command completed with OVERRUN\n");
+        if (pInfo->SCpnt->underflow > pCmdBlock->dataTransfered)
+        {
+            host_status = DID_ERROR;
+        }
+        else
+        {
+            host_status = DID_OK;
+        }
+        break;
+    case MV_SCSI_COMPLETION_UNDERRUN:
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "Scsi command completed with UNDERRUN\n");
+        host_status = DID_ERROR;
+        break;
+
+    case MV_SCSI_COMPLETION_PARITY_ERROR:
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "Scsi command completed with PARITY ERROR\n");
+        host_status = DID_PARITY;
+        break;
+    case MV_SCSI_COMPLETION_INVALID_BUS:
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "Scsi command completed with INVALID BUS\n");
+        host_status = DID_BAD_TARGET;
+        break;
+    case MV_SCSI_COMPLETION_NO_DEVICE:
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "Scsi command completed with NO DEVICE\n");
+        host_status = DID_NO_CONNECT;
+        break;
+    case MV_SCSI_COMPLETION_INVALID_STATUS:
+    case MV_SCSI_COMPLETION_BAD_SCB:
+    case MV_SCSI_COMPLETION_NOT_READY:
+    case MV_SCSI_COMPLETION_DISCONNECT:
+    case MV_SCSI_COMPLETION_BUS_RESET:
+    case MV_SCSI_COMPLETION_BUSY:
+    default:
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR,"Bad Scsi completion status %d\n",
+                 pCmdBlock->ScsiCommandCompletion);
+        host_status = DID_ERROR;
+
+    }
+    if ((pCmdBlock->senseDataLength == 0) && (pCmdBlock->senseBufferLength))
+    {
+        pCmdBlock->pSenseBuffer[0] = 0;
+    }
+    pInfo->SCpnt->result = host_status << 16 | (pCmdBlock->ScsiStatus & 0x3f);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)
+    pInfo->SCpnt->resid = pCmdBlock->dataBufferLength - pCmdBlock->dataTransfered;
+#else
+    scsi_set_resid(pInfo->SCpnt, pCmdBlock->dataBufferLength - pCmdBlock->dataTransfered);
+#endif
+    if(pCmdBlock->dataBufferLength - pCmdBlock->dataTransfered) 
+    {
+	    mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "Scsi command completed with resid 0x%x\n",pCmdBlock->dataBufferLength - pCmdBlock->dataTransfered);
+    }
+
+    {
+        MV_U8   channelIndex = pCmdBlock->bus;
+        release_ata_mem(pInfo);
+        mv_ial_lib_add_done_queue (pSataAdapter->IALData, channelIndex, SCpnt);
+    }
+    return MV_TRUE;
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sata/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sata/Makefile
@@ -0,0 +1,17 @@
+#
+# Makefile for the Marvell egiga ethernet driver
+#
+
+ifdef CONFIG_MV_HAL_RULES_PATH
+include $(srctree)/$(subst ",,$(CONFIG_MV_HAL_RULES_PATH))
+endif
+
+IAL_OBJS        := mvLinuxIalLib.o mvLinuxIalHt.o mvLinuxIalOs.o mvIALCommon.o mvIALCommonUtils.o mvLinuxIalSmart.o
+SAL_OBJS        := mvScsiAtaLayer.o
+
+obj-$(CONFIG_SCSI_MVSATA) := mvsata.o
+#drivers-$(CONFIG_SCSI_MVSATA) := mvsata.o
+mvsata-y        := $(IAL_OBJS) $(SAL_OBJS)
+
+INCLUDE_DIRS    := -Idrivers/scsi
+EXTRA_CFLAGS += -DLINUX -D__LINUX__ $(INCLUDE_DIRS)
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sata/mvIALCommonUtils.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sata/mvIALCommonUtils.h
@@ -0,0 +1,140 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+*******************************************************************************/
+/*******************************************************************************
+* mvIALCommonUtils.h
+*
+* DESCRIPTION:
+*       H implementation for IAL's extension utility functions.
+*
+* DEPENDENCIES:
+*   mvSata.h
+*   mvStorageDev.h
+*
+*******************************************************************************/
+#ifndef __INCmvIALCommonUtilsh
+#define __INCmvIALCommonUtilsh
+
+#ifdef __cplusplus
+extern "C"  {
+#endif /* __cplusplus */
+
+/* includes */
+#include "mvSata.h"
+#include "mvStorageDev.h"
+
+/* defines */
+#define MV_IAL_COMMON_LOG_ID            2
+
+/* typedefs */
+typedef struct serialATACapabilites
+{
+    MV_BOOLEAN  SATA_GEN_I_supported:1;
+    MV_BOOLEAN  SATA_GEN_II_supported:1;
+    MV_BOOLEAN  NCQSupported:1;/*native command queuing*/
+    MV_BOOLEAN  RxHostInitiatedPMSupported:1;/* Supports receipt of host-initiated
+                                              interface power management
+                                              requests*/
+    MV_BOOLEAN  TxDeviceInitiatedPMSupported:1;/* device supports initiating
+                                                interface power management*/
+    MV_BOOLEAN  TxDeviceInitiatedPMEnabled:1;
+    MV_BOOLEAN  DMASetupAutoActiveSupported:1;/* supports DMA Setup Auto-Activate
+                                               optimization*/
+    MV_BOOLEAN  DMASetupAutoActiveEnables:1;
+    MV_BOOLEAN  NonZeroBufferOffsetSupported:1;/* supports non-zero buffer offsets
+                                                in DMA Setup FIS*/
+    MV_BOOLEAN  NonZeroBufferOffsetEnabled:1;
+}SERIAL_ATA_CAPABILITIES;
+
+typedef struct ATAIdentifyInfo
+{
+    MV_U8           version;
+    MV_U8           model[24];
+    MV_U8           firmware[4];
+    MV_U8           UdmaMode;
+    MV_U8           PIOMode;
+    MV_BOOLEAN      LBA48Supported:1;/* used for READ/WRITE commands*/
+    MV_BOOLEAN      writeCacheSupported:1;
+    MV_BOOLEAN      writeCacheEnabled:1;
+    MV_BOOLEAN      readAheadSupported:1;
+    MV_BOOLEAN      readAheadEnabled:1;
+    MV_BOOLEAN      DMAQueuedModeSupported:1;
+    MV_U8           DMAQueuedModeDepth;
+    MV_U64          ATADiskSize;
+    SERIAL_ATA_CAPABILITIES SATACapabilities;/*valid only for ATA-7 or higher*/
+    MV_U8           commandPacketLength;
+    MV_SATA_DEVICE_TYPE deviceType;
+} ATA_IDENTIFY_INFO;
+
+
+typedef struct mvSataPMDeviceInfo
+{
+    MV_U16      vendorId;
+    MV_U16      deviceId;
+    MV_U8       productRevision;
+    MV_U8       PMSpecRevision:4;
+    MV_U8       numberOfPorts:4;
+} MV_SATA_PM_DEVICE_INFO;
+
+
+MV_BOOLEAN mvParseIdentifyResult(MV_U16_PTR  iden,ATA_IDENTIFY_INFO *pIdentifyInfo);
+
+MV_SATA_DEVICE_TYPE mvGetSataDeviceType(MV_STORAGE_DEVICE_REGISTERS *mvStorageDevRegisters);
+
+MV_BOOLEAN mvInitSataDisk(MV_SATA_ADAPTER   *pSataAdapter, MV_U8 channelIndex,
+                          MV_U8 PMPort, ATA_IDENTIFY_INFO   *pIdentifyInfo,
+                          MV_U16_PTR identifyBuffer
+                         );
+
+MV_BOOLEAN mvInitSataATAPI(MV_SATA_ADAPTER   *pSataAdapter, MV_U8 channelIndex,
+                          MV_U8 PMPort, ATA_IDENTIFY_INFO   *pIdentifyInfo,
+                          MV_U16_PTR identifyBuffer
+                         );
+
+
+MV_BOOLEAN  mvGetPMDeviceInfo(MV_SATA_ADAPTER   *pSataAdapter,
+                              MV_U8 channelIndex,
+                              MV_SATA_PM_DEVICE_INFO *pPMDeviceInfo);
+
+MV_VOID mvSelectConfiguration(MV_SATA_ADAPTER        *pSataAdapter,
+                              MV_U8                  channelIndex,
+                              MV_SATA_GEN            gen,
+                              MV_SATA_DEVICE_TYPE    connectedDevice,
+                              MV_SATA_PM_DEVICE_INFO *pPMInfo,
+                              MV_BOOLEAN             AllNCQ,
+                              MV_BOOLEAN             AllTCQ,
+                              MV_BOOLEAN             disks,
+                              MV_EDMA_MODE           *pEdmaMode,
+                              MV_SATA_SWITCHING_MODE *pSwitchingMode,
+                              MV_BOOLEAN             *pUse128Entries);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* __INCmvIALCommonh */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sata/mvIALCommon.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sata/mvIALCommon.c
@@ -0,0 +1,2628 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+*******************************************************************************/
+/*******************************************************************************
+* mvIALCommon.c
+*
+* DESCRIPTION:
+*       C implementation for IAL's common functions.
+*
+* DEPENDENCIES:
+*   mvIALCommon.h
+*
+*******************************************************************************/
+
+/* includes */
+#include "mvOs.h"
+#include "mvScsiAtaLayer.h"
+#include "mvIALCommon.h"
+#include "mvIALCommonUtils.h"
+#include "mvStorageDev.h"
+
+
+/* defines */
+#undef DISABLE_PM_SCC
+/* typedefs */
+
+/*Static functions*/
+static MV_BOOLEAN mvGetDisksModes(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                  MV_SAL_ADAPTER_EXTENSION *pScsiAdapterExt,
+                                  MV_U8 channelIndex,
+                                  MV_BOOLEAN *TCQ,
+                                  MV_BOOLEAN *NCQ,
+                                  MV_U8   *numOfDrives);
+
+static void mvFlushSCSICommandQueue(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                    MV_U8 channelIndex);
+
+static void mvAddToSCSICommandQueue(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                    MV_U8 channelIndex,
+                                    MV_SATA_SCSI_CMD_BLOCK *Scb);
+
+static MV_BOOLEAN mvAdapterStateMachine(
+                                       MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                       MV_SAL_ADAPTER_EXTENSION *scsiAdapterExt);
+
+static MV_BOOLEAN mvChannelStateMachine(
+                                       MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                       MV_U8 channelIndex,
+                                       MV_SAL_ADAPTER_EXTENSION *scsiAdapterExt);
+
+static void mvSetChannelState(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                              MV_U8 channelIndex,
+                              MV_CHANNEL_STATE state);
+
+static MV_BOOLEAN clearSErrorPorts(MV_SATA_ADAPTER *pSataAdapter, MV_U8 channelIndex, 
+				   MV_U8     PMnumberOfPorts);
+/*PM related*/
+static MV_BOOLEAN mvPMCommandCompletionCB(MV_SATA_ADAPTER *pSataAdapter,
+                                          MV_U8 channelIndex,
+                                          MV_COMPLETION_TYPE comp_type,
+                                          MV_VOID_PTR commandId,
+                                          MV_U16 responseFlags,
+                                          MV_U32 timeStamp,
+                                          MV_STORAGE_DEVICE_REGISTERS *registerStruct);
+
+
+static MV_BOOLEAN mvQueuePMAccessRegisterCommand(
+                                                MV_IAL_COMMON_ADAPTER_EXTENSION* ialExt,
+                                                MV_U8 channelIndex,
+                                                MV_U8 PMPort,
+                                                MV_U8 PMReg,
+                                                MV_U32 Value,
+                                                MV_BOOLEAN isRead);
+
+static MV_BOOLEAN mvPMEnableCommStatusChangeBits(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                                 MV_U8 channelIndex,
+                                                 MV_BOOLEAN enable);
+
+static MV_BOOLEAN mvPMEnableAsyncNotify(
+                                       MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                       MV_U8 channelIndex);
+
+#if 0
+static void mvCheckPMForError(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                              MV_U8 channelIndex);
+#endif
+
+/*End PM related*/
+
+static MV_BOOLEAN mvStartChannelInit(MV_SATA_ADAPTER *pSataAdapter,
+                                     MV_U8 channelIndex,
+                                     MV_SAL_ADAPTER_EXTENSION *scsiAdapterExt,
+                                     MV_BOOLEAN *isChannelReady);
+
+static MV_BOOLEAN mvChannelSRSTFinished(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                        MV_SATA_CHANNEL *pSataChannel,
+                                        MV_U8 channelIndex,
+                                        MV_SAL_ADAPTER_EXTENSION *scsiAdapterExt,
+                                        MV_BOOLEAN* bIsChannelReady,
+                                        MV_BOOLEAN* bFatalError);
+
+static MV_BOOLEAN mvConfigChannelQueuingMode(
+                                            MV_IAL_COMMON_ADAPTER_EXTENSION* ialExt,
+                                            MV_U8 channelIndex,
+                                            MV_SAL_ADAPTER_EXTENSION *scsiAdapterExt);
+
+static MV_BOOLEAN mvConfigChannelDMA(
+                                    MV_IAL_COMMON_ADAPTER_EXTENSION* ialExt,
+                                    MV_U8 channelIndex,
+                                    MV_SAL_ADAPTER_EXTENSION *scsiAdapterExt);
+
+static void mvSetChannelTimer(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                              MV_U8 channelIndex,
+                              MV_U32 timeout);
+static void mvDecrementChannelTimer(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                    MV_U8 channelIndex);
+static MV_BOOLEAN mvIsChannelTimerExpired(
+                                         MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                         MV_U8 channelIndex);
+
+
+/*Channel state machine*/
+
+
+static MV_BOOLEAN mvChannelNotConnectedStateHandler(
+                                                   MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                                   MV_U8 channelIndex,
+                                                   MV_SAL_ADAPTER_EXTENSION *scsiAdapterExt);
+
+
+static MV_BOOLEAN mvChannelConnectedStateHandler(
+                                                MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                                MV_U8 channelIndex,
+                                                MV_SAL_ADAPTER_EXTENSION *scsiAdapterExt);
+
+MV_BOOLEAN mvChannelInSrstStateHandler(
+                                      MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                      MV_U8 channelIndex,
+                                      MV_SAL_ADAPTER_EXTENSION *scsiAdapterExt);
+
+static MV_BOOLEAN mvPMInitDevicesStateHandler(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+					      MV_U8 channelIndex,
+					      MV_SAL_ADAPTER_EXTENSION *scsiAdapterExt);
+
+static MV_BOOLEAN mvChannelReadyStateHandler(
+                                            MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                            MV_U8 channelIndex);
+
+static MV_BOOLEAN mvChannelPMHotPlugStateHandler(
+                                                MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                                MV_U8 channelIndex,
+                                                MV_SAL_ADAPTER_EXTENSION *scsiAdapterExt);
+
+
+
+static void mvDrivesInfoSaveAll(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                MV_U8 channelIndex);
+
+static void mvDrivesInfoFlushAll(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                 MV_U8 channelIndex);
+
+static void mvDrivesInfoFlushSingleDrive(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                         MV_U8 channelIndex, MV_U8 PMPort);
+
+static void mvDrivesInfoSaveSingleDrive(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                        MV_U8 channelIndex,
+                                        MV_U8 PMPort,
+                                        MV_BOOLEAN  isDriveAdded,
+                                        MV_U16_PTR identifyBuffer);
+
+static void mvSetDriveReady(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                            MV_SAL_ADAPTER_EXTENSION *scsiAdapterExt,
+                            MV_U8 channelIndex,
+                            MV_U8 PMPort,
+                            MV_BOOLEAN  isReady,
+                            MV_U16_PTR identifyBuffer);
+
+static void mvDrivesInfoGetChannelRescanParams(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                               MV_U8 channelIndex,
+                                               MV_U16 *drivesToRemove,
+                                               MV_U16 *drivesToAdd);
+
+
+
+#ifdef DISABLE_PM_SCC
+MV_BOOLEAN mvPMDisableSSC(MV_SATA_ADAPTER *pSataAdapter, MV_U8 channelIndex);
+#endif
+
+MV_BOOLEAN mvPMEnableLocking(MV_SATA_ADAPTER *pSataAdapter, MV_U8 channelIndex);
+
+
+
+/*Public functions*/
+
+/*******************************************************************************
+* mvAdapterStartInitialization - start adapter initialization
+*
+* DESCRIPTION:
+*  Starts adapter initialization after driver load.
+*  State - machine related data structure is initialized for adapter
+*  and its channels. Begin staggered spin-up.
+*  Adapter state is changed to ADAPTER_READY.
+* INPUT:
+*    pAdapter    - pointer to the adapter data structure.
+*    scsiAdapterExt  - SCSI to ATA layer adapter extension data structure
+* OUTPUT:
+*    None.
+*
+* RETURN:
+*    MV_TRUE on success
+*    MV_FALSE on error
+*
+*******************************************************************************/
+
+MV_BOOLEAN mvAdapterStartInitialization(MV_SATA_ADAPTER *pSataAdapter,
+                                        MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                        MV_SAL_ADAPTER_EXTENSION *scsiAdapterExt)
+{
+    MV_U8 channelIndex;
+    ialExt->pSataAdapter = pSataAdapter;
+    ialExt->adapterState = ADAPTER_INITIALIZING;
+    for (channelIndex = 0; channelIndex < MV_SATA_CHANNELS_NUM; channelIndex++)
+    {
+        ialExt->channelState[channelIndex] = CHANNEL_NOT_CONNECTED;
+        ialExt->IALChannelExt[channelIndex].SRSTTimerThreshold = 0;
+        ialExt->IALChannelExt[channelIndex].SRSTTimerValue = 0;
+        ialExt->IALChannelExt[channelIndex].IALChannelPendingCmdQueue = NULL;
+        ialExt->IALChannelExt[channelIndex].completionError = MV_FALSE;
+        ialExt->IALChannelExt[channelIndex].pmRegAccessInProgress = MV_FALSE;
+        ialExt->IALChannelExt[channelIndex].pmRegPollCounter = 0;
+        ialExt->IALChannelExt[channelIndex].devInSRST =
+        MV_SATA_PM_CONTROL_PORT + 1;
+        ialExt->IALChannelExt[channelIndex].PMdevsToInit = 0;
+        ialExt->IALChannelExt[channelIndex].PMnumberOfPorts = 0;
+        ialExt->IALChannelExt[channelIndex].pmAccessType = 0;
+        ialExt->IALChannelExt[channelIndex].pmReg = 0;
+        ialExt->IALChannelExt[channelIndex].pmAsyncNotifyEnabled = MV_FALSE;
+        ialExt->IALChannelExt[channelIndex].bHotPlug = MV_FALSE;
+        memset(&ialExt->IALChannelExt[channelIndex].drivesInfo, 0, sizeof(MV_DRIVES_INFO));
+    }
+    return mvAdapterStateMachine(ialExt, scsiAdapterExt);
+}
+
+
+/*******************************************************************************
+* mvRestartChannel - restart specific channel
+*
+* DESCRIPTION:
+*  The function is used in channel hot-plug to restart the channel
+*  initialization sequence. The channel stated is changed to
+*  CHANNEL_CONNECTED and any pending command in software queue are flushed
+* INPUT:
+*    pAdapter    - pointer to the adapter data structure.
+*    channelIndex  - channel number
+*    scsiAdapterExt  - SCSI to ATA layer adapter extension data structure
+*    bBusReset       - MV_TRUE if the faunction is called because of bus reset,
+*                       MV_FALSE otherwise
+* OUTPUT:
+*    None.
+*
+* RETURN:
+*    MV_TRUE on success
+*    MV_FALSE on error
+*
+*******************************************************************************/
+
+void mvRestartChannel(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                      MV_U8 channelIndex,
+                      MV_SAL_ADAPTER_EXTENSION *scsiAdapterExt,
+                      MV_BOOLEAN bBusReset)
+{
+    MV_SATA_ADAPTER *pSataAdapter = ialExt->pSataAdapter;
+    MV_BOOLEAN bBusChangeNotify = MV_FALSE;
+    ialExt->IALChannelExt[channelIndex].bHotPlug = MV_TRUE;
+    mvSetDriveReady(ialExt,
+                    scsiAdapterExt,
+                    channelIndex, 0xFF, MV_FALSE, NULL);
+    if (pSataAdapter->sataChannel[channelIndex] != NULL)
+    {
+        if (mvStorageDevGetDeviceType(pSataAdapter,channelIndex)
+            == MV_SATA_DEVICE_TYPE_PM)
+        {
+            bBusChangeNotify = MV_TRUE;
+        }
+        mvSataDisableChannelDma(pSataAdapter, channelIndex);
+        mvSataFlushDmaQueue (pSataAdapter, channelIndex,
+                             MV_FLUSH_TYPE_CALLBACK);
+    }
+    mvFlushSCSICommandQueue(ialExt, channelIndex);
+    ialExt->IALChannelExt[channelIndex].SRSTTimerThreshold = 0;
+    ialExt->IALChannelExt[channelIndex].SRSTTimerValue = 0;
+    ialExt->channelState[channelIndex] = CHANNEL_CONNECTED;
+    if (bBusReset == MV_TRUE)
+    {
+        if (bBusChangeNotify == MV_TRUE)
+        {
+            /*Notify about bus change*/
+            IALBusChangeNotify(pSataAdapter, channelIndex);
+        }
+    }
+    else
+    {
+        /*Notify about bus change*/
+        IALBusChangeNotify(pSataAdapter, channelIndex);
+    }
+}
+
+
+
+/*******************************************************************************
+* mvPMHotPlugDetected - restart specific channel
+*
+* DESCRIPTION:
+*  The function is used in PM hot-plug to wait for empty EDMA command queue
+*  and then restart the channel initialization sequence.
+*  The channel stated is changed to CHANNEL_PM_HOT_PLUG if there are any
+*  pending command in EDMA queue
+* INPUT:
+*    pAdapter    - pointer to the adapter data structure.
+*    channelIndex  - channel number
+
+* OUTPUT:
+*    None.
+*
+* RETURN:
+*    None
+*
+*******************************************************************************/
+
+void mvPMHotPlugDetected(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                         MV_U8 channelIndex,
+                         MV_SAL_ADAPTER_EXTENSION *scsiAdapterExt)
+{
+    if (ialExt->channelState[channelIndex] == CHANNEL_NOT_CONNECTED ||
+        ialExt->channelState[channelIndex] == CHANNEL_CONNECTED ||
+        ialExt->channelState[channelIndex] == CHANNEL_IN_SRST)
+    {
+        return;
+    }
+    mvSataDisableChannelDma(ialExt->pSataAdapter, channelIndex);
+    mvSataFlushDmaQueue (ialExt->pSataAdapter,
+                         channelIndex, MV_FLUSH_TYPE_CALLBACK);
+    mvSataChannelHardReset(ialExt->pSataAdapter, channelIndex);
+    mvRestartChannel(ialExt, channelIndex, scsiAdapterExt, MV_FALSE);
+}
+
+/*******************************************************************************
+* mvStopChannel - stop channel
+*
+* DESCRIPTION:
+*  The function is used when the channel is unplugged.
+*  The channel stated is changed to CHANNEL_NOT_CONNECTED
+*  until further connection.
+* INPUT:
+*    pAdapter    - pointer to the adapter data structure.
+*    channelIndex  - channel number
+* OUTPUT:
+*    None.
+*
+* RETURN:
+*    None
+*******************************************************************************/
+void mvStopChannel(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                   MV_U8 channelIndex,
+                   MV_SAL_ADAPTER_EXTENSION *scsiAdapterExt)
+{
+    MV_SATA_ADAPTER *pSataAdapter = ialExt->pSataAdapter;
+    MV_U16 drivesSnapshot =
+    ialExt->IALChannelExt[channelIndex].drivesInfo.drivesSnapshotSaved;
+    mvDrivesInfoFlushAll(ialExt, channelIndex);
+    mvSetDriveReady(ialExt, scsiAdapterExt, channelIndex, 0xFF, MV_FALSE, NULL);
+    mvSetChannelState(ialExt, channelIndex, CHANNEL_NOT_CONNECTED);
+    if (pSataAdapter->sataChannel[channelIndex] != NULL)
+    {
+        mvSataDisableChannelDma(ialExt->pSataAdapter, channelIndex);
+        mvSataFlushDmaQueue (ialExt->pSataAdapter, channelIndex,
+                             MV_FLUSH_TYPE_CALLBACK);
+    }
+    mvFlushSCSICommandQueue(ialExt, channelIndex);
+    if (pSataAdapter->sataChannel[channelIndex] != NULL)
+    {
+        mvSataRemoveChannel(pSataAdapter,channelIndex);
+        IALReleaseChannel(pSataAdapter, channelIndex);
+    }
+    pSataAdapter->sataChannel[channelIndex] = NULL;
+    /*Notify about bus change*/
+    IALBusChangeNotify(pSataAdapter, channelIndex);
+    if (drivesSnapshot != 0)
+    {
+        IALBusChangeNotifyEx(pSataAdapter, channelIndex, drivesSnapshot, 0);
+    }
+}
+
+
+/*******************************************************************************
+* mvExecuteScsiCommand - execute SCSI command
+*
+* DESCRIPTION:
+*  IAL common layer wrapper of mvSataExecuteScsiCommand function.
+*  If either the adapter state is either other than ADAPTER_READY
+*  or the channel is connected but channel state is not CHANNEL_READY,
+*  the current SCSI command is queued in channel's SCSI commands
+*  software queue until channel initialization sequence completed.
+*  If channel is found in CHANNEL ready state the SCSI command is passed to
+*  SCSI ATA translation layer.
+* INPUT:
+*    pScb    - SCSI command block structure.
+*
+* OUTPUT:
+*    None.
+*
+* RETURN:
+*    Return MV_SCSI_COMMAND_STATUS_COMPLETED if the command has been added
+*    to channel software queue. Otherwise return the result of
+*    mvSataExecuteScsiCommand function call
+*******************************************************************************/
+MV_SCSI_COMMAND_STATUS_TYPE mvExecuteScsiCommand(MV_SATA_SCSI_CMD_BLOCK *pScb,
+                                                 MV_BOOLEAN canQueue)
+{
+    MV_IAL_COMMON_ADAPTER_EXTENSION* ialExt = pScb->pIalAdapterExtension;
+    MV_U8 channelIndex = pScb->bus;
+
+#if 0
+    if ((ialExt->adapterState == ADAPTER_READY) &&
+        (ialExt->channelState[channelIndex] == CHANNEL_READY))
+    {
+        mvCheckPMForError(ialExt, channelIndex);
+    }
+#endif
+
+    if ((ialExt->adapterState == ADAPTER_READY) &&
+        ((ialExt->channelState[channelIndex] == CHANNEL_READY) ||
+         (ialExt->channelState[channelIndex] == CHANNEL_NOT_CONNECTED)))
+    {
+        return mvSataExecuteScsiCommand(pScb);
+    }
+    if (canQueue == MV_FALSE)
+    {
+        pScb->ScsiStatus = MV_SCSI_STATUS_BUSY;
+        pScb->dataTransfered = 0;
+        pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_QUEUE_FULL;
+        if (pScb->completionCallBack)
+        {
+            pScb->completionCallBack(ialExt->pSataAdapter, pScb);
+        }
+        return MV_SCSI_COMMAND_STATUS_COMPLETED;
+    }
+    else
+    {
+        mvAddToSCSICommandQueue(ialExt, channelIndex, pScb);
+        return MV_SCSI_COMMAND_STATUS_QUEUED_BY_IAL;
+    }
+}
+
+
+/*******************************************************************************
+* mvIALTimerCallback - IAL timer callback
+*
+* DESCRIPTION:
+*  The adapter/channel state machine is timer-driven.
+*  After being loaded, the IAL must call this callback every 0.5 seconds
+* INPUT:
+*    pSataAdapter    - pointer to the adapter data structure.
+*    scsiAdapterExt  - SCSI to ATA layer adapter extension data structure
+* OUTPUT:
+*    None.
+*
+* RETURN:
+*
+*******************************************************************************/
+
+MV_BOOLEAN mvIALTimerCallback(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                              MV_SAL_ADAPTER_EXTENSION *scsiAdapterExt)
+{
+
+    return mvAdapterStateMachine(ialExt,
+                                 scsiAdapterExt);
+}
+
+/*******************************************************************************
+* mvCommandCompletionErrorHandler - IAL common command completion error handler
+*
+* DESCRIPTION:
+*  Called by whether SAL completion of SMART completion function. Check whether
+*  command is failed because of PM hot plug
+*
+* INPUT:
+*    pSataAdapter    - pointer to the adapter data structure.
+*    channelIndex    - channelNumber
+* OUTPUT:
+*    None.
+*
+* RETURN:
+*
+*******************************************************************************/
+
+void mvCommandCompletionErrorHandler(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                     MV_U8 channelIndex)
+{
+    MV_SATA_ADAPTER* pSataAdapter = ialExt->pSataAdapter;
+    if (pSataAdapter->sataChannel[channelIndex] == NULL)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "[%d %d]: "
+                 "Invalid channel data structure pointer.\n",
+                 pSataAdapter->adapterId, channelIndex);
+    }
+
+    if ((ialExt->channelState[channelIndex] != CHANNEL_READY) ||
+        (mvStorageDevGetDeviceType(pSataAdapter,channelIndex) !=
+         MV_SATA_DEVICE_TYPE_PM) ||
+        (ialExt->IALChannelExt[channelIndex].pmAsyncNotifyEnabled == MV_TRUE))
+    {
+        return;
+    }
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "[%d %d]: "
+             "Set completion error to MV_TRUE.\n",
+             pSataAdapter->adapterId, channelIndex);
+    ialExt->IALChannelExt[channelIndex].completionError = MV_TRUE;
+}
+
+/*Static functions*/
+
+
+static void printAtaDeviceRegisters(
+                                   MV_STORAGE_DEVICE_REGISTERS *mvStorageDevRegisters)
+{
+
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "ATA Drive Registers:\n");
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%20s : %04x\n","Error",
+             mvStorageDevRegisters->errorRegister);
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%20s : %04x\n","SectorCount",
+             mvStorageDevRegisters->sectorCountRegister);
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%20s : %04x\n","LBA Low",
+             mvStorageDevRegisters->lbaLowRegister);
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%20s : %04x\n","LBA Mid",
+             mvStorageDevRegisters->lbaMidRegister);
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%20s : %04x\n","LBA High",
+             mvStorageDevRegisters->lbaHighRegister);
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%20s : %04x\n","Device",
+             mvStorageDevRegisters->deviceRegister);
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%20s : %04x\n","Status",
+             mvStorageDevRegisters->statusRegister);
+}
+
+
+
+static void mvDrivesInfoSaveAll(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                MV_U8 channelIndex)
+{
+    /*Save disk drives information for channel*/
+    ialExt->IALChannelExt[channelIndex].drivesInfo.drivesSnapshotSaved =
+    ialExt->IALChannelExt[channelIndex].drivesInfo.drivesSnapshotCurrent;
+    memcpy(ialExt->IALChannelExt[channelIndex].drivesInfo.driveSerialSaved,
+           ialExt->IALChannelExt[channelIndex].drivesInfo.driveSerialCurrent,
+           sizeof(ialExt->IALChannelExt[channelIndex].drivesInfo.driveSerialCurrent));
+    /*Reset current disk drives information*/
+    ialExt->IALChannelExt[channelIndex].drivesInfo.drivesSnapshotCurrent = 0;
+    memset(ialExt->IALChannelExt[channelIndex].drivesInfo.driveSerialCurrent,
+           0,
+           sizeof(ialExt->IALChannelExt[channelIndex].drivesInfo.driveSerialCurrent));
+
+}
+
+static void mvDrivesInfoFlushAll(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                 MV_U8 channelIndex)
+{
+    /*Flush drives info*/
+    memset(&ialExt->IALChannelExt[channelIndex].drivesInfo, 0,
+           sizeof(ialExt->IALChannelExt[channelIndex].drivesInfo));
+}
+
+static void mvDrivesInfoFlushSingleDrive(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                         MV_U8 channelIndex, MV_U8 PMPort)
+{
+    /*Clear bit in disk drive drive snapshot*/
+    ialExt->IALChannelExt[channelIndex].drivesInfo.drivesSnapshotCurrent &=
+    ~(1 << PMPort);
+    ialExt->IALChannelExt[channelIndex].drivesInfo.drivesSnapshotSaved &=
+    ~(1 << PMPort);
+    /*Clear disk drive serial number string*/
+    ialExt->
+    IALChannelExt[channelIndex].drivesInfo.driveSerialSaved[PMPort].serial[0] = 0;
+    ialExt->
+    IALChannelExt[channelIndex].drivesInfo.driveSerialCurrent[PMPort].serial[0] = 0;
+}
+
+
+static void mvDrivesInfoSaveSingleDrive(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                        MV_U8 channelIndex,
+                                        MV_U8 PMPort,
+                                        MV_BOOLEAN  isDriveAdded,
+                                        MV_U16_PTR identifyBuffer)
+{
+    if (MV_TRUE == isDriveAdded)
+    {
+        /*Set bit in disk drive snapshot for current disk drive*/
+        ialExt->IALChannelExt[channelIndex].drivesInfo.drivesSnapshotCurrent |=
+        1 << PMPort;
+        /*Save serial number for current disk drive*/
+        memcpy(ialExt->IALChannelExt[channelIndex].drivesInfo.driveSerialCurrent[PMPort].serial,
+               &identifyBuffer[IDEN_SERIAL_NUM_OFFSET], IDEN_SERIAL_NUM_SIZE);
+    }
+    else
+    {
+        if (0xFF == PMPort)
+        {
+            ialExt->IALChannelExt[channelIndex].drivesInfo.drivesSnapshotCurrent
+            = 0;
+            memset(ialExt->IALChannelExt[channelIndex].drivesInfo.driveSerialCurrent,
+                   0,
+                   sizeof(ialExt->IALChannelExt[channelIndex].drivesInfo.driveSerialCurrent));
+        }
+        else
+        {
+            ialExt->IALChannelExt[channelIndex].drivesInfo.drivesSnapshotCurrent
+            &= ~(1 << PMPort);
+            ialExt->IALChannelExt[channelIndex].drivesInfo.driveSerialCurrent[PMPort].serial[0] = 0;
+        }
+    }
+}
+
+static void mvSetDriveReady(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                            MV_SAL_ADAPTER_EXTENSION *scsiAdapterExt,
+                            MV_U8 channelIndex,
+                            MV_U8 PMPort,
+                            MV_BOOLEAN  isReady,
+                            MV_U16_PTR identifyBuffer)
+{
+    mvDrivesInfoSaveSingleDrive(ialExt,
+                                channelIndex,
+                                PMPort,
+                                isReady,
+                                identifyBuffer);
+    mvSataScsiSetDriveReady(scsiAdapterExt,
+                            channelIndex, PMPort, isReady);
+}
+
+
+static void mvDrivesInfoGetChannelRescanParams(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                               MV_U8 channelIndex,
+                                               MV_U16 *drivesToRemove,
+                                               MV_U16 *drivesToAdd)
+{
+    MV_U8 PMPort;
+
+    *drivesToRemove = 0;
+    *drivesToAdd = 0;
+
+    for (PMPort = 0; PMPort < MV_SATA_PM_MAX_PORTS; PMPort++)
+    {
+        if (ialExt->IALChannelExt[channelIndex].drivesInfo.drivesSnapshotCurrent
+            & (1 << PMPort))
+        {
+            if (ialExt->IALChannelExt[channelIndex].drivesInfo.drivesSnapshotSaved
+                & (1 << PMPort))
+            {
+                if (memcmp(&ialExt->IALChannelExt[channelIndex].drivesInfo.driveSerialCurrent[PMPort].serial,
+                           &ialExt->IALChannelExt[channelIndex].drivesInfo.driveSerialSaved[PMPort].serial,
+                           IDEN_SERIAL_NUM_SIZE))
+                {
+                    /*Disk drive connected to port is replaced*/
+                    *drivesToAdd |= (1 << PMPort);
+                    *drivesToRemove |= (1 << PMPort);
+                }
+            }
+            else
+            {
+                /*New drive connected to port*/
+                *drivesToAdd |= (1 << PMPort);
+            }
+        }
+        else
+        {
+            /*Drive removed from Port*/
+            if (ialExt->IALChannelExt[channelIndex].drivesInfo.drivesSnapshotSaved
+                & (1 << PMPort))
+            {
+                *drivesToRemove |= (1 << PMPort);
+            }
+        }
+    }
+}
+
+
+
+/*SCSI command queue functions*/
+static void mvAddToSCSICommandQueue(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                    MV_U8 channelIndex,
+                                    MV_SATA_SCSI_CMD_BLOCK *pScb)
+{
+
+    MV_SATA_SCSI_CMD_BLOCK *cmdBlock = (MV_SATA_SCSI_CMD_BLOCK *)
+                                       ialExt->IALChannelExt[channelIndex].IALChannelPendingCmdQueue;
+    pScb->pNext = NULL;
+    if (cmdBlock)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "[%d %d] Adding next command to SW queue\n",
+                 ialExt->pSataAdapter->adapterId, channelIndex);
+        while (cmdBlock->pNext)
+        {
+            cmdBlock = cmdBlock->pNext;
+        }
+        cmdBlock->pNext = pScb;
+    }
+    else
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "[%d %d] Adding first command to SW queue\n",
+                 ialExt->pSataAdapter->adapterId, channelIndex);
+        ialExt->IALChannelExt[channelIndex].IALChannelPendingCmdQueue =
+        (MV_VOID_PTR)pScb;
+    }
+}
+
+MV_BOOLEAN mvRemoveFromSCSICommandQueue(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                        MV_U8 channelIndex,
+                                        MV_SATA_SCSI_CMD_BLOCK *pScb)
+{
+
+    MV_SATA_SCSI_CMD_BLOCK *cmdBlock = (MV_SATA_SCSI_CMD_BLOCK *)
+                                       ialExt->IALChannelExt[channelIndex].IALChannelPendingCmdQueue;
+    pScb->pNext = NULL;
+    if (cmdBlock)
+    {
+        if (cmdBlock == pScb)
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "[%d %d] Removing command"
+                     " %p from head of SW queue\n",
+                     ialExt->pSataAdapter->adapterId,channelIndex, pScb);
+            ialExt->IALChannelExt[channelIndex].IALChannelPendingCmdQueue =
+            (MV_VOID_PTR) cmdBlock->pNext;
+            return MV_TRUE;
+        }
+        else
+        {
+            while (cmdBlock->pNext)
+            {
+                if (cmdBlock->pNext == pScb)
+                {
+                    break;
+                }
+                cmdBlock = cmdBlock->pNext;
+            }
+            if (cmdBlock->pNext == NULL)
+            {
+                mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "[%d %d] Removing"
+                         " command %p from SW queue failed. command not found\n",
+                         ialExt->pSataAdapter->adapterId,channelIndex, pScb);
+                return MV_FALSE;
+            }
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "[%d %d] Removing command"
+                     " %p from SW queue\n", ialExt->pSataAdapter->adapterId,
+                     channelIndex, pScb);
+            cmdBlock->pNext = cmdBlock->pNext->pNext;
+            return MV_TRUE;
+        }
+    }
+    else
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "[%d %d] Removing"
+                 " command %p from SW queue failed. queue empty\n",
+                 ialExt->pSataAdapter->adapterId,channelIndex, pScb);
+        return MV_FALSE;
+    }
+    return MV_FALSE;
+}
+
+static void mvFlushSCSICommandQueue(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                    MV_U8 channelIndex)
+{
+    /*Abort all pending commands in SW queue*/
+    MV_SATA_SCSI_CMD_BLOCK *cmdBlock = (MV_SATA_SCSI_CMD_BLOCK *)
+                                       ialExt->IALChannelExt[channelIndex].IALChannelPendingCmdQueue;
+
+    while (cmdBlock)
+    {
+        MV_SATA_SCSI_CMD_BLOCK *nextBlock = cmdBlock->pNext;
+        if (cmdBlock->completionCallBack)
+        {
+            cmdBlock->ScsiStatus = MV_SCSI_STATUS_BUSY;
+            cmdBlock->dataTransfered = 0;
+            cmdBlock->ScsiCommandCompletion = MV_SCSI_COMPLETION_QUEUE_FULL;
+            cmdBlock->completionCallBack(ialExt->pSataAdapter, cmdBlock);
+        }
+        cmdBlock = nextBlock;
+    }
+    ialExt->IALChannelExt[channelIndex].IALChannelPendingCmdQueue = NULL;
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "[%d %d]: Flush command queue is done\n",
+             ialExt->pSataAdapter->adapterId, channelIndex);
+}
+
+
+/*Port Multilier related functions*/
+static MV_BOOLEAN mvPMCommandCompletionCB(MV_SATA_ADAPTER *pSataAdapter,
+                                          MV_U8 channelIndex,
+                                          MV_COMPLETION_TYPE comp_type,
+                                          MV_VOID_PTR commandId,
+                                          MV_U16 responseFlags,
+                                          MV_U32 timeStamp,
+                                          MV_STORAGE_DEVICE_REGISTERS *registerStruct)
+{
+    MV_U32 value;
+    MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt =
+    (MV_IAL_COMMON_ADAPTER_EXTENSION *)commandId;
+    ialExt->IALChannelExt[channelIndex].pmRegAccessInProgress = MV_FALSE;
+    switch (comp_type)
+    {
+    case MV_COMPLETION_TYPE_NORMAL:
+        if (ialExt->IALChannelExt[channelIndex].pmAccessType
+            == MV_ATA_COMMAND_PM_READ_REG)
+        {
+            value = registerStruct->sectorCountRegister;
+            value |= (registerStruct->lbaLowRegister << 8);
+            value |= (registerStruct->lbaMidRegister << 16);
+            value |= (registerStruct->lbaMidRegister << 24);
+            if (ialExt->IALChannelExt[channelIndex].pmReg
+                == MV_SATA_GSCR_ERROR_REG_NUM)
+            {
+                if (value != 0)
+                {
+                    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "[%d %d]: PM GSCR[32] = 0x%X\n",
+                             pSataAdapter->adapterId, channelIndex, value);
+                    ialExt->IALChannelExt[channelIndex].PMdevsToInit =
+                    (MV_U16)(value & 0x7FFF);
+                    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "[%d %d]: "
+                             "PM Hot plug detected "
+                             "Bitmask = 0x%X\n",
+                             pSataAdapter->adapterId, channelIndex,
+                             ialExt->IALChannelExt[channelIndex].PMdevsToInit);
+                    mvSetChannelState(ialExt, channelIndex,
+                                      CHANNEL_PM_HOT_PLUG);
+                }
+            }
+        }
+        break;
+    case MV_COMPLETION_TYPE_ABORT:
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "[%d %d]: read PM register aborted!\n",
+                 pSataAdapter->adapterId, channelIndex);
+
+        break;
+    case MV_COMPLETION_TYPE_ERROR:
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "[%d %d]: read PM register error!\n",
+                 pSataAdapter->adapterId, channelIndex);
+        break;
+    default:
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "[%d %d]: Unknown completion type (%d)\n",
+                 pSataAdapter->adapterId, channelIndex, comp_type);
+        return MV_FALSE;
+    }
+    return MV_TRUE;
+}
+
+
+static MV_BOOLEAN mvQueuePMAccessRegisterCommand(
+                                                MV_IAL_COMMON_ADAPTER_EXTENSION* ialExt,
+                                                MV_U8 channelIndex,
+                                                MV_U8 PMPort,
+                                                MV_U8 PMReg,
+                                                MV_U32 Value,
+                                                MV_BOOLEAN isRead)
+{
+    MV_QUEUE_COMMAND_RESULT result;
+    MV_SATA_ADAPTER *pSataAdapter = ialExt->pSataAdapter;
+#ifdef MV_SATA_STORE_COMMANDS_INFO_ON_IAL_STACK
+    MV_QUEUE_COMMAND_INFO *pCommandInfo = &ialExt->IALChannelExt[channelIndex].commandInfo;
+#else
+    MV_QUEUE_COMMAND_INFO commandInfo, *pCommandInfo;
+    pCommandInfo = &commandInfo;
+#endif
+    memset(pCommandInfo, 0, sizeof(MV_QUEUE_COMMAND_INFO));
+    pCommandInfo->type = MV_QUEUED_COMMAND_TYPE_NONE_UDMA;
+    pCommandInfo->commandParams.NoneUdmaCommand.protocolType =
+    MV_NON_UDMA_PROTOCOL_NON_DATA;
+    pCommandInfo->commandParams.NoneUdmaCommand.isEXT = MV_TRUE;
+    pCommandInfo->commandParams.NoneUdmaCommand.bufPtr = NULL;
+    pCommandInfo->PMPort = MV_SATA_PM_CONTROL_PORT;
+    pCommandInfo->commandParams.NoneUdmaCommand.count = 0;
+    pCommandInfo->commandParams.NoneUdmaCommand.features = PMReg;
+    pCommandInfo->commandParams.NoneUdmaCommand.device = (MV_U8)PMPort;
+    pCommandInfo->commandParams.NoneUdmaCommand.callBack =
+    mvPMCommandCompletionCB;
+
+    ialExt->IALChannelExt[channelIndex].pmReg = PMReg;
+
+    if (isRead == MV_TRUE)
+    {
+        ialExt->IALChannelExt[channelIndex].pmAccessType =
+        MV_ATA_COMMAND_PM_READ_REG;
+        pCommandInfo->commandParams.NoneUdmaCommand.command =
+        MV_ATA_COMMAND_PM_READ_REG;
+        pCommandInfo->commandParams.NoneUdmaCommand.commandId =
+        (MV_VOID_PTR)ialExt;
+        pCommandInfo->commandParams.NoneUdmaCommand.sectorCount = 0;
+        pCommandInfo->commandParams.NoneUdmaCommand.lbaLow = 0;
+        pCommandInfo->commandParams.NoneUdmaCommand.lbaMid = 0;
+        pCommandInfo->commandParams.NoneUdmaCommand.lbaHigh = 0;
+    }
+    else
+    {
+        ialExt->IALChannelExt[channelIndex].pmAccessType =
+        MV_ATA_COMMAND_PM_WRITE_REG;
+        pCommandInfo->commandParams.NoneUdmaCommand.command =
+        MV_ATA_COMMAND_PM_WRITE_REG;
+        pCommandInfo->commandParams.NoneUdmaCommand.commandId =
+        (MV_VOID_PTR)ialExt;
+        pCommandInfo->commandParams.NoneUdmaCommand.sectorCount =
+        (MV_U16)((Value) & 0xff),
+        pCommandInfo->commandParams.NoneUdmaCommand.lbaLow =
+        (MV_U16)(((Value) & 0xff00) >> 8);
+        pCommandInfo->commandParams.NoneUdmaCommand.lbaMid =
+        (MV_U16)(((Value) & 0xff0000) >> 16);
+        pCommandInfo->commandParams.NoneUdmaCommand.lbaHigh =
+        (MV_U16)(((Value) & 0xff000000) >> 24);
+    }
+    ialExt->IALChannelExt[channelIndex].pmRegAccessInProgress = MV_TRUE;
+    result = mvSataQueueCommand(pSataAdapter,
+                                channelIndex,
+                                pCommandInfo);
+    if (result != MV_QUEUE_COMMAND_RESULT_OK)
+    {
+        switch (result)
+        {
+        case MV_QUEUE_COMMAND_RESULT_BAD_LBA_ADDRESS:
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, ": Queue PM command failed. Bad LBA "
+                     "\n");
+            break;
+        case MV_QUEUE_COMMAND_RESULT_QUEUED_MODE_DISABLED:
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, ": Queue PM command failed. EDMA"
+                     " disabled adapter %d channel %d\n",
+                     pSataAdapter->adapterId, channelIndex);
+            break;
+        case MV_QUEUE_COMMAND_RESULT_FULL:
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, ": Queue PM command failed. Queue is"
+                     " Full adapter %d channel %d\n",
+                     pSataAdapter->adapterId, channelIndex);
+
+            break;
+        case MV_QUEUE_COMMAND_RESULT_BAD_PARAMS:
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, ": Queue PM command failed. (Bad "
+                     "Params), pMvSataAdapter: %p, pSataChannel: %p.\n",
+                     pSataAdapter, pSataAdapter->sataChannel[channelIndex]);
+            break;
+        default:
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, ": Queue PM command bad result value (%d) "
+                     "from queue command\n",
+                     result);
+        }
+        ialExt->IALChannelExt[channelIndex].pmRegAccessInProgress = MV_FALSE;
+        return MV_FALSE;
+    }
+    return MV_TRUE;
+}
+
+
+static MV_BOOLEAN mvPMEnableCommStatusChangeBits(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                                 MV_U8 channelIndex,
+                                                 MV_BOOLEAN enable)
+{
+    MV_U32 regVal;
+    MV_SATA_ADAPTER *pSataAdapter = ialExt->pSataAdapter;
+
+    if (enable == MV_TRUE)
+    {
+        regVal = MV_BIT16;
+    }
+    else
+    {
+        regVal = 0;
+    }
+
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "[%d %d]: Set PM "
+             "GSCR[33] register to 0x%X\n",
+             pSataAdapter->adapterId, channelIndex, regVal);
+    /*Set N bit reflection in PM GSCR*/
+    if (mvPMDevWriteReg(pSataAdapter, channelIndex,
+                        MV_SATA_PM_CONTROL_PORT,
+                        MV_SATA_GSCR_ERROR_ENABLE_REG_NUM,
+                        regVal, NULL) == MV_FALSE)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "[%d %d]: Failed to set "
+                 "PortMultiplier Features Enable register\n",
+                 pSataAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+    }
+    return MV_TRUE;
+}
+
+static MV_BOOLEAN mvPMEnableAsyncNotify(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                        MV_U8 channelIndex)
+{
+    MV_U32 regVal1, regVal2;
+    MV_SATA_ADAPTER *pSataAdapter = ialExt->pSataAdapter;
+    /*Features register*/
+    if (mvPMDevReadReg(pSataAdapter, channelIndex, MV_SATA_PM_CONTROL_PORT,
+                       MV_SATA_GSCR_FEATURES_REG_NUM,
+                       &regVal1, NULL) == MV_FALSE)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "[%d %d]: Failed to get Port Multiplier Features"
+                 " supported register\n",
+                 pSataAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+    }
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "[%d %d]: Port Multiplier features supported: 0x%X\n",
+             pSataAdapter->adapterId, channelIndex, regVal1);
+
+    /*PM asynchronous notification supported*/
+    if (mvPMDevReadReg(pSataAdapter, channelIndex, MV_SATA_PM_CONTROL_PORT,
+                       MV_SATA_GSCR_FEATURES_ENABLE_REG_NUM,
+                       &regVal2 ,NULL) == MV_FALSE)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "[%d %d]: Failed to get Port Multiplier Features"
+                 " register\n",
+                 pSataAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+
+    }
+
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "[%d %d]: Port Multiplier features enabled "
+             "register: 0x%X\n",
+             pSataAdapter->adapterId, channelIndex, regVal2);
+    if (regVal1 & MV_BIT3)
+    {
+        regVal2 |= MV_BIT3;
+        if (mvPMDevWriteReg(pSataAdapter, channelIndex, MV_SATA_PM_CONTROL_PORT,
+                            MV_SATA_GSCR_FEATURES_ENABLE_REG_NUM,
+                            regVal2 ,NULL) == MV_FALSE)
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "[%d %d]: Failed to set "
+                     "PortMultiplier Features Enable register\n",
+                     pSataAdapter->adapterId, channelIndex);
+            return MV_FALSE;
+
+        }
+        ialExt->IALChannelExt[channelIndex].pmAsyncNotifyEnabled = MV_TRUE;
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "[%d %d]: PM asynchronous notification is "
+                 "enabled.\n", pSataAdapter->adapterId, channelIndex);
+    }
+    else
+    {
+        regVal2 &= ~MV_BIT3;
+        if (mvPMDevWriteReg(pSataAdapter, channelIndex, MV_SATA_PM_CONTROL_PORT,
+                            MV_SATA_GSCR_FEATURES_ENABLE_REG_NUM,
+                            regVal2 ,NULL) == MV_FALSE)
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "[%d %d]: Failed to set "
+                     "PortMultiplier Features Enable register\n",
+                     pSataAdapter->adapterId, channelIndex);
+            return MV_FALSE;
+
+        }
+        ialExt->IALChannelExt[channelIndex].pmAsyncNotifyEnabled = MV_FALSE;
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "[%d %d]: PM asynchronous notification is "
+                 "disabled.\n", pSataAdapter->adapterId, channelIndex);
+    }
+
+    return MV_TRUE;
+}
+
+static MV_BOOLEAN mvPMDisableAsyncNotify(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                        MV_U8 channelIndex)
+{
+    MV_U32 regVal2;
+    MV_SATA_ADAPTER *pSataAdapter = ialExt->pSataAdapter;
+
+
+    /*PM asynchronous notification supported*/
+    if (mvPMDevReadReg(pSataAdapter, channelIndex, MV_SATA_PM_CONTROL_PORT,
+                       MV_SATA_GSCR_FEATURES_ENABLE_REG_NUM,
+                       &regVal2 ,NULL) == MV_FALSE)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "[%d %d]: Failed to get Port Multiplier Features"
+                 " register\n",
+                 pSataAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+
+    }
+
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "[%d %d]: Port Multiplier features enabled "
+             "register: 0x%X\n",
+             pSataAdapter->adapterId, channelIndex, regVal2);
+
+        regVal2 &= ~MV_BIT3;
+        if (mvPMDevWriteReg(pSataAdapter, channelIndex, MV_SATA_PM_CONTROL_PORT,
+                            MV_SATA_GSCR_FEATURES_ENABLE_REG_NUM,
+                            regVal2 ,NULL) == MV_FALSE)
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "[%d %d]: Failed to set "
+                     "PortMultiplier Features Enable register\n",
+                     pSataAdapter->adapterId, channelIndex);
+            return MV_FALSE;
+
+        }
+        ialExt->IALChannelExt[channelIndex].pmAsyncNotifyEnabled = MV_FALSE;
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "[%d %d]: PM asynchronous notification is "
+                 "disabled.\n", pSataAdapter->adapterId, channelIndex);
+
+    return MV_TRUE;
+}
+
+
+
+static MV_BOOLEAN mvConfigurePMDevice(
+                                     MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                     MV_U8 channelIndex)
+{
+    MV_SATA_PM_DEVICE_INFO PMInfo;
+    ialExt->IALChannelExt[channelIndex].pmAsyncNotifyEnabled = MV_FALSE;
+
+    if (mvGetPMDeviceInfo(ialExt->pSataAdapter, channelIndex, &PMInfo)
+        == MV_FALSE)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "[%d %d]: Failed to get PortMultiplier Info\n",
+                 ialExt->pSataAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+    }
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "[%d %d]: PM of %d ports found\n",
+             ialExt->pSataAdapter->adapterId, channelIndex,
+             PMInfo.numberOfPorts);
+    ialExt->IALChannelExt[channelIndex].PMnumberOfPorts = PMInfo.numberOfPorts;
+#ifdef DISABLE_PM_SCC
+    if (PMInfo.vendorId == 0x11AB)
+    {
+
+        if (mvPMDisableSSC(ialExt->pSataAdapter, channelIndex) == MV_FALSE)
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "[%d %d]: cannot disable SSC for PM.\n"
+                     "unknown vendor.\n",
+                     ialExt->pSataAdapter->adapterId, channelIndex);
+        }
+    }
+    else
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "[%d %d]: cannot disable SSC for PM - "
+                 "unknown vendor.\n",
+                 ialExt->pSataAdapter->adapterId, channelIndex);
+    }
+#endif
+#if 1
+    if (clearSErrorPorts(ialExt->pSataAdapter, channelIndex,
+			 ialExt->IALChannelExt[channelIndex].PMnumberOfPorts) != 
+	MV_TRUE)
+    {
+	    return MV_FALSE;
+    }
+#endif
+    if (mvPMEnableCommStatusChangeBits(ialExt,
+                                       channelIndex,
+                                       MV_FALSE) != MV_TRUE)
+    {
+        return MV_FALSE;
+    }
+    if (mvPMDisableAsyncNotify(ialExt, channelIndex) == MV_FALSE)
+    {
+        return MV_FALSE;
+    }
+#if 0
+
+    if (mvPMDevEnableStaggeredSpinUpAll(ialExt->pSataAdapter,
+                                        channelIndex,
+                                        ialExt->IALChannelExt[channelIndex].PMnumberOfPorts,
+                                        &ialExt->IALChannelExt[channelIndex].PMdevsToInit) == MV_FALSE)
+    {
+	 mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "[%d %d]: PM Enable Staggered Spin-\
+Up Failed\n",
+		  ialExt->pSataAdapter->adapterId, channelIndex);
+	 ialExt->IALChannelExt[channelIndex].PMdevsToInit = 0;
+	 return MV_FALSE;
+    }
+#endif
+    return MV_TRUE;
+}
+
+static MV_BOOLEAN clearSErrorPorts(MV_SATA_ADAPTER *pSataAdapter, MV_U8 channelIndex, 
+				   MV_U8     PMnumberOfPorts)
+{
+	MV_U8 PMPort;
+	
+	for (PMPort = 0; PMPort < PMnumberOfPorts; PMPort++)
+	{
+		if (mvPMDevWriteReg(pSataAdapter, channelIndex, PMPort,
+				    MV_SATA_PSCR_SERROR_REG_NUM, 0xFFFFFFFF, NULL) ==
+		    MV_FALSE)
+		{
+			if (mvStorageDevATASoftResetDevice(pSataAdapter, channelIndex,
+							   MV_SATA_PM_CONTROL_PORT, NULL) == MV_FALSE)
+			{
+				mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "[%d %d]: "
+					 "failed to Soft Reset PM control port\n",
+					 pSataAdapter->adapterId, channelIndex);
+				return MV_FALSE;
+			}
+		}
+	}
+	return MV_TRUE;
+}
+
+MV_BOOLEAN mvPMEnableLocking(MV_SATA_ADAPTER *pSataAdapter, MV_U8 channelIndex)
+{
+    MV_STORAGE_DEVICE_REGISTERS regs;
+    if (mvPMDevWriteReg(pSataAdapter, channelIndex,
+                        MV_SATA_PM_CONTROL_PORT,
+                        0x89,
+                        0x8000003F,
+                        &regs) == MV_TRUE)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG,"[%d %d]: NCQ lock is enabled for PM.\n",
+                 pSataAdapter->adapterId, channelIndex);
+        return MV_TRUE;
+    }
+    else
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR,"[%d %d]: cannot enable NCQ lock for PM.\n",
+                 pSataAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+    }
+    return MV_TRUE;
+}
+
+#ifdef DISABLE_PM_SCC
+MV_BOOLEAN mvPMDisableSSC(MV_SATA_ADAPTER *pSataAdapter, MV_U8 channelIndex)
+{
+    MV_STORAGE_DEVICE_REGISTERS regs;
+    MV_U32 regVal = 0;
+
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG,"[%d %d]: "
+             "Disable SSC for all PM ports.\n",
+             pSataAdapter->adapterId, channelIndex);
+
+    if (mvPMDevReadReg(pSataAdapter,channelIndex, MV_SATA_PM_CONTROL_PORT,
+                       MV_SATA_GSCR_FEATURES_ENABLE_REG_NUM,
+                       &regVal,
+                       &regs) != MV_TRUE)
+    {
+        return MV_FALSE;
+    }
+
+    /*Host SSC disable*/
+    regVal &= ~MV_BIT2;
+    if (mvPMDevWriteReg(pSataAdapter,channelIndex, MV_SATA_PM_CONTROL_PORT,
+                        MV_SATA_GSCR_FEATURES_ENABLE_REG_NUM,
+                        regVal,
+                        &regs) != MV_TRUE)
+    {
+        return MV_FALSE;
+    }
+
+    /* disable ssc for port 0*/
+    if (mvPMDevWriteReg(pSataAdapter, channelIndex, MV_SATA_PM_CONTROL_PORT,
+                        0x8C,
+                        0,
+                        &regs) != MV_TRUE)
+    {
+        return MV_FALSE;
+    }
+    if (mvPMDevWriteReg(pSataAdapter, channelIndex, MV_SATA_PM_CONTROL_PORT,
+                        0x92,
+                        0xb02a402a,
+                        &regs) != MV_TRUE)
+    {
+        return MV_FALSE;
+    }
+    /* disable ssc for port 1*/
+    if (mvPMDevWriteReg(pSataAdapter, channelIndex, MV_SATA_PM_CONTROL_PORT,
+                        0x8C,
+                        1,
+                        &regs) != MV_TRUE)
+    {
+        return MV_FALSE;
+    }
+    if (mvPMDevWriteReg(pSataAdapter, channelIndex, MV_SATA_PM_CONTROL_PORT,
+                        0x92,
+                        0xb02a402a,
+                        &regs) != MV_TRUE)
+    {
+        return MV_FALSE;
+    }
+    /* disable ssc for port 2*/
+    if (mvPMDevWriteReg(pSataAdapter, channelIndex, MV_SATA_PM_CONTROL_PORT,
+                        0x8C,
+                        2,
+                        &regs) != MV_TRUE)
+    {
+        return MV_FALSE;
+    }
+    if (mvPMDevWriteReg(pSataAdapter, channelIndex, MV_SATA_PM_CONTROL_PORT,
+                        0x92,
+                        0xb02a402a,
+                        &regs) != MV_TRUE)
+    {
+        return MV_FALSE;
+    }
+
+    /* disable ssc for port 3*/
+    if (mvPMDevWriteReg(pSataAdapter, channelIndex, MV_SATA_PM_CONTROL_PORT,
+                        0x8C,
+                        3,
+                        &regs) != MV_TRUE)
+    {
+        return MV_FALSE;
+    }
+    if (mvPMDevWriteReg(pSataAdapter, channelIndex, MV_SATA_PM_CONTROL_PORT,
+                        0x92,
+                        0xb02a402a,
+                        &regs) != MV_TRUE)
+    {
+        return MV_FALSE;
+    }
+
+    /* disable ssc for port 15*/
+    if (mvPMDevWriteReg(pSataAdapter, channelIndex, MV_SATA_PM_CONTROL_PORT,
+                        0x8C,
+                        MV_SATA_PM_CONTROL_PORT,
+                        &regs) != MV_TRUE)
+    {
+        return MV_FALSE;
+    }
+    if (mvPMDevWriteReg(pSataAdapter, channelIndex, MV_SATA_PM_CONTROL_PORT,
+                        0x92,
+                        0xb02a402a,
+                        &regs) != MV_TRUE)
+    {
+        return MV_FALSE;
+    }
+    return MV_TRUE;
+}
+#endif
+
+static MV_BOOLEAN mvConfigChannelQueuingMode(MV_IAL_COMMON_ADAPTER_EXTENSION* ialExt,
+                                             MV_U8 channelIndex,
+                                             MV_SAL_ADAPTER_EXTENSION *scsiAdapterExt)
+{
+    MV_SATA_ADAPTER         *pSataAdapter = ialExt->pSataAdapter;
+    MV_EDMA_MODE            EDMAMode = MV_EDMA_MODE_NOT_QUEUED;
+    MV_SATA_SWITCHING_MODE  switchingMode;
+    MV_BOOLEAN              isTCQSupported = MV_FALSE;
+    MV_BOOLEAN              isNCQSupported = MV_FALSE;
+    MV_U8                   numOfDrives = 0;
+    MV_SATA_PM_DEVICE_INFO  PMInfo;
+    MV_SATA_DEVICE_TYPE     connectedDevice;
+    MV_BOOLEAN              use128Entries = MV_FALSE;
+
+
+    if (mvGetDisksModes(ialExt,
+                        scsiAdapterExt,
+                        channelIndex,
+                        &isTCQSupported,
+                        &isNCQSupported,
+                        &numOfDrives) == MV_FALSE)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_FATAL_ERROR,
+                 "[%d %d]:mvConfigChannelQueuingMode: failed to get disks modes.\n"
+                 ,pSataAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+    }
+    else
+    {
+
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG,"[%d %d]: Supported queuing mode: TCQ = %s, "
+                 "NCQ = %s. number of disks %d\n",
+                 pSataAdapter->adapterId, channelIndex,
+                 (isTCQSupported == MV_TRUE) ? "Yes" : "No",
+                 (isNCQSupported == MV_TRUE) ? "Yes" : "No",
+                 numOfDrives);
+    }
+#ifdef __LINUX__
+    {
+	 extern unsigned int use_ncq;
+	 if(use_ncq == 0)
+	 {
+	      mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG,"[%d %d]: NCQ mode not allowed\n");
+	      isNCQSupported = MV_FALSE;
+	 }
+    }
+#endif
+
+    connectedDevice = mvStorageDevGetDeviceType(pSataAdapter,channelIndex);
+    if (connectedDevice == MV_SATA_DEVICE_TYPE_UNKNOWN)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_FATAL_ERROR,
+                 "[%d %d] mvConfigChannelQueuingMode: failed to get device type.\n"
+                 ,pSataAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+    }
+    if (connectedDevice == MV_SATA_DEVICE_TYPE_PM)
+    {
+        if (mvGetPMDeviceInfo(ialExt->pSataAdapter, channelIndex, &PMInfo)
+            == MV_FALSE)
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_FATAL_ERROR,
+                     "[%d %d] mvConfigChannelQueuingMode: Failed to get "
+                     "PortMultiplier Info\n",
+                     ialExt->pSataAdapter->adapterId, channelIndex);
+            return MV_FALSE;
+        }
+    }
+    mvSelectConfiguration(pSataAdapter, channelIndex,
+                          pSataAdapter->sataAdapterGeneration,
+                          connectedDevice,&PMInfo,
+                          isNCQSupported,
+                          isTCQSupported,
+                          numOfDrives,
+                          &EDMAMode,
+                          &switchingMode,
+                          &use128Entries);
+
+#ifndef MV_SATA_SUPPORT_GEN2E_128_QUEUE_LEN
+    use128Entries = MV_FALSE;
+#endif
+    switch (switchingMode)
+    {
+    case MV_SATA_SWITCHING_MODE_FBS:
+        {
+            if (mvSataSetFBSMode(pSataAdapter, channelIndex, MV_TRUE,
+                                 use128Entries) == MV_FALSE)
+            {
+                mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_FATAL_ERROR,
+                         "[%d %d] mvConfigChannelQueuingMode: failed to enable FBS.\n"
+                         ,pSataAdapter->adapterId, channelIndex);
+                return MV_FALSE;
+            }
+        }
+        break;
+    case MV_SATA_SWITCHING_MODE_QCBS:
+        if (mvPMEnableLocking(pSataAdapter,channelIndex) == MV_FALSE)
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_FATAL_ERROR,
+                     "[%d %d] mvConfigChannelQueuingMode: failed to enable QCBS.\n"
+                     ,pSataAdapter->adapterId, channelIndex);
+            return MV_FALSE;
+        }
+        break;
+    default:
+        break;
+    }         
+    IALConfigQueuingMode(pSataAdapter,
+                         channelIndex,
+                         EDMAMode,
+                         switchingMode,
+                         use128Entries);
+    return MV_TRUE;
+}
+
+
+
+/*Channel related functions*/
+
+static void mvSetChannelState(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                              MV_U8 channelIndex,
+                              MV_CHANNEL_STATE state)
+{
+    if (ialExt->channelState[channelIndex] != state)
+    {
+        if ((state == CHANNEL_READY) || (state == CHANNEL_NOT_CONNECTED))
+        {
+            ialExt->IALChannelExt[channelIndex].SRSTTimerThreshold = 0;
+            ialExt->IALChannelExt[channelIndex].SRSTTimerValue = 0;
+        }
+        if (state == CHANNEL_READY)
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG,"[%d %d]: CHANNEL_READY\n",
+                     ialExt->pSataAdapter->adapterId,
+                     channelIndex);
+            ialExt->IALChannelExt[channelIndex].pmRegAccessInProgress
+            = MV_FALSE;
+            ialExt->IALChannelExt[channelIndex].completionError = MV_FALSE;
+            ialExt->channelState[channelIndex] = state;
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG,"[%d %d] flush pending queue\n",
+                     ialExt->pSataAdapter->adapterId, channelIndex);
+            /*Abort all pending commands in SW queue*/
+            mvFlushSCSICommandQueue(ialExt, channelIndex);
+            if (MV_TRUE == ialExt->IALChannelExt[channelIndex].bHotPlug)
+            {
+                MV_U16 drivesToRemove;
+                MV_U16 drivesToAdd;
+                ialExt->IALChannelExt[channelIndex].bHotPlug = MV_FALSE;
+                mvDrivesInfoGetChannelRescanParams(ialExt,
+                                                   channelIndex,
+                                                   &drivesToRemove,
+                                                   &drivesToAdd);
+                if (drivesToRemove != 0 || drivesToAdd != 0)
+                {
+
+                    IALBusChangeNotifyEx(ialExt->pSataAdapter,
+                                         channelIndex,
+                                         drivesToRemove,
+                                         drivesToAdd);
+                }
+            }
+            mvDrivesInfoSaveAll(ialExt, channelIndex);
+        }
+        else
+        {
+            ialExt->channelState[channelIndex] = state;
+        }
+    }
+}
+
+
+static MV_BOOLEAN mvStartChannelInit(MV_SATA_ADAPTER *pSataAdapter,
+                                     MV_U8 channelIndex,
+                                     MV_SAL_ADAPTER_EXTENSION *scsiAdapterExt,
+                                     MV_BOOLEAN* bIsChannelReady)
+{
+    *bIsChannelReady = MV_FALSE;
+
+    if (mvSataConfigureChannel(pSataAdapter, channelIndex) == MV_FALSE)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR,"[%d %d]: configure channel failed\n",
+                 pSataAdapter->adapterId,
+                 channelIndex);
+        return MV_FALSE;
+    }
+
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG,"[%d %d]: start channel\n",
+             pSataAdapter->adapterId,
+             channelIndex);
+    /*Just check SStatus in case of SATA I adapter*/
+    if (pSataAdapter->sataAdapterGeneration == MV_SATA_GEN_I)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG,"[%d %d]: starting SATA I channel.\n",
+                 pSataAdapter->adapterId, channelIndex);
+    }
+    else
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG,"[%d %d]: starting SATA II channel.\n",
+                 pSataAdapter->adapterId, channelIndex);
+    }
+
+    return mvStorageDevATAStartSoftResetDevice(pSataAdapter,
+                                               channelIndex,
+                                               MV_SATA_PM_CONTROL_PORT);
+}
+
+static MV_BOOLEAN mvChannelSRSTFinished(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                        MV_SATA_CHANNEL *pSataChannel,
+                                        MV_U8 channelIndex,
+                                        MV_SAL_ADAPTER_EXTENSION *scsiAdapterExt,
+                                        MV_BOOLEAN* bIsChannelReady,
+                                        MV_BOOLEAN* bFatalError)
+{
+    MV_SATA_DEVICE_TYPE deviceType;
+    MV_STORAGE_DEVICE_REGISTERS mvStorageDevRegisters;
+    MV_SATA_ADAPTER *pSataAdapter = ialExt->pSataAdapter;
+    MV_SATA_SCSI_DRIVE_DATA *pDriveData;
+    *bIsChannelReady = MV_FALSE;
+    *bFatalError = MV_FALSE;
+    if (pSataAdapter->sataAdapterGeneration > MV_SATA_GEN_I)
+    {
+        if (mvStorageIsDeviceBsyBitOff(pSataAdapter,
+                                       channelIndex,
+                                       &mvStorageDevRegisters)
+            == MV_FALSE)
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG,"[%d %d]: soft Reset PM control port "
+                     "in progress\n",
+                     pSataAdapter->adapterId, channelIndex);
+            printAtaDeviceRegisters(&mvStorageDevRegisters);
+            return MV_FALSE;
+        }
+        deviceType = mvGetSataDeviceType(&mvStorageDevRegisters);
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG,"[%d %d]: soft reset SATA II channel - "
+                 "device ready.\n",
+                 pSataAdapter->adapterId, channelIndex);
+    }
+    else
+    {
+        if (mvStorageIsDeviceBsyBitOff(pSataAdapter,
+                                       channelIndex,
+                                       &mvStorageDevRegisters)
+            == MV_FALSE)
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG,"[%d %d]: soft reset of SATA I channel "
+                     "in progress\n",
+                     pSataAdapter->adapterId, channelIndex);
+            printAtaDeviceRegisters(&mvStorageDevRegisters);
+            return MV_FALSE;
+        }
+        deviceType = mvGetSataDeviceType(&mvStorageDevRegisters);
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG,"[%d %d]: soft reset SATA I channel - "
+                 "device ready.\n",
+                 pSataAdapter->adapterId, channelIndex);
+        deviceType = mvGetSataDeviceType(&mvStorageDevRegisters);
+        if (deviceType != MV_SATA_DEVICE_TYPE_ATA_DISK)
+        {
+            deviceType = MV_SATA_DEVICE_TYPE_UNKNOWN;
+        }
+
+    }
+    switch (deviceType)
+    {
+    case MV_SATA_DEVICE_TYPE_ATA_DISK:
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_INFO,"[%d %d]: SATA disk found\n",
+                 pSataAdapter->adapterId, channelIndex);
+        if (mvStorageDevSetDeviceType(pSataAdapter,channelIndex, deviceType) == MV_FALSE)
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR,"[%d %d]: Failed to initialize disk\n",
+                     pSataAdapter->adapterId, channelIndex);
+            *bFatalError = MV_TRUE;
+            return MV_FALSE;
+
+        }
+        pDriveData = &scsiAdapterExt->ataDriveData[channelIndex][0];
+        if (mvInitSataDisk(pSataAdapter,
+                           channelIndex,
+                           0,
+                           &pDriveData->identifyInfo,
+                           pDriveData->identifyBuffer) == MV_FALSE)
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR,"[%d %d]: Failed to initialize disk\n",
+                     pSataAdapter->adapterId, channelIndex);
+            *bFatalError = MV_TRUE;
+            mvDrivesInfoFlushSingleDrive(ialExt,
+                                         channelIndex,
+                                         0);
+            return MV_FALSE;
+        }
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_INFO,"[%d %d]: Disk ready\n",
+                 pSataAdapter->adapterId, channelIndex);
+        mvSetDriveReady(ialExt,
+                        scsiAdapterExt,
+                        channelIndex,
+                        0,
+                        MV_TRUE,
+                        pDriveData->identifyBuffer);
+        mvSataScsiNotifyUA(scsiAdapterExt, channelIndex, 0);
+        *bIsChannelReady = MV_TRUE;
+        return MV_TRUE;
+        break;
+    case MV_SATA_DEVICE_TYPE_PM:
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_INFO,"[%d %d]: PortMultiplier device found\n",
+                 pSataAdapter->adapterId, channelIndex);
+        if (mvStorageDevSetDeviceType(pSataAdapter,channelIndex, deviceType) == MV_FALSE)
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR,"[%d %d]: Failed to initialize PM\n",
+                     pSataAdapter->adapterId, channelIndex);
+            *bFatalError = MV_TRUE;
+            return MV_FALSE;
+
+        }
+        break;
+#ifdef MV_SUPPORT_ATAPI
+    case MV_SATA_DEVICE_TYPE_ATAPI_DEVICE:
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_INFO,"[%d %d]: ATAPI device found\n",
+                 pSataAdapter->adapterId, channelIndex);
+        if (mvStorageDevSetDeviceType(pSataAdapter,channelIndex, deviceType) == MV_FALSE)
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR,"[%d %d]: Failed to initialize ATAPI device\n",
+                     pSataAdapter->adapterId, channelIndex);
+            *bFatalError = MV_TRUE;
+            return MV_FALSE;
+
+        }
+        pDriveData = &scsiAdapterExt->ataDriveData[channelIndex][0];
+        if (mvInitSataATAPI(pSataAdapter,
+                           channelIndex,
+                           0,
+                           &pDriveData->identifyInfo,
+                           pDriveData->identifyBuffer) == MV_FALSE)
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR,"[%d %d]: Failed to initialize ATAPI device\n",
+                     pSataAdapter->adapterId, channelIndex);
+            *bFatalError = MV_TRUE;
+            mvDrivesInfoFlushSingleDrive(ialExt,
+                                         channelIndex,
+                                         0);
+            return MV_FALSE;
+        }
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_INFO,"[%d %d]: ATAPI Device ready\n",
+                 pSataAdapter->adapterId, channelIndex);
+
+        mvSetDriveReady(ialExt,
+                        scsiAdapterExt,
+                        channelIndex,
+                        0,
+                        MV_TRUE,
+                        pDriveData->identifyBuffer);
+
+
+        mvSataScsiNotifyUA(scsiAdapterExt, channelIndex, 0);
+        *bIsChannelReady = MV_TRUE;
+        return MV_TRUE;
+         break;
+#endif
+    default:
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR,"[%d %d]: ERROR: unknown device type\n",
+                 pSataAdapter->adapterId, channelIndex);
+        *bFatalError    =    MV_TRUE;
+        return MV_FALSE;
+    }
+    return MV_TRUE;
+}
+
+
+
+static MV_BOOLEAN mvConfigChannelDMA(
+                                    MV_IAL_COMMON_ADAPTER_EXTENSION* ialExt,
+                                    MV_U8 channelIndex,
+                                    MV_SAL_ADAPTER_EXTENSION *scsiAdapterExt)
+{
+    MV_SATA_ADAPTER *pSataAdapter = ialExt->pSataAdapter;
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG,"[%d %d] config queueing mode\n",
+             pSataAdapter->adapterId, channelIndex);
+
+
+    if (mvConfigChannelQueuingMode(ialExt,
+                                   channelIndex,
+                                   scsiAdapterExt)
+        == MV_FALSE)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR,"[%d %d] Failed to config DMA queuing\n",
+                 pSataAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+    }
+    /* Enable EDMA */
+    if (mvSataEnableChannelDma(pSataAdapter, channelIndex) == MV_FALSE)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR,"[%d] Failed to enable DMA, channel=%d\n",
+                 pSataAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+    }
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG,"[%d %d]: channel started successfully\n",
+             pSataAdapter->adapterId, channelIndex);
+    return MV_TRUE;
+}
+
+
+
+
+
+static void mvSetChannelTimer(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                              MV_U8 channelIndex,
+                              MV_U32 timeout)
+{
+    ialExt->IALChannelExt[channelIndex].SRSTTimerThreshold = timeout;
+    ialExt->IALChannelExt[channelIndex].SRSTTimerValue = 1;
+}
+
+static void mvDecrementChannelTimer(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                    MV_U8 channelIndex)
+{
+    if (ialExt->IALChannelExt[channelIndex].SRSTTimerThreshold > 0)
+    {
+        ialExt->IALChannelExt[channelIndex].SRSTTimerValue +=
+        MV_IAL_ASYNC_TIMER_PERIOD;
+    }
+}
+
+static MV_BOOLEAN mvIsChannelTimerExpired(
+                                         MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                         MV_U8 channelIndex)
+{
+    if (ialExt->IALChannelExt[channelIndex].SRSTTimerValue >
+        ialExt->IALChannelExt[channelIndex].SRSTTimerThreshold)
+    {
+        return MV_TRUE;
+    }
+    else
+    {
+        return MV_FALSE;
+    }
+}
+
+/*******************************************************************************
+*State Machine related functions:
+*  Return MV_TRUE to proceed to the next channel
+*  Return MV_FALSE to proceed to the next state on current channel
+*******************************************************************************/
+
+static MV_BOOLEAN mvChannelNotConnectedStateHandler(
+                                                   MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                                   MV_U8 channelIndex,
+                                                   MV_SAL_ADAPTER_EXTENSION *scsiAdapterExt)
+{
+    MV_SATA_ADAPTER *pSataAdapter = ialExt->pSataAdapter;
+    if (pSataAdapter->sataChannel[channelIndex] != NULL)
+    {
+        mvSataRemoveChannel(pSataAdapter,channelIndex);
+        pSataAdapter->sataChannel[channelIndex] = NULL;
+        mvSetDriveReady(ialExt,
+                        scsiAdapterExt,
+                        channelIndex,
+                        0xFF, MV_FALSE, NULL);
+        mvFlushSCSICommandQueue(ialExt, channelIndex);
+    }
+    return MV_TRUE;
+}
+
+
+static MV_BOOLEAN mvChannelConnectedStateHandler(
+     MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+     MV_U8 channelIndex,
+     MV_SAL_ADAPTER_EXTENSION *scsiAdapterExt)
+{
+     MV_BOOLEAN res = MV_FALSE;
+     MV_BOOLEAN isChannelReady;
+     MV_SATA_CHANNEL *pSataChannel;
+     MV_SATA_ADAPTER *pSataAdapter = ialExt->pSataAdapter;
+     
+     mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG,"[%d %d] CHANNEL_CONNECTED\n",
+	      ialExt->pSataAdapter->adapterId, channelIndex);
+     if (pSataAdapter->sataChannel[channelIndex] == NULL)
+    {
+	 if (IALInitChannel(pSataAdapter, channelIndex) == MV_FALSE)
+	 {
+	      IALReleaseChannel(pSataAdapter, channelIndex);
+	      mvDrivesInfoFlushAll(ialExt, channelIndex);
+	      mvSetChannelState(ialExt, channelIndex, CHANNEL_NOT_CONNECTED);
+	      return MV_TRUE;
+	 }
+    }
+     pSataChannel = pSataAdapter->sataChannel[channelIndex];
+     res = mvStartChannelInit(pSataAdapter,
+			      channelIndex,
+			      scsiAdapterExt,
+			      &isChannelReady);
+     if (res == MV_TRUE)
+     {
+	  if (isChannelReady == MV_FALSE)
+	  {
+	       /*SRST channel, Set polling timer*/
+            mvSetChannelTimer(ialExt, channelIndex,
+                              MV_IAL_SRST_TIMEOUT);
+            mvSetChannelState(ialExt,
+                              channelIndex,
+                              CHANNEL_IN_SRST);
+	  }
+	  else
+	  {
+            if (mvConfigChannelDMA(ialExt,
+                                   channelIndex,
+                                   scsiAdapterExt) == MV_TRUE)
+            {
+		 mvSetChannelState(ialExt,
+				   channelIndex,
+				   CHANNEL_READY);
+            }
+            else
+            {
+		 mvStopChannel(ialExt,
+			       channelIndex,
+			       scsiAdapterExt);
+            }
+	  }
+    }
+     else
+     {
+	  mvStopChannel(ialExt,
+			channelIndex,
+			scsiAdapterExt);
+     }
+     return MV_TRUE;
+}
+
+
+MV_BOOLEAN mvChannelInSrstStateHandler(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                       MV_U8 channelIndex,
+                                       MV_SAL_ADAPTER_EXTENSION *scsiAdapterExt)
+{
+    MV_BOOLEAN bFatalError;
+    MV_BOOLEAN res = MV_FALSE;
+    MV_BOOLEAN isChannelReady;
+    MV_SATA_ADAPTER *pSataAdapter = ialExt->pSataAdapter;
+    MV_SATA_CHANNEL *pSataChannel = pSataAdapter->sataChannel[channelIndex];
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG,"[%d %d] CHANNEL_IN_SRST\n",
+             pSataAdapter->adapterId, channelIndex);
+    mvDecrementChannelTimer(ialExt, channelIndex);
+    res = mvChannelSRSTFinished(ialExt,
+                                pSataChannel,
+                                channelIndex,
+                                scsiAdapterExt,
+                                &isChannelReady,
+                                &bFatalError);
+    if (res == MV_TRUE)
+    {
+        /*Finishing channel initialization*/
+        if (isChannelReady == MV_TRUE)
+        {
+	     mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_INFO,"[%d %d]: Sata device ready\n",
+		      pSataAdapter->adapterId,channelIndex);
+            if (mvConfigChannelDMA(ialExt,
+                                   channelIndex,
+                                   scsiAdapterExt) == MV_TRUE)
+            {
+                mvSetChannelState(ialExt,
+                                  channelIndex,
+                                  CHANNEL_READY);
+            }
+            else
+            {
+                mvStopChannel(ialExt,
+                              channelIndex,
+                              scsiAdapterExt);
+            }
+        }
+        else
+        {/*If channel not ready and function call succeed -> PM is found*/
+            if (mvConfigurePMDevice(ialExt, channelIndex) == MV_FALSE)
+            {
+                mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR,"[%d %d]: Failed to "
+                         "initialize PM\n",
+                         pSataAdapter->adapterId,channelIndex);
+#if 0               
+		mvStopChannel(ialExt,
+                              channelIndex,
+                              scsiAdapterExt);
+#else
+		mvSataChannelHardReset(pSataAdapter, channelIndex);
+		mvRestartChannel(ialExt, channelIndex, scsiAdapterExt, MV_FALSE);
+#endif
+            }
+            else
+            {
+		 MV_IAL_COMMON_CHANNEL_EXTENSION* channelExt = 
+		      &ialExt->IALChannelExt[channelIndex];
+		 
+		 channelExt->port_state = MV_PORT_NOT_INITIALIZED;
+		 channelExt->devInSRST = 0;
+		 
+                mvSetChannelState(ialExt, channelIndex,
+                                  CHANNEL_PM_INIT_DEVICES);
+                return MV_FALSE;
+            }
+        }
+    }
+    else
+    {
+        if (bFatalError == MV_TRUE)
+        {
+            mvStopChannel(ialExt,
+                          channelIndex,
+                          scsiAdapterExt);
+        }
+        else
+        {
+            if (mvIsChannelTimerExpired(ialExt, channelIndex) == MV_TRUE)
+            {
+                mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR,
+                         "[%d %d]: SW reset Failed, timer expired\n",
+                         pSataAdapter->adapterId,channelIndex);
+                mvStopChannel(ialExt,
+                              channelIndex,
+                              scsiAdapterExt);
+            }
+        }
+    }
+    return MV_TRUE;
+}
+
+MV_BOOLEAN classifyAndInitDevice(MV_SAL_ADAPTER_EXTENSION *scsiAdapterExt,
+				 MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+				 MV_U8 channelIndex, MV_U8 PMPort)
+{
+     
+     MV_SATA_DEVICE_TYPE deviceType;
+     MV_SATA_ADAPTER *pSataAdapter = scsiAdapterExt->pSataAdapter;
+     MV_IAL_COMMON_CHANNEL_EXTENSION* channelExt = &ialExt->IALChannelExt[channelIndex];
+     MV_SATA_SCSI_DRIVE_DATA *pDriveData = &scsiAdapterExt->ataDriveData[channelIndex][PMPort];
+     MV_STORAGE_DEVICE_REGISTERS *mvStorageDevRegisters = &channelExt->mvStorageDevRegisters;
+
+     deviceType = mvGetSataDeviceType(mvStorageDevRegisters);
+     if (deviceType == MV_SATA_DEVICE_TYPE_ATA_DISK)
+     {
+	  if (mvInitSataDisk(pSataAdapter,
+			     channelIndex ,
+			     PMPort, &pDriveData->identifyInfo,
+			     pDriveData->identifyBuffer) == MV_FALSE)
+	  {
+	       mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR,"[%d %d %d]: Failed to initialize disk\n",
+			pSataAdapter->adapterId, channelIndex, PMPort);
+	       mvDrivesInfoFlushSingleDrive(ialExt, channelIndex, PMPort);
+	  }
+	  else
+	  {
+	       mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_INFO, "[%d %d %d]: Disk ready\n",
+			pSataAdapter->adapterId, channelIndex, PMPort);
+	       mvSetDriveReady(ialExt,
+			       scsiAdapterExt,
+			       channelIndex, PMPort,
+			       MV_TRUE,
+			       pDriveData->identifyBuffer);
+	       mvSataScsiNotifyUA(scsiAdapterExt, channelIndex, PMPort);
+	  }
+     }
+#ifdef MV_SUPPORT_ATAPI
+     else if (deviceType == MV_SATA_DEVICE_TYPE_ATAPI_DEVICE)
+     {
+	  if (mvInitSataATAPI(pSataAdapter,
+			      channelIndex ,
+			      PMPort, &pDriveData->identifyInfo,
+			      pDriveData->identifyBuffer) == MV_FALSE)
+	  {
+	       mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR,"[%d %d %d]: Failed to initialize ATAPI device\n",
+			pSataAdapter->adapterId, channelIndex, PMPort);
+                    mvDrivesInfoFlushSingleDrive(ialExt, channelIndex, PMPort);
+	  }
+	  else
+	  {
+	       mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_INFO, "[%d %d %d]: ATAPI device ready\n",
+			pSataAdapter->adapterId, channelIndex, PMPort);
+	       mvSetDriveReady(ialExt,
+                                    scsiAdapterExt,
+			       channelIndex, PMPort,
+			       MV_TRUE,
+			       pDriveData->identifyBuffer);
+	       mvSataScsiNotifyUA(scsiAdapterExt, channelIndex, PMPort);
+	  }
+     }
+#endif
+     else  
+     {
+	  mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "[%d %d %d]: bad type for the connected device, deviceType = %d\n",
+		   pSataAdapter->adapterId, channelIndex, PMPort, deviceType - MV_SATA_DEVICE_TYPE_UNKNOWN);
+	  mvDrivesInfoFlushSingleDrive(ialExt, channelIndex, PMPort);
+     }
+     return MV_TRUE;
+}
+static MV_BOOLEAN mvPMPortProbeLink(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+				    MV_U8 channelIndex,
+				    MV_U8 PMPort,
+				    MV_BOOLEAN force_speed_gen1,
+				    MV_U32 *SStatus,
+				    MV_BOOLEAN *H2DReceived)
+{
+    MV_SATA_ADAPTER *pSataAdapter = ialExt->pSataAdapter;
+    
+    mvPMDevEnableStaggeredSpinUpPort(pSataAdapter, channelIndex, PMPort, 
+				     force_speed_gen1);
+    /* clear N bit (16) and X bit (26)in serror */
+    /* some driver expect the host to respond with R_RDY immediatly */
+    if (mvPMDevWriteReg(pSataAdapter, channelIndex, PMPort,
+			MV_SATA_PSCR_SERROR_REG_NUM, 
+			MV_BIT26 | MV_BIT18 |MV_BIT16, NULL) ==
+	MV_FALSE)
+    {
+	 mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR,
+		  "[%d %d %d]: PM Write SERROR Failed\n",
+		  pSataAdapter->adapterId, channelIndex, PMPort);
+    }
+    mvMicroSecondsDelay(pSataAdapter, 50000);
+    *H2DReceived = mvSataIfD2HReceived(pSataAdapter, channelIndex, PMPort);
+    
+    /* clear again*/
+    mvPMDevWriteReg(pSataAdapter, channelIndex, PMPort,
+		    MV_SATA_PSCR_SERROR_REG_NUM,
+		    MV_BIT26| MV_BIT18 |MV_BIT16, NULL);
+    
+    if (mvPMDevReadReg(pSataAdapter, channelIndex, PMPort,
+		       MV_SATA_PSCR_SSTATUS_REG_NUM, SStatus, NULL) ==
+	MV_FALSE)
+    {
+	 mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "[%d %d %d]: mvPMDevReadReg Failed\n",
+		  pSataAdapter->adapterId, channelIndex, PMPort);
+	 return MV_FALSE;
+    }
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_INFO, "[%d %d %d]: S-Status: 0x%x\n",
+	     pSataAdapter->adapterId,
+	     channelIndex, PMPort, *SStatus);
+    
+    /* clear X bit in serror */
+    if (mvPMDevWriteReg(pSataAdapter, channelIndex, PMPort,
+			MV_SATA_PSCR_SERROR_REG_NUM,
+			MV_BIT26 | MV_BIT18 | MV_BIT16, NULL) ==
+	MV_FALSE)
+    {
+	 mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR,
+		  "[%d %d %d]: PM Write SERROR Failed\n",
+		  pSataAdapter->adapterId, channelIndex, PMPort);
+    }
+    return MV_TRUE;      
+}
+static MV_BOOLEAN mvPMInitDevicesStateHandler(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+					      MV_U8 channelIndex,
+					      MV_SAL_ADAPTER_EXTENSION *scsiAdapterExt)
+{
+    MV_IAL_COMMON_CHANNEL_EXTENSION* channelExt =
+    &ialExt->IALChannelExt[channelIndex];
+    MV_SATA_ADAPTER *pSataAdapter = ialExt->pSataAdapter;
+    MV_U8 PMPort = channelExt->devInSRST;
+    MV_U32 SStatus;
+    MV_STORAGE_DEVICE_REGISTERS *mvStorageDevRegisters = &channelExt->mvStorageDevRegisters;
+    MV_BOOLEAN H2DReceived = MV_FALSE;
+
+
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG,"[%d %d] CHANNEL_PM_INIT_DEVICES port:%d status:%d\n",
+             ialExt->pSataAdapter->adapterId, channelIndex, PMPort,
+	     channelExt->port_state);
+    
+    if(channelExt->port_state == MV_PORT_NOT_INITIALIZED)
+    {
+	 MV_BOOLEAN found_device = MV_FALSE;
+	 MV_U32 retry_count = 0;
+	 MV_BOOLEAN force_speed_gen1 = MV_FALSE;
+	 do {
+	      if(mvPMPortProbeLink(ialExt, channelIndex, PMPort, force_speed_gen1,
+				   &SStatus, &H2DReceived) == MV_FALSE) {
+		   if (mvStorageDevATASoftResetDevice(pSataAdapter, channelIndex,
+						      MV_SATA_PM_CONTROL_PORT, NULL)
+		       == MV_FALSE)
+		   {
+			mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR,
+				 "[%d %d]:failed to Soft Reset PM control port\n",
+				 pSataAdapter->adapterId, channelIndex);
+			return MV_FALSE;
+		   }
+		   PMPort++;
+		   if(PMPort == channelExt->PMnumberOfPorts)
+			break;
+		   else
+			continue;
+	      }
+	      
+	      if ((SStatus & 0xf) == 3) {
+		   if(H2DReceived == MV_TRUE){
+			channelExt->port_state = MV_PORT_ISSUE_SRST;
+		   }else{
+			mvSetChannelTimer(ialExt, channelIndex,
+					  MV_IAL_WAIT_FOR_RDY_TIMEOUT);
+			channelExt->port_state = MV_PORT_WAIT_FOR_RDY;
+		   }
+		   channelExt->devInSRST = PMPort;
+		   found_device = MV_TRUE;
+		   return MV_FALSE;
+	      }
+	      if((SStatus & 0xf) == 1) {
+		   if(retry_count++ < 5) {
+			/* probe link again 
+			 */
+			mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR,
+				 "[%d %d %d]: retry link (%d)\n",
+				 pSataAdapter->adapterId, channelIndex, PMPort,
+				 SStatus & 0xf, retry_count);
+			
+			if((SStatus & 0xf0) == 0x10)
+			     force_speed_gen1 = MV_TRUE;
+			continue;
+		   }
+	      } 
+	      /* next PORT*/
+	      PMPort++;
+	      if(PMPort == channelExt->PMnumberOfPorts)
+	      {
+		   channelExt->port_state = MV_PORT_DONE;
+		   break;
+	      }
+	 }while(found_device == MV_FALSE);
+	 
+    }else if(channelExt->port_state == MV_PORT_WAIT_FOR_RDY){
+	 mvDecrementChannelTimer(ialExt, channelIndex);
+	 if(mvSataIfD2HReceived(pSataAdapter, channelIndex, PMPort) == MV_FALSE){
+	      mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG,
+		       "[%d %d %d] - disk not ready: wait a little more\n",
+		       pSataAdapter->adapterId, channelIndex, PMPort);
+
+	      printAtaDeviceRegisters(mvStorageDevRegisters);
+	      if(mvIsChannelTimerExpired(ialExt, channelIndex) == MV_TRUE){
+		   mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG,
+			    "[%d %d %d]: PM port signature timed out\n",
+			    pSataAdapter->adapterId, channelIndex, PMPort);
+	      }else{
+		   return MV_TRUE;
+	      }
+	 }else{
+	      mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_INFO, "[%d %d %d]: "
+		       "device signature received.\n",
+		       pSataAdapter->adapterId, channelIndex, PMPort);
+	 }
+	 channelExt->port_state = MV_PORT_ISSUE_SRST;
+	 channelExt->devInSRST = PMPort;
+	 return MV_FALSE; /* re-call this function without delay*/
+    }else if(channelExt->port_state == MV_PORT_ISSUE_SRST){
+	 MV_U32 SError;
+	 /* check if disk is connected*/
+	 mvPMDevReadReg(pSataAdapter, channelIndex, PMPort, 
+			MV_SATA_PSCR_SERROR_REG_NUM, &SError, NULL);
+	 mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "[%d %d %d]:SError "
+		  " 0x%08x\n",
+		  pSataAdapter->adapterId, channelIndex, PMPort, SError);
+
+	 /*check N bit*/
+	 if(SError & MV_BIT16)
+	 {
+	      mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_INFO, "[%d %d %d]: "
+		       "link was changed\n",
+                       pSataAdapter->adapterId, channelIndex, PMPort);
+	      if(++channelExt->devInSRST == channelExt->PMnumberOfPorts)
+	      {
+		   channelExt->port_state = MV_PORT_DONE;
+	      }else{
+		   channelExt->port_state = MV_PORT_NOT_INITIALIZED;
+	      }
+
+	      return MV_TRUE;
+	 }
+
+
+
+	 if (mvStorageDevATAStartSoftResetDevice(pSataAdapter,
+						 channelIndex,
+						 PMPort) == MV_FALSE)
+	 {
+	      mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "[%d %d %d]: "
+		       "failed to Soft Reset PM device port.\n",
+		       pSataAdapter->adapterId, channelIndex, PMPort);
+	      /* this port not functional, next port*/
+	      channelExt->port_state = MV_PORT_NOT_INITIALIZED;
+	      channelExt->devInSRST++;
+	 }
+	 else
+	 {
+	      mvSetChannelTimer(ialExt, channelIndex, MV_IAL_SRST_TIMEOUT);
+	      channelExt->port_state = MV_PORT_IN_SRST;
+	      channelExt->devInSRST = PMPort;
+	      return MV_TRUE;
+	 }	 
+    }else if(channelExt->port_state == MV_PORT_IN_SRST){
+	 mvDecrementChannelTimer(ialExt, channelIndex);
+	 if (mvStorageIsDeviceBsyBitOff(pSataAdapter,
+					channelIndex,
+					mvStorageDevRegisters) == MV_FALSE)
+	 {
+	      if (mvIsChannelTimerExpired(ialExt, channelIndex) !=
+		  MV_TRUE)
+	      {
+		   mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG,"[%d %d %d] - disk not ready: wait a "
+			    "little more\n",
+			    pSataAdapter->adapterId,
+			    channelIndex, PMPort);
+		   printAtaDeviceRegisters(mvStorageDevRegisters);
+		   return MV_TRUE;
+	      }
+	      /* SRST timeout*/
+	      mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR,"[%d %d %d]: Soft Reset PM port time out\n",
+		       pSataAdapter->adapterId, channelIndex, PMPort);
+	      
+	      if (mvStorageDevATASoftResetDevice(pSataAdapter, channelIndex,
+						 MV_SATA_PM_CONTROL_PORT, NULL) == MV_FALSE)
+	      {
+		   mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "[%d %d]: "
+			    "failed to Soft Reset PM control port\n",
+			    pSataAdapter->adapterId, channelIndex);
+		   return MV_FALSE;
+	      }
+	      
+	      if(++channelExt->devInSRST == channelExt->PMnumberOfPorts)
+	      {
+		   channelExt->port_state = MV_PORT_DONE;
+	      }else{
+		   channelExt->port_state = MV_PORT_NOT_INITIALIZED;
+		   return MV_TRUE;
+	      }
+	      
+	 }
+	 /* SRST completed*/
+	 channelExt->port_state = MV_PORT_INIT_DEVICE;
+	 return MV_TRUE;
+    }else if(channelExt->port_state == MV_PORT_INIT_DEVICE){
+	 MV_U32 SError;
+	 /* check if disk is connected*/
+	 mvPMDevReadReg(pSataAdapter, channelIndex, PMPort, 
+			MV_SATA_PSCR_SERROR_REG_NUM, &SError, NULL);
+	 mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "[%d %d %d]:SError "
+		  " 0x%08x\n",
+		  pSataAdapter->adapterId, channelIndex, PMPort, SError);
+
+	 /*check N bit*/
+	 if(SError & MV_BIT16)
+	 {
+	      mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_INFO, "[%d %d %d]: "
+		       "link was changed\n",
+		       pSataAdapter->adapterId, channelIndex, PMPort);
+	 } else {
+	      classifyAndInitDevice(scsiAdapterExt, ialExt,
+				    channelIndex, PMPort);
+	 }
+	 /* next port*/
+	 if(++channelExt->devInSRST == channelExt->PMnumberOfPorts)
+	 {
+	      channelExt->port_state = MV_PORT_DONE;
+	 }else{
+	      channelExt->port_state = MV_PORT_NOT_INITIALIZED;
+	      return MV_TRUE;
+	 }
+    }
+    
+    if(channelExt->port_state == MV_PORT_DONE) {
+	 mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_INFO,"[%d %d]: PM devices initialized\n",  pSataAdapter->adapterId,
+		  channelIndex, PMPort, channelExt->port_state);
+#if 0
+	 if (clearSErrorPorts(ialExt->pSataAdapter, channelIndex,
+			      ialExt->IALChannelExt[channelIndex].PMnumberOfPorts) != 
+	     MV_TRUE)
+	 {
+	      return MV_FALSE;
+	 }
+#endif
+#if 1
+	 if (mvPMEnableCommStatusChangeBits(ialExt,
+					    channelIndex,
+					    MV_TRUE) != MV_TRUE)
+	 {
+	      return MV_FALSE;
+	 }
+	 if (mvPMEnableAsyncNotify(ialExt, channelIndex) == MV_FALSE)
+	 {
+	      return MV_FALSE;
+	 }
+#endif
+	 if (mvConfigChannelDMA(ialExt,
+				channelIndex,
+				scsiAdapterExt) == MV_TRUE)
+	 {
+	      mvSetChannelState(ialExt, channelIndex, CHANNEL_READY);
+	      
+	 }
+	 else
+	 {
+	      mvStopChannel(ialExt, channelIndex, scsiAdapterExt);
+	 }
+    }else if(channelExt->port_state == MV_PORT_FAILED){
+	 mvStopChannel(ialExt, channelIndex, scsiAdapterExt);
+    }else {
+	 mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_FATAL_ERROR,"[%d %d %d] - unknown port"
+		  " status: %d\n",  pSataAdapter->adapterId,
+		  channelIndex, PMPort, channelExt->port_state);
+    }
+    return MV_TRUE;
+}
+
+static MV_BOOLEAN mvChannelReadyStateHandler(
+                                            MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                            MV_U8 channelIndex)
+{
+
+    MV_SATA_ADAPTER *pSataAdapter = ialExt->pSataAdapter;
+    if ((ialExt->IALChannelExt[channelIndex].pmRegAccessInProgress == MV_FALSE) &&
+        (mvStorageDevGetDeviceType (pSataAdapter, channelIndex) == MV_SATA_DEVICE_TYPE_PM) &&
+        (ialExt->IALChannelExt[channelIndex].pmAsyncNotifyEnabled == MV_FALSE))
+    {
+        /*poll pm GSCR error register one time of 4 steps (2 seconds)*/
+        if (ialExt->IALChannelExt[channelIndex].pmRegPollCounter++ & 0x3) 
+        {
+            return MV_TRUE;
+        }
+        if (mvQueuePMAccessRegisterCommand(ialExt,
+                                           channelIndex,
+                                           MV_SATA_PM_CONTROL_PORT,
+                                           MV_SATA_GSCR_ERROR_REG_NUM,
+                                           0,
+                                           MV_TRUE) == MV_FALSE)
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR,"[%d %d] error reading "
+                     " PM GSCR_ERROR register.\n",
+                     pSataAdapter->adapterId, channelIndex);
+        }
+    }
+    mvSata60X1B2CheckDevError(pSataAdapter, channelIndex);
+    return MV_TRUE;
+}
+
+
+static MV_BOOLEAN mvChannelPMHotPlugStateHandler(
+                                                MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                                MV_U8 channelIndex,
+                                                MV_SAL_ADAPTER_EXTENSION *scsiAdapterExt)
+{
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG,"[%d %d] CHANNEL_PM_HOT_PLUG\n",
+             ialExt->pSataAdapter->adapterId, channelIndex);
+    mvSataDisableChannelDma(ialExt->pSataAdapter, channelIndex);
+    mvSataFlushDmaQueue (ialExt->pSataAdapter,
+                         channelIndex, MV_FLUSH_TYPE_CALLBACK);
+    mvSataChannelHardReset(ialExt->pSataAdapter, channelIndex);
+    mvRestartChannel(ialExt, channelIndex, scsiAdapterExt, MV_FALSE);
+    return MV_TRUE;
+}
+
+static MV_BOOLEAN mvChannelStateMachine(
+                                       MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                       MV_U8 channelIndex,
+                                       MV_SAL_ADAPTER_EXTENSION *scsiAdapterExt)
+{
+    MV_BOOLEAN res = MV_FALSE;
+    do
+    {
+        switch (ialExt->channelState[channelIndex])
+        {
+        case CHANNEL_NOT_CONNECTED:
+            res = mvChannelNotConnectedStateHandler(ialExt,
+                                                    channelIndex,
+                                                    scsiAdapterExt);
+            break;
+        case CHANNEL_CONNECTED:
+            res = mvChannelConnectedStateHandler(ialExt,
+                                                 channelIndex,
+                                                 scsiAdapterExt);
+            break;
+        case CHANNEL_IN_SRST:
+            res = mvChannelInSrstStateHandler(ialExt,
+                                              channelIndex,
+                                              scsiAdapterExt);
+            break;
+        case CHANNEL_PM_INIT_DEVICES:
+            res = mvPMInitDevicesStateHandler(ialExt,
+					      channelIndex,
+					      scsiAdapterExt);
+            break;
+        case CHANNEL_READY:
+            res = mvChannelReadyStateHandler(ialExt,
+                                             channelIndex);
+            break;
+        case CHANNEL_PM_HOT_PLUG:
+            res = mvChannelPMHotPlugStateHandler(ialExt,
+                                                 channelIndex,
+                                                 scsiAdapterExt);
+            break;
+        default:
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR,"[%d %d]: Unknown channel state.\n",
+                     ialExt->pSataAdapter->adapterId, channelIndex);
+            return MV_FALSE;
+        }
+    } while (res == MV_FALSE);
+
+    return MV_TRUE;
+}
+
+
+static MV_BOOLEAN mvAdapterStateMachine(
+                                       MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                       MV_SAL_ADAPTER_EXTENSION *scsiAdapterExt)
+{
+    MV_BOOLEAN res = MV_TRUE;
+    MV_U8 channelIndex;
+    MV_SATA_ADAPTER *pSataAdapter = ialExt->pSataAdapter;
+    switch (ialExt->adapterState)
+    {
+    case ADAPTER_INITIALIZING:     {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG,"[%d] ADAPTER_INITIALIZING\n",
+                     pSataAdapter->adapterId);
+ 
+            res = mvSataEnableStaggeredSpinUpAll(pSataAdapter);
+            if (res == MV_TRUE)
+            {
+                if (mvSataUnmaskAdapterInterrupt(pSataAdapter) == MV_FALSE)
+                {
+                    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR,"[%d]: "
+                             "mvSataUnmaskAdapterInterrupt failed\n",
+                             pSataAdapter->adapterId);
+                    ialExt->adapterState = ADAPTER_FATAL_ERROR;
+                    return MV_FALSE;
+                }
+                ialExt->adapterState = ADAPTER_READY;
+            }
+        }
+        break;
+    case ADAPTER_READY:
+        for (channelIndex = 0;
+            channelIndex < pSataAdapter->numberOfChannels; channelIndex++)
+        {
+
+            mvChannelStateMachine(ialExt,
+                                  channelIndex,
+                                  scsiAdapterExt);
+        }
+        return MV_TRUE;
+        break;
+    default:
+        break;
+    }
+
+    if (ialExt->adapterState != ADAPTER_READY)
+    {
+        return res;
+    }
+
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG,"[%d] ADAPTER_READY\n",
+             pSataAdapter->adapterId);
+
+    /*Start channel initialization for connected channels*/
+    for (channelIndex = 0;
+        channelIndex < pSataAdapter->numberOfChannels;
+        channelIndex++)
+    {
+	 MV_U32 SStatus;
+	 mvFlushSCSICommandQueue(ialExt, channelIndex);
+        if (mvSataIsStorageDeviceConnected(pSataAdapter, channelIndex, &SStatus) ==
+            MV_FALSE)
+        {
+            mvSetChannelState(ialExt,
+                              channelIndex,
+                              CHANNEL_NOT_CONNECTED);
+            continue;
+        }
+
+        mvSetChannelState(ialExt,
+                          channelIndex,
+                          CHANNEL_CONNECTED);
+	mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_INFO, "[%d %d]: S-Status: 0x%x\n",
+		       pSataAdapter->adapterId,
+		       channelIndex, SStatus);
+	
+        if (mvChannelStateMachine(ialExt,
+                                  channelIndex,
+                                  scsiAdapterExt) == MV_FALSE)
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR,"[%d %d]: Failed to "
+                     "start channel.\n", pSataAdapter->adapterId, channelIndex);
+            mvSetChannelState(ialExt,
+                              channelIndex,
+                              CHANNEL_NOT_CONNECTED);
+            mvFlushSCSICommandQueue(ialExt, channelIndex);
+            mvSataRemoveChannel(pSataAdapter,channelIndex);
+            IALReleaseChannel(pSataAdapter, channelIndex);
+            pSataAdapter->sataChannel[channelIndex] = NULL;
+            mvDrivesInfoFlushAll(ialExt, channelIndex);
+            mvSetDriveReady(ialExt,
+                            scsiAdapterExt,
+                            channelIndex,
+                            0xFF, MV_FALSE, NULL);
+            continue;
+        }
+    }
+    return res;
+}
+
+static MV_BOOLEAN mvGetDisksModes(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                  MV_SAL_ADAPTER_EXTENSION *pScsiAdapterExt,
+                                  MV_U8 channelIndex,
+                                  MV_BOOLEAN *TCQ,
+                                  MV_BOOLEAN *NCQ,
+                                  MV_U8   *numOfDrives)
+{
+    MV_SATA_ADAPTER *pSataAdapter = ialExt->pSataAdapter;
+    MV_BOOLEAN allNCQ = MV_TRUE;
+    MV_BOOLEAN allTCQ = MV_TRUE;
+    MV_U8               i;
+
+    if ((pSataAdapter == NULL) || (pScsiAdapterExt == NULL))
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_FATAL_ERROR,"[%d %d]"
+                 " mvGetDisksModes failed, bad pointer\n",
+                 pSataAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+    }
+    if ((ialExt->adapterState != ADAPTER_READY) ||
+        (ialExt->channelState[channelIndex] == CHANNEL_NOT_CONNECTED))
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_FATAL_ERROR,"[%d %d] "
+                 "mvGetDisksModes failed,Bad Adapter or Channel State\n",
+                 pSataAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+    }
+    if (pSataAdapter->sataChannel[channelIndex] == NULL)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_FATAL_ERROR,"[%d %d] "
+                 "mvGetDisksModes failed, channel not configured\n",
+                 pSataAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+    }
+    *numOfDrives = 0;
+    for (i = 0; i < MV_SATA_PM_MAX_PORTS; i++)
+    {
+        if ((pScsiAdapterExt->
+            ataDriveData[channelIndex][i].driveReady == MV_TRUE) &&
+           (pScsiAdapterExt->ataDriveData[channelIndex][i].identifyInfo.deviceType == MV_SATA_DEVICE_TYPE_ATA_DISK))
+        {
+            (*numOfDrives)++;
+
+            if (pScsiAdapterExt->ataDriveData[channelIndex][i].
+                identifyInfo.DMAQueuedModeSupported == MV_FALSE)
+            {
+                allTCQ = MV_FALSE;
+            }
+            if (pScsiAdapterExt->
+                ataDriveData[channelIndex][i].identifyInfo.
+                SATACapabilities.NCQSupported == MV_FALSE)
+            {
+                allNCQ = MV_FALSE;
+            }
+        }
+    }
+
+    if (TCQ)
+    {
+        if ((*numOfDrives > 0) && (allTCQ == MV_TRUE))
+        {
+            *TCQ = MV_TRUE;
+        }
+        else
+        {
+            *TCQ = MV_FALSE;
+        }
+    }
+    if (NCQ)
+    {
+        if ((*numOfDrives > 0) && (allNCQ == MV_TRUE))
+        {
+            *NCQ = MV_TRUE;
+        }
+        else
+        {
+            *NCQ = MV_FALSE;
+        }
+    }
+    return MV_TRUE;
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sata/mvScsiAtaLayer.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sata/mvScsiAtaLayer.c
@@ -0,0 +1,3222 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+*******************************************************************************/
+/*******************************************************************************
+* mvScsiAtaLayer.c
+*
+* DESCRIPTION:
+*       C implementation for SCSI to ATA translation layer.
+*
+* DEPENDENCIES:
+*   mvIALCommon.h
+*   mvScsiAtaLayer.h
+*
+*******************************************************************************/
+
+/* includes */
+#include "mvScsiAtaLayer.h"
+#include "mvIALCommon.h"
+
+#ifdef MV_LOGGER
+    #define SAL_SPRINTF     sprintf
+#endif
+
+/* ATA defines */
+/* Bits for HD_ERROR */
+#define NM_ERR          0x02    /* media present */
+#define ABRT_ERR        0x04    /* Command aborted */
+#define MCR_ERR         0x08    /* media change request */
+#define IDNF_ERR        0x10    /* ID field not found */
+#define MC_ERR          0x20    /* media changed */
+#define UNC_ERR         0x40    /* Uncorrect data */
+#define WP_ERR          0x40    /* write protect */
+#define ICRC_ERR        0x80    /* new meaning:  CRC error during transfer */
+
+#ifdef MV_LOGGER
+static MV_VOID reportScbCompletion(MV_SATA_ADAPTER*    pSataAdapter,
+                                   MV_SATA_SCSI_CMD_BLOCK *pScb);
+#endif
+
+/* Locals */
+static MV_VOID mvAta2HostString(IN   MV_U16 *source,
+                                OUT  MV_U16 *target,
+                                IN   MV_U32 wordsCount);
+
+static MV_SCSI_COMMAND_STATUS_TYPE  mvScsiAtaGetInquiryData(IN  MV_SATA_ADAPTER*    pSataAdapter,
+                                                            IN  MV_SATA_SCSI_CMD_BLOCK  *pScb);
+
+static MV_SCSI_COMMAND_STATUS_TYPE  mvScsiAtaTestUnitReady(IN  MV_SATA_ADAPTER*    pSataAdapter,
+                                                           IN  MV_SATA_SCSI_CMD_BLOCK  *pScb);
+
+static MV_SCSI_COMMAND_STATUS_TYPE  mvScsiAtaSendDataCommand(IN  MV_SATA_ADAPTER*    pSataAdapter,
+                                                             IN  MV_SATA_SCSI_CMD_BLOCK  *pScb);
+
+static MV_SCSI_COMMAND_STATUS_TYPE  mvScsiAtaGetReadCapacityData(IN MV_SATA_ADAPTER*    pSataAdapter,
+                                                                 IN MV_SATA_SCSI_CMD_BLOCK  *pScb);
+
+static MV_SCSI_COMMAND_STATUS_TYPE  mvScsiAtaReportLuns(IN MV_SATA_ADAPTER*    pSataAdapter,
+							IN MV_SATA_SCSI_CMD_BLOCK  *pScb);
+
+static MV_SCSI_COMMAND_STATUS_TYPE  mvScsiAtaSendVerifyCommand(IN MV_SATA_ADAPTER*    pSataAdapter,
+                                                               IN MV_SATA_SCSI_CMD_BLOCK  *pScb);
+
+static MV_SCSI_COMMAND_STATUS_TYPE  mvScsiAtaReassignBlocks(IN MV_SATA_ADAPTER    *pSataAdapter,
+                                                            IN MV_SATA_SCSI_CMD_BLOCK  *pScb);
+
+static MV_SCSI_COMMAND_STATUS_TYPE  mvScsiAtaSendSyncCacheCommand(IN MV_SATA_ADAPTER*    pSataAdapter,
+                                                                  IN MV_SATA_SCSI_CMD_BLOCK  *pScb);
+
+static MV_SCSI_COMMAND_STATUS_TYPE  mvScsiAtaGetRequestSenseData(IN MV_SATA_ADAPTER*    pSataAdapter,
+                                                                 IN MV_SATA_SCSI_CMD_BLOCK  *pScb);
+
+static MV_SCSI_COMMAND_STATUS_TYPE  mvScsiAtaGetModeSenseData(IN    MV_SATA_ADAPTER*    pSataAdapter,
+                                                              IN    MV_SATA_SCSI_CMD_BLOCK  *pScb);
+
+static MV_BOOLEAN  mvScsiAtaGetModeSenseDataPhase2(IN MV_SATA_ADAPTER    *pSataAdapter,
+                                                   IN  MV_SATA_SCSI_CMD_BLOCK  *pScb);
+
+static MV_SCSI_COMMAND_STATUS_TYPE  mvScsiAtaModeSelect(IN    MV_SATA_ADAPTER*    pSataAdapter,
+                                                        IN    MV_SATA_SCSI_CMD_BLOCK  *pScb);
+
+static MV_U8 modeSelect(IN MV_SATA_ADAPTER    *pSataAdapter,
+                        IN  MV_SATA_SCSI_CMD_BLOCK  *pScb,
+                        MV_SCSI_COMMAND_STATUS_TYPE *pCommandStatus);
+
+static MV_U8 mvParseModeCachingPage(MV_SATA_ADAPTER *pSataAdapter,
+                                    IN  MV_SATA_SCSI_CMD_BLOCK  *pScb,
+                                    MV_U8 *buffer,
+                                    MV_SCSI_COMMAND_STATUS_TYPE *pCommandStatus);
+static MV_U32 mvModeSenseCachingPage(MV_SATA_SCSI_CMD_BLOCK  *pScb,
+                                     MV_U8 *buffer, MV_U8 pageControl);
+
+static MV_U32 mvModeSenseControlPage(MV_SATA_ADAPTER *pSataAdapter,
+                                     MV_SATA_SCSI_CMD_BLOCK  *pScb,
+                                     MV_U8 *buffer, MV_U8 pageControl);
+
+static MV_BOOLEAN SALCommandCompletionCB(MV_SATA_ADAPTER *pSataAdapter,
+                                         MV_U8 channelNum,
+                                         MV_COMPLETION_TYPE comp_type,
+                                         MV_VOID_PTR commandId,
+                                         MV_U16 responseFlags,
+                                         MV_U32 timeStamp,
+                                         MV_STORAGE_DEVICE_REGISTERS *registerStruct);
+
+MV_VOID setSenseData(IN MV_SATA_SCSI_CMD_BLOCK *pScb, IN MV_U8 SenseKey,
+                     IN MV_U8 AdditionalSenseCode, IN MV_U8 ASCQ);
+
+MV_VOID _fillSenseInformation(IN MV_SATA_SCSI_CMD_BLOCK *pScb, MV_SCSI_SENSE_DATA *SenseData,
+			      MV_STORAGE_DEVICE_REGISTERS *registerStruct);
+
+MV_VOID handleNoneUdmaError(MV_SATA_SCSI_CMD_BLOCK  *pScb,
+                            MV_STORAGE_DEVICE_REGISTERS *registerStruct);
+
+static MV_VOID handleUdmaError(MV_SATA_SCSI_CMD_BLOCK  *pScb,
+                               MV_U32 responseFlags,
+                               MV_STORAGE_DEVICE_REGISTERS *registerStruct);
+
+/*static*/ MV_VOID  checkQueueCommandResult(MV_SATA_SCSI_CMD_BLOCK *pScb,
+                                            MV_QUEUE_COMMAND_RESULT result);
+
+static MV_VOID  mvScsiAtaSendSplittedVerifyCommand(IN MV_SATA_SCSI_CMD_BLOCK  *pScb);
+
+static MV_VOID  mvScsiAtaSendReadLookAhead(IN MV_SATA_ADAPTER*    pSataAdapter,
+                                           IN MV_SATA_SCSI_CMD_BLOCK  *pScb);
+
+static MV_VOID mvAta2HostString(IN MV_U16 *source,
+                                OUT MV_U16 *target,
+                                IN MV_U32 wordsCount
+                               )
+{
+    MV_U32 i;
+    for (i=0 ; i < wordsCount; i++)
+    {
+        target[i] = (source[i] >> 8) | ((source[i] & 0xff) << 8);
+        target[i] = MV_LE16_TO_CPU(target[i]);
+    }
+}
+
+MV_VOID setSenseData(IN MV_SATA_SCSI_CMD_BLOCK *pScb, IN MV_U8 SenseKey,
+                     IN MV_U8 AdditionalSenseCode, IN MV_U8 ASCQ)
+{
+    MV_SCSI_SENSE_DATA SenseData;
+
+    if (pScb->senseBufferLength == 0)
+    {
+        pScb->senseDataLength = 0;
+        return;
+    }
+    memset(&SenseData, 0, sizeof(MV_SCSI_SENSE_DATA));
+//    SenseData.Valid = 0;
+    SenseData.ResponseCode = MV_SCSI_RESPONSE_CODE;
+    SenseData.SenseKey = SenseKey;
+    SenseData.AdditionalSenseCode = AdditionalSenseCode;
+    SenseData.AdditionalSenseCodeQualifier = ASCQ;
+    SenseData.AdditionalSenseLength = sizeof(MV_SCSI_SENSE_DATA) - 8;
+    pScb->senseDataLength = sizeof(MV_SCSI_SENSE_DATA);
+    if (pScb->senseBufferLength < pScb->senseDataLength)
+    {
+        pScb->senseDataLength = pScb->senseBufferLength;
+    }
+    memcpy(pScb->pSenseBuffer, &SenseData, pScb->senseDataLength);
+}
+
+MV_VOID _fillSenseInformation(IN MV_SATA_SCSI_CMD_BLOCK *pScb, MV_SCSI_SENSE_DATA *SenseData,
+			      MV_STORAGE_DEVICE_REGISTERS *registerStruct)
+{
+        if (pScb->isExtended == MV_TRUE)
+        {
+		/* LBA 48 error handling */
+		SenseData->InformationDesc.information[2] = (MV_U8)((registerStruct->lbaHighRegister >> 8) & 0xff);
+		SenseData->InformationDesc.information[3] = (MV_U8)((registerStruct->lbaMidRegister >> 8) & 0xff);
+		SenseData->InformationDesc.information[4] = (MV_U8)((registerStruct->lbaLowRegister >> 8) & 0xff);
+        }
+        else
+        {
+            /* LBA 28 error handling */
+            SenseData->InformationDesc.information[4] =  (MV_U8)((registerStruct->deviceRegister) & 0x0f);
+        }
+        SenseData->InformationDesc.information[5] = (MV_U8)(registerStruct->lbaHighRegister & 0xff);
+        SenseData->InformationDesc.information[6] = (MV_U8)(registerStruct->lbaMidRegister & 0xff);
+        SenseData->InformationDesc.information[7] = (MV_U8)(registerStruct->lbaLowRegister & 0xff);
+}
+static MV_BOOLEAN checkLBAOutOfRange(IN MV_SATA_ADAPTER*    pSataAdapter,
+                                     IN MV_SATA_SCSI_CMD_BLOCK *pScb,
+                                     IN MV_U64 ATADiskSize, IN MV_U64 LBA,
+                                     IN MV_U32 sectors)
+{
+    if ((ATADiskSize <= LBA) ||  ((ATADiskSize - LBA) < sectors) || sectors > 0xFFFF)
+    {
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "Error LBA out of range. DiskSize %x sectors %x LBA %x\n"
+                 , ATADiskSize, sectors, LBA);
+
+        setSenseData(pScb, SCSI_SENSE_ILLEGAL_REQUEST,
+                     SCSI_ADSENSE_ILLEGAL_BLOCK, 0);
+        pScb->ScsiStatus = MV_SCSI_STATUS_CHECK_CONDITION;
+        pScb->dataTransfered = 0;
+        pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_BAD_SCSI_COMMAND;
+#ifdef MV_LOGGER
+        reportScbCompletion(pSataAdapter, pScb);
+#endif
+        pScb->completionCallBack(pSataAdapter, pScb);
+        return MV_TRUE;
+
+    }
+    return MV_FALSE;
+}
+/*******************************************************************************
+* mvScsiAtaGetInquiryData - Get the SCSI-3 standard inquiry(12h) data
+*
+* DESCRIPTION: This function fills the data buffer with Scsi standard inquiry
+*       data according to the ATA Identify data
+*
+* INPUT:
+*   pSataAdapter    - pointer to the SATA adapter data structure.
+*   pScb->bus    - the index of the specific SATA channel.
+*   pScb            - pointer to the Scsi command block.
+*
+* RETURN:
+*   MV_TRUE on success, MV_FALSE on failure.
+*
+* COMMENTS:
+*   No sanity check is done for the parameters.
+*
+*******************************************************************************/
+
+static MV_SCSI_COMMAND_STATUS_TYPE  mvScsiAtaGetInquiryData(IN  MV_SATA_ADAPTER*    pSataAdapter,
+                                                            IN  MV_SATA_SCSI_CMD_BLOCK  *pScb)
+{
+    MV_U8           buff[42];
+    MV_U32          inquiryLen;
+    MV_SATA_SCSI_DRIVE_DATA *pDriveData = &pScb->pSalAdapterExtension->ataDriveData[pScb->bus][pScb->target];
+
+    memset(buff, 0, 42);
+
+    if ((pScb->ScsiCdb[1] & (MV_BIT0 | MV_BIT1)) ||
+        (pScb->ScsiCdb[2]))
+    {
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "%d %d: Inquiry completed with error: cmd[1] %x cmd[2] %x\n",
+                 pSataAdapter->adapterId, pScb->bus, pScb->ScsiCdb[1],
+                 pScb->ScsiCdb[2]);
+        if (pDriveData->UAConditionPending == MV_TRUE)
+        {
+
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "Unit Attention condition is pending.\n");
+
+            if (pDriveData->UAEvents & MV_BIT0)
+            {
+                mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "Report Bus Reset.\n");
+
+                pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_UA_RESET;
+                setSenseData(pScb, SCSI_SENSE_UNIT_ATTENTION, SCSI_ADSENSE_BUS_RESET
+                             , 2);
+                pDriveData->UAEvents &= ~MV_BIT0;
+            }
+            else if (pDriveData->UAEvents & MV_BIT1)
+            {
+                mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "Report Mode Parameters Changed.\n");
+                pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_UA_PARAMS_CHANGED;
+                setSenseData(pScb, SCSI_SENSE_UNIT_ATTENTION,
+                             SCSI_ADSENSE_PARAMETERS_CHANGED, 1);
+                pDriveData->UAEvents &= ~MV_BIT1;
+            }
+
+            pScb->ScsiStatus = MV_SCSI_STATUS_CHECK_CONDITION;
+            pScb->dataTransfered = 0;
+#ifdef MV_LOGGER
+            reportScbCompletion(pSataAdapter, pScb);
+#endif
+            pScb->completionCallBack(pSataAdapter, pScb);
+            if (pDriveData->UAEvents == 0)
+            {
+                pDriveData->UAConditionPending = MV_FALSE;
+            }
+            return MV_SCSI_COMMAND_STATUS_COMPLETED;
+        }
+
+        setSenseData(pScb, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ADSENSE_INVALID_CDB,
+                     0);
+        pScb->ScsiStatus = MV_SCSI_STATUS_CHECK_CONDITION;
+        pScb->dataTransfered = 0;
+        pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_BAD_SCSI_COMMAND;
+#ifdef MV_LOGGER
+        reportScbCompletion(pSataAdapter, pScb);
+#endif
+        pScb->completionCallBack(pSataAdapter, pScb);
+        return MV_SCSI_COMMAND_STATUS_COMPLETED;
+    }
+
+    if (pScb->lun)
+    {
+        buff[0] = 0x7f;
+        inquiryLen = 5;
+    }
+    else
+    {
+        MV_U8   Vendor[9],Product[17], temp[24];
+        buff[0] = MV_SCSI_DIRECT_ACCESS_DEVICE;
+        buff[1] = 0;    /* Not Removable disk */
+        buff[2] = 5;    /*claim conformance to SCSI-3*/
+        buff[3] = 2;    /* set RESPONSE DATA FORMAT to 2*/
+        buff[4] = 41 - 4; /* n - 4, n start from 0 */
+#if 0
+        buff[6] = 0x80;     /* basic queuing*/
+        buff[7] = 0;
+#else
+        buff[6] = 0x0;     /* tagged queuing*/
+        buff[7] = 2;
+#endif
+        memcpy(temp, pDriveData->identifyInfo.model, 24);
+        mvAta2HostString((MV_U16 *)temp, (MV_U16 *)(temp), 12);
+        {
+            MV_U32 i;
+            for (i = 0; i < 9; i++)
+            {
+                if (temp[i] == ' ')
+                {
+                    break;
+                }
+            }
+            if (i == 9)
+            {
+                if (((temp[0] == 'I') && (temp[1] == 'C')) ||
+                    ((temp[0] == 'H') && (temp[1] == 'T')) ||
+                    ((temp[0] == 'H') && (temp[1] == 'D')) ||
+                    ((temp[0] == 'D') && (temp[1] == 'K')))
+                { /*Hitachi*/
+                    Vendor[0] = 'H';
+                    Vendor[1] = 'i';
+                    Vendor[2] = 't';
+                    Vendor[3] = 'a';
+                    Vendor[4] = 'c';
+                    Vendor[5] = 'h';
+                    Vendor[6] = 'i';
+                    Vendor[7] = ' ';
+                    Vendor[8] = '\0';
+                }
+                else if ((temp[0] == 'S') && (temp[1] == 'T'))
+                {
+                    /*Seagate*/
+                    Vendor[0] = 'S';
+                    Vendor[1] = 'e';
+                    Vendor[2] = 'a';
+                    Vendor[3] = 'g';
+                    Vendor[4] = 'a';
+                    Vendor[5] = 't';
+                    Vendor[6] = 'e';
+                    Vendor[7] = ' ';
+                    Vendor[8] = '\0';
+                }
+                else
+                {
+                    /*Unkown*/
+                    Vendor[0] = 'A';
+                    Vendor[1] = 'T';
+                    Vendor[2] = 'A';
+                    Vendor[3] = ' ';
+                    Vendor[4] = ' ';
+                    Vendor[5] = ' ';
+                    Vendor[6] = ' ';
+                    Vendor[7] = ' ';
+                    Vendor[8] = '\0';
+                }
+                memcpy(Product, temp, 16);
+                Product[16] = '\0';
+            }
+            else
+            {
+                MV_U32 j = i;
+                memcpy(Vendor, temp, j);
+                for (; j < 9; j++)
+                {
+                    Vendor[j] = ' ';
+                }
+                Vendor[8] = '\0';
+                for (; i < 24; i++)
+                {
+                    if (temp[i] != ' ')
+                    {
+                        break;
+                    }
+                }
+                memcpy(Product, &temp[i], 24 - i);
+                Product[16] = '\0';
+            }
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " Vendor %s Product %s\n", Vendor, Product);
+            memcpy(&buff[8], Vendor, 8);
+            memcpy(&buff[16], Product, 16);
+            memcpy(&buff[32], pDriveData->identifyInfo.firmware, 4);
+            mvAta2HostString((MV_U16 *)(&buff[32]), (MV_U16 *)(&buff[32]), 2);
+        }
+        memcpy(&buff[36], "MVSATA", 6);
+
+        /*buff[32] = '3';*/
+
+        inquiryLen = 42;
+    }
+    if (pScb->dataBufferLength > inquiryLen)
+    {
+        memcpy(pScb->pDataBuffer, buff, inquiryLen);
+        pScb->dataTransfered = inquiryLen;
+    }
+    else
+    {
+        memcpy(pScb->pDataBuffer, buff, pScb->dataBufferLength);
+        pScb->dataTransfered = pScb->dataBufferLength;
+    }
+    pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_SUCCESS;
+    pScb->ScsiStatus = MV_SCSI_STATUS_GOOD;
+    pScb->senseDataLength = 0;
+#ifdef MV_LOGGER
+    reportScbCompletion(pSataAdapter, pScb);
+#endif
+    pScb->completionCallBack(pSataAdapter, pScb);
+    return MV_SCSI_COMMAND_STATUS_COMPLETED;
+}
+
+static MV_SCSI_COMMAND_STATUS_TYPE  mvScsiAtaTestUnitReady(IN  MV_SATA_ADAPTER*    pSataAdapter,
+                                                           IN  MV_SATA_SCSI_CMD_BLOCK  *pScb)
+{
+    pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_SUCCESS;
+    pScb->ScsiStatus = MV_SCSI_STATUS_GOOD;
+    pScb->senseDataLength = 0;
+    pScb->dataTransfered = 0;
+
+#ifdef MV_LOGGER
+    reportScbCompletion(pSataAdapter, pScb);
+#endif
+    pScb->completionCallBack(pSataAdapter, pScb);
+    return MV_SCSI_COMMAND_STATUS_COMPLETED;
+}
+
+
+static MV_SCSI_COMMAND_STATUS_TYPE  mvScsiAtaSendDataCommand(IN  MV_SATA_ADAPTER*    pSataAdapter,
+                                                             IN  MV_SATA_SCSI_CMD_BLOCK  *pScb)
+{
+    MV_U8           *cmd = pScb->ScsiCdb;
+    MV_QUEUE_COMMAND_RESULT    result;
+    MV_SATA_SCSI_DRIVE_DATA *pDriveData = &pScb->pSalAdapterExtension->ataDriveData[pScb->bus][pScb->target];
+    MV_SAL_ADAPTER_EXTENSION *pAdapterExt = pScb->pSalAdapterExtension;
+    MV_U32                  sectors;
+    MV_U64		    LBA;
+#ifdef MV_SATA_STORE_COMMANDS_INFO_ON_IAL_STACK
+    MV_QUEUE_COMMAND_INFO *pCommandInfo = pScb->pCommandInfo;
+    MV_UDMA_COMMAND_PARAMS  *pUdmaParams = &pCommandInfo->commandParams.udmaCommand;
+    pCommandInfo->type = MV_QUEUED_COMMAND_TYPE_UDMA;
+    pCommandInfo->PMPort = pScb->target;
+    pUdmaParams->readWrite = MV_UDMA_TYPE_WRITE;
+    pUdmaParams->isEXT = MV_FALSE;
+    pUdmaParams->FUA = MV_FALSE;
+    pUdmaParams->highLBAAddress = 0;
+    pUdmaParams->callBack = SALCommandCompletionCB;
+    pUdmaParams->commandId = (MV_VOID_PTR )pScb;
+#ifdef MV_SATA_SUPPORT_EDMA_SINGLE_DATA_REGION
+    pUdmaParams->singleDataRegion = pScb->singleDataRegion;
+    pUdmaParams->byteCount = pScb->byteCount;
+#endif
+#else    
+    MV_QUEUE_COMMAND_INFO commandInfo =
+    {
+        MV_QUEUED_COMMAND_TYPE_UDMA,
+        pScb->target,
+        {
+            {
+                MV_UDMA_TYPE_WRITE, MV_FALSE, MV_FALSE, 0, 0, 0, 0, 0,
+#ifdef MV_SATA_SUPPORT_EDMA_SINGLE_DATA_REGION
+                pScb->singleDataRegion,
+                pScb->byteCount,
+#endif
+                SALCommandCompletionCB, (MV_VOID_PTR )pScb
+            }
+        }
+    };
+    MV_QUEUE_COMMAND_INFO *pCommandInfo = &commandInfo;
+    MV_UDMA_COMMAND_PARAMS  *pUdmaParams = &pCommandInfo->commandParams.udmaCommand;
+#endif
+
+    if ((cmd[0] == SCSI_OPCODE_READ6) || (cmd[0] == SCSI_OPCODE_WRITE6))
+    {
+        pUdmaParams->lowLBAAddress =
+        ( (MV_U32)  cmd[3]) |
+        (((MV_U32)  cmd[2]) << 8) |
+        ((((MV_U32) cmd[1]) & 0x1f) << 16);
+        sectors = (MV_U16) cmd[4];
+    }
+    else if ((cmd[0] == SCSI_OPCODE_READ10) || (cmd[0] == SCSI_OPCODE_WRITE10))
+    {
+        pUdmaParams->lowLBAAddress =
+        (((MV_U32) cmd[5]) << 0) |
+        (((MV_U32) cmd[4]) << 8) |
+        (((MV_U32) cmd[3]) << 16) |
+        (((MV_U32) cmd[2]) << 24);
+
+        sectors = ((MV_U16) cmd[8]) |
+		(((MV_U16) cmd[7]) << 8);
+        if (cmd[1] & MV_BIT3)
+        {
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "%d %d: READ10/WRITE10 command "
+                     "received with FUA\n",
+                     pSataAdapter->adapterId, pScb->bus);
+            pUdmaParams->FUA = MV_TRUE;
+        }
+    }
+    else
+    {
+        pUdmaParams->lowLBAAddress =
+        (((MV_U32) cmd[9]) << 0) |
+        (((MV_U32) cmd[8]) << 8) |
+        (((MV_U32) cmd[7]) << 16) |
+        (((MV_U32) cmd[6]) << 24);
+
+        pUdmaParams->highLBAAddress =
+        (((MV_U32) cmd[5]) << 0) |
+        (((MV_U32) cmd[4]) << 8) |
+        (((MV_U32) cmd[3]) << 16) |
+        (((MV_U32) cmd[2]) << 24);
+
+        sectors = (cmd[13]) |
+		  (cmd[12] << 8) |
+		  (cmd[11] << 16) |
+		  (cmd[10] << 24);
+
+        if (cmd[1] & MV_BIT3)
+        {
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "%d %d: READ16/WRITE16 command "
+                     "received with FUA\n",
+                     pSataAdapter->adapterId, pScb->bus);
+            pUdmaParams->FUA = MV_TRUE;
+        }
+    }
+    LBA = ((MV_U64)pUdmaParams->highLBAAddress << 32) | (MV_U64)pUdmaParams->lowLBAAddress;
+    pScb->isExtended = pUdmaParams->isEXT = pDriveData->identifyInfo.LBA48Supported;
+
+    /* If READ10 / WRITE10 with 0 sectors (no data transfer), then complete */
+    /* the command with OK.                                                 */
+    /* If READ6 / WRITE6 with 0 sectors, seemse the Windows have problem with */
+    /* this and doesn't allocate and buffers for this ; so complete this    */
+    /* command with ILLEGAL REQUEST sense and INVLAID CDB in addition sense */
+    /* code.                                                                */
+
+    if (sectors == 0)
+    {
+        if ((cmd[0] == SCSI_OPCODE_READ10) || (cmd[0] == SCSI_OPCODE_WRITE10) || 
+	    (cmd[0] == SCSI_OPCODE_READ16) || (cmd[0] == SCSI_OPCODE_WRITE16))
+        {
+
+            if (checkLBAOutOfRange(pSataAdapter, pScb,
+                                   pDriveData->identifyInfo.ATADiskSize,
+                                   LBA, 0) == MV_TRUE)
+            {
+                return MV_SCSI_COMMAND_STATUS_COMPLETED;
+            }
+            pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_SUCCESS;
+            pScb->ScsiStatus = MV_SCSI_STATUS_GOOD;
+            pScb->dataTransfered = 0;
+            pScb->senseDataLength = 0;
+#ifdef MV_LOGGER
+            reportScbCompletion(pSataAdapter, pScb);
+#endif
+            pScb->completionCallBack(pSataAdapter, pScb);
+            return MV_SCSI_COMMAND_STATUS_COMPLETED;
+        }
+        else
+        {
+            /* READ6 / WRITE6 with sector count 0, which means 256 sectors */
+            sectors = 256;
+        }
+    }
+    if (checkLBAOutOfRange(pSataAdapter, pScb,
+                           pDriveData->identifyInfo.ATADiskSize,
+                           LBA, sectors) == MV_TRUE)
+    {
+        return MV_SCSI_COMMAND_STATUS_COMPLETED;
+    }
+
+    /* If trying to send more than 256 sectors or DataTransferLength field is
+     * not equal to number of sectors request in CDB then return invalid
+     * request.
+     */
+
+    if (((sectors > 256) && (pUdmaParams->isEXT == MV_FALSE)) ||
+        ((sectors * ATA_SECTOR_SIZE) != pScb->dataBufferLength))
+    {
+        pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_BAD_SCB;
+        pScb->dataTransfered = 0;
+        pScb->senseDataLength = 0;
+#ifdef MV_LOGGER
+        reportScbCompletion(pSataAdapter, pScb);
+#endif
+        pScb->completionCallBack(pSataAdapter, pScb);
+        return MV_SCSI_COMMAND_STATUS_COMPLETED;
+    }
+
+    if ((cmd[0] == SCSI_OPCODE_READ6) || (cmd[0] == SCSI_OPCODE_READ10) || 
+	(cmd[0] == SCSI_OPCODE_READ16))
+    {
+        pUdmaParams->readWrite = MV_UDMA_TYPE_READ;
+    }
+    pScb->dataTransfered = sectors * ATA_SECTOR_SIZE;
+    pScb->udmaType = pUdmaParams->readWrite;
+    pScb->commandType = MV_QUEUED_COMMAND_TYPE_UDMA;
+    pScb->LowLbaAddress = pUdmaParams->lowLBAAddress;
+    pUdmaParams->numOfSectors = sectors;
+
+    if ((sectors == 256) &&
+        ((pDriveData->identifyInfo.LBA48Supported == MV_FALSE)))
+    {
+        pUdmaParams->numOfSectors = 0;
+    }
+    pUdmaParams->prdLowAddr = pScb->PRDTableLowPhyAddress;
+    pUdmaParams->prdHighAddr = pScb->PRDTableHighPhyAddress;
+
+    result = mvSataQueueCommand(pSataAdapter, pScb->bus, pCommandInfo);
+    if (result != MV_QUEUE_COMMAND_RESULT_OK)
+    {
+        checkQueueCommandResult(pScb, result);
+#ifdef MV_LOGGER
+        reportScbCompletion(pSataAdapter, pScb);
+#endif
+        pScb->completionCallBack(pSataAdapter, pScb);
+        return MV_SCSI_COMMAND_STATUS_COMPLETED;
+    }
+
+    /*update statistics*/
+
+    pAdapterExt->totalAccumulatedOutstanding[pScb->bus] +=
+    mvSataNumOfDmaCommands(pSataAdapter,pScb->bus);
+    pDriveData->stats.totalIOs++;
+    pDriveData->stats.totalSectorsTransferred += pUdmaParams->numOfSectors;
+
+    return MV_SCSI_COMMAND_STATUS_QUEUED;
+}
+
+/*******************************************************************************
+* mvScsiAtaGetReadCapacityData - Get the SCSI-3 Read Capacity (10h/16h) data
+*
+* DESCRIPTION: This function fills the data buffer with Scsi Read Capacity 10 or
+*       Read Capacity 16 data according to the disk size as it is reported in
+*       the ATA Identify data.
+*
+* INPUT:
+*   pSataAdapter    - pointer to the SATA adapter data structure.
+*   pScb->bus    - the index of the specific SATA channel.
+*
+* OUTPUT:
+* RETURN:
+*   MV_TRUE on success, MV_FALSE on failure.
+*
+* COMMENTS:
+*   No sanity check is done for the parameters.
+*
+*******************************************************************************/
+static MV_SCSI_COMMAND_STATUS_TYPE  mvScsiAtaGetReadCapacityData(IN MV_SATA_ADAPTER*    pSataAdapter,
+                                                                 IN    MV_SATA_SCSI_CMD_BLOCK  *pScb)
+{
+    MV_U32  lastAddressableLBA;
+    MV_U8   *buff;
+    MV_SATA_SCSI_DRIVE_DATA *pDriveData = &pScb->pSalAdapterExtension->ataDriveData[pScb->bus][pScb->target];
+
+    if ((pScb->ScsiCdb[8] & MV_BIT1) == 0)
+    {
+        if (pScb->ScsiCdb[2] || pScb->ScsiCdb[3] ||pScb->ScsiCdb[4] ||
+            pScb->ScsiCdb[5])
+        {
+
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " %d %d: Inquiry completed with error: PMI = 0, LBA != 0\n",
+                     pSataAdapter->adapterId, pScb->bus);
+            setSenseData(pScb, SCSI_SENSE_ILLEGAL_REQUEST,
+                         SCSI_ADSENSE_INVALID_CDB, 0);
+            pScb->ScsiStatus = MV_SCSI_STATUS_CHECK_CONDITION;
+            pScb->dataTransfered = 0;
+            pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_BAD_SCSI_COMMAND;
+#ifdef MV_LOGGER
+            reportScbCompletion(pSataAdapter, pScb);
+#endif
+            pScb->completionCallBack(pSataAdapter, pScb);
+            return MV_SCSI_COMMAND_STATUS_COMPLETED;
+        }
+    }
+    if((pDriveData->identifyInfo.ATADiskSize >> 32) & 0xFFFFFFFF)
+    {
+	    lastAddressableLBA = 0xFFFFFFFF;
+    }
+    else
+    {
+	    lastAddressableLBA = pDriveData->identifyInfo.ATADiskSize - 1;
+    }
+    mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "MVSATA: last Addressable sector = 0x%x "
+             " (sec size=%d bytes)\n", lastAddressableLBA, ATA_SECTOR_SIZE);
+
+    /* The disk size as indicated by the ATA spec is the total addressable
+     * secotrs on the drive ; while the SCSI translation of the command
+     * should be the last addressable sector.
+     */
+    buff = pScb->pDataBuffer;
+    memset(buff, 0, pScb->dataBufferLength);
+    buff[0] = (MV_U8)(lastAddressableLBA >> 24);
+    buff[1] = (MV_U8)((lastAddressableLBA >> 16) & 0xff);
+    buff[2] = (MV_U8)((lastAddressableLBA >> 8) & 0xff);
+    buff[3] = (MV_U8)(lastAddressableLBA & 0xff);
+    buff[4] = 0;
+    buff[5] = 0;
+    buff[6] = (MV_U8)((ATA_SECTOR_SIZE >> 8) & 0xff);           /* 512 byte sectors */
+    buff[7] = (MV_U8)(ATA_SECTOR_SIZE & 0xff);
+    pScb->dataTransfered = 8;
+    pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_SUCCESS;
+    pScb->ScsiStatus = MV_SCSI_STATUS_GOOD;
+    pScb->senseDataLength = 0;
+#ifdef MV_LOGGER
+    reportScbCompletion(pSataAdapter, pScb);
+#endif
+    pScb->completionCallBack(pSataAdapter, pScb);
+    return MV_SCSI_COMMAND_STATUS_COMPLETED;
+}
+
+/*******************************************************************************
+* mvScsiAtaGetReadCapacity16Data - Get the SCSI-3 Read Capacity (16h) data
+*
+* DESCRIPTION: This function fills the data buffer with Scsi Read Capacity 16
+* data according to the disk size as it is reported in
+*       the ATA Identify data.
+*
+* INPUT:
+*   pSataAdapter    - pointer to the SATA adapter data structure.
+*   pScb->bus    - the index of the specific SATA channel.
+*
+* OUTPUT:
+* RETURN:
+*   MV_TRUE on success, MV_FALSE on failure.
+*
+* COMMENTS:
+*   No sanity check is done for the parameters.
+*
+*******************************************************************************/
+static MV_SCSI_COMMAND_STATUS_TYPE  mvScsiAtaGetReadCapacity16Data(IN MV_SATA_ADAPTER*    pSataAdapter,
+                                                                 IN    MV_SATA_SCSI_CMD_BLOCK  *pScb)
+{
+    MV_U64  lastAddressableLBA;
+    MV_U8   *buff;
+    MV_SATA_SCSI_DRIVE_DATA *pDriveData = &pScb->pSalAdapterExtension->ataDriveData[pScb->bus][pScb->target];
+
+    if ((pScb->ScsiCdb[14] & MV_BIT1) == 0)
+    {
+        if (pScb->ScsiCdb[2] || pScb->ScsiCdb[3] ||pScb->ScsiCdb[4] ||
+            pScb->ScsiCdb[5] || pScb->ScsiCdb[6] ||pScb->ScsiCdb[7] ||
+	    pScb->ScsiCdb[8] || pScb->ScsiCdb[9])
+        {
+
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " %d %d: Read Capacity completed with error: PMI = 0, LBA != 0\n",
+                     pSataAdapter->adapterId, pScb->bus);
+            setSenseData(pScb, SCSI_SENSE_ILLEGAL_REQUEST,
+                         SCSI_ADSENSE_INVALID_CDB, 0);
+            pScb->ScsiStatus = MV_SCSI_STATUS_CHECK_CONDITION;
+            pScb->dataTransfered = 0;
+            pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_BAD_SCSI_COMMAND;
+#ifdef MV_LOGGER
+            reportScbCompletion(pSataAdapter, pScb);
+#endif
+            pScb->completionCallBack(pSataAdapter, pScb);
+            return MV_SCSI_COMMAND_STATUS_COMPLETED;
+        }
+    }
+
+    lastAddressableLBA = pDriveData->identifyInfo.ATADiskSize - 1;
+    mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "MVSATA: last Addressable sector = 0x%x "
+             " (sec size=%d bytes)\n", lastAddressableLBA, ATA_SECTOR_SIZE);
+
+    /* The disk size as indicated by the ATA spec is the total addressable
+     * secotrs on the drive ; while the SCSI translation of the command
+     * should be the last addressable sector.
+     */
+    buff = pScb->pDataBuffer;
+    memset(buff, 0, pScb->dataBufferLength);
+    buff[0] = (MV_U8)((lastAddressableLBA >> 56) & 0xff);
+    buff[1] = (MV_U8)((lastAddressableLBA >> 48) & 0xff);
+    buff[2] = (MV_U8)((lastAddressableLBA >> 40) & 0xff);
+    buff[3] = (MV_U8)((lastAddressableLBA >> 32) & 0xff);
+    buff[4] = (MV_U8)((lastAddressableLBA >> 24) & 0xff);
+    buff[5] = (MV_U8)((lastAddressableLBA >> 16) & 0xff);
+    buff[6] = (MV_U8)((lastAddressableLBA >> 8) & 0xff);
+    buff[7] = (MV_U8)(lastAddressableLBA & 0xff);
+    buff[8] = 0;
+    buff[9] = 0;
+    buff[10] = (MV_U8)((ATA_SECTOR_SIZE >> 8) & 0xff);           /* 512 byte sectors */
+    buff[11] = (MV_U8)(ATA_SECTOR_SIZE & 0xff);
+    pScb->dataTransfered = 8;
+    pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_SUCCESS;
+    pScb->ScsiStatus = MV_SCSI_STATUS_GOOD;
+    pScb->senseDataLength = 0;
+#ifdef MV_LOGGER
+    reportScbCompletion(pSataAdapter, pScb);
+#endif
+    pScb->completionCallBack(pSataAdapter, pScb);
+    return MV_SCSI_COMMAND_STATUS_COMPLETED;
+}
+
+
+/*******************************************************************************
+* mvScsiAtaReportLuns - handle the SCSI-3 Report LUNS
+*
+* DESCRIPTION: Report 1 LUN
+*
+* INPUT:
+*   pSataAdapter    - pointer to the SATA adapter data structure.
+*   pScb->bus    - the index of the specific SATA channel.
+*
+* OUTPUT:
+* RETURN:
+*   MV_TRUE on success, MV_FALSE on failure.
+*
+* COMMENTS:
+*   No sanity check is done for the parameters.
+*
+*******************************************************************************/
+static MV_SCSI_COMMAND_STATUS_TYPE  mvScsiAtaReportLuns(IN MV_SATA_ADAPTER*    pSataAdapter,
+							IN    MV_SATA_SCSI_CMD_BLOCK  *pScb)
+{
+	MV_U8   *buff;
+
+
+    buff = pScb->pDataBuffer;
+    memset(buff, 0, pScb->dataBufferLength);
+    buff[3] = 8; /* 1 lun*/
+    pScb->dataTransfered = 16;
+    pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_SUCCESS;
+    pScb->ScsiStatus = MV_SCSI_STATUS_GOOD;
+    pScb->senseDataLength = 0;
+#ifdef MV_LOGGER
+    reportScbCompletion(pSataAdapter, pScb);
+#endif
+    pScb->completionCallBack(pSataAdapter, pScb);
+    return MV_SCSI_COMMAND_STATUS_COMPLETED;
+}
+
+static MV_SCSI_COMMAND_STATUS_TYPE  mvScsiAtaSendVerifyCommand(IN MV_SATA_ADAPTER*    pSataAdapter,
+                                                               IN MV_SATA_SCSI_CMD_BLOCK  *pScb)
+{
+#ifdef MV_SATA_STORE_COMMANDS_INFO_ON_IAL_STACK
+    MV_QUEUE_COMMAND_INFO   *pCommandInfo = pScb->pCommandInfo;
+#else
+    MV_QUEUE_COMMAND_INFO   commandInfo;
+    MV_QUEUE_COMMAND_INFO   *pCommandInfo = &commandInfo;
+#endif
+    MV_QUEUE_COMMAND_RESULT result;
+    MV_U8                   *cmd = pScb->ScsiCdb;
+    MV_U64                   LbaAddress;
+    MV_U32                  sectors;
+    MV_U16                  commands;
+    MV_SATA_SCSI_DRIVE_DATA *pDriveData = &pScb->pSalAdapterExtension->ataDriveData[pScb->bus][pScb->target];
+    MV_SAL_ADAPTER_EXTENSION *pAdapterExt = pScb->pSalAdapterExtension;
+
+    if (cmd[0] == SCSI_OPCODE_VERIFY6)
+    {
+	    LbaAddress =
+		    ( (unsigned)  cmd[3]) |
+		    (((unsigned)  cmd[2]) << 8) |
+		    ((((unsigned) cmd[1]) & 0x1f) << 16);
+	    sectors = (unsigned) cmd[4];
+    }
+    else if (cmd[0] == SCSI_OPCODE_VERIFY10)
+    {
+	    LbaAddress =
+		    (((unsigned) cmd[5]) << 0) |
+		    (((unsigned) cmd[4]) << 8) |
+		    (((unsigned) cmd[3]) << 16) |
+		    (((unsigned) cmd[2]) << 24);
+	    
+	    
+	    sectors = ((unsigned) cmd[8]) |
+		    (((unsigned) cmd[7]) << 8);
+    }
+    else
+    {
+	    LbaAddress =
+		    (((MV_U64) cmd[9]) << 0) |
+		    (((MV_U64) cmd[8]) << 8) |
+		    (((MV_U64) cmd[7]) << 16) |
+		    (((MV_U64) cmd[6]) << 24) |
+		    (((MV_U64) cmd[5]) << 32) |
+		    (((MV_U64) cmd[4]) << 40) |
+		    (((MV_U64) cmd[3]) << 48) |
+		    (((MV_U64) cmd[2]) << 56);
+
+
+	    sectors = 
+		    ((unsigned) cmd[13]) |
+		    (((unsigned) cmd[12]) << 8) |
+		    (((unsigned) cmd[11]) << 16) |
+		    (((unsigned) cmd[10]) << 24);
+    }
+
+    if (sectors == 0)
+    {
+        if ((cmd[0] == SCSI_OPCODE_VERIFY10) || (cmd[0] == SCSI_OPCODE_VERIFY16))
+        {
+            if (checkLBAOutOfRange(pSataAdapter, pScb,
+                                   pDriveData->identifyInfo.ATADiskSize,
+                                   LbaAddress, 0) == MV_TRUE)
+            {
+                return MV_SCSI_COMMAND_STATUS_COMPLETED;
+            }
+            pScb->ScsiStatus = MV_SCSI_STATUS_GOOD;
+            pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_SUCCESS;
+            pScb->senseDataLength = 0;
+            pScb->dataTransfered = 0;
+#ifdef MV_LOGGER
+            reportScbCompletion(pSataAdapter, pScb);
+#endif
+            pScb->completionCallBack(pSataAdapter, pScb);
+            return MV_SCSI_COMMAND_STATUS_COMPLETED;
+        }
+        else
+        {
+            /* If VERIFY6 to 48bit device, then 256 sectors is OK ; otherwise
+            the CORE driver must get sector count of 0 in order to understand that
+            256 sectors must be transferred
+            */
+
+            if (pDriveData->identifyInfo.LBA48Supported == MV_TRUE)
+            {
+                sectors = 256;
+            }
+            else
+            {
+                sectors = 0;
+            }
+        }
+        if (checkLBAOutOfRange(pSataAdapter, pScb,
+                               pDriveData->identifyInfo.ATADiskSize,
+                               LbaAddress, 256) == MV_TRUE)
+        {
+            return MV_SCSI_COMMAND_STATUS_COMPLETED;
+        }
+    }
+    else
+    {
+        if (checkLBAOutOfRange(pSataAdapter, pScb,
+                               pDriveData->identifyInfo.ATADiskSize,
+                               LbaAddress, sectors) == MV_TRUE)
+        {
+            return MV_SCSI_COMMAND_STATUS_COMPLETED;
+        }
+    }
+
+    pScb->commandType = MV_QUEUED_COMMAND_TYPE_NONE_UDMA;
+    pScb->LowLbaAddress = (MV_U32)(LbaAddress & 0xFFFFFFFF);
+//    pScb->highLbaAddress = (MV_U32)(LbaAddress >> 32);
+
+    if (pDriveData->identifyInfo.LBA48Supported == MV_TRUE)
+    {
+        pScb->splitCount = 1;
+        pScb->isExtended = MV_TRUE;
+        pCommandInfo->type = MV_QUEUED_COMMAND_TYPE_NONE_UDMA;
+        pCommandInfo->PMPort = pScb->target;
+        pCommandInfo->commandParams.NoneUdmaCommand.bufPtr = NULL;
+        pCommandInfo->commandParams.NoneUdmaCommand.callBack = SALCommandCompletionCB;
+        pCommandInfo->commandParams.NoneUdmaCommand.command = MV_ATA_COMMAND_READ_VERIFY_SECTORS_EXT;
+        pCommandInfo->commandParams.NoneUdmaCommand.commandId = (MV_VOID_PTR) pScb;
+        pCommandInfo->commandParams.NoneUdmaCommand.count = 0;
+        pCommandInfo->commandParams.NoneUdmaCommand.features = 0;
+        pCommandInfo->commandParams.NoneUdmaCommand.isEXT = MV_TRUE;
+        pCommandInfo->commandParams.NoneUdmaCommand.lbaHigh = 
+	(MV_U16)(((LbaAddress & 0xff0000000000ULL) >> 40) | ((LbaAddress & 0xff0000) >> 16));
+        pCommandInfo->commandParams.NoneUdmaCommand.lbaMid = 
+        (MV_U16)(((LbaAddress & 0xff00000000ULL) >> 32) | ((LbaAddress & 0xff00) >> 8));
+        pCommandInfo->commandParams.NoneUdmaCommand.lbaLow =
+        (MV_U16)(((LbaAddress & 0xff000000) >> 24) | (LbaAddress & 0xff));
+        pCommandInfo->commandParams.NoneUdmaCommand.protocolType = MV_NON_UDMA_PROTOCOL_NON_DATA;
+        pCommandInfo->commandParams.NoneUdmaCommand.sectorCount = sectors;
+        pCommandInfo->commandParams.NoneUdmaCommand.device = (MV_U8)(MV_BIT6);
+
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "Sending EXT Verify command: channel %d, code %x lba %x(%x.%x.%x), sectors %d[%d] Srb %p\n",
+                 pScb->bus, cmd[0], LbaAddress,
+                 pCommandInfo->commandParams.NoneUdmaCommand.lbaHigh,
+                 pCommandInfo->commandParams.NoneUdmaCommand.lbaMid,
+                 pCommandInfo->commandParams.NoneUdmaCommand.lbaLow,
+                 pCommandInfo->commandParams.NoneUdmaCommand.sectorCount,
+                 mvSataNumOfDmaCommands(pSataAdapter,pScb->bus), pScb);
+
+        result = mvSataQueueCommand(pSataAdapter, pScb->bus, pCommandInfo);
+
+        if (result != MV_QUEUE_COMMAND_RESULT_OK)
+        {
+            checkQueueCommandResult(pScb, result);
+#ifdef MV_LOGGER
+            reportScbCompletion(pSataAdapter, pScb);
+#endif
+            pScb->completionCallBack(pSataAdapter, pScb);
+            return MV_SCSI_COMMAND_STATUS_COMPLETED;
+        }
+        /* update stats*/
+        pAdapterExt->totalAccumulatedOutstanding[pScb->bus] +=
+        mvSataNumOfDmaCommands(pSataAdapter,pScb->bus);
+        pDriveData->stats.totalIOs++;
+        pDriveData->stats.totalSectorsTransferred += sectors;
+
+    }
+    else
+    {
+        /* The following only in case command is VERIFY 6 with 0 sector count */
+        if (sectors == 0)
+        {
+            commands = 1;
+        }
+        else
+        {
+            commands = (MV_U16)((((MV_U32)sectors + 0xff) & 0x1ff00) >> 8);
+        }
+
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "split Verify to %d commands: channel %d, lba %x, sectors %d\n",
+                 commands,pScb->bus, LbaAddress, sectors);
+
+        pScb->splitCount = commands;
+        pScb->sequenceNumber = 0;
+        pScb->isExtended = MV_FALSE;
+        mvScsiAtaSendSplittedVerifyCommand(pScb);
+    }
+    return MV_SCSI_COMMAND_STATUS_QUEUED;
+}
+
+static MV_SCSI_COMMAND_STATUS_TYPE  mvScsiAtaSeek(IN MV_SATA_ADAPTER    *pSataAdapter,
+                                                  IN  MV_SATA_SCSI_CMD_BLOCK  *pScb)
+{
+    MV_U32 lbaAddress;
+    MV_SATA_SCSI_DRIVE_DATA *pDriveData = &pScb->pSalAdapterExtension->ataDriveData[pScb->bus][pScb->target];
+
+    lbaAddress = (((MV_U32) pScb->ScsiCdb[5]) << 0) |
+                 (((MV_U32) pScb->ScsiCdb[4]) << 8) |
+                 (((MV_U32) pScb->ScsiCdb[3]) << 16) |
+                 (((MV_U32) pScb->ScsiCdb[2]) << 24);
+    if (checkLBAOutOfRange(pSataAdapter, pScb,
+                           pDriveData->identifyInfo.ATADiskSize,
+                           lbaAddress, 0) == MV_TRUE)
+    {
+        return MV_SCSI_COMMAND_STATUS_COMPLETED;
+    }
+    pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_SUCCESS;
+    pScb->ScsiStatus = MV_SCSI_STATUS_GOOD;
+    pScb->dataTransfered = 0;
+    pScb->senseDataLength = 0;
+#ifdef MV_LOGGER
+    reportScbCompletion(pSataAdapter, pScb);
+#endif
+    pScb->completionCallBack(pSataAdapter, pScb);
+    return MV_SCSI_COMMAND_STATUS_COMPLETED;
+
+}
+
+static MV_SCSI_COMMAND_STATUS_TYPE  mvScsiAtaReassignBlocks(IN MV_SATA_ADAPTER    *pSataAdapter,
+                                                            IN MV_SATA_SCSI_CMD_BLOCK  *pScb)
+{
+    setSenseData(pScb, SCSI_SENSE_HARDWARE_ERROR, 0x32, 0);
+    pScb->ScsiStatus = MV_SCSI_STATUS_CHECK_CONDITION;
+    pScb->dataTransfered = 0;
+    pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_ATA_FAILED;
+#ifdef MV_LOGGER
+    reportScbCompletion(pSataAdapter, pScb);
+#endif
+    pScb->completionCallBack(pSataAdapter, pScb);
+    return MV_TRUE;
+
+}
+
+
+#ifdef MV_SATA_SUPPORT_READ_WRITE_LONG
+static MV_SCSI_COMMAND_STATUS_TYPE mvScsiAtaWriteLong(IN MV_SATA_ADAPTER    *pSataAdapter,
+                                                      IN  MV_SATA_SCSI_CMD_BLOCK  *pScb)
+{
+#ifdef MV_SATA_STORE_COMMANDS_INFO_ON_IAL_STACK
+    MV_QUEUE_COMMAND_INFO   *pCommandInfo = pScb->pCommandInfo;
+#else
+    MV_QUEUE_COMMAND_INFO   commandInfo;
+    MV_QUEUE_COMMAND_INFO   *pCommandInfo = &commandInfo;
+#endif
+    MV_QUEUE_COMMAND_RESULT result;
+    MV_U32                  LBA;
+    MV_U16                  eccBytes;
+    MV_SATA_SCSI_DRIVE_DATA *pDriveData = &pScb->pSalAdapterExtension->ataDriveData[pScb->bus][pScb->target];
+    MV_SAL_ADAPTER_EXTENSION *pAdapterExt = pScb->pSalAdapterExtension;
+
+    memset(pCommandInfo, 0, sizeof(MV_QUEUE_COMMAND_INFO));
+
+
+    LBA = (((MV_U32) pScb->ScsiCdb[5]) << 0) |
+          (((MV_U32) pScb->ScsiCdb[4]) << 8) |
+          (((MV_U32) pScb->ScsiCdb[3]) << 16) |
+          (((MV_U32) pScb->ScsiCdb[2]) << 24);
+
+    eccBytes = (MV_U16)pScb->ScsiCdb[8];
+
+    if ((pScb->ScsiCdb[7] != 2) || ((eccBytes != 4) && (eccBytes != 8)))
+    {
+        pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_BAD_SCB;
+        pScb->dataTransfered = 0;
+        pScb->senseDataLength = 0;
+#ifdef MV_LOGGER
+        reportScbCompletion(pSataAdapter, pScb);
+#endif
+        pScb->completionCallBack(pSataAdapter, pScb);
+        return MV_SCSI_COMMAND_STATUS_COMPLETED;
+    }
+    if (checkLBAOutOfRange(pSataAdapter, pScb,
+                           pDriveData->identifyInfo.ATADiskSize,
+                           LBA, 1) == MV_TRUE)
+    {
+        return MV_SCSI_COMMAND_STATUS_COMPLETED;
+    }
+
+    /*if (checkLBAOutOfRange(pSataAdapter, pScb, MV_BIT28 - 2,
+                        LBA, 1) == MV_TRUE)
+    {
+        return MV_SCSI_COMMAND_STATUS_COMPLETED;
+    }*/
+    if (LBA & (MV_BIT31|MV_BIT30|MV_BIT29|MV_BIT28))
+    {
+
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "Error LBA (0x%x) out of range.\n", LBA);
+
+        setSenseData(pScb, SCSI_SENSE_ILLEGAL_REQUEST,
+                     SCSI_ADSENSE_ILLEGAL_BLOCK, 0);
+        pScb->ScsiStatus = MV_SCSI_STATUS_CHECK_CONDITION;
+        pScb->dataTransfered = 0;
+        pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_BAD_SCSI_COMMAND;
+#ifdef MV_LOGGER
+        reportScbCompletion(pSataAdapter, pScb);
+#endif
+        pScb->completionCallBack(pSataAdapter, pScb);
+        return MV_TRUE;
+    }
+    pScb->commandType = MV_QUEUED_COMMAND_TYPE_NONE_UDMA;
+
+    pCommandInfo->type = MV_QUEUED_COMMAND_TYPE_NONE_UDMA;
+    pCommandInfo->PMPort = pScb->target;
+    pCommandInfo->commandParams.NoneUdmaCommand.bufPtr = (MV_U16_PTR)pScb->pDataBuffer;
+    pCommandInfo->commandParams.NoneUdmaCommand.isEXT = MV_FALSE;
+    pCommandInfo->commandParams.NoneUdmaCommand.callBack = SALCommandCompletionCB;
+    pCommandInfo->commandParams.NoneUdmaCommand.commandId = (MV_VOID_PTR) pScb;
+    pCommandInfo->commandParams.NoneUdmaCommand.count = 256+4;
+    pCommandInfo->commandParams.NoneUdmaCommand.features = eccBytes;
+    pCommandInfo->commandParams.NoneUdmaCommand.lbaHigh = (MV_U16)((LBA & 0xff0000) >> 16);
+    pCommandInfo->commandParams.NoneUdmaCommand.lbaMid = (MV_U16)((LBA & 0xff00) >> 8) ;
+    pCommandInfo->commandParams.NoneUdmaCommand.lbaLow = (MV_U16)LBA & 0xff;
+    pCommandInfo->commandParams.NoneUdmaCommand.protocolType = MV_NON_UDMA_PROTOCOL_PIO_DATA_OUT;
+    pCommandInfo->commandParams.NoneUdmaCommand.sectorCount = 1;
+    pCommandInfo->commandParams.NoneUdmaCommand.device = MV_BIT6 | (MV_U16)((LBA & 0xf000000) >> 24) ;
+    pScb->isExtended = MV_FALSE;
+    pCommandInfo->commandParams.NoneUdmaCommand.command = 0x32;
+
+
+    mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "Sending WRITE LONG command : channel %d, code %x pScb %p\n",
+             pScb->bus, pScb->ScsiCdb[0], pScb);
+
+    result = mvSataQueueCommand(pSataAdapter, pScb->bus, pCommandInfo);
+    if (result != MV_QUEUE_COMMAND_RESULT_OK)
+    {
+        checkQueueCommandResult(pScb, result);
+        /* shoudl complete the Scsi request here*/
+#ifdef MV_LOGGER
+        reportScbCompletion(pSataAdapter, pScb);
+#endif
+        pScb->completionCallBack(pSataAdapter, pScb);
+        return MV_SCSI_COMMAND_STATUS_COMPLETED;
+    }
+    /* update stats*/
+    pAdapterExt->totalAccumulatedOutstanding[pScb->bus] += mvSataNumOfDmaCommands(pSataAdapter,pScb->bus);
+    pDriveData->stats.totalIOs++;
+
+    return MV_SCSI_COMMAND_STATUS_QUEUED;
+}
+static MV_SCSI_COMMAND_STATUS_TYPE mvScsiAtaReadLong(IN MV_SATA_ADAPTER    *pSataAdapter,
+                                                     IN  MV_SATA_SCSI_CMD_BLOCK  *pScb)
+{
+#ifdef MV_SATA_STORE_COMMANDS_INFO_ON_IAL_STACK
+    MV_QUEUE_COMMAND_INFO   *pCommandInfo = pScb->pCommandInfo;
+#else
+    MV_QUEUE_COMMAND_INFO   commandInfo;
+    MV_QUEUE_COMMAND_INFO   *pCommandInfo = &commandInfo;
+#endif
+    MV_QUEUE_COMMAND_RESULT result;
+    MV_U32                  LBA;
+    MV_U16                  eccBytes;
+    MV_SATA_SCSI_DRIVE_DATA *pDriveData = &pScb->pSalAdapterExtension->ataDriveData[pScb->bus][pScb->target];
+    MV_SAL_ADAPTER_EXTENSION *pAdapterExt = pScb->pSalAdapterExtension;
+
+    memset(pCommandInfo, 0, sizeof(MV_QUEUE_COMMAND_INFO));
+
+
+    LBA = (((MV_U32) pScb->ScsiCdb[5]) << 0) |
+          (((MV_U32) pScb->ScsiCdb[4]) << 8) |
+          (((MV_U32) pScb->ScsiCdb[3]) << 16) |
+          (((MV_U32) pScb->ScsiCdb[2]) << 24);
+
+    eccBytes = (MV_U16)pScb->ScsiCdb[8];
+
+    if ((pScb->ScsiCdb[7] != 2) || ((eccBytes != 4) && (eccBytes != 8)))
+    {
+        pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_BAD_SCB;
+        pScb->dataTransfered = 0;
+        pScb->senseDataLength = 0;
+#ifdef MV_LOGGER
+        reportScbCompletion(pSataAdapter, pScb);
+#endif
+        pScb->completionCallBack(pSataAdapter, pScb);
+        return MV_SCSI_COMMAND_STATUS_COMPLETED;
+    }
+    if (checkLBAOutOfRange(pSataAdapter, pScb,
+                           pDriveData->identifyInfo.ATADiskSize,
+                           LBA, 1) == MV_TRUE)
+    {
+        return MV_SCSI_COMMAND_STATUS_COMPLETED;
+    }
+
+    /*if (checkLBAOutOfRange(pSataAdapter, pScb, MV_BIT28 - 2,
+                        LBA, 1) == MV_TRUE)
+    {
+        return MV_SCSI_COMMAND_STATUS_COMPLETED;
+    }*/
+    if (LBA & (MV_BIT31|MV_BIT30|MV_BIT29|MV_BIT28))
+    {
+
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "Error LBA (0x%x) out of range.\n", LBA);
+
+        setSenseData(pScb, SCSI_SENSE_ILLEGAL_REQUEST,
+                     SCSI_ADSENSE_ILLEGAL_BLOCK, 0);
+        pScb->ScsiStatus = MV_SCSI_STATUS_CHECK_CONDITION;
+        pScb->dataTransfered = 0;
+        pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_BAD_SCSI_COMMAND;
+#ifdef MV_LOGGER
+        reportScbCompletion(pSataAdapter, pScb);
+#endif
+        pScb->completionCallBack(pSataAdapter, pScb);
+        return MV_TRUE;
+    }
+    pScb->commandType = MV_QUEUED_COMMAND_TYPE_NONE_UDMA;
+
+    pCommandInfo->type = MV_QUEUED_COMMAND_TYPE_NONE_UDMA;
+    pCommandInfo->PMPort = pScb->target;
+    pCommandInfo->commandParams.NoneUdmaCommand.bufPtr = (MV_U16_PTR)pScb->pDataBuffer;
+    pCommandInfo->commandParams.NoneUdmaCommand.isEXT = MV_FALSE;
+    pCommandInfo->commandParams.NoneUdmaCommand.callBack = SALCommandCompletionCB;
+    pCommandInfo->commandParams.NoneUdmaCommand.commandId = (MV_VOID_PTR) pScb;
+    pCommandInfo->commandParams.NoneUdmaCommand.count = 256+4;
+    pCommandInfo->commandParams.NoneUdmaCommand.features = eccBytes;
+    pCommandInfo->commandParams.NoneUdmaCommand.lbaHigh = (MV_U16)((LBA & 0xff0000) >> 16);
+    pCommandInfo->commandParams.NoneUdmaCommand.lbaMid = (MV_U16)((LBA & 0xff00) >> 8) ;
+    pCommandInfo->commandParams.NoneUdmaCommand.lbaLow = (MV_U16)LBA & 0xff;
+    pCommandInfo->commandParams.NoneUdmaCommand.protocolType = MV_NON_UDMA_PROTOCOL_PIO_DATA_IN;
+    pCommandInfo->commandParams.NoneUdmaCommand.sectorCount = 1;
+    pCommandInfo->commandParams.NoneUdmaCommand.device = MV_BIT6 | (MV_U16)((LBA & 0xf000000) >> 24) ;
+    pScb->isExtended = MV_FALSE;
+    pCommandInfo->commandParams.NoneUdmaCommand.command = 0x22;
+
+
+    mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "Sending READ LONG command : channel %d, code %x pScb %p\n",
+             pScb->bus, pScb->ScsiCdb[0], pScb);
+
+    result = mvSataQueueCommand(pSataAdapter, pScb->bus, pCommandInfo);
+    if (result != MV_QUEUE_COMMAND_RESULT_OK)
+    {
+        checkQueueCommandResult(pScb, result);
+        /* shoudl complete the Scsi request here*/
+#ifdef MV_LOGGER
+        reportScbCompletion(pSataAdapter, pScb);
+#endif
+        pScb->completionCallBack(pSataAdapter, pScb);
+        return MV_SCSI_COMMAND_STATUS_COMPLETED;
+    }
+    /* update stats*/
+    pAdapterExt->totalAccumulatedOutstanding[pScb->bus] += mvSataNumOfDmaCommands(pSataAdapter,pScb->bus);
+    pDriveData->stats.totalIOs++;
+
+    return MV_SCSI_COMMAND_STATUS_QUEUED;
+}
+#endif
+static MV_SCSI_COMMAND_STATUS_TYPE  mvScsiAtaSendSyncCacheCommand(IN MV_SATA_ADAPTER    *pSataAdapter,
+                                                                      IN  MV_SATA_SCSI_CMD_BLOCK  *pScb)
+{
+#ifdef MV_SATA_STORE_COMMANDS_INFO_ON_IAL_STACK
+    MV_QUEUE_COMMAND_INFO   *pCommandInfo = pScb->pCommandInfo;
+#else
+    MV_QUEUE_COMMAND_INFO   commandInfo;
+    MV_QUEUE_COMMAND_INFO   *pCommandInfo = &commandInfo;
+#endif
+    MV_QUEUE_COMMAND_RESULT result;
+    MV_U64                  LBA;
+    MV_U32                  sectors;
+    MV_SATA_SCSI_DRIVE_DATA *pDriveData = &pScb->pSalAdapterExtension->ataDriveData[pScb->bus][pScb->target];
+    MV_SAL_ADAPTER_EXTENSION *pAdapterExt = pScb->pSalAdapterExtension;
+
+    /* Check if IMMED bit is set, if so then return ILLEGAL REQUEST */
+    if (pScb->ScsiCdb[1] & MV_BIT1)
+    {
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " %d %d: Synchronise cache completed with error:"
+                 " IMMED is set\n", pSataAdapter->adapterId,
+                 pScb->bus);
+
+        setSenseData(pScb, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ADSENSE_INVALID_CDB,
+                     0);
+        pScb->ScsiStatus = MV_SCSI_STATUS_CHECK_CONDITION;
+        pScb->dataTransfered = 0;
+        pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_BAD_SCSI_COMMAND;
+#ifdef MV_LOGGER
+        reportScbCompletion(pSataAdapter, pScb);
+#endif
+        pScb->completionCallBack(pSataAdapter, pScb);
+        return MV_SCSI_COMMAND_STATUS_COMPLETED;
+    }
+
+    memset(pCommandInfo, 0, sizeof(MV_QUEUE_COMMAND_INFO));
+
+    if(pScb->ScsiCdb[0] == SCSI_OPCODE_SYNCHRONIZE_CACHE10)
+    {
+	    LBA = (((MV_U64) pScb->ScsiCdb[5]) << 0) |
+		    (((MV_U64) pScb->ScsiCdb[4]) << 8) |
+		    (((MV_U64) pScb->ScsiCdb[3]) << 16) |
+		    (((MV_U64) pScb->ScsiCdb[2]) << 24);
+	    
+	    sectors = ((MV_U32) pScb->ScsiCdb[8]) |
+		    (((MV_U32) pScb->ScsiCdb[7]) << 8);
+    }
+    else
+    {
+	    LBA = (((MV_U64) pScb->ScsiCdb[9]) << 0) |
+		    (((MV_U64) pScb->ScsiCdb[8]) << 8) |
+		    (((MV_U64) pScb->ScsiCdb[7]) << 16) |
+		    (((MV_U64) pScb->ScsiCdb[6]) << 24) |
+		    (((MV_U64) pScb->ScsiCdb[5]) << 32) |
+		    (((MV_U64) pScb->ScsiCdb[4]) << 40) |
+		    (((MV_U64) pScb->ScsiCdb[3]) << 48) |
+		    (((MV_U64) pScb->ScsiCdb[2]) << 56);
+	    
+	    sectors = ((MV_U32) pScb->ScsiCdb[13]) |
+		    (((MV_U32) pScb->ScsiCdb[12]) << 8) |
+		    (((MV_U32) pScb->ScsiCdb[11]) << 16) |
+		    (((MV_U32) pScb->ScsiCdb[10]) << 24);
+    }
+    if (checkLBAOutOfRange(pSataAdapter, pScb,
+                           pDriveData->identifyInfo.ATADiskSize,LBA, sectors)
+        == MV_TRUE)
+    {
+        return MV_SCSI_COMMAND_STATUS_COMPLETED;
+    }
+
+    pScb->commandType = MV_QUEUED_COMMAND_TYPE_NONE_UDMA;
+
+    pCommandInfo->type = MV_QUEUED_COMMAND_TYPE_NONE_UDMA;
+    pCommandInfo->PMPort = pScb->target;
+    pCommandInfo->commandParams.NoneUdmaCommand.bufPtr = NULL;
+    pCommandInfo->commandParams.NoneUdmaCommand.callBack = SALCommandCompletionCB;
+    pCommandInfo->commandParams.NoneUdmaCommand.commandId = (MV_VOID_PTR) pScb;
+    pCommandInfo->commandParams.NoneUdmaCommand.count = 0;
+    pCommandInfo->commandParams.NoneUdmaCommand.features = 0;
+    pCommandInfo->commandParams.NoneUdmaCommand.lbaHigh = 0;
+    pCommandInfo->commandParams.NoneUdmaCommand.lbaMid = 0;
+    pCommandInfo->commandParams.NoneUdmaCommand.lbaLow = 0;
+    pCommandInfo->commandParams.NoneUdmaCommand.protocolType =
+    MV_NON_UDMA_PROTOCOL_NON_DATA;
+    pCommandInfo->commandParams.NoneUdmaCommand.sectorCount = 0;
+    pCommandInfo->commandParams.NoneUdmaCommand.device = (MV_U8)(MV_BIT6);
+
+    if (pDriveData->identifyInfo.LBA48Supported == MV_TRUE)
+    {
+        pScb->isExtended = MV_TRUE;
+        pCommandInfo->commandParams.NoneUdmaCommand.command = MV_ATA_COMMAND_FLUSH_CACHE_EXT;
+        pCommandInfo->commandParams.NoneUdmaCommand.isEXT = MV_TRUE;
+    }
+    else
+    {
+        pScb->isExtended = MV_FALSE;
+        pCommandInfo->commandParams.NoneUdmaCommand.command = MV_ATA_COMMAND_FLUSH_CACHE;
+        pCommandInfo->commandParams.NoneUdmaCommand.isEXT = MV_FALSE;
+
+    }
+    mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "Sending Flush Cache command : channel %d, code %x (extended -->"
+             " %s) pScb %p\n", pScb->bus, pScb->ScsiCdb[0],
+             (pScb->isExtended == MV_TRUE) ? "Yes":"No", pScb);
+
+    result = mvSataQueueCommand(pSataAdapter, pScb->bus, pCommandInfo);
+    if (result != MV_QUEUE_COMMAND_RESULT_OK)
+    {
+        checkQueueCommandResult(pScb, result);
+        /* shoudl complete the Scsi request here*/
+#ifdef MV_LOGGER
+        reportScbCompletion(pSataAdapter, pScb);
+#endif
+        pScb->completionCallBack(pSataAdapter, pScb);
+        return MV_SCSI_COMMAND_STATUS_COMPLETED;
+    }
+    /* update stats*/
+    pAdapterExt->totalAccumulatedOutstanding[pScb->bus] += mvSataNumOfDmaCommands(pSataAdapter,pScb->bus);
+    pDriveData->stats.totalIOs++;
+
+    return MV_SCSI_COMMAND_STATUS_QUEUED;
+}
+
+/*******************************************************************************
+* mvScsiAtaGetRequestSenseData - Get the SCSI-3 Request Sense(03h) data
+*
+* DESCRIPTION: This function fills the sense buffer with a sense key of NO SENSE
+*       and an additional sense code of NO ADDITIONAL SENSE INFORMATION.
+*
+* INPUT:
+*   pSataAdapter    - pointer to the SATA adapter data structure.
+*   pScb->bus    - the index of the specific SATA channel.
+*   Cdb             - specifies the SCSI-3 command descriptor block.
+*
+* OUTPUT:
+*   pScsiStatus     - pointer to the Scsi status to be returned.
+*   pSenseBuffer    - pointer to the Scsi sense buffer.
+*   senseBufferLength   - the size in bytes of the sense buffer.
+*   pDataTransfered - the size in bytes of the data transfered into the data
+*                     buffer(alwasy zero for this command).
+*
+* RETURN:
+*   MV_TRUE on success, MV_FALSE on failure.
+*
+* COMMENTS:
+*   No sanity check is done for the parameters.
+*
+*******************************************************************************/
+static MV_SCSI_COMMAND_STATUS_TYPE  mvScsiAtaGetRequestSenseData(IN MV_SATA_ADAPTER*    pSataAdapter,
+                                                                 IN MV_SATA_SCSI_CMD_BLOCK  *pScb)
+{
+    MV_SCSI_SENSE_DATA SenseData;
+    MV_SATA_SCSI_DRIVE_DATA *pDriveData = &pScb->pSalAdapterExtension->ataDriveData[pScb->bus][pScb->target];
+
+    memset(pScb->pDataBuffer, 0, pScb->dataBufferLength);
+
+    memset(&SenseData, 0, sizeof(MV_SCSI_SENSE_DATA));
+//    SenseData.Valid = 0;
+    SenseData.ResponseCode = MV_SCSI_RESPONSE_CODE;
+    SenseData.SenseKey = SCSI_SENSE_NO_SENSE;
+    SenseData.AdditionalSenseCode = SCSI_ADSENSE_NO_SENSE;
+    SenseData.AdditionalSenseLength = sizeof(MV_SCSI_SENSE_DATA) - 8;
+
+    pScb->senseDataLength = 0;
+    if (pDriveData->UAConditionPending == MV_TRUE)
+    {
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "Unit Attention condition is pending.\n");
+        SenseData.SenseKey = SCSI_SENSE_UNIT_ATTENTION;
+        if (pDriveData->UAEvents & MV_BIT0)
+        {
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "Report Bus Reset.\n");
+
+            SenseData.AdditionalSenseCode = SCSI_ADSENSE_BUS_RESET;
+            SenseData.AdditionalSenseCodeQualifier = 2;
+            pDriveData->UAEvents &= ~MV_BIT0;
+        }
+        else if (pDriveData->UAEvents & MV_BIT1)
+        {
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "Report Mode Parameters Changed.\n");
+            SenseData.AdditionalSenseCode = SCSI_ADSENSE_PARAMETERS_CHANGED;
+            SenseData.AdditionalSenseCodeQualifier = 1;
+            pDriveData->UAEvents &= ~MV_BIT1;
+        }
+
+        pScb->ScsiStatus = MV_SCSI_STATUS_GOOD;
+        pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_SUCCESS;
+        if (pDriveData->UAEvents == 0)
+        {
+            pDriveData->UAConditionPending = MV_FALSE;
+        }
+    }
+    else
+    {
+        pScb->ScsiStatus = MV_SCSI_STATUS_GOOD;
+        pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_SUCCESS;
+    }
+    if (pScb->dataBufferLength >= sizeof(MV_SCSI_SENSE_DATA))
+    {
+        pScb->dataTransfered = sizeof(MV_SCSI_SENSE_DATA);
+        memcpy(pScb->pDataBuffer, &SenseData, pScb->dataTransfered);
+        /*pScb->ScsiStatus = MV_SCSI_STATUS_GOOD;*/
+        /*pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_SUCCESS;*/
+    }
+    else
+    {
+        pScb->dataTransfered = pScb->dataBufferLength;
+        memcpy(pScb->pDataBuffer, &SenseData, pScb->dataTransfered);
+        pScb->ScsiStatus = MV_SCSI_STATUS_GOOD;/*TBD*/
+        pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_SUCCESS;
+    }
+#ifdef MV_LOGGER
+    reportScbCompletion(pSataAdapter, pScb);
+#endif
+    pScb->completionCallBack(pSataAdapter, pScb);
+    return MV_SCSI_COMMAND_STATUS_COMPLETED;
+}
+
+/*******************************************************************************
+* mvScsiAtaGetModeSenseData - Get the SCSI-3 Mode Sense data
+*
+* DESCRIPTION: This function issues ATA Identify command, in the command
+*       completion, the Mode Sense data will be filled according to the returned
+*       Identify Data.
+*
+* INPUT:
+*   pSataAdapter    - pointer to the SATA adapter data structure.
+*   pScb->bus    - the index of the specific SATA channel.
+*   Cdb             - specifies the SCSI-3 command descriptor block.
+*
+* RETURN:
+*   MV_TRUE on success, MV_FALSE on failure.
+*
+* COMMENTS:
+*   No sanity check is done for the parameters.
+*
+*******************************************************************************/
+static MV_SCSI_COMMAND_STATUS_TYPE  mvScsiAtaGetModeSenseData(IN MV_SATA_ADAPTER    *pSataAdapter,
+                                                              IN  MV_SATA_SCSI_CMD_BLOCK  *pScb)
+{
+#ifdef MV_SATA_STORE_COMMANDS_INFO_ON_IAL_STACK
+    MV_QUEUE_COMMAND_INFO   *pCommandInfo = pScb->pCommandInfo;
+#else
+    MV_QUEUE_COMMAND_INFO   commandInfo;
+    MV_QUEUE_COMMAND_INFO   *pCommandInfo = &commandInfo;
+#endif
+    MV_QUEUE_COMMAND_RESULT result;
+    MV_SATA_SCSI_DRIVE_DATA *pDriveData = &pScb->pSalAdapterExtension->ataDriveData[pScb->bus][pScb->target];
+
+    memset(pCommandInfo, 0, sizeof(MV_QUEUE_COMMAND_INFO));
+    pScb->commandType = MV_QUEUED_COMMAND_TYPE_NONE_UDMA;
+    pCommandInfo->type = MV_QUEUED_COMMAND_TYPE_NONE_UDMA;
+    pCommandInfo->PMPort = pScb->target;
+    pCommandInfo->commandParams.NoneUdmaCommand.bufPtr = pDriveData->identifyBuffer;
+    pCommandInfo->commandParams.NoneUdmaCommand.count = 256;         /* 512 bytes */
+    pCommandInfo->commandParams.NoneUdmaCommand.callBack = SALCommandCompletionCB;
+    pCommandInfo->commandParams.NoneUdmaCommand.command = MV_ATA_COMMAND_IDENTIFY;
+    pCommandInfo->commandParams.NoneUdmaCommand.commandId = (MV_VOID_PTR) pScb;
+    pCommandInfo->commandParams.NoneUdmaCommand.isEXT = MV_FALSE;
+    pCommandInfo->commandParams.NoneUdmaCommand.protocolType = MV_NON_UDMA_PROTOCOL_PIO_DATA_IN;
+    pCommandInfo->commandParams.NoneUdmaCommand.device = (MV_U8)(MV_BIT6);
+    mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "Sending Identify command: channel %d, Srb %p\n",
+             pScb->bus, pScb);
+
+    result = mvSataQueueCommand(pSataAdapter, pScb->bus, pCommandInfo);
+    if (result != MV_QUEUE_COMMAND_RESULT_OK)
+    {
+        checkQueueCommandResult(pScb, result);
+        /* shoudl complete the Scsi request here*/
+#ifdef MV_LOGGER
+        reportScbCompletion(pSataAdapter, pScb);
+#endif
+        pScb->completionCallBack(pSataAdapter, pScb);
+        return MV_SCSI_COMMAND_STATUS_COMPLETED;
+    }
+
+    return MV_SCSI_COMMAND_STATUS_QUEUED;
+}
+static MV_BOOLEAN  mvScsiAtaGetModeSenseDataPhase2(IN MV_SATA_ADAPTER    *pSataAdapter,
+                                                   IN  MV_SATA_SCSI_CMD_BLOCK  *pScb)
+{
+    MV_U8   AdditionalSenseCode = SCSI_ADSENSE_NO_SENSE;
+    MV_U8   *cmd = pScb->ScsiCdb;
+    MV_U8   pageCode= cmd[2] & 0x3f;
+    MV_U8   pageControl = (MV_U8)((cmd[2] & 0xc0) >> 6);
+    MV_U8   modeSenseResult[MV_MAX_MODE_SENSE_RESULT_LENGTH];
+    MV_U32  offset;
+    MV_U32  pageLength;
+    MV_BOOLEAN  commandFailed = MV_FALSE;
+
+    memset(pScb->pDataBuffer, 0, pScb->dataBufferLength);
+    memset(modeSenseResult, 0, MV_MAX_MODE_SENSE_RESULT_LENGTH);
+    mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " %d %d: Mode Sense: cmd[2] 0x%xcode 0x%x control 0x%x "
+             "allocation length %d \n", pSataAdapter->adapterId, pScb->bus,
+             cmd[2], pageCode, pageControl, (MV_U32)cmd[4]);
+
+
+    if (pageControl == 0x3)
+    {
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " %d %d: Mode Sense: save control not supported\n.",
+                 pSataAdapter->adapterId, pScb->bus);
+        AdditionalSenseCode = 0x39; /*SAVING PARAMETERS NOT SUPPORTED */
+        commandFailed = MV_TRUE;
+    }
+    if (commandFailed != MV_TRUE)
+    {
+        memset(modeSenseResult, 0, MV_MAX_MODE_SENSE_RESULT_LENGTH);
+        /*1. Mode parameter header*/
+        /* Mode data length will be set later */
+        /* Medium Type 0: Default medium type */
+        /* Device-specific parameter 0:  write enabled, target */
+        /*      supports the DPO and FUA bits only in NCQ mode*/
+        if (pSataAdapter->sataChannel[pScb->bus]->queuedDMA == MV_EDMA_MODE_NATIVE_QUEUING)
+        {
+            modeSenseResult[2] = MV_BIT4;
+        }
+
+        /* Block descriptor length 0: no block descriptors*/
+
+        /*2. Block descriptor(s): Empty list*/
+        /*3. Page(s)*/
+        offset = 4;
+
+        switch (pageCode)
+        {
+        case 0x3f:
+        case 0x8: /*Caching page */
+            pageLength = mvModeSenseCachingPage(pScb,
+                                                modeSenseResult + offset,
+                                                pageControl);
+
+            offset += pageLength;
+
+            if (pageCode == 0x8)
+            {
+                break;
+            }
+        case 0xa:
+            pageLength = mvModeSenseControlPage(pSataAdapter,pScb,
+                                                modeSenseResult + offset,
+                                                pageControl);
+
+            offset += pageLength;
+            break;
+        default:
+            AdditionalSenseCode = SCSI_ADSENSE_INVALID_CDB;
+            commandFailed = MV_TRUE;
+        }
+
+        /* set the DATA LENGTH of the Mode parameter list not including the number*/
+        /* of bytes of the DATA LENGTH itself ( 1 byte for Mode Selet(6)) */
+        modeSenseResult[0] = (MV_U8)(offset - 1);
+
+        if (pScb->dataBufferLength < offset)
+        {
+            memcpy(pScb->pDataBuffer, modeSenseResult, pScb->dataBufferLength);
+            pScb->dataTransfered = pScb->dataBufferLength;
+        }
+        else
+        {
+            memcpy(pScb->pDataBuffer, modeSenseResult, offset);
+            pScb->dataTransfered = offset;
+        }
+    }
+
+    if (commandFailed == MV_TRUE)
+    {
+        setSenseData(pScb, SCSI_SENSE_ILLEGAL_REQUEST, AdditionalSenseCode, 0);
+
+        pScb->dataTransfered = 0;
+        pScb->ScsiStatus = MV_SCSI_STATUS_CHECK_CONDITION;
+        pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_BAD_SCSI_COMMAND;
+    }
+    else
+    {
+        pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_SUCCESS;
+        pScb->ScsiStatus = MV_SCSI_STATUS_GOOD;
+    }
+    return MV_TRUE;
+}
+static MV_SCSI_COMMAND_STATUS_TYPE  mvScsiAtaModeSelect(IN MV_SATA_ADAPTER    *pSataAdapter,
+                                                        IN  MV_SATA_SCSI_CMD_BLOCK  *pScb)
+{
+    MV_U8 result;
+    MV_SCSI_COMMAND_STATUS_TYPE     commandStatus;
+    mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " MODE SELECT RECEIVED: cmd:");
+    {
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " %02x, %02x, %02x, %02x, %02x, %02x\n", pScb->ScsiCdb[0], pScb->ScsiCdb[1],
+                 pScb->ScsiCdb[2], pScb->ScsiCdb[3], pScb->ScsiCdb[4], pScb->ScsiCdb[5]);
+    }
+    result = modeSelect(pSataAdapter, pScb, &commandStatus);
+    if (result != 0x0)
+    {
+        if (result == 0x1)/*PARAMETER LIST LENGTH ERROR*/
+        {
+            setSenseData(pScb, SCSI_SENSE_ILLEGAL_REQUEST, 0x1a, 0);
+
+        }
+        else if (result == 0x2)
+        {
+            setSenseData(pScb, SCSI_SENSE_ILLEGAL_REQUEST,
+                         SCSI_ADSENSE_INVALID_CDB, 0);
+
+        }
+        else if (result == 0x3)
+        {
+            setSenseData(pScb, SCSI_SENSE_ILLEGAL_REQUEST,
+                         SCSI_ADSENSE_INVALID_FIELD_IN_PARAMETER_LIST, 0);
+
+        }
+        else
+        {
+            setSenseData(pScb, SCSI_SENSE_ILLEGAL_REQUEST,
+                         SCSI_ADSENSE_NO_SENSE, 0);
+
+        }
+
+        pScb->dataTransfered = 0;
+        pScb->ScsiStatus = MV_SCSI_STATUS_CHECK_CONDITION;
+        pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_BAD_SCSI_COMMAND;
+#ifdef MV_LOGGER
+        reportScbCompletion(pSataAdapter, pScb);
+#endif
+        pScb->completionCallBack(pSataAdapter, pScb);
+        return MV_SCSI_COMMAND_STATUS_COMPLETED;
+    }
+    return commandStatus;
+}
+
+static MV_U8
+modeSelect(IN MV_SATA_ADAPTER    *pSataAdapter,
+           IN  MV_SATA_SCSI_CMD_BLOCK  *pScb,
+           MV_SCSI_COMMAND_STATUS_TYPE *pCommandStatus)
+{
+    MV_U8   *cmd = pScb->ScsiCdb;
+    MV_VOID_PTR pBuffer = pScb->pDataBuffer;
+    MV_U32  length = pScb->dataBufferLength;
+    MV_U8   PF = (cmd[1] & MV_BIT4) >> 4;
+    MV_U8   SP = (cmd[1] & MV_BIT0);
+    MV_U8   *list = (MV_U8 *)pBuffer;
+    MV_U32  offset;
+    MV_U32  cachePageOffset = 0;
+
+    {
+        MV_U32 i;
+        for (i =0 ; i < length; i++)
+        {
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " %02x", list[i]);
+        }
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "\n");
+    }
+    if (PF == 0)
+    {
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "%d %d: Mode Select Error: PF not supported\n.",
+                 pSataAdapter->adapterId, pScb->bus);
+        return 0x2; /* Invalid field in CDB */
+    }
+    if (SP == 1)
+    {
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "%d %d: Mode Select Error: SP not supported\n.",
+                 pSataAdapter->adapterId, pScb->bus);
+        return 0x2; /* PARAMETER LIST LENGTH ERROR */
+    }
+    if (length == 0)
+    {
+        pScb->dataTransfered = 0;
+        pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_SUCCESS;
+        pScb->ScsiStatus = MV_SCSI_STATUS_GOOD;
+#ifdef MV_LOGGER
+        reportScbCompletion(pSataAdapter, pScb);
+#endif
+        pScb->completionCallBack(pSataAdapter, pScb);
+        *pCommandStatus = MV_SCSI_COMMAND_STATUS_COMPLETED;
+        return 0;
+    }
+    if (length < 4)
+    {
+        return 0x1; /* PARAMETER LIST LENGTH ERROR */
+    }
+    if (list[0] || (list[1] != MV_SCSI_DIRECT_ACCESS_DEVICE) || list[2])
+    {
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " %d %d: Mode Select Error: invalid field in parameter "
+                 "list\n", pSataAdapter->adapterId, pScb->bus);
+        return 0x3; /* Invalid field in parameter list */
+    }
+    if (list[3])
+    {
+        if (list[3] != 8)
+        {
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " %d %d: Mode Select Error: wrong size for mode parameter"
+                     " block descriptor, BLOCK DESCRIPTOR LENGTH %d\n.",
+                     pSataAdapter->adapterId, pScb->bus, list[3]);
+            return 0x3; /* Invalid field in parameter list */
+        }
+        if (length < 12)
+        {
+            return 0x1; /* PARAMETER LIST LENGTH ERROR */
+        }
+        if (list[4] || list[5] || list[6] || list[7] || list[8] || list[9] ||
+            (list[10] != 0x2) || list[11])
+        {
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " %d %d: Mode Select Error: invalid field in parameter "
+                     "block descriptor list\n", pSataAdapter->adapterId,
+                     pScb->bus);
+            return 0x3; /* Invalid field in parameter list */
+        }
+    }
+    offset = 4 + list[3];/* skip the mode parameter block descriptor */
+
+    mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " %d %d: Mode Select: PF 0x%x SP 0x%x parameter length %x "
+             "length %d(0x%x)\n offset %d", pSataAdapter->adapterId, pScb->bus,
+             PF, SP, (MV_U32)cmd[4], length, length,
+             offset);
+    if (length == offset)
+    {
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " %d %d: Mode Select : no mode pages available\n",
+                 pSataAdapter->adapterId, pScb->bus);
+        pScb->dataTransfered = 0;
+        pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_SUCCESS;
+        pScb->ScsiStatus = MV_SCSI_STATUS_GOOD;
+#ifdef MV_LOGGER
+        reportScbCompletion(pSataAdapter, pScb);
+#endif
+        pScb->completionCallBack(pSataAdapter, pScb);
+        *pCommandStatus = MV_SCSI_COMMAND_STATUS_COMPLETED;
+        return 0;
+    }
+
+    while ((offset + 2) < length)
+    {
+        switch (list[offset] & 0x3f)
+        {
+        case 0x8:
+            if (list[offset + 1] != 0x12)
+            {
+                mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " %d %d: Mode Select Error: bad length in caching mode "
+                         "page %d\n.",
+                         pSataAdapter->adapterId, pScb->bus, list[offset + 1]);
+                return 0x3; /* Invalid field in parameter list */
+            }
+            cachePageOffset = offset;
+            offset += list[offset + 1] + 2;
+            break;
+        case 0xa:
+            if ((list[offset] != 0xa) || (list[offset+1] != 0xa))
+            {
+                mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " %d %d: Mode Select Error: invalid field in"
+                         " mode control page, list[%x] %x, list[%x] %x\n",
+                         pSataAdapter->adapterId, pScb->bus, offset,
+                         list[offset], offset + 1, list[offset+1]);
+                return 0x3;
+            }
+
+            if (list[offset + 3] != MV_BIT4)
+            {
+                mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " %d %d: Mode Select Error: invalid field in"
+                         " mode control page, list[%x] %x\n",
+                         pSataAdapter->adapterId, pScb->bus, offset + 3,
+                         list[offset + 3]);
+                return 0x3;
+            }
+
+            if (list[offset + 2] || list[offset + 4] || list[offset + 5] ||
+                list[offset + 6] || list[offset + 7]||list[offset + 8] ||
+                list[offset + 9]|| list[offset + 10] || list[offset + 11])
+            {
+                mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " %d %d: Mode Select Error: invalid field in"
+                         " mode control page, line %d\n",
+                         pSataAdapter->adapterId, pScb->bus, __LINE__);
+                return 0x3;
+            }
+            offset += list[offset + 1] + 2;
+            break;
+        default:
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " %d %d: Mode Select Error: invalid field in parameter "
+                     "list, mode page %d not supported, offset %d\n",
+                     pSataAdapter->adapterId, pScb->bus, list[offset],
+                     offset);
+            return 0x3; /* Invalid field in parameter list */
+        }
+    }
+
+    if (length != offset)
+    {
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " %d %d: Mode Select Error: bad length %d\n.",
+                 pSataAdapter->adapterId, pScb->bus, length);
+        return 0x1; /* PARAMETER LIST LENGTH ERROR */
+    }
+
+    if (cachePageOffset)
+    {
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " Mode Select: caching Page found, offset %d\n", cachePageOffset);
+        return mvParseModeCachingPage(pSataAdapter, pScb,list + cachePageOffset, pCommandStatus);
+    }
+    else
+    {
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " Mode Select: No caching Page found\n");
+        pScb->dataTransfered = 0;
+        pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_SUCCESS;
+        pScb->ScsiStatus = MV_SCSI_STATUS_GOOD;
+#ifdef MV_LOGGER
+        reportScbCompletion(pSataAdapter, pScb);
+#endif
+        pScb->completionCallBack(pSataAdapter, pScb);
+        *pCommandStatus = MV_SCSI_COMMAND_STATUS_COMPLETED;
+        return 0;
+    }
+}
+
+static MV_U8
+mvParseModeCachingPage(MV_SATA_ADAPTER *pSataAdapter,
+                       IN  MV_SATA_SCSI_CMD_BLOCK  *pScb,
+                       MV_U8 *buffer,
+                       MV_SCSI_COMMAND_STATUS_TYPE *pCommandStatus)
+{
+#ifdef MV_SATA_STORE_COMMANDS_INFO_ON_IAL_STACK
+    MV_QUEUE_COMMAND_INFO   *pCommandInfo = pScb->pCommandInfo;
+#else
+    MV_QUEUE_COMMAND_INFO   commandInfo;
+    MV_QUEUE_COMMAND_INFO   *pCommandInfo = &commandInfo;
+#endif
+    MV_QUEUE_COMMAND_RESULT result;
+    MV_U8                   index = 0;
+    MV_SATA_SCSI_DRIVE_DATA *pDriveData = &pScb->pSalAdapterExtension->ataDriveData[pScb->bus][pScb->target];
+
+
+    if ((buffer[index++] & 0xc0) || (buffer[index++] != 0x12) ||
+        ((buffer[index++] | MV_BIT2)!= MV_BIT2) || (buffer[index++]) ||
+        (buffer[index++] != 0xff) || (buffer[index++] != 0xff) ||
+        buffer[index++] || buffer[index++] || buffer[index++] ||
+        (buffer[index++] != 0x10) || buffer[index++] ||
+        (buffer[index++] != 0x10) || ((buffer[index++] | MV_BIT5) != MV_BIT5) ||
+        (buffer[index++] != 0x1) || (buffer[index++] != 0xff) ||
+        (buffer[index++] != 0xff) || buffer[index++] || buffer[index++]
+        || buffer[index++] || buffer[index++])
+    {
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " %d %d: Mode Select Error: invalid field in caching mode"
+                 " page, index %d\n", pSataAdapter->adapterId, pScb->bus,
+                 index);
+        return 0x3; /* Invalid field in parameter list */
+    }
+
+    pScb->splitCount = 2;
+    pScb->sequenceNumber = 1;
+    if (buffer[12] & MV_BIT5) /* Disable Look Ahead*/
+    {
+        if (pDriveData->identifyInfo.readAheadSupported == MV_FALSE)
+        {
+            pScb->splitCount--;
+        }
+        pScb->LowLbaAddress = 0;
+    }
+    else
+    {
+        if (pDriveData->identifyInfo.readAheadSupported == MV_FALSE)
+        {
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " %d %d: Mode Select Error: invalid field in caching mode"
+                     " page, enable read ahead (feature not supported)\n",
+                     pSataAdapter->adapterId, pScb->bus);
+            return 0x3; /* Invalid field in parameter list */
+        }
+        pScb->LowLbaAddress = 1;
+    }
+
+    if (buffer[2] & MV_BIT2) /* enable write cache*/
+    {
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " Parse Caching Page: enable Write Cache\n");
+        if (pDriveData->identifyInfo.writeCacheSupported == MV_FALSE)
+        {
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " %d %d: Mode Select Error: invalid field in caching mode"
+                     " page, enable write cache (feature not supported)\n",
+                     pSataAdapter->adapterId, pScb->bus);
+            return 0x3; /* Invalid field in parameter list */
+        }
+        pCommandInfo->commandParams.NoneUdmaCommand.features = MV_ATA_SET_FEATURES_ENABLE_WCACHE;
+    }
+    else
+    {
+        if (pDriveData->identifyInfo.writeCacheSupported == MV_FALSE)
+        {
+            pScb->splitCount--;
+            if (pScb->splitCount == 1)
+            {
+                mvScsiAtaSendReadLookAhead(pSataAdapter, pScb);
+                *pCommandStatus = MV_SCSI_COMMAND_STATUS_QUEUED;
+                return 0;
+            }
+        }
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " Parse Caching Page: disable Write Cache\n");
+        pCommandInfo->commandParams.NoneUdmaCommand.features = MV_ATA_SET_FEATURES_DISABLE_WCACHE;
+    }
+
+    if (pScb->splitCount == 0)
+    {
+        pScb->dataTransfered = 0;
+        pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_SUCCESS;
+        pScb->ScsiStatus = MV_SCSI_STATUS_GOOD;
+#ifdef MV_LOGGER
+        reportScbCompletion(pSataAdapter, pScb);
+#endif
+        pScb->completionCallBack(pSataAdapter, pScb);
+        *pCommandStatus = MV_SCSI_COMMAND_STATUS_COMPLETED;
+        return 0;
+    }
+
+    pScb->commandType = MV_QUEUED_COMMAND_TYPE_NONE_UDMA;
+
+    pCommandInfo->type = MV_QUEUED_COMMAND_TYPE_NONE_UDMA;
+    pCommandInfo->PMPort = pScb->target;
+    pCommandInfo->commandParams.NoneUdmaCommand.bufPtr = NULL;
+    pCommandInfo->commandParams.NoneUdmaCommand.callBack = SALCommandCompletionCB;
+    pCommandInfo->commandParams.NoneUdmaCommand.command = MV_ATA_COMMAND_SET_FEATURES;
+    pCommandInfo->commandParams.NoneUdmaCommand.commandId = (MV_VOID_PTR) pScb;
+    pCommandInfo->commandParams.NoneUdmaCommand.count = 0;
+
+    pCommandInfo->commandParams.NoneUdmaCommand.isEXT = MV_FALSE;
+    pCommandInfo->commandParams.NoneUdmaCommand.lbaHigh = 0;
+    pCommandInfo->commandParams.NoneUdmaCommand.lbaMid = 0;
+    pCommandInfo->commandParams.NoneUdmaCommand.lbaLow = 0;
+    pCommandInfo->commandParams.NoneUdmaCommand.protocolType = MV_NON_UDMA_PROTOCOL_NON_DATA;
+    pCommandInfo->commandParams.NoneUdmaCommand.sectorCount = 0;
+    pCommandInfo->commandParams.NoneUdmaCommand.device = (MV_U8)(MV_BIT6);
+
+    mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "Sending SET FEATURES command: features %d\n",
+             pCommandInfo->commandParams.NoneUdmaCommand.features);
+
+    result = mvSataQueueCommand(pSataAdapter, pScb->bus, pCommandInfo);
+
+    if (result != MV_QUEUE_COMMAND_RESULT_OK)
+    {
+        checkQueueCommandResult(pScb, result);
+#ifdef MV_LOGGER
+        reportScbCompletion(pSataAdapter, pScb);
+#endif
+        pScb->completionCallBack(pSataAdapter, pScb);
+        *pCommandStatus = MV_SCSI_COMMAND_STATUS_COMPLETED;
+
+        return 0;
+    }
+    *pCommandStatus = MV_SCSI_COMMAND_STATUS_QUEUED;
+    return 0;
+}
+
+static MV_U32
+mvModeSenseCachingPage(MV_SATA_SCSI_CMD_BLOCK  *pScb,
+                       MV_U8 *buffer,MV_U8 pageControl)
+{
+    MV_SATA_SCSI_DRIVE_DATA *pDriveData = &pScb->pSalAdapterExtension->ataDriveData[pScb->bus][pScb->target];
+
+
+    buffer[0] = 0x8; /* caching page*/
+    buffer[1] = 0x12; /* length = 2 + 0x12*/
+    buffer[2] = 0;
+    if (pageControl == 2) /*default values*/
+    {
+        if (pDriveData->identifyInfo.writeCacheSupported == MV_TRUE)
+        {
+            buffer[2] = MV_BIT2;
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " Cache Page: writeCacheEnabledByDefault\n");
+        }
+    }
+    else if (pageControl == 0)  /* current values*/
+    {
+        if ((pDriveData->identifyInfo.writeCacheSupported == MV_TRUE) &&
+            (pDriveData->identifyBuffer[85] & MV_BIT5))
+        {
+            buffer[2] = MV_BIT2;
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " Cache Page: writeCacheEnabled\n");
+        }
+    }
+    else if (pageControl == 1)  /* changeable values*/
+    {
+        if (pDriveData->identifyInfo.writeCacheSupported == MV_TRUE)
+        {
+            buffer[2] = MV_BIT2;
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " Cache Page: writeCacheSupported\n");
+        }
+    }
+
+    buffer[3] = 0;
+    if (pageControl != 1)
+    {
+        buffer[4] = 0xff;
+        buffer[5] = 0xff;
+        buffer[9] = 0x10;
+        buffer[11] = 0x10;
+    }
+    if (pageControl == 2) /*default values*/
+    {
+        if (pDriveData->identifyInfo.readAheadSupported == MV_FALSE)
+        {
+            buffer[12] = MV_BIT5;
+        }
+    }
+    else if (pageControl == 0)  /* current values*/
+    {
+        if ((pDriveData->identifyInfo.readAheadSupported == MV_TRUE) &&
+            (pDriveData->identifyBuffer[85] & MV_BIT6))
+        {
+            buffer[12] = 0;
+        }
+        else
+        {
+            buffer[12] = MV_BIT5;
+        }
+    }
+    else if (pageControl == 1)  /* changeable values*/
+    {
+        if (pDriveData->identifyInfo.readAheadSupported == MV_TRUE)
+        {
+            buffer[12] = MV_BIT5;
+        }
+    }
+    if (pageControl != 1)
+    {
+        buffer[13] = 0x01;
+        buffer[14] = 0xff;
+        buffer[15] = 0xff;
+    }
+
+    {
+        MV_U32 i;
+
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " Cache Page: \n");
+        for (i = 0; i < 0x14; i++)
+        {
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "[%d] %x\n",i, buffer[i]);
+        }
+    }
+    return 0x14;
+}
+
+static MV_U32
+mvModeSenseControlPage(MV_SATA_ADAPTER *pSataAdapter,
+                       MV_SATA_SCSI_CMD_BLOCK  *pScb,
+                       MV_U8 *buffer, MV_U8 pageControl)
+{
+    buffer[0] = 0xA;    /* control page */
+    buffer[1] = 0xA;    /* length 2 + 0xa*/
+    if (pageControl != 1)
+    {
+        buffer[3] = MV_BIT4/*Unrestricted reordering allowed*/;
+    }
+
+    {
+        MV_U32 i;
+
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " Control Page: \n");
+        for (i = 0; i < 0xc; i++)
+        {
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "[%d] %x\n",i , buffer[i]);
+        }
+    }
+    return 0xc;
+}
+
+static MV_BOOLEAN
+SALCommandCompletionCB(MV_SATA_ADAPTER *pSataAdapter,
+                       MV_U8 channelNum,
+                       MV_COMPLETION_TYPE comp_type,
+                       MV_VOID_PTR commandId,
+                       MV_U16 responseFlags,
+                       MV_U32 timeStamp,
+                       MV_STORAGE_DEVICE_REGISTERS *registerStruct)
+{
+    MV_SATA_SCSI_CMD_BLOCK  *pScb;
+    if (commandId == NULL)
+    {
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG_FATAL_ERROR, " commandId is NULL, can't hanlde this !!!,adapterId=%d,"
+                 " channel=%d \n", pSataAdapter->adapterId, channelNum);
+        return MV_FALSE;
+    }
+
+    pScb = commandId;
+    switch (comp_type)
+    {
+    case MV_COMPLETION_TYPE_NORMAL:
+        /* finish */
+#ifdef  MV_SUPPORT_ATAPI
+        if(pScb->commandType == MV_QUEUED_COMMAND_TYPE_PACKET)
+        {
+            if ((registerStruct->statusRegister & MV_ATA_ERROR_STATUS) ||
+               (registerStruct->statusRegister & MV_ATA_DEVICE_FAULT_STATUS))  
+            {
+                pScb->ScsiStatus = MV_SCSI_STATUS_CHECK_CONDITION;
+                mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "packet command completed ",
+                        "with check condition\n", pScb);
+            }
+            else
+            {
+                pScb->ScsiStatus = MV_SCSI_STATUS_GOOD;
+            }
+            pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_SUCCESS;
+            pScb->dataTransfered = timeStamp;
+            break;
+        }
+#endif
+        /* If splited VERIFY command, then SRB completion will be on the last fragment */
+        if ((((pScb->ScsiCdb[0] == SCSI_OPCODE_VERIFY6) ||
+              (pScb->ScsiCdb[0] == SCSI_OPCODE_VERIFY10) ||
+              (pScb->ScsiCdb[0] == SCSI_OPCODE_VERIFY16) ||
+              (pScb->ScsiCdb[0] == SCSI_OPCODE_MODE_SELECT6)))
+            &&  (pScb->splitCount > pScb->sequenceNumber))
+        {
+            /* add the command to the list for post interrupt service*/
+            pScb->pNext = pScb->pSalAdapterExtension->pHead;
+            pScb->pSalAdapterExtension->pHead = pScb;
+            return MV_TRUE;
+        }
+        if (pScb->ScsiCdb[0] == SCSI_OPCODE_MODE_SENSE6)
+        {
+            mvScsiAtaGetModeSenseDataPhase2(pSataAdapter, pScb);
+        }
+        else
+        {
+            pScb->ScsiStatus = MV_SCSI_STATUS_GOOD;
+            pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_SUCCESS;
+        }
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "command completed. pScb %p\n", pScb);
+
+        break;
+    case MV_COMPLETION_TYPE_ABORT:
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG_ERROR, "Error: command Aborted. Cdb: %02x %02x %02x %02x %02x "
+                 "%02x %02x %02x %02x %02x\n", pScb->ScsiCdb[0],
+                 pScb->ScsiCdb[1], pScb->ScsiCdb[2], pScb->ScsiCdb[3],
+                 pScb->ScsiCdb[4], pScb->ScsiCdb[5], pScb->ScsiCdb[6],
+                 pScb->ScsiCdb[7], pScb->ScsiCdb[8], pScb->ScsiCdb[9]);
+
+        pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_ABORTED;
+        pScb->dataTransfered = 0;
+        pScb->senseDataLength = 0;
+        mvCommandCompletionErrorHandler(pScb->pIalAdapterExtension, channelNum);
+        break;
+    case MV_COMPLETION_TYPE_ERROR:
+        pScb->dataTransfered = 0;
+        pScb->senseDataLength = 0;
+        pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_ATA_FAILED;
+
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG_ERROR, "COMPLETION ERROR , adapter =%d, channel=%d, flags=%x\n",
+                 pSataAdapter->adapterId, channelNum, responseFlags);
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG_ERROR, " Failed command Cdb: %02x %02x %02x %02x %02x "
+                 "%02x %02x %02x %02x %02x\n", pScb->ScsiCdb[0],
+                 pScb->ScsiCdb[1], pScb->ScsiCdb[2], pScb->ScsiCdb[3],
+                 pScb->ScsiCdb[4], pScb->ScsiCdb[5], pScb->ScsiCdb[6],
+                 pScb->ScsiCdb[7], pScb->ScsiCdb[8], pScb->ScsiCdb[9]);
+        /* here the  eDMA will be stopped, so we have to flush  */
+        /* the pending commands                                 */
+
+        if (pScb->commandType == MV_QUEUED_COMMAND_TYPE_UDMA)
+        {
+            handleUdmaError(pScb, responseFlags, registerStruct);
+#ifdef MV_LOGGER
+            memcpy(&pScb->ATAregStruct, registerStruct,
+                   sizeof(pScb->ATAregStruct));
+#endif
+        }
+        else
+        {
+            handleNoneUdmaError(pScb, registerStruct);
+#ifdef MV_LOGGER
+            memcpy(&pScb->ATAregStruct, registerStruct,
+                   sizeof(pScb->ATAregStruct));
+#endif
+        }
+        mvCommandCompletionErrorHandler(pScb->pIalAdapterExtension, channelNum);
+        break;
+    default:
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG_FATAL_ERROR, " Unknown completion type (%d)\n", comp_type);
+        return MV_FALSE;
+    }
+#ifdef MV_LOGGER
+    reportScbCompletion(pSataAdapter, pScb);
+#endif
+
+    pScb->completionCallBack(pSataAdapter, pScb);
+    return MV_TRUE;
+}
+MV_VOID
+handleNoneUdmaError(MV_SATA_SCSI_CMD_BLOCK  *pScb,
+                    MV_STORAGE_DEVICE_REGISTERS *registerStruct)
+{
+    MV_U8 errorReg = registerStruct->errorRegister;
+    MV_SCSI_SENSE_DATA SenseData;
+
+    memset(&SenseData, 0, sizeof(MV_SCSI_SENSE_DATA));
+
+    pScb->dataBufferLength = 0;
+
+    /*if (pSrb->SenseInfoBufferLength < 13)
+    {
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG_ERROR, "IAL ERROR: invalid Sense Info buffer len (%d)\n",
+                 Srb->SenseInfoBufferLength);
+        Srb->SrbStatus = SRB_STATUS_ERROR;
+        return;
+    }*/
+    memset(pScb->pSenseBuffer, 0, pScb->senseBufferLength);
+    /*pScb->ScsiCommandCompletion = ;*/
+    pScb->ScsiStatus =  MV_SCSI_STATUS_CHECK_CONDITION;
+
+    SenseData.ResponseCode = MV_SCSI_RESPONSE_CODE;
+//    SenseData.Valid = 0;
+
+    SenseData.AdditionalSenseLength = 12;
+    SenseData.InformationDesc.type = 0;
+    SenseData.InformationDesc.AdditionalLength = 0xA;
+    SenseData.InformationDesc.valid = 1 << 7;
+
+    mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " ATA Drive Registers:\n");
+    mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "%20s : %04x\n","Error", registerStruct->errorRegister);
+    mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "%20s : %04x\n","SectorCount", registerStruct->sectorCountRegister);
+    mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "%20s : %04x\n","LBA Low", registerStruct->lbaLowRegister);
+    mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "%20s : %04x\n","LBA Mid", registerStruct->lbaMidRegister);
+    mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "%20s : %04x\n","LBA High", registerStruct->lbaHighRegister);
+    mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "%20s : %04x\n","Device", registerStruct->deviceRegister);
+    mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "%20s : %04x\n","Status", registerStruct->statusRegister);
+
+    /* If the command is synchronize cache */
+    if ((pScb->ScsiCdb[0] == SCSI_OPCODE_SYNCHRONIZE_CACHE10) || 
+	(pScb->ScsiCdb[0] == SCSI_OPCODE_SYNCHRONIZE_CACHE16))
+    {
+        if (!(registerStruct->errorRegister & ABRT_ERR))
+        {
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG_ERROR, " received error completion on flush cache command"
+                     " but ABORT bit in error register is not set\n");
+        }
+        SenseData.SenseKey = SCSI_SENSE_MEDIUM_ERROR;
+	_fillSenseInformation(pScb, &SenseData, registerStruct);
+    }
+    else if ((pScb->ScsiCdb[0] == SCSI_OPCODE_VERIFY10) ||
+	     (pScb->ScsiCdb[0] == SCSI_OPCODE_VERIFY6) ||
+	     (pScb->ScsiCdb[0] == SCSI_OPCODE_VERIFY16))
+    {
+        if (errorReg & (NM_ERR | MC_ERR | MCR_ERR))
+        {
+            SenseData.SenseKey = SCSI_SENSE_UNIT_ATTENTION;
+        }
+        else if (errorReg & UNC_ERR)
+        {
+#if 0
+            MV_U32  LowLbaAddress = pScb->LowLbaAddress;
+#endif
+            SenseData.SenseKey = SCSI_SENSE_MEDIUM_ERROR;
+#if 0
+            /* Since high 8 bit address are taken immediatly from LowLbaAddress and
+            not from the completion info ; the following code is relevant for both
+            48bit and 28bit LBA addressing*/
+            SenseData.Information[0] = (MV_U8)((LowLbaAddress & 0xff000000) >> 24);
+            SenseData.Information[1] = (MV_U8)(registerStruct->lbaHighRegister & 0xff);
+            SenseData.Information[2] = (MV_U8)(registerStruct->lbaMidRegister & 0xff);
+            SenseData.Information[3] = (MV_U8)(registerStruct->lbaLowRegister & 0xff);
+#endif
+	    _fillSenseInformation(pScb, &SenseData, registerStruct);
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG_ERROR, " Read Verify failed on UNC at sector %02x %02x %02x %02x %02x %02x\n",
+                     SenseData.InformationDesc.information[2],
+                     SenseData.InformationDesc.information[3],
+                     SenseData.InformationDesc.information[4],
+                     SenseData.InformationDesc.information[5],
+                     SenseData.InformationDesc.information[6],
+                     SenseData.InformationDesc.information[7]
+		     );
+        }
+        /*else if (errorReg & IDNF_ERR)
+        {
+            SenseData.SenseKey = SCSI_SENSE_VOL_OVERFLOW;
+        }*/
+        else if ((errorReg & ABRT_ERR) || (errorReg & IDNF_ERR))
+        {
+            SenseData.SenseKey = SCSI_SENSE_ABORTED_COMMAND;
+            SenseData.AdditionalSenseCode = SCSI_ADSENSE_NO_SENSE;
+        }
+        else
+        {
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG_ERROR, " in mapping ATA error to SCSI error\n");
+            SenseData.SenseKey = SCSI_SENSE_NO_SENSE;
+        }
+    }
+    else if (pScb->ScsiCdb[0] == SCSI_OPCODE_MODE_SELECT6)
+    {
+        /* MODE SELECT is only when enabling / disabling write cache */
+        if (errorReg & ABRT_ERR)
+        {
+            SenseData.SenseKey = SCSI_SENSE_ABORTED_COMMAND;
+            SenseData.AdditionalSenseCode = SCSI_ADSENSE_NO_SENSE;
+        }
+        else
+        {
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG_ERROR, " in mapping ATA error to SCSI error\n");
+            SenseData.SenseKey = SCSI_SENSE_NO_SENSE;
+        }
+    }
+    pScb->senseDataLength = 20;
+    memcpy(pScb->pSenseBuffer, &SenseData,
+           (pScb->senseBufferLength > pScb->senseDataLength) ?
+           pScb->senseDataLength : pScb->senseBufferLength);
+}
+
+
+
+static MV_VOID
+handleUdmaError(MV_SATA_SCSI_CMD_BLOCK  *pScb,
+                MV_U32 responseFlags,
+                MV_STORAGE_DEVICE_REGISTERS *registerStruct)
+{
+
+    mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG_ERROR, "UDMA %s command failed\n", (pScb->udmaType == MV_UDMA_TYPE_READ) ?
+             "READ" : "WRITE");
+    if (responseFlags & (MV_BIT3))
+    {
+        /* prevent the error_handler from re-send any commands */
+        pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_DISCONNECT;
+    }
+    else if (responseFlags & MV_BIT2)           /* ATA error*/
+    {
+        MV_SCSI_SENSE_DATA SenseData;
+
+        memset(&SenseData, 0, sizeof(MV_SCSI_SENSE_DATA));
+        pScb->ScsiStatus =  MV_SCSI_STATUS_CHECK_CONDITION;
+        pScb->dataTransfered = 0;
+        pScb->senseDataLength = 13;
+//        SenseData.Valid = 1;
+        SenseData.ResponseCode = MV_SCSI_RESPONSE_CODE;
+        SenseData.AdditionalSenseLength = 12;
+	SenseData.InformationDesc.type = 0;
+	SenseData.InformationDesc.AdditionalLength = 0xA;
+	SenseData.InformationDesc.valid = 1 << 7;
+
+
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " ATA Drive Registers:\n");
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "%20s : %04x\n","Error", registerStruct->errorRegister);
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "%20s : %04x\n","SectorCount", registerStruct->sectorCountRegister);
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "%20s : %04x\n","LBA Low", registerStruct->lbaLowRegister);
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "%20s : %04x\n","LBA Mid", registerStruct->lbaMidRegister);
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "%20s : %04x\n","LBA High", registerStruct->lbaHighRegister);
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "%20s : %04x\n","Device", registerStruct->deviceRegister);
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "%20s : %04x\n","Status", registerStruct->statusRegister);
+
+        if ((registerStruct->errorRegister & ICRC_ERR)||
+            (registerStruct->errorRegister == 0xC))/*error code injected by 88i8030*/
+        {
+            SenseData.SenseKey = SCSI_SENSE_ABORTED_COMMAND;
+            SenseData.AdditionalSenseCode = SCSI_ADSENSE_NO_SENSE;
+        }
+        else if (registerStruct->errorRegister &
+                 (NM_ERR | MC_ERR | MCR_ERR))
+        {
+            SenseData.SenseKey = SCSI_SENSE_UNIT_ATTENTION;
+            SenseData.AdditionalSenseCode = SCSI_ADSENSE_NO_MEDIA_IN_DEVICE;
+        }
+        else if ((registerStruct->errorRegister & UNC_ERR) ||
+		 (registerStruct->errorRegister == 1))
+        {
+#if 0
+            MV_U32  LowLbaAddress = pScb->LowLbaAddress;
+
+            SenseData.Valid = 1;
+            SenseData.Information[0] = (MV_U8)((LowLbaAddress & 0xff000000) >> 24);
+            SenseData.Information[1] = (MV_U8)(registerStruct->lbaHighRegister & 0xff);
+            SenseData.Information[2] = (MV_U8)(registerStruct->lbaMidRegister & 0xff);
+            SenseData.Information[3] = (MV_U8)(registerStruct->lbaLowRegister & 0xff);
+#endif
+	    _fillSenseInformation(pScb, &SenseData, registerStruct);
+            if (pScb->udmaType == MV_UDMA_TYPE_READ)
+            {
+                SenseData.SenseKey = SCSI_SENSE_MEDIUM_ERROR;
+                SenseData.AdditionalSenseCode = SCSI_ADSENSE_NO_SENSE;
+
+		mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG_ERROR, " DMA Read failed on UNC at sector %02x %02x %02x %02x %02x %02x\n",
+			 SenseData.InformationDesc.information[2],
+			 SenseData.InformationDesc.information[3],
+			 SenseData.InformationDesc.information[4],
+			 SenseData.InformationDesc.information[5],
+			 SenseData.InformationDesc.information[6],
+			 SenseData.InformationDesc.information[7]
+		     );
+            }
+            else
+            {
+                SenseData.SenseKey = SCSI_SENSE_DATA_PROTECT;
+                SenseData.AdditionalSenseCode = SCSI_ADSENSE_NO_SENSE;
+            }
+        }
+        else if ((registerStruct->errorRegister & IDNF_ERR) &&
+                 (!(registerStruct->errorRegister & ABRT_ERR)))
+        {
+            /* In case IDNF is set and ABRT reset OR IDNF reset and ABRT is set */
+            SenseData.SenseKey = SCSI_SENSE_ILLEGAL_REQUEST;
+            SenseData.AdditionalSenseCode = SCSI_ADSENSE_ILLEGAL_BLOCK;
+        }
+        else if (registerStruct->errorRegister & ABRT_ERR)
+        {
+            SenseData.SenseKey = SCSI_SENSE_ABORTED_COMMAND;
+            SenseData.AdditionalSenseCode = SCSI_ADSENSE_NO_SENSE;
+        }
+        else
+        {
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG_ERROR, " in mapping ATA error to SCSI error\n");
+            SenseData.SenseKey = SCSI_SENSE_ABORTED_COMMAND;
+            SenseData.AdditionalSenseCode = SCSI_ADSENSE_NO_SENSE;
+        }
+        pScb->senseDataLength = 20;
+        memcpy(pScb->pSenseBuffer, &SenseData,
+               (pScb->senseBufferLength > pScb->senseDataLength) ?
+               pScb->senseDataLength : pScb->senseBufferLength);
+    }
+    else if (responseFlags & (MV_BIT0 | MV_BIT1))
+    {
+        pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_PARITY_ERROR;
+        pScb->ScsiStatus =  MV_SCSI_STATUS_CHECK_CONDITION;
+        pScb->senseDataLength = 0;
+        pScb->dataTransfered = 0;
+    }
+    else if (responseFlags & (MV_BIT6|MV_BIT5))
+    {
+        if (responseFlags & MV_BIT6)
+        {
+            pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_UNDERRUN;
+        }
+        else
+        {
+            pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_OVERRUN;
+        }
+        pScb->dataTransfered = 0;
+
+    }
+}
+
+/*******************************************************************************
+* checkQueueCommandResult -
+*
+* DESCRIPTION:  set the scsi request completion status and the Scsi Status
+*       according to the result returned form the mvSataQueueCommand function
+*
+* INPUT:
+*
+* OUTPUT:
+*
+* RETURN:
+*
+* COMMENTS:
+*
+*
+*******************************************************************************/
+
+/*static*/ MV_VOID  checkQueueCommandResult(MV_SATA_SCSI_CMD_BLOCK *pScb,
+                                            MV_QUEUE_COMMAND_RESULT  result)
+{
+    switch (result)
+    {
+    case MV_QUEUE_COMMAND_RESULT_BAD_LBA_ADDRESS:
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG_ERROR, " Edma Queue command failed. Bad LBA \n");
+        pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_BAD_SCB;
+        break;
+    case MV_QUEUE_COMMAND_RESULT_QUEUED_MODE_DISABLED:
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG_ERROR, " Edma Queue command failed. EDMA disabled\n");
+        pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_NOT_READY;
+
+        break;
+    case MV_QUEUE_COMMAND_RESULT_FULL:
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG_ERROR, " Edma Queue command failed. Queue is Full\n");
+        pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_QUEUE_FULL;
+        pScb->ScsiStatus = MV_SCSI_STATUS_QUEUE_FULL;
+        break;
+    case MV_QUEUE_COMMAND_RESULT_BAD_PARAMS:
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG_ERROR, " Edma Queue command failed. (Bad Params)\n");
+        pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_BAD_SCB;
+        break;
+    default:
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG_ERROR, " Bad result value (%d) from queue"
+                 " command\n", result);
+    }
+    mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG_ERROR, " mvSataQueueUDmaCommand Failed\n");
+    pScb->dataTransfered = 0;
+    pScb->senseDataLength = 0;
+}
+#ifdef MV_LOGGER
+static MV_VOID reportScbCompletion(MV_SATA_ADAPTER*    pSataAdapter,
+                                   MV_SATA_SCSI_CMD_BLOCK *pScb)
+{
+    if (pScb->ScsiCommandCompletion != MV_SCSI_COMPLETION_SUCCESS)
+    {
+        MV_U8   buffer[100];
+        MV_U32  index = 0;
+        MV_BOOLEAN      printInfo = MV_TRUE;
+
+        switch (pScb->ScsiCommandCompletion)
+        {
+        case MV_SCSI_COMPLETION_BAD_SCSI_COMMAND:
+            SAL_SPRINTF(buffer, "%s", "MV_SCSI_COMPLETION_BAD_SCSI_COMMAND");
+            break;
+        case MV_SCSI_COMPLETION_ATA_FAILED:
+            SAL_SPRINTF(buffer, "%s", "MV_SCSI_COMPLETION_ATA_FAILED");
+            break;
+        case MV_SCSI_COMPLETION_PARITY_ERROR:
+            SAL_SPRINTF(buffer, "%s", "MV_SCSI_COMPLETION_PARITY");
+            break;
+        default:
+            printInfo = MV_FALSE;
+        }
+
+        if (printInfo == MV_TRUE)
+        {
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG_ERROR, " %d %d %d :Scsi command completed. pScb %p, ScsiStatus %d "
+                     "completionStatus %s\n", pSataAdapter->adapterId,
+                     pScb->bus, pScb->target, pScb, pScb->ScsiStatus, buffer);
+        }
+        else
+        {
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "Scsi command completed. pScb %p, ScsiStatus %d "
+                     "completionStatus %d\n", pScb, pScb->ScsiStatus,
+                     pScb->ScsiCommandCompletion);
+        }
+
+        index = SAL_SPRINTF(buffer, "%s", "CDB:");
+        {
+            MV_U32  i;
+            for (i =0 ; i < pScb->ScsiCdbLength; i++)
+            {
+                index += SAL_SPRINTF(&buffer[index], "%x ",
+                                     pScb->ScsiCdb[i]);
+            }
+            buffer[index] = '\n';
+            buffer[index+1] = 0;
+            mvLogMsg(MV_SAL_LOG_ID,(printInfo == MV_TRUE) ?
+                     MV_DEBUG_ERROR : MV_DEBUG, buffer);
+            if (pScb->ScsiStatus == MV_SCSI_STATUS_CHECK_CONDITION)
+            {
+                if ((pScb->pSenseBuffer != NULL) && (pScb->senseBufferLength > 0))
+                {
+                    MV_U32  len = pScb->senseDataLength > pScb->senseBufferLength ?
+                                  pScb->senseBufferLength:pScb->senseDataLength;
+                    index = SAL_SPRINTF(buffer, "%s", "Sense Data:");
+                    for (i = 0; i < len; i++)
+                    {
+                        index += SAL_SPRINTF(buffer + index, "%x ",
+                                             pScb->pSenseBuffer[i]);
+                    }
+                    buffer[index] = '\n';
+                    buffer[index+1] = 0;
+                    mvLogMsg(MV_SAL_LOG_ID, (printInfo == MV_TRUE) ?
+                             MV_DEBUG_ERROR : MV_DEBUG, buffer);
+                }
+            }
+        }
+        if (pScb->ScsiCommandCompletion == MV_SCSI_COMPLETION_ATA_FAILED)
+        {
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG_ERROR, " ATA Drive Registers:\n");
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG_ERROR, "%20s : %04x\n","Error", pScb->ATAregStruct.errorRegister);
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG_ERROR, "%20s : %04x\n","SectorCount", pScb->ATAregStruct.sectorCountRegister);
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG_ERROR, "%20s : %04x\n","LBA Low", pScb->ATAregStruct.lbaLowRegister);
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG_ERROR, "%20s : %04x\n","LBA Mid", pScb->ATAregStruct.lbaMidRegister);
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG_ERROR, "%20s : %04x\n","LBA High", pScb->ATAregStruct.lbaHighRegister);
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG_ERROR, "%20s : %04x\n","Device", pScb->ATAregStruct.deviceRegister);
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG_ERROR, "%20s : %04x\n","Status", pScb->ATAregStruct.statusRegister);
+        }
+    }
+    else
+    {
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "Scsi command completed. pScb %p, ScsiStatus %d "
+                 "completionStatus %d  dataTransfered %d \n", pScb, pScb->ScsiStatus,
+                 pScb->ScsiCommandCompletion,  pScb->dataTransfered);
+    }
+    
+}
+#endif
+static MV_VOID  mvScsiAtaSendSplittedVerifyCommand(IN MV_SATA_SCSI_CMD_BLOCK  *pScb)
+{
+#ifdef MV_SATA_STORE_COMMANDS_INFO_ON_IAL_STACK
+    MV_QUEUE_COMMAND_INFO   *pCommandInfo = pScb->pCommandInfo;
+#else
+    MV_QUEUE_COMMAND_INFO   commandInfo;
+    MV_QUEUE_COMMAND_INFO   *pCommandInfo = &commandInfo;
+#endif
+    MV_QUEUE_COMMAND_RESULT result;
+    MV_U8                  sectors = 0;/*256 sectors*/
+
+    pScb->sequenceNumber++;
+    if (pScb->sequenceNumber == 1)/*for the first command*/
+    {
+        if (pScb->ScsiCdb[0] == SCSI_OPCODE_VERIFY6)
+        {
+            sectors = pScb->ScsiCdb[4];
+        }
+        else if (pScb->ScsiCdb[0] == SCSI_OPCODE_VERIFY10)
+        {
+            sectors = pScb->ScsiCdb[8];
+        }
+	else 
+        {
+            sectors = pScb->ScsiCdb[13];
+        }
+    }
+    pCommandInfo->type = MV_QUEUED_COMMAND_TYPE_NONE_UDMA;
+    pCommandInfo->PMPort = pScb->target;
+    pCommandInfo->commandParams.NoneUdmaCommand.bufPtr = NULL;
+    pCommandInfo->commandParams.NoneUdmaCommand.callBack = SALCommandCompletionCB;
+    pCommandInfo->commandParams.NoneUdmaCommand.command = MV_ATA_COMMAND_READ_VERIFY_SECTORS;
+    pCommandInfo->commandParams.NoneUdmaCommand.commandId = (MV_VOID_PTR) pScb;
+    pCommandInfo->commandParams.NoneUdmaCommand.count = 0;
+
+    pCommandInfo->commandParams.NoneUdmaCommand.features = 0;
+    pCommandInfo->commandParams.NoneUdmaCommand.isEXT = MV_FALSE;
+    pCommandInfo->commandParams.NoneUdmaCommand.protocolType = MV_NON_UDMA_PROTOCOL_NON_DATA;
+
+    pCommandInfo->commandParams.NoneUdmaCommand.lbaHigh = (MV_U16)((pScb->LowLbaAddress & 0xff0000) >> 16);
+    pCommandInfo->commandParams.NoneUdmaCommand.lbaMid = (MV_U16)((pScb->LowLbaAddress & 0xff00) >> 8);
+    pCommandInfo->commandParams.NoneUdmaCommand.lbaLow = (MV_U16)(pScb->LowLbaAddress & 0xff);
+    pCommandInfo->commandParams.NoneUdmaCommand.sectorCount = sectors;
+    pCommandInfo->commandParams.NoneUdmaCommand.device = (MV_U8)(MV_BIT6 |
+                                                                 ((pScb->LowLbaAddress & 0xf000000) >> 24));
+
+    mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " %d %d %d: Sending Splitted Verify command:seq# %d code %x lba"
+             " %x(%x.%x.%x), sectors %d[%d] Srb %p\n",
+             pScb->pSalAdapterExtension->pSataAdapter->adapterId, pScb->bus,
+             pScb->target,
+             pScb->sequenceNumber,pScb->ScsiCdb[0],
+             pScb->LowLbaAddress,
+             pCommandInfo->commandParams.NoneUdmaCommand.lbaHigh,
+             pCommandInfo->commandParams.NoneUdmaCommand.lbaMid,
+             pCommandInfo->commandParams.NoneUdmaCommand.lbaLow,
+             pCommandInfo->commandParams.NoneUdmaCommand.sectorCount,
+             mvSataNumOfDmaCommands(pScb->pSalAdapterExtension->pSataAdapter,
+                                    pScb->bus), pScb);
+
+    if (sectors)
+    {
+        pScb->LowLbaAddress += sectors;
+    }
+    else
+    {
+        pScb->LowLbaAddress += 0x100;
+    }
+
+    result = mvSataQueueCommand(pScb->pSalAdapterExtension->pSataAdapter,
+                                pScb->bus, pCommandInfo);
+
+    if (result != MV_QUEUE_COMMAND_RESULT_OK)
+    {
+        checkQueueCommandResult(pScb, result);
+#ifdef MV_LOGGER
+        reportScbCompletion(pScb->pSalAdapterExtension->pSataAdapter, pScb);
+#endif
+
+        return;
+    }
+
+    /* update stats*/
+    pScb->pSalAdapterExtension->totalAccumulatedOutstanding[pScb->bus] +=
+    mvSataNumOfDmaCommands(pScb->pSalAdapterExtension->pSataAdapter,pScb->bus);
+    pScb->pSalAdapterExtension->ataDriveData[pScb->bus][pScb->target].stats.totalIOs++;
+    pScb->pSalAdapterExtension->ataDriveData[pScb->bus][pScb->target].stats.totalSectorsTransferred += sectors;
+
+}
+static MV_VOID  mvScsiAtaSendReadLookAhead(IN MV_SATA_ADAPTER *pSataAdapter,
+                                           IN MV_SATA_SCSI_CMD_BLOCK  *pScb)
+{
+#ifdef MV_SATA_STORE_COMMANDS_INFO_ON_IAL_STACK
+    MV_QUEUE_COMMAND_INFO   *pCommandInfo = pScb->pCommandInfo;
+#else
+    MV_QUEUE_COMMAND_INFO   commandInfo;
+    MV_QUEUE_COMMAND_INFO   *pCommandInfo = &commandInfo;
+#endif
+    MV_QUEUE_COMMAND_RESULT result;
+
+    if (pScb->LowLbaAddress == 0) /* Disable Look Ahead*/
+    {
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " Parse Caching Page: Disable Read Look Ahead\n");
+        pCommandInfo->commandParams.NoneUdmaCommand.features = MV_ATA_SET_FEATURES_DISABLE_RLA;
+    }
+    else
+    {
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " Parse Caching Page: Enable Look Ahead\n");
+        pCommandInfo->commandParams.NoneUdmaCommand.features = MV_ATA_SET_FEATURES_ENABLE_RLA;
+    }
+
+    pScb->commandType = MV_QUEUED_COMMAND_TYPE_NONE_UDMA;
+
+    pCommandInfo->type = MV_QUEUED_COMMAND_TYPE_NONE_UDMA;
+    pCommandInfo->PMPort = pScb->target;
+    pCommandInfo->commandParams.NoneUdmaCommand.bufPtr = NULL;
+    pCommandInfo->commandParams.NoneUdmaCommand.callBack = SALCommandCompletionCB;
+    pCommandInfo->commandParams.NoneUdmaCommand.command = MV_ATA_COMMAND_SET_FEATURES;
+    pCommandInfo->commandParams.NoneUdmaCommand.commandId = (MV_VOID_PTR) pScb;
+    pCommandInfo->commandParams.NoneUdmaCommand.count = 0;
+
+    pCommandInfo->commandParams.NoneUdmaCommand.isEXT = MV_FALSE;
+    pCommandInfo->commandParams.NoneUdmaCommand.lbaHigh = 0;
+    pCommandInfo->commandParams.NoneUdmaCommand.lbaMid = 0;
+    pCommandInfo->commandParams.NoneUdmaCommand.lbaLow = 0;
+    pCommandInfo->commandParams.NoneUdmaCommand.protocolType = MV_NON_UDMA_PROTOCOL_NON_DATA;
+    pCommandInfo->commandParams.NoneUdmaCommand.sectorCount = 0;
+    pCommandInfo->commandParams.NoneUdmaCommand.device = (MV_U8)(MV_BIT6);
+
+    mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "Sending SET FEATURES command: features %d\n",
+             pCommandInfo->commandParams.NoneUdmaCommand.features);
+
+    pScb->sequenceNumber++;
+    result = mvSataQueueCommand(pSataAdapter, pScb->bus, pCommandInfo);
+
+    if (result != MV_QUEUE_COMMAND_RESULT_OK)
+    {
+        checkQueueCommandResult(pScb, result);
+#ifdef MV_LOGGER
+        reportScbCompletion(pSataAdapter, pScb);
+#endif
+        pScb->completionCallBack(pSataAdapter, pScb);
+        return;
+    }
+}
+
+MV_VOID     mvSataScsiInitAdapterExt(MV_SAL_ADAPTER_EXTENSION *pAdapterExt,
+                                     MV_SATA_ADAPTER* pSataAdapter)
+{
+    MV_U8   channelIndex;
+    MV_U8   PMPort;
+    pAdapterExt->pSataAdapter = pSataAdapter;
+    pAdapterExt->pHead = NULL;
+    pAdapterExt->UAMask = 0xFF;
+    for (channelIndex = 0; channelIndex < MV_SATA_CHANNELS_NUM; channelIndex++)
+    {
+        for (PMPort = 0; PMPort < MV_SATA_PM_MAX_PORTS; PMPort++)
+        {
+            pAdapterExt->ataDriveData[channelIndex][PMPort].driveReady = MV_FALSE;
+            /* one identify data buffer used for all the drives connected to */
+            /* the same channel*/
+            pAdapterExt->ataDriveData[channelIndex][PMPort].identifyBuffer =
+            pAdapterExt->identifyBuffer[channelIndex];
+        }
+    }
+}
+#ifdef MV_SUPPORT_ATAPI
+MV_SCSI_COMMAND_STATUS_TYPE mvScsiAtaSendATAPICommand(MV_SATA_ADAPTER *pSataAdapter, 
+                                                        MV_SATA_SCSI_CMD_BLOCK  *pScb)
+{
+#ifdef MV_SATA_STORE_COMMANDS_INFO_ON_IAL_STACK
+    MV_QUEUE_COMMAND_INFO   *pCommandInfo = pScb->pCommandInfo;
+#else
+    MV_QUEUE_COMMAND_INFO   commandInfo;
+    MV_QUEUE_COMMAND_INFO   *pCommandInfo = &commandInfo;
+#endif
+    MV_QUEUE_COMMAND_RESULT result;
+
+ 
+    mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "Send Packet command, adapter %d bus %d target %d lun %"
+             "d pScb %p\n  dir(%d)  Data Buffer %p (%d), cdb %p (%d)\n",
+             pSataAdapter->adapterId, pScb->bus, pScb->target,
+             pScb->lun, pScb, pScb->dataDirection,
+            pScb->pDataBuffer, 
+                pScb->dataBufferLength, pScb->ScsiCdb, pScb->ScsiCdbLength);
+ 
+    pScb->commandType = MV_QUEUED_COMMAND_TYPE_PACKET;
+
+    pCommandInfo->type = MV_QUEUED_COMMAND_TYPE_PACKET;
+    pCommandInfo->PMPort = pScb->target;
+    pCommandInfo->commandParams.packetCommand.bufPtr = (MV_U16_PTR)pScb->pDataBuffer;
+    pCommandInfo->commandParams.packetCommand.buffer_len = pScb->dataBufferLength;
+    pCommandInfo->commandParams.packetCommand.transfered_data = 0;
+    pCommandInfo->commandParams.packetCommand.cdb_len = (pScb->ScsiCdbLength  >> 1);
+    pCommandInfo->commandParams.packetCommand.cdb_buffer = (MV_U16_PTR)pScb->ScsiCdb;
+    pCommandInfo->commandParams.packetCommand.flags = 0;
+    pCommandInfo->commandParams.packetCommand.callBack = SALCommandCompletionCB;
+    pCommandInfo->commandParams.packetCommand.commandId = (MV_VOID_PTR) pScb;
+    pCommandInfo->commandParams.packetCommand.prdLowAddr = pScb->PRDTableLowPhyAddress;
+    pCommandInfo->commandParams.packetCommand.prdHighAddr = pScb->PRDTableHighPhyAddress;
+    
+    if((pScb->dataDirection == MV_SCSI_COMMAND_DATA_DIRECTION_IN) && (pScb->pDataBuffer == NULL))
+    {
+        pCommandInfo->commandParams.packetCommand.protocolType = MV_NON_UDMA_PROTOCOL_PACKET_DMA;
+    }
+    else if((pScb->dataDirection == MV_SCSI_COMMAND_DATA_DIRECTION_OUT) && (pScb->pDataBuffer == NULL))
+    {
+        pCommandInfo->commandParams.packetCommand.protocolType = MV_NON_UDMA_PROTOCOL_PACKET_DMA;
+        pCommandInfo->commandParams.packetCommand.flags = MV_BIT0;
+    }
+    else
+    {
+        switch(pScb->dataDirection)
+        {
+            case MV_SCSI_COMMAND_DATA_DIRECTION_IN:
+                pCommandInfo->commandParams.packetCommand.protocolType = MV_NON_UDMA_PROTOCOL_PACKET_PIO_DATA_IN;
+                break;
+            case MV_SCSI_COMMAND_DATA_DIRECTION_OUT:
+                pCommandInfo->commandParams.packetCommand.protocolType = MV_NON_UDMA_PROTOCOL_PACKET_PIO_DATA_OUT;
+                break;
+        default:
+                pCommandInfo->commandParams.packetCommand.protocolType = MV_NON_UDMA_PROTOCOL_PACKET_PIO_NON_DATA;
+        }
+    }
+    pScb->sequenceNumber = 0;
+    result = mvSataQueueCommand(pSataAdapter, pScb->bus, pCommandInfo);
+
+    if (result != MV_QUEUE_COMMAND_RESULT_OK)
+    {
+        checkQueueCommandResult(pScb, result);
+#ifdef MV_LOGGER
+        reportScbCompletion(pSataAdapter, pScb);
+#endif
+        pScb->completionCallBack(pSataAdapter, pScb);
+        return MV_SCSI_COMMAND_STATUS_COMPLETED;
+    }
+    return MV_SCSI_COMMAND_STATUS_QUEUED;
+}
+#endif
+MV_SCSI_COMMAND_STATUS_TYPE mvSataExecuteScsiCommand(MV_SATA_SCSI_CMD_BLOCK  *pScb)
+{
+    MV_U8               *cmd = pScb->ScsiCdb;
+    MV_BOOLEAN          invalidCDB = MV_FALSE;
+    MV_SATA_ADAPTER *pSataAdapter = pScb->pSalAdapterExtension->pSataAdapter;
+    MV_SATA_SCSI_DRIVE_DATA *pDriveData;
+
+    mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "Scsi Command Received, adapter %d bus %d target %d lun %"
+             "d pScb %p\n    Data Buffer length %d, Sense buffer length %x\n",
+             pSataAdapter->adapterId, pScb->bus, pScb->target,
+             pScb->lun, pScb, pScb->dataBufferLength, pScb->senseBufferLength);
+
+#ifdef MV_LOGGER
+
+    {
+        MV_U8 buffer[50];
+        MV_U32  i, index;
+
+        index = SAL_SPRINTF(buffer, "%s", "CDB:");
+        for (i =0 ; i < pScb->ScsiCdbLength; i++)
+        {
+            index += SAL_SPRINTF(&buffer[index], "%x ",
+                                 pScb->ScsiCdb[i]);
+        }
+        buffer[index] = '\n';
+        buffer[index+1] = 0;
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, buffer);
+    }
+#endif
+    pScb->dataTransfered = 0;
+    pScb->senseDataLength = 0;
+    pScb->ScsiStatus = 0;
+    if (pScb->bus >= pSataAdapter->numberOfChannels)
+    {
+        pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_INVALID_BUS;
+        pScb->dataTransfered = 0;
+#ifdef MV_LOGGER
+        reportScbCompletion(pSataAdapter, pScb);
+#endif
+        pScb->completionCallBack(pSataAdapter, pScb);
+        return MV_SCSI_COMMAND_STATUS_COMPLETED;
+    }
+
+    if ((pScb->target >= MV_SATA_PM_MAX_PORTS) ||
+        (pScb->pSalAdapterExtension->ataDriveData[pScb->bus][pScb->target].driveReady == MV_FALSE) ||
+        ((pScb->lun) && (pScb->ScsiCdb[0] != SCSI_OPCODE_INQUIRY)))
+    {
+        pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_NO_DEVICE;
+        pScb->dataTransfered = 0;
+#ifdef MV_LOGGER
+        reportScbCompletion(pSataAdapter, pScb);
+#endif
+        pScb->completionCallBack(pSataAdapter, pScb);
+        return MV_SCSI_COMMAND_STATUS_COMPLETED;
+    }
+    pDriveData = &pScb->pSalAdapterExtension->ataDriveData[pScb->bus][pScb->target];
+#ifdef MV_SUPPORT_ATAPI
+    if(pDriveData->identifyInfo.deviceType == MV_SATA_DEVICE_TYPE_ATAPI_DEVICE)
+    {
+        return mvScsiAtaSendATAPICommand(pSataAdapter, pScb);
+    }
+#endif
+    switch (cmd[0])
+    {
+    case SCSI_OPCODE_READ10:
+    case SCSI_OPCODE_WRITE10:
+    case SCSI_OPCODE_READ_CAPACITY10:
+    case SCSI_OPCODE_VERIFY10:
+    case SCSI_OPCODE_SYNCHRONIZE_CACHE10:
+
+#ifdef MV_SATA_SUPPORT_READ_WRITE_LONG
+    case SCSI_OPCODE_WRITE_LONG10:
+    case SCSI_OPCODE_READ_LONG10:
+#endif
+        if (cmd[1] & MV_BIT0) /* if related address*/
+        {
+            invalidCDB = MV_TRUE;
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " %d %d %d: Scsi command received with "
+                     "RELADR bit enabled - returning ILLEGAL REQUEST\n"
+                     ,pSataAdapter->adapterId, pScb->bus, pScb->target);
+
+        }
+    }
+    if (cmd[pScb->ScsiCdbLength - 1] != 0) /*if CONTROL is set*/
+    {
+        MV_BOOLEAN commandSupported = MV_TRUE;
+
+        switch (cmd[0])
+        {
+        case SCSI_OPCODE_READ6:
+        case SCSI_OPCODE_READ10:
+        case SCSI_OPCODE_READ16:
+        case SCSI_OPCODE_WRITE6:
+        case SCSI_OPCODE_WRITE10:
+        case SCSI_OPCODE_WRITE16:
+        case SCSI_OPCODE_INQUIRY:
+        case SCSI_OPCODE_TEST_UNIT_READY:
+        case SCSI_OPCODE_MODE_SELECT6:
+        case SCSI_OPCODE_MODE_SENSE6:
+        case SCSI_OPCODE_READ_CAPACITY10:     /* read capctiy CDB*/
+        case SCSI_OPCODE_REQUEST_SENSE6:
+        case SCSI_OPCODE_VERIFY6:
+        case SCSI_OPCODE_VERIFY10:
+        case SCSI_OPCODE_VERIFY16:
+        case SCSI_OPCODE_SYNCHRONIZE_CACHE10:
+        case SCSI_OPCODE_SYNCHRONIZE_CACHE16:
+        case SCSI_OPCODE_SEEK10:
+        case SCSI_OPCODE_REASSIGN_BLOCKS:
+	case SCSI_OPCODE_REPORT_LUNS:
+#ifdef MV_SATA_SUPPORT_READ_WRITE_LONG
+        case SCSI_OPCODE_WRITE_LONG10:
+        case SCSI_OPCODE_READ_LONG10:
+#endif
+
+            break;
+        default:
+            commandSupported = MV_FALSE;
+        }
+        if (commandSupported == MV_TRUE)
+        {
+            invalidCDB = MV_TRUE;
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "[%d,%d] Scsi command received with "
+                     "none zero CONTROL bits - returning ILLEGAL REQUEST\n"
+                     ,pSataAdapter->adapterId, pScb->bus);
+        }
+    }
+
+    if (pDriveData->UAConditionPending == MV_TRUE)
+    {
+        if (((cmd[0] != SCSI_OPCODE_INQUIRY) &&
+	     (cmd[0] != SCSI_OPCODE_REPORT_LUNS) &&
+             (cmd[0] != SCSI_OPCODE_REQUEST_SENSE6)) || (invalidCDB == MV_TRUE))
+        {
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " Unit Attention condition is pending.\n");
+
+            if (pDriveData->UAEvents & MV_BIT0)
+            {
+                mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "Report Bus Reset.\n");
+                pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_UA_RESET;
+                setSenseData(pScb, SCSI_SENSE_UNIT_ATTENTION, SCSI_ADSENSE_BUS_RESET
+                             , 2);
+                pDriveData->UAEvents &= ~MV_BIT0;
+            }
+            else if (pDriveData->UAEvents & MV_BIT1)
+            {
+                mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "Report Mode Parameters Changed.\n");
+                pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_UA_PARAMS_CHANGED;
+                setSenseData(pScb, SCSI_SENSE_UNIT_ATTENTION,
+                             SCSI_ADSENSE_PARAMETERS_CHANGED, 1);
+                pDriveData->UAEvents &= ~MV_BIT1;
+            }
+
+            pScb->ScsiStatus = MV_SCSI_STATUS_CHECK_CONDITION;
+            pScb->dataTransfered = 0;
+#ifdef MV_LOGGER
+            reportScbCompletion(pSataAdapter, pScb);
+#endif
+            pScb->completionCallBack(pSataAdapter, pScb);
+            if (pDriveData->UAEvents == 0)
+            {
+                pDriveData->UAConditionPending = MV_FALSE;
+            }
+            return MV_SCSI_COMMAND_STATUS_COMPLETED;
+        }
+    }
+    if (invalidCDB == MV_TRUE)
+    {
+        setSenseData(pScb, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ADSENSE_INVALID_CDB,
+                     0);
+        pScb->ScsiStatus = MV_SCSI_STATUS_CHECK_CONDITION;
+        pScb->dataTransfered = 0;
+        pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_BAD_SCSI_COMMAND;
+#ifdef MV_LOGGER
+        reportScbCompletion(pSataAdapter, pScb);
+#endif
+        pScb->completionCallBack(pSataAdapter, pScb);
+        return MV_SCSI_COMMAND_STATUS_COMPLETED;
+    }
+
+    switch (cmd[0])
+    {
+    case SCSI_OPCODE_READ6:
+    case SCSI_OPCODE_READ10:
+    case SCSI_OPCODE_READ16:
+    case SCSI_OPCODE_WRITE6:
+    case SCSI_OPCODE_WRITE10:
+    case SCSI_OPCODE_WRITE16:
+        return mvScsiAtaSendDataCommand(pSataAdapter, pScb);
+    case SCSI_OPCODE_INQUIRY:
+        return mvScsiAtaGetInquiryData(pSataAdapter, pScb);
+    case SCSI_OPCODE_TEST_UNIT_READY:
+        return mvScsiAtaTestUnitReady(pSataAdapter, pScb);
+    case SCSI_OPCODE_MODE_SELECT6:
+        return mvScsiAtaModeSelect(pSataAdapter, pScb);
+    case SCSI_OPCODE_MODE_SENSE6:
+        return mvScsiAtaGetModeSenseData(pSataAdapter,pScb);
+        /* Used to detect write protected status.*/
+    case SCSI_OPCODE_READ_CAPACITY10:     /* read capctiy CDB*/
+        return mvScsiAtaGetReadCapacityData(pSataAdapter, pScb);
+    case SCSI_OPCODE_READ_CAPACITY16:     /* read capctiy CDB*/
+        return mvScsiAtaGetReadCapacity16Data(pSataAdapter, pScb);
+    case SCSI_OPCODE_REQUEST_SENSE6:
+        return mvScsiAtaGetRequestSenseData(pSataAdapter, pScb);
+    case SCSI_OPCODE_REPORT_LUNS:
+        return mvScsiAtaReportLuns(pSataAdapter, pScb);
+    case SCSI_OPCODE_VERIFY6:
+    case SCSI_OPCODE_VERIFY10:
+    case SCSI_OPCODE_VERIFY16:
+        return mvScsiAtaSendVerifyCommand(pSataAdapter, pScb);
+    case SCSI_OPCODE_SYNCHRONIZE_CACHE10:
+    case SCSI_OPCODE_SYNCHRONIZE_CACHE16:
+        return mvScsiAtaSendSyncCacheCommand(pSataAdapter, pScb);
+    case SCSI_OPCODE_SEEK10:
+        return mvScsiAtaSeek(pSataAdapter, pScb);
+    case SCSI_OPCODE_REASSIGN_BLOCKS:
+        return mvScsiAtaReassignBlocks(pSataAdapter, pScb);
+#ifdef MV_SATA_SUPPORT_READ_WRITE_LONG
+    case SCSI_OPCODE_WRITE_LONG10:
+        return mvScsiAtaWriteLong(pSataAdapter, pScb);
+    case SCSI_OPCODE_READ_LONG10:
+        return mvScsiAtaReadLong(pSataAdapter, pScb);
+#endif
+
+    default:
+        {
+            setSenseData(pScb, SCSI_SENSE_ILLEGAL_REQUEST,
+                         SCSI_ADSENSE_ILLEGAL_COMMAND, 0);
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG_ERROR, "mvExecuteScsiCommand: ERROR: Unsupported command %02X\n", pScb->ScsiCdb[0]);
+            pScb->ScsiStatus = MV_SCSI_STATUS_CHECK_CONDITION;
+            pScb->dataTransfered = 0;
+            pScb->ScsiCommandCompletion = MV_SCSI_COMPLETION_BAD_SCSI_COMMAND;
+#ifdef MV_LOGGER
+            reportScbCompletion(pSataAdapter, pScb);
+#endif
+            pScb->completionCallBack(pSataAdapter, pScb);
+            return MV_SCSI_COMMAND_STATUS_COMPLETED;
+
+        }
+    }
+
+    return MV_SCSI_COMMAND_STATUS_FAILED;
+}
+
+MV_VOID mvSataScsiPostIntService(MV_SAL_ADAPTER_EXTENSION *pAdapterExt)
+{
+    MV_SATA_SCSI_CMD_BLOCK  *pScb = pAdapterExt->pHead;
+    while (pScb)
+    {
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, "Post Interrupt Service: pScb %p command %x\n", pScb,
+                 pScb->ScsiCdb[0]);
+        switch (pScb->ScsiCdb[0])
+        {
+	case    SCSI_OPCODE_VERIFY16:
+        case    SCSI_OPCODE_VERIFY10:
+        case    SCSI_OPCODE_VERIFY6:
+            mvScsiAtaSendSplittedVerifyCommand(pScb);
+            break;
+        case    SCSI_OPCODE_MODE_SELECT6:
+            mvScsiAtaSendReadLookAhead(pAdapterExt->pSataAdapter,
+                                       pScb);
+            break;
+        default:
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG_ERROR, " Post Interrupt Service called for bad scsi"
+                     " command(%x)\n", pScb->ScsiCdb[0]);
+        }
+        pScb = pScb->pNext;
+    }
+    pAdapterExt->pHead = NULL;
+    return;
+}
+
+MV_VOID     mvSataScsiSetDriveReady(MV_SAL_ADAPTER_EXTENSION *pAdapterExt,
+                                    MV_U8   channelIndex, MV_U8 PMPort,
+                                    MV_BOOLEAN  isReady)
+{
+    if (isReady == MV_TRUE)
+    {
+        mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " %d %d %d: ATA Drive is Ready.\n",
+                 pAdapterExt->pSataAdapter->adapterId, channelIndex, PMPort);
+        pAdapterExt->ataDriveData[channelIndex][PMPort].driveReady = MV_TRUE;
+        pAdapterExt->totalAccumulatedOutstanding[channelIndex] = 0;
+        pAdapterExt->ataDriveData[channelIndex][PMPort].stats.totalIOs = 0;
+        pAdapterExt->ataDriveData[channelIndex][PMPort].stats.totalSectorsTransferred = 0;
+    }
+    else
+    {
+        if (PMPort == 0xFF)
+        {
+            MV_U8   i;
+
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " %d %d  : SATA Channel is Removed.\n",
+                     pAdapterExt->pSataAdapter->adapterId, channelIndex);
+            for (i = 0; i < MV_SATA_PM_MAX_PORTS; i++)
+            {
+                mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " %d %d %d: SATA Drive is Removed.\n",
+                         pAdapterExt->pSataAdapter->adapterId, channelIndex,
+                         i);
+                pAdapterExt->ataDriveData[channelIndex][i].driveReady = MV_FALSE;
+            }
+
+        }
+        else
+        {
+            mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " %d %d %d: SATA Drive is Removed.\n",
+                     pAdapterExt->pSataAdapter->adapterId, channelIndex,
+                     PMPort);
+            pAdapterExt->ataDriveData[channelIndex][PMPort].driveReady = MV_FALSE;
+
+        }
+    }
+}
+
+
+/* notify the translation layer with Reset and Power on reset*/
+MV_VOID mvSataScsiNotifyUA(MV_SAL_ADAPTER_EXTENSION *pAdapterExt,
+                           MV_U8    channelIndex, MV_U8 PMPort)
+{
+    pAdapterExt->ataDriveData[channelIndex][PMPort].UAConditionPending = MV_TRUE;
+    /* bit 0 - reset*/
+    /* bit 1 - parameters changed*/
+    pAdapterExt->ataDriveData[channelIndex][PMPort].UAEvents = MV_BIT1 | MV_BIT0;
+    pAdapterExt->ataDriveData[channelIndex][PMPort].UAEvents &=
+    pAdapterExt->UAMask;
+    mvLogMsg(MV_SAL_LOG_ID, MV_DEBUG, " %d %d %d: Notify SAL with Unit Attention condition.\n",
+             pAdapterExt->pSataAdapter->adapterId, channelIndex, PMPort);
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sata/mvScsiAtaLayer.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sata/mvScsiAtaLayer.h
@@ -0,0 +1,399 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+*******************************************************************************/
+/*******************************************************************************
+* mvScsiAtaLayer.c
+*
+* DESCRIPTION:
+*       C implementation for SCSI to ATA translation layer.
+*
+* DEPENDENCIES:
+*   mvIALCommonUtils.h
+*   mvSata.h
+*   mvStorageDev.h
+*   mvOs.h
+*
+*******************************************************************************/
+#ifndef __INCmvScsiAtaLayer
+#define __INCmvScsiAtaLayer
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/* includes */
+#include "mvOs.h"
+#include "mvSata.h"
+#include "mvStorageDev.h"
+#include "mvIALCommonUtils.h"
+
+/* Defines */
+#define MV_SAL_LOG_ID       1
+
+
+#ifndef IN
+#define IN
+#endif
+
+#ifndef OUT
+#define OUT
+#endif
+
+#ifndef INOUT
+#define INOUT
+#endif
+
+/* Scsi opcodes*/
+/* 6 - bytes commands*/
+#define SCSI_OPCODE_TEST_UNIT_READY         0x00
+#define SCSI_OPCODE_REPORT_LUNS		    0xA0
+#define SCSI_OPCODE_REQUEST_SENSE6          0x03
+#define SCSI_OPCODE_REASSIGN_BLOCKS         0x07
+#define SCSI_OPCODE_READ6                   0x08
+#define SCSI_OPCODE_WRITE6                  0x0A
+#define SCSI_OPCODE_INQUIRY                 0x12
+#define SCSI_OPCODE_VERIFY6                 0x13
+#define SCSI_OPCODE_MODE_SELECT6            0x15
+#define SCSI_OPCODE_MODE_SENSE6             0x1A
+
+/* 10 - bytes commands*/
+#define SCSI_OPCODE_READ_CAPACITY10         0x25
+#define SCSI_OPCODE_READ10                  0x28
+#define SCSI_OPCODE_WRITE10                 0x2A
+#define SCSI_OPCODE_VERIFY10                0x2F
+#define SCSI_OPCODE_SYNCHRONIZE_CACHE10     0x35
+#define SCSI_OPCODE_SEEK10                  0x2B
+#define SCSI_OPCODE_WRITE_LONG10            0x3F
+#define SCSI_OPCODE_READ_LONG10				0x3E
+
+/* 12 - bytes commands */
+/* 16 - bytes commands */
+#define SCSI_OPCODE_READ_CAPACITY16         0x9E
+#define SCSI_OPCODE_READ16                  0x88
+#define SCSI_OPCODE_WRITE16                 0x8A
+#define SCSI_OPCODE_VERIFY16                0x8F
+#define SCSI_OPCODE_SYNCHRONIZE_CACHE16     0x91
+
+
+    /* SCSI bus status codes */
+#define MV_SCSI_STATUS_GOOD                  0x00
+#define MV_SCSI_STATUS_CHECK_CONDITION       0x02
+#define MV_SCSI_STATUS_CONDITION_MET         0x04
+#define MV_SCSI_STATUS_BUSY                  0x08
+#define MV_SCSI_STATUS_INTERMEDIATE          0x10
+#define MV_SCSI_STATUS_INTERMEDIATE_COND_MET 0x14
+#define MV_SCSI_STATUS_RESERVATION_CONFLICT  0x18
+#define MV_SCSI_STATUS_COMMAND_TERMINATED    0x22
+#define MV_SCSI_STATUS_QUEUE_FULL            0x28
+
+
+/* Typedefs */
+
+#if 0
+/* Scsi Sense Data Format */
+/* Max length - 18 bytes, the additional sense length will not exceed 10 bytes*/
+    typedef struct _mvScsiSenseData
+    {
+#ifdef MV_BIG_ENDIAN_BITFIELD
+        MV_U8 Valid:1;
+        MV_U8 ResponseCode:7;
+#else
+        MV_U8 ResponseCode:7;
+        MV_U8 Valid:1;
+#endif
+        MV_U8 Reserved1;
+#ifdef MV_BIG_ENDIAN_BITFIELD
+        MV_U8 FileMark:1;
+        MV_U8 EOM:1; /* End Of Media */
+        MV_U8 ILI:1; /* Incorrect Length Indicator*/
+        MV_U8 Reserved2:1;
+        MV_U8 SenseKey:4;
+#else
+        MV_U8 SenseKey:4;
+        MV_U8 Reserved2:1;
+        MV_U8 ILI:1; /* Incorrect Length Indicator*/
+        MV_U8 EOM:1; /* End Of Media */
+        MV_U8 FileMark:1;
+#endif        
+        MV_U8 Information[4];
+        MV_U8 AdditionalSenseLength;
+        MV_U8 CommandSpecificInformation[4];
+        MV_U8 AdditionalSenseCode;
+        MV_U8 AdditionalSenseCodeQualifier;
+        MV_U8 FieldReplaceableUnitCode;
+        MV_U8 SenseKeySpecific[3];
+    } MV_SCSI_SENSE_DATA;
+#else
+/* Scsi Sense Data Descriptor Format + information descriptor */
+/* Max length - 18 bytes, the additional sense length will not exceed 10 bytes*/
+    typedef struct _mvScsiInfoSenseDesc
+    {
+	    MV_U8 type;
+	    MV_U8 AdditionalLength;
+	    MV_U8 valid;
+	    MV_U8 reserved;
+	    MV_U8 information[11-4+1];
+    }MV_SCSI_INFO_SENSE_DESC;
+    typedef struct _mvScsiSenseData
+    {
+        MV_U8 ResponseCode;
+#ifdef MV_BIG_ENDIAN_BITFIELD
+        MV_U8 Reserved:4;
+        MV_U8 SenseKey:4;
+#else
+        MV_U8 SenseKey:4;
+        MV_U8 Reserved:4;
+#endif        
+        MV_U8 AdditionalSenseCode;
+        MV_U8 AdditionalSenseCodeQualifier;
+        MV_U8 Reserved2[3];
+        MV_U8 AdditionalSenseLength;
+	MV_SCSI_INFO_SENSE_DESC InformationDesc;
+    } MV_SCSI_SENSE_DATA;
+#endif
+/* Sense codes */
+
+#define SCSI_SENSE_NO_SENSE         0x00
+#define SCSI_SENSE_RECOVERED_ERROR  0x01
+#define SCSI_SENSE_NOT_READY        0x02
+#define SCSI_SENSE_MEDIUM_ERROR     0x03
+#define SCSI_SENSE_HARDWARE_ERROR   0x04
+#define SCSI_SENSE_ILLEGAL_REQUEST  0x05
+#define SCSI_SENSE_UNIT_ATTENTION   0x06
+#define SCSI_SENSE_DATA_PROTECT     0x07
+#define SCSI_SENSE_BLANK_CHECK      0x08
+#define SCSI_SENSE_UNIQUE           0x09
+#define SCSI_SENSE_COPY_ABORTED     0x0A
+#define SCSI_SENSE_ABORTED_COMMAND  0x0B
+#define SCSI_SENSE_EQUAL            0x0C
+#define SCSI_SENSE_VOL_OVERFLOW     0x0D
+#define SCSI_SENSE_MISCOMPARE       0x0E
+#define SCSI_SENSE_RESERVED         0x0F
+
+/* Additional Sense codes */
+
+#define SCSI_ADSENSE_NO_SENSE       0x00
+#define SCSI_ADSENSE_ILLEGAL_COMMAND 0x20
+#define SCSI_ADSENSE_ILLEGAL_BLOCK  0x21
+#define SCSI_ADSENSE_INVALID_CDB    0x24
+#define SCSI_ADSENSE_INVALID_LUN    0x25
+#define SCSI_ADSENSE_INVALID_FIELD_IN_PARAMETER_LIST    0x26
+#define SCSI_ADSENSE_BUS_RESET      0x29
+#define SCSI_ADSENSE_PARAMETERS_CHANGED     0x2A
+#define SCSI_ADSENSE_NO_MEDIA_IN_DEVICE 0x3a
+
+
+#define MV_SCSI_RESPONSE_CODE   0x72
+#define MV_SCSI_DIRECT_ACCESS_DEVICE    0x00
+#define MV_MAX_MODE_SENSE_RESULT_LENGTH 50
+
+
+/* Typedefs */
+    typedef enum _mvScsiCompletionType
+    {
+        MV_SCSI_COMPLETION_INVALID_STATUS,
+        MV_SCSI_COMPLETION_SUCCESS,
+        MV_SCSI_COMPLETION_BAD_SCB,
+        MV_SCSI_COMPLETION_BAD_SCSI_COMMAND,
+        MV_SCSI_COMPLETION_ATA_FAILED,
+        MV_SCSI_COMPLETION_QUEUE_FULL,
+        MV_SCSI_COMPLETION_NOT_READY,
+        MV_SCSI_COMPLETION_ABORTED,
+        MV_SCSI_COMPLETION_OVERRUN,
+        MV_SCSI_COMPLETION_UNDERRUN,
+        MV_SCSI_COMPLETION_PARITY_ERROR,
+        MV_SCSI_COMPLETION_DISCONNECT,
+        MV_SCSI_COMPLETION_NO_DEVICE,
+        MV_SCSI_COMPLETION_INVALID_BUS,
+        MV_SCSI_COMPLETION_BUS_RESET,
+        MV_SCSI_COMPLETION_BUSY,
+        MV_SCSI_COMPLETION_UA_RESET,
+        MV_SCSI_COMPLETION_UA_PARAMS_CHANGED
+    }MV_SCSI_COMPLETION_TYPE;
+
+    typedef enum _mvScsiCommandStatus
+    {
+        MV_SCSI_COMMAND_STATUS_COMPLETED,
+        MV_SCSI_COMMAND_STATUS_QUEUED,
+        MV_SCSI_COMMAND_STATUS_FAILED,
+        MV_SCSI_COMMAND_STATUS_QUEUED_BY_IAL
+    }MV_SCSI_COMMAND_STATUS_TYPE;
+
+    typedef enum _mvScsiCommandDataDirection
+    {
+        MV_SCSI_COMMAND_DATA_DIRECTION_NON,
+        MV_SCSI_COMMAND_DATA_DIRECTION_IN,
+        MV_SCSI_COMMAND_DATA_DIRECTION_OUT
+    } MV_SCSI_COMMAND_DATA_DIRECTION;
+
+    struct _mvSataScsiCmdBlock;
+
+    typedef MV_BOOLEAN (* mvScsiCommandCompletionCallBack)(struct mvSataAdapter *,
+                                                           struct _mvSataScsiCmdBlock*);
+
+    struct mvSalAdapterExtension;
+    struct mvIalCommonAdapterExtension;
+
+    typedef struct _mvSataScsiCmdBlock
+    {
+        /*  the Scsi command data block buffer*/
+        IN MV_U8*       ScsiCdb;
+
+        /* the length in bytes of the CDB (6,10,12,16)*/
+        IN MV_U32       ScsiCdbLength;
+
+        /* the scsi bus*/
+        IN MV_U8        bus;
+
+        /* the target device id*/
+        IN MV_U8        target;
+
+        /* scsi lun number of the device*/
+        IN MV_U8        lun;
+
+        /* True when the data located in the buffer pointed by pDataBuffer  */
+        /* (virtual address), false when the command is READ/WRITE, in this */
+        /* case the data located in a PRD table*/
+        /*IN MV_BOOLEAN useSingleBuffer;*/
+
+        /* pointer to the command data buffer*/
+        IN MV_U8        *pDataBuffer;
+
+        /* length in bytes of the command data buffer*/
+        IN MV_U32       dataBufferLength;
+
+        /* number of entries in the PRD table*/
+        /*IN MV_U32     PRDTableEntries; */
+
+        /* low 32 bits of the PRD table physical address*/
+        IN MV_U32       PRDTableLowPhyAddress;
+
+        /* high 32 bits of the PRD table physical address*/
+        IN MV_U32       PRDTableHighPhyAddress;
+
+#ifdef MV_SATA_SUPPORT_EDMA_SINGLE_DATA_REGION
+        MV_BOOLEAN      singleDataRegion;
+        MV_U16          byteCount;
+#endif
+        /* the Scsi status will be written to this field*/
+        OUT MV_U8       ScsiStatus;
+
+        /* pointer to the Scsi sense buffer*/
+        IN MV_U8*       pSenseBuffer;
+
+        /* length in bytes of the Scsi sense buffer*/
+        IN MV_U32       senseBufferLength;
+
+        /* length in bytes of the generated sense data*/
+        OUT MV_U32      senseDataLength;
+
+        /* length in bytes of the data transferred to the data buffer/s*/
+        OUT MV_U32      dataTransfered;
+
+        /* the translation layer status of the completed Scsi command */
+        OUT MV_SCSI_COMPLETION_TYPE ScsiCommandCompletion;
+        /* call back function called by the translation layer when the Scsi */
+        /* completed    */
+        IN mvScsiCommandCompletionCallBack completionCallBack;
+
+        IN struct mvSalAdapterExtension * pSalAdapterExtension;
+        IN struct mvIALCommonAdapterExtension* pIalAdapterExtension;
+
+        IN MV_SCSI_COMMAND_DATA_DIRECTION dataDirection;
+#ifdef MV_SATA_STORE_COMMANDS_INFO_ON_IAL_STACK
+        MV_QUEUE_COMMAND_INFO   *pCommandInfo;
+#endif
+        /* field for IAL usage only*/
+        MV_VOID_PTR     IALData;
+        /* fields for internal usage for the translation layer*/
+
+
+        MV_UDMA_TYPE            udmaType;
+        MV_QUEUED_COMMAND_TYPE  commandType;
+        /* used for sense buffer */
+        MV_U32                  LowLbaAddress;
+        /* Used for non-UDMA and for sense buffer */
+        MV_BOOLEAN              isExtended;
+        MV_U16                  splitCount;
+        MV_U16                  sequenceNumber;
+        /* used to create list for comands that need post interrupt service */
+        struct _mvSataScsiCmdBlock  *pNext;
+#ifdef MV_LOGGER
+        MV_STORAGE_DEVICE_REGISTERS ATAregStruct;
+#endif
+    }MV_SATA_SCSI_CMD_BLOCK;
+
+    typedef struct
+    {
+        MV_U32              totalIOs;
+        MV_U32              totalSectorsTransferred;
+    }MV_SATA_SCSI_CHANNEL_STATS;
+
+    typedef struct
+    {
+        MV_BOOLEAN          driveReady;
+        ATA_IDENTIFY_INFO   identifyInfo;
+        MV_U16_PTR          identifyBuffer;
+        MV_SATA_SCSI_CHANNEL_STATS stats;
+        MV_BOOLEAN          UAConditionPending;
+        MV_U8               UAEvents;
+    }MV_SATA_SCSI_DRIVE_DATA;
+
+    typedef struct mvSalAdapterExtension
+    {
+        MV_SATA_ADAPTER *pSataAdapter;
+        MV_SATA_SCSI_CMD_BLOCK  *pHead;
+        MV_U8                   UAMask;/*which UA condictions to report*/
+        MV_U32  totalAccumulatedOutstanding[MV_SATA_CHANNELS_NUM];
+        MV_SATA_SCSI_DRIVE_DATA     ataDriveData[MV_SATA_CHANNELS_NUM][MV_SATA_PM_MAX_PORTS];
+        MV_U16  identifyBuffer[MV_SATA_CHANNELS_NUM][MV_ATA_IDENTIFY_DEV_DATA_LENGTH];
+
+    }MV_SAL_ADAPTER_EXTENSION;
+
+
+    MV_VOID     mvSataScsiInitAdapterExt(MV_SAL_ADAPTER_EXTENSION *pAdapterExt,
+                                         MV_SATA_ADAPTER* pSataAdapter);
+
+    MV_VOID     mvSataScsiPostIntService(MV_SAL_ADAPTER_EXTENSION *pAdapterExt);
+
+
+    MV_SCSI_COMMAND_STATUS_TYPE mvSataExecuteScsiCommand(MV_SATA_SCSI_CMD_BLOCK *pMvSataScsiCmdBlock);
+
+    MV_VOID     mvSataScsiSetDriveReady(MV_SAL_ADAPTER_EXTENSION *pAdapterExt,
+                                        MV_U8   channelIndex, MV_U8 PMPort,
+                                        MV_BOOLEAN  isReady);
+
+    MV_VOID mvSataScsiNotifyUA(MV_SAL_ADAPTER_EXTENSION *pAdapterExt,
+                               MV_U8    channelIndex, MV_U8 PMPort);
+
+/* Locals */
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* __IsNCmvScsiAtaLayer */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sata/mvLinuxIalHt.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sata/mvLinuxIalHt.h
@@ -0,0 +1,263 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+*******************************************************************************/
+/*******************************************************************************
+* file_name - mvLinuxIalHt.h
+*
+* DESCRIPTION: header file for the layer that emulates SCSI adapter on the
+*           SATA adapter
+*
+*
+* DEPENDENCIES:
+*   None.
+*
+*
+******************************************************************************/
+#ifndef __INCmvLinuxIalHth
+#define __INCmvLinuxIalHth
+
+#include <linux/version.h>
+#include <linux/autoconf.h>
+#include <linux/module.h>
+#include <linux/autoconf.h>
+#include <linux/init.h>
+#include <linux/types.h>
+
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+#include <scsi/scsi.h>
+#include <scsi/scsi_cmnd.h>
+#include <scsi/scsi_device.h>
+#include <scsi/scsi_host.h>
+#include <scsi/scsi_tcq.h>
+#include <scsi/scsi_eh.h>
+#else
+#include <linux/blk.h>
+#include "scsi.h"
+#include "hosts.h"
+#endif
+
+#include "mvOs.h"
+#include "mvSata.h"
+#include "mvStorageDev.h"
+#include "mvScsiAtaLayer.h"
+#include "mvLinuxIalLib.h"
+#include "mvIALCommon.h"
+
+#include <linux/blkdev.h>
+#include <linux/spinlock.h>
+/* Common forward declarations for all Linux-versions: */
+
+/* Interfaces to the midlevel Linux SCSI driver */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+extern int mv_ial_ht_detect (Scsi_Host_Template *);
+#else
+typedef struct scsi_host_template Scsi_Host_Template;
+#endif
+extern int mv_ial_ht_release (struct Scsi_Host *);
+extern int mv_ial_ht_queuecommand (struct scsi_cmnd *, void (*done) (struct scsi_cmnd *));
+extern int mv_ial_ht_bus_reset (struct scsi_cmnd *);
+extern int mv_ial_ht_abort(struct scsi_cmnd *SCpnt);
+
+#define HOSTDATA(host) ((IAL_HOST_T *)&host->hostdata)
+#define MV_IAL_ADAPTER(host) (HOSTDATA(host)->pAdapter)
+
+#define TEMP_DATA_BUFFER_LENGTH		    512
+
+/*#define MV_SUPPORT_1MBYTE_IOS*/
+#ifdef CONFIG_PCI_MSI
+/*#define MV_SUPPORT_MSI*/
+#endif
+
+
+#ifndef MRVL_SATA_BUFF_BOUNDARY
+#define MRVL_SATA_BUFF_BOUNDARY (1 << 24)
+#endif /* MRVL_SATA_BUFF_BOUNDARY */
+
+#define MRVL_SATA_BOUNDARY_MASK (MRVL_SATA_BUFF_BOUNDARY - 1)
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+#define mvSata                                                          \
+{                                                                           \
+    module:     THIS_MODULE,\
+    proc_name:          "mvSata",                   /* proc_name */     \
+    proc_info:          mv_ial_ht_proc_info,    /*proc info fn */   \
+    slave_configure:    mv_ial_ht_slave_configure,\
+    name:               "Marvell SCSI to SATA adapter", /*name*/            \
+    release:            mv_ial_ht_release,              /*release fn*/      \
+    queuecommand:       mv_ial_ht_queuecommand,         /*queuecommand fn*/ \
+    bios_param:         NULL    /*mv_ial_ht_biosparam*/,/*bios fn*/     \
+    eh_device_reset_handler: NULL/*mv_ial_ht_dev_reset*/,                   \
+    eh_bus_reset_handler: mv_ial_ht_bus_reset,                              \
+    eh_abort_handler:   mv_ial_ht_abort,                                    \
+    can_queue:          MV_SATA_SW_QUEUE_SIZE,           /* unlimited */     \
+    this_id:            MV_SATA_PM_MAX_PORTS,                          /*set by detect*/   \
+    sg_tablesize:       64,                             /*sg_tablesize*/    \
+    max_sectors:        256,                                                \
+    cmd_per_lun:        MV_SATA_SW_QUEUE_SIZE,           /*cmd_per_lun*/     \
+    unchecked_isa_dma:  0,                              /*32-Bit Busmaster*/\
+    emulated:           1,                      /* not real scsi adapter */ \
+    use_clustering:     ENABLE_CLUSTERING               /*use_clustering*/  \
+}
+#else
+#define mvSata                                                          \
+{                                                                           \
+    proc_name:          "mvSata",                   /* proc_name */     \
+    proc_info:          mv_ial_ht_proc_info24,  /*proc info fn */   \
+    select_queue_depths: NULL,              \
+    name:               "Marvell SCSI to SATA adapter", /*name*/            \
+    detect:             mv_ial_ht_detect,               /*detect fn*/       \
+    release:            mv_ial_ht_release,              /*release fn*/      \
+    command:            NULL,                           /*command fn*/      \
+    queuecommand:       mv_ial_ht_queuecommand,         /*queuecommand fn*/ \
+    bios_param:         NULL    /*mv_ial_ht_biosparam*/,/*bios fn*/     \
+    eh_device_reset_handler: NULL/*mv_ial_ht_dev_reset*/,                   \
+    eh_bus_reset_handler: mv_ial_ht_bus_reset,                              \
+    eh_abort_handler:   mv_ial_ht_abort,                                    \
+    can_queue:          MV_SATA_SW_QUEUE_SIZE,                         /* unlimited */     \
+    this_id:            MV_SATA_PM_MAX_PORTS,                              /*set by detect*/   \
+    sg_tablesize:       64,                             /*sg_tablesize*/    \
+    max_sectors:        256,                                                \
+    cmd_per_lun:        MV_SATA_SW_QUEUE_SIZE,           /*cmd_per_lun*/     \
+    unchecked_isa_dma:  0,                              /*32-Bit Busmaster*/\
+    emulated:           1,                      /* not real scsi adapter */ \
+    use_new_eh_code:    1,                                                  \
+    highmem_io:         1,                           /*highmem_io enabled*/\
+    use_clustering:     ENABLE_CLUSTERING               /*use_clustering*/  \
+}
+#endif
+
+
+#define MV_IAL_HT_SACOALT_DEFAULT   4
+#define MV_IAL_HT_SAITMTH_DEFAULT   (150 * 50)
+
+/****************************************/
+/*          GENERAL Definitions         */
+/****************************************/
+
+struct IALHost;
+
+/*struct prdPool;*/
+typedef struct IALAdapter
+{
+    MV_SATA_ADAPTER     mvSataAdapter;
+    MV_U8               activeHosts;
+    int                 maxHosts;
+    struct IALHost      *host[MV_SATA_CHANNELS_NUM];
+    struct pci_dev      *pcidev;
+    u8                  rev_id; /* adapter revision id */
+    u8                  *requestsArrayBaseAddr;
+    u8                  *requestsArrayBaseAlignedAddr;
+    dma_addr_t          requestsArrayBaseDmaAddr;
+    dma_addr_t          requestsArrayBaseDmaAlignedAddr;
+    u8                  *responsesArrayBaseAddr;
+    u8                  *responsesArrayBaseAlignedAddr;
+    dma_addr_t          responsesArrayBaseDmaAddr;
+    dma_addr_t          responsesArrayBaseDmaAlignedAddr;
+    u32                  requestQueueSize;
+    u32                  responseQueueSize;
+    u32                 procNumOfInterrupts;
+    MV_IAL_COMMON_ADAPTER_EXTENSION ialCommonExt;
+    MV_BOOLEAN          stopAsyncTimer;
+    struct timer_list   asyncStartTimer;
+    MV_SAL_ADAPTER_EXTENSION  *ataScsiAdapterExt;
+    spinlock_t          adapter_lock;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+    struct semaphore    rescan_mutex;
+    atomic_t            stopped;
+#endif
+    MV_U16		tempDataBuffer[TEMP_DATA_BUFFER_LENGTH/2];
+} IAL_ADAPTER_T;
+
+typedef struct IALHost
+{
+    struct Scsi_Host* scsihost;
+    MV_U8 channelIndex;
+    IAL_ADAPTER_T* pAdapter;
+    MV_EDMA_MODE mode;
+    MV_SATA_SWITCHING_MODE switchingMode;
+    MV_BOOLEAN  use128Entries;
+    void  *prdPool[MV_SATA_GEN2E_SW_QUEUE_SIZE];
+    void  *prdPoolAligned[MV_SATA_GEN2E_SW_QUEUE_SIZE];
+    MV_U32  freePRDsNum;
+    struct scsi_cmnd *scsi_cmnd_done_head, *scsi_cmnd_done_tail;
+    MV_BOOLEAN  hostBlocked;
+} IAL_HOST_T;
+
+/******************************************************************************
+* We use the Scsi_Pointer structure that's included with each command
+* SCSI_Cmnd as a scratchpad for our SRB. This allows us to accept
+* an unlimited number of commands.
+*
+* SCp will always point to mv_comp_info structure
+*******************************************************************************/
+
+/* UDMA command completion info */
+struct mv_comp_info
+{
+    struct scsi_cmnd           *SCpnt;
+    MV_SATA_EDMA_PRD_ENTRY  *cpu_PRDpnt;
+    dma_addr_t      dma_PRDpnt;
+    dma_addr_t      single_buff_busaddr;
+    unsigned int        allocated_entries;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+    unsigned int        kmap_buffer;
+#endif
+    unsigned int        seq_number;
+    MV_SATA_SCSI_CMD_BLOCK  *pSALBlock;
+    struct scsi_cmnd           *next_done;
+};
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)
+#define scsi_bufflen(p)		((p)->request_bufflen)
+#define use_sg(p)		((p)->use_sg)
+#else
+#define use_sg(p)		1
+#endif
+
+
+/* Once pci64_ DMA mapping interface is in, kill this. */
+/*#define pci64_alloc_consistent(d,s,p) pci_alloc_consistent((d),(s),(p))*/
+/*#define pci64_free_consistent(d,s,c,a) pci_free_consistent((d),(s),(c),(a))*/
+
+#define pci64_map_single(d,c,s,dir) pci_map_single((d),(c),(s),(dir))
+#define pci64_map_sg(d,s,n,dir) pci_map_sg((d),(s),(n),(dir))
+#define pci64_unmap_single(d,a,s,dir) pci_unmap_single((d),(a),(s),(dir))
+#define pci64_unmap_sg(d,s,n,dir) pci_unmap_sg((d),(s),(n),(dir))
+
+#if (BITS_PER_LONG > 32) || defined(CONFIG_HIGHMEM64G)
+#define pci64_dma_hi32(a) ((u32) (0xffffffff & (((u64)(a))>>32)))
+#define pci64_dma_lo32(a) ((u32) (0xffffffff & (((u64)(a)))))
+#else
+#define pci64_dma_hi32(a) 0
+#define pci64_dma_lo32(a) (a)
+#endif  /* BITS_PER_LONG */
+#define sg_dma64_address(s) sg_dma_address(s)
+#define sg_dma64_len(s) sg_dma_len(s)
+
+
+#endif /* __INCmvLinuxIalHth */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sata/mvLinuxIalSmart.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sata/mvLinuxIalSmart.h
@@ -0,0 +1,109 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+*******************************************************************************/
+/*******************************************************************************
+* file_name - mvLinuxIALSmart.h
+*
+* DESCRIPTION: C header file for S.M.A.R.T. features - smartmontools app
+*
+*
+* DEPENDENCIES:
+*   
+*
+*
+*******************************************************************************/
+#ifndef __INCmvScsiSmart
+#define __INCmvScsiSmart
+
+/*Proprietary opcode to support smartmontools app*/
+#define SCSI_OPCODE_MVSATA_SMART            0x0C
+
+
+/*S.M.A.R.T ATA commands used*/
+#ifndef WIN_IDENTIFY
+#define WIN_IDENTIFY                        0xEC
+#endif
+#ifndef WIN_SMART
+#define WIN_SMART                           0xB0    
+#endif
+#ifndef SMART_READ_VALUES
+#define SMART_READ_VALUES                   0xD0
+#endif
+#ifndef SMART_READ_THRESHOLDS   
+#define SMART_READ_THRESHOLDS               0xD1
+#endif
+#ifndef SMART_AUTOSAVE 
+#define SMART_AUTOSAVE                      0xD2
+#endif
+#ifndef SMART_SAVE
+#define SMART_SAVE                          0xD3
+#endif
+#ifndef SMART_IMMEDIATE_OFFLINE 
+#define SMART_IMMEDIATE_OFFLINE             0xD4
+#endif
+#ifndef SMART_READ_LOG_SECTOR
+#define SMART_READ_LOG_SECTOR               0xD5
+#endif
+#ifndef SMART_WRITE_LOG_SECTOR
+#define SMART_WRITE_LOG_SECTOR              0xD6
+#endif
+/* The following is obsolete -- don't use it!*/
+#ifndef SMART_WRITE_THRESHOLDS
+#define SMART_WRITE_THRESHOLDS              0xD7
+#endif
+#ifndef SMART_ENABLE
+#define SMART_ENABLE                        0xD8
+#endif
+#ifndef SMART_DISABLE
+#define SMART_DISABLE                       0xD9
+#endif
+#ifndef SMART_STATUS
+#define SMART_STATUS                        0xDA
+#endif
+
+/* The following is also marked obsolete in ATA-5*/
+#ifndef SMART_AUTO_OFFLINE
+#define SMART_AUTO_OFFLINE                  0xDB
+#endif
+
+/*Definitions of S.M.A.R.T. command buffer offsets*/
+#define SMART_BUF_COMMAND_OFFSET                0
+#define SMART_BUF_LBALOW_OFFSET                 1
+#define SMART_BUF_FEATURES_OFFSET               2
+#define SMART_BUF_SECTORCOUNT_OFFSET            3
+#define SMART_BUF_LBAMID_OFFSET                 4
+#define SMART_BUF_LBAHIGH_OFFSET                5
+#define SMART_BUF_DEVICE_OFFSET                 6
+#define SMART_BUF_ERROR_OFFSET                  7
+
+
+MV_SCSI_COMMAND_STATUS_TYPE  mvScsiAtaSendSmartCommand
+                (IN  MV_SATA_ADAPTER* pSataAdapter,
+                 IN  MV_SATA_SCSI_CMD_BLOCK *pScb);
+
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sata/mvLinuxIalHt.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sata/mvLinuxIalHt.c
@@ -0,0 +1,2005 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+*******************************************************************************/
+/*******************************************************************************
+* file_name - mvLinuxIalHt.c
+*
+* DESCRIPTION:  implementation for Linux IAL.
+*
+* DEPENDENCIES:
+*   mvLinuxIalHt.h
+*   mvLinuxIalLib.h
+*   Linux Os header files
+*   Core driver header files
+*
+*
+*******************************************************************************/
+
+/* includes */
+
+#ifndef LINUX_VERSION_CODE
+    #include <linux/version.h>
+#endif
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,0)
+    #error "This driver works only with kernel 2.4.0 or higher!"
+#endif
+
+#if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)))
+    #error "This driver does not support kernel 2.5!"
+#endif
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/string.h>
+#include <linux/slab.h>
+#include <linux/pci.h>
+#include <linux/ioport.h>
+#include <linux/delay.h>
+#include <linux/sched.h>
+#include <linux/proc_fs.h>
+#include <linux/stat.h>
+#include <linux/kdev_t.h>
+
+
+#ifdef CONFIG_MV_INCLUDE_INTEG_SATA
+#include <linux/platform_device.h>
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "mvSysSataApi.h"
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+#include <linux/blk.h>
+#include "scsi.h"
+#include "hosts.h"
+#else
+#include <scsi/scsi.h>
+#include <scsi/scsi_cmnd.h>
+#include <scsi/scsi_device.h>
+#include <scsi/scsi_host.h>
+#include <scsi/scsi_tcq.h>
+#endif
+
+#include <linux/timer.h>
+#include <linux/spinlock.h>
+#include <asm/dma.h>
+#include <asm/system.h>
+#include <asm/io.h>
+
+#include "mvLinuxIalHt.h"
+#include "mvRegs.h"
+#include "mvIALCommon.h"
+#include "mvLinuxIalSmart.h"
+
+unsigned int use_ncq = 0;
+module_param(use_ncq, int, 0);
+MODULE_PARM_DESC(use_ncq, "Allow NCQ configuration, otherwise use non queued. "
+                "(default: 0)");
+
+
+
+extern Scsi_Host_Template driver_template;
+
+static void mv_ial_init_log(void);
+
+static char mv_ial_proc_version[]="Version_1_1";
+extern void release_ata_mem(struct mv_comp_info * pInfo);
+extern MV_BOOLEAN IALCompletion(struct mvSataAdapter *pSataAdapter,
+                                MV_SATA_SCSI_CMD_BLOCK *pCmdBlock);
+
+static struct pci_device_id mvSata_pci_table[] =
+{
+    {MV_SATA_VENDOR_ID, MV_SATA_DEVICE_ID_5080, PCI_ANY_ID, PCI_ANY_ID, 0, 0},
+    {MV_SATA_VENDOR_ID, MV_SATA_DEVICE_ID_5081, PCI_ANY_ID, PCI_ANY_ID, 0, 0},
+    {MV_SATA_VENDOR_ID, MV_SATA_DEVICE_ID_5040, PCI_ANY_ID, PCI_ANY_ID, 0, 0},
+    {MV_SATA_VENDOR_ID, MV_SATA_DEVICE_ID_5041, PCI_ANY_ID, PCI_ANY_ID, 0, 0},
+    {MV_SATA_VENDOR_ID, MV_SATA_DEVICE_ID_6081, PCI_ANY_ID, PCI_ANY_ID, 0, 0},
+    {MV_SATA_VENDOR_ID, MV_SATA_DEVICE_ID_6041, PCI_ANY_ID, PCI_ANY_ID, 0, 0},
+    {MV_SATA_VENDOR_ID, MV_SATA_DEVICE_ID_6042, PCI_ANY_ID, PCI_ANY_ID, 0, 0},
+    {MV_SATA_VENDOR_ID, MV_SATA_DEVICE_ID_7042, PCI_ANY_ID, PCI_ANY_ID, 0, 0},
+    {0,}
+};
+
+
+int          adapterId = 0;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+
+#ifndef __devexit_p
+#define __devexit_p(x)  x
+#endif
+static void mv_ial_ht_select_queue_depths (struct Scsi_Host* pHost,
+                                           struct scsi_device* pDevs);
+
+
+static inline struct Scsi_Host *scsi_host_alloc(Scsi_Host_Template *t, size_t s)
+{
+    return scsi_register(t, s);
+}
+static inline void scsi_host_put(struct Scsi_Host *h)
+{
+    scsi_unregister(h);
+}
+
+#define scsi_scan_host(x...)
+#define scsi_remove_host(x...)
+
+#else
+
+static int mv_ial_ht_slave_configure (struct scsi_device* pDevs);
+static int __devinit  mv_ial_probe_device(struct pci_dev *pci_dev, const struct pci_device_id *ent);
+static void __devexit mv_ial_remove_device(struct pci_dev *pci_dev);
+
+
+MODULE_DEVICE_TABLE(pci, mvSata_pci_table);
+
+static char mv_hot_plug_name[] = "mvSata";
+
+static struct pci_driver mv_ial_pci_driver =
+{
+    .name       = mv_hot_plug_name,
+    .id_table   = mvSata_pci_table,
+    .probe      = mv_ial_probe_device,
+    .remove     = __devexit_p(mv_ial_remove_device),
+};
+
+#ifdef CONFIG_MV_INCLUDE_INTEG_SATA
+static int __devinit mv_ial_init_soc_sata(void);
+static int mv_platform_probe(struct platform_device *pdev)
+{
+	if (MV_FALSE == mvCtrlPwrClckGet(SATA_UNIT_ID, 0)) 
+	{
+		printk("\nWarning Sata is Powered Off\n");
+	}
+	else
+	{
+        	printk("Integrated Sata device found\n");
+        	mv_ial_init_soc_sata();
+	}
+	return 0;
+}
+
+static int __devexit mv_platform_remove(struct platform_device *pdev)
+{
+	mv_ial_remove_device(NULL);
+	
+	return 0;
+}
+
+static struct platform_driver mv_platform_driver = {
+	.probe			= mv_platform_probe,
+	.remove			= __devexit_p(mv_platform_remove),
+	.driver			= {
+#ifdef CONFIG_MV_HAL_DRIVERS_SUPPORT
+				   .name = "sata_mv_hal",
+#else
+				   .name = "sata_mv",
+#endif
+				   .owner = THIS_MODULE,
+				  },
+};
+
+#endif
+IAL_ADAPTER_T       *pSocAdapter = NULL;
+
+
+static int __init mv_ial_init(void)
+{
+    mv_ial_init_log();
+    mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "mvSata init.\n");
+    driver_template.module = THIS_MODULE;
+#ifdef CONFIG_MV_INCLUDE_INTEG_SATA
+    platform_driver_register(&mv_platform_driver);
+#endif
+
+#ifdef CONFIG_MV_HAL_DRIVERS_SUPPORT
+    return 0;
+#else
+    return (int)pci_register_driver(&mv_ial_pci_driver);
+#endif
+}
+
+static void __exit mv_ial_exit(void)
+{
+
+#ifdef CONFIG_MV_INCLUDE_INTEG_SATA
+	platform_driver_unregister(&mv_platform_driver);
+#endif
+    pci_unregister_driver(&mv_ial_pci_driver);
+    mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "mvSata exit.\n");
+}
+
+module_init(mv_ial_init);
+module_exit(mv_ial_exit);
+
+#endif
+
+
+static void mv_ial_init_log(void)
+{
+#ifdef MV_LOGGER
+    char *szModules[] = {"Core Driver",
+        "SAL",
+        "Common IAL",
+        "Linux IAL"
+    };
+#if defined (MV_LOG_DEBUG)
+    mvLogRegisterModule(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ENABLE_ALL,
+                        szModules[MV_CORE_DRIVER_LOG_ID]);
+    mvLogRegisterModule(MV_SAL_LOG_ID, MV_DEBUG_ENABLE_ALL,
+                        szModules[MV_SAL_LOG_ID]);
+    mvLogRegisterModule(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ENABLE_ALL,
+                        szModules[MV_IAL_COMMON_LOG_ID]);
+    mvLogRegisterModule(MV_IAL_LOG_ID, MV_DEBUG_ENABLE_ALL,
+                        szModules[MV_IAL_LOG_ID]);
+#elif defined (MV_LOG_ERROR)
+    mvLogRegisterModule(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR | MV_DEBUG_ERROR |
+			MV_DEBUG_INFO,
+                        szModules[MV_CORE_DRIVER_LOG_ID]);
+    mvLogRegisterModule(MV_SAL_LOG_ID, MV_DEBUG_FATAL_ERROR | MV_DEBUG_ERROR |
+			MV_DEBUG_INFO,
+                        szModules[MV_SAL_LOG_ID]);
+    mvLogRegisterModule(MV_IAL_COMMON_LOG_ID, MV_DEBUG_FATAL_ERROR | MV_DEBUG_ERROR |
+			MV_DEBUG_INFO,
+                        szModules[MV_IAL_COMMON_LOG_ID]);
+    mvLogRegisterModule(MV_IAL_LOG_ID, MV_DEBUG_FATAL_ERROR | MV_DEBUG_ERROR | 
+			MV_DEBUG_INFO,
+                        szModules[MV_IAL_LOG_ID]);
+#endif
+#endif
+}
+
+/****************************************************************
+ *  Name: set_device_regs
+ *
+ *  Description:    initialize the device registers.
+ *
+ *  Parameters:     pMvSataAdapter, pointer to the Device data structure.
+ *          pcidev, pointer to the pci device data structure.
+ *
+ *  Returns:        =0 ->success, < 0 ->failure.
+ *
+ ****************************************************************/
+static int set_device_regs(MV_SATA_ADAPTER *pMvSataAdapter,
+                           struct pci_dev   *pcidev)
+{
+    pMvSataAdapter->intCoalThre[0]= MV_IAL_HT_SACOALT_DEFAULT;
+    pMvSataAdapter->intCoalThre[1]= MV_IAL_HT_SACOALT_DEFAULT;
+    pMvSataAdapter->intTimeThre[0] = MV_IAL_HT_SAITMTH_DEFAULT;
+    pMvSataAdapter->intTimeThre[1] = MV_IAL_HT_SAITMTH_DEFAULT;
+    pMvSataAdapter->pciCommand = MV_PCI_COMMAND_REG_DEFAULT;
+    pMvSataAdapter->pciSerrMask = MV_PCI_SERR_MASK_REG_ENABLE_ALL;
+    pMvSataAdapter->pciInterruptMask = MV_PCI_INTERRUPT_MASK_REG_ENABLE_ALL;
+    pMvSataAdapter->mvSataEventNotify = mv_ial_lib_event_notify;
+
+    return 0;
+}
+
+
+static int mv_ial_get_num_of_ports(const struct pci_device_id *id)
+{
+    switch(id->device)
+    {
+        case MV_SATA_DEVICE_ID_5080:
+        case MV_SATA_DEVICE_ID_5081:
+        case MV_SATA_DEVICE_ID_6081:
+            return 8;
+        case MV_SATA_DEVICE_ID_5040:
+        case MV_SATA_DEVICE_ID_5041:
+        case MV_SATA_DEVICE_ID_6041:
+        case MV_SATA_DEVICE_ID_6042:
+        case MV_SATA_DEVICE_ID_7042:
+            return 4;
+        default:
+            mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_FATAL_ERROR,
+                     "getMaxNumberOfPorts() Unknown device ID.\n");
+            return 0;
+    }
+}
+
+static void mv_ial_free_scsi_hosts(IAL_ADAPTER_T *pAdapter, MV_BOOLEAN freeAdapter)
+{
+    int i;
+    for (i = 0; i < pAdapter->maxHosts; i++)
+    {
+        if (pAdapter->host[i] != NULL)
+        {
+            mv_ial_lib_prd_destroy(pAdapter->host[i]);
+            scsi_host_put(pAdapter->host[i]->scsihost);
+            pAdapter->host[i] = NULL;
+        }
+    }
+    pAdapter->activeHosts = 0;
+    if (MV_TRUE == freeAdapter)
+    {
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG,
+                     "[%d] freeing Adapter data structure.\n", pAdapter->mvSataAdapter.adapterId);
+        kfree(pAdapter);
+    }
+}
+
+
+
+
+static int __devinit  mv_ial_probe_device(struct pci_dev *pcidev,
+                                          const struct pci_device_id *id)
+{
+
+    MV_SATA_ADAPTER     *pMvSataAdapter;
+    IAL_ADAPTER_T       *pAdapter;
+    MV_U8                 i;
+
+    pci_set_drvdata(pcidev, NULL);
+
+    if (pci_enable_device(pcidev))
+    {
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR,
+                 "pci_enable_device() failed\n");
+        return -ENODEV;
+    }
+
+    pci_set_master(pcidev);
+    if (0 == pci_set_dma_mask(pcidev, 0xffffffffffffffffULL))
+    {
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG,"using 64-bit DMA.\n");
+    }
+    else if (0 == pci_set_dma_mask(pcidev, 0xffffffffUL))
+    {
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "using 32-bit DMA.\n");
+    }
+    else
+    {
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "DMA 32-bit not supported"
+                 " in the system\n");
+        pci_disable_device(pcidev);
+        return -ENODEV;
+    }
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+    if (pci_request_regions(pcidev, mv_hot_plug_name) != 0)
+    {
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "pci_request_regions() failed\n");
+        pci_disable_device(pcidev);
+        return -ENOMEM;
+    }
+#endif
+
+
+    pAdapter = (IAL_ADAPTER_T*)kmalloc(sizeof(IAL_ADAPTER_T), GFP_ATOMIC);
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "IAL Adapter allocation failed\n");
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+        pci_release_regions(pcidev);
+#endif
+        pci_disable_device(pcidev);
+        return -ENOMEM;
+    }
+    memset(pAdapter, 0, sizeof(IAL_ADAPTER_T));
+    pAdapter->activeHosts = 0;
+    pAdapter->maxHosts = mv_ial_get_num_of_ports(id);
+    if (pAdapter->maxHosts == 0)
+    {
+        mv_ial_free_scsi_hosts(pAdapter, MV_TRUE);
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "mv_ial_get_num_of_ports() failed\n");
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+        pci_release_regions(pcidev);
+#endif
+        pci_disable_device(pcidev);
+        return -ENOMEM;
+    }
+    for (i = 0; i < pAdapter->maxHosts; i++)
+    {
+        struct Scsi_Host    *pshost = scsi_host_alloc(&driver_template, sizeof(IAL_HOST_T));
+        if (pshost == NULL)
+        {
+            mv_ial_free_scsi_hosts(pAdapter, MV_TRUE);
+            mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "Scsi_Host allocation failed\n");
+ #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+            pci_release_regions(pcidev);
+ #endif
+            pci_disable_device(pcidev);
+            return -ENOMEM;
+        }
+        pAdapter->host[i] = HOSTDATA(pshost);
+        memset(pAdapter->host[i], 0, sizeof(IAL_HOST_T));
+        pAdapter->host[i]->scsihost = pshost;
+        pAdapter->host[i]->pAdapter = pAdapter;
+        pAdapter->host[i]->channelIndex = (MV_U8)i;
+        pAdapter->activeHosts |= (1 << i);
+    }
+    pAdapter->pcidev = pcidev;
+    pMvSataAdapter = &(pAdapter->mvSataAdapter);
+    pMvSataAdapter->IALData = pAdapter;
+    spin_lock_init (&pAdapter->adapter_lock);
+    for (i = 0; i < pAdapter->maxHosts; i++)
+    {
+        pAdapter->host[i]->scsi_cmnd_done_head = NULL;
+        pAdapter->host[i]->scsi_cmnd_done_tail = NULL;
+    }
+    
+    pAdapter->host[0]->scsihost->base = pci_resource_start(pcidev, 0);
+    for (i = 1; i < pAdapter->maxHosts; i++)
+    {
+        if (pAdapter->host[i] != NULL)
+            pAdapter->host[i]->scsihost->base = pAdapter->host[0]->scsihost->base;
+    }
+    pMvSataAdapter->adapterIoBaseAddress =
+        (MV_BUS_ADDR_T)ioremap(pAdapter->host[0]->scsihost->base,
+                               pci_resource_len(pcidev, 0));
+    if (!pMvSataAdapter->adapterIoBaseAddress)
+    {
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "Failed to remap memory io spcae\n");
+        
+        mv_ial_free_scsi_hosts(pAdapter, MV_TRUE);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+        pci_release_regions(pcidev);
+#endif
+        pci_disable_device(pcidev);
+        return -ENOMEM;
+    }
+    else
+    {
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "io base address 0x%08lx\n",
+                 (ulong)pMvSataAdapter->adapterIoBaseAddress);
+    }
+    
+    pMvSataAdapter->adapterId = adapterId++;
+    /* get the revision ID */
+    if (pci_read_config_byte(pcidev, PCI_REVISION_ID, &pAdapter->rev_id))
+    {
+        printk(KERN_WARNING "mvSata: Failed to get revision id.\n");
+        iounmap(pMvSataAdapter->adapterIoBaseAddress);
+        mv_ial_free_scsi_hosts(pAdapter, MV_TRUE);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+        pci_release_regions(pcidev);
+#endif
+        pci_disable_device(pcidev);
+        return -ENOMEM;
+    }
+    pMvSataAdapter->pciConfigRevisionId = pAdapter->rev_id;
+    pMvSataAdapter->pciConfigDeviceId = id->device;
+    if (set_device_regs(pMvSataAdapter, pcidev))
+    {
+        iounmap(pMvSataAdapter->adapterIoBaseAddress);
+        mv_ial_free_scsi_hosts(pAdapter, MV_TRUE);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+        pci_release_regions(pcidev);
+#endif
+        pci_disable_device(pcidev);
+        return -ENOMEM;
+    }
+    /*Do not allow hotplug handler to work*/
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+    init_MUTEX(&pAdapter->rescan_mutex);
+    atomic_set(&pAdapter->stopped, 1);
+#endif
+
+    if (mvSataInitAdapter(pMvSataAdapter) == MV_FALSE)
+    {
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "[%d]: core failed to initialize the adapter\n",
+                 pMvSataAdapter->adapterId);
+        iounmap(pMvSataAdapter->adapterIoBaseAddress);
+        mv_ial_free_scsi_hosts(pAdapter, MV_TRUE);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+        pci_release_regions(pcidev);
+#endif
+        pci_disable_device(pcidev);
+        return -ENOMEM;
+    }
+    if (mv_ial_lib_allocate_edma_queues(pAdapter))
+    {
+        mvLogMsg(MV_IAL_LOG_ID,MV_DEBUG_ERROR,
+                 "Failed to allocate memory for EDMA queues\n");
+        iounmap(pMvSataAdapter->adapterIoBaseAddress);
+        mv_ial_free_scsi_hosts(pAdapter, MV_TRUE);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+        pci_release_regions(pcidev);
+#endif
+        pci_disable_device(pcidev);
+        return -ENOMEM;
+    }
+
+    for (i = 0; i < pAdapter->maxHosts; i++)
+    {
+        if ((pAdapter->activeHosts & (1 << i)) == 0)
+        {
+            continue;
+        }
+        if (mv_ial_lib_prd_init(pAdapter->host[i]))
+        {
+            mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR,
+                     "Failed to init PRD memory manager - host %d\n", i);
+            iounmap(pMvSataAdapter->adapterIoBaseAddress);
+            mv_ial_lib_free_edma_queues(pAdapter);
+            mv_ial_free_scsi_hosts(pAdapter, MV_TRUE);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+            pci_release_regions(pcidev);
+#endif
+            pci_disable_device(pcidev);
+            return -ENOMEM;
+        }
+    }
+    pAdapter->ataScsiAdapterExt = (MV_SAL_ADAPTER_EXTENSION*)kmalloc(sizeof(MV_SAL_ADAPTER_EXTENSION),
+                                                                     GFP_ATOMIC);
+    if (pAdapter->ataScsiAdapterExt == NULL)
+    {
+        mvLogMsg(MV_IAL_LOG_ID,  MV_DEBUG_ERROR,"[%d]: out of memory, failed to allocate MV_SAL_ADAPTER_EXTENSION\n",
+                 pAdapter->mvSataAdapter.adapterId);
+        iounmap(pMvSataAdapter->adapterIoBaseAddress);
+        mv_ial_lib_free_edma_queues(pAdapter);
+        mv_ial_free_scsi_hosts(pAdapter, MV_TRUE);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+        pci_release_regions(pcidev);
+#endif
+        pci_disable_device(pcidev);
+        return -ENOMEM;
+    }
+    mvSataScsiInitAdapterExt(pAdapter->ataScsiAdapterExt,
+                             pMvSataAdapter);
+    /* let SAL report only the BUS RESET UA event*/
+    pAdapter->ataScsiAdapterExt->UAMask = MV_BIT0;
+    /* enable device interrupts even if no storage devices connected now*/
+#ifdef MV_SUPPORT_MSI
+    {
+    	int err;
+	if ((err = pci_enable_msi(pcidev)))
+	{
+	    mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "[%d]: Unable to allocate MSI interrupt Error: %d\n",
+		    pMvSataAdapter->adapterId, err);
+	}
+    }
+#endif
+
+    if (request_irq(pcidev->irq, mv_ial_lib_int_handler,
+                    (IRQF_DISABLED | IRQF_SAMPLE_RANDOM | IRQF_SHARED), "mvSata",
+                    pAdapter) < 0)
+    {
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "[%d]: unable to allocate IRQ for controler\n",
+                 pMvSataAdapter->adapterId);
+#ifdef MV_SUPPORT_MSI
+	pci_disable_msi(pAdapter->pcidev);
+#endif
+        kfree(pAdapter->ataScsiAdapterExt);
+        iounmap(pMvSataAdapter->adapterIoBaseAddress);
+        mv_ial_lib_free_edma_queues(pAdapter);
+        mv_ial_free_scsi_hosts(pAdapter, MV_TRUE);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+        pci_release_regions(pcidev);
+#endif
+        pci_disable_device(pcidev);
+        return -ENOMEM;
+    }
+    for (i = 0; i < pAdapter->maxHosts; i++)
+    {
+        if ((pAdapter->activeHosts & (1 << i)) == 0)
+        {
+            continue;
+        }
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,13)
+#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+        scsi_set_device(pAdapter->host[i]->scsihost, &pcidev->dev);
+#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+        scsi_set_pci_device(pAdapter->host[i]->scsihost, pcidev);
+#endif
+        pAdapter->host[i]->scsihost->irq = pcidev->irq;
+        /* each SATA channel will emulate scsi host !!!*/
+        if (pMvSataAdapter->sataAdapterGeneration == MV_SATA_GEN_I)
+        {
+            pAdapter->host[i]->scsihost->max_id = 1;
+        }
+        else
+        {
+            pAdapter->host[i]->scsihost->max_id = MV_SATA_PM_MAX_PORTS;
+        }
+        pAdapter->host[i]->scsihost->max_lun = 1;
+        pAdapter->host[i]->scsihost->max_channel = 0;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+        pAdapter->host[i]->scsihost->select_queue_depths = mv_ial_ht_select_queue_depths;
+#endif
+    }
+    if (MV_FALSE == mvAdapterStartInitialization(pMvSataAdapter,
+                                                 &pAdapter->ialCommonExt,
+                                                 pAdapter->ataScsiAdapterExt))
+    {
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "[%d]: mvAdapterStartInitialization"
+                 " Failed\n", pMvSataAdapter->adapterId);
+        free_irq (pcidev->irq, pMvSataAdapter);
+#ifdef MV_SUPPORT_MSI
+	pci_disable_msi(pAdapter->pcidev);
+#endif
+        kfree(pAdapter->ataScsiAdapterExt);
+        iounmap(pMvSataAdapter->adapterIoBaseAddress);
+        mv_ial_lib_free_edma_queues(pAdapter);
+        mv_ial_free_scsi_hosts(pAdapter, MV_TRUE);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+        pci_release_regions(pcidev);
+#endif
+        pci_disable_device(pcidev);
+        return -ENOMEM;
+    }
+    pci_set_drvdata(pcidev, pAdapter);
+    for (i = 0; i < pAdapter->maxHosts; i++)
+    {
+        if ((pAdapter->activeHosts & (1 << i)) == 0)
+        {
+            continue;
+        }
+        mv_ial_block_requests(pAdapter, i);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+        if (scsi_add_host(pAdapter->host[i]->scsihost, &pcidev->dev) != 0)
+        {
+            mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "[%d]: scsi_add_host() failed.\n"
+                     , pMvSataAdapter->adapterId);
+            free_irq (pcidev->irq, pMvSataAdapter);
+#ifdef MV_SUPPORT_MSI
+	    pci_disable_msi(pAdapter->pcidev);
+#endif
+	    kfree(pAdapter->ataScsiAdapterExt);
+            iounmap(pMvSataAdapter->adapterIoBaseAddress);
+            mv_ial_lib_free_edma_queues(pAdapter);
+            mv_ial_free_scsi_hosts(pAdapter, MV_TRUE);
+            pci_release_regions(pcidev);
+            pci_disable_device(pcidev);
+            return -ENODEV;
+        }
+#endif
+    }
+
+    pAdapter->stopAsyncTimer = MV_FALSE;
+    init_timer(&pAdapter->asyncStartTimer);
+    pAdapter->asyncStartTimer.data = (unsigned long)pAdapter;
+    pAdapter->asyncStartTimer.function = asyncStartTimerFunction;
+    pAdapter->asyncStartTimer.expires = jiffies + MV_LINUX_ASYNC_TIMER_PERIOD;
+    add_timer (&pAdapter->asyncStartTimer);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+    for (i = 0; i < pAdapter->maxHosts; i++)
+    {
+        if ((pAdapter->activeHosts & (1 << i)) != 0)
+        {
+            scsi_scan_host(pAdapter->host[i]->scsihost);
+        }
+    }
+    /*Enable hotplug handler*/
+    atomic_set(&pAdapter->stopped, 0);
+#endif
+    return 0;
+}
+
+#ifdef CONFIG_MV_INCLUDE_INTEG_SATA
+static int __devinit mv_ial_init_soc_sata(void)
+{
+    MV_SATA_ADAPTER     *pMvSataAdapter;
+    IAL_ADAPTER_T       *pAdapter;
+    MV_U8                 i;
+
+   
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)
+    mvSataWinInit(); g
+#endif
+    pAdapter = (IAL_ADAPTER_T*)kmalloc(sizeof(IAL_ADAPTER_T), GFP_ATOMIC);
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "IAL Adapter allocation failed\n");
+        return -ENOMEM;
+    }
+    pSocAdapter = pAdapter;
+    memset(pAdapter, 0, sizeof(IAL_ADAPTER_T));
+    pAdapter->activeHosts = 0;
+
+    if(MV_5182_DEV_ID == mvCtrlModelGet())
+	pAdapter->maxHosts = MV_SATA_5182_PORT_NUM;
+    else if(MV_5082_DEV_ID == mvCtrlModelGet())
+	pAdapter->maxHosts = MV_SATA_5082_PORT_NUM;
+    else if(MV_6082_DEV_ID == mvCtrlModelGet())
+	pAdapter->maxHosts = MV_SATA_6082_PORT_NUM;
+#ifdef MV88F6281
+    else if(MV_6281_DEV_ID == mvCtrlModelGet())
+	pAdapter->maxHosts = MV_SATA_6281_PORT_NUM;
+    else if(MV_6192_DEV_ID == mvCtrlModelGet())
+	pAdapter->maxHosts = MV_SATA_6192_PORT_NUM;
+#endif
+    else if ((mvCtrlModelGet() == MV_78100_DEV_ID) || 
+		(mvCtrlModelGet() == MV_78200_DEV_ID) || 
+		(mvCtrlModelGet() == MV_78XX0_DEV_ID))
+	pAdapter->maxHosts = MV_SATA_78XX0_PORT_NUM;
+    else if (MV_6781_DEV_ID == mvCtrlModelGet())
+	pAdapter->maxHosts = MV_SATA_6781_PORT_NUM;
+
+	for (i = 0; i < pAdapter->maxHosts; i++)
+	{	
+		if (MV_FALSE == mvCtrlPwrClckGet(SATA_UNIT_ID, (MV_U32)i))
+		{
+			printk("Warning: SATA %d is powered off\n", i);
+			mv_ial_free_scsi_hosts(pAdapter, MV_TRUE);
+			return -ENOMEM;
+		}
+	}
+    
+    for (i = 0; i < pAdapter->maxHosts; i++)
+    {
+        struct Scsi_Host    *pshost = scsi_host_alloc(&driver_template, sizeof(IAL_HOST_T));
+        if (pshost == NULL)
+        {
+            mv_ial_free_scsi_hosts(pAdapter, MV_TRUE);
+            mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "Scsi_Host allocation failed\n");
+            return -ENOMEM;
+        }
+        pAdapter->host[i] = HOSTDATA(pshost);
+        memset(pAdapter->host[i], 0, sizeof(IAL_HOST_T));
+        pAdapter->host[i]->scsihost = pshost;
+        pAdapter->host[i]->pAdapter = pAdapter;
+        pAdapter->host[i]->channelIndex = (MV_U8)i;
+        pAdapter->activeHosts |= (1 << i);
+    }
+    pAdapter->pcidev = NULL;
+    pMvSataAdapter = &(pAdapter->mvSataAdapter);
+    pMvSataAdapter->IALData = pAdapter;
+    spin_lock_init (&pAdapter->adapter_lock);
+    for (i = 0; i < pAdapter->maxHosts; i++)
+    {
+        pAdapter->host[i]->scsi_cmnd_done_head = NULL;
+        pAdapter->host[i]->scsi_cmnd_done_tail = NULL;
+    }
+    
+    pAdapter->host[0]->scsihost->base = 0/*pci_resource_start(pcidev, 0)*/;
+    for (i = 1; i < pAdapter->maxHosts; i++)
+    {
+        if (pAdapter->host[i] != NULL)
+            pAdapter->host[i]->scsihost->base = pAdapter->host[0]->scsihost->base;
+    }
+    pMvSataAdapter->adapterIoBaseAddress = (MV_BUS_ADDR_T)(INTER_REGS_BASE + MV_SATA_REGS_OFFSET - 
+                                            0x20000);
+    
+    mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "io base address 0x%08lx\n",
+             (ulong)pMvSataAdapter->adapterIoBaseAddress);
+    
+    pMvSataAdapter->adapterId = adapterId++;
+    /* get the revision ID */
+    
+    pMvSataAdapter->pciConfigRevisionId = 0;
+    pMvSataAdapter->pciConfigDeviceId = mvCtrlModelGet();
+    if (set_device_regs(pMvSataAdapter, NULL))
+    {
+        mv_ial_free_scsi_hosts(pAdapter, MV_TRUE);
+        return -ENOMEM;
+    }
+    /*Do not allow hotplug handler to work*/
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+    init_MUTEX(&pAdapter->rescan_mutex);
+    atomic_set(&pAdapter->stopped, 1);
+#endif
+
+    if (mvSataInitAdapter(pMvSataAdapter) == MV_FALSE)
+    {
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR,
+                 "[%d]: core failed to initialize the adapter\n",
+                 pMvSataAdapter->adapterId);
+        mv_ial_free_scsi_hosts(pAdapter, MV_TRUE);
+        return -ENOMEM;
+    }
+    if (mv_ial_lib_allocate_edma_queues(pAdapter))
+    {
+        mvLogMsg(MV_IAL_LOG_ID,MV_DEBUG_ERROR,
+                 "Failed to allocate memory for EDMA queues\n");
+
+        mv_ial_free_scsi_hosts(pAdapter, MV_TRUE);
+        return -ENOMEM;
+    }
+
+    for (i = 0; i < pAdapter->maxHosts; i++)
+    {
+        if ((pAdapter->activeHosts & (1 << i)) == 0)
+        {
+            continue;
+        }
+        if (mv_ial_lib_prd_init(pAdapter->host[i]))
+        {
+            mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR,
+                     "Failed to init PRD memory manager - host %d\n", i);
+            mv_ial_lib_free_edma_queues(pAdapter);
+            mv_ial_free_scsi_hosts(pAdapter, MV_TRUE);
+            return -ENOMEM;
+        }
+    }
+    pAdapter->ataScsiAdapterExt = (MV_SAL_ADAPTER_EXTENSION*)kmalloc(sizeof(MV_SAL_ADAPTER_EXTENSION),
+                                                                     GFP_ATOMIC);
+    if (pAdapter->ataScsiAdapterExt == NULL)
+    {
+        mvLogMsg(MV_IAL_LOG_ID,  MV_DEBUG_ERROR,"[%d]: out of memory, failed to allocate MV_SAL_ADAPTER_EXTENSION\n",
+                 pAdapter->mvSataAdapter.adapterId);
+        mv_ial_lib_free_edma_queues(pAdapter);
+        mv_ial_free_scsi_hosts(pAdapter, MV_TRUE);
+        return -ENOMEM;
+    }
+    mvSataScsiInitAdapterExt(pAdapter->ataScsiAdapterExt,
+                             pMvSataAdapter);
+    /* let SAL report only the BUS RESET UA event*/
+    pAdapter->ataScsiAdapterExt->UAMask = MV_BIT0;
+    /* enable device interrupts even if no storage devices connected now*/
+    if (request_irq(SATA_IRQ_NUM, mv_ial_lib_int_handler,
+                    (IRQF_DISABLED | IRQF_SAMPLE_RANDOM | IRQF_SHARED), "mvSata",
+                    pAdapter) < 0)
+    {
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "[%d]: unable to allocate IRQ for controler\n",
+                 pMvSataAdapter->adapterId);
+        kfree(pAdapter->ataScsiAdapterExt);
+        mv_ial_lib_free_edma_queues(pAdapter);
+        mv_ial_free_scsi_hosts(pAdapter, MV_TRUE);
+        return -ENOMEM;
+    }
+    for (i = 0; i < pAdapter->maxHosts; i++)
+    {
+        if ((pAdapter->activeHosts & (1 << i)) == 0)
+        {
+            continue;
+        }
+        pAdapter->host[i]->scsihost->irq = SATA_IRQ_NUM;
+        pAdapter->host[i]->scsihost->max_id = MV_SATA_PM_MAX_PORTS;
+        
+        pAdapter->host[i]->scsihost->max_lun = 1;
+        pAdapter->host[i]->scsihost->max_channel = 0;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+        pAdapter->host[i]->scsihost->select_queue_depths = mv_ial_ht_select_queue_depths;
+#endif
+    }
+    if (MV_FALSE == mvAdapterStartInitialization(pMvSataAdapter,
+                                                 &pAdapter->ialCommonExt,
+                                                 pAdapter->ataScsiAdapterExt))
+    {
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "[%d]: mvAdapterStartInitialization"
+                 " Failed\n", pMvSataAdapter->adapterId);
+        free_irq (SATA_IRQ_NUM, pMvSataAdapter);
+        kfree(pAdapter->ataScsiAdapterExt);
+        mv_ial_lib_free_edma_queues(pAdapter);
+        mv_ial_free_scsi_hosts(pAdapter, MV_TRUE);
+        return -ENOMEM;
+    }
+
+    for (i = 0; i < pAdapter->maxHosts; i++)
+    {
+        if ((pAdapter->activeHosts & (1 << i)) == 0)
+        {
+            continue;
+        }
+        mv_ial_block_requests(pAdapter, i);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+        if (scsi_add_host(pAdapter->host[i]->scsihost, NULL) != 0)
+        {
+            mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "[%d]: scsi_add_host() failed.\n"
+                     , pMvSataAdapter->adapterId);
+            free_irq (SATA_IRQ_NUM , pMvSataAdapter);
+            kfree(pAdapter->ataScsiAdapterExt);
+            mv_ial_lib_free_edma_queues(pAdapter);
+            mv_ial_free_scsi_hosts(pAdapter, MV_TRUE);
+            return -ENODEV;
+        }
+#endif
+    }
+
+    pAdapter->stopAsyncTimer = MV_FALSE;
+    init_timer(&pAdapter->asyncStartTimer);
+    pAdapter->asyncStartTimer.data = (unsigned long)pAdapter;
+    pAdapter->asyncStartTimer.function = asyncStartTimerFunction;
+    pAdapter->asyncStartTimer.expires = jiffies + MV_LINUX_ASYNC_TIMER_PERIOD;
+    add_timer (&pAdapter->asyncStartTimer);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+    for (i = 0; i < pAdapter->maxHosts; i++)
+    {
+        if ((pAdapter->activeHosts & (1 << i)) != 0)
+        {
+            scsi_scan_host(pAdapter->host[i]->scsihost);
+        }
+    }
+    /*Enable hotplug handler*/
+    atomic_set(&pAdapter->stopped, 0);
+#endif
+    return 0;
+
+}
+#endif 
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+/****************************************************************
+ *  Name: mv_ial_ht_detect
+ *
+ *  Description:    Detect and initialize our boards.
+ *
+ *  Parameters:     tpnt - Pointer to SCSI host template structure.
+ *
+ *  Returns:        Number of adapters installed.
+ *
+ ****************************************************************/
+int mv_ial_ht_detect (Scsi_Host_Template *tpnt)
+{
+    int                 num_hosts=0;
+    struct pci_dev      *pcidev = NULL;
+    int                 index;
+    struct pci_device_id *id = &mvSata_pci_table[0];
+
+    mv_ial_init_log();
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+    if (!pci_present())
+    {
+        printk ("mvSata: PCI BIOS not present\n");
+        return 0;
+    }
+#endif
+
+    if (sizeof(struct mv_comp_info) > sizeof(Scsi_Pointer))
+    {
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "WARNING mv_comp_info must be "
+                 "re-defined - its too big");
+        return -1;
+    }
+    index = 0;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+    spin_unlock_irq (&io_request_lock);
+#endif
+
+    while (1)
+    {
+        if (id[index].device == 0)
+        {
+            break;
+        }
+        pcidev = NULL;
+
+        while ((pcidev = pci_find_device (MV_SATA_VENDOR_ID,
+                                          id[index].device, pcidev)) != NULL)
+        {
+            mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "PCI device found, DeviceId 0x%x "
+                     "BAR0=%lx\n",
+                      id[index].device, pci_resource_start(pcidev,0));
+            if (mv_ial_probe_device(pcidev, &id[index]) == 0)
+            {
+                IAL_ADAPTER_T *pAdapter = pci_get_drvdata(pcidev);
+                num_hosts += pAdapter->maxHosts;
+            }
+        }
+        index ++;
+    }
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+    spin_lock_irq (&io_request_lock);
+#endif
+    return num_hosts;
+}
+#endif
+
+/****************************************************************
+ *  Name:   mv_ial_ht_release
+ *
+ *  Description:   release scsi host
+ *
+ *  Parameters:     SCpnt - Pointer to SCSI host structure.
+ *
+ *  Returns:          0 on success, otherwise of failure.
+ *
+ ****************************************************************/
+int mv_ial_ht_release (struct Scsi_Host *pHost)
+{
+    IAL_ADAPTER_T *pAdapter = MV_IAL_ADAPTER (pHost);
+    MV_U8 channel;
+    MV_SATA_ADAPTER * pMvSataAdapter = &pAdapter->mvSataAdapter;
+    unsigned long lock_flags;
+    struct scsi_cmnd *cmnds_done_list = NULL;
+    IAL_HOST_T          *ial_host = HOSTDATA(pHost);
+
+    channel = ial_host->channelIndex;
+    pAdapter->activeHosts &= ~ (1 << channel);
+    mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, ": release host %d\n", pHost->host_no);
+    spin_lock_irqsave (&pAdapter->adapter_lock, lock_flags);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+    if (pAdapter->stopAsyncTimer != MV_TRUE)
+    {
+        /* Delete any pending timers */
+        pAdapter->stopAsyncTimer = MV_TRUE;
+        del_timer_sync(&pAdapter->asyncStartTimer);
+    }
+#endif
+
+    if (pMvSataAdapter->sataChannel[channel])
+    {
+        mvSataDisableChannelDma(pMvSataAdapter, channel);
+
+        mvSataFlushDmaQueue(pMvSataAdapter, channel,
+                            MV_FLUSH_TYPE_CALLBACK);
+        mv_ial_lib_free_channel(pAdapter, channel);
+   }
+     /* Check if there are commands in the done queue to be completed */
+
+    cmnds_done_list = mv_ial_lib_get_first_cmnd (pAdapter, channel);
+    if (cmnds_done_list)
+    {
+        unsigned long flags_io_request_lock;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+        spin_lock_irqsave(&io_request_lock, flags_io_request_lock);
+#else
+        spin_lock_irqsave(ial_host->scsihost->host_lock, flags_io_request_lock);
+#endif
+        mv_ial_lib_do_done(cmnds_done_list);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+        spin_unlock_irqrestore(&io_request_lock, flags_io_request_lock);
+#else
+        spin_unlock_irqrestore(ial_host->scsihost->host_lock, flags_io_request_lock);
+#endif
+    }
+    if (0 == pAdapter->activeHosts)
+    {
+      mvSataShutdownAdapter(pMvSataAdapter);
+    }
+    pAdapter->host[channel] = NULL;
+    mv_ial_lib_prd_destroy(ial_host);
+    spin_unlock_irqrestore (&pAdapter->adapter_lock, lock_flags);
+    scsi_remove_host(pHost);
+    scsi_host_put(pHost);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+    if (0 == pAdapter->activeHosts)
+    {
+        struct pci_dev *dev = pAdapter->pcidev;
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG,
+                     "[%d] freeing Adapter resources.\n", pAdapter->mvSataAdapter.adapterId);
+        free_irq (pAdapter->pcidev->irq, pMvSataAdapter);
+#ifdef MV_SUPPORT_MSI
+	pci_disable_msi(pAdapter->pcidev);
+#endif
+        kfree(pAdapter->ataScsiAdapterExt);
+        iounmap(pMvSataAdapter->adapterIoBaseAddress);
+        mv_ial_lib_free_edma_queues(pAdapter);
+        kfree(pAdapter);
+	pci_disable_device(dev);
+    }
+#endif
+    return 0;
+}
+
+
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+static void __devexit mv_ial_remove_device(struct pci_dev *pdev)
+{
+    IAL_ADAPTER_T       *pAdapter = (pdev != NULL) ? pci_get_drvdata(pdev) : pSocAdapter;
+    int numhosts;
+    int i;
+    unsigned long lock_flags;
+
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_FATAL_ERROR,
+                     "mv_ial_remove_device() No valid Adapter IAL structure found.\n");
+        return;
+    }
+
+    numhosts           = pAdapter->maxHosts;
+    /*flush hotplug rescan worker*/
+    atomic_inc(&pAdapter->stopped);
+    flush_scheduled_work();
+    /* Delete any pending timers */
+    spin_lock_irqsave (&pAdapter->adapter_lock, lock_flags);
+    pAdapter->stopAsyncTimer = MV_TRUE;
+    del_timer_sync(&pAdapter->asyncStartTimer);
+    spin_unlock_irqrestore(&pAdapter->adapter_lock, lock_flags);
+
+    for (i = 0; i < numhosts; i++)
+    {
+        if (pAdapter->host[i] != NULL)
+        {
+            mv_ial_ht_release (pAdapter->host[i]->scsihost);
+        }
+    }
+    if (pdev != NULL) /* pci device */
+    {
+        free_irq (pAdapter->pcidev->irq, &pAdapter->mvSataAdapter);
+#ifdef MV_SUPPORT_MSI
+	pci_disable_msi(pAdapter->pcidev);
+#endif
+	kfree(pAdapter->ataScsiAdapterExt);
+	iounmap(pAdapter->mvSataAdapter.adapterIoBaseAddress);
+	mv_ial_lib_free_edma_queues(pAdapter);
+	kfree(pAdapter);
+	pci_release_regions(pdev);
+	pci_disable_device(pdev);
+    }
+#ifdef CONFIG_MV_INCLUDE_INTEG_SATA
+    else /* Soc sata*/
+    {
+        free_irq (SATA_IRQ_NUM, &pAdapter->mvSataAdapter);
+	kfree(pAdapter->ataScsiAdapterExt);
+	mv_ial_lib_free_edma_queues(pAdapter);
+	kfree(pAdapter);
+    }
+#endif
+}
+#endif
+
+/****************************************************************
+ *  Name:   mv_ial_ht_queuecommand
+ *
+ *  Description:    Process a queued command from the SCSI manager.
+ *
+ *  Parameters:     SCpnt - Pointer to SCSI command structure.
+ *                  done  - Pointer to done function to call.
+ *
+ *  Returns:        Status code.
+ *
+ ****************************************************************/
+int mv_ial_ht_queuecommand (struct scsi_cmnd * SCpnt, void (*done) (struct scsi_cmnd *))
+{
+    IAL_ADAPTER_T   *pAdapter = MV_IAL_ADAPTER(SCpnt->device->host);
+    MV_SATA_ADAPTER *pMvSataAdapter;
+    IAL_HOST_T      *pHost = HOSTDATA(SCpnt->device->host);
+    MV_U8            channel = pHost->channelIndex;
+    int             build_prd_table = 0;
+    unchar *cmd = (unchar *) SCpnt->cmnd;
+    struct mv_comp_info *completion_info;
+    unsigned long lock_flags;
+
+    struct scsi_cmnd   *cmnds_done_list = NULL;
+
+    mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, " :queuecommand host=%d, bus=%d, channel=%d\n",
+             SCpnt->device->host->host_no,
+             SCpnt->device->channel,
+             channel);
+    if (done == NULL)
+    {
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, ": in queuecommand, done function can't be NULL\n");
+        return 0;
+    }
+
+    if ((pAdapter == NULL) || (channel >= MV_SATA_CHANNELS_NUM)||
+        (pAdapter->host[channel] == NULL))
+    {
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_FATAL_ERROR,": in queuecommand, "
+                 "command queued for released host!!\n");
+        SCpnt->result = DID_NO_CONNECT << 16;
+        done(SCpnt);
+        return 0;
+    }
+
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+    spin_unlock_irq (&io_request_lock);
+#else
+    spin_unlock_irq(pHost->scsihost->host_lock);
+#endif
+
+    spin_lock_irqsave (&pAdapter->adapter_lock, lock_flags);
+
+    if (SCpnt->retries > 0)
+    {
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR,": retry command host=%d, bus=%d"
+                 " SCpnt = %p\n", SCpnt->device->host->host_no, channel, SCpnt);
+    }
+
+    if (MV_TRUE == pAdapter->host[channel]->hostBlocked)
+    {
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR,": command received for "
+                 "blocked host=%d, bus=%d, channel=%d, SCpnt = %p\n",
+                 SCpnt->device->host->host_no,
+                 SCpnt->device->channel,
+                 channel, SCpnt);
+#if 0
+        spin_unlock_irqrestore (&pAdapter->adapter_lock, lock_flags);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+        spin_lock_irq (&io_request_lock);
+#else
+        spin_lock_irq(pHost->scsihost->host_lock);
+#endif
+        return SCSI_MLQUEUE_HOST_BUSY;
+#endif
+    }
+
+    pMvSataAdapter = &pAdapter->mvSataAdapter;
+
+    SCpnt->result = DID_ERROR << 16;
+    SCpnt->scsi_done = done;
+
+    completion_info = ( struct mv_comp_info *) &(SCpnt->SCp);
+    completion_info->pSALBlock =
+    (MV_SATA_SCSI_CMD_BLOCK *) kmalloc(sizeof(MV_SATA_SCSI_CMD_BLOCK),
+                                       GFP_ATOMIC);
+    if (completion_info->pSALBlock == NULL)
+    {
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR,  "in queuecommand: Failed to allocate SAL Block\n");
+        spin_unlock_irqrestore (&pAdapter->adapter_lock, lock_flags);
+		done(SCpnt);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+        spin_lock_irq (&io_request_lock);
+#else
+        spin_lock_irq(pHost->scsihost->host_lock);
+#endif
+        return -1;
+    }
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+    completion_info->kmap_buffer = 0;
+#endif
+    /* prepare the SAL Block paramters*/
+    if ((*cmd == READ_6) || (*cmd == READ_10) || (*cmd == READ_16) ||
+	(*cmd == WRITE_6) || (*cmd == WRITE_10) || (*cmd == WRITE_16))
+    {
+        build_prd_table = 1;
+    }
+    else if((pAdapter->ataScsiAdapterExt->ataDriveData[channel][SCpnt->device->id].identifyInfo.deviceType == MV_SATA_DEVICE_TYPE_ATAPI_DEVICE) && use_sg(SCpnt))
+    {
+	 /*
+	   for the 60x1 devices don't use DMA for control commands as the BMDMA will
+	   not write date to DRAM in case on underrun.
+	 */
+	 if(!(pAdapter->mvSataAdapter.sataAdapterGeneration == MV_SATA_GEN_II)){
+	      mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG,
+		       "in queuecommand: PRD for non data command for ATAPI device\n");
+	      build_prd_table = 1;
+	 }
+    }
+     if((pAdapter->ataScsiAdapterExt->ataDriveData[channel][SCpnt->device->id].identifyInfo.deviceType == MV_SATA_DEVICE_TYPE_ATAPI_DEVICE))
+    {
+        BUG_ON(((unsigned int)SCpnt->cmnd) & 0x1);
+    }
+    /* prepare the SAL Block paramters*/
+    if(build_prd_table)
+    {
+        if(pAdapter->ataScsiAdapterExt->ataDriveData[channel][SCpnt->device->id].identifyInfo.deviceType == MV_SATA_DEVICE_TYPE_ATAPI_DEVICE)
+        {
+           mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "in queuecommand: Data command for ATAPI device\n");
+        }
+        else
+        {
+              mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "in queuecommand: Data command for ATA device\n");
+ 
+        }
+        if (mv_ial_lib_generate_prd(pMvSataAdapter, SCpnt, completion_info))
+        {
+            mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "in queuecommand: illegal requested buffer\n");
+            spin_unlock_irqrestore (&pAdapter->adapter_lock, lock_flags);
+	   		done(SCpnt);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+            spin_lock_irq (&io_request_lock);
+#else
+            spin_lock_irq(pHost->scsihost->host_lock);
+#endif
+            return -1;
+        }
+        completion_info->pSALBlock->pDataBuffer = NULL;
+    }
+    else
+    {
+
+        completion_info->cpu_PRDpnt = NULL;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+	if (use_sg(SCpnt))
+	{
+       	    completion_info->kmap_buffer  = 1;
+	}
+#else
+        completion_info->pSALBlock->pDataBuffer = SCpnt->request_buffer;
+#endif
+    }
+    completion_info->SCpnt = SCpnt;
+
+    completion_info->pSALBlock->bus = channel;
+
+    completion_info->pSALBlock->target = SCpnt->device->id;
+    completion_info->pSALBlock->lun = SCpnt->device->lun;
+    completion_info->pSALBlock->pSalAdapterExtension = pAdapter->ataScsiAdapterExt;
+    completion_info->pSALBlock->pIalAdapterExtension = &pAdapter->ialCommonExt;
+    completion_info->pSALBlock->completionCallBack = IALCompletion;
+    completion_info->pSALBlock->IALData = SCpnt;
+    completion_info->pSALBlock->dataBufferLength = scsi_bufflen(SCpnt);
+    completion_info->pSALBlock->pSenseBuffer = SCpnt->sense_buffer;
+    completion_info->pSALBlock->ScsiCdb = SCpnt->cmnd;
+    completion_info->pSALBlock->ScsiCdbLength = SCpnt->cmd_len;
+    completion_info->pSALBlock->senseBufferLength = SCSI_SENSE_BUFFERSIZE;
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+    if (completion_info->kmap_buffer)
+    {
+	struct scatterlist *sg;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)
+	sg = (struct scatterlist *) SCpnt->request_buffer;
+#endif
+	mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "SCpnt %p, cmd %x need to use"
+		" temp data buffer.lengh %d \n", SCpnt, *cmd , scsi_bufflen(SCpnt));
+	completion_info->pSALBlock->pDataBuffer = kmalloc(scsi_bufflen(SCpnt), GFP_ATOMIC);
+	if (completion_info->pSALBlock->pDataBuffer == NULL)
+    	{
+        	mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR,  "in queuecommand: Failed to allocate temp buffer for kmap\n");
+	        spin_unlock_irqrestore (&pAdapter->adapter_lock, lock_flags);
+		done(SCpnt);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+	        spin_lock_irq (&io_request_lock);
+#else
+        	spin_lock_irq(pHost->scsihost->host_lock);
+#endif
+	        return -1;
+    	}
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)
+        completion_info->pSALBlock->dataBufferLength = sg->length;
+#else
+        completion_info->pSALBlock->dataBufferLength = scsi_bufflen(SCpnt);
+#endif
+	if( SCpnt->sc_data_direction == DMA_TO_DEVICE) 
+	{
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)
+		struct scatterlist *sg;
+	        MV_U8*          pBuffer;
+        	sg = (struct scatterlist *) SCpnt->request_buffer;
+
+		mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "SCpnt %p, cmd %x kmap temp data buffer and copy data.lengh %d \n", SCpnt, *cmd ,sg->length);
+	        pBuffer = kmap_atomic(sg->page, KM_USER0) + sg->offset;
+	        memcpy(completion_info->pSALBlock->pDataBuffer, pBuffer , sg->length);
+	        kunmap_atomic(pBuffer - sg->offset, KM_USER0);
+#else
+		scsi_sg_copy_to_buffer(SCpnt, completion_info->pSALBlock->pDataBuffer,
+				       scsi_bufflen(SCpnt));
+#endif
+	}
+
+    }
+#endif
+    switch(SCpnt->sc_data_direction)
+    {
+        case DMA_FROM_DEVICE:
+            completion_info->pSALBlock->dataDirection = MV_SCSI_COMMAND_DATA_DIRECTION_IN;
+            break;
+        case DMA_TO_DEVICE:
+            completion_info->pSALBlock->dataDirection = MV_SCSI_COMMAND_DATA_DIRECTION_OUT;
+            break;
+        default:
+           completion_info->pSALBlock->dataDirection = MV_SCSI_COMMAND_DATA_DIRECTION_NON;
+    }
+
+    if (*cmd != SCSI_OPCODE_MVSATA_SMART)
+    {
+        mvExecuteScsiCommand(completion_info->pSALBlock, MV_TRUE);
+    }
+    else
+    {
+        mvScsiAtaSendSmartCommand(pMvSataAdapter, completion_info->pSALBlock);
+    }
+
+    /*
+     * Check if there is valid commands to be completed. This is usually
+     * an immediate completed commands such as INQUIRY etc...
+     */
+    cmnds_done_list = mv_ial_lib_get_first_cmnd(pAdapter, channel);
+    spin_unlock_irqrestore(&pAdapter->adapter_lock, lock_flags);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+    spin_lock_irq (&io_request_lock);
+#else
+    spin_lock_irq(pHost->scsihost->host_lock);
+#endif
+    if (cmnds_done_list)
+    {
+        mv_ial_lib_do_done(cmnds_done_list);
+    }
+    return 0;
+}
+/****************************************************************
+ *  Name:   mv_ial_ht_bus_reset
+ *
+ *  Description:    reset given devise, all pending commands will be aborted
+ *                  with status DID_RESET.
+ *
+ *  Parameters:     SCpnt - Pointer to SCSI command structure.
+ *
+ *  Returns:        Status code.
+ *
+ ****************************************************************/
+int mv_ial_ht_bus_reset (struct scsi_cmnd *SCpnt)
+{
+    IAL_ADAPTER_T   *pAdapter = MV_IAL_ADAPTER(SCpnt->device->host);
+    MV_SATA_ADAPTER *pMvSataAdapter = &pAdapter->mvSataAdapter;
+    IAL_HOST_T      *pHost = HOSTDATA(SCpnt->device->host);
+    MV_U8 channel = pHost->channelIndex;
+
+    unsigned long lock_flags;
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+    spin_unlock_irq (&io_request_lock);
+#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,13)
+    spin_unlock_irq(pHost->scsihost->host_lock);
+#endif
+    spin_lock_irqsave (&pAdapter->adapter_lock, lock_flags);
+    mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "Bus Reset: host=%d, channel=%d, target=%d\n",
+             SCpnt->device->host->host_no, SCpnt->device->channel, SCpnt->device->id);
+    if (pMvSataAdapter->sataChannel[channel] == NULL)
+    {
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "trying to reset disabled channel, host=%d, channel=%d\n",
+                 SCpnt->device->host->host_no, channel);
+        spin_unlock_irqrestore (&pAdapter->adapter_lock, lock_flags);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+        spin_lock_irq(&io_request_lock);
+#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,13)
+        spin_lock_irq(pHost->scsihost->host_lock);
+#endif
+        return FAILED;
+    }
+
+    mvSataDisableChannelDma(pMvSataAdapter, channel);
+
+    /* Flush pending commands */
+    mvSataFlushDmaQueue (pMvSataAdapter, channel, MV_FLUSH_TYPE_CALLBACK);
+
+    /* Hardware reset channel */
+    mvSataChannelHardReset(pMvSataAdapter, channel);
+
+    if (pMvSataAdapter->sataChannel[channel])
+    {
+        mvRestartChannel(&pAdapter->ialCommonExt, channel,
+                         pAdapter->ataScsiAdapterExt, MV_TRUE);
+        mv_ial_block_requests(pAdapter, channel);
+    }
+    /* don't call scsi done for the commands on this channel*/
+    mv_ial_lib_get_first_cmnd(pAdapter, channel);
+    spin_unlock_irqrestore(&pAdapter->adapter_lock, lock_flags);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+    spin_lock_irq(&io_request_lock);
+#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,13)
+    spin_lock_irq(pHost->scsihost->host_lock);
+#endif
+    return SUCCESS;
+}
+
+static MV_VOID mvAta2HostString(IN MV_U16 *source,
+                                OUT MV_U16 *target,
+                                IN MV_U32 wordsCount
+                               )
+{
+    MV_U32 i;
+    for (i=0 ; i < wordsCount; i++)
+    {
+        target[i] = MV_LE16_TO_CPU(target[i]);
+    }
+}
+
+/****************************************************************
+ *  Name:   mv_ial_ht_proc_info
+ *
+ *  Description:   /proc file
+ *
+ *  Parameters:
+ *
+ *  Returns:
+ *
+ ****************************************************************/
+int mv_ial_ht_proc_info(struct Scsi_Host *pshost,
+                        char *buffer, char **start, off_t offset,
+                        int length, int inout)
+{
+    int len = 0, temp, pmPort;
+    IAL_ADAPTER_T       *pAdapter;
+    MV_SATA_ADAPTER *pMvSataAdapter;
+    IAL_HOST_T       *pHost = HOSTDATA(pshost);
+
+    unsigned long lock_flags;
+
+    pAdapter = MV_IAL_ADAPTER(pshost);
+    pMvSataAdapter = &pAdapter->mvSataAdapter;
+    temp = pHost->channelIndex;
+    spin_lock_irqsave (&pAdapter->adapter_lock, lock_flags);
+    if (inout == 1)
+    {                     /* Writing to file */
+        /* The format is 'int_coal <sata unit> <coal_threshold> <timeout>' */
+        int i;
+        /* Check signature 'int_coal' at start of buffer */
+        if (!strncmp (buffer, "int_coal", strlen ("int_coal")))
+        {
+            int sata_unit;
+            u32 time_thre, coal_thre;
+            i = sscanf (buffer + strlen ("int_coal"), "%d %d %d\n",
+                        &sata_unit, &coal_thre, &time_thre);
+            if (i == 3)
+            {        /* Three matched inputs */
+                mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "[%d]: Modifying interrupt coalescing of unit %d to %d threshold and %d timer\n",pMvSataAdapter->adapterId, sata_unit, coal_thre, time_thre);
+                mvSataSetIntCoalParams (pMvSataAdapter, sata_unit, coal_thre, time_thre);
+            }
+            else
+            {
+                mvLogMsg(MV_IAL_LOG_ID,  MV_DEBUG, "[%d]: Error in interrupt coalescing parameters\n",
+                         pMvSataAdapter->adapterId);
+            }
+        }
+        /* Check signature 'sata_phy_shutdown' at start of buffer */
+        else if (!strncmp (buffer, "sata_phy_shutdown", strlen ("sata_phy_shutdown")))
+        {
+            int sata_phy;
+            i = sscanf (buffer + strlen ("sata_phy_shutdown"), "%d\n", &sata_phy);
+            if (i == 1)
+            {        /* Three matched inputs */
+
+                if (mvSataIsStorageDeviceConnected (pMvSataAdapter, sata_phy, NULL) == MV_TRUE)
+                {
+                    mvLogMsg(MV_IAL_LOG_ID,  MV_DEBUG, "[%d,%d]: Warning - shutting down a phy that is connected to a storage device\n", pMvSataAdapter->adapterId, sata_phy);
+                }
+                if (mvSataChannelPhyShutdown (pMvSataAdapter, sata_phy) == MV_TRUE)
+                {
+                    mvLogMsg(MV_IAL_LOG_ID,  MV_DEBUG, "[%d,%d]: Shutting down SATA phy\n", pMvSataAdapter->adapterId, sata_phy);
+                }
+            }
+            else
+            {
+                mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "[%d]: Error in shutting down SATA phy parameters\n",
+                         pMvSataAdapter->adapterId);
+            }
+        }
+        else if (!strncmp (buffer, "sata_phy_powerup", strlen ("sata_phy_powerup")))
+        {
+            int sata_phy;
+            i = sscanf (buffer + strlen ("sata_phy_powerup"), "%d\n", &sata_phy);
+            if (i == 1)
+            {        /* Three matched inputs */
+                if (mvSataChannelPhyPowerOn (pMvSataAdapter, sata_phy) == MV_TRUE)
+                {
+                    mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "[%d,%d]: Turning on SATA phy\n", pMvSataAdapter->adapterId, sata_phy);
+                }
+            }
+            else
+            {
+                mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG,"[%d]: Error in powering up SATA phy parameters\n",
+                         pMvSataAdapter->adapterId);
+            }
+        }
+        spin_unlock_irqrestore (&pAdapter->adapter_lock, lock_flags);
+        return length;
+    }
+    else
+    {      /* Reading from file */
+        int i;
+        /*
+         * Write to the file the time stamp which is difference between last
+         * jiffies and current one. Next to it write the HZ parameter which
+         * indicates how many time jiffies parameter is incremented in a
+         * second.
+         */
+        len += snprintf (buffer + len,length - len, "%s\n", mv_ial_proc_version);
+        if (len >= length)
+        {
+            goto out;
+        }
+        len += snprintf (buffer + len,length - len, "\nTimeStamp :\n%ld\t%d\n",
+                         jiffies, HZ);
+        if (len >= length)
+        {
+            goto out;
+        }
+        /* Write the number of interrupts this adapter generated within the
+         * sampling time.
+         */
+        len += snprintf (buffer + len,length - len, "\nNumber of interrupts generated by the adapter is : \n%d\n",
+                         pAdapter->procNumOfInterrupts);
+        if (len >= length)
+        {
+            goto out;
+        }
+        if (pAdapter->pcidev)
+        {
+            len += snprintf (buffer + len, length - len, "\nPCI location: Bus %d, Slot %d\n",
+                             pAdapter->pcidev->bus->number,
+                             PCI_SLOT(pAdapter->pcidev->devfn));
+        
+            if (len >= length)
+            {
+                goto out;
+            }
+            len += snprintf (buffer + len, length - len, "DeviceID: %x, Rev %x,"
+                             " adapterId %d, channel %d \n",
+                             pAdapter->mvSataAdapter.pciConfigDeviceId,
+                             pAdapter->mvSataAdapter.pciConfigRevisionId,   
+                             pAdapter->mvSataAdapter.adapterId,
+                             pHost->channelIndex);
+
+            if (len >= length)
+            {
+                goto out;
+            }
+        }
+        else /*integrated sata*/
+        {
+            len += snprintf (buffer + len, length - len, "\nIntegrated Sata adapterId %d,  "
+                             "channel %d\n",pAdapter->mvSataAdapter.adapterId,
+                             pHost->channelIndex);
+            
+            if (len >= length)
+            {
+                goto out;
+            }  
+        }
+        if (pMvSataAdapter->sataChannel[temp])
+        {
+            if (pMvSataAdapter->sataChannel[temp]->deviceType == MV_SATA_DEVICE_TYPE_PM)
+            {
+                len += snprintf (buffer + len, length - len, 
+                                 "Port Multiplier connected, switching mode: %s\n",
+                                 (pMvSataAdapter->sataChannel[temp]->FBSEnabled == MV_TRUE) ?
+                                 "FBS":"CBS");
+
+                if (len >= length)
+                {
+                    goto out;
+                }
+            }
+        }
+        /*
+         * Check if channel connected.
+         * If not connected write -1 on a line
+         * If connected, write a line that has -
+         * 1.. Adapter number
+         * 2.. SCSI channel number (equivalent to SATA channel number).
+         * 3.. ID
+         * 4.. LUN (always 0)
+         * 5.. vendor name
+         * 6.. number of outstanding commands accumulated
+         * 7.. total sampling of outstanding commands
+         * 8.. total sectors transferred
+         * 9.. flag if queued / non-queued (1/0)
+         * 10. flag if LBA 48 or not (1/0)
+         * 11. flag if the storage device can be removed or not
+         *  (1 means can't be removed / 0 can be removed).
+         */
+        len += snprintf (buffer + len,length - len,"\n%s\t%s\t%s\t%s\t%s\t%s\t%s\t\t%s\t%s\n",
+                         "Adapter", "Channel", "Id", "LUN", "TO", "TS", "Vendor",
+                         "Mode", "LBA48");
+        if (len >= length)
+        {
+            goto out;
+        }
+        if ((len + 100) >= length)
+        {
+            goto out;
+        }
+        for (i = 0 ; i < 80 ; i++)
+            buffer [len + i] = '-';
+        len += i;
+        len += snprintf (buffer + len,length - len, "\n");
+        if (len >= length)
+        {
+            goto out;
+        }
+        
+        if (pMvSataAdapter->sataChannel[temp])
+        {
+            for (pmPort = 0; pmPort < MV_SATA_PM_MAX_PORTS; pmPort++)
+            {
+                if (pmPort > 0 &&
+                    (pMvSataAdapter->sataChannel[temp]->deviceType != MV_SATA_DEVICE_TYPE_PM))
+                {
+                    break;
+                }
+                if (pAdapter->ataScsiAdapterExt->ataDriveData[temp][pmPort].driveReady == MV_FALSE)
+                {
+                    continue;
+                }
+
+                len += snprintf (buffer + len,length - len, "%d\t%d\t%d\t%d\t%u\t%u\t",
+                                 pAdapter->mvSataAdapter.adapterId, temp, pmPort, 0,
+                                 pAdapter->ataScsiAdapterExt->ataDriveData[temp][pmPort].stats.totalIOs,
+                                 pAdapter->ataScsiAdapterExt->ataDriveData[temp][pmPort].stats.totalSectorsTransferred);
+                if (len >= length)
+                {
+                    goto out;
+                }
+                /*
+                 * Copy first 10 characters of the vendor name from the IDENTIFY
+                 * DEVICE ATA command result buffer
+                 */
+                if ((len+10) >= length)
+                {
+                    goto out;
+                }
+                memcpy (buffer+len,
+                        pAdapter->ataScsiAdapterExt->ataDriveData[temp][pmPort].identifyInfo.model, 10);
+                mvAta2HostString((MV_U16 *)(buffer+len), (MV_U16 *)(buffer+len), 5);
+                /*
+                 * Clean spaces in vendor name and swap odd and even characters.
+                 * The swap is due to the format of the IDENTIFY DEVICE command
+                 */
+                for (i=0 ; i<10 ; i+=2)
+                {
+                    char ch = buffer[len + i];
+                    buffer[len + i] = buffer[len+1 + i];
+                    buffer[len+1 + i] = ch;
+                    if (buffer[len + i] == ' ')
+                    {
+                        buffer[len + i + 1] = ' ';
+                        break;
+                    }
+                    if (buffer[len+1 + i] == ' ')
+                    {
+                        break;
+                    }
+                }
+                if ((len + 10) >= length)
+                {
+                    goto out;
+                }
+                for (; i < 10; i++)
+                {
+                    buffer[len + i] = ' ';
+                }
+
+                len += 10;
+                len += snprintf (buffer + len,length - len, "\t%s \t%d\n",
+                                 (pMvSataAdapter->sataChannel[temp]->queuedDMA == MV_EDMA_MODE_QUEUED) ?
+                                  "TCQ" : (pMvSataAdapter->sataChannel[temp]->queuedDMA == MV_EDMA_MODE_NATIVE_QUEUING) ?
+                                  "NCQ":"Normal",
+                                 (pAdapter->ataScsiAdapterExt->ataDriveData[temp][pmPort].identifyInfo.LBA48Supported == MV_TRUE)  ? 1 : 0);
+                if (len >= length)
+                {
+                    goto out;
+                }
+            }
+        }
+        if ((!pMvSataAdapter->sataChannel[temp]) &&
+            (mvSataIsStorageDeviceConnected (pMvSataAdapter, temp, NULL) == MV_TRUE))
+            len += snprintf (buffer + len,length - len, "Storage device connected to channel %d is malfunction\n", temp);
+        if (len >= length)
+        {
+            goto out;
+        }
+        len += snprintf (buffer + len,length - len,"\n\n\nTO           - Total Outstanding commands accumulated\n");
+        if (len >= length)
+        {
+            goto out;
+        }
+        len += snprintf (buffer + len,length - len,"TSA          - Total number of IOs accumulated\n");
+        if (len >= length)
+        {
+            goto out;
+        }
+        len += snprintf (buffer + len,length - len,"TS           - Total number of sectors transferred (both read/write)\n");
+        if (len >= length)
+        {
+            goto out;
+        }
+        len += snprintf (buffer + len,length - len,"Mode         - EDMA mode (TCQ|NCQ|Normal)\n");
+        if (len >= length)
+        {
+            goto out;
+        }
+        len += snprintf (buffer + len,length - len,"LBA48        - Large Block Address 48 feature set enabled\n");
+        if (len >= length)
+        {
+            goto out;
+        }
+    }
+    out:
+    spin_unlock_irqrestore (&pAdapter->adapter_lock, lock_flags);
+    return(len);
+}
+
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+/****************************************************************
+ *  Name:   mv_ial_ht_proc_info (kernel version < 2.6)
+ *
+ *  Description:   /proc file
+ *
+ *  Parameters:
+ *
+ *  Returns:
+ *
+ ****************************************************************/
+int mv_ial_ht_proc_info24(char *buffer, char **start, off_t offset,
+                        int length, int inode, int inout)
+{
+    struct Scsi_Host *pshost = 0;
+
+    for (pshost = scsi_hostlist; pshost; pshost = pshost->next)
+    {
+        if (pshost->host_no == inode)
+        {
+            return mv_ial_ht_proc_info(pshost, buffer, start,
+                                       offset,length, inout);
+        }
+    }
+    return -EINVAL;
+}
+#endif
+
+
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+
+static int mv_ial_ht_slave_configure (struct scsi_device* pDevs)
+{
+    IAL_HOST_T *pHost = HOSTDATA (pDevs->host);
+    struct Scsi_Host* scsiHost = pDevs->host;
+    struct scsi_device*    pDevice = NULL;
+    mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "[%d]: slave configure\n",
+                        pHost->pAdapter->mvSataAdapter.adapterId);
+
+    if (pHost->use128Entries == MV_TRUE)
+    {
+        pHost->scsihost->can_queue = MV_SATA_GEN2E_SW_QUEUE_SIZE;
+    }
+    else
+    {
+        pHost->scsihost->can_queue = MV_SATA_SW_QUEUE_SIZE;
+    }
+    mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "[%d %d]: adjust host[channel] queue depth"
+             " to %d\n", pHost->pAdapter->mvSataAdapter.adapterId, pHost->channelIndex,
+                  pHost->scsihost->can_queue);
+    shost_for_each_device(pDevice, scsiHost)
+    {
+        int deviceQDepth = 2;
+        
+        if(pHost->pAdapter->ataScsiAdapterExt->ataDriveData[pHost->channelIndex][pDevice->id].identifyInfo.deviceType == MV_SATA_DEVICE_TYPE_ATAPI_DEVICE)
+        {
+            mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "[%d %d %d]: ATAPI device found\n", 
+                  pHost->pAdapter->mvSataAdapter.adapterId, pHost->channelIndex,
+                  pDevice->id);
+            pDevice->use_10_for_rw = 1;
+            pDevice->use_10_for_ms = 1;
+            scsi_adjust_queue_depth(pDevice, 0, 1);
+//                pHost->scsihost->max_cmd_len = 12;
+	    blk_queue_max_sectors(pDevice->request_queue, 256);
+        }
+        else
+        {
+
+            if (pHost->mode != MV_EDMA_MODE_NOT_QUEUED)
+            {
+                deviceQDepth = 31;
+                if (pHost->scsihost->can_queue >= 32)
+                {
+                    deviceQDepth = 32;
+                }
+            }
+            mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "[%d %d %d]: adjust device queue "
+                     "depth to %d\n", pHost->pAdapter->mvSataAdapter.adapterId,
+                     pDevice->channel, pDevice->id, deviceQDepth);
+            scsi_adjust_queue_depth(pDevice, MSG_SIMPLE_TAG, deviceQDepth);
+#ifdef MV_SUPPORT_1MBYTE_IOS
+            if(pHost->pAdapter->ataScsiAdapterExt->ataDriveData[pHost->channelIndex][pDevice->id].identifyInfo.LBA48Supported == MV_TRUE)
+	    {
+	        blk_queue_max_sectors(pDevice->request_queue, 2048);
+ 	        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "[%d %d %d]: set device max sectors to 2048 \n",
+	            pHost->pAdapter->mvSataAdapter.adapterId,
+                    pHost->channelIndex, pDevice->id);
+            }
+#endif
+        }
+    }
+    scsiHost->max_cmd_len = 16;    
+    return 0;
+}
+#else
+static void mv_ial_ht_select_queue_depths (struct Scsi_Host* pHost,
+                                           struct scsi_device* pDevs)
+{
+    IAL_HOST_T *ial_host = HOSTDATA (pHost);
+    struct scsi_device* pDevice;
+    if (ial_host != NULL)
+    {
+        
+        /* linux 2.4 queue depth is not tunable, so we set the device queue */
+        /* to the max value (MV_SATA_SW_QUEUE_SIZE), and limit the number queued */
+        /* commands using the cmd_per_lun */
+
+        /* set can_queue to the max number of queued commands per host (sata */
+        /* channel). This may casue startvation if PortMultiplier is connected*/
+        pHost->cmd_per_lun = 31;
+        if (ial_host->mode != MV_EDMA_MODE_NOT_QUEUED)
+        {   
+            if (ial_host->use128Entries == MV_TRUE)
+            {
+                pHost->can_queue = MV_SATA_GEN2E_SW_QUEUE_SIZE;
+                pHost->cmd_per_lun = 32;
+            }
+            else
+            {
+                pHost->can_queue = MV_SATA_SW_QUEUE_SIZE;
+            }
+        }
+        else
+        {
+            pHost->can_queue = MV_DEFAULT_QUEUE_DEPTH;
+        }
+        
+
+        /*always allocate the max number of commands */
+        for (pDevice = pDevs; pDevice; pDevice = pDevice->next)
+        {
+            if (pDevice->host == pHost)
+            {
+                pDevice->queue_depth = MV_SATA_SW_QUEUE_SIZE;
+            }
+        }
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG, "[%d %d]: adjust queue depth to %d\n",
+            ial_host->pAdapter->mvSataAdapter.adapterId,
+            ial_host->channelIndex,
+            pHost->can_queue);
+    }
+}
+#endif
+
+int mv_ial_ht_abort(struct scsi_cmnd *SCpnt)
+{
+    IAL_ADAPTER_T   *pAdapter;
+    IAL_HOST_T      *pHost;
+
+    MV_SATA_ADAPTER *pMvSataAdapter;
+    MV_U8           channel;
+    unsigned long lock_flags;
+    struct scsi_cmnd *cmnds_done_list = NULL;
+
+    mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "abort command %p\n", SCpnt);
+    if (SCpnt == NULL)
+    {
+        return FAILED;
+    }
+    pHost = HOSTDATA(SCpnt->device->host);
+    channel = pHost->channelIndex;
+    pAdapter = MV_IAL_ADAPTER(SCpnt->device->host);
+    pMvSataAdapter = &pAdapter->mvSataAdapter;
+    
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+    if (SCpnt->serial_number != SCpnt->serial_number_at_timeout)
+    {
+        mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "[%d %d %d]: abort failed, "
+                 "serial number mismatch\n",SCpnt->device->host->host_no,
+                 channel, SCpnt->device->id);
+        return FAILED;
+    }
+    spin_unlock_irq (&io_request_lock);
+#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,13)
+    spin_unlock_irq (pHost->scsihost->host_lock);
+#endif
+    spin_lock_irqsave (&pAdapter->adapter_lock, lock_flags);
+
+    mvRestartChannel(&pAdapter->ialCommonExt, channel,
+                     pAdapter->ataScsiAdapterExt, MV_TRUE);
+    mv_ial_block_requests(pAdapter, channel);
+
+    cmnds_done_list = mv_ial_lib_get_first_cmnd(pAdapter, channel);
+
+    spin_unlock_irqrestore (&pAdapter->adapter_lock, lock_flags);
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+    spin_lock_irq(&io_request_lock);
+#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,13)
+    spin_lock_irq (pHost->scsihost->host_lock);
+#endif
+
+    if (cmnds_done_list)
+    {
+        scsi_report_bus_reset(SCpnt->device->host, SCpnt->device->channel);
+        mv_ial_lib_do_done(cmnds_done_list);
+        return SUCCESS;
+    }
+
+    mvLogMsg(MV_IAL_LOG_ID, MV_DEBUG_ERROR, "[%d %d %d]: command abort failed\n",
+             SCpnt->device->host->host_no, SCpnt->device->channel, SCpnt->device->id);
+    return FAILED;
+}
+
+
+Scsi_Host_Template driver_template = mvSata;
+
+MODULE_LICENSE("Dual BSD/GPL");
+MODULE_DESCRIPTION("Marvell Serial ATA PCI-X Adapter");
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+#include "scsi_module.c"
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sata/mvIALCommon.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sata/mvIALCommon.h
@@ -0,0 +1,192 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+*******************************************************************************/
+/*******************************************************************************
+* mvIALCommon.h
+*
+* DESCRIPTION:
+*       H implementation for IAL's common functions.
+*
+* DEPENDENCIES:
+*   mvSata.h
+*   mvStorageDev.h
+*
+*******************************************************************************/
+#ifndef __INCmvIALCommonh
+#define __INCmvIALCommonh
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/* includes */
+#include "mvSata.h"
+#include "mvStorageDev.h"
+
+/* defines  */
+
+/*Timer period in milliseconds*/
+#define MV_IAL_ASYNC_TIMER_PERIOD       500
+#define MV_IAL_SRST_TIMEOUT             31000
+#define MV_IAL_WAIT_FOR_RDY_TIMEOUT     10000
+/* typedefs */
+
+
+
+typedef enum mvAdapterState
+{
+    ADAPTER_INITIALIZING,
+    ADAPTER_READY,
+    ADAPTER_FATAL_ERROR
+} MV_ADAPTER_STATE;
+
+typedef enum mvChannelState
+{
+    CHANNEL_NOT_CONNECTED,
+    CHANNEL_CONNECTED,
+    CHANNEL_IN_SRST,
+    CHANNEL_PM_INIT_DEVICES,
+    CHANNEL_READY,
+    CHANNEL_PM_HOT_PLUG,
+} MV_CHANNEL_STATE;
+
+typedef struct mvDriveSerialNumber
+{
+    MV_U8 serial[IDEN_SERIAL_NUM_SIZE];    
+}   MV_DRIVE_SERIAL_NUMBER;
+
+
+typedef struct mvDrivesInfo
+{
+    MV_U16                      drivesSnapshotSaved;
+    MV_DRIVE_SERIAL_NUMBER      driveSerialSaved[MV_SATA_PM_MAX_PORTS];    
+    MV_U16                      drivesSnapshotCurrent;
+    MV_DRIVE_SERIAL_NUMBER      driveSerialCurrent[MV_SATA_PM_MAX_PORTS];    
+}   MV_DRIVES_INFO;
+
+typedef enum mvPortState
+{
+    MV_PORT_NOT_INITIALIZED,
+    MV_PORT_WAIT_FOR_RDY, /* wait for the disk's signature*/
+    MV_PORT_ISSUE_SRST,
+    MV_PORT_IN_SRST,
+    MV_PORT_INIT_DEVICE,
+    MV_PORT_DONE, /* PM ports scan is complete successfully*/
+    MV_PORT_FAILED
+} MV_PORT_STATE;
+
+typedef struct mvIALChannelExtension
+{
+    MV_U8                       PMnumberOfPorts;
+    MV_U16                      PMdevsToInit;
+    MV_U8                       devInSRST;
+    MV_PORT_STATE		port_state;
+    MV_BOOLEAN                  completionError;
+    MV_U8                       pmAccessType;
+    MV_U8                       pmReg;
+    MV_BOOLEAN                  pmRegAccessInProgress;
+    MV_BOOLEAN                  pmAsyncNotifyEnabled;
+    MV_U8                       pmRegPollCounter;
+    MV_U32                      SRSTTimerThreshold;
+    MV_U32                      SRSTTimerValue;
+    MV_VOID_PTR                 IALChannelPendingCmdQueue;
+    MV_BOOLEAN                  bHotPlug;
+    MV_DRIVES_INFO              drivesInfo;
+    MV_STORAGE_DEVICE_REGISTERS mvStorageDevRegisters;
+#ifdef MV_SATA_STORE_COMMANDS_INFO_ON_IAL_STACK
+    MV_QUEUE_COMMAND_INFO       commandInfo;
+#endif
+} MV_IAL_COMMON_CHANNEL_EXTENSION;
+
+
+typedef struct mvIALCommonAdapterExtension
+{
+    MV_SATA_ADAPTER   *pSataAdapter;
+    MV_ADAPTER_STATE  adapterState;
+    MV_CHANNEL_STATE  channelState[MV_SATA_CHANNELS_NUM];
+    MV_IAL_COMMON_CHANNEL_EXTENSION IALChannelExt[MV_SATA_CHANNELS_NUM];
+} MV_IAL_COMMON_ADAPTER_EXTENSION;
+
+
+/*Public functions*/
+MV_BOOLEAN mvAdapterStartInitialization(MV_SATA_ADAPTER* pSataAdapter,
+                                        MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                        MV_SAL_ADAPTER_EXTENSION *scsiAdapterExt);
+
+void mvRestartChannel(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                      MV_U8 channelIndex,
+                      MV_SAL_ADAPTER_EXTENSION *scsiAdapterExt,
+                      MV_BOOLEAN    bBusReset);
+
+void mvStopChannel(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                   MV_U8 channelIndex,
+                   MV_SAL_ADAPTER_EXTENSION *scsiAdapterExt);
+
+void mvPMHotPlugDetected(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                         MV_U8 channelIndex,
+                         MV_SAL_ADAPTER_EXTENSION *scsiAdapterExt);
+
+
+MV_SCSI_COMMAND_STATUS_TYPE mvExecuteScsiCommand(MV_SATA_SCSI_CMD_BLOCK  *pScb,
+                                                 MV_BOOLEAN canQueue);
+
+MV_BOOLEAN  mvIALTimerCallback(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                               MV_SAL_ADAPTER_EXTENSION *scsiAdapterExt);
+
+void mvCommandCompletionErrorHandler(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                     MV_U8 channelIndex);
+
+MV_BOOLEAN mvRemoveFromSCSICommandQueue(MV_IAL_COMMON_ADAPTER_EXTENSION *ialExt,
+                                        MV_U8 channelIndex,
+                                        MV_SATA_SCSI_CMD_BLOCK *pScb);
+
+/*The following functions which must be implemented in IAL*/
+
+MV_BOOLEAN IALConfigQueuingMode(MV_SATA_ADAPTER *pSataAdapter,
+                                MV_U8 channelIndex,
+                                MV_EDMA_MODE mode,
+                                MV_SATA_SWITCHING_MODE switchingMode,
+                                MV_BOOLEAN  use128Entries);
+
+
+MV_BOOLEAN IALInitChannel(MV_SATA_ADAPTER *pSataAdapter, MV_U8 channelIndex);
+
+void IALReleaseChannel(MV_SATA_ADAPTER *pSataAdapter, MV_U8 channelIndex);
+MV_BOOLEAN IALBusChangeNotify(MV_SATA_ADAPTER *pSataAdapter,
+                              MV_U8 channelIndex);
+MV_BOOLEAN IALBusChangeNotifyEx(MV_SATA_ADAPTER *pSataAdapter, 
+                                MV_U8 channelIndex, 
+                                MV_U16 targetsToRemove,
+                                MV_U16 targetsToAdd);
+
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* __INCmvIALCommonh */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sata/mvIALCommonUtils.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sata/mvIALCommonUtils.c
@@ -0,0 +1,1274 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+*******************************************************************************/
+/*******************************************************************************
+* mvIALCommonUtils.c
+*
+* DESCRIPTION:
+*       C implementation for IAL's extension utility functions.
+*
+* DEPENDENCIES:
+*   mvIALCommonUtils.h
+*
+*******************************************************************************/
+
+/* includes */
+#include "mvOs.h"
+#include "mvIALCommonUtils.h"
+
+#define MV_ANY_PM {0, 0, 0, 0, 0}
+#define MV_MARVELL_PM_A0 {0x11AB, 0x1116, 0, 0, 0}
+#define MV_MARVELL_PM {0x11AB, 0x1116, 0xFF, 0, 0}
+struct _EDMAConfiguration
+{
+    MV_U8                   configNumber;
+    /*inputs*/
+    MV_SATA_GEN             adapterGen;
+    MV_SATA_DEVICE_TYPE     connectedDevice;
+    MV_BOOLEAN              specificPM;
+    MV_SATA_PM_DEVICE_INFO  PMInfo;
+    MV_BOOLEAN              AllNCQ;
+    MV_BOOLEAN              AllTCQ;
+    MV_U8                   maxDisks;
+    /*outputs*/
+    MV_EDMA_MODE            EDMAMode;
+    MV_SATA_SWITCHING_MODE  switchingMode;
+    MV_BOOLEAN              use128Entries;
+} EDMAConfigurations[] =
+{
+    /*Gen1, TCQ disk*/
+    {1, MV_SATA_GEN_I, MV_SATA_DEVICE_TYPE_ATA_DISK, MV_FALSE, MV_ANY_PM, MV_FALSE, MV_TRUE, 1,
+        MV_EDMA_MODE_QUEUED, MV_SATA_SWITCHING_MODE_NONE, MV_FALSE},
+    /*Gen1, Normal disk*/
+    {2, MV_SATA_GEN_I, MV_SATA_DEVICE_TYPE_ATA_DISK, MV_FALSE, MV_ANY_PM, MV_FALSE, MV_FALSE, 1,
+        MV_EDMA_MODE_NOT_QUEUED, MV_SATA_SWITCHING_MODE_NONE, MV_FALSE},
+    /*Gen2, NCQ disk*/
+    {3, MV_SATA_GEN_II, MV_SATA_DEVICE_TYPE_ATA_DISK, MV_FALSE, MV_ANY_PM, MV_TRUE, MV_FALSE, 1,
+        MV_EDMA_MODE_NATIVE_QUEUING, MV_SATA_SWITCHING_MODE_NONE, MV_FALSE},
+    /*Gen2, TCQ disk*/
+    {4, MV_SATA_GEN_II, MV_SATA_DEVICE_TYPE_ATA_DISK, MV_FALSE, MV_ANY_PM, MV_FALSE, MV_TRUE, 1,
+        MV_EDMA_MODE_QUEUED, MV_SATA_SWITCHING_MODE_NONE, MV_FALSE},
+    /*Gen2, Normal disk*/
+    {5, MV_SATA_GEN_II, MV_SATA_DEVICE_TYPE_ATA_DISK, MV_FALSE, MV_ANY_PM, MV_FALSE, MV_FALSE, 1,
+        MV_EDMA_MODE_NOT_QUEUED, MV_SATA_SWITCHING_MODE_NONE, MV_FALSE},
+    /*Gen2, Marvell PM, NCQ disks*/
+    /*{6, MV_SATA_GEN_II, MV_SATA_DEVICE_TYPE_PM, MV_TRUE, MV_MARVELL_PM, MV_TRUE, MV_FALSE, MV_SATA_PM_MAX_PORTS,
+        MV_EDMA_MODE_NATIVE_QUEUING, MV_SATA_SWITCHING_MODE_QCBS, MV_FALSE},*/
+    /*Gen2, Marvell PM, single TCQ disk*/
+    /*{7, MV_SATA_GEN_II, MV_SATA_DEVICE_TYPE_PM, MV_TRUE, MV_MARVELL_PM, MV_FALSE, MV_TRUE, 1,
+        MV_EDMA_MODE_QUEUED, MV_SATA_SWITCHING_MODE_QCBS, MV_FALSE},*/
+    /*Gen2, Marvell PM, Normal disks*/
+    /*{8, MV_SATA_GEN_II, MV_SATA_DEVICE_TYPE_PM, MV_TRUE, MV_MARVELL_PM, MV_FALSE, MV_FALSE, MV_SATA_PM_MAX_PORTS,
+        MV_EDMA_MODE_NOT_QUEUED, MV_SATA_SWITCHING_MODE_QCBS, MV_FALSE},*/
+    /*Gen2, PM, single NCQ disk*/
+    {9, MV_SATA_GEN_II, MV_SATA_DEVICE_TYPE_PM, MV_FALSE, MV_ANY_PM, MV_TRUE, MV_FALSE, 1,
+        MV_EDMA_MODE_NATIVE_QUEUING, MV_SATA_SWITCHING_MODE_CBS, MV_FALSE},
+    /*Gen2, PM, single TCQ disk*/
+    {10, MV_SATA_GEN_II, MV_SATA_DEVICE_TYPE_PM, MV_FALSE, MV_ANY_PM, MV_FALSE, MV_TRUE, 1,
+        MV_EDMA_MODE_QUEUED, MV_SATA_SWITCHING_MODE_CBS, MV_FALSE},
+    /*Gen2, PM, Normal disks*/
+    {11, MV_SATA_GEN_II, MV_SATA_DEVICE_TYPE_PM, MV_FALSE, MV_ANY_PM, MV_FALSE, MV_FALSE, MV_SATA_PM_MAX_PORTS,
+        MV_EDMA_MODE_NOT_QUEUED, MV_SATA_SWITCHING_MODE_CBS, MV_FALSE},
+    /*Gen2E, NCQ disk*/
+    {12, MV_SATA_GEN_IIE, MV_SATA_DEVICE_TYPE_ATA_DISK, MV_FALSE, MV_ANY_PM, MV_TRUE, MV_FALSE, 1,
+        MV_EDMA_MODE_NATIVE_QUEUING, MV_SATA_SWITCHING_MODE_NONE, MV_FALSE},
+    /*Gen2E, TCQ disk*/
+    {13, MV_SATA_GEN_IIE, MV_SATA_DEVICE_TYPE_ATA_DISK, MV_FALSE, MV_ANY_PM, MV_FALSE, MV_TRUE, 1,
+        MV_EDMA_MODE_QUEUED, MV_SATA_SWITCHING_MODE_NONE, MV_FALSE},
+    /*Gen2E, Normal disk*/
+    {14, MV_SATA_GEN_IIE, MV_SATA_DEVICE_TYPE_ATA_DISK, MV_FALSE, MV_ANY_PM, MV_FALSE, MV_FALSE, 1,
+        MV_EDMA_MODE_NOT_QUEUED, MV_SATA_SWITCHING_MODE_NONE, MV_FALSE},
+    /*Gen2E, Marvell PM <= A0, NCQ disks*/
+    {15, MV_SATA_GEN_IIE, MV_SATA_DEVICE_TYPE_PM, MV_TRUE, MV_MARVELL_PM_A0, MV_TRUE, MV_FALSE, MV_SATA_PM_MAX_PORTS,
+        MV_EDMA_MODE_NOT_QUEUED, MV_SATA_SWITCHING_MODE_CBS, MV_FALSE},
+    /*Gen2E, PM, NCQ disks*/
+    {16, MV_SATA_GEN_IIE, MV_SATA_DEVICE_TYPE_PM, MV_FALSE, MV_ANY_PM, MV_TRUE, MV_FALSE, MV_SATA_PM_MAX_PORTS,
+        MV_EDMA_MODE_NATIVE_QUEUING, MV_SATA_SWITCHING_MODE_FBS, MV_TRUE},
+    /*Gen2E, Marvell PM <= A0, single TCQ disk*/
+    {17, MV_SATA_GEN_IIE, MV_SATA_DEVICE_TYPE_PM, MV_TRUE, MV_MARVELL_PM_A0, MV_FALSE, MV_TRUE, 1,
+        MV_EDMA_MODE_QUEUED, MV_SATA_SWITCHING_MODE_CBS, MV_FALSE},
+    /*Gen2E, PM, TCQ disks*/
+    {18, MV_SATA_GEN_IIE, MV_SATA_DEVICE_TYPE_PM, MV_FALSE, MV_ANY_PM, MV_FALSE, MV_TRUE, MV_SATA_PM_MAX_PORTS,
+        MV_EDMA_MODE_QUEUED, MV_SATA_SWITCHING_MODE_FBS, MV_TRUE},
+    /*Gen2E, Marvell PM <= A0, Normal disks*/
+    {19, MV_SATA_GEN_IIE, MV_SATA_DEVICE_TYPE_PM, MV_TRUE, MV_MARVELL_PM_A0, MV_FALSE, MV_FALSE, MV_SATA_PM_MAX_PORTS,
+        MV_EDMA_MODE_NOT_QUEUED, MV_SATA_SWITCHING_MODE_CBS, MV_FALSE},
+    /*Gen2E, PM, Normal disks*/
+    {20, MV_SATA_GEN_IIE, MV_SATA_DEVICE_TYPE_PM, MV_FALSE, MV_ANY_PM, MV_FALSE, MV_FALSE, MV_SATA_PM_MAX_PORTS,
+        MV_EDMA_MODE_NOT_QUEUED, MV_SATA_SWITCHING_MODE_FBS, MV_FALSE},
+    /*Gen2E , ATAPI device*/
+    {21, MV_SATA_GEN_IIE, MV_SATA_DEVICE_TYPE_ATAPI_DEVICE, MV_FALSE, MV_ANY_PM, MV_FALSE, MV_FALSE, 1,
+        MV_EDMA_MODE_NOT_QUEUED, MV_SATA_SWITCHING_MODE_NONE, MV_FALSE},
+
+};
+
+MV_VOID mvSelectConfiguration(MV_SATA_ADAPTER        *pSataAdapter,
+                              MV_U8                  channelIndex,
+                              MV_SATA_GEN            gen,
+                              MV_SATA_DEVICE_TYPE    connectedDevice,
+                              MV_SATA_PM_DEVICE_INFO *pPMInfo,
+                              MV_BOOLEAN             AllNCQ,
+                              MV_BOOLEAN             AllTCQ,
+                              MV_BOOLEAN             disks,
+                              MV_EDMA_MODE           *pEdmaMode,
+                              MV_SATA_SWITCHING_MODE *pSwitchingMode,
+                              MV_BOOLEAN             *pUse128Entries)
+{
+    MV_U32      i;
+    MV_U32      configurationsNum = sizeof(EDMAConfigurations)/sizeof(struct _EDMAConfiguration);       
+
+    for (i = 0; i < configurationsNum; i++)
+    {
+        if (gen != EDMAConfigurations[i].adapterGen)
+        {
+            continue;
+        }
+        if (connectedDevice != EDMAConfigurations[i].connectedDevice)
+        {
+            continue;
+        }
+        if ((connectedDevice == MV_SATA_DEVICE_TYPE_PM) &&
+            (EDMAConfigurations[i].specificPM == MV_TRUE))
+        {
+            if ((pPMInfo->vendorId != EDMAConfigurations[i].PMInfo.vendorId) ||
+                (pPMInfo->deviceId != EDMAConfigurations[i].PMInfo.deviceId) ||
+                (pPMInfo->productRevision > EDMAConfigurations[i].PMInfo.productRevision))
+            {
+                continue;
+            }
+        }
+        if ((EDMAConfigurations[i].AllNCQ == MV_TRUE) &&
+            (AllNCQ == MV_FALSE))
+        {
+            continue;
+        }
+        if ((EDMAConfigurations[i].AllTCQ == MV_TRUE) &&
+            (AllTCQ == MV_FALSE))
+        {
+            continue;
+        }
+        if (disks > EDMAConfigurations[i].maxDisks)
+        {
+            continue;
+        }
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "[%d %d]: mvSelectConfiguration"
+                 ": Matching configuration found #%d\n",
+                 pSataAdapter->adapterId,
+                 channelIndex, 
+                 EDMAConfigurations[i].configNumber);
+
+        *pEdmaMode = EDMAConfigurations[i].EDMAMode;     
+        *pSwitchingMode = EDMAConfigurations[i].switchingMode;
+        *pUse128Entries = EDMAConfigurations[i].use128Entries;
+	/* some of the integrated adapters doesn't support the EDMA 128 entries mode*/
+	if(pSataAdapter->hostInterface == MV_HOST_IF_INTEGRATED)
+	{
+		*pUse128Entries = MV_FALSE;
+	}
+        break;
+    }
+    if ( i >= configurationsNum)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_FATAL_ERROR, "[%d %d]:"
+                 " in mvSelectConfiguration failed to find matching configuration\n",
+                 pSataAdapter->adapterId,
+                 channelIndex);
+        *pEdmaMode = MV_EDMA_MODE_NOT_QUEUED;
+        *pSwitchingMode = MV_SATA_SWITCHING_MODE_NONE;
+        *pUse128Entries = MV_FALSE;
+    }
+#ifdef MV_LOGGER
+    {
+        char *edmaModeStr[] = { "TCQ", "Normal", "NCQ"};
+        char *switchingModeStr[] = {"None", "CBS", "QCBS", "FBS"};
+
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "[%d %d]:"
+                 "mvSelectConfiguration: EDMA %s, switch mode %s, 128 mode %s\n",
+                 pSataAdapter->adapterId,
+                 channelIndex,
+                 edmaModeStr[(*pEdmaMode - MV_EDMA_MODE_QUEUED) % 3],
+                 switchingModeStr[(*pSwitchingMode - MV_SATA_SWITCHING_MODE_NONE) % 4],
+                 (*pUse128Entries == MV_TRUE) ? "yes":"no");
+
+    }
+#endif
+}
+
+static MV_BOOLEAN mvConfigSataDisk(MV_SATA_ADAPTER *pSataAdapter,
+                                   MV_U8 channelIndex,
+                                   MV_U8 PMPort,
+                                   ATA_IDENTIFY_INFO   *pIdentifyInfo,
+                                   MV_U16_PTR identifyBuffer);
+
+
+static MV_VOID mvAta2HostString(MV_U16 *source, MV_U16 *target,
+                                MV_U32 wordsCount)
+{
+    MV_U32 i;
+    for (i=0 ; i < wordsCount; i++)
+    {
+        /* Big to little*/
+        target[i] = (source[i] >> 8) | ((source[i] & 0xff) << 8);
+        /* Little to cpu*/
+        target[i] = MV_LE16_TO_CPU(target[i]);
+    }
+}
+
+/******************************************************************************
+ *  Name: ParseIdentifyResult
+ *
+ *  Description:    this functions parses the identify command results, checks
+ *                  that the connected deives can be accesed by device EDMA,
+ *                  and updates the ATA drive parameters stucture accordingly.
+ *
+ *  Parameters:     pSataChannel - pointer to the channel data structure.
+ *                  pIdentifyInfo- pointer to the ATA parameters structure.
+ *
+ *  Returns:        MV_TRUE if the ATA drive supported by device.
+ *
+ ******************************************************************************/
+MV_BOOLEAN mvParseIdentifyResult(MV_U16_PTR  iden,
+                                 ATA_IDENTIFY_INFO   *pIdentifyInfo)
+{
+    char    temp[80];
+    MV_U8  version;
+    MV_BOOLEAN  udmaModeEnabled = MV_FALSE;
+
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "Parse IDENTIFY data:\n");
+
+    mvAta2HostString( iden + IDEN_MODEL_OFFSET, (MV_U16_PTR)temp, 24);
+    temp[25] = '\0';
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %s\n","Model", temp);
+    memcpy(&pIdentifyInfo->model[0], iden + IDEN_MODEL_OFFSET, 24);
+    memcpy(&pIdentifyInfo->firmware[0], iden + IDEN_FIRMWARE_OFFSET, 4);
+    /* ATA version supported*/
+    if (iden[IDEN_ATA_VERSION] & MV_BIT7)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %d\n", "ATA version supported", 7);
+        version = 7;
+    }
+    else if (iden[IDEN_ATA_VERSION] & MV_BIT6)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %d\n", "ATA version supported", 6);
+        version = 6;
+    }
+    else if (iden[IDEN_ATA_VERSION] & MV_BIT5)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %d\n", "ATA version supported", 5);
+        version = 5;
+    }
+    else if (iden[IDEN_ATA_VERSION] & MV_BIT4)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %d\n", "ATA version supported", 4);
+        version = 4;
+    }
+    else
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, " IDENTIFY info: ATA "
+                 "version(%d) not supported\n", iden[IDEN_ATA_VERSION]);
+        return MV_FALSE;
+    }
+    pIdentifyInfo->version = version;
+    /*LBA addressing*/
+    if ((version >= 6) && (!(iden[IDEN_CAPACITY_1_OFFSET] & MV_BIT9)))
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, " IDENTIFY info: LBA not supported\n");
+        return MV_FALSE;
+    }
+    else
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %s\n", "Capabilities",
+                 "LBA supported");
+    }
+    /* 48 bit address */
+    if ((version >= 6) && (iden[IDEN_SUPPORTED_COMMANDS2] & MV_BIT10))
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %s\n", "LBA48 addressing", "supported");
+        pIdentifyInfo->LBA48Supported = MV_TRUE;
+
+	pIdentifyInfo->ATADiskSize = 
+		((MV_U64)iden[103] << 48) |
+		((MV_U64)iden[102] << 32) |
+		((MV_U64)iden[101] << 16) |
+		((MV_U64)iden[100]);
+
+                
+
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - 0x%x%04x%04x%04x sectors\n",
+                 "Number of sectors", iden[103] , iden[102], iden[101],
+                 iden[100]);
+    }
+    else
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %s\n",
+                 "LBA48 addressing", "Not supported");
+        pIdentifyInfo->LBA48Supported = MV_FALSE;
+        pIdentifyInfo->ATADiskSize = (iden[IDEN_NUM_OF_ADDRESSABLE_SECTORS + 1] << 16) |
+                                     (iden[IDEN_NUM_OF_ADDRESSABLE_SECTORS]);
+
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - 0x%x sectors\n",
+                 "Number of sectors",
+                 (iden[IDEN_NUM_OF_ADDRESSABLE_SECTORS + 1] << 16) |
+                 ((MV_U32)iden[IDEN_NUM_OF_ADDRESSABLE_SECTORS]));
+
+
+    }
+    /*DMA support*/
+    if ((version >= 6) && (!(iden[IDEN_CAPACITY_1_OFFSET] & MV_BIT8)))
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "IDENTIFY info: DMA not "
+                 "supported\n");
+        return MV_FALSE;
+    }
+    else
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %s\n", "Capabilities",
+                 "DMA supported");
+    }
+    /* PIO */
+    if ((iden[IDEN_VALID] & MV_BIT1) == 0)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, " IDENTIFY info: not "
+                 "able to find PIO mode\n");
+        return MV_FALSE;
+    }
+    else if (iden[IDEN_PIO_MODE_SPPORTED] & MV_BIT0)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %s\n", "PIO mode 3",
+                 "supported");
+        pIdentifyInfo->PIOMode = MV_ATA_TRANSFER_PIO_3;
+    }
+    else if (iden[IDEN_PIO_MODE_SPPORTED] & MV_BIT1)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %s\n", "PIO mode 4",
+                 "supported");
+        pIdentifyInfo->PIOMode = MV_ATA_TRANSFER_PIO_4;
+    }
+    else
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "IDENTIFY info: PIO "
+                 "modes 3 and 4 not supported\n");
+        pIdentifyInfo->PIOMode = MV_ATA_TRANSFER_PIO_SLOW;
+        return MV_FALSE;
+    }
+
+
+    /*UDMA*/
+    if ((iden[IDEN_VALID] & MV_BIT2) == 0)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, " IDENTIFY info: not "
+                 "able to find UDMA mode\n");
+        return MV_FALSE;
+    }
+
+
+    if ((version >= 7) && (iden[IDEN_UDMA_MODE] & MV_BIT6))
+    {
+        pIdentifyInfo->UdmaMode = MV_ATA_TRANSFER_UDMA_6;
+        if (iden[IDEN_UDMA_MODE] & MV_BIT14)
+        {
+            udmaModeEnabled = MV_TRUE;
+        }
+    }
+    else if ((version >= 6) && (iden[IDEN_UDMA_MODE] & MV_BIT5))
+    {
+        pIdentifyInfo->UdmaMode = MV_ATA_TRANSFER_UDMA_5;
+        if (iden[IDEN_UDMA_MODE] & MV_BIT13)
+        {
+            udmaModeEnabled = MV_TRUE;
+        }
+    }
+    else if ((version >= 5) && (iden[IDEN_UDMA_MODE] & MV_BIT4))
+    {
+        pIdentifyInfo->UdmaMode = MV_ATA_TRANSFER_UDMA_4;
+        if (iden[IDEN_UDMA_MODE] & MV_BIT12)
+        {
+            udmaModeEnabled = MV_TRUE;
+        }
+    }
+    else if ((version >= 4) && (iden[IDEN_UDMA_MODE] & MV_BIT3))
+    {
+        pIdentifyInfo->UdmaMode = MV_ATA_TRANSFER_UDMA_3;
+        if (iden[IDEN_UDMA_MODE] & MV_BIT11)
+        {
+            udmaModeEnabled = MV_TRUE;
+        }
+    }
+    else if (iden[IDEN_UDMA_MODE] & MV_BIT2)
+    {
+        pIdentifyInfo->UdmaMode = MV_ATA_TRANSFER_UDMA_2;
+        if (iden[IDEN_UDMA_MODE] & MV_BIT10)
+        {
+            udmaModeEnabled = MV_TRUE;
+        }
+    }
+    else
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "IDENTIFY info: Ultra"
+                 " DMA mode < 2 not supported IDENTIFY[88] 0x%04x\n",
+                 iden[IDEN_UDMA_MODE]);
+        pIdentifyInfo->UdmaMode = MV_ATA_TRANSFER_UDMA_0;
+        return MV_FALSE;
+    }
+    if (udmaModeEnabled == MV_TRUE)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %s%d%s\n",
+                 "Ultra DMA mode","UDMA mode ",
+                 pIdentifyInfo->UdmaMode - MV_ATA_TRANSFER_UDMA_0,
+                 " supported and enabled");
+    }
+    else
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %s%d%s\n",
+                 "Ultra DMA mode","UDMA mode ",
+                 pIdentifyInfo->UdmaMode - MV_ATA_TRANSFER_UDMA_0,
+                 " supported but disabled");
+    }
+
+
+    if ((iden[IDEN_SUPPORTED_COMMANDS1] & MV_BIT13))
+    {
+        if (iden[IDEN_ENABLED_COMMANDS1] & MV_BIT13)
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %20s\n",
+                     "READ BUFFER", "supported and enabled");
+        }
+        else
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %20s\n",
+                     "READ BUFFER", "supported and disabled");
+        }
+    }
+    else
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %s\n", "READ BUFFER",
+                 " Not supported");
+    }
+
+    if ((iden[IDEN_SUPPORTED_COMMANDS1] & MV_BIT12))
+    {
+        if (iden[IDEN_ENABLED_COMMANDS1] & MV_BIT12)
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %20s\n",
+                     "WRITE BUFFER", "supported and enabled");
+        }
+        else
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %20s\n",
+                     "WRITE BUFFER", "supported and disabled");
+        }
+    }
+    else
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %s\n", "WRITE BUFFER",
+                 "Not supported");
+    }
+
+    if ((iden[IDEN_SUPPORTED_COMMANDS1] & MV_BIT6))
+    {
+        pIdentifyInfo->readAheadSupported = MV_TRUE;
+        if (iden[IDEN_ENABLED_COMMANDS1] & MV_BIT6)
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %20s\n",
+                     "READ LOOK-AHEAD", "supported and enabled");
+            pIdentifyInfo->readAheadEnabled = MV_TRUE;
+        }
+        else
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %20s\n",
+                     "READ LOOK-AHEAD", "supported and disabled");
+            pIdentifyInfo->readAheadEnabled = MV_FALSE;
+        }
+    }
+    else
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %s\n",
+                 "READ LOOK-AHEAD","Not supported");
+        pIdentifyInfo->readAheadSupported = MV_FALSE;
+        pIdentifyInfo->readAheadEnabled = MV_FALSE;
+    }
+
+    if ((iden[IDEN_SUPPORTED_COMMANDS1] & MV_BIT5))
+    {
+        pIdentifyInfo->writeCacheSupported = MV_TRUE;
+        if (iden[IDEN_ENABLED_COMMANDS1] & MV_BIT5)
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %20s\n",
+                     "WRITE CACHE", "supported and enabled");
+            pIdentifyInfo->writeCacheEnabled = MV_TRUE;
+        }
+        else
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %20s\n",
+                     "WRITE CACHE", "supported and disabled");
+            pIdentifyInfo->writeCacheEnabled = MV_FALSE;
+        }
+    }
+    else
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %s\n", "WRITE CACHE",
+                 "Not supported");
+        pIdentifyInfo->writeCacheSupported = MV_FALSE;
+        pIdentifyInfo->writeCacheEnabled = MV_FALSE;
+    }
+
+    if ((iden[IDEN_SUPPORTED_COMMANDS1] & MV_BIT3))
+    {
+
+        if (iden[IDEN_ENABLED_COMMANDS1] & MV_BIT3)
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %20s\n",
+                     "POWER MANAGMENT", "supported and enabled");
+        }
+        else
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %20s\n",
+                     "POWER MANAGMENT", "supported and disabled");
+        }
+
+    }
+    else
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %s\n",
+                 "POWER MANAGMENT","Not supported");
+    }
+
+    if ((iden[IDEN_SUPPORTED_COMMANDS1] & MV_BIT0))
+    {
+
+        if (iden[IDEN_ENABLED_COMMANDS1] & MV_BIT0)
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %20s\n", "SMART",
+                     "supported and enabled");
+        }
+        else
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %20s\n", "SMART",
+                     "supported and disabled");
+        }
+    }
+    else
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %s\n", "SMART",
+                 "Not supported");
+    }
+
+
+    /* check if REAd/WRITE DMA QUEUE commands supported */
+    pIdentifyInfo->DMAQueuedModeDepth = (iden[IDEN_QUEUE_DEPTH] & 0x1f) + 1;
+    if ((version >= 5) &&(iden[IDEN_SUPPORTED_COMMANDS2] & MV_BIT1))
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %15s Queue Depth %d\n",
+                 "READ/WRITE DMA QUEUE","supported",
+                 (iden[IDEN_QUEUE_DEPTH] & 0x1f) + 1);
+        pIdentifyInfo->DMAQueuedModeSupported = MV_TRUE;
+    }
+    else
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %s\n",
+                 "READ/WRITE DMA QUEUE", "not supported");
+        pIdentifyInfo->DMAQueuedModeSupported = MV_FALSE;
+    }
+
+    /*check that the non-UDMA ATA commands supported*/
+
+    /*FLUSH CHACHE*/
+    if ((version >=6) && ((iden[IDEN_SUPPORTED_COMMANDS2] & MV_BIT12) == 0))
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %s\n",
+                 "FLUSH CACHE command", "not supported");
+    }
+    else
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %s\n",
+                 "FLUSH CACHE command", "supported");
+    }
+
+    pIdentifyInfo->SATACapabilities.SATA_GEN_I_supported = MV_FALSE;
+    pIdentifyInfo->SATACapabilities.SATA_GEN_II_supported = MV_FALSE;
+    pIdentifyInfo->SATACapabilities.NCQSupported = MV_FALSE;
+    pIdentifyInfo->SATACapabilities.RxHostInitiatedPMSupported = MV_FALSE;
+    pIdentifyInfo->SATACapabilities.TxDeviceInitiatedPMSupported = MV_FALSE;
+    pIdentifyInfo->SATACapabilities.TxDeviceInitiatedPMEnabled = MV_FALSE;
+    pIdentifyInfo->SATACapabilities.DMASetupAutoActiveSupported = MV_FALSE;
+    pIdentifyInfo->SATACapabilities.DMASetupAutoActiveEnables = MV_FALSE;
+    pIdentifyInfo->SATACapabilities.NonZeroBufferOffsetSupported = MV_FALSE;
+    pIdentifyInfo->SATACapabilities.NonZeroBufferOffsetEnabled = MV_FALSE;
+
+    if (version >= 6)
+    {
+        if (iden[IDEN_SATA_CAPABILITIES] & MV_BIT1)
+        {
+            pIdentifyInfo->SATACapabilities.SATA_GEN_I_supported = MV_TRUE;
+        }
+        else
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %s\n", "SATA Gen I",
+                     "not supported");
+        }
+        if (iden[IDEN_SATA_CAPABILITIES] & MV_BIT2)
+        {
+            pIdentifyInfo->SATACapabilities.SATA_GEN_II_supported = MV_TRUE;
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %s\n", "SATA Gen II",
+                     "supported");
+        }
+
+        if (iden[IDEN_SATA_CAPABILITIES] & MV_BIT8)
+        {
+            pIdentifyInfo->SATACapabilities.NCQSupported = MV_TRUE;
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %s\n", "NCQ",
+                     "supported");
+        }
+
+        if (iden[IDEN_SATA_CAPABILITIES] & MV_BIT9)
+        {
+            pIdentifyInfo->SATACapabilities.RxHostInitiatedPMSupported = MV_TRUE;
+        }
+
+        if (iden[IDEN_SATA_FEATURES_SUPPORTED] & MV_BIT1)
+        {
+            pIdentifyInfo->SATACapabilities.NonZeroBufferOffsetSupported = MV_TRUE;
+            if (iden[IDEN_SATA_FEATURES_ENABLED] & MV_BIT1)
+            {
+                pIdentifyInfo->SATACapabilities.NonZeroBufferOffsetEnabled = MV_TRUE;
+            }
+        }
+        if (iden[IDEN_SATA_FEATURES_SUPPORTED] & MV_BIT2)
+        {
+            pIdentifyInfo->SATACapabilities.DMASetupAutoActiveSupported = MV_TRUE;
+            if (iden[IDEN_SATA_FEATURES_ENABLED] & MV_BIT2)
+            {
+                pIdentifyInfo->SATACapabilities.DMASetupAutoActiveEnables = MV_TRUE;
+            }
+        }
+        if (iden[IDEN_SATA_FEATURES_SUPPORTED] & MV_BIT3)
+        {
+            pIdentifyInfo->SATACapabilities.TxDeviceInitiatedPMSupported = MV_TRUE;
+            if (iden[IDEN_SATA_FEATURES_ENABLED] & MV_BIT3)
+            {
+                pIdentifyInfo->SATACapabilities.TxDeviceInitiatedPMEnabled = MV_TRUE;
+            }
+        }
+    }
+
+    return MV_TRUE;
+}
+MV_BOOLEAN mvParseIdentifyPacketResult(MV_U16_PTR  iden,
+                                 ATA_IDENTIFY_INFO   *pIdentifyInfo)
+{
+    char    temp[80];
+    MV_U8  version = 6;
+    MV_BOOLEAN  udmaModeEnabled = MV_FALSE;
+
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "Parse IDENTIFY data:\n");
+    if ((iden[0] & 0x3) == 0)
+    {
+        pIdentifyInfo->commandPacketLength = 12;
+    }
+    else if ((iden[0] & 0x3) == 1)
+    {
+        pIdentifyInfo->commandPacketLength = 16;
+    }
+    else
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "IDENTIFY info: bad command packet length\n");
+        
+        return MV_FALSE;
+    }
+
+    mvAta2HostString( iden + IDEN_MODEL_OFFSET, (MV_U16_PTR)temp, 24);
+    temp[25] = '\0';
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %s\n","Model", temp);
+    memcpy(&pIdentifyInfo->model[0], iden + IDEN_MODEL_OFFSET, 24);
+    memcpy(&pIdentifyInfo->firmware[0], iden + IDEN_FIRMWARE_OFFSET, 4);
+    pIdentifyInfo->version = version;
+    /*DMA support*/
+    if ((version >= 6) && (!(iden[IDEN_CAPACITY_1_OFFSET] & MV_BIT8)))
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "IDENTIFY info: DMA not "
+                 "supported\n");
+        return MV_FALSE;
+    }
+    else
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %s\n", "Capabilities",
+                 "DMA supported");
+    }
+
+
+    if ((version >= 7) && (iden[IDEN_UDMA_MODE] & MV_BIT6))
+    {
+        pIdentifyInfo->UdmaMode = MV_ATA_TRANSFER_UDMA_6;
+        if (iden[IDEN_UDMA_MODE] & MV_BIT14)
+        {
+            udmaModeEnabled = MV_TRUE;
+        }
+    }
+    else if ((version >= 6) && (iden[IDEN_UDMA_MODE] & MV_BIT5))
+    {
+        pIdentifyInfo->UdmaMode = MV_ATA_TRANSFER_UDMA_5;
+        if (iden[IDEN_UDMA_MODE] & MV_BIT13)
+        {
+            udmaModeEnabled = MV_TRUE;
+        }
+    }
+    else if ((version >= 5) && (iden[IDEN_UDMA_MODE] & MV_BIT4))
+    {
+        pIdentifyInfo->UdmaMode = MV_ATA_TRANSFER_UDMA_4;
+        if (iden[IDEN_UDMA_MODE] & MV_BIT12)
+        {
+            udmaModeEnabled = MV_TRUE;
+        }
+    }
+    else if ((version >= 4) && (iden[IDEN_UDMA_MODE] & MV_BIT3))
+    {
+        pIdentifyInfo->UdmaMode = MV_ATA_TRANSFER_UDMA_3;
+        if (iden[IDEN_UDMA_MODE] & MV_BIT11)
+        {
+            udmaModeEnabled = MV_TRUE;
+        }
+    }
+    else if (iden[IDEN_UDMA_MODE] & MV_BIT2)
+    {
+        pIdentifyInfo->UdmaMode = MV_ATA_TRANSFER_UDMA_2;
+        if (iden[IDEN_UDMA_MODE] & MV_BIT10)
+        {
+            udmaModeEnabled = MV_TRUE;
+        }
+    }
+    else
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "IDENTIFY info: Ultra"
+                 " DMA mode < 2 not supported IDENTIFY[88] 0x%04x\n",
+                 iden[IDEN_UDMA_MODE]);
+        pIdentifyInfo->UdmaMode = MV_ATA_TRANSFER_UDMA_0;
+        return MV_FALSE;
+    }
+    if (udmaModeEnabled == MV_TRUE)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %s%d%s\n",
+                 "Ultra DMA mode","UDMA mode ",
+                 pIdentifyInfo->UdmaMode - MV_ATA_TRANSFER_UDMA_0,
+                 " supported and enabled");
+    }
+    else
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %s%d%s\n",
+                 "Ultra DMA mode","UDMA mode ",
+                 pIdentifyInfo->UdmaMode - MV_ATA_TRANSFER_UDMA_0,
+                 " supported but disabled");
+    }
+
+
+    if ((iden[IDEN_SUPPORTED_COMMANDS1] & MV_BIT3))
+    {
+
+        if (iden[IDEN_ENABLED_COMMANDS1] & MV_BIT3)
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %20s\n",
+                     "POWER MANAGMENT", "supported and enabled");
+        }
+        else
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %20s\n",
+                     "POWER MANAGMENT", "supported and disabled");
+        }
+
+    }
+    else
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %s\n",
+                 "POWER MANAGMENT","Not supported");
+    }
+
+    if ((iden[IDEN_SUPPORTED_COMMANDS1] & MV_BIT0))
+    {
+
+        if (iden[IDEN_ENABLED_COMMANDS1] & MV_BIT0)
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %20s\n", "SMART",
+                     "supported and enabled");
+        }
+        else
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %20s\n", "SMART",
+                     "supported and disabled");
+        }
+    }
+    else
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %s\n", "SMART",
+                 "Not supported");
+    }
+
+
+
+    /*check that the non-UDMA ATA commands supported*/
+
+    /*FLUSH CHACHE*/
+    if ((version >=6) && ((iden[IDEN_SUPPORTED_COMMANDS2] & MV_BIT12) == 0))
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %s\n",
+                 "FLUSH CACHE command", "not supported");
+    }
+    else
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %s\n",
+                 "FLUSH CACHE command", "supported");
+    }
+
+    pIdentifyInfo->SATACapabilities.SATA_GEN_I_supported = MV_FALSE;
+    pIdentifyInfo->SATACapabilities.SATA_GEN_II_supported = MV_FALSE;
+    pIdentifyInfo->SATACapabilities.NCQSupported = MV_FALSE;
+    pIdentifyInfo->SATACapabilities.RxHostInitiatedPMSupported = MV_FALSE;
+    pIdentifyInfo->SATACapabilities.TxDeviceInitiatedPMSupported = MV_FALSE;
+    pIdentifyInfo->SATACapabilities.TxDeviceInitiatedPMEnabled = MV_FALSE;
+    pIdentifyInfo->SATACapabilities.DMASetupAutoActiveSupported = MV_FALSE;
+    pIdentifyInfo->SATACapabilities.DMASetupAutoActiveEnables = MV_FALSE;
+    pIdentifyInfo->SATACapabilities.NonZeroBufferOffsetSupported = MV_FALSE;
+    pIdentifyInfo->SATACapabilities.NonZeroBufferOffsetEnabled = MV_FALSE;
+
+    if (version >= 6)
+    {
+        if (iden[IDEN_SATA_CAPABILITIES] & MV_BIT1)
+        {
+            pIdentifyInfo->SATACapabilities.SATA_GEN_I_supported = MV_TRUE;
+        }
+        else
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %s\n", "SATA Gen I",
+                     "not supported");
+        }
+        if (iden[IDEN_SATA_CAPABILITIES] & MV_BIT2)
+        {
+            pIdentifyInfo->SATACapabilities.SATA_GEN_II_supported = MV_TRUE;
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %s\n", "SATA Gen II",
+                     "supported");
+        }
+
+        if (iden[IDEN_SATA_CAPABILITIES] & MV_BIT8)
+        {
+            pIdentifyInfo->SATACapabilities.NCQSupported = MV_TRUE;
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %s\n", "NCQ",
+                     "supported");
+        }
+
+        if (iden[IDEN_SATA_CAPABILITIES] & MV_BIT9)
+        {
+            pIdentifyInfo->SATACapabilities.RxHostInitiatedPMSupported = MV_TRUE;
+        }
+
+        if (iden[IDEN_SATA_FEATURES_SUPPORTED] & MV_BIT1)
+        {
+            pIdentifyInfo->SATACapabilities.NonZeroBufferOffsetSupported = MV_TRUE;
+            if (iden[IDEN_SATA_FEATURES_ENABLED] & MV_BIT1)
+            {
+                pIdentifyInfo->SATACapabilities.NonZeroBufferOffsetEnabled = MV_TRUE;
+            }
+        }
+        if (iden[IDEN_SATA_FEATURES_SUPPORTED] & MV_BIT2)
+        {
+            pIdentifyInfo->SATACapabilities.DMASetupAutoActiveSupported = MV_TRUE;
+            if (iden[IDEN_SATA_FEATURES_ENABLED] & MV_BIT2)
+            {
+                pIdentifyInfo->SATACapabilities.DMASetupAutoActiveEnables = MV_TRUE;
+            }
+        }
+        if (iden[IDEN_SATA_FEATURES_SUPPORTED] & MV_BIT3)
+        {
+            pIdentifyInfo->SATACapabilities.TxDeviceInitiatedPMSupported = MV_TRUE;
+            if (iden[IDEN_SATA_FEATURES_ENABLED] & MV_BIT3)
+            {
+                pIdentifyInfo->SATACapabilities.TxDeviceInitiatedPMEnabled = MV_TRUE;
+            }
+        }
+    }
+
+    return MV_TRUE;
+}
+
+/*******************************************************************************
+* mvGetSataDeviceType - short description
+*
+* DESCRIPTION:
+*       None.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_SATA_DEVICE_TYPE mvGetSataDeviceType(
+                                       MV_STORAGE_DEVICE_REGISTERS *mvStorageDevRegisters)
+{
+    if (((mvStorageDevRegisters->sectorCountRegister & 0xff) != 1) ||
+        ((mvStorageDevRegisters->lbaLowRegister & 0xff) != 1))
+    {
+        return MV_SATA_DEVICE_TYPE_UNKNOWN;
+    }
+    if (((mvStorageDevRegisters->lbaMidRegister & 0xff) == 0) &&
+         ((mvStorageDevRegisters->lbaHighRegister & 0xff) == 0)) 
+    {
+        return MV_SATA_DEVICE_TYPE_ATA_DISK;
+    }
+    if ((((mvStorageDevRegisters->lbaMidRegister & 0xff) == 0x14) &&
+         ((mvStorageDevRegisters->lbaHighRegister & 0xff) == 0xEB))/* ||
+         (((mvStorageDevRegisters->lbaMidRegister & 0xff) == 0x69) &&
+         ((mvStorageDevRegisters->lbaHighRegister & 0xff) == 0x96))*/)
+    {
+        return MV_SATA_DEVICE_TYPE_ATAPI_DEVICE;
+    }
+    if (((mvStorageDevRegisters->lbaMidRegister & 0xff) == 0x69) &&
+        ((mvStorageDevRegisters->lbaHighRegister & 0xff) == 0x96))
+    {
+        return MV_SATA_DEVICE_TYPE_PM;
+    }
+   return MV_SATA_DEVICE_TYPE_UNKNOWN;
+}
+
+#ifdef MV_LOG_DEBUG
+static void printIdentifyBuffer(MV_U16_PTR identifyBuffer)
+{
+    MV_U8 i,j;
+    /*Print Identify buffer*/
+    for (i = 0; i < 0x20; i++)
+    {
+        mvLogMsg(MV_RAW_MSG_ID,  0, "Words [%03d-%03d]: ", i*8, i*8+7);
+        for (j = 0; j < 0x8; j++)
+        {
+            mvLogMsg(MV_RAW_MSG_ID,  0, "0x%04X ", identifyBuffer[i*8+j]);
+        }
+        mvLogMsg(MV_RAW_MSG_ID,  0, "\n");
+    }
+}
+#endif
+
+/*******************************************************************************
+* mvConfigSataDisk - short description
+*
+* DESCRIPTION:
+*       None.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+
+MV_BOOLEAN mvConfigSataDisk(MV_SATA_ADAPTER *pSataAdapter, MV_U8 channelIndex,
+                            MV_U8 PMPort, ATA_IDENTIFY_INFO   *pIdentifyInfo,
+                            MV_U16_PTR identifyBuffer)
+{
+    MV_STORAGE_DEVICE_REGISTERS inATARegs;
+    MV_STORAGE_DEVICE_REGISTERS outATARegs;
+
+    /* identify device*/
+    memset(&inATARegs, 0, sizeof(inATARegs));
+    inATARegs.commandRegister = MV_ATA_COMMAND_IDENTIFY;
+    if (mvStorageDevATAIdentifyDevice(pSataAdapter, channelIndex, PMPort,
+                                      identifyBuffer)
+        == MV_FALSE)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR,"[%d %d %d]: failed "
+                 "to perform ATA Identify command\n", pSataAdapter->adapterId,
+                 channelIndex, PMPort);
+        return MV_FALSE;
+    }
+#ifdef MV_LOG_DEBUG
+    mvLogMsg(MV_RAW_MSG_ID, 0, "Drive [%d,%d,%d] Identify Buffer:\n",
+             pSataAdapter->adapterId, channelIndex, PMPort);
+
+    printIdentifyBuffer(identifyBuffer);
+#endif
+    if (mvParseIdentifyResult(identifyBuffer, pIdentifyInfo) == MV_FALSE)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR,"[%d %d %d]: in "
+                 "parsing ATA Identify Data\n", pSataAdapter->adapterId,
+                 channelIndex, PMPort);
+        return MV_FALSE;
+    }
+    if ((pIdentifyInfo->writeCacheSupported == MV_TRUE) &&
+        (pIdentifyInfo->writeCacheEnabled == MV_FALSE))
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG,"[%d %d %d]: Write Cache "
+                 "supported but disabled\n", pSataAdapter->adapterId,
+                 channelIndex, PMPort);
+        memset(&inATARegs, 0, sizeof(inATARegs));
+        inATARegs.commandRegister = MV_ATA_COMMAND_SET_FEATURES;
+        inATARegs.featuresRegister = MV_ATA_SET_FEATURES_ENABLE_WCACHE;
+
+        if (mvStorageDevExecutePIO(pSataAdapter, channelIndex, PMPort,
+                                   MV_NON_UDMA_PROTOCOL_NON_DATA,
+                                   MV_FALSE, NULL,0, &inATARegs, &outATARegs)
+            == MV_FALSE)
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR,"[%d %d %d]: "
+                     "Set Features failed(ENABLE WCACHE)\n",
+                     pSataAdapter->adapterId, channelIndex, PMPort);
+            return MV_FALSE;
+        }
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "[%d %d %d]: Write Cache "
+                 "enabled\n", pSataAdapter->adapterId, channelIndex, PMPort);
+    }
+    if ((pIdentifyInfo->readAheadSupported == MV_TRUE) &&
+        (pIdentifyInfo->readAheadEnabled == MV_FALSE))
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "[%d %d %d]: Read Look "
+                 "Ahead supported but disabled\n", pSataAdapter->adapterId,
+                 channelIndex, PMPort);
+        memset(&inATARegs, 0, sizeof(inATARegs));
+        inATARegs.commandRegister = MV_ATA_COMMAND_SET_FEATURES;
+        inATARegs.featuresRegister = MV_ATA_SET_FEATURES_ENABLE_RLA;
+        if (mvStorageDevExecutePIO(pSataAdapter, channelIndex, PMPort,
+                                   MV_NON_UDMA_PROTOCOL_NON_DATA,
+                                   MV_FALSE, NULL,0, &inATARegs, &outATARegs)
+            == MV_FALSE)
+        {
+            mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR,"[%d %d %d]: "
+                     "Set Features failed(ENABLE RLA)\n",
+                     pSataAdapter->adapterId, channelIndex, PMPort);
+            return MV_FALSE;
+        }
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "[%d %d %d]: Read Look "
+                 "Ahead enabled\n", pSataAdapter->adapterId, channelIndex,
+                 PMPort);
+    }
+    /* mvStorageDevATASetFeatures */
+
+    /* Set transfer mode */
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "[%d %d %d]: Set transfer mode "
+             "XFER_PIO_SLOW\n", pSataAdapter->adapterId, channelIndex, PMPort);
+    memset(&inATARegs, 0, sizeof(inATARegs));
+    inATARegs.commandRegister = MV_ATA_COMMAND_SET_FEATURES;
+    inATARegs.featuresRegister = MV_ATA_SET_FEATURES_TRANSFER;
+    inATARegs.sectorCountRegister = MV_ATA_TRANSFER_PIO_SLOW;
+    if (mvStorageDevExecutePIO(pSataAdapter, channelIndex, PMPort,
+                               MV_NON_UDMA_PROTOCOL_NON_DATA,
+                               MV_FALSE, NULL,0, &inATARegs, &outATARegs) ==
+        MV_FALSE)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "[%d %d %d]: "
+                 "Set Features failed to set XFER PIO SLOW\n",
+                 pSataAdapter->adapterId, channelIndex, PMPort);
+
+        return MV_FALSE;
+    }
+
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "[%d %d %d]: Set transfer mode "
+             "XFER_PIO_%d\n", pSataAdapter->adapterId, channelIndex, PMPort,
+             pIdentifyInfo->PIOMode - MV_ATA_TRANSFER_PIO_0);
+
+    memset(&inATARegs, 0, sizeof(inATARegs));
+    inATARegs.commandRegister = MV_ATA_COMMAND_SET_FEATURES;
+    inATARegs.featuresRegister = MV_ATA_SET_FEATURES_TRANSFER;
+    inATARegs.sectorCountRegister = pIdentifyInfo->PIOMode;
+    if (mvStorageDevExecutePIO(pSataAdapter, channelIndex, PMPort,
+                               MV_NON_UDMA_PROTOCOL_NON_DATA,
+                               MV_FALSE, NULL,0, &inATARegs, &outATARegs) ==
+        MV_FALSE)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "[%d %d %d]: "
+                 "Set Features failed to set XFER PIO %d\n",
+                 pSataAdapter->adapterId, channelIndex, PMPort,
+                 pIdentifyInfo->PIOMode - MV_ATA_TRANSFER_PIO_0);
+        return MV_FALSE;
+    }
+
+
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "[%d %d %d]: Set transfer mode"
+             " XFER_UDMA_%d\n", pSataAdapter->adapterId, channelIndex, PMPort,
+             pIdentifyInfo->UdmaMode & 0xf);
+    memset(&inATARegs, 0, sizeof(inATARegs));
+    inATARegs.commandRegister = MV_ATA_COMMAND_SET_FEATURES;
+    inATARegs.featuresRegister = MV_ATA_SET_FEATURES_TRANSFER;
+    inATARegs.sectorCountRegister = pIdentifyInfo->UdmaMode;
+    if (mvStorageDevExecutePIO(pSataAdapter, channelIndex, PMPort,
+                               MV_NON_UDMA_PROTOCOL_NON_DATA,
+                               MV_FALSE, NULL,0, &inATARegs, &outATARegs) ==
+        MV_FALSE)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "[%d %d %d]: "
+                 "Set Features failed to set XFER UDMA %d\n",
+                 pSataAdapter->adapterId, channelIndex, PMPort,
+                 pIdentifyInfo->UdmaMode & 0xf);
+        return MV_FALSE;
+    }
+    return MV_TRUE;
+}
+
+/*******************************************************************************
+* mvInitSataDisk - short description
+*
+* DESCRIPTION:
+*       None.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_BOOLEAN mvInitSataDisk(MV_SATA_ADAPTER   *pSataAdapter, MV_U8 channelIndex,
+                          MV_U8 PMPort, ATA_IDENTIFY_INFO   *pIdentifyInfo,
+                          MV_U16_PTR identifyBuffer
+                         )
+{
+    pIdentifyInfo->deviceType = MV_SATA_DEVICE_TYPE_ATA_DISK;
+    if (mvConfigSataDisk(pSataAdapter, channelIndex, PMPort, pIdentifyInfo,
+                         identifyBuffer) == MV_FALSE)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "[%d %d %d]: Failed to"
+                 " Config Device\n", pSataAdapter->adapterId, channelIndex,
+                 PMPort);
+        return MV_FALSE;
+    }
+    return MV_TRUE;
+}
+#ifdef MV_SUPPORT_ATAPI
+MV_BOOLEAN mvInitSataATAPI(MV_SATA_ADAPTER   *pSataAdapter, MV_U8 channelIndex,
+                          MV_U8 PMPort, ATA_IDENTIFY_INFO   *pIdentifyInfo,
+                          MV_U16_PTR identifyBuffer
+                         )
+{
+    MV_STORAGE_DEVICE_REGISTERS inATARegs;
+    MV_STORAGE_DEVICE_REGISTERS outATARegs;
+
+    pIdentifyInfo->deviceType = MV_SATA_DEVICE_TYPE_ATAPI_DEVICE;
+    /* identify device*/
+    memset(&inATARegs, 0, sizeof(inATARegs));
+    inATARegs.commandRegister = MV_ATA_COMMAND_ATAPI_IDENTIFY;
+    inATARegs.featuresRegister = 0x1;
+    if (mvStorageDevExecutePIO(pSataAdapter, channelIndex, PMPort,
+                                   MV_NON_UDMA_PROTOCOL_PIO_DATA_IN,
+                                   MV_FALSE, identifyBuffer, 256, &inATARegs, &outATARegs)
+            == MV_FALSE)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR,"[%d %d %d]: "
+                "failed to perform ATAPI Identify command\n",
+                pSataAdapter->adapterId, channelIndex, PMPort);
+        return MV_FALSE;
+    }
+
+#ifdef MV_LOG_DEBUG
+    mvLogMsg(MV_RAW_MSG_ID, 0, "Drive [%d,%d,%d] Identify Buffer:\n",
+             pSataAdapter->adapterId, channelIndex, PMPort);
+
+    printIdentifyBuffer(identifyBuffer);
+#endif
+    if (mvParseIdentifyPacketResult(identifyBuffer, pIdentifyInfo) == MV_FALSE)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR,"[%d %d %d]: in "
+                 "parsing ATA Identify Data\n", pSataAdapter->adapterId,
+                 channelIndex, PMPort);
+        return MV_FALSE;
+    }
+    /* Set transfer mode */
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "[%d %d %d]: Set transfer mode "
+             "XFER_PIO_SLOW\n", pSataAdapter->adapterId, channelIndex, PMPort);
+    mvMicroSecondsDelay(NULL, 1000);
+    memset(&inATARegs, 0, sizeof(inATARegs));
+    inATARegs.commandRegister = MV_ATA_COMMAND_SET_FEATURES;
+    inATARegs.featuresRegister = MV_ATA_SET_FEATURES_TRANSFER;
+    inATARegs.sectorCountRegister = MV_ATA_TRANSFER_UDMA_2;
+    if (mvStorageDevExecutePIO(pSataAdapter, channelIndex, PMPort,
+                               MV_NON_UDMA_PROTOCOL_NON_DATA,
+                               MV_FALSE, NULL,0, &inATARegs, &outATARegs) ==
+        MV_FALSE)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "[%d %d %d]: "
+                 "Set Features failed to set XFER mode\n",
+                 pSataAdapter->adapterId, channelIndex, PMPort);
+
+        return MV_FALSE;
+    }
+    return MV_TRUE;
+}
+#endif
+MV_BOOLEAN  mvGetPMDeviceInfo(MV_SATA_ADAPTER   *pSataAdapter,
+                              MV_U8 channelIndex,
+                              MV_SATA_PM_DEVICE_INFO *pPMDeviceInfo)
+{
+    MV_U32  regVal;
+
+    if (mvPMDevReadReg(pSataAdapter, channelIndex, MV_SATA_PM_CONTROL_PORT,
+                       MV_SATA_GSCR_ID_REG_NUM, &regVal, NULL) == MV_FALSE)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "[%d %d]: "
+                 "mvGetPMDeviceInfo Failed", pSataAdapter->adapterId,
+                 channelIndex);
+        return MV_FALSE;
+    }
+    pPMDeviceInfo->vendorId = (MV_U16)(regVal & 0xffff);
+    pPMDeviceInfo->deviceId = (MV_U16)((regVal & 0xffff0000) >> 16);
+
+    if (mvPMDevReadReg(pSataAdapter, channelIndex, MV_SATA_PM_CONTROL_PORT,
+                       MV_SATA_GSCR_REVISION_REG_NUM, &regVal, NULL)== MV_FALSE)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "[%d %d]: "
+                 "mvGetPMDeviceInfo Failed", pSataAdapter->adapterId,
+                 channelIndex);
+        return MV_FALSE;
+    }
+
+    pPMDeviceInfo->PMSpecRevision = (MV_U8)(regVal & 0xff);
+    pPMDeviceInfo->productRevision = (MV_U8)((regVal & 0xff00) >> 8);
+
+    if (mvPMDevReadReg(pSataAdapter, channelIndex, MV_SATA_PM_CONTROL_PORT,
+                       MV_SATA_GSCR_INFO_REG_NUM, &regVal, NULL)== MV_FALSE)
+    {
+        mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG_ERROR, "[%d %d]: "
+                 "mvGetPMDeviceInfo Failed", pSataAdapter->adapterId,
+                 channelIndex);
+        return MV_FALSE;
+    }
+    pPMDeviceInfo->numberOfPorts = (MV_U8)(regVal & 0xf);
+
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "[%d %d]: PM Information:\n",
+             pSataAdapter->adapterId,channelIndex);
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %04x\n", "Vendor Id", pPMDeviceInfo->vendorId);
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %04x\n", "Device Id", pPMDeviceInfo->deviceId);
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %02x\n", "Product Revision", pPMDeviceInfo->productRevision);
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %02x\n", "Spec Revision", pPMDeviceInfo->PMSpecRevision);
+    mvLogMsg(MV_IAL_COMMON_LOG_ID, MV_DEBUG, "%25s - %02x\n", "Fan-out ports", pPMDeviceInfo->numberOfPorts);
+    return MV_TRUE;
+}
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_xor/Kconfig
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_xor/Kconfig
@@ -0,0 +1,91 @@
+config MV_USE_XOR_ENGINE
+        bool "Use the XOR engines to offload CPU tasks"   
+        depends on (MV_INCLUDE_XOR) && EXPERIMENTAL
+        default n
+        help
+            Say Y of you want to use the XOR engine to offload some of the 
+            CPU tasks.
+
+config MV_RAID5_XOR_OFFLOAD
+        bool "Use the XOR engine to perfom the xor calculation"
+        depends on MV_USE_XOR_ENGINE
+        default n
+        help
+          Say Y here if you want to use the XOR engine to perform
+          the RAID4/5 xor calculation.
+
+config MV_XORMEMCOPY
+        bool "Use the XOR engine to accelerate memcpy and memmove"
+        depends on MV_USE_XOR_ENGINE
+        default n
+        help
+          Say Y here if you want to use the XOR engine to perform
+          the memcpy and memmove.
+
+config MV_XOR_MEMCOPY_THRESHOLD
+        int "Minimum number of bytes to use XOR acceleration for memcpy()"
+        depends on MV_XORMEMCOPY
+        default "128"
+        help
+          This is the minimum buffer size needed in order to operate the XOR engine
+          for accelerating the memcpy() and memmove() operations
+
+config MV_XORMEMZERO
+        bool "Use the XOR engine to accelerate memzero"
+        depends on MV_USE_XOR_ENGINE
+        default n
+        help
+          Say Y here if you want to use the XOR engine to perform
+          the memzero.
+
+config MV_XOR_MEMZERO_THRESHOLD
+        int "Minimum number of bytes to use XOR acceleration for memzero()"
+        depends on MV_XORMEMZERO
+        default "192"
+        help
+          This is the minimum buffer size needed in order to operate the XOR engine
+          for accelerating the memzero operation
+
+config MV_USE_XOR_FOR_COPY_USER_BUFFERS
+        bool "Use the XOR engine to accelerate copy_to_user and copy_from_user functions"
+        depends on MV_USE_XOR_ENGINE
+        default n
+        help
+          Say Y here if you want to accelerate the copy_to_user and copy_from_user functions
+          using the XOR engine instead of the IDMA.
+
+config MV_XOR_COPYUSER_THRESHOLD
+        int "Minimum number of bytes to use XOR acceleration for copy_to_user() and copy_from_user()"
+        depends on MV_USE_XOR_FOR_COPY_USER_BUFFERS
+        default "1260"
+        help
+          This is the minimum buffer size needed in order to operate the XOR engine
+          for accelerating the copy_to_user() and copy_from_user() operations
+# support for interrupts mode disbaled
+config ENABLE_XOR_INTERRUPTS
+        bool "Activate the XOR in offloading mode (Enable XOR interrupts)."
+        depends on MV_USE_XOR_ENGINE && NOT_SUPPRTED_FEATURE
+        default n
+        help
+          Say Y here if you want to use the activate the XOR engine in interrupts
+          mode (offloading).
+# menu "Xor channels"
+choice
+	prompt "Number of XOR channels"
+	default USE_TWO_ENGINES
+	depends on MV_USE_XOR_ENGINE
+	help
+	  Select the number of XOR channels to be uses for kernel functions
+	  accelerations.
+	  
+	config USE_TWO_ENGINES
+	      bool "Two channels"
+
+	config USE_FOUR_ENGINES
+	       depends on ARCH_FEROCEON_KW
+	      bool "Four channels"
+endchoice
+
+
+#endmenu
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_xor/mv_xor.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_xor/mv_xor.c
@@ -0,0 +1,1159 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/version.h>
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/list.h>
+#include <linux/device.h>
+#include <linux/slab.h>
+#include <linux/string.h>
+#include <linux/sysdev.h>
+#include <asm/mach/time.h>
+#include <asm/uaccess.h>
+#include <linux/proc_fs.h>
+#include <linux/platform_device.h>
+
+#include "mvCommon.h"
+#include "xor/mvXor.h"
+#include "xor/mvXorRegs.h"
+#include "ctrlEnv/mvCtrlEnvLib.h"
+
+#undef DEBUG
+
+#ifdef DEBUG
+	#define DPRINTK(s, args...)  printk("MV_XOR: " s, ## args)
+#else
+	#define DPRINTK(s, args...)
+#endif
+
+#ifdef CONFIG_USE_FOUR_ENGINES
+#define XOR_MAX_CHANNELS    4
+#elif  CONFIG_USE_TWO_ENGINES
+#define XOR_MAX_CHANNELS    2
+#else
+#define XOR_MAX_CHANNELS    1
+#endif
+
+
+#define NEXT_CHANNEL(chan)	(((chan) + 1) % XOR_MAX_CHANNELS)
+#define PREV_CHANNEL(chan)	((chan) ? (chan) - 1 : (XOR_MAX_CHANNELS - 1))
+
+#define XOR_TIMEOUT 0x8000000
+struct xor_channel_t
+{
+    MV_XOR_DESC     *pDescriptor;
+    dma_addr_t      descPhyAddr;
+    wait_queue_head_t waitq;
+    struct semaphore  sema;
+#ifdef CONFIG_ENABLE_XOR_INTERRUPTS
+    int             irq_num;
+    const char      *name;
+#endif
+    int chan_num;
+    int	chan_active;
+};
+
+struct xor_channel_t  xor_channel[XOR_MAX_CHANNELS];
+
+struct semaphore  meminit_sema;
+int xor_engine_initialized = 0;
+
+MV_XOR_DESC     *pDescriptors;
+dma_addr_t      descsPhyAddr;
+#define XOR_MIN_COPY_CHUNK 128
+static unsigned long mv_dma_min_buffer = XOR_MIN_COPY_CHUNK;
+
+static struct proc_dir_entry *xor_read_proc_entry;
+static int xor_dma_hit = 0, xor_dma_miss = 0, xor_dma_unaligned = 0, xor_hit = 0;
+static int xor_memzero_hit = 0, xor_memzero_miss = 0, xor_memzero_unaligned = 0;
+static int dma_to_user = 0;
+static int dma_from_user = 0;
+static int copy_tf_failed_on_res = 0;
+#define RT_DEBUG
+#ifdef RT_DEBUG
+static int dma_activations = 0;
+#endif
+#ifdef CONFIG_MV_USE_XOR_FOR_COPY_USER_BUFFERS
+static unsigned long xor_dma_copy(void *to, const void *from, unsigned long n, unsigned int to_user);
+#endif
+static inline u32 page_remainder(u32 virt)
+{
+	return PAGE_SIZE - (virt & ~PAGE_MASK);
+}
+
+/*
+ * map a kernel virtual address or kernel logical address to a phys address
+ */
+static inline u32 physical_address(u32 virt, int write)
+{
+    struct page *page;
+    struct vm_area_struct *vm;
+    struct mm_struct * mm = (virt >= TASK_SIZE)? &init_mm : current->mm;
+    unsigned int vm_flags;
+    unsigned int flags;
+
+       /* kernel static-mapped address */
+    DPRINTK(" get physical address: virt %x , write %d\n", virt, write);
+    if (virt_addr_valid(virt)) 
+    {
+        return __pa((u32) virt);
+    }
+    if (virt >= (u32)high_memory)
+	    return 0;
+    
+    /* 
+    * Require read or write permissions.
+    */
+    vm_flags  = write ? (VM_WRITE | VM_MAYWRITE) : (VM_READ | VM_MAYREAD);
+
+    vm = find_extend_vma(mm, virt);
+    if (!vm || (vm->vm_flags & (VM_IO | VM_PFNMAP))
+		|| !(vm_flags & vm->vm_flags)){
+			return 0;
+		}
+    flags = FOLL_PTE_EXIST | FOLL_TOUCH;
+    flags |= (write)? FOLL_WRITE : 0;
+		 
+    page = follow_page(vm, (u32) virt, flags);
+    
+    if (pfn_valid(page_to_pfn(page)))
+    {
+        return ((page_to_pfn(page) << PAGE_SHIFT) |
+                       ((u32) virt & (PAGE_SIZE - 1)));
+    }
+    else /* page == 0, otherwise should never happen, since its being checked inside follow_page->vm_normal_page */
+    {
+        return 0;
+    }
+}
+
+
+int allocate_channel(void)
+{
+    int chan;
+    for(chan = 0; chan < XOR_MAX_CHANNELS; chan++)
+    {        
+        if(down_trylock(&xor_channel[chan].sema))
+        {
+            DPRINTK("XOR engine %d is busy\n", chan);
+            continue;
+        }
+	if(mvXorStateGet(chan) != MV_IDLE) {
+		printk("ERR: %s XOR chan %d is not idle",__FUNCTION__, chan);
+	}
+        return chan;
+    }
+    DPRINTK("XOR engines are busy, return\n");
+    return -1;
+}
+
+void inline free_channel(struct xor_channel_t *channel)
+{
+	if(mvXorStateGet(channel->chan_num) != MV_IDLE){
+		printk("ERR: %s XOR chan %d is not idle",__FUNCTION__, channel->chan_num);
+		BUG();
+	}
+    up(&channel->sema);
+}
+
+#define XOR_CAUSE_DONE_MASK(chan) ((BIT0|BIT1) << (chan * 16) )
+void xor_waiton_eng(int chan)
+{
+    int timeout = 0;
+    if(!xor_channel[chan].chan_active)
+	return;
+    
+    while(!(MV_REG_READ(XOR_CAUSE_REG(XOR_UNIT(chan))) & XOR_CAUSE_DONE_MASK(XOR_CHAN(chan)))) 
+    {
+	if(timeout > XOR_TIMEOUT)
+	    goto timeout; 
+	timeout++;
+    }
+
+    timeout = 0;
+    while(mvXorStateGet(chan) != MV_IDLE)
+    {
+	if(timeout > XOR_TIMEOUT)
+	    goto timeout; 
+	timeout++;
+    }
+    /* Clear int */
+    MV_REG_WRITE(XOR_CAUSE_REG(XOR_UNIT(chan)), ~(XOR_CAUSE_DONE_MASK(XOR_CHAN(chan))));
+    xor_channel[chan].chan_active = 0;
+
+timeout:
+    if(timeout > XOR_TIMEOUT)
+    {
+	printk("ERR: XOR eng got timedout!!\n");
+	BUG();
+    }
+    return;
+
+}
+
+void
+print_xor_regs(int chan)
+{
+     printk(" XOR_CHANNEL_ARBITER_REG %08x\n", MV_REG_READ(XOR_CHANNEL_ARBITER_REG(XOR_UNIT(chan))));
+     printk(" XOR_CONFIG_REG %08x\n", MV_REG_READ(XOR_CONFIG_REG(XOR_UNIT(chan),
+								 XOR_CHAN(chan))));
+     printk(" XOR_ACTIVATION_REG %08x\n", MV_REG_READ(XOR_ACTIVATION_REG(
+							   XOR_UNIT(chan), XOR_CHAN(chan))));
+     printk(" XOR_CAUSE_REG %08x\n", MV_REG_READ(XOR_CAUSE_REG(XOR_UNIT(chan))));
+     printk(" XOR_MASK_REG %08x\n", MV_REG_READ(XOR_MASK_REG(XOR_UNIT(chan))));
+     printk(" XOR_ERROR_CAUSE_REG %08x\n", MV_REG_READ(XOR_ERROR_CAUSE_REG(XOR_UNIT(chan))));
+     printk(" XOR_ERROR_ADDR_REG %08x\n", MV_REG_READ(XOR_ERROR_ADDR_REG(XOR_UNIT(chan))));
+     printk(" XOR_NEXT_DESC_PTR_REG %08x\n", MV_REG_READ(XOR_NEXT_DESC_PTR_REG(
+							      XOR_UNIT(chan),XOR_CHAN(chan))));
+     printk(" XOR_CURR_DESC_PTR_REG %08x\n", MV_REG_READ(XOR_CURR_DESC_PTR_REG(
+							      XOR_UNIT(chan),XOR_CHAN(chan))));
+     printk(" XOR_BYTE_COUNT_REG %08x\n", MV_REG_READ(XOR_BYTE_COUNT_REG(
+							   XOR_UNIT(chan),XOR_CHAN(chan))));
+}
+#ifdef CONFIG_MV_RAID5_XOR_OFFLOAD
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)
+int xor_mv(unsigned int src_no, unsigned int bytes, void **bh_ptr)
+#else
+int xor_mv(unsigned int src_no, unsigned int bytes, void **bh_ptr, void *dest_buff)
+#endif
+{
+	void *bptr = NULL;
+	int i;
+        u32      *srcAddr;
+        int         chan;
+        struct xor_channel_t *channel;
+
+	if(src_no <= 1)
+	{
+		printk(KERN_ERR "%s: need more than 1 src for XOR\n",
+			__func__);
+		BUG();
+                return bytes;
+	}
+        if (xor_engine_initialized == 0)
+        {
+            DPRINTK(KERN_WARNING " %s: xor engines not initialized yet\n", __func__);
+            return bytes;
+        }
+
+        chan = allocate_channel();
+        if ( chan == -1)
+         {
+                DPRINTK("XOR engines are busy, return\n");
+                return bytes;
+        }
+	DPRINTK("setting up rest of descriptor for channel %d\n", chan);
+        channel = &xor_channel[chan];
+	// flush the cache to memory before XOR engine touches them
+#if defined(MV_CPU_BE)		
+	srcAddr = &(channel->pDescriptor->srcAdd1);
+#else
+        srcAddr = &(channel->pDescriptor->srcAdd0);
+#endif
+	for(i = src_no-1; i >= 0; i--)
+	{
+		DPRINTK("flushing source %d\n", i);
+		bptr = (bh_ptr[i]);
+		/* Buffer 0 is also the destination */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)
+		if(i==0)
+			dmac_flush_range(bptr, bptr + bytes);			
+		else
+#endif
+			dmac_clean_range(bptr, bptr + bytes);
+                srcAddr[i] = virt_to_phys(bh_ptr[i]);
+	}
+#if defined(MV_CPU_BE)
+	if (src_no & 1) 
+		srcAddr[src_no] = virt_to_phys(bh_ptr[src_no-1]);
+#endif
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)
+	channel->pDescriptor->phyDestAdd = virt_to_phys(bh_ptr[0]);
+#else
+	dmac_flush_range(dest_buff, dest_buff + bytes);
+	channel->pDescriptor->phyDestAdd = virt_to_phys(dest_buff);
+#endif
+        channel->pDescriptor->byteCnt = bytes;
+        channel->pDescriptor->phyNextDescPtr = 0;
+        channel->pDescriptor->descCommand = (1 << src_no) - 1;
+        channel->pDescriptor->status = BIT31;
+	channel->chan_active = 1;
+#if defined(MV_BRIDGE_SYNC_REORDER)
+	mvOsBridgeReorderWA();
+#endif
+        if( mvXorTransfer(chan, MV_XOR, channel->descPhyAddr) != MV_OK )
+        {
+            printk(KERN_ERR "%s: XOR operation on channel %d failed!\n", __func__, chan);
+            print_xor_regs(chan);
+            BUG();
+            free_channel(channel);
+            return bytes;
+        }
+#ifdef CONFIG_ENABLE_XOR_INTERRUPTS
+	/* should unmask xor interrupt*/
+        wait_event(channel->waitq, (( channel->pDescriptor->status & BIT31) == 0));/*TODO add timeout*/
+	/* shoulds mask back xor interrutps here*/
+#else
+        xor_waiton_eng(chan);
+#endif
+	DPRINTK("XOR complete\n");
+#if 0
+	if (!(channel->pDescriptor->status & BIT30)) {
+	    printk(KERN_ERR "%s: XOR operation completed with error!\n", __func__);
+            print_xor_regs(chan);            
+	    BUG();
+            free_channel(channel);
+	    return MV_REG_READ(XOR_BYTE_COUNT_REG(chan));
+        }
+#endif
+	DPRINTK("invalidate result in cache\n");
+#if 0
+	// invalidate the cache region to destination
+        bptr = (bh_ptr[0]);
+	dmac_inv_range(bptr, bptr + bytes);
+#endif
+        free_channel(channel);
+        xor_hit++;
+        return 0;
+}
+#endif
+#ifdef CONFIG_MV_XORMEMCOPY
+
+/*=======================================================================*/
+/*  Procedure:  xor_memcpy()                                             */
+/*                                                                       */
+/*  Description:    DMA-based in-kernel memcpy.                          */
+/*                                                                       */
+/*  Parameters:  to: destination address                                 */
+/*               from: source address                                    */
+/*               n: number of bytes to transfer                          */
+/*                                                                       */
+/*  Returns:     void*: to                                               */
+/*                                                                       */
+/*  Notes/Assumptions:                                                   */
+/*              Assumes that kernel physical memory is contiguous, i.e., */
+/*              the physical addresses of contiguous virtual addresses   */
+/*              are also contiguous.                                     */
+/*              Assumes that kernel memory doesn't get paged.            */
+/*              The DMA is polling                                       */
+/*                                                                       */
+/*=======================================================================*/
+void *xor_memcpy(void *to, const void *from, __kernel_size_t n)
+{
+	u32 xor_dma_unaligned_to, xor_dma_unaligned_from;
+	void *orig_to = to;
+	u32 to_pa, from_pa;
+        int ua = 0;
+        int         chan;
+        struct xor_channel_t *channel;
+
+	DPRINTK("xor_memcpy(0x%x, 0x%x, %lu): entering\n", (u32) to, (u32) from,
+		(unsigned long)n);
+
+        if (xor_engine_initialized == 0)
+        {
+            DPRINTK(KERN_WARNING" %s: xor engines not initialized yet\n", __func__);
+       	    xor_dma_miss++;
+	    return asm_memmove(to, from, n);
+        }
+ 	if (!(virt_addr_valid((u32) to) && virt_addr_valid((u32) from))) {
+		DPRINTK("xor_memcpy(0x%x, 0x%x, %lu): falling back to memcpy\n",
+			(u32) to, (u32) from, (unsigned long)n);
+		xor_dma_miss++;
+		return asm_memmove(to, from, n);
+	}
+
+	/*
+	 * We can only handled completely cache-aligned transactions
+	 * with the DMA engine.  Source and Dst must be cache-line
+	 * aligned AND the length must be a multiple of the cache-line.
+	 */
+
+	to_pa = virt_to_phys(to);
+	from_pa = virt_to_phys((void*)from);
+
+	if (((to_pa + n > from_pa) && (to_pa < from_pa)) ||
+	    ((from_pa < to_pa) && (from_pa + n > to_pa))) {
+		DPRINTK("overlapping copy region (0x%x, 0x%x, %lu), falling back\n",
+		     to_pa, from_pa, (unsigned long)n);
+		xor_dma_miss++;
+		return asm_memmove(to, from, n);
+	}
+	/*
+	 * Ok, start addr is not cache line-aligned, so we need to make it so.
+	 */
+	xor_dma_unaligned_to = (u32) to & 31;
+	xor_dma_unaligned_from = (u32) from & 31;;
+	if (xor_dma_unaligned_to | xor_dma_unaligned_from) {
+		ua++;
+		if (xor_dma_unaligned_from > xor_dma_unaligned_to) {
+			asm_memmove(to, from, 32 - xor_dma_unaligned_to);
+			to = (void *)((u32)to + 32 - xor_dma_unaligned_to);
+			from = (void *)((u32)from + 32 - xor_dma_unaligned_to);
+			n -= 32 - xor_dma_unaligned_to;
+		} else {
+			asm_memmove(to, from, 32 - xor_dma_unaligned_from);
+			to = (void *)((u32)to + 32 - xor_dma_unaligned_from);
+			from = (void *)((u32)from + 32 - xor_dma_unaligned_from);
+			n -= 32 - xor_dma_unaligned_from;
+		}
+	}
+
+	/*
+	 * Ok, we're aligned at the top, now let's check the end
+	 * of the buffer and align that. After this we should have
+	 * a block that is a multiple of cache line size.
+	 */
+	xor_dma_unaligned_to = ((u32) to + n) & 31;
+	xor_dma_unaligned_from = ((u32) from + n) & 31;;
+	if (xor_dma_unaligned_to | xor_dma_unaligned_from) {
+		ua++;
+		if (xor_dma_unaligned_to > xor_dma_unaligned_from) {
+			u32 tmp_to = (u32) to + n - xor_dma_unaligned_to;
+			u32 tmp_from = (u32) from + n - xor_dma_unaligned_to;
+
+			asm_memmove((void *)tmp_to, (void *)tmp_from,
+				   xor_dma_unaligned_to);
+
+			n -= xor_dma_unaligned_to;
+		} else {
+			u32 tmp_to = (u32) to + n - xor_dma_unaligned_from;
+			u32 tmp_from = (u32) from + n - xor_dma_unaligned_from;
+
+			asm_memmove((void *)tmp_to, (void *)tmp_from,
+				   xor_dma_unaligned_from);
+
+			n -= xor_dma_unaligned_from;
+		}
+	}
+
+	/*
+	 * OK! We should now be fully aligned on both ends. 
+	 */
+        chan = allocate_channel();
+        if ( chan == -1)
+        {
+                DPRINTK("XOR engines are busy, return\n");
+       		xor_dma_miss++;
+		return asm_memmove(to, from, n);
+        }
+	DPRINTK("setting up rest of descriptor for channel %d\n", chan);
+        channel = &xor_channel[chan];
+	
+        /* Ensure that the cache is clean */
+	dmac_clean_range(from, from + n);
+	dmac_inv_range(to, to + n);
+
+	DPRINTK("setting up rest of descriptor\n");
+	// flush the cache to memory before XOR engine touches them
+        channel->pDescriptor->srcAdd0 = virt_to_phys((void*)from);
+	channel->pDescriptor->phyDestAdd = virt_to_phys(to);
+        channel->pDescriptor->byteCnt = n;
+        channel->pDescriptor->phyNextDescPtr = 0;
+        channel->pDescriptor->status = BIT31;
+	channel->chan_active = 1;
+#if defined(MV_BRIDGE_SYNC_REORDER)
+	mvOsBridgeReorderWA();
+#endif
+        if( mvXorTransfer(chan, MV_DMA, channel->descPhyAddr) != MV_OK)
+        {
+            printk(KERN_ERR "%s: DMA copy operation on channel %d failed!\n", __func__, chan);
+            print_xor_regs(chan);
+            BUG();
+            free_channel(channel);
+       	    return asm_memmove(to, from, n);
+        }
+        xor_waiton_eng(chan);
+
+        DPRINTK("DMA copy complete\n");
+	// check to see if failed
+#if 0
+	if (!(channel->pDescriptor->status & BIT30))
+        {
+            printk(KERN_ERR "%s: DMA copy operation completed with error!\n", __func__);
+            printk(" srcAdd %x DestAddr %x, count %x\n", channel->pDescriptor->srcAdd0,
+                                                channel->pDescriptor->phyDestAdd, n); 
+            print_xor_regs(chan);            
+	    BUG();
+            free_channel(channel);
+       	    return asm_memmove(to, from, n);
+        }
+#endif
+        free_channel(channel);
+ 
+	xor_dma_hit++;
+	if (ua)
+		xor_dma_unaligned++;
+
+	return orig_to;
+}
+EXPORT_SYMBOL(xor_memcpy);
+#endif
+#ifdef CONFIG_MV_USE_XOR_FOR_COPY_USER_BUFFERS
+/*=======================================================================*/
+/*  Procedure:  xor_copy_to_user()                                       */
+/*                                                                       */
+/*  Description:    DMA-based copy_to_user.                              */
+/*                                                                       */
+/*  Parameters:  to: destination address                                 */
+/*               from: source address                                    */
+/*               n: number of bytes to transfer                          */
+/*                                                                       */
+/*  Returns:     unsigned long: number of bytes NOT copied               */
+/*                                                                       */
+/*  Notes/Assumptions:                                                   */
+/*              Assumes that kernel physical memory is contiguous, i.e., */
+/*              the physical addresses of contiguous virtual addresses   */
+/*              are also contiguous.                                     */
+/*              Assumes that kernel memory doesn't get paged.            */
+/*              Assumes that to/from memory regions cannot overlap       */
+/*                                                                       */
+/*=======================================================================*/
+unsigned long xor_copy_to_user(void *to, const void *from, unsigned long n)
+{
+	if(!xor_engine_initialized)
+    		return __arch_copy_to_user((void *)to, (void *)from, n);
+
+     	dma_to_user++;
+     	DPRINTK(KERN_CRIT "xor_copy_to_user(%#10x, 0x%#10x, %lu): entering\n", (u32) to, (u32) from, n);
+    
+        return  xor_dma_copy(to, from, n, 1);
+}
+EXPORT_SYMBOL(xor_copy_to_user);
+/*=======================================================================*/
+/*  Procedure:  xor_copy_from_user()                                     */
+/*                                                                       */
+/*  Description:    DMA-based copy_from_user.                            */
+/*                                                                       */
+/*  Parameters:  to: destination address                                 */
+/*               from: source address                                    */
+/*               n: number of bytes to transfer                          */
+/*                                                                       */
+/*  Returns:     unsigned long: number of bytes NOT copied               */
+/*                                                                       */
+/*  Notes/Assumptions:                                                   */
+/*              Assumes that kernel virtual memory is contiguous, i.e.,  */
+/*              the physical addresses of contiguous virtual addresses   */
+/*              are also contiguous.                                     */
+/*              Assumes that kernel memory doesn't get paged.            */
+/*              Assumes that to/from memory regions cannot overlap       */
+/*              XXX this one doesn't quite work right yet                */
+/*                                                                       */
+/*=======================================================================*/
+unsigned long xor_copy_from_user(void *to, const void *from, unsigned long n)
+{
+    if(!xor_engine_initialized)
+	return __arch_copy_from_user((void *)to, (void *)from, n);
+
+    dma_from_user++;
+    DPRINTK(KERN_CRIT "xor_copy_from_user(0x%x, 0x%x, %lu): entering\n", (u32) to, (u32) from, n);
+    return  xor_dma_copy(to, from, n, 0);
+}
+
+EXPORT_SYMBOL(xor_copy_from_user);
+/*
+ * n must be greater equal than 64.
+ */
+static unsigned long xor_dma_copy(void *to, const void *from, unsigned long n, unsigned int to_user)
+{
+	u32 chunk,i;
+	u32 k_chunk = 0;
+	u32 u_chunk = 0;
+	u32 phys_from, phys_to;
+	
+        unsigned long flags;
+	u32 unaligned_to;
+	u32 index = 0;
+        u32 temp;
+	u32 taken_channel[XOR_MAX_CHANNELS];
+
+        unsigned long uaddr, kaddr;
+	int     chan;
+        int     current_channel;
+        struct xor_channel_t *channel;
+       
+        DPRINTK("xor_dma_copy: entering\n");
+	
+	/* allocate all channels*/
+	for(chan = 0; chan < XOR_MAX_CHANNELS; chan++)
+	{
+	     if((taken_channel[chan] = allocate_channel()) == -1)
+	     {
+		  copy_tf_failed_on_res++;
+		  for(;chan; chan--)
+		       free_channel(&xor_channel[taken_channel[chan-1]]);
+		  goto exit_dma;
+	     }
+	}
+
+	current_channel = 0;
+	/* 
+      	 * The unaligned is taken care seperatly since the dst might be part of a cache line that is changed 
+	 * by other process -> we must not invalidate this cache lines and we can't also flush it, since other 
+	 * process (or the exception handler) might fetch the cache line before we copied it. 
+	 */
+
+	/*
+	 * Ok, start addr is not cache line-aligned, so we need to make it so.
+	 */
+	unaligned_to = (u32)to & 31;
+	if(unaligned_to)
+	{
+		DPRINTK("Fixing up starting address %d bytes\n", 32 - unaligned_to);
+
+		if(to_user)
+		{
+		    if((__arch_copy_to_user(to, from, 32 - unaligned_to))) 
+			goto free_channels; 
+		}
+		else
+		{
+		    if((__arch_copy_from_user(to, from, 32 - unaligned_to))) 
+			goto free_channels;
+		}
+
+		temp = (u32)to + (32 - unaligned_to);
+		to = (void *)temp;
+		temp = (u32)from + (32 - unaligned_to);
+		from = (void *)temp;
+
+                /*it's ok, n supposed to be greater than 32 bytes at this point*/
+		n -= (32 - unaligned_to);
+	}
+
+	/*
+	 * Ok, we're aligned at the top, now let's check the end
+	 * of the buffer and align that. After this we should have
+	 * a block that is a multiple of cache line size.
+	 */
+	unaligned_to = ((u32)to + n) & 31;
+	if(unaligned_to)
+	{	
+		u32 tmp_to = (u32)to + (n - unaligned_to);
+		u32 tmp_from = (u32)from + (n - unaligned_to);
+		DPRINTK("Fixing ending alignment %d bytes\n", unaligned_to);
+
+		if(to_user)
+		{
+		    if((__arch_copy_to_user((void *)tmp_to, (void *)tmp_from, unaligned_to)))
+			goto free_channels;
+		}
+		else
+		{
+		    if((__arch_copy_from_user((void *)tmp_to, (void *)tmp_from, unaligned_to)))
+			goto free_channels;
+		}
+
+                /*it's ok, n supposed to be greater than 32 bytes at this point*/
+		n -= unaligned_to;
+	}
+
+        if(to_user)
+        {
+            uaddr = (unsigned long)to;  
+            kaddr = (unsigned long)from;
+        }
+        else
+        {
+             uaddr = (unsigned long)from;
+             kaddr = (unsigned long)to;
+        }
+        if(virt_addr_valid(kaddr))
+        {
+            k_chunk = n;
+        }
+	else
+	{
+		DPRINTK("kernel address is not linear, fall back\n");
+		goto free_channels;		
+	}
+#if defined(CONFIG_SMP)
+	#warning "*** FIXME: --> for SMP should fix this spin_lock issue ***"
+/*      once we put here this -->  spin_lock_irqsave(&current->mm->page_table_lock, flags); 
+ *      but since acquiring this spinlock later on, we got a deadlock(on SMP). */
+#else
+	local_irq_save(flags);
+#endif
+     
+        i = 0;
+	while(n > 0)
+	{
+	    if(k_chunk == 0)
+	    {
+                /* virtual address */
+	        k_chunk = page_remainder((u32)kaddr);
+		DPRINTK("kaddr reminder %d \n",k_chunk);
+	    }
+
+	    if(u_chunk == 0)
+	    {
+                u_chunk = page_remainder((u32)uaddr);
+                DPRINTK("uaddr reminder %d \n", u_chunk);
+            }
+        
+            chunk = ((u_chunk < k_chunk) ? u_chunk : k_chunk);
+            if(n < chunk)
+	    {
+		chunk = n;
+	    }
+
+	    if(chunk == 0)
+	    {
+	    	break;
+	    }
+            phys_from = physical_address((u32)from, 0);
+            phys_to = physical_address((u32)to, 1);
+	    DPRINTK("choose chunk %d \n",chunk);
+
+	    /* if page doesn't exist go out immediatly, don't try to copy by CPU, since it is not right 
+	     * to get page fault while int are locked. see do_page_fault */
+	    if ((!phys_from) || (!phys_to))
+	    {
+		/* The requested page isn't available, fall back to */
+		DPRINTK(" no physical address, fall back: from %p , to %p \n", from, to);
+		goto unlock_dma;
+   
+	    }
+	    /*
+	     *  Prepare the IDMA.
+	     */
+            if (chunk < XOR_MIN_COPY_CHUNK)
+            {
+                int last_chan = PREV_CHANNEL(current_channel); 
+        	DPRINTK(" chunk %d too small , use memcpy \n",chunk);
+        	
+                /* the "to" address might cross cache line boundary, so part of the  */
+		/* line may be subject to DMA, so we need to wait to last DMA engine */
+		/* to finish */
+                if(index > 0)
+                    xor_waiton_eng(last_chan);
+
+                if(to_user)
+		{
+	       	    if((__arch_copy_to_user((void *)to, (void *)from, chunk))) {
+			printk("ERROR: %s %d shouldn't happen\n",__FUNCTION__, __LINE__);	
+			goto unlock_dma;
+		    }
+            }
+            else
+	    {
+	            if((__arch_copy_from_user((void *)to, (void *)from, chunk))) {
+			printk("ERROR: %s %d shouldn't happen\n",__FUNCTION__, __LINE__);	
+		    goto unlock_dma;
+		    }
+		}
+		}
+		else
+		{
+		    /* 
+		    * Ensure that the cache is clean:
+		    *      - from range must be cleaned
+		    *      - to range must be invalidated
+		    */
+//		    mvOsCacheFlush(NULL, (void *)from, chunk);
+		    dmac_flush_range(from, from + chunk);
+		    //	    mvOsCacheInvalidate(NULL, (void *)to, chunk);
+		    dmac_inv_range(to, to + chunk);
+		    if(index > 0)
+		    {
+			xor_waiton_eng(current_channel);
+		    }
+		    channel = &xor_channel[current_channel];
+  
+		    /* Start DMA */
+		    DPRINTK(" activate DMA: channel %d from %x to %x len %x\n",
+                            current_channel, phys_from, phys_to, chunk);
+		    channel->pDescriptor->srcAdd[0] = phys_from;
+		    channel->pDescriptor->phyDestAdd = phys_to;
+		    channel->pDescriptor->byteCnt = chunk;
+		    channel->pDescriptor->phyNextDescPtr = 0;
+		    channel->pDescriptor->status = BIT31;
+		    channel->chan_active = 1;
+#if defined(MV_BRIDGE_SYNC_REORDER)
+		    mvOsBridgeReorderWA();
+#endif
+		    if( mvXorTransfer(current_channel, MV_DMA, channel->descPhyAddr) != MV_OK)
+		    {
+			printk(KERN_ERR "%s: DMA copy operation on channel %d failed!\n", __func__, current_channel);
+			print_xor_regs(current_channel);
+			BUG();
+		    }
+                
+		    current_channel = NEXT_CHANNEL(current_channel);
+#ifdef RT_DEBUG
+			dma_activations++;
+#endif
+			index++;
+		    }
+
+		/* go to next chunk */
+		from += chunk;
+		to += chunk;
+                kaddr += chunk;
+                uaddr += chunk;
+		n -= chunk;
+		u_chunk -= chunk;
+		k_chunk -= chunk;		
+	}
+unlock_dma:
+	for(chan = 0; chan < XOR_MAX_CHANNELS; chan++)
+	     xor_waiton_eng(chan);
+#if defined(CONFIG_SMP)
+	#warning "*** FIXME: <-- for SMP should fix this spin_lock issue ***"
+        /*spin_unlock_irqrestore(&current->mm->page_table_lock, flags);*/
+#else
+	local_irq_restore(flags);
+#endif
+free_channels:
+	for(chan = 0; chan < XOR_MAX_CHANNELS; chan++)
+	     free_channel(&xor_channel[chan]);
+exit_dma:        
+        DPRINTK("xor_dma_copy(0x%x, 0x%x, %lu): exiting\n", (u32) to,
+                (u32) from, n);
+       
+        if(n != 0)
+        {
+       	    if(to_user)
+                return __arch_copy_to_user((void *)to, (void *)from, n);
+	            else
+                return __arch_copy_from_user((void *)to, (void *)from, n);
+        }
+        return 0;
+}
+#endif
+
+#ifdef CONFIG_MV_XORMEMZERO
+/*=======================================================================*/
+/*  Procedure:  xor_memzero()                                             */
+/*                                                                       */
+/*  Description:    DMA-based in-kernel memzero.                          */
+/*                                                                       */
+/*  Parameters:  to: destination address                                 */
+/*               n: number of bytes to transfer                          */
+/*                                                                       */
+/*                                                                       */
+/*  Notes/Assumptions:                                                   */
+/*              Assumes that kernel physical memory is contiguous, i.e., */
+/*              the physical addresses of contiguous virtual addresses   */
+/*              are also contiguous.                                     */
+/*              Assumes that kernel memory doesn't get paged.            */
+/*              The DMA is polling                                       */
+/*                                                                       */
+/*=======================================================================*/
+void xor_memzero(void *to, __kernel_size_t n)
+{
+	u32 xor_dma_unaligned_to;
+	u32 to_pa;
+        int ua = 0;
+        int         chan;
+        struct xor_channel_t *channel;
+
+	DPRINTK("xor_memzero(0x%x, %lu): entering\n", (u32) to, (unsigned long)n);
+
+        if (xor_engine_initialized == 0)
+        {
+            DPRINTK(KERN_WARNING" %s: xor engines not initialized yet\n", __func__);
+       	    xor_memzero_miss++;
+	    return asm_memzero(to, n);
+        }
+ 	if (!(virt_addr_valid((u32) to))) {
+		DPRINTK("xor_memcpy(0x%x, %lu): falling back to memzero\n",
+			(u32) to, (unsigned long)n);
+		xor_memzero_miss++;
+		return asm_memzero(to, n);
+	}
+
+	/*
+	 * We can only handled completely cache-aligned transactions
+	 * with the DMA engine.  Dst must be cache-line
+	 * aligned AND the length must be a multiple of the cache-line.
+	 */
+
+	to_pa = virt_to_phys(to);
+
+	/*
+	 * Ok, start addr is not cache line-aligned, so we need to make it so.
+	 */
+	xor_dma_unaligned_to = (u32) to & 31;
+	if (xor_dma_unaligned_to)
+        {
+            ua++;
+	    asm_memzero(to, 32 - xor_dma_unaligned_to);
+            to = (void *)((u32)to + 32 - xor_dma_unaligned_to);
+	    n -= 32 - xor_dma_unaligned_to;
+	}
+
+	/*
+	 * Ok, we're aligned at the top, now let's check the end
+	 * of the buffer and align that. After this we should have
+	 * a block that is a multiple of cache line size.
+	 */
+	xor_dma_unaligned_to = ((u32) to + n) & 31;
+	if (xor_dma_unaligned_to) {
+	    u32 tmp_to = (u32) to + n - xor_dma_unaligned_to;
+	    asm_memzero((void *)tmp_to, xor_dma_unaligned_to);
+            n -= xor_dma_unaligned_to;
+	    ua++;
+	}
+
+	/*
+	 * OK! We should now be fully aligned on both ends. 
+	 */
+        chan = allocate_channel();
+        if ( chan == -1)
+         {
+                DPRINTK("XOR engines are busy, return\n");
+       		xor_memzero_miss++;
+		return asm_memzero(to, n);
+        }
+        if (down_trylock(&meminit_sema))
+        {
+            DPRINTK("meminit is used by one of the XOR engines\n");
+            xor_memzero_miss++;
+            free_channel(&xor_channel[chan]);
+	    return asm_memzero(to, n);
+        }
+
+	DPRINTK("setting up rest of descriptor for channel %d\n", chan);
+        channel = &xor_channel[chan];
+	
+        /* Ensure that the cache is clean */
+	dmac_inv_range(to, to + n);
+
+	channel->chan_active = 1;
+
+	DPRINTK("setting up rest of descriptor\n");
+        if( mvXorMemInit(chan, virt_to_phys(to), n, 0, 0) != MV_OK)
+        {
+            printk(KERN_ERR "%s: DMA memzero operation on channel %d failed. to %p len %d!\n", __func__, chan,
+                to, n);
+            free_channel(channel);
+            up(&meminit_sema);
+       	    return asm_memzero(to, n);
+        }
+        xor_waiton_eng(chan);
+
+
+        DPRINTK("DMA memzero complete\n");
+	// check to see if failed
+        up(&meminit_sema);
+        free_channel(channel);
+	xor_memzero_hit++;
+	if (ua)
+		xor_memzero_unaligned++;
+
+}
+EXPORT_SYMBOL(xor_memzero);
+#endif
+
+#ifdef CONFIG_ENABLE_XOR_INTERRUPTS
+static irqreturn_t
+mv_xor_isr(int irq, void *dev_id)
+{
+    MV_U32  reg;
+
+    reg = MV_REG_READ(XOR_CAUSE_REG(0));
+    MV_REG_WRITE(XOR_CAUSE_REG(0), ~reg);
+    DPRINTK("%s: unit 0: cause 0x%08x, dev_id %d",__func__, reg, (int)dev_id);
+    if(reg & BIT1)
+    {
+       wake_up(&xor_channel[0].waitq);
+    }
+#if XOR_MAX_CHANNELS  >  1
+    if(reg & BIT17)
+    {
+       wake_up(&xor_channel[1].waitq);
+    }
+#endif
+#if XOR_MAX_CHANNELS  >  2
+    reg = MV_REG_READ(XOR_CAUSE_REG(1));
+    MV_REG_WRITE(XOR_CAUSE_REG(1), ~reg);
+    DPRINTK("%s: unit 1: cause 0x%08x, dev_id %d",__func__, reg, (int)dev_id);
+    if(reg & BIT1)
+    {
+       wake_up(&xor_channel[2].waitq);
+    }
+#if XOR_MAX_CHANNELS  >  3
+    if(reg & BIT17)
+    {
+       wake_up(&xor_channel[3].waitq);
+    }
+#endif
+#endif
+
+    /*ignore access protection*/ 
+    if( reg & ~(BIT20|BIT17|BIT16|BIT4|BIT1|BIT0))
+    {
+        printk("%s error: cause register 0x%08x\n", __func__, reg);
+    }
+    return IRQ_HANDLED;
+}
+#endif
+static int xor_read_proc(char *buf, char **start, off_t offset, int len,
+			 int *eof, void *data)
+{
+	len = 0;
+
+	len += sprintf(buf + len, "Number of XOR hits: %d\n", xor_hit);
+	len += sprintf(buf + len, "XOR DMA memcopy hits: %d\n", xor_dma_hit);
+	len += sprintf(buf + len, "XOR DMA memcopy misses: %d\n", xor_dma_miss);
+	len += sprintf(buf + len, "XOR DMA memcopy unaligned buffers: %d\n", xor_dma_unaligned);
+	len += sprintf(buf + len, "XOR DMA memzero hits: %d\n", xor_memzero_hit);
+	len += sprintf(buf + len, "XOR DMA memzero misses: %d\n", xor_memzero_miss);
+	len += sprintf(buf + len, "XOR DMA memzero unaligned buffers: %d\n", xor_memzero_hit);
+        len += sprintf(buf + len, "XOR copy to/from user DMA min buffer %ld\n", mv_dma_min_buffer);
+	len += sprintf(buf + len, "Number of XOR DMA copy to user %d copy from user %d \n",
+                                    dma_to_user, dma_from_user);
+	len += sprintf(buf + len, "copy to/from failed on channel allocation 0x%x \n", 
+									copy_tf_failed_on_res);
+#ifdef RT_DEBUG
+	len += sprintf(buf + len, "copy to/from user dma activations %d\n", dma_activations);
+#endif
+	return len;
+}
+
+static int mv_xor_probe(struct platform_device *pdev)
+{
+    int chan;
+#ifdef CONFIG_ENABLE_XOR_INTERRUPTS
+    int err = 0;
+#endif
+    char *mode = "acceleration";
+
+#ifdef CONFIG_ENABLE_XOR_INTERRUPTS
+    mode = "offloading";
+#endif
+    
+    printk(KERN_INFO "Use the XOR engines (%s) for enhancing the following functions:\n", mode);
+#ifdef CONFIG_MV_RAID5_XOR_OFFLOAD
+    printk(KERN_INFO "  o RAID 5 Xor calculation\n");
+#endif
+#ifdef CONFIG_MV_XORMEMCOPY
+    printk(KERN_INFO "  o kernel memcpy\n");
+#endif
+#ifdef CONFIG_MV_XORMEMZERO
+    printk(KERN_INFO "  o kenrel memzero\n");
+#endif
+#ifdef CONFIG_MV_USE_XOR_FOR_COPY_USER_BUFFERS
+    printk(KERN_INFO "  o copy user to/from kernel buffers\n");
+#endif
+    printk(KERN_INFO "Number of XOR engines to use: %d\n", XOR_MAX_CHANNELS);
+
+    if(mvCtrlModelGet() == MV_5082_DEV_ID)
+    {
+        printk(KERN_WARNING " This device doesn't have XOR engines.\n");    
+        return -ENODEV;
+    }
+    mvXorHalInit(XOR_MAX_CHANNELS);
+
+    /* pre-alloc XOR descriptors */
+    pDescriptors = dma_alloc_coherent(NULL, sizeof(MV_XOR_DESC) * XOR_MAX_CHANNELS,
+                                            &descsPhyAddr, GFP_KERNEL);  
+    if(pDescriptors == NULL)
+    {
+        printk(KERN_ERR "%s: failed to allocate XOR descriptors\n", __func__);
+        return -ENOMEM;
+    }
+    sema_init(&meminit_sema, 1);
+    memset(pDescriptors, 0, sizeof(MV_XOR_DESC) * XOR_MAX_CHANNELS);
+    DPRINTK(" allocating XOR Descriptors: virt add %p, phys addr %x\n", 
+        pDescriptors, descsPhyAddr);
+    for(chan = 0; chan  < XOR_MAX_CHANNELS; chan++)
+    {
+	xor_channel[chan].chan_num = chan;
+        xor_channel[chan].pDescriptor = pDescriptors + chan;
+        xor_channel[chan].descPhyAddr = descsPhyAddr + (sizeof(MV_XOR_DESC) * chan);
+	xor_channel[chan].chan_active = 0;
+
+        sema_init(&xor_channel[chan].sema, 1);
+        init_waitqueue_head(&xor_channel[chan].waitq);
+        mvXorCtrlSet(chan, (1 << XEXCR_REG_ACC_PROTECT_OFFS) | 
+                    (4 << XEXCR_DST_BURST_LIMIT_OFFS) |
+                    (4 << XEXCR_SRC_BURST_LIMIT_OFFS)
+#if defined(MV_CPU_BE)
+					 | (1 << XEXCR_DES_SWP_OFFS)
+#endif
+					 );
+#ifdef CONFIG_ENABLE_XOR_INTERRUPTS
+        switch(chan)
+        {
+            case 0:
+                xor_channel[chan].irq_num = XOR0_IRQ_NUM;
+		xor_channel[chan].name = "xor_chan0";
+                break;
+            case 1:
+                xor_channel[chan].irq_num = XOR1_IRQ_NUM;
+                xor_channel[chan].name = "xor_chan1";
+            	break;
+#if XOR_MAX_CHANNELS > 2
+            case 2:
+                xor_channel[chan].irq_num = XOR2_IRQ_NUM;
+                xor_channel[chan].name = "xor_chan2";
+            	break;
+            case 3:
+                xor_channel[chan].irq_num = XOR3_IRQ_NUM;
+                xor_channel[chan].name = "xor_chan3";
+            	break;
+#endif
+            default:
+                printk(KERN_ERR "%s: trying to configure bad xor channel\n", __func__);
+                return -ENXIO; 
+        }
+        err = request_irq(xor_channel[chan].irq_num, mv_xor_isr, IRQF_DISABLED,
+				  xor_channel[chan].name, (void *)chan);
+        if (err < 0)
+        {
+            printk(KERN_ERR "%s: unable to request IRQ %d for "
+                            "XOR %d: %d\n", __func__, xor_channel[chan].irq_num, chan, err);
+        	return -EBUSY;
+        }
+#endif
+
+    }
+#ifdef CONFIG_PROC_FS
+	xor_read_proc_entry =
+        create_proc_entry("mv_xor", S_IFREG | S_IRUGO, 0);
+        xor_read_proc_entry->read_proc = xor_read_proc;
+        xor_read_proc_entry->write_proc = NULL;
+	xor_read_proc_entry->nlink = 1;
+#endif
+    xor_engine_initialized = 1;
+    return 0;
+}
+
+
+static struct platform_driver mv_xor_driver = {
+	.probe		= mv_xor_probe,
+	.driver		= {
+		.name	= "mv_xor_hal"
+	},
+};
+
+
+static int __init mv_xor_init(void)
+{
+	int rc;
+
+	rc = platform_driver_register(&mv_xor_driver);
+	return rc;
+}
+module_init(mv_xor_init);
+
+MODULE_LICENSE(GPL);
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_xor/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_xor/Makefile
@@ -0,0 +1,5 @@
+#
+# Makefile for the Marvell XOR/DMA Driver
+#
+include $(MV_RULES_PATH)/mvRules.mk
+obj-$(CONFIG_MV_USE_XOR_ENGINE) += mv_xor.o
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_cesa/cesa_ocf_drv.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_cesa/cesa_ocf_drv.c
@@ -0,0 +1,1373 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+*******************************************************************************/
+
+#ifndef AUTOCONF_INCLUDED
+#include <linux/config.h>
+#endif
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/list.h>
+#include <linux/slab.h>
+#include <linux/sched.h>
+#include <linux/wait.h>
+#include <linux/crypto.h>
+#include <linux/mm.h>
+#include <linux/skbuff.h>
+#include <linux/random.h>
+#include <asm/scatterlist.h>
+#include <linux/spinlock.h>
+#include <plat/mv_cesa.h>
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "mvSysCesaApi.h"
+#include "cesa/mvCesa.h" /* moved here before cryptodev.h due to include dependencies */
+#include <cryptodev.h>
+#include <uio.h>
+#include <linux/platform_device.h>
+
+#include "mvDebug.h"
+
+#include "cesa/mvMD5.h"
+#include "cesa/mvSHA1.h"
+
+#include "cesa/mvCesaRegs.h"
+#include "cesa/AES/mvAes.h"
+#include "cesa/mvLru.h"
+#include "mvKW_HAL_glue.h"
+
+#undef RT_DEBUG
+#ifdef RT_DEBUG
+static int debug = 1;
+module_param(debug, int, 1);
+MODULE_PARM_DESC(debug, "Enable debug");
+#undef dprintk
+#define dprintk(a...)	if (debug) { printk(a); } else
+#else
+static int debug = 0;
+#undef dprintk
+#define dprintk(a...)
+#endif
+
+/* interrupt handling */
+#undef CESA_OCF_POLLING
+#undef CESA_OCF_TASKLET
+
+
+#if defined(CESA_OCF_POLLING) && defined(CESA_OCF_TASKLET)
+#error "don't use both tasklet and polling mode"
+#endif
+
+extern int cesaReqResources;
+/* support for spliting action into 2 actions */
+#define CESA_OCF_SPLIT
+
+/* general defines */
+#define CESA_OCF_MAX_SES 128
+#define CESA_Q_SIZE	 64
+
+
+/* data structures */
+struct cesa_ocf_data {
+        int                                      cipher_alg;
+        int                                      auth_alg;
+	int					 encrypt_tn_auth;
+#define  auth_tn_decrypt  encrypt_tn_auth
+	int					 ivlen;
+	int 					 digestlen;
+	short					 sid_encrypt;
+	short					 sid_decrypt;
+	/* fragment workaround sessions */
+	short					 frag_wa_encrypt;
+	short					 frag_wa_decrypt;
+	short					 frag_wa_auth;
+};
+
+#define DIGEST_BUF_SIZE	32
+struct cesa_ocf_process {
+	MV_CESA_COMMAND 			cesa_cmd;
+	MV_CESA_MBUF 				cesa_mbuf;	
+	MV_BUF_INFO  				cesa_bufs[MV_CESA_MAX_MBUF_FRAGS];
+	char					digest[DIGEST_BUF_SIZE];
+	int					digest_len;
+	struct cryptop 				*crp;
+	int 					need_cb;
+};
+
+struct cesa_ocf_pm_info {
+	MV_U32 tdma_ctl;
+	MV_U32 isr_mask;
+	MV_U32 cfg;
+	MV_U32 desc_ptr;
+};
+
+
+/* global variables */
+static struct cesa_ocf_pm_info cesa_ocf_pm;
+static int32_t			cesa_ocf_id 		= -1;
+static struct cesa_ocf_data 	*cesa_ocf_sessions[CESA_OCF_MAX_SES];
+static spinlock_t 		cesa_lock;
+
+/* static APIs */
+static int 		cesa_ocf_process	(device_t, struct cryptop *, int);
+static int 		cesa_ocf_newsession	(device_t, u_int32_t *, struct cryptoini *);
+static int 		cesa_ocf_freesession	(device_t, u_int64_t);
+static void 		cesa_callback		(unsigned long);
+static irqreturn_t	cesa_interrupt_handler	(int, void *);
+static int		cesa_ocf_init		(void);
+static void		cesa_ocf_exit		(void);
+#ifdef CESA_OCF_POLLING
+static void cesa_interrupt_polling(void);
+#endif
+#ifdef CESA_OCF_TASKLET
+static struct tasklet_struct cesa_ocf_tasklet;
+#endif
+
+static struct timeval          tt_start;
+static struct timeval          tt_end;
+
+/*
+ * dummy device structure
+ */
+
+static struct {
+	softc_device_decl	sc_dev;
+} mv_cesa_dev;
+
+static device_method_t mv_cesa_methods = {
+	/* crypto device methods */
+	DEVMETHOD(cryptodev_newsession,	cesa_ocf_newsession),
+	DEVMETHOD(cryptodev_freesession,cesa_ocf_freesession),
+	DEVMETHOD(cryptodev_process,	cesa_ocf_process),
+	DEVMETHOD(cryptodev_kprocess,	NULL),
+};
+
+
+
+/* Add debug Trace */
+#undef CESA_OCF_TRACE_DEBUG
+#ifdef CESA_OCF_TRACE_DEBUG
+
+#define MV_CESA_USE_TIMER_ID    0
+
+typedef struct
+{
+    int             type;       /* 0 - isrEmpty, 1 - cesaReadyGet, 2 - cesaAction */
+    MV_U32          timeStamp;
+    MV_U32          cause;
+    MV_U32          realCause;
+    MV_U32          dmaCause;
+    int             resources;
+    MV_CESA_REQ*    pReqReady;
+    MV_CESA_REQ*    pReqEmpty;
+    MV_CESA_REQ*    pReqProcess;
+} MV_CESA_TEST_TRACE;
+
+#define MV_CESA_TEST_TRACE_SIZE      50
+
+static int cesaTestTraceIdx = 0;
+static MV_CESA_TEST_TRACE    cesaTestTrace[MV_CESA_TEST_TRACE_SIZE];
+
+static void cesaTestTraceAdd(int type)
+{
+    cesaTestTrace[cesaTestTraceIdx].type = type;
+    cesaTestTrace[cesaTestTraceIdx].realCause = MV_REG_READ(MV_CESA_ISR_CAUSE_REG);
+    //cesaTestTrace[cesaTestTraceIdx].idmaCause = MV_REG_READ(IDMA_CAUSE_REG);
+    cesaTestTrace[cesaTestTraceIdx].resources = cesaReqResources;
+    cesaTestTrace[cesaTestTraceIdx].pReqReady = pCesaReqReady;
+    cesaTestTrace[cesaTestTraceIdx].pReqEmpty = pCesaReqEmpty;
+    cesaTestTrace[cesaTestTraceIdx].pReqProcess = pCesaReqProcess;
+    cesaTestTrace[cesaTestTraceIdx].timeStamp = mvCntmrRead(MV_CESA_USE_TIMER_ID);
+    cesaTestTraceIdx++;
+    if(cesaTestTraceIdx == MV_CESA_TEST_TRACE_SIZE)
+        cesaTestTraceIdx = 0;
+}
+
+#else /* CESA_OCF_TRACE_DEBUG */
+
+#define cesaTestTraceAdd(x)
+
+#endif /* CESA_OCF_TRACE_DEBUG */
+
+unsigned int
+get_usec(unsigned int start)
+{
+	if(start) {
+		do_gettimeofday (&tt_start);
+		return 0;
+	}
+	else {
+        	do_gettimeofday (&tt_end);
+        	tt_end.tv_sec -= tt_start.tv_sec;
+        	tt_end.tv_usec -= tt_start.tv_usec;
+        	if (tt_end.tv_usec < 0) {
+                	tt_end.tv_usec += 1000 * 1000;
+                	tt_end.tv_sec -= 1;
+        	}
+	}
+	printk("time taken is  %d\n", (unsigned int)(tt_end.tv_usec + tt_end.tv_sec * 1000000));
+	return (tt_end.tv_usec + tt_end.tv_sec * 1000000);
+}
+
+static void
+skb_copy_bits_back(struct sk_buff *skb, int offset, caddr_t cp, int len)
+{
+        int i;
+        if (offset < skb_headlen(skb)) {
+                memcpy(skb->data + offset, cp, min_t(int, skb_headlen(skb), len));
+                len -= skb_headlen(skb);
+                cp += skb_headlen(skb);
+        }
+        offset -= skb_headlen(skb);
+        for (i = 0; len > 0 && i < skb_shinfo(skb)->nr_frags; i++) {
+                if (offset < skb_shinfo(skb)->frags[i].size) {
+                        memcpy(page_address(skb_shinfo(skb)->frags[i].page) +
+                                        skb_shinfo(skb)->frags[i].page_offset,
+                                        cp, min_t(int, skb_shinfo(skb)->frags[i].size, len));
+                        len -= skb_shinfo(skb)->frags[i].size;
+                        cp += skb_shinfo(skb)->frags[i].size;
+                }
+                offset -= skb_shinfo(skb)->frags[i].size;
+        }
+}
+
+
+#ifdef RT_DEBUG
+/* 
+ * check that the crp action match the current session
+ */
+static int 
+ocf_check_action(struct cryptop *crp, struct cesa_ocf_data *cesa_ocf_cur_ses) {
+	int count = 0;
+	int encrypt = 0, decrypt = 0, auth = 0;
+	struct cryptodesc *crd;
+
+        /* Go through crypto descriptors, processing as we go */
+        for (crd = crp->crp_desc; crd; crd = crd->crd_next, count++) {
+		if(count > 2) {
+			printk("%s,%d: session mode is not supported.\n", __FILE__, __LINE__);
+			return 1;
+		}
+		
+		/* Encryption /Decryption */
+		if(crd->crd_alg == cesa_ocf_cur_ses->cipher_alg) {
+			/* check that the action is compatible with session */
+			if(encrypt || decrypt) {
+				printk("%s,%d: session mode is not supported.\n", __FILE__, __LINE__);
+				return 1;
+			}
+
+			if(crd->crd_flags & CRD_F_ENCRYPT) { /* encrypt */
+				if( (count == 2) && (cesa_ocf_cur_ses->encrypt_tn_auth) ) {
+					printk("%s,%d: sequence isn't supported by this session.\n", __FILE__, __LINE__);
+					return 1;
+				}
+				encrypt++;
+			}
+			else { 					/* decrypt */
+				if( (count == 2) && !(cesa_ocf_cur_ses->auth_tn_decrypt) ) {
+					printk("%s,%d: sequence isn't supported by this session.\n", __FILE__, __LINE__);
+					return 1;
+				}
+				decrypt++;
+			}
+
+		}
+		/* Authentication */
+		else if(crd->crd_alg == cesa_ocf_cur_ses->auth_alg) {
+			/* check that the action is compatible with session */
+			if(auth) {
+				printk("%s,%d: session mode is not supported.\n", __FILE__, __LINE__);
+				return 1;
+			}
+			if( (count == 2) && (decrypt) && (cesa_ocf_cur_ses->auth_tn_decrypt)) {
+				printk("%s,%d: sequence isn't supported by this session.\n", __FILE__, __LINE__);
+				return 1;
+			}
+			if( (count == 2) && (encrypt) && !(cesa_ocf_cur_ses->encrypt_tn_auth)) {
+				printk("%s,%d: sequence isn't supported by this session.\n", __FILE__, __LINE__);
+				return 1;
+			}
+			auth++;
+		} 
+		else {
+			printk("%s,%d: Alg isn't supported by this session.\n", __FILE__, __LINE__);
+			return 1;
+		}
+	}
+	return 0;
+
+}
+#endif
+
+/*
+ * Process a request.
+ */
+static int 
+cesa_ocf_process(device_t dev, struct cryptop *crp, int hint)
+{
+	struct cesa_ocf_process *cesa_ocf_cmd = NULL;
+	struct cesa_ocf_process *cesa_ocf_cmd_wa = NULL;
+	MV_CESA_COMMAND	*cesa_cmd;
+	struct cryptodesc *crd;
+	struct cesa_ocf_data *cesa_ocf_cur_ses;
+	int sid = 0, temp_len = 0, i;
+	int encrypt = 0, decrypt = 0, auth = 0;
+	int  status;
+	struct sk_buff *skb = NULL;
+	struct uio *uiop = NULL;
+	unsigned char *ivp;
+	MV_BUF_INFO *p_buf_info;	
+	MV_CESA_MBUF *p_mbuf_info;
+	unsigned long flags;
+
+        dprintk("%s()\n", __FUNCTION__);
+
+	if( cesaReqResources <= 1 ) {
+                dprintk("%s,%d: ERESTART\n", __FILE__, __LINE__);
+                return ERESTART;
+	}
+
+#ifdef RT_DEBUG
+        /* Sanity check */
+        if (crp == NULL) {
+                printk("%s,%d: EINVAL\n", __FILE__, __LINE__);
+                return EINVAL;
+        }
+
+        if (crp->crp_desc == NULL || crp->crp_buf == NULL ) {
+                printk("%s,%d: EINVAL\n", __FILE__, __LINE__);
+                crp->crp_etype = EINVAL;
+                return EINVAL;
+        }
+
+        sid = crp->crp_sid & 0xffffffff;
+        if ((sid >= CESA_OCF_MAX_SES) || (cesa_ocf_sessions[sid] == NULL)) {
+                crp->crp_etype = ENOENT;
+                printk("%s,%d: ENOENT session %d \n", __FILE__, __LINE__, sid);
+                return EINVAL;
+        }
+#endif
+
+	sid = crp->crp_sid & 0xffffffff;
+	crp->crp_etype = 0;
+	cesa_ocf_cur_ses = cesa_ocf_sessions[sid];
+
+#ifdef RT_DEBUG
+	if(ocf_check_action(crp, cesa_ocf_cur_ses)){
+		goto p_error;
+	}
+#endif
+
+	/* malloc a new  cesa process */	
+	cesa_ocf_cmd = kmalloc(sizeof(struct cesa_ocf_process), GFP_ATOMIC);
+	
+        if (cesa_ocf_cmd == NULL) {
+            	printk("%s,%d: ENOBUFS \n", __FILE__, __LINE__);
+            	goto p_error;
+      	}
+	memset(cesa_ocf_cmd, 0, sizeof(struct cesa_ocf_process));
+
+	/* init cesa_process */
+	cesa_ocf_cmd->crp = crp;
+	/* always call callback */
+	cesa_ocf_cmd->need_cb = 1;
+
+	/* init cesa_cmd for usage of the HALs */
+	cesa_cmd = &cesa_ocf_cmd->cesa_cmd;
+	cesa_cmd->pReqPrv = (void *)cesa_ocf_cmd;
+	cesa_cmd->sessionId = cesa_ocf_cur_ses->sid_encrypt; /* defualt use encrypt */
+
+	/* prepare src buffer 	*/
+	/* we send the entire buffer to the HAL, even if only part of it should be encrypt/auth.  */
+	/* if not using seesions for both encrypt and auth, then it will be wiser to to copy only */
+	/* from skip to crd_len. 								  */
+	p_buf_info = cesa_ocf_cmd->cesa_bufs;	
+	p_mbuf_info = &cesa_ocf_cmd->cesa_mbuf;
+
+	p_buf_info += 2; /* save 2 first buffers for IV and digest - 
+			    we won't append them to the end since, they 
+			    might be places in an unaligned addresses. */
+	
+	p_mbuf_info->pFrags = p_buf_info;
+	temp_len = 0;
+
+	/* handle SKB */
+	if (crp->crp_flags & CRYPTO_F_SKBUF) {
+		
+		dprintk("%s,%d: handle SKB.\n", __FILE__, __LINE__);
+		skb = (struct sk_buff *) crp->crp_buf;
+
+                if (skb_shinfo(skb)->nr_frags >= (MV_CESA_MAX_MBUF_FRAGS - 1)) {
+                        printk("%s,%d: %d nr_frags > MV_CESA_MAX_MBUF_FRAGS", __FILE__, __LINE__, skb_shinfo(skb)->nr_frags);
+                        goto p_error;
+                }
+
+		p_mbuf_info->mbufSize = skb->len;
+		temp_len = skb->len;
+        	/* first skb fragment */
+        	p_buf_info->bufSize = skb_headlen(skb);
+        	p_buf_info->bufVirtPtr = skb->data;
+		p_buf_info++;
+
+        	/* now handle all other skb fragments */
+        	for ( i = 0; i < skb_shinfo(skb)->nr_frags; i++ ) {
+            		skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
+            		p_buf_info->bufSize = frag->size;
+            		p_buf_info->bufVirtPtr = page_address(frag->page) + frag->page_offset;
+            		p_buf_info++;
+        	}
+        	p_mbuf_info->numFrags = skb_shinfo(skb)->nr_frags + 1;
+	}
+	/* handle UIO */
+	else if(crp->crp_flags & CRYPTO_F_IOV) {
+	
+		dprintk("%s,%d: handle UIO.\n", __FILE__, __LINE__);
+		uiop = (struct uio *) crp->crp_buf;
+
+                if (uiop->uio_iovcnt > (MV_CESA_MAX_MBUF_FRAGS - 1)) {
+                        printk("%s,%d: %d uio_iovcnt > MV_CESA_MAX_MBUF_FRAGS \n", __FILE__, __LINE__, uiop->uio_iovcnt);
+                        goto p_error;
+                }
+
+		p_mbuf_info->mbufSize = crp->crp_ilen;
+		p_mbuf_info->numFrags = uiop->uio_iovcnt;
+		for(i = 0; i < uiop->uio_iovcnt; i++) {
+			p_buf_info->bufVirtPtr = uiop->uio_iov[i].iov_base;
+			p_buf_info->bufSize = uiop->uio_iov[i].iov_len;
+			temp_len += p_buf_info->bufSize;
+			dprintk("%s,%d: buf %x-> addr %x, size %x \n"
+				, __FILE__, __LINE__, i, (unsigned int)p_buf_info->bufVirtPtr, p_buf_info->bufSize);
+			p_buf_info++;			
+		}
+
+	}
+	/* handle CONTIG */
+	else {
+		dprintk("%s,%d: handle CONTIG.\n", __FILE__, __LINE__); 
+		p_mbuf_info->numFrags = 1;
+		p_mbuf_info->mbufSize = crp->crp_ilen;
+		p_buf_info->bufVirtPtr = crp->crp_buf;
+		p_buf_info->bufSize = crp->crp_ilen;
+		temp_len = crp->crp_ilen;
+		p_buf_info++;
+	}
+	
+	/* Support up to 64K why? cause! */
+	if(crp->crp_ilen > 64*1024) {
+		printk("%s,%d: buf too big %x \n", __FILE__, __LINE__, crp->crp_ilen);
+		goto p_error;
+	}
+
+	if( temp_len != crp->crp_ilen ) {
+		printk("%s,%d: warning size don't match.(%x %x) \n", __FILE__, __LINE__, temp_len, crp->crp_ilen);
+	}	
+
+	cesa_cmd->pSrc = p_mbuf_info;
+	cesa_cmd->pDst = p_mbuf_info;
+	
+	/* restore p_buf_info to point to first available buf */
+	p_buf_info = cesa_ocf_cmd->cesa_bufs;	
+	p_buf_info += 1; 
+
+
+        /* Go through crypto descriptors, processing as we go */
+        for (crd = crp->crp_desc; crd; crd = crd->crd_next) {
+		
+		/* Encryption /Decryption */
+		if(crd->crd_alg == cesa_ocf_cur_ses->cipher_alg) {
+
+			dprintk("%s,%d: cipher", __FILE__, __LINE__);
+
+			cesa_cmd->cryptoOffset = crd->crd_skip;
+    	              	cesa_cmd->cryptoLength = crd->crd_len;
+
+			if(crd->crd_flags & CRD_F_ENCRYPT) { /* encrypt */
+				dprintk(" encrypt \n");
+				encrypt++;
+
+				/* handle IV */
+				if (crd->crd_flags & CRD_F_IV_EXPLICIT) {  /* IV from USER */
+					dprintk("%s,%d: IV from USER (offset %x) \n", __FILE__, __LINE__, crd->crd_inject);
+					cesa_cmd->ivFromUser = 1;
+					ivp = crd->crd_iv;
+
+                                	/*
+                                 	 * do we have to copy the IV back to the buffer ?
+                                 	 */
+                                	if ((crd->crd_flags & CRD_F_IV_PRESENT) == 0) {
+						dprintk("%s,%d: copy the IV back to the buffer\n", __FILE__, __LINE__);
+						cesa_cmd->ivOffset = crd->crd_inject;
+                                        	if (crp->crp_flags & CRYPTO_F_SKBUF)
+                                                	skb_copy_bits_back(skb, crd->crd_inject, ivp, cesa_ocf_cur_ses->ivlen);
+                                        	else if (crp->crp_flags & CRYPTO_F_IOV)
+                                                	cuio_copyback(uiop,crd->crd_inject, cesa_ocf_cur_ses->ivlen,(caddr_t)ivp);
+						else
+							memcpy(crp->crp_buf + crd->crd_inject, ivp, cesa_ocf_cur_ses->ivlen);
+                                	}
+					else {
+						dprintk("%s,%d: don't copy the IV back to the buffer \n", __FILE__, __LINE__);
+						p_mbuf_info->numFrags++;
+						p_mbuf_info->mbufSize += cesa_ocf_cur_ses->ivlen; 
+						p_mbuf_info->pFrags = p_buf_info;
+
+						p_buf_info->bufVirtPtr = ivp;
+						p_buf_info->bufSize = cesa_ocf_cur_ses->ivlen; 
+						p_buf_info--;
+
+						/* offsets */
+						cesa_cmd->ivOffset = 0;
+						cesa_cmd->cryptoOffset += cesa_ocf_cur_ses->ivlen;
+						if(auth) {
+							cesa_cmd->macOffset += cesa_ocf_cur_ses->ivlen;
+							cesa_cmd->digestOffset += cesa_ocf_cur_ses->ivlen; 
+						}	
+					}
+                                }
+				else {					/* random IV */
+					dprintk("%s,%d: random IV \n", __FILE__, __LINE__);
+					cesa_cmd->ivFromUser = 0;
+
+                                	/*
+                                 	 * do we have to copy the IV back to the buffer ?
+                                 	 */
+					/* in this mode the HAL will always copy the IV */
+					/* given by the session to the ivOffset  	*/
+					if ((crd->crd_flags & CRD_F_IV_PRESENT) == 0) {
+						cesa_cmd->ivOffset = crd->crd_inject;
+					} 
+					else {
+						/* if IV isn't copy, then how will the user know which IV did we use??? */
+						printk("%s,%d: EINVAL\n", __FILE__, __LINE__);
+						goto p_error; 
+					}
+				}
+			}
+			else { 					/* decrypt */
+				dprintk(" decrypt \n");
+				decrypt++;
+				cesa_cmd->sessionId = cesa_ocf_cur_ses->sid_decrypt;
+
+				/* handle IV */
+				if (crd->crd_flags & CRD_F_IV_EXPLICIT) {
+					dprintk("%s,%d: IV from USER \n", __FILE__, __LINE__);
+					/* append the IV buf to the mbuf */
+					cesa_cmd->ivFromUser = 1;	
+					p_mbuf_info->numFrags++;
+					p_mbuf_info->mbufSize += cesa_ocf_cur_ses->ivlen; 
+					p_mbuf_info->pFrags = p_buf_info;
+
+					p_buf_info->bufVirtPtr = crd->crd_iv;
+					p_buf_info->bufSize = cesa_ocf_cur_ses->ivlen; 
+					p_buf_info--;
+
+					/* offsets */
+					cesa_cmd->ivOffset = 0;
+					cesa_cmd->cryptoOffset += cesa_ocf_cur_ses->ivlen;
+					if(auth) {
+						cesa_cmd->macOffset += cesa_ocf_cur_ses->ivlen;
+						cesa_cmd->digestOffset += cesa_ocf_cur_ses->ivlen; 
+					}
+                                }
+				else {
+					dprintk("%s,%d: IV inside the buffer \n", __FILE__, __LINE__);
+					cesa_cmd->ivFromUser = 0;
+					cesa_cmd->ivOffset = crd->crd_inject;
+				}
+			}
+
+		}
+		/* Authentication */
+		else if(crd->crd_alg == cesa_ocf_cur_ses->auth_alg) {
+			dprintk("%s,%d:  Authentication \n", __FILE__, __LINE__);
+			auth++;
+			cesa_cmd->macOffset = crd->crd_skip;
+			cesa_cmd->macLength = crd->crd_len;
+
+			/* digest + mac */
+			cesa_cmd->digestOffset = crd->crd_inject;
+		} 
+		else {
+			printk("%s,%d: Alg isn't supported by this session.\n", __FILE__, __LINE__);
+			goto p_error;
+		}
+	}
+
+	dprintk("\n");
+	dprintk("%s,%d: Sending Action: \n", __FILE__, __LINE__);
+	dprintk("%s,%d: IV from user: %d. IV offset %x \n",  __FILE__, __LINE__, cesa_cmd->ivFromUser, cesa_cmd->ivOffset);
+	dprintk("%s,%d: crypt offset %x len %x \n", __FILE__, __LINE__, cesa_cmd->cryptoOffset, cesa_cmd->cryptoLength);
+	dprintk("%s,%d: Auth offset %x len %x \n", __FILE__, __LINE__, cesa_cmd->macOffset, cesa_cmd->macLength);
+	dprintk("%s,%d: set digest in offset %x . \n", __FILE__, __LINE__, cesa_cmd->digestOffset);
+	if(debug) {
+		mvCesaDebugMbuf("SRC BUFFER", cesa_cmd->pSrc, 0, cesa_cmd->pSrc->mbufSize);
+	}
+
+
+	/* send action to HAL */
+	spin_lock_irqsave(&cesa_lock, flags);
+	status = mvCesaAction(cesa_cmd);
+	spin_unlock_irqrestore(&cesa_lock, flags);
+
+	/* action not allowed */
+	if(status == MV_NOT_ALLOWED) {
+#ifdef CESA_OCF_SPLIT
+		/* if both encrypt and auth try to split */
+		if(auth && (encrypt || decrypt)) {
+			MV_CESA_COMMAND	*cesa_cmd_wa;
+
+			/* malloc a new cesa process and init it */	
+			cesa_ocf_cmd_wa = kmalloc(sizeof(struct cesa_ocf_process), GFP_ATOMIC);
+	
+        		if (cesa_ocf_cmd_wa == NULL) {
+            			printk("%s,%d: ENOBUFS \n", __FILE__, __LINE__);
+            			goto p_error;
+      			}
+			memcpy(cesa_ocf_cmd_wa, cesa_ocf_cmd, sizeof(struct cesa_ocf_process));
+			cesa_cmd_wa = &cesa_ocf_cmd_wa->cesa_cmd;
+			cesa_cmd_wa->pReqPrv = (void *)cesa_ocf_cmd_wa;
+			cesa_ocf_cmd_wa->need_cb = 0;
+
+			/* break requests to two operation, first operation completion won't call callback */
+			if((decrypt) && (cesa_ocf_cur_ses->auth_tn_decrypt)) {
+				cesa_cmd_wa->sessionId = cesa_ocf_cur_ses->frag_wa_auth;
+				cesa_cmd->sessionId = cesa_ocf_cur_ses->frag_wa_decrypt;
+			}
+			else if((decrypt) && !(cesa_ocf_cur_ses->auth_tn_decrypt)) {
+				cesa_cmd_wa->sessionId = cesa_ocf_cur_ses->frag_wa_decrypt;
+				cesa_cmd->sessionId = cesa_ocf_cur_ses->frag_wa_auth;
+			}
+			else if((encrypt) && (cesa_ocf_cur_ses->encrypt_tn_auth)) {
+				cesa_cmd_wa->sessionId = cesa_ocf_cur_ses->frag_wa_encrypt;
+				cesa_cmd->sessionId = cesa_ocf_cur_ses->frag_wa_auth;
+			}
+			else if((encrypt) && !(cesa_ocf_cur_ses->encrypt_tn_auth)){
+				cesa_cmd_wa->sessionId = cesa_ocf_cur_ses->frag_wa_auth;
+				cesa_cmd->sessionId = cesa_ocf_cur_ses->frag_wa_encrypt;
+			}
+			else {
+				printk("%s,%d: Unsupporterd fragment wa mode \n", __FILE__, __LINE__);
+            			goto p_error;
+			}
+
+			/* send the 2 actions to the HAL */
+			spin_lock_irqsave(&cesa_lock, flags);
+			status = mvCesaAction(cesa_cmd_wa);
+			spin_unlock_irqrestore(&cesa_lock, flags);
+
+			if((status != MV_NO_MORE) && (status != MV_OK)) {
+				printk("%s,%d: cesa action failed, status = 0x%x\n", __FILE__, __LINE__, status);
+				goto p_error;
+			}
+			spin_lock_irqsave(&cesa_lock, flags);
+			status = mvCesaAction(cesa_cmd);
+			spin_unlock_irqrestore(&cesa_lock, flags);
+
+		}
+		/* action not allowed and can't split */
+		else 
+#endif
+		{
+			goto p_error;
+		}
+	}
+
+	/* Hal Q is full, send again. This should never happen */
+	if(status == MV_NO_RESOURCE) {
+		printk("%s,%d: cesa no more resources \n", __FILE__, __LINE__);
+		if(cesa_ocf_cmd)
+			kfree(cesa_ocf_cmd);
+		if(cesa_ocf_cmd_wa)
+			kfree(cesa_ocf_cmd_wa);
+		return ERESTART;
+	} 
+	else if((status != MV_NO_MORE) && (status != MV_OK)) {
+                printk("%s,%d: cesa action failed, status = 0x%x\n", __FILE__, __LINE__, status);
+		goto p_error;
+        }
+
+
+#ifdef CESA_OCF_POLLING
+	cesa_interrupt_polling();
+#endif
+	cesaTestTraceAdd(5);
+
+	return 0;
+p_error:
+	crp->crp_etype = EINVAL;
+	if(cesa_ocf_cmd)
+		kfree(cesa_ocf_cmd);
+	if(cesa_ocf_cmd_wa)
+		kfree(cesa_ocf_cmd_wa);
+       	return EINVAL;
+}
+
+/*
+ * cesa callback. 
+ */
+static void
+cesa_callback(unsigned long dummy)
+{
+	struct cesa_ocf_process *cesa_ocf_cmd = NULL;
+	struct cryptop 		*crp = NULL;
+	MV_CESA_RESULT  	result[MV_CESA_MAX_CHAN];
+	int 			res_idx = 0,i;
+	MV_STATUS               status;
+
+	dprintk("%s()\n", __FUNCTION__);
+
+#ifdef CESA_OCF_TASKLET
+	disable_irq(mv_crypto_irq_get());
+#endif
+    while(MV_TRUE) {
+	
+		 /* Get Ready requests */
+		spin_lock(&cesa_lock);
+		status = mvCesaReadyGet(&result[res_idx]);
+		spin_unlock(&cesa_lock);
+
+	        cesaTestTraceAdd(2);	
+
+		    if(status != MV_OK) {
+#ifdef CESA_OCF_POLLING
+		        if(status == MV_BUSY) { /* Fragment */
+			        cesa_interrupt_polling();
+			        return;
+		        }
+#endif
+	    	    break;
+    	    }
+	        res_idx++;
+		    break;
+	    }
+	
+	for(i = 0; i < res_idx; i++) {
+
+		if(!result[i].pReqPrv) {
+			printk("%s,%d: warning private is NULL\n", __FILE__, __LINE__);
+			break;
+		}
+
+		cesa_ocf_cmd = result[i].pReqPrv;
+		crp = cesa_ocf_cmd->crp; 
+
+		// ignore HMAC error.
+		//if(result->retCode)
+		//	crp->crp_etype = EIO;	
+	
+#if  defined(CESA_OCF_POLLING) 
+		if(!cesa_ocf_cmd->need_cb){
+			cesa_interrupt_polling();
+		}	
+#endif
+		if(cesa_ocf_cmd->need_cb) {
+			if(debug) {
+				mvCesaDebugMbuf("DST BUFFER", cesa_ocf_cmd->cesa_cmd.pDst, 0, cesa_ocf_cmd->cesa_cmd.pDst->mbufSize);
+			}
+			crypto_done(crp);
+		}
+		kfree(cesa_ocf_cmd);
+    	}
+#ifdef CESA_OCF_TASKLET
+	enable_irq(mv_crypto_irq_get());
+#endif
+
+	cesaTestTraceAdd(3);
+
+	return;
+}
+
+#ifdef CESA_OCF_POLLING
+static void
+cesa_interrupt_polling(void)
+{
+        u32                  	cause;
+
+	dprintk("%s()\n", __FUNCTION__);
+
+  	/* Read cause register */
+	do {
+		cause = MV_REG_READ(MV_CESA_ISR_CAUSE_REG);
+		cause &= MV_CESA_CAUSE_ACC_DMA_ALL_MASK;
+
+	} while (cause == 0);
+		
+	/* clear interrupts */
+    	MV_REG_WRITE(MV_CESA_ISR_CAUSE_REG, 0);
+
+	cesa_callback(0);
+
+	return;
+}
+
+#endif
+
+/*
+ * cesa Interrupt polling routine.
+ */
+static irqreturn_t
+cesa_interrupt_handler(int irq, void *arg)
+{
+        u32                  	cause;
+
+	dprintk("%s()\n", __FUNCTION__);
+
+	cesaTestTraceAdd(0);
+
+  	/* Read cause register */
+	cause = MV_REG_READ(MV_CESA_ISR_CAUSE_REG);
+
+    	if( (cause & MV_CESA_CAUSE_ACC_DMA_ALL_MASK) == 0)
+    	{
+        /* Empty interrupt */
+		dprintk("%s,%d: cesaTestReadyIsr: cause=0x%x\n", __FILE__, __LINE__, cause);
+        	return IRQ_HANDLED;
+    	}
+	
+	/* clear interrupts */
+    	MV_REG_WRITE(MV_CESA_ISR_CAUSE_REG, 0);
+
+	cesaTestTraceAdd(1);
+#ifdef CESA_OCF_TASKLET	
+	tasklet_hi_schedule(&cesa_ocf_tasklet);
+#else
+	cesa_callback(0);
+#endif
+	return IRQ_HANDLED;
+}
+
+/*
+ * Open a session.
+ */
+static int 
+/*cesa_ocf_newsession(void *arg, u_int32_t *sid, struct cryptoini *cri)*/
+cesa_ocf_newsession(device_t dev, u_int32_t *sid, struct cryptoini *cri)
+{
+	u32 status = 0, i;
+	u32 count = 0, auth = 0, encrypt =0;
+	struct cesa_ocf_data *cesa_ocf_cur_ses;
+	MV_CESA_OPEN_SESSION cesa_session;
+	MV_CESA_OPEN_SESSION *cesa_ses = &cesa_session;
+
+
+        dprintk("%s()\n", __FUNCTION__);
+        if (sid == NULL || cri == NULL) {
+                printk("%s,%d: EINVAL\n", __FILE__, __LINE__);
+                return EINVAL;
+        }
+
+	/* leave first empty like in other implementations */
+        for (i = 1; i < CESA_OCF_MAX_SES; i++) {
+       		if (cesa_ocf_sessions[i] == NULL)
+               		break;
+	}
+
+	if(i >= CESA_OCF_MAX_SES) {
+		printk("%s,%d: no more sessions \n", __FILE__, __LINE__);
+                return EINVAL;
+	}
+
+        cesa_ocf_sessions[i] = (struct cesa_ocf_data *) kmalloc(sizeof(struct cesa_ocf_data), GFP_ATOMIC);
+        if (cesa_ocf_sessions[i] == NULL) {
+                cesa_ocf_freesession(NULL, i);
+                printk("%s,%d: ENOBUFS \n", __FILE__, __LINE__);
+                return ENOBUFS;
+        }
+	dprintk("%s,%d: new session %d \n", __FILE__, __LINE__, i);
+	
+        *sid = i;
+        cesa_ocf_cur_ses = cesa_ocf_sessions[i];
+        memset(cesa_ocf_cur_ses, 0, sizeof(struct cesa_ocf_data));
+	cesa_ocf_cur_ses->sid_encrypt = -1;
+	cesa_ocf_cur_ses->sid_decrypt = -1;
+	cesa_ocf_cur_ses->frag_wa_encrypt = -1;
+	cesa_ocf_cur_ses->frag_wa_decrypt = -1;
+	cesa_ocf_cur_ses->frag_wa_auth = -1;
+
+	/* init the session */	
+	memset(cesa_ses, 0, sizeof(MV_CESA_OPEN_SESSION));
+	count = 1;
+        while (cri) {	
+		if(count > 2) {
+        		printk("%s,%d: don't support more then 2 operations\n", __FILE__, __LINE__);
+        		goto error;
+		}
+                switch (cri->cri_alg) {
+		case CRYPTO_AES_CBC:
+			dprintk("%s,%d: (%d) AES CBC \n", __FILE__, __LINE__, count);
+			cesa_ocf_cur_ses->cipher_alg = cri->cri_alg;
+			cesa_ocf_cur_ses->ivlen = MV_CESA_AES_BLOCK_SIZE;
+			cesa_ses->cryptoAlgorithm = MV_CESA_CRYPTO_AES;
+			cesa_ses->cryptoMode = MV_CESA_CRYPTO_CBC;
+			if(cri->cri_klen/8 > MV_CESA_MAX_CRYPTO_KEY_LENGTH) {
+        			printk("%s,%d: CRYPTO key too long.\n", __FILE__, __LINE__);
+        			goto error;
+			}
+			memcpy(cesa_ses->cryptoKey, cri->cri_key, cri->cri_klen/8);
+			dprintk("%s,%d: key length %d \n", __FILE__, __LINE__, cri->cri_klen/8);
+			cesa_ses->cryptoKeyLength = cri->cri_klen/8;
+			encrypt += count;
+			break;
+                case CRYPTO_3DES_CBC:
+			dprintk("%s,%d: (%d) 3DES CBC \n", __FILE__, __LINE__, count);
+			cesa_ocf_cur_ses->cipher_alg = cri->cri_alg;
+			cesa_ocf_cur_ses->ivlen = MV_CESA_3DES_BLOCK_SIZE;
+			cesa_ses->cryptoAlgorithm = MV_CESA_CRYPTO_3DES;
+			cesa_ses->cryptoMode = MV_CESA_CRYPTO_CBC;
+			if(cri->cri_klen/8 > MV_CESA_MAX_CRYPTO_KEY_LENGTH) {
+        			printk("%s,%d: CRYPTO key too long.\n", __FILE__, __LINE__);
+        			goto error;
+			}
+			memcpy(cesa_ses->cryptoKey, cri->cri_key, cri->cri_klen/8);
+			cesa_ses->cryptoKeyLength = cri->cri_klen/8;
+			encrypt += count;
+			break;
+                case CRYPTO_DES_CBC:
+			dprintk("%s,%d: (%d) DES CBC \n", __FILE__, __LINE__, count);
+			cesa_ocf_cur_ses->cipher_alg = cri->cri_alg;
+			cesa_ocf_cur_ses->ivlen = MV_CESA_DES_BLOCK_SIZE;
+			cesa_ses->cryptoAlgorithm = MV_CESA_CRYPTO_DES;
+			cesa_ses->cryptoMode = MV_CESA_CRYPTO_CBC;
+			if(cri->cri_klen/8 > MV_CESA_MAX_CRYPTO_KEY_LENGTH) {
+        			printk("%s,%d: CRYPTO key too long.\n", __FILE__, __LINE__);
+        			goto error;
+			}
+			memcpy(cesa_ses->cryptoKey, cri->cri_key, cri->cri_klen/8);
+			cesa_ses->cryptoKeyLength = cri->cri_klen/8;
+			encrypt += count;
+			break;
+                case CRYPTO_MD5:
+                case CRYPTO_MD5_HMAC:
+			dprintk("%s,%d: (%d) %sMD5 CBC \n", __FILE__, __LINE__, count, (cri->cri_alg != CRYPTO_MD5)? "H-":" ");
+                        cesa_ocf_cur_ses->auth_alg = cri->cri_alg;
+			cesa_ocf_cur_ses->digestlen = (cri->cri_alg == CRYPTO_MD5)? MV_CESA_MD5_DIGEST_SIZE : 12;
+			cesa_ses->macMode = (cri->cri_alg == CRYPTO_MD5)? MV_CESA_MAC_MD5 : MV_CESA_MAC_HMAC_MD5;
+			if(cri->cri_klen/8 > MV_CESA_MAX_CRYPTO_KEY_LENGTH) {
+        			printk("%s,%d: MAC key too long. \n", __FILE__, __LINE__);
+        			goto error;
+			}
+			cesa_ses->macKeyLength = cri->cri_klen/8;
+			memcpy(cesa_ses->macKey, cri->cri_key, cri->cri_klen/8);
+			cesa_ses->digestSize = cesa_ocf_cur_ses->digestlen; 
+			auth += count;
+			break;
+                case CRYPTO_SHA1:
+                case CRYPTO_SHA1_HMAC:
+			dprintk("%s,%d: (%d) %sSHA1 CBC \n", __FILE__, __LINE__, count, (cri->cri_alg != CRYPTO_SHA1)? "H-":" ");
+                        cesa_ocf_cur_ses->auth_alg = cri->cri_alg;
+			cesa_ocf_cur_ses->digestlen = (cri->cri_alg == CRYPTO_SHA1)? MV_CESA_SHA1_DIGEST_SIZE : 12; 
+			cesa_ses->macMode = (cri->cri_alg == CRYPTO_SHA1)? MV_CESA_MAC_SHA1 : MV_CESA_MAC_HMAC_SHA1;
+			if(cri->cri_klen/8 > MV_CESA_MAX_CRYPTO_KEY_LENGTH) {
+        			printk("%s,%d: MAC key too long. \n", __FILE__, __LINE__);
+        			goto error;
+			}
+			cesa_ses->macKeyLength = cri->cri_klen/8;
+			memcpy(cesa_ses->macKey, cri->cri_key, cri->cri_klen/8);
+			cesa_ses->digestSize = cesa_ocf_cur_ses->digestlen;
+			auth += count;
+			break;
+                default:
+                        printk("%s,%d: unknown algo 0x%x\n", __FILE__, __LINE__, cri->cri_alg);
+                        goto error;
+                }
+                cri = cri->cri_next;
+		count++;
+        }
+
+	if((encrypt > 2) || (auth > 2)) {
+		printk("%s,%d: session mode is not supported.\n", __FILE__, __LINE__);
+                goto error;
+	}
+	/* create new sessions in HAL */
+	if(encrypt) {
+		cesa_ses->operation = MV_CESA_CRYPTO_ONLY;
+		/* encrypt session */
+		if(auth == 1) {
+			cesa_ses->operation = MV_CESA_MAC_THEN_CRYPTO;
+		}
+		else if(auth == 2) {
+			cesa_ses->operation = MV_CESA_CRYPTO_THEN_MAC;
+			cesa_ocf_cur_ses->encrypt_tn_auth = 1;
+		}
+		else {
+			cesa_ses->operation = MV_CESA_CRYPTO_ONLY;
+		}
+		cesa_ses->direction = MV_CESA_DIR_ENCODE;
+		status = mvCesaSessionOpen(cesa_ses, &cesa_ocf_cur_ses->sid_encrypt);
+    		if(status != MV_OK) {
+        		printk("%s,%d: Can't open new session - status = 0x%x\n", __FILE__, __LINE__, status);
+        		goto error;
+    		}	
+		/* decrypt session */
+		if( cesa_ses->operation == MV_CESA_MAC_THEN_CRYPTO ) {
+			cesa_ses->operation = MV_CESA_CRYPTO_THEN_MAC;
+		}
+		else if( cesa_ses->operation == MV_CESA_CRYPTO_THEN_MAC ) {
+			cesa_ses->operation = MV_CESA_MAC_THEN_CRYPTO;
+		}
+		cesa_ses->direction = MV_CESA_DIR_DECODE;
+		status = mvCesaSessionOpen(cesa_ses, &cesa_ocf_cur_ses->sid_decrypt);
+		if(status != MV_OK) {
+        		printk("%s,%d: Can't open new session - status = 0x%x\n", __FILE__, __LINE__, status);
+        		goto error;
+    		}
+
+		/* preapre one action sessions for case we will need to split an action */
+#ifdef CESA_OCF_SPLIT
+		if(( cesa_ses->operation == MV_CESA_MAC_THEN_CRYPTO ) || 
+			( cesa_ses->operation == MV_CESA_CRYPTO_THEN_MAC )) {
+			/* open one session for encode and one for decode */
+			cesa_ses->operation = MV_CESA_CRYPTO_ONLY;
+			cesa_ses->direction = MV_CESA_DIR_ENCODE;
+			status = mvCesaSessionOpen(cesa_ses, &cesa_ocf_cur_ses->frag_wa_encrypt);
+    			if(status != MV_OK) {
+        			printk("%s,%d: Can't open new session - status = 0x%x\n", __FILE__, __LINE__, status);
+        			goto error;
+    			}
+
+			cesa_ses->direction = MV_CESA_DIR_DECODE;
+			status = mvCesaSessionOpen(cesa_ses, &cesa_ocf_cur_ses->frag_wa_decrypt);
+    			if(status != MV_OK) {
+        			printk("%s,%d: Can't open new session - status = 0x%x\n", __FILE__, __LINE__, status);
+        			goto error;
+    			}
+			/* open one session for auth */	
+			cesa_ses->operation = MV_CESA_MAC_ONLY;
+			cesa_ses->direction = MV_CESA_DIR_ENCODE;
+			status = mvCesaSessionOpen(cesa_ses, &cesa_ocf_cur_ses->frag_wa_auth);
+			if(status != MV_OK) {
+        			printk("%s,%d: Can't open new session - status = 0x%x\n", __FILE__, __LINE__, status);
+				goto error;
+    			}
+		}
+#endif
+	}
+	else { /* only auth */
+		cesa_ses->operation = MV_CESA_MAC_ONLY;
+		cesa_ses->direction = MV_CESA_DIR_ENCODE;
+        	status = mvCesaSessionOpen(cesa_ses, &cesa_ocf_cur_ses->sid_encrypt);
+		if(status != MV_OK) {
+        		printk("%s,%d: Can't open new session - status = 0x%x\n", __FILE__, __LINE__, status);
+			goto error;
+    		}
+	}
+	
+        return 0;
+error:
+     	cesa_ocf_freesession(NULL, *sid);
+      	return EINVAL;	
+
+}
+
+
+/*
+ * Free a session.
+ */
+static int
+cesa_ocf_freesession(device_t dev, u_int64_t tid)
+{
+        struct cesa_ocf_data *cesa_ocf_cur_ses;
+        u_int32_t sid = CRYPTO_SESID2LID(tid);
+	//unsigned long flags;
+
+        dprintk("%s() %d \n", __FUNCTION__, sid);
+        if ( (sid >= CESA_OCF_MAX_SES) || (cesa_ocf_sessions[sid] == NULL) ) {
+                printk("%s,%d: EINVAL can't free session %d \n", __FILE__, __LINE__, sid);
+                return(EINVAL);
+        }
+
+        /* Silently accept and return */
+        if (sid == 0)
+                return(0);
+
+	/* release session from HAL */
+	cesa_ocf_cur_ses = cesa_ocf_sessions[sid];
+     	if (cesa_ocf_cur_ses->sid_encrypt != -1) {
+		mvCesaSessionClose(cesa_ocf_cur_ses->sid_encrypt);
+	}
+	if (cesa_ocf_cur_ses->sid_decrypt != -1) {
+		mvCesaSessionClose(cesa_ocf_cur_ses->sid_decrypt);
+	}
+     	if (cesa_ocf_cur_ses->frag_wa_encrypt != -1) {
+		mvCesaSessionClose(cesa_ocf_cur_ses->frag_wa_encrypt);
+	}
+	if (cesa_ocf_cur_ses->frag_wa_decrypt != -1) {
+		mvCesaSessionClose(cesa_ocf_cur_ses->frag_wa_decrypt);
+	}
+	if (cesa_ocf_cur_ses->frag_wa_auth != -1) {
+		mvCesaSessionClose(cesa_ocf_cur_ses->frag_wa_auth);
+	}
+
+      	kfree(cesa_ocf_cur_ses);
+	cesa_ocf_sessions[sid] = NULL;
+
+        return 0;
+}
+
+extern int crypto_initted;
+extern int crypto_init(void);
+
+/*
+ * our driver startup and shutdown routines
+ */
+/*
+** Address decoding driver.
+*/
+
+static void mv_cesa_set_addr_dec(struct mbus_dram_target_info *dram)
+{
+	int i;
+
+	for (i = 0; i < MV_CESA_TDMA_ADDR_DEC_WIN; i++) {
+		MV_REG_WRITE(MV_CESA_TDMA_BASE_ADDR_REG(i),0);
+		MV_REG_WRITE(MV_CESA_TDMA_WIN_CTRL_REG(i),0);
+	}
+
+	for (i = 0; i < dram->num_cs; i++) {
+		struct mbus_dram_window *cs = dram->cs + i;
+		
+		MV_REG_WRITE(MV_CESA_TDMA_BASE_ADDR_REG(i),cs->base & MV_CESA_TDMA_WIN_BASE_MASK);
+	
+		MV_REG_WRITE(MV_CESA_TDMA_WIN_CTRL_REG(i),((cs->size - 1) & 0xffff0000) | 
+			     (cs->mbus_attr << MV_CESA_TDMA_WIN_ATTR_OFFSET) | 
+			     (dram->mbus_dram_target_id << MV_CESA_TDMA_WIN_TARGET_OFFSET) | 
+			     MV_CESA_TDMA_WIN_ENABLE_MASK);
+	}
+
+	return;
+}
+
+
+static int
+cesa_ocf_init(void)
+{
+	/* we need to make sure crypto_init() called prior any crypto driver */
+	if(!crypto_initted)
+		crypto_init();
+
+	dprintk("%s\n", __FUNCTION__);
+	memset(&mv_cesa_dev, 0, sizeof(mv_cesa_dev));
+	softc_device_init(&mv_cesa_dev, "MV CESA", 0, mv_cesa_methods);
+	cesa_ocf_id = crypto_get_driverid(softc_get_device(&mv_cesa_dev),CRYPTOCAP_F_HARDWARE);
+
+	if (cesa_ocf_id < 0)
+		panic("MV CESA crypto device cannot initialize!");
+
+	dprintk("%s,%d: cesa ocf device id is %d \n", __FILE__, __LINE__, cesa_ocf_id);
+
+	/* CESA unit is auto power on off */
+#if 0
+	if (MV_FALSE == mvCtrlPwrClckGet(CESA_UNIT_ID,0))
+	{
+		printk("\nWarning CESA %d is Powered Off\n",0);
+		return EINVAL;
+	}
+#endif
+
+	if( MV_OK != mvSysCesaInit(CESA_OCF_MAX_SES*5, CESA_Q_SIZE, (char *)mv_crypto_base_get(),
+			mv_crypto_base_get(), NULL) ) {
+            	printk("%s,%d: mvCesaInit Failed. \n", __FILE__, __LINE__);
+		return EINVAL;
+	}
+
+	/* clear and unmask Int */
+	MV_REG_WRITE( MV_CESA_ISR_CAUSE_REG, 0);
+#ifndef CESA_OCF_POLLING
+    	MV_REG_WRITE( MV_CESA_ISR_MASK_REG, MV_CESA_CAUSE_ACC_DMA_MASK);
+#endif
+#ifdef CESA_OCF_TASKLET
+	tasklet_init(&cesa_ocf_tasklet, cesa_callback, (unsigned int) 0);
+#endif
+	/* register interrupt */
+	if( request_irq( mv_crypto_irq_get(), cesa_interrupt_handler,
+                             (IRQF_DISABLED) , "cesa", &cesa_ocf_id) < 0) {
+            	printk("%s,%d: cannot assign irq %x\n", __FILE__, __LINE__, mv_crypto_irq_get());
+		return EINVAL;
+        }
+
+
+	memset(cesa_ocf_sessions, 0, sizeof(struct cesa_ocf_data *) * CESA_OCF_MAX_SES);
+
+	spin_lock_init(&cesa_lock);
+
+#define	REGISTER(alg) \
+	crypto_register(cesa_ocf_id, alg, 0,0)
+	REGISTER(CRYPTO_AES_CBC);
+	REGISTER(CRYPTO_DES_CBC);
+	REGISTER(CRYPTO_3DES_CBC);
+	REGISTER(CRYPTO_MD5);
+	REGISTER(CRYPTO_MD5_HMAC);
+	REGISTER(CRYPTO_SHA1);
+	REGISTER(CRYPTO_SHA1_HMAC);
+#undef REGISTER
+
+	return 0;
+}
+
+static void
+cesa_ocf_exit(void)
+{
+	dprintk("%s()\n", __FUNCTION__);
+
+	crypto_unregister_all(cesa_ocf_id);
+	cesa_ocf_id = -1;
+
+	free_irq(mv_crypto_irq_get(), NULL);
+	
+	/* mask and clear Int */
+	MV_REG_WRITE( MV_CESA_ISR_MASK_REG, 0);
+	MV_REG_WRITE( MV_CESA_ISR_CAUSE_REG, 0);
+    	
+
+	if( MV_OK != mvCesaFinish() ) {
+            	printk("%s,%d: mvCesaFinish Failed. \n", __FILE__, __LINE__);
+		return;
+	}
+}
+
+
+void cesa_ocf_debug(void)
+{
+
+#ifdef CESA_OCF_TRACE_DEBUG
+    {
+        int i, j;
+        j = cesaTestTraceIdx;
+        mvOsPrintf("No  Type   rCause   iCause   Proc   Isr   Res     Time     pReady    pProc    pEmpty\n");
+        for(i=0; i<MV_CESA_TEST_TRACE_SIZE; i++)
+        {
+            mvOsPrintf("%02d.  %d   0x%04x   0x%04x   0x%02x   0x%02x   %02d   0x%06x  %p  %p  %p\n",
+                j, cesaTestTrace[j].type, cesaTestTrace[j].realCause,
+                cesaTestTrace[j].idmaCause, 
+                cesaTestTrace[j].resources, cesaTestTrace[j].timeStamp,
+                cesaTestTrace[j].pReqReady, cesaTestTrace[j].pReqProcess, cesaTestTrace[j].pReqEmpty);
+            j++;
+            if(j == MV_CESA_TEST_TRACE_SIZE)
+                j = 0;
+        }
+    }
+#endif
+
+}
+
+
+
+
+
+static int cesa_ocf_probe(struct platform_device *pdev)
+{
+	struct mv_cesa_addr_dec_platform_data *pd = pdev->dev.platform_data;
+	struct mbus_dram_target_info *dram = pd ? pd->dram : NULL;
+	dprintk("%s\n", __func__);
+	if (dram)
+		mv_cesa_set_addr_dec(dram);
+	return cesa_ocf_init();
+}
+
+static int cesa_ocf_remove(struct platform_device *pdev)
+{
+	dprintk("%s\n", __func__);
+	cesa_ocf_exit();
+	return 0;
+}
+
+
+static int cesa_ocf_suspend(struct platform_device *pdev, pm_message_t state)
+{
+	dprintk("%s\n", __func__);
+
+	/* save registers */
+	cesa_ocf_pm.tdma_ctl = MV_REG_READ(MV_CESA_TDMA_CTRL_REG);
+	cesa_ocf_pm.isr_mask = MV_REG_READ(MV_CESA_ISR_MASK_REG);
+	cesa_ocf_pm.cfg	     = MV_REG_READ(MV_CESA_CFG_REG);
+	cesa_ocf_pm.desc_ptr = MV_REG_READ(MV_CESA_CHAN_DESC_OFFSET_REG);
+
+	/* disable all interrupts */
+	MV_REG_WRITE(MV_CESA_ISR_MASK_REG, 0);
+
+	/* clear interrupts */
+	MV_REG_WRITE(MV_CESA_ISR_CAUSE_REG, 0);
+
+	/* disable tdma */
+	if (cesa_ocf_pm.tdma_ctl & MV_CESA_TDMA_ENABLE_MASK)
+		MV_REG_WRITE(MV_CESA_TDMA_CTRL_REG,
+			cesa_ocf_pm.tdma_ctl &  (~MV_CESA_TDMA_ENABLE_MASK));
+
+	return 0;
+}
+
+static int cesa_ocf_resume(struct platform_device *pdev)
+{
+	struct mv_cesa_addr_dec_platform_data *pd = pdev->dev.platform_data;
+	struct mbus_dram_target_info *dram = pd ? pd->dram : NULL;
+	dprintk("%s\n", __func__);
+	if (dram)
+		mv_cesa_set_addr_dec(dram);
+
+	
+	/* clear interrupts */
+	MV_REG_WRITE(MV_CESA_ISR_CAUSE_REG, 0);
+
+	/* restore registers */
+	MV_REG_WRITE(MV_CESA_CFG_REG, cesa_ocf_pm.cfg);
+	MV_REG_WRITE(MV_CESA_CHAN_DESC_OFFSET_REG, cesa_ocf_pm.desc_ptr);
+	MV_REG_WRITE(MV_CESA_TDMA_CTRL_REG, cesa_ocf_pm.tdma_ctl);
+	MV_REG_WRITE(MV_CESA_ISR_MASK_REG, cesa_ocf_pm.isr_mask);
+
+	return 0;
+}
+
+
+static struct platform_driver cesa_ocf_driver = {
+	.probe		= cesa_ocf_probe,
+	.remove		= cesa_ocf_remove,
+	.suspend	= cesa_ocf_suspend,
+	.resume		= cesa_ocf_resume,
+	.driver		= {
+		.name	= "dove_cesa_ocf",
+	},
+};
+
+static int __init cesa_ocf_modinit(void)
+{
+	dprintk("%s\n", __func__);
+	return platform_driver_register(&cesa_ocf_driver);
+}
+
+static void __exit cesa_ocf_modexit(void)
+{
+	dprintk("%s\n", __func__);
+	platform_driver_unregister(&cesa_ocf_driver);
+}
+
+module_init(cesa_ocf_modinit);
+module_exit(cesa_ocf_modexit);
+
+
+MODULE_LICENSE("Marvell/GPL");
+MODULE_AUTHOR("Ronen Shitrit");
+MODULE_DESCRIPTION("OCF module for Orion CESA crypto");
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_cesa/Kconfig
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_cesa/Kconfig
@@ -0,0 +1,29 @@
+menu "cesa options"
+	depends on MV_INCLUDE_CESA
+
+config  MV_CESA
+	bool "Support for Marvell Cryptographic Engine and Security Acceleration"
+	default y
+
+config	MV_CESA_OCF
+	bool "Support for Marvell CESA OCF driver"
+	depends on MV_CESA && OCF_OCF
+	---help---
+	  Choosing this option will enable you to use the Marvell Cryptographic Engine and
+	  Security Accelerator, under the OCF package.
+
+config  MV_CESA_TOOL
+	tristate "Support for Marvell CESA Tool"
+	depends on MV_CESA
+	---help---
+
+config  MV_CESA_TEST
+	bool "Support for Marvell CESA test driver"
+	depends on MV_CESA_TOOL && !MV_CESA_OCF
+	---help---
+	  Choosing this option will enable you to use the Marvell Cryptographic Engine and
+	  Security Accelerator, with the mv_cesa_tool in test mode.
+
+endmenu
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_cesa/cesa_dev.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_cesa/cesa_dev.h
@@ -0,0 +1,62 @@
+#ifndef _CESA_DEV_H_
+#define _CESA_DEV_H_
+
+/*
+ * common debug for all
+ */
+#if 1
+#define dprintk(a...)	if (debug) { printk(a); } else
+#else
+#define dprintk(a...)
+#endif
+
+typedef enum {
+	MULTI = 0,
+	SIZE,
+	SINGLE,
+	AES,
+	DES,
+	TRI_DES,
+	MD5,
+	SHA1,
+	MAX_CESA_TEST_TYPE	
+} CESA_TEST_TYPE;
+
+typedef struct {
+	CESA_TEST_TYPE 		test;
+	unsigned int	  	iter;		/* How many interation to run */
+	unsigned int	  	req_size;	/* request buffer size */
+	unsigned int		checkmode;	/* check mode: verify or not */
+	unsigned int		session_id; 	/* relevant only for single test */
+	unsigned int		data_id;   	/* relevant only for single test */
+} CESA_TEST;
+
+typedef enum {
+	STATUS = 0,
+	CHAN,
+	QUEUE,
+	SA,
+	CACHE_IDX,
+	SRAM,
+	SAD,
+	TST_REQ,
+	TST_SES,
+    TST_STATS,
+	MAX_CESA_DEBUG_TYPE
+} CESA_DEBUG_TYPE;
+
+typedef struct {
+	CESA_DEBUG_TYPE	debug;
+	unsigned int	index; /* general index */
+	unsigned int	mode;  /* verbos mode */
+	unsigned int 	size;  /* size of buffer */
+} CESA_DEBUG;
+
+
+/*
+ * done against open of /dev/cesa, to get a cloned descriptor.
+ */
+#define	CIOCDEBUG	_IOWR('c', 150, CESA_DEBUG)
+#define	CIOCTEST	_IOWR('c', 151, CESA_TEST)
+
+#endif /* _CESA_DEV_H_ */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_cesa/cesa_dev.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_cesa/cesa_dev.c
@@ -0,0 +1,293 @@
+#include <linux/autoconf.h>
+#include <linux/types.h>
+#include <linux/time.h>
+#include <linux/delay.h>
+#include <linux/list.h>
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/unistd.h>
+#include <linux/module.h>
+#include <linux/wait.h>
+#include <linux/slab.h>
+#include <linux/fs.h>
+#include <linux/file.h>
+#include <linux/miscdevice.h>
+#include <linux/version.h>
+#include <asm/uaccess.h>
+#include <linux/platform_device.h>
+
+
+#include "cesa_dev.h"
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,11)
+#include <linux/syscalls.h>
+#endif
+
+static int debug = 1;
+module_param(debug, int, 0);
+MODULE_PARM_DESC(debug,
+	   "Enable debug");
+
+#ifdef CONFIG_MV_CESA_TEST
+
+static int buf_size = 20000;
+/*MODULE_PARM(buf_size, "i");*/
+module_param(buf_size,int,0644);
+MODULE_PARM_DESC(buf_size, "Size of each data buffer");
+
+static int buf_num = 1;
+/*MODULE_PARM(buf_num, "i");*/
+module_param(buf_num,int,0644);
+
+MODULE_PARM_DESC(buf_num, "Number of data buffers for each request");
+
+extern void cesaTestStart(int bufNum, int bufSize);
+extern void cesaTest(int iter, int reqSize, int checkMode);
+extern void combiTest(int iter, int reqSize, int checkMode);
+extern void cesaOneTest(int testIdx, int caseIdx, int iter, int reqSize, int checkMode);
+extern void multiSizeTest(int idx, int checkMode, int iter, char* inputData);
+extern void aesTest(int iter, int reqSize, int checkMode);
+extern void desTest(int iter, int reqSize, int checkMode);
+extern void tripleDesTest(int iter, int reqSize, int checkMode);
+extern void mdTest(int iter, int reqSize, int checkMode);
+extern void shaTest(int iter, int reqSize, int checkMode);
+
+int run_cesa_test(CESA_TEST *cesa_test)
+{
+	switch(cesa_test->test){
+		case(MULTI):
+			combiTest(cesa_test->iter, cesa_test->req_size, cesa_test->checkmode);
+			break;
+		case(SIZE):
+                        multiSizeTest(cesa_test->req_size, cesa_test->iter, cesa_test->checkmode, NULL);
+			break;
+		case(SINGLE):
+			cesaOneTest(cesa_test->session_id, cesa_test->data_id, cesa_test->iter, 
+					cesa_test->req_size, cesa_test->checkmode);
+			break;
+		case(AES):
+			aesTest(cesa_test->iter, cesa_test->req_size, cesa_test->checkmode);		
+			break;
+		case(DES):
+			desTest(cesa_test->iter, cesa_test->req_size, cesa_test->checkmode);
+			break;
+		case(TRI_DES):
+			tripleDesTest(cesa_test->iter, cesa_test->req_size, cesa_test->checkmode);
+			break;
+		case(MD5):
+                        mdTest(cesa_test->iter, cesa_test->req_size, cesa_test->checkmode);
+                        break;
+		case(SHA1):
+                        shaTest(cesa_test->iter, cesa_test->req_size, cesa_test->checkmode);
+                        break;
+		default:
+			dprintk("%s(unknown test 0x%x)\n", __FUNCTION__, cesa_test->test);
+			return -EINVAL;
+	}
+	return 0;
+}
+#endif /* CONFIG_MV_CESA_TEST */
+
+extern void    		mvCesaDebugSAD(int mode);
+extern void    		mvCesaDebugSA(short sid, int mode);
+extern void    		mvCesaDebugQueue(int mode);
+extern void    		mvCesaDebugStatus(void);
+extern void    		mvCesaDebugSram(int mode);
+extern void    		cesaTestPrintReq(int req, int offset, int size);
+extern void	   	    cesaTestPrintSession(int idx);
+extern void	   	    cesaTestPrintStatus(void);
+
+#ifdef CONFIG_MV_CESA_OCF
+extern void 		cesa_ocf_debug(void);
+#endif
+
+int run_cesa_debug(CESA_DEBUG *cesa_debug)
+{
+	int error = 0;
+	switch(cesa_debug->debug){
+		case(STATUS):
+#ifdef CONFIG_MV_CESA_OCF
+			printk("\n_____________________________\n");
+			cesa_ocf_debug();
+			printk("\n_____________________________\n");
+#endif
+			mvCesaDebugStatus();
+			break;
+		case(QUEUE):
+			mvCesaDebugQueue(cesa_debug->mode);
+			break;
+		case(SA):
+			mvCesaDebugSA(cesa_debug->index, cesa_debug->mode);
+			break;
+		case(SRAM):
+			mvCesaDebugSram(cesa_debug->mode);
+			break;
+		case(SAD):
+			mvCesaDebugSAD(cesa_debug->mode);
+			break;
+
+#ifdef CONFIG_MV_CESA_TEST
+		case(TST_REQ):
+			cesaTestPrintReq(cesa_debug->index, 0, cesa_debug->size);
+			break;
+		case(TST_SES):
+			cesaTestPrintSession(cesa_debug->index);
+			break;
+        case(TST_STATS):
+            cesaTestPrintStatus();
+            break;
+#endif /* CONFIG_MV_CESA_TEST */
+
+		default:
+			dprintk("%s(unknown debug 0x%x)\n", __FUNCTION__, cesa_debug->debug);
+			error = EINVAL;
+			break;
+
+	}
+
+	return(-error);
+}
+
+
+static int
+cesadev_ioctl(
+	struct inode *inode,
+	struct file *filp,
+	unsigned int cmd,
+	unsigned long arg)
+{	
+	CESA_DEBUG cesa_debug;
+	u32 error = 0;
+
+	dprintk("%s: cmd=0x%x, CIOCDEBUG=0x%x, CIOCTEST=0x%x\n", 
+                __FUNCTION__, cmd, CIOCDEBUG, CIOCTEST);
+
+	switch (cmd) {
+	case CIOCDEBUG:
+		if(copy_from_user(&cesa_debug, (void*)arg, sizeof(CESA_DEBUG)))
+				error = -EFAULT;
+		dprintk("%s(CIOCDEBUG): debug %d index %d mode %d size %d\n", 
+			__FUNCTION__, cesa_debug.debug, cesa_debug.index, cesa_debug.mode, cesa_debug.size);
+		error = run_cesa_debug(&cesa_debug);
+		break;
+
+#ifdef CONFIG_MV_CESA_TEST
+    case CIOCTEST:
+		{
+		CESA_TEST cesa_test;
+
+		if(copy_from_user(&cesa_test, (void*)arg, sizeof(CESA_TEST)))
+			error = -EFAULT;
+		dprintk("%s(CIOCTEST): test %d iter %d req_size %d checkmode %d sess_id %d data_id %d \n", 
+			__FUNCTION__, cesa_test.test, cesa_test.iter, cesa_test.req_size, cesa_test.checkmode,
+			cesa_test.session_id, cesa_test.data_id );
+		error = run_cesa_test(&cesa_test);
+		}
+		break;
+#endif /* CONFIG_MV_CESA_TEST */
+
+	default:
+		dprintk("%s (unknown ioctl 0x%x)\n", __FUNCTION__, cmd);
+		error = EINVAL;
+		break;
+	}
+	return(-error);
+}
+
+
+static int
+cesadev_open(struct inode *inode, struct file *filp)
+{
+	dprintk("%s()\n", __FUNCTION__);
+	return(0);
+}
+
+static int
+cesadev_release(struct inode *inode, struct file *filp)
+{
+	dprintk("%s()\n", __FUNCTION__);
+	return(0);
+}
+
+
+static struct file_operations cesadev_fops = {
+	.owner = THIS_MODULE,
+	.open = cesadev_open,
+	.release = cesadev_release,
+	.ioctl = cesadev_ioctl,
+};
+
+static struct miscdevice cesadev = {
+	.minor = CESADEV_MINOR,
+	.name = "cesa",
+	.fops = &cesadev_fops,
+};
+
+static int
+cesadev_init(void)
+{
+	int rc;
+
+#ifdef CONFIG_MV_CESA_TEST
+    cesaTestStart(buf_num, buf_size);
+#endif
+
+	dprintk("%s(%p)\n", __FUNCTION__, cesadev_init);
+	rc = misc_register(&cesadev);
+	if (rc) {
+		printk(KERN_ERR "cesadev: registration of /dev/cesadev failed\n");
+		return(rc);
+	}
+	return(0);
+}
+
+static void
+cesadev_exit(void)
+{
+	dprintk("%s()\n", __FUNCTION__);
+	misc_deregister(&cesadev);
+}
+
+
+static int cesadev_probe(struct platform_device *pdev)
+{
+	dprintk("%s\n", __func__);
+	return cesadev_init();
+}
+
+static int cesadev_remove(struct platform_device *pdev)
+{
+	dprintk("%s\n", __func__);
+	cesadev_exit();
+	return 0;
+}
+
+
+
+static struct platform_driver cesadev_driver = {
+	.probe		= cesadev_probe,
+	.remove		= cesadev_remove,
+	.driver		= {
+		.name	= "dove_cesadev",
+	},
+};
+
+static int __init cesadev_modinit(void)
+{
+	dprintk("%s\n", __func__);
+	return platform_driver_register(&cesadev_driver);
+}
+
+static void __exit cesadev_modexit(void)
+{
+	dprintk("%s\n", __func__);
+	platform_driver_unregister(&cesadev_driver);
+}
+
+module_init(cesadev_modinit);
+module_exit(cesadev_modexit);
+
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Ronen Shitrit");
+MODULE_DESCRIPTION("Cesadev (user interface to CESA)");
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_cesa/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_cesa/Makefile
@@ -0,0 +1,17 @@
+#
+# Makefile for the Marvell CESA driver
+#
+
+ifeq ($(CONFIG_ARCH_DOVE),y)
+include $(srctree)/$(subst ",,$(CONFIG_MV_HAL_RULES_PATH))
+else
+#include $(MV_RULES_PATH)/mvRules.mk
+endif
+
+ifeq ($(CONFIG_MV_CESA_OCF),y)
+EXTRA_CFLAGS    += -I$(srctree)/crypto/ocf
+endif
+
+obj-$(CONFIG_MV_CESA_TOOL) += cesa_dev.o
+obj-$(CONFIG_MV_CESA_OCF)  += cesa_ocf_drv.o
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_audio/mv88fx-pcm.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_audio/mv88fx-pcm.h
@@ -0,0 +1,116 @@
+/*
+ *
+ *	Marvell Orion Alsa Sound driver
+ *
+ *	Author: Maen Suleiman
+ *	Copyright (C) 2008 Marvell Ltd.
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#define DRIVER_NAME	"mv88fx_snd"
+
+//#define MV88FX_SND_DEBUG
+#ifdef MV88FX_SND_DEBUG
+#define mv88fx_snd_debug(fmt, arg...) printk(KERN_DEBUG fmt, ##arg)
+#else
+	#define mv88fx_snd_debug(a...)
+#endif
+
+
+typedef struct {
+	unsigned int base;
+	unsigned int size;
+} _audio_mem_info;
+
+struct mv88fx_snd_stream {
+	struct snd_pcm_substream	*substream;
+        struct device*		dev;
+	int 	direction; 	/* playback or capture */ 
+	#define PLAYBACK	0
+	#define CAPTURE		1
+	unsigned int	dig_mode;	/* i2s,spdif,both*/ 
+	#define I2S		1
+	#define SPDIF		2
+        int	stereo;		/* mono , stereo*/
+        int	mono_mode;	/* both mono, left mono, right mono*/
+	#define MONO_BOTH	0
+	#define MONO_LEFT	1
+	#define MONO_RIGHT	2
+	int	clock_src;
+	#define DCO_CLOCK	0
+	#define SPCR_CLOCK	1
+	#define EXTERN_CLOCK	2
+	int	rate;		
+	int	stat_mem;	/* Channel status source*/
+	int	format;
+        #define SAMPLE_32IN32	0
+	#define SAMPLE_24IN32	1
+	#define SAMPLE_20IN32	2
+	#define SAMPLE_16IN32	3
+	#define SAMPLE_16IN16	4
+	unsigned int	dma_addr;
+	unsigned int	dma_size;
+	unsigned int	period_size;
+	unsigned int spdif_status[4];	/* SPDIF status */
+	unsigned char 	*area;	/* virtual pointer */
+	dma_addr_t 	addr;	/* physical address */
+
+	
+};
+
+struct mv88fx_snd_chip {
+	struct snd_card *card;
+	struct device	*dev;
+	int	port;
+	struct orion_i2s_platform_data	*pdata; /* platform dara*/
+	struct mv88fx_snd_stream	*stream[2];	/* run time values*/
+	struct mv88fx_snd_stream	*stream_defaults[2]; /* default values*/
+        spinlock_t	reg_lock;	/* Register access spinlock */
+	struct resource	*res;		/* resource for IRQ and base*/
+	void __iomem	*base;		/* base address of the host */
+	int	irq;
+	int	loopback;		/* When Loopback is enabled, playback 
+					  data is looped back to be recorded */
+	int	ch_stat_valid;		/* Playback SPDIF channel validity bit 
+					value when REG selected */
+        int	burst;			/* DMA Burst Size */
+
+	#define SPDIF_MEM_STAT		0
+	#define SPDIF_REG_STAT		1
+	unsigned int dco_ctrl_offst;
+	int	pcm_mode;	/* pcm, nonpcm*/
+	#define PCM		0
+	#define NON_PCM		1
+	_audio_mem_info	*mem_array;
+};
+
+#define MV88FX_SND_MIN_PERIODS		8
+#define MV88FX_SND_MAX_PERIODS		16
+#define	MV88FX_SND_MIN_PERIOD_BYTES	0x4000
+#define	MV88FX_SND_MAX_PERIOD_BYTES	0x4000
+
+
+/* read/write registers */
+
+#define mv88fx_snd_writel(chip, offs, val)	\
+		writel((val), (chip->base + offs))
+
+static inline unsigned int mv88fx_snd_readl(struct mv88fx_snd_chip *chip, 
+					   unsigned int offs)
+{
+	unsigned int val = readl((chip->base + offs));
+	return (val);
+}
+#define mv88fx_snd_bitset(chip, offs, bitmask)	\
+		writel( (readl(chip->base + offs) | (bitmask)),	\
+			chip->base + offs)
+
+#define mv88fx_snd_bitreset(chip, offs, bitmask)	\
+		writel( (readl(chip->base + offs) & (~(bitmask))), \
+			chip->base + offs)
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_audio/mv88fx-pcm.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_audio/mv88fx-pcm.c
@@ -0,0 +1,1799 @@
+/*
+ *
+ *	Marvell Orion Alsa Sound driver
+ *
+ *	Author: Maen Suleiman
+ *	Copyright (C) 2008 Marvell Ltd.
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/version.h>
+#include <sound/core.h>
+#include <sound/initval.h>
+#include <sound/control.h>
+#include <sound/pcm.h>
+#include <sound/asoundef.h>
+#include <sound/asound.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)
+#include <sound/driver.h>
+#endif
+#include <linux/dma-mapping.h>
+#include <linux/device.h>
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)
+#include <linux/mbus.h>
+#include <plat/i2s-orion.h>
+#endif
+#include <asm/dma.h>
+#include <asm/io.h>
+#include <asm/scatterlist.h>
+#include <asm/sizes.h>
+#include <mvTypes.h>
+#include "mv88fx-pcm.h"
+/*#define AUDIO_REG_BASE	0x0*/
+#include "audio/mvAudioRegs.h"
+
+int mv88fx_snd_hw_init(struct mv88fx_snd_chip	*chip);
+int mv88fx_snd_hw_playback_set(struct mv88fx_snd_chip	*chip);
+int mv88fx_snd_hw_capture_set(struct mv88fx_snd_chip	*chip);
+
+//struct mv88fx_snd_chip	*chip = NULL;
+/*
+-----------------------------------------------------------------------------
+-----------------------------------------------------------------------------
+-----------------------------------------------------------------------------
+*/
+int test_memory(struct mv88fx_snd_chip *chip,
+		unsigned int base,
+		unsigned int size)
+{
+	unsigned int i;
+
+	for (i=0; i<6; i++) {
+
+		/* check if we get to end */
+		if ((chip->mem_array[i].base == 0) && 
+		   (chip->mem_array[i].size == 0)) 
+			break;
+
+		/* check if we fit into one memory window only */
+		if ((base >= chip->mem_array[i].base) &&
+		   ((base + size) <=  chip->mem_array[i].base + chip->mem_array[i].size))
+			return 1;
+
+	}
+
+	return 0;
+}
+
+
+/*
+-----------------------------------------------------------------------------
+-----------------------------------------------------------------------------
+-----------------------------------------------------------------------------
+*/
+
+
+
+void devdma_hw_free(struct device *dev, struct snd_pcm_substream *substream)
+{
+	struct snd_pcm_runtime *runtime = substream->runtime;
+	struct snd_dma_buffer *buf = runtime->dma_buffer_p;
+
+	if (runtime->dma_area == NULL)
+		return;
+
+	if (buf != &substream->dma_buffer) {
+		kfree(runtime->dma_buffer_p);
+	}
+
+	snd_pcm_set_runtime_buffer(substream, NULL);
+}
+
+int devdma_hw_alloc(struct device *dev, struct snd_pcm_substream *substream, size_t size)
+{
+	struct snd_pcm_runtime *runtime = substream->runtime;
+	struct snd_dma_buffer *buf = runtime->dma_buffer_p;
+	struct mv88fx_snd_stream *audio_stream = runtime->private_data;
+//		snd_pcm_substream_chip(substream); 
+
+	int ret = 0;
+
+	if (buf) {
+		if (buf->bytes >= size) {
+			mv88fx_snd_debug(KERN_ERR "devdma_hw_alloc:buf->bytes >= size\n");
+			goto out;
+		}
+		devdma_hw_free(dev, substream);
+	}
+
+	if (substream->dma_buffer.area != NULL && substream->dma_buffer.bytes >= size) {
+		buf = &substream->dma_buffer;
+	} else {
+		buf = kmalloc(sizeof(struct snd_dma_buffer), GFP_KERNEL);
+		if (!buf) {
+			mv88fx_snd_debug(KERN_ERR "devdma_hw_alloc:buf == NULL\n");
+			goto nomem;
+		}
+
+		buf->dev.type = SNDRV_DMA_TYPE_DEV;
+		buf->dev.dev = dev;
+		buf->area = audio_stream->area;
+		buf->addr = audio_stream->addr;
+		buf->bytes = size;
+		buf->private_data = NULL;
+
+		if (!buf->area) {
+			mv88fx_snd_debug(KERN_ERR "devdma_hw_alloc:buf->area == NULL\n");
+			goto free;
+		}
+	}
+	snd_pcm_set_runtime_buffer(substream, buf);
+	ret = 1;
+ out:
+	runtime->dma_bytes = size;
+	return ret;
+
+ free:
+	kfree(buf);
+ nomem:
+	return -ENOMEM;
+}
+
+int devdma_mmap(struct device *dev, struct snd_pcm_substream *substream, struct vm_area_struct *vma)
+{
+	struct snd_pcm_runtime *runtime = substream->runtime;
+	return dma_mmap_coherent(dev, vma, runtime->dma_area, runtime->dma_addr, runtime->dma_bytes);
+}
+
+
+/*
+-----------------------------------------------------------------------------
+-----------------------------------------------------------------------------
+-----------------------------------------------------------------------------
+*/
+
+/*
+ * hw preparation for spdif
+ */
+
+
+static int mv88fx_snd_spdif_mask_info(struct snd_kcontrol *kcontrol,
+				      struct snd_ctl_elem_info *uinfo)
+{
+	uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
+	uinfo->count = 1;
+	return 0;
+}
+
+static int mv88fx_snd_spdif_mask_get(struct snd_kcontrol *kcontrol,
+				     struct snd_ctl_elem_value *ucontrol)
+{
+	ucontrol->value.iec958.status[0] = 0xff;
+	ucontrol->value.iec958.status[1] = 0xff;
+	ucontrol->value.iec958.status[2] = 0xff;
+	ucontrol->value.iec958.status[3] = 0xff;
+	return 0;
+}
+
+static struct snd_kcontrol_new mv88fx_snd_spdif_mask  =
+{
+	.access =	SNDRV_CTL_ELEM_ACCESS_READ,
+	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
+	.name =		SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
+	.info =		mv88fx_snd_spdif_mask_info,
+	.get =		mv88fx_snd_spdif_mask_get,
+};
+
+static int mv88fx_snd_spdif_stream_info(struct snd_kcontrol *kcontrol,
+					struct snd_ctl_elem_info *uinfo)
+{
+	mv88fx_snd_debug("=>%s\n",__FUNCTION__);
+	uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
+	uinfo->count = 1;
+	return 0;
+}
+
+static int mv88fx_snd_spdif_stream_get(struct snd_kcontrol *kcontrol,
+				       struct snd_ctl_elem_value *ucontrol)
+{
+	struct mv88fx_snd_chip *chip = snd_kcontrol_chip(kcontrol);
+	int i,word;
+
+	mv88fx_snd_debug("=>%s\n",__FUNCTION__);
+	spin_lock_irq(&chip->reg_lock);
+	for (word=0 ; word < 4; word++) {
+		chip->stream[PLAYBACK]->spdif_status[word] = 
+		mv88fx_snd_readl(chip,
+				 MV_AUDIO_SPDIF_PLAY_CH_STATUS_LEFT_REG(chip->port, word));
+		for (i = 0; i < 4; i++)
+			ucontrol->value.iec958.status[word + i] = 
+			(chip->stream[PLAYBACK]->spdif_status[word] >>
+								(i * 8)) & 0xff;
+
+	}
+	spin_unlock_irq(&chip->reg_lock);
+	return 0;
+}
+
+static int mv88fx_snd_spdif_stream_put(struct snd_kcontrol *kcontrol,
+				       struct snd_ctl_elem_value *ucontrol)
+{
+	struct mv88fx_snd_chip *chip = snd_kcontrol_chip(kcontrol);
+	int i, change =0 , word;
+	unsigned int val;
+
+	mv88fx_snd_debug("=>%s\n",__FUNCTION__);
+        val = 0;
+	spin_lock_irq(&chip->reg_lock);
+	for (word=0 ; word < 4; word++) {
+		for (i = 0; i < 4; i++){
+                        chip->stream[PLAYBACK]->spdif_status[word] |= 
+			ucontrol->value.iec958.status[word + i] << (i * 8);
+		}
+		 mv88fx_snd_writel(chip, 
+				   MV_AUDIO_SPDIF_PLAY_CH_STATUS_LEFT_REG(chip->port, word),
+			chip->stream[PLAYBACK]->spdif_status[word]);
+		 
+		 mv88fx_snd_writel(chip, 
+				   MV_AUDIO_SPDIF_PLAY_CH_STATUS_RIGHT_REG(chip->port, word),
+			chip->stream[PLAYBACK]->spdif_status[word]);
+
+	}
+	
+	if (chip->stream[PLAYBACK]->spdif_status[0] & IEC958_AES0_NONAUDIO) {
+                chip->pcm_mode = NON_PCM;
+	}
+	spin_unlock_irq(&chip->reg_lock);
+	return change;
+}
+
+static struct snd_kcontrol_new mv88fx_snd_spdif_stream  =
+{
+	.access =	SNDRV_CTL_ELEM_ACCESS_READWRITE | 
+			SNDRV_CTL_ELEM_ACCESS_INACTIVE,
+	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
+	.name =		SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
+	.info =		mv88fx_snd_spdif_stream_info,
+	.get =		mv88fx_snd_spdif_stream_get,
+	.put =		mv88fx_snd_spdif_stream_put
+};
+
+
+static int mv88fx_snd_spdif_default_info(struct snd_kcontrol *kcontrol,
+					 struct snd_ctl_elem_info *uinfo)
+{
+	mv88fx_snd_debug("=>%s\n",__FUNCTION__);
+	uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
+	uinfo->count = 1;
+	return 0;
+}
+
+static int mv88fx_snd_spdif_default_get(struct snd_kcontrol *kcontrol,
+					struct snd_ctl_elem_value *ucontrol)
+{
+	struct mv88fx_snd_chip *chip = snd_kcontrol_chip(kcontrol);
+	int i,word;
+
+	mv88fx_snd_debug("=>%s\n",__FUNCTION__);
+	spin_lock_irq(&chip->reg_lock);
+	for (word=0 ; word < 4; word++) {
+		chip->stream_defaults[PLAYBACK]->spdif_status[word] = 
+		mv88fx_snd_readl(chip,
+				 MV_AUDIO_SPDIF_PLAY_CH_STATUS_LEFT_REG(chip->port, word));
+		
+                for (i = 0; i < 4; i++)
+			ucontrol->value.iec958.status[word + i] = 
+			(chip->stream_defaults[PLAYBACK]->spdif_status[word] >> 
+								(i * 8)) & 0xff;
+
+	}
+	spin_unlock_irq(&chip->reg_lock);
+	return 0;
+}
+
+static int mv88fx_snd_spdif_default_put(struct snd_kcontrol *kcontrol,
+					 struct snd_ctl_elem_value *ucontrol)
+{
+	struct mv88fx_snd_chip *chip = snd_kcontrol_chip(kcontrol);
+	int i, change = 0, word;
+	unsigned int val;
+
+	mv88fx_snd_debug("=>%s\n",__FUNCTION__);
+        val = 0;
+	spin_lock_irq(&chip->reg_lock);
+	for (word=0 ; word < 4; word++) {
+		for (i = 0; i < 4; i++){
+                        chip->stream_defaults[PLAYBACK]->spdif_status[word] |= 
+			ucontrol->value.iec958.status[word + i] << (i * 8);
+		}
+		 mv88fx_snd_writel(chip, 
+				   MV_AUDIO_SPDIF_PLAY_CH_STATUS_LEFT_REG(chip->port, word),
+			chip->stream_defaults[PLAYBACK]->spdif_status[word]);
+		 mv88fx_snd_writel(chip, 
+				   MV_AUDIO_SPDIF_PLAY_CH_STATUS_RIGHT_REG(chip->port, word),
+			chip->stream_defaults[PLAYBACK]->spdif_status[word]);
+		 
+		 
+	}
+	if (chip->stream_defaults[PLAYBACK]->spdif_status[0] & 
+				IEC958_AES0_NONAUDIO) {
+		chip->pcm_mode = NON_PCM;
+	}
+	
+	spin_unlock_irq(&chip->reg_lock);
+	return change;
+}
+static struct snd_kcontrol_new mv88fx_snd_spdif_default __devinitdata =
+{
+	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
+	.name =		SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
+	.info =		mv88fx_snd_spdif_default_info,
+	.get =		mv88fx_snd_spdif_default_get,
+	.put =		mv88fx_snd_spdif_default_put
+};
+
+
+
+
+/*
+-----------------------------------------------------------------------------
+-----------------------------------------------------------------------------
+-----------------------------------------------------------------------------
+*/
+void cs42l51_vol_get(MV_U8 port, unsigned char *vol_list);
+void cs42l51_vol_set(MV_U8 port, unsigned char *vol_list);
+
+
+static int mv88fx_snd_mixer_vol_info(struct snd_kcontrol *kcontrol, 
+			       struct snd_ctl_elem_info *uinfo)
+{
+	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
+	uinfo->count = 2;
+	uinfo->value.integer.min = 0;
+	uinfo->value.integer.max = 39;
+	return 0;
+}
+
+static int mv88fx_snd_mixer_vol_get(struct snd_kcontrol *kcontrol, 
+				    struct snd_ctl_elem_value *ucontrol)
+{
+	unsigned char mv88fx_snd_vol[2];
+	struct mv88fx_snd_chip *chip = snd_kcontrol_chip(kcontrol);
+
+	cs42l51_vol_get(chip->port, mv88fx_snd_vol);
+	ucontrol->value.integer.value[0] = (long)mv88fx_snd_vol[0];
+	ucontrol->value.integer.value[1] = (long)mv88fx_snd_vol[1];
+	return 0;
+}
+
+static int mv88fx_snd_mixer_vol_put(struct snd_kcontrol *kcontrol, 
+				    struct snd_ctl_elem_value *ucontrol) {
+	unsigned char mv88fx_snd_vol[2];
+	struct mv88fx_snd_chip *chip = snd_kcontrol_chip(kcontrol);
+
+	mv88fx_snd_vol[0] = (unsigned char)ucontrol->value.integer.value[0];
+	mv88fx_snd_vol[1] = (unsigned char)ucontrol->value.integer.value[1];
+	cs42l51_vol_set(chip->port, mv88fx_snd_vol);
+
+	return 0;
+}
+
+static struct snd_kcontrol_new mv88fx_snd_dac_vol =
+{
+	.iface =	SNDRV_CTL_ELEM_IFACE_MIXER,
+	.name =		"Playback DAC Volume",
+	.info =		mv88fx_snd_mixer_vol_info,
+	.get =		mv88fx_snd_mixer_vol_get,
+	.put =		mv88fx_snd_mixer_vol_put
+};
+
+
+/*
+-----------------------------------------------------------------------------
+-----------------------------------------------------------------------------
+-----------------------------------------------------------------------------
+*/
+
+
+struct mv88fx_snd_mixer_enum {
+	char 	**names;	/* enum names*/
+	int	*values;	/* values to be updated*/
+	int 	count;		/* number of elements */
+	void*	rec;		/* field to be updated*/
+};
+
+
+int mv88fx_snd_mixer_enum_info (struct snd_kcontrol * kcontrol, 
+			       struct snd_ctl_elem_info * uinfo)
+{
+	struct mv88fx_snd_mixer_enum	*mixer_enum = 
+		(struct mv88fx_snd_mixer_enum*)kcontrol->private_value;
+
+	uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
+	uinfo->count = 1;
+	uinfo->value.enumerated.items = mixer_enum->count;
+
+	if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
+		uinfo->value.enumerated.item =
+		    uinfo->value.enumerated.items - 1;
+
+	strcpy(uinfo->value.enumerated.name,
+	       mixer_enum->names[uinfo->value.enumerated.item]);
+
+	return 0;
+}
+int mv88fx_snd_mixer_enum_get (struct snd_kcontrol * kcontrol, 
+			      struct snd_ctl_elem_value * ucontrol)
+{
+	struct mv88fx_snd_mixer_enum	*mixer_enum = 
+		(struct mv88fx_snd_mixer_enum*)kcontrol->private_value;
+	int i;
+	unsigned int val;
+
+	val = *(unsigned int*)mixer_enum->rec;
+	
+	for (i=0 ; i<mixer_enum->count ; i++) {
+		
+		if (val ==  (unsigned int)mixer_enum->values[i]) {
+			ucontrol->value.enumerated.item[0] = i;
+			break;
+		}
+	}
+	
+	return 0;
+}
+
+int mv88fx_snd_mixer_enum_put (struct snd_kcontrol * kcontrol, 
+			      struct snd_ctl_elem_value * ucontrol)
+{
+	unsigned int val,*rec;
+	struct mv88fx_snd_mixer_enum	*mixer_enum = 
+		(struct mv88fx_snd_mixer_enum*)kcontrol->private_value;
+	int i;
+
+	rec = (unsigned int*)mixer_enum->rec;
+	val = ucontrol->value.enumerated.item[0];
+
+	if (val < 0)
+		val = 0;
+	if (val > mixer_enum->count)
+		val = mixer_enum->count;
+
+	for (i=0 ; i<mixer_enum->count ; i++) {
+
+		if (val ==  i) {
+			*rec = (unsigned int)mixer_enum->values[i];
+			break;
+		}
+	}
+	
+	return 0;
+}
+
+
+
+#define MV88FX_PCM_MIXER_ENUM(xname, xindex, value)	\
+{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
+  .name = xname, \
+  .index = xindex, \
+  .info = mv88fx_snd_mixer_enum_info, \
+  .get = mv88fx_snd_mixer_enum_get, \
+  .put = mv88fx_snd_mixer_enum_put, \
+  .private_value = (unsigned long)value,	\
+}
+
+char *playback_src_mixer_names[] = {"SPDIF","I2S", "SPDIF And I2S"};
+int playback_src_mixer_values[] = { SPDIF, I2S, (SPDIF|I2S)};
+
+struct mv88fx_snd_mixer_enum playback_src_mixer	= 
+{
+	.names	= playback_src_mixer_names,
+	.values	= playback_src_mixer_values,
+	.count	= 3,
+};
+
+char *playback_mono_mixer_names[] = {"Mono Both","Mono Left", "Mono Right"};
+int playback_mono_mixer_values[] = { MONO_BOTH, MONO_LEFT, MONO_RIGHT};
+
+struct mv88fx_snd_mixer_enum playback_mono_mixer	= 
+{
+	.names	= playback_mono_mixer_names,
+	.values	= playback_mono_mixer_values,
+	.count	= 3,
+};
+
+
+
+
+char *capture_src_mixer_names[] = {"SPDIF","I2S"};
+int capture_src_mixer_values[] = { SPDIF, I2S};
+
+struct mv88fx_snd_mixer_enum capture_src_mixer	= 
+{
+	.names	= capture_src_mixer_names,
+	.values	= capture_src_mixer_values,
+	.count	= 2,
+};
+
+char *capture_mono_mixer_names[] = {"Mono Left", "Mono Right"};
+int capture_mono_mixer_values[] = { MONO_LEFT, MONO_RIGHT};
+
+struct mv88fx_snd_mixer_enum capture_mono_mixer	= 
+{
+	.names	= capture_mono_mixer_names,
+	.values	= capture_mono_mixer_values,
+	.count	= 2,
+};
+
+
+static struct snd_kcontrol_new mv88fx_snd_mixers[] = {
+	MV88FX_PCM_MIXER_ENUM("Playback output type", 0,
+				    &playback_src_mixer), 
+
+	MV88FX_PCM_MIXER_ENUM("Playback mono type", 0,
+				    &playback_mono_mixer), 
+
+	MV88FX_PCM_MIXER_ENUM("Capture input Type", 0,
+				    &capture_src_mixer),
+	
+	MV88FX_PCM_MIXER_ENUM("Capture mono type", 0,
+				    &capture_mono_mixer), 
+
+};
+
+#define	PLAYBACK_MIX_INDX	0
+#define PLAYBACK_MONO_MIX_INDX	1
+#define CAPTURE_MIX_INDX	2
+#define	CAPTURE_MONO_MIX_INDX	3
+
+
+
+static int
+mv88fx_snd_ctrl_new(struct snd_card *card)
+{
+	int err=0;
+	struct mv88fx_snd_chip *chip = card->private_data;
+
+	playback_src_mixer.rec = &chip->stream_defaults[PLAYBACK]->dig_mode;
+	playback_mono_mixer.rec = &chip->stream_defaults[PLAYBACK]->mono_mode;
+	
+	capture_src_mixer.rec = &chip->stream_defaults[CAPTURE]->dig_mode;
+	capture_mono_mixer.rec = &chip->stream_defaults[CAPTURE]->mono_mode;
+
+	if(chip->pdata->i2s_play && chip->pdata->spdif_play) {
+		err = snd_ctl_add(card, snd_ctl_new1(
+					  &mv88fx_snd_mixers[PLAYBACK_MIX_INDX],
+					  chip));
+		if (err < 0)
+			return err;
+	}
+
+	if(chip->pdata->i2s_play || chip->pdata->spdif_play) {
+		err = snd_ctl_add(card, snd_ctl_new1(
+					  &mv88fx_snd_mixers[PLAYBACK_MONO_MIX_INDX],
+					  chip));
+		if (err < 0)
+			return err;
+	}
+
+	if(chip->pdata->i2s_rec && chip->pdata->spdif_rec) {
+		err = snd_ctl_add(card, snd_ctl_new1(
+					  &mv88fx_snd_mixers[CAPTURE_MIX_INDX],
+					  chip));
+		if (err < 0)
+			return err;
+	}
+
+	if(chip->pdata->i2s_rec || chip->pdata->spdif_rec) {
+		err = snd_ctl_add(card, snd_ctl_new1(
+					  &mv88fx_snd_mixers[CAPTURE_MONO_MIX_INDX],
+					  chip));
+		if (err < 0)
+			return err;
+	}
+
+	if(chip->pdata->i2s_play) {
+		err = snd_ctl_add(card, snd_ctl_new1(&mv88fx_snd_dac_vol,
+						     chip));
+		if (err < 0)
+			return err;
+	}
+		
+	if(chip->pdata->spdif_play) {
+		err = snd_ctl_add(card, snd_ctl_new1(&mv88fx_snd_spdif_mask,
+						     chip));
+		if (err < 0)
+			return err;
+	}
+	if(chip->pdata->spdif_play) {
+		err = snd_ctl_add(card, snd_ctl_new1(&mv88fx_snd_spdif_default,
+						     chip));
+		if (err < 0)
+			return err;
+	}
+	if(chip->pdata->spdif_play) {
+		err = snd_ctl_add(card, snd_ctl_new1(&mv88fx_snd_spdif_stream,
+						     chip));
+		if (err < 0)
+			return err;
+	}
+	
+
+	return err;
+}
+
+
+/*
+-----------------------------------------------------------------------------
+-----------------------------------------------------------------------------
+-----------------------------------------------------------------------------
+-----------------------------------------------------------------------------
+-----------------------------------------------------------------------------
+*/
+
+
+
+static struct snd_pcm_hardware mv88fx_snd_capture_hw =
+{
+	.info =			(SNDRV_PCM_INFO_INTERLEAVED |
+				 SNDRV_PCM_INFO_MMAP |
+				 SNDRV_PCM_INFO_MMAP_VALID |
+				 SNDRV_PCM_INFO_BLOCK_TRANSFER |
+				 SNDRV_PCM_INFO_PAUSE ), 
+	.formats =		(SNDRV_PCM_FMTBIT_S16_LE |
+				 SNDRV_PCM_FMTBIT_S24_LE |
+				 SNDRV_PCM_FMTBIT_S32_LE),
+	.rates =		(SNDRV_PCM_RATE_44100 |
+				 SNDRV_PCM_RATE_48000 |
+				 SNDRV_PCM_RATE_96000),
+	.rate_min =		44100,
+	.rate_max =		96000,
+	.channels_min =		1,
+	.channels_max =		2,
+	.buffer_bytes_max =	(16*1024*1024),
+	.period_bytes_min =	MV88FX_SND_MIN_PERIOD_BYTES,
+	.period_bytes_max =	MV88FX_SND_MAX_PERIOD_BYTES,
+	.periods_min =		MV88FX_SND_MIN_PERIODS,
+	.periods_max =		MV88FX_SND_MAX_PERIODS,
+	.fifo_size =		0,
+
+};
+
+
+
+static int
+mv88fx_snd_capture_open(struct snd_pcm_substream * substream)
+{
+	int err;
+	struct mv88fx_snd_chip *chip = substream->private_data;
+
+	mv88fx_snd_debug("=>%s\n",__FUNCTION__);
+	chip->stream_defaults[CAPTURE]->substream = substream;
+	chip->stream_defaults[CAPTURE]->direction = CAPTURE;
+//	substream->private_data = chip->stream_defaults[CAPTURE];
+	substream->runtime->private_data = chip->stream_defaults[CAPTURE];
+	substream->runtime->hw = mv88fx_snd_capture_hw;
+
+	if (chip->stream_defaults[CAPTURE]->dig_mode & SPDIF) {
+		substream->runtime->hw.formats &= ~SNDRV_PCM_FMTBIT_S32_LE;
+	}
+	
+	/* check if playback is already running with specific rate */
+	if (chip->stream[PLAYBACK]->rate) {
+		switch 	(chip->stream[PLAYBACK]->rate) {
+			case 44100:
+				substream->runtime->hw.rates = SNDRV_PCM_RATE_44100;
+				break;
+			case 48000:
+				substream->runtime->hw.rates = SNDRV_PCM_RATE_48000;
+				break;
+			case 96000:
+				substream->runtime->hw.rates = SNDRV_PCM_RATE_96000;
+				break;
+
+		}
+	}
+	
+	
+	err = snd_pcm_hw_constraint_minmax(substream->runtime,
+					   SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
+					   chip->burst * 2, 
+					   AUDIO_REG_TO_SIZE(APBBCR_SIZE_MAX));
+        if (err < 0)
+                return err;
+	
+	err = snd_pcm_hw_constraint_step(substream->runtime, 0,
+					 SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
+					 chip->burst); 
+        if (err < 0)
+                return err;
+	
+	err = snd_pcm_hw_constraint_step(substream->runtime, 0, 
+					 SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
+					 chip->burst);
+        if (err < 0)
+                return err;
+
+	err = snd_pcm_hw_constraint_minmax(substream->runtime,
+					   SNDRV_PCM_HW_PARAM_PERIODS,
+					   MV88FX_SND_MIN_PERIODS, 
+					   MV88FX_SND_MAX_PERIODS);
+        if (err < 0)
+                return err;
+	
+        err = snd_pcm_hw_constraint_integer(substream->runtime, 
+					    SNDRV_PCM_HW_PARAM_PERIODS);
+        if (err < 0)
+                return err;
+        
+	return 0;
+
+}
+
+static int
+mv88fx_snd_capture_close(struct snd_pcm_substream * substream)
+{
+	struct mv88fx_snd_chip *chip = substream->private_data;
+
+	mv88fx_snd_debug("=>%s\n",__FUNCTION__);
+	chip->stream_defaults[CAPTURE]->substream = NULL;
+	memset(chip->stream[CAPTURE] , 
+		0, 
+		sizeof(struct mv88fx_snd_stream));
+
+	return 0;
+}
+static int
+mv88fx_snd_capture_hw_params(struct snd_pcm_substream * substream,
+					struct snd_pcm_hw_params* params)
+{
+	struct mv88fx_snd_stream *audio_stream = substream->runtime->private_data;
+	int err = 0; 
+	
+	mv88fx_snd_debug("=>%s\n",__FUNCTION__);
+	
+        err = devdma_hw_alloc(audio_stream->dev, substream,
+			      params_buffer_bytes(params));
+	return err;
+}
+
+static int
+mv88fx_snd_capture_hw_free(struct snd_pcm_substream * substream)
+{
+	struct mv88fx_snd_stream *audio_stream = substream->runtime->private_data;
+//		snd_pcm_substream_chip(substream); 
+
+	mv88fx_snd_debug("=>%s\n",__FUNCTION__);
+	/*
+	 * Clear out the DMA and any allocated buffers.
+	 */
+	devdma_hw_free(audio_stream->dev, substream);
+	return 0;
+	
+}
+
+static int
+mv88fx_snd_capture_prepare(struct snd_pcm_substream * substream)
+{
+	struct snd_pcm_runtime *runtime = substream->runtime;
+	
+	struct mv88fx_snd_stream *audio_stream = runtime->private_data;
+//		snd_pcm_substream_chip(substream); 
+	struct mv88fx_snd_chip *chip = substream->private_data;
+
+
+	audio_stream->rate = runtime->rate;
+        audio_stream->stereo= (runtime->channels == 1) ? 0 : 1;
+
+	if (runtime->format == SNDRV_PCM_FORMAT_S16_LE) {
+		audio_stream->format = SAMPLE_16IN16;
+	} else if (runtime->format == SNDRV_PCM_FORMAT_S24_LE) {
+		audio_stream->format = SAMPLE_24IN32;
+	} else if (runtime->format == SNDRV_PCM_FORMAT_S32_LE) {
+		audio_stream->format = SAMPLE_32IN32;
+	} else {
+		mv88fx_snd_debug("Requested format %d is not supported\n", 
+			   runtime->format);
+		return -1;
+	}
+
+	/* buffer and period sizes in frame */
+	audio_stream->dma_addr = runtime->dma_addr;
+	audio_stream->dma_size = 
+		frames_to_bytes(runtime, runtime->buffer_size);
+	audio_stream->period_size = 
+		frames_to_bytes(runtime, runtime->period_size);
+
+	memcpy(chip->stream[CAPTURE], 
+	       chip->stream_defaults[CAPTURE],
+	       sizeof(struct mv88fx_snd_stream));
+	return mv88fx_snd_hw_capture_set(chip);
+}
+
+static int
+mv88fx_snd_capture_trigger(struct snd_pcm_substream *substream, int cmd)
+{
+	struct mv88fx_snd_stream *audio_stream = substream->runtime->private_data;
+//		snd_pcm_substream_chip(substream);
+	struct mv88fx_snd_chip *chip = substream->private_data;
+	int result = 0;
+
+	mv88fx_snd_debug("=>%s\n",__FUNCTION__);
+	
+	spin_lock(&chip->reg_lock);
+	switch (cmd) {
+	case SNDRV_PCM_TRIGGER_START:
+		/* FIXME: should check if busy before */
+
+		/* make sure the dma in pause state*/
+	     mv88fx_snd_bitset(chip, MV_AUDIO_RECORD_CTRL_REG(chip->port),
+				  ARCR_RECORD_PAUSE_MASK);
+
+		/* enable interrupt */
+	     mv88fx_snd_bitset(chip, MV_AUDIO_INT_MASK_REG(chip->port), 
+				  AICR_RECORD_BYTES_INT);
+
+
+		/* enable dma */
+		if (audio_stream->dig_mode & I2S)
+		     mv88fx_snd_bitset(chip, MV_AUDIO_RECORD_CTRL_REG(chip->port),
+					  ARCR_RECORD_I2S_EN_MASK);
+
+		if (audio_stream->dig_mode & SPDIF)
+		     mv88fx_snd_bitset(chip, MV_AUDIO_RECORD_CTRL_REG(chip->port),
+					  ARCR_RECORD_SPDIF_EN_MASK);
+
+		/* start dma */
+		mv88fx_snd_bitreset(chip, MV_AUDIO_RECORD_CTRL_REG(chip->port),
+				  ARCR_RECORD_PAUSE_MASK);
+		
+		
+		break;
+	case SNDRV_PCM_TRIGGER_STOP:
+
+		/* make sure the dma in pause state*/
+	     mv88fx_snd_bitset(chip, MV_AUDIO_RECORD_CTRL_REG(chip->port),
+				  ARCR_RECORD_PAUSE_MASK);
+		
+                /* disable interrupt */
+	     mv88fx_snd_bitreset(chip, MV_AUDIO_INT_MASK_REG(chip->port), 
+				  AICR_RECORD_BYTES_INT);
+
+		
+		/* always stop both I2S and SPDIF*/
+	     mv88fx_snd_bitreset(chip, MV_AUDIO_RECORD_CTRL_REG(chip->port),
+				    (ARCR_RECORD_I2S_EN_MASK | 
+				     ARCR_RECORD_SPDIF_EN_MASK));
+		
+                /* FIXME: should check if busy after */
+		
+		break;
+	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
+	case SNDRV_PCM_TRIGGER_SUSPEND:
+	     mv88fx_snd_bitset(chip, MV_AUDIO_RECORD_CTRL_REG(chip->port),
+				  ARCR_RECORD_PAUSE_MASK);
+		break;
+	case SNDRV_PCM_TRIGGER_RESUME:
+	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
+	     mv88fx_snd_bitreset(chip, MV_AUDIO_RECORD_CTRL_REG(chip->port),
+				    ARCR_RECORD_PAUSE_MASK);
+
+		break;
+	default:
+		result = -EINVAL;
+		break;
+	}
+	spin_unlock(&chip->reg_lock);
+	return result;
+}
+
+
+static snd_pcm_uframes_t 
+mv88fx_snd_capture_pointer(struct snd_pcm_substream * substream)
+{
+	struct mv88fx_snd_chip *chip = substream->private_data;
+
+	return bytes_to_frames(substream->runtime, 
+			       (ssize_t)mv88fx_snd_readl(chip, 
+							 MV_AUDIO_RECORD_BUF_BYTE_CNTR_REG(chip->port)));
+}
+
+int 
+mv88fx_snd_capture_mmap(struct snd_pcm_substream *substream, 
+			 struct vm_area_struct *vma)
+{
+	mv88fx_snd_debug("=>%s\n",__FUNCTION__);
+	return devdma_mmap(NULL, substream, vma);	
+	
+}
+
+static struct snd_pcm_ops mv88fx_snd_capture_ops = {
+	.open			= mv88fx_snd_capture_open,
+	.close			= mv88fx_snd_capture_close,
+	.ioctl			= snd_pcm_lib_ioctl,
+	.hw_params	        = mv88fx_snd_capture_hw_params,
+	.hw_free	        = mv88fx_snd_capture_hw_free,
+	.prepare		= mv88fx_snd_capture_prepare,
+	.trigger		= mv88fx_snd_capture_trigger,
+	.pointer		= mv88fx_snd_capture_pointer,
+	.mmap 			= mv88fx_snd_capture_mmap,
+};
+
+/*
+-----------------------------------------------------------------------------
+-----------------------------------------------------------------------------
+-----------------------------------------------------------------------------
+-----------------------------------------------------------------------------
+-----------------------------------------------------------------------------
+*/
+
+
+
+struct snd_pcm_hardware mv88fx_snd_playback_hw =
+{
+	.info =			(SNDRV_PCM_INFO_INTERLEAVED |
+				 SNDRV_PCM_INFO_MMAP |
+				 SNDRV_PCM_INFO_MMAP_VALID |
+				 SNDRV_PCM_INFO_BLOCK_TRANSFER |
+				 SNDRV_PCM_INFO_PAUSE ), 
+	.formats =		(SNDRV_PCM_FMTBIT_S16_LE |
+				 SNDRV_PCM_FMTBIT_S24_LE |
+				 SNDRV_PCM_FMTBIT_S32_LE),
+	.rates =		(SNDRV_PCM_RATE_44100 |
+				 SNDRV_PCM_RATE_48000 |
+				 SNDRV_PCM_RATE_96000),
+	.rate_min =		44100,
+	.rate_max =		96000,
+	.channels_min =		1,
+	.channels_max =		2,
+	.buffer_bytes_max =	(16*1024*1024),
+	.period_bytes_min =	MV88FX_SND_MIN_PERIOD_BYTES,
+	.period_bytes_max =	MV88FX_SND_MAX_PERIOD_BYTES,
+	.periods_min =		MV88FX_SND_MIN_PERIODS,
+	.periods_max =		MV88FX_SND_MAX_PERIODS,
+	.fifo_size =		0,
+
+};
+
+static int
+mv88fx_snd_playback_open(struct snd_pcm_substream * substream)
+{
+	int err = 0; 
+	struct mv88fx_snd_chip *chip = substream->private_data;
+
+	mv88fx_snd_debug("=>%s\n",__FUNCTION__);
+	chip->stream_defaults[PLAYBACK]->substream = substream;
+	chip->stream_defaults[PLAYBACK]->direction = PLAYBACK;
+//	substream->private_data = chip->stream_defaults[PLAYBACK];
+	substream->runtime->private_data = chip->stream_defaults[PLAYBACK];
+	substream->runtime->hw = mv88fx_snd_playback_hw;
+
+	if (chip->stream_defaults[PLAYBACK]->dig_mode & SPDIF) {
+		substream->runtime->hw.formats &= ~SNDRV_PCM_FMTBIT_S32_LE;
+	}
+
+	/* check if capture is already running with specific rate */
+	if (chip->stream[CAPTURE]->rate) {
+		switch 	(chip->stream[CAPTURE]->rate) {
+			case 44100:
+				substream->runtime->hw.rates = SNDRV_PCM_RATE_44100;
+				break;
+			case 48000:
+				substream->runtime->hw.rates = SNDRV_PCM_RATE_48000;
+				break;
+			case 96000:
+				substream->runtime->hw.rates = SNDRV_PCM_RATE_96000;
+				break;
+
+		}
+	}
+
+	err = snd_pcm_hw_constraint_minmax(substream->runtime,
+					   SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
+					   chip->burst * 2, 
+					   AUDIO_REG_TO_SIZE(APBBCR_SIZE_MAX));
+        if (err < 0)
+                return err;
+	
+	err = snd_pcm_hw_constraint_step(substream->runtime, 0,
+					 SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
+					 chip->burst); 
+        if (err < 0)
+                return err;
+	
+	err = snd_pcm_hw_constraint_step(substream->runtime, 0, 
+					 SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
+					 chip->burst);
+        if (err < 0)
+                return err;
+
+	err = snd_pcm_hw_constraint_minmax(substream->runtime,
+					   SNDRV_PCM_HW_PARAM_PERIODS,
+					   MV88FX_SND_MIN_PERIODS, 
+					   MV88FX_SND_MAX_PERIODS);
+        if (err < 0)
+                return err;
+	
+        err = snd_pcm_hw_constraint_integer(substream->runtime, 
+					    SNDRV_PCM_HW_PARAM_PERIODS);
+
+        if (err < 0)
+                return err;
+        
+	return 0;
+
+}
+
+static int
+mv88fx_snd_playback_close(struct snd_pcm_substream * substream)
+{
+	int i;
+	struct mv88fx_snd_chip *chip = substream->private_data;
+
+	mv88fx_snd_debug("=>%s\n",__FUNCTION__);
+	chip->stream_defaults[PLAYBACK]->substream = NULL;
+
+	chip->pcm_mode = PCM;
+
+	for (i=0; i<4 ; i++) {
+		chip->stream_defaults[PLAYBACK]->spdif_status[i] = 0;
+		chip->stream[PLAYBACK]->spdif_status[i] = 0;
+
+		 mv88fx_snd_writel(chip, 
+				   MV_AUDIO_SPDIF_PLAY_CH_STATUS_LEFT_REG(chip->port, i),
+			chip->stream_defaults[PLAYBACK]->spdif_status[i]);
+		 mv88fx_snd_writel(chip, 
+				   MV_AUDIO_SPDIF_PLAY_CH_STATUS_RIGHT_REG(chip->port, i),
+			chip->stream_defaults[PLAYBACK]->spdif_status[i]);
+
+	}
+
+	memset(chip->stream[PLAYBACK] , 
+		0, 
+		sizeof(struct mv88fx_snd_stream));
+
+	
+	return 0;
+}
+static int
+mv88fx_snd_playback_hw_params(struct snd_pcm_substream * substream,
+					struct snd_pcm_hw_params* params)
+{
+	struct mv88fx_snd_stream *audio_stream = substream->runtime->private_data;
+	int err = 0; 
+		
+        err = devdma_hw_alloc(audio_stream->dev, substream,
+			      params_buffer_bytes(params));
+
+	mv88fx_snd_debug("=>%s addr=0x%x size=0x%x\n",__FUNCTION__,
+		   substream->runtime->dma_addr,
+		   frames_to_bytes(substream->runtime, 
+				   substream->runtime->buffer_size));
+	
+
+	return err;
+}
+
+static int
+mv88fx_snd_playback_hw_free(struct snd_pcm_substream * substream)
+{
+	struct mv88fx_snd_stream *audio_stream = substream->runtime->private_data;
+
+	mv88fx_snd_debug("=>%s\n",__FUNCTION__);
+	/*
+	 * Clear out the DMA and any allocated buffers.
+	 */
+	devdma_hw_free(audio_stream->dev, substream);
+	return 0;
+	
+}
+
+static int
+mv88fx_snd_playback_prepare(struct snd_pcm_substream * substream)
+{
+	struct snd_pcm_runtime *runtime = substream->runtime;
+	struct mv88fx_snd_stream *audio_stream = runtime->private_data;
+	struct mv88fx_snd_chip *chip = substream->private_data;
+
+	mv88fx_snd_debug("=>%s\n",__FUNCTION__);
+        if ((audio_stream->dig_mode == I2S) && 
+	    (chip->pcm_mode == NON_PCM))
+		return -1;
+
+	audio_stream->rate = runtime->rate;
+        audio_stream->stereo= (runtime->channels == 1) ? 0 : 1;
+
+	if (runtime->format == SNDRV_PCM_FORMAT_S16_LE) {
+		audio_stream->format = SAMPLE_16IN16;
+	} else if (runtime->format == SNDRV_PCM_FORMAT_S24_LE) {
+		audio_stream->format = SAMPLE_24IN32;
+	} else if (runtime->format == SNDRV_PCM_FORMAT_S32_LE) {
+		audio_stream->format = SAMPLE_32IN32;
+	} else {
+		mv88fx_snd_debug("Requested format %d is not supported\n", 
+			   runtime->format);
+		return -1;
+	}
+
+	/* buffer and period sizes in frame */
+	audio_stream->dma_addr = runtime->dma_addr;
+	audio_stream->dma_size = 
+		frames_to_bytes(runtime, runtime->buffer_size);
+	audio_stream->period_size = 
+		frames_to_bytes(runtime, runtime->period_size);
+
+	memcpy(chip->stream[PLAYBACK], 
+	       chip->stream_defaults[PLAYBACK],
+	       sizeof(struct mv88fx_snd_stream));
+	
+	return mv88fx_snd_hw_playback_set(chip);
+}
+
+static int
+mv88fx_snd_playback_trigger(struct snd_pcm_substream *substream, int cmd)
+{
+	struct mv88fx_snd_stream *audio_stream = substream->runtime->private_data;
+	struct mv88fx_snd_chip *chip = substream->private_data;
+	int result = 0;
+
+	mv88fx_snd_debug("%s: cmd 0x%x\n",__FUNCTION__, cmd);
+	spin_lock(&chip->reg_lock);
+	switch (cmd) {
+	case SNDRV_PCM_TRIGGER_START:
+
+		/* enable interrupt */
+		mv88fx_snd_bitset(chip, MV_AUDIO_INT_MASK_REG(chip->port), 
+				  AICR_PLAY_BYTES_INT);
+
+		/* make sure the dma in pause state*/
+	     mv88fx_snd_bitset(chip, MV_AUDIO_PLAYBACK_CTRL_REG(chip->port),
+				  APCR_PLAY_PAUSE_MASK);
+
+		/* enable dma */
+                if ((audio_stream->dig_mode & I2S) && 
+		    (chip->pcm_mode == PCM))
+		     mv88fx_snd_bitset(chip, MV_AUDIO_PLAYBACK_CTRL_REG(chip->port),
+					  APCR_PLAY_I2S_ENABLE_MASK);
+
+		if (audio_stream->dig_mode & SPDIF)
+		     mv88fx_snd_bitset(chip, MV_AUDIO_PLAYBACK_CTRL_REG(chip->port),
+					  APCR_PLAY_SPDIF_ENABLE_MASK);
+
+		/* start dma */
+		mv88fx_snd_bitreset(chip, MV_AUDIO_PLAYBACK_CTRL_REG(chip->port),
+				    APCR_PLAY_PAUSE_MASK);
+
+		break;
+	case SNDRV_PCM_TRIGGER_STOP:
+		
+                /* disable interrupt */
+	     mv88fx_snd_bitreset(chip, MV_AUDIO_INT_MASK_REG(chip->port), 
+				  AICR_PLAY_BYTES_INT);
+
+
+		/* make sure the dma in pause state*/
+	     mv88fx_snd_bitset(chip, MV_AUDIO_PLAYBACK_CTRL_REG(chip->port),
+				  APCR_PLAY_PAUSE_MASK);
+		
+		/* always stop both I2S and SPDIF*/
+	     mv88fx_snd_bitreset(chip, MV_AUDIO_PLAYBACK_CTRL_REG(chip->port),
+				    (APCR_PLAY_I2S_ENABLE_MASK | 
+				     APCR_PLAY_SPDIF_ENABLE_MASK));
+
+		/* check if busy twice*/
+	     while (mv88fx_snd_readl(chip, MV_AUDIO_PLAYBACK_CTRL_REG(chip->port)) & 
+		       APCR_PLAY_BUSY_MASK);
+		
+	     while (mv88fx_snd_readl(chip, MV_AUDIO_PLAYBACK_CTRL_REG(chip->port)) & 
+		       APCR_PLAY_BUSY_MASK);
+		
+		break;
+	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
+	case SNDRV_PCM_TRIGGER_SUSPEND:
+	     mv88fx_snd_bitset(chip, MV_AUDIO_PLAYBACK_CTRL_REG(chip->port),
+				  APCR_PLAY_PAUSE_MASK);
+		break;
+	case SNDRV_PCM_TRIGGER_RESUME:
+	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
+	     mv88fx_snd_bitreset(chip, MV_AUDIO_PLAYBACK_CTRL_REG(chip->port),
+				    APCR_PLAY_PAUSE_MASK);
+
+		break;
+	default:
+		result = -EINVAL;
+		break;
+	}
+	spin_unlock(&chip->reg_lock);
+	mv88fx_snd_debug("<=%s\n",__FUNCTION__);
+	return result;
+}
+
+
+static snd_pcm_uframes_t 
+mv88fx_snd_playback_pointer(struct snd_pcm_substream * substream)
+{
+	struct mv88fx_snd_chip *chip = substream->private_data;
+
+	mv88fx_snd_debug("=>%s pointer %x\n",__FUNCTION__,mv88fx_snd_readl(chip, 
+									   MV_AUDIO_PLAYBACK_BUFF_BYTE_CNTR_REG(chip->port)) );
+
+	return bytes_to_frames(substream->runtime, 
+			       (ssize_t)mv88fx_snd_readl(chip, 
+							 MV_AUDIO_PLAYBACK_BUFF_BYTE_CNTR_REG(chip->port)));
+}
+
+int 
+mv88fx_snd_playback_mmap(struct snd_pcm_substream *substream, 
+			 struct vm_area_struct *vma)
+{
+	mv88fx_snd_debug("=>%s\n",__FUNCTION__);
+	return devdma_mmap(NULL, substream, vma);	
+	
+}
+
+
+static struct snd_pcm_ops mv88fx_snd_playback_ops = {
+	.open			= mv88fx_snd_playback_open,
+	.close			= mv88fx_snd_playback_close,
+	.ioctl			= snd_pcm_lib_ioctl,
+	.hw_params	        = mv88fx_snd_playback_hw_params,
+	.hw_free	        = mv88fx_snd_playback_hw_free,
+	.prepare		= mv88fx_snd_playback_prepare,
+	.trigger		= mv88fx_snd_playback_trigger,
+	.pointer		= mv88fx_snd_playback_pointer,
+	.mmap 			= mv88fx_snd_playback_mmap,
+};
+
+
+/*
+-----------------------------------------------------------------------------
+-----------------------------------------------------------------------------
+-----------------------------------------------------------------------------
+-----------------------------------------------------------------------------
+-----------------------------------------------------------------------------
+*/
+
+
+static int __init 
+mv88fx_snd_pcm_new(struct snd_card *card)
+{
+	struct snd_pcm *pcm;
+	struct mv88fx_snd_chip *chip = card->private_data;
+	int err, i;
+
+	mv88fx_snd_debug("=>%s card->dev=0x%x\n",__FUNCTION__, 
+		   (unsigned int)card->dev);
+	
+	if ((err = snd_pcm_new(card, "Marvell mv88fx_snd IEC958 and I2S", 
+			       0, 1, 1, &pcm)) < 0) 
+		return err;
+
+	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, 
+			&mv88fx_snd_playback_ops);
+	
+	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, 
+			&mv88fx_snd_capture_ops);
+	
+	chip->stream_defaults[PLAYBACK]->dig_mode = 0;
+	if(chip->pdata->i2s_play)
+		chip->stream_defaults[PLAYBACK]->dig_mode |= I2S;
+	if(chip->pdata->spdif_play)
+		chip->stream_defaults[PLAYBACK]->dig_mode |= SPDIF;
+
+	chip->stream_defaults[PLAYBACK]->mono_mode = MONO_BOTH;
+	chip->pcm_mode = PCM;
+	chip->stream_defaults[PLAYBACK]->stat_mem = 0;
+	chip->stream_defaults[PLAYBACK]->clock_src = DCO_CLOCK;
+
+	if(chip->pdata->i2s_rec)
+		chip->stream_defaults[CAPTURE]->dig_mode = I2S;
+	else if(chip->pdata->spdif_rec)
+		chip->stream_defaults[CAPTURE]->dig_mode = SPDIF;
+	else
+		chip->stream_defaults[CAPTURE]->dig_mode = 0;
+
+	chip->stream_defaults[CAPTURE]->mono_mode = MONO_LEFT;
+	chip->pcm_mode = PCM;
+	chip->stream_defaults[CAPTURE]->stat_mem = 0;
+	chip->stream_defaults[CAPTURE]->clock_src = DCO_CLOCK;
+
+	for (i=0; i<4 ; i++) {
+		chip->stream_defaults[PLAYBACK]->spdif_status[i] = 0;
+		chip->stream[PLAYBACK]->spdif_status[i] = 0;
+		
+		mv88fx_snd_writel(chip, 
+				  MV_AUDIO_SPDIF_PLAY_CH_STATUS_LEFT_REG(chip->port, i),
+			chip->stream_defaults[PLAYBACK]->spdif_status[i]);
+		mv88fx_snd_writel(chip, 
+				  MV_AUDIO_SPDIF_PLAY_CH_STATUS_RIGHT_REG(chip->port, i),
+			chip->stream_defaults[PLAYBACK]->spdif_status[i]);
+		mv88fx_snd_writel(chip, 
+				  MV_AUDIO_SPDIF_PLAY_USR_BITS_LEFT_REG(chip->port, i),
+			0);
+		mv88fx_snd_writel(chip, 
+				  MV_AUDIO_SPDIF_PLAY_USR_BITS_RIGHT_REG(chip->port, i),
+			0);
+		
+	}
+	
+
+	pcm->private_data = chip;
+	pcm->info_flags = 0;
+        strcpy(pcm->name, "Marvell mv88fx_snd IEC958 and I2S");
+
+	return 0;
+}
+
+static irqreturn_t
+mv88fx_snd_interrupt(int irq, void *dev_id)
+{
+	struct mv88fx_snd_chip *chip = dev_id;
+	struct mv88fx_snd_stream *play_stream =
+		chip->stream_defaults[PLAYBACK];
+	struct mv88fx_snd_stream *capture_stream =
+		chip->stream_defaults[CAPTURE];
+	
+			
+	unsigned int status, mask;
+ 	mv88fx_snd_debug("=>%s chip=0x%x\n",__FUNCTION__,(unsigned int)chip);
+	spin_lock(&chip->reg_lock);
+	
+	/* read the active interrupt */
+	mask = mv88fx_snd_readl(chip, MV_AUDIO_INT_MASK_REG(chip->port));
+	status = mv88fx_snd_readl(chip, MV_AUDIO_INT_CAUSE_REG(chip->port)) & mask;
+
+	do {
+	
+
+		if (status & ~(AICR_RECORD_BYTES_INT|AICR_PLAY_BYTES_INT)) {
+	
+	                spin_unlock(&chip->reg_lock);
+			snd_BUG(); /* FIXME: should enable error interrupts*/
+			return IRQ_NONE;
+		}
+	
+		/* acknowledge interrupt */
+		mv88fx_snd_writel(chip, MV_AUDIO_INT_CAUSE_REG(chip->port), status);
+	
+		/* This is record event */
+		if (status & AICR_RECORD_BYTES_INT) {
+			spin_unlock(&chip->reg_lock);
+			snd_pcm_period_elapsed(capture_stream->substream);
+			spin_lock(&chip->reg_lock);
+			pr_debug("int:capture_stream=0x%x rec_count=0x%x\n",(unsigned int)capture_stream, mv88fx_snd_readl(chip, 
+															   MV_AUDIO_RECORD_BUF_BYTE_CNTR_REG(chip->port)));
+		}
+		/* This is play event */
+		if (status & AICR_PLAY_BYTES_INT) {
+			spin_unlock(&chip->reg_lock);
+			snd_pcm_period_elapsed(play_stream->substream);
+			spin_lock(&chip->reg_lock);
+			pr_debug("int:play_stream=0x%x rec_count=0x%x\n",(unsigned int)play_stream, mv88fx_snd_readl(chip, 
+														     MV_AUDIO_PLAYBACK_BUFF_BYTE_CNTR_REG(chip->port)));
+		
+		}
+	
+		/* read the active interrupt */
+		mask = mv88fx_snd_readl(chip, MV_AUDIO_INT_MASK_REG(chip->port));
+		status = mv88fx_snd_readl(chip, MV_AUDIO_INT_CAUSE_REG(chip->port)) & mask;
+
+	} while(status);
+
+	spin_unlock(&chip->reg_lock);
+ 	mv88fx_snd_debug("<=%s chip=0x%x\n",__FUNCTION__,(unsigned int)chip);
+	return IRQ_HANDLED;
+}
+
+static void 
+mv88fx_snd_free(struct snd_card *card)
+{
+	struct mv88fx_snd_chip *chip = card->private_data;
+
+ 	mv88fx_snd_debug("=>%s chip=0x%x\n",__FUNCTION__,(unsigned int)chip);
+	
+	/* free irq */
+	free_irq(chip->irq, (void *)chip);
+
+	mv88fx_snd_debug(KERN_ERR "chip->res =0x%x\n", (unsigned int)chip->res);
+
+	chip->base += AUDIO_REG_BASE(chip->port);
+	if (chip->base)
+		iounmap(chip->base);
+	
+	if (chip->res) 
+		release_resource(chip->res);
+	
+	chip->res = NULL;
+	
+		
+	/* Free memory allocated for streems */
+	if (chip->stream_defaults[PLAYBACK]) {
+		kfree(chip->stream_defaults[PLAYBACK]);
+		chip->stream_defaults[PLAYBACK] = NULL;
+	}
+	if (chip->stream[PLAYBACK]) {
+		kfree(chip->stream[PLAYBACK]);
+		chip->stream[PLAYBACK] = NULL;
+	}	
+	if (chip->stream_defaults[CAPTURE]) {
+		kfree(chip->stream_defaults[CAPTURE]);
+		chip->stream_defaults[CAPTURE] = NULL;
+	}
+	if (chip->stream[CAPTURE]) {
+		kfree(chip->stream[CAPTURE]);
+		chip->stream[CAPTURE] = NULL;
+	}
+
+	if (chip->stream_defaults[PLAYBACK] && 
+	    chip->stream_defaults[PLAYBACK]->area)
+		dma_free_coherent(chip->dev, 
+				MV88FX_SND_MAX_PERIODS * MV88FX_SND_MAX_PERIOD_BYTES, 
+				chip->stream_defaults[PLAYBACK]->area, 
+				chip->stream_defaults[PLAYBACK]->addr);	
+
+	if (chip->stream_defaults[CAPTURE] &&
+	    chip->stream_defaults[CAPTURE]->area)
+		dma_free_coherent(chip->dev, 
+				MV88FX_SND_MAX_PERIODS * MV88FX_SND_MAX_PERIOD_BYTES, 
+				chip->stream_defaults[CAPTURE]->area, 
+				chip->stream_defaults[CAPTURE]->addr);	
+
+
+	chip = NULL;
+}
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)
+/* 0 is the playback dma */
+#define WINDOW_CTRL(dma)		(0xA0C - ((dma) << 3))
+#define WINDOW_BASE(dma)		(0xA08 - ((dma) << 3))
+
+static int find_dram_cs(struct mbus_dram_target_info *dram,
+			u32 base, u32 size)
+{
+	int i;
+	
+	for (i=0; i < dram->num_cs; i++) {
+		struct mbus_dram_window *cs = dram->cs + i;
+		/* check if we fit into one memory window only */
+		if ((base >= cs->base) &&
+		    ((base + size) <=  cs->base + cs->size))
+			return i;
+		
+	}
+	
+	return -1;
+}
+static int config_dma_window(struct mv88fx_snd_chip	*chip,
+			     int dma,
+			     struct mbus_dram_target_info *dram)
+{
+	struct mbus_dram_window *cs;
+	int win;
+	
+	/*
+	 * we have one window for each dma (playback dma and recording),
+	 * confiure it to point to the dram window where the buffer falls in
+	 */
+	win = find_dram_cs(dram, 
+			   (u32)chip->stream_defaults[dma]->addr,
+			   (u32)MV88FX_SND_MAX_PERIODS * MV88FX_SND_MAX_PERIOD_BYTES);
+	if( win < 0)
+		return -1;
+
+	cs = dram->cs + win;
+	writel(((cs->size - 1) & 0xffff0000) |
+	       (cs->mbus_attr << 8) |
+	       (dram->mbus_dram_target_id << 4) | 1,
+	       chip->base + AUDIO_REG_BASE(chip->port) + WINDOW_CTRL(dma));
+	writel(cs->base, chip->base + AUDIO_REG_BASE(chip->port) + WINDOW_BASE(dma));
+	return win;
+}
+static int mv_conf_mbus_windows(struct mv88fx_snd_chip	*chip,
+				 struct mbus_dram_target_info *dram)
+{
+	/*
+	 * we have one window for playback and one for recording
+	 */
+	if(config_dma_window(chip, PLAYBACK, dram) < 0)
+		return -1;
+	
+	if(config_dma_window(chip, CAPTURE, dram) < 0)
+		return -1;
+	return 0;
+}
+#endif
+static int mv88fx_snd_probe(struct platform_device *dev)
+{
+	int err = 0, irq = NO_IRQ;	
+	struct snd_card *card = NULL;
+	struct mv88fx_snd_chip *chip;
+	struct resource *r = NULL;	
+	static struct snd_device_ops ops = {
+		.dev_free =	NULL,
+	};
+	
+	mv88fx_snd_debug("=>%s", __FUNCTION__);
+
+
+        card = snd_card_new(-1, "mv88fx_snd", THIS_MODULE, 
+			    sizeof(struct mv88fx_snd_chip));
+
+	if (card == NULL) {
+		mv88fx_snd_debug(KERN_ERR "snd_card_new failed\n");
+		return -ENOMEM;
+	}
+
+        chip = card->private_data;
+	spin_lock_init(&chip->reg_lock);
+	card->dev = &dev->dev;
+        chip->dev = &dev->dev;
+	chip->mem_array = (_audio_mem_info*)dev->dev.platform_data;
+
+	card->private_free = mv88fx_snd_free;
+
+	r = platform_get_resource(dev, IORESOURCE_MEM, 0);
+	if (!r) {
+		mv88fx_snd_debug(KERN_ERR "platform_get_resource failed\n");
+		err = -ENXIO;
+		goto error;
+	}
+
+	
+        mv88fx_snd_debug(KERN_ERR "chip->res =0x%x\n", (unsigned int)chip->res);
+	
+	r = request_mem_region(r->start, SZ_16K, DRIVER_NAME);
+	if (!r){
+		mv88fx_snd_debug(KERN_ERR "request_mem_region failed\n");
+		err = -EBUSY;
+		goto error;
+	} 
+	chip->res = r;
+
+	irq = platform_get_irq(dev, 0);
+	if (irq == NO_IRQ){
+		mv88fx_snd_debug(KERN_ERR "platform_get_irq failed\n");
+		err = -ENXIO;
+		goto error;
+	}
+
+	chip->pdata = (struct orion_i2s_platform_data*) dev->dev.platform_data;
+        chip->port = dev->id;
+
+	mv88fx_snd_debug("%s: port %d chip->pdata->dram %p\n",__FUNCTION__, 
+			 chip->port, chip->pdata->dram);
+
+	mv88fx_snd_debug("%s card = 0x%x card->dev 0x%x\n",__FUNCTION__,
+						(unsigned int)card,
+						(unsigned int)card->dev);
+        chip->base = ioremap(r->start, SZ_16K);
+
+	if (!chip->base) {
+		mv88fx_snd_debug(KERN_ERR "ioremap failed\n");
+		err = -ENOMEM;
+                goto error;
+	}
+	chip->base -= AUDIO_REG_BASE(chip->port);
+
+	mv88fx_snd_debug("%s: chip->base=0x%x r->start0x%x\n",__FUNCTION__,
+		   (unsigned int)chip->base,r->start);
+
+        strncpy(card->driver, dev->dev.driver->name, 
+		sizeof(card->driver));	
+	
+        
+	/* Allocate memory for our device */
+	chip->stream_defaults[PLAYBACK] = 
+		kzalloc(sizeof(struct mv88fx_snd_stream), GFP_KERNEL);
+	
+        if (chip->stream_defaults[PLAYBACK] == NULL) {
+		mv88fx_snd_debug(KERN_ERR "kzalloc failed for default playback\n");
+		err = -ENOMEM;
+		goto error;
+	}
+	chip->stream_defaults[PLAYBACK]->direction = PLAYBACK;
+	chip->stream_defaults[PLAYBACK]->dev = card->dev;
+
+	chip->stream[PLAYBACK] = kzalloc(sizeof(struct mv88fx_snd_stream),
+					 GFP_KERNEL);
+
+	if (chip->stream[PLAYBACK] == NULL) {
+		mv88fx_snd_debug(KERN_ERR "kzalloc failed for runtime playback\n");
+		err = -ENOMEM;
+		goto error;
+	}
+	
+	
+	chip->stream_defaults[CAPTURE] = 
+		kzalloc(sizeof(struct mv88fx_snd_stream), GFP_KERNEL);
+	
+	if (chip->stream_defaults[CAPTURE] == NULL) {
+		mv88fx_snd_debug(KERN_ERR "kzalloc failed for capture\n");
+		err = -ENOMEM;
+		goto error;
+	}
+	chip->stream_defaults[CAPTURE]->direction = CAPTURE;
+        chip->stream_defaults[CAPTURE]->dev = card->dev;
+
+	chip->stream[CAPTURE] = kzalloc(sizeof(struct mv88fx_snd_stream),
+					 GFP_KERNEL);
+
+	if (chip->stream[CAPTURE] == NULL) {
+		mv88fx_snd_debug(KERN_ERR "kzalloc failed for runtime capture\n");
+		err = -ENOMEM;
+		goto error;
+	}
+	
+	chip->irq = irq;
+	chip->stream_defaults[PLAYBACK]->area = 
+		dma_alloc_coherent(chip->dev,
+				MV88FX_SND_MAX_PERIODS * MV88FX_SND_MAX_PERIOD_BYTES, 
+				&chip->stream_defaults[PLAYBACK]->addr, 
+				GFP_KERNEL);
+
+	if (!chip->stream_defaults[PLAYBACK]->area) {
+		mv88fx_snd_debug(KERN_ERR "dma_alloc_coherent failed for playback buffer\n");
+		err = -ENOMEM;
+		goto error;
+	}
+#if 0
+	if (0 == test_memory(chip, 
+			(unsigned int)chip->stream_defaults[PLAYBACK]->addr, 
+			(unsigned int)MV88FX_SND_MAX_PERIODS * MV88FX_SND_MAX_PERIOD_BYTES)) {
+
+		mv88fx_snd_debug(KERN_ERR "error: playback buffer not in one memory window\n");
+		err = -ENOMEM;
+		goto error;
+
+	}
+#endif	
+	chip->stream_defaults[CAPTURE]->area = 
+		dma_alloc_coherent(chip->dev,	
+				MV88FX_SND_MAX_PERIODS * MV88FX_SND_MAX_PERIOD_BYTES, 
+				&chip->stream_defaults[CAPTURE]->addr, 
+				GFP_KERNEL);
+
+	if (!chip->stream_defaults[CAPTURE]->area) {
+		mv88fx_snd_debug(KERN_ERR "dma_alloc_coherent failed for capture buffer\n");
+		err = -ENOMEM;
+		goto error;
+	}
+#if 0
+	if (0 == test_memory(chip, 
+			(unsigned int)chip->stream_defaults[CAPTURE]->addr, 
+			(unsigned int)MV88FX_SND_MAX_PERIODS * MV88FX_SND_MAX_PERIOD_BYTES)) {
+
+		mv88fx_snd_debug(KERN_ERR "error: playback buffer not in one memory window\n");
+		err = -ENOMEM;
+		goto error;
+
+	}
+#endif
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)
+	if (chip->pdata->dram != NULL)
+		if(mv_conf_mbus_windows(chip, chip->pdata->dram)){
+			mv88fx_snd_debug(KERN_ERR "error: data buffer not in one memory window\n");
+			err = -ENOMEM;
+			goto error;
+			
+		}
+#endif		
+
+	if (request_irq(chip->irq, mv88fx_snd_interrupt, 0, DRIVER_NAME, 
+			(void *)chip)) {
+		
+		mv88fx_snd_debug("Unable to grab IRQ %d\n", chip->irq);
+		err = -ENOMEM;
+		goto error;
+	}
+
+	chip->ch_stat_valid = 1; 
+	chip->burst = 128;	
+        chip->loopback = 0; 
+        chip->dco_ctrl_offst = 0x800;
+	
+	err = mv88fx_snd_hw_init(chip);
+
+	if (err != 0) {
+		mv88fx_snd_debug(KERN_ERR "mv88fx_snd_hw_init failed\n");
+		err = -ENOMEM;
+		goto error;
+	}
+	
+	/* Set default values */
+	if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
+		mv88fx_snd_debug(KERN_ERR "Creating chip device failed.\n");
+		err = -ENOMEM;
+		goto error;
+	}
+	
+	/* create pcm devices */
+	if ((err = mv88fx_snd_pcm_new(card)) < 0) {
+		mv88fx_snd_debug(KERN_ERR "Creating PCM device failed.\n");
+		err = -ENOMEM;
+		goto error;
+	}
+	/* create controll interfaces & switches */
+	if ((err = mv88fx_snd_ctrl_new(card)) < 0) {
+		mv88fx_snd_debug(KERN_ERR "Creating non-PCM device failed.\n");
+		err = -ENOMEM;
+		goto error;
+	}
+	
+	strcpy(card->driver, "mv88fx_snd");
+	strcpy(card->shortname, "Marvell mv88fx_snd");
+	sprintf(card->longname, "Marvell mv88fx_snd ALSA driver");
+
+	
+	if ((err = snd_card_register(card)) < 0) {
+		mv88fx_snd_debug("Card registeration failed.\n");
+		err = -ENOMEM;
+		goto error;
+	}
+
+	if (dma_set_mask(&dev->dev, 0xFFFFFFUL) < 0)
+		goto error;
+	
+	platform_set_drvdata(dev, card);
+	return 0;
+error:
+	if (card) 
+                snd_card_free(card);
+	platform_set_drvdata(dev, NULL);
+	return err;
+}
+
+static int mv88fx_snd_remove(struct platform_device *dev)
+{
+	struct snd_card *card = platform_get_drvdata(dev);
+	
+	mv88fx_snd_debug("=>%s", __FUNCTION__);
+
+	if (card)
+		snd_card_free(card);
+        platform_set_drvdata(dev, NULL);
+	return 0;
+}
+
+#define mv88fx_snd_resume	NULL
+#define mv88fx_snd_suspend	NULL
+
+static struct platform_driver mv88fx_snd_driver = {
+	.probe		= mv88fx_snd_probe,
+	.remove		= mv88fx_snd_remove,
+	.suspend	= mv88fx_snd_suspend,
+	.resume		= mv88fx_snd_resume,
+	.driver		= {
+		.name	= DRIVER_NAME,
+	},
+
+};
+
+static int __init 
+mv88fx_snd_init(void)
+{
+	mv88fx_snd_debug("=>%s", __FUNCTION__);
+	return platform_driver_register(&mv88fx_snd_driver);
+}
+
+static void __exit mv88fx_snd_exit(void)
+{
+	mv88fx_snd_debug("=>%s", __FUNCTION__);
+	platform_driver_unregister(&mv88fx_snd_driver);	
+        
+}
+
+MODULE_AUTHOR("Maen Suleiman <maen@marvell.com>");
+MODULE_DESCRIPTION("Marvell MV88Fx Alsa Sound driver");
+MODULE_LICENSE("GPL");
+
+module_init(mv88fx_snd_init);
+module_exit(mv88fx_snd_exit);
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_audio/mv88fx-hal.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_audio/mv88fx-hal.c
@@ -0,0 +1,379 @@
+/*
+ *
+ *	Marvell Orion Alsa Sound driver
+ *
+ *	Author: Maen Suleiman
+ *	Copyright (C) 2008 Marvell Ltd.
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/version.h>
+#include <sound/core.h>
+#include <sound/initval.h>
+#include <sound/control.h>
+#include <sound/pcm.h>
+#include <sound/asoundef.h>
+#include <sound/asound.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)
+#include <sound/driver.h>
+#endif
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)
+#include <plat/i2s-orion.h>
+#endif
+#include <asm/dma.h>
+#include <asm/io.h>
+#include <asm/scatterlist.h>
+#include <asm/sizes.h>
+
+#include "mv88fx-pcm.h"
+/*#define AUDIO_REG_BASE	0x0*/
+#include "audio/mvAudio.h"
+#include "ctrlEnv/sys/mvSysAudio.h"
+
+#ifdef CONFIG_MACH_DOVE_RD_AVNG
+#include <asm/gpio.h>
+#include <asm/mach-types.h>
+#endif
+
+int cs42l51_init(MV_U8 unit);
+
+#ifdef CONFIG_MACH_DOVE_RD_AVNG
+void cs42l51_input_select(MV_U8, int);
+#endif
+
+int mv88fx_snd_hw_init(struct mv88fx_snd_chip	*chip)
+{
+	/* Clear ints */
+	if(chip->pdata->i2s_rec || chip->pdata->i2s_play)
+		if(cs42l51_init(chip->port))
+			return -ENODEV;
+		
+        mv88fx_snd_writel(chip, MV_AUDIO_INT_CAUSE_REG(chip->port), 0xffffffff);
+        mv88fx_snd_writel(chip, MV_AUDIO_INT_MASK_REG(chip->port), 0);
+        mv88fx_snd_writel(chip, MV_AUDIO_SPDIF_REC_INT_CAUSE_MASK_REG(chip->port), 
+				0);
+	
+	if (MV_OK != mvAudioInit(chip->port))
+		return -EIO;
+
+        /* Disable all playback/recording */
+	mv88fx_snd_bitreset(chip, MV_AUDIO_PLAYBACK_CTRL_REG(chip->port),
+			    (APCR_PLAY_I2S_ENABLE_MASK | 
+			     APCR_PLAY_SPDIF_ENABLE_MASK));
+
+	mv88fx_snd_bitreset(chip, MV_AUDIO_RECORD_CTRL_REG(chip->port),
+			    (ARCR_RECORD_SPDIF_EN_MASK | 
+			     ARCR_RECORD_I2S_EN_MASK));
+	
+	if (MV_OK != mvSPDIFRecordTclockSet(chip->port)) {
+		mv88fx_snd_debug("Marvell ALSA driver ERR. mvSPDIFRecordTclockSet failed\n");
+                return -ENOMEM;
+	}
+
+        return 0;
+}
+
+int mv88fx_snd_hw_playback_set(struct mv88fx_snd_chip	*chip)
+{
+        struct mv88fx_snd_stream *audio_stream = 
+		chip->stream[PLAYBACK]; 
+	struct snd_pcm_substream *substream = audio_stream->substream;
+	struct snd_pcm_runtime *runtime = substream->runtime;
+        
+	MV_AUDIO_PLAYBACK_CTRL	pcm_play_ctrl;
+	MV_I2S_PLAYBACK_CTRL	i2s_play_ctrl;
+	MV_SPDIF_PLAYBACK_CTRL	spdif_play_ctrl;
+	MV_AUDIO_FREQ_DATA 	dco_ctrl;
+
+
+	dco_ctrl.offset = chip->dco_ctrl_offst;
+	
+	switch(audio_stream->rate) {
+	case 44100:
+		dco_ctrl.baseFreq = AUDIO_FREQ_44_1KH;
+		break;
+	case 48000:
+		dco_ctrl.baseFreq = AUDIO_FREQ_48KH;
+		break;
+	case 96000:
+		dco_ctrl.baseFreq = AUDIO_FREQ_96KH;
+		break;
+	default:
+		snd_printk("Requested rate %d is not supported\n", 
+				runtime->rate); return -1;
+	}
+
+	pcm_play_ctrl.burst = (chip->burst == 128)?AUDIO_128BYTE_BURST:
+				AUDIO_32BYTE_BURST;
+	
+	pcm_play_ctrl.loopBack = chip->loopback;
+	
+	if (audio_stream->stereo) {
+		pcm_play_ctrl.monoMode = AUDIO_PLAY_MONO_OFF;
+	}
+	else {
+		switch (audio_stream->mono_mode) {
+		case MONO_LEFT:
+			pcm_play_ctrl.monoMode = AUDIO_PLAY_LEFT_MONO;
+			break;
+		case MONO_RIGHT:
+			pcm_play_ctrl.monoMode = AUDIO_PLAY_RIGHT_MONO;
+			break;
+		case MONO_BOTH:
+		default:
+			pcm_play_ctrl.monoMode = AUDIO_PLAY_BOTH_MONO;
+			break;
+		}
+	}
+	
+	if (audio_stream->format == SAMPLE_16IN16) {
+		pcm_play_ctrl.sampleSize = SAMPLE_16BIT;
+		i2s_play_ctrl.sampleSize = SAMPLE_16BIT;
+	}
+	else if (audio_stream->format == SAMPLE_24IN32) {
+		pcm_play_ctrl.sampleSize = SAMPLE_24BIT;
+		i2s_play_ctrl.sampleSize = SAMPLE_24BIT;
+		
+	}
+	else if (audio_stream->format == SAMPLE_32IN32) {
+		pcm_play_ctrl.sampleSize = SAMPLE_32BIT;
+		i2s_play_ctrl.sampleSize = SAMPLE_32BIT;
+	}
+	else {
+		snd_printk("Requested format %d is not supported\n", runtime->format);
+		return -1;
+	}
+
+	/* buffer and period sizes in frame */
+	pcm_play_ctrl.bufferPhyBase = audio_stream->dma_addr;
+	pcm_play_ctrl.bufferSize = audio_stream->dma_size;
+	pcm_play_ctrl.intByteCount = audio_stream->period_size;
+
+	/* I2S playback streem stuff */
+	/*i2s_play_ctrl.sampleSize = pcm_play_ctrl.sampleSize;*/
+	i2s_play_ctrl.justification = I2S_JUSTIFIED;
+	i2s_play_ctrl.sendLastFrame = 0;
+
+	spdif_play_ctrl.nonPcm = MV_FALSE;
+	
+	spdif_play_ctrl.validity = chip->ch_stat_valid;
+
+	if (audio_stream->stat_mem) {
+		spdif_play_ctrl.userBitsFromMemory = MV_TRUE;
+		spdif_play_ctrl.validityFromMemory = MV_TRUE;
+		spdif_play_ctrl.blockStartInternally = MV_FALSE;
+	} else {
+		spdif_play_ctrl.userBitsFromMemory = MV_FALSE;
+		spdif_play_ctrl.validityFromMemory = MV_FALSE;
+		spdif_play_ctrl.blockStartInternally = MV_TRUE;
+	}
+
+	/* If this is non-PCM sound, mute I2S channel */
+	spin_lock_irq(&chip->reg_lock);
+
+	if (!(mv88fx_snd_readl(chip, MV_AUDIO_PLAYBACK_CTRL_REG(chip->port)) & 
+			(APCR_PLAY_I2S_ENABLE_MASK | APCR_PLAY_SPDIF_ENABLE_MASK))) {
+
+	     if (MV_OK != mvAudioDCOCtrlSet(chip->port, &dco_ctrl)) {
+		snd_printk("Failed to initialize DCO clock control.\n");
+		return -1;
+	}
+	}
+
+	if (audio_stream->clock_src == DCO_CLOCK)
+	     while ((mv88fx_snd_readl(chip, MV_AUDIO_SPCR_DCO_STATUS_REG(chip->port)) & 
+			ASDSR_DCO_LOCK_MASK) == 0);
+	else if (audio_stream->clock_src == SPCR_CLOCK)
+	     while ((mv88fx_snd_readl(chip, MV_AUDIO_SPCR_DCO_STATUS_REG(chip->port)) & 
+			ASDSR_SPCR_LOCK_MASK) == 0);
+			
+	if (MV_OK != mvAudioPlaybackControlSet(chip->port, &pcm_play_ctrl)) {
+		snd_printk("Failed to initialize PCM playback control.\n");
+		return -1;
+	}
+
+	if (MV_OK != mvI2SPlaybackCtrlSet(chip->port, &i2s_play_ctrl)) {
+		snd_printk("Failed to initialize I2S playback control.\n");
+		return -1;
+	}
+
+	mvSPDIFPlaybackCtrlSet(chip->port, &spdif_play_ctrl);
+
+	spin_unlock_irq(&chip->reg_lock);
+
+#if 0 
+	mv88fx_snd_debug("runtime->xfer_align=%d\n",(int)runtime->xfer_align);
+	mv88fx_snd_debug("runtime->format=%d\n",runtime->format);
+	mv88fx_snd_debug("runtime->channels=%d\n",runtime->channels);
+	mv88fx_snd_debug("runtime->rate=%d\n",runtime->rate);
+	mv88fx_snd_debug("runtime->dma_addr=0x%x\n",runtime->dma_addr);
+
+	mv88fx_snd_debug("runtime->dma_area=0x%x\n",(unsigned int)runtime->dma_area);
+	mv88fx_snd_debug("runtime->frame_bits=0x%x\n",runtime->frame_bits);
+	mv88fx_snd_debug("runtime->period_size=0x%x\n",
+		   (unsigned int)runtime->period_size);
+	mv88fx_snd_debug("runtime->buffer_size=0x%x\n",
+		   (unsigned int)runtime->buffer_size); 
+	mv88fx_snd_debug("bufferPhyBase=0x%x\n",runtime->dma_addr);
+	mv88fx_snd_debug("bufferSize=0x%x\n",pcm_play_ctrl.bufferSize);
+	mv88fx_snd_debug("intByteCount=0x%x.\n",pcm_play_ctrl.intByteCount);
+
+#endif
+	
+	return 0;
+}
+
+
+int mv88fx_snd_hw_capture_set(struct mv88fx_snd_chip	*chip)
+{
+        struct mv88fx_snd_stream *audio_stream = 
+		chip->stream[CAPTURE]; 
+	struct snd_pcm_substream *substream = audio_stream->substream;
+	struct snd_pcm_runtime *runtime = substream->runtime;
+	
+	MV_AUDIO_RECORD_CTRL 	pcm_rec_ctrl;
+	MV_I2S_RECORD_CTRL	i2s_rec_ctrl;
+	MV_AUDIO_FREQ_DATA	dco_ctrl;
+
+#ifdef CONFIG_MACH_DOVE_RD_AVNG
+	int phoneInDetected;
+#endif
+
+	dco_ctrl.offset = chip->dco_ctrl_offst;
+
+	switch(audio_stream->rate) {
+	case 44100:
+		dco_ctrl.baseFreq = AUDIO_FREQ_44_1KH;
+		break;
+	case 48000:
+		dco_ctrl.baseFreq = AUDIO_FREQ_48KH;
+		break;
+	case 96000:
+		dco_ctrl.baseFreq = AUDIO_FREQ_96KH;
+		break;
+	default:
+		snd_printk("Requested rate %d is not supported\n", 
+				runtime->rate); return -1;
+	}
+	
+	pcm_rec_ctrl.burst = (chip->burst == 128)?AUDIO_128BYTE_BURST:
+				AUDIO_32BYTE_BURST;
+
+	if (audio_stream->format == SAMPLE_16IN16) {
+		pcm_rec_ctrl.sampleSize = SAMPLE_16BIT;
+	}
+	else if (audio_stream->format == SAMPLE_24IN32) {
+		pcm_rec_ctrl.sampleSize = SAMPLE_24BIT;
+	}
+	else if (audio_stream->format == SAMPLE_32IN32) {
+		pcm_rec_ctrl.sampleSize = SAMPLE_32BIT;
+	}
+	else {
+		snd_printk("Requested format %d is not supported\n", runtime->format);
+		return -1;
+	}
+
+	pcm_rec_ctrl.mono = (audio_stream->stereo) ? MV_FALSE : MV_TRUE;
+
+	if (pcm_rec_ctrl.mono) {
+		switch (audio_stream->mono_mode) {
+		case MONO_LEFT:
+			pcm_rec_ctrl.monoChannel = AUDIO_REC_LEFT_MONO;
+			break;
+		default:
+		case MONO_RIGHT:
+			pcm_rec_ctrl.monoChannel = AUDIO_REC_RIGHT_MONO;
+			break;
+		}
+		
+	}
+	else pcm_rec_ctrl.monoChannel = AUDIO_REC_LEFT_MONO;
+		
+
+	pcm_rec_ctrl.bufferPhyBase = audio_stream->dma_addr;
+	pcm_rec_ctrl.bufferSize = audio_stream->dma_size;
+	
+	pcm_rec_ctrl.intByteCount = audio_stream->period_size;
+
+	/* I2S record streem stuff */
+	i2s_rec_ctrl.sample = pcm_rec_ctrl.sampleSize;
+	i2s_rec_ctrl.justf = I2S_JUSTIFIED;
+
+	spin_lock_irq(&chip->reg_lock);
+
+	/* set clock only if record is not enabled*/
+	if (!(mv88fx_snd_readl(chip, MV_AUDIO_RECORD_CTRL_REG(chip->port)) & 
+			(ARCR_RECORD_SPDIF_EN_MASK | ARCR_RECORD_I2S_EN_MASK))) {
+
+		if (MV_OK != mvAudioDCOCtrlSet(chip->port, &dco_ctrl)) {
+		snd_printk("Failed to initialize DCO clock control.\n");
+		return -1;
+	}
+	}
+	
+	if (MV_OK != mvAudioRecordControlSet(chip->port, &pcm_rec_ctrl)) {
+		snd_printk("Failed to initialize PCM record control.\n");
+		return -1;
+	}
+
+	if (MV_OK != mvI2SRecordCntrlSet(chip->port, &i2s_rec_ctrl)) {
+		snd_printk("Failed to initialize I2S record control.\n");
+		return -1;
+	}
+
+#ifdef CONFIG_MACH_DOVE_RD_AVNG
+	if (machine_is_dove_rd_avng()) {
+		phoneInDetected = gpio_get_value(53);
+		
+		if (phoneInDetected < 0) {
+			snd_printk("Failed to detect phone-in.\n");
+		} else {
+			int input_type;
+			snd_printk("detect phone-in.\n");
+			if (! phoneInDetected) {
+				input_type = 2;	/* external MIC */
+			} else {
+				input_type = 1;	/* internal MIC */
+			}
+			cs42l51_input_select(chip->port, input_type);
+		}
+	}
+#endif
+
+	spin_unlock_irq(&chip->reg_lock);
+
+#if 0
+
+	mv88fx_snd_debug("pcm_rec_ctrl.bufferSize=0x%x\n",(int)pcm_rec_ctrl.bufferSize);
+	mv88fx_snd_debug("pcm_rec_ctrl.intByteCount=0x%x\n",(int)pcm_rec_ctrl.intByteCount);
+
+	mv88fx_snd_debug("runtime->xfer_align=%d\n",(int)runtime->xfer_align);
+	mv88fx_snd_debug("runtime->format=%d\n",runtime->format);
+	mv88fx_snd_debug("runtime->channels=%d\n",runtime->channels);
+	mv88fx_snd_debug("runtime->rate=%d\n",runtime->rate);
+	mv88fx_snd_debug("runtime->dma_addr=0x%x\n",runtime->dma_addr);
+
+	mv88fx_snd_debug("runtime->dma_area=0x%x\n",(unsigned int)runtime->dma_area);
+	mv88fx_snd_debug("runtime->frame_bits=0x%x\n",runtime->frame_bits);
+	mv88fx_snd_debug("runtime->period_size=0x%x\n",
+		   (unsigned int)runtime->period_size);
+	mv88fx_snd_debug("runtime->buffer_size=0x%x\n",
+		   (unsigned int)runtime->buffer_size); 
+	mv88fx_snd_debug("bufferPhyBase=0x%x\n",runtime->dma_addr);
+
+#endif
+	
+
+	return 0;
+
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_audio/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_audio/Makefile
@@ -0,0 +1,11 @@
+#
+# Makefile for the Marvell Audio ALSA Device Driver
+#
+
+ifdef CONFIG_MV_HAL_RULES_PATH
+include $(srctree)/$(subst ",,$(CONFIG_MV_HAL_RULES_PATH))
+endif
+
+obj-$(CONFIG_SND_MRVL_AUDIO) += snd-mv88fx.o
+snd-mv88fx-objs		     += mv88fx-pcm.o  cs42l51-hal.o mv88fx-hal.o
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_audio/cs42l51-hal.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_audio/cs42l51-hal.c
@@ -0,0 +1,267 @@
+/*
+ *
+ *	Marvell Orion Alsa Sound driver
+ *
+ *	Author: Maen Suleiman
+ *	Copyright (C) 2008 Marvell Ltd.
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/version.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)
+#include <sound/driver.h>
+#endif
+#include <sound/core.h>
+#include <sound/initval.h>
+#include <sound/control.h>
+#include <sound/pcm.h>
+#include <sound/asoundef.h>
+#include <sound/asound.h>
+
+#include "twsi/mvTwsi.h"
+#include "audio/dac/mvCLAudioCodec.h"
+#include "boardEnv/mvBoardEnvLib.h"
+
+
+
+/*
+ * Initialize the audio decoder.
+ */
+int
+cs42l51_init(MV_U8 port)
+{
+    MV_AUDIO_CODEC_DEV codec_params;
+    unsigned char reg_data;
+    
+    codec_params.chanNum = mvBoardA2DTwsiChanNumGet(port);
+    codec_params.ADCMode = MV_I2S_MODE;
+    codec_params.DACDigitalIFFormat = MV_I2S_UP_TO_24_BIT;
+    codec_params.twsiSlave.moreThen256 = MV_FALSE;
+    codec_params.twsiSlave.validOffset = MV_TRUE;
+    codec_params.twsiSlave.slaveAddr.address = mvBoardA2DTwsiAddrGet(port);
+    codec_params.twsiSlave.slaveAddr.type = mvBoardA2DTwsiAddrTypeGet(port);
+    if(mvCLAudioCodecInit(&codec_params) == MV_FALSE)
+    {
+        printk("Error - Cannot initialize audio decoder.at address =0x%x",
+				codec_params.twsiSlave.slaveAddr.address);
+        return -1;
+    }
+
+#ifdef CONFIG_MACH_DOVE_RD_AVNG
+    /* Default Gain */
+    mvCLAudioCodecRegSet(&codec_params,0x8,
+                         mvCLAudioCodecRegGet(&codec_params,0x8)|0xE0);
+#endif
+
+    /* Use the signal processor.               */
+    mvCLAudioCodecRegSet(&codec_params,0x9,0x40);
+    
+    /* Unmute PCM-A & PCM-B and set default      */
+    mvCLAudioCodecRegSet(&codec_params,0x10,0x10);
+    mvCLAudioCodecRegSet(&codec_params,0x11,0x10);
+
+    /* default for AOUTx*/
+    mvCLAudioCodecRegSet(&codec_params,0x16,0x05);
+    mvCLAudioCodecRegSet(&codec_params,0x17,0x05);
+
+    /* swap channels */
+    mvCLAudioCodecRegSet(&codec_params,0x18,0xff);
+    if (0) {
+	    int i;
+	    for (i=1; i<= 0x21 ; i++) {
+		    reg_data = mvCLAudioCodecRegGet(&codec_params,i);
+		    printk("CLS reg=0x%02x val=0x%02x\n",i,reg_data);
+	    }
+	    
+    }
+    
+    return 0;
+}
+
+#define MVAUD_NUM_VOLUME_STEPS  (40)
+static MV_U8 auddec_volume_mapping[MVAUD_NUM_VOLUME_STEPS] =
+{
+	0x19,	0xB2,	0xB7,	0xBD,	0xC3,	0xC9,	0xCF,	0xD5,
+	0xD8,	0xE1,	0xE7,	0xED,	0xF3,	0xF9,	0xFF,	0x00,	
+	0x01,	0x02,	0x03,	0x04,	0x05,	0x06,	0x07,	0x08,	
+	0x09,	0x0A,	0x0B,	0x0C,	0x0D,	0x0E,	0x0F,	0x10,	
+	0x11,	0x12,	0x13,	0x14,	0x15,	0x16,	0x17,	0x18
+};
+
+
+/*
+ * Get the audio decoder volume for both channels.
+ * 0 is lowest volume, MVAUD_NUM_VOLUME_STEPS-1 is the highest volume.
+ */
+
+void
+cs42l51_vol_get(MV_U8 port, MV_U8 *vol_list)
+{
+    MV_AUDIO_CODEC_DEV  codec_params;
+    MV_U8   reg_data;
+    MV_U32  i;
+    MV_U32  vol_idx;
+
+    codec_params.chanNum = mvBoardA2DTwsiChanNumGet(port);
+    codec_params.ADCMode = MV_I2S_MODE;
+    codec_params.DACDigitalIFFormat = MV_I2S_UP_TO_24_BIT;
+    codec_params.twsiSlave.moreThen256 = MV_FALSE;
+    codec_params.twsiSlave.validOffset = MV_TRUE;
+	codec_params.twsiSlave.slaveAddr.address = mvBoardA2DTwsiAddrGet(port);
+	codec_params.twsiSlave.slaveAddr.type = mvBoardA2DTwsiAddrTypeGet(port);
+
+
+    for(vol_idx = 0; vol_idx < 2; vol_idx++)
+    {
+        reg_data = mvCLAudioCodecRegGet(&codec_params,0x16 + vol_idx);
+
+       /*printk("\tVolume was get: 0x%x.\n",
+                                reg_data);*/
+
+        /* Look for the index that mapps to this dB value.  */
+        for(i = 0; i < MVAUD_NUM_VOLUME_STEPS; i++)
+        {
+		if (reg_data == auddec_volume_mapping[i])
+			break;
+		if (( auddec_volume_mapping[i] > auddec_volume_mapping[MVAUD_NUM_VOLUME_STEPS-1]) 
+					&& (reg_data > auddec_volume_mapping[i]) 
+					&& (reg_data < auddec_volume_mapping[i+1]))
+			break;
+		 
+        }
+
+        vol_list[vol_idx] = i;
+       /*printk("\tvol_list[%d] = %d.\n",vol_idx,
+                                vol_list[vol_idx]);*/
+
+    }
+
+    return;
+}
+
+
+/*
+ * Set the audio decoder volume for both channels.
+ * 0 is lowest volume, MVAUD_NUM_VOLUME_STEPS-1 is the highest volume.
+ */
+void
+cs42l51_vol_set(MV_U8 port, MV_U8 *vol_list)
+{
+    MV_AUDIO_CODEC_DEV  codec_params;
+    MV_U32  vol_idx;
+
+    codec_params.chanNum = mvBoardA2DTwsiChanNumGet(port);
+    codec_params.ADCMode = MV_I2S_MODE;
+    codec_params.DACDigitalIFFormat = MV_I2S_UP_TO_24_BIT;
+    codec_params.twsiSlave.moreThen256 = MV_FALSE;
+    codec_params.twsiSlave.validOffset = MV_TRUE;
+    codec_params.twsiSlave.slaveAddr.address = mvBoardA2DTwsiAddrGet(port);
+    codec_params.twsiSlave.slaveAddr.type = mvBoardA2DTwsiAddrTypeGet(port);
+
+   
+    for(vol_idx = 0; vol_idx < 2; vol_idx++)
+    {
+        /*printk("\tvol_list[%d] = %d.\n",vol_idx,
+                                vol_list[vol_idx]);*/
+
+        if(vol_list[vol_idx] >= MVAUD_NUM_VOLUME_STEPS)
+		vol_list[vol_idx] = MVAUD_NUM_VOLUME_STEPS -1;
+
+        mvCLAudioCodecRegSet(&codec_params,0x16 + vol_idx,
+                             auddec_volume_mapping[vol_list[vol_idx]]);
+
+        /*printk("\tVolume was set to 0x%x.\n",
+                                auddec_volume_mapping[vol_list[vol_idx]]);*/
+    }
+
+    return;
+}
+
+#ifdef CONFIG_MACH_DOVE_RD_AVNG
+
+#define lineIn		0
+#define internalMic	1
+#define phoneIn		2
+
+/*
+ * Set the audio codec's ADC path.
+ */
+void
+cs42l51_input_select(MV_U8 port, int type)
+{
+    MV_AUDIO_CODEC_DEV codec_params;
+
+    codec_params.chanNum = mvBoardA2DTwsiChanNumGet(port);
+    codec_params.ADCMode = MV_I2S_MODE;
+    codec_params.DACDigitalIFFormat = MV_I2S_UP_TO_24_BIT;
+    codec_params.twsiSlave.moreThen256 = MV_FALSE;
+    codec_params.twsiSlave.validOffset = MV_TRUE;
+    codec_params.twsiSlave.slaveAddr.address = mvBoardA2DTwsiAddrGet(port);
+    codec_params.twsiSlave.slaveAddr.type = mvBoardA2DTwsiAddrTypeGet(port);
+
+    if (type == internalMic) {
+        /* Set PDN bit first */
+        mvCLAudioCodecRegSet(&codec_params,0x02,0x01);
+        /* Wait until codec is in standby mode */
+        mdelay(10);
+        /* Enable PDN_PGAB and PDN_ADCB also */
+        mvCLAudioCodecRegSet(&codec_params,0x02,0x15);
+        /* Enable PDN_MICB and disable PDN_MICA and PDN_MICBIAS */
+        mvCLAudioCodecRegSet(&codec_params,0x03,0xA8);
+        /* MICBIAS_SEL set to AIN2B, disable MICB_BOOST and enable MICA_BOOST */
+        mvCLAudioCodecRegSet(&codec_params,0x05,0x11);
+        /* Set AIN3A->Pre Amp->PGAA and AIN1B->PGAB */
+        mvCLAudioCodecRegSet(&codec_params,0x07,0x30);
+        /* Disable PDN bit last */
+        mvCLAudioCodecRegSet(&codec_params,0x02,0x14);
+    } else if (type == phoneIn) {
+        /* Set PDN bit first */
+        mvCLAudioCodecRegSet(&codec_params,0x02,0x01);
+        /* Wait until codec is in standby mode */
+        mdelay(10);
+        /* Enable PDN_PGAA and PDN_ADCA also */
+        mvCLAudioCodecRegSet(&codec_params,0x02,0x0B);
+        /* Enable PDN_MICA and disable PDN_MICB and PDN_MICBIAS */
+        mvCLAudioCodecRegSet(&codec_params,0x03,0xA4);
+        /* MICBIAS_SEL set to AIN2B, disable MICA_BOOST and enable MICB_BOOST */
+        mvCLAudioCodecRegSet(&codec_params,0x05,0x12);
+        /* Set AIN3B->Pre Amp->PGAB and AIN1A->PGAA */
+        mvCLAudioCodecRegSet(&codec_params,0x07,0xC0);
+        /* Disable PDN bit last */
+        mvCLAudioCodecRegSet(&codec_params,0x02,0x0A);
+    } else {
+        /* default to LineIn */
+        /* Set PDN bit first */
+        mvCLAudioCodecRegSet(&codec_params,0x02,0x01);
+        /* Wait until codec is in standby mode */
+        mdelay(10);
+        /* Enable PDN_MICB, PDN_MICA, and PDN_MICBIAS */
+        mvCLAudioCodecRegSet(&codec_params,0x03,0xAE);
+        /* MICBIAS_SEL set to AIN3B, disable both MICB_BOOST and MICA_BOOST */
+        mvCLAudioCodecRegSet(&codec_params,0x05,0x0);
+        /* Set AIN1A->PGAA and AIN1B->PGAB */
+        mvCLAudioCodecRegSet(&codec_params,0x07,0x0);
+        /* Disable PDN bit last */
+        mvCLAudioCodecRegSet(&codec_params,0x02,0x0);
+    }
+
+    if (0) {
+	    int i;
+	    MV_U8 reg_data;
+
+	    for (i=1; i<= 0x21 ; i++) {
+		    reg_data = mvCLAudioCodecRegGet(&codec_params,i);
+		    printk("CLS reg=0x%02x val=0x%02x\n",i,reg_data);
+	    }
+    }
+}
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sdio/Kconfig
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sdio/Kconfig
@@ -0,0 +1,14 @@
+menu "Marvell SDIO\MMC driver"
+	depends on MV_INCLUDE_SDIO
+
+
+config MMC_MVSDMMC
+	tristate "Marvell SDIO host driver"
+	depends on MMC && MV_INCLUDE_SDIO
+	---help---
+	  This selects the Marvell SDIO host driver
+	  say Y or M here.
+	  If unsure, say N.
+
+endmenu
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sdio/mvsdmmc.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sdio/mvsdmmc.h
@@ -0,0 +1,162 @@
+/*
+ *
+ *  Copyright (C) All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef _MVSDMMC_INCLUDE
+#define _MVSDMMC_INCLUDE
+
+#define MVSDMMC_DMA_SIZE		65536
+
+#define MVSDMMC_CMD_TIMEOUT		2 /* 100 usec*/
+/*
+ * The base MMC clock rate
+ */
+#define MVSDMMC_CLOCKRATE_MIN		100000
+#define MVSDMMC_CLOCKRATE_MAX		50000000
+
+#define MVSDMMC_BASE_FAST_CLOCK		100000000 /* FIXME: Should be according 
+to device */
+
+
+/* SDIO register */
+#define SDIO_SYS_ADDR_LOW		0x000
+#define SDIO_SYS_ADDR_HI		0x004
+#define SDIO_BLK_SIZE			0x008
+#define SDIO_BLK_COUNT			0x00c
+#define SDIO_ARG_LOW			0x010
+#define SDIO_ARG_HI			0x014
+#define SDIO_XFER_MODE			0x018
+#define SDIO_CMD			0x01c
+#define SDIO_RSP(i)			(0x020 + ((i)<<2))
+#define SDIO_RSP0			0x020
+#define SDIO_RSP1			0x024
+#define SDIO_RSP2			0x028
+#define SDIO_RSP3			0x02c
+#define SDIO_RSP4			0x030
+#define SDIO_RSP5			0x034
+#define SDIO_RSP6			0x038
+#define SDIO_RSP7			0x03c
+#define SDIO_BUF_DATA_PORT		0x040
+#define SDIO_RSVED			0x044
+#define SDIO_PRESENT_STATE0		0x048
+#define CARD_BUSY			((unsigned short)0x1 << 1)
+#define CMD_INHIBIT			((unsigned short)0x1 << 0)
+#define CMD_TXACTIVE			((unsigned short)0x1 << 8)
+#define CMD_RXACTIVE			((unsigned short)0x1 << 9)
+#define CMD_AUTOCMD12ACTIVE		((unsigned short)0x1 << 14)
+#define SDIO_PRESENT_STATE1		0x04c
+#define SDIO_HOST_CTRL			0x050
+#define SDIO_BLK_GAP_CTRL		0x054
+#define SDIO_CLK_CTRL			0x058
+#define SDIO_SW_RESET			0x05c
+#define SDIO_NOR_INTR_STATUS		0x060
+#define SDIO_ERR_INTR_STATUS		0x064
+#define SDIO_NOR_STATUS_EN		0x068
+#define SDIO_ERR_STATUS_EN		0x06c
+#define SDIO_NOR_INTR_EN		0x070
+#define SDIO_ERR_INTR_EN		0x074
+#define SDIO_AUTOCMD12_ERR_STATUS	0x078
+#define SDIO_CURR_BLK_SIZE		0x07c
+#define SDIO_CURR_BLK_COUNT		0x080
+#define SDIO_AUTOCMD12_ARG_LOW		0x084
+#define SDIO_AUTOCMD12_ARG_HI		0x088
+#define SDIO_AUTOCMD12_INDEX		0x08c
+#define SDIO_AUTO_RSP0			0x090
+#define SDIO_AUTO_RSP1			0x094
+#define SDIO_AUTO_RSP2			0x098
+#define SDIO_CLK_DIV			0x128
+
+
+
+/* SDIO_CMD */
+#define SDIO_CMD_NO_RESPONSE		(0<<0)
+#define SDIO_CMD_136_RESPONSE		(1<<0)
+#define SDIO_CMD_48_RESPONSE		(2<<0)
+#define SDIO_CMD_48_RESPONSE_BUSY	(3<<0)
+
+#define SDIO_CMD_CHECK_DATACRC16	(1<<2)
+#define SDIO_CMD_CHECK_CMDCRC		(1<<3)
+#define SDIO_CMD_INDX_CHECK		(1<<4)
+#define SDIO_CMD_DATA_PRESENT		(1<<5)
+#define SDIO_UNEXPEXTED_RESP		(1<<7)
+
+
+
+
+
+/* SDIO_XFER_MODE */
+#define SDIO_XFER_MODE_STOP_CLK		(1<<5)
+#define SDIO_XFER_MODE_HW_WR_DATA_EN	(1<<1)
+#define SDIO_XFER_MODE_AUTO_CMD12	(1<<2)
+#define SDIO_XFER_MODE_INT_CHK_EN	(1<<3)
+#define SDIO_XFER_MODE_TO_HOST		(1<<4)
+
+
+/************** SDIO_HOST_CTRL  ****/
+#define SDIO_HOST_CTRL_PUSH_PULL_EN 		1
+#define SDIO_HOST_CTRL_CARD_TYPE_MEM_ONLY 	0
+#define SDIO_HOST_CTRL_CARD_TYPE_IO_ONLY 	(1<<1)
+#define SDIO_HOST_CTRL_CARD_TYPE_IO_MEM_COMBO 	(2<<1)
+#define SDIO_HOST_CTRL_CARD_TYPE_IO_MMC 	(3<<1)
+#define SDIO_HOST_CTRL_BIG_ENDEAN 		(1<<3)
+#define SDIO_HOST_CTRL_LSB_FIRST 		(1<<4)
+#define SDIO_HOST_CTRL_ID_MODE_LOW_FREQ 	(1<<5)
+#define SDIO_HOST_CTRL_HALF_SPEED 		(1<<6)
+#define SDIO_HOST_CTRL_DATA_WIDTH_4_BITS 	(1<<9)
+#define SDIO_HOST_CTRL_HI_SPEED_EN 		(1<<10)
+#define SDIO_HOST_CTRL_TMOUT_SHIFT 		11
+#define SDIO_HOST_CTRL_TMOUT_EN 		(1<<15)
+
+#define SDIO_HOST_CTRL_DFAULT_OPEN_DRAIN 	\
+		(0xF<<SDIO_HOST_CTRL_TMOUT_SHIFT)
+#define SDIO_HOST_CTRL_DFAULT_PUSH_PULL 	\
+		((0xF<<SDIO_HOST_CTRL_TMOUT_SHIFT)|SDIO_HOST_CTRL_PUSH_PULL_EN)
+
+/* nor status mask */
+#define SDIO_NOR_ERROR			((unsigned short)0x1 << 15)
+#define SDIO_NOR_UNEXP_RSP		((unsigned short)0x1 << 14)
+#define SDIO_NOR_AUTOCMD12_DONE		((unsigned short)0x1 << 13)
+#define SDIO_NOR_SUSPENSE_ON		((unsigned short)0x1 << 12)
+#define SDIO_NOR_LMB_FF_8W_AVAIL	((unsigned short)0x1 << 11)
+#define SDIO_NOR_LMB_FF_8W_FILLED	((unsigned short)0x1 << 10)
+#define SDIO_NOR_READ_WAIT_ON		((unsigned short)0x1 << 9)
+#define SDIO_NOR_CARD_INT		((unsigned short)0x1 << 8)
+#define SDIO_NOR_READ_READY		((unsigned short)0x1 << 5)
+#define SDIO_NOR_WRITE_READY		((unsigned short)0x1 << 4)
+#define SDIO_NOR_DMA_INI		((unsigned short)0x1 << 3)
+#define SDIO_NOR_BLK_GAP_EVT		((unsigned short)0x1 << 2)
+#define SDIO_NOR_XFER_DONE		((unsigned short)0x1 << 1)
+#define SDIO_NOR_CMD_DONE		((unsigned short)0x1 << 0)
+
+/* err status mask */
+#define SDIO_ERR_CRC_STATUS		((unsigned short)0x1 << 14)
+#define SDIO_ERR_CRC_STARTBIT		((unsigned short)0x1 << 13)
+#define SDIO_ERR_CRC_ENDBIT		((unsigned short)0x1 << 12)
+#define SDIO_ERR_RESP_TBIT		((unsigned short)0x1 << 11)
+#define SDIO_ERR_SIZE			((unsigned short)0x1 << 10)
+#define SDIO_ERR_CMD_STARTBIT		((unsigned short)0x1 << 9)
+#define SDIO_ERR_AUTOCMD12		((unsigned short)0x1 << 8)
+#define SDIO_ERR_DATA_ENDBIT		((unsigned short)0x1 << 6)
+#define SDIO_ERR_DATA_CRC		((unsigned short)0x1 << 5)
+#define SDIO_ERR_DATA_TIMEOUT		((unsigned short)0x1 << 4)
+#define SDIO_ERR_CMD_INDEX		((unsigned short)0x1 << 3)
+#define SDIO_ERR_CMD_ENDBIT		((unsigned short)0x1 << 2)
+#define SDIO_ERR_CMD_CRC		((unsigned short)0x1 << 1)
+#define SDIO_ERR_CMD_TIMEOUT		((unsigned short)0x1 << 0)
+
+#define SDIO_POLL_MASK 			(0xffff) /* enable all for polling */
+
+
+#define SDIO_CMD_RSP_NONE		((unsigned short)0x0)
+#define SDIO_CMD_RSP_136		((unsigned short)0x1)
+#define SDIO_CMD_RSP_48			((unsigned short)0x2)
+#define SDIO_CMD_RSP_48BUSY		((unsigned short)0x3)
+
+
+#endif /* _MVSDMMC_INCLUDE */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sdio/mvsdmmc.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sdio/mvsdmmc.c
@@ -0,0 +1,1677 @@
+/*
+*
+*	Marvell Orion SD\MMC\SDIO driver
+*
+*	Author: Maen Suleiman
+*	Copyright (C) 2007 Marvell Ltd.
+*
+*
+* This program is free software; you can redistribute it and/or modify
+* it under the terms of the GNU General Public License version 2 as
+* published by the Free Software Foundation.
+*
+*/
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/ioport.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/dma-mapping.h>
+#include <linux/mmc/host.h>
+#include <linux/proc_fs.h>
+
+#include <asm/dma.h>
+#include <asm/io.h>
+#include <asm/scatterlist.h>
+#include <asm/sizes.h>
+
+
+#include "mvsdmmc.h"
+
+/* #define MVSDMMC_DUMP_REGS_ON_CMD */
+#define MVSDMMC_DUMP_ALL_REGS_ON_ERROR
+/*#define MVSDMMC_DBG_FUNC_ENTRY*/
+
+#define MVSDMMC_DBG_ERROR
+
+#if defined(MVSDMMC_DBG_FUNC_ENTRY)
+#define mvsdmmc_dbg_enter()	mvsdmmc_debug("=>%s\n", __func__);
+#define mvsdmmc_dbg_exit()	mvsdmmc_debug("<=%s\n",  __func__);
+#else
+#define mvsdmmc_dbg_enter()
+#define mvsdmmc_dbg_exit()
+#endif
+
+#define mvsdmmc_warning(fmt, arg...) printk(KERN_WARNING fmt, ##arg)
+#ifdef MVSDMMC_DEBUG
+#define mvsdmmc_debug(fmt, arg...) printk(KERN_DEBUG fmt, ##arg)
+#else
+	#define mvsdmmc_debug(a...)
+#endif
+
+#if defined(MVSDMMC_DBG_ERROR)
+	#define mvsdmmc_debug_error(fmt, arg...)  printk(KERN_ERR fmt, ##arg)
+#else
+	#define mvsdmmc_debug_error(a...)
+#endif
+
+#define DRIVER_NAME	"mvsdmmc"
+
+struct mvsdmmc_host_stat {
+
+	int total_requests;
+	int copied_data;
+	int total_data;
+	int unaligned_buf;
+	int cache_unaligned_buf;
+	int ints;
+	int error_ints;
+	int card_ints;
+	int unfinished_dma;
+	int multi_sg;
+	int buf_256;
+	int cmd_timeout;
+	int int_timeout;
+	int empty_int;
+	int first_int_status;
+	int first_error_status;
+	int detect_int;
+	int first_err_int;	/* request number of first
+					error interrupt*/
+	int first_unfinished_dma;/* request number of
+					first unfinished dma*/
+};
+
+struct mvsdmmc_host {
+	struct mmc_host		*mmc;		/* associated mmc structure*/
+	struct platform_device 	*pdev;		/* platform device */
+	spinlock_t		lock;		/* spin lock of the host*/
+	struct resource		*res;		/* resource for IRQ and base*/
+	void __iomem		*base;		/* base address of the host
+						registers*/
+	int			irq;		/* host IRQ number*/
+	int			irq_detect;	/* host IRQ number for
+						insertion/detection*/
+	char			*dma_buffer;	/* virtual address for
+						temp buffer*/
+	dma_addr_t		dma_addr;	/* Physical address for
+						remp buffer */
+	unsigned int		dma_len;	/* sg fragments number
+						of the request*/
+	int			size;		/* Total size of transfer */
+	unsigned char		power_mode; 	/* power status*/
+	struct mmc_request	*mrq;		/* current mmc request
+						structure*/
+	struct mmc_command	*cmd;		/* current mmc command
+						structure */
+	struct mmc_data		*data;		/* current mmc data structure */
+	unsigned short		intr_status; 	/* interrupt status on IRQ*/
+	int			polling;	/* polling or interrupt mode*/
+	unsigned short		intr_en;	/* enabled interrupts
+						during command- status*/
+	unsigned short		intr_cmd;	/* enabled interrupts
+						during command*/
+	unsigned int		cmd_data;	/* if cmd\data are proccesed*/
+	#define	MVSDMMC_CMD	0x1
+	#define	MVSDMMC_DATA	0x2
+	#define	MVSDMMC_CMD12	0x4
+	unsigned int		pending_commands;/* commands on process*/
+	int			card_present;	/* if card present*/
+	struct timer_list	timer;		/* Timer for timeouts */
+	unsigned int		copy_buf;	/* copy to host buffer*/
+	struct mvsdmmc_host_stat	stat;		/* host statistics */
+};
+
+
+static int maxfreq = MVSDMMC_CLOCKRATE_MAX;
+static int highspeed = 1;
+static int maxfragments = 1;
+static int copy_always = 0;
+static int cardint = 1;
+static int polling = 0;
+static int sethsbit = 0;
+static int setlsbit = 0;
+static int width = 4;
+static int over_freq = 0;
+static int sdtimeout = 0xf;
+
+static int copy_256 = 0; /* copy buffers less than 256 bytes*/
+static int copy_un = 1; /* copy buffers not aligned to word*/
+static int copy_cl = 0; /* copy buffers not aligned to cache line*/
+
+static int detect = 1;
+static int dump_on_error;
+
+static void mvsdmmc_request_done(struct mvsdmmc_host *host);
+static void mvsdmmc_power_down(struct mmc_host *mmc);
+static void mvsdmmc_power_up(struct mmc_host *mmc);
+static void mvsdmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios);
+
+
+static inline void mvsdmmc_sg_to_dma(struct mvsdmmc_host *host,
+				     struct mmc_data *data);
+static inline void mvsdmmc_dma_to_sg(struct mvsdmmc_host *host,
+				     struct mmc_data *data);
+
+static irqreturn_t mvsdmmc_irq(int irq, void *dev);
+static irqreturn_t mvsdmmc_irq_detect(int irq, void *dev);
+
+#define mvsdmmc_writew(host, offs, val)	\
+		writew((val), (host->base + offs))
+
+
+static inline unsigned short mvsdmmc_readw(struct mvsdmmc_host *host,
+					   unsigned short offs)
+{
+	unsigned short val = readw((host->base + offs));
+	return (val);
+}
+
+
+#define mvsdmmc_bitset(host, offs, bitmask)	\
+		writew((readw(host->base + offs) | (bitmask)),	\
+			host->base + offs)
+
+#define mvsdmmc_bitreset(host, offs, bitmask)	\
+		writew((readw(host->base + offs) & (~(bitmask))),	\
+			host->base + offs)
+
+
+int mvsdmmc_read_procmem(char *buf, char **start, off_t offset,
+				int count, int *eof, void *data)
+{
+
+	int len = 0;
+	struct mvsdmmc_host *host = (struct mvsdmmc_host *)data;
+
+	len += sprintf(buf+len, "\ntotal requests=%d\n",
+		host->stat.total_requests);
+	len += sprintf(buf+len, "total data=%d\n",
+		host->stat.total_data);
+	len += sprintf(buf+len, "copied data=%d\n", host->stat.copied_data);
+	len += sprintf(buf+len, "multi sg=%d\n", host->stat.multi_sg);
+	len += sprintf(buf+len, "buffers small than 256=%d\n",
+		host->stat.buf_256);
+	len += sprintf(buf+len, "buffers not word aligned=%d\n",
+			 host->stat.unaligned_buf);
+	len += sprintf(buf+len, "buffers not cache line aligned=%d\n",
+			host->stat.cache_unaligned_buf);
+	len += sprintf(buf+len, "total interrupts=%d\n", host->stat.ints);
+	len += sprintf(buf+len, "total card ints=%d\n", host->stat.card_ints);
+	len += sprintf(buf+len, "total error ints=%d\n", host->stat.error_ints);
+	len += sprintf(buf+len, "Request num of first error int=%d\n",
+			host->stat.first_err_int);
+	len += sprintf(buf+len, "Status of int on first error int=0x%x\n",
+			(unsigned int)host->stat.first_int_status);
+	len += sprintf(buf+len, "Status of first error int=0x%x\n",
+			(unsigned int)host->stat.first_error_status);
+	len += sprintf(buf+len, "Empty interrupts=%d\n", host->stat.empty_int);
+	len += sprintf(buf+len, "Detect interrupts=%d\n",
+				host->stat.detect_int);
+	len += sprintf(buf+len, "Unifinished dma=%d\n",
+		host->stat.unfinished_dma);
+	len += sprintf(buf+len, "Request num of first unfinished dma=%d\n",
+			host->stat.first_unfinished_dma);
+	len += sprintf(buf+len, "interrupt timeouts=%d\n",
+		host->stat.int_timeout);
+	len += sprintf(buf+len, "command timeouts=%d\n",
+					host->stat.cmd_timeout);
+
+        *eof = 1;
+
+	memset(&host->stat , sizeof(struct mvsdmmc_host_stat), 0);
+
+	return len;
+
+}
+
+static void mvsdmmc_dump_registers(struct mvsdmmc_host *host,
+					unsigned short cmdreg)
+{
+	unsigned int reg;
+
+	for (reg = SDIO_SYS_ADDR_LOW; reg <= SDIO_AUTO_RSP2; reg += 4) {
+		if (reg == SDIO_CMD) {
+			mvsdmmc_debug("mvsdmmc: reg 0x%x = 0x%x \n", reg,
+							(unsigned int)cmdreg);
+			continue;
+		}
+
+		mvsdmmc_debug("mvsdmmc: reg 0x%x = 0x%x \n", reg,
+					(unsigned int)mvsdmmc_readw(host, reg));
+	}
+	for (reg = 0x100; reg <= 0x130; reg += 4) {
+		mvsdmmc_debug("mvsdmmc: reg 0x%x = 0x%x \n", reg,
+					(unsigned int)mvsdmmc_readw(host, reg));
+	}
+
+}
+
+/**
+ * mvsdmmc_usleep - sleep safely even with waitqueue interruptions
+ * @msecs: Time in useconds to sleep for
+ */
+static void mvsdmmc_usleep(unsigned int usecs)
+{
+	unsigned long timeout = usecs_to_jiffies(usecs) + 1;
+
+	while (timeout)
+		timeout = schedule_timeout_uninterruptible(timeout);
+}
+
+
+static void mvsdmmc_stop_clock(struct mvsdmmc_host *host)
+{
+
+	mvsdmmc_dbg_enter();
+	mvsdmmc_bitset(host, SDIO_XFER_MODE, SDIO_XFER_MODE_STOP_CLK);
+	mvsdmmc_dbg_exit();
+}
+
+static void mvsdmmc_enable_irq(struct mvsdmmc_host *host, unsigned int mask)
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&host->lock, flags);
+	host->intr_en |= mask;
+	mvsdmmc_writew(host, SDIO_NOR_INTR_EN, host->intr_en);
+	host->intr_cmd |= mask; /* intr_cmd is zeroed in mvsdmmc_start_cmd*/
+	if (mask == SDIO_NOR_CARD_INT)
+		mvsdmmc_bitset(host, SDIO_XFER_MODE,
+				SDIO_XFER_MODE_INT_CHK_EN);
+
+	spin_unlock_irqrestore(&host->lock, flags);
+}
+
+static void mvsdmmc_disable_irq(struct mvsdmmc_host *host, unsigned int mask)
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&host->lock, flags);
+	host->intr_en &= ~mask;
+	mvsdmmc_writew(host, SDIO_NOR_INTR_EN, host->intr_en);
+	if (mask == SDIO_NOR_CARD_INT)
+		mvsdmmc_bitreset(host, SDIO_XFER_MODE,
+				 SDIO_XFER_MODE_INT_CHK_EN);
+
+	spin_unlock_irqrestore(&host->lock, flags);
+}
+
+static void mvsdmmc_setup_data(struct mvsdmmc_host *host, struct mmc_data *data)
+{
+	char	*virt_addr = NULL;
+	dma_addr_t	phys_addr = 0;
+
+	mvsdmmc_dbg_enter();
+
+	host->stat.total_data++;
+
+	/*
+	* Calculate size.
+	*/
+	host->size = data->blocks * data->blksz;
+
+        if (copy_always)
+		host->copy_buf = 1;
+        else
+		host->copy_buf = 0;
+
+	if ((data->flags & MMC_DATA_READ) && (!host->copy_buf)) {
+
+		host->dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg,
+					   data->sg_len,
+					   DMA_BIDIRECTIONAL);
+		BUG_ON(host->dma_len == 0);
+		phys_addr = sg_dma_address(data->sg);
+
+		if (host->dma_len > 1) {
+			host->copy_buf = 1;
+			host->stat.multi_sg++;
+		}
+
+	}
+
+	if ((data->flags & MMC_DATA_WRITE) && (!host->copy_buf)) {
+
+		host->dma_len = dma_map_sg(mmc_dev(host->mmc),
+					   data->sg, data->sg_len,
+				   DMA_BIDIRECTIONAL);
+		BUG_ON(host->dma_len == 0);
+		phys_addr = sg_dma_address(data->sg);
+
+		if (host->dma_len > 1)
+			host->copy_buf = 1;
+			host->stat.multi_sg++;
+	}
+
+	if (host->size < 256) {
+		
+		if (copy_256) host->copy_buf = 1;
+		host->stat.buf_256++;
+	}
+	if (phys_addr & 0x3) {
+		
+		if (copy_un) host->copy_buf = 1;
+		host->stat.unaligned_buf ++;
+	}
+	if (phys_addr & 0x1f) {
+		
+		if (copy_cl) host->copy_buf = 1;
+		host->stat.cache_unaligned_buf++;
+	}
+	
+        if (host->copy_buf) {
+
+		host->stat.copied_data++;
+
+			virt_addr = host->dma_buffer;
+			phys_addr = host->dma_addr;
+	}
+
+
+	BUG_ON(host->size > MVSDMMC_DMA_SIZE);
+
+	if ((data->flags & MMC_DATA_WRITE) && (host->copy_buf)) {
+		/*
+		* Transfer data from the SG list to
+		* the DMA buffer.
+		*/
+		BUG_ON(virt_addr == NULL);
+		mvsdmmc_sg_to_dma(host, data);
+		dma_sync_single_for_device(mmc_dev(host->mmc),
+					host->dma_addr,
+					host->size,
+					DMA_TO_DEVICE);
+
+	} else if ((data->flags & MMC_DATA_READ) && (host->copy_buf)) {
+
+		dma_sync_single_for_device(mmc_dev(host->mmc),
+					host->dma_addr,
+					host->size,
+					DMA_FROM_DEVICE);
+	}
+
+	mvsdmmc_writew(host, SDIO_BLK_COUNT, data->blocks);
+	mvsdmmc_writew(host, SDIO_SYS_ADDR_LOW,
+			(0xffff&((unsigned int)phys_addr)));
+	mvsdmmc_writew(host, SDIO_SYS_ADDR_HI,
+			(0xffff&(((unsigned int)phys_addr)>>16)));
+
+	mvsdmmc_writew(host, SDIO_BLK_SIZE, data->blksz);
+
+	mvsdmmc_dbg_exit();
+
+}
+
+static void mvsdmmc_start_cmd(struct mvsdmmc_host *host,
+				struct mmc_command *cmd)
+{
+
+	struct mmc_data		*data = host->mrq->data;
+	struct mmc_request	*mrq = cmd->mrq;
+	unsigned short cmdreg = 0, xfer = 0, status = 0;
+	unsigned short intr_enable = 0;
+	unsigned long flags;
+
+	mvsdmmc_dbg_enter();
+	BUG_ON(host->cmd_data);
+	BUG_ON(host->cmd == NULL);
+
+	/* disable interrupts */
+	mvsdmmc_writew(host, SDIO_ERR_INTR_EN, 0);
+	/* clear error status */
+	mvsdmmc_writew(host, SDIO_ERR_INTR_STATUS,
+			mvsdmmc_readw(host, SDIO_ERR_INTR_STATUS));
+
+	BUG_ON(host->intr_en & ~SDIO_NOR_CARD_INT);
+
+	/* reset host->intr_cmd*/
+	spin_lock_irqsave(&host->lock, flags);
+	host->intr_cmd = 0;
+	spin_unlock_irqrestore(&host->lock, flags);
+
+
+		status = mvsdmmc_readw(host, SDIO_PRESENT_STATE0);
+
+	if ((status & CMD_INHIBIT) ||
+		(status & CARD_BUSY) ||
+		(status & CMD_TXACTIVE) ||
+		(status & CMD_RXACTIVE) ||
+		(status & CMD_AUTOCMD12ACTIVE)) {
+
+		host->stat.cmd_timeout++;
+		mvsdmmc_writew(host, SDIO_SW_RESET, 0x100);
+	}
+
+	if (cmd->flags != MMC_RSP_NONE) {
+		intr_enable |= SDIO_NOR_UNEXP_RSP;
+		cmdreg |= SDIO_UNEXPEXTED_RESP;
+	}
+	if (cmd->flags & MMC_RSP_OPCODE)
+		cmdreg |= SDIO_CMD_INDX_CHECK;
+
+
+	if (cmd->flags == MMC_RSP_NONE)
+		cmdreg |= SDIO_CMD_NO_RESPONSE;
+	else if (cmd->flags & MMC_RSP_BUSY)
+		cmdreg |= SDIO_CMD_48_RESPONSE_BUSY;
+	else if (cmd->flags & MMC_RSP_136)
+		cmdreg |= SDIO_CMD_136_RESPONSE;
+	else if (cmd->flags & MMC_RSP_PRESENT)
+		cmdreg |= SDIO_CMD_48_RESPONSE;
+
+
+	if (cmd->flags & MMC_RSP_CRC) {
+		cmdreg |= (SDIO_CMD_CHECK_CMDCRC);
+		if (data)
+			cmdreg |= (SDIO_CMD_CHECK_DATACRC16);
+	}
+
+	if (data) {
+
+		host->data = mrq->data;
+		mvsdmmc_setup_data(host, mrq->data);
+
+		/* if multiple blocks and need AutoCMD12*/
+		if (data->stop) {
+			mvsdmmc_writew(host, SDIO_AUTOCMD12_ARG_LOW,
+					data->stop->arg&0xffff);
+			mvsdmmc_writew(host, SDIO_AUTOCMD12_ARG_HI,
+					data->stop->arg>>16);
+			mvsdmmc_writew(host, SDIO_AUTOCMD12_INDEX, 0x0C03);
+
+			/* enable autocmd12 interrupt*/
+			intr_enable |= SDIO_NOR_AUTOCMD12_DONE;
+
+			xfer |= SDIO_XFER_MODE_AUTO_CMD12;
+			spin_lock_irqsave(&host->lock, flags);
+			host->cmd_data = (MVSDMMC_CMD|MVSDMMC_CMD12);
+			spin_unlock_irqrestore(&host->lock, flags);
+		} else {
+			/* enable data interrupt*/
+			intr_enable |= SDIO_NOR_DMA_INI;
+			spin_lock_irqsave(&host->lock, flags);
+			host->cmd_data = (MVSDMMC_CMD|MVSDMMC_DATA);
+			spin_unlock_irqrestore(&host->lock, flags);
+		}
+
+		/* default values */
+		cmdreg |= SDIO_CMD_CHECK_DATACRC16;
+		cmdreg |= SDIO_CMD_DATA_PRESENT;
+		xfer |= SDIO_XFER_MODE_HW_WR_DATA_EN;
+
+		if (data->flags & MMC_DATA_READ)
+			xfer |= SDIO_XFER_MODE_TO_HOST;
+		else if (data->flags & MMC_DATA_WRITE)
+			xfer &= ~SDIO_XFER_MODE_TO_HOST;
+
+
+	} else {
+		intr_enable |= SDIO_NOR_CMD_DONE;
+		cmdreg &= ~SDIO_CMD_DATA_PRESENT;
+		spin_lock_irqsave(&host->lock, flags);
+		host->cmd_data = MVSDMMC_CMD;
+		spin_unlock_irqrestore(&host->lock, flags);
+	}
+
+	if (host->intr_en & SDIO_NOR_CARD_INT)
+		xfer |= SDIO_XFER_MODE_INT_CHK_EN;
+
+	cmdreg |= ((cmd->opcode & 0xff) << 0x8);
+
+
+	mvsdmmc_writew(host, SDIO_ARG_LOW, cmd->arg&0xffff);
+	mvsdmmc_writew(host, SDIO_ARG_HI, cmd->arg>>16);
+	mvsdmmc_writew(host, SDIO_XFER_MODE, xfer);
+
+
+	/* start timer */
+	mod_timer(&host->timer, jiffies + 5 * HZ);
+
+	spin_lock_irqsave(&host->lock, flags);
+	mvsdmmc_enable_irq(host, intr_enable);
+
+	spin_lock_irqsave(&host->lock, flags);
+	host->pending_commands++;
+	spin_unlock_irqrestore(&host->lock, flags);
+
+	/* enable error interrupts*/
+	mvsdmmc_writew(host, SDIO_ERR_INTR_EN, 0xffff);
+#if defined(MVSDMMC_DUMP_REGS_ON_CMD)
+	mvsdmmc_debug_error("================================>\n");
+	mvsdmmc_debug_error("================================>\n");
+	mvsdmmc_debug_error("================================>\n");
+	mvsdmmc_debug_error("CMD%d Start \n", host->cmd->opcode);
+	mvsdmmc_dump_registers(host, cmdreg);
+#endif
+	mvsdmmc_writew(host, SDIO_CMD, cmdreg);
+
+	BUG_ON(host->intr_en == 0);
+	BUG_ON(host->intr_en == SDIO_NOR_UNEXP_RSP);
+
+
+	spin_unlock_irqrestore(&host->lock, flags);
+
+
+	if (host->polling) {
+		volatile unsigned short reg;
+		int loops=0;
+		host->intr_en &= ~SDIO_NOR_UNEXP_RSP;
+
+		do {
+			reg = mvsdmmc_readw(host, SDIO_NOR_INTR_STATUS);
+			loops++;
+			if (loops == 10000) {
+				mvsdmmc_usleep(1);
+				loops=0;
+                        }
+				
+		} while (!(reg & host->intr_en));
+
+
+		mvsdmmc_irq(0, (void *)host->mmc);
+	}
+
+	mvsdmmc_dbg_exit();
+}
+
+
+static void mvsdmmc_finish_data(struct mvsdmmc_host *host)
+{
+	char				*virt_addr;
+	struct mmc_data		*data = host->data;
+
+	BUG_ON(data == NULL);
+	BUG_ON(!(host->intr_status & SDIO_NOR_AUTOCMD12_DONE) &&
+			!(host->intr_status & SDIO_NOR_DMA_INI));
+
+	if (host->intr_status & SDIO_NOR_AUTOCMD12_DONE) {
+
+		host->cmd_data &= ~MVSDMMC_CMD12;
+		host->intr_status &= ~(SDIO_NOR_AUTOCMD12_DONE);
+	} else if (host->intr_status & SDIO_NOR_DMA_INI) {
+
+		host->cmd_data &= ~MVSDMMC_DATA;
+		host->intr_status &= ~(SDIO_NOR_DMA_INI);
+	}
+
+
+
+
+	if (!host->copy_buf)
+		BUG_ON(host->dma_len == 0);
+
+	if ((data->flags & MMC_DATA_READ) && (host->copy_buf)) {
+
+		virt_addr = host->dma_buffer;
+		BUG_ON(virt_addr == NULL);
+		dma_sync_single_for_cpu(mmc_dev(host->mmc),
+					host->dma_addr,
+					host->size,
+					DMA_FROM_DEVICE);
+
+		/*
+		* Transfer data from DMA buffer to
+		* SG list.
+		*/
+		mvsdmmc_dma_to_sg(host, data);
+
+	} else if ((data->flags & MMC_DATA_WRITE) && (host->copy_buf)) {
+
+		dma_sync_single_for_cpu(mmc_dev(host->mmc),
+					host->dma_addr,
+					host->size,
+					DMA_TO_DEVICE);
+
+	}
+
+	if ((!host->copy_buf) & (MMC_DATA_READ))
+		dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_len,
+			 DMA_BIDIRECTIONAL);
+
+	if ((!host->copy_buf) & (MMC_DATA_WRITE))
+		dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_len,
+			 DMA_BIDIRECTIONAL);
+
+	/* check how much data was transfered */
+	if (mvsdmmc_readw(host, SDIO_CURR_BLK_COUNT)) {
+		data->bytes_xfered = host->size -
+			(((mvsdmmc_readw(host, SDIO_CURR_BLK_COUNT) - 1)  *
+			 data->blksz) + mvsdmmc_readw(host,
+						SDIO_CURR_BLK_SIZE));
+	} else {
+	data->bytes_xfered = host->size;/* -
+			mvsdmmc_readw(host, SDIO_CURR_BLK_SIZE);*/
+
+	}
+
+	if (data->bytes_xfered != host->size) {
+		host->stat.unfinished_dma++;
+
+		if (host->stat.unfinished_dma == 1)
+			host->stat.first_unfinished_dma =
+						host->stat.total_requests;
+
+		mvsdmmc_debug_error("mvsdmmc: data transfere not complete\n");
+		mvsdmmc_debug_error("data transfered =%d, original size= %d\n",
+					data->bytes_xfered, host->size);
+
+	}
+
+	host->data = NULL;
+
+}
+
+static void mvsdmmc_finish_cmd(struct mvsdmmc_host *host)
+{
+	unsigned int response[8], resp_indx = 0;
+	struct mmc_command	*cmd = host->cmd;
+
+
+
+	host->intr_status &= ~(SDIO_NOR_CMD_DONE);
+	host->cmd_data &= ~MVSDMMC_CMD;
+
+
+	for (resp_indx = 0 ; resp_indx < 8; resp_indx++)
+		response[resp_indx] = mvsdmmc_readw(host, SDIO_RSP(resp_indx));
+
+	cmd->resp[0] = 0;
+	cmd->resp[1] = 0;
+	cmd->resp[2] = 0;
+	cmd->resp[3] = 0;
+
+
+	if (cmd->flags & MMC_RSP_136) {
+
+		cmd->resp[3] = ((response[7] & 0x3fff) << 8)	|
+			((response[6] & 0x3ff) << 22);
+		cmd->resp[2] = ((response[6] & 0xfc00) >> 10)	|
+			((response[5] & 0xffff) << 6)	|
+			((response[4] & 0x3ff) << 22);
+		cmd->resp[1] = ((response[4] & 0xfc00) >> 10)	|
+			((response[3] & 0xffff) << 6)	|
+			((response[2] & 0x3ff) << 22);
+		cmd->resp[0] = ((response[2] & 0xfc00) >> 10)	|
+			((response[1] & 0xffff) << 6)	|
+			((response[0] & 0x3ff) << 22);
+
+
+	} else  if (cmd->flags & MMC_RSP_PRESENT) {
+
+		cmd->resp[0] = ((response[2] & 0x3f) << (8 - 8)) |
+			((response[1] & 0xffff) << (14 - 8)) |
+			((response[0] & 0x3ff) << (30 - 8));
+		cmd->resp[1] = ((response[0] & 0xfc00) >> 10);
+	}
+}
+
+static unsigned int mvsdmmc_check_error(struct mvsdmmc_host *host)
+{
+	unsigned short		error_status;
+	unsigned int		error = 0;
+
+	error_status = mvsdmmc_readw(host, SDIO_NOR_INTR_STATUS);
+	/* make sure if there is an error*/
+	if (error_status & SDIO_NOR_UNEXP_RSP) {
+
+		error = -EPROTO;
+
+		mvsdmmc_debug_error("mvsdmmc: SDIO_NOR_INTR_STATUS(0x%x)=0x%x"
+					"\n", SDIO_NOR_INTR_STATUS,
+					error_status);
+
+	} else if (error_status & SDIO_NOR_ERROR) {
+
+		/* clear error status*/
+		mvsdmmc_writew(host, SDIO_NOR_INTR_STATUS, SDIO_NOR_ERROR);
+
+		error_status = mvsdmmc_readw(host, SDIO_ERR_INTR_STATUS);
+
+		mvsdmmc_debug_error("mvsdmmc: SDIO_ERR_INTR_STATUS(0x%x)=0x%x"
+				"\n", SDIO_ERR_INTR_STATUS,
+				error_status);
+
+		if (error_status & (SDIO_ERR_CMD_TIMEOUT	|
+				SDIO_ERR_DATA_TIMEOUT)) {
+			error = -ETIMEDOUT;
+
+		} else {
+			error = EILSEQ;
+		}
+	}
+
+	return error;
+}
+
+static void mvsdmmc_request_done(struct mvsdmmc_host *host)
+{
+	struct mmc_request *mrq = host->mrq;
+	struct mmc_command	*cmd = host->cmd;
+	unsigned long flags;
+
+
+	if ((cmd->error) && (host->data)) {
+		char *virt_addr;
+		int i;
+		host->intr_status = host->intr_cmd;
+		mvsdmmc_disable_irq(host, host->intr_cmd);
+
+		if (!host->copy_buf)
+			virt_addr = (char *)sg_virt_addr(host->data->sg);
+		else
+			virt_addr = (char *)host->dma_buffer;
+
+		mvsdmmc_debug_error("error: data size =%d, block size= %d "
+				    "block numbers=%d\n",
+			host->size, host->data->blksz, host->data->blocks);
+
+		if (dump_on_error) {
+			for (i = 0 ; i < host->size ; i++) {
+				if (i%32 == 0)
+					mvsdmmc_debug_error("\n 0x%04X:",
+							    (unsigned int)i);
+				mvsdmmc_debug_error("%02X ", *virt_addr++);
+			}
+		}
+		mvsdmmc_debug_error("\n");
+		mvsdmmc_finish_data(host);
+	}
+
+	if ((cmd->error)) {
+
+		/* disable pending interrupts*/
+		mvsdmmc_disable_irq(host, host->intr_cmd);
+		/* clear pending interrupts*/
+		mvsdmmc_writew(host, SDIO_NOR_INTR_STATUS, host->intr_cmd);
+
+		host->cmd_data = 0;
+		host->intr_status = 0;
+	}
+
+	host->mrq = NULL;
+	host->cmd = NULL;
+	spin_lock_irqsave(&host->lock, flags);
+	host->pending_commands--;
+	spin_unlock_irqrestore(&host->lock, flags);
+
+	mmc_request_done(host->mmc, mrq);
+
+}
+static irqreturn_t mvsdmmc_irq_detect(int irq, void *dev)
+{
+	struct mmc_host *mmc = (struct mmc_host *)dev;
+	struct mvsdmmc_host *host = mmc_priv(mmc);
+
+	host->stat.detect_int++;
+        mmc_detect_change(mmc, msecs_to_jiffies(100));
+	return IRQ_HANDLED;
+}
+static irqreturn_t mvsdmmc_irq(int irq, void *dev)
+{
+	struct mmc_host *mmc = (struct mmc_host *)dev;
+	struct mvsdmmc_host *host = mmc_priv(mmc);
+	int handled = IRQ_NONE;
+	int cardint = 0, cmd_data_int = 0;
+	unsigned int	error;
+
+	mvsdmmc_dbg_enter();
+	host->stat.ints++;
+
+	if (host->pending_commands)
+		del_timer(&host->timer);
+		/* first make sure if there is an error*/
+	error = mvsdmmc_check_error(host);
+
+	if (host->cmd)
+		host->cmd->error = error;
+#if defined(MVSDMMC_DUMP_REGS_ON_CMD)
+	if (host->cmd)  {
+		mvsdmmc_debug_error("================================>\n");
+		mvsdmmc_debug_error("CMD%d Response \n", host->cmd->opcode);
+		mvsdmmc_dump_registers(host,
+				       mvsdmmc_readw(host, SDIO_CMD));
+	}
+#endif
+
+	if (error) {
+
+		host->stat.error_ints++;
+
+		if (dump_on_error)
+			mvsdmmc_dump_registers(host, mvsdmmc_readw(host,
+								   SDIO_CMD));
+
+		if (host->stat.error_ints == 1) {
+			host->stat.first_err_int = host->stat.total_requests;
+			host->stat.first_int_status =
+				mvsdmmc_readw(host, SDIO_NOR_INTR_STATUS);
+			host->stat.first_error_status =
+				mvsdmmc_readw(host, SDIO_ERR_INTR_STATUS);
+		}
+
+		/* clear error interrupts*/
+		mvsdmmc_writew(host, SDIO_ERR_INTR_STATUS,
+				mvsdmmc_readw(host, SDIO_ERR_INTR_STATUS));
+
+		mvsdmmc_writew(host, SDIO_ERR_INTR_EN, 0);
+
+		mvsdmmc_debug_error("mvsdmmc: command,data error \n");
+		handled = IRQ_HANDLED;
+		goto done;
+	}
+
+	/* read interrupts status */
+	host->intr_status = mvsdmmc_readw(host, SDIO_NOR_INTR_STATUS);
+	/* handle only enabled interrupts*/
+	host->intr_status &= mvsdmmc_readw(host, SDIO_NOR_INTR_EN);
+
+	/* disable pending interrupts*/
+	mvsdmmc_disable_irq(host, host->intr_status);
+	/* clear pending interrupts*/
+	mvsdmmc_writew(host, SDIO_NOR_INTR_STATUS, host->intr_status);
+
+
+	if (host->intr_status & SDIO_NOR_CARD_INT) {
+
+		host->intr_status &= ~SDIO_NOR_CARD_INT;
+		host->stat.card_ints++;
+		cardint = 1;
+		handled = IRQ_HANDLED;
+	}
+
+	if (host->intr_status) {
+
+		cmd_data_int = 1;
+		if ((host->intr_status & SDIO_NOR_AUTOCMD12_DONE) ||
+			(host->intr_status & SDIO_NOR_DMA_INI)) {
+
+			mvsdmmc_finish_data(host);
+			/* if data only interrupt was enable,
+			 then handle command now as well */
+			if (!(host->intr_cmd & SDIO_NOR_CMD_DONE))
+				mvsdmmc_finish_cmd(host);
+		}
+
+		if (host->intr_status & SDIO_NOR_CMD_DONE)
+			mvsdmmc_finish_cmd(host);
+
+		handled = IRQ_HANDLED;
+	}
+
+	if (cardint)
+		mmc_signal_sdio_irq(host->mmc);
+
+	if (handled != IRQ_HANDLED) {
+		/* clear interrupts*/
+		mvsdmmc_disable_irq(host, 0xffff);
+		printk(KERN_WARNING "status = 0x%x\n",
+			mvsdmmc_readw(host, SDIO_NOR_INTR_STATUS));
+
+		mvsdmmc_writew(host, SDIO_NOR_INTR_STATUS,
+				mvsdmmc_readw(host, SDIO_NOR_INTR_STATUS));
+
+                handled = IRQ_HANDLED;
+		host->stat.empty_int++;
+	}
+
+done:
+
+	if ((cmd_data_int) ||
+		((host->pending_commands) && (host->cmd->error))) {
+		 /* Since we may and may not have SDIO_NOR_UNEXP_RSP interrupt
+		make sure SDIO_NOR_UNEXP_RSP cleared and disabled before next
+		command
+		*/
+		host->intr_status &= ~SDIO_NOR_UNEXP_RSP;
+		mvsdmmc_disable_irq(host, SDIO_NOR_UNEXP_RSP);
+		mvsdmmc_bitset(host, SDIO_NOR_INTR_STATUS, SDIO_NOR_UNEXP_RSP);
+		mvsdmmc_request_done(host);
+	}
+
+	mvsdmmc_dbg_exit();
+	return handled;
+
+}
+
+static void mvsdmmc_timeout_timer(unsigned long data)
+{
+	struct mvsdmmc_host *host;
+	unsigned long flags;
+	irqreturn_t retval;
+
+	host = (struct mvsdmmc_host *)data;
+
+	host->stat.int_timeout++;
+	mvsdmmc_debug_error("mvsdmmc: interrupt timeout\n");
+
+	if (dump_on_error)
+	mvsdmmc_dump_registers(host, mvsdmmc_readw(host, SDIO_CMD));
+
+
+	spin_lock_irqsave(&host->lock, flags);
+	if (host->pending_commands) {
+		/* first try to handle any pending interrupts*/
+		retval =  mvsdmmc_irq(0, (void *)host->mmc);
+	}
+	spin_unlock_irqrestore(&host->lock, flags);
+}
+
+
+
+static inline void mvsdmmc_sg_to_dma(struct mvsdmmc_host *host,
+					struct mmc_data *data)
+{
+	unsigned int len, i;
+	struct scatterlist *sg;
+	char *dmabuf = host->dma_buffer;
+	char *sgbuf;
+
+	sg = data->sg;
+	len = data->sg_len;
+
+	for (i = 0; i < len; i++) {
+		sgbuf = (char *)sg_virt_addr((&sg[i]));
+		memcpy(dmabuf, sgbuf, sg[i].length);
+		dmabuf += sg[i].length;
+	}
+}
+
+static inline void mvsdmmc_dma_to_sg(struct mvsdmmc_host *host,
+					struct mmc_data *data)
+{
+	unsigned int len, i;
+	struct scatterlist *sg;
+	char *dmabuf = host->dma_buffer;
+	char *sgbuf;
+
+	sg = data->sg;
+	len = data->sg_len;
+
+	for (i = 0; i < len; i++) {
+		sgbuf = (char *)sg_virt_addr((&sg[i]));
+		memcpy(sgbuf, dmabuf, sg[i].length);
+		dmabuf += sg[i].length;
+	}
+}
+
+
+static int mvsdmmc_dma_init(struct mmc_host *mmc)
+{
+	struct mvsdmmc_host *host = mmc_priv(mmc);
+
+	mvsdmmc_dbg_enter();
+
+	host->dma_buffer = NULL;
+	host->dma_addr = (dma_addr_t)NULL;
+
+	/*
+	* We need to allocate a special buffer in
+	* order for SDIO host to be able to DMA to it.
+	*/
+
+	host->dma_buffer = kmalloc(MVSDMMC_DMA_SIZE,
+		GFP_NOIO | GFP_DMA | __GFP_REPEAT | __GFP_NOWARN);
+
+	if (!host->dma_buffer)
+		goto err;
+
+	/*
+	* Translate the address to a physical address.
+	*/
+
+	host->dma_addr = dma_map_single(mmc_dev(host->mmc), host->dma_buffer,
+		MVSDMMC_DMA_SIZE, DMA_BIDIRECTIONAL);
+
+	/*
+	* SDIO host DMA must be aligned on a 4 byte basis.
+	*/
+	if ((host->dma_addr & 0x3) != 0) {
+
+		mvsdmmc_warning("mvsdmmc: dma alignment error\n");
+		goto kfree;
+	}
+
+
+
+	mvsdmmc_dbg_exit();
+	return 0;
+kfree:
+	/*
+	 * If we've gotten here then there is some kind of alignment bug
+	 */
+
+	dma_unmap_single(mmc_dev(host->mmc), host->dma_addr,
+		MVSDMMC_DMA_SIZE, DMA_BIDIRECTIONAL);
+	host->dma_addr = (dma_addr_t)NULL;
+
+	kfree(host->dma_buffer);
+	host->dma_buffer = NULL;
+
+	return -ENOMEM;
+
+err:
+	printk(KERN_WARNING DRIVER_NAME ": Unable to allocate DMA %d. "
+		"Falling back on FIFO.\n", (unsigned int)host->dma_buffer);
+
+	return -ENOMEM;
+
+}
+static void mvsdmmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
+{
+	struct mvsdmmc_host *host = mmc_priv(mmc);
+	unsigned long flags;
+
+	mvsdmmc_dbg_enter();
+	WARN_ON(host->mrq != NULL);
+
+	host->stat.total_requests++;
+
+	BUG_ON(host->pending_commands == 1);
+	spin_lock_irqsave(&host->lock, flags);
+	host->mrq = mrq;
+	host->cmd = mrq->cmd;
+	host->data = mrq->data;
+	spin_unlock_irqrestore(&host->lock, flags);
+
+	mvsdmmc_start_cmd(host, mrq->cmd);
+
+
+	mvsdmmc_dbg_exit();
+
+}
+
+static int mvsdmmc_get_ro(struct mmc_host *mmc)
+{
+	/* Host doesn't support read only detection so assume writeable */
+	return 0;
+
+}
+
+static void mvsdmmc_set_clock(struct mmc_host *mmc, unsigned int clock)
+{
+	struct mvsdmmc_host *host = mmc_priv(mmc);
+	unsigned int m;
+	mvsdmmc_dbg_enter();
+
+	BUG_ON(clock == 0);
+
+	if ((over_freq) && (clock > MVSDMMC_CLOCKRATE_MIN))
+		clock = maxfreq;
+
+	m = MVSDMMC_BASE_FAST_CLOCK/(2*clock) - 1;
+
+	mvsdmmc_debug("mvsdmmc: mvsdmmc_set_clock: dividor = 0x%x clock=%d\n",
+			m, clock);
+
+	mvsdmmc_writew(host, SDIO_CLK_DIV, m & 0x7ff);
+
+	msleep(10);
+
+	mvsdmmc_dbg_exit();
+}
+static void mvsdmmc_power_up(struct mmc_host *mmc)
+{
+	unsigned int reg;
+	struct mvsdmmc_host *host = mmc_priv(mmc);
+
+
+	mvsdmmc_dbg_enter();
+
+	reg = mvsdmmc_readw(host, SDIO_HOST_CTRL);
+	/* set sd-mem only*/
+	reg &= ~(0x3 << 1);
+	reg |= (SDIO_HOST_CTRL_CARD_TYPE_MEM_ONLY << 1);
+
+	/* set big endian */
+	reg |= SDIO_HOST_CTRL_BIG_ENDEAN;
+	reg &= ~SDIO_HOST_CTRL_LSB_FIRST;
+
+	/* set maximum timeout */
+	reg &= ~(0xf << 11);
+	reg |= (sdtimeout << 11);
+	reg |= SDIO_HOST_CTRL_TMOUT_EN;
+	mvsdmmc_writew(host, SDIO_HOST_CTRL, reg);
+
+	mvsdmmc_writew(host, SDIO_NOR_STATUS_EN, 0xffff);
+	mvsdmmc_writew(host, SDIO_ERR_STATUS_EN, 0xffff);
+	mvsdmmc_writew(host, SDIO_NOR_INTR_EN, 0);
+	mvsdmmc_writew(host, SDIO_NOR_INTR_STATUS, 0x0810);
+
+	/* reset */
+	mvsdmmc_writew(host, SDIO_SW_RESET, 0x100);
+	msleep(50);
+
+
+	/* enable the clock*/
+	mvsdmmc_bitreset(host, SDIO_XFER_MODE, SDIO_XFER_MODE_STOP_CLK);
+	mvsdmmc_dbg_exit();
+}
+static void mvsdmmc_power_down(struct mmc_host *mmc)
+{
+	struct mvsdmmc_host *host = mmc_priv(mmc);
+
+	mvsdmmc_dbg_enter();
+	/* stop the clock*/
+	mvsdmmc_bitset(host, SDIO_XFER_MODE, SDIO_XFER_MODE_STOP_CLK);
+	mvsdmmc_writew(host, SDIO_NOR_STATUS_EN, 0);
+	mvsdmmc_writew(host, SDIO_ERR_STATUS_EN, 0);
+	mvsdmmc_writew(host, SDIO_NOR_INTR_EN, 0);
+	mvsdmmc_writew(host, SDIO_NOR_INTR_STATUS, 0xffff);
+
+	mvsdmmc_dbg_exit();
+}
+
+
+
+static void mvsdmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
+{
+	struct mvsdmmc_host *host = mmc_priv(mmc);
+	unsigned short reg = 0;
+
+	mvsdmmc_dbg_enter();
+
+	if (mmc->mode == MMC_MODE_SD) {
+
+		mvsdmmc_debug("mvsdmmc: setting mode to sd mem\n");
+		reg = mvsdmmc_readw(host, SDIO_HOST_CTRL);
+		/* set sd-mem only*/
+		reg &= ~(0x3 << 1);
+		reg |= (SDIO_HOST_CTRL_CARD_TYPE_MEM_ONLY << 1);
+		mvsdmmc_writew(host, SDIO_HOST_CTRL, reg);
+
+	} else if (mmc->mode == MMC_MODE_MMC) {
+		mvsdmmc_debug("mvsdmmc: setting mode to mmc mem\n");
+		reg = mvsdmmc_readw(host, SDIO_HOST_CTRL);
+		/* set mmc only*/
+		reg &= ~(0x3 << 1);
+		reg |= (SDIO_HOST_CTRL_CARD_TYPE_IO_MMC << 1);
+		mvsdmmc_writew(host, SDIO_HOST_CTRL, reg);
+
+	} else if (mmc->mode == MMC_MODE_SDIO) {
+		mvsdmmc_debug("mvsdmmc: setting mode to sdio\n");
+		reg = mvsdmmc_readw(host, SDIO_HOST_CTRL);
+		/* set sdio only*/
+		reg &= ~(0x3 << 1);
+		reg |= (SDIO_HOST_CTRL_CARD_TYPE_IO_ONLY << 1);
+		mvsdmmc_writew(host, SDIO_HOST_CTRL, reg);
+	}
+
+	switch (ios->timing) {
+
+	case MMC_TIMING_SD_HS:
+	case MMC_TIMING_MMC_HS:
+#if 0
+		if (setlsbit) 
+			mvsdmmc_bitreset(host, SDIO_HOST_CTRL, 
+					       SDIO_HOST_CTRL_HI_SPEED_EN);
+		else 
+		mvsdmmc_bitset(host, SDIO_HOST_CTRL,
+			    SDIO_HOST_CTRL_HI_SPEED_EN);
+#endif
+		mvsdmmc_debug("mvsdmmc: setting high speed\n");
+
+		break;
+	case MMC_TIMING_LEGACY:
+	default:
+		if (sethsbit) 
+			mvsdmmc_bitset(host, SDIO_HOST_CTRL, 
+					     SDIO_HOST_CTRL_HI_SPEED_EN);
+		else 
+		mvsdmmc_bitreset(host, SDIO_HOST_CTRL,
+			      SDIO_HOST_CTRL_HI_SPEED_EN);
+
+		mvsdmmc_debug("mvsdmmc: setting legacy speed\n");
+		break;
+	}
+
+	mvsdmmc_debug("mvsdmmc: setting clock to %d\n", ios->clock);
+	if (ios->clock)
+		mvsdmmc_set_clock(mmc, ios->clock);
+	else
+		mvsdmmc_stop_clock(host);
+
+	if ((ios->power_mode == MMC_POWER_UP) &&
+		(host->power_mode != MMC_POWER_UP)) {
+
+		mvsdmmc_debug("mvsdmmc: power up\n");
+		mvsdmmc_power_up(mmc);
+		host->power_mode = MMC_POWER_UP;
+	}
+
+	if ((ios->power_mode == MMC_POWER_OFF) &&
+		(host->power_mode != MMC_POWER_OFF)) {
+
+		mvsdmmc_debug("mvsdmmc: power off\n");
+		mvsdmmc_power_down(mmc);
+		host->power_mode = MMC_POWER_OFF;
+	}
+
+	if ((ios->power_mode == MMC_POWER_ON) &&
+		(host->power_mode != MMC_POWER_ON)) {
+
+		mvsdmmc_debug("mvsdmmc: power on\n");
+		host->power_mode = MMC_POWER_ON;
+	}
+
+	if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) {
+
+		mvsdmmc_debug("mvsdmmc: set bus mode to opendrain\n");
+		mvsdmmc_bitreset(host, SDIO_HOST_CTRL,
+				 SDIO_HOST_CTRL_PUSH_PULL_EN);
+	} else if (ios->bus_mode == MMC_BUSMODE_PUSHPULL) {
+
+		mvsdmmc_debug("mvsdmmc: set bus mode to pushpull\n");
+		mvsdmmc_bitset(host, SDIO_HOST_CTRL,
+				SDIO_HOST_CTRL_PUSH_PULL_EN);
+	}
+
+	if (ios->bus_width == MMC_BUS_WIDTH_1) {
+
+		mvsdmmc_debug("mvsdmmc: set width x1\n");
+		mvsdmmc_bitreset(host, SDIO_HOST_CTRL,
+				 SDIO_HOST_CTRL_DATA_WIDTH_4_BITS);
+	} else if (ios->bus_width == MMC_BUS_WIDTH_4) {
+
+		mvsdmmc_debug("mvsdmmc: set width x4\n");
+		mvsdmmc_bitset(host, SDIO_HOST_CTRL,
+				SDIO_HOST_CTRL_DATA_WIDTH_4_BITS);
+	}
+
+	mvsdmmc_dbg_exit();
+}
+
+
+static void mvsdmmc_enable_sdio_irq(struct mmc_host *host, int enable)
+{
+	struct mvsdmmc_host *mvsdmmc_host = mmc_priv(host);
+	if (enable)
+		mvsdmmc_enable_irq(mvsdmmc_host, SDIO_NOR_CARD_INT);
+	else
+		mvsdmmc_disable_irq(mvsdmmc_host, SDIO_NOR_CARD_INT);
+
+}
+
+
+
+static const struct mmc_host_ops mvsdmmc_ops = {
+	.request	= mvsdmmc_request,
+	.get_ro		= mvsdmmc_get_ro,
+	.set_ios	= mvsdmmc_set_ios,
+	.enable_sdio_irq	= mvsdmmc_enable_sdio_irq,
+};
+
+static int mvsdmmc_probe(struct platform_device *pdev)
+{
+	struct mmc_host *mmc = NULL;
+	struct mvsdmmc_host *host = NULL;
+	struct resource *r;
+	int ret = 0, irq = NO_IRQ;
+	int irq_detect = NO_IRQ;
+
+	mvsdmmc_dbg_enter();
+
+	BUG_ON(pdev == NULL);
+
+
+	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (!r)
+		return -ENXIO;
+
+
+	r = request_mem_region(r->start, SZ_1K, DRIVER_NAME);
+	if (!r)
+		return -EBUSY;
+
+
+	irq = platform_get_irq(pdev, 0);
+
+	if (irq == NO_IRQ) {
+		ret = -ENXIO;
+		goto out;
+	}
+
+	mvsdmmc_debug("%s,%d: irq =%d start %x\n", __func__, __LINE__, irq,
+		      r->start);
+
+	if (detect) {
+		
+		irq_detect = platform_get_irq(pdev, 1);
+
+		if (irq_detect == NO_IRQ) {
+			detect = 0;
+
+			mvsdmmc_debug("%s,%d: no IRQ detect\n", __func__, __LINE__);
+
+		}
+		else
+			mvsdmmc_debug("%s,%d: irq_detect=%d\n", __func__, __LINE__,
+				irq_detect);
+	}
+
+	mmc = mmc_alloc_host(sizeof(struct mvsdmmc_host), &pdev->dev);
+	if (!mmc) {
+		ret = -ENOMEM;
+		goto out;
+	}
+
+	mmc->ops = &mvsdmmc_ops;
+	mmc->f_min = MVSDMMC_CLOCKRATE_MIN;
+	mmc->f_max = (unsigned int)maxfreq;
+
+	if (maxfragments == -1) {
+		/*
+		 * Maximum number of segments. Worst case is one 
+		 * sector per segment so this will be 64kB/256.
+		 */
+		mmc->max_hw_segs = 256;
+		mmc->max_phys_segs = 256;
+	}
+	else {
+		mmc->max_hw_segs = (maxfragments > 256)?256:maxfragments;
+		mmc->max_phys_segs = (maxfragments > 256)?256:maxfragments;
+	}
+
+	/*
+	 * Maximum request size. Also limited by 64KiB buffer.
+	 */
+	mmc->max_req_size = MVSDMMC_DMA_SIZE;
+
+	/*
+	 * Maximum segment size. Could be one segment with the maximum number
+	 * of bytes.
+	 */
+	mmc->max_seg_size = mmc->max_req_size;
+
+	/*
+	 * Block length register is 10 bits.
+	 */
+	mmc->max_blk_size = 2048;
+
+	/*
+	 * Block count register is 16 bits.
+	 */
+	mmc->max_blk_count = mmc->max_req_size;
+
+
+	host = mmc_priv(mmc);
+	BUG_ON(host == NULL);
+
+	host->pdev = pdev;
+
+	host->mmc = mmc;
+	host->irq = irq;
+
+	if (detect)
+		host->irq_detect = irq_detect;
+
+	host->res = r;
+	mmc->ocr_avail = MMC_VDD_27_28|MMC_VDD_28_29|MMC_VDD_29_30|	\
+			MMC_VDD_30_31|MMC_VDD_31_32|MMC_VDD_32_33|	\
+			 MMC_VDD_33_34|MMC_VDD_34_35|MMC_VDD_35_36;
+
+
+	if (width == 4) 
+	mmc->caps |= MMC_CAP_4_BIT_DATA;
+
+	if (highspeed) {
+		mmc->caps |= MMC_CAP_SD_HIGHSPEED;
+		mmc->caps |= MMC_CAP_MMC_HIGHSPEED;
+	}
+	if (cardint) 
+	mmc->caps |= MMC_CAP_SDIO_IRQ;
+
+	mmc->caps |= MMC_CAP_MULTIWRITE;
+
+	spin_lock_init(&host->lock);
+	host->power_mode = MMC_POWER_OFF;
+
+	host->polling = polling;
+
+	host->base = ioremap(r->start, SZ_4K);
+
+	if (!host->base) {
+		ret = -ENOMEM;
+		goto out;
+	}
+
+	if (!host->polling) {
+
+		if( request_irq( host->irq, mvsdmmc_irq,
+				 0 , DRIVER_NAME, mmc )) {
+
+			mvsdmmc_debug("%s,%d: cannot assign irq %x\n", 
+				__func__, __LINE__, host->irq);
+		ret = -EINVAL;
+		host->irq = NO_IRQ;
+		goto out;
+	}
+
+	}
+	if (detect) {
+
+		if (request_irq(host->irq_detect,
+				 mvsdmmc_irq_detect, 0 , DRIVER_NAME, mmc)) {
+
+			mvsdmmc_debug("%s,%d: cannot assign irq %x\n",
+				__func__,
+				__LINE__, host->irq_detect);
+			ret = -EINVAL;
+			host->irq_detect = NO_IRQ;
+			goto out;
+	}
+	}
+	/*
+	 * Ensure that the host controller is shut down, and setup
+	 * with our defaults.
+	 */
+
+	platform_set_drvdata(pdev, mmc);
+	setup_timer(&host->timer, mvsdmmc_timeout_timer, (unsigned long)host);
+
+	if (mvsdmmc_dma_init(mmc) != 0)
+		goto out;
+
+	if (mmc_add_host(mmc) != 0)
+		goto out;
+
+	create_proc_read_entry("mvsdmmc", 0 , NULL ,
+				mvsdmmc_read_procmem, host);
+
+	mvsdmmc_dbg_exit();
+	return 0;
+
+out:
+	if (host) {
+		mvsdmmc_disable_irq(host, 0xffff);
+
+		if (host->base) {
+			mvsdmmc_stop_clock(host);
+			iounmap(host->base);
+		}
+
+		if (host->dma_addr)
+			dma_unmap_single(mmc_dev(host->mmc), host->dma_addr,
+					 MVSDMMC_DMA_SIZE, DMA_BIDIRECTIONAL);
+
+
+		host->dma_addr = (dma_addr_t)NULL;
+
+		kfree(host->dma_buffer);	/* kfree(NULL) should be safe*/
+		host->dma_buffer = NULL;
+
+		if (!host->polling) {
+
+		if (host->irq != NO_IRQ)
+			free_irq(host->irq, host);
+		}
+
+		if (detect) {
+		if (host->irq_detect != NO_IRQ)
+			free_irq(host->irq_detect, host);
+		}
+
+		if (host->res)
+			release_resource(host->res);
+
+	}
+
+	if (mmc)
+		mmc_free_host(mmc);
+
+	return ret;
+}
+
+static int mvsdmmc_remove(struct platform_device *pdev)
+{
+
+	struct mmc_host *mmc = platform_get_drvdata(pdev);
+	platform_set_drvdata(pdev, NULL);
+
+	if (mmc) {
+		struct mvsdmmc_host *host = mmc_priv(mmc);
+		mvsdmmc_disable_irq(host, 0xffff);
+
+		mmc_remove_host(mmc);
+
+		if (host) {
+
+			mvsdmmc_stop_clock(host);
+
+			if (host->dma_addr)
+				dma_unmap_single(mmc_dev(host->mmc),
+						 host->dma_addr,
+						 MVSDMMC_DMA_SIZE,
+						 DMA_BIDIRECTIONAL);
+			host->dma_addr = (dma_addr_t)NULL;
+
+			kfree(host->dma_buffer);	/* kfree(NULL) should
+								be safe*/
+
+			host->dma_buffer = NULL;
+
+			if (!host->polling) {
+
+			if (host->irq != NO_IRQ)
+				free_irq(host->irq, mmc);
+			}
+			if (detect) {
+			if (host->irq_detect != NO_IRQ)
+				free_irq(host->irq_detect, mmc);
+			}
+
+			if (host->base)
+				iounmap(host->base);
+
+			if (host->res)
+				release_resource(host->res);
+
+			del_timer_sync(&host->timer);
+
+		}
+
+		mmc_free_host(mmc);
+	}
+
+	remove_proc_entry("mvsdmmc", NULL);
+
+	return 0;
+}
+#ifdef CONFIG_PM
+static int mvsdmmc_suspend(struct platform_device *dev, pm_message_t state,
+			   u32 level)
+{
+	struct mmc_host *mmc = platform_get_drvdata(dev);
+	int ret = 0;
+
+	if (mmc && level == SUSPEND_DISABLE)
+		ret = mmc_suspend_host(mmc, state);
+
+	return ret;
+}
+
+static int mvsdmmc_resume(struct platform_device *dev, u32 level)
+{
+	struct mmc_host *mmc = platform_dev_get_drvdata(dev);
+	int ret = 0;
+
+	if (mmc && level == RESUME_ENABLE)
+		ret = mmc_resume_host(mmc);
+
+	return ret;
+}
+#else
+#define mvsdmmc_suspend	NULL
+#define mvsdmmc_resume	NULL
+#endif
+
+
+static struct platform_driver mvsdmmc_driver = {
+	.probe		= mvsdmmc_probe,
+	.remove		= mvsdmmc_remove,
+	.suspend	= mvsdmmc_suspend,
+	.resume		= mvsdmmc_resume,
+	.driver		= {
+		.name	= DRIVER_NAME,
+	},
+
+};
+
+static int __init mvsdmmc_init(void)
+{
+	int ret = 0;
+	mvsdmmc_dbg_enter();
+
+	ret = platform_driver_register(&mvsdmmc_driver);
+
+	mvsdmmc_dbg_exit();
+	return ret;
+}
+
+static void __exit mvsdmmc_exit(void)
+{
+	mvsdmmc_dbg_enter();
+	platform_driver_unregister(&mvsdmmc_driver);
+	mvsdmmc_dbg_exit();
+}
+
+module_init(mvsdmmc_init);
+module_exit(mvsdmmc_exit);
+
+module_param(maxfragments, int, 0);	/* maximum physical fragmrnts of buffer
+				to be handled, default -1 no limitations*/
+module_param(copy_always, int, 0); /* should we copy always to a new buffer,
+					default 1*/
+module_param(maxfreq, int, 0);	/* maximum frequency used in the driver
+				, default 50MHZ*/
+module_param(highspeed, int, 0);/* do we support high speed, default yes*/
+module_param(cardint, int, 0);	/* do we support card interrupts (SDIO), 
+				default yes */
+module_param(sethsbit, int, 0);	/* always work with highspeed bit set , 
+				default no*/
+module_param(setlsbit, int, 0);	/* always work with highspeed bit reseted , 
+				default no*/
+module_param(polling, int, 0);	/* polling or interrupt mode, default interrupts
+				 mode*/
+module_param(width, int, 0);	/* maximum data width, default x4*/
+module_param(over_freq, int, 0);/* override frequency to maxfreq always, 
+				default 0 */
+module_param(sdtimeout, int, 0);
+
+module_param(copy_256, int, 0);   /* copy buffers less than 256 bytes, 
+					default=0*/
+module_param(copy_un, int, 0);   /* copy buffers not aligned to word
+					default=1*/
+module_param(copy_cl, int, 0);   /* copy buffers not aligned to cache line
+					default=0*/
+module_param(dump_on_error, int, 0);
+
+module_param(detect, int, 0);   /* support detection removal\insersion ,
+				default =1*/
+
+
+MODULE_AUTHOR("Maen Suleiman <maen@marvell.com>");
+MODULE_DESCRIPTION("Marvell SD,SDIO,MMC Host Controller driver");
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sdio/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_sdio/Makefile
@@ -0,0 +1,15 @@
+#
+# Makefile for the Marvell Audio ALSA Device Driver
+#
+ifeq ($(CONFIG_ARCH_FEROCEON_ORION),y)
+	include $(srctree)/arch/arm/mach-feroceon-orion/config/mvRules.mk
+endif
+ 
+ifeq ($(CONFIG_ARCH_FEROCEON_KW),y)
+	include $(srctree)/arch/arm/mach-feroceon-kw/config/mvRules.mk
+endif
+
+EXTRA_CFLAGS    += -DMVSDMMC_DEBUG
+obj-$(CONFIG_MMC_MVSDMMC)	+= mvsdmmc.o
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/common/mv802_3.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/common/mv802_3.h
@@ -0,0 +1,206 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#ifndef __INCmv802_3h
+#define __INCmv802_3h
+
+
+/* includes */
+
+/* Defines */
+#define MV_MAX_ETH_DATA     1500
+
+/* 802.3 types */
+#define MV_IP_TYPE                  0x0800
+#define MV_IP_ARP_TYPE              0x0806
+#define MV_APPLE_TALK_ARP_TYPE      0x80F3
+#define MV_NOVELL_IPX_TYPE          0x8137
+#define MV_EAPOL_TYPE				0x888e
+
+
+
+/* Encapsulation header for RFC1042 and Ethernet_tunnel */
+
+#define MV_RFC1042_SNAP_HEADER     {0xAA, 0xAA, 0x03, 0x00, 0x00, 0x00}
+
+#define MV_ETH_SNAP_LSB             0xF8
+
+
+#define	MV_MAC_ADDR_SIZE	(6)
+#define MV_MAC_STR_SIZE		(20)
+#define MV_VLAN_HLEN		(4)
+
+/* This macro checks for a multicast mac address    */
+#define MV_IS_MULTICAST_MAC(mac)  (((mac)[0] & 0x1) == 1)
+
+
+/* This macro checks for an broadcast mac address     */
+#define MV_IS_BROADCAST_MAC(mac)            \
+       (((mac)[0] == 0xFF) &&       \
+        ((mac)[1] == 0xFF) &&       \
+        ((mac)[2] == 0xFF) &&       \
+        ((mac)[3] == 0xFF) &&       \
+        ((mac)[4] == 0xFF) &&       \
+        ((mac)[5] == 0xFF))
+
+
+/* Typedefs */
+typedef struct
+{
+    MV_U8     pDA[MV_MAC_ADDR_SIZE];
+    MV_U8     pSA[MV_MAC_ADDR_SIZE];
+    MV_U16    typeOrLen;
+
+} MV_802_3_HEADER;
+
+enum {
+  MV_IP_PROTO_NULL	= 0,    /* Dummy protocol for TCP               */
+  MV_IP_PROTO_ICMP	= 1,    /* Internet Control Message Protocol    */
+  MV_IP_PROTO_IGMP	= 2,    /* Internet Group Management Protocol   */
+  MV_IP_PROTO_IPIP	= 4,    /* IPIP tunnels (older KA9Q tunnels use 94) */
+  MV_IP_PROTO_TCP	= 6,    /* Transmission Control Protocol        */
+  MV_IP_PROTO_EGP	= 8,    /* Exterior Gateway Protocol            */
+  MV_IP_PROTO_PUP	= 12,   /* PUP protocol                         */
+  MV_IP_PROTO_UDP	= 17,   /* User Datagram Protocol               */
+  MV_IP_PROTO_IDP	= 22,   /* XNS IDP protocol                     */
+  MV_IP_PROTO_DCCP	= 33,   /* Datagram Congestion Control Protocol */
+  MV_IP_PROTO_IPV6	= 41,   /* IPv6-in-IPv4 tunnelling              */
+  MV_IP_PROTO_RSVP	= 46,   /* RSVP protocol                        */
+  MV_IP_PROTO_GRE	= 47,   /* Cisco GRE tunnels (rfc 1701,1702)    */
+  MV_IP_PROTO_ESP	= 50,   /* Encapsulation Security Payload protocol */
+  MV_IP_PROTO_AH	= 51,   /* Authentication Header protocol       */
+  MV_IP_PROTO_BEETPH	= 94,   /* IP option pseudo header for BEET     */
+  MV_IP_PROTO_PIM	= 103, 
+  MV_IP_PROTO_COMP	= 108,  /* Compression Header protocol          */
+  MV_IP_PROTO_ZERO_HOP	= 114,  /* Any 0 hop protocol (IANA)            */
+  MV_IP_PROTO_SCTP	= 132,  /* Stream Control Transport Protocol    */
+  MV_IP_PROTO_UDPLITE	= 136,  /* UDP-Lite (RFC 3828)                  */
+
+  MV_IP_PROTO_RAW	= 255,  /* Raw IP packets                       */
+  MV_IP_PROTO_MAX
+};
+
+typedef struct
+{
+    MV_U8   version;
+    MV_U8   tos;
+    MV_U16  totalLength;
+    MV_U16  identifier;
+    MV_U16  fragmentCtrl;
+    MV_U8   ttl;
+    MV_U8   protocol;
+    MV_U16  checksum;
+    MV_U32  srcIP;
+    MV_U32  dstIP;
+
+} MV_IP_HEADER; 
+
+#define MV_ICMP_ECHOREPLY          0       /* Echo Reply                   */
+#define MV_ICMP_DEST_UNREACH       3       /* Destination Unreachable      */
+#define MV_ICMP_SOURCE_QUENCH      4       /* Source Quench                */
+#define MV_ICMP_REDIRECT           5       /* Redirect (change route)      */
+#define MV_ICMP_ECHO               8       /* Echo Request                 */
+#define MV_ICMP_TIME_EXCEEDED      11      /* Time Exceeded                */
+#define MV_ICMP_PARAMETERPROB      12      /* Parameter Problem            */
+#define MV_ICMP_TIMESTAMP          13      /* Timestamp Request            */
+#define MV_ICMP_TIMESTAMPREPLY     14      /* Timestamp Reply              */
+#define MV_ICMP_INFO_REQUEST       15      /* Information Request          */
+#define MV_ICMP_INFO_REPLY         16      /* Information Reply            */
+#define MV_ICMP_ADDRESS            17      /* Address Mask Request         */
+#define MV_ICMP_ADDRESSREPLY       18      /* Address Mask Reply           */
+
+typedef struct
+{
+    MV_U8   type;
+    MV_U8   code;
+    MV_U16  checksum;
+    MV_U16  id;
+    MV_U16  sequence;
+
+} MV_ICMP_ECHO_HEADER;
+
+typedef struct
+{
+    MV_U16  source;
+    MV_U16  dest;
+    MV_U32  seq;
+    MV_U32  ack_seq;
+    MV_U16  flags;
+    MV_U16  window;
+    MV_U16  chksum;
+    MV_U16  urg_offset;
+
+} MV_TCP_HEADER;
+
+typedef struct
+{
+    MV_U16  source;
+    MV_U16  dest;
+    MV_U16  len;
+    MV_U16  check;
+
+} MV_UDP_HEADER;
+
+#endif /* __INCmv802_3h */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/common/mvCommon.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/common/mvCommon.h
@@ -0,0 +1,330 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+
+#ifndef __INCmvCommonh
+#define __INCmvCommonh
+
+#include "mvTypes.h"
+#include "mvDeviceId.h"
+#ifndef MV_ASMLANGUAGE
+#include "mv802_3.h"
+#include "mvVideo.h"
+#endif
+
+/* Swap tool */
+
+/* 16bit nibble swap. For example 0x1234 -> 0x2143                          */
+#define MV_NIBBLE_SWAP_16BIT(X)    (((X&0xf) << 4) |     \
+                                    ((X&0xf0) >> 4) |    \
+                                    ((X&0xf00) << 4) |   \
+                                    ((X&0xf000) >> 4))
+        
+/* 32bit nibble swap. For example 0x12345678 -> 0x21436587                  */
+#define MV_NIBBLE_SWAP_32BIT(X)    (((X&0xf) << 4) |       \
+                                    ((X&0xf0) >> 4) |      \
+                                    ((X&0xf00) << 4) |     \
+                                    ((X&0xf000) >> 4) |    \
+                                    ((X&0xf0000) << 4) |   \
+                                    ((X&0xf00000) >> 4) |  \
+                                    ((X&0xf000000) << 4) | \
+                                    ((X&0xf0000000) >> 4))
+
+/* 16bit byte swap. For example 0x1122 -> 0x2211                            */
+#define MV_BYTE_SWAP_16BIT(X) ((((X)&0xff)<<8) | (((X)&0xff00)>>8))
+
+/* 32bit byte swap. For example 0x11223344 -> 0x44332211                    */
+#define MV_BYTE_SWAP_32BIT(X) ((((X)&0xff)<<24) |                       \
+                               (((X)&0xff00)<<8) |                      \
+                               (((X)&0xff0000)>>8) |                    \
+                               (((X)&0xff000000)>>24))
+
+/* 64bit byte swap. For example 0x11223344.55667788 -> 0x88776655.44332211  */
+#define MV_BYTE_SWAP_64BIT(X) ((l64) ((((X)&0xffULL)<<56) |             \
+                                      (((X)&0xff00ULL)<<40) |           \
+                                      (((X)&0xff0000ULL)<<24) |         \
+                                      (((X)&0xff000000ULL)<<8) |        \
+                                      (((X)&0xff00000000ULL)>>8) |      \
+                                      (((X)&0xff0000000000ULL)>>24) |   \
+                                      (((X)&0xff000000000000ULL)>>40) | \
+                                      (((X)&0xff00000000000000ULL)>>56)))
+
+/* Endianess macros.                                                        */
+#if defined(MV_CPU_LE)
+    #define MV_16BIT_LE(X)  (X) 
+    #define MV_32BIT_LE(X)  (X)
+    #define MV_64BIT_LE(X)  (X)
+    #define MV_16BIT_BE(X)  MV_BYTE_SWAP_16BIT(X)
+    #define MV_32BIT_BE(X)  MV_BYTE_SWAP_32BIT(X)
+    #define MV_64BIT_BE(X)  MV_BYTE_SWAP_64BIT(X)
+#elif defined(MV_CPU_BE)
+    #define MV_16BIT_LE(X)  MV_BYTE_SWAP_16BIT(X) 
+    #define MV_32BIT_LE(X)  MV_BYTE_SWAP_32BIT(X)
+    #define MV_64BIT_LE(X)  MV_BYTE_SWAP_64BIT(X)
+    #define MV_16BIT_BE(X)  (X)
+    #define MV_32BIT_BE(X)  (X)
+    #define MV_64BIT_BE(X)  (X)
+#else
+    #error "CPU endianess isn't defined!\n"
+#endif 
+
+
+/* Bit field definitions */
+#define NO_BIT      0x00000000
+
+/* avoid redefinition of bits */
+#ifndef BIT0
+
+#define BIT0        0x00000001
+#define BIT1        0x00000002
+#define BIT2        0x00000004
+#define BIT3        0x00000008
+#define BIT4        0x00000010
+#define BIT5        0x00000020
+#define BIT6        0x00000040
+#define BIT7        0x00000080
+#define BIT8        0x00000100
+#define BIT9        0x00000200
+#define BIT10       0x00000400
+#define BIT11       0x00000800
+#define BIT12       0x00001000
+#define BIT13       0x00002000
+#define BIT14       0x00004000
+#define BIT15       0x00008000
+#define BIT16       0x00010000
+#define BIT17       0x00020000
+#define BIT18       0x00040000
+#define BIT19       0x00080000
+#define BIT20       0x00100000
+#define BIT21       0x00200000
+#define BIT22       0x00400000
+#define BIT23       0x00800000
+#define BIT24       0x01000000
+#define BIT25       0x02000000
+#define BIT26       0x04000000
+#define BIT27       0x08000000
+#define BIT28       0x10000000
+#define BIT29       0x20000000
+#define BIT30       0x40000000
+#define BIT31       0x80000000
+
+#endif /* BIT0 */
+/* Handy sizes */
+#define _1K         0x00000400
+#define _2K         0x00000800
+#define _4K         0x00001000
+#define _8K         0x00002000
+#define _16K        0x00004000
+#define _32K        0x00008000
+#define _64K        0x00010000
+#define _128K       0x00020000
+#define _256K       0x00040000
+#define _512K       0x00080000
+
+#define _1M         0x00100000
+#define _2M         0x00200000
+#define _4M         0x00400000
+#define _8M         0x00800000
+#define _16M        0x01000000
+#define _32M        0x02000000
+#define _64M        0x04000000
+#define _128M       0x08000000
+#define _256M       0x10000000
+#define _512M       0x20000000
+
+#define _1G         0x40000000
+#define _2G         0x80000000
+
+/* Tclock and Sys clock define */
+#define _100MHz     100000000
+#define _125MHz     125000000
+#define _133MHz     133333334
+#define _150MHz     150000000
+#define _160MHz     160000000
+#define _166MHz     166666667
+#define _175MHz     175000000
+#define _178MHz     178000000
+#define _183MHz     183333334
+#define _187MHz     187000000
+#define _192MHz     192000000
+#define _194MHz     194000000
+#define _200MHz     200000000
+#define _233MHz     233333334
+#define _250MHz     250000000
+#define _266MHz     266666667
+#define _300MHz     300000000
+
+
+/* Supported clocks */
+#define MV_BOARD_TCLK_100MHZ	100000000   
+#define MV_BOARD_TCLK_125MHZ	125000000	
+#define MV_BOARD_TCLK_133MHZ	133333333   
+#define MV_BOARD_TCLK_150MHZ	150000000  
+#define MV_BOARD_TCLK_166MHZ	166666667   
+#define MV_BOARD_TCLK_200MHZ	200000000   
+
+/* For better address window table readability */
+#define EN			MV_TRUE
+#define DIS			MV_FALSE
+#define N_A			-1			/* Not applicable */
+
+/* Cache configuration options for memory (DRAM, SRAM, ... ) */
+
+/* Memory uncached, HW or SW cache coherency is not needed */
+#define MV_UNCACHED             0   
+/* Memory cached, HW cache coherency supported in WriteThrough mode */
+#define MV_CACHE_COHER_HW_WT    1
+/* Memory cached, HW cache coherency supported in WriteBack mode */
+#define MV_CACHE_COHER_HW_WB    2
+/* Memory cached, No HW cache coherency, Cache coherency must be in SW */
+#define MV_CACHE_COHER_SW       3
+
+               
+/* Macro for testing aligment. Positive if number is NOT aligned   */
+#define MV_IS_NOT_ALIGN(number, align)      ((number) & ((align) - 1))
+
+/* Macro for alignment up. For example, MV_ALIGN_UP(0x0330, 0x20) = 0x0340   */
+#define MV_ALIGN_UP(number, align)                                          \
+(((number) & ((align) - 1)) ? (((number) + (align)) & ~((align)-1)) : (number))
+
+/* Macro for alignment down. For example, MV_ALIGN_UP(0x0330, 0x20) = 0x0320 */
+#define MV_ALIGN_DOWN(number, align) ((number) & ~((align)-1))
+
+/* This macro returns absolute value                                        */
+#define MV_ABS(number)  (((int)(number) < 0) ? -(int)(number) : (int)(number))
+
+
+/* Bit fields manipulation macros                                           */
+
+/* An integer word which its 'x' bit is set                                 */
+#define MV_BIT_MASK(bitNum)         (1 << (bitNum) )     
+
+/* Checks wheter bit 'x' in integer word is set                             */
+#define MV_BIT_CHECK(word, bitNum)  ( (word) & MV_BIT_MASK(bitNum) )
+
+/* Clear (reset) bit 'x' in integer word (RMW - Read-Modify-Write)          */
+#define MV_BIT_CLEAR(word, bitNum)  ( (word) &= ~(MV_BIT_MASK(bitNum)) )
+
+/* Set bit 'x' in integer word (RMW)                                        */
+#define MV_BIT_SET(word, bitNum)    ( (word) |= MV_BIT_MASK(bitNum) )
+
+/* Invert bit 'x' in integer word (RMW)                                     */
+#define MV_BIT_INV(word, bitNum)    ( (word) ^= MV_BIT_MASK(bitNum) )
+
+/* Get the min between 'a' or 'b'                                           */
+#define MV_MIN(a,b)    (((a) < (b)) ? (a) : (b)) 
+
+/* Get the max between 'a' or 'b'                                           */
+#define MV_MAX(a,b)    (((a) < (b)) ? (b) : (a)) 
+
+/* Temporary */
+#define mvOsDivide(num, div)        \
+({                                  \
+    int i=0, rem=(num);             \
+                                    \
+    while(rem >= (div))             \
+    {                               \
+        rem -= (div);               \
+        i++;                        \
+    }                               \
+    (i);                            \
+})
+
+/* Temporary */
+#define mvOsReminder(num, div)      \
+({                                  \
+    int rem = (num);                \
+                                    \
+    while(rem >= (div))             \
+        rem -= (div);               \
+    (rem);                          \
+})
+
+#define MV_IP_QUAD(ipAddr)    ((ipAddr >> 24) & 0xFF), ((ipAddr >> 16) & 0xFF), \
+                              ((ipAddr >> 8) & 0xFF), ((ipAddr >> 0) & 0xFF)
+
+#define MV_IS_POWER_OF_2(num) ((num != 0) && ((num & (num - 1)) == 0))
+
+#ifndef MV_ASMLANGUAGE
+/* mvCommon API list */
+
+MV_VOID     mvHexToBin(const char* pHexStr, MV_U8* pBin, int size);
+void        mvAsciiToHex(const char* asciiStr, char* hexStr);
+void        mvBinToHex(const MV_U8* bin, char* hexStr, int size);
+void        mvBinToAscii(const MV_U8* bin, char* asciiStr, int size);
+
+MV_STATUS mvMacStrToHex(const char* macStr, MV_U8* macHex);
+MV_STATUS mvMacHexToStr(MV_U8* macHex, char* macStr);
+void        mvSizePrint(MV_U32);
+
+MV_U32 mvLog2(MV_U32 num);
+
+MV_STATUS mvWinOverlapTest(MV_ADDR_WIN *pAddrWin1, MV_ADDR_WIN *pAddrWin2);
+MV_STATUS mvWinWithinWinTest(MV_ADDR_WIN *pAddrWin1, MV_ADDR_WIN *pAddrWin2);
+
+#endif /* MV_ASMLANGUAGE */
+
+
+#endif	/* __INCmvCommonh */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/common/mvStack.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/common/mvStack.c
@@ -0,0 +1,100 @@
+/******************************************************************************* 
+*                   Copyright 2003, Marvell Semiconductor Israel LTD.          * 
+* THIS CODE CONTAINS CONFIDENTIAL INFORMATION OF MARVELL.                      * 
+* NO RIGHTS ARE GRANTED HEREIN UNDER ANY PATENT, MASK WORK RIGHT OR COPYRIGHT  * 
+* OF MARVELL OR ANY THIRD PARTY. MARVELL RESERVES THE RIGHT AT ITS SOLE        * 
+* DISCRETION TO REQUEST THAT THIS CODE BE IMMEDIATELY RETURNED TO MARVELL.     * 
+* THIS CODE IS PROVIDED "AS IS". MARVELL MAKES NO WARRANTIES, EXPRESSED,       * 
+* IMPLIED OR OTHERWISE, REGARDING ITS ACCURACY, COMPLETENESS OR PERFORMANCE.   * 
+*                                                                              * 
+* MARVELL COMPRISES MARVELL TECHNOLOGY GROUP LTD. (MTGL) AND ITS SUBSIDIARIES, * 
+* MARVELL INTERNATIONAL LTD. (MIL), MARVELL TECHNOLOGY, INC. (MTI), MARVELL    * 
+* SEMICONDUCTOR, INC. (MSI), MARVELL ASIA PTE LTD. (MAPL), MARVELL JAPAN K.K.  * 
+* (MJKK), MARVELL SEMICONDUCTOR ISRAEL LTD (MSIL).                             * 
+********************************************************************************
+* mvQueue.c
+*
+* FILENAME:    $Workfile: mvStack.c $                     
+* REVISION:    $Revision: $                              
+* LAST UPDATE: $Modtime:  $                  
+*                                                          
+* DESCRIPTION:                                             
+*     This file implements simple Stack LIFO functionality.
+*******************************************************************************/
+
+/* includes */
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "mvDebug.h"
+#include "mvStack.h"
+
+/* defines  */
+
+
+/* Public functions */
+
+
+/* Purpose: Create new stack
+ * Inputs:
+ *	- MV_U32	noOfElements	- maximum number of elements in the stack.
+ *                              Each element 4 bytes size
+ * Return: void* - pointer to created stack.
+ */
+void*   mvStackCreate(int numOfElements)
+{
+	MV_STACK*   pStack;
+    MV_U32*     pStackElements;
+
+    pStack = (MV_STACK*)mvOsMalloc(sizeof(MV_STACK));
+    pStackElements = (MV_U32*)mvOsMalloc(numOfElements*sizeof(MV_U32));
+    if( (pStack == NULL) || (pStackElements == NULL) )
+    {
+	    mvOsPrintf("mvStack: Can't create new stack\n");
+        return NULL;
+    }
+    memset(pStackElements, 0, numOfElements*sizeof(MV_U32));
+    pStack->numOfElements = numOfElements;
+    pStack->stackIdx = 0;
+    pStack->stackElements = pStackElements;
+
+	return pStack;
+}
+
+/* Purpose: Delete existing stack
+ * Inputs:
+ *	- void* 	stackHndl 	- Stack handle as returned by "mvStackCreate()" function
+ *
+ * Return: MV_STATUS  	MV_NOT_FOUND - Failure. StackHandle is not valid.
+ *						MV_OK        - Success.
+ */
+MV_STATUS   mvStackDelete(void* stackHndl)
+{
+	MV_STACK*   pStack = (MV_STACK*)stackHndl;
+
+	if( (pStack == NULL) || (pStack->stackElements == NULL) )
+		return MV_NOT_FOUND;
+
+    mvOsFree(pStack->stackElements);
+    mvOsFree(pStack);
+
+    return MV_OK;
+}
+
+
+/* PrintOut status of the stack */
+void    mvStackStatus(void* stackHndl, MV_BOOL isPrintElements)
+{
+	int			i;
+    MV_STACK*   pStack = (MV_STACK*)stackHndl;
+
+    mvOsPrintf("StackHandle=%p, pElements=%p, numElements=%d, stackIdx=%d\n",
+                stackHndl, pStack->stackElements, pStack->numOfElements, 
+                pStack->stackIdx);
+    if(isPrintElements == MV_TRUE)
+    {
+        for(i=0; i<pStack->stackIdx; i++)
+        {
+            mvOsPrintf("%3d. Value=0x%x\n", i, pStack->stackElements[i]);
+        }
+    }
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/common/mvStack.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/common/mvStack.h
@@ -0,0 +1,132 @@
+/******************************************************************************* 
+*                   Copyright 2003, Marvell Semiconductor Israel LTD.          * 
+* THIS CODE CONTAINS CONFIDENTIAL INFORMATION OF MARVELL.                      * 
+* NO RIGHTS ARE GRANTED HEREIN UNDER ANY PATENT, MASK WORK RIGHT OR COPYRIGHT  * 
+* OF MARVELL OR ANY THIRD PARTY. MARVELL RESERVES THE RIGHT AT ITS SOLE        * 
+* DISCRETION TO REQUEST THAT THIS CODE BE IMMEDIATELY RETURNED TO MARVELL.     * 
+* THIS CODE IS PROVIDED "AS IS". MARVELL MAKES NO WARRANTIES, EXPRESSED,       * 
+* IMPLIED OR OTHERWISE, REGARDING ITS ACCURACY, COMPLETENESS OR PERFORMANCE.   * 
+*                                                                              * 
+* MARVELL COMPRISES MARVELL TECHNOLOGY GROUP LTD. (MTGL) AND ITS SUBSIDIARIES, * 
+* MARVELL INTERNATIONAL LTD. (MIL), MARVELL TECHNOLOGY, INC. (MTI), MARVELL    * 
+* SEMICONDUCTOR, INC. (MSI), MARVELL ASIA PTE LTD. (MAPL), MARVELL JAPAN K.K.  * 
+* (MJKK), MARVELL SEMICONDUCTOR ISRAEL LTD (MSIL).                             * 
+********************************************************************************
+* mvStack.h - Header File for :
+*
+* FILENAME:    $Workfile: mvStack.h $
+* REVISION:    $Revision: $
+* LAST UPDATE: $Modtime:  $
+*
+* DESCRIPTION:
+*     This file defines simple Stack (LIFO) functionality.
+*
+*******************************************************************************/
+
+#ifndef __mvStack_h__
+#define __mvStack_h__
+
+
+/* includes */
+
+
+/* defines  */
+
+
+/* typedefs */
+/* Data structure describes general purpose Stack */
+typedef struct 
+{
+    int     stackIdx;
+    int     numOfElements;
+    MV_U32* stackElements;
+} MV_STACK;
+
+static INLINE MV_BOOL mvStackIsFull(void* stackHndl)
+{	
+    MV_STACK*   pStack = (MV_STACK*)stackHndl;
+
+    if(pStack->stackIdx == pStack->numOfElements)
+        return MV_TRUE;
+
+    return MV_FALSE;
+}
+
+static INLINE MV_BOOL mvStackIsEmpty(void* stackHndl)
+{	
+    MV_STACK*   pStack = (MV_STACK*)stackHndl;
+
+    if(pStack->stackIdx == 0)
+        return MV_TRUE;
+
+    return MV_FALSE;
+}
+/* Purpose: Push new element to stack
+ * Inputs:
+ *	- void* 	stackHndl 	- Stack handle as returned by "mvStackCreate()" function.
+ *	- MV_U32	value		- New element.
+ *
+ * Return: MV_STATUS  	MV_FULL - Failure. Stack is full.
+ *						MV_OK   - Success. Element is put to stack.
+ */
+static INLINE void mvStackPush(void* stackHndl, MV_U32 value)
+{	
+    MV_STACK*   pStack = (MV_STACK*)stackHndl;
+
+#ifdef MV_RT_DEBUG
+    if(pStack->stackIdx == pStack->numOfElements)
+    {
+        mvOsPrintf("mvStackPush: Stack is FULL\n");
+        return;
+    }
+#endif /* MV_RT_DEBUG */
+
+    pStack->stackElements[pStack->stackIdx] = value;
+    pStack->stackIdx++;
+}
+
+/* Purpose: Pop element from the top of stack and copy it to "pValue"
+ * Inputs:
+ *	- void* 	stackHndl 	- Stack handle as returned by "mvStackCreate()" function.
+ *	- MV_U32	value		- Element in the top of stack.
+ *
+ * Return: MV_STATUS  	MV_EMPTY - Failure. Stack is empty.
+ *						MV_OK    - Success. Element is removed from the stack and
+ *									copied to pValue argument
+ */
+static INLINE MV_U32   mvStackPop(void* stackHndl)
+{
+    MV_STACK*   pStack = (MV_STACK*)stackHndl;
+
+#ifdef MV_RT_DEBUG
+    if(pStack->stackIdx == 0)
+    {
+        mvOsPrintf("mvStackPop: Stack is EMPTY\n");
+        return 0;
+    }
+#endif /* MV_RT_DEBUG */
+
+    pStack->stackIdx--;
+    return pStack->stackElements[pStack->stackIdx];
+}
+
+static INLINE int       mvStackIndex(void* stackHndl)
+{
+    MV_STACK*   pStack = (MV_STACK*)stackHndl;
+
+    return pStack->stackIdx;
+}
+
+/* mvStack.h API list */
+
+/* Create new Stack */
+void*       mvStackCreate(int numOfElements);
+
+/* Delete existing stack */
+MV_STATUS   mvStackDelete(void* stackHndl);
+
+/* Print status of the stack */
+void        mvStackStatus(void* stackHndl, MV_BOOL isPrintElements);
+
+#endif /* __mvStack_h__ */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/common/mvDeviceId.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/common/mvDeviceId.h
@@ -0,0 +1,196 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+        this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCmvDeviceIdh
+#define __INCmvDeviceIdh
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/* defines  */
+#define MARVELL_VEN_ID		    0x11ab
+
+/* Disco-3 */
+#define MV64460_DEV_ID          	0x6480
+#define MV64460B_DEV_ID         	0x6485
+#define MV64430_DEV_ID          	0x6420
+
+/* Disco-5 */
+#define MV64560_DEV_ID          	0x6450
+
+/* Disco-6 */
+#define MV64660_DEV_ID          	0x6460
+
+/* Orion */        
+#define MV_1181_DEV_ID          	0x1181
+#define MV_5181_DEV_ID          	0x5181
+#define MV_5281_DEV_ID          	0x5281
+#define MV_5182_DEV_ID          	0x5182
+#define MV_8660_DEV_ID          	0x8660
+#define MV_5180_DEV_ID          	0x5180
+#define MV_5082_DEV_ID          	0x5082
+#define MV_1281_DEV_ID          	0x1281
+#define MV_6082_DEV_ID          	0x6082
+#define MV_6183_DEV_ID          	0x6183
+#define MV_6183L_DEV_ID          	0x6083
+
+#define MV_5281_D0_REV          	0x4
+#define MV_5281_D0_ID           	((MV_5281_DEV_ID << 16) | MV_5281_D0_REV)
+#define MV_5281_D0_NAME         "88F5281 D0"
+
+#define MV_5281_D1_REV          	0x5
+#define MV_5281_D1_ID           	((MV_5281_DEV_ID << 16) | MV_5281_D1_REV)
+#define MV_5281_D1_NAME         "88F5281 D1"
+
+#define MV_5281_D2_REV          	0x6
+#define MV_5281_D2_ID           	((MV_5281_DEV_ID << 16) | MV_5281_D2_REV)
+#define MV_5281_D2_NAME         "88F5281 D2"
+
+
+#define MV_5181L_A0_REV         	0x8 /* need for PCIE Er */
+#define MV_5181_A1_REV          	0x1 /* for USB Er ..*/
+#define MV_5181_B0_REV          	0x2
+#define MV_5181_B1_REV          	0x3
+#define MV_5182_A1_REV          	0x1
+#define MV_5180N_B1_REV         	0x3
+#define MV_5181L_A0_ID          	((MV_5181_DEV_ID << 16) | MV_5181L_A0_REV)
+
+
+
+/* kw */
+#define MV_6281_DEV_ID          	0x6281
+#define MV_6192_DEV_ID          	0x6192
+#define MV_6180_DEV_ID          	0x6180
+
+#define MV_6281_Z0_REV         		0x0
+#define MV_6281_Z0_ID          		((MV_6281_DEV_ID << 16) | MV_6281_Z0_REV)
+#define MV_6281_Z0_NAME         	"88F6281 Z0"
+
+#define MV_6192_Z0_REV         		0x0
+#define MV_6192_Z0_ID          		((MV_6192_DEV_ID << 16) | MV_6192_Z0_REV)
+#define MV_6192_Z0_NAME         	"88F6192 Z0"
+
+#define MV_6180_Z0_REV         		0x0
+#define MV_6180_Z0_ID          		((MV_6180_DEV_ID << 16) | MV_6180_Z0_REV)
+#define MV_6180_Z0_NAME         	"88F6180 Z0"
+
+/* Disco-Duo */
+#define MV_78XX0_ZY_DEV_ID       0x6381
+#define MV_78XX0_ZY_NAME         "MV78X00"
+
+#define MV_78XX0_Z0_REV         0x1
+#define MV_78XX0_Z0_ID          ((MV_78XX0_ZY_DEV_ID << 16) | MV_78XX0_Z0_REV)
+#define MV_78XX0_Z0_NAME        "78X00 Z0"
+
+#define MV_78XX0_Y0_REV         0x2
+#define MV_78XX0_Y0_ID          ((MV_78XX0_ZY_DEV_ID << 16) | MV_78XX0_Y0_REV)
+#define MV_78XX0_Y0_NAME        "78X00 Y0"
+
+#define MV_78XX0_DEV_ID       	0x7800
+#define MV_78XX0_NAME         	"MV78X00"
+
+#define MV_78200_DEV_ID      	0x7820
+#define MV_78100_DEV_ID      	0x7810
+#define MV_78XX0_A0_REV		0x1
+
+#define MV_78100_NAME		"MV78100"
+#define MV_78200_NAME		"MV78200"
+
+#define MV_78100_A0_ID		((MV_78100_DEV_ID << 16) | MV_78XX0_A0_REV)
+#define MV_78200_A0_ID		((MV_78200_DEV_ID << 16) | MV_78XX0_A0_REV)
+
+#define MV_78100_A0_NAME	"MV78100 A0"
+#define MV_78200_A0_NAME	"MV78200 A0"
+#define MV_78XX0_A0_NAME	"MV78XX0 A0"
+
+/* dove */
+#define MV_6781_DEV_ID			0x6781
+#define MV_510_DEV_ID			0x0510
+
+#define MV_6781_Z0_REV			0x0
+#define MV_6781_Z0_ID			((MV_6781_DEV_ID << 16) | MV_6781_Z0_REV)
+#define MV_6781_Z0_NAME			"88F6781 Z0"
+
+#define MV_6781_Z1_REV			0x1
+#define MV_6781_Z1_ID			((MV_6781_DEV_ID << 16) | MV_6781_Z1_REV)
+#define MV_6781_Z1_NAME			"88F6781 Z1"
+
+#define MV_6781_Y0_REV			0x2
+#define MV_6781_Y0_ID			((MV_6781_DEV_ID << 16) | MV_6781_Y0_REV)
+#define MV_6781_Y0_NAME			"88F6781 Y0"
+
+#define MV_6781_Y1_REV			0x3
+#define MV_6781_Y1_ID			((MV_6781_DEV_ID << 16) | MV_6781_Y1_REV)
+#define MV_6781_Y1_NAME			"88AP510 (Y1)"
+
+#define MV_6781_X0_REV			0x4
+#define MV_6781_X0_ID			((MV_6781_DEV_ID << 16) | MV_6781_X0_REV)
+#define MV_6781_X0_NAME			"88AP510 (X0)"
+
+#define MV_6781_A0_REV			0x6
+#define MV_6781_A0_ID			((MV_510_DEV_ID << 16) | MV_6781_A0_REV)
+#define MV_6781_A0_NAME			"88AP510 (A0)"
+
+#endif /* __INCmvDeviceIdh */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/common/mvTypes.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/common/mvTypes.h
@@ -0,0 +1,283 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#ifndef __INCmvTypesh
+#define __INCmvTypesh
+
+/* Defines */
+
+/* The following is a list of Marvell status    */
+#define MV_ERROR		    (-1)
+#define MV_OK			    (0x00)  /* Operation succeeded                   */
+#define MV_FAIL			    (0x01)	/* Operation failed                      */
+#define MV_BAD_VALUE        (0x02)  /* Illegal value (general)               */
+#define MV_OUT_OF_RANGE     (0x03)  /* The value is out of range             */
+#define MV_BAD_PARAM        (0x04)  /* Illegal parameter in function called  */
+#define MV_BAD_PTR          (0x05)  /* Illegal pointer value                 */
+#define MV_BAD_SIZE         (0x06)  /* Illegal size                          */
+#define MV_BAD_STATE        (0x07)  /* Illegal state of state machine        */
+#define MV_SET_ERROR        (0x08)  /* Set operation failed                  */
+#define MV_GET_ERROR        (0x09)  /* Get operation failed                  */
+#define MV_CREATE_ERROR     (0x0A)  /* Fail while creating an item           */
+#define MV_NOT_FOUND        (0x0B)  /* Item not found                        */
+#define MV_NO_MORE          (0x0C)  /* No more items found                   */
+#define MV_NO_SUCH          (0x0D)  /* No such item                          */
+#define MV_TIMEOUT          (0x0E)  /* Time Out                              */
+#define MV_NO_CHANGE        (0x0F)  /* Parameter(s) is already in this value */
+#define MV_NOT_SUPPORTED    (0x10)  /* This request is not support           */
+#define MV_NOT_IMPLEMENTED  (0x11)  /* Request supported but not implemented */
+#define MV_NOT_INITIALIZED  (0x12)  /* The item is not initialized           */
+#define MV_NO_RESOURCE      (0x13)  /* Resource not available (memory ...)   */
+#define MV_FULL             (0x14)  /* Item is full (Queue or table etc...)  */
+#define MV_EMPTY            (0x15)  /* Item is empty (Queue or table etc...) */
+#define MV_INIT_ERROR       (0x16)  /* Error occured while INIT process      */
+#define MV_HW_ERROR         (0x17)  /* Hardware error                        */
+#define MV_TX_ERROR         (0x18)  /* Transmit operation not succeeded      */
+#define MV_RX_ERROR         (0x19)  /* Recieve operation not succeeded       */
+#define MV_NOT_READY	    (0x1A)	/* The other side is not ready yet       */
+#define MV_ALREADY_EXIST    (0x1B)  /* Tried to create existing item         */
+#define MV_OUT_OF_CPU_MEM   (0x1C)  /* Cpu memory allocation failed.         */
+#define MV_NOT_STARTED      (0x1D)  /* Not started yet         */
+#define MV_BUSY             (0x1E)  /* Item is busy.                         */
+#define MV_TERMINATE        (0x1F)  /* Item terminates it's work.            */
+#define MV_NOT_ALIGNED      (0x20)  /* Wrong alignment                       */
+#define MV_NOT_ALLOWED      (0x21)  /* Operation NOT allowed                 */
+#define MV_WRITE_PROTECT    (0x22)  /* Write protected                       */
+
+
+#define MV_INVALID  (int)(-1)
+
+#define MV_FALSE	0
+#define MV_TRUE     (!(MV_FALSE))
+
+
+#ifndef NULL
+#define NULL ((void*)0)
+#endif
+
+
+#ifndef MV_ASMLANGUAGE
+/* typedefs */
+
+typedef char  MV_8;
+typedef unsigned char	MV_U8;
+
+typedef int		MV_32;
+typedef unsigned int	MV_U32;
+
+typedef short		MV_16;
+typedef unsigned short	MV_U16;
+
+#ifdef MV_PPC64
+typedef long		MV_64;
+typedef unsigned long	MV_U64;
+#else
+typedef long long		MV_64;
+typedef unsigned long long	MV_U64;
+#endif
+
+typedef long		MV_LONG;	/* 32/64 */
+typedef unsigned long	MV_ULONG;	/* 32/64 */
+
+typedef int     MV_STATUS;
+typedef int     MV_BOOL;
+typedef void    MV_VOID;
+typedef float   MV_FLOAT;
+
+typedef int 	(*MV_FUNCPTR) (void);	  /* ptr to function returning int   */
+typedef void 	(*MV_VOIDFUNCPTR) (void); /* ptr to function returning void  */
+typedef double 	(*MV_DBLFUNCPTR) (void);  /* ptr to function returning double*/
+typedef float 	(*MV_FLTFUNCPTR) (void);  /* ptr to function returning float */
+
+typedef MV_U32 MV_KHZ;
+typedef MV_U32 MV_MHZ;
+typedef MV_U32 MV_HZ;
+
+
+/* This enumerator describes the set of commands that can be applied on   	*/
+/* an engine (e.g. IDMA, XOR). Appling a comman depends on the current   	*/
+/* status (see MV_STATE enumerator)                      					*/
+/* Start can be applied only when status is IDLE                         */
+/* Stop can be applied only when status is IDLE, ACTIVE or PAUSED        */
+/* Pause can be applied only when status is ACTIVE                          */
+/* Restart can be applied only when status is PAUSED                        */
+typedef enum _mvCommand
+{
+    MV_START,              /* Start	*/
+    MV_STOP,               /* Stop     */
+    MV_PAUSE,              /* Pause    */
+    MV_RESTART             /* Restart  */
+} MV_COMMAND;
+
+/* This enumerator describes the set of state conditions.					*/
+/* Moving from one state to other is stricted.   							*/
+typedef enum _mvState
+{
+    MV_IDLE,
+    MV_ACTIVE,
+    MV_PAUSED,
+    MV_UNDEFINED_STATE
+} MV_STATE;
+
+typedef enum 
+{
+	ETH_MAC_SPEED_10M,
+	ETH_MAC_SPEED_100M,
+	ETH_MAC_SPEED_1000M,
+	ETH_MAC_SPEED_AUTO,
+
+}MV_ETH_MAC_SPEED;
+
+/* This structure describes address space window. Window base can be        */
+/* 64 bit, window size up to 4GB                                            */
+typedef struct _mvAddrWin
+{
+    MV_U32      baseLow;    /* 32bit base low       */
+    MV_U32      baseHigh;   /* 32bit base high      */
+    MV_U32      size;       /* 32bit size           */
+}MV_ADDR_WIN;
+
+/* This binary enumerator describes protection attribute status             */
+typedef enum _mvProtRight
+{
+    ALLOWED,        /* Protection attribute allowed                         */
+    FORBIDDEN       /* Protection attribute forbidden                       */
+}MV_PROT_RIGHT;
+
+/* Unified struct for Rx and Tx packet operations. The user is required to 	*/
+/* be familier only with Tx/Rx descriptor command status.               	*/
+typedef struct _bufInfo
+{
+    MV_U32   cmdSts;        /* Tx/Rx command status                                     */
+        MV_U16   byteCnt;       /* Size of valid data in the buffer     */
+    MV_U16   bufSize;       /* Total size of the buffer             */
+    MV_U8    *pBuff;            /* Pointer to Buffer                    */
+    MV_U8    *pData;            /* Pointer to data in the Buffer        */
+    MV_U32   userInfo1;         /* Tx/Rx attached user information 1    */
+    MV_U32   userInfo2;         /* Tx/Rx attached user information 2    */
+    struct _bufInfo *pNextBufInfo;  /* Next buffer in packet            */
+} BUF_INFO;
+
+/* This structure contains information describing one of buffers
+ * (fragments) they are built Ethernet packet.
+ */
+typedef struct
+{
+     MV_U8*	    bufVirtPtr;
+     MV_ULONG	bufPhysAddr;
+     MV_U32   	bufSize;
+     MV_U32     dataSize;
+
+     MV_U32	memHandle;
+} MV_BUF_INFO;
+
+/* This structure contains information describing Ethernet packet.
+ * The packet can be divided for few buffers (fragments)
+ */
+typedef struct
+{
+    MV_ULONG   	osInfo;
+    MV_BUF_INFO *pFrags;
+    MV_U32      status;
+    MV_U16      pktSize;
+    MV_U16      numFrags;
+    char        srcIdx;
+    MV_U32      fragIP;
+} MV_PKT_INFO;
+
+
+/* This structure describes SoC units address decode window	*/
+typedef struct 
+{
+	MV_ADDR_WIN		addrWin;	/* An address window*/
+	MV_BOOL			enable;		/* Address decode window is enabled/disabled    */
+	MV_U8			attrib;		/* chip select attributes */
+	MV_U8			targetId;	/* Target Id of this MV_TARGET */
+}MV_UNIT_WIN_INFO;
+
+/* This structure describes access rights for Access protection windows     */
+/* that can be found in IDMA, XOR, Ethernet and MPSC units.                 */
+/* Note that the permission enumerator coresponds to its register format.   */
+/* For example, Read only premission is presented as "1" in register field. */
+typedef enum _mvAccessRights
+{
+    	NO_ACCESS_ALLOWED = 0,  /* No access allowed            */
+    	READ_ONLY         = 1,  /* Read only permission         */
+	ACC_RESERVED	  = 2,	/* Reserved access right		*/
+    	FULL_ACCESS       = 3,  /* Read and Write permission    */
+	MAX_ACC_RIGHTS
+}MV_ACCESS_RIGHTS;
+
+typedef struct _mvDecRegs
+{
+    MV_U32 baseReg;
+    MV_U32 baseRegHigh;
+    MV_U32 sizeReg;
+} MV_DEC_REGS;
+
+#endif /* MV_ASMLANGUAGE */
+
+#endif /* __INCmvTypesh */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/common/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/common/Makefile
@@ -0,0 +1,6 @@
+include $(srctree)/$(subst ",,$(CONFIG_MV_HAL_RULES_PATH))
+# Objects list
+obj-y += mvDebug.o
+obj-y += mvCommon.o
+obj-y += mvStack.o
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/common/mvCompVer.txt
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/common/mvCompVer.txt
@@ -0,0 +1,4 @@
+Global HAL Version: DOVE_HAL_3_1_2
+Unit HAL Version: 1.0.3
+Description: This component includes an implementation of the unit HAL drivers
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/common/mvDebug.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/common/mvDebug.h
@@ -0,0 +1,177 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+
+#ifndef __INCmvDebugh
+#define __INCmvDebugh
+
+/* includes */
+
+typedef enum 
+{
+    MV_MODULE_INVALID  = -1,
+    MV_MODULE_ETH      = 0,
+    MV_MODULE_IDMA,
+    MV_MODULE_XOR, 
+    MV_MODULE_TWASI,
+    MV_MODULE_MGI,
+    MV_MODULE_USB,
+    MV_MODULE_CESA,
+
+    MV_MODULE_MAX
+}MV_MODULE_ID;
+ 
+/* Define generic flags useful for most of modules */
+#define MV_DEBUG_FLAG_ALL   (0)
+#define MV_DEBUG_FLAG_INIT  (1 << 0)
+#define MV_DEBUG_FLAG_RX    (1 << 1)
+#define MV_DEBUG_FLAG_TX    (1 << 2)
+#define MV_DEBUG_FLAG_ERR   (1 << 3)
+#define MV_DEBUG_FLAG_TRACE (1 << 4)
+#define MV_DEBUG_FLAG_DUMP  (1 << 5)
+#define MV_DEBUG_FLAG_CACHE (1 << 6)
+#define MV_DEBUG_FLAG_IOCTL (1 << 7)
+#define MV_DEBUG_FLAG_STATS (1 << 8)
+
+extern MV_U32  mvDebug; 
+extern MV_U32  mvDebugModules[MV_MODULE_MAX];
+
+#ifdef MV_DEBUG
+# define MV_DEBUG_PRINT(module, flags, msg)     mvOsPrintf msg
+# define MV_DEBUG_CODE(module, flags, code)     code 
+#elif defined(MV_RT_DEBUG)
+# define MV_DEBUG_PRINT(module, flags, msg)                    \
+    if( (mvDebug & (1<<(module))) &&                           \
+        ((mvDebugModules[(module)] & (flags)) == (flags)) )    \
+        mvOsPrintf msg
+# define MV_DEBUG_CODE(module, flags, code)                    \
+    if( (mvDebug & (1<<(module))) &&                           \
+        ((mvDebugModules[(module)] & (flags)) == (flags)) )    \
+        code
+#else
+# define MV_DEBUG_PRINT(module, flags, msg)
+# define MV_DEBUG_CODE(module, flags, code)
+#endif
+
+
+
+/* typedefs */
+
+/*  time measurement structure used to check how much time pass between
+ *  two points
+ */
+typedef struct {
+    char            name[20];   /* name of the entry */
+    unsigned long   begin;      /* time measured on begin point */
+    unsigned long   end;        /* time measured on end point */
+    unsigned long   total;      /* Accumulated time */
+    unsigned long   left;       /* The rest measurement actions */
+    unsigned long   count;      /* Maximum measurement actions */
+    unsigned long   min;        /* Minimum time from begin to end */
+    unsigned long   max;        /* Maximum time from begin to end */
+} MV_DEBUG_TIMES;
+
+
+/* mvDebug.h API list */
+
+/****** Error Recording ******/
+
+/* Dump memory in specific format: 
+ * address: X1X1X1X1 X2X2X2X2 ... X8X8X8X8 
+ */
+void mvDebugMemDump(void* addr, int size, int access);
+
+void mvDebugPrintBufInfo(BUF_INFO* pBufInfo, int size, int access);
+
+void mvDebugPrintPktInfo(MV_PKT_INFO* pPktInfo, int size, int access);
+
+void    mvDebugPrintIpAddr(MV_U32 ipAddr);
+
+void mvDebugPrintMacAddr(const MV_U8* pMacAddr);
+
+/**** There are three functions deals with MV_DEBUG_TIMES structure ****/
+
+/* Reset MV_DEBUG_TIMES entry */
+void mvDebugResetTimeEntry(MV_DEBUG_TIMES* pTimeEntry, int count, char* name);
+
+/* Update MV_DEBUG_TIMES entry */
+void mvDebugUpdateTimeEntry(MV_DEBUG_TIMES* pTimeEntry);
+
+/* Print out MV_DEBUG_TIMES entry */
+void mvDebugPrintTimeEntry(MV_DEBUG_TIMES* pTimeEntry, MV_BOOL isTitle);
+
+
+/******** General ***********/
+
+/* Change value of mvDebugPrint global variable */
+
+void    mvDebugInit(void);
+void    mvDebugModuleEnable(MV_MODULE_ID module, MV_BOOL isEnable);
+void    mvDebugModuleSetFlags(MV_MODULE_ID module, MV_U32 flags);
+void    mvDebugModuleClearFlags(MV_MODULE_ID module, MV_U32 flags);
+
+
+#endif /* __INCmvDebug.h */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/common/mvCommon.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/common/mvCommon.c
@@ -0,0 +1,360 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+
+
+/*******************************************************************************
+* mvMacStrToHex - Convert MAC format string to hex.
+*
+* DESCRIPTION:
+*		This function convert MAC format string to hex.
+*
+* INPUT:
+*       macStr - MAC address string. Fornat of address string is 
+*                uu:vv:ww:xx:yy:zz, where ":" can be any delimiter.
+*
+* OUTPUT:
+*       macHex - MAC in hex format.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_STATUS mvMacStrToHex(const char* macStr, MV_U8* macHex)
+{
+    int i;
+    char tmp[3];
+
+    for(i = 0; i < MV_MAC_ADDR_SIZE; i++)
+    {
+        tmp[0] = macStr[(i * 3) + 0];
+        tmp[1] = macStr[(i * 3) + 1];
+        tmp[2] = '\0';
+        macHex[i] = (MV_U8) (strtol(tmp, NULL, 16));
+    }
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvMacHexToStr - Convert MAC in hex format to string format.
+*
+* DESCRIPTION:
+*		This function convert MAC in hex format to string format.
+*
+* INPUT:
+*       macHex - MAC in hex format.
+*
+* OUTPUT:
+*       macStr - MAC address string. String format is uu:vv:ww:xx:yy:zz.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_STATUS mvMacHexToStr(MV_U8* macHex, char* macStr)
+{
+	int i;
+
+    for(i = 0; i < MV_MAC_ADDR_SIZE; i++)
+    {
+        mvOsSPrintf(&macStr[i * 3], "%02x:", macHex[i]);
+    }
+    macStr[(i * 3) - 1] = '\0';
+
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvSizePrint - Print the given size with size unit description.
+*
+* DESCRIPTION:
+*		This function print the given size with size unit description.
+*       FOr example when size paramter is 0x180000, the function prints:
+*       "size 1MB+500KB"
+*
+* INPUT:
+*       size - Size in bytes.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_VOID mvSizePrint(MV_U32 size)
+{
+    mvOsOutput("size ");
+
+    if(size >= _1G)
+    {
+        mvOsOutput("%3dGB ", size / _1G);
+        size %= _1G;
+        if(size)
+            mvOsOutput("+");
+    }
+    if(size >= _1M )
+    {
+        mvOsOutput("%3dMB ", size / _1M);
+        size %= _1M;
+        if(size)
+            mvOsOutput("+");
+    }
+    if(size >= _1K)
+    {
+        mvOsOutput("%3dKB ", size / _1K);
+        size %= _1K;
+        if(size)
+            mvOsOutput("+");
+    }
+    if(size > 0)
+    {
+        mvOsOutput("%3dB ", size);
+    }
+}
+
+/*******************************************************************************
+* mvHexToBin - Convert hex to binary
+*
+* DESCRIPTION:
+*		This function Convert hex to binary.
+*
+* INPUT:
+*       pHexStr - hex buffer pointer.
+*       size    - Size to convert.
+*
+* OUTPUT:
+*       pBin - Binary buffer pointer.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_VOID mvHexToBin(const char* pHexStr, MV_U8* pBin, int size)
+{
+  	int     j, i;
+    char    tmp[3];
+    MV_U8   byte;
+    
+    for(j=0, i=0; j<size; j++, i+=2)
+    {
+        tmp[0] = pHexStr[i];
+        tmp[1] = pHexStr[i+1];
+        tmp[2] = '\0';
+        byte = (MV_U8) (strtol(tmp, NULL, 16) & 0xFF);
+        pBin[j] =  byte;     
+    }
+}
+
+void     mvAsciiToHex(const char* asciiStr, char* hexStr)
+{
+	int	i=0;
+
+	while(asciiStr[i] != 0)
+	{
+		mvOsSPrintf(&hexStr[i*2], "%02x", asciiStr[i]);
+		i++;
+	}
+	hexStr[i*2] = 0;
+}
+
+
+void    mvBinToHex(const MV_U8* bin, char* hexStr, int size)
+{
+	int i;
+
+    for(i=0; i<size; i++)
+    {
+        mvOsSPrintf(&hexStr[i*2], "%02x", bin[i]);
+    }
+    hexStr[i*2] = '\0';
+}
+
+void    mvBinToAscii(const MV_U8* bin, char* asciiStr, int size)
+{
+	int i;
+ 
+    for(i=0; i<size; i++)
+    {
+        mvOsSPrintf(&asciiStr[i*2], "%c", bin[i]);
+    }
+    asciiStr[i*2] = '\0';
+}
+
+/*******************************************************************************
+* mvLog2 - 
+*
+* DESCRIPTION:
+*	Calculate the Log2 of a given number.
+*
+* INPUT:
+*       num - A number to calculate the Log2 for.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       Log 2 of the input number, or 0xFFFFFFFF if input is 0.
+*
+*******************************************************************************/
+MV_U32 mvLog2(MV_U32	num)
+{
+	MV_U32 result = 0;
+	if(num == 0)
+		return 0xFFFFFFFF;
+	while(num != 1)
+	{
+		num = num >> 1;
+		result++;
+	}
+	return result;
+}
+
+/*******************************************************************************
+* mvWinOverlapTest
+*
+* DESCRIPTION:
+*       This function checks the given two address windows for overlaping.
+*
+* INPUT:
+*       pAddrWin1 - Address window 1.
+*       pAddrWin2 - Address window 2.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE if address window overlaps, MV_FALSE otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvWinOverlapTest(MV_ADDR_WIN *pAddrWin1, MV_ADDR_WIN *pAddrWin2)
+{
+    MV_U32 winBase1, winBase2;
+    MV_U32 winTop1, winTop2;
+    
+    /* check if we have overflow than 4G*/
+    if (((0xffffffff - pAddrWin1->baseLow) < pAddrWin1->size-1)||
+       ((0xffffffff - pAddrWin2->baseLow) < pAddrWin2->size-1))
+    {
+	return MV_TRUE;
+    }
+
+    winBase1 = pAddrWin1->baseLow;
+    winBase2 = pAddrWin2->baseLow;
+    winTop1  = winBase1 + pAddrWin1->size-1;
+    winTop2  = winBase2 + pAddrWin2->size-1;
+
+    
+    if (((winBase1 <= winTop2 ) && ( winTop2 <= winTop1)) ||
+        ((winBase1 <= winBase2) && (winBase2 <= winTop1)))
+    {
+        return MV_TRUE;
+    }
+    else
+    {
+        return MV_FALSE;
+    }
+}
+
+/*******************************************************************************
+* mvWinWithinWinTest
+*
+* DESCRIPTION:
+*       This function checks the given win1 boundries is within win2 boundries.
+*
+* INPUT:
+*       pAddrWin1 - Address window 1.
+*       pAddrWin2 - Address window 2.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE if found win1 inside win2, MV_FALSE otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvWinWithinWinTest(MV_ADDR_WIN *pAddrWin1, MV_ADDR_WIN *pAddrWin2)
+{
+    MV_U32 winBase1, winBase2;
+    MV_U32 winTop1, winTop2;
+    
+    winBase1 = pAddrWin1->baseLow;
+    winBase2 = pAddrWin2->baseLow;
+    winTop1  = winBase1 + pAddrWin1->size -1;
+    winTop2  = winBase2 + pAddrWin2->size -1;
+    
+    if (((winBase1 >= winBase2 ) && ( winBase1 <= winTop2)) ||
+        ((winTop1  >= winBase2) && (winTop1 <= winTop2)))
+    {
+        return MV_TRUE;
+    }
+    else
+    {
+        return MV_FALSE;
+    }
+}
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/common/mvHalVer.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/common/mvHalVer.h
@@ -0,0 +1,73 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#ifndef __INCmvHalVerh
+#define __INCmvHalVerh
+
+/* Defines */
+#define MV_HAL_VERSION			"DOVE_HAL_3_0_6"
+#define MV_RELEASE_BASELINE		"SoCandControllers_DOVE_RELEASE_11_9_2008_camera_working"
+
+#endif /* __INCmvHalVerh */
\ No newline at end of file
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/common/mvVideo.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/common/mvVideo.h
@@ -0,0 +1,128 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+#ifndef __INCmvVideoh
+#define __INCmvVideoh
+    
+/* includes */
+    
+/* Defines */
+
+
+typedef struct mvVideoResolution
+{
+     MV_U32         	width;
+     MV_U32		height;
+     char		*name;	
+} MV_VIDEO_RESOLUTION;
+
+/*
+ * Basic window sizes.
+ */
+
+#define VGA_WIDTH	640
+#define VGA_HEIGHT	480
+#define QVGA_WIDTH	320
+#define QVGA_HEIGHT	240
+#define CIF_WIDTH	352
+#define CIF_HEIGHT	288
+#define QCIF_WIDTH	176
+#define	QCIF_HEIGHT	144
+
+#define MV_VIDEO_RESOLUTION_VGA {VGA_WIDTH, VGA_HEIGHT, "VGA"}
+#define MV_VIDEO_RESOLUTION_QVGA {QVGA_WIDTH, QVGA_HEIGHT, "QVGA"}
+#define MV_VIDEO_RESOLUTION_CIF {CIF_WIDTH, CIF_HEIGHT, "CIF"}
+#define MV_VIDEO_RESOLUTION_QCIF {QCIF_WIDTH, QCIF_HEIGHT, "QCIF"}
+
+
+/* Pixel format */
+typedef enum mvPixFormatId
+{
+     MV_PIX_FORMAT_ID_RGB444 = 0x444,
+     MV_PIX_FORMAT_ID_RGB555 = 0x555,
+     MV_PIX_FORMAT_ID_RGB565 = 0x565,
+     MV_PIX_FORMAT_ID_YUV422 = 0x422,
+     MV_PIX_FORMAT_ID_RAW_BAYER = 0x111,
+} MV_PIX_FORMAT_ID;
+
+
+typedef struct mvPixelFormat
+{
+     MV_PIX_FORMAT_ID	id;
+     char	*name;
+} MV_PIXEL_FORMAT;
+
+/* known formats */
+#define MV_PIXEL_FORMAT_RGB444	{MV_PIX_FORMAT_ID_RGB444, "RGB444"}
+#define MV_PIXEL_FORMAT_RGB555  {MV_PIX_FORMAT_ID_RGB555, "RGB555"}
+#define MV_PIXEL_FORMAT_RGB565  {MV_PIX_FORMAT_ID_RGB565, "RGB565"}
+#define MV_PIXEL_FORMAT_YUV422  {MV_PIX_FORMAT_ID_YUV422, "YUV422"}
+#define MV_PIXEL_FORMAT_RAW_BAYER  {MV_PIX_FORMAT_ID_RAW_BAYER, "RAW BAYER"}
+
+typedef struct
+{
+     MV_PIXEL_FORMAT	pixelFormat;
+     MV_VIDEO_RESOLUTION resolution;
+} MV_IMAGE_FORMAT;
+
+#endif /* __INCmvVideoh */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/common/mvDebug.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/common/mvDebug.c
@@ -0,0 +1,325 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+
+/* includes */
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "mvDebug.h"
+
+/* Global variables effect on behave MV_DEBUG_PRINT and MV_DEBUG_CODE macros
+ * mvDebug  - map of bits (one for each module) bit=1 means enable 
+ *          debug code and messages for this module
+ * mvModuleDebug - array of 32 bits varables one for each module
+ */
+MV_U32    mvDebug = 0;
+MV_U32    mvDebugModules[MV_MODULE_MAX];
+ 
+/* Init mvModuleDebug array to default values */
+void    mvDebugInit(void)
+{
+    int     bit;
+
+    mvDebug = 0;
+    for(bit=0; bit<MV_MODULE_MAX; bit++)
+    {
+        mvDebugModules[bit] = MV_DEBUG_FLAG_ERR | MV_DEBUG_FLAG_STATS;
+        mvDebug |= MV_BIT_MASK(bit);
+    }
+}
+ 
+void    mvDebugModuleEnable(MV_MODULE_ID module, MV_BOOL isEnable)
+{    
+    if (isEnable)
+    {
+       MV_BIT_SET(mvDebug, module);               
+    }
+    else
+       MV_BIT_CLEAR(mvDebug, module);                   
+}
+ 
+void    mvDebugModuleSetFlags(MV_MODULE_ID module, MV_U32 flags)
+{ 
+    mvDebugModules[module] |= flags;
+}
+
+void    mvDebugModuleClearFlags(MV_MODULE_ID module, MV_U32 flags)
+{ 
+    mvDebugModules[module] &= ~flags;
+}
+
+/* Dump memory in specific format: 
+ * address: X1X1X1X1 X2X2X2X2 ... X8X8X8X8 
+ */
+void mvDebugMemDump(void* addr, int size, int access)
+{
+    int     i, j;
+    MV_U32  memAddr = (MV_U32)addr;
+
+    if(access == 0)
+        access = 1;
+
+    if( (access != 4) && (access != 2) && (access != 1) )
+    {
+        mvOsPrintf("%d wrong access size. Access must be 1 or 2 or 4\n",
+                    access);
+        return;
+    }
+    memAddr = MV_ALIGN_DOWN( (unsigned int)addr, 4);
+    size = MV_ALIGN_UP(size, 4);
+    addr = (void*)MV_ALIGN_DOWN( (unsigned int)addr, access);
+    while(size > 0)
+    {
+        mvOsPrintf("%08x: ", memAddr);
+        i = 0;
+        /* 32 bytes in the line */
+        while(i < 32)
+        {
+            if(memAddr >= (MV_U32)addr)
+            {
+                switch(access)
+                {
+                    case 1:
+                        if( memAddr == CPU_PHY_MEM(memAddr) )
+                        {
+                            mvOsPrintf("%02x ", MV_MEMIO8_READ(memAddr));
+                        }
+                        else
+                        {
+                            mvOsPrintf("%02x ", *((MV_U8*)memAddr));
+                        }
+                        break;
+
+                    case 2:
+                        if( memAddr == CPU_PHY_MEM(memAddr) )
+                        {
+                            mvOsPrintf("%04x ", MV_MEMIO16_READ(memAddr));
+                        }
+                        else
+                        {
+                            mvOsPrintf("%04x ", *((MV_U16*)memAddr));
+                        }
+                        break;
+
+                    case 4:
+                        if( memAddr == CPU_PHY_MEM(memAddr) )
+                        {
+                            mvOsPrintf("%08x ", MV_MEMIO32_READ(memAddr));
+                        }
+                        else
+                        {
+                            mvOsPrintf("%08x ", *((MV_U32*)memAddr));
+                        }
+                        break;
+                }
+            }
+            else
+            {
+                for(j=0; j<(access*2+1); j++)
+                    mvOsPrintf(" ");
+            }
+            i += access;
+            memAddr += access;
+            size -= access;
+            if(size <= 0)
+                break;
+        }
+        mvOsPrintf("\n");
+    }
+}
+
+void mvDebugPrintBufInfo(BUF_INFO* pBufInfo, int size, int access)
+{
+	if(pBufInfo == NULL)
+	{
+		mvOsPrintf("\n!!! pBufInfo = NULL\n");
+		return;
+	}
+    mvOsPrintf("\n*** pBufInfo=0x%x, cmdSts=0x%08x, pBuf=0x%x, bufSize=%d\n",
+               (unsigned int)pBufInfo, 
+			   (unsigned int)pBufInfo->cmdSts, 
+			   (unsigned int)pBufInfo->pBuff, 
+			   (unsigned int)pBufInfo->bufSize);
+    mvOsPrintf("pData=0x%x, byteCnt=%d, pNext=0x%x, uInfo1=0x%x, uInfo2=0x%x\n",
+               (unsigned int)pBufInfo->pData, 
+			   (unsigned int)pBufInfo->byteCnt, 
+			   (unsigned int)pBufInfo->pNextBufInfo,
+               (unsigned int)pBufInfo->userInfo1, 
+			   (unsigned int)pBufInfo->userInfo2);
+    if(pBufInfo->pData != NULL)
+    {
+        if(size > pBufInfo->byteCnt)
+            size = pBufInfo->byteCnt;
+        mvDebugMemDump(pBufInfo->pData, size, access);
+    }
+}
+
+void mvDebugPrintPktInfo(MV_PKT_INFO* pPktInfo, int size, int access)
+{
+    int frag, len;
+
+	if(pPktInfo == NULL)
+	{
+		mvOsPrintf("\n!!! pPktInfo = NULL\n");
+		return;
+	}
+    mvOsPrintf("\npPkt=%p, stat=0x%08x, numFr=%d, size=%d, pFr=%p, osInfo=0x%lx\n",
+                pPktInfo, pPktInfo->status, pPktInfo->numFrags, pPktInfo->pktSize, 
+                pPktInfo->pFrags, pPktInfo->osInfo);
+    
+    for(frag=0; frag<pPktInfo->numFrags; frag++)
+    {
+        mvOsPrintf("#%2d. bufVirt=%p, bufSize=%d\n", 
+                    frag, pPktInfo->pFrags[frag].bufVirtPtr, 
+                    pPktInfo->pFrags[frag].bufSize);
+        if(size > 0)
+        {
+            len = MV_MIN((int)pPktInfo->pFrags[frag].bufSize, size);
+            mvDebugMemDump(pPktInfo->pFrags[frag].bufVirtPtr, len, access);
+            size -= len;
+        }
+    }
+    
+}
+
+void    mvDebugPrintIpAddr(MV_U32 ipAddr)
+{
+    mvOsPrintf("%d.%d.%d.%d", ((ipAddr >> 24) & 0xFF), ((ipAddr >> 16) & 0xFF),
+                              ((ipAddr >> 8) & 0xFF), ((ipAddr >> 0) & 0xFF));
+}
+
+void    mvDebugPrintMacAddr(const MV_U8* pMacAddr)
+{
+    int     i;
+
+    mvOsPrintf("%02x", (unsigned int)pMacAddr[0]);
+    for(i=1; i<MV_MAC_ADDR_SIZE; i++)
+    {
+        mvOsPrintf(":%02x", pMacAddr[i]);
+    }
+    /* mvOsPrintf("\n");*/
+}
+
+
+/******* There are three functions deals with MV_DEBUG_TIMES structure ********/
+
+/* Reset MV_DEBUG_TIMES entry */
+void mvDebugResetTimeEntry(MV_DEBUG_TIMES* pTimeEntry, int count, char* pName)
+{
+    pTimeEntry->begin = 0;
+    pTimeEntry->count = count;
+    pTimeEntry->end = 0;
+    pTimeEntry->left = pTimeEntry->count;
+    pTimeEntry->total = 0;
+    pTimeEntry->min = 0xFFFFFFFF;
+    pTimeEntry->max = 0x0;
+    strncpy(pTimeEntry->name, pName, sizeof(pTimeEntry->name)-1);
+    pTimeEntry->name[sizeof(pTimeEntry->name)-1] = '\0';
+}
+
+/* Print out MV_DEBUG_TIMES entry */
+void mvDebugPrintTimeEntry(MV_DEBUG_TIMES* pTimeEntry, MV_BOOL isTitle)
+{
+    int     num;
+
+    if(isTitle == MV_TRUE)
+        mvOsPrintf("Event         NumOfEvents       TotalTime         Average       Min       Max\n");
+
+    num = pTimeEntry->count-pTimeEntry->left;
+    if(num > 0)
+    {
+        mvOsPrintf("%-11s     %6u          0x%08lx        %6lu     %6lu    %6lu\n",
+                pTimeEntry->name, num, pTimeEntry->total, pTimeEntry->total/num,
+                pTimeEntry->min, pTimeEntry->max);
+    }   
+}
+
+/* Update MV_DEBUG_TIMES entry */
+void mvDebugUpdateTimeEntry(MV_DEBUG_TIMES* pTimeEntry)
+{
+    MV_U32  delta;
+
+    if(pTimeEntry->left > 0)                                        
+    {                                                                           
+        if(pTimeEntry->end <= pTimeEntry->begin)       
+        {                                                                       
+            delta = pTimeEntry->begin - pTimeEntry->end;
+        }
+        else
+        {
+            delta = ((MV_U32)0x10000 - pTimeEntry->end) + pTimeEntry->begin;
+        }
+        pTimeEntry->total += delta;             
+
+        if(delta < pTimeEntry->min)    
+            pTimeEntry->min = delta;    
+
+        if(delta > pTimeEntry->max)    
+            pTimeEntry->max = delta;      
+
+        pTimeEntry->left--;                                                                                                                 
+    }
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/linux_oss/mvOs.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/linux_oss/mvOs.c
@@ -0,0 +1,211 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+*******************************************************************************/
+/*******************************************************************************
+* mvOsCpuArchLib.c - Marvell CPU architecture library
+*
+* DESCRIPTION:
+*       This library introduce Marvell API for OS dependent CPU architecture 
+*       APIs. This library introduce single CPU architecture services APKI 
+*       cross OS.
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+/* includes */
+#include <asm/processor.h>
+#include "mvOs.h"
+
+static MV_U32 read_p15_c0 (void);
+
+/* defines  */
+#define ARM_ID_REVISION_OFFS	0
+#define ARM_ID_REVISION_MASK	(0xf << ARM_ID_REVISION_OFFS)
+
+#define ARM_ID_PART_NUM_OFFS	4
+#define ARM_ID_PART_NUM_MASK	(0xfff << ARM_ID_PART_NUM_OFFS)
+
+#define ARM_ID_ARCH_OFFS	16
+#define ARM_ID_ARCH_MASK	(0xf << ARM_ID_ARCH_OFFS)
+
+#define ARM_ID_VAR_OFFS		20
+#define ARM_ID_VAR_MASK		(0xf << ARM_ID_VAR_OFFS)
+
+#define ARM_ID_ASCII_OFFS	24
+#define ARM_ID_ASCII_MASK	(0xff << ARM_ID_ASCII_OFFS)
+
+
+
+void* mvOsIoCachedMalloc( void* osHandle, MV_U32 size, MV_ULONG* pPhyAddr,
+			  MV_U32 *memHandle)
+{
+    void *p = kmalloc( size, GFP_KERNEL );
+    *pPhyAddr = pci_map_single( osHandle, p, 0, PCI_DMA_BIDIRECTIONAL );
+    return p;
+}
+void* mvOsIoUncachedMalloc( void* osHandle, MV_U32 size, MV_ULONG* pPhyAddr,
+			    MV_U32 *memHandle)
+{
+    return pci_alloc_consistent( osHandle, size, (dma_addr_t *)pPhyAddr );
+}
+ 
+void mvOsIoUncachedFree( void* osHandle, MV_U32 size, MV_ULONG phyAddr, void* pVirtAddr,
+			 MV_U32 memHandle)
+{
+    return pci_free_consistent( osHandle, size, pVirtAddr, (dma_addr_t)phyAddr );
+} 
+                                                                                                                                               
+void mvOsIoCachedFree( void* osHandle, MV_U32 size, MV_ULONG phyAddr, void* pVirtAddr,
+		       MV_U32 memHandle )
+{
+    return kfree( pVirtAddr );
+}
+ 
+int mvOsRand(void)
+{
+    int rand;
+    get_random_bytes(&rand, sizeof(rand) );
+    return rand;
+}
+
+/*******************************************************************************
+* mvOsCpuVerGet() - 
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       32bit CPU Revision
+*
+*******************************************************************************/
+MV_U32 mvOsCpuRevGet( MV_VOID )
+{
+	return ((read_p15_c0() & ARM_ID_REVISION_MASK ) >> ARM_ID_REVISION_OFFS);
+}
+/*******************************************************************************
+* mvOsCpuPartGet() - 
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       32bit CPU Part number
+*
+*******************************************************************************/
+MV_U32 mvOsCpuPartGet( MV_VOID )
+{
+	return ((read_p15_c0() & ARM_ID_PART_NUM_MASK ) >> ARM_ID_PART_NUM_OFFS);
+}
+/*******************************************************************************
+* mvOsCpuArchGet() - 
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       32bit CPU Architicture number
+*
+*******************************************************************************/
+MV_U32 mvOsCpuArchGet( MV_VOID )
+{
+    return ((read_p15_c0() & ARM_ID_ARCH_MASK ) >> ARM_ID_ARCH_OFFS);
+}
+/*******************************************************************************
+* mvOsCpuVarGet() - 
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       32bit CPU Variant number
+*
+*******************************************************************************/
+MV_U32 mvOsCpuVarGet( MV_VOID )
+{
+    return ((read_p15_c0() & ARM_ID_VAR_MASK ) >> ARM_ID_VAR_OFFS);
+}
+/*******************************************************************************
+* mvOsCpuAsciiGet() - 
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       32bit CPU Variant number
+*
+*******************************************************************************/
+MV_U32 mvOsCpuAsciiGet( MV_VOID )
+{
+    return ((read_p15_c0() & ARM_ID_ASCII_MASK ) >> ARM_ID_ASCII_OFFS);
+}
+
+
+
+/*
+static unsigned long read_p15_c0 (void)
+*/
+/* read co-processor 15, register #0 (ID register) */
+static MV_U32 read_p15_c0 (void)
+{
+	MV_U32 value;
+
+	__asm__ __volatile__(
+		"mrc	p15, 0, %0, c0, c0, 0   @ read control reg\n"
+		: "=r" (value)
+		:
+		: "memory");
+
+	return value;
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/linux_oss/mvOs_asm.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/linux_oss/mvOs_asm.h
@@ -0,0 +1,42 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+*******************************************************************************/
+#ifndef _MV_OS_ASM_LNX_H_
+#define _MV_OS_ASM_LNX_H_
+                                                                                                                                               
+                                                                                                                                               
+#ifdef __KERNEL__
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+#include <mach/io.h>
+#else /* __KERNEL__ */
+ 
+#endif
+
+#endif /* _MV_OS_ASM_LNX_H_ */
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/linux_oss/mvOs.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/linux_oss/mvOs.h
@@ -0,0 +1,406 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+*******************************************************************************/
+#ifndef _MV_OS_LNX_H_
+#define _MV_OS_LNX_H_
+                                                                                                                                               
+                                                                                                                                               
+#ifdef __KERNEL__
+/* for kernel space */
+#include <linux/autoconf.h>
+#include <linux/interrupt.h>
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/reboot.h>
+#include <linux/pci.h>
+#include <linux/kdev_t.h>
+#include <linux/major.h>
+#include <linux/blkdev.h>
+#include <linux/console.h>
+#include <linux/delay.h>
+#include <linux/seq_file.h>
+#include <linux/string.h>
+#include <linux/slab.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/slab.h>
+#include <linux/mm.h>
+  
+#include <asm/system.h>
+#include <asm/pgtable.h>
+#include <asm/page.h>
+#include <asm/hardirq.h>
+#include <asm/dma.h>
+#include <asm/io.h>
+ 
+#include <linux/random.h>
+
+#include "dbg-trace.h"
+
+extern void mv_early_printk(char *fmt,...);
+
+#define INLINE inline
+#define MV_TRC_REC	    TRC_REC
+#define mvOsPrintf          printk
+#define mvOsEarlyPrintf	    mv_early_printk
+#define mvOsOutput          printk
+#define mvOsSPrintf         sprintf
+#define mvOsMalloc(_size_)  kmalloc(_size_,GFP_ATOMIC)
+#define mvOsFree            kfree
+#define mvOsMemcpy          memcpy
+#define mvOsSleep(_mils_)   mdelay(_mils_)
+#define mvOsTaskLock()
+#define mvOsTaskUnlock()
+#define strtol              simple_strtoul
+#define mvOsDelay(x)        mdelay(x)
+#define mvOsUDelay(x)       udelay(x)
+#define mvCopyFromOs        copy_from_user
+#define mvCopyToOs          copy_to_user
+
+ 
+#include "mvTypes.h"
+#include "mvCommon.h"
+  
+#ifdef MV_NDEBUG
+#define mvOsAssert(cond)
+#else
+#define mvOsAssert(cond) { do { if(!(cond)) { BUG(); } }while(0); }
+#endif /* MV_NDEBUG */
+ 
+#else /* __KERNEL__ */
+ 
+/* for user space applications */
+#include <stdlib.h>
+#include <stdio.h>
+#include <assert.h>
+#include <string.h>
+ 
+#define INLINE inline
+#define mvOsPrintf printf
+#define mvOsOutput printf
+#define mvOsMalloc(_size_) malloc(_size_)
+#define mvOsFree free
+#define mvOsAssert(cond) assert(cond)
+ 
+#endif /* __KERNEL__ */                                                                                                                                               
+#define mvOsIoVirtToPhy(pDev, pVirtAddr)                            \
+    pci_map_single( (pDev), (pVirtAddr), 0, PCI_DMA_BIDIRECTIONAL )
+
+#define mvOsCacheClear(pDev, p, size )                              \
+    pci_map_single( (pDev), (p), (size), PCI_DMA_BIDIRECTIONAL)
+ 
+#define mvOsCacheFlush(pDev, p, size )                              \
+    pci_map_single( (pDev), (p), (size), PCI_DMA_TODEVICE)
+ 
+#define mvOsCacheInvalidate(pDev, p, size)                          \
+    pci_map_single( (pDev), (p), (size), PCI_DMA_FROMDEVICE )
+
+
+#define CPU_PHY_MEM(x)              (MV_U32)x
+#define CPU_MEMIO_CACHED_ADDR(x)    (void*)x
+#define CPU_MEMIO_UNCACHED_ADDR(x)  (void*)x
+
+
+/* CPU architecture dependent 32, 16, 8 bit read/write IO addresses */
+#define MV_MEMIO32_WRITE(addr, data)    \
+    ((*((volatile unsigned int*)(addr))) = ((unsigned int)(data)))
+
+#define MV_MEMIO32_READ(addr)           \
+    ((*((volatile unsigned int*)(addr))))
+
+#define MV_MEMIO16_WRITE(addr, data)    \
+    ((*((volatile unsigned short*)(addr))) = ((unsigned short)(data)))
+
+#define MV_MEMIO16_READ(addr)           \
+    ((*((volatile unsigned short*)(addr))))
+
+#define MV_MEMIO8_WRITE(addr, data)     \
+    ((*((volatile unsigned char*)(addr))) = ((unsigned char)(data)))
+
+#define MV_MEMIO8_READ(addr)            \
+    ((*((volatile unsigned char*)(addr))))
+
+
+/* No Fast Swap implementation (in assembler) for ARM */
+#define MV_32BIT_LE_FAST(val)            MV_32BIT_LE(val)
+#define MV_16BIT_LE_FAST(val)            MV_16BIT_LE(val)
+#define MV_32BIT_BE_FAST(val)            MV_32BIT_BE(val)
+#define MV_16BIT_BE_FAST(val)            MV_16BIT_BE(val)
+    
+/* 32 and 16 bit read/write in big/little endian mode */
+
+/* 16bit write in little endian mode */
+#define MV_MEMIO_LE16_WRITE(addr, data) \
+        MV_MEMIO16_WRITE(addr, MV_16BIT_LE_FAST(data))
+
+/* 16bit read in little endian mode */
+static __inline MV_U16 MV_MEMIO_LE16_READ(MV_U32 addr)
+{
+    MV_U16 data;
+
+    data= (MV_U16)MV_MEMIO16_READ(addr);
+
+    return (MV_U16)MV_16BIT_LE_FAST(data);
+}
+
+/* 32bit write in little endian mode */
+#define MV_MEMIO_LE32_WRITE(addr, data) \
+        MV_MEMIO32_WRITE(addr, MV_32BIT_LE_FAST(data))
+
+/* 32bit read in little endian mode */
+static __inline MV_U32 MV_MEMIO_LE32_READ(MV_U32 addr)
+{
+    MV_U32 data;
+
+    data= (MV_U32)MV_MEMIO32_READ(addr);
+
+    return (MV_U32)MV_32BIT_LE_FAST(data);
+}
+
+static __inline void mvOsBCopy(char* srcAddr, char* dstAddr, int byteCount)
+{
+    while(byteCount != 0)
+    {
+        *dstAddr = *srcAddr;
+        dstAddr++;
+        srcAddr++;
+        byteCount--;
+    }
+}
+
+#if defined(MV_BRIDGE_SYNC_REORDER)
+extern MV_U32 *mvUncachedParam;
+
+static __inline void mvOsBridgeReorderWA(void)
+{
+	volatile MV_U32 val = 0;
+
+	val = mvUncachedParam[0];
+}
+#endif
+
+
+/* Flash APIs */
+#define MV_FL_8_READ            MV_MEMIO8_READ
+#define MV_FL_16_READ           MV_MEMIO_LE16_READ
+#define MV_FL_32_READ           MV_MEMIO_LE32_READ
+#define MV_FL_8_DATA_READ       MV_MEMIO8_READ
+#define MV_FL_16_DATA_READ      MV_MEMIO16_READ
+#define MV_FL_32_DATA_READ      MV_MEMIO32_READ
+#define MV_FL_8_WRITE           MV_MEMIO8_WRITE
+#define MV_FL_16_WRITE          MV_MEMIO_LE16_WRITE
+#define MV_FL_32_WRITE          MV_MEMIO_LE32_WRITE
+#define MV_FL_8_DATA_WRITE      MV_MEMIO8_WRITE
+#define MV_FL_16_DATA_WRITE     MV_MEMIO16_WRITE
+#define MV_FL_32_DATA_WRITE     MV_MEMIO32_WRITE
+
+
+/* CPU cache information */
+#define CPU_I_CACHE_LINE_SIZE   32    /* 2do: replace 32 with linux core macro */
+#define CPU_D_CACHE_LINE_SIZE   32    /* 2do: replace 32 with linux core macro */
+
+#if 0
+/* Data cache flush one line */
+#define mvOsCacheLineFlushInv(handle, addr)                     \
+{                                                               \
+  __asm__ __volatile__ ("mcr p15, 0, %0, c7, c14, 1" : : "r" (addr));\
+  __asm__ __volatile__ ("mcr p15, 1, %0, c15, c10, 1" : : "r" (addr));\
+  __asm__ __volatile__ ("mcr p15, 0, r0, c7, c10, 4");		\
+}
+
+/* Data cache flush one line */
+#define mvOsCacheLineFlushInv(handle, addr)                     \
+{                                                               \
+  __asm__ __volatile__ ("mcr p15, 0, %0, c7, c14, 1" : : "r" (addr));\
+  __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" : : "r" (addr)); \
+}
+#endif /* 0 */
+#define mvOsCacheLineFlushInv(handle, addr)                     \
+{								\
+	dma_map_single(NULL, (void*)addr, CPU_D_CACHE_LINE_SIZE,\
+	       DMA_BIDIRECTIONAL);				\
+}
+
+ 
+#if 0
+#define mvOsCacheLineInv(handle,addr)                           \
+{                                                               \
+  __asm__ __volatile__ ("mcr p15, 0, %0, c7, c6, 1" : : "r" (addr)); \
+ __asm__ __volatile__ ("mcr p15, 1, %0, c15, c11, 1" : : "r" (addr)); \
+}
+
+#define mvOsCacheLineInv(handle,addr)                           \
+{                                                               \
+  __asm__ __volatile__ ("mcr p15, 0, %0, c7, c6, 1" : : "r" (addr)); \
+}
+#endif /* 0 */
+
+#define mvOsCacheLineInv(handle,addr)                           \
+{								\
+	dma_map_single(NULL,(void*)addr, CPU_D_CACHE_LINE_SIZE,	\
+			DMA_FROM_DEVICE);			\
+}
+
+static __inline void mvOsPrefetch(const void *ptr)
+{
+#ifdef CONFIG_USE_DSP
+        __asm__ __volatile__(
+                "pld\t%0"
+                :
+                : "o" (*(char *)ptr)
+                : "cc");
+#else
+	return;
+#endif
+}
+
+
+/* Flush CPU pipe */
+#define CPU_PIPE_FLUSH
+
+
+
+
+
+/* register manipulations  */
+
+/******************************************************************************
+* This debug function enable the write of each register that u-boot access to 
+* to an array in the DRAM, the function record only MV_REG_WRITE access.
+* The function could not be operate when booting from flash.
+* In order to print the array we use the printreg command.
+******************************************************************************/
+/* #define REG_DEBUG */
+#if defined(REG_DEBUG)
+extern int reg_arry[2048][2];
+extern int reg_arry_index;
+#endif
+
+/* Marvell controller register read/write macros */
+#define MV_REG_VALUE(offset)          \
+                (MV_MEMIO32_READ((INTER_REGS_BASE | (offset))))
+
+#define MV_REG_READ(offset)             \
+        (MV_MEMIO_LE32_READ(INTER_REGS_BASE | (offset)))
+
+#if defined(REG_DEBUG)
+#define MV_REG_WRITE(offset, val)    \
+        MV_MEMIO_LE32_WRITE((INTER_REGS_BASE | (offset)), (val)); \
+        { \
+                reg_arry[reg_arry_index][0] = (INTER_REGS_BASE | (offset));\
+                reg_arry[reg_arry_index][1] = (val);\
+                reg_arry_index++;\
+        }
+#else
+#define MV_REG_WRITE(offset, val)    \
+        MV_MEMIO_LE32_WRITE((INTER_REGS_BASE | (offset)), (val));
+#endif
+                                                
+#define MV_REG_BYTE_READ(offset)        \
+        (MV_MEMIO8_READ((INTER_REGS_BASE | (offset))))
+
+#if defined(REG_DEBUG)
+#define MV_REG_BYTE_WRITE(offset, val)  \
+        MV_MEMIO8_WRITE((INTER_REGS_BASE | (offset)), (val)); \
+        { \
+                reg_arry[reg_arry_index][0] = (INTER_REGS_BASE | (offset));\
+                reg_arry[reg_arry_index][1] = (val);\
+                reg_arry_index++;\
+        }
+#else
+#define MV_REG_BYTE_WRITE(offset, val)  \
+        MV_MEMIO8_WRITE((INTER_REGS_BASE | (offset)), (val))
+#endif
+
+#if defined(REG_DEBUG)
+#define MV_REG_BIT_SET(offset, bitMask)                 \
+        (MV_MEMIO32_WRITE((INTER_REGS_BASE | (offset)), \
+         (MV_MEMIO32_READ(INTER_REGS_BASE | (offset)) | \
+          MV_32BIT_LE_FAST(bitMask)))); \
+        { \
+                reg_arry[reg_arry_index][0] = (INTER_REGS_BASE | (offset));\
+                reg_arry[reg_arry_index][1] = (MV_MEMIO32_READ(INTER_REGS_BASE | (offset)));\
+                reg_arry_index++;\
+        }
+#else
+#define MV_REG_BIT_SET(offset, bitMask)                 \
+        (MV_MEMIO32_WRITE((INTER_REGS_BASE | (offset)), \
+         (MV_MEMIO32_READ(INTER_REGS_BASE | (offset)) | \
+          MV_32BIT_LE_FAST(bitMask))))
+#endif
+        
+#if defined(REG_DEBUG)
+#define MV_REG_BIT_RESET(offset,bitMask)                \
+        (MV_MEMIO32_WRITE((INTER_REGS_BASE | (offset)), \
+         (MV_MEMIO32_READ(INTER_REGS_BASE | (offset)) & \
+          MV_32BIT_LE_FAST(~bitMask)))); \
+        { \
+                reg_arry[reg_arry_index][0] = (INTER_REGS_BASE | (offset));\
+                reg_arry[reg_arry_index][1] = (MV_MEMIO32_READ(INTER_REGS_BASE | (offset)));\
+                reg_arry_index++;\
+        }
+#else
+#define MV_REG_BIT_RESET(offset,bitMask)                \
+        (MV_MEMIO32_WRITE((INTER_REGS_BASE | (offset)), \
+         (MV_MEMIO32_READ(INTER_REGS_BASE | (offset)) & \
+          MV_32BIT_LE_FAST(~bitMask))))
+#endif
+
+/* Assembly functions */
+
+/*
+** MV_ASM_READ_CPU_EXTRA_FEATURES
+** Read Marvell extra features register.
+*/
+#define MV_ASM_READ_EXTRA_FEATURES(x) __asm__ volatile("mrc  p15, 1, %0, c15, c1, 0" : "=r" (x));
+
+/*
+** MV_ASM_WAIT_FOR_INTERRUPT
+** Wait for interrupt.
+*/
+#define MV_ASM_WAIT_FOR_INTERRUPT      __asm__ volatile("mcr  p15, 0, r0, c7, c0, 4");
+
+
+/* ARM architecture APIs */
+MV_U32  mvOsCpuRevGet (MV_VOID);
+MV_U32  mvOsCpuPartGet (MV_VOID);
+MV_U32  mvOsCpuArchGet (MV_VOID);
+MV_U32  mvOsCpuVarGet (MV_VOID);
+MV_U32  mvOsCpuAsciiGet (MV_VOID);
+
+/*  Other APIs  */
+void* mvOsIoCachedMalloc( void* osHandle, MV_U32 size, MV_ULONG* pPhyAddr, MV_U32 *memHandle);
+void* mvOsIoUncachedMalloc( void* osHandle, MV_U32 size, MV_ULONG* pPhyAddr, MV_U32 *memHandle );
+void mvOsIoUncachedFree( void* osHandle, MV_U32 size, MV_ULONG phyAddr, void* pVirtAddr, MV_U32 memHandle );
+void mvOsIoCachedFree( void* osHandle, MV_U32 size, MV_ULONG phyAddr, void* pVirtAddr, MV_U32 memHandle );
+int mvOsRand(void);
+
+#endif /* _MV_OS_LNX_H_ */
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/linux_oss/mvOsSata.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/linux_oss/mvOsSata.h
@@ -0,0 +1,158 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+*******************************************************************************/
+/*******************************************************************************
+* mvOsLinux.h - O.S. interface header file for Linux  
+*
+* DESCRIPTION:
+*       This header file contains OS dependent definition under Linux
+*
+* DEPENDENCIES:
+*       Linux kernel header files.
+*
+* FILE REVISION NUMBER:
+*       $Revision: 1.1 $
+*******************************************************************************/
+
+#ifndef __INCmvOsLinuxh
+#define __INCmvOsLinuxh
+
+/* Includes */
+#include <linux/autoconf.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <linux/timer.h>
+#include <linux/mm.h>
+#include <linux/interrupt.h>
+#include <linux/major.h>
+#include <linux/errno.h>
+#include <linux/genhd.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/ide.h>
+#include <linux/pci.h>
+
+#include <asm/byteorder.h>
+#include <asm/irq.h>
+#include <asm/uaccess.h>
+#include <asm/io.h>
+#include "mvOs.h"
+
+
+/* Definitions */
+#define MV_DEFAULT_QUEUE_DEPTH 2
+#define MV_SATA_SUPPORT_EDMA_SINGLE_DATA_REGION
+#define MV_SATA_SUPPORT_GEN2E_128_QUEUE_LEN
+
+#ifdef CONFIG_MV88F6082
+ #define MV_SATA_OVERRIDE_SW_QUEUE_SIZE
+ #define MV_SATA_REQUESTED_SW_QUEUE_SIZE 2
+ #undef MV_SATA_SUPPORT_GEN2E_128_QUEUE_LEN
+#endif
+
+/* System dependent macro for flushing CPU write cache */
+#if defined (MV_BRIDGE_SYNC_REORDER)
+#define MV_CPU_WRITE_BUFFER_FLUSH()	do {	\
+						wmb();	\
+						mvOsBridgeReorderWA();	\
+					} while (0)
+#else
+#define MV_CPU_WRITE_BUFFER_FLUSH()     wmb()
+#endif /* CONFIG_MV78XX0 */
+
+/* System dependent little endian from / to CPU conversions */
+#define MV_CPU_TO_LE16(x)   cpu_to_le16(x)
+#define MV_CPU_TO_LE32(x)   cpu_to_le32(x)
+
+#define MV_LE16_TO_CPU(x)   le16_to_cpu(x)
+#define MV_LE32_TO_CPU(x)   le32_to_cpu(x)
+
+#ifdef __BIG_ENDIAN_BITFIELD
+#define MV_BIG_ENDIAN_BITFIELD
+#endif
+
+/* System dependent register read / write in byte/word/dword variants */
+#define MV_REG_WRITE_BYTE(base, offset, val)    writeb(val, base + offset)
+#define MV_REG_WRITE_WORD(base, offset, val)    writew(val, base + offset)
+#define MV_REG_WRITE_DWORD(base, offset, val)   writel(val, base + offset)
+#define MV_REG_READ_BYTE(base, offset)          readb(base + offset)
+#define MV_REG_READ_WORD(base, offset)          readw(base + offset)
+#define MV_REG_READ_DWORD(base, offset)         readl(base + offset)
+
+
+/* Typedefs    */
+
+/* System dependant typedefs */
+typedef void            *MV_VOID_PTR;
+typedef u32             *MV_U32_PTR;
+typedef u16             *MV_U16_PTR;
+typedef u8              *MV_U8_PTR;
+typedef char            *MV_CHAR_PTR;
+typedef void            *MV_BUS_ADDR_T;
+typedef unsigned long   MV_CPU_FLAGS;
+
+
+/* Structures  */
+/* System dependent structure */
+typedef struct mvOsSemaphore
+{
+  int notUsed;
+} MV_OS_SEMAPHORE;
+
+
+/* Functions (User implemented)*/
+
+/* Semaphore init, take and release */
+#define mvOsSemInit(x) MV_TRUE
+#define mvOsSemTake(x)
+#define mvOsSemRelease(x)
+
+/* Interrupt masking and unmasking functions */
+MV_CPU_FLAGS mvOsSaveFlagsAndMaskCPUInterrupts(MV_VOID);
+MV_VOID      mvOsRestoreFlags(MV_CPU_FLAGS);
+
+/* Delay function in micro seconds resolution */
+void mvMicroSecondsDelay(MV_VOID_PTR, MV_U32);
+
+/* Typedefs    */
+typedef enum mvBoolean
+{
+    MV_SFALSE, MV_STRUE
+} MV_BOOLEAN;
+
+/* System logging function */
+#include "mvLog.h"
+/* Enable READ/WRITE Long SCSI command only when driver is compiled for debugging */
+#ifdef MV_LOGGER
+#define MV_SATA_SUPPORT_READ_WRITE_LONG
+#endif
+
+#define MV_IAL_LOG_ID       3
+
+#endif /* __INCmvOsLinuxh */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/linux_oss/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/linux_oss/Makefile
@@ -0,0 +1,4 @@
+include $(srctree)/$(subst ",,$(CONFIG_MV_HAL_RULES_PATH))
+# Objects list
+obj-y += mvOs.o
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/idma/mvIdmaRegs.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/idma/mvIdmaRegs.h
@@ -0,0 +1,216 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCmvIdmaSpech
+#define __INCmvIdmaSpech
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* defines */
+
+
+/* IDMA channel rgisters       												*/
+#define IDMA_BYTE_COUNT_REG(chan)          	(IDMA_UNIT_BASE + 0x0 + ((chan) * 4))
+#define IDMA_SRC_ADDR_REG(chan)            	(IDMA_UNIT_BASE + 0x10 + ((chan) * 4))
+#define IDMA_DST_ADDR_REG(chan)            	(IDMA_UNIT_BASE + 0x20 + ((chan) * 4))
+#define IDMA_NEXT_DESC_PTR_REG(chan)       	(IDMA_UNIT_BASE + 0x30 + ((chan) * 4))
+#define IDMA_CURR_DESC_PTR_REG(chan)	   	(IDMA_UNIT_BASE + 0x70 + ((chan) * 4))
+
+/* IDMA Channel Control														*/
+#define IDMA_CTRL_LOW_REG(chan)			(IDMA_UNIT_BASE + 0x40 + ((chan) * 4))
+#define IDMA_CTRL_HIGH_REG(chan)		(IDMA_UNIT_BASE + 0x80 + ((chan) * 4))
+
+ /*  IDMA Interrupt Register  */
+#define IDMA_CAUSE_REG            		(IDMA_UNIT_BASE + 0xc0)
+#define IDMA_MASK_REG           		(IDMA_UNIT_BASE + 0x8c4)
+#define IDMA_ERROR_ADDR_REG                 	(IDMA_UNIT_BASE + 0x8c8)
+#define IDMA_ERROR_SELECT_REG               	(IDMA_UNIT_BASE + 0x8cc)
+
+
+/* DMA register fileds */
+
+
+/* IDMA Channel Byte Count Register (ICBCR) */
+#define ICBCR_BYTECNT_OFFS			0		/* Byte count field offset		*/
+#define ICBCR_BYTECNT_MASK_64K  	0xFFFF	/* Maximum Byte count for 64K 	*/
+#define ICBCR_BYTECNT_MASK_16M  	0xFFFFFF/* Maximum Byte count for 16M	*/
+#define ICBCR_BYTECNT_LEFT_OFFS		30		/* Applicable for 16M mode		*/
+#define ICBCR_BYTECNT_LEFT			(1 << ICBCR_BYTECNT_LEFT_OFFS)
+#define ICBCR_DESC_OWNER_OFFS		31		/* Descriptor owned by DMA/CPU	*/
+#define ICBCR_DESC_OWNER_MASK		(1 << ICBCR_DESC_OWNER_OFFS)
+#define ICBCR_DESC_OWNER_BY_DMA		(0 << ICBCR_DESC_OWNER_OFFS)
+#define ICBCR_DESC_OWNED_BY_CPU		(1 << ICBCR_DESC_OWNER_OFFS)
+
+               
+/* IDMA Channel Control Low Register (ICCLR)								*/
+/* Data Transfer Limit Note: If an IDMA accesses a cache coherent DRAM 		*/
+/* region, the burst limit must not exceed 32 bytes.						*/
+#define B_8BYTE		0                
+#define B_16BYTE	1
+#define B_32BYTE	3           
+#define B_64BYTE	7    
+#define B_128BYTE	4
+
+#define ICCLR_DST_BURST_LIM_OFFS	0
+#define ICCLR_DST_BURST_LIM_MASK	(0x7 << ICCLR_DST_BURST_LIM_OFFS)
+#define ICCLR_DST_BURST_LIM_8BYTE	(B_8BYTE   << ICCLR_DST_BURST_LIM_OFFS)                
+#define ICCLR_DST_BURST_LIM_16BYTE	(B_16BYTE  << ICCLR_DST_BURST_LIM_OFFS)
+#define ICCLR_DST_BURST_LIM_32BYTE	(B_32BYTE  << ICCLR_DST_BURST_LIM_OFFS)           
+#define ICCLR_DST_BURST_LIM_64BYTE	(B_64BYTE  << ICCLR_DST_BURST_LIM_OFFS)    
+#define ICCLR_DST_BURST_LIM_128BYTE	(B_128BYTE << ICCLR_DST_BURST_LIM_OFFS)
+#define ICCLR_SRC_HOLD_OFFS			3   	/* Hold/increment source address*/
+#define ICCLR_SRC_HOLD_MASK			(1 << ICCLR_SRC_HOLD_OFFS)
+#define ICCLR_SRC_INC		   		(0 << ICCLR_SRC_HOLD_OFFS)
+#define ICCLR_SRC_HOLD		   		(1 << ICCLR_SRC_HOLD_OFFS)
+#define ICCLR_ACK_WIDTH_OFFS		4 	/* Asserted for one/two TCLK cycle	*/
+#define ICCLR_ACK_WIDTH_MASK		(1 << ICCLR_ACK_WIDTH_OFFS)
+#define ICCLR_ACK_WIDTH_ONE_TCLK	(0 << ICCLR_ACK_WIDTH_OFFS)
+#define ICCLR_ACK_WIDTH_TWO_TCLK	(1 << ICCLR_ACK_WIDTH_OFFS)
+#define ICCLR_DST_HOLD_OFFS			5   	/* Hold/increment source address*/
+#define ICCLR_DST_HOLD_MASK			(1 << ICCLR_DST_HOLD_OFFS)
+#define ICCLR_DST_INC		   		(0 << ICCLR_DST_HOLD_OFFS)
+#define ICCLR_DST_HOLD		   		(1 << ICCLR_DST_HOLD_OFFS)
+#define ICCLR_SRC_BURST_LIM_OFFS	6
+#define ICCLR_SRC_BURST_LIM_MASK	(0x7 << ICCLR_SRC_BURST_LIM_OFFS)
+#define ICCLR_SRC_BURST_LIM_8BYTE	(B_8BYTE   << ICCLR_SRC_BURST_LIM_OFFS)  
+#define ICCLR_SRC_BURST_LIM_16BYTE	(B_16BYTE  << ICCLR_SRC_BURST_LIM_OFFS)
+#define ICCLR_SRC_BURST_LIM_32BYTE	(B_32BYTE  << ICCLR_SRC_BURST_LIM_OFFS)    
+#define ICCLR_SRC_BURST_LIM_64BYTE	(B_64BYTE  << ICCLR_SRC_BURST_LIM_OFFS)    
+#define ICCLR_SRC_BURST_LIM_128BYTE	(B_128BYTE << ICCLR_SRC_BURST_LIM_OFFS)
+#define ICCLR_CHAIN_MODE_OFFS	   	9
+#define ICCLR_NON_CHAIN_MODE  	   	(1 << ICCLR_CHAIN_MODE_OFFS)
+#define ICCLR_INT_MODE_OFFS			10  	/* Interrupt mode               */
+#define ICCLR_INT_MODE_MASK			(1 << ICCLR_INT_MODE_OFFS)
+#define ICCLR_INT_BYTE_CNT_ZERO		(0 << ICCLR_INT_MODE_OFFS)
+#define ICCLR_INT_EVERY_NULL_PTR    (1 << ICCLR_INT_MODE_OFFS)
+#define ICCLR_DEMAND_MODE_OFFS		11  	/* Demand/Block transfer mode	*/
+#define ICCLR_DEMAND_MODE_MASK		(1 << ICCLR_DEMAND_MODE_OFFS)
+#define ICCLR_DEMAND_MODE			(0 << ICCLR_DEMAND_MODE_OFFS)
+#define ICCLR_BLOCK_MODE			(1 << ICCLR_DEMAND_MODE_OFFS)
+#define ICCLR_CHAN_ENABLE			BIT12	/* Channel enable				*/
+#define ICCLR_FETCH_NEXT_DESC	   	BIT13	/* Fetch next descriptor		*/
+#define ICCLR_CHAN_ACTIVE	        BIT14  	/* Channel active				*/
+#define ICCLR_REQ_DIR_OFFS			15		/* Request generated by src/dst	*/
+#define ICCLR_REQ_DIR_MASK			(1 << ICCLR_REQ_DIR_OFFS)
+#define ICCLR_REQ_DIR_SRC			(0 << ICCLR_REQ_DIR_OFFS)
+#define ICCLR_REQ_DIR_DST			(1 << ICCLR_REQ_DIR_OFFS)
+#define ICCLR_REQ_MODE_OFFS			16		/* DMAReqn is level/edge input	*/
+#define ICCLR_REQ_MODE_MASK			(1 << ICCLR_REQ_MODE_OFFS)
+#define ICCLR_REQ_MODE_LEVEL		(0 << ICCLR_REQ_MODE_OFFS)
+#define ICCLR_REQ_MODE_EDGE			(1 << ICCLR_REQ_MODE_OFFS)
+#define ICCLR_CLOSE_DESC_ENABLE	   	BIT17  	/* Close descriptor enable      */
+#define ICCLR_EOT_ENABLE			BIT18  	/* End Of Tarnsfer (EOT) enable */
+#define ICCLR_EOT_AFFECT_OFFS		19 /* EOT -> Fetch next descriptor/halt */
+#define ICCLR_EOT_AFFECT_MASK		(1 << ICCLR_EOT_AFFECT_OFFS)
+#define ICCLR_EOT_FETCH_NEXT		(0 << ICCLR_EOT_AFFECT_OFFS)
+#define ICCLR_EOT_FETCH_HALT		(1 << ICCLR_EOT_AFFECT_OFFS)
+#define ICCLR_CHANNEL_ABORT		   	BIT20  	/* Abort DMA transfer           */
+
+#define ICCLR_OVRRD_SRC_OFFS		21	
+#define ICCLR_OVRRD_SRC_MASK		(0x3 << ICCLR_OVRRD_SRC_OFFS)
+#define ICCLR_OVRRD_SRC_BAR(barNo)	((barNo) << ICCLR_OVRRD_SRC_OFFS)
+
+#define ICCLR_OVRRD_DST_OFFS		23	
+#define ICCLR_OVRRD_DST_MASK		(0x3 << ICCLR_OVRRD_DST_OFFS)
+#define ICCLR_OVRRD_DST_BAR(barNo)	((barNo) << ICCLR_OVRRD_DST_OFFS)
+
+#define ICCLR_OVRRD_NDSC_OFFS		25	
+#define ICCLR_OVRRD_NDSC_MASK		(0x3 << ICCLR_OVRRD_NDSC_OFFS)
+#define ICCLR_OVRRD_NDSC_BAR(barNo)	((barNo) << ICCLR_OVRRD_NDSC_OFFS)
+
+#define ICCLR_DESC_MODE_OFFS        31 		/* Descriptor mode 64KB/16M    	*/
+#define ICCLR_DESC_MODE_MASK        (1 << ICCLR_DESC_MODE_OFFS)
+#define ICCLR_DESC_MODE_64K         (0 << ICCLR_DESC_MODE_OFFS)
+#define ICCLR_DESC_MODE_16M         (1 << ICCLR_DESC_MODE_OFFS)
+
+/* IDMA Channel Control High Register (ICCHR)								*/
+#define ICCHR_ENDIANESS_OFFS		0
+#define ICCHR_ENDIANESS_MASK		(1 << ICCHR_ENDIANESS_OFFS)
+#define ICCHR_ENDIAN_BIG			(0 << ICCHR_ENDIANESS_OFFS)
+#define ICCHR_ENDIAN_LITTLE			(1 << ICCHR_ENDIANESS_OFFS)
+#define ICCHR_DESC_BYTE_SWAP_EN		BIT1	/* swap the bytes of 64-bit 	*/
+											/* dword during descriptor fetch*/
+#define ICCHR_DESC_DEMAND_ENABLE	BIT2	/* Descriptor Demand Mode en	*/
+
+/* IDMA Channel Interrupt Cause Register (ICICR) */
+#define ICICR_CHAN_OFFS					8
+#define ICICR_CAUSE_OFFS(chan)   		(chan * ICICR_CHAN_OFFS)
+#define ICICR_CAUSE_MASK_ALL(chan)      (0xFF << ICICR_CAUSE_OFFS(chan))
+#define ICICR_CAUSE_MASK(chan, cause)   (1 << (cause + ICICR_CAUSE_OFFS(chan)))
+#define ICICR_COMP_MASK					0x01010101
+#define ICICR_ERR_MASK					0x3e3e3e3e
+
+/* IDMA Error Select Register (IESR)	*/
+#define IESR_ERR_TYPE_OFFS			0
+#define IESR_ERR_TYPE_MASK			(0x1f << IESR_ERR_TYPE_OFFS)
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif	/* __INCmvIdmaSpech */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/idma/mvIdma.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/idma/mvIdma.c
@@ -0,0 +1,464 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+            this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+/*******************************************************************************
+* mvIdma.c - Implementation file for IDMA HW library
+*
+* DESCRIPTION:
+*       This file contains Marvell Controller IDMA HW library API 
+*       implementation.
+*       NOTE: 
+*       1) This HW library API assumes IDMA source, destination and 
+*          descriptors are cache coherent. 
+*       2) In order to gain high performance, the API does not parform 
+*          API parameter checking.
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvSysIdmaConfig.h"
+#include "mvIdmaRegs.h"
+#include "mvIdma.h"
+
+#error "This HAL was not adatped to the new HAL arch, and thus cannot be compiled."
+
+/* defines  */
+#ifdef MV_DEBUG
+        #define DB(x)   x
+#else
+        #define DB(x)
+#endif  
+
+/*******************************************************************************
+* mvDmaInit - Initialize IDMA engine
+*
+* DESCRIPTION:
+*               This function initialize IDMA unit. 
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_ERROR if setting fail.
+*******************************************************************************/
+MV_VOID mvDmaHalInit(MV_U32 dmaChanNum)
+{
+	MV_U32	i;
+
+        /* Abort any DMA activity */
+        for(i = 0; i < dmaChanNum; i++)
+        {
+                mvDmaCommandSet(i, MV_STOP);
+
+                /* The following must be set */
+                mvDmaCtrlHighSet(i, (ICCHR_ENDIAN_LITTLE  
+#if defined(MV_CPU_LE)
+				      | ICCHR_DESC_BYTE_SWAP_EN
+#endif
+				     ));
+
+        }
+    	MV_REG_WRITE( IDMA_CAUSE_REG, 0);
+}
+
+/*******************************************************************************
+* mvDmaCtrlLowSet - Set IDMA channel control low register
+*
+* DESCRIPTION:
+*       Each IDMA Channel has its own unique control registers (high and low)
+*       where certain IDMA modes are programmed.
+*       This function writes 32bit word to IDMA control low register.
+*
+*						!!!!!! WARNING !!!!!!
+*		If system uses the IDMA DRAM HW cache coherency the source and 
+* 		destination maximum DTL size must be cache line size.
+*
+* INPUT:
+*       chan     - DMA channel number. See MV_DMA_CHANNEL enumerator.
+*       ctrlWord - Channel control word for low register.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_OK
+*
+* NOTE: This function can modified the Override attribute that mvDmaOverrideSet
+*       configured. 
+*******************************************************************************/
+MV_STATUS mvDmaCtrlLowSet(MV_U32 chan, MV_U32 ctrlWord)
+{
+	MV_REG_WRITE(IDMA_CTRL_LOW_REG(chan), ctrlWord);
+	return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvDmaCtrlHighSet - Set IDMA channel control high register
+*
+* DESCRIPTION:
+*       Each IDMA Channel has its own unique control registers (high and low)
+*       where certain IDMA modes are programmed.
+*       This function writes 32bit word to IDMA control high register.
+*
+* INPUT:
+*       chan     - DMA channel number. See MV_DMA_CHANNEL enumerator.
+*       ctrlWord - Channel control word for high register.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_OK.
+*
+*******************************************************************************/
+MV_STATUS mvDmaCtrlHighSet(MV_U32 chan, MV_U32 ctrlWord)
+{
+    MV_REG_WRITE(IDMA_CTRL_HIGH_REG(chan), ctrlWord);
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvDmaTransfer - Transfer data from source to destination
+* 
+* DESCRIPTION:       
+*       This function initiates IDMA channel, according to function parameters,
+*       in order to perform DMA transaction.
+*       This routine supports both chain and none chained DMA modes. 
+*       To use the function in chain mode just set phyNextDesc parameter with
+*       chain second descriptor address (the first one is given in other 
+*       function paarameters). Otherwise (none chain mode) set it to NULL.
+*       To gain maximum performance the user is asked to keep the following 
+*       restrictions:
+*       1) Selected engine is available (not busy).
+*       1) This module does not take into consideration CPU MMU issues.
+*          In order for the IDMA engine to access the appropreate source 
+*          and destination, address parameters must be given in system 
+*          physical mode.
+*       2) This API does not take care of cache coherency issues. The source,
+*          destination and in case of chain the descriptor list are assumed
+*          to be cache coherent.
+*       3) In case of chain mode, the API does not align the user descriptor
+*          chain. Instead, the user must make sure the descriptor chain is 
+*          aligned according to IDMA rquirements.
+*       4) Parameters validity. For example, does size parameter exceeds 
+*          maximum byte count of descriptor mode (16M or 64K).
+*
+* INPUT:
+*       chan          - DMA channel number. See MV_DMA_CHANNEL enumerator.
+*       phySrc        - Physical source address.
+*       phyDst        - Physical destination address.
+*       size          - The total number of bytes to transfer.
+*       *pPhyNextDesc - Physical address pointer to 2nd descriptor in chain. 
+*                       In case of none chain mode set it to NULL.
+*
+* OUTPUT:
+*       None.
+*
+* RETURS:
+*       MV_OK.
+*
+*******************************************************************************/
+MV_STATUS mvDmaTransfer(MV_U32 chan, MV_U32 phySrc, MV_U32 phyDst, MV_U32 size, 
+                                                    MV_U32 phyNextDescPtr)
+{   
+	/* Set byte count register			*/
+	MV_REG_WRITE(IDMA_BYTE_COUNT_REG(chan), size);
+	/* Set source address register		*/
+	MV_REG_WRITE(IDMA_SRC_ADDR_REG(chan), phySrc);
+	/* Set destination address register	*/
+	MV_REG_WRITE(IDMA_DST_ADDR_REG(chan), phyDst);
+	/* UnLock the Source address in dma operation */
+	MV_REG_BIT_RESET(IDMA_CTRL_LOW_REG(chan), ICCLR_SRC_HOLD);
+	
+    if (0 != phyNextDescPtr)
+	{	/* Chain mode. Set next descriptor register	*/
+		MV_REG_WRITE(IDMA_NEXT_DESC_PTR_REG(chan), phyNextDescPtr);
+	}
+	
+	/* Start DMA	*/
+	MV_REG_BIT_SET(IDMA_CTRL_LOW_REG(chan), ICCLR_CHAN_ENABLE);
+	
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvDmaMemInit - Initialize a memory buffer with a given 64bit value pattern
+* 
+* DESCRIPTION:       
+*       This function initiates IDMA channel, according to function parameters,
+*       in order to perform DMA transaction for the purpose of initializing a 
+*       memory buffer with a user supplied pattern.
+*       This routine supports both chain and none chained DMA modes. 
+*       To use the function in chain mode just set phyNextDesc parameter with
+*       chain second descriptor address (the first one is given in other 
+*       function paarameters). Otherwise (none chain mode) set it to NULL.
+*       To gain maximum performance the user is asked to keep the following 
+*       restrictions:
+*       1) Selected engine is available (not busy).
+*       1) This module does not take into consideration CPU MMU issues.
+*          In order for the IDMA engine to access the appropreate source 
+*          and destination, address parameters must be given in system 
+*          physical mode.
+*       2) This API does not take care of cache coherency issues. The source,
+*          destination and in case of chain the descriptor list are assumed
+*          to be cache coherent.
+*       3) No chain mode support.
+*       4) Parameters validity. For example, does size parameter exceeds 
+*          maximum byte count of descriptor mode (16M or 64K).
+*
+* INPUT:
+*       chan          - DMA channel number. See MV_DMA_CHANNEL enumerator.
+*       ptrnPtr       - Physical source address of the 64bit pattern
+*       startPtr      - Physical destinaation address to start with
+*       size          - The total number of bytes to transfer.
+*
+* OUTPUT:
+*       None.
+*
+* RETURS:
+*       MV_OK.
+*
+*******************************************************************************/
+MV_STATUS mvDmaMemInit(MV_U32 chan, MV_U32 ptrnPtr, MV_U32 startPtr, MV_U32 size)
+{   
+	/* Set byte count register			*/
+	MV_REG_WRITE(IDMA_BYTE_COUNT_REG(chan), size);
+	/* Set source address register		*/
+	MV_REG_WRITE(IDMA_SRC_ADDR_REG(chan), ptrnPtr);
+	/* Set destination address register	*/
+	MV_REG_WRITE(IDMA_DST_ADDR_REG(chan), startPtr);
+	/* Lock the Source address in dma operation */
+	MV_REG_BIT_SET(IDMA_CTRL_LOW_REG(chan), ICCLR_SRC_HOLD);
+	
+	/* Start DMA	*/
+	MV_REG_BIT_SET(IDMA_CTRL_LOW_REG(chan), ICCLR_CHAN_ENABLE);
+	
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvDmaStateGet - Get IDMA channel status.
+*
+* DESCRIPTION:
+*       DMA channel status can be active, stopped, paused.
+*       This function retrunes the channel status.
+*
+* INPUT:
+*       chan - IDMA channel number. See MV_DMA_CHANNEL enumerator.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       One of MV_STATE enumerator values.
+*
+*******************************************************************************/
+MV_STATE mvDmaStateGet(MV_U32 chan)
+{
+    MV_U32  ctrlLow;
+
+    /* Read control low register    */
+    ctrlLow = MV_REG_READ(IDMA_CTRL_LOW_REG(chan));
+    
+    /* Leave only enable/active bits    */
+    ctrlLow &= (ICCLR_CHAN_ENABLE | ICCLR_CHAN_ACTIVE);
+
+    /* If channel is enabled and active then its running        */
+    if (ctrlLow == (ICCLR_CHAN_ENABLE | ICCLR_CHAN_ACTIVE))
+    {
+        return MV_ACTIVE;
+    }
+    /* If channel is disabled but active then its paused        */
+    else if (ctrlLow == ICCLR_CHAN_ACTIVE)
+    {
+        return MV_PAUSED;
+    }
+    else 
+    {    
+        return MV_IDLE;
+    }
+}
+
+/*******************************************************************************
+* mvDmaCommandSet - Set command to DMA channel
+*
+* DESCRIPTION:
+*       DMA channel can be started, idel, paused and restarted.
+*       Paused can be set only if channel is active.
+*       Start can be set only if channel is idle.
+*       Restart can be set only if channel is paused.
+*       Stop activate the channel abort which cause the DMA to aborts in the 
+*       middle of a transaction.
+*
+* INPUT:
+*       chan    - IDMA channel number. See MV_DMA_CHANNEL enumerator.
+*       command - Requested command. See MV_COMMAND enumerator.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_ERROR if requested command can not be set.
+*
+*******************************************************************************/
+MV_STATUS mvDmaCommandSet(MV_U32 chan, MV_COMMAND command)
+{
+    MV_U32  ctrlLow;
+    MV_U32  dmaStatus;
+
+    /* Read control low register    */
+    ctrlLow = MV_REG_READ(IDMA_CTRL_LOW_REG(chan));
+
+    /* Get current DMA status       */
+    dmaStatus = mvDmaStateGet(chan);
+
+    if ((command == MV_START) && (dmaStatus == MV_IDLE)) 
+    {
+        /* To start, set DMA channel enable bit                             */
+        ctrlLow |= ICCLR_CHAN_ENABLE;
+    }
+    else if ((command == MV_PAUSE) && (dmaStatus == MV_ACTIVE)) 
+    {
+        /* To pause, reset DMA channel enable bit                           */
+        ctrlLow &= ~ICCLR_CHAN_ENABLE;
+    }
+    else if ((command == MV_RESTART) && (dmaStatus == MV_PAUSED)) 
+    {
+        /* To restart, set DMA channel enable bit                           */
+        ctrlLow |= ICCLR_CHAN_ENABLE;
+    }
+    else if (command == MV_STOP)
+    {
+        /* To stop, set DMA channel abort bit                               */
+        ctrlLow |= ICCLR_CHANNEL_ABORT;
+    }    
+    else
+    {
+		DB(mvOsPrintf("mvDmaCommandSet: ERR. Can not set command %d in \
+					   status %d\n", command, dmaStatus));
+        return MV_ERROR;
+    }
+    
+    /* Write control word to register   */
+    MV_REG_WRITE(IDMA_CTRL_LOW_REG(chan), ctrlLow);
+
+    /* If comman is stop, ensure channel is stopped                         */
+    if (command == MV_STOP)
+    {
+        while(MV_IDLE != mvDmaStateGet(chan));
+    }    
+
+    return  MV_OK;
+}
+
+
+/************ DEBUG ***********/
+MV_VOID    mvIdmaRegs(MV_U32 chan)
+{
+    mvOsPrintf("\t IDMA #%d Registers:\n", chan);
+
+    mvOsPrintf("IDMA_BYTE_COUNT_REG             : 0x%X = 0x%08x\n", 
+                IDMA_BYTE_COUNT_REG(chan), 
+                MV_REG_READ( IDMA_BYTE_COUNT_REG(chan) ) );    
+
+    mvOsPrintf("IDMA_SRC_ADDR_REG               : 0x%X = 0x%08x\n", 
+                IDMA_SRC_ADDR_REG(chan), 
+                MV_REG_READ( IDMA_SRC_ADDR_REG(chan) ) );    
+
+    mvOsPrintf("IDMA_DST_ADDR_REG               : 0x%X = 0x%08x\n", 
+                IDMA_DST_ADDR_REG(chan), 
+                MV_REG_READ( IDMA_DST_ADDR_REG(chan) ) );    
+
+    mvOsPrintf("IDMA_NEXT_DESC_PTR_REG          : 0x%X = 0x%08x\n", 
+                IDMA_NEXT_DESC_PTR_REG(chan), 
+                MV_REG_READ( IDMA_NEXT_DESC_PTR_REG(chan) ) );    
+
+    mvOsPrintf("IDMA_CURR_DESC_PTR_REG          : 0x%X = 0x%08x\n", 
+                IDMA_CURR_DESC_PTR_REG(chan), 
+                MV_REG_READ( IDMA_CURR_DESC_PTR_REG(chan) ) );    
+
+    mvOsPrintf("IDMA_CTRL_LOW_REG               : 0x%X = 0x%08x\n", 
+                IDMA_CTRL_LOW_REG(chan), 
+                MV_REG_READ( IDMA_CTRL_LOW_REG(chan) ) );    
+
+    mvOsPrintf("IDMA_CTRL_HIGH_REG              : 0x%X = 0x%08x\n", 
+                IDMA_CTRL_HIGH_REG(chan), 
+                MV_REG_READ( IDMA_CTRL_HIGH_REG(chan) ) );    
+
+    mvOsPrintf("IDMA_CAUSE_REG                  : 0x%X = 0x%08x\n", 
+                IDMA_CAUSE_REG, 
+                MV_REG_READ( IDMA_CAUSE_REG ) );    
+
+    mvOsPrintf("IDMA_MASK_REG                   : 0x%X = 0x%08x\n", 
+                IDMA_MASK_REG, 
+                MV_REG_READ( IDMA_MASK_REG ) );    
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/idma/mvIdma.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/idma/mvIdma.h
@@ -0,0 +1,125 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+/*******************************************************************************
+* mvIdma.h - Header File for :
+*
+* DESCRIPTION:
+*       This file contains Marvell Controller IDMA HW library API.
+*       NOTE: This HW library API assumes IDMA source, destination and 
+*       descriptors are cache coherent. 
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+
+#ifndef __INCmvIdmah
+#define __INCmvIdmah
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+
+/* defines  */
+#define MV_IDMA_DESC_ALIGNMENT  0x10  /* 16bytes aligment restriction       */
+
+/* typedefs */
+
+
+/* This struct describes IDMA descriptor structure                          */
+typedef struct _mvDmaDesc
+{
+    MV_U32 	byteCnt;        /* The total number of bytes to transfer        */
+    MV_U32 	phySrcAdd;	    /* The physical source address                  */
+    MV_U32 	phyDestAdd;     /* The physical destination address             */
+    MV_U32	phyNextDescPtr; /* If we are using chain mode DMA transfer,     */
+				            /* then this pointer should point to the        */
+                            /* physical address of the next descriptor,     */
+                            /* otherwise it should be NULL.                 */
+}MV_DMA_DESC;
+
+
+/* mvIdma.h API list */
+MV_VOID mvDmaHalInit (MV_U32);
+MV_STATUS mvDmaCtrlLowSet (MV_U32 chan, MV_U32 ctrlWord);
+MV_STATUS mvDmaCtrlHighSet(MV_U32 chan, MV_U32 ctrlWord);
+MV_STATUS mvDmaTransfer(MV_U32 chan, MV_U32 phySrc, MV_U32 phyDst, MV_U32 size, 
+                                                    MV_U32 phyNextDescPtr);
+MV_STATUS mvDmaMemInit(MV_U32 chan, MV_U32 ptrnPtr, MV_U32 startPtr, MV_U32 size);
+MV_STATE  mvDmaStateGet(MV_U32 chan);
+MV_STATUS mvDmaCommandSet(MV_U32 chan, MV_COMMAND command);
+
+MV_VOID mvIdmaRegs(MV_U32 chan);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __INCmvIdmah */
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/idma/mvCompVer.txt
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/idma/mvCompVer.txt
@@ -0,0 +1,4 @@
+Global HAL Version: DOVE_HAL_3_1_2
+Unit HAL Version: 1.0.2
+Description: This component includes an implementation of the unit HAL drivers
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/camera/mvSysCamSensor.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/camera/mvSysCamSensor.h
@@ -0,0 +1,124 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCMVSysCamSensorH
+#define __INCMVSysCamSensorH
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvSysCamConfig.h"
+
+/*******************************************************************************
+* mvSysCamSensorRegRead
+*
+* DESCRIPTION:
+*	System interface for reading a camera Sensor register.
+*
+* INPUT:
+*       sensorHandle: Handle passed by OS glue by which a camera sensor is
+*		     identified.
+*       regOffset:   Offset of sensor register to be read.
+*
+* OUTPUT:
+*       regData:     Register data
+*
+* RETURN:
+*	MV_OK on success,
+*	MV_ERROR otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvSysCamSensorRegRead(MV_VOID *sensorHandle, MV_U32  regOffset, MV_U8 *regData);
+
+
+/*******************************************************************************
+* mvSysCamSensorRegWrite
+*
+* DESCRIPTION:
+*	System interface for writing an Audio codec register.
+*
+* INPUT:
+*       sensorHandle: Handle passed by OS glue by which a camera sensor is
+*		     identified.
+*       regOffset:   Offset of sensor register to be written. 
+*       regData:     Register data to write.
+*
+* OUTPUT:
+*	None.
+*
+* RETURN:
+*	MV_OK on success,
+*	MV_ERROR otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvSysCamSensorRegWrite(MV_VOID *sensorHandle, MV_U32  regOffset, MV_U8 regData);
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/camera/mvCamController.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/camera/mvCamController.h
@@ -0,0 +1,374 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+#ifndef __INCmvCamControllerh
+#define __INCmvCamControllerh
+
+#ifdef __cplusplus
+    extern "C" { 
+#endif
+
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvSysCamConfig.h"
+/*
+ * API for the Camera Interface Controller HAL driver
+ */
+
+typedef struct {
+	MV_U32		tclk;
+}MV_CAMERA_HAL_DATA;
+
+/* callback function to acknowledge frame completion, takes buffer index */ 
+    typedef MV_VOID (* mvCamFrameComplete_t) (MV_VOID *, MV_U32 bufIdx);
+
+typedef enum {
+     MV_CAM_BURST_SIZE_32,
+     MV_CAM_BURST_SIZE_16,
+     MV_CAM_BURST_SIZE_64,
+}MV_CAM_BURST_SIZE;
+
+/*
+ * MV_CAM_CONTROLLER: Camera Controller data structure handler
+ *
+ */
+typedef struct {
+     /* These field must be initialized by the upper layer before calling 
+	mvCamCafeInit */
+     mvCamFrameComplete_t mvCamFrameCompleted;
+     MV_VOID	*mvCamFrameCompletionHandler;
+
+     /* internal fields, upper layer should not access these fields*/
+     /* must be cleared before calling the init function */
+     MV_U32 base; /* camera base address*/
+
+     MV_U32 numberOfBuffers;
+     MV_U32 dmaBuffer[3];
+
+} MV_CAM_CONTROLLER;
+
+/*******************************************************************************
+* mvCamCtrlInit - Initialize the Camera Controller
+*
+* DESCRIPTION:
+*	this function does the following:
+* 1. Initializes the internal fields of the data stucture.
+* 2. initialize the controller and loads default values.
+* 3. Power up the controller
+* 4. The CMOS sensor will not be powered up by this function
+*
+* INPUT:
+*       Pointer to Camera Cafe Controller Data structure, this sturcture must 
+* 	be allocated by callee.
+* OUTPUT:
+*		None
+* RETURN:
+*    MV_BAD_PTR: if data structure not allocated or have bad external field
+*    MV_ERROR: failed to initialize the controller
+*    MV_OK otherwise	
+*******************************************************************************/
+MV_STATUS mvCamCtrlInit(MV_CAM_CONTROLLER *pCam, MV_CAMERA_HAL_DATA *halData);
+
+/*******************************************************************************
+* mvCamCtrlPowerUp - Power up the Camera Controller and the Sensor
+*
+* DESCRIPTION:
+*	Power up the camera controller and the sensor.
+*	This function doesn't wait for the devices to be power up, this should
+*	be done by the upper layer.
+*
+* INPUT:
+*       Pointer to Camera Cafe Controller Data structure
+*
+* OUTPUT:
+*	None
+* RETURN:
+*    MV_BAD_PTR: if data structure not allocated or have bad external field   
+*    MV_OK otherwise	
+*******************************************************************************/
+MV_STATUS mvCamCtrlPowerUp(MV_CAM_CONTROLLER *pCam);
+
+/*******************************************************************************
+* mvCamCtrlPowerDown - Power down the Camera Controller
+*
+* DESCRIPTION:
+*	Power down the camera controller and the sensor
+*
+* INPUT:
+*       Pointer to Camera Cafe Controller Data structure
+*
+* OUTPUT:
+*		None
+* RETURN:
+*    MV_BAD_PTR: if data structure not allocated or have bad external field   
+*    MV_OK otherwise	
+*******************************************************************************/
+MV_STATUS mvCamCtrlPowerDown(MV_CAM_CONTROLLER *pCam);
+
+/*******************************************************************************
+* mvCamCtrlDMABuffersSet - Set buffers to the DMA of the Camera Controller
+*
+* DESCRIPTION:
+* 
+* INPUT:
+*       Pointer to Camera Cafe Controller Data structure
+*	array of DMA buffer address
+*       number of buffers
+*
+* OUTPUT:
+*		None
+* RETURN:
+*    MV_BAD_PTR: if data structure not allocated or have bad external field   
+*    MV_BAD_PARAM: if number of buffers in not 2 or 3.
+*    MV_ERROR: if DMA is active	
+*    MV_OK otherwise	
+*******************************************************************************/
+MV_STATUS mvCamCtrlDMABufferSet(MV_CAM_CONTROLLER *pCam, MV_U32 dmaAddress[], 
+				MV_U32 numberOfBuffers);
+
+/*******************************************************************************
+* mvCamCtrlSetDMABurstSizeSet - Configure the DMA burst size of the Camera Controller
+*
+* DESCRIPTION:
+* 
+* INPUT:
+*       Pointer to Camera Cafe Controller Data structure
+*       burst size 
+*
+* OUTPUT:
+*		None
+* RETURN:
+*    MV_BAD_PTR: if data structure not allocated or have bad external field   
+*    MV_BAD_PARAM: bad burst size.
+*    MV_BUSY: if DMA is active	
+*    MV_OK otherwise	
+*******************************************************************************/
+MV_STATUS mvCamCtrlDMABurstSizeSet(MV_CAM_CONTROLLER *pCam, MV_CAM_BURST_SIZE size);
+
+/*******************************************************************************
+* mvCamCtrlDMAStart - enabel the Camera DMA
+*
+* DESCRIPTION:
+* 
+* INPUT:
+*       Pointer to Camera Cafe Controller Data structure
+*
+* OUTPUT:
+*		None
+* RETURN:
+*    MV_ERROR: if the controller was not initialized properly
+*    MV_BUSY: if DMA is already active	
+*    MV_OK otherwise	
+*******************************************************************************/
+MV_STATUS mvCamCtrlDMAStart(MV_CAM_CONTROLLER *pCam);
+
+
+/*******************************************************************************
+* mvCamCtrlDMAStop - disabel the Camera DMA
+*
+* DESCRIPTION:
+* 
+* INPUT:
+*       Pointer to Camera Cafe Controller Data structure
+*
+* OUTPUT:
+*		None
+* RETURN:
+*    MV_ERROR: if the controller was not initialized properly
+*    MV_OK otherwise	
+*******************************************************************************/
+MV_STATUS mvCamCtrlDMAStop(MV_CAM_CONTROLLER *pCam);
+
+/*******************************************************************************
+* mvCamCtrlImageFormatSet - Set Image Input pixel format
+*
+* DESCRIPTION:
+*	Configure the input pixel format
+* INPUT:
+*       Pointer to Camera Controller Data structure.
+*	Pointer to requested input MV_PIX_FORMAT
+*	Pointer to requested output MV_PIX_FORMAT
+*
+* OUTPUT:
+*
+* RETURN:
+*    MV_NOT_SUPPORTED: requested format not supported
+*    MV_ERROR: if the controller was not initialized properly
+*    MV_BUSY: if DMA is active	
+*    MV_OK otherwise
+*******************************************************************************/
+MV_STATUS mvCamCtrlImageFormatSet(MV_CAM_CONTROLLER *pCam, MV_PIXEL_FORMAT *inFormat,
+				  MV_PIXEL_FORMAT *outFormat);
+
+/*******************************************************************************
+* mvCamCtrlImageSizeSet - Set size if the image frame
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       Pointer to Camera Controller Data structure.
+*	vsize - height 
+*	hsize - width
+*
+* OUTPUT:
+*
+* RETURN:
+*    MV_NOT_SUPPORTED: requested format not supported
+*    MV_ERROR: if the controller was not initialized properly
+*    MV_BUSY: if DMA is active	
+*    MV_OK otherwise
+*******************************************************************************/
+MV_STATUS mvCamCtrlImageSizeSet(MV_CAM_CONTROLLER *pCam, MV_U32 vsize, MV_U32 hsize);
+
+
+/*******************************************************************************
+* mvCamCafeSetParam - Generic function for setting controller parameter
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       Pointer to Camera controller Data structure.
+*       param type
+*	param value:
+*	MV_CICC_PARAM_ 
+*
+*
+* OUTPUT:
+*
+* RETURN:
+*    MV_ERROR: I2C failure
+*    MV_NOT_SUPPORTED: requested parameter not supported
+*    MV_BUSY: if DMA is active	
+*    MV_OK otherwise
+*******************************************************************************/
+/*MV_VOID mvCamCafeSetImageParam(MV_CAM_SENSOR *, MV_IMAGE_PARAM param,MV_U32 value);*/
+
+
+
+/*******************************************************************************
+* mvCamCtrlISR -Interrupt service routine
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       Pointer to Camera Controller Data structure.
+*
+* OUTPUT:
+*
+* RETURN:
+*    MV_ERROR: if the controller was not initialized properly
+*    MV_NOT_FOUND: no interrupt found
+*    MV_OK otherwise
+*******************************************************************************/
+MV_STATUS mvCamCtrlISR(MV_CAM_CONTROLLER *pCam);
+
+/*******************************************************************************
+* mvCamCtrlI2CRead - Read one byte register through the I2C agent
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       Pointer to Camera Controller Data structure.
+*	id: I2C slave id address
+*	addr: register offset
+*
+* OUTPUT:
+*	Data value
+*
+* RETURN:
+*    MV_ERROR: if the controller was not initialized properly
+*    MV_FAIL: if the TWSI operation failed
+*    MV_OK otherwise
+*******************************************************************************/
+MV_STATUS mvCamCtrlI2CRead(MV_CAM_CONTROLLER *pCam, MV_U8 id, MV_U8 addr,
+			   MV_U8 *value);
+
+/*******************************************************************************
+* mvCamCtrlI2CWrite - Write one byte register through the I2C agent
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       Pointer to Camera Controller Data structure.
+*	id: I2C target id
+*	addr: register offset
+*	data value
+*
+* OUTPUT:
+*
+* RETURN:
+*    MV_ERROR: if the controller was not initialized properly
+*    MV_FAIL: if the TWSI operation failed
+*    MV_OK otherwise
+*******************************************************************************/
+MV_STATUS mvCamCtrlI2CWrite(MV_CAM_CONTROLLER *pCam, MV_U8 id, MV_U8 addr, MV_U8 value);
+
+
+MV_STATUS mvCamSDIOWinInit(MV_UNIT_WIN_INFO *addrWinMap);
+MV_STATUS mvCamSDIOWinRead(MV_U32 winNum, MV_UNIT_WIN_INFO *pAddrDecWin);
+MV_STATUS mvCamSDIOWinWrite(MV_U32 winNum, MV_UNIT_WIN_INFO *pAddrDecWin);
+
+#ifdef __cplusplus
+    }
+#endif
+
+#endif /* __INCmvCamControllerh */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/camera/mvCamController.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/camera/mvCamController.c
@@ -0,0 +1,549 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+/*
+ * Cafe Camera Interface Controller HAL driver
+ */
+/* includes */
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvSysCamConfig.h"
+#include "mvCamControllerRegs.h"
+#include "mvCamController.h"
+
+static MV_CAMERA_HAL_DATA	cameraHalData;
+
+static MV_STATUS configClockContol(MV_CAM_CONTROLLER *pCam)
+{
+     MV_U32 tclock = cameraHalData.tclk;
+     MV_U32 reg = MV_REG_READ(pCam->base + MV_CAM_CLKCTRL);
+
+     reg &= ~0xFFFFFFF;
+
+     switch (tclock)
+     {
+     case MV_BOARD_TCLK_166MHZ:
+	  reg |= 0x20000003;
+	  break;
+     default:
+	  mvOsPrintf("configClockContol: Not supported core clock %d\n",tclock);
+	  return MV_ERROR;
+     }
+     MV_REG_WRITE(pCam->base + MV_CAM_CLKCTRL, reg);
+     return MV_OK;
+}
+
+/*---------------------------API----------------------------------------------*/
+/*******************************************************************************
+* mvCamCtrlInit - Initialize the Camera Controller
+*
+* DESCRIPTION:
+*	this function does the following:
+* 1. Initializes the internal fields of the data stucture.
+* 2. initialize the controller and loads default values.
+* 3. Power up the controller
+* 4. The CMOS sensor will not be powered up by this function
+*
+* INPUT:
+*       Pointer to Camera Controller Data structure, this sturcture must 
+* 	be allocated by callee.
+* OUTPUT:
+*		None
+* RETURN:
+*    MV_BAD_PTR: if data structure not allocated or have bad external field
+*    MV_ERROR: failed to initialize the controller
+*    MV_OK otherwise	
+*******************************************************************************/
+MV_STATUS mvCamCtrlInit(MV_CAM_CONTROLLER *pCam, MV_CAMERA_HAL_DATA *halData)
+{
+     if(!pCam || !pCam->mvCamFrameCompleted)
+     {
+	  mvOsPrintf("mvCamCtrlInit: Bad Input\n");
+	  return MV_BAD_PTR;
+     }
+
+     mvOsMemcpy(&cameraHalData, halData, sizeof(MV_CAMERA_HAL_DATA));
+
+     pCam->base = MV_CAFE_REGS_OFFSET;
+
+     /* Confiure CCIC in normal mode */
+     MV_REG_BIT_RESET(pCam->base + MV_CAM_CONTROL1, MV_CAM_C1_PWRDWN);
+
+     /* disable CCIC */
+     MV_REG_BIT_RESET(pCam->base + MV_CAM_CONTROL0, MV_CAM_C0_ENABLE);
+
+     /* unmask interrupts */
+     MV_REG_WRITE(pCam->base + MV_CAM_IRQ_MASK, BIT0|BIT1|BIT2|BIT3|BIT4|BIT5|BIT6|BIT16|BIT17|BIT18);
+
+//     MV_REG_WRITE(pCam->base + MV_CAM_IRQ_MASK, 0);
+
+     return configClockContol(pCam);
+}
+
+/*******************************************************************************
+* mvCamCtrlPowerUp - Power up the Camera Controller and the Sensor
+*
+* DESCRIPTION:
+*	Power up the camera controller and the sensor.
+*	This function doesn't wait for the devices to be power up, this should
+*	be done by the upper layer.
+*
+* INPUT:
+*       Pointer to Camera Cafe Controller Data structure
+*
+* OUTPUT:
+*	None
+* RETURN:
+*    MV_BAD_PTR: if data structure not allocated or have bad external field   
+*    MV_OK otherwise	
+*******************************************************************************/
+MV_STATUS mvCamCtrlPowerUp(MV_CAM_CONTROLLER *pCam)
+{
+     if(!pCam || !pCam->mvCamFrameCompleted)
+     {
+	  mvOsPrintf("mvCamCtrlPowerUp: Bad Input\n");
+	  return MV_BAD_PTR;
+     }
+
+     MV_REG_BIT_RESET(pCam->base + MV_CAM_CONTROL1, MV_CAM_C1_PWRDWN);
+
+     /* put external CMOS sensor in reset and power-down mode*/
+     MV_REG_WRITE(pCam->base + MV_CAM_GPR,
+		  MV_CAM_GPR_CTL1PADEN | MV_CAM_GPR_CTL0PADEN |
+		  MV_CAM_GPR_CTL1);
+
+     mvOsDelay(10);
+
+     /* Release external CMOS sensor  reset and power-down*/
+     MV_REG_WRITE(pCam->base + MV_CAM_GPR,
+		  MV_CAM_GPR_CTL1PADEN | MV_CAM_GPR_CTL0PADEN |
+		  MV_CAM_GPR_CTL1);
+     return MV_OK;
+}
+/*******************************************************************************
+* mvCamCtrlPowerDown - Power down the Camera Controller
+*
+* DESCRIPTION:
+*	Power down the camera controller and the sensor
+*
+* INPUT:
+*       Pointer to Camera Cafe Controller Data structure
+*
+* OUTPUT:
+*		None
+* RETURN:
+*    MV_BAD_PTR: if data structure not allocated or have bad external field   
+*    MV_OK otherwise	
+*******************************************************************************/
+MV_STATUS mvCamCtrlPowerDown(MV_CAM_CONTROLLER *pCam)
+{
+     if(!pCam || !pCam->mvCamFrameCompleted)
+     {
+	  mvOsPrintf("mvCamCtrlPowerDown: Bad Input\n");
+	  return MV_BAD_PTR;
+     }
+
+     /* put external CMOS sensor in power-down mode*/
+     MV_REG_WRITE(pCam->base + MV_CAM_GPR,
+		  MV_CAM_GPR_CTL1PADEN | MV_CAM_GPR_CTL0PADEN |
+		  MV_CAM_GPR_CTL1);
+     
+     MV_REG_BIT_SET(pCam->base + MV_CAM_CONTROL1, MV_CAM_C1_PWRDWN);
+     return MV_OK;
+}
+
+/*******************************************************************************
+* mvCamCtrlDMABuffersSet - Set buffers to the DMA of the Camera Controller
+*
+* DESCRIPTION:
+* 
+* INPUT:
+*       Pointer to Camera Cafe Controller Data structure
+*	array of DMA buffer address
+*       number of buffers
+*
+* OUTPUT:
+*		None
+* RETURN:
+*    MV_BAD_PTR: if data structure not allocated or have bad external field   
+*    MV_BAD_PARAM: if number of buffers in not 2 or 3.
+*    MV_ERROR: if DMA is active	
+*    MV_OK otherwise	
+*******************************************************************************/
+MV_STATUS mvCamCtrlDMABufferSet(MV_CAM_CONTROLLER *pCam, MV_U32 dmaAddress[], 
+				MV_U32 numberOfBuffers)
+{
+     if(!pCam || !pCam->mvCamFrameCompleted)
+     {
+	  mvOsPrintf("mvCamCtrlDMABufferSet: Bad Input\n");
+	  return MV_BAD_PTR;
+     }
+
+     if((numberOfBuffers != 2) && (numberOfBuffers != 3))
+     {
+	  mvOsPrintf("mvCamCtrlDMABufferSet: bad DMA buffers numbers %d\n",
+	       numberOfBuffers);
+	  return MV_BAD_PARAM;
+     }
+     pCam->numberOfBuffers = numberOfBuffers;
+
+     pCam->dmaBuffer[0] = dmaAddress[0];
+     pCam->dmaBuffer[1] = dmaAddress[1];
+     if(numberOfBuffers == 3)
+	  pCam->dmaBuffer[2] = dmaAddress[2];
+
+     MV_REG_WRITE(pCam->base + MV_CAM_Y0_BASE,  pCam->dmaBuffer[0]); 
+     MV_REG_WRITE(pCam->base + MV_CAM_Y1_BASE,  pCam->dmaBuffer[1]); 
+     if(numberOfBuffers == 3)
+	  MV_REG_WRITE(pCam->base + MV_CAM_Y2_BASE,  pCam->dmaBuffer[2]); 
+
+     return MV_OK;
+}
+
+/*******************************************************************************
+* mvCamCtrlSetDMABurstSizeSet - Configure the DMA burst size of the Camera Controller
+*
+* DESCRIPTION:
+* 
+* INPUT:
+*       Pointer to Camera Cafe Controller Data structure
+*       burst size 
+*
+* OUTPUT:
+*		None
+* RETURN:
+*    MV_BAD_PTR: if data structure not allocated or have bad external field   
+*    MV_BAD_PARAM: bad burst size.
+*    MV_BUSY: if DMA is active	
+*    MV_OK otherwise	
+*******************************************************************************/
+MV_STATUS mvCamCtrlDMABurstSizeSet(MV_CAM_CONTROLLER *pCam, MV_CAM_BURST_SIZE size)
+{
+     MV_U32	burstSel;
+     MV_U32	reg;
+     if(!pCam || !pCam->mvCamFrameCompleted)
+     {
+	  mvOsPrintf("mvCamCtrlDMABurstSizeSet: Bad Input\n");
+	  return MV_BAD_PTR;
+     }
+     
+     switch (size)
+     {
+     case MV_CAM_BURST_SIZE_16:
+ 	  burstSel = 1;
+	  break;
+     case MV_CAM_BURST_SIZE_32:
+ 	  burstSel = 0;
+	  break;
+     case MV_CAM_BURST_SIZE_64:
+ 	  burstSel = 2;
+	  break;
+     default:
+	  mvOsPrintf("mvCamCtrlDMABurstSizeSet: Bad size\n");
+	  return MV_BAD_PARAM;
+     }
+     
+     reg = MV_REG_READ(pCam->base + MV_CAM_CONTROL1); 
+     reg &= ~MV_CAM_C1_DMABRSTSEL_MASK;
+     reg |= burstSel;
+     MV_REG_WRITE(pCam->base + MV_CAM_CONTROL1, reg);
+     return MV_OK;
+}
+
+/*******************************************************************************
+* mvCamCtrlDMAStart - enabel the Camera DMA
+*
+* DESCRIPTION:
+* 
+* INPUT:
+*       Pointer to Camera Cafe Controller Data structure
+*
+* OUTPUT:
+*		None
+* RETURN:
+*    MV_ERROR: if the controller was not initialized properly
+*    MV_BUSY: if DMA is already active	
+*    MV_OK otherwise	
+*******************************************************************************/
+MV_STATUS mvCamCtrlDMAStart(MV_CAM_CONTROLLER *pCam)
+{
+     if(!pCam || !pCam->mvCamFrameCompleted)
+     {
+	  mvOsPrintf("mvCamDMACtrl: Bad Input\n");
+	  return MV_BAD_PTR;
+     }
+
+     MV_REG_BIT_SET(pCam->base + MV_CAM_CONTROL0, MV_CAM_C0_ENABLE);
+     return MV_OK;
+}
+
+/*******************************************************************************
+* mvCamCtrlDMAStop - disabel the Camera DMA
+*
+* DESCRIPTION:
+* 
+* INPUT:
+*       Pointer to Camera Cafe Controller Data structure
+*
+* OUTPUT:
+*		None
+* RETURN:
+*    MV_ERROR: if the controller was not initialized properly
+*    MV_OK otherwise	
+*******************************************************************************/
+MV_STATUS mvCamCtrlDMAStop(MV_CAM_CONTROLLER *pCam)
+{
+     if(!pCam || !pCam->mvCamFrameCompleted)
+     {
+	  mvOsPrintf("mvCamCtrlDMAStop: Bad Input\n");
+	  return MV_BAD_PTR;
+     }
+     
+     MV_REG_BIT_RESET(pCam->base + MV_CAM_CONTROL0, MV_CAM_C0_ENABLE);
+     return MV_OK;
+}
+/*******************************************************************************
+* mvCamCtrlImageFormatSet - Set Image Input pixel format
+*
+* DESCRIPTION:
+*	Configure the input pixel format
+* INPUT:
+*       Pointer to Camera Controller Data structure.
+*	Pointer to requested input MV_PIX_FORMAT
+*	Pointer to requested output MV_PIX_FORMAT
+*
+* OUTPUT:
+*
+* RETURN:
+*    MV_NOT_SUPPORTED: requested format not supported
+*    MV_ERROR: if the controller was not initialized properly
+*    MV_BUSY: if DMA is active	
+*    MV_OK otherwise
+*******************************************************************************/
+MV_STATUS mvCamCtrlImageFormatSet(MV_CAM_CONTROLLER *pCam, MV_PIXEL_FORMAT *inFormat,
+				  MV_PIXEL_FORMAT *outFormat)
+{
+     MV_U32 reg;
+     if(!pCam || !pCam->mvCamFrameCompleted || !inFormat || !outFormat)
+     {
+	  mvOsPrintf("mvCamCtrlImageFormatSet: Bad Input\n");
+	  return MV_BAD_PTR;
+     }
+     
+     if(inFormat->id != outFormat->id)
+     {
+/*	  if((inFormat->id != MV_PIX_FORMAT_ID_YUV422) && 
+	  (outFormat->id != MV_PIX_FORMAT_ID_YUV420))*/
+	       mvOsPrintf("mvCamCtrlImageFormatSet: in/out formats doesn't match\n");
+	  return MV_NOT_SUPPORTED;
+     }
+	  
+
+     reg = MV_REG_READ(pCam->base + MV_CAM_CONTROL0);
+     reg &= ~0x3FFFC;
+
+     switch(inFormat->id)
+     {
+     case MV_PIX_FORMAT_ID_RGB444:
+	  reg |= MV_CAM_C0_RGB444_ORD | MV_CAM_C0_RGB444 | MV_CAM_C0_RGB;
+	  break;
+     case MV_PIX_FORMAT_ID_RGB555:
+	  reg |= MV_CAM_C0_RGB555_ORD | MV_CAM_C0_RGB555 | MV_CAM_C0_RGB;
+	  break;
+     case MV_PIX_FORMAT_ID_RGB565:
+	  reg |= MV_CAM_C0_RGB565_ORD | MV_CAM_C0_RGB565 | MV_CAM_C0_RGB;	       
+	  break;
+     case MV_PIX_FORMAT_ID_RAW_BAYER:
+	  reg |= MV_CAM_C0_RAW;	       
+	  break;
+     case MV_PIX_FORMAT_ID_YUV422:
+/*	  if(outFormat->id == MV_PIX_FORMAT_ID_YUV420)
+	       reg |= MV_CAM_C0_YUV422_ENDIANESS | MV_CAM_C0_YUV_FMT_PACKED |
+		    MV_CAM_C0_YUV;
+		    else*/
+	  reg |= MV_CAM_C0_YUV422_ENDIANESS | MV_CAM_C0_YUV_FMT_PACKED |
+	       MV_CAM_C0_YUV;
+	  break;
+     default:
+	  mvOsPrintf("mvCamCtrlImageFormatSet: not supported input format\n");
+	  return MV_NOT_SUPPORTED;
+     }
+     MV_REG_WRITE(pCam->base + MV_CAM_CONTROL0, reg | BIT15);
+     return MV_OK;
+}
+
+/*******************************************************************************
+* mvCamCtrlImageSizeSet - Set size if the image frame
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       Pointer to Camera Controller Data structure.
+*	vsize - height 
+*	hsize - wedth
+*
+* OUTPUT:
+*
+* RETURN:
+*    MV_NOT_SUPPORTED: requested format not supported
+*    MV_ERROR: if the controller was not initialized properly
+*    MV_BUSY: if DMA is active	
+*    MV_OK otherwise
+*******************************************************************************/
+MV_STATUS mvCamCtrlImageSizeSet(MV_CAM_CONTROLLER *pCam, MV_U32 vsize, MV_U32 hsize)
+{
+     MV_U32 reg;
+     if(!pCam || !pCam->mvCamFrameCompleted)
+     {
+	  mvOsPrintf("mvCamCtrlImageSizeSet: Bad Input\n");
+	  return MV_BAD_PTR;
+     }
+
+     
+     reg = ((vsize << MV_CAM_IMAGE_SIZE_V_OFFSET) & MV_CAM_IMAGE_SIZE_V_MASK) |
+	  (hsize & MV_CAM_IMAGE_SIZE_H_MASK);
+     
+     MV_REG_WRITE(pCam->base + MV_CAM_IMAGE_SIZE, reg);
+     MV_REG_WRITE(pCam->base + MV_CAM_IMAGE_OFFSET, 0);
+
+     MV_REG_WRITE(pCam->base + MV_CAM_IMAGE_PITCH, hsize);
+     return MV_OK;
+}
+
+/*******************************************************************************
+* mvCamCtrlSetParam - Generic function for setting controller parameter
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       Pointer to Camera controller Data structure.
+*       param type
+*	param value:
+*	MV_CICC_PARAM_ 
+*
+*
+* OUTPUT:
+*
+* RETURN:
+*    MV_ERROR: I2C failure
+*    MV_NOT_SUPPORTED: requested parameter not supported
+*    MV_BUSY: if DMA is active	
+*    MV_OK otherwise
+*******************************************************************************/
+/*MV_VOID mvCamCtrlSetImageParam(MV_CAM_SENSOR *, MV_IMAGE_PARAM param,MV_U32 value);*/
+
+
+
+/*******************************************************************************
+* mvCamCtrlISR -Interrupt service routine
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       Pointer to Camera Controller Data structure.
+*
+* OUTPUT:
+*
+* RETURN:
+*    MV_ERROR: if the controller was not initialized properly
+*    MV_NOT_FOUND: no interrupt found
+*    MV_OK otherwise
+*******************************************************************************/
+MV_STATUS mvCamCtrlISR(MV_CAM_CONTROLLER *pCam)
+{
+     MV_U32 status;
+     int i;
+
+     if(!pCam || !pCam->mvCamFrameCompleted)
+     {
+	  mvOsPrintf("mvCamCtrlISR: Bad Input\n");
+	  return MV_BAD_PTR;
+     }
+     
+     status = MV_REG_READ(pCam->base + MV_CAM_IRQ_STATUS);
+
+     if((status & 0x7) == 0)
+	  return MV_NOT_FOUND;
+
+     if(status & MV_CAM_IRQ_FIFO_FULL)
+     {
+	  mvOsPrintf("mvCamCtrlISR: FIFO FULL Error\n");
+	  return MV_ERROR;
+     }
+
+     if(status & MV_CAM_IRQ_TWSI_ERROR)
+     {
+	  mvOsPrintf("mvCamCtrlISR: TWSI Error\n");
+	  return MV_ERROR;
+     }
+
+     MV_REG_WRITE(pCam->base + MV_CAM_IRQ_STATUS, 0xFFFFFFFF);
+     for ( i = 0; i < 3; i++)
+     {
+	  if(status & MV_CAM_IRQ_EOF(i))
+	       pCam->mvCamFrameCompleted(pCam->mvCamFrameCompletionHandler, i);
+     }
+     return MV_OK;
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/camera/mvCamControllerRegs.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/camera/mvCamControllerRegs.h
@@ -0,0 +1,170 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+#ifndef __INCMVCamControllerRegsH
+#define __INCMVCamControllerRegsH
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "mvSysCamConfig.h"
+
+#define MV_CAM_Y0_BASE		0x4000
+#define MV_CAM_Y1_BASE		0x4004
+#define MV_CAM_Y2_BASE		0x4008
+#define MV_CAM_U0_BASE		0x400C
+#define MV_CAM_U1_BASE		0x4010
+#define MV_CAM_U2_BASE		0x4014
+#define MV_CAM_V0_BASE		0x4018
+#define MV_CAM_V1_BASE		0x401C
+#define MV_CAM_V2_BASE		0x4020
+
+#define MV_CAM_IRQ_RAW_STATUS	0x4028	/* IRQ RAW Status */
+#define  MV_CAM_IRQ_EOF(i)		(1 << (i))
+#define  MV_CAM_IRQ_SOF(i)		(8 << (i))
+#define  MV_CAM_IRQ_FIFO_FULL	(1 << 6)
+#define  MV_CAM_IRQ_TWSI_WRITE 	(1 << 16)
+#define  MV_CAM_IRQ_TWSI_READ 	(1 << 17)
+#define  MV_CAM_IRQ_TWSI_ERROR 	(1 << 18)
+
+#define MV_CAM_IRQ_MASK		0x402c
+#define MV_CAM_IRQ_STATUS	0x4030
+
+#define MV_CAM_IMAGE_PITCH	0x4024
+
+#define MV_CAM_IMAGE_SIZE	0x4034
+#define  MV_CAM_IMAGE_SIZE_V_MASK	  0x1fff0000
+#define  MV_CAM_IMAGE_SIZE_V_OFFSET	  16
+#define	 MV_CAM_IMAGE_SIZE_H_MASK	  0x00003fff
+#define MV_CAM_IMAGE_OFFSET	0x4038
+
+#define MV_CAM_CONTROL0		0x403c
+#define  MV_CAM_C0_ENABLE	0x1
+#define  MV_CAM_C0_RGB		0xA0
+#define  MV_CAM_C0_YUV		0x0
+#define  MV_CAM_C0_RAW		0x140
+#define  MV_CAM_C0_RGB444	0x800
+#define  MV_CAM_C0_RGB555	0x200
+#define  MV_CAM_C0_RGB565	0x0
+#define  MV_CAM_C0_RGB444_ORD	0x4
+#define  MV_CAM_C0_RGB555_ORD	0xC
+#define  MV_CAM_C0_RGB565_ORD	0xC
+#define  MV_CAM_C0_YUV_FMT_PACKED  0x0
+#define  MV_CAM_C0_YUV422_ENDIANESS 0x0
+
+
+#define MV_CAM_CONTROL1		0x4040
+#define  MV_CAM_C1_PWRDWN	(1 << 28)  /* Power down */
+#define  MV_CAM_C1_DMABRSTSEL_MASK	(3 << 25)
+
+#define MV_CAM_CLKCTRL		0x4088	/* Clock control */
+
+#define MV_CAM_GPR		0x40B4	/* General Purpose */
+#define  MV_CAM_GPR_CTL0	1
+#define  MV_CAM_GPR_CTL1	(1 << 1)
+#define  MV_CAM_GPR_CTL0PADEN	(1 << 4)
+#define  MV_CAM_GPR_CTL1PADEN	(1 << 5)
+
+#define MV_CAM_TWSI0		0x40B8
+#define  MV_CAM_TWSI0_EN	1
+#define  MV_CAM_TWSI0_MODE	(1 << 1)
+#define  MV_CAM_TWSI0_CLKDIV    (x << 10)
+#define  MV_CAM_TWSI0_RDSTP	(1 << 23)
+
+#define MV_CAM_TWSI1		0x40BC
+#define MV_CAM_TWSI1_READ	(1 << 24)
+#define MV_CAM_TWSI1_WRITE	(1 << 25)
+#define MV_CAM_TWSI1_VALID	(1 << 26)
+#define MV_CAM_TWSI1_ERROR	(1 << 27)
+
+/* Address decoding register.	*/
+#define MV_CAM_SDIO_MAX_ADDR_DECODE_WIN 4
+
+#define MV_CAM_SDIO_WIN_CTRL_REG(win)        (MV_CAM_SDIO_REGS_OFFSET + 0x8030 + ((win)<<4))
+#define MV_CAM_SDIO_WIN_BASE_REG(win)        (MV_CAM_SDIO_REGS_OFFSET + 0x8034 + ((win)<<4))
+
+/* BITs in Windows 0-3 Control and Base Registers */
+#define MV_CAM_SDIO_WIN_ENABLE_BIT               0
+#define MV_CAM_SDIO_WIN_ENABLE_MASK              (1<<MV_CAM_SDIO_WIN_ENABLE_BIT)
+
+#define MV_CAM_SDIO_WIN_TARGET_OFFSET            4
+#define MV_CAM_SDIO_WIN_TARGET_MASK              (0xF<<MV_CAM_SDIO_WIN_TARGET_OFFSET)
+
+#define MV_CAM_SDIO_WIN_ATTR_OFFSET              8
+#define MV_CAM_SDIO_WIN_ATTR_MASK                (0xFF<<MV_CAM_SDIO_WIN_ATTR_OFFSET)
+
+#define MV_CAM_SDIO_WIN_SIZE_OFFSET              16
+#define MV_CAM_SDIO_WIN_SIZE_MASK                (0xFFFF<<MV_CAM_SDIO_WIN_SIZE_OFFSET)
+
+#define MV_CAM_SDIO_WIN_BASE_OFFSET              16
+#define MV_CAM_SDIO_WIN_BASE_MASK                (0xFFFF<<MV_CAM_SDIO_WIN_BASE_OFFSET)
+#define MV_CAM_SDIO_WIN_SIZE_ALIGN              _64K
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* __INCMVCamControllerRegsH */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/camera/mvCompVer.txt
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/camera/mvCompVer.txt
@@ -0,0 +1,4 @@
+Global HAL Version: DOVE_HAL_3_1_2
+Unit HAL Version: 1.0.2
+Description: This component includes an implementation of the unit HAL drivers
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/camera/mvCamSensor.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/camera/mvCamSensor.h
@@ -0,0 +1,304 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+#ifndef __INCmvCamSensorh
+#define __INCmvCamSensorh
+/*
+ * Generic API for Camera Sensor devices.
+ */ 
+    
+/* includes */
+#ifdef __cplusplus
+    extern "C" { 
+#endif
+
+/* those function provided by the upper layer, used to read/write one byte registers */ 
+typedef MV_STATUS (* mvSensorI2CRead_t) (MV_VOID *I2CClient, MV_U8 addr, MV_U8 *val);
+typedef MV_STATUS (* mvSensorI2CWrite_t) (MV_VOID *I2CClient, MV_U8 addr, MV_U8 val);
+
+/*
+ * MV_CAM_SENSOR: Camera Sensor data structure handler
+ *
+ */
+typedef struct {
+     /* These field must be initialized by the upper layer before calling 
+	mvCamSensorInit */
+     MV_VOID *I2CClient; /* handler for i2c client, sensor driver pass it
+			    to the mvSensorI2CRead/mvSensorI2CWrite functions */
+//     mvSensorI2CRead_t mvSensorI2CRead; 
+//     mvSensorI2CWrite_t mvSensorI2CWrite;
+     MV_U32	inputClk; /* input clk rate in MHz*/
+
+     /* internal fields, upper layer should not access these fields*/
+     MV_VOID	*pInfo; /* private info*/
+} MV_CAM_SENSOR;
+
+typedef enum
+{
+     MV_IMAGE_PARAM_RATE,
+     MV_IMAGE_PARAM_BRIGHTNESS,
+     MV_IMAGE_PARAM_CONTRAST,
+     MV_IMAGE_PARAM_SATURATION,
+     MV_IMAGE_PARAM_HUE,
+     MV_IMAGE_PARAM_VFLIP,
+     MV_IMAGE_PARAM_HFLIP,
+} MV_IMAGE_PARAM;
+
+/*******************************************************************************
+* mvCamSensorInit - Initialize the Camera Sensor
+*
+* DESCRIPTION:
+*	this function does the following:
+* 1. Initializes the internal fields of the data stucture.
+* 2. initialize the sensor and loads default values.
+* 3. checks if the senser id match the support device
+*
+* INPUT:
+*       Pointer to Camera Sensor Data structure, this sturcture must be allocated
+*       by callee.
+* OUTPUT:
+*		None
+* RETURN:
+*    MV_BAD_PTR: if data structure not allocated or have bad external field   
+*    MV_FAIL: failed to allocate memory 
+*    MV_NOT_FOUND: if sensor id doesn't match
+*    MV_ERROR: I2C failure transaction failure or if the senser reports failure
+*    MV_OK otherwise	
+*******************************************************************************/
+MV_STATUS mvCamSensorInit(MV_CAM_SENSOR *pCamSensor);
+
+
+/*******************************************************************************
+* mvCamSensorReset - request from Camera Sensor to reset itself
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       Pointer to Camera Sensor Data structure.
+*
+* OUTPUT:
+*	None
+* RETURN:
+*    MV_BAD_PTR: if Sensor data structure is invalid 
+*    MV_ERROR: I2C failure
+*    MV_ERROR: if senser reports failure
+*    MV_OK otherwise	
+*******************************************************************************/
+MV_STATUS mvCamSensorReset(MV_CAM_SENSOR *pCamSensor);
+
+/*******************************************************************************
+* mvCamSensorImageFormatSet - Set Image format (pixel format and resolution)
+*
+* DESCRIPTION:
+*	Configure the Sensor with pixel format and resolution
+* INPUT:
+*       Pointer to Camera Sensor Data structure.
+*	Pointer to requested MV_IMAGE_FORMAT
+*
+* OUTPUT:
+*
+* RETURN:
+*    MV_BAD_PTR: if Sensor data structure is invalid 
+*    MV_ERROR: I2C failure
+*    MV_NOT_SUPPORTED: requested format not supported
+*    MV_OK otherwise
+*******************************************************************************/
+MV_STATUS mvCamSensorImageFormatSet(MV_CAM_SENSOR *pCamSensor, MV_IMAGE_FORMAT *pFormat);
+
+/*******************************************************************************
+* mvCamSensorImageFormatGet - Get Image format (pixel format and resolution)
+*
+* DESCRIPTION:
+*	get the current image format pixel format and resolution
+* INPUT:
+*       Pointer to Camera Sensor Data structure.
+*
+* OUTPUT:
+*	Pointer to MV_IMAGE_FORMAT
+*
+* RETURN:
+*    MV_BAD_PTR: if Sensor data structure is invalid 
+*    MV_ERROR: I2C failure
+*    MV_OK otherwise
+*******************************************************************************/
+MV_STATUS mvCamSensorImageFormatGet(MV_CAM_SENSOR *pCamSensor, MV_IMAGE_FORMAT *pFormat);
+
+/*******************************************************************************
+* mvCamSensorPixelSizeGet - Get the Pixel size in bytes
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       Pointer to Camera Sensor Data structure.
+*
+* OUTPUT:
+*	pixelSize - Pointer to store the pixel size
+*
+* RETURN:
+*    MV_BAD_PTR: if data structure not allocated or invalid output pointers
+*    MV_OK otherwise
+*******************************************************************************/
+MV_STATUS mvCamSensorPixelSizeGet(MV_CAM_SENSOR *pCamSensor, MV_U32 *pixelSize);
+
+/*******************************************************************************
+* mvCamSensorTestPatternConfig - test pattern configuration
+*
+* DESCRIPTION:
+*	Enable/Disable given test pattern
+* INPUT:
+*       Pointer to Camera Sensor Data structure.
+*	indext of the test pattern to config.
+*	0 - Overlay Color Bar
+*	1 - DSP Color Bar 1
+*	2 - Bit Shift
+*	enable/disable flag.
+*
+* OUTPUT:
+*	None
+*
+* RETURN:
+*    MV_BAD_PTR: if data structure not allocated
+*    MV_BAD_PARAM: if pattern not supported
+*    MV_ERROR: I2C failure
+*    MV_OK otherwise
+*******************************************************************************/
+MV_STATUS mvCamSensorTestPatternConfig(MV_CAM_SENSOR *pCamSensor, MV_U32 pattern,
+				       MV_BOOL enable);
+
+/*******************************************************************************
+* mvCamSensorImageParamRangeGet - Generic function for getting image parameter range
+*c
+* DESCRIPTION:
+*
+* INPUT:
+*       Pointer to Camera Sensor Data structure.
+*       image param type
+*
+* OUTPUT:
+*	param range min value
+*	param range max value
+*	param range step
+*
+* RETURN:
+*    MV_ERROR: I2C failure
+*    MV_NOT_SUPPORTED: requested parameter not supported
+*    MV_OK otherwise
+*******************************************************************************/
+MV_STATUS mvCamSensorImageParamRangeGet(MV_CAM_SENSOR *pCamSensor, MV_IMAGE_PARAM param,
+					MV_U32 *min, MV_U32 *max, MV_U32 *step);
+
+/*******************************************************************************
+* mvCamSensorImageParamSet - Generic function for setting image parameter
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       Pointer to Camera Sensor Data structure.
+*       image param type
+*	param value:
+*	MV_IMAGE_PARAM_RATE: value is the frames per second rate
+*       MV_IMAGE_PARAM_BRIGHTNESS: value is the image brightness
+*       MV_IMAGE_PARAM_CONTRAST
+*       MV_IMAGE_PARAM_SATURATION
+*       MV_IMAGE_PARAM_HUE
+*       MV_IMAGE_PARAM_VFLIP: 1 enable vflop. 0 disable
+*       MV_IMAGE_PARAM_HFLIP: 1 enable hflop. 0 disable
+*
+* OUTPUT:
+*
+* RETURN:
+*    MV_BAD_PTR: if data structure not allocated
+*    MV_NOT_SUPPORTED: requested parameter not supported
+*    MV_BAD_PARAM: invalid parameter
+*    MV_BAD_VALUE: invalid parameter value
+*    MV_ERROR: I2C failure
+*    MV_OK otherwise
+*******************************************************************************/
+MV_STATUS mvCamSensorImageParamSet(MV_CAM_SENSOR *pCamSensor, MV_IMAGE_PARAM param,
+				   MV_U32 value);
+
+/*******************************************************************************
+* mvCamSensorImageParamGet - Generic function for getting image parameter
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       Pointer to Camera Sensor Data structure.
+*       image param type
+*
+* OUTPUT:
+*	param value
+* RETURN:
+*    MV_ERROR: I2C failure
+*    MV_NOT_SUPPORTED: requested parameter not supported
+*    MV_OK otherwise
+*******************************************************************************/
+MV_STATUS mvCamSensorImageParamGet(MV_CAM_SENSOR *pCamSensor, MV_IMAGE_PARAM param,
+				   MV_U32 *value);
+
+#ifdef __cplusplus
+    }
+#endif
+
+#endif /* __INCmvCamSensorh*/
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/camera/mvCamAddrDec.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/camera/mvCamAddrDec.c
@@ -0,0 +1,348 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvCamControllerRegs.h"
+#include "mvCamController.h"
+
+MV_TARGET CamSDIOAddrDecPrioTab[] =
+{
+#if defined(MV_INCLUDE_SDRAM_CS0)
+    SDRAM_CS0,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS1)
+    SDRAM_CS1,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS2)
+    SDRAM_CS2,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS3)
+    SDRAM_CS3,
+#endif
+#if defined(MV_INCLUDE_PEX)
+    PEX0_MEM,
+#endif
+    TBL_TERM
+};
+
+
+/*******************************************************************************
+* CamSDIOWinOverlapDetect - Detect CAM_SDIO address windows overlapping
+*
+* DESCRIPTION:
+*       An unpredicted behaviur is expected in case CAM_SDIO address decode 
+*       windows overlapps.
+*       This function detects CAM_SDIO address decode windows overlapping of a 
+*       specified window. The function does not check the window itself for 
+*       overlapping. The function also skipps disabled address decode windows.
+*
+* INPUT:
+*       winNum      - address decode window number.
+*       pAddrDecWin - An address decode window struct.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE if the given address window overlap current address
+*       decode map, MV_FALSE otherwise, MV_ERROR if reading invalid data 
+*       from registers.
+*
+*******************************************************************************/
+static MV_STATUS CamSDIOWinOverlapDetect(MV_U32 winNum, 
+					 MV_ADDR_WIN *pAddrWin)
+{
+    MV_U32          	winNumIndex;
+    MV_UNIT_WIN_INFO	addrDecWin;
+
+    for(winNumIndex=0; winNumIndex<MV_CAM_SDIO_MAX_ADDR_DECODE_WIN; winNumIndex++)
+    {
+        /* Do not check window itself       */
+        if (winNumIndex == winNum)
+        {
+            continue;
+        }
+
+        /* Get window parameters    */
+        if (MV_OK != mvCamSDIOWinRead(winNumIndex, &addrDecWin))
+        {
+            mvOsPrintf("%s: ERR. mvCamSDIOWinGet failed\n", __FUNCTION__);
+            return MV_ERROR;
+        }
+
+        /* Do not check disabled windows    */
+        if(addrDecWin.enable == MV_FALSE)
+        {
+            continue;
+        }
+
+        if (MV_TRUE == mvWinOverlapTest(pAddrWin, &(addrDecWin.addrWin)))
+        {
+            return MV_TRUE;
+        }        
+    }
+    return MV_FALSE;
+}
+
+
+/*******************************************************************************
+* mvCamSDIOWinWrite - Set CAM_SDIO target address window
+*
+* DESCRIPTION:
+*       This function sets a peripheral target (e.g. SDRAM bank0, PCI_MEM0) 
+*       address window, also known as address decode window. 
+*       After setting this target window, the CAM_SDIO will be able to access the 
+*       target within the address window. 
+*
+* INPUT:
+*       winNum      - CAM_SDIO target address decode window number.
+*       pAddrDecWin - CAM_SDIO target window data structure.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_ERROR if address window overlapps with other address decode windows.
+*       MV_BAD_PARAM if base address is invalid parameter or target is 
+*       unknown.
+*
+*******************************************************************************/
+MV_STATUS mvCamSDIOWinWrite(MV_U32 winNum, MV_UNIT_WIN_INFO *pAddrDecWin)
+{
+    MV_U32  baseReg, sizeReg;
+    MV_U32  sizeToReg;
+
+    /* Parameter checking   */
+    if (winNum >= MV_CAM_SDIO_MAX_ADDR_DECODE_WIN)
+    {
+        mvOsPrintf("%s: ERR. Invalid win num %d\n",__FUNCTION__, winNum);
+        return MV_BAD_PARAM;
+    }
+    
+    /* Check if the requested window overlapps with current windows         */
+    if (MV_TRUE == CamSDIOWinOverlapDetect(winNum, &pAddrDecWin->addrWin))
+    {
+        mvOsPrintf("%s: ERR. Window %d overlap\n", __FUNCTION__, winNum);
+        return MV_ERROR;
+    }
+
+    if (!MV_IS_POWER_OF_2(pAddrDecWin->addrWin.size))
+    {
+        mvOsPrintf("%s: ERR. Window %d overlap\n", __FUNCTION__, winNum);
+        return MV_BAD_PARAM;
+    }
+
+    /* check if address is aligned to the size */
+    if(MV_IS_NOT_ALIGN(pAddrDecWin->addrWin.baseLow, pAddrDecWin->addrWin.size))
+    {
+	mvOsPrintf("mvCamSDIOWinSet:Error setting CAM_SDIO window %d\n"\
+		   "Address 0x%08x is unaligned to size 0x%x.\n",
+		   winNum,
+		   pAddrDecWin->addrWin.baseLow,
+		   pAddrDecWin->addrWin.size);
+	return MV_ERROR;
+    }
+
+    baseReg = pAddrDecWin->addrWin.baseLow & MV_CAM_SDIO_WIN_BASE_MASK;
+
+    /* set size */
+    sizeToReg = (pAddrDecWin->addrWin.size / MV_CAM_SDIO_WIN_SIZE_ALIGN) - 1;
+    sizeReg = (sizeToReg << MV_CAM_SDIO_WIN_SIZE_OFFSET) & MV_CAM_SDIO_WIN_SIZE_MASK;
+
+    /* set attributes */
+    sizeReg &= ~MV_CAM_SDIO_WIN_ATTR_MASK;
+    sizeReg |= (pAddrDecWin->attrib << MV_CAM_SDIO_WIN_ATTR_OFFSET);
+
+    /* set target ID */
+    sizeReg &= ~MV_CAM_SDIO_WIN_TARGET_MASK;
+    sizeReg |= (pAddrDecWin->targetId << MV_CAM_SDIO_WIN_TARGET_OFFSET);
+
+    if (pAddrDecWin->enable == MV_TRUE)
+    {
+        sizeReg |= MV_CAM_SDIO_WIN_ENABLE_MASK;
+    }
+    else
+    {
+        sizeReg &= ~MV_CAM_SDIO_WIN_ENABLE_MASK;
+    }
+
+    MV_REG_WRITE( MV_CAM_SDIO_WIN_CTRL_REG(winNum), sizeReg);
+    MV_REG_WRITE( MV_CAM_SDIO_WIN_BASE_REG(winNum), baseReg);
+    
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvCamSDIOWinRead - Get CAM_SDIO peripheral target address window.
+*
+* DESCRIPTION:
+*       Get CAM_SDIO peripheral target address window.
+*
+* INPUT:
+*       winNum - CAM_SDIO target address decode window number.
+*
+* OUTPUT:
+*       pAddrDecWin - CAM_SDIO target window data structure.
+*
+* RETURN:
+*       MV_ERROR if register parameters are invalid.
+*
+*******************************************************************************/
+MV_STATUS mvCamSDIOWinRead(MV_U32 winNum, MV_UNIT_WIN_INFO *pAddrDecWin)
+{
+    MV_U32  baseReg, sizeReg;
+    MV_U32  sizeRegVal;
+                                                                                                                         
+    /* Parameter checking   */
+    if (winNum >= MV_CAM_SDIO_MAX_ADDR_DECODE_WIN)
+    {
+        mvOsPrintf("%s : ERR. Invalid winNum %d\n", 
+                    __FUNCTION__, winNum);
+        return MV_NOT_SUPPORTED;
+    }
+
+    baseReg = MV_REG_READ( MV_CAM_SDIO_WIN_BASE_REG(winNum) );
+    sizeReg = MV_REG_READ( MV_CAM_SDIO_WIN_CTRL_REG(winNum) );
+
+    sizeRegVal = (sizeReg & MV_CAM_SDIO_WIN_SIZE_MASK) >> 
+	MV_CAM_SDIO_WIN_SIZE_OFFSET;
+    pAddrDecWin->addrWin.size = (sizeRegVal + 1) * MV_CAM_SDIO_WIN_SIZE_ALIGN;
+
+    /* Extract base address						*/
+    pAddrDecWin->addrWin.baseLow = baseReg & MV_CAM_SDIO_WIN_BASE_MASK;
+    pAddrDecWin->addrWin.baseHigh =  0;
+
+    /* attrib and targetId */
+    pAddrDecWin->attrib = (sizeReg & MV_CAM_SDIO_WIN_ATTR_MASK) >> 
+		MV_CAM_SDIO_WIN_ATTR_OFFSET;
+    pAddrDecWin->targetId = (sizeReg & MV_CAM_SDIO_WIN_TARGET_MASK) >> 
+		MV_CAM_SDIO_WIN_TARGET_OFFSET;
+ 
+    /* Check if window is enabled   */
+    if(sizeReg & MV_CAM_SDIO_WIN_ENABLE_MASK) 
+    {
+        pAddrDecWin->enable = MV_TRUE;
+    }
+    else
+    {
+        pAddrDecWin->enable = MV_FALSE;
+    }
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvCamSDIOWinInit - Initialize the integrated CAM_SDIO target address window.
+*
+* DESCRIPTION:
+*       Initialize the CAM_SDIO peripheral target address window.
+*
+* INPUT:
+*
+*
+* OUTPUT:
+*     
+*
+* RETURN:
+*       MV_ERROR if register parameters are invalid.
+*
+*******************************************************************************/
+MV_STATUS mvCamSDIOWinInit(MV_UNIT_WIN_INFO *addrWinMap)
+{
+    MV_U32		winNum;
+    MV_UNIT_WIN_INFO	*addrDecWin;
+    MV_U32		winPrioIndex = 0;
+
+    /* Initiate CamSDIO address decode */
+
+    /* First disable all address decode windows */
+    for(winNum = 0; winNum < MV_CAM_SDIO_MAX_ADDR_DECODE_WIN; winNum++)
+    {
+        MV_U32  regVal = MV_REG_READ(MV_CAM_SDIO_WIN_CTRL_REG(winNum));
+        regVal &= ~MV_CAM_SDIO_WIN_ENABLE_MASK;
+        MV_REG_WRITE(MV_CAM_SDIO_WIN_CTRL_REG(winNum), regVal);
+    }
+    
+    winNum = 0;
+    while( (CamSDIOAddrDecPrioTab[winPrioIndex] != TBL_TERM) &&
+           (winNum < MV_CAM_SDIO_MAX_ADDR_DECODE_WIN) )
+    {
+	addrDecWin = &addrWinMap[CamSDIOAddrDecPrioTab[winPrioIndex]];
+        if (addrDecWin->enable == MV_TRUE)
+        {
+            if(MV_OK != mvCamSDIOWinWrite(winNum, addrDecWin))
+            {
+                return MV_ERROR;
+            }
+            winNum++;
+        }
+        winPrioIndex++;
+    }
+    return MV_OK;
+}
+
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/camera/OV7680CamSensor.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/camera/OV7680CamSensor.c
@@ -0,0 +1,1124 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+    
+/* includes */
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "mvSysCamSensor.h"
+#include "mvCamSensor.h"
+
+/* defines */
+#define OV_MANUFACTURER_IDH	0x7F
+#define OV_MANUFACTURER_IDL	0xA2
+#define OV_7680_PROD_IDH	0x76
+#define OV_7680_PROD_IDL	0x80
+
+
+#define OV_REG_PIDH	0x0A
+#define OV_REG_PIDL	0x0B
+#define OV_REG_0C	0x0C
+#define OV_REG_12	0x12
+#define OV_REG_MIDH	0x1C
+#define OV_REG_MIDL	0x1D
+#define OV_REG_83	0x83
+#define OV_REG_62	0x62
+#define OV_REG_SDE	0xD5
+#define  OV_SDE_BRIGHTNESS_CONTRAST (1 << 2)
+#define  OV_SDE_SATURATION (1 << 1)
+#define OV_REG_BRIGHTNESS 0xD6
+#define OV_REG_YOFFSET	0xD8
+#define OV_REG_USAT	0xDB
+#define OV_REG_VSAT	0xDC
+#define OV_REG_SGNSET	0xDF
+
+#define OV_7680_RATE	30
+
+typedef struct
+{
+     MV_PIXEL_FORMAT * pixFormat;
+     MV_VIDEO_RESOLUTION *resolution;
+}OV7680_INFO;
+
+/* supported formats*/
+
+MV_PIXEL_FORMAT supportedFormats[] = 
+{
+     MV_PIXEL_FORMAT_YUV422, /*item 0 must be the default*/
+     MV_PIXEL_FORMAT_RGB444,
+     MV_PIXEL_FORMAT_RGB555,
+     MV_PIXEL_FORMAT_RGB565,
+     MV_PIXEL_FORMAT_RAW_BAYER,
+};
+
+MV_VIDEO_RESOLUTION supportedResolutions[] =
+{
+     MV_VIDEO_RESOLUTION_VGA, /*item 0 must be the default*/
+     MV_VIDEO_RESOLUTION_QVGA,
+     MV_VIDEO_RESOLUTION_CIF,
+     MV_VIDEO_RESOLUTION_QCIF,
+};
+
+typedef struct
+{
+     MV_U8	addr;
+     MV_U8	value;
+} sensorReg_t;
+sensorReg_t ov7680_default_settings[] =
+{
+//     Initial (VGA YUV 30FPS)
+//88 0f 1D
+//88 fe 01
+//88 f1 04
+//88 f0 41
+
+//     {0x12, 0x80},
+     {0x1e, 0x91},   
+     {0x14, 0xb2},// ;c2
+     {0x63, 0x0b},   
+     {0x64, 0x0f},   
+     {0x65, 0x07},
+     {0x12, 0x01},
+     {0x0c, 0x06},
+     {0x82, 0x9A},  
+     {0x22, 0x40},
+     {0x23, 0x20},
+     {0x31, 0x11},
+     {0x40, 0x20},// ;10
+     {0x4a, 0x42},
+     {0x4b, 0x42},// ;64
+     {0x67, 0x50},
+     {0x6b, 0x00},
+     {0x6c, 0x00},
+     {0x6d, 0x00},
+     {0x6e, 0x00},
+
+     {0x42, 0x4a},   
+     {0x45, 0x40},   
+     {0x3f, 0x46},   
+     {0x48, 0x20},   
+     {0x21, 0x23},   
+     {0x5a, 0x10},   
+     {0x5c, 0xe0},  
+     {0x27, 0x33},  
+     {0x4d, 0x2d},// ;1d  
+     {0x42, 0x4a},
+     {0x4e, 0x54},// ;IO2.8v
+
+     {0x65, 0x87},
+     {0x66, 0x02},   
+     {0x67, 0x5c},
+
+     {0x32, 0x40},
+     {0x33, 0x00},
+     {0x34, 0x40},
+     {0x35, 0x20},
+     {0x36, 0x40},
+     {0x37, 0x40},
+     {0x2f, 0x0c},
+     {0x30, 0x10},  
+     {0x38, 0x84}, 
+     {0x31, 0x0e},
+     
+     
+     {0x55, 0x86},
+     {0x58, 0x83},
+     {0x13, 0xef},
+     {0x38, 0x84},
+     {0x59, 0x0e},
+     {0x5f, 0x20},
+     {0x56, 0x40},
+     {0x51, 0x00},
+     {0x57, 0x22},
+     {0x59, 0x07},
+     {0x5f, 0xa3},
+     {0x59, 0x08},
+     {0x5f, 0x54},
+     {0x52, 0x30},
+     {0x56, 0x29},
+     {0x53, 0x20},
+     {0x54, 0x30},
+     {0x59, 0x00},
+     {0x5f, 0xf0},
+     {0x59, 0x01},
+     {0x5f, 0xF0},
+     {0x59, 0x0F},
+     {0x5f, 0x20},
+     {0x5f, 0x00},
+     {0x59, 0x10},
+     {0x5f, 0x7E},
+     {0x59, 0x0A},
+     {0x5f, 0x80},
+     {0x59, 0x0B},
+     {0x5f, 0x01},
+     {0x59, 0x0C},
+     {0x5f, 0x07},
+     {0x5f, 0x0F},
+     {0x59, 0x0D},
+     {0x5f, 0x20},
+     {0x59, 0x09},
+     {0x5f, 0x30},
+     {0x59, 0x02},
+     {0x5f, 0x80},
+     {0x59, 0x03},
+     {0x5f, 0x60},
+     {0x59, 0x04},
+     {0x5f, 0xF0},
+     {0x59, 0x05},
+     {0x5f, 0x80},
+     {0x59, 0x06},
+     {0x5f, 0x04},
+     {0x59, 0x26},
+     {0x59, 0x0b},
+     {0x5f, 0x31},
+     {0x55, 0xa8},
+     
+     {0x27, 0xb3},
+     {0x40, 0x23},
+     {0x4d, 0x2d},//1d
+     
+     {0x12, 0x00},//YUV
+     {0x0c, 0x16},
+     {0x82, 0x98},
+     {0x3e, 0x30},
+     {0x81, 0x06},
+     
+     
+     {0xb7, 0x98},
+     {0xb8, 0x98},
+     {0xb9, 0x00},
+     {0xba, 0x28},
+     {0xbb, 0x70},
+     {0xbc, 0x98},
+     {0xbd, 0x5a},
+     {0xbe, 0xb0},
+     {0xbf, 0x9d},
+     {0xc0, 0x13},
+     {0xc1, 0x16},
+     {0xc2, 0x7b},
+     {0xc3, 0x91},
+     {0xc4, 0x1e},
+     {0xc5, 0x9d},
+     {0xc6, 0x9a},
+     {0xc7, 0x03},
+     {0xc8, 0x2e},
+     {0xc9, 0x91},
+     {0xca, 0xbf},
+     {0xcb, 0x1e},
+     
+     {0xa0, 0x0e},
+     {0xa1, 0x1a},
+     {0xa2, 0x31},
+     {0xa3, 0x5a},
+     {0xa4, 0x69},
+     {0xa5, 0x75},
+     {0xa6, 0x7e},
+     {0xa7, 0x88},
+     {0xa8, 0x8f},
+     {0xa9, 0x96},
+     {0xaa, 0xa3},
+     {0xab, 0xaf},
+     {0xac, 0xc4},
+     {0xad, 0xd7},
+     {0xae, 0xe8},
+     {0xaf, 0x20},
+     
+     {0x89, 0x5c},
+     {0x8a, 0x11},
+     {0x8b, 0x92},
+     {0x8c, 0x11},
+     {0x8d, 0x52},
+     {0x96, 0xff},
+     {0x97, 0x00},
+     {0x9c, 0xf0},
+     {0x9d, 0xf0},
+     {0x9e, 0xf0},
+     
+     {0xb2, 0x06},
+     {0xb3, 0x03},
+     {0xb4, 0x05},
+     {0xb5, 0x04},
+     {0xb6, 0x02},//;03 
+
+     {0xd5, 0x02},
+     {0xdb, 0x40},
+     {0xdc, 0x40},
+     
+     {0x11, 0x00},//;30fps
+     {0x24, 0x6c},
+     {0x25, 0x62},
+     {0x26, 0xb3},
+     
+     {0x5a, 0x14},
+     {0x5b, 0xe3},
+     {0x5c, 0x70},
+     {0x5d, 0x30},
+     {0x81, 0x07},
+     
+     {0x84, 0x02},
+     
+//     ;For USB
+//88 0f 1f
+};
+
+static MV_STATUS sensorRegsWrite(MV_CAM_SENSOR *pCamSensor, sensorReg_t *sensorRegs,
+				 int len)
+{
+     int i;
+     MV_STATUS status;
+
+     for(i = 0; i < len; i++)
+     {
+	  status = mvSysCamSensorRegWrite(pCamSensor->I2CClient, sensorRegs[i].addr,
+			  sensorRegs[i].value);
+	  
+	  if(status != MV_OK)
+	  {
+	       mvOsPrintf("sensorRegsWrite: I2C write failed. status %d\n",
+			  status);
+	       return status;
+	  }
+     }
+     return MV_OK;
+}
+
+static MV_STATUS isOV7680(MV_CAM_SENSOR *pCamSensor)
+{
+     MV_U8	reg;
+     MV_STATUS	status;
+
+     status = mvSysCamSensorRegRead(pCamSensor->I2CClient, OV_REG_MIDH, &reg);
+
+     if(status != MV_OK)
+	  return status;
+     
+     if(reg != OV_MANUFACTURER_IDH)
+	  return MV_NOT_FOUND;
+
+     status = mvSysCamSensorRegRead(pCamSensor->I2CClient, OV_REG_MIDL, &reg);
+
+     if(status != MV_OK)
+	  return status;
+     
+     if(reg != OV_MANUFACTURER_IDL)
+	  return MV_NOT_FOUND;
+
+     status = mvSysCamSensorRegRead(pCamSensor->I2CClient, OV_REG_PIDH, &reg);
+
+     if(status != MV_OK)
+	  return status;
+     
+     if(reg != OV_7680_PROD_IDH)
+	  return MV_NOT_FOUND;
+
+     status = mvSysCamSensorRegRead(pCamSensor->I2CClient, OV_REG_PIDL, &reg);
+
+     if(status != MV_OK)
+	  return status;
+     
+     if(reg != OV_7680_PROD_IDL)
+	  return MV_NOT_FOUND;
+
+     return MV_OK;
+}
+
+static MV_STATUS  ovRGB444Set(MV_CAM_SENSOR * pCamSensor)
+{
+     MV_STATUS status =  mvSysCamSensorRegWrite(pCamSensor->I2CClient,
+		     OV_REG_12, 0xE);
+     return status;
+}
+
+static MV_STATUS  ovRGB555Set(MV_CAM_SENSOR * pCamSensor)
+{
+     MV_STATUS status =  mvSysCamSensorRegWrite(pCamSensor->I2CClient,
+		     OV_REG_12, 0xA);
+     return status;
+}
+
+static MV_STATUS  ovRGB565Set(MV_CAM_SENSOR * pCamSensor)
+{
+     MV_STATUS status = mvSysCamSensorRegWrite(pCamSensor->I2CClient,
+		     OV_REG_12, 0x6);
+     return status;
+}
+
+static MV_STATUS ovYUV422Set(MV_CAM_SENSOR * pCamSensor)
+{
+     MV_STATUS status =  mvSysCamSensorRegWrite(pCamSensor->I2CClient,
+		     OV_REG_12, 0);
+     return status;
+}
+
+static MV_STATUS ovRawBayerSet(MV_CAM_SENSOR * pCamSensor)
+{
+     MV_STATUS status = mvSysCamSensorRegWrite(pCamSensor->I2CClient,
+		     OV_REG_12, 0x1);
+     return status;
+}
+
+static MV_STATUS configPixelFormat(MV_CAM_SENSOR *pCamSensor, int formatIdx)
+{
+     OV7680_INFO *pInfo = (OV7680_INFO *)pCamSensor->pInfo;
+
+     /* if the new format the same as the current format*/
+     if(pInfo->pixFormat->id == supportedFormats[formatIdx].id)
+	  return MV_OK;
+     
+     pInfo->pixFormat = supportedFormats + formatIdx;
+
+     switch(pInfo->pixFormat->id)
+     {
+     case MV_PIX_FORMAT_ID_RGB444:
+	  return ovRGB444Set(pCamSensor);
+     case MV_PIX_FORMAT_ID_RGB555:
+	  return ovRGB555Set(pCamSensor);
+     case MV_PIX_FORMAT_ID_RGB565:
+	  return ovRGB565Set(pCamSensor);
+     case MV_PIX_FORMAT_ID_YUV422:
+	  return ovYUV422Set(pCamSensor);
+     case MV_PIX_FORMAT_ID_RAW_BAYER:
+	  return ovRawBayerSet(pCamSensor);
+     default:
+	  mvOsOutput("configPixelFormat: fatal error: unkown format id (0x%x)\n",
+		     pInfo->pixFormat->id);
+	  return MV_NOT_SUPPORTED;
+     }
+     return MV_OK;
+}
+
+static MV_STATUS configResolution(MV_CAM_SENSOR * pCamSensor, int resIdx)
+{
+     OV7680_INFO *pInfo = (OV7680_INFO *)pCamSensor->pInfo;
+
+     /* if the new resolution the same as the current*/
+     if((pInfo->resolution->height == supportedResolutions[resIdx].height) &&
+	(pInfo->resolution->width == supportedResolutions[resIdx].width))
+	  return MV_OK;
+     
+     mvOsOutput("configResolution: fatal error: unkown resolution (%s)\n",
+		supportedResolutions[resIdx].name);
+
+     return MV_NOT_SUPPORTED;
+}
+
+static MV_STATUS resetSensor(MV_CAM_SENSOR *pCamSensor)
+{
+     MV_STATUS status = mvSysCamSensorRegWrite(pCamSensor->I2CClient,
+		     OV_REG_12, 1 << 7);
+     mvOsDelay(2);
+     return status;
+}
+static MV_U32 getBitsPerPixel(MV_CAM_SENSOR *pCamSensor)
+{
+     OV7680_INFO *pInfo = (OV7680_INFO *)pCamSensor->pInfo;
+
+     switch(pInfo->pixFormat->id)
+     {
+     case MV_PIX_FORMAT_ID_RAW_BAYER:
+	  return 1;
+     default:
+	  return 2;
+     }
+     /*never reached*/
+     return 0;
+}
+
+static MV_STATUS enableSDEFeature(MV_CAM_SENSOR *pCamSensor, MV_U8 OV_SDE_BIT)
+{
+     MV_U8 reg;
+     MV_STATUS status;
+     status = mvSysCamSensorRegRead(pCamSensor->I2CClient, OV_REG_SDE, &reg);
+     if(status != MV_OK)
+	  return MV_ERROR;
+     
+     reg |= OV_SDE_BIT;
+          
+     return mvSysCamSensorRegWrite(pCamSensor->I2CClient, OV_REG_SDE, reg);
+}
+/*----------------------------------API---------------------------------------*/
+
+/*******************************************************************************
+* mvCamSensorInit - Initialize the Camera Sensor
+*
+* DESCRIPTION:
+*	this function does the following:
+* 1. Initializes the internal fields of the data stucture.
+* 2. initialize the sensor and loads default values.
+* 3. checks if the senser id match the support device
+*
+* INPUT:
+*       Pointer to Camera Sensor Data structure, this sturcture must be allocated
+*       by callee.
+* OUTPUT:
+*		None
+* RETURN:
+*    MV_BAD_PTR: if data structure not allocated or have bad external field   
+*    MV_FAIL: failed to allocate memory 
+*    MV_NOT_FOUND: if sensor id doesn't match
+*    MV_ERROR: I2C failure transaction failure or if the senser reports failure
+*    MV_OK otherwise	
+*******************************************************************************/
+MV_STATUS mvCamSensorInit(MV_CAM_SENSOR *pCamSensor)
+{
+     OV7680_INFO *pInfo;
+     mvOsOutput("mvCamSensorInit\n");
+     
+     if(!pCamSensor)
+     {
+	  mvOsPrintf("mvCamSensorInit: Bad Input\n");
+	  return MV_BAD_PTR;
+     }
+
+     pInfo = mvOsMalloc(sizeof(OV7680_INFO));
+     pCamSensor->pInfo = pInfo;
+     if(!pCamSensor->pInfo)
+     {
+	  mvOsPrintf("mvCamSensorInit: failed to allocate memory\n");
+	  return MV_FAIL;
+     }
+     
+     pInfo->pixFormat = supportedFormats;
+     pInfo->resolution = supportedResolutions;
+     
+     /* reset  */
+     if (resetSensor(pCamSensor) != MV_OK)
+     {
+	  mvOsPrintf("mvCamSensorInit: sensor reset failed\n");
+	  return MV_ERROR;
+     }
+
+     /*load defaults*/
+     if(sensorRegsWrite(pCamSensor, ov7680_default_settings, 
+			sizeof(ov7680_default_settings)/sizeof(sensorReg_t)) != MV_OK){
+	  mvOsPrintf("mvCamSensorInit: sensor default registers loading failed\n");
+	  return MV_ERROR;
+     }
+     
+     return isOV7680(pCamSensor);
+}
+
+
+/*******************************************************************************
+* mvCamSensorReset - request from Camera Sensor to reset itself
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       Pointer to Camera Sensor Data structure.
+*
+* OUTPUT:
+*	None
+* RETURN:
+*    MV_BAD_PTR: if Sensor data structure is invalid 
+*    MV_ERROR: I2C failure
+*    MV_ERROR: if senser reports failure
+*    MV_OK otherwise	
+*******************************************************************************/
+MV_STATUS mvCamSensorReset(MV_CAM_SENSOR *pCamSensor)
+{
+     mvOsOutput("mvCamSensorReset\n");
+     
+     if(!pCamSensor)
+     {
+	  mvOsPrintf("mvCamSensorReset: Bad Input\n");
+	  return MV_BAD_PTR;
+     }
+     return resetSensor(pCamSensor);
+}
+
+/*******************************************************************************
+* mvCamSensorImageFormatSet - Set Image format (pixel format and resolution)
+*
+* DESCRIPTION:
+*	Configure the Sensor with pixel format and resolution
+* INPUT:
+*       Pointer to Camera Sensor Data structure.
+*	Pointer to requested MV_IMAGE_FORMAT
+*
+* OUTPUT:
+*
+* RETURN:
+*    MV_BAD_PTR: if Sensor data structure is invalid 
+*    MV_ERROR: I2C failure
+*    MV_NOT_SUPPORTED: requested format not supported
+*    MV_OK otherwise
+*******************************************************************************/
+MV_STATUS mvCamSensorImageFormatSet(MV_CAM_SENSOR *pCamSensor, MV_IMAGE_FORMAT *pFormat)
+{
+     int fmt;
+     int res;
+     MV_STATUS status;
+
+     mvOsPrintf("mvCamSensorImageFormatSet\n");
+     
+     if(!pCamSensor)
+     {
+	  mvOsPrintf("mvCamSensorImageFormatSet: Bad Input\n");
+	  return MV_BAD_PTR;
+     }
+     for (fmt = 0; fmt < sizeof(supportedFormats)/sizeof(supportedFormats[0]); fmt++)
+	  if(pFormat->pixelFormat.id == supportedFormats[fmt].id)
+	       break;
+
+     if(fmt >= (sizeof(supportedFormats)/sizeof(supportedFormats[0])))
+     {
+	  mvOsPrintf("mvCamSensorImageFormatSet: unsupported pixel format %s\n",
+	       pFormat->pixelFormat.name);
+	  return MV_NOT_SUPPORTED;
+     }
+
+     for (res = 0; res < sizeof(supportedResolutions)/sizeof(supportedResolutions[0]);
+	  res++)
+	  if((pFormat->resolution.height == supportedResolutions[res].height) &&
+	     (pFormat->resolution.width == supportedResolutions[res].width))
+	       break;
+     
+     if(res >= (sizeof(supportedResolutions)/sizeof(supportedResolutions[0])))
+     {
+	  mvOsPrintf("mvCamSensorImageFormatSet: unsupported resolution %s\n",
+		     pFormat->resolution.name);
+	  return MV_NOT_SUPPORTED;
+     }
+     status = configPixelFormat(pCamSensor, fmt);
+     if(status != MV_OK)
+     {
+	  return status;
+     }
+     return configResolution(pCamSensor, res);
+}
+
+/*******************************************************************************
+* mvCamSensorImageFormatGet - Get Image format (pixel format and resolution)
+*
+* DESCRIPTION:
+*	get the current image format pixel format and resolution
+* INPUT:
+*       Pointer to Camera Sensor Data structure.
+*
+* OUTPUT:
+*	Pointer to MV_IMAGE_FORMAT
+*
+* RETURN:
+*    MV_BAD_PTR: if Sensor data structure is invalid 
+*    MV_ERROR: I2C failure
+*    MV_OK otherwise
+*******************************************************************************/
+MV_STATUS mvCamSensorImageFormatGet(MV_CAM_SENSOR *pCamSensor, MV_IMAGE_FORMAT *pFormat)
+{
+     OV7680_INFO *pInfo;
+
+     mvOsPrintf("mvCamSensorImageFormatGet\n");
+     
+     if(!pCamSensor || !pFormat)
+     {
+	  mvOsPrintf("mvCamSensorImageFormatGet: Bad Input\n");
+	  return MV_BAD_PTR;
+     }
+     pInfo = (OV7680_INFO *)pCamSensor->pInfo;
+
+     pFormat->pixelFormat.id = pInfo->pixFormat->id;
+     pFormat->pixelFormat.name = pInfo->pixFormat->name;
+     pFormat->resolution.width = pInfo->resolution->width;
+     pFormat->resolution.height = pInfo->resolution->height;
+     pFormat->resolution.name = pInfo->resolution->name;
+     return MV_OK;
+}
+
+/*******************************************************************************
+* mvCamSensorPixelSizeGet - Get the Pixel size in bytes
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       Pointer to Camera Sensor Data structure.
+*
+* OUTPUT:
+*	pixelSize - Pointer to store the pixel size
+*
+* RETURN:
+*    MV_BAD_PTR: if data structure not allocated or invalid output pointers
+*    MV_OK otherwise
+*******************************************************************************/
+MV_STATUS mvCamSensorPixelSizeGet(MV_CAM_SENSOR *pCamSensor, MV_U32 *pixelSize)
+{
+     mvOsPrintf("mvCamSensorPixelSizeGet\n");
+     
+     if(!pCamSensor || !pixelSize)
+     {
+	  mvOsPrintf("mvCamSensorPixelSizeGet: Bad Input\n");
+	  return MV_BAD_PTR;
+     }
+
+     *pixelSize = getBitsPerPixel(pCamSensor);
+     return MV_OK;
+}
+
+/*******************************************************************************
+* mvCamSensorTestPatternConfig - test pattern configuration
+*
+* DESCRIPTION:
+*	Enable/Disable given test pattern
+* INPUT:
+*       Pointer to Camera Sensor Data structure.
+*	indext of the test pattern to config.
+*	0 - Overlay Color Bar
+*	1 - DSP Color Bar 1
+*	2 - Bit Shift
+*	enable/disable flag.
+*
+* OUTPUT:
+*	None
+*
+* RETURN:
+*    MV_BAD_PTR: if data structure not allocated
+*    MV_BAD_PARAM: if pattern not supported
+*    MV_ERROR: I2C failure
+*    MV_OK otherwise
+*******************************************************************************/
+MV_STATUS mvCamSensorTestPatternConfig(MV_CAM_SENSOR *pCamSensor, MV_U32 pattern,
+				       MV_BOOL enable)
+{
+     MV_U8	reg;
+     MV_STATUS	status = MV_ERROR;
+
+     mvOsPrintf("mvCamSensorTestPatternConfig\n");
+     
+     if(!pCamSensor)
+     {
+	  mvOsPrintf("mvCamSensorTestPatternConfig: Bad Input\n");
+	  return MV_BAD_PTR;
+     }
+
+     switch(pattern)
+     {
+     case 0:
+	  status = mvSysCamSensorRegRead(pCamSensor->I2CClient, OV_REG_0C, &reg);
+	  if(status != MV_OK)
+	       return MV_ERROR;
+	  
+	  if(enable)
+	       reg |= 1;
+	  else
+	       reg &= ~1;
+	  
+	  status = mvSysCamSensorRegWrite(pCamSensor->I2CClient, OV_REG_0C, reg);
+	  break;
+     case 1:
+	  status = mvSysCamSensorRegRead(pCamSensor->I2CClient, OV_REG_83, &reg);
+	  if(status != MV_OK)
+	       return MV_ERROR;
+	  
+	  if(enable)
+	       reg |= 1;
+	  else
+	       reg &= ~1;
+	  
+	  status = mvSysCamSensorRegWrite(pCamSensor->I2CClient, OV_REG_83, reg);
+	  break;
+     case 2:
+	  status = mvSysCamSensorRegRead(pCamSensor->I2CClient, OV_REG_62, &reg);
+ 	  if(status != MV_OK)
+	       return MV_ERROR;
+	  
+	  if(enable)
+	       reg |= (1 << 7) | (1 << 5);
+	  else
+	       reg &= ~((1 << 7) | (1 << 5));
+	  
+	  status = mvSysCamSensorRegWrite(pCamSensor->I2CClient, OV_REG_62, reg);
+	  break;
+     default:
+  	  mvOsPrintf("mvCamSensorTestPatternConfig: unsupported test pattern (%d)\n",
+	       pattern);
+	  return MV_BAD_PARAM;
+     }
+     return status;
+}
+/*******************************************************************************
+* mvCamSensorImageParamRangeGet - Generic function for getting image parameter range
+*c
+* DESCRIPTION:
+*
+* INPUT:
+*       Pointer to Camera Sensor Data structure.
+*       image param type
+*
+* OUTPUT:
+*	param range min value
+*	param range max value
+*	param range step
+*
+* RETURN:
+*    MV_ERROR: I2C failure
+*    MV_NOT_SUPPORTED: requested parameter not supported
+*    MV_OK otherwise
+*******************************************************************************/
+MV_STATUS mvCamSensorImageParamRangeGet(MV_CAM_SENSOR *pCamSensor, MV_IMAGE_PARAM param,
+					MV_U32 *min, MV_U32 *max, MV_U32 *step)
+{
+     MV_STATUS  status = MV_OK;
+
+     if(!pCamSensor || !min || !max || !step)
+     {
+	  mvOsPrintf("mvCamSensorImageParamRangeGet: Bad Input\n");
+	  return MV_BAD_PTR;
+     }
+
+     switch (param)
+     {
+     case MV_IMAGE_PARAM_RATE:
+	  *min = OV_7680_RATE;
+	  *max = OV_7680_RATE;
+	  *step = 0;
+	  break;
+     case MV_IMAGE_PARAM_BRIGHTNESS:
+	  *min = 0;
+	  *max = 512;
+	  *step = 1;
+	  break;
+     case MV_IMAGE_PARAM_CONTRAST:
+	  *min = 0;
+	  *max = 512;
+	  *step = 1;
+	  break;
+     case MV_IMAGE_PARAM_SATURATION:
+	  *min = 0;
+	  *max = 256;
+	  *step = 0;
+	  break;
+     case MV_IMAGE_PARAM_VFLIP:
+     case MV_IMAGE_PARAM_HFLIP:
+	  *min = 0;
+	  *max = 1;
+	  *step = 1;
+	  break;
+     case MV_IMAGE_PARAM_HUE:
+	  mvOsPrintf("mvCamSensorImageParamRangeGet: not supported param\n");
+	  status = MV_NOT_SUPPORTED;
+	  break;
+     default:
+	  mvOsPrintf("mvCamSensorImageParamGet: Invalid param\n");
+	  status = MV_BAD_PARAM;
+     }
+     return status;
+}
+
+/*******************************************************************************
+* mvCamSensorImageParamSet - Generic function for setting image parameter
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       Pointer to Camera Sensor Data structure.
+*       image param type
+*	param value:
+*	MV_IMAGE_PARAM_RATE: value is the frames per second rate
+*       MV_IMAGE_PARAM_BRIGHTNESS: value is the image brightness
+*       MV_IMAGE_PARAM_CONTRAST
+*       MV_IMAGE_PARAM_SATURATION
+*       MV_IMAGE_PARAM_HUE
+*       MV_IMAGE_PARAM_VFLIP: 1 enable vflop. 0 disable
+*       MV_IMAGE_PARAM_HFLIP: 1 enable hflop. 0 disable
+*
+* OUTPUT:
+*
+* RETURN:
+*    MV_BAD_PTR: if data structure not allocated
+*    MV_NOT_SUPPORTED: requested parameter not supported
+*    MV_BAD_PARAM: invalid parameter
+*    MV_BAD_VALUE: invalid parameter value
+*    MV_ERROR: I2C failure
+*    MV_OK otherwise
+*******************************************************************************/
+MV_STATUS mvCamSensorImageParamSet(MV_CAM_SENSOR *pCamSensor, MV_IMAGE_PARAM param,
+				   MV_U32 value)
+{
+     MV_STATUS  status = MV_OK;
+     MV_U8	reg;
+     int	sign;
+
+     if(!pCamSensor)
+     {
+	  mvOsPrintf("mvCamSensorImageParamSet: Bad Input\n");
+	  return MV_BAD_PTR;
+     }
+
+     switch (param)
+     {
+     case MV_IMAGE_PARAM_RATE:
+	  if(value != OV_7680_RATE)
+	       status = MV_BAD_VALUE;
+	  break;
+     case MV_IMAGE_PARAM_BRIGHTNESS:
+	  status = MV_ERROR;
+	  if(MV_OK != enableSDEFeature(pCamSensor, OV_SDE_BRIGHTNESS_CONTRAST))
+	       break;
+	  if((value > 512) || (value < 0))
+	  {
+	       status = MV_BAD_VALUE;
+	       break;
+	  }
+	  else if(value > 256)
+	  {
+	       reg = value & 0xFF;
+	       sign = 0;
+	  }
+	  else
+	  {
+	       reg = 256 - value;
+	       sign = 1;
+	  }
+	  
+	  if(MV_OK != mvSysCamSensorRegWrite(pCamSensor->I2CClient, OV_REG_BRIGHTNESS, reg))
+	       break;
+	  
+	  /*set sign*/
+	  if(MV_OK != mvSysCamSensorRegRead(pCamSensor->I2CClient, OV_REG_SGNSET, &reg))
+	       break;
+
+	  reg &= ~1;
+	  if(sign)
+	       reg |= (1 << 3);
+
+	  if(MV_OK != mvSysCamSensorRegWrite(pCamSensor->I2CClient,
+				  OV_REG_SGNSET, reg))
+	       break;
+	  status = MV_OK;
+	  break;
+     case MV_IMAGE_PARAM_CONTRAST:
+	  status = MV_ERROR;
+	  if(MV_OK != enableSDEFeature(pCamSensor, OV_SDE_BRIGHTNESS_CONTRAST))
+	       break;
+
+	  if((value > 512) || (value < 0))
+	  {
+	       status = MV_BAD_VALUE;
+	       break;
+	  }
+	  else if(value > 256)
+	  {
+	       reg = value & 0xFF;
+	       sign = 0;
+	  }
+	  else
+	  {
+	       reg = 256 - value;
+	       sign = 1;
+	  }
+	  
+	  if(MV_OK != mvSysCamSensorRegWrite(pCamSensor->I2CClient,
+				  OV_REG_YOFFSET, reg))
+	       break;
+	  
+	  /*set sign*/
+	  if(MV_OK != mvSysCamSensorRegRead(pCamSensor->I2CClient,
+				  OV_REG_SGNSET, &reg))
+	       break;
+
+	  reg &= ~1;
+	  if(sign)
+	       reg |= (1 << 2);
+
+	  if(MV_OK != mvSysCamSensorRegWrite(pCamSensor->I2CClient,
+				  OV_REG_SGNSET, reg))
+	       break;
+	  status = MV_OK;
+	  break;
+     case MV_IMAGE_PARAM_SATURATION:
+	  status = MV_ERROR;
+	  if(MV_OK != enableSDEFeature(pCamSensor, OV_SDE_SATURATION))
+	       break;
+	  
+	  if((value > 256) || (value < 0))
+	  {
+	       status = MV_BAD_VALUE;
+	       break;
+	  }
+	  reg = value & 0xFF;
+	  if(MV_OK != mvSysCamSensorRegWrite(pCamSensor->I2CClient,
+				  OV_REG_VSAT, reg))
+	       break;
+	  
+	  if(MV_OK != mvSysCamSensorRegWrite(pCamSensor->I2CClient,
+				  OV_REG_USAT, reg))
+	       break;
+	  status = MV_OK;
+	  break;
+
+     case MV_IMAGE_PARAM_VFLIP:
+	  status = MV_ERROR;
+	  if((value != 0) || (value != 1))
+	  {
+	       status = MV_BAD_VALUE;
+	       break;
+	  }
+
+	  if(MV_OK != mvSysCamSensorRegRead(pCamSensor->I2CClient,
+				  OV_REG_0C, &reg))
+	       break;
+
+	  if(value)
+	       reg |= (1 << 7);
+	  else
+	       reg &= ~(1 << 7);
+	  
+	  if(MV_OK != mvSysCamSensorRegWrite(pCamSensor->I2CClient,
+				  OV_REG_0C, reg))
+	       break;
+
+	  status = MV_OK;
+	  break;
+
+     case MV_IMAGE_PARAM_HFLIP:
+	  status = MV_ERROR;
+	  if((value != 0) || (value != 1))
+	  {
+	       status = MV_BAD_VALUE;
+	       break;
+	  }
+
+	  if(MV_OK != mvSysCamSensorRegRead(pCamSensor->I2CClient,
+				  OV_REG_0C, &reg))
+	       break;
+
+	  if(value)
+	       reg |= (1 << 6);
+	  else
+	       reg &= ~(1 << 6);
+	  
+	  if(MV_OK != mvSysCamSensorRegWrite(pCamSensor->I2CClient,
+				  OV_REG_0C, reg))
+	       break;
+
+	  status = MV_OK;
+	  break;
+     case MV_IMAGE_PARAM_HUE:
+	  mvOsPrintf("mvCamSensorImageParamSet: not supported param\n");
+	  status = MV_NOT_SUPPORTED;
+	  break;
+     default:
+	  mvOsPrintf("mvCamSensorImageParamSet: Invalid param\n");
+	  status = MV_BAD_PARAM;
+     }
+     return status;
+}
+
+/*******************************************************************************
+* mvCamSensorImageParamGet - Generic function for getting image parameter
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       Pointer to Camera Sensor Data structure.
+*       image param type
+*
+* OUTPUT:
+*	param value
+* RETURN:
+*    MV_ERROR: I2C failure
+*    MV_NOT_SUPPORTED: requested parameter not supported
+*    MV_OK otherwise
+*******************************************************************************/
+MV_STATUS mvCamSensorImageParamGet(MV_CAM_SENSOR *pCamSensor, MV_IMAGE_PARAM param,
+				   MV_U32 *value)
+{
+     MV_STATUS  status = MV_OK;
+     MV_U8	reg;
+
+     if(!pCamSensor || !value)
+     {
+	  mvOsPrintf("mvCamSensorImageParamGet: Bad Input\n");
+	  return MV_BAD_PTR;
+     }
+
+     switch (param)
+     {
+     case MV_IMAGE_PARAM_RATE:
+	  *value = OV_7680_RATE;
+	  break;
+     case MV_IMAGE_PARAM_SATURATION:
+	  status = MV_ERROR;
+	  if(MV_OK != mvSysCamSensorRegRead(pCamSensor->I2CClient,
+				  OV_REG_VSAT, &reg))
+	       break;
+	  
+	  *value = reg;
+	  status = MV_OK;
+	  break;
+
+     case MV_IMAGE_PARAM_BRIGHTNESS:
+     case MV_IMAGE_PARAM_CONTRAST:
+     case MV_IMAGE_PARAM_HUE:
+     case MV_IMAGE_PARAM_VFLIP:
+     case MV_IMAGE_PARAM_HFLIP:
+	  mvOsPrintf("mvCamSensorImageParamGet: not supported param\n");
+	  status = MV_NOT_SUPPORTED;
+	  break;
+     default:
+	  mvOsPrintf("mvCamSensorImageParamGet: Invalid param\n");
+	  status = MV_BAD_PARAM;
+     }
+     return status;
+
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/gpp/mvGpp.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/gpp/mvGpp.c
@@ -0,0 +1,363 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvSysGppConfig.h"
+#include "mvGppRegs.h"
+#include "mvGpp.h"
+
+/* defines  */       
+#ifdef MV_DEBUG         
+	#define DB(x)	x
+#else                
+	#define DB(x)    
+#endif	             
+
+static MV_VOID gppRegSet(MV_U32 group, MV_U32 regOffs,MV_U32 mask,MV_U32 value);
+
+/*******************************************************************************
+* mvGppTypeSet - Enable a GPP (OUT) pin
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       group - GPP group number
+*       mask  - 32bit mask value. Each set bit in the mask means that the type
+*               of corresponding GPP will be set. Other GPPs are ignored.
+*       value - 32bit value that describes GPP type per pin.
+*
+* OUTPUT:
+*       None.
+*
+* EXAMPLE:
+*       Set GPP8 to input and GPP15 to output.
+*       mvGppTypeSet(0, (GPP8 | GPP15), 
+*                    ((MV_GPP_IN & GPP8) | (MV_GPP_OUT & GPP15)) );
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_STATUS mvGppTypeSet(MV_U32 group, MV_U32 mask, MV_U32 value)
+{
+	if (group >= MV_GPP_MAX_GROUP)
+	{
+		DB(mvOsPrintf("mvGppTypeSet: ERR. invalid group number \n"));
+		return MV_BAD_PARAM;
+	}
+
+	gppRegSet(group, GPP_DATA_OUT_EN_REG(group), mask, value);
+
+	return MV_OK;
+
+}
+
+/*******************************************************************************
+* mvGppBlinkEn - Set a GPP (IN) Pin list to blink every ~100ms
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       group - GPP group number
+*       mask  - 32bit mask value. Each set bit in the mask means that the type
+*               of corresponding GPP will be set. Other GPPs are ignored.
+*       value - 32bit value that describes GPP blink per pin.
+*
+* OUTPUT:
+*       None.
+*
+* EXAMPLE:
+*       Set GPP8 to be static and GPP15 to be blinking.
+*       mvGppBlinkEn(0, (GPP8 | GPP15), 
+*                    ((MV_GPP_OUT_STATIC & GPP8) | (MV_GPP_OUT_BLINK & GPP15)) );
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_STATUS mvGppBlinkEn(MV_U32 group, MV_U32 mask, MV_U32 value)
+{
+	if (group >= MV_GPP_MAX_GROUP)
+	{
+		DB(mvOsPrintf("mvGppBlinkEn: ERR. invalid group number \n"));
+		return MV_BAD_PARAM;
+	}
+
+	gppRegSet(group, GPP_BLINK_EN_REG(group), mask, value);
+
+	return MV_OK;
+
+}
+/*******************************************************************************
+* mvGppPolaritySet - Set a GPP (IN) Pin list Polarity mode
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       group - GPP group number
+*       mask  - 32bit mask value. Each set bit in the mask means that the type
+*               of corresponding GPP will be set. Other GPPs are ignored.
+*       value - 32bit value that describes GPP polarity per pin.
+*
+* OUTPUT:
+*       None.
+*
+* EXAMPLE:
+*       Set GPP8 to the actual pin value and GPP15 to be inverted.
+*       mvGppPolaritySet(0, (GPP8 | GPP15), 
+*                    ((MV_GPP_IN_ORIGIN & GPP8) | (MV_GPP_IN_INVERT & GPP15)) );
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_STATUS mvGppPolaritySet(MV_U32 group, MV_U32 mask, MV_U32 value)
+{
+	if (group >= MV_GPP_MAX_GROUP)
+	{
+		DB(mvOsPrintf("mvGppPolaritySet: ERR. invalid group number \n"));
+		return MV_BAD_PARAM;
+	}
+
+	gppRegSet(group, GPP_DATA_IN_POL_REG(group), mask, value);
+
+	return MV_OK;
+
+}
+
+/*******************************************************************************
+* mvGppPolarityGet - Get a value of relevant bits from GPP Polarity register.
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       group - GPP group number
+*       mask  - 32bit mask value. Each set bit in the mask means that the 
+*               returned value is valid for it.
+*
+* OUTPUT:
+*       None.
+*
+* EXAMPLE:
+*       Get GPP8 and GPP15 value.
+*       mvGppPolarityGet(0, (GPP8 | GPP15));
+*
+* RETURN:
+*       32bit value that describes GPP polatity mode per pin.
+*
+*******************************************************************************/
+MV_U32  mvGppPolarityGet(MV_U32 group, MV_U32 mask)
+{
+    MV_U32  regVal;
+
+  	if (group >= MV_GPP_MAX_GROUP)
+	{
+		DB(mvOsPrintf("mvGppActiveSet: Error invalid group number \n"));
+		return MV_ERROR;
+	}
+    regVal = MV_REG_READ(GPP_DATA_IN_POL_REG(group));
+    
+    return (regVal & mask);
+}
+
+/*******************************************************************************
+* mvGppValueGet - Get a GPP Pin list value.
+*
+* DESCRIPTION:
+*       This function get GPP value.
+*
+* INPUT:
+*       group - GPP group number
+*       mask  - 32bit mask value. Each set bit in the mask means that the 
+*               returned value is valid for it.
+*
+* OUTPUT:
+*       None.
+*
+* EXAMPLE:
+*       Get GPP8 and GPP15 value.
+*       mvGppValueGet(0, (GPP8 | GPP15));
+*
+* RETURN:
+*       32bit value that describes GPP activity mode per pin.
+*
+*******************************************************************************/
+MV_U32 mvGppValueGet(MV_U32 group, MV_U32 mask)
+{
+	MV_U32 gppData;
+
+	gppData = MV_REG_READ(GPP_DATA_IN_REG(group));
+
+	gppData &= mask;
+
+	return gppData;
+
+}
+
+/*******************************************************************************
+* mvGppValueSet - Set a GPP Pin list value.
+*
+* DESCRIPTION:
+*       This function set value for given GPP pin list.
+*
+* INPUT:
+*       group - GPP group number
+*       mask  - 32bit mask value. Each set bit in the mask means that the 
+*               value of corresponding GPP will be set accordingly. Other GPP 
+*               are not affected.
+*       value - 32bit value that describes GPP value per pin.
+*
+* OUTPUT:
+*       None.
+*
+* EXAMPLE:
+*       Set GPP8 value of '0' and GPP15 value of '1'.
+*       mvGppActiveSet(0, (GPP8 | GPP15), ((0 & GPP8) | (GPP15)) );
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_STATUS mvGppValueSet (MV_U32 group, MV_U32 mask, MV_U32 value)
+{
+	MV_U32 outEnable;
+	MV_U32 i;
+
+	if (group >= MV_GPP_MAX_GROUP)
+	{
+		DB(mvOsPrintf("mvGppValueSet: Error invalid group number \n"));
+		return MV_BAD_PARAM;
+	}
+
+	/* verify that the gpp pin is configured as output 		*/
+	/* Note that in the register out enabled -> bit = '0'. 	*/
+	outEnable = ~MV_REG_READ(GPP_DATA_OUT_EN_REG(group));
+
+	for (i = 0 ; i < 32 ;i++)
+	{
+		if (((mask & (1 << i)) & (outEnable & (1 << i))) != (mask & (1 << i)))
+		{
+			mvOsPrintf("mvGppValueSet: Err. An attempt to set output "\
+					   "value to GPP %d in input mode.\n", i);
+			return MV_ERROR;
+		}
+	}
+
+	gppRegSet(group, GPP_DATA_OUT_REG(group), mask, value);
+
+	return MV_OK;
+
+}
+
+
+MV_STATUS mvGppFunctionSelectSet(MV_U32 value)
+{
+	MV_REG_WRITE(GPP_FUNC_SELECT_REG, value);
+	return MV_OK;
+}
+
+
+/*******************************************************************************
+* gppRegSet - Set a specific GPP pin on a specific GPP register
+*
+* DESCRIPTION:
+*       This function set a specific GPP pin on a specific GPP register
+*
+* INPUT:
+*		regOffs - GPP Register offset 
+*       group - GPP group number
+*       mask  - 32bit mask value. Each set bit in the mask means that the 
+*               value of corresponding GPP will be set accordingly. Other GPP 
+*               are not affected.
+*       value - 32bit value that describes GPP value per pin.
+*
+* OUTPUT:
+*       None.
+*
+* EXAMPLE:
+*       Set GPP8 value of '0' and GPP15 value of '1'.
+*       mvGppActiveSet(0, (GPP8 | GPP15), ((0 & GPP8) | (1 & GPP15)) );
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+static MV_VOID gppRegSet (MV_U32 group, MV_U32 regOffs,MV_U32 mask,MV_U32 value)
+{
+	MV_U32 gppData;
+
+	gppData = MV_REG_READ(regOffs);
+
+	gppData &= ~mask;
+
+	gppData |= (value & mask);
+
+	MV_REG_WRITE(regOffs, gppData);
+}
+
+
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/gpp/mvGppRegs.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/gpp/mvGppRegs.h
@@ -0,0 +1,130 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCmvGppRegsH
+#define __INCmvGppRegsH
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+#include "mvSysGppConfig.h"
+
+#define    MV_GPP0  BIT0
+#define    MV_GPP1  BIT1
+#define    MV_GPP2  BIT2
+#define    MV_GPP3  BIT3
+#define    MV_GPP4  BIT4
+#define    MV_GPP5  BIT5
+#define    MV_GPP6  BIT6
+#define    MV_GPP7  BIT7
+#define    MV_GPP8  BIT8
+#define    MV_GPP9  BIT9
+#define    MV_GPP10 BIT10
+#define    MV_GPP11 BIT11
+#define    MV_GPP12 BIT12
+#define    MV_GPP13 BIT13
+#define    MV_GPP14 BIT14
+#define    MV_GPP15 BIT15
+#define    MV_GPP16 BIT16
+#define    MV_GPP17 BIT17
+#define    MV_GPP18 BIT18
+#define    MV_GPP19 BIT19
+#define    MV_GPP20 BIT20
+#define    MV_GPP21 BIT21
+#define    MV_GPP22 BIT22
+#define    MV_GPP23 BIT23
+#define    MV_GPP24 BIT24
+#define    MV_GPP25 BIT25
+#define    MV_GPP26 BIT26
+#define    MV_GPP27 BIT27
+#define    MV_GPP28 BIT28
+#define    MV_GPP29 BIT29
+#define    MV_GPP30 BIT30
+#define    MV_GPP31 BIT31
+
+
+/* registers offsets */
+
+#define GPP_DATA_OUT_REG(grp)			(MV_GPP_REGS_BASE(grp) + 0x00)
+#define GPP_DATA_OUT_REG_0			(MV_GPP_REGS_BASE_0 + 0x00)	/* Used in .S files */
+#define GPP_DATA_OUT_EN_REG(grp)		(MV_GPP_REGS_BASE(grp) + 0x04)
+#define GPP_BLINK_EN_REG(grp)			(MV_GPP_REGS_BASE(grp) + 0x08)
+#define GPP_DATA_IN_POL_REG(grp)		(MV_GPP_REGS_BASE(grp) + 0x0C)
+#define GPP_DATA_IN_REG(grp)			(MV_GPP_REGS_BASE(grp) + 0x10)
+#define GPP_INT_CAUSE_REG(grp)			(MV_GPP_REGS_BASE(grp) + 0x14)
+#define GPP_INT_MASK_REG(grp)			(MV_GPP_REGS_BASE(grp) + 0x18)
+#define GPP_INT_LVL_REG(grp)			(MV_GPP_REGS_BASE(grp) + 0x1C)
+
+#define GPP_FUNC_SELECT_REG			(MV_GPP_REGS_BASE(0) + 0x40)
+
+/* Relevant for MV78XX0 */
+#define GPP_DATA_OUT_SET_REG			(MV_GPP_REGS_BASE(0) + 0x20)
+#define GPP_DATA_OUT_CLEAR_REG			(MV_GPP_REGS_BASE(0) + 0x24)
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* #ifndef __INCmvGppRegsH */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/gpp/mvGpp.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/gpp/mvGpp.h
@@ -0,0 +1,125 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCmvGppH
+#define __INCmvGppH
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvSysGppConfig.h"
+
+/* These macros describes the GPP type. Each of the GPPs pins can        	*/
+/* be assigned to act as a general purpose input or output pin.             */
+#define	MV_GPP_IN	0xFFFFFFFF      			/* GPP input   */
+#define MV_GPP_OUT  0    						/* GPP output  */
+
+
+/* These macros describes the GPP Out Enable. */
+#define	MV_GPP_OUT_DIS	0xFFFFFFFF         	/* Out pin disabled*/
+#define MV_GPP_OUT_EN   0    			 	/* Out pin enabled*/
+
+/* These macros describes the GPP Out Blinking. */
+/* When set and the corresponding bit in GPIO Data Out Enable Control 		*/
+/* Register is enabled, the GPIO pin blinks every ~100 ms (a period of		*/
+/* 2^24 TCLK clocks).														*/
+#define	MV_GPP_OUT_BLINK	0xFFFFFFFF         	/* Out pin blinking*/
+#define MV_GPP_OUT_STATIC   0    			 	/* Out pin static*/
+
+
+/* These macros describes the GPP Polarity. */
+/* When set to 1 GPIO Data In Register reflects the inverted value of the	*/
+/* corresponding pin.														*/
+
+#define	MV_GPP_IN_INVERT	0xFFFFFFFF	/* Inverted value is got*/
+#define MV_GPP_IN_ORIGIN	0		/* original value is got*/
+
+/* mvGppTypeSet - Set PP pin mode (IN or OUT) */
+MV_STATUS mvGppTypeSet(MV_U32 group, MV_U32 mask, MV_U32 value);
+
+/* mvGppBlinkEn - Set a GPP (IN) Pin list to blink every ~100ms */
+MV_STATUS mvGppBlinkEn(MV_U32 group, MV_U32 mask, MV_U32 value);
+
+/* mvGppPolaritySet - Set a GPP (IN) Pin list Polarity mode. */
+MV_STATUS mvGppPolaritySet(MV_U32 group, MV_U32 mask, MV_U32 value);
+
+/* mvGppPolarityGet - Get the Polarity of a GPP Pin */
+MV_U32  mvGppPolarityGet(MV_U32 group, MV_U32 mask);
+
+/* mvGppValueGet - Get a GPP Pin list value.*/
+MV_U32 mvGppValueGet(MV_U32 group, MV_U32 mask);
+
+/* mvGppValueSet - Set a GPP Pin list value. */
+MV_STATUS mvGppValueSet (MV_U32 group, MV_U32 mask, MV_U32 value);
+
+MV_STATUS mvGppFunctionSelectSet(MV_U32 value);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* #ifndef __INCmvGppH */ 
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/gpp/mvCompVer.txt
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/gpp/mvCompVer.txt
@@ -0,0 +1,4 @@
+Global HAL Version: DOVE_HAL_3_1_2
+Unit HAL Version: 1.0.2
+Description: This component includes an implementation of the unit HAL drivers
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/xor/mvXorRegs.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/xor/mvXorRegs.h
@@ -0,0 +1,277 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+#ifndef __INCmvXorSpech
+#define __INCmvXorSpech
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "mvSysXorConfig.h"
+/* defines */
+
+/* XOR Engine Control Register Map */
+#define XOR_CHANNEL_ARBITER_REG(unit)       (MV_XOR_REGS_BASE(unit))
+#define XOR_CONFIG_REG(unit,chan)           (MV_XOR_REGS_BASE(unit)+(0x10 + ((chan) * 4)))
+#define XOR_ACTIVATION_REG(unit,chan)       (MV_XOR_REGS_BASE(unit)+(0x20 + ((chan) * 4)))
+                                                                
+/* XOR Engine Interrupt Register Map */                         
+#define XOR_CAUSE_REG(unit)                 (MV_XOR_REGS_BASE(unit)+(0x30))             
+#define XOR_MASK_REG(unit)           	    (MV_XOR_REGS_BASE(unit)+(0x40))             
+#define XOR_ERROR_CAUSE_REG(unit)           (MV_XOR_REGS_BASE(unit)+(0x50))             
+#define XOR_ERROR_ADDR_REG(unit)            (MV_XOR_REGS_BASE(unit)+(0x60))             
+                                                                
+/* XOR Engine Descriptor Register Map */                        
+#define XOR_NEXT_DESC_PTR_REG(unit,chan)    (MV_XOR_REGS_BASE(unit)+(0x200 + ((chan) * 4)))
+#define XOR_CURR_DESC_PTR_REG(unit,chan)    (MV_XOR_REGS_BASE(unit)+(0x210 + ((chan) * 4)))
+#define XOR_BYTE_COUNT_REG(unit,chan)       (MV_XOR_REGS_BASE(unit)+(0x220 + ((chan) * 4)))
+                                                                
+/* XOR Engine ECC/MemInit Register Map */
+#define XOR_DST_PTR_REG(unit,chan)          (MV_XOR_REGS_BASE(unit)+(0x2B0 + ((chan) * 4)))
+#define XOR_BLOCK_SIZE_REG(unit,chan)       (MV_XOR_REGS_BASE(unit)+(0x2C0 + ((chan) * 4)))
+#define XOR_TIMER_MODE_CTRL_REG(unit)       (MV_XOR_REGS_BASE(unit)+(0x2D0))
+#define XOR_TIMER_MODE_INIT_VAL_REG(unit)   (MV_XOR_REGS_BASE(unit)+(0x2D4))
+#define XOR_TIMER_MODE_CURR_VAL_REG(unit)   (MV_XOR_REGS_BASE(unit)+(0x2D8))
+#define XOR_INIT_VAL_LOW_REG(unit)          (MV_XOR_REGS_BASE(unit)+(0x2E0))
+#define XOR_INIT_VAL_HIGH_REG(unit)         (MV_XOR_REGS_BASE(unit)+(0x2E4))
+
+/* XOR Engine Debug Register Map */
+#define XOR_DEBUG_REG(unit)                 (MV_XOR_REGS_BASE(unit)+(0x70))
+
+
+/* XOR register fileds */
+
+
+/* XOR Engine Channel Arbiter Register */
+#define XECAR_SLICE_OFFS(sliceNum)          (sliceNum)
+#define XECAR_SLICE_MASK(sliceNum)          (1 << (XECAR_SLICE_OFFS(sliceNum)))
+
+/* XOR Engine [0..1] Configuration Registers (XExCR) */
+#define XEXCR_OPERATION_MODE_OFFS           (0)
+#define XEXCR_OPERATION_MODE_MASK           (7 << XEXCR_OPERATION_MODE_OFFS)
+#define XEXCR_OPERATION_MODE_XOR            (0 << XEXCR_OPERATION_MODE_OFFS)
+#define XEXCR_OPERATION_MODE_CRC            (1 << XEXCR_OPERATION_MODE_OFFS)
+#define XEXCR_OPERATION_MODE_DMA            (2 << XEXCR_OPERATION_MODE_OFFS)
+#define XEXCR_OPERATION_MODE_ECC            (3 << XEXCR_OPERATION_MODE_OFFS)
+#define XEXCR_OPERATION_MODE_MEM_INIT       (4 << XEXCR_OPERATION_MODE_OFFS)
+
+#define XEXCR_SRC_BURST_LIMIT_OFFS          (4)
+#define XEXCR_SRC_BURST_LIMIT_MASK          (7 << XEXCR_SRC_BURST_LIMIT_OFFS)
+#define XEXCR_DST_BURST_LIMIT_OFFS          (8)
+#define XEXCR_DST_BURST_LIMIT_MASK          (7 << XEXCR_DST_BURST_LIMIT_OFFS)
+#define XEXCR_DRD_RES_SWP_OFFS              (12)
+#define XEXCR_DRD_RES_SWP_MASK              (1 << XEXCR_DRD_RES_SWP_OFFS)
+#define XEXCR_DWR_REQ_SWP_OFFS              (13)
+#define XEXCR_DWR_REQ_SWP_MASK              (1 << XEXCR_DWR_REQ_SWP_OFFS)
+#define XEXCR_DES_SWP_OFFS                  (14)
+#define XEXCR_DES_SWP_MASK                  (1 << XEXCR_DES_SWP_OFFS)
+#define XEXCR_REG_ACC_PROTECT_OFFS          (15)
+#define XEXCR_REG_ACC_PROTECT_MASK          (1 << XEXCR_REG_ACC_PROTECT_OFFS)
+
+
+/* XOR Engine [0..1] Activation Registers (XExACTR) */
+#define XEXACTR_XESTART_OFFS                (0)
+#define XEXACTR_XESTART_MASK                (1 << XEXACTR_XESTART_OFFS)
+#define XEXACTR_XESTOP_OFFS                 (1)
+#define XEXACTR_XESTOP_MASK                 (1 << XEXACTR_XESTOP_OFFS)
+#define XEXACTR_XEPAUSE_OFFS                (2)
+#define XEXACTR_XEPAUSE_MASK                (1 << XEXACTR_XEPAUSE_OFFS)
+#define XEXACTR_XERESTART_OFFS              (3)
+#define XEXACTR_XERESTART_MASK              (1 << XEXACTR_XERESTART_OFFS)
+#define XEXACTR_XESTATUS_OFFS               (4)
+#define XEXACTR_XESTATUS_MASK               (3 << XEXACTR_XESTATUS_OFFS)
+#define XEXACTR_XESTATUS_IDLE               (0 << XEXACTR_XESTATUS_OFFS)
+#define XEXACTR_XESTATUS_ACTIVE             (1 << XEXACTR_XESTATUS_OFFS)
+#define XEXACTR_XESTATUS_PAUSED             (2 << XEXACTR_XESTATUS_OFFS)
+
+/* XOR Engine Interrupt Cause Register (XEICR) */
+#define XEICR_CHAN_OFFS					16
+#define XEICR_CAUSE_OFFS(chan)   		(chan * XEICR_CHAN_OFFS)
+#define XEICR_CAUSE_MASK(chan, cause)   (1 << (cause + XEICR_CAUSE_OFFS(chan)))
+#define XEICR_COMP_MASK_ALL				0x000f000f
+#define XEICR_COMP_MASK(chan)			(0x000f << XEICR_CAUSE_OFFS(chan))
+#define XEICR_ERR_MASK					0x03800380
+
+/* XOR Engine Error Cause Register (XEECR) */
+#define XEECR_ERR_TYPE_OFFS				0
+#define XEECR_ERR_TYPE_MASK				(0x1f << XEECR_ERR_TYPE_OFFS)
+
+/* XOR Engine Error Address Register (XEEAR) */
+#define XEEAR_ERR_ADDR_OFFS                 (0)
+#define XEEAR_ERR_ADDR_MASK                 (0xFFFFFFFF << XEEAR_ERR_ADDR_OFFS)
+
+/* XOR Engine [0..1] Next Descriptor Pointer Register (XExNDPR) */
+#define XEXNDPR_NEXT_DESC_PTR_OFFS          (0)
+#define XEXNDPR_NEXT_DESC_PTR_MASK          (0xFFFFFFFF << XEXNDPR_NEXT_DESC_PTR_OFFS)
+
+/* XOR Engine [0..1] Current Descriptor Pointer Register (XExCDPR) */
+#define XEXCDPR_CURRENT_DESC_PTR_OFFS       (0)
+#define XEXCDPR_CURRENT_DESC_PTR_MASK       (0xFFFFFFFF << XEXCDPR_CURRENT_DESC_PTR_OFFS)
+
+/* XOR Engine [0..1] Byte Count Register (XExBCR) */
+#define XEXBCR_BYTE_CNT_OFFS                (0)
+#define XEXBCR_BYTE_CNT_MASK                (0xFFFFFFFF << XEXBCR_BYTE_CNT_OFFS)
+
+/* XOR Engine [0..1] Destination Pointer Register (XExDPR0) */
+#define XEXDPR_DST_PTR_OFFS                 (0)
+#define XEXDPR_DST_PTR_MASK                 (0xFFFFFFFF << XEXDPR_DST_PTR_OFFS)
+#define XEXDPR_DST_PTR_XOR_MASK             (0x3F)
+#define XEXDPR_DST_PTR_DMA_MASK             (0x1F)
+#define XEXDPR_DST_PTR_CRC_MASK             (0x1F)
+
+/* XOR Engine[0..1] Block Size Registers (XExBSR) */
+#define XEXBSR_BLOCK_SIZE_OFFS              (0)
+#define XEXBSR_BLOCK_SIZE_MASK              (0xFFFFFFFF << XEXBSR_BLOCK_SIZE_OFFS)
+#define XEXBSR_BLOCK_SIZE_MIN_VALUE         (128)
+#define XEXBSR_BLOCK_SIZE_MAX_VALUE         (0xFFFFFFFF)
+
+/* XOR Engine Timer Mode Control Register (XETMCR) */
+#define XETMCR_TIMER_EN_OFFS                (0)
+#define XETMCR_TIMER_EN_MASK                (1 << XETMCR_TIMER_EN_OFFS)
+#define XETMCR_TIMER_EN_ENABLE              (1 << XETMCR_TIMER_EN_OFFS)
+#define XETMCR_TIMER_EN_DISABLE             (0 << XETMCR_TIMER_EN_OFFS)
+#define XETMCR_SECTION_SIZE_CTRL_OFFS       (8)
+#define XETMCR_SECTION_SIZE_CTRL_MASK       (0x1F << XETMCR_SECTION_SIZE_CTRL_OFFS)
+#define XETMCR_SECTION_SIZE_MIN_VALUE       (7)
+#define XETMCR_SECTION_SIZE_MAX_VALUE       (31)
+
+/* XOR Engine Timer Mode Initial Value Register (XETMIVR) */
+#define XETMIVR_TIMER_INIT_VAL_OFFS         (0)
+#define XETMIVR_TIMER_INIT_VAL_MASK         (0xFFFFFFFF << XETMIVR_TIMER_INIT_VAL_OFFS)
+
+/* XOR Engine Timer Mode Current Value Register (XETMCVR) */
+#define XETMCVR_TIMER_CRNT_VAL_OFFS         (0)
+#define XETMCVR_TIMER_CRNT_VAL_MASK         (0xFFFFFFFF << XETMCVR_TIMER_CRNT_VAL_OFFS)
+
+/* XOR Engine Initial Value Register Low (XEIVRL) */
+#define XEIVRL_INIT_VAL_L_OFFS              (0)
+#define XEIVRL_INIT_VAL_L_MASK              (0xFFFFFFFF << XEIVRL_INIT_VAL_L_OFFS)
+
+/* XOR Engine Initial Value Register High (XEIVRH) */
+#define XEIVRH_INIT_VAL_H_OFFS              (0)
+#define XEIVRH_INIT_VAL_H_MASK              (0xFFFFFFFF << XEIVRH_INIT_VAL_H_OFFS)
+
+/* XOR Engine Debug Register (XEDBR) */
+#define XEDBR_PARITY_ERR_INSR_OFFS          (0)
+#define XEDBR_PARITY_ERR_INSR_MASK          (1 << XEDBR_PARITY_ERR_INSR_OFFS)
+#define XEDBR_XBAR_ERR_INSR_OFFS            (1)
+#define XEDBR_XBAR_ERR_INSR_MASK            (1 << XEDBR_XBAR_ERR_INSR_OFFS)
+
+
+/* XOR Engine address decode registers.	*/
+
+#define XOR_MAX_ADDR_DEC_WIN	8	/* Maximum address decode windows		*/
+#define XOR_MAX_REMAP_WIN       4	/* Maximum address arbiter windows		*/
+
+/* XOR Engine Address Decoding Register Map */                  
+#define XOR_WINDOW_CTRL_REG(unit,chan)     (MV_XOR_REGS_BASE(unit)+(0x240 + ((chan) * 4)))
+#define XOR_BASE_ADDR_REG(unit,winNum)     (MV_XOR_REGS_BASE(unit)+(0x250 + ((winNum) * 4)))
+#define XOR_SIZE_MASK_REG(unit,winNum)     (MV_XOR_REGS_BASE(unit)+(0x270 + ((winNum) * 4)))
+#define XOR_HIGH_ADDR_REMAP_REG(unit,winNum) (MV_XOR_REGS_BASE(unit)+(0x290 + ((winNum) * 4)))
+
+/* XOR Engine [0..1] Window Control Registers (XExWCR) */
+#define XEXWCR_WIN_EN_OFFS(winNum)          (winNum)
+#define XEXWCR_WIN_EN_MASK(winNum)          (1 << (XEXWCR_WIN_EN_OFFS(winNum)))
+#define XEXWCR_WIN_EN_ENABLE(winNum)        (1 << (XEXWCR_WIN_EN_OFFS(winNum)))
+#define XEXWCR_WIN_EN_DISABLE(winNum)       (0 << (XEXWCR_WIN_EN_OFFS(winNum)))
+
+#define XEXWCR_WIN_ACC_OFFS(winNum)         ((2 * winNum) + 16)
+#define XEXWCR_WIN_ACC_MASK(winNum)         (3 << (XEXWCR_WIN_ACC_OFFS(winNum)))
+#define XEXWCR_WIN_ACC_NO_ACC(winNum)       (0 << (XEXWCR_WIN_ACC_OFFS(winNum)))
+#define XEXWCR_WIN_ACC_RO(winNum)           (1 << (XEXWCR_WIN_ACC_OFFS(winNum)))
+#define XEXWCR_WIN_ACC_RW(winNum)           (3 << (XEXWCR_WIN_ACC_OFFS(winNum)))
+
+/* XOR Engine Base Address Registers (XEBARx) */
+#define XEBARX_TARGET_OFFS                  (0)
+#define XEBARX_TARGET_MASK                  (0xF << XEBARX_TARGET_OFFS)
+#define XEBARX_ATTR_OFFS                    (8)
+#define XEBARX_ATTR_MASK                    (0xFF << XEBARX_ATTR_OFFS)
+#define XEBARX_BASE_OFFS                    (16)
+#define XEBARX_BASE_MASK                    (0xFFFF << XEBARX_BASE_OFFS)
+
+
+/* XOR Engine Size Mask Registers (XESMRx) */
+#define XESMRX_SIZE_MASK_OFFS               (16)
+#define XESMRX_SIZE_MASK_MASK               (0xFFFF << XESMRX_SIZE_MASK_OFFS)
+#define XOR_WIN_SIZE_ALIGN		    _64K
+
+/* XOR Engine High Address Remap Register (XEHARRx1) */
+#define XEHARRX_REMAP_OFFS                  (0)
+#define XEHARRX_REMAP_MASK                  (0xFFFFFFFF << XEHARRX_REMAP_OFFS)
+
+
+#define XOR_OVERRIDE_CTRL_REG(chan)   (MV_XOR_REGS_BASE(XOR_UNIT(chan))+(0x2A0 + ((XOR_CHAN(chan)) * 4)))
+/* XOR Engine [0..1] Address Override Control Register (XExAOCR) */
+#define XEXAOCR_OVR_EN_OFFS(target)         (3 * target)
+#define XEXAOCR_OVR_EN_MASK(target)         (1 << (XEXAOCR_OVR_EN_OFFS(target)))
+#define XEXAOCR_OVR_PTR_OFFS(target)        ((3 * target) + 1)
+#define XEXAOCR_OVR_PTR_MASK(target)        (3 << (XEXAOCR_OVR_PTR_OFFS(target)))
+#define XEXAOCR_OVR_BAR(winNum,target)      (winNum << (XEXAOCR_OVR_PTR_OFFS(target)))
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif	/* __INCmvXorSpech */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/xor/mvXor.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/xor/mvXor.c
@@ -0,0 +1,646 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvSysXorConfig.h"
+#include "mvXorRegs.h"
+#include "mvXor.h"
+
+/* defines  */
+#ifdef MV_DEBUG
+	#define DB(x)	x
+#else
+	#define DB(x)
+#endif	
+/*******************************************************************************
+* mvXorHalInit - Initialize XOR engine
+*
+* DESCRIPTION:
+*               This function initialize XOR unit. 
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_BAD_PARAM if parameters to function invalid, MV_OK otherwise.
+*******************************************************************************/
+MV_VOID mvXorHalInit (MV_U32 xorChanNum)
+{
+	MV_U32 i;
+        /* Abort any XOR activity & set default configuration */
+        for(i = 0; i < xorChanNum; i++)
+        {
+                mvXorCommandSet(i, MV_STOP);
+		mvXorCtrlSet(i, (1 << XEXCR_REG_ACC_PROTECT_OFFS) | 
+                    		(4 << XEXCR_DST_BURST_LIMIT_OFFS) |
+                    		(4 << XEXCR_SRC_BURST_LIMIT_OFFS)
+#if defined(MV_CPU_BE)
+/*				| (1 << XEXCR_DRD_RES_SWP_OFFS)
+				| (1 << XEXCR_DWR_REQ_SWP_OFFS)
+*/
+				| (1 << XEXCR_DES_SWP_OFFS)				
+#endif
+			    );
+        }
+    
+}
+
+/*******************************************************************************
+* mvXorCtrlSet - Set XOR channel control registers
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_BAD_PARAM if parameters to function invalid, MV_OK otherwise.
+* NOTE:
+*    This function does not modify the OperationMode field of control register.
+*
+*******************************************************************************/
+MV_STATUS mvXorCtrlSet(MV_U32 chan, MV_U32 xorCtrl)
+{
+	MV_U32 oldValue;
+
+	/* update the XOR Engine [0..1] Configuration Registers (XExCR) */
+	oldValue = MV_REG_READ(XOR_CONFIG_REG(XOR_UNIT(chan),XOR_CHAN(chan)))
+		& XEXCR_OPERATION_MODE_MASK;
+	xorCtrl  &= ~XEXCR_OPERATION_MODE_MASK;
+	xorCtrl  |= oldValue;
+	MV_REG_WRITE(XOR_CONFIG_REG(XOR_UNIT(chan),XOR_CHAN(chan)),xorCtrl);
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvXorEccClean - .
+*
+* DESCRIPTION:
+*       
+*
+* INPUT:
+*       destPtr - 
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:        
+*
+*******************************************************************************/
+MV_STATUS mvXorEccClean(MV_U32 chan, MV_XOR_ECC *pXorEccConfig)
+{
+    MV_U32  tClkCycles;
+    MV_U32  temp;
+
+    /* Parameter checking   */
+    if (chan >= MV_XOR_MAX_CHAN)
+    {
+		DB(mvOsPrintf("%s: ERR. Invalid chan num %d\n",__FUNCTION__ ,chan));
+        return MV_BAD_PARAM;
+    }
+    if (NULL == pXorEccConfig)
+    {
+        DB(mvOsPrintf("%s: ERR. pXorEccConfig is NULL pointer\n",
+                          __FUNCTION__ ));
+        return MV_BAD_PTR;
+    }
+    if (MV_ACTIVE == mvXorStateGet(chan))
+    {
+        DB(mvOsPrintf("%s: ERR. Channel is already active\n", __FUNCTION__ ));
+        return MV_BUSY;
+    }
+    if ((pXorEccConfig->sectorSize < XETMCR_SECTION_SIZE_MIN_VALUE) || 
+        (pXorEccConfig->sectorSize > XETMCR_SECTION_SIZE_MAX_VALUE))
+    {
+        DB(mvOsPrintf("%s: ERR. sectorSize must be between %d to %d\n",
+                       __FUNCTION__,XETMCR_SECTION_SIZE_MIN_VALUE,
+                          XETMCR_SECTION_SIZE_MAX_VALUE));
+        return MV_BAD_PARAM;
+    }
+    if ((pXorEccConfig->blockSize < XEXBSR_BLOCK_SIZE_MIN_VALUE) ||
+        (pXorEccConfig->blockSize > XEXBSR_BLOCK_SIZE_MAX_VALUE))
+    {
+        DB(mvOsPrintf("%s: ERR. Block size must be between %d to %ul\n",
+                       __FUNCTION__,XEXBSR_BLOCK_SIZE_MIN_VALUE,
+                          XEXBSR_BLOCK_SIZE_MAX_VALUE));
+        return MV_BAD_PARAM;
+    }
+    if (0x0 == pXorEccConfig->destPtr)
+    {
+        DB(mvOsPrintf("%s: ERR. destPtr is NULL pointer\n",__FUNCTION__ ));
+        return MV_BAD_PARAM;
+    }
+
+    /* set the operation mode to ECC */
+    temp = MV_REG_READ(XOR_CONFIG_REG(XOR_UNIT(chan),XOR_CHAN(chan)));
+    temp &= ~XEXCR_OPERATION_MODE_MASK;
+    temp |= XEXCR_OPERATION_MODE_ECC;
+    MV_REG_WRITE(XOR_CONFIG_REG(XOR_UNIT(chan),XOR_CHAN(chan)), temp);
+    
+    /* update the TimerEn bit in the XOR Engine Timer Mode 
+    Control Register (XETMCR) */
+    if (pXorEccConfig->periodicEnable)
+    {
+	 MV_REG_BIT_SET(XOR_TIMER_MODE_CTRL_REG(XOR_UNIT(chan)),XETMCR_TIMER_EN_MASK);
+    }
+    else
+    {
+	 MV_REG_BIT_RESET(XOR_TIMER_MODE_CTRL_REG(XOR_UNIT(chan)),XETMCR_TIMER_EN_MASK);
+    }
+
+    /* update the SectionSizeCtrl bit in the XOR Engine Timer Mode Control 
+    Register (XETMCR) */
+	      temp = MV_REG_READ(XOR_TIMER_MODE_CTRL_REG(XOR_UNIT(chan)));
+    temp &= ~XETMCR_SECTION_SIZE_CTRL_MASK;
+    temp |= (pXorEccConfig->sectorSize << XETMCR_SECTION_SIZE_CTRL_OFFS);
+    MV_REG_WRITE(XOR_TIMER_MODE_CTRL_REG(XOR_UNIT(chan)), temp);
+
+    /* update the DstPtr field in the XOR Engine [0..1] Destination Pointer 
+    Register (XExDPR0) */
+    MV_REG_WRITE(XOR_DST_PTR_REG(XOR_UNIT(chan),XOR_CHAN(chan)), pXorEccConfig->destPtr);
+
+    /* update the BlockSize field in the XOR Engine[0..1] Block Size 
+    Registers (XExBSR) */
+    MV_REG_WRITE(XOR_BLOCK_SIZE_REG(XOR_UNIT(chan),XOR_CHAN(chan)), 
+		 pXorEccConfig->blockSize);
+
+    /* update the XOR Engine Timer Mode Initial Value Register (XETMIVR) */
+    tClkCycles = pXorEccConfig->tClkTicks;
+    MV_REG_WRITE(XOR_TIMER_MODE_INIT_VAL_REG(XOR_UNIT(chan)), tClkCycles);
+    
+    /* start transfer */
+    MV_REG_BIT_SET(XOR_ACTIVATION_REG(XOR_UNIT(chan),XOR_CHAN(chan)), 
+		   XEXACTR_XESTART_MASK);
+    
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvXorEccCurrTimerGet - Return ECC timer current value.
+*
+* DESCRIPTION:
+*       Return the ECC timer mode Current value.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:        
+*       Timer ticks (in Tclk frequancy).
+*
+*******************************************************************************/
+MV_U32 mvXorEccCurrTimerGet(MV_U32 chan, MV_U32 tClk)
+{
+     /* read the current Tclk */
+     return (MV_REG_READ(XOR_TIMER_MODE_CURR_VAL_REG(XOR_UNIT(chan))));
+}
+
+/*******************************************************************************
+* mvXorMemInit - 
+*
+* DESCRIPTION:
+*       
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:        
+*       
+*
+*******************************************************************************/
+MV_STATUS mvXorMemInit(MV_U32 chan, MV_U32 startPtr, MV_U32 blockSize, 
+                       MV_U32 initValHigh, MV_U32 initValLow)
+{
+    MV_U32 temp;
+
+    /* Parameter checking   */
+    if (chan >= MV_XOR_MAX_CHAN)
+    {
+		mvOsPrintf("%s: ERR. Invalid chan num %d\n",__FUNCTION__ , chan);
+        return MV_BAD_PARAM;
+    }
+    if (MV_ACTIVE == mvXorStateGet(chan))
+    {
+        mvOsPrintf("%s: ERR. Channel is already active\n", __FUNCTION__ );
+        return MV_BUSY;
+    }
+    if ((blockSize < XEXBSR_BLOCK_SIZE_MIN_VALUE) ||
+        (blockSize > XEXBSR_BLOCK_SIZE_MAX_VALUE))
+    {
+        mvOsPrintf("%s: ERR. Block size must be between %d to %ul\n",
+                       __FUNCTION__,XEXBSR_BLOCK_SIZE_MIN_VALUE,
+                          XEXBSR_BLOCK_SIZE_MAX_VALUE);
+        return MV_BAD_PARAM;
+    }
+#if 0
+/* tzachi - this is done purposely by u-boot */
+    if (0x0 == startPtr)
+    {
+        mvOsPrintf("%s: ERR. startPtr is NULL pointer\n", __FUNCTION__ );
+        return MV_BAD_PARAM;
+    }
+#endif
+
+    /* set the operation mode to Memory Init */
+    temp = MV_REG_READ(XOR_CONFIG_REG(XOR_UNIT(chan),XOR_CHAN(chan)));
+    temp &= ~XEXCR_OPERATION_MODE_MASK;
+    temp |= XEXCR_OPERATION_MODE_MEM_INIT;
+    MV_REG_WRITE(XOR_CONFIG_REG(XOR_UNIT(chan),XOR_CHAN(chan)), temp);
+    
+    /* update the startPtr field in XOR Engine [0..1] Destination Pointer 
+    Register (XExDPR0) */
+    MV_REG_WRITE(XOR_DST_PTR_REG(XOR_UNIT(chan),XOR_CHAN(chan)), startPtr);
+
+    /* update the BlockSize field in the XOR Engine[0..1] Block Size 
+    Registers (XExBSR) */
+    MV_REG_WRITE(XOR_BLOCK_SIZE_REG(XOR_UNIT(chan),XOR_CHAN(chan)), blockSize);
+
+    /* update the field InitValL in the XOR Engine Initial Value Register 
+    Low (XEIVRL) */
+    MV_REG_WRITE(XOR_INIT_VAL_LOW_REG(XOR_UNIT(chan)), initValLow);
+
+    /* update the field InitValH in the XOR Engine Initial Value Register 
+    High (XEIVRH) */
+    MV_REG_WRITE(XOR_INIT_VAL_HIGH_REG(XOR_UNIT(chan)), initValHigh);
+    
+    /* start transfer */
+    MV_REG_BIT_SET(XOR_ACTIVATION_REG(XOR_UNIT(chan),XOR_CHAN(chan)),
+		   XEXACTR_XESTART_MASK);
+    
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvXorTransfer - Transfer data from source to destination on one of 
+*                 three modes (XOR,CRC32,DMA)
+* 
+* DESCRIPTION:       
+*       This function initiates XOR channel, according to function parameters,
+*       in order to perform XOR or CRC32 or DMA transaction.
+*       To gain maximum performance the user is asked to keep the following 
+*       restrictions:
+*       1) Selected engine is available (not busy).
+*       1) This module does not take into consideration CPU MMU issues.
+*          In order for the XOR engine to access the appropreate source 
+*          and destination, address parameters must be given in system 
+*          physical mode.
+*       2) This API does not take care of cache coherency issues. The source,
+*          destination and in case of chain the descriptor list are assumed
+*          to be cache coherent.
+*       4) Parameters validity. For example, does size parameter exceeds 
+*          maximum byte count of descriptor mode (16M or 64K).
+*
+* INPUT:
+*       chan          - XOR channel number. See MV_XOR_CHANNEL enumerator.
+*       xorType       - One of three: XOR, CRC32 and DMA operations.
+*       xorChainPtr   - address of chain pointer
+*
+* OUTPUT:
+*       None.
+*
+* RETURS: 
+*       MV_BAD_PARAM if parameters to function invalid, MV_OK otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvXorTransfer(MV_U32 chan, MV_XOR_TYPE xorType, MV_U32 xorChainPtr)
+{
+    MV_U32 temp;
+
+    /* Parameter checking */
+    if (chan >= MV_XOR_MAX_CHAN)
+    {
+		DB(mvOsPrintf("%s: ERR. Invalid chan num %d\n",__FUNCTION__ , chan));
+        return MV_BAD_PARAM;
+    }
+    if (MV_ACTIVE == mvXorStateGet(chan))
+    {
+        DB(mvOsPrintf("%s: ERR. Channel is already active\n", __FUNCTION__ ));
+        return MV_BUSY;
+    }
+    if (0x0 == xorChainPtr)
+    {
+        DB(mvOsPrintf("%s: ERR. xorChainPtr is NULL pointer\n", __FUNCTION__ ));
+        return MV_BAD_PARAM;
+    }
+
+    /* read configuration register and mask the operation mode field */
+    temp = MV_REG_READ(XOR_CONFIG_REG(XOR_UNIT(chan),XOR_CHAN(chan)));
+    temp &= ~XEXCR_OPERATION_MODE_MASK;
+
+    switch (xorType)
+    {
+    case MV_XOR:
+        if (0 != (xorChainPtr & XEXDPR_DST_PTR_XOR_MASK))
+        {
+            DB(mvOsPrintf("%s: ERR. Invalid chain pointer (bits [5:0] must "
+                              "be cleared)\n",__FUNCTION__ ));
+            return MV_BAD_PARAM;
+        }
+        /* set the operation mode to XOR */
+        temp |= XEXCR_OPERATION_MODE_XOR;
+        break;
+        
+    case MV_DMA:
+        if (0 != (xorChainPtr & XEXDPR_DST_PTR_DMA_MASK))
+        {
+            DB(mvOsPrintf("%s: ERR. Invalid chain pointer (bits [4:0] must "
+                              "be cleared)\n",__FUNCTION__ ));
+            return MV_BAD_PARAM;
+        }
+        /* set the operation mode to DMA */
+        temp |= XEXCR_OPERATION_MODE_DMA;
+        break;
+        
+    case MV_CRC32:
+        if (0 != (xorChainPtr & XEXDPR_DST_PTR_CRC_MASK))
+        {
+            DB(mvOsPrintf("%s: ERR. Invalid chain pointer (bits [4:0] must "
+                              "be cleared)\n",__FUNCTION__ ));
+            return MV_BAD_PARAM;
+        }
+        /* set the operation mode to CRC32 */
+        temp |= XEXCR_OPERATION_MODE_CRC;
+        break;
+        
+    default:
+        return MV_BAD_PARAM;
+    }
+    
+    /* write the operation mode to the register */
+    MV_REG_WRITE(XOR_CONFIG_REG(XOR_UNIT(chan),XOR_CHAN(chan)), temp);
+    /* update the NextDescPtr field in the XOR Engine [0..1] Next Descriptor 
+       Pointer Register (XExNDPR) */
+    MV_REG_WRITE(XOR_NEXT_DESC_PTR_REG(XOR_UNIT(chan),XOR_CHAN(chan)),
+		 xorChainPtr);
+    
+    /* start transfer */
+    MV_REG_BIT_SET(XOR_ACTIVATION_REG(XOR_UNIT(chan),XOR_CHAN(chan)), 
+		   XEXACTR_XESTART_MASK);
+    
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvXorStateGet - Get XOR channel state.
+*
+* DESCRIPTION:
+*       XOR channel activity state can be active, idle, paused.
+*       This function retrunes the channel activity state.
+*
+* INPUT:
+*       chan     - the channel number
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       XOR_CHANNEL_IDLE    - If the engine is idle.
+*       XOR_CHANNEL_ACTIVE  - If the engine is busy.
+*       XOR_CHANNEL_PAUSED  - If the engine is paused.
+*       MV_UNDEFINED_STATE  - If the engine state is undefind or there is no 
+*                             such engine
+*
+*******************************************************************************/
+MV_STATE mvXorStateGet(MV_U32 chan)
+{
+    MV_U32 state;
+
+    /* Parameter checking   */
+    if (chan >= MV_XOR_MAX_CHAN)
+    {
+		DB(mvOsPrintf("%s: ERR. Invalid chan num %d\n",__FUNCTION__ , chan));
+        return MV_UNDEFINED_STATE;
+    }
+    
+    /* read the current state */
+    state = MV_REG_READ(XOR_ACTIVATION_REG(XOR_UNIT(chan),XOR_CHAN(chan)));
+    state &= XEXACTR_XESTATUS_MASK;
+    
+    /* return the state */
+    switch (state)
+    {
+    case XEXACTR_XESTATUS_IDLE:
+        return MV_IDLE;
+    case XEXACTR_XESTATUS_ACTIVE:
+        return MV_ACTIVE;
+    case XEXACTR_XESTATUS_PAUSED:
+        return MV_PAUSED;
+    }
+    return MV_UNDEFINED_STATE;
+}
+
+/*******************************************************************************
+* mvXorCommandSet - Set command of XOR channel
+*
+* DESCRIPTION:
+*       XOR channel can be started, idle, paused and restarted.
+*       Paused can be set only if channel is active.
+*       Start can be set only if channel is idle or paused.
+*       Restart can be set only if channel is paused.
+*       Stop can be set only if channel is active.    
+*
+* INPUT:
+*       chan     - The channel number
+*       command  - The command type (start, stop, restart, pause)    
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_OK on success , MV_BAD_PARAM on erroneous parameter, MV_ERROR on 
+*       undefind XOR engine mode
+*
+*******************************************************************************/
+MV_STATUS mvXorCommandSet(MV_U32 chan, MV_COMMAND command)
+{
+    MV_STATE    state;
+
+    /* Parameter checking */
+    if (chan >= MV_XOR_MAX_CHAN)
+    {
+		DB(mvOsPrintf("%s: ERR. Invalid chan num %d\n",__FUNCTION__ , chan));
+        return MV_BAD_PARAM;
+    }
+
+    /* get the current state */
+    state = mvXorStateGet(chan);
+
+    /* command is start and current state is idle */
+    if ((command == MV_START) && (state == MV_IDLE))
+    {
+	 MV_REG_BIT_SET(XOR_ACTIVATION_REG(XOR_UNIT(chan),XOR_CHAN(chan)), 
+			XEXACTR_XESTART_MASK);
+        return MV_OK;
+    }
+    /* command is stop and current state is active*/
+    else if ((command == MV_STOP) && (state == MV_ACTIVE))
+    {
+	MV_REG_BIT_SET(XOR_ACTIVATION_REG(XOR_UNIT(chan),XOR_CHAN(chan)),
+		       XEXACTR_XESTOP_MASK);
+        return MV_OK;
+    }
+    /* command is paused and current state is active */
+    else if ((command == MV_PAUSED) && (state == MV_ACTIVE))
+    {
+	MV_REG_BIT_SET(XOR_ACTIVATION_REG(XOR_UNIT(chan),XOR_CHAN(chan)),
+		       XEXACTR_XEPAUSE_MASK);
+        return MV_OK;
+    }
+    /* command is restart and current state is paused*/
+    else if ((command == MV_RESTART) && (state == MV_PAUSED))
+    {
+	 MV_REG_BIT_SET(XOR_ACTIVATION_REG(XOR_UNIT(chan),XOR_CHAN(chan)),
+			XEXACTR_XERESTART_MASK);
+	return MV_OK;
+    }
+
+    /* command is stop and current state is active*/
+    else if ((command == MV_STOP) && (state == MV_IDLE))
+    {
+        return MV_OK;
+    }
+    
+    /* illegal command */
+    DB(mvOsPrintf("%s: ERR. Illegal command\n", __FUNCTION__));
+    
+	return MV_BAD_PARAM;
+}
+
+/*******************************************************************************
+* mvXorOverrideSet - Set XOR target window override
+*
+* DESCRIPTION:
+*       The address override feature enables additional address decoupling. 
+*       For example, it allows the use of the same source and destination 
+*       addresses while the source is targeted to one interface and 
+*       destination to a second interface.
+*       XOR source/destination/next descriptor addresses can be override per
+*       address decode windows 0,1,2 and 3 only. 
+*       This function set override parameters per XOR channel. It access
+*       XOR control register low.
+*
+* INPUT:
+*       chan        - XOR channel number. See MV_XOR_CHANNEL enumerator.
+*       winNum      - Override window number.
+*                       Note: Not all windows can override.
+*       override    - Type of override. See MV_XOR_OVERRIDE enumerator.
+*       enable      - Window override is enabled or disabled
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_BAD_PARAM if parameters to function invalid, MV_OK otherwise.
+*
+*******************************************************************************/
+
+MV_STATUS mvXorOverrideSet(MV_U32 chan, MV_XOR_OVERRIDE_TARGET target, 
+                           MV_U32 winNum, MV_BOOL enable)
+{
+    MV_U32 temp;
+    
+    /* Parameter checking   */
+    if (chan >= MV_XOR_MAX_CHAN)
+    {
+        
+		DB(mvOsPrintf("%s: ERR. Invalid chan num %d\n", __FUNCTION__, chan));
+        return MV_BAD_PARAM;
+    }
+    if (winNum >= XOR_MAX_OVERRIDE_WIN)
+    {
+		DB(mvOsPrintf("%s: ERR. Invalid win num %d\n", __FUNCTION__, winNum));
+        return MV_BAD_PARAM;
+    }
+
+    /* set the enable bit */
+    if (enable)
+    {
+        MV_REG_BIT_SET(XOR_OVERRIDE_CTRL_REG(chan),XEXAOCR_OVR_EN_MASK(target));
+    }
+    else
+    {
+        MV_REG_BIT_RESET(XOR_OVERRIDE_CTRL_REG(chan),
+                         XEXAOCR_OVR_EN_MASK(target));
+    }
+
+    /* read the override control register */
+    temp = MV_REG_READ(XOR_OVERRIDE_CTRL_REG(chan));
+    temp &= ~XEXAOCR_OVR_PTR_MASK(target);
+    temp |= (winNum << XEXAOCR_OVR_PTR_OFFS(target));
+    MV_REG_WRITE(XOR_OVERRIDE_CTRL_REG(chan), temp);
+	return MV_OK;
+}
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/xor/mvXor.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/xor/mvXor.h
@@ -0,0 +1,228 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+/*******************************************************************************
+* mvXor.h - Header File for :
+*
+* DESCRIPTION:
+*       This file contains Marvell Controller XOR HW library API.
+*       NOTE: This HW library API assumes XOR source, destination and 
+*       descriptors are cache coherent. 
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+#ifndef __INCMVxorh
+#define __INCMVxorh
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvSysXorConfig.h"
+
+/* typedefs */
+
+/* This enumerator describes the type of functionality the XOR channel      */
+/* can have while using the same data structures.                           */
+typedef enum _mvXorType
+{
+    MV_XOR,     /* XOR channel functions as XOR accelerator     */
+    MV_DMA,     /* XOR channel functions as IDMA channel        */            
+    MV_CRC32    /* XOR channel functions as CRC 32 calculator   */
+}MV_XOR_TYPE;
+
+#if defined(MV_CPU_LE)
+ /* This structure describes XOR descriptor size 64bytes                     */
+typedef struct _mvXorDesc
+{
+    MV_U32 status;        /* Successful descriptor execution indication */
+    MV_U32 crc32Result;   /* Result of CRC-32 calculation */
+    MV_U32 descCommand;   /* type of operation to be carried out on the data */
+    MV_U32 phyNextDescPtr;/* Next descriptor address pointer */    
+    MV_U32 byteCnt;       /* Size of source and destination blocks in bytes */
+    MV_U32 phyDestAdd;    /* Destination Block address pointer */
+    MV_U32 srcAdd0; /* source block #0 address pointer */
+    MV_U32 srcAdd1; /* source block #1 address pointer */
+    MV_U32 srcAdd2; /* source block #2 address pointer */
+    MV_U32 srcAdd3; /* source block #3 address pointer */
+    MV_U32 srcAdd4; /* source block #4 address pointer */
+    MV_U32 srcAdd5; /* source block #6 address pointer */
+    MV_U32 srcAdd6; /* source block #6 address pointer */
+    MV_U32 srcAdd7; /* source block #7 address pointer */    
+    MV_U32 reserved0;
+    MV_U32 reserved1;
+} MV_XOR_DESC;
+
+
+/* XOR descriptor structure for CRC and DMA descriptor */
+typedef struct _mvCrcDmaDesc
+{
+    MV_U32 status; /* Successful descriptor execution indication */
+    MV_U32 crc32Result; /* Result of CRC-32 calculation */
+    MV_U32 descCommand; /* type of operation to be carried out on the data */
+    MV_U32 nextDescPtr; /* Next descriptor address pointer */
+    MV_U32 byteCnt; /* Size of source block part represented by the descriptor */
+    MV_U32 destAdd; /* Destination Block address pointer (not used in CRC32 */
+    MV_U32 srcAdd0;  /* Mode: Source Block address pointer */
+    MV_U32 srcAdd1; /* Mode: Source Block address pointer */
+} MV_CRC_DMA_DESC;
+
+#elif defined(MV_CPU_BE)
+/* This structure describes XOR descriptor size 64bytes                     */
+typedef struct _mvXorDesc
+{
+	MV_U32 crc32Result; /* Result of CRC-32 calculation */
+    MV_U32 status; /* Successful descriptor execution indication */
+	MV_U32 phyNextDescPtr; /* Next descriptor address pointer */
+	MV_U32 descCommand; /* type of operation to be carried out on the data */
+	MV_U32 phyDestAdd; /* Destination Block address pointer */
+    MV_U32 byteCnt; /* Size of source and destination blocks in bytes */
+	MV_U32 srcAdd1; /* source block #1 address pointer */
+    MV_U32 srcAdd0; /* source block #0 address pointer */
+	MV_U32 srcAdd3; /* source block #3 address pointer */
+    MV_U32 srcAdd2; /* source block #2 address pointer */
+	MV_U32 srcAdd5; /* source block #5 address pointer */
+    MV_U32 srcAdd4; /* source block #4 address pointer */
+    MV_U32 srcAdd7; /* source block #7 address pointer */
+	MV_U32 srcAdd6; /* source block #6 address pointer */    
+    MV_U32 reserved0;
+	MV_U32 reserved1;
+} MV_XOR_DESC;
+
+
+/* XOR descriptor structure for CRC and DMA descriptor */
+typedef struct _mvCrcDmaDesc
+{
+	MV_U32 crc32Result; /* Result of CRC-32 calculation */
+    MV_U32 status; /* Successful descriptor execution indication */
+	MV_U32 nextDescPtr; /* Next descriptor address pointer */
+    MV_U32 descCommand; /* type of operation to be carried out on the data */
+	MV_U32 destAdd; /* Destination Block address pointer (not used in CRC32 */
+    MV_U32 byteCnt; /* Size of source block part represented by the descriptor */
+	MV_U32 srcAdd1; /* Mode: Source Block address pointer */
+    MV_U32 srcAdd0;  /* Mode: Source Block address pointer */    
+} MV_CRC_DMA_DESC;
+
+#endif
+
+typedef struct _mvXorEcc
+{
+    MV_U32  destPtr; 		/* Target block pointer to ECC/MemInit operation */
+    MV_U32  blockSize;		/* Block size in bytes for ECC/MemInit operation */
+    MV_BOOL periodicEnable; /* Enable Timer Mode 						 	 */
+    MV_U32	tClkTicks;		/* ECC timer mode initial count - down value 	 */
+    MV_U32  sectorSize;		/* section size for ECC timer mode operation 	 */
+}MV_XOR_ECC;
+
+typedef enum _mvXorOverrideTarget
+{
+    SRC_ADDR0, /* Source Address #0 Control */
+    SRC_ADDR1, /* Source Address #1 Control */
+    SRC_ADDR2, /* Source Address #2 Control */
+    SRC_ADDR3, /* Source Address #3 Control */
+    SRC_ADDR4, /* Source Address #4 Control */
+    SRC_ADDR5, /* Source Address #5 Control */
+    SRC_ADDR6, /* Source Address #6 Control */
+    SRC_ADDR7, /* Source Address #7 Control */
+    XOR_DST_ADDR, /* Destination Address Control */
+    XOR_NEXT_DESC /* Next Descriptor Address Control */
+
+}MV_XOR_OVERRIDE_TARGET;
+
+#define XOR_MAX_OVERRIDE_WIN	4	/* Maximum address override windows		*/
+
+/* for controllers that have two XOR units, then chans 2 & 3 will be mapped*/
+/* to channels 0 & 1 of unit 1 */
+#define XOR_UNIT(chan)	((chan) >> 1)
+#define XOR_CHAN(chan)  ((chan) & 1)
+
+MV_VOID     mvXorHalInit (MV_U32 xorChanNum);
+MV_STATUS   mvXorCtrlSet(MV_U32 chan, MV_U32 xorCtrl);
+MV_STATUS   mvXorEccClean(MV_U32 chan, MV_XOR_ECC *pXorEccConfig);
+MV_U32      mvXorEccCurrTimerGet(MV_U32 chan, MV_U32 tClk);
+MV_STATUS   mvXorMemInit(MV_U32 chan, MV_U32 startPtr, MV_U32 blockSize, 
+                         MV_U32 initValHigh, MV_U32 initValLow);
+MV_STATUS   mvXorTransfer(MV_U32 chan, MV_XOR_TYPE xorType, MV_U32 xorChainPtr);
+MV_STATE    mvXorStateGet(MV_U32 chan);
+MV_STATUS   mvXorCommandSet(MV_U32 chan, MV_COMMAND command);
+MV_STATUS   mvXorOverrideSet(MV_U32 chan, MV_XOR_OVERRIDE_TARGET target, 
+                             MV_U32 winNum, MV_BOOL enable);
+
+MV_STATUS mvXorWinInit (MV_UNIT_WIN_INFO *addrWinMap);
+MV_STATUS mvXorTargetWinWrite(MV_U32 unit, MV_U32 winNum,MV_UNIT_WIN_INFO *pAddrDecWin);
+MV_STATUS mvXorTargetWinRead(MV_U32 unit,MV_U32 winNum, MV_UNIT_WIN_INFO *pAddrDecWin);
+MV_STATUS mvXorTargetWinEnable(MV_U32 unit,MV_U32 winNum, MV_BOOL enable);
+MV_STATUS mvXorProtWinSet (MV_U32 unit,MV_U32 chan, MV_U32 winNum, MV_BOOL access, 
+                           MV_BOOL write);
+MV_STATUS mvXorPciRemap(MV_U32 unit,MV_U32 winNum, MV_U32 addrHigh);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/xor/mvCompVer.txt
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/xor/mvCompVer.txt
@@ -0,0 +1,4 @@
+Global HAL Version: DOVE_HAL_3_1_2
+Unit HAL Version: 1.0.2
+Description: This component includes an implementation of the unit HAL drivers
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/xor/mvXorAddrDec.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/xor/mvXorAddrDec.c
@@ -0,0 +1,534 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvXorRegs.h"
+#include "mvXor.h"
+
+/* defines  */
+#ifdef MV_DEBUG
+	#define DB(x)	x
+#else
+	#define DB(x)
+#endif	
+
+
+static MV_STATUS xorWinOverlapDetect(MV_U32 unit,MV_U32 winNum, MV_ADDR_WIN *pAddrWin);
+
+MV_TARGET xorAddrDecPrioTap[] = 
+{
+#if defined(MV_INCLUDE_SDRAM_CS0)
+    SDRAM_CS0,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS1)
+    SDRAM_CS1,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS2)
+    SDRAM_CS2,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS3)
+    SDRAM_CS3,
+#endif
+#if defined(MV_INCLUDE_DEVICE_CS0)
+    DEVICE_CS0,
+#endif
+#if defined(MV_INCLUDE_PEX)
+    PEX0_MEM,
+    PEX1_MEM,
+#endif
+#if defined(MV_INCLUDE_DEVICE_CS1)
+    DEVICE_CS1,
+#endif
+#if defined(MV_INCLUDE_CESA)
+    CRYPT_ENG,
+#endif 
+    TBL_TERM
+};
+static MV_STATUS mvXorInitWinsUnit (MV_U32 unit, MV_UNIT_WIN_INFO *addrWinMap)
+{
+    MV_U32		winNum;
+    MV_UNIT_WIN_INFO	*addrDecWin;
+    MV_U32		winPrioIndex=0;
+
+    /* Initiate XOR address decode */
+    
+    /* First disable all address decode windows */
+    for(winNum = 0; winNum < XOR_MAX_ADDR_DEC_WIN; winNum++)
+	mvXorTargetWinEnable(unit,winNum, MV_FALSE);
+    
+    /* Go through all windows in user table until table terminator			*/
+    for (winNum = 0; ((xorAddrDecPrioTap[winPrioIndex] != TBL_TERM) &&
+			    (winNum < XOR_MAX_ADDR_DEC_WIN));)
+    {
+	addrDecWin = &addrWinMap[xorAddrDecPrioTap[winPrioIndex]];
+        if (addrDecWin->enable == MV_TRUE) {
+	    if (MV_OK != mvXorTargetWinWrite(unit,winNum, addrDecWin)) {
+		DB(mvOsPrintf("mvXorInit: ERR. mvDmaTargetWinSet failed\n"));
+		return MV_ERROR;
+	    }
+	    winNum++;
+	}
+	winPrioIndex++;
+    }
+
+    return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvXorWinInit
+*
+* DESCRIPTION:
+*   This function sets the default address decode windows of the unit.
+*   Note that if the address window is disabled in xorAddrDecMap, the
+*   window parameters will be set but the window will remain disabled.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_BAD_PARAM if parameters to function invalid, MV_OK otherwise.
+*******************************************************************************/
+MV_STATUS mvXorWinInit (MV_UNIT_WIN_INFO *addrWinMap)
+{
+    MV_U32         i;
+
+    /* Initiate XOR address decode */
+    for(i = 0; i < MV_XOR_MAX_UNIT; i++)
+	mvXorInitWinsUnit(i, addrWinMap);
+
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvXorTargetWinWrite - Set XOR target address window
+*
+* DESCRIPTION:
+*       This function sets a peripheral target (e.g. SDRAM bank0, PCI_MEM0) 
+*       address window. After setting this target window, the XOR will be 
+*       able to access the target within the address window. 
+*
+* INPUT:
+*	    winNum - One of the possible XOR memory decode windows.
+*       target - Peripheral target enumerator.
+*       base   - Window base address.
+*       size   - Window size.
+*       enable - Window enable/disable.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_BAD_PARAM if parameters to function invalid, MV_OK otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvXorTargetWinWrite(MV_U32 unit, MV_U32 winNum,MV_UNIT_WIN_INFO *pAddrDecWin)
+{
+    MV_U32  sizeReg, baseReg;
+    MV_U32      chan;
+    
+    /* Parameter checking */
+    if (winNum >= XOR_MAX_ADDR_DEC_WIN) {
+		DB(mvOsPrintf("%s: ERR. Invalid win num %d\n",__FUNCTION__, winNum));
+        return MV_BAD_PARAM;
+    }
+
+    if (pAddrDecWin == NULL) {
+        DB(mvOsPrintf("%s: ERR. pAddrDecWin is NULL pointer\n", __FUNCTION__ ));
+        return MV_BAD_PTR;
+    }
+
+    /* Check if the requested window overlaps with current windows */
+    if (MV_TRUE == xorWinOverlapDetect(unit, winNum, &pAddrDecWin->addrWin)) {
+	DB(mvOsPrintf("%s: ERR. Window %d overlap\n",__FUNCTION__,winNum));
+	return MV_ERROR;
+    }
+
+    if(!MV_IS_POWER_OF_2(pAddrDecWin->addrWin.size)) {
+	mvOsPrintf("%s: ERR. Illegal window size.\n",__FUNCTION__);
+	return MV_BAD_PARAM;
+    }
+
+    baseReg = MV_REG_READ(XOR_BASE_ADDR_REG(unit,winNum));
+    sizeReg = MV_REG_READ(XOR_SIZE_MASK_REG(unit,winNum));
+
+    baseReg = pAddrDecWin->addrWin.baseLow & XEBARX_BASE_MASK;
+    sizeReg = (pAddrDecWin->addrWin.size / XOR_WIN_SIZE_ALIGN) - 1;
+    sizeReg = (sizeReg << XESMRX_SIZE_MASK_OFFS) & XESMRX_SIZE_MASK_MASK;
+
+    /* set attributes */
+    baseReg &= ~XEBARX_ATTR_MASK;
+    baseReg |= pAddrDecWin->attrib << XEBARX_ATTR_OFFS;
+    /* set target ID */
+    baseReg &= ~XEBARX_TARGET_MASK;
+    baseReg |= pAddrDecWin->targetId << XEBARX_TARGET_OFFS;
+
+    /* Write to address decode Base Address Register */
+    MV_REG_WRITE(XOR_BASE_ADDR_REG(unit,winNum), baseReg);
+    
+    /* Write to Size Register */
+    MV_REG_WRITE(XOR_SIZE_MASK_REG(unit,winNum), sizeReg);
+    
+    for (chan = 0; chan < MV_XOR_MAX_CHAN_PER_UNIT; chan++) {
+        if (pAddrDecWin->enable)
+            MV_REG_BIT_SET(XOR_WINDOW_CTRL_REG(unit,chan),
+			    XEXWCR_WIN_EN_MASK(winNum));
+	else
+	    MV_REG_BIT_RESET(XOR_WINDOW_CTRL_REG(unit,chan),
+			    XEXWCR_WIN_EN_MASK(winNum));
+    }
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvXorTargetWinRead - Get xor peripheral target address window.
+*
+* DESCRIPTION:
+*		Get xor peripheral target address window.
+*
+* INPUT:
+*	  winNum - One of the possible XOR memory decode windows.
+*
+* OUTPUT:
+*       base   - Window base address.
+*       size   - Window size.
+*       enable - window enable/disable.
+*
+* RETURN:
+*       MV_BAD_PARAM if parameters to function invalid, MV_OK otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvXorTargetWinRead(MV_U32 unit,MV_U32 winNum, MV_UNIT_WIN_INFO *pAddrDecWin)
+{
+    MV_U32  sizeReg, baseReg;
+    MV_U32  chan=0,chanWinEn;
+
+    /* Parameter checking */
+    if (winNum >= XOR_MAX_ADDR_DEC_WIN) {
+	DB(mvOsPrintf("%s: ERR. Invalid win num %d\n",__FUNCTION__ , winNum));
+        return MV_ERROR;
+    }
+
+    if (NULL == pAddrDecWin) {
+        DB(mvOsPrintf("%s: ERR. pAddrDecWin is NULL pointer\n", __FUNCTION__ ));
+        return MV_BAD_PTR;
+    }
+
+    chanWinEn = MV_REG_READ(XOR_WINDOW_CTRL_REG(unit,0)) & XEXWCR_WIN_EN_MASK(winNum);
+    
+    for (chan = 0; chan < MV_XOR_MAX_CHAN_PER_UNIT; chan++) { /* we should scan here all channels per unit */
+    	/* Check if enable bit is equal for all channels */
+        if ((MV_REG_READ(XOR_WINDOW_CTRL_REG(unit,chan)) & 
+             XEXWCR_WIN_EN_MASK(winNum)) != chanWinEn) {
+            mvOsPrintf("%s: ERR. Window enable field must be equal in "
+                              "all channels(chan=%d)\n",__FUNCTION__, chan);
+            return MV_ERROR;
+        }
+    }
+
+    baseReg  = MV_REG_READ(XOR_BASE_ADDR_REG(unit,winNum));
+    sizeReg  = MV_REG_READ(XOR_SIZE_MASK_REG(unit,winNum));
+
+    pAddrDecWin->addrWin.size = (sizeReg & XESMRX_SIZE_MASK_MASK) >> XESMRX_SIZE_MASK_OFFS;
+    pAddrDecWin->addrWin.size = (pAddrDecWin->addrWin.size + 1) * XOR_WIN_SIZE_ALIGN;
+
+    pAddrDecWin->addrWin.baseLow = baseReg & XEBARX_BASE_MASK;
+    pAddrDecWin->addrWin.baseHigh =  0;
+
+    /* attrib and targetId */
+    pAddrDecWin->attrib = (baseReg & XEBARX_ATTR_MASK) >> XEBARX_ATTR_OFFS;
+    pAddrDecWin->targetId = (baseReg & XEBARX_TARGET_MASK) >> XEBARX_TARGET_OFFS;
+
+    if(chanWinEn)
+	pAddrDecWin->enable = MV_TRUE;
+    else
+	pAddrDecWin->enable = MV_FALSE;
+	
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvXorTargetWinEnable - Enable/disable a Xor address decode window
+*
+* DESCRIPTION:
+*       This function enable/disable a XOR address decode window.
+*       if parameter 'enable' == MV_TRUE the routine will enable the 
+*       window, thus enabling XOR accesses (before enabling the window it is 
+*       tested for overlapping). Otherwise, the window will be disabled.
+*
+* INPUT:
+*       winNum - Decode window number.
+*       enable - Enable/disable parameter.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_BAD_PARAM if parameters to function invalid, MV_OK otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvXorTargetWinEnable(MV_U32 unit,MV_U32 winNum, MV_BOOL enable)
+{
+    MV_UNIT_WIN_INFO	addrDecWin;
+    MV_U32		chan;
+    
+    /* Parameter checking   */               
+    if (winNum >= XOR_MAX_ADDR_DEC_WIN) {
+        DB(mvOsPrintf("%s: ERR. Invalid winNum%d\n", __FUNCTION__, winNum));
+        return MV_ERROR;
+    }
+
+    if (enable == MV_TRUE) {
+	/* Get current window */
+	if (MV_OK != mvXorTargetWinRead(unit,winNum, &addrDecWin)) {
+	    DB(mvOsPrintf("%s: ERR. targetWinGet fail\n", __FUNCTION__));
+	    return MV_ERROR;
+	}
+
+	/* Check for overlapping */
+	if (MV_TRUE == xorWinOverlapDetect(unit,winNum, &(addrDecWin.addrWin))) {
+	    /* Overlap detected	*/
+	    DB(mvOsPrintf("%s: ERR. Overlap detected\n", __FUNCTION__));
+	    return MV_ERROR;
+	}
+
+	/* No Overlap. Enable address decode target window */
+	for (chan = 0; chan < MV_XOR_MAX_CHAN_PER_UNIT; chan++) {
+	    MV_REG_BIT_SET(XOR_WINDOW_CTRL_REG(unit,chan),
+			    XEXWCR_WIN_EN_MASK(winNum));
+	}
+    } else {
+	/* Disable address decode target window */
+	for (chan = 0; chan < MV_XOR_MAX_CHAN_PER_UNIT; chan++) {
+	    MV_REG_BIT_RESET(XOR_WINDOW_CTRL_REG(unit,chan),
+			    XEXWCR_WIN_EN_MASK(winNum));
+	}
+    }
+
+    return MV_OK;                  
+}
+
+/*******************************************************************************
+* mvXorSetProtWinSet - Configure access attributes of a XOR engine
+*                               to one of the XOR memory windows.
+*
+* DESCRIPTION:
+*       Each engine can be configured with access attributes for each of the
+*       memory spaces. This function sets access attributes 
+*       to a given window for the given engine
+*
+* INPUTS:
+*       chan    - One of the possible engines.
+*       winNum  - One of the possible XOR memory spaces.
+*       access  - Protection access rights.
+*       write   - Write rights.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_BAD_PARAM if parameters to function invalid, MV_OK otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvXorProtWinSet (MV_U32 unit,MV_U32 chan, MV_U32 winNum, MV_BOOL access, 
+                           MV_BOOL write)
+{
+    MV_U32 temp;
+
+    /* Parameter checking   */
+    if (chan >= MV_XOR_MAX_CHAN_PER_UNIT)
+    {
+	DB(mvOsPrintf("%s: ERR. Invalid chan num %d\n", __FUNCTION__ , chan));
+        return MV_BAD_PARAM;
+    }
+    if (winNum >= XOR_MAX_ADDR_DEC_WIN)
+    {
+	DB(mvOsPrintf("%s: ERR. Invalid win num %d\n", __FUNCTION__, winNum));
+        return MV_BAD_PARAM;
+    }
+
+    temp = MV_REG_READ(XOR_WINDOW_CTRL_REG(unit,chan)) & 
+        (~XEXWCR_WIN_ACC_MASK(winNum));
+
+    /* if access is disable */
+    if (!access)
+    {
+        /* disable access */
+        temp |= XEXWCR_WIN_ACC_NO_ACC(winNum);
+    }
+    /* if access is enable */
+    else
+    {
+        /* if write is enable */
+        if (write)
+        {
+            /* enable write */
+            temp |= XEXWCR_WIN_ACC_RW(winNum);
+        }
+        /* if write is disable */
+        else
+        {
+            /* disable write */
+            temp |= XEXWCR_WIN_ACC_RO(winNum);
+        }
+    }
+    MV_REG_WRITE(XOR_WINDOW_CTRL_REG(unit,chan),temp);
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvXorPciRemap - Set XOR remap register for PCI address windows.
+*
+* DESCRIPTION:
+*       only Windows 0-3 can be remapped.
+*
+* INPUT:
+*       winNum      - window number
+*       pAddrDecWin  - pointer to address space window structure
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_BAD_PARAM if parameters to function invalid, MV_OK otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvXorPciRemap(MV_U32 unit,MV_U32 winNum, MV_U32 addrHigh)
+{
+    /* Parameter checking   */
+    if (winNum >= XOR_MAX_REMAP_WIN)
+    {
+	DB(mvOsPrintf("%s: ERR. Invalid win num %d\n", __FUNCTION__, winNum));
+        return MV_BAD_PARAM;
+    }
+
+    MV_REG_WRITE(XOR_HIGH_ADDR_REMAP_REG(unit,winNum), addrHigh);
+    return MV_OK;
+}
+
+/*******************************************************************************
+* xorWinOverlapDetect - Detect XOR address windows overlaping
+*
+* DESCRIPTION:
+*       An unpredicted behaviour is expected in case XOR address decode 
+*       windows overlaps.
+*       This function detects XOR address decode windows overlaping of a 
+*       specified window. The function does not check the window itself for 
+*       overlaping. The function also skipps disabled address decode windows.
+*
+* INPUT:
+*       winNum      - address decode window number.
+*       pAddrDecWin - An address decode window struct.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE if the given address window overlap current address
+*       decode map, MV_FALSE otherwise, MV_ERROR if reading invalid data 
+*       from registers.
+*
+*******************************************************************************/
+static MV_STATUS xorWinOverlapDetect(MV_U32 unit,MV_U32 winNum, MV_ADDR_WIN *pAddrWin)
+{
+    MV_U32		baseAddrEnableReg;
+    MV_U32		winNumIndex,chan;
+    MV_UNIT_WIN_INFO	addrDecWin;
+
+    if (pAddrWin == NULL) {
+	DB(mvOsPrintf("%s: ERR. pAddrWin is NULL pointer\n", __FUNCTION__ ));
+	return MV_BAD_PTR;
+    }
+
+    for (chan = 0; chan < MV_XOR_MAX_CHAN_PER_UNIT; chan++) {
+	/* Read base address enable register. Do not check disabled windows	*/
+	baseAddrEnableReg = MV_REG_READ(XOR_WINDOW_CTRL_REG(unit,chan));
+
+	for (winNumIndex = 0; winNumIndex < XOR_MAX_ADDR_DEC_WIN; winNumIndex++) {
+	    /* Do not check window itself */
+	    if (winNumIndex == winNum)
+		continue;
+
+	    /* Do not check disabled windows */
+	    if ((baseAddrEnableReg & XEXWCR_WIN_EN_MASK(winNumIndex)) == 0)
+		continue;
+
+	    /* Get window parameters */
+	    if (MV_OK != mvXorTargetWinRead(unit,winNumIndex, &addrDecWin)) {
+		DB(mvOsPrintf("%s: ERR. TargetWinGet failed\n", __FUNCTION__ ));
+		return MV_ERROR;
+	    }
+
+	    if (MV_TRUE == mvWinOverlapTest(pAddrWin, &(addrDecWin.addrWin)))
+		return MV_TRUE;
+	}
+    }
+
+    return MV_FALSE;
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/pmu/mvSram.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/pmu/mvSram.h
@@ -0,0 +1,109 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCMVsramh
+#define __INCMVsramh
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#define PMU_SRAM_SIZE		0x800
+#define PMU_SRAM_BASE		0xD00DC000
+
+/* Assembler labels */
+extern MV_VOID mvPmuSramDdrReconfigFunc(MV_U32, MV_U32, MV_U32);
+extern MV_U32 mvPmuSramDdrReconfigFuncSZ;
+extern MV_VOID mvPmuSramDeepIdleEnterFunc(MV_U32);
+extern MV_U32 mvPmuSramDeepIdleEnterFuncSZ;
+extern MV_VOID mvPmuSramDeepIdleExitFunc(MV_VOID);
+extern MV_U32 mvPmuSramDeepIdleExitFuncSZ;
+extern MV_VOID mvPmuSramStandbyEnterFunc(MV_VOID);
+extern MV_U32 mvPmuSramStandbyEnterFuncSZ;
+extern MV_VOID mvPmuSramStandbyExitFunc(MV_VOID);
+extern MV_U32 mvPmuSramStandbyExitFuncSZ;
+extern MV_VOID mvPmuSramCpuDfsFunc(MV_VOID);
+extern MV_U32 mvPmuSramCpuDfsFuncSZ;
+
+extern MV_U32 mvPmuSramFuncSTART(MV_VOID);
+extern MV_U32 mvPmuSramFuncSZ;
+
+
+/* Function APIs */
+MV_STATUS 	mvPmuSramInit (MV_32 ddrTermGpioCtrl, MV_U32 ckeMppNum);
+MV_VOID 	mvPmuSramDdrReconfig(MV_U32 paramcnt);
+MV_STATUS 	mvPmuSramDdrTimingPrep(MV_U32 ddrFreq, MV_U32 cpuFreq, MV_U32 * cnt);
+MV_VOID 	mvPmuSramDeepIdle(MV_U32 ddrSelfRefresh);
+MV_VOID 	mvPmuSramStandby(MV_VOID);
+MV_STATUS 	mvPmuSramDeepIdleResumePrep(MV_VOID);
+MV_STATUS 	mvPmuSramStandbyResumePrep(MV_U32 ddrFreq);
+MV_VOID 	mvPmuSramCpuDfs(MV_VOID);
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* __INCMVsramh */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/pmu/mvPmuRegs.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/pmu/mvPmuRegs.h
@@ -0,0 +1,595 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCMVpmuRegsh
+#define __INCMVpmuRegsh
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvSysPmuConfig.h"
+
+/****************/
+/* PM Registers */
+/****************/
+
+/* CPU Subsystem DFS Control Register */
+#define PMU_CPU_DFS_CTRL_REG		(MV_PMU_REGS_BASE + 0x0)
+#define PMU_DFS_CTRL_DFS_EN_OFFS	0
+#define PMU_DFS_CTRL_DFS_EN_MASK	(0x1 << PMU_DFS_CTRL_DFS_EN_OFFS)
+#define PMU_DFS_CTRL_SLOW_SPD_OFFS	1
+#define PMU_DFS_CTRL_SLOW_SPD_MASK	(0x1 << PMU_DFS_CTRL_SLOW_SPD_OFFS)
+#define PMU_DFS_CTRL_DDR_RATIO_OFFS	3
+#define PMU_DFS_CTRL_DDR_RATIO_MASK	(0x3F << PMU_DFS_CTRL_DDR_RATIO_OFFS)
+#define PMU_DFS_CTRL_L2_RATIO_OFFS	9
+#define PMU_DFS_CTRL_L2_RATIO_MASK	(0x3F << PMU_DFS_CTRL_L2_RATIO_OFFS)
+#define PMU_DFS_CTRL_CHNG_PLL_EN_OFFS	16
+#define PMU_DFS_CTRL_CHNG_PLL_EN_MASK	(0x1 << PMU_DFS_CTRL_CHNG_PLL_EN_OFF)
+#define PMU_DFS_CTRL_CHNG_RATIO_OFFS	20
+#define PMU_DFS_CTRL_CHNG_RATIO_MASK	(0x1 << PMU_DFS_CTRL_CHNG_RATIO_OFFS)
+
+/* CPU Subsystem DFS Status Register */
+#define PMU_DFS_STATUS_REG		(MV_PMU_REGS_BASE + 0x4)
+#define PMU_DFS_STAT_SLOW_OFFS		1
+#define PMU_DFS_STAT_SLOW_MASK		(0x1 << PMU_DFS_STAT_SLOW_OFFS)
+#define PMU_DFS_STAT_DDR_RATIO_OFFS	3
+#define PMU_DFS_STAT_DDR_RATIO_MASK	(0x3F << PMU_DFS_STAT_DDR_RATIO_OFFS)
+#define PMU_DFS_STAT_L2_RATIO_OFFS	9
+#define PMU_DFS_STAT_L2_RATIO_MASK	(0x3F << PMU_DFS_STAT_L2_RATIO_OFFS)
+
+/* CPU DVS Control Register */
+#define PMU_CPU_DVS_CTRL_REG		(MV_PMU_REGS_BASE + 0x10)
+#define PMU_DVS_CTRL_PMIC_SADDR_OFFS	0
+#define PMU_DVS_CTRL_PMIC_SADDR_MASK	(0xF << PMU_DVS_CTRL_PMIC_SADDR_OFFS)
+#define PMU_DVS_CTRL_PMIC_RADDR_OFFS	4
+#define PMU_DVS_CTRL_PMIC_RADDR_MASK	(0xF << PMU_DVS_CTRL_PMIC_RADDR_OFFS)
+#define PMU_DVS_CTRL_PMIC_VSET_OFFS	8
+#define PMU_DVS_CTRL_PMIC_VSET_MASK	(0xF << PMU_DVS_CTRL_PMIC_VSET_OFFS)
+#define PMU_DVS_CTRL_PMIC_PSET_OFFS	12
+#define PMU_DVS_CTRL_PMIC_PSET_MASK	(0xF << PMU_DVS_CTRL_PMIC_PSET_OFFS)
+#define PMU_DVS_CTRL_DVS_EN_OFFS	16
+#define PMU_DVS_CTRL_DVS_EN_MASK	(0x1 << PMU_DVS_CTRL_DVS_EN_OFFS)
+
+/* CPU DVS Status Register */
+#define PMU_DVS_STAT_Reg		(MV_PMU_REGS_BASE + 0x14)
+#define PMU_DVS_STAT_PMIC_SADDR_OFFS	0
+#define PMU_DVS_STAT_PMIC_SADDR_MASK	(0xF << PMU_DVS_STAT_PMIC_SADDR_OFFS)
+#define PMU_DVS_STAT_PMIC_RADDR_OFFS	4
+#define PMU_DVS_STAT_PMIC_RADDR_MASK	(0xF << PMU_DVS_STAT_PMIC_RADDR_OFFS)
+#define PMU_DVS_STAT_PMIC_VSET_OFFS	8
+#define PMU_DVS_STAT_PMIC_VSET_MASK	(0xF << PMU_DVS_STAT_PMIC_VSET_OFFS)
+#define PMU_DVS_STAT_PMIC_PSET_OFFS	12
+#define PMU_DVS_STAT_PMIC_PSET_MASK	(0xF << PMU_DVS_STAT_PMIC_PSET_OFFS)
+
+/* CPU DVS Delay Register */
+#define PMU_DVS_DELAY_REG		(MV_PMU_REGS_BASE + 0x18)
+
+/* Thermal Manager Control and Status Register */
+#define PMU_THERMAL_MNGR_REG		(MV_PMU_REGS_BASE + 0x1C)
+#define PMU_TM_DISABLE_OFFS		0
+#define PMU_TM_DISABLE_MASK		(0x1 << PMU_TM_DISABLE_OFFS)
+#define PMU_TM_CURR_TEMP_OFFS		1
+#define PMU_TM_CURR_TEMP_MASK		(0x1FF << PMU_TM_CURR_TEMP_OFFS)
+#define PMU_TM_COOL_THRSH_OFFS		10
+#define PMU_TM_COOL_THRSH_MASK		(0x1FF << PMU_TM_COOL_THRSH_OFFS)
+#define PMU_TM_OVRHEAT_THRSH_OFFS	19
+#define PMU_TM_OVRHEAT_THRSH_MASK	(0x1FF << PMU_TM_OVRHEAT_THRSH_OFFS)
+
+/* Thermal Manager Overheat Delay Register */
+#define PMU_TM_OVRHEAT_DLY_REG		(MV_PMU_REGS_BASE + 0x20)
+
+/* Thermal Manager Cooling Delay Register */
+#define PMU_TM_COOLING_DLY_REG		(MV_PMU_REGS_BASE + 0x24)
+
+/* Software Reset Control Register */
+#define PMU_SW_RST_CTRL_REG		(MV_PMU_REGS_BASE + 0x30)
+#define PMU_SW_RST_USB0_MASK		(0x1 << 0)
+#define PMU_SW_RST_GIGA_MASK		(0x1 << 2)
+#define PMU_SW_RST_SATA_MASK		(0x1 << 3)
+#define PMU_SW_RST_PEX0_MASK		(0x1 << 4)
+#define PMU_SW_RST_PEX1_MASK		(0x1 << 5)
+#define PMU_SW_RST_SDIO0_MASK		(0x1 << 8)
+#define PMU_SW_RST_SDIO1_MASK		(0x1 << 9)
+#define PMU_SW_RST_NAND_MASK		(0x1 << 10)
+#define PMU_SW_RST_CAMERA_MASK		(0x1 << 11)
+#define PMU_SW_RST_AUDIO0_MASK		(0x1 << 12)
+#define PMU_SW_RST_AUDIO1_MASK		(0x1 << 13)
+#define PMU_SW_RST_XOR_MASK		(0x1 << 14)
+#define PMU_SW_RST_CESA_MASK		(0x1 << 15)
+#define PMU_SW_RST_VIDEO_MASK		(0x1 << 16)
+#define PMU_SW_RST_LCD_MASK		(0x1 << 17)
+#define PMU_SW_RST_GPU_MASK		(0x1 << 18)
+#define PMU_SW_RST_AC97_MASK		(0x1 << 21)
+#define PMU_SW_RST_PDMA_MASK		(0x1 << 22)
+
+/* Clock Gating Control Register */
+#define PMU_CLK_GATING_CTRL_REG		(MV_PMU_REGS_BASE + 0x38)
+
+/* CPU PLL Control 0 Register */
+#define PMU_PLL_CTRL_0_REG		(MV_PMU_REGS_BASE + 0x3c)
+#define PMU_PLL_N_DIVIDER_OFFS		0
+#define PMU_PLL_N_DIVIDER_MASK		(0x1FF << PMU_PLL_N_DIVIDER_OFFS)
+#define PMU_PLL_M_DIVIDER_OFFS		9
+#define PMU_PLL_M_DIVIDER_MASK		(0x1FF << PMU_PLL_M_DIVIDER_OFFS)
+#define PMU_PLL_K_DIVIDER_OFFS		18
+#define PMU_PLL_K_DIVIDER_MASK		(0x7 << PMU_PLL_K_DIVIDER_OFFS)
+
+/* CPU Clock Divider Control 0 Register */
+#define PMU_CLK_DIVIDER_0_REG		(MV_PMU_REGS_BASE + 0x44)
+#define PMU_CLK_DIV_PPRATIO_OFFS	0
+#define PMU_CLK_DIV_PPRATIO_MASK	(0x3F << PMU_CLK_DIV_PPRATIO_OFFS)
+#define PMU_CLK_DIV_BPRATIO_OFFS	8
+#define PMU_CLK_DIV_BPRATIO_MASK	(0x3F << PMU_CLK_DIV_BPRATIO_OFFS)
+#define PMU_CLK_DIV_XPRATIO_OFFS	16
+#define PMU_CLK_DIV_XPRATIO_MASK	(0x3F << PMU_CLK_DIV_XPRATIO_OFFS)
+#define PMU_CLK_DIV_DPRATIO_OFFS	24
+#define PMU_CLK_DIV_DPRATIO_MASK	(0x3F << PMU_CLK_DIV_DPRATIO_OFFS)
+
+/* CPU Clock Divider Control 1 Register */
+#define PMU_CLK_DIVIDER_1_REG		(MV_PMU_REGS_BASE + 0x48)
+#define PMU_CLK1_DIV_D2CLK_PLL_OFFS	8
+#define PMU_CLK1_DIV_D2CLK_PLL_DDR	(0x0 << PMU_CLK1_DIV_D2CLK_PLL_OFFS)
+#define PMU_CLK1_DIV_D2CLK_PLL_CPU	(0x1 << PMU_CLK1_DIV_D2CLK_PLL_OFFS)
+
+/* PMU Interrupts Cause + MASK Registers */
+#define PMU_INT_CAUSE_REG		(MV_PMU_REGS_BASE + 0x50)
+#define PMU_INT_MASK_REG		(MV_PMU_REGS_BASE + 0x54)
+#define PMU_INT_DFS_DONE_MASK		(0x1 << 0)
+#define PMU_INT_DVS_DONE_MASK		(0x1 << 1)
+#define PMU_INT_COOLING_MASK		(0x1 << 3)
+#define PMU_INT_OVRHEAT_MASK		(0x1 << 4)
+#define PMU_INT_RTC_ALARM_MASK		(0x1 << 5)
+#define PMU_INT_BAT_FAULT_MASK		(0x1 << 6)
+#define PMU_INT_EXT0_WKUP_MASK		(0x1 << 7)
+#define PMU_INT_EXT1_WKUP_MASK		(0x1 << 8)
+#define PMU_INT_EXT2_WKUP_MASK		(0x1 << 9)
+
+/* IO Power Down Control Register */
+#define PMU_IO_PWRDWN_CTRL_REG		(MV_PMU_REGS_BASE + 0x58)
+#define PMU_IO_PWRDWN_AUDIO_MASK	(0x1 << 0)
+#define PMU_IO_PWRDWN_CAMERA_MASK	(0x1 << 1)
+#define PMU_IO_PWRDWN_GBE_MASK		(0x1 << 2)
+#define PMU_IO_PWRDWN_LCD_MASK		(0x1 << 3)
+#define PMU_IO_PWRDWN_NAND_MASK		(0x1 << 4)
+#define PMU_IO_PWRDWN_SDIO_MASK		(0x1 << 5)
+#define PMU_IO_PWRDWN_SPI_MASK		(0x1 << 6)
+#define PMU_IO_PWRDWN_PEX0_MASK		(0x1 << 16)
+#define PMU_IO_PWRDWN_PEX1_MASK		(0x1 << 17)
+
+/* Theraml Diode Control 0 Register */
+#define PMU_TEMP_DIOD_CTRL0_REG		(MV_PMU_REGS_BASE + 0x5C)
+#define PMU_TDC0_PWR_DWN_MASK		(0x1 << 0)
+#define PMU_TDC0_SW_RST_MASK		(0x1 << 1)
+#define PMU_TDC0_TC_TRIP_OFFS		2
+#define PMU_TDC0_TC_TRIP_MASK		(0x7 << PMU_TDC0_TC_TRIP_OFFS)
+#define PMU_TDC0_SEL_VCAL_OFFS		5
+#define PMU_TDC0_SEL_VCAL_MASK		(0x3 << PMU_TDC0_SEL_VCAL_OFFS)
+#define PMU_TDC0_VBE_BYPS_MASK		(0x1 << 7)
+#define PMU_TDC0_SELF_RFRNC_MASK	(0x1 << 8)
+#define PMU_TDC0_A_TEST_OFFS		9
+#define PMU_TDC0_A_TEST_MASK		(0x3 << PMU_TDC0_A_TEST_OFFS)
+#define PMU_TDC0_REF_CAL_CNT_OFFS	11
+#define PMU_TDC0_REF_CAL_CNT_MASK	(0x1FF << PMU_TDC0_REF_CAL_CNT_OFFS)
+#define PMU_TDC0_CAL_CAP_SRC_OFFS	20
+#define PMU_TDC0_CAL_CAP_SRC_MASK	(0x7 << PMU_TDC0_CAL_CAP_SRC_OFFS)
+#define PMU_TDC0_RSRV_MASK		(0x3 << 23)
+#define PMU_TDC0_AVG_NUM_OFFS		25
+#define PMU_TDC0_AVG_NUM_MASK		(0x7 << PMU_TDC0_AVG_NUM_OFFS)
+#define PMU_TDC0_DBL_SLOP_MASK		(0x1 << 28)
+#define PMU_TDC0_OTF_CAL_MASK		(0x1 << 29)
+#define PMU_TDC0_SLEEP_EN_MASK		(0x1 << 30)
+
+/* Thermal Diode Control 1 Register */
+#define PMU_TEMP_DIOD_CTRL1_REG		(MV_PMU_REGS_BASE + 0x60)
+#define PMU_TDC1_CAL_STRT_VAL_OFFS	0
+#define PMU_TDC1_CAL_STRT_VAL_MASK	(0xFF << PMU_TDC1_CAL_STRT_VAL_OFFS)
+#define PMU_TDC1_STRT_CAL_MASK		(0x1 << 8)
+#define PMU_TDC1_CAL_STAT_MASK		(0x1 << 9)
+#define PMU_TDC1_TEMP_VLID_MASK		(0x1 << 10)
+
+/* PMU General Control Register */
+#define PMU_GNRL_CTRL_REG		(MV_PMU_REGS_BASE + 0x70)
+#define PMU_GCTRL_CLK_CHNG_MASK		(0x1 << 0)
+#define PMU_GCTRL_CLK_SRC_MASK		(0x1 << 1)
+
+/* PMU DFS Procs Program Counter 0 Register */
+#define PMU_DFS_PROC_PC_0_REG		(MV_PMU_REGS_BASE + 0x100)
+#define PMU_DFS_PRE_PC_OFFS		0
+#define PMU_DFS_PRE_PC_MASK		(0x7FF << PMU_DFS_PRE_PC_OFFS)
+#define PMU_DFS_PRE_PC_VAL		(16 << PMU_DFS_PRE_PC_OFFS)
+#define PMU_DFS_CPU_PC_OFFS		16
+#define PMU_DFS_CPU_PC_MASK		(0x7FF << PMU_DFS_CPU_PC_OFFS)
+#define PMU_DFS_CPU_PC_VAL		(35 << PMU_DFS_CPU_PC_OFFS)
+
+/* PMU DFS Procs Program Counter 1 Register */
+#define PMU_DFS_PROC_PC_1_REG		(MV_PMU_REGS_BASE + 0x104)
+#define PMU_DFS_DDR_PC_OFFS		0
+#define PMU_DFS_DDR_PC_MASK		(0x7FF << PMU_DFS_DDR_PC_OFFS)
+#define PMU_DFS_DDR_PC_VAL		(50 << PMU_DFS_DDR_PC_OFFS)
+#define PMU_DFS_L2_PC_OFFS		16
+#define PMU_DFS_L2_PC_MASK		(0x7FF << PMU_DFS_L2_PC_OFFS)
+#define PMU_DFS_L2_PC_VAL		(70 << PMU_DFS_L2_PC_OFFS)
+
+/* PMU DFS Procs Program Counter 2 Register */
+#define PMU_DFS_PROC_PC_2_REG		(MV_PMU_REGS_BASE + 0x108)
+#define PMU_DFS_PLL_PC_OFFS		0
+#define PMU_DFS_PLL_PC_MASK		(0x7FF << PMU_DFS_PLL_PC_OFFS)
+#define PMU_DFS_PLL_PC_VAL		(80 << PMU_DFS_PLL_PC_OFFS)
+#define PMU_DFS_POST_PC_OFFS		16
+#define PMU_DFS_POST_PC_MASK		(0x7FF << PMU_DFS_POST_PC_OFFS)
+#define PMU_DFS_POST_PC_VAL		(120 << PMU_DFS_POST_PC_OFFS)
+
+/* PMU DVS Procs Program Counter Register */
+#define PMU_DVS_PROC_PC_REG		(MV_PMU_REGS_BASE + 0x10C)
+#define PMU_DVS_PRE_PC_OFFS		0
+#define PMU_DVS_PRE_PC_MASK		(0x7FF << PMU_DVS_PRE_PC_OFFS)
+#define PMU_DVS_PRE_PC_VAL		(150 << PMU_DVS_PRE_PC_OFFS)
+#define PMU_DVS_POST_PC_OFFS		16
+#define PMU_DVS_POST_PC_MASK		(0x7FF << PMU_DVS_POST_PC_OFFS)
+#define PMU_DVS_POST_PC_VAL		(170 << PMU_DVS_POST_PC_OFFS)
+
+/* PMU DeepIdle and Standby Procs Program Counter Register */
+#define PMU_DEEPIDLE_STBY_PROC_PC_REG	(MV_PMU_REGS_BASE + 0x110)
+#define PMU_DPIDL_PC_OFFS		0
+#define PMU_DPIDL_PC_MASK		(0x7FF << PMU_DPIDL_PC_OFFS)
+#define PMU_DPIDL_PC_VAL		(200 << PMU_DPIDL_PC_OFFS)
+#define PMU_STBY_PRE_PC_OFFS		16
+#define PMU_STBY_PRE_PC_MASK		(0x7FF << PMU_STBY_PRE_PC_OFFS)
+#define PMU_STBY_PRE_PC_VAL		(350 << PMU_STBY_PRE_PC_OFFS)
+
+/* PMU Standby Procs Program Counter Register */
+#define PMU_STBY_PROC_PC_REG		(MV_PMU_REGS_BASE + 0x114)
+#define PMU_STBY_DDR_PC_OFFS		0
+#define PMU_STBY_DDR_PC_MASK		(0x7FF << PMU_STBY_DDR_PC_OFFS)
+#define PMU_STBY_DDR_PC_VAL		(450 << PMU_STBY_DDR_PC_OFFS)
+#define PMU_STBY_POST_PC_OFFS		16
+#define PMU_STBY_POST_PC_MASK		(0x7FF << PMU_STBY_POST_PC_OFFS)
+#define PMU_STBY_POST_PC_VAL		(452 << PMU_STBY_POST_PC_OFFS)
+
+/* PMU Thermal Procs Program Counter Register */
+#define PMU_THERM_PROC_PC_REG		(MV_PMU_REGS_BASE + 0x118)
+#define PMU_OVERHEAT_PC_OFFS		0
+#define PMU_OVERHEAT_PC_MASK		(0x7FF << PMU_OVERHEAT_PC_OFFS)
+#define PMU_COOLING_PC_OFFS		16
+#define PMU_COOLING_MASK		(0x7FF << PMU_COOLING_PC_OFFS)
+
+/* PMU Program Register */
+#define PMU_PROGRAM_REG(n)		(MV_PMU_REGS_BASE + 0x500 + (n & 0x1FC))
+#define PMU_PROGRAM_OFFS(n)		((n & 0x3) << 3)
+#define PMU_PROGRAM_MASK(n)		(0xFF << PMU_PROGRAM_OFFS(n))
+
+/* PMU Control Register */
+#define	PMU_CTRL_REG			(MV_PMU_REGS_BASE + 0x8000)
+#define PMU_CTRL_L2_LOWLEAK_EN_OFFS	0
+#define PMU_CTRL_L2_LOWLEAK_EN_MASK	(0x1 << PMU_CTRL_L2_LOWLEAK_EN_OFFS)
+#define PMU_CTRL_LCD_RFRSH_EN_OFFS	2
+#define PMU_CTRL_LCD_RFRSH_EN_MASK	(0x1 << PMU_CTRL_LCD_RFRSH_EN_OFFS)
+#define PMU_CTRL_DEEPIDLE_MODE_EN_OFFS	3
+#define PMU_CTRL_DEEPIDLE_MODE_EN_MASK	(0x1 << PMU_CTRL_DEEPIDLE_MODE_EN_OFFS)
+#define PMU_CTRL_STANDBY_MODE_EN_OFFS	4
+#define PMU_CTRL_STANDBY_MODE_EN_MASK	(0x1 << PMU_CTRL_STANDBY_MODE_EN_OFFS)
+#define PMU_CTRL_DDR_SLF_RFRSH_EN_OFFS	5
+#define PMU_CTRL_DDR_SLF_RFRSH_EN_MASK	(0x1 << PMU_CTRL_DDR_SLF_RFRSH_EN_OFFS)
+#define PMU_CTRL_MC_HALT_REQ_OFFS	16
+#define PMU_CTRL_MC_HALT_REQ_MASK	(0x1 << PMU_CTRL_MC_HALT_REQ_OFFS)
+#define PMU_CTRL_MC_HALT_ACK_OFFS	17
+#define PMU_CTRL_MC_HALT_ACK_MASK	(0x1 << PMU_CTRL_MC_HALT_ACK_OFFS)
+#define PMU_CTRL_MC_SR_REQ_OFFS		18
+#define PMU_CTRL_MC_SR_REQ_MASK		(0x1 << PMU_CTRL_MC_SR_REQ_OFFS)
+#define PMU_CTRL_MC_SR_ACK_OFFS		19
+#define PMU_CTRL_MC_SR_ACK_MASK		(0x1 << PMU_CTRL_MC_SR_ACK_OFFS)
+#define PMU_CTRL_MASK_IRQ_OFFS		24
+#define PMU_CTRL_MASK_IRQ_MASK		(0x1 << PMU_CTRL_MASK_IRQ_OFFS)
+#define PMU_CTRL_MASK_FIQ_OFFS		28
+#define PMU_CTRL_MASK_FIQ_MASK		(0x1 << PMU_CTRL_MASK_FIQ_OFFS)
+
+/* PMU Status Register */
+#define PMU_STATUS_REG			(MV_PMU_REGS_BASE + 0x8004)
+#define PMU_STATUS_L2_LOWLEAK_OFFS	0
+#define PMU_STATUS_L2_LOWLEAK_MASK	(0x1 << PMU_STATUS_L2_LOWLEAK_OFFS)
+#define PMU_STATUS_LCD_RFRSH_OFFS	2
+#define PMU_STATUS_LCD_RFRSH_MASK	(0x1 << PMU_STATUS_LCD_RFRSH_OFFS)
+#define PMU_STATUS_DEEPIDLE_OFFS	3
+#define PMU_STATUS_DEEPIDLE_MASK	(0x1 << PMU_STATUS_DEEPIDLE_OFFS)
+#define PMU_STATUS_STANDBY_OFFS		4
+#define PMU_STATUS_STANDBY_MASK		(0x1 << PMU_STATUS_STANDBY_OFFS)
+
+/* Standby Mode Wake-up Events Control Register */
+#define PMU_STBY_WKUP_EVENT_CTRL_REG	(MV_PMU_REGS_BASE + 0x8008)
+#define PMU_STBY_WKUP_CTRL_RTC_OFFS	0
+#define PMU_STBY_WKUP_CTRL_RTC_MASK	(0x1 << PMU_STBY_WKUP_CTRL_RTC_OFFS)
+#define PMU_STBY_WKUP_CTRL_EXT0_OFFS	1
+#define PMU_STBY_WKUP_CTRL_EXT0_MASK	(0x3 << PMU_STBY_WKUP_CTRL_EXT0_OFFS)
+#define PMU_STBY_WKUP_CTRL_EXT0_DIS	(0x0 << PMU_STBY_WKUP_CTRL_EXT0_OFFS)
+#define PMU_STBY_WKUP_CTRL_EXT0_RISE	(0x1 << PMU_STBY_WKUP_CTRL_EXT0_OFFS)
+#define PMU_STBY_WKUP_CTRL_EXT0_FALL	(0x2 << PMU_STBY_WKUP_CTRL_EXT0_OFFS)
+#define PMU_STBY_WKUP_CTRL_EXT1_OFFS	3
+#define PMU_STBY_WKUP_CTRL_EXT1_MASK	(0x3 << PMU_STBY_WKUP_CTRL_EXT1_OFFS)
+#define PMU_STBY_WKUP_CTRL_EXT1_DIS	(0x0 << PMU_STBY_WKUP_CTRL_EXT1_OFFS)
+#define PMU_STBY_WKUP_CTRL_EXT1_RISE	(0x1 << PMU_STBY_WKUP_CTRL_EXT1_OFFS)
+#define PMU_STBY_WKUP_CTRL_EXT1_FALL	(0x2 << PMU_STBY_WKUP_CTRL_EXT1_OFFS)
+#define PMU_STBY_WKUP_CTRL_EXT2_OFFS	5
+#define PMU_STBY_WKUP_CTRL_EXT2_MASK	(0x3 << PMU_STBY_WKUP_CTRL_EXT2_OFFS)
+#define PMU_STBY_WKUP_CTRL_EXT2_DIS	(0x0 << PMU_STBY_WKUP_CTRL_EXT2_OFFS)
+#define PMU_STBY_WKUP_CTRL_EXT2_RISE	(0x1 << PMU_STBY_WKUP_CTRL_EXT2_OFFS)
+#define PMU_STBY_WKUP_CTRL_EXT2_FALL	(0x2 << PMU_STBY_WKUP_CTRL_EXT2_OFFS)
+#define PMU_STBY_WKUP_CTRL_BAT_FALT_OFFS 7
+#define PMU_STBY_WKUP_CTRL_BAT_FALT_MASK (0x1 << PMU_RTBY_WKUP_CTRL_BAT_FALT_OFFS)
+#define PMU_STBY_WKUP_CTRL_ALL_EV_MASK	(0xFF << 0)
+
+/* Standby Mode Wake-up Events Status Register */
+#define PMU_STBY_WKUP_EVENT_STAT_REG	(MV_PMU_REGS_BASE + 0x800C)
+#define PMU_STBY_WKUP_STAT_RTC_OFFS	0
+#define PMU_STBY_WKUP_STAT_RTC_MASK	(0x1 << PMU_STBY_WKUP_STAT_RTC_OFFS)
+#define PMU_STBY_WKUP_STAT_EXT0_OFFS	1
+#define PMU_STBY_WKUP_STAT_EXT0_MASK	(0x1 << PMU_STBY_WKUP_STAT_EXT0_OFFS)
+#define PMU_STBY_WKUP_STAT_EXT1_OFFS	3
+#define PMU_STBY_WKUP_STAT_EXT1_MASK	(0x1 << PMU_STBY_WKUP_STAT_EXT1_OFFS)
+#define PMU_STBY_WKUP_STAT_EXT2_OFFS	5
+#define PMU_STBY_WKUP_STAT_EXT2_MASK	(0x1 << PMU_STBY_WKUP_STAT_EXT2_OFFS)
+#define PMU_STBY_WKUP_STAT_BAT_FALT_OFFS 7
+#define PMU_STBY_WKUP_STAT_BAT_FALT_MASK (0x1 << PMU_STBY_WKUP_STAT_BAT_FALT_OFFS)
+#define PMU_STBY_WKUP_STAT_ALL_EV_MASK	(0xF << 0)
+
+/* PMU Power Supply Control Register */
+#define PMU_PWR_SUPLY_CTRL_REG		(MV_PMU_REGS_BASE + 0x8010)
+#define PMU_PWR_GOOD_PIN_EN_OFFS	0
+#define PMU_PWR_GOOD_PIN_EN_MASK	(0x1 << PMU_PWR_GOOD_PIN_EN_OFFS)
+#define PMU_PWR_CPU_OFF_LEVEL_OFFS	1
+#define PMU_PWR_CPU_OFF_LEVEL_MASK	(0x1 << PMU_PWR_CPU_OFF_LEVEL_OFFS)
+#define PMU_PWR_GPU_PWR_DWN_OFFS	2
+#define PMU_PWR_GPU_PWR_DWN_MASK	(0x1 << PMU_PWR_GPU_PWR_DWN_OFFS)
+#define PMU_PWR_VPU_PWR_DWN_OFFS	3
+#define PMU_PWR_VPU_PWR_DWN_MASK	(0x1 << PMU_PWR_VPU_PWR_DWN_OFFS)
+#define PMU_PWR_CPU_ON_LEVEL_OFFS	4
+#define PMU_PWR_CPU_ON_LEVEL_MASK	(0x1 << PMU_PWR_CPU_ON_LEVEL_OFFS)
+#define PMU_PWR_STBY_OFF_LEVEL_OFFS	5
+#define PMU_PWR_STBY_OFF_LEVEL_MASK	(0x1 << PMU_PWR_STBY_OFF_LEVEL_OFFS)
+#define PMU_PWR_STBY_PWRGOOD_EN_OFFS	6
+#define PMU_PWR_STBY_PWRGOOD_EN_MASK	(0x1 << PMU_PWR_STBY_PWRGOOD_EN_OFFS)
+#define PMU_PWR_STBY_ON_LEVEL_OFFS	7
+#define PMU_PWR_STBY_ON_LEVEL_MASK	(0x1 << PMU_PWR_STBY_ON_LEVEL_OFFS)
+#define PMU_PWR_POWER_GATE_OFFS		8
+#define PMU_PWR_POWER_GATE_MASK		(0xFF << PMU_PWR_POWER_GATE_OFFS)
+#define PMU_PWR_DDR_PHY_RST_MSK_OFFS	31
+#define PMU_PWR_DDR_PHY_RST_MSK_MASK	(0x1 << PMU_PWR_DDR_PHY_RST_MSK_OFFS)
+
+/* CPU power up Delay Register */
+#define PMU_CPU_PWR_DELAY_REG		(MV_PMU_REGS_BASE + 0x8014)
+
+/* Standby power up Delay Register */
+#define PMU_STANDBY_PWR_DELAY_REG	(MV_PMU_REGS_BASE + 0x8018)
+
+/* Battery Management Control Register */
+#define PMU_BAT_MNGMT_CTRL_REG		(MV_PMU_REGS_BASE + 0x801C)
+#define PMU_BAT_FLT_DISABLE_OFFS	0
+#define PMU_BAT_FLT_DISABLE_MASK	(0x1 << PMU_BAT_FLT_DISABLE_OFFS)
+#define PMU_BAT_FLT_STBY_EXIT_DIS_OFFS	1
+#define PMU_BAT_FLT_STBY_EXIT_DIS_MASK	(0x1 << PMU_BAT_FLT_STBY_EXIT_DIS_OFFS)
+
+/* PMU Signal selector Control 0 Register */
+#define PMU_SIG_SLCT_CTRL_0_REG		(MV_PMU_REGS_BASE + 0x802C)
+#define PMU_SIG_0_SLCT_CTRL_OFFS	0
+#define PMU_SIG_0_SLCT_CTRL_MASK	(0xF << PMU_SIG_0_SLCT_CTRL_OFFS)
+#define PMU_SIG_1_SLCT_CTRL_OFFS	4
+#define PMU_SIG_1_SLCT_CTRL_MASK	(0xF << PMU_SIG_1_SLCT_CTRL_OFFS)
+#define PMU_SIG_2_SLCT_CTRL_OFFS	8
+#define PMU_SIG_2_SLCT_CTRL_MASK	(0xF << PMU_SIG_2_SLCT_CTRL_OFFS)
+#define PMU_SIG_3_SLCT_CTRL_OFFS	12
+#define PMU_SIG_3_SLCT_CTRL_MASK	(0xF << PMU_SIG_3_SLCT_CTRL_OFFS)
+#define PMU_SIG_4_SLCT_CTRL_OFFS	16
+#define PMU_SIG_4_SLCT_CTRL_MASK	(0xF << PMU_SIG_4_SLCT_CTRL_OFFS)
+#define PMU_SIG_5_SLCT_CTRL_OFFS	20
+#define PMU_SIG_5_SLCT_CTRL_MASK	(0xF << PMU_SIG_5_SLCT_CTRL_OFFS)
+#define PMU_SIG_6_SLCT_CTRL_OFFS	24
+#define PMU_SIG_6_SLCT_CTRL_MASK	(0xF << PMU_SIG_6_SLCT_CTRL_OFFS)
+#define PMU_SIG_7_SLCT_CTRL_OFFS	28
+#define PMU_SIG_7_SLCT_CTRL_MASK	(0xF << PMU_SIG_7_SLCT_CTRL_OFFS)
+
+/* PMU Signal selector Control 1 Register */
+#define PMU_SIG_SLCT_CTRL_1_REG		(MV_PMU_REGS_BASE + 0x8030)
+#define PMU_SIG_8_SLCT_CTRL_OFFS	0
+#define PMU_SIG_8_SLCT_CTRL_MASK	(0xF << PMU_SIG_8_SLCT_CTRL_OFFS)
+#define PMU_SIG_9_SLCT_CTRL_OFFS	4
+#define PMU_SIG_9_SLCT_CTRL_MASK	(0xF << PMU_SIG_9_SLCT_CTRL_OFFS)
+#define PMU_SIG_10_SLCT_CTRL_OFFS	8
+#define PMU_SIG_10_SLCT_CTRL_MASK	(0xF << PMU_SIG_10_SLCT_CTRL_OFFS)
+#define PMU_SIG_11_SLCT_CTRL_OFFS	12
+#define PMU_SIG_11_SLCT_CTRL_MASK	(0xF << PMU_SIG_11_SLCT_CTRL_OFFS)
+#define PMU_SIG_12_SLCT_CTRL_OFFS	16
+#define PMU_SIG_12_SLCT_CTRL_MASK	(0xF << PMU_SIG_12_SLCT_CTRL_OFFS)
+#define PMU_SIG_13_SLCT_CTRL_OFFS	20
+#define PMU_SIG_13_SLCT_CTRL_MASK	(0xF << PMU_SIG_13_SLCT_CTRL_OFFS)
+#define PMU_SIG_14_SLCT_CTRL_OFFS	24
+#define PMU_SIG_14_SLCT_CTRL_MASK	(0xF << PMU_SIG_14_SLCT_CTRL_OFFS)
+#define PMU_SIG_15_SLCT_CTRL_OFFS	28
+#define PMU_SIG_15_SLCT_CTRL_MASK	(0xF << PMU_SIG_15_SLCT_CTRL_OFFS)
+
+/* PMU Blink Period Control Register */
+#define PMU_BLINK_PERIOD_CTRL_REG	(MV_PMU_REGS_BASE + 0x8034)
+
+/* PMU Blink Duty Cycle Control Register */
+#define PMU_BLINK_DUTY_CYCLE_CTRL_REG	(MV_PMU_REGS_BASE + 0x8038)
+
+/* PMU ISO Control Register */
+#define PMU_ISO_CTRL_REG		(MV_PMU_REGS_BASE + 0x8058)
+#define PMU_ISO_VIDEO_MASK		(0x1 << 0)
+#define PMU_ISO_GPU_MASK		(0x1 << 1)
+#define PMU_ISO_CPU_MASK		(0x1 << 2)
+#define PMU_ISO_CORE_MASK		(0x1 << 3)
+
+/* PMU RAM Control Register */
+#define PMU_RAM_CTRL_REG		(MV_PMU_REGS_BASE + 0x8060)
+#define PMU_RAM_EMA_A_OFFS		0
+#define PMU_RAM_EMA_A_MASK		(0x7 << PMU_RAM_EMA_A_OFFS)
+#define PMU_RAM_EMA_B_OFFS		3
+#define PMU_RAM_EMA_B_MASK		(0x7 << PMU_RAM_EMA_B_OFFS)
+#define PMU_RAM_PWR_OFFS		8
+#define PMU_RAM_PWR_MASK		(0x1 << PMU_RAM_PWR_OFFS)
+
+/* CPU Idle Timer Value Register */
+#define PMU_CPU_IDLE_TMR_VAL_REG	(MV_PMU_REGS_BASE + 0x8070)
+
+/* CPU Idle High Threshold Register */
+#define PMU_CPU_IDLE_HI_THRSHLD_REG	(MV_PMU_REGS_BASE + 0x8074)
+
+/* CPU Idle Low Threshold Register */
+#define PMU_CPU_IDLE_LOW_THRSHLD_REG	(MV_PMU_REGS_BASE + 0x8078)
+
+/* CPU Idle Result Register */
+#define PMU_CPU_IDLE_RESULT_REG		(MV_PMU_REGS_BASE + 0x807C)
+
+/* MC Idle Timer Value Register */
+#define PMU_MC_IDLE_TMR_VAL_REG		(MV_PMU_REGS_BASE + 0x8080)
+
+/* MC Idle High Threshold Register */
+#define PMU_MC_IDLE_HI_THRSHLD_REG	(MV_PMU_REGS_BASE + 0x8084)
+
+/* MC Idle Low Threshold Register */
+#define PMU_MC_IDLE_LOW_THRSHLD_REG	(MV_PMU_REGS_BASE + 0x8088)
+
+/* MC Idle Result Register */
+#define PMU_MC_IDLE_RESULT_REG		(MV_PMU_REGS_BASE + 0x808C)
+
+/* PMU Idle Statistics Control And Status Register */
+#define PMU_IDLE_CTRL_STAT_REG		(MV_PMU_REGS_BASE + 0x8090)
+#define PMU_CPU_IDLE_HI_MASK_OFFS	0
+#define PMU_CPU_IDLE_HI_MASK_MASK	(0x1 << PMU_CPU_IDLE_HI_MASK_OFFS)
+#define PMU_CPU_IDLE_LOW_MASK_OFFS	1
+#define PMU_CPU_IDLE_LOW_MASK_MASK	(0x1 << PMU_CPU_IDLE_LOW_MASK_OFFS)
+#define PMU_MC_IDLE_HI_MASK_OFFS	2
+#define PMU_MC_IDLE_HI_MASK_MASK	(0x1 << PMU_MC_IDLE_HI_MASK_OFFS)
+#define PMU_MC_IDLE_LOW_MASK_OFFS	3
+#define PMU_MC_IDLE_LOW_MASK_MASK	(0x1 << PMU_MC_IDLE_LOW_MASK_OFFS)
+#define PMU_CPU_IDLE_HI_STAT_OFFS	8
+#define PMU_CPU_IDLE_HI_STAT_MASK	(0x1 << PMU_CPU_IDLE_HI_STAT_OFFS)
+#define PMU_CPU_IDLE_LOW_STAT_OFFS	9
+#define PMU_CPU_IDLE_LOW_STAT_MASK	(0x1 << PMU_CPU_IDLE_LOW_STAT_OFFS)
+#define PMU_MC_IDLE_HI_STAT_OFFS	10
+#define PMU_MC_IDLE_HI_STAT_MASK	(0x1 << PMU_MC_IDLE_HI_STAT_OFFS)
+#define PMU_MC_IDLE_LOW_STAT_OFFS	11
+#define PMU_MC_IDLE_LOW_STAT_MASK	(0x1 << PMU_MC_IDLE_LOW_STAT_OFFS)
+
+/* PMU Resume Control Register */
+#define PMU_RESUME_CTRL_REG		(MV_PMU_REGS_BASE + 0x8100)
+#define PMU_RC_DISC_CNT_OFFS		0
+#define PMU_RC_DISC_CNT_MASK		(0x7 << PMU_RC_DISC_CNT_OFFS)
+#define PMU_RC_WIN6_TARGET_OFFS		4
+#define PMU_RC_WIN6_TARGET_MASK		(0xF << PMU_RC_WIN6_TARGET_OFFS)
+#define PMU_RC_WIN6_ATTR_OFFS		8
+#define PMU_RC_WIN6_ATTR_MASK		(0xFF << PMU_RC_WIN6_ATTR_OFFS)
+#define PMU_RC_WIN6_BASE_OFFS		16
+#define PMU_RC_WIN6_BASE_MASK		(0xFFFF << PMU_RC_WIN6_BASE_OFFS)
+
+/* PMU Resume Address Register */
+#define PMU_RESUME_ADDR_REG		(MV_PMU_REGS_BASE + 0x8104)
+
+/* PMU Resume Descriptor Control Register */
+#define PMU_RESUME_DESC_CTRL_REG(n)	(MV_PMU_REGS_BASE + 0x8108 + (n*8))
+#define PMU_RD_CTRL_DISC_TYPE_OFFS	0
+#define PMU_RD_CTRL_DISC_TYPE_MASK	(0xF << PMU_RD_CTRL_DISC_TYPE_OFFS)
+#define PMU_RD_CTRL_DISC_TYPE_NONE	(0x0 << PMU_RD_CTRL_DISC_TYPE_OFFS)
+#define PMU_RD_CTRL_DISC_TYPE_32AV	(0x1 << PMU_RD_CTRL_DISC_TYPE_OFFS)
+#define PMU_RD_CTRL_DISC_TYPE_16AV	(0x2 << PMU_RD_CTRL_DISC_TYPE_OFFS)
+#define PMU_RD_CTRL_DISC_TYPE_8AV	(0x3 << PMU_RD_CTRL_DISC_TYPE_OFFS)
+#define PMU_RD_CTRL_DISC_TYPE_32AMV	(0x4 << PMU_RD_CTRL_DISC_TYPE_OFFS)
+#define PMU_RD_CTRL_DISC_TYPE_32BC	(0x5 << PMU_RD_CTRL_DISC_TYPE_OFFS)
+#define PMU_RD_CTRL_DISC_TYPE_32BS	(0x6 << PMU_RD_CTRL_DISC_TYPE_OFFS)
+#define PMU_RD_CTRL_DISC_TYPE_POLL	(0x7 << PMU_RD_CTRL_DISC_TYPE_OFFS)
+#define PMU_RD_CTRL_DISC_TYPE_DELY	(0x8 << PMU_RD_CTRL_DISC_TYPE_OFFS)
+#define PMU_RD_CTRL_DISC_TYPE_DDR3WL	(0x9 << PMU_RD_CTRL_DISC_TYPE_OFFS)
+#define PMU_RD_CTRL_DISC_TYPE_DDR3WL_SET (0xA << PMU_RD_CTRL_DISC_TYPE_OFFS)
+#define PMU_RD_CTRL_CFG_CNT_OFFS	4
+#define PMU_RD_CTRL_CFG_CNT_MASK	(0x7FF << PMU_RD_CTRL_CFG_CNT_OFFS)
+#define PMU_RD_CTRL_CFG_DLY_OFFS	15
+#define PMU_RD_CTRL_CFG_DLY_MASK	(0x1FFFF << PMU_RD_CTRL_CFG_DLY_OFFS)
+
+/* PMU Resume Descriptor Address Register */
+#define PMU_RESUME_DESC_ADDR_REG(n)	(MV_PMU_REGS_BASE + 0x810C + (n*8))
+
+/* PMU SRAM - scratch pad */
+#define PMU_SCRATCHPAD_SIZE		0x800
+#define PMU_SP_TERM_OFF_CTRL_ADDR	(PMU_SCRATCHPAD_INT_BASE + 0x00) 	/* MV_PMU_SRAM_DATA.term_ctrl.addr */
+#define PMU_SP_TERM_OFF_MASK_ADDR	(PMU_SCRATCHPAD_INT_BASE + 0x04)	/* MV_PMU_SRAM_DATA.term_ctrl.mask */
+#define PMU_SP_TERM_OFF_VAL_ADDR	(PMU_SCRATCHPAD_INT_BASE + 0x08)	/* MV_PMU_SRAM_DATA.term_ctrl.off_val */
+#define PMU_SP_CKE_NIB_MASK_ADDR	(PMU_SCRATCHPAD_INT_BASE + 0x0C)	/* MV_PMU_SRAM_DATA.cke_mask.nib_mask */
+#define PMU_SP_CKE_NIB_FRC_ADDR		(PMU_SCRATCHPAD_INT_BASE + 0x10)	/* MV_PMU_SRAM_DATA.cke_mask.nib_frc */
+#define PMU_SP_CKE_NIB_REL_ADDR		(PMU_SCRATCHPAD_INT_BASE + 0x14)	/* MV_PMU_SRAM_DATA.cke_mask.nib_rel */
+#define PMU_SP_CKE_BIT_MASK_ADDR	(PMU_SCRATCHPAD_INT_BASE + 0x18)	/* MV_PMU_SRAM_DATA.cke_mask.bit_mask */
+#define PMU_SP_TERM_OFF_CTRL_ADDR_PHYS	(PMU_SCRATCHPAD_INT_BASE_PHYS + 0x00)
+#define PMU_SP_TERM_OFF_MASK_ADDR_PHYS	(PMU_SCRATCHPAD_INT_BASE_PHYS + 0x04)
+#define PMU_SP_TERM_OFF_VAL_ADDR_PHYS	(PMU_SCRATCHPAD_INT_BASE_PHYS + 0x08)
+#define PMU_SP_CKE_NIB_MASK_ADDR_PHYS	(PMU_SCRATCHPAD_INT_BASE_PHYS + 0x0C)
+#define PMU_SP_CKE_NIB_FRC_ADDR_PHYS	(PMU_SCRATCHPAD_INT_BASE_PHYS + 0x10)
+#define PMU_SP_CKE_NIB_REL_ADDR_PHYS	(PMU_SCRATCHPAD_INT_BASE_PHYS + 0x14)
+#define PMU_SP_CKE_BIT_MASK_ADDR_PHYS	(PMU_SCRATCHPAD_INT_BASE_PHYS + 0x18)
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* __INCMVpmuRegsh */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/pmu/mvPmu.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/pmu/mvPmu.h
@@ -0,0 +1,225 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCMVpmuh
+#define __INCMVpmuh
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "mvCommon.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvSysPmuConfig.h"
+
+/********************/
+/* SRAM definitions */
+/********************/
+#define PMU_SRAM_SIZE		0x800
+#define PMU_SRAM_BASE		0xD00DC000
+
+/***************************/
+/* Enumeration Definitions */
+/***************************/
+
+/* PMU Signal source selector options */
+typedef enum
+{
+	PMU_SIGNAL_NC = 0x0,
+	PMU_SIGNAL_0 = 0x1,
+	PMU_SIGNAL_1 = 0x2,
+	PMU_SIGNAL_SDI = 0x3,
+	PMU_SIGNAL_CPU_PWRDWN = 0x4,
+	PMU_SIGNAL_SLP_PWRDWN = 0x5,
+	PMU_SIGNAL_CPU_PWRGOOD = 0x8,
+	PMU_SIGNAL_BAT_FAULT = 0xA,
+	PMU_SIGNAL_EXT0_WKUP = 0xB,
+	PMU_SIGNAL_EXT1_WKUP = 0xC,
+	PMU_SIGNAL_EXT2_WKUP = 0xD,
+	PMU_SIGNAL_BLINK = 0xE,
+/*
+ * Following are virtiual values. The value set in the PMU signal selector is masked with 0xF
+ */
+	PMU_SIGNAL_MRESET_OVRID = 0x10,	/* Converted to 0x0 ==> NC after masking - Pull-UP */
+	PMU_SIGNAL_CKE_OVRID = 0x11	/* Converted to 0x1 ==> force '0' after masking  - CKE normal */
+} MV_PMU_SIG_SRC;
+
+/* CPU Clock Speed - DFS */
+typedef enum
+{
+	CPU_CLOCK_TURBO = 0x0,
+	CPU_CLOCK_SLOW = 0x1
+} MV_PMU_CPU_SPEED;
+
+/*************************/
+/* Structure Definitions */
+/*************************/
+
+/* PMU init structure */
+typedef struct 
+{
+	MV_BOOL     	L2LowLeakEn; 	/* enable/disable L2 retention enable in WFI */
+	MV_BOOL		batFltMngDis;	/* Disable the handling of battery fault assertion */
+	MV_BOOL     	exitOnBatFltDis;/* Disable resume in battery fault situation in Standby */
+	MV_PMU_SIG_SRC	sigSelctor[16]; /* PMU signal selector of signal 0-15 */
+	MV_U32		dvsDelay;	/* Delay for waiting the voltage change to complete in TCLK CC */
+	MV_32		ddrTermGpioNum; /* GPIO number used for DDR termination 0-31 or -1 */
+	MV_U32		standbyPwrDelay;/* Delay needed to wait for power up in 32Khz CC */
+} MV_PMU_INFO;
+
+/* System Frequencies */
+typedef struct
+{
+	MV_U32		cpuFreq;
+	MV_U32		axiFreq;
+	MV_U32		l2Freq;
+	MV_U32		ddrFreq;
+	MV_U32		pllFreq;
+} MV_PMU_FREQ_INFO;
+
+/* Temp sensor configuration structure */
+typedef struct
+{
+	MV_U32		overheatDelay;	/* Time to wait before declaring an overheat event */
+	MV_U32		coolingDelay;	/* Time to wait before declaring a normal temperature */
+	MV_BOOL		powerDown;	/* Power down the temperature sensor */
+	MV_U8		tcTrip;		/* Temperature curves of the band-gap circuit */
+	MV_U8		selVcal;	/* Selects the high level of referance for calibration */
+	MV_BOOL		vbeBypass;	/* Dynamic range of sensor reduced by half */
+	MV_BOOL		selRefIcc;	/* Select referance current source from ICC */
+	MV_U8		aTest;		/* */
+	MV_U8		refCalCount;	/* Referance Value for calibration */
+	MV_U8		selCalCapInt;	/* Select timing internal capacitor */
+	MV_U8		averageNumber;	/* Average No/2/4/8/16/32 */
+	MV_BOOL		selDblSlope;	/* Helps in reducing offsets in the sensor */
+	MV_BOOL		otfCal;		/* Enable on the fly calibration */
+	MV_BOOL		sleepEnable;	/* Put the sensor in sleep mode */
+	MV_U8		initCalibVal;	/* Initial value for Diode Calibration */
+} MV_TEMP_SNSR_INFO;
+
+
+/* PMU Wakeup Events */
+#define PMU_WAKE_ON_NONE       0x00
+#define PMU_WAKE_ON_RTC        0x01
+#define PMU_WAKE_ON_EXT0_RISE  0x02
+#define PMU_WAKE_ON_EXT0_FALL  0x04
+#define PMU_WAKE_ON_EXT1_RISE  0x08
+#define PMU_WAKE_ON_EXT1_FALL  0x10
+#define PMU_WAKE_ON_EXT2_RISE  0x20
+#define PMU_WAKE_ON_EXT3_FALL  0x40
+#define PMU_WAKE_ON_BAT_FAIL   0x80
+
+/* Unit Clock Gate Mask */
+#define PMU_CLOCK_GATE_USB0    0x1
+#define PMU_CLOCK_GATE_USB1    0x2
+#define PMU_CLOCK_GATE_GBE     0x4
+#define PMU_CLOCK_GATE_SATA    0x8
+#define PMU_CLOCK_GATE_PEX0    0x10
+#define PMU_CLOCK_GATE_PEX1    0x20
+#define PMU_CLOCK_GATE_SDI0    0x100
+#define PMU_CLOCK_GATE_SDI1    0x200
+#define PMU_CLOCK_GATE_NAND    0x400
+#define PMU_CLOCK_GATE_CAM     0x800
+#define PMU_CLOCK_GATE_AUD0    0x1000
+#define PMU_CLOCK_GATE_AUD1    0x2000
+#define PMU_CLOCK_GATE_AC97    0x20000
+#define PMU_CLOCK_GATE_PDMA    0x40000
+
+/* Function Prototypes */
+MV_STATUS mvPmuInit 		(MV_PMU_INFO * pPmu);
+MV_STATUS mvPmuDeepIdle		(MV_BOOL lcdRefresh);
+MV_STATUS mvPmuStandby		(MV_VOID);
+MV_STATUS mvPmuWakeupEventSet 	(MV_U32 wkupEvents);
+MV_STATUS mvPmuWakeupEventGet	(MV_U32 * wkupEvents);
+MV_STATUS mvPmuCpuFreqScale 	(MV_PMU_CPU_SPEED cpuSpeed);
+MV_STATUS mvPmuSysFreqScale 	(MV_U32 ddrFreq, MV_U32 l2Freq, MV_U32 cpuFreq);
+MV_STATUS mvPmuVoltageScale 	(MV_U32 pSet, MV_U32 vSet, MV_U32 rAddr, MV_U32 sAddr);
+MV_STATUS mvPmuClockGateSet 	(MV_U32 unitMask, MV_BOOL gateStatus);
+MV_STATUS mvPmuClockGateGet 	(MV_BOOL * gateStatus);
+MV_STATUS mvPmuTempThresholdSet (MV_U32 coolThr, MV_U32 overheatThr, MV_BOOL thrMngrEn);
+MV_STATUS mvPmuTempThresholdGet (MV_U32 * coolThr, MV_U32 * overheatThr, MV_BOOL * thrMngrEn);
+MV_STATUS mvPmuTempGet 		(MV_U32 *temp);
+MV_STATUS mvPmuTempSensorCfgSet (MV_TEMP_SNSR_INFO tempInfo);
+MV_STATUS mvPmuTempSensorCalib  (MV_VOID);
+MV_STATUS mvPmuGpuPowerDown	(MV_BOOL pwrStat);
+MV_STATUS mvPmuVpuPowerDown	(MV_BOOL pwrStat);
+MV_STATUS mvPmuGetCurrentFreq	(MV_PMU_FREQ_INFO * freqs);
+MV_STATUS mvPmuCpuSetOP 	(MV_PMU_CPU_SPEED cpuSpeed, MV_BOOL dvsEnable);
+MV_VOID   mvPmuCpuIdleThresholdsSet	(MV_U32 hiThreshold, MV_U32 lowThreshold);
+MV_VOID   mvPmuCpuIdleTimeBaseValueSet	(MV_U32 timeBase);
+MV_VOID   mvPmuCpuIdleIntMaskSet	(MV_BOOL hiIntEnable, MV_BOOL lowIntEnable);
+MV_U32 	  mvPmuCpuIdleTimeGet		(void);
+MV_VOID   mvPmuCpuIdleIntStatGet	(MV_BOOL *hiIntStat, MV_BOOL *lowIntStat);
+MV_VOID   mvPmuMcIdleThresholdsSet	(MV_U32 hiThreshold, MV_U32 lowThreshold);
+MV_VOID   mvPmuMcIdleTimeBaseValueSet	(MV_U32 timeBase);
+MV_VOID   mvPmuMcIdleIntMaskSet		(MV_BOOL hiIntEnable, MV_BOOL lowIntEnable);
+MV_U32 	  mvPmuMcIdleTimeGet		(void);
+MV_VOID   mvPmuMcIdleIntStatGet		(MV_BOOL *hiIntStat, MV_BOOL *lowIntStat);
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* __INCMVpmuh */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/pmu/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/pmu/Makefile
@@ -0,0 +1,7 @@
+include $(srctree)/$(subst ",,$(CONFIG_MV_HAL_RULES_PATH))
+# Objects list
+obj-$(CONFIG_MV_INCLUDE_PMU) += mvPmu.o
+obj-$(CONFIG_MV_INCLUDE_PMU) += mvPmu_asm.o
+obj-$(CONFIG_MV_INCLUDE_PMU) += mvSram.o
+
+AFLAGS_mvPmu_asm.o := -I$(srctree)/arch/arm/plat-orion/mv_hal_drivers/linux_oss -I$(srctree)/arch/arm/plat-orion/mv_hal_drivers/common -I$(srctree)/arch/arm/plat-orion/mv_hal_drivers/mv_hal -I$(srctree)/arch/arm/plat-orion/mv_hal_drivers/mv_hal/sata/CoreDriver/  -I$(srctree)/arch/arm/mach-dove/mv_hal_support/dove_family -I$(srctree)/arch/arm/mach-dove/mv_hal_support -I$(srctree)/arch/arm/mach-dove/mv_hal_support/config -I$(srctree)/arch/arm/mach-dove/mv_hal_support/mv_hal_sys -DMV_LINUX -DMV_CPU_LE -DMV_ARM -DLINUX
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/pmu/mvSram.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/pmu/mvSram.c
@@ -0,0 +1,656 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvSysPmuConfig.h"
+#include "mvPmuRegs.h"
+#include "mvPmu.h"
+#include "mvSram.h"
+#include "ddr/mvDramIf.h"
+
+/* Constants */
+#define PMU_MAX_DESCR_CNT		7		
+#define PMU_STANDBY_DESCR_CNT		5
+#define PMU_DEEPIDLE_DESCR_CNT		0
+#define PMU_SP_TARGET_ID		0xD
+#define PMU_SP_ATTRIBUTE		0x0
+#define MV_PMU_POST_CFG_CNT		4			/* 3 window cfgs and DDR3 WL ODT fix */
+
+/* Defines */
+//#define MV_PMU_FULL_DDR3_WL					/* Enable FULL DDR3 write leveling */
+
+/* Type Definitions */
+typedef struct
+{
+	MV_U32	addr;						/* Addres fo read/modify/write */
+	MV_U32	mask;						/* mask of bits to overide */
+	MV_U32	off_val;					/* value to powerr off terminations */
+} DDR_TERM_CTRL;
+
+typedef struct
+{
+	MV_U32	nib_mask;					/* PMU Signal selector niblle mask used to force CKE */
+	MV_U32	nib_frc;					/* Niblle value used to force CKE '0' @ Standby entry */
+	MV_U32	nib_rel;					/* Niblle value used to release CKE @ Standby exit */
+	MV_U32	bit_mask;					/* Bit mask of MPP used to foce CKE */
+} MV_PMU_CKE_MASK;
+
+typedef struct
+{
+	MV_U32	addr;
+	MV_U32	val;
+} MV_PMU_AV_CFGS;
+
+typedef struct
+{
+	DDR_TERM_CTRL		term_ctrl;			/* Space Holder for DDR termination ctrl */
+	MV_PMU_CKE_MASK		cke_mask;			/* Space Holder for CKE WA Mask */
+	MV_DDR_INIT_POLL_AMV	init_poll;			/* DDR initialization polling info */
+	MV_DDR_BIT_CLR_AM	mask_clr;			/* CKE and M_RESET cleaing info */
+#ifdef MV_PMU_FULL_DDR3_WL
+	MV_DDR3_WL_TYP		ddr3_wl;			/* DDR3 full write leveling info */
+#else
+	MV_DDR3_WL_SET_VAL	ddr3_wl;			/* DDR3 write leveling set info */ 
+#endif
+	MV_PMU_AV_CFGS		post_cfg[MV_PMU_POST_CFG_CNT];	/* Post DDR init configurations */	 
+} MV_PMU_SRAM_DATA;
+
+/* Statics */
+static MV_PMU_AV_CFGS post_init_cfgs[MV_PMU_POST_CFG_CNT] = {
+				{0xD0800770, 0x0100000A},	/* Set DDR ODT settings */
+				{0xD0800010, 0xF1800000},	/* Set DDR register space */
+                        	{0xD00D025C, 0x000F1890},	/* Set NB register space */
+				{0xD0020080, 0xF1000000},	/* Set SB register space */
+				};
+
+/* SRAM allocated data pointers */
+static MV_VOID * _mvPmuSramDataPtr;				/* Pointer to start of data section */
+static MV_VOID * _mvPmuSramDdrTermCtrlPtr;			/* External Read-only access */
+static MV_VOID * _mvPmuSramDdrTermCtrlPtrInt;			/* Internal Read-write access */
+static MV_VOID * _mvPmuSramCkeMaskCtrlPtr;			/* External Read-only access */
+static MV_VOID * _mvPmuSramCkeMaskCtrlPtrInt;			/* Internal Read-write access */
+static MV_VOID * _mvPmuSramDdrInitPollPtr;			/* External Read-only access */
+static MV_VOID * _mvPmuSramDdrInitPollPtrInt;			/* Internal Read-write access */
+static MV_VOID * _mvPmuSramDdrMresetPtr;			/* External Read-only access */
+static MV_VOID * _mvPmuSramDdrMresetPtrInt;			/* Internal Read-write access */
+static MV_VOID * _mvPmuSramDdr3wlPtr;				/* External Read-only access */
+static MV_VOID * _mvPmuSramDdr3wlPtrInt;			/* Internal Read-write access */
+static MV_VOID * _mvPmuSramPostInitPtr;				/* External Read-only access */
+static MV_VOID * _mvPmuSramPostInitPtrInt;			/* Internal Read-write access */
+
+/* DDR parameters pointer */
+static MV_VOID * _mvPmuSramDdrParamPtr;				/* External Read-only access */
+static MV_VOID * _mvPmuSramDdrParamPtrInt;			/* Internal Read-write access */
+
+/* SRAM functions pointer */
+static MV_VOID * _mvPmuSramPtr;					/* Pointer to start of code section */
+static MV_VOID (*_mvPmuSramDdrReconfigPtr)(MV_U32 cplPtr, MV_U32 cplCnt, MV_U32 dryRun);
+static MV_VOID (*_mvPmuSramDeepIdleEnterPtr)(MV_U32 ddrSelfRefresh);
+static MV_VOID (*_mvPmuSramDeepIdleExitPtr)(MV_VOID);
+static MV_VOID (*_mvPmuSramStandbyEnterPtr)(MV_VOID);
+static MV_VOID (*_mvPmuSramStandbyExitPtr)(MV_VOID);
+static MV_VOID (*_mvPmuSramCpuDfsPtr)(MV_VOID);
+
+/* Sram Markers */
+static unsigned long mvPmuSramOffs = 0x0;
+static unsigned long mvPmuSramSize = PMU_SCRATCHPAD_SIZE;
+
+/* Macros */
+#define PmuSpVirt2Phys(addr)	(((MV_U32)addr - DOVE_SCRATCHPAD_VIRT_BASE) + DOVE_SCRATCHPAD_PHYS_BASE)
+#define dbg_print(args...)
+//#define dbg_print(args...)	printk(KERN_WARNING args)
+#define PmuExt2Int(addr) 	((MV_VOID*)(((MV_U32)addr & (PMU_SCRATCHPAD_SIZE-1)) | (PMU_SCRATCHPAD_INT_BASE)))
+
+/*******************************************************************************
+* mvPmuSramRelocate - Relocate a function into the PMU SRAM
+*
+* DESCRIPTION:
+*   	Relocate a function into the SRAM to be executed from there.
+*
+* INPUT:
+*       start: starting address of the function to relocated
+*	size: size of the function to be relocated
+* OUTPUT:
+*	None
+* RETURN:
+*	None
+*******************************************************************************/
+static MV_VOID * mvPmuSramRelocate(MV_VOID * start, MV_U32 size)
+{
+	MV_VOID * fncptr;
+	MV_U32 * src;
+	MV_U32 * dst;
+	MV_U32 i;
+	MV_U32 orig_size = size;
+
+	/* Round up the size to a complete cache line */
+	size += 31;
+	size &= ~31;
+
+	if (size > mvPmuSramSize) {
+		dbg_print("No more space in SRAM for function relocation\n");
+		return NULL;
+	}
+
+	mvPmuSramSize -= size;
+
+	src = (MV_U32*)start;
+	dst = (MV_U32*)(PMU_SCRATCHPAD_INT_BASE + mvPmuSramOffs);
+
+	if (start)
+	{
+		for (i=0; i<orig_size; i+=4)
+		{
+			*dst = *src;
+			dst++;
+			src++;
+		}
+	}	
+
+	fncptr = (MV_VOID *)(PMU_SCRATCHPAD_EXT_BASE + mvPmuSramOffs);
+	mvPmuSramOffs += size;	
+	
+	dbg_print("\nmvPmuSramRelocate: From %08x to %08x (exec %08x), Size = %x\n", (MV_U32)start, (MV_U32)dst, (MV_U32)fncptr, (MV_U32)size);
+	return fncptr;
+}
+
+/*******************************************************************************
+* mvPmuSramDdrReconfig - Reconfigure the DDR parameters to new frequency
+*
+* DESCRIPTION:
+*   	This call executes from the SRAM and performs all configurations needed
+*	while having the DDR in self refresh
+*
+* INPUT:
+*	None
+* OUTPUT:
+*	None
+* RETURN:
+*	None
+*******************************************************************************/
+MV_VOID mvPmuSramDdrReconfig(MV_U32 paramcnt)
+{
+	if (!_mvPmuSramDdrReconfigPtr)
+		panic("Function not yet relocated in SRAM\n");
+
+	/* First DRY run to avoid speculative prefetches*/
+	_mvPmuSramDdrReconfigPtr((MV_U32)_mvPmuSramDdrParamPtrInt, paramcnt, 0);
+
+	/* Real run to perform the scalinf */
+	_mvPmuSramDdrReconfigPtr((MV_U32)_mvPmuSramDdrParamPtrInt, paramcnt, 1);
+	
+	return;
+}	
+
+/*******************************************************************************
+* mvPmuSramCpuDfs - Reconfigure the CPU speed
+*
+* DESCRIPTION:
+*   	This call executes from the SRAM and performs all configurations needed
+*	to change the CPU clock withoiut accessing the DDR
+*
+* INPUT:
+*	None
+* OUTPUT:
+*	None
+* RETURN:
+*	None
+*******************************************************************************/
+MV_VOID mvPmuSramCpuDfs(MV_VOID)
+{
+	if (!_mvPmuSramCpuDfsPtr)
+		panic("Function not yet relocated in SRAM\n");
+
+	return _mvPmuSramCpuDfsPtr();
+}
+
+/*******************************************************************************
+* mvPmuSramDeepIdle - Enter Deep Idle mode
+*
+* DESCRIPTION:
+*   	This call executes from the SRAM and performs all configurations needed
+*	to enter deep Idle mode (power down the CPU, VFP and caches)
+*
+* INPUT:
+*	ddrSelfRefresh: Enable/Disable (0x1/0x0) DDR selfrefresh while in Deep
+*                       Idle.
+* OUTPUT:
+*	None
+* RETURN:
+*	None
+*******************************************************************************/
+MV_VOID mvPmuSramDeepIdle(MV_U32 ddrSelfRefresh)
+{
+	if (!_mvPmuSramDeepIdleEnterPtr)
+		panic("Function not yet relocated in SRAM\n");
+
+	return _mvPmuSramDeepIdleEnterPtr(ddrSelfRefresh);
+}
+
+/*******************************************************************************
+* mvPmuSramStandby - Enter Standby mode
+*
+* DESCRIPTION:
+*   	This call executes from the SRAM and performs all configurations needed
+*	to enter standby mode (power down the whole SoC). On exiting the Standby
+*	mode the CPU returns from this call normally
+*
+* INPUT:
+*	lcdRefresh: LCD refresh mode, enabled/disabled
+* OUTPUT:
+*	None
+* RETURN:
+*	None
+*******************************************************************************/
+MV_VOID mvPmuSramStandby(MV_VOID)
+{
+	if (!_mvPmuSramStandbyEnterPtr)
+		panic("Function not yet relocated in SRAM\n");
+
+	return _mvPmuSramStandbyEnterPtr();
+}
+
+/*******************************************************************************
+* mvPmuSramInit - Load the PMU Sram with all calls functions needed for PMU
+*
+* DESCRIPTION:
+*   	Initialize the scratch pad SRAM region in the PMU so that all routines
+*	needed for deepIdle, standby and DVFS are relocated from the DDR into the
+*	SRAM
+*
+* INPUT:
+*       None
+* OUTPUT:
+*	None
+* RETURN:
+*    	MV_OK	: All Functions relocated to PMU SRAM successfully
+*	MV_FAIL	: At least on function failed relocation
+*******************************************************************************/
+MV_STATUS mvPmuSramInit (MV_32 ddrTermGpioCtrl, MV_U32 ckeMppNum)
+{
+	/* Allocate all data needed in the SRAM */
+	if ((_mvPmuSramDataPtr = mvPmuSramRelocate(NULL, sizeof(MV_PMU_SRAM_DATA))) == NULL)
+	{
+		dbg_print("Failed to allocate space for DATA on SRAM!\n");
+		return MV_FAIL;
+	}
+
+	/* Point out the extenal location of each field */
+	_mvPmuSramDdrTermCtrlPtr = (MV_VOID*) (_mvPmuSramDataPtr + offsetof(MV_PMU_SRAM_DATA, term_ctrl));
+	_mvPmuSramCkeMaskCtrlPtr = (MV_VOID*) (_mvPmuSramDataPtr + offsetof(MV_PMU_SRAM_DATA, cke_mask));
+	_mvPmuSramDdrInitPollPtr = (MV_VOID*) (_mvPmuSramDataPtr + offsetof(MV_PMU_SRAM_DATA, init_poll));
+	_mvPmuSramDdrMresetPtr = (MV_VOID*) (_mvPmuSramDataPtr + offsetof(MV_PMU_SRAM_DATA, mask_clr));
+	_mvPmuSramDdr3wlPtr = (MV_VOID*) (_mvPmuSramDataPtr + offsetof(MV_PMU_SRAM_DATA, ddr3_wl));
+	_mvPmuSramPostInitPtr = (MV_VOID*) (_mvPmuSramDataPtr + offsetof(MV_PMU_SRAM_DATA, post_cfg));
+
+	/* Convert DDR init poll address from External to Internal Space */
+	_mvPmuSramDdrTermCtrlPtrInt = PmuExt2Int(_mvPmuSramDdrTermCtrlPtr);
+	_mvPmuSramCkeMaskCtrlPtrInt = PmuExt2Int(_mvPmuSramCkeMaskCtrlPtr);
+	_mvPmuSramDdrInitPollPtrInt = PmuExt2Int(_mvPmuSramDdrInitPollPtr);
+	_mvPmuSramDdrMresetPtrInt = PmuExt2Int(_mvPmuSramDdrMresetPtr);
+	_mvPmuSramDdr3wlPtrInt = PmuExt2Int(_mvPmuSramDdr3wlPtr);
+	_mvPmuSramPostInitPtrInt = PmuExt2Int(_mvPmuSramPostInitPtr);
+
+	dbg_print("_mvPmuSramDataPtr          = %08x\n", (MV_U32)_mvPmuSramDataPtr);
+	dbg_print("_mvPmuSramDdrTermCtrlPtr   = %08x (Internal = %08x)\n", (MV_U32)_mvPmuSramDdrTermCtrlPtr, (MV_U32)_mvPmuSramDdrTermCtrlPtrInt);
+	dbg_print("_mvPmuSramCkeMaskCtrlPtr   = %08x (Internal = %08x)\n", (MV_U32)_mvPmuSramCkeMaskCtrlPtr, (MV_U32)_mvPmuSramCkeMaskCtrlPtrInt);
+	dbg_print("_mvPmuSramDdrInitPollPtr   = %08x (Internal = %08x)\n", (MV_U32)_mvPmuSramDdrInitPollPtr, (MV_U32)_mvPmuSramDdrInitPollPtrInt);
+	dbg_print("_mvPmuSramDdrMresetPtr     = %08x (Internal = %08x)\n", (MV_U32)_mvPmuSramDdrMresetPtr, (MV_U32)_mvPmuSramDdrMresetPtrInt);
+	dbg_print("_mvPmuSramDdr3wlPtr        = %08x (Internal = %08x)\n", (MV_U32)_mvPmuSramDdr3wlPtr, (MV_U32)_mvPmuSramDdr3wlPtrInt);
+	dbg_print("_mvPmuSramPostInitPtr      = %08x (Internal = %08x)\n", (MV_U32)_mvPmuSramPostInitPtr, (MV_U32)_mvPmuSramPostInitPtrInt);
+
+	/* Allocate enough space for the DDR paramters */
+	if ((_mvPmuSramDdrParamPtr = mvPmuSramRelocate(NULL, (mvDramIfParamCountGet() * sizeof(MV_DDR_MC_PARAMS)))) == NULL)
+	{
+		dbg_print("Failed to allocate space for DDR CONFIGURATIONS on SRAM!\n");
+		return MV_FAIL;
+	}
+
+	/* Convert DDR base address from External to Internal Space */
+	_mvPmuSramDdrParamPtrInt =  PmuExt2Int(_mvPmuSramDdrParamPtr);
+
+	dbg_print("_mvPmuSramDdrParamPtr      = %08x (Internal = %08x)\n", (MV_U32)_mvPmuSramDdrParamPtr, (MV_U32)_mvPmuSramDdrParamPtrInt);
+
+	/* Relocate all PMU routines fom the DDR to the SRAM */
+	if ((_mvPmuSramPtr = mvPmuSramRelocate((MV_VOID*)mvPmuSramFuncSTART, mvPmuSramFuncSZ)) == NULL)
+	{
+		dbg_print("Failed to allocate space for CODE on SRAM!\n");
+		return MV_FAIL;
+	}
+
+	/* Relocate the DDR DFS routine */
+	_mvPmuSramDdrReconfigPtr = (MV_VOID(*)) ((MV_U32)_mvPmuSramPtr + 
+					((MV_U32)mvPmuSramDdrReconfigFunc - (MV_U32)mvPmuSramFuncSTART));
+	/* Relocate the DeepIdle functions */
+	_mvPmuSramDeepIdleEnterPtr = (MV_VOID(*)) ((MV_U32)_mvPmuSramPtr + 
+					((MV_U32)mvPmuSramDeepIdleEnterFunc - (MV_U32)mvPmuSramFuncSTART));
+	_mvPmuSramDeepIdleExitPtr = (MV_VOID(*)) ((MV_U32)_mvPmuSramPtr + 
+					((MV_U32)mvPmuSramDeepIdleExitFunc - (MV_U32)mvPmuSramFuncSTART));
+
+	/* Relocate the Standby functions */
+	_mvPmuSramStandbyEnterPtr = (MV_VOID(*)) ((MV_U32)_mvPmuSramPtr + 
+					((MV_U32)mvPmuSramStandbyEnterFunc - (MV_U32)mvPmuSramFuncSTART));
+	_mvPmuSramStandbyExitPtr = (MV_VOID(*)) ((MV_U32)_mvPmuSramPtr + 
+					((MV_U32)mvPmuSramStandbyExitFunc - (MV_U32)mvPmuSramFuncSTART));
+
+	/* Relocate the CPU DFS function */
+	_mvPmuSramCpuDfsPtr = (MV_VOID(*)) ((MV_U32)_mvPmuSramPtr + 
+					((MV_U32)mvPmuSramCpuDfsFunc - (MV_U32)mvPmuSramFuncSTART));
+
+	dbg_print("_mvPmuSramPtr              = %08x\n", (MV_U32)_mvPmuSramPtr);
+	dbg_print("_mvPmuSramDdrReconfigPtr   = %08x\n", (MV_U32)_mvPmuSramDdrReconfigPtr);
+	dbg_print("_mvPmuSramDeepIdleEnterPtr = %08x\n", (MV_U32)_mvPmuSramDeepIdleEnterPtr);
+	dbg_print("_mvPmuSramDeepIdleExitPtr  = %08x\n", (MV_U32)_mvPmuSramDeepIdleExitPtr);
+	dbg_print("_mvPmuSramStandbyEnterPtr  = %08x\n", (MV_U32)_mvPmuSramStandbyEnterPtr);
+	dbg_print("_mvPmuSramStandbyExitPtr   = %08x\n", (MV_U32)_mvPmuSramStandbyExitPtr);
+	dbg_print("_mvPmuSramCpuDfsPtr        = %08x\n", (MV_U32)_mvPmuSramCpuDfsPtr);
+
+	/* Fill in the Post configurations in the SRAM */
+	memcpy(_mvPmuSramPostInitPtr, (MV_VOID*)post_init_cfgs, sizeof(post_init_cfgs));
+
+	/* Sanity check that the DDR temination control A/M/V info was located at the SRAM start */
+	if (((MV_U32)&((DDR_TERM_CTRL*)_mvPmuSramDdrTermCtrlPtrInt)->addr != PMU_SP_TERM_OFF_CTRL_ADDR) || 
+	    ((MV_U32)&((DDR_TERM_CTRL*)_mvPmuSramDdrTermCtrlPtrInt)->mask != PMU_SP_TERM_OFF_MASK_ADDR) ||
+	    ((MV_U32)&((DDR_TERM_CTRL*)_mvPmuSramDdrTermCtrlPtrInt)->off_val != PMU_SP_TERM_OFF_VAL_ADDR))
+	{
+		dbg_print("DDR Termination control information mislocated in SRAM!\n");
+		return MV_FAIL;
+	}
+
+	/* Fill in the DDR termination control information */	
+	if ((ddrTermGpioCtrl >= 0) | (ddrTermGpioCtrl <= 31))
+	{	
+		((DDR_TERM_CTRL*)_mvPmuSramDdrTermCtrlPtrInt)->addr = 0x1;
+		((DDR_TERM_CTRL*)_mvPmuSramDdrTermCtrlPtrInt)->mask = (0x1 << ddrTermGpioCtrl);
+		((DDR_TERM_CTRL*)_mvPmuSramDdrTermCtrlPtrInt)->off_val = 0x0;
+	}
+	else
+	{
+		((DDR_TERM_CTRL*)_mvPmuSramDdrTermCtrlPtrInt)->addr = 0x0;
+		((DDR_TERM_CTRL*)_mvPmuSramDdrTermCtrlPtrInt)->mask = 0x0;
+		((DDR_TERM_CTRL*)_mvPmuSramDdrTermCtrlPtrInt)->off_val = 0x0;
+	}
+
+	/* Fill in the CKE mask control */
+	if ((ckeMppNum >= 0) | (ddrTermGpioCtrl <= 7))
+	{
+		((MV_PMU_CKE_MASK*)_mvPmuSramCkeMaskCtrlPtr)->nib_mask = (0xF << (ckeMppNum*4));
+		((MV_PMU_CKE_MASK*)_mvPmuSramCkeMaskCtrlPtr)->nib_frc = (PMU_SIGNAL_1 << (ckeMppNum*4));
+		((MV_PMU_CKE_MASK*)_mvPmuSramCkeMaskCtrlPtr)->nib_rel = (PMU_SIGNAL_0 << (ckeMppNum*4));
+		((MV_PMU_CKE_MASK*)_mvPmuSramCkeMaskCtrlPtr)->bit_mask = (0x1 << ckeMppNum);
+	}
+	else
+	{
+		((MV_PMU_CKE_MASK*)_mvPmuSramCkeMaskCtrlPtr)->nib_mask = 0x0;
+		((MV_PMU_CKE_MASK*)_mvPmuSramCkeMaskCtrlPtr)->nib_frc = 0x0;
+		((MV_PMU_CKE_MASK*)_mvPmuSramCkeMaskCtrlPtr)->nib_rel = 0x0;
+		((MV_PMU_CKE_MASK*)_mvPmuSramCkeMaskCtrlPtr)->bit_mask = 0x0;
+	}
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvPmuSramDdrTimingPrep - Prepare new DDR timing params
+*
+* DESCRIPTION:
+*   	Request the new timing parameters for the DDR MC according to the new
+*	CPU:DDR ratio requested. These parameters are saved on the SRAM to be
+*	set later in the DDR DFS sequence.
+*
+* INPUT:
+*       ddrFreq: new target DDR frequency
+*	cpuFreq: CPU frequency to calculate the values againt
+* OUTPUT:
+*	None
+* RETURN:
+*	status
+*******************************************************************************/
+MV_STATUS mvPmuSramDdrTimingPrep(MV_U32 ddrFreq, MV_U32 cpuFreq, MV_U32 * cnt)
+{
+	MV_U32 clear_size = (mvDramIfParamCountGet() * sizeof(MV_DDR_MC_PARAMS));
+	MV_U32 i;
+	MV_U32 * ptr = (MV_U32*) _mvPmuSramDdrParamPtrInt;
+
+	/* Clear the whole region to zeros first */
+	for (i=0; i<(clear_size/4); i++)
+		ptr[i] = 0x0;
+		
+	/* Get the new timing parameters from the DDR HAL */
+	return mvDramReconfigParamFill(ddrFreq, cpuFreq, (MV_DDR_MC_PARAMS*)_mvPmuSramDdrParamPtrInt, cnt);
+}
+
+/*******************************************************************************
+* mvPmuSramDeepIdleResumePrep - Prepare information needed by the BootROM to resume
+*       from Deep Idle Mode.
+*
+* DESCRIPTION:
+*	Prepare the necessary register configuration to be executed by the 
+*	BootROM before jumping back to the resume code in the SRAM.
+*
+* INPUT:
+*       None
+* OUTPUT:
+*	None
+* RETURN:
+*	status
+*******************************************************************************/
+MV_STATUS mvPmuSramDeepIdleResumePrep(MV_VOID)
+{
+	MV_U32 reg, i;
+
+	/* set the resume address */
+	MV_REG_WRITE(PMU_RESUME_ADDR_REG, PmuSpVirt2Phys(_mvPmuSramDeepIdleExitPtr)); 
+
+	/* Prepare the resume descriptors */
+	reg = ((PMU_DEEPIDLE_DESCR_CNT << PMU_RC_DISC_CNT_OFFS) & PMU_RC_DISC_CNT_MASK);
+	MV_REG_WRITE(PMU_RESUME_CTRL_REG, reg); 
+
+	/* Fill in the used descriptors */
+	for (i=0; i<PMU_DEEPIDLE_DESCR_CNT; i++)
+	{
+		// TBD
+	}
+
+	/* Clear out all non used descriptors */
+	for (i=PMU_DEEPIDLE_DESCR_CNT; i<PMU_MAX_DESCR_CNT; i++)
+	{
+		MV_REG_WRITE(PMU_RESUME_DESC_CTRL_REG(i), 0x0);
+		MV_REG_WRITE(PMU_RESUME_DESC_ADDR_REG(i), 0x0);
+	}
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvPmuSramStandbyResumePrep - Prepare information needed by the BootROM to resume
+*       from Standby Mode.
+*
+* DESCRIPTION:
+*	Prepare the necessary register configuration to be executed by the 
+*	BootROM before jumping back to the resume code in the SRAM.
+*
+* INPUT:
+*       ddrFreq: DDR frequency to be configured upon resume from Standby
+* OUTPUT:
+*	None
+* RETURN:
+*	status
+*******************************************************************************/
+MV_STATUS mvPmuSramStandbyResumePrep(MV_U32 ddrFreq)
+{
+	MV_U32 reg, i, cnt;
+	MV_U32 clear_size = (mvDramIfParamCountGet() * sizeof(MV_DDR_MC_PARAMS));
+	MV_U32 * ptr = (MV_U32*) _mvPmuSramDdrParamPtrInt;
+
+	/* Set the resume address */
+	MV_REG_WRITE(PMU_RESUME_ADDR_REG, PmuSpVirt2Phys(_mvPmuSramStandbyExitPtr));
+
+	/* Prepare the resume control parameters */
+	reg = ((PMU_STANDBY_DESCR_CNT << PMU_RC_DISC_CNT_OFFS) & PMU_RC_DISC_CNT_MASK);	 
+	reg |= ((PMU_SP_TARGET_ID << PMU_RC_WIN6_TARGET_OFFS) & PMU_RC_WIN6_TARGET_MASK);
+	reg |= ((PMU_SP_ATTRIBUTE << PMU_RC_WIN6_ATTR_OFFS) & PMU_RC_WIN6_ATTR_MASK);
+	reg |= (DOVE_SCRATCHPAD_PHYS_BASE & PMU_RC_WIN6_BASE_MASK);
+	MV_REG_WRITE(PMU_RESUME_CTRL_REG, reg);
+
+	/**************************************/
+	/* Discriptor 0: DDR timing parametrs */
+	/**************************************/
+
+	/* Prepare DDR paramters in the scratch pad for BootROM */
+	for (i=0; i<(clear_size/4); i++)	
+		ptr[i] = 0x0;
+	if (mvDramIfParamFill(ddrFreq, (MV_DDR_MC_PARAMS*)_mvPmuSramDdrParamPtrInt, &cnt) != MV_OK)
+		return MV_FAIL;
+	
+	reg = PMU_RD_CTRL_DISC_TYPE_32AV;
+	reg |= ((cnt << PMU_RD_CTRL_CFG_CNT_OFFS) & PMU_RD_CTRL_CFG_CNT_MASK);
+	MV_REG_WRITE(PMU_RESUME_DESC_CTRL_REG(0), reg);
+	MV_REG_WRITE(PMU_RESUME_DESC_ADDR_REG(0), PmuSpVirt2Phys(_mvPmuSramDdrParamPtr));
+
+	/*****************************************/
+	/* Descriptor 1: DDR Initiaization delay */
+	/*****************************************/
+
+	/* Prepare the DDR init done polling descriptor */
+	if (mvDramInitPollAmvFill((MV_DDR_INIT_POLL_AMV*)_mvPmuSramDdrInitPollPtrInt) != MV_OK)
+		return MV_FAIL;
+
+	reg = PMU_RD_CTRL_DISC_TYPE_POLL;
+	reg |= ((1 << PMU_RD_CTRL_CFG_CNT_OFFS) & PMU_RD_CTRL_CFG_CNT_MASK);
+	MV_REG_WRITE(PMU_RESUME_DESC_CTRL_REG(1), reg);
+	MV_REG_WRITE(PMU_RESUME_DESC_ADDR_REG(1), PmuSpVirt2Phys(_mvPmuSramDdrInitPollPtr));
+
+	/***************************************/
+	/* Descriptor 2: M_RESET mask clearing */
+	/***************************************/
+
+	/* Prepare DDR Phy Mask clearing */
+	if (mvDramInitMresetMvFill((MV_DDR_BIT_CLR_AM*)_mvPmuSramDdrMresetPtrInt) != MV_OK)
+		return MV_FAIL;
+	
+	reg = PMU_RD_CTRL_DISC_TYPE_32BC;
+	reg |= ((1 << PMU_RD_CTRL_CFG_CNT_OFFS) & PMU_RD_CTRL_CFG_CNT_MASK);
+	MV_REG_WRITE(PMU_RESUME_DESC_CTRL_REG(2), reg);
+	MV_REG_WRITE(PMU_RESUME_DESC_ADDR_REG(2), PmuSpVirt2Phys(_mvPmuSramDdrMresetPtr));
+
+	/*************************************/
+	/* Descriptor 3: DDR3 write leveling */
+	/*************************************/
+
+	/* Prepare DDR Phy Mask clearing */
+#ifdef MV_PMU_FULL_DDR3_WL
+	if (mvDramInitDdr3wlTypeFill((MV_DDR3_WL_TYP*)_mvPmuSramDdr3wlPtrInt) != MV_OK)
+		return MV_FAIL;
+
+	reg = PMU_RD_CTRL_DISC_TYPE_DDR3WL;
+	reg |= ((1 << PMU_RD_CTRL_CFG_CNT_OFFS) & PMU_RD_CTRL_CFG_CNT_MASK);
+	MV_REG_WRITE(PMU_RESUME_DESC_CTRL_REG(3), reg);
+	MV_REG_WRITE(PMU_RESUME_DESC_ADDR_REG(3), PmuSpVirt2Phys(_mvPmuSramDdr3wlPtr));	
+#else
+	if (mvDramInitDdr3wlSetFill((MV_DDR3_WL_SET_VAL*)_mvPmuSramDdr3wlPtrInt) != MV_OK)
+		return MV_FAIL;
+
+	reg = PMU_RD_CTRL_DISC_TYPE_DDR3WL_SET;
+	reg |= ((1 << PMU_RD_CTRL_CFG_CNT_OFFS) & PMU_RD_CTRL_CFG_CNT_MASK);
+	MV_REG_WRITE(PMU_RESUME_DESC_CTRL_REG(3), reg);
+	MV_REG_WRITE(PMU_RESUME_DESC_ADDR_REG(3), PmuSpVirt2Phys(_mvPmuSramDdr3wlPtr));	
+#endif
+	/****************************************/
+	/* Descriptor 4: Window initialization  */
+	/****************************************/
+	reg = PMU_RD_CTRL_DISC_TYPE_32AV;
+	reg |= ((MV_PMU_POST_CFG_CNT << PMU_RD_CTRL_CFG_CNT_OFFS) & PMU_RD_CTRL_CFG_CNT_MASK);
+	MV_REG_WRITE(PMU_RESUME_DESC_CTRL_REG(4), reg);
+	MV_REG_WRITE(PMU_RESUME_DESC_ADDR_REG(4), PmuSpVirt2Phys(_mvPmuSramPostInitPtr));
+	
+	/* Clear out all non used descriptors */
+	for (i=PMU_STANDBY_DESCR_CNT; i<PMU_MAX_DESCR_CNT; i++)
+	{
+		MV_REG_WRITE(PMU_RESUME_DESC_CTRL_REG(i), 0x0);
+		MV_REG_WRITE(PMU_RESUME_DESC_ADDR_REG(i), 0x0);
+	}
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvPmuSramVirt2Phys - Convert virtual address to physical
+*
+* DESCRIPTION:
+*	Convert virtual address to physical
+*
+* INPUT:
+*       addr: virtual address
+* OUTPUT:
+*	None
+* RETURN:
+*	physical address
+*******************************************************************************/
+unsigned long mvPmuSramVirt2Phys(void *addr)
+{
+	return mvOsIoVirtToPhy(NULL, addr);
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/pmu/mvPmu_asm.S
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/pmu/mvPmu_asm.S
@@ -0,0 +1,871 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#define MV_ASMLANGUAGE
+
+#include "mvCommon.h"
+#include "mvOs_asm.h"
+#include "mvSysPmuConfig.h"
+#include "pmu/mvPmuRegs.h"
+
+
+
+#ifndef ENTRY
+#define ENTRY(name) \
+	.globl name; \
+	.align 4,0x90; \
+	name:
+#endif
+
+	.text
+
+ENTRY(mvPmuSramFuncSTART)
+
+/***************************************************************
+ * mvPmuSramDdrSrEnter: Enter DDR self refresh mode
+ * Uses R1-R2 internally
+ * Inputs:
+ *    R0: PMU control register address
+ * Outputs:
+ *    None
+ **************************************************************/
+ENTRY(mvPmuSramDdrSrEnter)
+	/*
+	 * Set DDR in Self refresh mode and poll status bit
+	 * Needed for a clean transition of the CKE 
+	 */	
+	ldr	r2, [r0]
+	orr	r2, r2, #PMU_CTRL_MC_SR_REQ_MASK
+	str	r2, [r0]
+sr_exit_poll:
+	ldr	r2, [r0]
+	tst	r2, #PMU_CTRL_MC_SR_ACK_MASK
+	beq	sr_exit_poll
+	mov	pc, lr
+
+/***************************************************************
+ * mvPmuSramDdrSrExit: Exit DDR self refresh mode
+ * Uses R1-R2 internally
+ * Inputs:
+ *    R0: PMU control register address
+ * Outputs:
+ *    None
+ **************************************************************/
+ENTRY(mvPmuSramDdrSrExit)
+	/*
+	 * Exit DDR self refresh mode if active
+	 * CKE and M_RESET already unmasked at BootROM level
+	 */	
+	ldr	r2, [r0]
+	bic	r2, r2, #PMU_CTRL_MC_SR_REQ_MASK
+	str	r2, [r0]
+sr_enter_poll:
+	ldr	r2, [r0]
+	tst	r2, #PMU_CTRL_MC_SR_ACK_MASK
+	bne	sr_enter_poll
+	mov	pc, lr
+
+/***************************************************************
+ * mvPmuSramFlushCaches: Flush all dirty lines to DRAM
+ * Uses R0-R1
+ * Inputs:
+ *    None
+ * Outputs:
+ *    None
+ **************************************************************/
+ENTRY(mvPmuSramFlushCaches)
+	/*
+	 * Flush all L1 Cache
+	 */
+	mov	r0, #0
+	mcr	p15, 0, r0, c7, c14, 0		@ D cache clean+invalidate
+	mcr     p15, 0, r0, c7, c5, 6           @ flush BTAC/BTB
+#ifdef CONFIG_CPU_PJ4_ERRATA_4574_4731
+	mcr	p15, 0, r0, c7, c5, 0		@ I+BTB cache invalidate
+#endif
+	mcr	p15, 0, r0, c7, c5, 0		@ I+BTB cache invalidate
+
+	mrc 	p15, 1, r1, c15, c12, 0
+	mov	r1, r1, lsr #16
+	and	r1, r1, #0xF
+	cmp	r1, #0x3			@ 0x2 for V6 and 0x3 for V7
+	beq	check_l2_v7
+	mrc 	p15, 0, r1, c1, c0, 0		@ Read CP15 - CR
+	tst	r1, #0x04000000			@ check if L2 is enabled in V6
+	beq	skip_l2_clean
+	b	do_l2_clean
+check_l2_v7:
+	mrc     p15, 0, r1, c1, c0, 1           @ read Aux CR
+	tst     r1, #0x2			@ check if L2 is enabled in V7
+	beq	skip_l2_clean
+do_l2_clean:
+	mcr 	p15, 1, r0, c7, c11, 0		@ clean all L2 cache
+skip_l2_clean:
+	mcr     p15, 0, r0, c7, c10, 4          @ drain write buffer
+	mcr	p15, 0, r0, c7, c10, 5		@ data memory barrier
+	mcr	p15, 0, r0, c7, c5, 4		@ ISB
+	mov	pc, lr
+
+
+/***************************************************************
+ * mvPmuSramInvalidateCaches: Invalidate all caches
+ * Uses R1
+ * Inputs:
+ *    None
+ * Outputs:
+ *    None
+ **************************************************************/
+ENTRY(mvPmuSramInvalidateCaches)
+	mov	r1, #0
+#ifdef CONFIG_CPU_PJ4_ERRATA_4574_4731
+	mcr	p15, 0, r1, c7, c5, 0		@ Invalidate both caches, BTC, BTAC
+#endif
+	mcr	p15, 0, r1, c7, c5, 0		@ Invalidate both caches, BTC, BTAC
+	mcr	p15, 0, r1, c8, c7, 0		@ TLB invalidate	
+	mcr	p15, 1, r1, c7, c7, 0		@ Invalidate entire L2
+	mcr	p15, 0, r1, c7, c10, 4		@ DSB
+	mcr	p15, 0, r1, c7, c5, 4		@ Prefetch Flush - ISB
+	mov	pc, lr
+
+/***************************************************************
+ * mvPmuSramWfi: Trigger PMU operation through entering WFI mode
+ * Uses R0
+ * Inputs:
+ *    None
+ * Outputs:
+ *    None
+ **************************************************************/
+ENTRY(mvPmuSramWfi)
+	mrc 	p15, 1, r0, c15, c12, 0
+	mov	r0, r0, lsr #16
+	and	r0, r0, #0xF
+	cmp	r0, #0x3			@ 0x2 for V6 and 0x3 for V7
+	beq	wfi_v7
+	mov	r0, #0
+	mcr	p15, 0, r0, c7, c0, 4
+	mov	pc, lr
+wfi_v7:
+	dsb
+	wfi
+	mov	pc, lr
+
+/***************************************************************
+ * mvPmuSramSaveCP15: Save all CP15 context on stack
+ * Uses R2-r9, SP
+ * Inputs:
+ *    None
+ * Outputs:
+ *    None
+ **************************************************************/
+ENTRY(mvPmuSramSaveCP15)
+	/*
+	 * Save the CP15 context
+	 */
+	mrc 	p15, 0, r2, c1, c0, 0		@ save CP15 - CR
+	mrc 	p15, 0, r3, c3, c0, 0		@ save CP15 - DACR
+	mrc 	p15, 0, r4, c13, c0, 0		@ save CP15 - FCSE
+	mrc 	p15, 0, r5, c2, c0, 0		@ save CP15 - TTBR
+	mrc     p15, 0, r6, c13, c0, 1          @ save CP15 - context ID
+	mrc	p15, 1, r7, c15, c1, 0		@ save CP15 - extra features
+	mrc	p15, 0, r8, c1, c0, 1		@ save CP15 - Aux CR
+	mov	r9, r13				@ save resume SP
+	stmfd	sp!, {r2-r9}
+	mrc	p15, 1, r5, c15, c1, 1		@ save CP15 - Aux Debug Modes Ctrl 1
+	mrc     p15, 0, r6, c9, c14, 0		@ save CP15 - PMC
+	mrc	p15, 0, r7, c10, c2, 0		@ save CP15 - PRRR
+	mrc	p15, 0, r8, c10, c2, 1		@ save CP15 - NMRR
+	stmfd	sp!, {r5-r8}
+	mov	pc, lr
+
+/***************************************************************
+ * mvPmuSramResumeCP15: Restore CP15 registers and start MMU
+ * Uses R0, R2-R9
+ * Inputs:
+ *    None
+ * Outputs:
+ *    R2 - CP15 Control Register (CR)
+ *    R5 - CP15 Translation Base Addrress (TTBR)
+ *    R9 - Virtual SP
+ **************************************************************/
+ENTRY(mvPmuSramResumeCP15)
+	ldr	r0, saved_sp			@ stack phys addr
+	ldmfd	r0!, {r5-r8}
+	mcr	p15, 1, r5, c15, c1, 1		@ restore CP15 - Aux Debug Modes Ctrl 1
+	mcr	p15, 0, r8, c10, c2, 1		@ restore CP15 - NMRR
+	mcr	p15, 0, r7, c10, c2, 0		@ restore CP15 - PRRR
+	mcr     p15, 0, r6, c9, c14, 0		@ restore CP15 - PMC
+	ldmfd	r0, {r2-r9}
+	mcr	p15, 0, r8, c1, c0, 1		@ restore CP15 - Aux CR
+#ifdef CONFIG_CPU_ENABLE_WRITECO
+	mrc	p15, 0, r10, c0, c0, 0		@ Main ID Y0 or not
+	and	r10, #0xF
+        cmp     r10, #1
+
+	mrcne   p15, 1, r0, c15, c2, 0          @ Auxiliary Function Reg
+	bicne	r0, #0x3 << 4
+	orrne	r0, r0, #CONFIG_CPU_WRITECO_CYCLE << 4  @ X0
+	mcrne	p15, 1, r0, c15, c2, 0		@ Write Marvell Auxiliary Function Reg
+#endif	
+	mcr	p15, 1, r7, c15, c1, 0		@ restore CP15 - extra features		
+	mcr     p15, 0, r6, c13, c0, 1          @ restore CP15 - context ID
+	mcr 	p15, 0, r5, c2, c0, 0		@ restore CP15 - TTBR
+	bic	r5, r5, #0x1f
+	mcr 	p15, 0, r4, c13, c0, 0		@ restore CP15 - FCSE
+	mcr 	p15, 0, r3, c3, c0, 0		@ restore CP15 - DACR
+	mov	pc, lr
+
+/***************************************************************
+ * mvPmuSramMmuEnable: Enable MMU in a secure manner
+ * Uses R0-R1, R2-R9
+ * Inputs:
+ *    R2: CR
+ *    R5 - CP15 Translation Base Addrress (TTBR)
+ * Outputs:
+ *    None
+ **************************************************************/
+ENTRY(mvPmuSramMmuEnable)
+	/*
+	 * Translate LR to it virtual value and set the entry point
+	 */
+	adr	r3, resume_after_mmu		@ physical resume address
+	ldr	r4, pte_virt_mask
+	and	r3, r3, r4
+	and	lr, lr, r4
+	ldr	r1, sp_virt_offs		@ scratch pad virtual offset
+	orr	r3, r3, r1
+	orr	lr, lr, r1
+
+	/*
+	 * temporarily map PMU SRAM into the page table so that PA=VA
+	 * otherwise prefetch abort occurs after MMU is turned on
+	 */
+	mov	r1, r1, lsr #20
+	ldr	r0, [r5, r1, lsl #2]		@ use PMU mapping mode
+	bic	r0, r0, #0xFF000000		@ Clear bits 24-31
+	bic	r0, r0, #0x00F00000		@ Clear bits 20-23
+	ldr	r1, sp_phys_offs
+	mov	r1, r1, lsr #20
+	orr	r7, r0, r1, lsl #20		@ temporay mapping
+	ldr	r4, [r5, r1, lsl #2]		@ save original mapping
+	str     r7, [r5, r1, lsl #2]		@ set temporary mapping
+
+	/*
+	 * Map the page table to its physical equivalent (PA=VA)
+	 * Needed to restore the original PTA in virtual mode
+	 */
+	mov	r6, r5, lsr #20
+	orr	r7, r0, r6, lsl #20		@ temporay mapping
+	ldr	r10, [r5, r6, lsl #2]		@ save original mapping
+	str     r7, [r5, r6, lsl #2]		@ set temporary mapping	
+	mcr     p15, 0, r0, c7, c10, 4          @ drain write buffer
+	mcr	p15, 0, r0, c7, c10, 5		@ data memory barrier
+
+	.align 5
+	mcr 	p15, 0, r2, c1, c0, 0		@ restore CP15 - CR
+	mov 	r0, #0
+	mcr	p15, 0, r0, c7, c5, 4		@ Prefetch Flush - ISB
+	mov	pc, r3				@ jump to Virtual Space
+
+resume_after_mmu:
+	str	r4, [r5, r1, lsl #2]		@ restore original PMU mapping
+	str	r10, [r5, r6, lsl #2]		@ restore original PT mapping
+	/*
+	 * No need for cach flushes since the 2 PT entries are strongly ordered
+	 */
+	mcr     p15, 0, r0, c7, c10, 4          @ drain write buffer
+	mcr     p15, 0, r0, c7, c10, 5          @ data memory barrier
+
+	/* invalidate the L2 entry of the temporary mapping */
+	orr	r4, r5, r1, lsl #2
+	bic	r4, r4, #0x1F
+	mcr	p15, 1, r4, c7, c7, 3
+
+	mcr	p15, 0, r0, c8, c7, 0		@ TLB invalidate
+	mcr     p15, 0, r0, c7, c5, 4		@ ISB
+	mov	r13, r9
+	mov	pc, lr
+
+/***************************************************************
+ * mvPmuSramDdrReconfigFunc: Change the DDR frequency
+ * Inputs:
+ *    r0: address of first Addr/Value couple
+ *    r1: count of Addr/Value couples
+ *    r2: Dry run flag (0 - dry run, 1 - real run)
+ * Outputs:
+ *    None
+ **************************************************************/
+ENTRY(mvPmuSramDdrReconfigFunc)
+	stmfd	sp!, {r4 - r10, lr}	@ save registers on stack
+
+	mov	r9, r0
+	mov	r10, r1
+	mov     r11, r2
+
+        /*
+         * Verify that the SRAM PTE is found in dTLB
+         * iTLB is guranteed.... Already in the SRAM
+         */
+	ldr     r2, pmu_sp_addr
+
+	/* 
+	 * Disable All SB access to DDR
+	 */
+	ldr	r3, ddfs_arbit_val
+	ldr	r2, ddfs_arbit_low_reg	
+	ldr	r7, [r2]			@ r7 saves Arbitor HI
+	cmp	r11, #0
+	strne	r3, [r2]
+	ldr	r2, ddfs_arbit_hi_reg
+	ldr	r8, [r2]			@ r8 saves Arbitor LOW
+	cmp	r11, #0
+	strne	r3, [r2]
+
+	/*
+	 * Disable and flush BPU
+	 */
+	mrc	p15, 0, r12, c1, c0, 0		@ read and save CP15 CR
+	bic	r2, r12, #0x800			@ clear BPU bit11
+	cmp	r11, #0
+	mcrne	p15, 0, r2, c1, c0, 0		@ disable BPU
+	mov	r2, #0
+	cmp	r11, #0
+	mcrne	p15, 1, r2, c15, c12, 4		@ BPU flush
+
+	/*
+	 * Drain Write buffer
+	 */
+	mcr     p15, 0, r0, c7, c10, 4          @ drain write buffer
+	mcr	p15, 0, r0, c7, c10, 5		@ data memory barrier
+	mcr     p15, 0, r0, c7, c5, 4		@ ISB
+
+	/*
+	 * Block all data requests to the MC from the SB
+	 */
+	ldr	r2, ddfs_mc_ctrl_reg
+	mov	r3, #0x1
+	cmp	r11, #0
+	strne	r3, [r2]
+	ldr	r3, [r2]
+
+	/*
+	 * Set DDR in Self refresh mode and poll status bit
+	 */
+	ldr	r2, pmu_ctrl_reg_virt
+	ldr	r4, [r2]
+	orr	r4, r4, #PMU_CTRL_MC_SR_REQ_MASK
+	cmp	r11, #0
+	strne	r4, [r2]
+ddr_fs_sr_loop:
+	ldr	r4, [r2]
+	cmp	r11, #0
+	moveq	r4, #PMU_CTRL_MC_SR_ACK_MASK
+	tst	r4, #PMU_CTRL_MC_SR_ACK_MASK
+	beq	ddr_fs_sr_loop
+
+	/*
+	 * Enter WFI
+	 */	
+	mrc 	p15, 1, r0, c15, c12, 0
+	mov	r0, r0, lsr #16
+	and	r0, r0, #0xF
+	cmp	r0, #0x3			@ 0x2 for V6 and 0x3 for V7
+	beq	ddr_fs_wfi_v7
+	cmp     r11, #0
+	movne	r0, #0
+	mcrne	p15, 0, r0, c7, c0, 4
+	b	ddr_fs_wfi_done
+ddr_fs_wfi_v7:
+	cmp     r11, #0
+	itt	ne
+	dsb
+	wfi
+ddr_fs_wfi_done:
+
+	/*
+	 * Exit DDR self refresh mode if active
+	 */
+	ldr	r0, pmu_ctrl_reg_virt
+	ldr	r2, [r0]
+	tst 	r2, #PMU_CTRL_MC_SR_REQ_MASK
+	beq	skip_ddrfs_sr_exit
+	bic	r2, r2, #PMU_CTRL_MC_SR_REQ_MASK
+	cmp	r11, #0
+	strne	r2, [r0]
+ddrfs_sr_exit_loop:
+	ldr	r2, [r0]
+	cmp	r11, #0
+	moveq	r2, #PMU_CTRL_MC_SR_ACK_MASK
+	tst	r2, #PMU_CTRL_MC_SR_ACK_MASK
+	bne	ddrfs_sr_exit_loop
+skip_ddrfs_sr_exit:	
+
+	/*
+	 * Loop and execute MC init addr/value couples
+	 */
+	mov	r0, r9
+	mov	r1, r10
+	ldr	r4, ddfs_nb_offset
+	ldr	r5, ddfs_nb_mask
+mc_init_loop:
+	cmp	r1, #0
+	beq	mc_init_done
+	ldr 	r2, [r0]			@ Address
+	add	r0, #4
+	ldr	r3, [r0]			@ Value
+	add	r0, #4
+	bic	r2, r2, r5			
+	orr	r2, r2, r4			@ NB Offset
+	cmp	r11, #0
+	strne	r3, [r2]			@ [Address]=Value
+	sub	r1, r1, #1
+	b	mc_init_loop
+mc_init_done:
+	ldr	r3, [r2]
+
+	/*
+	 * UN-Block data requests to the MC from the SB
+	 */
+	ldr	r2, ddfs_mc_ctrl_reg
+	mov	r3, #0x0
+	cmp	r11, #0
+	strne	r3, [r2]
+	ldr	r3, [r2]
+
+	/*
+	 * Enable and flush BPU
+	 */
+	cmp	r11, #0
+	mcrne	p15, 0, r12, c1, c0, 0		@ restore saved CP15 CR
+
+	/* 
+	 * Restore SB access ro DDR
+	 */
+	ldr	r2, ddfs_arbit_low_reg
+	cmp	r11, #0
+	strne	r7, [r2]			@ restore Arbitor HI
+	ldr	r2, ddfs_arbit_hi_reg
+	cmp	r11, #0
+	strne   r8, [r2]                        @ restore Arbitor LOW
+
+	ldmfd	sp!, {r4 - r10, pc}	@ restore regs and return
+
+ddfs_nb_offset:
+	.word (DOVE_NB_REGS_VIRT_BASE)
+ddfs_nb_mask:
+	.word (0xFFF00000)
+ddfs_mc_ctrl_reg:
+	.word (DOVE_NB_REGS_VIRT_BASE + 0x7E0)
+
+ddfs_arbit_low_reg:
+	.word(DOVE_SB_REGS_VIRT_BASE + 0xD02A8)
+ddfs_arbit_hi_reg:
+	.word(DOVE_SB_REGS_VIRT_BASE + 0xD02AC)
+ddfs_arbit_val:
+	.word(0xFFFFFFFF)
+
+
+/***************************************************************
+ * mvPmuSramDeepIdleEnterFunc: Enter Deep Idle mode
+ * Inputs:
+ *    r0: 0x0: enter ddr SR, else enter
+ * Outputs:
+ *    None
+ **************************************************************/
+ENTRY(mvPmuSramDeepIdleEnterFunc)
+	stmfd	sp!, {r4-r12, lr}		@ save general regs
+
+	/*
+	 * Save the CP15 context
+	 */
+	bl	mvPmuSramSaveCP15
+
+	/*
+	 * Save the physical address of the resume SP
+	 */
+	mov	r4, r0				@ suspend mode needed later
+	mov	r0, sp
+	ldr	r1, die_vtp
+	adr	lr, sb_pc_v2p_res
+	mov	pc, r1
+sb_pc_v2p_res:
+	adr	r1, saved_sp
+
+	/*
+	 * Write SP to scratch NVRAM
+	 * First Convert external to internal addrress space
+	 */
+	ldr	r3, nvram_sp_mask
+	and	r1, r1, r3
+	ldr	r3, pmu_sp_addr
+	orr	r1, r1, r3
+	str	r0, [r1]
+
+	bl	mvPmuSramFlushCaches		@ Flush all caches back to DRAM
+	cmp	r4, #0				@ eBook / Deep-Idle selector
+	bne	die_leave_ddr_active		@ Keep DDR alive in eBook mode
+	ldr	r0, pmu_ctrl_reg_virt
+	bl	mvPmuSramDdrSrEnter		@ Force DDR in SR mode
+
+	/*
+	 * Disable DDR Terminations
+	 */
+	ldr	r0, die_term_ctrl_addr
+	ldr	r0, [r0]
+	cmp	r0, #0x0
+	beq	die_leave_ddr_active
+	ldr	r2, die_term_mask_addr
+	ldr	r2, [r2]
+	ldr	r0, die_gpio_out_val_reg
+	ldr	r1, [r0]
+	bic	r1, r1, r2
+	str	r1, [r0]
+
+die_leave_ddr_active:
+	/*
+	 * Initiate Deep Idle flow
+	 */
+	ldr	r0, pmu_ctrl_reg_virt
+	mov	r1, #PMU_CTRL_DEEPIDLE_MODE_EN_MASK
+	ldr	r2, [r0]
+	orr	r2, r2, r1
+	str	r2, [r0]
+
+	/*
+	 * Relocate the Internal Registers Window to h/w default
+	 */
+	ldr	r1, die_irb_reg
+	mov	r0, #DOVE_SB_REGS_HW_DEF_PHYS_BASE
+	str	r0, [r1]	
+	
+	bl	mvPmuSramWfi			@ Enter WFI to trigger PMU
+
+die_vtp:
+	.word mvPmuSramVirt2Phys
+die_irb_reg:
+	.word (DOVE_SB_REGS_VIRT_BASE + 0x20080)
+die_gpio_out_val_reg:
+	.word (DOVE_SB_REGS_VIRT_BASE + 0xD0400)
+die_term_ctrl_addr:
+	.word (PMU_SP_TERM_OFF_CTRL_ADDR)
+die_term_mask_addr:
+	.word (PMU_SP_TERM_OFF_MASK_ADDR)
+
+/***************************************************************
+ * mvPmuSramDeepIdleExitFunc: Rollback from Deep Idle mode
+ * Inputs:
+ *    None
+ * Outputs:
+ *    None
+ **************************************************************/
+ENTRY(mvPmuSramDeepIdleExitFunc)
+	/*
+	 * Move back Internal regs to Linux base
+	 */
+	ldr	r1, dix_irbd_reg
+	mov	r0, #DOVE_SB_REGS_PHYS_BASE
+	str	r0, [r1]
+
+	/*
+	* DDR Sync workaround
+	*/
+	ldr     r1, dix_ddr_sync_reg
+	mov	r0, #0x80000000
+	str     r0, [r1]
+	ldr	r0, [r1]
+
+	bl	mvPmuSramInvalidateCaches	@ Invalidate all caches	
+
+	/*
+	 * Check if DDR in self refresh mode
+	 */
+	ldr	r0, pmu_ctrl_reg_phys
+//	mov	r1, #PMU_CTRL_MC_SR_REQ_MASK
+	ldr	r2, [r0]
+	tst 	r2, #PMU_CTRL_MC_SR_REQ_MASK
+	beq	dix_ddr_active
+
+	/*
+	 * Re-enable DDR terminations
+	 */
+	ldr	r0, dix_term_ctrl_addr
+	ldr	r0, [r0]
+	cmp	r0, #0x0
+	beq	dix_sr_exit
+	ldr	r2, dix_term_mask_addr
+	ldr	r2, [r2]
+	ldr	r0, dix_gpio_out_val_reg
+	ldr	r1, [r0]
+	orr	r1, r1, r2
+	str	r1, [r0]
+
+	mov	r1, #0x8000
+dix_term_enable_delay:
+	sub	r1, r1, #1
+	cmp	r1, #0
+	bne	dix_term_enable_delay
+
+dix_sr_exit:
+
+	ldr	r0, pmu_ctrl_reg_phys
+	bl	mvPmuSramDdrSrExit
+dix_ddr_active:	
+
+	bl	mvPmuSramResumeCP15		@ restore CP15 registers
+	bl	mvPmuSramMmuEnable		@ Enable MMU translation
+	ldmfd	sp!, {r4-r12, pc}		@ restore SVC registers
+
+dix_irbd_reg:
+	.word (0xD0020080)
+dix_gpio_out_val_reg:
+	.word (DOVE_SB_REGS_PHYS_BASE + 0xD0400)
+dix_term_ctrl_addr:
+	.word (PMU_SP_TERM_OFF_CTRL_ADDR_PHYS)
+dix_term_mask_addr:
+	.word (PMU_SP_TERM_OFF_MASK_ADDR_PHYS)
+dix_ddr_sync_reg:
+	.word (0xF1800240)
+
+
+/***************************************************************
+ * mvPmuSramStandbyEnterFunc: Enter Standby mode
+ * Inputs:
+ *    None
+ * Outputs:
+ *    None
+ **************************************************************/
+ENTRY(mvPmuSramStandbyEnterFunc)
+
+	stmfd	sp!, {r4-r12, lr}		@ save general regs
+
+	bl	mvPmuSramSaveCP15		@ save all cp15 context on stack
+
+	/*
+	 * Save the physical address of the resume SP
+	 */
+	mov	r4, r0				@ suspend mode needed later
+	mov	r0, sp
+	ldr	r1, sbe_vtp
+	adr	lr, sbe_pc_v2p_res
+	mov	pc, r1
+sbe_pc_v2p_res:
+	adr	r1, saved_sp
+
+	/*
+	 * Write SP to scratch NVRAM
+	 * Convert to internal addrress space
+	 */
+	ldr	r2, nvram_sp_mask
+	and	r1, r1, r2
+	ldr	r2, pmu_sp_addr
+	orr	r1, r1, r2
+	str	r0, [r1]
+
+	bl	mvPmuSramFlushCaches		@ Flush all Caches back to DRAM
+	ldr	r0, pmu_ctrl_reg_virt
+	bl	mvPmuSramDdrSrEnter		@ Force DDR SR mode
+
+	/*
+	 * Force CKE to be LOW at board level
+	 */
+	ldr	r0, sbe_pmu_sig_slct_reg
+	ldr	r1, [r0]
+	ldr	r2, sbe_cke_nib_mask
+	ldr	r2, [r2]
+	cmp	r2, #0x0
+	beq	sbe_skip_cke_wa
+	bic	r1, r1, r2
+	ldr	r2, sbe_cke_nib_frc
+	ldr	r2, [r2]
+	orr	r1, r1, r2
+	str	r1, [r0]
+sbe_skip_cke_wa:
+
+	/*
+	 * Initiate standby flow
+	 */
+	ldr	r0, pmu_ctrl_reg_virt
+	mov	r1, #(PMU_CTRL_STANDBY_MODE_EN_MASK | PMU_CTRL_DDR_SLF_RFRSH_EN_MASK)
+	ldr	r2, [r0]
+	orr	r2, r2, r1
+	str	r2, [r0]
+
+	bl	mvPmuSramWfi			@ Enter WFI to trigger PMU
+
+sbe_vtp:
+	.word mvPmuSramVirt2Phys
+sbe_sply_ctrl_reg:
+	.word (DOVE_SB_REGS_VIRT_BASE + PMU_PWR_SUPLY_CTRL_REG)
+sbe_pmu_sig_slct_reg:
+	.word (DOVE_SB_REGS_VIRT_BASE + PMU_SIG_SLCT_CTRL_0_REG)
+sbe_cke_nib_mask:
+	.word (PMU_SP_CKE_NIB_MASK_ADDR)
+sbe_cke_nib_frc:
+	.word (PMU_SP_CKE_NIB_FRC_ADDR)
+
+
+
+/***************************************************************
+ * mvPmuSramStandbyExitFunc: Rollback from Standby mode
+ * Inputs:
+ *    None
+ * Outputs:
+ *    None
+ **************************************************************/
+ENTRY(mvPmuSramStandbyExitFunc)
+	bl	mvPmuSramInvalidateCaches	@ Invalidate all caches
+
+	/*
+	 * Check if CKE WA is implemented on board
+	 */
+	ldr	r3, sbx_cke_bit_mask
+	ldr	r3, [r3]
+	cmp	r3, #0x0
+	beq	sbx_skip_cke_wa
+
+	/*
+	 * Set DDR in Self refresh mode and poll status bit
+	 */
+	ldr	r0, pmu_ctrl_reg_phys
+	bl	mvPmuSramDdrSrEnter
+
+	/*
+	 * UN-Mask M_RESET and CKE at board level
+	 */
+	ldr	r0, sbx_mpp_pmu_slct_reg
+	ldr	r1, [r0]
+	orr	r1, r1, r3			@ Select MPP used for CKE control as PMU MPP
+	str	r1, [r0]
+
+	ldr	r0, sbx_pmu_sig_slct_reg
+	ldr	r1, [r0]
+	ldr	r2, sbx_cke_nib_mask
+	ldr	r2, [r2]
+	bic	r1, r1, r2
+	ldr	r2, sbx_cke_nib_rel		@ Set PMU MPP to '0' -> release CKE forcing
+	ldr	r2, [r2]
+	orr	r1, r1, r2
+	str	r1, [r0]
+sbx_skip_cke_wa:
+
+	/*
+	 * Exit DDR Self refresh mode and poll status bit
+	 */
+	ldr	r0, pmu_ctrl_reg_phys
+	bl	mvPmuSramDdrSrExit
+
+	bl	mvPmuSramResumeCP15		@ restore CP15 registers
+	bl	mvPmuSramMmuEnable		@ Enable MMU translation
+	ldmfd	sp!, {r4-r12, pc}		@ restore SVC registers
+
+sbx_mpp_pmu_slct_reg:
+	.word (DOVE_SB_REGS_PHYS_BASE + 0xD0210)
+sbx_cke_bit_mask:
+	.word (PMU_SP_CKE_BIT_MASK_ADDR_PHYS)
+sbx_pmu_sig_slct_reg:
+	.word (DOVE_SB_REGS_PHYS_BASE + PMU_SIG_SLCT_CTRL_0_REG)
+sbx_cke_nib_mask:
+	.word (PMU_SP_CKE_NIB_MASK_ADDR_PHYS)
+sbx_cke_nib_rel:
+	.word (PMU_SP_CKE_NIB_REL_ADDR_PHYS)
+
+
+/***************************************************************
+ * mvPmuSramCpuDfsFunc: Change the CPU frequency
+ * Inputs:
+ *    None
+ * Outputs:
+ *    None
+ **************************************************************/
+ENTRY(mvPmuSramCpuDfsFunc)
+	stmfd	sp!, {r0 - r10, lr}	@ save registers on stack
+	ldr	r0, pmu_ctrl_reg_virt
+	bl	mvPmuSramDdrSrEnter	@ Force DRAM in SR mode
+	bl	mvPmuSramWfi		@ Enter WFI to trigger PMU
+	ldr	r0, pmu_ctrl_reg_virt
+	bl	mvPmuSramDdrSrExit	@ Exit SR mode
+	ldmfd	sp!, {r0 - r10, pc}	@ restore regs and return
+
+
+/***************************************************************
+ *    SHARED LITERAL POOL
+ **************************************************************/
+saved_sp:
+	.word	0				@ physical SP saved here
+sp_virt_offs:
+	.word (DOVE_SCRATCHPAD_VIRT_BASE)
+sp_phys_offs:
+	.word (DOVE_SCRATCHPAD_PHYS_BASE)
+pmu_ctrl_reg_virt:
+	.word (DOVE_SB_REGS_VIRT_BASE + PMU_CTRL_REG)
+pmu_ctrl_reg_phys:
+	.word (DOVE_SB_REGS_PHYS_BASE + PMU_CTRL_REG)
+pmu_sp_addr:
+	.word (PMU_SCRATCHPAD_INT_BASE)
+pte_virt_mask:
+	.word (0xFFFFF)
+nvram_sp_mask:
+	.word (0x7FF)
+
+ENTRY(mvPmuSramFuncSZ)
+	.word	. - mvPmuSramFuncSTART + 0x4
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/pmu/mvPmu.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/pmu/mvPmu.c
@@ -0,0 +1,1614 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvSysPmuConfig.h"
+#include "mvPmuRegs.h"
+#include "mvPmu.h"
+#include "mvSram.h"
+#include "ddr/mvDramIf.h"
+
+#warning "This include should be removed."
+#include "ctrlEnv/sys/mvCpuIfRegs.h"
+
+#define ROUND_DOWN(value,boundary)	((value) & (~((boundary)-1)))
+
+/* PMU uController code fixes <add,val> couples */
+MV_U32	uCfix[][2] = {{0,0x01}, {38, 0x33}, {120,0xB0}, {121,0x00}, {122,0x80}, {123,0xC0}, {124,0x00}, \
+		{125,0x00}, {126,0x00}, {127,0x00}, {214,0x00}, {239,0xB0}, {241,0x90}, {242,0x20}, \
+		{243,0x80}, {244,0x04}, {245,0x07}, {246,0x00},	{247,0x39}, {248,0xA8}, {249,0x14}, \
+		{250,0x80}, {251,0x80}, {252,0x28}, {253,0x80}, {254,0xFF}, {255,0x08},	{256,0x20}, \
+		{257,0xF0}, {258,0x44}, {259,0x00}, {260,0xF3}, {261,0xF0}, {262,0x3C}, {263,0x00}, \
+		{264,0xFF}, {265,0x90}, {266,0x40}, {267,0x00}, {268,0x04}, {269,0x00}, {270,0x00}, \
+		{271,0xA0}, {272,0x24}, {273,0x80}, {274,0x3F}, {275,0x00}, {276,0x00}, {277,0x20}, \
+		{278,0xA8}, {279,0x24}, {280,0x80}, {281,0x90}, {282,0x28}, {283,0x80}, {284,0x03}, \
+		{285,0x01}, {286,0x02}, {287,0x20}, {288,0x60}, {289,0x5B}, {290,0x00}, {291,0x59}, \
+		{292,0x90}, {293,0x00}, {294,0x80}, {295,0xC0}, {296,0x00}, {297,0x00}, {298,0x00}, \
+		{299,0x00}, {300,0x90}, {301,0x20}, {302,0x80}, {303,0x04}, {304,0x00}, {305,0x00}, \
+		{306,0x19}, {307,0x94}, {308,0x20}, {309,0x7C},	{310,0xFF}, {311,0x00}, {356,0x00}, \
+		{388,0x71}, {389,0x30}, {390,0x80}, {391,0x28}, {392,0x80}, {393,0xFF}, {394,0x08}, \
+		{395,0x49}, {396,0x39}, {397,0x20}, {398,0xA8}, {399,0x18}, {400,0x80}, {401,0x69}, \
+		{402,0x59}, {403,0x08}, {404,0x94}, {405,0x41}, {406,0x00}, {407,0x7D}, {408,0x19}, \
+		{409,0x94}, {410,0x40}, {411,0x94}, {412, 0x42}, {413, 0xFF}};
+
+/* Save L2 ratio at system power up */
+static MV_U32 l2TurboRatio;
+
+/* PLL 2 DDR Ratio Divider Map Table */
+#define MAX_RATIO_MAP_CNT	10
+MV_U32 ratio2DivMapTable[MAX_RATIO_MAP_CNT][2] = {{1,0x1}, 	/* DDR:PLL 1:1 */
+						{2,0x2}, 	/* DDR:PLL 1:2 */
+						{3,0x3}, 	/* DDR:PLL 1:3 */
+						{4,0x4}, 	/* DDR:PLL 1:4 */
+						{5,0x5}, 	/* DDR:PLL 1:5 */
+						{6,0x6}, 	/* DDR:PLL 1:6 */
+						{7,0x7}, 	/* DDR:PLL 1:7 */
+						{8,0x8}, 	/* DDR:PLL 1:8 */
+						{10,0xA}, 	/* DDR:PLL 1:10 */
+						{12,0xC}}; 	/* DDR:PLL 1:12 */
+
+/* Timing delays for CPU and Core powers */
+#define PMU_DEEPIDLE_CPU_PWR_DLY	0x208D			/* TCLK clock cycles - ~50 us */
+#define PMU_STBY_CPU_PWR_DLY		0x1			/* RTC 32KHz clock cycles ~31.25us */
+#define PMU_DVS_POLL_DLY		10000			/* Poll DVS done count */
+
+/* DVS defaults */
+#define DOVE_PSET_HI			0xF
+#define DOVE_VSET_HI			0x8
+#define DOVE_PSET_LO			0xA
+#define DOVE_VSET_LO			0x8
+#define DOVE_RADDR			0x2
+#define DOVE_SADDR			0x5
+
+/* Standby blinking led timing */
+#define PMU_STBY_LED_PERIOD		0x10000			/* RTC 32KHz cc ~2.0s */
+#define PMU_STBY_LED_DUTY		0xE000			/* RTC 32KHz cc ~1.75s - 12.5%*/
+
+/* Static functions */
+static MV_U32 mvPmuGetPllFreq(void);
+static MV_U32 mvPmuRatio2Divider(MV_U32 ratio);
+static MV_U32 mvPmuDivider2Ratio(MV_U32 div);
+
+
+/*******************************************************************************
+* mvPmuCodeFix - Fix teh PMU uCode
+*
+* DESCRIPTION:
+*   Apply the PMU uCode and function pointers fixes
+*
+* INPUT:
+	None
+* OUTPUT:
+*	None
+* RETURN:
+*	None
+*******************************************************************************/
+static MV_VOID mvPmuCodeFix (MV_VOID)
+{
+	MV_U32 reg;
+	MV_U32 i;
+
+	/* Initialize the uCode PCs of the different PMU operations */
+	MV_REG_WRITE(PMU_DFS_PROC_PC_0_REG, ((MV_REG_READ(PMU_DFS_PROC_PC_0_REG) & ~PMU_DFS_PRE_PC_MASK) | PMU_DFS_PRE_PC_VAL));
+	MV_REG_WRITE(PMU_DFS_PROC_PC_0_REG, ((MV_REG_READ(PMU_DFS_PROC_PC_0_REG) & ~PMU_DFS_CPU_PC_MASK) | PMU_DFS_CPU_PC_VAL));
+	MV_REG_WRITE(PMU_DFS_PROC_PC_1_REG, ((MV_REG_READ(PMU_DFS_PROC_PC_1_REG) & ~PMU_DFS_DDR_PC_MASK) | PMU_DFS_DDR_PC_VAL));
+	MV_REG_WRITE(PMU_DFS_PROC_PC_1_REG, ((MV_REG_READ(PMU_DFS_PROC_PC_1_REG) & ~PMU_DFS_L2_PC_MASK) | PMU_DFS_L2_PC_VAL));
+	MV_REG_WRITE(PMU_DFS_PROC_PC_2_REG, ((MV_REG_READ(PMU_DFS_PROC_PC_2_REG) & ~PMU_DFS_PLL_PC_MASK) | PMU_DFS_PLL_PC_VAL));
+	MV_REG_WRITE(PMU_DFS_PROC_PC_2_REG, ((MV_REG_READ(PMU_DFS_PROC_PC_2_REG) & ~PMU_DFS_POST_PC_MASK) | PMU_DFS_POST_PC_VAL));
+	MV_REG_WRITE(PMU_DVS_PROC_PC_REG, ((MV_REG_READ(PMU_DVS_PROC_PC_REG) & ~PMU_DVS_PRE_PC_MASK) | PMU_DVS_PRE_PC_VAL));
+	MV_REG_WRITE(PMU_DVS_PROC_PC_REG, ((MV_REG_READ(PMU_DVS_PROC_PC_REG) & ~PMU_DVS_POST_PC_MASK) | PMU_DVS_POST_PC_VAL));
+	MV_REG_WRITE(PMU_DEEPIDLE_STBY_PROC_PC_REG, ((MV_REG_READ(PMU_DEEPIDLE_STBY_PROC_PC_REG) & ~PMU_DPIDL_PC_MASK) | PMU_DPIDL_PC_VAL));
+	MV_REG_WRITE(PMU_DEEPIDLE_STBY_PROC_PC_REG, ((MV_REG_READ(PMU_DEEPIDLE_STBY_PROC_PC_REG) & ~PMU_STBY_PRE_PC_MASK) | PMU_STBY_PRE_PC_VAL));
+	MV_REG_WRITE(PMU_STBY_PROC_PC_REG, ((MV_REG_READ(PMU_STBY_PROC_PC_REG) & ~PMU_STBY_DDR_PC_MASK) | PMU_STBY_DDR_PC_VAL));
+	MV_REG_WRITE(PMU_STBY_PROC_PC_REG, ((MV_REG_READ(PMU_STBY_PROC_PC_REG) & ~PMU_STBY_POST_PC_MASK) | PMU_STBY_POST_PC_VAL));
+
+	/* Update uCode */
+	for (i=0; i< (sizeof(uCfix) / sizeof(uCfix[0])); i++)
+	{
+		reg = MV_REG_READ(PMU_PROGRAM_REG(uCfix[i][0]));
+		reg &= ~PMU_PROGRAM_MASK(uCfix[i][0]);
+		reg |= (uCfix[i][1] << PMU_PROGRAM_OFFS(uCfix[i][0]));
+		MV_REG_WRITE(PMU_PROGRAM_REG(uCfix[i][0]), reg);
+	}
+}
+
+/*******************************************************************************
+* mvPmuInit - Initialize the Power Management Unit (PMU)
+*
+* DESCRIPTION:
+*   1. Initializes the internal fields of the data stucture.
+*   2. initialize the controller and loads default values.
+*
+* INPUT:
+*       Pointer to PMU information Data structure, this sturcture must be allocated
+*         by the caller and passed to the mvPmuInit()
+* OUTPUT:
+*		None
+* RETURN:
+*    MV_OK      : PMU initialized successfully
+*******************************************************************************/
+MV_STATUS mvPmuInit (MV_PMU_INFO * pmu)
+{
+	MV_U32 reg;
+	MV_32 i;
+	MV_32 cke_mpp_num = -1;
+
+	/* Set the DeepIdle and Standby power delays */
+      	MV_REG_WRITE(PMU_STANDBY_PWR_DELAY_REG, pmu->standbyPwrDelay);
+
+	/* Configure the Battery Management Control register */
+	reg = 0;
+	if (pmu->batFltMngDis) reg |= PMU_BAT_FLT_DISABLE_MASK;
+	if (pmu->exitOnBatFltDis) reg |= PMU_BAT_FLT_STBY_EXIT_DIS_MASK;
+	MV_REG_WRITE(PMU_BAT_MNGMT_CTRL_REG, reg);
+	
+	/* Invert the CPU and whole chip Power Down Polarity */
+	reg = MV_REG_READ(PMU_PWR_SUPLY_CTRL_REG);
+	reg &= ~PMU_PWR_CPU_OFF_LEVEL_MASK;	/* 0 - CPU is powered down (DEEP IDLE) */
+	reg |= PMU_PWR_CPU_ON_LEVEL_MASK;	/* 1 - CPU is powered up */
+	reg &= ~PMU_PWR_STBY_ON_LEVEL_MASK;	/* 0 - Dove is powered down (STANDBY) */
+	reg |= PMU_PWR_STBY_OFF_LEVEL_MASK;	/* 1 - Dove is powered up */
+	MV_REG_WRITE(PMU_PWR_SUPLY_CTRL_REG, reg);
+
+	/* Enable the PMU Control on the CPU reset) */
+	reg = MV_REG_READ(CPU_CONTROL_REG);
+	reg |= CPU_CTRL_PMU_CPU_RST_EN_MASK;
+	MV_REG_WRITE(CPU_CONTROL_REG, reg);
+
+	/* Configure the PMU Signal selection */
+	reg = 0;
+	for (i=7; i>=0; i--)
+		reg |= ((pmu->sigSelctor[i] & 0xF) << (i*4));
+	MV_REG_WRITE(PMU_SIG_SLCT_CTRL_0_REG, reg);
+
+	reg = 0;
+	for (i=7; i>=0; i--)
+		reg |= ((pmu->sigSelctor[i+8] & 0xF) << (i*4));
+	MV_REG_WRITE(PMU_SIG_SLCT_CTRL_1_REG, reg);
+
+	/* Configure the CPU Power Good if used */
+	for (i=0; i<16; i++)
+	{
+		if (pmu->sigSelctor[i] == PMU_SIGNAL_CPU_PWRGOOD)
+		{
+			reg = MV_REG_READ(PMU_PWR_SUPLY_CTRL_REG);
+			reg |= PMU_PWR_GOOD_PIN_EN_MASK;
+			MV_REG_WRITE(PMU_PWR_SUPLY_CTRL_REG, reg);
+			break;
+		}
+	}
+
+	/* Check if CKE workaround is applicable */
+	for (i=0; i<8; i++)
+	{
+		if (pmu->sigSelctor[i] == PMU_SIGNAL_CKE_OVRID)
+		{
+			cke_mpp_num = i;
+			break;
+		}
+	}
+
+	/* Configure the blinking led timings */
+	MV_REG_WRITE(PMU_BLINK_PERIOD_CTRL_REG, PMU_STBY_LED_PERIOD);
+	MV_REG_WRITE(PMU_BLINK_DUTY_CYCLE_CTRL_REG, PMU_STBY_LED_DUTY);
+
+	/* Configure the DVS delay */
+	MV_REG_WRITE(PMU_DVS_DELAY_REG, pmu->dvsDelay);
+
+	/* Apply uCode Fixes */
+	mvPmuCodeFix();
+
+	/* Save L2 ratio at reset - Needed in DFS scale up */
+	reg = MV_REG_READ(PMU_CLK_DIVIDER_0_REG);
+	l2TurboRatio = (((reg & PMU_CLK_DIV_XPRATIO_MASK) >> PMU_CLK_DIV_XPRATIO_OFFS) << PMU_DFS_CTRL_L2_RATIO_OFFS);
+
+	return mvPmuSramInit(pmu->ddrTermGpioNum, cke_mpp_num);
+}
+
+/*******************************************************************************
+* mvPmuDeepIdle - Power down the CPU and enter WFI. This api blocks untill
+*                receiving an interrupt, which wakes up the CPU and this
+*                api returns to the caller.
+*
+* DESCRIPTION:
+* The caller of this API is responsible for the following before calling this call:
+*   - Disable the I-Cache
+*   - Configure the Wake up events.
+*   - Save all CPU context
+*   - Gate all clocks to unused units
+*
+* The caller of this API is also responsible for the following after exiting this call:
+*   - Restore the CPU context.
+*   - Restore clocks to gated units
+*   - Re-Enable the I-Cache
+*
+* This API performs the following steps (^ Ã’ steps that can be skipped if LCD refresh is not needed):
+*  ^1. Wait for the LCD EndofScreen interrupt (using the callback suppiled in init).
+*   2. Mask both IRQ and FIQ interrupts at the PMU level.
+*   3. Prepare in the PMU scratch pad (SRAM) with the needed code to execute from there.
+*   4. Read the DDR configuration paramters and write them to the scratch pad.
+*   5. Jump to the scratch pad and start executing from there.
+*   6. Block all data requests to the DDR controller (from the SB).
+*  ^7. Disable DRAM DLL via a load mode register command (since the DDR frequency will be stepped down to a very
+*      low value providing banwidth sufficient for refreshing the LCD buffer only).
+*   8. Enter DDR self refresh mode.
+*  ^9. Configure new timing parameters for the MC to adapt the new low frequency.
+* ^10. Configure the "Future Mode" and "Ext Mode"  registers (The actual register updating will occur
+*      only after exiting the DDR self refresh mode).
+* ^11. Configure LCD registers with new values to adapt to the new frequency.
+* ^12. UNBlock data requests to the MC from the SB.
+*  13. Configure the PMU to execute the DeepIdle Enter sequence.
+*  14. Save CPU context on the stack
+*  15. Enater the WFI, where the PMU starts executing the pre-loaded micro code.
+*
+* The PMU micro-code performs the following actions (^ Ã’ steps that can be skipped if LCD refresh is not 
+  needed):
+*   1. Wait the cpu to idle.
+*  ^2. Switch to the 50MHz clock (assert lcd_ref_mode)
+*   3. Exit DDR self refresh mode (This will trigger the holded configuration for the DIMM's mode and 
+*      ext. mode registers).
+*   4. Holds the CPU in reset.
+*   5. Power down the CPU PLL.
+*   6. Indicates to the external PM to power down the CPU power domain (assert cpu_pwrdwn)
+*   7. Wait for external interrupt to start the resume.
+* On receiving a non-masked interrupt, the PMU micro-code performs the following:
+*   8. Wait for the power idicator.
+*   9. Configure the NB clock divider and PLL with the new parameters (taken from registers).
+*  10. Power up the CPU PLL.
+* ^11. Wait for LCD EOS interrupt.
+* ^12. Enter DDR self refresh mode.
+* ^13. Switch back to the normal clock provided by the NB (deassert lcd_ref_mode).
+*  14. Indicate to the external PM to power up the CPU power domain.
+*  15. Unmask the FIQ and IRQ.
+*  16. Release CPU from reset.
+*
+* After releasing the CPU from reset, the CPU starts executing from the BootROM which does the following steps 
+* (^ Ã’ steps that can be skipped if LCD refresh is not needed):
+*   1. Read the PMU status register and detect the need for resume.
+*   2. perform the prepared register configurations in the scratch pad.
+*   3. Jump back to the resume address (in the scratch pad).
+*   4. Restore CPU context.
+*  ^5. Configure LCD registers to work back with NB frequency (not 50MHz used for LCD refresh).
+*  ^6. Configure MC registers to adapt to the regular NB frequency.
+*  ^7. Configure Mode and Ext Mode reigister in the DIMM to work with the regular NB frequency.
+*  ^8. Block all SB data requests.
+*   9. Exit DDR self refresh mode (this will initiate the configuration for the Mode and Ext Mode registers in 
+*      the DIMM).
+* ^10. Confgiure the Mode register to enable the DRAM's DLL via a load mode register command.
+* ^11. UNBlock the SB data access to the DDR.
+*  12. Jump back to the resume address in the DDR.
+*  13. API returns with MV_OK return code.
+*
+* INPUT:
+*       lcdRefresh: Boolean whether to use the LCD refresh mode (EBook) or not.
+* OUTPUT:
+*	None
+* RETURN:
+*    MV_ERROR   : Failed to enter DeepIdle mode
+*    MV_OK      : Resumed successfully after receiving an interrupt
+*******************************************************************************/
+MV_STATUS mvPmuDeepIdle (MV_BOOL lcdRefresh)
+{
+	MV_U32 reg, reg1;
+
+	/* Prepare resume info in SRAM */
+	if (mvPmuSramDeepIdleResumePrep() != MV_OK)
+		return MV_FAIL;
+
+	/* mask out IRQ and FIQ from being assereted to the cpu */
+	/* Disable DDR SR by default */
+	reg = MV_REG_READ(PMU_CTRL_REG);
+	reg |= (PMU_CTRL_MASK_IRQ_MASK | PMU_CTRL_MASK_FIQ_MASK);
+	reg &= ~PMU_CTRL_DDR_SLF_RFRSH_EN_MASK;
+	MV_REG_WRITE(PMU_CTRL_REG, reg);
+
+	/* Set CPU power delay in TCLK cycles */
+	MV_REG_WRITE(PMU_CPU_PWR_DELAY_REG, PMU_DEEPIDLE_CPU_PWR_DLY);
+
+	/* Assume that DDR and L2 clock ratios wil not be changed */
+	reg = (MV_REG_READ(PMU_CPU_DFS_CTRL_REG) & ~(PMU_DFS_CTRL_DDR_RATIO_MASK | PMU_DFS_CTRL_L2_RATIO_MASK));
+	reg1 = MV_REG_READ(PMU_CLK_DIVIDER_0_REG);
+	reg |= (((reg1 & PMU_CLK_DIV_XPRATIO_MASK) >> PMU_CLK_DIV_XPRATIO_OFFS) << PMU_DFS_CTRL_L2_RATIO_OFFS); /* L2 */
+	reg |= (((reg1 & PMU_CLK_DIV_DPRATIO_MASK) >> PMU_CLK_DIV_DPRATIO_OFFS) << PMU_DFS_CTRL_DDR_RATIO_OFFS); /* DDR */
+	MV_REG_WRITE(PMU_CPU_DFS_CTRL_REG, reg);
+
+	/* Jump to the SRAM and execute the DeepIdle routine */
+	mvPmuSramDeepIdle((MV_U32)lcdRefresh);
+
+	/* Reset the DEEP-IDLE bit in the PMU resume status register */
+	reg = MV_REG_READ(PMU_STATUS_REG);
+	reg &= ~PMU_STATUS_DEEPIDLE_MASK;
+	MV_REG_WRITE(PMU_STATUS_REG, reg);
+
+	/* Clear the DeepIdle & Standby Flags in the PMU Status register */
+	/* Otherwise the BootROM will try to resume on the next boot */
+	reg = MV_REG_READ(PMU_STATUS_REG);
+	reg &= ~(PMU_STATUS_DEEPIDLE_MASK | PMU_STATUS_STANDBY_OFFS);
+	MV_REG_WRITE(PMU_STATUS_REG, reg);
+	
+	/* Finally unmask IRQ and FIQ */
+	reg = MV_REG_READ(PMU_CTRL_REG);
+	reg &= ~(PMU_CTRL_MASK_IRQ_MASK | PMU_CTRL_MASK_FIQ_MASK);
+	MV_REG_WRITE(PMU_CTRL_REG, reg);	
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvPmuStandby - Power down the whole SoC. This api blocks untill
+*              receiving an interrupt, which wakes up the SoC and this
+*              api returns to the caller.
+*
+* DESCRIPTION:
+* The caller of this API is resonsible to do the following requirements before:
+*   - Configure the Wake up events.
+*   - Save the context off all Units including the address decoding windows.
+*   - Disable I-Cache.
+*   - Disable IRQ and FIQ at the CPSR level.
+*
+* The caller of this API is also resonsible to do the following requirements after:
+*   - Restore the context off all Units including the address decoding windows.
+*   - Re-enable the I-Cache if needed.
+*   - Re-enable the IRQ and FIQ at the CPSR level.
+*
+* This API performs the following steps:
+*   1. Mask both IRQ and FIQ interrupts at the PMU level.
+*   2. Prepare in the PMU scratch pad (SRAM) with the needed code to execute from there.
+*   3. Read the DDR configuration paramters and write them to the scratch pad.
+*   4. Jump to the scratch pad and start executing from there.
+*   5. Block all data requests to the DDR controller (from the SB).
+*   6. Configure the PMU to execute the Standby Enter sequence.
+*   7. Save CPU context on the stack
+*   8. Enater the WFI, where the PMU starts executing the pre-loaded micro code.
+*
+* The PMU micro-code performs the following actions (^ Ã’ steps that can be skipped if LCD refresh is not 
+  needed):
+*   1. Wait the cpu to idle.
+*   3. Enter DDR self refresh mode.
+*   4. Hold the CPU in reset.
+*   5. Power down the CPU PLL.
+*   6. Request from the external PM to power down the CPU power domain (assert cpu_pwrdwn)
+*   7. Switch the PMU clock to the RTC clock (32KHz).
+*   8. Request from the external PM to power down the whole SoC (assert slp_pwddwn).
+* On receiving a non-masked interrupt, the PMU micro-code performs the following:
+*   9. Request from the external PM to power UP the whole SoC (assert slp_pwddwn).
+*  10. Request from the external PM to power UP the CPU power domain (assert cpu_pwrdwn)
+*  11. Wait for the PLL to lock.
+*  12. Change the clock MUX to the regular clock (instead of the RTC 32KHx clock).
+*  13. Release CPU from reset.
+*
+* After releasing the CPU from reset, the CPU starts executing from the BootROM which does the following steps:
+*   1. Read the PMU status register and detect the need for resume.
+*   2. perform the prepared register configurations in the scratch pad.
+*   3. Jump back to the resume address (in the scratch pad).
+*   4. Restore CPU context.
+*   5. Exit DDR self refresh mode.
+*   6. Release the FIQ and IRQ interrupts.
+*  12. Jump back to the resume address in the DDR.
+*  13. API returns with MV_OK return code.
+*
+* INPUT:
+*	None
+* OUTPUT:
+*	None
+* RETURN:
+*    	MV_ERROR   : Failed to enter Standby mode
+*   	MV_OK      : Resumed successfully after receiving an unmased Wake-up event
+*******************************************************************************/
+MV_STATUS mvPmuStandby (void)
+{
+	MV_U32 reg;
+	MV_U32 pllFreq, n, m, k;
+	MV_U32 ddrDiv = 1;
+	MV_U32 i;
+
+	/* Get current DDR frequency to be configured in resume */
+	reg = MV_REG_READ(PMU_PLL_CTRL_0_REG);
+	n = ((reg & PMU_PLL_N_DIVIDER_MASK) >> PMU_PLL_N_DIVIDER_OFFS) + 1;
+	m = ((reg & PMU_PLL_M_DIVIDER_MASK) >> PMU_PLL_M_DIVIDER_OFFS) + 1;
+	k = ((reg & PMU_PLL_K_DIVIDER_MASK) >> PMU_PLL_K_DIVIDER_OFFS);
+	pllFreq = ((25 * n) / (m * k)); /* function to convert form 25Mhz to PLL frequency */
+	reg = MV_REG_READ(PMU_CLK_DIVIDER_0_REG);
+	reg = ((reg & PMU_CLK_DIV_DPRATIO_MASK) >> PMU_CLK_DIV_DPRATIO_OFFS);
+
+	/* Lookup the DDR divider */
+	for (i = 0; i < MAX_RATIO_MAP_CNT; i++)
+	{
+		if (ratio2DivMapTable[i][1] == reg)
+		{
+			ddrDiv = ratio2DivMapTable[i][0];
+			break;
+		}
+	}
+
+	if (reg == MAX_RATIO_MAP_CNT)
+		return MV_FAIL;
+	
+	/* Prepare resume info in SRAM */
+	if (mvPmuSramStandbyResumePrep(pllFreq/ddrDiv) != MV_OK)
+		return MV_FAIL;
+
+	/* Mast out the M_RESETn for DDR3 */
+
+	/* mask out IRQ and FIQ from being assereted to the cpu */
+	reg = MV_REG_READ(PMU_CTRL_REG);
+	reg |= (PMU_CTRL_MASK_IRQ_MASK | PMU_CTRL_MASK_FIQ_MASK);
+	MV_REG_WRITE(PMU_CTRL_REG, reg);
+
+	/* Set CPU Power delay in RTC clock cyclec */
+	MV_REG_WRITE(PMU_CPU_PWR_DELAY_REG, PMU_STBY_CPU_PWR_DLY);	
+
+	/* Jump to thsd SRAM and execute the Standby routine */
+	mvPmuSramStandby();
+
+	/* Reset the STANDBY bit in the PMU resume status register */
+	reg = MV_REG_READ(PMU_STATUS_REG);
+	reg &= ~PMU_STATUS_STANDBY_MASK;
+	MV_REG_WRITE(PMU_STATUS_REG, reg);
+
+	/* Clear the DeepIdle & Standby Flags in the PMU Status register */
+	/* Otherwise the BootROM will try to resume on the next boot */
+	reg = MV_REG_READ(PMU_STATUS_REG);
+	reg &= ~(PMU_STATUS_DEEPIDLE_MASK | PMU_STATUS_STANDBY_OFFS);
+	MV_REG_WRITE(PMU_STATUS_REG, reg);
+
+	/* Finally unmask IRQ and FIQ */
+	reg = MV_REG_READ(PMU_CTRL_REG);
+	reg &= ~(PMU_CTRL_MASK_IRQ_MASK | PMU_CTRL_MASK_FIQ_MASK);
+	MV_REG_WRITE(PMU_CTRL_REG, reg);
+
+	/* Unmask the M_RESETn for DDR3 */
+
+	/* Restore all uCode Fixes */
+	mvPmuCodeFix();
+
+	/* Restore PMU Control on CPU Reset */
+	reg = MV_REG_READ(CPU_CONTROL_REG);
+	reg |= CPU_CTRL_PMU_CPU_RST_EN_MASK;
+	MV_REG_WRITE(CPU_CONTROL_REG, reg);	
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvPmuWakeupEventSet - Set the Events that can wak up the system from SLEEP.
+*
+* DESCRIPTION:
+*   Bitmap of events that can cause the system to resume after SLEEP
+*
+* INPUT:
+*       Events that should be unmasked (one or more)
+* OUTPUT:
+*	None
+* RETURN:
+*    MV_OK      : Wakeup events mask set successfully
+*******************************************************************************/
+MV_STATUS mvPmuWakeupEventSet (MV_U32 wkupEvents)
+{
+	MV_U32 reg;
+
+	/* Read and modify the Wakeup events */
+	reg = MV_REG_READ(PMU_STBY_WKUP_EVENT_CTRL_REG);
+	reg &= ~(PMU_STBY_WKUP_CTRL_ALL_EV_MASK);
+	reg |= (wkupEvents & PMU_STBY_WKUP_CTRL_ALL_EV_MASK);
+	MV_REG_WRITE(PMU_STBY_WKUP_EVENT_CTRL_REG, reg);
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvPmuWakeupEventGet - Get the Events that can wak up the system from SLEEP
+*
+* DESCRIPTION:
+*   Bitmap of events that can cause the system to resume after SLEEP
+*
+* INPUT:
+*	None
+* OUTPUT:
+*       Events that were unmasked (one or more)
+* RETURN:
+*    MV_OK      : Wakeup events got successfully
+*******************************************************************************/
+MV_STATUS mvPmuWakeupEventGet (MV_U32 * wkupEvents)
+{
+	*wkupEvents = (MV_REG_READ(PMU_STBY_WKUP_EVENT_CTRL_REG) & PMU_STBY_WKUP_CTRL_ALL_EV_MASK);
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvPmuWakeupEventStatusGet - Get the event/s caused the system to wakeup from SLEEP
+*
+* DESCRIPTION:
+*   Bitmap of events that caused the system to resume after SLEEP.
+*
+* INPUT:
+*	None
+* OUTPUT:
+*       Events that were unmasked (one or more)
+* RETURN:
+*    MV_OK      : Wakeup event status read successfully
+*******************************************************************************/
+MV_STATUS mvPmuWakeupEventStatusGet (MV_U32 * wkupEvents)
+{
+	*wkupEvents = (MV_REG_READ(PMU_STBY_WKUP_EVENT_STAT_REG) & PMU_STBY_WKUP_CTRL_ALL_EV_MASK);
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvPmuCpuFreqScale - Change the frequency of the CPU
+*
+* DESCRIPTION:
+*   Change the CPU frequency dynamically at runtime. The following is the sequence used:
+*   1. MASK FIQ and IRQ interrupts at the PMU level.
+*   2. Configure the new CPU speed (Turbo/Slow).
+*   3. Configure the PMU registers to trigger DFS
+*   4. Halt CPU through callig WFI.
+*   5. When the PMU finishes the frequency update, an interrupt is generated that wakes
+*      up the cpu in the new frequency.
+*   6. Check and clean the DFSDone interrupt cause.
+*
+* Requirements:
+*   1. mvPmu Init should be called (to unmask the PMU interrupt in Main Cause register)
+*   2. Before calling this routine, the following should be done:
+*      A. MASK IRQ and FIQ interrupts at the CPSR level
+*      B. UNMASK the PMU interrupt in the Main cause register
+*   3. After exiting this routine, the caller should do the following:
+*      A. UNMASK IRQ and FIQ interrupts at the CPSR level
+*      B. Mask the PMU interrupt if it was originally masked.
+*
+* INPUT:
+*       Cpu clock speed.
+* OUTPUT:
+*       None.
+* RETURN:
+*    MV_ERROR   : Failed to change the CPU frequency
+*    MV_OK      : CPU frequency scalled successfully
+*******************************************************************************/
+MV_STATUS mvPmuCpuFreqScale (MV_PMU_CPU_SPEED cpuSpeed)
+{
+	MV_U32 reg, reg1;
+	
+	/* First verify that DFS is really needed */
+	reg = MV_REG_READ(PMU_DFS_STATUS_REG);
+	reg = ((reg & PMU_DFS_STAT_SLOW_MASK) >> PMU_DFS_STAT_SLOW_OFFS);
+	if (reg == (MV_U32)cpuSpeed)
+		return MV_OK;
+
+	/* Unmask the DFS done interrupt to wakeup the cpu */
+	reg = MV_REG_READ(PMU_INT_MASK_REG);
+	reg |= PMU_INT_DFS_DONE_MASK;
+	MV_REG_WRITE(PMU_INT_MASK_REG, reg);	
+
+	/* mask out IRQ and FIQ from being assereted to the cpu */
+	reg = MV_REG_READ(PMU_CTRL_REG);
+	reg |= (PMU_CTRL_MASK_IRQ_MASK | PMU_CTRL_MASK_FIQ_MASK);
+	MV_REG_WRITE(PMU_CTRL_REG, reg); 
+
+	/* Read the target ratio which should be the DDR ratio */
+	reg1 = MV_REG_READ(PMU_CLK_DIVIDER_0_REG);
+
+	/* Configure new CPU speed and DFS request */
+	reg = MV_REG_READ(PMU_CPU_DFS_CTRL_REG);
+	reg &= ~PMU_DFS_CTRL_L2_RATIO_MASK;
+	if (cpuSpeed == CPU_CLOCK_TURBO)
+	{
+		reg &= ~PMU_DFS_CTRL_SLOW_SPD_MASK;
+		reg |= l2TurboRatio;
+	}
+	else
+	{
+		reg |= PMU_DFS_CTRL_SLOW_SPD_MASK;	
+		reg |= (((reg1 & PMU_CLK_DIV_DPRATIO_MASK) >> PMU_CLK_DIV_DPRATIO_OFFS) << PMU_DFS_CTRL_L2_RATIO_OFFS);
+	}
+	reg |= PMU_DFS_CTRL_DFS_EN_MASK;	
+	MV_REG_WRITE(PMU_CPU_DFS_CTRL_REG, reg);
+
+	/* Start DFS by entering WFI */
+	// __asm__ ("mcr  p15, 0, r0, c7, c0, 4");
+
+	mvPmuSramCpuDfs();
+
+	/* 
+	 * NOTE:
+	 * At this level the PMU have unmasked the IRQ and FIQ bits in the 
+	 * PMU_CONTROL_REGISTER.
+	 */
+
+	/* Check and clear the DFSDone interrupt */
+	reg = MV_REG_READ(PMU_INT_CAUSE_REG);
+	if ((reg & PMU_INT_DFS_DONE_MASK) == 0)
+		return MV_FAIL;
+	reg &= ~PMU_INT_DFS_DONE_MASK;
+	MV_REG_WRITE(PMU_INT_CAUSE_REG, reg);
+	
+	/* Mask the DFS done interrupt */
+	reg = MV_REG_READ(PMU_INT_MASK_REG);
+	reg &= ~PMU_INT_DFS_DONE_MASK;
+	MV_REG_WRITE(PMU_INT_MASK_REG, reg);
+
+	/* Verify the new CPU speed */
+	reg = MV_REG_READ(PMU_DFS_STATUS_REG);
+	reg = ((reg & PMU_DFS_STAT_SLOW_MASK) >> PMU_DFS_STAT_SLOW_OFFS);
+	if (reg != (MV_U32)cpuSpeed)
+		return MV_FAIL;
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvPmuSysFreqScale - Change the frequency of the DDR only
+*
+* DESCRIPTION:
+*   Change the frequency of DDR without changing the PLL frequency. The following 
+*   is the sequence used:
+*   1. MASK FIQ and IRQ interrupts at the PMU level.
+*   2. Based on the target frequency, calculate the values for the MC and clock dividers
+*      and copy them in the PMU scratch pad.
+*   3. Copy the necessary code to the scratch pad to execut from there while changing 
+*      the DDR frequency.
+*   4. Jump and start executing from the scratch pad.
+*   5. Block all data accesses to the MC from the SB.
+*   6. Issue a load Mode Register command to disable/enable the DRAM DLL if needed.
+*   7. Enter DDR self refresh mode.
+*   8. Reconfigure the MC registers with the new timing appropriate to the new frequency, and
+*      issue a load Mode and Extended Mode register configurations to update the DIMM with the
+*      values suitable for the new frequency. Since the DDR in self refresh mode, these cycles
+*      are not executed, and will be held untill execiting the self refresh mode.
+*   9. Configure the PMU to initiate a complete DFS change.
+*  10. Halt CPU through issuing a WFI instruction.
+* At this stage the PMU takes controle and performs the following:
+*  11. Wait for the cpu to idle.
+*  12. Update the clock dividers (CPU, L2, DRAM) with the new values from the registers.
+*  13. Unmask the FIQ and IRQ at the PMU level.
+*  14. generate and interrupt that wakes up the CPU.
+* At this stage the CPU takes back control and continues the flow as follows:
+*  15. Exit DDR self refresh mode. Automaticall the Mode and Extended Mode registers will be
+*      updated (from step 8).
+*  16. UNBLOCK the SB data access to the MC.
+*  17. Jump back to execute from DDR.
+*
+*  The caller is resonsible to do the following before calling this API:
+*  1. Diable FIQ and IRQ interrupts at the CPSR level.
+*  2. Flush and disable all caches.
+*
+* INPUT:
+*       DDR target frequency
+* OUTPUT:
+*       None.
+* RETURN:
+*    MV_ERROR   : Failed to scale to the new frequency
+*    MV_OK      : System frequency scalled successfully
+*******************************************************************************/
+MV_STATUS mvPmuSysFreqScale (MV_U32 ddrFreq, MV_U32 l2Freq, MV_U32 cpuFreq)
+{
+	MV_U32 reg, pllFreq, ddrDiv, l2Div, ddrParamCnt;
+	MV_STATUS ret = MV_OK;
+
+	/* Get current PLL frequency */
+	pllFreq = mvPmuGetPllFreq();
+
+	/* Check Sanity that all frequencies can be derived from current PLL */
+	if (((pllFreq % ddrFreq) != 0) || ((pllFreq % l2Freq) != 0) || ((pllFreq % cpuFreq) != 0))
+		return MV_FAIL;
+	
+	/* Calculate new DDR timing parameters */
+	if (mvPmuSramDdrTimingPrep(ddrFreq, cpuFreq, &ddrParamCnt) != MV_OK)
+		return MV_FAIL;
+
+	/* Get divider value based on the PLL frequency */
+	if((ddrDiv = mvPmuDivider2Ratio(pllFreq/ddrFreq)) == 0)
+		return MV_FAIL;
+	if((l2Div = mvPmuDivider2Ratio(pllFreq/l2Freq)) == 0)
+		return MV_FAIL;
+
+	/* Configure the new DDR and L2 ratios and CPU speed */
+	reg = MV_REG_READ(PMU_CPU_DFS_CTRL_REG);
+	reg &= ~(PMU_DFS_CTRL_DDR_RATIO_MASK | PMU_DFS_CTRL_L2_RATIO_MASK);
+	reg |= (ddrDiv << PMU_DFS_CTRL_DDR_RATIO_OFFS);
+	reg |= (l2Div << PMU_DFS_CTRL_L2_RATIO_OFFS);
+	if(cpuFreq == (pllFreq/2)) /* CPU TURBO speed is always 1/2 of the PLL */
+		reg &= ~PMU_DFS_CTRL_SLOW_SPD_MASK;
+	else /* CPU speed is DDR speed */
+		reg |= PMU_DFS_CTRL_SLOW_SPD_MASK;
+	reg |= PMU_DFS_CTRL_DFS_EN_MASK; 	
+	MV_REG_WRITE(PMU_CPU_DFS_CTRL_REG, reg);
+
+	/* mask out IRQ and FIQ from being assereted to the cpu */
+	reg = MV_REG_READ(PMU_CTRL_REG);
+	reg |= (PMU_CTRL_MASK_IRQ_MASK | PMU_CTRL_MASK_FIQ_MASK);
+	MV_REG_WRITE(PMU_CTRL_REG, reg);
+
+	/* Unmask the DFS done interrupt to wakeup the cpu */
+	reg = MV_REG_READ(PMU_INT_MASK_REG);
+	reg |= PMU_INT_DFS_DONE_MASK;
+	MV_REG_WRITE(PMU_INT_MASK_REG, reg);
+
+	/* Jump to the SRAM and execute the DDR dfs routine */
+	mvPmuSramDdrReconfig(ddrParamCnt);
+
+	/* Check and clear the DFSDone interrupt */
+	reg = MV_REG_READ(PMU_INT_CAUSE_REG);
+	if ((reg & PMU_INT_DFS_DONE_MASK) == 0)
+		ret = MV_FAIL;
+	reg &= ~PMU_INT_DFS_DONE_MASK;
+	MV_REG_WRITE(PMU_INT_CAUSE_REG, reg);
+	
+	/* Mask the DFS done interrupt */
+	reg = MV_REG_READ(PMU_INT_MASK_REG);
+	reg &= ~PMU_INT_DFS_DONE_MASK;
+	MV_REG_WRITE(PMU_INT_MASK_REG, reg);
+
+	/* Verify the new CPU speed */
+	reg = MV_REG_READ(PMU_DFS_STATUS_REG);
+	reg = ((reg & PMU_DFS_STAT_DDR_RATIO_MASK) >> PMU_DFS_STAT_DDR_RATIO_OFFS);
+	if (reg != ddrDiv)
+		ret = MV_FAIL;
+
+	/* IRQ and FIQ are unmasked by the PMU */
+#if 0
+	reg = MV_REG_READ(PMU_CTRL_REG);
+	reg &= ~(PMU_CTRL_MASK_IRQ_MASK | PMU_CTRL_MASK_FIQ_MASK);
+	MV_REG_WRITE(PMU_CTRL_REG, reg);
+#endif
+
+	return ret;
+}
+
+/*******************************************************************************
+* mvPmuDvs - Dynamic Voltage Scale
+*
+* DESCRIPTION:
+*   Change the voltage supplied to the CPU power domain using the external PMIC. 
+*   This call is blocking (busy wait) waiting for completion.
+*   The following is the sequence used:
+*   1. Set the new PMIC parameters in the "CPU DVS Control" register.
+*   2. Initiate the voltage change by setting the "DVSEn" bit.
+*   3. Wait for the change to occur by monitoring the 
+*   4. Halt CPU through callig WFI.
+*   5. When the PMU finishes the frequency update, an interrupt is generated that wakes
+*      up the cpu in the new frequency.
+*   6. UNMASK FIQ and IRQ interrupts.
+*
+* INPUT:
+*       pSet: PMIC Vout percentage
+*       vSet: PMIC Vout level
+*       rAddr: PMIC register offset
+*       sAddr: PMIC Slave address
+* OUTPUT:
+*       None.
+* RETURN:
+*    MV_TIMEOUT : Timed out waiting for DVS completion
+*    MV_OK      : Voltage scalled successfully
+*******************************************************************************/	
+MV_STATUS mvPmuDvs (MV_U32 pSet, MV_U32 vSet, MV_U32 rAddr, MV_U32 sAddr)
+{
+	MV_U32 reg;
+	MV_U32 i;
+
+	/* Clean the PMU cause register */
+	MV_REG_WRITE(PMU_INT_CAUSE_REG, 0x0);
+
+	/* Trigger the DVS */
+	reg = ((sAddr << PMU_DVS_CTRL_PMIC_SADDR_OFFS) & PMU_DVS_CTRL_PMIC_SADDR_MASK);
+	reg |= ((rAddr << PMU_DVS_CTRL_PMIC_RADDR_OFFS) & PMU_DVS_CTRL_PMIC_RADDR_MASK);
+	reg |= ((vSet << PMU_DVS_CTRL_PMIC_VSET_OFFS) & PMU_DVS_CTRL_PMIC_VSET_MASK);
+	reg |= ((pSet << PMU_DVS_CTRL_PMIC_PSET_OFFS) & PMU_DVS_CTRL_PMIC_PSET_MASK);
+	MV_REG_WRITE(PMU_CPU_DVS_CTRL_REG, reg);
+	reg |= PMU_DVS_CTRL_DVS_EN_MASK;
+	MV_REG_WRITE(PMU_CPU_DVS_CTRL_REG, reg);
+
+	/* Disable all PMU interrupts and enable DVS done */
+	reg = MV_REG_READ(PMU_INT_MASK_REG);
+	MV_REG_WRITE(PMU_INT_MASK_REG, PMU_INT_DVS_DONE_MASK);
+	for (i=0; i<PMU_DVS_POLL_DLY; i++)
+		if ((MV_REG_READ(0x20210) & 0x2) == 0x0)
+			break;
+	
+	/* return the original PMU MASK */
+	MV_REG_WRITE(PMU_INT_MASK_REG, reg);
+
+	if (i == PMU_DVS_POLL_DLY)	
+		return MV_TIMEOUT;
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvPmuClockGateSet - Set the clock gating status
+*
+* DESCRIPTION:
+*   Set the clock gating status of one or more units in the SoC
+*
+* INPUT:
+*       unitMask: Maks of unit/s to be gated/ungated
+*       gateStatus: gate/ungate (TRUE/FALSE) clock on specified units.
+* OUTPUT:
+*       None.
+* RETURN:
+*    MV_OK      : Request performed successfully
+*******************************************************************************/	
+MV_STATUS mvPmuClockGateSet (MV_U32 unitMask, MV_BOOL gateStatus)
+{
+	MV_U32 reg;
+
+	reg = MV_REG_READ(PMU_CLK_GATING_CTRL_REG);
+	reg &= unitMask;
+	reg |= gateStatus;
+	MV_REG_WRITE(PMU_CLK_GATING_CTRL_REG, reg);
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvPmuClockGateGet - Get the clock gating status
+*
+* DESCRIPTION:
+*   Get the clock gating status of one or more units in the SoC
+*
+* INPUT:
+*       None
+* OUTPUT:
+*       gateStatus: gate/ungate (TRUE/FALSE) clock on specified units
+* RETURN:
+*    MV_OK      : Request performed successfully
+*******************************************************************************/	
+MV_STATUS mvPmuClockGateGet (MV_BOOL * gateStatus)
+{
+	*gateStatus = MV_REG_READ(PMU_CLK_GATING_CTRL_REG);
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvPmuTempThresholdSet - Set the upper and lower temperature thresholds, and enable/disable
+*                         the thermal Manager.
+*
+* DESCRIPTION:
+*   Set the upper (overheat) and lower (cool) temperature thresholds.
+*
+* INPUT:
+*       coolThr: lower threshold to declare normal state (0-511)
+*       overheatThr: higher threshold to declare and overheat state (0-511)
+*       thrMngrEn: enable/disable (TRUE/FALSE) thermal manager.
+* OUTPUT:
+*       None.
+* RETURN:
+*    MV_OK      : Request performed successfully
+*******************************************************************************/	
+MV_STATUS mvPmuTempThresholdSet (MV_U32 coolThr, MV_U32 overheatThr, MV_BOOL thrMngrEn)
+{
+	MV_U32 reg;
+
+	reg = MV_REG_READ(PMU_THERMAL_MNGR_REG);
+	reg &= ~(PMU_TM_DISABLE_MASK | PMU_TM_OVRHEAT_THRSH_MASK | PMU_TM_COOL_THRSH_MASK);
+	reg |= ((overheatThr << PMU_TM_OVRHEAT_THRSH_OFFS) & PMU_TM_OVRHEAT_THRSH_MASK);
+	reg |= ((coolThr << PMU_TM_COOL_THRSH_OFFS) & PMU_TM_COOL_THRSH_MASK);
+	if (thrMngrEn == MV_FALSE)
+		reg |=  PMU_TM_DISABLE_MASK;
+	MV_REG_WRITE(PMU_THERMAL_MNGR_REG, reg);
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvPmuTempThresholdGet - Get the upper and lower temperature thresholds, and status 
+*                         (enable/disable) of the thermal Manager.
+*
+* DESCRIPTION:
+*   Get the upper (overheat) and lower (cool) temperature thresholds and status
+*
+* INPUT:
+*	None
+* OUTPUT:
+*       coolThr: lower threshold to declare normal state.
+*       overheatThr: higher threshold to declare and overheat state.
+*       thrMngrEn: enable/disable (TRUE/FALSE) thermal manager.
+* RETURN:
+*    MV_OK      : Request performed successfully
+*******************************************************************************/	
+MV_STATUS mvPmuTempThresholdGet (MV_U32 *coolThr, MV_U32 *overheatThr, MV_BOOL *thrMngrEn)
+{
+	MV_U32 reg;
+
+	reg = MV_REG_READ(PMU_THERMAL_MNGR_REG);
+	*coolThr = ((reg & PMU_TM_COOL_THRSH_MASK) >> PMU_TM_COOL_THRSH_OFFS);
+	*overheatThr = ((reg & PMU_TM_OVRHEAT_THRSH_MASK) >> PMU_TM_OVRHEAT_THRSH_OFFS);
+	if (reg & PMU_TM_DISABLE_MASK)
+		*thrMngrEn = MV_FALSE;
+	else
+		*thrMngrEn = MV_TRUE;
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvPmuTempGet - Read the current temperature
+*
+* DESCRIPTION:
+*       Read the current temperature measured by the thermal diode.
+*
+* INPUT:
+*	None
+* OUTPUT:
+*       temp: Temperature value read (0-511).
+* RETURN:
+*    MV_NOT_READY   : Temperature reading is not yet valid
+*    MV_OK          : Temperature read OK.
+*******************************************************************************/
+MV_STATUS mvPmuTempGet (MV_U32 *temp)
+{
+	if (MV_REG_READ(PMU_TEMP_DIOD_CTRL1_REG) & PMU_TDC1_TEMP_VLID_MASK)
+	{
+		*temp = ((MV_REG_READ(PMU_THERMAL_MNGR_REG) & PMU_TM_CURR_TEMP_MASK) >> PMU_TM_CURR_TEMP_OFFS);
+		return MV_OK;
+	}
+
+	return MV_NOT_READY;
+}
+
+/*******************************************************************************
+* mvPmuTempSensorCfgSet - Set the sensor configuration
+*
+* DESCRIPTION:
+*     	Configure the sensor according to the input
+*
+* INPUT:
+*	snsrInfo : sensor configurations
+* OUTPUT:
+*       None
+* RETURN:
+*    MV_OK          : Configuration done successfully
+*******************************************************************************/
+MV_STATUS mvPmuTempSensorCfgSet (MV_TEMP_SNSR_INFO snsrInfo)
+{
+	MV_U32 reg;
+
+	/* Configure the overheat and cooling delays */
+	MV_REG_WRITE(PMU_TM_OVRHEAT_DLY_REG, snsrInfo.overheatDelay);
+	MV_REG_WRITE(PMU_TM_COOLING_DLY_REG, snsrInfo.coolingDelay);
+
+	/* Configure the Thermal Diode Control 0 register */
+	reg = 0;
+	if (snsrInfo.powerDown) reg |= 	PMU_TDC0_PWR_DWN_MASK;
+	reg |= ((snsrInfo.tcTrip << PMU_TDC0_TC_TRIP_OFFS) & PMU_TDC0_TC_TRIP_MASK);
+	reg |= ((snsrInfo.selVcal << PMU_TDC0_SEL_VCAL_OFFS) & PMU_TDC0_SEL_VCAL_MASK);
+	if (snsrInfo.vbeBypass) reg |= PMU_TDC0_VBE_BYPS_MASK;
+	if (snsrInfo.selRefIcc) reg |= PMU_TDC0_SELF_RFRNC_MASK; 
+	reg |= ((snsrInfo.aTest << PMU_TDC0_A_TEST_OFFS) & PMU_TDC0_A_TEST_MASK);
+	reg |= ((snsrInfo.refCalCount << PMU_TDC0_REF_CAL_CNT_OFFS) & PMU_TDC0_REF_CAL_CNT_MASK);
+	reg |= ((snsrInfo.selCalCapInt << PMU_TDC0_CAL_CAP_SRC_OFFS) & PMU_TDC0_CAL_CAP_SRC_MASK);
+	reg |= ((snsrInfo.averageNumber	<< PMU_TDC0_AVG_NUM_OFFS) & PMU_TDC0_AVG_NUM_MASK);
+	if (snsrInfo.selDblSlope) reg |= PMU_TDC0_DBL_SLOP_MASK;
+	if (snsrInfo.otfCal) reg |= PMU_TDC0_OTF_CAL_MASK;
+	if (snsrInfo.sleepEnable) reg |= PMU_TDC0_SLEEP_EN_MASK;
+	MV_REG_WRITE(PMU_TEMP_DIOD_CTRL0_REG, reg);
+
+	/* Configure the Thermale Diode Control 1 register */
+	reg = MV_REG_READ(PMU_TEMP_DIOD_CTRL1_REG);
+	reg &= ~(PMU_TDC1_CAL_STRT_VAL_MASK);
+	reg |= ((snsrInfo.initCalibVal <<  PMU_TDC1_CAL_STRT_VAL_OFFS) & PMU_TDC1_CAL_STRT_VAL_MASK);
+	MV_REG_WRITE(PMU_TEMP_DIOD_CTRL1_REG, reg);
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvPmuTempSensorCalib - Trigger temperature calibration process
+*
+* DESCRIPTION:
+*       Start the calibration process and wait for it to finish
+*
+* INPUT:
+*	None
+* OUTPUT:
+*       None
+* RETURN:
+*    	MV_TIMEOUT : Timeouted waiting for calibration to finish
+*    	MV_OK      : Calibration started and ended successfully
+*******************************************************************************/
+MV_STATUS mvPmuTempSensorCalib (void)
+{
+	MV_U32 reg;
+	MV_U32 timeout;
+
+	/* Flip the state of the calibration start bit */
+	reg = MV_REG_READ(PMU_TEMP_DIOD_CTRL1_REG);
+	MV_REG_WRITE (PMU_TEMP_DIOD_CTRL1_REG, (reg ^ PMU_TDC1_STRT_CAL_MASK));
+	
+	/* Wait for the end of calibration indication */
+	for (timeout=0; timeout < 100000; timeout++)
+	{
+		if (MV_REG_READ(PMU_TEMP_DIOD_CTRL1_REG) & PMU_TDC1_CAL_STAT_MASK)
+			return MV_OK;
+	}
+	return MV_TIMEOUT;
+}
+
+/*******************************************************************************
+* mvPmuGpuPowerDown - Power Down/Up the Graphical Unit
+*
+* DESCRIPTION:
+*       Power down/up the graphical unit
+*
+* INPUT:
+*	pwrStat: power down status
+* OUTPUT:
+*       None
+* RETURN:
+*    	MV_OK      : Calibration started and ended successfully
+*******************************************************************************/
+MV_STATUS mvPmuGpuPowerDown(MV_BOOL pwrStat)
+{
+	MV_U32 reg;
+
+	if (pwrStat)
+	{
+		/* Isolate unit */
+		reg = MV_REG_READ(PMU_ISO_CTRL_REG);
+		reg &= ~PMU_ISO_GPU_MASK;
+		MV_REG_WRITE(PMU_ISO_CTRL_REG, reg);
+
+		/* Reset unit */
+		reg = MV_REG_READ(PMU_SW_RST_CTRL_REG);
+		reg &= ~PMU_SW_RST_GPU_MASK;
+		MV_REG_WRITE(PMU_SW_RST_CTRL_REG, reg);
+
+		/* Power down the unit */
+		reg = MV_REG_READ(PMU_PWR_SUPLY_CTRL_REG);
+		reg |= PMU_PWR_GPU_PWR_DWN_MASK;
+		MV_REG_WRITE(PMU_PWR_SUPLY_CTRL_REG, reg);
+	}
+	else
+	{
+		/* Power up the unit */
+		reg = MV_REG_READ(PMU_PWR_SUPLY_CTRL_REG);
+		reg &= ~PMU_PWR_GPU_PWR_DWN_MASK;
+		MV_REG_WRITE(PMU_PWR_SUPLY_CTRL_REG, reg);
+	
+		/* Add delay to wait for Power Up */
+
+		/* Deassert unit Reset */
+		reg = MV_REG_READ(PMU_SW_RST_CTRL_REG);
+		reg |= PMU_SW_RST_GPU_MASK;
+		MV_REG_WRITE(PMU_SW_RST_CTRL_REG, reg);
+
+		/* Deassert unit Isolation*/
+		reg = MV_REG_READ(PMU_ISO_CTRL_REG);
+		reg |= PMU_ISO_GPU_MASK;
+		MV_REG_WRITE(PMU_ISO_CTRL_REG, reg);
+	}
+	
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvPmuVpuPowerDown - Power Down/Up the Video Unit
+*
+* DESCRIPTION:
+*       Power down/up the Video Processing unit
+*
+* INPUT:
+*	pwrStat: power down status
+* OUTPUT:
+*       None
+* RETURN:
+*    	MV_OK      : Calibration started and ended successfully
+*******************************************************************************/
+MV_STATUS mvPmuVpuPowerDown(MV_BOOL pwrStat)
+{
+	MV_U32 reg;
+
+	if (pwrStat)
+	{
+		/* Isolate unit */
+		reg = MV_REG_READ(PMU_ISO_CTRL_REG);
+		reg &= ~PMU_ISO_VIDEO_MASK;
+		MV_REG_WRITE(PMU_ISO_CTRL_REG, reg);
+
+		/* Reset unit */
+		reg = MV_REG_READ(PMU_SW_RST_CTRL_REG);
+		reg &= ~PMU_SW_RST_VIDEO_MASK;
+		MV_REG_WRITE(PMU_SW_RST_CTRL_REG, reg);
+
+		/* Power down the unit */
+		reg = MV_REG_READ(PMU_PWR_SUPLY_CTRL_REG);
+		reg |= PMU_PWR_VPU_PWR_DWN_MASK;
+		MV_REG_WRITE(PMU_PWR_SUPLY_CTRL_REG, reg);
+	}
+	else
+	{
+		/* Power up the unit */
+		reg = MV_REG_READ(PMU_PWR_SUPLY_CTRL_REG);
+		reg &= ~PMU_PWR_VPU_PWR_DWN_MASK;
+		MV_REG_WRITE(PMU_PWR_SUPLY_CTRL_REG, reg);
+	
+		/* Add delay to wait for Power Up */
+
+		/* Deassert unit Reset */
+		reg = MV_REG_READ(PMU_SW_RST_CTRL_REG);
+		reg |= PMU_SW_RST_VIDEO_MASK;
+		MV_REG_WRITE(PMU_SW_RST_CTRL_REG, reg);
+
+		/* Deassert unit Isolation*/
+		reg = MV_REG_READ(PMU_ISO_CTRL_REG);
+		reg |= PMU_ISO_VIDEO_MASK;
+		MV_REG_WRITE(PMU_ISO_CTRL_REG, reg);
+	}
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvPmuGetPllFreq - Detect the current PLL frequency
+*
+* DESCRIPTION:
+*       Detect the current PLL frequency
+*
+* INPUT:
+*	None
+* OUTPUT:
+*       None
+* RETURN:
+*    	PLL frequency
+*******************************************************************************/	
+static MV_U32 mvPmuGetPllFreq(void)
+{
+	MV_U32 n, m, k, reg;
+	
+	reg = MV_REG_READ(MPP_SAMPLE_AT_RESET_REG1);
+	if (reg & (1 << 13)) /* if SaR45 is set, pll is overriden*/
+	    return 2000;
+	/* Get current DDR frequency to be configured in resume */
+	reg = MV_REG_READ(PMU_PLL_CTRL_0_REG);
+	n = ((reg & PMU_PLL_N_DIVIDER_MASK) >> PMU_PLL_N_DIVIDER_OFFS) + 1;
+	m = ((reg & PMU_PLL_M_DIVIDER_MASK) >> PMU_PLL_M_DIVIDER_OFFS) + 1;
+	k = ((reg & PMU_PLL_K_DIVIDER_MASK) >> PMU_PLL_K_DIVIDER_OFFS);
+	
+	return ((25 * n) / (m * k)); /* function to convert form 25Mhz to PLL frequency */
+}
+
+/*******************************************************************************
+* mvPmuRatio2Divider - Convert frequency ratio to divider value
+*
+* DESCRIPTION:
+*       Convert frequency ratio to divider value
+*
+* INPUT:
+*	Ratio
+* OUTPUT:
+*       None
+* RETURN:
+*    	Divider value
+*******************************************************************************/
+static MV_U32 mvPmuRatio2Divider(MV_U32 ratio)
+{
+	MV_U32 i;
+
+	for (i = 0; i < MAX_RATIO_MAP_CNT; i++)
+	{
+		if (ratio2DivMapTable[i][1] == ratio)
+			return ratio2DivMapTable[i][0];
+	}
+
+	return 0;
+}
+
+/*******************************************************************************
+* mvPmuRatio2Divider - Convert divider value to ratio
+*
+* DESCRIPTION:
+*       Convert divider value to ratio
+*
+* INPUT:
+*	divider
+* OUTPUT:
+*       None
+* RETURN:
+*    	Ratio value
+*******************************************************************************/
+static MV_U32 mvPmuDivider2Ratio(MV_U32 div)
+{
+	MV_U32 i;
+
+	for (i = 0; i < MAX_RATIO_MAP_CNT; i++)
+	{
+		if (ratio2DivMapTable[i][0] == div)
+			return ratio2DivMapTable[i][1];
+	}
+
+	return 0;
+}
+
+/*******************************************************************************
+* mvPmuVpuPowerDown - Power Down/Up the Video Unit
+*
+* DESCRIPTION:
+*       Power down/up the Video Processing unit
+*
+* INPUT:
+*	pwrStat: power down status
+* OUTPUT:
+*       None
+* RETURN:
+*    	MV_OK      : Calibration started and ended successfully
+*******************************************************************************/
+MV_STATUS mvPmuGetCurrentFreq(MV_PMU_FREQ_INFO * freqs)
+{
+	MV_U32 reg;
+	MV_U32 pllFreq;
+	MV_U32 div, ratio;
+	
+	/* Get current DDR frequency to be configured in resume */
+	pllFreq = mvPmuGetPllFreq();
+	freqs->pllFreq = pllFreq;
+	reg = MV_REG_READ(PMU_CLK_DIVIDER_0_REG);
+	
+	/* CPU frequency */
+	ratio = ((reg & PMU_CLK_DIV_PPRATIO_MASK) >> PMU_CLK_DIV_PPRATIO_OFFS);
+	if ((div = mvPmuRatio2Divider(ratio)) == 0)
+		return MV_FAIL;
+	freqs->cpuFreq = (pllFreq/div);
+
+	/* AXI frequency */
+	ratio = ((reg & PMU_CLK_DIV_BPRATIO_MASK) >> PMU_CLK_DIV_BPRATIO_OFFS);
+	if ((div = mvPmuRatio2Divider(ratio)) == 0)
+		return MV_FAIL;
+	freqs->axiFreq = (pllFreq/div);
+
+	/* L2 frequency */
+	ratio = ((reg & PMU_CLK_DIV_XPRATIO_MASK) >> PMU_CLK_DIV_XPRATIO_OFFS);
+	if ((div = mvPmuRatio2Divider(ratio)) == 0)
+		return MV_FAIL;
+	freqs->l2Freq = (pllFreq/div);
+
+	/* DDR frequency */
+	ratio = ((reg & PMU_CLK_DIV_DPRATIO_MASK) >> PMU_CLK_DIV_DPRATIO_OFFS);
+	if ((div = mvPmuRatio2Divider(ratio)) == 0)
+		return MV_FAIL;
+	freqs->ddrFreq = (pllFreq/div);
+	
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvPmuCpuSetOP - Set the CPU operating point
+*
+* DESCRIPTION:
+*       CPU frequency TURBO->DDR: step down frequency, then step down voltage
+*	CPU frequency DDR->TURBO: step up voltage, then step up frequency
+*
+* INPUT:
+*	cpuSpeed: desired spu speed
+*	dvsEnable:  enable voltage scaling with frequency
+* OUTPUT:
+*       None
+* RETURN:
+*    	MV_OK      : operating point changed successfully
+*******************************************************************************/
+MV_STATUS mvPmuCpuSetOP (MV_PMU_CPU_SPEED cpuSpeed, MV_BOOL dvsEnable)
+{
+	MV_STATUS ret = MV_OK;
+	
+	/* based on requested Operating Point set volatge and frequency */
+	switch (cpuSpeed) {
+		case CPU_CLOCK_TURBO:
+			if ((dvsEnable) && (mvPmuDvs (DOVE_PSET_HI, DOVE_VSET_HI, DOVE_RADDR, DOVE_SADDR) != MV_OK))
+				ret = MV_FAIL;
+
+			if (mvPmuCpuFreqScale (CPU_CLOCK_TURBO) != MV_OK)
+				ret = MV_FAIL;
+			break;
+
+		case CPU_CLOCK_SLOW:
+			if (mvPmuCpuFreqScale (CPU_CLOCK_SLOW) != MV_OK)
+				ret = MV_FAIL;
+
+			if ((dvsEnable) && (mvPmuDvs (DOVE_PSET_LO, DOVE_VSET_LO, DOVE_RADDR, DOVE_SADDR) != MV_OK))
+				ret = MV_FAIL;
+			break;
+
+		default:
+			return MV_FAIL;
+	};
+
+	return ret;
+}
+
+/*******************************************************************************
+* mvPmuCpuIdleThresholdsSet - Set Hi and Low Thresholds	
+*
+* DESCRIPTION:
+*       Set thresholds value in core clock cycles. If Idle time exceeds the
+*       hi threshold, a HIGH interrupt is issued. If Idle time drops below
+*       the low threshold, a LOW interrupt is issued.
+*
+* INPUT:
+*	hiThreshold: Core clock cycles fixing the HIGH threshold
+*       lowThreshold: Core clock cycles fixing the LOW threshold
+* OUTPUT:
+*       None
+* RETURN:
+*    	None
+*******************************************************************************/
+MV_VOID mvPmuCpuIdleThresholdsSet(MV_U32 hiThreshold, MV_U32 lowThreshold)
+{
+	MV_REG_WRITE(PMU_CPU_IDLE_HI_THRSHLD_REG, hiThreshold);
+	MV_REG_WRITE(PMU_CPU_IDLE_LOW_THRSHLD_REG, lowThreshold);
+}
+
+/*******************************************************************************
+* mvPmuCpuIdleTimeBaseValueSet - Set the IDLE base value
+*
+* DESCRIPTION:
+*       Set the Time base for calculating the IDLE time.
+*
+* INPUT:
+*       timeBase: Core clock cycles for each iteration
+* OUTPUT:
+*       None
+* RETURN:
+*    	None
+*******************************************************************************/
+MV_VOID mvPmuCpuIdleTimeBaseValueSet(MV_U32 timeBase)
+{
+	MV_REG_WRITE(PMU_CPU_IDLE_TMR_VAL_REG, timeBase);
+}
+
+/*******************************************************************************
+* mvPmuCpuIdleIntMaskSet - Set the interrupt Mask
+*
+* DESCRIPTION:
+*       Enable/Disable the Hi/low interrupts
+*
+* INPUT:
+*       hiIntEnable: enable/disable (MV_TRUE/MV_FALSE) hi interrupt
+*       lowIntEnable: enable/disable (MV_TRUE/MV_FALSE) low interrupt
+* OUTPUT:
+*       None
+* RETURN:
+*    	None
+*******************************************************************************/
+MV_VOID mvPmuCpuIdleIntMaskSet(MV_BOOL hiIntEnable, MV_BOOL lowIntEnable)
+{
+	MV_U32 reg = MV_REG_READ(PMU_IDLE_CTRL_STAT_REG);
+	
+	if (hiIntEnable)
+		reg |= PMU_CPU_IDLE_HI_MASK_MASK;
+	else
+		reg &= ~PMU_CPU_IDLE_HI_MASK_MASK;
+
+	if (lowIntEnable)
+		reg |= PMU_CPU_IDLE_LOW_MASK_MASK;
+	else
+		reg &= ~PMU_CPU_IDLE_LOW_MASK_MASK;
+
+	MV_REG_WRITE(PMU_IDLE_CTRL_STAT_REG, reg);
+}
+
+/*******************************************************************************
+* mvPmuCpuIdleTimeGet - Get the latest Idle
+*
+* DESCRIPTION:
+*       Get the value of the IDLE counter in the last iteration
+*
+* INPUT:
+*       None
+* OUTPUT:
+*       None
+* RETURN:
+*    	Core clock cycles the CPU was IDLE in last iteratio
+*******************************************************************************/
+MV_U32 mvPmuCpuIdleTimeGet(void)
+{
+	return MV_REG_READ(PMU_CPU_IDLE_RESULT_REG);
+}
+
+/*******************************************************************************
+* mvPmuCpuIdleIntStatGet - Get the interrupt cause status
+*
+* DESCRIPTION:
+*       Get the interrupt status if asserted/deasserted (MV_TRUE/MV_FALSE)
+*
+* INPUT:
+*       None
+* OUTPUT:
+*       hiIntStat: return the hi interrupt status
+*	lowintStat: return the low interrupt status
+* RETURN:
+*    	None
+*******************************************************************************/
+MV_VOID mvPmuCpuIdleIntStatGet(MV_BOOL *hiIntStat, MV_BOOL *lowIntStat)
+{
+	MV_U32 reg = MV_REG_READ(PMU_IDLE_CTRL_STAT_REG);
+
+	if (reg & PMU_CPU_IDLE_HI_STAT_MASK)
+		*hiIntStat = MV_TRUE;
+	else
+		*hiIntStat = MV_FALSE;
+
+	if (reg & PMU_CPU_IDLE_LOW_STAT_MASK)
+		*hiIntStat = MV_TRUE;
+	else
+		*hiIntStat = MV_FALSE;
+}
+
+/*******************************************************************************
+* mvPmuMcIdleThresholdsSet - Set Hi and Low Thresholds	
+*
+* DESCRIPTION:
+*       Set thresholds value in core clock cycles. If Idle time exceeds the
+*       hi threshold, a HIGH interrupt is issued. If Idle time drops below
+*       the low threshold, a LOW interrupt is issued.
+*
+* INPUT:
+*	hiThreshold: Core clock cycles fixing the HIGH threshold
+*       lowThreshold: Core clock cycles fixing the LOW threshold
+* OUTPUT:
+*       None
+* RETURN:
+*    	None
+*******************************************************************************/
+MV_VOID mvPmuMcIdleThresholdsSet(MV_U32 hiThreshold, MV_U32 lowThreshold)
+{
+	MV_REG_WRITE(PMU_MC_IDLE_HI_THRSHLD_REG, hiThreshold);
+	MV_REG_WRITE(PMU_MC_IDLE_LOW_THRSHLD_REG, lowThreshold);
+}
+
+/*******************************************************************************
+* mvPmuMcIdleTimeBaseValueSet - Set the IDLE base value
+*
+* DESCRIPTION:
+*       Set the Time base for calculating the IDLE time.
+*
+* INPUT:
+*       timeBase: Core clock cycles for each iteration
+* OUTPUT:
+*       None
+* RETURN:
+*    	None
+*******************************************************************************/
+MV_VOID mvPmuMcIdleTimeBaseValueSet(MV_U32 timeBase)
+{
+	MV_REG_WRITE(PMU_MC_IDLE_TMR_VAL_REG, timeBase);
+}
+
+/*******************************************************************************
+* mvPmuMcIdleIntMaskSet - Set the interrupt Mask
+*
+* DESCRIPTION:
+*       Enable/Disable the Hi/low interrupts
+*
+* INPUT:
+*       hiIntEnable: enable/disable (MV_TRUE/MV_FALSE) hi interrupt
+*       lowIntEnable: enable/disable (MV_TRUE/MV_FALSE) low interrupt
+* OUTPUT:
+*       None
+* RETURN:
+*    	None	
+*******************************************************************************/
+MV_VOID mvPmuMcIdleIntMaskSet(MV_BOOL hiIntEnable, MV_BOOL lowIntEnable)
+{
+	MV_U32 reg = MV_REG_READ(PMU_IDLE_CTRL_STAT_REG);
+	
+	if (hiIntEnable)
+		reg |= PMU_MC_IDLE_HI_MASK_MASK;
+	else
+		reg &= ~PMU_MC_IDLE_HI_MASK_MASK;
+
+	if (lowIntEnable)
+		reg |= PMU_MC_IDLE_LOW_MASK_MASK;
+	else
+		reg &= ~PMU_MC_IDLE_LOW_MASK_MASK;
+
+	MV_REG_WRITE(PMU_IDLE_CTRL_STAT_REG, reg);
+}
+
+/*******************************************************************************
+* mvPmuMcIdleTimeGet - Get the latest Idle
+*
+* DESCRIPTION:
+*       Get the value of the IDLE counter in the last iteration
+*
+* INPUT:
+*       None
+* OUTPUT:
+*       None
+* RETURN:
+*    	Core clock cycles the CPU was IDLE in last iteratio
+*******************************************************************************/
+MV_U32 mvPmuMcIdleTimeGet(void)
+{
+	return MV_REG_READ(PMU_MC_IDLE_RESULT_REG);
+}
+
+/*******************************************************************************
+* mvPmuMcIdleIntStatGet - Get the interrupt cause status
+*
+* DESCRIPTION:
+*       Get the interrupt status if asserted/deasserted (MV_TRUE/MV_FALSE)
+*
+* INPUT:
+*       None
+* OUTPUT:
+*       hiIntStat: return the hi interrupt status
+*	lowintStat: return the low interrupt status
+* RETURN:
+*    	None
+*******************************************************************************/
+MV_VOID mvPmuMcIdleIntStatGet(MV_BOOL *hiIntStat, MV_BOOL *lowIntStat)
+{
+	MV_U32 reg = MV_REG_READ(PMU_IDLE_CTRL_STAT_REG);
+
+	if (reg & PMU_MC_IDLE_HI_STAT_MASK)
+		*hiIntStat = MV_TRUE;
+	else
+		*hiIntStat = MV_FALSE;
+
+	if (reg & PMU_MC_IDLE_LOW_STAT_MASK)
+		*hiIntStat = MV_TRUE;
+	else
+		*hiIntStat = MV_FALSE;
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/pmu/mvCompVer.txt
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/pmu/mvCompVer.txt
@@ -0,0 +1,4 @@
+Global HAL Version: DOVE_HAL_3_1_2
+Unit HAL Version: 1.0.2
+Description: This component includes an implementation of the unit HAL drivers
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/mvSHA1.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/mvSHA1.c
@@ -0,0 +1,240 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "mvSHA1.h"
+
+#define SHA1HANDSOFF  
+
+typedef union 
+{
+    MV_U8   c[64];
+    MV_U32  l[16];
+
+} CHAR64LONG16;
+
+static void mvSHA1Transform(MV_U32 state[5], const MV_U8 *buffer); 
+
+#define rol(value, bits) (((value) << (bits)) | ((value) >> (32 - (bits))))
+
+ 
+#ifdef MV_CPU_LE
+#define blk0(i) (block->l[i] = (rol(block->l[i], 24) & 0xFF00FF00) | \
+        (rol(block->l[i], 8) & 0x00FF00FF))
+#else
+#define blk0(i) block->l[i]
+#endif
+#define blk(i) (block->l[i & 15] = rol(block->l[(i + 13) & 15] ^ \
+        block->l[(i + 8) & 15] ^ block->l[(i + 2) & 15] ^ block->l[i & 15], 1))
+
+/* (R0+R1), R2, R3, R4 are the different operations used in SHA1 */
+#define R0(v,w,x,y,z,i) \
+        z += ((w & (x ^ y)) ^ y) + blk0(i) + 0x5A827999 + rol(v, 5); \
+        w = rol(w, 30);
+#define R1(v,w,x,y,z,i) \
+        z += ((w & (x ^ y)) ^ y) + blk(i) + 0x5A827999 + rol(v, 5); \
+        w = rol(w, 30);
+#define R2(v,w,x,y,z,i) \
+        z += (w ^ x ^ y) + blk(i) + 0x6ED9EBA1 + rol(v, 5); w = rol(w, 30);
+#define R3(v,w,x,y,z,i) \
+        z += (((w | x) & y) | (w & x)) + blk(i) + 0x8F1BBCDC + rol(v, 5); \
+        w = rol(w, 30);
+#define R4(v,w,x,y,z,i) \
+        z += (w ^ x ^ y) + blk(i) + 0xCA62C1D6 + rol(v, 5); \
+        w=rol(w, 30);
+
+/* Hash a single 512-bit block. This is the core of the algorithm. */
+static void    mvSHA1Transform(MV_U32 state[5], const MV_U8 *buffer)
+{
+    MV_U32          a, b, c, d, e;
+    CHAR64LONG16*   block;
+
+#ifdef SHA1HANDSOFF
+    static MV_U32  workspace[16];
+
+    block = (CHAR64LONG16 *) workspace;
+    memcpy(block, buffer, 64);
+#else
+    block = (CHAR64LONG16 *) buffer;
+#endif
+    /* Copy context->state[] to working vars */
+    a = state[0];
+    b = state[1];
+    c = state[2];
+    d = state[3];
+    e = state[4];
+    /* 4 rounds of 20 operations each. Loop unrolled. */
+    R0(a,b,c,d,e, 0); R0(e,a,b,c,d, 1); R0(d,e,a,b,c, 2); R0(c,d,e,a,b, 3);
+    R0(b,c,d,e,a, 4); R0(a,b,c,d,e, 5); R0(e,a,b,c,d, 6); R0(d,e,a,b,c, 7);
+    R0(c,d,e,a,b, 8); R0(b,c,d,e,a, 9); R0(a,b,c,d,e,10); R0(e,a,b,c,d,11);
+    R0(d,e,a,b,c,12); R0(c,d,e,a,b,13); R0(b,c,d,e,a,14); R0(a,b,c,d,e,15);
+    R1(e,a,b,c,d,16); R1(d,e,a,b,c,17); R1(c,d,e,a,b,18); R1(b,c,d,e,a,19);
+    R2(a,b,c,d,e,20); R2(e,a,b,c,d,21); R2(d,e,a,b,c,22); R2(c,d,e,a,b,23);
+    R2(b,c,d,e,a,24); R2(a,b,c,d,e,25); R2(e,a,b,c,d,26); R2(d,e,a,b,c,27);
+    R2(c,d,e,a,b,28); R2(b,c,d,e,a,29); R2(a,b,c,d,e,30); R2(e,a,b,c,d,31);
+    R2(d,e,a,b,c,32); R2(c,d,e,a,b,33); R2(b,c,d,e,a,34); R2(a,b,c,d,e,35);
+    R2(e,a,b,c,d,36); R2(d,e,a,b,c,37); R2(c,d,e,a,b,38); R2(b,c,d,e,a,39);
+    R3(a,b,c,d,e,40); R3(e,a,b,c,d,41); R3(d,e,a,b,c,42); R3(c,d,e,a,b,43);
+    R3(b,c,d,e,a,44); R3(a,b,c,d,e,45); R3(e,a,b,c,d,46); R3(d,e,a,b,c,47);
+    R3(c,d,e,a,b,48); R3(b,c,d,e,a,49); R3(a,b,c,d,e,50); R3(e,a,b,c,d,51);
+    R3(d,e,a,b,c,52); R3(c,d,e,a,b,53); R3(b,c,d,e,a,54); R3(a,b,c,d,e,55);
+    R3(e,a,b,c,d,56); R3(d,e,a,b,c,57); R3(c,d,e,a,b,58); R3(b,c,d,e,a,59);
+    R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63);
+    R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4(d,e,a,b,c,67);
+    R4(c,d,e,a,b,68); R4(b,c,d,e,a,69); R4(a,b,c,d,e,70); R4(e,a,b,c,d,71);
+    R4(d,e,a,b,c,72); R4(c,d,e,a,b,73); R4(b,c,d,e,a,74); R4(a,b,c,d,e,75);
+    R4(e,a,b,c,d,76); R4(d,e,a,b,c,77); R4(c,d,e,a,b,78); R4(b,c,d,e,a,79);
+    /* Add the working vars back into context.state[] */
+    state[0] += a;
+    state[1] += b;
+    state[2] += c;
+    state[3] += d;
+    state[4] += e;
+    /* Wipe variables */
+    a = b = c = d = e = 0;
+}
+
+void    mvSHA1Init(MV_SHA1_CTX* context)
+{
+    /* SHA1 initialization constants */
+    context->state[0] = 0x67452301;
+    context->state[1] = 0xEFCDAB89;
+    context->state[2] = 0x98BADCFE;
+    context->state[3] = 0x10325476;
+    context->state[4] = 0xC3D2E1F0;
+    context->count[0] = context->count[1] = 0;
+}
+
+
+/* Run your data through this. */
+void    mvSHA1Update(MV_SHA1_CTX *context, MV_U8 const *data, 
+                     unsigned int len)
+{
+    MV_U32 i, j;
+
+    j = (context->count[0] >> 3) & 63;
+    if ((context->count[0] += len << 3) < (len << 3))
+            context->count[1]++;
+    context->count[1] += (len >> 29);
+    if ((j + len) > 63) 
+    {
+        memcpy(&context->buffer[j], data, (i = 64-j));
+        mvSHA1Transform(context->state, context->buffer);
+        for ( ; i + 63 < len; i += 64) 
+        {
+            mvSHA1Transform(context->state, &data[i]);
+        }
+        j = 0;
+    }
+    else
+    {
+        i = 0;
+    }
+    memcpy(&context->buffer[j], &data[i], len - i);
+}
+
+void    mvSHA1Final(MV_U8* digest, MV_SHA1_CTX* context)
+{
+    MV_U32  i;
+    MV_U8   finalcount[8];
+
+    for (i = 0; i < 8; i++) 
+    {
+        finalcount[i] = (unsigned char)((context->count[(i >= 4 ? 0 : 1)] >>
+                      ((3-(i & 3)) * 8) ) & 255);  /* Endian independent */
+    }
+    mvSHA1Update(context, (const unsigned char *) "\200", 1);
+    while ((context->count[0] & 504) != 448) 
+    {
+        mvSHA1Update(context, (const unsigned char *) "\0", 1);
+    }
+    mvSHA1Update(context, finalcount, 8);  /* Should cause a mvSHA1Transform()
+                                          */
+    for (i = 0; i < 20; i++) 
+    {
+        digest[i] = (unsigned char)
+                    ((context->state[i >> 2] >> ((3 - (i & 3)) * 8)) & 255);
+    }
+    /* Wipe variables */
+    i = 0;
+    memset(context->buffer, 0, 64);
+    memset(context->state, 0, 20);
+    memset(context->count, 0, 8);
+    memset(finalcount, 0, 8);
+
+#ifdef SHA1HANDSOFF  /* make SHA1Transform overwrite it's own static vars */
+    mvSHA1Transform(context->state, context->buffer);
+#endif 
+}
+
+
+void mvSHA1(MV_U8 const *buf, unsigned int len, MV_U8* digest)
+{
+    MV_SHA1_CTX  ctx;
+
+    mvSHA1Init(&ctx);
+    mvSHA1Update(&ctx, buf, len);
+    mvSHA1Final(digest, &ctx);
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/mvCesaRegs.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/mvCesaRegs.h
@@ -0,0 +1,388 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __mvCesaRegs_h__
+#define __mvCesaRegs_h__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "mvSysCesaConfig.h"
+
+typedef struct
+{
+    /* word 0 */
+    MV_U32  config;
+    /* word 1 */    
+    MV_U16  cryptoSrcOffset;
+    MV_U16  cryptoDstOffset;
+    /* word 2 */    
+    MV_U16  cryptoDataLen;
+    MV_U16  reserved1;
+    /* word 3 */
+    MV_U16  cryptoKeyOffset;
+    MV_U16  reserved2;
+    /* word 4 */
+    MV_U16  cryptoIvOffset;
+    MV_U16  cryptoIvBufOffset;
+    /* word 5 */
+    MV_U16  macSrcOffset;
+    MV_U16  macTotalLen;
+    /* word 6 */
+    MV_U16  macDigestOffset;
+    MV_U16  macDataLen;
+    /* word 7 */
+    MV_U16  macInnerIvOffset;
+    MV_U16  macOuterIvOffset;
+
+} MV_CESA_DESC;
+
+/* operation */
+typedef enum 
+{
+    MV_CESA_MAC_ONLY         = 0,
+    MV_CESA_CRYPTO_ONLY      = 1,
+    MV_CESA_MAC_THEN_CRYPTO  = 2,
+    MV_CESA_CRYPTO_THEN_MAC  = 3,
+    
+    MV_CESA_MAX_OPERATION
+
+} MV_CESA_OPERATION;
+
+#define MV_CESA_OPERATION_OFFSET        0
+#define MV_CESA_OPERATION_MASK          (0x3 << MV_CESA_OPERATION_OFFSET)
+
+/* mac algorithm */
+typedef enum 
+{   
+    MV_CESA_MAC_NULL        = 0,
+    MV_CESA_MAC_MD5         = 4,
+    MV_CESA_MAC_SHA1        = 5,
+    MV_CESA_MAC_HMAC_MD5    = 6,
+    MV_CESA_MAC_HMAC_SHA1   = 7,
+
+} MV_CESA_MAC_MODE;
+
+#define MV_CESA_MAC_MODE_OFFSET         4
+#define MV_CESA_MAC_MODE_MASK           (0x7 << MV_CESA_MAC_MODE_OFFSET)
+
+typedef enum
+{
+    MV_CESA_MAC_DIGEST_FULL = 0,
+    MV_CESA_MAC_DIGEST_96B  = 1,
+
+} MV_CESA_MAC_DIGEST_SIZE;
+
+#define MV_CESA_MAC_DIGEST_SIZE_BIT     7
+#define MV_CESA_MAC_DIGEST_SIZE_MASK    (1 << MV_CESA_MAC_DIGEST_SIZE_BIT)
+
+
+typedef enum 
+{
+    MV_CESA_CRYPTO_NULL = 0,
+    MV_CESA_CRYPTO_DES  = 1,
+    MV_CESA_CRYPTO_3DES = 2,
+    MV_CESA_CRYPTO_AES  = 3,
+
+} MV_CESA_CRYPTO_ALG;
+
+#define MV_CESA_CRYPTO_ALG_OFFSET       8
+#define MV_CESA_CRYPTO_ALG_MASK         (0x3 << MV_CESA_CRYPTO_ALG_OFFSET)
+
+
+/* direction */
+typedef enum 
+{
+    MV_CESA_DIR_ENCODE = 0,
+    MV_CESA_DIR_DECODE = 1,
+
+} MV_CESA_DIRECTION;
+
+#define MV_CESA_DIRECTION_BIT           12
+#define MV_CESA_DIRECTION_MASK          (1 << MV_CESA_DIRECTION_BIT)
+
+/* crypto IV mode */
+typedef enum 
+{
+    MV_CESA_CRYPTO_ECB = 0,
+    MV_CESA_CRYPTO_CBC = 1,
+
+    /* NO HW Support */
+    MV_CESA_CRYPTO_CTR = 10,
+
+} MV_CESA_CRYPTO_MODE;
+
+#define MV_CESA_CRYPTO_MODE_BIT         16
+#define MV_CESA_CRYPTO_MODE_MASK        (1 << MV_CESA_CRYPTO_MODE_BIT)         
+
+/* 3DES mode */
+typedef enum 
+{
+    MV_CESA_CRYPTO_3DES_EEE = 0,
+    MV_CESA_CRYPTO_3DES_EDE = 1,
+
+} MV_CESA_CRYPTO_3DES_MODE;
+
+#define MV_CESA_CRYPTO_3DES_MODE_BIT    20
+#define MV_CESA_CRYPTO_3DES_MODE_MASK   (1 << MV_CESA_CRYPTO_3DES_MODE_BIT)
+
+
+/* AES Key Length */
+typedef enum 
+{
+    MV_CESA_CRYPTO_AES_KEY_128 = 0,
+    MV_CESA_CRYPTO_AES_KEY_192 = 1,
+    MV_CESA_CRYPTO_AES_KEY_256 = 2,
+
+} MV_CESA_CRYPTO_AES_KEY_LEN;
+
+#define MV_CESA_CRYPTO_AES_KEY_LEN_OFFSET   24
+#define MV_CESA_CRYPTO_AES_KEY_LEN_MASK     (0x3 << MV_CESA_CRYPTO_AES_KEY_LEN_OFFSET)
+
+/* Fragmentation mode */
+typedef enum 
+{
+    MV_CESA_FRAG_NONE   = 0,
+    MV_CESA_FRAG_FIRST  = 1,
+    MV_CESA_FRAG_LAST   = 2,
+    MV_CESA_FRAG_MIDDLE = 3,
+
+} MV_CESA_FRAG_MODE;
+
+#define MV_CESA_FRAG_MODE_OFFSET            30
+#define MV_CESA_FRAG_MODE_MASK              (0x3 << MV_CESA_FRAG_MODE_OFFSET)
+/*---------------------------------------------------------------------------*/
+
+/********** Security Accelerator Command Register **************/
+#define MV_CESA_CMD_REG                     (MV_CESA_REGS_BASE + 0xE00)
+
+#define MV_CESA_CMD_CHAN_ENABLE_BIT         0  
+#define MV_CESA_CMD_CHAN_ENABLE_MASK        (1 << MV_CESA_CMD_CHAN_ENABLE_BIT)
+
+#define MV_CESA_CMD_CHAN_DISABLE_BIT        2  
+#define MV_CESA_CMD_CHAN_DISABLE_MASK       (1 << MV_CESA_CMD_CHAN_DISABLE_BIT)  
+
+/********** Security Accelerator Descriptor Pointers Register **********/
+#define MV_CESA_CHAN_DESC_OFFSET_REG        (MV_CESA_REGS_BASE + 0xE04)
+
+/********** Security Accelerator Configuration Register **********/
+#define MV_CESA_CFG_REG                     (MV_CESA_REGS_BASE + 0xE08)
+
+#define MV_CESA_CFG_STOP_DIGEST_ERR_BIT     0
+#define MV_CESA_CFG_STOP_DIGEST_ERR_MASK    (1 << MV_CESA_CFG_STOP_DIGEST_ERR_BIT)
+
+#define MV_CESA_CFG_WAIT_DMA_BIT            7
+#define MV_CESA_CFG_WAIT_DMA_MASK           (1 << MV_CESA_CFG_WAIT_DMA_BIT)
+          
+#define MV_CESA_CFG_ACT_DMA_BIT             9
+#define MV_CESA_CFG_ACT_DMA_MASK            (1 << MV_CESA_CFG_ACT_DMA_BIT)
+
+#define MV_CESA_CFG_CHAIN_MODE_BIT          11
+#define MV_CESA_CFG_CHAIN_MODE_MASK         (1 << MV_CESA_CFG_CHAIN_MODE_BIT)
+
+/********** Security Accelerator Status Register ***********/
+#define MV_CESA_STATUS_REG                  (MV_CESA_REGS_BASE + 0xE0C)
+
+#define MV_CESA_STATUS_ACTIVE_BIT           0
+#define MV_CESA_STATUS_ACTIVE_MASK          (1 << MV_CESA_STATUS_ACTIVE_BIT)
+
+#define MV_CESA_STATUS_DIGEST_ERR_BIT       8
+#define MV_CESA_STATUS_DIGEST_ERR_MASK      (1 << MV_CESA_STATUS_DIGEST_ERR_BIT)
+
+
+/* Cryptographic Engines and Security Accelerator Interrupt Cause Register */
+#define MV_CESA_ISR_CAUSE_REG               (MV_CESA_REGS_BASE + 0xE20)
+
+/* Cryptographic Engines and Security Accelerator Interrupt Mask Register */
+#define MV_CESA_ISR_MASK_REG                (MV_CESA_REGS_BASE + 0xE24)
+
+#define MV_CESA_CAUSE_AUTH_MASK             (1 << 0)
+#define MV_CESA_CAUSE_DES_MASK              (1 << 1)
+#define MV_CESA_CAUSE_AES_ENCR_MASK         (1 << 2)
+#define MV_CESA_CAUSE_AES_DECR_MASK         (1 << 3)
+#define MV_CESA_CAUSE_DES_ALL_MASK          (1 << 4)
+
+#define MV_CESA_CAUSE_ACC_BIT               5
+#define MV_CESA_CAUSE_ACC_MASK              (1 << MV_CESA_CAUSE_ACC_BIT)
+
+#define MV_CESA_CAUSE_ACC_DMA_BIT           7
+#define MV_CESA_CAUSE_ACC_DMA_MASK          (1 << MV_CESA_CAUSE_ACC_DMA_BIT)
+#define MV_CESA_CAUSE_ACC_DMA_ALL_MASK      (3 << MV_CESA_CAUSE_ACC_DMA_BIT)
+
+#define MV_CESA_CAUSE_DMA_COMPL_BIT         9
+#define MV_CESA_CAUSE_DMA_COMPL_MASK        (1 << MV_CESA_CAUSE_DMA_COMPL_BIT)
+
+#define MV_CESA_CAUSE_DMA_OWN_ERR_BIT       10
+#define MV_CESA_CAUSE_DMA_OWN_ERR_MASK      (1 < MV_CESA_CAUSE_DMA_OWN_ERR_BIT)
+
+#define MV_CESA_CAUSE_DMA_CHAIN_PKT_BIT     11
+#define MV_CESA_CAUSE_DMA_CHAIN_PKT_MASK    (1 < MV_CESA_CAUSE_DMA_CHAIN_PKT_BIT)
+
+
+#define MV_CESA_AUTH_DATA_IN_REG            (MV_CESA_REGS_BASE + 0xd38)
+#define MV_CESA_AUTH_BIT_COUNT_LOW_REG      (MV_CESA_REGS_BASE + 0xd20)
+#define MV_CESA_AUTH_BIT_COUNT_HIGH_REG     (MV_CESA_REGS_BASE + 0xd24)
+
+#define MV_CESA_AUTH_INIT_VAL_DIGEST_REG(i) (MV_CESA_REGS_BASE + 0xd00 + (i<<2))
+
+#define MV_CESA_AUTH_INIT_VAL_DIGEST_A_REG  (MV_CESA_REGS_BASE + 0xd00)
+#define MV_CESA_AUTH_INIT_VAL_DIGEST_B_REG  (MV_CESA_REGS_BASE + 0xd04)
+#define MV_CESA_AUTH_INIT_VAL_DIGEST_C_REG  (MV_CESA_REGS_BASE + 0xd08)
+#define MV_CESA_AUTH_INIT_VAL_DIGEST_D_REG  (MV_CESA_REGS_BASE + 0xd0c)
+#define MV_CESA_AUTH_INIT_VAL_DIGEST_E_REG  (MV_CESA_REGS_BASE + 0xd10)
+#define MV_CESA_AUTH_COMMAND_REG            (MV_CESA_REGS_BASE + 0xd18)
+
+#define MV_CESA_AUTH_ALGORITHM_BIT          0
+#define MV_CESA_AUTH_ALGORITHM_MD5          (0<<AUTH_ALGORITHM_BIT)
+#define MV_CESA_AUTH_ALGORITHM_SHA1         (1<<AUTH_ALGORITHM_BIT)
+
+#define MV_CESA_AUTH_IV_MODE_BIT            1
+#define MV_CESA_AUTH_IV_MODE_INIT           (0<<AUTH_IV_MODE_BIT)
+#define MV_CESA_AUTH_IV_MODE_CONTINUE       (1<<AUTH_IV_MODE_BIT)
+
+#define MV_CESA_AUTH_DATA_BYTE_SWAP_BIT     2
+#define MV_CESA_AUTH_DATA_BYTE_SWAP_MASK    (1<<AUTH_DATA_BYTE_SWAP_BIT)
+
+
+#define MV_CESA_AUTH_IV_BYTE_SWAP_BIT       4
+#define MV_CESA_AUTH_IV_BYTE_SWAP_MASK      (1<<AUTH_IV_BYTE_SWAP_BIT)
+
+#define MV_CESA_AUTH_TERMINATION_BIT        31
+#define MV_CESA_AUTH_TERMINATION_MASK       (1<<AUTH_TERMINATION_BIT)
+
+
+/*************** TDMA Control Register ************************************************/
+#define MV_CESA_TDMA_CTRL_REG               (MV_CESA_TDMA_REGS_BASE + 0x840)
+
+#define MV_CESA_TDMA_BURST_32B              3   
+#define MV_CESA_TDMA_BURST_128B             4   
+
+#define MV_CESA_TDMA_DST_BURST_OFFSET       0
+#define MV_CESA_TDMA_DST_BURST_ALL_MASK     (0x7<<MV_CESA_TDMA_DST_BURST_OFFSET)
+#define MV_CESA_TDMA_DST_BURST_MASK(burst)  ((burst)<<MV_CESA_TDMA_DST_BURST_OFFSET)
+
+#define MV_CESA_TDMA_OUTSTAND_READ_EN_BIT   4
+#define MV_CESA_TDMA_OUTSTAND_READ_EN_MASK  (1<<MV_CESA_TDMA_OUTSTAND_READ_EN_BIT)
+
+#define MV_CESA_TDMA_SRC_BURST_OFFSET       6
+#define MV_CESA_TDMA_SRC_BURST_ALL_MASK     (0x7<<MV_CESA_TDMA_SRC_BURST_OFFSET)
+#define MV_CESA_TDMA_SRC_BURST_MASK(burst)  ((burst)<<MV_CESA_TDMA_SRC_BURST_OFFSET)
+
+#define MV_CESA_TDMA_CHAIN_MODE_BIT         9
+#define MV_CESA_TDMA_NON_CHAIN_MODE_MASK    (1<<MV_CESA_TDMA_CHAIN_MODE_BIT)
+
+#define MV_CESA_TDMA_BYTE_SWAP_BIT	    11
+#define MV_CESA_TDMA_BYTE_SWAP_MASK	    (0 << MV_CESA_TDMA_BYTE_SWAP_BIT)
+#define MV_CESA_TDMA_NO_BYTE_SWAP_MASK	    (1 << MV_CESA_TDMA_BYTE_SWAP_BIT)		    	
+
+#define MV_CESA_TDMA_ENABLE_BIT		    12
+#define MV_CESA_TDMA_ENABLE_MASK            (1<<MV_CESA_TDMA_ENABLE_BIT)
+			    
+#define MV_CESA_TDMA_FETCH_NEXT_DESC_BIT    13	
+#define MV_CESA_TDMA_FETCH_NEXT_DESC_MASK   (1<<MV_CESA_TDMA_FETCH_NEXT_DESC_BIT)	
+
+#define MV_CESA_TDMA_CHAN_ACTIVE_BIT	    14    
+#define MV_CESA_TDMA_CHAN_ACTIVE_MASK       (1<<MV_CESA_TDMA_CHAN_ACTIVE_BIT)
+/*------------------------------------------------------------------------------------*/
+
+#define MV_CESA_TDMA_BYTE_COUNT_REG         (MV_CESA_TDMA_REGS_BASE + 0x800)
+#define MV_CESA_TDMA_SRC_ADDR_REG           (MV_CESA_TDMA_REGS_BASE + 0x810)
+#define MV_CESA_TDMA_DST_ADDR_REG           (MV_CESA_TDMA_REGS_BASE + 0x820)
+#define MV_CESA_TDMA_NEXT_DESC_PTR_REG      (MV_CESA_TDMA_REGS_BASE + 0x830)
+#define MV_CESA_TDMA_CURR_DESC_PTR_REG      (MV_CESA_TDMA_REGS_BASE + 0x870)
+
+#define MV_CESA_TDMA_ERROR_CAUSE_REG        (MV_CESA_TDMA_REGS_BASE + 0x8C0)
+#define MV_CESA_TDMA_ERROR_MASK_REG         (MV_CESA_TDMA_REGS_BASE + 0x8C4)
+
+/*************** Address Decode Register ********************************************/
+
+#define MV_CESA_TDMA_ADDR_DEC_WIN           4
+
+#define MV_CESA_TDMA_BASE_ADDR_REG(win)     (MV_CESA_TDMA_REGS_BASE + 0xa00 + (win<<3))
+
+#define MV_CESA_TDMA_WIN_CTRL_REG(win)      (MV_CESA_TDMA_REGS_BASE + 0xa04 + (win<<3))
+
+#define MV_CESA_TDMA_WIN_ENABLE_BIT         0
+#define MV_CESA_TDMA_WIN_ENABLE_MASK        (1 << MV_CESA_TDMA_WIN_ENABLE_BIT)
+
+#define MV_CESA_TDMA_WIN_TARGET_OFFSET      4 
+#define MV_CESA_TDMA_WIN_TARGET_MASK        (0xf << MV_CESA_TDMA_WIN_TARGET_OFFSET)
+
+#define MV_CESA_TDMA_WIN_ATTR_OFFSET        8 
+#define MV_CESA_TDMA_WIN_ATTR_MASK          (0xff << MV_CESA_TDMA_WIN_ATTR_OFFSET)
+
+#define MV_CESA_TDMA_WIN_SIZE_OFFSET        16
+#define MV_CESA_TDMA_WIN_SIZE_MASK          (0xFFFF << MV_CESA_TDMA_WIN_SIZE_OFFSET)
+
+#define MV_CESA_TDMA_WIN_BASE_OFFSET        16
+#define MV_CESA_TDMA_WIN_BASE_MASK          (0xFFFF << MV_CESA_TDMA_WIN_BASE_OFFSET)
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* __mvCesaRegs_h__ */ 
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/mvMD5.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/mvMD5.h
@@ -0,0 +1,99 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __mvMD5_h__
+#define __mvMD5_h__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define MV_MD5_MAC_LEN 16
+ 
+ 
+typedef struct 
+{
+    MV_U32 buf[4];
+    MV_U32 bits[2];
+    MV_U8  in[64];
+
+} MV_MD5_CONTEXT;
+ 
+void mvMD5Init(MV_MD5_CONTEXT *context);
+void mvMD5Update(MV_MD5_CONTEXT *context, unsigned char const *buf,
+                unsigned len);
+void mvMD5Final(unsigned char digest[16], MV_MD5_CONTEXT *context);
+
+void mvMD5(unsigned char const *buf, unsigned len, unsigned char* digest);
+
+void mvHmacMd5(unsigned char const* text, int text_len,
+                  unsigned char const* key, int key_len,
+                  unsigned char* digest);
+  
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __mvMD5_h__ */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/mvLru.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/mvLru.c
@@ -0,0 +1,159 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "mvLru.h"
+/* LRU Cache support */
+
+
+/* Init LRU cache database */
+MV_LRU_CACHE*   mvLruCacheInit(int numOfEntries)
+{
+    int             i;
+    MV_LRU_CACHE*   pLruCache;
+
+    pLruCache = mvOsMalloc(sizeof(MV_LRU_CACHE));
+    if(pLruCache == NULL)
+    {
+        return NULL;
+    }
+    memset(pLruCache, 0, sizeof(MV_LRU_CACHE));
+
+    pLruCache->table = mvOsMalloc(numOfEntries*sizeof(MV_LRU_ENTRY));
+    if(pLruCache->table == NULL)
+    {
+        mvOsFree(pLruCache);
+        return NULL;
+    }
+    memset(pLruCache->table, 0, numOfEntries*sizeof(MV_LRU_ENTRY));
+    pLruCache->tableSize = numOfEntries;
+
+    for(i=0; i<numOfEntries; i++)
+    {
+        pLruCache->table[i].next = i+1;
+        pLruCache->table[i].prev = i-1;         
+    }
+    pLruCache->least = 0;
+    pLruCache->most = numOfEntries-1;   
+
+    return pLruCache;
+}
+
+void    mvLruCacheFinish(MV_LRU_CACHE* pLruCache)
+{
+    mvOsFree(pLruCache->table);
+    mvOsFree(pLruCache);
+}
+
+/* Update LRU cache database after using cache Index */
+void    mvLruCacheIdxUpdate(MV_LRU_CACHE* pLruHndl, int cacheIdx)
+{
+    int prev, next;
+
+    if(cacheIdx == pLruHndl->most)
+        return;
+
+    next = pLruHndl->table[cacheIdx].next;
+    if(cacheIdx == pLruHndl->least)
+    {
+        pLruHndl->least = next;
+    }
+    else
+    {
+        prev = pLruHndl->table[cacheIdx].prev;
+
+        pLruHndl->table[next].prev = prev;
+        pLruHndl->table[prev].next = next;
+    }
+
+    pLruHndl->table[pLruHndl->most].next = cacheIdx;
+    pLruHndl->table[cacheIdx].prev = pLruHndl->most;
+    pLruHndl->most = cacheIdx;
+}
+
+/* Delete LRU cache entry */
+void    mvLruCacheIdxDelete(MV_LRU_CACHE* pLruHndl, int cacheIdx)
+{
+    int prev, next;
+
+    if(cacheIdx == pLruHndl->least)
+        return;
+
+    prev = pLruHndl->table[cacheIdx].prev;
+    if(cacheIdx == pLruHndl->most)
+    {
+        pLruHndl->most = prev;
+    }
+    else
+    {
+        next = pLruHndl->table[cacheIdx].next;
+
+        pLruHndl->table[next].prev = prev;
+        pLruHndl->table[prev].next = next;
+    }
+    pLruHndl->table[pLruHndl->least].prev = cacheIdx;
+    pLruHndl->table[cacheIdx].next = pLruHndl->least;
+    pLruHndl->least = cacheIdx;
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/mvCesa.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/mvCesa.c
@@ -0,0 +1,2959 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+        this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvSysCesaConfig.h"
+#include "mvCesaRegs.h"
+
+#ifdef MV_INCLUDE_IDMA
+#include "idma/mvIdma.h"
+#include "idma/mvIdmaRegs.h"
+#endif
+
+#include "mvCesa.h"
+#include "mvMD5.h"
+#include "mvSHA1.h"
+#include "AES/mvAes.h"
+
+
+#undef CESA_DEBUG
+
+
+/********** Global variables **********/
+
+/*  If request size is more than MV_CESA_MAX_BUF_SIZE the
+ *  request is processed as fragmented request.
+ */
+
+MV_CESA_STATS           cesaStats;
+
+MV_BUF_INFO             cesaSramSaBuf;
+short                   cesaLastSid = -1;
+MV_CESA_SA*             pCesaSAD = NULL;
+MV_U16                  cesaMaxSA = 0;
+
+MV_CESA_REQ*            pCesaReqFirst = NULL;
+MV_CESA_REQ*            pCesaReqLast = NULL;
+MV_CESA_REQ*            pCesaReqEmpty = NULL;
+MV_CESA_REQ*            pCesaReqProcess = NULL;
+int                     cesaQueueDepth = 0;
+int                     cesaReqResources = 0;
+
+MV_CESA_SRAM_MAP*       cesaSramVirtPtr = NULL;
+MV_U32                  cesaCryptEngBase = 0;
+void			*cesaOsHandle = NULL;
+
+static MV_CESA_HAL_DATA	cesaHalData;
+
+static INLINE MV_U8*  mvCesaSramAddrGet(void)
+{
+#ifdef MV_CESA_NO_SRAM
+    return (MV_U8*)cesaSramVirtPtr;
+#else
+    return (MV_U8*)cesaCryptEngBase;
+#endif /* MV_CESA_NO_SRAM */
+}
+
+static INLINE MV_ULONG    mvCesaSramVirtToPhys(void* pDev, MV_U8* pSramVirt)
+{
+#ifdef MV_CESA_NO_SRAM
+    return (MV_ULONG)mvOsIoVirtToPhy(NULL, pSramVirt);
+#else
+    return (MV_ULONG)pSramVirt - DOVE_CESA_VIRT_BASE + DOVE_CESA_PHYS_BASE;
+#endif /* MV_CESA_NO_SRAM */
+}
+
+/* Internal Function prototypes */
+
+static INLINE void      mvCesaSramDescrBuild(MV_U32 config, int frag,
+                                 int cryptoOffset, int ivOffset, int cryptoLength,
+                                 int macOffset, int digestOffset, int macLength, int macTotalLen,
+                                 MV_CESA_REQ *pCesaReq, MV_DMA_DESC* pDmaDesc);
+
+static INLINE void      mvCesaSramSaUpdate(short sid, MV_DMA_DESC *pDmaDesc);
+
+static INLINE int       mvCesaDmaCopyPrepare(MV_CESA_MBUF* pMbuf, MV_U8* pSramBuf, 
+                                MV_DMA_DESC* pDmaDesc, MV_BOOL isToMbuf,
+                                int offset, int copySize);
+
+static void        mvCesaHmacIvGet(MV_CESA_MAC_MODE macMode, unsigned char key[], int keyLength,
+                                    unsigned char innerIV[], unsigned char outerIV[]);
+
+static MV_STATUS   mvCesaFragAuthComplete(MV_CESA_REQ* pReq, MV_CESA_SA* pSA,
+                                          int macDataSize);
+
+static MV_CESA_COMMAND*   mvCesaCtrModeInit(void);
+
+static MV_STATUS   mvCesaCtrModePrepare(MV_CESA_COMMAND *pCtrModeCmd, MV_CESA_COMMAND *pCmd);
+static MV_STATUS   mvCesaCtrModeComplete(MV_CESA_COMMAND *pOrgCmd, MV_CESA_COMMAND *pCmd);
+static void        mvCesaCtrModeFinish(MV_CESA_COMMAND *pCmd);
+
+static INLINE MV_STATUS mvCesaReqProcess(MV_CESA_REQ* pReq);
+static MV_STATUS   mvCesaFragReqProcess(MV_CESA_REQ* pReq, MV_U8 frag);
+
+static INLINE MV_STATUS mvCesaParamCheck(MV_CESA_SA* pSA, MV_CESA_COMMAND *pCmd, MV_U8* pFixOffset);
+static INLINE MV_STATUS mvCesaFragParamCheck(MV_CESA_SA* pSA, MV_CESA_COMMAND *pCmd);
+
+static INLINE void      mvCesaFragSizeFind(MV_CESA_SA* pSA, MV_CESA_REQ* pReq, 
+                               int cryptoOffset, int macOffset,
+                               int* pCopySize, int* pCryptoDataSize, int* pMacDataSize);
+
+
+/* Go to the next request in the request queue */
+static INLINE MV_CESA_REQ* MV_CESA_REQ_NEXT_PTR(MV_CESA_REQ* pReq)
+{
+    if(pReq == pCesaReqLast)
+        return pCesaReqFirst;
+
+    return pReq+1;
+}
+
+static INLINE void mvCesaReqProcessStart(MV_CESA_REQ* pReq)
+{
+    int frag;
+
+    pReq->state = MV_CESA_PROCESS;
+    cesaStats.startCount++;
+
+    if(pReq->fragMode == MV_CESA_FRAG_NONE)
+    {
+        frag = 0;
+    }
+    else
+    {
+        frag = pReq->frags.nextFrag;
+        pReq->frags.nextFrag++;
+    }
+#if (MV_CESA_VERSION >= 2)
+    /* Enable TDMA engine */
+    MV_REG_WRITE(MV_CESA_TDMA_CURR_DESC_PTR_REG, 0);
+    MV_REG_WRITE(MV_CESA_TDMA_NEXT_DESC_PTR_REG, 
+            (MV_U32)mvCesaVirtToPhys(&pReq->dmaDescBuf, pReq->dma[frag].pDmaFirst));
+#else
+    /* Enable IDMA engine */
+    MV_REG_WRITE(IDMA_CURR_DESC_PTR_REG(0), 0);
+    MV_REG_WRITE(IDMA_NEXT_DESC_PTR_REG(0), 
+            (MV_U32)mvCesaVirtToPhys(&pReq->dmaDescBuf, pReq->dma[frag].pDmaFirst));
+#endif /* MV_CESA_VERSION >= 2 */
+
+#if defined(MV_BRIDGE_SYNC_REORDER) 
+    mvOsBridgeReorderWA();
+#endif
+
+    /* Start Accelerator */
+    MV_REG_WRITE(MV_CESA_CMD_REG, MV_CESA_CMD_CHAN_ENABLE_MASK);
+}
+
+
+/*******************************************************************************
+* mvCesaHalInit - Initialize the CESA driver
+*
+* DESCRIPTION:
+*       This function initialize the CESA driver.
+*       1) Session database
+*       2) Request queue
+*       4) DMA descriptor lists - one list per request. Each list
+*           has MV_CESA_MAX_DMA_DESC descriptors.
+*
+* INPUT:
+*       numOfSession    - maximum number of supported sessions
+*       queueDepth      - number of elements in the request queue.
+*       pSramBase       - virtual address of Sram
+*	osHandle	- A handle used by the OS to allocate memory for the 
+*			  module (Passed to the OS Services layer)
+*	halData		- CESA HAL system information.
+*
+* RETURN:
+*       MV_OK           - Success
+*       MV_NO_RESOURCE  - Fail, can't allocate resources:
+*                         Session database, request queue,
+*                         DMA descriptors list, LRU cache database.
+*       MV_NOT_ALIGNED  - Sram base address is not 8 byte aligned.
+*
+*******************************************************************************/
+MV_STATUS mvCesaHalInit (int numOfSession, int queueDepth, char* pSramBase, MV_U32 cryptEngBase,
+			 void *osHandle, MV_CESA_HAL_DATA *halData)
+{
+    int     i, req;
+    MV_U32  descOffsetReg, configReg;
+    MV_CESA_SRAM_SA *pSramSA;
+
+
+    mvOsPrintf("mvCesaInit: sessions=%d, queue=%d, pSram=%p\n",
+                numOfSession, queueDepth, pSramBase);
+
+    cesaOsHandle = osHandle;
+    /* Create Session database */
+    pCesaSAD = mvOsMalloc(sizeof(MV_CESA_SA)*numOfSession);
+    if(pCesaSAD == NULL)
+    {
+        mvOsPrintf("mvCesaInit: Can't allocate %u bytes for %d SAs\n",
+                    sizeof(MV_CESA_SA)*numOfSession, numOfSession);
+        mvCesaFinish();
+        return MV_NO_RESOURCE;
+    }
+    memset(pCesaSAD, 0, sizeof(MV_CESA_SA)*numOfSession);
+    cesaMaxSA = numOfSession;
+
+    /* Allocate imag of sramSA in the DRAM */
+    cesaSramSaBuf.bufSize = sizeof(MV_CESA_SRAM_SA)*numOfSession + 
+                                    CPU_D_CACHE_LINE_SIZE;
+
+    cesaSramSaBuf.bufVirtPtr = mvOsIoCachedMalloc(osHandle,cesaSramSaBuf.bufSize,
+						  &cesaSramSaBuf.bufPhysAddr,
+						  &cesaSramSaBuf.memHandle);
+        
+    if(cesaSramSaBuf.bufVirtPtr == NULL)
+    {
+        mvOsPrintf("mvCesaInit: Can't allocate %d bytes for sramSA structures\n", 
+                    cesaSramSaBuf.bufSize);
+        mvCesaFinish();
+        return MV_NO_RESOURCE;
+    }
+    memset(cesaSramSaBuf.bufVirtPtr, 0, cesaSramSaBuf.bufSize); 
+    pSramSA = (MV_CESA_SRAM_SA*)MV_ALIGN_UP((MV_ULONG)cesaSramSaBuf.bufVirtPtr, 
+                                                       CPU_D_CACHE_LINE_SIZE);
+    for(i=0; i<numOfSession; i++)
+    {
+        pCesaSAD[i].pSramSA = &pSramSA[i];
+    }
+
+    /* Create request queue */
+    pCesaReqFirst = mvOsMalloc(sizeof(MV_CESA_REQ)*queueDepth);
+    if(pCesaReqFirst == NULL)
+    {
+        mvOsPrintf("mvCesaInit: Can't allocate %u bytes for %d requests\n",
+                    sizeof(MV_CESA_REQ)*queueDepth, queueDepth);
+        mvCesaFinish();
+        return MV_NO_RESOURCE;
+    }
+    memset(pCesaReqFirst, 0, sizeof(MV_CESA_REQ)*queueDepth);
+    pCesaReqEmpty = pCesaReqFirst;
+    pCesaReqLast = pCesaReqFirst + (queueDepth-1);
+    pCesaReqProcess = pCesaReqEmpty;
+    cesaQueueDepth = queueDepth;
+    cesaReqResources = queueDepth;
+    
+    /* pSramBase must be 8 byte aligned */
+    if( MV_IS_NOT_ALIGN((MV_ULONG)pSramBase, 8) )
+    {
+        mvOsPrintf("mvCesaInit: pSramBase (%p) must be 8 byte aligned\n",
+                pSramBase);
+        mvCesaFinish();
+        return MV_NOT_ALIGNED;
+    }
+    cesaSramVirtPtr = (MV_CESA_SRAM_MAP*)pSramBase;
+    
+    cesaCryptEngBase = cryptEngBase;
+
+    /*memset(cesaSramVirtPtr, 0, sizeof(MV_CESA_SRAM_MAP));*/
+
+    /* Clear registers */
+    MV_REG_WRITE( MV_CESA_CFG_REG, 0);
+    MV_REG_WRITE( MV_CESA_ISR_CAUSE_REG, 0);
+    MV_REG_WRITE( MV_CESA_ISR_MASK_REG, 0);
+
+    /* Initialize DMA descriptor lists for all requests in Request queue */
+    descOffsetReg = configReg = 0;
+    for(req=0; req<queueDepth; req++)
+    {
+        int             frag;
+        MV_CESA_REQ*    pReq;
+        MV_DMA_DESC*    pDmaDesc;
+
+        pReq = &pCesaReqFirst[req];
+
+        pReq->cesaDescBuf.bufSize = sizeof(MV_CESA_DESC)*MV_CESA_MAX_REQ_FRAGS + 
+                                        CPU_D_CACHE_LINE_SIZE;
+
+	pReq->cesaDescBuf.bufVirtPtr = 
+		mvOsIoCachedMalloc(osHandle,pReq->cesaDescBuf.bufSize,
+				   &pReq->cesaDescBuf.bufPhysAddr,
+				   &pReq->cesaDescBuf.memHandle);
+
+        if(pReq->cesaDescBuf.bufVirtPtr == NULL)
+        {
+            mvOsPrintf("mvCesaInit: req=%d, Can't allocate %d bytes for CESA descriptors\n", 
+                        req, pReq->cesaDescBuf.bufSize);
+                mvCesaFinish();
+                return MV_NO_RESOURCE;
+            }
+        memset(pReq->cesaDescBuf.bufVirtPtr, 0, pReq->cesaDescBuf.bufSize); 
+        pReq->pCesaDesc = (MV_CESA_DESC*)MV_ALIGN_UP((MV_ULONG)pReq->cesaDescBuf.bufVirtPtr, 
+                                                                CPU_D_CACHE_LINE_SIZE);
+
+        pReq->dmaDescBuf.bufSize = sizeof(MV_DMA_DESC)*MV_CESA_MAX_DMA_DESC*MV_CESA_MAX_REQ_FRAGS + 
+                                    CPU_D_CACHE_LINE_SIZE;
+
+        pReq->dmaDescBuf.bufVirtPtr = 
+		mvOsIoCachedMalloc(osHandle,pReq->dmaDescBuf.bufSize,
+				   &pReq->dmaDescBuf.bufPhysAddr,
+				   &pReq->dmaDescBuf.memHandle);
+
+        if(pReq->dmaDescBuf.bufVirtPtr == NULL)
+        {
+            mvOsPrintf("mvCesaInit: req=%d, Can't allocate %d bytes for DMA descriptor list\n", 
+                        req, pReq->dmaDescBuf.bufSize);
+            mvCesaFinish();
+            return MV_NO_RESOURCE;
+        }
+        memset(pReq->dmaDescBuf.bufVirtPtr, 0, pReq->dmaDescBuf.bufSize); 
+        pDmaDesc = (MV_DMA_DESC*)MV_ALIGN_UP((MV_ULONG)pReq->dmaDescBuf.bufVirtPtr, 
+                                                       CPU_D_CACHE_LINE_SIZE);
+
+        for(frag=0; frag<MV_CESA_MAX_REQ_FRAGS; frag++)
+        {
+            MV_CESA_DMA*    pDma = &pReq->dma[frag];
+
+            pDma->pDmaFirst = pDmaDesc;
+            pDma->pDmaLast = NULL;
+            
+            for(i=0; i<MV_CESA_MAX_DMA_DESC-1; i++)
+            {
+                /* link all DMA descriptors together */
+                pDma->pDmaFirst[i].phyNextDescPtr = 
+                        MV_32BIT_LE(mvCesaVirtToPhys(&pReq->dmaDescBuf, &pDmaDesc[i+1]));
+            }
+            pDma->pDmaFirst[i].phyNextDescPtr = 0;
+            mvOsCacheFlush(NULL, &pDma->pDmaFirst[0], MV_CESA_MAX_DMA_DESC*sizeof(MV_DMA_DESC));        
+
+            pDmaDesc += MV_CESA_MAX_DMA_DESC;
+        }        
+    }
+    /*mvCesaCryptoIvSet(NULL, MV_CESA_MAX_IV_LENGTH);*/
+    descOffsetReg = (MV_U16)((MV_U8*)&cesaSramVirtPtr->desc - mvCesaSramAddrGet());
+    MV_REG_WRITE(MV_CESA_CHAN_DESC_OFFSET_REG, descOffsetReg);
+
+    configReg |= (MV_CESA_CFG_WAIT_DMA_MASK | MV_CESA_CFG_ACT_DMA_MASK);
+
+#if (MV_CESA_VERSION >= 2)
+    /* Initialize TDMA engine */
+    MV_REG_WRITE(MV_CESA_TDMA_CTRL_REG, MV_CESA_TDMA_CTRL_VALUE);
+    MV_REG_WRITE(MV_CESA_TDMA_BYTE_COUNT_REG, 0);
+    MV_REG_WRITE(MV_CESA_TDMA_CURR_DESC_PTR_REG, 0);
+#else
+    /* Initialize IDMA #0 engine */
+    MV_REG_WRITE(IDMA_CTRL_LOW_REG(0), 0);
+    MV_REG_WRITE(IDMA_BYTE_COUNT_REG(0), 0);
+    MV_REG_WRITE(IDMA_CURR_DESC_PTR_REG(0), 0);
+    MV_REG_WRITE(IDMA_CTRL_HIGH_REG(0), ICCHR_ENDIAN_LITTLE
+#ifdef MV_CPU_LE
+      		| ICCHR_DESC_BYTE_SWAP_EN
+#endif
+		 );
+    /* Clear Cause Byte of IDMA channel to be used */
+    MV_REG_WRITE( IDMA_CAUSE_REG, ~ICICR_CAUSE_MASK_ALL(0));
+    MV_REG_WRITE(IDMA_CTRL_LOW_REG(0), MV_CESA_IDMA_CTRL_LOW_VALUE);
+#endif /* (MV_CESA_VERSION >= 2) */
+
+    /* Set CESA configuration registers */
+    MV_REG_WRITE( MV_CESA_CFG_REG, configReg);
+    mvCesaDebugStatsClear();
+
+    mvOsMemcpy(&cesaHalData, halData, sizeof(MV_CESA_HAL_DATA));
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvCesaFinish - Shutdown the CESA driver
+*
+* DESCRIPTION:
+*       This function shutdown the CESA driver and free all allocted resources.
+*
+* INPUT:    None
+*
+* RETURN:
+*       MV_OK   - Success
+*       Other   - Fail
+*
+*******************************************************************************/
+MV_STATUS   mvCesaFinish (void)
+{
+    int             req;
+    MV_CESA_REQ*    pReq;
+
+    mvOsPrintf("mvCesaFinish: \n");
+
+    cesaSramVirtPtr = NULL;
+
+    /* Free all resources: DMA list, etc. */
+    for(req=0; req<cesaQueueDepth; req++)
+    {
+    	pReq = &pCesaReqFirst[req];
+        if(pReq->dmaDescBuf.bufVirtPtr != NULL)
+        {
+        	mvOsIoCachedFree(cesaOsHandle,pReq->dmaDescBuf.bufSize,
+				 pReq->dmaDescBuf.bufPhysAddr,
+				 pReq->dmaDescBuf.bufVirtPtr,
+				 pReq->dmaDescBuf.memHandle);
+        }
+        if(pReq->cesaDescBuf.bufVirtPtr != NULL)
+        {
+                mvOsIoCachedFree(cesaOsHandle,pReq->cesaDescBuf.bufSize,
+				 pReq->cesaDescBuf.bufPhysAddr,
+				 pReq->cesaDescBuf.bufVirtPtr,
+				 pReq->cesaDescBuf.memHandle);
+        }
+    }
+#if (MV_CESA_VERSION < 2)
+    MV_REG_WRITE(IDMA_CTRL_LOW_REG(0), 0);
+#endif /* (MV_CESA_VERSION < 2) */
+
+    /* Free request queue */
+    if(pCesaReqFirst != NULL)
+    {
+        mvOsFree(pCesaReqFirst);
+        pCesaReqFirst = pCesaReqLast = NULL;
+        pCesaReqEmpty = pCesaReqProcess = NULL;
+        cesaQueueDepth = cesaReqResources = 0;
+    }
+    /* Free SA database */
+    if(pCesaSAD != NULL)
+    {
+        mvOsFree(pCesaSAD);
+        pCesaSAD = NULL;
+        cesaMaxSA = 0;
+    }
+    MV_REG_WRITE( MV_CESA_CFG_REG, 0);
+    MV_REG_WRITE( MV_CESA_ISR_CAUSE_REG, 0);
+    MV_REG_WRITE( MV_CESA_ISR_MASK_REG, 0);
+
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvCesaCryptoIvSet - Set IV value for Crypto algorithm working in CBC mode
+*
+* DESCRIPTION:
+*    This function set IV value using by Crypto algorithms in CBC mode.
+*   Each channel has its own IV value.
+*   This function gets IV value from the caller. If no IV value passed from
+*   the caller or only part of IV passed, the function will init the rest part
+*   of IV value (or the whole IV) by random value.
+*
+* INPUT:
+*       MV_U8*  pIV     - Pointer to IV value supplied by user. If pIV==NULL
+*                       the function will generate random IV value.
+*       int     ivSize  - size (in bytes) of IV provided by user. If ivSize is
+*                       smaller than maximum IV size, the function will complete
+*                       IV by random value.
+*
+* RETURN:
+*       MV_OK   - Success
+*       Other   - Fail
+*
+*******************************************************************************/
+MV_STATUS   mvCesaCryptoIvSet(MV_U8* pIV, int ivSize)
+{
+    MV_U8*  pSramIV;
+#if defined(MV646xx)
+    mvOsPrintf("mvCesaCryptoIvSet: ERR. shouldn't use this call on MV64660\n");
+#endif
+    pSramIV = cesaSramVirtPtr->cryptoIV;
+    if(ivSize > MV_CESA_MAX_IV_LENGTH)
+    {
+        mvOsPrintf("mvCesaCryptoIvSet: ivSize (%d) is too large\n", ivSize);
+        ivSize = MV_CESA_MAX_IV_LENGTH;
+    }
+    if(pIV != NULL)
+    {
+        memcpy(pSramIV, pIV, ivSize);
+        ivSize = MV_CESA_MAX_IV_LENGTH - ivSize;
+        pSramIV += ivSize;
+    }
+
+    while(ivSize > 0)
+    {
+        int size, mv_random = mvOsRand();
+
+        size = MV_MIN(ivSize, sizeof(mv_random));
+        memcpy(pSramIV, (void*)&mv_random, size);
+
+        pSramIV += size;
+        ivSize -= size;
+    }
+/*
+    mvOsCacheFlush(NULL, cesaSramVirtPtr->cryptoIV,
+                                MV_CESA_MAX_IV_LENGTH);
+    mvOsCacheInvalidate(NULL, cesaSramVirtPtr->cryptoIV,
+                              MV_CESA_MAX_IV_LENGTH);
+*/
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvCesaSessionOpen - Open new uni-directional crypto session
+*
+* DESCRIPTION:
+*       This function open new session.
+*
+* INPUT:
+*       MV_CESA_OPEN_SESSION *pSession - pointer to new session input parameters
+*
+* OUTPUT:
+*       short           *pSid  - session ID, should be used for all future
+*                                   requests over this session.
+*
+* RETURN:
+*       MV_OK           - Session opend successfully.
+*       MV_FULL         - All sessions are in use, no free place in
+*                       SA database.
+*       MV_BAD_PARAM    - One of session input parameters is invalid.
+*
+*******************************************************************************/
+MV_STATUS   mvCesaSessionOpen(MV_CESA_OPEN_SESSION *pSession, short* pSid)
+{
+    short       sid;
+    MV_U32      config = 0;
+    int         digestSize;
+
+    cesaStats.openedCount++;
+    
+    /* Find free entry in SAD */
+    for(sid=0; sid<cesaMaxSA; sid++)
+    {
+        if(pCesaSAD[sid].valid == 0)
+        {
+            break;
+        }
+    }
+    if(sid == cesaMaxSA)
+    {
+        mvOsPrintf("mvCesaSessionOpen: SA Database is FULL\n");
+        return MV_FULL;
+    }
+
+    /* Check Input parameters for Open session */
+    if (pSession->operation >= MV_CESA_MAX_OPERATION)
+    {
+        mvOsPrintf("mvCesaSessionOpen: Unexpected operation %d\n",
+                    pSession->operation);
+        return MV_BAD_PARAM;
+    }
+    config |= (pSession->operation << MV_CESA_OPERATION_OFFSET);
+
+    if( (pSession->direction != MV_CESA_DIR_ENCODE) &&
+        (pSession->direction != MV_CESA_DIR_DECODE) )
+    {
+        mvOsPrintf("mvCesaSessionOpen: Unexpected direction %d\n",
+                    pSession->direction);
+        return MV_BAD_PARAM;
+    }
+    config |= (pSession->direction << MV_CESA_DIRECTION_BIT);
+    /* Clear SA entry */
+    /* memset(&pCesaSAD[sid], 0, sizeof(pCesaSAD[sid])); */
+
+    /* Check AUTH parameters and update SA entry */
+    if(pSession->operation != MV_CESA_CRYPTO_ONLY)
+    {
+        /* For HMAC (MD5 and SHA1) - Maximum Key size is 64 bytes */
+        if( (pSession->macMode == MV_CESA_MAC_HMAC_MD5) ||
+            (pSession->macMode == MV_CESA_MAC_HMAC_SHA1) )
+        {
+            if(pSession->macKeyLength > MV_CESA_MAX_MAC_KEY_LENGTH)
+            {
+                mvOsPrintf("mvCesaSessionOpen: macKeyLength %d is too large\n",
+                            pSession->macKeyLength);
+                return MV_BAD_PARAM;
+            }
+            mvCesaHmacIvGet(pSession->macMode, pSession->macKey, pSession->macKeyLength,
+                            pCesaSAD[sid].pSramSA->macInnerIV, 
+                            pCesaSAD[sid].pSramSA->macOuterIV);
+            pCesaSAD[sid].macKeyLength = pSession->macKeyLength;
+        }
+        switch(pSession->macMode)
+        {
+            case MV_CESA_MAC_MD5:
+            case MV_CESA_MAC_HMAC_MD5:
+                digestSize = MV_CESA_MD5_DIGEST_SIZE;
+                break;
+
+            case MV_CESA_MAC_SHA1:
+            case MV_CESA_MAC_HMAC_SHA1:
+                digestSize = MV_CESA_SHA1_DIGEST_SIZE;
+                break;
+
+            default:
+                mvOsPrintf("mvCesaSessionOpen: Unexpected macMode %d\n",
+                            pSession->macMode);
+                return MV_BAD_PARAM;
+        }
+        config |= (pSession->macMode << MV_CESA_MAC_MODE_OFFSET);
+
+        /* Supported digest sizes: MD5 - 16 bytes (128 bits), */
+        /* SHA1 - 20 bytes (160 bits) or 12 bytes (96 bits) for both */
+        if( (pSession->digestSize != digestSize) && (pSession->digestSize != 12))
+        {
+            mvOsPrintf("mvCesaSessionOpen: Unexpected digest size %d\n",
+                        pSession->digestSize);
+            mvOsPrintf("\t Valid values [bytes]: MD5-16, SHA1-20, Both-12\n");
+            return MV_BAD_PARAM;
+        }
+        pCesaSAD[sid].digestSize = pSession->digestSize;
+
+        if(pCesaSAD[sid].digestSize == 12)
+        {
+            /* Set MV_CESA_MAC_DIGEST_SIZE_BIT if digest size is 96 bits */
+            config |= (MV_CESA_MAC_DIGEST_96B << MV_CESA_MAC_DIGEST_SIZE_BIT);
+        }
+    }
+
+    /* Check CRYPTO parameters and update SA entry */
+    if(pSession->operation != MV_CESA_MAC_ONLY)
+    {
+        switch(pSession->cryptoAlgorithm)
+        {
+            case MV_CESA_CRYPTO_DES:
+                pCesaSAD[sid].cryptoKeyLength = MV_CESA_DES_KEY_LENGTH;
+                pCesaSAD[sid].cryptoBlockSize = MV_CESA_DES_BLOCK_SIZE;
+                break;
+
+            case MV_CESA_CRYPTO_3DES:
+                pCesaSAD[sid].cryptoKeyLength = MV_CESA_3DES_KEY_LENGTH;
+                pCesaSAD[sid].cryptoBlockSize = MV_CESA_DES_BLOCK_SIZE;
+                /* Only EDE mode is supported */
+                config |= (MV_CESA_CRYPTO_3DES_EDE <<
+                            MV_CESA_CRYPTO_3DES_MODE_BIT);
+                break;
+
+            case MV_CESA_CRYPTO_AES:
+                switch(pSession->cryptoKeyLength)
+                {
+                    case 16:
+                        pCesaSAD[sid].cryptoKeyLength = MV_CESA_AES_128_KEY_LENGTH;
+                        config |= (MV_CESA_CRYPTO_AES_KEY_128 <<
+                                       MV_CESA_CRYPTO_AES_KEY_LEN_OFFSET);
+                        break;
+
+                    case 24:
+                        pCesaSAD[sid].cryptoKeyLength = MV_CESA_AES_192_KEY_LENGTH;
+                        config |= (MV_CESA_CRYPTO_AES_KEY_192 <<
+                                       MV_CESA_CRYPTO_AES_KEY_LEN_OFFSET);
+                        break;
+
+                    case 32:
+                    default:
+                        pCesaSAD[sid].cryptoKeyLength = MV_CESA_AES_256_KEY_LENGTH;
+                        config |= (MV_CESA_CRYPTO_AES_KEY_256 <<
+                                       MV_CESA_CRYPTO_AES_KEY_LEN_OFFSET);
+                        break;
+                }
+                pCesaSAD[sid].cryptoBlockSize = MV_CESA_AES_BLOCK_SIZE;
+                break;
+
+            default:
+                mvOsPrintf("mvCesaSessionOpen: Unexpected cryptoAlgorithm %d\n",
+                            pSession->cryptoAlgorithm);
+                return MV_BAD_PARAM;
+        }
+        config |= (pSession->cryptoAlgorithm << MV_CESA_CRYPTO_ALG_OFFSET);
+
+        if(pSession->cryptoKeyLength != pCesaSAD[sid].cryptoKeyLength)
+        {
+            mvOsPrintf("cesaSessionOpen: Wrong CryptoKeySize %d != %d\n",
+                        pSession->cryptoKeyLength, pCesaSAD[sid].cryptoKeyLength);
+            return MV_BAD_PARAM;
+        }
+        
+        /* Copy Crypto key */
+        if( (pSession->cryptoAlgorithm == MV_CESA_CRYPTO_AES) &&
+            (pSession->direction == MV_CESA_DIR_DECODE))
+        {
+            /* Crypto Key for AES decode is computed from original key material */
+            /* and depend on cryptoKeyLength (128/192/256 bits) */
+            aesMakeKey(pCesaSAD[sid].pSramSA->cryptoKey, pSession->cryptoKey, 
+                        pSession->cryptoKeyLength*8, MV_CESA_AES_BLOCK_SIZE*8);
+        }
+        else
+        {
+                /*panic("mvCesaSessionOpen2");*/
+                memcpy(pCesaSAD[sid].pSramSA->cryptoKey, pSession->cryptoKey, 
+                    pCesaSAD[sid].cryptoKeyLength);
+            
+        }
+        
+        switch(pSession->cryptoMode)
+        {
+            case MV_CESA_CRYPTO_ECB:
+                pCesaSAD[sid].cryptoIvSize = 0;
+                break;
+
+            case MV_CESA_CRYPTO_CBC:
+                pCesaSAD[sid].cryptoIvSize = pCesaSAD[sid].cryptoBlockSize;
+                break;
+
+            case MV_CESA_CRYPTO_CTR:
+                /* Supported only for AES algorithm */
+                if(pSession->cryptoAlgorithm != MV_CESA_CRYPTO_AES)
+                {
+                    mvOsPrintf("mvCesaSessionOpen: CRYPTO CTR mode supported for AES only\n");
+                    return MV_BAD_PARAM;
+                }
+                pCesaSAD[sid].cryptoIvSize = 0;
+                pCesaSAD[sid].ctrMode = 1;
+                /* Replace to ECB mode for HW */
+                pSession->cryptoMode = MV_CESA_CRYPTO_ECB;
+                break;
+
+            default:
+                mvOsPrintf("mvCesaSessionOpen: Unexpected cryptoMode %d\n",
+                            pSession->cryptoMode);
+                return MV_BAD_PARAM;
+        }
+        
+        config |= (pSession->cryptoMode << MV_CESA_CRYPTO_MODE_BIT);
+    }
+    pCesaSAD[sid].config = config;
+    
+    mvOsCacheFlush(NULL, pCesaSAD[sid].pSramSA, sizeof(MV_CESA_SRAM_SA));
+    if(pSid != NULL)
+        *pSid = sid;
+
+    pCesaSAD[sid].valid = 1;
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvCesaSessionClose - Close active crypto session
+*
+* DESCRIPTION:
+*       This function closes existing session
+*
+* INPUT:
+*       short sid   - Unique identifier of the session to be closed
+*
+* RETURN:
+*       MV_OK        - Session closed successfully.
+*       MV_BAD_PARAM - Session identifier is out of valid range.
+*       MV_NOT_FOUND - There is no active session with such ID.
+*
+*******************************************************************************/
+MV_STATUS mvCesaSessionClose(short sid)
+{
+    cesaStats.closedCount++;
+
+    if(sid >= cesaMaxSA)
+    {
+        mvOsPrintf("CESA Error: sid (%d) is too big\n", sid);
+        return MV_BAD_PARAM;
+    }
+    if(pCesaSAD[sid].valid == 0)
+    {
+        mvOsPrintf("CESA Warning: Session (sid=%d) is invalid\n", sid);
+        return MV_NOT_FOUND;
+    }
+    if(cesaLastSid == sid)
+        cesaLastSid = -1;
+
+    pCesaSAD[sid].valid = 0;
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvCesaAction - Perform crypto operation
+*
+* DESCRIPTION:
+*       This function set new CESA request FIFO queue for further HW processing.
+*       The function checks request parameters before set new request to the queue.
+*       If one of the CESA channels is ready for processing the request will be
+*       passed to HW. When request processing is finished the CESA interrupt will
+*       be generated by HW. The caller should call mvCesaReadyGet() function to
+*       complete request processing and get result.
+*
+* INPUT:
+*       MV_CESA_COMMAND *pCmd   - pointer to new CESA request.
+*                               It includes pointers to Source and Destination
+*                               buffers, session identifier get from
+*                               mvCesaSessionOpen() function, pointer to caller
+*                               private data and all needed crypto parameters.
+*
+* RETURN:
+*       MV_OK             - request successfully added to request queue
+*                         and will be processed.
+*       MV_NO_MORE        - request successfully added to request queue and will
+*                         be processed, but request queue became Full and next
+*                         request will not be accepted.
+*       MV_NO_RESOURCE    - request queue is FULL and the request can not
+*                         be processed.
+*       MV_OUT_OF_CPU_MEM - memory allocation needed for request processing is
+*                         failed. Request can not be processed.
+*       MV_NOT_ALLOWED    - This mixed request (CRYPTO+MAC) can not be processed
+*                         as one request and should be splitted for two requests:
+*                         CRYPTO_ONLY and MAC_ONLY.
+*       MV_BAD_PARAM      - One of the request parameters is out of valid range.
+*                         The request can not be processed.
+*
+*******************************************************************************/
+MV_STATUS   mvCesaAction (MV_CESA_COMMAND *pCmd)
+{
+    MV_STATUS       status;
+    MV_CESA_REQ*    pReq = pCesaReqEmpty;
+    int             sid = pCmd->sessionId;
+    MV_CESA_SA*     pSA = &pCesaSAD[sid];
+
+    cesaStats.reqCount++;
+
+    /* Check that the request queue is not FULL */
+    if(cesaReqResources == 0)
+        return MV_NO_RESOURCE;
+
+    if( (sid >= cesaMaxSA) || (!pSA->valid) )
+    {
+        mvOsPrintf("CESA Action Error: Session sid=%d is INVALID\n", sid);
+        return MV_BAD_PARAM;
+    }
+    pSA->count++;
+
+    if(pSA->ctrMode)
+    {
+        /* AES in CTR mode can't be mixed with Authentication */
+        if( (pSA->config & MV_CESA_OPERATION_MASK) !=
+            (MV_CESA_CRYPTO_ONLY << MV_CESA_OPERATION_OFFSET) )
+        {
+            mvOsPrintf("mvCesaAction : CRYPTO CTR mode can't be mixed with AUTH\n");
+            return MV_NOT_ALLOWED;
+        }
+        /* All other request parameters should not be checked because key stream */
+        /* (not user data) processed by AES HW engine */
+        pReq->pOrgCmd = pCmd;
+        /* Allocate temporary pCmd structure for Key stream */
+        pCmd = mvCesaCtrModeInit();
+        if(pCmd == NULL)
+            return MV_OUT_OF_CPU_MEM;
+
+        /* Prepare Key stream */
+        mvCesaCtrModePrepare(pCmd, pReq->pOrgCmd);
+        pReq->fixOffset = 0;
+    }
+    else
+    {
+        /* Check request parameters and calculae fixOffset */
+        status = mvCesaParamCheck(pSA, pCmd, &pReq->fixOffset);
+        if(status != MV_OK)
+        {
+            return status;
+        }
+    }
+    pReq->pCmd = pCmd;
+
+    /* Check if the packet need fragmentation */
+    if(pCmd->pSrc->mbufSize <= sizeof(cesaSramVirtPtr->buf) )
+    {
+        /* request size is smaller than single buffer size */
+        pReq->fragMode = MV_CESA_FRAG_NONE;
+
+        /* Prepare NOT fragmented packets */
+        status = mvCesaReqProcess(pReq);
+        if(status != MV_OK)
+        {
+            mvOsPrintf("CesaReady: ReqProcess error: pReq=%p, status=0x%x\n",
+                        pReq, status);
+        }
+    }
+    else
+    {
+        MV_U8     frag = 0;
+
+        /* request size is larger than buffer size - needs fragmentation */
+
+        /* Check restrictions for processing fragmented packets */
+        status = mvCesaFragParamCheck(pSA, pCmd);
+        if(status != MV_OK)
+            return status;
+
+        pReq->fragMode = MV_CESA_FRAG_FIRST;
+        pReq->frags.nextFrag = 0;
+
+        /* Prepare Process Fragmented packets */
+        while(pReq->fragMode != MV_CESA_FRAG_LAST)
+        {
+            if(frag >= MV_CESA_MAX_REQ_FRAGS)
+            {
+                mvOsPrintf("mvCesaAction Error: Too large request frag=%d\n", frag);
+                return MV_OUT_OF_CPU_MEM;
+            }
+            status = mvCesaFragReqProcess(pReq, frag);
+            if(status == MV_OK)
+                frag++;
+        }
+        pReq->frags.numFrag = frag;
+    }
+
+    pReq->state = MV_CESA_PENDING;
+
+    pCesaReqEmpty = MV_CESA_REQ_NEXT_PTR(pReq);
+    cesaReqResources -= 1;
+
+/* #ifdef CESA_DEBUG */
+    if( (cesaQueueDepth - cesaReqResources) > cesaStats.maxReqCount)
+        cesaStats.maxReqCount = (cesaQueueDepth - cesaReqResources);
+/* #endif CESA_DEBUG */
+
+    cesaLastSid = sid;
+
+    /* Check status of CESA channels and process requests if possible */
+    pReq = pCesaReqProcess;
+    if(pReq->state == MV_CESA_PENDING)
+    {
+        /* Start Process new request */
+        mvCesaReqProcessStart(pReq);
+    }
+    /* If request queue became FULL - return MV_NO_MORE */
+    if(cesaReqResources == 0)
+        return MV_NO_MORE;
+
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvCesaReadyGet - Get crypto request that processing is finished
+*
+* DESCRIPTION:
+*       This function complete request processing and return ready request to
+*       caller. To don't miss interrupts the caller must call this function
+*       while MV_OK or MV_TERMINATE values returned.
+*
+* INPUT:
+*   MV_U32          chanMap  - map of CESA channels finished thier job
+*                              accordingly with CESA Cause register.
+*   MV_CESA_RESULT* pResult  - pointer to structure contains information
+*                            about ready request. It includes pointer to
+*                            user private structure "pReqPrv", session identifier
+*                            for this request "sessionId" and return code.
+*                            Return code set to MV_FAIL if calculated digest value
+*                            on decode direction is different than digest value
+*                            in the packet.
+*
+* RETURN:
+*       MV_OK           - Success, ready request is returned.
+*       MV_NOT_READY    - Next request is not ready yet. New interrupt will
+*                       be generated for futher request processing.
+*       MV_EMPTY        - There is no more request for processing.
+*       MV_BUSY         - Fragmented request is not ready yet.
+*       MV_TERMINATE    - Call this function once more to complete processing
+*                       of fragmented request.
+*
+*******************************************************************************/
+MV_STATUS mvCesaReadyGet(MV_CESA_RESULT* pResult)
+{
+    MV_STATUS       status, readyStatus = MV_NOT_READY;
+    MV_U32          statusReg;
+    MV_CESA_REQ*    pReq;
+    MV_CESA_SA*     pSA;
+
+    /* Check if there are request in process */
+    if(pCesaReqProcess->state != MV_CESA_PROCESS)
+    {
+        return MV_EMPTY;
+    }
+
+#ifdef CESA_DEBUG
+    statusReg = MV_REG_READ(MV_CESA_STATUS_REG);
+    if( statusReg & MV_CESA_STATUS_ACTIVE_MASK )
+    {
+        mvOsPrintf("mvCesaReadyGet: Not Ready, Status = 0x%x\n", statusReg);
+        cesaStats.notReadyCount++;
+        return MV_NOT_READY;
+    }
+#endif /* CESA_DEBUG */
+
+    cesaStats.readyCount++;
+
+    pReq = pCesaReqProcess;
+    pSA = &pCesaSAD[pReq->pCmd->sessionId];
+
+    pResult->retCode = MV_OK;
+    if(pReq->fragMode != MV_CESA_FRAG_NONE)
+    {
+        MV_U8*          pNewDigest;
+        int             frag = (pReq->frags.nextFrag - 1);
+
+        /* Restore DMA descriptor list */
+        pReq->dma[frag].pDmaLast->phyNextDescPtr = 
+                MV_32BIT_LE(mvCesaVirtToPhys(&pReq->dmaDescBuf, &pReq->dma[frag].pDmaLast[1]));
+        pReq->dma[frag].pDmaLast = NULL;
+
+        /* Special processing for finished fragmented request */
+        if(pReq->frags.nextFrag >= pReq->frags.numFrag)
+        {
+            /* Fragmented packet is ready */
+            if( (pSA->config & MV_CESA_OPERATION_MASK) !=
+                (MV_CESA_CRYPTO_ONLY << MV_CESA_OPERATION_OFFSET) )
+            {
+                int  macDataSize = pReq->pCmd->macLength - pReq->frags.macSize;
+
+                if(macDataSize != 0)
+                {
+                    /* Calculate all other blocks by SW */
+                    mvCesaFragAuthComplete(pReq, pSA, macDataSize);
+                }
+
+                /* Copy new digest from SRAM to the Destination buffer */
+                pNewDigest = cesaSramVirtPtr->buf + pReq->frags.newDigestOffset;
+                status = mvCesaCopyToMbuf(pNewDigest, pReq->pCmd->pDst,
+                                   pReq->pCmd->digestOffset, pSA->digestSize);
+
+                /* For decryption: Compare new digest value with original one */
+                if((pSA->config & MV_CESA_DIRECTION_MASK) ==
+                            (MV_CESA_DIR_DECODE << MV_CESA_DIRECTION_BIT))
+                {
+                    if( memcmp(pNewDigest, pReq->frags.orgDigest, pSA->digestSize) != 0)
+                    {
+/*
+                        mvOsPrintf("Digest error: chan=%d, newDigest=%p, orgDigest=%p, status = 0x%x\n",
+                            chan, pNewDigest, pReq->frags.orgDigest, MV_REG_READ(MV_CESA_STATUS_REG));
+*/
+                        /* Signiture verification is failed */
+                        pResult->retCode = MV_FAIL;
+                    }
+                }
+            }
+            readyStatus = MV_OK;
+        }
+    }
+    else
+    {
+        /* Restore DMA descriptor list */
+        pReq->dma[0].pDmaLast->phyNextDescPtr = 
+                MV_32BIT_LE(mvCesaVirtToPhys(&pReq->dmaDescBuf, &pReq->dma[0].pDmaLast[1]));
+        pReq->dma[0].pDmaLast = NULL;
+        if( ((pSA->config & MV_CESA_OPERATION_MASK) !=
+                (MV_CESA_CRYPTO_ONLY << MV_CESA_OPERATION_OFFSET) ) &&
+            ((pSA->config & MV_CESA_DIRECTION_MASK) ==
+                        (MV_CESA_DIR_DECODE << MV_CESA_DIRECTION_BIT)) )
+        {
+            /* For AUTH on decode : Check Digest result in Status register */
+            statusReg = MV_REG_READ(MV_CESA_STATUS_REG);
+            if(statusReg & MV_CESA_STATUS_DIGEST_ERR_MASK)
+            {
+/*
+                mvOsPrintf("Digest error: chan=%d, status = 0x%x\n",
+                        chan, statusReg);
+*/
+                /* Signiture verification is failed */
+                pResult->retCode = MV_FAIL;
+            }
+        }
+        readyStatus = MV_OK;
+    }
+
+    if(readyStatus == MV_OK)
+    {
+        /* If Request is ready - Prepare pResult structure */
+        pResult->pReqPrv = pReq->pCmd->pReqPrv;
+        pResult->sessionId = pReq->pCmd->sessionId;
+
+        pReq->state = MV_CESA_IDLE;
+        pCesaReqProcess = MV_CESA_REQ_NEXT_PTR(pReq);
+        cesaReqResources++;
+
+        if(pSA->ctrMode)
+        {
+            /* For AES CTR mode - complete processing and free allocated resources */
+            mvCesaCtrModeComplete(pReq->pOrgCmd, pReq->pCmd);
+            mvCesaCtrModeFinish(pReq->pCmd);
+            pReq->pOrgCmd = NULL;
+        }
+    }
+
+    if(pCesaReqProcess->state == MV_CESA_PROCESS)
+    {
+        /* Start request Process */
+        mvCesaReqProcessStart(pCesaReqProcess);
+        if(readyStatus == MV_NOT_READY)
+            readyStatus = MV_BUSY;
+    }
+    else if(pCesaReqProcess != pCesaReqEmpty)
+    {
+        /* Start process new request from the queue */
+        mvCesaReqProcessStart(pCesaReqProcess);
+    }
+    return readyStatus;
+}
+
+/***************** Functions to work with CESA_MBUF structure ******************/
+
+/*******************************************************************************
+* mvCesaMbufOffset - Locate offset in the Mbuf structure
+*
+* DESCRIPTION:
+*       This function locates offset inside Multi-Bufeer structure.
+*       It get fragment number and place in the fragment where the offset
+*       is located.
+*
+*
+* INPUT:
+*   MV_CESA_MBUF* pMbuf  - Pointer to multi-buffer structure
+*   int           offset - Offset from the beginning of the data presented by
+*                        the Mbuf structure.
+*
+* OUTPUT:
+*   int*        pBufOffset  - Offset from the beginning of the fragment where
+*                           the offset is located.
+*
+* RETURN:
+*       int - Number of fragment, where the offset is located\
+*
+*******************************************************************************/
+int     mvCesaMbufOffset(MV_CESA_MBUF* pMbuf, int offset, int* pBufOffset)
+{
+    int frag = 0;
+
+    while(offset > 0)
+    {
+        if(frag >= pMbuf->numFrags)
+        {
+            mvOsPrintf("mvCesaMbufOffset: Error: frag (%d) > numFrags (%d)\n",
+                    frag, pMbuf->numFrags);
+            return MV_INVALID;
+        }
+        if(offset < pMbuf->pFrags[frag].bufSize)
+        {
+            break;
+        }
+        offset -= pMbuf->pFrags[frag].bufSize;
+        frag++;
+    }
+    if(pBufOffset != NULL)
+        *pBufOffset = offset;
+
+    return frag;
+}
+
+/*******************************************************************************
+* mvCesaCopyFromMbuf - Copy data from the Mbuf structure to continuous buffer
+*
+* DESCRIPTION:
+*
+*
+* INPUT:
+*   MV_U8*          pDstBuf  - Pointer to continuous buffer, where data is
+*                              copied to.
+*   MV_CESA_MBUF*   pSrcMbuf - Pointer to multi-buffer structure where data is
+*                              copied from.
+*   int             offset   - Offset in the Mbuf structure where located first
+*                            byte of data should be copied.
+*   int             size     - Size of data should be copied
+*
+* RETURN:
+*       MV_OK           - Success, all data is copied successfully.
+*       MV_OUT_OF_RANGE - Failed, offset is out of Multi-buffer data range.
+*                         No data is copied.
+*       MV_EMPTY        - Multi-buffer structure has not enough data to copy
+*                       Data from the offset to end of Mbuf data is copied.
+*
+*******************************************************************************/
+MV_STATUS   mvCesaCopyFromMbuf(MV_U8* pDstBuf, MV_CESA_MBUF* pSrcMbuf,
+                               int offset, int size)
+{
+    int     frag, fragOffset, bufSize;
+    MV_U8*  pBuf;
+
+    if(size == 0)
+        return MV_OK;
+
+    frag = mvCesaMbufOffset(pSrcMbuf, offset, &fragOffset);
+    if(frag == MV_INVALID)
+    {
+        mvOsPrintf("CESA Mbuf Error: offset (%d) out of range\n", offset);
+        return MV_OUT_OF_RANGE;
+    }
+
+    bufSize = pSrcMbuf->pFrags[frag].bufSize - fragOffset;
+    pBuf = pSrcMbuf->pFrags[frag].bufVirtPtr + fragOffset;
+    while(MV_TRUE)
+    {
+        if(size <= bufSize)
+        {
+            memcpy(pDstBuf, pBuf, size);
+            return MV_OK;
+        }
+        memcpy(pDstBuf, pBuf, bufSize);
+        size -= bufSize;
+        frag++;
+        pDstBuf += bufSize;
+        if(frag >= pSrcMbuf->numFrags)
+            break;
+
+        bufSize = pSrcMbuf->pFrags[frag].bufSize;
+        pBuf = pSrcMbuf->pFrags[frag].bufVirtPtr;
+    }
+    mvOsPrintf("mvCesaCopyFromMbuf: Mbuf is EMPTY - %d bytes isn't copied\n",
+                size);
+    return MV_EMPTY;
+}
+
+/*******************************************************************************
+* mvCesaCopyToMbuf - Copy data from continuous buffer to the Mbuf structure
+*
+* DESCRIPTION:
+*
+*
+* INPUT:
+*   MV_U8*          pSrcBuf  - Pointer to continuous buffer, where data is
+*                              copied from.
+*   MV_CESA_MBUF*   pDstMbuf - Pointer to multi-buffer structure where data is
+*                              copied to.
+*   int             offset   - Offset in the Mbuf structure where located first
+*                            byte of data should be copied.
+*   int             size     - Size of data should be copied
+*
+* RETURN:
+*       MV_OK           - Success, all data is copied successfully.
+*       MV_OUT_OF_RANGE - Failed, offset is out of Multi-buffer data range.
+*                         No data is copied.
+*       MV_FULL         - Multi-buffer structure has not enough place to copy
+*                       all data. Data from the offset to end of Mbuf data
+*                       is copied.
+*
+*******************************************************************************/
+MV_STATUS   mvCesaCopyToMbuf(MV_U8* pSrcBuf, MV_CESA_MBUF* pDstMbuf,
+                               int offset, int size)
+{
+    int     frag, fragOffset, bufSize;
+    MV_U8*  pBuf;
+
+    if(size == 0)
+        return MV_OK;
+
+    frag = mvCesaMbufOffset(pDstMbuf, offset, &fragOffset);
+    if(frag == MV_INVALID)
+    {
+        mvOsPrintf("CESA Mbuf Error: offset (%d) out of range\n", offset);
+        return MV_OUT_OF_RANGE;
+    }
+
+    bufSize = pDstMbuf->pFrags[frag].bufSize - fragOffset;
+    pBuf = pDstMbuf->pFrags[frag].bufVirtPtr + fragOffset;
+    while(MV_TRUE)
+    {
+        if(size <= bufSize)
+        {
+            memcpy(pBuf, pSrcBuf, size);
+            return MV_OK;
+        }
+        memcpy(pBuf, pSrcBuf, bufSize);
+        size -= bufSize;
+        frag++;
+        pSrcBuf += bufSize;
+        if(frag >= pDstMbuf->numFrags)
+            break;
+
+        bufSize = pDstMbuf->pFrags[frag].bufSize;
+        pBuf = pDstMbuf->pFrags[frag].bufVirtPtr;
+    }
+    mvOsPrintf("mvCesaCopyToMbuf: Mbuf is FULL - %d bytes isn't copied\n",
+                size);
+    return MV_FULL;
+}
+
+/*******************************************************************************
+* mvCesaMbufCopy - Copy data from one Mbuf structure to the other Mbuf structure
+*
+* DESCRIPTION:
+*
+*
+* INPUT:
+*
+*   MV_CESA_MBUF*   pDstMbuf - Pointer to multi-buffer structure where data is
+*                              copied to.
+*   int      dstMbufOffset   - Offset in the dstMbuf structure where first byte
+*                            of data should be copied to.
+*   MV_CESA_MBUF*   pSrcMbuf - Pointer to multi-buffer structure where data is
+*                              copied from.
+*   int      srcMbufOffset   - Offset in the srcMbuf structure where first byte
+*                            of data should be copied from.
+*   int             size     - Size of data should be copied
+*
+* RETURN:
+*       MV_OK           - Success, all data is copied successfully.
+*       MV_OUT_OF_RANGE - Failed, srcMbufOffset or dstMbufOffset is out of
+*                       srcMbuf or dstMbuf structure correspondently.
+*                       No data is copied.
+*       MV_BAD_SIZE     - srcMbuf or dstMbuf structure is too small to copy
+*                       all data. Partial data is copied
+*
+*******************************************************************************/
+MV_STATUS   mvCesaMbufCopy(MV_CESA_MBUF* pMbufDst, int dstMbufOffset,
+                           MV_CESA_MBUF* pMbufSrc, int srcMbufOffset, int size)
+{
+    int     srcFrag, dstFrag, srcSize, dstSize, srcOffset, dstOffset;
+    int     copySize;
+    MV_U8   *pSrc, *pDst;
+
+    if(size == 0)
+        return MV_OK;
+
+    srcFrag = mvCesaMbufOffset(pMbufSrc, srcMbufOffset, &srcOffset);
+    if(srcFrag == MV_INVALID)
+    {
+        mvOsPrintf("CESA srcMbuf Error: offset (%d) out of range\n", srcMbufOffset);
+        return MV_OUT_OF_RANGE;
+    }
+    pSrc = pMbufSrc->pFrags[srcFrag].bufVirtPtr + srcOffset;
+    srcSize = pMbufSrc->pFrags[srcFrag].bufSize - srcOffset;
+
+    dstFrag = mvCesaMbufOffset(pMbufDst, dstMbufOffset, &dstOffset);
+    if(dstFrag == MV_INVALID)
+    {
+        mvOsPrintf("CESA dstMbuf Error: offset (%d) out of range\n", dstMbufOffset);
+        return MV_OUT_OF_RANGE;
+    }
+    pDst = pMbufDst->pFrags[dstFrag].bufVirtPtr + dstOffset;
+    dstSize = pMbufDst->pFrags[dstFrag].bufSize - dstOffset;
+
+    while(size > 0)
+    {
+        copySize = MV_MIN(srcSize, dstSize);
+        if(size <= copySize)
+        {
+            memcpy(pDst, pSrc, size);
+            return MV_OK;
+        }
+        memcpy(pDst, pSrc, copySize);
+        size -= copySize;
+        srcSize -= copySize;
+        dstSize -= copySize;
+
+        if(srcSize == 0)
+        {
+            srcFrag++;
+            if(srcFrag >= pMbufSrc->numFrags)
+                break;
+
+            pSrc = pMbufSrc->pFrags[srcFrag].bufVirtPtr;
+            srcSize = pMbufSrc->pFrags[srcFrag].bufSize;
+        }
+
+        if(dstSize == 0)
+        {
+            dstFrag++;
+            if(dstFrag >= pMbufDst->numFrags)
+                break;
+
+            pDst = pMbufDst->pFrags[dstFrag].bufVirtPtr;
+            dstSize = pMbufDst->pFrags[dstFrag].bufSize;
+        }
+    }
+    mvOsPrintf("mvCesaMbufCopy: BAD size - %d bytes isn't copied\n",
+                size);
+
+    return MV_BAD_SIZE;
+}
+
+/*************************************** Local Functions ******************************/
+
+/*******************************************************************************
+* mvCesaFragReqProcess - Process fragmented request
+*
+* DESCRIPTION:
+*       This function processes a fragment of fragmented request (First, Middle or Last)
+*
+*
+* INPUT:
+*       MV_CESA_REQ* pReq   - Pointer to the request in the request queue.
+*
+* RETURN:
+*       MV_OK        - The fragment is successfully passed to HW for processing.
+*       MV_TERMINATE - Means, that HW finished its work on this packet and no more
+*                    interrupts will be generated for this request.
+*                    Function mvCesaReadyGet() must be called to complete request
+*                    processing and get request result.
+*
+*******************************************************************************/
+static MV_STATUS   mvCesaFragReqProcess(MV_CESA_REQ* pReq, MV_U8 frag)
+{
+    int                     i, copySize, cryptoDataSize, macDataSize, sid;
+    int                     cryptoIvOffset, digestOffset;
+    MV_U32                  config;
+    MV_CESA_COMMAND*        pCmd = pReq->pCmd;
+    MV_CESA_SA*             pSA;
+    MV_CESA_MBUF*           pMbuf;
+    MV_DMA_DESC*            pDmaDesc = pReq->dma[frag].pDmaFirst;
+    MV_U8*                  pSramBuf = cesaSramVirtPtr->buf;
+    int                     macTotalLen = 0;
+    int                     fixOffset, cryptoOffset, macOffset;
+
+    cesaStats.fragCount++;
+
+    sid = pReq->pCmd->sessionId;
+
+    pSA = &pCesaSAD[sid];
+
+    cryptoIvOffset = digestOffset = 0;
+    i = macDataSize = 0;
+    cryptoDataSize = 0;
+
+    /* First fragment processing */
+    if(pReq->fragMode == MV_CESA_FRAG_FIRST)
+    {
+        /* pReq->frags monitors processing of fragmented request between fragments */
+        pReq->frags.bufOffset = 0;
+        pReq->frags.cryptoSize = 0;
+        pReq->frags.macSize = 0;
+
+        config = pSA->config | (MV_CESA_FRAG_FIRST << MV_CESA_FRAG_MODE_OFFSET);
+
+        /* fixOffset can be not equal to zero only for FIRST fragment */
+        fixOffset = pReq->fixOffset;
+        /* For FIRST fragment crypto and mac offsets are taken from pCmd */
+        cryptoOffset = pCmd->cryptoOffset;
+        macOffset = pCmd->macOffset;
+
+        copySize = sizeof(cesaSramVirtPtr->buf) - pReq->fixOffset;
+
+        /* Find fragment size: Must meet all requirements for CRYPTO and MAC
+         * cryptoDataSize   - size of data will be encrypted/decrypted in this fragment
+         * macDataSize      - size of data will be signed/verified in this fragment
+         * copySize         - size of data will be copied from srcMbuf to SRAM and
+         *                  back to dstMbuf for this fragment
+         */
+        mvCesaFragSizeFind(pSA, pReq, cryptoOffset, macOffset,
+                        &copySize, &cryptoDataSize, &macDataSize);
+
+        if( (pSA->config & MV_CESA_OPERATION_MASK) !=
+                (MV_CESA_MAC_ONLY << MV_CESA_OPERATION_OFFSET))
+        {
+            /* CryptoIV special processing */
+            if( (pSA->config & MV_CESA_CRYPTO_MODE_MASK) ==
+                (MV_CESA_CRYPTO_CBC << MV_CESA_CRYPTO_MODE_BIT) )
+            {
+                /* In CBC mode for encode direction when IV from user */
+                if( (pCmd->ivFromUser) &&
+                    ((pSA->config & MV_CESA_DIRECTION_MASK) ==
+                        (MV_CESA_DIR_ENCODE << MV_CESA_DIRECTION_BIT)) )
+                {
+
+                    /* For Crypto Encode in CBC mode HW always takes IV from SRAM IVPointer,
+                    * (not from IVBufPointer). So when ivFromUser==1, we should copy IV from user place
+                    * in the buffer to SRAM IVPointer
+                    */
+                    i += mvCesaDmaCopyPrepare(pCmd->pSrc, cesaSramVirtPtr->cryptoIV, &pDmaDesc[i],
+                                    MV_FALSE, pCmd->ivOffset, pSA->cryptoIvSize);
+                }
+
+                /* Special processing when IV is not located in the first fragment */
+                if(pCmd->ivOffset > (copySize - pSA->cryptoIvSize))
+                {
+                    /* Prepare dummy place for cryptoIV in SRAM */
+                    cryptoIvOffset = cesaSramVirtPtr->tempCryptoIV - mvCesaSramAddrGet();
+
+                    /* For Decryption: Copy IV value from pCmd->ivOffset to Special SRAM place */
+                    if((pSA->config & MV_CESA_DIRECTION_MASK) ==
+                            (MV_CESA_DIR_DECODE << MV_CESA_DIRECTION_BIT))
+                    {
+                        i += mvCesaDmaCopyPrepare(pCmd->pSrc, cesaSramVirtPtr->tempCryptoIV, &pDmaDesc[i],
+                                    MV_FALSE, pCmd->ivOffset, pSA->cryptoIvSize);
+                    }
+                    else
+                    {
+                        /* For Encryption when IV is NOT from User: */
+                        /* Copy IV from SRAM to buffer (pCmd->ivOffset) */
+                        if(pCmd->ivFromUser == 0)
+                        {
+                            /* copy IV value from cryptoIV to Buffer (pCmd->ivOffset) */
+                            i += mvCesaDmaCopyPrepare(pCmd->pSrc, cesaSramVirtPtr->cryptoIV, &pDmaDesc[i],
+                                    MV_TRUE, pCmd->ivOffset, pSA->cryptoIvSize);
+                        }
+                    }
+                }
+                else
+                {
+                    cryptoIvOffset = pCmd->ivOffset;
+                }
+            }
+        }
+
+        if( (pSA->config & MV_CESA_OPERATION_MASK) !=
+                (MV_CESA_CRYPTO_ONLY << MV_CESA_OPERATION_OFFSET) )
+        {
+            /* MAC digest special processing on Decode direction */
+            if((pSA->config & MV_CESA_DIRECTION_MASK) ==
+                        (MV_CESA_DIR_DECODE << MV_CESA_DIRECTION_BIT))
+            {
+                /* Save digest from pCmd->digestOffset */
+                mvCesaCopyFromMbuf(pReq->frags.orgDigest,
+                               pCmd->pSrc, pCmd->digestOffset, pSA->digestSize);
+
+                /* If pCmd->digestOffset is not located on the first */
+                if(pCmd->digestOffset > (copySize - pSA->digestSize))
+                {
+                    MV_U8  digestZero[MV_CESA_MAX_DIGEST_SIZE];
+
+                    /* Set zeros to pCmd->digestOffset (DRAM) */
+                    memset(digestZero, 0, MV_CESA_MAX_DIGEST_SIZE);
+                    mvCesaCopyToMbuf(digestZero, pCmd->pSrc, pCmd->digestOffset, pSA->digestSize);
+
+                    /* Prepare dummy place for digest in SRAM */
+                    digestOffset = cesaSramVirtPtr->tempDigest - mvCesaSramAddrGet();
+                }
+                else
+                {
+                    digestOffset = pCmd->digestOffset;
+                }
+            }
+        }
+        /* Update SA in SRAM */
+        if(cesaLastSid != sid)
+        {
+            mvCesaSramSaUpdate(sid, &pDmaDesc[i]);
+            i++;
+        }
+
+        pReq->fragMode = MV_CESA_FRAG_MIDDLE;
+    }
+    else
+    {
+        /* Continue fragment */
+        fixOffset = 0;
+        cryptoOffset = 0;
+        macOffset = 0;
+        if( (pCmd->pSrc->mbufSize - pReq->frags.bufOffset) <= sizeof(cesaSramVirtPtr->buf))
+        {
+            /* Last fragment */
+            config = pSA->config | (MV_CESA_FRAG_LAST << MV_CESA_FRAG_MODE_OFFSET);
+            pReq->fragMode = MV_CESA_FRAG_LAST;
+            copySize = pCmd->pSrc->mbufSize - pReq->frags.bufOffset;
+
+            if( (pSA->config & MV_CESA_OPERATION_MASK) !=
+                (MV_CESA_CRYPTO_ONLY << MV_CESA_OPERATION_OFFSET) )
+            {
+                macDataSize = pCmd->macLength - pReq->frags.macSize;
+
+                /* If pCmd->digestOffset is not located on last fragment */
+                if(pCmd->digestOffset < pReq->frags.bufOffset)
+                {
+                    /* Prepare dummy place for digest in SRAM */
+                    digestOffset = cesaSramVirtPtr->tempDigest - mvCesaSramAddrGet();
+                }
+                else
+                {
+                    digestOffset = pCmd->digestOffset - pReq->frags.bufOffset;
+                }
+                pReq->frags.newDigestOffset = digestOffset;
+                macTotalLen = pCmd->macLength;
+
+                /* HW can't calculate the Digest correctly for fragmented packets
+                 * in the following cases:
+                 *  - MV88F5182                                           ||
+                 *  - MV88F5181L when total macLength more that 16 Kbytes ||
+                 *  - total macLength more that 64 Kbytes
+                 */
+                if( (cesaHalData.ctrlModel == MV_5182_DEV_ID) ||
+                    ( (cesaHalData.ctrlModel == MV_5181_DEV_ID) &&
+                      (cesaHalData.ctrlRev >= MV_5181L_A0_REV)  &&
+                      (pCmd->macLength >= (1 << 14)) ) )
+                {
+                    return MV_TERMINATE;
+                }
+            }
+            if( (pSA->config & MV_CESA_OPERATION_MASK) !=
+                (MV_CESA_MAC_ONLY << MV_CESA_OPERATION_OFFSET) )
+            {
+                cryptoDataSize = pCmd->cryptoLength - pReq->frags.cryptoSize;
+            }
+
+            /* cryptoIvOffset - don't care */
+        }
+        else
+        {
+            /* WA for MV88F5182 SHA1 and MD5 fragmentation mode */
+            if( (cesaHalData.ctrlModel == MV_5182_DEV_ID) &&
+                (((pSA->config & MV_CESA_MAC_MODE_MASK) ==
+                    (MV_CESA_MAC_MD5 << MV_CESA_MAC_MODE_OFFSET)) ||
+                ((pSA->config & MV_CESA_MAC_MODE_MASK) ==
+                    (MV_CESA_MAC_SHA1 << MV_CESA_MAC_MODE_OFFSET))) )
+            {
+                pReq->frags.newDigestOffset = cesaSramVirtPtr->tempDigest - mvCesaSramAddrGet();
+                pReq->fragMode = MV_CESA_FRAG_LAST;
+
+                return MV_TERMINATE;
+            }
+            /* Middle fragment */
+            config = pSA->config | (MV_CESA_FRAG_MIDDLE << MV_CESA_FRAG_MODE_OFFSET);
+            copySize = sizeof(cesaSramVirtPtr->buf);
+            /* digestOffset and cryptoIvOffset - don't care */
+
+            /* Find fragment size */
+            mvCesaFragSizeFind(pSA, pReq, cryptoOffset, macOffset,
+                            &copySize, &cryptoDataSize, &macDataSize);
+        }
+    }
+    /********* Prepare DMA descriptors to copy from pSrc to SRAM *********/
+    pMbuf = pCmd->pSrc;
+    i += mvCesaDmaCopyPrepare(pMbuf, pSramBuf + fixOffset, &pDmaDesc[i],
+                                MV_FALSE, pReq->frags.bufOffset, copySize);
+
+    /* Prepare CESA descriptor to copy from DRAM to SRAM by DMA */
+    mvCesaSramDescrBuild(config, frag, 
+                cryptoOffset + fixOffset, cryptoIvOffset + fixOffset,
+                cryptoDataSize, macOffset + fixOffset,
+                digestOffset + fixOffset, macDataSize, macTotalLen,
+                pReq, &pDmaDesc[i]);
+    i++;
+
+   /* Add special descriptor Ownership for CPU */
+    pDmaDesc[i].byteCnt = 0;
+    pDmaDesc[i].phySrcAdd = 0;
+    pDmaDesc[i].phyDestAdd = 0;
+    i++;
+
+    /********* Prepare DMA descriptors to copy from SRAM to pDst *********/
+    pMbuf = pCmd->pDst;
+    i += mvCesaDmaCopyPrepare(pMbuf, pSramBuf + fixOffset, &pDmaDesc[i],
+                                MV_TRUE, pReq->frags.bufOffset, copySize);
+
+    /* Next field of Last DMA descriptor must be NULL */
+    pDmaDesc[i-1].phyNextDescPtr = 0;
+    pReq->dma[frag].pDmaLast = &pDmaDesc[i-1];
+    mvOsCacheFlush(NULL, pReq->dma[frag].pDmaFirst, 
+                    i*sizeof(MV_DMA_DESC));
+
+    /*mvCesaDebugDescriptor(&cesaSramVirtPtr->desc[frag]);*/
+
+    pReq->frags.bufOffset += copySize;
+    pReq->frags.cryptoSize += cryptoDataSize;
+    pReq->frags.macSize += macDataSize;
+
+    return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvCesaReqProcess - Process regular (Non-fragmented) request
+*
+* DESCRIPTION:
+*       This function processes the whole (not fragmented) request
+*
+* INPUT:
+*       MV_CESA_REQ* pReq   - Pointer to the request in the request queue.
+*
+* RETURN:
+*       MV_OK   - The request is successfully passed to HW for processing.
+*       Other   - Failure. The request will not be processed
+*
+*******************************************************************************/
+static MV_STATUS   mvCesaReqProcess(MV_CESA_REQ* pReq)
+{
+    MV_CESA_MBUF    *pMbuf;
+    MV_DMA_DESC     *pDmaDesc;
+    MV_U8           *pSramBuf;
+    int             sid, i, fixOffset;
+    MV_CESA_SA      *pSA;
+    MV_CESA_COMMAND *pCmd = pReq->pCmd;
+
+    cesaStats.procCount++;
+
+    sid = pCmd->sessionId;
+    pSA = &pCesaSAD[sid];
+    pDmaDesc = pReq->dma[0].pDmaFirst;
+    pSramBuf = cesaSramVirtPtr->buf;
+    fixOffset = pReq->fixOffset;
+
+/*
+    mvOsPrintf("mvCesaReqProcess: sid=%d, pSA=%p, pDmaDesc=%p, pSramBuf=%p\n",
+                sid, pSA, pDmaDesc, pSramBuf);
+*/
+    i = 0;
+
+    /* Crypto IV Special processing in CBC mode for Encryption direction */
+    if( ((pSA->config & MV_CESA_OPERATION_MASK) != (MV_CESA_MAC_ONLY << MV_CESA_OPERATION_OFFSET)) &&
+        ((pSA->config & MV_CESA_CRYPTO_MODE_MASK) == (MV_CESA_CRYPTO_CBC << MV_CESA_CRYPTO_MODE_BIT)) &&
+        ((pSA->config & MV_CESA_DIRECTION_MASK) == (MV_CESA_DIR_ENCODE << MV_CESA_DIRECTION_BIT)) &&
+        (pCmd->ivFromUser) )
+    {
+        /* For Crypto Encode in CBC mode HW always takes IV from SRAM IVPointer,
+         * (not from IVBufPointer). So when ivFromUser==1, we should copy IV from user place
+         * in the buffer to SRAM IVPointer
+         */
+        i += mvCesaDmaCopyPrepare(pCmd->pSrc, cesaSramVirtPtr->cryptoIV, &pDmaDesc[i],
+                                    MV_FALSE, pCmd->ivOffset, pSA->cryptoIvSize);
+    }
+
+    /* Update SA in SRAM */
+    if(cesaLastSid != sid)
+    {
+        mvCesaSramSaUpdate(sid, &pDmaDesc[i]);
+        i++;
+    }
+
+    /********* Prepare DMA descriptors to copy from pSrc to SRAM *********/
+    pMbuf = pCmd->pSrc;
+    i += mvCesaDmaCopyPrepare(pMbuf, pSramBuf + fixOffset, &pDmaDesc[i],
+                                MV_FALSE, 0, pMbuf->mbufSize);
+
+    /* Prepare Security Accelerator descriptor to SRAM words 0 - 7 */
+    mvCesaSramDescrBuild(pSA->config, 0, pCmd->cryptoOffset + fixOffset, 
+                        pCmd->ivOffset + fixOffset, pCmd->cryptoLength,
+                        pCmd->macOffset + fixOffset, pCmd->digestOffset + fixOffset,
+                        pCmd->macLength, pCmd->macLength, pReq, &pDmaDesc[i]);
+    i++;
+
+   /* Add special descriptor Ownership for CPU */
+    pDmaDesc[i].byteCnt = 0;
+    pDmaDesc[i].phySrcAdd = 0;
+    pDmaDesc[i].phyDestAdd = 0;
+    i++;
+
+    /********* Prepare DMA descriptors to copy from SRAM to pDst *********/
+    pMbuf = pCmd->pDst;
+    i += mvCesaDmaCopyPrepare(pMbuf, pSramBuf + fixOffset, &pDmaDesc[i],
+                                MV_TRUE, 0, pMbuf->mbufSize);
+
+    /* Next field of Last DMA descriptor must be NULL */
+    pDmaDesc[i-1].phyNextDescPtr = 0;
+    pReq->dma[0].pDmaLast = &pDmaDesc[i-1];
+    mvOsCacheFlush(NULL, pReq->dma[0].pDmaFirst, i*sizeof(MV_DMA_DESC));
+            
+    return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvCesaSramDescrBuild - Set CESA descriptor in SRAM
+*
+* DESCRIPTION:
+*       This function builds CESA descriptor in SRAM from all Command parameters
+*
+*
+* INPUT:
+*       int     chan            - CESA channel uses the descriptor
+*       MV_U32  config          - 32 bits of WORD_0 in CESA descriptor structure
+*       int     cryptoOffset    - Offset from the beginning of SRAM buffer where
+*                               data for encryption/decription is started.
+*       int     ivOffset        - Offset of crypto IV from the SRAM base. Valid only
+*                               for first fragment.
+*       int     cryptoLength    - Size (in bytes) of data for encryption/descryption
+*                               operation on this fragment.
+*       int     macOffset       - Offset from the beginning of SRAM buffer where
+*                               data for Authentication is started
+*       int     digestOffset    - Offset from the beginning of SRAM buffer where
+*                               digest is located. Valid for first and last fragments.
+*       int     macLength       - Size (in bytes) of data for Authentication
+*                               operation on this fragment.
+*       int     macTotalLen     - Toatl size (in bytes) of data for Authentication
+*                               operation on the whole request (packet). Valid for
+*                               last fragment only.
+*
+* RETURN:   None
+*
+*******************************************************************************/
+static void    mvCesaSramDescrBuild(MV_U32 config, int frag, 
+                             int cryptoOffset, int ivOffset, int cryptoLength,
+                             int macOffset, int digestOffset, int macLength,
+                             int macTotalLen, MV_CESA_REQ* pReq, MV_DMA_DESC* pDmaDesc)
+{    
+    MV_CESA_DESC*   pCesaDesc = &pReq->pCesaDesc[frag];
+    MV_CESA_DESC*   pSramDesc = pSramDesc = &cesaSramVirtPtr->desc;
+    MV_U16          sramBufOffset = (MV_U16)((MV_U8*)cesaSramVirtPtr->buf - mvCesaSramAddrGet());
+
+    pCesaDesc->config = MV_32BIT_LE(config);
+
+    if( (config & MV_CESA_OPERATION_MASK) !=
+         (MV_CESA_MAC_ONLY << MV_CESA_OPERATION_OFFSET) )
+    {
+        /* word 1 */
+        pCesaDesc->cryptoSrcOffset = MV_16BIT_LE(sramBufOffset + cryptoOffset);
+        pCesaDesc->cryptoDstOffset = MV_16BIT_LE(sramBufOffset + cryptoOffset);
+        /* word 2 */
+        pCesaDesc->cryptoDataLen = MV_16BIT_LE(cryptoLength);
+        /* word 3 */
+        pCesaDesc->cryptoKeyOffset = MV_16BIT_LE((MV_U16)(cesaSramVirtPtr->sramSA.cryptoKey - 
+                                                            mvCesaSramAddrGet()));
+        /* word 4 */
+        pCesaDesc->cryptoIvOffset  = MV_16BIT_LE((MV_U16)(cesaSramVirtPtr->cryptoIV -
+                                                            mvCesaSramAddrGet()));
+        pCesaDesc->cryptoIvBufOffset = MV_16BIT_LE(sramBufOffset + ivOffset);
+    }
+
+    if( (config & MV_CESA_OPERATION_MASK) !=
+         (MV_CESA_CRYPTO_ONLY << MV_CESA_OPERATION_OFFSET) )
+    {
+        /* word 5 */
+        pCesaDesc->macSrcOffset = MV_16BIT_LE(sramBufOffset + macOffset);
+        pCesaDesc->macTotalLen = MV_16BIT_LE(macTotalLen);
+
+        /* word 6 */
+        pCesaDesc->macDigestOffset = MV_16BIT_LE(sramBufOffset + digestOffset);
+        pCesaDesc->macDataLen = MV_16BIT_LE(macLength);
+
+        /* word 7 */
+        pCesaDesc->macInnerIvOffset = MV_16BIT_LE((MV_U16)(cesaSramVirtPtr->sramSA.macInnerIV - 
+                                 mvCesaSramAddrGet()));
+        pCesaDesc->macOuterIvOffset = MV_16BIT_LE((MV_U16)(cesaSramVirtPtr->sramSA.macOuterIV - 
+                                 mvCesaSramAddrGet()));
+    }
+    /* Prepare DMA descriptor to CESA descriptor from DRAM to SRAM */
+    pDmaDesc->phySrcAdd = MV_32BIT_LE(mvCesaVirtToPhys(&pReq->cesaDescBuf, pCesaDesc));
+    pDmaDesc->phyDestAdd = MV_32BIT_LE(mvCesaSramVirtToPhys(NULL, (MV_U8*)pSramDesc));
+    pDmaDesc->byteCnt = MV_32BIT_LE(sizeof(MV_CESA_DESC) | BIT31);
+                                
+    /* flush Source buffer */
+    mvOsCacheFlush(NULL, pCesaDesc, sizeof(MV_CESA_DESC));
+}
+
+/*******************************************************************************
+* mvCesaSramSaUpdate - Move required SA information to SRAM if needed.
+*
+* DESCRIPTION:
+*   Copy to SRAM values of the required SA.
+*
+*
+* INPUT:
+*       short       sid          - Session ID needs SRAM Cache update
+*       MV_DMA_DESC *pDmaDesc   - Pointer to DMA descriptor used to
+*                                copy SA values from DRAM to SRAM.
+*
+* RETURN:
+*       MV_OK           - Cache entry for this SA copied to SRAM.
+*       MV_NO_CHANGE    - Cache entry for this SA already exist in SRAM
+*
+*******************************************************************************/
+static INLINE void   mvCesaSramSaUpdate(short sid, MV_DMA_DESC *pDmaDesc)
+{
+    MV_CESA_SA      *pSA = &pCesaSAD[sid];
+
+    /* Prepare DMA descriptor to Copy CACHE_SA from SA database in DRAM to SRAM */
+     pDmaDesc->byteCnt = MV_32BIT_LE(sizeof(MV_CESA_SRAM_SA) | BIT31);
+    pDmaDesc->phySrcAdd = MV_32BIT_LE(mvCesaVirtToPhys(&cesaSramSaBuf, pSA->pSramSA));
+     pDmaDesc->phyDestAdd =
+          MV_32BIT_LE(mvCesaSramVirtToPhys(NULL, (MV_U8*)&cesaSramVirtPtr->sramSA));
+
+    /* Source buffer is already flushed during OpenSession*/
+    /*mvOsCacheFlush(NULL, &pSA->sramSA, sizeof(MV_CESA_SRAM_SA));*/
+}
+
+/*******************************************************************************
+* mvCesaDmaCopyPrepare - prepare DMA descriptor list to copy data presented by
+*                       Mbuf structure from DRAM to SRAM
+*
+* DESCRIPTION:
+*
+*
+* INPUT:
+*       MV_CESA_MBUF*   pMbuf       - pointer to Mbuf structure contains request
+*                                   data in DRAM
+*       MV_U8*          pSramBuf    - pointer to buffer in SRAM where data should
+*                                   be copied to.
+*       MV_DMA_DESC*    pDmaDesc   - pointer to first DMA descriptor for this copy.
+*                                   The function set number of DMA descriptors needed
+*                                   to copy the copySize bytes from Mbuf.
+*       MV_BOOL         isToMbuf    - Copy direction.
+*                                   MV_TRUE means copy from SRAM buffer to Mbuf in DRAM.
+*                                   MV_FALSE means copy from Mbuf in DRAM to SRAM buffer.
+*       int             offset      - Offset in the Mbuf structure that copy should be
+*                                   started from.
+*       int             copySize    - Size of data should be copied.
+*
+* RETURN:
+*       int  - number of DMA descriptors used for the copy.
+*
+*******************************************************************************/
+#ifndef MV_NETBSD
+static INLINE int    mvCesaDmaCopyPrepare(MV_CESA_MBUF* pMbuf, MV_U8* pSramBuf, 
+                        MV_DMA_DESC* pDmaDesc, MV_BOOL isToMbuf,
+                        int offset, int copySize)
+{
+    int     bufOffset, bufSize, size, frag, i;
+    MV_U8*  pBuf;
+
+    i = 0;
+
+    /* Calculate start place for copy: fragment number and offset in the fragment */
+    frag = mvCesaMbufOffset(pMbuf, offset, &bufOffset);
+    bufSize = pMbuf->pFrags[frag].bufSize - bufOffset;
+    pBuf = pMbuf->pFrags[frag].bufVirtPtr + bufOffset;
+
+    /* Size accumulate total copy size */
+    size = 0;
+
+    /* Create DMA lists to copy mBuf from pSrc to SRAM */
+    while(size < copySize)
+    {
+        /* Find copy size for each DMA descriptor */
+        bufSize = MV_MIN(bufSize, (copySize - size));
+        pDmaDesc[i].byteCnt = MV_32BIT_LE(bufSize | BIT31);
+        if(isToMbuf)
+        {
+            pDmaDesc[i].phyDestAdd = MV_32BIT_LE(mvOsIoVirtToPhy(NULL, pBuf));
+            pDmaDesc[i].phySrcAdd  =
+                MV_32BIT_LE(mvCesaSramVirtToPhys(NULL, (pSramBuf + size)));
+            /* invalidate the buffer */
+            mvOsCacheInvalidate(NULL, pBuf, bufSize);
+        }
+        else
+        {
+            pDmaDesc[i].phySrcAdd = MV_32BIT_LE(mvOsIoVirtToPhy(NULL, pBuf));
+            pDmaDesc[i].phyDestAdd =
+                MV_32BIT_LE(mvCesaSramVirtToPhys(NULL, (pSramBuf + size)));
+            /* flush the buffer */
+            mvOsCacheFlush(NULL, pBuf, bufSize);
+        }
+
+        /* Count number of used DMA descriptors */
+        i++;
+        size += bufSize;
+
+        /* go to next fragment in the Mbuf */
+        frag++;
+        pBuf = pMbuf->pFrags[frag].bufVirtPtr;
+        bufSize = pMbuf->pFrags[frag].bufSize;
+    }
+    return i;
+}
+#else /* MV_NETBSD */
+static int    mvCesaDmaCopyPrepare(MV_CESA_MBUF* pMbuf, MV_U8* pSramBuf,
+                        MV_DMA_DESC* pDmaDesc, MV_BOOL isToMbuf,
+                        int offset, int copySize)
+{
+	int bufOffset, bufSize, thisSize, size, frag, i;
+	MV_ULONG bufPhys, sramPhys;
+    MV_U8*  pBuf;
+
+	/*
+	 * Calculate start place for copy: fragment number and offset in
+	 * the fragment
+	 */
+    frag = mvCesaMbufOffset(pMbuf, offset, &bufOffset);
+
+	/*
+	 * Get SRAM physical address only once. We can update it in-place
+	 * as we build the descriptor chain.
+	 */
+	sramPhys = mvCesaSramVirtToPhys(NULL, pSramBuf);
+
+	/*
+	 * 'size' accumulates total copy size, 'i' counts desccriptors.
+	 */
+	size = i = 0;
+
+	/* Create DMA lists to copy mBuf from pSrc to SRAM */
+	while (size < copySize) {
+		/*
+		 * Calculate # of bytes to copy from the current fragment,
+		 * and the pointer to the start of data
+		 */
+    bufSize = pMbuf->pFrags[frag].bufSize - bufOffset;
+    pBuf = pMbuf->pFrags[frag].bufVirtPtr + bufOffset;
+		bufOffset = 0;	/* First frag may be non-zero */
+		frag++;
+
+		/*
+		 * As long as there is data in the current fragment...
+		 */
+		while (bufSize > 0) {
+			/*
+			 * Ensure we don't cross an MMU page boundary.
+			 * XXX: This is NetBSD-specific, but it is a
+			 * quick and dirty way to fix the problem.
+			 * A true HAL would rely on the OS-specific
+			 * driver to do this...
+			 */
+			thisSize = PAGE_SIZE -
+			    (((MV_ULONG)pBuf) & (PAGE_SIZE - 1));
+			thisSize = MV_MIN(bufSize, thisSize);
+			/*
+			 * Make sure we don't copy more than requested
+			 */
+			if (thisSize > (copySize - size)) {
+				thisSize = copySize - size;
+				bufSize = 0;
+			}
+
+			/*
+			 * Physicall address of this fragment
+			 */
+			bufPhys = MV_32BIT_LE(mvOsIoVirtToPhy(NULL, pBuf));
+
+			/*
+			 * Set up the descriptor
+			 */
+		        pDmaDesc[i].byteCnt = MV_32BIT_LE(thisSize | BIT31);
+		        if(isToMbuf) {
+				pDmaDesc[i].phyDestAdd = bufPhys;
+				pDmaDesc[i].phySrcAdd  = MV_32BIT_LE(sramPhys);
+            /* invalidate the buffer */
+				mvOsCacheInvalidate(NULL, pBuf, thisSize);
+			} else {
+				pDmaDesc[i].phySrcAdd = bufPhys;
+				pDmaDesc[i].phyDestAdd = MV_32BIT_LE(sramPhys);
+            /* flush the buffer */
+				mvOsCacheFlush(NULL, pBuf, thisSize);
+			}
+
+			pDmaDesc[i].phyNextDescPtr =
+			    MV_32BIT_LE(mvOsIoVirtToPhy(NULL,(&pDmaDesc[i+1])));
+
+        /* flush the DMA desc */
+        mvOsCacheFlush(NULL, &pDmaDesc[i], sizeof(MV_DMA_DESC));
+
+			/* Update state */
+			bufSize -= thisSize;
+			sramPhys += thisSize;
+			pBuf += thisSize;
+			size += thisSize;
+        i++;
+		}
+	}
+
+    return i;
+}
+#endif /* MV_NETBSD */
+/*******************************************************************************
+* mvCesaHmacIvGet - Calculate Inner and Outter values from HMAC key
+*
+* DESCRIPTION:
+*       This function calculate Inner and Outer values used for HMAC algorithm.
+*       This operation allows improve performance fro the whole HMAC processing.
+*
+* INPUT:
+*       MV_CESA_MAC_MODE    macMode     - Authentication mode: HMAC_MD5 or HMAC_SHA1.
+*       unsigned char       key[]       - Pointer to HMAC key.
+*       int                 keyLength   - Size of HMAC key (maximum 64 bytes)
+*
+* OUTPUT:
+*       unsigned char       innerIV[]   - HASH(key^inner)
+*       unsigned char       outerIV[]   - HASH(key^outter)
+*
+* RETURN:   None
+*
+*******************************************************************************/
+static void    mvCesaHmacIvGet(MV_CESA_MAC_MODE macMode, unsigned char key[], int keyLength,
+                     unsigned char innerIV[], unsigned char outerIV[])
+{
+    unsigned char   inner[MV_CESA_MAX_MAC_KEY_LENGTH];
+    unsigned char   outer[MV_CESA_MAX_MAC_KEY_LENGTH];
+    int             i, digestSize = 0;
+#if defined(MV_CPU_LE) || defined(MV_PPC)
+    MV_U32          swapped32, val32, *pVal32;
+#endif 
+    for(i=0; i<keyLength; i++)
+    {
+        inner[i] = 0x36 ^ key[i];
+        outer[i] = 0x5c ^ key[i];
+    }
+
+    for(i=keyLength; i<MV_CESA_MAX_MAC_KEY_LENGTH; i++)
+    {
+        inner[i] = 0x36;
+        outer[i] = 0x5c;
+    }
+    if(macMode == MV_CESA_MAC_HMAC_MD5)
+    {
+        MV_MD5_CONTEXT  ctx;
+
+        mvMD5Init(&ctx);
+        mvMD5Update(&ctx, inner, MV_CESA_MAX_MAC_KEY_LENGTH);
+
+        memcpy(innerIV, ctx.buf, MV_CESA_MD5_DIGEST_SIZE);
+        memset(&ctx, 0, sizeof(ctx));
+
+        mvMD5Init(&ctx);
+        mvMD5Update(&ctx, outer, MV_CESA_MAX_MAC_KEY_LENGTH);
+        memcpy(outerIV, ctx.buf, MV_CESA_MD5_DIGEST_SIZE);
+        memset(&ctx, 0, sizeof(ctx));
+        digestSize = MV_CESA_MD5_DIGEST_SIZE;
+    }
+    else if(macMode == MV_CESA_MAC_HMAC_SHA1)
+    {
+        MV_SHA1_CTX  ctx;
+
+        mvSHA1Init(&ctx);
+        mvSHA1Update(&ctx, inner, MV_CESA_MAX_MAC_KEY_LENGTH);
+        memcpy(innerIV, ctx.state, MV_CESA_SHA1_DIGEST_SIZE);
+        memset(&ctx, 0, sizeof(ctx));
+
+        mvSHA1Init(&ctx);
+        mvSHA1Update(&ctx, outer, MV_CESA_MAX_MAC_KEY_LENGTH);
+        memcpy(outerIV, ctx.state, MV_CESA_SHA1_DIGEST_SIZE);
+        memset(&ctx, 0, sizeof(ctx));
+        digestSize = MV_CESA_SHA1_DIGEST_SIZE;
+    }
+    else
+    {
+        mvOsPrintf("hmacGetIV: Unexpected macMode %d\n", macMode);
+    }
+#if defined(MV_CPU_LE) || defined(MV_PPC)
+    /* 32 bits Swap of Inner and Outer values */
+    pVal32 = (MV_U32*)innerIV;
+    for(i=0; i<digestSize/4; i++)
+    {
+        val32 = *pVal32;
+        swapped32 = MV_BYTE_SWAP_32BIT(val32);
+        *pVal32 = swapped32;
+        pVal32++;
+    }
+    pVal32 = (MV_U32*)outerIV;
+    for(i=0; i<digestSize/4; i++)
+    {
+        val32 = *pVal32;
+        swapped32 = MV_BYTE_SWAP_32BIT(val32);
+        *pVal32 = swapped32;
+        pVal32++;
+    }
+#endif  /* defined(MV_CPU_LE) || defined(MV_PPC) */
+}
+
+
+/*******************************************************************************
+* mvCesaFragSha1Complete - Complete SHA1 authentication started by HW using SW
+*
+* DESCRIPTION:
+*
+*
+* INPUT:
+*       MV_CESA_MBUF*   pMbuf           - Pointer to Mbuf structure where data
+*                                       for SHA1 is placed.
+*       int             offset          - Offset in the Mbuf structure where
+*                                       unprocessed data for SHA1 is started.
+*       MV_U8*          pOuterIV        - Pointer to OUTER for this session.
+*                                       If pOuterIV==NULL - MAC mode is HASH_SHA1
+*                                       If pOuterIV!=NULL - MAC mode is HMAC_SHA1
+*       int             macLeftSize     - Size of unprocessed data for SHA1.
+*       int             macTotalSize    - Total size of data for SHA1 in the
+*                                       request (processed + unprocessed)
+*
+* OUTPUT:
+*       MV_U8*     pDigest  - Pointer to place where calculated Digest will
+*                           be stored.
+*
+* RETURN:   None
+*
+*******************************************************************************/
+static void    mvCesaFragSha1Complete(MV_CESA_MBUF* pMbuf, int offset,
+                                      MV_U8* pOuterIV, int macLeftSize,
+                                      int macTotalSize, MV_U8* pDigest)
+{
+    MV_SHA1_CTX     ctx;
+    MV_U8           *pData;
+    int             i, frag, fragOffset, size;
+
+    /* Read temporary Digest from HW */
+    for(i=0; i<MV_CESA_SHA1_DIGEST_SIZE/4; i++)
+    {
+        ctx.state[i] = MV_REG_READ(MV_CESA_AUTH_INIT_VAL_DIGEST_REG(i));
+    }
+    /* Initialize MV_SHA1_CTX structure */
+    memset(ctx.buffer, 0, 64);
+    /* Set count[0] in bits. 32 bits is enough for 512 MBytes */
+    /* so count[1] is always 0 */
+    ctx.count[0] = ((macTotalSize - macLeftSize) * 8);
+    ctx.count[1] = 0;
+
+    /* If HMAC - add size of Inner block (64 bytes) ro count[0] */
+    if(pOuterIV != NULL)
+        ctx.count[0] += (64 * 8);
+
+    /* Get place of unprocessed data in the Mbuf structure */
+    frag = mvCesaMbufOffset(pMbuf, offset, &fragOffset);
+    if(frag == MV_INVALID)
+    {
+        mvOsPrintf("CESA Mbuf Error: offset (%d) out of range\n", offset);
+        return;
+    }
+
+    pData = pMbuf->pFrags[frag].bufVirtPtr + fragOffset;
+    size = pMbuf->pFrags[frag].bufSize - fragOffset;
+
+    /* Complete Inner part */
+    while(macLeftSize > 0)
+    {
+        if(macLeftSize <= size)
+        {
+            mvSHA1Update(&ctx, pData, macLeftSize);
+            break;
+        }
+        mvSHA1Update(&ctx, pData, size);
+        macLeftSize -= size;
+        frag++;
+        pData = pMbuf->pFrags[frag].bufVirtPtr;
+        size = pMbuf->pFrags[frag].bufSize;
+    }
+    mvSHA1Final(pDigest, &ctx);
+/*
+    mvOsPrintf("mvCesaFragSha1Complete: pOuterIV=%p, macLeftSize=%d, macTotalSize=%d\n",
+                pOuterIV, macLeftSize, macTotalSize);
+    mvDebugMemDump(pDigest, MV_CESA_SHA1_DIGEST_SIZE, 1);
+*/
+
+    if(pOuterIV != NULL)
+    {
+        /* If HMAC - Complete Outer part */
+        for(i=0; i<MV_CESA_SHA1_DIGEST_SIZE/4; i++)
+        {
+#if defined(MV_CPU_LE) || defined(MV_ARM)
+            ctx.state[i] = MV_BYTE_SWAP_32BIT(((MV_U32*)pOuterIV)[i]);
+#else
+	    ctx.state[i] = ((MV_U32*)pOuterIV)[i];
+#endif
+	}
+        memset(ctx.buffer, 0, 64);
+
+        ctx.count[0] = 64*8;
+        ctx.count[1] = 0;
+        mvSHA1Update(&ctx, pDigest, MV_CESA_SHA1_DIGEST_SIZE);
+        mvSHA1Final(pDigest, &ctx);
+    }
+}
+
+/*******************************************************************************
+* mvCesaFragMd5Complete - Complete MD5 authentication started by HW using SW
+*
+* DESCRIPTION:
+*
+*
+* INPUT:
+*       MV_CESA_MBUF*   pMbuf           - Pointer to Mbuf structure where data
+*                                       for SHA1 is placed.
+*       int             offset          - Offset in the Mbuf structure where
+*                                       unprocessed data for MD5 is started.
+*       MV_U8*          pOuterIV        - Pointer to OUTER for this session.
+*                                       If pOuterIV==NULL - MAC mode is HASH_MD5
+*                                       If pOuterIV!=NULL - MAC mode is HMAC_MD5
+*       int             macLeftSize     - Size of unprocessed data for MD5.
+*       int             macTotalSize    - Total size of data for MD5 in the
+*                                       request (processed + unprocessed)
+*
+* OUTPUT:
+*       MV_U8*     pDigest  - Pointer to place where calculated Digest will
+*                           be stored.
+*
+* RETURN:   None
+*
+*******************************************************************************/
+static void    mvCesaFragMd5Complete(MV_CESA_MBUF* pMbuf, int offset,
+                                     MV_U8* pOuterIV, int macLeftSize,
+                                     int macTotalSize, MV_U8* pDigest)
+{
+    MV_MD5_CONTEXT  ctx;
+    MV_U8           *pData;
+    int             i, frag, fragOffset, size;
+
+    /* Read temporary Digest from HW */
+    for(i=0; i<MV_CESA_MD5_DIGEST_SIZE/4; i++)
+    {
+        ctx.buf[i] = MV_REG_READ(MV_CESA_AUTH_INIT_VAL_DIGEST_REG(i));
+    }
+    memset(ctx.in, 0, 64);
+
+    /* Set count[0] in bits. 32 bits is enough for 512 MBytes */
+    /* so count[1] is always 0 */
+    ctx.bits[0] = ((macTotalSize - macLeftSize) * 8);
+    ctx.bits[1] = 0;
+
+    /* If HMAC - add size of Inner block (64 bytes) ro count[0] */
+    if(pOuterIV != NULL)
+        ctx.bits[0] += (64 * 8);
+
+    frag = mvCesaMbufOffset(pMbuf, offset, &fragOffset);
+    if(frag == MV_INVALID)
+    {
+        mvOsPrintf("CESA Mbuf Error: offset (%d) out of range\n", offset);
+        return;
+    }
+
+    pData = pMbuf->pFrags[frag].bufVirtPtr + fragOffset;
+    size = pMbuf->pFrags[frag].bufSize - fragOffset;
+
+    /* Complete Inner part */
+    while(macLeftSize > 0)
+    {
+        if(macLeftSize <= size)
+        {
+            mvMD5Update(&ctx, pData, macLeftSize);
+            break;
+        }
+        mvMD5Update(&ctx, pData, size);
+        macLeftSize -= size;
+        frag++;
+        pData = pMbuf->pFrags[frag].bufVirtPtr;
+        size = pMbuf->pFrags[frag].bufSize;
+    }
+    mvMD5Final(pDigest, &ctx);
+
+/*
+    mvOsPrintf("mvCesaFragMd5Complete: pOuterIV=%p, macLeftSize=%d, macTotalSize=%d\n",
+                pOuterIV, macLeftSize, macTotalSize);
+    mvDebugMemDump(pDigest, MV_CESA_MD5_DIGEST_SIZE, 1);
+*/
+    if(pOuterIV != NULL)
+    {
+        /* Complete Outer part */
+        for(i=0; i<MV_CESA_MD5_DIGEST_SIZE/4; i++)
+        {
+#if defined(MV_CPU_LE) || defined(MV_ARM)
+            ctx.buf[i] = MV_BYTE_SWAP_32BIT(((MV_U32*)pOuterIV)[i]);
+#else
+	    ctx.buf[i] = ((MV_U32*)pOuterIV)[i];
+#endif
+	}
+        memset(ctx.in, 0, 64);
+
+        ctx.bits[0] = 64*8;
+        ctx.bits[1] = 0;
+        mvMD5Update(&ctx, pDigest, MV_CESA_MD5_DIGEST_SIZE);
+        mvMD5Final(pDigest, &ctx);
+    }
+}
+
+/*******************************************************************************
+* mvCesaFragAuthComplete -
+*
+* DESCRIPTION:
+*
+*
+* INPUT:
+*       MV_CESA_REQ*    pReq,
+*       MV_CESA_SA*     pSA,
+*       int             macDataSize
+*
+* RETURN:
+*       MV_STATUS
+*
+*******************************************************************************/
+static MV_STATUS   mvCesaFragAuthComplete(MV_CESA_REQ* pReq, MV_CESA_SA* pSA,
+                               int macDataSize)
+{
+    MV_CESA_COMMAND*        pCmd = pReq->pCmd;
+    MV_U8*                  pDigest;
+    MV_CESA_MAC_MODE        macMode;
+    MV_U8*                  pOuterIV = NULL;
+
+    /* Copy data from Source fragment to Destination */
+    if(pCmd->pSrc != pCmd->pDst)
+    {
+        mvCesaMbufCopy(pCmd->pDst, pReq->frags.bufOffset,
+                       pCmd->pSrc, pReq->frags.bufOffset, macDataSize);
+    }
+
+/*
+    mvCesaCopyFromMbuf(cesaSramVirtPtr->buf[0], pCmd->pSrc, pReq->frags.bufOffset, macDataSize);
+    mvCesaCopyToMbuf(cesaSramVirtPtr->buf[0], pCmd->pDst, pReq->frags.bufOffset, macDataSize);
+*/
+    pDigest = (mvCesaSramAddrGet() + pReq->frags.newDigestOffset);
+
+    macMode = (pSA->config & MV_CESA_MAC_MODE_MASK) >> MV_CESA_MAC_MODE_OFFSET;
+/*
+    mvOsPrintf("macDataSize=%d, macLength=%d, digestOffset=%d, macMode=%d\n",
+            macDataSize, pCmd->macLength, pCmd->digestOffset, macMode);
+*/
+    switch(macMode)
+    {
+        case MV_CESA_MAC_HMAC_MD5:
+            pOuterIV = pSA->pSramSA->macOuterIV;
+
+        case MV_CESA_MAC_MD5:
+            mvCesaFragMd5Complete(pCmd->pDst, pReq->frags.bufOffset, pOuterIV,
+                               macDataSize, pCmd->macLength, pDigest);
+        break;
+
+        case MV_CESA_MAC_HMAC_SHA1:
+            pOuterIV = pSA->pSramSA->macOuterIV;
+
+        case MV_CESA_MAC_SHA1:
+            mvCesaFragSha1Complete(pCmd->pDst, pReq->frags.bufOffset, pOuterIV,
+                               macDataSize, pCmd->macLength, pDigest);
+        break;
+
+        default:
+            mvOsPrintf("mvCesaFragAuthComplete: Unexpected macMode %d\n", macMode);
+            return MV_BAD_PARAM;
+    }
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvCesaCtrModeInit -
+*
+* DESCRIPTION:
+*
+*
+* INPUT: NONE
+*
+*
+* RETURN:
+*       MV_CESA_COMMAND*
+*
+*******************************************************************************/
+static MV_CESA_COMMAND*    mvCesaCtrModeInit(void)
+{
+    MV_CESA_MBUF    *pMbuf;
+    MV_U8           *pBuf;
+    MV_CESA_COMMAND *pCmd;
+
+    pBuf = mvOsMalloc(sizeof(MV_CESA_COMMAND) +
+                      sizeof(MV_CESA_MBUF) + sizeof(MV_BUF_INFO) + 100);
+    if(pBuf == NULL)
+    {
+        mvOsPrintf("mvCesaSessionOpen: Can't allocate %u bytes for CTR Mode\n",
+                    sizeof(MV_CESA_COMMAND) + sizeof(MV_CESA_MBUF) + sizeof(MV_BUF_INFO) );
+        return NULL;
+    }
+    pCmd = (MV_CESA_COMMAND*)pBuf;
+    pBuf += sizeof(MV_CESA_COMMAND);
+
+    pMbuf = (MV_CESA_MBUF*)pBuf;
+    pBuf += sizeof(MV_CESA_MBUF);
+
+    pMbuf->pFrags = (MV_BUF_INFO*)pBuf;
+
+    pMbuf->numFrags = 1;
+    pCmd->pSrc = pMbuf;
+    pCmd->pDst = pMbuf;
+/*
+    mvOsPrintf("CtrModeInit: pCmd=%p, pSrc=%p, pDst=%p, pFrags=%p\n",
+                pCmd, pCmd->pSrc, pCmd->pDst,
+                pMbuf->pFrags);
+*/
+    return pCmd;
+}
+
+/*******************************************************************************
+* mvCesaCtrModePrepare -
+*
+* DESCRIPTION:
+*
+*
+* INPUT:
+*       MV_CESA_COMMAND *pCtrModeCmd, MV_CESA_COMMAND *pCmd
+*
+* RETURN:
+*       MV_STATUS
+*
+*******************************************************************************/
+static MV_STATUS    mvCesaCtrModePrepare(MV_CESA_COMMAND *pCtrModeCmd, MV_CESA_COMMAND *pCmd)
+{
+    MV_CESA_MBUF    *pMbuf;
+    MV_U8           *pBuf, *pIV;
+    MV_U32          counter, *pCounter;
+    int             cryptoSize = MV_ALIGN_UP(pCmd->cryptoLength, MV_CESA_AES_BLOCK_SIZE);
+/*
+    mvOsPrintf("CtrModePrepare: pCmd=%p, pCtrSrc=%p, pCtrDst=%p, pOrgCmd=%p, pOrgSrc=%p, pOrgDst=%p\n",
+                pCmd, pCmd->pSrc, pCmd->pDst,
+                pCtrModeCmd, pCtrModeCmd->pSrc, pCtrModeCmd->pDst);
+*/
+    pMbuf = pCtrModeCmd->pSrc;
+
+    /* Allocate buffer for Key stream */
+    pBuf = mvOsIoCachedMalloc(cesaOsHandle,cryptoSize, 
+			      &pMbuf->pFrags[0].bufPhysAddr,
+			      &pMbuf->pFrags[0].memHandle);
+    if(pBuf == NULL)
+    {
+        mvOsPrintf("mvCesaCtrModePrepare: Can't allocate %d bytes\n", cryptoSize);
+        return MV_OUT_OF_CPU_MEM;
+    }
+    memset(pBuf, 0, cryptoSize);
+    mvOsCacheFlush(NULL, pBuf, cryptoSize);
+
+    pMbuf->pFrags[0].bufVirtPtr = pBuf;
+    pMbuf->mbufSize = cryptoSize;
+    pMbuf->pFrags[0].bufSize = cryptoSize;
+
+    pCtrModeCmd->pReqPrv = pCmd->pReqPrv;
+    pCtrModeCmd->sessionId = pCmd->sessionId;
+
+    /* ivFromUser and ivOffset are don't care */
+    pCtrModeCmd->cryptoOffset = 0;
+    pCtrModeCmd->cryptoLength = cryptoSize;
+
+    /* digestOffset, macOffset and macLength are don't care */
+
+    mvCesaCopyFromMbuf(pBuf, pCmd->pSrc, pCmd->ivOffset, MV_CESA_AES_BLOCK_SIZE);
+    pCounter = (MV_U32*)(pBuf + (MV_CESA_AES_BLOCK_SIZE - sizeof(counter)));
+    counter = *pCounter;
+    counter = MV_32BIT_BE(counter);
+    pIV = pBuf;
+    cryptoSize -= MV_CESA_AES_BLOCK_SIZE;
+
+    /* fill key stream */
+    while(cryptoSize > 0)
+    {
+        pBuf += MV_CESA_AES_BLOCK_SIZE;
+        memcpy(pBuf, pIV, MV_CESA_AES_BLOCK_SIZE - sizeof(counter));
+        pCounter = (MV_U32*)(pBuf + (MV_CESA_AES_BLOCK_SIZE - sizeof(counter)));
+        counter++;
+        *pCounter = MV_32BIT_BE(counter);
+        cryptoSize -= MV_CESA_AES_BLOCK_SIZE;
+    }
+
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvCesaCtrModeComplete -
+*
+* DESCRIPTION:
+*
+*
+* INPUT:
+*       MV_CESA_COMMAND *pOrgCmd, MV_CESA_COMMAND *pCmd
+*
+* RETURN:
+*       MV_STATUS
+*
+*******************************************************************************/
+static MV_STATUS   mvCesaCtrModeComplete(MV_CESA_COMMAND *pOrgCmd, MV_CESA_COMMAND *pCmd)
+{
+    int         srcFrag, dstFrag, srcOffset, dstOffset, keyOffset, srcSize, dstSize;
+    int         cryptoSize = pCmd->cryptoLength;
+    MV_U8       *pSrc, *pDst, *pKey;
+    MV_STATUS   status = MV_OK;
+/*
+    mvOsPrintf("CtrModeComplete: pCmd=%p, pCtrSrc=%p, pCtrDst=%p, pOrgCmd=%p, pOrgSrc=%p, pOrgDst=%p\n",
+                pCmd, pCmd->pSrc, pCmd->pDst,
+                pOrgCmd, pOrgCmd->pSrc, pOrgCmd->pDst);
+*/
+    /* XOR source data with key stream to destination data */
+    pKey = pCmd->pDst->pFrags[0].bufVirtPtr;
+    keyOffset = 0;
+
+    if( (pOrgCmd->pSrc != pOrgCmd->pDst) &&
+        (pOrgCmd->cryptoOffset > 0) )
+    {
+        /* Copy Prefix from source buffer to destination buffer */
+
+        status = mvCesaMbufCopy(pOrgCmd->pDst, 0,
+                                pOrgCmd->pSrc, 0, pOrgCmd->cryptoOffset);
+/*
+        status = mvCesaCopyFromMbuf(tempBuf, pOrgCmd->pSrc,
+                       0, pOrgCmd->cryptoOffset);
+        status = mvCesaCopyToMbuf(tempBuf, pOrgCmd->pDst,
+                       0, pOrgCmd->cryptoOffset);
+*/
+    }
+
+    srcFrag = mvCesaMbufOffset(pOrgCmd->pSrc, pOrgCmd->cryptoOffset, &srcOffset);
+    pSrc = pOrgCmd->pSrc->pFrags[srcFrag].bufVirtPtr;
+    srcSize = pOrgCmd->pSrc->pFrags[srcFrag].bufSize;
+
+    dstFrag = mvCesaMbufOffset(pOrgCmd->pDst, pOrgCmd->cryptoOffset, &dstOffset);
+    pDst = pOrgCmd->pDst->pFrags[dstFrag].bufVirtPtr;
+    dstSize = pOrgCmd->pDst->pFrags[dstFrag].bufSize;
+
+    while(cryptoSize > 0)
+    {
+        pDst[dstOffset] = (pSrc[srcOffset] ^ pKey[keyOffset]);
+
+        cryptoSize--;
+        dstOffset++;
+        srcOffset++;
+        keyOffset++;
+
+        if(srcOffset >= srcSize)
+        {
+            srcFrag++;
+            srcOffset = 0;
+            pSrc = pOrgCmd->pSrc->pFrags[srcFrag].bufVirtPtr;
+            srcSize = pOrgCmd->pSrc->pFrags[srcFrag].bufSize;
+        }
+
+        if(dstOffset >= dstSize)
+        {
+            dstFrag++;
+            dstOffset = 0;
+            pDst = pOrgCmd->pDst->pFrags[dstFrag].bufVirtPtr;
+            dstSize = pOrgCmd->pDst->pFrags[dstFrag].bufSize;
+        }
+    }
+
+    if(pOrgCmd->pSrc != pOrgCmd->pDst)
+    {
+        /* Copy Suffix from source buffer to destination buffer */
+        srcOffset = pOrgCmd->cryptoOffset + pOrgCmd->cryptoLength;
+
+        if( (pOrgCmd->pDst->mbufSize - srcOffset) > 0)
+        {
+            status = mvCesaMbufCopy(pOrgCmd->pDst, srcOffset,
+                                    pOrgCmd->pSrc, srcOffset,
+                                    pOrgCmd->pDst->mbufSize - srcOffset);
+        }
+
+/*
+        status = mvCesaCopyFromMbuf(tempBuf, pOrgCmd->pSrc,
+                                srcOffset, pOrgCmd->pSrc->mbufSize - srcOffset);
+        status = mvCesaCopyToMbuf(tempBuf, pOrgCmd->pDst,
+                       srcOffset, pOrgCmd->pDst->mbufSize - srcOffset);
+*/
+    }
+
+    /* Free buffer used for Key stream */
+    mvOsIoCachedFree(cesaOsHandle,pCmd->pDst->pFrags[0].bufSize,
+		     pCmd->pDst->pFrags[0].bufPhysAddr,
+                     pCmd->pDst->pFrags[0].bufVirtPtr,
+		     pCmd->pDst->pFrags[0].memHandle);
+
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvCesaCtrModeFinish -
+*
+* DESCRIPTION:
+*
+*
+* INPUT:
+*       MV_CESA_COMMAND* pCmd
+*
+* RETURN:
+*       MV_STATUS
+*
+*******************************************************************************/
+static void    mvCesaCtrModeFinish(MV_CESA_COMMAND* pCmd)
+{
+    mvOsFree(pCmd);
+}
+
+/*******************************************************************************
+* mvCesaParamCheck -
+*
+* DESCRIPTION:
+*
+*
+* INPUT:
+*       MV_CESA_SA* pSA, MV_CESA_COMMAND *pCmd, MV_U8* pFixOffset
+*
+* RETURN:
+*       MV_STATUS
+*
+*******************************************************************************/
+static MV_STATUS   mvCesaParamCheck(MV_CESA_SA* pSA, MV_CESA_COMMAND *pCmd,
+                                    MV_U8* pFixOffset)
+{
+    MV_U8   fixOffset = 0xFF;
+
+    /* Check AUTH operation parameters */
+    if( ((pSA->config & MV_CESA_OPERATION_MASK) !=
+                (MV_CESA_CRYPTO_ONLY << MV_CESA_OPERATION_OFFSET)) )
+    {
+        /* MAC offset should be at least 4 byte aligned */
+        if( MV_IS_NOT_ALIGN(pCmd->macOffset, 4) )
+        {
+            mvOsPrintf("mvCesaAction: macOffset %d must be 4 byte aligned\n",
+                    pCmd->macOffset);
+            return MV_BAD_PARAM;
+        }
+        /* Digest offset must be 4 byte aligned */
+        if( MV_IS_NOT_ALIGN(pCmd->digestOffset, 4) )
+        {
+            mvOsPrintf("mvCesaAction: digestOffset %d must be 4 byte aligned\n",
+                    pCmd->digestOffset);
+            return MV_BAD_PARAM;
+        }
+        /* In addition all offsets should be the same alignment: 8 or 4 */
+        if(fixOffset == 0xFF)
+        {
+            fixOffset = (pCmd->macOffset % 8);
+        }
+        else
+        {
+            if( (pCmd->macOffset % 8) != fixOffset)
+            {
+                mvOsPrintf("mvCesaAction: macOffset %d mod 8 must be equal %d\n",
+                                pCmd->macOffset, fixOffset);
+                return MV_BAD_PARAM;
+            }
+        }
+        if( (pCmd->digestOffset % 8) != fixOffset)
+        {
+            mvOsPrintf("mvCesaAction: digestOffset %d mod 8 must be equal %d\n",
+                                pCmd->digestOffset, fixOffset);
+            return MV_BAD_PARAM;
+        }
+    }
+    /* Check CRYPTO operation parameters */
+    if( ((pSA->config & MV_CESA_OPERATION_MASK) !=
+                (MV_CESA_MAC_ONLY << MV_CESA_OPERATION_OFFSET)) )
+    {
+        /* CryptoOffset should be at least 4 byte aligned */
+        if( MV_IS_NOT_ALIGN(pCmd->cryptoOffset, 4)  )
+        {
+            mvOsPrintf("CesaAction: cryptoOffset=%d must be 4 byte aligned\n",
+                        pCmd->cryptoOffset);
+            return MV_BAD_PARAM;
+        }
+        /* cryptoLength should be the whole number of blocks */
+        if( MV_IS_NOT_ALIGN(pCmd->cryptoLength, pSA->cryptoBlockSize) )
+        {
+            mvOsPrintf("mvCesaAction: cryptoLength=%d must be %d byte aligned\n",
+                        pCmd->cryptoLength, pSA->cryptoBlockSize);
+            return MV_BAD_PARAM;
+        }
+        if(fixOffset == 0xFF)
+        {
+            fixOffset = (pCmd->cryptoOffset % 8);
+        }
+        else
+        {
+            /* In addition all offsets should be the same alignment: 8 or 4 */
+            if( (pCmd->cryptoOffset % 8) != fixOffset)
+            {
+                mvOsPrintf("mvCesaAction: cryptoOffset %d mod 8 must be equal %d \n",
+                                pCmd->cryptoOffset, fixOffset);
+                return MV_BAD_PARAM;
+            }
+        }
+
+        /* check for CBC mode */
+        if(pSA->cryptoIvSize > 0)
+        {
+            /* cryptoIV must not be part of CryptoLength */
+            if( ((pCmd->ivOffset + pSA->cryptoIvSize) > pCmd->cryptoOffset) &&
+                (pCmd->ivOffset < (pCmd->cryptoOffset + pCmd->cryptoLength)) )
+            {
+                mvOsPrintf("mvCesaFragParamCheck: cryptoIvOffset (%d) is part of cryptoLength (%d+%d)\n",
+                        pCmd->ivOffset, pCmd->macOffset, pCmd->macLength);
+                return MV_BAD_PARAM;
+            }
+
+            /* ivOffset must be 4 byte aligned */
+            if( MV_IS_NOT_ALIGN(pCmd->ivOffset, 4) )
+            {
+                mvOsPrintf("CesaAction: ivOffset=%d must be 4 byte aligned\n",
+                            pCmd->ivOffset);
+                return MV_BAD_PARAM;
+            }
+            /* In addition all offsets should be the same alignment: 8 or 4 */
+            if( (pCmd->ivOffset % 8) != fixOffset)
+            {
+                mvOsPrintf("mvCesaAction: ivOffset %d mod 8 must be %d\n",
+                                pCmd->ivOffset, fixOffset);
+                return MV_BAD_PARAM;
+            }
+        }
+    }
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvCesaFragParamCheck -
+*
+* DESCRIPTION:
+*
+*
+* INPUT:
+*       MV_CESA_SA* pSA, MV_CESA_COMMAND *pCmd
+*
+* RETURN:
+*       MV_STATUS
+*
+*******************************************************************************/
+static MV_STATUS   mvCesaFragParamCheck(MV_CESA_SA* pSA, MV_CESA_COMMAND *pCmd)
+{
+    int     offset;
+
+    if( ((pSA->config & MV_CESA_OPERATION_MASK) !=
+                (MV_CESA_CRYPTO_ONLY << MV_CESA_OPERATION_OFFSET)) )
+    {
+        /* macOffset must be less that SRAM buffer size */
+        if(pCmd->macOffset > (sizeof(cesaSramVirtPtr->buf) - MV_CESA_AUTH_BLOCK_SIZE))
+        {
+            mvOsPrintf("mvCesaFragParamCheck: macOffset is too large (%d)\n",
+                        pCmd->macOffset);
+            return MV_BAD_PARAM;
+        }
+        /* macOffset+macSize must be more than mbufSize - SRAM buffer size */
+        if( ((pCmd->macOffset + pCmd->macLength) > pCmd->pSrc->mbufSize) ||
+            ((pCmd->pSrc->mbufSize - (pCmd->macOffset + pCmd->macLength)) >=
+             sizeof(cesaSramVirtPtr->buf)) )
+        {
+            mvOsPrintf("mvCesaFragParamCheck: macLength is too large (%d), mbufSize=%d\n",
+                        pCmd->macLength, pCmd->pSrc->mbufSize);
+            return MV_BAD_PARAM;
+        }
+    }
+
+    if( ((pSA->config & MV_CESA_OPERATION_MASK) !=
+                (MV_CESA_MAC_ONLY << MV_CESA_OPERATION_OFFSET)) )
+    {
+        /* cryptoOffset must be less that SRAM buffer size */
+        /* 4 for possible fixOffset */
+        if( (pCmd->cryptoOffset + 4) > (sizeof(cesaSramVirtPtr->buf) - pSA->cryptoBlockSize))
+        {
+            mvOsPrintf("mvCesaFragParamCheck: cryptoOffset is too large (%d)\n",
+                        pCmd->cryptoOffset);
+            return MV_BAD_PARAM;
+        }
+
+        /* cryptoOffset+cryptoSize must be more than mbufSize - SRAM buffer size */
+        if( ((pCmd->cryptoOffset + pCmd->cryptoLength) > pCmd->pSrc->mbufSize) ||
+            ((pCmd->pSrc->mbufSize - (pCmd->cryptoOffset + pCmd->cryptoLength)) >=
+             (sizeof(cesaSramVirtPtr->buf) - pSA->cryptoBlockSize)) )
+        {
+            mvOsPrintf("mvCesaFragParamCheck: cryptoLength is too large (%d), mbufSize=%d\n",
+                        pCmd->cryptoLength, pCmd->pSrc->mbufSize);
+            return MV_BAD_PARAM;
+        }
+    }
+
+    /* When MAC_THEN_CRYPTO or CRYPTO_THEN_MAC */
+    if( ((pSA->config & MV_CESA_OPERATION_MASK) ==
+            (MV_CESA_MAC_THEN_CRYPTO << MV_CESA_OPERATION_OFFSET)) ||
+        ((pSA->config & MV_CESA_OPERATION_MASK) ==
+            (MV_CESA_CRYPTO_THEN_MAC << MV_CESA_OPERATION_OFFSET)) )
+    {
+        if( (cesaHalData.ctrlModel == MV_5182_DEV_ID) ||
+            ( (cesaHalData.ctrlModel == MV_5181_DEV_ID) &&
+              (cesaHalData.ctrlRev >= MV_5181L_A0_REV)  &&
+              (pCmd->macLength >= (1 << 14)) ) )
+        {
+            return MV_NOT_ALLOWED;
+        }
+
+        /* abs(cryptoOffset-macOffset) must be aligned cryptoBlockSize */
+        if(pCmd->cryptoOffset > pCmd->macOffset)
+        {
+            offset = pCmd->cryptoOffset - pCmd->macOffset;
+        }
+        else
+        {
+            offset = pCmd->macOffset - pCmd->cryptoOffset;
+        }
+
+        if( MV_IS_NOT_ALIGN(offset,  pSA->cryptoBlockSize) )
+        {
+/*
+            mvOsPrintf("mvCesaFragParamCheck: (cryptoOffset - macOffset) must be %d byte aligned\n",
+                        pSA->cryptoBlockSize);
+*/
+            return MV_NOT_ALLOWED;
+        }
+        /* Digest must not be part of CryptoLength */
+        if( ((pCmd->digestOffset + pSA->digestSize) > pCmd->cryptoOffset) &&
+            (pCmd->digestOffset < (pCmd->cryptoOffset + pCmd->cryptoLength)) )
+        {
+/*
+            mvOsPrintf("mvCesaFragParamCheck: digestOffset (%d) is part of cryptoLength (%d+%d)\n",
+                        pCmd->digestOffset, pCmd->cryptoOffset, pCmd->cryptoLength);
+*/
+            return MV_NOT_ALLOWED;
+        }
+    }
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvCesaFragSizeFind -
+*
+* DESCRIPTION:
+*
+*
+* INPUT:
+*       MV_CESA_SA* pSA, MV_CESA_COMMAND *pCmd,
+*       int cryptoOffset, int macOffset,
+*
+* OUTPUT:
+*       int* pCopySize, int* pCryptoDataSize, int* pMacDataSize
+*
+* RETURN:
+*       MV_STATUS
+*
+*******************************************************************************/
+static void   mvCesaFragSizeFind(MV_CESA_SA* pSA, MV_CESA_REQ* pReq,
+                                 int cryptoOffset, int macOffset,
+                          int* pCopySize, int* pCryptoDataSize, int* pMacDataSize)
+{
+    MV_CESA_COMMAND *pCmd = pReq->pCmd;
+    int             cryptoDataSize, macDataSize, copySize;
+
+    cryptoDataSize = macDataSize = 0;
+    copySize = *pCopySize;
+
+    if( (pSA->config & MV_CESA_OPERATION_MASK) !=
+                (MV_CESA_MAC_ONLY << MV_CESA_OPERATION_OFFSET) )
+    {
+        cryptoDataSize = MV_MIN( (copySize - cryptoOffset),
+                                 (pCmd->cryptoLength - (pReq->frags.cryptoSize + 1)) );
+
+        /* cryptoSize for each fragment must be the whole number of blocksSize */
+        if( MV_IS_NOT_ALIGN(cryptoDataSize, pSA->cryptoBlockSize) )
+        {
+            cryptoDataSize = MV_ALIGN_DOWN(cryptoDataSize, pSA->cryptoBlockSize);
+            copySize = cryptoOffset + cryptoDataSize;
+        }
+    }
+    if( (pSA->config & MV_CESA_OPERATION_MASK) !=
+             (MV_CESA_CRYPTO_ONLY << MV_CESA_OPERATION_OFFSET) )
+    {
+        macDataSize = MV_MIN( (copySize - macOffset),
+                              (pCmd->macLength - (pReq->frags.macSize + 1)));
+
+        /* macSize for each fragment (except last) must be the whole number of blocksSize */
+        if( MV_IS_NOT_ALIGN(macDataSize, MV_CESA_AUTH_BLOCK_SIZE) )
+        {
+            macDataSize = MV_ALIGN_DOWN(macDataSize, MV_CESA_AUTH_BLOCK_SIZE);
+            copySize = macOffset + macDataSize;
+        }
+        cryptoDataSize = copySize - cryptoOffset;
+    }
+    *pCopySize = copySize;
+
+    if(pCryptoDataSize != NULL)
+        *pCryptoDataSize = cryptoDataSize;
+
+    if(pMacDataSize != NULL)
+        *pMacDataSize = macDataSize;
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/mvLru.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/mvLru.h
@@ -0,0 +1,119 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+/*******************************************************************************
+* mvLru.h - Header File for Least Recently Used Cache algorithm
+*
+* DESCRIPTION:
+*       This header file contains macros typedefs and function declaration for
+*       the Least Recently Used Cache algorithm.
+*
+*******************************************************************************/
+
+#ifndef __mvLru_h__
+#define __mvLru_h__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct
+{
+    int next;
+    int prev;
+} MV_LRU_ENTRY;
+
+typedef struct
+{
+    int             least;
+    int             most;
+    MV_LRU_ENTRY*   table;
+    int             tableSize;
+
+}MV_LRU_CACHE;
+
+
+/* Find Cache index for replacement LRU */
+static INLINE int     mvLruCacheIdxFind(MV_LRU_CACHE* pLruHndl)
+{
+    return pLruHndl->least;
+}
+
+/* Init LRU cache module */
+MV_LRU_CACHE*   mvLruCacheInit(int numOfEntries);
+
+/* Finish LRU cache module */
+void    mvLruCacheFinish(MV_LRU_CACHE* pLruHndl);
+
+/* Update LRU cache database after using cache Index */
+void    mvLruCacheIdxUpdate(MV_LRU_CACHE* pLruHndl, int cacheIdx);
+
+/* Delete LRU cache entry */
+void    mvLruCacheIdxDelete(MV_LRU_CACHE* pLruHndl, int cacheIdx);
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* __mvLru_h__ */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/mvMD5.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/mvMD5.c
@@ -0,0 +1,350 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "mvMD5.h"
+
+static void mvMD5Transform(MV_U32 buf[4], MV_U32 const in[MV_MD5_MAC_LEN]);
+ 
+#ifdef  MV_CPU_LE
+#define mvByteReverse(buf, len)   /* Nothing */
+#else
+static void mvByteReverse(unsigned char *buf, unsigned longs);
+
+/*
+ * Note: this code is harmless on little-endian machines.
+ */
+static void mvByteReverse(unsigned char *buf, unsigned longs)
+{
+    MV_U32 t;
+
+    do 
+    {
+        t = (MV_U32) ((unsigned) buf[3] << 8 | buf[2]) << 16 |
+                      ((unsigned) buf[1] << 8 | buf[0]);
+        *(MV_U32 *) buf = t;
+        buf += 4;
+    } while (--longs);
+}
+#endif
+
+/*
+ * Start MD5 accumulation.  Set bit count to 0 and buffer to mysterious
+ * initialization constants.
+ */
+void    mvMD5Init(MV_MD5_CONTEXT *ctx)
+{
+    ctx->buf[0] = 0x67452301;
+    ctx->buf[1] = 0xefcdab89;
+    ctx->buf[2] = 0x98badcfe;
+    ctx->buf[3] = 0x10325476;
+
+    ctx->bits[0] = 0;
+    ctx->bits[1] = 0;
+}
+
+/*
+ * Update context to reflect the concatenation of another buffer full
+ * of bytes.
+ */
+void    mvMD5Update(MV_MD5_CONTEXT *ctx, unsigned char const *buf, unsigned len)
+{
+    MV_U32 t;
+
+    /* Update bitcount */
+
+    t = ctx->bits[0];
+    if ((ctx->bits[0] = t + ((MV_U32) len << 3)) < t)
+        ctx->bits[1]++;         /* Carry from low to high */
+    ctx->bits[1] += len >> 29;
+
+    t = (t >> 3) & 0x3f;        /* Bytes already in shsInfo->data */
+
+    /* Handle any leading odd-sized chunks */
+
+    if (t) 
+    {
+        unsigned char *p = (unsigned char *) ctx->in + t;
+
+        t = 64 - t;
+        if (len < t) 
+        {
+            memcpy(p, buf, len);
+            return;
+        }
+        memcpy(p, buf, t);
+        mvByteReverse(ctx->in, MV_MD5_MAC_LEN);
+        mvMD5Transform(ctx->buf, (MV_U32 *) ctx->in);
+        buf += t;
+        len -= t;
+    }
+    /* Process data in 64-byte chunks */
+
+    while (len >= 64) 
+    {
+        memcpy(ctx->in, buf, 64);
+        mvByteReverse(ctx->in, MV_MD5_MAC_LEN);
+        mvMD5Transform(ctx->buf, (MV_U32 *) ctx->in);
+        buf += 64;
+        len -= 64;
+    }
+
+    /* Handle any remaining bytes of data. */
+
+    memcpy(ctx->in, buf, len);
+}
+
+/*
+ * Final wrapup - pad to 64-byte boundary with the bit pattern
+ * 1 0* (64-bit count of bits processed, MSB-first)
+ */
+void    mvMD5Final(unsigned char digest[MV_MD5_MAC_LEN], MV_MD5_CONTEXT *ctx)
+{
+    unsigned count;
+    unsigned char *p;
+
+    /* Compute number of bytes mod 64 */
+    count = (ctx->bits[0] >> 3) & 0x3F;
+
+    /* Set the first char of padding to 0x80.  This is safe since there is
+       always at least one byte free */
+    p = ctx->in + count;
+    *p++ = 0x80;
+
+    /* Bytes of padding needed to make 64 bytes */
+    count = 64 - 1 - count;
+
+    /* Pad out to 56 mod 64 */
+    if (count < 8) 
+    {
+        /* Two lots of padding:  Pad the first block to 64 bytes */
+        memset(p, 0, count);
+        mvByteReverse(ctx->in, MV_MD5_MAC_LEN);
+        mvMD5Transform(ctx->buf, (MV_U32 *) ctx->in);
+
+        /* Now fill the next block with 56 bytes */
+        memset(ctx->in, 0, 56);
+    } 
+    else 
+    {
+        /* Pad block to 56 bytes */
+        memset(p, 0, count - 8);
+    }
+    mvByteReverse(ctx->in, 14);
+
+    /* Append length in bits and transform */
+    ((MV_U32 *) ctx->in)[14] = ctx->bits[0];
+    ((MV_U32 *) ctx->in)[15] = ctx->bits[1];
+
+    mvMD5Transform(ctx->buf, (MV_U32 *) ctx->in);
+    mvByteReverse((unsigned char *) ctx->buf, 4);
+    memcpy(digest, ctx->buf, MV_MD5_MAC_LEN);
+    memset(ctx, 0, sizeof(ctx));        /* In case it's sensitive */
+}
+
+/* The four core functions - F1 is optimized somewhat */
+
+/* #define F1(x, y, z) (x & y | ~x & z) */
+#define F1(x, y, z) (z ^ (x & (y ^ z)))
+#define F2(x, y, z) F1(z, x, y)
+#define F3(x, y, z) (x ^ y ^ z)
+#define F4(x, y, z) (y ^ (x | ~z))
+
+/* This is the central step in the MD5 algorithm. */
+#define MD5STEP(f, w, x, y, z, data, s) \
+        ( w += f(x, y, z) + data,  w = w<<s | w>>(32-s),  w += x )
+
+/*
+ * The core of the MD5 algorithm, this alters an existing MD5 hash to
+ * reflect the addition of 16 longwords of new data.  MD5Update blocks
+ * the data and converts bytes into longwords for this routine.
+ */
+static void mvMD5Transform(MV_U32 buf[4], MV_U32 const in[MV_MD5_MAC_LEN])
+{
+    register MV_U32 a, b, c, d;
+
+    a = buf[0];
+    b = buf[1];
+    c = buf[2];
+    d = buf[3];
+
+    MD5STEP(F1, a, b, c, d, in[0] + 0xd76aa478, 7);
+    MD5STEP(F1, d, a, b, c, in[1] + 0xe8c7b756, 12);
+    MD5STEP(F1, c, d, a, b, in[2] + 0x242070db, 17);
+    MD5STEP(F1, b, c, d, a, in[3] + 0xc1bdceee, 22);
+    MD5STEP(F1, a, b, c, d, in[4] + 0xf57c0faf, 7);
+    MD5STEP(F1, d, a, b, c, in[5] + 0x4787c62a, 12);
+    MD5STEP(F1, c, d, a, b, in[6] + 0xa8304613, 17);
+    MD5STEP(F1, b, c, d, a, in[7] + 0xfd469501, 22);
+    MD5STEP(F1, a, b, c, d, in[8] + 0x698098d8, 7);
+    MD5STEP(F1, d, a, b, c, in[9] + 0x8b44f7af, 12);
+    MD5STEP(F1, c, d, a, b, in[10] + 0xffff5bb1, 17);
+    MD5STEP(F1, b, c, d, a, in[11] + 0x895cd7be, 22);
+    MD5STEP(F1, a, b, c, d, in[12] + 0x6b901122, 7);
+    MD5STEP(F1, d, a, b, c, in[13] + 0xfd987193, 12);
+    MD5STEP(F1, c, d, a, b, in[14] + 0xa679438e, 17);
+    MD5STEP(F1, b, c, d, a, in[15] + 0x49b40821, 22);
+
+    MD5STEP(F2, a, b, c, d, in[1] + 0xf61e2562, 5);
+    MD5STEP(F2, d, a, b, c, in[6] + 0xc040b340, 9);
+    MD5STEP(F2, c, d, a, b, in[11] + 0x265e5a51, 14);
+    MD5STEP(F2, b, c, d, a, in[0] + 0xe9b6c7aa, 20);
+    MD5STEP(F2, a, b, c, d, in[5] + 0xd62f105d, 5);
+    MD5STEP(F2, d, a, b, c, in[10] + 0x02441453, 9);
+    MD5STEP(F2, c, d, a, b, in[15] + 0xd8a1e681, 14);
+    MD5STEP(F2, b, c, d, a, in[4] + 0xe7d3fbc8, 20);
+    MD5STEP(F2, a, b, c, d, in[9] + 0x21e1cde6, 5);
+    MD5STEP(F2, d, a, b, c, in[14] + 0xc33707d6, 9);
+    MD5STEP(F2, c, d, a, b, in[3] + 0xf4d50d87, 14);
+    MD5STEP(F2, b, c, d, a, in[8] + 0x455a14ed, 20);
+    MD5STEP(F2, a, b, c, d, in[13] + 0xa9e3e905, 5);
+    MD5STEP(F2, d, a, b, c, in[2] + 0xfcefa3f8, 9);
+    MD5STEP(F2, c, d, a, b, in[7] + 0x676f02d9, 14);
+    MD5STEP(F2, b, c, d, a, in[12] + 0x8d2a4c8a, 20);
+
+    MD5STEP(F3, a, b, c, d, in[5] + 0xfffa3942, 4);
+    MD5STEP(F3, d, a, b, c, in[8] + 0x8771f681, 11);
+    MD5STEP(F3, c, d, a, b, in[11] + 0x6d9d6122, 16);
+    MD5STEP(F3, b, c, d, a, in[14] + 0xfde5380c, 23);
+    MD5STEP(F3, a, b, c, d, in[1] + 0xa4beea44, 4);
+    MD5STEP(F3, d, a, b, c, in[4] + 0x4bdecfa9, 11);
+    MD5STEP(F3, c, d, a, b, in[7] + 0xf6bb4b60, 16);
+    MD5STEP(F3, b, c, d, a, in[10] + 0xbebfbc70, 23);
+    MD5STEP(F3, a, b, c, d, in[13] + 0x289b7ec6, 4);
+    MD5STEP(F3, d, a, b, c, in[0] + 0xeaa127fa, 11);
+    MD5STEP(F3, c, d, a, b, in[3] + 0xd4ef3085, 16);
+    MD5STEP(F3, b, c, d, a, in[6] + 0x04881d05, 23);
+    MD5STEP(F3, a, b, c, d, in[9] + 0xd9d4d039, 4);
+    MD5STEP(F3, d, a, b, c, in[12] + 0xe6db99e5, 11);
+    MD5STEP(F3, c, d, a, b, in[15] + 0x1fa27cf8, 16);
+    MD5STEP(F3, b, c, d, a, in[2] + 0xc4ac5665, 23);
+
+    MD5STEP(F4, a, b, c, d, in[0] + 0xf4292244, 6);
+    MD5STEP(F4, d, a, b, c, in[7] + 0x432aff97, 10);
+    MD5STEP(F4, c, d, a, b, in[14] + 0xab9423a7, 15);
+    MD5STEP(F4, b, c, d, a, in[5] + 0xfc93a039, 21);
+    MD5STEP(F4, a, b, c, d, in[12] + 0x655b59c3, 6);
+    MD5STEP(F4, d, a, b, c, in[3] + 0x8f0ccc92, 10);
+    MD5STEP(F4, c, d, a, b, in[10] + 0xffeff47d, 15);
+    MD5STEP(F4, b, c, d, a, in[1] + 0x85845dd1, 21);
+    MD5STEP(F4, a, b, c, d, in[8] + 0x6fa87e4f, 6);
+    MD5STEP(F4, d, a, b, c, in[15] + 0xfe2ce6e0, 10);
+    MD5STEP(F4, c, d, a, b, in[6] + 0xa3014314, 15);
+    MD5STEP(F4, b, c, d, a, in[13] + 0x4e0811a1, 21);
+    MD5STEP(F4, a, b, c, d, in[4] + 0xf7537e82, 6);
+    MD5STEP(F4, d, a, b, c, in[11] + 0xbd3af235, 10);
+    MD5STEP(F4, c, d, a, b, in[2] + 0x2ad7d2bb, 15);
+    MD5STEP(F4, b, c, d, a, in[9] + 0xeb86d391, 21);
+
+    buf[0] += a;
+    buf[1] += b;
+    buf[2] += c;
+    buf[3] += d;
+}
+
+void    mvMD5(unsigned char const *buf, unsigned len, unsigned char* digest)
+{
+    MV_MD5_CONTEXT  ctx;
+
+    mvMD5Init(&ctx);
+    mvMD5Update(&ctx, buf, len);
+    mvMD5Final(digest, &ctx);
+}
+
+
+void    mvHmacMd5(unsigned char const* text, int text_len,
+                  unsigned char const* key, int key_len,
+                  unsigned char* digest)
+{
+    int             i;
+    MV_MD5_CONTEXT  ctx;
+    unsigned char   k_ipad[64+1]; /* inner padding - key XORd with ipad */
+    unsigned char   k_opad[64+1]; /* outer padding - key XORd with opad */
+
+    /* start out by storing key in pads */
+    memset(k_ipad, 0, 64);
+    memcpy(k_ipad, key, key_len);
+    memset(k_opad, 0, 64);
+    memcpy(k_opad, key, key_len);
+
+    /* XOR key with ipad and opad values */
+    for (i=0; i<64; i++) 
+    {
+	    k_ipad[i] ^= 0x36;
+	    k_opad[i] ^= 0x5c;
+    }
+
+    /* perform inner MD5 */
+    mvMD5Init(&ctx);                   /* init ctx for 1st pass */
+    mvMD5Update(&ctx, k_ipad, 64);    /* start with inner pad */
+    mvMD5Update(&ctx, text, text_len); /* then text of datagram */
+    mvMD5Final(digest, &ctx);          /* finish up 1st pass */
+
+    /* perform outer MD5 */
+    mvMD5Init(&ctx);                   /* init ctx for 2nd pass */
+    mvMD5Update(&ctx, k_opad, 64);     /* start with outer pad */
+    mvMD5Update(&ctx, digest, 16);     /* then results of 1st hash */
+    mvMD5Final(digest, &ctx);          /* finish up 2nd pass */
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/mvCesaDebug.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/mvCesaDebug.c
@@ -0,0 +1,478 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+        this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "mvDebug.h"
+
+#include "cesa/mvMD5.h"
+#include "cesa/mvSHA1.h"
+
+#include "cesa/mvCesaRegs.h"
+#include "cesa/mvCesa.h"
+#include "cesa/AES/mvAes.h"
+
+static const char*   mvCesaDebugStateStr(MV_CESA_STATE state)
+{
+    switch(state)
+    {
+        case MV_CESA_IDLE:
+            return "Idle";
+
+        case MV_CESA_PENDING:
+            return "Pend";
+
+        case MV_CESA_PROCESS:
+            return "Proc";
+
+        case MV_CESA_READY:
+            return "Ready";
+
+        default:
+            break;
+    }
+    return "Unknown";
+}
+
+static const char*   mvCesaDebugOperStr(MV_CESA_OPERATION oper)
+{
+    switch(oper)
+    {
+        case MV_CESA_MAC_ONLY:
+            return "MacOnly";
+
+        case MV_CESA_CRYPTO_ONLY:
+            return "CryptoOnly";
+
+        case MV_CESA_MAC_THEN_CRYPTO:
+            return "MacCrypto";
+
+        case MV_CESA_CRYPTO_THEN_MAC:
+            return "CryptoMac";
+
+        default:
+            break;
+    }
+    return "Null";
+}
+
+static const char* mvCesaDebugCryptoAlgStr(MV_CESA_CRYPTO_ALG cryptoAlg)
+{
+    switch(cryptoAlg)
+    {
+        case MV_CESA_CRYPTO_DES:
+            return "DES";
+
+        case MV_CESA_CRYPTO_3DES:
+            return "3DES";
+
+        case MV_CESA_CRYPTO_AES:
+            return "AES";
+
+        default:
+            break;
+    }
+    return "Null";
+}
+
+static const char* mvCesaDebugMacModeStr(MV_CESA_MAC_MODE macMode)
+{
+    switch(macMode)
+    {
+        case MV_CESA_MAC_MD5:
+            return "MD5";
+
+        case MV_CESA_MAC_SHA1:
+            return "SHA1";
+
+        case MV_CESA_MAC_HMAC_MD5:
+            return "HMAC-MD5";
+
+        case MV_CESA_MAC_HMAC_SHA1:
+            return "HMAC_SHA1";
+
+        default:
+            break;
+    }
+    return "Null";
+}
+
+void    mvCesaDebugCmd(MV_CESA_COMMAND* pCmd,  int mode)
+{
+    mvOsPrintf("pCmd=%p, pReqPrv=%p, pSrc=%p, pDst=%p, pCB=%p, sid=%d\n",
+                pCmd, pCmd->pReqPrv, pCmd->pSrc, pCmd->pDst,
+                pCmd->pFuncCB, pCmd->sessionId);
+    mvOsPrintf("isUser=%d, ivOffs=%d, crOffs=%d, crLen=%d, digest=%d, macOffs=%d, macLen=%d\n",
+                pCmd->ivFromUser, pCmd->ivOffset, pCmd->cryptoOffset, pCmd->cryptoLength,
+                pCmd->digestOffset, pCmd->macOffset, pCmd->macLength);
+}
+
+/* no need to use in tool */
+void     mvCesaDebugMbuf(const char* str, MV_CESA_MBUF *pMbuf, int offset, int size)
+{
+    int frag, len, fragOffset;
+
+    if(str != NULL)
+        mvOsPrintf("%s: pMbuf=%p, numFrags=%d, mbufSize=%d\n",
+                    str, pMbuf, pMbuf->numFrags, pMbuf->mbufSize);
+
+    frag = mvCesaMbufOffset(pMbuf, offset, &fragOffset);
+    if(frag == MV_INVALID)
+    {
+        mvOsPrintf("CESA Mbuf Error: offset (%d) out of range\n", offset);
+        return;
+    }
+
+    for(; frag<pMbuf->numFrags; frag++)
+    {
+        mvOsPrintf("#%2d. bufVirt=%p, bufSize=%d\n",
+                    frag, pMbuf->pFrags[frag].bufVirtPtr,
+                    pMbuf->pFrags[frag].bufSize);
+        if(size > 0)
+        {
+            len = MV_MIN(pMbuf->pFrags[frag].bufSize, size);
+            mvDebugMemDump(pMbuf->pFrags[frag].bufVirtPtr+fragOffset, len, 1);
+            size -= len;
+            fragOffset = 0;
+        }
+    }
+}
+
+void    mvCesaDebugRegs(void)
+{
+    mvOsPrintf("\t CESA Registers:\n");
+
+    mvOsPrintf("MV_CESA_CMD_REG                     : 0x%X = 0x%08x\n",
+                MV_CESA_CMD_REG,
+                MV_REG_READ( MV_CESA_CMD_REG ) );
+
+    mvOsPrintf("MV_CESA_CHAN_DESC_OFFSET_REG        : 0x%X = 0x%08x\n",
+                MV_CESA_CHAN_DESC_OFFSET_REG,
+                MV_REG_READ(MV_CESA_CHAN_DESC_OFFSET_REG) );
+
+    mvOsPrintf("MV_CESA_CFG_REG                     : 0x%X = 0x%08x\n",
+                MV_CESA_CFG_REG,
+                MV_REG_READ( MV_CESA_CFG_REG ) );
+
+    mvOsPrintf("MV_CESA_STATUS_REG                  : 0x%X = 0x%08x\n",
+                MV_CESA_STATUS_REG,
+                MV_REG_READ( MV_CESA_STATUS_REG ) );
+
+    mvOsPrintf("MV_CESA_ISR_CAUSE_REG               : 0x%X = 0x%08x\n",
+                MV_CESA_ISR_CAUSE_REG,
+                MV_REG_READ( MV_CESA_ISR_CAUSE_REG ) );
+
+    mvOsPrintf("MV_CESA_ISR_MASK_REG                : 0x%X = 0x%08x\n",
+                MV_CESA_ISR_MASK_REG,
+                MV_REG_READ( MV_CESA_ISR_MASK_REG ) );
+#if (MV_CESA_VERSION >= 2)
+    mvOsPrintf("MV_CESA_TDMA_CTRL_REG               : 0x%X = 0x%08x\n", 
+                MV_CESA_TDMA_CTRL_REG, 
+                MV_REG_READ( MV_CESA_TDMA_CTRL_REG ) );
+
+    mvOsPrintf("MV_CESA_TDMA_BYTE_COUNT_REG         : 0x%X = 0x%08x\n", 
+                MV_CESA_TDMA_BYTE_COUNT_REG, 
+                MV_REG_READ( MV_CESA_TDMA_BYTE_COUNT_REG ) );
+
+    mvOsPrintf("MV_CESA_TDMA_SRC_ADDR_REG           : 0x%X = 0x%08x\n", 
+                MV_CESA_TDMA_SRC_ADDR_REG, 
+                MV_REG_READ( MV_CESA_TDMA_SRC_ADDR_REG ) );
+
+    mvOsPrintf("MV_CESA_TDMA_DST_ADDR_REG           : 0x%X = 0x%08x\n", 
+                MV_CESA_TDMA_DST_ADDR_REG, 
+                MV_REG_READ( MV_CESA_TDMA_DST_ADDR_REG ) );
+
+    mvOsPrintf("MV_CESA_TDMA_NEXT_DESC_PTR_REG      : 0x%X = 0x%08x\n", 
+                MV_CESA_TDMA_NEXT_DESC_PTR_REG, 
+                MV_REG_READ( MV_CESA_TDMA_NEXT_DESC_PTR_REG ) );
+
+    mvOsPrintf("MV_CESA_TDMA_CURR_DESC_PTR_REG      : 0x%X = 0x%08x\n", 
+                MV_CESA_TDMA_CURR_DESC_PTR_REG, 
+                MV_REG_READ( MV_CESA_TDMA_CURR_DESC_PTR_REG ) );
+
+    mvOsPrintf("MV_CESA_TDMA_ERROR_CAUSE_REG        : 0x%X = 0x%08x\n", 
+                MV_CESA_TDMA_ERROR_CAUSE_REG, 
+                MV_REG_READ( MV_CESA_TDMA_ERROR_CAUSE_REG ) );
+
+    mvOsPrintf("MV_CESA_TDMA_ERROR_MASK_REG         : 0x%X = 0x%08x\n", 
+                MV_CESA_TDMA_ERROR_MASK_REG, 
+                MV_REG_READ( MV_CESA_TDMA_ERROR_CAUSE_REG ) );
+
+#endif
+}
+
+void    mvCesaDebugStatus(void)
+{
+    mvOsPrintf("\n\t CESA Status\n\n");
+
+    mvOsPrintf("pReqQ=%p, qDepth=%d, reqSize=%u bytes, qRes=%d\n",
+                pCesaReqFirst, cesaQueueDepth, sizeof(MV_CESA_REQ),
+                cesaReqResources);
+
+    mvOsPrintf("pSAD=%p, maxSA=%d, sizeSA=%u bytes\n",
+                pCesaSAD, cesaMaxSA, sizeof(MV_CESA_SA));
+
+    mvOsPrintf("\n");
+
+    mvCesaDebugRegs();
+    mvCesaDebugStats();
+    mvCesaDebugStatsClear();
+}
+
+void    mvCesaDebugDescriptor(MV_CESA_DESC* pDesc)
+{
+    mvOsPrintf("config=0x%08x, crSrcOffs=0x%04x, crDstOffs=0x%04x\n",
+            pDesc->config, pDesc->cryptoSrcOffset, pDesc->cryptoDstOffset);
+
+    mvOsPrintf("crLen=0x%04x, crKeyOffs=0x%04x, ivOffs=0x%04x, ivBufOffs=0x%04x\n",
+            pDesc->cryptoDataLen, pDesc->cryptoKeyOffset,
+            pDesc->cryptoIvOffset, pDesc->cryptoIvBufOffset);
+
+    mvOsPrintf("macSrc=0x%04x, digest=0x%04x, macLen=0x%04x, inIv=0x%04x, outIv=0x%04x\n",
+            pDesc->macSrcOffset, pDesc->macDigestOffset, pDesc->macDataLen,
+            pDesc->macInnerIvOffset, pDesc->macOuterIvOffset);
+}
+
+void    mvCesaDebugQueue(int mode)
+{
+    mvOsPrintf("\n\t CESA Request Queue:\n\n");
+
+    mvOsPrintf("pFirstReq=%p, pLastReq=%p, qDepth=%d, reqSize=%u bytes\n",
+                pCesaReqFirst, pCesaReqLast, cesaQueueDepth, sizeof(MV_CESA_REQ));
+
+    mvOsPrintf("pEmpty=%p, pProcess=%p, qResources=%d\n",
+                pCesaReqEmpty, pCesaReqProcess,
+                cesaReqResources);
+
+    if(mode != 0)
+    {
+        int             count = 0;
+        MV_CESA_REQ*    pReq = pCesaReqFirst;
+
+        for(count=0; count<cesaQueueDepth; count++)
+        {
+            /* Print out requsts */
+            mvOsPrintf("%02d. pReq=%p, state=%s, frag=0x%x, pCmd=%p, pDma=%p, pDesc=%p\n",
+                count, pReq, mvCesaDebugStateStr(pReq->state),
+                pReq->fragMode, pReq->pCmd, pReq->dma[0].pDmaFirst, &pReq->pCesaDesc[0]);
+            if(pReq->fragMode != MV_CESA_FRAG_NONE)
+            {
+                int frag;
+
+                mvOsPrintf("pFrags=%p, num=%d, next=%d, bufOffset=%d, cryptoSize=%d, macSize=%d\n",
+                            &pReq->frags, pReq->frags.numFrag, pReq->frags.nextFrag,
+                            pReq->frags.bufOffset, pReq->frags.cryptoSize, pReq->frags.macSize);
+                for(frag=0; frag<pReq->frags.numFrag; frag++)
+                {
+                    mvOsPrintf("#%d: pDmaFirst=%p, pDesc=%p\n", frag,
+                                pReq->dma[frag].pDmaFirst, &pReq->pCesaDesc[frag]);
+                }
+            }
+            if(mode > 1)
+            {
+                /* Print out Command */
+                mvCesaDebugCmd(pReq->pCmd, mode);
+
+                /* Print out Descriptor */
+                mvCesaDebugDescriptor(&pReq->pCesaDesc[0]);
+            }
+            pReq++;
+        }
+    }
+}
+
+
+void    mvCesaDebugSramSA(MV_CESA_SRAM_SA* pSramSA, int mode)
+{
+    if(pSramSA == NULL)
+    {
+        mvOsPrintf("cesaSramSA: Unexpected pSramSA=%p\n", pSramSA);
+        return;
+    }
+    mvOsPrintf("pSramSA=%p, sizeSramSA=%u bytes\n",
+                pSramSA, sizeof(MV_CESA_SRAM_SA));
+
+    if(mode != 0)
+    {
+        mvOsPrintf("cryptoKey=%p, maxCryptoKey=%d bytes\n",
+                    pSramSA->cryptoKey, MV_CESA_MAX_CRYPTO_KEY_LENGTH);
+        mvDebugMemDump(pSramSA->cryptoKey, MV_CESA_MAX_CRYPTO_KEY_LENGTH, 1);
+
+        mvOsPrintf("macInnerIV=%p, maxInnerIV=%d bytes\n",
+                    pSramSA->macInnerIV, MV_CESA_MAX_DIGEST_SIZE);
+        mvDebugMemDump(pSramSA->macInnerIV, MV_CESA_MAX_DIGEST_SIZE, 1);
+
+        mvOsPrintf("macOuterIV=%p, maxOuterIV=%d bytes\n",
+                    pSramSA->macOuterIV, MV_CESA_MAX_DIGEST_SIZE);
+        mvDebugMemDump(pSramSA->macOuterIV, MV_CESA_MAX_DIGEST_SIZE, 1);
+    }
+}
+
+void    mvCesaDebugSA(short sid, int mode)
+{
+    MV_CESA_OPERATION   oper;
+    MV_CESA_DIRECTION   dir;
+    MV_CESA_CRYPTO_ALG  cryptoAlg;
+    MV_CESA_CRYPTO_MODE cryptoMode;
+    MV_CESA_MAC_MODE    macMode;
+    MV_CESA_SA*         pSA = &pCesaSAD[sid];
+
+    if( (pSA->valid) || ((pSA->count != 0) && (mode > 0)) || (mode >= 2) )
+    {
+        mvOsPrintf("\n\nCESA SA Entry #%d (%p) - %s (count=%d)\n",
+                    sid, pSA,
+                    pSA->valid ? "Valid" : "Invalid", pSA->count);
+
+        oper = (pSA->config & MV_CESA_OPERATION_MASK) >> MV_CESA_OPERATION_OFFSET;
+        dir  = (pSA->config & MV_CESA_DIRECTION_MASK) >> MV_CESA_DIRECTION_BIT;
+        mvOsPrintf("%s - %s ", mvCesaDebugOperStr(oper),
+                    (dir == MV_CESA_DIR_ENCODE) ? "Encode" : "Decode");
+        if(oper != MV_CESA_MAC_ONLY)
+        {
+            cryptoAlg = (pSA->config & MV_CESA_CRYPTO_ALG_MASK) >> MV_CESA_CRYPTO_ALG_OFFSET;
+            cryptoMode = (pSA->config & MV_CESA_CRYPTO_MODE_MASK) >> MV_CESA_CRYPTO_MODE_BIT;
+            mvOsPrintf("- %s - %s ", mvCesaDebugCryptoAlgStr(cryptoAlg),
+                        (cryptoMode == MV_CESA_CRYPTO_ECB) ? "ECB" : "CBC");
+        }
+        if(oper != MV_CESA_CRYPTO_ONLY)
+        {
+            macMode = (pSA->config & MV_CESA_MAC_MODE_MASK) >> MV_CESA_MAC_MODE_OFFSET;
+            mvOsPrintf("- %s ", mvCesaDebugMacModeStr(macMode));
+        }
+        mvOsPrintf("\n");
+
+        if(mode > 0)
+        {
+            mvOsPrintf("config=0x%08x, cryptoKeySize=%d, digestSize=%d\n",
+                        pCesaSAD[sid].config, pCesaSAD[sid].cryptoKeyLength,
+                        pCesaSAD[sid].digestSize);
+
+            mvCesaDebugSramSA(pCesaSAD[sid].pSramSA, mode);
+        }
+    }
+}
+
+
+/**/
+void    mvCesaDebugSram(int mode)
+{
+    mvOsPrintf("\n\t SRAM contents: size=%u, pVirt=%p\n\n",
+            sizeof(MV_CESA_SRAM_MAP), cesaSramVirtPtr);
+
+    mvOsPrintf("\n\t Sram buffer: size=%d, pVirt=%p\n",
+                    MV_CESA_MAX_BUF_SIZE, cesaSramVirtPtr->buf);
+        if(mode != 0)
+            mvDebugMemDump(cesaSramVirtPtr->buf, 64, 1);
+
+    mvOsPrintf("\n");
+    mvOsPrintf("\n\t Sram descriptor: size=%u, pVirt=%p\n",
+                    sizeof(MV_CESA_DESC), &cesaSramVirtPtr->desc);
+    if(mode != 0)
+    {
+        mvOsPrintf("\n");
+        mvCesaDebugDescriptor(&cesaSramVirtPtr->desc);
+    }
+    mvOsPrintf("\n\t Sram IV: size=%d, pVirt=%p\n",
+                    MV_CESA_MAX_IV_LENGTH, &cesaSramVirtPtr->cryptoIV);
+    if(mode != 0)
+    {
+        mvOsPrintf("\n");
+        mvDebugMemDump(cesaSramVirtPtr->cryptoIV, MV_CESA_MAX_IV_LENGTH, 1);
+    }
+    mvOsPrintf("\n");
+    mvCesaDebugSramSA(&cesaSramVirtPtr->sramSA, 0);
+}
+
+void    mvCesaDebugSAD(int mode)
+{
+    int sid;
+
+    mvOsPrintf("\n\t Cesa SAD status: pSAD=%p, maxSA=%d\n",
+                pCesaSAD, cesaMaxSA);
+
+    for(sid=0; sid<cesaMaxSA; sid++)
+    {
+        mvCesaDebugSA(sid, mode);
+    }
+}
+
+void    mvCesaDebugStats(void)
+{
+    mvOsPrintf("\n\t Cesa Statistics\n");
+
+    mvOsPrintf("Opened=%u, Closed=%u\n",
+                cesaStats.openedCount, cesaStats.closedCount);
+    mvOsPrintf("Req=%u, maxReq=%u, frags=%u, start=%u\n",
+                cesaStats.reqCount, cesaStats.maxReqCount,
+                cesaStats.fragCount, cesaStats.startCount);
+
+    mvOsPrintf("\n");
+    mvOsPrintf("proc=%u, ready=%u, notReady=%u\n",
+                cesaStats.procCount, cesaStats.readyCount, cesaStats.notReadyCount);
+}
+
+void    mvCesaDebugStatsClear(void)
+{
+    memset(&cesaStats, 0, sizeof(cesaStats));
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/mvSHA1.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/mvSHA1.h
@@ -0,0 +1,94 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __mvSHA1_h__
+#define __mvSHA1_h__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define MV_SHA1_MAC_LEN 20
+ 
+ 
+typedef struct 
+{
+    MV_U32 state[5];
+    MV_U32 count[2];
+    MV_U8  buffer[64];
+
+} MV_SHA1_CTX; 
+ 
+void mvSHA1Init(MV_SHA1_CTX *context);
+void mvSHA1Update(MV_SHA1_CTX *context, MV_U8 const *buf, unsigned int len);
+void mvSHA1Final(MV_U8* digest, MV_SHA1_CTX *context);
+
+void mvSHA1(MV_U8 const *buf, unsigned int len, MV_U8* digest);
+  
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* __mvSHA1_h__ */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/mvCesaTest.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/mvCesaTest.c
@@ -0,0 +1,3096 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+        this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvOs.h"
+
+#if defined(MV_VXWORKS)
+
+#include "sysLib.h"
+#include "logLib.h"
+#include "tickLib.h"
+#include "intLib.h"
+#include "config.h"
+
+
+SEM_ID      cesaSemId = NULL;
+SEM_ID      cesaWaitSemId = NULL;
+
+#define CESA_TEST_LOCK(flags)       flags = intLock()
+#define CESA_TEST_UNLOCK(flags)     intUnlock(flags)
+
+#define CESA_TEST_WAIT_INIT()       cesaWaitSemId = semBCreate(SEM_Q_PRIORITY, SEM_EMPTY)
+#define CESA_TEST_WAKE_UP()         semGive(cesaWaitSemId)
+#define CESA_TEST_WAIT(cond, ms)    semTake(cesaWaitSemId, (sysClkRateGet()*ms)/1000)
+
+#define CESA_TEST_TICK_GET()        tickGet()
+#define CESA_TEST_TICK_TO_MS(tick)  (((tick)*1000)/sysClkRateGet())
+
+#elif defined(MV_LINUX)
+
+#include <linux/wait.h>
+wait_queue_head_t   cesaTest_waitq;
+spinlock_t          cesaLock;
+
+#define CESA_TEST_LOCK(flags)       spin_lock_irqsave( &cesaLock, flags)
+#define CESA_TEST_UNLOCK(flags)     spin_unlock_irqrestore( &cesaLock, flags);
+
+#define CESA_TEST_WAIT_INIT()       init_waitqueue_head(&cesaTest_waitq)
+#define CESA_TEST_WAKE_UP()         wake_up(&cesaTest_waitq)
+#define CESA_TEST_WAIT(cond, ms)    wait_event_timeout(cesaTest_waitq, (cond), msecs_to_jiffies(ms))
+
+#define CESA_TEST_TICK_GET()        jiffies
+#define CESA_TEST_TICK_TO_MS(tick)  jiffies_to_msecs(tick)
+
+#elif defined(MV_NETBSD)
+
+#include <sys/param.h>
+#include <sys/kernel.h>
+static int	cesaLock;
+
+#define	CESA_TEST_LOCK(flags)		flags = splnet()
+#define	CESA_TEST_UNLOCK(flags)		splx(flags)
+
+#define	CESA_TEST_WAIT_INIT()		/* nothing */
+#define	CESA_TEST_WAKE_UP()		wakeup(&cesaLock)
+#define	CESA_TEST_WAIT(cond, ms)	\
+do {					\
+	while (!(cond))			\
+		tsleep(&cesaLock, PWAIT, "cesatest",mstohz(ms)); \
+} while (/*CONSTCOND*/0)
+
+#define	CESA_TEST_TICK_GET()		hardclock_ticks
+#define	CESA_TEST_TICK_TO_MS(tick)	((1000/hz)*(tick))
+
+#define	request_irq(i,h,t,n,a)	\
+	!mv_intr_establish((i),IPL_NET,(int(*)(void *))(h),(a))
+
+#else
+#error "Only Linux, VxWorks, or NetBSD OS are supported"
+#endif
+
+#include "mvDebug.h"
+
+#include "mvSysCesaConfig.h"
+#include "boardEnv/mvBoardEnvLib.h"
+#include "ctrlEnv/sys/mvCpuIf.h"
+#include "cntmr/mvCntmr.h"
+#include "cesa/mvCesa.h"
+#include "cesa/mvCesaRegs.h"
+#include "cesa/mvMD5.h"
+#include "cesa/mvSHA1.h"
+
+#if defined(CONFIG_MV646xx)
+#include "marvell_pic.h"
+#endif
+
+#define MV_CESA_USE_TIMER_ID    0
+#define CESA_DEF_BUF_SIZE       1500
+#define CESA_DEF_BUF_NUM        1
+#define CESA_DEF_SESSION_NUM    32
+
+#define CESA_DEF_ITER_NUM       100
+
+#define CESA_DEF_REQ_SIZE       256
+
+
+/* CESA Tests Debug */
+#undef CESA_TEST_DEBUG
+
+#ifdef CESA_TEST_DEBUG
+
+#   define CESA_TEST_DEBUG_PRINT(msg)   mvOsPrintf msg
+#   define CESA_TEST_DEBUG_CODE(code)   code
+
+typedef struct
+{
+    int             type;       /* 0 - isrEmpty, 1 - cesaReadyGet, 2 - cesaAction */
+    MV_U32          timeStamp;
+    MV_U32          cause;
+    MV_U32          realCause;
+    MV_U32          dmaCause;
+    int             resources;
+    MV_CESA_REQ*    pReqReady;
+    MV_CESA_REQ*    pReqEmpty;
+    MV_CESA_REQ*    pReqProcess;
+} MV_CESA_TEST_TRACE;
+
+#define MV_CESA_TEST_TRACE_SIZE      25
+
+static int cesaTestTraceIdx = 0;
+static MV_CESA_TEST_TRACE    cesaTestTrace[MV_CESA_TEST_TRACE_SIZE];
+
+static void cesaTestTraceAdd(int type, MV_U32 cause)
+{
+    cesaTestTrace[cesaTestTraceIdx].type = type;
+    cesaTestTrace[cesaTestTraceIdx].cause = cause;
+    cesaTestTrace[cesaTestTraceIdx].realCause = MV_REG_READ(MV_CESA_ISR_CAUSE_REG);
+    cesaTestTrace[cesaTestTraceIdx].dmaCause = MV_REG_READ(IDMA_CAUSE_REG);
+    cesaTestTrace[cesaTestTraceIdx].resources = cesaReqResources;
+    cesaTestTrace[cesaTestTraceIdx].pReqReady = pCesaReqReady;
+    cesaTestTrace[cesaTestTraceIdx].pReqEmpty = pCesaReqEmpty;
+    cesaTestTrace[cesaTestTraceIdx].pReqProcess = pCesaReqProcess;
+    cesaTestTrace[cesaTestTraceIdx].timeStamp = mvCntmrRead(MV_CESA_USE_TIMER_ID);
+    cesaTestTraceIdx++;
+    if(cesaTestTraceIdx == MV_CESA_TEST_TRACE_SIZE)
+        cesaTestTraceIdx = 0;
+}
+
+#else
+
+#   define CESA_TEST_DEBUG_PRINT(msg)
+#   define CESA_TEST_DEBUG_CODE(code)
+
+#endif /* CESA_TEST_DEBUG */
+
+int                 cesaExpReqId=0;
+int                 cesaCbIter=0;
+
+int                 cesaIdx;
+int                 cesaIteration;
+int                 cesaRateSize;
+int                 cesaReqSize;
+unsigned long       cesaTaskId;
+int                 cesaBufNum;
+int                 cesaBufSize;
+int                 cesaCheckOffset;
+int                 cesaCheckSize;
+int                 cesaCheckMode;
+int                 cesaTestIdx;
+int                 cesaCaseIdx;
+
+
+MV_U32      cesaTestIsrCount = 0;
+MV_U32      cesaTestIsrMissCount = 0;
+
+MV_U32      cesaCryptoError = 0;
+MV_U32      cesaReqIdError  = 0;
+MV_U32      cesaError = 0;
+
+char*       cesaHexBuffer = NULL;
+
+char*       cesaBinBuffer = NULL;
+char*       cesaExpBinBuffer = NULL;
+
+char*       cesaInputHexStr  = NULL;
+char*       cesaOutputHexStr = NULL;
+
+MV_BUF_INFO         cesaReqBufs[CESA_DEF_REQ_SIZE];
+
+MV_CESA_COMMAND*    cesaCmdRing;
+MV_CESA_RESULT      cesaResult;
+
+int                 cesaTestFull = 0;
+
+MV_BOOL             cesaIsReady = MV_FALSE;
+MV_U32              cesaCycles = 0;
+MV_U32              cesaBeginTicks = 0;
+MV_U32              cesaEndTicks = 0;
+MV_U32              cesaRate = 0;
+MV_U32              cesaRateAfterDot = 0;
+
+void 		    *cesaTestOSHandle = NULL;
+
+enum
+{
+    CESA_FAST_CHECK_MODE = 0,
+    CESA_FULL_CHECK_MODE,
+    CESA_NULL_CHECK_MODE,
+    CESA_SHOW_CHECK_MODE,
+    CESA_SW_SHOW_CHECK_MODE,
+    CESA_SW_NULL_CHECK_MODE,
+
+    CESA_MAX_CHECK_MODE
+};
+
+enum
+{
+    DES_TEST_TYPE         = 0,
+    TRIPLE_DES_TEST_TYPE  = 1,
+    AES_TEST_TYPE         = 2,
+    MD5_TEST_TYPE         = 3,
+    SHA_TEST_TYPE         = 4,
+    COMBINED_TEST_TYPE    = 5,
+
+    MAX_TEST_TYPE
+};
+
+/* Tests data base */
+typedef struct
+{
+    short           sid;
+    char            cryptoAlgorithm;    /* DES/3DES/AES */
+    char            cryptoMode;         /* ECB or CBC */
+    char            macAlgorithm;       /* MD5 / SHA1 */
+    char            operation;          /* CRYPTO/HMAC/CRYPTO+HMAC/HMAC+CRYPTO */
+    char            direction;          /* ENCODE(SIGN)/DECODE(VERIFY) */
+    unsigned char*  pCryptoKey;
+    int             cryptoKeySize;
+    unsigned char*  pMacKey;
+    int             macKeySize;
+    const char*     name;
+
+} MV_CESA_TEST_SESSION;
+
+typedef struct
+{
+    MV_CESA_TEST_SESSION*   pSessions;
+    int                     numSessions;
+
+} MV_CESA_TEST_DB_ENTRY;
+
+typedef struct
+{
+    char*           plainHexStr;
+    char*           cipherHexStr;
+    unsigned char*  pCryptoIV;
+    int             cryptoLength;
+    int             macLength;
+    int             digestOffset;
+
+} MV_CESA_TEST_CASE;
+
+typedef struct
+{
+    int     size;
+    const char* outputHexStr;
+
+} MV_CESA_SIZE_TEST;
+
+static unsigned char    cryptoKey1[] = {0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef,
+                                        0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef,
+                                        0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef};
+
+static unsigned char    cryptoKey7[] = {0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef};
+static unsigned char    iv1[]        = {0x12, 0x34, 0x56, 0x78, 0x90, 0xab, 0xcd, 0xef};
+
+
+static unsigned char    cryptoKey2[] = {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+                                        0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F};
+
+static unsigned char    cryptoKey3[] = {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+                                        0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
+                                        0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17};
+
+static unsigned char    cryptoKey4[] = {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+                                        0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
+                                        0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
+                                        0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f};
+
+static unsigned char    cryptoKey5[] = {0x56, 0xe4, 0x7a, 0x38, 0xc5, 0x59, 0x89, 0x74,
+                                        0xbc, 0x46, 0x90, 0x3d, 0xba, 0x29, 0x03, 0x49};
+
+
+static unsigned char    key3des1[]   = {0x01, 0x23, 0x45, 0x67, 0x89, 0xAB, 0xCD, 0xEF,
+                                        0x23, 0x45, 0x67, 0x89, 0xAB, 0xCD, 0xEF, 0x01,
+                                        0x45, 0x67, 0x89, 0xAB, 0xCD, 0xEF, 0x01, 0x23};
+
+/*  Input ASCII string: The quick brown fox jump  */
+static char  plain3des1[]           =   "54686520717566636B2062726F776E20666F78206A756D70";
+static char  cipher3des1[]          =   "A826FD8CE53B855FCCE21C8112256FE668D5C05DD9B6B900";
+
+static unsigned char    key3des2[]  = {0x62, 0x7f, 0x46, 0x0e, 0x08, 0x10, 0x4a, 0x10,
+                                       0x43, 0xcd, 0x26, 0x5d, 0x58, 0x40, 0xea, 0xf1,
+                                       0x31, 0x3e, 0xdf, 0x97, 0xdf, 0x2a, 0x8a, 0x8c};
+
+static unsigned char    iv3des2[]   = {0x8e, 0x29, 0xf7, 0x5e, 0xa7, 0x7e, 0x54, 0x75};
+
+static char  plain3des2[]           = "326a494cd33fe756";
+
+static char  cipher3desCbc2[]       = "8e29f75ea77e5475"
+                                      "b22b8d66de970692";
+
+static unsigned char    key3des3[]  = {0x37, 0xae, 0x5e, 0xbf, 0x46, 0xdf, 0xf2, 0xdc,
+                                       0x07, 0x54, 0xb9, 0x4f, 0x31, 0xcb, 0xb3, 0x85,
+                                       0x5e, 0x7f, 0xd3, 0x6d, 0xc8, 0x70, 0xbf, 0xae};
+
+static unsigned char    iv3des3[]   = {0x3d, 0x1d, 0xe3, 0xcc, 0x13, 0x2e, 0x3b, 0x65};
+
+static char  plain3des3[]           = "84401f78fe6c10876d8ea23094ea5309";
+
+static char  cipher3desCbc3[]       = "3d1de3cc132e3b65"
+                                      "7b1f7c7e3b1c948ebd04a75ffba7d2f5";
+
+static unsigned char    iv5[]        = {0x8c, 0xe8, 0x2e, 0xef, 0xbe, 0xa0, 0xda, 0x3c,
+                                        0x44, 0x69, 0x9e, 0xd7, 0xdb, 0x51, 0xb7, 0xd9};
+
+static unsigned char    aesCtrKey[]  = {0x76, 0x91, 0xBE, 0x03, 0x5E, 0x50, 0x20, 0xA8,
+                                        0xAC, 0x6E, 0x61, 0x85, 0x29, 0xF9, 0xA0, 0xDC};
+
+static unsigned char    mdKey1[]     = {0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b,
+                                        0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b};
+
+static unsigned char    mdKey2[]     = {0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
+                                        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa};
+
+static unsigned char    shaKey1[]    = {0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b,
+                                        0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b,
+                                        0x0b, 0x0b, 0x0b, 0x0b};
+
+static unsigned char    shaKey2[]    = {0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
+                                        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
+                                        0xaa, 0xaa, 0xaa, 0xaa};
+
+static unsigned char    mdKey4[]     = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+                                        0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10};
+
+static unsigned char    shaKey4[]    = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+                                        0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10,
+                                        0x11, 0x12, 0x13, 0x14};
+
+
+static MV_CESA_TEST_SESSION   desTestSessions[] =
+{
+/*000*/ {-1, MV_CESA_CRYPTO_DES, MV_CESA_CRYPTO_ECB,
+             MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY,
+             MV_CESA_DIR_ENCODE,
+             cryptoKey7, sizeof(cryptoKey7)/sizeof(cryptoKey7[0]),
+             NULL, 0,
+             "DES ECB encode",
+        },
+/*001*/ {-1, MV_CESA_CRYPTO_DES, MV_CESA_CRYPTO_ECB,
+             MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY,
+             MV_CESA_DIR_DECODE,
+             cryptoKey7, sizeof(cryptoKey7)/sizeof(cryptoKey7[0]),
+             NULL, 0,
+             "DES ECB decode",
+        },
+/*002*/ {-1, MV_CESA_CRYPTO_DES, MV_CESA_CRYPTO_CBC,
+             MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY,
+             MV_CESA_DIR_ENCODE,
+             cryptoKey7, sizeof(cryptoKey7)/sizeof(cryptoKey7[0]),
+             NULL, 0,
+             "DES CBC encode"
+        },
+/*003*/ {-1, MV_CESA_CRYPTO_DES, MV_CESA_CRYPTO_CBC,
+             MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY,
+             MV_CESA_DIR_DECODE,
+             cryptoKey7, sizeof(cryptoKey7)/sizeof(cryptoKey7[0]),
+             NULL, 0,
+             "DES CBC decode"
+        },
+/*004*/ {-1, MV_CESA_CRYPTO_NULL, MV_CESA_CRYPTO_ECB,
+             MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY,
+             MV_CESA_DIR_ENCODE,
+             NULL, 0, NULL, 0,
+              "NULL Crypto Algorithm encode"
+        },
+};
+
+
+static MV_CESA_TEST_SESSION   tripleDesTestSessions[] =
+{
+/*100*/ {-1, MV_CESA_CRYPTO_3DES, MV_CESA_CRYPTO_ECB,
+             MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY,
+             MV_CESA_DIR_ENCODE,
+             cryptoKey1, sizeof(cryptoKey1)/sizeof(cryptoKey1[0]),
+             NULL, 0,
+             "3DES ECB encode",
+        },
+/*101*/ {-1, MV_CESA_CRYPTO_3DES, MV_CESA_CRYPTO_ECB,
+             MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY,
+             MV_CESA_DIR_DECODE,
+             cryptoKey1, sizeof(cryptoKey1)/sizeof(cryptoKey1[0]),
+             NULL, 0,
+             "3DES ECB decode",
+        },
+/*102*/ {-1, MV_CESA_CRYPTO_3DES, MV_CESA_CRYPTO_CBC,
+             MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY,
+             MV_CESA_DIR_ENCODE,
+             cryptoKey1, sizeof(cryptoKey1)/sizeof(cryptoKey1[0]),
+             NULL, 0,
+             "3DES CBC encode"
+        },
+/*103*/ {-1, MV_CESA_CRYPTO_3DES, MV_CESA_CRYPTO_CBC,
+             MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY,
+             MV_CESA_DIR_DECODE,
+             cryptoKey1, sizeof(cryptoKey1)/sizeof(cryptoKey1[0]),
+             NULL, 0,
+             "3DES CBC decode"
+        },
+/*104*/ {-1, MV_CESA_CRYPTO_3DES, MV_CESA_CRYPTO_ECB,
+             MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY,
+             MV_CESA_DIR_ENCODE,
+             key3des1, sizeof(key3des1),
+             NULL, 0,
+             "3DES ECB encode"
+        },
+/*105*/ {-1, MV_CESA_CRYPTO_3DES, MV_CESA_CRYPTO_CBC,
+             MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY,
+             MV_CESA_DIR_ENCODE,
+             key3des2, sizeof(key3des2),
+             NULL, 0,
+             "3DES ECB encode"
+        },
+/*106*/ {-1, MV_CESA_CRYPTO_3DES, MV_CESA_CRYPTO_CBC,
+             MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY,
+             MV_CESA_DIR_ENCODE,
+             key3des3, sizeof(key3des3),
+             NULL, 0,
+             "3DES ECB encode"
+        },
+};
+
+
+static MV_CESA_TEST_SESSION   aesTestSessions[] =
+{
+/*200*/ {-1, MV_CESA_CRYPTO_AES, MV_CESA_CRYPTO_ECB,
+             MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY,
+             MV_CESA_DIR_ENCODE,
+             cryptoKey2, sizeof(cryptoKey2)/sizeof(cryptoKey2[0]),
+             NULL, 0,
+             "AES-128 ECB encode"
+        },
+/*201*/ {-1, MV_CESA_CRYPTO_AES, MV_CESA_CRYPTO_ECB,
+             MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY,
+             MV_CESA_DIR_DECODE,
+             cryptoKey2, sizeof(cryptoKey2)/sizeof(cryptoKey2[0]),
+             NULL, 0,
+             "AES-128 ECB decode"
+        },
+/*202*/ {-1, MV_CESA_CRYPTO_AES, MV_CESA_CRYPTO_CBC,
+             MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY,
+             MV_CESA_DIR_ENCODE,
+             cryptoKey5, sizeof(cryptoKey5)/sizeof(cryptoKey5[0]),
+             NULL, 0,
+             "AES-128 CBC encode"
+        },
+/*203*/ {-1, MV_CESA_CRYPTO_AES, MV_CESA_CRYPTO_CBC,
+             MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY,
+             MV_CESA_DIR_DECODE,
+             cryptoKey5, sizeof(cryptoKey5)/sizeof(cryptoKey5[0]),
+             NULL, 0,
+             "AES-128 CBC decode"
+        },
+/*204*/ {-1, MV_CESA_CRYPTO_AES, MV_CESA_CRYPTO_ECB,
+             MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY,
+             MV_CESA_DIR_ENCODE,
+             cryptoKey3, sizeof(cryptoKey3)/sizeof(cryptoKey3[0]),
+             NULL, 0,
+             "AES-192 ECB encode"
+        },
+/*205*/ {-1, MV_CESA_CRYPTO_AES, MV_CESA_CRYPTO_ECB,
+             MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY,
+             MV_CESA_DIR_DECODE,
+             cryptoKey3, sizeof(cryptoKey3)/sizeof(cryptoKey3[0]),
+             NULL, 0,
+             "AES-192 ECB decode"
+        },
+/*206*/ {-1, MV_CESA_CRYPTO_AES, MV_CESA_CRYPTO_ECB,
+             MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY,
+             MV_CESA_DIR_ENCODE,
+             cryptoKey4, sizeof(cryptoKey4)/sizeof(cryptoKey4[0]),
+             NULL, 0,
+             "AES-256 ECB encode"
+        },
+/*207*/ {-1, MV_CESA_CRYPTO_AES, MV_CESA_CRYPTO_ECB,
+             MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY,
+             MV_CESA_DIR_DECODE,
+             cryptoKey4, sizeof(cryptoKey4)/sizeof(cryptoKey4[0]),
+             NULL, 0,
+             "AES-256 ECB decode"
+        },
+/*208*/ {-1, MV_CESA_CRYPTO_AES, MV_CESA_CRYPTO_CTR,
+             MV_CESA_MAC_NULL, MV_CESA_CRYPTO_ONLY,
+             MV_CESA_DIR_ENCODE,
+             aesCtrKey, sizeof(aesCtrKey)/sizeof(aesCtrKey[0]),
+             NULL, 0,
+             "AES-128 CTR encode"
+        },
+};
+
+
+static MV_CESA_TEST_SESSION   md5TestSessions[] =
+{
+/*300*/ {-1, MV_CESA_CRYPTO_NULL, MV_CESA_CRYPTO_ECB,
+             MV_CESA_MAC_HMAC_MD5, MV_CESA_MAC_ONLY,
+             MV_CESA_DIR_ENCODE,
+             NULL, 0,
+             mdKey1, sizeof(mdKey1),
+             "HMAC-MD5 Generate Signature"
+        },
+/*301*/ {-1, MV_CESA_CRYPTO_NULL, MV_CESA_CRYPTO_ECB,
+             MV_CESA_MAC_HMAC_MD5, MV_CESA_MAC_ONLY,
+             MV_CESA_DIR_DECODE,
+             NULL, 0,
+             mdKey1, sizeof(mdKey1),
+             "HMAC-MD5 Verify Signature"
+        },
+/*302*/ {-1, MV_CESA_CRYPTO_NULL, MV_CESA_CRYPTO_ECB,
+             MV_CESA_MAC_HMAC_MD5, MV_CESA_MAC_ONLY,
+             MV_CESA_DIR_ENCODE,
+             NULL, 0,
+             mdKey2, sizeof(mdKey2),
+             "HMAC-MD5 Generate Signature"
+        },
+/*303*/ {-1, MV_CESA_CRYPTO_NULL, MV_CESA_CRYPTO_ECB,
+             MV_CESA_MAC_HMAC_MD5, MV_CESA_MAC_ONLY,
+             MV_CESA_DIR_DECODE,
+             NULL, 0,
+             mdKey2, sizeof(mdKey2),
+             "HMAC-MD5 Verify Signature"
+        },
+/*304*/ {-1, MV_CESA_CRYPTO_NULL, MV_CESA_CRYPTO_ECB,
+             MV_CESA_MAC_HMAC_MD5, MV_CESA_MAC_ONLY,
+             MV_CESA_DIR_ENCODE,
+             NULL, 0,
+             mdKey4, sizeof(mdKey4),
+             "HMAC-MD5 Generate Signature"
+        },
+/*305*/ {-1, MV_CESA_CRYPTO_NULL, MV_CESA_CRYPTO_ECB,
+             MV_CESA_MAC_MD5, MV_CESA_MAC_ONLY,
+             MV_CESA_DIR_ENCODE,
+             NULL, 0,
+             NULL, 0,
+             "HASH-MD5 Generate Signature"
+        },
+};
+
+
+static MV_CESA_TEST_SESSION   shaTestSessions[] =
+{
+/*400*/ {-1, MV_CESA_CRYPTO_NULL, MV_CESA_CRYPTO_ECB,
+             MV_CESA_MAC_HMAC_SHA1, MV_CESA_MAC_ONLY,
+             MV_CESA_DIR_ENCODE,
+             NULL, 0,
+             shaKey1, sizeof(shaKey1),
+             "HMAC-SHA1 Generate Signature"
+        },
+/*401*/ {-1, MV_CESA_CRYPTO_NULL, MV_CESA_CRYPTO_ECB,
+             MV_CESA_MAC_HMAC_SHA1, MV_CESA_MAC_ONLY,
+             MV_CESA_DIR_DECODE,
+             NULL, 0,
+             shaKey1, sizeof(shaKey1),
+             "HMAC-SHA1 Verify Signature"
+        },
+/*402*/ {-1, MV_CESA_CRYPTO_NULL, MV_CESA_CRYPTO_ECB,
+             MV_CESA_MAC_HMAC_SHA1, MV_CESA_MAC_ONLY,
+             MV_CESA_DIR_ENCODE,
+             NULL, 0,
+             shaKey2, sizeof(shaKey2),
+             "HMAC-SHA1 Generate Signature"
+        },
+/*403*/ {-1, MV_CESA_CRYPTO_NULL, MV_CESA_CRYPTO_ECB,
+             MV_CESA_MAC_HMAC_SHA1, MV_CESA_MAC_ONLY,
+             MV_CESA_DIR_DECODE,
+             NULL, 0,
+             shaKey2, sizeof(shaKey2),
+             "HMAC-SHA1 Verify Signature"
+        },
+/*404*/ {-1, MV_CESA_CRYPTO_NULL, MV_CESA_CRYPTO_ECB,
+             MV_CESA_MAC_HMAC_SHA1, MV_CESA_MAC_ONLY,
+             MV_CESA_DIR_ENCODE,
+             NULL, 0,
+             shaKey4, sizeof(shaKey4),
+             "HMAC-SHA1 Generate Signature"
+        },
+/*405*/ {-1, MV_CESA_CRYPTO_NULL, MV_CESA_CRYPTO_ECB,
+             MV_CESA_MAC_SHA1, MV_CESA_MAC_ONLY,
+             MV_CESA_DIR_ENCODE,
+             NULL, 0,
+             NULL, 0,
+             "HASH-SHA1 Generate Signature"
+        },
+};
+
+static MV_CESA_TEST_SESSION   combinedTestSessions[] =
+{
+/*500*/ {-1, MV_CESA_CRYPTO_DES, MV_CESA_CRYPTO_ECB,
+             MV_CESA_MAC_HMAC_MD5, MV_CESA_CRYPTO_THEN_MAC,
+             MV_CESA_DIR_ENCODE,
+             cryptoKey1, MV_CESA_DES_KEY_LENGTH,
+             mdKey4, sizeof(mdKey4),
+             "DES + MD5 encode"
+        },
+/*501*/ {-1, MV_CESA_CRYPTO_DES, MV_CESA_CRYPTO_ECB,
+             MV_CESA_MAC_HMAC_SHA1, MV_CESA_CRYPTO_THEN_MAC,
+             MV_CESA_DIR_ENCODE,
+             cryptoKey1, MV_CESA_DES_KEY_LENGTH,
+             shaKey4, sizeof(shaKey4),
+             "DES + SHA1 encode"
+        },
+/*502*/ {-1, MV_CESA_CRYPTO_3DES, MV_CESA_CRYPTO_ECB,
+             MV_CESA_MAC_HMAC_MD5, MV_CESA_CRYPTO_THEN_MAC,
+             MV_CESA_DIR_ENCODE,
+             cryptoKey1, sizeof(cryptoKey1)/sizeof(cryptoKey1[0]),
+             mdKey4, sizeof(mdKey4),
+             "3DES + MD5 encode"
+        },
+/*503*/ {-1, MV_CESA_CRYPTO_3DES, MV_CESA_CRYPTO_ECB,
+             MV_CESA_MAC_HMAC_SHA1, MV_CESA_CRYPTO_THEN_MAC,
+             MV_CESA_DIR_ENCODE,
+             cryptoKey1, sizeof(cryptoKey1)/sizeof(cryptoKey1[0]),
+             shaKey4, sizeof(shaKey4),
+             "3DES + SHA1 encode"
+        },
+/*504*/ {-1, MV_CESA_CRYPTO_3DES, MV_CESA_CRYPTO_CBC,
+             MV_CESA_MAC_HMAC_MD5, MV_CESA_CRYPTO_THEN_MAC,
+             MV_CESA_DIR_ENCODE,
+             cryptoKey1, sizeof(cryptoKey1)/sizeof(cryptoKey1[0]),
+             mdKey4, sizeof(mdKey4),
+             "3DES CBC + MD5 encode"
+        },
+/*505*/ {-1, MV_CESA_CRYPTO_3DES, MV_CESA_CRYPTO_CBC,
+             MV_CESA_MAC_HMAC_SHA1, MV_CESA_CRYPTO_THEN_MAC,
+             MV_CESA_DIR_ENCODE,
+             cryptoKey1, sizeof(cryptoKey1)/sizeof(cryptoKey1[0]),
+             shaKey4, sizeof(shaKey4),
+             "3DES CBC + SHA1 encode"
+        },
+/*506*/ {-1, MV_CESA_CRYPTO_AES, MV_CESA_CRYPTO_CBC,
+             MV_CESA_MAC_HMAC_MD5, MV_CESA_CRYPTO_THEN_MAC,
+             MV_CESA_DIR_ENCODE,
+             cryptoKey5, sizeof(cryptoKey5)/sizeof(cryptoKey5[0]),
+             mdKey4, sizeof(mdKey4),
+             "AES-128 CBC + MD5 encode"
+        },
+/*507*/ {-1, MV_CESA_CRYPTO_AES, MV_CESA_CRYPTO_CBC,
+             MV_CESA_MAC_HMAC_SHA1, MV_CESA_CRYPTO_THEN_MAC,
+             MV_CESA_DIR_ENCODE,
+             cryptoKey5, sizeof(cryptoKey5)/sizeof(cryptoKey5[0]),
+             shaKey4, sizeof(shaKey4),
+             "AES-128 CBC + SHA1 encode"
+        },
+/*508*/ {-1, MV_CESA_CRYPTO_3DES, MV_CESA_CRYPTO_ECB,
+             MV_CESA_MAC_HMAC_MD5, MV_CESA_MAC_THEN_CRYPTO,
+             MV_CESA_DIR_DECODE,
+             cryptoKey1, sizeof(cryptoKey1)/sizeof(cryptoKey1[0]),
+             mdKey4, sizeof(mdKey4),
+             "HMAC-MD5 + 3DES decode"
+        },
+};
+
+
+static MV_CESA_TEST_DB_ENTRY cesaTestsDB[MAX_TEST_TYPE+1] =
+{
+    { desTestSessions,       sizeof(desTestSessions)/sizeof(desTestSessions[0]) },
+    { tripleDesTestSessions, sizeof(tripleDesTestSessions)/sizeof(tripleDesTestSessions[0]) },
+    { aesTestSessions,       sizeof(aesTestSessions)/sizeof(aesTestSessions[0]) },
+    { md5TestSessions,       sizeof(md5TestSessions)/sizeof(md5TestSessions[0]) },
+    { shaTestSessions,       sizeof(shaTestSessions)/sizeof(shaTestSessions[0]) },
+    { combinedTestSessions,  sizeof(combinedTestSessions)/sizeof(combinedTestSessions[0]) },
+    { NULL,                  0 }
+};
+
+
+char  cesaNullPlainHexText[]   = "000000000000000000000000000000000000000000000000";
+
+char  cesaPlainAsciiText[]     = "Now is the time for all ";
+char  cesaPlainHexEbc[]        = "4e6f77206973207468652074696d6520666f7220616c6c20";
+char  cesaCipherHexEcb[]       = "3fa40e8a984d48156a271787ab8883f9893d51ec4b563b53";
+char  cesaPlainHexCbc[]        = "1234567890abcdef4e6f77206973207468652074696d6520666f7220616c6c20";
+char  cesaCipherHexCbc[]       = "1234567890abcdefe5c7cdde872bf27c43e934008c389c0f683788499a7c05f6";
+
+char  cesaAesPlainHexEcb[]     = "000102030405060708090a0b0c0d0e0f";
+char  cesaAes128cipherHexEcb[] = "0a940bb5416ef045f1c39458c653ea5a";
+char  cesaAes192cipherHexEcb[] = "0060bffe46834bb8da5cf9a61ff220ae";
+char  cesaAes256cipherHexEcb[] = "5a6e045708fb7196f02e553d02c3a692";
+
+char  cesaAsciiStr1[]          = "Hi There";
+char  cesaDataHexStr1[]        = "4869205468657265";
+char  cesaHmacMd5digestHex1[]  = "9294727a3638bb1c13f48ef8158bfc9d";
+char  cesaHmacSha1digestHex1[] = "b617318655057264e28bc0b6fb378c8ef146be00";
+char  cesaDataAndMd5digest1[]  = "48692054686572659294727a3638bb1c13f48ef8158bfc9d";
+char  cesaDataAndSha1digest1[] = "4869205468657265b617318655057264e28bc0b6fb378c8ef146be00";
+
+char  cesaAesPlainText[]       = "a0a1a2a3a4a5a6a7a8a9aaabacadaeaf"
+                                 "b0b1b2b3b4b5b6b7b8b9babbbcbdbebf"
+                                 "c0c1c2c3c4c5c6c7c8c9cacbcccdcecf"
+                                 "d0d1d2d3d4d5d6d7d8d9dadbdcdddedf";
+
+char  cesaAes128CipherCbc[]    = "c30e32ffedc0774e6aff6af0869f71aa"
+                                 "0f3af07a9a31a9c684db207eb0ef8e4e"
+                                 "35907aa632c3ffdf868bb7b29d3d46ad"
+                                 "83ce9f9a102ee99d49a53e87f4c3da55";
+
+char  cesaAesIvPlainText[]     = "8ce82eefbea0da3c44699ed7db51b7d9"
+                                 "a0a1a2a3a4a5a6a7a8a9aaabacadaeaf"
+                                 "b0b1b2b3b4b5b6b7b8b9babbbcbdbebf"
+                                 "c0c1c2c3c4c5c6c7c8c9cacbcccdcecf"
+                                 "d0d1d2d3d4d5d6d7d8d9dadbdcdddedf";
+
+char  cesaAes128IvCipherCbc[]  = "8ce82eefbea0da3c44699ed7db51b7d9"
+                                 "c30e32ffedc0774e6aff6af0869f71aa"
+                                 "0f3af07a9a31a9c684db207eb0ef8e4e"
+                                 "35907aa632c3ffdf868bb7b29d3d46ad"
+                                 "83ce9f9a102ee99d49a53e87f4c3da55";
+
+char  cesaAesCtrPlain[]        = "00E0017B27777F3F4A1786F000000001"
+                                 "000102030405060708090A0B0C0D0E0F"
+                                 "101112131415161718191A1B1C1D1E1F"
+                                 "20212223";
+
+char  cesaAesCtrCipher[]       = "00E0017B27777F3F4A1786F000000001"
+                                 "C1CF48A89F2FFDD9CF4652E9EFDB72D7"
+                                 "4540A42BDE6D7836D59A5CEAAEF31053"
+                                 "25B2072F";
+
+
+
+/* Input cesaHmacHex3 is '0xdd' repeated 50 times */
+char  cesaHmacMd5digestHex3[]  = "56be34521d144c88dbb8c733f0e8b3f6";
+char  cesaHmacSha1digestHex3[] = "125d7342b9ac11cd91a39af48aa17b4f63f175d3";
+char  cesaDataHexStr3[50*2+1]          = "";
+char  cesaDataAndMd5digest3[sizeof(cesaDataHexStr3)+sizeof(cesaHmacMd5digestHex3)+8*2+1] = "";
+char  cesaDataAndSha1digest3[sizeof(cesaDataHexStr3)+sizeof(cesaHmacSha1digestHex3)+8*2+1] = "";
+
+/* Ascii string is "abc" */
+char hashHexStr3[] = "616263";
+char hashMd5digest3[] = "900150983cd24fb0d6963f7d28e17f72";
+char hashSha1digest3[] = "a9993e364706816aba3e25717850c26c9cd0d89d";
+
+char hashHexStr80[]     = "31323334353637383930"
+                          "31323334353637383930"
+                          "31323334353637383930"
+                          "31323334353637383930"
+                          "31323334353637383930"
+                          "31323334353637383930"
+                          "31323334353637383930"
+                          "31323334353637383930";
+
+char hashMd5digest80[]           = "57edf4a22be3c955ac49da2e2107b67a";
+
+char tripleDesThenMd5digest80[]  = "b7726a03aad490bd6c5a452a89a1b271";
+char tripleDesThenSha1digest80[] = "b2ddeaca91030eab5b95a234ef2c0f6e738ff883";
+
+char cbc3desThenMd5digest80[]    = "6f463057e1a90e0e91ae505b527bcec0";
+char cbc3desThenSha1digest80[]   = "1b002ed050be743aa98860cf35659646bb8efcc0";
+
+char cbcAes128ThenMd5digest80[]  = "6b6e863ac5a71d15e3e9b1c86c9ba05f";
+char cbcAes128ThenSha1digest80[] = "13558472d1fc1c90dffec6e5136c7203452d509b";
+
+
+static MV_CESA_TEST_CASE  cesaTestCases[] =
+{
+ /*     plainHexStr          cipherHexStr               IV    crypto  mac     digest */
+ /*                                                           Length  Length  Offset */
+ /*0*/ { NULL,               NULL,                      NULL,   0,      0,      -1  },
+ /*1*/ { cesaPlainHexEbc,    cesaCipherHexEcb,          NULL,   24,     0,      -1  },
+ /*2*/ { cesaPlainHexCbc,    cesaCipherHexCbc,          NULL,   24,     0,      -1  },
+ /*3*/ { cesaAesPlainHexEcb, cesaAes128cipherHexEcb,    NULL,   16,     0,      -1  },
+ /*4*/ { cesaAesPlainHexEcb, cesaAes192cipherHexEcb,    NULL,   16,     0,      -1  },
+ /*5*/ { cesaAesPlainHexEcb, cesaAes256cipherHexEcb,    NULL,   16,     0,      -1  },
+ /*6*/ { cesaDataHexStr1,    cesaHmacMd5digestHex1,     NULL,   0,      8,      -1  },
+ /*7*/ { NULL,               cesaDataAndMd5digest1,     NULL,   0,      8,      -1  },
+ /*8*/ { cesaDataHexStr3,    cesaHmacMd5digestHex3,     NULL,   0,      50,     -1  },
+ /*9*/ { NULL,               cesaDataAndMd5digest3,     NULL,   0,      50,     -1  },
+/*10*/ { cesaAesPlainText,   cesaAes128IvCipherCbc,     iv5,    64,     0,      -1  },
+/*11*/ { cesaDataHexStr1,    cesaHmacSha1digestHex1,    NULL,   0,      8,      -1  },
+/*12*/ { NULL,               cesaDataAndSha1digest1,    NULL,   0,      8,      -1  },
+/*13*/ { cesaDataHexStr3,    cesaHmacSha1digestHex3,    NULL,   0,      50,     -1  },
+/*14*/ { NULL,               cesaDataAndSha1digest3,    NULL,   0,      50,     -1  },
+/*15*/ { hashHexStr3,        hashMd5digest3,            NULL,   0,      3,      -1  },
+/*16*/ { hashHexStr3,        hashSha1digest3,           NULL,   0,      3,      -1  },
+/*17*/ { hashHexStr80,       tripleDesThenMd5digest80,  NULL,   80,     80,     -1  },
+/*18*/ { hashHexStr80,       tripleDesThenSha1digest80, NULL,   80,     80,     -1  },
+/*19*/ { hashHexStr80,       cbc3desThenMd5digest80,    iv1,    80,     80,     -1  },
+/*20*/ { hashHexStr80,       cbc3desThenSha1digest80,   iv1,    80,     80,     -1  },
+/*21*/ { hashHexStr80,       cbcAes128ThenMd5digest80,  iv5,    80,     80,     -1  },
+/*22*/ { hashHexStr80,       cbcAes128ThenSha1digest80, iv5,    80,     80,     -1  },
+/*23*/ { cesaAesCtrPlain,    cesaAesCtrCipher,          NULL,   36,     0,      -1  },
+/*24*/ { cesaAesIvPlainText, cesaAes128IvCipherCbc,     NULL,   64,     0,      -1  },
+/*25*/ { plain3des1,         cipher3des1,               NULL,   0,      0,      -1  },
+/*26*/ { plain3des2,         cipher3desCbc2,            iv3des2,0,      0,      -1  },
+/*27*/ { plain3des3,         cipher3desCbc3,            iv3des3,0,      0,      -1  },
+};
+
+
+/* Key         = 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
+ *               0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa
+ * Input 0xdd repeated "size" times
+ */
+static MV_CESA_SIZE_TEST     mdMultiSizeTest302[] =
+{
+    { 80,   "7a031a640c14a4872814930b1ef3a5b2" },
+    { 512,  "5488e6c5a14dc72a79f28312ca5b939b" },
+    { 1000, "d00814f586a8b78a05724239d2531821" },
+    { 1001, "bf07df7b7f49d3f5b5ecacd4e9e63281" },
+    { 1002, "1ed4a1a802e87817a819d4e37bb4d0f7" },
+    { 1003, "5972ab64a4f265ee371dac2f2f137f90" },
+    { 1004, "71f95e7ec3aa7df2548e90898abdb28e" },
+    { 1005, "e082790b4857fcfc266e92e59e608814" },
+    { 1006, "9500f02fd8ac7fde8b10e4fece9a920d" },
+    { 1336, "e42edcce57d0b75b01aa09d71427948b" },
+    { 1344, "bb5454ada0deb49ba0a97ffd60f57071" },
+    { 1399, "0f44d793e744b24d53f44f295082ee8c" },
+    { 1400, "359de8a03a9b707928c6c60e0e8d79f1" },
+    { 1401, "e913858b484cbe2b384099ea88d8855b" },
+    { 1402, "d9848a164af53620e0540c1d7d87629e" },
+    { 1403, "0c9ee1c2c9ef45e9b625c26cbaf3e822" },
+    { 1404, "12edd4f609416e3c936170360561b064" },
+    { 1405, "7fc912718a05446395345009132bf562" },
+    { 1406, "882f17425e579ff0d85a91a59f308aa0" },
+    { 1407, "005cae408630a2fb5db82ad9db7e59da" },
+    { 1408, "64655f8b404b3fea7a3e3e609bc5088f" },
+    { 1409, "4a145284a7f74e01b6bb1a0ec6a0dd80" },
+    { 2048, "67caf64475650732def374ebb8bde3fd" },
+    { 2049, "6c84f11f472825f7e6cd125c2981884b" },
+    { 2050, "8999586754a73a99efbe4dbad2816d41" },
+    { 2051, "ba6946b610e098d286bc81091659dfff" },
+    { 2052, "d0afa01c92d4d13def2b024f36faed83" },
+    { 3072, "61d8beac61806afa2585d74a9a0e6974" },
+    { 3074, "f6501a28dcc24d1e4770505c51a87ed3" },
+    { 3075, "ea4a6929be67e33e61ff475369248b73" },
+    { 4048, "aa8c4d68f282a07e7385acdfa69f4bed" },
+    { 4052, "afb5ed2c0e1d430ea59e59ed5ed6b18a" },
+    { 4058, "9e8553f9bdd43aebe0bd729f0e600c99" },
+    { 6144, "f628f3e5d183fe5cdd3a5abee39cf872" },
+    { 6150, "89a3efcea9a2f25f919168ad4a1fd292" },
+    { 6400, "cdd176b7fb747873efa4da5e32bdf88f" },
+    { 6528, "b1d707b027354aca152c45ee559ccd3f" },
+    { 8192, "c600ea4429ac47f9941f09182166e51a" },
+    {16384, "16e8754bfbeb4c649218422792267a37" },
+    {18432, "0fd0607521b0aa8b52219cfbe215f63e" },
+    { 0, NULL },
+};
+
+/* Key         = 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+ *               0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10
+ * InputHexStr = "31323334353637383930" (ASCII = "1234567890")
+ */
+static MV_CESA_SIZE_TEST     mdMultiSizeTest304[] =
+{
+    { 80,   "a456c4723fee6068530af5a2afa71627" },
+    { 512,  "f85c2a2344f5de68b432208ad13e5794" },
+    { 1000, "35464d6821fd4a293a41eb84e274c8c5" },
+    { 1001, "c08eedbdce60cceb54bc2d732bb32c8b" },
+    { 1002, "5664f71800c011cc311cb6943339c1b8" },
+    { 1003, "779c723b044c585dc7802b13e8501bdc" },
+    { 1004, "55e500766a2c307bc5c5fdd15e4cacd4" },
+    { 1005, "d5f978954f5c38529d1679d2b714f068" },
+    { 1006, "cd3efc827ce628b7281b72172693abf9" },
+    { 1336, "6f04479910785878ae6335b8d1e87edf" },
+    { 1344, "b6d27b50c2bce1ba2a8e1b5cc4324368" },
+    { 1399, "65f70a1d4c86e5eaeb0704c8a7816795" },
+    { 1400, "3394b5adc4cb3ff98843ca260a44a88a" },
+    { 1401, "3a06f3582033a66a4e57e0603ce94e74" },
+    { 1402, "e4d97f5ed51edc48abfa46eeb5c31752" },
+    { 1403, "3d05e40b080ee3bedf293cb87b7140e7" },
+    { 1404, "8cf294fc3cd153ab18dccb2a52cbf244" },
+    { 1405, "d1487bd42f6edd9b4dab316631159221" },
+    { 1406, "0527123b6bf6936cf5d369dc18c6c70f" },
+    { 1407, "3224a06639db70212a0cd1ae1fcc570a" },
+    { 1408, "a9e13335612c0356f5e2c27086e86c43" },
+    { 1409, "a86d1f37d1ed8a3552e9a4f04dceea98" },
+    { 2048, "396905c9b961cd0f6152abfb69c4449c" },
+    { 2049, "49f39bff85d9dcf059fadb89efc4a70f" },
+    { 2050, "3a2b4823bc4d0415656550226a63e34a" },
+    { 2051, "dec60580d406c782540f398ad0bcc7e0" },
+    { 2052, "32f76610a14310309eb748fe025081bf" },
+    { 3072, "45edc1a42bf9d708a621076b63b774da" },
+    { 3074, "9be1b333fe7c0c9f835fb369dc45f778" },
+    { 3075, "8c06fcac7bd0e7b7a17fd6508c09a549" },
+    { 4048, "0ddaef848184bf0ad98507a10f1e90e4" },
+    { 4052, "81976bcaeb274223983996c137875cb8" },
+    { 4058, "0b0a7a1c82bc7cbc64d8b7cd2dc2bb22" },
+    { 6144, "1c24056f52725ede2dff0d7f9fc9855f" },
+    { 6150, "b7f4b65681c4e43ee68ca466ca9ca4ec" },
+    { 6400, "443bbaab9f7331ddd4bf11b659cd43c8" },
+    { 6528, "216f44f23047cfee03a7a64f88f9a995" },
+    { 8192, "ac7a993b2cad54879dba1bde63e39097" },
+    { 8320, "55ed7be9682d6c0025b3221a62088d08" },
+    {16384, "c6c722087653b62007aea668277175e5" },
+    {18432, "f1faca8e907872c809e14ffbd85792d6" },
+    { 0, NULL },
+};
+
+/* HASH-MD5
+ * InputHexStr = "31323334353637383930" (ASCII = "1234567890")
+ *               repeated "size" times
+ */
+static MV_CESA_SIZE_TEST     mdMultiSizeTest305[] =
+{
+    { 80,   "57edf4a22be3c955ac49da2e2107b67a" },
+    { 512,  "c729ae8f0736cc377a9767a660eaa04e" },
+    { 1000, "f1257a8659eb92d36fe14c6bf3852a6a" },
+    { 1001, "f8a46fe8ea04fdc8c7de0e84042d3878" },
+    { 1002, "da188dd67bff87d58aa3c02af2d0cc0f" },
+    { 1003, "961753017feee04c9b93a8e51658a829" },
+    { 1004, "dd68c4338608dcc87807a711636bf2af" },
+    { 1005, "e338d567d3ce66bf69ada29658a8759b" },
+    { 1006, "443c9811e8b92599b0b149e8d7ec700a" },
+    { 1336, "89a98511706008ba4cbd0b4a24fa5646" },
+    { 1344, "335a919805f370b9e402a62c6fe01739" },
+    { 1399, "5d18d0eddcd84212fe28d812b5e80e3b" },
+    { 1400, "6b695c240d2dffd0dffc99459ca76db6" },
+    { 1401, "49590f61298a76719bc93a57a30136f5" },
+    { 1402, "94c2999fa3ef1910a683d69b2b8476f2" },
+    { 1403, "37073a02ab00ecba2645c57c228860db" },
+    { 1404, "1bcd06994fce28b624f0c5fdc2dcdd2b" },
+    { 1405, "11b93671a64c95079e8cf9e7cddc8b3d" },
+    { 1406, "4b6695772a4c66313fa4871017d05f36" },
+    { 1407, "d1539b97fbfda1c075624e958de19c5b" },
+    { 1408, "b801b9b69920907cd018e8063092ede9" },
+    { 1409, "b765f1406cfe78e238273ed01bbcaf7e" },
+    { 2048, "1d7e2c64ac29e2b3fb4c272844ed31f5" },
+    { 2049, "71d38fac49c6b1f4478d8d88447bcdd0" },
+    { 2050, "141c34a5592b1bebfa731e0b23d0cdba" },
+    { 2051, "c5e1853f21c59f5d6039bd13d4b380d8" },
+    { 2052, "dd44a0d128b63d4b5cccd967906472d7" },
+    { 3072, "37d158e33b21390822739d13db7b87fe" },
+    { 3074, "aef3b209d01d39d0597fe03634bbf441" },
+    { 3075, "335ffb428eabf210bada96d74d5a4012" },
+    { 4048, "2434c2b43d798d2819487a886261fc64" },
+    { 4052, "ac2fa84a8a33065b2e92e36432e861f8" },
+    { 4058, "856781f85616c341c3533d090c1e1e84" },
+    { 6144, "e5d134c652c18bf19833e115f7a82e9b" },
+    { 6150, "a09a353be7795fac2401dac5601872e6" },
+    { 6400, "08b9033ac6a1821398f50af75a2dbc83" },
+    { 6528, "3d47aa193a8540c091e7e02f779e6751" },
+    { 8192, "d3164e710c0626f6f395b38f20141cb7" },
+    { 8320, "b727589d9183ff4e8491dd24466974a3" },
+    {16384, "3f54d970793d2274d5b20d10a69938ac" },
+    {18432, "f558511dcf81985b7a1bb57fad970531" },
+    { 0, NULL },
+};
+
+
+/* Key         = 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
+ *               0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa
+ *               0xaa, 0xaa, 0xaa, 0xaa
+ * InputHexStr = "31323334353637383930" (ASCII = "1234567890")
+ */
+static MV_CESA_SIZE_TEST     shaMultiSizeTest402[] =
+{
+    { 80,   "e812f370e659705a1649940d1f78cd7af18affd3" },
+    { 512,  "e547f886b2c15d995ed76a8a924cb408c8080f66" },
+    { 1000, "239443194409f1a5342ecde1a092c8f3a3ed790a" },
+    { 1001, "f278ab9a102850a9f48dc4e9e6822afe2d0c52b5" },
+    { 1002, "8bcc667df5ab6ece988b3af361d09747c77f4e72" },
+    { 1003, "0fae6046c7dc1d3e356b25af836f6077a363f338" },
+    { 1004, "0ea48401cc92ae6bc92ae76685269cb0167fbe1a" },
+    { 1005, "ecbcd7c879b295bafcd8766cbeac58cc371e31d1" },
+    { 1006, "eb4a4a3d07d1e9a15e6f1ab8a9c47f243e27324c" },
+    { 1336, "f5950ee1d77c10e9011d2149699c9366fe52529c" },
+    { 1344, "b04263604a63c351b0b3b9cf1785b4bdba6c8838" },
+    { 1399, "8cb1cff61d5b784045974a2fc69386e3b8d24218" },
+    { 1400, "9bb2f3fcbeddb2b90f0be797cd647334a2816d51" },
+    { 1401, "23ae462a7a0cb440f7445791079a5d75a535dd33" },
+    { 1402, "832974b524a4d3f9cc2f45a3cabf5ccef65cd2aa" },
+    { 1403, "d1c683742fe404c3c20d5704a5430e7832a7ec95" },
+    { 1404, "867c79042e64f310628e219d8b85594cd0c7adc3" },
+    { 1405, "c9d81d49d13d94358f56ccfd61af02b36c69f7c3" },
+    { 1406, "0df43daab2786172f9b8d07d61f14a070cf1287a" },
+    { 1407, "0fd8f3ad7f169534b274d4c66bbddd89f759e391" },
+    { 1408, "3987511182b18473a564436003139b808fa46343" },
+    { 1409, "ef667e063c9e9f539a8987a8d0bd3066ee85d901" },
+    { 2048, "921109c99f3fedaca21727156d5f2b4460175327" },
+    { 2049, "47188600dd165eb45f27c27196d3c46f4f042c1b" },
+    { 2050, "8831939904009338de10e7fa670847041387807d" },
+    { 2051, "2f8ebb5db2997d614e767be1050366f3641e7520" },
+    { 2052, "669e51cd730dae158d3bef8adba075bd95a0d011" },
+    { 3072, "cfee66cfd83abc8451af3c96c6b35a41cc6c55f5" },
+    { 3074, "216ea26f02976a261b7d21a4dd3085157bedfabd" },
+    { 3075, "bd612ebba021fd8e012b14c3bd60c8c5161fabc0" },
+    { 4048, "c2564c1fdf2d5e9d7dde7aace2643428e90662e8" },
+    { 4052, "91ce61fe924b445dfe7b5a1dcd10a27caec16df6" },
+    { 4058, "db2a9be5ee8124f091c7ebd699266c5de223c164" },
+    { 6144, "855109903feae2ba3a7a05a326b8a171116eb368" },
+    { 6150, "37520bb3a668294d9c7b073e7e3daf8fee248a78" },
+    { 6400, "60a353c841b6d2b1a05890349dad2fa33c7536b7" },
+    { 6528, "9e53a43a69bb42d7c8522ca8bd632e421d5edb36" },
+    { 8192, "a918cb0da862eaea0a33ee0efea50243e6b4927c" },
+    { 8320, "29a5dcf55d1db29cd113fcf0572ae414f1c71329" },
+    {16384, "6fb27966138e0c8d5a0d65ace817ebd53633cee1" },
+    {18432, "ca09900d891c7c9ae2a559b10f63a217003341c1" },
+    { 0, NULL },
+};
+
+/* Key         = 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+ *               0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10
+ *               0x11, 0x12, 0x13, 0x14
+ * InputHexStr = "31323334353637383930" (ASCII = "1234567890")
+ */
+static MV_CESA_SIZE_TEST     shaMultiSizeTest404[] =
+{
+    { 80,   "beaf20a34b06a87558d156c0949bc3957d40222e" },
+    { 512,  "3353955358d886bc2940a3c7f337ff7dafb59c7b" },
+    { 1000, "8737a542c5e9b2b6244b757ebb69d5bd602a829f" },
+    { 1001, "fd9e7582d8a5d3c9fe3b923e4e6a41b07a1eb4d4" },
+    { 1002, "a146d14a6fc3c274ff600568f4d75b977989e00d" },
+    { 1003, "be22601bbc027ddef2dec97d30b3dc424fd803c5" },
+    { 1004, "3e71fe99b2fe2b7bfdf4dbf0c7f3da25d7ea35e7" },
+    { 1005, "2c422735d7295408fddd76f5e8a83a2a8da13df3" },
+    { 1006, "6d875319049314b61855101a647b9ba3313428e6" },
+    { 1336, "c1631ea80bad9dc43a180712461b65a0598c711c" },
+    { 1344, "816069bf91d34581005746e2e0283d0f9c7b7605" },
+    { 1399, "4e139866dc61cfcb8b67ca2ebd637b3a538593af" },
+    { 1400, "ff2a0f8dd2b02c5417910f6f55d33a78e081a723" },
+    { 1401, "ab00c12be62336964cbce31ae97fe2a0002984d5" },
+    { 1402, "61349e7f999f3a1acc56c3e9a5060a9c4a7b05b6" },
+    { 1403, "3edbc0f61e435bc1317fa27d840076093fb79353" },
+    { 1404, "d052c6dfdbe63d45dab23ef9893e2aa4636aca1e" },
+    { 1405, "0cc16b7388d67bf0add15a31e6e6c753cfae4987" },
+    { 1406, "c96ba7eaad74253c38c22101b558d2850b1d1b90" },
+    { 1407, "3445428a40d2c6556e7c55797ad8d323b61a48d9" },
+    { 1408, "8d6444f937a09317c89834187b8ea9b8d3a8c56b" },
+    { 1409, "c700acd3ecd19014ea2bdb4d42510c467e088475" },
+    { 2048, "ee27d2a0cb77470c2f496212dfd68b5bb7b04e4b" },
+    { 2049, "683762d7a02983b26a6d046e6451d9cd82c25932" },
+    { 2050, "0fd20f1d55a9ee18363c2a6fd54aa13aee69992f" },
+    { 2051, "86c267d8cc4bc8d59090e4f8b303da960fd228b7" },
+    { 2052, "452395ae05b3ec503eea34f86fc0832485ad97c1" },
+    { 3072, "75198e3cfd0b9bcff2dabdf8e38e6fdaa33ca49a" },
+    { 3074, "4e24785ef080141ce4aab4675986d9acea624d7c" },
+    { 3075, "3a20c5978dd637ec0e809bf84f0d9ccf30bc65bf" },
+    { 4048, "3c32da256be7a7554922bf5fed51b0d2d09e59ad" },
+    { 4052, "fff898426ea16e54325ae391a32c6c9bce4c23c0" },
+    { 4058, "c800b9e562e1c91e1310116341a3c91d37f848ec" },
+    { 6144, "d91d509d0cc4376c2d05bf9a5097717a373530e6" },
+    { 6150, "d957030e0f13c5df07d9eec298542d8f94a07f12" },
+    { 6400, "bb745313c3d7dc17b3f955e5534ad500a1082613" },
+    { 6528, "77905f80d9ca82080bbb3e5654896dabfcfd1bdb" },
+    { 8192, "5237fd9a81830c974396f99f32047586612ff3c0" },
+    { 8320, "57668e28d5f2dba0839518a11db0f6af3d7e08bf" },
+    {16384, "62e093fde467f0748087beea32e9af97d5c61241" },
+    {18432, "845fb33130c7d6ea554fd5aacb9c50cf7ccb5929" },
+    { 0, NULL },
+};
+
+/* HASH-SHA1
+ * InputHexStr = "31323334353637383930" (ASCII = "1234567890")
+ *               repeated "size" times
+ */
+static MV_CESA_SIZE_TEST     shaMultiSizeTest405[] =
+{
+    { 80,   "50abf5706a150990a08b2c5ea40fa0e585554732" },
+    { 512,  "f14516a08948fa27917a974d219741a697ba0087" },
+    { 1000, "0bd18c378d5788817eb4f1e5dc07d867efa5cbf4" },
+    { 1001, "ca29b85c35db1b8aef83c977893a11159d1b7aa2" },
+    { 1002, "d83bc973eaaedb8a31437994dabbb3304b0be086" },
+    { 1003, "2cf7bbef0acd6c00536b5c58ca470df9a3a90b6c" },
+    { 1004, "e4375d09b1223385a8a393066f8209acfd936a80" },
+    { 1005, "1029b38043e027745d019ce1d2d68e3d8b9d8f99" },
+    { 1006, "deea16dcebbd8ac137e2b984deb639b9fb5e9680" },
+    { 1336, "ea031b065fff63dcfb6a41956e4777520cdbc55d" },
+    { 1344, "b52096c6445e6c0a8355995c70dc36ae186c863c" },
+    { 1399, "cde2f6f8379870db4b32cf17471dc828a8dbff2b" },
+    { 1400, "e53ff664064bc09fe5054c650806bd42d8179518" },
+    { 1401, "d1156db5ddafcace64cdb510ff0d4af9b9a8ad64" },
+    { 1402, "34ede0e9a909dd84a2ae291539105c0507b958e1" },
+    { 1403, "a772ca3536da77e6ad3251e4f9e1234a4d7b87c0" },
+    { 1404, "29740fd2b04e7a8bfd32242db6233156ad699948" },
+    { 1405, "65b17397495b70ce4865dad93bf991b74c97cce1" },
+    { 1406, "a7ee89cd0754061fdb91af7ea6abad2c69d542e3" },
+    { 1407, "3eebf82f7420188e23d328b7ce93580b279a5715" },
+    { 1408, "e08d3363a8b9a490dfb3a4c453452b8f114deeec" },
+    { 1409, "95d74df739181a4ff30b8c39e28793a36598e924" },
+    { 2048, "aa40262509c2abf84aab0197f83187fc90056d91" },
+    { 2049, "7dec28ef105bc313bade8d9a7cdeac58b99de5ea" },
+    { 2050, "d2e30f77ec81197de20f56588a156094ecb88450" },
+    { 2051, "6b22ccc874833e96551a39da0c0edcaa0d969d92" },
+    { 2052, "f843141e57875cd669af58744bc60aa9ea59549c" },
+    { 3072, "09c5fedeaa62c132e673cc3c608a00142273d086" },
+    { 3074, "b09e95eea9c7b1b007a58accec488301901a7f3d" },
+    { 3075, "e6226b77b4ada287a8c9bbcf4ed71eec5ce632dc" },
+    { 4048, "e99394894f855821951ddddf5bfc628547435f5c" },
+    { 4052, "32d2f1af38be9cfba6cd03d55a254d0b3e1eb382" },
+    { 4058, "d906552a4f2aca3a22e1fecccbcd183d7289d0ef" },
+    { 6144, "2e7f62d35a860988e1224dc0543204af19316041" },
+    { 6150, "d6b89698ee133df46fec9d552fadc328aa5a1b51" },
+    { 6400, "dff50e90c46853988fa3a4b4ce5dda6945aae976" },
+    { 6528, "9e63ec0430b96db02d38bc78357a2f63de2ab7f8" },
+    { 8192, "971eb71ed60394d5ab5abb12e88420bdd41b5992" },
+    { 8320, "91606a31b46afeaac965cecf87297e791b211013" },
+    {16384, "547f830a5ec1f5f170ce818f156b1002cabc7569" },
+    {18432, "f16f272787f3b8d539652e4dc315af6ab4fda0ef" },
+    { 0, NULL },
+};
+
+/* CryptoKey   = 0x01234567, 0x89abcdef,
+ *               0x01234567, 0x89abcdef,
+ *               0x01234567, 0x89abcdef;
+ * MacKey      = 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+ *               0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10
+ * InputHexStr = "31323334353637383930" (ASCII = "1234567890")
+ * Note: only sizes aligned to 3DES block size (8 bytes) allowed
+ */
+static MV_CESA_SIZE_TEST     tripleDesMdMultiSizeTest502[] =
+{
+    {   64, "9586962a2aaaef28803dec2e17807a7f" },
+    {   80, "b7726a03aad490bd6c5a452a89a1b271" },
+    {  352, "f1ed9563aecc3c0d2766eb2bed3b4e4c" },
+    {  512, "0f9decb11ab40fe86f4d4d9397bc020e" },
+    { 1000, "3ba69deac12cab8ff9dff7dbd9669927" },
+    { 1336, "6cf47bf1e80e03e2c1d0945bc50d37d2" },
+    { 1344, "4be388dab21ceb3fa1b8d302e9b821f7" },
+    { 1400, "a58b79fb21dd9bfc6ec93e3b99fb0ef1" },
+    { 1408, "8bc97379fc2ac3237effcdd4f7a86528" },
+    { 2048, "1339f03ab3076f25a20bc4cba16eb5bf" },
+    { 3072, "731204d2d90c4b36ae41f5e1fb874288" },
+    { 4048, "c028d998cfda5642547b7e1ed5ea16e4" },
+    { 6144, "b1b19cd910cc51bd22992f1e59f1e068" },
+    { 6400, "44e4613496ba622deb0e7cb768135a2f" },
+    { 6528, "3b06b0a86f8db9cd67f9448dfcf10549" },
+    { 8192, "d581780b7163138a0f412be681457d82" },
+    {16384, "03b8ac05527faaf1bed03df149c65ccf" },
+    {18432, "677c8a86a41dab6c5d81b85b8fb10ff6" },
+    { 0, NULL },
+};
+
+
+/* CryptoKey   = 0x01234567, 0x89abcdef,
+ *               0x01234567, 0x89abcdef,
+ *               0x01234567, 0x89abcdef;
+ * MacKey      = 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+ *               0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10
+ *               0x11, 0x12, 0x13, 0x14
+ * InputHexStr = "31323334353637383930" (ASCII = "1234567890")
+ * Note: only sizes aligned to 3DES block size (8 bytes) allowed
+ */
+static MV_CESA_SIZE_TEST     tripleDesShaMultiSizeTest503[] =
+{
+    {   64, "44a1e9bcbfc1429630d9ea68b7a48b0427a684f2" },
+    {   80, "b2ddeaca91030eab5b95a234ef2c0f6e738ff883" },
+    {  352, "4b91864c7ff629bdff75d9726421f76705452aaf" },
+    {  512, "6dd37faceeb2aa98ba74f4242ed6734a4d546af5" },
+    { 1000, "463661c30300be512a9df40904f0757cde5f1141" },
+    { 1336, "b931f831d9034fe59c65176400b039fe9c1f44a5" },
+    { 1344, "af8866b1cd4a4887d6185bfe72470ffdfb3648e1" },
+    { 1400, "49c6caf07296d5e31d2504d088bc5b20c3ee7cdb" },
+    { 1408, "fcae8deedbc6ebf0763575dc7e9de075b448a0f4" },
+    { 2048, "edece5012146c1faa0dd10f50b183ba5d2af58ac" },
+    { 3072, "5b83625adb43a488b8d64fecf39bb766818547b7" },
+    { 4048, "d2c533678d26c970293af60f14c8279dc708bfc9" },
+    { 6144, "b8f67af4f991b08b725f969b049ebf813bfacc5c" },
+    { 6400, "d9a6c7f746ac7a60ef2edbed2841cf851c25cfb0" },
+    { 6528, "376792b8c8d18161d15579fb7829e6e3a27e9946" },
+    { 8192, "d890eabdca195b34ef8724b28360cffa92ae5655" },
+    {16384, "a167ee52639ec7bf19aee9c6e8f76667c14134b9" },
+    {18432, "e4396ab56f67296b220985a12078f4a0e365d2cc" },
+    { 0, NULL },
+};
+
+/* CryptoKey   = 0x01234567, 0x89abcdef,
+ *               0x01234567, 0x89abcdef,
+ *               0x01234567, 0x89abcdef
+ * IV          = 0x12345678, 0x90abcdef
+ * MacKey      = 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+ *               0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10
+ * InputHexStr = "31323334353637383930" (ASCII = "1234567890")
+ * Note: only sizes aligned to 3DES block size (8 bytes) allowed
+ */
+static MV_CESA_SIZE_TEST     cbc3desMdMultiSizeTest504[] =
+{
+    {   64, "8d10e00802460ede0058c139ba48bd2d" },
+    {   80, "6f463057e1a90e0e91ae505b527bcec0" },
+    {  352, "4938d48bdf86aece2c6851e7c6079788" },
+    {  512, "516705d59f3cf810ebf2a13a23a7d42e" },
+    { 1000, "a5a000ee5c830e67ddc6a2d2e5644b31" },
+    { 1336, "44af60087b74ed07950088efbe3b126a" },
+    { 1344, "1f5b39e0577920af731dabbfcf6dfc2a" },
+    { 1400, "6804ea640e29b9cd39e08bc37dbce734" },
+    { 1408, "4fb436624b02516fc9d1535466574bf9" },
+    { 2048, "c909b0985c423d8d86719f701e9e83db" },
+    { 3072, "cfe0bc34ef97213ee3d3f8b10122db21" },
+    { 4048, "03ea10b5ae4ddeb20aed6af373082ed1" },
+    { 6144, "b9a0ff4f87fc14b3c2dc6f0ed0998fdf" },
+    { 6400, "6995f85d9d4985dd99e974ec7dda9dd6" },
+    { 6528, "bbbb548ce2fa3d58467f6a6a5168a0e6" },
+    { 8192, "afe101fbe745bb449ae4f50d10801456" },
+    {16384, "9741706d0b1c923340c4660ff97cacdf" },
+    {18432, "b0217becb73cb8f61fd79c7ce9d023fb" },
+    { 0, NULL },
+};
+
+
+/* CryptoKey   = 0x01234567, 0x89abcdef,
+ *               0x01234567, 0x89abcdef,
+ *               0x01234567, 0x89abcdef;
+ * IV          = 0x12345678, 0x90abcdef
+ * MacKey      = 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+ *               0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10
+ *               0x11, 0x12, 0x13, 0x14
+ * InputHexStr = "31323334353637383930" (ASCII = "1234567890")
+ * Note: only sizes aligned to 3DES block size (8 bytes) allowed
+ */
+static MV_CESA_SIZE_TEST     cbc3desShaMultiSizeTest505[] =
+{
+    {   64, "409187e5bdb0be4a7754ca3747f7433dc4f01b98" },
+    {   80, "1b002ed050be743aa98860cf35659646bb8efcc0" },
+    {  352, "6cbf7ebe50fa4fa6eecc19eca23f9eae553ccfff" },
+    {  512, "cfb5253fb4bf72b743320c30c7e48c54965853b0" },
+    { 1000, "95e04e1ca2937e7c5a9aba9e42d2bcdb8a7af21f" },
+    { 1336, "3b5c1f5eee5837ebf67b83ae01405542d77a6627" },
+    { 1344, "2b3d42ab25615437f98a1ee310b81d07a02badc2" },
+    { 1400, "7f8687df7c1af44e4baf3c934b6cca5ab6bc993e" },
+    { 1408, "473a581c5f04f7527d50793c845471ac87e86430" },
+    { 2048, "e41d20cae7ebe34e6e828ed62b1e5734019037bb" },
+    { 3072, "275664afd7a561d804e6b0d204e53939cde653ae" },
+    { 4048, "0d220cc5b34aeeb46bbbd637dde6290b5a8285a3" },
+    { 6144, "cb393ddcc8b1c206060625b7d822ef9839e67bc5" },
+    { 6400, "dd3317e2a627fc04800f74a4b05bfda00fab0347" },
+    { 6528, "8a74c3b2441ab3f5a7e08895cc432566219a7c41" },
+    { 8192, "b8e6ef3a549ed0e005bd5b8b1a5fe6689e9711a7" },
+    {16384, "55f59404008276cdac0e2ba0d193af2d40eac5ce" },
+    {18432, "86ae6c4fc72369a54cce39938e2d0296cd9c6ec5" },
+    { 0, NULL },
+};
+
+
+/* CryptoKey   = 0x01234567, 0x89abcdef,
+ *               0x01234567, 0x89abcdef,
+ *               0x01234567, 0x89abcdef
+ * IV          = 0x12345678, 0x90abcdef
+ * MacKey      = 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+ *               0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10
+ * InputHexStr = "31323334353637383930" (ASCII = "1234567890")
+ * Note: only sizes aligned to AES block size (16 bytes) allowed
+ */
+static MV_CESA_SIZE_TEST     cbcAes128md5multiSizeTest506[] =
+{
+    {   16, "7ca4c2ba866751598720c5c4aa0d6786" },
+    {   64, "7dba7fb988e80da609b1fea7254bced8" },
+    {   80, "6b6e863ac5a71d15e3e9b1c86c9ba05f" },
+    {  352, "a1ceb9c2e3021002400d525187a9f38c" },
+    {  512, "596c055c1c55db748379223164075641" },
+    { 1008, "f920989c02f3b3603f53c99d89492377" },
+    { 1344, "2e496b73759d77ed32ea222dbd2e7b41" },
+    { 1408, "7178c046b3a8d772efdb6a71c4991ea4" },
+    { 2048, "a917f0099c69eb94079a8421714b6aad" },
+    { 3072, "693cd5033d7f5391d3c958519fa9e934" },
+    { 4048, "139dca91bcff65b3c40771749052906b" },
+    { 6144, "428d9cef6df4fb70a6e9b6bbe4819e55" },
+    { 6400, "9c0b909e76daa811e12b1fc17000a0c4" },
+    { 6528, "ad876f6297186a7be1f1b907ed860eda" },
+    { 8192, "479cbbaca37dd3191ea1f3e8134a0ef4" },
+    {16384, "60fda559c74f91df538100c9842f2f15" },
+    {18432, "4a3eb1cba1fa45f3981270953f720c42" },
+    { 0, NULL },
+};
+
+
+/* CryptoKey   = 0x01234567, 0x89abcdef,
+ *               0x01234567, 0x89abcdef,
+ *               0x01234567, 0x89abcdef;
+ * IV          = 0x12345678, 0x90abcdef
+ * MacKey      = 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+ *               0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10
+ *               0x11, 0x12, 0x13, 0x14
+ * InputHexStr = "31323334353637383930" (ASCII = "1234567890")
+ * Note: only sizes aligned to AES block size (16 bytes) allowed
+ */
+static MV_CESA_SIZE_TEST     cbcAes128sha1multiSizeTest507[] =
+{
+    {   16, "9aa8dc1c45f0946daf78057fa978759c625c1fee" },
+    {   64, "9f588fc1ede851e5f8b20256abc9979465ae2189" },
+    {   80, "13558472d1fc1c90dffec6e5136c7203452d509b" },
+    {  352, "6b93518e006cfaa1f7adb24615e7291fb0a27e06" },
+    {  512, "096874951a77fbbf333e49d80c096ee2016e09bd" },
+    { 1008, "696fc203c2e4b5ae0ec5d1db3f623c490bc6dbac" },
+    { 1344, "79bf77509935ccd3528caaac6a5eb6481f74029b" },
+    { 1408, "627f9462b95fc188e8cfa7eec15119bdc5d4fcf1" },
+    { 2048, "3d50d0c005feba92fe41502d609fced9c882b4d1" },
+    { 3072, "758807e5b983e3a91c06fb218fe0f73f77111e94" },
+    { 4048, "ca90e85242e33f005da3504416a52098d0d31fb2" },
+    { 6144, "8044c1d4fd06642dfc46990b4f18b61ef1e972cf" },
+    { 6400, "166f1f4ea57409f04feba9fb1e39af0e00bd6f43" },
+    { 6528, "0389016a39485d6e330f8b4215ddf718b404f7e9" },
+    { 8192, "6df7ee2a8b61d6f7f860ce8dbf778f0c2a5b508b" },
+    {16384, "a70a6d8dfa1f91ded621c3dbaed34162bc48783f" },
+    {18432, "8dfad627922ce15df1eed10bdbed49244efa57db" },
+    { 0, NULL },
+};
+
+
+void    cesaTestPrintStatus(void);
+
+
+/*------------------------- LOCAL FUNCTIONs ---------------------------------*/
+MV_STATUS testCmd(int sid, int iter, MV_CESA_COMMAND* pCmd,
+                  MV_CESA_TEST_SESSION* pTestSession, MV_U8* pIV, int ivSize);
+MV_STATUS testClose(int idx);
+MV_STATUS testOpen(int idx);
+void close_session(int sid);
+void cesaTestCheckReady(const MV_CESA_RESULT *r);
+void cesaCheckReady(MV_CESA_RESULT* r);
+void printTestResults(int idx, MV_STATUS status, int checkMode);
+void cesaLastResult(void);
+void cesaTestPrintReq(int req, int offset, int size);
+
+void cesaTestPrintStatus(void);
+void cesaTestPrintSession(int idx);
+void sizeTest(int testIdx, int iter, int checkMode);
+void multiTest(int iter, int reqSize, int checkMode);
+void oneTest(int testIdx, int caseIdx,int iter, int reqSize, int checkMode);
+void multiSizeTest(int idx, int iter, int checkMode, char* inputData);
+void cesaTest(int iter, int reqSize, int checkMode);
+void cesaOneTest(int testIdx, int caseIdx,int iter, int reqSize, int checkMode);
+void combiTest(int iter, int reqSize, int checkMode);
+void shaTest(int iter, int reqSize, int checkMode);
+void mdTest(int iter, int reqSize, int checkMode);
+void aesTest(int iter, int reqSize, int checkMode);
+void tripleDesTest(int iter, int reqSize, int checkMode);
+void desTest(int iter, int reqSize, int checkMode);
+void cesaTestStop(void);
+MV_STATUS testRun(int idx, int caseIdx, int iter,int reqSize, int checkMode);
+void cesaTestStart(int bufNum, int bufSize);
+
+
+static MV_U32      getRate(MV_U32* remainder)
+{
+    MV_U32     kBits, milliSec, rate;
+
+    milliSec = 0;
+    if( (cesaEndTicks - cesaBeginTicks) > 0)
+    {
+        milliSec = CESA_TEST_TICK_TO_MS(cesaEndTicks - cesaBeginTicks);
+    }
+    if(milliSec == 0)
+    {
+        if(remainder != NULL)
+            *remainder = 0;
+        return 0;
+    }
+
+    kBits = (cesaIteration*cesaRateSize*8)/1000;
+    rate = kBits/milliSec;
+    if(remainder != NULL)
+        *remainder = ((kBits % milliSec)*10)/milliSec;
+
+    return rate;
+}
+
+static char*    extractMbuf(MV_CESA_MBUF *pMbuf,
+                            int offset, int size, char* hexStr)
+{
+    mvCesaCopyFromMbuf((MV_U8*)cesaBinBuffer, pMbuf, offset, size);
+    mvBinToHex((const MV_U8*)cesaBinBuffer, hexStr, size);
+
+    return hexStr;
+}
+
+static MV_BOOL  cesaCheckMbuf(MV_CESA_MBUF *pMbuf,
+                          const char* hexString, int offset,
+                          int checkSize)
+{
+    MV_BOOL     isFailed = MV_FALSE;
+    MV_STATUS   status;
+    int         size = strlen(hexString)/2;
+    int         checkedSize = 0;
+/*
+    mvOsPrintf("cesaCheckMbuf: pMbuf=%p, offset=%d, checkSize=%d, mBufSize=%d\n",
+                pMbuf, offset, checkSize, pMbuf->mbufSize);
+*/
+    if(pMbuf->mbufSize < (checkSize + offset))
+    {
+        mvOsPrintf("checkSize (%d) is too large: offset=%d, mbufSize=%d\n",
+                    checkSize, offset, pMbuf->mbufSize);
+        return MV_TRUE;
+    }
+    status = mvCesaCopyFromMbuf((MV_U8*)cesaBinBuffer, pMbuf, offset, checkSize);
+    if(status != MV_OK)
+    {
+        mvOsPrintf("CesaTest: Can't copy %d bytes from Mbuf=%p to checkBuf=%p\n",
+                    checkSize, pMbuf, cesaBinBuffer);
+        return MV_TRUE;
+    }
+/*
+    mvDebugMemDump(cesaBinBuffer, size, 1);
+*/
+    mvHexToBin(hexString, (MV_U8*)cesaExpBinBuffer, size);
+
+    /* Compare buffers */
+    while(checkSize > checkedSize)
+    {
+        size = MV_MIN(size, (checkSize - checkedSize));
+        if(memcmp(cesaExpBinBuffer, &cesaBinBuffer[checkedSize], size) != 0)
+        {
+            mvOsPrintf("CheckMbuf failed: checkSize=%d, size=%d, checkedSize=%d\n",
+                        checkSize, size, checkedSize);
+            mvDebugMemDump(&cesaBinBuffer[checkedSize], size, 1);
+            mvDebugMemDump(cesaExpBinBuffer, size, 1);
+
+            isFailed = MV_TRUE;
+            break;
+        }
+        checkedSize += size;
+    }
+
+    return isFailed;
+}
+
+static MV_STATUS    cesaSetMbuf(MV_CESA_MBUF *pMbuf,
+                        const char* hexString,
+                        int offset, int reqSize)
+{
+    MV_STATUS   status = MV_OK;
+    int         copySize, size = strlen(hexString)/2;
+
+    mvHexToBin(hexString, (MV_U8*)cesaBinBuffer, size);
+
+    copySize = 0;
+    while(reqSize > copySize)
+    {
+        size = MV_MIN(size, (reqSize - copySize));
+
+        status = mvCesaCopyToMbuf((MV_U8*)cesaBinBuffer, pMbuf, offset+copySize, size);
+        if(status != MV_OK)
+        {
+            mvOsPrintf("cesaSetMbuf Error: Copy %d of %d bytes to MBuf\n",
+                        copySize, reqSize);
+            break;
+        }
+        copySize += size;
+    }
+    pMbuf->mbufSize = offset+copySize;
+    return status;
+}
+
+static  MV_CESA_TEST_SESSION* getTestSessionDb(int idx, int* pTestIdx)
+{
+    int                 testIdx, dbIdx = idx/100;
+
+    if(dbIdx > MAX_TEST_TYPE)
+    {
+        mvOsPrintf("Wrong index %d - No such test type\n", idx);
+        return NULL;
+    }
+    testIdx = idx % 100;
+
+    if(testIdx >= cesaTestsDB[dbIdx].numSessions)
+    {
+        mvOsPrintf("Wrong index %d - No such test\n", idx);
+        return NULL;
+    }
+    if(pTestIdx != NULL)
+        *pTestIdx = testIdx;
+
+    return  cesaTestsDB[dbIdx].pSessions;
+}
+
+/* Debug */
+void    cesaTestPrintReq(int req, int offset, int size)
+{
+    MV_CESA_MBUF*   pMbuf;
+
+    mvOsPrintf("cesaTestPrintReq: req=%d, offset=%d, size=%d\n", 
+                req, offset, size);
+    mvDebugMemDump(cesaCmdRing, 128, 4);
+
+    pMbuf = cesaCmdRing[req].pSrc;
+    mvCesaDebugMbuf("src", pMbuf, offset,size);
+    pMbuf = cesaCmdRing[req].pDst;
+    mvCesaDebugMbuf("dst", pMbuf, offset, size);
+
+    cesaTestPrintStatus();
+}
+
+void    cesaLastResult(void)
+{
+        mvOsPrintf("Last Result: ReqId = %d, SessionId = %d, rc = (%d)\n",
+                (MV_U32)cesaResult.pReqPrv, cesaResult.sessionId,
+                cesaResult.retCode);
+}
+
+void    printTestResults(int idx, MV_STATUS status, int checkMode)
+{
+    int                     testIdx;
+    MV_CESA_TEST_SESSION*   pTestSessions = getTestSessionDb(idx, &testIdx);
+
+    if(pTestSessions == NULL)
+        return;
+
+    mvOsPrintf("%-35s %4dx%-4d : ", pTestSessions[testIdx].name,
+            cesaIteration, cesaReqSize);
+    if( (status == MV_OK)      &&
+        (cesaCryptoError == 0) &&
+        (cesaError == 0)       &&
+        (cesaReqIdError == 0) )
+    {
+        mvOsPrintf("Passed, Rate=%3u.%u Mbps (%5u cpp)\n", 
+                     cesaRate, cesaRateAfterDot, cesaEndTicks - cesaBeginTicks);
+    }
+    else
+    {
+        mvOsPrintf("Failed, Status = 0x%x\n", status);
+        if(cesaCryptoError > 0)
+            mvOsPrintf("cryptoError : %d\n", cesaCryptoError);
+        if(cesaReqIdError > 0)
+            mvOsPrintf("reqIdError  : %d\n", cesaReqIdError);
+        if(cesaError > 0)
+            mvOsPrintf("cesaError  : %d\n", cesaError);
+    }
+    if(cesaTestIsrMissCount > 0)
+        mvOsPrintf("cesaIsrMissed  : %d\n", cesaTestIsrMissCount);
+}
+
+void cesaCheckReady(MV_CESA_RESULT* r)
+{
+    int             reqId;
+    MV_CESA_MBUF    *pMbuf;
+    MV_BOOL         isFailed;
+
+    cesaResult  =  *r;
+    reqId = (int)cesaResult.pReqPrv;
+    pMbuf = cesaCmdRing[reqId].pDst;
+
+/*
+    mvOsPrintf("cesaCheckReady: reqId=%d, checkOffset=%d, checkSize=%d\n",
+                    reqId, cesaCheckOffset, cesaCheckSize);
+*/
+    /* Check expected reqId */
+    if(reqId != cesaExpReqId)
+    {
+        cesaReqIdError++;
+/*
+        mvOsPrintf("CESA reqId Error: cbIter=%d (%d), reqId=%d, expReqId=%d\n",
+                    cesaCbIter, cesaIteration, reqId, cesaExpReqId);
+*/
+    }
+    else
+    {
+        if( (cesaCheckMode == CESA_FULL_CHECK_MODE) ||
+            (cesaCheckMode == CESA_FAST_CHECK_MODE) )
+        {
+            if(cesaResult.retCode != MV_OK)
+            {
+                cesaError++;
+
+                mvOsPrintf("CESA Error: cbIter=%d (%d), reqId=%d, rc=%d\n",
+                            cesaCbIter, cesaIteration, reqId, cesaResult.retCode);
+            }
+            else
+            {
+                if( (cesaCheckSize > 0) && (cesaOutputHexStr != NULL) )
+                {
+                    /* Check expected output */
+
+                    isFailed = cesaCheckMbuf(pMbuf, cesaOutputHexStr, cesaCheckOffset, cesaCheckSize);
+                    if(isFailed)
+                    {
+                        mvOsPrintf("CESA Crypto Error: cbIter=%d (%d), reqId=%d\n",
+                                    cesaCbIter, cesaIteration, reqId);
+
+                        CESA_TEST_DEBUG_PRINT(("Error: reqId=%d, reqSize=%d, checkOffset=%d, checkSize=%d\n",
+                                    reqId, cesaReqSize, cesaCheckOffset, cesaCheckSize));
+
+                        CESA_TEST_DEBUG_PRINT(("Output str: %s\n", cesaOutputHexStr));
+
+                        CESA_TEST_DEBUG_CODE( mvCesaDebugMbuf("error", pMbuf, 0, cesaCheckOffset+cesaCheckSize) );
+
+                        cesaCryptoError++;
+                    }
+                }
+            }
+        }
+    }
+    if(cesaCheckMode == CESA_SHOW_CHECK_MODE)
+    {
+        extractMbuf(pMbuf, cesaCheckOffset, cesaCheckSize, cesaHexBuffer);
+        mvOsPrintf("%4d, %s\n", cesaCheckOffset, cesaHexBuffer);
+    }
+
+    cesaCbIter++;
+    if(cesaCbIter >= cesaIteration)
+    {
+        cesaCbIter = 0;
+        cesaExpReqId = 0;
+        cesaIsReady = MV_TRUE;
+
+        cesaEndTicks = CESA_TEST_TICK_GET();
+        cesaRate = getRate(&cesaRateAfterDot);
+    }
+    else
+    {
+        cesaExpReqId = reqId + 1;
+        if(cesaExpReqId == CESA_DEF_REQ_SIZE)
+            cesaExpReqId = 0;
+    }
+}
+
+
+#ifdef MV_NETBSD
+static int cesaTestReadyIsr(void *arg)
+#else
+#ifdef __KERNEL__
+static irqreturn_t cesaTestReadyIsr( int irq , void *dev_id)
+#endif
+#ifdef MV_VXWORKS
+static  void   cesaTestReadyIsr(void)
+#endif
+#endif
+{
+    MV_U32          cause;
+    MV_STATUS       status;
+    MV_CESA_RESULT  result;
+
+    cesaTestIsrCount++;
+    /* Clear cause register */
+    cause = MV_REG_READ(MV_CESA_ISR_CAUSE_REG);
+    if( (cause & MV_CESA_CAUSE_ACC_DMA_ALL_MASK) == 0)
+    {
+        mvOsPrintf("cesaTestReadyIsr: cause=0x%x\n", cause);
+#ifdef MV_NETBSD
+        return 0;
+#else
+#ifdef __KERNEL__
+        return 1;
+#else
+        return;
+#endif
+#endif
+    }
+
+    MV_REG_WRITE(MV_CESA_ISR_CAUSE_REG, 0);
+
+    while(MV_TRUE)
+    {
+        /* Get Ready requests */
+        status = mvCesaReadyGet(&result);
+        if(status == MV_OK)
+            cesaCheckReady(&result);
+
+        break;
+    }
+    if( (cesaTestFull == 1) && (status != MV_BUSY) )
+    {
+        cesaTestFull = 0;
+        CESA_TEST_WAKE_UP();
+    }
+
+#ifdef __KERNEL__
+    return 1;
+#endif
+}
+
+void
+cesaTestCheckReady(const MV_CESA_RESULT *r)
+{
+	MV_CESA_RESULT result = *r;
+
+	cesaCheckReady(&result);
+
+	if (cesaTestFull == 1) {
+		cesaTestFull = 0;
+		CESA_TEST_WAKE_UP();
+	}
+}
+
+static INLINE int   open_session(MV_CESA_OPEN_SESSION* pOs)
+{
+    MV_U16      sid;
+    MV_STATUS   status;
+
+    status = mvCesaSessionOpen(pOs, (short*)&sid);
+    if(status != MV_OK)
+    {
+        mvOsPrintf("CesaTest: Can't open new session - status = 0x%x\n",
+                    status);
+        return -1;
+    }
+
+    return  (int)sid;
+}
+
+void close_session(int sid)
+{
+    MV_STATUS   status;
+
+    status = mvCesaSessionClose(sid);
+    if(status != MV_OK)
+    {
+        mvOsPrintf("CesaTest: Can't close session %d - status = 0x%x\n",
+                    sid, status);
+    }
+}
+
+MV_STATUS testOpen(int idx)
+{
+    MV_CESA_OPEN_SESSION    os;
+    int                     sid, i, testIdx;
+    MV_CESA_TEST_SESSION*   pTestSession;
+    MV_U16          digestSize = 0;
+
+    pTestSession = getTestSessionDb(idx, &testIdx);
+    if(pTestSession == NULL)
+    {
+        mvOsPrintf("Test %d is not exist\n", idx);
+        return MV_BAD_PARAM;
+    }
+    pTestSession = &pTestSession[testIdx];
+
+    if(pTestSession->sid != -1)
+    {
+        mvOsPrintf("Session for test %d already created: sid=%d\n",
+                    idx, pTestSession->sid);
+        return MV_OK;
+    }
+
+    os.cryptoAlgorithm = pTestSession->cryptoAlgorithm;
+    os.macMode = pTestSession->macAlgorithm;
+    switch(os.macMode)
+    {
+        case MV_CESA_MAC_MD5:
+        case MV_CESA_MAC_HMAC_MD5:
+            digestSize = MV_CESA_MD5_DIGEST_SIZE;
+            break;
+
+        case MV_CESA_MAC_SHA1:
+        case MV_CESA_MAC_HMAC_SHA1:
+            digestSize = MV_CESA_SHA1_DIGEST_SIZE;
+            break;
+
+        case MV_CESA_MAC_NULL:
+            digestSize = 0;
+    }
+    os.cryptoMode = pTestSession->cryptoMode;
+    os.direction = pTestSession->direction;
+    os.operation = pTestSession->operation;
+
+    for(i=0; i<pTestSession->cryptoKeySize; i++)
+        os.cryptoKey[i] = pTestSession->pCryptoKey[i];
+
+    os.cryptoKeyLength = pTestSession->cryptoKeySize;
+
+    for(i=0; i<pTestSession->macKeySize; i++)
+        os.macKey[i] = pTestSession->pMacKey[i];
+
+    os.macKeyLength = pTestSession->macKeySize;
+    os.digestSize = digestSize;
+
+    sid = open_session(&os);
+    if(sid == -1)
+    {
+        mvOsPrintf("Can't open session for test %d: rc=0x%x\n",
+                    idx, cesaResult.retCode);
+        return cesaResult.retCode;
+    }
+    CESA_TEST_DEBUG_PRINT(("Opened session: sid = %d\n", sid));
+    pTestSession->sid = sid;
+    return MV_OK;
+}
+
+MV_STATUS   testClose(int idx)
+{
+    int                     testIdx;
+    MV_CESA_TEST_SESSION*   pTestSession;
+
+    pTestSession = getTestSessionDb(idx, &testIdx);
+    if(pTestSession == NULL)
+    {
+        mvOsPrintf("Test %d is not exist\n", idx);
+        return MV_BAD_PARAM;
+    }
+    pTestSession = &pTestSession[testIdx];
+
+    if(pTestSession->sid == -1)
+    {
+        mvOsPrintf("Test session %d is not opened\n", idx);
+        return MV_NO_SUCH;
+    }
+
+    close_session(pTestSession->sid);
+    pTestSession->sid = -1;
+
+    return MV_OK;
+}
+
+MV_STATUS testCmd(int sid, int iter, MV_CESA_COMMAND* pCmd,
+             MV_CESA_TEST_SESSION* pTestSession, MV_U8* pIV, int ivSize)
+{
+    int                 cmdReqId = 0;
+    int                 i;
+    MV_STATUS           rc = MV_OK;
+    char                ivZeroHex[] = "0000";
+
+    if(iter == 0)
+        iter = CESA_DEF_ITER_NUM;
+
+    if(pCmd == NULL)
+    {
+        mvOsPrintf("testCmd failed: pCmd=NULL\n");
+        return MV_BAD_PARAM;
+    }
+    pCmd->sessionId = sid;
+
+    cesaCryptoError = 0;
+    cesaReqIdError = 0;
+    cesaError = 0;
+    cesaTestIsrMissCount = 0;
+    cesaIsReady = MV_FALSE;
+    cesaIteration = iter;
+
+    if(cesaInputHexStr == NULL)
+        cesaInputHexStr = cesaPlainHexEbc;
+
+    for(i=0; i<CESA_DEF_REQ_SIZE; i++)
+    {
+        pCmd->pSrc = (MV_CESA_MBUF*)(cesaCmdRing[i].pSrc);
+        if(pIV != NULL)
+        {
+            /* If IV from SA - set IV in Source buffer to zeros */
+            cesaSetMbuf(pCmd->pSrc, ivZeroHex, 0, pCmd->cryptoOffset);
+            cesaSetMbuf(pCmd->pSrc, cesaInputHexStr, pCmd->cryptoOffset,
+                        (cesaReqSize - pCmd->cryptoOffset));
+        }
+        else
+        {
+            cesaSetMbuf(pCmd->pSrc, cesaInputHexStr, 0, cesaReqSize);
+        }
+        pCmd->pDst = (MV_CESA_MBUF*)(cesaCmdRing[i].pDst);
+        cesaSetMbuf(pCmd->pDst, cesaNullPlainHexText, 0, cesaReqSize);
+
+        memcpy(&cesaCmdRing[i], pCmd, sizeof(*pCmd));
+    }
+
+    if(cesaCheckMode == CESA_SW_SHOW_CHECK_MODE)
+    {
+        MV_U8   pDigest[MV_CESA_MAX_DIGEST_SIZE];
+
+        if(pTestSession->macAlgorithm == MV_CESA_MAC_MD5)
+        {
+            mvMD5(pCmd->pSrc->pFrags[0].bufVirtPtr, pCmd->macLength, pDigest);
+            mvOsPrintf("SW HASH_MD5: reqSize=%d, macLength=%d\n",
+                        cesaReqSize, pCmd->macLength);
+            mvDebugMemDump(pDigest, MV_CESA_MD5_DIGEST_SIZE, 1);
+            return MV_OK;
+        }
+        if(pTestSession->macAlgorithm == MV_CESA_MAC_SHA1)
+        {
+            mvSHA1(pCmd->pSrc->pFrags[0].bufVirtPtr, pCmd->macLength, pDigest);
+            mvOsPrintf("SW HASH_SHA1: reqSize=%d, macLength=%d\n",
+                        cesaReqSize, pCmd->macLength);
+            mvDebugMemDump(pDigest, MV_CESA_SHA1_DIGEST_SIZE, 1);
+            return MV_OK;
+        }
+    }
+
+    cesaBeginTicks = CESA_TEST_TICK_GET();
+    CESA_TEST_DEBUG_CODE( memset(cesaTestTrace, 0, sizeof(cesaTestTrace));
+                     cesaTestTraceIdx = 0;
+    );
+
+    if(cesaCheckMode == CESA_SW_NULL_CHECK_MODE)
+    {
+        volatile MV_U8   pDigest[MV_CESA_MAX_DIGEST_SIZE];
+
+        for(i=0; i<iter; i++)
+        {
+            if(pTestSession->macAlgorithm == MV_CESA_MAC_MD5)
+            {
+                mvMD5(pCmd->pSrc->pFrags[0].bufVirtPtr, pCmd->macLength, pDigest);
+            }
+            if(pTestSession->macAlgorithm == MV_CESA_MAC_SHA1)
+            {
+                mvSHA1(pCmd->pSrc->pFrags[0].bufVirtPtr, pCmd->macLength, pDigest);
+            }
+        }
+        cesaEndTicks = CESA_TEST_TICK_GET();
+        cesaRate = getRate(&cesaRateAfterDot);
+        cesaIsReady = MV_TRUE;
+
+        return MV_OK;
+    }
+
+    /*cesaTestIsrCount = 0;*/
+    /*mvCesaDebugStatsClear();*/
+
+#ifndef MV_NETBSD
+    MV_REG_WRITE(MV_CESA_ISR_CAUSE_REG, 0);
+#endif
+
+    for(i=0; i<iter; i++)
+    {
+        unsigned long flags;
+
+        pCmd = &cesaCmdRing[cmdReqId];
+        pCmd->pReqPrv = (void*)cmdReqId;
+
+        CESA_TEST_LOCK(flags);
+
+        rc = mvCesaAction(pCmd);
+        if(rc == MV_NO_RESOURCE)
+            cesaTestFull = 1;
+
+        CESA_TEST_UNLOCK(flags);
+
+        if(rc == MV_NO_RESOURCE)
+        {
+            CESA_TEST_LOCK(flags);
+            CESA_TEST_WAIT( (cesaTestFull == 0), 100);
+            CESA_TEST_UNLOCK(flags);
+            if(cesaTestFull == 1)
+            {
+                mvOsPrintf("CESA Test timeout: i=%d, iter=%d, cesaTestFull=%d\n",
+                            i, iter, cesaTestFull);
+                cesaTestFull = 0;
+                return MV_TIMEOUT;
+            }
+
+            CESA_TEST_LOCK(flags);
+
+            rc = mvCesaAction(pCmd);
+
+            CESA_TEST_UNLOCK(flags);
+        }
+        if( (rc != MV_OK) && (rc != MV_NO_MORE) )
+        {
+            mvOsPrintf("mvCesaAction failed: rc=%d\n", rc);
+            return rc;
+        }
+
+        cmdReqId++;
+        if(cmdReqId >= CESA_DEF_REQ_SIZE)
+            cmdReqId = 0;
+
+#ifdef MV_LINUX
+        /* Reschedule each 16 requests */
+        if( (i & 0xF) == 0)
+            schedule();
+#endif
+    }
+    return MV_OK;
+}
+
+void    cesaTestStart(int bufNum, int bufSize)
+{
+    int             i, j, idx;
+    MV_CESA_MBUF    *pMbufSrc, *pMbufDst;
+    MV_BUF_INFO     *pFragsSrc, *pFragsDst;
+    char            *pBuf;
+#ifndef MV_NETBSD
+    int             numOfSessions, queueDepth;
+    char            *pSram;
+    MV_STATUS       status;
+    MV_CPU_DEC_WIN  addrDecWin;
+#endif
+
+    cesaCmdRing = mvOsMalloc(sizeof(MV_CESA_COMMAND) * CESA_DEF_REQ_SIZE);
+    if(cesaCmdRing == NULL)
+    {
+        mvOsPrintf("testStart: Can't allocate %ld bytes of memory\n",
+                sizeof(MV_CESA_COMMAND) * CESA_DEF_REQ_SIZE);
+        return;
+    }
+    memset(cesaCmdRing, 0, sizeof(MV_CESA_COMMAND) * CESA_DEF_REQ_SIZE);
+
+    if(bufNum == 0)
+        bufNum = CESA_DEF_BUF_NUM;
+
+    if(bufSize == 0)
+        bufSize = CESA_DEF_BUF_SIZE;
+
+    cesaBufNum = bufNum;
+    cesaBufSize = bufSize;
+    mvOsPrintf("CESA test started: bufNum = %d, bufSize = %d\n",
+                bufNum, bufSize);
+
+    cesaHexBuffer = mvOsMalloc(2*bufNum*bufSize);
+    if(cesaHexBuffer == NULL)
+    {
+        mvOsPrintf("testStart: Can't malloc %d bytes for cesaHexBuffer.\n",
+                    2*bufNum*bufSize);
+        return;
+    }
+    memset(cesaHexBuffer, 0, (2*bufNum*bufSize));
+
+    cesaBinBuffer = mvOsMalloc(bufNum*bufSize);
+    if(cesaBinBuffer == NULL)
+    {
+        mvOsPrintf("testStart: Can't malloc %d bytes for cesaBinBuffer\n",
+                    bufNum*bufSize);
+        return;
+    }
+    memset(cesaBinBuffer, 0, (bufNum*bufSize));
+
+    cesaExpBinBuffer = mvOsMalloc(bufNum*bufSize);
+    if(cesaExpBinBuffer == NULL)
+    {
+        mvOsPrintf("testStart: Can't malloc %d bytes for cesaExpBinBuffer\n",
+                    bufNum*bufSize);
+        return;
+    }
+    memset(cesaExpBinBuffer, 0, (bufNum*bufSize));
+
+    CESA_TEST_WAIT_INIT();
+
+    pMbufSrc = mvOsMalloc(sizeof(MV_CESA_MBUF) * CESA_DEF_REQ_SIZE);
+    pFragsSrc = mvOsMalloc(sizeof(MV_BUF_INFO) * bufNum * CESA_DEF_REQ_SIZE);
+
+    pMbufDst = mvOsMalloc(sizeof(MV_CESA_MBUF) * CESA_DEF_REQ_SIZE);
+    pFragsDst = mvOsMalloc(sizeof(MV_BUF_INFO) * bufNum * CESA_DEF_REQ_SIZE);
+
+    if( (pMbufSrc == NULL) || (pFragsSrc == NULL) ||
+        (pMbufDst == NULL) || (pFragsDst == NULL) )
+    {
+        mvOsPrintf("testStart: Can't malloc Src and Dst pMbuf and pFrags structures.\n");
+        /* !!!! Dima cesaTestCleanup();*/
+        return;
+    }
+
+    memset(pMbufSrc, 0, sizeof(MV_CESA_MBUF) * CESA_DEF_REQ_SIZE);
+    memset(pFragsSrc, 0, sizeof(MV_BUF_INFO) * bufNum * CESA_DEF_REQ_SIZE);
+
+    memset(pMbufDst, 0, sizeof(MV_CESA_MBUF) * CESA_DEF_REQ_SIZE);
+    memset(pFragsDst, 0, sizeof(MV_BUF_INFO) * bufNum * CESA_DEF_REQ_SIZE);
+
+    mvOsPrintf("Cesa Test Start: pMbufSrc=%p, pFragsSrc=%p, pMbufDst=%p, pFragsDst=%p\n",
+                pMbufSrc, pFragsSrc, pMbufDst, pFragsDst);
+
+    idx = 0;
+    for(i=0; i<CESA_DEF_REQ_SIZE; i++)
+    {
+        pBuf = mvOsIoCachedMalloc(cesaTestOSHandle,bufSize * bufNum * 2,
+				  &cesaReqBufs[i].bufPhysAddr,
+				  &cesaReqBufs[i].memHandle);
+		if(pBuf == NULL)
+    	{
+        	mvOsPrintf("testStart: Can't malloc %d bytes for pBuf\n",
+                    bufSize * bufNum * 2);
+        	return;
+    	}
+
+        memset(pBuf, 0, bufSize * bufNum * 2);
+        mvOsCacheFlush(cesaTestOSHandle,pBuf, bufSize * bufNum * 2);
+        if(pBuf == NULL)
+        {
+            mvOsPrintf("cesaTestStart: Can't allocate %d bytes for req_%d buffers\n",
+                        bufSize * bufNum * 2, i);
+            return;
+        }
+
+        cesaReqBufs[i].bufVirtPtr = (MV_U8*)pBuf;
+        cesaReqBufs[i].bufSize =  bufSize * bufNum * 2;
+
+        cesaCmdRing[i].pSrc = &pMbufSrc[i];
+        cesaCmdRing[i].pSrc->pFrags = &pFragsSrc[idx];
+        cesaCmdRing[i].pSrc->numFrags = bufNum;
+        cesaCmdRing[i].pSrc->mbufSize = 0;
+
+        cesaCmdRing[i].pDst = &pMbufDst[i];
+        cesaCmdRing[i].pDst->pFrags = &pFragsDst[idx];
+        cesaCmdRing[i].pDst->numFrags = bufNum;
+        cesaCmdRing[i].pDst->mbufSize = 0;
+
+        for(j=0; j<bufNum; j++)
+        {
+            cesaCmdRing[i].pSrc->pFrags[j].bufVirtPtr = (MV_U8*)pBuf;
+            cesaCmdRing[i].pSrc->pFrags[j].bufSize = bufSize;
+            pBuf += bufSize;
+            cesaCmdRing[i].pDst->pFrags[j].bufVirtPtr = (MV_U8*)pBuf;
+            cesaCmdRing[i].pDst->pFrags[j].bufSize = bufSize;
+            pBuf += bufSize;
+        }
+        idx += bufNum;
+    }
+
+#ifndef MV_NETBSD
+    if (mvCpuIfTargetWinGet(CRYPT_ENG, &addrDecWin) == MV_OK)
+        pSram = (char*)addrDecWin.addrWin.baseLow;
+    else
+    {
+        mvOsPrintf("mvCesaInit: ERR. mvCpuIfTargetWinGet failed\n");
+        return;
+    }
+
+#ifdef MV_CESA_NO_SRAM
+    pSram = mvOsMalloc(4*1024+8);
+    if(pSram == NULL)
+    {
+        mvOsPrintf("CesaTest: can't allocate %d bytes for SRAM simulation\n",
+                4*1024+8);
+        /* !!!! Dima cesaTestCleanup();*/
+        return;
+    }
+    pSram = (MV_U8*)MV_ALIGN_UP((MV_U32)pSram, 8);
+#endif /* MV_CESA_NO_SRAM */
+
+    numOfSessions = CESA_DEF_SESSION_NUM;
+    queueDepth = CESA_DEF_REQ_SIZE - MV_CESA_MAX_CHAN;
+
+    status = mvCesaInit(numOfSessions, queueDepth, pSram, NULL);
+    if(status != MV_OK)
+    {
+        mvOsPrintf("mvCesaInit is Failed: status = 0x%x\n", status);
+        /* !!!! Dima cesaTestCleanup();*/
+        return;
+    }
+#endif /* !MV_NETBSD */
+
+    /* Prepare data for tests */
+    for(i=0; i<50; i++)
+        strcat((char*)cesaDataHexStr3, "dd");
+
+    strcpy((char*)cesaDataAndMd5digest3,  cesaDataHexStr3);
+    strcpy((char*)cesaDataAndSha1digest3, cesaDataHexStr3);
+
+    /* Digest must be 8 byte aligned */
+    for(; i<56; i++)
+    {
+        strcat((char*)cesaDataAndMd5digest3, "00");
+        strcat((char*)cesaDataAndSha1digest3, "00");
+    }
+    strcat((char*)cesaDataAndMd5digest3,  cesaHmacMd5digestHex3);
+    strcat((char*)cesaDataAndSha1digest3, cesaHmacSha1digestHex3);
+
+#ifndef MV_NETBSD
+    MV_REG_WRITE( MV_CESA_ISR_CAUSE_REG, 0);
+    MV_REG_WRITE( MV_CESA_ISR_MASK_REG, MV_CESA_CAUSE_ACC_DMA_MASK);
+#endif
+
+#ifdef MV_VXWORKS
+    {
+        MV_STATUS       status;
+
+        status = intConnect(INUM_TO_IVEC(INT_LVL_CESA), cesaTestReadyIsr, (int)NULL);
+        if (status != OK)
+        {
+            mvOsPrintf("CESA: Can't connect CESA (%d) interrupt, status=0x%x \n",
+                        INT_LVL_CESA, status);
+            /* !!!! Dima cesaTestCleanup();*/
+            return;
+        }
+        cesaSemId = semMCreate(SEM_Q_PRIORITY | SEM_INVERSION_SAFE | SEM_DELETE_SAFE);
+        if(cesaSemId == NULL)
+        {
+            mvOsPrintf("cesaTestStart: Can't create semaphore\n");
+            return;
+        }
+        intEnable(INT_LVL_CESA);
+    }
+#endif /* MV_VXWORKS */
+
+#if !defined(MV_NETBSD) && defined(__KERNEL__)
+        if( request_irq(CESA_IRQ, cesaTestReadyIsr, (SA_INTERRUPT) , "cesa_test", NULL ) ) 
+        {
+            mvOsPrintf( "cannot assign irq\n" );
+            /* !!!! Dima cesaTestCleanup();*/
+            return;
+        }
+        spin_lock_init( &cesaLock );
+#endif
+}
+
+MV_STATUS   testRun(int idx, int caseIdx, int iter,
+                    int reqSize, int checkMode)
+{
+    int                     testIdx, count, sid, digestSize;
+    int                     blockSize;
+    MV_CESA_TEST_SESSION*   pTestSession;
+    MV_CESA_COMMAND         cmd;
+    MV_STATUS               status;
+
+    memset(&cmd, 0, sizeof(cmd));
+
+    pTestSession = getTestSessionDb(idx, &testIdx);
+    if(pTestSession == NULL)
+    {
+        mvOsPrintf("Test %d is not exist\n", idx);
+        return MV_BAD_PARAM;
+    }
+    pTestSession = &pTestSession[testIdx];
+
+    sid = pTestSession->sid;
+    if(sid == -1)
+    {
+        mvOsPrintf("Test %d is not opened\n", idx);
+        return MV_BAD_STATE;
+    }
+    switch(pTestSession->cryptoAlgorithm)
+    {
+        case MV_CESA_CRYPTO_DES:
+        case MV_CESA_CRYPTO_3DES:
+            blockSize = MV_CESA_DES_BLOCK_SIZE;
+            break;
+
+        case MV_CESA_CRYPTO_AES:
+            blockSize = MV_CESA_AES_BLOCK_SIZE;
+            break;
+
+        case MV_CESA_CRYPTO_NULL:
+            blockSize = 0;
+            break;
+
+        default:
+            mvOsPrintf("cesaTestRun: Bad CryptoAlgorithm=%d\n",
+                pTestSession->cryptoAlgorithm);
+        return MV_BAD_PARAM;
+    }
+    switch(pTestSession->macAlgorithm)
+    {
+        case MV_CESA_MAC_MD5:
+        case MV_CESA_MAC_HMAC_MD5:
+            digestSize = MV_CESA_MD5_DIGEST_SIZE;
+            break;
+
+        case MV_CESA_MAC_SHA1:
+        case MV_CESA_MAC_HMAC_SHA1:
+            digestSize = MV_CESA_SHA1_DIGEST_SIZE;
+            break;
+        default:
+            digestSize = 0;
+    }
+
+    if(iter == 0)
+        iter = CESA_DEF_ITER_NUM;
+
+    if(pTestSession->direction == MV_CESA_DIR_ENCODE)
+    {
+        cesaOutputHexStr = cesaTestCases[caseIdx].cipherHexStr;
+        cesaInputHexStr = cesaTestCases[caseIdx].plainHexStr;
+    }
+    else
+    {
+        cesaOutputHexStr = cesaTestCases[caseIdx].plainHexStr;
+        cesaInputHexStr = cesaTestCases[caseIdx].cipherHexStr;
+    }
+
+    cmd.sessionId = sid;
+    if(checkMode == CESA_FAST_CHECK_MODE)
+    {
+        cmd.cryptoLength = cesaTestCases[caseIdx].cryptoLength;
+        cmd.macLength = cesaTestCases[caseIdx].macLength;
+    }
+    else
+    {
+        cmd.cryptoLength = reqSize;
+        cmd.macLength = reqSize;
+    }
+    cesaRateSize = cmd.cryptoLength;
+    cesaReqSize = cmd.cryptoLength;
+    cmd.cryptoOffset = 0;
+    if(pTestSession->operation != MV_CESA_MAC_ONLY)
+    {
+        if( (pTestSession->cryptoMode == MV_CESA_CRYPTO_CBC) ||
+            (pTestSession->cryptoMode == MV_CESA_CRYPTO_CTR) )
+        {
+            cmd.ivOffset = 0;
+            cmd.cryptoOffset = blockSize;
+            if(cesaTestCases[caseIdx].pCryptoIV == NULL)
+            {
+                cmd.ivFromUser = 1;
+            }
+            else
+            {
+                cmd.ivFromUser = 0;
+                mvCesaCryptoIvSet(cesaTestCases[caseIdx].pCryptoIV, blockSize);
+            }
+            cesaReqSize = cmd.cryptoOffset + cmd.cryptoLength;
+        }
+    }
+
+/*
+    mvOsPrintf("ivFromUser=%d, cryptoLength=%d, cesaReqSize=%d, cryptoOffset=%d\n",
+                cmd.ivFromUser, cmd.cryptoLength, cesaReqSize, cmd.cryptoOffset);
+*/
+    if(pTestSession->operation != MV_CESA_CRYPTO_ONLY)
+    {
+        cmd.macOffset = cmd.cryptoOffset;
+
+        if(cesaTestCases[caseIdx].digestOffset == -1)
+        {
+            cmd.digestOffset = cmd.macOffset + cmd.macLength;
+            cmd.digestOffset = MV_ALIGN_UP(cmd.digestOffset, 8);
+        }
+        else
+        {
+            cmd.digestOffset = cesaTestCases[caseIdx].digestOffset;
+        }
+        if( (cmd.digestOffset + digestSize) > cesaReqSize)
+            cesaReqSize = cmd.digestOffset + digestSize;
+    }
+
+    cesaCheckMode = checkMode;
+
+    if(checkMode == CESA_NULL_CHECK_MODE)
+    {
+        cesaCheckSize = 0;
+        cesaCheckOffset = 0;
+    }
+    else
+    {
+        if(pTestSession->operation == MV_CESA_CRYPTO_ONLY)
+        {
+            cesaCheckOffset = 0;
+            cesaCheckSize = cmd.cryptoLength;
+        }
+        else
+        {
+            cesaCheckSize = digestSize;
+            cesaCheckOffset = cmd.digestOffset;
+        }
+    }
+/*
+    mvOsPrintf("reqSize=%d, checkSize=%d, checkOffset=%d, checkMode=%d\n",
+                cesaReqSize, cesaCheckSize, cesaCheckOffset, cesaCheckMode);
+
+    mvOsPrintf("blockSize=%d, ivOffset=%d, ivFromUser=%d, crOffset=%d, crLength=%d\n",
+                blockSize, cmd.ivOffset, cmd.ivFromUser,
+                cmd.cryptoOffset, cmd.cryptoLength);
+
+    mvOsPrintf("macOffset=%d, digestOffset=%d, macLength=%d\n",
+                cmd.macOffset, cmd.digestOffset, cmd.macLength);
+*/
+    status = testCmd(sid, iter, &cmd, pTestSession,
+                     cesaTestCases[caseIdx].pCryptoIV, blockSize);
+
+    if(status != MV_OK)
+        return status;
+
+    /* Wait when all callbacks is received */
+    count = 0;
+    while(cesaIsReady == MV_FALSE)
+    {
+        mvOsSleep(10);
+        count++;
+        if(count > 100)
+        {
+            mvOsPrintf("testRun: Timeout occured\n");
+            return MV_TIMEOUT;
+        }
+    }
+
+    return MV_OK;
+}
+
+
+void cesaTestStop(void)
+{
+    MV_CESA_MBUF    *pMbufSrc, *pMbufDst;
+    MV_BUF_INFO     *pFragsSrc, *pFragsDst;
+    int             i;
+
+    /* Release all allocated memories */
+    pMbufSrc = (MV_CESA_MBUF*)(cesaCmdRing[0].pSrc);
+    pFragsSrc = cesaCmdRing[0].pSrc->pFrags;
+
+    pMbufDst = (MV_CESA_MBUF*)(cesaCmdRing[0].pDst);
+    pFragsDst = cesaCmdRing[0].pDst->pFrags;
+
+    mvOsFree(pMbufSrc);
+    mvOsFree(pMbufDst);
+    mvOsFree(pFragsSrc);
+    mvOsFree(pFragsDst);
+
+    for(i=0; i<CESA_DEF_REQ_SIZE; i++)
+    {
+        mvOsIoCachedFree(cesaTestOSHandle,cesaReqBufs[i].bufSize,
+			 cesaReqBufs[i].bufPhysAddr,cesaReqBufs[i].bufVirtPtr,
+			 cesaReqBufs[i].memHandle);
+    }
+    cesaDataHexStr3[0] = '\0';
+}
+
+void    desTest(int iter, int reqSize, int checkMode)
+{
+    int         mode, i;
+    MV_STATUS   status;
+
+    mode = checkMode;
+    if(checkMode == CESA_FULL_CHECK_MODE)
+        mode = CESA_FAST_CHECK_MODE;
+    i = iter;
+    if(mode != CESA_NULL_CHECK_MODE)
+        i = 1;
+
+    testOpen(0);
+    testOpen(1);
+    testOpen(2);
+    testOpen(3);
+
+/* DES / ECB mode / Encrypt only */
+    status = testRun(0, 1, iter, reqSize, checkMode);
+    printTestResults(0, status, checkMode);
+
+/* DES / ECB mode / Decrypt only */
+    status = testRun(1, 1, iter, reqSize, checkMode);
+    printTestResults(1, status, checkMode);
+
+/* DES / CBC mode / Encrypt only */
+    status = testRun(2, 2, i, reqSize, mode);
+    printTestResults(2, status, mode);
+
+/* DES / CBC mode / Decrypt only */
+    status = testRun(3, 2, iter, reqSize, mode);
+    printTestResults(3, status, mode);
+
+    testClose(0);
+    testClose(1);
+    testClose(2);
+    testClose(3);
+}
+
+void    tripleDesTest(int iter, int reqSize, int checkMode)
+{
+    int         mode, i;
+    MV_STATUS   status;
+
+    mode = checkMode;
+    if(checkMode == CESA_FULL_CHECK_MODE)
+        mode = CESA_FAST_CHECK_MODE;
+    i = iter;
+    if(mode != CESA_NULL_CHECK_MODE)
+        i = 1;
+
+    testOpen(100);
+    testOpen(101);
+    testOpen(102);
+    testOpen(103);
+
+/* 3DES / ECB mode / Encrypt only */
+    status = testRun(100, 1, iter, reqSize, checkMode);
+    printTestResults(100, status, checkMode);
+
+/* 3DES / ECB mode / Decrypt only */
+    status = testRun(101, 1, iter, reqSize, checkMode);
+    printTestResults(101, status, checkMode);
+
+/* 3DES / CBC mode / Encrypt only */
+    status = testRun(102, 2, i, reqSize, mode);
+    printTestResults(102, status, mode);
+
+/* 3DES / CBC mode / Decrypt only */
+    status = testRun(103, 2, iter, reqSize, mode);
+    printTestResults(103, status, mode);
+
+    testClose(100);
+    testClose(101);
+    testClose(102);
+    testClose(103);
+}
+
+void    aesTest(int iter, int reqSize, int checkMode)
+{
+    MV_STATUS   status;
+    int         mode, i;
+
+    mode = checkMode;
+    if(checkMode == CESA_FULL_CHECK_MODE)
+        mode = CESA_FAST_CHECK_MODE;
+
+    i = iter;
+    if(mode != CESA_NULL_CHECK_MODE)
+        i = 1;
+
+    testOpen(200);
+    testOpen(201);
+    testOpen(202);
+    testOpen(203);
+    testOpen(204);
+    testOpen(205);
+    testOpen(206);
+    testOpen(207);
+    testOpen(208);
+
+/* AES-128 Encode ECB mode */
+    status = testRun(200, 3, iter, reqSize, checkMode);
+    printTestResults(200, status, checkMode);
+
+/* AES-128 Decode ECB mode */
+    status = testRun(201, 3, iter, reqSize, checkMode);
+    printTestResults(201, status, checkMode);
+
+/* AES-128 Encode CBC mode (IV from SA) */
+    status = testRun(202, 10, i, reqSize, mode);
+    printTestResults(202, status, mode);
+
+/* AES-128 Encode CBC mode (IV from User) */
+    status = testRun(202, 24, i, reqSize, mode);
+    printTestResults(202, status, mode);
+
+/* AES-128 Decode CBC mode */
+    status = testRun(203, 24, iter, reqSize, mode);
+    printTestResults(203, status, checkMode);
+
+/* AES-192 Encode ECB mode */
+    status = testRun(204, 4, iter, reqSize, checkMode);
+    printTestResults(204, status, checkMode);
+
+/* AES-192 Decode ECB mode */
+    status = testRun(205, 4, iter, reqSize, checkMode);
+    printTestResults(205, status, checkMode);
+
+/* AES-256 Encode ECB mode */
+    status = testRun(206, 5, iter, reqSize, checkMode);
+    printTestResults(206, status, checkMode);
+
+/* AES-256 Decode ECB mode */
+    status = testRun(207, 5, iter, reqSize, checkMode);
+    printTestResults(207, status, checkMode);
+
+#if defined(MV_LINUX)
+/* AES-128 Encode CTR mode */
+    status = testRun(208, 23, iter, reqSize, mode);
+    printTestResults(208, status, checkMode);
+#endif
+    testClose(200);
+    testClose(201);
+    testClose(202);
+    testClose(203);
+    testClose(204);
+    testClose(205);
+    testClose(206);
+    testClose(207);
+    testClose(208);
+}
+
+
+void    mdTest(int iter, int reqSize, int checkMode)
+{
+    int         mode;
+    MV_STATUS   status;
+
+    if(iter == 0)
+        iter = CESA_DEF_ITER_NUM;
+
+    mode = checkMode;
+    if(checkMode == CESA_FULL_CHECK_MODE)
+        mode = CESA_FAST_CHECK_MODE;
+
+    testOpen(300);
+    testOpen(301);
+    testOpen(302);
+    testOpen(303);
+    testOpen(305);
+
+/* HMAC-MD5 Generate signature test */
+    status = testRun(300, 6, iter, reqSize, mode);
+    printTestResults(300, status, checkMode);
+
+/* HMAC-MD5 Verify Signature test */
+    status = testRun(301, 7, iter, reqSize, mode);
+    printTestResults(301, status, checkMode);
+
+/* HMAC-MD5 Generate signature test */
+    status = testRun(302, 8, iter, reqSize, mode);
+    printTestResults(302, status, checkMode);
+
+/* HMAC-MD5 Verify Signature test */
+    status = testRun(303, 9, iter, reqSize, mode);
+    printTestResults(303, status, checkMode);
+
+/* HASH-MD5 Generate signature test */
+    status = testRun(305, 15, iter, reqSize, mode);
+    printTestResults(305, status, checkMode);
+
+    testClose(300);
+    testClose(301);
+    testClose(302);
+    testClose(303);
+    testClose(305);
+}
+
+void    shaTest(int iter, int reqSize, int checkMode)
+{
+    int         mode;
+    MV_STATUS   status;
+
+    if(iter == 0)
+        iter = CESA_DEF_ITER_NUM;
+
+    mode = checkMode;
+    if(checkMode == CESA_FULL_CHECK_MODE)
+        mode = CESA_FAST_CHECK_MODE;
+
+    testOpen(400);
+    testOpen(401);
+    testOpen(402);
+    testOpen(403);
+    testOpen(405);
+
+/* HMAC-SHA1 Generate signature test */
+    status = testRun(400, 11, iter, reqSize, mode);
+    printTestResults(400, status, checkMode);
+
+/* HMAC-SHA1 Verify Signature test */
+    status = testRun(401, 12, iter, reqSize, mode);
+    printTestResults(401, status, checkMode);
+
+/* HMAC-SHA1 Generate signature test */
+    status = testRun(402, 13, iter, reqSize, mode);
+    printTestResults(402, status, checkMode);
+
+/* HMAC-SHA1 Verify Signature test */
+    status = testRun(403, 14, iter, reqSize, mode);
+    printTestResults(403, status, checkMode);
+
+/* HMAC-SHA1 Generate signature test */
+    status = testRun(405, 16, iter, reqSize, mode);
+    printTestResults(405, status, checkMode);
+
+    testClose(400);
+    testClose(401);
+    testClose(402);
+    testClose(403);
+    testClose(405);
+}
+
+void    combiTest(int iter, int reqSize, int checkMode)
+{
+    MV_STATUS   status;
+    int         mode, i;
+
+    mode = checkMode;
+    if(checkMode == CESA_FULL_CHECK_MODE)
+        mode = CESA_FAST_CHECK_MODE;
+
+    if(iter == 0)
+        iter = CESA_DEF_ITER_NUM;
+
+    i = iter;
+    if(mode != CESA_NULL_CHECK_MODE)
+        i = 1;
+
+    testOpen(500);
+    testOpen(501);
+    testOpen(502);
+    testOpen(503);
+    testOpen(504);
+    testOpen(505);
+    testOpen(506);
+    testOpen(507);
+
+/* DES ECB + MD5 encode test */
+    status = testRun(500, 17, iter, reqSize, mode);
+    printTestResults(500, status, mode);
+
+/* DES ECB + SHA1 encode test */
+    status = testRun(501, 18, iter, reqSize, mode);
+    printTestResults(501, status, mode);
+
+/* 3DES ECB + MD5 encode test */
+    status = testRun(502, 17, iter, reqSize, mode);
+    printTestResults(502, status, mode);
+
+/* 3DES ECB + SHA1 encode test */
+    status = testRun(503, 18, iter, reqSize, mode);
+    printTestResults(503, status, mode);
+
+/* 3DES CBC + MD5 encode test */
+    status = testRun(504, 19, i, reqSize, mode);
+    printTestResults(504, status, mode);
+
+/* 3DES CBC + SHA1 encode test */
+    status = testRun(505, 20, i, reqSize, mode);
+    printTestResults(505, status, mode);
+
+/* AES-128 CBC + MD5 encode test */
+    status = testRun(506, 21, i, reqSize, mode);
+    printTestResults(506, status, mode);
+
+/* AES-128 CBC + SHA1 encode test */
+    status = testRun(507, 22, i, reqSize, mode);
+    printTestResults(507, status, mode);
+
+    testClose(500);
+    testClose(501);
+    testClose(502);
+    testClose(503);
+    testClose(504);
+    testClose(505);
+    testClose(506);
+    testClose(507);
+}
+
+void    cesaOneTest(int testIdx, int caseIdx,
+                    int iter, int reqSize, int checkMode)
+{
+    MV_STATUS   status;
+
+    if(iter == 0)
+        iter = CESA_DEF_ITER_NUM;
+
+    mvOsPrintf("test=%d, case=%d, size=%d, iter=%d\n",
+                testIdx, caseIdx, reqSize, iter);
+
+    status = testOpen(testIdx);
+
+    status = testRun(testIdx, caseIdx, iter, reqSize, checkMode);
+    printTestResults(testIdx, status, checkMode);
+    status = testClose(testIdx);
+
+}
+
+void    cesaTest(int iter, int reqSize, int checkMode)
+{
+    if(iter == 0)
+        iter = CESA_DEF_ITER_NUM;
+
+    mvOsPrintf("%d iteration\n", iter);
+    mvOsPrintf("%d size\n\n", reqSize);
+
+/* DES tests */
+    desTest(iter, reqSize, checkMode);
+
+/* 3DES tests */
+    tripleDesTest(iter, reqSize, checkMode);
+
+/* AES tests */
+    aesTest(iter, reqSize, checkMode);
+
+/* MD5 tests */
+    mdTest(iter, reqSize, checkMode);
+
+/* SHA-1 tests */
+    shaTest(iter, reqSize, checkMode);
+}
+
+void    multiSizeTest(int idx, int iter, int checkMode, char* inputData)
+{
+    MV_STATUS               status;
+    int                     i;
+    MV_CESA_SIZE_TEST*      pMultiTest;
+
+    if( testOpen(idx) != MV_OK)
+        return;
+
+    if(iter == 0)
+        iter = CESA_DEF_ITER_NUM;
+
+    if(checkMode == CESA_SHOW_CHECK_MODE)
+    {
+        iter = 1;
+    }
+    else
+        checkMode = CESA_FULL_CHECK_MODE;
+
+    cesaTestCases[0].plainHexStr = inputData;
+    cesaTestCases[0].pCryptoIV = NULL;
+
+    switch(idx)
+    {
+        case 302:
+            pMultiTest = mdMultiSizeTest302;
+            if(inputData == NULL)
+                cesaTestCases[0].plainHexStr = cesaDataHexStr3;
+            break;
+
+        case 304:
+            pMultiTest = mdMultiSizeTest304;
+            if(inputData == NULL)
+                cesaTestCases[0].plainHexStr = hashHexStr80;
+            break;
+
+        case 305:
+            pMultiTest = mdMultiSizeTest305;
+            if(inputData == NULL)
+                cesaTestCases[0].plainHexStr = hashHexStr80;
+            break;
+
+        case 402:
+            pMultiTest = shaMultiSizeTest402;
+            if(inputData == NULL)
+                cesaTestCases[0].plainHexStr = hashHexStr80;
+            break;
+
+        case 404:
+            pMultiTest = shaMultiSizeTest404;
+            if(inputData == NULL)
+                cesaTestCases[0].plainHexStr = hashHexStr80;
+            break;
+
+        case 405:
+            pMultiTest = shaMultiSizeTest405;
+            if(inputData == NULL)
+                cesaTestCases[0].plainHexStr = hashHexStr80;
+            break;
+
+        case 502:
+            pMultiTest = tripleDesMdMultiSizeTest502;
+            if(inputData == NULL)
+                cesaTestCases[0].plainHexStr = hashHexStr80;
+            break;
+
+        case 503:
+            pMultiTest = tripleDesShaMultiSizeTest503;
+            if(inputData == NULL)
+                cesaTestCases[0].plainHexStr = hashHexStr80;
+            break;
+
+        case 504:
+            iter = 1;
+            pMultiTest = cbc3desMdMultiSizeTest504;
+            cesaTestCases[0].pCryptoIV = iv1;
+            if(inputData == NULL)
+                cesaTestCases[0].plainHexStr = hashHexStr80;
+            break;
+
+        case 505:
+            iter = 1;
+            pMultiTest = cbc3desShaMultiSizeTest505;
+            cesaTestCases[0].pCryptoIV = iv1;
+            if(inputData == NULL)
+                cesaTestCases[0].plainHexStr = hashHexStr80;
+            break;
+
+        case 506:
+            iter = 1;
+            pMultiTest = cbcAes128md5multiSizeTest506;
+            cesaTestCases[0].pCryptoIV = iv5;
+            if(inputData == NULL)
+                cesaTestCases[0].plainHexStr = hashHexStr80;
+            break;
+
+        case 507:
+            iter = 1;
+            pMultiTest = cbcAes128sha1multiSizeTest507;
+            cesaTestCases[0].pCryptoIV = iv5;
+            if(inputData == NULL)
+                cesaTestCases[0].plainHexStr = hashHexStr80;
+            break;
+
+        default:
+            iter = 1;
+            checkMode = CESA_SHOW_CHECK_MODE;
+            pMultiTest = mdMultiSizeTest302;
+            if(inputData == NULL)
+                cesaTestCases[0].plainHexStr = hashHexStr80;
+    }
+    i = 0;
+    while(pMultiTest[i].outputHexStr != NULL)
+    {
+        cesaTestCases[0].cipherHexStr = pMultiTest[i].outputHexStr;
+        status = testRun(idx, 0, iter, pMultiTest[i].size,
+                         checkMode);
+        if(checkMode != CESA_SHOW_CHECK_MODE)
+        {
+            cesaReqSize = pMultiTest[i].size;
+            printTestResults(idx, status, checkMode);
+        }
+        if(status != MV_OK)
+            break;
+        i++;
+    }
+    testClose(idx);
+/*
+    mvCesaDebugStatus();
+    cesaTestPrintStatus();
+*/
+}
+
+void    open_session_test(int idx, int caseIdx, int iter)
+{
+    int         reqIdError, cryptoError, openErrors, i;
+    int         openErrDisp[100];
+    MV_STATUS   status;
+
+    memset(openErrDisp, 0, sizeof(openErrDisp));
+    openErrors = 0;
+    reqIdError = 0;
+    cryptoError = 0;
+    for(i=0; i<iter; i++)
+    {
+        status = testOpen(idx);
+        if(status != MV_OK)
+        {
+            openErrors++;
+            openErrDisp[status]++;
+        }
+        else
+        {
+            testRun(idx, caseIdx, 1, 0, CESA_FAST_CHECK_MODE);
+            if(cesaCryptoError > 0)
+                cryptoError++;
+            if(cesaReqIdError > 0)
+                reqIdError++;
+
+            testClose(idx);
+        }
+    }
+    if(cryptoError > 0)
+        mvOsPrintf("cryptoError : %d\n", cryptoError);
+    if(reqIdError > 0)
+        mvOsPrintf("reqIdError  : %d\n", reqIdError);
+
+    if(openErrors > 0)
+    {
+        mvOsPrintf("Open Errors = %d\n", openErrors);
+        for(i=0; i<100; i++)
+        {
+            if(openErrDisp[i] != 0)
+                mvOsPrintf("Error %d - occurs %d times\n", i, openErrDisp[i]);
+        }
+    }
+}
+
+
+void    loopback_test(int idx, int iter, int size, char* pPlainData)
+{
+}
+
+
+#if defined(MV_VXWORKS)
+int testMode = 0;
+unsigned __TASKCONV cesaTask(void* args)
+{
+    int reqSize = cesaReqSize;
+
+    if(testMode == 0)
+    {
+        cesaOneTest(cesaTestIdx, cesaCaseIdx, cesaIteration,
+                    reqSize, cesaCheckMode);
+    }
+    else
+    {
+        if(testMode == 1)
+        {
+            cesaTest(cesaIteration, reqSize, cesaCheckMode);
+            combiTest(cesaIteration, reqSize, cesaCheckMode);
+        }
+        else
+        {
+            multiSizeTest(cesaIdx, cesaIteration, cesaCheckMode, NULL);
+        }
+    }
+    return 0;
+}
+
+void oneTest(int testIdx, int caseIdx,
+              int iter, int reqSize, int checkMode)
+{
+    long    rc;
+
+    cesaIteration = iter;
+    cesaReqSize = cesaRateSize = reqSize;
+    cesaCheckMode = checkMode;
+    testMode = 0;
+    cesaTestIdx = testIdx;
+    cesaCaseIdx = caseIdx;
+    rc = mvOsTaskCreate("CESA_T", 100, 4*1024, cesaTask, NULL, &cesaTaskId);
+    if (rc != MV_OK)
+    {
+        mvOsPrintf("hMW: Can't create CESA multiCmd test task, rc = %ld\n", rc);
+    }
+}
+
+void multiTest(int iter, int reqSize, int checkMode)
+{
+    long    rc;
+
+    cesaIteration = iter;
+    cesaCheckMode = checkMode;
+    cesaReqSize = reqSize;
+    testMode = 1;
+    rc = mvOsTaskCreate("CESA_T", 100, 4*1024, cesaTask, NULL, &cesaTaskId);
+    if (rc != MV_OK)
+    {
+        mvOsPrintf("hMW: Can't create CESA multiCmd test task, rc = %ld\n", rc);
+    }
+}
+
+void sizeTest(int testIdx, int iter, int checkMode)
+{
+    long    rc;
+
+    cesaIteration = iter;
+        cesaCheckMode = checkMode;
+        testMode = 2;
+        cesaIdx = testIdx;
+    rc = mvOsTaskCreate("CESA_T", 100, 4*1024, cesaTask, NULL, &cesaTaskId);
+    if (rc != MV_OK)
+    {
+        mvOsPrintf("hMW: Can't create CESA test task, rc = %ld\n", rc);
+    }
+}
+
+#endif /* MV_VXWORKS */
+
+extern void    mvCesaDebugSA(short sid, int mode);
+void    cesaTestPrintSession(int idx)
+{
+    int                     testIdx;
+    MV_CESA_TEST_SESSION*   pTestSession;
+
+    pTestSession = getTestSessionDb(idx, &testIdx);
+    if(pTestSession == NULL)
+    {
+        mvOsPrintf("Test %d is not exist\n", idx);
+        return;
+    }
+    pTestSession = &pTestSession[testIdx];
+
+    if(pTestSession->sid == -1)
+    {
+        mvOsPrintf("Test session %d is not opened\n", idx);
+        return;
+    }
+
+    mvCesaDebugSA(pTestSession->sid, 1);
+}
+
+void    cesaTestPrintStatus(void)
+{
+    mvOsPrintf("\n\t Cesa Test Status\n\n");
+
+    mvOsPrintf("isrCount=%d\n",
+                cesaTestIsrCount);
+
+#ifdef CESA_TEST_DEBUG
+    {
+        int i, j;
+        j = cesaTestTraceIdx;
+        mvOsPrintf("No  Type  Cause   rCause   iCause   Res     Time     pReady    pProc    pEmpty\n");
+        for(i=0; i<MV_CESA_TEST_TRACE_SIZE; i++)
+        {
+            mvOsPrintf("%02d.  %d   0x%04x  0x%04x   0x%04x   0x%02x   0x%02x   %02d   0x%06x  %p  %p  %p\n",
+                j, cesaTestTrace[j].type, cesaTestTrace[j].cause, cesaTestTrace[j].realCause,
+                cesaTestTrace[j].dmaCause, cesaTestTrace[j].resources, cesaTestTrace[j].timeStamp,
+                cesaTestTrace[j].pReqReady, cesaTestTrace[j].pReqProcess, cesaTestTrace[j].pReqEmpty);
+            j++;
+            if(j == MV_CESA_TEST_TRACE_SIZE)
+                j = 0;
+        }
+    }
+#endif /* CESA_TEST_DEBUG */
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/Makefile
@@ -0,0 +1,8 @@
+include $(srctree)/$(subst ",,$(CONFIG_MV_HAL_RULES_PATH))
+# Objects list
+obj-$(CONFIG_MV_INCLUDE_CESA) += mvCesa.o
+obj-$(CONFIG_MV_INCLUDE_CESA) += mvCesaDebug.o
+obj-$(CONFIG_MV_INCLUDE_CESA) += mvMD5.o
+obj-$(CONFIG_MV_INCLUDE_CESA) += mvSHA1.o
+obj-$(CONFIG_MV_CESA_TEST) += mvCesaTest.o
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/mvCesaAddrDec.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/mvCesaAddrDec.c
@@ -0,0 +1,313 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+        this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvCesaRegs.h"
+
+#if (MV_CESA_VERSION >= 2)
+MV_TARGET tdmaAddrDecPrioTable[] =
+{
+#if defined(MV_INCLUDE_SDRAM_CS0)
+    SDRAM_CS0,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS1)
+    SDRAM_CS1,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS2)
+    SDRAM_CS2,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS3)
+    SDRAM_CS3,
+#endif
+#if defined(MV_INCLUDE_PEX)
+    PEX0_MEM, 
+    PEX1_MEM,
+#endif
+
+    TBL_TERM
+};
+
+static MV_STATUS cesaWinOverlapDetect(MV_U32 winNum, MV_ADDR_WIN *pAddrWin);
+
+
+/*******************************************************************************
+* mvCesaWinRead.
+*
+* DESCRIPTION:
+*       Read TDMA target address window.
+*
+* INPUT:
+*       winNum - TDMA target address decode window number.
+*
+* OUTPUT:
+*       pDecWin - TDMA target window data structure.
+*
+* RETURN:
+*	MV_BAD_PARAM if winNum is invalid.
+*	MV_ERROR otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvCesaWinRead(MV_U32 winNum, MV_UNIT_WIN_INFO *pDecWin)
+{                                                                                                                         
+    MV_U32  sizeReg, baseReg;
+    MV_U32  size;
+
+    /* Parameter checking   */
+    if (winNum >= MV_CESA_TDMA_ADDR_DEC_WIN) {
+	mvOsPrintf("%s : ERR. Invalid winNum %d\n",
+		__FUNCTION__, winNum);
+	return MV_NOT_SUPPORTED;
+    }
+
+    baseReg = MV_REG_READ( MV_CESA_TDMA_BASE_ADDR_REG(winNum) );
+    sizeReg = MV_REG_READ( MV_CESA_TDMA_WIN_CTRL_REG(winNum) );
+ 
+   /* Check if window is enabled   */
+    if(sizeReg & MV_CESA_TDMA_WIN_ENABLE_MASK) 
+    {
+        pDecWin->enable = MV_TRUE;
+
+        /* Extract window parameters from registers */
+        pDecWin->targetId = (sizeReg & MV_CESA_TDMA_WIN_TARGET_MASK) >> MV_CESA_TDMA_WIN_TARGET_OFFSET; 
+        pDecWin->attrib   = (sizeReg & MV_CESA_TDMA_WIN_ATTR_MASK) >> MV_CESA_TDMA_WIN_ATTR_OFFSET;
+
+	size = (sizeReg & MV_CESA_TDMA_WIN_SIZE_MASK) >> MV_CESA_TDMA_WIN_SIZE_OFFSET;
+        pDecWin->addrWin.size     = (size + 1) * (1 << MV_CESA_TDMA_WIN_SIZE_OFFSET);
+        pDecWin->addrWin.baseLow = (baseReg & MV_CESA_TDMA_WIN_BASE_MASK);
+ 	pDecWin->addrWin.baseHigh = 0;
+    }
+    else
+    {
+        pDecWin->enable = MV_FALSE;
+    }
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvCesaTdmaWinWrite
+*
+* DESCRIPTION:
+*	This function writes the address decoding registers according to the
+*	given window configuration.
+*
+* INPUT:
+*       pAddrDecWin - CESA TDMA target window data structure.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_OK on success,
+*	MV_BAD_PARAM if winNum is invalid or size is not a power of 2.
+*	MV_ERROR otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvCesaTdmaWinWrite(MV_U32 winNum, MV_UNIT_WIN_INFO *pDecWin)
+{
+    MV_U32              sizeReg, baseReg;
+    MV_U32		size;
+
+    /* Parameter checking   */
+    if (winNum >= MV_CESA_TDMA_ADDR_DEC_WIN) {
+        mvOsPrintf("mvCesaTdmaWinSet: ERR. Invalid win num %d\n",winNum);
+        return MV_BAD_PARAM;
+    }
+
+    /* Check if the requested window overlapps with current windows     */
+    if (MV_TRUE == cesaWinOverlapDetect(winNum, &pDecWin->addrWin))
+    {
+        mvOsPrintf("%s: ERR. Window %d overlap\n", __FUNCTION__, winNum);
+        return MV_ERROR;
+    }
+
+    /* check if address is aligned to the size */
+    if(MV_IS_NOT_ALIGN(pDecWin->addrWin.baseLow, pDecWin->addrWin.size)) {
+        mvOsPrintf("mvCesaTdmaWinSet: Error setting CESA TDMA window %d.\n"\
+                   "Address 0x%08x is unaligned to size 0x%x.\n",
+                   winNum,
+                   pDecWin->addrWin.baseLow,
+                   pDecWin->addrWin.size);
+        return MV_ERROR;
+    }
+    
+    if(!MV_IS_POWER_OF_2(pDecWin->addrWin.size)) {
+	mvOsPrintf("mvCesaTdmaWinWrite: Error setting CESA window %d. "\
+		    "Window size is not a power to 2.",winNum);
+	return MV_BAD_PARAM;
+    }
+
+    size = (pDecWin->addrWin.size / (1 << MV_CESA_TDMA_WIN_SIZE_OFFSET)) - 1;
+
+    /* set Size, Attributes and TargetID */
+    sizeReg = (((pDecWin->targetId << MV_CESA_TDMA_WIN_TARGET_OFFSET) & MV_CESA_TDMA_WIN_TARGET_MASK) |
+               ((pDecWin->attrib   << MV_CESA_TDMA_WIN_ATTR_OFFSET)   & MV_CESA_TDMA_WIN_ATTR_MASK)   |
+               ((size << MV_CESA_TDMA_WIN_SIZE_OFFSET) & MV_CESA_TDMA_WIN_SIZE_MASK));
+
+    if (pDecWin->enable == MV_TRUE)
+        sizeReg |= MV_CESA_TDMA_WIN_ENABLE_MASK;
+    else
+        sizeReg &= ~MV_CESA_TDMA_WIN_ENABLE_MASK;
+
+    /* Update Base value  */
+    baseReg = (pDecWin->addrWin.baseLow & MV_CESA_TDMA_WIN_BASE_MASK);     
+
+    MV_REG_WRITE( MV_CESA_TDMA_WIN_CTRL_REG(winNum), sizeReg);
+    MV_REG_WRITE( MV_CESA_TDMA_BASE_ADDR_REG(winNum), baseReg);
+
+    return MV_OK;
+}
+
+
+/*******************************************************************************
+* cesaWinOverlapDetect - Detect CESA TDMA address windows overlapping
+*
+* DESCRIPTION:
+*       An unpredicted behaviur is expected in case TDMA address decode 
+*       windows overlapps.
+*       This function detects TDMA address decode windows overlapping of a 
+*       specified window. The function does not check the window itself for 
+*       overlapping. The function also skipps disabled address decode windows.
+*
+* INPUT:
+*       winNum      - address decode window number.
+*       pAddrDecWin - An address decode window struct.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE     - if the given address window overlap current address
+*                   decode map, 
+*       MV_FALSE    - otherwise, MV_ERROR if reading invalid data 
+*                   from registers.
+*
+*******************************************************************************/
+static MV_STATUS cesaWinOverlapDetect(MV_U32 winNum, MV_ADDR_WIN *pAddrWin)
+{
+    MV_U32          	winNumIndex;
+    MV_UNIT_WIN_INFO	addrDecWin;
+
+    for(winNumIndex=0; winNumIndex<MV_CESA_TDMA_ADDR_DEC_WIN; winNumIndex++)
+    {
+        /* Do not check window itself       */
+        if (winNumIndex == winNum)
+        {
+            continue;
+        }
+
+        /* Get window parameters    */
+        if (MV_OK != mvCesaWinRead(winNumIndex, &addrDecWin))
+        {
+            mvOsPrintf("%s: ERR. TargetWinGet failed\n", __FUNCTION__);
+            return MV_ERROR;
+        }
+
+        /* Do not check disabled windows    */
+        if(addrDecWin.enable == MV_FALSE)
+        {
+            continue;
+        }
+
+        if (MV_TRUE == mvWinOverlapTest(pAddrWin, &(addrDecWin.addrWin)))
+        {
+            return MV_TRUE;
+        }        
+    }
+    return MV_FALSE;
+}
+
+
+
+MV_STATUS mvCesaTdmaWinInit (MV_UNIT_WIN_INFO *addrWinMap)
+{
+    MV_U32		winNum;
+    MV_UNIT_WIN_INFO	*addrDecWin;
+    MV_U32		winPrioIndex = 0;
+
+    /* First disable all address decode windows */
+    for(winNum=0; winNum<MV_CESA_TDMA_ADDR_DEC_WIN; winNum++)
+	MV_REG_BIT_RESET(MV_CESA_TDMA_WIN_CTRL_REG(winNum), MV_CESA_TDMA_WIN_ENABLE_MASK);
+
+    /* Go through all windows in user table until table terminator      */
+    winNum = 0;
+    while( (tdmaAddrDecPrioTable[winPrioIndex] != TBL_TERM) && 
+           (winNum < MV_CESA_TDMA_ADDR_DEC_WIN) ) {
+
+	addrDecWin = &addrWinMap[tdmaAddrDecPrioTable[winPrioIndex]];
+	if (addrDecWin->enable == MV_TRUE) {
+	    if(MV_OK != mvCesaTdmaWinWrite(winNum, addrDecWin)) {
+		mvOsPrintf("mvCesaTdmaWinSet FAILED: winNum=%d\n",
+			winNum);
+		return MV_ERROR;
+            }
+	    winNum++;
+	}
+	winPrioIndex++;
+    }
+    return MV_OK;
+}
+#endif /* MV_CESA_VERSION >= 2 */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/mvCompVer.txt
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/mvCompVer.txt
@@ -0,0 +1,4 @@
+Global HAL Version: DOVE_HAL_3_1_2
+Unit HAL Version: 1.0.2
+Description: This component includes an implementation of the unit HAL drivers
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/mvCesa.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/mvCesa.h
@@ -0,0 +1,401 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+/*******************************************************************************
+* mvCesa.h - Header File for Cryptographic Engines and Security Accelerator
+*
+* DESCRIPTION:
+*       This header file contains macros typedefs and function declaration for
+*       the Marvell Cryptographic Engines and Security Accelerator.
+*
+*******************************************************************************/
+
+#ifndef __mvCesa_h__
+#define __mvCesa_h__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvSysCesaConfig.h"
+#include "mvCesaRegs.h"
+
+typedef struct {
+	MV_U16		ctrlModel;	/* Controller Model 	*/
+	MV_U8		ctrlRev;	/* Controller Revision	*/
+}MV_CESA_HAL_DATA;
+
+#ifndef MV_INCLUDE_IDMA
+/* Redefine MV_DMA_DESC structure */
+typedef struct _mvDmaDesc
+{
+    MV_U32 	byteCnt;        /* The total number of bytes to transfer        */
+    MV_U32 	phySrcAdd;	    /* The physical source address                  */
+    MV_U32 	phyDestAdd;     /* The physical destination address             */
+    MV_U32	phyNextDescPtr; /* If we are using chain mode DMA transfer,     */
+				            /* then this pointer should point to the        */
+                            /* physical address of the next descriptor,     */
+                            /* otherwise it should be NULL.                 */
+}MV_DMA_DESC;
+#endif /* MV_INCLUDE_IDMA */
+
+#define MV_CESA_AUTH_BLOCK_SIZE         64 /* bytes */
+
+#define MV_CESA_MD5_DIGEST_SIZE         16 /* bytes */
+#define MV_CESA_SHA1_DIGEST_SIZE        20 /* bytes */
+
+#define MV_CESA_MAX_DIGEST_SIZE         MV_CESA_SHA1_DIGEST_SIZE
+
+#define MV_CESA_DES_KEY_LENGTH          8   /* bytes = 64 bits */
+#define MV_CESA_3DES_KEY_LENGTH         24  /* bytes = 192 bits */
+#define MV_CESA_AES_128_KEY_LENGTH      16  /* bytes = 128 bits */
+#define MV_CESA_AES_192_KEY_LENGTH      24  /* bytes = 192 bits */
+#define MV_CESA_AES_256_KEY_LENGTH      32  /* bytes = 256 bits */
+
+#define MV_CESA_MAX_CRYPTO_KEY_LENGTH   MV_CESA_AES_256_KEY_LENGTH
+
+#define MV_CESA_DES_BLOCK_SIZE          8 /* bytes = 64 bits */
+#define MV_CESA_3DES_BLOCK_SIZE         8 /* bytes = 64 bits */
+
+#define MV_CESA_AES_BLOCK_SIZE          16 /* bytes = 128 bits */
+
+#define MV_CESA_MAX_IV_LENGTH           MV_CESA_AES_BLOCK_SIZE
+
+#define MV_CESA_MAX_MAC_KEY_LENGTH      64 /* bytes */
+
+typedef struct
+{
+	MV_U8               cryptoKey[MV_CESA_MAX_CRYPTO_KEY_LENGTH];
+	MV_U8               macKey[MV_CESA_MAX_MAC_KEY_LENGTH];
+	MV_CESA_OPERATION   operation;
+	MV_CESA_DIRECTION   direction;
+	MV_CESA_CRYPTO_ALG  cryptoAlgorithm;
+	MV_CESA_CRYPTO_MODE cryptoMode;
+   	MV_U8               cryptoKeyLength;
+	MV_CESA_MAC_MODE    macMode;
+	MV_U8               macKeyLength;
+	MV_U8               digestSize;
+
+} MV_CESA_OPEN_SESSION;
+
+typedef struct
+{
+    MV_BUF_INFO *pFrags;
+	MV_U16	    numFrags;
+    MV_U16      mbufSize;
+
+} MV_CESA_MBUF;
+
+typedef struct
+{
+    void* 	pReqPrv; /* instead of reqId */
+    MV_U32 	retCode;
+    MV_16   sessionId;
+
+} MV_CESA_RESULT;
+
+typedef void    (*MV_CESA_CALLBACK) (MV_CESA_RESULT* pResult);
+
+
+typedef struct
+{
+    void*               pReqPrv;    /* instead of reqId */
+    MV_CESA_MBUF*       pSrc;
+    MV_CESA_MBUF*       pDst;
+    MV_CESA_CALLBACK*   pFuncCB;
+    MV_16               sessionId;
+    MV_U16              ivFromUser;
+    MV_U16              ivOffset;
+    MV_U16              cryptoOffset;
+    MV_U16              cryptoLength;
+    MV_U16              digestOffset;
+    MV_U16              macOffset;
+    MV_U16              macLength;
+
+} MV_CESA_COMMAND;
+
+
+MV_STATUS mvCesaHalInit (int numOfSession, int queueDepth, char* pSramBase, MV_U32 cryptEngBase,
+		void *osHandle, MV_CESA_HAL_DATA *halData);
+MV_STATUS   mvCesaTdmaWinInit (MV_UNIT_WIN_INFO *addrWinMap);
+MV_STATUS   mvCesaFinish (void);
+MV_STATUS   mvCesaSessionOpen(MV_CESA_OPEN_SESSION *pSession, short* pSid);
+MV_STATUS   mvCesaSessionClose(short sid);
+MV_STATUS   mvCesaCryptoIvSet(MV_U8* pIV, int ivSize);
+
+MV_STATUS   mvCesaAction (MV_CESA_COMMAND* pCmd);
+
+MV_U32      mvCesaInProcessGet(void);
+MV_STATUS   mvCesaReadyDispatch(void);
+MV_STATUS   mvCesaReadyGet(MV_CESA_RESULT* pResult);
+MV_BOOL     mvCesaIsReady(void);
+
+int     	mvCesaMbufOffset(MV_CESA_MBUF* pMbuf, int offset, int* pBufOffset);
+MV_STATUS   mvCesaCopyFromMbuf(MV_U8* pDst, MV_CESA_MBUF* pSrcMbuf,
+                               int offset, int size);
+MV_STATUS   mvCesaCopyToMbuf(MV_U8* pSrc, MV_CESA_MBUF* pDstMbuf,
+                               int offset, int size);
+MV_STATUS   mvCesaMbufCopy(MV_CESA_MBUF* pMbufDst, int dstMbufOffset,
+                           MV_CESA_MBUF* pMbufSrc, int srcMbufOffset, int size);
+
+/********** Debug functions ********/
+
+void        mvCesaDebugMbuf(const char* str, MV_CESA_MBUF *pMbuf, int offset, int size);
+void        mvCesaDebugSA(short sid, int mode);
+void        mvCesaDebugStats(void);
+void        mvCesaDebugStatsClear(void);
+void        mvCesaDebugRegs(void);
+void        mvCesaDebugStatus(void);
+void        mvCesaDebugQueue(int mode);
+void        mvCesaDebugSram(int mode);
+void        mvCesaDebugSAD(int mode);
+
+
+/********  CESA Private definitions ********/
+#if (MV_CESA_VERSION >= 2)
+#if (MV_CACHE_COHERENCY  == MV_CACHE_COHER_SW)
+#define MV_CESA_TDMA_CTRL_VALUE       MV_CESA_TDMA_DST_BURST_MASK(MV_CESA_TDMA_BURST_128B) \
+                                    | MV_CESA_TDMA_SRC_BURST_MASK(MV_CESA_TDMA_BURST_128B) \
+                                    | MV_CESA_TDMA_OUTSTAND_READ_EN_MASK                   \
+				    | MV_CESA_TDMA_NO_BYTE_SWAP_MASK			   \
+                                    | MV_CESA_TDMA_ENABLE_MASK
+#else
+#define MV_CESA_TDMA_CTRL_VALUE       MV_CESA_TDMA_DST_BURST_MASK(MV_CESA_TDMA_BURST_32B)  \
+                                    | MV_CESA_TDMA_SRC_BURST_MASK(MV_CESA_TDMA_BURST_128B) \
+                                    /*| MV_CESA_TDMA_OUTSTAND_READ_EN_MASK                   */\
+                                    | MV_CESA_TDMA_ENABLE_MASK
+
+#endif
+#else
+#define MV_CESA_IDMA_CTRL_LOW_VALUE   ICCLR_DST_BURST_LIM_128BYTE   \
+                                    | ICCLR_SRC_BURST_LIM_128BYTE   \
+                                    | ICCLR_INT_MODE_MASK           \
+                                    | ICCLR_BLOCK_MODE              \
+                                    | ICCLR_CHAN_ENABLE             \
+                                    | ICCLR_DESC_MODE_16M
+#endif /* MV_CESA_VERSION >= 2 */
+
+#define MV_CESA_MAX_PKT_SIZE        (64 * 1024)
+#define MV_CESA_MAX_MBUF_FRAGS      20
+
+#define MV_CESA_MAX_REQ_FRAGS       ( (MV_CESA_MAX_PKT_SIZE / MV_CESA_MAX_BUF_SIZE) + 1)
+
+#define MV_CESA_MAX_DMA_DESC    (MV_CESA_MAX_MBUF_FRAGS*2 + 5)
+
+typedef enum
+{
+    MV_CESA_IDLE     = 0,
+    MV_CESA_PENDING,
+    MV_CESA_PROCESS,
+    MV_CESA_READY,
+
+} MV_CESA_STATE;
+
+
+/* Session database */
+
+/* Map of Key materials of the session in SRAM.
+ * Each field must be 8 byte aligned
+ * Total size: 32 + 24 + 24 = 80 bytes
+ */
+typedef struct
+{
+    MV_U8  cryptoKey[MV_CESA_MAX_CRYPTO_KEY_LENGTH];
+    MV_U8  macInnerIV[MV_CESA_MAX_DIGEST_SIZE];
+    MV_U8  reservedInner[4];
+    MV_U8  macOuterIV[MV_CESA_MAX_DIGEST_SIZE];
+    MV_U8  reservedOuter[4];
+
+} MV_CESA_SRAM_SA;
+
+typedef struct
+{
+    MV_CESA_SRAM_SA*    pSramSA;
+    MV_U32              config;
+    MV_U8               cryptoKeyLength;
+    MV_U8               cryptoIvSize;
+    MV_U8               cryptoBlockSize;
+    MV_U8               digestSize;
+    MV_U8               macKeyLength;
+    MV_U8               valid;
+    MV_U8               ctrMode;
+    MV_U32              count;
+
+} MV_CESA_SA;
+
+/* DMA list management */
+typedef struct
+{
+    MV_DMA_DESC*    pDmaFirst;
+    MV_DMA_DESC*    pDmaLast;
+
+} MV_CESA_DMA;
+
+
+typedef struct
+{
+    MV_U8               numFrag;
+    MV_U8               nextFrag;
+    int                 bufOffset;
+    int                 cryptoSize;
+    int                 macSize;
+    int                 newDigestOffset;
+    MV_U8               orgDigest[MV_CESA_MAX_DIGEST_SIZE];
+
+} MV_CESA_FRAGS;
+
+/* Request queue */
+typedef struct
+{
+    MV_U8               state;
+    MV_U8               fragMode;
+    MV_U8               fixOffset;
+    MV_CESA_COMMAND*    pCmd;
+    MV_CESA_COMMAND*    pOrgCmd;
+    MV_BUF_INFO         dmaDescBuf;
+    MV_CESA_DMA         dma[MV_CESA_MAX_REQ_FRAGS];
+    MV_BUF_INFO         cesaDescBuf;
+    MV_CESA_DESC*       pCesaDesc;
+    MV_CESA_FRAGS       frags;
+
+
+} MV_CESA_REQ;
+
+
+/* SRAM map */
+/* Total SRAM size calculation */
+/*  SRAM size =
+ *              MV_CESA_MAX_BUF_SIZE  +
+ *              sizeof(MV_CESA_DESC)  +
+ *              MV_CESA_MAX_IV_LENGTH +
+ *              MV_CESA_MAX_IV_LENGTH +
+ *              MV_CESA_MAX_DIGEST_SIZE +
+ *              sizeof(MV_CESA_SRAM_SA)
+ *            = 1600 + 32 + 16 + 16 + 24 + 80 + 280 (reserved) = 2048 bytes
+ *            = 3200 + 32 + 16 + 16 + 24 + 80 + 728 (reserved) = 4096 bytes
+ */
+typedef struct
+{
+    MV_U8               buf[MV_CESA_MAX_BUF_SIZE];
+    MV_CESA_DESC        desc;
+    MV_U8               cryptoIV[MV_CESA_MAX_IV_LENGTH];
+    MV_U8               tempCryptoIV[MV_CESA_MAX_IV_LENGTH];
+    MV_U8               tempDigest[MV_CESA_MAX_DIGEST_SIZE+4];
+    MV_CESA_SRAM_SA     sramSA;
+
+} MV_CESA_SRAM_MAP;
+
+
+typedef struct
+{
+    MV_U32  openedCount;
+    MV_U32  closedCount;
+    MV_U32  fragCount;
+    MV_U32  reqCount;
+    MV_U32  maxReqCount;
+    MV_U32  procCount;
+    MV_U32  readyCount;
+    MV_U32  notReadyCount;
+    MV_U32  startCount;
+
+} MV_CESA_STATS;
+
+
+/* External variables */
+
+extern MV_CESA_STATS    cesaStats;
+extern MV_CESA_FRAGS    cesaFrags;
+
+extern MV_BUF_INFO      cesaSramSaBuf;
+
+extern MV_CESA_SA*       pCesaSAD;
+extern MV_U16            cesaMaxSA;
+
+extern MV_CESA_REQ*      pCesaReqFirst;
+extern MV_CESA_REQ*      pCesaReqLast;
+extern MV_CESA_REQ*      pCesaReqEmpty;
+extern MV_CESA_REQ*      pCesaReqProcess;
+extern int               cesaQueueDepth;
+extern int               cesaReqResources;
+
+extern MV_CESA_SRAM_MAP*  cesaSramVirtPtr;
+extern MV_U32           cesaSramPhysAddr;
+
+static INLINE MV_ULONG  mvCesaVirtToPhys(MV_BUF_INFO* pBufInfo, void* pVirt)
+{
+    return (pBufInfo->bufPhysAddr + ((MV_U8*)pVirt - pBufInfo->bufVirtPtr));
+}
+
+/* Additional DEBUG functions */
+void        mvCesaDebugSramSA(MV_CESA_SRAM_SA* pSramSA, int mode);
+void        mvCesaDebugCmd(MV_CESA_COMMAND* pCmd,  int mode);
+void        mvCesaDebugDescriptor(MV_CESA_DESC* pDesc);
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* __mvCesa_h__ */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/AES/mvAesAlg.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/AES/mvAesAlg.c
@@ -0,0 +1,316 @@
+/* rijndael-alg-ref.c   v2.0   August '99
+ * Reference ANSI C code
+ * authors: Paulo Barreto
+ *          Vincent Rijmen, K.U.Leuven
+ *
+ * This code is placed in the public domain.
+ */
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "mvAesAlg.h"
+#include "mvAesBoxes.dat"
+
+
+MV_U8 mul1(MV_U8 aa, MV_U8 bb);
+void KeyAddition(MV_U8 a[4][MAXBC], MV_U8 rk[4][MAXBC], MV_U8 BC);
+void ShiftRow128Enc(MV_U8 a[4][MAXBC]);
+void ShiftRow128Dec(MV_U8 a[4][MAXBC]);
+void Substitution(MV_U8 a[4][MAXBC], MV_U8 box[256]);
+void MixColumn(MV_U8 a[4][MAXBC], MV_U8 rk[4][MAXBC]);
+void InvMixColumn(MV_U8 a[4][MAXBC]);
+
+
+#define mul(aa, bb) (mask[bb] & Alogtable[aa + Logtable[bb]])
+                         
+MV_U8 mul1(MV_U8 aa, MV_U8 bb)
+{
+    return mask[bb] & Alogtable[aa + Logtable[bb]];
+}
+
+
+void KeyAddition(MV_U8 a[4][MAXBC], MV_U8 rk[4][MAXBC], MV_U8 BC) 
+{
+	/* Exor corresponding text input and round key input bytes
+	 */
+    ((MV_U32*)(&(a[0][0])))[0] ^= ((MV_U32*)(&(rk[0][0])))[0];
+    ((MV_U32*)(&(a[1][0])))[0] ^= ((MV_U32*)(&(rk[1][0])))[0];
+    ((MV_U32*)(&(a[2][0])))[0] ^= ((MV_U32*)(&(rk[2][0])))[0];
+    ((MV_U32*)(&(a[3][0])))[0] ^= ((MV_U32*)(&(rk[3][0])))[0];
+
+}
+
+void ShiftRow128Enc(MV_U8 a[4][MAXBC]) {
+	/* Row 0 remains unchanged
+	 * The other three rows are shifted a variable amount
+	 */
+	MV_U8 tmp[MAXBC];
+	
+    tmp[0] = a[1][1];
+    tmp[1] = a[1][2];
+    tmp[2] = a[1][3];
+    tmp[3] = a[1][0];
+
+    ((MV_U32*)(&(a[1][0])))[0] = ((MV_U32*)(&(tmp[0])))[0];
+     /*
+    a[1][0] = tmp[0];
+    a[1][1] = tmp[1];
+    a[1][2] = tmp[2];
+    a[1][3] = tmp[3];
+       */
+    tmp[0] = a[2][2];
+    tmp[1] = a[2][3];
+    tmp[2] = a[2][0];
+    tmp[3] = a[2][1];
+
+    ((MV_U32*)(&(a[2][0])))[0] = ((MV_U32*)(&(tmp[0])))[0];
+      /*
+    a[2][0] = tmp[0];
+    a[2][1] = tmp[1];
+    a[2][2] = tmp[2];
+    a[2][3] = tmp[3];
+    */
+    tmp[0] = a[3][3];
+    tmp[1] = a[3][0];
+    tmp[2] = a[3][1];
+    tmp[3] = a[3][2];
+
+    ((MV_U32*)(&(a[3][0])))[0] = ((MV_U32*)(&(tmp[0])))[0];
+    /*
+    a[3][0] = tmp[0];
+    a[3][1] = tmp[1];
+    a[3][2] = tmp[2];
+    a[3][3] = tmp[3];
+    */
+}  
+
+void ShiftRow128Dec(MV_U8 a[4][MAXBC]) {
+	/* Row 0 remains unchanged
+	 * The other three rows are shifted a variable amount
+	 */
+   	MV_U8 tmp[MAXBC];
+	
+    tmp[0] = a[1][3];
+    tmp[1] = a[1][0];
+    tmp[2] = a[1][1];
+    tmp[3] = a[1][2];
+
+    ((MV_U32*)(&(a[1][0])))[0] = ((MV_U32*)(&(tmp[0])))[0];
+    /*
+    a[1][0] = tmp[0];
+    a[1][1] = tmp[1];
+    a[1][2] = tmp[2];
+    a[1][3] = tmp[3];
+    */
+
+    tmp[0] = a[2][2];
+    tmp[1] = a[2][3];
+    tmp[2] = a[2][0];
+    tmp[3] = a[2][1];
+
+    ((MV_U32*)(&(a[2][0])))[0] = ((MV_U32*)(&(tmp[0])))[0];
+    /*
+    a[2][0] = tmp[0];
+    a[2][1] = tmp[1];
+    a[2][2] = tmp[2];
+    a[2][3] = tmp[3];
+    */
+
+    tmp[0] = a[3][1];
+    tmp[1] = a[3][2];
+    tmp[2] = a[3][3];
+    tmp[3] = a[3][0];
+
+    ((MV_U32*)(&(a[3][0])))[0] = ((MV_U32*)(&(tmp[0])))[0];
+    /*
+    a[3][0] = tmp[0];
+    a[3][1] = tmp[1];
+    a[3][2] = tmp[2];
+    a[3][3] = tmp[3];
+    */
+}  
+
+void Substitution(MV_U8 a[4][MAXBC], MV_U8 box[256]) {
+	/* Replace every byte of the input by the byte at that place
+	 * in the nonlinear S-box
+	 */
+	int i, j;
+	
+	for(i = 0; i < 4; i++)
+		for(j = 0; j < 4; j++) a[i][j] = box[a[i][j]] ;
+}
+   
+void MixColumn(MV_U8 a[4][MAXBC], MV_U8 rk[4][MAXBC]) {
+        /* Mix the four bytes of every column in a linear way
+	 */
+	MV_U8 b[4][MAXBC];
+	int i, j;
+		
+	for(j = 0; j < 4; j++){
+        b[0][j] = mul(25,a[0][j]) ^ mul(1,a[1][j]) ^ a[2][j] ^ a[3][j];
+        b[1][j] = mul(25,a[1][j]) ^ mul(1,a[2][j]) ^ a[3][j] ^ a[0][j];
+        b[2][j] = mul(25,a[2][j]) ^ mul(1,a[3][j]) ^ a[0][j] ^ a[1][j];
+        b[3][j] = mul(25,a[3][j]) ^ mul(1,a[0][j]) ^ a[1][j] ^ a[2][j];
+    }
+	for(i = 0; i < 4; i++)
+		/*for(j = 0; j < BC; j++) a[i][j] = b[i][j];*/
+        ((MV_U32*)(&(a[i][0])))[0] = ((MV_U32*)(&(b[i][0])))[0] ^ ((MV_U32*)(&(rk[i][0])))[0];;
+}
+
+void InvMixColumn(MV_U8 a[4][MAXBC]) {
+        /* Mix the four bytes of every column in a linear way
+	 * This is the opposite operation of Mixcolumn
+	 */
+	MV_U8 b[4][MAXBC];
+	int i, j;
+	
+	for(j = 0; j < 4; j++){
+        b[0][j] = mul(223,a[0][j]) ^ mul(104,a[1][j]) ^ mul(238,a[2][j]) ^ mul(199,a[3][j]);
+        b[1][j] = mul(223,a[1][j]) ^ mul(104,a[2][j]) ^ mul(238,a[3][j]) ^ mul(199,a[0][j]);
+        b[2][j] = mul(223,a[2][j]) ^ mul(104,a[3][j]) ^ mul(238,a[0][j]) ^ mul(199,a[1][j]);
+        b[3][j] = mul(223,a[3][j]) ^ mul(104,a[0][j]) ^ mul(238,a[1][j]) ^ mul(199,a[2][j]);
+    }
+	for(i = 0; i < 4; i++)
+		/*for(j = 0; j < BC; j++) a[i][j] = b[i][j];*/
+        ((MV_U32*)(&(a[i][0])))[0] = ((MV_U32*)(&(b[i][0])))[0];
+}
+
+int rijndaelKeySched (MV_U8 k[4][MAXKC], int keyBits, int blockBits, MV_U8 W[MAXROUNDS+1][4][MAXBC]) 
+{
+	/* Calculate the necessary round keys
+	 * The number of calculations depends on keyBits and blockBits
+	 */
+	int KC, BC, ROUNDS;
+	int i, j, t, rconpointer = 0;
+	MV_U8 tk[4][MAXKC];   
+
+	switch (keyBits) {
+	case 128: KC = 4; break;
+	case 192: KC = 6; break;
+	case 256: KC = 8; break;
+	default : return (-1);
+	}
+
+	switch (blockBits) {
+	case 128: BC = 4; break;
+	case 192: BC = 6; break;
+	case 256: BC = 8; break;
+	default : return (-2);
+	}
+
+	switch (keyBits >= blockBits ? keyBits : blockBits) {
+	case 128: ROUNDS = 10; break;
+	case 192: ROUNDS = 12; break;
+	case 256: ROUNDS = 14; break;
+	default : return (-3); /* this cannot happen */
+	}
+
+	
+	for(j = 0; j < KC; j++)
+		for(i = 0; i < 4; i++)
+			tk[i][j] = k[i][j];
+	t = 0;
+	/* copy values into round key array */
+	for(j = 0; (j < KC) && (t < (ROUNDS+1)*BC); j++, t++)
+		for(i = 0; i < 4; i++) W[t / BC][i][t % BC] = tk[i][j];
+		
+	while (t < (ROUNDS+1)*BC) { /* while not enough round key material calculated */
+		/* calculate new values */
+		for(i = 0; i < 4; i++)
+			tk[i][0] ^= S[tk[(i+1)%4][KC-1]];
+		tk[0][0] ^= rcon[rconpointer++];
+
+		if (KC != 8)
+			for(j = 1; j < KC; j++)
+				for(i = 0; i < 4; i++) tk[i][j] ^= tk[i][j-1];
+		else {
+			for(j = 1; j < KC/2; j++)
+				for(i = 0; i < 4; i++) tk[i][j] ^= tk[i][j-1];
+			for(i = 0; i < 4; i++) tk[i][KC/2] ^= S[tk[i][KC/2 - 1]];
+			for(j = KC/2 + 1; j < KC; j++)
+				for(i = 0; i < 4; i++) tk[i][j] ^= tk[i][j-1];
+	}
+	/* copy values into round key array */
+	for(j = 0; (j < KC) && (t < (ROUNDS+1)*BC); j++, t++)
+		for(i = 0; i < 4; i++) W[t / BC][i][t % BC] = tk[i][j];
+	}		
+
+	return 0;
+}
+      
+        
+
+int rijndaelEncrypt128(MV_U8 a[4][MAXBC], MV_U8 rk[MAXROUNDS+1][4][MAXBC], int rounds)
+{
+	/* Encryption of one block. 
+	 */
+	int r, BC, ROUNDS;
+
+    BC = 4;
+    ROUNDS = rounds;
+
+	/* begin with a key addition
+	 */
+
+	KeyAddition(a,rk[0],BC); 
+
+    /* ROUNDS-1 ordinary rounds
+	 */
+	for(r = 1; r < ROUNDS; r++) {
+		Substitution(a,S);
+		ShiftRow128Enc(a);
+		MixColumn(a, rk[r]);
+		/*KeyAddition(a,rk[r],BC);*/
+	}
+	
+	/* Last round is special: there is no MixColumn
+	 */
+	Substitution(a,S);
+	ShiftRow128Enc(a);
+	KeyAddition(a,rk[ROUNDS],BC);
+
+	return 0;
+}   
+
+
+int rijndaelDecrypt128(MV_U8 a[4][MAXBC], MV_U8 rk[MAXROUNDS+1][4][MAXBC], int rounds)
+{
+	int r, BC, ROUNDS;
+	
+    BC = 4;
+    ROUNDS = rounds;
+
+	/* To decrypt: apply the inverse operations of the encrypt routine,
+	 *             in opposite order
+	 * 
+	 * (KeyAddition is an involution: it 's equal to its inverse)
+	 * (the inverse of Substitution with table S is Substitution with the inverse table of S)
+	 * (the inverse of Shiftrow is Shiftrow over a suitable distance)
+	 */
+
+        /* First the special round:
+	 *   without InvMixColumn
+	 *   with extra KeyAddition
+	 */
+	KeyAddition(a,rk[ROUNDS],BC);
+    ShiftRow128Dec(a);               
+	Substitution(a,Si);
+	
+	/* ROUNDS-1 ordinary rounds
+	 */
+	for(r = ROUNDS-1; r > 0; r--) {
+		KeyAddition(a,rk[r],BC);
+		InvMixColumn(a);      
+		ShiftRow128Dec(a);               
+		Substitution(a,Si);
+
+	}
+	
+	/* End with the extra key addition
+	 */
+	
+	KeyAddition(a,rk[0],BC);    
+
+	return 0;
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/AES/mvAesAlg.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/AES/mvAesAlg.h
@@ -0,0 +1,27 @@
+/* rijndael-alg-ref.h   v2.0   August '99
+ * Reference ANSI C code
+ * authors: Paulo Barreto
+ *          Vincent Rijmen, K.U.Leuven
+ */
+#ifndef __RIJNDAEL_ALG_H
+#define __RIJNDAEL_ALG_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define MAXBC				(128/32)
+#define MAXKC				(256/32)
+#define MAXROUNDS			14
+
+
+int rijndaelKeySched (MV_U8 k[4][MAXKC], int keyBits, int blockBits, MV_U8 rk[MAXROUNDS+1][4][MAXBC]);
+
+int rijndaelEncrypt128(MV_U8 a[4][MAXBC], MV_U8 rk[MAXROUNDS+1][4][MAXBC], int rounds);
+int rijndaelDecrypt128(MV_U8 a[4][MAXBC], MV_U8 rk[MAXROUNDS+1][4][MAXBC], int rounds);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __RIJNDAEL_ALG_H */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/AES/mvAesBoxes.dat
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/AES/mvAesBoxes.dat
@@ -0,0 +1,123 @@
+static MV_U8 mask[256] = {
+0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+};
+
+static MV_U8 Logtable[256] = {
+  0,   0,  25,   1,  50,   2,  26, 198,  75, 199,  27, 104,  51, 238, 223,   3, 
+100,   4, 224,  14,  52, 141, 129, 239,  76, 113,   8, 200, 248, 105,  28, 193, 
+125, 194,  29, 181, 249, 185,  39, 106,  77, 228, 166, 114, 154, 201,   9, 120, 
+101,  47, 138,   5,  33,  15, 225,  36,  18, 240, 130,  69,  53, 147, 218, 142, 
+150, 143, 219, 189,  54, 208, 206, 148,  19,  92, 210, 241,  64,  70, 131,  56, 
+102, 221, 253,  48, 191,   6, 139,  98, 179,  37, 226, 152,  34, 136, 145,  16, 
+126, 110,  72, 195, 163, 182,  30,  66,  58, 107,  40,  84, 250, 133,  61, 186, 
+ 43, 121,  10,  21, 155, 159,  94, 202,  78, 212, 172, 229, 243, 115, 167,  87, 
+175,  88, 168,  80, 244, 234, 214, 116,  79, 174, 233, 213, 231, 230, 173, 232, 
+ 44, 215, 117, 122, 235,  22,  11, 245,  89, 203,  95, 176, 156, 169,  81, 160, 
+127,  12, 246, 111,  23, 196,  73, 236, 216,  67,  31,  45, 164, 118, 123, 183, 
+204, 187,  62,  90, 251,  96, 177, 134,  59,  82, 161, 108, 170,  85,  41, 157, 
+151, 178, 135, 144,  97, 190, 220, 252, 188, 149, 207, 205,  55,  63,  91, 209, 
+ 83,  57, 132,  60,  65, 162, 109,  71,  20,  42, 158,  93,  86, 242, 211, 171, 
+ 68,  17, 146, 217,  35,  32,  46, 137, 180, 124, 184,  38, 119, 153, 227, 165, 
+103,  74, 237, 222, 197,  49, 254,  24,  13,  99, 140, 128, 192, 247, 112,   7, 
+};
+
+static MV_U8 Alogtable[512] = {
+  1,   3,   5,  15,  17,  51,  85, 255,  26,  46, 114, 150, 161, 248,  19,  53, 
+ 95, 225,  56,  72, 216, 115, 149, 164, 247,   2,   6,  10,  30,  34, 102, 170, 
+229,  52,  92, 228,  55,  89, 235,  38, 106, 190, 217, 112, 144, 171, 230,  49, 
+ 83, 245,   4,  12,  20,  60,  68, 204,  79, 209, 104, 184, 211, 110, 178, 205, 
+ 76, 212, 103, 169, 224,  59,  77, 215,  98, 166, 241,   8,  24,  40, 120, 136, 
+131, 158, 185, 208, 107, 189, 220, 127, 129, 152, 179, 206,  73, 219, 118, 154, 
+181, 196,  87, 249,  16,  48,  80, 240,  11,  29,  39, 105, 187, 214,  97, 163, 
+254,  25,  43, 125, 135, 146, 173, 236,  47, 113, 147, 174, 233,  32,  96, 160, 
+251,  22,  58,  78, 210, 109, 183, 194,  93, 231,  50,  86, 250,  21,  63,  65, 
+195,  94, 226,  61,  71, 201,  64, 192,  91, 237,  44, 116, 156, 191, 218, 117, 
+159, 186, 213, 100, 172, 239,  42, 126, 130, 157, 188, 223, 122, 142, 137, 128, 
+155, 182, 193,  88, 232,  35, 101, 175, 234,  37, 111, 177, 200,  67, 197,  84, 
+252,  31,  33,  99, 165, 244,   7,   9,  27,  45, 119, 153, 176, 203,  70, 202, 
+ 69, 207,  74, 222, 121, 139, 134, 145, 168, 227,  62,  66, 198,  81, 243,  14, 
+ 18,  54,  90, 238,  41, 123, 141, 140, 143, 138, 133, 148, 167, 242,  13,  23, 
+ 57,  75, 221, 124, 132, 151, 162, 253,  28,  36, 108, 180, 199,  82, 246,   1, 
+
+       3,   5,  15,  17,  51,  85, 255,  26,  46, 114, 150, 161, 248,  19,  53, 
+ 95, 225,  56,  72, 216, 115, 149, 164, 247,   2,   6,  10,  30,  34, 102, 170, 
+229,  52,  92, 228,  55,  89, 235,  38, 106, 190, 217, 112, 144, 171, 230,  49, 
+ 83, 245,   4,  12,  20,  60,  68, 204,  79, 209, 104, 184, 211, 110, 178, 205, 
+ 76, 212, 103, 169, 224,  59,  77, 215,  98, 166, 241,   8,  24,  40, 120, 136, 
+131, 158, 185, 208, 107, 189, 220, 127, 129, 152, 179, 206,  73, 219, 118, 154, 
+181, 196,  87, 249,  16,  48,  80, 240,  11,  29,  39, 105, 187, 214,  97, 163, 
+254,  25,  43, 125, 135, 146, 173, 236,  47, 113, 147, 174, 233,  32,  96, 160, 
+251,  22,  58,  78, 210, 109, 183, 194,  93, 231,  50,  86, 250,  21,  63,  65, 
+195,  94, 226,  61,  71, 201,  64, 192,  91, 237,  44, 116, 156, 191, 218, 117, 
+159, 186, 213, 100, 172, 239,  42, 126, 130, 157, 188, 223, 122, 142, 137, 128, 
+155, 182, 193,  88, 232,  35, 101, 175, 234,  37, 111, 177, 200,  67, 197,  84, 
+252,  31,  33,  99, 165, 244,   7,   9,  27,  45, 119, 153, 176, 203,  70, 202, 
+ 69, 207,  74, 222, 121, 139, 134, 145, 168, 227,  62,  66, 198,  81, 243,  14, 
+ 18,  54,  90, 238,  41, 123, 141, 140, 143, 138, 133, 148, 167, 242,  13,  23, 
+ 57,  75, 221, 124, 132, 151, 162, 253,  28,  36, 108, 180, 199,  82, 246,   1, 
+
+};
+
+static MV_U8 S[256] = {
+ 99, 124, 119, 123, 242, 107, 111, 197,  48,   1, 103,  43, 254, 215, 171, 118, 
+202, 130, 201, 125, 250,  89,  71, 240, 173, 212, 162, 175, 156, 164, 114, 192, 
+183, 253, 147,  38,  54,  63, 247, 204,  52, 165, 229, 241, 113, 216,  49,  21, 
+  4, 199,  35, 195,  24, 150,   5, 154,   7,  18, 128, 226, 235,  39, 178, 117, 
+  9, 131,  44,  26,  27, 110,  90, 160,  82,  59, 214, 179,  41, 227,  47, 132, 
+ 83, 209,   0, 237,  32, 252, 177,  91, 106, 203, 190,  57,  74,  76,  88, 207, 
+208, 239, 170, 251,  67,  77,  51, 133,  69, 249,   2, 127,  80,  60, 159, 168, 
+ 81, 163,  64, 143, 146, 157,  56, 245, 188, 182, 218,  33,  16, 255, 243, 210, 
+205,  12,  19, 236,  95, 151,  68,  23, 196, 167, 126,  61, 100,  93,  25, 115, 
+ 96, 129,  79, 220,  34,  42, 144, 136,  70, 238, 184,  20, 222,  94,  11, 219, 
+224,  50,  58,  10,  73,   6,  36,  92, 194, 211, 172,  98, 145, 149, 228, 121, 
+231, 200,  55, 109, 141, 213,  78, 169, 108,  86, 244, 234, 101, 122, 174,   8, 
+186, 120,  37,  46,  28, 166, 180, 198, 232, 221, 116,  31,  75, 189, 139, 138, 
+112,  62, 181, 102,  72,   3, 246,  14,  97,  53,  87, 185, 134, 193,  29, 158, 
+225, 248, 152,  17, 105, 217, 142, 148, 155,  30, 135, 233, 206,  85,  40, 223, 
+140, 161, 137,  13, 191, 230,  66, 104,  65, 153,  45,  15, 176,  84, 187,  22, 
+};
+
+static MV_U8 Si[256] = {
+ 82,   9, 106, 213,  48,  54, 165,  56, 191,  64, 163, 158, 129, 243, 215, 251, 
+124, 227,  57, 130, 155,  47, 255, 135,  52, 142,  67,  68, 196, 222, 233, 203, 
+ 84, 123, 148,  50, 166, 194,  35,  61, 238,  76, 149,  11,  66, 250, 195,  78, 
+  8,  46, 161, 102,  40, 217,  36, 178, 118,  91, 162,  73, 109, 139, 209,  37, 
+114, 248, 246, 100, 134, 104, 152,  22, 212, 164,  92, 204,  93, 101, 182, 146, 
+108, 112,  72,  80, 253, 237, 185, 218,  94,  21,  70,  87, 167, 141, 157, 132, 
+144, 216, 171,   0, 140, 188, 211,  10, 247, 228,  88,   5, 184, 179,  69,   6, 
+208,  44,  30, 143, 202,  63,  15,   2, 193, 175, 189,   3,   1,  19, 138, 107, 
+ 58, 145,  17,  65,  79, 103, 220, 234, 151, 242, 207, 206, 240, 180, 230, 115, 
+150, 172, 116,  34, 231, 173,  53, 133, 226, 249,  55, 232,  28, 117, 223, 110, 
+ 71, 241,  26, 113,  29,  41, 197, 137, 111, 183,  98,  14, 170,  24, 190,  27, 
+252,  86,  62,  75, 198, 210, 121,  32, 154, 219, 192, 254, 120, 205,  90, 244, 
+ 31, 221, 168,  51, 136,   7, 199,  49, 177,  18,  16,  89,  39, 128, 236,  95, 
+ 96,  81, 127, 169,  25, 181,  74,  13,  45, 229, 122, 159, 147, 201, 156, 239, 
+160, 224,  59,  77, 174,  42, 245, 176, 200, 235, 187,  60, 131,  83, 153,  97, 
+ 23,  43,   4, 126, 186, 119, 214,  38, 225, 105,  20,  99,  85,  33,  12, 125, 
+};
+
+/*
+static MV_U8 iG[4][4] = {
+{0x0e, 0x09, 0x0d, 0x0b}, 
+{0x0b, 0x0e, 0x09, 0x0d}, 
+{0x0d, 0x0b, 0x0e, 0x09}, 
+{0x09, 0x0d, 0x0b, 0x0e}, 
+};
+*/
+static MV_U32 rcon[30] = { 
+  0x01,0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x1b, 0x36, 0x6c, 0xd8, 0xab, 0x4d, 0x9a, 0x2f, 0x5e, 0xbc, 0x63, 0xc6, 0x97, 0x35, 0x6a, 0xd4, 0xb3, 0x7d, 0xfa, 0xef, 0xc5, 0x91, };
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/AES/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/AES/Makefile
@@ -0,0 +1,5 @@
+include $(srctree)/$(subst ",,$(CONFIG_MV_HAL_RULES_PATH))
+# Objects list
+obj-$(CONFIG_MV_INCLUDE_CESA) += mvAesAlg.o
+obj-$(CONFIG_MV_INCLUDE_CESA) += mvAesApi.o
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/AES/mvAesApi.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/AES/mvAesApi.c
@@ -0,0 +1,314 @@
+/* rijndael-api-ref.c   v2.1   April 2000
+ * Reference ANSI C code
+ * authors: v2.0 Paulo Barreto
+ *               Vincent Rijmen, K.U.Leuven
+ *          v2.1 Vincent Rijmen, K.U.Leuven
+ *
+ * This code is placed in the public domain.
+ */
+
+#include "mvCommon.h"
+#include "mvOs.h"
+
+#include "mvAes.h"
+#include "mvAesAlg.h"
+
+
+/*  Defines:
+	Add any additional defines you need
+*/
+
+#define     MODE_ECB        1    /*  Are we ciphering in ECB mode?   */
+#define     MODE_CBC        2    /*  Are we ciphering in CBC mode?   */
+#define     MODE_CFB1       3    /*  Are we ciphering in 1-bit CFB mode? */
+
+
+int     aesMakeKey(MV_U8 *expandedKey, MV_U8 *keyMaterial, int keyLen, int blockLen)
+{
+    MV_U8   W[MAXROUNDS+1][4][MAXBC];
+	MV_U8   k[4][MAXKC];
+    MV_U8   j;
+	int     i, rounds, KC;
+	
+	if (expandedKey == NULL) 
+    {
+		return AES_BAD_KEY_INSTANCE;
+	}
+
+	if (!((keyLen == 128) || (keyLen == 192) || (keyLen == 256))) 
+    { 
+		return AES_BAD_KEY_MAT;
+	}
+
+	if (keyMaterial == NULL) 
+    {
+		return AES_BAD_KEY_MAT;
+	}
+
+	/* initialize key schedule: */ 
+ 	for(i=0; i<keyLen/8; i++) 
+    {
+		j = keyMaterial[i];
+		k[i % 4][i / 4] = j; 
+	}	
+	
+	rijndaelKeySched (k, keyLen, blockLen, W);
+#ifdef MV_AES_DEBUG
+    {
+        MV_U8*  pW = &W[0][0][0];
+        int     x;
+
+        mvOsPrintf("Expended Key: size = %d\n", sizeof(W));
+        for(i=0; i<sizeof(W); i++)
+        {
+            mvOsPrintf("%02x ", pW[i]);
+        }
+        for(i=0; i<MAXROUNDS+1; i++)
+        {
+            mvOsPrintf("\n Round #%02d: ", i);
+            for(x=0; x<MAXBC; x++)
+            {
+                mvOsPrintf("%02x%02x%02x%02x ", 
+                    W[i][0][x], W[i][1][x], W[i][2][x], W[i][3][x]);
+            }
+            mvOsPrintf("\n");
+        }
+    }
+#endif /* MV_AES_DEBUG */
+  	switch (keyLen) 
+    {
+	    case 128: 
+            rounds = 10;
+            KC = 4; 
+            break;
+	    case 192: 
+            rounds = 12;
+            KC = 6; 
+            break;
+	    case 256: 
+            rounds = 14;
+            KC = 8; 
+            break;
+	    default : 
+            return (-1);
+	}
+
+    for(i=0; i<MAXBC; i++)
+    {
+        for(j=0; j<4; j++)
+        {
+            expandedKey[i*4+j] = W[rounds][j][i];
+        }
+    }
+    for(; i<KC; i++)
+    {
+        for(j=0; j<4; j++)
+        {
+            expandedKey[i*4+j] = W[rounds-1][j][i+MAXBC-KC];
+        }
+    }
+
+	
+	return 0;
+}
+
+int     aesBlockEncrypt128(MV_U8 mode, MV_U8 *IV, MV_U8 *expandedKey, int  keyLen, 
+                        MV_U32 *plain, int numBlocks, MV_U32 *cipher)
+{
+	int     i, j, t;
+	MV_U8   block[4][MAXBC];
+    int     rounds;
+    char    *input, *outBuffer;
+
+    input = (char*)plain;
+    outBuffer = (char*)cipher;
+
+        /* check parameter consistency: */
+    if( (expandedKey == NULL) || ((keyLen != 128) && (keyLen != 192) && (keyLen != 256))) 
+    {
+        return AES_BAD_KEY_MAT;
+    }
+    if ((mode != MODE_ECB && mode != MODE_CBC))
+    {
+        return AES_BAD_CIPHER_STATE;
+    }
+
+	switch (keyLen) 
+    {
+	    case 128: rounds = 10; break;
+	    case 192: rounds = 12; break;
+	    case 256: rounds = 14; break;
+	    default : return (-3); /* this cannot happen */
+	}
+
+	
+	switch (mode) 
+    {
+	    case MODE_ECB: 
+		    for (i = 0; i < numBlocks; i++) 
+            {
+			    for (j = 0; j < 4; j++) 
+                {
+				    for(t = 0; t < 4; t++)
+				        /* parse input stream into rectangular array */
+					    block[t][j] = input[16*i+4*j+t] & 0xFF;
+			    }                           
+			    rijndaelEncrypt128(block, (MV_U8 (*)[4][MAXBC])expandedKey, rounds);
+			    for (j = 0; j < 4; j++) 
+                {           
+				    /* parse rectangular array into output ciphertext bytes */
+				    for(t = 0; t < 4; t++)
+                        outBuffer[16*i+4*j+t] = (MV_U8) block[t][j];
+
+			    }
+		    }
+		    break;
+		
+	    case MODE_CBC:
+		    for (j = 0; j < 4; j++) 
+            {
+			    for(t = 0; t < 4; t++)
+			    /* parse initial value into rectangular array */
+					block[t][j] = IV[t+4*j] & 0xFF;
+			}
+		    for (i = 0; i < numBlocks; i++) 
+            {
+			    for (j = 0; j < 4; j++) 
+                {
+				    for(t = 0; t < 4; t++)
+				        /* parse input stream into rectangular array and exor with 
+				        IV or the previous ciphertext */
+					    block[t][j] ^= input[16*i+4*j+t] & 0xFF;
+			    }
+			    rijndaelEncrypt128(block, (MV_U8 (*)[4][MAXBC])expandedKey, rounds);
+			    for (j = 0; j < 4; j++) 
+                {
+				    /* parse rectangular array into output ciphertext bytes */
+				    for(t = 0; t < 4; t++)
+					    outBuffer[16*i+4*j+t] = (MV_U8) block[t][j];
+			    }
+		    }
+		    break;
+	
+	    default: return AES_BAD_CIPHER_STATE;
+	}
+	
+	return 0;
+}
+
+int     aesBlockDecrypt128(MV_U8 mode, MV_U8 *IV, MV_U8 *expandedKey, int  keyLen, 
+                            MV_U32 *srcData, int numBlocks, MV_U32 *dstData)
+{
+	int     i, j, t;
+	MV_U8   block[4][MAXBC];
+    MV_U8   iv[4][MAXBC];    
+    int     rounds;
+    char    *input, *outBuffer;
+
+    input = (char*)srcData;
+    outBuffer = (char*)dstData;
+
+    if (expandedKey == NULL) 
+    {
+		return AES_BAD_KEY_MAT;
+	}
+
+    /* check parameter consistency: */
+    if (keyLen != 128 && keyLen != 192 && keyLen != 256)
+    {
+        return AES_BAD_KEY_MAT;
+    }
+    if ((mode != MODE_ECB && mode != MODE_CBC)) 
+    {
+        return AES_BAD_CIPHER_STATE;
+    }
+
+	switch (keyLen) 
+    {
+	    case 128: rounds = 10; break;
+	    case 192: rounds = 12; break;
+	    case 256: rounds = 14; break;
+	    default : return (-3); /* this cannot happen */
+	}
+
+	
+	switch (mode) 
+    {
+	    case MODE_ECB: 
+		    for (i = 0; i < numBlocks; i++) 
+            {
+			    for (j = 0; j < 4; j++) 
+                {
+				    for(t = 0; t < 4; t++)
+                    {
+				        /* parse input stream into rectangular array */
+					    block[t][j] = input[16*i+4*j+t] & 0xFF;
+                    }
+			    }
+			    rijndaelDecrypt128(block, (MV_U8 (*)[4][MAXBC])expandedKey, rounds);
+			    for (j = 0; j < 4; j++) 
+                {
+				    /* parse rectangular array into output ciphertext bytes */
+				    for(t = 0; t < 4; t++)
+					    outBuffer[16*i+4*j+t] = (MV_U8) block[t][j];
+			    }
+		    }
+		    break;
+		
+	    case MODE_CBC:
+		    /* first block */
+		    for (j = 0; j < 4; j++) 
+            {
+			    for(t = 0; t < 4; t++)
+                {
+			        /* parse input stream into rectangular array */
+				    block[t][j] = input[4*j+t] & 0xFF;
+                    iv[t][j] = block[t][j];
+                }
+		    }
+		    rijndaelDecrypt128(block, (MV_U8 (*)[4][MAXBC])expandedKey, rounds);
+		
+		    for (j = 0; j < 4; j++) 
+            {
+			    /* exor the IV and parse rectangular array into output ciphertext bytes */
+			    for(t = 0; t < 4; t++)
+                {
+				    outBuffer[4*j+t] = (MV_U8) (block[t][j] ^ IV[t+4*j]);
+                    IV[t+4*j] = iv[t][j];
+                }
+		    }
+		
+		    /* next blocks */
+		    for (i = 1; i < numBlocks; i++) 
+            {
+			    for (j = 0; j < 4; j++) 
+                {
+				    for(t = 0; t < 4; t++)
+                    {
+				        /* parse input stream into rectangular array */
+                        iv[t][j] = input[16*i+4*j+t] & 0xFF;
+					    block[t][j] = iv[t][j];
+                    }
+			    }
+			    rijndaelDecrypt128(block, (MV_U8 (*)[4][MAXBC])expandedKey, rounds);
+			
+			    for (j = 0; j < 4; j++) 
+                {
+				    /* exor previous ciphertext block and parse rectangular array 
+				       into output ciphertext bytes */
+				    for(t = 0; t < 4; t++)
+                    {
+					    outBuffer[16*i+4*j+t] = (MV_U8) (block[t][j] ^ IV[t+4*j]);
+                        IV[t+4*j] = iv[t][j];
+                    }
+			    }
+		    }
+		    break;
+	
+	    default: return AES_BAD_CIPHER_STATE;
+	}
+	
+	return 0;
+}
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/AES/mvAes.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/cesa/AES/mvAes.h
@@ -0,0 +1,73 @@
+/* mvAes.h   v2.0   August '99
+ * Reference ANSI C code
+ */
+
+/*  AES Cipher header file for ANSI C Submissions
+      Lawrence E. Bassham III
+      Computer Security Division
+      National Institute of Standards and Technology
+
+      April 15, 1998
+
+    This sample is to assist implementers developing to the Cryptographic 
+API Profile for AES Candidate Algorithm Submissions.  Please consult this 
+document as a cross-reference.
+
+    ANY CHANGES, WHERE APPROPRIATE, TO INFORMATION PROVIDED IN THIS FILE
+MUST BE DOCUMENTED.  CHANGES ARE ONLY APPROPRIATE WHERE SPECIFIED WITH
+THE STRING "CHANGE POSSIBLE".  FUNCTION CALLS AND THEIR PARAMETERS CANNOT 
+BE CHANGED.  STRUCTURES CAN BE ALTERED TO ALLOW IMPLEMENTERS TO INCLUDE 
+IMPLEMENTATION SPECIFIC INFORMATION.
+*/
+
+/*  Includes:
+	Standard include files
+*/
+
+#ifndef __mvAes_h__
+#define __mvAes_h__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "mvOs.h"
+
+
+/*  Error Codes - CHANGE POSSIBLE: inclusion of additional error codes  */
+
+/*  Key direction is invalid, e.g., unknown value */
+#define     AES_BAD_KEY_DIR        -1  
+
+/*  Key material not of correct length */
+#define     AES_BAD_KEY_MAT        -2  
+
+/*  Key passed is not valid  */
+#define     AES_BAD_KEY_INSTANCE   -3  
+
+/*  Params struct passed to cipherInit invalid */
+#define     AES_BAD_CIPHER_MODE    -4  
+
+/*  Cipher in wrong state (e.g., not initialized) */
+#define     AES_BAD_CIPHER_STATE   -5  
+
+#define     AES_BAD_CIPHER_INSTANCE   -7 
+
+
+/*  Function protoypes  */
+/*  CHANGED: makeKey(): parameter blockLen added
+                        this parameter is absolutely necessary if you want to
+			setup the round keys in a variable block length setting 
+	     cipherInit(): parameter blockLen added (for obvious reasons)		
+ */
+int     aesMakeKey(MV_U8 *expandedKey, MV_U8 *keyMaterial, int keyLen, int blockLen);
+int     aesBlockEncrypt128(MV_U8 mode, MV_U8 *IV, MV_U8 *expandedKey, int  keyLen, 
+                    MV_U32 *plain, int numBlocks, MV_U32 *cipher);
+int     aesBlockDecrypt128(MV_U8 mode, MV_U8 *IV, MV_U8 *expandedKey, int  keyLen, 
+                    MV_U32 *plain, int numBlocks, MV_U32 *cipher);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/audio/mvAudio.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/audio/mvAudio.c
@@ -0,0 +1,1056 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvSysAudioConfig.h"
+#include "mvAudioRegs.h"
+#include "mvAudio.h"
+
+//#define MV_AUDIO_SKIP_WIN_DECODING
+
+static MV_U32 audioBurstBytesNumGet(MV_AUDIO_BURST_SIZE burst);
+
+
+static MV_AUDIO_HAL_DATA	audioHalData[MV_AUDIO_MAX_UNITS];
+#ifndef MV_AUDIO_SKIP_WIN_DECODING
+static MV_UNIT_WIN_INFO 	audioAddrDecWinMap[MAX_TARGETS + 1];
+static MV_STATUS mvAudioReplaceAddrWin(MV_U32 unit, MV_U32 winId, MV_U32 buffPhysAddr,
+		MV_U32 buffSize);
+#endif 
+
+/*******************************************************************************
+* mvAudioHalInit - Initialize the Audio subsystem
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       None
+* OUTPUT:
+*		None
+* RETURN:
+*       None
+*
+*******************************************************************************/
+MV_VOID mvAudioHalInit(MV_U8 unit, MV_AUDIO_HAL_DATA *halData)
+{
+	int timeout;
+
+	MV_REG_BIT_RESET(MV_AUDIO_PLL_CTRL1_REG(unit),0x333FF8);
+	MV_REG_BIT_SET(MV_AUDIO_PLL_CTRL1_REG(unit),0x111D18);
+
+	/*MV_REG_BIT_RESET(0x10074,0xC018000);
+	  MV_REG_BIT_SET(0x10074,0x4008000);*/
+	
+	timeout = 10000000;
+	while(timeout--);
+    
+	MV_REG_BIT_RESET(MV_AUDIO_PLL_CTRL1_REG(unit),0x333FF8);
+	MV_REG_BIT_SET(MV_AUDIO_PLL_CTRL1_REG(unit),0x111D18);
+
+	mvOsMemcpy(&audioHalData[unit], halData, sizeof(MV_AUDIO_HAL_DATA));
+	/*MV_REG_BIT_RESET(0x10074,0xC018000);
+	  MV_REG_BIT_SET(0x10074,0x4008000);*/
+
+}
+
+
+
+/* Clocks Control and Status related*/
+/*******************************************************************************
+* mvAudioDCOCtrlSet - Set DCO control register
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       dcoCtrl: pointer to MV_AUDIO_FREQ_DATA structure
+* OUTPUT:
+*		None
+* RETURN:
+*       None
+*
+*******************************************************************************/
+
+MV_STATUS mvAudioDCOCtrlSet(int unit, MV_AUDIO_FREQ_DATA *dcoCtrl)
+{
+	MV_U32 reg;
+	/* Check parameters*/
+	if (dcoCtrl->baseFreq > AUDIO_FREQ_96KH)
+	{
+		mvOsPrintf("mvAudioDCOCtrlSet: dcoCtrl->baseFreq value (0x%x) invalid\n",
+				   dcoCtrl->baseFreq);
+		return MV_BAD_PARAM;
+
+	}
+	if ((dcoCtrl->offset > 0xFD0)||(dcoCtrl->offset < 0x20))
+	{
+		mvOsPrintf("mvAudioDCOCtrlSet: dcoCtrl->offset value (0x%x) invalid\n",
+				   dcoCtrl->baseFreq);
+		return MV_BAD_PARAM;
+	}
+	reg = MV_REG_READ(MV_AUDIO_DCO_CTRL_REG(unit));
+
+	reg &= ~(ADCR_DCO_CTRL_FS_MASK|ADCR_DCO_CTRL_OFFSET_MASK);
+	reg |= ((dcoCtrl->baseFreq << ADCR_DCO_CTRL_FS_OFFS)  |
+			(dcoCtrl->offset << ADCR_DCO_CTRL_OFFSET_OFFS));
+	MV_REG_WRITE(MV_AUDIO_DCO_CTRL_REG(unit), reg);
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvAudioDCOCtrlGet - Set DCO control register
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       dcoCtrl: pointer to MV_AUDIO_FREQ_DATA structure
+* OUTPUT:
+*		dcoCtrl: pointer to MV_AUDIO_FREQ_DATA structure
+* RETURN:
+*       None
+*
+*******************************************************************************/
+
+MV_VOID mvAudioDCOCtrlGet(int unit, MV_AUDIO_FREQ_DATA *dcoCtrl)
+{
+	MV_U32 reg = MV_REG_READ(MV_AUDIO_DCO_CTRL_REG(unit));
+
+	dcoCtrl->baseFreq = (reg & ADCR_DCO_CTRL_FS_MASK) >>  ADCR_DCO_CTRL_FS_OFFS ;
+	dcoCtrl->offset = (reg & ADCR_DCO_CTRL_OFFSET_MASK) >>  ADCR_DCO_CTRL_OFFSET_OFFS ;
+}
+/*******************************************************************************
+* mvAudioSpcrCtrlGet - Set SPCR control register
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       spcrCtrl: pointer to MV_AUDIO_FREQ_DATA structure
+* OUTPUT:
+*		spcrCtrl: pointer to MV_AUDIO_FREQ_DATA structure
+* RETURN:
+*       None
+*
+*******************************************************************************/
+
+MV_VOID mvAudioSpcrCtrlGet(int unit, MV_AUDIO_FREQ_DATA *spcrCtrl)
+{
+	MV_U32 reg = MV_REG_READ(MV_AUDIO_SPCR_DCO_STATUS_REG(unit));
+
+	spcrCtrl->baseFreq = (reg & ASDSR_SPCR_CTRLFS_MASK) >>  ASDSR_SPCR_CTRLFS_OFFS ;
+	spcrCtrl->offset = (reg & ASDSR_SPCR_CTRLOFFSET_MASK) >>  ASDSR_SPCR_CTRLOFFSET_OFFS;
+}
+
+
+/* Audio PlayBack related*/
+/*******************************************************************************
+* mvAudioPlaybackControlSet - Set Playback general parameters
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       ctrl: pointer to MV_AUDIO_PLAYBACK_CTRL structure
+* OUTPUT:
+*		None
+* RETURN:
+*       MV_OK on success , MV_FAIL on fail
+*
+*******************************************************************************/
+MV_STATUS mvAudioPlaybackControlSet(int unit, MV_AUDIO_PLAYBACK_CTRL *ctrl)
+{
+	MV_U32 reg;
+
+	if (ctrl->monoMode >= AUDIO_PLAY_OTHER_MONO)
+	{
+		mvOsPrintf("mvAudioPlaybackControlSet: Error ,illegal monoMode %x\n",
+				   ctrl->monoMode );
+
+		return MV_FAIL;
+
+	}
+
+	if ((ctrl->burst != AUDIO_32BYTE_BURST) &&
+		(ctrl->burst != AUDIO_128BYTE_BURST))
+	{
+		mvOsPrintf("mvAudioPlaybackControlSet: Error ,illegal burst %x\n",
+				   ctrl->burst );
+
+		return MV_FAIL;
+
+	}
+
+	if (ctrl->bufferPhyBase & (MV_AUDIO_BUFFER_MIN_ALIGN - 1))
+	{
+		mvOsPrintf("mvAudioPlaybackControlSet: Error ,bufferPhyBase is not"\
+				   "\n aligned to 0x%x bytes\n",MV_AUDIO_BUFFER_MIN_ALIGN );
+
+		return MV_FAIL;
+	}
+
+	if  ((ctrl->bufferSize <= audioBurstBytesNumGet(ctrl->burst))||
+		 (ctrl->bufferSize & (audioBurstBytesNumGet(ctrl->burst) - 1))||
+		 (ctrl->bufferSize > AUDIO_REG_TO_SIZE(APBBCR_SIZE_MAX))
+		 )
+	{
+		mvOsPrintf("mvAudioPlaybackControlSet: Error, bufferSize smaller"\
+				   "\nthan or not multiple of 0x%x bytes or larger than"\
+				   "\n 0x%x",
+				   audioBurstBytesNumGet(ctrl->burst),
+				   AUDIO_REG_TO_SIZE(APBBCR_SIZE_MAX));
+
+		return MV_FAIL;
+	}
+
+
+	reg = MV_REG_READ(MV_AUDIO_PLAYBACK_CTRL_REG(unit));
+	reg &= ~(APCR_PLAY_BURST_SIZE_MASK|APCR_LOOPBACK_MASK|APCR_PLAY_MONO_MASK |
+             APCR_PLAY_SAMPLE_SIZE_MASK | APCR_PLAY_PAUSE_MASK |
+		APCR_PLAY_SPDIF_MUTE_MASK | APCR_PLAY_I2S_MUTE_MASK);
+	reg |= ctrl->burst << APCR_PLAY_BURST_SIZE_OFFS;
+	reg |= ctrl->loopBack << APCR_LOOPBACK_OFFS;
+	reg |= ctrl->monoMode << APCR_PLAY_MONO_OFFS;
+    	reg |= ctrl->sampleSize << APCR_PLAY_SAMPLE_SIZE_OFFS;
+	MV_REG_WRITE(MV_AUDIO_PLAYBACK_CTRL_REG(unit), reg);
+
+#ifndef MV_AUDIO_SKIP_WIN_DECODING
+	if(mvAudioReplaceAddrWin(unit, MV_AUDIO_PLAYBACK_WIN_NUM, ctrl->bufferPhyBase,
+				ctrl->bufferSize) != MV_OK)
+	{
+		mvOsPrintf("mvAudioRecordControlSet: Failed to replace address decoding window.\n");
+		return MV_FAIL;
+	}
+#endif
+
+    	/* Set the interrupt byte count.                            */
+    	reg = ctrl->intByteCount & APBCI_BYTE_COUNT_MASK;
+    	MV_REG_WRITE(MV_AUDIO_PLAYBACK_BYTE_CNTR_INT_REG(unit), reg);
+
+	MV_REG_WRITE(MV_AUDIO_PLAYBACK_BUFF_START_REG(unit), ctrl->bufferPhyBase);
+	MV_REG_WRITE(MV_AUDIO_PLAYBACK_BUFF_SIZE_REG(unit),
+				 AUDIO_SIZE_TO_REG(ctrl->bufferSize));
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvAudioPlaybackControlGet - Get Playback general parameters
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       ctrl: pointer to MV_AUDIO_PLAYBACK_CTRL structure
+* OUTPUT:
+*		ctrl: pointer to MV_AUDIO_PLAYBACK_CTRL structure
+* RETURN:
+*       None
+*
+*******************************************************************************/
+MV_VOID mvAudioPlaybackControlGet(int unit, MV_AUDIO_PLAYBACK_CTRL *ctrl)
+{
+	MV_U32 reg = MV_REG_READ(MV_AUDIO_PLAYBACK_CTRL_REG(unit));
+
+	ctrl->burst = (reg & APCR_PLAY_BURST_SIZE_MASK) >> APCR_PLAY_BURST_SIZE_OFFS;
+	ctrl->loopBack = (reg & APCR_LOOPBACK_MASK) >> APCR_LOOPBACK_OFFS;
+	ctrl->monoMode = (reg & APCR_PLAY_MONO_MASK) >> APCR_PLAY_MONO_OFFS;
+
+	ctrl->bufferPhyBase = MV_REG_READ(MV_AUDIO_PLAYBACK_BUFF_START_REG(unit));
+	reg = MV_REG_READ(MV_AUDIO_PLAYBACK_BUFF_SIZE_REG(unit));
+	ctrl->bufferSize = AUDIO_REG_TO_SIZE(reg);
+
+   	ctrl->intByteCount = MV_REG_READ(MV_AUDIO_PLAYBACK_BYTE_CNTR_INT_REG(unit));
+}
+/*******************************************************************************
+* mvAudioPlaybackStatusGet - Get Playback status parameters
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       ctrl: pointer to MV_AUDIO_PLAYBACK_STATUS structure
+* OUTPUT:
+*		ctrl: pointer to MV_AUDIO_PLAYBACK_STATUS structure
+* RETURN:
+*       None
+*
+*******************************************************************************/
+MV_VOID mvAudioPlaybackStatusGet(int unit, MV_AUDIO_PLAYBACK_STATUS *status)
+{
+	status->muteI2S = ((MV_REG_READ(MV_AUDIO_PLAYBACK_CTRL_REG(unit))&APCR_PLAY_I2S_MUTE_MASK)?
+						MV_TRUE:MV_FALSE);
+	status->enableI2S = ((MV_REG_READ(MV_AUDIO_PLAYBACK_CTRL_REG(unit))&APCR_PLAY_I2S_ENABLE_MASK)?
+						MV_TRUE:MV_FALSE);
+	status->muteSPDIF = ((MV_REG_READ(MV_AUDIO_PLAYBACK_CTRL_REG(unit))&APCR_PLAY_SPDIF_MUTE_MASK)?
+						MV_TRUE:MV_FALSE);
+	status->enableSPDIF = ((MV_REG_READ(MV_AUDIO_PLAYBACK_CTRL_REG(unit))&APCR_PLAY_SPDIF_ENABLE_MASK)?
+						MV_TRUE:MV_FALSE);
+	status->pause = ((MV_REG_READ(MV_AUDIO_PLAYBACK_CTRL_REG(unit))&APCR_PLAY_PAUSE_MASK)?
+						MV_TRUE:MV_FALSE);
+
+}
+
+/*******************************************************************************
+* mvSPDIFPlaybackCtrlGet - Set SPDIF Playback control parameters
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       ctrl: pointer to MV_SPDIF_PLAYBACK_CTRL structure
+* OUTPUT:
+*		ctrl: pointer to MV_SPDIF_PLAYBACK_CTRL structure
+* RETURN:
+*       None
+*
+*******************************************************************************/
+/* Audio SPDIF PlayBack related*/
+MV_VOID mvSPDIFPlaybackCtrlSet(int unit, MV_SPDIF_PLAYBACK_CTRL *ctrl)
+{
+	if (ctrl->blockStartInternally)
+	{
+		MV_REG_BIT_RESET(MV_AUDIO_SPDIF_PLAY_CTRL_REG(unit),ASPCR_SPDIF_BLOCK_START_MASK);
+	}
+	else
+	{
+		MV_REG_BIT_SET(MV_AUDIO_SPDIF_PLAY_CTRL_REG(unit),ASPCR_SPDIF_BLOCK_START_MASK);
+	}
+
+	if (ctrl->validityFromMemory)
+	{
+		MV_REG_BIT_SET(MV_AUDIO_SPDIF_PLAY_CTRL_REG(unit),ASPCR_SPDIF_PB_EN_MEM_VALIDITY_MASK);
+	}
+	else
+	{
+		MV_REG_BIT_RESET(MV_AUDIO_SPDIF_PLAY_CTRL_REG(unit),ASPCR_SPDIF_PB_EN_MEM_VALIDITY_MASK);
+	}
+
+	if (ctrl->userBitsFromMemory)
+	{
+		MV_REG_BIT_SET(MV_AUDIO_SPDIF_PLAY_CTRL_REG(unit),ASPCR_SPDIF_PB_MEM_USR_EN_MASK);
+	}
+	else
+	{
+		MV_REG_BIT_RESET(MV_AUDIO_SPDIF_PLAY_CTRL_REG(unit),ASPCR_SPDIF_PB_MEM_USR_EN_MASK);
+	}
+
+	if (ctrl->underrunData)
+	{
+		MV_REG_BIT_SET(MV_AUDIO_SPDIF_PLAY_CTRL_REG(unit),ASPCR_SPDIF_UNDERRUN_DATA_MASK);
+	}
+	else
+	{
+		MV_REG_BIT_RESET(MV_AUDIO_SPDIF_PLAY_CTRL_REG(unit),ASPCR_SPDIF_UNDERRUN_DATA_MASK);
+	}
+
+	if (ctrl->validity)
+	{
+		MV_REG_BIT_SET(MV_AUDIO_SPDIF_PLAY_CTRL_REG(unit),ASPCR_SPDIF_PB_REG_VALIDITY_MASK);
+	}
+	else
+	{
+		MV_REG_BIT_RESET(MV_AUDIO_SPDIF_PLAY_CTRL_REG(unit),ASPCR_SPDIF_PB_REG_VALIDITY_MASK);
+	}
+
+	if (ctrl->nonPcm)
+	{
+		MV_REG_BIT_SET(MV_AUDIO_SPDIF_PLAY_CTRL_REG(unit),ASPCR_SPDIF_PB_NONPCM_MASK);
+	}
+	else
+	{
+		MV_REG_BIT_RESET(MV_AUDIO_SPDIF_PLAY_CTRL_REG(unit),ASPCR_SPDIF_PB_NONPCM_MASK);
+	}
+}
+/*******************************************************************************
+* mvSPDIFPlaybackCtrlGet - Get SPDIF Playback control parameters
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       ctrl: pointer to MV_SPDIF_PLAYBACK_CTRL structure
+* OUTPUT:
+*		ctrl: pointer to MV_SPDIF_PLAYBACK_CTRL structure
+* RETURN:
+*       None
+*
+*******************************************************************************/
+MV_VOID mvSPDIFPlaybackCtrlGet(int unit, MV_SPDIF_PLAYBACK_CTRL *ctrl)
+{
+	ctrl->blockStartInternally =
+			((MV_REG_READ(MV_AUDIO_SPDIF_PLAY_CTRL_REG(unit))&ASPCR_SPDIF_BLOCK_START_MASK)?
+			 MV_TRUE:MV_FALSE);
+	ctrl->nonPcm =
+			((MV_REG_READ(MV_AUDIO_SPDIF_PLAY_CTRL_REG(unit))&ASPCR_SPDIF_PB_NONPCM_MASK)?
+			 MV_TRUE:MV_FALSE);
+	ctrl->underrunData =
+			((MV_REG_READ(MV_AUDIO_SPDIF_PLAY_CTRL_REG(unit))&ASPCR_SPDIF_UNDERRUN_DATA_MASK)?
+			 MV_TRUE:MV_FALSE);
+	ctrl->userBitsFromMemory =
+			((MV_REG_READ(MV_AUDIO_SPDIF_PLAY_CTRL_REG(unit))&ASPCR_SPDIF_PB_MEM_USR_EN_MASK)?
+			 MV_TRUE:MV_FALSE);
+	ctrl->validity =
+			((MV_REG_READ(MV_AUDIO_SPDIF_PLAY_CTRL_REG(unit))&ASPCR_SPDIF_PB_REG_VALIDITY_MASK)?
+			 MV_TRUE:MV_FALSE);
+	ctrl->validityFromMemory =
+			((MV_REG_READ(MV_AUDIO_SPDIF_PLAY_CTRL_REG(unit))&ASPCR_SPDIF_PB_EN_MEM_VALIDITY_MASK)?
+			 MV_TRUE:MV_FALSE);
+
+
+
+}
+
+/*******************************************************************************
+* mvI2SPlaybackCtrlSet - Set I2S Playback control parameters
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       ctrl: pointer to MV_I2S_PLAYBACK_CTRL structure
+* OUTPUT:
+*		ctrl: pointer to MV_I2S_PLAYBACK_CTRL structure
+* RETURN:
+*       MV_OK on success, and MV_FAIL on fail.
+*
+*******************************************************************************/
+
+/* Audio I2S PlayBack related*/
+MV_STATUS mvI2SPlaybackCtrlSet(int unit, MV_I2S_PLAYBACK_CTRL *ctrl)
+{
+	MV_U32 reg = MV_REG_READ(MV_AUDIO_I2S_PLAY_CTRL_REG(unit)) &
+				~(AIPCR_I2S_PB_JUSTF_MASK|AIPCR_I2S_PB_SAMPLE_SIZE_MASK);
+
+	if (ctrl->sampleSize > SAMPLE_16BIT)
+	{
+		mvOsPrintf("mvI2SPlaybackCtrlSet: illigal sample size\n");
+		return MV_FAIL;
+	}
+
+	reg |= ctrl->sampleSize << AIPCR_I2S_PB_SAMPLE_SIZE_OFFS;
+
+	if (ctrl->sendLastFrame)
+	{
+		MV_REG_BIT_SET(MV_AUDIO_I2S_PLAY_CTRL_REG(unit),AIPCR_I2S_SEND_LAST_FRM_MASK);
+	}
+	else
+	{
+		MV_REG_BIT_RESET(MV_AUDIO_I2S_PLAY_CTRL_REG(unit),AIPCR_I2S_SEND_LAST_FRM_MASK);
+	}
+
+
+	switch (ctrl->justification)
+	{
+	case I2S_JUSTIFIED:
+	case LEFT_JUSTIFIED:
+	case RIGHT_JUSTIFIED:
+		reg |= ctrl->justification << AIPCR_I2S_PB_JUSTF_OFFS;
+		break;
+	default:
+		mvOsPrintf("mvI2SPlaybackCtrlSet: illigal Justification value\n");
+		return MV_FAIL;
+
+	}
+
+	MV_REG_WRITE(MV_AUDIO_I2S_PLAY_CTRL_REG(unit), reg);
+	return MV_OK;
+
+}
+
+/*******************************************************************************
+* mvI2SPlaybackCtrlGet - Get I2S Playback control parameters
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       ctrl: pointer to MV_I2S_PLAYBACK_CTRL structure
+* OUTPUT:
+*		ctrl: pointer to MV_I2S_PLAYBACK_CTRL structure
+* RETURN:
+*       None
+*
+*******************************************************************************/
+MV_VOID mvI2SPlaybackCtrlGet(int unit, MV_I2S_PLAYBACK_CTRL *ctrl)
+{
+	ctrl->sendLastFrame =
+			((MV_REG_READ(MV_AUDIO_I2S_PLAY_CTRL_REG(unit))&AIPCR_I2S_SEND_LAST_FRM_MASK)?
+			 MV_TRUE:MV_FALSE);
+
+	ctrl->justification =
+			((MV_REG_READ(MV_AUDIO_I2S_PLAY_CTRL_REG(unit))&AIPCR_I2S_PB_JUSTF_MASK) >>
+			 AIPCR_I2S_PB_JUSTF_OFFS);
+
+	ctrl->sampleSize =
+		((MV_REG_READ(MV_AUDIO_I2S_PLAY_CTRL_REG(unit))&AIPCR_I2S_PB_SAMPLE_SIZE_MASK ) >>
+		 AIPCR_I2S_PB_SAMPLE_SIZE_OFFS);
+
+}
+/*******************************************************************************
+* mvAudioRecordControlGet - Get Recording control parameters
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       ctrl: pointer to MV_AUDIO_RECORD_CTRL structure
+* OUTPUT:
+*		ctrl: pointer to MV_AUDIO_RECORD_CTRL structure
+* RETURN:
+*       MV_OK on success , MV_FAIL on fail.
+*
+*******************************************************************************/
+/* Audio Recording*/
+MV_STATUS mvAudioRecordControlSet(int unit, MV_AUDIO_RECORD_CTRL *ctrl)
+{
+	MV_U32 reg;
+
+	if (ctrl->monoChannel > AUDIO_REC_RIGHT_MONO)
+	{
+		mvOsPrintf("mvAudioRecordControlSet: Error ,illegal monoChannel %x\n",
+				   ctrl->monoChannel );
+
+		return MV_FAIL;
+	}
+
+	if ((ctrl->burst != AUDIO_32BYTE_BURST) &&
+		(ctrl->burst != AUDIO_128BYTE_BURST))
+	{
+		mvOsPrintf("mvAudioRecordControlSet: Error ,illegal burst %x\n",
+				   ctrl->burst );
+
+		return MV_FAIL;
+
+	}
+
+	if (ctrl->bufferPhyBase & (MV_AUDIO_BUFFER_MIN_ALIGN - 1))
+	{
+		mvOsPrintf("mvAudioRecordControlSet: Error ,bufferPhyBase is not"\
+				   "\n aligned to 0x%x bytes\n",MV_AUDIO_BUFFER_MIN_ALIGN );
+
+		return MV_FAIL;
+	}
+
+	if  ((ctrl->bufferSize <= audioBurstBytesNumGet(ctrl->burst))||
+		(ctrl->bufferSize & (audioBurstBytesNumGet(ctrl->burst) - 1))||
+		 (ctrl->bufferSize > AUDIO_REG_TO_SIZE(APBBCR_SIZE_MAX))
+		 )
+	{
+		mvOsPrintf("mvAudioRecordControlSet: Error, bufferSize smaller"\
+				   "\nthan or not multiple of 0x%x bytes or larger than"\
+				   "\n 0x%x",
+				   audioBurstBytesNumGet(ctrl->burst),
+				   AUDIO_REG_TO_SIZE(APBBCR_SIZE_MAX));
+
+		return MV_FAIL;
+	}
+
+
+	reg = MV_REG_READ(MV_AUDIO_RECORD_CTRL_REG(unit));
+	reg &= ~(ARCR_RECORD_BURST_SIZE_MASK|ARCR_RECORDED_MONO_CHNL_MASK|
+			 ARCR_RECORD_SAMPLE_SIZE_MASK);
+	switch (ctrl->sampleSize)
+	{
+	case SAMPLE_16BIT:
+	case SAMPLE_16BIT_NON_COMPACT:
+	case SAMPLE_20BIT:
+	case SAMPLE_24BIT:
+	case SAMPLE_32BIT:
+		reg |= ctrl->sampleSize << ARCR_RECORD_SAMPLE_SIZE_OFFS;
+        break;
+	default:
+        mvOsPrintf("mvAudioRecordControlSet: Error ,illegal sampleSize %x\n",
+				   ctrl->sampleSize );
+
+		return MV_FAIL;
+	}
+
+	reg |= ctrl->burst << ARCR_RECORD_BURST_SIZE_OFFS;
+	reg |= ctrl->monoChannel << ARCR_RECORDED_MONO_CHNL_OFFS;
+	MV_REG_WRITE(MV_AUDIO_RECORD_CTRL_REG(unit), reg);
+
+	if (ctrl->mono)
+	{
+		MV_REG_BIT_SET (MV_AUDIO_RECORD_CTRL_REG(unit), 
+				ARCR_RECORD_MONO_MASK);
+	}
+	else
+	{
+		MV_REG_BIT_RESET (MV_AUDIO_RECORD_CTRL_REG(unit), 
+				ARCR_RECORD_MONO_MASK);
+	}
+
+#ifndef MV_AUDIO_SKIP_WIN_DECODING
+	if(mvAudioReplaceAddrWin(unit, MV_AUDIO_RECORD_WIN_NUM, ctrl->bufferPhyBase,
+				ctrl->bufferSize) != MV_OK)
+	{
+		mvOsPrintf("mvAudioRecordControlSet: Failed to replace address decoding window.\n");
+		return MV_FAIL;
+	}
+#endif
+
+    	/* Set the interrupt byte count.                            */
+    	reg = ctrl->intByteCount & ARBCI_BYTE_COUNT_MASK;
+    	MV_REG_WRITE(MV_AUDIO_RECORD_BYTE_CNTR_INT_REG(unit), reg);
+
+	MV_REG_WRITE(MV_AUDIO_RECORD_START_ADDR_REG(unit), ctrl->bufferPhyBase);
+	MV_REG_WRITE(MV_AUDIO_RECORD_BUFF_SIZE_REG(unit),
+				 AUDIO_SIZE_TO_REG(ctrl->bufferSize));
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvAudioRecordControlGet - Get Recording control parameters
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       ctrl: pointer to MV_AUDIO_RECORD_CTRL structure
+* OUTPUT:
+*		ctrl: pointer to MV_AUDIO_RECORD_CTRL structure
+* RETURN:
+*       None
+*
+*******************************************************************************/
+MV_VOID mvAudioRecordControlGet(int unit, MV_AUDIO_RECORD_CTRL *ctrl)
+{
+	MV_U32 reg;
+
+	ctrl->mono =
+			((MV_REG_READ(MV_AUDIO_RECORD_CTRL_REG(unit))&ARCR_RECORD_MONO_MASK)?
+			 MV_TRUE:MV_FALSE);
+
+	ctrl->burst =
+			((MV_REG_READ(MV_AUDIO_RECORD_CTRL_REG(unit))&ARCR_RECORD_BURST_SIZE_MASK) >>
+			 ARCR_RECORD_BURST_SIZE_OFFS);
+
+	ctrl->monoChannel =
+			((MV_REG_READ(MV_AUDIO_RECORD_CTRL_REG(unit))&ARCR_RECORDED_MONO_CHNL_MASK) >>
+			 ARCR_RECORDED_MONO_CHNL_OFFS);
+
+	ctrl->sampleSize =
+			((MV_REG_READ(MV_AUDIO_RECORD_CTRL_REG(unit))&ARCR_RECORD_SAMPLE_SIZE_MASK) >>
+			 ARCR_RECORD_SAMPLE_SIZE_OFFS);
+
+	ctrl->bufferPhyBase = MV_REG_READ(MV_AUDIO_RECORD_START_ADDR_REG(unit));
+	reg = MV_REG_READ(MV_AUDIO_RECORD_BUFF_SIZE_REG(unit));
+	ctrl->bufferSize = AUDIO_REG_TO_SIZE(reg);
+
+    	ctrl->intByteCount = MV_REG_READ(MV_AUDIO_RECORD_BYTE_CNTR_INT_REG(unit));
+
+}
+
+/*******************************************************************************
+* mvAudioRecordControlGet - Get Recording status parameters
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       status: pointer to MV_AUDIO_RECORD_STATUS structure
+* OUTPUT:
+*		status: pointer to MV_AUDIO_RECORD_STATUS structure
+* RETURN:
+*       None
+*
+*******************************************************************************/
+MV_VOID mvAudioRecordStatusGet(int unit, MV_AUDIO_RECORD_STATUS *status)
+{
+	status->I2SEnable =
+			((MV_REG_READ(MV_AUDIO_RECORD_CTRL_REG(unit))&ARCR_RECORD_I2S_EN_MASK)?
+			 MV_TRUE:MV_FALSE);
+
+	status->mute =
+			((MV_REG_READ(MV_AUDIO_RECORD_CTRL_REG(unit))&ARCR_RECORD_MUTE_MASK)?
+			 MV_TRUE:MV_FALSE);
+
+	status->pause =
+			((MV_REG_READ(MV_AUDIO_RECORD_CTRL_REG(unit))&ARCR_RECORD_PAUSE_MASK)?
+			 MV_TRUE:MV_FALSE);
+
+	status->spdifEnable =
+			((MV_REG_READ(MV_AUDIO_RECORD_CTRL_REG(unit))&ARCR_RECORD_SPDIF_EN_MASK)?
+			 MV_TRUE:MV_FALSE);
+
+}
+/*******************************************************************************
+* mvSPDIFRecordTclockSet - Set T-clock for SPDIF
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       none
+* OUTPUT:
+*		none
+* RETURN:
+*       MV_OK on success , MV_NOT_SUPPORTED on non supported T-clock
+*
+*******************************************************************************/
+
+/* SPDIF Recording Related*/
+MV_STATUS	mvSPDIFRecordTclockSet(int unit)
+{
+	MV_U32 tclock = audioHalData[unit].tclk;
+	MV_U32 reg = MV_REG_READ(MV_AUDIO_SPDIF_REC_GEN_REG(unit));
+
+	reg &= ~ASRGR_CORE_CLK_FREQ_MASK;
+	switch (tclock)
+	{
+	case MV_BOARD_TCLK_133MHZ:
+		reg |= ASRGR_CORE_CLK_FREQ_133MHZ;
+		break;
+	case MV_BOARD_TCLK_150MHZ:
+		reg |= ASRGR_CORE_CLK_FREQ_150MHZ;
+		break;
+	case MV_BOARD_TCLK_166MHZ:
+		reg |= ASRGR_CORE_CLK_FREQ_166MHZ;
+		break;
+	case MV_BOARD_TCLK_200MHZ:
+		reg |= ASRGR_CORE_CLK_FREQ_200MHZ;
+		break;
+	default:
+		mvOsPrintf("mvSPDIFRecordTclockSet: Not supported core clock %d\n",tclock);
+		return MV_NOT_SUPPORTED;
+	}
+
+	MV_REG_WRITE(MV_AUDIO_SPDIF_REC_GEN_REG(unit), reg);
+	
+	return MV_OK;
+
+}
+/*******************************************************************************
+* mvSPDIFRecordTclockGet - Get T-clock for SPDIF
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       none
+* OUTPUT:
+*		none
+* RETURN:
+*       T-clock configured in the SPDIF.
+*
+*******************************************************************************/
+MV_U32	mvSPDIFRecordTclockGet(int unit)
+{
+	MV_U32 reg = (MV_REG_READ(MV_AUDIO_SPDIF_REC_GEN_REG(unit)) & ASRGR_CORE_CLK_FREQ_MASK);
+
+	switch (reg)
+	{
+	case ASRGR_CORE_CLK_FREQ_133MHZ:
+		return MV_BOARD_TCLK_133MHZ;
+	case ASRGR_CORE_CLK_FREQ_150MHZ:
+		return MV_BOARD_TCLK_150MHZ;
+	case ASRGR_CORE_CLK_FREQ_166MHZ:
+		return MV_BOARD_TCLK_166MHZ;
+	case ASRGR_CORE_CLK_FREQ_200MHZ:
+		return MV_BOARD_TCLK_200MHZ;
+	}
+
+	return 0;
+}
+
+/*******************************************************************************
+* mvAudioRecordControlGet - Get SPDIF Recording status parameters
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       status: pointer to MV_SPDIF_RECORD_STATUS structure
+* OUTPUT:
+*		status: pointer to MV_SPDIF_RECORD_STATUS structure
+* RETURN:
+*       None
+*
+*******************************************************************************/
+MV_VOID	mvSPDIFRecordStatusGet(int unit, MV_SPDIF_RECORD_STATUS *status)
+{
+	status->freq =
+		((MV_REG_READ(MV_AUDIO_SPDIF_REC_GEN_REG(unit))&ASRGR_CORE_CLK_FREQ_MASK) >>
+		 ASRGR_CORE_CLK_FREQ_OFFS);
+
+	status->nonLinearPcm =
+		((MV_REG_READ(MV_AUDIO_SPDIF_REC_GEN_REG(unit))&ASRGR_NON_PCM_MASK)?
+		 MV_TRUE:MV_FALSE);
+
+	status->validPcm =
+		((MV_REG_READ(MV_AUDIO_SPDIF_REC_GEN_REG(unit))&ASRGR_VALID_PCM_INFO_MASK)?
+		 MV_TRUE:MV_FALSE);
+
+}
+
+/* I2S Recording Related*/
+/*******************************************************************************
+* mvI2SRecordCntrlSet - Get I2S Recording status parameters
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       ctrl: pointer to MV_I2S_RECORD_CTRL structure
+* OUTPUT:
+*		ctrl: pointer to MV_I2S_RECORD_CTRL structure
+* RETURN:
+*       MV_OK on success , MV_FAIL on fail.
+*
+*******************************************************************************/
+MV_STATUS	mvI2SRecordCntrlSet(int unit, MV_I2S_RECORD_CTRL *ctrl)
+{
+	MV_U32 reg;
+
+#if 0
+	if (ctrl->sample > SAMPLE_16BIT)
+	{
+		mvOsPrintf("mvI2SRecordCntrlSet: Error , Illigal sample size %d\n",
+				ctrl->sample);
+		return MV_FAIL;
+    }
+#endif
+
+	reg = MV_REG_READ(MV_AUDIO_I2S_REC_CTRL_REG(unit));
+	reg &= ~(AIRCR_I2S_RECORD_JUSTF_MASK|AIRCR_I2S_SAMPLE_SIZE_MASK);
+
+	switch (ctrl->justf)
+	{
+	case I2S_JUSTIFIED:
+	case LEFT_JUSTIFIED:
+	case RIGHT_JUSTIFIED:
+	case RISE_BIT_CLCK_JUSTIFIED:
+		reg |= ctrl->justf << AIRCR_I2S_RECORD_JUSTF_OFFS;
+		break;
+	default:
+		return MV_FAIL;
+	}
+
+	reg |= ctrl->sample << AIRCR_I2S_SAMPLE_SIZE_OFFS;
+
+	MV_REG_WRITE(MV_AUDIO_I2S_REC_CTRL_REG(unit), reg);
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvAudioRecordControlGet - Get I2S Recording status parameters
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       ctrl: pointer to MV_I2S_RECORD_CTRL structure
+* OUTPUT:
+*		ctrl: pointer to MV_I2S_RECORD_CTRL structure
+* RETURN:
+*       None
+*
+*******************************************************************************/
+MV_VOID	mvI2SRecordCntrlGet(int unit, MV_I2S_RECORD_CTRL *ctrl)
+{
+	ctrl->sample =
+		((MV_REG_READ(MV_AUDIO_I2S_REC_CTRL_REG(unit))&AIRCR_I2S_SAMPLE_SIZE_MASK) >>
+		 AIRCR_I2S_SAMPLE_SIZE_OFFS);
+
+	ctrl->justf =
+		((MV_REG_READ(MV_AUDIO_I2S_REC_CTRL_REG(unit))&AIRCR_I2S_RECORD_JUSTF_MASK) >>
+		 AIRCR_I2S_RECORD_JUSTF_OFFS);
+}
+
+
+/*******************************************************************************
+* audioBurstBytesNumGet - Convert Burst enum to bytes number
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       burst:  MV_AUDIO_BURST_SIZE  enum
+* OUTPUT:
+*		none
+* RETURN:
+*       number of burst bytes
+*
+*******************************************************************************/
+static MV_U32 audioBurstBytesNumGet(MV_AUDIO_BURST_SIZE burst)
+{
+	switch (burst)
+	{
+	case AUDIO_32BYTE_BURST:
+		return 32;
+	case AUDIO_128BYTE_BURST:
+		return 128;
+	default:
+		return 0xffffffff;
+	}
+}
+
+#ifndef MV_AUDIO_SKIP_WIN_DECODING
+/*******************************************************************************
+* mvAudioReplaceAddrWin
+*
+* DESCRIPTION:
+*	This function is used to replace the address decoding windows of the
+*	recording / playback engines, in case the address given by the user is
+*	not within the configured window.
+*
+* INPUT:
+*       unit:  Audio unit ID.
+*	winId: Playback or Recording window.
+*	buffPhysAddr: The physical address of the buffer to be configured.
+*	buffSize: Size of buffPhysAddr.
+*
+* OUTPUT:
+*	None.
+*
+* RETURN:
+*       MV_OK on success,
+*	MV_FAIL otherwise.
+*
+*******************************************************************************/
+static MV_STATUS mvAudioReplaceAddrWin(MV_U32 unit, MV_U32 winId, MV_U32 buffPhysAddr,
+		MV_U32 buffSize)
+{
+	MV_UNIT_WIN_INFO audioWin;
+	MV_UNIT_WIN_INFO *winInfo;
+	MV_ADDR_WIN   bufAddrWin;
+	MV_U32 target, i;
+
+	/* Get the details of the Record address window*/
+	if( mvAudioWinRead(unit, winId, &audioWin ) != MV_OK )
+	{
+		mvOsPrintf("mvAudioRecordControlSet: Error calling mvAudioWinGet on win %d\n",
+				unit);
+		return MV_FAIL;
+	}
+
+	bufAddrWin.baseHigh = 0;
+	bufAddrWin.baseLow = buffPhysAddr;
+	bufAddrWin.size = buffSize;
+
+	/* If Record window is not enabled or buffer address is not within window boundries
+	   then try to set a new value to the Record window by
+	   Geting the target of where the buffer exist, if the buffer is within the window
+	   of the new target then set the Record window to that target
+	   else return Fail
+    	*/
+	if((audioWin.enable != MV_TRUE) ||
+	  (MV_TRUE != mvWinWithinWinTest(&bufAddrWin, &audioWin.addrWin)))
+	{
+		/* Look for the target containing the phyBaseAddr */
+		for(i = 0; i < MAX_TARGETS; i++) {
+			winInfo = &audioAddrDecWinMap[i];
+
+			if((buffPhysAddr >= winInfo->addrWin.baseLow) &&
+				(buffPhysAddr < winInfo->addrWin.baseLow + winInfo->addrWin.size))
+					break;
+		}
+
+		/* Get the target of the buffer that user require*/
+		target = i;
+		if (MAX_TARGETS == target)
+		{
+			mvOsPrintf("mvAudioReplaceAddrWin: Address not found in any of the targets 0x%x\n",
+					   buffPhysAddr);
+			return MV_FAIL;
+		}
+
+		/* if the address window of the target is enabled and the user buffer is within
+		   that target address window then set the palyback\recording window to the
+		   target window
+		*/
+		if((winInfo->enable == MV_TRUE) &&
+		  (MV_TRUE == mvWinWithinWinTest(&bufAddrWin, &winInfo->addrWin)))
+		{
+			if( mvAudioWinWrite(unit, winId, winInfo) != MV_OK )
+			{
+				mvOsPrintf("mvAudioReplaceAddrWin: Error calling mvAudioWinWrite on win %d\n",
+						   winId);
+				return MV_FAIL;
+			}
+
+		}
+		else
+		{
+			mvOsPrintf("mvAudioReplaceAddrWin: Error buffer is not within a valid target\n");
+			return MV_FAIL;
+
+		}
+	}
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvAudioSetAddDecMap
+*
+* DESCRIPTION:
+*	This function is called by the audio address decoding configuration
+*	function to initialize the address decoding map of the audio HAL.
+*	This info will be used by the mvAudioReplaceAddrWin() function.
+*
+* INPUT:
+*	pAddrDecWinMap: System's address deocding map.
+*
+* OUTPUT:
+*	None.
+*
+* RETURN:
+*       MV_OK on success,
+*	MV_FAIL otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvAudioSetAddDecMap(MV_UNIT_WIN_INFO *pAddrDecWinMap)
+{
+	mvOsMemcpy(audioAddrDecWinMap, pAddrDecWinMap, sizeof(audioAddrDecWinMap));
+	return MV_OK;
+}
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/audio/mvAudioAddrDec.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/audio/mvAudioAddrDec.c
@@ -0,0 +1,259 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvAudioRegs.h"
+
+#ifndef MV_AUDIO_SKIP_WIN_DECODING
+extern MV_STATUS mvAudioSetAddDecMap(MV_UNIT_WIN_INFO *pAddrDecWinMap);
+#endif
+
+/*******************************************************************************
+* mvAudioWinWrite
+*
+* DESCRIPTION:
+*	This function writes the address decoding registers according to the
+*	given window configuration.
+*
+* INPUT:
+*	unit	    - The Audio unit number to configure. 
+*       winNum	    - AUDIO target address decode window number.
+*       pAddrDecWin - AUDIO target window data structure.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_OK on success,
+*	MV_BAD_PARAM if winNum is invalid.
+*	MV_ERROR otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvAudioWinWrite(MV_U32 unit, MV_U32 winNum, MV_UNIT_WIN_INFO *pAddrDecWin)
+{
+    MV_U32  baseReg;
+    MV_U32  sizeReg;
+    MV_U32  size;
+    MV_U32  alignment;
+    
+    /* Parameter checking   */
+    if (winNum >= MV_AUDIO_MAX_ADDR_DECODE_WIN) {
+	mvOsPrintf("%s: ERR. Invalid win num %d\n",__FUNCTION__, winNum);
+	return MV_BAD_PARAM;
+    }
+
+    /* check if address is aligned to the size */
+    if(MV_IS_NOT_ALIGN(pAddrDecWin->addrWin.baseLow, pAddrDecWin->addrWin.size)) {
+	mvOsPrintf("mvAudioWinWrite:Error setting AUDIO window %d to "\
+		"Address 0x%08x is unaligned to size 0x%x.\n",
+		winNum,
+		pAddrDecWin->addrWin.baseLow,
+		pAddrDecWin->addrWin.size);
+	return MV_ERROR;
+    }
+
+    size = pAddrDecWin->addrWin.size;
+    if(!MV_IS_POWER_OF_2(size)) {
+	mvOsPrintf("mvAudioWinWrite: Error setting AUDIO window %d. "
+		    "Window size is not a power to 2.", winNum);
+	return MV_BAD_PARAM;
+    }
+
+    alignment = 1 << MV_AUDIO_WIN_SIZE_OFFSET;
+
+    sizeReg = (size / alignment - 1) << MV_AUDIO_WIN_SIZE_OFFSET;
+
+    /* BaseLow[31:16] => base register [31:16]		*/
+    baseReg = pAddrDecWin->addrWin.baseLow & MV_AUDIO_WIN_BASE_MASK;
+
+    /* set attributes */
+    sizeReg &= ~MV_AUDIO_WIN_ATTR_MASK;
+    sizeReg |= (pAddrDecWin->attrib << MV_AUDIO_WIN_ATTR_OFFSET);
+
+    /* set target ID */
+    sizeReg &= ~MV_AUDIO_WIN_TARGET_MASK;
+    sizeReg |= (pAddrDecWin->targetId << MV_AUDIO_WIN_TARGET_OFFSET);
+
+    if (pAddrDecWin->enable == MV_TRUE)
+	sizeReg |= MV_AUDIO_WIN_ENABLE_MASK;
+    else
+	sizeReg &= ~MV_AUDIO_WIN_ENABLE_MASK;
+
+    MV_REG_WRITE( MV_AUDIO_WIN_CTRL_REG(unit, winNum), sizeReg);
+    MV_REG_WRITE( MV_AUDIO_WIN_BASE_REG(unit, winNum), baseReg);
+    return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvAudioWinRead
+*
+* DESCRIPTION:
+*       Read AUDIO peripheral target address window.
+*
+* INPUT:
+*       winNum - AUDIO target address decode window number.
+*
+* OUTPUT:
+*       pAddrDecWin - AUDIO target window data structure.
+*
+* RETURN:
+*	MV_BAD_PARAM if winNum is invalid.
+*	MV_ERROR otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvAudioWinRead(MV_U32 unit, MV_U32 winNum, MV_UNIT_WIN_INFO *pAddrDecWin)
+{
+    MV_U32  baseReg, sizeReg;
+    MV_U32  sizeRegVal;
+    MV_U32  alignment;
+
+    if (winNum >= MV_AUDIO_MAX_ADDR_DECODE_WIN) {
+	mvOsPrintf("%s : ERR. Invalid winNum %d\n", __FUNCTION__,  winNum);
+	return MV_BAD_PARAM;
+    }
+
+    baseReg = MV_REG_READ( MV_AUDIO_WIN_BASE_REG(unit, winNum) );
+    sizeReg = MV_REG_READ( MV_AUDIO_WIN_CTRL_REG(unit, winNum) );
+
+    alignment = 1 << MV_AUDIO_WIN_SIZE_OFFSET;
+    sizeRegVal = (sizeReg & MV_AUDIO_WIN_SIZE_MASK) >> 
+			MV_AUDIO_WIN_SIZE_OFFSET;
+
+    pAddrDecWin->addrWin.size = (sizeRegVal + 1) * alignment;
+
+    /* Extract base address						*/
+    /* Base register [31:16] ==> baseLow[31:16] 		*/
+    pAddrDecWin->addrWin.baseLow = baseReg & MV_AUDIO_WIN_BASE_MASK;
+    pAddrDecWin->addrWin.baseHigh =  0;
+
+    /* attrib and targetId */
+    pAddrDecWin->attrib = (sizeReg & MV_AUDIO_WIN_ATTR_MASK) >> 
+	MV_AUDIO_WIN_ATTR_OFFSET;
+    pAddrDecWin->targetId = (sizeReg & MV_AUDIO_WIN_TARGET_MASK) >> 
+	MV_AUDIO_WIN_TARGET_OFFSET;
+
+    /* Check if window is enabled   */
+    if(sizeReg & MV_AUDIO_WIN_ENABLE_MASK)
+	pAddrDecWin->enable = MV_TRUE;
+    else
+	pAddrDecWin->enable = MV_FALSE;
+    
+    return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvAudioWinInit
+*
+* DESCRIPTION:
+*       Initialize the AUDIO peripheral target address window.
+*
+* INPUT:
+*	unit	 : The unit number to initialize the address decoding for.
+*	addWinMap: An array holding the address decoding information for the
+*		    system.
+*
+* OUTPUT:
+*     None.
+*
+* RETURN:
+*       MV_ERROR if register parameters are invalid.
+*
+*******************************************************************************/
+MV_STATUS mvAudioWinInit(MV_U32 unit, MV_UNIT_WIN_INFO *addrWinMap)
+{
+	MV_32			winNum;
+	MV_UNIT_WIN_INFO  	*cpuAddrDecWin;
+
+	/* Initiate Audio address decode */
+
+	/* First disable all address decode windows */
+	for(winNum = 0; winNum < MV_AUDIO_MAX_ADDR_DECODE_WIN; winNum++) {
+		MV_U32  regVal = MV_REG_READ(MV_AUDIO_WIN_CTRL_REG(unit, winNum));
+		regVal &= ~MV_AUDIO_WIN_ENABLE_MASK;
+		MV_REG_WRITE(MV_AUDIO_WIN_CTRL_REG(unit, winNum), regVal);
+	}
+
+	for(winNum = 0; winNum < MV_AUDIO_MAX_ADDR_DECODE_WIN; winNum++) {
+		/* We will set the Window to DRAM_CS0 in default */
+		/* first get attributes from CPU If */
+		cpuAddrDecWin = &addrWinMap[SDRAM_CS0];
+
+		if (cpuAddrDecWin->enable == MV_TRUE) {
+			if(MV_OK != mvAudioWinWrite(unit, winNum, cpuAddrDecWin))
+				return MV_ERROR;
+		}
+	}
+
+#ifndef MV_AUDIO_SKIP_WIN_DECODING
+	/* Initialize the address decoding map in the audio driver */
+	mvAudioSetAddDecMap(addrWinMap);
+#endif
+
+	return MV_OK;
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/audio/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/audio/Makefile
@@ -0,0 +1,4 @@
+include $(srctree)/$(subst ",,$(CONFIG_MV_HAL_RULES_PATH))
+# Objects list
+obj-$(CONFIG_MV_INCLUDE_AUDIO) += mvAudio.o
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/audio/mvCompVer.txt
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/audio/mvCompVer.txt
@@ -0,0 +1,4 @@
+Global HAL Version: DOVE_HAL_3_1_2
+Unit HAL Version: 1.0.2
+Description: This component includes an implementation of the unit HAL drivers
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/audio/mvAudio.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/audio/mvAudio.h
@@ -0,0 +1,439 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+#ifndef __INCMVAudioH
+#define __INCMVAudioH
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvSysAudioConfig.h"
+
+/*********************************/
+/* General enums and structures */
+/*********************************/
+
+typedef struct {
+	MV_U32	tclk;
+}MV_AUDIO_HAL_DATA;
+
+/* Audio source Clocks enum*/
+typedef enum _mvAudioClock
+{
+	AUDIO_DCO_CLK = 0,
+	AUDIO_SPCR_CLK = 2,
+	AUDIO_EXT_CLK = 3
+
+}MV_AUDIO_CLOCK;
+
+typedef enum _mvAudioFreq
+{
+	AUDIO_FREQ_44_1KH = 0,   	/* 11.2896Mhz */
+	AUDIO_FREQ_48KH = 1,     	/* 12.288Mhz */
+	AUDIO_FREQ_96KH =2, 		/* 24.576Mhz */
+	AUDIO_FREQ_LOWER_44_1KH = 3 ,	/*Lower than 11.2896MHz*/
+	AUDIO_FREQ_HIGHER_96KH = 4,	/*Higher than 24.576MHz*/
+	AUDIO_FREQ_OTHER = 7,		/*Other frequency*/
+}MV_AUDIO_FREQ;
+
+
+typedef enum _mvAudioSampleFreq
+{
+	SMAPLE_8KHZ = 0,
+	SMAPLE_16KHZ,
+	SMAPLE_22_05KHZ,
+	SMAPLE_24KHZ,
+	SMAPLE_32KHZ,
+	SMAPLE_44_1KHZ,
+	SMAPLE_48KHZ,
+	SMAPLE_64KHZ,
+	SMAPLE_88KHZ,
+	SMAPLE_96KHZ,
+	SMAPLE_176KHZ,
+	SMAPLE_192KHZ
+}MV_AUDIO_SAMPLE_FREQ;
+
+typedef enum _mvAudioBurstSize
+{
+	AUDIO_32BYTE_BURST = 1,
+	AUDIO_128BYTE_BURST = 2,
+
+}MV_AUDIO_BURST_SIZE;
+
+typedef enum _mvAudioPlaybackMono
+{
+	AUDIO_PLAY_MONO_OFF = 0,
+	AUDIO_PLAY_LEFT_MONO = 1,
+	AUDIO_PLAY_RIGHT_MONO = 2,
+	AUDIO_PLAY_BOTH_MONO = 3,
+	AUDIO_PLAY_OTHER_MONO = 4
+
+}MV_AUDIO_PLAYBACK_MONO;
+
+typedef enum _mvAudioRecordMono
+{
+	AUDIO_REC_LEFT_MONO = 0,
+	AUDIO_REC_RIGHT_MONO = 1,
+
+}MV_AUDIO_RECORD_MONO;
+
+typedef enum _mvAudioSampleSize
+{
+	SAMPLE_32BIT = 0,
+	SAMPLE_24BIT = 1,
+	SAMPLE_20BIT = 2,
+	SAMPLE_16BIT = 3,
+	SAMPLE_16BIT_NON_COMPACT = 7
+
+}MV_AUDIO_SAMPLE_SIZE;
+
+typedef enum _mvAudioI2SJustification
+{
+	LEFT_JUSTIFIED = 0,
+	I2S_JUSTIFIED = 5,
+	RISE_BIT_CLCK_JUSTIFIED =7,
+	RIGHT_JUSTIFIED = 8,
+
+}MV_AUDIO_I2S_JUSTIFICATION;
+
+
+/* Type of Audio operations*/
+typedef enum _mvAudioOperation
+{
+		AUDIO_PLAYBACK = 0,
+		AUDIO_RECORD = 1
+
+}MV_AUDIO_OP;
+
+typedef struct _mvAudioFreqData
+{
+	MV_AUDIO_FREQ	baseFreq; 	/* Control FS, selects the base frequency of the DCO */
+	MV_U32			offset; 	/* Offset control in which each step equals to 0.9536 ppm */
+
+} MV_AUDIO_FREQ_DATA;
+
+
+/*********************************/
+/* Play Back related structures */
+/*********************************/
+
+
+typedef struct _mvAudioPlaybackCtrl
+{
+	MV_AUDIO_BURST_SIZE 	burst;			/* Specifies the Burst Size of the DMA */
+	MV_BOOL 				loopBack;		/* When Loopback is enabled, playback
+											data is looped back to be recorded */
+	MV_AUDIO_PLAYBACK_MONO	monoMode;		/* Mono Mode is used */
+	MV_U32					bufferPhyBase;	/* Physical Address of DMA buffer */
+	MV_U32					bufferSize;		/* Size of DMA buffer */
+    MV_U32                  intByteCount;   /* Number of bytes after which an
+                                            interrupt will be issued.*/
+    MV_AUDIO_SAMPLE_SIZE	sampleSize;	    /* Playback Sample Size*/
+}MV_AUDIO_PLAYBACK_CTRL;
+
+typedef struct _mvAudioPlaypackStatus
+{
+	MV_BOOL	muteI2S;
+	MV_BOOL	enableI2S;
+	MV_BOOL	muteSPDIF;
+	MV_BOOL	enableSPDIF;
+	MV_BOOL pause;
+
+}MV_AUDIO_PLAYBACK_STATUS;
+
+
+typedef struct _mvSpdifPlaybackCtrl
+{
+	MV_BOOL 	nonPcm;				 	/* PCM or non-PCM mode*/
+	MV_BOOL 	validity;			 	/* Validity bit value when using
+										registers (userBitsFromMemory=0)*/
+	MV_BOOL		underrunData; 			/* If true send last frame on mute/pause/underrun
+										otherwise send 24 binary*/
+	MV_BOOL 	userBitsFromMemory;  	/* otherwise from intenal registers*/
+	MV_BOOL		validityFromMemory; 	/* otherwise from internal registers*/
+	MV_BOOL		blockStartInternally;	/* When user and valid bits are form registers
+										then this bit should be zero */
+}MV_SPDIF_PLAYBACK_CTRL;
+
+typedef struct _mvI2SPlaybackCtrl
+{
+	MV_AUDIO_SAMPLE_SIZE		sampleSize;
+	MV_AUDIO_I2S_JUSTIFICATION	justification;
+	MV_BOOL 					sendLastFrame;	/* If true send last frame on mute/pause/underrun
+												otherwise send 64 binary*/
+}MV_I2S_PLAYBACK_CTRL;
+
+
+/*********************************/
+/* Recording  related structures */
+/*********************************/
+
+typedef struct _mvAudioRecordCtrl
+{
+	MV_AUDIO_BURST_SIZE 	burst;			/* Recording DMA Burst Size */
+	MV_AUDIO_SAMPLE_SIZE	sampleSize;		/*Recording Sample Size */
+    MV_BOOL					mono;			/* If true then recording mono else recording stereo*/
+	MV_AUDIO_RECORD_MONO	monoChannel;	/* Left or right moono*/
+	MV_U32					bufferPhyBase;	/* Physical Address of DMA buffer */
+	MV_U32					bufferSize;		/* Size of DMA buffer */
+
+    MV_U32                  intByteCount;   /* Number of bytes after which an
+                                            interrupt will be issued.*/
+
+
+}MV_AUDIO_RECORD_CTRL;
+
+typedef struct _mvAudioRecordStatus
+{
+	MV_BOOL	mute;
+	MV_BOOL pause;
+	MV_BOOL	spdifEnable;
+	MV_BOOL	I2SEnable;
+
+}MV_AUDIO_RECORD_STATUS;
+
+
+typedef struct _mvSPDIFRecordStatus
+{
+	MV_BOOL 				nonLinearPcm;		/* pcm non-pcm*/
+	MV_BOOL					validPcm;	/* valid non-valid pcm*/
+	MV_AUDIO_SAMPLE_FREQ	freq;		/* sampled frequency*/
+
+}MV_SPDIF_RECORD_STATUS;
+
+typedef struct _mvI2SRecordCntrl
+{
+	MV_AUDIO_SAMPLE_SIZE		sample;		/* I2S Recording Sample Size*/
+	MV_AUDIO_I2S_JUSTIFICATION	justf;
+}MV_I2S_RECORD_CTRL;
+
+
+
+/*********************************/
+/* Usefull Macros 				*/
+/*
+ -- Clocks Control and Status related --
+mvAudioIsDcoLocked()
+mvAudioIsSpcrLocked()
+mvAudioIsPllLocked()
+mvAudioAllCountersClear()
+mvAudioPlayCounterClear()
+mvAudioRecCounterClear()
+mvAudioAllCountersStart()
+mvAudioPlayCounterStart()
+mvAudioRecCounterStart()
+mvAudioAllCountersStop()
+mvAudioPlayCounterStop()
+mvAudioRecCounterStop()
+
+ -- PlayBack related --
+mvAudioIsPlaybackBusy()
+mvAudioI2SPlaybackMute(mute)
+mvAudioI2SPlaybackEnable(enable)
+mvAudioSPDIFPlaybackMute(mute)
+mvAudioSPDIFPlaybackEnable(enable)
+mvAudioPlaybackPause(pause)
+
+---- Recording ---
+mvAudioSPDIFRecordingEnable(enable)
+mvAudioI2SRecordingEnable(enable)
+mvAudioRecordMute(mute)
+mvAudioRecordPause(pause)
+
+********************************/
+
+
+
+
+/* Clocks Control and Status related*/
+#define mvAudioIsDcoLocked()	\
+	(ASDSR_DCO_LOCK_MASK & MV_REG_READ(MV_AUDIO_SPCR_DCO_STATUS_REG))
+#define	mvAudioIsSpcrLocked()	\
+	(ASDSR_SPCR_LOCK_MASK & MV_REG_READ(AUDIO_SPCR_DCO_STATUS_REG))
+#define	mvAudioIsPllLocked()	\
+	(ASDSR_PLL_LOCK_MASK & MV_REG_READ(AUDIO_SPCR_DCO_STATUS_REG))
+
+#define mvAudioAllCountersClear()	\
+	(MV_REG_BIT_SET(MV_AUDIO_SAMPLE_CNTR_CTRL_REG,(ASCCR_CLR_REC_CNTR_MASK|ASCCR_CLR_PLAY_CNTR_MASK)))
+#define mvAudioPlayCounterClear()	\
+	(MV_REG_BIT_SET(MV_AUDIO_SAMPLE_CNTR_CTRL_REG,(ASCCR_CLR_PLAY_CNTR_MASK)))
+#define mvAudioRecCounterClear()	\
+	(MV_REG_BIT_SET(MV_AUDIO_SAMPLE_CNTR_CTRL_REG,(ASCCR_CLR_REC_CNTR_MASK)))
+
+#define	mvAudioAllCountersStart()	\
+	(MV_REG_BIT_SET(MV_AUDIO_SAMPLE_CNTR_CTRL_REG,(ASCCR_ACTIVE_PLAY_CNTR_MASK|ASCCR_ACTIVE_REC_CNTR_MASK)))
+#define mvAudioPlayCounterStart()	\
+	(MV_REG_BIT_SET(MV_AUDIO_SAMPLE_CNTR_CTRL_REG,(ASCCR_ACTIVE_PLAY_CNTR_MASK)))
+#define mvAudioRecCounterStart()	\
+	(MV_REG_BIT_SET(MV_AUDIO_SAMPLE_CNTR_CTRL_REG,(ASCCR_ACTIVE_REC_CNTR_MASK)))
+
+#define	mvAudioAllCountersStop()	\
+	(MV_REG_BIT_RESET(MV_AUDIO_SAMPLE_CNTR_CTRL_REG,(ASCCR_ACTIVE_PLAY_CNTR_MASK|ASCCR_ACTIVE_REC_CNTR_MASK)))
+#define mvAudioPlayCounterStop()	\
+	(MV_REG_BIT_RESET(MV_AUDIO_SAMPLE_CNTR_CTRL_REG,(ASCCR_ACTIVE_PLAY_CNTR_MASK)))
+#define mvAudioRecCounterStop()	\
+	(MV_REG_BIT_RESET(MV_AUDIO_SAMPLE_CNTR_CTRL_REG,(ASCCR_ACTIVE_REC_CNTR_MASK)))
+
+/* Audio PlayBack related*/
+#define	mvAudioIsPlaybackBusy()	\
+	(APCR_PLAY_BUSY_MASK & MV_REG_READ(MV_AUDIO_PLAYBACK_CTRL_REG))
+
+#define	mvAudioI2SPlaybackMute(mute)	\
+	(void)((mute)?(MV_REG_BIT_SET(MV_AUDIO_PLAYBACK_CTRL_REG,APCR_PLAY_I2S_MUTE_MASK)):	\
+			 MV_REG_BIT_RESET(MV_AUDIO_PLAYBACK_CTRL_REG,APCR_PLAY_I2S_MUTE_MASK))
+#define	mvAudioI2SPlaybackEnable(enable)	\
+	 (void)((enable)?(MV_REG_BIT_SET(MV_AUDIO_PLAYBACK_CTRL_REG,APCR_PLAY_I2S_ENABLE_MASK)):	\
+			  MV_REG_BIT_RESET(MV_AUDIO_PLAYBACK_CTRL_REG,APCR_PLAY_I2S_ENABLE_MASK))
+
+#define	mvAudioSPDIFPlaybackMute(mute)	\
+	(void)((mute)?(MV_REG_BIT_SET(MV_AUDIO_PLAYBACK_CTRL_REG,APCR_PLAY_SPDIF_MUTE_MASK)):	\
+			 MV_REG_BIT_RESET(MV_AUDIO_PLAYBACK_CTRL_REG,APCR_PLAY_SPDIF_MUTE_MASK))
+#define	mvAudioSPDIFPlaybackEnable(enable)	\
+	 (void)((enable)?(MV_REG_BIT_SET(MV_AUDIO_PLAYBACK_CTRL_REG,APCR_PLAY_SPDIF_ENABLE_MASK)):	\
+			  MV_REG_BIT_RESET(MV_AUDIO_PLAYBACK_CTRL_REG,APCR_PLAY_SPDIF_ENABLE_MASK))
+
+#define	mvAudioAllIfPlaybackEnable(enable)	\
+	 (void)((enable)?    \
+            (MV_REG_BIT_SET(MV_AUDIO_PLAYBACK_CTRL_REG,     \
+                            (APCR_PLAY_I2S_ENABLE_MASK | APCR_PLAY_SPDIF_ENABLE_MASK))):	\
+			  MV_REG_BIT_RESET(MV_AUDIO_PLAYBACK_CTRL_REG,  \
+                            (APCR_PLAY_I2S_ENABLE_MASK | APCR_PLAY_SPDIF_ENABLE_MASK)))
+
+#define	mvAudioPlaybackPause(pause)	\
+	 (void)((pause)?(MV_REG_BIT_SET(MV_AUDIO_PLAYBACK_CTRL_REG,APCR_PLAY_PAUSE_MASK)):	\
+			  MV_REG_BIT_RESET(MV_AUDIO_PLAYBACK_CTRL_REG,APCR_PLAY_PAUSE_MASK))
+
+#define	mvAudioPlaybackLoopbackEnable(enable)	\
+	 (void)((enable)?(MV_REG_BIT_SET(MV_AUDIO_PLAYBACK_CTRL_REG,APCR_LOOPBACK_MASK)):	\
+			  MV_REG_BIT_RESET(MV_AUDIO_PLAYBACK_CTRL_REG,APCR_LOOPBACK_MASK))
+
+
+/* Audio Recording*/
+#define	mvAudioSPDIFRecordingEnable(enable)	\
+	 (void)((enable)?(MV_REG_BIT_SET(MV_AUDIO_RECORD_CTRL_REG,ARCR_RECORD_SPDIF_EN_MASK)):	\
+			  MV_REG_BIT_RESET(MV_AUDIO_RECORD_CTRL_REG,ARCR_RECORD_SPDIF_EN_MASK))
+
+#define	mvAudioI2SRecordingEnable(enable)	\
+	 (void)((enable)?(MV_REG_BIT_SET(MV_AUDIO_RECORD_CTRL_REG,ARCR_RECORD_I2S_EN_MASK)):	\
+			  MV_REG_BIT_RESET(MV_AUDIO_RECORD_CTRL_REG,ARCR_RECORD_I2S_EN_MASK))
+
+#define mvAudioRecordMute(mute)	\
+	 (void)((mute)?(MV_REG_BIT_SET(MV_AUDIO_RECORD_CTRL_REG,ARCR_RECORD_MUTE_MASK)):	\
+			  MV_REG_BIT_RESET(MV_AUDIO_RECORD_CTRL_REG,ARCR_RECORD_MUTE_MASK))
+
+#define mvAudioRecordPause(pause)	\
+	 (void)((pause)?(MV_REG_BIT_SET(MV_AUDIO_RECORD_CTRL_REG,ARCR_RECORD_PAUSE_MASK)):	\
+			  MV_REG_BIT_RESET(MV_AUDIO_RECORD_CTRL_REG,ARCR_RECORD_PAUSE_MASK))
+
+
+
+/*********************************/
+/* Functions API 				*/
+/*********************************/
+
+MV_VOID mvAudioHalInit(MV_U8 unit, MV_AUDIO_HAL_DATA *halData);
+MV_STATUS mvAudioWinInit(MV_U32 unit, MV_UNIT_WIN_INFO *addrWinMap);
+MV_STATUS mvAudioWinRead(MV_U32 unit, MV_U32 winNum, MV_UNIT_WIN_INFO *pAddrDecWin);
+MV_STATUS mvAudioWinWrite(MV_U32 unit, MV_U32 winNum, MV_UNIT_WIN_INFO *pAddrDecWin);
+
+/* Clocks Control and Status related*/
+MV_STATUS mvAudioDCOCtrlSet(int unit, MV_AUDIO_FREQ_DATA *dcoCtrl);
+MV_VOID mvAudioDCOCtrlGet(int unit, MV_AUDIO_FREQ_DATA *dcoCtrl);
+MV_VOID mvAudioSpcrCtrlGet(int unit, MV_AUDIO_FREQ_DATA *spcrCtrl);
+
+/* Audio PlayBack related*/
+MV_STATUS mvAudioPlaybackControlSet(int unit, MV_AUDIO_PLAYBACK_CTRL *ctrl);
+MV_VOID mvAudioPlaybackControlGet(int unit, MV_AUDIO_PLAYBACK_CTRL *ctrl);
+MV_VOID mvAudioPlaybackStatusGet(int unit, MV_AUDIO_PLAYBACK_STATUS *status);
+
+/* Audio SPDIF PlayBack related*/
+MV_VOID mvSPDIFPlaybackCtrlSet(int unit, MV_SPDIF_PLAYBACK_CTRL *ctrl);
+MV_VOID mvSPDIFPlaybackCtrlGet(int unit, MV_SPDIF_PLAYBACK_CTRL *ctrl);
+
+/* Audio I2S PlayBack related*/
+MV_STATUS mvI2SPlaybackCtrlSet(int unit, MV_I2S_PLAYBACK_CTRL *ctrl);
+MV_VOID mvI2SPlaybackCtrlGet(int unit, MV_I2S_PLAYBACK_CTRL *ctrl);
+
+/* Audio Recording*/
+MV_STATUS mvAudioRecordControlSet(int unit, MV_AUDIO_RECORD_CTRL *ctrl);
+MV_VOID mvAudioRecordControlGet(int unit, MV_AUDIO_RECORD_CTRL *ctrl);
+MV_VOID mvAudioRecordStatusGet(int unit, MV_AUDIO_RECORD_STATUS *status);
+
+/* SPDIF Recording Related*/
+MV_STATUS	mvSPDIFRecordTclockSet(int unit);
+MV_U32	mvSPDIFRecordTclockGet(int unit);
+MV_VOID	mvSPDIFRecordStatusGet(int unit, MV_SPDIF_RECORD_STATUS *status);
+
+/* I2S Recording Related*/
+MV_STATUS	mvI2SRecordCntrlSet(int unit, MV_I2S_RECORD_CTRL *ctrl);
+MV_VOID	mvI2SRecordCntrlGet(int unit, MV_I2S_RECORD_CTRL *ctrl);
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/audio/mvAudioRegs.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/audio/mvAudioRegs.h
@@ -0,0 +1,371 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+#ifndef __INCMVAudioRegsH
+#define __INCMVAudioRegsH
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "mvSysAudioConfig.h"
+
+#define APBBCR_SIZE_MAX						0x3FFFFF
+#define APBBCR_SIZE_SHIFT					0x2
+
+#define AUDIO_REG_TO_SIZE(reg)		(((reg) + 1) << APBBCR_SIZE_SHIFT)
+#define AUDIO_SIZE_TO_REG(size)		(((size) >> APBBCR_SIZE_SHIFT) - 1)
+
+#define MV_AUDIO_BUFFER_MIN_ALIGN	0x8
+
+/********************/
+/* Clocking Control*/
+/*******************/
+#define MV_AUDIO_PLL_CTRL1_REG(unit)			(MV_AUDIO_REGS_BASE(unit) + 0x1200)
+#define MV_AUDIO_DCO_CTRL_REG(unit)			(MV_AUDIO_REGS_BASE(unit) + 0x1204)
+#define MV_AUDIO_SPCR_DCO_STATUS_REG(unit)		(MV_AUDIO_REGS_BASE(unit) + 0x120c)
+#define MV_AUDIO_SAMPLE_CNTR_CTRL_REG(unit)		(MV_AUDIO_REGS_BASE(unit) + 0x1220)
+#define MV_AUDIO_PLAYBACK_SAMPLE_CNTR_REG(unit)		(MV_AUDIO_REGS_BASE(unit) + 0x1224)
+#define MV_AUDIO_RECORD_SAMPLE_CNTR_REG(unit)		(MV_AUDIO_REGS_BASE(unit) + 0x1228)
+#define MV_AUDIO_CLOCK_CTRL_REG(unit)			(MV_AUDIO_REGS_BASE(unit) + 0x1230)
+
+
+/* MV_AUDIO_DCO_CTRL_REG */
+#define ADCR_DCO_CTRL_FS_OFFS		0
+#define ADCR_DCO_CTRL_FS_MASK		(0x3 << ADCR_DCO_CTRL_FS_OFFS)
+#define ADCR_DCO_CTRL_FS_44_1KHZ	(0x0 << ADCR_DCO_CTRL_FS_OFFS)
+#define ADCR_DCO_CTRL_FS_48KHZ		(0x1 << ADCR_DCO_CTRL_FS_OFFS)
+#define ADCR_DCO_CTRL_FS_96KHZ		(0x2 << ADCR_DCO_CTRL_FS_OFFS)
+
+
+#define ADCR_DCO_CTRL_OFFSET_OFFS	2
+#define ADCR_DCO_CTRL_OFFSET_MASK	(0xfff << ADCR_DCO_CTRL_OFFSET_OFFS)
+
+/* MV_AUDIO_SPCR_DCO_STATUS_REG */
+#define ASDSR_SPCR_CTRLFS_OFFS		0
+#define ASDSR_SPCR_CTRLFS_MASK		(0x7 << ASDSR_SPCR_CTRLFS_OFFS)
+#define ASDSR_SPCR_CTRLFS_44_1KHZ	(0x0 << ASDSR_SPCR_CTRLFS_OFFS)
+#define ASDSR_SPCR_CTRLFS_48KHZ		(0x1 << ASDSR_SPCR_CTRLFS_OFFS)
+#define ASDSR_SPCR_CTRLFS_96KHZ		(0x2 << ASDSR_SPCR_CTRLFS_OFFS)
+#define ASDSR_SPCR_CTRLFS_44_1KHZ_LESS	(0x3 << ASDSR_SPCR_CTRLFS_OFFS)
+#define ASDSR_SPCR_CTRLFS_96KHZ_MORE	(0x4 << ASDSR_SPCR_CTRLFS_OFFS)
+#define ASDSR_SPCR_CTRLFS_OTHER		(0x7 << ASDSR_SPCR_CTRLFS_OFFS)
+
+
+#define ASDSR_SPCR_CTRLOFFSET_OFFS	3
+#define ASDSR_SPCR_CTRLOFFSET_MASK	(0xfff << ASDSR_SPCR_CTRLOFFSET_OFFS)
+
+#define ASDSR_SPCR_LOCK_OFFS		15
+#define ASDSR_SPCR_LOCK_MASK		(0x1 << ASDSR_SPCR_LOCK_OFFS)
+
+#define ASDSR_DCO_LOCK_OFFS		16
+#define ASDSR_DCO_LOCK_MASK		(0x1 << ASDSR_DCO_LOCK_OFFS)
+
+#define ASDSR_PLL_LOCK_OFFS		17
+#define ASDSR_PLL_LOCK_MASK		(0x1 << ASDSR_PLL_LOCK_OFFS)
+
+/*MV_AUDIO_SAMPLE_CNTR_CTRL_REG */
+
+#define ASCCR_CLR_PLAY_CNTR_OFFS	9
+#define ASCCR_CLR_PLAY_CNTR_MASK	(0x1 << ASCCR_CLR_PLAY_CNTR_OFFS)
+
+#define ASCCR_CLR_REC_CNTR_OFFS		8
+#define ASCCR_CLR_REC_CNTR_MASK		(0x1 << ASCCR_CLR_REC_CNTR_OFFS)
+
+#define ASCCR_ACTIVE_PLAY_CNTR_OFFS	1
+#define ASCCR_ACTIVE_PLAY_CNTR_MASK	(0x1 << ASCCR_ACTIVE_PLAY_CNTR_OFFS)
+
+#define ASCCR_ACTIVE_REC_CNTR_OFFS	0
+#define ASCCR_ACTIVE_REC_CNTR_MASK	(0x1 << ASCCR_ACTIVE_REC_CNTR_OFFS)
+
+/* MV_AUDIO_CLOCK_CTRL_REG */
+#define ACCR_MCLK_SOURCE_OFFS		0
+#define ACCR_MCLK_SOURCE_MASK		(0x3 << ACCR_MCLK_SOURCE_OFFS)
+#define ACCR_MCLK_SOURCE_DCO		(0x0 << ACCR_MCLK_SOURCE_OFFS)
+#define ACCR_MCLK_SOURCE_SPCR		(0x2 << ACCR_MCLK_SOURCE_OFFS)
+#define ACCR_MCLK_SOURCE_EXT		(0x3 << ACCR_MCLK_SOURCE_OFFS)
+
+
+
+/********************/
+/* Interrupts		*/
+/*******************/
+#define MV_AUDIO_ERROR_CAUSE_REG(unit)			(MV_AUDIO_REGS_BASE(unit) + 0x1300)
+#define MV_AUDIO_ERROR_MASK_REG(unit)			(MV_AUDIO_REGS_BASE(unit) + 0x1304)
+#define MV_AUDIO_INT_CAUSE_REG(unit)			(MV_AUDIO_REGS_BASE(unit) + 0x1308)
+#define MV_AUDIO_INT_MASK_REG(unit)			(MV_AUDIO_REGS_BASE(unit) + 0x130C)
+#define MV_AUDIO_RECORD_BYTE_CNTR_INT_REG(unit)		(MV_AUDIO_REGS_BASE(unit) + 0x1310)
+#define MV_AUDIO_PLAYBACK_BYTE_CNTR_INT_REG(unit)	(MV_AUDIO_REGS_BASE(unit) + 0x1314)
+
+/* MV_AUDIO_INT_CAUSE_REG*/
+#define AICR_RECORD_BYTES_INT			(0x1 << 13)
+#define AICR_PLAY_BYTES_INT			(0x1 << 14)
+
+#define ARBCI_BYTE_COUNT_MASK                   0xFFFFFF
+#define APBCI_BYTE_COUNT_MASK                   0xFFFFFF
+
+/********************/
+/* Audio Playback	*/
+/*******************/
+/* General */
+#define MV_AUDIO_PLAYBACK_CTRL_REG(unit)		(MV_AUDIO_REGS_BASE(unit) + 0x1100)
+#define MV_AUDIO_PLAYBACK_BUFF_START_REG(unit)		(MV_AUDIO_REGS_BASE(unit) + 0x1104)
+#define MV_AUDIO_PLAYBACK_BUFF_SIZE_REG(unit)		(MV_AUDIO_REGS_BASE(unit) + 0x1108)
+#define MV_AUDIO_PLAYBACK_BUFF_BYTE_CNTR_REG(unit)	(MV_AUDIO_REGS_BASE(unit) + 0x110c)
+
+/*SPDIF */
+#define MV_AUDIO_SPDIF_PLAY_CTRL_REG(unit)		(MV_AUDIO_REGS_BASE(unit) + 0x2204)
+#define MV_AUDIO_SPDIF_PLAY_CH_STATUS_LEFT_REG(unit, ind)	        \
+                                        (MV_AUDIO_REGS_BASE(unit) + 0x2280 + (ind << 2))
+#define MV_AUDIO_SPDIF_PLAY_CH_STATUS_RIGHT_REG(unit, ind)	    \
+                                        (MV_AUDIO_REGS_BASE(unit) + 0x22a0 + (ind << 2))
+#define MV_AUDIO_SPDIF_PLAY_USR_BITS_LEFT_REG(unit, ind)          \
+                                	(MV_AUDIO_REGS_BASE(unit) + 0x22c0 + (ind << 2))
+#define MV_AUDIO_SPDIF_PLAY_USR_BITS_RIGHT_REG(unit, ind)              \
+                                        (MV_AUDIO_REGS_BASE(unit) + 0x22e0 + (ind << 2))
+/*I2S*/
+#define MV_AUDIO_I2S_PLAY_CTRL_REG(unit)		(MV_AUDIO_REGS_BASE(unit) + 0x2508)
+
+
+/* MV_AUDIO_PLAYBACK_CTRL_REG */
+#define APCR_PLAY_SAMPLE_SIZE_OFFS			0
+#define APCR_PLAY_SAMPLE_SIZE_MASK			(0x7 << APCR_PLAY_SAMPLE_SIZE_OFFS)
+
+#define APCR_PLAY_I2S_ENABLE_OFFS			3
+#define APCR_PLAY_I2S_ENABLE_MASK			(0x1 << APCR_PLAY_I2S_ENABLE_OFFS)
+
+#define APCR_PLAY_SPDIF_ENABLE_OFFS			4
+#define APCR_PLAY_SPDIF_ENABLE_MASK			(0x1 << APCR_PLAY_SPDIF_ENABLE_OFFS)
+
+#define APCR_PLAY_MONO_OFFS				5
+#define APCR_PLAY_MONO_MASK				(0x3 << APCR_PLAY_MONO_OFFS)
+
+#define APCR_PLAY_I2S_MUTE_OFFS				7
+#define APCR_PLAY_I2S_MUTE_MASK				(0x1 << APCR_PLAY_I2S_MUTE_OFFS)
+
+#define APCR_PLAY_SPDIF_MUTE_OFFS			8
+#define APCR_PLAY_SPDIF_MUTE_MASK			(0x1 << APCR_PLAY_SPDIF_MUTE_OFFS)
+
+#define APCR_PLAY_PAUSE_OFFS				9
+#define APCR_PLAY_PAUSE_MASK				(0x1 << APCR_PLAY_PAUSE_OFFS)
+
+#define APCR_LOOPBACK_OFFS				10
+#define APCR_LOOPBACK_MASK				(0x1 << APCR_LOOPBACK_OFFS)
+
+#define APCR_PLAY_BURST_SIZE_OFFS			11
+#define APCR_PLAY_BURST_SIZE_MASK			(0x3 << APCR_PLAY_BURST_SIZE_OFFS)
+
+#define APCR_PLAY_BUSY_OFFS				16
+#define APCR_PLAY_BUSY_MASK				(0x1 << APCR_PLAY_BUSY_OFFS)
+
+/* MV_AUDIO_PLAYBACK_BUFF_BYTE_CNTR_REG */
+#define APBBCR_SIZE_MAX					0x3FFFFF
+#define APBBCR_SIZE_SHIFT				0x2
+
+
+/* MV_AUDIO_SPDIF_PLAY_CTRL_REG */
+#define ASPCR_SPDIF_BLOCK_START_OFFS		0x0
+#define ASPCR_SPDIF_BLOCK_START_MASK		(0x1 << ASPCR_SPDIF_BLOCK_START_OFFS)
+
+#define ASPCR_SPDIF_PB_EN_MEM_VALIDITY_OFFS	0x1
+#define ASPCR_SPDIF_PB_EN_MEM_VALIDITY_MASK	(0x1 << ASPCR_SPDIF_PB_EN_MEM_VALIDITY_OFFS)
+
+#define ASPCR_SPDIF_PB_MEM_USR_EN_OFFS		0x2
+#define ASPCR_SPDIF_PB_MEM_USR_EN_MASK		(0x1 << ASPCR_SPDIF_PB_MEM_USR_EN_OFFS)
+
+#define ASPCR_SPDIF_UNDERRUN_DATA_OFFS		0x5
+#define ASPCR_SPDIF_UNDERRUN_DATA_MASK		(0x1 << ASPCR_SPDIF_UNDERRUN_DATA_OFFS)
+
+#define ASPCR_SPDIF_PB_REG_VALIDITY_OFFS	16
+#define ASPCR_SPDIF_PB_REG_VALIDITY_MASK	(0x1 << ASPCR_SPDIF_PB_REG_VALIDITY_OFFS)
+
+#define ASPCR_SPDIF_PB_NONPCM_OFFS		17
+#define ASPCR_SPDIF_PB_NONPCM_MASK		(0x1 << ASPCR_SPDIF_PB_NONPCM_OFFS)
+
+
+
+/* MV_AUDIO_I2S_PLAY_CTRL_REG */
+#define AIPCR_I2S_SEND_LAST_FRM_OFFS		23
+#define AIPCR_I2S_SEND_LAST_FRM_MASK		(1 << AIPCR_I2S_SEND_LAST_FRM_OFFS)
+
+#define AIPCR_I2S_PB_JUSTF_OFFS			26
+#define AIPCR_I2S_PB_JUSTF_MASK			(0xf << AIPCR_I2S_PB_JUSTF_OFFS)
+
+#define AIPCR_I2S_PB_SAMPLE_SIZE_OFFS		30
+#define AIPCR_I2S_PB_SAMPLE_SIZE_MASK		(0x3 << AIPCR_I2S_PB_SAMPLE_SIZE_OFFS)
+
+/********************/
+/* Audio Recordnig	*/
+/*******************/
+/* General */
+#define MV_AUDIO_RECORD_CTRL_REG(unit)			(MV_AUDIO_REGS_BASE(unit) + 0x1000)
+#define MV_AUDIO_RECORD_START_ADDR_REG(unit)		(MV_AUDIO_REGS_BASE(unit) + 0x1004)
+#define MV_AUDIO_RECORD_BUFF_SIZE_REG(unit)		(MV_AUDIO_REGS_BASE(unit) + 0x1008)
+#define MV_AUDIO_RECORD_BUF_BYTE_CNTR_REG(unit)		(MV_AUDIO_REGS_BASE(unit) + 0x100C)
+
+/*SPDIF */
+#define MV_AUDIO_SPDIF_REC_GEN_REG(unit)		(MV_AUDIO_REGS_BASE(unit) + 0x2004)
+#define MV_AUDIO_SPDIF_REC_INT_CAUSE_MASK_REG(unit)	(MV_AUDIO_REGS_BASE(unit) + 0x2008)
+#define MV_AUDIO_SPDIF_REC_CH_STATUS_LEFT_REG(unit, ind)                  \
+		                                (MV_AUDIO_REGS_BASE(unit) + 0x2180 + ((ind) << 2))
+#define MV_AUDIO_SPDIF_REC_CH_STATUS_RIGHT_REG(unit, ind)                 \
+                                        	(MV_AUDIO_REGS_BASE(unit) + 0x21a0 + ((ind) << 2))
+#define MV_AUDIO_SPDIF_REC_USR_BITS_LEFT_REG(unit, ind)                   \
+                                    		(MV_AUDIO_REGS_BASE(unit) + 0x21c0 + ((ind) << 2))
+#define MV_AUDIO_SPDIF_REC_USR_BITS_RIGHT_REG(unit, ind)                  \
+                                        	(MV_AUDIO_REGS_BASE(unit) + 0x21e0 + ((ind) << 2))
+
+/*I2S*/
+#define MV_AUDIO_I2S_REC_CTRL_REG(unit)		(MV_AUDIO_REGS_BASE(unit) + 0x2408)
+
+
+/* MV_AUDIO_RECORD_CTRL_REG*/
+#define ARCR_RECORD_SAMPLE_SIZE_OFFS   	  	0
+#define ARCR_RECORD_SAMPLE_SIZE_MASK   	  	(0x7 << ARCR_RECORD_SAMPLE_SIZE_OFFS)
+
+#define ARCR_RECORDED_MONO_CHNL_OFFS   	  	3
+#define ARCR_RECORDED_MONO_CHNL_MASK   	  	(0x1 << ARCR_RECORDED_MONO_CHNL_OFFS)
+
+#define ARCR_RECORD_MONO_OFFS		   	4
+#define ARCR_RECORD_MONO_MASK		   	(0x1 << ARCR_RECORD_MONO_OFFS)
+
+#define ARCR_RECORD_BURST_SIZE_OFFS	   	5
+#define ARCR_RECORD_BURST_SIZE_MASK	   	(0x3 << ARCR_RECORD_BURST_SIZE_OFFS)
+
+#define ARCR_RECORD_MUTE_OFFS		   	8
+#define ARCR_RECORD_MUTE_MASK		   	(0x1 << ARCR_RECORD_MUTE_OFFS)
+
+#define ARCR_RECORD_PAUSE_OFFS		   	9
+#define ARCR_RECORD_PAUSE_MASK		   	(0x1 << ARCR_RECORD_PAUSE_OFFS)
+
+#define ARCR_RECORD_I2S_EN_OFFS		   	10
+#define ARCR_RECORD_I2S_EN_MASK		   	(0x1 << ARCR_RECORD_I2S_EN_OFFS)
+
+#define ARCR_RECORD_SPDIF_EN_OFFS	   	11
+#define ARCR_RECORD_SPDIF_EN_MASK	   	(0x1 << ARCR_RECORD_SPDIF_EN_OFFS)
+
+
+/* MV_AUDIO_SPDIF_REC_GEN_REG*/
+#define ASRGR_CORE_CLK_FREQ_OFFS		1
+#define ASRGR_CORE_CLK_FREQ_MASK		(0x3 << ASRGR_CORE_CLK_FREQ_OFFS)
+#define ASRGR_CORE_CLK_FREQ_133MHZ		(0x0 << ASRGR_CORE_CLK_FREQ_OFFS)
+#define ASRGR_CORE_CLK_FREQ_150MHZ		(0x1 << ASRGR_CORE_CLK_FREQ_OFFS)
+#define ASRGR_CORE_CLK_FREQ_166MHZ		(0x2 << ASRGR_CORE_CLK_FREQ_OFFS)
+#define ASRGR_CORE_CLK_FREQ_200MHZ		(0x3 << ASRGR_CORE_CLK_FREQ_OFFS)
+
+#define ASRGR_VALID_PCM_INFO_OFFS		7
+#define ASRGR_VALID_PCM_INFO_MASK		(0x1 << ASRGR_VALID_PCM_INFO_OFFS)
+
+#define ASRGR_SAMPLE_FREQ_OFFS			8
+#define ASRGR_SAMPLE_FREQ_MASK			(0xf << ASRGR_SAMPLE_FREQ_OFFS)
+
+#define ASRGR_NON_PCM_OFFS			14
+#define ASRGR_NON_PCM_MASK			(1 << ASRGR_NON_PCM_OFFS)
+
+/* MV_AUDIO_I2S_REC_CTRL_REG*/
+#define AIRCR_I2S_RECORD_JUSTF_OFFS		26
+#define AIRCR_I2S_RECORD_JUSTF_MASK		(0xf << AIRCR_I2S_RECORD_JUSTF_OFFS)
+
+#define AIRCR_I2S_SAMPLE_SIZE_OFFS		30
+#define AIRCR_I2S_SAMPLE_SIZE_MASK		(0x3 << AIRCR_I2S_SAMPLE_SIZE_OFFS)
+
+/* 
+** Address decoding related.
+*/
+
+#define MV_AUDIO_MAX_ADDR_DECODE_WIN 		2
+#define MV_AUDIO_RECORD_WIN_NUM			0
+#define MV_AUDIO_PLAYBACK_WIN_NUM		1
+
+#define MV_AUDIO_WIN_CTRL_REG(unit, win)	(MV_AUDIO_REGS_BASE(unit) + 0xA04 + ((win)<<3))
+#define MV_AUDIO_WIN_BASE_REG(unit, win)	(MV_AUDIO_REGS_BASE(unit) + 0xA00 + ((win)<<3))
+
+#define MV_AUDIO_RECORD_WIN_CTRL_REG(unit)	MV_AUDIO_WIN_CTRL_REG(unit, MV_AUDIO_RECORD_WIN_NUM)
+#define MV_AUDIO_RECORD_WIN_BASE_REG(unit)	MV_AUDIO_WIN_BASE_REG(unit, MV_AUDIO_RECORD_WIN_NUM)
+#define MV_AUDIO_PLAYBACK_WIN_CTRL_REG(unit)	MV_AUDIO_WIN_CTRL_REG(unit, MV_AUDIO_PLAYBACK_WIN_NUM)
+#define MV_AUDIO_PLAYBACK_WIN_BASE_REG(unit)	MV_AUDIO_WIN_BASE_REG(unit, MV_AUDIO_PLAYBACK_WIN_NUM)
+
+
+/* BITs in Windows 0-3 Control and Base Registers */
+#define MV_AUDIO_WIN_ENABLE_BIT               0
+#define MV_AUDIO_WIN_ENABLE_MASK              (1<<MV_AUDIO_WIN_ENABLE_BIT)
+
+#define MV_AUDIO_WIN_TARGET_OFFSET            4
+#define MV_AUDIO_WIN_TARGET_MASK              (0xF<<MV_AUDIO_WIN_TARGET_OFFSET)
+
+#define MV_AUDIO_WIN_ATTR_OFFSET              8
+#define MV_AUDIO_WIN_ATTR_MASK                (0xFF<<MV_AUDIO_WIN_ATTR_OFFSET)
+
+#define MV_AUDIO_WIN_SIZE_OFFSET              16
+#define MV_AUDIO_WIN_SIZE_MASK                (0xFFFF<<MV_AUDIO_WIN_SIZE_OFFSET)
+
+#define MV_AUDIO_WIN_BASE_OFFSET              16
+#define MV_AUDIO_WIN_BASE_MASK                (0xFFFF<<MV_AUDIO_WIN_BASE_OFFSET)
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* __INCMVAudioRegsH */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/audio/dac/mvCLAudioCodec.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/audio/dac/mvCLAudioCodec.h
@@ -0,0 +1,144 @@
+
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCmvCLAudioCodech
+#define __INCmvCLAudioCodech
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#define  MV_CL_AUDIO_CODEC_CHIP_ID   0x1B
+#define  MV_CL_AUDIO_CODEC_REV_ID    0x1
+
+/* Selects the digital interface format used for the data in on SDIN. */
+typedef enum _mvDACDigitalIFFormat
+{
+    MV_L_JUSTIFIED_UP_TO_24_BIT,
+    MV_I2S_UP_TO_24_BIT,
+    MV_R_JUSTIFIED_UP_TO_24_BIT,
+    MV_R_JUSTIFIED_20_BIT,
+    MV_R_JUSTIFIED_18_BIT,
+    MV_R_JUSTIFIED_16_BIT
+
+} MV_DAC_DIGITAL_IF_FORMAT;
+
+/* Selects either the I2S or Left-Justified digital interface format for the
+   data on SDOUT. */
+typedef enum _mvADCMode
+{
+    MV_LEFT_JUSTIFIED_MODE,
+    MV_I2S_MODE
+} MV_ADC_MODE;
+
+
+/* Cirrus Logic device structure */
+typedef struct _mvAudioCodecDev
+{
+	/* MUST be set by user!!!   */
+	MV_VOID				*codecHandle;
+	MV_U8				chanNum;
+	MV_DAC_DIGITAL_IF_FORMAT  	DACDigitalIFFormat;
+	MV_ADC_MODE               	ADCMode;
+
+	/* Set by driver */
+	MV_U8  nChipID;
+	MV_U8  nRevID;
+
+} MV_AUDIO_CODEC_DEV;
+
+/* Initialize the Cirrus Logic device */
+MV_BOOL mvCLAudioCodecInit(MV_AUDIO_CODEC_DEV *pCodecDev);
+
+/* Function to control output volume (playback) */
+MV_VOID mvCLAudioCodecOutputVolumeSet(MV_AUDIO_CODEC_DEV *pCodecDev, MV_8  nVolume);
+MV_U8   mvCLAudioCodecOutputVolumeGet(MV_AUDIO_CODEC_DEV *pCodecDev);
+MV_VOID mvCLAudioCodecOutputVolumeMute(MV_AUDIO_CODEC_DEV *pCodecDev, MV_BOOL bMute);
+
+/* Function to control input volume (record) */
+MV_VOID mvCLAudioCodecInputVolumeSet(MV_AUDIO_CODEC_DEV *pCodecDev, MV_8  nVolume);
+MV_U8   mvCLAudioCodecInputVolumeGet(MV_AUDIO_CODEC_DEV *pCodecDev);
+MV_VOID mvCLAudioCodecInputVolumeMute(MV_AUDIO_CODEC_DEV *pCodecDev, MV_BOOL bMute);
+
+/* Function to control output tone */
+MV_VOID mvCLAudioCodecTrebleSet(MV_AUDIO_CODEC_DEV *pCodecDev, MV_8  nTreble);
+MV_U8   mvCLAudioCodecTrebleGet(MV_AUDIO_CODEC_DEV *pCodecDev);
+MV_VOID mvCLAudioCodecBassSet(MV_AUDIO_CODEC_DEV *pCodecDev, MV_8  nBass);
+MV_U8   mvCLAudioCodecBassGet(MV_AUDIO_CODEC_DEV *pCodecDev);
+
+/* Function to access the Cirrus Logic CODEC registers */
+MV_VOID mvCLAudioCodecRegSet(MV_AUDIO_CODEC_DEV *pCodecDev, MV_U8  nOffset, MV_U8 nData);
+MV_U8   mvCLAudioCodecRegGet(MV_AUDIO_CODEC_DEV *pCodecDev, MV_U8  nOffset);
+MV_VOID mvCLAudioCodecRegBitsSet(MV_AUDIO_CODEC_DEV *pCodecDev, MV_U8  nOffset, MV_U8 nBits);
+MV_VOID mvCLAudioCodecRegBitsReset(MV_AUDIO_CODEC_DEV *pCodecDev, MV_U8  nOffset, MV_U8 nBits);
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif  /* __INCmvCLAudioCodech */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/audio/dac/mvSysAudioDac.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/audio/dac/mvSysAudioDac.h
@@ -0,0 +1,122 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __MV_SYS_AUDIO_DAC_H__
+#define __MV_SYS_AUDIO_DAC_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/*******************************************************************************
+* mvSysAudioCodecRegRead
+*
+* DESCRIPTION:
+*	System interface for reading an Audio codec register.
+*
+* INPUT:
+*       codecHandle: Handle passed by OS glue by which an audio codec is
+*		     identified.
+*       regOffset:   Offset of codec register to be read.
+*
+* OUTPUT:
+*       regData:     Register data
+*
+* RETURN:
+*	MV_OK on success,
+*	MV_ERROR otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvSysAudioCodecRegRead(MV_VOID *codecHandle, MV_U32  regOffset, MV_U32 *regData);
+
+
+/*******************************************************************************
+* mvSysAudioCodecRegWrite
+*
+* DESCRIPTION:
+*	System interface for writing an Audio codec register.
+*
+* INPUT:
+*       codecHandle: Handle passed by OS glue by which an audio codec is
+*		     identified.
+*       regOffset:   Offset of codec register to be written. 
+*       regData:     Register data to write.
+*
+* OUTPUT:
+*	None.
+*
+* RETURN:
+*	MV_OK on success,
+*	MV_ERROR otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvSysAudioCodecRegWrite(MV_VOID *codecHandle, MV_U32  regOffset, MV_U32 regData);
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/audio/dac/mvCLAudioCodecRegs.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/audio/dac/mvCLAudioCodecRegs.h
@@ -0,0 +1,88 @@
+
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCmvCLAudioCodecRegsh
+#define __INCmvCLAudioCodecRegsh
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define   CL_AUDIO_CODEC_ID_REG                    0x1
+#define   CL_AUDIO_CODEC_IF_CTRL_REG               0x4
+#define   CL_AUDIO_CODEC_ADC_INPUT_INV_MUTE_REG    0x7
+#define   CL_AUDIO_CODEC_DAC_OUTPUT_CTRL_REG       0x8
+#define   CL_AUDIO_CODEC_DAC_CTRL_REG              0x9
+#define   CL_AUDIO_CODEC_PGAA_VOL_CTRL_REG         0xa
+#define   CL_AUDIO_CODEC_TONE_CTRL_REG             0x15
+#define   CL_AUDIO_CODEC_VOL_OUTA_CTRL_REG         0x16
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif  /* __INCmvCLAudioCodecRegsh */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/audio/dac/mvCLAudioCodec.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/audio/dac/mvCLAudioCodec.c
@@ -0,0 +1,506 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "mvCLAudioCodec.h"
+#include "mvCLAudioCodecRegs.h"
+#include "mvSysAudioDac.h"
+
+/*******************************************************************************
+* mvCLAudioCodecInit - Initizlize the Cirrus Logic device
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       pCodecDev: pointer to MV_AUDIO_CODEC_DEV structure.
+* OUTPUT:
+*		None
+* RETURN:
+*       MV_TRUE or MV_FALSE.
+*
+*******************************************************************************/
+MV_BOOL mvCLAudioCodecInit(MV_AUDIO_CODEC_DEV *pCodecDev)
+{
+    MV_U8    nData;
+
+    if(NULL == pCodecDev)
+    {
+        mvOsPrintf("%s: Error - pCodecDev = NULL!\n",__FUNCTION__);
+        return MV_FALSE;
+    }
+
+    /* Verify chip ID and revision */
+    nData = mvCLAudioCodecRegGet(pCodecDev,CL_AUDIO_CODEC_ID_REG);
+    if((MV_CL_AUDIO_CODEC_CHIP_ID != (nData >> 3)) ||
+       (MV_CL_AUDIO_CODEC_REV_ID  != (nData & 0x7)))
+    {
+        mvOsPrintf("%s: Error - Invalid Cirrus Logic chip/rev ID!\n",__FUNCTION__);
+        return MV_FALSE;
+    }
+
+    /* Set the digital Interface format */
+    nData = mvCLAudioCodecRegGet(pCodecDev,CL_AUDIO_CODEC_IF_CTRL_REG);
+    nData &= ~(0x7<<3);
+    nData |= (pCodecDev->DACDigitalIFFormat << 3);
+    mvCLAudioCodecRegSet(pCodecDev,CL_AUDIO_CODEC_IF_CTRL_REG,nData);
+
+    /* Set the ADC Mode */
+    if(MV_LEFT_JUSTIFIED_MODE == pCodecDev->ADCMode)
+        mvCLAudioCodecRegBitsReset(pCodecDev,CL_AUDIO_CODEC_IF_CTRL_REG,BIT2);
+    else
+        mvCLAudioCodecRegBitsSet(pCodecDev,CL_AUDIO_CODEC_IF_CTRL_REG,BIT2);
+
+
+    return MV_TRUE;
+}
+
+/*******************************************************************************
+* mvCLAudioCodecOutputVolumeSet - Set the Cirrus Logic output volume of OUTA
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       pCodecDev: pointer to MV_AUDIO_CODEC_DEV structure.
+*       nVolume  : Volume level.
+* OUTPUT:
+*		None
+* RETURN:
+*       None
+*
+*******************************************************************************/
+MV_VOID mvCLAudioCodecOutputVolumeSet(MV_AUDIO_CODEC_DEV *pCodecDev, MV_8  nVolume)
+{
+    if(NULL == pCodecDev)
+    {
+        mvOsPrintf("%s: Error - pCodecDev = NULL!\n",__FUNCTION__);
+        return;
+    }
+    mvCLAudioCodecRegSet(pCodecDev,CL_AUDIO_CODEC_VOL_OUTA_CTRL_REG,nVolume);
+}
+
+/*******************************************************************************
+* mvCLAudioCodecOutputVolumeGet - Get the Cirrus Logic output volume of OUTA
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       pCodecDev: pointer to MV_AUDIO_CODEC_DEV structure.
+* OUTPUT:
+*       None
+* RETURN:
+*		Volume level.
+*
+*******************************************************************************/
+MV_U8    mvCLAudioCodecOutputVolumeGet(MV_AUDIO_CODEC_DEV *pCodecDev)
+{
+    if(NULL == pCodecDev)
+    {
+        mvOsPrintf("%s: Error - pCodecDev = NULL!\n",__FUNCTION__);
+        return 0;
+    }
+    return mvCLAudioCodecRegGet(pCodecDev,CL_AUDIO_CODEC_VOL_OUTA_CTRL_REG);
+}
+
+/*******************************************************************************
+* mvCLAudioCodecOutputVolumeMute - Mute the Cirrus Logic output volume of OUTA
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       pCodecDev: pointer to MV_AUDIO_CODEC_DEV structure.
+*       bMute    : MV_TRUE for mute, MV_FALSE to un-mute
+* OUTPUT:
+*		None
+* RETURN:
+*       None
+*
+*******************************************************************************/
+MV_VOID mvCLAudioCodecOutputVolumeMute(MV_AUDIO_CODEC_DEV *pCodecDev, MV_BOOL bMute)
+{
+    if(NULL == pCodecDev)
+    {
+        mvOsPrintf("%s: Error - pCodecDev = NULL!\n",__FUNCTION__);
+        return;
+    }
+    if(MV_TRUE == bMute)
+        mvCLAudioCodecRegBitsSet(pCodecDev,CL_AUDIO_CODEC_DAC_OUTPUT_CTRL_REG,BIT0);
+    else
+        mvCLAudioCodecRegBitsReset(pCodecDev,CL_AUDIO_CODEC_DAC_OUTPUT_CTRL_REG,BIT0);
+}
+
+/*******************************************************************************
+* mvCLAudioCodecInputVolumeSet - Set the Cirrus Logic input volume of INA
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       pCodecDev: pointer to MV_AUDIO_CODEC_DEV structure.
+*       nVolume  : Volume level.
+* OUTPUT:
+*		None
+* RETURN:
+*       None
+*
+*******************************************************************************/
+MV_VOID mvCLAudioCodecInputVolumeSet(MV_AUDIO_CODEC_DEV *pCodecDev, MV_8  nVolume)
+{
+    MV_U8 nData;
+
+    if(NULL == pCodecDev)
+    {
+        mvOsPrintf("%s: Error - pCodecDev = NULL!\n",__FUNCTION__);
+        return;
+    }
+    nData = mvCLAudioCodecRegGet(pCodecDev,CL_AUDIO_CODEC_PGAA_VOL_CTRL_REG);
+    nData &= ~0x1f;
+    nData |= (0x1f & nVolume);
+    mvCLAudioCodecRegSet(pCodecDev,CL_AUDIO_CODEC_PGAA_VOL_CTRL_REG,nData);
+}
+
+/*******************************************************************************
+* mvCLAudioCodecInputVolumeGet - Get the Cirrus Logic input volume of INA
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       pCodecDev: pointer to MV_AUDIO_CODEC_DEV structure.
+* OUTPUT:
+*		None
+* RETURN:
+*       Volume level.
+*
+*******************************************************************************/
+MV_U8    mvCLAudioCodecInputVolumeGet(MV_AUDIO_CODEC_DEV *pCodecDev)
+{
+    if(NULL == pCodecDev)
+    {
+        mvOsPrintf("%s: Error - pCodecDev = NULL!\n",__FUNCTION__);
+        return 0;
+    }
+    return mvCLAudioCodecRegGet(pCodecDev,CL_AUDIO_CODEC_PGAA_VOL_CTRL_REG) & 0x1f;
+}
+
+/*******************************************************************************
+* mvCLAudioCodecInputVolumeMute - Mute the Cirrus Logic input volume of INA
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       pCodecDev: pointer to MV_AUDIO_CODEC_DEV structure.
+*       bMute    : MV_TRUE for mute, MV_FALSE to un-mute
+* OUTPUT:
+*		None
+* RETURN:
+*       None
+*
+*******************************************************************************/
+MV_VOID mvCLAudioCodecInputVolumeMute(MV_AUDIO_CODEC_DEV *pCodecDev,
+                                      MV_BOOL bMute)
+{
+    if(NULL == pCodecDev)
+    {
+        mvOsPrintf("%s: Error - pCodecDev = NULL!\n",__FUNCTION__);
+        return;
+    }
+    if(MV_TRUE == bMute)
+        mvCLAudioCodecRegBitsSet(pCodecDev,CL_AUDIO_CODEC_ADC_INPUT_INV_MUTE_REG,
+                                 BIT0);
+    else
+        mvCLAudioCodecRegBitsReset(pCodecDev,CL_AUDIO_CODEC_ADC_INPUT_INV_MUTE_REG,
+                                   BIT0);
+}
+
+/*******************************************************************************
+* mvCLAudioCodecTrebleSet - Set the Cirrus Logic output treble of INA
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       pCodecDev: pointer to MV_AUDIO_CODEC_DEV structure.
+*       nTreble  : treble value.
+* OUTPUT:
+*		None
+* RETURN:
+*       None
+*
+*******************************************************************************/
+MV_VOID mvCLAudioCodecTrebleSet(MV_AUDIO_CODEC_DEV *pCodecDev, MV_8  nTreble)
+{
+    MV_U8 nData;
+
+    if(NULL == pCodecDev)
+    {
+        mvOsPrintf("%s: Error - pCodecDev = NULL!\n",__FUNCTION__);
+        return;
+    }
+    nData = mvCLAudioCodecRegGet(pCodecDev,CL_AUDIO_CODEC_TONE_CTRL_REG);
+    nData &= 0xF;
+    nData |= (nTreble<<4);
+    mvCLAudioCodecRegSet(pCodecDev,CL_AUDIO_CODEC_TONE_CTRL_REG,nData);
+}
+
+/*******************************************************************************
+* mvCLAudioCodecTrebleGet - Get the Cirrus Logic output treble of INA
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       pCodecDev: pointer to MV_AUDIO_CODEC_DEV structure.
+* OUTPUT:
+*		None
+* RETURN:
+*       treble value
+*
+*******************************************************************************/
+MV_U8    mvCLAudioCodecTrebleGet(MV_AUDIO_CODEC_DEV *pCodecDev)
+{
+    if(NULL == pCodecDev)
+    {
+        mvOsPrintf("%s: Error - pCodecDev = NULL!\n",__FUNCTION__);
+        return 0;
+    }
+    return mvCLAudioCodecRegGet(pCodecDev,CL_AUDIO_CODEC_TONE_CTRL_REG)>>4;
+}
+/*******************************************************************************
+* mvCLAudioCodecBassSet - Set the Cirrus Logic output bass of INA
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       pCodecDev: pointer to MV_AUDIO_CODEC_DEV structure.
+*       nBass    : Bass level.
+* OUTPUT:
+*		None
+* RETURN:
+*       None
+*
+*******************************************************************************/
+MV_VOID mvCLAudioCodecBassSet(MV_AUDIO_CODEC_DEV *pCodecDev, MV_8  nBass)
+{
+    MV_U8 nData;
+
+    if(NULL == pCodecDev)
+    {
+        mvOsPrintf("%s: Error - pCodecDev = NULL!\n",__FUNCTION__);
+        return;
+    }
+    nData = mvCLAudioCodecRegGet(pCodecDev,CL_AUDIO_CODEC_TONE_CTRL_REG);
+    nData &= 0xf0;
+    nData |= nBass;
+    mvCLAudioCodecRegSet(pCodecDev,CL_AUDIO_CODEC_TONE_CTRL_REG,nData);
+}
+
+/*******************************************************************************
+* mvCLAudioCodecBassGet - Get the Cirrus Logic output bass of INA
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       pCodecDev: pointer to MV_AUDIO_CODEC_DEV structure.
+* OUTPUT:
+*		None
+* RETURN:
+*       Bass level
+*
+*******************************************************************************/
+MV_U8    mvCLAudioCodecBassGet(MV_AUDIO_CODEC_DEV *pCodecDev)
+{
+    if(NULL == pCodecDev)
+    {
+        mvOsPrintf("%s: Error - pCodecDev = NULL!\n",__FUNCTION__);
+        return 0;
+    }
+    return mvCLAudioCodecRegGet(pCodecDev,CL_AUDIO_CODEC_TONE_CTRL_REG)& 0xF;
+}
+
+/*******************************************************************************
+* mvCLAudioCodecRegSet - Set Cirrus Logic register value
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       pCodecDev: pointer to MV_AUDIO_CODEC_DEV structure.
+*       nOffset  : register offset
+*       nData    : register data
+* OUTPUT:
+*		None
+* RETURN:
+*       None
+*
+*******************************************************************************/
+MV_VOID mvCLAudioCodecRegSet(MV_AUDIO_CODEC_DEV *pCodecDev, MV_U8  nOffset,
+                             MV_U8 nData)
+{
+	MV_U32	offset, data;
+	
+	if(NULL == pCodecDev)
+	{
+		mvOsPrintf("%s: Error - pCodecDev = NULL!\n",__FUNCTION__);
+		return;
+	}
+	
+	offset = nOffset;
+	data = nData;
+	if(mvSysAudioCodecRegWrite(pCodecDev->codecHandle, offset, data) != MV_OK) {
+		mvOsPrintf("%s: Error while writing register!\n",__FUNCTION__);
+		return;
+	}
+	
+}
+
+/*******************************************************************************
+* mvCLAudioCodecRegGet - Set Cirrus Logic register value
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       pCodecDev: pointer to MV_AUDIO_CODEC_DEV structure.
+*       nOffset  : register offset
+* OUTPUT:
+*		None
+* RETURN:
+*       register data
+*
+*******************************************************************************/
+MV_U8   mvCLAudioCodecRegGet(MV_AUDIO_CODEC_DEV *pCodecDev, MV_U8  nOffset)
+{
+	MV_U32	offset, data;
+
+	if(NULL == pCodecDev)
+	{
+		mvOsPrintf("%s: Error - pCodecDev = NULL!\n",__FUNCTION__);
+		return 0;
+	}
+   	
+	offset = nOffset;
+	if(mvSysAudioCodecRegRead(pCodecDev->codecHandle, offset, &data) != MV_OK) {
+		mvOsPrintf("%s: Error while reading register!\n",__FUNCTION__);
+		return 0;
+	}
+
+	return (MV_U8)data;
+}
+
+/*******************************************************************************
+* mvCLAudioCodecRegBitsSet - Set Cirrus Logic register bits value
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       pCodecDev: pointer to MV_AUDIO_CODEC_DEV structure.
+*       nOffset  : register offset
+*       nBits    : register bits
+* OUTPUT:
+*		None
+* RETURN:
+*       None
+*
+*******************************************************************************/
+MV_VOID mvCLAudioCodecRegBitsSet(MV_AUDIO_CODEC_DEV *pCodecDev, MV_U8  nOffset,
+                                 MV_U8 nBits)
+{
+    MV_U8  nData;
+
+    if(NULL == pCodecDev)
+    {
+        mvOsPrintf("%s: Error - pCodecDev = NULL!\n",__FUNCTION__);
+        return;
+    }
+
+    nData = mvCLAudioCodecRegGet(pCodecDev,nOffset);
+    nData |= nBits;
+    mvCLAudioCodecRegSet(pCodecDev,nOffset,nData);
+
+}
+
+/*******************************************************************************
+* mvCLAudioCodecRegGet - Reset Cirrus Logic register bits value
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       pCodecDev: pointer to MV_AUDIO_CODEC_DEV structure.
+*       nOffset  : register offset
+*       nBits    : register bits
+* OUTPUT:
+*		None
+* RETURN:
+*       register data
+*
+*******************************************************************************/
+MV_VOID   mvCLAudioCodecRegBitsReset(MV_AUDIO_CODEC_DEV *pCodecDev, MV_U8  nOffset, MV_U8 nBits)
+{
+    MV_U8  nData;
+
+    if(NULL == pCodecDev)
+    {
+        mvOsPrintf("%s: Error - pCodecDev = NULL!\n",__FUNCTION__);
+        return;
+    }
+
+    nData = mvCLAudioCodecRegGet(pCodecDev,nOffset);
+    nData &= ~nBits;
+    mvCLAudioCodecRegSet(pCodecDev,nOffset,nData);
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/mvSpd.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/mvSpd.h
@@ -0,0 +1,302 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCmvDram
+#define __INCmvDram
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define MAX_DIMM_NUM 			2
+#define SPD_SIZE			128
+
+/* Dimm spd offsets */
+#define DIMM_MEM_TYPE 					2
+#define DIMM_ROW_NUM 					3
+#define DDR3_DIMM_ROW_NUM 				5
+#define DDR3_DIMM_ROW_NUM_MIN 				12
+#define DDR3_DIMM_ROW_NUM_OFF 				3
+#define DDR3_DIMM_ROW_NUM_MASK 				(7 << DDR3_DIMM_ROW_NUM_OFF)
+#define DIMM_COL_NUM 					4
+#define DDR3_DIMM_DEV_DENSITY 				4
+#define DDR3_DIMM_DEV_DENSITY_MASK 			0xf
+#define DDR3_DIMM_COL_NUM 				5
+#define DDR3_DIMM_COL_NUM_MIN 				9
+#define DDR3_DIMM_COL_NUM_OFF 				0
+#define DDR3_DIMM_COL_NUM_MASK 				(7 << DDR3_DIMM_COL_NUM_OFF)
+#define DIMM_MODULE_BANK_NUM 				5
+#define DDR3_DIMM_MODULE_ORG	 			7
+#define DDR3_DIMM_MODULE_DEVICE_WIDTH_OFF 		0
+#define DDR3_DIMM_MODULE_DEVICE_WIDTH_MASK		(7 << DDR3_DIMM_MODULE_DEVICE_WIDTH_OFF)
+#define DDR3_DIMM_MODULE_BANK_NUM_MIN 			1
+#define DDR3_DIMM_MODULE_BANK_NUM_OFF 			3
+#define DDR3_DIMM_MODULE_BANK_NUM_MASK			(7 << DDR3_DIMM_MODULE_BANK_NUM_OFF)
+#define DIMM_DATA_WIDTH 				6
+#define DDR3_DIMM_DATA_WIDTH 				8
+#define DDR3_DIMM_DATA_WIDTH_OFF 			0
+#define DDR3_DIMM_DATA_WIDTH_MASK			(7 << DDR3_DIMM_DATA_WIDTH_OFF)
+#define DDR3_DIMM_DATA_ECC_OFF 				3
+#define DDR3_DIMM_DATA_ECC_MASK				(3 << DDR3_DIMM_DATA_ECC_OFF)
+
+#define DIMM_VOLT_IF 					8
+#define DIMM_MIN_CC_AT_MAX_CAS 				9
+#define DDR3_DIMM_MTB_DIV 				11
+#define DDR3_DIMM_MIN_CC 				12
+#define DIMM_ERR_CHECK_TYPE 				11
+#define DIMM_REFRESH_INTERVAL 				12
+#define DIMM_SDRAM_WIDTH 				13
+#define DDR3_DIMM_SDRAM_WIDTH 				13
+#define DDR3_DIMM_SDRAM_WIDTH_OFF			0
+#define DDR3_DIMM_SDRAM_WIDTH_MASK			(7 << DDR3_DIMM_SDRAM_WIDTH_OFF)
+#define DIMM_ERR_CHECK_DATA_WIDTH 			14
+#define DIMM_MIN_CLK_DEL 				15
+#define DIMM_BURST_LEN_SUP 				16
+#define DIMM_DEV_BANK_NUM 				17
+#define DDR3_DIMM_DEV_BANK_NUM 				4
+#define DDR3_DIMM_DEV_BANK_OFF 				4
+#define DDR3_DIMM_DEV_BANK_MASK				(7 << DDR3_DIMM_DEV_BANK_OFF)
+#define DIMM_SUP_CAL 					18
+#define DDR3_DIMM_SUP_CAL_LSB 				14
+#define DDR3_DIMM_SUP_CAL_MSB 				15
+#define DIMM_DDR2_TYPE_INFORMATION          		20      /* DDR2 only */
+#define DIMM_BUF_ADDR_CONT_IN 				21
+#define DIMM_MIN_CC_AT_MAX_CAS_MINUS1			23
+#define DIMM_MIN_CC_AT_MAX_CAS_MINUS2			25
+#define DIMM_MIN_ROW_PRECHARGE_TIME			27
+#define DDR3_DIMM_MIN_ROW_PRECHARGE_TIME		20
+#define DIMM_MIN_ROW_ACTIVE_TO_ROW_ACTIVE		28
+#define DDR3_DIMM_MIN_ROW_ACTIVE_TO_ROW_ACTIVE		19
+#define DIMM_MIN_RAS_TO_CAS_DELAY			29
+#define DDR3_DIMM_MIN_RAS_TO_CAS_DELAY			18
+#define DIMM_MIN_RAS_PULSE_WIDTH			30
+#define DDR3_DIMM_MIN_RAS_PULSE_WIDTH_LSB		22
+#define DDR3_DIMM_MIN_RAS_PULSE_WIDTH_MSB		21
+#define DDR3_DIMM_MIN_RAS_PULSE_WIDTH_MSB_MASK		0xf
+#define DIMM_BANK_DENSITY				31
+#define DIMM_MIN_WRITE_RECOVERY_TIME        		36
+#define DDR3_DIMM_MIN_WRITE_RECOVERY_TIME        	17
+#define DIMM_MIN_WRITE_TO_READ_CMD_DELAY    		37
+#define DDR3_DIMM_MIN_WRITE_TO_READ_CMD_DELAY    	26
+#define DIMM_MIN_READ_TO_PRECH_CMD_DELAY    		38
+#define DDR3_DIMM_MIN_READ_TO_PRECH_CMD_DELAY    	27
+#define DIMM_MIN_ACTIVATE_TO_ACTIVATE_CMD    		41
+#define DDR3_DIMM_MIN_ACTIVATE_TO_ACTIVATE_CMD_MSB    	21
+#define DDR3_DIMM_MIN_ACTIVATE_TO_ACTIVATE_CMD_LSB    	23
+#define DIMM_MIN_REFRESH_TO_ACTIVATE_CMD    		42
+#define DDR3_DIMM_MIN_REFRESH_TO_ACTIVATE_CMD_MSB    	25
+#define DDR3_DIMM_MIN_REFRESH_TO_ACTIVATE_CMD_LSB    	24
+#define DDR3_DIMM_MIN_FOUR_ACTIVATE_WIN_DELAY_MSB	28
+#define DDR3_DIMM_MIN_FOUR_ACTIVATE_WIN_DELAY_MSB_MASK		0xf
+#define DDR3_DIMM_MIN_FOUR_ACTIVATE_WIN_DELAY_LSB    	29
+#define DIMM_SPD_VERSION    				62
+#define DDR3_MIN_CAS_LAT_TIME  				16
+
+/* Dimm Memory Type values */
+#define DIMM_MEM_TYPE_SDRAM					0x4
+#define DIMM_MEM_TYPE_DDR1 					0x7
+#define DIMM_MEM_TYPE_DDR2 					0x8
+#define DIMM_MEM_TYPE_DDR3 					0xB
+        
+#define DIMM_MODULE_MANU_OFFS 		64
+#define DIMM_MODULE_MANU_SIZE 		8
+#define DIMM_MODULE_VEN_OFFS 		73 
+#define DIMM_MODULE_VEN_SIZE 		25
+#define DIMM_MODULE_ID_OFFS 		99
+#define DIMM_MODULE_ID_SIZE 		18
+
+/* enumeration for voltage levels. */
+typedef enum _mvDimmVoltageIf
+{
+    TTL_5V_TOLERANT, 
+    LVTTL, 
+    HSTL_1_5V, 
+    SSTL_3_3V, 
+    SSTL_2_5V, 
+    VOLTAGE_UNKNOWN, 
+} MV_DIMM_VOLTAGE_IF;
+
+
+/* enumaration for SDRAM CAS Latencies. */
+typedef enum _mvDimmSdramCas
+{
+    SD_CL_1 =1,  
+    SD_CL_2,  
+    SD_CL_3, 
+    SD_CL_4, 
+    SD_CL_5, 
+    SD_CL_6, 
+    SD_CL_7, 
+    SD_FAULT
+}MV_DIMM_SDRAM_CAS;
+
+/* enumeration for memory types */
+typedef enum _mvMemoryType
+{
+    MEM_TYPE_SDRAM,
+    MEM_TYPE_DDR1,
+    MEM_TYPE_DDR2,
+    MEM_TYPE_DDR3
+}MV_MEMORY_TYPE;
+
+/* DIMM information structure */                                                    
+typedef struct _mvDimmInfo
+{
+    MV_MEMORY_TYPE  memoryType; 	/* DDR or SDRAM */
+
+    MV_U8       spdRawData[SPD_SIZE];  	/* Content of SPD-EEPROM copied 1:1  */
+
+    /* DIMM dimensions */
+    MV_U32  numOfRowAddr;
+    MV_U32  numOfColAddr;
+    MV_U32  numOfModuleBanks;
+    MV_U32  dataWidth;
+    MV_U32  errorCheckType;             /* ECC , PARITY..*/
+    MV_U32  sdramWidth;                 /* 4,8,16 or 32 */
+    MV_U32  errorCheckDataWidth;        /* 0 - no, 1 - Yes */
+    MV_U32  burstLengthSupported;
+    MV_U32  numOfBanksOnEachDevice;
+    MV_U32  suportedCasLatencies;
+    MV_U32  refreshInterval;
+    MV_U32  dimmBankDensity;
+    MV_U32  dimmTypeInfo;           /* DDR2 only */
+    MV_U32  dimmAttributes;
+
+    /* DIMM timing parameters */
+    MV_U32  minCycleTimeAtMaxCasLatPs;	
+    MV_U32  minCycleTimeAtMaxCasLatMinus1Ps;
+    MV_U32  minCycleTimeAtMaxCasLatMinus2Ps;
+	MV_U32  minRowPrechargeTime;
+	MV_U32  minRowActiveToRowActive;
+	MV_U32  minRasToCasDelay;
+	MV_U32  minRasPulseWidth;
+    MV_U32  minWriteRecoveryTime;   /* DDR3/2 only */
+    MV_U32  minWriteToReadCmdDelay; /* DDR3/2 only */
+    MV_U32  minReadToPrechCmdDelay; /* DDR3/2 only */
+    MV_U32  minRefreshToActiveCmd;  /* DDR3/2 only */
+    MV_U32  minActivateToActiveCmd;  /* DDR3/2 only */
+
+    /* Parameters calculated from the extracted DIMM information */
+    MV_U32  size;               /* 16,64,128,256 or 512 MByte in MB units */
+    MV_U32  deviceDensity;      /* 16,64,128,256 or 512 Mbit in MB units  */
+    MV_U32  numberOfDevices;
+    /* Added for DDR3 */
+    MV_U32  minCasLatTime;
+    MV_U32  minFourActiveWinDelay;
+} MV_DIMM_INFO;
+
+typedef struct _mvDramBankInfo
+{
+    MV_MEMORY_TYPE  memoryType; 	/* DDR1, DDR2 or SDRAM */
+
+    /* DIMM dimensions */
+    MV_U32  numOfRowAddr;
+    MV_U32  numOfColAddr;
+    MV_U32  dataWidth;
+    MV_U32  errorCheckType;             /* ECC , PARITY..*/
+    MV_U32  sdramWidth;                 /* 4,8,16 or 32 */
+    MV_U32  errorCheckDataWidth;        /* 0 - no, 1 - Yes */
+    MV_U32  burstLengthSupported;
+    MV_U32  numOfBanksOnEachDevice;
+    MV_U32  suportedCasLatencies;
+    MV_U32  refreshInterval;
+
+    /* DIMM timing parameters */
+    MV_U32  minCycleTimeAtMaxCasLatPs;	
+    MV_U32  minCycleTimeAtMaxCasLatMinus1Ps;
+    MV_U32  minCycleTimeAtMaxCasLatMinus2Ps;
+    MV_U32  minRowPrechargeTime;
+    MV_U32  minRowActiveToRowActive;
+    MV_U32  minRasToCasDelay;
+    MV_U32  minRasPulseWidth;
+    MV_U32  minWriteRecoveryTime;   /* DDR3/2 only */
+    MV_U32  minWriteToReadCmdDelay; /* DDR3/2 only */
+    MV_U32  minReadToPrechCmdDelay; /* DDR3/2 only */
+    MV_U32  minRefreshToActiveCmd;  /* DDR3/2 only */
+    MV_U32  minActivateToActiveCmd;  /* DDR3/2 only */
+                      
+    /* Parameters calculated from the extracted DIMM information */
+    MV_U32  size;
+    MV_U32  deviceDensity;           	/* 16,64,128,256 or 512 Mbit */
+    MV_U32  numberOfDevices;
+
+    /* DIMM attributes (MV_TRUE for yes) */
+    MV_BOOL registeredAddrAndControlInputs;
+
+    /* Added for DDR3 */
+    MV_U32  minCasLatTime;
+    MV_U32  minFourActiveWinDelay;
+
+}MV_DRAM_BANK_INFO;
+
+MV_STATUS mvDramBankInfoGet(MV_U32 bankNum, MV_DRAM_BANK_INFO *pBankInfo);
+MV_STATUS dimmSpdGet(MV_U32 dimmNum, MV_DIMM_INFO *pDimmInfo);
+MV_VOID dimmSpdPrint(MV_U32 dimmNum, MV_U32 sysClock);
+MV_STATUS dimmSpdCpy(MV_VOID);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __INCmvDram */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/mvDramIf.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/mvDramIf.h
@@ -0,0 +1,241 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#ifndef __INCmvDramIfh
+#define __INCmvDramIfh
+
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+/* includes */
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvSysDdrConfig.h"
+
+/* defines  */
+/* DRAM Timing parameters */
+#define SDRAM_TWR                    15  /* ns tWr */
+#define SDRAM_TRFC_64_512M_AT_200MHZ 70  /* ns tRfc for dens 64-512 @ 200MHz */
+#define SDRAM_TRFC_64_512M           75  /* ns tRfc for dens 64-512          */
+#define SDRAM_TRFC_1G                120 /* ns tRfc for dens 1GB             */
+#define SDRAM_TR2R_CYC               1   /* cycle for tR2r                   */
+#define SDRAM_TR2WW2R_CYC            1   /* cycle for tR2wW2r                */
+
+
+#define CAL_AUTO_DETECT     0   /* Do not force CAS latancy (mvDramIfDetect) */
+#define ECC_DISABLE         1   /* Force ECC to Disable                      */
+#define ECC_ENABLE          0   /* Force ECC to ENABLE                       */
+
+/* typedefs */
+
+
+/* enumeration for DDR1 supported CAS Latencies */
+typedef enum _mvDimmDdr1Cas
+{
+    DDR1_CL_1_5  = 0x02, 
+    DDR1_CL_2    = 0x04, 
+    DDR1_CL_2_5  = 0x08, 
+    DDR1_CL_3    = 0x10, 
+    DDR1_CL_4    = 0x40, 
+    DDR1_CL_FAULT
+} MV_DIMM_DDR1_CAS;
+
+/* enumeration for DDR2 supported CAS Latencies */
+typedef enum _mvDimmDdr2Cas
+{
+    DDR2_CL_3    = 0x08, 
+    DDR2_CL_4    = 0x10, 
+    DDR2_CL_5    = 0x20, 
+    DDR2_CL_6    = 0x40, 
+    DDR2_CL_FAULT
+} MV_DIMM_DDR2_CAS;
+
+/* enumeration for DDR3 supported CAS Latencies */
+typedef enum _mvDimmDdr3Cas
+{
+    DDR3_CL_5    = 0x2, 
+    DDR3_CL_6    = 0x4, 
+    DDR3_CL_7    = 0x8, 
+    DDR3_CL_8    = 0x10, 
+    DDR3_CL_9    = 0x20, 
+    DDR3_CL_10    = 0x40, 
+    DDR3_CL_FAULT
+} MV_DIMM_DDR3_CAS;
+
+/* This structure describes CPU interface address decode window               */
+typedef struct _mvDramIfDecWin 
+{
+	MV_ADDR_WIN   addrWin;    /* An address window*/
+	MV_BOOL       enable;     /* Address decode window is enabled/disabled    */
+}MV_DRAM_DEC_WIN;
+
+/* DDR parameters structure */
+typedef struct 
+{
+	MV_U32      	addr;
+	MV_U32		val;
+} MV_DDR_MC_PARAMS;
+
+typedef struct
+{
+	MV_U32 	addr;
+	MV_U32	mask;
+	MV_U32	val;
+} MV_DDR_INIT_POLL_AMV;	/* address/mask/value */
+
+typedef struct
+{
+	MV_U32 	addr;
+	MV_U32	mask;
+} MV_DDR_BIT_CLR_AM; /* address/mask */
+
+#define MV_DDR3_WL_NONE			0x0
+#define MV_DDR3_WL_FIRST_EDGE_1CS	0x11
+#define MV_DDR3_WL_FIRST_EDGE_2CS_CPY	0x12	/* Use same WL value of CS0 on CS1 */
+#define MV_DDR3_WL_FIRST_MEAN_1CS	0x01
+#define MV_DDR3_WL_FIRST_MEAN_2CS	0x02
+#define MV_DDR3_WL_FIRST_MEAN_2CS_CPY	0x03	/* Use same WL value of CS0 on CS1 */
+
+typedef struct
+{
+	MV_U32	type;
+} MV_DDR3_WL_TYP; /* DDR3 WL type */
+
+/* Used in DDR3 Write Levelling SET ONLY */
+typedef struct
+{
+	MV_U32	cs0_enable;
+	MV_U32	cs0_dly_4l;
+	MV_U32	cs1_enable;
+	MV_U32	cs1_dly_4l;
+} MV_DDR3_WL_SET_VAL;
+
+/* mvDramIf.h API list */
+MV_VOID   mvDramIfBasicAsmInit(MV_VOID);
+#if defined(MV_DDR_INCLUDE_DDRMC)
+
+MV_STATUS mvDramIfDetect(MV_U32 forcedCl);
+MV_VOID   _mvDramIfConfig(MV_VOID);
+
+MV_STATUS mvDramIfWinSet(MV_TARGET target, MV_DRAM_DEC_WIN *pAddrDecWin);
+MV_STATUS mvDramIfWinGet(MV_TARGET target, MV_DRAM_DEC_WIN *pAddrDecWin);
+MV_STATUS mvDramIfWinEnable(MV_TARGET target,MV_BOOL enable);
+
+MV_32 mvDramIfBankSizeGet(MV_U32 bankNum);
+MV_32 mvDramIfBankBaseGet(MV_U32 bankNum);
+MV_32 mvDramIfSizeGet(MV_VOID);
+
+MV_U32 mvDramIfParamCountGet(MV_VOID);
+MV_STATUS mvDramIfParamFill(MV_U32 ddrFreq, MV_DDR_MC_PARAMS * params, MV_U32 * paramcnt);
+MV_STATUS mvDramReconfigParamFill(MV_U32 ddrFreq, MV_U32 cpuFreq, MV_DDR_MC_PARAMS * params, MV_U32 * cnt);
+MV_STATUS mvDramInitPollAmvFill(MV_DDR_INIT_POLL_AMV * amv);
+MV_STATUS mvDramInitMresetMvFill(MV_DDR_BIT_CLR_AM * am);
+MV_STATUS mvDramInitDdr3wlTypeFill(MV_DDR3_WL_TYP * typ);
+MV_STATUS mvDramInitDdr3wlSetFill(MV_DDR3_WL_SET_VAL * val);
+
+MV_VOID mvIntrfaceParamPrint(MV_VOID);
+MV_VOID mvIntrfaceWidthPrint(MV_VOID);
+
+
+#elif defined(MV_DDR_INCLUDE_DDR2)
+
+MV_STATUS mvDramIfDetect(MV_U32 forcedCl, MV_BOOL eccDisable);
+MV_VOID   _mvDramIfConfig(int entryNum);
+
+MV_U32 mvDramIfBankSizeGet(MV_U32 bankNum);
+MV_U32 mvDramIfBankBaseGet(MV_U32 bankNum);
+MV_U32 mvDramIfSizeGet(MV_VOID);
+
+MV_U32 mvDramIfCalGet(void);
+MV_STATUS mvDramIfSingleBitErrThresholdSet(MV_U32 threshold);
+MV_VOID mvDramIfSelfRefreshSet(void);
+void mvDramIfShow(void);
+MV_U32 mvDramIfGetFirstCS(void);
+
+
+#elif defined(MV_DDR_INCLUDE_DDR1_2)
+
+MV_STATUS mvDramIfDetect(MV_U32 forcedCl);
+MV_VOID   _mvDramIfConfig(MV_VOID);
+
+MV_STATUS mvDramIfWinSet(MV_TARGET target, MV_DRAM_DEC_WIN *pAddrDecWin);
+MV_STATUS mvDramIfWinGet(MV_TARGET target, MV_DRAM_DEC_WIN *pAddrDecWin);
+MV_STATUS mvDramIfWinEnable(MV_TARGET target,MV_BOOL enable);
+MV_32 mvDramIfBankSizeGet(MV_U32 bankNum);
+MV_32 mvDramIfBankBaseGet(MV_U32 bankNum);
+MV_32 mvDramIfSizeGet(MV_VOID);
+
+
+#endif
+
+
+
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* __INCmvDramIfh */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/mvSysDdr.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/mvSysDdr.h
@@ -0,0 +1,118 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __mvSysDdr_h__
+#define __mvSysDdr_h__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/*******************************************************************************
+* mvSysDdrSpdRead
+*
+* DESCRIPTION:
+*	System interface for reading DDR SPD contents.
+*
+* INPUT:
+*       data:	Buffer to read data into.
+*       size:	Number of bytes to read.
+*
+* OUTPUT:
+*       data:	SPD data.
+*
+* RETURN:
+*	MV_OK on success,
+*	MV_ERROR otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvSysDdrSpdRead(MV_U8 *data, MV_U32 size);
+
+
+/*******************************************************************************
+* mvSysDdrSpdWrite
+*
+* DESCRIPTION:
+*	System interface for writing DDR SPD contents.
+*
+* INPUT:
+*       data:	Buffer holding the data to be written.
+*       size:	Number of bytes to write.
+*
+* OUTPUT:
+*	None.
+*
+* RETURN:
+*	MV_OK on success,
+*	MV_ERROR otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvSysDdrSpdWrite(MV_U8 *data, MV_U32 size);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddr1_2/mvDram.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddr1_2/mvDram.c
@@ -0,0 +1,1476 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "ddr1_2/mvDram.h"
+#include "boardEnv/mvBoardEnvLib.h"
+
+#undef MV_DEBUG
+#ifdef MV_DEBUG
+#define DB(x) x
+#else
+#define DB(x)
+#endif
+
+static MV_VOID cpyDimm2BankInfo(MV_DIMM_INFO *pDimmInfo, 
+                                            MV_DRAM_BANK_INFO *pBankInfo);
+static MV_U32  cas2ps(MV_U8 spd_byte);
+/*******************************************************************************
+* mvDramBankGet - Get the DRAM bank paramters.
+*
+* DESCRIPTION:
+*       This function retrieves DRAM bank parameters as described in 
+*       DRAM_BANK_INFO struct to the controller DRAM unit. In case the board 
+*       has its DRAM on DIMMs it will use its EEPROM to extract SPD data
+*       from it. Otherwise, if the DRAM is soldered on board, the function 
+*       should insert its bank information into MV_DRAM_BANK_INFO struct.
+*
+* INPUT:
+*       bankNum  - Board DRAM bank number.
+*
+* OUTPUT:
+*       pBankInfo  - DRAM bank information struct.
+*
+* RETURN:
+*       MV_FAIL - Bank parameters could not be read.
+*
+*******************************************************************************/
+MV_STATUS mvDramBankInfoGet(MV_U32 bankNum, MV_DRAM_BANK_INFO *pBankInfo)
+{
+    MV_DIMM_INFO dimmInfo;
+
+    DB(mvOsPrintf("Dram: mvDramBankInfoGet bank %d\n", bankNum)); 
+    /* zero pBankInfo structure */
+    memset(pBankInfo, 0, sizeof(*pBankInfo));
+
+    if((NULL == pBankInfo) || (bankNum >= MV_DRAM_MAX_CS ))
+    {
+        DB(mvOsPrintf("Dram: mvDramBankInfoGet bad params \n")); 
+        return MV_BAD_PARAM;
+    }
+    if( MV_OK != dimmSpdGet((MV_U32)(bankNum/2), &dimmInfo))
+    {
+    DB(mvOsPrintf("Dram: ERR dimmSpdGet failed to get dimm info \n"));
+    return MV_FAIL;
+    }
+    if((dimmInfo.numOfModuleBanks == 1) && ((bankNum % 2) == 1))
+    {
+    DB(mvOsPrintf("Dram: ERR dimmSpdGet. Can't find DIMM bank 2 \n"));
+    return MV_FAIL;
+    }
+
+    /* convert Dimm info to Bank info */
+    cpyDimm2BankInfo(&dimmInfo, pBankInfo);
+    
+    return MV_OK;
+}
+
+/*******************************************************************************
+* cpyDimm2BankInfo - Convert a Dimm info struct into a bank info struct.
+*
+* DESCRIPTION:
+*       Convert a Dimm info struct into a bank info struct.
+*
+* INPUT:
+*       pDimmInfo - DIMM information structure.
+*
+* OUTPUT:
+*       pBankInfo  - DRAM bank information struct.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+static MV_VOID cpyDimm2BankInfo(MV_DIMM_INFO *pDimmInfo, 
+                                                MV_DRAM_BANK_INFO *pBankInfo)
+{
+    pBankInfo->memoryType = pDimmInfo->memoryType;        
+
+    /* DIMM dimensions */
+    pBankInfo->numOfRowAddr = pDimmInfo->numOfRowAddr;
+    pBankInfo->numOfColAddr = pDimmInfo->numOfColAddr;
+    pBankInfo->dataWidth = pDimmInfo->dataWidth;
+    pBankInfo->errorCheckType = pDimmInfo->errorCheckType;             
+    pBankInfo->sdramWidth = pDimmInfo->sdramWidth;
+    pBankInfo->errorCheckDataWidth = pDimmInfo->errorCheckDataWidth;   
+    pBankInfo->numOfBanksOnEachDevice = pDimmInfo->numOfBanksOnEachDevice;
+    pBankInfo->suportedCasLatencies = pDimmInfo->suportedCasLatencies;
+    pBankInfo->refreshInterval = pDimmInfo->refreshInterval;
+ 
+    /* DIMM timing parameters */
+    pBankInfo->minCycleTimeAtMaxCasLatPs = pDimmInfo->minCycleTimeAtMaxCasLatPs;
+    pBankInfo->minCycleTimeAtMaxCasLatMinus1Ps = 
+                                    pDimmInfo->minCycleTimeAtMaxCasLatMinus1Ps;
+    pBankInfo->minCycleTimeAtMaxCasLatMinus2Ps = 
+                                    pDimmInfo->minCycleTimeAtMaxCasLatMinus2Ps;
+
+    pBankInfo->minRowPrechargeTime     = pDimmInfo->minRowPrechargeTime;     
+    pBankInfo->minRowActiveToRowActive = pDimmInfo->minRowActiveToRowActive;
+    pBankInfo->minRasToCasDelay        = pDimmInfo->minRasToCasDelay;       
+    pBankInfo->minRasPulseWidth        = pDimmInfo->minRasPulseWidth;       
+    pBankInfo->minWriteRecoveryTime    = pDimmInfo->minWriteRecoveryTime;
+    pBankInfo->minWriteToReadCmdDelay  = pDimmInfo->minWriteToReadCmdDelay;
+    pBankInfo->minReadToPrechCmdDelay  = pDimmInfo->minReadToPrechCmdDelay;
+    pBankInfo->minRefreshToActiveCmd   = pDimmInfo->minRefreshToActiveCmd;
+               
+    /* Parameters calculated from the extracted DIMM information */
+    pBankInfo->size = pDimmInfo->size/pDimmInfo->numOfModuleBanks;
+    pBankInfo->deviceDensity = pDimmInfo->deviceDensity;              
+    pBankInfo->numberOfDevices = pDimmInfo->numberOfDevices /
+                                 pDimmInfo->numOfModuleBanks;
+ 
+    /* DIMM attributes (MV_TRUE for yes) */
+
+    if ((pDimmInfo->memoryType == MEM_TYPE_SDRAM) ||
+        (pDimmInfo->memoryType == MEM_TYPE_DDR1)   )
+    {   
+        if (pDimmInfo->dimmAttributes & BIT1)
+            pBankInfo->registeredAddrAndControlInputs = MV_TRUE;
+        else
+            pBankInfo->registeredAddrAndControlInputs = MV_FALSE;
+    }
+    else /* pDimmInfo->memoryType == MEM_TYPE_DDR2 */
+    {
+        if (pDimmInfo->dimmTypeInfo & (BIT0 | BIT4))
+            pBankInfo->registeredAddrAndControlInputs = MV_TRUE;
+        else
+            pBankInfo->registeredAddrAndControlInputs = MV_FALSE;
+    }
+
+    return;
+}
+
+/*******************************************************************************
+* dimmSpdCpy - Cpy SPD parameters from dimm 0 to dimm 1.
+*
+* DESCRIPTION:
+*       Read the DIMM SPD parameters from dimm 0 into dimm 1 SPD.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE if function could read DIMM parameters, MV_FALSE otherwise.
+*
+*******************************************************************************/
+MV_STATUS dimmSpdCpy(MV_VOID)
+{
+    MV_U32 i;
+    MV_U32 spdChecksum;
+     
+    MV_TWSI_SLAVE twsiSlave;
+    MV_U8 data[SPD_SIZE];
+
+    /* zero dimmInfo structure */
+    memset(data, 0, SPD_SIZE);
+
+    /* read the dimm eeprom */
+    DB(mvOsPrintf("DRAM: Read Dimm eeprom\n"));
+    twsiSlave.slaveAddr.address = MV_BOARD_DIMM0_I2C_ADDR;
+    twsiSlave.slaveAddr.type = ADDR7_BIT;
+    twsiSlave.validOffset = MV_TRUE;
+    twsiSlave.offset = 0;
+    twsiSlave.moreThen256 = MV_FALSE;
+
+    if( MV_OK != mvTwsiRead (&twsiSlave, data, SPD_SIZE) )
+    {
+        DB(mvOsPrintf("DRAM: ERR. no DIMM in dimmNum 0\n"));
+        return MV_FAIL;
+    }
+    DB(puts("DRAM: Reading dimm info succeded.\n"));
+    
+    /* calculate SPD checksum */
+    spdChecksum = 0;
+    
+    for(i = 0 ; i <= 62 ; i++)
+    {
+        spdChecksum += data[i];
+    }
+    
+    if ((spdChecksum & 0xff) != data[63])
+    {
+        DB(mvOsPrintf("DRAM: Warning. Wrong SPD Checksum %2x, expValue=%2x\n",
+                            (MV_U32)(spdChecksum & 0xff), data[63]));
+    }
+    else
+    {
+        DB(mvOsPrintf("DRAM: SPD Checksum ok!\n"));
+    }
+
+    /* copy the SPD content 1:1 into the DIMM 1 SPD */
+    twsiSlave.slaveAddr.address = MV_BOARD_DIMM1_I2C_ADDR;
+    twsiSlave.slaveAddr.type = ADDR7_BIT;
+    twsiSlave.validOffset = MV_TRUE;
+    twsiSlave.offset = 0;
+    twsiSlave.moreThen256 = MV_FALSE;
+
+    for(i = 0 ; i < SPD_SIZE ; i++)
+    {
+	twsiSlave.offset = i;
+	if( MV_OK != mvTwsiWrite (&twsiSlave, &data[i], 1) )
+	{
+	    mvOsPrintf("DRAM: ERR. no DIMM in dimmNum 1 byte %d \n",i);
+	    return MV_FAIL;
+	}
+	mvOsDelay(5);
+    }
+    
+    DB(puts("DRAM: Reading dimm info succeded.\n"));
+    return MV_OK;
+}
+
+/*******************************************************************************
+* dimmSpdGet - Get the SPD parameters.
+*
+* DESCRIPTION:
+*       Read the DIMM SPD parameters into given struct parameter.
+*
+* INPUT:
+*       dimmNum - DIMM number. See MV_BOARD_DIMM_NUM enumerator.
+*
+* OUTPUT:
+*       pDimmInfo - DIMM information structure.
+*
+* RETURN:
+*       MV_TRUE if function could read DIMM parameters, MV_FALSE otherwise.
+*
+*******************************************************************************/
+MV_STATUS dimmSpdGet(MV_U32 dimmNum, MV_DIMM_INFO *pDimmInfo)
+{
+    MV_U32 i;
+    MV_U32 density = 1;
+    MV_U32 spdChecksum;
+     
+    MV_TWSI_SLAVE twsiSlave;
+    MV_U8 data[SPD_SIZE];
+
+    if((NULL == pDimmInfo)|| (dimmNum >= MAX_DIMM_NUM))
+    {
+        DB(mvOsPrintf("Dram: mvDramBankInfoGet bad params \n")); 
+        return MV_BAD_PARAM;
+    }
+
+    /* zero dimmInfo structure */
+    memset(data, 0, SPD_SIZE);
+
+    /* read the dimm eeprom */
+    DB(mvOsPrintf("DRAM: Read Dimm eeprom\n"));
+    twsiSlave.slaveAddr.address = (dimmNum == 0) ?
+                            MV_BOARD_DIMM0_I2C_ADDR : MV_BOARD_DIMM1_I2C_ADDR;
+    twsiSlave.slaveAddr.type = ADDR7_BIT;
+    twsiSlave.validOffset = MV_TRUE;
+    twsiSlave.offset = 0;
+    twsiSlave.moreThen256 = MV_FALSE;
+
+    if( MV_OK != mvTwsiRead (&twsiSlave, data, SPD_SIZE) )
+    {
+        DB(mvOsPrintf("DRAM: ERR. no DIMM in dimmNum %d \n", dimmNum));
+        return MV_FAIL;
+    }
+    DB(puts("DRAM: Reading dimm info succeded.\n"));
+    
+    /* calculate SPD checksum */
+    spdChecksum = 0;
+    
+        for(i = 0 ; i <= 62 ; i++)
+        {
+        spdChecksum += data[i];
+    }
+    
+    if ((spdChecksum & 0xff) != data[63])
+    {
+        DB(mvOsPrintf("DRAM: Warning. Wrong SPD Checksum %2x, expValue=%2x\n",
+                            (MV_U32)(spdChecksum & 0xff), data[63]));
+    }
+    else
+    {
+        DB(mvOsPrintf("DRAM: SPD Checksum ok!\n"));
+    }
+
+    /* copy the SPD content 1:1 into the dimmInfo structure*/
+    for(i = 0 ; i < SPD_SIZE ; i++)
+    {
+        pDimmInfo->spdRawData[i] = data[i];
+        DB(mvOsPrintf("SPD-EEPROM Byte %3d = %3x (%3d)\n",i, data[i], data[i]));
+    }
+
+    DB(mvOsPrintf("DRAM SPD Information:\n"));
+
+    /* Memory type (DDR / SDRAM) */
+    switch (data[DIMM_MEM_TYPE])
+    {
+        case (DIMM_MEM_TYPE_SDRAM):
+            pDimmInfo->memoryType = MEM_TYPE_SDRAM;
+            DB(mvOsPrintf("DRAM Memeory type SDRAM\n"));
+            break;
+        case (DIMM_MEM_TYPE_DDR1):
+            pDimmInfo->memoryType = MEM_TYPE_DDR1;
+            DB(mvOsPrintf("DRAM Memeory type DDR1\n"));
+            break;
+        case (DIMM_MEM_TYPE_DDR2):
+            pDimmInfo->memoryType = MEM_TYPE_DDR2;
+            DB(mvOsPrintf("DRAM Memeory type DDR2\n"));
+            break;
+        default:
+            mvOsPrintf("ERROR: Undefined memory type!\n");
+            return MV_ERROR;
+    }
+
+    
+    /* Number Of Row Addresses */
+    pDimmInfo->numOfRowAddr = data[DIMM_ROW_NUM];
+    DB(mvOsPrintf("DRAM numOfRowAddr[3]         %d\n",pDimmInfo->numOfRowAddr));
+        
+    /* Number Of Column Addresses */
+    pDimmInfo->numOfColAddr = data[DIMM_COL_NUM];
+    DB(mvOsPrintf("DRAM numOfColAddr[4]         %d\n",pDimmInfo->numOfColAddr));
+        
+    /* Number Of Module Banks */
+    pDimmInfo->numOfModuleBanks = data[DIMM_MODULE_BANK_NUM];
+    DB(mvOsPrintf("DRAM numOfModuleBanks[5]     0x%x\n", 
+                                                  pDimmInfo->numOfModuleBanks));
+        
+    /* Number of module banks encoded differently for DDR2 */
+    if (pDimmInfo->memoryType == MEM_TYPE_DDR2)
+        pDimmInfo->numOfModuleBanks = (pDimmInfo->numOfModuleBanks & 0x7)+1;
+
+    /* Data Width */
+    pDimmInfo->dataWidth = data[DIMM_DATA_WIDTH];
+    DB(mvOsPrintf("DRAM dataWidth[6]            0x%x\n", pDimmInfo->dataWidth));
+        
+    /* Minimum Cycle Time At Max CasLatancy */
+    pDimmInfo->minCycleTimeAtMaxCasLatPs = cas2ps(data[DIMM_MIN_CC_AT_MAX_CAS]);
+
+    /* Error Check Type */
+    pDimmInfo->errorCheckType = data[DIMM_ERR_CHECK_TYPE];
+    DB(mvOsPrintf("DRAM errorCheckType[11]      0x%x\n", 
+                                                    pDimmInfo->errorCheckType));
+
+    /* Refresh Interval */
+    pDimmInfo->refreshInterval = data[DIMM_REFRESH_INTERVAL];
+    DB(mvOsPrintf("DRAM refreshInterval[12]     0x%x\n", 
+                                                   pDimmInfo->refreshInterval));
+    
+    /* Sdram Width */
+    pDimmInfo->sdramWidth = data[DIMM_SDRAM_WIDTH];
+    DB(mvOsPrintf("DRAM sdramWidth[13]          0x%x\n",pDimmInfo->sdramWidth));
+        
+    /* Error Check Data Width */
+    pDimmInfo->errorCheckDataWidth = data[DIMM_ERR_CHECK_DATA_WIDTH];
+    DB(mvOsPrintf("DRAM errorCheckDataWidth[14] 0x%x\n", 
+                                               pDimmInfo->errorCheckDataWidth));
+    
+    /* Burst Length Supported */
+    /*     SDRAM/DDR1:
+                    *******-******-******-******-******-******-******-******* 
+                    * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * 
+                    *******-******-******-******-******-******-******-******* 
+    burst length =  * Page | TBD  | TBD  | TBD  |  8   |  4   |  2   |   1  * 
+                    *********************************************************/ 
+    /*     DDR2:
+                    *******-******-******-******-******-******-******-******* 
+                    * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * 
+                    *******-******-******-******-******-******-******-******* 
+    burst length =  * Page | TBD  | TBD  | TBD  |  8   |  4   | TBD  | TBD  * 
+                    *********************************************************/ 
+
+    pDimmInfo->burstLengthSupported = data[DIMM_BURST_LEN_SUP];
+    DB(mvOsPrintf("DRAM burstLengthSupported[16] 0x%x\n", 
+                                              pDimmInfo->burstLengthSupported));
+    
+    /* Number Of Banks On Each Device */
+    pDimmInfo->numOfBanksOnEachDevice = data[DIMM_DEV_BANK_NUM];
+    DB(mvOsPrintf("DRAM numOfBanksOnEachDevice[17] 0x%x\n", 
+                                            pDimmInfo->numOfBanksOnEachDevice));
+    
+    /* Suported Cas Latencies */
+                   
+    /*      SDRAM:
+            *******-******-******-******-******-******-******-******* 
+            * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * 
+            *******-******-******-******-******-******-******-******* 
+    CAS =   * TBD  |  7   |  6   |  5   |  4   |  3   |   2  |   1  * 
+            ********************************************************/ 
+
+    /*     DDR 1:
+            *******-******-******-******-******-******-******-******* 
+            * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * 
+            *******-******-******-******-******-******-******-******* 
+    CAS =   * TBD  |  4   | 3.5  |   3  | 2.5  |  2   | 1.5  |   1  * 
+            *********************************************************/
+
+    /*     DDR 2:
+            *******-******-******-******-******-******-******-******* 
+            * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * 
+            *******-******-******-******-******-******-******-******* 
+    CAS =   * TBD  | TBD  |  5   |  4   |  3   |  2   | TBD  | TBD  * 
+            *********************************************************/
+    
+    pDimmInfo->suportedCasLatencies = data[DIMM_SUP_CAL];
+    DB(mvOsPrintf("DRAM suportedCasLatencies[18]    0x%x\n", 
+                                              pDimmInfo->suportedCasLatencies));
+
+    /* For DDR2 only, get the DIMM type information */
+    if (pDimmInfo->memoryType == MEM_TYPE_DDR2)
+    {   
+        pDimmInfo->dimmTypeInfo = data[DIMM_DDR2_TYPE_INFORMATION];
+        DB(mvOsPrintf("DRAM dimmTypeInfo[20] (DDR2) 0x%x\n", 
+                                                      pDimmInfo->dimmTypeInfo));
+    }
+
+    /* SDRAM Modules Attributes */
+    pDimmInfo->dimmAttributes = data[DIMM_BUF_ADDR_CONT_IN];
+    DB(mvOsPrintf("DRAM dimmAttributes[21]          0x%x\n",    
+                                                    pDimmInfo->dimmAttributes));
+    
+    /* Minimum Cycle Time At Max CasLatancy Minus 1*/
+    pDimmInfo->minCycleTimeAtMaxCasLatMinus1Ps = 
+                                    cas2ps(data[DIMM_MIN_CC_AT_MAX_CAS_MINUS1]);
+
+    /* Minimum Cycle Time At Max CasLatancy Minus 2*/
+    pDimmInfo->minCycleTimeAtMaxCasLatMinus2Ps = 
+                                    cas2ps(data[DIMM_MIN_CC_AT_MAX_CAS_MINUS2]);
+
+    pDimmInfo->minRowPrechargeTime = data[DIMM_MIN_ROW_PRECHARGE_TIME];
+    DB(mvOsPrintf("DRAM minRowPrechargeTime[27]     0x%x\n", 
+                                               pDimmInfo->minRowPrechargeTime));
+    pDimmInfo->minRowActiveToRowActive = data[DIMM_MIN_ROW_ACTIVE_TO_ROW_ACTIVE];
+    DB(mvOsPrintf("DRAM minRowActiveToRowActive[28] 0x%x\n", 
+                                           pDimmInfo->minRowActiveToRowActive));
+    pDimmInfo->minRasToCasDelay = data[DIMM_MIN_RAS_TO_CAS_DELAY];
+    DB(mvOsPrintf("DRAM minRasToCasDelay[29]        0x%x\n", 
+                                                  pDimmInfo->minRasToCasDelay));
+    pDimmInfo->minRasPulseWidth = data[DIMM_MIN_RAS_PULSE_WIDTH];
+    DB(mvOsPrintf("DRAM minRasPulseWidth[30]        0x%x\n", 
+                                                  pDimmInfo->minRasPulseWidth));
+        
+    /* DIMM Bank Density */
+    pDimmInfo->dimmBankDensity = data[DIMM_BANK_DENSITY];
+    DB(mvOsPrintf("DRAM dimmBankDensity[31]         0x%x\n", 
+                                                   pDimmInfo->dimmBankDensity));
+
+    /* Only DDR2 includes Write Recovery Time field. Other SDRAM ignore     */
+    pDimmInfo->minWriteRecoveryTime = data[DIMM_MIN_WRITE_RECOVERY_TIME];
+    DB(mvOsPrintf("DRAM minWriteRecoveryTime[36]    0x%x\n", 
+                                              pDimmInfo->minWriteRecoveryTime));
+    
+    /* Only DDR2 includes Internal Write To Read Command Delay field.       */
+    pDimmInfo->minWriteToReadCmdDelay = data[DIMM_MIN_WRITE_TO_READ_CMD_DELAY];
+    DB(mvOsPrintf("DRAM minWriteToReadCmdDelay[37]  0x%x\n", 
+                                            pDimmInfo->minWriteToReadCmdDelay));
+    
+    /* Only DDR2 includes Internal Read To Precharge Command Delay field.   */
+    pDimmInfo->minReadToPrechCmdDelay = data[DIMM_MIN_READ_TO_PRECH_CMD_DELAY];
+    DB(mvOsPrintf("DRAM minReadToPrechCmdDelay[38]  0x%x\n",    
+                                            pDimmInfo->minReadToPrechCmdDelay));
+    
+    /* Only DDR2 includes Minimum Refresh to Activate/Refresh Command field */
+    pDimmInfo->minRefreshToActiveCmd = data[DIMM_MIN_REFRESH_TO_ACTIVATE_CMD];
+    DB(mvOsPrintf("DRAM minRefreshToActiveCmd[42]   0x%x\n", 
+                                             pDimmInfo->minRefreshToActiveCmd));
+                 
+    /* calculating the sdram density. Representing device density from      */
+    /* bit 20 to allow representation of 4GB and above.                     */
+    /* For example, if density is 512Mbit 0x20000000, will be represent in  */
+    /* deviceDensity by 0x20000000 >> 16 --> 0x00000200. Another example    */
+    /* is density 8GB 0x200000000 >> 16 --> 0x00002000.                     */
+    density = (1 << ((pDimmInfo->numOfRowAddr + pDimmInfo->numOfColAddr) - 20));
+    pDimmInfo->deviceDensity = density * 
+                                pDimmInfo->numOfBanksOnEachDevice * 
+                                pDimmInfo->sdramWidth;
+    DB(mvOsPrintf("DRAM deviceDensity           %d\n",pDimmInfo->deviceDensity));
+    
+    /* Number of devices includeing Error correction */
+    pDimmInfo->numberOfDevices = (pDimmInfo->dataWidth/pDimmInfo->sdramWidth) * 
+                                  pDimmInfo->numOfModuleBanks;
+    DB(mvOsPrintf("DRAM numberOfDevices         %d\n",  
+                                                   pDimmInfo->numberOfDevices));
+
+    pDimmInfo->size = 0; 
+
+    /* Note that pDimmInfo->size is in MB units */
+    if (pDimmInfo->memoryType == MEM_TYPE_SDRAM)
+    {
+        if (pDimmInfo->dimmBankDensity & BIT0)
+            pDimmInfo->size += 1024;                /* Equal to 1GB     */
+        else if (pDimmInfo->dimmBankDensity & BIT1)
+            pDimmInfo->size += 8;                   /* Equal to 8MB     */
+        else if (pDimmInfo->dimmBankDensity & BIT2)
+            pDimmInfo->size += 16;                  /* Equal to 16MB    */
+        else if (pDimmInfo->dimmBankDensity & BIT3)
+            pDimmInfo->size += 32;                  /* Equal to 32MB    */
+        else if (pDimmInfo->dimmBankDensity & BIT4)
+            pDimmInfo->size += 64;                  /* Equal to 64MB    */
+        else if (pDimmInfo->dimmBankDensity & BIT5)
+            pDimmInfo->size += 128;                 /* Equal to 128MB   */
+        else if (pDimmInfo->dimmBankDensity & BIT6) 
+            pDimmInfo->size += 256;                 /* Equal to 256MB   */
+        else if (pDimmInfo->dimmBankDensity & BIT7) 
+            pDimmInfo->size += 512;                 /* Equal to 512MB   */
+    }
+    else if (pDimmInfo->memoryType == MEM_TYPE_DDR1)
+    {
+        if (pDimmInfo->dimmBankDensity & BIT0)
+            pDimmInfo->size += 1024;                /* Equal to 1GB     */
+        else if (pDimmInfo->dimmBankDensity & BIT1)
+            pDimmInfo->size += 2048;                /* Equal to 2GB     */
+        else if (pDimmInfo->dimmBankDensity & BIT2)
+            pDimmInfo->size += 16;                  /* Equal to 16MB    */
+        else if (pDimmInfo->dimmBankDensity & BIT3)
+            pDimmInfo->size += 32;                  /* Equal to 32MB    */
+        else if (pDimmInfo->dimmBankDensity & BIT4)
+            pDimmInfo->size += 64;                  /* Equal to 64MB    */
+        else if (pDimmInfo->dimmBankDensity & BIT5)
+            pDimmInfo->size += 128;                 /* Equal to 128MB   */
+        else if (pDimmInfo->dimmBankDensity & BIT6) 
+            pDimmInfo->size += 256;                 /* Equal to 256MB   */
+        else if (pDimmInfo->dimmBankDensity & BIT7) 
+            pDimmInfo->size += 512;                 /* Equal to 512MB   */
+    }
+    else /* if (dimmInfo.memoryType == MEM_TYPE_DDR2) */
+    {
+        if (pDimmInfo->dimmBankDensity & BIT0)
+            pDimmInfo->size += 1024;                /* Equal to 1GB     */
+        else if (pDimmInfo->dimmBankDensity & BIT1)
+            pDimmInfo->size += 2048;                /* Equal to 2GB     */
+        else if (pDimmInfo->dimmBankDensity & BIT2)
+            pDimmInfo->size += 4096;                /* Equal to 4GB     */
+        else if (pDimmInfo->dimmBankDensity & BIT3)
+            pDimmInfo->size += 8192;                /* Equal to 8GB     */
+        else if (pDimmInfo->dimmBankDensity & BIT4)
+            pDimmInfo->size += 16384;               /* Equal to 16GB    */
+        else if (pDimmInfo->dimmBankDensity & BIT5)
+            pDimmInfo->size += 128;                 /* Equal to 128MB   */
+        else if (pDimmInfo->dimmBankDensity & BIT6) 
+            pDimmInfo->size += 256;                 /* Equal to 256MB   */
+        else if (pDimmInfo->dimmBankDensity & BIT7) 
+            pDimmInfo->size += 512;                 /* Equal to 512MB   */
+    }
+    
+    pDimmInfo->size *= pDimmInfo->numOfModuleBanks;
+
+    DB(mvOsPrintf("Dram: dimm size    %dMB \n",pDimmInfo->size));
+
+    return MV_OK;
+}
+
+/*******************************************************************************
+* dimmSpdPrint - Print the SPD parameters.
+*
+* DESCRIPTION:
+*       Print the Dimm SPD parameters.
+*
+* INPUT:
+*       pDimmInfo - DIMM information structure.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_VOID dimmSpdPrint(MV_U32 dimmNum)
+{
+    MV_DIMM_INFO dimmInfo;
+    MV_U32  i, temp = 0;
+    MV_U32  k, maskLeftOfPoint = 0, maskRightOfPoint = 0;
+    MV_U32  rightOfPoint = 0,leftOfPoint = 0, div, time_tmp, shift;
+    MV_U32  busClkPs;
+    MV_U8   trp_clocks=0, trcd_clocks, tras_clocks, trrd_clocks,
+            temp_buf[40], *spdRawData;
+
+    busClkPs = 1000000000 / (mvBoardSysClkGet() / 100);  /* in 10 ps units */
+
+    spdRawData = dimmInfo.spdRawData;
+    
+    if(MV_OK != dimmSpdGet(dimmNum, &dimmInfo))
+    {
+        mvOsOutput("ERROR: Could not read SPD information!\n");
+        return;
+    }
+
+    /* find Manufactura of Dimm Module */
+    mvOsOutput("\nManufacturer's JEDEC ID Code:   ");
+    for(i = 0 ; i < DIMM_MODULE_MANU_SIZE ; i++)
+    {
+        mvOsOutput("%x",spdRawData[DIMM_MODULE_MANU_OFFS + i]);
+    }
+    mvOsOutput("\n");
+
+    /* Manufacturer's Specific Data */
+    for(i = 0 ; i < DIMM_MODULE_ID_SIZE ; i++)
+    {
+        temp_buf[i] = spdRawData[DIMM_MODULE_ID_OFFS + i];
+    }
+    mvOsOutput("Manufacturer's Specific Data:   %s\n", temp_buf);
+
+    /* Module Part Number */
+    for(i = 0 ; i < DIMM_MODULE_VEN_SIZE ; i++)
+    {
+        temp_buf[i] = spdRawData[DIMM_MODULE_VEN_OFFS + i];
+    }
+    mvOsOutput("Module Part Number:             %s\n", temp_buf);
+
+    /* Module Serial Number */
+    for(i = 0; i < sizeof(MV_U32); i++)
+    {
+    	temp |= spdRawData[95+i] << 8*i;
+    }
+    mvOsOutput("DIMM Serial No.                 %ld (%lx)\n", (long)temp, 
+                                    (long)temp);
+
+    /* find Manufac-Data of Dimm Module */
+    mvOsOutput("Manufactoring Date:             Year 20%d%d/ ww %d%d\n", 
+                        ((spdRawData[93] & 0xf0) >> 4), (spdRawData[93] & 0xf), 
+                        ((spdRawData[94] & 0xf0) >> 4), (spdRawData[94] & 0xf)); 
+    /* find modul_revision of Dimm Module */
+    mvOsOutput("Module Revision:                %d.%d\n", 
+                                                spdRawData[91], spdRawData[92]); 
+
+    /* find manufac_place of Dimm Module */
+    mvOsOutput("manufac_place:                  %d\n", spdRawData[72]);
+    
+    /* go over the first 35 I2C data bytes */
+    for(i = 2 ; i <= 35 ; i++)
+       switch(i)
+        {
+            case 2:  /* Memory type (DDR1/2 / SDRAM) */
+                if (dimmInfo.memoryType == MEM_TYPE_SDRAM)
+                    mvOsOutput("Dram Type is:                   SDRAM\n");
+                else if (dimmInfo.memoryType == MEM_TYPE_DDR1)
+                    mvOsOutput("Dram Type is:                   SDRAM DDR1\n");
+                else if (dimmInfo.memoryType == MEM_TYPE_DDR2)
+                    mvOsOutput("Dram Type is:                   SDRAM DDR2\n");
+                else
+                    mvOsOutput("Dram Type unknown\n");
+                break;
+/*----------------------------------------------------------------------------*/
+
+            case 3:  /* Number Of Row Addresses */
+                mvOsOutput("Module Number of row addresses: %d\n", 
+                                                        dimmInfo.numOfRowAddr);
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 4:  /* Number Of Column Addresses */
+                mvOsOutput("Module Number of col addresses: %d\n", 
+                                                        dimmInfo.numOfColAddr);
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 5:  /* Number Of Module Banks */
+                mvOsOutput("Number of Banks on Mod.:        %d\n",  
+                                                    dimmInfo.numOfModuleBanks);
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 6:  /* Data Width */
+                mvOsOutput("Module Data Width:              %d bit\n",  
+                                                           dimmInfo.dataWidth);
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 8:  /* Voltage Interface */
+                switch(spdRawData[i])
+                {
+                    case 0x0:
+                        mvOsOutput("Module is               TTL_5V_TOLERANT\n");
+                        break;
+                    case 0x1:
+                        mvOsOutput("Module is               LVTTL\n");
+                        break;
+                    case 0x2:
+                        mvOsOutput("Module is               HSTL_1_5V\n");
+                        break;
+                    case 0x3:
+                        mvOsOutput("Module is               SSTL_3_3V\n");
+                        break;
+                    case 0x4:
+                        mvOsOutput("Module is               SSTL_2_5V\n");
+                        break;
+                    case 0x5:
+                        if (dimmInfo.memoryType != MEM_TYPE_SDRAM)
+                        {
+                            mvOsOutput("Module is                 SSTL_1_8V\n");
+                            break;
+                        }
+                    default:
+                        mvOsOutput("Module is               VOLTAGE_UNKNOWN\n");
+                        break;
+                }
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 9:  /* Minimum Cycle Time At Max CasLatancy */
+                leftOfPoint = (spdRawData[i] & 0xf0) >> 4;
+                rightOfPoint = (spdRawData[i] & 0x0f) * 10;
+                
+                /* DDR2 addition of right of point */
+                if ((spdRawData[i] & 0x0f) == 0xA)
+                {
+                    rightOfPoint = 25;
+                }
+                if ((spdRawData[i] & 0x0f) == 0xB)
+                {
+                    rightOfPoint = 33;
+                }
+                if ((spdRawData[i] & 0x0f) == 0xC)
+                {
+                    rightOfPoint = 66;
+                }
+                if ((spdRawData[i] & 0x0f) == 0xD)
+                {
+                    rightOfPoint = 75;
+                }
+                mvOsOutput("Minimum Cycle Time At Max CL:   %d.%d [ns]\n",
+                                                    leftOfPoint, rightOfPoint);
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 10: /* Clock To Data Out */
+                div = (dimmInfo.memoryType == MEM_TYPE_SDRAM)? 10:100;
+                time_tmp = (((spdRawData[i] & 0xf0) >> 4)*10) + 
+                                                      ((spdRawData[i] & 0x0f));
+                leftOfPoint     = time_tmp / div;
+                rightOfPoint    = time_tmp % div;
+                mvOsOutput("Clock To Data Out:              %d.%d [ns]\n",
+                                                    leftOfPoint, rightOfPoint);
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 11: /* Error Check Type */
+                mvOsOutput("Error Check Type (0=NONE):      %d\n", 
+                                                      dimmInfo.errorCheckType);
+                break;
+/*----------------------------------------------------------------------------*/
+
+            case 12: /* Refresh Interval */
+                mvOsOutput("Refresh Rate:                   %x\n", 
+                                                     dimmInfo.refreshInterval);
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 13: /* Sdram Width */
+                mvOsOutput("Sdram Width:                    %d bits\n",     
+                                                          dimmInfo.sdramWidth);
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 14: /* Error Check Data Width */
+                mvOsOutput("Error Check Data Width:         %d bits\n", 
+                                                 dimmInfo.errorCheckDataWidth);
+                break;
+/*----------------------------------------------------------------------------*/
+
+           case 15: /* Minimum Clock Delay is unsupported */
+                if ((dimmInfo.memoryType == MEM_TYPE_SDRAM) ||
+                    (dimmInfo.memoryType == MEM_TYPE_DDR1))
+                {
+                    mvOsOutput("Minimum Clk Delay back to back: %d\n", 
+                                                                spdRawData[i]);
+                }
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 16: /* Burst Length Supported */
+    /*     SDRAM/DDR1:
+                    *******-******-******-******-******-******-******-******* 
+                    * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * 
+                    *******-******-******-******-******-******-******-******* 
+    burst length =  * Page | TBD  | TBD  | TBD  |  8   |  4   |  2   |   1  * 
+                    *********************************************************/ 
+    /*     DDR2:
+                    *******-******-******-******-******-******-******-******* 
+                    * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * 
+                    *******-******-******-******-******-******-******-******* 
+    burst length =  * Page | TBD  | TBD  | TBD  |  8   |  4   | TBD  | TBD  * 
+                    *********************************************************/ 
+                mvOsOutput("Burst Length Supported: ");
+                if ((dimmInfo.memoryType == MEM_TYPE_SDRAM) ||
+                    (dimmInfo.memoryType == MEM_TYPE_DDR1))
+                {
+                    if (dimmInfo.burstLengthSupported & BIT0)
+                        mvOsOutput("1, ");
+                    if (dimmInfo.burstLengthSupported & BIT1)
+                        mvOsOutput("2, ");
+                }
+                if (dimmInfo.burstLengthSupported & BIT2)
+                    mvOsOutput("4, ");
+                if (dimmInfo.burstLengthSupported & BIT3) 
+                    mvOsOutput("8, ");
+                
+                mvOsOutput(" Bit \n");
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 17: /* Number Of Banks On Each Device */
+                mvOsOutput("Number Of Banks On Each Chip:   %d\n",  
+                                              dimmInfo.numOfBanksOnEachDevice);
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 18: /* Suported Cas Latencies */
+                   
+            /*      SDRAM:
+                    *******-******-******-******-******-******-******-******* 
+                    * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * 
+                    *******-******-******-******-******-******-******-******* 
+            CAS =   * TBD  |  7   |  6   |  5   |  4   |  3   |   2  |   1  * 
+                    ********************************************************/ 
+
+            /*     DDR 1:
+                    *******-******-******-******-******-******-******-******* 
+                    * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * 
+                    *******-******-******-******-******-******-******-******* 
+            CAS =   * TBD  |  4   | 3.5  |   3  | 2.5  |  2   | 1.5  |   1  * 
+                    *********************************************************/
+
+            /*     DDR 2:
+                    *******-******-******-******-******-******-******-******* 
+                    * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * 
+                    *******-******-******-******-******-******-******-******* 
+            CAS =   * TBD  | TBD  |  5   |  4   |  3   |  2   | TBD  | TBD  * 
+                    *********************************************************/
+
+                mvOsOutput("Suported Cas Latencies: (CL) 			");
+                if (dimmInfo.memoryType == MEM_TYPE_SDRAM)
+                {
+                    for (k = 0; k <=7; k++)
+                    {
+                        if (dimmInfo.suportedCasLatencies & (1 << k))
+                            mvOsOutput("%d,             ", k+1);
+                    }
+                }
+                else if (dimmInfo.memoryType == MEM_TYPE_DDR1)
+                {
+                    if (dimmInfo.suportedCasLatencies & BIT0)
+                        mvOsOutput("1, ");
+                    if (dimmInfo.suportedCasLatencies & BIT1)
+                        mvOsOutput("1.5, ");
+                    if (dimmInfo.suportedCasLatencies & BIT2)
+                        mvOsOutput("2, ");
+                    if (dimmInfo.suportedCasLatencies & BIT3)
+                        mvOsOutput("2.5, ");
+                    if (dimmInfo.suportedCasLatencies & BIT4)
+                        mvOsOutput("3, ");
+                    if (dimmInfo.suportedCasLatencies & BIT5)
+                        mvOsOutput("3.5, ");
+                }
+                else if (dimmInfo.memoryType == MEM_TYPE_DDR2)
+                {
+                    if (dimmInfo.suportedCasLatencies & BIT2)
+                        mvOsOutput("2, ");
+                    if (dimmInfo.suportedCasLatencies & BIT3)
+                        mvOsOutput("3, ");
+                    if (dimmInfo.suportedCasLatencies & BIT4)
+                        mvOsOutput("4, ");
+                    if (dimmInfo.suportedCasLatencies & BIT5)
+                        mvOsOutput("5, ");		
+                }
+                else
+                    mvOsOutput("?.?, ");		
+                mvOsOutput("\n");
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 20:   /* DDR2 DIMM type info */
+                if (dimmInfo.memoryType == MEM_TYPE_DDR2)
+                {
+                    if (dimmInfo.dimmTypeInfo & (BIT0 | BIT4))
+                        mvOsOutput("Registered DIMM (RDIMM)\n");
+                    else if (dimmInfo.dimmTypeInfo & (BIT1 | BIT5))
+                        mvOsOutput("Unbuffered DIMM (UDIMM)\n");
+                    else 
+                        mvOsOutput("Unknown DIMM type.\n");
+                }
+
+                break;
+/*----------------------------------------------------------------------------*/
+   
+            case 21: /* SDRAM Modules Attributes */
+                mvOsOutput("\nModule Attributes (SPD Byte 21): \n");
+                
+                if (dimmInfo.memoryType == MEM_TYPE_SDRAM)
+                {
+                    if (dimmInfo.dimmAttributes & BIT0)
+                        mvOsOutput(" Buffered Addr/Control Input:   Yes\n");
+                    else
+                        mvOsOutput(" Buffered Addr/Control Input:   No\n");
+
+                    if (dimmInfo.dimmAttributes & BIT1)
+                        mvOsOutput(" Registered Addr/Control Input: Yes\n");
+                    else
+                        mvOsOutput(" Registered Addr/Control Input: No\n");
+   
+                    if (dimmInfo.dimmAttributes & BIT2)
+                        mvOsOutput(" On-Card PLL (clock):           Yes \n");
+                    else
+                        mvOsOutput(" On-Card PLL (clock):           No \n");
+
+                    if (dimmInfo.dimmAttributes & BIT3)
+                        mvOsOutput(" Bufferd DQMB Input:            Yes \n");
+                    else
+                        mvOsOutput(" Bufferd DQMB Inputs:           No \n");
+   
+                    if (dimmInfo.dimmAttributes & BIT4)
+                        mvOsOutput(" Registered DQMB Inputs:        Yes \n");
+                    else
+                        mvOsOutput(" Registered DQMB Inputs:        No \n");
+ 
+                    if (dimmInfo.dimmAttributes & BIT5)
+                        mvOsOutput(" Differential Clock Input:      Yes \n");
+                    else
+                        mvOsOutput(" Differential Clock Input:      No \n");
+   
+                    if (dimmInfo.dimmAttributes & BIT6)
+                        mvOsOutput(" redundant Row Addressing:      Yes \n");
+                    else
+                        mvOsOutput(" redundant Row Addressing:      No \n");
+                }
+                else if (dimmInfo.memoryType == MEM_TYPE_DDR1)
+                {
+                    if (dimmInfo.dimmAttributes & BIT0)
+                        mvOsOutput(" Buffered Addr/Control Input:   Yes\n");
+                    else 
+                        mvOsOutput(" Buffered Addr/Control Input:   No\n");
+   
+                    if (dimmInfo.dimmAttributes & BIT1)
+                        mvOsOutput(" Registered Addr/Control Input: Yes\n");
+                    else
+                        mvOsOutput(" Registered Addr/Control Input: No\n");
+   
+                    if (dimmInfo.dimmAttributes & BIT2)
+                        mvOsOutput(" On-Card PLL (clock):           Yes \n");
+                    else
+                        mvOsOutput(" On-Card PLL (clock):           No \n");
+            
+                    if (dimmInfo.dimmAttributes & BIT3)
+                        mvOsOutput(" FET Switch On-Card Enabled:    Yes \n");
+                    else
+                        mvOsOutput(" FET Switch On-Card Enabled:    No \n");
+                    
+                    if (dimmInfo.dimmAttributes & BIT4)
+                        mvOsOutput(" FET Switch External Enabled:   Yes \n");
+                    else
+                        mvOsOutput(" FET Switch External Enabled:   No \n");
+
+                    if (dimmInfo.dimmAttributes & BIT5)
+                        mvOsOutput(" Differential Clock Input:      Yes \n");
+                    else
+                        mvOsOutput(" Differential Clock Input:      No \n");
+                }
+                else /* if (dimmInfo.memoryType == MEM_TYPE_DDR2) */
+                {
+                    mvOsOutput(" Number of Active Registers on the DIMM: %d\n", 
+                                        (dimmInfo.dimmAttributes & 0x3) + 1);
+            
+                    mvOsOutput(" Number of PLLs on the DIMM: %d\n", 
+                                      ((dimmInfo.dimmAttributes) >> 2) & 0x3);
+               
+                    if (dimmInfo.dimmAttributes & BIT4)
+                        mvOsOutput(" FET Switch External Enabled:   Yes \n");
+                    else
+                        mvOsOutput(" FET Switch External Enabled:   No \n");
+
+                    if (dimmInfo.dimmAttributes & BIT6)
+                        mvOsOutput(" Analysis probe installed:      Yes \n");
+                    else
+                        mvOsOutput(" Analysis probe installed:      No \n");
+                }
+                
+                break;
+/*----------------------------------------------------------------------------*/
+
+            case 22: /* Suported AutoPreCharge */
+                mvOsOutput("\nModul Attributes (SPD Byte 22): \n");
+                if (dimmInfo.memoryType == MEM_TYPE_SDRAM)
+                {
+                    if ( spdRawData[i] & BIT0 )
+                        mvOsOutput(" Early Ras Precharge:           Yes \n");
+                    else
+                        mvOsOutput(" Early Ras Precharge:           No \n");
+                                                        
+                    if ( spdRawData[i] & BIT1 )                 
+                        mvOsOutput(" AutoPreCharge:                 Yes \n");
+                    else
+                        mvOsOutput(" AutoPreCharge:                 No \n");
+                                                            
+                    if ( spdRawData[i] & BIT2 )                 
+                        mvOsOutput(" Precharge All:                 Yes \n");
+                    else
+                        mvOsOutput(" Precharge All:                 No \n");
+                                                        
+                    if ( spdRawData[i] & BIT3 )                 
+                        mvOsOutput(" Write 1/ReadBurst:             Yes \n");
+                    else
+                        mvOsOutput(" Write 1/ReadBurst:             No \n");
+                                                        
+                    if ( spdRawData[i] & BIT4 )                 
+                        mvOsOutput(" lower VCC tolerance:           5%%\n");
+                    else
+                        mvOsOutput(" lower VCC tolerance:           10%%\n");
+                                                        
+                    if ( spdRawData[i] & BIT5 )                 
+                        mvOsOutput(" upper VCC tolerance:           5%%\n");
+                    else
+                        mvOsOutput(" upper VCC tolerance:           10%%\n");
+                }
+                else if (dimmInfo.memoryType == MEM_TYPE_DDR1)
+                {
+                    if ( spdRawData[i] & BIT0 )
+                        mvOsOutput(" Supports Weak Driver:          Yes \n");
+                    else
+                        mvOsOutput(" Supports Weak Driver:          No \n");
+
+                    if ( !(spdRawData[i] & BIT4) )
+                        mvOsOutput(" lower VCC tolerance:           0.2V\n");
+   
+                    if ( !(spdRawData[i] & BIT5) )
+                        mvOsOutput(" upper VCC tolerance:           0.2V\n");
+
+                    if ( spdRawData[i] & BIT6 )
+                        mvOsOutput(" Concurrent Auto Preharge:      Yes \n");
+                    else
+                        mvOsOutput(" Concurrent Auto Preharge:      No \n");
+
+                    if ( spdRawData[i] & BIT7 )
+                        mvOsOutput(" Supports Fast AP:              Yes \n");
+                    else
+                        mvOsOutput(" Supports Fast AP:              No \n");
+                }
+                else if (dimmInfo.memoryType == MEM_TYPE_DDR2)
+                {
+                    if ( spdRawData[i] & BIT0 )
+                        mvOsOutput(" Supports Weak Driver:          Yes \n");
+                    else
+                        mvOsOutput(" Supports Weak Driver:          No \n");
+                }
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 23:
+            /* Minimum Cycle Time At Maximum Cas Latancy Minus 1 (2nd highest CL) */
+                leftOfPoint = (spdRawData[i] & 0xf0) >> 4;
+                rightOfPoint = (spdRawData[i] & 0x0f) * 10;
+                
+                /* DDR2 addition of right of point */
+                if ((spdRawData[i] & 0x0f) == 0xA)
+                {
+                    rightOfPoint = 25;
+                }
+                if ((spdRawData[i] & 0x0f) == 0xB)
+                {
+                    rightOfPoint = 33;
+                }
+                if ((spdRawData[i] & 0x0f) == 0xC)
+                {
+                    rightOfPoint = 66;
+                }
+                if ((spdRawData[i] & 0x0f) == 0xD)
+                {
+                    rightOfPoint = 75;
+                }
+
+                mvOsOutput("Minimum Cycle Time At 2nd highest CasLatancy"
+                           "(0 = Not supported): %d.%d [ns]\n",
+                           leftOfPoint, rightOfPoint );
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 24: /* Clock To Data Out 2nd highest Cas Latency Value*/
+                div = (dimmInfo.memoryType == MEM_TYPE_SDRAM) ? 10:100;
+                time_tmp = (((spdRawData[i] & 0xf0) >> 4)*10) + 
+                                                    ((spdRawData[i] & 0x0f));
+                leftOfPoint     = time_tmp / div;
+                rightOfPoint    = time_tmp % div;
+                mvOsOutput("Clock To Data Out (2nd CL value): 		%d.%d [ns]\n",
+                                                    leftOfPoint, rightOfPoint);
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 25: 
+            /* Minimum Cycle Time At Maximum Cas Latancy Minus 2 (3rd highest CL) */
+                if (dimmInfo.memoryType == MEM_TYPE_SDRAM)
+                {
+                    leftOfPoint = (spdRawData[i] & 0xfc) >> 2;
+                    rightOfPoint = (spdRawData[i] & 0x3) * 25;
+                }
+                else    /* DDR1 or DDR2 */ 
+                {
+                    leftOfPoint = (spdRawData[i] & 0xf0) >> 4;
+                    rightOfPoint = (spdRawData[i] & 0x0f) * 10;
+                    
+                    /* DDR2 addition of right of point */
+                    if ((spdRawData[i] & 0x0f) == 0xA)
+                    {
+                        rightOfPoint = 25;
+                    }
+                    if ((spdRawData[i] & 0x0f) == 0xB)
+                    {
+                        rightOfPoint = 33;
+                    }
+                    if ((spdRawData[i] & 0x0f) == 0xC)
+                    {
+                        rightOfPoint = 66;
+                    }
+                    if ((spdRawData[i] & 0x0f) == 0xD)
+                    {
+                        rightOfPoint = 75;
+                    }
+                }
+                mvOsOutput("Minimum Cycle Time At 3rd highest CasLatancy" 
+                           "(0 = Not supported): %d.%d [ns]\n",
+                           leftOfPoint, rightOfPoint );
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 26: /* Clock To Data Out 3rd highest Cas Latency Value*/
+                if (dimmInfo.memoryType == MEM_TYPE_SDRAM)
+                {
+                    leftOfPoint = (spdRawData[i] & 0xfc) >> 2;
+                    rightOfPoint = (spdRawData[i] & 0x3) * 25;
+                }
+                else    /* DDR1 or DDR2 */ 
+                {
+                    time_tmp = (((spdRawData[i] & 0xf0) >> 4)*10) + 
+                                                      ((spdRawData[i] & 0x0f));
+                    leftOfPoint     = 0;
+                    rightOfPoint    = time_tmp;
+                }
+                mvOsOutput("Clock To Data Out (3rd CL value): 		%d.%2d[ns]\n",
+                                                  leftOfPoint, rightOfPoint );
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 27: /* Minimum Row Precharge Time */
+                shift = (dimmInfo.memoryType == MEM_TYPE_SDRAM)? 0:2;
+                maskLeftOfPoint  = (dimmInfo.memoryType == MEM_TYPE_SDRAM) ? 
+                                                                    0xff : 0xfc;
+                maskRightOfPoint = (dimmInfo.memoryType == MEM_TYPE_SDRAM) ? 
+                                                                    0x00 : 0x03;
+                leftOfPoint = ((spdRawData[i] & maskLeftOfPoint) >> shift);
+                rightOfPoint = (spdRawData[i] & maskRightOfPoint)*25;
+                temp = ((leftOfPoint*100) + rightOfPoint);/* in 10ps Intervals*/
+                trp_clocks = (temp + (busClkPs-1)) /  busClkPs;    
+                mvOsOutput("Minimum Row Precharge Time [ns]: 		%d.%d = " 
+                           "in Clk cycles %d\n", 
+                           leftOfPoint, rightOfPoint, trp_clocks);
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 28: /* Minimum Row Active to Row Active Time */
+                shift = (dimmInfo.memoryType == MEM_TYPE_SDRAM)? 0:2;
+                maskLeftOfPoint  = (dimmInfo.memoryType == MEM_TYPE_SDRAM) ? 
+                                                                    0xff : 0xfc;
+                maskRightOfPoint = (dimmInfo.memoryType == MEM_TYPE_SDRAM) ? 
+                                                                    0x00 : 0x03;
+                leftOfPoint = ((spdRawData[i] & maskLeftOfPoint) >> shift);
+                rightOfPoint = (spdRawData[i] & maskRightOfPoint)*25;
+                temp = ((leftOfPoint*100) + rightOfPoint);/* in 100ns Interval*/
+                trrd_clocks = (temp + (busClkPs-1)) / busClkPs;
+                mvOsOutput("Minimum Row Active -To- Row Active Delay [ns]: " 
+                           "%d.%d = in Clk cycles %d\n",
+                            leftOfPoint, rightOfPoint, trp_clocks);
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 29: /* Minimum Ras-To-Cas Delay */
+                shift = (dimmInfo.memoryType == MEM_TYPE_SDRAM)? 0:2;
+                maskLeftOfPoint  = (dimmInfo.memoryType == MEM_TYPE_SDRAM) ? 
+                                                                    0xff : 0xfc;
+                maskRightOfPoint = (dimmInfo.memoryType == MEM_TYPE_SDRAM) ? 
+                                                                    0x00 : 0x03;
+                leftOfPoint = ((spdRawData[i] & maskLeftOfPoint) >> shift);
+                rightOfPoint = (spdRawData[i] & maskRightOfPoint)*25;  
+                temp = ((leftOfPoint*100) + rightOfPoint);/* in 100ns Interval*/
+                trcd_clocks = (temp + (busClkPs-1) )/ busClkPs;
+                mvOsOutput("Minimum Ras-To-Cas Delay [ns]: 			%d.%d = "
+                           "in Clk cycles %d\n", 
+                           leftOfPoint, rightOfPoint, trp_clocks);
+                break;
+/*----------------------------------------------------------------------------*/
+   
+            case 30: /* Minimum Ras Pulse Width */
+                tras_clocks = (cas2ps(spdRawData[i])+(busClkPs-1)) / busClkPs;
+                mvOsOutput("Minimum Ras Pulse Width [ns]: 			%d = "
+                           "in Clk cycles %d\n", spdRawData[i], tras_clocks);
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 31: /* Module Bank Density */
+                mvOsOutput("Module Bank Density (more than 1= Multisize-Module):");
+
+                if (dimmInfo.memoryType == MEM_TYPE_SDRAM)
+                {
+                    if (dimmInfo.dimmBankDensity & BIT0)
+                        mvOsOutput("1GB, ");
+                    if (dimmInfo.dimmBankDensity & BIT1)
+                        mvOsOutput("8MB, ");
+                    if (dimmInfo.dimmBankDensity & BIT2)
+                        mvOsOutput("16MB, ");
+                    if (dimmInfo.dimmBankDensity & BIT3)
+                        mvOsOutput("32MB, ");
+                    if (dimmInfo.dimmBankDensity & BIT4)
+                        mvOsOutput("64MB, ");
+                    if (dimmInfo.dimmBankDensity & BIT5)
+                        mvOsOutput("128MB, ");
+                    if (dimmInfo.dimmBankDensity & BIT6) 
+                        mvOsOutput("256MB, ");
+                    if (dimmInfo.dimmBankDensity & BIT7) 
+                        mvOsOutput("512MB, ");
+                }
+                else if (dimmInfo.memoryType == MEM_TYPE_DDR1)
+                {
+                    if (dimmInfo.dimmBankDensity & BIT0)
+                        mvOsOutput("1GB, ");
+                    if (dimmInfo.dimmBankDensity & BIT1)
+                        mvOsOutput("2GB, ");
+                    if (dimmInfo.dimmBankDensity & BIT2)
+                        mvOsOutput("16MB, ");
+                    if (dimmInfo.dimmBankDensity & BIT3)
+                        mvOsOutput("32MB, ");
+                    if (dimmInfo.dimmBankDensity & BIT4)
+                        mvOsOutput("64MB, ");
+                    if (dimmInfo.dimmBankDensity & BIT5)
+                        mvOsOutput("128MB, ");
+                    if (dimmInfo.dimmBankDensity & BIT6) 
+                        mvOsOutput("256MB, ");
+                    if (dimmInfo.dimmBankDensity & BIT7) 
+                        mvOsOutput("512MB, ");
+                }
+                else /* if (dimmInfo.memoryType == MEM_TYPE_DDR2) */
+                {
+                    if (dimmInfo.dimmBankDensity & BIT0)
+                        mvOsOutput("1GB, ");
+                    if (dimmInfo.dimmBankDensity & BIT1)
+                        mvOsOutput("2GB, ");
+                    if (dimmInfo.dimmBankDensity & BIT2)
+                        mvOsOutput("4GB, ");
+                    if (dimmInfo.dimmBankDensity & BIT3)
+                        mvOsOutput("8GB, ");
+                    if (dimmInfo.dimmBankDensity & BIT4)
+                        mvOsOutput("16GB, ");
+                    if (dimmInfo.dimmBankDensity & BIT5)
+                    mvOsOutput("128MB, ");
+                        if (dimmInfo.dimmBankDensity & BIT6) 
+                    mvOsOutput("256MB, ");
+                        if (dimmInfo.dimmBankDensity & BIT7) 
+                    mvOsOutput("512MB, ");
+                }
+                mvOsOutput("\n");
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 32: /* Address And Command Setup Time (measured in ns/1000) */
+                if (dimmInfo.memoryType == MEM_TYPE_SDRAM)
+                {
+                    rightOfPoint = (spdRawData[i] & 0x0f);
+                    leftOfPoint  = (spdRawData[i] & 0xf0) >> 4;
+                    if(leftOfPoint > 7)
+                    {
+                    leftOfPoint *= -1;
+                    }
+                }
+                else /* DDR1 or DDR2 */
+                {
+                    time_tmp = (((spdRawData[i] & 0xf0) >> 4)*10) + 
+                                                      ((spdRawData[i] & 0x0f));
+                    leftOfPoint = time_tmp / 100;
+                    rightOfPoint = time_tmp % 100; 
+                }
+                mvOsOutput("Address And Command Setup Time [ns]: 		%d.%d\n",
+                                                     leftOfPoint, rightOfPoint);
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 33: /* Address And Command Hold Time */
+                if (dimmInfo.memoryType == MEM_TYPE_SDRAM)
+                {
+                    rightOfPoint = (spdRawData[i] & 0x0f);
+                    leftOfPoint  = (spdRawData[i] & 0xf0) >> 4;
+                    if(leftOfPoint > 7)
+                    {
+                    leftOfPoint *= -1;
+                    }
+                }
+                else /* DDR1 or DDR2 */
+                {
+                    time_tmp = (((spdRawData[i] & 0xf0) >> 4)*10) + 
+                                                      ((spdRawData[i] & 0x0f));
+                    leftOfPoint = time_tmp / 100;
+                    rightOfPoint = time_tmp % 100;                 
+                }
+                mvOsOutput("Address And Command Hold Time [ns]: 		%d.%d\n",
+                                                   leftOfPoint, rightOfPoint);
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 34: /* Data Input Setup Time */
+                if (dimmInfo.memoryType == MEM_TYPE_SDRAM)
+                {
+                    rightOfPoint = (spdRawData[i] & 0x0f);
+                    leftOfPoint  = (spdRawData[i] & 0xf0) >> 4;
+                    if(leftOfPoint > 7)
+                    {
+                        leftOfPoint *= -1;
+                    }
+                }
+                else /* DDR1 or DDR2 */
+                {
+                    time_tmp = (((spdRawData[i] & 0xf0) >> 4)*10) + 
+                                                      ((spdRawData[i] & 0x0f));
+                    leftOfPoint = time_tmp / 100;
+                    rightOfPoint = time_tmp % 100;                 
+                }
+                mvOsOutput("Data Input Setup Time [ns]: 			%d.%d\n", 
+                                                    leftOfPoint, rightOfPoint);
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 35: /* Data Input Hold Time */
+                if (dimmInfo.memoryType == MEM_TYPE_SDRAM)
+                {
+                    rightOfPoint = (spdRawData[i] & 0x0f);
+                    leftOfPoint  = (spdRawData[i] & 0xf0) >> 4;
+                    if(leftOfPoint > 7)
+                    {
+                        leftOfPoint *= -1;
+                    }
+                }
+                else /* DDR1 or DDR2 */
+                {
+                    time_tmp = (((spdRawData[i] & 0xf0) >> 4)*10) + 
+                                                      ((spdRawData[i] & 0x0f));
+                    leftOfPoint = time_tmp / 100;
+                    rightOfPoint = time_tmp % 100;                 
+                }
+                mvOsOutput("Data Input Hold Time [ns]: 			%d.%d\n\n", 
+                                                    leftOfPoint, rightOfPoint);
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 36: /* Relevant for DDR2 only: Write Recovery Time */
+                leftOfPoint = ((spdRawData[i] & maskLeftOfPoint) >> 2);
+                rightOfPoint = (spdRawData[i] & maskRightOfPoint) * 25;  
+                mvOsOutput("Write Recovery Time [ns]: 			%d.%d\n", 
+                                                    leftOfPoint, rightOfPoint);
+                break;
+/*----------------------------------------------------------------------------*/
+        }
+    
+}
+
+
+/*
+ * translate ns.ns/10 coding of SPD timing values
+ * into ps unit values
+ */
+/*******************************************************************************
+*  cas2ps - Translate x.y ns parameter to pico-seconds values
+*
+* DESCRIPTION:
+*       This function translates x.y nano seconds to its value in pico seconds.
+*       For example 3.75ns will return 3750.
+*
+* INPUT:
+*       spd_byte - DIMM SPD byte.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       value in pico seconds.
+*
+*******************************************************************************/
+static MV_U32  cas2ps(MV_U8 spd_byte)
+{
+    MV_U32 ns, ns10;
+    
+    /* isolate upper nibble */
+    ns = (spd_byte >> 4) & 0x0F;
+    /* isolate lower nibble */
+    ns10 = (spd_byte & 0x0F);
+    
+    if( ns10 < 10 ) {
+        ns10 *= 10;
+    }
+    else if( ns10 == 10 )
+        ns10 = 25;
+    else if( ns10 == 11 )
+        ns10 = 33;
+    else if( ns10 == 12 )
+        ns10 = 66;
+    else if( ns10 == 13 )
+        ns10 = 75;
+    else 
+    {
+        mvOsOutput("cas2ps Err. unsupported cycle time.\n");
+    }
+    
+    return (ns*1000 + ns10*10);
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddr1_2/mvDramIfConfig.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddr1_2/mvDramIfConfig.h
@@ -0,0 +1,201 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#ifndef __INCmvDramIfConfigh
+#define __INCmvDramIfConfigh
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/* includes */
+
+/* defines  */
+
+/* registers defaults values */
+
+#define SDRAM_CONFIG_DV 				\
+		(SDRAM_PERR_WRITE			|	\
+		 SDRAM_SRMODE				|	\
+		 SDRAM_SRCLK_GATED)
+
+#define SDRAM_DUNIT_CTRL_LOW_DV			\
+		(SDRAM_CTRL_POS_RISE		|	\
+		 SDRAM_CLK1DRV_NORMAL		|	\
+		 SDRAM_LOCKEN_ENABLE)
+
+#define SDRAM_ADDR_CTRL_DV	    0
+		
+#define SDRAM_TIMING_CTRL_LOW_REG_DV 	\
+		((0x2 << SDRAM_TRCD_OFFS)	|	\
+		 (0x2 << SDRAM_TRP_OFFS)	|	\
+		 (0x1 << SDRAM_TWR_OFFS)	|	\
+		 (0x0 << SDRAM_TWTR_OFFS)	|	\
+		 (0x5 << SDRAM_TRAS_OFFS)	|	\
+		 (0x1 << SDRAM_TRRD_OFFS))
+/* TRFC 0x27, TW2W 0x1 */
+#define SDRAM_TIMING_CTRL_HIGH_REG_DV	(( 0x7 << SDRAM_TRFC_OFFS )	|\
+					( 0x2 << SDRAM_TRFC_EXT_OFFS)	|\
+					( 0x1 << SDRAM_TW2W_OFFS))
+
+#define SDRAM_OPEN_PAGES_CTRL_REG_DV	SDRAM_OPEN_PAGE_EN	
+
+/* DDR2 ODT default register values */
+
+/* Presence	     Ctrl Low    Ctrl High  Dunit Ctrl   Ext Mode     */
+/*	CS0	         0x84210000  0x00000000  0x0000780F  0x00000440 */
+/*	CS0+CS1          0x84210000  0x00000000  0x0000780F  0x00000440 */
+/*	CS0+CS2	    	 0x030C030C  0x00000000  0x0000740F  0x00000404 */
+/*	CS0+CS1+CS2	 0x030C030C  0x00000000  0x0000740F  0x00000404 */
+/*	CS0+CS2+CS3	 0x030C030C  0x00000000  0x0000740F  0x00000404 */
+/*	CS0+CS1+CS2+CS3  0x030C030C  0x00000000  0x0000740F  0x00000404 */
+
+#define DDR2_ODT_CTRL_LOW_CS0_DV	0x84210000
+#define DDR2_ODT_CTRL_HIGH_CS0_DV	0x00000000
+#define DDR2_DUNIT_ODT_CTRL_CS0_DV	0x0000780F
+#define DDR_SDRAM_EXT_MODE_CS0_DV	0x00000440
+
+#define DDR2_ODT_CTRL_LOW_CS0_CS2_DV	0x030C030C
+#define DDR2_ODT_CTRL_HIGH_CS0_CS2_DV	0x00000000
+#define DDR2_DUNIT_ODT_CTRL_CS0_CS2_DV	0x0000740F
+#define DDR_SDRAM_EXT_MODE_CS0_CS2_DV	0x00000404
+
+
+/* DDR SDRAM Adderss/Control and Data Pads Calibration default values */
+#define DDR1_ADDR_CTRL_PAD_STRENGTH_TYPICAL_DV	\
+		(1 << SDRAM_PRE_DRIVER_STRENGTH_OFFS)
+#define DDR2_ADDR_CTRL_PAD_STRENGTH_TYPICAL_DV	\
+		(3 << SDRAM_PRE_DRIVER_STRENGTH_OFFS)
+		
+		
+#define DDR1_DATA_PAD_STRENGTH_TYPICAL_DV		\
+		(1 << SDRAM_PRE_DRIVER_STRENGTH_OFFS)
+#define DDR2_DATA_PAD_STRENGTH_TYPICAL_DV		\
+		(3 << SDRAM_PRE_DRIVER_STRENGTH_OFFS)
+
+/* DDR SDRAM Mode Register default value */
+#define DDR1_MODE_REG_DV			0x00000000
+#define DDR2_MODE_REG_DV			0x00000400
+
+/* DDR SDRAM Timing parameter default values */
+#define DDR1_TIMING_LOW_DV           0x11602220
+#define DDR1_TIMING_HIGH_DV          0x0000000d
+
+#define DDR2_TIMING_LOW_DV           0x11812220
+#define DDR2_TIMING_HIGH_DV          0x0000030f
+
+/* For Guideline (GL# MEM-4) DQS Reference Delay Tuning */
+#define FTDLL_DDR1_166MHZ           ((0x1 << 0)    | \
+                                     (0x7F<< 12)   | \
+                                     (0x1 << 22))
+
+#define FTDLL_DDR1_133MHZ           FTDLL_DDR1_166MHZ
+
+#define FTDLL_DDR1_200MHZ           ((0x1 << 0)    | \
+                                     (0x1 << 12)   | \
+                                     (0x3 << 14)   | \
+                                     (0x1 << 18)   | \
+                                     (0x1 << 22))
+
+
+#define FTDLL_DDR2_166MHZ           ((0x1 << 0)    | \
+                                     (0x1 << 12)   | \
+                                     (0x1 << 14)   | \
+                                     (0x1 << 16)   | \
+                                     (0x1 << 19)   | \
+                                     (0xF << 20))
+
+#define FTDLL_DDR2_133MHZ           FTDLL_DDR2_166MHZ
+
+#define FTDLL_DDR2_200MHZ           ((0x1 << 0)    | \
+                                     (0x1 << 12)   | \
+                                     (0x1 << 14)   | \
+                                     (0x1 << 16)   | \
+                                     (0x1 << 19)   | \
+                                     (0xF << 20))
+
+#define FTDLL_DDR2_250MHZ            0x445001
+
+/* Orion 1 B1 and above */
+#define FTDLL_DDR1_166MHZ_5181_B1    0x45D001
+
+/* Orion nas */
+#define FTDLL_DDR2_166MHZ_5182       0x597001
+
+/* Orion 2 D0 and above */
+#define FTDLL_DDR1_166MHZ_5281_D0    0x8D0001
+#define FTDLL_DDR1_200MHZ_5281_D0    0x8D0001
+#define FTDLL_DDR2_166MHZ_5281_D0    0x485001
+#define FTDLL_DDR2_200MHZ_5281_D0    0x485001
+#define FTDLL_DDR2_250MHZ_5281_D0    0x445001
+#define FTDLL_DDR2_200MHZ_5281_D1    0x995001
+#define FTDLL_DDR2_250MHZ_5281_D1    0x984801
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* __INCmvDramIfh */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddr1_2/mvDramIfConfig.S
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddr1_2/mvDramIfConfig.S
@@ -0,0 +1,668 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+/*******************************************************************************
+* mvDramIfBasicAsm.s
+*
+* DESCRIPTION:
+*       Memory full detection and best timing configuration is done in
+*       C code. C runtime environment requires a stack. This module API
+*       initialize DRAM interface chip select 0 for basic functionality for
+*       the use of stack.
+*       The module API assumes DRAM information is stored in I2C EEPROM reside
+*       in a given I2C address MV_BOARD_DIMM0_I2C_ADDR. The I2C EEPROM
+*       internal data structure is assumed to be orgenzied in common DRAM
+*       vendor SPD structure.
+*       NOTE: DFCDL values are assumed to be already initialized prior to
+*       this module API activity.
+*
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+/* includes */
+#define MV_ASMLANGUAGE
+#include "mvOsAsm.h"
+#include "mvSysHwConfig.h"
+#include "mvDramIfRegs.h"
+#include "mvDramIfConfig.h"
+#include "mvCpuIfRegs.h"
+#include "pex/mvPexRegs.h"
+#include "pci/mvPciRegs.h"
+#include "mvCtrlEnvSpec.h"
+#include "mvCtrlEnvAsm.h"
+#include "cpu/mvCpuArm.h"
+#include "mvCommon.h"
+
+/* defines  */
+
+/* locals   */
+.data
+.globl _mvDramIfConfig
+
+.text
+
+/*******************************************************************************
+* _mvDramIfConfig - Basic DRAM interface initialization.
+*
+* DESCRIPTION:
+*       The function will initialize the following DRAM parameters using the
+*       values prepared by mvDramIfDetect routine. Values are located
+*       in predefined registers.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+
+_mvDramIfConfig:
+
+        /* Save register on stack */
+	cmp	sp, #0
+	beq	no_stack_s
+save_on_stack:
+        stmdb	sp!, {r1, r2, r3, r4, r7, r11}
+no_stack_s:
+
+	/* 1) Write to SDRAM coniguration register */
+        ldr     r1, =(INTER_REGS_BASE + DRAM_BUF_REG1)
+        ldr     r4, [r1]
+        ldr     r1, =(INTER_REGS_BASE + SDRAM_CONFIG_REG)
+        str     r4, [r1]
+
+	/* 2) Write Dunit control low register */
+        ldr     r1, =(INTER_REGS_BASE + DRAM_BUF_REG3)
+        ldr     r4, [r1]
+        ldr     r1, =(INTER_REGS_BASE + SDRAM_DUNIT_CTRL_REG)
+        str     r4, [r1]
+
+        /* 3) Write SDRAM address control register */
+        ldr     r1, =(INTER_REGS_BASE + DRAM_BUF_REG4)
+        ldr     r4, [r1]
+        ldr     r1, =(INTER_REGS_BASE + SDRAM_ADDR_CTRL_REG)
+        str     r4, [r1]
+
+        /* 4) Write SDRAM bank 0 size register */
+        ldr     r1, =(INTER_REGS_BASE + DRAM_BUF_REG0)
+        ldr     r4, [r1]
+        ldr     r1, =(INTER_REGS_BASE + SDRAM_SIZE_REG(0))
+        str     r4, [r1]
+
+        /* 5) Write SDRAM open pages control register */
+        ldr     r1, =(INTER_REGS_BASE + SDRAM_OPEN_PAGE_CTRL_REG)
+        ldr     r4, =SDRAM_OPEN_PAGES_CTRL_REG_DV
+        str     r4, [r1]
+
+        /* 6) Write SDRAM timing Low register */
+        ldr     r1, =(INTER_REGS_BASE + DRAM_BUF_REG5)
+        ldr     r4, [r1]
+        ldr     r1, =(INTER_REGS_BASE + SDRAM_TIMING_CTRL_LOW_REG)
+        str     r4, [r1]
+
+        /* 7) Write SDRAM timing High register */
+        ldr     r1, =(INTER_REGS_BASE + DRAM_BUF_REG6)
+        ldr     r4, [r1]
+        ldr     r1, =(INTER_REGS_BASE + SDRAM_TIMING_CTRL_HIGH_REG)
+        str     r4, [r1]
+
+        /* 8) Write SDRAM mode register */
+        /* The CPU must not attempt to change the SDRAM Mode register setting */
+        /* prior to DRAM controller completion of the DRAM initialization     */
+        /* sequence. To guarantee this restriction, it is recommended that    */
+        /* the CPU sets the SDRAM Operation register to NOP command, performs */
+        /* read polling until the register is back in Normal operation value, */
+        /* and then sets SDRAM Mode register to it’s new value.               */
+
+	/* 8.1 write 'nop' to SDRAM operation */
+        mov     r4, #0x5                 /* 'NOP' command              */
+        MV_REG_WRITE_ASM(r4, r1, SDRAM_OPERATION_REG)
+
+        /* 8.2 poll SDRAM operation. Make sure its back to normal operation   */
+_sdramOpPoll1:
+        ldr     r4, [r1]
+        cmp     r4, #0                          /* '0' = Normal SDRAM Mode    */
+        bne     _sdramOpPoll1
+
+        /* 8.3 Now its safe to write new value to SDRAM Mode register         */
+        ldr     r1, =(INTER_REGS_BASE + DRAM_BUF_REG2)
+        ldr     r4, [r1]
+        ldr     r1, =(INTER_REGS_BASE + SDRAM_MODE_REG)
+        str     r4, [r1]
+
+        /* 8.4 Make the Dunit write the DRAM its new mode                     */
+        mov     r4, #0x3                 /* Mode Register Set command  */
+        MV_REG_WRITE_ASM (r4, r1, SDRAM_OPERATION_REG)
+
+        /* 8.5 poll SDRAM operation. Make sure its back to normal operation   */
+_sdramOpPoll2:
+        ldr     r4, [r1]
+        cmp     r4, #0                          /* '0' = Normal SDRAM Mode    */
+        bne     _sdramOpPoll2
+
+#ifndef DB_FPGA
+        /* Config DDR2 registers (Extended mode, ODTs and pad calibration)    */
+        MV_REG_READ_ASM (r4, r1, SDRAM_CONFIG_REG)
+        tst     r4, #SDRAM_DTYPE_DDR2
+        beq     _extModeODTEnd
+#endif /* DB_FPGA */
+
+        /* 9) Write SDRAM Extended mode register This operation should be     */
+        /*    done for each memory bank                                       */
+        /* write 'nop' to SDRAM operation */
+        mov     r4, #0x5                 /* 'NOP' command              */
+        MV_REG_WRITE_ASM (r4, r1, SDRAM_OPERATION_REG)
+
+        /* poll SDRAM operation. Make sure its back to normal operation   */
+_sdramOpPoll3:
+        ldr     r4, [r1]
+        cmp     r4, #0                          /* '0' = Normal SDRAM Mode    */
+        bne     _sdramOpPoll3
+
+        /* Now its safe to write new value to SDRAM Extended Mode register    */
+        ldr     r1, =(INTER_REGS_BASE + DRAM_BUF_REG10)
+        ldr     r4, [r1]
+        ldr     r1, =(INTER_REGS_BASE + SDRAM_EXTENDED_MODE_REG)
+        str     r4, [r1]
+
+        /* Go over each of the Banks */
+        ldr     r3, =0          /* r3 = DRAM bank Num */
+
+extModeLoop:
+        /* Set the SDRAM Operation Control to each of the DRAM banks          */
+        mov     r2, r3   /* Do not swap the bank counter value */
+        MV_REG_WRITE_ASM (r2, r1, SDRAM_OPERATION_CTRL_REG)
+
+        /* Make the Dunit write the DRAM its new mode                     */
+        mov     r4, #0x4        /* Extended Mode Register Set command  */
+        MV_REG_WRITE_ASM (r4, r1, SDRAM_OPERATION_REG)
+
+        /* poll SDRAM operation. Make sure its back to normal operation   */
+_sdramOpPoll4:
+        ldr     r4, [r1]
+        cmp     r4, #0                          /* '0' = Normal SDRAM Mode    */
+        bne     _sdramOpPoll4
+#ifndef DB_FPGA
+        add     r3, r3, #1
+        cmp     r3, #4         /* 4 = Number of banks */
+        bne     extModeLoop
+
+extModeEnd:
+        /* Config DDR2 On Die Termination (ODT) registers */
+        /* Write SDRAM DDR2 ODT control low register */
+        ldr     r1, =(INTER_REGS_BASE + DRAM_BUF_REG7)
+        ldr     r4, [r1]
+        ldr     r1, =(INTER_REGS_BASE + DDR2_SDRAM_ODT_CTRL_LOW_REG)
+        str     r4, [r1]
+
+        /* Write SDRAM DDR2 ODT control high register */
+        ldr     r1, =(INTER_REGS_BASE + DRAM_BUF_REG8)
+        ldr     r4, [r1]
+        ldr     r1, =(INTER_REGS_BASE + DDR2_SDRAM_ODT_CTRL_HIGH_REG)
+        str     r4, [r1]
+
+        /* Write SDRAM DDR2 Dunit ODT control register */
+        ldr     r1, =(INTER_REGS_BASE + DRAM_BUF_REG9)
+        ldr     r4, [r1]
+        ldr     r1, =(INTER_REGS_BASE + DDR2_DUNIT_ODT_CONTROL_REG)
+        str     r4, [r1]
+
+#endif /* DB_FPGA */
+_extModeODTEnd:
+#ifndef DB_FPGA
+        /* Implement Guideline (GL# MEM-2) P_CAL Automatic Calibration  */
+        /* Does Not Work for Address/Control and Data Pads.             */
+        /* Relevant for: 88F5181-A1/B0 and 88F5281-A0                   */
+
+	/* Read device ID  */
+	MV_CTRL_MODEL_GET_ASM(r3, r1);
+        /* Read device revision */
+	MV_CTRL_REV_GET_ASM(r2, r1);
+
+	/* Continue if OrionN */
+        ldr     r1, =MV_5180_DEV_ID
+        cmp     r3, r1
+        bne     1f
+        b     glMem2End
+1:
+        /* Continue if Orion1 and device revision B1 */
+        ldr     r1, =MV_5181_DEV_ID
+        cmp     r3, r1
+        bne     1f
+
+        cmp     r2, #MV_5181_B1_REV
+        bge     glMem2End
+        b       glMem2Start
+1:
+
+        /* Orion NAS */
+        ldr     r1, =MV_5182_DEV_ID
+        cmp     r3, r1
+        beq     glMem2Start
+
+        /* Orion NAS */
+        ldr     r1, =MV_5082_DEV_ID
+        cmp     r3, r1
+        beq     glMem2Start
+
+        /* Orion Shark */
+        ldr     r1, =MV_8660_DEV_ID
+        cmp     r3, r1
+        beq     glMem2Start
+
+	b	glMem2End
+
+glMem2Start:
+
+        /* DDR SDRAM Address/Control Pads Calibration                         */
+        MV_REG_READ_ASM (r3, r1, SDRAM_ADDR_CTRL_PADS_CAL_REG)
+
+        /* Set Bit [31] to make the register writable                   */
+        orr   r2, r3, #SDRAM_WR_EN
+
+        MV_REG_WRITE_ASM (r2, r1, SDRAM_ADDR_CTRL_PADS_CAL_REG)
+
+        bic   r3, r3, #SDRAM_WR_EN      /* Make register read-only      */
+        bic   r3, r3, #SDRAM_TUNE_EN    /* Disable auto calibration     */
+        bic   r3, r3, #SDRAM_DRVN_MASK  /* Clear r1[5:0]<DrvN>          */
+        bic   r3, r3, #SDRAM_DRVP_MASK  /* Clear r1[11:6]<DrvP>         */
+
+        /* Get the final N locked value of driving strength [22:17]     */
+        mov   r1, r3
+        mov   r1, r1, LSL #9
+        mov   r1, r1, LSR #26    /* r1[5:0]<DrvN>  = r3[22:17]<LockN>   */
+        orr   r1, r1, r1, LSL #6 /* r1[11:6]<DrvP> = r1[5:0]<DrvN>      */
+
+        /* Write to both <DrvN> bits [5:0] and <DrvP> bits [11:6]       */
+        orr   r3, r3, r1
+
+        MV_REG_WRITE_ASM (r3, r1, SDRAM_ADDR_CTRL_PADS_CAL_REG)
+
+
+        /* DDR SDRAM Data Pads Calibration                         	*/
+        MV_REG_READ_ASM (r3, r1, SDRAM_DATA_PADS_CAL_REG)
+
+        /* Set Bit [31] to make the register writable                   */
+        orr   r2, r3, #SDRAM_WR_EN
+
+        MV_REG_WRITE_ASM (r2, r1, SDRAM_DATA_PADS_CAL_REG)
+
+        bic   r3, r3, #SDRAM_WR_EN      /* Make register read-only      */
+        bic   r3, r3, #SDRAM_TUNE_EN    /* Disable auto calibration     */
+        bic   r3, r3, #SDRAM_DRVN_MASK  /* Clear r1[5:0]<DrvN>          */
+        bic   r3, r3, #SDRAM_DRVP_MASK  /* Clear r1[11:6]<DrvP>         */
+
+        /* Get the final N locked value of driving strength [22:17]     */
+        mov   r1, r3
+        mov   r1, r1, LSL #9
+        mov   r1, r1, LSR #26
+        orr   r1, r1, r1, LSL #6 /* r1[5:0] = r3[22:17]<LockN>  */
+
+        /* Write to both <DrvN> bits [5:0] and <DrvP> bits [11:6]       */
+        orr   r3, r3, r1
+
+        MV_REG_WRITE_ASM (r3, r1, SDRAM_DATA_PADS_CAL_REG)
+
+glMem2End:
+
+
+        /* Implement Guideline (GL# MEM-3) Drive Strength Value         */
+        /* Relevant for: 88F5181-A1/B0/B1, 88F5281-A0/B0/C/D, 88F5182,  */
+	/* 88F5082, 88F5181L, 88F6082/L, 88F6183, 88F6183L */
+
+        /* Get SDRAM Config value */
+        MV_REG_READ_ASM (r2, r1, SDRAM_CONFIG_REG)
+
+        /* Get DIMM type */
+        tst     r2, #SDRAM_DTYPE_DDR2
+        beq     ddr1StrengthVal
+
+ddr2StrengthVal:
+        ldr     r4, =DDR2_ADDR_CTRL_PAD_STRENGTH_TYPICAL_DV
+        ldr     r2, =DDR2_DATA_PAD_STRENGTH_TYPICAL_DV
+        b       setDrvStrength
+ddr1StrengthVal:
+        ldr     r4, =DDR1_ADDR_CTRL_PAD_STRENGTH_TYPICAL_DV
+        ldr     r2, =DDR1_DATA_PAD_STRENGTH_TYPICAL_DV
+
+setDrvStrength:
+        /* DDR SDRAM Address/Control Pads Calibration                   */
+        MV_REG_READ_ASM (r3, r1, SDRAM_ADDR_CTRL_PADS_CAL_REG)
+
+        orr   r3, r3, #SDRAM_WR_EN      /* Make register writeable      */
+
+        MV_REG_WRITE_ASM (r3, r1, SDRAM_ADDR_CTRL_PADS_CAL_REG)
+        HTOLL(r3,r1)
+
+        bic   r3, r3, #SDRAM_WR_EN      /* Make register read-only      */
+        bic   r3, r3, #SDRAM_PRE_DRIVER_STRENGTH_MASK
+        orr   r3, r4, r3                /* Set default value for DDR    */
+
+        MV_REG_WRITE_ASM (r3, r1, SDRAM_ADDR_CTRL_PADS_CAL_REG)
+
+
+        /* DDR SDRAM Data Pads Calibration                         	      */
+        MV_REG_READ_ASM (r3, r1, SDRAM_DATA_PADS_CAL_REG)
+
+        orr   r3, r3, #SDRAM_WR_EN      /* Make register writeable      */
+
+        MV_REG_WRITE_ASM (r3, r1, SDRAM_DATA_PADS_CAL_REG)
+        HTOLL(r3,r1)
+
+        bic   r3, r3, #SDRAM_WR_EN      /* Make register read-only      */
+        bic   r3, r3, #SDRAM_PRE_DRIVER_STRENGTH_MASK
+        orr   r3, r2, r3                /* Set default value for DDR    */
+
+        MV_REG_WRITE_ASM (r3, r1, SDRAM_DATA_PADS_CAL_REG)
+
+#if !defined(MV_88W8660) && !defined(MV_88F6183) && !defined(MV_88F6183L)
+        /* Implement Guideline (GL# MEM-4) DQS Reference Delay Tuning   */
+        /* Relevant for: 88F5181-A1/B0/B1 and 88F5281-A0/B0/C/D, 88F5182 */
+	/* 88F5082, 88F5181L, 88F6082/L */
+                
+	/* Calc the absolute address of the _cpuARMDDRCLK[] in the boot flash */
+	ldr     r7, = _cpuARMDDRCLK
+	ldr	r4, =_start
+	sub     r7, r7, r4
+	add	r7, r7, #CFG_MONITOR_BASE
+
+        /* Get the "sample on reset" register for the DDR frequancy     */
+        MV_REG_READ_ASM (r4, r1, MPP_SAMPLE_AT_RESET)
+        ldr     r1, =MSAR_ARMDDRCLCK_MASK
+        and     r1, r4, r1
+#if 0 /* YOTAM TO BE FIX */
+	mov    r1, r1, LSR #MSAR_ARMDDRCLCK_OFFS
+#endif
+
+	/* Read device ID  */
+	MV_CTRL_MODEL_GET_ASM(r3, r2);
+
+        /* Continue if TC90 */
+        ldr     r2, =MV_1281_DEV_ID
+        cmp     r3, r2
+        beq     armClkMsb
+
+        /* Continue if Orion2 */
+        ldr     r2, =MV_5281_DEV_ID
+        cmp     r3, r2
+#if 0 /* YOTAM TO BE FIX */
+        bne     1f
+#endif
+
+armClkMsb:
+#if 0 /* YOTAM TO BE FIX */
+	tst    r4, #MSAR_ARMDDRCLCK_H_MASK
+        beq    1f
+        orr    r1, r1, #BIT4
+1:
+	ldr    r4, =MV_CPU_ARM_CLK_ELM_SIZE
+	mul    r1, r4, r1
+	add    r7, r7, r1
+	add    r7, r7, #MV_CPU_ARM_CLK_DDR_OFF
+	ldr    r1, [r7]
+#endif
+
+        /* Get SDRAM Config value */
+        MV_REG_READ_ASM (r2, r4, SDRAM_CONFIG_REG)
+
+        /* Get DIMM type */
+        tst     r2, #SDRAM_DTYPE_DDR2
+        beq     ddr1FtdllVal
+
+ddr2FtdllVal:
+        ldr     r2, =MV_5281_DEV_ID
+        cmp     r3, r2
+	bne	2f
+    	MV_CTRL_REV_GET_ASM(r3, r2)
+        cmp     r3, #MV_5281_D0_REV
+        beq     orin2_d0_ddr2_ftdll_val
+        cmp     r3, #MV_5281_D1_REV
+        beq     orin2_d1_ddr2_ftdll_val
+        cmp     r3, #MV_5281_D2_REV
+        beq     orin2_d1_ddr2_ftdll_val
+	b	ddr2_default_val
+
+/* Set Orion 2 D1 ftdll values for DDR2 */
+orin2_d1_ddr2_ftdll_val:
+	ldr    r4, =FTDLL_DDR2_250MHZ_5281_D1
+	ldr    r7, =_250MHz
+        cmp    r1, r7
+        beq    setFtdllReg
+        ldr     r4, =FTDLL_DDR2_200MHZ_5281_D1
+	ldr    r7, =_200MHz
+        cmp    r1, r7
+        beq    setFtdllReg
+        ldr     r4, =FTDLL_DDR2_166MHZ_5281_D0
+	ldr    r7, =_166MHz
+        cmp    r1, r7
+        beq    setFtdllReg
+	b	ddr2_default_val
+
+/* Set Orion 2 D0 ftdll values for DDR2 */
+orin2_d0_ddr2_ftdll_val:
+	ldr    r4, =FTDLL_DDR2_250MHZ_5281_D0
+	ldr    r7, =_250MHz
+        cmp    r1, r7
+        beq    setFtdllReg
+        ldr     r4, =FTDLL_DDR2_200MHZ_5281_D0
+	ldr    r7, =_200MHz
+        cmp    r1, r7
+        beq    setFtdllReg
+        ldr     r4, =FTDLL_DDR2_166MHZ_5281_D0
+	ldr    r7, =_166MHz
+        cmp    r1, r7
+        beq    setFtdllReg
+	b       ddr2_default_val
+2:
+        ldr     r2, =MV_5182_DEV_ID
+        cmp     r3, r2
+	bne	3f
+
+/* Set Orion nas ftdll values for DDR2 */
+orin_nas_ftdll_val:
+        ldr     r4, =FTDLL_DDR2_166MHZ_5182
+	ldr    r7, =_166MHz
+        cmp    r1, r7
+        beq    setFtdllReg
+
+/* default values for all other devices */
+3:
+ddr2_default_val:
+        ldr    r4, =FTDLL_DDR2_250MHZ
+	ldr    r7, =_250MHz
+        cmp    r1, r7
+        beq    setFtdllReg
+        ldr     r4, =FTDLL_DDR2_200MHZ
+	ldr    r7, =_200MHz
+        cmp    r1, r7
+        beq    setFtdllReg
+        ldr     r4, =FTDLL_DDR2_166MHZ
+	ldr    r7, =_166MHz
+        cmp    r1, r7
+        beq    setFtdllReg
+        ldr     r4, =FTDLL_DDR2_133MHZ
+	ldr    r7, =_133MHz
+        cmp    r1, r7
+        beq    setFtdllReg
+        ldr    r4, =0
+        b       setFtdllReg
+
+ddr1FtdllVal:
+        ldr     r2, =MV_5281_DEV_ID
+        cmp     r3, r2
+	bne	2f
+    	MV_CTRL_REV_GET_ASM(r3, r2)
+        cmp     r3, #MV_5281_D0_REV
+        bge     orin2_ddr1_ftdll_val
+	b	ddr1_default_val
+
+/* Set Orion 2 D0 and above ftdll values for DDR1 */
+orin2_ddr1_ftdll_val:
+        ldr     r4, =FTDLL_DDR1_200MHZ_5281_D0
+	ldr    r7, =_200MHz
+        cmp    r1, r7
+        beq    setFtdllReg
+        ldr     r4, =FTDLL_DDR1_166MHZ_5281_D0
+	ldr    r7, =_166MHz
+        cmp    r1, r7
+        beq    setFtdllReg
+	b       ddr1_default_val
+2:
+        ldr     r2, =MV_5181_DEV_ID
+        cmp     r3, r2
+	bne	3f
+    	MV_CTRL_REV_GET_ASM(r3, r2)
+        cmp     r3, #MV_5181_B1_REV
+        bge     orin1_ddr1_ftdll_val
+	b	ddr1_default_val
+
+/* Set Orion 1 ftdll values for DDR1 */
+orin1_ddr1_ftdll_val:
+        ldr     r4, =FTDLL_DDR1_166MHZ_5181_B1
+	ldr    r7, =_166MHz
+        cmp    r1, r7
+        beq    setFtdllReg
+3:
+ddr1_default_val:
+        ldr    r4, =FTDLL_DDR1_133MHZ
+	ldr    r7, =_133MHz
+        cmp    r1, r7
+        beq    setFtdllReg
+
+        ldr    r4, =FTDLL_DDR1_166MHZ
+	ldr    r7, =_166MHz
+        cmp    r1, r7
+        beq    setFtdllReg
+
+        ldr    r4, =FTDLL_DDR1_200MHZ
+	ldr    r7, =_200MHz
+        cmp    r1, r7
+        beq    setFtdllReg
+
+        ldr    r4, =0
+
+setFtdllReg:
+
+        MV_REG_WRITE_ASM (r4, r1, SDRAM_FTDLL_CONFIG_REG)
+        HTOLL(r4,r1)
+        bic   r4, r4, #1
+        MV_REG_WRITE_ASM (r4, r1, SDRAM_FTDLL_CONFIG_REG)
+
+#endif /* !defined(MV_88W8660) && !defined(MV_88F6183) && !defined(MV_88F6183L) */
+#endif /* DB_FPGA */
+
+restoreTmpRegs:
+        /* Restore the registers we used to save the DDR detect values */
+
+        ldr     r4, =DRAM_BUF_REG0_DV
+        MV_REG_WRITE_ASM (r4, r1, DRAM_BUF_REG0)
+
+        ldr     r4, =DRAM_BUF_REG1_DV
+        MV_REG_WRITE_ASM (r4, r1, DRAM_BUF_REG1)
+
+        ldr     r4, =DRAM_BUF_REG2_DV
+        MV_REG_WRITE_ASM (r4, r1, DRAM_BUF_REG2)
+
+        ldr     r4, =DRAM_BUF_REG3_DV
+        MV_REG_WRITE_ASM (r4, r1, DRAM_BUF_REG3)
+
+        ldr     r4, =DRAM_BUF_REG4_DV
+        MV_REG_WRITE_ASM (r4, r1, DRAM_BUF_REG4)
+
+        ldr     r4, =DRAM_BUF_REG5_DV
+        MV_REG_WRITE_ASM (r4, r1, DRAM_BUF_REG5)
+
+        ldr     r4, =DRAM_BUF_REG6_DV
+        MV_REG_WRITE_ASM (r4, r1, DRAM_BUF_REG6)
+
+        ldr     r4, =DRAM_BUF_REG7_DV
+        MV_REG_WRITE_ASM (r4, r1, DRAM_BUF_REG7)
+
+        ldr     r4, =DRAM_BUF_REG8_DV
+        MV_REG_WRITE_ASM (r4, r1, DRAM_BUF_REG8)
+
+        ldr     r4, =DRAM_BUF_REG9_DV
+        MV_REG_WRITE_ASM (r4, r1, DRAM_BUF_REG9)
+
+        ldr     r4, =DRAM_BUF_REG10_DV
+        MV_REG_WRITE_ASM (r4, r1, DRAM_BUF_REG10)
+
+
+        /* Restore registers */
+        /* Save register on stack */
+	cmp	sp, #0
+	beq	no_stack_l
+load_from_stack:
+        ldmia	sp!, {r1, r2, r3, r4, r7, r11}
+no_stack_l:
+
+        mov     pc, lr
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddr1_2/mvDram.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddr1_2/mvDram.h
@@ -0,0 +1,199 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCmvDram
+#define __INCmvDram
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "ddr/mvDramIf.h"
+#include "twsi/mvTwsi.h"
+
+#define MAX_DIMM_NUM 			2
+#define SPD_SIZE			128
+
+/* Dimm spd offsets */
+#define DIMM_MEM_TYPE 						2
+#define DIMM_ROW_NUM 						3
+#define DIMM_COL_NUM 						4
+#define DIMM_MODULE_BANK_NUM 				5
+#define DIMM_DATA_WIDTH 					6
+#define DIMM_VOLT_IF 						8
+#define DIMM_MIN_CC_AT_MAX_CAS 				9
+#define DIMM_ERR_CHECK_TYPE 				11
+#define DIMM_REFRESH_INTERVAL 				12
+#define DIMM_SDRAM_WIDTH 					13
+#define DIMM_ERR_CHECK_DATA_WIDTH 			14
+#define DIMM_MIN_CLK_DEL 					15
+#define DIMM_BURST_LEN_SUP 					16
+#define DIMM_DEV_BANK_NUM 					17
+#define DIMM_SUP_CAL 						18
+#define DIMM_DDR2_TYPE_INFORMATION          20      /* DDR2 only */
+#define DIMM_BUF_ADDR_CONT_IN 				21
+#define DIMM_MIN_CC_AT_MAX_CAS_MINUS1		23
+#define DIMM_MIN_CC_AT_MAX_CAS_MINUS2		25
+#define DIMM_MIN_ROW_PRECHARGE_TIME			27
+#define DIMM_MIN_ROW_ACTIVE_TO_ROW_ACTIVE	28
+#define DIMM_MIN_RAS_TO_CAS_DELAY			29
+#define DIMM_MIN_RAS_PULSE_WIDTH			30
+#define DIMM_BANK_DENSITY					31
+#define DIMM_MIN_WRITE_RECOVERY_TIME        36
+#define DIMM_MIN_WRITE_TO_READ_CMD_DELAY    37
+#define DIMM_MIN_READ_TO_PRECH_CMD_DELAY    38
+#define DIMM_MIN_REFRESH_TO_ACTIVATE_CMD    42
+
+/* Dimm Memory Type values */
+#define DIMM_MEM_TYPE_SDRAM					0x4
+#define DIMM_MEM_TYPE_DDR1 					0x7
+#define DIMM_MEM_TYPE_DDR2 					0x8
+        
+#define DIMM_MODULE_MANU_OFFS 		64
+#define DIMM_MODULE_MANU_SIZE 		8
+#define DIMM_MODULE_VEN_OFFS 		73 
+#define DIMM_MODULE_VEN_SIZE 		25
+#define DIMM_MODULE_ID_OFFS 		99
+#define DIMM_MODULE_ID_SIZE 		18
+
+/* enumeration for voltage levels. */
+typedef enum _mvDimmVoltageIf
+{
+    TTL_5V_TOLERANT, 
+    LVTTL, 
+    HSTL_1_5V, 
+    SSTL_3_3V, 
+    SSTL_2_5V, 
+    VOLTAGE_UNKNOWN, 
+} MV_DIMM_VOLTAGE_IF;
+
+
+/* enumaration for SDRAM CAS Latencies. */
+typedef enum _mvDimmSdramCas
+{
+    SD_CL_1 =1,  
+    SD_CL_2,  
+    SD_CL_3, 
+    SD_CL_4, 
+    SD_CL_5, 
+    SD_CL_6, 
+    SD_CL_7, 
+    SD_FAULT
+}MV_DIMM_SDRAM_CAS;
+
+
+/* DIMM information structure */                                                    
+typedef struct _mvDimmInfo
+{
+    MV_MEMORY_TYPE  memoryType; 	/* DDR or SDRAM */
+
+    MV_U8       spdRawData[SPD_SIZE];  	/* Content of SPD-EEPROM copied 1:1  */
+
+    /* DIMM dimensions */
+    MV_U32  numOfRowAddr;
+    MV_U32  numOfColAddr;
+    MV_U32  numOfModuleBanks;
+    MV_U32  dataWidth;
+    MV_U32  errorCheckType;             /* ECC , PARITY..*/
+    MV_U32  sdramWidth;                 /* 4,8,16 or 32 */
+    MV_U32  errorCheckDataWidth;        /* 0 - no, 1 - Yes */
+    MV_U32  burstLengthSupported;
+    MV_U32  numOfBanksOnEachDevice;
+    MV_U32  suportedCasLatencies;
+    MV_U32  refreshInterval;
+    MV_U32  dimmBankDensity;
+    MV_U32  dimmTypeInfo;           /* DDR2 only */
+    MV_U32  dimmAttributes;
+
+    /* DIMM timing parameters */
+    MV_U32  minCycleTimeAtMaxCasLatPs;	
+    MV_U32  minCycleTimeAtMaxCasLatMinus1Ps;
+    MV_U32  minCycleTimeAtMaxCasLatMinus2Ps;
+	MV_U32  minRowPrechargeTime;
+	MV_U32  minRowActiveToRowActive;
+	MV_U32  minRasToCasDelay;
+	MV_U32  minRasPulseWidth;
+    MV_U32  minWriteRecoveryTime;   /* DDR2 only */
+    MV_U32  minWriteToReadCmdDelay; /* DDR2 only */
+    MV_U32  minReadToPrechCmdDelay; /* DDR2 only */
+    MV_U32  minRefreshToActiveCmd;  /* DDR2 only */
+
+    /* Parameters calculated from the extracted DIMM information */
+    MV_U32  size;               /* 16,64,128,256 or 512 MByte in MB units */
+    MV_U32  deviceDensity;      /* 16,64,128,256 or 512 Mbit in MB units  */
+    MV_U32  numberOfDevices;
+
+} MV_DIMM_INFO;
+
+
+MV_STATUS mvDramBankInfoGet(MV_U32 bankNum, MV_DRAM_BANK_INFO *pBankInfo);
+MV_STATUS dimmSpdGet(MV_U32 dimmNum, MV_DIMM_INFO *pDimmInfo);
+MV_VOID dimmSpdPrint(MV_U32 dimmNum);
+MV_STATUS dimmSpdCpy(MV_VOID);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __INCmvDram */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddr1_2/mvDramIf.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddr1_2/mvDramIf.h
@@ -0,0 +1,142 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#ifndef __INCmvDramIfh
+#define __INCmvDramIfh
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* includes */
+#include "ddr1_2/mvDramIfRegs.h"
+#include "ddr1_2/mvDramIfConfig.h"
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "ddr/mvSpd.h"
+
+/* defines  */
+/* DRAM Timing parameters */
+#define SDRAM_TWR                    15  /* ns tWr */
+#define SDRAM_TRFC_64_512M_AT_200MHZ 70  /* ns tRfc for dens 64-512 @ 200MHz */
+#define SDRAM_TRFC_64_512M           75  /* ns tRfc for dens 64-512          */
+#define SDRAM_TRFC_1G                120 /* ns tRfc for dens 1GB             */
+#define SDRAM_TR2R_CYC               1   /* cycle for tR2r                   */
+#define SDRAM_TR2WW2R_CYC            1   /* cycle for tR2wW2r                */
+
+/* typedefs */
+
+/* enumeration for DDR1 supported CAS Latencies */
+typedef enum _mvDimmDdr1Cas
+{
+    DDR1_CL_1_5  = 0x02, 
+    DDR1_CL_2    = 0x04, 
+    DDR1_CL_2_5  = 0x08, 
+    DDR1_CL_3    = 0x10, 
+    DDR1_CL_4    = 0x40, 
+    DDR1_CL_FAULT
+} MV_DIMM_DDR1_CAS;
+
+/* enumeration for DDR2 supported CAS Latencies */
+typedef enum _mvDimmDdr2Cas
+{
+    DDR2_CL_3    = 0x08, 
+    DDR2_CL_4    = 0x10, 
+    DDR2_CL_5    = 0x20, 
+    DDR2_CL_FAULT
+} MV_DIMM_DDR2_CAS;
+
+/* This structure describes CPU interface address decode window               */
+typedef struct _mvDramIfDecWin 
+{
+	MV_ADDR_WIN   addrWin;    /* An address window*/
+	MV_BOOL       enable;     /* Address decode window is enabled/disabled    */
+}MV_DRAM_DEC_WIN;
+
+#include "ddr1_2/mvDram.h"
+
+/* mvDramIf.h API list */
+MV_VOID   mvDramIfBasicAsmInit(MV_VOID);
+MV_STATUS mvDramIfDetect(MV_U32 forcedCl);
+MV_VOID   _mvDramIfConfig(MV_VOID);
+
+MV_STATUS mvDramIfWinSet(MV_TARGET target, MV_DRAM_DEC_WIN *pAddrDecWin);
+MV_STATUS mvDramIfWinGet(MV_TARGET target, MV_DRAM_DEC_WIN *pAddrDecWin);
+MV_STATUS mvDramIfWinEnable(MV_TARGET target,MV_BOOL enable);
+MV_32 mvDramIfBankSizeGet(MV_U32 bankNum);
+MV_32 mvDramIfBankBaseGet(MV_U32 bankNum);
+MV_32 mvDramIfSizeGet(MV_VOID);
+
+#if 0
+MV_STATUS mvDramIfMbusCtrlSet(MV_XBAR_TARGET *pPizzaArbArray);
+MV_STATUS mvDramIfMbusToutSet(MV_U32 timeout, MV_BOOL enable);
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* __INCmvDramIfh */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddr1_2/mvDramIfRegs.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddr1_2/mvDramIfRegs.h
@@ -0,0 +1,315 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCmvDramIfRegsh
+#define __INCmvDramIfRegsh
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* DDR SDRAM Controller Address Decode Registers */
+/* SDRAM CSn Base Address Register (SCBAR) */
+#define SDRAM_BASE_ADDR_REG(csNum)	(0x1500 + (csNum * 8))
+#define SCBAR_BASE_OFFS				16 
+#define SCBAR_BASE_MASK				(0xffff << SCBAR_BASE_OFFS)
+#define SCBAR_BASE_ALIGNMENT		0x10000 
+
+/* SDRAM CSn Size Register (SCSR) */		  
+#define SDRAM_SIZE_REG(csNum)	(0x1504 + (csNum * 8))
+#define SCSR_WIN_EN					BIT0
+#define SCSR_SIZE_OFFS				16
+#define SCSR_SIZE_MASK				(0xffff << SCSR_SIZE_OFFS)
+#define SCSR_SIZE_ALIGNMENT			0x10000
+
+/* configuration register */
+#define SDRAM_CONFIG_REG   		0x1400
+#define SDRAM_REFRESH_OFFS 		0
+#define SDRAM_REFRESH_MAX  		0x3000
+#define SDRAM_REFRESH_MASK 		(SDRAM_REFRESH_MAX << SDRAM_REFRESH_OFFS)
+#define SDRAM_DWIDTH_OFFS       14
+#define SDRAM_DWIDTH_MASK       (3 << SDRAM_DWIDTH_OFFS)
+#define SDRAM_DWIDTH_16BIT      (1 << SDRAM_DWIDTH_OFFS)
+#define SDRAM_DWIDTH_32BIT      (2 << SDRAM_DWIDTH_OFFS)
+#define SDRAM_DTYPE_OFFS        16
+#define SDRAM_DTYPE_MASK        (1 << SDRAM_DTYPE_OFFS)
+#define SDRAM_DTYPE_DDR1        (0 << SDRAM_DTYPE_OFFS)
+#define SDRAM_DTYPE_DDR2        (1 << SDRAM_DTYPE_OFFS)
+#define SDRAM_REGISTERED   		(1 << 17)
+#define SDRAM_PERR_OFFS    		18
+#define SDRAM_PERR_MASK    		(1 << SDRAM_PERR_OFFS)
+#define SDRAM_PERR_NO_WRITE     (0 << SDRAM_PERR_OFFS)
+#define SDRAM_PERR_WRITE        (1 << SDRAM_PERR_OFFS)
+#define SDRAM_DCFG_OFFS     	20
+#define SDRAM_DCFG_MASK     	(0x3 << SDRAM_DCFG_OFFS)
+#define SDRAM_DCFG_X16_DEV   	(1 << SDRAM_DCFG_OFFS)
+#define SDRAM_DCFG_X8_DEV   	(2 << SDRAM_DCFG_OFFS)
+#define SDRAM_SRMODE			(1 << 24)
+#define SDRAM_SRCLK_OFFS		25
+#define SDRAM_SRCLK_MASK		(1 << SDRAM_SRCLK_OFFS)
+#define SDRAM_SRCLK_KEPT		(0 << SDRAM_SRCLK_OFFS)
+#define SDRAM_SRCLK_GATED		(1 << SDRAM_SRCLK_OFFS)
+#define SDRAM_CATTH_OFFS		26
+#define SDRAM_CATTHR_EN			(1 << SDRAM_CATTH_OFFS)
+
+
+/* dunit control register */
+#define SDRAM_DUNIT_CTRL_REG  	0x1404
+#define SDRAM_CTRL_POS_OFFS	   	6
+#define SDRAM_CTRL_POS_FALL	   	(0 << SDRAM_CTRL_POS_OFFS)
+#define SDRAM_CTRL_POS_RISE	   	(1 << SDRAM_CTRL_POS_OFFS)
+#define SDRAM_CLK1DRV_OFFS      12
+#define SDRAM_CLK1DRV_MASK      (1 << SDRAM_CLK1DRV_OFFS)
+#define SDRAM_CLK1DRV_HIGH_Z    (0 << SDRAM_CLK1DRV_OFFS)
+#define SDRAM_CLK1DRV_NORMAL    (1 << SDRAM_CLK1DRV_OFFS)
+#define SDRAM_LOCKEN_OFFS       18
+#define SDRAM_LOCKEN_MASK       (1 << SDRAM_LOCKEN_OFFS)
+#define SDRAM_LOCKEN_DISABLE    (0 << SDRAM_LOCKEN_OFFS)
+#define SDRAM_LOCKEN_ENABLE     (1 << SDRAM_LOCKEN_OFFS)
+#define SDRAM_ST_BURST_DEL_OFFS 	24
+#define SDRAM_ST_BURST_DEL_MAX 	0xf
+#define SDRAM_ST_BURST_DEL_MASK (SDRAM_ST_BURST_DEL_MAX<<SDRAM_ST_BURST_DEL_OFFS)
+
+/* sdram timing control low register */
+#define SDRAM_TIMING_CTRL_LOW_REG	0x1408
+#define SDRAM_TRCD_OFFS 		4
+#define SDRAM_TRCD_MASK 		(0xF << SDRAM_TRCD_OFFS)
+#define SDRAM_TRP_OFFS 			8
+#define SDRAM_TRP_MASK 			(0xF << SDRAM_TRP_OFFS)
+#define SDRAM_TWR_OFFS 			12
+#define SDRAM_TWR_MASK 			(0xF << SDRAM_TWR_OFFS)
+#define SDRAM_TWTR_OFFS 		16
+#define SDRAM_TWTR_MASK 		(0xF << SDRAM_TWTR_OFFS)
+#define SDRAM_TRAS_OFFS 		20
+#define SDRAM_TRAS_MASK 		(0xF << SDRAM_TRAS_OFFS)
+#define SDRAM_TRRD_OFFS 		24
+#define SDRAM_TRRD_MASK 		(0xF << SDRAM_TRRD_OFFS)
+#define SDRAM_TRTP_OFFS 		28
+#define SDRAM_TRTP_MASK 		(0xF << SDRAM_TRTP_OFFS)
+
+/* sdram timing control high register */
+#define SDRAM_TIMING_CTRL_HIGH_REG	0x140c
+#define SDRAM_TRFC_OFFS 		0
+#define SDRAM_TRFC_MASK 		(0xF << SDRAM_TRFC_OFFS)
+#define SDRAM_TR2R_OFFS 		4
+#define SDRAM_TR2R_MASK 		(0x3 << SDRAM_TR2R_OFFS)
+#define SDRAM_TR2W_W2R_OFFS 		6
+#define SDRAM_TR2W_W2R_MASK 		(0x3 << SDRAM_TR2W_W2R_OFFS)
+#define SDRAM_TRFC_EXT_OFFS		8
+#define SDRAM_TRFC_EXT_MASK		(0x1 << SDRAM_TRFC_EXT_OFFS)
+#define SDRAM_TW2W_OFFS		    10
+#define SDRAM_TW2W_MASK		    (0x1 << SDRAM_TW2W_OFFS)
+
+/* address control register */
+#define SDRAM_ADDR_CTRL_REG		0x1410
+#define SDRAM_DSIZE_OFFS   	    4
+#define SDRAM_DSIZE_MASK   	    (0x3 << SDRAM_DSIZE_OFFS)
+#define SDRAM_DSIZE_128Mb 	    (0x0 << SDRAM_DSIZE_OFFS)
+#define SDRAM_DSIZE_256Mb 	    (0x1 << SDRAM_DSIZE_OFFS)
+#define SDRAM_DSIZE_512Mb  	    (0x2 << SDRAM_DSIZE_OFFS)
+
+/* SDRAM Open Pages Control registers */
+#define SDRAM_OPEN_PAGE_CTRL_REG	0x1414
+#define SDRAM_OPEN_PAGE_EN		    (0 << 0)
+#define SDRAM_OPEN_PAGE_DIS		    (1 << 0)
+
+/* sdram opertion register */
+#define SDRAM_OPERATION_REG 	0x1418
+#define SDRAM_CMD_OFFS  		0
+#define SDRAM_CMD_MASK   		(0x7 << SDRAM_CMD_OFFS)
+#define SDRAM_CMD_NORMAL 		(0x0 << SDRAM_CMD_OFFS)
+#define SDRAM_CMD_PRECHARGE_ALL (0x1 << SDRAM_CMD_OFFS)
+#define SDRAM_CMD_REFRESH_ALL 	(0x2 << SDRAM_CMD_OFFS)
+#define SDRAM_CMD_REG_SET_CMD 	(0x3 << SDRAM_CMD_OFFS)
+#define SDRAM_CMD_EXT_MODE_SET 	(0x4 << SDRAM_CMD_OFFS)
+#define SDRAM_CMD_NOP 			(0x5 << SDRAM_CMD_OFFS)
+#define SDRAM_CMD_SLF_RFRSH 	(0x7 << SDRAM_CMD_OFFS)
+#define SDRAM_CMD_EMRS2_CMD  	(0x8 << SDRAM_CMD_OFFS)
+#define SDRAM_CMD_EMRS3_CMD  	(0x9 << SDRAM_CMD_OFFS)
+
+/* sdram mode register */
+#define SDRAM_MODE_REG 			0x141c
+#define SDRAM_BURST_LEN_OFFS 	0
+#define SDRAM_BURST_LEN_MASK 	(0x7 << SDRAM_BURST_LEN_OFFS)
+#define SDRAM_BURST_LEN_4    	(0x2 << SDRAM_BURST_LEN_OFFS)
+#define SDRAM_CL_OFFS   		4
+#define SDRAM_CL_MASK   		(0x7 << SDRAM_CL_OFFS)
+#define SDRAM_DDR1_CL_2	     	(0x2 << SDRAM_CL_OFFS)
+#define SDRAM_DDR1_CL_3      	(0x3 << SDRAM_CL_OFFS)
+#define SDRAM_DDR1_CL_4      	(0x4 << SDRAM_CL_OFFS)
+#define SDRAM_DDR1_CL_1_5    	(0x5 << SDRAM_CL_OFFS)
+#define SDRAM_DDR1_CL_2_5    	(0x6 << SDRAM_CL_OFFS)
+#define SDRAM_DDR2_CL_3      	(0x3 << SDRAM_CL_OFFS)
+#define SDRAM_DDR2_CL_4      	(0x4 << SDRAM_CL_OFFS)
+#define SDRAM_DDR2_CL_5    		(0x5 << SDRAM_CL_OFFS)
+#define SDRAM_TM_OFFS           7
+#define SDRAM_TM_MASK           (1 << SDRAM_TM_OFFS)
+#define SDRAM_TM_NORMAL         (0 << SDRAM_TM_OFFS)
+#define SDRAM_TM_TEST_MODE      (1 << SDRAM_TM_OFFS)
+#define SDRAM_DLL_OFFS          8
+#define SDRAM_DLL_MASK          (1 << SDRAM_DLL_OFFS)
+#define SDRAM_DLL_NORMAL        (0 << SDRAM_DLL_OFFS)
+#define SDRAM_DLL_RESET 	(1 << SDRAM_DLL_OFFS)
+#define SDRAM_WR_OFFS		11
+#define SDRAM_WR_MAX		7
+#define SDRAM_WR_MASK		(SDRAM_WR_MAX << SDRAM_WR_OFFS)
+#define SDRAM_PD_OFFS		12
+#define SDRAM_PD_MASK		(1 << SDRAM_PD_OFFS) 
+#define SDRAM_PD_FAST_EXIT	(0 << SDRAM_PD_OFFS) 
+#define SDRAM_PD_SLOW_EXIT	(1 << SDRAM_PD_OFFS) 
+
+/* DDR SDRAM Extended Mode register (DSEMR) */
+#define SDRAM_EXTENDED_MODE_REG	0x1420
+#define DSEMR_DLL_ENABLE		(1 << 0)
+#define DSEMR_DS_OFFS			1
+#define DSEMR_DS_MASK			(1 << DSEMR_DS_OFFS)
+#define DSEMR_DS_NORMAL			(0 << DSEMR_DS_OFFS)
+#define DSEMR_DS_REDUCED		(1 << DSEMR_DS_OFFS)
+#define DSEMR_RTT0_OFFS			2
+#define DSEMR_RTT1_OFFS			6
+#define DSEMR_RTT_ODT_DISABLE	((0 << DSEMR_RTT0_OFFS)||(0 << DSEMR_RTT1_OFFS))
+#define DSEMR_RTT_ODT_75_OHM	((1 << DSEMR_RTT0_OFFS)||(0 << DSEMR_RTT1_OFFS))
+#define DSEMR_RTT_ODT_150_OHM	((0 << DSEMR_RTT0_OFFS)||(1 << DSEMR_RTT1_OFFS))
+#define DSEMR_OCD_OFFS			7
+#define DSEMR_OCD_MASK			(0x7 << DSEMR_OCD_OFFS)
+#define DSEMR_OCD_EXIT_CALIB	(0 << DSEMR_OCD_OFFS)
+#define DSEMR_OCD_DRIVE1		(1 << DSEMR_OCD_OFFS)
+#define DSEMR_OCD_DRIVE0		(2 << DSEMR_OCD_OFFS)
+#define DSEMR_OCD_ADJUST_MODE	(4 << DSEMR_OCD_OFFS)
+#define DSEMR_OCD_CALIB_DEFAULT	(7 << DSEMR_OCD_OFFS)
+#define DSEMR_DQS_OFFS			10
+#define DSEMR_DQS_MASK			(1 << DSEMR_DQS_OFFS)
+#define DSEMR_DQS_DIFFERENTIAL	(0 << DSEMR_DQS_OFFS)
+#define DSEMR_DQS_SINGLE_ENDED	(0 << DSEMR_DQS_OFFS)
+#define DSEMR_RDQS_ENABLE		(1 << 11)
+#define DSEMR_QOFF_OUTPUT_BUFF_EN	(1 << 12)
+
+/* DDR SDRAM Operation Control Register */
+#define SDRAM_OPERATION_CTRL_REG	0x142c
+
+/* Dunit FTDLL Configuration Register */
+#define SDRAM_FTDLL_CONFIG_REG			0x1484
+  
+/* Pads Calibration register */
+#define SDRAM_ADDR_CTRL_PADS_CAL_REG	0x14c0
+#define SDRAM_DATA_PADS_CAL_REG		0x14c4
+#define SDRAM_DRVN_OFFS 				0
+#define SDRAM_DRVN_MASK 				(0x3F << SDRAM_DRVN_OFFS)
+#define SDRAM_DRVP_OFFS 				6
+#define SDRAM_DRVP_MASK 				(0x3F << SDRAM_DRVP_OFFS)
+#define SDRAM_PRE_DRIVER_STRENGTH_OFFS	12
+#define SDRAM_PRE_DRIVER_STRENGTH_MASK	(3 << SDRAM_PRE_DRIVER_STRENGTH_OFFS)
+#define SDRAM_TUNE_EN   		BIT16
+#define SDRAM_LOCK_OFFS 		17
+#define SDRAM_LOCK_MAKS 		(0x1F << SDRAM_LOCK_OFFS)
+#define SDRAM_LOCKN_OFFS 		17
+#define SDRAM_LOCKN_MAKS 		(0x3F << SDRAM_LOCKN_OFFS)
+#define SDRAM_LOCKP_OFFS 		23
+#define SDRAM_LOCKP_MAKS 		(0x3F << SDRAM_LOCKP_OFFS)
+#define SDRAM_WR_EN     		(1 << 31)
+
+/* DDR2 SDRAM ODT Control (Low) Register (DSOCLR) */
+#define DDR2_SDRAM_ODT_CTRL_LOW_REG  0x1494
+#define DSOCLR_ODT_RD_OFFS(odtNum)   (odtNum * 4)
+#define DSOCLR_ODT_RD_MASK(odtNum)   (0xf << DSOCLR_ODT_RD_OFFS(odtNum))
+#define DSOCLR_ODT_RD(odtNum, bank)  ((1 << bank) << DSOCLR_ODT_RD_OFFS(odtNum))
+#define DSOCLR_ODT_WR_OFFS(odtNum)   (16 + (odtNum * 4))
+#define DSOCLR_ODT_WR_MASK(odtNum)   (0xf << DSOCLR_ODT_WR_OFFS(odtNum))
+#define DSOCLR_ODT_WD(odtNum, bank)  ((1 << bank) << DSOCLR_ODT_WR_OFFS(odtNum))
+
+/* DDR2 SDRAM ODT Control (High) Register (DSOCHR) */
+#define DDR2_SDRAM_ODT_CTRL_HIGH_REG    0x1498
+/* Optional control values to DSOCHR_ODT_EN macro */
+#define DDR2_ODT_CTRL_DUNIT         0
+#define DDR2_ODT_CTRL_NEVER         1
+#define DDR2_ODT_CTRL_ALWAYS        3
+#define DSOCHR_ODT_EN_OFFS(odtNum)  (odtNum * 2)
+#define DSOCHR_ODT_EN_MASK(odtNum)  (0x3 << DSOCHR_ODT_EN_OFFS(odtNum))
+#define DSOCHR_ODT_EN(odtNum, ctrl) ((1 << ctrl) << DSOCHR_ODT_RD_OFFS(odtNum))
+
+/* DDR2 Dunit ODT Control Register (DDOCR)*/
+#define DDR2_DUNIT_ODT_CONTROL_REG  0x149c
+#define DDOCR_ODT_RD_OFFS           0
+#define DDOCR_ODT_RD_MASK           (0xf << DDOCR_ODT_RD_OFFS)
+#define DDOCR_ODT_RD(bank)          ((1 << bank) << DDOCR_ODT_RD_OFFS)
+#define DDOCR_ODT_WR_OFFS           4
+#define DDOCR_ODT_WR_MASK           (0xf << DDOCR_ODT_WR_OFFS)
+#define DDOCR_ODT_WR(bank)          ((1 << bank) << DDOCR_ODT_WR_OFFS)
+#define DSOCR_ODT_EN_OFFS           8
+#define DSOCR_ODT_EN_MASK           (0x3 << DSOCR_ODT_EN_OFFS)
+#define DSOCR_ODT_EN(ctrl)          ((1 << ctrl) << DSOCR_ODT_EN_OFFS)
+#define DSOCR_ODT_SEL_OFFS          10
+#define DSOCR_ODT_SEL_MASK          (0x3 << DSOCR_ODT_SEL_OFFS)
+
+/* DDR SDRAM Initialization Control Register (DSICR) */
+#define DDR_SDRAM_INIT_CTRL_REG		0x1480
+#define DSICR_INIT_EN				(1 << 0)
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* __INCmvDramIfRegsh */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddr1_2/mvDramIf.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddr1_2/mvDramIf.c
@@ -0,0 +1,1600 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+/* includes */
+#include "../mvDramIf.h"
+#include "ctrlEnv/sys/mvCpuIf.h"
+
+#error "This HAL was not adatped to the new HAL arch, and thus cannot be compiled."
+
+
+#ifdef MV_DEBUG
+#define DB(x) x
+#else
+#define DB(x)
+#endif
+
+/* DRAM bank presence encoding */
+#define BANK_PRESENT_CS0				0x1
+#define BANK_PRESENT_CS0_CS1			0x3
+#define BANK_PRESENT_CS0_CS2			0x5
+#define BANK_PRESENT_CS0_CS1_CS2		0x7
+#define BANK_PRESENT_CS0_CS2_CS3		0xd
+#define BANK_PRESENT_CS0_CS2_CS3_CS4	0xf
+
+/* locals   */
+static MV_BOOL sdramIfWinOverlap(MV_TARGET target, MV_ADDR_WIN *pAddrWin);
+#if defined(MV_INC_BOARD_DDIM)
+static void sdramDDr2OdtConfig(MV_DRAM_BANK_INFO *pBankInfo);
+static MV_U32 dunitCtrlLowRegCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 minCas);
+static MV_U32 sdramModeRegCalc(MV_U32 minCas);
+static MV_U32 sdramExtModeRegCalc(MV_DRAM_BANK_INFO *pBankInfo);
+static MV_U32 sdramAddrCtrlRegCalc(MV_DRAM_BANK_INFO *pBankInfo);
+static MV_U32 sdramConfigRegCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 busClk);
+static MV_U32 minCasCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 busClk, 
+						 MV_U32 forcedCl);
+static MV_U32 sdramTimeCtrlLowRegCalc(MV_DRAM_BANK_INFO *pBankInfo, 
+									  MV_U32 minCas, MV_U32 busClk);
+static MV_U32 sdramTimeCtrlHighRegCalc(MV_DRAM_BANK_INFO *pBankInfo, 
+									   MV_U32 busClk);
+
+/*******************************************************************************
+* mvDramIfDetect - Prepare DRAM interface configuration values.
+*
+* DESCRIPTION:
+*       This function implements the full DRAM detection and timing 
+*       configuration for best system performance.
+*       Since this routine runs from a ROM device (Boot Flash), its stack 
+*       resides on RAM, that might be the system DRAM. Changing DRAM 
+*       configuration values while keeping vital data in DRAM is risky. That
+*       is why the function does not preform the configuration setting but 
+*       prepare those in predefined 32bit registers (in this case IDMA 
+*       registers are used) for other routine to perform the settings.
+*       The function will call for board DRAM SPD information for each DRAM 
+*       chip select. The function will then analyze those SPD parameters of 
+*       all DRAM banks in order to decide on DRAM configuration compatible 
+*       for all DRAM banks.
+*       The function will set the CPU DRAM address decode registers.
+*       Note: This routine prepares values that will overide configuration of
+*       mvDramBasicAsmInit().
+*       
+* INPUT:
+*       forcedCl - Forced CAL Latency. If equal to zero, do not force.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_STATUS mvDramIfDetect(MV_U32 forcedCl)
+{
+	MV_U32 retVal = MV_OK;	/* return value */
+	MV_DRAM_BANK_INFO bankInfo[MV_DRAM_MAX_CS];
+	MV_U32  busClk, size, base = 0, i, temp, deviceW, dimmW;
+	MV_U8	minCas;
+	MV_DRAM_DEC_WIN dramDecWin;
+
+	dramDecWin.addrWin.baseHigh = 0;
+
+	busClk = mvBoardSysClkGet();
+	
+	if (0 == busClk)
+	{
+		mvOsPrintf("Dram: ERR. Can't detect system clock! \n");
+		return MV_ERROR;
+	}
+	
+	/* Close DRAM banks except bank 0 (in case code is excecuting from it...) */
+#if defined(MV_INCLUDE_SDRAM_CS1)
+	for(i= SDRAM_CS1; i < MV_DRAM_MAX_CS; i++)
+		mvCpuIfTargetWinEnable(i, MV_FALSE);
+#endif
+
+	/* we will use bank 0 as the representative of the all the DRAM banks,  */
+	/* since bank 0 must exist.                                             */	
+	for(i = 0; i < MV_DRAM_MAX_CS; i++)
+	{ 
+		/* if Bank exist */
+		if(MV_OK == mvDramBankInfoGet(i, &bankInfo[i]))
+		{
+			/* check it isn't SDRAM */
+			if(bankInfo[i].memoryType == MEM_TYPE_SDRAM)
+			{
+				mvOsPrintf("Dram: ERR. SDRAM type not supported !!!\n");
+				return MV_ERROR;
+			}
+			/* All banks must support registry in order to activate it */
+			if(bankInfo[i].registeredAddrAndControlInputs != 
+			   bankInfo[0].registeredAddrAndControlInputs)
+			{
+				mvOsPrintf("Dram: ERR. different Registered settings !!!\n");
+				return MV_ERROR;
+			}
+
+			/* Init the CPU window decode */
+			/* Note that the size in Bank info is in MB units 			*/
+			/* Note that the Dimm width might be different then the device DRAM width */
+			temp = MV_REG_READ(SDRAM_CONFIG_REG);
+			
+			deviceW = ((temp & SDRAM_DWIDTH_MASK) == SDRAM_DWIDTH_16BIT )? 16 : 32;
+			dimmW = bankInfo[0].dataWidth - (bankInfo[0].dataWidth % 16);
+			size = ((bankInfo[i].size << 20) / (dimmW/deviceW)); 
+
+			/* We can not change DRAM window settings while excecuting  	*/
+			/* code from it. That is why we skip the DRAM CS[0], saving     */
+			/* it to the ROM configuration routine	*/
+			if(i == SDRAM_CS0)
+			{
+				MV_U32 sizeToReg;
+				
+				/* Translate the given window size to register format */
+				sizeToReg = ctrlSizeToReg(size, SCSR_SIZE_ALIGNMENT);
+
+				/* Size parameter validity check. */
+				if (-1 == sizeToReg)
+				{
+					mvOsPrintf("mvCtrlAddrDecToReg: ERR. Win %d size invalid.\n"
+							   ,i);
+					return MV_BAD_PARAM;
+				}
+                
+				/* Size is located at upper 16 bits */
+				sizeToReg <<= SCSR_SIZE_OFFS;
+
+				/* enable it */
+				sizeToReg |= SCSR_WIN_EN;
+
+				MV_REG_WRITE(DRAM_BUF_REG0, sizeToReg);
+			}
+			else
+			{
+				dramDecWin.addrWin.baseLow = base;
+				dramDecWin.addrWin.size = size;
+				dramDecWin.enable = MV_TRUE;
+				
+				if (MV_OK != mvDramIfWinSet(SDRAM_CS0 + i, &dramDecWin))
+				{
+					mvOsPrintf("Dram: ERR. Fail to set bank %d!!!\n", 
+							   SDRAM_CS0 + i);
+					return MV_ERROR;
+				}
+			}
+			
+			base += size;
+
+			/* update the suportedCasLatencies mask */
+			bankInfo[0].suportedCasLatencies &= bankInfo[i].suportedCasLatencies;
+
+		}
+		else
+		{
+			if( i == 0 ) /* bank 0 doesn't exist */
+			{
+				mvOsPrintf("Dram: ERR. Fail to detect bank 0 !!!\n");
+				return MV_ERROR;
+			}
+			else
+			{
+				DB(mvOsPrintf("Dram: Could not find bank %d\n", i));
+				bankInfo[i].size = 0;     /* Mark this bank as non exist */
+			}
+		}
+	}
+
+	/* calculate minimum CAS */
+	minCas = minCasCalc(&bankInfo[0], busClk, forcedCl);
+	if (0 == minCas) 
+	{
+		mvOsOutput("Dram: Warn: Could not find CAS compatible to SysClk %dMhz\n",
+				   (busClk / 1000000));
+
+		if (MV_REG_READ(SDRAM_CONFIG_REG) & SDRAM_DTYPE_DDR2)
+		{
+			minCas = DDR2_CL_4; /* Continue with this CAS */
+			mvOsPrintf("Set default CAS latency 4\n");
+		}
+		else
+		{
+			minCas = DDR1_CL_3; /* Continue with this CAS */
+			mvOsPrintf("Set default CAS latency 3\n");
+		}
+	}
+
+	/* calc SDRAM_CONFIG_REG  and save it to temp register */
+	temp = sdramConfigRegCalc(&bankInfo[0], busClk);
+	if(-1 == temp)
+	{
+		mvOsPrintf("Dram: ERR. sdramConfigRegCalc failed !!!\n");
+		return MV_ERROR;
+	}
+	MV_REG_WRITE(DRAM_BUF_REG1, temp);
+
+	/* calc SDRAM_MODE_REG  and save it to temp register */ 
+	temp = sdramModeRegCalc(minCas);
+	if(-1 == temp)
+	{
+		mvOsPrintf("Dram: ERR. sdramModeRegCalc failed !!!\n");
+		return MV_ERROR;
+	}
+	MV_REG_WRITE(DRAM_BUF_REG2, temp);
+
+	/* calc SDRAM_EXTENDED_MODE_REG  and save it to temp register */ 
+	temp = sdramExtModeRegCalc(&bankInfo[0]);
+	if(-1 == temp)
+	{
+		mvOsPrintf("Dram: ERR. sdramModeRegCalc failed !!!\n");
+		return MV_ERROR;
+	}
+	MV_REG_WRITE(DRAM_BUF_REG10, temp);
+
+	/* calc D_UNIT_CONTROL_LOW  and save it to temp register */
+	temp = dunitCtrlLowRegCalc(&bankInfo[0], minCas); 
+	if(-1 == temp)
+	{
+		mvOsPrintf("Dram: ERR. dunitCtrlLowRegCalc failed !!!\n");
+		return MV_ERROR;
+	}
+	MV_REG_WRITE(DRAM_BUF_REG3, temp); 
+
+	/* calc SDRAM_ADDR_CTRL_REG  and save it to temp register */
+	temp = sdramAddrCtrlRegCalc(&bankInfo[0]);
+	if(-1 == temp)
+	{
+		mvOsPrintf("Dram: ERR. sdramAddrCtrlRegCalc failed !!!\n");
+		return MV_ERROR;
+	}
+	MV_REG_WRITE(DRAM_BUF_REG4, temp);
+
+	/* calc SDRAM_TIMING_CTRL_LOW_REG  and save it to temp register */
+	temp = sdramTimeCtrlLowRegCalc(&bankInfo[0], minCas, busClk);
+	if(-1 == temp)
+	{
+		mvOsPrintf("Dram: ERR. sdramTimeCtrlLowRegCalc failed !!!\n");
+		return MV_ERROR;
+	}
+	MV_REG_WRITE(DRAM_BUF_REG5, temp);
+
+	/* calc SDRAM_TIMING_CTRL_HIGH_REG  and save it to temp register */
+	temp = sdramTimeCtrlHighRegCalc(&bankInfo[0], busClk);
+	if(-1 == temp)
+	{
+		mvOsPrintf("Dram: ERR. sdramTimeCtrlHighRegCalc failed !!!\n");
+		return MV_ERROR;
+	}
+	MV_REG_WRITE(DRAM_BUF_REG6, temp);
+
+	/* Config DDR2 On Die Termination (ODT) registers */
+	if (MV_REG_READ(SDRAM_CONFIG_REG) & SDRAM_DTYPE_DDR2)
+	{
+		sdramDDr2OdtConfig(bankInfo);
+	}
+	
+	/* Note that DDR SDRAM Address/Control and Data pad calibration     */
+	/* settings is done in mvSdramIfConfig.s                            */
+
+	return retVal;
+}
+
+/*******************************************************************************
+* minCasCalc - Calculate the Minimum CAS latency which can be used.
+*
+* DESCRIPTION:
+*	Calculate the minimum CAS latency that can be used, base on the DRAM
+*	parameters and the SDRAM bus Clock freq.
+*
+* INPUT:
+*	busClk    - the DRAM bus Clock.
+*	pBankInfo - bank info parameters.
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       The minimum CAS Latency. The function returns 0 if max CAS latency
+*		supported by banks is incompatible with system bus clock frequancy.
+*
+*******************************************************************************/
+static MV_U32 minCasCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 busClk, 
+						 MV_U32 forcedCl)
+{
+	MV_U32 count = 1, j;
+	MV_U32 busClkPs = 1000000000 / (busClk / 1000);  /* in ps units */
+	MV_U32 startBit, stopBit;
+	
+	/*     DDR 1:
+			*******-******-******-******-******-******-******-******* 
+			* bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * 
+			*******-******-******-******-******-******-******-******* 
+	CAS	=	* TBD  |  4   | 3.5  |   3  | 2.5  |  2   | 1.5  |   1  * 
+			*********************************************************/
+	
+	/*     DDR 2:
+			*******-******-******-******-******-******-******-******* 
+			* bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * 
+			*******-******-******-******-******-******-******-******* 
+	CAS	=	* TBD  | TBD  |  5   |  4   |  3   |  2   | TBD  | TBD  * 
+			*********************************************************/
+	
+	
+	/* If we are asked to use the forced CAL */
+	if (forcedCl)
+	{
+		mvOsPrintf("DRAM: Using forced CL %d.%d\n", (forcedCl / 10), 
+													(forcedCl % 10));
+	
+		if (MV_REG_READ(SDRAM_CONFIG_REG) & SDRAM_DTYPE_DDR2)
+		{
+			if (forcedCl == 30)
+				pBankInfo->suportedCasLatencies = 0x08;
+			else if (forcedCl == 40)
+				pBankInfo->suportedCasLatencies = 0x10;
+			else
+			{
+				mvOsPrintf("Forced CL %d.%d not supported. Set default CL 4\n", 
+						   (forcedCl / 10), (forcedCl % 10));
+				pBankInfo->suportedCasLatencies = 0x10;
+			}
+		}
+		else
+		{
+			if (forcedCl == 15)
+				pBankInfo->suportedCasLatencies = 0x02;
+			else if (forcedCl == 20)
+				pBankInfo->suportedCasLatencies = 0x04;
+			else if (forcedCl == 25)
+				pBankInfo->suportedCasLatencies = 0x08;
+			else if (forcedCl == 30)
+				pBankInfo->suportedCasLatencies = 0x10;
+			else if (forcedCl == 40)
+				pBankInfo->suportedCasLatencies = 0x40;
+			else
+			{
+				mvOsPrintf("Forced CL %d.%d not supported. Set default CL 3\n", 
+						   (forcedCl / 10), (forcedCl % 10));
+				pBankInfo->suportedCasLatencies = 0x10;
+			}
+		}
+	
+		return pBankInfo->suportedCasLatencies;        
+	}   
+	
+	/* go over the supported cas mask from Max Cas down and check if the 	*/
+	/* SysClk stands in its time requirments.								*/
+	
+	
+	DB(mvOsPrintf("Dram: minCasCalc supported mask = %x busClkPs = %x \n",
+								pBankInfo->suportedCasLatencies,busClkPs ));
+	for(j = 7; j > 0; j--)
+	{
+		if((pBankInfo->suportedCasLatencies >> j) & BIT0 )
+		{
+			/* Reset the bits for CL incompatible for the sysClk            */
+			switch (count)
+			{
+				case 1: 
+					if (pBankInfo->minCycleTimeAtMaxCasLatPs > busClkPs) 
+						pBankInfo->suportedCasLatencies &= ~(BIT0 << j);
+					count++;
+					break;
+				case 2: 
+					if (pBankInfo->minCycleTimeAtMaxCasLatMinus1Ps > busClkPs)
+						pBankInfo->suportedCasLatencies &= ~(BIT0 << j);
+					count++;
+					break;
+				case 3: 
+					if (pBankInfo->minCycleTimeAtMaxCasLatMinus2Ps > busClkPs)
+						pBankInfo->suportedCasLatencies &= ~(BIT0 << j);
+					count++;
+					break;
+				default: 
+					pBankInfo->suportedCasLatencies &= ~(BIT0 << j);
+					break;
+			}
+		}
+	}
+	
+	DB(mvOsPrintf("Dram: minCasCalc support = %x (after SysCC calc)\n",
+				  pBankInfo->suportedCasLatencies ));
+	
+	/* SDRAM DDR1 controller supports CL 1.5 to 3.5 */
+	/* SDRAM DDR2 controller supports CL 3 to 5     */
+	if (MV_REG_READ(SDRAM_CONFIG_REG) & SDRAM_DTYPE_DDR2)
+	{
+		startBit = 3;   /* DDR2 support CL start with CL3 (bit 3) */
+		stopBit  = 5;   /* DDR2 support CL stops with CL5 (bit 5) */
+	}
+	else
+	{
+		startBit = 1;   /* DDR1 support CL start with CL1.5 (bit 3) */
+		stopBit  = 4;   /* DDR1 support CL stops with CL3 (bit 4)   */
+	}
+	
+	for(j = startBit; j <= stopBit ; j++)
+	{
+		if((pBankInfo->suportedCasLatencies >> j) & BIT0 )
+		{
+			DB(mvOsPrintf("Dram: minCasCalc choose CAS %x \n",(BIT0 << j)));
+			return (BIT0 << j);
+		}
+	}
+	
+	return 0; 
+}
+
+/*******************************************************************************
+* sdramConfigRegCalc - Calculate sdram config register
+*
+* DESCRIPTION: Calculate sdram config register optimized value based
+*			on the bank info parameters.
+*
+* INPUT:
+*	pBankInfo - sdram bank parameters
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       sdram config reg value.
+*
+*******************************************************************************/
+static MV_U32 sdramConfigRegCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 busClk)
+{
+	MV_U32 sdramConfig = 0;
+	MV_U32 refreshPeriod;
+	
+	busClk /= 1000000; /* we work with busClk in MHz */
+	
+	sdramConfig = MV_REG_READ(SDRAM_CONFIG_REG);
+	
+	/* figure out the memory refresh internal */
+	switch (pBankInfo->refreshInterval & 0xf)
+	{
+		case 0x0: /* refresh period is 15.625 usec */
+			refreshPeriod = 15625;
+			break;
+		case 0x1: /* refresh period is 3.9 usec  	*/
+			refreshPeriod = 3900;
+			break;
+		case 0x2: /* refresh period is 7.8 usec 	*/
+			refreshPeriod = 7800;
+			break;
+		case 0x3: /* refresh period is 31.3 usec	*/
+			refreshPeriod = 31300;
+			break;
+		case 0x4: /* refresh period is 62.5 usec	*/
+			refreshPeriod = 62500;
+			break;
+		case 0x5: /* refresh period is 125 usec 	*/
+			refreshPeriod = 125000;
+			break;
+		default:  /* refresh period undefined 					*/
+			mvOsPrintf("Dram: ERR. DRAM refresh period is unknown!\n");
+			return -1;
+	}
+	
+	/* Now the refreshPeriod is in register format value */
+	refreshPeriod = (busClk * refreshPeriod) / 1000;
+	
+	DB(mvOsPrintf("Dram: sdramConfigRegCalc calculated refresh interval %0x\n", 
+				  refreshPeriod));
+
+	/* make sure the refresh value is only 14 bits */
+	if(refreshPeriod > SDRAM_REFRESH_MAX)
+	{
+		refreshPeriod = SDRAM_REFRESH_MAX;
+		DB(mvOsPrintf("Dram: sdramConfigRegCalc adjusted refresh interval %0x\n", 
+					  refreshPeriod));
+	}
+	
+	/* Clear the refresh field */
+	sdramConfig &= ~SDRAM_REFRESH_MASK;
+	
+	/* Set new value to refresh field */
+	sdramConfig |= (refreshPeriod & SDRAM_REFRESH_MASK);
+	
+	/*  registered DRAM ? */
+	if ( pBankInfo->registeredAddrAndControlInputs )
+	{
+		/* it's registered DRAM, so set the reg. DRAM bit */
+		sdramConfig |= SDRAM_REGISTERED;
+		mvOsPrintf("DRAM Attribute: Registered address and control inputs.\n");
+	}
+	
+	/* set DDR SDRAM devices configuration */
+	sdramConfig &= ~SDRAM_DCFG_MASK;    /* Clear Dcfg field */
+	
+	switch (pBankInfo->sdramWidth)
+	{
+		case 8:  /* memory is x8 */
+			sdramConfig |= SDRAM_DCFG_X8_DEV;
+			DB(mvOsPrintf("Dram: sdramConfigRegCalc SDRAM device width x8\n"));
+			break;
+		case 16:
+			sdramConfig |= SDRAM_DCFG_X16_DEV;
+			DB(mvOsPrintf("Dram: sdramConfigRegCalc SDRAM device width x16\n"));
+			break;
+		default: /* memory width unsupported */
+			mvOsPrintf("Dram: ERR. DRAM chip width is unknown!\n");
+			return -1;
+	}
+
+	/* Set static default settings */
+	sdramConfig |= SDRAM_CONFIG_DV;
+	
+	DB(mvOsPrintf("Dram: sdramConfigRegCalc set sdramConfig to 0x%x\n",
+				  sdramConfig));
+	
+	return sdramConfig;  
+}
+
+/*******************************************************************************
+* sdramModeRegCalc - Calculate sdram mode register
+*
+* DESCRIPTION: Calculate sdram mode register optimized value based
+*			on the bank info parameters and the minCas.
+*
+* INPUT:
+*	minCas	  - minimum CAS supported. 
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       sdram mode reg value.
+*
+*******************************************************************************/
+static MV_U32 sdramModeRegCalc(MV_U32 minCas)
+{
+	MV_U32 sdramMode;
+		
+	sdramMode = MV_REG_READ(SDRAM_MODE_REG);
+	
+	/* Clear CAS Latency field */
+	sdramMode &= ~SDRAM_CL_MASK;
+	
+	mvOsPrintf("DRAM CAS Latency ");
+	
+	if (MV_REG_READ(SDRAM_CONFIG_REG) & SDRAM_DTYPE_DDR2)
+	{            	
+		switch (minCas)
+		{
+			case DDR2_CL_3: 
+				sdramMode |= SDRAM_DDR2_CL_3;
+				mvOsPrintf("3.\n");
+				break;
+			case DDR2_CL_4: 
+				sdramMode |= SDRAM_DDR2_CL_4;
+				mvOsPrintf("4.\n");
+				break;
+			case DDR2_CL_5: 
+				sdramMode |= SDRAM_DDR2_CL_5;
+				mvOsPrintf("5.\n");
+				break;
+			default:
+				mvOsPrintf("\nsdramModeRegCalc ERROR: Max. CL out of range\n");
+				return -1;
+		}
+	sdramMode |= DDR2_MODE_REG_DV;
+	}
+	else	/* DDR1 */
+	{
+		switch (minCas)
+		{			
+			case DDR1_CL_1_5: 
+				sdramMode |= SDRAM_DDR1_CL_1_5;
+				mvOsPrintf("1.5\n");
+				break;
+			case DDR1_CL_2: 
+				sdramMode |= SDRAM_DDR1_CL_2;
+				mvOsPrintf("2\n");
+				break;            
+			case DDR1_CL_2_5: 
+				sdramMode |= SDRAM_DDR1_CL_2_5;
+				mvOsPrintf("2.5\n");
+				break;
+			case DDR1_CL_3: 
+				sdramMode |= SDRAM_DDR1_CL_3;
+				mvOsPrintf("3\n");
+				break;
+			case DDR1_CL_4: 
+				sdramMode |= SDRAM_DDR1_CL_4;
+				mvOsPrintf("4\n");
+				break;
+			default:
+				mvOsPrintf("\nsdramModeRegCalc ERROR: Max. CL out of range\n");
+				return -1;	
+		}
+		sdramMode |= DDR1_MODE_REG_DV;		
+	}
+	
+	DB(mvOsPrintf("nsdramModeRegCalc register 0x%x\n", sdramMode ));
+
+	return sdramMode;
+}
+
+/*******************************************************************************
+* sdramExtModeRegCalc - Calculate sdram Extended mode register
+*
+* DESCRIPTION: 
+*		Return sdram Extended mode register value based
+*		on the bank info parameters and bank presence.
+*
+* INPUT:
+*	pBankInfo - sdram bank parameters
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       sdram Extended mode reg value.
+*
+*******************************************************************************/
+static MV_U32 sdramExtModeRegCalc(MV_DRAM_BANK_INFO *pBankInfo)
+{
+	MV_U32 populateBanks = 0;
+	int bankNum;
+	if (MV_REG_READ(SDRAM_CONFIG_REG) & SDRAM_DTYPE_DDR2)
+	{
+	/* Represent the populate banks in binary form */
+	for(bankNum = 0; bankNum < MV_DRAM_MAX_CS; bankNum++)
+	{
+		if (0 != pBankInfo[bankNum].size)
+		{
+				populateBanks |= (1 << bankNum);
+			}
+		}
+	
+		switch(populateBanks)
+		{
+			case(BANK_PRESENT_CS0):
+				return DDR_SDRAM_EXT_MODE_CS0_DV;
+		
+			case(BANK_PRESENT_CS0_CS1):
+				return DDR_SDRAM_EXT_MODE_CS0_DV;
+		
+			case(BANK_PRESENT_CS0_CS2):
+				return DDR_SDRAM_EXT_MODE_CS0_CS2_DV;
+		
+			case(BANK_PRESENT_CS0_CS1_CS2):
+				return DDR_SDRAM_EXT_MODE_CS0_CS2_DV;
+		
+			case(BANK_PRESENT_CS0_CS2_CS3):
+				return DDR_SDRAM_EXT_MODE_CS0_CS2_DV;
+		
+			case(BANK_PRESENT_CS0_CS2_CS3_CS4):
+				return DDR_SDRAM_EXT_MODE_CS0_CS2_DV;
+		
+			default:
+				mvOsPrintf("sdramExtModeRegCalc: Invalid DRAM bank presence\n");
+				return -1;
+		} 
+	}
+	return 0;
+}
+
+/*******************************************************************************
+* dunitCtrlLowRegCalc - Calculate sdram dunit control low register
+*
+* DESCRIPTION: Calculate sdram dunit control low register optimized value based
+*			on the bank info parameters and the minCas.
+*
+* INPUT:
+*	pBankInfo - sdram bank parameters
+*	minCas	  - minimum CAS supported. 
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       sdram dunit control low reg value.
+*
+*******************************************************************************/
+static MV_U32 dunitCtrlLowRegCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 minCas)
+{
+	MV_U32 dunitCtrlLow;
+	
+	dunitCtrlLow = MV_REG_READ(SDRAM_DUNIT_CTRL_REG);
+	
+	/* Clear StBurstDel field */
+	dunitCtrlLow &= ~SDRAM_ST_BURST_DEL_MASK;
+	
+#ifdef MV_88W8660
+	/* Clear address/control output timing field */
+	dunitCtrlLow &= ~SDRAM_CTRL_POS_RISE;
+#endif /* MV_88W8660 */
+
+	DB(mvOsPrintf("Dram: dunitCtrlLowRegCalc\n"));
+	
+	/* For proper sample of read data set the Dunit Control register's      */
+	/* stBurstDel bits [27:24]                                              */
+			/********-********-********-********-********-*********
+			* CL=1.5 |  CL=2  | CL=2.5 |  CL=3  |  CL=4  |  CL=5  *
+			*********-********-********-********-********-*********
+Not Reg.	*  0011  |  0011  |  0100  |  0100  |  0101  |  TBD   *
+			*********-********-********-********-********-*********
+Registered	*  0100  |  0100  |  0101  |  0101  |  0110  |  TBD   *
+			*********-********-********-********-********-*********/
+    
+	if (MV_REG_READ(SDRAM_CONFIG_REG) & SDRAM_DTYPE_DDR2)
+	{
+		switch (minCas)
+		{
+			case DDR2_CL_3: 
+					/* registerd DDR SDRAM? */
+				if (pBankInfo->registeredAddrAndControlInputs == MV_TRUE) 		
+					dunitCtrlLow |= 0x5 << SDRAM_ST_BURST_DEL_OFFS;
+				else
+					dunitCtrlLow |= 0x4 << SDRAM_ST_BURST_DEL_OFFS;
+				break;
+			case DDR2_CL_4: 
+				/* registerd DDR SDRAM? */
+				if (pBankInfo->registeredAddrAndControlInputs == MV_TRUE) 		
+					dunitCtrlLow |= 0x6 << SDRAM_ST_BURST_DEL_OFFS;
+				else
+					dunitCtrlLow |= 0x5 << SDRAM_ST_BURST_DEL_OFFS;	
+				break;
+			default:
+				mvOsPrintf("Dram: dunitCtrlLowRegCalc Max. CL out of range %d\n", 
+						   minCas);
+				return -1;
+		}
+	}
+	else    /* DDR1 */
+	{
+		switch (minCas)
+		{
+			case DDR1_CL_1_5: 
+				/* registerd DDR SDRAM? */
+				if (pBankInfo->registeredAddrAndControlInputs == MV_TRUE)
+					dunitCtrlLow |= 0x4 << SDRAM_ST_BURST_DEL_OFFS;
+				else
+					dunitCtrlLow |= 0x3 << SDRAM_ST_BURST_DEL_OFFS;
+				break;
+			case DDR1_CL_2: 
+				/* registerd DDR SDRAM? */
+				if (pBankInfo->registeredAddrAndControlInputs == MV_TRUE)
+					dunitCtrlLow |= 0x4 << SDRAM_ST_BURST_DEL_OFFS;
+				else
+					dunitCtrlLow |= 0x3 << SDRAM_ST_BURST_DEL_OFFS;
+				break;
+			case DDR1_CL_2_5: 
+				/* registerd DDR SDRAM? */
+				if (pBankInfo->registeredAddrAndControlInputs == MV_TRUE)
+					dunitCtrlLow |= 0x5 << SDRAM_ST_BURST_DEL_OFFS;
+				else
+					dunitCtrlLow |= 0x4 << SDRAM_ST_BURST_DEL_OFFS;	
+				break;
+			case DDR1_CL_3: 
+				/* registerd DDR SDRAM? */
+				if (pBankInfo->registeredAddrAndControlInputs == MV_TRUE)
+					dunitCtrlLow |= 0x5 << SDRAM_ST_BURST_DEL_OFFS;
+				else
+					dunitCtrlLow |= 0x4 << SDRAM_ST_BURST_DEL_OFFS;	
+				break;
+			case DDR1_CL_4: 
+				/* registerd DDR SDRAM? */
+				if (pBankInfo->registeredAddrAndControlInputs == MV_TRUE)
+					dunitCtrlLow |= 0x6 << SDRAM_ST_BURST_DEL_OFFS;
+				else
+					dunitCtrlLow |= 0x5 << SDRAM_ST_BURST_DEL_OFFS;	
+				break;
+			default:
+				mvOsPrintf("Dram: dunitCtrlLowRegCalc Max. CL out of range %d\n", 
+						   minCas);
+				return -1;
+	}
+	
+	}
+	DB(mvOsPrintf("Dram: Reg dunit control low = %x\n", dunitCtrlLow ));
+
+	return dunitCtrlLow;
+}  
+                                                                    
+/*******************************************************************************
+* sdramAddrCtrlRegCalc - Calculate sdram address control register
+*
+* DESCRIPTION: Calculate sdram address control register optimized value based
+*			on the bank info parameters and the minCas.
+*
+* INPUT:
+*	pBankInfo - sdram bank parameters
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       sdram address control reg value.
+*
+*******************************************************************************/
+static MV_U32 sdramAddrCtrlRegCalc(MV_DRAM_BANK_INFO *pBankInfo)
+{
+	MV_U32 addrCtrl = 0;
+	
+	/* Set Address Control register static configuration bits */
+	addrCtrl = MV_REG_READ(SDRAM_ADDR_CTRL_REG);
+	
+	/* Set address control default value */
+	addrCtrl |= SDRAM_ADDR_CTRL_DV;  
+	
+	/* Clear DSize field */
+	addrCtrl &= ~SDRAM_DSIZE_MASK;
+	
+	/* Note that density is in MB units */
+	switch (pBankInfo->deviceDensity) 
+	{
+		case 128:                 /* 128 Mbit */
+			DB(mvOsPrintf("DRAM Device Density 128Mbit\n"));
+			addrCtrl |= SDRAM_DSIZE_128Mb;
+			break;
+		case 256:                 /* 256 Mbit */
+			DB(mvOsPrintf("DRAM Device Density 256Mbit\n"));
+			addrCtrl |= SDRAM_DSIZE_256Mb;
+			break;
+		case 512:                /* 512 Mbit */
+			DB(mvOsPrintf("DRAM Device Density 512Mbit\n"));
+			addrCtrl |= SDRAM_DSIZE_512Mb;
+			break;
+		default:
+			mvOsPrintf("Dram: sdramAddrCtrl unsupported RAM-Device size %d\n",
+                       pBankInfo->deviceDensity);
+			return -1;
+	}
+     
+	/* SDRAM address control */
+	DB(mvOsPrintf("Dram: setting sdram address control with: %x \n", addrCtrl));
+
+	return addrCtrl;
+}
+
+/*******************************************************************************
+* sdramTimeCtrlLowRegCalc - Calculate sdram timing control low register
+*
+* DESCRIPTION: 
+*       This function calculates sdram timing control low register 
+*       optimized value based on the bank info parameters and the minCas.
+*
+* INPUT:
+*	    pBankInfo - sdram bank parameters
+*       busClk    - Bus clock
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       sdram timinf control low reg value.
+*
+*******************************************************************************/
+static MV_U32 sdramTimeCtrlLowRegCalc(MV_DRAM_BANK_INFO *pBankInfo, 
+                                                MV_U32 minCas, MV_U32 busClk)
+{
+	MV_U32 tRp  = 0;
+	MV_U32 tRrd = 0;
+	MV_U32 tRcd = 0;
+	MV_U32 tRas = 0;
+	MV_U32 tWr  = 0;
+	MV_U32 tWtr = 0;
+	MV_U32 tRtp = 0;
+	
+	MV_U32 bankNum;
+	
+	busClk = busClk / 1000000;    /* In MHz */
+	
+	/* Scan all DRAM banks to find maximum timing values */
+	for (bankNum = 0; bankNum < MV_DRAM_MAX_CS; bankNum++)
+	{
+		tRp  = MV_MAX(tRp,  pBankInfo[bankNum].minRowPrechargeTime);
+		tRrd = MV_MAX(tRrd, pBankInfo[bankNum].minRowActiveToRowActive);
+		tRcd = MV_MAX(tRcd, pBankInfo[bankNum].minRasToCasDelay);
+		tRas = MV_MAX(tRas, pBankInfo[bankNum].minRasPulseWidth);
+	}
+	
+	/* Extract timing (in ns) from SPD value. We ignore the tenth ns part.  */
+	/* by shifting the data two bits right.                                 */
+	tRp  = tRp  >> 2;    /* For example 0x50 -> 20ns                        */
+	tRrd = tRrd >> 2;
+	tRcd = tRcd >> 2;
+	
+	/* Extract clock cycles from time parameter. We need to round up        */
+	tRp  = ((busClk * tRp)  / 1000) + (((busClk * tRp)  % 1000) ? 1 : 0);
+	/* Micron work around for 133MHz */
+	if (busClk == 133)
+		tRp += 1;
+	DB(mvOsPrintf("Dram  Timing Low: tRp = %d ", tRp));
+	tRrd = ((busClk * tRrd) / 1000) + (((busClk * tRrd) % 1000) ? 1 : 0);
+	/* JEDEC min reqeirments tRrd = 2 */
+	if (tRrd < 2)
+		tRrd = 2;
+	DB(mvOsPrintf("tRrd = %d ", tRrd));
+	tRcd = ((busClk * tRcd) / 1000) + (((busClk * tRcd) % 1000) ? 1 : 0);
+	DB(mvOsPrintf("tRcd = %d ", tRcd));
+	tRas = ((busClk * tRas) / 1000) + (((busClk * tRas) % 1000) ? 1 : 0);
+	DB(mvOsPrintf("tRas = %d ", tRas));
+	
+	/* tWr and tWtr is different for DDR1 and DDR2. tRtp is only for DDR2   */
+	if (MV_REG_READ(SDRAM_CONFIG_REG) & SDRAM_DTYPE_DDR2)
+	{
+		/* Scan all DRAM banks to find maximum timing values */
+		for (bankNum = 0; bankNum < MV_DRAM_MAX_CS; bankNum++)
+		{
+			tWr  = MV_MAX(tWr,  pBankInfo[bankNum].minWriteRecoveryTime);
+			tWtr = MV_MAX(tWtr, pBankInfo[bankNum].minWriteToReadCmdDelay);
+			tRtp = MV_MAX(tRtp, pBankInfo[bankNum].minReadToPrechCmdDelay);
+		}
+		
+		/* Extract timing (in ns) from SPD value. We ignore the tenth ns    */
+		/* part by shifting the data two bits right.                        */
+		tWr  = tWr  >> 2;    /* For example 0x50 -> 20ns                    */
+		tWtr = tWtr >> 2;
+		tRtp = tRtp >> 2;
+	
+		/* Extract clock cycles from time parameter. We need to round up    */
+		tWr  = ((busClk * tWr)  / 1000) + (((busClk * tWr)  % 1000) ? 1 : 0);
+		DB(mvOsPrintf("tWr = %d ", tWr));
+		tWtr = ((busClk * tWtr) / 1000) + (((busClk * tWtr) % 1000) ? 1 : 0);
+		/* JEDEC min reqeirments tWtr = 2 */
+		if (tWtr < 2)
+			tWtr = 2;
+		DB(mvOsPrintf("tWtr = %d ", tWtr));
+		tRtp = ((busClk * tRtp) / 1000) + (((busClk * tRtp) % 1000) ? 1 : 0);
+		/* JEDEC min reqeirments tRtp = 2 */
+		if (tRtp < 2)
+			tRtp = 2;
+		DB(mvOsPrintf("tRtp = %d ", tRtp));
+	}
+	else
+	{    
+		tWr  = ((busClk*SDRAM_TWR) / 1000) + (((busClk*SDRAM_TWR) % 1000)?1:0);
+		
+		if ((200 == busClk) || ((100 == busClk) && (DDR1_CL_1_5 == minCas)))
+		{
+			tWtr = 2;
+		}
+		else
+		{
+			tWtr = 1;
+		}
+		
+		tRtp = 2; /* Must be set to 0x1 (two cycles) when using DDR1 */
+	}
+	
+	DB(mvOsPrintf("tWtr = %d\n", tWtr));
+	
+	/* Note: value of 0 in register means one cycle, 1 means two and so on  */
+	return (((tRp  - 1) << SDRAM_TRP_OFFS)	|
+			((tRrd - 1) << SDRAM_TRRD_OFFS)	|
+			((tRcd - 1) << SDRAM_TRCD_OFFS)	|
+			((tRas - 1) << SDRAM_TRAS_OFFS)	|
+			((tWr  - 1) << SDRAM_TWR_OFFS)	|
+			((tWtr - 1) << SDRAM_TWTR_OFFS)	|
+			((tRtp - 1) << SDRAM_TRTP_OFFS));
+}
+
+/*******************************************************************************
+* sdramTimeCtrlHighRegCalc - Calculate sdram timing control high register
+*
+* DESCRIPTION: 
+*       This function calculates sdram timing control high register 
+*       optimized value based on the bank info parameters and the bus clock.
+*
+* INPUT:
+*	    pBankInfo - sdram bank parameters
+*       busClk    - Bus clock
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       sdram timinf control high reg value.
+*
+*******************************************************************************/
+static MV_U32 sdramTimeCtrlHighRegCalc(MV_DRAM_BANK_INFO *pBankInfo, 
+                                                                MV_U32 busClk)
+{
+	MV_U32 tRfc;
+	MV_U32 timeNs = 0;
+	int bankNum;
+	MV_U32 sdramTw2wCyc = 0;
+	
+	busClk = busClk / 1000000;    /* In MHz */
+	
+	/* tRfc is different for DDR1 and DDR2. */
+	if (MV_REG_READ(SDRAM_CONFIG_REG) & SDRAM_DTYPE_DDR2)
+	{
+		MV_U32 bankNum;
+	
+		/* Scan all DRAM banks to find maximum timing values */
+		for (bankNum = 0; bankNum < MV_DRAM_MAX_CS; bankNum++)
+			timeNs = MV_MAX(timeNs,  pBankInfo[bankNum].minRefreshToActiveCmd);
+	}
+	else
+	{
+		if (pBankInfo[0].deviceDensity == _1G)
+		{
+			timeNs = SDRAM_TRFC_1G;
+		}
+		else
+		{
+			if (200 == busClk)
+			{
+				timeNs = SDRAM_TRFC_64_512M_AT_200MHZ;
+			}
+			else
+			{
+				timeNs = SDRAM_TRFC_64_512M;
+			}
+		}
+	}
+	
+	tRfc = ((busClk * timeNs)  / 1000) + (((busClk * timeNs)  % 1000) ? 1 : 0);
+	
+	DB(mvOsPrintf("Dram  Timing High: tRfc = %d\n", tRfc));
+
+	
+	/* Represent the populate banks in binary form */
+	for(bankNum = 0; bankNum < MV_DRAM_MAX_CS; bankNum++)
+	{
+		if (0 != pBankInfo[bankNum].size)
+			sdramTw2wCyc++;
+	}
+
+	/* If we have more the 1 bank then we need the TW2W in 1 for ODT switch */	
+	if (sdramTw2wCyc > 1)
+		sdramTw2wCyc = 1;
+	else
+		sdramTw2wCyc = 0;
+
+	/* Note: value of 0 in register means one cycle, 1 means two and so on  */
+	return ((((tRfc - 1) & SDRAM_TRFC_MASK)	<< SDRAM_TRFC_OFFS)		|
+			((SDRAM_TR2R_CYC - 1)			<< SDRAM_TR2R_OFFS)		|
+			((SDRAM_TR2WW2R_CYC - 1)		<< SDRAM_TR2W_W2R_OFFS)	|
+			(((tRfc - 1) >> 4)				<< SDRAM_TRFC_EXT_OFFS)	|
+			(sdramTw2wCyc					<< SDRAM_TW2W_OFFS));
+	
+}
+
+/*******************************************************************************
+* sdramDDr2OdtConfig - Set DRAM DDR2 On Die Termination registers.
+*
+* DESCRIPTION: 
+*       This function config DDR2 On Die Termination (ODT) registers.
+*	ODT configuration is done according to DIMM presence:
+*	
+*       Presence	  Ctrl Low    Ctrl High  Dunit Ctrl   Ext Mode  
+*	CS0	         0x84210000  0x00000000  0x0000780F  0x00000440 
+*	CS0+CS1          0x84210000  0x00000000  0x0000780F  0x00000440 
+*	CS0+CS2	    	 0x030C030C  0x00000000  0x0000740F  0x00000404 
+*	CS0+CS1+CS2	 0x030C030C  0x00000000  0x0000740F  0x00000404 
+*	CS0+CS2+CS3	 0x030C030C  0x00000000  0x0000740F  0x00000404 
+*	CS0+CS1+CS2+CS3  0x030C030C  0x00000000  0x0000740F  0x00000404 
+*		
+* INPUT:
+*		pBankInfo - bank info parameters.
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       None
+*******************************************************************************/
+static void sdramDDr2OdtConfig(MV_DRAM_BANK_INFO *pBankInfo)
+{
+	MV_U32 populateBanks = 0;
+	MV_U32 odtCtrlLow, odtCtrlHigh, dunitOdtCtrl;
+	int bankNum;
+	
+	/* Represent the populate banks in binary form */
+	for(bankNum = 0; bankNum < MV_DRAM_MAX_CS; bankNum++)
+	{
+		if (0 != pBankInfo[bankNum].size)
+		{
+				populateBanks |= (1 << bankNum);
+			}
+		}
+	
+	switch(populateBanks)
+	{
+		case(BANK_PRESENT_CS0):
+			odtCtrlLow   = DDR2_ODT_CTRL_LOW_CS0_DV;
+			odtCtrlHigh  = DDR2_ODT_CTRL_HIGH_CS0_DV;
+			dunitOdtCtrl = DDR2_DUNIT_ODT_CTRL_CS0_DV;
+			break;
+		case(BANK_PRESENT_CS0_CS1):
+			odtCtrlLow   = DDR2_ODT_CTRL_LOW_CS0_DV;
+			odtCtrlHigh  = DDR2_ODT_CTRL_HIGH_CS0_DV;
+			dunitOdtCtrl = DDR2_DUNIT_ODT_CTRL_CS0_DV;
+			break;
+		case(BANK_PRESENT_CS0_CS2):
+			odtCtrlLow   = DDR2_ODT_CTRL_LOW_CS0_CS2_DV;
+			odtCtrlHigh  = DDR2_ODT_CTRL_HIGH_CS0_CS2_DV;
+			dunitOdtCtrl = DDR2_DUNIT_ODT_CTRL_CS0_CS2_DV;
+			break;
+		case(BANK_PRESENT_CS0_CS1_CS2):
+			odtCtrlLow   = DDR2_ODT_CTRL_LOW_CS0_CS2_DV;
+			odtCtrlHigh  = DDR2_ODT_CTRL_HIGH_CS0_CS2_DV;
+			dunitOdtCtrl = DDR2_DUNIT_ODT_CTRL_CS0_CS2_DV;
+			break;
+		case(BANK_PRESENT_CS0_CS2_CS3):
+			odtCtrlLow   = DDR2_ODT_CTRL_LOW_CS0_CS2_DV;
+			odtCtrlHigh  = DDR2_ODT_CTRL_HIGH_CS0_CS2_DV;
+			dunitOdtCtrl = DDR2_DUNIT_ODT_CTRL_CS0_CS2_DV;
+			break;
+		case(BANK_PRESENT_CS0_CS2_CS3_CS4):
+			odtCtrlLow   = DDR2_ODT_CTRL_LOW_CS0_CS2_DV;
+			odtCtrlHigh  = DDR2_ODT_CTRL_HIGH_CS0_CS2_DV;
+			dunitOdtCtrl = DDR2_DUNIT_ODT_CTRL_CS0_CS2_DV;
+			break;
+		default:
+			mvOsPrintf("sdramDDr2OdtConfig: Invalid DRAM bank presence\n");
+			return;
+	} 
+	MV_REG_WRITE(DRAM_BUF_REG7, odtCtrlLow);
+	MV_REG_WRITE(DRAM_BUF_REG8, odtCtrlHigh);
+	MV_REG_WRITE(DRAM_BUF_REG9, dunitOdtCtrl);
+	return;
+}
+#endif /* defined(MV_INC_BOARD_DDIM) */
+
+/*******************************************************************************
+* mvDramIfWinSet - Set DRAM interface address decode window
+*
+* DESCRIPTION: 
+*       This function sets DRAM interface address decode window.
+*
+* INPUT:
+*	    target      - System target. Use only SDRAM targets.
+*       pAddrDecWin - SDRAM address window structure.
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       MV_BAD_PARAM if parameters are invalid or window is invalid, MV_OK
+*       otherwise.
+*******************************************************************************/
+MV_STATUS mvDramIfWinSet(MV_TARGET target, MV_DRAM_DEC_WIN *pAddrDecWin)
+{
+	MV_U32 baseReg=0,sizeReg=0;
+	MV_U32 baseToReg=0 , sizeToReg=0;
+
+    /* Check parameters */
+	if (!MV_TARGET_IS_DRAM(target))
+	{
+		mvOsPrintf("mvDramIfWinSet: target %d is not SDRAM\n", target);
+		return MV_BAD_PARAM;
+	}
+
+    /* Check if the requested window overlaps with current enabled windows	*/
+    if (MV_TRUE == sdramIfWinOverlap(target, &pAddrDecWin->addrWin))
+	{
+        mvOsPrintf("mvDramIfWinSet: ERR. Target %d overlaps\n", target);
+		return MV_BAD_PARAM;
+	}
+
+	/* check if address is aligned to the size */
+	if(MV_IS_NOT_ALIGN(pAddrDecWin->addrWin.baseLow, pAddrDecWin->addrWin.size))
+	{
+		mvOsPrintf("mvDramIfWinSet:Error setting DRAM interface window %d."\
+				   "\nAddress 0x%08x is unaligned to size 0x%x.\n",
+                   target, 
+				   pAddrDecWin->addrWin.baseLow,
+				   pAddrDecWin->addrWin.size);
+		return MV_ERROR;
+	}
+
+	/* read base register*/
+	baseReg = MV_REG_READ(SDRAM_BASE_ADDR_REG(target));
+
+	/* read size register */
+	sizeReg = MV_REG_READ(SDRAM_SIZE_REG(target));
+
+	/* BaseLow[31:16] => base register [31:16]		*/
+	baseToReg = pAddrDecWin->addrWin.baseLow & SCBAR_BASE_MASK;
+
+	/* Write to address decode Base Address Register                  */
+	baseReg &= ~SCBAR_BASE_MASK;
+	baseReg |= baseToReg;
+
+	/* Translate the given window size to register format			*/
+	sizeToReg = ctrlSizeToReg(pAddrDecWin->addrWin.size, SCSR_SIZE_ALIGNMENT);
+
+	/* Size parameter validity check.                                   */
+	if (-1 == sizeToReg)
+	{
+		mvOsPrintf("mvCtrlAddrDecToReg: ERR. Win %d size invalid.\n",target);
+		return MV_BAD_PARAM;
+	}
+
+	/* set size */
+	sizeReg &= ~SCSR_SIZE_MASK;
+	/* Size is located at upper 16 bits */
+	sizeReg |= (sizeToReg << SCSR_SIZE_OFFS);
+
+	/* enable/Disable */
+	if (MV_TRUE == pAddrDecWin->enable)
+	{
+		sizeReg |= SCSR_WIN_EN;
+	}
+	else
+	{
+		sizeReg &= ~SCSR_WIN_EN;
+	}
+
+	/* 3) Write to address decode Base Address Register                   */
+	MV_REG_WRITE(SDRAM_BASE_ADDR_REG(target), baseReg);
+
+	/* Write to address decode Size Register                        	*/
+	MV_REG_WRITE(SDRAM_SIZE_REG(target), sizeReg);
+	
+	return MV_OK;
+}
+/*******************************************************************************
+* mvDramIfWinGet - Get DRAM interface address decode window
+*
+* DESCRIPTION: 
+*       This function gets DRAM interface address decode window.
+*
+* INPUT:
+*	    target - System target. Use only SDRAM targets.
+*
+* OUTPUT:
+*       pAddrDecWin - SDRAM address window structure.
+*
+* RETURN:
+*       MV_BAD_PARAM if parameters are invalid or window is invalid, MV_OK
+*       otherwise.
+*******************************************************************************/
+MV_STATUS mvDramIfWinGet(MV_TARGET target, MV_DRAM_DEC_WIN *pAddrDecWin)
+{
+	MV_U32 baseReg,sizeReg;
+	MV_U32 sizeRegVal;
+
+	/* Check parameters */
+	if (!MV_TARGET_IS_DRAM(target))
+	{
+		mvOsPrintf("mvDramIfWinGet: target %d is Illigal\n", target);
+		return MV_ERROR;
+	}
+
+	/* Read base and size registers */
+	sizeReg = MV_REG_READ(SDRAM_SIZE_REG(target));
+	baseReg = MV_REG_READ(SDRAM_BASE_ADDR_REG(target));
+
+	sizeRegVal = (sizeReg & SCSR_SIZE_MASK) >> SCSR_SIZE_OFFS;
+
+	pAddrDecWin->addrWin.size = ctrlRegToSize(sizeRegVal,
+											 SCSR_SIZE_ALIGNMENT);
+
+    /* Check if ctrlRegToSize returned OK */
+	if (-1 == pAddrDecWin->addrWin.size)
+	{
+		mvOsPrintf("mvDramIfWinGet: size of target %d is Illigal\n", target);
+		return MV_ERROR;
+	}
+
+	/* Extract base address						*/
+	/* Base register [31:16] ==> baseLow[31:16] 		*/
+	pAddrDecWin->addrWin.baseLow = baseReg & SCBAR_BASE_MASK;
+
+	pAddrDecWin->addrWin.baseHigh =  0;
+
+
+	if (sizeReg & SCSR_WIN_EN)
+	{
+		pAddrDecWin->enable = MV_TRUE;
+	}
+	else
+	{
+		pAddrDecWin->enable = MV_FALSE;			
+	}
+
+	return MV_OK;
+}
+/*******************************************************************************
+* mvDramIfWinEnable - Enable/Disable SDRAM address decode window
+*
+* DESCRIPTION: 
+*		This function enable/Disable SDRAM address decode window.
+*
+* INPUT:
+*	    target - System target. Use only SDRAM targets.
+*
+* OUTPUT:
+*		None.
+*
+* RETURN:
+*		MV_ERROR in case function parameter are invalid, MV_OK otherewise.
+*
+*******************************************************************************/
+MV_STATUS mvDramIfWinEnable(MV_TARGET target,MV_BOOL enable)
+{
+	MV_DRAM_DEC_WIN 	addrDecWin;
+
+	/* Check parameters */
+	if (!MV_TARGET_IS_DRAM(target))
+	{
+		mvOsPrintf("mvDramIfWinEnable: target %d is Illigal\n", target);
+		return MV_ERROR;
+	}
+
+	if (enable == MV_TRUE) 
+	{   /* First check for overlap with other enabled windows				*/
+		if (MV_OK != mvDramIfWinGet(target, &addrDecWin))
+		{
+			mvOsPrintf("mvDramIfWinEnable:ERR. Getting target %d failed.\n", 
+                                                                        target);
+			return MV_ERROR;
+		}
+		/* Check for overlapping */
+		if (MV_FALSE == sdramIfWinOverlap(target, &(addrDecWin.addrWin)))
+		{
+			/* No Overlap. Enable address decode winNum window              */
+			MV_REG_BIT_SET(SDRAM_SIZE_REG(target), SCSR_WIN_EN);
+		}
+		else
+		{   /* Overlap detected	*/
+			mvOsPrintf("mvDramIfWinEnable: ERR. Target %d overlap detect\n",
+                                                                        target);
+			return MV_ERROR;
+		}
+	}
+	else
+	{   /* Disable address decode winNum window                             */
+		MV_REG_BIT_RESET(SDRAM_SIZE_REG(target), SCSR_WIN_EN);
+	}
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* sdramIfWinOverlap - Check if an address window overlap an SDRAM address window
+*
+* DESCRIPTION:
+*		This function scan each SDRAM address decode window to test if it 
+*		overlapps the given address windoow 
+*
+* INPUT:
+*       target      - SDRAM target where the function skips checking.
+*       pAddrDecWin - The tested address window for overlapping with 
+*					  SDRAM windows.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE if the given address window overlaps any enabled address
+*       decode map, MV_FALSE otherwise.
+*
+*******************************************************************************/
+static MV_BOOL sdramIfWinOverlap(MV_TARGET target, MV_ADDR_WIN *pAddrWin)
+{
+	MV_TARGET	targetNum;
+	MV_DRAM_DEC_WIN 	addrDecWin;
+	
+	for(targetNum = SDRAM_CS0; targetNum < MV_DRAM_MAX_CS ; targetNum++)
+	{
+		/* don't check our winNum or illegal targets */
+		if (targetNum == target)
+		{
+			continue;
+		}
+		
+		/* Get window parameters 	*/
+		if (MV_OK != mvDramIfWinGet(targetNum, &addrDecWin))
+		{
+			mvOsPrintf("sdramIfWinOverlap: ERR. TargetWinGet failed\n");
+			return MV_ERROR;
+		}
+	
+		/* Do not check disabled windows	*/
+		if (MV_FALSE == addrDecWin.enable)
+		{
+			continue;
+		}
+	
+		if(MV_TRUE == ctrlWinOverlapTest(pAddrWin, &addrDecWin.addrWin))
+		{                    
+			mvOsPrintf(
+			"sdramIfWinOverlap: Required target %d overlap winNum %d\n", 
+			target, targetNum);
+			return MV_TRUE;           
+		}
+	}
+	
+	return MV_FALSE;
+}
+
+/*******************************************************************************
+* mvDramIfBankSizeGet - Get DRAM interface bank size.
+*
+* DESCRIPTION:
+*       This function returns the size of a given DRAM bank.
+*
+* INPUT:
+*       bankNum - Bank number.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       DRAM bank size. If bank is disabled the function return '0'. In case 
+*		or paramter is invalid, the function returns -1.
+*
+*******************************************************************************/
+MV_32 mvDramIfBankSizeGet(MV_U32 bankNum)
+{
+    MV_DRAM_DEC_WIN 	addrDecWin;
+	
+	/* Check parameters */
+	if (!MV_TARGET_IS_DRAM(bankNum))
+	{
+		mvOsPrintf("mvDramIfBankBaseGet: bankNum %d is invalid\n", bankNum);
+		return -1;
+	}
+	/* Get window parameters 	*/
+	if (MV_OK != mvDramIfWinGet(bankNum, &addrDecWin))
+	{
+		mvOsPrintf("sdramIfWinOverlap: ERR. TargetWinGet failed\n");
+		return -1;
+	}
+	
+	if (MV_TRUE == addrDecWin.enable)
+	{
+		return addrDecWin.addrWin.size;
+	}
+	else
+	{
+		return 0;
+	}
+}
+
+
+/*******************************************************************************
+* mvDramIfSizeGet - Get DRAM interface total size.
+*
+* DESCRIPTION:
+*       This function get the DRAM total size.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       DRAM total size. In case or paramter is invalid, the function 
+*		returns -1.
+*
+*******************************************************************************/
+MV_32 mvDramIfSizeGet(MV_VOID)
+{
+	MV_U32 totalSize = 0, bankSize = 0, bankNum;
+	
+	for(bankNum = 0; bankNum < MV_DRAM_MAX_CS; bankNum++)
+	{
+		bankSize = mvDramIfBankSizeGet(bankNum);
+
+		if (-1 == bankSize)
+		{
+			mvOsPrintf("Dram: mvDramIfSizeGet error with bank %d \n",bankNum);
+			return -1;
+		}
+		else
+		{
+			totalSize += bankSize;
+		}
+	}
+	
+	DB(mvOsPrintf("Dram: Total DRAM size is 0x%x \n",totalSize));
+	
+	return totalSize;
+}
+
+/*******************************************************************************
+* mvDramIfBankBaseGet - Get DRAM interface bank base.
+*
+* DESCRIPTION:
+*       This function returns the 32 bit base address of a given DRAM bank.
+*
+* INPUT:
+*       bankNum - Bank number.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       DRAM bank size. If bank is disabled or paramter is invalid, the 
+*		function returns -1.
+*
+*******************************************************************************/
+MV_32 mvDramIfBankBaseGet(MV_U32 bankNum)
+{
+    MV_DRAM_DEC_WIN 	addrDecWin;
+	
+	/* Check parameters */
+	if (!MV_TARGET_IS_DRAM(bankNum))
+	{
+		mvOsPrintf("mvDramIfBankBaseGet: bankNum %d is invalid\n", bankNum);
+		return -1;
+	}
+	/* Get window parameters 	*/
+	if (MV_OK != mvDramIfWinGet(bankNum, &addrDecWin))
+	{
+		mvOsPrintf("sdramIfWinOverlap: ERR. TargetWinGet failed\n");
+		return -1;
+	}
+	
+	if (MV_TRUE == addrDecWin.enable)
+	{
+		return addrDecWin.addrWin.baseLow;
+	}
+	else
+	{
+		return -1;
+	}
+}
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddr1_2/mvDramIfBasicInit.S
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddr1_2/mvDramIfBasicInit.S
@@ -0,0 +1,988 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#define MV_ASMLANGUAGE
+#include "mvSysHwConfig.h"
+#include "mvOsAsm.h"
+#include "mvBoardEnvSpec.h"
+#include "mvCpuIfRegs.h"
+#include "mvDramIfConfig.h"
+#include "mvDramIfRegs.h"
+#include "pex/mvPexRegs.h"
+#include "pci/mvPciRegs.h"
+#include "mvCtrlEnvSpec.h"
+#include "mvCtrlEnvAsm.h"
+#include "cpu/mvCpuArm.h"
+#include "mvCommon.h"
+
+/* defines */
+
+#if !defined(MV_INC_BOARD_DDIM)
+.globl dramBoot1
+dramBoot1:
+        .word   0
+
+/******************************************************************************
+*
+*
+*
+*
+*******************************************************************************/
+#if defined(DB_PRPMC) || defined(DB_PEX_PCI) || defined(DB_MNG)
+
+/* PEX_PCI and PRPMC boards 256 MB*/
+#define STATIC_SDRAM0_BANK0_SIZE	     	0x0fff0001
+#define STATIC_SDRAM_CONFIG	     		0x03248400
+#define STATIC_SDRAM_MODE	     		0x62
+#define STATIC_DUNIT_CTRL_LOW	     		0x4041000
+#define STATIC_SDRAM_ADDR_CTRL	     		0x00000020
+#define STATIC_SDRAM_TIME_CTRL_LOW     		0x11602220
+#define STATIC_SDRAM_TIME_CTRL_HI	     	0x0000030F
+#define STATIC_SDRAM_ODT_CTRL_LOW	     	0x0
+#define STATIC_SDRAM_ODT_CTRL_HI	     	0x0
+#define STATIC_SDRAM_DUNIT_ODT_CTRL    		0x0
+#define STATIC_SDRAM_EXT_MODE          		0x0
+
+#elif defined(DB_FPGA)
+
+/* FPGA DC boards 256 MB*/
+#define STATIC_SDRAM0_BANK0_SIZE	     	0x0fff0001
+#define STATIC_SDRAM_CONFIG	     		0x03208400	/* 32bit */
+#define STATIC_SDRAM_MODE	     		0x22
+#define STATIC_DUNIT_CTRL_LOW	     		0x03041000
+#define STATIC_SDRAM_ADDR_CTRL	     		0x00000020
+#define STATIC_SDRAM_TIME_CTRL_LOW     		0x11112220
+#define STATIC_SDRAM_TIME_CTRL_HI	     	0x0000000D
+#define STATIC_SDRAM_ODT_CTRL_LOW	     	0x0
+#define STATIC_SDRAM_ODT_CTRL_HI	     	0x0
+#define STATIC_SDRAM_DUNIT_ODT_CTRL    		0x0
+#define STATIC_SDRAM_EXT_MODE          		0x1
+
+#elif  defined(RD_88F6183GP) || defined(DB_CUSTOMER)
+
+/* Customer 1 DDR2 2 devices 512Mbit by 16 bit */
+#define STATIC_SDRAM0_BANK0_SIZE	     	0x07ff0001
+#define STATIC_SDRAM_CONFIG	     		0x03158400
+#define STATIC_SDRAM_MODE	     		0x452
+#define STATIC_DUNIT_CTRL_LOW	     		0x06041000
+#define STATIC_SDRAM_ADDR_CTRL	     		0x00000020
+#define STATIC_SDRAM_TIME_CTRL_LOW     		0x11912220
+#define STATIC_SDRAM_TIME_CTRL_HI	     	0x00000502
+#define STATIC_SDRAM_ODT_CTRL_LOW	     	0x00010000
+#define STATIC_SDRAM_ODT_CTRL_HI	     	0x00000002
+#define STATIC_SDRAM_DUNIT_ODT_CTRL    		0x00000601
+#define STATIC_SDRAM_EXT_MODE          		0x00000440
+
+
+#elif  defined(RD_88F6183AP)
+
+/* DDR2 1 devices 512Mbit by 16 bit */
+#define STATIC_SDRAM0_BANK0_SIZE	     	0x03ff0001
+#define STATIC_SDRAM_CONFIG	     		0x1f154400
+#define STATIC_SDRAM_MODE	     		0x432
+#define STATIC_DUNIT_CTRL_LOW	     		0x04041000
+#define STATIC_SDRAM_ADDR_CTRL	     		0x00000020
+#define STATIC_SDRAM_TIME_CTRL_LOW     		0x11912220
+#define STATIC_SDRAM_TIME_CTRL_HI	     	0x00000502
+#define STATIC_SDRAM_ODT_CTRL_LOW	     	0x00010000
+#define STATIC_SDRAM_ODT_CTRL_HI	     	0x00000002
+#define STATIC_SDRAM_DUNIT_ODT_CTRL    		0x00000601
+#define STATIC_SDRAM_EXT_MODE          		0x00000440
+
+/* 6082L MARVELL DIMM */
+#elif  defined(DB_88F6082LBP)
+#define STATIC_SDRAM0_BANK0_SIZE	     	0x07ff0001
+#define STATIC_SDRAM_CONFIG	     		0x7f158400
+#define STATIC_SDRAM_MODE	     		0x432
+#define STATIC_DUNIT_CTRL_LOW	     		0x04041040
+#define STATIC_SDRAM_ADDR_CTRL	     		0x00000020
+#define STATIC_SDRAM_TIME_CTRL_LOW     		0x11612220
+#define STATIC_SDRAM_TIME_CTRL_HI	     	0x00000501
+#define STATIC_SDRAM_ODT_CTRL_LOW	     	0x00010000
+#define STATIC_SDRAM_ODT_CTRL_HI	     	0x00000002
+#define STATIC_SDRAM_DUNIT_ODT_CTRL    		0x00000a01
+#define STATIC_SDRAM_EXT_MODE          		0x00000440
+
+#elif  defined(RD_88W8660_AP82S)
+
+/* Shark RD */
+
+#if defined(MV_DRAM_32M)
+#define STATIC_SDRAM0_BANK0_SIZE	     	0x01ff0001
+#define STATIC_SDRAM_ADDR_CTRL	     		0x00000010
+#elif defined(MV_DRAM_16M)
+
+#define STATIC_SDRAM0_BANK0_SIZE	     	0x00ff0001
+#define STATIC_SDRAM_ADDR_CTRL	     		0x00000000
+
+#else
+#error "NO DDR size selected"
+#endif
+
+#define STATIC_SDRAM_CONFIG	     		0x03144400
+#define STATIC_SDRAM_MODE	     		0x62
+#define STATIC_DUNIT_CTRL_LOW	     		0x4041000
+
+#define STATIC_SDRAM_TIME_CTRL_LOW     		0x11602220
+#define STATIC_SDRAM_TIME_CTRL_HI	     	0x0000040b
+#define STATIC_SDRAM_ODT_CTRL_LOW	     	0x0
+#define STATIC_SDRAM_ODT_CTRL_HI	     	0x0
+#define STATIC_SDRAM_DUNIT_ODT_CTRL    		0x0
+#define STATIC_SDRAM_EXT_MODE          		0x0
+
+#elif defined(RD_88W8660)
+
+/* Shark RD */
+#define STATIC_SDRAM0_BANK0_SIZE	     	0x03ff0001
+#define STATIC_SDRAM_CONFIG	     		0x03144400
+#define STATIC_SDRAM_MODE	     		0x62
+#define STATIC_DUNIT_CTRL_LOW	     		0x4041000
+#define STATIC_SDRAM_ADDR_CTRL	     		0x00000010
+#define STATIC_SDRAM_TIME_CTRL_LOW     		0x11602220
+#define STATIC_SDRAM_TIME_CTRL_HI	     	0x0000040b
+#define STATIC_SDRAM_ODT_CTRL_LOW	     	0x0
+#define STATIC_SDRAM_ODT_CTRL_HI	     	0x0
+#define STATIC_SDRAM_DUNIT_ODT_CTRL    		0x0
+#define STATIC_SDRAM_EXT_MODE          		0x0
+
+#else /* NAS */
+
+
+#if defined(RD_88F5182)
+
+#if defined(MV_88F5082)
+#define STATIC_SDRAM0_BANK0_SIZE	     	0x3ff0001
+#define STATIC_SDRAM_ADDR_CTRL	    	 	0x20
+#else
+#define STATIC_SDRAM0_BANK0_SIZE	     	0x7ff0001
+#define STATIC_SDRAM_ADDR_CTRL	    	 	0x20
+#endif
+
+#elif defined(RD_88F5182_3)
+
+#if defined(MV_88F5082)
+#define STATIC_SDRAM0_BANK0_SIZE	     	0x3ff0001
+#define STATIC_SDRAM_ADDR_CTRL	    	 	0x20
+#else
+#define STATIC_SDRAM0_BANK0_SIZE	     	0x7ff0001
+#define STATIC_SDRAM_ADDR_CTRL	    	 	0x20
+#endif
+
+#else
+
+#define STATIC_SDRAM0_BANK0_SIZE	     	0x1ff0001
+#define STATIC_SDRAM_ADDR_CTRL	    	 	0x0
+
+#endif
+
+#if defined(MV_88F5082)
+#define STATIC_SDRAM_CONFIG	     		0x3144400
+#else
+#define STATIC_SDRAM_CONFIG	     		0x3148400
+#endif
+#define STATIC_SDRAM_MODE	     		0x62
+#define STATIC_DUNIT_CTRL_LOW	     		0x4041000
+#define STATIC_SDRAM_TIME_CTRL_LOW     		0x11602220
+#define STATIC_SDRAM_TIME_CTRL_HI	     	0x40c
+#define STATIC_SDRAM_ODT_CTRL_LOW	     	0x0
+#define STATIC_SDRAM_ODT_CTRL_HI	     	0x0
+#define STATIC_SDRAM_DUNIT_ODT_CTRL    		0x0
+#define STATIC_SDRAM_EXT_MODE          		0x0
+
+#endif
+
+	.globl _mvDramIfStaticInit
+_mvDramIfStaticInit:
+
+	mov     r11, LR     		/* Save link register */
+	mov	r10, r2
+
+        /* If we boot from NAND jump to DRAM sddress */
+
+        mov     r5, #1
+        ldr     r6, =dramBoot1
+        str     r5, [r6]                /* We started executing from DRAM */
+
+        ldr     r6, dramBoot1
+        cmp     r6, #0
+        bne     1f
+
+
+	/* set all dram windows to 0 */
+	mov	r6, #0
+	MV_REG_WRITE_ASM(r6, r5, 0x1504)
+	MV_REG_WRITE_ASM(r6, r5, 0x150c)
+	MV_REG_WRITE_ASM(r6, r5, 0x1514)
+	MV_REG_WRITE_ASM(r6, r5, 0x151c)
+
+	/* set all dram configuration in temp registers */
+	ldr	r6, = STATIC_SDRAM0_BANK0_SIZE
+	MV_REG_WRITE_ASM(r6, r5, DRAM_BUF_REG0)
+	ldr	r6, = STATIC_SDRAM_CONFIG
+	MV_REG_WRITE_ASM(r6, r5, DRAM_BUF_REG1)
+	ldr	r6, = STATIC_SDRAM_MODE
+	MV_REG_WRITE_ASM(r6, r5, DRAM_BUF_REG2)
+	ldr	r6, = STATIC_DUNIT_CTRL_LOW
+	MV_REG_WRITE_ASM(r6, r5, DRAM_BUF_REG3)
+	ldr	r6, = STATIC_SDRAM_ADDR_CTRL
+	MV_REG_WRITE_ASM(r6, r5, DRAM_BUF_REG4)
+	ldr	r6, = STATIC_SDRAM_TIME_CTRL_LOW
+	MV_REG_WRITE_ASM(r6, r5, DRAM_BUF_REG5)
+	ldr	r6, = STATIC_SDRAM_TIME_CTRL_HI
+	MV_REG_WRITE_ASM(r6, r5, DRAM_BUF_REG6)
+	ldr	r6, = STATIC_SDRAM_ODT_CTRL_LOW
+	MV_REG_WRITE_ASM(r6, r5, DRAM_BUF_REG7)
+	ldr	r6, = STATIC_SDRAM_ODT_CTRL_HI
+	MV_REG_WRITE_ASM(r6, r5, DRAM_BUF_REG8)
+	ldr	r6, = STATIC_SDRAM_DUNIT_ODT_CTRL
+	MV_REG_WRITE_ASM(r6, r5, DRAM_BUF_REG9)
+	ldr	r6, = STATIC_SDRAM_EXT_MODE
+	MV_REG_WRITE_ASM(r6, r5, DRAM_BUF_REG10)
+
+	mov 	sp, #0
+	bl	_mvDramIfConfig
+1:
+	mov 	r2, r10
+	mov     PC, r11         	/* r11 is saved link register */
+
+#else  /* #if !defined(MV_INC_BOARD_DDIM) */
+
+.globl dramBoot1
+dramBoot1:
+        .word   0
+
+/*******************************************************************************
+* mvDramIfBasicInit - Basic initialization of DRAM interface
+*
+* DESCRIPTION:
+*       The function will initialize the DRAM for basic usage. The function
+*       will use the TWSI assembly API to extract DIMM parameters according
+*       to which DRAM interface will be initialized.
+*       The function referes to the following DRAM parameters:
+*       1) DIMM is registered or not.
+*       2) DIMM width detection.
+*       3) DIMM density.
+*
+* INPUT:
+*       r3 - required size for initial DRAM.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*       Note:
+*       r4 holds I2C EEPROM address
+*       r5 holds SDRAM register base address
+*	r7 holds returned values
+*       r8 holds SDRAM various configuration registers value.
+*       r11 holds return function address.
+*******************************************************************************/
+/* Setting the offsets of the I2C registers */
+#define NUM_OF_ROWS_OFFSET            3
+#define NUM_OF_COLS_OFFSET            4
+#define NUM_OF_RANKS		      5
+#define SDRAM_WIDTH_OFFSET           13
+#define NUM_OF_BANKS_OFFSET          17
+#define SUPPORTED_CL_OFFSET          18
+#define DIMM_TYPE_INFO_OFFSET        20         /* DDR2 only    */
+#define SDRAM_MODULES_ATTR_OFFSET    21
+
+#define DRAM_DEV_DENSITY_128M        0x080
+#define DRAM_DEV_DENSITY_256M        0x100
+#define DRAM_DEV_DENSITY_512M        0x200
+       .globl _mvDramIfBasicInit
+       .extern _i2cInit
+
+_mvDramIfBasicInit:
+
+        mov     r11, LR     		/* Save link register */
+
+        mov     r5, #1
+        ldr     r8, =dramBoot1
+        str     r5, [r8]                /* We started executing from DRAM */
+
+        /* If we boot from NAND jump to DRAM sddress */
+        ldr     r8, dramBoot1
+        cmp     r8, #0
+        movne   pc, r11
+
+
+
+        bl      _i2cInit                /* Initialize TWSI master             */
+
+        /* Get default SDRAM Config values */
+        MV_REG_READ_ASM (r8, r5, SDRAM_CONFIG_REG)
+        bic     r8, r8, #SDRAM_DCFG_MASK
+
+
+        /* Read device ID  */
+	MV_CTRL_MODEL_GET_ASM(r4, r5);
+
+        /* Return if OrionN */
+        ldr     r5, =MV_5180_DEV_ID
+        cmp     r4, r5
+        beq     cat_through_end
+
+        /* Return if Orion1 */
+        ldr     r5, =MV_5181_DEV_ID
+        cmp     r4, r5
+        beq     cat_through_end
+
+        /* Return if Nas */
+        ldr     r5, =MV_5182_DEV_ID
+        cmp     r4, r5
+        beq     cat_through_end
+
+        /* Return if Shark */
+        ldr     r5, =MV_8660_DEV_ID
+        cmp     r4, r5
+        beq     cat_through_end
+
+        /* goto calcConfigReg if bigger than Orion2*/
+        ldr     r5, =MV_5281_DEV_ID
+        cmp     r4, r5
+        bne     cat_through
+
+cat_through:
+        /* set cat through - for better performance - in orion2 b0 and higher*/
+        orr     r8, r8, #SDRAM_CATTHR_EN
+
+cat_through_end:
+
+
+        /* Get registered/non registered info from DIMM */
+	bl  	_is_Registered
+        beq     nonRegistered
+
+setRegistered:
+        orr     r8, r8, #SDRAM_REGISTERED   /* Set registered bit(17)         */
+
+nonRegistered:
+	/* Get SDRAM width */
+	bl 	_get_width
+
+        orr     r6, r8, #SDRAM_DCFG_X16_DEV /* x16 devices  */
+        cmp     r7, #16
+        beq     setConfigReg
+
+        orr     r6, r8, #SDRAM_DCFG_X8_DEV  /* x8 devices   */
+        cmp     r7, #8
+        beq     setConfigReg
+
+        /* This is an error. return */
+        b       exit_ddrAutoConfig
+
+setConfigReg:
+        mov     r8, r6
+        ldr     r6, =SDRAM_CONFIG_DV
+        orr     r8, r8, r6              /* Add default settings */
+        mov     r6, r8                  /* Do not swap r8 content */
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_CONFIG_REG)
+
+        /* Set maximum CL supported by DIMM */
+	bl	_get_CAL
+
+        /* r7 is DIMM supported CAS (e.g: 3 --> 0x1C)                         */
+        clz     r6, r7
+        rsb     r6, r6, #31     /* r6 = the bit number of MAX CAS supported   */
+
+        /* Check the DDR version */
+        tst     r8, #SDRAM_DTYPE_DDR2
+        bne     casDdr2
+
+casDdr1:
+        ldr	r7, =3		/* stBurstDel field value	*/
+	ldr     r8, =0x52       /* Assuming MAX CL = 1.5        */
+        cmp     r6, #1          /* If CL = 1.5 break            */
+        beq     setModeReg
+
+        ldr	r7, =3		/* stBurstDel field value	*/
+	ldr     r8, =0x22       /* Assuming MAX CL = 2          */
+        cmp     r6, #2          /* If CL = 2 break              */
+        beq     setModeReg
+
+        ldr	r7, =4		/* stBurstDel field value	*/
+	ldr     r8, =0x62       /* Assuming MAX CL = 2.5        */
+        cmp     r6, #3          /* If CL = 2.5 break            */
+        beq     setModeReg
+
+        ldr	r7, =4		/* stBurstDel field value	*/
+	ldr     r8, =0x32       /* Assuming MAX CL = 3          */
+        cmp     r6, #4          /* If CL = 3 break              */
+        beq     setModeReg
+
+        ldr	r7, =5		/* stBurstDel field value	*/
+	ldr     r8, =0x42       /* Assuming MAX CL = 4          */
+        cmp     r6, #6          /* If CL = 4 break              */
+        b       setModeReg
+
+        b       exit_ddrAutoConfig      /* This is an error !!  */
+
+casDdr2:
+        ldr	r7, =4		/* stBurstDel field value	*/
+	ldr     r8, =0x32      /* Assuming MAX CL = 3           */
+        cmp     r6, #3          /* If CL = 3 break              */
+        beq     casDdr2Cont
+
+        ldr	r7, =5		/* stBurstDel field value	*/
+	ldr     r8, =0x42      /* Assuming MAX CL = 4           */
+        cmp     r6, #4          /* If CL = 4 break              */
+        beq     casDdr2Cont
+
+        /* CL 5 currently unsupported. We use CL 4 instead      */
+        ldr	r7, =5		/* stBurstDel field value	*/
+	ldr     r8, =0x42      /* Assuming MAX CL = 5           */
+        cmp     r6, #5          /* If CL = 5 break              */
+        beq     casDdr2Cont
+
+        b       exit_ddrAutoConfig      /* This is an error !!  */
+casDdr2Cont:
+        /* Write recovery for auto-precharge relevant only in DDR2 */
+        orr     r8, r8, #0x400   /* Default value */
+
+setModeReg:
+        /* The CPU must not attempt to change the SDRAM Mode register setting */
+        /* prior to DRAM controller completion of the DRAM initialization     */
+        /* sequence. To guarantee this restriction, it is recommended that    */
+        /* the CPU sets the SDRAM Operation register to NOP command, performs */
+        /* read polling until the register is back in Normal operation value, */
+        /* and then sets SDRAM Mode register to it's new value.               */
+
+	/* write 'nop' to SDRAM operation */
+        mov     r6, #0x5                 /* 'NOP' command              */
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_OPERATION_REG)
+
+        /* poll SDRAM operation. Make sure its back to normal operation       */
+_sdramOpPoll1:
+        ldr     r6, [r5]
+        cmp     r6, #0                          /* '0' = Normal SDRAM Mode    */
+        bne     _sdramOpPoll1
+
+        /* Now its safe to write new value to SDRAM Mode register             */
+        MV_REG_WRITE_ASM (r8, r5, SDRAM_MODE_REG)
+
+        /* Make the Dunit write the DRAM its new mode                         */
+        mov     r6, #0x3                 /* Mode Register Set command  */
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_OPERATION_REG)
+
+        /* poll SDRAM operation. Make sure its back to normal operation       */
+_sdramOpPoll2:
+        ldr     r6, [r5]
+        cmp     r6, #0                          /* '0' = Normal SDRAM Mode    */
+        bne     _sdramOpPoll2
+
+	/* Set Dunit control register according to max CL detected	      */
+	/* If we use registered DIMM, add 1 to stBurstDel		      */
+        MV_REG_READ_ASM (r6, r5, SDRAM_CONFIG_REG)
+	tst	r6, #SDRAM_REGISTERED
+	beq	setDunitReg
+	add	r7, r7, #1
+
+setDunitReg:
+        ldr     r6, =SDRAM_DUNIT_CTRL_LOW_DV
+        orr	r6, r6, r7, LSL #SDRAM_ST_BURST_DEL_OFFS
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_DUNIT_CTRL_REG)
+
+
+        /* DIMM density configuration*/
+        /* Density = (1 << (rowNum + colNum)) * dramWidth * dramBankNum       */
+Density:
+	bl 	_getDensity
+	mov 	r8, r7
+        mov     r8, r8, LSR #20 /* Move density 20 bits to the right  */
+                                /* For example 0x10000000 --> 0x1000 */
+
+        mov     r6, #0x00
+        cmp     r8, #DRAM_DEV_DENSITY_128M
+        beq     densCont
+
+        mov     r6, #0x10
+        cmp     r8, #DRAM_DEV_DENSITY_256M
+        beq     densCont
+
+        mov     r6, #0x20
+        cmp     r8, #DRAM_DEV_DENSITY_512M
+        beq     densCont
+
+        /* This is an error. return */
+        b       exit_ddrAutoConfig
+
+densCont:
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_ADDR_CTRL_REG)
+
+        /* Config DDR2 registers (Extended mode, ODTs and pad calibration)    */
+        MV_REG_READ_ASM (r8, r5, SDRAM_CONFIG_REG)
+        tst     r8, #SDRAM_DTYPE_DDR2
+        beq     _extModeODTEnd
+
+
+	/* Set DDR Extended Mode register for working with CS[0]	      */
+        /* write 'nop' to SDRAM operation */
+        mov     r6, #0x5                 /* 'NOP' command              */
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_OPERATION_REG)
+
+        /* poll SDRAM operation. Make sure its back to normal operation       */
+_sdramOpPoll3:
+        ldr     r6, [r5]
+        cmp     r6, #0                          /* '0' = Normal SDRAM Mode    */
+        bne     _sdramOpPoll3
+
+        /* Now its safe to write new value to SDRAM Extended Mode register    */
+        ldr	r6, =DDR_SDRAM_EXT_MODE_CS0_DV
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_EXTENDED_MODE_REG)
+
+        /* Make the Dunit write the DRAM its new extended mode                */
+        mov     r6, #0x4                /* Extended Mode Register Set command */
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_OPERATION_REG)
+
+        /* poll SDRAM operation. Make sure its back to normal operation       */
+_sdramOpPoll4:
+        ldr     r6, [r5]
+        cmp     r6, #0                          /* '0' = Normal SDRAM Mode    */
+        bne     _sdramOpPoll4
+
+	/* ODT configuration is done for single bank CS[0] only		      */
+        /* Config DDR2 On Die Termination (ODT) registers */
+        ldr     r6, =DDR2_ODT_CTRL_LOW_CS0_DV
+        MV_REG_WRITE_ASM (r6, r5, DDR2_SDRAM_ODT_CTRL_LOW_REG)
+
+        ldr     r6, =DDR2_ODT_CTRL_HIGH_CS0_DV
+        MV_REG_WRITE_ASM (r6, r5, DDR2_SDRAM_ODT_CTRL_HIGH_REG)
+
+        ldr     r6, =DDR2_DUNIT_ODT_CTRL_CS0_DV
+        MV_REG_WRITE_ASM (r6, r5, DDR2_DUNIT_ODT_CONTROL_REG)
+
+
+        /* we will check what device we are running and perform
+        Initialization according to device value */
+
+_extModeODTEnd:
+
+        /* Implement Guideline (GL# MEM-2) P_CAL Automatic Calibration  */
+        /* Does Not Work for Address/Control and Data Pads.             */
+        /* Relevant for: 88F5181-A1/B0 and 88F5281-A0                   */
+
+	/* Read device ID  */
+	MV_CTRL_MODEL_GET_ASM(r6, r5);
+        /* Read device revision */
+	MV_CTRL_REV_GET_ASM(r8, r5);
+
+	/* Continue if OrionN */
+        ldr     r5, =MV_5180_DEV_ID
+        cmp     r6, r5
+        bne     1f
+        b     glMem2End
+1:
+
+	/* Continue if Orion1 and device revision B1 */
+        ldr     r5, =MV_5181_DEV_ID
+        cmp     r6, r5
+        bne     1f
+
+        cmp     r8, #MV_5181_B1_REV
+        bge     glMem2End
+        b       glMem2Start
+1:
+
+        /* Orion NAS */
+        ldr     r5, =MV_5182_DEV_ID
+        cmp     r6, r5
+        beq     glMem2Start
+
+        /* Orion Shark */
+        ldr     r5, =MV_8660_DEV_ID
+        cmp     r6, r5
+        beq     glMem2Start
+
+	b	glMem2End
+
+glMem2Start:
+
+        /* DDR SDRAM Address/Control Pads Calibration                   */
+        MV_REG_READ_ASM (r6, r5, SDRAM_ADDR_CTRL_PADS_CAL_REG)
+
+        /* Set Bit [31] to make the register writable                   */
+        orr   r8, r6, #SDRAM_WR_EN
+
+        MV_REG_WRITE_ASM (r8, r5, SDRAM_ADDR_CTRL_PADS_CAL_REG)
+
+        bic   r6, r6, #SDRAM_WR_EN      /* Make register read-only      */
+        bic   r6, r6, #SDRAM_TUNE_EN    /* Disable auto calibration     */
+        bic   r6, r6, #SDRAM_DRVN_MASK  /* Clear r5[5:0]<DrvN>          */
+        bic   r6, r6, #SDRAM_DRVP_MASK  /* Clear r5[11:6]<DrvP>         */
+
+        /* Get the final N locked value of driving strength [22:17]     */
+        mov   r5, r6
+        mov   r5, r5, LSL #9
+        mov   r5, r5, LSR #26    /* r5[5:0]<DrvN>  = r6[22:17]<LockN>   */
+        orr   r5, r5, r5, LSL #6 /* r5[11:6]<DrvP> = r5[5:0]<DrvN>      */
+
+        /* Write to both <DrvN> bits [5:0] and <DrvP> bits [11:6]       */
+        orr   r6, r6, r5
+
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_ADDR_CTRL_PADS_CAL_REG)
+
+
+        /* DDR SDRAM Data Pads Calibration                              */
+        MV_REG_READ_ASM (r6, r5, SDRAM_DATA_PADS_CAL_REG)
+
+        /* Set Bit [31] to make the register writable                   */
+        orr   r8, r6, #SDRAM_WR_EN
+
+        MV_REG_WRITE_ASM (r8, r5, SDRAM_DATA_PADS_CAL_REG)
+
+        bic   r6, r6, #SDRAM_WR_EN      /* Make register read-only      */
+        bic   r6, r6, #SDRAM_TUNE_EN    /* Disable auto calibration     */
+        bic   r6, r6, #SDRAM_DRVN_MASK  /* Clear r5[5:0]<DrvN>          */
+        bic   r6, r6, #SDRAM_DRVP_MASK  /* Clear r5[11:6]<DrvP>         */
+
+        /* Get the final N locked value of driving strength [22:17]     */
+        mov   r5, r6
+        mov   r5, r5, LSL #9
+        mov   r5, r5, LSR #26
+        orr   r5, r5, r5, LSL #6 /* r5[5:0] = r6[22:17]<LockN>  */
+
+        /* Write to both <DrvN> bits [5:0] and <DrvP> bits [11:6]       */
+        orr   r6, r6, r5
+
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_DATA_PADS_CAL_REG)
+
+glMem2End:
+        /* Implement Guideline (GL# MEM-3) Drive Strength Value         */
+        /* Relevant for: 88F5181-A1/B0/B1 and 88F5281-A0/B0             */
+
+        /* Get SDRAM Config value */
+        MV_REG_READ_ASM (r8, r5, SDRAM_CONFIG_REG)
+
+        /* Get DIMM type */
+        tst     r8, #SDRAM_DTYPE_DDR2
+        beq     ddr1StrengthVal
+
+ddr2StrengthVal:
+        ldr     r4, =DDR2_ADDR_CTRL_PAD_STRENGTH_TYPICAL_DV
+        ldr     r8, =DDR2_DATA_PAD_STRENGTH_TYPICAL_DV
+        b       setDrvStrength
+ddr1StrengthVal:
+        ldr     r4, =DDR1_ADDR_CTRL_PAD_STRENGTH_TYPICAL_DV
+        ldr     r8, =DDR1_DATA_PAD_STRENGTH_TYPICAL_DV
+
+setDrvStrength:
+        /* DDR SDRAM Address/Control Pads Calibration                   */
+        MV_REG_READ_ASM (r6, r5, SDRAM_ADDR_CTRL_PADS_CAL_REG)
+
+        orr   r6, r6, #SDRAM_WR_EN      /* Make register writeable      */
+
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_ADDR_CTRL_PADS_CAL_REG)
+        HTOLL(r6,r5)
+
+        bic   r6, r6, #SDRAM_WR_EN      /* Make register read-only      */
+        bic   r6, r6, #SDRAM_PRE_DRIVER_STRENGTH_MASK
+        orr   r6, r4, r6                /* Set default value for DDR    */
+
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_ADDR_CTRL_PADS_CAL_REG)
+
+
+        /* DDR SDRAM Data Pads Calibration                              */
+        MV_REG_READ_ASM (r6, r5, SDRAM_DATA_PADS_CAL_REG)
+
+        orr   r6, r6, #SDRAM_WR_EN      /* Make register writeable      */
+
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_DATA_PADS_CAL_REG)
+        HTOLL(r6,r5)
+
+        bic   r6, r6, #SDRAM_WR_EN      /* Make register read-only      */
+        bic   r6, r6, #SDRAM_PRE_DRIVER_STRENGTH_MASK
+        orr   r6, r8, r6                /* Set default value for DDR    */
+
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_DATA_PADS_CAL_REG)
+
+
+        /* Implement Guideline (GL# MEM-4) DQS Reference Delay Tuning   */
+        /* Relevant for: 88F5181-A1/B0/B1 and 88F5281-A0/B0             */
+        /* Get the "sample on reset" register for the DDR frequancy     */
+
+#if defined(MV_RUN_FROM_FLASH)
+	/* Calc the absolute address of the _cpuARMDDRCLK[] in the boot flash */
+	ldr   r7, = _cpuARMDDRCLK
+	ldr	r4, =_start
+	ldr	r4, [r4]
+	sub   r7, r7, r4
+         ldr   r4, = Lrom_start_of_data
+         ldr	r4, [r4]
+         add   r7, r4, r7
+#else
+	/* Calc the absolute address of the _cpuARMDDRCLK[] in the boot flash */
+	ldr     r7, = _cpuARMDDRCLK
+	ldr	r4, =_start
+	sub     r7, r7, r4
+	add	r7, r7, #CFG_MONITOR_BASE
+#endif
+        /* Get the "sample on reset" register for the DDR frequancy     */
+        MV_REG_READ_ASM (r4, r5, MPP_SAMPLE_AT_RESET)
+        ldr     r5, =MSAR_ARMDDRCLCK_MASK
+        and     r5, r4, r5
+#if 0 /* YOTAM TO BE FIX */
+	mov    r5, r5, LSR #MSAR_ARMDDRCLCK_OFFS
+#endif
+
+	/* Read device ID  */
+	MV_CTRL_MODEL_GET_ASM(r6, r8);
+
+        /* Continue if TC90 */
+        ldr     r8, =MV_1281_DEV_ID
+        cmp     r6, r6
+        beq     armClkMsb
+
+        /* Continue if Orion2 */
+        ldr     r8, =MV_5281_DEV_ID
+        cmp     r6, r8
+#if 0 /* YOTAM TO BE FIX */
+        bne     1f
+#endif
+
+armClkMsb:
+#if 0 /* YOTAM TO BE FIX */
+        tst    r4, #MSAR_ARMDDRCLCK_H_MASK
+        beq    1f
+        orr    r5, r5, #BIT4
+1:
+	ldr    r4, =MV_CPU_ARM_CLK_ELM_SIZE
+	mul    r5, r4, r5
+	add    r7, r7, r5
+	add    r7, r7, #MV_CPU_ARM_CLK_DDR_OFF
+	ldr    r5, [r7]
+#endif
+
+        /* Get SDRAM Config value */
+        MV_REG_READ_ASM (r8, r4, SDRAM_CONFIG_REG)
+
+        /* Get DIMM type */
+        tst     r8, #SDRAM_DTYPE_DDR2
+        beq     ddr1FtdllVal
+
+ddr2FtdllVal:
+        ldr    r4, =FTDLL_DDR2_250MHZ
+	ldr    r7, =_250MHz
+        cmp    r5, r7
+        beq    setFtdllReg
+        ldr     r4, =FTDLL_DDR2_200MHZ
+	ldr    r7, =_200MHz
+        cmp    r5, r7
+        beq    setFtdllReg
+        ldr     r4, =FTDLL_DDR2_166MHZ
+	ldr    r7, =_166MHz
+        cmp    r5, r7
+        beq    setFtdllReg
+        ldr     r4, =FTDLL_DDR2_133MHZ
+        b       setFtdllReg
+
+ddr1FtdllVal:
+        ldr    r4, =FTDLL_DDR1_200MHZ
+	ldr    r7, =_200MHz
+        cmp    r5, r7
+        beq    setFtdllReg
+        ldr    r4, =FTDLL_DDR1_166MHZ
+	ldr    r7, =_166MHz
+        cmp    r5, r7
+        beq    setFtdllReg
+        ldr    r4, =FTDLL_DDR1_133MHZ
+	ldr    r7, =_133MHz
+        cmp    r5, r7
+        beq    setFtdllReg
+        ldr    r4, =0
+
+setFtdllReg:
+
+#if !defined(MV_88W8660) && !defined(MV_88F6183) && !defined(MV_88F6183L)
+        MV_REG_READ_ASM (r8, r5, SDRAM_FTDLL_CONFIG_REG)
+        orr    r8, r8, r4
+        MV_REG_WRITE_ASM (r8, r5, SDRAM_FTDLL_CONFIG_REG)
+        bic   r8, r8, #1
+        MV_REG_WRITE_ASM (r8, r5, SDRAM_FTDLL_CONFIG_REG)
+#endif /* !defined(MV_88W8660) && !defined(MV_88F6183) && !defined(MV_88F6183L)*/
+
+
+setTimingReg:
+        /* Set default Timing parameters */
+        MV_REG_READ_ASM (r8, r5, SDRAM_CONFIG_REG)
+        tst     r8, #SDRAM_DTYPE_DDR2
+        bne     ddr2TimeParam
+
+ddr1TimeParam:
+        ldr     r6, =DDR1_TIMING_LOW_DV
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_TIMING_CTRL_LOW_REG)
+        ldr     r6, =DDR1_TIMING_HIGH_DV
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_TIMING_CTRL_HIGH_REG)
+        b       timeParamDone
+
+ddr2TimeParam:
+        ldr     r6, =DDR2_TIMING_LOW_DV
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_TIMING_CTRL_LOW_REG)
+        ldr     r6, =DDR2_TIMING_HIGH_DV
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_TIMING_CTRL_HIGH_REG)
+
+timeParamDone:
+        /* Open CS[0] window to requested size and enable it. Disable other   */
+	/* windows 							      */
+        ldr	r6, =SCBAR_BASE_MASK
+        sub     r3, r3, #1
+        and	r3, r3, r6
+	orr	r3, r3, #1	/* Enable bank */
+        MV_REG_WRITE_ASM (r3, r5, SDRAM_SIZE_REG(0))
+        ldr	r6, =0
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_SIZE_REG(1))
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_SIZE_REG(2))
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_SIZE_REG(3))
+
+exit_ddrAutoConfig:
+        mov     PC, r11         /* r11 is saved link register */
+
+
+/***************************************************************************************/
+/*       r4 holds I2C EEPROM address
+ *       r7 holds I2C EEPROM offset parameter for i2cRead and its --> returned value
+ *       r8 holds SDRAM various configuration registers value.
+ *	r13 holds Link register
+ */
+/**************************/
+_getDensity:
+	mov     r13, LR                            /* Save link register */
+
+        mov     r4, #MV_BOARD_DIMM0_I2C_ADDR       /* reading from DIMM0      */
+        mov     r7, #NUM_OF_ROWS_OFFSET            /* offset  3               */
+        bl      _i2cRead
+        mov     r8, r7                             /* r8 save number of rows  */
+
+        mov     r4, #MV_BOARD_DIMM0_I2C_ADDR       /* reading from DIMM0      */
+        mov     r7, #NUM_OF_COLS_OFFSET            /* offset  4               */
+        bl      _i2cRead
+        add     r8, r8, r7                         /* r8 = number of rows + number of col */
+
+        mov     r7, #0x1
+        mov     r8, r7, LSL r8                     /* r8 = (1 << r8)          */
+
+        mov     r4, #MV_BOARD_DIMM0_I2C_ADDR       /* reading from DIMM0      */
+        mov     r7, #SDRAM_WIDTH_OFFSET            /* offset 13 */
+        bl      _i2cRead
+        mul     r8, r7, r8
+
+        mov     r4, #MV_BOARD_DIMM0_I2C_ADDR       /* reading from DIMM0      */
+        mov     r7, #NUM_OF_BANKS_OFFSET           /* offset 17               */
+        bl      _i2cRead
+        mul     r7, r8, r7
+
+	mov     PC, r13
+
+/**************************/
+_get_width:
+	mov     r13, LR                 /* Save link register */
+
+        /* Get SDRAM width (SPD offset 13) */
+        mov     r4, #MV_BOARD_DIMM0_I2C_ADDR /* reading from DIMM0            */
+        mov     r7, #SDRAM_WIDTH_OFFSET
+        bl      _i2cRead                /* result in r7                       */
+
+	mov     PC, r13
+
+/**************************/
+_get_CAL:
+	mov     r13, LR                 /* Save link register */
+
+        /* Set maximum CL supported by DIMM */
+        mov     r4, #MV_BOARD_DIMM0_I2C_ADDR /* reading from DIMM0            */
+        mov     r7, #SUPPORTED_CL_OFFSET     /* offset  18 */
+        bl      _i2cRead
+
+	mov     PC, r13
+
+/**************************/
+/* R8 - sdram configuration register.
+ * Return value in flag if no-registered then Z-flag is set
+ */
+_is_Registered:
+	mov     r13, LR                 /* Save link register */
+
+        /* Get registered/non registered info from DIMM */
+        tst     r8, #SDRAM_DTYPE_DDR2
+        bne     regDdr2
+
+regDdr1:
+        mov     r4, #MV_BOARD_DIMM0_I2C_ADDR /* reading from DIMM0            */
+        mov     r7, #SDRAM_MODULES_ATTR_OFFSET
+        bl      _i2cRead                /* result in r7                       */
+        tst     r7, #0x2
+	b	exit
+regDdr2:
+        mov     r4, #MV_BOARD_DIMM0_I2C_ADDR /* reading from DIMM0            */
+        mov     r7, #DIMM_TYPE_INFO_OFFSET
+        bl      _i2cRead                /* result in r7                       */
+        tst     r7, #0x11               /* DIMM type = regular RDIMM (0x01)   */
+                                        /* or Mini-RDIMM (0x10)               */
+exit:
+        mov     PC, r13
+
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddr2/mvDramIfConfig.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddr2/mvDramIfConfig.h
@@ -0,0 +1,155 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#ifndef __INCmvDramIfConfigh
+#define __INCmvDramIfConfigh
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/* includes */
+
+/* defines  */
+
+/* registers defaults values */
+
+#define SDRAM_CONFIG_DV 	(SDRAM_SRMODE_DRAM | BIT25 | BIT30)
+
+#define SDRAM_DUNIT_CTRL_LOW_DDR2_DV			\
+		(SDRAM_SRCLK_KEPT		|	\
+		 SDRAM_CLK1DRV_NORMAL		|	\
+		 (BIT28 | BIT29))
+
+#define SDRAM_ADDR_CTRL_DV	    2
+		
+#define SDRAM_TIMING_CTRL_LOW_REG_DV 	\
+		((0x2 << SDRAM_TRCD_OFFS) | 	\
+		 (0x2 << SDRAM_TRP_OFFS)  | 	\
+		 (0x1 << SDRAM_TWR_OFFS)  | 	\
+		 (0x0 << SDRAM_TWTR_OFFS) | 	\
+		 (0x5 << SDRAM_TRAS_OFFS) | 	\
+		 (0x1 << SDRAM_TRRD_OFFS))
+
+/* Note: value of 0 in register means one cycle, 1 means two and so on  */
+#define SDRAM_TIMING_CTRL_HIGH_REG_DV 	\
+		((0x0 << SDRAM_TR2R_OFFS)	|	\
+		 (0x0 << SDRAM_TR2W_W2R_OFFS)	|	\
+		 (0x1 << SDRAM_TW2W_OFFS))
+
+#define SDRAM_OPEN_PAGES_CTRL_REG_DV 	SDRAM_OPEN_PAGE_EN	
+
+/* Presence	     Ctrl Low    Ctrl High  Dunit Ctrl   Ext Mode     */
+/* CS0              0x84210000  0x00000000  0x0000780F  0x00000440    */
+/* CS0+CS1          0x84210000  0x00000000  0x0000780F  0x00000440    */
+/* CS0+CS2          0x030C030C  0x00000000  0x0000740F  0x00000404    */
+/* CS0+CS1+CS2      0x030C030C  0x00000000  0x0000740F  0x00000404    */
+/* CS0+CS2+CS3      0x030C030C  0x00000000  0x0000740F  0x00000404    */
+/* CS0+CS1+CS2+CS3  0x030C030C  0x00000000  0x0000740F  0x00000404    */
+
+#define DDR2_ODT_CTRL_LOW_CS0_CS1_DV		0x84210000
+#define DDR2_ODT_CTRL_HIGH_CS0_CS1_DV		0x00000000
+#define DDR2_DUNIT_ODT_CTRL_CS0_CS1_DV		0x0000E80F
+#ifdef MV78XX0
+#define DDR_SDRAM_EXT_MODE_CS0_CS1_DV		0x00000040
+#else
+#define DDR_SDRAM_EXT_MODE_CS0_CS1_DV		0x00000440
+#endif
+
+#define DDR2_ODT_CTRL_LOW_CS0_CS1_CS2_CS3_DV	0x030C030C
+#define DDR2_ODT_CTRL_HIGH_CS0_CS1_CS2_CS3_DV	0x00000000
+#define DDR2_DUNIT_ODT_CTRL_CS0_CS1_CS2_CS3_DV	0x0000FC0F
+#ifdef MV78XX0
+#define DDR_SDRAM_EXT_MODE_CS0_CS1_CS2_CS3_DV	0x00000004
+#define DDR_SDRAM_EXT_MODE_FAST_CS0_CS1_CS2_CS3_DV	0x00000044
+#else
+#define DDR_SDRAM_EXT_MODE_CS0_CS1_CS2_CS3_DV	0x00000404
+#define DDR_SDRAM_EXT_MODE_FAST_CS0_CS1_CS2_CS3_DV	0x00000444
+#endif
+
+/* DDR SDRAM Adderss/Control and Data Pads Calibration default values */
+#define DDR2_ADDR_CTRL_PAD_STRENGTH_TYPICAL_DV	\
+		(3 << SDRAM_PRE_DRIVER_STRENGTH_OFFS)
+		
+#define DDR2_DATA_PAD_STRENGTH_TYPICAL_DV		\
+		(3 << SDRAM_PRE_DRIVER_STRENGTH_OFFS)
+
+/* DDR SDRAM Mode Register default value */
+#define DDR2_MODE_REG_DV		(SDRAM_BURST_LEN_4 | SDRAM_WR_3_CYC)
+/* DDR SDRAM Timing parameter default values */
+#define DD2_SDRAM_TIMING_LOW_DV			0x85520
+#define DDR2_SDRAM_TIMING_HIGH_DV		0x8552
+#define SDRAM_TIMING_CTRL_LOW_REG_DEFAULT  	0x33136552
+#define SDRAM_TRFC_DEFAULT_VALUE		0x34
+#define SDRAM_TRFC_DEFAULT		SDRAM_TRFC_DEFAULT_VALUE
+#define SDRAM_TW2W_DEFALT		(0x1 << SDRAM_TW2W_OFFS)
+
+#define SDRAM_TIMING_CTRL_HIGH_REG_DEFAULT  (SDRAM_TRFC_DEFAULT | SDRAM_TW2W_DEFALT)
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* __INCmvDramIfh */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddr2/mvDramIfConfig.S
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddr2/mvDramIfConfig.S
@@ -0,0 +1,513 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+/*******************************************************************************
+* mvDramIfBasicAsm.s
+*
+* DESCRIPTION:
+*       Memory full detection and best timing configuration is done in 
+*       C code. C runtime environment requires a stack. This module API 
+*       initialize DRAM interface chip select 0 for basic functionality for 
+*       the use of stack.
+*       The module API assumes DRAM information is stored in I2C EEPROM reside
+*       in a given I2C address MV_BOARD_DIMM0_I2C_ADDR. The I2C EEPROM 
+*       internal data structure is assumed to be orgenzied in common DRAM 
+*       vendor SPD structure.
+*       NOTE: DFCDL values are assumed to be already initialized prior to 
+*       this module API activity.
+*       
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+/* includes */
+#define	_ASMLANGUAGE
+#define MV_ASMLANGUAGE
+#include "mvOsAsm.h"
+#include "mvSysHwConfig.h"
+#include "mvDramIfRegs.h"
+#include "mvDramIfConfig.h"
+#include "mvCpuIfRegs.h"
+#include "pex/mvPexRegs.h"
+#include "mvCtrlEnvSpec.h"
+#include "mvCommon.h"
+
+/* defines  */
+
+/* locals   */
+.data
+.globl _mvDramIfConfig
+.text
+.globl _mvDramIfMemInit
+
+/*******************************************************************************
+* _mvDramIfConfig - Basic DRAM interface initialization.
+*
+* DESCRIPTION:
+*       The function will initialize the following DRAM parameters using the
+*       values prepared by mvDramIfDetect routine. Values are located
+*       in predefined registers.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+
+_mvDramIfConfig:      
+        
+        /* Save register on stack */
+	cmp	sp, #0
+	beq	no_stack_s
+save_on_stack:
+        stmdb	sp!, {r1, r2, r3, r4}
+no_stack_s:
+
+	/* 1) Write to SDRAM coniguration register */
+        ldr     r1, =(INTER_REGS_BASE + DRAM_BUF_REG1)
+        ldr     r4, [r1]
+        ldr     r1, =(INTER_REGS_BASE + SDRAM_CONFIG_REG)
+        str     r4, [r1]
+        
+	/* 2) Write Dunit control low register */ 
+        ldr     r1, =(INTER_REGS_BASE + DRAM_BUF_REG3)
+        ldr     r4, [r1]
+        ldr     r1, =(INTER_REGS_BASE + SDRAM_DUNIT_CTRL_REG)
+        str     r4, [r1]
+        
+	/* 2) Write Dunit control high register */ 
+        ldr     r1, =(INTER_REGS_BASE + DRAM_BUF_REG13)
+        ldr     r4, [r1]
+        ldr     r1, =(INTER_REGS_BASE + SDRAM_DUNIT_CTRL_HI_REG)
+        str     r4, [r1]
+        
+        /* 3) Write SDRAM address control register */ 
+        ldr     r1, =(INTER_REGS_BASE + DRAM_BUF_REG4)
+        ldr     r4, [r1]
+        ldr     r1, =(INTER_REGS_BASE + SDRAM_ADDR_CTRL_REG)
+        str     r4, [r1]
+#if defined(MV_STATIC_DRAM_ON_BOARD)
+        /* 4) Write SDRAM bank 0 size register */
+        ldr     r1, =(INTER_REGS_BASE + DRAM_BUF_REG0)
+        ldr     r4, [r1]
+        ldr     r1, =(INTER_REGS_BASE + SDRAM_SIZE_REG(0,0))
+        str     r4, [r1]
+#endif
+                          
+        /* 5) Write SDRAM open pages control register */
+        ldr     r1, =(INTER_REGS_BASE + SDRAM_OPEN_PAGE_CTRL_REG)
+        ldr     r4, =SDRAM_OPEN_PAGES_CTRL_REG_DV
+        str     r4, [r1]
+                          
+        /* 6) Write SDRAM timing Low register */
+        ldr     r1, =(INTER_REGS_BASE + DRAM_BUF_REG5)
+        ldr     r4, [r1]
+        ldr     r1, =(INTER_REGS_BASE + SDRAM_TIMING_CTRL_LOW_REG)
+        str     r4, [r1]
+        
+        /* 7) Write SDRAM timing High register */
+        ldr     r1, =(INTER_REGS_BASE + DRAM_BUF_REG6)
+        ldr     r4, [r1]
+        ldr     r1, =(INTER_REGS_BASE + SDRAM_TIMING_CTRL_HIGH_REG)
+        str     r4, [r1]
+                
+        /* Config DDR2 On Die Termination (ODT) registers */
+        /* Write SDRAM DDR2 ODT control low register */
+        ldr     r1, =(INTER_REGS_BASE + DRAM_BUF_REG7)
+        ldr     r4, [r1]
+        ldr     r1, =(INTER_REGS_BASE + DDR2_SDRAM_ODT_CTRL_LOW_REG)
+        str     r4, [r1]
+        
+        /* Write SDRAM DDR2 ODT control high register */
+        ldr     r1, =(INTER_REGS_BASE + DRAM_BUF_REG8)
+        ldr     r4, [r1]
+        ldr     r1, =(INTER_REGS_BASE + DDR2_SDRAM_ODT_CTRL_HIGH_REG)
+        str     r4, [r1]
+        
+        /* Write SDRAM DDR2 Dunit ODT control register */
+        ldr     r1, =(INTER_REGS_BASE + DRAM_BUF_REG9)
+        ldr     r4, [r1]
+        ldr     r1, =(INTER_REGS_BASE + DDR2_DUNIT_ODT_CONTROL_REG)
+        str     r4, [r1]
+        
+        /* Write DDR2 SDRAM timing Low register */
+        ldr     r1, =(INTER_REGS_BASE + DRAM_BUF_REG11)
+        ldr     r4, [r1]
+        ldr     r1, =(INTER_REGS_BASE + SDRAM_DDR2_TIMING_LO_REG)
+        str     r4, [r1]
+                                   
+        /* Write DDR2 SDRAM timing High register */
+        ldr     r1, =(INTER_REGS_BASE + DRAM_BUF_REG12)
+        ldr     r4, [r1]
+        ldr     r1, =(INTER_REGS_BASE + SDRAM_DDR2_TIMING_HI_REG)
+        str     r4, [r1]
+
+        /* 8) Write SDRAM mode register */ 
+        /* The CPU must not attempt to change the SDRAM Mode register setting */
+        /* prior to DRAM controller completion of the DRAM initialization     */
+        /* sequence. To guarantee this restriction, it is recommended that    */
+        /* the CPU sets the SDRAM Operation register to NOP command, performs */
+        /* read polling until the register is back in Normal operation value, */
+        /* and then sets SDRAM Mode register to its new value.               */
+        
+	/* 8.1 write 'nop' to SDRAM operation */
+        mov     r4, #0x5                 /* 'NOP' command              */
+        MV_REG_WRITE_ASM(r4, r1, SDRAM_OPERATION_REG)
+       
+        /* 8.2 poll SDRAM operation. Make sure its back to normal operation   */
+_sdramOpPoll1:        
+        ldr     r4, [r1]
+        cmp     r4, #0                          /* '0' = Normal SDRAM Mode    */
+        bne     _sdramOpPoll1
+
+        /* 8.3 Now its safe to write new value to SDRAM Mode register         */
+        ldr     r1, =(INTER_REGS_BASE + DRAM_BUF_REG2)
+        ldr     r4, [r1]
+        ldr     r1, =(INTER_REGS_BASE + SDRAM_MODE_REG)
+        str     r4, [r1]
+
+        /* 8.4 Make the Dunit write the DRAM its new mode                     */       
+        mov     r4, #0x3                 /* Mode Register Set command  */
+        MV_REG_WRITE_ASM (r4, r1, SDRAM_OPERATION_REG)
+               
+        /* 8.5 poll SDRAM operation. Make sure its back to normal operation   */
+_sdramOpPoll2:        
+        ldr     r4, [r1]                     
+        cmp     r4, #0                          /* '0' = Normal SDRAM Mode    */
+        bne     _sdramOpPoll2
+
+        /* Now its safe to write new value to SDRAM Extended Mode regist */
+        ldr     r1, =(INTER_REGS_BASE + DRAM_BUF_REG10)
+        ldr     r4, [r1]
+        ldr     r1, =(INTER_REGS_BASE + SDRAM_EXTENDED_MODE_REG)
+        str     r4, [r1]
+
+        /* 9) Write SDRAM Extended mode register This operation should be     */
+        /*    done for each memory bank                                       */ 
+        /* write 'nop' to SDRAM operation */
+        mov     r4, #0x5                 /* 'NOP' command              */
+        MV_REG_WRITE_ASM (r4, r1, SDRAM_OPERATION_REG)
+       
+        /* poll SDRAM operation. Make sure its back to normal operation   */
+_sdramOpPoll3:        
+        ldr     r4, [r1]
+        cmp     r4, #0                          /* '0' = Normal SDRAM Mode    */
+        bne     _sdramOpPoll3
+        /* Go over each of the Banks */
+        ldr     r3, =0          /* r3 = DRAM bank Num */
+
+extModeLoop:        
+        /* Set the SDRAM Operation Control to each of the DRAM banks          */
+        mov     r4, r3   /* Do not swap the bank counter value */
+        MV_REG_WRITE_ASM (r4, r1, SDRAM_OPERATION_CTRL_REG)
+        
+        /* Make the Dunit write the DRAM its new mode                     */       
+        mov     r4, #0x4        /* Extended Mode Register Set command  */
+        MV_REG_WRITE_ASM (r4, r1, SDRAM_OPERATION_REG)
+               
+        /* poll SDRAM operation. Make sure its back to normal operation   */
+_sdramOpPoll4:        
+        ldr     r4, [r1]                     
+        cmp     r4, #0                          /* '0' = Normal SDRAM Mode    */
+        bne     _sdramOpPoll4
+
+        add     r3, r3, #1
+        cmp     r3, #4         /* 4 = Number of banks */
+        bne     extModeLoop
+        
+extModeEnd:	
+cmp	sp, #0
+	beq	no_stack_l
+	mov     r1, LR                        	/* Save link register */
+#if defined(MV78XX0)
+	bl   	_mvDramIfMemInit 
+#endif
+	mov	LR,r1				/* restore link register */
+load_from_stack:
+	/* Restore registers */
+        ldmia	sp!, {r1, r2, r3, r4}
+no_stack_l:
+           
+        mov     pc, lr
+
+
+/*******************************************************************************
+* _mvDramIfEccMemInit - Basic DRAM ECC initialization.
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+#define XOR_CHAN0         0   /* XOR channel 0 used for memory initialization */
+#define XOR_ADDR_DEC_WIN0 0   /* Enable DRAM access using XOR decode window 0 */ 
+/* XOR engine register offsets macros */
+#define XOR_CONFIG_REG(chan)                (XOR_UNIT_BASE(0) + 0x10 + ((chan)    * 4))
+#define XOR_ACTIVATION_REG(chan)            (XOR_UNIT_BASE(0) + 0x20 + ((chan)    * 4))
+#define XOR_CAUSE_REG			    (XOR_UNIT_BASE(0) + 0x30)
+#define XOR_ERROR_CAUSE_REG                 (XOR_UNIT_BASE(0) + 0x50)             
+#define XOR_ERROR_ADDR_REG                  (XOR_UNIT_BASE(0) + 0x60)             
+#define XOR_WINDOW_CTRL_REG(chan)           (XOR_UNIT_BASE(0) + 0x240 + ((chan)    * 4))
+#define XOR_BASE_ADDR_REG(winNum)     	    (XOR_UNIT_BASE(0) + 0x250 + ((winNum)  * 4))
+#define XOR_SIZE_MASK_REG(winNum)           (XOR_UNIT_BASE(0) + 0x270 + ((winNum)  * 4))
+#define XOR_INIT_VAL_LOW_REG                (XOR_UNIT_BASE(0) + 0x2E0)
+#define XOR_INIT_VAL_HIGH_REG               (XOR_UNIT_BASE(0) + 0x2E4)
+#define XOR_DST_PTR_REG(chan)               (XOR_UNIT_BASE(0) + 0x2B0 + ((chan)    * 4))
+#define XOR_BLOCK_SIZE_REG(chan)            (XOR_UNIT_BASE(0) + 0x2C0 + ((chan)    * 4))
+
+.globl _mvDramIfEccMemInit
+/*******************************************************************************
+* _mvDramIfEccMemInit  - mem init for dram cs
+*
+* DESCRIPTION:
+*       This function will clean the cs by ussing the XOR mem init.  
+*
+* INPUT:
+*       r0 - dram bank number.
+*
+* OUTPUT:
+*	none
+*/
+_mvDramIfEccMemInit:      
+        
+        /* Save register on stack */
+	cmp	sp, #0
+	beq	no_stack_s1
+save_on_stack1:
+        stmdb	sp!, {r0,r1, r2, r3, r4, r5, r6}
+no_stack_s1:
+
+	ldr	r1, = 0             
+
+        /* Disable all XOR address decode windows to avoid possible overlap */
+        MV_REG_WRITE_ASM (r1, r5, (XOR_WINDOW_CTRL_REG(XOR_CHAN0)))
+
+        /* Init r5 to first XOR_SIZE_MASK_REG */
+		mov		r5, r0, LSL #3
+        add     r5, r5,#0x1500
+        add     r5, r5,#0x04
+        add     r5, r5,#(INTER_REGS_BASE)
+        ldr     r6, [r5]
+        HTOLL(r6,r5)
+        MV_REG_WRITE_ASM (r6, r5, XOR_SIZE_MASK_REG(XOR_ADDR_DEC_WIN0))
+       
+	mov		r5, r0, LSL #3
+        add     r5, r5,#0x1500
+        add     r5, r5,#(INTER_REGS_BASE)
+        ldr     r6, [r5]
+        /* Update destination & size */
+        MV_REG_WRITE_ASM(r6, r5, XOR_DST_PTR_REG(XOR_CHAN0))
+        HTOLL(r6,r5)
+        /* Init r6 to first XOR_BASE_ADDR_REG */
+	ldr	r4, = 0xf              
+	ldr	r5, = 0x1
+	mov	r5, r5, LSL r0
+	bic	r4, r4, r5
+	mov 	r4, r4, LSL #8
+
+        orr	r6, r6, r4
+        MV_REG_WRITE_ASM (r6, r5, XOR_BASE_ADDR_REG(XOR_ADDR_DEC_WIN0))
+        
+	ldr	r6, = 0xff0001              
+        MV_REG_WRITE_ASM (r6, r5, XOR_WINDOW_CTRL_REG(XOR_CHAN0))        
+
+        /* Configure XOR engine for memory init function.           */
+        MV_REG_READ_ASM (r6, r5, XOR_CONFIG_REG(XOR_CHAN0))
+        and	r6, r6, #~0x7        	/* Clear operation mode field      */
+        orr     r6, r6, #0x4             /* Set operation to memory init    */
+        MV_REG_WRITE_ASM(r6, r5, XOR_CONFIG_REG(XOR_CHAN0))
+               
+        /* Set initVal in the XOR Engine Initial Value Registers       */
+	ldr	r6, = 0xfeedfeed              
+        MV_REG_WRITE_ASM(r6, r5, XOR_INIT_VAL_LOW_REG)
+	ldr	r6, = 0xfeedfeed              
+        MV_REG_WRITE_ASM(r6, r5, XOR_INIT_VAL_HIGH_REG)
+
+        /* Set block size using DRAM bank size  */
+
+	mov	r5, r0, LSL #3
+        add     r5, r5,#0x1500
+        add     r5, r5,#0x04
+        add     r5, r5,#(INTER_REGS_BASE)
+
+        ldr     r6, [r5]
+        HTOLL(r6,r5)
+	and	r6, r6, #SCSR_SIZE_MASK
+	mov	r5, r6, LSR #SCSR_SIZE_OFFS
+        add	r5, r5, #1
+	mov	r6, r5, LSL #SCSR_SIZE_OFFS
+        MV_REG_WRITE_ASM(r6, r5, XOR_BLOCK_SIZE_REG(XOR_CHAN0))
+        
+        /* Clean interrupt cause*/
+        MV_REG_WRITE_ASM(r1, r5, XOR_CAUSE_REG)
+
+        /* Clean error interrupt cause*/
+        MV_REG_READ_ASM(r6, r5, XOR_ERROR_CAUSE_REG)
+        MV_REG_READ_ASM(r6, r5, XOR_ERROR_ADDR_REG)
+
+        /* Start transfer */
+        MV_REG_READ_ASM (r6, r5, XOR_ACTIVATION_REG(XOR_CHAN0))
+        orr     r6, r6, #0x1 /* Preform start command      */
+        MV_REG_WRITE_ASM(r6, r5, XOR_ACTIVATION_REG(XOR_CHAN0))
+
+        /* Wait for engine to finish */
+waitForComplete:        
+        MV_REG_READ_ASM(r6, r5, XOR_CAUSE_REG)
+        and   	r6, r6, #2
+	cmp	r6, #0
+        beq     waitForComplete
+
+        /* Clear all error report registers */
+        MV_REG_WRITE_ASM(r1, r5, SDRAM_SINGLE_BIT_ERR_CNTR_REG)
+        MV_REG_WRITE_ASM(r1, r5, SDRAM_DOUBLE_BIT_ERR_CNTR_REG)
+
+        MV_REG_WRITE_ASM(r1, r5, SDRAM_ERROR_CAUSE_REG)
+
+	cmp	sp, #0
+	beq	no_stack_l1
+load_from_stack1:
+        ldmia	sp!, {r0, r1, r2, r3, r4, r5, r6}
+no_stack_l1:
+        mov     pc, lr
+
+
+/*******************************************************************************
+* mvDramIfMemInit - Use XOR to clear all memory.
+*
+* DESCRIPTION:
+*       Use assembler function _mvDramIfEccMemInit to fill all memory with FEADFEAD pattern.
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+#if defined(MV78XX0)
+
+_mvDramIfMemInit:
+        stmdb	sp!, {r0,r1, r2, r3, r4, r5, r6}
+	mov     r6, LR                 /* Save link register */
+    	/* Check if dram bank 0 has to be init for ECC */
+	MV_REG_READ_ASM (r0, r5, SDRAM_SIZE_REG(0,0))
+	and 	r3, r0, #SCSR_WIN_EN
+        cmp     r3, #0 
+	beq   	no_bank_0
+	MV_REG_READ_ASM(r0, r5,  SDRAM_BASE_ADDR_REG(0,0))
+        cmp     r0, #0 
+	beq   	no_bank_0
+	mov	r0,#0
+	bl	_mvDramIfEccMemInit
+
+no_bank_0:
+    	/* Check if dram bank 1 has to be init for ECC */
+        MV_REG_READ_ASM (r0, r5, SDRAM_SIZE_REG(0,1))
+	and 	r0, r0, #SCSR_WIN_EN
+        cmp     r0, #0 
+	beq   	no_bank_1
+	mov	r0,#1
+	bl	_mvDramIfEccMemInit
+no_bank_1:
+    	/* Check if dram bank 2 has to be init for ECC */
+    	MV_REG_READ_ASM (r0, r5, SDRAM_SIZE_REG(0,2))
+	and 	r0, r0, #SCSR_WIN_EN
+        cmp     r0, #0 
+	beq   	no_bank_2
+	MV_REG_READ_ASM(r0, r5,  SDRAM_BASE_ADDR_REG(0,2))
+        cmp     r0, #0 
+	beq   	no_bank_2
+	mov	r0,#2
+	bl	_mvDramIfEccMemInit
+
+no_bank_2:
+    	/* Check if dram bank 3 has to be init for ECC */
+	MV_REG_READ_ASM (r0, r5, SDRAM_SIZE_REG(0,3))
+	and 	r0, r0, #SCSR_WIN_EN
+	cmp     r0, #0 
+	beq   	no_bank_3
+	mov	r0,#3
+	bl	_mvDramIfEccMemInit
+no_bank_3:
+	mov     LR ,r6                /* restore link register */
+	ldmia	sp!, {r0, r1, r2, r3, r4, r5, r6}
+	mov     pc, lr
+#endif
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddr2/mvDramIfRegs.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddr2/mvDramIfRegs.h
@@ -0,0 +1,421 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCmvDramIfRegsh
+#define __INCmvDramIfRegsh
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/* DDR SDRAM Controller Address Decode Registers */
+ /* SDRAM CSn Base Address Register (SCBAR) */
+#define SDRAM_BASE_ADDR_REG(cpu,csNum)	(0x1500 + ((csNum) * 8) + ((cpu) * 0x70))
+#define SCBAR_BASE_OFFS			16 
+#define SCBAR_BASE_MASK			(0xffff << SCBAR_BASE_OFFS)
+#define SCBAR_BASE_ALIGNMENT		0x10000 
+
+/* SDRAM CSn Size Register (SCSR) */		  
+#define SDRAM_SIZE_REG(cpu,csNum)	(0x1504 + ((csNum) * 8) + ((cpu) * 0x70)) 
+#define SCSR_SIZE_OFFS			24
+#define SCSR_SIZE_MASK			(0xff << SCSR_SIZE_OFFS)
+#define SCSR_SIZE_ALIGNMENT		0x1000000
+#define SCSR_WIN_EN			BIT0
+
+/* configuration register */
+#define SDRAM_CONFIG_REG   		(DRAM_BASE + 0x1400)
+#define SDRAM_REFRESH_OFFS 		0
+#define SDRAM_REFRESH_MAX  		0x3FFF
+#define SDRAM_REFRESH_MASK 		(SDRAM_REFRESH_MAX << SDRAM_REFRESH_OFFS)
+#define SDRAM_DWIDTH_OFFS       	15
+#define SDRAM_DWIDTH_MASK       	(1 << SDRAM_DWIDTH_OFFS)
+#define SDRAM_DWIDTH_32BIT      	(0 << SDRAM_DWIDTH_OFFS)
+#define SDRAM_DWIDTH_64BIT      	(1 << SDRAM_DWIDTH_OFFS)
+#define SDRAM_REGISTERED   		(1 << 17)
+#define SDRAM_ECC_OFFS    		18
+#define SDRAM_ECC_MASK    		(1 << SDRAM_ECC_OFFS)
+#define SDRAM_ECC_DIS     		(0 << SDRAM_ECC_OFFS)
+#define SDRAM_ECC_EN        		(1 << SDRAM_ECC_OFFS)
+#define SDRAM_IERR_OFFS    		19
+#define SDRAM_IERR_MASK    		(1 << SDRAM_IERR_OFFS)
+#define SDRAM_IERR_REPORTE     		(0 << SDRAM_IERR_OFFS)
+#define SDRAM_IERR_IGNORE      		(1 << SDRAM_IERR_OFFS)
+#define SDRAM_SRMODE_OFFS       	24
+#define SDRAM_SRMODE_MASK       	(1 << SDRAM_SRMODE_OFFS)
+#define SDRAM_SRMODE_POWER      	(0 << SDRAM_SRMODE_OFFS)
+#define SDRAM_SRMODE_DRAM       	(1 << SDRAM_SRMODE_OFFS)
+
+/* dunit control low register */
+#define SDRAM_DUNIT_CTRL_REG  		(DRAM_BASE + 0x1404)
+#define SDRAM_2T_OFFS			4
+#define SDRAM_2T_MASK			(1 << SDRAM_2T_OFFS)
+#define SDRAM_2T_MODE			(1 << SDRAM_2T_OFFS)
+
+#define SDRAM_SRCLK_OFFS		5
+#define SDRAM_SRCLK_MASK		(1 << SDRAM_SRCLK_OFFS)
+#define SDRAM_SRCLK_KEPT		(0 << SDRAM_SRCLK_OFFS)
+#define SDRAM_SRCLK_GATED		(1 << SDRAM_SRCLK_OFFS)
+#define SDRAM_CTRL_POS_OFFS	   	6
+#define SDRAM_CTRL_POS_MASK		(1 << SDRAM_CTRL_POS_OFFS)
+#define SDRAM_CTRL_POS_FALL	   	(0 << SDRAM_CTRL_POS_OFFS)
+#define SDRAM_CTRL_POS_RISE	   	(1 << SDRAM_CTRL_POS_OFFS)
+#define SDRAM_CLK1DRV_OFFS      	12
+#define SDRAM_CLK1DRV_MASK      	(1 << SDRAM_CLK1DRV_OFFS)
+#define SDRAM_CLK1DRV_HIGH_Z    	(0 << SDRAM_CLK1DRV_OFFS)
+#define SDRAM_CLK1DRV_NORMAL    	(1 << SDRAM_CLK1DRV_OFFS)
+#define SDRAM_CLK2DRV_OFFS      	13
+#define SDRAM_CLK2DRV_MASK      	(1 << SDRAM_CLK2DRV_OFFS)
+#define SDRAM_CLK2DRV_HIGH_Z    	(0 << SDRAM_CLK2DRV_OFFS)
+#define SDRAM_CLK2DRV_NORMAL    	(1 << SDRAM_CLK2DRV_OFFS)
+#define SDRAM_SB_OUT_DEL_OFFS 		20
+#define SDRAM_SB_OUT_DEL_MAX 		0xf
+#define SDRAM_SB_OUT_MASK 		(SDRAM_SB_OUT_DEL_MAX<<SDRAM_SB_OUT_DEL_OFFS)
+#define SDRAM_SB_IN_DEL_OFFS 		24
+#define SDRAM_SB_IN_DEL_MAX 		0xf
+#define SDRAM_SB_IN_MASK 		(SDRAM_SB_IN_DEL_MAX<<SDRAM_SB_IN_DEL_OFFS)
+
+/* dunit control hight register */
+#define SDRAM_DUNIT_CTRL_HI_REG  	(DRAM_BASE + 0x1424)
+#define SDRAM__D2P_OFFS			7
+#define SDRAM__D2P_EN			(1 << SDRAM__D2P_OFFS)
+#define SDRAM__P2D_OFFS			8
+#define SDRAM__P2D_EN			(1 << SDRAM__P2D_OFFS)
+#define SDRAM__ADD_HALF_FCC_OFFS	9
+#define SDRAM__ADD_HALF_FCC_EN		(1 << SDRAM__ADD_HALF_FCC_OFFS)
+#define SDRAM__PUP_ZERO_SKEW_OFFS	10
+#define SDRAM__PUP_ZERO_SKEW_EN		(1 << SDRAM__PUP_ZERO_SKEW_OFFS)
+#define SDRAM__WR_MESH_DELAY_OFFS	11
+#define SDRAM__WR_MESH_DELAY_EN		(1 << SDRAM__WR_MESH_DELAY_OFFS)
+
+/* sdram timing control low register */
+#define SDRAM_TIMING_CTRL_LOW_REG	(DRAM_BASE + 0x1408)
+#define SDRAM_TRCD_OFFS 		4
+#define SDRAM_TRCD_MASK 		(0xF << SDRAM_TRCD_OFFS)
+#define SDRAM_TRP_OFFS 			8
+#define SDRAM_TRP_MASK 			(0xF << SDRAM_TRP_OFFS)
+#define SDRAM_TWR_OFFS 			12
+#define SDRAM_TWR_MASK 			(0xF << SDRAM_TWR_OFFS)
+#define SDRAM_TWTR_OFFS 		16
+#define SDRAM_TWTR_MASK 		(0xF << SDRAM_TWTR_OFFS)
+#define SDRAM_TRAS_OFFS 		0
+#define SDRAM_TRAS_MASK 		(0xF << SDRAM_TRAS_OFFS)
+#define SDRAM_EXT_TRAS_OFFS 		20
+#define SDRAM_EXT_TRAS_MASK 		(0x1 << SDRAM_EXT_TRAS_OFFS)
+#define SDRAM_TRRD_OFFS 		24
+#define SDRAM_TRRD_MASK 		(0xF << SDRAM_TRRD_OFFS)
+#define SDRAM_TRTP_OFFS			28
+#define SDRAM_TRTP_MASK			(0xF << SDRAM_TRTP_OFFS)
+#define SDRAM_TRTP_DDR1 		(0x1 << SDRAM_TRTP_OFFS)
+
+/* sdram timing control high register */
+#define SDRAM_TIMING_CTRL_HIGH_REG	(DRAM_BASE + 0x140c)
+#define SDRAM_TRFC_OFFS 		0
+#define SDRAM_TRFC_MASK 		(0x3F << SDRAM_TRFC_OFFS)
+#define SDRAM_TR2R_OFFS 		7
+#define SDRAM_TR2R_MASK 		(0x3 << SDRAM_TR2R_OFFS)
+#define SDRAM_TR2W_W2R_OFFS		9
+#define SDRAM_TR2W_W2R_MASK		(0x3 << SDRAM_TR2W_W2R_OFFS)
+#define SDRAM_TW2W_OFFS			11
+#define SDRAM_TW2W_MASK			(0x3 << SDRAM_TW2W_OFFS)
+
+/* sdram DDR2 timing low register (SD2TLR) */
+#define SDRAM_DDR2_TIMING_LO_REG	(DRAM_BASE + 0x1428)
+#define SD2TLR_TODT_ON_RD_OFFS		4
+#define SD2TLR_TODT_ON_RD_MASK		(0xF << SD2TLR_TODT_ON_RD_OFFS)
+#define SD2TLR_TODT_OFF_RD_OFFS		8
+#define SD2TLR_TODT_OFF_RD_MASK		(0xF << SD2TLR_TODT_OFF_RD_OFFS)
+#define SD2TLR_TODT_ON_CTRL_RD_OFFS	12
+#define SD2TLR_TODT_ON_CTRL_RD_MASK	(0xF << SD2TLR_TODT_ON_CTRL_RD_OFFS)
+#define SD2TLR_TODT_OFF_CTRL_RD_OFFS	16
+#define SD2TLR_TODT_OFF_CTRL_RD_MASK	(0xF << SD2TLR_TODT_OFF_CTRL_RD_OFFS)
+
+/* sdram DDR2 timing high register (SD2TLR) */
+#define SDRAM_DDR2_TIMING_HI_REG	(DRAM_BASE + 0x147C)
+#define SD2THR_TODT_ON_WR_OFFS		0
+#define SD2THR_TODT_ON_WR_MASK		(0xF << SD2THR_TODT_ON_WR_OFFS)
+#define SD2THR_TODT_OFF_WR_OFFS		4
+#define SD2THR_TODT_OFF_WR_MASK		(0xF << SD2THR_TODT_OFF_WR_OFFS)
+#define SD2THR_TODT_ON_CTRL_WR_OFFS	8
+#define SD2THR_TODT_ON_CTRL_WR_MASK	(0xF << SD2THR_TODT_ON_CTRL_WR_OFFS)
+#define SD2THR_TODT_OFF_CTRL_WR_OFFS	12
+#define SD2THR_TODT_OFF_CTRL_WR_MASK	(0xF << SD2THR_TODT_OFF_CTRL_WR_OFFS)
+
+/* address control register */
+#define SDRAM_ADDR_CTRL_REG		(DRAM_BASE + 0x1410)
+#define SDRAM_ADDRSEL_OFFS(cs)		(4 * (cs))
+#define SDRAM_ADDRSEL_MASK(cs)		(0x3 << SDRAM_ADDRSEL_OFFS(cs))
+#define SDRAM_ADDRSEL_X8(cs)		(0x0 << SDRAM_ADDRSEL_OFFS(cs))
+#define SDRAM_ADDRSEL_X16(cs)		(0x1 << SDRAM_ADDRSEL_OFFS(cs))
+#define SDRAM_DSIZE_OFFS(cs)   	    	(2 + 4 * (cs))
+#define SDRAM_DSIZE_MASK(cs)   	    	(0x3 << SDRAM_DSIZE_OFFS(cs))
+#define SDRAM_DSIZE_256Mb(cs) 	    	(0x1 << SDRAM_DSIZE_OFFS(cs))
+#define SDRAM_DSIZE_512Mb(cs)  	    	(0x2 << SDRAM_DSIZE_OFFS(cs))
+#define SDRAM_DSIZE_1Gb(cs)  	    	(0x3 << SDRAM_DSIZE_OFFS(cs))
+#define SDRAM_DSIZE_2Gb(cs)  	    	(0x0 << SDRAM_DSIZE_OFFS(cs))
+
+/* SDRAM Open Pages Control registers */
+#define SDRAM_OPEN_PAGE_CTRL_REG	(DRAM_BASE + 0x1414)
+#define SDRAM_OPEN_PAGE_EN			(0 << 0)
+#define SDRAM_OPEN_PAGE_DIS			(1 << 0)
+
+/* sdram opertion register */
+#define SDRAM_OPERATION_REG 		(DRAM_BASE + 0x1418)
+#define SDRAM_CMD_OFFS  			0
+#define SDRAM_CMD_MASK   			(0xF << SDRAM_CMD_OFFS)
+#define SDRAM_CMD_NORMAL 			(0x0 << SDRAM_CMD_OFFS)
+#define SDRAM_CMD_PRECHARGE_ALL 	(0x1 << SDRAM_CMD_OFFS)
+#define SDRAM_CMD_REFRESH_ALL 		(0x2 << SDRAM_CMD_OFFS)
+#define SDRAM_CMD_REG_SET_CMD 		(0x3 << SDRAM_CMD_OFFS)
+#define SDRAM_CMD_EXT_MODE_SET 		(0x4 << SDRAM_CMD_OFFS)
+#define SDRAM_CMD_NOP 				(0x5 << SDRAM_CMD_OFFS)
+#define SDRAM_CMD_SLF_RFRSH 		(0x7 << SDRAM_CMD_OFFS)
+#define SDRAM_CMD_EMRS2_CMD  		(0x8 << SDRAM_CMD_OFFS)
+#define SDRAM_CMD_EMRS3_CMD  		(0x9 << SDRAM_CMD_OFFS)
+
+/* sdram mode register */
+#define SDRAM_MODE_REG 				(DRAM_BASE + 0x141c)
+#define SDRAM_BURST_LEN_OFFS 		0
+#define SDRAM_BURST_LEN_MASK 		(0x7 << SDRAM_BURST_LEN_OFFS)
+#define SDRAM_BURST_LEN_4    		(0x2 << SDRAM_BURST_LEN_OFFS)
+#define SDRAM_CL_OFFS   			4
+#define SDRAM_CL_MASK   			(0x7 << SDRAM_CL_OFFS)
+#define SDRAM_DDR2_CL_3      		(0x3 << SDRAM_CL_OFFS)
+#define SDRAM_DDR2_CL_4      		(0x4 << SDRAM_CL_OFFS)
+#define SDRAM_DDR2_CL_5    		    (0x5 << SDRAM_CL_OFFS)
+#define SDRAM_DDR2_CL_6    		    (0x6 << SDRAM_CL_OFFS)
+
+#define SDRAM_TM_OFFS           	7
+#define SDRAM_TM_MASK           	(1 << SDRAM_TM_OFFS)
+#define SDRAM_TM_NORMAL         	(0 << SDRAM_TM_OFFS)
+#define SDRAM_TM_TEST_MODE      	(1 << SDRAM_TM_OFFS)
+#define SDRAM_DLL_OFFS         		8
+#define SDRAM_DLL_MASK          	(1 << SDRAM_DLL_OFFS)
+#define SDRAM_DLL_NORMAL        	(0 << SDRAM_DLL_OFFS)
+#define SDRAM_DLL_RESET 			(1 << SDRAM_DLL_OFFS)
+#define SDRAM_WR_OFFS				9
+#define SDRAM_WR_MAX				7
+#define SDRAM_WR_MASK				(SDRAM_WR_MAX << SDRAM_WR_OFFS)
+#define SDRAM_WR_2_CYC				(1 << SDRAM_WR_OFFS)
+#define SDRAM_WR_3_CYC				(2 << SDRAM_WR_OFFS)
+#define SDRAM_WR_4_CYC				(3 << SDRAM_WR_OFFS)
+#define SDRAM_WR_5_CYC				(4 << SDRAM_WR_OFFS)
+#define SDRAM_WR_6_CYC				(5 << SDRAM_WR_OFFS)
+#define SDRAM_PD_OFFS				12
+#define SDRAM_PD_MASK				(1 << SDRAM_PD_OFFS) 
+#define SDRAM_PD_FAST_EXIT			(0 << SDRAM_PD_OFFS) 
+#define SDRAM_PD_SLOW_EXIT			(1 << SDRAM_PD_OFFS) 
+
+/* DDR SDRAM Extended Mode register (DSEMR) */
+#define SDRAM_EXTENDED_MODE_REG		(DRAM_BASE + 0x1420)
+#define DSEMR_DLL_ENABLE			0
+#define DSEMR_DLL_DISABLE			1
+#define DSEMR_DS_OFFS				1
+#define DSEMR_DS_MASK				(1 << DSEMR_DS_OFFS)
+#define DSEMR_DS_NORMAL				(0 << DSEMR_DS_OFFS)
+#define DSEMR_DS_REDUCED			(1 << DSEMR_DS_OFFS)
+#define DSEMR_QOFF_OUTPUT_BUFF_EN	(0 << 12)
+#define DSEMR_RTT0_OFFS				2
+#define DSEMR_RTT1_OFFS				6
+#define DSEMR_RTT_ODT_DISABLE		((0 << DSEMR_RTT0_OFFS)||(0 << DSEMR_RTT1_OFFS))
+#define DSEMR_RTT_ODT_75_OHM		((1 << DSEMR_RTT0_OFFS)||(0 << DSEMR_RTT1_OFFS))
+#define DSEMR_RTT_ODT_150_OHM		((0 << DSEMR_RTT0_OFFS)||(1 << DSEMR_RTT1_OFFS))
+#define DSEMR_RTT_ODT_50_OHM		((1 << DSEMR_RTT0_OFFS)||(1 << DSEMR_RTT1_OFFS))
+#define DSEMR_DQS_OFFS				10
+#define DSEMR_DQS_MASK				(1 << DSEMR_DQS_OFFS)
+#define DSEMR_DQS_DIFFERENTIAL		(0 << DSEMR_DQS_OFFS)
+#define DSEMR_DQS_SINGLE_ENDED		(1 << DSEMR_DQS_OFFS)
+#define DSEMR_RDQS_ENABLE			(1 << 11)
+#define DSEMR_QOFF_OUTPUT_BUFF_EN	(0 << 12)
+#define DSEMR_QOFF_OUTPUT_BUFF_DIS	(1 << 12)
+
+/* DDR SDRAM Operation Control Register */
+#define SDRAM_OPERATION_CTRL_REG	(DRAM_BASE + 0x142c)
+
+/* Dunit FTDLL Configuration Register */
+#define SDRAM_FTDLL_CONFIG_REG		(DRAM_BASE + 0x1484)
+  
+/* Pads Calibration register */
+#define SDRAM_ADDR_CTRL_PADS_CAL_REG	(DRAM_BASE + 0x14c0)
+#define SDRAM_DATA_PADS_CAL_REG		    (DRAM_BASE + 0x14c4)
+#define SDRAM_DRVN_OFFS 			0
+#define SDRAM_DRVN_MASK 			(0x3F << SDRAM_DRVN_OFFS)
+#define SDRAM_DRVP_OFFS 			6
+#define SDRAM_DRVP_MASK 			(0x3F << SDRAM_DRVP_OFFS)
+#define SDRAM_PRE_DRIVER_STRENGTH_OFFS		12
+#define SDRAM_PRE_DRIVER_STRENGTH_MASK		(3 << SDRAM_PRE_DRIVER_STRENGTH_OFFS)
+#define SDRAM_TUNE_EN   		BIT16
+#define SDRAM_LOCKN_OFFS 			17
+#define SDRAM_LOCKN_MAKS 			(0x3F << SDRAM_LOCKN_OFFS)
+#define SDRAM_LOCKP_OFFS 			23
+#define SDRAM_LOCKP_MAKS 			(0x3F << SDRAM_LOCKP_OFFS)
+#define SDRAM_WR_EN     			(1 << 31)
+
+/* DDR2 SDRAM ODT Control (Low) Register (DSOCLR) */
+#define DDR2_SDRAM_ODT_CTRL_LOW_REG (DRAM_BASE + 0x1494)
+#define DSOCLR_ODT_RD_OFFS(odtNum)  (odtNum * 4)
+#define DSOCLR_ODT_RD_MASK(odtNum)  (0xf << DSOCLR_ODT_RD_OFFS(odtNum))
+#define DSOCLR_ODT_RD(odtNum, bank) ((1 << bank) << DSOCLR_ODT_RD_OFFS(odtNum))
+#define DSOCLR_ODT_WR_OFFS(odtNum)  (16 + (odtNum * 4))
+#define DSOCLR_ODT_WR_MASK(odtNum)  (0xf << DSOCLR_ODT_WR_OFFS(odtNum))
+#define DSOCLR_ODT_WR(odtNum, bank) ((1 << bank) << DSOCLR_ODT_WR_OFFS(odtNum))
+
+/* DDR2 SDRAM ODT Control (High) Register (DSOCHR) */
+#define DDR2_SDRAM_ODT_CTRL_HIGH_REG    	(DRAM_BASE + 0x1498)
+/* Optional control values to DSOCHR_ODT_EN macro */
+#define DDR2_ODT_CTRL_DUNIT         0
+#define DDR2_ODT_CTRL_NEVER         1
+#define DDR2_ODT_CTRL_ALWAYS        3
+#define DSOCHR_ODT_EN_OFFS(odtNum)  (odtNum * 2)
+#define DSOCHR_ODT_EN_MASK(odtNum)  (0x3 << DSOCHR_ODT_EN_OFFS(odtNum))
+#define DSOCHR_ODT_EN(odtNum, ctrl) (ctrl << DSOCHR_ODT_EN_OFFS(odtNum))
+
+/* DDR2 Dunit ODT Control Register (DDOCR)*/
+#define DDR2_DUNIT_ODT_CONTROL_REG  (DRAM_BASE + 0x149c)
+#define DDOCR_ODT_RD_OFFS          	0
+#define DDOCR_ODT_RD_MASK           (0xf << DDOCR_ODT_RD_OFFS)
+#define DDOCR_ODT_RD(bank)          ((1 << bank) << DDOCR_ODT_RD_OFFS)
+#define DDOCR_ODT_WR_OFFS           4
+#define DDOCR_ODT_WR_MASK           (0xf << DDOCR_ODT_WR_OFFS)
+#define DDOCR_ODT_WR(bank)          ((1 << bank) << DDOCR_ODT_WR_OFFS)
+#define DSOCR_ODT_EN_OFFS           8
+#define DSOCR_ODT_EN_MASK           (0x3 << DSOCR_ODT_EN_OFFS)
+/* For ctrl parameters see DDR2 SDRAM ODT Control (High) Register (0x1498) above. */
+#define DSOCR_ODT_EN(ctrl)         	(ctrl << DSOCR_ODT_EN_OFFS)
+#define DSOCR_ODT_SEL_DISABLE	    0	
+#define DSOCR_ODT_SEL_75_OHM	    2	
+#define DSOCR_ODT_SEL_150_OHM	    1
+#define DSOCR_ODT_SEL_50_OHM        3
+#define DSOCR_DQ_ODT_SEL_OFFS       10
+#define DSOCR_DQ_ODT_SEL_MASK       (0x3 << DSOCR_DQ_ODT_SEL_OFFS)
+#define DSOCR_DQ_ODT_SEL(odtSel)    (odtSel << DSOCR_DQ_ODT_SEL_OFFS)
+#define DSOCR_ST_ODT_SEL_OFFS       12
+#define DSOCR_ST_ODT_SEL_MASK       (0x3 << DSOCR_ST_ODT_SEL_OFFS)
+#define DSOCR_ST_ODT_SEL(odtSel)    (odtSel << DSOCR_ST_ODT_SEL_OFFS)
+#define DSOCR_ST_ODT_EN             (1 << 14)
+
+/* DDR SDRAM Initialization Control Register (DSICR) */
+#define DDR_SDRAM_INIT_CTRL_REG	    (DRAM_BASE + 0x1480)
+#define DSICR_INIT_EN		    	(1 << 0)
+#define DSICR_T200_SET		    	(1 << 8)
+
+/* sdram extended mode2 register (SEM2R) */
+#define SDRAM_EXTENDED_MODE2_REG	(DRAM_BASE + 0x148C)
+#define SEM2R_EMRS2_DDR2_OFFS		0
+#define SEM2R_EMRS2_DDR2_MASK		(0x7FFF << SEM2R_EMRS2_DDR2_OFFS)
+
+/* sdram extended mode3 register (SEM3R) */
+#define SDRAM_EXTENDED_MODE3_REG	(DRAM_BASE + 0x1490)
+#define SEM3R_EMRS3_DDR2_OFFS		0
+#define SEM3R_EMRS3_DDR2_MASK		(0x7FFF << SEM3R_EMRS3_DDR2_OFFS)
+
+/* sdram error registers */
+#define SDRAM_ERROR_CAUSE_REG               	(DRAM_BASE + 0x14d0)
+#define SDRAM_ERROR_MASK_REG                	(DRAM_BASE + 0x14d4)
+#define SDRAM_ERROR_DATA_LOW_REG            	(DRAM_BASE + 0x1444)
+#define SDRAM_ERROR_DATA_HIGH_REG           	(DRAM_BASE + 0x1440)
+#define SDRAM_ERROR_ADDR_REG                	(DRAM_BASE + 0x1450)
+#define SDRAM_ERROR_ECC_REG                 	(DRAM_BASE + 0x1448)
+#define SDRAM_CALC_ECC_REG                  	(DRAM_BASE + 0x144c)
+#define SDRAM_ECC_CONTROL_REG               	(DRAM_BASE + 0x1454)
+#define SDRAM_SINGLE_BIT_ERR_CNTR_REG 		(DRAM_BASE + 0x1458)
+#define SDRAM_DOUBLE_BIT_ERR_CNTR_REG 		(DRAM_BASE + 0x145c)
+
+/* SDRAM Error Cause Register (SECR) */
+#define SECR_SINGLE_BIT_ERR			BIT0
+#define SECR_DOUBLE_BIT_ERR			BIT1
+#define SECR_DATA_PATH_PARITY_ERR	BIT2
+/* SDRAM Error Address Register (SEAR) */
+#define SEAR_ERR_TYPE_OFFS			0
+#define SEAR_ERR_TYPE_MASK      	(1 << SEAR_ERR_TYPE_OFFS)
+#define SEAR_ERR_TYPE_SINGLE    	0	
+#define SEAR_ERR_TYPE_DOUBLE    	(1 << SEAR_ERR_TYPE_OFFS)
+#define SEAR_ERR_CS_OFFS			1
+#define SEAR_ERR_CS_MASK			(3 << SEAR_ERR_CS_OFFS)
+#define SEAR_ERR_CS(csNum)			(csNum << SEAR_ERR_CS_OFFS)
+#define SEAR_ERR_ADDR_OFFS      	3
+#define SEAR_ERR_ADDR_MASK      	(0x1FFFFFFF << SEAR_ERR_ADDR_OFFS)
+
+/* SDRAM ECC Control Register (SECR) */
+#define SECR_FORCEECC_OFFS          0
+#define SECR_FORCEECC_MASK          (0xFF << SECR_FORCEECC_OFFS)
+#define SECR_FORCEEN_OFFS           8
+#define SECR_FORCEEN_MASK           (1 << SECR_FORCEEN_OFFS)
+#define SECR_ECC_CALC_MASK          (0 << SECR_FORCEEN_OFFS)
+#define SECR_ECC_USER_MASK          (1 << SECR_FORCEEN_OFFS)
+#define SECR_PERRPROP_EN            BIT9
+#define SECR_CNTMODE_OFFS           10
+#define SECR_CNTMODE_MASK           (1 << SECR_CNTMODE_OFFS)
+#define SECR_ALL_IN_CS0             (0 << SECR_CNTMODE_OFFS)
+#define SECR_NORMAL_COUNTER         (1 << SECR_CNTMODE_OFFS)
+#define SECR_THRECC_OFFS            16
+#define SECR_THRECC_MAX             0xFF
+#define SECR_THRECC_MASK            (SECR_THRECC_MAX << SECR_THRECC_OFFS)
+#define SECR_THRECC(threshold)      (threshold << SECR_THRECC_OFFS)
+
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* __INCmvDramIfRegsh */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddr2/mvDramIfStaticInit.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddr2/mvDramIfStaticInit.h
@@ -0,0 +1,192 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#ifndef __INCmvDramIfStaticInith
+#define __INCmvDramIfStaticInith
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#ifdef MV_STATIC_DRAM_ON_BOARD
+#define STATIC_DRAM_BANK_1
+#undef	STATIC_DRAM_BANK_2             
+#undef	STATIC_DRAM_BANK_3                         
+#undef 	STATIC_DRAM_BANK_4             
+
+
+#ifdef MV_DIMM_TS256MLQ72V5U
+#define	STATIC_DRAM_BANK_2             
+#define	STATIC_DRAM_BANK_3                         
+#undef 	STATIC_DRAM_BANK_4             
+
+#define STATIC_SDRAM_CONFIG_REG		    0x4724481A  /* offset 0x1400 - DMA reg-0xf1000814 */ 
+#define STATIC_SDRAM_DUNIT_CTRL_REG         0x37707450  /* offset 0x1404 - DMA reg-0xf100081c */ 
+#define STATIC_SDRAM_TIMING_CTRL_LOW_REG    0x11A13330  /* offset 0x1408 - DMA reg-0xf1000824 */ 
+#define STATIC_SDRAM_TIMING_CTRL_HIGH_REG   0x00000601  /* offset 0x140c - DMA reg-0xf1000828 */ 
+#define STATIC_SDRAM_ADDR_CTRL_REG          0x00001CB2  /* offset 0x1410 - DMA reg-0xf1000820 */ 
+#define STATIC_SDRAM_MODE_REG               0x00000642  /* offset 0x141c - DMA reg-0xf1000818 */ 
+#define STATIC_SDRAM_ODT_CTRL_LOW	    0x030C030C /*   0x1494  */  
+#define STATIC_SDRAM_ODT_CTRL_HI	    0x00000000 /*   0x1498  */  
+#define STATIC_SDRAM_DUNIT_ODT_CTRL    	    0x0000740F /*   0x149c  */  
+#define STATIC_SDRAM_EXT_MODE          	    0x00000404 /*   0x1420  */  
+#define STATIC_SDRAM_DDR2_TIMING_LO         0x00074410 /*   0x1428  */  
+#define STATIC_SDRAM_DDR2_TIMING_HI         0x00007441 /*   0x147C  */  
+
+#define STATIC_SDRAM_RANK0_SIZE_DIMM0       0x3FFF /* size bank0 dimm0   - DMA reg-0xf1000810 */ 
+#define STATIC_SDRAM_RANK1_SIZE_DIMM0       0x3FFF /* size bank1 dimm0   */ 
+#define STATIC_SDRAM_RANK0_SIZE_DIMM1       0x3FFF /* size bank0 dimm1   */ 
+#define STATIC_SDRAM_RANK1_SIZE_DIMM1       0x0	   /* size bank1 dimm1   */ 
+
+#endif /* TS256MLQ72V5U */
+
+
+#ifdef MV_MT9VDDT3272AG
+/* one DIMM 256M  */
+#define STATIC_SDRAM_CONFIG_REG		    0x5820040d  /* offset 0x1400 - DMA reg-0xf1000814 */ 
+#define STATIC_SDRAM_DUNIT_CTRL_REG         0xC4000540  /* offset 0x1404 - DMA reg-0xf100081c */ 
+#define STATIC_SDRAM_TIMING_CTRL_LOW_REG    0x01602220  /* offset 0x1408 - DMA reg-0xf1000824 */ 
+#define STATIC_SDRAM_TIMING_CTRL_HIGH_REG   0x0000000b  /* offset 0x140c - DMA reg-0xf1000828 */ 
+#define STATIC_SDRAM_ADDR_CTRL_REG          0x00000012  /* offset 0x1410 - DMA reg-0xf1000820 */ 
+#define STATIC_SDRAM_MODE_REG               0x00000062  /* offset 0x141c - DMA reg-0xf1000818 */ 
+#define STATIC_SDRAM_RANK0_SIZE_DIMM0       0x0fff /* size bank0 dimm0   - DMA reg-0xf1000810 */ 
+#define STATIC_SDRAM_RANK0_SIZE_DIMM1       0x0    /* size bank0 dimm1   */ 
+
+#endif /* MV_MT9VDDT3272AG */
+
+
+
+#ifdef MV_D27RB12P
+/* 
+Two DIMM 512M + ECC enabled, Registered DIMM  CAS Latency 2.5
+*/
+
+#define STATIC_SDRAM_CONFIG_REG		    0x6826081E  /* offset 0x1400 - DMA reg-0xf1000814 */ 
+#define STATIC_SDRAM_DUNIT_CTRL_REG         0xC5000540  /* offset 0x1404 - DMA reg-0xf100081c */ 
+#define STATIC_SDRAM_TIMING_CTRL_LOW_REG    0x01501220  /* offset 0x1408 - DMA reg-0xf1000824 */ 
+#define STATIC_SDRAM_TIMING_CTRL_HIGH_REG   0x00000009  /* offset 0x140c - DMA reg-0xf1000828 */ 
+#define STATIC_SDRAM_ADDR_CTRL_REG          0x00000012  /* offset 0x1410 - DMA reg-0xf1000820 */ 
+#define STATIC_SDRAM_MODE_REG               0x00000062  /* offset 0x141c - DMA reg-0xf1000818 */ 
+#define STATIC_SDRAM_RANK0_SIZE_DIMM0       0x0FFF /* size bank0 dimm0   - DMA reg-0xf1000810 */ 
+#define STATIC_SDRAM_RANK0_SIZE_DIMM1       0x0FFF    /* size bank0 dimm1   */ 
+
+#define STATIC_DRAM_BANK_2             
+
+#define STATIC_DRAM_BANK_3                         
+#define STATIC_DRAM_BANK_4             
+
+#endif /*  mv_D27RB12P  */
+
+#ifdef RD_MV645XX
+
+#define STATIC_MEM_TYPE				MEM_TYPE_DDR2
+#define STATIC_DIMM_INFO_BANK0_SIZE		256
+/* DDR2 boards 256 MB*/
+
+#define STATIC_SDRAM_RANK0_SIZE_DIMM0       	0x00000fff /* size bank0 dimm0   - DMA reg-0xf1000810 */ 
+#define STATIC_SDRAM_CONFIG_REG	     		0x07190618	
+#define STATIC_SDRAM_MODE_REG	     		0x00000432	
+#define STATIC_SDRAM_DUNIT_CTRL_REG     	0xf4a03440
+#define STATIC_SDRAM_ADDR_CTRL_REG	     	0x00000022
+#define STATIC_SDRAM_TIMING_CTRL_LOW_REG    	0x11712220
+#define STATIC_SDRAM_TIMING_CTRL_HIGH_REG	0x00000504
+#define STATIC_SDRAM_ODT_CTRL_LOW	     	0x84210000
+#define STATIC_SDRAM_ODT_CTRL_HI	     	0x00000000
+#define STATIC_SDRAM_DUNIT_ODT_CTRL    		0x0000780f
+#define STATIC_SDRAM_EXT_MODE          		0x00000440
+#define STATIC_SDRAM_DDR2_TIMING_LO         	0x00063300
+#define STATIC_SDRAM_DDR2_TIMING_HI         	0x00006330
+#endif /* RD_MV645XX */
+
+#if MV_DIMM_M3783354CZ3_CE6 
+
+#define STATIC_SDRAM_RANK0_SIZE_DIMM0		0x00000FFF /* 0x2010 size bank0 dimm0   - DMA reg-0xf1000810 */ 
+#define STATIC_SDRAM_CONFIG_REG	     		0x07190618 /*   0x1400  */ 
+#define STATIC_SDRAM_MODE_REG	     		0x00000432 /*   0x141c  */  
+#define STATIC_SDRAM_DUNIT_CTRL_REG     	0xf4a03440 /*   0x1404  */  
+#define STATIC_SDRAM_ADDR_CTRL_REG	     	0x00000022 /*   0x1410  */  
+#define STATIC_SDRAM_TIMING_CTRL_LOW_REG	0x11712220 /*   0x1408  */  
+#define STATIC_SDRAM_TIMING_CTRL_HIGH_REG	0x00000504 /*   0x140c  */  
+#define STATIC_SDRAM_ODT_CTRL_LOW	     	0x84210000 /*   0x1494  */  
+#define STATIC_SDRAM_ODT_CTRL_HI	     	0x00000000 /*   0x1498  */  
+#define STATIC_SDRAM_DUNIT_ODT_CTRL    		0x0000780f /*   0x149c  */  
+#define STATIC_SDRAM_EXT_MODE          		0x00000440 /*   0x1420  */  
+#define STATIC_SDRAM_DDR2_TIMING_LO		0x00063300 /*   0x1428  */  
+#define STATIC_SDRAM_DDR2_TIMING_HI		0x00006330 /*   0x147C  */  
+
+#endif /* MV_DIMM_M3783354CZ3_CE6 */
+
+#endif /* MV_STATIC_DRAM_ON_BOARD */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* __INCmvDramIfStaticInith */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddr2/mvDramIf.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddr2/mvDramIf.c
@@ -0,0 +1,1789 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+/* includes */
+#include "../mvDramIf.h"
+#include "ctrlEnv/sys/mvCpuIf.h"
+
+#include "ddr2/mvDramIfStaticInit.h"
+
+#error "This HAL was not adatped to the new HAL arch, and thus cannot be compiled."
+
+/* #define MV_DEBUG */
+#ifdef MV_DEBUG
+#define DB(x) x
+#else
+#define DB(x)
+#endif
+
+/* DRAM bank presence encoding */
+#define BANK_PRESENT_CS0			    0x1
+#define BANK_PRESENT_CS0_CS1			0x3
+#define BANK_PRESENT_CS0_CS2			0x5
+#define BANK_PRESENT_CS0_CS1_CS2		0x7
+#define BANK_PRESENT_CS0_CS2_CS3		0xd
+#define BANK_PRESENT_CS0_CS2_CS3_CS4	0xf
+
+/* locals   */
+#ifndef MV_STATIC_DRAM_ON_BOARD
+static void sdramDDr2OdtConfig(MV_DRAM_BANK_INFO *pBankInfo);
+static MV_U32 dunitCtrlLowRegCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 minCas, MV_U32  busClk, MV_STATUS TTmode );
+static MV_U32 dunitCtrlHighRegCalc(MV_U32  busClk);
+static MV_U32 sdramModeRegCalc(MV_U32 minCas);
+static MV_U32 sdramExtModeRegCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 busClk);
+static MV_U32 sdramAddrCtrlRegCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_DRAM_BANK_INFO *pBankInfoDIMM1);
+static MV_U32 sdramConfigRegCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_DRAM_BANK_INFO *pBankInfo2, MV_U32 busClk);
+static MV_U32 minCasCalc(MV_DRAM_BANK_INFO *pBankInfo,MV_DRAM_BANK_INFO *pBankInfo2, MV_U32 busClk, MV_U32 forcedCl);
+static MV_U32 sdramTimeCtrlLowRegCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 minCas, MV_U32 busClk);
+static MV_U32 sdramTimeCtrlHighRegCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 busClk);
+static MV_U32 sdramDdr2TimeLoRegCalc(MV_U32 minCas);
+static MV_U32 sdramDdr2TimeHiRegCalc(MV_U32 minCas);
+#endif
+MV_32 DRAM_CS_Order[MV_DRAM_MAX_CS] = {N_A,N_A,N_A,N_A};
+
+/*******************************************************************************
+* mvDramIfDetect - Prepare DRAM interface configuration values.
+*
+* DESCRIPTION:
+*       This function implements the full DRAM detection and timing 
+*       configuration for best system performance.
+*       Since this routine runs from a ROM device (Boot Flash), its stack 
+*       resides on RAM, that might be the system DRAM. Changing DRAM 
+*       configuration values while keeping vital data in DRAM is risky. That
+*       is why the function does not preform the configuration setting but 
+*       prepare those in predefined 32bit registers (in this case IDMA 
+*       registers are used) for other routine to perform the settings.
+*       The function will call for board DRAM SPD information for each DRAM 
+*       chip select. The function will then analyze those SPD parameters of 
+*       all DRAM banks in order to decide on DRAM configuration compatible 
+*       for all DRAM banks.
+*       The function will set the CPU DRAM address decode registers.
+*       Note: This routine prepares values that will overide configuration of
+*       mvDramBasicAsmInit().
+*       
+* INPUT:
+*       forcedCl - Forced CAL Latency. If equal to zero, do not force.
+*       eccDisable - Force down the ECC.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_STATUS mvDramIfDetect(MV_U32 forcedCl, MV_BOOL eccDisable)
+{
+	MV_32 	MV_DRAM_CS_order[MV_DRAM_MAX_CS] = {SDRAM_CS0,SDRAM_CS1,SDRAM_CS2,SDRAM_CS3};
+	MV_U32  busClk, deviceW, dimmW;
+	MV_U32 numOfAllDevices = 0;
+	MV_STATUS TTMode; 
+#ifndef MV_STATIC_DRAM_ON_BOARD
+	MV_DRAM_BANK_INFO bankInfo[MV_DRAM_MAX_CS];
+	MV_U32  size, base = 0, i, j, temp, busClkPs;
+	MV_U8	minCas;
+	MV_CPU_DEC_WIN dramDecWin;
+	dramDecWin.addrWin.baseHigh = 0;
+#endif
+
+	busClk = mvBoardSysClkGet();
+
+	if (0 == busClk)
+	{
+		mvOsPrintf("Dram: ERR. Can't detect system clock! \n");
+		return MV_ERROR;
+	}
+	
+#ifndef MV_STATIC_DRAM_ON_BOARD
+
+	busClkPs = 1000000000 / (busClk / 1000);  /* in ps units */
+	/* we will use bank 0 as the representative of the all the DRAM banks,  */
+	/* since bank 0 must exist.                                             */	
+	for(i = 0; i < MV_DRAM_MAX_CS; i++)
+	{ 
+		/* if Bank exist */
+		if(MV_OK == mvDramBankInfoGet(i, &bankInfo[i]))
+		{
+			DB(mvOsPrintf("Dram: Find bank %d\n", i));
+			/* check it isn't SDRAM */
+			if(bankInfo[i].memoryType != MEM_TYPE_DDR2)
+			{
+				mvOsPrintf("Dram: ERR. SDRAM type not supported !!!\n");
+				return MV_ERROR;
+			}
+
+            		/* All banks must support the Mclk freqency */
+			if(bankInfo[i].minCycleTimeAtMaxCasLatPs > busClkPs)
+			{
+				mvOsPrintf("Dram: ERR. Bank %d doesn't support memory clock!!!\n", i);
+				return MV_ERROR;
+			}
+
+			/* All banks must support registry in order to activate it */
+			if(bankInfo[i].registeredAddrAndControlInputs != 
+			   bankInfo[0].registeredAddrAndControlInputs)
+			{
+				mvOsPrintf("Dram: ERR. different Registered settings !!!\n");
+				return MV_ERROR;
+			}
+
+			/* All banks must support same ECC mode */
+			if(bankInfo[i].errorCheckType != 
+			   bankInfo[0].errorCheckType)
+			{
+				mvOsPrintf("Dram: ERR. different ECC settings !!!\n");
+				return MV_ERROR;
+			}
+
+		}
+		else
+		{
+			if( i == 0 ) /* bank 0 doesn't exist */
+			{
+				mvOsPrintf("Dram: ERR. Fail to detect bank 0 !!!\n");
+				return MV_ERROR;
+			}
+			else
+			{
+				DB(mvOsPrintf("Dram: Could not find bank %d\n", i));
+				bankInfo[i].size = 0;     /* Mark this bank as non exist */
+			}
+		}
+	}
+
+	if (bankInfo[SDRAM_CS0].size <  bankInfo[SDRAM_CS2].size)
+	{
+		MV_DRAM_CS_order[0] = SDRAM_CS2;
+		MV_DRAM_CS_order[1] = SDRAM_CS3;
+		MV_DRAM_CS_order[2] = SDRAM_CS0;
+		MV_DRAM_CS_order[3] = SDRAM_CS1;
+		DRAM_CS_Order[0] = SDRAM_CS2;
+		DRAM_CS_Order[1] = SDRAM_CS3;
+		DRAM_CS_Order[2] = SDRAM_CS0;
+		DRAM_CS_Order[3] = SDRAM_CS1;
+
+	}
+	else
+	{
+		MV_DRAM_CS_order[0] = SDRAM_CS0;
+		MV_DRAM_CS_order[1] = SDRAM_CS1;
+		MV_DRAM_CS_order[2] = SDRAM_CS2;
+		MV_DRAM_CS_order[3] = SDRAM_CS3;
+		DRAM_CS_Order[0] = SDRAM_CS0;
+		DRAM_CS_Order[1] = SDRAM_CS1;
+		DRAM_CS_Order[2] = SDRAM_CS2;
+		DRAM_CS_Order[3] = SDRAM_CS3;
+	}
+
+	for(j = 0; j < MV_DRAM_MAX_CS; j++)
+	{
+		i = MV_DRAM_CS_order[j];
+		
+        	if (0 == bankInfo[i].size)
+			continue;
+
+			/* Init the CPU window decode */
+			/* Note that the Dimm width might be different then the device DRAM width */
+#ifdef MV78XX0	
+			temp = MV_REG_READ(SDRAM_CONFIG_REG);
+			deviceW = ((temp & SDRAM_DWIDTH_MASK) == SDRAM_DWIDTH_32BIT )? 32 : 64;
+#else
+			deviceW = 16 /* KW family */;
+#endif
+			dimmW = bankInfo[0].dataWidth - (bankInfo[0].dataWidth % 16);
+			size = ((bankInfo[i].size << 20) / (dimmW/deviceW)); 
+
+		
+			/* We can not change DRAM window settings while excecuting  	*/
+			/* code from it. That is why we skip the DRAM CS[0], saving     */
+			/* it to the ROM configuration routine				*/
+
+			numOfAllDevices += bankInfo[i].numberOfDevices;
+			if (i == MV_DRAM_CS_order[0])
+			{
+				MV_U32 sizeToReg;
+				/* Translate the given window size to register format		*/
+				sizeToReg = ctrlSizeToReg(size, SCSR_SIZE_ALIGNMENT);
+				/* Size parameter validity check.                           */
+				if (-1 == sizeToReg)
+				{
+					mvOsPrintf("DRAM: mvCtrlAddrDecToReg: ERR. Win %d size invalid.\n"
+							   ,i);
+					return MV_BAD_PARAM;
+				}
+
+				DB(mvOsPrintf("Dram: Bank 0 Size - %x\n",sizeToReg);)
+				sizeToReg = (sizeToReg << SCSR_SIZE_OFFS);
+				sizeToReg |= SCSR_WIN_EN;
+				MV_REG_WRITE(DRAM_BUF_REG0, sizeToReg);
+			}
+			else
+			{
+				dramDecWin.addrWin.baseLow = base;
+				dramDecWin.addrWin.size = size;
+				dramDecWin.enable = MV_TRUE;
+				DB(mvOsPrintf("Dram: Enable window %d base 0x%x, size=0x%x\n",i, base, size));
+				
+				/* Check if the DRAM size is more then 3GByte */
+				if (base < 0xC0000000)
+				{
+					DB(mvOsPrintf("Dram: Enable window %d base 0x%x, size=0x%x\n",i, base, size));
+           			if (MV_OK != mvCpuIfTargetWinSet(i, &dramDecWin))
+					{
+						mvOsPrintf("Dram: ERR. Fail to set bank %d!!!\n", SDRAM_CS0 + i);
+						return 	MV_ERROR;
+					}
+				}
+			}
+			
+			base += size;
+
+			/* update the suportedCasLatencies mask */
+			bankInfo[0].suportedCasLatencies &= bankInfo[i].suportedCasLatencies;
+	}
+
+	/* calculate minimum CAS */
+	minCas = minCasCalc(&bankInfo[0], &bankInfo[2], busClk, forcedCl);
+	if (0 == minCas) 
+	{
+		mvOsOutput("Dram: Warn: Could not find CAS compatible to SysClk %dMhz\n",
+				   (busClk / 1000000));
+
+		minCas = DDR2_CL_4; /* Continue with this CAS */
+		mvOsPrintf("Set default CAS latency 4\n");
+	}
+
+	/* calc SDRAM_CONFIG_REG  and save it to temp register */
+	temp = sdramConfigRegCalc(&bankInfo[0],&bankInfo[2], busClk);
+	if(-1 == temp)
+	{
+		mvOsPrintf("Dram: ERR. sdramConfigRegCalc failed !!!\n");
+		return MV_ERROR;
+	}
+
+	/* check if ECC is enabled by the user */
+	if(eccDisable)	
+	{	
+		/* turn off ECC*/
+		temp &= ~BIT18;
+	}
+	DB(mvOsPrintf("Dram: sdramConfigRegCalc - %x\n",temp);)
+	MV_REG_WRITE(DRAM_BUF_REG1, temp);
+	
+	/* calc SDRAM_MODE_REG  and save it to temp register */ 
+	temp = sdramModeRegCalc(minCas);
+    	if(-1 == temp)
+	{
+		mvOsPrintf("Dram: ERR. sdramModeRegCalc failed !!!\n");
+		return MV_ERROR;
+	}
+	DB(mvOsPrintf("Dram: sdramModeRegCalc - %x\n",temp);)
+	MV_REG_WRITE(DRAM_BUF_REG2, temp);
+
+	/* calc SDRAM_EXTENDED_MODE_REG  and save it to temp register */ 
+	temp = sdramExtModeRegCalc(&bankInfo[0], busClk);
+	if(-1 == temp)
+	{
+		mvOsPrintf("Dram: ERR. sdramExtModeRegCalc failed !!!\n");
+		return MV_ERROR;
+	}
+	DB(mvOsPrintf("Dram: sdramExtModeRegCalc - %x\n",temp);)
+	MV_REG_WRITE(DRAM_BUF_REG10, temp);
+
+	/* calc D_UNIT_CONTROL_LOW  and save it to temp register */
+	TTMode = MV_FALSE;
+	DB(mvOsPrintf("Dram: numOfAllDevices = %x\n",numOfAllDevices);)
+	if( (numOfAllDevices > 9) && (bankInfo[0].registeredAddrAndControlInputs == MV_FALSE) )
+	{
+		if ( ( (numOfAllDevices > 9) && (busClk > MV_BOARD_SYSCLK_200MHZ) ) ||
+			(numOfAllDevices > 18) )
+	{
+		mvOsOutput("Enable 2T ");
+		TTMode = MV_TRUE;
+	}
+	}
+
+  	temp = dunitCtrlLowRegCalc(&bankInfo[0], minCas, busClk, TTMode ); 
+   	if(-1 == temp)
+	{
+		mvOsPrintf("Dram: ERR. dunitCtrlLowRegCalc failed !!!\n");
+		return MV_ERROR;
+	}
+	DB(mvOsPrintf("Dram: dunitCtrlLowRegCalc - %x\n",temp);)
+  	MV_REG_WRITE(DRAM_BUF_REG3, temp); 
+
+	/* calc D_UNIT_CONTROL_HIGH  and save it to temp register */
+  	temp = dunitCtrlHighRegCalc(busClk); 
+   	if(-1 == temp)
+	{
+		mvOsPrintf("Dram: ERR. dunitCtrlHighRegCalc failed !!!\n");
+		return MV_ERROR;
+	}
+	DB(mvOsPrintf("Dram: dunitCtrlHighRegCalc - %x\n",temp);)
+  	MV_REG_WRITE(DRAM_BUF_REG13, temp); 
+
+	/* calc SDRAM_ADDR_CTRL_REG  and save it to temp register */
+	temp = sdramAddrCtrlRegCalc(&bankInfo[0],&bankInfo[2]);
+    	if(-1 == temp)
+	{
+		mvOsPrintf("Dram: ERR. sdramAddrCtrlRegCalc failed !!!\n");
+		return MV_ERROR;
+	}
+	DB(mvOsPrintf("Dram: sdramAddrCtrlRegCalc - %x\n",temp);)
+	MV_REG_WRITE(DRAM_BUF_REG4, temp);
+
+	/* calc SDRAM_TIMING_CTRL_LOW_REG  and save it to temp register */
+	temp = sdramTimeCtrlLowRegCalc(&bankInfo[0], minCas, busClk);
+    	if(-1 == temp)
+	{
+		mvOsPrintf("Dram: ERR. sdramTimeCtrlLowRegCalc failed !!!\n");
+		return MV_ERROR;
+	}
+	DB(mvOsPrintf("Dram: sdramTimeCtrlLowRegCalc - %x\n",temp);)
+	MV_REG_WRITE(DRAM_BUF_REG5, temp);
+
+	/* calc SDRAM_TIMING_CTRL_HIGH_REG  and save it to temp register */
+	temp = sdramTimeCtrlHighRegCalc(&bankInfo[0], busClk);
+    	if(-1 == temp)
+	{
+		mvOsPrintf("Dram: ERR. sdramTimeCtrlHighRegCalc failed !!!\n");
+		return MV_ERROR;
+	}
+	DB(mvOsPrintf("Dram: sdramTimeCtrlHighRegCalc - %x\n",temp);)
+	MV_REG_WRITE(DRAM_BUF_REG6, temp);
+
+	sdramDDr2OdtConfig(bankInfo);
+
+	/* calc DDR2_SDRAM_TIMING_LOW_REG  and save it to temp register */
+	temp = sdramDdr2TimeLoRegCalc(minCas);
+	if(-1 == temp)
+	{
+		mvOsPrintf("Dram: ERR. sdramDdr2TimeLoRegCalc failed !!!\n");
+		return MV_ERROR;
+	}
+	DB(mvOsPrintf("Dram: sdramDdr2TimeLoRegCalc - %x\n",temp);)
+	MV_REG_WRITE(DRAM_BUF_REG11, temp);
+
+	/* calc DDR2_SDRAM_TIMING_HIGH_REG  and save it to temp register */
+	temp = sdramDdr2TimeHiRegCalc(minCas);
+	if(-1 == temp)
+	{
+		mvOsPrintf("Dram: ERR. sdramDdr2TimeHiRegCalc failed !!!\n");
+		return MV_ERROR;
+	}
+	DB(mvOsPrintf("Dram: sdramDdr2TimeHiRegCalc - %x\n",temp);)
+	MV_REG_WRITE(DRAM_BUF_REG12, temp);
+#endif
+	
+	/* Note that DDR SDRAM Address/Control and Data pad calibration     */
+	/* settings is done in mvSdramIfConfig.s                            */
+
+ 	return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvDramIfBankBaseGet - Get DRAM interface bank base.
+*
+* DESCRIPTION:
+*       This function returns the 32 bit base address of a given DRAM bank.
+*
+* INPUT:
+*       bankNum - Bank number.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       DRAM bank size. If bank is disabled or paramter is invalid, the 
+*		function returns -1.
+*
+*******************************************************************************/
+MV_U32 mvDramIfBankBaseGet(MV_U32 bankNum)
+{
+	DB(mvOsPrintf("Dram: mvDramIfBankBaseGet Bank %d base addr is %x \n",
+				  bankNum, mvCpuIfTargetWinBaseLowGet(SDRAM_CS0 + bankNum)));
+	return mvCpuIfTargetWinBaseLowGet(SDRAM_CS0 + bankNum);
+}
+
+/*******************************************************************************
+* mvDramIfBankSizeGet - Get DRAM interface bank size.
+*
+* DESCRIPTION:
+*       This function returns the size of a given DRAM bank.
+*
+* INPUT:
+*       bankNum - Bank number.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       DRAM bank size. If bank is disabled the function return '0'. In case 
+*		or paramter is invalid, the function returns -1.
+*
+*******************************************************************************/
+MV_U32 mvDramIfBankSizeGet(MV_U32 bankNum)
+{
+	DB(mvOsPrintf("Dram: mvDramIfBankSizeGet Bank %d size is %x \n",
+				  bankNum, mvCpuIfTargetWinSizeGet(SDRAM_CS0 + bankNum)));
+	return mvCpuIfTargetWinSizeGet(SDRAM_CS0 + bankNum);
+}
+
+
+/*******************************************************************************
+* mvDramIfSizeGet - Get DRAM interface total size.
+*
+* DESCRIPTION:
+*       This function get the DRAM total size.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       DRAM total size. In case or paramter is invalid, the function 
+*		returns -1.
+*
+*******************************************************************************/
+MV_U32 mvDramIfSizeGet(MV_VOID)
+{
+	MV_U32 size = 0, i;
+	
+	for(i = 0; i < MV_DRAM_MAX_CS; i++)
+		size += mvDramIfBankSizeGet(i);
+	
+	DB(mvOsPrintf("Dram: mvDramIfSizeGet size is %x \n",size));
+	return size;
+}
+
+/*******************************************************************************
+* mvDramIfSingleBitErrThresholdSet - Set single bit ECC threshold.
+*
+* DESCRIPTION:
+*       The ECC single bit error threshold is the number of single bit 
+*       errors to happen before the Dunit generates an interrupt.
+*       This function set single bit ECC threshold.
+*
+* INPUT:
+*       threshold - threshold.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_BAD_PARAM if threshold is to big, MV_OK otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvDramIfSingleBitErrThresholdSet(MV_U32 threshold)
+{
+    MV_U32 regVal; 
+
+    if (threshold > SECR_THRECC_MAX)
+    {
+        return MV_BAD_PARAM;
+    }
+
+    regVal = MV_REG_READ(SDRAM_ECC_CONTROL_REG);
+    regVal &= ~SECR_THRECC_MASK;
+    regVal |= ((SECR_THRECC(threshold) & SECR_THRECC_MASK));
+    MV_REG_WRITE(SDRAM_ECC_CONTROL_REG, regVal);
+
+    return MV_OK;
+}
+
+#ifndef MV_STATIC_DRAM_ON_BOARD
+/*******************************************************************************
+* minCasCalc - Calculate the Minimum CAS latency which can be used.
+*
+* DESCRIPTION:
+*	Calculate the minimum CAS latency that can be used, base on the DRAM
+*	parameters and the SDRAM bus Clock freq.
+*
+* INPUT:
+*	busClk    - the DRAM bus Clock.
+*	pBankInfo - bank info parameters.
+*	forcedCl - Forced CAS Latency multiplied by 10. If equal to zero, do not force.
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       The minimum CAS Latency. The function returns 0 if max CAS latency
+*		supported by banks is incompatible with system bus clock frequancy.
+*
+*******************************************************************************/
+
+static MV_U32 minCasCalc(MV_DRAM_BANK_INFO *pBankInfo,MV_DRAM_BANK_INFO *pBankInfo2, MV_U32 busClk, MV_U32 forcedCl)
+{
+	MV_U32 count = 1, j;
+	MV_U32 busClkPs = 1000000000 / (busClk / 1000);  /* in ps units */
+	MV_U32 startBit, stopBit;
+	MV_U32 minCas0 = 0, minCas2 = 0;
+	
+	
+	/*     DDR 2:
+			*******-******-******-******-******-******-******-******* 
+			* bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * 
+			*******-******-******-******-******-******-******-******* 
+	CAS	=	* TBD  | TBD  |  5   |  4   |  3   |  2   | TBD  | TBD  * 
+	Disco VI=	* TBD  | TBD  |  5   |  4   |  3   |  TBD   | TBD | TBD * 
+	Disco Duo=	* TBD  |   6  |  5   |  4   |  3   |  TBD   | TBD | TBD * 
+			*********************************************************/
+	
+	
+	/* If we are asked to use the forced CAL  we change the suported CAL to be forcedCl only */
+	if (forcedCl)
+	{
+		mvOsPrintf("DRAM: Using forced CL %d.%d\n", (forcedCl / 10), (forcedCl % 10));
+	
+			if (forcedCl == 30)
+				pBankInfo->suportedCasLatencies = 0x08;
+			else if (forcedCl == 40)
+				pBankInfo->suportedCasLatencies = 0x10;
+			else if (forcedCl == 50)
+				pBankInfo->suportedCasLatencies = 0x20;
+			else if (forcedCl == 60)
+				pBankInfo->suportedCasLatencies = 0x40;
+			else
+			{
+				mvOsPrintf("Forced CL %d.%d not supported. Set default CL 4\n", 
+						   (forcedCl / 10), (forcedCl % 10));
+				pBankInfo->suportedCasLatencies = 0x10;
+			}
+
+		return pBankInfo->suportedCasLatencies;        
+	}   
+	
+	/* go over the supported cas mask from Max Cas down and check if the 	*/
+	/* SysClk stands in its time requirments.				*/
+
+	DB(mvOsPrintf("Dram: minCasCalc supported mask = %x busClkPs = %x \n",
+								pBankInfo->suportedCasLatencies,busClkPs ));
+	count = 1;
+	for(j = 7; j > 0; j--)
+	{
+		if((pBankInfo->suportedCasLatencies >> j) & BIT0 )
+		{
+			/* Reset the bits for CL incompatible for the sysClk */
+			switch (count)
+			{
+				case 1: 
+					if (pBankInfo->minCycleTimeAtMaxCasLatPs > busClkPs) 
+						pBankInfo->suportedCasLatencies &= ~(BIT0 << j);
+					count++;
+					break;
+				case 2: 
+					if (pBankInfo->minCycleTimeAtMaxCasLatMinus1Ps > busClkPs)
+						pBankInfo->suportedCasLatencies &= ~(BIT0 << j);
+					count++;
+					break;
+				case 3: 
+					if (pBankInfo->minCycleTimeAtMaxCasLatMinus2Ps > busClkPs)
+						pBankInfo->suportedCasLatencies &= ~(BIT0 << j);
+					count++;
+					break;
+				default: 
+					pBankInfo->suportedCasLatencies &= ~(BIT0 << j);
+					break;
+			}
+		}
+	}
+	
+	DB(mvOsPrintf("Dram: minCasCalc support = %x (after SysCC calc)\n",
+											pBankInfo->suportedCasLatencies ));
+
+	count = 1;
+	DB(mvOsPrintf("Dram2: minCasCalc supported mask = %x busClkPs = %x \n",
+								pBankInfo2->suportedCasLatencies,busClkPs ));
+	for(j = 7; j > 0; j--)
+	{
+		if((pBankInfo2->suportedCasLatencies >> j) & BIT0 )
+		{
+			/* Reset the bits for CL incompatible for the sysClk */
+			switch (count)
+			{
+				case 1: 
+					if (pBankInfo2->minCycleTimeAtMaxCasLatPs > busClkPs) 
+						pBankInfo2->suportedCasLatencies &= ~(BIT0 << j);
+					count++;
+					break;
+				case 2: 
+					if (pBankInfo2->minCycleTimeAtMaxCasLatMinus1Ps > busClkPs)
+						pBankInfo2->suportedCasLatencies &= ~(BIT0 << j);
+					count++;
+					break;
+				case 3: 
+					if (pBankInfo2->minCycleTimeAtMaxCasLatMinus2Ps > busClkPs)
+						pBankInfo2->suportedCasLatencies &= ~(BIT0 << j);
+					count++;
+					break;
+				default: 
+					pBankInfo2->suportedCasLatencies &= ~(BIT0 << j);
+					break;
+			}
+		}
+	}
+	
+	DB(mvOsPrintf("Dram2: minCasCalc support = %x (after SysCC calc)\n",
+									pBankInfo2->suportedCasLatencies ));
+
+	startBit = 3;   /* DDR2 support CL start with CL3 (bit 3) */
+	stopBit  = 6;   /* DDR2 support CL stops with CL6 (bit 6) */
+
+	for(j = startBit; j <= stopBit ; j++)
+	{
+		if((pBankInfo->suportedCasLatencies >> j) & BIT0 )
+		{
+			DB(mvOsPrintf("Dram: minCasCalc choose CAS %x \n",(BIT0 << j)));
+			minCas0 = (BIT0 << j);
+			break;
+		}
+	}
+
+	for(j = startBit; j <= stopBit ; j++)
+	{
+		if((pBankInfo2->suportedCasLatencies >> j) & BIT0 )
+		{
+			DB(mvOsPrintf("Dram: minCasCalc choose CAS %x \n",(BIT0 << j)));
+			minCas2 = (BIT0 << j);
+			break;
+		}
+	}
+	
+	if (minCas2 > minCas0)
+		return minCas2;
+	else
+		return minCas0;
+	
+	return 0; 
+}
+
+/*******************************************************************************
+* sdramConfigRegCalc - Calculate sdram config register
+*
+* DESCRIPTION: Calculate sdram config register optimized value based
+*			on the bank info parameters.
+*
+* INPUT:
+*	busClk    - the DRAM bus Clock.
+*	pBankInfo - sdram bank parameters
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       sdram config reg value.
+*
+*******************************************************************************/
+static MV_U32 sdramConfigRegCalc(MV_DRAM_BANK_INFO *pBankInfo,MV_DRAM_BANK_INFO *pBankInfo2, MV_U32 busClk)
+{
+	MV_U32 sdramConfig = 0;
+	MV_U32 refreshPeriod;
+	
+	busClk /= 1000000; /* we work with busClk in MHz */
+	
+	sdramConfig = MV_REG_READ(SDRAM_CONFIG_REG);
+	
+	/* figure out the memory refresh internal */
+	switch (pBankInfo->refreshInterval & 0xf)
+	{
+		case 0x0: /* refresh period is 15.625 usec */
+				refreshPeriod = 15625;
+				break;
+		case 0x1: /* refresh period is 3.9 usec  	*/
+				refreshPeriod = 3900;
+				break;
+		case 0x2: /* refresh period is 7.8 usec 	*/
+				refreshPeriod = 7800;
+				break;
+		case 0x3: /* refresh period is 31.3 usec	*/
+				refreshPeriod = 31300;
+				break;
+		case 0x4: /* refresh period is 62.5 usec	*/
+				refreshPeriod = 62500;
+				break;
+		case 0x5: /* refresh period is 125 usec 	*/
+				refreshPeriod = 125000;
+				break;
+		default:  /* refresh period undefined 					*/
+				mvOsPrintf("Dram: ERR. DRAM refresh period is unknown!\n");
+				return -1;
+    }
+	
+	/* Now the refreshPeriod is in register format value */
+	refreshPeriod = (busClk * refreshPeriod) / 1000;
+	
+	DB(mvOsPrintf("Dram: sdramConfigRegCalc calculated refresh interval %0x\n", 
+				  refreshPeriod));
+
+	/* make sure the refresh value is only 14 bits */
+	if(refreshPeriod > SDRAM_REFRESH_MAX)
+	{
+		refreshPeriod = SDRAM_REFRESH_MAX;
+		DB(mvOsPrintf("Dram: sdramConfigRegCalc adjusted refresh interval %0x\n", 
+					  refreshPeriod));
+	}
+	
+	/* Clear the refresh field */
+	sdramConfig &= ~SDRAM_REFRESH_MASK;
+	
+	/* Set new value to refresh field */
+	sdramConfig |= (refreshPeriod & SDRAM_REFRESH_MASK);
+	
+	/*  registered DRAM ? */
+	if ( pBankInfo->registeredAddrAndControlInputs )
+	{
+		/* it's registered DRAM, so set the reg. DRAM bit */
+		sdramConfig |= SDRAM_REGISTERED;
+		DB(mvOsPrintf("DRAM Attribute: Registered address and control inputs.\n");)
+	}
+
+	/* ECC and IERR support */
+	sdramConfig &= ~SDRAM_ECC_MASK;    /* Clear ECC field */
+	sdramConfig &= ~SDRAM_IERR_MASK;    /* Clear IErr field */
+
+	if ( pBankInfo->errorCheckType ) 
+	{
+		sdramConfig |= SDRAM_ECC_EN;
+		sdramConfig |= SDRAM_IERR_REPORTE; 
+                DB(mvOsPrintf("Dram: mvDramIfDetect Enabling ECC\n"));
+	}
+	else
+	{
+                sdramConfig |= SDRAM_ECC_DIS;
+		sdramConfig |= SDRAM_IERR_IGNORE; 
+                DB(mvOsPrintf("Dram: mvDramIfDetect Disabling ECC!\n"));
+	}
+	/* Set static default settings */
+	sdramConfig |= SDRAM_CONFIG_DV;
+	
+	DB(mvOsPrintf("Dram: sdramConfigRegCalc set sdramConfig to 0x%x\n",
+				  sdramConfig));
+	
+ 	return sdramConfig;  
+}
+
+/*******************************************************************************
+* sdramModeRegCalc - Calculate sdram mode register
+*
+* DESCRIPTION: Calculate sdram mode register optimized value based
+*			on the bank info parameters and the minCas.
+*
+* INPUT:
+*	minCas	  - minimum CAS supported. 
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       sdram mode reg value.
+*
+*******************************************************************************/
+static MV_U32 sdramModeRegCalc(MV_U32 minCas)
+{
+	MV_U32 sdramMode;
+		
+	sdramMode = MV_REG_READ(SDRAM_MODE_REG);
+	
+	/* Clear CAS Latency field */
+	sdramMode &= ~SDRAM_CL_MASK;
+	
+	DB(mvOsPrintf("DRAM CAS Latency ");)
+	
+		switch (minCas)
+		{
+			case DDR2_CL_3: 
+				sdramMode |= SDRAM_DDR2_CL_3;
+				DB(mvOsPrintf("3.\n");)
+				break;
+			case DDR2_CL_4: 
+				sdramMode |= SDRAM_DDR2_CL_4;
+				DB(mvOsPrintf("4.\n");)
+				break;
+			case DDR2_CL_5: 
+				sdramMode |= SDRAM_DDR2_CL_5;
+				DB(mvOsPrintf("5.\n");)
+				break;
+			case DDR2_CL_6: 
+				sdramMode |= SDRAM_DDR2_CL_6;
+				DB(mvOsPrintf("6.\n");)
+				break;
+			default:
+				mvOsPrintf("\nsdramModeRegCalc ERROR: Max. CL out of range\n");
+				return -1;
+        }
+
+	DB(mvOsPrintf("\nsdramModeRegCalc register 0x%x\n", sdramMode ));
+
+	return sdramMode;
+}
+/*******************************************************************************
+* sdramExtModeRegCalc - Calculate sdram Extended mode register
+*
+* DESCRIPTION: 
+*		Return sdram Extended mode register value based
+*		on the bank info parameters and bank presence.
+*
+* INPUT:
+*	pBankInfo - sdram bank parameters
+*	busClk - DRAM frequency
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       sdram Extended mode reg value.
+*
+*******************************************************************************/
+static MV_U32 sdramExtModeRegCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 busClk)
+{
+	MV_U32 populateBanks = 0;
+	int bankNum;
+
+		/* Represent the populate banks in binary form */
+		for(bankNum = 0; bankNum < MV_DRAM_MAX_CS; bankNum++)
+		{
+			if (0 != pBankInfo[bankNum].size)
+			{
+				populateBanks |= (1 << bankNum);
+			}
+		}
+	
+		switch(populateBanks)
+		{
+			case(BANK_PRESENT_CS0):
+			case(BANK_PRESENT_CS0_CS1):
+				return DDR_SDRAM_EXT_MODE_CS0_CS1_DV;
+		
+			case(BANK_PRESENT_CS0_CS2):
+			case(BANK_PRESENT_CS0_CS1_CS2):
+			case(BANK_PRESENT_CS0_CS2_CS3):
+			case(BANK_PRESENT_CS0_CS2_CS3_CS4):
+				if (busClk >= MV_BOARD_SYSCLK_267MHZ)
+				    return DDR_SDRAM_EXT_MODE_FAST_CS0_CS1_CS2_CS3_DV;
+				else
+				    return DDR_SDRAM_EXT_MODE_CS0_CS1_CS2_CS3_DV;
+		
+			default:
+				mvOsPrintf("sdramExtModeRegCalc: Invalid DRAM bank presence\n");
+				return -1;
+		} 
+	return 0;
+}
+
+/*******************************************************************************
+* dunitCtrlLowRegCalc - Calculate sdram dunit control low register
+*
+* DESCRIPTION: Calculate sdram dunit control low register optimized value based
+*			on the bank info parameters and the minCas.
+*
+* INPUT:
+*	pBankInfo - sdram bank parameters
+*	minCas	  - minimum CAS supported. 
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       sdram dunit control low reg value.
+*
+*******************************************************************************/
+static MV_U32 dunitCtrlLowRegCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 minCas, MV_U32  busClk, MV_STATUS TTMode)
+{
+	MV_U32 dunitCtrlLow, cl;
+	MV_U32 sbOutR[4]={3,5,7,9} ;
+	MV_U32 sbOutU[4]={1,3,5,7} ;
+	MV_U32 ctrlId = mvCtrlModelGet();
+	
+    	dunitCtrlLow = MV_REG_READ(SDRAM_DUNIT_CTRL_REG);
+
+        DB(mvOsPrintf("Dram: dunitCtrlLowRegCalc\n"));
+
+	/* Clear StBurstOutDel field */
+	dunitCtrlLow &= ~SDRAM_SB_OUT_MASK;
+	
+	/* Clear StBurstInDel field */
+	dunitCtrlLow &= ~SDRAM_SB_IN_MASK;
+
+	/* Clear CtrlPos field */
+	dunitCtrlLow &= ~SDRAM_CTRL_POS_MASK;
+
+	/* Clear 2T field */
+	dunitCtrlLow &= ~SDRAM_2T_MASK;
+	if (TTMode == MV_TRUE)
+	{
+		dunitCtrlLow |= SDRAM_2T_MODE;
+	}
+	
+	/* For proper sample of read data set the Dunit Control register's      */
+	/* stBurstInDel bits [27:24]                                            */
+	/*		200MHz - 266MHz None reg  = CL + 2			*/
+	/*		200MHz - 266MHz reg	  = CL + 3			*/
+	/*		266MHz - 333MHz None reg  = CL + 3			*/
+	/*		266MHz - 333MHz reg	  = CL + 4			*/
+	
+	/* For proper sample of read data set the Dunit Control register's      */
+	/* stBurstOutDel bits [23:20]                                           */
+			/********-********-********-********-
+			*  CL=3  |  CL=4  |  CL=5  |  CL=6  |
+			*********-********-********-********-
+	Not Reg.	*  0001  |  0011  |  0101  |  0111  |
+			*********-********-********-********-
+	Registered	*  0011  |  0101  |  0111  |  1001  |
+			*********-********-********-********/
+    
+		/* Set Dunit Control low default value */
+		dunitCtrlLow |= SDRAM_DUNIT_CTRL_LOW_DDR2_DV; 
+
+		switch (minCas)
+		{
+			case DDR2_CL_3: cl = 3; break;
+			case DDR2_CL_4: cl = 4; break;
+			case DDR2_CL_5: cl = 5; break;
+			case DDR2_CL_6: cl = 6; break;
+			default:
+				mvOsPrintf("Dram: dunitCtrlLowRegCalc Max. CL out of range %d\n", minCas);
+				return -1;
+		}
+
+		/* registerd DDR SDRAM? */
+		if (pBankInfo->registeredAddrAndControlInputs == MV_TRUE)
+		{
+		    #if 0
+			if ( ( (MV_78100_DEV_ID == ctrlId) || (MV_78200_DEV_ID == ctrlId) ) &&
+				(busClk > MV_BOARD_SYSCLK_333MHZ) )
+				/* Add 0.5 clk cycle to SBout on DD with DRAM clock 400MHz */
+			dunitCtrlLow |= (sbOutR[cl-3] + 1) << SDRAM_SB_OUT_DEL_OFFS;
+			else
+		    #endif
+			dunitCtrlLow |= (sbOutR[cl-3]) << SDRAM_SB_OUT_DEL_OFFS;
+		}
+		else
+		{
+		    #if 0
+			if ( ( (MV_78100_DEV_ID == ctrlId) || (MV_78200_DEV_ID == ctrlId) ) &&
+				(busClk > MV_BOARD_SYSCLK_333MHZ) )
+				/* Add 0.5 clk cycle to SBout on DD with DRAM clock 400MHz */
+			dunitCtrlLow |= (sbOutU[cl-3] + 1) << SDRAM_SB_OUT_DEL_OFFS;
+			else
+		    #endif
+			dunitCtrlLow |= (sbOutU[cl-3]) << SDRAM_SB_OUT_DEL_OFFS;
+		}
+
+		DB(mvOsPrintf("\n\ndunitCtrlLowRegCalc: CL = %d, frequencies=%d\n", cl, busClk));
+
+		if (busClk > MV_BOARD_SYSCLK_333MHZ)
+		{
+			if (pBankInfo->registeredAddrAndControlInputs == MV_TRUE)
+				cl = cl + 5;
+			else
+				cl = cl + 4;
+		}
+		else if (busClk >= MV_BOARD_SYSCLK_267MHZ)
+		{
+			if (pBankInfo->registeredAddrAndControlInputs == MV_TRUE)
+				cl = cl + 4;
+			else
+				cl = cl + 3;
+		}
+		else if (busClk >= MV_BOARD_SYSCLK_200MHZ)
+		{
+			if (pBankInfo->registeredAddrAndControlInputs == MV_TRUE)
+				cl = cl + 3;
+			else
+				cl = cl + 2;
+
+			if ((MV_78100_DEV_ID == ctrlId) || (MV_78200_DEV_ID == ctrlId))
+				cl = cl + 1;
+
+			dunitCtrlLow |= SDRAM_CTRL_POS_RISE;
+		}
+		
+        DB(mvOsPrintf("dunitCtrlLowRegCalc: SDRAM_SB_IN_DEL_OFFS = %d \n", cl));
+		dunitCtrlLow |= cl << SDRAM_SB_IN_DEL_OFFS;
+
+	DB(mvOsPrintf("Dram: Reg dunit control low = %x\n", dunitCtrlLow ));
+
+	return dunitCtrlLow;
+}  
+
+/*******************************************************************************
+* dunitCtrlHighRegCalc - Calculate sdram dunit control high register
+*
+* DESCRIPTION: Calculate sdram dunit control high register optimized value based
+*			on the bus clock.
+*
+* INPUT:
+*	busClk	  - DRAM frequency. 
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       sdram dunit control high reg value.
+*
+*******************************************************************************/
+static MV_U32 dunitCtrlHighRegCalc(MV_U32  busClk)
+{
+	MV_U32 dunitCtrlHigh;
+	dunitCtrlHigh = MV_REG_READ(SDRAM_DUNIT_CTRL_HI_REG);
+	if(busClk == MV_BOARD_SYSCLK_400MHZ) 
+		dunitCtrlHigh |= (SDRAM__D2P_EN | SDRAM__P2D_EN);
+	else
+		dunitCtrlHigh &= ~(SDRAM__D2P_EN | SDRAM__P2D_EN);
+	
+	if(busClk >= MV_BOARD_SYSCLK_267MHZ) 
+	    dunitCtrlHigh |= (SDRAM__WR_MESH_DELAY_EN | SDRAM__PUP_ZERO_SKEW_EN | SDRAM__ADD_HALF_FCC_EN);
+
+	return dunitCtrlHigh;
+}
+
+/*******************************************************************************
+* sdramAddrCtrlRegCalc - Calculate sdram address control register
+*
+* DESCRIPTION: Calculate sdram address control register optimized value based
+*			on the bank info parameters and the minCas.
+*
+* INPUT:
+*	pBankInfo - sdram bank parameters
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       sdram address control reg value.
+*
+*******************************************************************************/
+static MV_U32 sdramAddrCtrlRegCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_DRAM_BANK_INFO *pBankInfoDIMM1)
+{
+	MV_U32 addrCtrl = 0;
+	
+	if (pBankInfoDIMM1->size)
+	{
+		switch (pBankInfoDIMM1->sdramWidth)
+		{
+			case 4:  /* memory is x4 */
+				mvOsPrintf("sdramAddrCtrlRegCalc: Error - x4 not supported!\n");
+				return -1;
+				break;
+			case 8:  /* memory is x8 */
+				addrCtrl |= SDRAM_ADDRSEL_X8(2) | SDRAM_ADDRSEL_X8(3);
+				DB(mvOsPrintf("sdramAddrCtrlRegCalc: sdramAddrCtrlRegCalc SDRAM device DIMM2 width x8\n"));
+				break;
+			case 16:
+				addrCtrl |= SDRAM_ADDRSEL_X16(2) | SDRAM_ADDRSEL_X16(3);
+				DB(mvOsPrintf("sdramAddrCtrlRegCalc: sdramAddrCtrlRegCalc SDRAM device DIMM2 width x16\n"));
+				break;
+			default: /* memory width unsupported */
+				mvOsPrintf("sdramAddrCtrlRegCalc: ERR. DRAM chip width is unknown!\n");
+				return -1;
+		}
+	}
+
+	switch (pBankInfo->sdramWidth)
+	{
+		case 4:  /* memory is x4 */
+			mvOsPrintf("sdramAddrCtrlRegCalc: Error - x4 not supported!\n");
+			return -1;
+			break;
+		case 8:  /* memory is x8 */
+			addrCtrl |= SDRAM_ADDRSEL_X8(0) | SDRAM_ADDRSEL_X8(1);
+			DB(mvOsPrintf("sdramAddrCtrlRegCalc: sdramAddrCtrlRegCalc SDRAM device width x8\n"));
+			break;
+		case 16:
+			addrCtrl |= SDRAM_ADDRSEL_X16(0) | SDRAM_ADDRSEL_X16(1);
+			DB(mvOsPrintf("sdramAddrCtrlRegCalc: sdramAddrCtrlRegCalc SDRAM device width x16\n"));
+			break;
+		default: /* memory width unsupported */
+			mvOsPrintf("sdramAddrCtrlRegCalc: ERR. DRAM chip width is unknown!\n");
+			return -1;
+	}
+
+	/* Note that density is in MB units */
+	switch (pBankInfo->deviceDensity) 
+	{
+		case 256:                 /* 256 Mbit */
+			DB(mvOsPrintf("DRAM Device Density 256Mbit\n"));
+			addrCtrl |= SDRAM_DSIZE_256Mb(0) | SDRAM_DSIZE_256Mb(1);
+			break;
+		case 512:                /* 512 Mbit */
+			DB(mvOsPrintf("DRAM Device Density 512Mbit\n"));
+			addrCtrl |= SDRAM_DSIZE_512Mb(0) | SDRAM_DSIZE_512Mb(1);
+			break;
+		case 1024:                /* 1 Gbit */
+			DB(mvOsPrintf("DRAM Device Density 1Gbit\n"));
+			addrCtrl |= SDRAM_DSIZE_1Gb(0) | SDRAM_DSIZE_1Gb(1);
+			break;
+		case 2048:                /* 2 Gbit */
+			DB(mvOsPrintf("DRAM Device Density 2Gbit\n"));
+			addrCtrl |= SDRAM_DSIZE_2Gb(0) | SDRAM_DSIZE_2Gb(1);
+			break;
+		default:
+			mvOsPrintf("Dram: sdramAddrCtrl unsupported RAM-Device size %d\n",
+                       pBankInfo->deviceDensity);
+			return -1;
+        }
+
+	if (pBankInfoDIMM1->size)
+	{
+		switch (pBankInfoDIMM1->deviceDensity) 
+		{
+			case 256:                 /* 256 Mbit */
+				DB(mvOsPrintf("DIMM2: DRAM Device Density 256Mbit\n"));
+				addrCtrl |= SDRAM_DSIZE_256Mb(2) | SDRAM_DSIZE_256Mb(3);
+				break;
+			case 512:                /* 512 Mbit */
+				DB(mvOsPrintf("DIMM2: DRAM Device Density 512Mbit\n"));
+				addrCtrl |= SDRAM_DSIZE_512Mb(2) | SDRAM_DSIZE_512Mb(3);
+				break;
+			case 1024:                /* 1 Gbit */
+				DB(mvOsPrintf("DIMM2: DRAM Device Density 1Gbit\n"));
+				addrCtrl |= SDRAM_DSIZE_1Gb(2) | SDRAM_DSIZE_1Gb(3);
+				break;
+			case 2048:                /* 2 Gbit */
+				DB(mvOsPrintf("DIMM2: DRAM Device Density 2Gbit\n"));
+				addrCtrl |= SDRAM_DSIZE_2Gb(2) | SDRAM_DSIZE_2Gb(3);
+				break;
+			default:
+				mvOsPrintf("DIMM2: Dram: sdramAddrCtrl unsupported RAM-Device size %d\n",
+						   pBankInfoDIMM1->deviceDensity);
+				return -1;
+		}
+	}
+	/* SDRAM address control */
+	DB(mvOsPrintf("Dram: setting sdram address control with: %x \n", addrCtrl));
+
+	return addrCtrl;
+}
+
+/*******************************************************************************
+* sdramTimeCtrlLowRegCalc - Calculate sdram timing control low register
+*
+* DESCRIPTION: 
+*       This function calculates sdram timing control low register 
+*       optimized value based on the bank info parameters and the minCas.
+*
+* INPUT:
+*	    pBankInfo - sdram bank parameters
+*	minCas	  - minimum CAS supported. 
+*       busClk    - Bus clock
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       sdram timing control low reg value.
+*
+*******************************************************************************/
+static MV_U32 sdramTimeCtrlLowRegCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 minCas, MV_U32 busClk)
+{
+    MV_U32 tRp  = 0;
+    MV_U32 tRrd = 0;
+    MV_U32 tRcd = 0;
+    MV_U32 tRas = 0;
+    MV_U32 tWr  = 0;
+    MV_U32 tWtr = 0;
+    MV_U32 tRtp = 0;
+    MV_U32 timeCtrlLow = 0;
+	
+    MV_U32 bankNum;
+    
+    busClk = busClk / 1000000;    /* In MHz */
+
+    /* Scan all DRAM banks to find maximum timing values */
+    for (bankNum = 0; bankNum < MV_DRAM_MAX_CS; bankNum++)
+    {
+        tRp  = MV_MAX(tRp,  pBankInfo[bankNum].minRowPrechargeTime);
+        tRrd = MV_MAX(tRrd, pBankInfo[bankNum].minRowActiveToRowActive);
+        tRcd = MV_MAX(tRcd, pBankInfo[bankNum].minRasToCasDelay);
+        tRas = MV_MAX(tRas, pBankInfo[bankNum].minRasPulseWidth);
+    }
+
+    /* Extract timing (in ns) from SPD value. We ignore the tenth ns part.  */
+    /* by shifting the data two bits right.                                 */
+    tRp  = tRp  >> 2;    /* For example 0x50 -> 20ns                        */
+    tRrd = tRrd >> 2;
+    tRcd = tRcd >> 2;
+	
+    /* Extract clock cycles from time parameter. We need to round up        */
+    tRp  = ((busClk * tRp)  / 1000) + (((busClk * tRp)  % 1000) ? 1 : 0);
+    DB(mvOsPrintf("Dram  Timing Low: tRp = %d ", tRp));
+    tRrd = ((busClk * tRrd) / 1000) + (((busClk * tRrd) % 1000) ? 1 : 0);
+	/* JEDEC min reqeirments tRrd = 2 */
+	if (tRrd < 2)
+		tRrd = 2;
+    DB(mvOsPrintf("tRrd = %d ", tRrd));
+    tRcd = ((busClk * tRcd) / 1000) + (((busClk * tRcd) % 1000) ? 1 : 0);
+    DB(mvOsPrintf("tRcd = %d ", tRcd));
+    tRas = ((busClk * tRas) / 1000) + (((busClk * tRas) % 1000) ? 1 : 0);
+    DB(mvOsPrintf("tRas = %d ", tRas));
+
+    /* tWr and tWtr is different for DDR1 and DDR2. tRtp is only for DDR2   */
+	/* Scan all DRAM banks to find maximum timing values */
+	for (bankNum = 0; bankNum < MV_DRAM_MAX_CS; bankNum++)
+	{
+	    tWr  = MV_MAX(tWr,  pBankInfo[bankNum].minWriteRecoveryTime);
+	    tWtr = MV_MAX(tWtr, pBankInfo[bankNum].minWriteToReadCmdDelay);
+	    tRtp = MV_MAX(tRtp, pBankInfo[bankNum].minReadToPrechCmdDelay);
+	}
+	
+	/* Extract timing (in ns) from SPD value. We ignore the tenth ns    */
+	/* part by shifting the data two bits right.                        */
+	tWr  = tWr  >> 2;    /* For example 0x50 -> 20ns                    */
+	tWtr = tWtr >> 2;
+	tRtp = tRtp >> 2;
+	/* Extract clock cycles from time parameter. We need to round up    */
+	tWr  = ((busClk * tWr)  / 1000) + (((busClk * tWr)  % 1000) ? 1 : 0);
+	DB(mvOsPrintf("tWr = %d ", tWr));
+	tWtr = ((busClk * tWtr) / 1000) + (((busClk * tWtr) % 1000) ? 1 : 0);
+	/* JEDEC min reqeirments tWtr = 2 */
+	if (tWtr < 2)
+		tWtr = 2;
+	DB(mvOsPrintf("tWtr = %d ", tWtr));
+	tRtp = ((busClk * tRtp) / 1000) + (((busClk * tRtp) % 1000) ? 1 : 0);
+	/* JEDEC min reqeirments tRtp = 2 */
+	if (tRtp < 2)
+	tRtp = 2;
+	DB(mvOsPrintf("tRtp = %d ", tRtp));
+
+	/* Note: value of 0 in register means one cycle, 1 means two and so on  */
+	timeCtrlLow = (((tRp  - 1) << SDRAM_TRP_OFFS) |
+		    ((tRrd - 1) << SDRAM_TRRD_OFFS) |
+		    ((tRcd - 1) << SDRAM_TRCD_OFFS) |
+		    (((tRas - 1) << SDRAM_TRAS_OFFS) & SDRAM_TRAS_MASK)|
+		    ((tWr  - 1) << SDRAM_TWR_OFFS)  |
+		    ((tWtr - 1) << SDRAM_TWTR_OFFS)	|
+		    ((tRtp - 1) << SDRAM_TRTP_OFFS));
+	
+	/* Check extended tRas bit */
+	if ((tRas - 1) & BIT4)
+	    timeCtrlLow |= (1 << SDRAM_EXT_TRAS_OFFS);
+
+	return timeCtrlLow;
+}
+
+/*******************************************************************************
+* sdramTimeCtrlHighRegCalc - Calculate sdram timing control high register
+*
+* DESCRIPTION: 
+*       This function calculates sdram timing control high register 
+*       optimized value based on the bank info parameters and the bus clock.
+*
+* INPUT:
+*	    pBankInfo - sdram bank parameters
+*       busClk    - Bus clock
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       sdram timing control high reg value.
+*
+*******************************************************************************/
+static MV_U32 sdramTimeCtrlHighRegCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 busClk)
+{
+	MV_U32 tRfc;
+	MV_U32 timingHigh;
+	MV_U32 timeNs = 0;
+	MV_U32 bankNum;
+	
+	busClk = busClk / 1000000;    /* In MHz */
+
+	/* Set DDR timing high register static configuration bits */
+	timingHigh = MV_REG_READ(SDRAM_TIMING_CTRL_HIGH_REG);
+	
+	/* Set DDR timing high register default value */
+	timingHigh |= SDRAM_TIMING_CTRL_HIGH_REG_DV;  
+	
+	/* Clear tRfc field */
+	timingHigh &= ~SDRAM_TRFC_MASK;
+
+	/* Scan all DRAM banks to find maximum timing values */
+	for (bankNum = 0; bankNum < MV_DRAM_MAX_CS; bankNum++)
+	{
+		timeNs = MV_MAX(timeNs,  pBankInfo[bankNum].minRefreshToActiveCmd);
+		DB(mvOsPrintf("Dram:  Timing High: minRefreshToActiveCmd = %d\n", 
+				pBankInfo[bankNum].minRefreshToActiveCmd));
+	}
+	
+	tRfc = ((busClk * timeNs)  / 1000) + (((busClk * timeNs)  % 1000) ? 1 : 0);
+	/* Note: value of 0 in register means one cycle, 1 means two and so on  */
+	DB(mvOsPrintf("Dram:  Timing High: tRfc = %d\n", tRfc));
+	timingHigh |= (((tRfc - 1) & SDRAM_TRFC_MASK) << SDRAM_TRFC_OFFS);
+	DB(mvOsPrintf("Dram:  Timing High: tRfc = %d\n", tRfc));
+	
+	/* SDRAM timing high */
+	DB(mvOsPrintf("Dram: setting timing high with: %x \n", timingHigh));
+
+	return timingHigh;
+}
+/*******************************************************************************
+* sdramDDr2OdtConfig - Set DRAM DDR2 On Die Termination registers.
+*
+* DESCRIPTION: 
+*       This function config DDR2 On Die Termination (ODT) registers.
+*	
+* INPUT:
+*		pBankInfo - bank info parameters.
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       None
+*******************************************************************************/
+static void sdramDDr2OdtConfig(MV_DRAM_BANK_INFO *pBankInfo)
+{
+	MV_U32 populateBanks = 0;
+	MV_U32 odtCtrlLow, odtCtrlHigh, dunitOdtCtrl;
+	int bankNum;
+	
+	/* Represent the populate banks in binary form */
+	for(bankNum = 0; bankNum < MV_DRAM_MAX_CS; bankNum++)
+	{
+		if (0 != pBankInfo[bankNum].size)
+		{
+				populateBanks |= (1 << bankNum);
+			}
+		}
+	
+	switch(populateBanks)
+	{
+		case(BANK_PRESENT_CS0):
+		case(BANK_PRESENT_CS0_CS1):
+			odtCtrlLow   = DDR2_ODT_CTRL_LOW_CS0_CS1_DV;
+			odtCtrlHigh  = DDR2_ODT_CTRL_HIGH_CS0_CS1_DV;
+			dunitOdtCtrl = DDR2_DUNIT_ODT_CTRL_CS0_CS1_DV;
+			break;
+		case(BANK_PRESENT_CS0_CS2):
+		case(BANK_PRESENT_CS0_CS1_CS2):
+		case(BANK_PRESENT_CS0_CS2_CS3):
+		case(BANK_PRESENT_CS0_CS2_CS3_CS4):
+			odtCtrlLow   = DDR2_ODT_CTRL_LOW_CS0_CS1_CS2_CS3_DV;
+			odtCtrlHigh  = DDR2_ODT_CTRL_HIGH_CS0_CS1_CS2_CS3_DV;
+			dunitOdtCtrl = DDR2_DUNIT_ODT_CTRL_CS0_CS1_CS2_CS3_DV;
+			break;
+		default:
+			DB(mvOsPrintf("sdramDDr2OdtConfig: Invalid DRAM bank presence\n"));
+			return;
+	}
+ 	/* DDR2 SDRAM ODT ctrl low  */
+	DB(mvOsPrintf("Dram: DDR2 setting ODT ctrl low with: %x \n", odtCtrlLow));
+	MV_REG_WRITE(DRAM_BUF_REG7, odtCtrlLow);
+
+ 	/* DDR2 SDRAM ODT ctrl high  */
+	DB(mvOsPrintf("Dram: DDR2 setting ODT ctrl high with: %x \n", odtCtrlHigh));
+	MV_REG_WRITE(DRAM_BUF_REG8, odtCtrlHigh);
+
+	/* DDR2 DUNIT ODT ctrl  */
+	if ( ((mvCtrlModelGet() == MV_78XX0_DEV_ID) && (mvCtrlRevGet() == MV_78XX0_Y0_REV)) ||
+		(mvCtrlModelGet() == MV_78100_DEV_ID) ||
+		(mvCtrlModelGet() == MV_78200_DEV_ID) )
+		dunitOdtCtrl &= ~(BIT9|BIT8); /* Clear ODT always on */
+
+	DB(mvOsPrintf("DUNIT: DDR2 setting ODT ctrl with: %x \n", dunitOdtCtrl));
+	MV_REG_WRITE(DRAM_BUF_REG9, dunitOdtCtrl);
+	return;
+}
+/*******************************************************************************
+* sdramDdr2TimeLoRegCalc - Set DDR2 DRAM Timing Low registers.
+*
+* DESCRIPTION: 
+*       This function config DDR2 DRAM Timing low registers.
+*	
+* INPUT:
+*	minCas	  - minimum CAS supported. 
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       DDR2 sdram timing low reg value.
+*******************************************************************************/
+static MV_U32 sdramDdr2TimeLoRegCalc(MV_U32 minCas)
+{
+	MV_U8 cl = -1;
+	MV_U32 ddr2TimeLoReg;
+
+	/* read and clear the feilds we are going to set */
+	ddr2TimeLoReg = MV_REG_READ(SDRAM_DDR2_TIMING_LO_REG);
+	ddr2TimeLoReg &= ~(SD2TLR_TODT_ON_RD_MASK	| 
+			   SD2TLR_TODT_OFF_RD_MASK	| 
+			   SD2TLR_TODT_ON_CTRL_RD_MASK	|
+			   SD2TLR_TODT_OFF_CTRL_RD_MASK);
+
+	if( minCas == DDR2_CL_3 )
+	{
+		cl = 3;
+	}
+	else if( minCas == DDR2_CL_4 )
+	{
+		cl = 4;
+	}
+	else if( minCas == DDR2_CL_5 )
+	{
+		cl = 5;
+	}
+	else if( minCas == DDR2_CL_6 )
+	{
+		cl = 6;
+	}
+	else
+	{
+		DB(mvOsPrintf("sdramDdr2TimeLoRegCalc: CAS latency %d unsupported. using CAS latency 4\n",
+				minCas));
+		cl = 4;
+	}
+
+	ddr2TimeLoReg |= ((cl-3) << SD2TLR_TODT_ON_RD_OFFS);
+	ddr2TimeLoReg |= ( cl << SD2TLR_TODT_OFF_RD_OFFS);
+	ddr2TimeLoReg |= ( cl << SD2TLR_TODT_ON_CTRL_RD_OFFS);
+	ddr2TimeLoReg |= ((cl+3) << SD2TLR_TODT_OFF_CTRL_RD_OFFS);
+
+	/* DDR2 SDRAM timing low */
+	DB(mvOsPrintf("Dram: DDR2 setting timing low with: %x \n", ddr2TimeLoReg));
+
+	return ddr2TimeLoReg;
+}
+
+/*******************************************************************************
+* sdramDdr2TimeHiRegCalc - Set DDR2 DRAM Timing High registers.
+*
+* DESCRIPTION: 
+*       This function config DDR2 DRAM Timing high registers.
+*	
+* INPUT:
+*	minCas	  - minimum CAS supported. 
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       DDR2 sdram timing high reg value.
+*******************************************************************************/
+static MV_U32 sdramDdr2TimeHiRegCalc(MV_U32 minCas)
+{
+	MV_U8 cl = -1;
+	MV_U32 ddr2TimeHiReg;
+
+	/* read and clear the feilds we are going to set */
+	ddr2TimeHiReg = MV_REG_READ(SDRAM_DDR2_TIMING_HI_REG);
+	ddr2TimeHiReg &= ~(SD2THR_TODT_ON_WR_MASK	|
+			   SD2THR_TODT_OFF_WR_MASK	|
+			   SD2THR_TODT_ON_CTRL_WR_MASK	|
+			   SD2THR_TODT_OFF_CTRL_WR_MASK);
+
+	if( minCas == DDR2_CL_3 )
+	{
+		cl = 3;
+	}
+	else if( minCas == DDR2_CL_4 )
+	{
+		cl = 4;
+	}
+	else if( minCas == DDR2_CL_5 )
+	{
+		cl = 5;
+	}
+	else if( minCas == DDR2_CL_6 )
+	{
+		cl = 6;
+	}
+	else
+	{
+		mvOsPrintf("sdramDdr2TimeHiRegCalc: CAS latency %d unsupported. using CAS latency 4\n", 
+				minCas);
+		cl = 4;
+	}
+
+	ddr2TimeHiReg |= ((cl-3) << SD2THR_TODT_ON_WR_OFFS);
+	ddr2TimeHiReg |= ( cl << SD2THR_TODT_OFF_WR_OFFS);
+	ddr2TimeHiReg |= ( cl << SD2THR_TODT_ON_CTRL_WR_OFFS);
+	ddr2TimeHiReg |= ((cl+3) << SD2THR_TODT_OFF_CTRL_WR_OFFS);
+
+	/* DDR2 SDRAM timin high  */
+	DB(mvOsPrintf("Dram: DDR2 setting timing high with: %x \n", ddr2TimeHiReg));
+
+	return ddr2TimeHiReg;
+}
+#endif
+
+/*******************************************************************************
+* mvDramIfCalGet - Get CAS Latency
+*
+* DESCRIPTION: 
+*       This function get the CAS Latency.
+*
+* INPUT:
+*       None
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       CAS latency times 10 (to avoid using floating point).
+*
+*******************************************************************************/
+MV_U32 mvDramIfCalGet(void)
+{
+	MV_U32 sdramCasLat, casLatMask;
+	
+    casLatMask = (MV_REG_READ(SDRAM_MODE_REG) & SDRAM_CL_MASK);
+
+    switch (casLatMask)
+    {
+        case SDRAM_DDR2_CL_3: 
+            sdramCasLat = 30;
+            break;
+        case SDRAM_DDR2_CL_4: 
+            sdramCasLat = 40;
+            break;
+        case SDRAM_DDR2_CL_5: 
+            sdramCasLat = 50;
+            break;
+        case SDRAM_DDR2_CL_6: 
+            sdramCasLat = 60;
+            break;
+        default:
+            mvOsPrintf("mvDramIfCalGet: Err, unknown DDR2 CAL\n");
+            return -1;
+    }                                  
+    
+    return sdramCasLat;
+}
+
+
+/*******************************************************************************
+* mvDramIfSelfRefreshSet - Put the dram in self refresh mode - 
+*
+* DESCRIPTION: 
+*               add support in power management.
+*                          
+*
+* INPUT:
+*       None
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       None
+*
+*******************************************************************************/
+
+MV_VOID mvDramIfSelfRefreshSet()
+{
+    MV_U32 operReg;
+
+      operReg =  MV_REG_READ(SDRAM_OPERATION_REG);
+      MV_REG_WRITE(SDRAM_OPERATION_REG ,operReg |SDRAM_CMD_SLF_RFRSH);
+      /* Read until register is reset to 0 */
+      while(MV_REG_READ(SDRAM_OPERATION_REG));
+}
+/*******************************************************************************
+* mvDramIfDimGetSPDversion - return DIMM SPD version.
+*
+* DESCRIPTION:
+*		This function prints the DRAM controller information.
+*
+* INPUT:
+*		None.
+*
+* OUTPUT:
+*		None.
+*
+* RETURN:
+*		None.
+*
+*******************************************************************************/
+static void mvDramIfDimGetSPDversion(MV_U32 *pMajor, MV_U32 *pMinor, MV_U32 bankNum)
+{
+	MV_DIMM_INFO dimmInfo;
+	if (bankNum >= MV_DRAM_MAX_CS )
+	{
+		DB(mvOsPrintf("Dram: mvDramIfDimGetSPDversion bad params \n")); 
+		return ;
+	}
+	memset(&dimmInfo,0,sizeof(dimmInfo));
+	if ( MV_OK != dimmSpdGet((MV_U32)(bankNum/2), &dimmInfo))
+	{
+		DB(mvOsPrintf("Dram: ERR dimmSpdGet failed to get dimm info \n"));
+		return ;
+	}
+	*pMajor = dimmInfo.spdRawData[DIMM_SPD_VERSION]/10;
+	*pMinor = dimmInfo.spdRawData[DIMM_SPD_VERSION]%10;
+}
+/*******************************************************************************
+* mvDramIfShow - Show DRAM controller information.
+*
+* DESCRIPTION:
+*		This function prints the DRAM controller information.
+*
+* INPUT:
+*		None.
+*
+* OUTPUT:
+*		None.
+*
+* RETURN:
+*		None.
+*
+*******************************************************************************/
+void mvDramIfShow(void)
+{
+    int i, sdramCasLat, sdramCsSize;
+	MV_U32 Major=0, Minor=0;
+    
+    mvOsPrintf("DRAM Controller info:\n");
+    
+    mvOsPrintf("Total DRAM ");
+    mvSizePrint(mvDramIfSizeGet());
+    mvOsPrintf("\n");
+
+	for(i = 0; i < MV_DRAM_MAX_CS; i++)
+	{ 
+        sdramCsSize = mvDramIfBankSizeGet(i);
+        if (sdramCsSize)
+        {
+			if (0 == (i & 1))
+			{
+				mvDramIfDimGetSPDversion(&Major, &Minor,i);
+				mvOsPrintf("DIMM %d version %d.%d\n", i/2, Major, Minor);
+			}
+            mvOsPrintf("\tDRAM CS[%d] ", i);
+            mvSizePrint(sdramCsSize);
+            mvOsPrintf("\n");
+        }
+    }
+    sdramCasLat = mvDramIfCalGet();
+
+    if (MV_REG_READ(SDRAM_CONFIG_REG) & SDRAM_ECC_EN)
+    {
+        mvOsPrintf("ECC enabled, ");
+    }
+    else
+    {
+        mvOsPrintf("ECC Disabled, ");
+    }
+    
+    if (MV_REG_READ(SDRAM_CONFIG_REG) & SDRAM_REGISTERED)
+    {
+        mvOsPrintf("Registered DIMM\n");
+    }
+    else
+    {
+        mvOsPrintf("Non registered DIMM\n");
+    }
+
+    mvOsPrintf("Configured CAS Latency %d.%d\n", sdramCasLat/10, sdramCasLat%10);
+}
+/*******************************************************************************
+* mvDramIfGetFirstCS - find the  DRAM bank on the lower address
+* 
+*
+* DESCRIPTION:
+*       This function return the fisrt CS on address 0
+*
+* INPUT:
+*		None.
+*
+* OUTPUT:
+*		None.
+*
+* RETURN:
+*       SDRAM_CS0 or SDRAM_CS2
+*
+*******************************************************************************/
+MV_U32 mvDramIfGetFirstCS(void)
+{
+	MV_DRAM_BANK_INFO bankInfo[MV_DRAM_MAX_CS];
+
+	if (DRAM_CS_Order[0] == N_A)
+	{
+		mvDramBankInfoGet(SDRAM_CS0, &bankInfo[SDRAM_CS0]);
+		mvDramBankInfoGet(SDRAM_CS2, &bankInfo[SDRAM_CS2]);
+		
+		if (bankInfo[SDRAM_CS0].size <  bankInfo[SDRAM_CS2].size)
+		{
+			DRAM_CS_Order[0] = SDRAM_CS2;
+			DRAM_CS_Order[1] = SDRAM_CS3;
+			DRAM_CS_Order[2] = SDRAM_CS0;
+			DRAM_CS_Order[3] = SDRAM_CS1;
+
+			return SDRAM_CS2;
+		}
+		DRAM_CS_Order[0] = SDRAM_CS0;
+		DRAM_CS_Order[1] = SDRAM_CS1;
+		DRAM_CS_Order[2] = SDRAM_CS2;
+		DRAM_CS_Order[3] = SDRAM_CS3;
+	
+		return SDRAM_CS0;
+	}
+	return DRAM_CS_Order[0];
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddr2/mvDramIfBasicInit.S
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddr2/mvDramIfBasicInit.S
@@ -0,0 +1,907 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#define	_ASMLANGUAGE
+#define MV_ASMLANGUAGE
+#include "mvSysHwConfig.h"
+#include "mvOsAsm.h"
+#include "mvBoardEnvSpec.h"
+#include "mvCpuIfRegs.h"
+#include "mvDramIfConfig.h"
+#include "mvDramIfRegs.h"
+#include "pex/mvPexRegs.h"
+#include "mvCtrlEnvSpec.h"
+#include "mvCtrlEnvAsm.h"
+#include "mvCommon.h"
+
+/* defines */
+
+#if defined(MV_STATIC_DRAM_ON_BOARD) 
+.globl dramBoot1
+dramBoot1:
+        .word   0
+
+/******************************************************************************
+*
+*
+*
+*
+*******************************************************************************/
+#if defined(DB_MV78XX0)
+/* DDR2 boards 512MB 333MHz */
+#define STATIC_SDRAM0_BANK0_SIZE		0x1ffffff1 /*	0x1504	*/ 
+#define STATIC_SDRAM_CONFIG	     		0x43048C30 /*	0x1400  */	
+#define STATIC_SDRAM_MODE	     		0x00000652 /*	0x141c  */	
+#define STATIC_DUNIT_CTRL_LOW			0x38543000 /*   0x1404  */  
+#define STATIC_DUNIT_CTRL_HI			0x0000FFFF /*   0x1424  */  
+#define STATIC_SDRAM_ADDR_CTRL			0x00000088 /*   0x1410  */  
+#define STATIC_SDRAM_TIME_CTRL_LOW		0x22125441 /*   0x1408  */  
+#define STATIC_SDRAM_TIME_CTRL_HI		0x00000829 /*   0x140c  */  
+#define STATIC_SDRAM_ODT_CTRL_LOW	     	0x84210000 /*   0x1494  */  
+#define STATIC_SDRAM_ODT_CTRL_HI	     	0x00000000 /*   0x1498  */  
+#define STATIC_SDRAM_DUNIT_ODT_CTRL    		0x0000E80F /*   0x149c  */  
+#define STATIC_SDRAM_EXT_MODE          		0x00000040 /*   0x1420  */  
+#define STATIC_SDRAM_DDR2_TIMING_LO		0x00085520 /*   0x1428  */  
+#define STATIC_SDRAM_DDR2_TIMING_HI		0x00008552 /*   0x147C  */  
+
+#elif defined(RD_MV78XX0_H3C)
+/* DDR2 boards 512MB 333MHz */
+#define STATIC_SDRAM0_BANK0_SIZE		0x1ffffff1 /*	0x1504	*/ 
+#define STATIC_SDRAM_CONFIG	     		0x43048a25 /*	0x1400  */	
+#define STATIC_SDRAM_MODE	     		0x00000652 /*	0x141c  */	
+#define STATIC_DUNIT_CTRL_LOW			0x38543000 /*   0x1404  */  
+#define STATIC_DUNIT_CTRL_HI			0x0000F07F /*   0x1424  */  
+#define STATIC_SDRAM_ADDR_CTRL			0x00000088 /*   0x1410  */  
+#define STATIC_SDRAM_TIME_CTRL_LOW		0x2202444e /*   0x1408  */  
+#define STATIC_SDRAM_TIME_CTRL_HI		0x00000822 /*   0x140c  */  
+#define STATIC_SDRAM_ODT_CTRL_LOW	     	0x84210000 /*   0x1494  */  
+#define STATIC_SDRAM_ODT_CTRL_HI	     	0x00000000 /*   0x1498  */  
+#define STATIC_SDRAM_DUNIT_ODT_CTRL    		0x0000EB0F /*   0x149c  */  
+#define STATIC_SDRAM_EXT_MODE          		0x00000040 /*   0x1420  */  
+#define STATIC_SDRAM_DDR2_TIMING_LO		0x00085520 /*   0x1428  */  
+#define STATIC_SDRAM_DDR2_TIMING_HI		0x00008552 /*   0x147C  */  
+#else
+/* DDR2 MV88F6281 boards 256MB 400MHz */
+#define STATIC_SDRAM0_BANK0_SIZE		0x0FFFFFF1 /*	0x1504	*/ 
+#define STATIC_SDRAM_CONFIG	     		0x43000c30 /*	0x1400  */	
+#define STATIC_SDRAM_MODE	     		0x00000C52 /*	0x141c  */	
+#define STATIC_DUNIT_CTRL_LOW			0x39543000 /*   0x1404  */  
+#define STATIC_DUNIT_CTRL_HI			0x0000F1FF /*   0x1424  */  
+#define STATIC_SDRAM_ADDR_CTRL			0x000000cc /*   0x1410  */  
+#define STATIC_SDRAM_TIME_CTRL_LOW		0x22125451 /*   0x1408  */  
+#define STATIC_SDRAM_TIME_CTRL_HI		0x00000833 /*   0x140c  */  
+#define STATIC_SDRAM_ODT_CTRL_LOW	     	0x003C0000 /*   0x1494  */  
+#define STATIC_SDRAM_ODT_CTRL_HI	     	0x00000000 /*   0x1498  */  
+#define STATIC_SDRAM_DUNIT_ODT_CTRL    		0x0000F80F /*   0x149c  */  
+#define STATIC_SDRAM_EXT_MODE          		0x00000042 /*   0x1420  */  
+#define STATIC_SDRAM_DDR2_TIMING_LO		0x00085520 /*   0x1428  */  
+#define STATIC_SDRAM_DDR2_TIMING_HI		0x00008552 /*   0x147C  */  
+#endif /* MV78XX0 */
+
+	.globl _mvDramIfStaticInit
+_mvDramIfStaticInit:
+
+	mov     r11, LR     		/* Save link register */
+	mov	r10, r2
+
+     	/*DDR SDRAM Initialization Control */
+	ldr	r6, =DSICR_INIT_EN
+	MV_REG_WRITE_ASM (r6, r1, DDR_SDRAM_INIT_CTRL_REG)
+2:	MV_REG_READ_ASM (r6, r1, DDR_SDRAM_INIT_CTRL_REG)
+         and    r6, r6, #DSICR_INIT_EN
+         cmp    r6, #0
+         bne 2b
+
+        /* If we boot from NAND jump to DRAM address */
+        mov     r5, #1
+        ldr     r6, =dramBoot1
+        str     r5, [r6]                /* We started executing from DRAM */
+
+        ldr     r6, dramBoot1
+        cmp     r6, #0
+        bne     1f
+
+	/* set all dram windows to 0 */
+	mov	r6, #0
+	MV_REG_WRITE_ASM(r6, r5, SDRAM_SIZE_REG(0,0))
+	MV_REG_WRITE_ASM(r6, r5, SDRAM_SIZE_REG(0,1))
+	MV_REG_WRITE_ASM(r6, r5, SDRAM_SIZE_REG(0,2))
+	MV_REG_WRITE_ASM(r6, r5, SDRAM_SIZE_REG(0,3))
+	ldr	r6, = STATIC_SDRAM0_BANK0_SIZE
+	MV_REG_WRITE_ASM(r6, r5, SDRAM_SIZE_REG(0,0))
+
+
+	/* set all dram configuration in temp registers */
+	ldr	r6, = STATIC_SDRAM0_BANK0_SIZE
+	MV_REG_WRITE_ASM(r6, r5, DRAM_BUF_REG0)
+	ldr	r6, = STATIC_SDRAM_CONFIG
+	MV_REG_WRITE_ASM(r6, r5, DRAM_BUF_REG1)
+	ldr	r6, = STATIC_SDRAM_MODE
+	MV_REG_WRITE_ASM(r6, r5, DRAM_BUF_REG2)
+	ldr	r6, = STATIC_DUNIT_CTRL_LOW
+	MV_REG_WRITE_ASM(r6, r5, DRAM_BUF_REG3)
+	ldr	r6, = STATIC_SDRAM_ADDR_CTRL
+	MV_REG_WRITE_ASM(r6, r5, DRAM_BUF_REG4)
+	ldr	r6, = STATIC_SDRAM_TIME_CTRL_LOW
+	MV_REG_WRITE_ASM(r6, r5, DRAM_BUF_REG5)
+	ldr	r6, = STATIC_SDRAM_TIME_CTRL_HI
+	MV_REG_WRITE_ASM(r6, r5, DRAM_BUF_REG6)
+	ldr	r6, = STATIC_SDRAM_ODT_CTRL_LOW
+	MV_REG_WRITE_ASM(r6, r5, DRAM_BUF_REG7)
+	ldr	r6, = STATIC_SDRAM_ODT_CTRL_HI
+	MV_REG_WRITE_ASM(r6, r5, DRAM_BUF_REG8)
+	ldr	r6, = STATIC_SDRAM_DUNIT_ODT_CTRL
+	MV_REG_WRITE_ASM(r6, r5, DRAM_BUF_REG9)
+	ldr	r6, = STATIC_SDRAM_EXT_MODE
+	MV_REG_WRITE_ASM(r6, r5, DRAM_BUF_REG10)
+	ldr	r6, = STATIC_SDRAM_DDR2_TIMING_LO
+	MV_REG_WRITE_ASM(r6, r5, DRAM_BUF_REG11)
+	ldr	r6, = STATIC_SDRAM_DDR2_TIMING_HI
+	MV_REG_WRITE_ASM(r6, r5, DRAM_BUF_REG12)
+#ifndef MV_NAND_BOOT
+	ldr	r6, = STATIC_DUNIT_CTRL_HI
+	MV_REG_WRITE_ASM(r6, r5, DRAM_BUF_REG13)
+#endif
+
+	ldr	sp,=0
+	bl	_mvDramIfConfig
+	ldr	r0, =0
+#ifdef MV78XX0
+	bl	_mvDramIfEccMemInit 
+#endif
+1:
+	mov 	r2, r10
+	mov     PC, r11         	/* r11 is saved link register */
+
+#else  /* #if defined(MV_STATIC_DRAM_ON_BOARD) */
+
+.globl dramBoot1
+dramBoot1:
+        .word   0
+
+/*******************************************************************************
+* mvDramIfBasicInit - Basic initialization of DRAM interface
+*
+* DESCRIPTION:
+*       The function will initialize the DRAM for basic usage. The function
+*       will use the TWSI assembly API to extract DIMM parameters according
+*       to which DRAM interface will be initialized.
+*       The function referes to the following DRAM parameters:
+*       1) DIMM is registered or not.
+*       2) DIMM width detection.
+*       3) DIMM density.
+*
+* INPUT:
+*       r3 - required size for initial DRAM.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*       Note:
+*       r4 holds I2C EEPROM address
+*       r5 holds SDRAM register base address
+*	r7 holds returned values
+*       r8 holds SDRAM various configuration registers value.
+*       r11 holds return function address.
+*******************************************************************************/
+/* Setting the offsets of the I2C registers */
+#define DIMM_TYPE_OFFSET	      2
+#define NUM_OF_ROWS_OFFSET            3
+#define NUM_OF_COLS_OFFSET            4
+#define NUM_OF_RANKS		      5
+#define DIMM_CONFIG_TYPE             11
+#define SDRAM_WIDTH_OFFSET           13
+#define NUM_OF_BANKS_OFFSET          17
+#define SUPPORTED_CL_OFFSET          18
+#define DIMM_TYPE_INFO_OFFSET        20         /* DDR2 only    */
+#define SDRAM_MODULES_ATTR_OFFSET    21
+#define RANK_SIZE_OFFSET             31
+
+#define DRAM_DEV_DENSITY_128M         128
+#define DRAM_DEV_DENSITY_256M         256
+#define DRAM_DEV_DENSITY_512M         512
+#define DRAM_DEV_DENSITY_1G          1024
+#define DRAM_DEV_DENSITY_2G          2048
+
+#define DRAM_RANK_DENSITY_128M       0x20
+#define DRAM_RANK_DENSITY_256M       0x40
+#define DRAM_RANK_DENSITY_512M       0x80
+#define DRAM_RANK_DENSITY_1G	     0x1
+#define DRAM_RANK_DENSITY_2G	     0x2
+
+       .globl _mvDramIfBasicInit
+       .extern _i2cInit
+_mvDramIfBasicInit:
+
+        mov     r11, LR     		/* Save link register */
+
+	/* Set Dunit high control register	      */
+        MV_REG_READ_ASM (r6, r5, SDRAM_DUNIT_CTRL_HI_REG)
+	orr	r6, r6, #BIT7 /* SDRAM__D2P_EN */
+	orr	r6, r6, #BIT8 /* SDRAM__P2D_EN */
+#ifdef MV78XX0
+	orr	r6, r6, #BIT9 /* SDRAM__ADD_HALF_FCC_EN */
+	orr	r6, r6, #BIT10 /* SDRAM__PUP_ZERO_SKEW_EN */
+	orr	r6, r6, #BIT11 /* SDRAM__WR_MASH_DELAY_EN */
+#endif
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_DUNIT_CTRL_HI_REG)
+
+#ifdef MV78XX0
+        MV_REG_READ_ASM (r6, r5, SDRAM_DUNIT_CTRL_REG)
+	orr	r6, r6, #BIT4	/* Enable 2T mode */
+	bic	r6, r6, #BIT6	/* clear ctrlPos */
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_DUNIT_CTRL_REG)
+#endif
+
+     	/*DDR SDRAM Initialization Control */
+	ldr	r6, =DSICR_INIT_EN
+	MV_REG_WRITE_ASM (r6, r1, DDR_SDRAM_INIT_CTRL_REG)
+2:	MV_REG_READ_ASM (r6, r1, DDR_SDRAM_INIT_CTRL_REG)
+         and    r6, r6, #DSICR_INIT_EN
+         cmp    r6, #0
+         bne 2b
+
+        mov     r5, #1
+        ldr     r8, =dramBoot1
+        str     r5, [r8]                /* We started executing from DRAM */
+
+        /* If we boot from NAND jump to DRAM sddress */
+        ldr     r8, dramBoot1
+        cmp     r8, #0
+        movne   pc, r11
+
+        bl      _i2cInit                /* Initialize TWSI master             */
+
+        /* Check if we have more then 1 dimm */
+	ldr	r6, =0
+	MV_REG_WRITE_ASM (r6, r1, DRAM_BUF_REG14)
+#ifdef MV78XX0
+	bl _is_Second_Dimm_Exist
+	beq single_dimm
+	ldr	r6, =1
+	MV_REG_WRITE_ASM (r6, r1, DRAM_BUF_REG14)
+single_dimm:
+        bl      _i2cInit                /* Initialize TWSI master             */
+#endif
+
+        /* Get default SDRAM Config values */
+        MV_REG_READ_ASM (r8, r5, SDRAM_CONFIG_REG)
+
+        /* Get registered/non registered info from DIMM */
+	bl  	_is_Registered
+        beq     nonRegistered
+
+setRegistered:
+        orr     r8, r8, #SDRAM_REGISTERED   /* Set registered bit(17)         */
+nonRegistered:
+#ifdef MV78XX0
+        /* Get ECC/non ECC info from DIMM */
+	bl  	_is_Ecc
+        beq     setConfigReg
+
+setEcc:        
+        orr     r8, r8, #SDRAM_ECC_EN   /* Set ecc bit(18)         */
+#endif
+setConfigReg:
+        MV_REG_WRITE_ASM (r8, r5, DRAM_BUF_REG1)
+
+        /* Set maximum CL supported by DIMM */
+	bl	_get_CAL
+
+        /* r7 is DIMM supported CAS (e.g: 3 --> 0x1C)                         */
+        clz     r6, r7
+        rsb     r6, r6, #31     /* r6 = the bit number of MAX CAS supported   */
+
+casDdr2:
+	ldr     r7, =0x62        /* stBurstInDel|stBurstOutDel field value     */
+	ldr     r3, =0x74       /* stBurstInDel|stBurstOutDel registered value*/
+	ldr     r8, =0x32      /* Assuming MAX CL = 3           */
+        cmp     r6, #3          /* If CL = 3 break              */
+        beq     casDdr2Cont
+
+	ldr     r7, =0x74        /* stBurstInDel|stBurstOutDel field value     */
+	ldr     r3, =0x86       /* stBurstInDel|stBurstOutDel registered value*/
+	ldr     r8, =0x42      /* Assuming MAX CL = 4           */
+        cmp     r6, #4          /* If CL = 4 break              */
+        beq     casDdr2Cont
+
+	ldr     r7, =0x96        /* stBurstInDel|stBurstOutDel field value     */
+	ldr     r3, =0xa8       /* stBurstInDel|stBurstOutDel registered value*/
+	ldr     r8, =0x52      /* Assuming MAX CL = 5           */
+        cmp     r6, #5          /* If CL = 5 break              */
+        beq     casDdr2Cont
+
+	ldr     r7, =0xa8        /* stBurstInDel|stBurstOutDel field value     */
+	ldr     r3, =0xba       /* stBurstInDel|stBurstOutDel registered value*/
+	ldr     r8, =0x62      /* Assuming MAX CL = 6           */
+        cmp     r6, #6          /* If CL = 5 break              */
+        beq     casDdr2Cont                
+
+        /* This is an error. return */
+        b       exit_ddrAutoConfig      /* This is an error !!  */
+casDdr2Cont:
+
+        /* Get default SDRAM Mode values */
+        MV_REG_READ_ASM (r6, r5, SDRAM_MODE_REG)
+        bic     r6, r6, #(BIT6 | BIT5 | BIT4) /* Clear CL filed */
+	orr	r6, r6, r8
+        MV_REG_WRITE_ASM (r6, r5, DRAM_BUF_REG2)
+
+	/* Set Dunit control register according to max CL detected	      */
+        MV_REG_READ_ASM (r6, r5, DRAM_BUF_REG1)
+	tst	r6, #SDRAM_REGISTERED
+	beq	setDunitReg
+	mov	r7, r3
+
+setDunitReg:
+        MV_REG_READ_ASM (r6, r5, SDRAM_DUNIT_CTRL_REG)
+	bic	r6, r6, #(0xff << 20) /* Clear SBout and SBin */
+	orr	r6, r6, #BIT4	/* Enable 2T mode */
+	bic	r6, r6, #BIT6	/* clear ctrlPos */
+	orr	r6, r6, r7, LSL #20
+        MV_REG_WRITE_ASM (r6, r5, DRAM_BUF_REG3)
+
+	/* Set Dunit high control register	      */
+        MV_REG_READ_ASM (r6, r5, SDRAM_DUNIT_CTRL_HI_REG)
+	orr	r6, r6, #BIT7 /* SDRAM__D2P_EN */
+	orr	r6, r6, #BIT8 /* SDRAM__P2D_EN */
+#ifdef MV78XX0
+	orr	r6, r6, #BIT9 /* SDRAM__ADD_HALF_FCC_EN */
+	orr	r6, r6, #BIT10 /* SDRAM__PUP_ZERO_SKEW_EN */
+	orr	r6, r6, #BIT11 /* SDRAM__WR_MASH_DELAY_EN */
+#endif
+        MV_REG_WRITE_ASM (r6, r5, DRAM_BUF_REG13)
+
+        /* DIMM density configuration*/
+        /* Density = (1 << (rowNum + colNum)) * dramWidth * dramBankNum       */
+Density:
+	/* Get bank 0 and 1 density */
+	ldr	r6, =0
+	bl 	_getDensity
+
+	mov 	r8, r7
+        mov     r8, r8, LSR #20 /* Move density 20 bits to the right  */
+                                /* For example 0x10000000 --> 0x1000 */
+
+        mov     r3, #(SDRAM_DSIZE_256Mb(0) | SDRAM_DSIZE_256Mb(1))
+        cmp     r8, #DRAM_DEV_DENSITY_256M
+        beq     get_bank_2_density
+
+        mov     r3, #(SDRAM_DSIZE_512Mb(0) | SDRAM_DSIZE_512Mb(1))
+        cmp     r8, #DRAM_DEV_DENSITY_512M
+        beq     get_bank_2_density
+
+        mov     r3, #(SDRAM_DSIZE_1Gb(0) | SDRAM_DSIZE_1Gb(1))
+        cmp     r8, #DRAM_DEV_DENSITY_1G
+        beq     get_bank_2_density
+
+        mov     r3, #(SDRAM_DSIZE_2Gb(0) | SDRAM_DSIZE_2Gb(1))
+        cmp     r8, #DRAM_DEV_DENSITY_2G
+        beq     get_bank_2_density
+
+        /* This is an error. return */
+        b       exit_ddrAutoConfig
+
+get_bank_2_density:
+	/* Check for second dimm */
+	MV_REG_READ_ASM (r6, r1, DRAM_BUF_REG14)
+	cmp	r6, #1
+	bne 	get_width
+
+	/* Get bank 2 and 3 density */
+	ldr	r6, =2
+	bl 	_getDensity
+
+	mov 	r8, r7
+        mov     r8, r8, LSR #20 /* Move density 20 bits to the right  */
+                                /* For example 0x10000000 --> 0x1000 */
+
+        orr     r3, r3, #(SDRAM_DSIZE_256Mb(2) | SDRAM_DSIZE_256Mb(3))
+        cmp     r8, #DRAM_DEV_DENSITY_256M
+        beq     get_width
+
+        and     r3, r3, #~(SDRAM_DSIZE_MASK(2) | SDRAM_DSIZE_MASK(3))
+        orr     r3, r3, #(SDRAM_DSIZE_512Mb(2) | SDRAM_DSIZE_512Mb(3))
+        cmp     r8, #DRAM_DEV_DENSITY_512M
+        beq     get_width
+
+        and     r3, r3, #~(SDRAM_DSIZE_MASK(2) | SDRAM_DSIZE_MASK(3))
+        orr     r3, r3, #(SDRAM_DSIZE_1Gb(2) | SDRAM_DSIZE_1Gb(3))
+        cmp     r8, #DRAM_DEV_DENSITY_1G
+        beq     get_width
+
+        and     r3, r3, #~(SDRAM_DSIZE_MASK(2) | SDRAM_DSIZE_MASK(3))
+        orr     r3, r3, #(SDRAM_DSIZE_2Gb(2) | SDRAM_DSIZE_2Gb(3))
+        cmp     r8, #DRAM_DEV_DENSITY_2G
+        beq     get_width
+
+        /* This is an error. return */
+        b       exit_ddrAutoConfig
+
+	/* Get SDRAM width */
+get_width: 
+	/* Get bank 0 and 1 width */
+	ldr	r6, =0
+	bl 	_get_width
+
+        cmp     r7, #8           /* x8 devices   */  
+        beq     get_bank_2_width
+
+        orr     r3, r3, #(SDRAM_ADDRSEL_X16(0) | SDRAM_ADDRSEL_X16(1)) /* x16 devices  */
+        cmp     r7, #16
+        beq     get_bank_2_width
+
+        /* This is an error. return */
+        b       exit_ddrAutoConfig
+
+get_bank_2_width:
+	/* Check for second dimm */
+	MV_REG_READ_ASM (r6, r1, DRAM_BUF_REG14)
+	cmp	r6, #1
+	bne 	densCont
+
+	/* Get bank 2 and 3 width */
+	ldr	r6, =2
+	bl 	_get_width
+
+        cmp     r7, #8           /* x8 devices   */  
+        beq     densCont
+
+        orr     r3, r3, #(SDRAM_ADDRSEL_X16(2) | SDRAM_ADDRSEL_X16(3)) /* x16 devices  */
+        cmp     r7, #16
+        beq     densCont
+
+        /* This is an error. return */
+        b       exit_ddrAutoConfig
+
+densCont:
+        MV_REG_WRITE_ASM (r3, r5, DRAM_BUF_REG4)
+
+        /* Set SDRAM timing control low register */
+	ldr	r4, =SDRAM_TIMING_CTRL_LOW_REG_DEFAULT
+        /* MV_REG_READ_ASM (r4, r5, SDRAM_TIMING_CTRL_LOW_REG) */
+        MV_REG_WRITE_ASM(r4, r5, DRAM_BUF_REG5)
+
+        /* Set SDRAM timing control high register */
+	ldr	r4, =SDRAM_TIMING_CTRL_HIGH_REG_DEFAULT
+        /* MV_REG_READ_ASM (r4, r5, SDRAM_TIMING_CTRL_HIGH_REG) */
+        MV_REG_WRITE_ASM(r4, r5, DRAM_BUF_REG6)
+
+	/* Check for second dimm */
+	MV_REG_READ_ASM (r6, r1, DRAM_BUF_REG14)
+	cmp	r6, #1
+	bne 	single_dimm_odt
+
+        /* Set SDRAM ODT control low register for double DIMM*/        
+        ldr	r4, =DDR2_ODT_CTRL_LOW_CS0_CS1_CS2_CS3_DV
+        MV_REG_WRITE_ASM(r4, r5, DRAM_BUF_REG7)
+
+        /* Set DUNIT ODT control register for double DIMM */
+        ldr	r4, =DDR2_DUNIT_ODT_CTRL_CS0_CS1_CS2_CS3_DV
+        MV_REG_WRITE_ASM(r4, r5, DRAM_BUF_REG9)
+
+#ifdef MV78XX0
+        /* Set SDRAM Extended Mode register for double DIMM */
+	/* Check DRAM frequency for more then 267MHz set ODT Rtt to 50ohm */
+
+        MV_REG_READ_ASM (r4, r5, CPU_RESET_SAMPLE_L_REG)
+	ldr	r5, =MSAR_SYSCLCK_MASK
+	and	r4, r4, r5	
+	ldr	r5, =MSAR_SYSCLCK_267
+	cmp	r4, r5
+	beq	fast_dram_clock_rtt
+	ldr	r5, =MSAR_SYSCLCK_300
+	cmp	r4, r5
+	beq	fast_dram_clock_rtt
+	ldr	r5, =MSAR_SYSCLCK_333
+	cmp	r4, r5
+	beq	fast_dram_clock_rtt
+	ldr	r5, =MSAR_SYSCLCK_400
+	cmp	r4, r5
+	beq	fast_dram_clock_rtt
+
+	b	slow_dram_clock_rtt
+
+fast_dram_clock_rtt:
+        ldr	r4, =DDR_SDRAM_EXT_MODE_FAST_CS0_CS1_CS2_CS3_DV
+        MV_REG_WRITE_ASM(r4, r5, DRAM_BUF_REG10)
+	b odt_config_end
+#endif
+slow_dram_clock_rtt:
+        ldr	r4, =DDR_SDRAM_EXT_MODE_CS0_CS1_CS2_CS3_DV
+        MV_REG_WRITE_ASM(r4, r5, DRAM_BUF_REG10)
+	b odt_config_end
+
+single_dimm_odt:
+        /* Set SDRAM ODT control low register */        
+        ldr	r4, =DDR2_ODT_CTRL_LOW_CS0_CS1_DV
+        MV_REG_WRITE_ASM(r4, r5, DRAM_BUF_REG7)
+
+        /* Set DUNIT ODT control register */
+        ldr	r4, =DDR2_DUNIT_ODT_CTRL_CS0_CS1_DV
+        MV_REG_WRITE_ASM(r4, r5, DRAM_BUF_REG9)
+
+        /* Set SDRAM Extended Mode register */
+        ldr	r4, =DDR_SDRAM_EXT_MODE_CS0_CS1_DV
+        MV_REG_WRITE_ASM(r4, r5, DRAM_BUF_REG10)
+
+odt_config_end:
+        /* SDRAM ODT control high register is left as default */
+        MV_REG_READ_ASM (r4, r5, DDR2_SDRAM_ODT_CTRL_HIGH_REG)
+        MV_REG_WRITE_ASM(r4, r5, DRAM_BUF_REG8)
+
+        /* Set SDRAM Ddr2 Timing Low register */
+        ldr	r4, =DD2_SDRAM_TIMING_LOW_DV
+        MV_REG_WRITE_ASM(r4, r5, DRAM_BUF_REG11)
+
+        /* Set SDRAM Ddr2 Timing High register */
+        ldr	r4, =DDR2_SDRAM_TIMING_HIGH_DV
+        MV_REG_WRITE_ASM(r4, r5, DRAM_BUF_REG12)
+
+timeParamDone:        
+	/* Close all windows */
+        MV_REG_READ_ASM (r6, r5, SDRAM_SIZE_REG(0,0))
+        and	r6, r6,#~SCSR_SIZE_MASK
+        and	r6, r6,#~1
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_SIZE_REG(0,0))
+        MV_REG_READ_ASM (r6, r5, SDRAM_SIZE_REG(0,1))
+        and	r6, r6,#~SCSR_SIZE_MASK
+        and	r6, r6,#~1
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_SIZE_REG(0,1))
+        MV_REG_READ_ASM (r6, r5, SDRAM_SIZE_REG(0,2))
+        and	r6, r6,#~SCSR_SIZE_MASK
+        and	r6, r6,#~1
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_SIZE_REG(0,2))
+        MV_REG_READ_ASM (r6, r5, SDRAM_SIZE_REG(0,3))
+        and	r6, r6,#~SCSR_SIZE_MASK
+        and	r6, r6,#~1
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_SIZE_REG(0,3))
+
+        /* Set sdram bank 0 size and enable it */
+	ldr	r6, =0
+	bl _mvDramIfGetDimmSizeFromSpd
+#ifdef MV78XX0
+	/* Check DRAM width */
+        MV_REG_READ_ASM (r4, r5, SDRAM_CONFIG_REG)
+	ldr	r5, =SDRAM_DWIDTH_MASK
+	and	r4, r4, r5	
+	ldr	r5, =SDRAM_DWIDTH_64BIT
+	cmp	r4, r5
+	beq	dram_64bit_width
+	/* Utilize only 32bit width */
+	mov	r8, r8, LSR #1
+#else
+	/* Utilize only 16bit width */
+	mov	r8, r8, LSR #2
+#endif
+dram_64bit_width:
+	/* Update first dimm size return value R8 */
+        MV_REG_READ_ASM (r5, r6, SDRAM_SIZE_REG(0,0))
+        ldr	r6, =~SCSR_SIZE_MASK	
+	and	r5, r5, r6
+	orr	r5, r5, r8
+        MV_REG_WRITE_ASM(r5, r8, SDRAM_SIZE_REG(0,0))
+
+	/* Clear bank 2 size */
+        MV_REG_READ_ASM (r6, r5, SDRAM_SIZE_REG(0,2))
+        and	r6, r6,#~SCSR_SIZE_MASK	
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_SIZE_REG(0,2))
+
+	/* Check for second dimm */
+	MV_REG_READ_ASM (r6, r1, DRAM_BUF_REG14)
+	cmp	r6, #1
+	bne 	defualt_order
+
+        /* Set sdram bank 2 size */
+	ldr	r6, =2
+	bl _mvDramIfGetDimmSizeFromSpd
+#ifdef MV78XX0
+	/* Check DRAM width */
+        MV_REG_READ_ASM (r4, r5, SDRAM_CONFIG_REG)
+	ldr	r5, =SDRAM_DWIDTH_MASK
+	and	r4, r4, r5	
+	ldr	r5, =SDRAM_DWIDTH_64BIT
+	cmp	r4, r5
+	beq	dram_64bit_width2
+	/* Utilize only 32bit width */
+	mov	r8, r8, LSR #1
+#else
+	/* Utilize only 16bit width */
+	mov	r8, r8, LSR #2
+#endif
+dram_64bit_width2:
+	/* Update first dimm size return value R8 */
+        MV_REG_READ_ASM (r5, r6, SDRAM_SIZE_REG(0,2))
+        ldr	r6, =~SCSR_SIZE_MASK	
+	and	r5, r5, r6
+	orr	r5, r5, r8
+        MV_REG_WRITE_ASM(r5, r8, SDRAM_SIZE_REG(0,2))
+
+	/* Close windows 1 and 3 */
+        MV_REG_READ_ASM (r6, r5, SDRAM_SIZE_REG(0,1))
+        and	r6, r6,#~1
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_SIZE_REG(0,1))
+        MV_REG_READ_ASM (r6, r5, SDRAM_SIZE_REG(0,3))
+        and	r6, r6,#~1
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_SIZE_REG(0,3))
+
+	/* Check dimm size for setting dram bank order */
+        MV_REG_READ_ASM (r6, r5, SDRAM_SIZE_REG(0,0))
+        MV_REG_READ_ASM (r4, r5, SDRAM_SIZE_REG(0,2))
+        and	r6, r6,#SCSR_SIZE_MASK	
+        and	r4, r4,#SCSR_SIZE_MASK	
+	cmp	r6, r4
+	bge	defualt_order
+
+	/* Bank 2 is biger then bank 0 */
+	ldr	r6,=0
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_BASE_ADDR_REG(0,2))
+
+	/* Open win 2 */
+        MV_REG_READ_ASM (r6, r5, SDRAM_SIZE_REG(0,2))
+        orr	r6, r6,#1
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_SIZE_REG(0,2))
+
+	ldr	sp,=0
+	bl	_mvDramIfConfig
+#ifdef MV78XX0
+	/* Init ECC on CS 2 */
+	ldr	r0, =2
+	bl	_mvDramIfEccMemInit
+#endif
+        mov     PC, r11         /* r11 is saved link register */
+
+defualt_order:
+
+	/* Open win 0 */
+        MV_REG_READ_ASM (r6, r5, SDRAM_SIZE_REG(0,0))
+        orr	r6, r6,#1
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_SIZE_REG(0,0))
+
+	ldr	sp,=0
+	bl	_mvDramIfConfig
+#ifdef MV78XX0
+	/* Init ECC on CS 0 */
+	ldr	r0, =0
+	bl	_mvDramIfEccMemInit
+#endif
+exit_ddrAutoConfig:
+        mov     PC, r11         /* r11 is saved link register */
+
+
+/***************************************************************************************/
+/*       r4 holds I2C EEPROM address
+ *       r7 holds I2C EEPROM offset parameter for i2cRead and its --> returned value
+ *       r8 holds SDRAM various configuration registers value.
+ *	r13 holds Link register
+ */
+/**************************/
+_getDensity:
+	mov     r13, LR                            /* Save link register */
+
+	/* Read SPD rank size from DIMM0 */
+        mov     r4, #MV_BOARD_DIMM0_I2C_ADDR       /* reading from DIMM0      */
+
+	cmp	r6, #0
+	beq	1f
+
+	/* Read SPD rank size from DIMM1 */
+        mov     r4, #MV_BOARD_DIMM1_I2C_ADDR /* reading from DIMM1            */
+
+1:
+        mov     r7, #NUM_OF_ROWS_OFFSET            /* offset  3               */
+        bl      _i2cRead
+        mov     r8, r7                             /* r8 save number of rows  */
+
+        mov     r7, #NUM_OF_COLS_OFFSET            /* offset  4               */
+        bl      _i2cRead
+        add     r8, r8, r7                         /* r8 = number of rows + number of col */
+
+        mov     r7, #0x1
+        mov     r8, r7, LSL r8                     /* r8 = (1 << r8)          */
+
+        mov     r7, #SDRAM_WIDTH_OFFSET            /* offset 13 */
+        bl      _i2cRead
+        mul     r8, r7, r8
+
+        mov     r7, #NUM_OF_BANKS_OFFSET           /* offset 17               */
+        bl      _i2cRead
+        mul     r7, r8, r7
+
+	mov     PC, r13
+
+/**************************/
+_get_width:
+	mov     r13, LR                 /* Save link register */
+
+	/* Read SPD rank size from DIMM0 */
+        mov     r4, #MV_BOARD_DIMM0_I2C_ADDR /* reading from DIMM0            */
+
+	cmp	r6, #0
+	beq	1f
+
+	/* Read SPD rank size from DIMM1 */
+        mov     r4, #MV_BOARD_DIMM1_I2C_ADDR /* reading from DIMM1            */
+
+1:
+        /* Get SDRAM width (SPD offset 13) */
+        mov     r7, #SDRAM_WIDTH_OFFSET
+        bl      _i2cRead                /* result in r7                       */
+
+	mov     PC, r13
+
+/**************************/
+_get_CAL:
+	mov     r13, LR                 /* Save link register */
+
+        /* Set maximum CL supported by DIMM */
+        mov     r4, #MV_BOARD_DIMM0_I2C_ADDR /* reading from DIMM0            */
+        mov     r7, #SUPPORTED_CL_OFFSET     /* offset  18 */
+        bl      _i2cRead
+
+	mov     PC, r13
+
+/**************************/
+/* R8 - sdram configuration register.
+ * Return value in flag if no-registered then Z-flag is set
+ */
+_is_Registered:
+	mov     r13, LR                 /* Save link register */
+#if defined(MV645xx)
+        /* Get registered/non registered info from DIMM */
+        tst     r8, #SDRAM_DTYPE_DDR2
+        bne     regDdr2
+
+regDdr1:
+        mov     r4, #MV_BOARD_DIMM0_I2C_ADDR /* reading from DIMM0            */
+        mov     r7, #SDRAM_MODULES_ATTR_OFFSET
+        bl      _i2cRead                /* result in r7                       */
+
+        tst     r7, #0x2
+	b	exit
+#endif
+regDdr2:
+        mov     r4, #MV_BOARD_DIMM0_I2C_ADDR /* reading from DIMM0            */
+        mov     r7, #DIMM_TYPE_INFO_OFFSET
+        bl      _i2cRead                /* result in r7                       */
+
+        tst     r7, #0x11               /* DIMM type = regular RDIMM (0x01)   */
+                                        /* or Mini-RDIMM (0x10)               */
+exit:
+        mov     PC, r13
+
+
+/**************************/
+/* Return value in flag if no-Ecc then Z-flag is set */
+_is_Ecc:
+	mov     r13, LR                 /* Save link register */
+
+        mov     r4, #MV_BOARD_DIMM0_I2C_ADDR /* reading from DIMM0            */
+        mov     r7, #DIMM_CONFIG_TYPE
+        bl      _i2cRead                /* result in r7                       */
+
+        tst     r7, #0x2               /* bit 1 -> Data ECC */
+        mov     PC, r13
+
+/**************************/
+/* Return value in flag if no second DIMM then Z-flag is set */
+_is_Second_Dimm_Exist:
+	mov     r13, LR                 /* Save link register */
+
+        mov     r4, #MV_BOARD_DIMM1_I2C_ADDR /* reading from DIMM0            */
+        mov     r7, #DIMM_TYPE_OFFSET
+        bl      _i2cRead                /* result in r7                       */
+
+     	tst     r7, #0x8               /* bit3 is '1' -> DDR 2 */
+        mov     PC, r13
+
+/*******************************************************************************
+* _mvDramIfGetDimmSizeFromSpd  - read bank 0 dram's size
+*
+* DESCRIPTION:
+*       The function will read the bank 0 dram size(SPD version 1.0 and above )  
+*
+* INPUT:
+*       r6 - dram bank number.
+*
+* OUTPUT:
+*	none
+*/
+_mvDramIfGetDimmSizeFromSpd:
+
+	mov     r13, LR                 /* Save link register */
+	
+	/* Read SPD rank size from DIMM0 */
+        mov     r4, #MV_BOARD_DIMM0_I2C_ADDR /* reading from DIMM0            */
+
+	cmp	r6, #0
+	beq	1f
+
+	/* Read SPD rank size from DIMM1 */
+        mov     r4, #MV_BOARD_DIMM1_I2C_ADDR /* reading from DIMM1            */
+
+1:
+        mov     r7, #RANK_SIZE_OFFSET	/* offset  31 */
+        bl      _i2cRead  
+	
+pass_read:
+      	ldr     r8, =(0xf << SCSR_SIZE_OFFS)
+        cmp	r7, #DRAM_RANK_DENSITY_256M
+        beq     endDimmSize
+        
+        ldr     r8, =(0x1f << SCSR_SIZE_OFFS)
+        cmp	r7, #DRAM_RANK_DENSITY_512M
+        beq     endDimmSize
+        
+        ldr     r8, =(0x3f << SCSR_SIZE_OFFS)
+        cmp	r7, #DRAM_RANK_DENSITY_1G
+        beq     endDimmSize
+
+        ldr     r8, =(0x7f  << SCSR_SIZE_OFFS)     /* DRAM_RANK_DENSITY_2G */
+endDimmSize:
+        mov     PC, r13
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/spd/mvSpd.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/spd/mvSpd.c
@@ -0,0 +1,1733 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvSysDdrConfig.h"
+#include "ddr/mvSpd.h"
+#include "ddr/mvSysDdr.h"
+
+/* #define MV_DEBUG */
+#ifdef MV_DEBUG
+#define DB(x) x
+#else
+#define DB(x)
+#endif
+
+static MV_VOID cpyDimm2BankInfo(MV_DIMM_INFO *pDimmInfo, 
+                                            MV_DRAM_BANK_INFO *pBankInfo);
+static MV_U32  cas2ps(MV_U8 spd_byte);
+/*******************************************************************************
+* mvDramBankGet - Get the DRAM bank paramters.
+*
+* DESCRIPTION:
+*       This function retrieves DRAM bank parameters as described in 
+*       DRAM_BANK_INFO struct to the controller DRAM unit. In case the board 
+*       has its DRAM on DIMMs it will use its EEPROM to extract SPD data
+*       from it. Otherwise, if the DRAM is soldered on board, the function 
+*       should insert its bank information into MV_DRAM_BANK_INFO struct.
+*
+* INPUT:
+*       bankNum  - Board DRAM bank number.
+*
+* OUTPUT:
+*       pBankInfo  - DRAM bank information struct.
+*
+* RETURN:
+*       MV_FAIL - Bank parameters could not be read.
+*
+*******************************************************************************/
+MV_STATUS mvDramBankInfoGet(MV_U32 bankNum, MV_DRAM_BANK_INFO *pBankInfo)
+{
+    MV_DIMM_INFO dimmInfo;
+
+    DB(mvOsPrintf("Dram: mvDramBankInfoGet bank %d\n", bankNum)); 
+    /* zero pBankInfo structure */
+
+    if((NULL == pBankInfo) || (bankNum >= MV_DRAM_MAX_CS ))
+    {
+        DB(mvOsPrintf("Dram: mvDramBankInfoGet bad params \n")); 
+        return MV_BAD_PARAM;
+    }
+    memset(pBankInfo, 0, sizeof(*pBankInfo));
+
+	if ( MV_OK != dimmSpdGet((MV_U32)(bankNum/2), &dimmInfo))
+	{
+		DB(mvOsPrintf("Dram: ERR dimmSpdGet failed to get dimm info \n"));
+		return MV_FAIL;
+	}
+	if ((dimmInfo.numOfModuleBanks == 1) && ((bankNum % 2) == 1))
+	{
+		DB(mvOsPrintf("Dram: ERR dimmSpdGet. Can't find DIMM bank 2 \n"));
+		return MV_FAIL;
+	}
+	/* convert Dimm info to Bank info */
+    cpyDimm2BankInfo(&dimmInfo, pBankInfo);
+    return MV_OK;
+}
+
+/*******************************************************************************
+* cpyDimm2BankInfo - Convert a Dimm info struct into a bank info struct.
+*
+* DESCRIPTION:
+*       Convert a Dimm info struct into a bank info struct.
+*
+* INPUT:
+*       pDimmInfo - DIMM information structure.
+*
+* OUTPUT:
+*       pBankInfo  - DRAM bank information struct.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+static MV_VOID cpyDimm2BankInfo(MV_DIMM_INFO *pDimmInfo, 
+                                                MV_DRAM_BANK_INFO *pBankInfo)
+{
+    pBankInfo->memoryType = pDimmInfo->memoryType;        
+
+    /* DIMM dimensions */
+    pBankInfo->numOfRowAddr = pDimmInfo->numOfRowAddr;
+    pBankInfo->numOfColAddr = pDimmInfo->numOfColAddr;
+    pBankInfo->dataWidth = pDimmInfo->dataWidth;
+    pBankInfo->errorCheckType = pDimmInfo->errorCheckType;             
+    pBankInfo->sdramWidth = pDimmInfo->sdramWidth;
+    pBankInfo->errorCheckDataWidth = pDimmInfo->errorCheckDataWidth;   
+    pBankInfo->numOfBanksOnEachDevice = pDimmInfo->numOfBanksOnEachDevice;
+    pBankInfo->suportedCasLatencies = pDimmInfo->suportedCasLatencies;
+    pBankInfo->refreshInterval = pDimmInfo->refreshInterval;
+
+    /* DIMM timing parameters */
+    pBankInfo->minCycleTimeAtMaxCasLatPs = pDimmInfo->minCycleTimeAtMaxCasLatPs;
+    pBankInfo->minCycleTimeAtMaxCasLatMinus1Ps = 
+                                    pDimmInfo->minCycleTimeAtMaxCasLatMinus1Ps;
+    pBankInfo->minCycleTimeAtMaxCasLatMinus2Ps = 
+                                    pDimmInfo->minCycleTimeAtMaxCasLatMinus2Ps;
+
+    pBankInfo->minRowPrechargeTime     = pDimmInfo->minRowPrechargeTime;     
+    pBankInfo->minRowActiveToRowActive = pDimmInfo->minRowActiveToRowActive;
+    pBankInfo->minRasToCasDelay        = pDimmInfo->minRasToCasDelay;       
+    pBankInfo->minRasPulseWidth        = pDimmInfo->minRasPulseWidth;       
+    pBankInfo->minWriteRecoveryTime    = pDimmInfo->minWriteRecoveryTime;
+    pBankInfo->minWriteToReadCmdDelay  = pDimmInfo->minWriteToReadCmdDelay;
+    pBankInfo->minReadToPrechCmdDelay  = pDimmInfo->minReadToPrechCmdDelay;
+    pBankInfo->minRefreshToActiveCmd   = pDimmInfo->minRefreshToActiveCmd;
+    pBankInfo->minActivateToActiveCmd   = pDimmInfo->minActivateToActiveCmd;
+    pBankInfo->minFourActiveWinDelay   = pDimmInfo->minFourActiveWinDelay;
+               
+    /* Parameters calculated from the extracted DIMM information */
+    pBankInfo->size = pDimmInfo->size/pDimmInfo->numOfModuleBanks;
+    pBankInfo->deviceDensity = pDimmInfo->deviceDensity;              
+    pBankInfo->numberOfDevices = pDimmInfo->numberOfDevices /
+                                 pDimmInfo->numOfModuleBanks;
+ 
+    /* DIMM attributes (MV_TRUE for yes) */
+
+    if ((pDimmInfo->memoryType == MEM_TYPE_SDRAM) ||
+        (pDimmInfo->memoryType == MEM_TYPE_DDR1)   )
+    {   
+        if (pDimmInfo->dimmAttributes & BIT1)
+            pBankInfo->registeredAddrAndControlInputs = MV_TRUE;
+        else
+            pBankInfo->registeredAddrAndControlInputs = MV_FALSE;
+    }
+    else if (pDimmInfo->memoryType == MEM_TYPE_DDR2)
+    {
+        if (pDimmInfo->dimmTypeInfo & (BIT0 | BIT4))
+            pBankInfo->registeredAddrAndControlInputs = MV_TRUE;
+        else
+            pBankInfo->registeredAddrAndControlInputs = MV_FALSE;
+    }
+    else    /* DDR3 no register DIMM */
+            pBankInfo->registeredAddrAndControlInputs = MV_FALSE;
+
+    /* Added for DDR3 */
+    pBankInfo->minCasLatTime = pDimmInfo->minCasLatTime;
+
+    return;
+}
+/*******************************************************************************
+* dimmSpdCpy - Cpy SPD parameters from dimm 0 to dimm 1.
+*
+* DESCRIPTION:
+*       Read the DIMM SPD parameters from dimm 0 into dimm 1 SPD.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE if function could read DIMM parameters, MV_FALSE otherwise.
+*
+*******************************************************************************/
+MV_STATUS dimmSpdCpy(MV_VOID)
+{
+    MV_U32 i;
+    MV_U32 spdChecksum;
+     
+    MV_U8 data[SPD_SIZE];
+
+    /* zero dimmInfo structure */
+    memset(data, 0, SPD_SIZE);
+
+    /* read the dimm eeprom */
+    DB(mvOsPrintf("DRAM: Read Dimm eeprom\n"));
+
+    if (MV_OK != mvSysDdrSpdRead(data, SPD_SIZE) )
+    {
+        DB(mvOsPrintf("DRAM: ERR. no DIMM in dimmNum 0\n"));
+        return MV_FAIL;
+    }
+
+    DB(puts("DRAM: Reading dimm info succeded.\n"));
+
+    /* calculate SPD checksum */
+    spdChecksum = 0;
+    
+    for(i = 0 ; i <= 62 ; i++)
+    {
+        spdChecksum += data[i];
+    }
+    
+    if ((spdChecksum & 0xff) != data[63])
+    {
+        DB(mvOsPrintf("DRAM: Warning. Wrong SPD Checksum %2x, expValue=%2x\n",
+                            (MV_U32)(spdChecksum & 0xff), data[63]));
+    }
+    else
+    {
+        DB(mvOsPrintf("DRAM: SPD Checksum ok!\n"));
+    }
+
+    /* copy the SPD content 1:1 into the DIMM 1 SPD */
+    for(i = 0 ; i < SPD_SIZE ; i++)
+    {
+	if( MV_OK != mvSysDdrSpdWrite(&data[i], 1) )
+	{
+	    mvOsPrintf("DRAM: ERR. no DIMM in dimmNum 1 byte %d \n",i);
+	    return MV_FAIL;
+	}
+	mvOsDelay(5);
+    }
+    
+    DB(puts("DRAM: Reading dimm info succeded.\n"));
+    return MV_OK;
+}
+
+/*******************************************************************************
+* dimmSpdGet - Get the SPD parameters.
+*
+* DESCRIPTION:
+*       Read the DIMM SPD parameters into given struct parameter.
+*
+* INPUT:
+*       dimmNum - DIMM number. See MV_BOARD_DIMM_NUM enumerator.
+*
+* OUTPUT:
+*       pDimmInfo - DIMM information structure.
+*
+* RETURN:
+*       MV_TRUE if function could read DIMM parameters, MV_FALSE otherwise.
+*
+*******************************************************************************/
+MV_STATUS dimmSpdGet(MV_U32 dimmNum, MV_DIMM_INFO *pDimmInfo)
+{
+    MV_U32 i;
+    MV_U32 density = 1;
+    MV_U32 spdChecksum;
+    MV_U32 temp;
+     
+    MV_U8 data[SPD_SIZE];
+
+    if((NULL == pDimmInfo)|| (dimmNum >= MAX_DIMM_NUM))
+    {
+        DB(mvOsPrintf("Dram: mvDramBankInfoGet bad params \n")); 
+        return MV_BAD_PARAM;
+    }
+
+    /* zero dimmInfo structure */
+    memset(data, 0, SPD_SIZE);
+
+    /* read the dimm eeprom */
+    DB(mvOsPrintf("DRAM: Read Dimm eeprom\n"));
+    if( MV_OK != mvSysDdrSpdRead(data, SPD_SIZE) )
+    {
+        DB(mvOsPrintf("DRAM: ERR. no DIMM in dimmNum %d \n", dimmNum));
+        return MV_FAIL;
+    }
+    DB(puts("DRAM: Reading dimm info succeded.\n"));
+    
+    /* DDR3 move to CRC */
+    if (data[DIMM_MEM_TYPE] != DIMM_MEM_TYPE_DDR3)
+    {
+	/* calculate SPD checksum */
+	spdChecksum = 0;
+    
+        for(i = 0 ; i <= 62 ; i++)
+        {
+	    spdChecksum += data[i];
+	}
+    
+	if ((spdChecksum & 0xff) != data[63])
+	{
+	    DB(mvOsPrintf("DRAM: Warning. Wrong SPD Checksum %2x, expValue=%2x\n",
+                            (MV_U32)(spdChecksum & 0xff), data[63]));
+	}
+	else
+	{
+	    DB(mvOsPrintf("DRAM: SPD Checksum ok!\n"));
+	}
+    }
+
+    /* copy the SPD content 1:1 into the dimmInfo structure*/
+    for(i = 0 ; i < SPD_SIZE ; i++)
+    {
+        pDimmInfo->spdRawData[i] = data[i];
+        DB(mvOsPrintf("SPD-EEPROM Byte %3d = %3x (%3d)\n",i, data[i], data[i]));
+    }
+
+    DB(mvOsPrintf("DRAM SPD Information:\n"));
+
+    /* Memory type (DDR / SDRAM) */
+    switch (data[DIMM_MEM_TYPE])
+    {
+        case (DIMM_MEM_TYPE_SDRAM):
+            pDimmInfo->memoryType = MEM_TYPE_SDRAM;
+            DB(mvOsPrintf("DRAM Memeory type SDRAM\n"));
+            break;
+        case (DIMM_MEM_TYPE_DDR1):
+            pDimmInfo->memoryType = MEM_TYPE_DDR1;
+            DB(mvOsPrintf("DRAM Memeory type DDR1\n"));
+            break;
+        case (DIMM_MEM_TYPE_DDR2):
+            pDimmInfo->memoryType = MEM_TYPE_DDR2;
+            DB(mvOsPrintf("DRAM Memeory type DDR2\n"));
+            break;
+        case (DIMM_MEM_TYPE_DDR3):
+            pDimmInfo->memoryType = MEM_TYPE_DDR3;
+            DB(mvOsPrintf("DRAM Memeory type DDR3\n"));
+            break;
+        default:
+            mvOsPrintf("ERROR: Undefined memory type!\n");
+            return MV_ERROR;
+    }
+
+    
+    /* Number Of Row Addresses */
+    if (data[DIMM_MEM_TYPE] == DIMM_MEM_TYPE_DDR3)
+    {
+        pDimmInfo->numOfRowAddr = ((data[DDR3_DIMM_ROW_NUM] & DDR3_DIMM_ROW_NUM_MASK) >> DDR3_DIMM_ROW_NUM_OFF);
+	pDimmInfo->numOfRowAddr += DDR3_DIMM_ROW_NUM_MIN;
+    }
+    else
+    {
+        pDimmInfo->numOfRowAddr = data[DIMM_ROW_NUM];
+    }
+    DB(mvOsPrintf("DRAM numOfRowAddr[3]         %d\n",pDimmInfo->numOfRowAddr));
+        
+    /* Number Of Column Addresses */
+    if (data[DIMM_MEM_TYPE] == DIMM_MEM_TYPE_DDR3)
+    {
+        pDimmInfo->numOfColAddr = ((data[DDR3_DIMM_COL_NUM] & DDR3_DIMM_COL_NUM_MASK) >> DDR3_DIMM_COL_NUM_OFF);
+	pDimmInfo->numOfColAddr += DDR3_DIMM_COL_NUM_MIN;
+    }
+    else
+    {
+	pDimmInfo->numOfColAddr = data[DIMM_COL_NUM];
+    }
+    DB(mvOsPrintf("DRAM numOfColAddr[4]         %d\n",pDimmInfo->numOfColAddr));
+        
+    /* Number Of Module Banks */
+    if (data[DIMM_MEM_TYPE] == DIMM_MEM_TYPE_DDR3)
+    {
+        pDimmInfo->numOfModuleBanks = ((data[DDR3_DIMM_MODULE_ORG] & DDR3_DIMM_MODULE_BANK_NUM_MASK)
+								    >> DDR3_DIMM_MODULE_BANK_NUM_OFF);
+	pDimmInfo->numOfModuleBanks += DDR3_DIMM_MODULE_BANK_NUM_MIN;
+    }
+    else
+    {
+	/* Number of module banks for DDR1 */
+        pDimmInfo->numOfModuleBanks = data[DIMM_MODULE_BANK_NUM];
+        
+	/* Number of module banks encoded differently for DDR2 */
+        if (pDimmInfo->memoryType == MEM_TYPE_DDR2)
+        pDimmInfo->numOfModuleBanks = (pDimmInfo->numOfModuleBanks & 0x7)+1;
+    }
+    DB(mvOsPrintf("DRAM numOfModuleBanks[5]     0x%x\n", 
+                                                  pDimmInfo->numOfModuleBanks));
+
+    /* Data Width */
+    if (data[DIMM_MEM_TYPE] == DIMM_MEM_TYPE_DDR3)
+    {
+	/* DDR3 val are: 0 for 8, 1 for 16, 2 for 32 and 3 for 64 */
+        pDimmInfo->dataWidth = (1 << (3 + (data[DDR3_DIMM_DATA_WIDTH] & DDR3_DIMM_DATA_WIDTH_MASK)));
+    }
+    else
+    {
+        pDimmInfo->dataWidth = data[DIMM_DATA_WIDTH];
+    }
+    DB(mvOsPrintf("DRAM dataWidth[6]            0x%x\n", pDimmInfo->dataWidth));
+        
+    /* Minimum Cycle Time At Max CasLatancy */
+    if (data[DIMM_MEM_TYPE] == DIMM_MEM_TYPE_DDR3)
+    {
+	/* DDR3 val are: SPD[12]/SPD[11] in nSec */
+	/* We mul it by 10 for the cas2ps function */
+        temp = (data[DDR3_DIMM_MIN_CC] * 10) / data[DDR3_DIMM_MTB_DIV];
+	/* Convert to pSec */
+	pDimmInfo->minCycleTimeAtMaxCasLatPs = cas2ps(temp);
+
+    }
+    else
+    {
+	pDimmInfo->minCycleTimeAtMaxCasLatPs = cas2ps(data[DIMM_MIN_CC_AT_MAX_CAS]);
+    }
+    DB(mvOsPrintf("DRAM tCKmin[9]            0x%x\n", pDimmInfo->dataWidth));
+
+    /* Error Check Type */
+    if (data[DIMM_MEM_TYPE] == DIMM_MEM_TYPE_DDR3)
+    {
+	/* No byte for error check in DDR3 SPD, use DDR2 convention */
+	pDimmInfo->errorCheckType = 0;
+	/* Check if ECC */
+	if ((data[DDR3_DIMM_DATA_WIDTH] & DDR3_DIMM_DATA_ECC_MASK) >> DDR3_DIMM_DATA_ECC_OFF)
+	    pDimmInfo->errorCheckType = 2;
+
+    }
+    else
+    {
+	pDimmInfo->errorCheckType = data[DIMM_ERR_CHECK_TYPE];
+    }
+    DB(mvOsPrintf("DRAM errorCheckType[11]      0x%x\n", pDimmInfo->errorCheckType));
+
+    /* Refresh Interval */
+    if (data[DIMM_MEM_TYPE] == DIMM_MEM_TYPE_DDR3)
+    {
+	/* No byte for refresh interval in DDR3 SPD, use DDR2 convention */
+	/* JEDEC param are 0 <= Tcase <= 85: 7.8uSec, 85 <= Tcase <= 95: 3.9uSec */
+        pDimmInfo->refreshInterval = 2; /* Set to 7.8uSec */
+    }
+    else
+    {
+        pDimmInfo->refreshInterval = data[DIMM_REFRESH_INTERVAL];
+    }
+    DB(mvOsPrintf("DRAM refreshInterval[12]     0x%x\n", pDimmInfo->refreshInterval));
+    
+    /* Sdram Width */
+    if (data[DIMM_MEM_TYPE] == DIMM_MEM_TYPE_DDR3)
+    {
+        pDimmInfo->sdramWidth = (1 << (data[DDR3_DIMM_SDRAM_WIDTH] & DDR3_DIMM_SDRAM_WIDTH_MASK));
+    }
+    else
+    {
+        pDimmInfo->sdramWidth = data[DIMM_SDRAM_WIDTH];
+    }
+    DB(mvOsPrintf("DRAM sdramWidth[13]          0x%x\n",pDimmInfo->sdramWidth));
+        
+    /* Error Check Data Width */
+    if (data[DIMM_MEM_TYPE] == DIMM_MEM_TYPE_DDR3)
+    {
+	pDimmInfo->errorCheckDataWidth = (data[DDR3_DIMM_DATA_WIDTH] & DDR3_DIMM_DATA_ECC_MASK);
+    }
+    else
+    {
+	pDimmInfo->errorCheckDataWidth = data[DIMM_ERR_CHECK_DATA_WIDTH];
+    }
+    DB(mvOsPrintf("DRAM errorCheckDataWidth[14] 0x%x\n", 
+                                               pDimmInfo->errorCheckDataWidth));
+    
+    /* Burst Length Supported */
+    /*     SDRAM/DDR1:
+		    *******-******-******-******-******-******-******-******* 
+		    * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * 
+		    *******-******-******-******-******-******-******-******* 
+    burst length =  * Page | TBD  | TBD  | TBD  |  8   |  4   |  2   |   1  * 
+	            *********************************************************/ 
+    /*     DDR2:
+		    *******-******-******-******-******-******-******-******* 
+	            * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * 
+		    *******-******-******-******-******-******-******-******* 
+    burst length =  * Page | TBD  | TBD  | TBD  |  8   |  4   | TBD  | TBD  * 
+	            *********************************************************/ 
+    /*     DDR3: No data for this param support fix 8 */
+    if (data[DIMM_MEM_TYPE] == DIMM_MEM_TYPE_DDR3)
+    {
+	pDimmInfo->burstLengthSupported = 8;
+    }
+    else
+    {
+        pDimmInfo->burstLengthSupported = data[DIMM_BURST_LEN_SUP];
+    }
+    DB(mvOsPrintf("DRAM burstLengthSupported[16] 0x%x\n", 
+                                              pDimmInfo->burstLengthSupported));
+    
+    /* Number Of Banks On Each Device */
+    if (data[DIMM_MEM_TYPE] == DIMM_MEM_TYPE_DDR3)
+    {
+	pDimmInfo->numOfBanksOnEachDevice = (1 << 
+		((data[DDR3_DIMM_DEV_BANK_NUM] & DDR3_DIMM_DEV_BANK_MASK) >> DDR3_DIMM_DEV_BANK_OFF));
+    }
+    else
+    {
+	pDimmInfo->numOfBanksOnEachDevice = data[DIMM_DEV_BANK_NUM];
+    }
+    DB(mvOsPrintf("DRAM numOfBanksOnEachDevice[17] 0x%x\n", 
+                                            pDimmInfo->numOfBanksOnEachDevice));
+    
+	/* Suported Cas Latencies */
+                   
+	/*      SDRAM:
+	        *******-******-******-******-******-******-******-******* 
+		* bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * 
+                *******-******-******-******-******-******-******-******* 
+	CAS =   * TBD  |  7   |  6   |  5   |  4   |  3   |   2  |   1  * 
+	        ********************************************************/ 
+
+        /*     DDR 1:
+	        *******-******-******-******-******-******-******-******* 
+	        * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * 
+		*******-******-******-******-******-******-******-******* 
+        CAS =   * TBD  |  4   | 3.5  |   3  | 2.5  |  2   | 1.5  |   1  * 
+	        *********************************************************/
+
+        /*     DDR 2:
+	        *******-******-******-******-******-******-******-******* 
+	        * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * 
+		*******-******-******-******-******-******-******-******* 
+        CAS =   * TBD  | TBD  |  5   |  4   |  3   |  2   | TBD  | TBD  * 
+	        *********************************************************/
+
+        /*     DDR 3:
+	        *******-******-******-******-******-******-******-******* 
+	        * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * 
+		*******-******-******-******-******-******-******-******* 
+        CAS =   *  11  |  10  |  9   |  8   |  7   |  6   |  5   |  4   * 
+	        *********************************************************
+	        *******-******-******-******-******-******-******-************* 
+	        * bit15 | bit14 | bit13 | bit12 | bit11 | bit10 | bit9 | bit8 * 
+		********-*******-*******-*******-*******-*******-******-*******
+        CAS =   *  TBD  |   18  |  17   |  16   |  15   |  14   |  13  |  12  * 
+	        ***************************************************************/
+    
+    if (data[DIMM_MEM_TYPE] == DIMM_MEM_TYPE_DDR3)
+    {
+	/* DDR3 include 2 byte of CAS support */
+        pDimmInfo->suportedCasLatencies = ((data[DDR3_DIMM_SUP_CAL_MSB] << 8) |
+					     data[DDR3_DIMM_SUP_CAL_LSB]);
+    }
+    else
+    {
+        pDimmInfo->suportedCasLatencies = data[DIMM_SUP_CAL];
+    }
+    DB(mvOsPrintf("DRAM suportedCasLatencies[18]    0x%x\n", 
+                                              pDimmInfo->suportedCasLatencies));
+
+    /* For DDR2 only, get the DIMM type information */
+    if (pDimmInfo->memoryType == MEM_TYPE_DDR2)
+    {   
+	pDimmInfo->dimmTypeInfo = data[DIMM_DDR2_TYPE_INFORMATION];
+        DB(mvOsPrintf("DRAM dimmTypeInfo[20] (DDR2) 0x%x\n", 
+                                                 pDimmInfo->dimmTypeInfo));
+    }
+
+    /* SDRAM Modules Attributes, not relevant for DDR3 */
+    pDimmInfo->dimmAttributes = data[DIMM_BUF_ADDR_CONT_IN];
+    DB(mvOsPrintf("DRAM dimmAttributes[21]          0x%x\n",    
+                                                 pDimmInfo->dimmAttributes));
+    
+    /* Minimum Cycle Time At Max CasLatancy Minus 1*/
+    if (data[DIMM_MEM_TYPE] == DIMM_MEM_TYPE_DDR3)
+    {
+	/* DDR3 val are: SPD[16]/SPD[11] in nSec */
+	/* We mul it by 10 for the cas2ps function */
+        temp = (data[DDR3_MIN_CAS_LAT_TIME] * 10) / data[DDR3_DIMM_MTB_DIV];
+	/* Convert to pSec */
+        pDimmInfo->minCasLatTime = cas2ps(temp);
+    }
+    else
+    {
+        pDimmInfo->minCycleTimeAtMaxCasLatMinus1Ps = 
+                                    cas2ps(data[DIMM_MIN_CC_AT_MAX_CAS_MINUS1]);
+    }
+
+    /* Minimum Cycle Time At Max CasLatancy Minus 2
+    Not relevant for DDR3 */
+    pDimmInfo->minCycleTimeAtMaxCasLatMinus2Ps = 
+                                cas2ps(data[DIMM_MIN_CC_AT_MAX_CAS_MINUS2]);
+    /* Minimum Row Precharge Time */
+    if (data[DIMM_MEM_TYPE] == DIMM_MEM_TYPE_DDR3)
+    {
+	/* DDR3 val are: SPD[20]/SPD[11] in nSec */
+        pDimmInfo->minRowPrechargeTime = data[DDR3_DIMM_MIN_ROW_PRECHARGE_TIME] / data[DDR3_DIMM_MTB_DIV];
+    }
+    else
+    {
+        pDimmInfo->minRowPrechargeTime = data[DIMM_MIN_ROW_PRECHARGE_TIME];
+    }
+    DB(mvOsPrintf("DRAM minRowPrechargeTime[27]     0x%x\n", 
+                                            pDimmInfo->minRowPrechargeTime));
+
+    /* Minimum Row Active to Row Active Time */
+    if (data[DIMM_MEM_TYPE] == DIMM_MEM_TYPE_DDR3)
+    {
+	/* DDR3 val are: SPD[19]/SPD[11] in nSec */
+        pDimmInfo->minRowActiveToRowActive = data[DDR3_DIMM_MIN_ROW_ACTIVE_TO_ROW_ACTIVE] / data[DDR3_DIMM_MTB_DIV];
+    }
+    else
+    {
+	pDimmInfo->minRowActiveToRowActive = data[DIMM_MIN_ROW_ACTIVE_TO_ROW_ACTIVE];
+    }
+    DB(mvOsPrintf("DRAM minRowActiveToRowActive[28] 0x%x\n", 
+                                        pDimmInfo->minRowActiveToRowActive));
+
+    /* Mininmum Ras to Cas Delay */
+    if (data[DIMM_MEM_TYPE] == DIMM_MEM_TYPE_DDR3)
+    {
+	/* DDR3 val are: SPD[18]/SPD[11] in nSec */
+        pDimmInfo->minRasToCasDelay = data[DDR3_DIMM_MIN_RAS_TO_CAS_DELAY] / data[DDR3_DIMM_MTB_DIV];
+    }
+    else
+    {
+        pDimmInfo->minRasToCasDelay = data[DIMM_MIN_RAS_TO_CAS_DELAY];
+    }
+    DB(mvOsPrintf("DRAM minRasToCasDelay[29]        0x%x\n", 
+                                                  pDimmInfo->minRasToCasDelay));
+
+    /* Mininmum Ras Pulse width */
+    if (data[DIMM_MEM_TYPE] == DIMM_MEM_TYPE_DDR3)
+    {
+	/* DDR3 val are: (SPD[21] << 8 | SPD[22])/SPD[11] in nSec */
+        temp = ((data[DDR3_DIMM_MIN_RAS_PULSE_WIDTH_MSB] & DDR3_DIMM_MIN_RAS_PULSE_WIDTH_MSB_MASK) << 8)| 
+			data[DDR3_DIMM_MIN_RAS_PULSE_WIDTH_LSB];
+        temp = temp / data[DDR3_DIMM_MTB_DIV];
+        pDimmInfo->minRasPulseWidth = temp;
+    }
+    else
+    {
+        pDimmInfo->minRasPulseWidth = data[DIMM_MIN_RAS_PULSE_WIDTH];
+    }
+    DB(mvOsPrintf("DRAM minRasPulseWidth[30]        0x%x\n", 
+                                                  pDimmInfo->minRasPulseWidth));
+        
+    /* DIMM Bank Density */
+    if (data[DIMM_MEM_TYPE] == DIMM_MEM_TYPE_DDR3)
+    {
+	/* DDR3 device density val are: (device capacity/8) * (Module_width/Device_width) */
+        temp = ((data[DDR3_DIMM_DEV_DENSITY] & DDR3_DIMM_DEV_DENSITY_MASK) + 1) * (256/8);
+        temp *= (pDimmInfo->dataWidth / 
+		(((data[DDR3_DIMM_MODULE_ORG] & DDR3_DIMM_MODULE_DEVICE_WIDTH_MASK) + 1) * 2));
+        pDimmInfo->dimmBankDensity = temp;
+    }
+    else
+    {
+	pDimmInfo->dimmBankDensity = data[DIMM_BANK_DENSITY];
+    }
+    DB(mvOsPrintf("DRAM dimmBankDensity[31]         0x%x\n", 
+                                                   pDimmInfo->dimmBankDensity));
+
+    /* For DDR3 and DDR2 includes Write Recovery Time field. Other SDRAM ignore     */
+    if (data[DIMM_MEM_TYPE] == DIMM_MEM_TYPE_DDR3)
+    {
+        temp = data[DIMM_MIN_WRITE_RECOVERY_TIME] / data[DDR3_DIMM_MTB_DIV];
+        pDimmInfo->minWriteRecoveryTime = temp;
+    }
+    else
+    {
+        pDimmInfo->minWriteRecoveryTime = data[DIMM_MIN_WRITE_RECOVERY_TIME];
+    }
+    DB(mvOsPrintf("DRAM minWriteRecoveryTime[36]    0x%x\n", 
+                                        pDimmInfo->minWriteRecoveryTime));
+    
+    /* For DDR3 and DDR2 includes Internal Write To Read Command Delay field.       */
+    if (data[DIMM_MEM_TYPE] == DIMM_MEM_TYPE_DDR3)
+    {
+        temp = data[DDR3_DIMM_MIN_WRITE_TO_READ_CMD_DELAY] / data[DDR3_DIMM_MTB_DIV];
+        pDimmInfo->minWriteToReadCmdDelay = temp;
+    }
+    else
+    {
+        pDimmInfo->minWriteToReadCmdDelay = data[DIMM_MIN_WRITE_TO_READ_CMD_DELAY];
+    }
+    DB(mvOsPrintf("DRAM minWriteToReadCmdDelay[37]  0x%x\n", 
+                                        pDimmInfo->minWriteToReadCmdDelay));
+    
+    /* For DDR3 and DDR2 includes Internal Read To Precharge Command Delay field.   */
+    if (data[DIMM_MEM_TYPE] == DIMM_MEM_TYPE_DDR3)
+    {
+        temp = data[DDR3_DIMM_MIN_READ_TO_PRECH_CMD_DELAY] / data[DDR3_DIMM_MTB_DIV];
+        pDimmInfo->minReadToPrechCmdDelay = temp;
+    }
+    else
+    {
+        pDimmInfo->minReadToPrechCmdDelay = data[DIMM_MIN_READ_TO_PRECH_CMD_DELAY];
+    }
+    DB(mvOsPrintf("DRAM minReadToPrechCmdDelay[38]  0x%x\n",    
+                                        pDimmInfo->minReadToPrechCmdDelay));
+    
+    /* For DDR3 and DDR2 includes Minimum Refresh to Activate/Refresh Command field */
+    if (data[DIMM_MEM_TYPE] == DIMM_MEM_TYPE_DDR3)
+    {
+        temp = (data[DDR3_DIMM_MIN_REFRESH_TO_ACTIVATE_CMD_MSB] << 8) |
+		data[DDR3_DIMM_MIN_REFRESH_TO_ACTIVATE_CMD_LSB];
+        temp /= data[DDR3_DIMM_MTB_DIV];
+        pDimmInfo->minRefreshToActiveCmd = temp;
+    }
+    else
+    {
+        pDimmInfo->minRefreshToActiveCmd = data[DIMM_MIN_REFRESH_TO_ACTIVATE_CMD];
+    }
+    DB(mvOsPrintf("DRAM minRefreshToActiveCmd[42]   0x%x\n", 
+                                        pDimmInfo->minRefreshToActiveCmd));
+                 
+    /* For DDR3 and DDR2 includes Minimum Activate to Activate/Refresh Command field */
+    if (data[DIMM_MEM_TYPE] == DIMM_MEM_TYPE_DDR3)
+    {
+        temp = ((data[DDR3_DIMM_MIN_ACTIVATE_TO_ACTIVATE_CMD_MSB] >> 4) << 8) |
+		data[DDR3_DIMM_MIN_ACTIVATE_TO_ACTIVATE_CMD_LSB];
+        temp /= data[DDR3_DIMM_MTB_DIV];
+        pDimmInfo->minActivateToActiveCmd = temp;
+    }
+    else
+    {
+        pDimmInfo->minActivateToActiveCmd = data[DIMM_MIN_ACTIVATE_TO_ACTIVATE_CMD];
+    }
+    DB(mvOsPrintf("DRAM minActivateToActiveCmd[41]   0x%x\n", 
+                                        pDimmInfo->minActivateToActiveCmd));
+
+    /* For DDR3 includes Minimum Activate to Activate/Refresh Command field */
+    if (data[DIMM_MEM_TYPE] == DIMM_MEM_TYPE_DDR3)
+    {
+        temp = ((data[DDR3_DIMM_MIN_FOUR_ACTIVATE_WIN_DELAY_MSB] & 
+		DDR3_DIMM_MIN_FOUR_ACTIVATE_WIN_DELAY_MSB_MASK) << 8) |
+		data[DDR3_DIMM_MIN_FOUR_ACTIVATE_WIN_DELAY_LSB];
+        temp /= data[DDR3_DIMM_MTB_DIV];
+        pDimmInfo->minFourActiveWinDelay = temp;
+	DB(mvOsPrintf("DRAM minFourActiveWinDelay[29|28]   0x%x\n", 
+                                        pDimmInfo->minFourActiveWinDelay));
+    }
+
+	/* calculating the sdram density. Representing device density from      */
+        /* bit 20 to allow representation of 4GB and above.                     */
+        /* For example, if density is 512Mbit 0x20000000, will be represent in  */
+        /* deviceDensity by 0x20000000 >> 16 --> 0x00000200. Another example    */
+        /* is density 8GB 0x200000000 >> 16 --> 0x00002000.                     */
+        density = (1 << ((pDimmInfo->numOfRowAddr + pDimmInfo->numOfColAddr) - 20));
+        pDimmInfo->deviceDensity = density * 
+                                pDimmInfo->numOfBanksOnEachDevice * 
+                                pDimmInfo->sdramWidth;
+	DB(mvOsPrintf("DRAM deviceDensity           %d\n",pDimmInfo->deviceDensity));
+    
+        /* Number of devices includeing Error correction */
+        pDimmInfo->numberOfDevices = (pDimmInfo->dataWidth/pDimmInfo->sdramWidth) * 
+                                  pDimmInfo->numOfModuleBanks;
+        DB(mvOsPrintf("DRAM numberOfDevices         %d\n",  
+                                                   pDimmInfo->numberOfDevices));
+
+    pDimmInfo->size = 0; 
+    /* Note that pDimmInfo->size is in MB units */
+    if (pDimmInfo->memoryType == MEM_TYPE_SDRAM)
+    {
+        if (pDimmInfo->dimmBankDensity & BIT0)
+            pDimmInfo->size += 1024;                /* Equal to 1GB     */
+        else if (pDimmInfo->dimmBankDensity & BIT1)
+            pDimmInfo->size += 8;                   /* Equal to 8MB     */
+        else if (pDimmInfo->dimmBankDensity & BIT2)
+            pDimmInfo->size += 16;                  /* Equal to 16MB    */
+        else if (pDimmInfo->dimmBankDensity & BIT3)
+            pDimmInfo->size += 32;                  /* Equal to 32MB    */
+        else if (pDimmInfo->dimmBankDensity & BIT4)
+            pDimmInfo->size += 64;                  /* Equal to 64MB    */
+        else if (pDimmInfo->dimmBankDensity & BIT5)
+            pDimmInfo->size += 128;                 /* Equal to 128MB   */
+        else if (pDimmInfo->dimmBankDensity & BIT6) 
+            pDimmInfo->size += 256;                 /* Equal to 256MB   */
+        else if (pDimmInfo->dimmBankDensity & BIT7) 
+            pDimmInfo->size += 512;                 /* Equal to 512MB   */
+    }
+    else if (pDimmInfo->memoryType == MEM_TYPE_DDR1)
+    {
+        if (pDimmInfo->dimmBankDensity & BIT0)
+            pDimmInfo->size += 1024;                /* Equal to 1GB     */
+        else if (pDimmInfo->dimmBankDensity & BIT1)
+            pDimmInfo->size += 2048;                /* Equal to 2GB     */
+        else if (pDimmInfo->dimmBankDensity & BIT2)
+            pDimmInfo->size += 16;                  /* Equal to 16MB    */
+        else if (pDimmInfo->dimmBankDensity & BIT3)
+            pDimmInfo->size += 32;                  /* Equal to 32MB    */
+        else if (pDimmInfo->dimmBankDensity & BIT4)
+            pDimmInfo->size += 64;                  /* Equal to 64MB    */
+        else if (pDimmInfo->dimmBankDensity & BIT5)
+            pDimmInfo->size += 128;                 /* Equal to 128MB   */
+        else if (pDimmInfo->dimmBankDensity & BIT6) 
+            pDimmInfo->size += 256;                 /* Equal to 256MB   */
+        else if (pDimmInfo->dimmBankDensity & BIT7) 
+            pDimmInfo->size += 512;                 /* Equal to 512MB   */
+    }
+    else if (pDimmInfo->memoryType == MEM_TYPE_DDR2)
+    {
+        if (pDimmInfo->dimmBankDensity & BIT0)
+            pDimmInfo->size += 1024;                /* Equal to 1GB     */
+        else if (pDimmInfo->dimmBankDensity & BIT1)
+            pDimmInfo->size += 2048;                /* Equal to 2GB     */
+        else if (pDimmInfo->dimmBankDensity & BIT2)
+            pDimmInfo->size += 4096;                /* Equal to 4GB     */
+        else if (pDimmInfo->dimmBankDensity & BIT3)
+            pDimmInfo->size += 8192;                /* Equal to 8GB     */
+        else if (pDimmInfo->dimmBankDensity & BIT4)
+            pDimmInfo->size += 16384;               /* Equal to 16GB    */
+        else if (pDimmInfo->dimmBankDensity & BIT5)
+            pDimmInfo->size += 128;                 /* Equal to 128MB   */
+        else if (pDimmInfo->dimmBankDensity & BIT6) 
+            pDimmInfo->size += 256;                 /* Equal to 256MB   */
+        else if (pDimmInfo->dimmBankDensity & BIT7) 
+            pDimmInfo->size += 512;                 /* Equal to 512MB   */
+    }
+    else /* if (dimmInfo.memoryType == MEM_TYPE_DDR3) */
+    {
+        if (pDimmInfo->dimmBankDensity & BIT0)
+            pDimmInfo->size += 1024;                /* Equal to 1GB     */
+        else if (pDimmInfo->dimmBankDensity & BIT1)
+            pDimmInfo->size += 2048;                /* Equal to 2GB     */
+        else if (pDimmInfo->dimmBankDensity & BIT2)
+            pDimmInfo->size += 4096;                /* Equal to 4GB     */
+        else if (pDimmInfo->dimmBankDensity & BIT3)
+            pDimmInfo->size += 8192;                /* Equal to 8GB     */
+        else if (pDimmInfo->dimmBankDensity & BIT4)
+            pDimmInfo->size += 16384;               /* Equal to 16GB    */
+        else if (pDimmInfo->dimmBankDensity & BIT5)
+            pDimmInfo->size += 128;                 /* Equal to 128MB   */
+        else if (pDimmInfo->dimmBankDensity & BIT6) 
+            pDimmInfo->size += 256;                 /* Equal to 256MB   */
+        else if (pDimmInfo->dimmBankDensity & BIT7) 
+            pDimmInfo->size += 512;                 /* Equal to 512MB   */
+    }
+    
+    pDimmInfo->size *= pDimmInfo->numOfModuleBanks;
+
+    DB(mvOsPrintf("Dram: dimm size    %dMB \n",pDimmInfo->size));
+
+    return MV_OK;
+}
+
+/*******************************************************************************
+* dimmSpdPrint - Print the SPD parameters.
+*
+* DESCRIPTION:
+*       Print the Dimm SPD parameters.
+*
+* INPUT:
+*       pDimmInfo - DIMM information structure.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_VOID dimmSpdPrint(MV_U32 dimmNum, MV_U32 sysClock)
+{
+    MV_DIMM_INFO dimmInfo;
+    MV_U32  i, temp = 0;
+    MV_U32  k, maskLeftOfPoint = 0, maskRightOfPoint = 0;
+    MV_U32  rightOfPoint = 0,leftOfPoint = 0, div, time_tmp, shift;
+    MV_U32  busClkPs;
+    MV_U8   trp_clocks=0, trcd_clocks, tras_clocks, trrd_clocks,
+            temp_buf[40], *spdRawData;
+
+    busClkPs = 1000000000 / (sysClock / 100);  /* in 10 ps units */
+
+    spdRawData = dimmInfo.spdRawData;
+    
+    if(MV_OK != dimmSpdGet(dimmNum, &dimmInfo))
+    {
+        mvOsOutput("ERROR: Could not read SPD information!\n");
+        return;
+    }
+
+    /* find Manufactura of Dimm Module */
+    mvOsOutput("\nManufacturer's JEDEC ID Code:   ");
+    for(i = 0 ; i < DIMM_MODULE_MANU_SIZE ; i++)
+    {
+        mvOsOutput("%x",spdRawData[DIMM_MODULE_MANU_OFFS + i]);
+    }
+    mvOsOutput("\n");
+
+    /* Manufacturer's Specific Data */
+    for(i = 0 ; i < DIMM_MODULE_ID_SIZE ; i++)
+    {
+        temp_buf[i] = spdRawData[DIMM_MODULE_ID_OFFS + i];
+    }
+    mvOsOutput("Manufacturer's Specific Data:   %s\n", temp_buf);
+
+    /* Module Part Number */
+    for(i = 0 ; i < DIMM_MODULE_VEN_SIZE ; i++)
+    {
+        temp_buf[i] = spdRawData[DIMM_MODULE_VEN_OFFS + i];
+    }
+    mvOsOutput("Module Part Number:             %s\n", temp_buf);
+
+    /* Module Serial Number */
+    for(i = 0; i < sizeof(MV_U32); i++)
+    {
+    	temp |= spdRawData[95+i] << 8*i;
+    }
+    mvOsOutput("DIMM Serial No.                 %ld (%lx)\n", (long)temp, 
+                                    (long)temp);
+
+    /* find Manufac-Data of Dimm Module */
+    mvOsOutput("Manufactoring Date:             Year 20%d%d/ ww %d%d\n", 
+                        ((spdRawData[93] & 0xf0) >> 4), (spdRawData[93] & 0xf), 
+                        ((spdRawData[94] & 0xf0) >> 4), (spdRawData[94] & 0xf)); 
+    /* find modul_revision of Dimm Module */
+    mvOsOutput("Module Revision:                %d.%d\n", 
+               spdRawData[62]/10, spdRawData[62]%10); 
+
+    /* find manufac_place of Dimm Module */
+    mvOsOutput("manufac_place:                  %d\n", spdRawData[72]);
+    
+    /* go over the first 35 I2C data bytes */
+    for(i = 2 ; i <= 35 ; i++)
+       switch(i)
+        {
+            case 2:  /* Memory type (DDR1/2 / SDRAM) */
+                if (dimmInfo.memoryType == MEM_TYPE_SDRAM)
+                    mvOsOutput("Dram Type is:                   SDRAM\n");
+                else if (dimmInfo.memoryType == MEM_TYPE_DDR1)
+                    mvOsOutput("Dram Type is:                   SDRAM DDR1\n");
+                else if (dimmInfo.memoryType == MEM_TYPE_DDR2)
+                    mvOsOutput("Dram Type is:                   SDRAM DDR2\n");
+                else
+                    mvOsOutput("Dram Type unknown\n");
+                break;
+/*----------------------------------------------------------------------------*/
+
+            case 3:  /* Number Of Row Addresses */
+                mvOsOutput("Module Number of row addresses: %d\n", 
+                                                        dimmInfo.numOfRowAddr);
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 4:  /* Number Of Column Addresses */
+                mvOsOutput("Module Number of col addresses: %d\n", 
+                                                        dimmInfo.numOfColAddr);
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 5:  /* Number Of Module Banks */
+                mvOsOutput("Number of Banks on Mod.:        %d\n",  
+                                                    dimmInfo.numOfModuleBanks);
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 6:  /* Data Width */
+                mvOsOutput("Module Data Width:              %d bit\n",  
+                                                           dimmInfo.dataWidth);
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 8:  /* Voltage Interface */
+                switch(spdRawData[i])
+                {
+                    case 0x0:
+                        mvOsOutput("Module is               TTL_5V_TOLERANT\n");
+                        break;
+                    case 0x1:
+                        mvOsOutput("Module is               LVTTL\n");
+                        break;
+                    case 0x2:
+                        mvOsOutput("Module is               HSTL_1_5V\n");
+                        break;
+                    case 0x3:
+                        mvOsOutput("Module is               SSTL_3_3V\n");
+                        break;
+                    case 0x4:
+                        mvOsOutput("Module is               SSTL_2_5V\n");
+                        break;
+                    case 0x5:
+                        if (dimmInfo.memoryType != MEM_TYPE_SDRAM)
+                        {
+                            mvOsOutput("Module is                 SSTL_1_8V\n");
+                            break;
+                        }
+                    default:
+                        mvOsOutput("Module is               VOLTAGE_UNKNOWN\n");
+                        break;
+                }
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 9:  /* Minimum Cycle Time At Max CasLatancy */
+                leftOfPoint = (spdRawData[i] & 0xf0) >> 4;
+                rightOfPoint = (spdRawData[i] & 0x0f) * 10;
+                
+                /* DDR2 addition of right of point */
+                if ((spdRawData[i] & 0x0f) == 0xA)
+                {
+                    rightOfPoint = 25;
+                }
+                if ((spdRawData[i] & 0x0f) == 0xB)
+                {
+                    rightOfPoint = 33;
+                }
+                if ((spdRawData[i] & 0x0f) == 0xC)
+                {
+                    rightOfPoint = 66;
+                }
+                if ((spdRawData[i] & 0x0f) == 0xD)
+                {
+                    rightOfPoint = 75;
+                }
+                mvOsOutput("Minimum Cycle Time At Max CL:   %d.%d [ns]\n",
+                                                    leftOfPoint, rightOfPoint);
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 10: /* Clock To Data Out */
+                div = (dimmInfo.memoryType == MEM_TYPE_SDRAM)? 10:100;
+                time_tmp = (((spdRawData[i] & 0xf0) >> 4)*10) + 
+                                                      ((spdRawData[i] & 0x0f));
+                leftOfPoint     = time_tmp / div;
+                rightOfPoint    = time_tmp % div;
+                mvOsOutput("Clock To Data Out:              %d.%d [ns]\n",
+                                                    leftOfPoint, rightOfPoint);
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 11: /* Error Check Type */
+                mvOsOutput("Error Check Type (0=NONE):      %d\n", 
+                                                      dimmInfo.errorCheckType);
+                break;
+/*----------------------------------------------------------------------------*/
+
+            case 12: /* Refresh Interval */
+                mvOsOutput("Refresh Rate:                   %x\n", 
+                                                     dimmInfo.refreshInterval);
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 13: /* Sdram Width */
+                mvOsOutput("Sdram Width:                    %d bits\n",     
+                                                          dimmInfo.sdramWidth);
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 14: /* Error Check Data Width */
+                mvOsOutput("Error Check Data Width:         %d bits\n", 
+                                                 dimmInfo.errorCheckDataWidth);
+                break;
+/*----------------------------------------------------------------------------*/
+
+           case 15: /* Minimum Clock Delay is unsupported */
+                if ((dimmInfo.memoryType == MEM_TYPE_SDRAM) ||
+                    (dimmInfo.memoryType == MEM_TYPE_DDR1))
+                {
+                    mvOsOutput("Minimum Clk Delay back to back: %d\n", 
+                                                                spdRawData[i]);
+                }
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 16: /* Burst Length Supported */
+    /*     SDRAM/DDR1:
+                    *******-******-******-******-******-******-******-******* 
+                    * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * 
+                    *******-******-******-******-******-******-******-******* 
+    burst length =  * Page | TBD  | TBD  | TBD  |  8   |  4   |  2   |   1  * 
+                    *********************************************************/ 
+    /*     DDR2:
+                    *******-******-******-******-******-******-******-******* 
+                    * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * 
+                    *******-******-******-******-******-******-******-******* 
+    burst length =  * Page | TBD  | TBD  | TBD  |  8   |  4   | TBD  | TBD  * 
+                    *********************************************************/ 
+                mvOsOutput("Burst Length Supported: ");
+                if ((dimmInfo.memoryType == MEM_TYPE_SDRAM) ||
+                    (dimmInfo.memoryType == MEM_TYPE_DDR1))
+                {
+                    if (dimmInfo.burstLengthSupported & BIT0)
+                        mvOsOutput("1, ");
+                    if (dimmInfo.burstLengthSupported & BIT1)
+                        mvOsOutput("2, ");
+                }
+                if (dimmInfo.burstLengthSupported & BIT2)
+                    mvOsOutput("4, ");
+                if (dimmInfo.burstLengthSupported & BIT3) 
+                    mvOsOutput("8, ");
+                
+                mvOsOutput(" Bit \n");
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 17: /* Number Of Banks On Each Device */
+                mvOsOutput("Number Of Banks On Each Chip:   %d\n",  
+                                              dimmInfo.numOfBanksOnEachDevice);
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 18: /* Suported Cas Latencies */
+                   
+            /*      SDRAM:
+                    *******-******-******-******-******-******-******-******* 
+                    * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * 
+                    *******-******-******-******-******-******-******-******* 
+            CAS =   * TBD  |  7   |  6   |  5   |  4   |  3   |   2  |   1  * 
+                    ********************************************************/ 
+
+            /*     DDR 1:
+                    *******-******-******-******-******-******-******-******* 
+                    * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * 
+                    *******-******-******-******-******-******-******-******* 
+            CAS =   * TBD  |  4   | 3.5  |   3  | 2.5  |  2   | 1.5  |   1  * 
+                    *********************************************************/
+
+            /*     DDR 2:
+                    *******-******-******-******-******-******-******-******* 
+                    * bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * 
+                    *******-******-******-******-******-******-******-******* 
+            CAS =   * TBD  | TBD  |  5   |  4   |  3   |  2   | TBD  | TBD  * 
+                    *********************************************************/
+
+                mvOsOutput("Suported Cas Latencies: (CL) 			");
+                if (dimmInfo.memoryType == MEM_TYPE_SDRAM)
+                {
+                    for (k = 0; k <=7; k++)
+                    {
+                        if (dimmInfo.suportedCasLatencies & (1 << k))
+                            mvOsOutput("%d,             ", k+1);
+                    }
+                }
+                else if (dimmInfo.memoryType == MEM_TYPE_DDR1)
+                {
+                    if (dimmInfo.suportedCasLatencies & BIT0)
+                        mvOsOutput("1, ");
+                    if (dimmInfo.suportedCasLatencies & BIT1)
+                        mvOsOutput("1.5, ");
+                    if (dimmInfo.suportedCasLatencies & BIT2)
+                        mvOsOutput("2, ");
+                    if (dimmInfo.suportedCasLatencies & BIT3)
+                        mvOsOutput("2.5, ");
+                    if (dimmInfo.suportedCasLatencies & BIT4)
+                        mvOsOutput("3, ");
+                    if (dimmInfo.suportedCasLatencies & BIT5)
+                        mvOsOutput("3.5, ");
+                }
+                else if (dimmInfo.memoryType == MEM_TYPE_DDR2)
+                {
+                    if (dimmInfo.suportedCasLatencies & BIT2)
+                        mvOsOutput("2, ");
+                    if (dimmInfo.suportedCasLatencies & BIT3)
+                        mvOsOutput("3, ");
+                    if (dimmInfo.suportedCasLatencies & BIT4)
+                        mvOsOutput("4, ");
+                    if (dimmInfo.suportedCasLatencies & BIT5)
+                        mvOsOutput("5, ");		
+                }
+                else
+                    mvOsOutput("?.?, ");		
+                mvOsOutput("\n");
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 20:   /* DDR2 DIMM type info */
+                if (dimmInfo.memoryType == MEM_TYPE_DDR2)
+                {
+                    if (dimmInfo.dimmTypeInfo & (BIT0 | BIT4))
+                        mvOsOutput("Registered DIMM (RDIMM)\n");
+                    else if (dimmInfo.dimmTypeInfo & (BIT1 | BIT5))
+                        mvOsOutput("Unbuffered DIMM (UDIMM)\n");
+                    else 
+                        mvOsOutput("Unknown DIMM type.\n");
+                }
+
+                break;
+/*----------------------------------------------------------------------------*/
+   
+            case 21: /* SDRAM Modules Attributes */
+                mvOsOutput("\nModule Attributes (SPD Byte 21): \n");
+                
+                if (dimmInfo.memoryType == MEM_TYPE_SDRAM)
+                {
+                    if (dimmInfo.dimmAttributes & BIT0)
+                        mvOsOutput(" Buffered Addr/Control Input:   Yes\n");
+                    else
+                        mvOsOutput(" Buffered Addr/Control Input:   No\n");
+
+                    if (dimmInfo.dimmAttributes & BIT1)
+                        mvOsOutput(" Registered Addr/Control Input: Yes\n");
+                    else
+                        mvOsOutput(" Registered Addr/Control Input: No\n");
+   
+                    if (dimmInfo.dimmAttributes & BIT2)
+                        mvOsOutput(" On-Card PLL (clock):           Yes \n");
+                    else
+                        mvOsOutput(" On-Card PLL (clock):           No \n");
+
+                    if (dimmInfo.dimmAttributes & BIT3)
+                        mvOsOutput(" Bufferd DQMB Input:            Yes \n");
+                    else
+                        mvOsOutput(" Bufferd DQMB Inputs:           No \n");
+   
+                    if (dimmInfo.dimmAttributes & BIT4)
+                        mvOsOutput(" Registered DQMB Inputs:        Yes \n");
+                    else
+                        mvOsOutput(" Registered DQMB Inputs:        No \n");
+ 
+                    if (dimmInfo.dimmAttributes & BIT5)
+                        mvOsOutput(" Differential Clock Input:      Yes \n");
+                    else
+                        mvOsOutput(" Differential Clock Input:      No \n");
+   
+                    if (dimmInfo.dimmAttributes & BIT6)
+                        mvOsOutput(" redundant Row Addressing:      Yes \n");
+                    else
+                        mvOsOutput(" redundant Row Addressing:      No \n");
+                }
+                else if (dimmInfo.memoryType == MEM_TYPE_DDR1)
+                {
+                    if (dimmInfo.dimmAttributes & BIT0)
+                        mvOsOutput(" Buffered Addr/Control Input:   Yes\n");
+                    else 
+                        mvOsOutput(" Buffered Addr/Control Input:   No\n");
+   
+                    if (dimmInfo.dimmAttributes & BIT1)
+                        mvOsOutput(" Registered Addr/Control Input: Yes\n");
+                    else
+                        mvOsOutput(" Registered Addr/Control Input: No\n");
+   
+                    if (dimmInfo.dimmAttributes & BIT2)
+                        mvOsOutput(" On-Card PLL (clock):           Yes \n");
+                    else
+                        mvOsOutput(" On-Card PLL (clock):           No \n");
+            
+                    if (dimmInfo.dimmAttributes & BIT3)
+                        mvOsOutput(" FET Switch On-Card Enabled:    Yes \n");
+                    else
+                        mvOsOutput(" FET Switch On-Card Enabled:    No \n");
+                    
+                    if (dimmInfo.dimmAttributes & BIT4)
+                        mvOsOutput(" FET Switch External Enabled:   Yes \n");
+                    else
+                        mvOsOutput(" FET Switch External Enabled:   No \n");
+
+                    if (dimmInfo.dimmAttributes & BIT5)
+                        mvOsOutput(" Differential Clock Input:      Yes \n");
+                    else
+                        mvOsOutput(" Differential Clock Input:      No \n");
+                }
+                else /* if (dimmInfo.memoryType == MEM_TYPE_DDR2) */
+                {
+                    mvOsOutput(" Number of Active Registers on the DIMM: %d\n", 
+                                        (dimmInfo.dimmAttributes & 0x3) + 1);
+            
+                    mvOsOutput(" Number of PLLs on the DIMM: %d\n", 
+                                      ((dimmInfo.dimmAttributes) >> 2) & 0x3);
+               
+                    if (dimmInfo.dimmAttributes & BIT4)
+                        mvOsOutput(" FET Switch External Enabled:   Yes \n");
+                    else
+                        mvOsOutput(" FET Switch External Enabled:   No \n");
+
+                    if (dimmInfo.dimmAttributes & BIT6)
+                        mvOsOutput(" Analysis probe installed:      Yes \n");
+                    else
+                        mvOsOutput(" Analysis probe installed:      No \n");
+                }
+                
+                break;
+/*----------------------------------------------------------------------------*/
+
+            case 22: /* Suported AutoPreCharge */
+                mvOsOutput("\nModul Attributes (SPD Byte 22): \n");
+                if (dimmInfo.memoryType == MEM_TYPE_SDRAM)
+                {
+                    if ( spdRawData[i] & BIT0 )
+                        mvOsOutput(" Early Ras Precharge:           Yes \n");
+                    else
+                        mvOsOutput(" Early Ras Precharge:           No \n");
+                                                        
+                    if ( spdRawData[i] & BIT1 )                 
+                        mvOsOutput(" AutoPreCharge:                 Yes \n");
+                    else
+                        mvOsOutput(" AutoPreCharge:                 No \n");
+                                                            
+                    if ( spdRawData[i] & BIT2 )                 
+                        mvOsOutput(" Precharge All:                 Yes \n");
+                    else
+                        mvOsOutput(" Precharge All:                 No \n");
+                                                        
+                    if ( spdRawData[i] & BIT3 )                 
+                        mvOsOutput(" Write 1/ReadBurst:             Yes \n");
+                    else
+                        mvOsOutput(" Write 1/ReadBurst:             No \n");
+                                                        
+                    if ( spdRawData[i] & BIT4 )                 
+                        mvOsOutput(" lower VCC tolerance:           5%%\n");
+                    else
+                        mvOsOutput(" lower VCC tolerance:           10%%\n");
+                                                        
+                    if ( spdRawData[i] & BIT5 )                 
+                        mvOsOutput(" upper VCC tolerance:           5%%\n");
+                    else
+                        mvOsOutput(" upper VCC tolerance:           10%%\n");
+                }
+                else if (dimmInfo.memoryType == MEM_TYPE_DDR1)
+                {
+                    if ( spdRawData[i] & BIT0 )
+                        mvOsOutput(" Supports Weak Driver:          Yes \n");
+                    else
+                        mvOsOutput(" Supports Weak Driver:          No \n");
+
+                    if ( !(spdRawData[i] & BIT4) )
+                        mvOsOutput(" lower VCC tolerance:           0.2V\n");
+   
+                    if ( !(spdRawData[i] & BIT5) )
+                        mvOsOutput(" upper VCC tolerance:           0.2V\n");
+
+                    if ( spdRawData[i] & BIT6 )
+                        mvOsOutput(" Concurrent Auto Preharge:      Yes \n");
+                    else
+                        mvOsOutput(" Concurrent Auto Preharge:      No \n");
+
+                    if ( spdRawData[i] & BIT7 )
+                        mvOsOutput(" Supports Fast AP:              Yes \n");
+                    else
+                        mvOsOutput(" Supports Fast AP:              No \n");
+                }
+                else if (dimmInfo.memoryType == MEM_TYPE_DDR2)
+                {
+                    if ( spdRawData[i] & BIT0 )
+                        mvOsOutput(" Supports Weak Driver:          Yes \n");
+                    else
+                        mvOsOutput(" Supports Weak Driver:          No \n");
+                }
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 23:
+            /* Minimum Cycle Time At Maximum Cas Latancy Minus 1 (2nd highest CL) */
+                leftOfPoint = (spdRawData[i] & 0xf0) >> 4;
+                rightOfPoint = (spdRawData[i] & 0x0f) * 10;
+                
+                /* DDR2 addition of right of point */
+                if ((spdRawData[i] & 0x0f) == 0xA)
+                {
+                    rightOfPoint = 25;
+                }
+                if ((spdRawData[i] & 0x0f) == 0xB)
+                {
+                    rightOfPoint = 33;
+                }
+                if ((spdRawData[i] & 0x0f) == 0xC)
+                {
+                    rightOfPoint = 66;
+                }
+                if ((spdRawData[i] & 0x0f) == 0xD)
+                {
+                    rightOfPoint = 75;
+                }
+
+                mvOsOutput("Minimum Cycle Time At 2nd highest CasLatancy"
+                           "(0 = Not supported): %d.%d [ns]\n",
+                           leftOfPoint, rightOfPoint );
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 24: /* Clock To Data Out 2nd highest Cas Latency Value*/
+                div = (dimmInfo.memoryType == MEM_TYPE_SDRAM) ? 10:100;
+                time_tmp = (((spdRawData[i] & 0xf0) >> 4)*10) + 
+                                                    ((spdRawData[i] & 0x0f));
+                leftOfPoint     = time_tmp / div;
+                rightOfPoint    = time_tmp % div;
+                mvOsOutput("Clock To Data Out (2nd CL value): 		%d.%d [ns]\n",
+                                                    leftOfPoint, rightOfPoint);
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 25: 
+            /* Minimum Cycle Time At Maximum Cas Latancy Minus 2 (3rd highest CL) */
+                if (dimmInfo.memoryType == MEM_TYPE_SDRAM)
+                {
+                    leftOfPoint = (spdRawData[i] & 0xfc) >> 2;
+                    rightOfPoint = (spdRawData[i] & 0x3) * 25;
+                }
+                else    /* DDR1 or DDR2 */ 
+                {
+                    leftOfPoint = (spdRawData[i] & 0xf0) >> 4;
+                    rightOfPoint = (spdRawData[i] & 0x0f) * 10;
+                    
+                    /* DDR2 addition of right of point */
+                    if ((spdRawData[i] & 0x0f) == 0xA)
+                    {
+                        rightOfPoint = 25;
+                    }
+                    if ((spdRawData[i] & 0x0f) == 0xB)
+                    {
+                        rightOfPoint = 33;
+                    }
+                    if ((spdRawData[i] & 0x0f) == 0xC)
+                    {
+                        rightOfPoint = 66;
+                    }
+                    if ((spdRawData[i] & 0x0f) == 0xD)
+                    {
+                        rightOfPoint = 75;
+                    }
+                }
+                mvOsOutput("Minimum Cycle Time At 3rd highest CasLatancy" 
+                           "(0 = Not supported): %d.%d [ns]\n",
+                           leftOfPoint, rightOfPoint );
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 26: /* Clock To Data Out 3rd highest Cas Latency Value*/
+                if (dimmInfo.memoryType == MEM_TYPE_SDRAM)
+                {
+                    leftOfPoint = (spdRawData[i] & 0xfc) >> 2;
+                    rightOfPoint = (spdRawData[i] & 0x3) * 25;
+                }
+                else    /* DDR1 or DDR2 */ 
+                {
+                    time_tmp = (((spdRawData[i] & 0xf0) >> 4)*10) + 
+                                                      ((spdRawData[i] & 0x0f));
+                    leftOfPoint     = 0;
+                    rightOfPoint    = time_tmp;
+                }
+                mvOsOutput("Clock To Data Out (3rd CL value): 		%d.%2d[ns]\n",
+                                                  leftOfPoint, rightOfPoint );
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 27: /* Minimum Row Precharge Time */
+                shift = (dimmInfo.memoryType == MEM_TYPE_SDRAM)? 0:2;
+                maskLeftOfPoint  = (dimmInfo.memoryType == MEM_TYPE_SDRAM) ? 
+                                                                    0xff : 0xfc;
+                maskRightOfPoint = (dimmInfo.memoryType == MEM_TYPE_SDRAM) ? 
+                                                                    0x00 : 0x03;
+                leftOfPoint = ((spdRawData[i] & maskLeftOfPoint) >> shift);
+                rightOfPoint = (spdRawData[i] & maskRightOfPoint)*25;
+                temp = ((leftOfPoint*100) + rightOfPoint);/* in 10ps Intervals*/
+                trp_clocks = (temp + (busClkPs-1)) /  busClkPs;    
+                mvOsOutput("Minimum Row Precharge Time [ns]: 		%d.%d = " 
+                           "in Clk cycles %d\n", 
+                           leftOfPoint, rightOfPoint, trp_clocks);
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 28: /* Minimum Row Active to Row Active Time */
+                shift = (dimmInfo.memoryType == MEM_TYPE_SDRAM)? 0:2;
+                maskLeftOfPoint  = (dimmInfo.memoryType == MEM_TYPE_SDRAM) ? 
+                                                                    0xff : 0xfc;
+                maskRightOfPoint = (dimmInfo.memoryType == MEM_TYPE_SDRAM) ? 
+                                                                    0x00 : 0x03;
+                leftOfPoint = ((spdRawData[i] & maskLeftOfPoint) >> shift);
+                rightOfPoint = (spdRawData[i] & maskRightOfPoint)*25;
+                temp = ((leftOfPoint*100) + rightOfPoint);/* in 100ns Interval*/
+                trrd_clocks = (temp + (busClkPs-1)) / busClkPs;
+                mvOsOutput("Minimum Row Active -To- Row Active Delay [ns]: " 
+                           "%d.%d = in Clk cycles %d\n",
+                            leftOfPoint, rightOfPoint, trp_clocks);
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 29: /* Minimum Ras-To-Cas Delay */
+                shift = (dimmInfo.memoryType == MEM_TYPE_SDRAM)? 0:2;
+                maskLeftOfPoint  = (dimmInfo.memoryType == MEM_TYPE_SDRAM) ? 
+                                                                    0xff : 0xfc;
+                maskRightOfPoint = (dimmInfo.memoryType == MEM_TYPE_SDRAM) ? 
+                                                                    0x00 : 0x03;
+                leftOfPoint = ((spdRawData[i] & maskLeftOfPoint) >> shift);
+                rightOfPoint = (spdRawData[i] & maskRightOfPoint)*25;  
+                temp = ((leftOfPoint*100) + rightOfPoint);/* in 100ns Interval*/
+                trcd_clocks = (temp + (busClkPs-1) )/ busClkPs;
+                mvOsOutput("Minimum Ras-To-Cas Delay [ns]: 			%d.%d = "
+                           "in Clk cycles %d\n", 
+                           leftOfPoint, rightOfPoint, trp_clocks);
+                break;
+/*----------------------------------------------------------------------------*/
+   
+            case 30: /* Minimum Ras Pulse Width */
+                tras_clocks = (cas2ps(spdRawData[i])+(busClkPs-1)) / busClkPs;
+                mvOsOutput("Minimum Ras Pulse Width [ns]: 			%d = "
+                           "in Clk cycles %d\n", spdRawData[i], tras_clocks);
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 31: /* Module Bank Density */
+                mvOsOutput("Module Bank Density (more than 1= Multisize-Module):");
+
+                if (dimmInfo.memoryType == MEM_TYPE_SDRAM)
+                {
+                    if (dimmInfo.dimmBankDensity & BIT0)
+                        mvOsOutput("1GB, ");
+                    if (dimmInfo.dimmBankDensity & BIT1)
+                        mvOsOutput("8MB, ");
+                    if (dimmInfo.dimmBankDensity & BIT2)
+                        mvOsOutput("16MB, ");
+                    if (dimmInfo.dimmBankDensity & BIT3)
+                        mvOsOutput("32MB, ");
+                    if (dimmInfo.dimmBankDensity & BIT4)
+                        mvOsOutput("64MB, ");
+                    if (dimmInfo.dimmBankDensity & BIT5)
+                        mvOsOutput("128MB, ");
+                    if (dimmInfo.dimmBankDensity & BIT6) 
+                        mvOsOutput("256MB, ");
+                    if (dimmInfo.dimmBankDensity & BIT7) 
+                        mvOsOutput("512MB, ");
+                }
+                else if (dimmInfo.memoryType == MEM_TYPE_DDR1)
+                {
+                    if (dimmInfo.dimmBankDensity & BIT0)
+                        mvOsOutput("1GB, ");
+                    if (dimmInfo.dimmBankDensity & BIT1)
+                        mvOsOutput("2GB, ");
+                    if (dimmInfo.dimmBankDensity & BIT2)
+                        mvOsOutput("16MB, ");
+                    if (dimmInfo.dimmBankDensity & BIT3)
+                        mvOsOutput("32MB, ");
+                    if (dimmInfo.dimmBankDensity & BIT4)
+                        mvOsOutput("64MB, ");
+                    if (dimmInfo.dimmBankDensity & BIT5)
+                        mvOsOutput("128MB, ");
+                    if (dimmInfo.dimmBankDensity & BIT6) 
+                        mvOsOutput("256MB, ");
+                    if (dimmInfo.dimmBankDensity & BIT7) 
+                        mvOsOutput("512MB, ");
+                }
+                else /* if (dimmInfo.memoryType == MEM_TYPE_DDR2) */
+                {
+                    if (dimmInfo.dimmBankDensity & BIT0)
+                        mvOsOutput("1GB, ");
+                    if (dimmInfo.dimmBankDensity & BIT1)
+                        mvOsOutput("2GB, ");
+                    if (dimmInfo.dimmBankDensity & BIT2)
+                        mvOsOutput("4GB, ");
+                    if (dimmInfo.dimmBankDensity & BIT3)
+                        mvOsOutput("8GB, ");
+                    if (dimmInfo.dimmBankDensity & BIT4)
+                        mvOsOutput("16GB, ");
+                    if (dimmInfo.dimmBankDensity & BIT5)
+                    mvOsOutput("128MB, ");
+                        if (dimmInfo.dimmBankDensity & BIT6) 
+                    mvOsOutput("256MB, ");
+                        if (dimmInfo.dimmBankDensity & BIT7) 
+                    mvOsOutput("512MB, ");
+                }
+                mvOsOutput("\n");
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 32: /* Address And Command Setup Time (measured in ns/1000) */
+                if (dimmInfo.memoryType == MEM_TYPE_SDRAM)
+                {
+                    rightOfPoint = (spdRawData[i] & 0x0f);
+                    leftOfPoint  = (spdRawData[i] & 0xf0) >> 4;
+                    if(leftOfPoint > 7)
+                    {
+                    leftOfPoint *= -1;
+                    }
+                }
+                else /* DDR1 or DDR2 */
+                {
+                    time_tmp = (((spdRawData[i] & 0xf0) >> 4)*10) + 
+                                                      ((spdRawData[i] & 0x0f));
+                    leftOfPoint = time_tmp / 100;
+                    rightOfPoint = time_tmp % 100; 
+                }
+                mvOsOutput("Address And Command Setup Time [ns]: 		%d.%d\n",
+                                                     leftOfPoint, rightOfPoint);
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 33: /* Address And Command Hold Time */
+                if (dimmInfo.memoryType == MEM_TYPE_SDRAM)
+                {
+                    rightOfPoint = (spdRawData[i] & 0x0f);
+                    leftOfPoint  = (spdRawData[i] & 0xf0) >> 4;
+                    if(leftOfPoint > 7)
+                    {
+                    leftOfPoint *= -1;
+                    }
+                }
+                else /* DDR1 or DDR2 */
+                {
+                    time_tmp = (((spdRawData[i] & 0xf0) >> 4)*10) + 
+                                                      ((spdRawData[i] & 0x0f));
+                    leftOfPoint = time_tmp / 100;
+                    rightOfPoint = time_tmp % 100;                 
+                }
+                mvOsOutput("Address And Command Hold Time [ns]: 		%d.%d\n",
+                                                   leftOfPoint, rightOfPoint);
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 34: /* Data Input Setup Time */
+                if (dimmInfo.memoryType == MEM_TYPE_SDRAM)
+                {
+                    rightOfPoint = (spdRawData[i] & 0x0f);
+                    leftOfPoint  = (spdRawData[i] & 0xf0) >> 4;
+                    if(leftOfPoint > 7)
+                    {
+                        leftOfPoint *= -1;
+                    }
+                }
+                else /* DDR1 or DDR2 */
+                {
+                    time_tmp = (((spdRawData[i] & 0xf0) >> 4)*10) + 
+                                                      ((spdRawData[i] & 0x0f));
+                    leftOfPoint = time_tmp / 100;
+                    rightOfPoint = time_tmp % 100;                 
+                }
+                mvOsOutput("Data Input Setup Time [ns]: 			%d.%d\n", 
+                                                    leftOfPoint, rightOfPoint);
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 35: /* Data Input Hold Time */
+                if (dimmInfo.memoryType == MEM_TYPE_SDRAM)
+                {
+                    rightOfPoint = (spdRawData[i] & 0x0f);
+                    leftOfPoint  = (spdRawData[i] & 0xf0) >> 4;
+                    if(leftOfPoint > 7)
+                    {
+                        leftOfPoint *= -1;
+                    }
+                }
+                else /* DDR1 or DDR2 */
+                {
+                    time_tmp = (((spdRawData[i] & 0xf0) >> 4)*10) + 
+                                                      ((spdRawData[i] & 0x0f));
+                    leftOfPoint = time_tmp / 100;
+                    rightOfPoint = time_tmp % 100;                 
+                }
+                mvOsOutput("Data Input Hold Time [ns]: 			%d.%d\n\n", 
+                                                    leftOfPoint, rightOfPoint);
+                break;
+/*----------------------------------------------------------------------------*/
+    
+            case 36: /* Relevant for DDR2 only: Write Recovery Time */
+                leftOfPoint = ((spdRawData[i] & maskLeftOfPoint) >> 2);
+                rightOfPoint = (spdRawData[i] & maskRightOfPoint) * 25;  
+                mvOsOutput("Write Recovery Time [ns]: 			%d.%d\n", 
+                                                    leftOfPoint, rightOfPoint);
+                break;
+/*----------------------------------------------------------------------------*/
+        }
+    
+}
+
+
+/*
+ * translate ns.ns/10 coding of SPD timing values
+ * into ps unit values
+ */
+/*******************************************************************************
+*  cas2ps - Translate x.y ns parameter to pico-seconds values
+*
+* DESCRIPTION:
+*       This function translates x.y nano seconds to its value in pico seconds.
+*       For example 3.75ns will return 3750.
+*
+* INPUT:
+*       spd_byte - DIMM SPD byte.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       value in pico seconds.
+*
+*******************************************************************************/
+static MV_U32  cas2ps(MV_U8 spd_byte)
+{
+    MV_U32 ns, ns10;
+    
+    /* isolate upper nibble */
+    ns = (spd_byte >> 4) & 0x0F;
+    /* isolate lower nibble */
+    ns10 = (spd_byte & 0x0F);
+    
+    if( ns10 < 10 ) {
+        ns10 *= 10;
+    }
+    else if( ns10 == 10 )
+        ns10 = 25;
+    else if( ns10 == 11 )
+        ns10 = 33;
+    else if( ns10 == 12 )
+        ns10 = 66;
+    else if( ns10 == 13 )
+        ns10 = 75;
+    else 
+    {
+        mvOsOutput("cas2ps Err. unsupported cycle time.\n");
+    }
+    
+    return (ns*1000 + ns10*10);
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddrmc/mvDramIfConfig.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddrmc/mvDramIfConfig.h
@@ -0,0 +1,95 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#ifndef __INCmvDramIfConfigh
+#define __INCmvDramIfConfigh
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* includes */
+
+/* defines  */
+
+/* registers defaults values */
+/* DDR2 ODT default register values */
+
+/* Presence	     Ctrl Low    Ctrl High  Dunit Ctrl   Ext Mode     */
+/*	CS0	         0x84210000  0x00000000  0x0000780F  0x00000440 */
+/*	CS0+CS1          0x84210000  0x00000000  0x0000780F  0x00000440 */
+/*	CS0+CS2	    	 0x030C030C  0x00000000  0x0000740F  0x00000404 */
+/*	CS0+CS1+CS2	 0x030C030C  0x00000000  0x0000740F  0x00000404 */
+/*	CS0+CS2+CS3	 0x030C030C  0x00000000  0x0000740F  0x00000404 */
+/*	CS0+CS1+CS2+CS3  0x030C030C  0x00000000  0x0000740F  0x00000404 */
+
+#define DDR_ODT_CTRL_LOW_CS0_DV		0x00000201
+#define DDR_ODT_CTRL_HIGH_CS0_DV	0x0200000A
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __INCmvDramIfh */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddrmc/mvDramIfConfig.S
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddrmc/mvDramIfConfig.S
@@ -0,0 +1,248 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+/*******************************************************************************
+* mvDramIfBasicAsm.s
+*
+* DESCRIPTION:
+*       Memory full detection and best timing configuration is done in
+*       C code. C runtime environment requires a stack. This module API
+*       initialize DRAM interface chip select 0 for basic functionality for
+*       the use of stack.
+*       The module API assumes DRAM information is stored in I2C EEPROM reside
+*       in a given I2C address MV_BOARD_DIMM0_I2C_ADDR. The I2C EEPROM
+*       internal data structure is assumed to be orgenzied in common DRAM
+*       vendor SPD structure.
+*       NOTE: DFCDL values are assumed to be already initialized prior to
+*       this module API activity.
+*
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+/* includes */
+#define MV_ASMLANGUAGE
+#include "mvOsAsm.h"
+#include "mvSysDdrConfig.h"
+#include "mvDramIfRegs.h"
+#include "mvDramIfConfig.h"
+#include "pci-if/pex/mvPexRegs.h"
+#include "pci-if/pci/mvPciRegs.h"
+#include "mvCtrlEnvSpec.h"
+#include "mvCtrlEnvAsm.h"
+#include "mvCommon.h"
+
+/* defines  */
+
+/* locals   */
+.data
+.globl _mvDramIfConfig
+
+.text
+
+/*******************************************************************************
+* _mvDramIfConfig - Basic DRAM interface initialization.
+*
+* DESCRIPTION:
+*       The function will initialize the following DRAM parameters using the
+*       values prepared by mvDramIfDetect routine. Values are located
+*       in predefined registers.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+
+_mvDramIfConfig:
+
+        /* Save register on stack */
+	cmp	sp, #0
+	beq	no_stack_s
+save_on_stack:
+        stmdb	sp!, {r1, r2, r3, r4, r7, r11}
+no_stack_s:
+
+	/* Write to SDRAM timing 1 register */
+        ldr     r1, =(DRAM_BUF_REG1)
+        ldr     r4, [r1]
+        ldr     r1, =(SDRAM_TIMING_1_REG)
+        str     r4, [r1]
+
+	/* Write to SDRAM timing 2 register */
+        ldr     r1, =(DRAM_BUF_REG2)
+        ldr     r4, [r1]
+        ldr     r1, =(SDRAM_TIMING_2_REG)
+        str     r4, [r1]
+
+	/* Write to SDRAM timing 3 register */
+        ldr     r1, =(DRAM_BUF_REG3)
+        ldr     r4, [r1]
+        ldr     r1, =(SDRAM_TIMING_3_REG)
+        str     r4, [r1]
+
+	/* Write to SDRAM timing 4 register */
+        ldr     r1, =(DRAM_BUF_REG4)
+        ldr     r4, [r1]
+        ldr     r1, =(SDRAM_TIMING_4_REG)
+        str     r4, [r1]
+
+	/* Write to SDRAM timing 5 register */
+        ldr     r1, =(DRAM_BUF_REG5)
+        ldr     r4, [r1]
+        ldr     r1, =(SDRAM_TIMING_5_REG)
+        str     r4, [r1]
+
+	/* Write to SDRAM timing 6 register */
+        ldr     r1, =(DRAM_BUF_REG6)
+        ldr     r4, [r1]
+        ldr     r1, =(SDRAM_TIMING_6_REG)
+        str     r4, [r1]
+
+        /* Write SDRAM bank 0 size register */
+        ldr     r1, =(DRAM_BUF_REG0)
+        ldr     r4, [r1]
+        ldr     r1, =(SDRAM_MEM_MAP_REG(0))
+        str     r4, [r1]
+
+        /* Write SDRAM ctrl 6 register */
+        ldr     r1, =(DRAM_BUF_REG7)
+        ldr     r4, [r1]
+        ldr     r1, =(SDRAM_CTRL_6_REG)
+        str     r4, [r1]
+
+        /* Write SDRAM ctrl 7 register */
+        ldr     r1, =(DRAM_BUF_REG8)
+        ldr     r4, [r1]
+        ldr     r1, =(SDRAM_CTRL_7_REG)
+        str     r4, [r1]
+
+        /* Write SDRAM config 0 register */
+        ldr     r1, =(DRAM_BUF_REG9)
+        ldr     r4, [r1]
+        ldr     r1, =(SDRAM_CFG_REG(0))
+        str     r4, [r1]
+
+        /* Write SDRAM config 1 register */
+        ldr     r1, =(DRAM_BUF_REG9)
+        ldr     r4, [r1]
+        ldr     r1, =(SDRAM_CFG_REG(1))
+        str     r4, [r1]
+
+        /* Write SDRAM ctrl 4 register */
+        ldr     r1, =(DRAM_BUF_REG10)
+        ldr     r4, [r1]
+        ldr     r1, =(SDRAM_CTRL_4_REG)
+        str     r4, [r1]
+
+        /* SDRAM init */
+        ldr     r1, = SDRAM_USRCMD_INIT;
+        ldr     r1, =(SDRAM_USR_CMD_REG)
+        str     r4, [r1]
+
+	/* Wait for init done */
+        ldr     r1, =(SDRAM_STATUS_REG)
+       
+        /* Make sure its back to normal operation */
+_sdramOpPoll1:        
+        ldr     r4, [r1]
+        cmp     r4, #SDRAM_STATUS_INIT_DONE
+        bne     _sdramOpPoll1
+
+        /* Write SDRAM mode register */
+        ldr     r1, = (SDRAM_USRCMD_MRS_INIT | SDRAM_USRCMD_CS0_MASK | SDRAM_USRCMD_CS1_MASK);
+        ldr     r1, =(SDRAM_USR_CMD_REG)
+        str     r4, [r1]
+
+        /* Write SDRAM extended mode register 1*/
+        ldr     r1, = (SDRAM_USRCMD_EMRS1_INIT | SDRAM_USRCMD_CS0_MASK | SDRAM_USRCMD_CS1_MASK);
+        ldr     r1, =(SDRAM_USR_CMD_REG)
+        str     r4, [r1]
+
+        /* Write SDRAM extended mode register 2*/
+        ldr     r1, = (SDRAM_USRCMD_EMRS2_INIT | SDRAM_USRCMD_CS0_MASK | SDRAM_USRCMD_CS1_MASK);
+        ldr     r1, =(SDRAM_USR_CMD_REG)
+        str     r4, [r1]
+
+        /* Write SDRAM extended mode register 3*/
+        ldr     r1, = (SDRAM_USRCMD_EMRS3_INIT | SDRAM_USRCMD_CS0_MASK | SDRAM_USRCMD_CS1_MASK);
+        ldr     r1, =(SDRAM_USR_CMD_REG)
+        str     r4, [r1]
+
+        /* Save register on stack */
+	cmp	sp, #0
+	beq	no_stack_l
+load_from_stack:
+        ldmia	sp!, {r1, r2, r3, r4, r7, r11}
+no_stack_l:
+
+        mov     pc, lr
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddrmc/mvDramIfRegs.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddrmc/mvDramIfRegs.h
@@ -0,0 +1,500 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCmvDramIfRegsh
+#define __INCmvDramIfRegsh
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "mvSysDdrConfig.h"
+
+/* DDR SDRAM Controller Address Decode Registers */
+/* SDRAM CSn Base Address and Size Register (MMAPx) */
+#define SDRAM_MEM_MAP_REG(csNum)	(MV_DDR_REGS_BASE + 0x100 + (csNum * 0x10))
+#define SDRAM_MMAP_BASE_OFFS		23 
+#define SDRAM_MMAP_BASE_MASK		(0x1ff << SDRAM_MMAP_BASE_OFFS)
+#define SDRAM_MMAP_BASE_ALIGNMENT	(MV_DDR_REGS_BASE + 0x00)
+
+#define SDRAM_MMAP_SIZE_OFFS		16
+#define DRAM_MMAP_SIZE_MASK		(0xf << SDRAM_MMAP_SIZE_OFFS)
+#define SDRAM_MMAP_WIN_EN		BIT0
+
+/* Control register 1 */
+#define SDRAM_CTRL_1_REG   		(MV_DDR_REGS_BASE + 0x80)
+#define SDRAM_CTRL1_APS_EN_OFFS		31
+#define SDRAM_CTRL1_APS_EN_MASK       	(1 << SDRAM_CTRL1_APS_EN_OFFS)
+#define SDRAM_CTRL1_APS_DIS       	(0 << SDRAM_CTRL1_APS_EN_OFFS)
+#define SDRAM_CTRL1_APS_EN       	(1 << SDRAM_CTRL1_APS_EN_OFFS)
+
+#define SDRAM_CTRL1_APS_TYP_OFFS	28
+#define SDRAM_CTRL1_APS_TYP_MASK       	(7 << SDRAM_CTRL1_APS_TYP_OFFS)
+#define SDRAM_CTRL1_APS_TYP_PRE       	(2 << SDRAM_CTRL1_APS_TYP_OFFS)
+#define SDRAM_CTRL1_APS_TYP_ACT       	(1 << SDRAM_CTRL1_APS_TYP_OFFS)
+
+#define SDRAM_CTRL1_APS_VAL_OFFS	16
+#define SDRAM_CTRL1_APS_VAL_MASK       	(0xFFF << SDRAM_CTRL1_APS_VAL_OFFS)
+/* LP-DDR1 only */
+#define SDRAM_CTRL1_ACS_VAL_OFFS	12
+#define SDRAM_CTRL1_ACS_VAL_MASK       	(0x7 << SDRAM_CTRL1_ACS_VAL_OFFS)
+/* LP-DDR1 only */
+#define SDRAM_CTRL1_ACS_EN_OFFS		7
+#define SDRAM_CTRL1_ACS_EN_MASK       	(1 << SDRAM_CTRL1_ACS_EN_OFFS)
+#define SDRAM_CTRL1_ACS_DIS       	(0 << SDRAM_CTRL1_ACS_EN_OFFS)
+#define SDRAM_CTRL1_ACS_EN       	(1 << SDRAM_CTRL1_ACS_EN_OFFS)
+
+#define SDRAM_CTRL1_DLL_REST_OFFS	6
+#define SDRAM_CTRL1_DLL_REST_MASK       (1 << SDRAM_CTRL1_DLL_REST_OFFS)
+#define SDRAM_CTRL1_DLL_REST_DIS       	(0 << SDRAM_CTRL1_DLL_REST_OFFS)
+#define SDRAM_CTRL1_DLL_REST_EN       	(1 << SDRAM_CTRL1_DLL_REST_OFFS)
+
+#define SDRAM_CTRL1_OUT_EN_OFFS	3
+#define SDRAM_CTRL1_OUT_EN_MASK       	(1 << SDRAM_CTRL1_OUT_EN_OFFS)
+#define SDRAM_CTRL1_OUT_DIS       	(1 << SDRAM_CTRL1_OUT_EN_OFFS)
+#define SDRAM_CTRL1_OUT_EN       	(0 << SDRAM_CTRL1_OUT_EN_OFFS)
+
+/* Control register 2 */
+#define SDRAM_CTRL_2_REG   		(MV_DDR_REGS_BASE + 0x90)
+#define SDRAM_CTRL2_REF_POST_EN_OFFS	27
+#define SDRAM_CTRL2_REF_POST_EN_MASK	(1 << SDRAM_CTRL2_REF_POST_EN_OFFS)
+#define SDRAM_CTRL2_REF_POST_DIS       	(0 << SDRAM_CTRL2_REF_POST_EN_OFFS)
+#define SDRAM_CTRL2_REF_POST_EN      	(1 << SDRAM_CTRL2_REF_POST_EN_OFFS)
+
+#define SDRAM_CTRL2_REF_POST_MAX_OFFS	24
+#define SDRAM_CTRL2_REF_POST_MAX_MASK	(7 << SDRAM_CTRL2_REF_POST_MAX_OFFS)
+
+#define SDRAM_CTRL2_LINE_BOUNDRAY_OFFS	16
+#define SDRAM_CTRL2_LINE_BOUNDRAY_MASK	(0x3F << SDRAM_CTRL2_LINE_BOUNDRAY_OFFS)
+
+#define SDRAM_CTRL2_PD_MODE_OFFS	8
+#define SDRAM_CTRL2_PD_MODE_MASK	(1 << SDRAM_CTRL2_PD_MODE_OFFS)
+#define SDRAM_CTRL2_DDR2_FAST_EXIT     	(0 << SDRAM_CTRL2_PD_MODE_OFFS)
+#define SDRAM_CTRL2_DDR2_SLOW_EXIT     	(1 << SDRAM_CTRL2_PD_MODE_OFFS)
+#define SDRAM_CTRL2_DDR3_FAST_EXIT     	(1 << SDRAM_CTRL2_PD_MODE_OFFS)
+#define SDRAM_CTRL2_DDR3_SLOW_EXIT     	(0 << SDRAM_CTRL2_PD_MODE_OFFS)
+
+#define SDRAM_CTRL2_RDIMM_OFFS		5
+#define SDRAM_CTRL2_RDIMM_MASK		(1 << SDRAM_CTRL2_RDIMM_OFFS)
+#define SDRAM_CTRL2_RDIMM_DIS     	(0 << SDRAM_CTRL2_RDIMM_OFFS)
+#define SDRAM_CTRL2_RDIMM_EN     	(1 << SDRAM_CTRL2_RDIMM_OFFS)
+
+#define SDRAM_CTRL2_AUTO_PRE_OFFS	4
+#define SDRAM_CTRL2_AUTO_PRE_MASK	(1 << SDRAM_CTRL2_AUTO_PRE_OFFS)
+#define SDRAM_CTRL2_AUTO_PRE_DIS     	(0 << SDRAM_CTRL2_AUTO_PRE_OFFS)
+#define SDRAM_CTRL2_AUTO_PRE_EN     	(1 << SDRAM_CTRL2_AUTO_PRE_OFFS)
+
+#define SDRAM_CTRL2_TESST_MODE_OFFS	0
+#define SDRAM_CTRL2_TESST_MODE_MASK	(1 << SDRAM_CTRL2_TESST_MODE_OFFS)
+#define SDRAM_CTRL2_TESST_MODE_DIS     	(0 << SDRAM_CTRL2_TESST_MODE_OFFS)
+#define SDRAM_CTRL2_TESST_MODE_EN     	(1 << SDRAM_CTRL2_TESST_MODE_OFFS)
+
+/* Control register 3 */
+#define SDRAM_CTRL_3_REG   		(MV_DDR_REGS_BASE + 0xF0)
+#define SDRAM_CTRL3_FLOP_REQ_EN_OFFS	30
+#define SDRAM_CTRL3_FLOP_REQ_EN_MASK	(1 << SDRAM_CTRL3_FLOP_REQ_EN_OFFS)
+#define SDRAM_CTRL3_FLOP_REQ_DIS       	(0 << SDRAM_CTRL3_FLOP_REQ_EN_OFFS)
+#define SDRAM_CTRL3_FLOP_REQ_EN      	(1 << SDRAM_CTRL3_FLOP_REQ_EN_OFFS)
+
+#define SDRAM_CTRL3_SB_ERWR_VAL_OFFS	9
+#define SDRAM_CTRL3_SB_ERWR_VAL_MASK	(7 << SDRAM_CTRL3_SB_ERWR_VAL_OFFS)
+
+#define SDRAM_CTRL3_CPU_ERWR_VAL_OFFS	6
+#define SDRAM_CTRL3_CPU_ERWR_VAL_MASK	(7 << SDRAM_CTRL3_CPU_ERWR_VAL_OFFS)
+
+#define SDRAM_CTRL3_SB_ERWR_USR_OFFS	5
+#define SDRAM_CTRL3_SB_ERWR_USR_MASK	(1 << SDRAM_CTRL3_SB_ERWR_USR_OFFS)
+#define SDRAM_CTRL3_SB_ERWR_USR_DEF    	(0 << SDRAM_CTRL3_SB_ERWR_USR_OFFS)
+#define SDRAM_CTRL3_SB_ERWR_USR_VAL    	(1 << SDRAM_CTRL3_SB_ERWR_USR_OFFS)
+
+#define SDRAM_CTRL3_CPU_ERWR_USR_OFFS	4
+#define SDRAM_CTRL3_CPU_ERWR_USR_MASK	(1 << SDRAM_CTRL3_CPU_ERWR_USR_OFFS)
+#define SDRAM_CTRL3_CPU_ERWR_USR_DEF    (0 << SDRAM_CTRL3_CPU_ERWR_USR_OFFS)
+#define SDRAM_CTRL3_CPU_ERWR_USR_VAL    (1 << SDRAM_CTRL3_CPU_ERWR_USR_OFFS)
+
+#define SDRAM_CTRL3_SB_ERWR_EN_OFFS	3
+#define SDRAM_CTRL3_SB_ERWR_EN_MASK	(1 << SDRAM_CTRL3_SB_ERWR_EN_OFFS)
+#define SDRAM_CTRL3_SB_ERWR_EN    	(1 << SDRAM_CTRL3_SB_ERWR_EN_OFFS)
+#define SDRAM_CTRL3_SB_ERWR_DIS    	(0 << SDRAM_CTRL3_SB_ERWR_EN_OFFS)
+
+#define SDRAM_CTRL3_CPU_ERWR_EN_OFFS	2
+#define SDRAM_CTRL3_CPU_ERWR_EN_MASK	(1 << SDRAM_CTRL3_CPU_ERWR_EN_OFFS)
+#define SDRAM_CTRL3_CPU_ERWR_EN    	(1 << SDRAM_CTRL3_CPU_ERWR_EN_OFFS)
+#define SDRAM_CTRL3_CPU_ERWR_DIS    	(0 << SDRAM_CTRL3_CPU_ERWR_EN_OFFS)
+
+#define SDRAM_CTRL3_SB_FSWR_EN_OFFS	1
+#define SDRAM_CTRL3_SB_FSWR_EN_MASK	(1 << SDRAM_CTRL3_SB_FSWR_EN_OFFS)
+#define SDRAM_CTRL3_SB_FSWR_EN    	(1 << SDRAM_CTRL3_SB_FSWR_EN_OFFS)
+#define SDRAM_CTRL3_SB_FSWR_DIS    	(0 << SDRAM_CTRL3_SB_FSWR_EN_OFFS)
+
+#define SDRAM_CTRL3_CPU_FSWR_EN_OFFS	0
+#define SDRAM_CTRL3_CPU_FSWR_EN_MASK	(1 << SDRAM_CTRL3_CPU_FSWR_EN_OFFS)
+#define SDRAM_CTRL3_CPU_FSWR_EN    	(1 << SDRAM_CTRL3_CPU_FSWR_EN_OFFS)
+#define SDRAM_CTRL3_CPU_FSWR_DIS    	(0 << SDRAM_CTRL3_CPU_FSWR_EN_OFFS)
+
+/* Control register 4 */
+#define SDRAM_CTRL_4_REG   		(MV_DDR_REGS_BASE + 0x1A0)
+#define SDRAM_CTRL4_DWIDTH_OFFS       	0
+#define SDRAM_CTRL4_DWIDTH_MASK       	(3 << SDRAM_CTRL4_DWIDTH_OFFS)
+#define SDRAM_CTRL4_DWIDTH_16BIT      	(0 << SDRAM_CTRL4_DWIDTH_OFFS)
+#define SDRAM_CTRL4_DWIDTH_32BIT      	(1 << SDRAM_CTRL4_DWIDTH_OFFS)
+
+#define SDRAM_CTRL4_DTYPE_OFFS		2
+#define SDRAM_CTRL4_DTYPE_MASK       	(7 << SDRAM_CTRL4_DTYPE_OFFS)
+#define SDRAM_CTRL4_DTYPE_DDR2      	(1 << SDRAM_CTRL4_DTYPE_OFFS)
+#define SDRAM_CTRL4_DTYPE_DDR3      	(2 << SDRAM_CTRL4_DTYPE_OFFS)
+#define SDRAM_CTRL4_DTYPE_LPDDR1      	(4 << SDRAM_CTRL4_DTYPE_OFFS)
+/* Only for DDR3 */
+#define SDRAM_CTRL4_CWL_OFFS		10
+#define SDRAM_CTRL4_CWL_MASK       	(7 << SDRAM_CTRL4_CWL_OFFS)
+
+#define SDRAM_CTRL4_CL_OFFS		14
+#define SDRAM_CTRL4_CL_MASK       	(0x7 << SDRAM_CTRL4_CL_OFFS)
+#define SDRAM_DDR2_CL_3      		(0x3 << SDRAM_CTRL4_CL_OFFS)
+#define SDRAM_DDR2_CL_4      		(0x4 << SDRAM_CTRL4_CL_OFFS)
+#define SDRAM_DDR2_CL_5    		(0x5 << SDRAM_CTRL4_CL_OFFS)
+#define SDRAM_DDR2_CL_6    		(0x6 << SDRAM_CTRL4_CL_OFFS)
+#define SDRAM_DDR3_CL_5      		(0x1 << SDRAM_CTRL4_CL_OFFS)
+#define SDRAM_DDR3_CL_6      		(0x2 << SDRAM_CTRL4_CL_OFFS)
+#define SDRAM_DDR3_CL_7    		(0x3 << SDRAM_CTRL4_CL_OFFS)
+#define SDRAM_DDR3_CL_8    		(0x4 << SDRAM_CTRL4_CL_OFFS)
+#define SDRAM_DDR3_CL_9    		(0x5 << SDRAM_CTRL4_CL_OFFS)
+#define SDRAM_DDR3_CL_10    		(0x6 << SDRAM_CTRL4_CL_OFFS)
+#define SDRAM_DDR3_CL_11    		(0x7 << SDRAM_CTRL4_CL_OFFS)
+
+#define SDRAM_CTRL4_BL_OFFS		22
+#define SDRAM_CTRL4_BL_MASK       	(7 << SDRAM_CTRL4_BL_OFFS)
+#define SDRAM_CTRL4_BL_2       		(1 << SDRAM_CTRL4_BL_OFFS)
+#define SDRAM_CTRL4_BL_4       		(2 << SDRAM_CTRL4_BL_OFFS)
+#define SDRAM_CTRL4_BL_8       		(3 << SDRAM_CTRL4_BL_OFFS)
+
+#define SDRAM_CTRL4_DQSD_OFFS		30
+#define SDRAM_CTRL4_DQSD_MASK       	(1 << SDRAM_CTRL4_DQSD_OFFS)
+#define SDRAM_CTRL4_DQSD_DIS       	(1 << SDRAM_CTRL4_DQSD_OFFS)
+#define SDRAM_CTRL4_DQSD_EN       	(0 << SDRAM_CTRL4_DQSD_OFFS)
+
+#define SDRAM_CTRL4_DLL_OFFS		31
+#define SDRAM_CTRL4_DLL_MASK       	(1 << SDRAM_CTRL4_DLL_OFFS)
+#define SDRAM_CTRL4_DLL_DIS       	(1 << SDRAM_CTRL4_DLL_OFFS)
+#define SDRAM_CTRL4_DLL_EN       	(0 << SDRAM_CTRL4_DLL_OFFS)
+
+/* Control register 6 */
+#define SDRAM_CTRL_6_REG   		(MV_DDR_REGS_BASE + 0x760)
+#define SDRAM_CTRL6_ODT1_REN_OFFS       12
+#define SDRAM_CTRL6_ODT1_REN_MASK       (0xF << SDRAM_CTRL6_ODT1_REN_OFFS)
+
+#define SDRAM_CTRL6_ODT1_WEN_OFFS       8
+#define SDRAM_CTRL6_ODT1_WEN_MASK       (0xF << SDRAM_CTRL6_ODT1_WEN_OFFS)
+
+#define SDRAM_CTRL6_ODT0_REN_OFFS       4
+#define SDRAM_CTRL6_ODT0_REN_MASK       (0xF << SDRAM_CTRL6_ODT0_REN_OFFS)
+
+#define SDRAM_CTRL6_ODT0_WEN_OFFS       0
+#define SDRAM_CTRL6_ODT0_WEN_MASK       (0xF << SDRAM_CTRL6_ODT0_WEN_OFFS)
+
+/* Control register 7 */
+#define SDRAM_CTRL_7_REG   			(MV_DDR_REGS_BASE + 0x770)
+#define SDRAM_CTRL7_PAD_TERM_SWMOD_OFFS       	24
+#define SDRAM_CTRL7_PAD_TERM_SWMOD_MASK       	(0x3 << SDRAM_CTRL7_PAD_TERM_SWMOD_OFFS)
+#define SDRAM_CTRL7_PAD_TERM_SWMOD_DIS		(0x0 << SDRAM_CTRL7_PAD_TERM_SWMOD_OFFS)
+#define SDRAM_CTRL7_PAD_TERM_SWMOD_EN		(0x2 << SDRAM_CTRL7_PAD_TERM_SWMOD_OFFS)
+
+#define SDRAM_CTRL7_ODT1_SWMOD_OFFS       	2
+#define SDRAM_CTRL7_ODT1_SWMOD_MASK       	(0x3 << SDRAM_CTRL7_ODT1_SWMOD_OFFS)
+#define SDRAM_CTRL7_ODT1_SWMOD_DIS		(0x0 << SDRAM_CTRL7_ODT1_SWMOD_OFFS)
+#define SDRAM_CTRL7_ODT1_SWMOD_ANY		(0x1 << SDRAM_CTRL7_ODT1_SWMOD_OFFS)
+#define SDRAM_CTRL7_ODT1_SWMOD_WREN		(0x2 << SDRAM_CTRL7_ODT1_SWMOD_OFFS)
+
+#define SDRAM_CTRL7_ODT0_SWMOD_OFFS       	0
+#define SDRAM_CTRL7_ODT0_SWMOD_MASK       	(0x3 << SDRAM_CTRL7_ODT0_SWMOD_OFFS)
+#define SDRAM_CTRL7_ODT0_SWMOD_DIS		(0x0 << SDRAM_CTRL7_ODT0_SWMOD_OFFS)
+#define SDRAM_CTRL7_ODT0_SWMOD_ANY		(0x1 << SDRAM_CTRL7_ODT0_SWMOD_OFFS)
+#define SDRAM_CTRL7_ODT0_SWMOD_WREN		(0x2 << SDRAM_CTRL7_ODT0_SWMOD_OFFS)
+
+/* Timing register 1 */
+#define SDRAM_TIMING_1_REG   		(MV_DDR_REGS_BASE + 0x50)
+#define SDRAM_TIMING1_TCCD_OFFS		29
+#define SDRAM_TIMING1_TCCD_MASK       	(7 << SDRAM_TIMING1_TCCD_OFFS)
+
+#define SDRAM_TIMING1_TRTP_OFFS		26
+#define SDRAM_TIMING1_TRTP_MASK       	(7 << SDRAM_TIMING1_TRTP_OFFS)
+
+#define SDRAM_TIMING1_TWTR_OFFS		22
+#define SDRAM_TIMING1_TWTR_MASK       	(0xF << SDRAM_TIMING1_TWTR_OFFS)
+
+#define SDRAM_TIMING1_TRC_OFFS		16
+#define SDRAM_TIMING1_TRC_MASK       	(0x3F << SDRAM_TIMING1_TRC_OFFS)
+
+#define SDRAM_TIMING1_TREFI_OFFS	0
+#define SDRAM_TIMING1_TREFI_MASK       	(0xFFFF << SDRAM_TIMING1_TREFI_OFFS)
+
+/* Timing register 2 */
+#define SDRAM_TIMING_2_REG   		(MV_DDR_REGS_BASE + 0x60)
+#define SDRAM_TIMING2_TRP_OFFS		28
+#define SDRAM_TIMING2_TRP_MASK       	(0xF << SDRAM_TIMING2_TRP_OFFS)
+
+#define SDRAM_TIMING2_TRRD_OFFS		24
+#define SDRAM_TIMING2_TRRD_MASK       	(0xF << SDRAM_TIMING2_TRRD_OFFS)
+
+#define SDRAM_TIMING2_TRCD_OFFS		20
+#define SDRAM_TIMING2_TRCD_MASK       	(0xF << SDRAM_TIMING2_TRCD_OFFS)
+
+#define SDRAM_TIMING2_TWR_OFFS		16
+#define SDRAM_TIMING2_TWR_MASK       	(0xF << SDRAM_TIMING2_TWR_OFFS)
+
+#define SDRAM_TIMING2_TRFC_OFFS	4
+#define SDRAM_TIMING2_TRFC_MASK       	(0x1FF << SDRAM_TIMING2_TRFC_OFFS)
+
+#define SDRAM_TIMING2_TMRD_OFFS	0
+#define SDRAM_TIMING2_TMRD_MASK       	(0x7 << SDRAM_TIMING2_TMRD_OFFS)
+
+/* Timing register 3 */
+#define SDRAM_TIMING_3_REG   		(MV_DDR_REGS_BASE + 0x190)
+#define SDRAM_TIMING3_TMOD_OFFS		28
+#define SDRAM_TIMING3_TMOD_MASK       	(0xF << SDRAM_TIMING3_TMOD_OFFS)
+
+#define SDRAM_TIMING3_TXSRD_OFFS	16
+#define SDRAM_TIMING3_TXSRD_MASK       	(0x3FF << SDRAM_TIMING3_TXSRD_OFFS)
+
+#define SDRAM_TIMING3_TXSNR_EXT_OFFS	26
+#define SDRAM_TIMING3_TXSNR_EXT_MASK    (0x1 << SDRAM_TIMING3_TXSNR_EXT_OFFS)
+#define SDRAM_TIMING3_TXSNR_OFFS	8
+#define SDRAM_TIMING3_TXSNR_MASK       	(0xFF << SDRAM_TIMING3_TXSNR_OFFS)
+
+#define SDRAM_TIMING3_TXARDS_OFFS	5
+#define SDRAM_TIMING3_TXARDS_MASK       (0x7 << SDRAM_TIMING3_TXARDS_OFFS)
+
+#define SDRAM_TIMING3_TXP_OFFS		0
+#define SDRAM_TIMING3_TXP_MASK       	(0x7 << SDRAM_TIMING3_TXP_OFFS)
+
+/* Timing register 4 */
+#define SDRAM_TIMING_4_REG   		(MV_DDR_REGS_BASE + 0x1C0)
+#define SDRAM_TIMING4_TCKE_OFFS		28
+#define SDRAM_TIMING4_TCKE_MASK       	(0x7 << SDRAM_TIMING4_TCKE_OFFS)
+
+#define SDRAM_TIMING4_INIT_COUNT_OFFS	20
+#define SDRAM_TIMING4_INIT_COUNT_MASK	(0xFF << SDRAM_TIMING4_INIT_COUNT_OFFS)
+
+#define SDRAM_TIMING4_TRWD_EXT_OFFS	17
+#define SDRAM_TIMING4_TRWD_EXT_MASK    (0x7 << SDRAM_TIMING4_TRWD_EXT_OFFS)
+
+#define SDRAM_TIMING4_REST_COUNT_OFFS	10
+#define SDRAM_TIMING4_REST_COUNT_MASK	(0x3F << SDRAM_TIMING4_REST_COUNT_OFFS)
+
+#define SDRAM_TIMING4_INIT_COUNT_NOP_OFFS		0
+#define SDRAM_TIMING4_INIT_COUNT_NOP_MASK       	(0x3FF << SDRAM_TIMING4_INIT_COUNT_NOP_OFFS)
+
+/* Timing register 5 */
+#define SDRAM_TIMING_5_REG   		(MV_DDR_REGS_BASE + 0x650)
+#define SDRAM_TIMING5_TRAS_OFFS		16
+#define SDRAM_TIMING5_TRAS_MASK       	(0x3F << SDRAM_TIMING5_TRAS_OFFS)
+
+#define SDRAM_TIMING5_TFAW_OFFS		4
+#define SDRAM_TIMING5_TFAW_MASK		(0x3F << SDRAM_TIMING5_TFAW_OFFS)
+
+#define SDRAM_TIMING5_TCCD_CCS_EXT_OFFS	0
+#define SDRAM_TIMING5_TCCD_CCS_EXT_MASK    (0x7 << SDRAM_TIMING5_TCCD_CCS_EXT_OFFS)
+
+/* Timing register 6 */
+#define SDRAM_TIMING_6_REG   		(MV_DDR_REGS_BASE + 0x660)
+#define SDRAM_TIMING6_TZQCS_OFFS	20
+#define SDRAM_TIMING6_TZQCS_MASK       	(0x1FF << SDRAM_TIMING6_TZQCS_OFFS)
+
+#define SDRAM_TIMING6_TZQOPER_OFFS	10
+#define SDRAM_TIMING6_TZQOPER_MASK	(0x1FF << SDRAM_TIMING6_TZQOPER_OFFS)
+
+#define SDRAM_TIMING5_TZQINIT_OFFS	0
+#define SDRAM_TIMING5_TZQINIT_MASK	(0x3FF << SDRAM_TIMING5_TZQINIT_OFFS)
+
+/* User command register */
+#define SDRAM_USR_CMD_REG   		(MV_DDR_REGS_BASE + 0x120)
+
+/* LP-DDR1 only */
+#define SDRAM_USRCMD_DPD_REQ_OFFS	28
+#define SDRAM_USRCMD_DPD_REQ_MASK       (0x3 << SDRAM_USRCMD_DPD_REQ_OFFS)
+#define SDRAM_USRCMD_DPD_REQ_INIT       (0x1 << SDRAM_USRCMD_DPD_REQ_OFFS)
+#define SDRAM_USRCMD_DPD_REQ_EXIT       (0x2 << SDRAM_USRCMD_DPD_REQ_OFFS)
+
+#define SDRAM_USRCMD_CS1_OFFS		25
+#define SDRAM_USRCMD_CS1_MASK       	(0x1 << SDRAM_USRCMD_CS1_OFFS)
+
+#define SDRAM_USRCMD_CS0_OFFS		24
+#define SDRAM_USRCMD_CS0_MASK       	(0x1 << SDRAM_USRCMD_CS0_OFFS)
+/* DDR3 only */
+#define SDRAM_USRCMD_ZQ_SHORT_OFFS	13
+#define SDRAM_USRCMD_ZQ_SHORT_MASK      (0x1 << SDRAM_USRCMD_ZQ_SHORT_OFFS)
+#define SDRAM_USRCMD_ZQ_SHORT_INIT      (0x1 << SDRAM_USRCMD_ZQ_SHORT_OFFS)
+/* DDR3 only */
+#define SDRAM_USRCMD_ZQ_LONG_OFFS	12
+#define SDRAM_USRCMD_ZQ_LONG_MASK	(0x1 << SDRAM_USRCMD_ZQ_LONG_OFFS)
+#define SDRAM_USRCMD_ZQ_LONG_INIT      	(0x1 << SDRAM_USRCMD_ZQ_LONG_OFFS)
+
+#define SDRAM_USRCMD_EMRS3_OFFS		11
+#define SDRAM_USRCMD_EMRS3_MASK		(0x1 << SDRAM_USRCMD_EMRS3_OFFS)
+#define SDRAM_USRCMD_EMRS3_INIT      	(0x1 << SDRAM_USRCMD_EMRS3_OFFS)
+
+#define SDRAM_USRCMD_EMRS2_OFFS		10
+#define SDRAM_USRCMD_EMRS2_MASK		(0x1 << SDRAM_USRCMD_EMRS2_OFFS)
+#define SDRAM_USRCMD_EMRS2_INIT      	(0x1 << SDRAM_USRCMD_EMRS2_OFFS)
+
+#define SDRAM_USRCMD_EMRS1_OFFS		9
+#define SDRAM_USRCMD_EMRS1_MASK		(0x1 << SDRAM_USRCMD_EMRS1_OFFS)
+#define SDRAM_USRCMD_EMRS1_INIT      	(0x1 << SDRAM_USRCMD_EMRS1_OFFS)
+
+#define SDRAM_USRCMD_MRS_OFFS		8
+#define SDRAM_USRCMD_MRS_MASK		(0x1 << SDRAM_USRCMD_MRS_OFFS)
+#define SDRAM_USRCMD_MRS_INIT      	(0x1 << SDRAM_USRCMD_MRS_OFFS)
+
+#define SDRAM_USRCMD_SR_OFFS		6
+#define SDRAM_USRCMD_SR_MASK		(0x1 << SDRAM_USRCMD_SR_REQ_OFFS)
+#define SDRAM_USRCMD_SR_INIT      	(0x1 << SDRAM_USRCMD_SR_REQ_OFFS)
+#define SDRAM_USRCMD_SR_EXIT      	(0x2 << SDRAM_USRCMD_SR_REQ_OFFS)
+
+#define SDRAM_USRCMD_PRE_PS_OFFS	5
+#define SDRAM_USRCMD_PRE_PS_MASK	(0x1 << SDRAM_USRCMD_PRE_PS_OFFS)
+#define SDRAM_USRCMD_PRE_PS_INIT      	(0x1 << SDRAM_USRCMD_PRE_PS_OFFS)
+
+#define SDRAM_USRCMD_ACT_PS_OFFS	4
+#define SDRAM_USRCMD_ACT_PS_MASK	(0x1 << SDRAM_USRCMD_ACT_PS_OFFS)
+#define SDRAM_USRCMD_ACT_PS_INIT      	(0x1 << SDRAM_USRCMD_ACT_PS_OFFS)
+
+#define SDRAM_USRCMD_INIT_OFFS		0
+#define SDRAM_USRCMD_INIT_MASK		(0x1 << SDRAM_USRCMD_INIT_OFFS)
+#define SDRAM_USRCMD_INIT      		(0x1 << SDRAM_USRCMD_INIT_OFFS)
+
+/* User status register */
+#define SDRAM_STATUS_REG   		(MV_DDR_REGS_BASE + 0x1B0)
+#define SDRAM_STATUS_INIT_DONE_OFFS	0
+#define SDRAM_STATUS_INIT_DONE_MASK	(0x1 << SDRAM_STATUS_INIT_DONE_OFFS)
+#define SDRAM_STATUS_INIT_DONE 		(0x1 << SDRAM_STATUS_INIT_DONE_OFFS)
+
+/* configuration register 0,1,... */
+#define SDRAM_CFG_REG(csNum)   		(MV_DDR_REGS_BASE + 0x20 + (csNum * 0x10))
+/* LP-DDR1 only */
+#define SDRAM_CFG_PASR_OFFS		28
+#define SDRAM_CFG_PASR_MASK       	(7 << SDRAM_CFG_PASR_OFFS)
+
+#define SDRAM_CFG_RTT_OFFS		17
+#define SDRAM_CFG_RTT_MASK       	(7 << SDRAM_CFG_RTT_OFFS)
+#define SDRAM_CFG_DDR3_RTT_120       	(2 << SDRAM_CFG_RTT_OFFS)
+#define SDRAM_CFG_DDR2_RTT_150       	(2 << SDRAM_CFG_RTT_OFFS)
+
+#define SDRAM_CFG_ODS_OFFS		14
+#define SDRAM_CFG_ODS_MASK       	(3 << SDRAM_CFG_ODS_OFFS)
+
+#define SDRAM_CFG_BANK_NUM_OFFS		12
+#define SDRAM_CFG_BANK_NUM_MASK       	(3 << SDRAM_CFG_BANK_NUM_OFFS)
+#define SDRAM_CFG_2_BANK_NUM       	(0 << SDRAM_CFG_BANK_NUM_OFFS)
+#define SDRAM_CFG_4_BANK_NUM       	(1 << SDRAM_CFG_BANK_NUM_OFFS)
+#define SDRAM_CFG_8_BANK_NUM       	(2 << SDRAM_CFG_BANK_NUM_OFFS)
+
+#define SDRAM_CFG_ROW_NUM_OFFS		8
+#define SDRAM_CFG_ROW_NUM_MASK       	(0xF << SDRAM_CFG_ROW_NUM_OFFS)
+#define SDRAM_CFG_11_ROW_NUM       	(1 << SDRAM_CFG_ROW_NUM_OFFS)
+#define SDRAM_CFG_12_ROW_NUM       	(2 << SDRAM_CFG_ROW_NUM_OFFS)
+#define SDRAM_CFG_13_ROW_NUM       	(3 << SDRAM_CFG_ROW_NUM_OFFS)
+#define SDRAM_CFG_14_ROW_NUM       	(4 << SDRAM_CFG_ROW_NUM_OFFS)
+#define SDRAM_CFG_15_ROW_NUM       	(5 << SDRAM_CFG_ROW_NUM_OFFS)
+#define SDRAM_CFG_16_ROW_NUM       	(6 << SDRAM_CFG_ROW_NUM_OFFS)
+
+#define SDRAM_CFG_COL_NUM_OFFS		4
+#define SDRAM_CFG_COL_NUM_MASK       	(0xF << SDRAM_CFG_COL_NUM_OFFS)
+#define SDRAM_CFG_8_COL_NUM       	(1 << SDRAM_CFG_COL_NUM_OFFS)
+#define SDRAM_CFG_9_COL_NUM       	(2 << SDRAM_CFG_COL_NUM_OFFS)
+#define SDRAM_CFG_10_COL_NUM       	(3 << SDRAM_CFG_COL_NUM_OFFS)
+#define SDRAM_CFG_11_COL_NUM       	(4 << SDRAM_CFG_COL_NUM_OFFS)
+#define SDRAM_CFG_12_COL_NUM       	(5 << SDRAM_CFG_COL_NUM_OFFS)
+
+/* configuration register decode address */
+#define SDRAM_CFG_DEC_ADDR_REG 		(MV_DDR_REGS_BASE + 0x10)
+#define SDRAM_CFG_DEC_ADDR_OFFS		16
+#define SDRAM_CFG_DEC_ADDR_MASK       	(0xffff << SDRAM_CFG_DEC_ADDR_OFFS)
+
+/* Phy control Register Write-Level Select */
+#define SDRAM_PHY_CTRL_WLS_REG		(MV_DDR_REGS_BASE + 0xE40)
+#define SDRAM_PHY_CTRL_WLS_BS_OFFS	0
+#define SDRAM_PHY_CTRL_WLS_BS_MASK	(0xF << SDRAM_PHY_CTRL_WLS_BS_OFFS)
+#define SDRAM_PHY_CTRL_WLS_BS_L0	(0x0 << SDRAM_PHY_CTRL_WLS_BS_OFFS)
+#define SDRAM_PHY_CTRL_WLS_BS_L1	(0x1 << SDRAM_PHY_CTRL_WLS_BS_OFFS)
+#define SDRAM_PHY_CTRL_WLS_BS_L2	(0x2 << SDRAM_PHY_CTRL_WLS_BS_OFFS)
+#define SDRAM_PHY_CTRL_WLS_BS_L3	(0x3 << SDRAM_PHY_CTRL_WLS_BS_OFFS)
+#define SDRAM_PHY_CTRL_WLS_CS_OFFS	8
+#define SDRAM_PHY_CTRL_WLS_CS_MASK	(0xF << SDRAM_PHY_CTRL_WLS_CS_OFFS)
+#define SDRAM_PHY_CTRL_WLS_CS_0		(0x1 << SDRAM_PHY_CTRL_WLS_CS_OFFS)
+#define SDRAM_PHY_CTRL_WLS_CS_1		(0x2 << SDRAM_PHY_CTRL_WLS_CS_OFFS)
+
+/* Phy control Register Write-Level Control */
+#define SDRAM_PHY_CTRL_WLC_REG		(MV_DDR_REGS_BASE + 0xE50)
+#define SDRAM_PHY_CTRL_WLC_DQ_DLY_OFFS	0
+#define SDRAM_PHY_CTRL_WLC_DQ_DLY_MASK	(0x7F << SDRAM_PHY_CTRL_WLC_DQ_DLY_OFFS)
+#define SDRAM_PHY_CTRL_WLC_DS_DLY_OFFS	16
+#define SDRAM_PHY_CTRL_WLC_DS_DLY_MASK	(0x7F << SDRAM_PHY_CTRL_WLC_DS_DLY_OFFS
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* __INCmvDramIfRegsh */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddrmc/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddrmc/Makefile
@@ -0,0 +1,4 @@
+include $(srctree)/$(subst ",,$(CONFIG_MV_HAL_RULES_PATH))
+# Objects list
+obj-$(CONFIG_MV_DDRMMC) += mvDramTmng.o
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddrmc/mvDramIf.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddrmc/mvDramIf.c
@@ -0,0 +1,1965 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+/* includes */
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "../mvDramIf.h"
+#include "mvDramIfRegs.h"
+#include "mvDramIfConfig.h"
+#include "mvDramIfConfig.h"
+#include "mvDramIfRegs.h"
+
+
+#ifdef MV_DEBUG
+#define DB(x) x
+#else
+#define DB(x)
+#endif
+
+/* DRAM bank presence encoding */
+#define BANK_PRESENT_CS0			0x1
+#define BANK_PRESENT_CS0_CS1			0x3
+#define BANK_PRESENT_CS0_CS2			0x5
+#define BANK_PRESENT_CS0_CS1_CS2		0x7
+#define BANK_PRESENT_CS0_CS2_CS3		0xd
+#define BANK_PRESENT_CS0_CS2_CS3_CS4		0xf
+
+/* locals   */
+static MV_BOOL sdramIfWinOverlap(MV_TARGET target, MV_ADDR_WIN *pAddrWin);
+#if defined(MV_INC_BOARD_DDIM)
+static void sdramDDrOdtConfig(MV_DRAM_BANK_INFO *pBankInfo);
+static MV_U32 sdramCtrlReg4Calc(MV_U32 minCas, MV_U32 busClk);
+static MV_U32 sdramConfigRegCalc(MV_DRAM_BANK_INFO *pBankInfo);
+static MV_U32 minCasCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 busClk, 
+						 MV_U32 forcedCl);
+static MV_U32 sdramTimingReg1Calc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 minCas, MV_U32 busClk);
+static MV_U32 sdramTimingReg2Calc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 minCas, MV_U32 busClk);
+static MV_U32 sdramTimingReg3Calc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 minCas, MV_U32 busClk);
+static MV_U32 sdramTimingReg4Calc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 minCas, MV_U32 busClk);
+static MV_U32 sdramTimingReg5Calc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 minCas, MV_U32 busClk);
+static MV_U32 sdramTimingReg6Calc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 minCas, MV_U32 busClk);
+
+/*******************************************************************************
+* mvDramIfDetect - Prepare DRAM interface configuration values.
+*
+* DESCRIPTION:
+*       This function implements the full DRAM detection and timing 
+*       configuration for best system performance.
+*       Since this routine runs from a ROM device (Boot Flash), its stack 
+*       resides on RAM, that might be the system DRAM. Changing DRAM 
+*       configuration values while keeping vital data in DRAM is risky. That
+*       is why the function does not preform the configuration setting but 
+*       prepare those in predefined 32bit registers (in this case IDMA 
+*       registers are used) for other routine to perform the settings.
+*       The function will call for board DRAM SPD information for each DRAM 
+*       chip select. The function will then analyze those SPD parameters of 
+*       all DRAM banks in order to decide on DRAM configuration compatible 
+*       for all DRAM banks.
+*       The function will set the CPU DRAM address decode registers.
+*       Note: This routine prepares values that will overide configuration of
+*       mvDramBasicAsmInit().
+*       
+* INPUT:
+*       forcedCl - Forced CAL Latency. If equal to zero, do not force.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_STATUS mvDramIfDetect(MV_U32 forcedCl)
+{
+	MV_U32 retVal = MV_OK;	/* return value */
+	MV_DRAM_BANK_INFO bankInfo[MV_DRAM_MAX_CS];
+	MV_U32  busClk, size, base = 0, i, temp, deviceW, dimmW;
+	MV_U8	minCas;
+	MV_DRAM_DEC_WIN dramDecWin;
+
+	dramDecWin.addrWin.baseHigh = 0;
+
+	busClk = mvBoardSysClkGet();
+	
+	if (0 == busClk)
+	{
+		mvOsPrintf("Dram: ERR. Can't detect system clock! \n");
+		return MV_ERROR;
+	}
+	
+	/* Close DRAM banks except bank 0 (in case code is excecuting from it...) */
+#if defined(MV_INCLUDE_SDRAM_CS1)
+	for(i= SDRAM_CS1; i < MV_DRAM_MAX_CS; i++)
+		mvCpuIfTargetWinEnable(i, MV_FALSE);
+#endif
+
+	/* we will use bank 0 as the representative of the all the DRAM banks,  */
+	/* since bank 0 must exist.                                             */	
+	for(i = 0; i < MV_DRAM_MAX_CS; i++)
+	{ 
+		/* if Bank exist */
+		if(MV_OK == mvDramBankInfoGet(i, &bankInfo[i]))
+		{
+			/* check it isn't SDRAM */
+			if(bankInfo[i].memoryType == MEM_TYPE_SDRAM)
+			{
+				mvOsPrintf("Dram: ERR. SDRAM type not supported !!!\n");
+				return MV_ERROR;
+			}
+			/* All banks must support registry in order to activate it */
+			if(bankInfo[i].registeredAddrAndControlInputs != 
+			   bankInfo[0].registeredAddrAndControlInputs)
+			{
+				mvOsPrintf("Dram: ERR. different Registered settings !!!\n");
+				return MV_ERROR;
+			}
+
+			/* Init the CPU window decode */
+			/* Note that the size in Bank info is in MB units 			*/
+			/* Note that the Dimm width might be different then the device DRAM width */
+			temp = MV_REG_READ(SDRAM_CTRL_4_REG);
+			
+			deviceW = ((temp & SDRAM_CTRL4_DWIDTH_MASK) == SDRAM_CTRL4_DWIDTH_16BIT )? 16 : 32;
+			dimmW = bankInfo[i].dataWidth - (bankInfo[i].dataWidth % 16);
+			size = ((bankInfo[i].size << 20) / (dimmW/deviceW)); 
+
+			/* We can not change DRAM window settings while excecuting  	*/
+			/* code from it. That is why we skip the DRAM CS[0], saving     */
+			/* it to the ROM configuration routine	*/
+			if(i == SDRAM_CS0)
+			{
+				MV_U32 sizeToReg;
+				
+				/* Translate the given window size to register format */
+				sizeToReg = ctrlSizeToReg(size, SCSR_SIZE_ALIGNMENT);
+
+				/* Size parameter validity check. */
+				if (-1 == sizeToReg)
+				{
+					mvOsPrintf("mvCtrlAddrDecToReg: ERR. Win %d size invalid.\n"
+							   ,i);
+					return MV_BAD_PARAM;
+				}
+                
+				/* Size is located at upper 16 bits */
+				sizeToReg <<= SCSR_SIZE_OFFS;
+
+				/* enable it */
+				sizeToReg |= SCSR_WIN_EN;
+
+				MV_REG_WRITE(DRAM_BUF_REG0, sizeToReg);
+			}
+			else
+			{
+				dramDecWin.addrWin.baseLow = base;
+				dramDecWin.addrWin.size = size;
+				dramDecWin.enable = MV_TRUE;
+				
+				if (MV_OK != mvDramIfWinSet(SDRAM_CS0 + i, &dramDecWin))
+				{
+					mvOsPrintf("Dram: ERR. Fail to set bank %d!!!\n", 
+							   SDRAM_CS0 + i);
+					return MV_ERROR;
+				}
+			}
+			
+			base += size;
+
+			/* update the suportedCasLatencies mask */
+			bankInfo[0].suportedCasLatencies &= bankInfo[i].suportedCasLatencies;
+
+		}
+		else
+		{
+			if( i == 0 ) /* bank 0 doesn't exist */
+			{
+				mvOsPrintf("Dram: ERR. Fail to detect bank 0 !!!\n");
+				return MV_ERROR;
+			}
+			else
+			{
+				DB(mvOsPrintf("Dram: Could not find bank %d\n", i));
+				bankInfo[i].size = 0;     /* Mark this bank as non exist */
+			}
+		}
+	}
+
+	/* calculate minimum CAS */
+	minCas = minCasCalc(&bankInfo[0], busClk, forcedCl);
+	if (0 == minCas) 
+	{
+		mvOsOutput("Dram: Warn: Could not find CAS compatible to SysClk %dMhz\n",
+				   (busClk / 1000000));
+
+		if (MV_REG_READ(SDRAM_CTRL_4_REG) & SDRAM_CTRL4_DTYPE_DDR3)
+		{
+			minCas = DDR3_CL_6; /* Continue with this CAS */
+			mvOsPrintf("Set default CAS latency 6\n");
+		}
+		else if (MV_REG_READ(SDRAM_CTRL_4_REG) & SDRAM_CTRL4_DTYPE_DDR2)
+		{
+			minCas = DDR2_CL_4; /* Continue with this CAS */
+			mvOsPrintf("Set default CAS latency 4\n");
+		}
+		else
+		{
+			minCas = DDR1_CL_3; /* Continue with this CAS */
+			mvOsPrintf("Set default CAS latency 3\n");
+		}
+	}
+
+	/* calc SDRAM_CONFIG_REG  and save it to temp register */
+	temp = sdramConfigRegCalc(&bankInfo[0]);
+	if(-1 == temp)
+	{
+		mvOsPrintf("Dram: ERR. sdramConfigRegCalc failed !!!\n");
+		return MV_ERROR;
+	}
+	MV_REG_WRITE(DRAM_BUF_REG9, temp);
+
+	/* calc SDRAM_CONTROL_REG4  and save it to temp register */ 
+	temp = sdramCtrlReg4Calc(minCas, MV_U32 busClk);
+	if(-1 == temp)
+	{
+		mvOsPrintf("Dram: ERR. sdramCtrlReg4Calc failed !!!\n");
+		return MV_ERROR;
+	}
+	MV_REG_WRITE(DRAM_BUF_REG10, temp);
+
+	/* calc SDRAM_TIMING_REG_1  and save it to temp register */
+	temp = sdramTimingReg1Calc(&bankInfo[0], minCas, busClk);
+	if(-1 == temp)
+	{
+		mvOsPrintf("Dram: ERR. sdramTimingReg1Calc failed !!!\n");
+		return MV_ERROR;
+	}
+	MV_REG_WRITE(DRAM_BUF_REG1, temp);
+
+	/* calc SDRAM_TIMING_REG_2  and save it to temp register */
+	temp = sdramTimingReg2Calc(&bankInfo[0], minCas, busClk);
+	if(-1 == temp)
+	{
+		mvOsPrintf("Dram: ERR. sdramTimingReg2Calc failed !!!\n");
+		return MV_ERROR;
+	}
+	MV_REG_WRITE(DRAM_BUF_REG2, temp);
+
+	/* calc SDRAM_TIMING_REG_3  and save it to temp register */
+	temp = sdramTimingReg3Calc(&bankInfo[0], minCas, busClk);
+	if(-1 == temp)
+	{
+		mvOsPrintf("Dram: ERR. sdramTimingReg2Calc failed !!!\n");
+		return MV_ERROR;
+	}
+	MV_REG_WRITE(DRAM_BUF_REG3, temp);
+
+	/* calc SDRAM_TIMING_REG_4  and save it to temp register */
+	temp = sdramTimingReg4Calc(&bankInfo[0], minCas, busClk);
+	if(-1 == temp)
+	{
+		mvOsPrintf("Dram: ERR. sdramTimingReg2Calc failed !!!\n");
+		return MV_ERROR;
+	}
+	MV_REG_WRITE(DRAM_BUF_REG4, temp);
+
+	/* calc SDRAM_TIMING_REG_5  and save it to temp register */
+	temp = sdramTimingReg5Calc(&bankInfo[0], minCas, busClk);
+	if(-1 == temp)
+	{
+		mvOsPrintf("Dram: ERR. sdramTimingReg2Calc failed !!!\n");
+		return MV_ERROR;
+	}
+	MV_REG_WRITE(DRAM_BUF_REG5, temp);
+
+	/* calc SDRAM_TIMING_REG_6  and save it to temp register */
+	temp = sdramTimingReg6Calc(&bankInfo[0], minCas, busClk);
+	if(-1 == temp)
+	{
+		mvOsPrintf("Dram: ERR. sdramTimingReg2Calc failed !!!\n");
+		return MV_ERROR;
+	}
+	MV_REG_WRITE(DRAM_BUF_REG6, temp);
+
+	/* Config DDR3/2 On Die Termination (ODT) registers */
+	if ( (MV_REG_READ(SDRAM_CTRL_4_REG) & SDRAM_CTRL4_DTYPE_DDR3) ||
+		(MV_REG_READ(SDRAM_CTRL_4_REG) & SDRAM_CTRL4_DTYPE_DDR2) )
+	{
+		sdramDDrOdtConfig(bankInfo);
+	}
+	
+	/* Note that DDR SDRAM Address/Control and Data pad calibration     */
+	/* settings is done in mvSdramIfConfig.s                            */
+
+	return retVal;
+}
+
+/*******************************************************************************
+* minCasCalc - Calculate the Minimum CAS latency which can be used.
+*
+* DESCRIPTION:
+*	Calculate the minimum CAS latency that can be used, base on the DRAM
+*	parameters and the SDRAM bus Clock freq.
+*
+* INPUT:
+*	busClk    - the DRAM bus Clock.
+*	pBankInfo - bank info parameters.
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       The minimum CAS Latency. The function returns 0 if max CAS latency
+*		supported by banks is incompatible with system bus clock frequancy.
+*
+*******************************************************************************/
+static MV_U32 minCasCalc(MV_DRAM_BANK_INFO *pBankInfo, MV_U32 busClk, 
+						 MV_U32 forcedCl)
+{
+	MV_U32 count = 1, j;
+	MV_U32 busClkPs = 1000000000 / (busClk / 1000);  /* in ps units */
+	MV_U32 startBit, stopBit;
+	
+	/*     DDR 1:
+			*******-******-******-******-******-******-******-******* 
+			* bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * 
+			*******-******-******-******-******-******-******-******* 
+	CAS	=	* TBD  |  4   | 3.5  |   3  | 2.5  |  2   | 1.5  |   1  * 
+			*********************************************************/
+	
+	/*     DDR 2:
+			*******-******-******-******-******-******-******-******* 
+			* bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * 
+			*******-******-******-******-******-******-******-******* 
+	CAS	=	* TBD  |  6   |  5   |  4   |  3   |  2   | TBD  | TBD  * 
+			*********************************************************/
+	/*     DDR 3:
+			*******-******-******-******-******-******-******-******* 
+			* bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 * 
+			*******-******-******-******-******-******-******-******* 
+	CAS	=	* TBD  | 10   |  9   |  8   |  7   |  6   |  5   | TBD  * 
+			*********************************************************/
+	
+	
+	/* If we are asked to use the forced CAL */
+	if (forcedCl)
+	{
+		mvOsPrintf("DRAM: Using forced CL %d.%d\n", (forcedCl / 10), (forcedCl % 10));
+	
+		if (MV_REG_READ(SDRAM_CTRL_4_REG) & SDRAM_CTRL4_DTYPE_DDR3)
+		{
+			if (forcedCl == 50)
+				pBankInfo->suportedCasLatencies = 0x02;
+			else if (forcedCl == 60)
+				pBankInfo->suportedCasLatencies = 0x04;
+			else if (forcedCl == 70)
+				pBankInfo->suportedCasLatencies = 0x08;
+			else if (forcedCl == 80)
+				pBankInfo->suportedCasLatencies = 0x10;
+			else if (forcedCl == 90)
+				pBankInfo->suportedCasLatencies = 0x20;
+			else if (forcedCl == 100)
+				pBankInfo->suportedCasLatencies = 0x40;
+			else
+			{
+				mvOsPrintf("Forced CL %d.%d not supported. Set default CL 6\n", 
+						   (forcedCl / 10), (forcedCl % 10));
+				pBankInfo->suportedCasLatencies = 0x4;
+			}
+		}
+		else if (MV_REG_READ(SDRAM_CTRL_4_REG) & SDRAM_CTRL4_DTYPE_DDR2)
+		{
+			if (forcedCl == 30)
+				pBankInfo->suportedCasLatencies = 0x08;
+			else if (forcedCl == 40)
+				pBankInfo->suportedCasLatencies = 0x10;
+			else if (forcedCl == 50)
+				pBankInfo->suportedCasLatencies = 0x20;
+			else
+			{
+				mvOsPrintf("Forced CL %d.%d not supported. Set default CL 4\n", 
+						   (forcedCl / 10), (forcedCl % 10));
+				pBankInfo->suportedCasLatencies = 0x10;
+			}
+		}
+		else
+		{
+			if (forcedCl == 15)
+				pBankInfo->suportedCasLatencies = 0x02;
+			else if (forcedCl == 20)
+				pBankInfo->suportedCasLatencies = 0x04;
+			else if (forcedCl == 25)
+				pBankInfo->suportedCasLatencies = 0x08;
+			else if (forcedCl == 30)
+				pBankInfo->suportedCasLatencies = 0x10;
+			else if (forcedCl == 40)
+				pBankInfo->suportedCasLatencies = 0x40;
+			else
+			{
+				mvOsPrintf("Forced CL %d.%d not supported. Set default CL 3\n", 
+						   (forcedCl / 10), (forcedCl % 10));
+				pBankInfo->suportedCasLatencies = 0x10;
+			}
+		}
+	
+		return pBankInfo->suportedCasLatencies;        
+	}   
+	
+	/* go over the supported cas mask from Max Cas down and check if the 	*/
+	/* SysClk stands in its time requirments.								*/
+	
+	
+	DB(mvOsPrintf("Dram: minCasCalc supported mask = %x busClkPs = %x \n",
+								pBankInfo->suportedCasLatencies,busClkPs ));
+	for(j = 7; j > 0; j--)
+	{
+		if((pBankInfo->suportedCasLatencies >> j) & BIT0 )
+		{
+			/* Reset the bits for CL incompatible for the sysClk            */
+			switch (count)
+			{
+				case 1: 
+					if (pBankInfo->minCycleTimeAtMaxCasLatPs > busClkPs) 
+						pBankInfo->suportedCasLatencies &= ~(BIT0 << j);
+					count++;
+					break;
+				case 2: 
+					if (pBankInfo->minCycleTimeAtMaxCasLatMinus1Ps > busClkPs)
+						pBankInfo->suportedCasLatencies &= ~(BIT0 << j);
+					count++;
+					break;
+				case 3: 
+					if (pBankInfo->minCycleTimeAtMaxCasLatMinus2Ps > busClkPs)
+						pBankInfo->suportedCasLatencies &= ~(BIT0 << j);
+					count++;
+					break;
+				default: 
+					pBankInfo->suportedCasLatencies &= ~(BIT0 << j);
+					break;
+			}
+		}
+	}
+	
+	DB(mvOsPrintf("Dram: minCasCalc support = %x (after SysCC calc)\n",
+				  pBankInfo->suportedCasLatencies ));
+	
+	/* SDRAM DDR1 controller supports CL 1.5 to 3.5 */
+	/* SDRAM DDR2 controller supports CL 3 to 5     */
+	/* SDRAM DDR3 controller supports CL 5 to 10     */
+	if (MV_REG_READ(SDRAM_CTRL_4_REG) & SDRAM_CTRL4_DTYPE_DDR3)
+	{
+		startBit = 1;   /* DDR3 support CL start with CL5 (bit 1) */
+		stopBit  = 6;   /* DDR3 support CL stops with CL10 (bit 6)   */
+	}
+	else if (MV_REG_READ(SDRAM_CTRL_4_REG) & SDRAM_CTRL4_DTYPE_DDR2)
+	{
+		startBit = 3;   /* DDR2 support CL start with CL3 (bit 3) */
+		stopBit  = 5;   /* DDR2 support CL stops with CL5 (bit 5) */
+	}
+	else
+	{
+		startBit = 1;   /* DDR1 support CL start with CL1.5 (bit 3) */
+		stopBit  = 4;   /* DDR1 support CL stops with CL3 (bit 4)   */
+	}
+	
+	for(j = startBit; j <= stopBit ; j++)
+	{
+		if((pBankInfo->suportedCasLatencies >> j) & BIT0 )
+		{
+			DB(mvOsPrintf("Dram: minCasCalc choose CAS %x \n",(BIT0 << j)));
+			return (BIT0 << j);
+		}
+	}
+	
+	return 0; 
+}
+
+/*******************************************************************************
+* sdramConfigRegCalc - Calculate sdram config register
+*
+* DESCRIPTION: Calculate sdram config register optimized value based
+*			on the bank info parameters.
+*
+* INPUT:
+*	pBankInfo - sdram bank parameters
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       sdram config reg value.
+*
+*******************************************************************************/
+static MV_U32 sdramConfigRegCalc(MV_DRAM_BANK_INFO *pBankInfo)
+{
+	MV_U32 sdramConfig = 0;
+	MV_U32 populateBanks = 0;
+	
+	populateBanks = sdramPopulateBanks(pBankInfo);
+
+	sdramConfig = MV_REG_READ(SDRAM_CFG_REG(csNum));
+	
+	/* Set new value to RTT field */
+	sdramConfig  &= SDRAM_CFG_RTT_MASK;
+	/* DDR3 RTT */
+	if (MV_REG_READ(SDRAM_CTRL_4_REG) & SDRAM_CTRL4_DTYPE_DDR3)
+	{
+		switch(populateBanks)
+		{
+			case(BANK_PRESENT_CS0):
+			case(BANK_PRESENT_CS0_CS1):
+				sdramConfig  |= SDRAM_CFG_RTT_120;
+				break;
+			default:
+				mvOsPrintf("sdramRTT: Invalid DRAM bank presence\n");
+				return;
+		} 
+	}
+	/* DDR2 RTT */
+	else if (MV_REG_READ(SDRAM_CTRL_4_REG) & SDRAM_CTRL4_DTYPE_DDR2)
+	{
+		switch(populateBanks)
+		{
+			case(BANK_PRESENT_CS0):
+			case(BANK_PRESENT_CS0_CS1):
+				sdramConfig  |= SDRAM_CFG_DDR2_RTT_150;
+				break;
+			default:
+				mvOsPrintf("sdramRTT: Invalid DRAM bank presence\n");
+				return;
+		} 
+	}
+
+	/* DDR3 DRAM number of bank is 8*/
+	if (MV_REG_READ(SDRAM_CTRL_4_REG) & SDRAM_CTRL4_DTYPE_DDR3)
+	{
+		sdramConfig |= SDRAM_CFG_8_BANK_NUM;
+		mvOsPrintf("DRAM num of bank: 8.\n");
+	}
+	else
+	{
+		/* DDR2 num of bank is as in SPD/4 */
+		sdramConfig &= ~SDRAM_CFG_BANK_NUM_MASK;
+		sdramConfig |= ((pBankInfo->numOfBanksOnEachDevice) << (SDRAM_CFG_BANK_NUM_OFFS - 2));
+		mvOsPrintf("DRAM num of bank: 0x%x.\n",
+			((pBankInfo->numOfBanksOnEachDevice) << (SDRAM_CFG_BANK_NUM_OFFS - 2)));
+	}
+	
+	/* DRAM number of row address*/
+	sdramConfig &= ~SDRAM_CFG_ROW_NUM_MASK;
+	sdramConfig |= ((pBankInfo->numOfRowAddr - 0x10) << (SDRAM_CFG_ROW_NUM_OFFS));
+	mvOsPrintf("DRAM num of row: 0x%x.\n",
+			((pBankInfo->numOfRowAddr - 0x10) << (SDRAM_CFG_ROW_NUM_OFFS)) );
+	/* DRAM number of col address*/
+	sdramConfig &= ~SDRAM_CFG_COL_NUM_MASK;
+	sdramConfig |= ((pBankInfo->numOfColAddr - 0x7) << (SDRAM_CFG_COL_NUM_OFFS));
+	mvOsPrintf("DRAM num of col: 0x%x.\n",
+			((pBankInfo->numOfColAddr - 0x7) << (SDRAM_CFG_COL_NUM_OFFS)) );
+
+	DB(mvOsPrintf("Dram: sdramConfigRegCalc set sdramConfig to 0x%x\n",
+				  sdramConfig));
+	
+	return sdramConfig;  
+}
+
+/*******************************************************************************
+* sdramCtrlReg4Calc - Calculate sdram mode register
+*
+* DESCRIPTION: Calculate sdram mode register optimized value based
+*			on the bank info parameters and the minCas.
+*
+* INPUT:
+*	minCas	  - minimum CAS supported. 
+*       busClk    - Bus clock
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       sdram mode reg value.
+*
+*******************************************************************************/
+static MV_U32 sdramCtrlReg4Calc(MV_U32 minCas, MV_U32 busClk)
+{
+	MV_U32 sdramCtrl4;
+	MV_U32 cwl = 0;
+	
+	sdramCtrl4 = MV_REG_READ(SDRAM_CTRL_4_REG);
+	/* Clear CAS Latency field */
+	sdramCtrl4 &= ~SDRAM_CTRL4_CL_MASK;
+	
+	mvOsPrintf("DRAM CAS Latency ");
+	if (sdramCtrl4 & SDRAM_CTRL4_DTYPE_DDR3)
+	{
+		switch (minCas)
+		{
+			case DDR3_CL_5: 
+				sdramCtrl4 |= SDRAM_DDR3_CL_5;
+				mvOsPrintf("5.\n");
+				break;
+			case DDR3_CL_6: 
+				sdramCtrl4 |= SDRAM_DDR3_CL_6;
+				mvOsPrintf("6.\n");
+				break;
+			case DDR4_CL_7: 
+				sdramCtrl4 |= SDRAM_DDR3_CL_7;
+				mvOsPrintf("7.\n");
+				break;
+			case DDR5_CL_8: 
+				sdramCtrl4 |= SDRAM_DDR3_CL_8;
+				mvOsPrintf("8.\n");
+				break;
+			case DDR5_CL_9: 
+				sdramCtrl4 |= SDRAM_DDR3_CL_9;
+				mvOsPrintf("9.\n");
+				break;
+			case DDR5_CL_10: 
+				sdramCtrl4 |= SDRAM_DDR3_CL_10;
+				mvOsPrintf("10.\n");
+				break;
+			case DDR5_CL_10: 
+				sdramCtrl4 |= SDRAM_DDR3_CL_11;
+				mvOsPrintf("11.\n");
+				break;
+			default:
+				mvOsPrintf("\nsdramCtrlReg4Calc ERROR: Max. CL out of range\n");
+				return -1;
+		}
+		
+		/* JEDEC Calc CWL DDR3 Only */
+		if ( busClk =< 400000000)
+			cwl = 0;
+		else if ( (busClk > 400000000) && (busClk =< 533333333) )
+			cwl = 1;
+		else if ( (busClk > 533333333) && (busClk =< 666666667) )
+			cwl = 2;
+		else if ( (busClk > 666666667) && (busClk =< 800000000) )
+			cwl = 3;
+	}
+	else if (sdramCtrl4 & SDRAM_CTRL4_DTYPE_DDR2)
+	{
+		switch (minCas)
+		{
+			case DDR2_CL_3: 
+				sdramCtrl4 |= SDRAM_DDR2_CL_3;
+				mvOsPrintf("3.\n");
+				break;
+			case DDR2_CL_4: 
+				sdramCtrl4 |= SDRAM_DDR2_CL_4;
+				mvOsPrintf("4.\n");
+				break;
+			case DDR2_CL_5: 
+				sdramCtrl4 |= SDRAM_DDR2_CL_5;
+				mvOsPrintf("5.\n");
+				break;
+			case DDR2_CL_6: 
+				sdramCtrl4 |= SDRAM_DDR2_CL_6;
+				mvOsPrintf("6.\n");
+				break;
+			default:
+				mvOsPrintf("\nsdramCtrlReg4Calc ERROR: Max. CL out of range\n");
+				return -1;
+		}
+	}
+	else	/* DDR1 */
+	{
+		DB(mvOsPrintf("\nsdramCtrlReg4Calc register DDR1 TODO\n"));
+	}
+	
+	DB(mvOsPrintf("\nsdramCtrlReg4Calc register 0x%x\n", sdramMode ));
+
+	return sdramMode;
+}
+
+/*******************************************************************************
+* sdramExtModeRegCalc - Calculate sdram Extended mode register
+*
+* DESCRIPTION: 
+*		Return sdram Extended mode register value based
+*		on the bank info parameters and bank presence.
+*
+* INPUT:
+*	pBankInfo - sdram bank parameters
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       sdram Extended mode reg value.
+*
+*******************************************************************************/
+static MV_U32 sdramExtModeRegCalc(MV_DRAM_BANK_INFO *pBankInfo)
+{
+	MV_U32 populateBanks = 0;
+	int bankNum;
+	if (MV_REG_READ(SDRAM_CONFIG_REG) & SDRAM_DTYPE_DDR2)
+	{
+	/* Represent the populate banks in binary form */
+	for(bankNum = 0; bankNum < MV_DRAM_MAX_CS; bankNum++)
+	{
+		if (0 != pBankInfo[bankNum].size)
+		{
+				populateBanks |= (1 << bankNum);
+			}
+		}
+	
+		switch(populateBanks)
+		{
+			case(BANK_PRESENT_CS0):
+				return DDR_SDRAM_EXT_MODE_CS0_DV;
+		
+			case(BANK_PRESENT_CS0_CS1):
+				return DDR_SDRAM_EXT_MODE_CS0_DV;
+		
+			case(BANK_PRESENT_CS0_CS2):
+				return DDR_SDRAM_EXT_MODE_CS0_CS2_DV;
+		
+			case(BANK_PRESENT_CS0_CS1_CS2):
+				return DDR_SDRAM_EXT_MODE_CS0_CS2_DV;
+		
+			case(BANK_PRESENT_CS0_CS2_CS3):
+				return DDR_SDRAM_EXT_MODE_CS0_CS2_DV;
+		
+			case(BANK_PRESENT_CS0_CS2_CS3_CS4):
+				return DDR_SDRAM_EXT_MODE_CS0_CS2_DV;
+		
+			default:
+				mvOsPrintf("sdramExtModeRegCalc: Invalid DRAM bank presence\n");
+				return -1;
+		} 
+	}
+	return 0;
+}
+                                                                    
+/*******************************************************************************
+* sdramTimingReg1Calc - Calculate sdram timing register 1
+*
+* DESCRIPTION: 
+*       This function calculates sdram timing register 1
+*       optimized value based on the bank info parameters and the minCas.
+*
+* INPUT:
+*	pBankInfo - sdram bank parameters
+*       busClk    - Bus clock
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       sdram timing reg 1 value.
+*
+*******************************************************************************/
+static MV_U32 sdramTimingReg1Calc(MV_DRAM_BANK_INFO *pBankInfo, 
+                                                MV_U32 minCas, MV_U32 busClk)
+{
+	MV_U32 tCcd  = 0;
+	MV_U32 tRtp = 0;
+	MV_U32 tWtr = 0;
+	MV_U32 tRc = 0;
+	MV_U32 tRefi = 0;
+	
+	MV_U32 bankNum;
+	
+	busClk = busClk / 1000000;    /* In MHz */
+	
+	/* figure out the memory refresh internal */
+	switch (pBankInfo.refreshInterval & 0xf)
+	{
+		case 0x0: /* refresh period is 15.625 usec */
+				tRefi = 15625;
+				break;
+		case 0x1: /* refresh period is 3.9 usec  	*/
+				tRefi = 3900;
+				break;
+		case 0x2: /* refresh period is 7.8 usec 	*/
+				tRefi = 7800;
+				break;
+		case 0x3: /* refresh period is 31.3 usec	*/
+				tRefi = 31300;
+				break;
+		case 0x4: /* refresh period is 62.5 usec	*/
+				tRefi = 62500;
+				break;
+		case 0x5: /* refresh period is 125 usec 	*/
+				tRefi = 125000;
+				break;
+		default:  /* refresh period undefined 					*/
+				mvOsPrintf("Dram: ERR. DRAM refresh period is unknown!\n");
+				return -1;
+    	}
+
+	/* Now the refreshPeriod is in register format value */
+	tRefi = (busClk * tRefi) / 1000;
+	
+	DB(mvOsPrintf("Dram: sdramTimingReg1Calc calculated refresh interval %0x\n", 
+				  tRefi));
+	
+	tRc  = pBankInfo.minActivateToActiveCmd;
+	tWtr = pBankInfo.minWriteToReadCmdDelay;
+	tRtp = pBankInfo.minReadToPrechCmdDelay;
+
+	if (MV_REG_READ(SDRAM_CTRL_4_REG) & SDRAM_CTRL4_DTYPE_DDR3)
+	{
+		/* JEDEC min reqeirments tccd = 4 */
+		tCcd  = 4;
+		DB(mvOsPrintf("tCcd = %d ", tCcd));
+
+		/* Extract clock cycles from time parameter. We need to round up    */
+		tRc = ((busClk * tRc) / 1000) + (((busClk * tRc) % 1000) ? 1 : 0);
+		DB(mvOsPrintf("tRc = %d ", tRc));
+		tWtr = ((busClk * tWtr) / 1000) + (((busClk * tWtr) % 1000) ? 1 : 0);
+		/* JEDEC min reqeirments tWtr = 4 */
+		if (tWtr < 4)
+			tWtr = 4;
+		DB(mvOsPrintf("tWtr = %d ", tWtr));
+		tRtp = ((busClk * tRtp) / 1000) + (((busClk * tRtp) % 1000) ? 1 : 0);
+		/* JEDEC min reqeirments tRtp = 4 */
+		if (tRtp < 4)
+			tRtp = 4;
+		DB(mvOsPrintf("tRtp = %d ", tRtp));
+	}
+	else if (MV_REG_READ(SDRAM_CTRL_4_REG) & SDRAM_CTRL4_DTYPE_DDR2)
+	{
+		/* Extract timing (in ns) from SPD value. We ignore the tenth ns    */
+		/* part by shifting the data two bits right.                        */
+		tWtr  = tWtr  >> 2;  /* For example 0x50 -> 20ns                    */
+		tRtp = tRtp >> 2;
+		tRc = tRc >> 2;
+	
+		/* Extract clock cycles from time parameter. We need to round up    */
+		tWtr = ((busClk * tWtr) / 1000) + (((busClk * tWtr) % 1000) ? 1 : 0);
+		/* JEDEC min reqeirments tWtr = 2 */
+		if (tWtr < 2)
+			tWtr = 2;
+		DB(mvOsPrintf("tWtr = %d ", tWtr));
+		tRtp = ((busClk * tRtp) / 1000) + (((busClk * tRtp) % 1000) ? 1 : 0);
+		/* JEDEC min reqeirments tRtp = 2 */
+		if (tRtp < 2)
+			tRtp = 2;
+		DB(mvOsPrintf("tRtp = %d ", tRtp));
+		tRc = ((busClk * tRc) / 1000) + (((busClk * tRc) % 1000) ? 1 : 0);
+		DB(mvOsPrintf("tRc = %d ", tRc));
+		/* JEDEC min reqeirments tccd = 2 */
+		tCcd  = 2;
+		DB(mvOsPrintf("tCcd = %d ", tCcd));
+
+	
+	
+	}
+	else
+	{    
+		if ((200 == busClk) || ((100 == busClk) && (DDR1_CL_1_5 == minCas)))
+		{
+			tWtr = 2;
+		}
+		else
+		{
+			tWtr = 1;
+		}
+		
+		tRtp = 2; /* Must be set to 0x1 (two cycles) when using DDR1 */
+	}
+	
+	DB(mvOsPrintf("tWtr = %d\n", tWtr));
+	
+	return ((tCcd << SDRAM_TIMING1_TCCD_OFFS)|
+			(tRtp << SDRAM_TIMING1_TRTP_OFFS)|
+			(tWtr << SDRAM_TIMING1_TWTR_OFFS)|
+			(tRc << SDRAM_TIMING1_TRC_OFFS)	 |
+			(tRefi << SDRAM_TIMING1_TREFI_OFFS));
+}
+
+/*******************************************************************************
+* sdramTimingReg2Calc - Calculate sdram timing register 2
+*
+* DESCRIPTION: 
+*       This function calculates sdram timing register 2
+*       optimized value based on the bank info parameters and the minCas.
+*
+* INPUT:
+*	pBankInfo - sdram bank parameters
+*       busClk    - Bus clock
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       sdram timing reg 2 value.
+*
+*******************************************************************************/
+static MV_U32 sdramTimingReg2Calc(MV_DRAM_BANK_INFO *pBankInfo, 
+                                                MV_U32 minCas, MV_U32 busClk)
+{
+	MV_U32 tRp  = 0;
+	MV_U32 tRrd = 0;
+	MV_U32 tRcd = 0;
+	MV_U32 tWr  = 0;
+	MV_U32 tRfc = 0;
+	MV_U32 tMrd = 0;
+	
+	MV_U32 bankNum;
+	
+	busClk = busClk / 1000000;    /* In MHz */
+	
+	tRp  = pBankInfo.minRowPrechargeTime;
+	tRrd = pBankInfo.minRowActiveToRowActive;
+	tRcd = pBankInfo.minRasToCasDelay;
+	tWr  = pBankInfo.minWriteRecoveryTime;
+	tRfc = pBankInfo.minRefreshToActiveCmd;
+
+	if (MV_REG_READ(SDRAM_CTRL_4_REG) & SDRAM_CTRL4_DTYPE_DDR3)
+	{
+		/* Extract clock cycles from time parameter. We need to round up        */
+		tRp  = ((busClk * tRp)  / 1000) + (((busClk * tRp)  % 1000) ? 1 : 0);
+		DB(mvOsPrintf("tRp = %d ", tRp));
+		tRrd = ((busClk * tRrd) / 1000) + (((busClk * tRrd) % 1000) ? 1 : 0);
+		/* JEDEC min reqeirments tRrd = 4 */
+		if (tRrd < 4)
+			tRrd = 4;
+		DB(mvOsPrintf("tRrd = %d ", tRrd));
+		tRcd = ((busClk * tRcd) / 1000) + (((busClk * tRcd) % 1000) ? 1 : 0);
+		DB(mvOsPrintf("tRcd = %d ", tRcd));
+		/* JEDEC min reqeirments tWr = 15nSec */
+		tWr  = 0xF;
+		tWr  = ((busClk * tWr)  / 1000) + (((busClk * tWr)  % 1000) ? 1 : 0);
+		DB(mvOsPrintf("tWr = %d ", tWr));
+		tRfc  = ((busClk * tRfc)  / 1000) + (((busClk * tRfc)  % 1000) ? 1 : 0);
+		DB(mvOsPrintf("tRfc = %d ", tRfc));
+		/* JEDEC min reqeirments tMrd = 4 */
+		tMrd  = 0x4;
+		DB(mvOsPrintf("tMrd = %d ", tMrd));
+	}
+	else if (MV_REG_READ(SDRAM_CTRL_4_REG) & SDRAM_CTRL4_DTYPE_DDR2)
+	{
+	
+		/* Extract timing (in ns) from SPD value. We ignore the tenth ns part.  */
+		/* by shifting the data two bits right.                                 */
+		tRp  = tRp  >> 2;    /* For example 0x50 -> 20ns                        */
+		tRrd = tRrd >> 2;
+		tRcd = tRcd >> 2;
+		tWr  = tWr  >> 2;
+
+		/* Extract clock cycles from time parameter. We need to round up        */
+		tRp  = ((busClk * tRp)  / 1000) + (((busClk * tRp)  % 1000) ? 1 : 0);
+		/* Micron work around for 133MHz */
+		if (busClk == 133)
+			tRp += 1;
+		DB(mvOsPrintf("tRp = %d ", tRp));
+		tRrd = ((busClk * tRrd) / 1000) + (((busClk * tRrd) % 1000) ? 1 : 0);
+		/* JEDEC min reqeirments tRrd = 2 */
+		if (tRrd < 2)
+			tRrd = 2;
+		DB(mvOsPrintf("tRrd = %d ", tRrd));
+		tRcd = ((busClk * tRcd) / 1000) + (((busClk * tRcd) % 1000) ? 1 : 0);
+		DB(mvOsPrintf("tRcd = %d ", tRcd));
+		tWr  = ((busClk * tWr)  / 1000) + (((busClk * tWr)  % 1000) ? 1 : 0);
+		DB(mvOsPrintf("tWr = %d ", tWr));
+		tRfc  = ((busClk * tRfc)  / 1000) + (((busClk * tRfc)  % 1000) ? 1 : 0);
+		DB(mvOsPrintf("tRfc = %d ", tRfc));
+		/* JEDEC min reqeirments tMrd = 2 */
+		tMrd  = 0x2;
+		DB(mvOsPrintf("tMrd = %d ", tMrd));
+	}
+	else
+	{    
+		tWr  = ((busClk*SDRAM_TWR) / 1000) + (((busClk*SDRAM_TWR) % 1000)?1:0);
+		tRtp = 2; /* Must be set to 0x1 (two cycles) when using DDR1 */
+		if (pBankInfo[0].deviceDensity == _1G)
+		{
+			tRfc = SDRAM_TRFC_1G;
+		}
+		else
+		{
+			if (200 == busClk)
+			{
+				tRfc = SDRAM_TRFC_64_512M_AT_200MHZ;
+			}
+			else
+			{
+				tRfc = SDRAM_TRFC_64_512M;
+			}
+		}
+		tRfc  = ((busClk * tRfc)  / 1000) + (((busClk * tRfc)  % 1000) ? 1 : 0);
+		DB(mvOsPrintf("tRfc = %d ", tRfc));
+	}
+	
+	return ((tRp << SDRAM_TIMING2_TRP_OFFS)	|
+			(tRrd << SDRAM_TIMING2_TRRD_OFFS)	|
+			(tRcd << SDRAM_TIMING2_TRCD_OFFS)	|
+			(tWr << SDRAM_TIMING2_TWR_OFFS)		|
+			(tRfc << SDRAM_TIMING2_TRFC_OFFS)	|
+			(tMrd << SDRAM_TIMING2_TMRD_OFFS));
+}
+
+/*******************************************************************************
+* sdramTimingReg3Calc - Calculate sdram timing register 3
+*
+* DESCRIPTION: 
+*       This function calculates sdram timing register 3
+*       optimized value based on the bank info parameters and the minCas.
+*
+* INPUT:
+*	pBankInfo - sdram bank parameters
+*       busClk    - Bus clock
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       sdram timing reg 3 value.
+*
+*******************************************************************************/
+static MV_U32 sdramTimingReg3Calc(MV_DRAM_BANK_INFO *pBankInfo, 
+                                                MV_U32 minCas, MV_U32 busClk)
+{
+	MV_U32 tMod  = 0;
+	MV_U32 tXsrd = 0;
+	MV_U32 tXsnr = 0;
+	MV_U32 tXards  = 0;
+	MV_U32 tXp = 0;
+	
+	MV_U32 bankNum;
+	
+	busClk = busClk / 1000000;    /* In MHz */
+	
+	/* JEDEC min reqeirments tXsnr = MAX(5tCK, tRfc + 10nSec) */
+	tXsnr = pBankInfo.minRefreshToActiveCmd + 10;
+	tXsnr  = ((busClk * tXsnr)  / 1000) + (((busClk * tXsnr)  % 1000) ? 1 : 0);
+	DB(mvOsPrintf("tXsnr = %d ", tXsnr));
+
+	if (MV_REG_READ(SDRAM_CTRL_4_REG) & SDRAM_CTRL4_DTYPE_DDR3)
+	{
+		/* Extract clock cycles from time parameter. We need to round up        */
+		/* JEDEC min reqeirments tMod = MAX(12tCK, 15nSec) */
+		tMod  = ((busClk * 15)  / 1000) + (((busClk * 15)  % 1000) ? 1 : 0);
+		tMod = MV_MAX(tMod, 12);
+		DB(mvOsPrintf("tMod = %d ", tMod));
+		/* JEDEC min reqeirments tXsrd = 512 tCK */
+		tXsrd = 512;
+		DB(mvOsPrintf("tXsrd = %d ", tXsrd));
+		/* JEDEC min reqeirments tXards = MAX(10tCK, 24nSec) */
+		tXards  = ((busClk * 24)  / 1000) + (((busClk * 24)  % 1000) ? 1 : 0);
+		tXards = MV_MAX(tXards, 10);
+		DB(mvOsPrintf("tXards = %d ", tXards));
+		/* JEDEC min reqeirments tXp = MAX(3tCK, 7.5nSec) */
+		tXp  = ((busClk * 7.5)  / 1000) + (((busClk * 7.5)  % 1000) ? 1 : 0);
+		tXp = MV_MAX(tXp, 3);
+		DB(mvOsPrintf("tXp = %d ", tXp));
+	}
+	else if (MV_REG_READ(SDRAM_CTRL_4_REG) & SDRAM_CTRL4_DTYPE_DDR2)
+	{
+	
+		/* Extract clock cycles from time parameter. We need to round up        */
+		/* JEDEC min reqeirments tMod = 2tCK */
+		tMod = 2;
+		DB(mvOsPrintf("tMod = %d ", tMod));
+		/* JEDEC min reqeirments tXsrd = 200 tCK */
+		tXsrd = 200;
+		DB(mvOsPrintf("tXsrd = %d ", tXsrd));
+		/* JEDEC min reqeirments tXards = 200 and 267 6
+		 * 	 			  333 7 and 400 8*/
+		switch (busClk)
+		{
+		case 200:
+		case 267:
+			tXards = 6;
+			break;
+		case 333:
+			tXards = 7;
+			break;
+		case 400:
+			tXards = 8;
+			break;
+		}
+		DB(mvOsPrintf("tXards = %d ", tXards));
+		/* JEDEC min reqeirments tXp = 2 tCK */
+		tXp = 2;
+		DB(mvOsPrintf("tXp = %d ", tXp));
+	}
+	else
+	{    
+		/* TODO */
+		DB(mvOsPrintf("LP DDR1"));
+	}
+	
+	return ((tMod << SDRAM_TIMING3_TMOD_OFFS)	|
+			((tXsnr >> 8) << SDRAM_TIMING3_TXSNR_EXT_OFFS)	|
+			(tXsrd << SDRAM_TIMING3_TXSRD_OFFS)	|
+			(tXsnr << SDRAM_TIMING3_TXSNR_OFFS)		|
+			(tXards << SDRAM_TIMING3_TXARDS_OFFS)	|
+			(tXp << SDRAM_TIMING3_TXP_OFFS));
+}
+
+/*******************************************************************************
+* sdramTimingReg4Calc - Calculate sdram timing register 4
+*
+* DESCRIPTION: 
+*       This function calculates sdram timing register 4
+*       optimized value based on the bank info parameters and the minCas.
+*
+* INPUT:
+*	pBankInfo - sdram bank parameters
+*       busClk    - Bus clock
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       sdram timing reg 4 value.
+*
+*******************************************************************************/
+static MV_U32 sdramTimingReg4Calc(MV_DRAM_BANK_INFO *pBankInfo, 
+                                                MV_U32 minCas, MV_U32 busClk)
+{
+	MV_U32 tCke  = 0;
+	MV_U32 init_cnt = 0;
+	MV_U32 tRwd = 1;
+	MV_U32 rst_cnt  = 0;
+	MV_U32 init_cnt_nop = 0;
+	
+	MV_U32 bankNum;
+	
+	busClk = busClk / 1000000;    /* In MHz */
+
+	/* Extract clock cycles from time parameter. We need to round up
+	 * init_cnt should be 200uSec */
+	init_cnt  = ((busClk * 200) / 1000) + (((busClk * 200)  % 1000) ? 1 : 0);
+	init_cnt = (init_cnt * 1000) >> 10;
+	DB(mvOsPrintf("init_cnt = %d ", init_cnt));
+
+	/* DDR3 only rst_cnt should be 100nSec */
+	rst_cnt  = ((busClk * 100) / 1000) + (((busClk * 100)  % 1000) ? 1 : 0);
+	DB(mvOsPrintf("rst_cnt = %d ", rst_cnt));
+
+	if (MV_REG_READ(SDRAM_CTRL_4_REG) & SDRAM_CTRL4_DTYPE_DDR3)
+	{
+		/* Extract clock cycles from time parameter. We need to round up        */
+		/* JEDEC min reqeirments tCke = MAX(3 tCK, 800 7.5nSec
+		 * 	 			  	   1066 5.625
+		 * 	 			  	   1333 5.625
+		 * 	 			  	   1600 5) */
+		switch (busClk)
+		{
+		case 400:
+			tCke = 7500;
+			break;
+		case 533:
+		case 666:
+			tCke = 5625;
+			break;
+		case 800:
+			tCke = 5000;
+			break;
+		}
+		tCke  = ((busClk * tCke)  / 1000000) + (((busClk * tCke)  % 1000000) ? 1 : 0);
+		tMod = MV_MAX(tCke, 3);
+		DB(mvOsPrintf("tCke = %d ", tCke));
+
+	 	/* init_cnt should be 500uSec */
+		init_cnt_nop  = ((busClk * 500) / 1000) + (((busClk * 500)  % 1000) ? 1 : 0);
+		init_cnt_nop = (init_cnt_nop * 1000) >> 10;
+		DB(mvOsPrintf("init_cnt_nop = %d ", init_cnt_nop));
+	}
+	else if (MV_REG_READ(SDRAM_CTRL_4_REG) & SDRAM_CTRL4_DTYPE_DDR2)
+	{
+	
+		/* Extract clock cycles from time parameter. We need to round up        */
+		/* JEDEC min reqeirments tCke = 3tCK */
+		tCke = 3;
+		DB(mvOsPrintf("tCke = %d ", tCke));
+
+	 	/* init_cnt should be 400nSec */
+		init_cnt_nop  = ((busClk * 400) / 1000) + (((busClk * 400)  % 1000) ? 1 : 0);
+		init_cnt_nop = init_cnt_nop >> 10;
+		DB(mvOsPrintf("init_cnt_nop = %d ", init_cnt_nop));
+	}
+	else
+	{    
+		/* TODO */
+		DB(mvOsPrintf("LP DDR1"));
+	}
+	
+	return ((tCke << SDRAM_TIMING4_TCKE_OFFS)	|
+			(init_cnt << SDRAM_TIMING4_INIT_COUNT_OFFS)	|
+			(tRwd << SDRAM_TIMING4_TRWD_EXT_OFFS)	|
+			(rst_cnt << SDRAM_TIMING4_REST_COUNT_OFFS)		|
+			(init_cnt_nop << SDRAM_TIMING4_INIT_COUNT_NOP_OFFS));
+}
+
+/*******************************************************************************
+* sdramTimingReg5Calc - Calculate sdram timing register 5
+*
+* DESCRIPTION: 
+*       This function calculates sdram timing register 5
+*       optimized value based on the bank info parameters and the minCas.
+*
+* INPUT:
+*	pBankInfo - sdram bank parameters
+*       busClk    - Bus clock
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       sdram timing reg 5 value.
+*
+*******************************************************************************/
+static MV_U32 sdramTimingReg5Calc(MV_DRAM_BANK_INFO *pBankInfo, 
+                                                MV_U32 minCas, MV_U32 busClk)
+{
+	MV_U32 tRas  = 0;
+	MV_U32 tFaw = 0;
+	MV_U32 tCcd_ccs = 1;
+	MV_U32 page_size = 0;
+	
+	busClk = busClk / 1000000;    /* In MHz */
+
+	/* Extract clock cycles from time parameter. We need to round up */
+
+        tRas = pBankInfo.minRasPulseWidth;
+	tRas  = ((busClk * tRas) / 1000) + (((busClk * tRas)  % 1000) ? 1 : 0);
+	DB(mvOsPrintf("tRas = %d ", tRas));
+
+	/* page size is 2^COL * device_width/8 */
+	page_size  = 1 << pBankInfo.numOfColAddr;
+	page_size  *=  (pBankInfo.sdramWidth/8);
+	DB(mvOsPrintf("page_size = %d ", page_size));
+
+	if (MV_REG_READ(SDRAM_CTRL_4_REG) & SDRAM_CTRL4_DTYPE_DDR3)
+	{
+		/* Extract clock cycles from time parameter. We need to round up        */
+		tFaw  = pBankInfo.minFourActiveWinDelay;
+		tFaw  = ((busClk * tFaw) / 1000) + (((busClk * tFaw)  % 1000) ? 1 : 0);
+		DB(mvOsPrintf("tFaw = %d ", tFaw));
+	}
+	else if (MV_REG_READ(SDRAM_CTRL_4_REG) & SDRAM_CTRL4_DTYPE_DDR2)
+	{
+	
+		/* Extract clock cycles from time parameter. We need to round up        */
+		/* JEDEC min reqeirments tFaw = 37.5n 1K page size
+		 *  				50n 2K page size */
+		switch(page_size)
+		{
+		case _1K:
+			tFaw = 375;
+			break;
+		case _2K:
+			tFaw = 500;
+			break;
+		}
+		tFaw  = ((busClk * tFaw) / 10000) + (((busClk * tFaw)  % 10000) ? 1 : 0);
+		DB(mvOsPrintf("tFaw = %d ", tFaw));
+	}
+	else
+	{    
+		/* TODO */
+		DB(mvOsPrintf("LP DDR1"));
+	}
+	
+	return ((tRas << SDRAM_TIMING5_TRAS_OFFS)	|
+			(tFaw << SDRAM_TIMING5_TFAW_OFFS)	|
+			(tCcd_ccs << SDRAM_TIMING5_TCCD_CCS_EXT_OFFS));
+}
+/*******************************************************************************
+* sdramTimingReg6Calc - Calculate sdram timing register 6
+*
+* DESCRIPTION: 
+*       This function calculates sdram timing register 6
+*       optimized value based on the bank info parameters and the minCas.
+*
+* INPUT:
+*	pBankInfo - sdram bank parameters
+*       busClk    - Bus clock
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       sdram timing reg 6 value.
+*
+*******************************************************************************/
+static MV_U32 sdramTimingReg6Calc(MV_DRAM_BANK_INFO *pBankInfo, 
+                                                MV_U32 minCas, MV_U32 busClk)
+{
+	/* JEDEC min reqeirments tZqcs= 64 tCK */
+	MV_U32 tZqcs  = 64;
+	/* JEDEC min reqeirments tZqoper= 256 tCK */
+	MV_U32 tZqoper = 256;
+	/* JEDEC min reqeirments tZqinit= 512 tCK */
+	MV_U32 tZqinit = 512;
+	
+	return ((tZqcs << SDRAM_TIMING6_TZQCS_OFFS)	|
+			(tZqoper << SDRAM_TIMING6_TZQOPER_OFFS)	|
+			(tZqinit << SDRAM_TIMING5_TZQINIT_OFFS));
+}
+
+/*******************************************************************************
+* sdramPopulateBanks - Return SDRAM bank population.
+*
+* DESCRIPTION: 
+*		
+* INPUT:
+*		pBankInfo - bank info parameters.
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       0x0 - 0xF bitmap for populated bank.
+*******************************************************************************/
+static MV_U32 sdramPopulateBanks(MV_DRAM_BANK_INFO *pBankInfo)
+{
+	MV_U32 populateBanks = 0;
+	int bankNum;
+	
+	/* Represent the populate banks in binary form */
+	for(bankNum = 0; bankNum < MV_DRAM_MAX_CS; bankNum++)
+	{
+		if (0 != pBankInfo[bankNum].size)
+		{
+				populateBanks |= (1 << bankNum);
+		}
+	}
+	
+	return populateBanks;
+}
+	
+/*******************************************************************************
+* sdramDDrOdtConfig - Set DRAM DDR3/2 On Die Termination registers.
+*
+* DESCRIPTION: 
+*       This function config DDR2 On Die Termination (ODT) registers.
+*	ODT configuration is done according to DIMM presence:
+*	
+*       Presence	  Ctrl Low    Ctrl High  Dunit Ctrl   Ext Mode  
+*	CS0	         0x84210000  0x00000000  0x0000780F  0x00000440 
+*	CS0+CS1          0x84210000  0x00000000  0x0000780F  0x00000440 
+*	CS0+CS2	    	 0x030C030C  0x00000000  0x0000740F  0x00000404 
+*	CS0+CS1+CS2	 0x030C030C  0x00000000  0x0000740F  0x00000404 
+*	CS0+CS2+CS3	 0x030C030C  0x00000000  0x0000740F  0x00000404 
+*	CS0+CS1+CS2+CS3  0x030C030C  0x00000000  0x0000740F  0x00000404 
+*		
+* INPUT:
+*		pBankInfo - bank info parameters.
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       None
+*******************************************************************************/
+static void sdramDDrOdtConfig(MV_DRAM_BANK_INFO *pBankInfo)
+{
+	MV_U32 populateBanks = 0;
+	MV_U32 sdramCtrl6, sdramCtrl7;
+	int bankNum;
+	
+	/* Represent the populate banks in binary form */
+	populateBanks = sdramPopulateBanks(pBankInfo);
+	
+	switch(populateBanks)
+	{
+		case(BANK_PRESENT_CS0):
+		case(BANK_PRESENT_CS0_CS1):
+			sdramCtrl6   = DDR_ODT_CTRL_LOW_CS0_DV;
+			sdramCtrl7  = DDR_ODT_CTRL_HIGH_CS0_DV;
+			break;
+		default:
+			mvOsPrintf("sdramDDrOdtConfig: Invalid DRAM bank presence\n");
+			return;
+	} 
+	MV_REG_WRITE(DRAM_BUF_REG7, sdramCtrl6);
+	MV_REG_WRITE(DRAM_BUF_REG8, sdramCtrl7);
+	return;
+}
+#endif /* defined(MV_INC_BOARD_DDIM) */
+
+/*******************************************************************************
+* mvDramIfWinSet - Set DRAM interface address decode window
+*
+* DESCRIPTION: 
+*       This function sets DRAM interface address decode window.
+*
+* INPUT:
+*	    target      - System target. Use only SDRAM targets.
+*       pAddrDecWin - SDRAM address window structure.
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       MV_BAD_PARAM if parameters are invalid or window is invalid, MV_OK
+*       otherwise.
+*******************************************************************************/
+MV_STATUS mvDramIfWinSet(MV_TARGET target, MV_DRAM_DEC_WIN *pAddrDecWin)
+{
+	MV_U32 baseReg=0;
+	MV_U32 baseToReg=0 , sizeToReg=0;
+
+    /* Check parameters */
+	if (!MV_TARGET_IS_DRAM(target))
+	{
+		mvOsPrintf("mvDramIfWinSet: target %d is not SDRAM\n", target);
+		return MV_BAD_PARAM;
+	}
+
+    /* Check if the requested window overlaps with current enabled windows	*/
+    if (MV_TRUE == sdramIfWinOverlap(target, &pAddrDecWin->addrWin))
+	{
+        mvOsPrintf("mvDramIfWinSet: ERR. Target %d overlaps\n", target);
+		return MV_BAD_PARAM;
+	}
+#if 0
+	/* check if address is aligned to the size */
+	if(MV_IS_NOT_ALIGN(pAddrDecWin->addrWin.baseLow, pAddrDecWin->addrWin.size))
+	{
+		mvOsPrintf("mvDramIfWinSet:Error setting DRAM interface window %d."\
+				   "\nAddress 0x%08x is unaligned to size 0x%x.\n",
+                   target, 
+				   pAddrDecWin->addrWin.baseLow,
+				   pAddrDecWin->addrWin.size);
+		return MV_ERROR;
+	}
+#endif
+
+	/* read base register*/
+	baseReg = MV_REG_READ(SDRAM_MEM_MAP_REG(target));
+
+	/* BaseLow[31:23] => base register [31:23]		*/
+	baseToReg = pAddrDecWin->addrWin.baseLow & SDRAM_MMAP_BASE_MASK;
+
+	/* Write to address decode Base Address Register                  */
+	baseReg &= ~SDRAM_MMAP_BASE_MASK;
+	baseReg |= baseToReg;
+
+	/* Translate the given window size to register format			*/
+	switch(pAddrDecWin->addrWin.size)
+	{
+	case _8M:
+		sizeToReg = 0x7;
+		break;
+	case _16M:
+		sizeToReg = 0x8;
+		break;
+	case _32M:
+		sizeToReg = 0x9;
+		break;
+	case _64M:
+		sizeToReg = 0xA;
+		break;
+	case _128M:
+		sizeToReg = 0xB;
+		break;
+	case _256M:
+		sizeToReg = 0xC;
+		break;
+	case _512M:
+		sizeToReg = 0xD;
+		break;
+	case _1G:
+		sizeToReg = 0xE;
+		break;
+	case _2G:
+		sizeToReg = 0xF;
+		break;
+	}
+
+	/* Size parameter validity check.                                   */
+	if (-1 == sizeToReg)
+	{
+		mvOsPrintf("mvDramIfWinSet: ERR. Win %d size invalid.\n",target);
+		return MV_BAD_PARAM;
+	}
+
+	/* set size */
+	baseReg &= ~DRAM_MMAP_SIZE_MASK;
+	/* Size is located at upper 16 bits */
+	baseReg |= (sizeToReg << SDRAM_MMAP_SIZE_OFFS);
+
+	/* enable/Disable */
+	if (MV_TRUE == pAddrDecWin->enable)
+	{
+		baseReg |= SDRAM_MMAP_WIN_EN;
+	}
+	else
+	{
+		baseReg &= ~SDRAM_MMAP_WIN_EN;
+	}
+
+	/* 3) Write to address decode Base Address Register                   */
+	MV_REG_WRITE(SDRAM_MEM_MAP_REG(target), baseReg);
+
+	return MV_OK;
+}
+/*******************************************************************************
+* mvDramIfWinGet - Get DRAM interface address decode window
+*
+* DESCRIPTION: 
+*       This function gets DRAM interface address decode window.
+*
+* INPUT:
+*	    target - System target. Use only SDRAM targets.
+*
+* OUTPUT:
+*       pAddrDecWin - SDRAM address window structure.
+*
+* RETURN:
+*       MV_BAD_PARAM if parameters are invalid or window is invalid, MV_OK
+*       otherwise.
+*******************************************************************************/
+MV_STATUS mvDramIfWinGet(MV_TARGET target, MV_DRAM_DEC_WIN *pAddrDecWin)
+{
+	MV_U32 baseReg;
+	MV_U32 sizeRegVal;
+
+	/* Check parameters */
+	if (!MV_TARGET_IS_DRAM(target))
+	{
+		mvOsPrintf("mvDramIfWinGet: target %d is Illigal\n", target);
+		return MV_ERROR;
+	}
+
+	/* Read base and size registers */
+	baseReg = MV_REG_READ(SDRAM_MEM_MAP_REG(target));
+
+	/* set size */
+	sizeRegVal = baseReg & DRAM_MMAP_SIZE_MASK;
+	/* Size is located at upper 16 bits */
+	sizeRegVal= (sizeRegVal >> SDRAM_MMAP_SIZE_OFFS);
+
+	/* Translate the given window size to register format			*/
+	switch(sizeRegVal)
+	{
+	case 0x7:
+		pAddrDecWin->addrWin.size = _8M;
+		break;
+	case 0x8:
+		pAddrDecWin->addrWin.size = _16M;
+		break;
+	case 0x9:
+		pAddrDecWin->addrWin.size = _32M;
+		break;
+	case 0xA:
+		pAddrDecWin->addrWin.size = _64M;
+		break;
+	case 0xB:
+		pAddrDecWin->addrWin.size = _128M;
+		break;
+	case 0xC:
+		pAddrDecWin->addrWin.size = _256M;
+		break;
+	case 0xD:
+		pAddrDecWin->addrWin.size = _512M;
+		break;
+	case 0xE:
+		pAddrDecWin->addrWin.size = _1G;
+		break;
+	case 0xF:
+		pAddrDecWin->addrWin.size = _2G;
+		break;
+	}
+
+    	/* Check if ctrlRegToSize returned OK */
+	if (-1 == pAddrDecWin->addrWin.size)
+	{
+		mvOsPrintf("mvDramIfWinGet: size of target %d is Illigal\n", target);
+		return MV_ERROR;
+	}
+
+	/* Extract base address						*/
+	/* Base register [31:23] ==> baseLow[31:23] 		*/
+	pAddrDecWin->addrWin.baseLow = baseReg & SDRAM_MMAP_BASE_MASK;
+
+	pAddrDecWin->addrWin.baseHigh =  0;
+
+
+	if (baseReg & SDRAM_MMAP_WIN_EN)
+	{
+		pAddrDecWin->enable = MV_TRUE;
+	}
+	else
+	{
+		pAddrDecWin->enable = MV_FALSE;			
+	}
+
+	return MV_OK;
+}
+/*******************************************************************************
+* mvDramIfWinEnable - Enable/Disable SDRAM address decode window
+*
+* DESCRIPTION: 
+*		This function enable/Disable SDRAM address decode window.
+*
+* INPUT:
+*	    target - System target. Use only SDRAM targets.
+*
+* OUTPUT:
+*		None.
+*
+* RETURN:
+*		MV_ERROR in case function parameter are invalid, MV_OK otherewise.
+*
+*******************************************************************************/
+MV_STATUS mvDramIfWinEnable(MV_TARGET target,MV_BOOL enable)
+{
+	MV_DRAM_DEC_WIN 	addrDecWin;
+
+	/* Check parameters */
+	if (!MV_TARGET_IS_DRAM(target))
+	{
+		mvOsPrintf("mvDramIfWinEnable: target %d is Illigal\n", target);
+		return MV_ERROR;
+	}
+
+	if (enable == MV_TRUE) 
+	{   /* First check for overlap with other enabled windows				*/
+		if (MV_OK != mvDramIfWinGet(target, &addrDecWin))
+		{
+			mvOsPrintf("mvDramIfWinEnable:ERR. Getting target %d failed.\n", 
+                                                                        target);
+			return MV_ERROR;
+		}
+		/* Check for overlapping */
+		if (MV_FALSE == sdramIfWinOverlap(target, &(addrDecWin.addrWin)))
+		{
+			/* No Overlap. Enable address decode winNum window              */
+			MV_REG_BIT_SET(SDRAM_MEM_MAP_REG(target), SDRAM_MMAP_WIN_EN);
+		}
+		else
+		{   /* Overlap detected	*/
+			mvOsPrintf("mvDramIfWinEnable: ERR. Target %d overlap detect\n",
+                                                                        target);
+			return MV_ERROR;
+		}
+	}
+	else
+	{   /* Disable address decode winNum window                             */
+		MV_REG_BIT_RESET(SDRAM_MEM_MAP_REG(target), SDRAM_MMAP_WIN_EN);
+	}
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* sdramIfWinOverlap - Check if an address window overlap an SDRAM address window
+*
+* DESCRIPTION:
+*		This function scan each SDRAM address decode window to test if it 
+*		overlapps the given address windoow 
+*
+* INPUT:
+*       target      - SDRAM target where the function skips checking.
+*       pAddrDecWin - The tested address window for overlapping with 
+*					  SDRAM windows.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE if the given address window overlaps any enabled address
+*       decode map, MV_FALSE otherwise.
+*
+*******************************************************************************/
+static MV_BOOL sdramIfWinOverlap(MV_TARGET target, MV_ADDR_WIN *pAddrWin)
+{
+	MV_TARGET	targetNum;
+	MV_DRAM_DEC_WIN 	addrDecWin;
+	
+	for(targetNum = SDRAM_CS0; targetNum < MV_DRAM_MAX_CS ; targetNum++)
+	{
+		/* don't check our winNum or illegal targets */
+		if (targetNum == target)
+		{
+			continue;
+		}
+		
+		/* Get window parameters 	*/
+		if (MV_OK != mvDramIfWinGet(targetNum, &addrDecWin))
+		{
+			mvOsPrintf("sdramIfWinOverlap: ERR. TargetWinGet failed\n");
+			return MV_ERROR;
+		}
+	
+		/* Do not check disabled windows	*/
+		if (MV_FALSE == addrDecWin.enable)
+		{
+			continue;
+		}
+	
+		if(MV_TRUE == mvWinOverlapTest(pAddrWin, &addrDecWin.addrWin))
+		{                    
+			mvOsPrintf(
+			"sdramIfWinOverlap: Required target %d overlap winNum %d\n", 
+			target, targetNum);
+			return MV_TRUE;           
+		}
+	}
+	
+	return MV_FALSE;
+}
+
+/*******************************************************************************
+* mvDramIfBankSizeGet - Get DRAM interface bank size.
+*
+* DESCRIPTION:
+*       This function returns the size of a given DRAM bank.
+*
+* INPUT:
+*       bankNum - Bank number.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       DRAM bank size. If bank is disabled the function return '0'. In case 
+*		or paramter is invalid, the function returns -1.
+*
+*******************************************************************************/
+MV_32 mvDramIfBankSizeGet(MV_U32 bankNum)
+{
+    MV_DRAM_DEC_WIN 	addrDecWin;
+	
+	/* Check parameters */
+	if (!MV_TARGET_IS_DRAM(bankNum))
+	{
+		mvOsPrintf("mvDramIfBankBaseGet: bankNum %d is invalid\n", bankNum);
+		return -1;
+	}
+	/* Get window parameters 	*/
+	if (MV_OK != mvDramIfWinGet(bankNum, &addrDecWin))
+	{
+		mvOsPrintf("sdramIfWinOverlap: ERR. TargetWinGet failed\n");
+		return -1;
+	}
+	
+	if (MV_TRUE == addrDecWin.enable)
+	{
+		return addrDecWin.addrWin.size;
+	}
+	else
+	{
+		return 0;
+	}
+}
+
+
+/*******************************************************************************
+* mvDramIfSizeGet - Get DRAM interface total size.
+*
+* DESCRIPTION:
+*       This function get the DRAM total size.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       DRAM total size. In case or paramter is invalid, the function 
+*		returns -1.
+*
+*******************************************************************************/
+MV_32 mvDramIfSizeGet(MV_VOID)
+{
+	MV_U32 totalSize = 0, bankSize = 0, bankNum;
+	
+	for(bankNum = 0; bankNum < MV_DRAM_MAX_CS; bankNum++)
+	{
+		bankSize = mvDramIfBankSizeGet(bankNum);
+
+		if (-1 == bankSize)
+		{
+			mvOsPrintf("Dram: mvDramIfSizeGet error with bank %d \n",bankNum);
+			return -1;
+		}
+		else
+		{
+			totalSize += bankSize;
+		}
+	}
+	
+	DB(mvOsPrintf("Dram: Total DRAM size is 0x%x \n",totalSize));
+	
+	return totalSize;
+}
+
+/*******************************************************************************
+* mvDramIfBankBaseGet - Get DRAM interface bank base.
+*
+* DESCRIPTION:
+*       This function returns the 32 bit base address of a given DRAM bank.
+*
+* INPUT:
+*       bankNum - Bank number.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       DRAM bank size. If bank is disabled or paramter is invalid, the 
+*		function returns -1.
+*
+*******************************************************************************/
+MV_32 mvDramIfBankBaseGet(MV_U32 bankNum)
+{
+    MV_DRAM_DEC_WIN 	addrDecWin;
+	
+	/* Check parameters */
+	if (!MV_TARGET_IS_DRAM(bankNum))
+	{
+		mvOsPrintf("mvDramIfBankBaseGet: bankNum %d is invalid\n", bankNum);
+		return -1;
+	}
+	/* Get window parameters 	*/
+	if (MV_OK != mvDramIfWinGet(bankNum, &addrDecWin))
+	{
+		mvOsPrintf("sdramIfWinOverlap: ERR. TargetWinGet failed\n");
+		return -1;
+	}
+	
+	if (MV_TRUE == addrDecWin.enable)
+	{
+		return addrDecWin.addrWin.baseLow;
+	}
+	else
+	{
+		return -1;
+	}
+}
+
+
+MV_VOID mvIntrfaceWidthPrint(MV_VOID)
+{
+    MV_U32 tmp = (MV_REG_READ(SDRAM_CTRL_4_REG) & SDRAM_CTRL4_DWIDTH_MASK);
+    switch(tmp)
+    {
+	case SDRAM_CTRL4_DWIDTH_16BIT: printf(" 16bit width");
+	    break;
+        case SDRAM_CTRL4_DWIDTH_32BIT: printf(" 32bit width");
+	    break;
+        default: printf(" unknown width ");
+            break;
+    }
+}
+
+MV_VOID mvIntrfaceParamPrint(MV_VOID)
+{
+    MV_U32 rasTmp, tmp;
+
+    printf("DRAM");
+
+	if ((MV_REG_READ(SDRAM_CTRL_4_REG) & SDRAM_CTRL4_DTYPE_MASK) == SDRAM_CTRL4_DTYPE_DDR3)
+	{
+    		switch(MV_REG_READ(SDRAM_CTRL_4_REG) & SDRAM_CTRL4_CL_MASK)
+    		{
+			case SDRAM_DDR3_CL_5: printf(" CAS Latency = 5");
+	    		break;
+        		case SDRAM_DDR3_CL_6: printf(" CAS Latency = 6");
+	    		break;
+        		case SDRAM_DDR3_CL_7: printf(" CAS Latency = 7");
+            		break;
+        		case SDRAM_DDR3_CL_8: printf(" CAS Latency = 8");
+            		break;
+        		case SDRAM_DDR3_CL_9: printf(" CAS Latency = 9");
+	    		break;
+        		case SDRAM_DDR3_CL_10: printf(" CAS Latency = 10");
+            		break;
+        		case SDRAM_DDR3_CL_11: printf(" CAS Latency = 11");
+            		break;
+
+        		default: printf(" unknown CAL ");
+            		break;
+    		}
+	}
+	else if ((MV_REG_READ(SDRAM_CTRL_4_REG) & SDRAM_CTRL4_DTYPE_MASK) == SDRAM_CTRL4_DTYPE_DDR2)
+	{
+    		switch(MV_REG_READ(SDRAM_CTRL_4_REG) & SDRAM_CTRL4_CL_MASK)
+    		{
+			case SDRAM_DDR2_CL_3: printf(" CAS Latency = 3");
+	    		break;
+        		case SDRAM_DDR2_CL_4: printf(" CAS Latency = 4");
+	    		break;
+        		case SDRAM_DDR2_CL_5: printf(" CAS Latency = 5");
+            		break;
+        		case SDRAM_DDR2_CL_6: printf(" CAS Latency = 6");
+            		break;
+        		default: printf(" unknown CAL ");
+            		break;
+    		}
+	}
+
+	tmp = MV_REG_READ(SDRAM_TIMING_2_REG);
+
+    	rasTmp = MV_REG_READ(SDRAM_TIMING_5_REG);
+    
+	printf(" tRP = %d tRAS = %d tRCD = %d\n",
+           	((tmp & SDRAM_TIMING2_TRP_MASK) >> SDRAM_TIMING2_TRP_OFFS), 
+		((rasTmp & SDRAM_TIMING5_TRAS_MASK) >> SDRAM_TIMING5_TRAS_OFFS), 
+		((tmp & SDRAM_TIMING2_TRCD_MASK) >> SDRAM_TIMING2_TRCD_OFFS));
+}
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddrmc/mvDramTmng.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddrmc/mvDramTmng.c
@@ -0,0 +1,491 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+/* includes */
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "ctrlEnv/mvCtrlEnvRegs.h"
+#include "mvSysDdrConfig.h"
+#include "mvDramIfConfig.h"
+#include "mvDramIfRegs.h"
+#include "../mvDramIf.h"
+
+#warning "Fix this include...."
+#include "pmu/mvPmuRegs.h"
+#include <asm/setup.h>
+
+#if defined (CONFIG_PM) && defined (CONFIG_ARCH_DOVE)
+
+/* DDR speed to mask map table */
+MV_U32 ddr_freq_mask[][2] = {{100, MV_DDR_100},
+			     {133, MV_DDR_133},
+			     {167, MV_DDR_167},
+			     {200, MV_DDR_200},
+			     {233, MV_DDR_233},
+			     {250, MV_DDR_250},
+			     {267, MV_DDR_267},
+			     {333, MV_DDR_333},
+			     {400, MV_DDR_400},
+			     {500, MV_DDR_500},
+			     {533, MV_DDR_533},
+			     };
+#define MV_DRAM_FREQ_MASK_CNT	(sizeof(ddr_freq_mask)/sizeof(ddr_freq_mask[0]))
+
+/* Mandatory DDR reconfig configurations */
+MV_DDR_MC_PARAMS ddr_reconfig[]={{0x00120, 0x03000100},	/* Load Mode Register */
+			         {0x00120, 0x03000200},	/* load Extended Mode Register */
+				 };
+#define MV_DRAM_RECONFIG_CNT	(sizeof(ddr_reconfig)/sizeof(ddr_reconfig[0]))
+
+extern MV_DRAM_INIT 	mv_dram_init_info;
+extern u32		mv_dram_init_valid;
+
+/*******************************************************************************
+* mvDramIfParamCountGet - Get the number of Addr/Value configuration needed 
+*			  to init the DDR
+*
+* DESCRIPTION:
+*       Get the number of Addr/Value configuration needed to init the DDR
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       Number of Address Value couples
+*
+*******************************************************************************/
+MV_U32 mvDramIfParamCountGet(MV_VOID)
+{
+	MV_U32 cnt=0;
+	MV_U32 hdr;
+
+	if (!mv_dram_init_valid)
+	{
+		mvOsPrintf("Warning: DRAM Initialization Parameters Not Found (Check Tags)!");	
+		return 0;
+	}
+
+	/* scan all available frequencies and decide MAX parameters count */
+	for (hdr = 0; hdr < MV_DRAM_HEADERS_CNT; hdr++) {
+		if (mv_dram_init_info.dram_init_ctrl[hdr].freq_mask != 0) {
+			if (mv_dram_init_info.dram_init_ctrl[hdr].size > cnt) {				
+				cnt = mv_dram_init_info.dram_init_ctrl[hdr].size;
+			}
+		}
+	}
+
+	/* Add the FIXED count used for LMR and ELMR */
+	cnt += MV_DRAM_RECONFIG_CNT;
+
+	/* Add 1 entry for the DLL reset clearing in DDR reconfig */
+	cnt++;
+
+	return cnt;
+}
+
+/*******************************************************************************
+* mvDramIfParamFill - Fill in the Address/Value couples
+*
+* DESCRIPTION:
+*       This function fills in the addr/val couples needed to init the DDR
+*       controller based on the requesed frequency
+*
+* INPUT:
+*       ddrFreq - Target frequency
+*
+* OUTPUT:
+*	params - pointer to the first addr/value element.
+*	paramcnt - Number of paramters filled in the addr/value array.
+*
+* RETURN:
+*	STATUS
+*
+*******************************************************************************/
+MV_STATUS mvDramIfParamFill(MV_U32 ddrFreq, MV_DDR_MC_PARAMS * params, MV_U32 * paramcnt)
+{
+	MV_U32	reg_index, i, mask;
+
+	/* Check that the Uboot passed valid parameters in the TAG */
+	if (!mv_dram_init_valid) {
+		*paramcnt = 0;
+		mvOsPrintf("Warning: DRAM Initialization Parameters Not Found (Check Tags)!");
+		return MV_FAIL;
+	}
+	
+	/* Lookup the appropriate frequency mask */
+	for (i=0; i<MV_DRAM_FREQ_MASK_CNT; i++) {
+		if (ddr_freq_mask[i][0] == ddrFreq) {
+			mask = ddr_freq_mask[i][1];
+			break;
+		}
+	}
+
+	/* Verify that the mask was found in the lookup table */
+	if (i == MV_DRAM_FREQ_MASK_CNT) {
+		*paramcnt = 0;
+		return MV_FAIL;
+	}
+
+	/* Lookup the configurations entry in the table */
+	for (i=0; i<MV_DRAM_HEADERS_CNT; i++) {
+		if (mv_dram_init_info.dram_init_ctrl[i].freq_mask & mask) {
+			reg_index = mv_dram_init_info.dram_init_ctrl[i].start_index;
+			*paramcnt = mv_dram_init_info.dram_init_ctrl[i].size;
+			break;
+		}
+	}
+
+	/* Check if frequency is not available OR zero configurations */
+	if ((i == MV_DRAM_HEADERS_CNT) || (*paramcnt == 0))
+		return MV_FAIL;
+
+	/* Copy the parameters in 32bit access */
+	for (i=0; i<*paramcnt; i++) {
+		params->addr = ((mv_dram_init_info.reg_init[reg_index].reg_addr & 0x00FFFFFF) | DOVE_SB_REGS_HW_DEF_PHYS_BASE);
+		params->val = mv_dram_init_info.reg_init[reg_index].reg_value;
+		reg_index++;
+		params++;
+	}
+
+	return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvDramReconfigParamFill - Fill in the Address/Value couples
+*
+* DESCRIPTION:
+*       This function fills in the addr/val couples needed to init the DDR
+*       controller based on the requesed frequency
+*
+* INPUT:
+*       ddrFreq - Target frequency
+*	cpuFreq - cpu frequency to calculate Timing against
+*
+* OUTPUT:
+*	params - pointer to the first addr/value element.
+*	paramcnt - Number of paramters filled in the addr/value array.
+*
+* RETURN:
+*	STATUS
+*
+*******************************************************************************/
+MV_STATUS mvDramReconfigParamFill(MV_U32 ddrFreq, MV_U32 cpuFreq, MV_DDR_MC_PARAMS * params, MV_U32 * paramcnt)
+{
+	MV_U32 reg_index, i, mask;
+	MV_U32 dll_rst = 0;
+
+	/* Check that the Uboot passed valid parameters in the TAG */
+	if (!mv_dram_init_valid) {
+		*paramcnt = 0;
+		mvOsPrintf("Warning: DRAM Initialization Parameters Not Found (Check Tags)!");
+		return MV_FAIL;
+	}
+	
+	/* Lookup the appropriate frequency mask */
+	for (i=0; i<MV_DRAM_FREQ_MASK_CNT; i++) {
+		if (ddr_freq_mask[i][0] == ddrFreq) {
+			mask = ddr_freq_mask[i][1];
+			break;
+		}
+	}
+
+	/* Verify that the mask was found in the lookup table */
+	if (i == MV_DRAM_FREQ_MASK_CNT) {
+		*paramcnt = 0;
+		return MV_FAIL;
+	}
+
+	/* Lookup the configurations entry in the table */
+	for (i=0; i<MV_DRAM_HEADERS_CNT; i++) {
+		if (mv_dram_init_info.dram_init_ctrl[i].freq_mask & mask) {
+			reg_index = mv_dram_init_info.dram_init_ctrl[i].start_index;
+			*paramcnt = mv_dram_init_info.dram_init_ctrl[i].size;
+			break;
+		}
+	}
+
+	/* Check if frequency is not available OR zero configurations */
+	if ((i == MV_DRAM_HEADERS_CNT) || (*paramcnt == 0))
+		return MV_FAIL;
+
+	/* Drop the last line with the DDR init trigger - replaced with LMR and LEMR */
+	(*paramcnt)--;
+
+	/* Firt copy the parameters in 32bit access */
+	for (i=0; i<*paramcnt; i++) {
+		params->addr = (mv_dram_init_info.reg_init[reg_index].reg_addr & 0xFFFFF); /* offset only */
+		params->val = mv_dram_init_info.reg_init[reg_index].reg_value;
+                if (params->addr == 0x80)
+                {
+                        dll_rst = params->val;
+                        params->val |= 0x40;		/* Add DLL reset */
+ 		}
+		reg_index++;
+		params++;
+	}
+
+	/* Finally add the DRAM reinit couples */
+	for (i=0; i<MV_DRAM_RECONFIG_CNT; i++) {
+		params->addr = ddr_reconfig[i].addr;
+		params->val = ddr_reconfig[i].val;
+		params++;
+	}
+
+	/* Add the DLL reset deasser */
+	params->addr = 0x80;
+	params->val = dll_rst;
+
+	/* Add the count of LMR and LEMR registers count + DLL reset clearing */
+	*paramcnt += (MV_DRAM_RECONFIG_CNT + 1);
+
+	return MV_OK;	
+}
+
+
+/*******************************************************************************
+* mvDramInitPollAmvFill - Fill in the Address/Mask/Value 
+*
+* DESCRIPTION:
+*       This function fills in the addr/mask/val needed to poll the DDR
+*       init done
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*	amv - address/mask/value for the DDR init done register.
+*		amv->addr: Physical adddress of the init done register
+*		amv->mask: Bit mask to poll for init done
+*		amv->val: Value expected after the mask.
+*
+* RETURN:
+*	STATUS
+*
+*******************************************************************************/
+MV_STATUS mvDramInitPollAmvFill(MV_DDR_INIT_POLL_AMV * amv)
+{
+	amv->addr = (DOVE_SB_REGS_HW_DEF_PHYS_BASE | SDRAM_STATUS_REG);
+	amv->mask = SDRAM_STATUS_INIT_DONE_MASK;
+	amv->val = SDRAM_STATUS_INIT_DONE;
+
+	return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvDramInitMresetMvFill - Fill in the M_RESET mask bit clear Address/Mask
+*
+* DESCRIPTION:
+*       This function fills in the addr/mask needed to clear the M_RESET and CKE
+*       masking at the DDR phy level
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*	am - address/mask
+*		amv->addr: Physical adddress of the init done register
+*		amv->mask: Bit mask to poll for init done
+*
+* RETURN:
+*	STATUS
+*
+*******************************************************************************/
+MV_STATUS mvDramInitMresetMvFill(MV_DDR_BIT_CLR_AM * am)
+{
+	am->addr = (DOVE_SB_REGS_HW_DEF_PHYS_BASE | PMU_PWR_SUPLY_CTRL_REG);
+	am->mask = PMU_PWR_DDR_PHY_RST_MSK_MASK;
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvDramWlValGet - Read from the H/W the DDR3 WL results
+*
+* DESCRIPTION:
+*       Read from the H/W the DDR3 WL results
+*
+* INPUT:
+*       CS#: 0 or 1
+*
+* OUTPUT:
+*	None
+*
+* RETURN:
+*	WL value for all 4 lanes
+*
+*******************************************************************************/
+static MV_U32 mvDramWlValGet(MV_U32 cs_num)
+{
+	MV_U32 reg;
+	MV_U32 wl_val;
+	MV_U32 cs_offs;
+
+	if (cs_num)
+		cs_offs = SDRAM_PHY_CTRL_WLS_CS_1;
+	else
+		cs_offs = SDRAM_PHY_CTRL_WLS_CS_0;
+
+	/* Obtain WL values for CS0 */
+	wl_val = 0;
+	MV_REG_WRITE(SDRAM_PHY_CTRL_WLS_REG, (cs_offs | SDRAM_PHY_CTRL_WLS_BS_L0));
+	reg = MV_REG_READ(SDRAM_PHY_CTRL_WLC_REG);
+	wl_val |= ((reg & 0xFF) << 0);
+	MV_REG_WRITE(SDRAM_PHY_CTRL_WLS_REG, (cs_offs | SDRAM_PHY_CTRL_WLS_BS_L1));
+	reg = MV_REG_READ(SDRAM_PHY_CTRL_WLC_REG);
+	wl_val |= ((reg & 0xFF) << 8);
+	MV_REG_WRITE(SDRAM_PHY_CTRL_WLS_REG, (cs_offs | SDRAM_PHY_CTRL_WLS_BS_L2));
+	reg = MV_REG_READ(SDRAM_PHY_CTRL_WLC_REG);
+	wl_val |= ((reg & 0xFF) << 16);
+	MV_REG_WRITE(SDRAM_PHY_CTRL_WLS_REG, (cs_offs | SDRAM_PHY_CTRL_WLS_BS_L3));
+	reg = MV_REG_READ(SDRAM_PHY_CTRL_WLC_REG);
+	wl_val |= ((reg & 0xFF) << 24);
+
+	return wl_val;
+}
+
+/*******************************************************************************
+* mvDramInitDdr3wlTypeFill - Fill in the Type of DDR3
+*
+* DESCRIPTION:
+*       This function fills in the DDR3 type based on the SAR
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*	typ->type: DDR3 type [0x0] DDR2 [0x1] DDR3 1CS [0x2] DDR3 2CS
+*
+* RETURN:
+*	STATUS
+*
+*******************************************************************************/
+MV_STATUS mvDramInitDdr3wlTypeFill(MV_DDR3_WL_TYP * typ)
+{
+	MV_U32 reg;
+	reg = MV_REG_READ(MPP_SAMPLE_AT_RESET_REG0);
+
+	if ((reg & MPP_SAMPLE_AT_RESET_DDR_TYPE_MASK) == MPP_SAMPLE_AT_RESET_DDR_TYPE_DDR3)
+		if (mvDramWlValGet(1) == 0x0)
+			typ->type = MV_DDR3_WL_FIRST_EDGE_1CS;		/* OLD DDR3 WL with single CS */
+		else
+			typ->type = MV_DDR3_WL_FIRST_EDGE_2CS_CPY;	/* OLD DDR3 WL with2 CS (copy 1->2) */
+	else
+		typ->type = MV_DDR3_WL_NONE;				/* DDR2: no need for WL */
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvDramInitDdr3wlSetFill - Fill in the values to set for DDR3 WL
+*
+* DESCRIPTION:
+*       This function fills in the DDR3 WL values to set in resume
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*	CS0,1 WL values per lane
+*
+* RETURN:
+*	STATUS
+*
+*******************************************************************************/
+MV_STATUS mvDramInitDdr3wlSetFill(MV_DDR3_WL_SET_VAL * val)
+{
+	/* Obtain WL values for CS0 */
+	if (mvDramWlValGet(0))
+	{
+		val->cs0_enable = 1;
+		val->cs0_dly_4l = mvDramWlValGet(0);
+	}
+	else /* DDR2 */
+	{
+		val->cs0_enable = 0;
+		val->cs0_dly_4l = 0;
+	}
+
+	/* Obtain WL values for CS1 */
+	if (mvDramWlValGet(1))
+	{
+		val->cs1_enable = 1;
+		val->cs1_dly_4l = mvDramWlValGet(1);
+	}
+	else /* Either DDR2 or CS1 not used */
+	{
+		val->cs1_enable = 0;
+		val->cs1_dly_4l = 0;
+	}
+
+	return MV_OK;
+}
+
+#endif /* #if defined (CONFIG_PM) && defined (CONFIG_ARCH_DOVE) */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddrmc/mvDramIfBasicInit.S
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ddr/ddrmc/mvDramIfBasicInit.S
@@ -0,0 +1,584 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#define MV_ASMLANGUAGE
+#include "mvCommon.h"
+#include "mvOsAsm.h"
+
+#include "mvSysDdrConfig.h"
+#include "mvBoardEnvSpec.h"
+#include "mvDramIfConfig.h"
+#include "mvDramIfRegs.h"
+#include "pci-if/pex/mvPexRegs.h"
+#include "pci-if/pci/mvPciRegs.h"
+#include "mvCtrlEnvSpec.h"
+#include "mvCtrlEnvAsm.h"
+
+/* defines */
+
+#if !defined(MV_INC_BOARD_DDIM)
+.globl dramBoot1
+dramBoot1:
+        .word   0
+
+/******************************************************************************
+*
+*
+*
+*
+*******************************************************************************/
+#if defined(DB_88F6781)
+/* DDR2 MT8HTF12864AY-800E1 333MHz */
+#define STATIC_SDRAM_BANK0_SIZE			0x000D0001
+#define STATIC_SDRAM_BANK1_SIZE			0x000D0000
+#define STATIC_SDRAM_TIMING1	     		0x47160A28
+#define STATIC_SDRAM_TIMING2	     		0x547502B2
+#define STATIC_SDRAM_TIMING3	     		0x20C82EE2
+#define STATIC_SDRAM_TIMING4	     		0x32825050
+#define STATIC_SDRAM_TIMING5     		0x00100111
+#define STATIC_SDRAM_TIMING6			0x00000000
+#define STATIC_SDRAM_CTRL4			0x01014005
+#define STATIC_SDRAM_CTRL6			0x00000201
+#define STATIC_SDRAM_CTRL7			0x0200000A
+#define STATIC_SDRAM_CONFIG0          		0x00042430
+#define STATIC_SDRAM_CONFIG1          		0x0
+
+#endif
+
+	.globl _mvDramIfStaticInit
+_mvDramIfStaticInit:
+
+	mov     r11, LR     		/* Save link register */
+	mov	r10, r2
+
+#if 0
+        /* If we boot from NAND jump to DRAM sddress */
+        mov     r5, #1
+        ldr     r6, =dramBoot1
+        str     r5, [r6]                /* We started executing from DRAM */
+
+        ldr     r6, dramBoot1
+        cmp     r6, #0
+        bne     1f
+#endif
+
+	/* set all dram configuration in temp registers */
+	/* Write to SDRAM timing 1 register */
+	ldr	r6, = STATIC_SDRAM_TIMING1
+	MV_REG_WRITE_ASM(r6, r5, SDRAM_TIMING_1_REG)
+	/* Write to SDRAM timing 2 register */
+	ldr	r6, = STATIC_SDRAM_TIMING2
+	MV_REG_WRITE_ASM(r6, r5, SDRAM_TIMING_2_REG)
+	/* Write to SDRAM timing 3 register */
+	ldr	r6, = STATIC_SDRAM_TIMING3
+	MV_REG_WRITE_ASM(r6, r5, SDRAM_TIMING_3_REG)
+	/* Write to SDRAM timing 4 register */
+	ldr	r6, = STATIC_SDRAM_TIMING4
+	MV_REG_WRITE_ASM(r6, r5, SDRAM_TIMING_4_REG)
+	/* Write to SDRAM timing 5 register */
+	ldr	r6, = STATIC_SDRAM_TIMING5
+	MV_REG_WRITE_ASM(r6, r5, SDRAM_TIMING_5_REG)
+	/* Write to SDRAM timing 6 register */
+	ldr	r6, = STATIC_SDRAM_TIMING6
+	MV_REG_WRITE_ASM(r6, r5, SDRAM_TIMING_6_REG)
+        /* Write SDRAM bank 0 size register */
+	ldr	r6, = STATIC_SDRAM_BANK0_SIZE
+	MV_REG_WRITE_ASM(r6, r5, SDRAM_MEM_MAP_REG(0))
+        /* Write SDRAM bank 1 size register */
+	ldr	r6, = STATIC_SDRAM_BANK1_SIZE
+	MV_REG_WRITE_ASM(r6, r5, SDRAM_MEM_MAP_REG(1))
+        /* Write SDRAM ctrl 6 register */
+	ldr	r6, = STATIC_SDRAM_CTRL6
+	MV_REG_WRITE_ASM(r6, r5, SDRAM_CTRL_6_REG)
+        /* Write SDRAM ctrl 7 register */
+	ldr	r6, = STATIC_SDRAM_CTRL7
+	MV_REG_WRITE_ASM(r6, r5, SDRAM_CTRL_7_REG)
+        /* Write SDRAM config 0 register */
+	ldr	r6, = STATIC_SDRAM_CONFIG0
+	MV_REG_WRITE_ASM(r6, r5, SDRAM_CFG_REG(0))
+        /* Write SDRAM config 1 register */
+	ldr	r6, = STATIC_SDRAM_CONFIG1
+	MV_REG_WRITE_ASM(r6, r5, SDRAM_CFG_REG(1))
+        /* Write SDRAM ctrl 4 register */
+	ldr	r6, = STATIC_SDRAM_CTRL4
+	MV_REG_WRITE_ASM(r6, r5, SDRAM_CTRL_4_REG)
+
+	mov 	sp, #0
+
+        /* SDRAM init */
+        ldr	r6, = SDRAM_USRCMD_INIT;
+        MV_REG_WRITE_ASM(r6, r5, SDRAM_USR_CMD_REG)
+
+	/* Wait for init done */
+        ldr     r1, =(SDRAM_STATUS_REG)
+       
+        /* Make sure its back to normal operation */
+_sdramOpPoll1:        
+        MV_REG_READ_ASM(r6, r1, SDRAM_USR_CMD_REG)
+        cmp     r6, #SDRAM_STATUS_INIT_DONE
+        bne     _sdramOpPoll1
+1:
+	mov 	r2, r10
+	mov     PC, r11         	/* r11 is saved link register */
+
+#else  /* #if !defined(MV_INC_BOARD_DDIM) */
+
+.globl dramBoot1
+dramBoot1:
+        .word   0
+
+/*******************************************************************************
+* mvDramIfBasicInit - Basic initialization of DRAM interface
+*
+* DESCRIPTION:
+*       The function will initialize the DRAM for basic usage. The function
+*       will use the TWSI assembly API to extract DIMM parameters according
+*       to which DRAM interface will be initialized.
+*       The function referes to the following DRAM parameters:
+*       1) DIMM is registered or not.
+*       2) DIMM width detection.
+*       3) DIMM density.
+*
+* INPUT:
+*       r3 - required size for initial DRAM.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*       Note:
+*       r4 holds I2C EEPROM address
+*       r5 holds SDRAM register base address
+*	r7 holds returned values
+*       r8 holds SDRAM various configuration registers value.
+*       r11 holds return function address.
+*******************************************************************************/
+/* Setting the offsets of the I2C registers */
+#define NUM_OF_ROWS_OFFSET            3
+#define NUM_OF_COLS_OFFSET            4
+#define NUM_OF_RANKS		      5
+#define SDRAM_WIDTH_OFFSET           13
+#define NUM_OF_BANKS_OFFSET          17
+#define SUPPORTED_CL_OFFSET          18
+#define DIMM_TYPE_INFO_OFFSET        20         /* DDR2 only    */
+#define SDRAM_MODULES_ATTR_OFFSET    21
+
+#define DRAM_DEV_DENSITY_128M        0x080
+#define DRAM_DEV_DENSITY_256M        0x100
+#define DRAM_DEV_DENSITY_512M        0x200
+       .globl _mvDramIfBasicInit
+       .extern _i2cInit
+
+_mvDramIfBasicInit:
+
+        mov     r11, LR     		/* Save link register */
+
+        mov     r5, #1
+        ldr     r8, =dramBoot1
+        str     r5, [r8]                /* We started executing from DRAM */
+
+        /* If we boot from NAND jump to DRAM sddress */
+        ldr     r8, dramBoot1
+        cmp     r8, #0
+        movne   pc, r11
+
+
+
+        bl      _i2cInit                /* Initialize TWSI master             */
+
+        /* Get default SDRAM Config values */
+        MV_REG_READ_ASM (r8, r5, SDRAM_CONFIG_REG)
+        bic     r8, r8, #SDRAM_DCFG_MASK
+
+        /* Get registered/non registered info from DIMM */
+	bl  	_is_Registered
+        beq     nonRegistered
+
+setRegistered:
+        orr     r8, r8, #SDRAM_REGISTERED   /* Set registered bit(17)         */
+
+nonRegistered:
+	/* Get SDRAM width */
+	bl 	_get_width
+
+        orr     r6, r8, #SDRAM_DCFG_X16_DEV /* x16 devices  */
+        cmp     r7, #16
+        beq     setConfigReg
+
+        orr     r6, r8, #SDRAM_DCFG_X8_DEV  /* x8 devices   */
+        cmp     r7, #8
+        beq     setConfigReg
+
+        /* This is an error. return */
+        b       exit_ddrAutoConfig
+
+setConfigReg:
+        mov     r8, r6
+        ldr     r6, =SDRAM_CONFIG_DV
+        orr     r8, r8, r6              /* Add default settings */
+        mov     r6, r8                  /* Do not swap r8 content */
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_CONFIG_REG)
+
+        /* Set maximum CL supported by DIMM */
+	bl	_get_CAL
+
+        /* r7 is DIMM supported CAS (e.g: 3 --> 0x1C)                         */
+        clz     r6, r7
+        rsb     r6, r6, #31     /* r6 = the bit number of MAX CAS supported   */
+
+        /* Check the DDR version */
+        tst     r8, #SDRAM_DTYPE_DDR2
+        bne     casDdr2
+
+casDdr1:
+        ldr	r7, =3		/* stBurstDel field value	*/
+	ldr     r8, =0x52       /* Assuming MAX CL = 1.5        */
+        cmp     r6, #1          /* If CL = 1.5 break            */
+        beq     setModeReg
+
+        ldr	r7, =3		/* stBurstDel field value	*/
+	ldr     r8, =0x22       /* Assuming MAX CL = 2          */
+        cmp     r6, #2          /* If CL = 2 break              */
+        beq     setModeReg
+
+        ldr	r7, =4		/* stBurstDel field value	*/
+	ldr     r8, =0x62       /* Assuming MAX CL = 2.5        */
+        cmp     r6, #3          /* If CL = 2.5 break            */
+        beq     setModeReg
+
+        ldr	r7, =4		/* stBurstDel field value	*/
+	ldr     r8, =0x32       /* Assuming MAX CL = 3          */
+        cmp     r6, #4          /* If CL = 3 break              */
+        beq     setModeReg
+
+        ldr	r7, =5		/* stBurstDel field value	*/
+	ldr     r8, =0x42       /* Assuming MAX CL = 4          */
+        cmp     r6, #6          /* If CL = 4 break              */
+        b       setModeReg
+
+        b       exit_ddrAutoConfig      /* This is an error !!  */
+
+casDdr2:
+        ldr	r7, =4		/* stBurstDel field value	*/
+	ldr     r8, =0x32      /* Assuming MAX CL = 3           */
+        cmp     r6, #3          /* If CL = 3 break              */
+        beq     casDdr2Cont
+
+        ldr	r7, =5		/* stBurstDel field value	*/
+	ldr     r8, =0x42      /* Assuming MAX CL = 4           */
+        cmp     r6, #4          /* If CL = 4 break              */
+        beq     casDdr2Cont
+
+        /* CL 5 currently unsupported. We use CL 4 instead      */
+        ldr	r7, =5		/* stBurstDel field value	*/
+	ldr     r8, =0x42      /* Assuming MAX CL = 5           */
+        cmp     r6, #5          /* If CL = 5 break              */
+        beq     casDdr2Cont
+
+        b       exit_ddrAutoConfig      /* This is an error !!  */
+casDdr2Cont:
+        /* Write recovery for auto-precharge relevant only in DDR2 */
+        orr     r8, r8, #0x400   /* Default value */
+
+setModeReg:
+        /* The CPU must not attempt to change the SDRAM Mode register setting */
+        /* prior to DRAM controller completion of the DRAM initialization     */
+        /* sequence. To guarantee this restriction, it is recommended that    */
+        /* the CPU sets the SDRAM Operation register to NOP command, performs */
+        /* read polling until the register is back in Normal operation value, */
+        /* and then sets SDRAM Mode register to it's new value.               */
+
+	/* write 'nop' to SDRAM operation */
+        mov     r6, #0x5                 /* 'NOP' command              */
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_OPERATION_REG)
+
+        /* poll SDRAM operation. Make sure its back to normal operation       */
+_sdramOpPoll1:
+        ldr     r6, [r5]
+        cmp     r6, #0                          /* '0' = Normal SDRAM Mode    */
+        bne     _sdramOpPoll1
+
+        /* Now its safe to write new value to SDRAM Mode register             */
+        MV_REG_WRITE_ASM (r8, r5, SDRAM_MODE_REG)
+
+        /* Make the Dunit write the DRAM its new mode                         */
+        mov     r6, #0x3                 /* Mode Register Set command  */
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_OPERATION_REG)
+
+        /* poll SDRAM operation. Make sure its back to normal operation       */
+_sdramOpPoll2:
+        ldr     r6, [r5]
+        cmp     r6, #0                          /* '0' = Normal SDRAM Mode    */
+        bne     _sdramOpPoll2
+
+	/* Set Dunit control register according to max CL detected	      */
+	/* If we use registered DIMM, add 1 to stBurstDel		      */
+        MV_REG_READ_ASM (r6, r5, SDRAM_CONFIG_REG)
+	tst	r6, #SDRAM_REGISTERED
+	beq	setDunitReg
+	add	r7, r7, #1
+
+setDunitReg:
+        ldr     r6, =SDRAM_DUNIT_CTRL_LOW_DV
+        orr	r6, r6, r7, LSL #SDRAM_ST_BURST_DEL_OFFS
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_DUNIT_CTRL_REG)
+
+
+        /* DIMM density configuration*/
+        /* Density = (1 << (rowNum + colNum)) * dramWidth * dramBankNum       */
+Density:
+	bl 	_getDensity
+	mov 	r8, r7
+        mov     r8, r8, LSR #20 /* Move density 20 bits to the right  */
+                                /* For example 0x10000000 --> 0x1000 */
+
+        mov     r6, #0x00
+        cmp     r8, #DRAM_DEV_DENSITY_128M
+        beq     densCont
+
+        mov     r6, #0x10
+        cmp     r8, #DRAM_DEV_DENSITY_256M
+        beq     densCont
+
+        mov     r6, #0x20
+        cmp     r8, #DRAM_DEV_DENSITY_512M
+        beq     densCont
+
+        /* This is an error. return */
+        b       exit_ddrAutoConfig
+
+densCont:
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_ADDR_CTRL_REG)
+
+        /* Config DDR2 registers (Extended mode, ODTs and pad calibration)    */
+        MV_REG_READ_ASM (r8, r5, SDRAM_CONFIG_REG)
+        tst     r8, #SDRAM_DTYPE_DDR2
+        beq     _extModeODTEnd
+
+
+	/* Set DDR Extended Mode register for working with CS[0]	      */
+        /* write 'nop' to SDRAM operation */
+        mov     r6, #0x5                 /* 'NOP' command              */
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_OPERATION_REG)
+
+        /* poll SDRAM operation. Make sure its back to normal operation       */
+_sdramOpPoll3:
+        ldr     r6, [r5]
+        cmp     r6, #0                          /* '0' = Normal SDRAM Mode    */
+        bne     _sdramOpPoll3
+
+        /* Now its safe to write new value to SDRAM Extended Mode register    */
+        ldr	r6, =DDR_SDRAM_EXT_MODE_CS0_DV
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_EXTENDED_MODE_REG)
+
+        /* Make the Dunit write the DRAM its new extended mode                */
+        mov     r6, #0x4                /* Extended Mode Register Set command */
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_OPERATION_REG)
+
+        /* poll SDRAM operation. Make sure its back to normal operation       */
+_sdramOpPoll4:
+        ldr     r6, [r5]
+        cmp     r6, #0                          /* '0' = Normal SDRAM Mode    */
+        bne     _sdramOpPoll4
+
+	/* ODT configuration is done for single bank CS[0] only		      */
+        /* Config DDR2 On Die Termination (ODT) registers */
+        ldr     r6, =DDR2_ODT_CTRL_LOW_CS0_DV
+        MV_REG_WRITE_ASM (r6, r5, DDR2_SDRAM_ODT_CTRL_LOW_REG)
+
+        ldr     r6, =DDR2_ODT_CTRL_HIGH_CS0_DV
+        MV_REG_WRITE_ASM (r6, r5, DDR2_SDRAM_ODT_CTRL_HIGH_REG)
+
+        ldr     r6, =DDR2_DUNIT_ODT_CTRL_CS0_DV
+        MV_REG_WRITE_ASM (r6, r5, DDR2_DUNIT_ODT_CONTROL_REG)
+
+
+        /* we will check what device we are running and perform
+        Initialization according to device value */
+
+_extModeODTEnd:
+
+setTimingReg:
+        /* Set default Timing parameters */
+        MV_REG_READ_ASM (r8, r5, SDRAM_CONFIG_REG)
+        tst     r8, #SDRAM_DTYPE_DDR2
+        bne     ddr2TimeParam
+
+ddr1TimeParam:
+        ldr     r6, =DDR1_TIMING_LOW_DV
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_TIMING_CTRL_LOW_REG)
+        ldr     r6, =DDR1_TIMING_HIGH_DV
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_TIMING_CTRL_HIGH_REG)
+        b       timeParamDone
+
+ddr2TimeParam:
+        ldr     r6, =DDR2_TIMING_LOW_DV
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_TIMING_CTRL_LOW_REG)
+        ldr     r6, =DDR2_TIMING_HIGH_DV
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_TIMING_CTRL_HIGH_REG)
+
+timeParamDone:
+        /* Open CS[0] window to requested size and enable it. Disable other   */
+	/* windows 							      */
+        ldr	r6, =SCBAR_BASE_MASK
+        sub     r3, r3, #1
+        and	r3, r3, r6
+	orr	r3, r3, #1	/* Enable bank */
+        MV_REG_WRITE_ASM (r3, r5, SDRAM_SIZE_REG(0))
+        ldr	r6, =0
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_SIZE_REG(1))
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_SIZE_REG(2))
+        MV_REG_WRITE_ASM (r6, r5, SDRAM_SIZE_REG(3))
+
+exit_ddrAutoConfig:
+        mov     PC, r11         /* r11 is saved link register */
+
+
+/***************************************************************************************/
+/*       r4 holds I2C EEPROM address
+ *       r7 holds I2C EEPROM offset parameter for i2cRead and its --> returned value
+ *       r8 holds SDRAM various configuration registers value.
+ *	r13 holds Link register
+ */
+/**************************/
+_getDensity:
+	mov     r13, LR                            /* Save link register */
+
+        mov     r4, #MV_BOARD_DIMM0_I2C_ADDR       /* reading from DIMM0      */
+        mov     r7, #NUM_OF_ROWS_OFFSET            /* offset  3               */
+        bl      _i2cRead
+        mov     r8, r7                             /* r8 save number of rows  */
+
+        mov     r4, #MV_BOARD_DIMM0_I2C_ADDR       /* reading from DIMM0      */
+        mov     r7, #NUM_OF_COLS_OFFSET            /* offset  4               */
+        bl      _i2cRead
+        add     r8, r8, r7                         /* r8 = number of rows + number of col */
+
+        mov     r7, #0x1
+        mov     r8, r7, LSL r8                     /* r8 = (1 << r8)          */
+
+        mov     r4, #MV_BOARD_DIMM0_I2C_ADDR       /* reading from DIMM0      */
+        mov     r7, #SDRAM_WIDTH_OFFSET            /* offset 13 */
+        bl      _i2cRead
+        mul     r8, r7, r8
+
+        mov     r4, #MV_BOARD_DIMM0_I2C_ADDR       /* reading from DIMM0      */
+        mov     r7, #NUM_OF_BANKS_OFFSET           /* offset 17               */
+        bl      _i2cRead
+        mul     r7, r8, r7
+
+	mov     PC, r13
+
+/**************************/
+_get_width:
+	mov     r13, LR                 /* Save link register */
+
+        /* Get SDRAM width (SPD offset 13) */
+        mov     r4, #MV_BOARD_DIMM0_I2C_ADDR /* reading from DIMM0            */
+        mov     r7, #SDRAM_WIDTH_OFFSET
+        bl      _i2cRead                /* result in r7                       */
+
+	mov     PC, r13
+
+/**************************/
+_get_CAL:
+	mov     r13, LR                 /* Save link register */
+
+        /* Set maximum CL supported by DIMM */
+        mov     r4, #MV_BOARD_DIMM0_I2C_ADDR /* reading from DIMM0            */
+        mov     r7, #SUPPORTED_CL_OFFSET     /* offset  18 */
+        bl      _i2cRead
+
+	mov     PC, r13
+
+/**************************/
+/* R8 - sdram configuration register.
+ * Return value in flag if no-registered then Z-flag is set
+ */
+_is_Registered:
+	mov     r13, LR                 /* Save link register */
+
+        /* Get registered/non registered info from DIMM */
+        tst     r8, #SDRAM_DTYPE_DDR2
+        bne     regDdr2
+
+regDdr1:
+        mov     r4, #MV_BOARD_DIMM0_I2C_ADDR /* reading from DIMM0            */
+        mov     r7, #SDRAM_MODULES_ATTR_OFFSET
+        bl      _i2cRead                /* result in r7                       */
+        tst     r7, #0x2
+	b	exit
+regDdr2:
+        mov     r4, #MV_BOARD_DIMM0_I2C_ADDR /* reading from DIMM0            */
+        mov     r7, #DIMM_TYPE_INFO_OFFSET
+        bl      _i2cRead                /* result in r7                       */
+        tst     r7, #0x11               /* DIMM type = regular RDIMM (0x01)   */
+                                        /* or Mini-RDIMM (0x10)               */
+exit:
+        mov     PC, r13
+
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/pdma/mvPdma.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/pdma/mvPdma.c
@@ -0,0 +1,872 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+            this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+/*******************************************************************************
+* mvPdma.c - Implementation file for PDMA HW library
+*
+* DESCRIPTION:
+*       This file contains Marvell Controller PDMA HW library API 
+*       implementation.
+*       NOTE: 
+*       1) This HW library API assumes PDMA source, destination and 
+*          descriptors are cache coherent. 
+*       2) In order to gain high performance, the API does not parform 
+*          API parameter checking.
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvSysPdmaConfig.h"
+#include "mvPdmaRegs.h"
+#include "mvPdma.h"
+
+
+/* defines  */
+#define MV_CHANNEL_TAKEN	1
+#define MV_CHANNEL_FREE		0
+
+#ifdef MV_NFC_REG_DBG
+extern MV_U32 mvNfcDbgFlag;
+MV_U32 pdma_dbg_read(MV_U32 addr)
+{
+	MV_U32 reg = MV_MEMIO_LE32_READ((addr));
+	if (mvNfcDbgFlag) mvOsPrintf("PDMA read  0x%08x = %08x\n", addr, reg);
+	return reg;
+}
+
+MV_VOID pdma_dbg_write(MV_U32 addr, MV_U32 val)
+{
+	MV_MEMIO_LE32_WRITE((addr), (val));
+	if (mvNfcDbgFlag) mvOsPrintf("PDMA write 0x%08x = %08x\n", addr, val);
+}
+
+MV_VOID pdma_dbg_bitset(MV_U32 offset, MV_U32 bitMask)
+{
+	MV_U32 reg1, reg2;
+
+	reg1 = (MV_MEMIO32_READ(offset));
+	reg2 = (reg1 | MV_32BIT_LE_FAST(bitMask));
+	MV_MEMIO32_WRITE((offset), reg2);
+	if (mvNfcDbgFlag) mvOsPrintf("PDMA bitset 0x%08x = %08x (old = %08x)\n", offset, reg2, reg1);
+}
+
+#undef MV_REG_READ
+#undef MV_REG_WRITE
+#define MV_REG_READ(x)		pdma_dbg_read(x)
+#define MV_REG_WRITE(x,y)	pdma_dbg_write(x,y)
+#define MV_REG_BIT_SET(x,y)	pdma_dbg_bitset(x,y)
+#endif
+
+/* globals */
+MV_U8 chanAllocTable[MV_PDMA_MAX_CHANNELS_NUM] = {0};
+MV_U8 mvPdmaNumChannels;
+/* This table contains the appropriate offsets for the channels, */
+/* to be used when writing PDMA_REQUEST_CHAN_MAP_REG */ 
+MV_U32 chanMapRequestOffsetTable[MV_PDMA_MAX_CHANNELS_NUM] = 
+	{0x0120, 0x0124, 0x0128, 0x012C, 0x0130, 0x117C, 
+	0x1180, 0x1184, 0x118C, 0x0134, 0x0138, 0, 0, 0, 0, 0};
+
+
+/*******************************************************************************
+* mvPdmaHalInit - Initialize the PDMA engine
+*
+* DESCRIPTION:
+*               This function initializes the PDMA unit. 
+* INPUT:
+*       pdmaNumChannels - max number of PDMA channels.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_ERROR if initialization fails.
+*       MV_OK on success.
+*******************************************************************************/
+MV_STATUS mvPdmaHalInit(MV_U8 pdmaNumChannels)
+{
+	int chan = 0;
+
+	if ((pdmaNumChannels > MV_PDMA_MAX_CHANNELS_NUM) || 
+		(pdmaNumChannels < (MV_PDMA_MEMORY+1)))
+		return MV_BAD_PARAM;
+
+	for (chan = 0; chan < MV_PDMA_MAX_CHANNELS_NUM; chan++)
+		chanAllocTable[chan] = MV_CHANNEL_FREE;
+
+	mvPdmaNumChannels = pdmaNumChannels;
+
+	for (chan = 0; chan < pdmaNumChannels; chan++) {
+		MV_REG_WRITE((MV_PDMA_REGS_BASE + chanMapRequestOffsetTable[chan]), 0);
+		/* Note: do not write to PDMA_DESC_ADDR_REG, it changes the state of the channel to initialized */
+		MV_REG_WRITE(PDMA_SRC_ADDR_REG(chan), 0);
+		MV_REG_WRITE(PDMA_DST_ADDR_REG(chan), 0);
+		MV_REG_WRITE(PDMA_COMMAND_REG(chan), DCMD_DEF_VALUE);
+		MV_REG_WRITE(PDMA_CTRL_STATUS_REG(chan), DCSR_DEF_VALUE);
+	}
+
+	MV_REG_WRITE(PDMA_ALIGNMENT_REG, 0);
+	MV_REG_WRITE(PDMA_INTR_CAUSE_REG, 0);
+	return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvPdmaChanAlloc - Allocate a PDMA channel
+*
+* DESCRIPTION:
+*               This function allocates a PDMA channel for use according to the given parameters. 
+* INPUT:
+*       chanType - channel type (peripheral type or memory).
+*       intrEnMask - bitmask for enabling the PDMA unit interrupts. 
+*					 Use the MV_PDMA_<x>_INTR_EN flags to enable various interrupts.
+*					 Example: (MV_PDMA_END_INTR_EN | MV_PDMA_START_INTR_EN).
+*
+* OUTPUT:
+*       chanHndl - handle to a PDMA channel, which include channel parameters.
+*
+* RETURN:
+*       MV_ERROR on failure.
+*       MV_OK on success.
+*******************************************************************************/
+MV_STATUS mvPdmaChanAlloc(MV_PDMA_PERIPH_TYPE chanType, 
+			MV_U32 intrEnMask, 
+			MV_PDMA_CHANNEL *chanHndl)
+{
+	int i = 0;
+
+	if (chanHndl == NULL)
+		return MV_BAD_PARAM;
+
+	/* check if channel is free or allocated - use chanType as an index */
+	/* for memory-to-memory transactions, we have several channels available */
+	if (chanType != MV_PDMA_MEMORY) {
+		if (chanAllocTable[chanType] == MV_CHANNEL_FREE)
+			chanHndl->chanNumber = chanType;
+		else
+			return MV_NO_RESOURCE;
+	}
+	else {
+		for (i = MV_PDMA_MEMORY; i < mvPdmaNumChannels; i++) {
+			if (chanAllocTable[i] == MV_CHANNEL_FREE) {
+				chanHndl->chanNumber = i;
+				break;
+			}
+		}
+		if (i == mvPdmaNumChannels) {
+			return MV_NO_RESOURCE;
+		}
+	}
+	
+	chanHndl->periphType = chanType;
+
+	chanHndl->intrEnMask = intrEnMask;
+	
+	/* set channel source and destination flow control */
+	switch (chanType) {
+
+	/* peripheral is source */
+	case MV_PDMA_AC97_MIC:
+	case MV_PDMA_AC97_MODEM_RX:
+	case MV_PDMA_AC97_AUDIO_RX: 
+	case MV_PDMA_SSP_RX:
+		chanHndl->srcFlowControl = 1;
+		chanHndl->dstFlowCtrl = 0;
+		break;
+	/* peripheral is target */
+	case MV_PDMA_AC97_MODEM_TX: 	
+	case MV_PDMA_AC97_AUDIO_TX:
+	case MV_PDMA_AC97_SURROUND_TX:
+	case MV_PDMA_AC97_CENTER_TX:
+	case MV_PDMA_NAND_COMMAND:
+	case MV_PDMA_SSP_TX:
+		chanHndl->srcFlowControl = 0; 
+		chanHndl->dstFlowCtrl = 1;
+		break;
+	/* the NAND peripheral can be either source or target, */
+	/* so flow control will set later according to transaction    */
+	case MV_PDMA_NAND_DATA:
+		chanHndl->srcFlowControl = 0;
+		chanHndl->dstFlowCtrl = 0;	
+		break;
+	/* memory to memory transactions */
+	case MV_PDMA_MEMORY:
+		chanHndl->srcFlowControl = 0; 
+		chanHndl->dstFlowCtrl = 0;
+		break;
+	}
+
+	/* set channel maximum burst size and peripheral width */
+	switch (chanType) {
+
+	case MV_PDMA_AC97_MIC:
+	case MV_PDMA_AC97_MODEM_RX:
+	case MV_PDMA_AC97_MODEM_TX: 
+	case MV_PDMA_AC97_AUDIO_RX: 
+	case MV_PDMA_AC97_AUDIO_TX: 
+	case MV_PDMA_AC97_SURROUND_TX:
+	case MV_PDMA_AC97_CENTER_TX:
+	case MV_PDMA_SSP_RX:
+	case MV_PDMA_SSP_TX:
+		chanHndl->burstSize = DCMD_BURST_32_BYTES;
+		chanHndl->width = DCMD_WIDTH_4_BYTE;
+		break;
+	case MV_PDMA_NAND_DATA:
+		chanHndl->burstSize = DCMD_BURST_32_BYTES;
+		chanHndl->width = DCMD_WIDTH_8_BYTE;
+		break;
+	case MV_PDMA_NAND_COMMAND:
+		chanHndl->burstSize = DCMD_BURST_8_BYTES;
+		chanHndl->width = DCMD_WIDTH_8_BYTE;
+		break;
+	case MV_PDMA_MEMORY:
+		chanHndl->burstSize = DCMD_BURST_32_BYTES;
+		chanHndl->width = 0; /* must be 0 for memory to memory transactions */
+		break;
+	}
+	/* This is required only for peripheral to memory or memory to peripheral channels, */
+	/* but not needed for memory to memory channels */
+	if (chanType != MV_PDMA_MEMORY) {
+		MV_REG_WRITE((MV_PDMA_REGS_BASE + chanMapRequestOffsetTable[chanHndl->chanNumber]), 
+				((chanHndl->chanNumber & DRCMR_CHLNUM_MASK) | DRCMR_MAPVLD_BIT));
+
+	}
+
+	/* AC97 channels need to work in 1 byte alignment, */
+	/* while other channels need to work in 8 byte alignment. */
+	if ((chanType >= MV_PDMA_AC97_MIC) && (chanType <= MV_PDMA_AC97_CENTER_TX)) {
+		MV_REG_BIT_SET(PDMA_ALIGNMENT_REG, (1 << chanType));
+	}
+
+	chanAllocTable[chanHndl->chanNumber] = MV_CHANNEL_TAKEN;
+
+	return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvPdmaChanFree - Free a PDMA channel
+*
+* DESCRIPTION:
+*               This function frees a previously allocated PDMA channel. 
+* INPUT:
+*       chanHndl - handle to a PDMA channel.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_ERROR on failure.
+*       MV_OK on success.
+*******************************************************************************/
+MV_STATUS mvPdmaChanFree(MV_PDMA_CHANNEL *chanHndl)
+{
+	if (chanHndl == NULL)
+		return MV_BAD_PARAM;
+
+	chanAllocTable[chanHndl->chanNumber] = MV_CHANNEL_FREE;
+	
+	return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvPdmaChannelStateGet - Return the state of a PDMA channel
+*
+* DESCRIPTION:
+*               This function returns the state of a PDMA channel. 
+* INPUT:
+*       chanHndl - handle to a PDMA channel.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_PDMA_CHANNEL_STOPPED if channel is stopped or un-initialized.
+*       MV_PDMA_CHANNEL_RUNNING if channel is running.
+*       MV_PDMA_CHANNEL_ERROR if the channel is in an error state.
+*******************************************************************************/
+MV_PDMA_CHAN_STATE mvPdmaChannelStateGet(MV_PDMA_CHANNEL *chanHndl)
+{
+	MV_U32 regVal = 0;
+
+#ifdef MV_PDMA_DEBUG
+	/* check parameter validity only in debug mode for better performance */
+	if (chanHndl == NULL)
+		return MV_BAD_PARAM;
+#endif /* MV_PDMA_DEBUG */
+
+	regVal = MV_REG_READ(PDMA_CTRL_STATUS_REG(chanHndl->chanNumber));
+
+	if (regVal & DCSR_BUSERRINTR)
+		return MV_PDMA_CHANNEL_ERROR;
+
+	if (regVal & DCSR_STOPINTR)
+		return MV_PDMA_CHANNEL_STOPPED;
+
+	return MV_PDMA_CHANNEL_RUNNING;
+}
+
+
+/*******************************************************************************
+* mvPdmaChanTransfer - Transfer data from source to destination
+* 
+* DESCRIPTION:       
+*       This function performs a DMA transaction using a given channel.
+*
+*       This function supports both descriptor-fetch and non-descriptor-fetch modes. 
+*       To use the function in descriptor-fetch mode just set phyNextDescriptor parameter 
+*       with the descriptor physical address. The transfer will be according to the 
+*       parameters in the descriptor. Note: in descriptor-fetch mode, the other parameters 
+*       (transType, phySrcAddr, phyDstAddr, size) are not used and the PDMA_COMMAND_REG 
+*       is set according to the value in the descriptor !
+*
+*       To use the non-descriptor-fetch mode set phyNextDescriptor to NULL.
+*
+*       The user is asked to keep the following restrictions:
+*       1) This function does not take into consideration CPU MMU issues.
+*          In order for the PDMA engine to access the appropreate source 
+*          and destination, address parameters must be given as physical addresses.
+*       2) This function does not take care of cache coherency issues. The source,
+*          destination and in case of chain mode the descriptor list are assumed
+*          to be cache coherent.
+*       3) In case of descriptor-fetch mode, the function does not align the user descriptor
+*          chain. Instead, the user must make sure the descriptor chain is 
+*          aligned according to PDMA requirements.
+*       4) This function does not check parameters validity (for example, does size 
+*          parameter exceed the maximum byte count).
+*       5) This function does not check the current state of the channel and assumes it is 
+*          not currently running.
+*
+* INPUT:
+*       chanHndl - handle to a PDMA channel.
+*       transType - peripheral to memory, memory to peripheral or memory to memory.
+*       phySrcAddr - physical source address.
+*       phyDstAddr - physical destination address.
+*       size - length of transaction in bytes, should not exceed 8KByte.
+*       phyNextDescriptor - physical address of the descriptor, or NULL if not required.
+*
+* OUTPUT:
+*       None.
+*
+* RETURS:
+*       MV_ERROR on failure.
+*       MV_OK on success.
+*
+*******************************************************************************/
+MV_STATUS mvPdmaChanTransfer(MV_PDMA_CHANNEL *chanHndl, 
+					MV_PDMA_TRANSACTION_TYPE transType, 
+					MV_U32 phySrcAddr, 
+					MV_U32 phyDstAddr, 
+					MV_U16 size, 
+					MV_U32 phyNextDescriptor)
+{   
+	MV_U32 regVal = 0;
+
+#ifdef MV_PDMA_DEBUG
+	/* check parameter validity only in debug mode for better performance */
+	if (chanHndl == NULL)
+		return MV_BAD_PARAM;
+
+	if ((chanHndl->periphType == MV_PDMA_MEMORY) && 
+		(transType != MV_PDMA_MEM_TO_MEM))
+		return MV_BAD_PARAM;
+	
+	if (size > MV_PDMA_MAX_TRANSFER_SIZE)
+		return MV_BAD_PARAM;
+#endif /* MV_PDMA_DEBUG */
+
+	if (phyNextDescriptor) {
+		/* working in descriptor-fetch mode */
+
+		/* clear DCSR_RUN and DCSR_NODESCFETCH bits,			*/
+		/* also enable the requested interrupts for this channel	*/
+		/* note in this mode, the value of the command register		*/
+		/* is determined according to the descriptor, so the		*/
+		/* MV_PDMA_END_INTR_EN and MV_PDMA_START_INTR_EN bits in	*/
+		/* the intrEnMask are irrelevant.				*/
+		regVal = ((chanHndl->intrEnMask		& 
+			(MV_PDMA_STOP_INTR_EN		|
+			MV_PDMA_REQ_AFTER_STOP_INTR_EN	| 
+			MV_PDMA_END_OF_RX_INTR_EN)	& 
+			~DCSR_RUN			& 
+			~DCSR_NODESCFETCH));
+
+		MV_REG_WRITE(PDMA_CTRL_STATUS_REG(chanHndl->chanNumber), regVal);
+		/* set the descriptor address */
+		MV_REG_WRITE(PDMA_DESC_ADDR_REG(chanHndl->chanNumber), phyNextDescriptor);
+		/* set the DCSR_RUN bit to start the operation */
+		MV_REG_BIT_SET(PDMA_CTRL_STATUS_REG(chanHndl->chanNumber), DCSR_RUN);
+	}
+	else {
+		/* working in non-descriptor-fetch mode */
+
+		/* clear the DCSR_RUN bit and set the DCSR_NODESCFETCH bit */
+		regVal = ((chanHndl->intrEnMask		&
+			(MV_PDMA_STOP_INTR_EN		|
+			MV_PDMA_REQ_AFTER_STOP_INTR_EN	|
+			MV_PDMA_END_OF_RX_INTR_EN)	&
+			~DCSR_RUN)			|
+			DCSR_NODESCFETCH);
+
+		MV_REG_WRITE(PDMA_CTRL_STATUS_REG(chanHndl->chanNumber), regVal);
+		/* write source and destination addresses */
+		MV_REG_WRITE(PDMA_SRC_ADDR_REG(chanHndl->chanNumber), phySrcAddr);
+		MV_REG_WRITE(PDMA_DST_ADDR_REG(chanHndl->chanNumber), phyDstAddr);
+		/* write command register */
+		regVal = (chanHndl->intrEnMask	& 
+			(MV_PDMA_END_INTR_EN |
+			MV_PDMA_START_INTR_EN));
+		if (transType == MV_PDMA_PERIPH_TO_MEM) {
+			regVal &= ~(DCMD_INCSRCADDR | DCMD_FLOWTRG);
+			regVal |= (DCMD_INCTRGADDR | DCMD_FLOWSRC);
+		}
+		else if (transType == MV_PDMA_MEM_TO_PERIPH) {
+			regVal &= ~(DCMD_INCTRGADDR | DCMD_FLOWSRC);
+			regVal |= (DCMD_INCSRCADDR | DCMD_FLOWTRG);
+		}
+		else {
+			regVal &= ~(DCMD_FLOWSRC | DCMD_FLOWTRG);
+			regVal |= (DCMD_INCSRCADDR | DCMD_INCTRGADDR);
+		}
+		regVal |= chanHndl->burstSize;
+		regVal |= chanHndl->width;
+		regVal |= (size & DCMD_LEN_MASK);
+		regVal |= (1 << DCMD_OVERREAD);
+
+		MV_REG_WRITE(PDMA_COMMAND_REG(chanHndl->chanNumber), regVal);
+
+		/* set the DCSR_RUN bit to start the operation */
+		MV_REG_BIT_SET(PDMA_CTRL_STATUS_REG(chanHndl->chanNumber), DCSR_RUN);
+	}
+	
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvPdmaCommandRegCalc - Calculate the value of the command register according 
+* 			 to the given parameters.
+* 
+* DESCRIPTION:       
+*       This function alculates the required value for the PDMA command register.
+*	This is useful when working in descriptor-fetch (chained) mode, to help the 
+*	user build the descriptor chain. In this mode, the command register is 
+*	written according to the last field in the descriptor.
+*
+*       This function does not check parameters validity (for example, does size 
+*       parameter exceed the maximum byte count).
+*
+* INPUT:
+*       chanHndl - handle to a PDMA channel.
+*       transType - peripheral to memory, memory to peripheral or memory to memory.
+*       size - length of transaction in bytes, should not exceed 8KByte.
+*
+* OUTPUT:
+*       None.
+*
+* RETURS:
+*       MV_U32 - the value of the command register according to the parameters.
+*
+*******************************************************************************/
+MV_U32 mvPdmaCommandRegCalc(	MV_PDMA_CHANNEL *chanHndl, 
+				MV_PDMA_TRANSACTION_TYPE transType, 
+				MV_U16 size)
+{
+	MV_U32 regVal = 0;
+
+	if (transType == MV_PDMA_PERIPH_TO_MEM) {
+		regVal &= ~(DCMD_INCSRCADDR | DCMD_FLOWTRG);
+		regVal |= (DCMD_INCTRGADDR | DCMD_FLOWSRC);
+	}
+	else if (transType == MV_PDMA_MEM_TO_PERIPH) {
+		regVal &= ~(DCMD_INCTRGADDR | DCMD_FLOWSRC);
+		regVal |= (DCMD_INCSRCADDR | DCMD_FLOWTRG);
+	}
+	else {
+		regVal &= ~(DCMD_FLOWSRC | DCMD_FLOWTRG);
+		regVal |= (DCMD_INCSRCADDR | DCMD_INCTRGADDR);
+	}
+	regVal |= chanHndl->burstSize;
+	regVal |= chanHndl->width;
+	regVal |= (size & DCMD_LEN_MASK);
+	regVal |= (1 << DCMD_OVERREAD);
+
+	return regVal;
+}
+
+
+/*******************************************************************************
+* mvPdmaCommandIntrEnable - Enable interrupts for a given PDMA command.
+* 
+* DESCRIPTION:       
+*       This function enables interrupts for a given PDMA command that was
+*	previously calculated by mvPdmaCommandRegCalc().
+*	The interrupts are enabled according to the intrMask passed to the
+*	mvPdmaChanAlloc() API.
+*
+* INPUT:
+*       chanHndl - handle to a PDMA channel.
+*       command - The command to enable the interrupts for.
+*
+* OUTPUT:
+*       command - The input command including the proper interrupt bits.
+*
+* RETURS:
+*       MV_ERROR on failure.
+*       MV_OK on success.
+*
+*******************************************************************************/
+MV_STATUS mvPdmaCommandIntrEnable( MV_PDMA_CHANNEL *chanHndl,
+				MV_U32 *command)
+{
+	*command |= (chanHndl->intrEnMask & (MV_PDMA_END_INTR_EN | MV_PDMA_START_INTR_EN));
+	return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvPdmaMemInit - Initialize a memory buffer with a given value pattern
+* 
+* DESCRIPTION:       
+*       This function initializes a memory buffer with a user supplied pattern.
+*       The user is asked to keep the following restrictions:
+*       1) This function does not take into consideration CPU MMU issues.
+*          In order for the PDMA engine to access the appropreate source 
+*          and destination, address parameters must be given as physical addresses.
+*       2) This function does not take care of cache coherency issues. The source,
+*          destination and in case of chain mode the descriptor list are assumed
+*          to be cache coherent.
+*       3) No chain mode support.
+*       4) This function does not check parameters validity (for example, does size 
+*          parameter exceed the maximum byte count.
+*
+* INPUT:
+*       chanHndl - handle to a PDMA channel.
+*       phyPatternPtr - physical source address of the pattern.
+*       phyDstAddr    - physical destination address.
+*       size          - The total number of bytes to initialize.
+*
+* OUTPUT:
+*       None.
+*
+* RETURS:
+*       MV_ERROR on failure.
+*       MV_OK on success.
+*
+*******************************************************************************/
+MV_STATUS mvPdmaMemInit(MV_PDMA_CHANNEL *chanHndl, 
+			MV_U32 phyPatternPtr, 
+			MV_U32 phyDstAddr, 
+			MV_U16 size)
+{   
+	MV_U32 regVal = 0;
+#ifdef MV_PDMA_DEBUG
+	/* check parameter validity only in debug mode for better performance */
+	if (chanHndl == NULL)
+		return MV_BAD_PARAM;
+
+	if (chanHndl->periphType != MV_PDMA_MEMORY)
+		return MV_BAD_PARAM;
+	
+	if ((size > MV_PDMA_MAX_TRANSFER_SIZE) || (size == 0))
+		return MV_BAD_PARAM;
+#endif /* MV_PDMA_DEBUG */
+
+	/* working in non-descriptor-fetch mode */
+
+	/* clear the DCSR_RUN bit and set the DCSR_NODESCFETCH bit	*/
+	regVal = ((chanHndl->intrEnMask		& 
+		(MV_PDMA_STOP_INTR_EN		|
+		MV_PDMA_REQ_AFTER_STOP_INTR_EN	| 
+		MV_PDMA_END_OF_RX_INTR_EN)	& 
+		~DCSR_RUN)			|
+		DCSR_NODESCFETCH);
+
+	MV_REG_WRITE(PDMA_CTRL_STATUS_REG(chanHndl->chanNumber), regVal);
+	/* write source and destination addresses */
+	MV_REG_WRITE(PDMA_SRC_ADDR_REG(chanHndl->chanNumber), phyPatternPtr);
+	MV_REG_WRITE(PDMA_DST_ADDR_REG(chanHndl->chanNumber), phyDstAddr);
+	/* write command register */
+	regVal = (chanHndl->intrEnMask	& 
+		(MV_PDMA_END_INTR_EN	|
+		MV_PDMA_START_INTR_EN));
+
+	regVal &= ~(DCMD_FLOWSRC | DCMD_FLOWTRG | DCMD_INCSRCADDR);
+	regVal |= DCMD_INCTRGADDR;
+		
+	regVal |= chanHndl->burstSize;
+	regVal |= chanHndl->width;
+	regVal |= (size & DCMD_LEN_MASK);
+
+	/* set the DCSR_RUN bit to start the operation */
+	MV_REG_BIT_SET(PDMA_CTRL_STATUS_REG(chanHndl->chanNumber), DCSR_RUN);
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvPdmaUnitStateStore - Store the PDMA Unit state.
+* 
+* DESCRIPTION:       
+*       This function stores the PDMA unit registers before the unit is suspended.
+*	The stored registers are placed into the input buffer which will be used for
+*	the restore operation.
+*
+* INPUT:
+*       regsData	- Buffer to store the unit state registers (Must
+*			  include at least 64 entries)
+*	len		- Number of entries in regsData input buffer.
+*
+* OUTPUT:
+*       regsData	- Unit state registers. The registers are stored in
+*			  pairs of (reg, value).
+*       len		- Number of entries in regsData buffer (Must be even).
+*
+* RETURS:
+*       MV_ERROR on failure.
+*       MV_OK on success.
+*
+*******************************************************************************/
+MV_STATUS mvPdmaUnitStateStore(MV_U32 *stateData, MV_U32 *len)
+{
+	MV_U32 i;
+
+	if((stateData == NULL) || (len == NULL))
+		return MV_BAD_PARAM;
+
+	for(i = 0; i < sizeof(chanMapRequestOffsetTable) / sizeof(MV_U32); i++) {
+		stateData[i * 2] = MV_PDMA_REGS_BASE + chanMapRequestOffsetTable[i];
+		stateData[i * 2 + 1] = MV_REG_READ(MV_PDMA_REGS_BASE + chanMapRequestOffsetTable[i]);
+	}
+
+	stateData[i * 2] = PDMA_ALIGNMENT_REG;
+	stateData[i * 2 + 1] = MV_REG_READ(PDMA_ALIGNMENT_REG);
+	i++;
+
+	*len = i;
+	return MV_OK;
+}
+
+#ifdef MV_PDMA_DEBUG
+/************************************ For Debug *******************************/
+
+/*******************************************************************************
+* mvPdmaSrcAddrRegSet - Write to PDMA Channel Source Address Register (DSADRx)
+*
+* DESCRIPTION:
+*               This function simply writes a given value to the 
+*		PDMA Channel Source Address Register (DSADRx), where x is the channel number. 
+* INPUT:
+*       chan - channel number (0 to 15).
+*       value - value to write to the register.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_ERROR on failure.
+*       MV_OK on success.
+*
+*******************************************************************************/
+MV_STATUS mvPdmaSrcAddrRegSet (MV_U8 chan, MV_U32 value)
+{
+	if (chan > mvPdmaNumChannels)
+		return MV_BAD_PARAM;
+
+	MV_REG_WRITE(PDMA_SRC_ADDR_REG(chan), value);
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvPdmaDstAddrRegSet - Write to PDMA Channel Destination Address Register (DTADRx)
+*
+* DESCRIPTION:
+*               This function simply writes a given value to the 
+*		PDMA Channel Destination Address Register (DTADRx), where x is the channel number. 
+* INPUT:
+*       chan - channel number (0 to 15).
+*       value - value to write to the register.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_ERROR on failure.
+*       MV_OK on success.
+*
+*******************************************************************************/
+MV_STATUS mvPdmaDstAddrRegSet(MV_U8 chan, MV_U32 value)
+{
+	if (chan > mvPdmaNumChannels)
+		return MV_BAD_PARAM;
+
+	MV_REG_WRITE(PDMA_DST_ADDR_REG(chan), value);
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvPdmaCmdRegSet - Write to PDMA Channel Command Register (DCMDx)
+*
+* DESCRIPTION:
+*               This function simply writes a given value to the 
+*		PDMA Channel Command Register (DCMDx), where x is the channel number. 
+* INPUT:
+*       chan - channel number (0 to 15).
+*       value - value to write to the register.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_ERROR on failure.
+*       MV_OK on success.
+*
+*******************************************************************************/
+MV_STATUS mvPdmaCmdRegSet(MV_U8 chan, MV_U32 value)
+{
+	if (chan > mvPdmaNumChannels)
+		return MV_BAD_PARAM;
+
+	MV_REG_WRITE(PDMA_COMMAND_REG(chan), value);
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvPdmaCntrlRegSet - Write to PDMA Channel Control/Status Register (DCSRx)
+*
+* DESCRIPTION:
+*               This function simply writes a given value to the 
+*		PDMA Channel Control/Status Register (DCSRx), where x is the channel number. 
+* INPUT:
+*       chan - channel number (0 to 15).
+*       value - value to write to the register.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_ERROR on failure.
+*       MV_OK on success.
+*
+*******************************************************************************/
+MV_STATUS mvPdmaCntrlRegSet(MV_U8 chan, MV_U32 value)
+{
+	if (chan > mvPdmaNumChannels)
+		return MV_BAD_PARAM;
+
+	MV_REG_WRITE(PDMA_CTRL_STATUS_REG(chan), value);
+	return MV_OK;
+}
+
+#endif /* MV_PDMA_DEBUG */
+
+/*******************************************************************************
+* mvPdmaChanRegsPrint - Print the registers of a PDMA channel
+*
+* DESCRIPTION:
+*               This function prints all the registers of a given PDMA channel. 
+* INPUT:
+*       chanHndl - handle to a PDMA channel.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*******************************************************************************/
+MV_VOID mvPdmaChanRegsPrint(MV_PDMA_CHANNEL *chanHndl)
+{
+	if (chanHndl == NULL)
+		return;
+
+	mvOsPrintf("\t PDMA Channel #%d Registers:\n", chanHndl->chanNumber);
+
+	mvOsPrintf("PDMA_REQUEST_CHAN_MAP_REG             : 0x%X = 0x%08x\n", 
+                (MV_PDMA_REGS_BASE + chanMapRequestOffsetTable[chanHndl->chanNumber]), 
+                MV_REG_READ((MV_PDMA_REGS_BASE + chanMapRequestOffsetTable[chanHndl->chanNumber])));
+
+	mvOsPrintf("PDMA_DESC_ADDR_REG               : 0x%X = 0x%08x\n", 
+                PDMA_DESC_ADDR_REG(chanHndl->chanNumber), 
+                MV_REG_READ(PDMA_DESC_ADDR_REG(chanHndl->chanNumber)));
+
+	mvOsPrintf("PDMA_SRC_ADDR_REG               : 0x%X = 0x%08x\n", 
+                PDMA_SRC_ADDR_REG(chanHndl->chanNumber), 
+                MV_REG_READ(PDMA_SRC_ADDR_REG(chanHndl->chanNumber)));
+
+	mvOsPrintf("PDMA_DST_ADDR_REG               : 0x%X = 0x%08x\n", 
+                PDMA_DST_ADDR_REG(chanHndl->chanNumber), 
+                MV_REG_READ(PDMA_DST_ADDR_REG(chanHndl->chanNumber)));
+
+	mvOsPrintf("PDMA_COMMAND_REG               : 0x%X = 0x%08x\n", 
+                PDMA_COMMAND_REG(chanHndl->chanNumber), 
+                MV_REG_READ(PDMA_COMMAND_REG(chanHndl->chanNumber)));
+
+	mvOsPrintf("PDMA_CTRL_STATUS_REG               : 0x%X = 0x%08x\n", 
+                PDMA_CTRL_STATUS_REG(chanHndl->chanNumber), 
+                MV_REG_READ(PDMA_CTRL_STATUS_REG(chanHndl->chanNumber)));
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/pdma/mvPdmaAddrDec.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/pdma/mvPdmaAddrDec.c
@@ -0,0 +1,379 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+/* includes */
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvPdmaRegs.h"
+#include "mvPdma.h"
+
+/* Locals */
+
+MV_TARGET pdmaAddrDecPrioTap[] = 
+{
+#if defined(MV_INCLUDE_SDRAM_CS0)
+	SDRAM_CS0,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS1)
+	SDRAM_CS1,
+#endif
+#if 0 
+	INTER_REGS, /* Not required for PDMA because we deal with the NAND registers separately */
+#endif
+   	TBL_TERM
+};
+
+static MV_STATUS pdmaWinOverlapDetect(MV_U32 winNum, MV_ADDR_WIN *pAddrWin);
+
+/*******************************************************************************
+* mvPdmaWinInit
+*
+* DESCRIPTION:
+*       Initialize the PDMA peripheral target address window.
+*
+* INPUT:
+*	addWinMap: An array holding the address decoding information for the
+*		    system.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_ERROR if register parameters are invalid.
+*
+*******************************************************************************/
+MV_STATUS mvPdmaWinInit(MV_UNIT_WIN_INFO *addrWinMap)
+{
+    MV_U32		winNum;
+    MV_UNIT_WIN_INFO	*addrDecWin;
+    MV_U32		winPrioIndex = 0;
+
+    /* Initiate PDMA address decode */
+
+    /* First disable all address decode windows */
+    for (winNum = 0; winNum < PDMA_MAX_ADDR_DEC_WIN; winNum++)
+	MV_REG_BIT_RESET(PDMA_WINDOW_CONTROL_REG(winNum), PDMA_WIN_EN);
+
+    /* Go through all windows in user table until table terminator	*/
+    for (winNum = 0; ((pdmaAddrDecPrioTap[winPrioIndex] != TBL_TERM) &&
+			    (winNum < PDMA_MAX_ADDR_DEC_WIN)); ) {
+        addrDecWin = &addrWinMap[pdmaAddrDecPrioTap[winPrioIndex]];
+	if (addrDecWin->enable == MV_TRUE) {
+	    if (MV_OK != mvPdmaWinWrite(winNum, addrDecWin)) {
+		mvOsPrintf("mvPdmaInit: ERR. mvPdmaWinSet failed\n");
+		return MV_ERROR;
+	    }
+	    winNum++;
+	}
+	winPrioIndex++;			
+    }
+
+    /* Window configuration for NAND registers */
+    MV_REG_WRITE(PDMA_WINDOW_BASE_REG(2), INTER_REGS_BASE);
+    MV_REG_WRITE(PDMA_WINDOW_CONTROL_REG(2), 0x03FF03C1);
+    
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvPdmaWinWrite
+*
+* DESCRIPTION:
+*       This function sets a peripheral target (e.g. SDRAM bank0, PCI_MEM0) 
+*       address window, also known as address decode window. 
+*       After setting this target window, the PDMA will be able to access the 
+*       target within the address window. 
+*
+* INPUT:
+*       winNum      - PDMA to target address decode window number.
+*       pAddrDecWin - PDMA target window data structure.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_OK on success,
+*	MV_BAD_PARAM if winNum is invalid.
+*	MV_ERROR otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvPdmaWinWrite(MV_U32 winNum, MV_UNIT_WIN_INFO *pAddrDecWin)
+{
+    MV_U32  baseReg, sizeReg;
+    MV_U32  sizeToReg=0;
+
+    /* Parameter checking   */
+    if (winNum >= PDMA_MAX_ADDR_DEC_WIN) {
+	mvOsPrintf("mvPdmaWinSet: ERR. Invalid win num %d\n",winNum);
+	return MV_BAD_PARAM;
+    }
+    
+    /* Check if the requested window overlapps with current windows         */
+    if (MV_TRUE == pdmaWinOverlapDetect(winNum, &pAddrDecWin->addrWin))
+    {
+	mvOsPrintf("mvPdmaWinSet: ERR. Window %d overlap\n", winNum);
+	return MV_ERROR;
+    }
+
+    /* check if address is aligned to the size */
+    if (MV_IS_NOT_ALIGN(pAddrDecWin->addrWin.baseLow, pAddrDecWin->addrWin.size)) {
+	mvOsPrintf("mvPdmaWinSet: Error setting PDMA window %d.\n"\
+			"Address 0x%08x is unaligned to size 0x%x.\n",
+			winNum,
+			pAddrDecWin->addrWin.baseLow,
+			pAddrDecWin->addrWin.size);
+	return MV_ERROR;
+    }
+
+    /* Size parameter validity check.			*/
+    if (!MV_IS_POWER_OF_2(pAddrDecWin->addrWin.size)) {
+	mvOsPrintf("mvPdmaWinWrite: Illegal window size.\n");
+	return MV_ERROR;
+    }
+
+    baseReg = MV_REG_READ(PDMA_WINDOW_BASE_REG(winNum));
+    sizeReg = MV_REG_READ(PDMA_WINDOW_CONTROL_REG(winNum));
+
+    /* Write to address decode Base Address Register	*/
+    baseReg &= ~PDMA_WIN_BASE_MASK;
+    baseReg |= (pAddrDecWin->addrWin.baseLow & PDMA_WIN_BASE_MASK);
+
+    /* set size */
+    sizeToReg = (pAddrDecWin->addrWin.size / PDMA_WIN_SIZE_GRANULARITY) - 1;
+    sizeReg &= ~PDMA_WIN_SIZE_MASK;
+    sizeReg |= (sizeToReg << PDMA_WIN_SIZE_OFFS);
+
+    /* set attributes */
+    sizeReg &= ~PDMA_WIN_ATTR_MASK;
+    sizeReg |= pAddrDecWin->attrib << PDMA_WIN_ATTR_OFFS;
+
+    /* set target ID */
+    sizeReg &= ~PDMA_WIN_TARGET_MASK;
+    sizeReg |= pAddrDecWin->targetId << PDMA_WIN_TARGET_OFFS;
+
+    /* for the safe side we disable the window before writing the new values */
+    mvPdmaWinEnable(winNum,MV_FALSE);
+
+    MV_REG_WRITE(PDMA_WINDOW_BASE_REG(winNum), baseReg);
+
+    /* Write to address decode Size Register                             */
+    MV_REG_WRITE(PDMA_WINDOW_CONTROL_REG(winNum), sizeReg);
+
+    /* Enable address decode target window                               */
+    if (pAddrDecWin->enable == MV_TRUE)
+	mvPdmaWinEnable(winNum, MV_TRUE);
+
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvPdmaWinRead
+*
+* DESCRIPTION:
+*	Read PDMA peripheral target address window.
+*
+* INPUT:
+*       winNum - PDMA to target address decode window number.
+*
+* OUTPUT:
+*       pAddrDecWin - PDMA target window data structure.
+*
+* RETURN:
+*	MV_BAD_PARAM if winNum is invalid.
+*	MV_ERROR otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvPdmaWinRead(MV_U32 winNum, MV_UNIT_WIN_INFO *pAddrDecWin)
+{
+    MV_U32 sizeReg, baseReg;
+    MV_U32 sizeRegVal;
+
+    /* Parameter checking   */
+    if (winNum >= PDMA_MAX_ADDR_DEC_WIN) {
+	mvOsPrintf("mvPdmaWinGet: ERR. Invalid winNum %d\n", winNum);
+	return MV_NOT_SUPPORTED;
+    }
+
+    baseReg = MV_REG_READ(PDMA_WINDOW_BASE_REG(winNum));
+    sizeReg = MV_REG_READ(PDMA_WINDOW_CONTROL_REG(winNum));
+
+    /* base and size */
+    sizeRegVal = (sizeReg & PDMA_WIN_SIZE_MASK) >> PDMA_WIN_SIZE_OFFS;
+    pAddrDecWin->addrWin.size = (sizeRegVal + 1) * PDMA_WIN_SIZE_GRANULARITY;
+    pAddrDecWin->addrWin.baseLow = (baseReg & PDMA_WIN_BASE_MASK)/* >> PDMA_WIN_BASE_OFFS*/;
+    pAddrDecWin->addrWin.baseHigh = 0;
+
+    /* attrib and targetId */
+    pAddrDecWin->attrib = (sizeReg & PDMA_WIN_ATTR_MASK) >> PDMA_WIN_ATTR_OFFS;
+    pAddrDecWin->targetId = (sizeReg & PDMA_WIN_TARGET_MASK) >> PDMA_WIN_TARGET_OFFS;
+
+    /* Check if window is enabled   */
+    if (sizeReg & PDMA_WIN_EN)
+	pAddrDecWin->enable = MV_TRUE;
+    else
+    	pAddrDecWin->enable = MV_FALSE;
+
+    return MV_OK;
+}
+
+
+/*******************************************************************************
+* pdmaWinOverlapDetect - Detect PDMA address windows overlapping
+*
+* DESCRIPTION:
+*       An unpredicted behaviur is expected in case PDMA address decode 
+*       windows overlapps.
+*       This function detects PDMA address decode windows overlapping of a 
+*       specified window. The function does not check the window itself for 
+*       overlapping. The function also skipps disabled address decode windows.
+*
+* INPUT:
+*       winNum      - address decode window number.
+*       pAddrDecWin - An address decode window struct.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE if the given address window overlap current address
+*       decode map, MV_FALSE otherwise, MV_ERROR if reading invalid data 
+*       from registers.
+*
+*******************************************************************************/
+static MV_STATUS pdmaWinOverlapDetect(MV_U32 winNum, MV_ADDR_WIN *pAddrWin)
+{
+	MV_U32		 winControlReg;
+	MV_U32		 winNumIndex;
+	MV_UNIT_WIN_INFO addrDecWin;
+
+	/* Read base address enable register. Do not check disabled windows */
+	winControlReg = MV_REG_READ(PDMA_WINDOW_CONTROL_REG(winNum));
+
+	for (winNumIndex = 0; winNumIndex < PDMA_MAX_ADDR_DEC_WIN; winNumIndex++)
+	{
+		/* Do not check window itself		*/
+		if (winNumIndex == winNum)
+		{
+			continue;
+		}
+
+		/* Do not check disabled windows	*/
+		if (!(winControlReg & PDMA_WIN_EN))
+		{
+			continue;
+		}
+
+		/* Get window parameters 	*/
+		if (MV_OK != mvPdmaWinRead(winNumIndex, &addrDecWin))
+		{
+			mvOsPrintf("pdmaWinOverlapDetect: mvPdmaWinGet returned error\n");
+            		return MV_ERROR;
+		}
+
+		if (MV_TRUE == mvWinOverlapTest(pAddrWin, &(addrDecWin.addrWin)))
+		{
+			mvOsPrintf("pdmaWinOverlapDetect: ctrlWinOverlapTest returned error\n");
+			return MV_TRUE;
+		}        
+	}
+	return MV_FALSE;
+}
+
+
+/*******************************************************************************
+* mvPdmaWinEnable - Enable/disable a PDMA to target address window
+*
+* DESCRIPTION:
+*       This function enable/disable a PDMA to target address window.
+*       According to parameter 'enable' the routine will enable the 
+*       window, thus enabling PDMA accesses (before enabling the window it is 
+*       tested for overlapping). Otherwise, the window will be disabled.
+*
+* INPUT:
+*       winNum - PDMA to target address decode window number.
+*       enable - Enable/disable parameter.
+*
+* OUTPUT:
+*       N/A
+*
+* RETURN:
+*       MV_ERROR if decode window number was wrong or enabled window overlapps.
+*
+*******************************************************************************/
+MV_STATUS mvPdmaWinEnable(MV_U32 winNum,MV_BOOL enable)
+{
+    /* Parameter checking   */
+    if (winNum >= PDMA_MAX_ADDR_DEC_WIN) {
+	mvOsPrintf("mvPdmaWinEnable:ERR. Invalid winNum%d\n",winNum);
+	return MV_ERROR;
+    }
+
+    if (enable == MV_TRUE)
+	MV_REG_BIT_SET(PDMA_WINDOW_CONTROL_REG(winNum), PDMA_WIN_EN);
+    else
+	/* Disable address decode target window */
+	MV_REG_BIT_RESET(PDMA_WINDOW_CONTROL_REG(winNum), PDMA_WIN_EN);
+
+    return MV_OK;
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/pdma/mvPdma.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/pdma/mvPdma.h
@@ -0,0 +1,223 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+/*******************************************************************************
+* mvPdma.h - Header File for :
+*
+* DESCRIPTION:
+*       This file contains Marvell Controller PDMA HW library API.
+*       NOTE: This HW library API assumes PDMA source, destination and 
+*       descriptors are cache coherent. 
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+
+#ifndef __INCmvPdmah
+#define __INCmvPdmah
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvSysPdmaConfig.h"
+
+/* defines and enumerations */
+
+#define MV_PDMA_DEBUG
+
+#define MV_PDMA_MAX_CHANNELS_NUM	16	/* maximum number of PDMA channels */
+#define MV_PDMA_DESC_ALIGNMENT		0x10	/* 16-byte aligment restriction */
+#define MV_PDMA_MAX_TRANSFER_SIZE	8191	/* maximum 8KByte minus 1 */
+
+/* use for enabling the PDMA unit interrupts		*/
+/* pass as a bitmask OR, for example:			*/
+/* (MV_PDMA_END_INTR_EN | MV_PDMA_START_INTR_EN)	*/
+/* To identify normal channel stop it is recommended	*/
+/* to use MV_PDMA_END_INTR_EN and not MV_PDMA_STOP_INTR_EN */
+#define MV_PDMA_END_INTR_EN		DCMD_ENDIRQEN
+#define MV_PDMA_START_INTR_EN		DCMD_STARTIRQEN
+#define MV_PDMA_STOP_INTR_EN		DCSR_STOPIRQEN
+#define MV_PDMA_REQ_AFTER_STOP_INTR_EN	DCSR_RASIRQEN
+#define MV_PDMA_END_OF_RX_INTR_EN	DCSR_EORIRQEN
+
+/* Note: do not change the values for these enumerations, */
+/* they are used in mvPdmaChanAlloc() as indices to chanMapRequestOffsetTable. */
+typedef enum {
+
+	MV_PDMA_AC97_MIC =		0, 
+	MV_PDMA_AC97_MODEM_RX =		1, 
+	MV_PDMA_AC97_MODEM_TX =		2, 
+	MV_PDMA_AC97_AUDIO_RX =		3, 
+	MV_PDMA_AC97_AUDIO_TX =		4, 
+	MV_PDMA_AC97_SURROUND_TX =	5, 
+	MV_PDMA_AC97_CENTER_TX =	6, 
+	MV_PDMA_NAND_DATA =		7, 
+	MV_PDMA_NAND_COMMAND =		8, 
+	MV_PDMA_SSP_RX =		9, 
+	MV_PDMA_SSP_TX =		10, 
+	MV_PDMA_MEMORY =		11	/* Note: MUST be last enum */
+	
+} MV_PDMA_PERIPH_TYPE;
+
+typedef enum {
+
+	MV_PDMA_PERIPH_TO_MEM, 
+	MV_PDMA_MEM_TO_PERIPH, 
+	MV_PDMA_MEM_TO_MEM
+
+} MV_PDMA_TRANSACTION_TYPE;
+
+typedef enum {
+
+	MV_PDMA_CHANNEL_STOPPED, 
+	MV_PDMA_CHANNEL_RUNNING, 
+	MV_PDMA_CHANNEL_ERROR
+
+} MV_PDMA_CHAN_STATE;
+
+/* typedefs */
+
+/* This struct describes PDMA channel */
+typedef struct _mvPdmaChannel 
+{
+	MV_U8 chanNumber;
+	MV_PDMA_PERIPH_TYPE periphType;
+	MV_U8 srcFlowControl;
+	MV_U8 dstFlowCtrl;
+	MV_U32 intrEnMask;
+	MV_U32 burstSize;
+	MV_U32 width;
+	
+} MV_PDMA_CHANNEL;
+
+/* This struct describes PDMA descriptor structure */
+typedef struct _mvPdmaDesc
+{
+    MV_U32 	physDescPtr;	/* The physical address of the next descriptor, and a STOP flag bit */
+    MV_U32 	physSrcAddr;	/* The physical source address                  */
+    MV_U32 	physDestAddr;	/* The physical destination address             */
+    MV_U32	commandValue;	/* The Command value, including transfer size	*/
+
+} MV_PDMA_DESC;
+
+#define MV_PDMA_DESC_SIZE	(sizeof(MV_PDMA_DESC))
+
+
+/* mvPdma.h API list */
+MV_STATUS mvPdmaHalInit(MV_U8 pdmaNumChannels);
+
+MV_STATUS mvPdmaChanAlloc(MV_PDMA_PERIPH_TYPE chanType, 
+			MV_U32 intrEnMask, 
+			MV_PDMA_CHANNEL *chanHndl);
+
+MV_STATUS mvPdmaChanFree(MV_PDMA_CHANNEL *chanHndl);
+
+MV_PDMA_CHAN_STATE mvPdmaChannelStateGet(MV_PDMA_CHANNEL *chanHndl);
+
+MV_VOID mvPdmaChanRegsPrint(MV_PDMA_CHANNEL *chanHndl);
+
+MV_STATUS mvPdmaChanTransfer(MV_PDMA_CHANNEL *chanHndl, 
+				MV_PDMA_TRANSACTION_TYPE transType, 
+				MV_U32 phySrcAddr, 
+				MV_U32 phyDstAddr, 
+				MV_U16 size, 
+				MV_U32 phyNextDescriptor);
+
+MV_STATUS mvPdmaMemInit(MV_PDMA_CHANNEL *chanHndl, 
+			MV_U32 phyPatternPtr, 
+			MV_U32 phyDstAddr, 
+			MV_U16 size);
+
+MV_U32 mvPdmaCommandRegCalc(MV_PDMA_CHANNEL *chanHndl, 
+				MV_PDMA_TRANSACTION_TYPE transType, 
+				MV_U16 size);
+MV_STATUS mvPdmaCommandIntrEnable( MV_PDMA_CHANNEL *chanHndl,
+				MV_U32 *command);
+MV_STATUS mvPdmaUnitStateStore(MV_U32 *stateData, MV_U32 *len);
+
+MV_STATUS mvPdmaWinInit(MV_UNIT_WIN_INFO *addrWinMap);
+MV_STATUS mvPdmaWinWrite(MV_U32 winNum, MV_UNIT_WIN_INFO *pAddrDecWin);
+MV_STATUS mvPdmaWinRead(MV_U32 winNum, MV_UNIT_WIN_INFO *pAddrDecWin);
+MV_STATUS mvPdmaWinEnable(MV_U32 winNum,MV_BOOL enable);
+
+#ifdef MV_PDMA_DEBUG
+
+MV_STATUS mvPdmaSrcAddrRegSet (MV_U8 chan, MV_U32 value);
+MV_STATUS mvPdmaDstAddrRegSet(MV_U8 chan, MV_U32 value);
+MV_STATUS mvPdmaCmdRegSet(MV_U8 chan, MV_U32 value);
+MV_STATUS mvPdmaCntrlRegSet(MV_U8 chan, MV_U32 value);
+
+#endif /* MV_PDMA_DEBUG */
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* __INCmvPdmah */
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/pdma/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/pdma/Makefile
@@ -0,0 +1,4 @@
+include $(srctree)/$(subst ",,$(CONFIG_MV_HAL_RULES_PATH))
+# Objects list
+obj-$(CONFIG_MV_INCLUDE_NFC) += mvPdma.o
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/pdma/mvPdmaRegs.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/pdma/mvPdmaRegs.h
@@ -0,0 +1,194 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCmvPdmaSpech
+#define __INCmvPdmaSpech
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+#include "mvSysPdmaConfig.h"
+
+#define PDMA_CHAN_MAP_REG_BASE			(MV_PDMA_REGS_BASE + 0x100)
+#define PDMA_DESC_REG_BASE			(MV_PDMA_REGS_BASE + 0x200)
+/* PDMA channel registers */
+#define PDMA_CTRL_STATUS_REG(chan)		(MV_PDMA_REGS_BASE + ((chan) * 0x4))
+#define PDMA_REQUEST_CHAN_MAP_REG(chan)		(PDMA_CHAN_MAP_REG_BASE + ((chan) * 0x4))
+#define PDMA_DESC_ADDR_REG(chan)		(PDMA_DESC_REG_BASE + ((chan) * 0x10))
+#define PDMA_SRC_ADDR_REG(chan)			(PDMA_DESC_REG_BASE + 0x4 + ((chan) * 0x10))
+#define PDMA_DST_ADDR_REG(chan)			(PDMA_DESC_REG_BASE + 0x8 + ((chan) * 0x10))
+#define PDMA_COMMAND_REG(chan)			(PDMA_DESC_REG_BASE + 0xC + ((chan) * 0x10))
+
+/* PDMA Address Decoding Base and Control Registers */ 
+#define PDMA_WINDOW_BASE_REG(winNum)		(MV_PDMA_REGS_BASE + 0x4000 + ((winNum) << 3))
+#define PDMA_WINDOW_CONTROL_REG(winNum)		(MV_PDMA_REGS_BASE + 0x4004 + ((winNum) << 3))
+
+/* PDMA Alignment Register */
+#define PDMA_ALIGNMENT_REG			(MV_PDMA_REGS_BASE + 0xA0)
+
+/* PDMA Interrupt Register */
+#define PDMA_INTR_CAUSE_REG			(MV_PDMA_REGS_BASE + 0xF0)
+
+/* PDMA register fields */
+
+/* PDMA Request to Channel Map Register (DRCMRx) */
+#define DRCMR_CHLNUM_OFFS			0	/* Valid Channel Number Offset */
+#define DRCMR_CHLNUM_MASK			(0x1F << DRCMR_CHLNUM_OFFS)	/* Valid Channel Number */
+#define DRCMR_MAPVLD_BIT			BIT7	/* Map Valid Channel */
+
+/* PDMA Descriptor Address Register (DDADRx) */
+#define DDADR_STOP				BIT0	/* Stop channel after processing this descriptor */
+#define DDADR_BREN				BIT1	/* Enable descriptor branch */
+#define DDADR_DESC_ADDR_OFFSET			4	/* Descriptor address */
+#define DDADR_DESC_ADDR_MASK			(0x0FFFFFFF << DDADR_DESC_ADDR_OFFSET)
+
+/* PDMA Command Register (DCMDx) */
+#define DCMD_SIZE_8_BYTES			1
+#define DCMD_SIZE_16_BYTES			2
+#define DCMD_SIZE_32_BYTES			3
+
+#define DCMD_W_1_BYTE				1
+#define DCMD_W_2_BYTE				2
+#define DCMD_W_4_BYTE				3
+#define DCMD_W_8_BYTE				0
+
+#define DCMD_LEN_OFFS				0	/* Length of the transfer in bytes */
+#define DCMD_LEN_MASK				(0x1FFF << DCMD_LEN_OFFS)
+#define DCMD_OVERREAD				13	/* Over-read bit */
+#define DCMD_WIDTH_OFFS				14	/* Width of the on-chip peripheral */
+#define DCMD_WIDTH_MASK				(0x3 << DCMD_WIDTH_OFFS)
+#define DCMD_WIDTH_1_BYTE			(DCMD_W_1_BYTE << DCMD_WIDTH_OFFS)
+#define DCMD_WIDTH_2_BYTE			(DCMD_W_2_BYTE << DCMD_WIDTH_OFFS)
+#define DCMD_WIDTH_4_BYTE			(DCMD_W_4_BYTE << DCMD_WIDTH_OFFS)
+#define DCMD_WIDTH_8_BYTE			(DCMD_W_8_BYTE << DCMD_WIDTH_OFFS)
+#define DCMD_BURST_OFFS				16	/* Maximum burst size of each data transfer */
+#define DCMD_BURST_MASK				(0x3 << DCMD_BURST_OFFS)
+#define DCMD_BURST_8_BYTES			(DCMD_SIZE_8_BYTES << DCMD_BURST_OFFS)
+#define DCMD_BURST_16_BYTES			(DCMD_SIZE_16_BYTES << DCMD_BURST_OFFS)
+#define DCMD_BURST_32_BYTES			(DCMD_SIZE_32_BYTES << DCMD_BURST_OFFS)
+#define DCMD_ENDIRQEN				BIT21	/* End interrupt enable */
+#define DCMD_STARTIRQEN				BIT22	/* Start interrupt enable */
+#define DCMD_ADDRMODE				BIT23	/* Addressing mode */
+#define DCMD_CMPEN				BIT25	/* Descriptor compare enable */
+#define DCMD_FLOWTRG				BIT28	/* Destination flow control */
+#define DCMD_FLOWSRC				BIT29	/* Source flow control */
+#define DCMD_INCTRGADDR				BIT30	/* Destination address increment */
+#define DCMD_INCSRCADDR				BIT31	/* Source address increment */
+
+/* 32 bytes burst, 4 bytes width */
+#define DCMD_DEF_VALUE				(DCMD_BURST_32_BYTES | DCMD_WIDTH_4_BYTE)
+
+/* PDMA Channel Control/Status Register (DCSRx) */
+#define DCSR_BUSERRINTR				BIT0	/* Bus error interrupt */
+#define DCSR_STARTINTR				BIT1	/* Start interrupt */
+#define DCSR_ENDINTR				BIT2	/* End interrupt */
+#define DCSR_STOPINTR				BIT3	/* Stop interrupt */
+#define DCSR_RASINTR				BIT4	/* Request after channel stopped interrupt */
+#define DCSR_REQPEND				BIT8	/* Request pending */
+#define DCSR_EORINT				BIT9	/* End of receive interrupt */
+#define DCSR_CMPST				BIT10	/* Descriptor compare status */
+#define DCSR_MASKRUN				BIT22	/* Mask DCSR[RUN] during a programmed IO write to DCSR */
+#define DCSR_RASIRQEN				BIT23	/* Request after channel stopped interrupt enable */
+#define DCSR_EORSTOPEN				BIT26	/* Stop channel on end of receive */
+#define DCSR_EORJMPEN				BIT27	/* Jump to the next descriptor on end of receive */
+#define DCSR_EORIRQEN				BIT28	/* End of receive interrupt enable */
+#define DCSR_STOPIRQEN				BIT29	/* Stop interrupt enable */
+#define DCSR_NODESCFETCH			BIT30	/* No descriptor fetch transfer */
+#define DCSR_RUN				BIT31	/* Run - start the channel */
+
+/* write '1' to clear interrupts */
+#define DCSR_DEF_VALUE				DCSR_EORINT	| \
+						DCSR_RASINTR	| \
+						DCSR_STOPINTR	| \
+						DCSR_ENDINTR	| \
+						DCSR_STARTINTR	| \
+						DCSR_BUSERRINTR
+
+/* General PDMA */
+#define PDMA_MAX_ADDR_DEC_WIN		4	/* Maximum address decode windows */
+
+ 
+/* PDMA Window Base Register */
+#define PDMA_WIN_BASE_OFFS		16	/* Base address */
+#define PDMA_WIN_BASE_MASK		(0xFFFF << PDMA_WIN_BASE_OFFS)
+
+/* PDMA Window Control Register */
+#define PDMA_WIN_EN			BIT0	/* Window enable */
+#define PDMA_WIN_WRBL			BIT1	/* Write to crossbar burst limit */	
+#define PDMA_WIN_TARGET_OFFS		4	/* The target interface associated with window */		
+#define PDMA_WIN_TARGET_MASK		(0xF << PDMA_WIN_TARGET_OFFS)
+#define PDMA_WIN_ATTR_OFFS		8	/* The target attributes associated with window */
+#define PDMA_WIN_ATTR_MASK		(0xFF << PDMA_WIN_ATTR_OFFS)
+#define PDMA_WIN_SIZE_OFFS		16	/* Window size */
+#define PDMA_WIN_SIZE_MASK		(0xFFFF << PDMA_WIN_SIZE_OFFS)
+
+#define PDMA_WIN_SIZE_GRANULARITY	0x10000
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif	/* __INCmvPdmaSpech */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/pdma/mvCompVer.txt
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/pdma/mvCompVer.txt
@@ -0,0 +1,4 @@
+Global HAL Version: DOVE_HAL_3_1_2
+Unit HAL Version: 1.0.2
+Description: This component includes an implementation of the unit HAL drivers
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/nfc/mvNfc.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/nfc/mvNfc.h
@@ -0,0 +1,420 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCMVNFCH
+#define __INCMVNFCH
+
+/******************************************************************************
+ * Usage model:
+ *	The following describes the usage model for the below APIs.
+ *	the sequences below does not handle errors, and assume all stages pass 
+ *	successfully.
+ *	Nand Read of 2 pages, PDMA mode:
+ *		- mvNfcInit(MV_NFC_PDMA_ACCESS)
+ *		- mvNfcSelectChip(...)
+ *		- [If interrupt mode]
+ *		  Enable RD_DATA_REQ & CMD_DONE interrupts.
+ *		- mvNfcCommandIssue(MV_NFC_CMD_READ)
+ *		- [In interrupt mode]
+ *		  Block till one of the above interrupts is triggered.
+ *		- [In polling mode]
+ *		  Poll on mvNfcStatusGet() till STATUS_RDD_REQ is returned.
+ *		- [In interrupt mode]
+ *		  Disable the RD_DATA_REQ interrupt.
+ *		- mvNfcReadWrite()
+ *		- Block till CMD_DONE interrupt is issued (Or Error).
+ *		  OR
+ *		  Poll on mvNfcStatusGet() till CMD_DONE is returned. (Or Error).
+ *		- Wait for PDMA done interrupt to signal data ready in buffer.
+ *		==> At this stage, data is ready in the read buffer.
+ *		- [If interrupt mode]
+ *		  Enable RD_DATA_REQ & CMD_DONE interrupts.
+ *		- mvNfcCommandIssue(MV_NFC_CMD_READ_LAST_NAKED)
+ *		- [In interrupt mode]
+ *		  Block till one of the above interrupts is triggered.
+ *		- [In polling mode]
+ *		  Poll on mvNfcStatusGet() till STATUS_RDD_REQ is returned.
+ *		- [In interrupt mode]
+ *		  Disable the RD_DATA_REQ interrupt.
+ *		- mvNfcReadWrite()
+ *		- Block till CMD_DONE interrupt is issued (Or Error).
+ *		  OR
+ *		  Poll on mvNfcStatusGet() till CMD_DONE is returned. (Or Error).
+ *		- Wait for PDMA done interrupt to signal data ready in buffer.
+ *		==> At this stage, second page data is ready in the read buffer.
+ *		- mvNfcSelectChip(MV_NFC_CS_NONE)
+ *
+ *	Nand Write of single page, PIO mode:
+ *		- mvNfcInit(MV_NFC_PIO_ACCESS)
+ *		- mvNfcSelectChip(...)
+ *		- [If interrupt mode]
+ *		  Enable WR_DATA_REQ & CMD_DONE interrupts.
+ *		- mvNfcCommandIssue(MV_NFC_CMD_WRITE_MONOLITHIC)
+ *		- [In interrupt mode]
+ *		  Block till one of the above interrupts is triggered.
+ *		- [In polling mode]
+ *		  Poll on mvNfcStatusGet() till STATUS_WRD_REQ is returned.
+ *		- [In interrupt mode]
+ *		  Disable the WR_DATA_REQ interrupt.
+ *		- mvNfcReadWrite()
+ *		- Block till CMD_DONE interrupt is issued (Or Error).
+ *		  OR
+ *		  Poll on mvNfcStatusGet() till CMD_DONE is returned. (Or Error).
+ *		==> At this stage, data was written to the flash device.
+ *		- mvNfcSelectChip(MV_NFC_CS_NONE)
+ *
+ *	Nand Erase of a single block:
+ *		- mvNfcInit(...)
+ *		- mvNfcSelectChip(...)
+ *		- [If interrupt mode]
+ *		  Enable CMD_DONE interrupts.
+ *		- mvNfcCommandIssue(MV_NFC_CMD_ERASE)
+ *		- [In interrupt mode]
+ *		  Block till the above interrupt is triggered.
+ *		- [In polling mode]
+ *		  Poll on mvNfcStatusGet() till STATUS_CMD_DONE is returned.
+ *		==> At this stage, flash block was erased from the flash device.
+ *		- mvNfcSelectChip(MV_NFC_CS_NONE)
+ *
+ ******************************************************************************/
+
+
+#ifdef __cplusplus
+extern "C" { 
+#endif
+
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvSysNfcConfig.h"
+
+/********************************/
+/* Enums and structures 	*/
+/********************************/
+
+/* Maximum Chain length */
+#define MV_NFC_MAX_DESC_CHAIN		0x800
+
+/* Supported page sizes */
+#define MV_NFC_512B_PAGE		512
+#define MV_NFC_2KB_PAGE			2048
+#define MV_NFC_4KB_PAGE			4096
+#define MV_NFC_8KB_PAGE			8192
+
+#define MV_NFC_MAX_CHUNK_SIZE		(2048)
+
+/* Nand controller status bits.		*/
+#define MV_NFC_STATUS_CMD_REQ 		0x1
+#define MV_NFC_STATUS_RDD_REQ 		0x2
+#define MV_NFC_STATUS_WRD_REQ 		0x4
+#define MV_NFC_STATUS_COR_ERROR 	0x8
+#define MV_NFC_STATUS_UNC_ERROR 	0x10
+#define MV_NFC_STATUS_BBD 		0x20	/* Bad Block Detected */
+#define MV_NFC_STATUS_CMDD 		0x80	/* Command Done */
+#define MV_NFC_STATUS_PAGED 		0x200	/* Page Done */
+#define MV_NFC_STATUS_RDY		0x800	/* Device Ready */
+
+/* Nand controller interrupt bits.	*/
+#define MV_NFC_WR_CMD_REQ_INT		0x1
+#define MV_NFC_RD_DATA_REQ_INT		0x2
+#define MV_NFC_WR_DATA_REQ_INT		0x4
+#define MV_NFC_CORR_ERR_INT		0x8
+#define MV_NFC_UNCORR_ERR_INT		0x10
+#define MV_NFC_CS1_BAD_BLK_DETECT_INT	0x20
+#define MV_NFC_CS0_BAD_BLK_DETECT_INT	0x40
+#define MV_NFC_CS1_CMD_DONE_INT		0x80
+#define MV_NFC_CS0_CMD_DONE_INT		0x100
+#define MV_NFC_DEVICE_READY_INT		0x800
+
+/* Max number of buffers chunks for as single read / write operation */
+#define MV_NFC_RW_MAX_BUFF_NUM		16
+
+/* ECC mode options.			*/
+typedef enum {
+	MV_NFC_ECC_HAMMING = 0,
+	MV_NFC_ECC_BCH_2K,
+	MV_NFC_ECC_BCH_1K,
+	MV_NFC_ECC_BCH_704B,
+	MV_NFC_ECC_BCH_512B,
+	MV_NFC_ECC_DISABLE,
+	MV_NFC_ECC_MAX_CNT
+}MV_NFC_ECC_MODE;
+
+
+typedef enum {
+	MV_NFC_PIO_ACCESS,
+	MV_NFC_PDMA_ACCESS
+}MV_NFC_IO_MODE;
+
+typedef enum {
+	MV_NFC_PIO_READ,
+	MV_NFC_PIO_WRITE,
+	MV_NFC_PIO_NONE
+}MV_NFC_PIO_RW_MODE;
+
+
+typedef enum {
+	MV_NFC_IF_1X8,
+	MV_NFC_IF_1X16,
+	MV_NFC_IF_2X8
+}MV_NFC_IF_MODE;
+
+
+/* Flash device CS.			*/
+typedef enum {
+	MV_NFC_CS_0,
+	MV_NFC_CS_1,
+	MV_NFC_CS_2,
+	MV_NFC_CS_3,
+	MV_NFC_CS_NONE
+}MV_NFC_CHIP_SEL;
+
+
+/*
+ * 	ioMode		The access mode by which the unit will operate (PDMA / PIO).
+ * 	eccMode		The ECC mode to configure the controller to.
+ * 	ifMode		The NAND chip connection mode, 8-bit / 16-bit / gang mode.
+ * 	autoStatusRead	Whether to automatically read the flash status after each 
+ *			erase / write commands.
+ *	tclk		System TCLK.
+ * 	readyBypass	Whether to wait for the RnB sugnal to be deasserted after
+ *			waiting the tR or skip it and move directly to the next step.
+ * 	osHandle	OS specific handle used for allocating command buffer
+ *	regsPhysAddr	Physical address of internal registers (used in DMA
+ *			mode only)
+ *	dataPdmaIntMask Interrupt mask for PDMA data channel (used in DMA mode
+ *			only).
+ *	cmdPdmaIntMask	Interrupt mask for PDMA command channel (used in DMA
+ *			mode only). 
+ */
+typedef struct {
+	MV_NFC_IO_MODE 		ioMode;
+	MV_NFC_ECC_MODE 	eccMode;
+	MV_NFC_IF_MODE 		ifMode;
+	MV_BOOL 		autoStatusRead;
+	MV_U32			tclk;
+	MV_BOOL			readyBypass;
+	MV_VOID *		osHandle;
+	MV_U32			regsPhysAddr;
+	MV_U32			dataPdmaIntMask;
+	MV_U32			cmdPdmaIntMask;	
+}MV_NFC_INFO;
+
+
+typedef enum {
+	MV_NFC_CMD_READ_ID = 0,
+	MV_NFC_CMD_READ_STATUS,
+	MV_NFC_CMD_ERASE,
+	MV_NFC_CMD_MULTIPLANE_ERASE,
+	MV_NFC_CMD_RESET,
+
+	MV_NFC_CMD_CACHE_READ_SEQ,
+	MV_NFC_CMD_CACHE_READ_RAND,
+	MV_NFC_CMD_EXIT_CACHE_READ,
+	MV_NFC_CMD_CACHE_READ_START,
+	MV_NFC_CMD_READ_MONOLITHIC,
+	MV_NFC_CMD_READ_MULTIPLE,
+	MV_NFC_CMD_READ_NAKED,
+	MV_NFC_CMD_READ_LAST_NAKED,
+	MV_NFC_CMD_READ_DISPATCH,
+
+	MV_NFC_CMD_WRITE_MONOLITHIC,
+	MV_NFC_CMD_WRITE_MULTIPLE,
+	MV_NFC_CMD_WRITE_NAKED,
+	MV_NFC_CMD_WRITE_LAST_NAKED,
+	MV_NFC_CMD_WRITE_DISPATCH,
+	MV_NFC_CMD_WRITE_DISPATCH_START,
+	MV_NFC_CMD_WRITE_DISPATCH_END,
+
+	MV_NFC_CMD_COUNT	/* This should be the last enum */
+
+}MV_NFC_CMD_TYPE;
+
+
+/*
+ * Nand information structure.
+ * 	flashId 	The ID of the flash information structure representing the timing
+ *		    	and physical layout data of the flash device.
+ *	cmdsetId  	The ID of the command-set structure holding the access 
+ *		   	commands for the flash device.
+ *      flashWidth 	Flash device interface width in bits.
+ * 	autoStatusRead	Whether to automatically read the flash status after each 
+ *		    	erase / write commands.
+ * 	tclk		System TCLK.
+ * 	readyBypass	Whether to wait for the RnB signal to be deasserted after
+ * 			waiting the tR or skip it and move directly to the next step.
+ *      ioMode		Controller access mode (PDMA / PIO).
+ *      eccMode		Flash ECC mode (Hamming, BCH, None).
+ *      ifMode		Flash interface mode.
+ *      currC		The current flash CS currently being accessed.
+ *	dataChanHndl	Pointer to the data DMA channel
+ *	cmdChanHndl	Pointer to the command DMA Channel
+ *	cmdBuff		Command buffer information (used in DMA only)
+ *	regsPhysAddr	Physical address of internal registers (used in DMA
+ *			mode only)
+ *	dataPdmaIntMask Interrupt mask for PDMA data channel (used in DMA mode
+ *			only).
+ *	cmdPdmaIntMask	Interrupt mask for PDMA command channel (used in DMA
+ *			mode only).
+ */
+typedef struct {
+	MV_U32		flashIdx;
+	MV_U32		cmdsetIdx;
+	MV_U32 		flashWidth;
+	MV_U32 		dfcWidth;
+	MV_BOOL 	autoStatusRead;
+	MV_BOOL		readyBypass;
+	MV_NFC_IO_MODE 	ioMode;
+	MV_NFC_ECC_MODE eccMode;
+	MV_NFC_IF_MODE 	ifMode;
+	MV_NFC_CHIP_SEL currCs;
+	MV_PDMA_CHANNEL dataChanHndl;
+	MV_PDMA_CHANNEL cmdChanHndl;
+	MV_BUF_INFO	cmdBuff;
+	MV_BUF_INFO	cmdDescBuff;
+	MV_BUF_INFO	dataDescBuff;
+	MV_U32		regsPhysAddr;
+	MV_U32		dataPdmaIntMask;
+	MV_U32		cmdPdmaIntMask;
+}MV_NFC_CTRL;
+
+/*
+ * Nand multi command information structure.
+ *	cmd		The command to be issued.
+ *	pageAddr	The flash page address to operate on.
+ *	pageCount	Number of pages to read / write.
+ *	virtAddr	The virtual address of the buffer to copy data to /
+ *			from (For relevant commands).
+ *	physAddr	The physical address of the buffer to copy data to /
+ *			from (For relevant commands).
+ *	The following parameters might only be used when working in Gagned PDMA 
+ *	and the pageCount must be set to 1.
+ *	For ganged mode, the use might need to split the NAND stack read / 
+ *	write buffer into several buffers according to what the HW expects.
+ *	e.g. NAND stack expects data in the following format: 
+ *	---------------------------
+ *	| Data (4K) | Spare | ECC |
+ *	---------------------------
+ *	While NAND controller expects data to be in the following format:
+ *	-----------------------------------------------------
+ *	| Data (2K) | Spare | ECC | Data (2K) | Spare | ECC |
+ *	-----------------------------------------------------
+ *	numSgBuffs	Number of buffers to split the HW buffer into
+ *			If 1, then buffOffset & buffSize are ignored.
+ *	sgBuffAddr	Array holding the address of the buffers into which the
+ *			HW data should be split (Or read into).
+ *	sgBuffSize	Array holding the size of each sub-buffer, entry "i"
+ *			represents the size in bytes of the buffer starting at
+ *			offset buffOffset[i].
+ */
+typedef struct {
+	MV_NFC_CMD_TYPE cmd;
+	MV_U32		pageAddr;
+	MV_U32		pageCount;
+	MV_U32 		*virtAddr;
+	MV_U32		physAddr;
+	MV_U32		numSgBuffs;
+	MV_U32		sgBuffAddr[MV_NFC_RW_MAX_BUFF_NUM];
+	MV_U32		*sgBuffAddrVirt[MV_NFC_RW_MAX_BUFF_NUM];
+	MV_U32		sgBuffSize[MV_NFC_RW_MAX_BUFF_NUM];
+	MV_U32		length;
+}MV_NFC_MULTI_CMD;
+
+typedef struct {
+	MV_U32		cmdb0;
+	MV_U32		cmdb1;
+	MV_U32		cmdb2;
+	MV_U32		cmdb3;
+}MV_NFC_CMD;
+
+
+/********************************/
+/* Functions API 		*/
+/********************************/
+
+MV_STATUS mvNfcInit(MV_NFC_INFO *nfcInfo, MV_NFC_CTRL *nfcCtrl);
+MV_STATUS mvNfcSelectChip(MV_NFC_CTRL *nfcCtrl, MV_NFC_CHIP_SEL chip);
+MV_STATUS mvNfcCommandPio(MV_NFC_CTRL *nfcCtrl, MV_NFC_MULTI_CMD * cmd_desc, MV_BOOL next);
+MV_STATUS mvNfcCommandMultiple(MV_NFC_CTRL *nfcCtrl, MV_NFC_MULTI_CMD *descInfo, MV_U32 descCnt);
+MV_U32 	  mvNfcStatusGet(MV_NFC_CTRL *nfcCtrl, MV_NFC_CMD_TYPE cmd, MV_U32 *value);
+MV_STATUS mvNfcIntrSet(MV_NFC_CTRL *nfcCtrl, MV_U32 intMask, MV_BOOL enable);
+MV_STATUS mvNfcReadWrite(MV_NFC_CTRL *nfcCtrl, MV_NFC_CMD_TYPE cmd, MV_U32 *virtBufAddr, MV_U32 physBuffAddr);
+MV_VOID   mvNfcReadWritePio(MV_NFC_CTRL *nfcCtrl, MV_U32 * buff, MV_U32 data_len, MV_NFC_PIO_RW_MODE mode);
+MV_VOID   mvNfcAddress2RowConvert(MV_NFC_CTRL *nfcCtrl, MV_U32 address, MV_U32 *row, MV_U32 *colOffset);
+MV_VOID   mvNfcAddress2BlockConvert(MV_NFC_CTRL *nfcCtrl, MV_U32 address, MV_U32 *blk);
+MV_8 * 	  mvNfcFlashModelGet(MV_NFC_CTRL *nfcCtrl);
+MV_STATUS mvNfcFlashPageSizeGet(MV_NFC_CTRL *nfcCtrl, MV_U32 *size, MV_U32 *totalSize);
+MV_STATUS mvNfcFlashBlockSizeGet(MV_NFC_CTRL *nfcCtrl, MV_U32 *size);
+MV_STATUS mvNfcFlashBlockNumGet(MV_NFC_CTRL *nfcCtrl, MV_U32 *numBlocks);
+MV_STATUS mvNfcDataLength(MV_NFC_CTRL *nfcCtrl, MV_NFC_CMD_TYPE cmd, MV_U32 *data_len);
+MV_STATUS mvNfcTransferDataLength(MV_NFC_CTRL *nfcCtrl, MV_NFC_CMD_TYPE cmd, MV_U32 * data_len);
+MV_STATUS mvNfcFlashIdGet(MV_NFC_CTRL *nfcCtrl, MV_U32 *flashId);
+MV_STATUS mvNfcUnitStateStore(MV_U32 *stateData, MV_U32 *len);
+MV_NFC_ECC_MODE mvNfcEccModeSet(MV_NFC_CTRL *nfcCtrl, MV_NFC_ECC_MODE eccMode);
+MV_U32 	  mvNfcBadBlockPageNumber(MV_NFC_CTRL *nfcCtrl);
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* __INCMVNFCH */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/nfc/mvNfc.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/nfc/mvNfc.c
@@ -0,0 +1,2242 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvSysNfcConfig.h"
+#include "mvNfcRegs.h"
+#include "pdma/mvPdma.h"
+#include "pdma/mvPdmaRegs.h"
+#include "mvNfc.h"
+
+
+/*************/
+/* Constants */
+/*************/
+
+#define NFC_NATIVE_READ_ID_CMD		0x0090
+#define NFC_READ_ID_ADDR_LEN		1
+#define NFC_ERASE_ADDR_LEN		3
+#define NFC_SP_READ_ADDR_LEN		3
+#define NFC_SP_BIG_READ_ADDR_LEN	4
+#define NFC_LP_READ_ADDR_LEN		5
+#define NFC_BLOCK_ADDR_BITS		0xFFFFFF
+#define NFC_SP_COL_OFFS			0
+#define NFC_SP_COL_MASK			(0xFF << NFC_SP_COL_OFFS)
+#define NFC_LP_COL_OFFS			0
+#define NFC_LP_COL_MASK			(0xFFFF << NFC_SP_COL_OFFS)
+#define NFC_SP_PG_OFFS			8
+#define NFC_SP_PG_MASK			(0xFFFFFF << NFC_SP_PG_OFFS)
+#define NFC_LP_PG_OFFS			16
+#define NFC_LP_PG_MASK			(0xFFFF << NFC_LP_PG_OFFS)
+#define NFC_PG_CNT_OFFS			8
+#define NFC_PG_CNT_MASK			(0xFF << NFC_PG_CNT_OFFS)
+
+#define NFC_READ_ID_PDMA_DATA_LEN	32
+#define NFC_READ_STATUS_PDMA_DATA_LEN	32
+#define NFC_READ_ID_PIO_DATA_LEN	8
+#define NFC_READ_STATUS_PIO_DATA_LEN	8
+#define NFC_RW_SP_PDMA_DATA_LEN		544
+#define NFC_RW_SP_NO_ECC_DATA_LEN	528
+#define NFC_RW_SP_HMNG_ECC_DATA_LEN	520
+#define NFC_RW_SP_G_NO_ECC_DATA_LEN	528
+#define NFC_RW_SP_G_HMNG_ECC_DATA_LEN	526
+
+#define NFC_RW_LP_PDMA_DATA_LEN		2112
+
+#define NFC_RW_LP_NO_ECC_DATA_LEN	2112
+#define NFC_RW_LP_HMNG_ECC_DATA_LEN	2088
+#define NFC_RW_LP_BCH_ECC_DATA_LEN	2080
+
+#define NFC_RW_LP_G_NO_ECC_DATA_LEN	2112
+#define NFC_RW_LP_G_HMNG_ECC_DATA_LEN	2088
+#define NFC_RW_LP_G_BCH_ECC_DATA_LEN	2080
+
+#define NFC_RW_LP_BCH1K_ECC_DATA_LEN	1024
+#define NFC_RW_LP_BCH704B_ECC_DATA_LEN	704
+#define NFC_RW_LP_BCH512B_ECC_DATA_LEN	512
+
+#define NFC_CMD_STRUCT_SIZE		(sizeof(MV_NFC_CMD))
+#define NFC_CMD_BUFF_SIZE(cmdb_0)	((cmdb_0 & NFC_CB0_LEN_OVRD_MASK) ? 16 : 12)
+#define NFC_CMD_BUFF_ADDR		(NFC_COMMAND_BUFF_0_REG_4PDMA)
+#define NFC_DATA_BUFF_ADDR		(NFC_DATA_BUFF_REG_4PDMA)
+
+/**********/
+/* Macros */
+/**********/
+#define ns_clk(ns, ns2clk)	((ns % ns2clk) ? (MV_U32)((ns/ns2clk)+1) : (MV_U32)(ns/ns2clk))
+
+#define DBGPRINT(x) 	printk x
+#define DBGLVL	 	KERN_INFO
+
+/***********/
+/* Typedef */
+/***********/
+
+/* Flash Timing Parameters */
+typedef struct {
+	/* Flash Timing */
+	MV_U32		tADL;		/* Address to write data delay */
+	MV_U32		tCH;  		/* Enable signal hold time */
+	MV_U32		tCS;  		/* Enable signal setup time */
+	MV_U32		tWH;  		/* ND_nWE high duration */
+	MV_U32		tWP;  		/* ND_nWE pulse time */
+	MV_U32		tRH;  		/* ND_nRE high duration */
+	MV_U32		tRP;  		/* ND_nRE pulse width */
+	MV_U32		tR;   		/* ND_nWE high to ND_nRE low for read */
+	MV_U32		tWHR; 		/* ND_nWE high to ND_nRE low for status read */
+	MV_U32		tAR;  		/* ND_ALE low to ND_nRE low delay */
+	MV_U32		tRHW;		/* ND_nRE high to ND_nWE low delay */
+	/* Physical Layout */
+	MV_U32 		pgPrBlk;	/* Pages per block */
+	MV_U32 		pgSz;		/* Page size */
+	MV_U32 		oobSz;		/* Page size */
+	MV_U32 		blkNum;		/* Number of blocks per device */
+	MV_U32		id;		/* Manufacturer and device IDs */
+	MV_U32		seqDis;		/* Enable/Disable sequential multipage read */
+	MV_8 *		model;		/* Flash Model string */
+	MV_U32		bb_page;	/* Page containing bad block marking */
+}MV_NFC_FLASH_INFO;
+
+/* Flash command set */
+typedef struct {
+	MV_U16		read1;
+	MV_U16		exitCacheRead;
+	MV_U16		cacheReadRand;
+	MV_U16		cacheReadSeq;
+	MV_U16		read2;
+	MV_U16		program;
+	MV_U16		readStatus;
+	MV_U16		readId;
+	MV_U16		erase;
+	MV_U16		multiplaneErase;
+	MV_U16		reset;
+	MV_U16		lock;
+	MV_U16		unlock;
+	MV_U16		lockStatus;
+} MV_NFC_FLASH_CMD_SET;
+
+/********/
+/* Data */
+/********/
+
+/* Defined Flash Types */
+MV_NFC_FLASH_INFO flashDeviceInfo[] = {
+	{			/* ST 8Gb */
+		.tADL = 0,	/* tADL, Address to write data delay */
+		.tCH = 5,	/* tCH, Enable signal hold time */
+		.tCS = 20,	/* tCS, Enable signal setup time */
+		.tWH = 12,	/* tWH, ND_nWE high duration */
+		.tWP = 12,	/* tWP, ND_nWE pulse time */
+		.tRH = 12,	/* tRH, ND_nRE high duration */
+		.tRP = 12,	/* tRP, ND_nRE pulse width */			
+		.tR = 25121, 	/* tR = tR+tRR+tWB+1, ND_nWE high to ND_nRE low for read - 25000+20+100+1 */
+		.tWHR = 60,	/* tWHR, ND_nWE high to ND_nRE low delay for status read */
+		.tAR = 10,	/* tAR, ND_ALE low to ND_nRE low delay */
+		.tRHW = 48,	/* tRHW, ND_nRE high to ND_nWE low delay */
+		.pgPrBlk = 64,	/* Pages per block - detected */
+		.pgSz = 2048,	/* Page size */
+		.oobSz = 64,	/* Spare size */ 
+		.blkNum = 2048,	/* Number of blocks/sectors in the flash */
+		.id = 0xD320,	/* Device ID 0xDevice,Vendor */
+		.model = "ST 8Gb 8bit",
+		.bb_page = 63,	/* Manufacturer Bad block marking page in block */
+	}, 
+	{			/* ST 32Gb */
+		.tADL = 0,	/* tADL, Address to write data delay */
+		.tCH = 5,	/* tCH, Enable signal hold time */
+		.tCS = 20,	/* tCS, Enable signal setup time */
+		.tWH = 10,	/* tWH, ND_nWE high duration */
+		.tWP = 12,	/* tWP, ND_nWE pulse time */
+		.tRH = 10,	/* tRH, ND_nRE high duration */
+		.tRP = 12,	/* tRP, ND_nRE pulse width */			
+		.tR = 25121, 	/* tR = tR+tRR+tWB+1, ND_nWE high to ND_nRE low for read - 25000+20+100+1 */
+		.tWHR = 80,	/* tWHR, ND_nWE high to ND_nRE low delay for status read */
+		.tAR = 10,	/* tAR, ND_ALE low to ND_nRE low delay */
+		.tRHW = 48,	/* tRHW, ND_nRE high to ND_nWE low delay */
+		.pgPrBlk = 64,	/* Pages per block - detected */
+		.pgSz = 4096,	/* Page size */
+		.oobSz = 128,	/* Spare size */ 
+		.blkNum = 16384,/* Number of blocks/sectors in the flash */
+		.id = 0xD520,	/* Device ID 0xVendor,device */
+		.model = "ST 32Gb 8bit",
+		.bb_page = 63,	/* Manufacturer Bad block marking page in block */
+	},
+
+	{			/* Samsung 16Gb */
+		.tADL = 90,	/* tADL, Address to write data delay */
+		.tCH = 0,	/* tCH, Enable signal hold time */
+		.tCS = 5,	/* tCS, Enable signal setup time */
+		.tWH = 10,	/* tWH, ND_nWE high duration */
+		.tWP = 12,	/* tWP, ND_nWE pulse time */
+		.tRH = 12,	/* tRH, ND_nRE high duration */
+		.tRP = 12,	/* tRP, ND_nRE pulse width */			
+		.tR = 49146, 	/* tR = data transfer from cell to register, maximum 60,000ns */
+		.tWHR = 66,	/* tWHR, ND_nWE high to ND_nRE low delay for status read */
+		.tAR = 66,	/* tAR, ND_ALE low to ND_nRE low delay */
+		.tRHW = 32,	/* tRHW, ND_nRE high to ND_nWE low delay 32 clocks */
+		.pgPrBlk = 128,	/* Pages per block - detected */
+		.pgSz = 2048,	/* Page size */
+		.oobSz = 64,	/* Spare size */ 
+		.blkNum = 8192,	/* Number of blocks/sectors in the flash */
+		.id = 0xD5EC,	/* Device ID 0xDevice,Vendor */
+		.model = "Samsung 16Gb 8bit",
+		.bb_page = 127,	/* Manufacturer Bad block marking page in block */
+	},
+
+	{			/* Samsung 32Gb */
+		.tADL = 0,	/* tADL, Address to write data delay */
+		.tCH = 5,	/* tCH, Enable signal hold time */
+		.tCS = 20,	/* tCS, Enable signal setup time */
+		.tWH = 10,	/* tWH, ND_nWE high duration */
+		.tWP = 15,	/* tWP, ND_nWE pulse time */
+		.tRH = 15,	/* tRH, ND_nRE high duration */
+		.tRP = 15,	/* tRP, ND_nRE pulse width */			
+		.tR = 60000, 	/* tR = data transfer from cell to register, maximum 60,000ns */
+		.tWHR = 60,	/* tWHR, ND_nWE high to ND_nRE low delay for status read */
+		.tAR = 10,	/* tAR, ND_ALE low to ND_nRE low delay */
+		.tRHW = 48,	/* tRHW, ND_nRE high to ND_nWE low delay */
+		.pgPrBlk = 128,	/* Pages per block - detected */
+		.pgSz = 4096,	/* Page size */
+		.oobSz = 128,	/* Spare size */ 
+		.blkNum = 8192,	/* Number of blocks/sectors in the flash */
+		.id = 0xD7EC,	/* Device ID 0xDevice,Vendor */
+		.model = "Samsung 32Gb 8bit",
+		.bb_page = 127,	/* Manufacturer Bad block marking page in block */
+	},
+
+	{			/* Micron 64Gb */
+		.tADL = 0,	/* tADL, Address to write data delay */
+		.tCH = 20,	/* tCH, Enable signal hold time */
+		.tCS = 20,	/* tCS, Enable signal setup time */
+		.tWH = 45,	/* tWH, ND_nWE high duration */
+		.tWP = 45,	/* tWP, ND_nWE pulse time */
+		.tRH = 45,	/* tRH, ND_nRE high duration */
+		.tRP = 45,	/* tRP, ND_nRE pulse width */			
+		.tR = 0, 	/* tR = data transfer from cell to register */
+		.tWHR = 90,	/* tWHR, ND_nWE high to ND_nRE low delay for status read */
+		.tAR = 65,	/* tAR, ND_ALE low to ND_nRE low delay */
+		.tRHW = 32,	/* tRHW, ND_nRE high to ND_nWE low delay */
+		.pgPrBlk = 256,	/* Pages per block - detected */
+		.pgSz = 8192,	/* Page size */
+		.oobSz = 448,	/* Spare size */ 
+		.blkNum = 4096,	/* Number of blocks/sectors in the flash */
+		.id = 0x882C,	/* Device ID 0xDevice,Vendor */
+		.model = "Micron 64Gb 8bit",
+		.bb_page = 0,	/* Manufacturer Bad block marking page in block */
+	},
+
+	{			/* Samsung 2Gb */
+		.tADL = 100,	/* tADL, Address to write data delay */
+		.tCH = 5,	/* tCH, Enable signal hold time */
+		.tCS = 20,	/* tCS, Enable signal setup time */
+		.tWH = 10,	/* tWH, ND_nWE high duration */
+		.tWP = 12,	/* tWP, ND_nWE pulse time */
+		.tRH = 100,	/* tRH, ND_nRE high duration */
+		.tRP = 12,	/* tRP, ND_nRE pulse width */
+		.tR = 25000, 	/* tR = data transfer from cell to register */
+		.tWHR = 60,	/* tWHR, ND_nWE high to ND_nRE low delay for status read */
+		.tAR = 10,	/* tAR, ND_ALE low to ND_nRE low delay */
+		.tRHW = 100,	/* tRHW, ND_nRE high to ND_nWE low delay */
+		.pgPrBlk = 64,	/* Pages per block - detected */
+		.pgSz = 2048,	/* Page size */
+		.oobSz = 64,	/* Spare size */
+		.blkNum = 2048,	/* Number of blocks/sectors in the flash */
+		.id = 0xDAEC,	/* Device ID 0xDevice,Vendor */
+		.model = "Samsung 2Gb 8bit - new!",
+		.bb_page = 0,	/* Manufacturer Bad block marking page in block */
+	}
+
+	};
+
+/* Defined Command set */
+#define 	MV_NFC_FLASH_SP_CMD_SET_IDX		0
+#define		MV_NFC_FLASH_LP_CMD_SET_IDX		1
+static MV_NFC_FLASH_CMD_SET	flashCmdSet[] = {
+	{
+	.read1		= 0x0000,
+	.read2		= 0x0050,
+	.program	= 0x1080,
+	.readStatus	= 0x0070,
+	.readId		= 0x0090,
+	.erase		= 0xD060,
+	.multiplaneErase = 0xD160,
+	.reset		= 0x00FF,
+	.lock		= 0x002A,
+	.unlock		= 0x2423,
+	.lockStatus	= 0x007A,
+	}, 
+	{
+	.read1		= 0x3000,
+	.exitCacheRead  = 0x003f,
+	.cacheReadRand  = 0x3100,
+	.cacheReadSeq   = 0x0031,
+	.read2		= 0x0050,
+	.program	= 0x1080,
+	.readStatus	= 0x0070,
+	.readId		= 0x0090,
+	.erase		= 0xD060,
+	.multiplaneErase = 0xD160,
+	.reset		= 0x00FF,
+	.lock		= 0x002A,
+	.unlock		= 0x2423,
+	.lockStatus	= 0x007A,
+	}};
+
+#ifdef MV_NFC_REG_DBG
+extern MV_U32 mvNfcDbgFlag;
+
+MV_U32 nfc_dbg_read(MV_U32 addr)
+{
+	MV_U32 reg = MV_MEMIO_LE32_READ((addr));
+	if (mvNfcDbgFlag) mvOsPrintf("NFC read  0x%08x = %08x\n", addr, reg);
+	return reg;
+}
+
+MV_VOID nfc_dbg_write(MV_U32 addr, MV_U32 val)
+{
+	MV_MEMIO_LE32_WRITE((addr), (val));
+
+	if (mvNfcDbgFlag) mvOsPrintf("NFC write 0x%08x = %08x\n", addr, val);
+}
+
+#undef MV_REG_READ
+#undef MV_REG_WRITE
+#define MV_REG_READ(x)		nfc_dbg_read(x)
+#define MV_REG_WRITE(x,y)	nfc_dbg_write(x,y)
+#endif
+
+/**************/
+/* Prototypes */
+/**************/
+static MV_STATUS mvDfcWait4Complete(MV_U32 statMask, MV_U32 usec);
+static MV_STATUS mvNfcReadIdNative(MV_NFC_CHIP_SEL cs,MV_U16 *id);
+static MV_STATUS mvNfcTimingSet(MV_U32 tclk, MV_NFC_FLASH_INFO *flInfo);
+static MV_U32 	 mvNfcColBits(MV_U32 pg_size);
+
+/*******************************************************************************
+* mvNfcInit
+*
+* DESCRIPTION:
+*       Initialize the NAND controller unit, and perform a detection of the 
+*	attached NAND device.
+*
+* INPUT:
+*	nfcInfo  - Flash information parameters.
+*
+* OUTPUT:
+*	nfcCtrl  - Nand control and status information to be held by the user
+*		    and passed to all other APIs.
+*
+* RETURN:
+*       MV_OK		- On success,
+*	MV_BAD_PARAM 	- The required ECC mode not supported by flash.
+*	MV_NOT_SUPPORTED- The underlying flash device is not supported by HAL. 
+*	MV_TIMEOUT 	- Error accessing the underlying flahs device.
+*	MV_FAIL		- On failure
+*******************************************************************************/
+MV_STATUS mvNfcInit(MV_NFC_INFO *nfcInfo, MV_NFC_CTRL *nfcCtrl)
+{
+	MV_U32 ctrl_reg;
+	MV_STATUS ret;
+	MV_U16 read_id = 0;
+	MV_U32 i;
+	/* Initial register values */
+	ctrl_reg = 0;
+
+	/* make sure ECC is disabled at this point - will be enabled only when issuing certain commands */
+	MV_REG_BIT_RESET(NFC_CONTROL_REG, NFC_CTRL_ECC_EN_MASK);
+	if (nfcInfo->eccMode != MV_NFC_ECC_HAMMING)
+		MV_REG_BIT_RESET(NFC_ECC_CONTROL_REG, NFC_ECC_BCH_EN_MASK);
+
+	if ((nfcInfo->eccMode == MV_NFC_ECC_BCH_1K) ||
+	    (nfcInfo->eccMode == MV_NFC_ECC_BCH_704B) ||
+	    (nfcInfo->eccMode == MV_NFC_ECC_BCH_512B))
+		
+	{
+		/* Disable spare */
+		ctrl_reg &= ~NFC_CTRL_SPARE_EN_MASK;
+	}
+	else
+	{
+		/* Enable spare */
+		ctrl_reg |= NFC_CTRL_SPARE_EN_MASK;
+	}
+
+	ctrl_reg &= ~NFC_CTRL_ECC_EN_MASK;
+
+	/* Configure flash interface */
+	if (nfcInfo->ifMode == MV_NFC_IF_1X16)
+	{
+		nfcCtrl->flashWidth = 16;
+		nfcCtrl->dfcWidth = 16;
+		ctrl_reg |= (NFC_CTRL_DWIDTH_M_MASK | NFC_CTRL_DWIDTH_C_MASK);
+	}
+	else if (nfcInfo->ifMode == MV_NFC_IF_2X8)
+	{
+		nfcCtrl->flashWidth = 8;
+		nfcCtrl->dfcWidth = 16;
+		ctrl_reg |= NFC_CTRL_DWIDTH_C_MASK;
+	}
+	else
+	{
+		nfcCtrl->flashWidth = 8;
+		nfcCtrl->dfcWidth = 8;
+	}
+
+	/* Configure initial READ-ID byte count */
+	ctrl_reg |= (0x2 <<  NFC_CTRL_RD_ID_CNT_OFFS);
+
+	/* Configure the Arbiter */
+	ctrl_reg |= NFC_CTRL_ND_ARB_EN_MASK;
+
+	/* Write registers before device detection */
+	MV_REG_WRITE(NFC_CONTROL_REG, ctrl_reg);
+
+	/* Read the device ID */
+	if ((ret = mvNfcReadIdNative(nfcCtrl->currCs,&read_id)) != MV_OK) {
+		return ret;
+	}
+
+	/* Look for device ID in knwon device table */
+	for (i=0; i<(sizeof(flashDeviceInfo)/sizeof(MV_NFC_FLASH_INFO)); i++)
+	{
+		if (flashDeviceInfo[i].id == read_id)
+			break;
+	}
+	if (i == (sizeof(flashDeviceInfo)/sizeof(MV_NFC_FLASH_INFO)))
+		return MV_NOT_SUPPORTED;
+	else
+		nfcCtrl->flashIdx = i;
+
+	/* Configure the command set based on page size */
+	if (flashDeviceInfo[i].pgSz < MV_NFC_2KB_PAGE)
+		nfcCtrl->cmdsetIdx = MV_NFC_FLASH_SP_CMD_SET_IDX;
+	else
+		nfcCtrl->cmdsetIdx = MV_NFC_FLASH_LP_CMD_SET_IDX;
+
+	/* calculate Timing parameters */	
+	if ((ret = mvNfcTimingSet(nfcInfo->tclk, &flashDeviceInfo[i])) != MV_OK) {
+		return ret;	
+	}
+
+	/* Configure the control register based on the device detected */
+	ctrl_reg = MV_REG_READ(NFC_CONTROL_REG);
+
+	/* Configure DMA */
+	if (nfcInfo->ioMode == MV_NFC_PDMA_ACCESS)
+		ctrl_reg |= NFC_CTRL_DMA_EN_MASK;
+	else
+		ctrl_reg &= ~NFC_CTRL_DMA_EN_MASK;
+
+	/* Configure Page size */
+	ctrl_reg &= ~NFC_CTRL_PAGE_SZ_MASK;
+	switch (flashDeviceInfo[i].pgSz)
+	{
+		case MV_NFC_512B_PAGE:
+			ctrl_reg |= NFC_CTRL_PAGE_SZ_512B;
+			break;
+
+		case MV_NFC_2KB_PAGE:
+		case MV_NFC_4KB_PAGE:
+		case MV_NFC_8KB_PAGE:
+			ctrl_reg |= NFC_CTRL_PAGE_SZ_2KB;
+			break;
+
+		default:
+			return MV_BAD_PARAM;
+	}
+
+	/* Disable sequential read if indicated */
+	if (flashDeviceInfo[i].seqDis)
+		ctrl_reg |= NFC_CTRL_SEQ_DIS_MASK;
+	else
+		ctrl_reg &= ~NFC_CTRL_SEQ_DIS_MASK;
+
+	/* Configure the READ-ID count and row address start based on page size */
+	ctrl_reg &= ~(NFC_CTRL_RD_ID_CNT_MASK | NFC_CTRL_RA_START_MASK);
+	if (flashDeviceInfo[i].pgSz >= MV_NFC_2KB_PAGE)
+	{
+		ctrl_reg |= NFC_CTRL_RD_ID_CNT_LP;
+		ctrl_reg |= NFC_CTRL_RA_START_MASK;
+	}
+	else
+	{
+		ctrl_reg |= NFC_CTRL_RD_ID_CNT_SP;
+	}
+
+	/* Confiugre pages per block */
+	ctrl_reg &= ~NFC_CTRL_PG_PER_BLK_MASK;
+	switch (flashDeviceInfo[i].pgPrBlk)
+	{
+		case 32:
+			ctrl_reg |= NFC_CTRL_PG_PER_BLK_32;
+			break;
+
+		case 64:
+			ctrl_reg |= NFC_CTRL_PG_PER_BLK_64;
+			break;
+	
+		case 128:
+			ctrl_reg |= NFC_CTRL_PG_PER_BLK_128;
+			break;
+
+		case 256:
+			ctrl_reg |= NFC_CTRL_PG_PER_BLK_256;
+			break;	
+
+		default:
+			return MV_BAD_PARAM;
+	}
+	
+	/* Write the updated control register */
+	MV_REG_WRITE(NFC_CONTROL_REG, ctrl_reg);
+
+	/* DMA resource allocation */
+	if (nfcInfo->ioMode == MV_NFC_PDMA_ACCESS)
+	{
+		/* Allocate command buffer */
+		if ((nfcCtrl->cmdBuff.bufVirtPtr = mvOsIoUncachedMalloc(nfcInfo->osHandle, (NFC_CMD_STRUCT_SIZE * MV_NFC_MAX_DESC_CHAIN), 
+				&nfcCtrl->cmdBuff.bufPhysAddr, &nfcCtrl->cmdBuff.memHandle)) == NULL)
+			return MV_OUT_OF_CPU_MEM;
+		nfcCtrl->cmdBuff.bufSize = (NFC_CMD_STRUCT_SIZE * MV_NFC_MAX_DESC_CHAIN);
+		nfcCtrl->cmdBuff.dataSize = (NFC_CMD_STRUCT_SIZE * MV_NFC_MAX_DESC_CHAIN);
+
+		/* Allocate command DMA descriptors */
+		if ((nfcCtrl->cmdDescBuff.bufVirtPtr = mvOsIoUncachedMalloc(nfcInfo->osHandle, (MV_PDMA_DESC_SIZE * (MV_NFC_MAX_DESC_CHAIN+1)), 
+				&nfcCtrl->cmdDescBuff.bufPhysAddr, &nfcCtrl->cmdDescBuff.memHandle)) == NULL)
+			return MV_OUT_OF_CPU_MEM;
+		/* verify allignment to 128bits */
+		if ((MV_U32)nfcCtrl->cmdDescBuff.bufVirtPtr & 0xF)
+		{
+			nfcCtrl->cmdDescBuff.bufVirtPtr = (MV_U8*)(((MV_U32)nfcCtrl->cmdDescBuff.bufVirtPtr & ~0xF) + MV_PDMA_DESC_SIZE);
+			nfcCtrl->cmdDescBuff.bufPhysAddr = ((nfcCtrl->cmdDescBuff.bufPhysAddr & ~0xF) + MV_PDMA_DESC_SIZE);
+		}
+		nfcCtrl->cmdDescBuff.bufSize = (MV_PDMA_DESC_SIZE * MV_NFC_MAX_DESC_CHAIN);
+		nfcCtrl->cmdDescBuff.dataSize = (MV_PDMA_DESC_SIZE * MV_NFC_MAX_DESC_CHAIN);
+
+		/* Allocate data DMA descriptors */
+		if ((nfcCtrl->dataDescBuff.bufVirtPtr = mvOsIoUncachedMalloc(nfcInfo->osHandle, (MV_PDMA_DESC_SIZE * (MV_NFC_MAX_DESC_CHAIN+1)), 
+				&nfcCtrl->dataDescBuff.bufPhysAddr, &nfcCtrl->dataDescBuff.memHandle)) == NULL)
+			return MV_OUT_OF_CPU_MEM;
+		/* verify allignment to 128bits */
+		if ((MV_U32)nfcCtrl->dataDescBuff.bufVirtPtr & 0xF)
+		{
+			nfcCtrl->dataDescBuff.bufVirtPtr = (MV_U8*)(((MV_U32)nfcCtrl->dataDescBuff.bufVirtPtr & ~0xF) + MV_PDMA_DESC_SIZE);
+			nfcCtrl->dataDescBuff.bufPhysAddr = ((nfcCtrl->dataDescBuff.bufPhysAddr & ~0xF) + MV_PDMA_DESC_SIZE);
+		}
+		nfcCtrl->dataDescBuff.bufSize = (MV_PDMA_DESC_SIZE * MV_NFC_MAX_DESC_CHAIN);
+		nfcCtrl->dataDescBuff.dataSize = (MV_PDMA_DESC_SIZE * MV_NFC_MAX_DESC_CHAIN);
+	
+		/* Allocate Data DMA channel */
+		if (mvPdmaChanAlloc(MV_PDMA_NAND_DATA, nfcInfo->dataPdmaIntMask, &nfcCtrl->dataChanHndl) != MV_OK)
+			return MV_NO_RESOURCE;
+
+		/* Allocate Command DMA channel */
+		if (mvPdmaChanAlloc(MV_PDMA_NAND_COMMAND, nfcInfo->cmdPdmaIntMask, &nfcCtrl->cmdChanHndl) != MV_OK)
+			return MV_NO_RESOURCE;
+	} 
+
+	/* Initialize remaining fields in the CTRL structure */
+	nfcCtrl->autoStatusRead = nfcInfo->autoStatusRead;	
+	nfcCtrl->readyBypass = nfcInfo->readyBypass;
+	nfcCtrl->ioMode = nfcInfo->ioMode;
+	nfcCtrl->eccMode = nfcInfo->eccMode; 
+	nfcCtrl->ifMode = nfcInfo->ifMode; 
+	nfcCtrl->currCs = MV_NFC_CS_NONE;
+	nfcCtrl->regsPhysAddr = nfcInfo->regsPhysAddr;
+	nfcCtrl->dataPdmaIntMask = nfcInfo->dataPdmaIntMask;
+	nfcCtrl->cmdPdmaIntMask = nfcInfo->cmdPdmaIntMask;
+
+	return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvNfcSelectChip
+*
+* DESCRIPTION:
+*       Set the currently active chip for next commands.
+*
+* INPUT:
+*	nfcCtrl  - Nand control structure.
+*	chip	 - The chip number to operate on.
+*
+* OUTPUT:
+*	None.
+*
+* RETURN:
+*       MV_OK	- On success,
+*	MV_FAIL	- On failure
+*******************************************************************************/
+MV_STATUS mvNfcSelectChip(MV_NFC_CTRL *nfcCtrl, MV_NFC_CHIP_SEL chip)
+{
+	nfcCtrl->currCs = chip;
+	return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvNfcDataLength
+*
+* DESCRIPTION:
+*       Get the length of data based on the NFC configuration
+*
+* INPUT:
+*	nfcCtrl  - Nand control structure.
+*	cmd	 - Command to be executed
+*
+* OUTPUT:
+*	data_len - length of data to be transfered
+*
+* RETURN:
+*       MV_OK	- On success,
+*	MV_FAIL	- On failure
+*******************************************************************************/
+MV_STATUS mvNfcDataLength(MV_NFC_CTRL *nfcCtrl, MV_NFC_CMD_TYPE cmd, MV_U32 *data_len)
+{
+	/* Decide read data size based on page size */
+	if (flashDeviceInfo[nfcCtrl->flashIdx].pgSz < MV_NFC_2KB_PAGE) /* Small Page */
+	{
+		if (nfcCtrl->ifMode == MV_NFC_IF_2X8)
+		{	
+			if (nfcCtrl->eccMode == MV_NFC_ECC_HAMMING)
+				*data_len = NFC_RW_SP_G_HMNG_ECC_DATA_LEN;
+			else /* No ECC */
+				*data_len = NFC_RW_SP_G_NO_ECC_DATA_LEN;
+		}
+		else
+		{
+			if (nfcCtrl->eccMode == MV_NFC_ECC_HAMMING)
+				*data_len = NFC_RW_SP_HMNG_ECC_DATA_LEN;
+			else /* No ECC */
+				*data_len = NFC_RW_SP_NO_ECC_DATA_LEN;
+		}
+	}
+	else /* Large Page */
+	{
+		if (nfcCtrl->ifMode == MV_NFC_IF_2X8)
+		{
+			if (nfcCtrl->eccMode == MV_NFC_ECC_BCH_2K)
+				*data_len = NFC_RW_LP_G_BCH_ECC_DATA_LEN;
+			else if (nfcCtrl->eccMode == MV_NFC_ECC_BCH_1K)
+				*data_len = NFC_RW_LP_BCH1K_ECC_DATA_LEN;
+			else if (nfcCtrl->eccMode == MV_NFC_ECC_BCH_704B)
+				*data_len = NFC_RW_LP_BCH704B_ECC_DATA_LEN;
+			else if (nfcCtrl->eccMode == MV_NFC_ECC_BCH_512B)
+				*data_len = NFC_RW_LP_BCH512B_ECC_DATA_LEN;
+			else if (nfcCtrl->eccMode == MV_NFC_ECC_HAMMING)
+				*data_len = NFC_RW_LP_G_HMNG_ECC_DATA_LEN;
+			else /* No ECC */
+				*data_len = NFC_RW_LP_G_NO_ECC_DATA_LEN;
+		}
+		else
+		{
+			if (nfcCtrl->eccMode == MV_NFC_ECC_BCH_2K)
+				*data_len = NFC_RW_LP_BCH_ECC_DATA_LEN;
+			else if (nfcCtrl->eccMode == MV_NFC_ECC_BCH_1K)
+				*data_len = NFC_RW_LP_BCH1K_ECC_DATA_LEN;
+			else if (nfcCtrl->eccMode == MV_NFC_ECC_BCH_704B)
+				*data_len = NFC_RW_LP_BCH704B_ECC_DATA_LEN;
+			else if (nfcCtrl->eccMode == MV_NFC_ECC_BCH_512B)
+				*data_len = NFC_RW_LP_BCH512B_ECC_DATA_LEN;
+			else if (nfcCtrl->eccMode == MV_NFC_ECC_HAMMING)
+				*data_len = NFC_RW_LP_HMNG_ECC_DATA_LEN;
+			else /* No ECC */
+				*data_len = NFC_RW_LP_NO_ECC_DATA_LEN;
+		}
+	} 
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvNfcTransferDataLength
+*
+* DESCRIPTION:
+*       Get the length of data to be transfered based on the command type and
+*	NFC configuration
+*
+* INPUT:
+*	nfcCtrl  - Nand control structure.
+*	cmd	 - Command to be executed
+*
+* OUTPUT:
+*	data_len - length of data to be transfered
+*
+* RETURN:
+*       MV_OK	- On success,
+*	MV_FAIL	- On failure
+*******************************************************************************/
+MV_STATUS mvNfcTransferDataLength(MV_NFC_CTRL *nfcCtrl, MV_NFC_CMD_TYPE cmd, MV_U32 * data_len)
+{
+	switch (cmd)
+	{
+		case MV_NFC_CMD_READ_ID:
+			if (nfcCtrl->ioMode == MV_NFC_PDMA_ACCESS)
+				*data_len = NFC_READ_ID_PDMA_DATA_LEN;
+			else
+				*data_len = NFC_READ_ID_PIO_DATA_LEN;
+			break;
+
+		case MV_NFC_CMD_READ_STATUS:
+			if (nfcCtrl->ioMode == MV_NFC_PDMA_ACCESS)
+				*data_len =  NFC_READ_STATUS_PDMA_DATA_LEN;
+			else
+				*data_len =  NFC_READ_STATUS_PIO_DATA_LEN;
+			break;		
+
+		case MV_NFC_CMD_READ_MONOLITHIC: /* Read a single 512B or 2KB page */
+		case MV_NFC_CMD_READ_MULTIPLE:
+		case MV_NFC_CMD_READ_NAKED:
+		case MV_NFC_CMD_READ_LAST_NAKED:
+		case MV_NFC_CMD_READ_DISPATCH:	
+		case MV_NFC_CMD_WRITE_MONOLITHIC: /* Program a single page of 512B or 2KB */
+		case MV_NFC_CMD_WRITE_MULTIPLE:
+		case MV_NFC_CMD_WRITE_NAKED:
+		case MV_NFC_CMD_WRITE_LAST_NAKED:
+		case MV_NFC_CMD_WRITE_DISPATCH:
+		case MV_NFC_CMD_EXIT_CACHE_READ:
+		case MV_NFC_CMD_CACHE_READ_SEQ:
+		case MV_NFC_CMD_CACHE_READ_START:
+			if (nfcCtrl->ioMode == MV_NFC_PDMA_ACCESS)
+			{
+				/* Decide read data size based on page size */
+				if (flashDeviceInfo[nfcCtrl->flashIdx].pgSz < MV_NFC_2KB_PAGE) /* Small Page */
+				{
+					*data_len = NFC_RW_SP_PDMA_DATA_LEN;				
+				}
+				else /* Large Page */
+				{
+					if (nfcCtrl->eccMode == MV_NFC_ECC_BCH_2K)
+						*data_len = NFC_RW_LP_BCH_ECC_DATA_LEN;
+					else if (nfcCtrl->eccMode == MV_NFC_ECC_BCH_1K)
+						*data_len = NFC_RW_LP_BCH1K_ECC_DATA_LEN;
+					else if (nfcCtrl->eccMode == MV_NFC_ECC_BCH_704B)
+						*data_len = NFC_RW_LP_BCH704B_ECC_DATA_LEN;
+					else if (nfcCtrl->eccMode == MV_NFC_ECC_BCH_512B)
+						*data_len = NFC_RW_LP_BCH512B_ECC_DATA_LEN;
+					else /* Hamming and No-Ecc */
+						*data_len = NFC_RW_LP_PDMA_DATA_LEN;
+				}
+			}
+			else /* PIO mode */
+			{
+				/* Decide read data size based on page size */
+				if (flashDeviceInfo[nfcCtrl->flashIdx].pgSz < MV_NFC_2KB_PAGE) /* Small Page */
+				{
+					if (nfcCtrl->ifMode == MV_NFC_IF_2X8)
+					{	
+						if (nfcCtrl->eccMode == MV_NFC_ECC_HAMMING)
+							*data_len = NFC_RW_SP_G_HMNG_ECC_DATA_LEN;
+						else /* No ECC */
+							*data_len = NFC_RW_SP_G_NO_ECC_DATA_LEN;
+					}
+					else
+					{
+						if (nfcCtrl->eccMode == MV_NFC_ECC_HAMMING)
+							*data_len = NFC_RW_SP_HMNG_ECC_DATA_LEN;
+						else /* No ECC */
+							*data_len = NFC_RW_SP_NO_ECC_DATA_LEN;
+					}
+				}
+				else /* Large Page */
+				{
+					if (nfcCtrl->ifMode == MV_NFC_IF_2X8)
+					{
+						if (nfcCtrl->eccMode == MV_NFC_ECC_BCH_2K)
+							*data_len = NFC_RW_LP_G_BCH_ECC_DATA_LEN;
+						else if (nfcCtrl->eccMode == MV_NFC_ECC_BCH_1K)
+							*data_len = NFC_RW_LP_BCH1K_ECC_DATA_LEN;
+						else if (nfcCtrl->eccMode == MV_NFC_ECC_BCH_704B)
+							*data_len = NFC_RW_LP_BCH704B_ECC_DATA_LEN;
+						else if (nfcCtrl->eccMode == MV_NFC_ECC_BCH_512B)
+							*data_len = NFC_RW_LP_BCH512B_ECC_DATA_LEN;
+						else if (nfcCtrl->eccMode == MV_NFC_ECC_HAMMING)
+							*data_len = NFC_RW_LP_G_HMNG_ECC_DATA_LEN;
+						else /* No ECC */
+							*data_len = NFC_RW_LP_G_NO_ECC_DATA_LEN;
+					}
+					else
+					{
+						if (nfcCtrl->eccMode == MV_NFC_ECC_BCH_2K)
+							*data_len = NFC_RW_LP_BCH_ECC_DATA_LEN;
+						else if (nfcCtrl->eccMode == MV_NFC_ECC_BCH_1K)
+							*data_len = NFC_RW_LP_BCH1K_ECC_DATA_LEN;
+						else if (nfcCtrl->eccMode == MV_NFC_ECC_BCH_704B)
+							*data_len = NFC_RW_LP_BCH704B_ECC_DATA_LEN;
+						else if (nfcCtrl->eccMode == MV_NFC_ECC_BCH_512B)
+							*data_len = NFC_RW_LP_BCH512B_ECC_DATA_LEN;
+						else if (nfcCtrl->eccMode == MV_NFC_ECC_HAMMING)
+							*data_len = NFC_RW_LP_HMNG_ECC_DATA_LEN;
+						else /* No ECC */
+							*data_len = NFC_RW_LP_NO_ECC_DATA_LEN;
+					}
+				} 
+			}
+			break;
+
+		case MV_NFC_CMD_ERASE:
+		case MV_NFC_CMD_MULTIPLANE_ERASE:
+		case MV_NFC_CMD_RESET:
+		case MV_NFC_CMD_WRITE_DISPATCH_START:
+		case MV_NFC_CMD_WRITE_DISPATCH_END:
+			return MV_BAD_PARAM;
+
+		default:
+			return MV_BAD_PARAM;
+
+	};
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvNfcBuildCommand
+*
+* DESCRIPTION:
+*	Build the command buffer
+*
+* INPUT:
+*	nfcCtrl	- Nand control structure.
+*	cmd	- Command to be executed
+*	cmdb	- Command buffer cmdb[0:3] to fill
+*
+* OUTPUT:
+*	cmdb	- Command buffer filled
+*
+* RETURN:
+*	None
+*******************************************************************************/
+static MV_STATUS mvNfcBuildCommand(MV_NFC_CTRL *nfcCtrl, MV_NFC_MULTI_CMD *descInfo, MV_U32 * cmdb)
+{
+	cmdb[0] = 0;
+	cmdb[1] = 0;
+	cmdb[2] = 0;
+	cmdb[3] = 0;
+	if (nfcCtrl->autoStatusRead)
+		cmdb[0] |= NFC_CB0_AUTO_RS_MASK;
+
+	if ((nfcCtrl->currCs == MV_NFC_CS_1) || (nfcCtrl->currCs == MV_NFC_CS_3))
+		cmdb[0] |= NFC_CB0_CSEL_MASK;
+
+	if ((nfcCtrl->currCs == MV_NFC_CS_2) || (nfcCtrl->currCs == MV_NFC_CS_3))
+		cmdb[2] |= NFC_CB2_CS_2_3_SELECT_MASK;
+
+	if (nfcCtrl->readyBypass)
+		cmdb[0] |= NFC_CB0_RDY_BYP_MASK;		
+
+	switch (descInfo->cmd)
+	{
+		case MV_NFC_CMD_READ_ID:
+			cmdb[0] |= (flashCmdSet[nfcCtrl->cmdsetIdx].readId & (NFC_CB0_CMD1_MASK | NFC_CB0_CMD2_MASK));
+			cmdb[0] |= ((NFC_READ_ID_ADDR_LEN << NFC_CB0_ADDR_CYC_OFFS) & NFC_CB0_ADDR_CYC_MASK);			
+			cmdb[0] |= NFC_CB0_CMD_TYPE_READ_ID;
+			break;
+
+		case MV_NFC_CMD_READ_STATUS:
+			cmdb[0] |= (flashCmdSet[nfcCtrl->cmdsetIdx].readStatus & (NFC_CB0_CMD1_MASK | NFC_CB0_CMD2_MASK));
+			cmdb[0] |= NFC_CB0_CMD_TYPE_STATUS; 
+			break;
+
+		case MV_NFC_CMD_ERASE:
+		case MV_NFC_CMD_MULTIPLANE_ERASE:
+
+			if(descInfo->cmd == MV_NFC_CMD_ERASE)
+				cmdb[0] |= (flashCmdSet[nfcCtrl->cmdsetIdx].erase & (NFC_CB0_CMD1_MASK | NFC_CB0_CMD2_MASK));
+			if(descInfo->cmd == MV_NFC_CMD_MULTIPLANE_ERASE)
+				cmdb[0] |= (flashCmdSet[nfcCtrl->cmdsetIdx].multiplaneErase & (NFC_CB0_CMD1_MASK | NFC_CB0_CMD2_MASK));
+				
+			cmdb[0] |= ((NFC_ERASE_ADDR_LEN << NFC_CB0_ADDR_CYC_OFFS) & NFC_CB0_ADDR_CYC_MASK);
+			cmdb[0] |= NFC_CB0_DBC_MASK;
+			cmdb[0] |= NFC_CB0_CMD_TYPE_ERASE;
+			cmdb[1] |= (descInfo->pageAddr & NFC_BLOCK_ADDR_BITS); 
+			break;
+
+		case MV_NFC_CMD_RESET:
+			cmdb[0] |= (flashCmdSet[nfcCtrl->cmdsetIdx].reset & (NFC_CB0_CMD1_MASK | NFC_CB0_CMD2_MASK));
+			cmdb[0] |= NFC_CB0_CMD_TYPE_RESET;
+			break;
+
+		case MV_NFC_CMD_CACHE_READ_SEQ:
+			cmdb[0] = (flashCmdSet[nfcCtrl->cmdsetIdx].cacheReadSeq & (NFC_CB0_CMD1_MASK | NFC_CB0_CMD2_MASK));
+			break;
+
+		case MV_NFC_CMD_CACHE_READ_RAND:
+			cmdb[0] = (flashCmdSet[nfcCtrl->cmdsetIdx].cacheReadRand & (NFC_CB0_CMD1_MASK | NFC_CB0_CMD2_MASK));
+			if (flashDeviceInfo[nfcCtrl->flashIdx].pgSz < MV_NFC_2KB_PAGE)
+			{
+				cmdb[1] |= ((descInfo->pageAddr << NFC_SP_PG_OFFS) & NFC_SP_PG_MASK);
+				if (descInfo->pageAddr & ~NFC_SP_PG_MASK)
+					cmdb[0] |= ((NFC_SP_BIG_READ_ADDR_LEN << NFC_CB0_ADDR_CYC_OFFS) & NFC_CB0_ADDR_CYC_MASK);
+				else
+					cmdb[0] |= ((NFC_SP_READ_ADDR_LEN << NFC_CB0_ADDR_CYC_OFFS) & NFC_CB0_ADDR_CYC_MASK);
+			}
+			else
+			{
+				cmdb[0] |= ((NFC_LP_READ_ADDR_LEN << NFC_CB0_ADDR_CYC_OFFS) & NFC_CB0_ADDR_CYC_MASK);
+				cmdb[0] |= NFC_CB0_DBC_MASK;
+				cmdb[1] |= ((descInfo->pageAddr << NFC_LP_PG_OFFS) & NFC_LP_PG_MASK);
+				cmdb[2] |= (descInfo->pageAddr >> (32 - NFC_LP_PG_OFFS));
+			}
+			cmdb[0] |= NFC_CB0_CMD_TYPE_READ;
+			break;
+
+		case MV_NFC_CMD_EXIT_CACHE_READ:
+			cmdb[0] |= (flashCmdSet[nfcCtrl->cmdsetIdx].exitCacheRead & (NFC_CB0_CMD1_MASK | NFC_CB0_CMD2_MASK));
+			break;
+
+		case MV_NFC_CMD_CACHE_READ_START:
+			cmdb[0] |= (flashCmdSet[nfcCtrl->cmdsetIdx].read1 & (NFC_CB0_CMD1_MASK | NFC_CB0_CMD2_MASK));
+			if (flashDeviceInfo[nfcCtrl->flashIdx].pgSz < MV_NFC_2KB_PAGE)
+			{
+				cmdb[1] |= ((descInfo->pageAddr << NFC_SP_PG_OFFS) & NFC_SP_PG_MASK);
+				if (descInfo->pageAddr & ~NFC_SP_PG_MASK)
+					cmdb[0] |= ((NFC_SP_BIG_READ_ADDR_LEN << NFC_CB0_ADDR_CYC_OFFS) & NFC_CB0_ADDR_CYC_MASK);
+				else
+					cmdb[0] |= ((NFC_SP_READ_ADDR_LEN << NFC_CB0_ADDR_CYC_OFFS) & NFC_CB0_ADDR_CYC_MASK);
+			}
+			else
+			{
+				cmdb[0] |= ((NFC_LP_READ_ADDR_LEN << NFC_CB0_ADDR_CYC_OFFS) & NFC_CB0_ADDR_CYC_MASK);
+				cmdb[0] |= NFC_CB0_DBC_MASK;
+				cmdb[1] |= ((descInfo->pageAddr << NFC_LP_PG_OFFS) & NFC_LP_PG_MASK);
+				cmdb[2] |= (descInfo->pageAddr >> (32 - NFC_LP_PG_OFFS));
+			}
+			cmdb[0] |= NFC_CB0_CMD_TYPE_READ;
+			cmdb[0] |= NFC_CB0_LEN_OVRD_MASK;
+			break;
+
+		case MV_NFC_CMD_READ_MONOLITHIC: /* Read a single 512B or 2KB page */
+		case MV_NFC_CMD_READ_MULTIPLE:
+		case MV_NFC_CMD_READ_NAKED:
+		case MV_NFC_CMD_READ_LAST_NAKED:
+		case MV_NFC_CMD_READ_DISPATCH:
+			cmdb[0] |= (flashCmdSet[nfcCtrl->cmdsetIdx].read1 & (NFC_CB0_CMD1_MASK | NFC_CB0_CMD2_MASK));
+			if (flashDeviceInfo[nfcCtrl->flashIdx].pgSz < MV_NFC_2KB_PAGE)
+			{
+				cmdb[1] |= ((descInfo->pageAddr << NFC_SP_PG_OFFS) & NFC_SP_PG_MASK);
+				if (descInfo->pageAddr & ~NFC_SP_PG_MASK)
+					cmdb[0] |= ((NFC_SP_BIG_READ_ADDR_LEN << NFC_CB0_ADDR_CYC_OFFS) & NFC_CB0_ADDR_CYC_MASK);
+				else
+					cmdb[0] |= ((NFC_SP_READ_ADDR_LEN << NFC_CB0_ADDR_CYC_OFFS) & NFC_CB0_ADDR_CYC_MASK);
+			}
+			else
+			{
+				cmdb[0] |= ((NFC_LP_READ_ADDR_LEN << NFC_CB0_ADDR_CYC_OFFS) & NFC_CB0_ADDR_CYC_MASK);
+				cmdb[0] |= NFC_CB0_DBC_MASK;
+				cmdb[1] |= ((descInfo->pageAddr << NFC_LP_PG_OFFS) & NFC_LP_PG_MASK);
+				cmdb[2] |= (descInfo->pageAddr >> (32 - NFC_LP_PG_OFFS));
+			}
+			cmdb[0] |= NFC_CB0_CMD_TYPE_READ;
+			
+			if (descInfo->length)
+			{
+				cmdb[0] |= NFC_CB0_LEN_OVRD_MASK;
+				cmdb[3] |= (descInfo->length & 0xFFFF);
+			}
+
+			/* Check for extended command syntax */
+			switch (descInfo->cmd)
+			{
+				case MV_NFC_CMD_READ_MULTIPLE:
+					cmdb[0] |= NFC_CB0_CMD_XTYPE_MULTIPLE;
+					break;
+				case MV_NFC_CMD_READ_NAKED:
+					cmdb[0] |= NFC_CB0_CMD_XTYPE_NAKED;
+					break;
+				case MV_NFC_CMD_READ_LAST_NAKED:
+					cmdb[0] |= NFC_CB0_CMD_XTYPE_LAST_NAKED;
+					break;
+				case MV_NFC_CMD_READ_DISPATCH:
+					cmdb[0] |= NFC_CB0_CMD_XTYPE_DISPATCH;
+					break;
+				default:
+					break;
+			};
+			break;
+
+		case MV_NFC_CMD_WRITE_MONOLITHIC: /* Program a single page of 512B or 2KB */
+		case MV_NFC_CMD_WRITE_MULTIPLE:
+		/*case MV_NFC_CMD_WRITE_NAKED:*/
+		case MV_NFC_CMD_WRITE_LAST_NAKED:
+		case MV_NFC_CMD_WRITE_DISPATCH:
+			cmdb[0] |= (flashCmdSet[nfcCtrl->cmdsetIdx].program & (NFC_CB0_CMD1_MASK | NFC_CB0_CMD2_MASK));
+			if (flashDeviceInfo[nfcCtrl->flashIdx].pgSz < MV_NFC_2KB_PAGE)
+			{
+				if (descInfo->pageAddr & ~NFC_SP_PG_MASK)
+					cmdb[0] |= ((NFC_SP_BIG_READ_ADDR_LEN << NFC_CB0_ADDR_CYC_OFFS) & NFC_CB0_ADDR_CYC_MASK);
+				else
+					cmdb[0] |= ((NFC_SP_READ_ADDR_LEN << NFC_CB0_ADDR_CYC_OFFS) & NFC_CB0_ADDR_CYC_MASK);
+				cmdb[1] |= ((descInfo->pageAddr << NFC_SP_PG_OFFS) & NFC_SP_PG_MASK);
+			}
+			else
+			{
+				cmdb[0] |= ((NFC_LP_READ_ADDR_LEN << NFC_CB0_ADDR_CYC_OFFS) & NFC_CB0_ADDR_CYC_MASK);
+				cmdb[1] |= ((descInfo->pageAddr << NFC_LP_PG_OFFS) & NFC_LP_PG_MASK);
+				cmdb[2] |= (descInfo->pageAddr >> (32 - NFC_LP_PG_OFFS));
+			}
+			cmdb[0] |= NFC_CB0_DBC_MASK;
+			cmdb[0] |= NFC_CB0_CMD_TYPE_WRITE;	
+			
+			/* Check for extended syntax */
+			switch (descInfo->cmd)
+			{
+				case MV_NFC_CMD_WRITE_MULTIPLE:
+					cmdb[0] |= NFC_CB0_CMD_XTYPE_MULTIPLE;	
+					break;
+				case MV_NFC_CMD_WRITE_NAKED:
+					cmdb[0] |= NFC_CB0_CMD_XTYPE_NAKED;	
+					break;
+				case MV_NFC_CMD_WRITE_LAST_NAKED:
+					cmdb[0] |= NFC_CB0_CMD_XTYPE_LAST_NAKED;
+					break;
+				case MV_NFC_CMD_WRITE_DISPATCH:
+					cmdb[0] |= NFC_CB0_CMD_XTYPE_DISPATCH;
+					break;
+				default:
+					break;
+			};
+			break;
+
+		case MV_NFC_CMD_WRITE_DISPATCH_START:
+			cmdb[0] |= (flashCmdSet[nfcCtrl->cmdsetIdx].program & NFC_CB0_CMD1_MASK);
+			if (flashDeviceInfo[nfcCtrl->flashIdx].pgSz < MV_NFC_2KB_PAGE)
+			{
+				if (descInfo->pageAddr & ~NFC_SP_PG_MASK)
+					cmdb[0] |= ((NFC_SP_BIG_READ_ADDR_LEN << NFC_CB0_ADDR_CYC_OFFS) & NFC_CB0_ADDR_CYC_MASK);
+				else
+					cmdb[0] |= ((NFC_SP_READ_ADDR_LEN << NFC_CB0_ADDR_CYC_OFFS) & NFC_CB0_ADDR_CYC_MASK);
+				cmdb[1] |= ((descInfo->pageAddr << NFC_SP_PG_OFFS) & NFC_SP_PG_MASK);
+			}
+			else
+			{
+				cmdb[0] |= ((NFC_LP_READ_ADDR_LEN << NFC_CB0_ADDR_CYC_OFFS) & NFC_CB0_ADDR_CYC_MASK);
+				cmdb[1] |= ((descInfo->pageAddr << NFC_LP_PG_OFFS) & NFC_LP_PG_MASK);
+				cmdb[2] |= (descInfo->pageAddr >> (32 - NFC_LP_PG_OFFS));					
+			}
+			cmdb[0] |= NFC_CB0_CMD_TYPE_WRITE;	
+			cmdb[0] |= NFC_CB0_CMD_XTYPE_DISPATCH;
+			break;
+
+		case MV_NFC_CMD_WRITE_NAKED:
+			cmdb[0] |= NFC_CB0_CMD_TYPE_WRITE;	
+			cmdb[0] |= NFC_CB0_CMD_XTYPE_NAKED;
+			if (descInfo->length)
+			{
+				cmdb[0] |= NFC_CB0_LEN_OVRD_MASK;
+				cmdb[3] |= (descInfo->length & 0xFFFF);
+			}		
+			break;
+
+		case MV_NFC_CMD_WRITE_DISPATCH_END:
+			cmdb[0] |= ((flashCmdSet[nfcCtrl->cmdsetIdx].program >> 8) & NFC_CB0_CMD1_MASK);
+			cmdb[0] |= NFC_CB0_CMD_TYPE_WRITE;
+			cmdb[0] |= NFC_CB0_CMD_XTYPE_DISPATCH;
+			break;
+
+		default:
+			return MV_BAD_PARAM; 
+	}
+
+	/* update page count */
+	cmdb[2] |= (((descInfo->pageCount - 1) << NFC_PG_CNT_OFFS) & NFC_PG_CNT_MASK);
+	
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvNfcCommandMultiple
+*
+* DESCRIPTION:
+*       Issue a command to the NAND controller.
+*
+* INPUT:
+*	nfcCtrl  - Nand control structure.
+*	cmd	 - The command to issue.
+*	pageAddr - The page number to perform the command on (If the command 
+*		   requires a flash offset), block address in erase.
+*
+* OUTPUT:
+*	None.
+*
+* RETURN:
+*       MV_OK	   - On success,
+*	MV_TIMEOUT - Timeout while waiting for command request.
+*	MV_FAIL	   - On failure
+*******************************************************************************/
+MV_STATUS mvNfcCommandMultiple(MV_NFC_CTRL *nfcCtrl, MV_NFC_MULTI_CMD *descInfo, MV_U32 descCnt)
+{
+	MV_U32 	reg, i, buff;
+	MV_U32 	errCode = MV_OK;
+	MV_U32  cmdb[4];
+	MV_NFC_CMD * cmdVirtPtr = (MV_NFC_CMD*)nfcCtrl->cmdBuff.bufVirtPtr;
+	MV_NFC_CMD * cmdPhysPtr = (MV_NFC_CMD*)nfcCtrl->cmdBuff.bufPhysAddr;
+	MV_PDMA_DESC * cmdDescVirtPtr = (MV_PDMA_DESC*)nfcCtrl->cmdDescBuff.bufVirtPtr;
+	MV_PDMA_DESC * cmdDescPhysPtr = (MV_PDMA_DESC*)nfcCtrl->cmdDescBuff.bufPhysAddr;
+	MV_PDMA_DESC * dataDescVirtPtr = (MV_PDMA_DESC*)nfcCtrl->dataDescBuff.bufVirtPtr;
+	MV_PDMA_DESC * dataDescPhysPtr = (MV_PDMA_DESC*)nfcCtrl->dataDescBuff.bufPhysAddr;
+	MV_U32 	xferLen;
+	MV_U32	dataDescCount = 0;
+	MV_U32  nPage;
+	MV_U32	timeout = 10000;
+	MV_STATUS ret;
+
+	/* Check MAX descriptor count */
+	if (descCnt > MV_NFC_MAX_DESC_CHAIN)
+		return MV_BAD_PARAM;
+
+	/* If not in PDMA fail operation */
+	if (nfcCtrl->ioMode != MV_NFC_PDMA_ACCESS)
+		return MV_BAD_PARAM;
+
+	/* Check that a chip was selected */
+	if (nfcCtrl->currCs == MV_NFC_CS_NONE)
+		return MV_FAIL;
+
+	/* Start the whole command chain through setting the ND_RUN */
+   	/* Setting ND_RUN bit to start the new transaction - verify that controller in idle state */
+	while(timeout > 0) {
+		reg = MV_REG_READ(NFC_CONTROL_REG);
+		if (!(reg & NFC_CTRL_ND_RUN_MASK))
+			break;
+		timeout--;
+	}
+	if(timeout == 0)
+		return MV_BAD_STATE;
+
+	for (i=0; i<descCnt; i++)
+	{
+		if ((descInfo[i].cmd != MV_NFC_CMD_ERASE) && 
+			(descInfo[i].cmd != MV_NFC_CMD_MULTIPLANE_ERASE) &&
+			(descInfo[i].cmd != MV_NFC_CMD_RESET) && 
+			(descInfo[i].cmd != MV_NFC_CMD_EXIT_CACHE_READ) &&
+			(descInfo[i].cmd != MV_NFC_CMD_CACHE_READ_START) &&
+			(descInfo[i].cmd != MV_NFC_CMD_READ_DISPATCH) &&
+			(descInfo[i].cmd != MV_NFC_CMD_WRITE_DISPATCH_START) &&
+			(descInfo[i].cmd != MV_NFC_CMD_WRITE_DISPATCH_END))
+		{
+			/* Get transfer data length for this command type */
+			if ((errCode = mvNfcTransferDataLength(nfcCtrl, descInfo[i].cmd, &xferLen)) != MV_OK)
+				return errCode;
+		}
+
+		if (nfcCtrl->eccMode != MV_NFC_ECC_DISABLE)
+		{
+			if (	(descInfo[i].cmd == MV_NFC_CMD_READ_ID) || (descInfo[i].cmd == MV_NFC_CMD_READ_STATUS) || 
+				(descInfo[i].cmd == MV_NFC_CMD_ERASE) || (descInfo[i].cmd == MV_NFC_CMD_RESET))
+			{
+				/* disable ECC for these commands */
+				MV_REG_BIT_RESET(NFC_CONTROL_REG, NFC_CTRL_ECC_EN_MASK);
+				if (nfcCtrl->eccMode != MV_NFC_ECC_HAMMING)
+					MV_REG_BIT_RESET(NFC_ECC_CONTROL_REG, NFC_ECC_BCH_EN_MASK);
+			}
+			else
+			{
+				/* enable ECC for all other commands */
+				MV_REG_BIT_SET(NFC_CONTROL_REG, NFC_CTRL_ECC_EN_MASK);
+				if (nfcCtrl->eccMode != MV_NFC_ECC_HAMMING)
+					MV_REG_BIT_SET(NFC_ECC_CONTROL_REG, NFC_ECC_BCH_EN_MASK);
+			}
+		}
+
+		/* Build the command buffer */
+		if ((ret = mvNfcBuildCommand(nfcCtrl, &descInfo[i], cmdb)) != MV_OK)
+			return ret;
+		
+
+		/* Fill Command data */
+		cmdVirtPtr[i].cmdb0 = cmdb[0];
+		cmdVirtPtr[i].cmdb1 = cmdb[1];
+		cmdVirtPtr[i].cmdb2 = cmdb[2];
+		cmdVirtPtr[i].cmdb3 = cmdb[3];
+
+
+		/* Hook to the previous descriptor if exists */
+		if (i != 0)
+		{
+			cmdDescVirtPtr[i-1].physDescPtr = (MV_U32)&cmdDescPhysPtr[i];
+			cmdVirtPtr[i-1].cmdb0 |= NFC_CB0_NEXT_CMD_MASK;
+		}
+
+		/* Fill Command Descriptor */
+		cmdDescVirtPtr[i].physDescPtr = 0x1;
+		cmdDescVirtPtr[i].physSrcAddr = (MV_U32)&cmdPhysPtr[i];
+		cmdDescVirtPtr[i].physDestAddr = nfcCtrl->regsPhysAddr + NFC_CMD_BUFF_ADDR;
+		cmdDescVirtPtr[i].commandValue = mvPdmaCommandRegCalc(&nfcCtrl->cmdChanHndl, MV_PDMA_MEM_TO_PERIPH,
+				NFC_CMD_BUFF_SIZE(cmdb[0]));
+
+		/* Check if data dma need to be operated for this command */
+		if ((descInfo[i].cmd != MV_NFC_CMD_ERASE) && 
+			(descInfo[i].cmd != MV_NFC_CMD_MULTIPLANE_ERASE) &&
+			(descInfo[i].cmd != MV_NFC_CMD_RESET) && 
+			(descInfo[i].cmd != MV_NFC_CMD_EXIT_CACHE_READ) &&
+			(descInfo[i].cmd != MV_NFC_CMD_CACHE_READ_START) &&
+			(descInfo[i].cmd != MV_NFC_CMD_READ_DISPATCH) &&
+			(descInfo[i].cmd != MV_NFC_CMD_WRITE_DISPATCH_START) &&
+			(descInfo[i].cmd != MV_NFC_CMD_WRITE_DISPATCH_END))
+		{
+			for(nPage = 0; nPage < descInfo[i].pageCount; nPage++)
+			{
+				if (dataDescCount != 0)
+					dataDescVirtPtr[dataDescCount-1].physDescPtr = (MV_U32)&dataDescPhysPtr[dataDescCount];
+				/* Fill Data Descriptor */
+				if ((descInfo[i].cmd == MV_NFC_CMD_READ_MONOLITHIC) ||
+						(descInfo[i].cmd == MV_NFC_CMD_READ_MULTIPLE) ||
+						(descInfo[i].cmd == MV_NFC_CMD_CACHE_READ_SEQ) ||
+						(descInfo[i].cmd == MV_NFC_CMD_EXIT_CACHE_READ) ||
+						(descInfo[i].cmd == MV_NFC_CMD_CACHE_READ_RAND) ||
+						(descInfo[i].cmd == MV_NFC_CMD_READ_NAKED) ||
+						(descInfo[i].cmd == MV_NFC_CMD_READ_LAST_NAKED) ||
+						(descInfo[i].cmd == MV_NFC_CMD_READ_DISPATCH) ||
+						(descInfo[i].cmd == MV_NFC_CMD_READ_ID) ||
+						(descInfo[i].cmd == MV_NFC_CMD_READ_STATUS))
+				{
+					if(descInfo[i].numSgBuffs == 1) {
+						/* A single buffer, use physAddr */
+						dataDescVirtPtr[dataDescCount].physSrcAddr = nfcCtrl->regsPhysAddr + NFC_DATA_BUFF_ADDR;
+						dataDescVirtPtr[dataDescCount].physDestAddr = descInfo[i].physAddr + nPage*xferLen;
+						dataDescVirtPtr[dataDescCount].commandValue = mvPdmaCommandRegCalc(&nfcCtrl->dataChanHndl, MV_PDMA_PERIPH_TO_MEM, (descInfo[i].length ? descInfo[i].length : xferLen));
+					} else {
+						/* Scatter-gather operation, use sgBuffAdd */
+						for(buff = 0; buff < descInfo[i].numSgBuffs; buff++) {
+							if (buff != 0)
+								dataDescVirtPtr[dataDescCount-1].physDescPtr = (MV_U32)&dataDescPhysPtr[dataDescCount];
+							dataDescVirtPtr[dataDescCount].physSrcAddr = nfcCtrl->regsPhysAddr + NFC_DATA_BUFF_ADDR;
+							dataDescVirtPtr[dataDescCount].physDestAddr = descInfo[i].sgBuffAddr[buff];
+							dataDescVirtPtr[dataDescCount].commandValue = mvPdmaCommandRegCalc(&nfcCtrl->dataChanHndl, MV_PDMA_PERIPH_TO_MEM,  descInfo[i].sgBuffSize[buff]);
+							dataDescCount++;
+						}
+						dataDescCount--;
+					}
+				}
+				else /* Write */
+				{
+					if(descInfo[i].numSgBuffs == 1) {
+						/* A single buffer, use physAddr */
+						dataDescVirtPtr[dataDescCount].physSrcAddr = descInfo[i].physAddr + nPage*xferLen;
+						dataDescVirtPtr[dataDescCount].physDestAddr = nfcCtrl->regsPhysAddr + NFC_DATA_BUFF_ADDR;	
+						dataDescVirtPtr[dataDescCount].commandValue = mvPdmaCommandRegCalc(&nfcCtrl->dataChanHndl, MV_PDMA_MEM_TO_PERIPH, (descInfo[i].length ? descInfo[i].length : xferLen));
+					} else {
+						/* Scatter-gather operation, use sgBuffAdd */
+						for(buff = 0; buff < descInfo[i].numSgBuffs; buff++) {
+							if (buff != 0)
+								dataDescVirtPtr[dataDescCount-1].physDescPtr = (MV_U32)&dataDescPhysPtr[dataDescCount];
+							dataDescVirtPtr[dataDescCount].physSrcAddr = descInfo[i].sgBuffAddr[buff];
+							dataDescVirtPtr[dataDescCount].physDestAddr = nfcCtrl->regsPhysAddr + NFC_DATA_BUFF_ADDR;
+							dataDescVirtPtr[dataDescCount].commandValue = mvPdmaCommandRegCalc(&nfcCtrl->dataChanHndl, MV_PDMA_MEM_TO_PERIPH, descInfo[i].sgBuffSize[buff]);
+							dataDescCount++;
+						}
+						dataDescCount--;
+					}
+				}
+
+				dataDescVirtPtr[dataDescCount].physDescPtr = 0x1;
+				dataDescCount++;
+				
+				if(dataDescCount > MV_NFC_MAX_DESC_CHAIN)
+				{
+					return MV_OUT_OF_RANGE;
+				}
+			}
+		}
+	}
+
+#if 0
+	DBGPRINT ((DBGLVL "\ncmdDescPhysPtr  = %08x, Count = %d\n", (MV_U32)cmdDescPhysPtr, descCnt));
+	for(nPage = 0; nPage < descCnt; nPage++)
+	{
+		DBGPRINT ((DBGLVL "    Command[%d] physDescPtr  = %08x\n", nPage, cmdDescVirtPtr[nPage].physDescPtr));
+		DBGPRINT ((DBGLVL "    Command[%d] physSrcAddr  = %08x\n", nPage, cmdDescVirtPtr[nPage].physSrcAddr));
+		DBGPRINT ((DBGLVL "    Command[%d] physDestAddr = %08x\n", nPage, cmdDescVirtPtr[nPage].physDestAddr));
+		DBGPRINT ((DBGLVL "    Command[%d] commandValue = %08x\n", nPage, cmdDescVirtPtr[nPage].commandValue));
+		DBGPRINT ((DBGLVL "      NDCB0 = %08x, NDCB1 = %08x, NDCB2 = %08x, NDCB3 = %08x\n", 
+			cmdVirtPtr[nPage].cmdb0, cmdVirtPtr[nPage].cmdb1, cmdVirtPtr[nPage].cmdb2, cmdVirtPtr[nPage].cmdb3));
+	}
+
+	DBGPRINT ((DBGLVL "dataDescPhysPtr  = %08x, Count = %d\n", (MV_U32)dataDescPhysPtr, dataDescCount));
+	for(nPage = 0; nPage < dataDescCount; nPage++)
+	{
+		DBGPRINT ((DBGLVL "    Data[%d] physDescPtr  = %08x\n", nPage, dataDescVirtPtr[nPage].physDescPtr));
+		DBGPRINT ((DBGLVL "    Data[%d] physSrcAddr  = %08x\n", nPage, dataDescVirtPtr[nPage].physSrcAddr));
+		DBGPRINT ((DBGLVL "    Data[%d] physDestAddr = %08x\n", nPage, dataDescVirtPtr[nPage].physDestAddr));
+		DBGPRINT ((DBGLVL "    Data[%d] commandValue = %08x\n", nPage, dataDescVirtPtr[nPage].commandValue));
+	}
+#endif
+	if (dataDescCount)
+	{
+		/* enable interrupts in the last data descriptor. */
+		mvPdmaCommandIntrEnable(&nfcCtrl->dataChanHndl,
+				&(dataDescVirtPtr[dataDescCount - 1].commandValue));
+		/* operate the data DMA */
+		if (mvPdmaChanTransfer(&nfcCtrl->dataChanHndl, MV_PDMA_PERIPH_TO_MEM, 
+					0,0,0, (MV_U32)dataDescPhysPtr) != MV_OK)
+			return MV_HW_ERROR;
+	}
+
+	/* operate the command DMA */
+	if (mvPdmaChanTransfer(&nfcCtrl->cmdChanHndl, MV_PDMA_MEM_TO_PERIPH, 
+			0, 0, 0, (MV_U32)cmdDescPhysPtr) != MV_OK)
+		return MV_HW_ERROR;
+
+	/* Clear all old events on the status register */
+	reg = MV_REG_READ(NFC_STATUS_REG);
+	MV_REG_WRITE(NFC_STATUS_REG, reg);
+
+   	/* Start the whole command chain through setting the ND_RUN */
+   	/* Setting ND_RUN bit to start the new transaction - verify that controller in idle state */
+	while(timeout > 0) {
+		reg = MV_REG_READ(NFC_CONTROL_REG);
+		if (!(reg & NFC_CTRL_ND_RUN_MASK))
+			break;
+		timeout--;
+	}
+	if(timeout == 0)
+		return MV_BAD_STATE;
+
+	reg |= NFC_CTRL_ND_RUN_MASK;
+	MV_REG_WRITE(NFC_CONTROL_REG, reg);
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvNfcCommandPio
+*
+* DESCRIPTION:
+*       Issue a command to the NAND controller.
+*
+* INPUT:
+*	nfcCtrl   - Nand control structure.
+*	cmd_descr - The command to issue, page address, page number, data length
+*
+* OUTPUT:
+*	None.
+*
+* RETURN:
+*       MV_OK	   - On success,
+*	MV_TIMEOUT - Timeout while waiting for command request.
+*	MV_FAIL	   - On failure
+*******************************************************************************/
+MV_STATUS mvNfcCommandPio(MV_NFC_CTRL *nfcCtrl, MV_NFC_MULTI_CMD * cmd_desc, MV_BOOL next)
+{
+	MV_U32	reg;
+	MV_U32 	errCode = MV_OK;
+	MV_U32  cmdb_pio[4];
+	MV_U32* cmdb;
+	MV_U32	timeout = 10000;
+	MV_STATUS ret;
+
+	/* Check that a chip was selected */
+	if (nfcCtrl->currCs == MV_NFC_CS_NONE)
+		return MV_FAIL; 	
+
+	/* Clear all old events on the status register */
+	reg = MV_REG_READ(NFC_STATUS_REG);
+	MV_REG_WRITE(NFC_STATUS_REG, reg);
+
+   	/* Setting ND_RUN bit to start the new transaction - verify that controller in idle state */
+	while(timeout > 0) {
+		reg = MV_REG_READ(NFC_CONTROL_REG);
+		if (!(reg & NFC_CTRL_ND_RUN_MASK))
+			break;
+		timeout--;
+	}
+
+	if(timeout == 0)
+		return MV_BAD_STATE;
+
+	reg |= NFC_CTRL_ND_RUN_MASK;
+	MV_REG_WRITE(NFC_CONTROL_REG, reg);	
+
+	/* Wait for Command WRITE request */
+   	if ((errCode = mvDfcWait4Complete(NFC_SR_WRCMDREQ_MASK, 1)) != MV_OK)
+		return errCode;
+   	/* Build 12 byte Command */
+	if (nfcCtrl->ioMode == MV_NFC_PDMA_ACCESS)
+		cmdb = (MV_U32*)nfcCtrl->cmdBuff.bufVirtPtr;
+	else /* PIO mode */
+		cmdb = cmdb_pio;
+
+	if (nfcCtrl->eccMode != MV_NFC_ECC_DISABLE)
+	{
+		switch (cmd_desc->cmd) {
+			case MV_NFC_CMD_READ_MONOLITHIC:
+			case MV_NFC_CMD_READ_MULTIPLE:
+			case MV_NFC_CMD_READ_NAKED:
+			case MV_NFC_CMD_READ_LAST_NAKED:
+			case MV_NFC_CMD_WRITE_MONOLITHIC:
+			case MV_NFC_CMD_WRITE_MULTIPLE:
+			case MV_NFC_CMD_WRITE_NAKED:
+			case MV_NFC_CMD_WRITE_LAST_NAKED:
+				if (nfcCtrl->eccMode != MV_NFC_ECC_DISABLE) {
+					MV_REG_BIT_SET(NFC_CONTROL_REG, NFC_CTRL_ECC_EN_MASK);
+					if (nfcCtrl->eccMode != MV_NFC_ECC_HAMMING)
+						MV_REG_BIT_SET(NFC_ECC_CONTROL_REG, NFC_ECC_BCH_EN_MASK);
+				}
+				break;
+
+			default:
+				/* disable ECC for non-data commands */
+				MV_REG_BIT_RESET(NFC_CONTROL_REG, NFC_CTRL_ECC_EN_MASK);
+				MV_REG_BIT_RESET(NFC_ECC_CONTROL_REG, NFC_ECC_BCH_EN_MASK);
+				break;
+		};
+	}
+
+	/* Build the command buffer */
+	if ((ret = mvNfcBuildCommand(nfcCtrl, cmd_desc, cmdb)) != MV_OK)
+		return ret;
+
+	/* If next command, link to it */
+	if (next)
+		cmdb[0] |= NFC_CB0_NEXT_CMD_MASK;
+
+	/* issue command */
+   	MV_REG_WRITE(NFC_COMMAND_BUFF_0_REG, cmdb[0]);
+	MV_REG_WRITE(NFC_COMMAND_BUFF_0_REG, cmdb[1]);
+   	MV_REG_WRITE(NFC_COMMAND_BUFF_0_REG, cmdb[2]);
+   	MV_REG_WRITE(NFC_COMMAND_BUFF_0_REG, cmdb[3]);
+
+	return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvNfcStatusGet
+*
+* DESCRIPTION:
+*       Retrieve the NAND controller status to monitor the NAND access sequence.
+*
+* INPUT:
+*	nfcCtrl  - Nand control structure.
+*	cmd	 - The last issued command to get the status for.
+*
+* OUTPUT:
+*	value	- Relevant only if one of the MV_NFC_STATUS_BBD OR 
+*		  MV_NFC_STATUS_COR_ERROR errors is turned on.
+*		  For MV_NFC_STATUS_COR_ERROR: Holds the errors count.
+*		  For MV_NFC_STATUS_BBD: Holds the bad block address.
+*		  If error value is not desired, pass NULL as input.
+*
+* RETURN:
+*	A bitmask of the MV_NFC_STATUS_XXX status bits.
+*******************************************************************************/
+MV_U32 mvNfcStatusGet(MV_NFC_CTRL *nfcCtrl, MV_NFC_CMD_TYPE cmd, MV_U32 *value)
+{
+	MV_U32 reg, ret;
+	
+	if ((reg = MV_REG_READ(NFC_STATUS_REG)) == 0)
+		return 0;
+
+	if (value)
+		*value = ((reg & NFC_SR_ERR_CNT_MASK) >> NFC_SR_ERR_CNT_OFFS);
+
+	if ((nfcCtrl->currCs == MV_NFC_CS_0) || (nfcCtrl->currCs == MV_NFC_CS_2))
+	{
+		/* Clear out all non related interrupts */
+		reg &= (NFC_SR_CS0_BBD_MASK | NFC_SR_CS0_CMDD_MASK | NFC_SR_CS0_PAGED_MASK |
+			NFC_SR_RDY0_MASK | NFC_SR_WRCMDREQ_MASK | NFC_SR_RDDREQ_MASK | 
+			NFC_SR_WRDREQ_MASK | NFC_SR_CORERR_MASK | NFC_SR_UNCERR_MASK);
+
+		ret = (reg & (NFC_SR_WRCMDREQ_MASK | NFC_SR_RDDREQ_MASK | 
+			NFC_SR_WRDREQ_MASK | NFC_SR_CORERR_MASK | NFC_SR_UNCERR_MASK));
+
+		if (reg & NFC_SR_CS0_BBD_MASK)
+			ret |= MV_NFC_STATUS_BBD;
+		if (reg & NFC_SR_CS0_CMDD_MASK)
+			ret |= MV_NFC_STATUS_CMDD;
+		if (reg & NFC_SR_CS0_PAGED_MASK)
+			ret |= MV_NFC_STATUS_PAGED;
+		if (reg & NFC_SR_RDY0_MASK)
+			ret |= MV_NFC_STATUS_RDY;
+	}
+	else if ((nfcCtrl->currCs == MV_NFC_CS_1) || (nfcCtrl->currCs == MV_NFC_CS_3))
+	{
+		reg &= (NFC_SR_CS1_BBD_MASK | NFC_SR_CS1_CMDD_MASK | NFC_SR_CS1_PAGED_MASK |
+			NFC_SR_RDY1_MASK | NFC_SR_WRCMDREQ_MASK | NFC_SR_RDDREQ_MASK | 
+			NFC_SR_WRDREQ_MASK | NFC_SR_CORERR_MASK | NFC_SR_UNCERR_MASK);
+
+		ret = (reg & (NFC_SR_WRCMDREQ_MASK | NFC_SR_RDDREQ_MASK | 
+			NFC_SR_WRDREQ_MASK | NFC_SR_CORERR_MASK | NFC_SR_UNCERR_MASK));
+
+		if (reg & NFC_SR_CS1_BBD_MASK)
+			ret |= MV_NFC_STATUS_BBD;
+		if (reg & NFC_SR_CS1_CMDD_MASK)
+			ret |= MV_NFC_STATUS_CMDD;
+		if (reg & NFC_SR_CS1_PAGED_MASK)
+			ret |= MV_NFC_STATUS_PAGED;
+		if (reg & NFC_SR_RDY1_MASK)
+			ret |= MV_NFC_STATUS_RDY;
+	}
+	else
+	{
+		reg &= (NFC_SR_WRCMDREQ_MASK | NFC_SR_RDDREQ_MASK | 
+			NFC_SR_WRDREQ_MASK | NFC_SR_CORERR_MASK | NFC_SR_UNCERR_MASK);
+
+		ret = reg;
+	}	
+
+	/* Clear out all reported events */
+	MV_REG_WRITE(NFC_STATUS_REG, reg);
+
+	return ret;
+}
+
+
+/*******************************************************************************
+* mvNfcIntrSet
+*
+* DESCRIPTION:
+*       Enable / Disable a given set of the Nand controller interrupts.
+*
+* INPUT:
+*	inatMask - A bitmask of the interrupts to enable / disable.
+*	enable	 - MV_TRUE: Unmask the interrupts
+*		   MV_FALSE: Mask the interrupts.
+*
+* OUTPUT:
+*	None.
+*
+* RETURN:
+*       MV_OK	- On success,
+*	MV_FAIL	- On failure
+*******************************************************************************/
+MV_STATUS mvNfcIntrSet(MV_NFC_CTRL *nfcCtrl, MV_U32 intMask, MV_BOOL enable)
+{
+	MV_U32 reg;
+	MV_U32 msk = (intMask & (NFC_SR_WRCMDREQ_MASK | NFC_SR_RDDREQ_MASK | NFC_SR_WRDREQ_MASK | 
+		NFC_SR_CORERR_MASK | NFC_SR_UNCERR_MASK));
+
+	if ((nfcCtrl->currCs == MV_NFC_CS_0) || (nfcCtrl->currCs == MV_NFC_CS_2))
+	{
+		if (intMask & MV_NFC_STATUS_BBD)
+			msk |= NFC_SR_CS0_BBD_MASK;
+		if (intMask & MV_NFC_STATUS_CMDD)
+			msk |= NFC_SR_CS0_CMDD_MASK;
+		if (intMask & MV_NFC_STATUS_PAGED)
+			msk |= NFC_SR_CS0_PAGED_MASK;
+		if (intMask & MV_NFC_STATUS_RDY)
+			msk |= NFC_SR_RDY0_MASK;
+	}
+	else if ((nfcCtrl->currCs == MV_NFC_CS_1) || (nfcCtrl->currCs == MV_NFC_CS_3))
+	{
+		if (intMask & MV_NFC_STATUS_BBD)
+			msk |= NFC_SR_CS1_BBD_MASK;
+		if (intMask & MV_NFC_STATUS_CMDD)
+			msk |= NFC_SR_CS1_CMDD_MASK;
+		if (intMask & MV_NFC_STATUS_PAGED)
+			msk |= NFC_SR_CS1_PAGED_MASK;
+		if (intMask & MV_NFC_STATUS_RDY)
+			msk |= NFC_SR_RDY0_MASK;
+	}
+
+	reg = MV_REG_READ(NFC_CONTROL_REG);
+	if (enable)
+		reg &= ~msk;
+	else
+		reg |= msk;
+
+	MV_REG_WRITE(NFC_CONTROL_REG, reg);
+
+	return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvNfcReadWrite
+*
+* DESCRIPTION:
+*       Perform a read / write operation of a previously issued command.
+*	When working in PIO mode, this function will perform the read / write 
+*	operation from / to the supplied buffer.
+*	when working in PDMA mode, this function will trigger the PDMA to start
+*	the data transfer.
+*	In all cases, the user is responsible to make sure that the data 
+*	transfer operation was done successfully by polling the command done bit.
+*	Before calling this function, the Data-Read/Write request interrupts 
+*	should be disabled (the one relevant to the command being processed).
+*
+* INPUT:
+*	nfcCtrl     - Nand control structure.
+*	cmd	    - The previously issued command.
+*	virtBufAddr - [Relevant only when working in PIO mode]
+*		      The virtual address of the buffer to read to / write from.
+*	physBufAddr - [Relevant only when working in PDMA mode]
+*		      The physical address of the buffer to read to / write from.
+*		      The buffer should be cache coherent for PDMA access.
+*
+* OUTPUT:
+*	None.
+*
+* RETURN:
+*       MV_OK	- On success,
+*	MV_FAIL	- On failure
+*******************************************************************************/
+MV_STATUS mvNfcReadWrite(MV_NFC_CTRL *nfcCtrl, MV_NFC_CMD_TYPE cmd, MV_U32 *virtBufAddr, MV_U32 physBuffAddr)
+{
+	MV_U32 data_len = 0;
+	MV_U32 i;
+	MV_STATUS errCode;
+
+	if ((errCode = mvNfcTransferDataLength(nfcCtrl, cmd, &data_len)) != MV_OK)
+		return errCode;
+
+	switch (cmd)
+	{
+		case MV_NFC_CMD_READ_ID:
+		case MV_NFC_CMD_READ_STATUS:
+		case MV_NFC_CMD_READ_MONOLITHIC: /* Read a single 512B or 2KB page */
+		case MV_NFC_CMD_READ_MULTIPLE:
+		case MV_NFC_CMD_READ_NAKED:
+		case MV_NFC_CMD_READ_LAST_NAKED:
+		case MV_NFC_CMD_READ_DISPATCH:
+			/* Issue command based on IO mode */
+			if (nfcCtrl->ioMode == MV_NFC_PDMA_ACCESS)
+			{
+				/* operate the DMA */
+				if (mvPdmaChanTransfer(&nfcCtrl->dataChanHndl, MV_PDMA_PERIPH_TO_MEM, 
+						nfcCtrl->regsPhysAddr + NFC_DATA_BUFF_ADDR,
+						physBuffAddr, data_len, 0) != MV_OK)
+					return MV_HW_ERROR;
+			}
+			else /* PIO mode */
+			{
+				for (i=0; i<data_len; i+=4)
+				{	
+					*virtBufAddr = MV_REG_READ(NFC_DATA_BUFF_REG);
+					virtBufAddr++;
+				}
+			}
+			break;
+
+		case MV_NFC_CMD_WRITE_MONOLITHIC: /* Program a single page of 512B or 2KB */
+		case MV_NFC_CMD_WRITE_MULTIPLE:
+		case MV_NFC_CMD_WRITE_NAKED:
+		case MV_NFC_CMD_WRITE_LAST_NAKED:
+		case MV_NFC_CMD_WRITE_DISPATCH:
+			/* Issue command based on IO mode */
+			if (nfcCtrl->ioMode == MV_NFC_PDMA_ACCESS)
+			{
+				/* operate the DMA */
+				if (mvPdmaChanTransfer(&nfcCtrl->dataChanHndl, MV_PDMA_MEM_TO_PERIPH, 
+						physBuffAddr, nfcCtrl->regsPhysAddr + NFC_DATA_BUFF_ADDR,
+						data_len, 0) != MV_OK)
+					return MV_HW_ERROR;
+			}
+			else /* PIO mode */
+			{
+				for (i=0; i<data_len; i+=4)
+				{
+					MV_REG_WRITE(NFC_DATA_BUFF_REG, *virtBufAddr);
+					virtBufAddr++;
+				}				
+			}
+			break;
+
+		default:
+			return MV_BAD_PARAM;
+	};
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvNfcReadWritePio
+*
+* DESCRIPTION:
+*       Perform PIO read / write operation to the specified buffer.
+*
+* INPUT:
+*	nfcCtrl     - Nand control structure.
+*	buff        - The virtual address of the buffer to read to / write from.
+*	data_len    - Byte count to transfer
+*	mode        - Read / Write/ None
+*
+* OUTPUT:
+*	None.
+*
+* RETURN:
+*	None.
+*******************************************************************************/
+MV_VOID mvNfcReadWritePio(MV_NFC_CTRL *nfcCtrl, MV_U32 * buff, MV_U32 data_len, MV_NFC_PIO_RW_MODE mode)
+{
+	MV_U32 i;
+
+	switch (mode)
+	{
+		case MV_NFC_PIO_READ:
+			for (i=0; i<data_len; i+=4)
+			{	
+				*buff = MV_REG_READ(NFC_DATA_BUFF_REG);
+				buff++;
+			}
+			break;
+
+		case MV_NFC_PIO_WRITE: /* Program a single page of 512B or 2KB */
+			for (i=0; i<data_len; i+=4)
+			{
+				MV_REG_WRITE(NFC_DATA_BUFF_REG, *buff);
+				buff++;
+			}				
+			break;
+
+		default:
+			/* nothing to do */
+			break;
+	};
+}
+
+
+/*******************************************************************************
+* mvNfcAddress2RowConvert
+*
+* DESCRIPTION:
+*       Convert an absolute flash address to row index.
+*
+* INPUT:
+*	nfcCtrl  - Nand control structure.
+*	address	 - The absolute flash address.
+*
+* OUTPUT:
+*	row	 - The row number corresponding to the given address.
+*	colOffset- The column offset within the row.
+*
+* RETURN:
+*	None
+*******************************************************************************/
+MV_VOID mvNfcAddress2RowConvert(MV_NFC_CTRL *nfcCtrl, MV_U32 address, MV_U32 *row, MV_U32 *colOffset)
+{
+	
+	if (flashDeviceInfo[nfcCtrl->flashIdx].pgSz < MV_NFC_2KB_PAGE) /* Small Page */
+	{	
+		*colOffset = (address & 0xFF);
+		*row = (address >> 9);
+	}
+	else /* Large Page */
+	{
+		*colOffset = (address & (flashDeviceInfo[nfcCtrl->flashIdx].pgSz - 1));
+
+		/* Calculate the page bits */
+		*row = (address >> mvNfcColBits(flashDeviceInfo[nfcCtrl->flashIdx].pgSz));
+	}
+}
+
+/*******************************************************************************
+* mvNfcAddress2BlockConvert
+*
+* DESCRIPTION:
+*       Convert an absolute flash address to erasable block address
+*
+* INPUT:
+*	nfcCtrl  - Nand control structure.
+*	address	 - The absolute flash address.
+*
+* OUTPUT:
+*	blk - block address
+*
+* RETURN:
+*	None
+*******************************************************************************/
+MV_VOID mvNfcAddress2BlockConvert(MV_NFC_CTRL *nfcCtrl, MV_U32 address, MV_U32 *blk)
+{
+	*blk = (address / (flashDeviceInfo[nfcCtrl->flashIdx].pgSz * flashDeviceInfo[nfcCtrl->flashIdx].pgPrBlk));
+}
+
+/*******************************************************************************
+* mvNfcAddress2BlockConvert
+*
+* DESCRIPTION:
+*       Convert an absolute flash address to erasable block address
+*
+* INPUT:
+*	nfcCtrl  - Nand control structure.
+*	address	 - The absolute flash address.
+*
+* OUTPUT:
+*	blk - block address
+*
+* RETURN:
+*	None
+*******************************************************************************/
+MV_8 * mvNfcFlashModelGet(MV_NFC_CTRL *nfcCtrl)
+{
+	static MV_8 * unk_dev = "Unknown Flash Device";
+
+	if (nfcCtrl->flashIdx >= (sizeof(flashDeviceInfo)/sizeof(MV_NFC_FLASH_INFO)))
+		return unk_dev;
+	
+	return flashDeviceInfo[nfcCtrl->flashIdx].model;
+}
+
+/*******************************************************************************
+* mvNfcFlashPageSizeGet
+*
+* DESCRIPTION:
+*       Retrieve the logical page size of a given flash.
+*
+* INPUT:
+*	nfcCtrl  - Nand control structure.
+*
+* OUTPUT:
+*	size - Flash page size in bytes.
+*	totalSize - Page size including spare area.
+*		    (Pass NULL if not needed).
+*
+* RETURN:
+*	MV_NOT_FOUND - Bad flash index.
+*******************************************************************************/
+MV_STATUS mvNfcFlashPageSizeGet(MV_NFC_CTRL *nfcCtrl, MV_U32 *size, MV_U32 *totalSize)
+{
+        if (nfcCtrl->flashIdx >= (sizeof(flashDeviceInfo)/sizeof(MV_NFC_FLASH_INFO)))
+		return MV_NOT_FOUND;
+	if(size == NULL)
+		return MV_BAD_PTR;
+
+	if(nfcCtrl->ifMode == MV_NFC_IF_2X8)
+		*size = flashDeviceInfo[nfcCtrl->flashIdx].pgSz << 1;
+	else
+		*size = flashDeviceInfo[nfcCtrl->flashIdx].pgSz;
+
+	if(totalSize) {
+		mvNfcTransferDataLength(nfcCtrl, MV_NFC_CMD_READ_MONOLITHIC, totalSize);
+		if(nfcCtrl->ifMode == MV_NFC_IF_2X8)
+			*totalSize = (*totalSize) << 1;
+		if(flashDeviceInfo[nfcCtrl->flashIdx].pgSz > MV_NFC_2KB_PAGE)
+			*totalSize = (*totalSize) << 1;
+	}
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvNfcFlashBlockSizeGet
+*
+* DESCRIPTION:
+*       Retrieve the logical block size of a given flash.
+*
+* INPUT:
+*	nfcCtrl  - Nand control structure.
+*
+* OUTPUT:
+*	size - Flash size in bytes.
+*
+* RETURN:
+*	MV_NOT_FOUND - Bad flash index.
+*******************************************************************************/
+MV_STATUS mvNfcFlashBlockSizeGet(MV_NFC_CTRL *nfcCtrl, MV_U32 *size)
+{
+        if (nfcCtrl->flashIdx >= (sizeof(flashDeviceInfo)/sizeof(MV_NFC_FLASH_INFO)))
+		return MV_NOT_FOUND;
+	if(size == NULL)
+		return MV_BAD_PTR;
+
+	if(nfcCtrl->ifMode == MV_NFC_IF_2X8)
+		*size = ((flashDeviceInfo[nfcCtrl->flashIdx].pgSz << 1) * flashDeviceInfo[nfcCtrl->flashIdx].pgPrBlk);
+	else
+		*size = (flashDeviceInfo[nfcCtrl->flashIdx].pgSz * flashDeviceInfo[nfcCtrl->flashIdx].pgPrBlk);
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvNfcFlashBlockNumGet
+*
+* DESCRIPTION:
+*       Retrieve the number of logical blocks of a given flash.
+*
+* INPUT:
+*	nfcCtrl  - Nand control structure.
+*
+* OUTPUT:
+*	numBlocks - Flash number of blocks.
+*
+* RETURN:
+*	MV_NOT_FOUND - Bad flash index.
+*******************************************************************************/
+MV_STATUS mvNfcFlashBlockNumGet(MV_NFC_CTRL *nfcCtrl, MV_U32 *numBlocks)
+{
+        if (nfcCtrl->flashIdx >= (sizeof(flashDeviceInfo)/sizeof(MV_NFC_FLASH_INFO)))
+		return MV_NOT_FOUND;
+	if(numBlocks == NULL)
+		return MV_BAD_PTR;
+	
+	*numBlocks = flashDeviceInfo[nfcCtrl->flashIdx].blkNum;
+
+	return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvNfcFlashIdGet
+*
+* DESCRIPTION:
+*       Retrieve the flash device ID.
+*
+* INPUT:
+*	nfcCtrl  - Nand control structure.
+*
+* OUTPUT:
+*	flashId - Flash ID.
+*
+* RETURN:
+*	MV_NOT_FOUND - Bad flash index.
+*******************************************************************************/
+MV_STATUS mvNfcFlashIdGet(MV_NFC_CTRL *nfcCtrl, MV_U32 *flashId)
+{
+        if (nfcCtrl->flashIdx >= (sizeof(flashDeviceInfo)/sizeof(MV_NFC_FLASH_INFO)))
+		return MV_NOT_FOUND;
+
+	if(flashId == NULL)
+		return MV_BAD_PTR;
+
+	*flashId = flashDeviceInfo[nfcCtrl->flashIdx].id;
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvNfcUnitStateStore - Store the NFC Unit state.
+* 
+* DESCRIPTION:       
+*       This function stores the NFC unit registers before the unit is suspended.
+*	The stored registers are placed into the input buffer which will be used for
+*	the restore operation.
+*
+* INPUT:
+*       regsData	- Buffer to store the unit state registers (Must
+*			  include at least 64 entries)
+*	len		- Number of entries in regsData input buffer.
+*
+* OUTPUT:
+*       regsData	- Unit state registers. The registers are stored in
+*			  pairs of (reg, value).
+*       len		- Number of entries in regsData buffer (Must be even).
+*
+* RETURS:
+*       MV_ERROR on failure.
+*       MV_OK on success.
+*
+*******************************************************************************/
+MV_STATUS mvNfcUnitStateStore(MV_U32 *stateData, MV_U32 *len)
+{
+	MV_U32 i;
+
+	if((stateData == NULL) || (len == NULL))
+		return MV_BAD_PARAM;
+
+	i = 0;
+
+	stateData[i++] = NFC_CONTROL_REG;
+	stateData[i++] = MV_REG_READ(NFC_CONTROL_REG);
+
+	stateData[i++] = NFC_TIMING_0_REG;
+	stateData[i++] = MV_REG_READ(NFC_TIMING_0_REG);
+
+	stateData[i++] = NFC_TIMING_1_REG;
+	stateData[i++] = MV_REG_READ(NFC_TIMING_1_REG);
+
+	stateData[i++] = NFC_ECC_CONTROL_REG;
+	stateData[i++] = MV_REG_READ(NFC_ECC_CONTROL_REG);
+	*len = i;
+
+	return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvDfcWait4Complete
+*
+* DESCRIPTION:
+*  	Wait for event or process to complete
+*
+* INPUT:
+*	statMask: bit to wait from in status register NDSR
+*	usec: Max uSec to wait for event
+*
+* OUTPUT:
+*	None.
+*
+* RETURN:
+*       MV_OK		- On success,
+*	MV_TIMEOUT 	- Error accessing the underlying flahs device.
+*******************************************************************************/
+static MV_STATUS mvDfcWait4Complete(MV_U32 statMask, MV_U32 usec)
+{
+	MV_U32 i, sts;
+
+	for (i=0; i<usec; i++)
+	{
+		sts = (MV_REG_READ(NFC_STATUS_REG) & statMask);
+		if (sts)
+		{
+			MV_REG_WRITE(NFC_STATUS_REG, sts);
+			return MV_OK;
+		}
+		mvOsUDelay(1);
+	}
+	
+	return MV_TIMEOUT;
+}
+
+/*******************************************************************************
+* mvNfcReadIdNative
+*
+* DESCRIPTION:
+*       Read the flash Manufacturer and device ID in PIO mode.
+*
+* INPUT:
+*	None.
+*
+* OUTPUT:
+*	id: Manufacturer and Device Id detected (valid only if return is MV_OK).
+*
+* RETURN:
+*       MV_OK		- On success,
+*	MV_TIMEOUT 	- Error accessing the underlying flahs device.
+*	MV_FAIL		- On failure
+*******************************************************************************/
+static MV_STATUS mvNfcReadIdNative(MV_NFC_CHIP_SEL cs, MV_U16 *id)
+{
+	MV_U32 reg, cmdb0 = 0,cmdb2 = 0;
+	MV_U32 errCode = MV_OK;
+	
+	/* Clear all old events on the status register */
+	reg = MV_REG_READ(NFC_STATUS_REG);
+	MV_REG_WRITE(NFC_STATUS_REG, reg);
+	
+   	/* Setting ND_RUN bit to start the new transaction */
+	reg = MV_REG_READ(NFC_CONTROL_REG);
+	reg |= NFC_CTRL_ND_RUN_MASK;
+	MV_REG_WRITE(NFC_CONTROL_REG, reg);
+
+	/* Wait for Command WRITE request */
+   	if ((errCode = mvDfcWait4Complete(NFC_SR_WRCMDREQ_MASK, 1)) != MV_OK) {
+		return errCode;
+	}
+
+   	/* Send Command */
+	reg =  NFC_NATIVE_READ_ID_CMD;
+	reg |= (0x1 <<  NFC_CB0_ADDR_CYC_OFFS);
+	reg |= NFC_CB0_CMD_TYPE_READ_ID;
+	cmdb0 = reg;
+	if ((cs == MV_NFC_CS_1) || (cs == MV_NFC_CS_3))
+        	cmdb0 |= NFC_CB0_CSEL_MASK;
+
+	if ((cs == MV_NFC_CS_2) || (cs == MV_NFC_CS_3))
+        	cmdb2 |= NFC_CB2_CS_2_3_SELECT_MASK;
+
+   	MV_REG_WRITE(NFC_COMMAND_BUFF_0_REG, cmdb0);
+   	MV_REG_WRITE(NFC_COMMAND_BUFF_0_REG, 0x0);
+   	MV_REG_WRITE(NFC_COMMAND_BUFF_0_REG, cmdb2);
+
+	/* Wait for Data READ request */
+   	if ((errCode = mvDfcWait4Complete(NFC_SR_RDDREQ_MASK, 10)) != MV_OK) {
+		return errCode;
+	}
+
+	/*  Read the read ID bytes. + read 4 bogus bytes */	
+	*id = (MV_U16)(MV_REG_READ(NFC_DATA_BUFF_REG) & 0xFFFF);
+	reg = MV_REG_READ(NFC_DATA_BUFF_REG); /* dummy read to complete 8 bytes */
+
+	reg = MV_REG_READ(NFC_CONTROL_REG);
+	if (reg & NFC_CTRL_ND_RUN_MASK)
+	{
+		MV_REG_WRITE(NFC_CONTROL_REG, (reg & ~NFC_CTRL_ND_RUN_MASK));
+		return MV_BAD_STATE;
+	}
+
+	return MV_OK;
+} 
+
+/*******************************************************************************
+* mvNfcTimingSet
+*
+* DESCRIPTION:
+*       Set all flash timing parameters for optimized operation
+*
+* INPUT:
+*	tclk: Tclk frequency,
+	flInfo: timing information
+*
+* OUTPUT:
+*	None.
+*
+* RETURN:
+*       MV_OK		- On success,
+*	MV_FAIL		- On failure
+*******************************************************************************/
+static MV_STATUS mvNfcTimingSet(MV_U32 tclk, MV_NFC_FLASH_INFO *flInfo)
+{
+	MV_U32 reg;
+	MV_U32 clk2ns;
+
+	switch (tclk) {
+		case 166666667:
+			clk2ns = 6;
+			break;
+		case 200000000:
+			clk2ns = 5;
+			break;
+		case 250000000:
+			clk2ns = 4;
+			break;
+		default:
+			return MV_FAIL;
+	};
+
+	/* Configure the Timing-0 register */
+	reg = 0;
+	reg |= NFC_TMNG0_SEL_CNTR_MASK;
+	reg |= ((ns_clk(flInfo->tADL, clk2ns) << NFC_TMNG0_TADL_OFFS) & NFC_TMNG0_TADL_MASK);
+	reg |= ((ns_clk(flInfo->tCH, clk2ns) << NFC_TMNG0_TCH_OFFS) & NFC_TMNG0_TCH_MASK);
+	reg |= ((ns_clk(flInfo->tCS, clk2ns) << NFC_TMNG0_TCS_OFFS) & NFC_TMNG0_TCS_MASK);
+	reg |= ((ns_clk(flInfo->tWH, clk2ns) << NFC_TMNG0_TWH_OFFS) & NFC_TMNG0_TWH_MASK);
+	reg |= ((ns_clk(flInfo->tWP, clk2ns) << NFC_TMNG0_TWP_OFFS) & NFC_TMNG0_TWP_MASK);
+	reg |= ((ns_clk(flInfo->tRH, clk2ns) << NFC_TMNG0_TRH_OFFS) & NFC_TMNG0_TRH_MASK);
+	reg |= ((ns_clk(flInfo->tRP, clk2ns) << NFC_TMNG0_TRP_OFFS) & NFC_TMNG0_TRP_MASK);
+	MV_REG_WRITE(NFC_TIMING_0_REG, reg);
+
+	/* Configure the Timing-1 register */
+	reg = 0;
+	reg |= ((ns_clk(flInfo->tR, clk2ns) << NFC_TMNG1_TR_OFFS) & NFC_TMNG1_TR_MASK);
+	reg |= ((ns_clk(flInfo->tWHR, clk2ns) << NFC_TMNG1_TWHR_OFFS) & NFC_TMNG1_TWHR_MASK);
+	reg |= ((ns_clk(flInfo->tAR, clk2ns) << NFC_TMNG1_TAR_OFFS) & NFC_TMNG1_TAR_MASK);
+	reg |= (((flInfo->tRHW / 16) << NFC_TMNG1_TRHW_OFFS) & NFC_TMNG1_TRHW_MASK);
+	reg |= NFC_TMNG1_WAIT_MODE_MASK;
+	MV_REG_WRITE(NFC_TIMING_1_REG, reg);
+	
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvNfcColBits
+*
+* DESCRIPTION:
+*       Calculate number of bits representing column part of the address
+*
+* INPUT:
+	pg_size: page size
+*
+* OUTPUT:
+*	None.
+*
+* RETURN:
+*	Number of bits representing a column
+*******************************************************************************/
+static MV_U32 mvNfcColBits(MV_U32 pg_size)
+{
+	MV_U32 shift = 0;
+	while(pg_size)
+	{
+        	++shift;
+		pg_size >>=1;
+	};
+
+	return (shift-1);
+}
+
+/*******************************************************************************
+* mvNfcEccModeSet
+*
+* DESCRIPTION:
+*       Set the ECC mode at runtime to BCH, Hamming or No Ecc.
+*
+* INPUT:
+*	nfcCtrl  - Nand control structure. 
+*	MV_NFC_ECC_MODE eccMode: ECC type (BCH, Hamming or No Ecc)
+*
+* OUTPUT:
+*	None.
+*
+* RETURN:
+*	previous ECC mode.
+*******************************************************************************/
+MV_NFC_ECC_MODE mvNfcEccModeSet(MV_NFC_CTRL *nfcCtrl, MV_NFC_ECC_MODE eccMode)
+{
+	MV_NFC_ECC_MODE prevEccMode;
+
+	prevEccMode = nfcCtrl->eccMode;
+	nfcCtrl->eccMode = eccMode;
+	return prevEccMode;
+}
+
+/*******************************************************************************
+* mvNfcBadBlockPageNumber
+*
+* DESCRIPTION:
+*       Get the page number within the block holding the bad block indication
+*
+* INPUT:
+*	nfcCtrl  - Nand control structure.
+*
+* OUTPUT:
+*	None
+*
+* RETURN:
+*       page number having the bad block indicator
+*******************************************************************************/
+MV_U32 mvNfcBadBlockPageNumber(MV_NFC_CTRL *nfcCtrl)
+{
+	return flashDeviceInfo[nfcCtrl->flashIdx].bb_page;
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/nfc/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/nfc/Makefile
@@ -0,0 +1,4 @@
+include $(srctree)/$(subst ",,$(CONFIG_MV_HAL_RULES_PATH))
+# Objects list
+obj-$(CONFIG_MV_INCLUDE_NFC) += mvNfc.o
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/nfc/mvCompVer.txt
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/nfc/mvCompVer.txt
@@ -0,0 +1,4 @@
+Global HAL Version: DOVE_HAL_3_1_2
+Unit HAL Version: 1.0.2
+Description: This component includes an implementation of the unit HAL drivers
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/nfc/mvNfcRegs.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/nfc/mvNfcRegs.h
@@ -0,0 +1,313 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCMVNFCREGSH
+#define __INCMVNFCREGSH
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "mvSysNfcConfig.h"
+
+/* NAND Flash Control Register */
+#define	NFC_CONTROL_REG			(MV_NFC_REGS_BASE + 0x0)
+#define	NFC_CTRL_WRCMDREQ_MASK		(0x1 << 0)
+#define NFC_CTRL_RDDREQ_MASK		(0x1 << 1)
+#define NFC_CTRL_WRDREQ_MASK		(0x1 << 2)
+#define NFC_CTRL_CORRERR_MASK		(0x1 << 3)
+#define NFC_CTRL_UNCERR_MASK		(0x1 << 4)
+#define NFC_CTRL_CS1_BBD_MASK		(0x1 << 5)
+#define NFC_CTRL_CS0_BBD_MASK		(0x1 << 6)
+#define NFC_CTRL_CS1_CMDD_MASK		(0x1 << 7)
+#define NFC_CTRL_CS0_CMDD_MASK		(0x1 << 8)
+#define NFC_CTRL_CS1_PAGED_MASK		(0x1 << 9)
+#define NFC_CTRL_CS0_PAGED_MASK		(0x1 << 10)
+#define NFC_CTRL_RDY_MASK		(0x1 << 11)
+#define NFC_CTRL_ND_ARB_EN_MASK		(0x1 << 12)
+#define NFC_CTRL_PG_PER_BLK_OFFS	13
+#define NFC_CTRL_PG_PER_BLK_MASK	(0x3 << NFC_CTRL_PG_PER_BLK_OFFS)
+#define NFC_CTRL_PG_PER_BLK_32		(0x0 << NFC_CTRL_PG_PER_BLK_OFFS)
+#define NFC_CTRL_PG_PER_BLK_64		(0x2 << NFC_CTRL_PG_PER_BLK_OFFS)
+#define NFC_CTRL_PG_PER_BLK_128		(0x1 << NFC_CTRL_PG_PER_BLK_OFFS)
+#define NFC_CTRL_PG_PER_BLK_256		(0x3 << NFC_CTRL_PG_PER_BLK_OFFS)
+#define NFC_CTRL_RA_START_MASK		(0x1 << 15)
+#define NFC_CTRL_RD_ID_CNT_OFFS		16
+#define NFC_CTRL_RD_ID_CNT_MASK		(0x7 << NFC_CTRL_RD_ID_CNT_OFFS)
+#define NFC_CTRL_RD_ID_CNT_SP		(0x2 << NFC_CTRL_RD_ID_CNT_OFFS)
+#define NFC_CTRL_RD_ID_CNT_LP		(0x4 << NFC_CTRL_RD_ID_CNT_OFFS)
+#define NFC_CTRL_CLR_PG_CNT_MASK	(0x1 << 20)
+#define NFC_CTRL_FORCE_CSX_MASK		(0x1 << 21)
+#define NFC_CTRL_ND_STOP_MASK		(0x1 << 22)
+#define NFC_CTRL_SEQ_DIS_MASK		(0x1 << 23)
+#define NFC_CTRL_PAGE_SZ_OFFS		24
+#define NFC_CTRL_PAGE_SZ_MASK		(0x3 << NFC_CTRL_PAGE_SZ_OFFS)
+#define NFC_CTRL_PAGE_SZ_512B		(0x0 << NFC_CTRL_PAGE_SZ_OFFS)
+#define NFC_CTRL_PAGE_SZ_2KB		(0x1 << NFC_CTRL_PAGE_SZ_OFFS)
+#define NFC_CTRL_DWIDTH_M_MASK		(0x1 << 26)
+#define NFC_CTRL_DWIDTH_C_MASK		(0x1 << 27)
+#define NFC_CTRL_ND_RUN_MASK		(0x1 << 28)
+#define NFC_CTRL_DMA_EN_MASK		(0x1 << 29)
+#define NFC_CTRL_ECC_EN_MASK		(0x1 << 30)
+#define NFC_CTRL_SPARE_EN_MASK		(0x1 << 31)
+
+/* NAND Interface Timing Parameter 0 Register */
+#define NFC_TIMING_0_REG		(MV_NFC_REGS_BASE + 0x4)
+#define NFC_TMNG0_TRP_OFFS		0
+#define NFC_TMNG0_TRP_MASK		(0x7 << NFC_TMNG0_TRP_OFFS)
+#define NFC_TMNG0_TRH_OFFS		3
+#define NFC_TMNG0_TRH_MASK		(0x7 << NFC_TMNG0_TRH_OFFS)
+#define NFC_TMNG0_ETRP_MASK		(0x1 << 6)
+#define NFC_TMNG0_SEL_NRE_EDGE_MASK	(0x1 << 7)
+#define NFC_TMNG0_TWP_OFFS		8
+#define NFC_TMNG0_TWP_MASK		(0x7 << NFC_TMNG0_TWP_OFFS)
+#define NFC_TMNG0_TWH_OFFS		11
+#define NFC_TMNG0_TWH_MASK		(0x7 << NFC_TMNG0_TWH_OFFS)
+#define NFC_TMNG0_TCS_OFFS		16
+#define NFC_TMNG0_TCS_MASK		(0x7 << NFC_TMNG0_TCS_OFFS)
+#define NFC_TMNG0_TCH_OFFS		19
+#define NFC_TMNG0_TCH_MASK		(0x7 << NFC_TMNG0_TCH_OFFS)
+#define NFC_TMNG0_RD_CNT_DEL_OFFS	22
+#define NFC_TMNG0_RD_CNT_DEL_MASK	(0xF << NFC_TMNG0_RD_CNT_DEL_OFFS)
+#define NFC_TMNG0_SEL_CNTR_MASK		(0x1 << 26)
+#define NFC_TMNG0_TADL_OFFS		27
+#define NFC_TMNG0_TADL_MASK		(0x1F << NFC_TMNG0_TADL_OFFS)
+
+/* NAND Interface Timing Parameter 1 Register */
+#define NFC_TIMING_1_REG		(MV_NFC_REGS_BASE + 0xC)
+#define NFC_TMNG1_TAR_OFFS		0
+#define NFC_TMNG1_TAR_MASK		(0xF << NFC_TMNG1_TAR_OFFS)
+#define NFC_TMNG1_TWHR_OFFS		4
+#define NFC_TMNG1_TWHR_MASK		(0xF << NFC_TMNG1_TWHR_OFFS)
+#define NFC_TMNG1_TRHW_OFFS		8
+#define NFC_TMNG1_TRHW_MASK		(0x3 << NFC_TMNG1_TRHW_OFFS)
+#define NFC_TMNG1_PRESCALE_MASK		(0x1 << 14)
+#define NFC_TMNG1_WAIT_MODE_MASK	(0x1 << 15)
+#define NFC_TMNG1_TR_OFFS		16
+#define NFC_TMNG1_TR_MASK		(0xFFFF << NFC_TMNG1_TR_OFFS)
+
+/* NAND Controller Status Register - NDSR */
+#define NFC_STATUS_REG			(MV_NFC_REGS_BASE + 0x14)
+#define NFC_SR_WRCMDREQ_MASK		(0x1 << 0)
+#define NFC_SR_RDDREQ_MASK		(0x1 << 1)
+#define NFC_SR_WRDREQ_MASK		(0x1 << 2)
+#define NFC_SR_CORERR_MASK		(0x1 << 3)
+#define NFC_SR_UNCERR_MASK		(0x1 << 4)
+#define NFC_SR_CS1_BBD_MASK		(0x1 << 5)
+#define NFC_SR_CS0_BBD_MASK		(0x1 << 6)
+#define NFC_SR_CS1_CMDD_MASK		(0x1 << 7)
+#define NFC_SR_CS0_CMDD_MASK		(0x1 << 8)
+#define NFC_SR_CS1_PAGED_MASK		(0x1 << 9)
+#define NFC_SR_CS0_PAGED_MASK		(0x1 << 10)
+#define NFC_SR_RDY0_MASK		(0x1 << 11)
+#define NFC_SR_RDY1_MASK		(0x1 << 12)
+#define NFC_SR_ALLIRQ_MASK		(0x1FFF << 0)
+#define NFC_SR_TRUSTVIO_MASK		(0x1 << 15)
+#define NFC_SR_ERR_CNT_OFFS		16
+#define NFC_SR_ERR_CNT_MASK		(0x1F << NFC_SR_ERR_CNT_OFFS)
+
+/* NAND Controller Page Count Register */
+#define NFC_PAGE_COUNT_REG		(MV_NFC_REGS_BASE + 0x18)
+#define NFC_PCR_PG_CNT_0_OFFS		0
+#define NFC_PCR_PG_CNT_0_MASK		(0xFF << NFC_PCR_PG_CNT_0_OFFS)
+#define NFC_PCR_PG_CNT_1_OFFS		16
+#define NFC_PCR_PG_CNT_1_MASK		(0xFF << NFC_PCR_PG_CNT_1_OFFS)
+
+/* NAND Controller Bad Block 0 Register */
+#define NFC_BAD_BLOCK_0_REG		(MV_NFC_REGS_BASE + 0x1C)
+
+/* NAND Controller Bad Block 1 Register */
+#define NFC_BAD_BLOCK_1_REG		(MV_NFC_REGS_BASE + 0x20)
+
+/* NAND ECC Controle Register */
+#define NFC_ECC_CONTROL_REG		(MV_NFC_REGS_BASE + 0x28)
+#define NFC_ECC_BCH_EN_MASK		(0x1 << 0)
+#define NFC_ECC_THRESHOLD_OFFS		1
+#define NFC_ECC_THRESHOLF_MASK		(0x3F << NFC_ECC_THRESHOLD_OFFS)
+#define NFC_ECC_SPARE_OFFS		7
+#define NFC_ECC_SPARE_MASK		(0xFF << NFC_ECC_SPARE_OFFS)
+
+/* NAND Busy Length Count */
+#define NFC_BUSY_LEN_CNT_REG		(MV_NFC_REGS_BASE + 0x2C)
+#define NFC_BUSY_CNT_0_OFFS		0
+#define NFC_BUSY_CNT_0_MASK		(0xFFFF << NFC_BUSY_CNT_0_OFFS)
+#define NFC_BUSY_CNT_1_OFFS		16
+#define NFC_BUSY_CNT_1_MASK		(0xFFFF << NFC_BUSY_CNT_1_OFFS)
+
+/* NAND Mutex Lock */
+#define NFC_MUTEX_LOCK_REG		(MV_NFC_REGS_BASE + 0x30)
+#define NFC_MUTEX_LOCK_MASK		(0x1 << 0)
+
+/* NAND Partition Command Match */
+#define NFC_PART_CMD_MACTH_1_REG	(MV_NFC_REGS_BASE + 0x34)
+#define NFC_PART_CMD_MACTH_2_REG	(MV_NFC_REGS_BASE + 0x38)
+#define NFC_PART_CMD_MACTH_3_REG	(MV_NFC_REGS_BASE + 0x3C)
+#define NFC_CMDMAT_CMD1_MATCH_OFFS	0
+#define NFC_CMDMAT_CMD1_MATCH_MASK	(0xFF << NFC_CMDMAT_CMD1_MATCH_OFFS)
+#define NFC_CMDMAT_CMD1_ROWADD_MASK	(0x1 << 8)
+#define NFC_CMDMAT_CMD1_NKDDIS_MASK	(0x1 << 9)
+#define NFC_CMDMAT_CMD2_MATCH_OFFS	10
+#define NFC_CMDMAT_CMD2_MATCH_MASK	(0xFF << NFC_CMDMAT_CMD2_MATCH_OFFS)
+#define NFC_CMDMAT_CMD2_ROWADD_MASK	(0x1 << 18)
+#define NFC_CMDMAT_CMD2_NKDDIS_MASK	(0x1 << 19)
+#define NFC_CMDMAT_CMD3_MATCH_OFFS	20
+#define NFC_CMDMAT_CMD3_MATCH_MASK	(0xFF << NFC_CMDMAT_CMD3_MATCH_OFFS)
+#define NFC_CMDMAT_CMD3_ROWADD_MASK	(0x1 << 28)
+#define NFC_CMDMAT_CMD3_NKDDIS_MASK	(0x1 << 29)
+#define NFC_CMDMAT_VALID_CNT_OFFS	30
+#define NFC_CMDMAT_VALID_CNT_MASK	(0x3 << NFC_CMDMAT_VALID_CNT_OFFS)
+
+/* NAND Controller Data Buffer */
+#define NFC_DATA_BUFF_REG_4PDMA		(MV_NFC_REGS_OFFSET + 0x40)
+#define NFC_DATA_BUFF_REG		(MV_NFC_REGS_BASE + 0x40)
+
+/* NAND Controller Command Buffer 0 */
+#define NFC_COMMAND_BUFF_0_REG_4PDMA	(MV_NFC_REGS_OFFSET + 0x48)
+#define NFC_COMMAND_BUFF_0_REG		(MV_NFC_REGS_BASE + 0x48)
+#define NFC_CB0_CMD1_OFFS		0
+#define NFC_CB0_CMD1_MASK		(0xFF << NFC_CB0_CMD1_OFFS)
+#define NFC_CB0_CMD2_OFFS		8
+#define NFC_CB0_CMD2_MASK		(0xFF << NFC_CB0_CMD2_OFFS)
+#define NFC_CB0_ADDR_CYC_OFFS		16
+#define NFC_CB0_ADDR_CYC_MASK		(0x7 << NFC_CB0_ADDR_CYC_OFFS)
+#define NFC_CB0_DBC_MASK			(0x1 << 19)
+#define NFC_CB0_NEXT_CMD_MASK		(0x1 << 20)
+#define NFC_CB0_CMD_TYPE_OFFS		21
+#define NFC_CB0_CMD_TYPE_MASK		(0x7 << NFC_CB0_CMD_TYPE_OFFS)
+#define NFC_CB0_CMD_TYPE_READ		(0x0 << NFC_CB0_CMD_TYPE_OFFS)
+#define NFC_CB0_CMD_TYPE_WRITE		(0x1 << NFC_CB0_CMD_TYPE_OFFS)
+#define NFC_CB0_CMD_TYPE_ERASE		(0x2 << NFC_CB0_CMD_TYPE_OFFS)
+#define NFC_CB0_CMD_TYPE_READ_ID	(0x3 << NFC_CB0_CMD_TYPE_OFFS)
+#define NFC_CB0_CMD_TYPE_STATUS		(0x4 << NFC_CB0_CMD_TYPE_OFFS)
+#define NFC_CB0_CMD_TYPE_RESET		(0x5 << NFC_CB0_CMD_TYPE_OFFS)
+#define NFC_CB0_CMD_TYPE_NAKED_CMD	(0x6 << NFC_CB0_CMD_TYPE_OFFS)
+#define NFC_CB0_CMD_TYPE_NAKED_ADDR	(0x7 << NFC_CB0_CMD_TYPE_OFFS)
+#define NFC_CB0_CSEL_MASK		(0x1 << 24)
+#define NFC_CB0_AUTO_RS_MASK		(0x1 << 25)
+#define NFC_CB0_ST_ROW_EN_MASK		(0x1 << 26)
+#define NFC_CB0_RDY_BYP_MASK		(0x1 << 27)
+#define NFC_CB0_LEN_OVRD_MASK		(0x1 << 28)
+#define NFC_CB0_CMD_XTYPE_OFFS		29
+#define NFC_CB0_CMD_XTYPE_MASK		(0x7 << NFC_CB0_CMD_XTYPE_OFFS)
+#define NFC_CB0_CMD_XTYPE_MONOLITHIC	(0x0 << NFC_CB0_CMD_XTYPE_OFFS)
+#define NFC_CB0_CMD_XTYPE_LAST_NAKED	(0x1 << NFC_CB0_CMD_XTYPE_OFFS)
+#define NFC_CB0_CMD_XTYPE_MULTIPLE	(0x4 << NFC_CB0_CMD_XTYPE_OFFS)
+#define NFC_CB0_CMD_XTYPE_NAKED		(0x5 << NFC_CB0_CMD_XTYPE_OFFS)
+#define NFC_CB0_CMD_XTYPE_DISPATCH	(0x6 << NFC_CB0_CMD_XTYPE_OFFS)
+
+/* NAND Controller Command Buffer 1 */
+#define NFC_COMMAND_BUFF_1_REG		(MV_NFC_REGS_BASE + 0x4C)
+#define NFC_CB1_ADDR1_OFFS		0
+#define NFC_CB1_ADDR1_MASK		(0xFF << NFC_CB1_ADDR1_OFFS)
+#define NFC_CB1_ADDR2_OFFS		8
+#define NFC_CB1_ADDR2_MASK		(0xFF << NFC_CB1_ADDR2_OFFS)
+#define NFC_CB1_ADDR3_OFFS		16
+#define NFC_CB1_ADDR3_MASK		(0xFF << NFC_CB1_ADDR3_OFFS)
+#define NFC_CB1_ADDR4_OFFS		24
+#define NFC_CB1_ADDR4_MASK		(0xFF << NFC_CB1_ADDR4_OFFS)
+
+/* NAND Controller Command Buffer 2 */
+#define NFC_COMMAND_BUFF_2_REG		(MV_NFC_REGS_BASE + 0x50)
+#define NFC_CB2_ADDR5_OFFS		0
+#define NFC_CB2_ADDR5_MASK		(0xFF << NFC_CB2_ADDR5_OFFS)
+#define NFC_CB2_CS_2_3_SELECT_MASK	(0x80 << NFC_CB2_ADDR5_OFFS)
+#define NFC_CB2_PAGE_CNT_OFFS		8
+#define NFC_CB2_PAGE_CNT_MASK		(0xFF << NFC_CB2_PAGE_CNT_OFFS)
+#define NFC_CB2_ST_CMD_OFFS		16
+#define NFC_CB2_ST_CMD_MASK		(0xFF << NFC_CB2_ST_CMD_OFFS)
+#define NFC_CB2_ST_MASK_OFFS		24
+#define NFC_CB2_ST_MASK_MASK		(0xFF << NFC_CB2_ST_MASK_OFFS)
+
+/* NAND Controller Command Buffer 3 */
+#define NFC_COMMAND_BUFF_3_REG		(MV_NFC_REGS_BASE + 0x54)
+#define NFC_CB3_NDLENCNT_OFFS		0
+#define NFC_CB3_NDLENCNT_MASK		(0xFFFF << NFC_CB3_NDLENCNT_OFFS)
+#define NFC_CB3_ADDR6_OFFS		16
+#define NFC_CB3_ADDR6_MASK		(0xFF << NFC_CB3_ADDR6_OFFS)
+#define NFC_CB3_ADDR7_OFFS		24
+#define NFC_CB3_ADDR7_MASK		(0xFF << NFC_CB3_ADDR7_OFFS)
+
+/* NAND Arbitration Control */
+#define NFC_ARB_CONTROL_REG		(MV_NFC_REGS_BASE + 0x5C)
+#define NFC_ARB_CNT_OFFS		0
+#define NFC_ARB_CNT_MASK		(0xFFFF << NFC_ARB_CNT_OFFS)
+
+/* NAND Partition Table for Chip Select */
+#define NFC_PART_TBL_4CS_REG(x)		(MV_NFC_REGS_BASE + (x * 0x4))
+#define NFC_PT4CS_BLOCKADD_OFFS		0
+#define NFC_PT4CS_BLOCKADD_MASK		(0xFFFFFF << NFC_PT4CS_BLOCKADD_OFFS)
+#define NFC_PT4CS_TRUSTED_MASK		(0x1 << 29)
+#define NFC_PT4CS_LOCK_MASK		(0x1 << 30)
+#define NFC_PT4CS_VALID_MASK		(0x1 << 31)
+
+/* NAND XBAR2AXI Bridge Configuration Register */
+#define NFC_XBAR2AXI_BRDG_CFG_REG	(MV_NFC_REGS_BASE + 0x1022C)
+#define NFC_XBC_CS_EXPAND_EN_MASK	(0x1 << 2)
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* __INCMVNFCREGSH */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ac97/mvAc97Regs.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ac97/mvAc97Regs.h
@@ -0,0 +1,142 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+#ifndef __INCMVAc97RegsH
+#define __INCMVAc97RegsH
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "mvSysAc97Config.h"
+
+#define MV_AC97_PCM_OUT_CTRL_REG		(MV_AC97_REGS_BASE + 0x0000)
+#define MV_AC97_PCM_IN_CTRL_REG			(MV_AC97_REGS_BASE + 0x0004)
+#define MV_AC97_MIC_IN_CTRL_REG			(MV_AC97_REGS_BASE + 0x0008)
+#define MV_AC97_GLOBAL_CTRL_REG			(MV_AC97_REGS_BASE + 0x000C)
+#define MV_AC97_PCM_OUT_STATUS_REG		(MV_AC97_REGS_BASE + 0x0010)
+#define MV_AC97_PCM_IN_STATUS_REG		(MV_AC97_REGS_BASE + 0x0014)
+#define MV_AC97_MIC_IN_STATUS_REG		(MV_AC97_REGS_BASE + 0x0018)
+#define MV_AC97_GLOBAL_STATUS_REG		(MV_AC97_REGS_BASE + 0x001C)
+#define MV_AC97_CODEC_ACCESS_REG		(MV_AC97_REGS_BASE + 0x0020)
+#define MV_AC97_PCM_SURR_OUT_CTRL_REG		(MV_AC97_REGS_BASE + 0x0024)
+#define MV_AC97_PCM_SURR_OUT_STATUS_REG		(MV_AC97_REGS_BASE + 0x0028)
+#define MV_AC97_PCM_SURR_DATA_REG		(MV_AC97_REGS_BASE + 0x002C)
+#define MV_AC97_PCM_CNTR_LFE_CTRL_REG		(MV_AC97_REGS_BASE + 0x0030)
+#define MV_AC97_PCM_CNTR_LFE_STATUS_REG		(MV_AC97_REGS_BASE + 0x0034)
+#define MV_AC97_PCM_CNTR_LFE_DATA_REG		(MV_AC97_REGS_BASE + 0x0038)
+#define MV_AC97_PCM_DATA_REG			(MV_AC97_REGS_BASE + 0x0040)
+#define MV_AC97_MIC_IN_DATA_REG			(MV_AC97_REGS_BASE + 0x0060)
+#define MV_AC97_MODEM_OUT_CTRL_REG		(MV_AC97_REGS_BASE + 0x0100)
+#define MV_AC97_MODEM_IN_CTRL_REG		(MV_AC97_REGS_BASE + 0x0108)
+#define MV_AC97_MODEM_OUT_STATUS_REG		(MV_AC97_REGS_BASE + 0x0110)
+#define MV_AC97_MODEM_IN_STATUS_REG		(MV_AC97_REGS_BASE + 0x0118)
+#define MV_AC97_MODEM_DATA_REG			(MV_AC97_REGS_BASE + 0x0140)
+
+#define MV_AC97_PRI_AUDIO_CODEC_REG		(MV_AC97_REGS_BASE + 0x0200)
+#define MV_AC97_SEC01_AUDIO_CODEC_REG		(MV_AC97_REGS_BASE + 0x0300)
+#define MV_AC97_SEC10_AUDIO_CODEC_REG		(MV_AC97_REGS_BASE + 0x0800)
+#define MV_AC97_SEC11_AUDIO_CODEC_REG		(MV_AC97_REGS_BASE + 0x0900)
+#define MV_AC97_PRI_MODEM_CODEC_REG		(MV_AC97_REGS_BASE + 0x0400)
+#define MV_AC97_SEC01_MODEM_CODEC_REG		(MV_AC97_REGS_BASE + 0x0500)
+#define MV_AC97_SEC10_MODEM_CODEC_REG		(MV_AC97_REGS_BASE + 0x0600)
+#define MV_AC97_SEC11_MODEM_CODEC_REG		(MV_AC97_REGS_BASE + 0x0700)
+
+
+/* Fifo interrupt bits.			*/
+#define AC97_FIFO_SERV_REQ_INT_OFFS	1
+#define AC97_FIFO_SERV_REQ_INT_MASK	(1 << AC97_FIFO_SERV_REQ_INT_OFFS)
+#define AC97_FIFO_ERR_INT_OFFS		3
+#define AC97_FIFO_ERR_INT_MASK		(1 << AC97_FIFO_ERR_INT_OFFS)
+
+/* Global Status register bits.		*/
+#define AC97_GLB_PCODEC_READY_OFFS	8
+#define AC97_GLB_PCODEC_READY_MASK	(1 << AC97_GLB_PCODEC_READY_OFFS)
+#define AC97_GLB_SCODEC_READY_OFFS	9
+#define AC97_GLB_SCODEC_READY_MASK	(1 << AC97_GLB_SCODEC_READY_OFFS)
+#define AC97_GLB_STATUS_DONE_OFFS	18
+#define AC97_GLB_STATUS_DONE_MASK	(1 << AC97_GLB_STATUS_DONE_OFFS)
+#define AC97_GLB_CMND_DONE_OFFS		19
+#define AC97_GLB_CMND_DONE_MASK		(1 << AC97_GLB_CMND_DONE_OFFS)
+
+/* Global control register bits.	*/
+#define AC97_GLB_CTRL_COLD_RESET_OFFS	1
+#define AC97_GLB_CTRL_COLD_RESET_MASK	(1 << AC97_GLB_CTRL_COLD_RESET_OFFS)
+#define AC97_GLB_CTRL_WARM_RESET_OFFS	2
+#define AC97_GLB_CTRL_WARM_RESET_MASK	(1 << AC97_GLB_CTRL_WARM_RESET_OFFS)
+#define AC97_GLB_CTRL_DMA_EN_OFFS	24
+#define AC97_GLB_CTRL_DMA_EN_MASK	(1 << AC97_GLB_CTRL_DMA_EN_OFFS)
+#define AC97_GLB_CTRL_INT_CLK_EN_OFFS	31
+#define AC97_GLB_CTRL_INT_CLK_EN_MASK	(1 << AC97_GLB_CTRL_INT_CLK_EN_OFFS)
+
+/* AC97 Codec related registers.	*/
+#define AC97_CODEC_GPIO_STATUS_REG	0x54
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* __INCMVAc97RegsH */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ac97/mvAc97.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ac97/mvAc97.c
@@ -0,0 +1,844 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvSysAc97Config.h"
+#include "mvAc97Regs.h"
+#include "mvAc97.h"
+
+#define AC97_READ_WRITE_MAX_RETRY	100
+
+/*******************************************************************************
+* mvAc97Init 
+*
+* DESCRIPTION:
+*       Initialize the AC'97 unit, and bring the AC'97 unit out of reset.
+*
+* INPUT:
+*       pdmaModeEn - Enable / Disable PDMA mode.
+*		     MV_TRUE: Set to PDMA mode.
+*		     MV_FALSE: Set to PIO mode.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_OK	- On successfull init,
+*	MV_FAIL	- If initialization fails.
+*******************************************************************************/
+MV_STATUS mvAc97Init(MV_BOOL pdmaModeEn)
+{
+
+	/* Enable DMA or PIO modes.		*/
+	if(pdmaModeEn == MV_TRUE)
+		MV_REG_BIT_RESET(MV_AC97_GLOBAL_CTRL_REG,AC97_GLB_CTRL_DMA_EN_MASK);
+	else
+		MV_REG_BIT_SET(MV_AC97_GLOBAL_CTRL_REG,AC97_GLB_CTRL_DMA_EN_MASK);
+
+
+	return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvAc97Reset 
+*
+* DESCRIPTION:
+*       Cold reset the AC'97 unit.
+*
+* INPUT:
+*	None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_OK	- On successfull init,
+*	MV_FAIL	- If initialization fails.
+*******************************************************************************/
+MV_STATUS mvAc97Reset(MV_VOID)
+{
+	//MV_U32 timeout = 1000;
+
+	/* Hold CLKBPB for 100us */
+	MV_REG_BIT_RESET(MV_AC97_GLOBAL_CTRL_REG,AC97_GLB_CTRL_COLD_RESET_MASK);
+        MV_REG_BIT_SET(MV_AC97_GLOBAL_CTRL_REG,AC97_GLB_CTRL_INT_CLK_EN_MASK);
+        mvOsUDelay(100);
+        MV_REG_BIT_RESET(MV_AC97_GLOBAL_CTRL_REG,AC97_GLB_CTRL_INT_CLK_EN_MASK);
+
+	MV_REG_BIT_SET(MV_AC97_GLOBAL_CTRL_REG,AC97_GLB_CTRL_COLD_RESET_MASK);
+
+#if 0 /* Not sure if this is needed.	*/
+
+	MV_REG_BIT_SET(MV_AC97_GLOBAL_CTRL_REG,
+		       AC97_GLB_CTRL_COLD_RESET_MASK | AC97_GLB_CTRL_WARM_RESET_MASK);
+
+	while(timeout > 0) {
+		val = MV_REG_READ(MV_AC97_GLOBAL_STATUS_REG);
+		if(val & (AC97_GLB_PCODEC_READY_MASK | AC97_GLB_SCODEC_READY_MASK))
+			break;
+		timeout--;
+		mvOsDelay(10);
+	}
+
+	if(timeout == 0)
+		return MV_TIMEOUT;
+
+#endif /* 0 */
+	return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvAc97FifoIntEnable
+*
+* DESCRIPTION:
+*       Enable / Disable the various Fifo status indication interrupts.
+*
+* INPUT:
+*       fifoType - the Fifo type to configure the interrupts for.
+*	intType	 - The interrupt type to enable / disable.
+*	enable	 - MV_TRUE to enable the interrupt indication, MV_FALSE to 
+*		   disable the interrupt indication.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_OK	- On successfull init.
+*	MV_BAD_PARAM - If interrupt type not supported for the given Fifo.
+*	MV_FAIL	- Otherwise.
+*******************************************************************************/
+MV_STATUS mvAc97FifoIntEnable(MV_AC97_FIFO_TYPE fifoType, MV_AC97_FIFO_INT_TYPE intType, 
+			      MV_BOOL enable)
+{
+	MV_U32	data;
+	MV_U32 	regAddr;
+	MV_U32 	mask;
+
+	switch (fifoType) {
+	case(AC97_PCM_OUT):
+		regAddr = MV_AC97_PCM_OUT_CTRL_REG;
+		break;
+	case(AC97_PCM_IN):
+		regAddr = MV_AC97_PCM_IN_CTRL_REG;
+		break;
+	case(AC97_MIC_IN):
+		regAddr = MV_AC97_MIC_IN_STATUS_REG;
+		break;
+	case(AC97_PCM_SURROUND_OUT):
+		regAddr = MV_AC97_PCM_SURR_OUT_CTRL_REG;
+		break;
+	case(AC97_PCM_CENTER_LFE_OUT):
+		regAddr = MV_AC97_PCM_CNTR_LFE_CTRL_REG;
+		break;
+	case(AC97_MODEM_OUT):
+		regAddr = MV_AC97_MODEM_OUT_CTRL_REG;
+		break;
+	case(AC97_MODEM_IN):
+		regAddr = MV_AC97_MODEM_IN_CTRL_REG;
+		break;
+	default:
+		return MV_ERROR;
+	}
+
+	data = MV_REG_READ(regAddr);
+
+	if(intType == AC97_FIFO_ERROR_INT)
+		mask = AC97_FIFO_ERR_INT_MASK;
+	else
+		mask = AC97_FIFO_SERV_REQ_INT_MASK;
+
+	if(enable == MV_TRUE)
+                data |= mask;	/* Set the interrupt bit.	*/
+	else
+		data &= ~mask; 	/* Clear the interrupt bit.	*/
+
+	MV_REG_WRITE(regAddr,data);
+
+	return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvAc97GlobalIntEnable
+*
+* DESCRIPTION:
+*       Enable / Disable the various global status indication interrupts.
+*
+* INPUT:
+*	intMask	 - A bitwise OR of the interrupts to be enabled / disabled.
+*	enable	 - MV_TRUE to enable the interrupt indication, MV_FALSE to 
+*		   disable the interrupt indication.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_OK	- On successfull init.
+*	MV_FAIL	- Otherwise.
+*******************************************************************************/
+MV_STATUS mvAc97GlobalIntEnable(MV_U32 intMask, MV_BOOL enable)
+{
+	MV_U32	data;
+
+	data = MV_REG_READ(MV_AC97_GLOBAL_CTRL_REG);
+
+	if(enable == MV_TRUE)
+		data |= intMask;	/* Set the interrupt bits.	*/
+	else
+		data &= ~intMask;	/* Clear the interrupt bits.	*/
+
+	MV_REG_WRITE(MV_AC97_GLOBAL_CTRL_REG,data);
+
+	return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvAc97FifoDataRead32
+*
+* DESCRIPTION:
+*       Read the given amount of 32-bit samples from one of the Rx FIFOs.
+*	This function is relevant only when the unit is configured in PIO mode.
+*	It's the user's responsibility to make sure that there are enough 
+*	samples in the Rx Fifo to be read before calling this function.
+*
+* INPUT:
+*	fifoType- The Fifo type to read from.
+*       data	- A buffer to fill the read data in.
+*	length	- Amount of 32-bit samples to read.
+*
+* OUTPUT:
+*       data	- The data read from the Fifo.
+*
+* RETURN:
+*       MV_OK	- On successfull init,
+*	MV_BAD_PARAM - Cannot perform a read operation from the given Fifo.
+*	MV_NOT_SUPPORTED - Requested access width not supported on the given Fifo.
+*	MV_FAIL	- If initialization fails.
+*******************************************************************************/
+static MV_STATUS mvAc97FifoDataRead32(MV_AC97_FIFO_TYPE fifoType, MV_U32 *data, MV_U16 length)
+{
+	MV_U32	regAddr;
+	MV_U32	i;
+
+	if((data == NULL) || (length == 0))
+	   return MV_BAD_PARAM;
+
+	switch (fifoType) {
+	case (AC97_PCM_IN):
+		regAddr = MV_AC97_PCM_DATA_REG;
+		break;
+	case (AC97_MODEM_OUT):
+	case (AC97_PCM_CENTER_LFE_OUT):
+	case (AC97_PCM_SURROUND_OUT):
+	case (AC97_PCM_OUT):
+		return MV_BAD_PARAM;
+	case (AC97_MIC_IN):
+	case (AC97_MODEM_IN):
+		return MV_NOT_SUPPORTED;
+	}
+
+	for(i = 0; i < length; i++) {
+		data[i] = MV_REG_READ(regAddr);
+	}
+	return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvAc97FifoDataWrite32
+*
+* DESCRIPTION:
+*       Write the given amount of 32-bit samples to one of the Tx FIFOs.
+*	This function is relevant only when the unit is configured in PIO mode.
+*	It's the user's responsibility to make sure that there are enough 
+*	place in the Tx fifo before calling this function.
+*
+* INPUT:
+*	fifoType- The Fifo type to write to.
+*       data	- A buffer holding the data to be written.
+*	length	- Amount of 32-bit samples to write.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_OK	- On successfull init,
+*	MV_BAD_PARAM - Cannot perform a write operation to the given Fifo.
+*	MV_NOT_SUPPORTED - Requested access width not supported on the given Fifo.
+*	MV_FAIL	- If initialization fails.
+*******************************************************************************/
+static MV_STATUS mvAc97FifoDataWrite32(MV_AC97_FIFO_TYPE fifoType, MV_U32 *data, MV_U16 length)
+{
+	MV_U32	regAddr;
+	MV_U32	i;
+
+	if((data == NULL) || (length == 0))
+	   return MV_BAD_PARAM;
+
+	switch (fifoType) {
+	case (AC97_PCM_OUT):
+		regAddr = MV_AC97_PCM_DATA_REG;
+		break;
+	case (AC97_PCM_CENTER_LFE_OUT):
+		regAddr = MV_AC97_PCM_CNTR_LFE_DATA_REG;
+		break;
+	case (AC97_PCM_SURROUND_OUT):
+		regAddr = MV_AC97_PCM_SURR_DATA_REG;
+		break;
+	case (AC97_PCM_IN):
+	case (AC97_MIC_IN):
+	case (AC97_MODEM_IN):
+		return MV_BAD_PARAM;
+	case (AC97_MODEM_OUT):
+		return MV_NOT_SUPPORTED;
+	default:
+		return MV_ERROR;
+	}
+
+	for(i = 0; i < length; i++) {
+		MV_REG_WRITE(regAddr,data[i]);
+	}
+	return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvAc97FifoDataRead16
+*
+* DESCRIPTION:
+*       Read the given amount of 16-bit samples from one of the Rx FIFOs.
+*	This function is relevant only when the unit is configured in PIO mode.
+*	It's the user's responsibility to make sure that there are enough 
+*	samples in the Rx Fifo to be read before calling this function.
+*
+* INPUT:
+*	fifoType- The Fifo type to read from.
+*       data	- A buffer to fill the read data in.
+*	length	- Amount of 16-bit samples to read.
+*
+* OUTPUT:
+*       data	- The data read from the Fifo.
+*
+* RETURN:
+*       MV_OK	- On successfull init,
+*	MV_BAD_PARAM - Cannot perform a read operation from the given Fifo.
+*	MV_NOT_SUPPORTED - Requested access width not supported on the given Fifo.
+*	MV_FAIL	- If initialization fails.
+*******************************************************************************/
+static MV_STATUS mvAc97FifoDataRead16(MV_AC97_FIFO_TYPE fifoType, MV_U16 *data, MV_U16 length)
+{
+	MV_U32	regAddr=0;
+	MV_U32	i;
+
+	if((data == NULL) || (length == 0))
+	   return MV_BAD_PARAM;
+
+	switch (fifoType) {
+	case (AC97_MIC_IN):
+		regAddr = MV_AC97_MIC_IN_DATA_REG;
+		break;
+	case (AC97_MODEM_IN):
+		regAddr = MV_AC97_MODEM_DATA_REG;
+		break;
+	case (AC97_MODEM_OUT):
+	case (AC97_PCM_CENTER_LFE_OUT):
+	case (AC97_PCM_SURROUND_OUT):
+	case (AC97_PCM_OUT):
+		return MV_BAD_PARAM;
+	case (AC97_PCM_IN):
+		return MV_NOT_SUPPORTED;
+	}
+
+	for(i = 0; i < length; i++) {
+		data[i] = (MV_U16)(MV_REG_READ(regAddr) & 0xFFFF);
+	}
+	return MV_OK;
+}
+
+
+
+/*******************************************************************************
+* mvAc97FifoDataWrite16
+*
+* DESCRIPTION:
+*       Write the given amount of 16-bit samples to one of the Tx FIFOs.
+*	This function is relevant only when the unit is configured in PIO mode.
+*	It's the user's responsibility to make sure that there are enough 
+*	place in the Tx fifo before calling this function.
+*
+* INPUT:
+*	fifoType- The Fifo type to write to.
+*       data	- A buffer holding the data to be written.
+*	length	- Amount of 16-bit samples to write.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_OK	- On successfull init,
+*	MV_BAD_PARAM - Cannot perform a write operation to the given Fifo.
+*	MV_NOT_SUPPORTED - Requested access width not supported on the given Fifo.
+*	MV_FAIL	- If initialization fails.
+*******************************************************************************/
+static MV_STATUS mvAc97FifoDataWrite16(MV_AC97_FIFO_TYPE fifoType, MV_U16 *data, MV_U16 length)
+{
+	MV_U32	regAddr;
+	MV_U32	regData;
+	MV_U32	i;
+
+	if((data == NULL) || (length == 0))
+	   return MV_BAD_PARAM;
+
+	switch (fifoType) {
+	case (AC97_MODEM_OUT):
+		regAddr = MV_AC97_MODEM_DATA_REG;
+		break;
+	case (AC97_PCM_IN):
+	case (AC97_MIC_IN):
+	case (AC97_MODEM_IN):
+		return MV_BAD_PARAM;
+	case (AC97_PCM_OUT):
+	case (AC97_PCM_CENTER_LFE_OUT):
+	case (AC97_PCM_SURROUND_OUT):
+		return MV_NOT_SUPPORTED;
+	}
+
+	for(i = 0; i < length; i++) {
+		regData = (MV_U32)data[i];
+		MV_REG_WRITE(regAddr,regData);
+	}
+	return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvAc97FifoDataRead
+*
+* DESCRIPTION:
+*       Read the given amount of 32-bit / 16-bit samples from one of the Rx FIFOs.
+*	This function is relevant only when the unit is configured in PIO mode.
+*	The sample sizes of the read data depends on the Fifo to read from.
+*	It's the user's responsibility to make sure that there are enough 
+*	samples in the Rx Fifo to be read before calling this function.
+*	If reading from a 32-bit fifo, it's required that the data pointer 
+*	is aligned to 32-bit.
+*	If reading from a 16-bit fifo, it's required that the data pointer is
+*	aligned to 16-bit.
+*
+* INPUT:
+*	fifoType- The Fifo type to read from.
+*       data	- A buffer to fill the read data in.
+*	length	- Number of samples to read.
+*
+* OUTPUT:
+*       data	- The data read from the Fifo.
+*
+* RETURN:
+*       MV_OK	- Success,
+*	MV_BAD_PARAM - Cannot perform a read operation from the given Fifo.
+*	MV_BAD_PTR - If data has an incorrect alignment.
+*	MV_FAIL	- Otherwise.
+*******************************************************************************/
+MV_STATUS mvAc97FifoDataRead(MV_AC97_FIFO_TYPE fifoType, MV_VOID *data,
+			     MV_U16 length)
+{
+	MV_STATUS status = MV_OK;
+
+	if((data == NULL) || (length == 0))
+	   return MV_BAD_PARAM;
+
+	switch (fifoType) {
+	case (AC97_PCM_IN):
+		if(((MV_U32)data) & 0x3)
+			status = MV_BAD_PTR;
+		else
+			status = mvAc97FifoDataRead32(fifoType,data,length);
+		break;
+	case (AC97_MIC_IN):
+	case (AC97_MODEM_IN):
+		if(((MV_U32)data) & 0x1)
+			status = MV_BAD_PTR;
+		else
+			status = mvAc97FifoDataRead16(fifoType,data,length);
+		break;
+	case (AC97_PCM_CENTER_LFE_OUT):
+	case (AC97_PCM_SURROUND_OUT):
+	case (AC97_PCM_OUT):
+	case (AC97_MODEM_OUT):
+		status = MV_BAD_PARAM;
+		break;
+	}
+
+	return status;
+}
+
+
+/*******************************************************************************
+* mvAc97FifoDataWrite
+*
+* DESCRIPTION:
+*       Write the given amount of 32-bit / 16-bit samples to one of the Tx FIFOs.
+*	This function is relevant only when the unit is configured in PIO mode.
+*	The sample sizes of the written data depends on the Fifo to write to.
+*	It's the user's responsibility to make sure that there are enough 
+*	place in the Tx fifo before calling this function.
+*	If writing to a 32-bit fifo, it's required that the data pointer 
+*	is aligned to 32-bit.
+*	If writing to a 16-bit fifo, it's required that the data pointer is
+*	aligned to 16-bit.
+*
+* INPUT:
+*	fifoType- The Fifo type to write to.
+*       data	- A buffer to write the data from.
+*	length	- Number of samples to write.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_OK	- Success,
+*	MV_BAD_PARAM - Cannot perform a write operation to the given Fifo.
+*	MV_BAD_PTR - If data has an incorrect alignment.
+*	MV_FAIL	- Otherwise.
+*******************************************************************************/
+MV_STATUS mvAc97FifoDataWrite(MV_AC97_FIFO_TYPE fifoType, MV_VOID *data,
+			      MV_U16 length)
+{
+	MV_STATUS status = MV_OK;
+
+	if((data == NULL) || (length == 0))
+	   return MV_BAD_PARAM;
+
+	switch (fifoType) {
+	case (AC97_PCM_CENTER_LFE_OUT):
+	case (AC97_PCM_SURROUND_OUT):
+	case (AC97_PCM_OUT):
+		if(((MV_U32)data) & 0x3)
+			status = MV_BAD_PTR;
+		else
+			status = mvAc97FifoDataWrite32(fifoType,data,length);
+		break;
+	case (AC97_MODEM_OUT):
+		if(((MV_U32)data) & 0x1)
+			status = MV_BAD_PTR;
+		else
+			status = mvAc97FifoDataWrite16(fifoType,data,length);
+		break;
+	case (AC97_PCM_IN):
+	case (AC97_MIC_IN):
+	case (AC97_MODEM_IN):
+		status = MV_BAD_PARAM;
+		break;
+	}
+
+	return status;
+}
+
+
+/*******************************************************************************
+* mvAc97PdmaFifoAccessRegAddr 
+*
+* DESCRIPTION:
+*       Return the register address to be used by the PDMA for reading / writing 
+*	data to the given Fifo.
+*
+* INPUT:
+*       fifoType - The Fifo for which the PDMA access address should be returned.
+*
+* OUTPUT:
+*       addr - The address of the Fifo access register. This address is the
+*	       Virtual address of the register.
+*
+* RETURN:
+*       MV_OK	- On successfull init,
+*	MV_FAIL	- Otherwise.
+*******************************************************************************/
+MV_STATUS mvAc97PdmaFifoAccessRegAddr(MV_AC97_FIFO_TYPE fifoType, MV_U32 *addr)
+{
+	MV_U32	regAddr;
+
+	if(addr == NULL)
+		return MV_BAD_PARAM;
+
+	switch (fifoType) {
+	case (AC97_PCM_IN):
+	case (AC97_PCM_OUT):
+		regAddr = MV_AC97_PCM_DATA_REG;
+		break;
+	case (AC97_MIC_IN):
+		regAddr = MV_AC97_MIC_IN_DATA_REG;
+		break;
+	case (AC97_PCM_SURROUND_OUT):
+		regAddr = MV_AC97_PCM_SURR_DATA_REG;
+		break;
+	case (AC97_PCM_CENTER_LFE_OUT):
+		regAddr = MV_AC97_PCM_CNTR_LFE_DATA_REG;
+		break;
+	case (AC97_MODEM_OUT):
+	case (AC97_MODEM_IN):
+		regAddr = MV_AC97_MODEM_DATA_REG;
+		break;
+	default:
+		return MV_ERROR;
+	}
+
+	*addr = regAddr;
+
+	return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvAc97CodecAccessRegGet 
+*
+* DESCRIPTION:
+*       A helper function to calculate the address of the codec accress register.
+*
+* INPUT:
+*       codecId - The Codec ID to read / write the register for.
+*	regAddr	- The Codec register address to read.
+*
+* OUTPUT:
+*       accReg	- The calculated access register.
+*
+* RETURN:
+*	None.
+*******************************************************************************/
+static void mvAc97CodecAccessRegGet(MV_AC97_CODEC_ID codecId, MV_U32 regAddr,
+				    MV_U32 *accReg)
+{
+	MV_U32 temp;
+
+	if(regAddr != AC97_CODEC_GPIO_STATUS_REG) {
+		switch (codecId) {
+		case (AC97_PRIMARY_CODEC):
+			temp = MV_AC97_PRI_AUDIO_CODEC_REG;
+			break;
+		case (AC97_SECONDARY_CODEC_01):
+			temp = MV_AC97_SEC01_AUDIO_CODEC_REG;
+			break;
+		case (AC97_SECONDARY_CODEC_10):
+			temp = MV_AC97_SEC10_AUDIO_CODEC_REG;
+			break;
+		case (AC97_SECONDARY_CODEC_11):
+			temp = MV_AC97_SEC11_AUDIO_CODEC_REG;
+			break;
+		default:
+			return;
+		}
+	} else {
+		switch (codecId) {
+		case (AC97_PRIMARY_CODEC):
+			temp = MV_AC97_PRI_MODEM_CODEC_REG;
+			break;
+		case (AC97_SECONDARY_CODEC_01):
+			temp = MV_AC97_SEC01_MODEM_CODEC_REG;
+			break;
+		case (AC97_SECONDARY_CODEC_10):
+			temp = MV_AC97_SEC10_MODEM_CODEC_REG;
+			break;
+		case (AC97_SECONDARY_CODEC_11):
+			temp = MV_AC97_SEC11_MODEM_CODEC_REG;
+			break;
+		default:
+			return;
+		}
+	}
+
+	*accReg = temp + (regAddr << 1);
+	return;
+}
+
+/*******************************************************************************
+* mvAc97CodecRegRead 
+*
+* DESCRIPTION:
+*       Read an attached AC'97 codec register.
+*
+* INPUT:
+*       codecId - The Codec ID to read the register for.
+*	regAddr	- The Codec register address to read.
+*
+* OUTPUT:
+*       data	- The Codec register value as returned by the Codec.
+*
+* RETURN:
+*       MV_OK	- On successfull init,
+*	MV_TIMEOUT - On read timeout.
+*	MV_FAIL	- Otherwise.
+*******************************************************************************/
+MV_STATUS mvAc97CodecRegRead(MV_AC97_CODEC_ID codecId, MV_U16 regAddr,MV_U16 *data)
+{
+        MV_U32 	val;
+	MV_U32	status = MV_OK;
+	MV_U32 	accAddr;
+	MV_U32	retries = AC97_READ_WRITE_MAX_RETRY;
+
+	if(data == NULL)
+		return MV_BAD_PARAM;
+
+	/* Get the access register.			*/
+	mvAc97CodecAccessRegGet(codecId,regAddr,&accAddr);
+
+	if(regAddr == AC97_CODEC_GPIO_STATUS_REG) {
+		/* Read from the AC'97 controller cache.*/
+		goto done;
+	}
+
+	/* Clear the command / status done bits.	*/
+	MV_REG_BIT_SET(MV_AC97_GLOBAL_STATUS_REG,
+		       (AC97_GLB_STATUS_DONE_MASK | AC97_GLB_CMND_DONE_MASK));
+
+	/* Issue a dummy read.		*/
+	val = MV_REG_READ(accAddr);
+
+	/* Wait till the status done bit is valid.	*/
+	while(retries > 0)
+	{
+		retries--;
+		val = MV_REG_READ(MV_AC97_GLOBAL_STATUS_REG);
+		if(val & AC97_GLB_STATUS_DONE_MASK)
+			break;
+	}
+
+	/* Check for a timeout.		*/
+	if(retries == 0)
+	{
+		status = MV_TIMEOUT;
+		goto done;
+	}
+
+	/* Clear the command / status done bits.	*/
+	MV_REG_BIT_SET(MV_AC97_GLOBAL_STATUS_REG,
+		       (AC97_GLB_STATUS_DONE_MASK | AC97_GLB_CMND_DONE_MASK));
+
+done:
+	if(status == MV_OK)
+	{
+		/* Now read the "real" data.	*/	
+		val = MV_REG_READ(accAddr);
+		*data = (MV_U16)(val & 0xFFFF);
+	}
+	return status;
+}
+
+
+/*******************************************************************************
+* mvAc97CodecRegWrite
+*
+* DESCRIPTION:
+*       Write to an attached AC'97 codec register.
+*
+* INPUT:
+*       codecId - The Codec ID to write the register for.
+*	regAddr	- The Codec register address to write to.
+*	data	- Data to be written.
+*
+* OUTPUT:
+*	None.
+*
+* RETURN:
+*       MV_OK	- On successfull init,
+*	MV_FAIL	- Otherwise.
+*******************************************************************************/
+MV_STATUS mvAc97CodecRegWrite(MV_AC97_CODEC_ID codecId, MV_U16 regAddr,MV_U16 data)
+{
+	MV_U32 	val;
+	MV_U32	status = MV_OK;
+	MV_U32 	accAddr;
+	MV_U32	retries = AC97_READ_WRITE_MAX_RETRY;
+
+	/* Get the access register.			*/
+	mvAc97CodecAccessRegGet(codecId,regAddr,&accAddr);
+
+	/* Clear the command / status done bits.	*/
+	MV_REG_BIT_SET(MV_AC97_GLOBAL_STATUS_REG,
+		       (AC97_GLB_STATUS_DONE_MASK | AC97_GLB_CMND_DONE_MASK));
+
+	/* Issue the write operation.			*/
+	val = (MV_U32)data;
+	MV_REG_WRITE(accAddr,val);
+
+	/* Wait till the status done bit is valid.	*/
+	while(retries > 0)
+	{
+		retries--;
+		val = MV_REG_READ(MV_AC97_GLOBAL_STATUS_REG);
+		if(val & AC97_GLB_CMND_DONE_MASK)
+			break;
+	}
+
+	/* Check for a timeout.				*/
+	if(retries == 0)
+		status = MV_TIMEOUT;
+
+	return status;
+}
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ac97/mvCompVer.txt
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ac97/mvCompVer.txt
@@ -0,0 +1,4 @@
+Global HAL Version: DOVE_HAL_3_1_2
+Unit HAL Version: 1.0.2
+Description: This component includes an implementation of the unit HAL drivers
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ac97/mvAc97.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/ac97/mvAc97.h
@@ -0,0 +1,337 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+#ifndef __INCMVAc97H
+#define __INCMVAc97H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvSysAc97Config.h"
+/********************************/
+/* Enums and structures 	*/
+/********************************/
+
+typedef enum {
+	AC97_PCM_OUT,
+	AC97_PCM_IN,
+	AC97_MIC_IN,
+	AC97_PCM_SURROUND_OUT,
+	AC97_PCM_CENTER_LFE_OUT,
+	AC97_MODEM_OUT,
+	AC97_MODEM_IN
+}MV_AC97_FIFO_TYPE;
+
+
+typedef enum {
+	AC97_FIFO_ERROR_INT,
+	AC97_FIFO_SERVICE_REQ_INT
+}MV_AC97_FIFO_INT_TYPE;
+
+
+typedef enum {
+	AC97_PRIMARY_CODEC,
+	AC97_SECONDARY_CODEC_01,
+	AC97_SECONDARY_CODEC_10,
+	AC97_SECONDARY_CODEC_11
+}MV_AC97_CODEC_ID;
+
+
+/* AC'97 Global interrupt types.	*/
+#define AC97_GPIO_INT			0x1
+#define AC97_PRI_CODEC_RESUME_INT	0x10
+#define AC97_SEC01_CODEC_RESUME_INT	0x20
+#define AC97_SEC10_CODEC_RESUME_INT	0x40
+#define AC97_SEC11_CODEC_RESUME_INT	0x80
+#define AC97_PRI_CODEC_READY_INT	0x100
+#define AC97_SEC01_CODEC_READY_INT	0x200
+#define AC97_SEC10_CODEC_READY_INT	0x400
+#define AC97_SEC11_CODEC_READY_INT	0x800
+#define AC97_STATUS_DONE_INT		0x40000
+#define AC97_COMMAND_DONE_INT		0x80000
+
+
+/********************************/
+/* Functions API 		*/
+/********************************/
+
+/*******************************************************************************
+* mvAc97Init 
+*
+* DESCRIPTION:
+*       Initialize the AC'97 unit, and bring the AC'97 unit out of reset.
+*
+* INPUT:
+*       pdmaModeEn - Enable / Disable PDMA mode.
+*		     MV_TRUE: Set to PDMA mode.
+*		     MV_FALSE: Set to PIO mode.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_OK	- On successfull init,
+*	MV_FAIL	- If initialization fails.
+*******************************************************************************/
+MV_STATUS mvAc97Init(MV_BOOL pdmaModeEn);
+
+
+/*******************************************************************************
+* mvAc97Reset 
+*
+* DESCRIPTION:
+*       Cold reset the AC'97 unit.
+*
+* INPUT:
+*	None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_OK	- On successfull init,
+*	MV_FAIL	- If initialization fails.
+*******************************************************************************/
+MV_STATUS mvAc97Reset(MV_VOID);
+
+
+/*******************************************************************************
+* mvAc97FifoIntEnable
+*
+* DESCRIPTION:
+*       Enable / Disable the various Fifo status indication interrupts.
+*
+* INPUT:
+*       fifoType - the Fifo type to configure the interrupts for.
+*	intType	 - The interrupt type to enable / disable.
+*	enable	 - MV_TRUE to enable the interrupt indication, MV_FALSE to 
+*		   disable the interrupt indication.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_OK	- On successfull init.
+*	MV_BAD_PARAM - If interrupt type not supported for the given Fifo.
+*	MV_FAIL	- Otherwise.
+*******************************************************************************/
+MV_STATUS mvAc97FifoIntEnable(MV_AC97_FIFO_TYPE fifoType, MV_AC97_FIFO_INT_TYPE intType, 
+			      MV_BOOL enable);
+
+
+/*******************************************************************************
+* mvAc97GlobalIntEnable
+*
+* DESCRIPTION:
+*       Enable / Disable the various global status indication interrupts.
+*
+* INPUT:
+*	intMask	 - A bitwise OR of the interrupts to be enabled / disabled.
+*	enable	 - MV_TRUE to enable the interrupt indication, MV_FALSE to 
+*		   disable the interrupt indication.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_OK	- On successfull init.
+*	MV_FAIL	- Otherwise.
+*******************************************************************************/
+MV_STATUS mvAc97GlobalIntEnable(MV_U32 intMask, MV_BOOL enable);
+
+
+/*******************************************************************************
+* mvAc97FifoDataRead
+*
+* DESCRIPTION:
+*       Read the given amount of 32-bit / 16-bit samples from one of the Rx FIFOs.
+*	This function is relevant only when the unit is configured in PIO mode.
+*	The sample sizes of the read data depends on the Fifo to read from.
+*	It's the user's responsibility to make sure that there are enough 
+*	samples in the Rx Fifo to be read before calling this function.
+*	If reading from a 32-bit fifo, it's required that the data pointer 
+*	is aligned to 32-bit.
+*	If reading from a 16-bit fifo, it's required that the data pointer is
+*	aligned to 16-bit.
+*
+* INPUT:
+*	fifoType- The Fifo type to read from.
+*       data	- A buffer to fill the read data in.
+*	length	- Number of samples to read.
+*
+* OUTPUT:
+*       data	- The data read from the Fifo.
+*
+* RETURN:
+*       MV_OK	- Success,
+*	MV_BAD_PARAM - Cannot perform a read operation from the given Fifo.
+*	MV_BAD_PTR - If data has an incorrect alignment.
+*	MV_FAIL	- Otherwise.
+*******************************************************************************/
+MV_STATUS mvAc97FifoDataRead(MV_AC97_FIFO_TYPE fifoType, MV_VOID *data,
+			     MV_U16 length);
+
+
+/*******************************************************************************
+* mvAc97FifoDataWrite
+*
+* DESCRIPTION:
+*       Write the given amount of 32-bit / 16-bit samples to one of the Tx FIFOs.
+*	This function is relevant only when the unit is configured in PIO mode.
+*	The sample sizes of the written data depends on the Fifo to write to.
+*	It's the user's responsibility to make sure that there are enough 
+*	place in the Tx fifo before calling this function.
+*	If writing to a 32-bit fifo, it's required that the data pointer 
+*	is aligned to 32-bit.
+*	If writing to a 16-bit fifo, it's required that the data pointer is
+*	aligned to 16-bit.
+*
+* INPUT:
+*	fifoType- The Fifo type to write to.
+*       data	- A buffer to write the data from.
+*	length	- Number of samples to write.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_OK	- Success,
+*	MV_BAD_PARAM - Cannot perform a write operation to the given Fifo.
+*	MV_BAD_PTR - If data has an incorrect alignment.
+*	MV_FAIL	- Otherwise.
+*******************************************************************************/
+MV_STATUS mvAc97FifoDataWrite(MV_AC97_FIFO_TYPE fifoType, MV_VOID *data,
+			      MV_U16 length);
+
+
+/*******************************************************************************
+* mvAc97PdmaFifoAccessRegAddr 
+*
+* DESCRIPTION:
+*       Return the register address to be used by the PDMA for reading / writing 
+*	data to the given Fifo.
+*
+* INPUT:
+*       fifoType - The Fifo for which the PDMA access address should be returned.
+*
+* OUTPUT:
+*       addr - The address of the Fifo access register. This address is the
+*	       Virtual address of the register.
+*
+* RETURN:
+*       MV_OK	- On successfull init,
+*	MV_FAIL	- Otherwise.
+*******************************************************************************/
+MV_STATUS mvAc97PdmaFifoAccessRegAddr(MV_AC97_FIFO_TYPE fifoType, MV_U32 *addr);
+
+
+/*******************************************************************************
+* mvAc97CodecRegRead 
+*
+* DESCRIPTION:
+*       Read an attached AC'97 codec register.
+*
+* INPUT:
+*       codecId - The Codec ID to read the register for.
+*	regAddr	- The Codec register address to read.
+*
+* OUTPUT:
+*       data	- The Codec register value as returned by the Codec.
+*
+* RETURN:
+*       MV_OK	- On successfull init,
+*	MV_TIMEOUT - On read timeout.
+*	MV_FAIL	- Otherwise.
+*******************************************************************************/
+MV_STATUS mvAc97CodecRegRead(MV_AC97_CODEC_ID codecId, MV_U16 regAddr,MV_U16 *data);
+
+
+/*******************************************************************************
+* mvAc97CodecRegWrite
+*
+* DESCRIPTION:
+*       Write to an attached AC'97 codec register.
+*
+* INPUT:
+*       codecId - The Codec ID to write the register for.
+*	regAddr	- The Codec register address to write to.
+*	data	- Data to be written.
+*
+* OUTPUT:
+*	None.
+*
+* RETURN:
+*       MV_OK	- On successfull init,
+*	MV_FAIL	- Otherwise.
+*******************************************************************************/
+MV_STATUS mvAc97CodecRegWrite(MV_AC97_CODEC_ID codecId, MV_U16 regAddr,MV_U16 data);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* __INCMVAc97H */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/eth-phy/mvEthPhy.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/eth-phy/mvEthPhy.h
@@ -0,0 +1,109 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCETHPHYH
+#define __INCETHPHYH
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvSysEthPhyConfig.h"
+
+typedef struct {
+	MV_U32		phyAddr[MV_ETH_MAX_PORTS];
+	MV_BOOL		boardSpecInit;		/* Special board phy init */
+	MV_U32		specRegOff;		/* Board specific register offset,
+						   Valid if boardSpecInit == TRUE */
+	MV_U32		specData;		/* Board specific data to write,
+						   Valid if boardSpecInit == TRUE */
+}MV_ETHPHY_HAL_DATA;
+
+MV_STATUS 	mvEthPhyHalInit(MV_ETHPHY_HAL_DATA *halData);
+MV_STATUS	mvEthPhyRegRead(MV_U32 phyAddr, MV_U32 regOffs, MV_U16 *data);
+MV_STATUS 	mvEthPhyRegWrite(MV_U32 phyAddr, MV_U32 regOffs, MV_U16 data);
+MV_STATUS 	mvEthPhyReset(MV_U32 phyAddr, int timeout);
+MV_STATUS 	mvEthPhyRestartAN(MV_U32 phyAddr, int timeout);
+MV_STATUS 	mvEthPhyDisableAN(MV_U32 phyAddr, int speed, int duplex);
+MV_STATUS   	mvEthPhyLoopback(MV_U32 phyAddr, MV_BOOL isEnable);
+MV_BOOL     	mvEthPhyCheckLink( MV_U32 phyAddr );
+MV_STATUS	mvEthPhyPrintStatus( MV_U32 phyAddr );
+
+MV_VOID		mvEthE1111PhyBasicInit(MV_U32 ethPortNum);
+MV_VOID		mvEthE1112PhyBasicInit(MV_U32 ethPortNum);
+MV_VOID		mvEthE1112PhyPowerDown(MV_U32 ethPortNum);
+MV_VOID		mvEthE1112PhyPowerUp(MV_U32 ethPortNum);
+MV_VOID		mvEthE1116PhyPower(MV_U32 ethPortNum, MV_BOOL enable);
+MV_VOID		mvEthE1116PhyBasicInit(MV_U32 ethPortNum);
+MV_VOID		mvEthE1011PhyBasicInit(MV_U32 ethPortNum);
+MV_VOID 	mvEthSgmiiToCopperPhyBasicInit(MV_U32 ethPortNum);
+MV_VOID		mvEth1145PhyBasicInit(MV_U32 ethPortNum);
+MV_VOID		mvEth1121PhyBasicInit(MV_U32 ethPortNum);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* #ifndef __INCETHPHYH */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/eth-phy/mvEthPhyRegs.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/eth-phy/mvEthPhyRegs.h
@@ -0,0 +1,178 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCethphyregsh
+#define __INCethphyregsh
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "mvSysEthConfig.h"
+
+/* defines */
+#define ETH_PHY_TIMEOUT		    10000
+
+#define ETH_PHY_ADDRESS_REG(port)	(MV_ETH_REGS_BASE(port) + 0x000)
+
+/* registers offsetes defines */
+#ifdef MV_88W8660
+#define ETH_PHY_SMI_REG			(MV_ETH_REGS_BASE(0) + 0x6010)
+#else
+#define ETH_PHY_SMI_REG			(MV_ETH_REGS_BASE(0) + 0x004)
+#endif
+
+/* SMI register fields (ETH_PHY_SMI_REG) */
+
+#define ETH_PHY_SMI_DATA_OFFS	        0 /* Data */
+#define ETH_PHY_SMI_DATA_MASK	        (0xffff << ETH_PHY_SMI_DATA_OFFS)
+
+#define ETH_PHY_SMI_DEV_ADDR_OFFS	    16 /* PHY device address */
+#define ETH_PHY_SMI_DEV_ADDR_MASK       (0x1f << ETH_PHY_SMI_DEV_ADDR_OFFS)
+
+#define ETH_PHY_SMI_REG_ADDR_OFFS	    21 /* PHY device register address */
+#define ETH_PHY_SMI_REG_ADDR_MASK	    (0x1f << ETH_PHY_SMI_REG_ADDR_OFFS)	  
+
+#define ETH_PHY_SMI_OPCODE_OFFS	        26	/* Write/Read opcode */
+#define ETH_PHY_SMI_OPCODE_MASK	        (3 << ETH_PHY_SMI_OPCODE_OFFS)
+#define ETH_PHY_SMI_OPCODE_WRITE        (0 << ETH_PHY_SMI_OPCODE_OFFS)
+#define ETH_PHY_SMI_OPCODE_READ         (1 << ETH_PHY_SMI_OPCODE_OFFS)
+
+#define ETH_PHY_SMI_READ_VALID_BIT	    27	/* Read Valid  */
+#define ETH_PHY_SMI_READ_VALID_MASK	    (1 << ETH_PHY_SMI_READ_VALID_BIT)
+
+#define ETH_PHY_SMI_BUSY_BIT		    28  /* Busy */
+#define ETH_PHY_SMI_BUSY_MASK		    (1 << ETH_PHY_SMI_BUSY_BIT)  
+
+/* PHY registers and bits */
+#define ETH_PHY_CTRL_REG                0
+#define ETH_PHY_STATUS_REG              1
+#define ETH_PHY_AUTONEGO_AD_REG		    4
+#define ETH_PHY_1000BASE_T_CTRL_REG	    9
+#define ETH_PHY_SPEC_CTRL_REG           16
+#define ETH_PHY_SPEC_STATUS_REG         17
+
+/* ETH_PHY_CTRL_REG bits */
+#define ETH_PHY_CTRL_SPEED_MSB_BIT      6
+#define ETH_PHY_CTRL_SPEED_MSB_MASK     (1 << ETH_PHY_CTRL_SPEED_MSB_BIT)
+
+#define ETH_PHY_CTRL_COLISION_TEST_BIT  7
+#define ETH_PHY_CTRL_COLISION_TEST_MASK (1 << ETH_PHY_CTRL_COLISION_TEST_BIT)
+
+#define ETH_PHY_CTRL_DUPLEX_BIT         8
+#define ETH_PHY_CTRL_DUPLEX_MASK        (1 << ETH_PHY_CTRL_DUPLEX_BIT)
+
+#define ETH_PHY_CTRL_AN_RESTART_BIT     9
+#define ETH_PHY_CTRL_AN_RESTART_MASK    (1 << ETH_PHY_CTRL_AN_RESTART_BIT)
+
+#define ETH_PHY_CTRL_ISOLATE_BIT        10
+#define ETH_PHY_CTRL_ISOLATE_MASK       (1 << ETH_PHY_CTRL_ISOLATE_BIT)
+
+#define ETH_PHY_CTRL_POWER_DOWN_BIT     11
+#define ETH_PHY_CTRL_POWER_DOWN_MASK    (1 << ETH_PHY_CTRL_POWER_DOWN_BIT)
+
+#define ETH_PHY_CTRL_AN_ENABLE_BIT      12
+#define ETH_PHY_CTRL_AN_ENABLE_MASK     (1 << ETH_PHY_CTRL_AN_ENABLE_BIT)
+
+#define ETH_PHY_CTRL_SPEED_LSB_BIT	    13
+#define ETH_PHY_CTRL_SPEED_LSB_MASK	    (1 << ETH_PHY_CTRL_SPEED_LSB_BIT)
+
+#define ETH_PHY_CTRL_LOOPBACK_BIT	    14
+#define ETH_PHY_CTRL_LOOPBACK_MASK	    (1 << ETH_PHY_CTRL_LOOPBACK_BIT)
+
+#define ETH_PHY_CTRL_RESET_BIT          15
+#define ETH_PHY_CTRL_RESET_MASK         (1 << ETH_PHY_CTRL_RESET_BIT)
+
+/* ETH_PHY_STATUS_REG bits */
+#define ETH_PHY_STATUS_AN_DONE_BIT      5
+#define ETH_PHY_STATUS_AN_DONE_MASK     (1 << ETH_PHY_STATUS_AN_DONE_BIT)
+
+/* ETH_PHY_1000BASE_T_CTRL_REG bits */
+#define ETH_PHY_1000BASE_ADVERTISE_OFFSET	8
+#define ETH_PHY_1000BASE_ADVERTISE_MASK		(0x3 << ETH_PHY_1000BASE_ADVERTISE_OFFSET)
+
+/* ETH_PHY_SPEC_STATUS_REG bits */
+#define ETH_PHY_SPEC_STATUS_SPEED_OFFS		14
+#define ETH_PHY_SPEC_STATUS_SPEED_MASK		(0x3 << ETH_PHY_SPEC_STATUS_SPEED_OFFS)
+
+#define ETH_PHY_SPEC_STATUS_SPEED_10MBPS	(0x0 << ETH_PHY_SPEC_STATUS_SPEED_OFFS)
+#define ETH_PHY_SPEC_STATUS_SPEED_100MBPS	(0x1 << ETH_PHY_SPEC_STATUS_SPEED_OFFS)
+#define ETH_PHY_SPEC_STATUS_SPEED_1000MBPS	(0x2 << ETH_PHY_SPEC_STATUS_SPEED_OFFS)
+
+
+#define ETH_PHY_SPEC_STATUS_DUPLEX_BIT		13
+#define ETH_PHY_SPEC_STATUS_DUPLEX_MASK		(0x1 << ETH_PHY_SPEC_STATUS_DUPLEX_BIT)
+
+#define ETH_PHY_SPEC_STATUS_LINK_BIT		10
+#define ETH_PHY_SPEC_STATUS_LINK_MASK		(0x1 << ETH_PHY_SPEC_STATUS_LINK_BIT)
+
+/* ETH_PHY_SPEC_STATUS_REG bits */
+#define ETH_PHY_LED_ACT_LNK_DV              0x4109
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* __INCethphyregsh */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/eth-phy/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/eth-phy/Makefile
@@ -0,0 +1,4 @@
+include $(srctree)/$(subst ",,$(CONFIG_MV_HAL_RULES_PATH))
+# Objects list
+obj-$(CONFIG_MV_INCLUDE_GIG_ETH) += mvEthPhy.o
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/eth-phy/mvEthPhy.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/eth-phy/mvEthPhy.c
@@ -0,0 +1,1040 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvSysEthPhyConfig.h"
+#include "mvEthPhyRegs.h"
+#include "mvEthPhy.h"
+
+static 	MV_VOID	mvEthPhyPower(MV_U32 ethPortNum, MV_BOOL enable);
+
+static MV_ETHPHY_HAL_DATA ethphyHalData;
+
+/*******************************************************************************
+* mvEthPhyHalInit -
+*
+* DESCRIPTION:
+*       Initialize the ethernet phy unit HAL.
+*
+* INPUT:
+*       halData	- Ethernet PHY HAL data.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_OK on success, MV_ERROR otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvEthPhyHalInit(MV_ETHPHY_HAL_DATA *halData)
+{
+	mvOsMemcpy(&ethphyHalData, halData, sizeof(MV_ETHPHY_HAL_DATA));
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvEthPhyRegRead - Read from ethernet phy register.
+*
+* DESCRIPTION:
+*       This function reads ethernet phy register.
+*
+* INPUT:
+*       phyAddr - Phy address.
+*       regOffs - Phy register offset.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       16bit phy register value, or 0xffff on error
+*
+*******************************************************************************/
+MV_STATUS mvEthPhyRegRead(MV_U32 phyAddr, MV_U32 regOffs, MV_U16 *data)
+{
+	MV_U32 			smiReg;
+	volatile MV_U32 timeout;
+
+	/* check parameters */
+	if ((phyAddr << ETH_PHY_SMI_DEV_ADDR_OFFS) & ~ETH_PHY_SMI_DEV_ADDR_MASK)
+	{
+		mvOsPrintf("mvEthPhyRegRead: Err. Illegal PHY device address %d\n",
+                   phyAddr);
+		return MV_FAIL;
+	}
+	if ((regOffs <<  ETH_PHY_SMI_REG_ADDR_OFFS) & ~ETH_PHY_SMI_REG_ADDR_MASK)
+	{
+		mvOsPrintf("mvEthPhyRegRead: Err. Illegal PHY register offset %d\n", 
+                   regOffs);
+		return MV_FAIL;
+	}
+
+	timeout = ETH_PHY_TIMEOUT;
+	/* wait till the SMI is not busy*/
+	do
+	{
+		/* read smi register */
+		smiReg = MV_REG_READ(ETH_PHY_SMI_REG);
+		if (timeout-- == 0) 
+		{
+			mvOsPrintf("mvEthPhyRegRead: SMI busy timeout\n");
+            		return MV_FAIL;
+		}
+	}while (smiReg & ETH_PHY_SMI_BUSY_MASK);
+
+	/* fill the phy address and regiser offset and read opcode */
+	smiReg = (phyAddr <<  ETH_PHY_SMI_DEV_ADDR_OFFS) | (regOffs << ETH_PHY_SMI_REG_ADDR_OFFS )|
+			   ETH_PHY_SMI_OPCODE_READ;
+
+	/* write the smi register */
+	MV_REG_WRITE(ETH_PHY_SMI_REG, smiReg);
+
+	timeout=ETH_PHY_TIMEOUT;
+
+	/*wait till readed value is ready */
+	do
+	{
+		/* read smi register */
+		smiReg=MV_REG_READ(ETH_PHY_SMI_REG);
+
+		if (timeout-- == 0) {
+			mvOsPrintf("mvEthPhyRegRead: SMI read-valid timeout\n");
+            		return MV_FAIL;
+		}
+	}while (!(smiReg & ETH_PHY_SMI_READ_VALID_MASK));
+
+    	/* Wait for the data to update in the SMI register */
+	for(timeout = 0 ; timeout < ETH_PHY_TIMEOUT ; timeout++);
+	
+	*data = (MV_U16)( MV_REG_READ(ETH_PHY_SMI_REG) & ETH_PHY_SMI_DATA_MASK);
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvEthPhyRegWrite - Write to ethernet phy register.
+*
+* DESCRIPTION:
+*       This function write to ethernet phy register.
+*
+* INPUT:
+*       phyAddr - Phy address.
+*       regOffs - Phy register offset.
+*       data    - 16bit data.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_OK if write succeed, MV_BAD_PARAM on bad parameters , MV_ERROR on error .
+*		MV_TIMEOUT on timeout 
+*
+*******************************************************************************/
+MV_STATUS mvEthPhyRegWrite(MV_U32 phyAddr, MV_U32 regOffs, MV_U16 data)
+{
+	MV_U32 			smiReg;
+	volatile MV_U32 timeout;
+
+	/* check parameters */
+	if ((phyAddr <<  ETH_PHY_SMI_DEV_ADDR_OFFS) & ~ETH_PHY_SMI_DEV_ADDR_MASK)
+	{
+		mvOsPrintf("mvEthPhyRegWrite: Err. Illegal phy address \n");
+		return MV_BAD_PARAM;
+	}
+	if ((regOffs <<  ETH_PHY_SMI_REG_ADDR_OFFS) & ~ETH_PHY_SMI_REG_ADDR_MASK)
+	{
+		mvOsPrintf("mvEthPhyRegWrite: Err. Illegal register offset \n");
+		return MV_BAD_PARAM;
+	}
+	
+	timeout=ETH_PHY_TIMEOUT;
+
+	/* wait till the SMI is not busy*/
+	do
+	{
+		/* read smi register */
+		smiReg=MV_REG_READ(ETH_PHY_SMI_REG);
+		if (timeout-- == 0) {
+			mvOsPrintf("mvEthPhyRegWrite: SMI busy timeout\n");
+            return MV_TIMEOUT;
+		}
+	}while (smiReg & ETH_PHY_SMI_BUSY_MASK);
+
+	/* fill the phy address and regiser offset and write opcode and data*/
+	smiReg = (data << ETH_PHY_SMI_DATA_OFFS);
+	smiReg |= (phyAddr <<  ETH_PHY_SMI_DEV_ADDR_OFFS) | (regOffs << ETH_PHY_SMI_REG_ADDR_OFFS );
+    smiReg &= ~ETH_PHY_SMI_OPCODE_READ;
+
+	/* write the smi register */
+	MV_REG_WRITE(ETH_PHY_SMI_REG, smiReg);
+
+	return MV_OK;
+
+
+}
+
+/*******************************************************************************
+* mvEthPhyReset - Reset ethernet Phy.
+*
+* DESCRIPTION:
+*       This function resets a given ethernet Phy.
+*
+* INPUT:
+*       phyAddr - Phy address.
+*       timeout - in millisec        
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:   MV_OK       - Success
+*           MV_TIMEOUT  - Timeout 
+*       
+*******************************************************************************/
+MV_STATUS mvEthPhyReset(MV_U32 phyAddr, int timeout)
+{
+  	MV_U16  phyRegData;
+
+    /* Reset the PHY */
+    if(mvEthPhyRegRead(phyAddr, ETH_PHY_CTRL_REG, &phyRegData) != MV_OK)
+		return MV_FAIL;		 
+
+    /* Set bit 15 to reset the PHY */
+
+	phyRegData |= ETH_PHY_CTRL_RESET_MASK; 
+	mvEthPhyRegWrite(phyAddr, ETH_PHY_CTRL_REG, phyRegData);
+
+	/* Wait untill Reset completed */
+    while(timeout > 0)
+	{
+        mvOsSleep(100);
+        timeout -= 100;
+
+		if( mvEthPhyRegRead(phyAddr, ETH_PHY_CTRL_REG, &phyRegData) != MV_OK)
+			return MV_FAIL;		
+
+	    if( (phyRegData & ETH_PHY_CTRL_RESET_MASK) == 0)
+            return MV_OK;
+   	}
+	return MV_TIMEOUT;
+}
+
+
+/*******************************************************************************
+* mvEthPhyRestartAN - Restart ethernet Phy Auto-Negotiation.
+*
+* DESCRIPTION:
+*       This function resets a given ethernet Phy.
+*
+* INPUT:
+*       phyAddr - Phy address.
+*       timeout - in millisec        
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:   MV_OK       - Success
+*           MV_TIMEOUT  - Timeout 
+*
+*******************************************************************************/
+MV_STATUS mvEthPhyRestartAN(MV_U32 phyAddr, int timeout)
+{
+  	MV_U16  phyRegData;
+
+    /* Reset the PHY */
+     if(mvEthPhyRegRead (phyAddr, ETH_PHY_CTRL_REG, &phyRegData) != MV_OK)
+		return MV_FAIL;
+
+    /* Set bit 12 to Enable autonegotiation of the PHY */
+	phyRegData |= ETH_PHY_CTRL_AN_ENABLE_MASK; 
+
+	/* Set bit 9 to Restart autonegotiation of the PHY */
+	phyRegData |= ETH_PHY_CTRL_AN_RESTART_MASK; 
+	mvEthPhyRegWrite(phyAddr, ETH_PHY_CTRL_REG, phyRegData);
+
+	/* Wait untill Auotonegotiation completed */
+    while(timeout > 0)
+	{
+       	mvOsSleep(100);
+       	timeout -= 100;
+
+		if( mvEthPhyRegRead(phyAddr, ETH_PHY_STATUS_REG, &phyRegData) != MV_OK)
+			return MV_FAIL;
+	
+        if(phyRegData & ETH_PHY_STATUS_AN_DONE_MASK)
+       		return MV_OK;
+    }
+    return MV_TIMEOUT;
+}
+
+
+/*******************************************************************************
+* mvEthPhyDisableAN - Disable Phy Auto-Negotiation and set forced Speed and Duplex
+*
+* DESCRIPTION:
+*       This function disable AN and set duplex and speed.
+*
+* INPUT:
+*       phyAddr - Phy address.
+*       speed   - port speed. 0 - 10 Mbps, 1-100 Mbps, 2 - 1000 Mbps        
+*       duplex  - port duplex. 0 - Half duplex, 1 - Full duplex
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:   MV_OK   - Success
+*           MV_FAIL - Failure
+*
+*******************************************************************************/
+MV_STATUS mvEthPhyDisableAN(MV_U32 phyAddr, int speed, int duplex)
+{
+  	MV_U16  phyRegData;
+
+  	if(mvEthPhyRegRead (phyAddr, ETH_PHY_CTRL_REG, &phyRegData) != MV_OK)
+		return MV_FAIL;
+
+    switch(speed)
+    {
+        case 0: /* 10 Mbps */
+            phyRegData &= ~ETH_PHY_CTRL_SPEED_LSB_MASK;
+            phyRegData &= ~ETH_PHY_CTRL_SPEED_MSB_MASK;
+            break;
+
+        case 1: /* 100 Mbps */
+            phyRegData |= ETH_PHY_CTRL_SPEED_LSB_MASK;
+            phyRegData &= ~ETH_PHY_CTRL_SPEED_MSB_MASK;
+            break;
+
+        case 2: /* 1000 Mbps */
+            phyRegData &= ~ETH_PHY_CTRL_SPEED_LSB_MASK;
+            phyRegData |= ETH_PHY_CTRL_SPEED_MSB_MASK;
+            break;
+    
+        default:
+            mvOsOutput("Unexpected speed = %d\n", speed);
+            return MV_FAIL;
+    }
+    
+    switch(duplex)
+    {
+        case 0: /* half duplex */
+            phyRegData &= ~ETH_PHY_CTRL_DUPLEX_MASK;
+            break;
+
+        case 1: /* full duplex */
+            phyRegData |= ETH_PHY_CTRL_DUPLEX_MASK;
+            break;
+
+        default:
+            mvOsOutput("Unexpected duplex = %d\n", duplex);
+    }
+    /* Clear bit 12 to Disable autonegotiation of the PHY */
+	phyRegData &= ~ETH_PHY_CTRL_AN_ENABLE_MASK; 
+
+	/* Clear bit 9 to DISABLE, Restart autonegotiation of the PHY */
+	phyRegData &= ~ETH_PHY_CTRL_AN_RESTART_MASK; 
+	mvEthPhyRegWrite(phyAddr, ETH_PHY_CTRL_REG, phyRegData);
+
+    return MV_OK;
+}
+
+MV_STATUS   mvEthPhyLoopback(MV_U32 phyAddr, MV_BOOL isEnable)
+{
+    MV_U16      regVal, ctrlVal;
+    MV_STATUS   status;
+
+    /* Set loopback speed and duplex accordingly with current */
+    /* Bits: 6, 8, 13 */
+  	if(mvEthPhyRegRead (phyAddr, ETH_PHY_CTRL_REG, &ctrlVal) != MV_OK)
+		return MV_FAIL;
+
+    if(isEnable)
+    {
+        /* Select page 2 */
+        mvEthPhyRegWrite(phyAddr, 22, 2);
+
+        mvEthPhyRegRead (phyAddr, 21, &regVal);
+        regVal &= ~(ETH_PHY_CTRL_DUPLEX_MASK | ETH_PHY_CTRL_SPEED_LSB_MASK | 
+                    ETH_PHY_CTRL_SPEED_MSB_MASK | ETH_PHY_CTRL_AN_ENABLE_MASK);
+        regVal |= (ctrlVal & (ETH_PHY_CTRL_DUPLEX_MASK | ETH_PHY_CTRL_SPEED_LSB_MASK | 
+                            ETH_PHY_CTRL_SPEED_MSB_MASK | ETH_PHY_CTRL_AN_ENABLE_MASK) );
+        mvEthPhyRegWrite(phyAddr, 21, regVal);
+
+        /* Select page 0 */
+        mvEthPhyRegWrite(phyAddr, 22, 0);
+    
+        /* Disable Energy detection   R16[9:8] = 00 */
+        /* Disable MDI/MDIX crossover R16[6:5] = 00 */
+        mvEthPhyRegRead (phyAddr, ETH_PHY_SPEC_CTRL_REG, &regVal);
+        regVal &= ~(BIT5 | BIT6 | BIT8 | BIT9);
+        mvEthPhyRegWrite (phyAddr, ETH_PHY_SPEC_CTRL_REG, regVal);
+
+        status = mvEthPhyReset(phyAddr, 1000);
+        if(status != MV_OK)
+        {
+            mvOsPrintf("mvEthPhyReset failed: status=0x%x\n", status);
+            return status;
+        }
+
+        /* Set loopback */
+        ctrlVal |= ETH_PHY_CTRL_LOOPBACK_MASK;
+        mvEthPhyRegWrite(phyAddr, ETH_PHY_CTRL_REG, ctrlVal);
+    }
+    else
+    {
+        /* Cancel Loopback */
+        ctrlVal &= ~ETH_PHY_CTRL_LOOPBACK_MASK;
+        mvEthPhyRegWrite(phyAddr, ETH_PHY_CTRL_REG, ctrlVal);
+        
+        status = mvEthPhyReset(phyAddr, 1000);
+        if(status != MV_OK)
+        {
+            mvOsPrintf("mvEthPhyReset failed: status=0x%x\n", status);
+            return status;
+        }
+        
+        /* Enable Energy detection   R16[9:8] = 11 */
+        /* Enable MDI/MDIX crossover R16[6:5] = 11 */
+        mvEthPhyRegRead (phyAddr, ETH_PHY_SPEC_CTRL_REG, &regVal);
+        regVal |= (BIT5 | BIT6 | BIT8 | BIT9);
+        mvEthPhyRegWrite (phyAddr, ETH_PHY_SPEC_CTRL_REG, regVal);
+
+        status = mvEthPhyReset(phyAddr, 1000);
+        if(status != MV_OK)
+        {
+            mvOsPrintf("mvEthPhyReset failed: status=0x%x\n", status);
+            return status;
+        }
+    }
+
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvEthPhyCheckLink - 
+*
+* DESCRIPTION:
+*	check link in phy port
+*       
+* INPUT:
+*       phyAddr - Phy address.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:   MV_TRUE if link is up, MV_FALSE if down
+*
+*******************************************************************************/
+MV_BOOL mvEthPhyCheckLink( MV_U32 phyAddr )
+{
+	MV_U16 val_st, val_ctrl, val_spec_st;
+
+	/* read status reg */
+	if( mvEthPhyRegRead( phyAddr, ETH_PHY_STATUS_REG, &val_st) != MV_OK )
+		return MV_FALSE;
+
+	/* read control reg */
+	if( mvEthPhyRegRead( phyAddr, ETH_PHY_CTRL_REG, &val_ctrl) != MV_OK )
+		return MV_FALSE;
+
+	/* read special status reg */
+	if( mvEthPhyRegRead( phyAddr, ETH_PHY_SPEC_STATUS_REG, &val_spec_st) != MV_OK )
+		return MV_FALSE;
+
+	/* Check for PHY exist */
+	if((val_ctrl == ETH_PHY_SMI_DATA_MASK) && (val_st & ETH_PHY_SMI_DATA_MASK))
+		return MV_FALSE;
+
+
+	if(val_ctrl & ETH_PHY_CTRL_AN_ENABLE_MASK)
+	{
+		if(val_st & ETH_PHY_STATUS_AN_DONE_MASK)
+			return MV_TRUE;
+		else
+			return MV_FALSE;
+	}
+	else
+	{
+		if(val_spec_st & ETH_PHY_SPEC_STATUS_LINK_MASK)
+			return MV_TRUE;
+	}
+	return MV_FALSE;
+}
+
+/*******************************************************************************
+* mvEthPhyPrintStatus - 
+*
+* DESCRIPTION:
+*	print port Speed, Duplex, Auto-negotiation, Link.
+*       
+* INPUT:
+*       phyAddr - Phy address.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:   16bit phy register value, or 0xffff on error
+*
+*******************************************************************************/
+MV_STATUS	mvEthPhyPrintStatus( MV_U32 phyAddr )
+{
+	MV_U16 val;
+
+	/* read control reg */ 
+	if( mvEthPhyRegRead( phyAddr, ETH_PHY_CTRL_REG, &val) != MV_OK )
+		return MV_ERROR;
+
+	if( val & ETH_PHY_CTRL_AN_ENABLE_MASK )
+		mvOsOutput( "Auto negotiation: Enabled\n" );
+	else
+		mvOsOutput( "Auto negotiation: Disabled\n" );
+
+
+	/* read specific status reg */ 
+	if( mvEthPhyRegRead( phyAddr, ETH_PHY_SPEC_STATUS_REG, &val) != MV_OK )
+		return MV_ERROR;
+
+	switch (val & ETH_PHY_SPEC_STATUS_SPEED_MASK)
+	{
+		case ETH_PHY_SPEC_STATUS_SPEED_1000MBPS:
+			mvOsOutput( "Speed: 1000 Mbps\n" );
+			break;
+		case ETH_PHY_SPEC_STATUS_SPEED_100MBPS:
+			mvOsOutput( "Speed: 100 Mbps\n" );
+			break;
+		case ETH_PHY_SPEC_STATUS_SPEED_10MBPS:
+			mvOsOutput( "Speed: 10 Mbps\n" );
+		default:
+			mvOsOutput( "Speed: Uknown\n" );
+			break;
+
+	}
+
+	if( val & ETH_PHY_SPEC_STATUS_DUPLEX_MASK )
+		mvOsOutput( "Duplex: Full\n" );
+	else
+		mvOsOutput( "Duplex: Half\n" );
+ 
+
+	if( val & ETH_PHY_SPEC_STATUS_LINK_MASK )
+		mvOsOutput("Link: up\n");
+	else
+		mvOsOutput("Link: down\n");
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvEthE1111PhyBasicInit - 
+*
+* DESCRIPTION:
+*	Do a basic Init to the Phy , including reset
+*       
+* INPUT:
+*       ethPortNum - Ethernet port number
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:   None
+*
+*******************************************************************************/
+MV_VOID		mvEthE1111PhyBasicInit(MV_U32 ethPortNum)
+{
+	MV_U16 reg;
+
+	/* Phy recv and tx delay */
+	mvEthPhyRegRead(ethphyHalData.phyAddr[ethPortNum],20,&reg);
+	reg |= BIT1 | BIT7;
+	mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],20,reg);
+
+	/* Leds link and activity*/
+	mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],24,0x4111);
+
+	/* reset the phy */
+	mvEthPhyRegRead(ethphyHalData.phyAddr[ethPortNum],0,&reg);
+	reg |= BIT15;
+	mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],0,reg);
+
+	if(ethphyHalData.boardSpecInit == MV_TRUE)
+		mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],
+				ethphyHalData.specRegOff , ethphyHalData.specData);
+
+}
+
+/*******************************************************************************
+* mvEthE1112PhyBasicInit - 
+*
+* DESCRIPTION:
+*	Do a basic Init to the Phy , including reset
+*       
+* INPUT:
+*       ethPortNum - Ethernet port number
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:   None
+*
+*******************************************************************************/
+MV_VOID		mvEthE1112PhyBasicInit(MV_U32 ethPortNum)
+{
+	MV_U16 reg;
+
+	/* Set phy address */
+	/*MV_REG_WRITE(ETH_PHY_ADDRESS_REG(ethPortNum), ethphyHalData.phyAddr[ethPortNum]);*/
+
+	/* Implement PHY errata */
+	mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],22,2);
+	mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],0,0x140);
+	mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],0,0x8140);
+	mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],22,0);
+	
+	mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],22,3);
+	mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],16,0x103);
+	mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],22,0);
+
+	/* reset the phy */
+	mvEthPhyRegRead(ethphyHalData.phyAddr[ethPortNum],0,&reg);
+	reg |= BIT15;
+	mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],0,reg);
+
+}
+
+/*******************************************************************************
+* mvEthE1116PhyBasicInit - 
+*
+* DESCRIPTION:
+*	Do a basic Init to the Phy , including reset
+*       
+* INPUT:
+*       ethPortNum - Ethernet port number
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:   None
+*
+*******************************************************************************/
+MV_VOID		mvEthE1116PhyBasicInit(MV_U32 ethPortNum)
+{
+	MV_U16 reg;
+
+	/* Set phy address */
+	MV_REG_WRITE(ETH_PHY_ADDRESS_REG(ethPortNum), ethphyHalData.phyAddr[ethPortNum]);
+
+	/* Leds link and activity*/
+	mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],22,0x3);
+	mvEthPhyRegRead(ethphyHalData.phyAddr[ethPortNum],16,&reg);
+	reg &= ~0xf;
+	reg	|= 0x1;
+	mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],16,reg);
+	mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],22,0x0);
+
+	/* Set RGMII delay */
+	mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],22,2);
+	mvEthPhyRegRead(ethphyHalData.phyAddr[ethPortNum],21,&reg);
+	reg	|= (BIT5 | BIT4);
+	mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],21,reg);
+	mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],22,0);
+
+	/* reset the phy */
+	mvEthPhyRegRead(ethphyHalData.phyAddr[ethPortNum],0,&reg);
+	reg |= BIT15;
+	mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],0,reg);
+}
+
+/*******************************************************************************
+* mvEthE1011PhyBasicInit - 
+*
+* DESCRIPTION:
+*	Do a basic Init to the Phy , including reset
+*       
+* INPUT:
+*       ethPortNum - Ethernet port number
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:   None
+*
+*******************************************************************************/
+MV_VOID		mvEthE1011PhyBasicInit(MV_U32 ethPortNum)
+{
+	MV_U16 reg;
+
+	/* Phy recv and tx delay */
+	mvEthPhyRegRead(ethphyHalData.phyAddr[ethPortNum],20,&reg);
+	reg &= ~(BIT1 | BIT7);
+	mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],20,reg);
+
+	/* Leds link and activity*/
+	mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],24,0x4111);
+
+	/* reset the phy */
+	mvEthPhyRegRead(ethphyHalData.phyAddr[ethPortNum],0, &reg);
+	reg |= BIT15;
+	mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],0,reg);
+
+}
+
+/*******************************************************************************
+* mvEthE1112PhyPowerDown - 
+*
+* DESCRIPTION:
+*	Power down the Phy , including reset
+*       
+* INPUT:
+*       ethPortNum - Ethernet port number
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:   None
+*
+*******************************************************************************/
+MV_VOID	mvEthE1112PhyPowerDown(MV_U32 ethPortNum)
+{
+	mvEthPhyPower(ethPortNum, MV_FALSE);
+}
+
+/*******************************************************************************
+* mvEthE1112PhyPowerUp - 
+*
+* DESCRIPTION:
+*	Power up the Phy , including reset
+*       
+* INPUT:
+*       ethPortNum - Ethernet port number
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:   None
+*
+*******************************************************************************/
+MV_VOID	mvEthE1112PhyPowerUp(MV_U32 ethPortNum)
+{
+	mvEthPhyPower(ethPortNum, MV_TRUE);
+}
+
+/*******************************************************************************
+* mvEthE1116PhyPower - 
+*
+* DESCRIPTION:
+*	Do a basic power down/up to the 88E1116 Phy , including reset
+*       
+* INPUT:
+*       ethPortNum - Ethernet port number
+*	enable - MV_TRUE - power up
+*		 MV_FALSE - power down
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:   None
+*
+*******************************************************************************/
+MV_VOID	mvEthE1116PhyPower(MV_U32 ethPortNum, MV_BOOL enable)
+{
+	MV_U16 reg;
+	if (enable == MV_FALSE)
+	{
+	/* Power down command */
+		mvEthPhyRegRead(ethphyHalData.phyAddr[ethPortNum],16,&reg); 		
+		reg |= BIT2;								        
+		mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],16,reg);	
+		
+		mvEthPhyRegRead(ethphyHalData.phyAddr[ethPortNum],ETH_PHY_CTRL_REG,&reg); 		
+		reg |= ETH_PHY_CTRL_RESET_BIT;								        
+		mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],ETH_PHY_CTRL_REG,reg);	/* software reset */			
+		mvEthPhyRegRead(ethphyHalData.phyAddr[ethPortNum],ETH_PHY_CTRL_REG,&reg); 		
+		reg |= ETH_PHY_CTRL_POWER_DOWN_BIT;								        
+		mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],ETH_PHY_CTRL_REG,reg);	/* power down the PHY */
+	}
+	else
+	{
+	/* Power up command */
+		mvEthPhyRegRead(ethphyHalData.phyAddr[ethPortNum],16,&reg); 		
+		reg &= ~BIT2;								        
+		mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],16,reg);		/* select to enable the SERDES */	
+		
+		mvEthPhyRegRead(ethphyHalData.phyAddr[ethPortNum],ETH_PHY_CTRL_REG,&reg); 		
+		reg |= ETH_PHY_CTRL_RESET_BIT;								        
+		mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],ETH_PHY_CTRL_REG,reg);	/* software reset */			
+		mvEthPhyRegRead(ethphyHalData.phyAddr[ethPortNum],ETH_PHY_CTRL_REG,&reg); 		
+		reg &= ~ETH_PHY_CTRL_POWER_DOWN_BIT;								        
+		mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],ETH_PHY_CTRL_REG,reg);	/* power up the PHY */
+	}
+}
+
+/*******************************************************************************
+* mvEthPhyPower - 
+*
+* DESCRIPTION:
+*	Do a basic power down/up to the Phy , including reset
+*       
+* INPUT:
+*       ethPortNum - Ethernet port number
+*	enable - MV_TRUE - power up
+*		 MV_FALSE - power down
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:   None
+*
+*******************************************************************************/
+static MV_VOID	mvEthPhyPower(MV_U32 ethPortNum, MV_BOOL enable)
+{
+	MV_U16 reg;
+	if (enable == MV_FALSE)
+	{
+	/* Power down command */
+		mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],22,2); 		/* select page 2 */
+		mvEthPhyRegRead(ethphyHalData.phyAddr[ethPortNum],16,&reg); 		
+		reg |= BIT3;								        
+		mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],16,reg);		/* select to disable the SERDES */	
+		mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],22,0); 		/* select page 0 */			
+		
+		mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],22,3);		/* Power off LED's */
+		mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],16,0x88);
+		mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],22,0);
+
+		mvEthPhyRegRead(ethphyHalData.phyAddr[ethPortNum],ETH_PHY_CTRL_REG,&reg); 		
+		reg |= ETH_PHY_CTRL_RESET_BIT;								        
+		mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],ETH_PHY_CTRL_REG,reg);	/* software reset */			
+		mvEthPhyRegRead(ethphyHalData.phyAddr[ethPortNum],ETH_PHY_CTRL_REG,&reg); 		
+		reg |= ETH_PHY_CTRL_POWER_DOWN_BIT;								        
+		mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],ETH_PHY_CTRL_REG,reg);	/* power down the PHY */
+	}
+	else
+	{
+	/* Power up command */
+		mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],22,2); 		/* select page 2 */
+		mvEthPhyRegRead(ethphyHalData.phyAddr[ethPortNum],16,&reg); 		
+		reg &= ~BIT3;								        
+		mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],16,reg);		/* select to enable the SERDES */	
+		mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],22,0); 		/* select page 0 */
+		
+		mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],22,3);		/* Power on LED's */
+		mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],16,0x03);
+		mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],22,0);
+
+		mvEthPhyRegRead(ethphyHalData.phyAddr[ethPortNum],ETH_PHY_CTRL_REG,&reg); 		
+		reg |= ETH_PHY_CTRL_RESET_BIT;								        
+		mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],ETH_PHY_CTRL_REG,reg);	/* software reset */			
+		mvEthPhyRegRead(ethphyHalData.phyAddr[ethPortNum],ETH_PHY_CTRL_REG,&reg); 		
+		reg &= ~ETH_PHY_CTRL_POWER_DOWN_BIT;								        
+		mvEthPhyRegWrite(ethphyHalData.phyAddr[ethPortNum],ETH_PHY_CTRL_REG,reg);	/* power up the PHY */
+	}
+}
+
+
+/*******************************************************************************
+* mvEth1145PhyInit - Initialize MARVELL 1145 Phy 
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       phyAddr - Phy address.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_VOID mvEth1145PhyBasicInit(MV_U32 port)
+{
+    MV_U16 value;
+
+    /* Set phy address for each port */
+    MV_REG_WRITE(ETH_PHY_ADDRESS_REG(port), ethphyHalData.phyAddr[port]);
+	    /* Set Link1000 output pin to be link indication, set Tx output pin to be activity */
+    mvEthPhyRegWrite(ethphyHalData.phyAddr[port], 0x18, ETH_PHY_LED_ACT_LNK_DV);
+    mvOsDelay(10);
+	    
+	    /* Add delay to RGMII Tx and Rx */
+    mvEthPhyRegRead(ethphyHalData.phyAddr[port], 0x14, &value);
+    mvEthPhyRegWrite(ethphyHalData.phyAddr[port], 0x14,(value | BIT1 | BIT7));
+    mvOsDelay(10);
+#if 0 /* Fix by yotam */
+    if (boardId != RD_78XX0_AMC_ID && 
+	    boardId != RD_78XX0_H3C_ID) {
+	    /* Set port 2 - Phy addr 9 to RGMII */
+	if (port == 2)
+	{
+		mvEthPhyRegWrite(ethphyHalData.phyAddr[port], 0x1b, 0x808b);
+		mvOsDelay(10);
+	}
+	
+	/* Set port 1 - Phy addr a to SGMII */
+	if (port == 1)
+	{
+	    mvEthPhyRegWrite(ethphyHalData.phyAddr[port], 0x1b, 0x8084);
+	    mvOsDelay(10);
+		
+		/* Reset Phy */
+	    mvEthPhyRegRead( ethphyHalData.phyAddr[port], 0x00, &value);
+	    mvEthPhyRegWrite(ethphyHalData.phyAddr[port], 0x00, (value | BIT15));
+	    mvOsDelay(10);
+	#if defined(SGMII_OUTBAND_AN)
+		/* Set port 1 - Phy addr A Page 1 */
+		mvEthPhyRegWrite(ethphyHalData.phyAddr[port], 0x16, 0x1);
+		mvOsDelay(10);
+	
+		/* Set port 1 - Phy addr A disable A.N. */
+		mvEthPhyRegWrite(ethphyHalData.phyAddr[port], 0x0, 0x140);
+		mvOsDelay(10);
+	
+		/* Set port 1 - Phy addr A reset */
+		mvEthPhyRegWrite(ethphyHalData.phyAddr[port], 0x0, 0x8140);
+		mvOsDelay(10);
+	
+		mvEthPhyRegWrite(ethphyHalData.phyAddr[port], 0x16, 0x0);
+		mvOsDelay(10);
+	#endif
+	}
+    }
+#endif
+
+	    /* Set Phy TPVL to 0 */
+    mvEthPhyRegWrite(ethphyHalData.phyAddr[port], 0x10, 0x60);
+    mvOsDelay(10);
+
+    /* Reset Phy */
+    mvEthPhyRegRead(ethphyHalData.phyAddr[port], 0x00, &value);
+    mvEthPhyRegWrite(ethphyHalData.phyAddr[port], 0x00, (value | BIT15));
+    mvOsDelay(10);
+
+    return;
+}
+
+
+/*******************************************************************************
+* mvEthSgmiiToCopperPhyInit - Initialize Test board 1112 Phy 
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       phyAddr - Phy address.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_VOID mvEthSgmiiToCopperPhyBasicInit(MV_U32 port)
+{
+    MV_U16 value;    
+    MV_U16 phyAddr = 0xC;
+    
+   /* Port 0 phyAdd c */   
+   /* Port 1 phyAdd d */   
+    mvEthPhyRegWrite(phyAddr + port,22,3);
+    mvEthPhyRegWrite(phyAddr + port,16,0x103);
+    mvEthPhyRegWrite(phyAddr + port,22,0);
+
+		/* reset the phy */
+    mvEthPhyRegRead(phyAddr + port,0,&value);
+    value |= BIT15;
+    mvEthPhyRegWrite(phyAddr + port,0,value);
+}
+
+
+MV_VOID mvEth1121PhyBasicInit(MV_U32 port)
+{
+    	MV_U16 value;
+	MV_U16 phyAddr = ethphyHalData.phyAddr[port];
+
+	MV_REG_WRITE(ETH_PHY_ADDRESS_REG(port), phyAddr);
+	
+	/* Change page select to 2 */
+	value = 2;
+	mvEthPhyRegWrite(phyAddr, 22, value);
+    	mvOsDelay(10);
+
+	/* Set RGMII rx delay */
+	mvEthPhyRegRead(phyAddr, 21, &value);
+	value |= BIT5;
+	mvEthPhyRegWrite(phyAddr, 21, value);
+    	mvOsDelay(10);
+
+	/* Change page select to 0 */
+	value = 0;
+	mvEthPhyRegWrite(phyAddr, 22, value);
+    	mvOsDelay(10);
+
+	/* reset the phy */
+	mvEthPhyRegRead(phyAddr, 0, &value);
+	value |= BIT15;
+	mvEthPhyRegWrite(phyAddr, 0, value);
+    	mvOsDelay(10);
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/eth-phy/mvCompVer.txt
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/eth-phy/mvCompVer.txt
@@ -0,0 +1,4 @@
+Global HAL Version: DOVE_HAL_3_1_2
+Unit HAL Version: 1.0.2
+Description: This component includes an implementation of the unit HAL drivers
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/sata/mvCompVer.txt
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/sata/mvCompVer.txt
@@ -0,0 +1,4 @@
+Global HAL Version: DOVE_HAL_3_1_2
+Unit HAL Version: 1.0.2
+Description: This component includes an implementation of the unit HAL drivers
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/sata/CoreDriver/mvStorageDev.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/sata/CoreDriver/mvStorageDev.c
@@ -0,0 +1,2184 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+/*******************************************************************************
+* mvStorageDev.c - C File for implementation of the core driver.
+*
+* DESCRIPTION:
+*       None.
+*
+* DEPENDENCIES:
+*   mvOs.h
+*   mvSata.h.
+*   mvStorageDev.h
+*   mvRegs.h
+*
+*******************************************************************************/
+#include "mvSataSoc.h"
+#include "mvOsS.h"
+#include "mvSata.h"
+#include "mvStorageDev.h"
+#include "mvRegs.h"
+
+/* Defines */
+
+/* functions for internal driver use */
+MV_BOOLEAN waitWhileStorageDevIsBusy(MV_SATA_ADAPTER* pAdapter,
+                                     MV_BUS_ADDR_T ioBaseAddr,
+                                     MV_U32 eDmaRegsOffset, MV_U32 loops,
+                                     MV_U32 delayParam);
+MV_BOOLEAN waitForDRQToClear(MV_SATA_ADAPTER* pAdapter,
+                             MV_BUS_ADDR_T ioBaseAddr,
+                             MV_U32 eDmaRegsOffset, MV_U32 loops,
+                             MV_U32 delayParam);
+
+void enableStorageDevInterrupt (MV_SATA_CHANNEL *pSataChannel);
+void disableStorageDevInterrupt(MV_SATA_CHANNEL *pSataChannel);
+static MV_BOOLEAN isStorageDevReadyForPIO(MV_SATA_CHANNEL *pSataChannel);
+void dumpAtaDeviceRegisters(MV_SATA_ADAPTER *pAdapter,
+                            MV_U8 channelIndex, MV_BOOLEAN isEXT,
+                            MV_STORAGE_DEVICE_REGISTERS *pRegisters);
+MV_BOOLEAN _doSoftReset(MV_SATA_CHANNEL *pSataChannel);
+extern void _setActivePMPort(MV_SATA_CHANNEL *pSataChannel, MV_U8 PMPort);
+extern void disableSaDevInterrupts(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex);
+
+MV_BOOLEAN  _PMAccessReg(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex,
+                         MV_U8 PMPort, MV_U8 PMReg, MV_U32 *pValue,
+                         MV_STORAGE_DEVICE_REGISTERS *registerStruct,
+                         MV_BOOLEAN isRead);
+
+MV_BOOLEAN executeNonUDMACommand(MV_SATA_ADAPTER *pAdapter,
+                                 MV_U8 channelIndex,
+                                 MV_U8  PMPort,
+                                 MV_NON_UDMA_PROTOCOL protocolType,
+                                 MV_BOOLEAN  isEXT,
+                                 MV_U16_PTR bufPtr, MV_U32 count,
+                                 MV_U16 features,
+                                 MV_U16 sectorCount,
+                                 MV_U16 lbaLow, MV_U16 lbaMid,
+                                 MV_U16 lbaHigh, MV_U8 device,
+                                 MV_U8 command);
+
+MV_BOOLEAN waitWhileStorageDevIsBusy_88SX60X1(MV_SATA_ADAPTER* pAdapter,
+					      MV_BUS_ADDR_T ioBaseAddr,
+					      MV_U32 eDmaRegsOffset, MV_U8 channelIndex,
+					      MV_U32 loops,
+					      MV_U32 delayParam);
+
+MV_BOOLEAN waitForDRQ(MV_SATA_ADAPTER* pAdapter,
+                      MV_BUS_ADDR_T ioBaseAddr,
+                      MV_U32 eDmaRegsOffset, MV_U32 loops,
+                      MV_U32 delayParam);
+
+void _startSoftResetDevice(MV_SATA_CHANNEL *pSataChannel);
+MV_BOOLEAN _isDeviceBsyBitOff(MV_SATA_CHANNEL *pSataChannel);
+/*******************************************************************************
+* waitWhileStorageDevIsBusy - Wait for the storage device to be released from
+*                             busy state.
+*
+* DESCRIPTION:
+*   The busy bit is set to one to indicate that the storage device is busy. The
+*   busy bit shall be set to one by the device only when one of the following
+*   events occurs:
+*
+*   1) after either the negation of RESET- or the setting of the SRST bit to one
+*      in the Device Control register.
+*   2) after writing the Command register if the DRQ bit is not set to one.
+*   3) between blocks of a data transfer during PIO data-in commands before the
+*      DRQ bit is cleared to zero.
+*   4) after the transfer of a data block during PIO data-out commands before
+*      the DRQ bit is cleared to zero.
+*   5) during the data transfer of DMA commands either the BSY bit, the DRQ bit,
+*      or both shall be set to one.
+*   6) after the command packet is received during the execution of a PACKET
+*      command.
+*
+* INPUT:
+*     ioBaseAddr     - The PCI I/O window base address of the adapter.
+*     eDmaRegsOffset - The EDMA register's offset of the relevant SATA channel.
+*     loops          - max number of times to pool the status register.
+*     delay          - number of u seconds to wait each loop.
+*
+* RETURN:
+*     MV_TRUE if the device is released from busy state, MV_FALSE otherwise.
+* COMMENTS:
+*     None.
+*
+*******************************************************************************/
+MV_BOOLEAN waitWhileStorageDevIsBusy(MV_SATA_ADAPTER* pAdapter,
+                                     MV_BUS_ADDR_T ioBaseAddr,
+                                     MV_U32 eDmaRegsOffset, MV_U32 loops,
+                                     MV_U32 delayParam)
+{
+    MV_U8   ATAstatus = 0;
+    MV_U32  i;
+
+    for (i = 0;i < loops; i++)
+    {
+        ATAstatus = MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset +
+                                     MV_ATA_DEVICE_STATUS_REG_OFFSET);
+        if ((ATAstatus & MV_ATA_BUSY_STATUS) == 0)
+        {
+
+            if ((ATAstatus & MV_ATA_ERROR_STATUS) == 0)
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, "waitWhileStorageDevIsBusy: %d loops *"
+                         "%d usecs\n", i, delayParam);
+                return MV_TRUE;
+            }
+            else
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "waitWhileStorageDevIsBusy<FAILED>: Device ERROR"
+                         " Status: 0x%02x\n", ATAstatus);
+                return MV_FALSE;
+            }
+        }
+        mvMicroSecondsDelay(pAdapter, delayParam);
+    }
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "waitWhileStorageDevIsBusy<FAILED>: Time out - Device ERROR"
+             " Status: 0x%02x. loops %d, delay %d\n", ATAstatus, loops, delayParam);
+
+    return MV_FALSE;
+}
+
+
+MV_BOOLEAN waitWhileStorageDevIsBusy_88SX60X1(MV_SATA_ADAPTER* pAdapter,
+                                                                    MV_BUS_ADDR_T ioBaseAddr,
+                                                                    MV_U32 eDmaRegsOffset, MV_U8 channelIndex,
+                                                                    MV_U32 loops,
+                                                                    MV_U32 delayParam)
+{
+    MV_U8   ATAstatus = 0;
+    MV_U32  i,intReg;
+    MV_U8   sataUnit = channelIndex >> 2, portNum = (channelIndex & 0x3);
+
+
+    for (i = 0;i < loops; i++)
+    {
+        intReg = MV_REG_READ_DWORD (ioBaseAddr, MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                                    MV_SATAHC_INTERRUPT_CAUSE_REG_OFFSET);
+
+        if (intReg & (1 << (8 + portNum)))
+        {
+            ATAstatus = MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset +
+                                         MV_ATA_DEVICE_STATUS_REG_OFFSET);
+            MV_REG_WRITE_DWORD (ioBaseAddr, MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                                MV_SATAHC_INTERRUPT_CAUSE_REG_OFFSET,
+                                ~(1 << (8 + portNum)));
+            if ((ATAstatus & MV_ATA_ERROR_STATUS) == 0)
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID,MV_DEBUG, "waitWhileStorageDevIsBusy: %d loops *"
+                         "%d usecs\n", i, delayParam);
+                return MV_TRUE;
+            }
+            else
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID,MV_DEBUG_ERROR, "waitWhileStorageDevIsBusy<FAILED>: Device ERROR"
+                         " Status: 0x%02x\n", ATAstatus);
+                return MV_FALSE;
+            }
+        }
+        mvMicroSecondsDelay(pAdapter, delayParam);
+    }
+    ATAstatus = MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset +
+                                 MV_ATA_DEVICE_STATUS_REG_OFFSET);
+ 
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "waitWhileStorageDevIsBusy<FAILED>: Time out - Device ERROR"
+             " Status: 0x%02x. loops %d, delay %d\n", ATAstatus, loops, delayParam);
+    return MV_FALSE;
+}
+
+MV_BOOLEAN waitForDRQ(MV_SATA_ADAPTER* pAdapter,
+                      MV_BUS_ADDR_T ioBaseAddr,
+                      MV_U32 eDmaRegsOffset, MV_U32 loops,
+                      MV_U32 delayParam)
+{
+    MV_U8   ATAstatus = 0;
+    MV_U32  i;
+
+    for (i = 0;i < loops; i++)
+    {
+        ATAstatus = MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset +
+                                     MV_ATA_DEVICE_STATUS_REG_OFFSET);
+        if ((ATAstatus & MV_ATA_BUSY_STATUS) == 0)
+        {
+            if (ATAstatus & MV_ATA_DATA_REQUEST_STATUS)
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, "waitWhileStorageDevIsBusy: %d loops *"
+                         "%d usecs\n", i, delayParam);
+                return MV_TRUE;
+            }
+        }
+        mvMicroSecondsDelay(pAdapter, delayParam);
+    }
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "waitWhileStorageDevIsBusy<FAILED>: Time out - Device ERROR"
+             " Status: 0x%02x. loops %d, delay %d\n", ATAstatus, loops, delayParam);
+
+    return MV_FALSE;
+}
+/*******************************************************************************
+* enableStorageDevInterrupt - Enable the storage device to be able to issue
+*                       interrupt.
+*
+* DESCRIPTION:
+*   Enable the connected storage device to the given channel to assert INTRQ by
+*   clearing nIEN bit in the Device Control register.
+*
+* INPUT:
+*   pSataChannel - Pointer to the Sata channel data structure.
+*
+* RETURN:
+*   None.
+*
+* COMMENTS:
+*   this function also clears the SRST bit in the Device Control register.
+*
+*******************************************************************************/
+void enableStorageDevInterrupt(MV_SATA_CHANNEL *pSataChannel)
+{
+
+    MV_REG_WRITE_BYTE(pSataChannel->mvSataAdapter->adapterIoBaseAddress,
+                      pSataChannel->eDmaRegsOffset +
+                      MV_ATA_DEVICE_CONTROL_REG_OFFSET,0);
+    MV_REG_READ_BYTE(pSataChannel->mvSataAdapter->adapterIoBaseAddress,
+                     pSataChannel->eDmaRegsOffset +
+                     MV_ATA_DEVICE_CONTROL_REG_OFFSET);
+}
+
+/*******************************************************************************
+* disableStorageDevInterrupt - Disable the storage device to be able to issue
+*                              interrupt.
+*
+* DESCRIPTION:
+*   This function disable the connected storage device to the given channel to
+*   assert INTRQ by setting nIEN bit in the Device Control register.
+*
+* INPUT:
+*   pSataChannel - Pointer to the Sata channel data structure.
+*
+* RETURN:
+*   None.
+*
+* COMMENTS:
+*   this function also clears the SRST bit
+*
+*******************************************************************************/
+void disableStorageDevInterrupt(MV_SATA_CHANNEL *pSataChannel)
+{
+
+
+    MV_REG_WRITE_BYTE(pSataChannel->mvSataAdapter->adapterIoBaseAddress,
+                      pSataChannel->eDmaRegsOffset +
+                      MV_ATA_DEVICE_CONTROL_REG_OFFSET, MV_BIT1);
+    MV_REG_READ_BYTE(pSataChannel->mvSataAdapter->adapterIoBaseAddress,
+                     pSataChannel->eDmaRegsOffset +
+                     MV_ATA_DEVICE_STATUS_REG_OFFSET);
+}
+
+/*******************************************************************************
+* isStorageDevReadyForPIO - Check that the storage device connected to the given
+*                           channel and the channel itself are ready to perform
+*                           PIO commands.
+*
+* DESCRIPTION:
+*   Check if the device connected to the given channel and the channel itself
+*   are ready for PIO commands.
+*
+* INPUT:
+*       pSataChannel - Pointer to the SATA channel data structure.
+*
+* RETURN:
+*       MV_TRUE if the channel and the connected device ready to do PIO,
+*       MV_FALSE otherwise.
+*
+* COMMENTS:
+*     If the adapter's eEnEDMA bit in the EDMA Command Register is set, PIO
+*     commands cannot be issued. The eEnEDMA bit cannot be reset by the CPU.
+*     Only the EDMA resets it, when bit eDsEDMA is set or when an error
+*     condition occurs.
+*
+*******************************************************************************/
+static MV_BOOLEAN isStorageDevReadyForPIO(MV_SATA_CHANNEL *pSataChannel)
+{
+    MV_BUS_ADDR_T ioBaseAddr =pSataChannel->mvSataAdapter->adapterIoBaseAddress;
+    MV_U32  eDmaRegsOffset = pSataChannel->eDmaRegsOffset;
+    MV_U8   ATAcontrolRegValue;
+
+    /* If the adapter's eEnEDMA bit in the EDMA Command Register is set  */
+    /* PIO commands cannot be issued.                                       */
+    if (pSataChannel->queueCommandsEnabled == MV_TRUE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: PIO command failed:"
+                 "EDMA is active\n", pSataChannel->mvSataAdapter->adapterId,
+                 pSataChannel->channelNumber);
+        return MV_FALSE;
+    }
+    /* Check if BUSY bit is '0' */
+
+    /* Reading the Control register actually gives us the Alternate Status  */
+    /* register content (ATA protocol). If the busy bit is set in the       */
+    /* Alternate Status register, we wait for 50 mili-sec and try again, if */
+    /* the busy bit is still set, we return false indicating that the       */
+    /* device is not ready for PIO commands.                                */
+    ATAcontrolRegValue = MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset +
+                                          MV_ATA_DEVICE_CONTROL_REG_OFFSET);
+    if ((ATAcontrolRegValue & MV_ATA_BUSY_STATUS)!= 0)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d:  control regiser is "
+                 "0x%02x\n",pSataChannel->mvSataAdapter->adapterId,
+                 pSataChannel->channelNumber,ATAcontrolRegValue);
+        return MV_FALSE;
+    }
+    if ( (pSataChannel->deviceType != MV_SATA_DEVICE_TYPE_ATAPI_DEVICE) && 
+        ((ATAcontrolRegValue & MV_ATA_READY_STATUS) != MV_ATA_READY_STATUS))
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d:  storage drive is not"
+                 " ready, ATA STATUS=0x%02x\n",
+                 pSataChannel->mvSataAdapter->adapterId,
+                 pSataChannel->channelNumber, ATAcontrolRegValue);
+        return MV_FALSE;
+    }
+    /* The device is ready for PIO commands */
+    return MV_TRUE;
+}
+
+MV_BOOLEAN mvStorageDevATAIdleImmediate(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex)
+{
+    MV_SATA_CHANNEL *pSataChannel;
+    MV_BUS_ADDR_T ioBaseAddr;
+    MV_U32  eDmaRegsOffset;
+
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    :  mvStorageDevATAIdentif"
+                 "yDevice failed, Bad adapter data structure pointer\n");
+        return MV_FALSE;
+    }
+    pSataChannel = pAdapter->sataChannel[channelIndex];
+    if (pSataChannel == NULL)
+    {     /* If the pointer do not exists, retrun false */
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d:  channel data "
+                 "structure is not allocated\n", pAdapter->adapterId,
+                 channelIndex);
+        return MV_FALSE;
+    }
+
+    ioBaseAddr =pSataChannel->mvSataAdapter->adapterIoBaseAddress;
+
+    mvOsSemTake(&pSataChannel->semaphore);
+    eDmaRegsOffset = pSataChannel->eDmaRegsOffset;
+
+    if (pSataChannel->queueCommandsEnabled == MV_TRUE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d:  mvStorageDevATAIdle"
+                 "Immediate command failed: EDMA is active\n",
+                 pSataChannel->mvSataAdapter->adapterId,
+                 pSataChannel->channelNumber);
+        mvOsSemRelease( &pSataChannel->semaphore);
+        return MV_FALSE;
+    }
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "Issue IDLE IMMEDIATE COMMAND\n");
+    disableStorageDevInterrupt(pSataChannel);
+    MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset + MV_ATA_DEVICE_COMMAND_REG_OFFSET,
+                      MV_ATA_COMMAND_IDLE_IMMEDIATE);
+
+    if (waitWhileStorageDevIsBusy(pAdapter,
+                                  ioBaseAddr, eDmaRegsOffset, 10000, 100) == MV_FALSE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d:  Idle Immediate failed\n",
+                 pSataChannel->mvSataAdapter->adapterId, pSataChannel->channelNumber);
+
+        enableStorageDevInterrupt(pSataChannel);
+        mvOsSemRelease( &pSataChannel->semaphore);
+        return MV_FALSE;
+    }
+
+    enableStorageDevInterrupt(pSataChannel);
+    mvOsSemRelease( &pSataChannel->semaphore);
+    return MV_TRUE;
+}
+
+/*******************************************************************************
+* mvStorageDevATAIdentifyDevice - Perform an ATA IDENTIFY device command.
+*
+* DESCRIPTION:
+*       This function issues an IDENTIFY command to the connected device, and
+*       stores all the information in the identifyDevice buffer of the channel.
+*
+* INPUT:
+*       pAdapter     - Pointer to the device data structure.
+*       channelIndex - The index of the channel where the storage device
+*                      connected to.
+*       PMPort       - index of the required destination port multipliers
+*                      device Port (0 if no PM available).
+*       identifyDeviceResult - a buffer that is allocated by IAL that will hold
+*                              the IDENTIFY DEIVICE command result.
+*
+* RETURN:
+*       MV_TRUE on success, MV_FALSE on failure.
+*
+* COMMENTS:
+*       None.
+*
+*******************************************************************************/
+MV_BOOLEAN mvStorageDevATAIdentifyDevice(MV_SATA_ADAPTER *pAdapter,
+                                         MV_U8 channelIndex,
+                                         MV_U8 PMPort,
+                                         MV_U16_PTR  identifyDeviceResult
+                                        )
+{
+    MV_BOOLEAN result;
+    /* Get the pointer to the relevant channel. */
+    MV_SATA_CHANNEL *pSataChannel;
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    :  mvStorageDevATAIdentif"
+                 "yDevice failed, Bad adapter data structure pointer\n");
+        return MV_FALSE;
+    }
+    pSataChannel = pAdapter->sataChannel[channelIndex];
+    if (pSataChannel == NULL)
+    {     /* If the pointer do not exists, retrun false */
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d:  channel data "
+                 "structure is not allocated\n", pAdapter->adapterId,
+                 channelIndex);
+        return MV_FALSE;
+    }
+    if (identifyDeviceResult == NULL)
+    {     /* If the pointer do not exists, retrun false */
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d:  identify data buffer"
+                 " is not allocated\n", pAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+    }
+    result = mvStorageDevATAExecuteNonUDMACommand(pAdapter, channelIndex,
+                                                  PMPort,
+                                                  MV_NON_UDMA_PROTOCOL_PIO_DATA_IN,
+                                                  MV_FALSE,
+                                                  /* pBuffer */
+                                                  identifyDeviceResult,
+                                                  256,     /* count       */
+                                                  0,       /* features    */
+                                                  0,       /* sectorCount */
+                                                  0,       /* lbaLow      */
+                                                  0,       /* lbaMid      */
+                                                  0,       /* lbaHigh     */
+                                                  0,       /* device      */
+                                                  /* The command */
+                                                  MV_ATA_COMMAND_IDENTIFY);
+    if (result == MV_FALSE)
+    {
+        return MV_FALSE;
+    }
+    if (identifyDeviceResult[IDEN_ATA_VERSION] & (MV_BIT7 | MV_BIT6 | MV_BIT5))
+    {
+        /* if ATA 5/6/7 then check CRC of Identify command result */
+        MV_U8 crc = 0;
+        MV_U16 count;
+        MV_U8_PTR pointer = (MV_U8_PTR)identifyDeviceResult;
+        /* If no 0xa5 signature valid, then don't check CRC */
+        if (pointer[510] != 0xa5)
+        {
+            return MV_TRUE;
+        }
+        for (count = 0 ; count < ATA_SECTOR_SIZE ; count ++)
+        {
+            crc += pointer[count];
+        }
+        if (crc != 0)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d:  IDENTIFY DEVICE "
+                     "ATA Command failed due to wrong CRC checksum (%02x)\n",
+                     pAdapter->adapterId, channelIndex,crc);
+            return MV_FALSE;
+        }
+
+    }
+    return MV_TRUE;
+}
+
+/*******************************************************************************
+* mvStorageDevATASoftResetDevice - Issue SATA SOFTWARE reset to device.
+*
+* DESCRIPTION:
+*       Perform SOFTWARE RESET to the connected storage device by setting the
+*       SRST bit of the ATA device COMMAND
+*
+* INPUT:
+*       pAdapter     - Pointer to the device data structure.
+*       channelIndex - Index of the required channel.
+*       PMPort       - index of the required destination port multipliers
+*                      device port (0 if no PM available).
+*       registerStruct - Pointer to ATA registers data structure
+*
+* RETURN:
+*       MV_TRUE on success, MV_FALSE otherwise.
+*
+* COMMENTS:
+*       NONE
+*
+*******************************************************************************/
+MV_BOOLEAN mvStorageDevATASoftResetDevice(MV_SATA_ADAPTER *pAdapter,
+                                          MV_U8 channelIndex,
+                                          MV_U8 PMPort,
+                                          MV_STORAGE_DEVICE_REGISTERS *registerStruct
+                                         )
+{
+    MV_SATA_CHANNEL *pSataChannel;
+    MV_BUS_ADDR_T   ioBaseAddr;
+    MV_U32          eDmaRegsOffset;
+    MV_BOOLEAN      result;
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    :  mvStorageDevATASoftRes"
+                 "etDevice Failed, Bad adapter data structure pointer\n");
+        return MV_FALSE;
+    }
+    pSataChannel = pAdapter->sataChannel[channelIndex];
+    ioBaseAddr = pAdapter->adapterIoBaseAddress;
+    if (pSataChannel == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d:  channel data structu"
+                 "re is not allocated\n", pAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+    }
+
+    mvOsSemTake(&pSataChannel->semaphore);
+    eDmaRegsOffset = pSataChannel->eDmaRegsOffset;
+
+    if (pSataChannel->queueCommandsEnabled == MV_TRUE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d:  mvStorageDevATASoft"
+                 "ResetDevice command failed: EDMA is active\n",
+                 pSataChannel->mvSataAdapter->adapterId,
+                 pSataChannel->channelNumber);
+        mvOsSemRelease( &pSataChannel->semaphore);
+        return MV_FALSE;
+    }
+    _setActivePMPort(pSataChannel, PMPort);
+    result = _doSoftReset(pSataChannel);
+    if (registerStruct)
+    {
+        dumpAtaDeviceRegisters(pAdapter, channelIndex, MV_FALSE,
+                               registerStruct);
+    }
+    mvOsSemRelease( &pSataChannel->semaphore);
+    return result;
+}
+
+
+
+void _startSoftResetDevice(MV_SATA_CHANNEL *pSataChannel)
+{
+    MV_BUS_ADDR_T   ioBaseAddr =
+    pSataChannel->mvSataAdapter->adapterIoBaseAddress;
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_NON_UDMA_COMMAND | MV_DEBUG, "Issue SRST COMMAND\n");
+
+/* Write to the Device Control register, bits 1,2:                      */
+/* - bit 1 (nIEN): is the enable bit for the device assertion of INTRQ  */
+/*   to the host. When the nIEN bit is set to one, or the device is not */
+/*   selected, the device shall release the INTRQ signal.               */
+/* - bit 2 (SRST): is the host software reset bit.                      */
+    MV_REG_WRITE_BYTE(ioBaseAddr, pSataChannel->eDmaRegsOffset +
+                      MV_ATA_DEVICE_CONTROL_REG_OFFSET, MV_BIT2|MV_BIT1);
+    MV_REG_READ_BYTE(ioBaseAddr, pSataChannel->eDmaRegsOffset +
+                     MV_ATA_DEVICE_CONTROL_REG_OFFSET);
+    mvMicroSecondsDelay(pSataChannel->mvSataAdapter, 10);
+    /* enableStorageDevInterrupt will clear the SRST bit*/
+    enableStorageDevInterrupt(pSataChannel);
+}
+
+MV_BOOLEAN _isDeviceBsyBitOff(MV_SATA_CHANNEL *pSataChannel)
+{
+    MV_BUS_ADDR_T   ioBaseAddr =
+    pSataChannel->mvSataAdapter->adapterIoBaseAddress;
+    MV_U8           ATAstatus;
+    MV_U32          eDmaRegsOffset = pSataChannel->eDmaRegsOffset;
+
+    ATAstatus = MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset +
+                                 MV_ATA_DEVICE_STATUS_REG_OFFSET);
+    if ((ATAstatus & MV_ATA_BUSY_STATUS) == 0)
+    {
+        return MV_TRUE;
+    }
+    else
+    {
+#ifdef MV_LOGGER
+        if (pSataChannel->mvSataAdapter->sataAdapterGeneration >=
+            MV_SATA_GEN_II)
+        {
+            MV_U32 ifStatus = MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset +
+                                               MV_SATA_II_IF_STATUS_REG_OFFSET);
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG,
+                     "[%d %d] SATA interface status register = 0x%X\n",
+                     pSataChannel->mvSataAdapter->adapterId,
+                     pSataChannel->channelNumber,
+                     ifStatus);
+        }
+#endif
+        return MV_FALSE;
+    }
+}
+
+
+/*******************************************************************************
+* mvStorageDevATAStartSoftResetDevice -
+*                   begins device software reset
+*
+* DESCRIPTION:
+*
+*   Submits SRST for channel connected device and exit. The IAL must call the
+*   mvStorageIsDeviceBsyBitOff later on to check whether the device is
+*   ready
+*
+* INPUT:
+*       pAdapter    - pointer to the adapter data structure.
+*       channelIndex - channel number
+*       PMPort      - port multiplier port
+*
+* OUTPUT:
+*       None
+* RETURN:
+*       MV_TRUE on success,
+*       MV_FALSE otherwise.
+* COMMENTS:
+*
+*******************************************************************************/
+MV_BOOLEAN mvStorageDevATAStartSoftResetDevice(MV_SATA_ADAPTER *pAdapter,
+                                               MV_U8 channelIndex,
+                                               MV_U8 PMPort
+                                              )
+{
+    MV_SATA_CHANNEL *pSataChannel;
+    MV_BUS_ADDR_T   ioBaseAddr;
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    :  mvStorageDevATASoftRes"
+                 "etDevice Failed, Bad adapter data structure pointer\n");
+        return MV_FALSE;
+    }
+    pSataChannel = pAdapter->sataChannel[channelIndex];
+    ioBaseAddr = pAdapter->adapterIoBaseAddress;
+    if (pSataChannel == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d:  channel data structu"
+                 "re is not allocated\n", pAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+    }
+
+    mvOsSemTake(&pSataChannel->semaphore);
+    if (pSataChannel->queueCommandsEnabled == MV_TRUE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d:  mvStorageDevATASoft"
+                 "ResetDevice command failed: EDMA is active\n",
+                 pSataChannel->mvSataAdapter->adapterId,
+                 pSataChannel->channelNumber);
+        mvOsSemRelease( &pSataChannel->semaphore);
+        return MV_FALSE;
+    }
+    _setActivePMPort(pSataChannel, PMPort);
+    _startSoftResetDevice(pSataChannel);
+    mvOsSemRelease( &pSataChannel->semaphore);
+    return MV_TRUE;
+}
+
+/*******************************************************************************
+* mvStorageIsDeviceBsyBitOff -
+*                    check if device is BUSY bit cleared after SRST
+*
+* DESCRIPTION:
+*
+*   Checks the if BSY bit in ATA status is on/off
+*
+* INPUT:
+*       pAdapter    - pointer to the adapter data structure.
+*       channelIndex - channel number
+*       registerStruct - If non-zero then this function dumps ATA registers
+*                        to this data structure before exit.
+*
+* OUTPUT:
+*       None
+* RETURN:
+*       MV_TRUE if BSY bit is off
+*       MV_FALSE if BSY bit is on (or on failure)
+* COMMENTS:
+*
+*******************************************************************************/
+MV_BOOLEAN mvStorageIsDeviceBsyBitOff(MV_SATA_ADAPTER *pAdapter,
+                                      MV_U8 channelIndex,
+                                      MV_STORAGE_DEVICE_REGISTERS *registerStruct
+                                     )
+{
+    MV_SATA_CHANNEL *pSataChannel;
+    MV_BUS_ADDR_T   ioBaseAddr;
+    MV_BOOLEAN      result;
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    :  mvStorageDevATASoftRes"
+                 "etDevice Failed, Bad adapter data structure pointer\n");
+        return MV_FALSE;
+    }
+    pSataChannel = pAdapter->sataChannel[channelIndex];
+    ioBaseAddr = pAdapter->adapterIoBaseAddress;
+    if (pSataChannel == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d:  channel data structu"
+                 "re is not allocated\n", pAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+    }
+    mvOsSemTake(&pSataChannel->semaphore);
+    result = _isDeviceBsyBitOff(pSataChannel);
+    if (registerStruct)
+    {
+        dumpAtaDeviceRegisters(pAdapter, channelIndex, MV_FALSE,
+                               registerStruct);
+    }
+    mvOsSemRelease( &pSataChannel->semaphore);
+    return result;
+}
+
+
+/*******************************************************************************
+* mvStorageDevATASetFeatures - Perform ATA SET FEATURES command.
+*
+* DESCRIPTION:
+*       Perform ATA SET FEATURES command to the ATA device connected to the
+*       given channel. This command is used by the host to establish parameters
+*       that affect the execution of certain device features (Table 44 in the
+*       ATA protocol document defines these features).
+*
+* INPUT:
+*       pAdapter            - Pointer to the device data structure.
+*       channelIndex        - Index of the required channel
+*       PMPort              - index of the required destination port multipliers
+*                             device Port (0 if no PM available).
+*       subCommand          - Sub command for the SET FEATURES ATA command
+*       subCommandSpecific1 - First parameter to the sub command.
+*       subCommandSpecific2 - Second parameter to the sub command.
+*       subCommandSpecific3 - Third parameter to the sub command.
+*       subCommandSpecific4 - Fourth parameter to the sub command.
+*
+* RETURN:
+*       MV_TRUE on success, MV_FALSE otherwise.
+* COMMENTS:
+*       NONE
+*
+*******************************************************************************/
+MV_BOOLEAN mvStorageDevATASetFeatures(MV_SATA_ADAPTER *pAdapter,
+                                      MV_U8 channelIndex,
+                                      MV_U8   PMPort,
+                                      MV_U8 subCommand,
+                                      MV_U8 subCommandSpecific1,
+                                      MV_U8 subCommandSpecific2,
+                                      MV_U8 subCommandSpecific3,
+                                      MV_U8 subCommandSpecific4)
+{
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG|MV_DEBUG_NON_UDMA_COMMAND,
+             "ATA Set Features: %x , %x , %x , %x , %x\n", subCommand,
+             subCommandSpecific1, subCommandSpecific2, subCommandSpecific3,
+             subCommandSpecific4);
+    return mvStorageDevATAExecuteNonUDMACommand(pAdapter, channelIndex,
+                                                PMPort,
+                                                MV_NON_UDMA_PROTOCOL_NON_DATA,
+                                                MV_FALSE,
+                                                NULL,    /* pBuffer*/
+                                                0,       /* count  */
+                                                subCommand,     /*features*/
+                                                /* sectorCount */
+                                                subCommandSpecific1,
+                                                subCommandSpecific2,    /* lbaLow */
+                                                subCommandSpecific3,    /* lbaMid */
+                                                /* lbaHigh */
+                                                subCommandSpecific4,
+                                                0,      /* device */
+                                                /* command */
+                                                MV_ATA_COMMAND_SET_FEATURES);
+}
+
+
+/*******************************************************************************
+* mvStorageDevATAExecuteNonUdmaCommand - perform ATA non udma command.
+*
+* DESCRIPTION:
+*       perform ATA non UDMA command to the ATA device connected to the given
+*       channel
+*
+* INPUT:
+*   pAdapter    - pointer to the device data structure.
+*   channelIndex    - index of the required channel
+*   PMPort          - index of the required destination port multipliers
+*                     device Port (0 if no PM available).
+*   protocolType    - protocol type of the command
+*   isEXT   - true when the given command is the EXTENDED
+*   bufPtr  - pointer to the buffer to write/read to/from
+*   count   - number of words to transfer
+*   features    - the value to be written to the FEATURES register
+*   sectorCount - the value to be written to the SECTOR COUNT register
+*   lbaLow  - the value to be written to the LBA LOW register
+*   lbaMid  - the value to be written to the LBA MID register
+*   lbaHigh - the value to be written to the LBA HIGH register
+*   device  - the value to be written to the DEVICE register
+*   command - the value to be written to the COMMAND register
+*
+* RETURN:
+*   MV_TRUE on success, MV_FALSE otherwise.
+* COMMENTS:
+*       when the command is EXTENDED, then the high 8 bits of the 16 bits values
+*   will be written first, so they should hold the previous value as defined in
+*   the ATA 6 standard
+*
+*******************************************************************************/
+MV_BOOLEAN mvStorageDevATAExecuteNonUDMACommand(MV_SATA_ADAPTER *pAdapter,
+                                                MV_U8 channelIndex,
+                                                MV_U8 PMPort,
+                                                MV_NON_UDMA_PROTOCOL protocolType,
+                                                MV_BOOLEAN  isEXT,
+                                                MV_U16_PTR bufPtr, MV_U32 count,
+                                                MV_U16 features,
+                                                MV_U16 sectorCount,
+                                                MV_U16 lbaLow, MV_U16 lbaMid,
+                                                MV_U16 lbaHigh, MV_U8 device,
+                                                MV_U8 command)
+{
+    MV_BOOLEAN result;
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    :  mvStorageDevATAExecute"
+                 "NonUDMACommand Failed, Bad adapter data structure pointer\n");
+        return MV_FALSE;
+    }
+    if (pAdapter->sataChannel[channelIndex] == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d:  mvStorageDevATAExecu"
+                 "teNonUDMACommand Failed, channel data structure not allocated"
+                 "\n",
+                 pAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+    }
+    mvOsSemTake(&pAdapter->sataChannel[channelIndex]->semaphore);
+    result = executeNonUDMACommand(pAdapter, channelIndex, PMPort, protocolType,
+                                   isEXT, bufPtr, count, features, sectorCount,
+                                   lbaLow, lbaMid, lbaHigh, device, command);
+    mvOsSemRelease(&pAdapter->sataChannel[channelIndex]->semaphore);
+    return result;
+}
+#if 0
+MV_BOOLEAN executePacketCommand(MV_SATA_ADAPTER *pAdapter,
+                                 MV_U8 channelIndex,
+                                 MV_NON_UDMA_PROTOCOL   protocolType, 
+                                 MV_U8  PMPort,
+                                 MV_U16_PTR cdb,
+                                MV_U8   cdb_len,
+                                 MV_U16_PTR dataBufPtr
+                                 )
+{
+    MV_SATA_CHANNEL *pSataChannel = pAdapter->sataChannel[channelIndex];
+    MV_BUS_ADDR_T   ioBaseAddr = pAdapter->adapterIoBaseAddress;
+    MV_U32          eDmaRegsOffset;
+    MV_U32          i;
+    MV_U32          count;
+    MV_U8           ATAstatus;
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG|MV_DEBUG_NON_UDMA_COMMAND, " %d %d send PACKET "
+             " command: protocol(%d) cdb %p cdb len %p buffer %p \n", pAdapter->adapterId,
+             channelIndex, protocolType, cdb, cdb_len, dataBufPtr);
+
+    eDmaRegsOffset = pSataChannel->eDmaRegsOffset;
+    if ((PMPort) && ((pSataChannel->PMSupported == MV_FALSE) ||
+                     (pSataChannel->deviceType != MV_SATA_DEVICE_TYPE_PM)))
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d:  executePacketCommand"
+                 " failed PM not supported for this channel\n",
+                 pSataChannel->mvSataAdapter->adapterId,
+                 pSataChannel->channelNumber);
+        mvOsSemRelease( &pSataChannel->semaphore);
+        return MV_FALSE;
+    }
+    {
+        if (isStorageDevReadyForPIO(pSataChannel) == MV_FALSE)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                     " %d %d : Error in Issue NON UDMA command:"
+                     " isStorageDevReadyForPIO failed\n",
+                     pAdapter->adapterId, channelIndex);
+
+            return MV_FALSE;
+        }
+    }
+    _setActivePMPort(pSataChannel, PMPort);
+    if (pSataChannel->queueCommandsEnabled == MV_TRUE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d:  PIO command failed:"
+                 "EDMA is active\n", pSataChannel->mvSataAdapter->adapterId,
+                 pSataChannel->channelNumber);
+        return MV_FALSE;
+    }
+
+    if (pAdapter->sataAdapterGeneration == MV_SATA_GEN_I)
+    {
+        disableStorageDevInterrupt(pSataChannel);
+    }
+
+
+    MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                      MV_ATA_DEVICE_FEATURES_REG_OFFSET, 0);
+
+    MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                      MV_ATA_DEVICE_SECTOR_COUNT_REG_OFFSET, 0);
+
+
+    MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                      MV_ATA_DEVICE_LBA_LOW_REG_OFFSET, 0);
+
+
+    MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                      MV_ATA_DEVICE_LBA_MID_REG_OFFSET,  0);
+
+    MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                      MV_ATA_DEVICE_LBA_HIGH_REG_OFFSET, 0x20);
+
+    MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                      MV_ATA_DEVICE_HEAD_REG_OFFSET, 0);
+    MV_CPU_WRITE_BUFFER_FLUSH();
+
+    /* 88SX60X1 FEr SATA #16 */
+    if (pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II)
+    {
+        enableStorageDevInterrupt(pSataChannel);
+    }
+
+    MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                      MV_ATA_DEVICE_COMMAND_REG_OFFSET,MV_ATA_COMMAND_PACKET );
+
+    /* Wait for PIO Setup or completion*/
+    if (waitWhileStorageDevIsBusy(pAdapter, ioBaseAddr, eDmaRegsOffset, 3100, 10000) ==
+        MV_FALSE)
+    {
+        enableStorageDevInterrupt(pSataChannel);
+        return MV_FALSE;
+    }
+    if (protocolType == MV_NON_UDMA_PROTOCOL_PACKET_PIO_NON_DATA)
+    {
+        enableStorageDevInterrupt(pSataChannel);
+        pSataChannel->recoveredErrorsCounter = 0;
+        return MV_TRUE;
+    }
+    
+
+    /* Check the status register on DATA request commands */
+    ATAstatus = MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset +
+                                 MV_ATA_DEVICE_STATUS_REG_OFFSET);
+    if (pAdapter->sataAdapterGeneration == MV_SATA_GEN_I)
+    {
+        if (!(ATAstatus & MV_ATA_DATA_REQUEST_STATUS))
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: DRQ bit in ATA STATUS"
+                     " register is not set\n", pAdapter->adapterId, channelIndex);
+            enableStorageDevInterrupt(pSataChannel);
+            return MV_FALSE;
+        }
+    }
+    if (pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II)
+    {
+
+        if (waitForDRQ(pAdapter, ioBaseAddr, eDmaRegsOffset, 500, 10000)
+            == MV_FALSE)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: DRQ bit in ATA STATUS"
+                     " register is not set\n", pAdapter->adapterId, channelIndex);
+            enableStorageDevInterrupt(pSataChannel);
+            return MV_FALSE;
+        }
+    }
+    for (i = 0; i < cdb_len; i++)
+    {
+            MV_REG_WRITE_WORD(ioBaseAddr, eDmaRegsOffset +
+                              MV_ATA_DEVICE_PIO_DATA_REG_OFFSET, cdb[i]);
+            MV_CPU_WRITE_BUFFER_FLUSH();
+    }
+
+    if (waitForDRQ(pAdapter, ioBaseAddr, eDmaRegsOffset, 500, 10000)
+          == MV_FALSE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: DRQ bit in ATA STATUS"
+                     " register is not set\n", pAdapter->adapterId, channelIndex);
+        enableStorageDevInterrupt(pSataChannel);
+        return MV_FALSE;
+    }
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " Status: %x\n", 
+        MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset + MV_ATA_DEVICE_STATUS_REG_OFFSET));
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " Sector Count: %x\n", 
+        MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset + MV_ATA_DEVICE_SECTOR_COUNT_REG_OFFSET));
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " LBA Mid: %x\n", 
+        MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset + MV_ATA_DEVICE_LBA_MID_REG_OFFSET));
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " LBA High: %x\n", 
+        MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset + MV_ATA_DEVICE_LBA_HIGH_REG_OFFSET));
+    
+    count =  MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset + MV_ATA_DEVICE_LBA_MID_REG_OFFSET) + 
+            (MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset + MV_ATA_DEVICE_LBA_HIGH_REG_OFFSET) << 8);
+    count >>= 1;
+    for ( i = 0 ; i < count; i++)
+    {
+        if(protocolType == MV_NON_UDMA_PROTOCOL_PACKET_PIO_DATA_IN)
+        {
+            dataBufPtr[i] = MV_REG_READ_WORD(ioBaseAddr, eDmaRegsOffset +
+                              MV_ATA_DEVICE_PIO_DATA_REG_OFFSET);
+        }
+        else
+        {
+           MV_REG_WRITE_WORD(ioBaseAddr, eDmaRegsOffset +
+                              MV_ATA_DEVICE_PIO_DATA_REG_OFFSET, dataBufPtr[i]);
+ 
+        }
+    }
+    
+    /* Wait for the storage device to be available */
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " %d %d: on non-UDMA sequence - checking if"
+             " device is has finished the command\n",
+             pAdapter->adapterId, channelIndex);
+
+    if (waitWhileStorageDevIsBusy(pAdapter,
+                                  ioBaseAddr, eDmaRegsOffset, 50000, 100) ==
+        MV_FALSE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " Status: %x\n", 
+            MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset + MV_ATA_DEVICE_STATUS_REG_OFFSET));
+        
+        enableStorageDevInterrupt(pSataChannel);
+        return MV_FALSE;
+    }
+
+    if (pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II)
+    {
+
+        if (waitForDRQToClear(pAdapter, ioBaseAddr, eDmaRegsOffset, 50000, 100)
+            == MV_FALSE)
+        {
+            enableStorageDevInterrupt(pSataChannel);
+            return MV_FALSE;
+        }
+    }
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " %d %d: Finish NonUdma Command. Status=0x%02x"
+             "\n", pAdapter->adapterId, channelIndex,
+             MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset +
+                              MV_ATA_DEVICE_STATUS_REG_OFFSET));
+    enableStorageDevInterrupt(pSataChannel);
+    pSataChannel->recoveredErrorsCounter = 0;
+    return MV_TRUE;
+}
+#endif /* 0 */
+MV_BOOLEAN executeNonUDMACommand(MV_SATA_ADAPTER *pAdapter,
+                                 MV_U8 channelIndex,
+                                 MV_U8  PMPort,
+                                 MV_NON_UDMA_PROTOCOL protocolType,
+                                 MV_BOOLEAN  isEXT,
+                                 MV_U16_PTR bufPtr, MV_U32 count,
+                                 MV_U16 features,
+                                 MV_U16 sectorCount,
+                                 MV_U16 lbaLow, MV_U16 lbaMid,
+                                 MV_U16 lbaHigh, MV_U8 device,
+                                 MV_U8 command)
+{
+    MV_SATA_CHANNEL *pSataChannel = pAdapter->sataChannel[channelIndex];
+    MV_BUS_ADDR_T   ioBaseAddr = pAdapter->adapterIoBaseAddress;
+    MV_U32          eDmaRegsOffset;
+    MV_U32          i;
+    MV_U8           ATAstatus;
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG|MV_DEBUG_NON_UDMA_COMMAND, " %d %d Issue NON "
+             "UDMA command: protocol(%d) %p , %x , %x , %x , %x.%x.%x %x "
+             "command=%x\n", pAdapter->adapterId, channelIndex, protocolType,
+             bufPtr, count, features, sectorCount, lbaLow, lbaMid,
+             lbaHigh, device, command);
+
+    eDmaRegsOffset = pSataChannel->eDmaRegsOffset;
+    if ((PMPort) && ((pSataChannel->PMSupported == MV_FALSE) ||
+                     (pSataChannel->deviceType != MV_SATA_DEVICE_TYPE_PM)))
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d:  executeNonUDMACommand"
+                 " failed PM not supported for this channel\n",
+                 pSataChannel->mvSataAdapter->adapterId,
+                 pSataChannel->channelNumber);
+        mvOsSemRelease( &pSataChannel->semaphore);
+        return MV_FALSE;
+    }
+    if (command != MV_ATA_COMMAND_PM_READ_REG &&
+        command != MV_ATA_COMMAND_PM_WRITE_REG)
+    {
+        if (isStorageDevReadyForPIO(pSataChannel) == MV_FALSE)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                     " %d %d : Error in Issue NON UDMA command:"
+                     " isStorageDevReadyForPIO failed\n",
+                     pAdapter->adapterId, channelIndex);
+
+            return MV_FALSE;
+        }
+    }
+    _setActivePMPort(pSataChannel, PMPort);
+    if (pSataChannel->queueCommandsEnabled == MV_TRUE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d:  PIO command failed:"
+                 "EDMA is active\n", pSataChannel->mvSataAdapter->adapterId,
+                 pSataChannel->channelNumber);
+        return MV_FALSE;
+    }
+
+    if (pAdapter->sataAdapterGeneration == MV_SATA_GEN_I)
+    {
+        disableStorageDevInterrupt(pSataChannel);
+    }
+
+    if (isEXT == MV_TRUE)
+    {
+        MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                          MV_ATA_DEVICE_FEATURES_REG_OFFSET,
+                          (features & 0xff00) >> 8);
+        MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                          MV_ATA_DEVICE_SECTOR_COUNT_REG_OFFSET,
+                          (sectorCount & 0xff00) >> 8);
+        MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                          MV_ATA_DEVICE_LBA_LOW_REG_OFFSET,
+                          (lbaLow & 0xff00) >> 8);
+        MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                          MV_ATA_DEVICE_LBA_MID_REG_OFFSET,
+                          (lbaMid & 0xff00) >> 8);
+        MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                          MV_ATA_DEVICE_LBA_HIGH_REG_OFFSET,
+                          (lbaHigh & 0xff00) >> 8);
+    }
+    else
+    {
+        if ((features & 0xff00) || (sectorCount & 0xff00) || (lbaLow & 0xff00) ||
+            (lbaMid & 0xff00) || (lbaHigh & 0xff00))
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                     " %d %d : Error in Issue NON UDMA command:"
+                     " bits[15:8] of register values should be reserved"
+                     " Features 0x%02x, SectorCount 0x%02x, LBA Low 0x%02x,"
+                     " LBA Mid 0x%02x, LBA High 0x%02x\n",
+                     pAdapter->adapterId, channelIndex, features,
+                     sectorCount, lbaLow, lbaMid, lbaHigh);
+            enableStorageDevInterrupt(pSataChannel);
+            return MV_FALSE;
+        }
+    }
+
+    MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                      MV_ATA_DEVICE_FEATURES_REG_OFFSET, features & 0xff);
+
+    MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                      MV_ATA_DEVICE_SECTOR_COUNT_REG_OFFSET, sectorCount & 0xff);
+
+
+    MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                      MV_ATA_DEVICE_LBA_LOW_REG_OFFSET, lbaLow & 0xff);
+
+
+    MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                      MV_ATA_DEVICE_LBA_MID_REG_OFFSET, lbaMid & 0xff);
+
+    MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                      MV_ATA_DEVICE_LBA_HIGH_REG_OFFSET, lbaHigh & 0xff);
+
+    MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                      MV_ATA_DEVICE_HEAD_REG_OFFSET, device);
+    MV_CPU_WRITE_BUFFER_FLUSH();
+
+    /* 88SX60X1 FEr SATA #16 */
+    /* 88SX6042/88SX7042 FEr SATA #16 */
+    /* 88F5182 FEr #SATA-S11 */
+    if (pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II)
+    {
+        enableStorageDevInterrupt(pSataChannel);
+    }
+
+    MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                      MV_ATA_DEVICE_COMMAND_REG_OFFSET, command);
+
+    if (protocolType == MV_NON_UDMA_PROTOCOL_NON_DATA)
+    {
+        /* Wait for the command to complete */
+        if (waitWhileStorageDevIsBusy(pAdapter, ioBaseAddr, eDmaRegsOffset, 3100, 10000) ==
+            MV_FALSE)
+        {
+            enableStorageDevInterrupt(pSataChannel);
+            return MV_FALSE;
+        }
+        enableStorageDevInterrupt(pSataChannel);
+        pSataChannel->recoveredErrorsCounter = 0;
+        return MV_TRUE;
+    }
+    /* Wait for the command to complete */
+    if (waitWhileStorageDevIsBusy(pAdapter, ioBaseAddr, eDmaRegsOffset, 3100, 10000) ==
+        MV_FALSE)
+    {
+        enableStorageDevInterrupt(pSataChannel);
+        return MV_FALSE;
+    }
+    /* Check the status register on DATA request commands */
+    ATAstatus = MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset +
+                                 MV_ATA_DEVICE_STATUS_REG_OFFSET);
+    if (pAdapter->sataAdapterGeneration == MV_SATA_GEN_I)
+    {
+        if (!(ATAstatus & MV_ATA_DATA_REQUEST_STATUS))
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: DRQ bit in ATA STATUS"
+                     " register is not set\n", pAdapter->adapterId, channelIndex);
+            enableStorageDevInterrupt(pSataChannel);
+            return MV_FALSE;
+        }
+    }
+    if (pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II)
+    {
+
+        if (waitForDRQ(pAdapter, ioBaseAddr, eDmaRegsOffset, 500, 10000)
+            == MV_FALSE)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: DRQ bit in ATA STATUS"
+                     " register is not set\n", pAdapter->adapterId, channelIndex);
+            enableStorageDevInterrupt(pSataChannel);
+            return MV_FALSE;
+        }
+    }
+    for (i = 0; i < count; i++)
+    {
+        /* Every DRQ data block we have to check the BUSY bit to verify that
+           the Disk is ready for next block transfer  */
+        if ((i & (((MV_U32)pSataChannel->DRQDataBlockSize * ATA_SECTOR_SIZE_IN_WORDS) - 1)) == 0)
+        {
+            if (pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II)
+            {
+                /* Perform a dummy read */
+                MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset +
+                                 MV_ATA_DEVICE_ALTERNATE_REG_OFFSET);
+                /* 88SX60X1 FEr SATA #16 */
+                /* 88SX6042/88SX7042 FEr SATA #16 */
+                /* 88F5182 FEr #SATA-S11 */
+                if (i != 0)
+                {
+                    if (waitWhileStorageDevIsBusy_88SX60X1(pAdapter,
+                                                                                  ioBaseAddr, eDmaRegsOffset, channelIndex,
+                                                                                  50000, 100) == MV_FALSE)
+                    {
+                        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                                 "Sata device interrupt timeout...i = %d\n",i);
+                        enableStorageDevInterrupt(pSataChannel);
+                        return MV_FALSE;
+                    }
+                }
+                else
+                {
+                    MV_U8 sataUnit = channelIndex >> 2,portNum = channelIndex & 3;
+
+                    if (waitWhileStorageDevIsBusy(pAdapter,ioBaseAddr,
+                                                  eDmaRegsOffset, 50000, 100) == MV_FALSE)
+                    {
+                        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                                 "Busy bit timeout...i = %d\n",i);
+                        enableStorageDevInterrupt(pSataChannel);
+                        return MV_FALSE;
+                    }
+                    MV_REG_WRITE_DWORD (ioBaseAddr, MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                                        MV_SATAHC_INTERRUPT_CAUSE_REG_OFFSET,
+                                        ~(1 << (8 + portNum)));
+                }
+                if (waitForDRQ(pAdapter, ioBaseAddr, eDmaRegsOffset, 50000, 100)
+                    == MV_FALSE)
+                {
+                    enableStorageDevInterrupt(pSataChannel);
+                    return MV_FALSE;
+                }
+            }
+            else if (pAdapter->sataAdapterGeneration == MV_SATA_GEN_I)
+            {
+                if (waitWhileStorageDevIsBusy(pAdapter,
+                                              ioBaseAddr, eDmaRegsOffset,
+                                              50000, 100) == MV_FALSE)
+                {
+                    enableStorageDevInterrupt(pSataChannel);
+                    return MV_FALSE;
+                }
+            }
+        }
+        if (protocolType == MV_NON_UDMA_PROTOCOL_PIO_DATA_IN)
+        {
+            bufPtr[i] = MV_REG_READ_WORD(ioBaseAddr, eDmaRegsOffset +
+                                         MV_ATA_DEVICE_PIO_DATA_REG_OFFSET);
+        }
+        else
+        {
+            MV_REG_WRITE_WORD(ioBaseAddr, eDmaRegsOffset +
+                              MV_ATA_DEVICE_PIO_DATA_REG_OFFSET, bufPtr[i]);
+            MV_CPU_WRITE_BUFFER_FLUSH();
+        }
+    }
+
+
+    /* Wait for the storage device to be available */
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " %d %d: on non-UDMA sequence - checking if"
+             " device is has finished the command\n",
+             pAdapter->adapterId, channelIndex);
+
+    if (waitWhileStorageDevIsBusy(pAdapter,
+                                  ioBaseAddr, eDmaRegsOffset, 50000, 100) ==
+        MV_FALSE)
+    {
+        enableStorageDevInterrupt(pSataChannel);
+        return MV_FALSE;
+    }
+
+    if (pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II)
+    {
+
+        if (waitForDRQToClear(pAdapter, ioBaseAddr, eDmaRegsOffset, 50000, 100)
+            == MV_FALSE)
+        {
+            enableStorageDevInterrupt(pSataChannel);
+            return MV_FALSE;
+        }
+    }
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " %d %d: Finish NonUdma Command. Status=0x%02x"
+             "\n", pAdapter->adapterId, channelIndex,
+             MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset +
+                              MV_ATA_DEVICE_STATUS_REG_OFFSET));
+    enableStorageDevInterrupt(pSataChannel);
+    pSataChannel->recoveredErrorsCounter = 0;
+    return MV_TRUE;
+}
+MV_BOOLEAN  _PMAccessReg(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex,
+                         MV_U8 PMPort, MV_U8 PMReg, MV_U32 *pValue,
+                         MV_STORAGE_DEVICE_REGISTERS *registerStruct,
+                         MV_BOOLEAN isRead)
+{
+    MV_BOOLEAN result;
+
+    if (isRead == MV_TRUE)
+    {
+        result = executeNonUDMACommand(pAdapter, channelIndex,
+                                       MV_SATA_PM_CONTROL_PORT,
+                                       MV_NON_UDMA_PROTOCOL_NON_DATA,
+                                       MV_TRUE/*isEXT*/,
+                                       NULL/*bufPtr*/,
+                                       0/*count*/,
+                                       PMReg /*features*/, 0/*sectorCount*/,
+                                       0 /*lbaLow*/, 0 /*lbaMid*/, 0 /*lbaHigh*/,
+                                       PMPort/*device*/,
+                                       MV_ATA_COMMAND_PM_READ_REG/*command*/);
+        if (result == MV_TRUE)
+        {
+            MV_BUS_ADDR_T   ioBaseAddr = pAdapter->adapterIoBaseAddress;
+            MV_U32 eDmaRegsOffset = pAdapter->sataChannel[channelIndex]->eDmaRegsOffset;
+
+            *pValue = MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset +
+                                       MV_ATA_DEVICE_SECTOR_COUNT_REG_OFFSET);
+            *pValue |= MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset +
+                                        MV_ATA_DEVICE_LBA_LOW_REG_OFFSET) << 8;
+            *pValue |= MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset +
+                                        MV_ATA_DEVICE_LBA_MID_REG_OFFSET) << 16;
+            *pValue |= MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset +
+                                        MV_ATA_DEVICE_LBA_HIGH_REG_OFFSET) << 24;
+        }
+    }
+    else
+    {
+        result = executeNonUDMACommand(pAdapter, channelIndex,
+                                       MV_SATA_PM_CONTROL_PORT,
+                                       MV_NON_UDMA_PROTOCOL_NON_DATA,
+                                       MV_TRUE/*isEXT*/,
+                                       NULL/*bufPtr*/,
+                                       0/*count*/,
+                                       PMReg /*features*/,
+                                       (MV_U16)((*pValue) & 0xff)/*sectorCount*/,
+                                       (MV_U16)(((*pValue) & 0xff00) >> 8) /*lbaLow*/,
+                                       (MV_U16)(((*pValue) & 0xff0000) >> 16)   /*lbaMid*/,
+                                       (MV_U16)(((*pValue) & 0xff000000) >> 24) /*lbaHigh*/,
+                                       PMPort/*device*/,
+                                       MV_ATA_COMMAND_PM_WRITE_REG/*command*/);
+    }
+    if (registerStruct)
+    {
+        dumpAtaDeviceRegisters(pAdapter, channelIndex, MV_FALSE,
+                               registerStruct);
+    }
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG|MV_DEBUG_PM, " %d %d: %s PM Reg %s: PM Port %x"
+             ", PM Reg %d, value %x\n", pAdapter->adapterId, channelIndex,
+             (isRead == MV_TRUE) ? "Read" : "Write",
+             (result == MV_TRUE) ? "Succeeded" : "Failed",
+             PMPort, PMReg, *pValue);
+
+    return result;
+}
+
+MV_BOOLEAN waitForDRQToClear(MV_SATA_ADAPTER* pAdapter,
+                             MV_BUS_ADDR_T ioBaseAddr,
+                             MV_U32 eDmaRegsOffset, MV_U32 loops,
+                             MV_U32 delayParam)
+{
+    MV_U8   ATAstatus = 0;
+    MV_U32  i;
+
+    for (i = 0;i < loops; i++)
+    {
+        ATAstatus = MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset +
+                                     MV_ATA_DEVICE_STATUS_REG_OFFSET);
+        if ((ATAstatus & MV_ATA_BUSY_STATUS) == 0)
+        {
+            if (!(ATAstatus & MV_ATA_DATA_REQUEST_STATUS))
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, "waitWhileStorageDevIsBusy: %d loops *"
+                         "%d usecs\n", i, delayParam);
+                return MV_TRUE;
+            }
+        }
+        mvMicroSecondsDelay(pAdapter, delayParam);
+    }
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "waitWhileStorageDevIsBusy<FAILED>: Time out - Device ERROR"
+             " Status: 0x%02x. loops %d, delay %d\n", ATAstatus, loops, delayParam);
+
+    return MV_FALSE;
+}
+
+void dumpAtaDeviceRegisters(MV_SATA_ADAPTER *pAdapter,
+                            MV_U8 channelIndex, MV_BOOLEAN isEXT,
+                            MV_STORAGE_DEVICE_REGISTERS *pRegisters)
+{
+    MV_BUS_ADDR_T   ioBaseAddr = pAdapter->adapterIoBaseAddress;
+    MV_U32 eDmaRegsOffset = pAdapter->sataChannel[channelIndex]->eDmaRegsOffset;
+
+	if (pAdapter->sataAdapterGeneration < MV_SATA_GEN_IIE)
+	{
+	    if (MV_REG_READ_DWORD(ioBaseAddr, eDmaRegsOffset +
+			MV_EDMA_COMMAND_REG_OFFSET) & MV_BIT0)
+		{
+			mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR,
+				" %d %d: dumpAtaDeviceRegisters: Edma is active!!!\n",
+				pAdapter->adapterId, channelIndex);
+			return;
+		}
+	}
+    MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                      MV_ATA_DEVICE_CONTROL_REG_OFFSET, 0);
+
+    pRegisters->errorRegister =
+    MV_REG_READ_BYTE(ioBaseAddr,
+                     eDmaRegsOffset + MV_ATA_DEVICE_ERROR_REG_OFFSET);
+
+    pRegisters->sectorCountRegister =
+    MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset +
+                     MV_ATA_DEVICE_SECTOR_COUNT_REG_OFFSET) & 0x00ff;
+    pRegisters->lbaLowRegister =
+    MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset +
+                     MV_ATA_DEVICE_LBA_LOW_REG_OFFSET) & 0x00ff;
+
+    pRegisters->lbaMidRegister =
+    MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset +
+                     MV_ATA_DEVICE_LBA_MID_REG_OFFSET) & 0x00ff;
+
+    pRegisters->lbaHighRegister =
+    MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset +
+                     MV_ATA_DEVICE_LBA_HIGH_REG_OFFSET) & 0x00ff;
+
+    if (isEXT == MV_TRUE)
+    {
+        /*set the HOB bit of DEVICE CONTROL REGISTER */
+
+        MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                          MV_ATA_DEVICE_CONTROL_REG_OFFSET, MV_BIT7);
+
+        pRegisters->sectorCountRegister |= (MV_REG_READ_BYTE(ioBaseAddr,
+                                                             eDmaRegsOffset +
+                                                             MV_ATA_DEVICE_SECTOR_COUNT_REG_OFFSET) << 8) & 0xff00;
+
+        pRegisters->lbaLowRegister |= (MV_REG_READ_BYTE(ioBaseAddr,
+                                                        eDmaRegsOffset + MV_ATA_DEVICE_LBA_LOW_REG_OFFSET) << 8)
+                                      & 0xff00;
+
+        pRegisters->lbaMidRegister |= (MV_REG_READ_BYTE(ioBaseAddr,
+                                                        eDmaRegsOffset + MV_ATA_DEVICE_LBA_MID_REG_OFFSET) << 8)
+                                      & 0xff00;
+
+        pRegisters->lbaHighRegister |= (MV_REG_READ_BYTE(ioBaseAddr,
+                                                         eDmaRegsOffset + MV_ATA_DEVICE_LBA_HIGH_REG_OFFSET) << 8)
+                                       & 0xff00;
+        MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                          MV_ATA_DEVICE_CONTROL_REG_OFFSET, 0);
+
+    }
+
+    pRegisters->deviceRegister = MV_REG_READ_BYTE(ioBaseAddr,
+                                                  eDmaRegsOffset + MV_ATA_DEVICE_HEAD_REG_OFFSET);
+
+    pRegisters->statusRegister = MV_REG_READ_BYTE(ioBaseAddr,
+                                                  eDmaRegsOffset + MV_ATA_DEVICE_STATUS_REG_OFFSET);
+
+
+}
+
+
+MV_BOOLEAN _doSoftReset(MV_SATA_CHANNEL *pSataChannel)
+{
+    MV_BUS_ADDR_T   ioBaseAddr = pSataChannel->mvSataAdapter->adapterIoBaseAddress;
+    MV_U32          i;
+    MV_U8           ATAstatus;
+    MV_U32          eDmaRegsOffset = pSataChannel->eDmaRegsOffset;
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_NON_UDMA_COMMAND | MV_DEBUG, "Issue SRST COMMAND\n");
+
+/* Write to the Device Control register, bits 1,2:                      */
+/* - bit 1 (nIEN): is the enable bit for the device assertion of INTRQ  */
+/*   to the host. When the nIEN bit is set to one, or the device is not */
+/*   selected, the device shall release the INTRQ signal.               */
+/* - bit 2 (SRST): is the host software reset bit.                      */
+    MV_REG_WRITE_BYTE(ioBaseAddr, pSataChannel->eDmaRegsOffset +
+                      MV_ATA_DEVICE_CONTROL_REG_OFFSET, MV_BIT2|MV_BIT1);
+    MV_REG_READ_BYTE(ioBaseAddr, pSataChannel->eDmaRegsOffset +
+                     MV_ATA_DEVICE_CONTROL_REG_OFFSET);
+    mvMicroSecondsDelay(pSataChannel->mvSataAdapter, 10);
+
+/* enableStorageDevInterrupt will clear the SRST bit*/
+    enableStorageDevInterrupt(pSataChannel);
+
+    mvMicroSecondsDelay(pSataChannel->mvSataAdapter, 500);
+    mvMicroSecondsDelay(pSataChannel->mvSataAdapter, 500);
+    mvMicroSecondsDelay(pSataChannel->mvSataAdapter, 500);
+    mvMicroSecondsDelay(pSataChannel->mvSataAdapter, 500);
+
+    for (i = 0;i < 31000; i++)
+    {
+        ATAstatus = MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset +
+                                     MV_ATA_DEVICE_STATUS_REG_OFFSET);
+        if ((ATAstatus & MV_ATA_BUSY_STATUS) == 0)
+        {
+            return MV_TRUE;
+        }
+        mvMicroSecondsDelay(pSataChannel->mvSataAdapter, 1000);
+    }
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d: Software reset failed "
+             "Status=0x%02x\n", pSataChannel->mvSataAdapter->adapterId,
+             pSataChannel->channelNumber, ATAstatus);
+
+    return MV_FALSE;
+}
+
+/*******************************************************************************
+* mvPMDevReadReg - Reads port multiplier's internal register
+*
+*
+* DESCRIPTION:
+*       Performs PIO non-data command for reading port multiplier's internal
+*       register.
+*
+* INPUT:
+*       pAdapter            - Pointer to the device data structure.
+*       channelIndex        - Index of the required channel
+*       PMPort              - This should be port 0xf
+*       PMReg               - The required register to be read
+*       pValue              - A pointer to 32bit data container that holds
+*                             the result.
+*       registerStruct      - A pointer to ATA register data structure. This
+*                             holds the ATA registers dump after command
+*                             is executed.
+*
+* RETURN:
+*       MV_TRUE on success, MV_FALSE otherwise.
+* COMMENTS:
+*       NONE
+*
+*******************************************************************************/
+MV_BOOLEAN  mvPMDevReadReg(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex,
+                           MV_U8 PMPort, MV_U8 PMReg, MV_U32 *pValue,
+                           MV_STORAGE_DEVICE_REGISTERS *registerStruct)
+{
+    MV_SATA_CHANNEL *pSataChannel;
+    MV_BOOLEAN      result;
+
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    :  mvStorageDevPMReadReg"
+                 " Failed, Bad adapter data structure pointer\n");
+        return MV_FALSE;
+    }
+    pSataChannel = pAdapter->sataChannel[channelIndex];
+    if (pSataChannel == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d:  channel data structu"
+                 "re is not allocated\n", pAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+    }
+
+    mvOsSemTake(&pSataChannel->semaphore);
+    if (pSataChannel->PMSupported == MV_FALSE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d:  mvStorageDevPMReadReg"
+                 " failed PM not supported for this channel\n",
+                 pAdapter->adapterId, channelIndex);
+        mvOsSemRelease( &pSataChannel->semaphore);
+        return MV_FALSE;
+    }
+    if (pSataChannel->queueCommandsEnabled == MV_TRUE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d:  mvStorageDevPMReadReg"
+                 " command failed: EDMA is active\n",
+                 pAdapter->adapterId, channelIndex);
+        mvOsSemRelease( &pSataChannel->semaphore);
+        return MV_FALSE;
+    }
+
+    result = _PMAccessReg(pAdapter, channelIndex, PMPort, PMReg, pValue,
+                          registerStruct, MV_TRUE);
+
+    mvOsSemRelease( &pSataChannel->semaphore);
+    return result;
+}
+
+
+
+/*******************************************************************************
+* mvPMDevWriteReg - Writes to port multiplier's internal register
+*
+*
+* DESCRIPTION:
+*       Performs PIO non-data command for writing to port multiplier's internal
+*       register.
+*
+* INPUT:
+*       pAdapter            - Pointer to the device data structure.
+*       channelIndex        - Index of the required channel
+*       PMPort              - This should be port 0xf
+*       PMReg               - The required register to be read
+*       value               - Holds 32bit of the value to be written
+*       registerStruct      - A pointer to ATA register data structure. This
+*                             holds the ATA registers dump after command
+*                             is executed.
+*
+* RETURN:
+*       MV_TRUE on success, MV_FALSE otherwise.
+* COMMENTS:
+*       NONE
+*
+*******************************************************************************/
+MV_BOOLEAN  mvPMDevWriteReg(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex,
+                            MV_U8 PMPort, MV_U8 PMReg, MV_U32 value,
+                            MV_STORAGE_DEVICE_REGISTERS *registerStruct)
+{
+    MV_SATA_CHANNEL *pSataChannel;
+    MV_BOOLEAN      result;
+
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    :  mvStorageDevPMWriteReg"
+                 " Failed, Bad adapter data structure pointer\n");
+        return MV_FALSE;
+    }
+    pSataChannel = pAdapter->sataChannel[channelIndex];
+    if (pSataChannel == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d:  channel data structu"
+                 "re is not allocated\n", pAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+    }
+
+    mvOsSemTake(&pSataChannel->semaphore);
+    if (pSataChannel->PMSupported == MV_FALSE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d:  mvStorageDevPMWriteReg"
+                 " failed PM not supported for this channel\n",
+                 pAdapter->adapterId, channelIndex);
+        mvOsSemRelease( &pSataChannel->semaphore);
+        return MV_FALSE;
+    }
+    if (pSataChannel->queueCommandsEnabled == MV_TRUE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d:  mvStorageDevPMWriteReg"
+                 " command failed: EDMA is active\n",
+                 pAdapter->adapterId, channelIndex);
+        mvOsSemRelease( &pSataChannel->semaphore);
+        return MV_FALSE;
+    }
+
+    result = _PMAccessReg(pAdapter, channelIndex, PMPort, PMReg, &value,
+                          registerStruct, MV_FALSE);
+
+    mvOsSemRelease( &pSataChannel->semaphore);
+    return result;
+}
+
+static MV_BOOLEAN _checkPMPortSStatus(MV_SATA_ADAPTER* pAdapter,
+                                      MV_U8 channelIndex,
+                                      MV_U8 PMPort,
+                                      MV_BOOLEAN *error)
+{
+    MV_BOOLEAN result;
+    MV_U32 SStatus;
+
+    result = mvPMDevReadReg(pAdapter, channelIndex, PMPort,
+                            MV_SATA_PSCR_SSTATUS_REG_NUM, &SStatus, NULL);
+
+    if (result == MV_FALSE)
+    {
+        *error = MV_TRUE;
+        return result;
+    }
+    *error = MV_FALSE;
+    SStatus &= (MV_BIT0 | MV_BIT1 | MV_BIT2);
+    if ((SStatus == (MV_BIT0 | MV_BIT1)) || (SStatus == 0))
+    {
+        return MV_TRUE;
+    }
+    return MV_FALSE;
+}
+
+MV_BOOLEAN  mvPMLinkUp(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex, MV_U8 PMPort,
+		       MV_BOOLEAN force_gen1)
+{
+    MV_BOOLEAN  result;
+    MV_U32	speed_force = 0;
+    
+    if(force_gen1 == MV_TRUE)
+	 speed_force = 0x10;
+
+    result = mvPMDevWriteReg(pAdapter, channelIndex, PMPort,
+                             MV_SATA_PSCR_SCONTROL_REG_NUM, 0x301 | speed_force, NULL);
+    if (result == MV_FALSE)
+    {
+        return result;
+    }
+    mvMicroSecondsDelay(pAdapter, MV_SATA_COMM_INIT_DELAY);
+    result = mvPMDevWriteReg(pAdapter, channelIndex, PMPort,
+                             MV_SATA_PSCR_SCONTROL_REG_NUM, 0x300 | speed_force, NULL);
+    return result;
+}
+
+/*******************************************************************************
+* mvPMDevEnableStaggeredSpinUp -
+*
+*
+* DESCRIPTION:
+*       Enables commnucation on a port multiplier's device SATA channel
+*
+* INPUT:
+*       pAdapter            - Pointer to the device data structure.
+*       channelIndex        - Index of the required channel
+*       PMPort              - Required device SATA channel on port multiplier
+*
+* RETURN:
+*       MV_TRUE on success, MV_FALSE otherwise.
+* COMMENTS:
+*       NONE
+*
+*******************************************************************************/
+MV_BOOLEAN  mvPMDevEnableStaggeredSpinUp(MV_SATA_ADAPTER *pAdapter,
+                                         MV_U8 channelIndex, MV_U8 PMPort)
+{
+    return mvPMLinkUp(pAdapter, channelIndex, PMPort, MV_FALSE);
+}
+
+
+/*******************************************************************************
+* mvPMDevEnableStaggeredSpinUpAll -
+*
+*
+* DESCRIPTION:
+*       Enables commnucation on all port multiplier's device SATA channels
+*
+* INPUT:
+*       pAdapter            - Pointer to the device data structure.
+*       channelIndex        - Index of the required channel
+*       PMNumOfPorts        - Number of device SATA channel the port multiplier
+*                             has.
+*       bitmask             - A pointer to 16bit data container that holds
+*                             a bitmask of '1' when the relevant port multiplier's
+*                             device port staggered spinup operation is success.
+*
+* RETURN:
+*       MV_TRUE on success, MV_FALSE otherwise.
+* COMMENTS:
+*       NONE
+*
+*******************************************************************************/
+
+MV_BOOLEAN mvPMDevEnableStaggeredSpinUpAll(MV_SATA_ADAPTER *pSataAdapter,
+                                           MV_U8 channelIndex,
+                                           MV_U8 PMNumOfPorts,
+                                           MV_U16 *bitmask)
+{
+    MV_U8 PMPort;
+    MV_U8 retryCount;
+    MV_U8 tmpBitmask = 1;
+    if (bitmask == NULL)
+    {
+        return MV_FALSE;
+    }
+    /*Do not issue staggered spinup for port 0 - already done because of
+    legacy port mode*/
+    *bitmask = 1;
+    for (PMPort = 0; PMPort < PMNumOfPorts; PMPort++)
+    {
+        MV_BOOLEAN error;
+        /* if sata communication already done(No staggered spin-up)*/
+        if (_checkPMPortSStatus(pSataAdapter, channelIndex, PMPort, &error) ==
+             MV_TRUE)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG,
+                     "[%d %d %d]: sata communication already established.\n",
+                     pSataAdapter->adapterId, channelIndex, PMPort);
+            tmpBitmask |= (1 << PMPort);
+            continue;
+        }
+        if (mvPMDevEnableStaggeredSpinUp(pSataAdapter,
+                                         channelIndex,
+                                         PMPort) == MV_TRUE)
+        {
+            tmpBitmask |= (1 << PMPort);
+        }
+        else
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                     "Error [%d %d %d]: "
+                     "PM enable staggered spin-up failed.\n",
+                     pSataAdapter->adapterId, channelIndex, PMPort);
+            return MV_FALSE;
+        }
+    }
+    mvMicroSecondsDelay(pSataAdapter, MV_SATA_COMM_INIT_WAIT_DELAY);
+    for (retryCount = 0; retryCount < 200; retryCount++)
+    {
+        for (PMPort = 0; PMPort < PMNumOfPorts; PMPort++)
+        {
+            MV_BOOLEAN error;
+            if ((*bitmask) & (1 << PMPort))
+            {
+                continue;
+            }
+            if (_checkPMPortSStatus(pSataAdapter,
+                                    channelIndex, PMPort, &error) == MV_FALSE)
+            {
+                if (error == MV_TRUE)
+                {
+                    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                             "[%d %d %d]: "
+                             "Fatal error - cannot read PM port SStatus.\n",
+                             pSataAdapter->adapterId, channelIndex, PMPort);
+                    break;
+                }
+                mvMicroSecondsDelay(pSataAdapter, 1000);
+            }
+            else
+            {
+                if (bitmask != NULL)
+                {
+                    *bitmask |= (1 << PMPort);
+                }
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG,
+                         "[%d %d %d] PM SATA PHY ready after %d msec\n",
+                         pSataAdapter->adapterId, channelIndex,
+                         PMPort, retryCount);
+            }
+        }
+        if (tmpBitmask == *bitmask)
+        {
+            break;
+        }
+    }
+    if (tmpBitmask != *bitmask)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                 "[%d %d %d]: "
+                 "Some of PM ports PHY are not initialized.\n",
+                 pSataAdapter->adapterId, channelIndex, PMPort);
+
+    }
+    return MV_TRUE;
+}
+
+/*******************************************************************************
+* mvPMDevEnableStaggeredSpinUpPort -
+*
+*
+* DESCRIPTION:
+*       Enables commnucation on port multiplier's device SATA port
+*
+* INPUT:
+*       pAdapter            - Pointer to the device data structure.
+*       channelIndex        - Index of the required channel
+*       PMPort              - the port number 
+*
+* RETURN:
+*       MV_TRUE on success, MV_FALSE otherwise.
+* COMMENTS:
+*       NONE
+*
+*******************************************************************************/
+MV_BOOLEAN mvPMDevEnableStaggeredSpinUpPort(MV_SATA_ADAPTER *pSataAdapter,
+					    MV_U8 channelIndex,
+ 					    MV_U8 PMPort,
+ 					    MV_BOOLEAN force_speed_gen1)
+
+{
+    MV_U8 retryCount;
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG,
+	     "[%d %d %d]: init sata communication.\n",
+	     pSataAdapter->adapterId, channelIndex, PMPort);
+ 
+    if (mvPMLinkUp(pSataAdapter, channelIndex, PMPort,
+ 		   force_speed_gen1) != MV_TRUE)
+    {
+	    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                     "Error [%d %d %d]: "
+                     "PM enable staggered spin-up failed.\n",
+                     pSataAdapter->adapterId, channelIndex, PMPort);
+            return MV_FALSE;
+    }
+    mvMicroSecondsDelay(pSataAdapter, MV_SATA_COMM_INIT_WAIT_DELAY);
+    for (retryCount = 0; retryCount < 200; retryCount++)
+    {
+            MV_BOOLEAN error;
+            
+            if (_checkPMPortSStatus(pSataAdapter,
+                                    channelIndex, PMPort, &error) == MV_FALSE)
+            {
+		    if (error == MV_TRUE)
+		    {
+			    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+				     "[%d %d %d]: "
+				     "Fatal error - cannot read PM port SStatus.\n",
+				     pSataAdapter->adapterId, channelIndex, PMPort);
+			    return MV_FALSE;
+		    }
+		    mvMicroSecondsDelay(pSataAdapter, 1000);
+            }
+            else
+            {
+		    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG,
+			     "[%d %d %d] PM SATA PHY ready after %d msec\n",
+			     pSataAdapter->adapterId, channelIndex,
+			     PMPort, retryCount);
+		    break;
+            }
+        
+    }
+
+    return MV_TRUE;
+}
+
+/*******************************************************************************
+* mvStorageDevExecutePIO -
+*
+*
+* DESCRIPTION:
+*       Sends custom PIO command (polling driven)
+*
+* INPUT:
+*   pAdapter    - pointer to the device data structure.
+*   channelIndex    - index of the required channel
+*   PMPort          - index of the required destination port multipliers
+*                     device Port (0 if no PM available).
+*   protocolType    - protocol type of the command
+*   isEXT   - true when the given command is the EXTENDED
+*   bufPtr  - pointer to the buffer to write/read to/from
+*   pInATARegs  - Holds ATA registers for the command
+*   pOutATARegs - Holds ATA registers after the command completed
+*
+* RETURN:
+*   MV_TRUE on success, MV_FALSE otherwise.
+* COMMENTS:
+*       when the command is EXTENDED, then the high 8 bits of the 16 bits values
+*   will be written first, so they should hold the previous value as defined in
+*   the ATA 6 standard
+*******************************************************************************/
+MV_BOOLEAN mvStorageDevExecutePIO(MV_SATA_ADAPTER *pAdapter,
+                                  MV_U8 channelIndex,
+                                  MV_U8 PMPort,
+                                  MV_NON_UDMA_PROTOCOL protocolType,
+                                  MV_BOOLEAN  isEXT, MV_U16_PTR bufPtr,
+                                  MV_U32 count,
+                                  MV_STORAGE_DEVICE_REGISTERS *pInATARegs,
+                                  MV_STORAGE_DEVICE_REGISTERS *pOutATARegs)
+{
+    MV_BOOLEAN result;
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    :  mvPMDevExecutePIO"
+                 "Command Failed, Bad adapter data structure pointer\n");
+        return MV_FALSE;
+    }
+    if (pAdapter->sataChannel[channelIndex] == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d:  mvPMDevExecutePIO"
+                 "Command Failed, channel data structure not allocated\n",
+                 pAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+    }
+    mvOsSemTake(&pAdapter->sataChannel[channelIndex]->semaphore);
+    result = executeNonUDMACommand(pAdapter, channelIndex, PMPort,
+                                   protocolType, isEXT,
+                                   bufPtr, count, pInATARegs->featuresRegister,
+                                   pInATARegs->sectorCountRegister,
+                                   pInATARegs->lbaLowRegister,
+                                   pInATARegs->lbaMidRegister,
+                                   pInATARegs->lbaHighRegister,
+                                   pInATARegs->deviceRegister,
+                                   pInATARegs->commandRegister);
+    if (pOutATARegs)
+    {
+        dumpAtaDeviceRegisters(pAdapter, channelIndex, isEXT, pOutATARegs);
+    }
+    mvOsSemRelease(&pAdapter->sataChannel[channelIndex]->semaphore);
+    return result;
+}
+
+/*******************************************************************************
+* mvStorageDevSetDeviceType -
+*
+*
+* DESCRIPTION:
+*       Sets the device type connected directly to the specific adapter's
+*       SATA channel.
+*
+* INPUT:
+*       pAdapter            - Pointer to the device data structure.
+*       channelIndex        - Index of the required channel
+*       deviceType          - Type of device
+*
+* RETURN:
+*       MV_TRUE on success, MV_FALSE otherwise.
+* COMMENTS:
+*       NONE
+*
+*******************************************************************************/
+MV_BOOLEAN  mvStorageDevSetDeviceType(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex,
+                                      MV_SATA_DEVICE_TYPE deviceType)
+{
+    MV_SATA_CHANNEL *pSataChannel;
+
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    :  "
+                 " mvStorageDevSetDeviceType Failed, Bad adapter data structure "
+                 "pointer\n");
+        return MV_SATA_DEVICE_TYPE_UNKNOWN;
+    }
+    pSataChannel = pAdapter->sataChannel[channelIndex];
+    if (pSataChannel == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d:  channel data structu"
+                 "re is not allocated\n", pAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+    }
+
+    pSataChannel->deviceType = deviceType;
+
+    return MV_TRUE;
+}
+
+/*******************************************************************************
+* mvStorageDevGetDeviceType -
+*
+*
+* DESCRIPTION:
+*       Gets the device type connected directly to the specific adapter's
+*       SATA channel.
+*
+* INPUT:
+*       pAdapter            - Pointer to the device data structure.
+*       channelIndex        - Index of the required channel
+*
+* RETURN:
+*       MV_TRUE on success, MV_FALSE otherwise.
+* COMMENTS:
+*       NONE
+*
+*******************************************************************************/
+MV_SATA_DEVICE_TYPE mvStorageDevGetDeviceType(MV_SATA_ADAPTER *pAdapter,
+                                              MV_U8 channelIndex)
+{
+    MV_SATA_CHANNEL *pSataChannel;
+
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    :  "
+                 " mvStorageDevGetDeviceType Failed, Bad adapter data structure "
+                 "pointer\n");
+        return MV_SATA_DEVICE_TYPE_UNKNOWN;
+    }
+    pSataChannel = pAdapter->sataChannel[channelIndex];
+    if (pSataChannel == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d:  "
+                 "channel data structure is not allocated\n",
+                 pAdapter->adapterId, channelIndex);
+        return MV_SATA_DEVICE_TYPE_UNKNOWN;
+    }
+
+    return pSataChannel->deviceType;
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/sata/CoreDriver/mvSataSoc.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/sata/CoreDriver/mvSataSoc.c
@@ -0,0 +1,118 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+            this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvSataSoc.h"
+#include "mvRegs.h"
+
+/* Calculate the base address of the registers for a SATA channel */
+static MV_U32 edmaRegOffst[8] = {0x22000, 0x24000, 0x26000, 0x28000,
+0x32000, 0x34000, 0x36000, 0x38000};
+#define getEdmaRegOffset(x) edmaRegOffst[(x)]
+
+MV_BOOL mvSataPhyShutdown(MV_U8 port)
+{
+    MV_U32      regVal;
+    MV_U32      adapterIoBaseAddress = MV_SATA_REGS_OFFSET - 0x20000;
+
+        regVal = MV_REG_READ (adapterIoBaseAddress +
+                                    getEdmaRegOffset (port) +
+                                    MV_SATA_II_SATA_CONFIG_REG_OFFSET);
+        /* Fix for 88SX60x1 FEr SATA#8*/
+        /* according to the spec, bits [31:12] must be set to 0x009B1 */
+        regVal &= 0x00000FFF;
+        /* regVal |= MV_BIT12;*/
+        regVal |= 0x009B1000;
+
+        regVal |=  BIT9;
+        MV_REG_WRITE (adapterIoBaseAddress +
+                            getEdmaRegOffset (port) +
+                            MV_SATA_II_SATA_CONFIG_REG_OFFSET,
+                            regVal);
+        return MV_TRUE;
+}
+MV_BOOL mvSataPhyPowerOn(MV_U8 port)
+{
+    MV_U32      adapterIoBaseAddress = MV_SATA_REGS_OFFSET - 0x20000;
+
+        MV_U32 regVal = MV_REG_READ (adapterIoBaseAddress +
+                                    getEdmaRegOffset (port) +
+                                    MV_SATA_II_SATA_CONFIG_REG_OFFSET);
+        /* Fix for 88SX60x1 FEr SATA#8*/
+        /* according to the spec, bits [31:12] must be set to 0x009B1 */
+        regVal &= 0x00000FFF;
+        /* regVal |= MV_BIT12;*/
+        regVal |= 0x009B1000;
+
+
+        regVal &= ~(BIT9);
+        MV_REG_WRITE (adapterIoBaseAddress +
+                            getEdmaRegOffset (port) +
+                            MV_SATA_II_SATA_CONFIG_REG_OFFSET,
+                            regVal);
+        return MV_TRUE;
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/sata/CoreDriver/mvOsS.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/sata/CoreDriver/mvOsS.h
@@ -0,0 +1,98 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCmvOsSh
+#define __INCmvOsSh
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes */
+#include "mvOs.h"
+
+#if defined(MV_LINUX)
+
+#include "mvOsSata.h"
+
+#elif defined(MV_UBOOT)
+
+#include "mvOsSata.h"
+
+#elif defined(MV_VXWORKS)
+
+#include "mvOsSVxw.h"
+
+#elif defined(MV_NETBSD)
+
+#include "mvOsSata.h"
+
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* __INCmvOsSh */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/sata/CoreDriver/mvSata.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/sata/CoreDriver/mvSata.c
@@ -0,0 +1,10238 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+/*******************************************************************************
+* mvSata - C File for implementation of the core driver for Marvell's Sata
+*           Adapters.
+*
+* DESCRIPTION:
+*       None.
+*
+* DEPENDENCIES:
+*   mvOs.h
+*   mvSata.h.
+*   mvStorageDev.h
+*   mvRegs.h
+*
+*******************************************************************************/
+#include "mvSataSoc.h"
+#include "mvOsS.h"
+#include "mvSata.h"
+#include "mvStorageDev.h"
+#include "mvRegs.h"
+
+/* Defines */
+#define MV_SATA_PORT_PER_UNIT                   4
+
+#define MV_PHY_DET_STATE_NO_DEVICE              0
+#define MV_PHY_DET_STATE_DEVICE_NO_PHY_COM      1
+#define MV_PHY_DET_STATE_DEVICE_AND_PHY_COM     3
+#define MV_PHY_DET_STATE_PHY_OFFLINE            4
+#define MV_PHY_DET_CONTROL_START_NEGOTIATION    1
+#define MV_PHY_DET_CONTROL_SHUTDOWN             4
+#define MV_NEAR_END_LOOPBACK_TEST_WAIT_TIME     100 /* 100 uSec */
+#define MV_FAR_END_LOOPBACK_TEST_WAIT_TIME      5   /* 5 uSec */
+#define MV_PHY_COM_SETUP_WAIT                   5000 /* 5 mili seconds */
+#define MV_HARD_RESET_WAIT_ASSERT               25    /* 25 uSec */
+#define MV_HARD_RESET_WAIT_NEGATE               1000  /* 1  mSec*/
+#define MV_HARD_RESET_WAIT_READY                2000 /* ms to wait after HR*/
+/* before disk access */
+#define MV_HARD_RESET_WAIT_FOR_BUSY_LOOPS       10000
+#define MV_HARD_RESET_WAIT_FOR_BUSY_LOOP_DELAY  1000
+
+/* for the command result */
+#define MV_EDMA_REQUEST_COMMANDS_NUM            11
+
+
+/* Fix the watermark to the following default value */
+#define MV_WATER_MARK_FIX                       29 /* write 5'b11101 to bits 12:8*/
+
+extern MV_BOOLEAN waitWhileStorageDevIsBusy(MV_SATA_ADAPTER *pAdapter,
+                                            MV_BUS_ADDR_T ioBaseAddr,
+                                            MV_U32 eDmaRegsOffset, MV_U32 loops,
+                                            MV_U32 delay);
+
+extern void dumpAtaDeviceRegisters(MV_SATA_ADAPTER *pAdapter,
+                                   MV_U8 channelIndex, MV_BOOLEAN isEXT,
+                                   MV_STORAGE_DEVICE_REGISTERS *pRegisters);
+
+extern MV_BOOLEAN _doSoftReset(MV_SATA_CHANNEL *pSataChannel);
+
+MV_BOOLEAN isStorageDevReadyForPIO(MV_SATA_CHANNEL *pSataChannel);
+
+extern MV_BOOLEAN executeNonUDMACommand(MV_SATA_ADAPTER *pAdapter,
+                                        MV_U8 channelIndex,
+                                        MV_U8  PMPort,
+                                        MV_NON_UDMA_PROTOCOL protocolType,
+                                        MV_BOOLEAN  isEXT,
+                                        MV_U16_PTR bufPtr, MV_U32 count,
+                                        MV_U16 features,
+                                        MV_U16 sectorCount,
+                                        MV_U16 lbaLow, MV_U16 lbaMid,
+                                        MV_U16 lbaHigh, MV_U8 device,
+                                        MV_U8 command);
+
+extern MV_BOOLEAN waitForDRQ(MV_SATA_ADAPTER* pAdapter,
+                             MV_BUS_ADDR_T ioBaseAddr,
+                             MV_U32 eDmaRegsOffset, MV_U32 loops,
+                             MV_U32 delay);
+
+static void _setRegBits(MV_BUS_ADDR_T ioBaseAddr, MV_U32 offset,
+                        MV_U32   bits)
+{
+    MV_U32  regVal = MV_REG_READ_DWORD(ioBaseAddr, offset);
+    regVal |= bits;
+    MV_REG_WRITE_DWORD(ioBaseAddr, offset, regVal);
+}
+
+static void _clearRegBits(MV_BUS_ADDR_T ioBaseAddr, MV_U32 offset,
+                          MV_U32   bits)
+{
+    MV_U32  regVal = MV_REG_READ_DWORD(ioBaseAddr, offset);
+    regVal &= ~bits;
+    MV_REG_WRITE_DWORD(ioBaseAddr, offset, regVal);
+}
+
+static MV_U32 getRegField(MV_U32 regVal, MV_U32 fieldOff, MV_U32 bitsNum);
+
+static MV_BOOLEAN _checkSStatusAfterHReset(MV_SATA_ADAPTER* pAdapter,
+                                           MV_U8 channelIndex);
+#ifdef MV_LOGGER
+
+void _dumpPCIRegs(MV_SATA_ADAPTER *pAdapter);
+void _dumpEDMARegs(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex);
+void _dumpChannelQueues(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex);
+void _dumpSataRegs(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex);
+void _printATARegs(MV_STORAGE_DEVICE_REGISTERS   *pDeviceRegs);
+
+#else
+
+    #define _dumpPCIRegs(p)
+    #define _dumpEDMARegs(p,i)
+    #define _dumpChannelQueues(p,i)
+    #define _dumpSataRegs(p,i)
+    #define _printATARegs(p)
+
+#endif
+
+/* write ATA command register entry in a request entry */
+#define WRITE_ATA_COMMAND_REG(addr, data, reg, isLast)              \
+do{                                                                 \
+    *(addr) = MV_CPU_TO_LE16((((MV_U8)(data)) & 0xff) | ((reg) << 8) | (isLast));   \
+} while(0)
+
+#define MV_CHANNEL_INDEX(unit, port)    (((unit) << 2) | (port))
+
+
+/* Typedefs */
+
+typedef struct mvDmaRequestQueueEntry
+{
+    /* Fields set by CORE driver */
+    volatile MV_U32       prdLowAddr;
+    volatile MV_U32       prdHighAddr;
+    volatile MV_U16       controlFlags;
+    volatile MV_U16       command[MV_EDMA_REQUEST_COMMANDS_NUM];
+
+} MV_DMA_REQUEST_QUEUE_ENTRY;
+
+/*CRQP Data structure of the fourth generation devices*/
+typedef struct mvGen2EEdmaRequestQueueEntry
+{
+    /* Fields set by CORE driver */
+    volatile MV_U32       prdLowAddr;
+    volatile MV_U32       prdHighAddr;
+    volatile MV_U32       controlFlags;
+    volatile MV_U16       dataRegionByteCount;
+    volatile MV_U16       reserved[2];
+    volatile MV_U8        ATACommand;
+    volatile MV_U8        ATAFeatures;
+    volatile MV_U8        ATALBALow;
+    volatile MV_U8        ATALBAMid;
+    volatile MV_U8        ATALBAHigh;
+    volatile MV_U8        ATADevice;
+    volatile MV_U8        ATALBALowExp;
+    volatile MV_U8        ATALBAMidExp;
+    volatile MV_U8        ATALBAHighExp;
+    volatile MV_U8        ATAFeaturesExp;
+    volatile MV_U8        ATASectorCount;
+    volatile MV_U8        ATASectorCountExp;
+    volatile MV_U16       reserved2;
+} MV_GEN2E_EDMA_REQUEST_QUEUE_ENTRY;
+
+typedef struct mvDmaResponseQueueEntry
+{
+    /* Fields set by  hardware */
+    volatile MV_U16 id;
+    volatile MV_U16 responseFlags;
+    volatile MV_U32 timeStamp;
+} MV_DMA_RESPONSE_QUEUE_ENTRY;
+
+
+/* local functions  */
+
+/*static*/ MV_BOOLEAN waitForBusyAfterHReset(MV_SATA_ADAPTER *pAdapter,
+                                             MV_U8 channelIndex);
+
+static void unmaskEdmaInterrupts(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex);
+
+static void maskEdmaInterrupts(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex);
+
+static void setupEdmaDeviceErrorHandlingConfiguration(MV_SATA_CHANNEL *pSataChannel);
+
+static void writeEdmaRequestEntry(MV_DMA_REQUEST_QUEUE_ENTRY *pReqEntry,
+                                  MV_SATA_CHANNEL *mvSataChannel,
+                                  MV_QUEUED_COMMAND_ENTRY *pCommandEntry,
+                                  MV_UDMA_COMMAND_PARAMS  *pUdmaParams);
+
+static void writeGen2EEdmaRequestEntry(MV_DMA_REQUEST_QUEUE_ENTRY *pReqEntry,
+                                       MV_SATA_CHANNEL *mvSataChannel,
+                                       MV_QUEUED_COMMAND_ENTRY *pCommandEntry,
+                                       MV_UDMA_COMMAND_PARAMS  *pUdmaParams);
+
+static void handleEdmaFailedCommand(MV_SATA_ADAPTER *pAdapter,
+                                    MV_U8 channelIndex, MV_U16 eDmaErrorCause);
+
+static void handleEdmaResponse(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex,
+                               MV_DMA_RESPONSE_QUEUE_ENTRY *eDmaResponse);
+
+#ifdef MV_SATA_C2C_COMM
+static void handleBmDMAInterrupt(MV_SATA_ADAPTER *pAdapter,
+                                 MV_BUS_ADDR_T   ioBaseAddr,
+                                 MV_SATA_CHANNEL *pSataChannel,
+                                 MV_U8   channelIndex,
+                                 MV_U32 edmaError);
+#endif
+
+static void handleEdmaInterrupt(MV_SATA_ADAPTER *pAdapter, MV_U8 sataUnit,
+                                MV_U8 port, MV_U8 rspInPtr,MV_U32 responseDone,
+                                MV_U32 edmaError, MV_U32 unitCause);
+
+static void handleDeviceInterrupt(MV_SATA_ADAPTER *pAdapter, MV_U8 sataUnit,
+                                  MV_U8 port);
+
+static void handleEdmaError(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex);
+
+static MV_VOID handleDisconnect(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex);
+
+static MV_VOID handleConnect(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex);
+
+static MV_BOOLEAN handleUnrecoverableError(MV_SATA_ADAPTER *pAdapter,
+                                           MV_U8 channelIndex,
+                                           MV_U32 eDmaErrorCause);
+
+static MV_BOOLEAN handleRecoverableError(MV_SATA_ADAPTER *pAdapter,
+                                         MV_U8 channelIndex,
+                                         MV_U32 eDmaErrorCause);
+
+static MV_BOOLEAN handleAsyncNotify(MV_SATA_ADAPTER *pAdapter,
+                                    MV_U8 channelIndex,
+                                    MV_U32 eDmaErrorCause);
+
+static MV_BOOLEAN handleSelfDisable(MV_SATA_ADAPTER *pAdapter,
+                                    MV_U8 channelIndex,
+                                    MV_U32 eDmaErrorCause);
+
+static MV_BOOLEAN handleDevErr(MV_SATA_ADAPTER *pAdapter,
+                               MV_U8 channelIndex,
+                               MV_U32 eDmaErrorCause);
+
+#ifdef MV_SATA_C2C_COMM
+static void handleC2CInterrupt(MV_SATA_CHANNEL *pSataChannel);
+#endif
+static MV_BOOLEAN sendVendorUniqueFIS(MV_SATA_ADAPTER *pAdapter,
+                                      MV_U8 channelIndex,
+                                      MV_U32 *vendorUniqueBuffer,
+                                      MV_U8 numOfDWords);
+
+static void handlePIOInterrupt(MV_SATA_CHANNEL *pSataChannel,
+                               MV_QUEUED_COMMAND_ENTRY *pCommandEntry);
+
+static MV_BOOLEAN transferPIOData(MV_SATA_CHANNEL *pSataChannel,
+                                  MV_NONE_UDMA_COMMAND_PARAMS   *pNoneUdmaCommandParams);
+
+#ifdef MV_SUPPORT_ATAPI
+static MV_BOOLEAN transferPacketData(MV_SATA_CHANNEL *pSataChannel,
+                                  MV_PACKET_COMMAND_PARAMS   *pPacketCommandParams,
+                                    MV_U16  byteCount);
+
+static void completePacketCommand(MV_SATA_CHANNEL *pSataChannel,
+                               MV_QUEUED_COMMAND_ENTRY *pCommandEntry,
+                               MV_BOOLEAN failed);
+#endif
+static void completePIOCommand(MV_SATA_CHANNEL *pSataChannel,
+                               MV_QUEUED_COMMAND_ENTRY *pCommandEntry,
+                               MV_BOOLEAN failed);
+
+static MV_BOOLEAN _resetEdmaQPointers(MV_SATA_CHANNEL *pSataChannel);
+
+static MV_BOOLEAN resetEdmaChannel(MV_SATA_CHANNEL *pSataChannel);
+
+static void flushDmaQueue(MV_SATA_CHANNEL *pSataChannel,
+                          MV_FLUSH_TYPE flushType, MV_COMPLETION_TYPE, MV_U16);
+
+static void _fixPhyParams(MV_SATA_ADAPTER *pMvSataAdapter, MV_U8 channelIndex);
+
+static void _channelHardReset(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex);
+
+static void _establishSataComm(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex);
+
+static void _establishSataCommAll(MV_SATA_ADAPTER *pAdapter);
+
+void _setActivePMPort(MV_SATA_CHANNEL *pSataChannel, MV_U8 PMPort);
+
+static void revertSataHCRegs (MV_SATA_ADAPTER *pAdapter);
+
+static void revertFlashInterfaceRegs (MV_SATA_ADAPTER *pAdapter);
+
+static void revertPCIInterfaceRegs (MV_SATA_ADAPTER *pAdapter);
+
+static void revertPEXInterfaceRegs (MV_SATA_ADAPTER *pAdapter);
+
+static void commandsQueueAddTail(MV_SATA_CHANNEL *pSataChannel,
+                                 MV_QUEUED_COMMAND_ENTRY *pCommandEntry);
+
+static void commandsQueueRemove(MV_SATA_CHANNEL *pSataChannel,
+                                MV_QUEUED_COMMAND_ENTRY *pCommandEntry);
+
+static void addCommand(MV_SATA_CHANNEL *pSataChannel,
+                       MV_QUEUED_COMMAND_ENTRY *pCommandEntry,
+                       MV_QUEUE_COMMAND_INFO *pCommandInfo);
+
+static void removeCommand(MV_SATA_CHANNEL *pSataChannel,
+                          MV_QUEUED_COMMAND_ENTRY *pCommandEntry);
+
+static void enableSaDevInterrupts(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex);
+
+void disableSaDevInterrupts(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex);
+
+static void _checkATAStatus(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex);
+
+static void activateEdma(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex);
+
+static void deactivateEdma(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex);
+
+static void EdmaReqQueueInsert(MV_SATA_CHANNEL *pSataChannel,
+                               MV_QUEUED_COMMAND_ENTRY *pCommandEntry,
+                               MV_UDMA_COMMAND_PARAMS  *pUdmaParams);
+
+static MV_BOOLEAN sendNoneUdmaCommand(MV_SATA_CHANNEL *pSataChannel,
+                                      MV_QUEUED_COMMAND_ENTRY *pCommandEntry);
+
+static MV_BOOLEAN isGoodCompletionsExpected(MV_SATA_CHANNEL *pSataChannel);
+
+static MV_VOID updatePortsWithErrors(MV_SATA_CHANNEL *pSataChannel);
+
+static MV_VOID setAbortedCommands(MV_SATA_CHANNEL *pSataChannel);
+
+static MV_VOID enterRequestSenseState(MV_SATA_CHANNEL *pSataChannel);
+
+static MV_BOOLEAN _getHostTagByDeviceTag(MV_SATA_CHANNEL *pSataChannel,
+                                         MV_U8 deviceTag,
+                                         MV_U8 PMPort,
+                                         MV_U8 *pHostTag);
+
+static MV_BOOLEAN parseReadLogExtOutPut(MV_SATA_CHANNEL *pSataChannel);
+
+static MV_BOOLEAN
+ReadLogExtCompletionCB(MV_SATA_ADAPTER *pSataAdapter,
+                       MV_U8 channelNum,
+                       MV_COMPLETION_TYPE comp_type,
+                       MV_VOID_PTR commandId,
+                       MV_U16 responseFlags,
+                       MV_U32 timeStamp,
+                       MV_STORAGE_DEVICE_REGISTERS *registerStruct);
+
+static MV_VOID setReadLogExtCmndPointers(MV_SATA_CHANNEL *pSataChannel);
+
+static MV_VOID insertReadLogExtCmnd(MV_SATA_CHANNEL *pSataChannel);
+
+static MV_VOID handlePortError(MV_SATA_CHANNEL *pSataChannel);
+
+static MV_VOID softResetErringPorts(MV_SATA_CHANNEL *pSataChannel);
+
+static MV_VOID _insertQCommandsIntoEdma(MV_SATA_CHANNEL *pSataChannel);
+
+static MV_BOOLEAN _doDevErrorRecovery(MV_SATA_CHANNEL *pSataChannel);
+
+#if defined (MV_SUPPORT_ATAPI) || defined (MV_SATA_C2C_COMM)
+static void activateBMDmaMode(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex,
+                              MV_U32 prdTableHi, MV_U32 prdTableLow,
+                              MV_UDMA_TYPE dmaType);
+#endif
+static void _resetBmDma(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex);
+
+#ifdef MV_SATA_C2C_COMM
+
+/* Channel 2 Channel */
+static MV_BOOLEAN sendVendorUniqueFIS(MV_SATA_ADAPTER *pAdapter,
+                                      MV_U8 channelIndex,
+                                      MV_U32 *vendorUniqueBuffer,
+                                      MV_U8 numOfDWords);
+
+#endif
+
+#ifdef MV_SATA_IO_GRANULARITY
+
+static void setIoGranularityCount(MV_SATA_ADAPTER *pAdapter,
+                                  MV_U8 transId,
+                                  MV_U8 counter);
+static MV_U8 readIoGranularityCount(MV_SATA_ADAPTER *pAdapter,
+                                    MV_U8 transId);
+static void iogInterrupt(MV_SATA_ADAPTER *pAdapter,
+                         MV_BUS_ADDR_T ioBaseAddr,
+                         MV_U32 mainCause);
+static void checkIogCompletion(MV_SATA_ADAPTER *pAdapter,
+                               MV_U32 iogCause, MV_U8 offset);
+static void checkIogBit(MV_SATA_ADAPTER *pAdapter,
+                        MV_U8 bitOffset,
+                        MV_U8 value);
+
+static MV_BOOLEAN iogReset(MV_SATA_ADAPTER *pAdapter);
+#endif
+
+
+/* Calculate the base address of the registers for a SATA channel */
+MV_U32 edmaRegOffst[MV_SATA_CHANNELS_NUM] = {0x22000, 0x24000, 0x26000, 0x28000,
+0x32000, 0x34000, 0x36000, 0x38000};
+
+#define getEdmaRegOffset(x) edmaRegOffst[(x)]
+
+
+
+
+MV_BOOLEAN waitForBusyAfterHReset(MV_SATA_ADAPTER *pAdapter,
+                                  MV_U8 channelIndex)
+{
+    MV_U32 i;
+    MV_U8       ATAstatus;
+    mvMicroSecondsDelay(pAdapter, MV_HARD_RESET_WAIT_READY);
+    for (i = MV_HARD_RESET_WAIT_READY; i < 5000000; i+= 10000)
+    {
+        ATAstatus = MV_REG_READ_BYTE(pAdapter->adapterIoBaseAddress,
+                                     getEdmaRegOffset(channelIndex) +
+                                     MV_ATA_DEVICE_STATUS_REG_OFFSET);
+        if ((ATAstatus & MV_ATA_BUSY_STATUS) == 0)
+        {
+            return MV_TRUE;
+        }
+        mvMicroSecondsDelay(pAdapter, 10000);
+    }
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d: in Channel "
+             "Hard Reset wait for busy, ATA STATUS=0x%02x\n",
+             pAdapter->adapterId,
+             channelIndex, ATAstatus);
+    return MV_FALSE;
+}
+
+static void unmaskEdmaInterrupts(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex)
+{
+
+
+    if (pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II)
+    {
+        /*clear SError */
+        MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                           edmaRegOffst[ channelIndex] +
+                           MV_SATA_II_S_ERROR_REG_OFFSET, 0xFFFFFFFF);
+        if (pAdapter->sataAdapterGeneration == MV_SATA_GEN_IIE)
+        {
+            /* clear FIS Interrupt cause register*/
+            MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                               edmaRegOffst[ channelIndex] +
+                               MV_EDMA_FIS_INTERRUPT_CAUSE_REG_OFFSET, 0);
+        }
+    }
+
+    MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                       getEdmaRegOffset(channelIndex) +
+                       MV_EDMA_INTERRUPT_ERROR_CAUSE_REG_OFFSET,
+                       0);
+    if (pAdapter->sataAdapterGeneration == MV_SATA_GEN_I)
+    {
+        /* Unmask EDMA self disable (bit 8), mask errors that cause self disable */
+        MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                           getEdmaRegOffset(channelIndex) +
+                           MV_EDMA_INTERRUPT_ERROR_MASK_REG_OFFSET,
+                           MV_EDMA_GEN_I_ERROR_MASK);
+    }
+    else
+    {
+        /* Unmask EDMA self disable (bit 7), mask errors that cause self disable */
+        MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                           getEdmaRegOffset(channelIndex) +
+                           MV_EDMA_INTERRUPT_ERROR_MASK_REG_OFFSET,
+                           MV_EDMA_GEN_II_ERROR_MASK);
+    }
+}
+
+static void maskEdmaInterrupts(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex)
+{
+    MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                       getEdmaRegOffset(channelIndex) +
+                       MV_EDMA_INTERRUPT_ERROR_MASK_REG_OFFSET,
+                       0);
+}
+
+/*******************************************************************************
+* writeEdmaRequestEntry  - Write a CRQB (COMMAND REQUEST QUEUE BLOCK)
+*
+* DESCRIPTION:
+*       write one CRQB for an EDMA request queue.
+*
+* INPUT:
+*       pReqEntry     - pointer to the CRQB area on the system memory
+*                       (HW reqeust Queue).
+*       mvSataChannel - pointer to the channel data structure
+*       pCommandEntry - pointer to the command entry data structure
+*                       (SW request Queue).
+*
+* RETURN:
+*       None
+*
+* COMMENTS:
+*       None.
+*
+*******************************************************************************/
+static void writeEdmaRequestEntry(MV_DMA_REQUEST_QUEUE_ENTRY *pReqEntry,
+                                  MV_SATA_CHANNEL *mvSataChannel,
+                                  MV_QUEUED_COMMAND_ENTRY *pCommandEntry,
+                                  MV_UDMA_COMMAND_PARAMS  *pUdmaParams)
+{
+    MV_U16           ControlFlags = 0;
+    volatile MV_U16  *pCommand = &pReqEntry->command[0];
+    MV_U8            ATACommand = 0;
+
+    pReqEntry->prdLowAddr  = MV_CPU_TO_LE32(pUdmaParams->prdLowAddr);
+    pReqEntry->prdHighAddr = MV_CPU_TO_LE32(pUdmaParams->prdHighAddr);
+
+    /* Set the direction of the transaction (read/write) */
+    if (pUdmaParams->readWrite == MV_UDMA_TYPE_READ)
+    {
+        ControlFlags |= 0x1; /* Device to system memory */
+    }
+    ControlFlags |= (pCommandEntry->hostTag << 1);   /* the tag will be used also */
+#ifdef MV_SATA_IO_GRANULARITY
+
+    /*If valid IO Granularity transaction Id*/
+    if (pUdmaParams->iogCurrentTransId < MV_IOG_INVALID_COMMAND_ID)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG | MV_DEBUG_UDMA_COMMAND, "%d %d: "
+                 "Edma request with IO granularity Id = 0x%x\n",
+                 mvSataChannel->mvSataAdapter->adapterId,
+                 mvSataChannel->channelNumber, pUdmaParams->iogCurrentTransId);
+        ControlFlags |= (((MV_U16)pUdmaParams->iogCurrentTransId) << 6);
+    }
+#endif
+    /* in Non-queue EDMA mode    */
+    ControlFlags |= (pCommandEntry->pCommandInfo->PMPort << 12);
+
+    pReqEntry->controlFlags =  MV_CPU_TO_LE16(ControlFlags);
+
+    if ((mvSataChannel->queuedDMA == MV_EDMA_MODE_QUEUED) ||
+        (mvSataChannel->queuedDMA == MV_EDMA_MODE_NATIVE_QUEUING))
+    {
+        if (pUdmaParams->isEXT == MV_TRUE) /* Read/Write DMA QUEUED EXT */
+        {
+            WRITE_ATA_COMMAND_REG(pCommand++,
+                                  (pUdmaParams->numOfSectors & 0xFF00) >> 8,
+                                  MV_EDMA_ATA_FEATURES_ADDR, 0);
+
+            WRITE_ATA_COMMAND_REG(pCommand++,
+                                  (pUdmaParams->numOfSectors) & 0xFF,
+                                  MV_EDMA_ATA_FEATURES_ADDR, 0);
+
+            WRITE_ATA_COMMAND_REG(pCommand++,
+                                  (pCommandEntry->deviceTag << 3) & 0xF8,
+                                  MV_EDMA_ATA_SECTOR_COUNT_ADDR, 0);
+
+            WRITE_ATA_COMMAND_REG(pCommand++,
+                                  (pUdmaParams->lowLBAAddress & 0xFF000000)
+                                  >> 24, MV_EDMA_ATA_LBA_LOW_ADDR, 0);
+
+            WRITE_ATA_COMMAND_REG(pCommand++,
+                                  (pUdmaParams->lowLBAAddress) & 0xFF,
+                                  MV_EDMA_ATA_LBA_LOW_ADDR, 0);
+
+            WRITE_ATA_COMMAND_REG(pCommand++,(pUdmaParams->highLBAAddress &
+                                              0xFF),
+                                  MV_EDMA_ATA_LBA_MID_ADDR, 0);
+
+            WRITE_ATA_COMMAND_REG(pCommand++,
+                                  (pUdmaParams->lowLBAAddress & 0xFF00) >> 8,
+                                  MV_EDMA_ATA_LBA_MID_ADDR, 0);
+
+            WRITE_ATA_COMMAND_REG(pCommand++,
+                                  (pUdmaParams->highLBAAddress & 0xFF00) >> 8,
+                                  MV_EDMA_ATA_LBA_HIGH_ADDR, 0);
+
+            WRITE_ATA_COMMAND_REG(pCommand++,
+                                  (pUdmaParams->lowLBAAddress & 0xFF0000) >>
+                                  16, MV_EDMA_ATA_LBA_HIGH_ADDR, 0);
+
+            if ((mvSataChannel->queuedDMA == MV_EDMA_MODE_NATIVE_QUEUING) &&
+                (pUdmaParams->FUA == MV_TRUE))
+            {
+                WRITE_ATA_COMMAND_REG(pCommand++, MV_BIT7 | MV_BIT6 ,
+                                      MV_EDMA_ATA_DEVICE_ADDR,0);
+            }
+            else
+            {
+                WRITE_ATA_COMMAND_REG(pCommand++, MV_BIT6 ,
+                                      MV_EDMA_ATA_DEVICE_ADDR,0);
+            }
+
+            if (pUdmaParams->readWrite == MV_UDMA_TYPE_READ)
+            {
+                if (mvSataChannel->queuedDMA == MV_EDMA_MODE_NATIVE_QUEUING)
+                {
+                    ATACommand = MV_ATA_COMMAND_READ_FPDMA_QUEUED_EXT;
+                }
+                else
+                {
+                    ATACommand = MV_ATA_COMMAND_READ_DMA_QUEUED_EXT;
+                }
+            }
+            else
+            {
+                if (mvSataChannel->queuedDMA == MV_EDMA_MODE_NATIVE_QUEUING)
+                {
+                    ATACommand = MV_ATA_COMMAND_WRITE_FPDMA_QUEUED_EXT;
+                }
+                else
+                {
+                    ATACommand = MV_ATA_COMMAND_WRITE_DMA_QUEUED_EXT;
+                }
+            }
+        }
+        else /* Read/Write DMA QUEUED */
+        {
+            WRITE_ATA_COMMAND_REG(pCommand++, (pUdmaParams->numOfSectors) &
+                                  0xFF, MV_EDMA_ATA_FEATURES_ADDR, 0);
+
+            WRITE_ATA_COMMAND_REG(pCommand++,
+                                  (pCommandEntry->deviceTag << 3) & 0xF8,
+                                  MV_EDMA_ATA_SECTOR_COUNT_ADDR, 0);
+
+            WRITE_ATA_COMMAND_REG(pCommand++,
+                                  (pUdmaParams->lowLBAAddress) & 0xFF,
+                                  MV_EDMA_ATA_LBA_LOW_ADDR, 0);
+
+            WRITE_ATA_COMMAND_REG(pCommand++,
+                                  (pUdmaParams->lowLBAAddress & 0xFF00) >> 8,
+                                  MV_EDMA_ATA_LBA_MID_ADDR, 0);
+
+            WRITE_ATA_COMMAND_REG(pCommand++,
+                                  (pUdmaParams->lowLBAAddress & 0xFF0000)
+                                  >> 16, MV_EDMA_ATA_LBA_HIGH_ADDR, 0);
+
+            WRITE_ATA_COMMAND_REG(pCommand++, MV_BIT6 |
+                                  (MV_U8)((pUdmaParams->lowLBAAddress & 0xF000000)
+                                          >> 24), MV_EDMA_ATA_DEVICE_ADDR, 0);
+
+            if (pUdmaParams->readWrite == MV_UDMA_TYPE_READ)
+            {
+                ATACommand = MV_ATA_COMMAND_READ_DMA_QUEUED;
+            }
+            else
+            {
+                ATACommand = MV_ATA_COMMAND_WRITE_DMA_QUEUED;
+            }
+        }
+    }
+    else
+    {
+        if (pUdmaParams->isEXT == MV_TRUE)
+        {   /* READ/WRITE DMA EXT */
+            WRITE_ATA_COMMAND_REG(pCommand++,
+                                  (pUdmaParams->numOfSectors & 0xFF00) >> 8,
+                                  MV_EDMA_ATA_SECTOR_COUNT_ADDR, 0);
+
+            WRITE_ATA_COMMAND_REG(pCommand++,
+                                  (pUdmaParams->numOfSectors) & 0xFF,
+                                  MV_EDMA_ATA_SECTOR_COUNT_ADDR, 0);
+
+            WRITE_ATA_COMMAND_REG(pCommand++,
+                                  (pUdmaParams->lowLBAAddress & 0xFF000000)
+                                  >> 24,
+                                  MV_EDMA_ATA_LBA_LOW_ADDR, 0);
+
+            WRITE_ATA_COMMAND_REG(pCommand++,
+                                  (pUdmaParams->lowLBAAddress) &0xFF,
+                                  MV_EDMA_ATA_LBA_LOW_ADDR, 0);
+
+            WRITE_ATA_COMMAND_REG(pCommand++,
+                                  (pUdmaParams->highLBAAddress & 0xFF),
+                                  MV_EDMA_ATA_LBA_MID_ADDR, 0);
+
+            WRITE_ATA_COMMAND_REG(pCommand++,
+                                  (pUdmaParams->lowLBAAddress & 0xFF00) >> 8,
+                                  MV_EDMA_ATA_LBA_MID_ADDR, 0);
+
+            WRITE_ATA_COMMAND_REG(pCommand++,
+                                  (pUdmaParams->highLBAAddress & 0xFF00) >> 8,
+                                  MV_EDMA_ATA_LBA_HIGH_ADDR, 0);
+
+            WRITE_ATA_COMMAND_REG(pCommand++,
+                                  (pUdmaParams->lowLBAAddress & 0xFF0000)
+                                  >> 16,
+                                  MV_EDMA_ATA_LBA_HIGH_ADDR, 0);
+
+            WRITE_ATA_COMMAND_REG(pCommand++, MV_BIT6, MV_EDMA_ATA_DEVICE_ADDR,
+                                  0);
+
+            if (pUdmaParams->readWrite == MV_UDMA_TYPE_READ)
+            {
+                ATACommand = MV_ATA_COMMAND_READ_DMA_EXT;
+            }
+            else
+            {
+                ATACommand = MV_ATA_COMMAND_WRITE_DMA_EXT;
+            }
+        }
+        else /* READ/WRITE DMA */
+        {
+            WRITE_ATA_COMMAND_REG(pCommand++,
+                                  (pUdmaParams->numOfSectors) & 0xFF,
+                                  MV_EDMA_ATA_SECTOR_COUNT_ADDR, 0);
+
+            WRITE_ATA_COMMAND_REG(pCommand++,
+                                  (pUdmaParams->lowLBAAddress) & 0xFF,
+                                  MV_EDMA_ATA_LBA_LOW_ADDR, 0);
+
+            WRITE_ATA_COMMAND_REG(pCommand++,
+                                  (pUdmaParams->lowLBAAddress & 0xFF00) >> 8,
+                                  MV_EDMA_ATA_LBA_MID_ADDR, 0);
+
+            WRITE_ATA_COMMAND_REG(pCommand++,
+                                  (pUdmaParams->lowLBAAddress & 0xFF0000)
+                                  >> 16,
+                                  MV_EDMA_ATA_LBA_HIGH_ADDR, 0);
+
+            WRITE_ATA_COMMAND_REG(pCommand++,
+                                  MV_BIT6 | (MV_U8)((pUdmaParams->lowLBAAddress &
+                                                     0xF000000) >> 24),
+                                  MV_EDMA_ATA_DEVICE_ADDR, 0);
+
+            if (pUdmaParams->readWrite == MV_UDMA_TYPE_READ)
+            {
+                ATACommand = MV_ATA_COMMAND_READ_DMA;
+            }
+            else
+            {
+                ATACommand = MV_ATA_COMMAND_WRITE_DMA;
+            }
+        }
+    }
+    WRITE_ATA_COMMAND_REG(pCommand++, ATACommand, MV_EDMA_ATA_COMMAND_ADDR,
+                          MV_BIT15);
+}
+/*******************************************************************************
+* writeGen2EEdmaRequestEntry  - Write a Gen2E CRQB (COMMAND REQUEST QUEUE BLOCK)
+*
+* DESCRIPTION:
+*       write one CRQB for an EDMA request queue.
+*
+* INPUT:
+*       pReqEntry     - pointer to the CRQB area on the system memory
+*                       (HW reqeust Queue).
+*       mvSataChannel - pointer to the channel data structure
+*       pCommandEntry - pointer to the command entry data structure
+*                       (SW request Queue).
+*       pUdmaParams   - pointer to the UDMA command parameters data structure.
+*
+* RETURN:
+*       None
+*
+* COMMENTS:
+*       None.
+*
+*******************************************************************************/
+static void writeGen2EEdmaRequestEntry(MV_DMA_REQUEST_QUEUE_ENTRY *pReqEntry,
+                                       MV_SATA_CHANNEL *mvSataChannel,
+                                       MV_QUEUED_COMMAND_ENTRY *pCommandEntry,
+                                       MV_UDMA_COMMAND_PARAMS  *pUdmaParams)
+{
+    MV_GEN2E_EDMA_REQUEST_QUEUE_ENTRY *pGen2EReqEntry = (MV_GEN2E_EDMA_REQUEST_QUEUE_ENTRY *)pReqEntry;
+    MV_U32           ControlFlags = 0;
+    MV_U8            ATACommand = 0;
+
+    pGen2EReqEntry->prdLowAddr  = MV_CPU_TO_LE32(pUdmaParams->prdLowAddr);
+    pGen2EReqEntry->prdHighAddr = MV_CPU_TO_LE32(pUdmaParams->prdHighAddr);
+
+    /* Set the direction of the transaction (read/write) */
+    if (pUdmaParams->readWrite == MV_UDMA_TYPE_READ)
+    {
+        ControlFlags |= 0x1; /* Device to system memory */
+    }
+#ifdef MV_SATA_IO_GRANULARITY
+
+    /*If valid IO Granularity transaction Id*/
+    if (pUdmaParams->iogCurrentTransId < MV_IOG_INVALID_COMMAND_ID)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG | MV_DEBUG_UDMA_COMMAND, "%d %d: "
+                 "Edma request with IO granularity Id = 0x%x\n",
+                 mvSataChannel->mvSataAdapter->adapterId,
+                 mvSataChannel->channelNumber, pUdmaParams->iogCurrentTransId);
+        ControlFlags |= (((MV_U16)pUdmaParams->iogCurrentTransId) << 6);
+    }
+#endif
+    /* the tag will be used also in Non-queue EDMA mode    */
+    ControlFlags |= (pCommandEntry->deviceTag << 1);
+    ControlFlags |= (pCommandEntry->pCommandInfo->PMPort << 12);
+    ControlFlags |= (pCommandEntry->hostTag << 17);
+#ifdef MV_SATA_SUPPORT_EDMA_SINGLE_DATA_REGION
+    if (pUdmaParams->singleDataRegion == MV_TRUE)
+    {
+        ControlFlags |= MV_BIT16;
+        pGen2EReqEntry->dataRegionByteCount = MV_CPU_TO_LE16(pUdmaParams->byteCount);
+    }
+#endif
+
+    pGen2EReqEntry->controlFlags =  MV_CPU_TO_LE32(ControlFlags);
+    if ((mvSataChannel->queuedDMA == MV_EDMA_MODE_QUEUED) ||
+        (mvSataChannel->queuedDMA == MV_EDMA_MODE_NATIVE_QUEUING))
+    {
+        if (pUdmaParams->isEXT == MV_TRUE) /* Read/Write DMA QUEUED EXT */
+        {
+            pGen2EReqEntry->ATAFeaturesExp = (MV_U8)((pUdmaParams->numOfSectors & 0xFF00) >> 8);
+            pGen2EReqEntry->ATAFeatures = (MV_U8)((pUdmaParams->numOfSectors) & 0xFF);
+            pGen2EReqEntry->ATASectorCount = (MV_U8)((pCommandEntry->deviceTag << 3) & 0xF8);
+            pGen2EReqEntry->ATALBALowExp = (MV_U8)((pUdmaParams->lowLBAAddress & 0xFF000000) >> 24);
+            pGen2EReqEntry->ATALBALow = (MV_U8)((pUdmaParams->lowLBAAddress) & 0xFF);
+            pGen2EReqEntry->ATALBAMidExp = (MV_U8)(pUdmaParams->highLBAAddress & 0xFF);
+            pGen2EReqEntry->ATALBAMid = (MV_U8)((pUdmaParams->lowLBAAddress & 0xFF00) >> 8);
+            pGen2EReqEntry->ATALBAHighExp = (MV_U8)((pUdmaParams->highLBAAddress & 0xFF00) >> 8);
+            pGen2EReqEntry->ATALBAHigh = (MV_U8)((pUdmaParams->lowLBAAddress & 0xFF0000) >> 16);
+            if ((mvSataChannel->queuedDMA == MV_EDMA_MODE_NATIVE_QUEUING) &&
+                (pUdmaParams->FUA == MV_TRUE))
+            {
+                pGen2EReqEntry->ATADevice = MV_BIT7 | MV_BIT6;
+
+            }
+            else
+            {
+                pGen2EReqEntry->ATADevice = MV_BIT6;
+
+            }
+
+            if (pUdmaParams->readWrite == MV_UDMA_TYPE_READ)
+            {
+                if (mvSataChannel->queuedDMA == MV_EDMA_MODE_NATIVE_QUEUING)
+                {
+                    ATACommand = MV_ATA_COMMAND_READ_FPDMA_QUEUED_EXT;
+                }
+                else
+                {
+                    ATACommand = MV_ATA_COMMAND_READ_DMA_QUEUED_EXT;
+                }
+            }
+            else
+            {
+                if (mvSataChannel->queuedDMA == MV_EDMA_MODE_NATIVE_QUEUING)
+                {
+                    ATACommand = MV_ATA_COMMAND_WRITE_FPDMA_QUEUED_EXT;
+                }
+                else
+                {
+                    ATACommand = MV_ATA_COMMAND_WRITE_DMA_QUEUED_EXT;
+                }
+            }
+        }
+        else /* Read/Write DMA QUEUED */
+        {
+            pGen2EReqEntry->ATAFeatures = (MV_U8)((pUdmaParams->numOfSectors) & 0xFF);
+            pGen2EReqEntry->ATASectorCount = (MV_U8)((pCommandEntry->deviceTag << 3) & 0xF8);
+            pGen2EReqEntry->ATALBALow = (MV_U8)((pUdmaParams->lowLBAAddress) & 0xFF);
+            pGen2EReqEntry->ATALBAMid = (MV_U8)((pUdmaParams->lowLBAAddress & 0xFF00) >> 8);
+            pGen2EReqEntry->ATALBAHigh = (MV_U8)((pUdmaParams->lowLBAAddress & 0xFF0000) >> 16);
+            pGen2EReqEntry->ATADevice = MV_BIT6 |
+                                        (MV_U8)((pUdmaParams->lowLBAAddress & 0xF000000) >> 24);
+
+            if (pUdmaParams->readWrite == MV_UDMA_TYPE_READ)
+            {
+                ATACommand = MV_ATA_COMMAND_READ_DMA_QUEUED;
+            }
+            else
+            {
+                ATACommand = MV_ATA_COMMAND_WRITE_DMA_QUEUED;
+            }
+        }
+    }
+    else
+    {
+        if (pUdmaParams->isEXT == MV_TRUE)
+        {   /* READ/WRITE DMA EXT */
+            pGen2EReqEntry->ATASectorCountExp = (MV_U8)((pUdmaParams->numOfSectors & 0xFF00) >> 8);
+            pGen2EReqEntry->ATASectorCount = (MV_U8)((pUdmaParams->numOfSectors) & 0xFF);
+            pGen2EReqEntry->ATALBALowExp = (MV_U8)((pUdmaParams->lowLBAAddress & 0xFF000000) >> 24);
+            pGen2EReqEntry->ATALBALow = (MV_U8)((pUdmaParams->lowLBAAddress) & 0xFF);
+            pGen2EReqEntry->ATALBAMidExp = (MV_U8)(pUdmaParams->highLBAAddress & 0xFF);
+            pGen2EReqEntry->ATALBAMid = (MV_U8)((pUdmaParams->lowLBAAddress & 0xFF00) >> 8);
+            pGen2EReqEntry->ATALBAHighExp = (MV_U8)((pUdmaParams->highLBAAddress & 0xFF00) >> 8);
+            pGen2EReqEntry->ATALBAHigh = (MV_U8)((pUdmaParams->lowLBAAddress & 0xFF0000) >> 16);
+            pGen2EReqEntry->ATADevice = MV_BIT6;
+
+            if (pUdmaParams->readWrite == MV_UDMA_TYPE_READ)
+            {
+                ATACommand = MV_ATA_COMMAND_READ_DMA_EXT;
+            }
+            else
+            {
+                ATACommand = MV_ATA_COMMAND_WRITE_DMA_EXT;
+            }
+        }
+        else /* READ/WRITE DMA */
+        {
+            pGen2EReqEntry->ATASectorCount = (MV_U8)((pUdmaParams->numOfSectors) & 0xFF);
+            pGen2EReqEntry->ATALBALow = (MV_U8)((pUdmaParams->lowLBAAddress) & 0xFF);
+            pGen2EReqEntry->ATALBAMid = (MV_U8)((pUdmaParams->lowLBAAddress & 0xFF00) >> 8);
+            pGen2EReqEntry->ATALBAHigh = (MV_U8)((pUdmaParams->lowLBAAddress & 0xFF0000) >> 16);
+            pGen2EReqEntry->ATADevice = MV_BIT6 |
+                                        (MV_U8)((pUdmaParams->lowLBAAddress & 0xF000000) >> 24);
+
+            if (pUdmaParams->readWrite == MV_UDMA_TYPE_READ)
+            {
+                ATACommand = MV_ATA_COMMAND_READ_DMA;
+            }
+            else
+            {
+                ATACommand = MV_ATA_COMMAND_WRITE_DMA;
+            }
+        }
+    }
+    pGen2EReqEntry->ATACommand = ATACommand;
+}
+
+/*******************************************************************************
+* handleEdmaFailedCommand - Handle failed EDMA command which didn't commpleted.
+*
+* DESCRIPTION:
+*       This function handles the completion of failed EDMA command when no
+*       response received for that command.
+*
+* INPUT:
+*       pAdapter     - Pointer to the MV88SX50XX adapter data structure.
+*       channelIndex - The index of the channel where the response received.
+*       eDmaErrorCause - the value of the channel EDMA error cause register.
+*
+* RETURN:
+*       None
+*
+* COMMENTS:
+*       This function assumes that the channel semaphore is locked.
+*
+*******************************************************************************/
+static void handleEdmaFailedCommand(MV_SATA_ADAPTER *pAdapter,
+                                    MV_U8 channelIndex, MV_U16 eDmaErrorCause)
+{
+    MV_QUEUED_COMMAND_ENTRY       *pCommandEntry;
+    MV_UDMA_COMMAND_PARAMS        *pUdmaCommandParams;
+    MV_SATA_CHANNEL               *pSataChannel = pAdapter->sataChannel[channelIndex];
+    MV_STORAGE_DEVICE_REGISTERS   deviceRegs;
+    MV_U32      eDmaStatus;
+    MV_U8      deviceTag = 0xFF;
+    MV_U8      hostTag;
+    MV_U8       PMPort = 0;
+
+    if (pSataChannel->PMSupported == MV_TRUE)
+    {
+        MV_U32 regVal = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                          pSataChannel->eDmaRegsOffset +
+                                          MV_SATA_II_IF_STATUS_REG_OFFSET);
+        PMPort = (MV_U8)getRegField(regVal, 8, 4); 
+    }
+    eDmaStatus = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                   pSataChannel->eDmaRegsOffset +
+                                   MV_EDMA_STATUS_REG_OFFSET);
+
+    switch (pSataChannel->queuedDMA)
+    {
+    case MV_EDMA_MODE_QUEUED:
+        /* if only one command is queued*/
+        if (pSataChannel->portQueuedCommands[PMPort] == 1)
+        {
+            MV_QUEUED_COMMAND_ENTRY *pEntry = pSataChannel->commandsQueueHead;
+            while (pEntry != NULL)
+            {
+                if (pEntry->isCommandInEdma == MV_TRUE)
+                {
+                    if (pEntry->pCommandInfo->PMPort == PMPort)
+                    {
+                        deviceTag = pEntry->deviceTag;
+                        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                                 "%d %d %d: handleEdmaFailedCommand, found "
+                                 "single erring command in TCQ mode "
+                                 "deviceTag(0x%02x)\n",
+                                 pSataChannel->mvSataAdapter->adapterId,
+                                 pSataChannel->channelNumber,
+                                 PMPort,
+                                 deviceTag);
+                        break;
+                    }
+                }
+                else
+                {
+                    /* stop once reached a command that has not been inserted into the
+                        EDMA since the next commands also must be outside the EDMA
+                    */
+                    break;
+                }
+                pEntry = pEntry->next;
+            }
+            if (deviceTag == 0xFF)
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR,
+                         "%d %d %d: handleEdmaFailedCommand, failed to find "
+                         "device tag of single erring command in TCQ mode\n",
+                         pSataChannel->mvSataAdapter->adapterId,
+                         pSataChannel->channelNumber,
+                         PMPort);
+                return;
+            }
+        }
+        else
+        {
+            /*multiple commands are queued, take the tag from the disk*/
+            deviceTag = MV_REG_READ_BYTE(pAdapter->adapterIoBaseAddress,
+                                         pSataChannel->eDmaRegsOffset +
+                                         MV_ATA_DEVICE_SECTOR_COUNT_REG_OFFSET);
+            deviceTag >>= 3;
+            deviceTag &= 0x1F;
+        }
+        break;
+    case MV_EDMA_MODE_NOT_QUEUED:
+        deviceTag = (MV_U8)getRegField(eDmaStatus, 0, 5);
+        break;
+    default:
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d: "
+                 "handleEdmaFailedCommand: called with wrong mode %d\n",
+                 pAdapter->adapterId,
+                 channelIndex,
+                 pSataChannel->queuedDMA);
+        return;
+    }
+
+    if (_getHostTagByDeviceTag(pSataChannel,
+                               deviceTag,
+                               PMPort,
+                               &hostTag) == MV_FALSE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d %d: "
+                 "handleEdmaFailedCommand: "
+                 "Error - None Valid device tag (0x%02x)\n",
+                 pAdapter->adapterId,
+                 channelIndex,
+                 PMPort,
+                 deviceTag);
+        return;
+    }
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "%d %d: Handle failed command,"
+             "host tag 0x%02x, error cause 0x%02x (eStatus Tag 0x%02x)\n",
+             pAdapter->adapterId, channelIndex, hostTag,
+             eDmaErrorCause, (eDmaStatus & MV_EDMA_STATUS_TAG_MASK) >>
+             MV_EDMA_STATUS_TAG_OFFSET);
+    /* this function called only if FBS mode disable, then device tag equals to*/
+    /* host tag*/
+    pCommandEntry = &(pSataChannel->commandsQueue[hostTag]);
+    if (pCommandEntry->isFreeEntry == MV_TRUE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "%d %d %d:"
+                 " Received response on a non-valid tag (0x%x),"
+                 " device Tag (0x%x)\n",
+                 pAdapter->adapterId,
+                 channelIndex,
+                 PMPort,
+                 hostTag,
+                 deviceTag);
+
+        _dumpSataRegs(pAdapter,channelIndex);
+        dumpAtaDeviceRegisters(pAdapter, channelIndex, MV_TRUE, &deviceRegs);
+        _printATARegs(&deviceRegs);
+        return;
+    }
+    if (pSataChannel->PMSupported == MV_TRUE)
+    {
+        _setActivePMPort(pSataChannel, pCommandEntry->pCommandInfo->PMPort);
+    }
+    pUdmaCommandParams = &pCommandEntry->pCommandInfo->commandParams.udmaCommand;
+    dumpAtaDeviceRegisters(pAdapter, channelIndex, pUdmaCommandParams->isEXT,
+                           &deviceRegs);
+
+    pSataChannel->EdmaQueuedCommands--;
+    pUdmaCommandParams->callBack(pSataChannel->mvSataAdapter, channelIndex,
+                                 MV_COMPLETION_TYPE_ERROR,
+                                 pUdmaCommandParams->commandId, eDmaErrorCause,
+                                 0, &deviceRegs);
+    removeCommand(pSataChannel,pCommandEntry);
+}
+
+/*******************************************************************************
+* handleEdmaResponse - Handle an EDMA response queue entry.
+*
+* DESCRIPTION:
+*       This function handles the completion of EDMA command when a response
+*       entry is received.
+*
+* INPUT:
+*       pAdapter     - Pointer to the MV88SX50XX adapter data structure.
+*       channelIndex - The index of the channel where the response received.
+*       response     - Pointer to the received EDMA response block structure.
+*
+* RETURN:
+*       None
+*
+* COMMENTS:
+*       This function assumes that the channel semaphore is locked.
+*
+*******************************************************************************/
+static void handleEdmaResponse(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex,
+                               MV_DMA_RESPONSE_QUEUE_ENTRY *eDmaResponse)
+{
+    MV_QUEUED_COMMAND_ENTRY       *pCommandEntry;
+    MV_UDMA_COMMAND_PARAMS        *pUdmaCommandParams;
+    MV_STORAGE_DEVICE_REGISTERS   deviceRegs;
+    MV_COMPLETION_TYPE            compType = MV_COMPLETION_TYPE_NORMAL;
+    MV_SATA_CHANNEL         *pSataChannel = pAdapter->sataChannel[channelIndex];
+    MV_DMA_RESPONSE_QUEUE_ENTRY   response;
+    MV_U16                        eDmaCause = 0;
+
+    response.id    = MV_LE16_TO_CPU(eDmaResponse->id);
+    response.responseFlags = MV_LE16_TO_CPU(eDmaResponse->responseFlags);
+    response.timeStamp     = MV_LE32_TO_CPU(eDmaResponse->timeStamp);
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, "%d %d: New Response Received. ptr %p, "
+             "id 0x%02x, flags 0x%x ts 0x%08x\n", pAdapter->adapterId,
+             channelIndex, eDmaResponse, response.id,
+             response.responseFlags, response.timeStamp);
+
+    eDmaCause = (response.responseFlags & 0xff);
+    pCommandEntry = &(pSataChannel->commandsQueue[response.id & pSataChannel->EDMAQueuePtrMask]);
+    if (response.responseFlags & 0xFF)
+    {
+        MV_BOOLEAN ignoreErrorInFlags = MV_FALSE;
+
+        /* response with errors, ignore SErrors since they are recoverable*/
+        if ((pAdapter->sataAdapterGeneration != MV_SATA_GEN_I) &&
+            (response.responseFlags & MV_BIT5) &&
+            ((response.responseFlags & 0xDF) == 0))
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                     "%d %d: Ignore Serror in response flags\n",
+                     pAdapter->adapterId, channelIndex);
+            ignoreErrorInFlags = MV_TRUE;
+            /* SError in EDMA error cause is masked. so we need to handle it here*/
+            pSataChannel->recoveredErrorsCounter = 0; 
+            handleRecoverableError(pAdapter, channelIndex, MV_BIT5);
+            /* clear SError bit in EDMA error cause*/
+            MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                               pSataChannel->eDmaRegsOffset + 
+                               MV_EDMA_INTERRUPT_ERROR_CAUSE_REG_OFFSET,
+                               ~MV_BIT5);
+
+        }
+        /* in NCQ mode, Device error doesn't halt the EDMA operation. since the*/
+        /* response flags are a snapshot of the EDMA error cause, then this */
+        /* error (Device error) is ignored   */
+        if ((pSataChannel->queuedDMA == MV_EDMA_MODE_NATIVE_QUEUING) &&
+            (response.responseFlags & MV_BIT2) &&
+            ((response.responseFlags & 0xDB) == 0))
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                     "%d %d: Ignore Device Error in response flags.\n",
+                     pAdapter->adapterId, channelIndex);
+            ignoreErrorInFlags = MV_TRUE;
+        }
+
+        if ((pSataChannel->queuedDMA != MV_EDMA_MODE_NATIVE_QUEUING) &&
+            (pSataChannel->FBSEnabled == MV_TRUE) &&
+            (response.responseFlags & MV_BIT2) &&
+            ((response.responseFlags & 0xDB) == 0))
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                     "%d %d: Device Error in response flags in FBS none NCQ mode."
+                     "outstanding commands %d \n",
+                     pAdapter->adapterId, channelIndex,
+                     pSataChannel->outstandingCommands);
+            ignoreErrorInFlags = MV_TRUE;
+            compType = MV_COMPLETION_TYPE_ERROR;
+        }
+
+        if (ignoreErrorInFlags == MV_FALSE)
+        {
+            pSataChannel->queueCommandsEnabled = MV_FALSE;
+            pSataChannel->EdmaActive = MV_FALSE;
+            compType = MV_COMPLETION_TYPE_ERROR;
+
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                     "%d %d: Response with Error. outstanding commands %d, "
+                     "response flags 0x%x\n",
+                     pAdapter->adapterId, channelIndex,
+                     pSataChannel->outstandingCommands, response.responseFlags);
+
+            /*
+             * link & phy layers unrecoverable errors may be the reason for a
+             * device errors, so we first check if any unrecoverable errors occured,
+             * except PCI/internal parity, if yes then we don't count this response
+             * the PCI/internal parity errors excluded since we want to complete
+             * the commands with error indication so higher layers can receive it
+             */
+            {
+                MV_U32  edmaErrorCause = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                                           pSataChannel->eDmaRegsOffset +
+                                                           MV_EDMA_INTERRUPT_ERROR_CAUSE_REG_OFFSET);
+                MV_U32  unrecoverableErrorMask;
+                if (pAdapter->sataAdapterGeneration == MV_SATA_GEN_I)
+                {
+                    unrecoverableErrorMask = MV_EDMA_GEN_I_UNRECOVERABLE_EDMA_ERROR;
+                }
+                else
+                {
+                    unrecoverableErrorMask = MV_EDMA_GEN_II_UNRECOVERABLE_EDMA_ERROR;
+                }
+                unrecoverableErrorMask &= ~(MV_BIT1|MV_BIT0);
+                if (edmaErrorCause & unrecoverableErrorMask)
+                {
+                    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                             "%d %d: Response ignored due to unrecoverable error,"
+                             " EDMA Error Cause: 0x%08x\n",
+                             pAdapter->adapterId, channelIndex,
+                             edmaErrorCause);
+                    return;
+                }
+            }
+
+            /*
+             * responseFlags will hold the low 8 bit of the EDMA error cause
+             * regiter. For 88SX50XX set bit 8 sence each error causes to
+             * eDmaSelfDisable.
+             */
+            eDmaCause = (response.responseFlags & 0xff);
+            if (pAdapter->sataAdapterGeneration == MV_SATA_GEN_I)
+            {
+                eDmaCause |= MV_BIT8;
+            }
+            else
+            {
+                eDmaCause |= MV_BIT7;
+            }
+            if (pSataChannel->PMSupported == MV_TRUE)
+            {
+                _setActivePMPort(pSataChannel, pCommandEntry->pCommandInfo->PMPort);
+            }
+        }
+    }
+    pUdmaCommandParams = &pCommandEntry->pCommandInfo->commandParams.udmaCommand;
+    if (response.responseFlags & MV_BIT2) /*device error */
+    {
+        if (pSataChannel->queuedDMA != MV_EDMA_MODE_NATIVE_QUEUING)
+        {
+            dumpAtaDeviceRegisters(pAdapter, channelIndex, MV_TRUE, &deviceRegs);
+
+            if (pSataChannel->FBSEnabled == MV_TRUE)
+            {
+                if (pSataChannel->queuedDMA == MV_EDMA_MODE_NOT_QUEUED)
+                {
+                    if (pSataChannel->ErrorHandlingInfo.state == MV_ERROR_HANDLING_STATE_IDLE)
+                    {
+                        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                                 "%d %d: First error\n", pAdapter->adapterId,
+                                 channelIndex);
+                        pSataChannel->ErrorHandlingInfo.state = MV_ERROR_HANDLING_STATE_WAIT_FOR_COMPLETIONS;
+                    }
+                    /*let transport layer resume*/
+                    setAbortedCommands(pSataChannel);
+                }
+                else
+                {
+                    /*in TCQ/FBS mode, ignore responses with device error*/
+                    return;
+                }
+
+            }
+        }
+    }
+
+    if (pCommandEntry->isFreeEntry == MV_TRUE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR,
+                 "%d %d: Received response on a non-valid tag (%x), ts 0x%08x,"
+                 " address %p\n", pAdapter->adapterId, channelIndex,
+                 response.id, response.timeStamp, eDmaResponse);
+        _dumpEDMARegs(pAdapter, channelIndex);
+        _dumpChannelQueues(pAdapter, channelIndex);
+    }
+    else
+    {
+        pSataChannel->EdmaQueuedCommands--;
+
+        pUdmaCommandParams->callBack(pSataChannel->mvSataAdapter, channelIndex,
+                                     compType, pUdmaCommandParams->commandId,
+                                     eDmaCause, response.timeStamp, &deviceRegs);
+        removeCommand(pSataChannel,pCommandEntry);
+
+        if (pSataChannel->queueCommandsEnabled == MV_FALSE)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG|MV_DEBUG_UDMA_COMMAND,
+                     "%d %d: Commands queuing is disabled\n",
+                     pSataChannel->mvSataAdapter->adapterId,
+                     pSataChannel->channelNumber);
+            return;
+        }
+
+        if (pSataChannel->ErrorHandlingInfo.state != MV_ERROR_HANDLING_STATE_IDLE)
+        {
+            if (compType == MV_COMPLETION_TYPE_NORMAL)
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                         "%d %d: Commands with Tag 0x%x completed successfly\n",
+                         pSataChannel->mvSataAdapter->adapterId,
+                         pSataChannel->channelNumber, response.id & 0x1f);
+            }
+            if (pSataChannel->ErrorHandlingInfo.state ==
+                MV_ERROR_HANDLING_STATE_WAIT_FOR_COMPLETIONS)
+            {
+                if (isGoodCompletionsExpected(pSataChannel) == MV_FALSE)
+                {
+                    enterRequestSenseState(pSataChannel);
+                    return;
+                }
+            }
+        }
+        if (pSataChannel->commandsQueueHead == NULL)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG|MV_DEBUG_UDMA_COMMAND,
+                     "%d %d: Commands queue is empty\n",
+                     pSataChannel->mvSataAdapter->adapterId,
+                     pSataChannel->channelNumber);
+            return;
+        }
+        if (pSataChannel->commandsQueueHead->pCommandInfo->type !=
+            MV_QUEUED_COMMAND_TYPE_UDMA)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG|MV_DEBUG_UDMA_COMMAND,
+                     "%d %d: Next Command isn't DMA\n",
+                     pSataChannel->mvSataAdapter->adapterId,
+                     pSataChannel->channelNumber);
+            deactivateEdma(pAdapter,channelIndex);
+            if (pSataChannel->PMSupported == MV_TRUE)
+            {
+                _setActivePMPort(pSataChannel,
+                                 pSataChannel->commandsQueueHead->pCommandInfo->PMPort);
+            }
+            if (sendNoneUdmaCommand(pSataChannel,
+                                    pSataChannel->commandsQueueHead) == MV_FALSE)
+            {
+                completePIOCommand(pSataChannel, pSataChannel->commandsQueueHead,
+                                   MV_TRUE);
+            }
+
+        }
+        else
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG|MV_DEBUG_UDMA_COMMAND,
+                     "%d %d: Next Command is UDMA nothing to do\n",
+                     pSataChannel->mvSataAdapter->adapterId,
+                     pSataChannel->channelNumber);
+
+        }
+    }
+}
+
+
+#ifdef MV_SATA_C2C_COMM
+/*******************************************************************************
+* handleBmDmaInterrupt - handle DMA interrupt received for a given channel
+*
+* DESCRIPTION:
+*   This function is called when response interrupt is issued when C2C DMA
+*   completion event occurs.
+*
+* INPUT:
+*   pAdapter   - pointer to the MV88SX50XX adapter data structure
+*   ioBaseAddr  - adapter rbase address
+*   pSataChannel  - SATA channel structure
+*   channelIndex  - SATA channel index
+*   edmaError   - if != zero then EDMA error happened.
+*
+* RETURN:
+*   None.
+*
+* COMMENTS:
+*   None
+*
+*******************************************************************************/
+
+static void handleBmDMAInterrupt(MV_SATA_ADAPTER *pAdapter,
+                                 MV_BUS_ADDR_T   ioBaseAddr,
+                                 MV_SATA_CHANNEL *pSataChannel,
+                                 MV_U8   channelIndex,
+                                 MV_U32 edmaError)
+{
+    MV_U32  val;
+    MV_U32  eDmaErrorCause = 0;
+    mvOsSemTake(&pSataChannel->semaphore);
+    /*Reset BM dma*/
+    _clearRegBits(ioBaseAddr,
+                  getEdmaRegOffset(channelIndex) +
+                  MV_BMDMA_COMMAND_OFFSET, MV_BIT0);
+
+    MV_REG_WRITE_DWORD(ioBaseAddr,
+                       getEdmaRegOffset(channelIndex) +
+                       MV_SATA_II_IF_CONTROL_REG_OFFSET,
+                       0);
+    if (edmaError)
+    {
+        eDmaErrorCause = (MV_U16)MV_REG_READ_DWORD(ioBaseAddr,
+                                                   getEdmaRegOffset(channelIndex) +
+                                                   MV_EDMA_INTERRUPT_ERROR_CAUSE_REG_OFFSET);
+    }
+    mvOsSemRelease(&pSataChannel->semaphore);
+    if (pSataChannel->C2CCallback)
+    {
+        if (!edmaError)
+        {
+            pSataChannel->C2CCallback(pAdapter,
+                                      pSataChannel,
+                                      MV_C2C_BM_DMA_DONE,
+                                      0,
+                                      NULL);
+        }
+        else
+        {
+            if (eDmaErrorCause & (MV_BIT17 | MV_BIT26))
+            {
+                pSataChannel->C2CCallback(pAdapter,
+                                          pSataChannel,
+                                          MV_C2C_BM_DMA_ERROR,
+                                          0,
+                                          NULL);
+            }
+            if (eDmaErrorCause & (MV_BIT13 | MV_BIT21))
+            {
+                pSataChannel->C2CCallback(pAdapter,
+                                          pSataChannel,
+                                          MV_C2C_REGISTER_DEVICE_TO_HOST_FIS_ERROR,
+                                          0,
+                                          NULL);
+            }
+        }
+    }
+}
+#endif
+
+
+/*******************************************************************************
+* handleEdmaInterrupt - handle EDMA interrupt receivd for a given channel
+*
+* DESCRIPTION:
+*   this function called when response interrupt issuesed for a channel and it
+*    handles all EDMA responses.
+*
+* INPUT:
+*   *pAdapter   - pointer to the MV88SX50XX adapter data structure
+*   sataUnit    - the SATAHC unit this channel belongs to
+*   port        - the port number of the channel
+*   rspInPtr    - the value of eRPQIP of the channel
+*   responseDone   - if != zero then responses received on this channel
+*   edmaError   - if != zero then EDMA error happened.
+*
+* RETURN:
+*   None.
+*
+* COMMENTS:
+*   None.
+*
+*******************************************************************************/
+static void handleEdmaInterrupt(MV_SATA_ADAPTER *pAdapter, MV_U8 sataUnit,
+                                MV_U8 port,MV_U8 rspInPtr, MV_U32 responseDone,
+                                MV_U32 edmaError, MV_U32 unitCause)
+{
+    MV_U8   rspOutPtr;
+    MV_U8   channelIndex;
+    MV_BUS_ADDR_T   ioBaseAddr = pAdapter->adapterIoBaseAddress;
+    MV_U32  eDmaRegsOffset;
+    MV_SATA_CHANNEL *pSataChannel;
+    MV_BOOLEAN responseWithErr = MV_FALSE;
+
+    channelIndex = MV_CHANNEL_INDEX(sataUnit, port);
+    pSataChannel = pAdapter->sataChannel[channelIndex];
+
+    if (responseDone && (pSataChannel != NULL))/* port Done*/
+    {
+        mvOsSemTake(&pSataChannel->semaphore);
+        pSataChannel->recoveredErrorsCounter = 0;
+#ifdef MV_SATA_C2C_COMM
+        if (MV_FALSE == pSataChannel->C2CmodeEnabled)
+        {
+#endif
+#ifdef  MV_SUPPORT_ATAPI
+            if ((pSataChannel->commandsQueueHead) && (pSataChannel->commandsQueueHead->pCommandInfo->type == MV_QUEUED_COMMAND_TYPE_PACKET))
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG,
+                        "%d %d: Basic DMA Interrupt\n",
+                        pSataChannel->mvSataAdapter->adapterId,
+                        pSataChannel->channelNumber);
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG,
+                        " BMDMA status 0x%08x\n",
+                        MV_REG_READ_DWORD (ioBaseAddr,
+                                            getEdmaRegOffset(pSataChannel->channelNumber) +
+                                            MV_BMDMA_STATUS_OFFSET));
+                if( pSataChannel->waitForBMDMA == MV_TRUE)
+                {
+                   completePacketCommand(pSataChannel, pSataChannel->commandsQueueHead, MV_FALSE);
+                }
+            }
+            else
+            {
+#endif     
+            eDmaRegsOffset = pSataChannel->eDmaRegsOffset;
+            rspOutPtr = pSataChannel->rspOutPtr;
+            rspInPtr &= pSataChannel->EDMAQueuePtrMask;
+            /* here we should update the response out pointer though we didn't*/
+            /* handled the new responses, these response entries will not be  */
+            /* accessed again by the EDMA sinse the number of queued commands */
+            /* (outstandingCommands) will be updated only after we handle each*/
+            /* response entry                                                 */
+            MV_REG_WRITE_DWORD(ioBaseAddr, eDmaRegsOffset +
+                               MV_EDMA_RESPONSE_Q_OUTP_REG_OFFSET,
+                               pSataChannel->responseQueuePciLowAddress |
+                               (rspInPtr << MV_EDMA_RESPONSE_Q_OUTP_OFFSET));
+
+            while (rspOutPtr != rspInPtr)
+            {
+                /*handleEdmaResponse may change the channel rspOutPtr due to */
+                /*device error in NCQ mode or FBS*/
+                pSataChannel->rspOutPtr = (rspOutPtr + 1) & pSataChannel->EDMAQueuePtrMask;
+                handleEdmaResponse(pAdapter, channelIndex,
+                                   &(pSataChannel->responseQueue[rspOutPtr]));
+                rspOutPtr++;
+                rspOutPtr &= pSataChannel->EDMAQueuePtrMask;
+            }
+#ifdef  MV_SUPPORT_ATAPI
+            }
+#endif 
+            /*
+             * Check if queueCommandsEnabled flag is disabled.
+             * If so, then an error has occured and auto flush must be triggered.
+             * Basically it is enough to trigger auto flush upon edmaError flag,
+             * but since edmaError is set before handleEdmaResponse is called
+             * there could be a racing condition between the time edmaError is checked
+             * and the response queue is checked.
+             * The racing condition is that an error does not occur when setting
+             * edmaError to MV_FALSE, but in handlEdmaResponse, the hardware
+             * has completed a command with error.
+             * The racing condition will complete the error command (through callback)
+             * but will prevent the auto flush of all outstanding commands.
+             */
+            if (pSataChannel->queueCommandsEnabled == MV_FALSE)
+            {
+                responseWithErr = MV_TRUE;
+            }
+            mvOsSemRelease(&pSataChannel->semaphore);
+#ifdef MV_SATA_C2C_COMM
+        }
+        else
+        {
+            mvOsSemRelease(&pSataChannel->semaphore);
+            handleBmDMAInterrupt(pAdapter,
+                                 ioBaseAddr,
+                                 pSataChannel,
+                                 channelIndex,
+                                 edmaError);
+        }
+#endif
+    }
+
+    if ((edmaError) ||  (responseWithErr == MV_TRUE))   /* EDMA error interrupt*/
+    {
+        handleEdmaError(pAdapter,channelIndex );
+    }
+}
+
+static void handleEdmaError(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex)
+{
+    MV_SATA_CHANNEL *pSataChannel;
+    MV_U32 eDmaErrorCause = 0;
+    MV_BUS_ADDR_T   ioBaseAddr = pAdapter->adapterIoBaseAddress;
+
+    pSataChannel = pAdapter->sataChannel[channelIndex];
+
+    eDmaErrorCause = MV_REG_READ_DWORD(ioBaseAddr,
+                                       getEdmaRegOffset(channelIndex) +
+                                       MV_EDMA_INTERRUPT_ERROR_CAUSE_REG_OFFSET);
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+             "%d %d: Edma Error Reg 0x%x\n", pAdapter->adapterId,
+             channelIndex, MV_REG_READ_DWORD(ioBaseAddr,
+                                             getEdmaRegOffset(channelIndex) +
+                                             MV_EDMA_INTERRUPT_ERROR_CAUSE_REG_OFFSET));
+    /* clear the channel's error cause register */
+    MV_REG_WRITE_DWORD(ioBaseAddr,
+                       getEdmaRegOffset(channelIndex) +
+                       MV_EDMA_INTERRUPT_ERROR_CAUSE_REG_OFFSET,
+                       ~eDmaErrorCause);
+    /*if PM connected, connect/disconnect interrupts storm could happen*/
+    if (MV_REG_READ_DWORD(ioBaseAddr,
+                          getEdmaRegOffset(channelIndex) +
+                          MV_EDMA_INTERRUPT_ERROR_CAUSE_REG_OFFSET) &
+        (MV_BIT3 & MV_BIT4))
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                 "%d %d: Edma Error Reg 0x%x still set!!!!!!!!\n",
+                 pAdapter->adapterId, channelIndex,
+                 MV_REG_READ_DWORD(ioBaseAddr,
+                                   getEdmaRegOffset(channelIndex) +
+                                   MV_EDMA_INTERRUPT_ERROR_CAUSE_REG_OFFSET));
+        if (pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II)
+        {
+            /*wait 20ms till diconnect/connect interrupts finish*/
+            mvMicroSecondsDelay(pAdapter, 20000);
+            eDmaErrorCause |= MV_REG_READ_DWORD(ioBaseAddr,
+                                                getEdmaRegOffset(channelIndex) +
+                                                MV_EDMA_INTERRUPT_ERROR_CAUSE_REG_OFFSET);
+            MV_REG_WRITE_DWORD(ioBaseAddr,
+                               getEdmaRegOffset(channelIndex) +
+                               MV_EDMA_INTERRUPT_ERROR_CAUSE_REG_OFFSET,
+                               ~eDmaErrorCause);
+        }
+    }
+    /* dump in case any kind of parity error*/
+    if (eDmaErrorCause & (MV_BIT11 | MV_BIT10 | MV_BIT9 | MV_BIT1 | MV_BIT0))
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR," PARITY ERROR Detected\n");
+        _dumpPCIRegs(pAdapter);
+        _dumpEDMARegs(pAdapter,channelIndex);
+        _dumpChannelQueues(pAdapter,channelIndex);
+    }
+    if (eDmaErrorCause & MV_BIT3) /*device disconneted*/
+    {
+        handleDisconnect(pAdapter, channelIndex);
+        if (mvSataIsStorageDeviceConnected(pAdapter,channelIndex, NULL) == MV_FALSE)
+        {
+            pAdapter->mvSataEventNotify(pAdapter,
+                                        MV_EVENT_TYPE_SATA_CABLE,
+                                        MV_SATA_CABLE_EVENT_DISCONNECT,
+                                        channelIndex);
+            return;
+        }
+    }
+    if (eDmaErrorCause & MV_BIT4) /*device conneted*/
+    {
+        handleConnect(pAdapter, channelIndex);
+        return;
+    }
+    /* unrecoverable error*/
+    if (handleUnrecoverableError(pAdapter,channelIndex ,eDmaErrorCause ) == MV_TRUE)
+    {
+        return;
+    }
+
+    /*PM hot plug*/
+    if (handleAsyncNotify(pAdapter,channelIndex ,eDmaErrorCause ) == MV_TRUE)
+    {
+        return;
+    }
+    /* device errors in none NCQ mode generate self disable interrupt*/
+    if (handleSelfDisable(pAdapter,channelIndex ,eDmaErrorCause ) == MV_TRUE)
+    {
+        return;
+    }
+    /* Neither device error without completion nor self disable must be in NCQ
+    *  mode and Port multiplier connected
+    */
+    if (handleDevErr(pAdapter,channelIndex ,eDmaErrorCause ) == MV_TRUE)
+    {
+        return;
+    }
+    /* recoverable error*/
+    if (handleRecoverableError(pAdapter,channelIndex ,eDmaErrorCause) == MV_TRUE)
+    {
+        return;
+    }
+}
+static MV_VOID handleDisconnect(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex)
+{
+    MV_SATA_CHANNEL *pSataChannel = pAdapter->sataChannel[channelIndex];
+
+    if (pSataChannel)
+    {
+        mvOsSemTake(&pSataChannel->semaphore);
+        pSataChannel->queueCommandsEnabled = MV_FALSE;
+        pSataChannel->EdmaActive = MV_FALSE;
+    }
+    /* If disk is disconnected, then disable the activity LED */
+    if (pAdapter->chipIs50XXB2 == MV_TRUE)
+    {
+        MV_U32 regVal1, regVal2;
+        /* First enable flash controller clocks*/
+        regVal1 = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                    MV_PCI_REGS_OFFSET +
+                                    MV_PCI_EXPANSION_ROM_CONTROL_REG_OFFSET);
+
+        regVal1 |= (MV_BIT0);
+        MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                           MV_PCI_REGS_OFFSET + MV_PCI_EXPANSION_ROM_CONTROL_REG_OFFSET,
+                           regVal1);
+        regVal1 = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                    MV_PCI_REGS_OFFSET +
+                                    MV_PCI_EXPANSION_ROM_CONTROL_REG_OFFSET);
+        /* Disable activity LEDs */
+        regVal2 = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                    MV_FLASH_GPIO_PORT_CONTROL_OFFSET);
+        regVal2 |= (MV_BIT8 << channelIndex);
+        MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                            MV_FLASH_GPIO_PORT_CONTROL_OFFSET,
+                            regVal2);
+        regVal2 = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                    MV_FLASH_GPIO_PORT_CONTROL_OFFSET);
+        /* Disable flash controller clocks */
+        regVal1 &= ~(MV_BIT0);
+        MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                           MV_PCI_REGS_OFFSET + MV_PCI_EXPANSION_ROM_CONTROL_REG_OFFSET,
+                           regVal1);
+    }
+    /* Fix for 88SX50XX FEr SATA#2 */
+    if ((pAdapter->chipIs50XXB0 == MV_TRUE)||
+        (pAdapter->chipIs50XXB2 == MV_TRUE))
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_INTERRUPTS,
+                 "%d %d: Before Hard RESET Main Cause %x\n",
+                 pAdapter->adapterId, channelIndex,
+                 MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                   pAdapter->mainCauseOffset));
+        /* Hard Reset the channel so we can do re-connect*/
+        _channelHardReset(pAdapter, channelIndex);
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_INTERRUPTS,
+                 "%d %d: After Hard RESET Main Cause %x\n",
+                 pAdapter->adapterId, channelIndex,
+                 MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                   pAdapter->mainCauseOffset));
+    }
+    else
+    {
+        if (pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II)
+        {
+
+#ifdef MV_SATA_C2C_COMM
+            if (pSataChannel->C2CmodeEnabled == MV_FALSE)
+            {
+#endif
+                _channelHardReset(pAdapter, channelIndex);
+                _establishSataComm(pAdapter, channelIndex);            
+#ifdef MV_SATA_C2C_COMM        
+            }
+#endif
+        }
+    }
+    /* after calling mvSataNotify we can not be sure that the channel*/
+    /* data structure is still available so first we release the     */
+    /* semaphore, after notifying the upper-layer with the disconnect*/
+    /* event, nothing else is done with that channel                 */
+    if (pSataChannel)
+    {
+        mvOsSemRelease(&pSataChannel->semaphore);
+    }
+
+}
+static MV_VOID handleConnect(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex)
+{
+    /* Fix for 88SX50xx FEr SATA#2 */
+    if ((pAdapter->chipIs50XXB0 == MV_TRUE) ||
+        (pAdapter->chipIs50XXB2 == MV_TRUE))
+    {
+        _fixPhyParams(pAdapter, channelIndex);/*TBD*/
+        /* The following link re-establishment is due to non    */
+        /* Marvell driven hard drives                           */
+        _establishSataComm(pAdapter, channelIndex);
+        _establishSataComm(pAdapter, channelIndex);
+    }
+
+    /* If disk is connected, then enable the activity LED */
+    if (pAdapter->chipIs50XXB2 == MV_TRUE)
+    {
+        MV_U32 regVal1, regVal2;
+        /* First enable flash controller clocks*/
+        regVal1 = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                    MV_PCI_REGS_OFFSET +
+                                    MV_PCI_EXPANSION_ROM_CONTROL_REG_OFFSET);
+
+        regVal1 |= (MV_BIT0);
+        MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                           MV_PCI_REGS_OFFSET + MV_PCI_EXPANSION_ROM_CONTROL_REG_OFFSET,
+                           regVal1);
+        regVal1 = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                    MV_PCI_REGS_OFFSET +
+                                    MV_PCI_EXPANSION_ROM_CONTROL_REG_OFFSET);
+        /* Enable activity LEDs */
+        regVal2 = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                    MV_FLASH_GPIO_PORT_CONTROL_OFFSET);
+        regVal2 &= ~(MV_BIT8 << channelIndex);
+        MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                            MV_FLASH_GPIO_PORT_CONTROL_OFFSET,
+                            regVal2);
+        regVal2 = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                    MV_FLASH_GPIO_PORT_CONTROL_OFFSET);
+        /* Disable flash controller clocks */
+        regVal1 &= ~(MV_BIT0);
+        MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                           MV_PCI_REGS_OFFSET + MV_PCI_EXPANSION_ROM_CONTROL_REG_OFFSET,
+                           regVal1);
+    }
+    if (mvSataIsStorageDeviceConnected(pAdapter,channelIndex, NULL) == MV_TRUE)
+    {
+        pAdapter->mvSataEventNotify(pAdapter, MV_EVENT_TYPE_SATA_CABLE,
+                                    MV_SATA_CABLE_EVENT_CONNECT,
+                                    channelIndex);
+    }
+}
+static MV_BOOLEAN handleUnrecoverableError(MV_SATA_ADAPTER *pAdapter,
+                                           MV_U8 channelIndex,
+                                           MV_U32 eDmaErrorCause)
+{
+    MV_SATA_CHANNEL *pSataChannel = pAdapter->sataChannel[channelIndex];
+
+    if (((pAdapter->sataAdapterGeneration == MV_SATA_GEN_I) &&
+         (eDmaErrorCause & MV_EDMA_GEN_I_UNRECOVERABLE_EDMA_ERROR)) ||
+        ((pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II) &&
+         (eDmaErrorCause & MV_EDMA_GEN_II_UNRECOVERABLE_EDMA_ERROR)))
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "%d %d: Unrecoverable"
+                 " HW error detected.\n", pAdapter->adapterId, channelIndex);
+#ifdef MV_LOGGER
+        if (eDmaErrorCause & MV_BIT0)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "%d %d: ePrtDataErr"
+                     "UnrecoverableHW error detected.\n", pAdapter->adapterId, channelIndex);
+        }
+        if (eDmaErrorCause & MV_BIT1)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "%d %d: ePrtPRDErr"
+                     "UnrecoverableHW error detected.\n", pAdapter->adapterId, channelIndex);
+        }
+        if (eDmaErrorCause & MV_BIT3)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "%d %d: eDevDis"
+                     "UnrecoverableHW error detected.\n", pAdapter->adapterId, channelIndex);
+        }
+        if (eDmaErrorCause & MV_BIT9)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "%d %d: ePrtCRQBErr"
+                     "UnrecoverableHW error detected.\n", pAdapter->adapterId, channelIndex);
+        }
+        if (eDmaErrorCause & MV_BIT10)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "%d %d: ePrtCRPBErr"
+                     "UnrecoverableHW error detected.\n", pAdapter->adapterId, channelIndex);
+        }
+        if (eDmaErrorCause & MV_BIT11)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "%d %d: ePrtIntErr"
+                     "UnrecoverableHW error detected.\n", pAdapter->adapterId, channelIndex);
+        }
+        if (eDmaErrorCause & MV_BIT12)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "%d %d: eIORdyErr"
+                     "UnrecoverableHW error detected.\n", pAdapter->adapterId, channelIndex);
+        }
+        if (eDmaErrorCause & MV_BIT15)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "%d %d: LinkCtlRxErr[2]"
+                     "UnrecoverableHW error detected.\n", pAdapter->adapterId, channelIndex);
+        }
+        if (eDmaErrorCause & (MV_BIT17 | MV_BIT18 | MV_BIT19 | MV_BIT20))
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "%d %d: LinkDataRxErr"
+                     "UnrecoverableHW error detected.\n", pAdapter->adapterId, channelIndex);
+        }
+        if (eDmaErrorCause & (MV_BIT26 | MV_BIT27 | MV_BIT28 | MV_BIT29 | MV_BIT30))
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "%d %d: LinkDataTxErr"
+                     "UnrecoverableHW error detected.\n", pAdapter->adapterId, channelIndex);
+        }
+        if (eDmaErrorCause & MV_BIT31)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "%d %d: TransProtErr"
+                     "UnrecoverableHW error detected.\n", pAdapter->adapterId, channelIndex);
+        }
+#endif
+        if (pSataChannel)
+        {
+            mvOsSemTake(&pSataChannel->semaphore);
+            pSataChannel->queueCommandsEnabled = MV_FALSE;
+            pSataChannel->EdmaActive = MV_FALSE;
+            deactivateEdma(pAdapter, channelIndex);
+            disableSaDevInterrupts(pAdapter, channelIndex);
+            flushDmaQueue (pSataChannel, MV_FLUSH_TYPE_CALLBACK,
+                           MV_COMPLETION_TYPE_ABORT, (MV_U16)eDmaErrorCause);
+            resetEdmaChannel(pSataChannel);
+            mvOsSemRelease(&pSataChannel->semaphore);
+        }
+        if ((pAdapter->sataAdapterGeneration >= MV_SATA_GEN_IIE) || 
+            (eDmaErrorCause & MV_BIT12) == 0)
+        {
+            _dumpSataRegs(pAdapter, channelIndex);
+        }
+        pAdapter->mvSataEventNotify(pAdapter, MV_EVENT_TYPE_SATA_ERROR,
+                                    MV_SATA_UNRECOVERABLE_COMMUNICATION_ERROR,
+                                    channelIndex);
+        return MV_TRUE;
+    }
+    return MV_FALSE;
+}
+static MV_BOOLEAN handleRecoverableError(MV_SATA_ADAPTER *pAdapter,
+                                         MV_U8 channelIndex,
+                                         MV_U32 eDmaErrorCause)
+{
+    MV_SATA_CHANNEL *pSataChannel = pAdapter->sataChannel[channelIndex];
+
+    if (((pAdapter->sataAdapterGeneration == MV_SATA_GEN_I) &&
+         (eDmaErrorCause & MV_EDMA_GEN_I_RECOVERABLE_EDMA_ERROR)) ||
+        ((pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II) &&
+         (eDmaErrorCause & MV_EDMA_GEN_II_RECOVERABLE_EDMA_ERROR)))
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "%d %d: Recoverable"
+                 " HW error detected.\n", pAdapter->adapterId, channelIndex);
+#ifdef MV_LOGGER
+        if (eDmaErrorCause & MV_BIT5)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "%d %d: SerrInt"
+                     "Recoverable error detected.\n", pAdapter->adapterId, channelIndex);
+        }
+        if (eDmaErrorCause & (MV_BIT13 | MV_BIT14 | MV_BIT16))
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "%d %d: LinkCtlRxErr"
+                     "Recoverable error detected.\n", pAdapter->adapterId, channelIndex);
+        }
+        if (eDmaErrorCause & (MV_BIT21 | MV_BIT22 | MV_BIT23 | MV_BIT24 | MV_BIT25))
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "%d %d: LinkCtlTxErr"
+                     "Recoverable error detected.\n", pAdapter->adapterId, channelIndex);
+        }
+#endif
+        _dumpSataRegs(pAdapter, channelIndex);
+        if ((pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II) &&
+            (eDmaErrorCause & MV_BIT5))
+        {
+            MV_U32  regVal;
+            regVal = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                       edmaRegOffst[ channelIndex] +
+                                       MV_SATA_II_S_ERROR_REG_OFFSET);
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "%d %d: Clear "
+                     " Serror register(0x%02x).\n", pAdapter->adapterId,
+                     channelIndex, regVal);
+            MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                               edmaRegOffst[ channelIndex] +
+                               MV_SATA_II_S_ERROR_REG_OFFSET, regVal);
+            /* clear the channel's error cause register */
+            MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                               getEdmaRegOffset(channelIndex) +
+                               MV_EDMA_INTERRUPT_ERROR_CAUSE_REG_OFFSET,
+                               ~MV_BIT5);
+        }
+        pAdapter->mvSataEventNotify(pAdapter, MV_EVENT_TYPE_SATA_ERROR,
+                                    MV_SATA_RECOVERABLE_COMMUNICATION_ERROR,
+                                    channelIndex);
+        if (pSataChannel)
+        {
+            mvOsSemTake(&pSataChannel->semaphore);
+            if (pSataChannel->recoveredErrorsCounter++ > 10)
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                         "%d %d: Reached %d Recoverable errors "
+                         "notify unrecoverable error\n",
+                         pAdapter->adapterId, channelIndex,
+                         pSataChannel->recoveredErrorsCounter);
+                pSataChannel->queueCommandsEnabled = MV_FALSE;
+                pSataChannel->EdmaActive = MV_FALSE;
+                deactivateEdma(pAdapter, channelIndex);
+                disableSaDevInterrupts(pAdapter, channelIndex);
+                flushDmaQueue (pSataChannel, MV_FLUSH_TYPE_CALLBACK,
+                               MV_COMPLETION_TYPE_ABORT, (MV_U16)eDmaErrorCause);
+                resetEdmaChannel(pSataChannel);
+                mvOsSemRelease(&pSataChannel->semaphore);
+                pAdapter->mvSataEventNotify(pAdapter, MV_EVENT_TYPE_SATA_ERROR,
+                                            MV_SATA_UNRECOVERABLE_COMMUNICATION_ERROR,
+                                            channelIndex);
+            }
+            else
+            {
+                mvOsSemRelease(&pSataChannel->semaphore);
+                return MV_TRUE;
+            }
+        }
+        return MV_TRUE;
+    }
+    return MV_FALSE;
+}
+
+static MV_BOOLEAN handleAsyncNotify(MV_SATA_ADAPTER *pAdapter,
+                                    MV_U8 channelIndex,
+                                    MV_U32 eDmaErrorCause)
+{
+    MV_SATA_CHANNEL *pSataChannel = pAdapter->sataChannel[channelIndex];
+    if ((pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II) &&
+        (eDmaErrorCause & MV_BIT8))
+    {
+        MV_U32 regVal1;
+        if (pSataChannel != NULL)
+        {
+            mvOsSemTake(&pSataChannel->semaphore);
+        }
+        regVal1 = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                    getEdmaRegOffset(channelIndex) +
+                                    MV_SATA_II_IF_STATUS_REG_OFFSET);
+        /*Clear status*/
+        if (regVal1 & (MV_BIT31 | MV_BIT30))
+        {
+            MV_U32 regVal2 = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                               getEdmaRegOffset(channelIndex) +
+                                               MV_SATA_II_IF_CONTROL_REG_OFFSET);
+            regVal2 |= MV_BIT24;
+            MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                               getEdmaRegOffset(channelIndex) +
+                               MV_SATA_II_IF_CONTROL_REG_OFFSET, regVal2);
+        }
+        if (pSataChannel != NULL)
+        {
+            mvOsSemRelease(&pSataChannel->semaphore);
+        }
+        if (pAdapter->sataAdapterGeneration == MV_SATA_GEN_IIE)
+        {
+
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                     "%d %d: PM asynchronous notification interrupt. FIS Cause %x\n",
+                     pAdapter->adapterId, channelIndex, 
+                     MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                       getEdmaRegOffset(channelIndex) +
+                                       MV_EDMA_FIS_INTERRUPT_CAUSE_REG_OFFSET));
+
+            /* clear FIS Interrupt cause register*/
+            MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                               getEdmaRegOffset(channelIndex) +
+                               MV_EDMA_FIS_INTERRUPT_CAUSE_REG_OFFSET,
+                               ~0xA00);
+            /* clear the channel's error cause register */
+            MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                               getEdmaRegOffset(channelIndex) +
+                               MV_EDMA_INTERRUPT_ERROR_CAUSE_REG_OFFSET,
+                               ~MV_BIT8);
+        }
+        if (((regVal1 & MV_BIT30) == 0) &&
+            ((regVal1 & MV_BIT31) == MV_BIT31))
+        {
+
+
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_INTERRUPTS,
+                     "%d %d: PM asynchronous notification interrupt.\n",
+                     pAdapter->adapterId, channelIndex);
+
+            pAdapter->mvSataEventNotify(pAdapter, MV_EVENT_TYPE_SATA_CABLE,
+                                        MV_SATA_CABLE_EVENT_PM_HOT_PLUG,
+                                        channelIndex);
+        }
+        return MV_TRUE;
+    }
+    return MV_FALSE;
+}
+
+static MV_BOOLEAN handleSelfDisable(MV_SATA_ADAPTER *pAdapter,
+                                    MV_U8 channelIndex,
+                                    MV_U32 eDmaErrorCause)
+{
+    MV_SATA_CHANNEL *pSataChannel = pAdapter->sataChannel[channelIndex];
+
+    if ((((pAdapter->sataAdapterGeneration == MV_SATA_GEN_I) && (eDmaErrorCause & MV_BIT8)) ||
+         ((pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II) && (eDmaErrorCause & MV_BIT7)))
+        &&
+        (pSataChannel != NULL)) /* edma self disable */
+    {
+        mvOsSemTake(&pSataChannel->semaphore);
+        if (pSataChannel->EdmaActive == MV_TRUE)
+        {
+            pSataChannel->queueCommandsEnabled = MV_FALSE;
+            pSataChannel->EdmaActive = MV_FALSE;
+
+            if (eDmaErrorCause & MV_BIT2)
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                         "%d %d: Edma Self disabled due to device error"
+                         " without completion\n", pAdapter->adapterId,
+                         channelIndex);
+                switch (pSataChannel->queuedDMA)
+                {
+                case MV_EDMA_MODE_NOT_QUEUED:
+                case MV_EDMA_MODE_QUEUED:
+                    handleEdmaFailedCommand(pAdapter, channelIndex,
+                                            (MV_U16)eDmaErrorCause);
+                    break;
+                case MV_EDMA_MODE_NATIVE_QUEUING:
+                    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR,
+                             "%d %d: Edma Self disabled due to device "
+                             "error in NCQ mode!!!!\n",
+                             pAdapter->adapterId, channelIndex);
+
+                    break;
+                default:
+                    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR,
+                             "%d %d: Unknown EDMA mode (%d)\n",
+                             pAdapter->adapterId, channelIndex,
+                             pSataChannel->queuedDMA);
+                    break;
+
+                }
+            }
+            else
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR | MV_DEBUG_INTERRUPTS,
+                         "%d %d: Edma Self disable received without reason!!!\n",
+                         pAdapter->adapterId, channelIndex);
+
+            }
+        }
+        pAdapter->mvSataEventNotify(pAdapter, MV_EVENT_TYPE_SATA_ERROR,
+                                    MV_SATA_DEVICE_ERROR, channelIndex);
+        if (_doDevErrorRecovery(pSataChannel) == MV_FALSE)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR | MV_DEBUG_INTERRUPTS,
+                     "%d %d: Error Recovery Fails!!!\n",
+                     pAdapter->adapterId, channelIndex);
+            mvOsSemRelease(&pSataChannel->semaphore);
+            return MV_TRUE;
+        }
+        mvOsSemRelease(&pSataChannel->semaphore);
+        return MV_TRUE;
+    }
+    return MV_FALSE;
+}
+static MV_BOOLEAN handleDevErr(MV_SATA_ADAPTER *pAdapter,
+                               MV_U8 channelIndex,
+                               MV_U32 eDmaErrorCause)
+{
+    MV_SATA_CHANNEL *pSataChannel = pAdapter->sataChannel[channelIndex];
+    if ((pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II) &&
+        (eDmaErrorCause & MV_BIT2) && (pSataChannel != NULL))
+    {
+        mvOsSemTake(&pSataChannel->semaphore);
+        if (pSataChannel->EdmaActive == MV_TRUE)
+        {
+            if (pSataChannel->queuedDMA == MV_EDMA_MODE_NATIVE_QUEUING)
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                         "%d %d: EDMA device error in NCQ mode\n",
+                         pAdapter->adapterId, channelIndex);
+                if (pSataChannel->ErrorHandlingInfo.state == MV_ERROR_HANDLING_STATE_IDLE)
+                {
+                    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                             "%d %d: First error\n", pAdapter->adapterId,
+                             channelIndex);
+                    pSataChannel->ErrorHandlingInfo.state = MV_ERROR_HANDLING_STATE_WAIT_FOR_COMPLETIONS;
+                }
+
+                updatePortsWithErrors(pSataChannel);
+                setAbortedCommands(pSataChannel);
+                if (isGoodCompletionsExpected(pSataChannel) == MV_FALSE)
+                {
+                    enterRequestSenseState(pSataChannel);
+                }
+
+            }
+            else if (pSataChannel->FBSEnabled == MV_TRUE)
+            {
+                if (pSataChannel->queuedDMA == MV_EDMA_MODE_QUEUED)
+                {
+                    if (pSataChannel->ErrorHandlingInfo.state == MV_ERROR_HANDLING_STATE_IDLE)
+                    {
+                        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                                 "%d %d: First error\n", pAdapter->adapterId,
+                                 channelIndex);
+                        pSataChannel->ErrorHandlingInfo.state = MV_ERROR_HANDLING_STATE_WAIT_FOR_COMPLETIONS;
+                    }
+                    /*get the Device tag from the EDMA's internal memory then*/
+                    /*complete the failed command*/
+                    handleEdmaFailedCommand(pAdapter, channelIndex, MV_BIT2);
+                    updatePortsWithErrors(pSataChannel);
+                    setAbortedCommands(pSataChannel);
+                    if (isGoodCompletionsExpected(pSataChannel) == MV_FALSE)
+                    {
+                        enterRequestSenseState(pSataChannel);
+                    }
+                }
+                else
+                {
+                    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                             "%d %d: EDMA device error in FBS none NCQ mode\n",
+                             pAdapter->adapterId, channelIndex);
+                }
+            }
+            else
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR | MV_DEBUG_INTERRUPTS,
+                         "%d %d: EDMA device error must be handled"
+                         "previously!!!\n", pAdapter->adapterId,
+                         channelIndex);
+            }
+        }
+        else
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR | MV_DEBUG_INTERRUPTS,
+                     "%d %d: EDMA device error while EDMA not active!!!\n",
+                     pAdapter->adapterId, channelIndex);
+        }
+        pAdapter->mvSataEventNotify(pAdapter, MV_EVENT_TYPE_SATA_ERROR,
+                                    MV_SATA_DEVICE_ERROR, channelIndex);
+        mvOsSemRelease(&pSataChannel->semaphore);
+        return MV_TRUE;
+    }
+    return MV_FALSE;
+}
+static MV_VOID handlePCIErrorInterrupt(MV_SATA_ADAPTER *pAdapter)
+{
+    MV_U32  errorCause = 0;
+    if (pAdapter->hostInterface == MV_HOST_IF_PEX)
+    {
+        errorCause = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                       MV_PCI_REGS_OFFSET +
+                                       MV_PCI_E_INTERRUPT_CAUSE_REG_OFFSET);
+    }
+    else if (pAdapter->hostInterface == MV_HOST_IF_PCI)
+    {
+        errorCause = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                       MV_PCI_REGS_OFFSET +
+                                       MV_PCI_INTERRUPT_CAUSE_REG_OFFSET);
+        _dumpPCIRegs(pAdapter);
+    }
+
+
+    {
+        MV_U8   i;
+
+        for (i = 0; i < pAdapter->numberOfChannels;i++)
+        {
+            _dumpEDMARegs(pAdapter, i);
+            _dumpChannelQueues(pAdapter, i);
+        }
+    }
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR | MV_DEBUG_INTERRUPTS,
+             " %d  : PCI error, pci interrupt cause register=%08x\n",
+             pAdapter->adapterId, errorCause);
+    /* clear cause register */
+    if (pAdapter->hostInterface == MV_HOST_IF_PEX)
+    {
+        MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                           MV_PCI_REGS_OFFSET +
+                           MV_PCI_E_INTERRUPT_CAUSE_REG_OFFSET,
+                           ~errorCause);
+    }
+    else if (pAdapter->hostInterface == MV_HOST_IF_PCI)
+    {
+        MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                           MV_PCI_REGS_OFFSET +
+                           MV_PCI_INTERRUPT_CAUSE_REG_OFFSET,
+                           ~errorCause);
+    }
+    pAdapter->mvSataEventNotify(pAdapter, MV_EVENT_TYPE_ADAPTER_ERROR,
+                                errorCause, 0);
+}
+#ifdef MV_SATA_C2C_COMM
+/*******************************************************************************
+* handleC2CInterrupt - channel 2 channel interrupt handler
+*
+*
+* DESCRIPTION:
+*   Handles channel 2 channel interrupt (register device 2 host FIS) and
+*   convert ATA registers values to user specific 10 bytes message
+*
+* INPUT:
+*   pSataChannel   - pointer to the Sata channel data structure
+*
+* RETURN:
+*   None
+*
+* COMMENTS:
+*   None
+*
+*******************************************************************************/
+static void handleC2CInterrupt(MV_SATA_CHANNEL *pSataChannel)
+{
+    MV_BUS_ADDR_T   ioBaseAddr =
+    pSataChannel->mvSataAdapter->adapterIoBaseAddress;
+    MV_U32      eDmaRegsOffset = pSataChannel->eDmaRegsOffset;
+    MV_U8       port = pSataChannel->channelNumber & (MV_BIT0 | MV_BIT1);
+    MV_U8       sataUnit = (pSataChannel->channelNumber & MV_BIT2) >> 2;
+    MV_U8       ATAstatus;
+    MV_STORAGE_DEVICE_REGISTERS     deviceRegs;
+
+    mvOsSemTake(&pSataChannel->semaphore);
+
+    MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset +
+                     MV_ATA_DEVICE_ALTERNATE_REG_OFFSET);
+
+    ATAstatus = MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset +
+                                 MV_ATA_DEVICE_STATUS_REG_OFFSET);
+    /* clear DevInterrupt*/
+    MV_REG_WRITE_DWORD(ioBaseAddr, MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                       MV_SATAHC_INTERRUPT_CAUSE_REG_OFFSET, ~(MV_BIT8 << port));
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG|MV_DEBUG_NON_UDMA_COMMAND,
+             "%d %d: C2C Interrupt: status 0x%02x\n",
+             pSataChannel->mvSataAdapter->adapterId,
+             pSataChannel->channelNumber, ATAstatus);
+
+    dumpAtaDeviceRegisters(pSataChannel->mvSataAdapter,
+                           pSataChannel->channelNumber,
+                           MV_TRUE,
+                           &deviceRegs);
+    mvOsSemRelease(&pSataChannel->semaphore);
+    if (pSataChannel->C2CCallback)
+    {
+        MV_U8 msg[MV_C2C_MESSAGE_SIZE];
+        msg[0] = deviceRegs.errorRegister;
+        msg[1] = deviceRegs.lbaLowRegister & 0xFF;
+        msg[2] = deviceRegs.lbaMidRegister & 0xFF;
+        msg[3] = deviceRegs.lbaHighRegister & 0xFF;
+        msg[4] = deviceRegs.deviceRegister;
+        msg[5] = deviceRegs.lbaLowRegister >> 8;
+        msg[6] = deviceRegs.lbaMidRegister >> 8;
+        msg[7] = deviceRegs.lbaHighRegister >> 8;
+        msg[8] = deviceRegs.sectorCountRegister & 0xFF;
+        msg[9] = deviceRegs.sectorCountRegister >> 8;
+        pSataChannel->C2CCallback(pSataChannel->mvSataAdapter,
+                                  pSataChannel,
+                                  MV_C2C_REGISTER_DEVICE_TO_HOST_FIS_DONE,
+                                  MV_C2C_MESSAGE_SIZE,
+                                  msg);
+    }
+}
+#endif
+
+
+
+static void handleDeviceInterrupt(MV_SATA_ADAPTER *pAdapter, MV_U8 sataUnit,
+                                  MV_U8 port)
+{
+    MV_SATA_CHANNEL *pSataChannel;
+    MV_QUEUED_COMMAND_ENTRY *pCommandEntry;
+    MV_U8   channelIndex;
+
+    channelIndex = MV_CHANNEL_INDEX(sataUnit, port);
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG|MV_DEBUG_NON_UDMA_COMMAND,
+             "%d %d: SaDevInterrupt Received\n", pAdapter->adapterId,
+             channelIndex);
+
+    pSataChannel = pAdapter->sataChannel[channelIndex];
+    if (pSataChannel == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR|MV_DEBUG_NON_UDMA_COMMAND,
+                 "%d %d: SaDevInterrupt Received for disconnected channel\n",
+                 pAdapter->adapterId, channelIndex);
+        /* disable SaDevInterrupts from this channel */
+        disableSaDevInterrupts(pAdapter,channelIndex);
+        return;
+    }
+#ifdef MV_SATA_C2C_COMM
+    /*handle channel 2 channel communication mode*/
+    if (pSataChannel->C2CmodeEnabled == MV_TRUE)
+    {
+        handleC2CInterrupt(pSataChannel);
+        return;
+    }
+#endif
+
+    mvOsSemTake(&pSataChannel->semaphore);
+    if (pSataChannel->ErrorHandlingInfo.state == MV_ERROR_HANDLING_STATE_WAIT_FOR_BUSY)
+    {
+        MV_U8       ATAstatus;
+
+        ATAstatus = MV_REG_READ_BYTE(pAdapter->adapterIoBaseAddress,
+                                     pSataChannel->eDmaRegsOffset +
+                                     MV_ATA_DEVICE_STATUS_REG_OFFSET);
+        /* clear DevInterrupt*/
+        MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                           MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                           MV_SATAHC_INTERRUPT_CAUSE_REG_OFFSET,
+                           ~(MV_BIT8 << port));
+
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG|MV_DEBUG_NON_UDMA_COMMAND,
+                 "%d %d: enter NCQ error handling request sense state\n",
+                 pSataChannel->mvSataAdapter->adapterId,
+                 pSataChannel->channelNumber);
+        pSataChannel->ErrorHandlingInfo.state = MV_ERROR_HANDLING_STATE_REQUEST_SENSE;
+        pSataChannel->ErrorHandlingInfo.CurrPort = 0;
+        setReadLogExtCmndPointers(pSataChannel);
+        handlePortError(pSataChannel);
+        mvOsSemRelease(&pSataChannel->semaphore);
+        return;
+    }
+
+    /* clear interrupt */
+
+    pCommandEntry = pSataChannel->commandsQueueHead;
+    if (pCommandEntry == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR|MV_DEBUG_NON_UDMA_COMMAND,
+                 "%d %d: SaDevInterrupt: No command is running!!!\n",
+                 pAdapter->adapterId, channelIndex);
+        _dumpSataRegs(pAdapter, channelIndex);
+        /* disable SaDevInterrupts from this channel */
+        disableSaDevInterrupts(pAdapter,channelIndex);
+        mvOsSemRelease(&pSataChannel->semaphore);
+        return;
+    }
+    if ((pCommandEntry->isFreeEntry == MV_TRUE) ||
+        (pCommandEntry->pCommandInfo->type == MV_QUEUED_COMMAND_TYPE_UDMA))
+    {
+        if (pCommandEntry->isFreeEntry == MV_TRUE)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR|MV_DEBUG_NON_UDMA_COMMAND,
+                     "%d %d: SaDevInterrupt: current command is free ???\n",
+                     pAdapter->adapterId, channelIndex);
+        }
+        else
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR|MV_DEBUG_NON_UDMA_COMMAND,
+                     "%d %d: SaDevInterrupt: current command is Not PIO ???\n",
+                     pAdapter->adapterId, channelIndex);
+        }
+        /* disable SaDevInterrupts from this channel */
+        disableSaDevInterrupts(pAdapter,channelIndex);
+        mvOsSemRelease(&pSataChannel->semaphore);
+        return;
+    }
+    handlePIOInterrupt(pSataChannel, pCommandEntry);
+    mvOsSemRelease(&pSataChannel->semaphore);
+}
+
+static void handlePIOInterrupt(MV_SATA_CHANNEL *pSataChannel,
+                               MV_QUEUED_COMMAND_ENTRY *pCommandEntry)
+{
+    MV_BUS_ADDR_T   ioBaseAddr = pSataChannel->mvSataAdapter->adapterIoBaseAddress;
+    MV_U32      eDmaRegsOffset = pSataChannel->eDmaRegsOffset;
+    MV_U8       port = pSataChannel->channelNumber & (MV_BIT0 | MV_BIT1);
+    MV_U8       sataUnit = (pSataChannel->channelNumber & MV_BIT2) >> 2;
+    MV_U8       ATAstatus;
+    MV_NON_UDMA_PROTOCOL    protocolType;
+
+    MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset +
+                     MV_ATA_DEVICE_ALTERNATE_REG_OFFSET);
+
+    ATAstatus = MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset +
+                                 MV_ATA_DEVICE_STATUS_REG_OFFSET);
+    /* clear DevInterrupt*/
+    MV_REG_WRITE_DWORD(ioBaseAddr, MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                       MV_SATAHC_INTERRUPT_CAUSE_REG_OFFSET, ~(MV_BIT8 << port));
+
+    if(pCommandEntry->pCommandInfo->type == MV_QUEUED_COMMAND_TYPE_PACKET)
+    {
+        protocolType = pCommandEntry->pCommandInfo->commandParams.packetCommand.protocolType;
+    }
+    else
+    {
+        protocolType = pCommandEntry->pCommandInfo->commandParams.NoneUdmaCommand.protocolType; 
+    }
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG|MV_DEBUG_NON_UDMA_COMMAND,
+             "%d %d: PIO Interrupt: cmd 0x%02X, type %d. status 0x%02x\n",
+             pSataChannel->mvSataAdapter->adapterId,
+             pSataChannel->channelNumber,
+             pCommandEntry->pCommandInfo->commandParams.NoneUdmaCommand.command,
+             protocolType,
+             ATAstatus);
+    if (ATAstatus & MV_ATA_BUSY_STATUS)
+    {
+        if (pSataChannel->mvSataAdapter->sataAdapterGeneration == MV_SATA_GEN_I)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "%d %d: "
+                     "PIO Interrupt: drive is BUSY!!!! status 0x%02x\n",
+                     pSataChannel->mvSataAdapter->adapterId,
+                     pSataChannel->channelNumber, ATAstatus);
+        }
+        return;
+    }
+    if (ATAstatus & MV_ATA_ERROR_STATUS)
+    {
+        if (pSataChannel->FBSEnabled == MV_TRUE)
+        {
+            /*clear interrupt cause to resume the transport layer operation*/
+            MV_REG_WRITE_DWORD(pSataChannel->mvSataAdapter->adapterIoBaseAddress,
+                               pSataChannel->eDmaRegsOffset +
+                               MV_EDMA_FIS_INTERRUPT_CAUSE_REG_OFFSET,
+                               ~MV_BIT8);
+        }
+        if (pCommandEntry->pCommandInfo->type == MV_QUEUED_COMMAND_TYPE_NONE_UDMA)
+        {
+            completePIOCommand(pSataChannel, pCommandEntry, MV_TRUE);
+            return;
+        }
+    }
+    switch (protocolType)
+    {
+    case MV_NON_UDMA_PROTOCOL_NON_DATA:
+        /* command is successfully completed*/
+        completePIOCommand(pSataChannel, pCommandEntry, MV_FALSE);
+        break;
+    case MV_NON_UDMA_PROTOCOL_PIO_DATA_IN:
+        if (ATAstatus & MV_ATA_READY_STATUS)
+        {
+            if (transferPIOData(pSataChannel,
+                                &pCommandEntry->pCommandInfo->commandParams.NoneUdmaCommand) == MV_TRUE)
+            {
+                if (pCommandEntry->pCommandInfo->commandParams.NoneUdmaCommand.count == 0)
+                {
+                    ATAstatus = MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset +
+                                                 MV_ATA_DEVICE_STATUS_REG_OFFSET);
+                    if (ATAstatus & MV_ATA_DATA_REQUEST_STATUS)
+                    {
+                        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                                 "%d %d: PIO Interrupt: DRQ still set. ATA status 0x%02x\n",
+                                 pSataChannel->mvSataAdapter->adapterId,
+                                 pSataChannel->channelNumber, ATAstatus);
+                        return;
+                    }
+                    completePIOCommand(pSataChannel, pCommandEntry, MV_FALSE);
+                    return;
+                }
+#ifdef MV_SATA_SUPPORT_READ_WRITE_LONG
+
+                /* for Read long only*/
+                if (pCommandEntry->pCommandInfo->commandParams.NoneUdmaCommand.count == 4)
+                {
+                    if (transferPIOData(pSataChannel,
+                                        &pCommandEntry->pCommandInfo->commandParams.NoneUdmaCommand) == MV_TRUE)
+                    {
+                        completePIOCommand(pSataChannel, pCommandEntry, MV_FALSE);
+                    }
+                    else
+                    {
+                        completePIOCommand(pSataChannel, pCommandEntry, MV_TRUE);
+                    }
+                }
+#endif /*MV_SATA_SUPPORT_READ_WRITE_LONG*/
+
+            }
+            else
+            {
+                completePIOCommand(pSataChannel, pCommandEntry, MV_TRUE);
+            }
+        }
+        else    /* when BUSY and DRQ cleared to zero then the device has*/
+        {
+            /* completed the command with error                     */
+            completePIOCommand(pSataChannel, pCommandEntry, MV_TRUE);
+            return;
+        }
+        break;
+    case MV_NON_UDMA_PROTOCOL_PIO_DATA_OUT:
+        if ((ATAstatus & MV_ATA_READY_STATUS) &&
+            !(ATAstatus & MV_ATA_DEVICE_FAULT_STATUS))
+        {
+            if (pCommandEntry->pCommandInfo->commandParams.NoneUdmaCommand.count == 0)
+            {
+                completePIOCommand(pSataChannel, pCommandEntry, MV_FALSE);
+            }
+            else
+            {
+                if (transferPIOData(pSataChannel,
+                                    &pCommandEntry->pCommandInfo->commandParams.NoneUdmaCommand) == MV_FALSE)
+                {
+                    completePIOCommand(pSataChannel, pCommandEntry, MV_TRUE);
+                }
+            }
+        }
+        else
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "%d %d: PIO Interrupt: PIO"
+                     " Data Out command failed status 0x%02x\n",
+                     pSataChannel->mvSataAdapter->adapterId,
+                     pSataChannel->channelNumber, ATAstatus);
+            completePIOCommand(pSataChannel, pCommandEntry, MV_TRUE);
+        }
+        break;
+#ifdef MV_SUPPORT_ATAPI
+    case MV_NON_UDMA_PROTOCOL_PACKET_PIO_NON_DATA:
+        completePacketCommand(pSataChannel, pCommandEntry, MV_FALSE);
+        break;
+    case MV_NON_UDMA_PROTOCOL_PACKET_PIO_DATA_IN:
+    case MV_NON_UDMA_PROTOCOL_PACKET_PIO_DATA_OUT:
+        {
+            MV_U8   ATASectorCount = MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset +
+                                 MV_ATA_DEVICE_SECTOR_COUNT_REG_OFFSET);
+
+            if ((ATAstatus & MV_ATA_ERROR_STATUS) || (ATAstatus & MV_ATA_DEVICE_FAULT_STATUS))
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                                 "%d %d: Packet Interrupt: Command completed with error: ATA status 0x%02x\n",
+                                 pSataChannel->mvSataAdapter->adapterId,
+                                 pSataChannel->channelNumber, ATAstatus);
+                 completePacketCommand(pSataChannel, pCommandEntry, MV_TRUE);
+                return;
+             }
+            if ((ATAstatus & MV_ATA_DATA_REQUEST_STATUS) == 0)
+            {
+                 mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG,
+                                 "%d %d: Packet Interrupt: Command completed ATA status 0x%02x\n",
+                                 pSataChannel->mvSataAdapter->adapterId,
+                                 pSataChannel->channelNumber, ATAstatus);
+                completePacketCommand(pSataChannel, pCommandEntry, MV_FALSE);
+                return;
+            }
+            if (((ATAstatus & MV_ATA_READY_STATUS) != MV_ATA_READY_STATUS) ||
+                    (((ATASectorCount & 0x3) != MV_BIT1) && (protocolType == MV_NON_UDMA_PROTOCOL_PACKET_PIO_DATA_IN))  ||
+                    (((ATASectorCount & 0x3) != 0) && (protocolType == MV_NON_UDMA_PROTOCOL_PACKET_PIO_DATA_OUT)) 
+       )
+           {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                                 "%d %d: Packet Interrupt: unexpected ATA regs: ATA status 0x%02x,"
+                                " ATA SectorCount 0x%02x protocol %d\n",
+                                 pSataChannel->mvSataAdapter->adapterId,
+                                 pSataChannel->channelNumber, ATAstatus, ATASectorCount,
+                                 protocolType);
+ 
+                /* completed the command with error                     */
+                completePacketCommand(pSataChannel, pCommandEntry, MV_TRUE);
+                return;
+            }
+            else
+            {
+                MV_U8   LBAMid = MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset +
+                                 MV_ATA_DEVICE_LBA_MID_REG_OFFSET);
+                MV_U8   LBAHigh = MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset +
+                                 MV_ATA_DEVICE_LBA_HIGH_REG_OFFSET);
+                MV_U16 byteCount = (LBAHigh << 8) | LBAMid;
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " Packet with Data: LBA Mid %x, LBA High %x\n",
+                        LBAMid, LBAHigh);
+                if (transferPacketData(pSataChannel,
+                                &pCommandEntry->pCommandInfo->commandParams.packetCommand, 
+                                byteCount) != MV_TRUE)
+                {
+                    completePacketCommand(pSataChannel, pCommandEntry, MV_TRUE);
+                }
+            }
+        }
+        break;
+     case MV_NON_UDMA_PROTOCOL_PACKET_DMA:
+        {
+            MV_U32  BMDMA_status = MV_REG_READ_DWORD (ioBaseAddr,
+                                    getEdmaRegOffset(pSataChannel->channelNumber) +
+                                    MV_BMDMA_STATUS_OFFSET);
+ 
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG,
+                    "%d %d: Packet Interrupt: in ATAPI DMA command ATA status 0x%02x\n",
+                    pSataChannel->mvSataAdapter->adapterId,
+                    pSataChannel->channelNumber, ATAstatus);
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG,
+                    "Packet Interrupt: BMDMA status 0x%08x\n", BMDMA_status);
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG,
+                    " Packet Interrupt: EDMA Error cause 0x%08x\n",
+                     MV_REG_READ_DWORD (ioBaseAddr,
+                                     getEdmaRegOffset(pSataChannel->channelNumber) +
+                                     MV_EDMA_INTERRUPT_ERROR_CAUSE_REG_OFFSET));
+            if(ATAstatus & MV_ATA_ERROR_STATUS)
+            {
+               mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                    "Packet Interrupt: DMA command completed with error BMDMA "
+                    "status 0x%08x, ATA status 0x%02x\n", BMDMA_status, ATAstatus);
+                _resetBmDma(pSataChannel->mvSataAdapter, pSataChannel->channelNumber);
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                ": BMDMA status(2) 0x%08x\n",
+                          MV_REG_READ_DWORD (ioBaseAddr,
+                             getEdmaRegOffset(pSataChannel->channelNumber) +MV_BMDMA_STATUS_OFFSET));
+
+                pCommandEntry->pCommandInfo->commandParams.packetCommand.transfered_data = 0;
+            }
+            else
+            {
+                pCommandEntry->pCommandInfo->commandParams.packetCommand.transfered_data = 
+                pCommandEntry->pCommandInfo->commandParams.packetCommand.buffer_len; 
+
+#if 0
+                /* chech if the BMDMA still active*/
+                if (BMDMA_status & MV_BIT0)
+                {
+                    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG,
+                    "Packet Interrupt: BMDMA not finished yet. "
+                    "status 0x%08x, ATA status 0x%02x\n", BMDMA_status, ATAstatus);
+                    /* wait for BMDMA done interrrupt*/ 
+                    pSataChannel->waitForBMDMA = MV_TRUE;
+                    return;
+                }
+#endif
+                /* if BMDMA finished, call _resetBmDma to clear the Done interrupt*/
+                 _resetBmDma(pSataChannel->mvSataAdapter, pSataChannel->channelNumber);
+                /* chech if the BMDMA completed with errors*/
+                if (BMDMA_status & MV_BIT1)
+                {
+                    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG,
+                    "Packet Interrupt: BMDMA completed with error. "
+                    "status 0x%08x, ATA status 0x%02x\n", BMDMA_status, ATAstatus);
+                    completePacketCommand(pSataChannel, pCommandEntry, MV_TRUE);
+                    return;
+                }
+            }
+            completePacketCommand(pSataChannel, pCommandEntry, MV_FALSE);
+            return;
+        }
+        break;
+#endif
+    default: /* never reached */
+        break;
+    }
+}
+static MV_BOOLEAN transferPIOData(MV_SATA_CHANNEL *pSataChannel,
+                                  MV_NONE_UDMA_COMMAND_PARAMS   *pNoneUdmaCommandParams)
+{
+    MV_U32  i;
+    MV_U32  dataBlockWords = pSataChannel->DRQDataBlockSize * ATA_SECTOR_SIZE_IN_WORDS;
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG|MV_DEBUG_NON_UDMA_COMMAND,
+             "%d %d: xfer data for PIO Data command.count %d\n",
+             pSataChannel->mvSataAdapter->adapterId,
+             pSataChannel->channelNumber, pNoneUdmaCommandParams->count);
+
+    switch (pNoneUdmaCommandParams->protocolType)
+    {
+    case MV_NON_UDMA_PROTOCOL_PIO_DATA_OUT:
+        for (i = 0; i < dataBlockWords; i++)
+        {
+            if (pNoneUdmaCommandParams->count == 0)
+            {
+                return MV_TRUE;
+            }
+            pNoneUdmaCommandParams->count--;
+            MV_REG_WRITE_WORD(pSataChannel->mvSataAdapter->adapterIoBaseAddress,
+                              pSataChannel->eDmaRegsOffset +
+                              MV_ATA_DEVICE_PIO_DATA_REG_OFFSET,
+                              *pNoneUdmaCommandParams->bufPtr++);
+        }
+        break;
+    case MV_NON_UDMA_PROTOCOL_PIO_DATA_IN:
+        for (i = 0; i < dataBlockWords; i++)
+        {
+	     MV_U16 data;
+            if (pNoneUdmaCommandParams->count == 0)
+            {
+                return MV_TRUE;
+            }
+            pNoneUdmaCommandParams->count--;
+	    data = MV_REG_READ_WORD(pSataChannel->mvSataAdapter->adapterIoBaseAddress,
+                             pSataChannel->eDmaRegsOffset +
+                             MV_ATA_DEVICE_PIO_DATA_REG_OFFSET);
+#if defined(MV_NETBSD)
+	    /* identify data is in big endian */
+	    if((pNoneUdmaCommandParams->command == MV_ATA_COMMAND_IDENTIFY) ||
+	       (pNoneUdmaCommandParams->command == MV_ATA_COMMAND_ATAPI_IDENTIFY))
+		 data = MV_BE16_TO_CPU(data);
+	    else
+		 data = MV_CPU_TO_LE16(data); /*should be LE16 TO CPU */
+#endif
+	    *pNoneUdmaCommandParams->bufPtr++ = data;
+	    
+        }
+        break;
+    default:
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "%d %d: in xfer data "
+                 "PIO: command protocol is not Data in/out\n",
+                 pSataChannel->mvSataAdapter->adapterId,
+                 pSataChannel->channelNumber);
+        return MV_FALSE;
+    }
+    return MV_TRUE;
+}
+#ifdef MV_SUPPORT_ATAPI
+static MV_BOOLEAN transferPacketData(MV_SATA_CHANNEL *pSataChannel,
+                                  MV_PACKET_COMMAND_PARAMS   *pPacketCommandParams,
+                                    MV_U16  byteCount)
+{
+    MV_U32  i;
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG|MV_DEBUG_NON_UDMA_COMMAND,
+             "%d %d: xfer data for Packet command.count %d\n",
+             pSataChannel->mvSataAdapter->adapterId,
+             pSataChannel->channelNumber, byteCount);
+    byteCount >>= 1;
+    switch (pPacketCommandParams->protocolType)
+    {
+    case MV_NON_UDMA_PROTOCOL_PACKET_PIO_DATA_IN:
+        for (i = 0; i < byteCount; i++)
+        {
+            MV_U16 data;
+            if (pPacketCommandParams->transfered_data == pPacketCommandParams->buffer_len)
+            {
+                return MV_TRUE;
+            }
+            pPacketCommandParams->transfered_data += 2;
+	    data = MV_REG_READ_WORD(pSataChannel->mvSataAdapter->adapterIoBaseAddress,
+				    pSataChannel->eDmaRegsOffset +
+				    MV_ATA_DEVICE_PIO_DATA_REG_OFFSET);
+	    *pPacketCommandParams->bufPtr++ = MV_CPU_TO_LE16(data);
+        }
+        break;
+    case MV_NON_UDMA_PROTOCOL_PACKET_PIO_DATA_OUT:
+        for (i = 0; i < byteCount; i++)
+        {
+            if (pPacketCommandParams->transfered_data == pPacketCommandParams->buffer_len)
+            {
+                return MV_TRUE;
+            }
+            pPacketCommandParams->transfered_data += 2;
+             MV_REG_WRITE_WORD(pSataChannel->mvSataAdapter->adapterIoBaseAddress,
+                              pSataChannel->eDmaRegsOffset +
+			      MV_CPU_TO_LE16(MV_ATA_DEVICE_PIO_DATA_REG_OFFSET),
+                              *pPacketCommandParams->bufPtr++);
+        }
+        break;
+    default:
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "%d %d: in xfer data "
+                 "Packet command: non valid protocol type (%d)\n",
+                 pSataChannel->mvSataAdapter->adapterId,
+                 pSataChannel->channelNumber,pPacketCommandParams->protocolType );
+        return MV_FALSE;
+    }
+    return MV_TRUE;
+}
+#endif
+
+static void completePIOCommand(MV_SATA_CHANNEL *pSataChannel,
+                               MV_QUEUED_COMMAND_ENTRY *pCommandEntry,
+                               MV_BOOLEAN failed)
+{
+    MV_COMPLETION_TYPE              compType = MV_COMPLETION_TYPE_NORMAL;
+    MV_STORAGE_DEVICE_REGISTERS     deviceRegs;
+    MV_U8                           hostTag;
+    MV_NONE_UDMA_COMMAND_PARAMS     *pParams =
+    &pCommandEntry->pCommandInfo->commandParams.NoneUdmaCommand;
+
+    if (pCommandEntry->pCommandInfo->type != MV_QUEUED_COMMAND_TYPE_NONE_UDMA)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "%d %d: completePIOCommand called for"
+                    " wrong command\n",pSataChannel->mvSataAdapter->adapterId,
+                 pSataChannel->channelNumber );
+    }
+    dumpAtaDeviceRegisters(pSataChannel->mvSataAdapter,
+                           pSataChannel->channelNumber, pParams->isEXT,
+                           &deviceRegs);
+    if (failed == MV_TRUE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "%d %d: PIO Command completed "
+                 "with error\n", pSataChannel->mvSataAdapter->adapterId,
+                 pSataChannel->channelNumber);
+
+        compType = MV_COMPLETION_TYPE_ERROR;
+        pSataChannel->queueCommandsEnabled = MV_FALSE;
+    }
+    else
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG|MV_DEBUG_NON_UDMA_COMMAND,
+                 "%d %d: PIO Command completed successfully\n",
+                 pSataChannel->mvSataAdapter->adapterId,
+                 pSataChannel->channelNumber);
+        pSataChannel->recoveredErrorsCounter = 0;
+    }
+    /* pCommandEntry is invalid after calling the callback function
+        so we cache the tag to be used later*/
+
+    hostTag = pCommandEntry->hostTag;
+    if (hostTag == 0xFF)/*NCQ Error handling ReadLogExt command*/
+    {
+        /*sanity check*/
+        if (pCommandEntry != pSataChannel->ErrorHandlingInfo.pReadLogExtEntry)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR,
+                     "%d %d: in completePIOCommand, command is ReadLogExt"
+                     ", pointers mismatch \n",
+                     pSataChannel->mvSataAdapter->adapterId,
+                     pSataChannel->channelNumber);
+        }
+        commandsQueueRemove(pSataChannel,pCommandEntry);
+    }
+    else
+    {
+        removeCommand(pSataChannel,pCommandEntry);
+    }
+
+    pParams->callBack(pSataChannel->mvSataAdapter, pSataChannel->channelNumber,
+                      compType, pParams->commandId, 0, 0, &deviceRegs);
+
+    if (hostTag != 0xFF)/*if not NCQ Error handling ReadLogExt command*/
+    {
+        if (failed == MV_TRUE)
+        {
+            _doDevErrorRecovery(pSataChannel);
+        }
+        else
+        {
+            _insertQCommandsIntoEdma(pSataChannel);
+        }
+    }
+}
+#ifdef MV_SUPPORT_ATAPI
+static void completePacketCommand(MV_SATA_CHANNEL *pSataChannel,
+                               MV_QUEUED_COMMAND_ENTRY *pCommandEntry,
+                               MV_BOOLEAN failed)
+{
+    MV_COMPLETION_TYPE              compType = MV_COMPLETION_TYPE_NORMAL;
+    MV_STORAGE_DEVICE_REGISTERS     deviceRegs;
+    MV_PACKET_COMMAND_PARAMS        *pParams =
+    &pCommandEntry->pCommandInfo->commandParams.packetCommand;
+    MV_U32  transfered_data = pParams->transfered_data;  
+
+    dumpAtaDeviceRegisters(pSataChannel->mvSataAdapter,
+                           pSataChannel->channelNumber, MV_FALSE,
+                           &deviceRegs);
+    if (failed == MV_TRUE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "%d %d: Packet Command completed "
+                 "with error\n", pSataChannel->mvSataAdapter->adapterId,
+                 pSataChannel->channelNumber);
+
+    }
+    else
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG|MV_DEBUG_NON_UDMA_COMMAND,
+                 "%d %d: Packet Command completed successfully\n",
+                 pSataChannel->mvSataAdapter->adapterId,
+                 pSataChannel->channelNumber);
+    }
+    pSataChannel->recoveredErrorsCounter = 0;
+    
+
+    removeCommand(pSataChannel,pCommandEntry);
+
+    pParams->callBack(pSataChannel->mvSataAdapter, pSataChannel->channelNumber,
+                      compType, pParams->commandId, 0, transfered_data, &deviceRegs);
+
+    _insertQCommandsIntoEdma(pSataChannel);
+}
+#endif
+static  MV_VOID initTagsStack(struct _mvTagsStack *pTagsStack,
+                              MV_U8   *pTagsArray, MV_U8 size);
+
+static  MV_U8 popTag(struct _mvTagsStack *pTagsStack);
+
+static  MV_VOID pushTag(struct _mvTagsStack *pTagsStack, MV_U8 tag);
+
+static  MV_BOOLEAN isEmpty(struct _mvTagsStack *pTagsStack);
+
+static  MV_VOID initChannelTags(MV_SATA_CHANNEL *pSataChannel);
+static  MV_BOOLEAN getTag(MV_SATA_CHANNEL *pSataChannel, MV_U8 PMPort,
+                          MV_U8  *pHostTag,MV_U8 *pDeviceTag);
+static  MV_VOID releaseTag(MV_SATA_CHANNEL *pSataChannel, MV_U8 PMPort,
+                           MV_U8  hostTag,MV_U8 deviceTag);
+
+static  MV_VOID initTagsStack(struct _mvTagsStack *pTagsStack,
+                              MV_U8   *pTagsArray, MV_U8 size)
+{
+    MV_U8   i;
+    pTagsStack->pTagsArray = pTagsArray;
+    pTagsStack->top = size;
+    for (i = 0; i < size; i++)
+    {
+        pTagsStack->pTagsArray[i] = size - 1 - i;
+    }
+}
+
+static  MV_U8 popTag(struct _mvTagsStack *pTagsStack)
+{
+    return pTagsStack->pTagsArray[--pTagsStack->top];
+}
+
+static  MV_VOID pushTag(struct _mvTagsStack *pTagsStack, MV_U8 tag)
+{
+    pTagsStack->pTagsArray[pTagsStack->top++] = tag;
+}
+
+static  MV_BOOLEAN isEmpty(struct _mvTagsStack *pTagsStack)
+{
+    if (pTagsStack->top == 0)
+    {
+        return MV_TRUE;
+    }
+    return MV_FALSE;
+}
+
+static  MV_VOID initChannelTags(MV_SATA_CHANNEL *pSataChannel)
+{
+    MV_U8   i;
+    for (i = 0; i < MV_SATA_GEN2E_TAG_POOLS_NUM; i++)
+    {
+        initTagsStack(&pSataChannel->Tags.DeviceTagsPool[i],
+                      pSataChannel->Tags.DeviceTags[i],
+                      MV_SATA_TAGS_PER_POOL);
+    }
+    if (pSataChannel->use128Entries == MV_TRUE)
+    {
+        initTagsStack(&pSataChannel->Tags.HostTagsPool,
+                      pSataChannel->Tags.HostTags,
+                      MV_SATA_GEN2E_SW_QUEUE_SIZE);
+    }
+    else
+    {
+        initTagsStack(&pSataChannel->Tags.HostTagsPool,
+                      pSataChannel->Tags.HostTags,
+                      MV_SATA_SW_QUEUE_SIZE);
+    }
+}
+static  MV_BOOLEAN getTag(MV_SATA_CHANNEL *pSataChannel, MV_U8 PMPort,
+                          MV_U8  *pHostTag,MV_U8 *pDeviceTag)
+{
+    MV_U8 pool = 0;/*for Gen1-2 devices host tag must be equal to device tag*/
+    if (pSataChannel->mvSataAdapter->sataAdapterGeneration >= MV_SATA_GEN_IIE)
+    {
+        pool = PMPort & MV_SATA_GEN2E_TAG_PMPORT_MASK;
+    }
+    if ((MV_TRUE == isEmpty(&pSataChannel->Tags.HostTagsPool)) ||
+        (MV_TRUE == isEmpty(&pSataChannel->Tags.DeviceTagsPool[pool])))
+    {
+        return MV_FALSE;
+    }
+    *pHostTag = popTag(&pSataChannel->Tags.HostTagsPool);
+    *pDeviceTag = popTag(&pSataChannel->Tags.DeviceTagsPool[pool]);
+    return MV_TRUE;
+}
+static  MV_VOID releaseTag(MV_SATA_CHANNEL *pSataChannel, MV_U8 PMPort,
+                           MV_U8  hostTag,MV_U8 deviceTag)
+{
+    MV_U8 pool = 0;/*for Gen1-2 devices host tag must be equal to device tag*/
+    if (pSataChannel->mvSataAdapter->sataAdapterGeneration >= MV_SATA_GEN_IIE)
+    {
+        pool = PMPort & MV_SATA_GEN2E_TAG_PMPORT_MASK;
+    }
+    pushTag(&pSataChannel->Tags.HostTagsPool, hostTag);
+    pushTag(&pSataChannel->Tags.DeviceTagsPool[pool], deviceTag);
+}
+
+/*******************************************************************************
+* _resetEdmaQPointers - resets EDMA's Queues Pointers
+*
+*
+* DESCRIPTION:
+*
+* INPUT:
+*   *pSataChannel   - pointer to the Sata channel data structure
+*
+* RETURN:
+*   MV_TRUE on success, MV_FALSE otherwise.
+*
+* COMMENTS:
+*   this function assumes that the channel semaphore is locked
+*
+*******************************************************************************/
+static MV_BOOLEAN _resetEdmaQPointers(MV_SATA_CHANNEL *pSataChannel)
+{
+    MV_BUS_ADDR_T       ioBaseAddr =
+    pSataChannel->mvSataAdapter->adapterIoBaseAddress;
+    MV_U32 eDmaRegsOffset = pSataChannel->eDmaRegsOffset;
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, "%d %d: _resetEdmaQPointers\n",
+             pSataChannel->mvSataAdapter->adapterId,
+             pSataChannel->channelNumber);
+
+    pSataChannel->EdmaQueuedCommands = 0;
+    pSataChannel->reqInPtr = 0;
+    pSataChannel->rspOutPtr = 0;
+
+    MV_REG_WRITE_DWORD(ioBaseAddr, eDmaRegsOffset +
+                       MV_EDMA_REQUEST_Q_BAH_REG_OFFSET,
+                       pSataChannel->requestQueuePciHiAddress);
+    MV_REG_WRITE_DWORD(ioBaseAddr, eDmaRegsOffset +
+                       MV_EDMA_REQUEST_Q_INP_REG_OFFSET,
+                       pSataChannel->requestQueuePciLowAddress &
+                       MV_EDMA_REQUEST_Q_BA_MASK);
+        MV_REG_WRITE_DWORD(ioBaseAddr, eDmaRegsOffset +
+                           MV_EDMA_REQUEST_Q_OUTP_REG_OFFSET, 0);
+
+    MV_REG_WRITE_DWORD(ioBaseAddr, eDmaRegsOffset +
+                       MV_EDMA_RESPONSE_Q_BAH_REG_OFFSET,
+                       pSataChannel->responseQueuePciHiAddress);
+        MV_REG_WRITE_DWORD(ioBaseAddr, eDmaRegsOffset +
+                           MV_EDMA_RESPONSE_Q_INP_REG_OFFSET, 0);
+    MV_REG_WRITE_DWORD(ioBaseAddr, eDmaRegsOffset +
+                       MV_EDMA_RESPONSE_Q_OUTP_REG_OFFSET,
+                       pSataChannel->responseQueuePciLowAddress);
+
+    return MV_TRUE;
+}
+static void setupEdmaDeviceErrorHandlingConfiguration(MV_SATA_CHANNEL *pSataChannel)
+{
+    MV_BUS_ADDR_T ioBaseAddr = pSataChannel->mvSataAdapter->adapterIoBaseAddress;
+
+    if (pSataChannel->queuedDMA == MV_EDMA_MODE_NATIVE_QUEUING)
+    {
+        _setRegBits(ioBaseAddr, pSataChannel->eDmaRegsOffset +
+                    MV_EDMA_INTERRUPT_ERROR_MASK_REG_OFFSET, MV_BIT2);
+
+        if (pSataChannel->mvSataAdapter->sataAdapterGeneration == MV_SATA_GEN_IIE)
+        {
+            _clearRegBits(ioBaseAddr, pSataChannel->eDmaRegsOffset +
+                          MV_EDMA_HALT_CONDITIONS_REG_OFFSET, MV_BIT2);
+            _clearRegBits(ioBaseAddr, pSataChannel->eDmaRegsOffset +
+                          MV_EDMA_FIS_CONFIGURATION_REG_OFFSET, MV_BIT10 | MV_BIT8);
+        }
+        else
+        {
+            _setRegBits(ioBaseAddr, pSataChannel->eDmaRegsOffset +
+                        MV_EDMA_CONFIG_REG_OFFSET, MV_EDMA_CONFIG_CONONDEVERR_MASK);
+            /* Fix for 88SX60x1 FEr SATA#25 */
+            _setRegBits(ioBaseAddr,
+                        MV_FLASH_GPIO_PORT_CONTROL_OFFSET, MV_BIT22);
+        }
+    }
+    else
+    {
+
+        _clearRegBits(ioBaseAddr, pSataChannel->eDmaRegsOffset +
+                      MV_EDMA_CONFIG_REG_OFFSET, MV_EDMA_CONFIG_CONONDEVERR_MASK);
+        if (pSataChannel->mvSataAdapter->sataAdapterGeneration == MV_SATA_GEN_II)
+        {
+            _clearRegBits(ioBaseAddr,
+                          MV_FLASH_GPIO_PORT_CONTROL_OFFSET, MV_BIT22);
+        }
+
+        if (pSataChannel->FBSEnabled == MV_TRUE)
+        {
+            if (pSataChannel->queuedDMA == MV_EDMA_MODE_QUEUED)
+            {
+                _setRegBits(ioBaseAddr, pSataChannel->eDmaRegsOffset +
+                            MV_EDMA_INTERRUPT_ERROR_MASK_REG_OFFSET, MV_BIT2);
+            }
+            else
+            {
+                _clearRegBits(ioBaseAddr, pSataChannel->eDmaRegsOffset +
+                              MV_EDMA_INTERRUPT_ERROR_MASK_REG_OFFSET, MV_BIT2);
+            }
+            _clearRegBits(ioBaseAddr, pSataChannel->eDmaRegsOffset +
+                          MV_EDMA_HALT_CONDITIONS_REG_OFFSET, MV_BIT2);
+            _setRegBits(ioBaseAddr, pSataChannel->eDmaRegsOffset +
+                        MV_EDMA_FIS_CONFIGURATION_REG_OFFSET, MV_BIT8);
+            _clearRegBits(ioBaseAddr, pSataChannel->eDmaRegsOffset +
+                          MV_EDMA_FIS_CONFIGURATION_REG_OFFSET, MV_BIT10);
+
+        }
+        else
+        {
+            _clearRegBits(ioBaseAddr, pSataChannel->eDmaRegsOffset +
+                          MV_EDMA_INTERRUPT_ERROR_MASK_REG_OFFSET, MV_BIT2);
+            if (pSataChannel->mvSataAdapter->sataAdapterGeneration == MV_SATA_GEN_IIE)
+            {
+                _setRegBits(ioBaseAddr, pSataChannel->eDmaRegsOffset +
+                            MV_EDMA_HALT_CONDITIONS_REG_OFFSET, MV_BIT2);
+                _clearRegBits(ioBaseAddr, pSataChannel->eDmaRegsOffset +
+                              MV_EDMA_FIS_CONFIGURATION_REG_OFFSET, MV_BIT10 | MV_BIT8);
+            }
+        }
+    }
+}
+
+/*******************************************************************************
+* resetEdmaChannel - resets the channel data stucture and EDMA registers
+*
+*
+* DESCRIPTION:
+*   this function resets the low level EDMA fields of Sata channel data
+*   structure and initialize the EDMA register accourdingly
+*
+* INPUT:
+*   *pSataChannel   - pointer to the Sata channel data structure
+*
+* RETURN:
+*   MV_TRUE on success, MV_FALSE otherwise.
+*
+* COMMENTS:
+*   this function assumes that the channel semaphore is locked
+*
+*******************************************************************************/
+static MV_BOOLEAN resetEdmaChannel(MV_SATA_CHANNEL *pSataChannel)
+{
+    MV_BUS_ADDR_T       ioBaseAddr =
+    pSataChannel->mvSataAdapter->adapterIoBaseAddress;
+    MV_U32 eDmaRegsOffset = pSataChannel->eDmaRegsOffset;
+    int i;
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, "%d %d: resetEdmaChannel\n",
+             pSataChannel->mvSataAdapter->adapterId,
+             pSataChannel->channelNumber);
+
+    if (MV_REG_READ_DWORD(ioBaseAddr, eDmaRegsOffset +
+                          MV_EDMA_COMMAND_REG_OFFSET) &
+        MV_EDMA_COMMAND_HARD_RST_MASK)
+    {
+        MV_REG_WRITE_DWORD(ioBaseAddr, eDmaRegsOffset +
+                           MV_EDMA_COMMAND_REG_OFFSET,
+                           MV_EDMA_COMMAND_DISABLE_MASK);
+
+        MV_REG_READ_DWORD(ioBaseAddr, eDmaRegsOffset +
+                          MV_EDMA_COMMAND_REG_OFFSET);
+        mvMicroSecondsDelay(pSataChannel->mvSataAdapter,
+                            MV_HARD_RESET_WAIT_NEGATE);
+        _fixPhyParams(pSataChannel->mvSataAdapter, pSataChannel->channelNumber);
+    }
+    else
+    {
+        MV_REG_WRITE_DWORD(ioBaseAddr, eDmaRegsOffset +
+                           MV_EDMA_COMMAND_REG_OFFSET,
+                           MV_EDMA_COMMAND_DISABLE_MASK);
+    }
+
+    pSataChannel->outstandingCommands = 0;
+    for (i = 0; i <= MV_SATA_PM_MAX_PORTS; i++)
+    {
+        pSataChannel->portQueuedCommands[i] = 0;
+    }
+    pSataChannel->noneUdmaOutstandingCommands = 0;
+#ifdef  MV_SUPPORT_ATAPI
+    pSataChannel->packetOutstandingCommands = 0;
+#endif
+    pSataChannel->EdmaActive = MV_FALSE;
+
+    /* init free entries stack*/
+    initChannelTags(pSataChannel);
+    for (i = 0; i < pSataChannel->commandsQueueSize; i++)
+    {
+        pSataChannel->commandsQueue[i].isFreeEntry = MV_TRUE;
+    }
+
+    pSataChannel->commandsQueueHead = NULL;
+    pSataChannel->commandsQueueTail = NULL;
+    pSataChannel->queueCommandsEnabled = MV_FALSE;
+#ifdef MV_SATA_C2C_COMM
+
+    /* C2C */
+    pSataChannel->C2CmodeEnabled = MV_FALSE;
+#endif
+    pSataChannel->ErrorHandlingInfo.CurrPort = 0;
+    pSataChannel->ErrorHandlingInfo.state = MV_ERROR_HANDLING_STATE_IDLE;
+    pSataChannel->ErrorHandlingInfo.PortsWithErrors = 0;
+    pSataChannel->ErrorHandlingInfo.useVendorUniqGen2WA = MV_FALSE;
+    pSataChannel->recoveredErrorsCounter = 0;
+    _resetEdmaQPointers(pSataChannel);
+    return MV_TRUE;
+}
+
+static void flushDmaQueue(MV_SATA_CHANNEL *pSataChannel,MV_FLUSH_TYPE flushType,
+                          MV_COMPLETION_TYPE completionType, MV_U16 eDmaCause)
+{
+    mvSataCommandCompletionCallBack_t callBackFunc;
+    int i;
+
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "%d %d: Flush DMA, type=%s, commands"
+             " %d (on EDMA %d)\n", pSataChannel->mvSataAdapter->adapterId,
+             pSataChannel->channelNumber,
+             (flushType==MV_FLUSH_TYPE_CALLBACK)?"CALLBACK":"NONE",
+             pSataChannel->outstandingCommands,pSataChannel->EdmaQueuedCommands);
+
+    if (flushType == MV_FLUSH_TYPE_CALLBACK)
+    {
+        for (i = 0; i < pSataChannel->commandsQueueSize; i++)
+        {
+            if (pSataChannel->commandsQueue[i].isFreeEntry == MV_FALSE)
+            {
+                MV_STORAGE_DEVICE_REGISTERS deviceRegisters;
+                MV_BOOLEAN  isEXT;
+                MV_VOID_PTR commandId;
+                switch (pSataChannel->commandsQueue[i].pCommandInfo->type)
+                {
+                    case MV_QUEUED_COMMAND_TYPE_NONE_UDMA:
+                        isEXT = pSataChannel->commandsQueue[i].pCommandInfo->commandParams.NoneUdmaCommand.isEXT;
+                        commandId = pSataChannel->commandsQueue[i].pCommandInfo->commandParams.NoneUdmaCommand.commandId;
+                        callBackFunc = pSataChannel->commandsQueue[i].pCommandInfo->commandParams.NoneUdmaCommand.callBack;
+                        break;
+                    case MV_QUEUED_COMMAND_TYPE_UDMA:
+                        isEXT = pSataChannel->commandsQueue[i].pCommandInfo->commandParams.udmaCommand.isEXT;
+                        commandId = pSataChannel->commandsQueue[i].pCommandInfo->commandParams.udmaCommand.commandId;
+                        callBackFunc = pSataChannel->commandsQueue[i].pCommandInfo->commandParams.udmaCommand.callBack;
+                        break;
+                    default:
+                        /* MV_QUEUED_COMMAND_TYPE_PACKET:*/
+                        isEXT = MV_FALSE;
+                        commandId = pSataChannel->commandsQueue[i].pCommandInfo->commandParams.packetCommand.commandId;
+                        callBackFunc = pSataChannel->commandsQueue[i].pCommandInfo->commandParams.packetCommand.callBack;
+                        break;
+                }
+
+                dumpAtaDeviceRegisters(pSataChannel->mvSataAdapter,
+                                       pSataChannel->channelNumber, isEXT,
+                                       &deviceRegisters);
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                         "%d %d: Calling callBackFunc - host tag 0x%x (device tag 0x%x) at %p,"
+                         " next %p, prev %p, PMPort 0x%x\n",
+                         pSataChannel->mvSataAdapter->adapterId,
+                         pSataChannel->channelNumber,
+                         i,
+                         pSataChannel->commandsQueue[i].deviceTag,
+                         &pSataChannel->commandsQueue[i],
+                         pSataChannel->commandsQueue[i].next,
+                         pSataChannel->commandsQueue[i].prev,
+                         pSataChannel->commandsQueue[i].pCommandInfo->PMPort);
+                callBackFunc(pSataChannel->mvSataAdapter,
+                             pSataChannel->channelNumber, completionType,
+                             commandId, eDmaCause, 0, &deviceRegisters);
+            }
+        }
+    }
+}
+
+static void _fixPhyParams(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex)
+{
+    /* Set unit 0 or 1 */
+    MV_U8       sataUnit = (channelIndex & MV_BIT2) >> 2;
+    /* Set port 0-3 */
+    MV_U8       port = channelIndex & (MV_BIT0 | MV_BIT1);
+    MV_U32      regVal;
+
+    if (pAdapter->sataAdapterGeneration == MV_SATA_GEN_I)
+    {
+
+        if (pAdapter->chipIs50XXB0 == MV_TRUE)
+        {
+            /* Fix for 88SX50xx FEr SATA#12 */
+            /* Disable auto-power management*/
+            regVal = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                       MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                                       MV_SATA_I_HC_LT_MODES_PORT_REG_OFFSET(port));
+            regVal |= MV_BIT19; /* disbale auto-power management*/
+            MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                               MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                               MV_SATA_I_HC_LT_MODES_PORT_REG_OFFSET(port),
+                               regVal);
+            /* 88SX50xx FEr SATA#9*/
+            /*Fix squelch threshold*/
+            regVal = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                       MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                                       MV_SATA_I_HC_PHY_CONTROL_BRIDGE_PORT_OFFSET(port));
+
+            regVal &= ~0x3;
+            regVal |= 0x1;
+            MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                               MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                               MV_SATA_I_HC_PHY_CONTROL_BRIDGE_PORT_OFFSET(port),
+                               regVal);
+        }
+        /* Revert values of pre-emphasis and signal amps to the saved ones */
+        {
+            regVal = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                       MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                                       MV_SATA_I_HC_PHY_MODE_BRIDGE_PORT_REG_OFFSET(port));
+            regVal &= ~MV_SATA_I_PHY_MODE_AMP_MASK;
+            regVal |= (pAdapter->signalAmps[channelIndex] << MV_SATA_I_PHY_MODE_AMP_OFFSET) &
+                      MV_SATA_I_PHY_MODE_AMP_MASK;
+            regVal &= ~MV_SATA_I_PHY_MODE_PRE_MASK;
+            regVal |= (pAdapter->pre[channelIndex] << MV_SATA_I_PHY_MODE_PRE_OFFSET) &
+                      MV_SATA_I_PHY_MODE_PRE_MASK;
+            MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                               MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                               MV_SATA_I_HC_PHY_MODE_BRIDGE_PORT_REG_OFFSET(port),
+                               regVal);
+        }
+    }
+    if ((pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II) && 
+	(pAdapter->chipIs62X1Z0 == MV_FALSE) && (pAdapter->chipIs65XXZ0 == MV_FALSE))
+    {
+        MV_U32 phyMode2Offset = getEdmaRegOffset(channelIndex) +
+                                MV_SATA_II_PHY_MODE_2_REG_OFFSET;
+        if ((pAdapter->chipIs60X1B2 == MV_TRUE) ||
+            (pAdapter->chipIs60X1C0 == MV_TRUE))
+        {
+            /* Fix for 88SX60X1 FEr SATA #23 */
+            /* 88SX6042/88SX7042 FEr SATA #23 */
+            /* 88F5182 FEr #SATA-S13 */
+            /* 88F5082 FEr #SATA-S13 */
+            MV_U32 regVal2;
+            regVal2 = MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress,
+                                        getEdmaRegOffset (channelIndex) +
+                                        MV_SATA_II_PHY_MODE_2_REG_OFFSET);
+            regVal2 |= MV_BIT31;
+            regVal2 &= ~MV_BIT16;
+            MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                                getEdmaRegOffset (channelIndex) +
+                                MV_SATA_II_PHY_MODE_2_REG_OFFSET,
+                                regVal2);
+            mvMicroSecondsDelay (pAdapter, 200); /* Wait 200uSec */
+            regVal2 = MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress,
+                                        getEdmaRegOffset (channelIndex) +
+                                        MV_SATA_II_PHY_MODE_2_REG_OFFSET);
+            regVal2 &= ~MV_BIT31;
+            regVal2 &= ~MV_BIT16;
+            MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                                getEdmaRegOffset (channelIndex) +
+                                MV_SATA_II_PHY_MODE_2_REG_OFFSET,
+                                regVal2);
+            mvMicroSecondsDelay (pAdapter, 200); /* Wait 200uSec */
+        }
+        /* Fix values in phyMode 3 register.*/
+        {  
+            MV_U32     regVal2 = MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress,
+                                                   getEdmaRegOffset (channelIndex) +
+                                                   MV_SATA_II_PHY_MODE_3_REG_OFFSET);
+            regVal2 &= ~0x7F900000;
+            regVal2 |= 0x2A800000;
+            
+            /* Implement Guidline 88F5182, 88F5082, 88F6082 (GL# SATA-S11) */
+            if((pAdapter->pciConfigDeviceId == MV_SATA_DEVICE_ID_5182) ||
+            	(pAdapter->pciConfigDeviceId == MV_SATA_DEVICE_ID_5082) ||
+            	(pAdapter->pciConfigDeviceId == MV_SATA_DEVICE_ID_6082))
+            {
+                regVal2 &= ~0x1C; 
+            }
+            MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                                getEdmaRegOffset (channelIndex) +
+                                MV_SATA_II_PHY_MODE_3_REG_OFFSET, 
+                                regVal2);
+        }
+        /* Fix values in phyMode 4 register.*/
+        /* 88SX60x1 FEr SATA#10 */
+        /* 88F5182 GL #SATA-S10 */
+        /* 88F5082 GL #SATA-S10 */
+        if ((pAdapter->chipIs60X1B2 == MV_TRUE) ||
+            (pAdapter->chipIs60X1C0 == MV_TRUE))
+        {
+            MV_U32 phyMode4Value;
+            MV_U32 tempRegOffset, tempRegValue = 0;
+            MV_U32 phyMode4Offset = getEdmaRegOffset (channelIndex) +
+                                    MV_SATA_II_PHY_MODE_4_REG_OFFSET;
+            tempRegOffset = getEdmaRegOffset (channelIndex) + 0x310;
+
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID,  MV_DEBUG|MV_DEBUG_SATA_LINK,
+                     "%d %d: PHY mode4 reg value before fix is %x\n",
+                     pAdapter->adapterId, channelIndex,
+                     MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress,
+                                        phyMode4Offset));
+            phyMode4Value = MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress,
+                                               phyMode4Offset);
+            /* 88SX60x1 FEr SATA #13 */
+            if (pAdapter->chipIs60X1B2 == MV_TRUE)
+            {
+                tempRegValue = MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress,
+                                                  tempRegOffset);
+            }
+
+            phyMode4Value |= MV_BIT0;
+            phyMode4Value &= ~MV_BIT1;
+            /* phy mode 4 register of Gen IIE devices has some restriction */
+            if (pAdapter->sataAdapterGeneration >= MV_SATA_GEN_IIE)
+            {
+                phyMode4Value &= ~0x5DE3FFFC;
+                phyMode4Value |= MV_BIT2;
+                
+            }
+            MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                                phyMode4Offset, phyMode4Value);
+            /* 88SX60x1 FEr SATA #13 */
+            if (pAdapter->chipIs60X1B2 == MV_TRUE)
+            {
+                MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                                    tempRegOffset, tempRegValue);
+            }
+
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID,  MV_DEBUG|MV_DEBUG_SATA_LINK,
+                     "%d %d: PHY mode4 reg value after fix is %x\n",
+                     pAdapter->adapterId, channelIndex,
+                     MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress,
+                                        phyMode4Offset));
+        }
+
+        /* Revert values of pre-emphasis and signal amps to the saved ones */
+        regVal = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                   phyMode2Offset);
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID,  MV_DEBUG, "%d %d: PHY mode2 "
+                 "reg = %x (Before AMP/PRE modification)\n",
+                 pAdapter->adapterId, channelIndex, regVal);
+
+        regVal &= ~MV_SATA_II_PHY_MODE_2_AMP_MASK;
+        regVal |= (pAdapter->signalAmps[channelIndex] << MV_SATA_II_PHY_MODE_2_AMP_OFFSET) &
+                  MV_SATA_II_PHY_MODE_2_AMP_MASK;
+        regVal &= ~MV_SATA_II_PHY_MODE_2_PRE_MASK;
+        regVal |= (pAdapter->pre[channelIndex] << MV_SATA_II_PHY_MODE_2_PRE_OFFSET) &
+                  MV_SATA_II_PHY_MODE_2_PRE_MASK;
+        regVal &= ~MV_BIT16; /* Should always write 0 to bit 16 in phymode 2 */
+
+        /*some reserved fields must be written with fixed values */
+        if (pAdapter->sataAdapterGeneration >= MV_SATA_GEN_IIE)
+        {
+            regVal &= ~0xC30FF01F;
+            regVal |= 0x0000900F;
+        }
+        MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                           phyMode2Offset, regVal);
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID,  MV_DEBUG, "%d %d: PHY mode2 "
+                 "reg = %x (After AMP/PRE modification)\n",
+                 pAdapter->adapterId, channelIndex,
+                 MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                   phyMode2Offset));
+    }
+    if(pAdapter->chipIs62X1Z0 == MV_TRUE)
+    {
+	 
+	 regVal = MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress,
+				     getEdmaRegOffset (channelIndex) +
+				     MV_SATA_II_PHY_MODE_3_REG_OFFSET);
+
+         regVal &= ~0x78100000;
+         regVal |=  0x28000000;
+
+         MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                             getEdmaRegOffset (channelIndex) +
+                             MV_SATA_II_PHY_MODE_3_REG_OFFSET,
+                             regVal);
+
+         regVal = MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress,
+                                     getEdmaRegOffset (channelIndex) +
+                                     MV_SATA_II_PHY_MODE_4_REG_OFFSET);
+         regVal &= ~0x1;
+	 regVal |= MV_BIT16; /* must write 1 to this bit */
+         MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                             getEdmaRegOffset (channelIndex) +
+                             MV_SATA_II_PHY_MODE_4_REG_OFFSET,
+                             regVal);
+
+	 regVal = MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress,
+				     getEdmaRegOffset (channelIndex) +
+				     MV_SATA_II_PHY_MODE_9_GEN2_REG_OFFSET);
+	 regVal &= ~0x7CFF;
+	 regVal |= 0x00438;
+	 
+	 MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+			     getEdmaRegOffset (channelIndex) +
+			     MV_SATA_II_PHY_MODE_9_GEN2_REG_OFFSET,
+			regVal);
+
+	 regVal = MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress,
+				     getEdmaRegOffset (channelIndex) +
+				     MV_SATA_II_PHY_MODE_9_GEN1_REG_OFFSET);
+	 regVal &= ~0x400F;
+	 regVal |= 0x00008;
+	 
+	 MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+			     getEdmaRegOffset (channelIndex) +
+			     MV_SATA_II_PHY_MODE_9_GEN1_REG_OFFSET,
+			     regVal);
+    }
+
+    if(pAdapter->chipIs65XXZ0 == MV_TRUE)
+    {
+	    /* Do nothing */
+    }
+}
+
+static void _channelHardReset(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex)
+{
+    MV_U32 EdmaCommandOffset = getEdmaRegOffset(channelIndex) +
+                               MV_EDMA_COMMAND_REG_OFFSET;
+
+    maskEdmaInterrupts(pAdapter, channelIndex);
+    /* 1. Set ATA reset bit*/
+    MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress, EdmaCommandOffset,
+                       MV_EDMA_COMMAND_HARD_RST_MASK);
+    MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress, EdmaCommandOffset);
+
+    /* 2. Wait 25uSeconds*/
+    mvMicroSecondsDelay(pAdapter, MV_HARD_RESET_WAIT_ASSERT);
+
+
+    /* 3. Clear ATA reset bit*/
+    MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress, EdmaCommandOffset, 0);
+    MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress, EdmaCommandOffset);
+
+    /* 4. Change phy params (watermark + squelch) */
+    _fixPhyParams(pAdapter, channelIndex);
+    /* For Gen 1 devices, time delay is needed after resetingt the SATA bridge*/
+    if (pAdapter->sataAdapterGeneration == MV_SATA_GEN_I)
+    {
+        mvMicroSecondsDelay(pAdapter, MV_HARD_RESET_WAIT_NEGATE);
+    }
+    unmaskEdmaInterrupts(pAdapter, channelIndex);
+
+}
+static void _establishSataComm(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex)
+{
+    MV_U32 SControlOffset = getEdmaRegOffset(channelIndex) +
+                            MV_SATA_II_S_CONTROL_REG_OFFSET;
+    MV_U32 SStatusOffset = getEdmaRegOffset(channelIndex) +
+                                    MV_SATA_II_S_STATUS_REG_OFFSET;
+    MV_U32 SStatus;
+    MV_U8   retryCount, commRetryCount = 5, retryWithGen1 = 0;
+
+    maskEdmaInterrupts(pAdapter, channelIndex);
+
+    if (pAdapter->sataAdapterGeneration == MV_SATA_GEN_I)
+    {
+        /*  Set DET field in SControl register to 1 */
+        MV_U8       port = channelIndex & (MV_BIT0 | MV_BIT1);
+        MV_U8       sataUnit = (channelIndex & MV_BIT2) >> 2;
+        SControlOffset = MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                         MV_SATA_I_HC_R02_STATUS_BRIDGE_PORT_OFFSET(port);
+        SStatusOffset = getEdmaRegOffset(channelIndex) +
+                            MV_SATA_II_S_STATUS_REG_OFFSET;
+    }
+
+    while (1)
+    {
+        MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress, SControlOffset, 0x301);
+        MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress, SControlOffset);
+        MV_CPU_WRITE_BUFFER_FLUSH();
+        mvMicroSecondsDelay(pAdapter, MV_SATA_COMM_INIT_DELAY);
+        MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress, SControlOffset, 0x300);
+        MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress, SControlOffset);
+        MV_CPU_WRITE_BUFFER_FLUSH();
+        mvMicroSecondsDelay(pAdapter, MV_SATA_COMM_INIT_WAIT_DELAY);
+        unmaskEdmaInterrupts(pAdapter, channelIndex);
+        /*Wait 200 msec for PHY to become ready*/
+        for (retryCount = 0; retryCount < 200; retryCount++)
+        {
+            if (_checkSStatusAfterHReset(pAdapter, channelIndex) == MV_FALSE)
+            {
+                mvMicroSecondsDelay(pAdapter, 1000);
+            }
+            else
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG|MV_DEBUG_SATA_LINK, "%d %d: SATA PHY ready "
+                         "after %d msec\n", pAdapter->adapterId, channelIndex,
+                         retryCount);
+
+                break;
+            }
+        }
+        if (retryCount == 200)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG|MV_DEBUG_SATA_LINK,
+                     "%d %d: SATA PHY not ready after 200 msec\n",
+                     pAdapter->adapterId, channelIndex);
+        }
+        SStatus = MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress,
+                                     SStatusOffset);
+        /* Fix for 88SX60X1 FEr #10 - retry SATA communication if failed 5 times */
+        /* this workaround applied for all devices for simplicity and robustness */
+        if ((SStatus == 0x0) || (SStatus == 0x113) || (SStatus == 0x123))
+        {
+            break;
+        }
+        commRetryCount --;
+        if (commRetryCount == 0)
+        {
+            MV_U32 regVal;
+
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG|MV_DEBUG_FATAL_ERROR,
+                     "%d %d: Failed OOB sequence 5 times !!!\n",
+                     pAdapter->adapterId, channelIndex);
+            if ((SStatus != 0x121) || (retryWithGen1 == 1) || (pAdapter->sataAdapterGeneration == MV_SATA_GEN_I))
+            {
+            break;
+        }
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG|MV_DEBUG_FATAL_ERROR,
+                     "%d %d: SStatus is 0x121, Retry OOB sequence with Gen1 \n",
+                     pAdapter->adapterId, channelIndex);
+            retryWithGen1 = 1;
+            commRetryCount = 5;
+            /* set the phy in offline mode */
+            MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress, SControlOffset, 0x304);
+
+            /* force Sata speed to Gen1*/
+            regVal = MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress,
+                                    getEdmaRegOffset (channelIndex) +
+                                    MV_SATA_II_SATA_CONFIG_REG_OFFSET);
+            /* according to the spec, bits [31:12] must be set to 0x009B1 */
+            /* Fix for 88SX60x1 FEr SATA#8*/
+            regVal &= 0x00000FFF;
+            /* regVal |= MV_BIT12;*/
+            regVal |= 0x009B1000;
+            regVal &= ~MV_BIT7; /* Disable GEn II */
+            MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                                getEdmaRegOffset (channelIndex) +
+                                MV_SATA_II_SATA_CONFIG_REG_OFFSET,
+                                regVal);
+            
+            _channelHardReset(pAdapter, channelIndex);
+        }
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                 "%d %d: Retrying OOB sequnce",pAdapter->adapterId,
+                 channelIndex);
+    }
+}
+
+static void _establishSataCommAll(MV_SATA_ADAPTER *pAdapter)
+{
+    MV_U8 channelIndex;
+    MV_U32 SControlOffset;
+    if (pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II)
+    {
+        for (channelIndex = 0 ; channelIndex < pAdapter->numberOfChannels ;
+            channelIndex ++)
+        {
+            maskEdmaInterrupts(pAdapter, channelIndex);
+            SControlOffset = getEdmaRegOffset(channelIndex) +
+                             MV_SATA_II_S_CONTROL_REG_OFFSET;
+            MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress, SControlOffset,
+                                0x301);
+
+        }
+        /* Wait for 1mSecond for COMRESET for all drives */
+        mvMicroSecondsDelay(pAdapter, MV_SATA_COMM_INIT_DELAY);
+        for (channelIndex = 0 ; channelIndex < pAdapter->numberOfChannels ;
+            channelIndex ++)
+        {
+            SControlOffset = getEdmaRegOffset(channelIndex) +
+                             MV_SATA_II_S_CONTROL_REG_OFFSET;
+            MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress, SControlOffset,
+                                0x300);
+        }
+        mvMicroSecondsDelay(pAdapter, MV_SATA_COMM_INIT_WAIT_DELAY);
+        for (channelIndex = 0 ; channelIndex < pAdapter->numberOfChannels ;
+            channelIndex ++)
+        {
+            unmaskEdmaInterrupts(pAdapter, channelIndex);
+        }
+    }
+}
+
+
+
+
+
+void _setActivePMPort(MV_SATA_CHANNEL *pSataChannel, MV_U8 PMPort)
+{
+    MV_BUS_ADDR_T   ioBaseAddr = pSataChannel->mvSataAdapter->adapterIoBaseAddress;
+    MV_U32          eDmaRegsOffset = pSataChannel->eDmaRegsOffset;
+    MV_U32  regVal;
+
+    if (pSataChannel->PMSupported == MV_FALSE)
+    {
+        return;
+    }
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG | MV_DEBUG_PM, "%d %d: Set TX PM"
+             " Port to %x\n", pSataChannel->mvSataAdapter->adapterId,
+             pSataChannel->channelNumber, PMPort);
+
+    regVal = MV_REG_READ_DWORD(ioBaseAddr, eDmaRegsOffset +
+                               MV_SATA_II_IF_CONTROL_REG_OFFSET);
+
+    regVal &= ~MV_SATA_II_IF_CONTROL_PMTX_MASK;
+    regVal |= (PMPort << MV_SATA_II_IF_CONTROL_PMTX_OFFSET) &
+              MV_SATA_II_IF_CONTROL_PMTX_MASK;
+    MV_REG_WRITE_DWORD(ioBaseAddr, eDmaRegsOffset +
+                       MV_SATA_II_IF_CONTROL_REG_OFFSET, regVal);
+    MV_REG_READ_DWORD(ioBaseAddr, eDmaRegsOffset +
+                      MV_SATA_II_IF_CONTROL_REG_OFFSET);
+
+}
+static void revertSataHCRegs (MV_SATA_ADAPTER *pAdapter)
+{
+    MV_U8 channelIndex;
+    MV_U8 temp;
+    MV_U32 edmaRegsOffset;
+    MV_U32 sataHcRegsOffset;
+    MV_U32 regTemp;
+    MV_U8  sataUnit;
+
+    if ((pAdapter->sataAdapterGeneration == MV_SATA_GEN_I) || 
+	(pAdapter->hostInterface == MV_HOST_IF_INTEGRATED))
+    {
+        for (sataUnit = 0 ; sataUnit < pAdapter->numberOfUnits ; sataUnit ++)
+        {
+            for (temp = 0 ; temp < pAdapter->portsPerUnit ; temp ++)
+            {
+                channelIndex = temp + sataUnit * pAdapter->portsPerUnit;
+                edmaRegsOffset = getEdmaRegOffset(channelIndex);
+
+                /* Disable EDMA */
+                MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                                   edmaRegsOffset + MV_EDMA_COMMAND_REG_OFFSET,
+                                   MV_EDMA_COMMAND_DISABLE_MASK);
+                MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                  edmaRegsOffset + MV_EDMA_COMMAND_REG_OFFSET);
+
+                /* Reset SATA bridge */
+                _channelHardReset(pAdapter, channelIndex);
+
+                /* Zero EDMA registersr */
+                MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                                   edmaRegsOffset + MV_EDMA_COMMAND_REG_OFFSET, 0);
+
+		if(pAdapter->hostInterface == MV_HOST_IF_INTEGRATED)
+		{
+			MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+					   edmaRegsOffset + MV_EDMA_CONFIG_REG_OFFSET, 0x101f);
+		}
+		else
+		{
+			MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+					   edmaRegsOffset + MV_EDMA_CONFIG_REG_OFFSET, 0x11f);
+		}
+
+                MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                                   edmaRegsOffset + MV_EDMA_TIMER_REG_OFFSET, 0);
+                MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                                   edmaRegsOffset + MV_EDMA_INTERRUPT_ERROR_CAUSE_REG_OFFSET, 0);
+                MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                                   edmaRegsOffset + MV_EDMA_INTERRUPT_ERROR_MASK_REG_OFFSET, 0);
+                MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                                   edmaRegsOffset + MV_EDMA_REQUEST_Q_BAH_REG_OFFSET, 0);
+                MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                                   edmaRegsOffset + MV_EDMA_REQUEST_Q_INP_REG_OFFSET, 0);
+                MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                                   edmaRegsOffset + MV_EDMA_REQUEST_Q_OUTP_REG_OFFSET,0);
+                MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                                   edmaRegsOffset + MV_EDMA_RESPONSE_Q_BAH_REG_OFFSET, 0);
+                MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                                   edmaRegsOffset + MV_EDMA_RESPONSE_Q_OUTP_REG_OFFSET, 0);
+                MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                                   edmaRegsOffset + MV_EDMA_RESPONSE_Q_INP_REG_OFFSET, 0);
+                MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                                   edmaRegsOffset + MV_EDMA_TEST_CONTROL_REG_OFFSET, 0);
+                MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                                   edmaRegsOffset + MV_EDMA_IORDY_TIMEOUT_REG_OFFSET, 0x800);
+            }
+
+            /* Revert values of SATA HC regs (few registers are READ-ONLY ) */
+	    if(pAdapter->hostInterface != MV_HOST_IF_INTEGRATED)
+	    {
+        	    sataHcRegsOffset = MV_SATAHC_REGS_BASE_OFFSET(sataUnit);
+	        		MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                      	sataHcRegsOffset + MV_SATAHC_INT_COAL_THRE_REG_OFFSET, 0);
+	            MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+        	                        sataHcRegsOffset + MV_SATAHC_INT_TIME_THRE_REG_OFFSET, 0);
+	            MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+        	                        sataHcRegsOffset + MV_SATAHC_INTERRUPT_CAUSE_REG_OFFSET, 0);
+	            MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+        	                        sataHcRegsOffset + MV_SATA_I_HC_BRIDGES_TEST_CONTROL_REG_OFFSET, 0);
+	            regTemp = MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress,
+                                         sataHcRegsOffset +
+                                         MV_SATA_I_HC_BRIDGES_PINS_CONFIG_REG_OFFSET);
+        	    /* Keep the SS during power on and the reference clock bits (reset sample )*/
+	            regTemp &= 0x1c1c1c1c;
+        	    regTemp |= 0x03030303;
+	            MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+        	                        sataHcRegsOffset + MV_SATA_I_HC_BRIDGES_PINS_CONFIG_REG_OFFSET,
+                	                regTemp);
+	    }
+	}
+    }
+
+    if ((pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II) && 
+	(pAdapter->hostInterface != MV_HOST_IF_INTEGRATED))
+    {
+        MV_U32 timeout;
+        /* Use global reset feature */
+        /* Empty PCI master */
+
+        MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                            MV_PCI_MAIN_COMMAND_STATUS_REG_OFFSET,
+                            MV_PCI_MAIN_COMMAND_STOP_MASTER_MASK);
+        MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress,
+                           MV_PCI_MAIN_COMMAND_STATUS_REG_OFFSET);
+        timeout = 1000;
+        while (timeout)
+        {
+        	if (MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress,
+                                    MV_PCI_MAIN_COMMAND_STATUS_REG_OFFSET) &
+                    				MV_PCI_MAIN_COMMAND_MASTER_EMPTY_MASK)
+            {
+                break;
+            }
+            
+            mvMicroSecondsDelay (pAdapter, 1);
+            timeout --;
+        }
+        if (timeout == 0)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d: Global reset timeout when"
+                     " trying to flush PCI master - discarding the master flush"
+                     , pAdapter->adapterId);
+        }
+        /* Issue global reset - this will reset both SATAHC */
+        regTemp = MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress,
+                                     MV_PCI_MAIN_COMMAND_STATUS_REG_OFFSET);
+        regTemp |= MV_PCI_MAIN_COMMAND_GLOBAL_RESET_MASK;
+        MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                            MV_PCI_MAIN_COMMAND_STATUS_REG_OFFSET, regTemp);
+        regTemp = MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress,
+                                     MV_PCI_MAIN_COMMAND_STATUS_REG_OFFSET);
+        if (!(regTemp & MV_PCI_MAIN_COMMAND_GLOBAL_RESET_MASK))
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d: Global reset error while "
+                     "writing '1' to the global reset bit",pAdapter->adapterId);
+        }
+        mvMicroSecondsDelay (pAdapter, 5);
+        regTemp &= ~(MV_PCI_MAIN_COMMAND_GLOBAL_RESET_MASK | MV_PCI_MAIN_COMMAND_STOP_MASTER_MASK);
+        MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                            MV_PCI_MAIN_COMMAND_STATUS_REG_OFFSET, regTemp);
+        regTemp = MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress,
+                                     MV_PCI_MAIN_COMMAND_STATUS_REG_OFFSET);
+        if (regTemp & MV_PCI_MAIN_COMMAND_GLOBAL_RESET_MASK)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d: Global reset error while "
+                     "writing '1' to the global reset bit",pAdapter->adapterId);
+        }
+        mvMicroSecondsDelay (pAdapter, 5);
+    }
+}
+
+static void revertFlashInterfaceRegs (MV_SATA_ADAPTER *pAdapter)
+{
+    MV_U32 regTemp;
+    MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                        MV_FLASH_PARAMS_REG_OFFSET, 0x0fcfffff);
+    if (pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II)
+    {
+        regTemp = MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress,
+                                     MV_FLASH_GPIO_PORT_CONTROL_OFFSET);
+        regTemp &= 0x3;
+        regTemp |= (MV_BIT5 | MV_BIT6);
+
+
+        MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                            MV_FLASH_GPIO_PORT_CONTROL_OFFSET, regTemp);
+    }
+}
+
+static void revertPCIInterfaceRegs (MV_SATA_ADAPTER *pAdapter)
+{
+    MV_U32 regTemp;
+    if ((pAdapter->sataAdapterGeneration == MV_SATA_GEN_I))
+    {
+        if (!((pAdapter->pciConfigDeviceId == MV_SATA_DEVICE_ID_5080) &&
+              (pAdapter->pciConfigRevisionId == 0x0)))
+        {
+            regTemp = MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress,
+                                         MV_PCI_EXPANSION_ROM_CONTROL_REG_OFFSET);
+            regTemp |= MV_BIT0;
+
+            MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                                MV_PCI_EXPANSION_ROM_CONTROL_REG_OFFSET, regTemp);
+        }
+    }
+
+    regTemp = MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress,
+                                 MV_PCI_MODE_REG_OFFSET);
+    regTemp &= 0xff00ffff;
+    MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                        MV_PCI_MODE_REG_OFFSET, regTemp);
+    MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                        MV_PCI_DISCARD_TIMER_REG_OFFSET, 0);
+    MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                        MV_PCI_MSI_TRIGGER_REG_OFFSET, 0);
+    MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                        MV_PCI_XBAR_IF_TIMEOUT_REG_OFFSET, 0x000100ff);
+    MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                        pAdapter->mainMaskOffset, 0);
+    MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                        MV_PCI_SERR_MASK_REG_OFFSET, 0);
+    MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                        MV_PCI_INTERRUPT_CAUSE_REG_OFFSET, 0);
+    MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                        MV_PCI_INTERRUPT_MASK_REG_OFFSET, 0);
+    MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                        MV_PCI_ERROR_LOW_ADDRESS_REG_OFFSET, 0);
+    MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                        MV_PCI_ERROR_HIGH_ADDRESS_REG_OFFSET, 0);
+    MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                        MV_PCI_ERROR_ATTRIBUTE_REG_OFFSET, 0);
+    MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                        MV_PCI_ERROR_COMMAND_REG_OFFSET, 0);
+}
+
+static void revertPEXInterfaceRegs (MV_SATA_ADAPTER *pAdapter)
+{
+    MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                        pAdapter->mainMaskOffset, 0);
+    MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                        MV_PCI_E_INTERRUPT_CAUSE_REG_OFFSET, 0);
+    MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                        MV_PCI_E_INTERRUPT_MASK_REG_OFFSET, 0);
+}
+static void commandsQueueAddTail(MV_SATA_CHANNEL *pSataChannel,
+                                 MV_QUEUED_COMMAND_ENTRY *pCommandEntry)
+{
+    pCommandEntry->next = NULL;
+    pCommandEntry->prev = pSataChannel->commandsQueueTail;
+    if (pSataChannel->commandsQueueTail != NULL)
+    {
+        pSataChannel->commandsQueueTail->next = pCommandEntry;
+    }
+    pSataChannel->commandsQueueTail = pCommandEntry;
+
+    if (pSataChannel->commandsQueueHead == NULL)
+    {
+        pSataChannel->commandsQueueHead = pCommandEntry;
+    }
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " %d %d: command queued. Head:%p Tail:%p "
+             "command :%p\n", pSataChannel->mvSataAdapter->adapterId,
+             pSataChannel->channelNumber, pSataChannel->commandsQueueHead,
+             pSataChannel->commandsQueueTail, pCommandEntry);
+}
+
+static void commandsQueueAddHead(MV_SATA_CHANNEL *pSataChannel,
+                                 MV_QUEUED_COMMAND_ENTRY *pCommandEntry)
+{
+    pCommandEntry->next = pSataChannel->commandsQueueHead;
+    pCommandEntry->prev = NULL;
+    if (pSataChannel->commandsQueueHead != NULL)
+    {
+        pSataChannel->commandsQueueHead->prev = pCommandEntry;
+    }
+    pSataChannel->commandsQueueHead = pCommandEntry;
+
+    if (pSataChannel->commandsQueueTail == NULL)
+    {
+        pSataChannel->commandsQueueTail = pCommandEntry;
+    }
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " %d %d: command queued. Head:%p Tail:%p "
+             "command :%p\n", pSataChannel->mvSataAdapter->adapterId,
+             pSataChannel->channelNumber, pSataChannel->commandsQueueHead,
+             pSataChannel->commandsQueueTail, pCommandEntry);
+}
+
+static void commandsQueueRemove(MV_SATA_CHANNEL *pSataChannel,
+                                MV_QUEUED_COMMAND_ENTRY *pCommandEntry)
+{
+    if (pCommandEntry->next == NULL)    /* last */
+    {
+        pSataChannel->commandsQueueTail = pCommandEntry->prev;
+        if (pSataChannel->commandsQueueTail != NULL)
+        {
+            pSataChannel->commandsQueueTail->next = NULL;
+        }
+    }
+    else
+    {
+        pCommandEntry->next->prev = pCommandEntry->prev;
+    }
+
+    if (pCommandEntry->prev == NULL) /* head*/
+    {
+        pSataChannel->commandsQueueHead = pCommandEntry->next;
+        if (pSataChannel->commandsQueueHead != NULL)
+        {
+            pSataChannel->commandsQueueHead->prev = NULL;
+        }
+    }
+    else
+    {
+        pCommandEntry->prev->next = pCommandEntry->next;
+    }
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " %d %d: command removed. Head:%p Tail:%p "
+             "command :%p\n", pSataChannel->mvSataAdapter->adapterId,
+             pSataChannel->channelNumber, pSataChannel->commandsQueueHead,
+             pSataChannel->commandsQueueTail, pCommandEntry);
+    pCommandEntry->next = NULL;
+    pCommandEntry->prev = NULL;
+}
+static void addCommand(MV_SATA_CHANNEL *pSataChannel,
+                       MV_QUEUED_COMMAND_ENTRY *pCommandEntry,
+                       MV_QUEUE_COMMAND_INFO *pCommandInfo)
+{
+#ifndef MV_SATA_STORE_COMMANDS_INFO_ON_IAL_STACK
+    pCommandEntry->pCommandInfo = &pCommandEntry->commandInfo;
+    switch (pCommandInfo->type)
+    {
+        case MV_QUEUED_COMMAND_TYPE_UDMA:
+                memcpy(&pCommandEntry->pCommandInfo->commandParams.udmaCommand,
+                        &pCommandInfo->commandParams.udmaCommand,
+                        sizeof(MV_UDMA_COMMAND_PARAMS));
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " %d %d: queue Udma command.\n",
+                        pSataChannel->mvSataAdapter->adapterId,
+                        pSataChannel->channelNumber);
+                break;
+        case MV_QUEUED_COMMAND_TYPE_NONE_UDMA:
+                memcpy(&pCommandEntry->pCommandInfo->commandParams.NoneUdmaCommand,
+               &pCommandInfo->commandParams.NoneUdmaCommand,
+               sizeof(MV_NONE_UDMA_COMMAND_PARAMS));
+                pSataChannel->noneUdmaOutstandingCommands++;
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " %d %d: queue Non Udma command.[%d]\n",
+                        pSataChannel->mvSataAdapter->adapterId,
+                        pSataChannel->channelNumber,
+                        pSataChannel->noneUdmaOutstandingCommands);
+                break;
+#ifdef MV_SUPPORT_ATAPI
+        case MV_QUEUED_COMMAND_TYPE_PACKET:
+                memcpy(&pCommandEntry->pCommandInfo->commandParams.packetCommand,
+                       &pCommandInfo->commandParams.packetCommand,
+                       sizeof(MV_PACKET_COMMAND_PARAMS));
+                pSataChannel->packetOutstandingCommands++;
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " %d %d: queue Packet command.[%d]\n",
+                        pSataChannel->mvSataAdapter->adapterId,
+                        pSataChannel->channelNumber,
+                        pSataChannel->packetOutstandingCommands);
+                break;
+#endif
+        default:
+            break; 
+    }
+    pCommandEntry->pCommandInfo->type = pCommandInfo->type;
+    pCommandEntry->pCommandInfo->PMPort = pCommandInfo->PMPort;
+#else
+    if (pCommandInfo->type == MV_QUEUED_COMMAND_TYPE_NONE_UDMA)
+    {
+        pSataChannel->noneUdmaOutstandingCommands++;
+    }
+    else if (pCommandInfo->type == MV_QUEUED_COMMAND_TYPE_PACKET)
+    {
+        pSataChannel->packetOutstandingCommands++;
+    }
+ 
+    pCommandEntry->pCommandInfo = pCommandInfo;
+#endif
+    commandsQueueAddTail(pSataChannel, pCommandEntry);
+    /* pCommandEntry->commandTag = ?*/
+    pCommandEntry->isFreeEntry = MV_FALSE;
+    pSataChannel->outstandingCommands++;
+    pSataChannel->portQueuedCommands[pCommandInfo->PMPort]++;
+}
+
+static void removeCommand(MV_SATA_CHANNEL *pSataChannel,
+                          MV_QUEUED_COMMAND_ENTRY *pCommandEntry)
+{
+    if (pCommandEntry->pCommandInfo->type == MV_QUEUED_COMMAND_TYPE_UDMA)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " %d %d: remove Udma command.\n",
+                 pSataChannel->mvSataAdapter->adapterId,
+                 pSataChannel->channelNumber);
+    }
+    else if (pCommandEntry->pCommandInfo->type == MV_QUEUED_COMMAND_TYPE_NONE_UDMA)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " %d %d: remove Non Udma command.[%d]\n",
+                 pSataChannel->mvSataAdapter->adapterId,
+                 pSataChannel->channelNumber,
+                 pSataChannel->noneUdmaOutstandingCommands);
+
+        pSataChannel->noneUdmaOutstandingCommands--;
+    }
+#ifdef MV_SUPPORT_ATAPI
+    else
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " %d %d: remove Packet command.[%d]\n",
+                 pSataChannel->mvSataAdapter->adapterId,
+                 pSataChannel->channelNumber,
+                 pSataChannel->packetOutstandingCommands);
+
+        pSataChannel->packetOutstandingCommands--;
+    }
+#endif
+    commandsQueueRemove(pSataChannel,pCommandEntry);
+    releaseTag(pSataChannel, pCommandEntry->pCommandInfo->PMPort,
+               pCommandEntry->hostTag,pCommandEntry->deviceTag);
+    pCommandEntry->isFreeEntry = MV_TRUE;
+    pSataChannel->outstandingCommands--;
+    pSataChannel->portQueuedCommands[pCommandEntry->pCommandInfo->PMPort]--;
+}
+
+static MV_U32 SaDevInterrutpBit(MV_U8 channelIndex)
+{
+    MV_U32      maskBit = 0;
+
+    if (channelIndex >= MV_SATA_PORT_PER_UNIT)
+    {
+        maskBit = (1 << ((channelIndex << 1) + 2));
+    }
+    else
+    {
+        maskBit = (1 << ((channelIndex << 1) + 1));
+    }
+    return maskBit;
+}
+static void enableSaDevInterrupts(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex)
+{
+    MV_U32      maskBit = 0;
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " %d %d: enable SaDevInterrupts.\n",
+             pAdapter->adapterId, channelIndex);
+    maskBit = SaDevInterrutpBit(channelIndex);
+    mvOsSemTake(&pAdapter->interruptsMaskSem);
+
+    pAdapter->mainMask |= maskBit;
+
+    /*clear disk interrupt */
+    MV_REG_READ_BYTE(pAdapter->adapterIoBaseAddress,
+                     getEdmaRegOffset(channelIndex) +
+                     MV_ATA_DEVICE_STATUS_REG_OFFSET);
+    /* clear DevInterrupt*/
+    MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                       MV_SATAHC_REGS_BASE_OFFSET((channelIndex & MV_BIT2) >> 2) +
+                       MV_SATAHC_INTERRUPT_CAUSE_REG_OFFSET,
+                       ~(MV_BIT8 << (channelIndex & (MV_BIT0 | MV_BIT1))));
+
+    /* unmask*/
+    if (pAdapter->interruptsAreMasked == MV_FALSE)
+    {
+        MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                           pAdapter->mainMaskOffset,
+                           pAdapter->mainMask);
+
+        MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                          pAdapter->mainMaskOffset);
+
+    }
+    mvOsSemRelease(&pAdapter->interruptsMaskSem);
+}
+
+void disableSaDevInterrupts(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex)
+{
+    MV_U32      maskBit = 0;
+
+
+    maskBit = SaDevInterrutpBit(channelIndex);
+    mvOsSemTake(&pAdapter->interruptsMaskSem);
+    pAdapter->mainMask &= ~maskBit;
+    if (pAdapter->interruptsAreMasked == MV_FALSE)
+    {
+        MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                           pAdapter->mainMaskOffset,
+                           pAdapter->mainMask);
+
+        MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                          pAdapter->mainMaskOffset);
+
+    }
+    mvOsSemRelease(&pAdapter->interruptsMaskSem);
+}
+static void _checkATAStatus(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex)
+{
+    MV_SATA_CHANNEL  *pSataChannel = pAdapter->sataChannel[channelIndex];
+    MV_U8 ATAstatus = MV_REG_READ_BYTE(pAdapter->adapterIoBaseAddress,
+                                       pSataChannel->eDmaRegsOffset +
+                                       MV_ATA_DEVICE_STATUS_REG_OFFSET);
+
+    if (pAdapter->sataAdapterGeneration == MV_SATA_GEN_I)
+    {
+        if ((ATAstatus & (MV_ATA_BUSY_STATUS|MV_ATA_DATA_REQUEST_STATUS|
+                          MV_ATA_READY_STATUS|MV_ATA_DEVICE_FAULT_STATUS|
+                          MV_ATA_ERROR_STATUS)) == MV_ATA_READY_STATUS)
+        {
+            return;
+        }
+    }
+    else
+    {
+        if ((ATAstatus & (MV_ATA_BUSY_STATUS|MV_ATA_DATA_REQUEST_STATUS|
+                          MV_ATA_READY_STATUS)) == MV_ATA_READY_STATUS)
+        {
+            return;
+        }
+    }
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: _checkATAStatus "
+             "EDMA can't be enabled with ATA status (0x%02x), do SW reset\n",
+             pAdapter->adapterId, channelIndex, ATAstatus);
+    if (pSataChannel->PMSupported == MV_TRUE)
+    {
+        _setActivePMPort(pSataChannel, MV_SATA_PM_CONTROL_PORT);
+    }
+    _doSoftReset(pSataChannel);
+}
+static void activateEdma(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex)
+{
+    MV_SATA_CHANNEL  *pSataChannel;
+    MV_BUS_ADDR_T   ioBaseAddr;
+    MV_U32      eDmaRegsOffset;
+    MV_U8       sataUnit;
+    MV_U8       port;
+
+    ioBaseAddr = pAdapter->adapterIoBaseAddress;
+    pSataChannel = pAdapter->sataChannel[channelIndex];
+    eDmaRegsOffset = pSataChannel->eDmaRegsOffset;
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " %d %d: activateEdma\n", pAdapter->adapterId,
+             channelIndex);
+    pSataChannel->EdmaActive = MV_TRUE;
+    sataUnit = (channelIndex & MV_BIT2) >> 2;
+    port = channelIndex & (MV_BIT0 | MV_BIT1);
+    /* clear Device interrupt */
+    MV_REG_WRITE_DWORD(ioBaseAddr, MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                       MV_SATAHC_INTERRUPT_CAUSE_REG_OFFSET,
+                       ~((MV_BIT8 | MV_BIT0) << port));
+    if (pAdapter->sataAdapterGeneration == MV_SATA_GEN_I)
+    {
+        MV_REG_WRITE_DWORD(ioBaseAddr,
+                           pSataChannel->eDmaRegsOffset +
+                           MV_EDMA_INTERRUPT_ERROR_CAUSE_REG_OFFSET, 0);
+    }
+    else
+    {
+        MV_REG_WRITE_DWORD(ioBaseAddr,
+                           pSataChannel->eDmaRegsOffset +
+                           MV_EDMA_INTERRUPT_ERROR_CAUSE_REG_OFFSET, MV_BIT8);
+    }
+
+    if (pSataChannel->FBSEnabled == MV_TRUE)
+    {
+	 _setRegBits(ioBaseAddr, pSataChannel->eDmaRegsOffset + 
+		       MV_EDMA_CONFIG_REG_OFFSET, MV_BIT16);
+    }
+
+    /* disable sata device interrupts */
+    disableSaDevInterrupts(pAdapter, channelIndex);
+
+    MV_CPU_WRITE_BUFFER_FLUSH();
+
+    _checkATAStatus(pAdapter, channelIndex);
+
+    MV_REG_WRITE_DWORD(ioBaseAddr, eDmaRegsOffset + MV_EDMA_COMMAND_REG_OFFSET,
+                       MV_EDMA_COMMAND_ENABLE_MASK);
+}
+
+static void deactivateEdma(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex)
+{
+    MV_SATA_CHANNEL  *pSataChannel;
+    MV_BUS_ADDR_T   ioBaseAddr;
+    MV_U32      eDmaRegsOffset;
+    MV_U32      counter = 0;
+    ioBaseAddr = pAdapter->adapterIoBaseAddress;
+    pSataChannel = pAdapter->sataChannel[channelIndex];
+    eDmaRegsOffset = pSataChannel->eDmaRegsOffset;
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " %d %d: deactivateEdma\n", pAdapter->adapterId,
+             channelIndex);
+    pSataChannel->EdmaActive = MV_FALSE;
+
+    MV_CPU_WRITE_BUFFER_FLUSH();
+    MV_REG_WRITE_DWORD(ioBaseAddr, eDmaRegsOffset + MV_EDMA_COMMAND_REG_OFFSET,
+                       MV_EDMA_COMMAND_DISABLE_MASK);
+    while (counter < 1000)
+    {
+        if (MV_REG_READ_DWORD(ioBaseAddr, eDmaRegsOffset +
+                              MV_EDMA_COMMAND_REG_OFFSET) & MV_BIT0)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " %d %d: deactivateEdma: "
+                     "Edma still active. elapsed time %d us\n", pAdapter->adapterId,
+                     channelIndex, counter * 1000);
+            mvMicroSecondsDelay(pAdapter, 1000);
+        }
+        else
+        {
+            break;
+        }
+        counter++;
+    }
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " %d %d: deactivateEdma: "
+             "Edma status reg 0x%08x\n", pAdapter->adapterId,
+             channelIndex, MV_REG_READ_DWORD(ioBaseAddr,
+                                             eDmaRegsOffset +
+                                             MV_EDMA_STATUS_REG_OFFSET));
+    if (counter >= 1000)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR,
+                 " %d %d: deactivateEdma: Edma Failed (EDMA status = %x)\n",
+                 pAdapter->adapterId, channelIndex,
+                 MV_REG_READ_DWORD(ioBaseAddr,
+                                   eDmaRegsOffset + MV_EDMA_STATUS_REG_OFFSET));
+        pSataChannel->queueCommandsEnabled = MV_FALSE;
+        flushDmaQueue (pSataChannel, MV_FLUSH_TYPE_CALLBACK,
+                       MV_COMPLETION_TYPE_ABORT, 0);
+        resetEdmaChannel(pSataChannel);
+        mvOsSemRelease(&pSataChannel->semaphore);
+        pAdapter->mvSataEventNotify(pAdapter, MV_EVENT_TYPE_SATA_ERROR,
+                                    MV_SATA_UNRECOVERABLE_COMMUNICATION_ERROR,
+                                    channelIndex);
+        mvOsSemTake(&pSataChannel->semaphore);
+    }
+    if (pSataChannel->FBSEnabled == MV_TRUE)
+    {
+	 _clearRegBits(ioBaseAddr, pSataChannel->eDmaRegsOffset + 
+		       MV_EDMA_CONFIG_REG_OFFSET, MV_BIT16);
+    }
+    /*_dumpSataRegs(pAdapter, channelIndex);*/
+    enableSaDevInterrupts(pAdapter, channelIndex);
+}
+
+static void EdmaReqQueueInsert(MV_SATA_CHANNEL *pSataChannel,
+                               MV_QUEUED_COMMAND_ENTRY *pCommandEntry,
+                               MV_UDMA_COMMAND_PARAMS  *pUdmaParams)
+{
+    MV_BUS_ADDR_T   ioBaseAddr = pSataChannel->mvSataAdapter->adapterIoBaseAddress;
+
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG|MV_DEBUG_UDMA_COMMAND, " %d %d: Insert Edma "
+             "Request. PMPort %x host tag = 0x%x device tag = 0x%x\n",
+             pSataChannel->mvSataAdapter->adapterId,
+             pSataChannel->channelNumber, pCommandEntry->pCommandInfo->PMPort,
+             pCommandEntry->hostTag, pCommandEntry->deviceTag);
+
+    /* insert the last commmand into the Edma queue */
+    if (pSataChannel->mvSataAdapter->sataAdapterGeneration == MV_SATA_GEN_IIE)
+    {
+        writeGen2EEdmaRequestEntry (&pSataChannel->requestQueue[pSataChannel->reqInPtr],
+                                    pSataChannel, pCommandEntry, pUdmaParams);
+    }
+    else
+    {
+        writeEdmaRequestEntry (&pSataChannel->requestQueue[pSataChannel->reqInPtr],
+                               pSataChannel, pCommandEntry, pUdmaParams);
+    }
+    pSataChannel->reqInPtr++;
+    pSataChannel->reqInPtr &= pSataChannel->EDMAQueuePtrMask;
+    pSataChannel->EdmaQueuedCommands++;
+    pCommandEntry->isCommandInEdma = MV_TRUE;
+    pCommandEntry->commandAborted = MV_FALSE;
+
+    MV_CPU_WRITE_BUFFER_FLUSH();
+    MV_REG_WRITE_DWORD(ioBaseAddr,
+                       pSataChannel->eDmaRegsOffset +
+                       MV_EDMA_REQUEST_Q_INP_REG_OFFSET,
+                       pSataChannel->requestQueuePciLowAddress |
+                       ((pSataChannel->reqInPtr << MV_EDMA_REQUEST_Q_INP_OFFSET)
+                        & pSataChannel->EDMARequestInpMask));
+}
+
+static MV_VOID _insertQCommandsIntoEdma(MV_SATA_CHANNEL *pSataChannel)
+{
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " %d %d: _insert"
+             "QCommandsIntoEdma\n", pSataChannel->mvSataAdapter->adapterId,
+             pSataChannel->channelNumber);
+
+    if (pSataChannel->commandsQueueHead == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG|MV_DEBUG_NON_UDMA_COMMAND,
+                 "%d %d: Commands queue is empty\n",
+                 pSataChannel->mvSataAdapter->adapterId,
+                 pSataChannel->channelNumber);
+        return;
+    }
+    if (pSataChannel->commandsQueueHead->pCommandInfo->type ==
+        MV_QUEUED_COMMAND_TYPE_NONE_UDMA)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG|MV_DEBUG_NON_UDMA_COMMAND,
+                 "%d %d: Next Command is PIO\n",
+                 pSataChannel->mvSataAdapter->adapterId,
+                 pSataChannel->channelNumber);
+        if (pSataChannel->PMSupported == MV_TRUE)
+        {
+            _setActivePMPort(pSataChannel,
+                             pSataChannel->commandsQueueHead->pCommandInfo->PMPort);
+        }
+        if (sendNoneUdmaCommand(pSataChannel,
+                                pSataChannel->commandsQueueHead) == MV_FALSE)
+        {
+            completePIOCommand(pSataChannel, pSataChannel->commandsQueueHead,
+                               MV_TRUE);
+        }
+
+    }
+#ifdef MV_SUPPORT_ATAPI
+
+    else if (pSataChannel->commandsQueueHead->pCommandInfo->type ==
+        MV_QUEUED_COMMAND_TYPE_PACKET)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG|MV_DEBUG_NON_UDMA_COMMAND,
+                 "%d %d: Next Command is Packet\n",
+                 pSataChannel->mvSataAdapter->adapterId,
+                 pSataChannel->channelNumber);
+        if (pSataChannel->PMSupported == MV_TRUE)
+        {
+            _setActivePMPort(pSataChannel,
+                             pSataChannel->commandsQueueHead->pCommandInfo->PMPort);
+        }
+        if (sendNoneUdmaCommand(pSataChannel,
+                                pSataChannel->commandsQueueHead) == MV_FALSE)
+        {
+            completePacketCommand(pSataChannel, pSataChannel->commandsQueueHead,
+                               MV_TRUE);
+        }
+
+    }
+#endif /* MV_SUPPORT_ATAPI */
+     else
+    {
+        MV_QUEUED_COMMAND_ENTRY *pEntry;
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG|MV_DEBUG_NON_UDMA_COMMAND,
+                 "%d %d: Next Command is UDMA\n",
+                 pSataChannel->mvSataAdapter->adapterId,
+                 pSataChannel->channelNumber);
+        activateEdma(pSataChannel->mvSataAdapter,pSataChannel->channelNumber);
+        pEntry = pSataChannel->commandsQueueHead;
+        while ((pEntry != NULL) &&
+               (pEntry->pCommandInfo->type == MV_QUEUED_COMMAND_TYPE_UDMA))
+        {
+            EdmaReqQueueInsert(pSataChannel, pEntry,
+                               &pEntry->pCommandInfo->commandParams.udmaCommand);
+            pEntry = pEntry->next;
+        }
+
+    }
+
+}
+/* do device error recovery for PIO, DMA and QUEUED DMA commands (not NCQ)*/
+static MV_BOOLEAN _doDevErrorRecovery(MV_SATA_CHANNEL *pSataChannel)
+{
+    if ((pSataChannel->mvSataAdapter->sataAdapterGeneration == MV_SATA_GEN_I) ||
+        (pSataChannel->queuedDMA == MV_EDMA_MODE_QUEUED))
+    {
+        if (_doSoftReset(pSataChannel) == MV_FALSE)
+        {
+            return MV_FALSE;
+        }
+    }
+    pSataChannel->queueCommandsEnabled = MV_TRUE;
+    /* Enable the storage device interrupts */
+    enableSaDevInterrupts(pSataChannel->mvSataAdapter,
+                          pSataChannel->channelNumber);
+    _resetEdmaQPointers(pSataChannel);
+    _insertQCommandsIntoEdma(pSataChannel);
+    return MV_TRUE;
+}
+/* this function used for NCQ error handling or FBS mode, it cheks if further commands
+    expected to be completed successfully (from drives without errors in PM)*/
+static MV_BOOLEAN isGoodCompletionsExpected(MV_SATA_CHANNEL *pSataChannel)
+{
+    MV_QUEUED_COMMAND_ENTRY *pEntry;
+
+    pEntry = pSataChannel->commandsQueueHead;
+    while (pEntry != NULL)
+    {
+        if (pEntry->isCommandInEdma == MV_TRUE)
+        {
+            if (pEntry->commandAborted == MV_FALSE)
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                         " %d %d: isGoodCompletionsExpected: command (host tag 0x%02x)"
+                         "(device tag 0x%02x) expected with good completion from port 0x%02x. "
+                         "PortsWithErros= 0x%04x \n",
+                         pSataChannel->mvSataAdapter->adapterId,
+                         pSataChannel->channelNumber, pEntry->hostTag,
+                         pEntry->deviceTag,
+                         pEntry->pCommandInfo->PMPort,
+                         pSataChannel->ErrorHandlingInfo.PortsWithErrors);
+                return MV_TRUE;
+            }
+        }
+        else
+        {
+            /* stop once reached a command that has not been inserted into the
+                EDMA since the next commands also must be outside the EDMA
+            */
+            break;
+        }
+        pEntry = pEntry->next;
+    }
+
+    if (pSataChannel->mvSataAdapter->sataAdapterGeneration == MV_SATA_GEN_IIE)
+    {
+        if (pSataChannel->queuedDMA == MV_EDMA_MODE_NATIVE_QUEUING)
+        {
+            MV_U32  EDMAStatus = MV_REG_READ_DWORD(
+                                                  pSataChannel->mvSataAdapter->adapterIoBaseAddress,
+                                                  pSataChannel->eDmaRegsOffset +
+                                                  MV_EDMA_STATUS_REG_OFFSET);
+
+            /*wait for internal commands cache to be empty */
+            if ((EDMAStatus & MV_EDMA_STATUS_ECACHE_EMPTY_BIT) == 0)
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                         " %d %d: isGoodCompletionsExpected: eCache not empty,"
+                         " wait for completions with errors\n",
+                         pSataChannel->mvSataAdapter->adapterId,
+                         pSataChannel->channelNumber);
+                return MV_TRUE;
+            }
+            if ((EDMAStatus & MV_EDMA_STATUS_EDMA_IDLE_BIT) == 0)
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                         " %d %d: isGoodCompletionsExpected: EDMA is not Idle\n",
+                         pSataChannel->mvSataAdapter->adapterId,
+                         pSataChannel->channelNumber);
+                return MV_TRUE;
+            }
+        }
+    }
+    /* check for responses*/
+    if (pSataChannel->queuedDMA == MV_EDMA_MODE_NATIVE_QUEUING)
+    {
+        MV_U32  rspInReg = MV_REG_READ_DWORD(
+                                            pSataChannel->mvSataAdapter->adapterIoBaseAddress,
+                                            pSataChannel->eDmaRegsOffset +
+                                            MV_EDMA_RESPONSE_Q_INP_REG_OFFSET);
+        MV_U32  rspInPtr = 0;
+        if (pSataChannel->use128Entries == MV_TRUE)
+        {
+            rspInPtr = getRegField(rspInReg, 3, 7);
+        }
+        else
+        {
+            rspInPtr = getRegField(rspInReg, 3, 5);
+        }
+
+
+        if (pSataChannel->rspOutPtr != rspInPtr)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                     " %d %d: isGoodCompletionsExpected: More responses need to be "
+                     "handled, Response In Ptr 0x%x, SW Response Out Ptr 0x%x\n",
+                     pSataChannel->mvSataAdapter->adapterId,
+                     pSataChannel->channelNumber,
+                     rspInPtr, pSataChannel->rspOutPtr);
+            return MV_TRUE;
+        }
+    }
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+             " %d %d: isGoodCompletionsExpected: No commands expected to be "
+             "completed. PortrNumDevError 0x%04x\n",
+             pSataChannel->mvSataAdapter->adapterId,
+             pSataChannel->channelNumber,
+             pSataChannel->ErrorHandlingInfo.PortsWithErrors);
+    return MV_FALSE;
+}
+/* this function used for NCQ error handling, this function called wheb DevErr
+    interrupt receivedm it checks which PM ports repored device error and updates
+    PortsWithErrors varibles
+*/
+
+static MV_VOID updatePortsWithErrors(MV_SATA_CHANNEL *pSataChannel)
+{
+    MV_U32  testCtrlReg = MV_REG_READ_DWORD(pSataChannel->mvSataAdapter->adapterIoBaseAddress,
+                                            pSataChannel->eDmaRegsOffset +
+                                            MV_SATA_II_IF_TEST_CTRL_REG_OFFSET);
+    testCtrlReg &= 0xFFFF0000;
+    testCtrlReg = testCtrlReg >> 16;
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+             " %d %d: updatePortsWithErrors: old val 0x%04x, new 0x%04x\n",
+             pSataChannel->mvSataAdapter->adapterId,
+             pSataChannel->channelNumber,
+             pSataChannel->ErrorHandlingInfo.PortsWithErrors,
+             pSataChannel->ErrorHandlingInfo.PortsWithErrors | testCtrlReg);
+
+    pSataChannel->ErrorHandlingInfo.PortsWithErrors |= (MV_U16)testCtrlReg;
+}
+/* this function called when Device Error occures in NCQ mode or FBS mode*/
+/* is detects which outstanding commands (command in the EDMA) are aborted by*/
+/* the drive due to the error, also it resumes the transport layer*/
+static MV_VOID setAbortedCommands(MV_SATA_CHANNEL *pSataChannel)
+{
+    MV_QUEUED_COMMAND_ENTRY *pEntry;
+    MV_U32  TCQOutStandingStatus[4] = {0,0,0,0};
+    MV_U8   TCQPortWithError = 0;
+    /*sanity checks*/
+    if ((pSataChannel == NULL) || (pSataChannel->EdmaActive == MV_FALSE))
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID,MV_DEBUG_FATAL_ERROR,
+                 "setAbortedCommands called in wrong context\n");
+        return;
+    }
+    if (pSataChannel->FBSEnabled == MV_TRUE)
+    {
+        MV_U32  TCQStatus = MV_REG_READ_DWORD(pSataChannel->mvSataAdapter->adapterIoBaseAddress,
+                                              pSataChannel->eDmaRegsOffset +
+                                              MV_EDMA_TCQ_STATUS_REG_OFFSET);
+
+        TCQOutStandingStatus[0] = MV_REG_READ_DWORD(
+                                                   pSataChannel->mvSataAdapter->adapterIoBaseAddress,
+                                                   pSataChannel->eDmaRegsOffset +
+                                                   MV_EDMA_NCQTCQ0_OUTSTANDING_REG_OFFSET);
+        TCQOutStandingStatus[1] = MV_REG_READ_DWORD(
+                                                   pSataChannel->mvSataAdapter->adapterIoBaseAddress,
+                                                   pSataChannel->eDmaRegsOffset +
+                                                   MV_EDMA_NCQTCQ1_OUTSTANDING_REG_OFFSET);
+        TCQOutStandingStatus[2] = MV_REG_READ_DWORD(
+                                                   pSataChannel->mvSataAdapter->adapterIoBaseAddress,
+                                                   pSataChannel->eDmaRegsOffset +
+                                                   MV_EDMA_NCQTCQ2_OUTSTANDING_REG_OFFSET);
+        TCQOutStandingStatus[3] = MV_REG_READ_DWORD(
+                                                   pSataChannel->mvSataAdapter->adapterIoBaseAddress,
+                                                   pSataChannel->eDmaRegsOffset +
+                                                   MV_EDMA_NCQTCQ3_OUTSTANDING_REG_OFFSET);
+
+        {
+            MV_U32  regVal = MV_REG_READ_DWORD(
+                                              pSataChannel->mvSataAdapter->adapterIoBaseAddress,
+                                              pSataChannel->eDmaRegsOffset +
+                                              MV_SATA_II_IF_STATUS_REG_OFFSET);
+
+            TCQPortWithError = (MV_U8)getRegField(regVal, 8, 4);
+        }
+
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                 " %d %d: setAbortedCommands: \n"
+                 "TCQPortWithError = 0x%04x \n"
+                 "TCQStatus = 0x%04x \n"
+                 "TCQ0OutStandingStatus = 0x%04x \n"
+                 "TCQ1OutStandingStatus = 0x%04x \n"
+                 "TCQ2OutStandingStatus = 0x%04x \n"
+                 "TCQ3OutStandingStatus = 0x%04x \n",
+                 pSataChannel->mvSataAdapter->adapterId,
+                 pSataChannel->channelNumber,
+                 TCQPortWithError,
+                 TCQStatus,
+                 TCQOutStandingStatus[0],
+                 TCQOutStandingStatus[1],
+                 TCQOutStandingStatus[2],
+                 TCQOutStandingStatus[3]);
+        /* clear DRQ bit */
+        if (TCQStatus & (MV_BIT0 << TCQPortWithError))
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                     " %d %d: setAbortedCommands Clear TCQ DRQ\n",
+                     pSataChannel->mvSataAdapter->adapterId,
+                     pSataChannel->channelNumber);
+            TCQStatus &= ~(MV_BIT0 << TCQPortWithError);
+            MV_REG_WRITE_DWORD(pSataChannel->mvSataAdapter->adapterIoBaseAddress,
+                               pSataChannel->eDmaRegsOffset +
+                               MV_EDMA_TCQ_STATUS_REG_OFFSET, TCQStatus);
+        }
+        /* clear SERVICE bit */
+        if (TCQStatus & (MV_BIT16 << TCQPortWithError))
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                     " %d %d: setAbortedCommands Clear TCQ Service\n",
+                     pSataChannel->mvSataAdapter->adapterId,
+                     pSataChannel->channelNumber);
+            TCQStatus &= ~(MV_BIT16 << TCQPortWithError);
+            MV_REG_WRITE_DWORD(pSataChannel->mvSataAdapter->adapterIoBaseAddress,
+                               pSataChannel->eDmaRegsOffset +
+                               MV_EDMA_TCQ_STATUS_REG_OFFSET, TCQStatus);
+        }
+        /* clear Device errors in EDMA error cause register */
+        MV_REG_WRITE_DWORD(pSataChannel->mvSataAdapter->adapterIoBaseAddress,
+                           pSataChannel->eDmaRegsOffset +
+                           MV_EDMA_INTERRUPT_ERROR_CAUSE_REG_OFFSET,~MV_BIT2);
+
+        /*clear interrupt cause to resume the transport layer operation*/
+        MV_REG_WRITE_DWORD(pSataChannel->mvSataAdapter->adapterIoBaseAddress,
+                           pSataChannel->eDmaRegsOffset +
+                           MV_EDMA_FIS_INTERRUPT_CAUSE_REG_OFFSET,
+                           ~MV_BIT8);
+    }
+    pEntry = pSataChannel->commandsQueueHead;
+    while (pEntry != NULL)
+    {
+        if (pEntry->isCommandInEdma == MV_TRUE)
+        {
+            if (pSataChannel->queuedDMA == MV_EDMA_MODE_NATIVE_QUEUING)
+            {
+                if ((((MV_U16)(1 << pEntry->pCommandInfo->PMPort)) &
+                     pSataChannel->ErrorHandlingInfo.PortsWithErrors) != 0)
+                {
+                    pEntry->commandAborted = MV_TRUE;
+                }
+            }
+            else /*FBS*/
+            {
+                if (pSataChannel->queuedDMA == MV_EDMA_MODE_QUEUED)
+                {
+                    if (pEntry->pCommandInfo->PMPort == TCQPortWithError)
+                    {
+                        MV_U32  bitmap = (1 << ((MV_U32)pEntry->hostTag));
+                        MV_U8   reg = (pEntry->hostTag >> 5) & 0x3;
+                        if ((bitmap & TCQOutStandingStatus[reg]) != 0)
+                        {
+                            pEntry->commandAborted = MV_TRUE;
+                        }
+                    }
+                }
+            }
+            if (pEntry->commandAborted == MV_TRUE)
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                         " %d %d: command (host tag 0x%02x)"
+                         "(device tag 0x%02x) not expected, port 0x%02x. \n",
+                         pSataChannel->mvSataAdapter->adapterId,
+                         pSataChannel->channelNumber, pEntry->hostTag,
+                         pEntry->deviceTag,
+                         pEntry->pCommandInfo->PMPort);
+            }
+        }
+        else
+        {
+            /* stop once reached a command that has not been inserted into the
+                EDMA since the next commands also must be outside the EDMA
+            */
+            break;
+        }
+        pEntry = pEntry->next;
+    }
+}
+/* this function used for NCQ error handling, called when device error received
+   and no further good complitions expected. it stops the EDMA and starts the
+   process if sending ReadLogExt commands to the drives that reported device
+   errors
+*/
+static MV_VOID enterRequestSenseState(MV_SATA_CHANNEL *pSataChannel)
+{
+    MV_U8 ATAstatus;
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+             " %d %d: enterRequestSenseState: PortsWithErrors 0x%04x\n",
+             pSataChannel->mvSataAdapter->adapterId,
+             pSataChannel->channelNumber,
+             pSataChannel->ErrorHandlingInfo.PortsWithErrors);
+    /* Fix for 88SX60x1 FEr SATA#25 */
+    {
+        pSataChannel->ErrorHandlingInfo.useVendorUniqGen2WA  = MV_FALSE;
+        if (pSataChannel->mvSataAdapter->sataAdapterGeneration == MV_SATA_GEN_II)
+        {
+            MV_U32  EDMAStatus = MV_REG_READ_DWORD(pSataChannel->mvSataAdapter->adapterIoBaseAddress,
+                                                   pSataChannel->eDmaRegsOffset +
+                                                   MV_EDMA_STATUS_REG_OFFSET);
+
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                     " %d %d: EDMA state is %x\n",
+                     pSataChannel->mvSataAdapter->adapterId,
+                     pSataChannel->channelNumber, EDMAStatus);
+
+            if (getRegField(EDMAStatus, 8, 8) == 0x70)
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                         " %d %d: EDMA state is 0x70 do WA\n",
+                         pSataChannel->mvSataAdapter->adapterId,
+                         pSataChannel->channelNumber);
+                pSataChannel->ErrorHandlingInfo.useVendorUniqGen2WA = MV_TRUE;
+            }
+        }
+    }
+    deactivateEdma(pSataChannel->mvSataAdapter, pSataChannel->channelNumber);
+    if (pSataChannel->queuedDMA == MV_EDMA_MODE_NOT_QUEUED)
+    {
+        if (pSataChannel->FBSEnabled != MV_TRUE)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID,MV_DEBUG_FATAL_ERROR,
+                     "enterRequestSenseState called in wrong context\n");
+            return;
+        }
+
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                 " %d %d: enterRequestSenseState: Finished All erring ports\n",
+                 pSataChannel->mvSataAdapter->adapterId,
+                 pSataChannel->channelNumber);
+        pSataChannel->ErrorHandlingInfo.state = MV_ERROR_HANDLING_STATE_IDLE;
+        pSataChannel->ErrorHandlingInfo.PortsWithErrors = 0;
+        _resetEdmaQPointers(pSataChannel);
+        _insertQCommandsIntoEdma(pSataChannel);
+        return;
+    }
+
+    /* clear Device errors in EDMA error cause register due to the aborted
+     commands*/
+    MV_REG_WRITE_DWORD(pSataChannel->mvSataAdapter->adapterIoBaseAddress,
+                       pSataChannel->eDmaRegsOffset +
+                       MV_EDMA_INTERRUPT_ERROR_CAUSE_REG_OFFSET,~MV_BIT2);
+    /* the EDMA may be disabled after FPDMA commands issued and before */
+    /* receiving response from the drive (D2H Fis), in this case the ATA  */
+    /* busy bit will be set, so we wait for this bit to be cleared by the */
+    /* drive when is sends D2H registers Fis and SaDevInterrupt will be issued*/
+
+    /* clear SaDevInterrupt if already received*/
+    {
+        MV_U8       port = pSataChannel->channelNumber & (MV_BIT0 | MV_BIT1);
+        MV_U8       sataUnit = (pSataChannel->channelNumber & MV_BIT2) >> 2;
+
+        MV_REG_WRITE_DWORD(pSataChannel->mvSataAdapter->adapterIoBaseAddress,
+                           MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                           MV_SATAHC_INTERRUPT_CAUSE_REG_OFFSET, ~(MV_BIT8 << port));
+    }
+
+    ATAstatus = MV_REG_READ_BYTE(pSataChannel->mvSataAdapter->adapterIoBaseAddress,
+                                 pSataChannel->eDmaRegsOffset +
+                                 MV_ATA_DEVICE_STATUS_REG_OFFSET);
+
+    if (ATAstatus & MV_ATA_BUSY_STATUS)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: ATA Busy"
+                 "bit is set after disabling EDMA, wait for SaDevInterrupt\n",
+                 pSataChannel->mvSataAdapter->adapterId,
+                 pSataChannel->channelNumber);
+        pSataChannel->ErrorHandlingInfo.state = MV_ERROR_HANDLING_STATE_WAIT_FOR_BUSY;
+        return;
+    }
+    pSataChannel->ErrorHandlingInfo.state = MV_ERROR_HANDLING_STATE_REQUEST_SENSE;
+    pSataChannel->ErrorHandlingInfo.CurrPort = 0;
+    if (pSataChannel->queuedDMA == MV_EDMA_MODE_QUEUED)/*TCQ*/
+    {
+        softResetErringPorts(pSataChannel);
+    }
+    else
+    {
+        setReadLogExtCmndPointers(pSataChannel);
+        handlePortError(pSataChannel);
+    }
+}
+
+
+
+/* this function used for NCQ error handling, called from the ReadLogExt command
+    callback function, it makes sanity checks for the command output and
+    completes the erring command with the ATA registers values, finally it calls
+    handlePortError to handle NCQ errors from the next drive if any*/
+static MV_BOOLEAN parseReadLogExtOutPut(MV_SATA_CHANNEL *pSataChannel)
+{
+    MV_U32  count;
+    MV_U8   tag;
+    MV_STORAGE_DEVICE_REGISTERS registerStruct;
+    MV_QUEUED_COMMAND_ENTRY       *pCommandEntry;
+
+    MV_U8_PTR ReadLogExtBuffer = (MV_U8_PTR)pSataChannel->ErrorHandlingInfo.ReadLogExtBuffer;
+    /* chack CRC*/
+    {
+        MV_U8 crc = 0;
+        for (count = 0 ; count < ATA_SECTOR_SIZE ; count ++)
+        {
+            crc += ReadLogExtBuffer[count];
+        }
+        if (crc != 0)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d: parseReadLogExtOutPut "
+                     "ATA Command failed due to wrong CRC checksum (%02x)\n",
+                     pSataChannel->mvSataAdapter->adapterId,
+                     pSataChannel->channelNumber,crc);
+            return MV_FALSE;
+        }
+    }
+    /* Swap to little endianess */
+    for (count = 0 ; count < ATA_SECTOR_SIZE_IN_WORDS; count++)
+    {
+        /* CPU to little*/
+        pSataChannel->ErrorHandlingInfo.ReadLogExtBuffer[count] =
+        MV_LE16_TO_CPU(pSataChannel->ErrorHandlingInfo.ReadLogExtBuffer[count]);
+    }
+
+    for (count = 0; count < 3; count++)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " ReadLogExt: 0x%02x  0x%02x 0x%02x 0x%02x 0x%02x 0x%02x\n",
+                 ReadLogExtBuffer[(count * 6) + 0],
+                 ReadLogExtBuffer[(count * 6) + 1],
+                 ReadLogExtBuffer[(count * 6) + 2],
+                 ReadLogExtBuffer[(count * 6) + 3],
+                 ReadLogExtBuffer[(count * 6) + 4],
+                 ReadLogExtBuffer[(count * 6) + 5]);
+    }
+    /* check NQ bit*/
+    if (ReadLogExtBuffer[0] & MV_BIT7)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d: parseReadLogExtOutPut: "
+                 "Error - NQ is set\n",
+                 pSataChannel->mvSataAdapter->adapterId,
+                 pSataChannel->channelNumber);
+        return MV_FALSE;
+    }
+
+    if (_getHostTagByDeviceTag(pSataChannel,
+                               0x1F & ReadLogExtBuffer[0],
+                               pSataChannel->ErrorHandlingInfo.CurrPort,
+                               &tag) == MV_FALSE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d %d: "
+                 "parseReadLogExtOutPut: "
+                 "Error - None Valid device tag (0x%02x)\n",
+                 pSataChannel->mvSataAdapter->adapterId,
+                 pSataChannel->channelNumber,
+                 pSataChannel->ErrorHandlingInfo.CurrPort,
+                 0x1F & ReadLogExtBuffer[0]);
+        return MV_FALSE;
+    }
+    pCommandEntry = &pSataChannel->commandsQueue[tag];
+    if (pCommandEntry->isFreeEntry == MV_TRUE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d: parseReadLogExtOutPut: "
+                 "Error - No command with tag (0x%02x) has been issued\n",
+                 pSataChannel->mvSataAdapter->adapterId,
+                 pSataChannel->channelNumber, tag);
+        return MV_FALSE;
+    }
+    if (pCommandEntry->pCommandInfo->PMPort != pSataChannel->ErrorHandlingInfo.CurrPort)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d: parseReadLogExtOutPut: "
+                 "Error - command PM Port (0x%02x) and CurrPort (0x%02x) doesn't match\n",
+                 pSataChannel->mvSataAdapter->adapterId,
+                 pSataChannel->channelNumber, pCommandEntry->pCommandInfo->PMPort,
+                 pSataChannel->ErrorHandlingInfo.CurrPort);
+        return MV_FALSE;
+    }
+    if (pCommandEntry->pCommandInfo->type != MV_QUEUED_COMMAND_TYPE_UDMA)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d: parseReadLogExtOutPut: "
+                 "Error - command with tag (0x%02x) isn't UDMA command\n",
+                 pSataChannel->mvSataAdapter->adapterId,
+                 pSataChannel->channelNumber, tag);
+        return MV_FALSE;
+    }
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: parseReadLogExtOutPut: "
+             " command tag (0x%02x)\n",
+             pSataChannel->mvSataAdapter->adapterId,
+             pSataChannel->channelNumber, tag);
+    registerStruct.statusRegister = ReadLogExtBuffer[2];
+    registerStruct.deviceRegister = ReadLogExtBuffer[7];
+    registerStruct.errorRegister = ReadLogExtBuffer[3];
+    registerStruct.lbaLowRegister = (ReadLogExtBuffer[8] << 8) | ReadLogExtBuffer[4];
+    registerStruct.lbaMidRegister = (ReadLogExtBuffer[9] << 8) | ReadLogExtBuffer[5];
+    registerStruct.lbaHighRegister = (ReadLogExtBuffer[10] << 8) | ReadLogExtBuffer[6];
+    registerStruct.sectorCountRegister = (ReadLogExtBuffer[13] << 8) | ReadLogExtBuffer[12];
+
+    _printATARegs(&registerStruct);
+
+    pSataChannel->EdmaQueuedCommands--;
+    pCommandEntry->pCommandInfo->commandParams.udmaCommand.callBack(pSataChannel->mvSataAdapter,
+                                                                    pSataChannel->channelNumber,
+                                                                    MV_COMPLETION_TYPE_ERROR,
+                                                                    pCommandEntry->pCommandInfo->commandParams.udmaCommand.commandId,
+                                                                    0x04,
+                                                                    0, &registerStruct);
+    removeCommand(pSataChannel,pCommandEntry);
+    return MV_TRUE;
+}
+static MV_BOOLEAN _getHostTagByDeviceTag(MV_SATA_CHANNEL *pSataChannel,
+                                         MV_U8 deviceTag,
+                                         MV_U8 PMPort,
+                                         MV_U8 *pHostTag)
+{
+    MV_QUEUED_COMMAND_ENTRY *pEntry = pSataChannel->commandsQueueHead;
+    while (pEntry != NULL)
+    {
+        if (pEntry->isCommandInEdma == MV_TRUE)
+        {
+            if ((pEntry->deviceTag == deviceTag) &&
+                (pEntry->pCommandInfo->PMPort == PMPort))
+            {
+                *pHostTag = pEntry->hostTag;
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                         "%d %d %d: _getHostTagByDeviceTag, command entry found, "
+                         "host tag = 0x%02x,  deviceTag(0x%02x)\n",
+                         pSataChannel->mvSataAdapter->adapterId,
+                         pSataChannel->channelNumber,
+                         PMPort,
+                         *pHostTag,
+                         deviceTag);
+                return MV_TRUE;
+            }
+        }
+        else
+        {
+            /* stop once reached a command that has not been inserted into the
+                EDMA since the next commands also must be outside the EDMA
+            */
+            break;
+        }
+        pEntry = pEntry->next;
+    }
+    return MV_FALSE;
+}
+/* this function used for NCQ error handling, it's the callback function of the
+    ReadLogExt command with issued by adding command entry to the channel's
+    commands queue */
+static MV_BOOLEAN
+ReadLogExtCompletionCB(MV_SATA_ADAPTER *pSataAdapter,
+                       MV_U8 channelNum,
+                       MV_COMPLETION_TYPE comp_type,
+                       MV_VOID_PTR commandId,
+                       MV_U16 responseFlags,
+                       MV_U32 timeStamp,
+                       MV_STORAGE_DEVICE_REGISTERS *registerStruct)
+{
+    MV_SATA_CHANNEL *pSataChannel = pSataAdapter->sataChannel[channelNum];
+
+    switch (comp_type)
+    {
+    case MV_COMPLETION_TYPE_NORMAL:
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                 " %d %d: ReadLogExtCompletionCB: Normal completion. Port 0x%02x\n",
+                 pSataAdapter->adapterId, channelNum,
+                 pSataChannel->ErrorHandlingInfo.CurrPort);
+        if (parseReadLogExtOutPut(pSataChannel) == MV_TRUE)
+        {
+            /* Fix for 88SX60x1 FEr SATA#25 */
+            {
+                if (pSataChannel->ErrorHandlingInfo.useVendorUniqGen2WA == MV_TRUE)
+                {
+                    MV_U32  i;
+                    MV_U8   ATAstatus;
+                    _doSoftReset(pSataChannel);
+                    for (i = 0;i < 31000; i++)
+                    {
+                        ATAstatus = MV_REG_READ_BYTE(pSataAdapter->adapterIoBaseAddress,
+                                                     pSataChannel->eDmaRegsOffset +
+                                                     MV_ATA_DEVICE_STATUS_REG_OFFSET);
+                        if ((ATAstatus & MV_ATA_BUSY_STATUS) == 0)
+                        {
+                            break;
+                        }
+                        mvMicroSecondsDelay(pSataChannel->mvSataAdapter, 1000);
+                    }
+                }
+            }
+            pSataChannel->ErrorHandlingInfo.CurrPort++;
+            handlePortError(pSataChannel);
+        }
+        break;
+    default:
+        /* when ReadLogExt fails or parseReaDLogExtOutPut fails do nothing*/
+        /* the higher layers will not have the queued commands completed so it*/
+        /* should recover this situation by it's timeout error recovery*/
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                 " %d %d: ReadLogExtCompletionCB: Bad completion. Port 0x%02x\n",
+                 pSataAdapter->adapterId, channelNum,
+                 pSataChannel->ErrorHandlingInfo.CurrPort);
+        _printATARegs(registerStruct);
+        _dumpSataRegs(pSataAdapter, channelNum);
+        break;
+    }
+    return MV_TRUE;
+}
+/* this function used for NCQ error handling, it "allocates" command entry of the
+    ReadLogExt command and data buffer used for that command from the EDMA
+    requests queue which is not used meanwhile since the EDMA disabled*/
+static MV_VOID setReadLogExtCmndPointers(MV_SATA_CHANNEL *pSataChannel)
+{
+    struct ReadLogExtBuffers
+    {
+        MV_QUEUED_COMMAND_ENTRY entry;
+#ifdef  MV_SATA_STORE_COMMANDS_INFO_ON_IAL_STACK
+        MV_QUEUE_COMMAND_INFO   commandInfo;
+#endif
+        MV_U16                  pioBuffer[ATA_SECTOR_SIZE_IN_WORDS];
+    };
+    /* EDMA is not active, so we use the request queue buffer for Read Log Ext
+        command data */
+    struct ReadLogExtBuffers *pReadLogExtBuffers =
+    (struct ReadLogExtBuffers *)pSataChannel->requestQueue;
+    pSataChannel->ErrorHandlingInfo.pReadLogExtEntry = &pReadLogExtBuffers->entry;
+    pSataChannel->ErrorHandlingInfo.ReadLogExtBuffer = pReadLogExtBuffers->pioBuffer;
+
+#ifdef  MV_SATA_STORE_COMMANDS_INFO_ON_IAL_STACK
+    pSataChannel->ErrorHandlingInfo.pReadLogExtEntry->pCommandInfo = 
+    &pReadLogExtBuffers->commandInfo;
+#else
+    pSataChannel->ErrorHandlingInfo.pReadLogExtEntry->pCommandInfo = 
+    &pReadLogExtBuffers->entry.commandInfo;
+#endif
+}
+/* this function used for NCQ error handling, it sets the ReadLogExt command
+    entry, then issues the command to the CuttPort*/
+static MV_VOID insertReadLogExtCmnd(MV_SATA_CHANNEL *pSataChannel)
+{
+    MV_QUEUED_COMMAND_ENTRY *pEntry = pSataChannel->ErrorHandlingInfo.pReadLogExtEntry;
+    MV_NONE_UDMA_COMMAND_PARAMS *pReadLogExtPIOParams  =
+    &pEntry->pCommandInfo->commandParams.NoneUdmaCommand;
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+             " %d %d: insertReadLogExtCmnd: Port 0x%02x\n",
+             pSataChannel->mvSataAdapter->adapterId,
+             pSataChannel->channelNumber,
+             pSataChannel->ErrorHandlingInfo.CurrPort);
+
+    pReadLogExtPIOParams->bufPtr = pSataChannel->ErrorHandlingInfo.ReadLogExtBuffer;
+    pReadLogExtPIOParams->callBack = ReadLogExtCompletionCB;
+    pReadLogExtPIOParams->command = MV_ATA_COMMAND_READ_LOG_EXT;
+    pReadLogExtPIOParams->commandId = NULL;
+    pReadLogExtPIOParams->count = ATA_SECTOR_SIZE_IN_WORDS;
+    pReadLogExtPIOParams->device = 0;
+    pReadLogExtPIOParams->features = 0;
+    pReadLogExtPIOParams->isEXT = MV_TRUE;
+    pReadLogExtPIOParams->lbaHigh = 0;
+    pReadLogExtPIOParams->lbaLow = 0x10;
+    pReadLogExtPIOParams->lbaMid = 0;
+    pReadLogExtPIOParams->protocolType = MV_NON_UDMA_PROTOCOL_PIO_DATA_IN;
+    pReadLogExtPIOParams->sectorCount = 1;
+    pEntry->pCommandInfo->type = MV_QUEUED_COMMAND_TYPE_NONE_UDMA;
+    pEntry->pCommandInfo->PMPort = pSataChannel->ErrorHandlingInfo.CurrPort;
+    pEntry->isCommandInEdma = MV_FALSE;
+    pEntry->commandAborted = MV_FALSE;
+    pEntry->isFreeEntry = MV_FALSE;
+    pEntry->hostTag = 0xFF;
+    pEntry->deviceTag = 0xFF;
+    commandsQueueAddHead(pSataChannel, pEntry);
+    if (pSataChannel->PMSupported == MV_TRUE)
+    {
+        _setActivePMPort(pSataChannel, pEntry->pCommandInfo->PMPort);
+
+    }
+    /* Fix for 88SX60x1 FEr SATA#25 */
+    if (pSataChannel->ErrorHandlingInfo.useVendorUniqGen2WA == MV_TRUE)
+    {
+        MV_U32  FISBuffer[5];
+        FISBuffer[0] =  ((MV_ATA_COMMAND_READ_LOG_EXT << 16)& 0xFF0000) |
+                        MV_BIT15 | 0x27;
+        FISBuffer[1] = 0x10;
+        FISBuffer[2] = 0;
+        FISBuffer[3] = 1;
+        FISBuffer[4] = 0;
+
+        sendVendorUniqueFIS(pSataChannel->mvSataAdapter,
+                            pSataChannel->channelNumber,
+                            FISBuffer, 5);
+
+        return;
+    }
+
+    if (sendNoneUdmaCommand(pSataChannel, pEntry) == MV_FALSE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d: Failed to "
+                 "Issue ReadLogExt PIO command\n",
+                 pSataChannel->mvSataAdapter->adapterId,
+                 pSataChannel->channelNumber);
+        completePIOCommand(pSataChannel, pSataChannel->commandsQueueHead,
+                           MV_TRUE);
+    }
+}
+/* this function used for NCQ error handling, it checks the comming port
+    that experienced NCQ device error starting from CurrPort, if no port found,
+    it sets the NCQ error handling state to the Idle state and re-queues the
+    outstanding commands*/
+static MV_VOID handlePortError(MV_SATA_CHANNEL *pSataChannel)
+{
+    while (pSataChannel->ErrorHandlingInfo.CurrPort <= MV_SATA_PM_MAX_PORTS)
+    {
+        if (((MV_U16)( 1 << pSataChannel->ErrorHandlingInfo.CurrPort)) & pSataChannel->ErrorHandlingInfo.PortsWithErrors)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                     " %d %d: handlePortError: Device Error found on Port "
+                     "0x%02x\n", pSataChannel->mvSataAdapter->adapterId,
+                     pSataChannel->channelNumber,
+                     pSataChannel->ErrorHandlingInfo.CurrPort);
+            break;
+        }
+        pSataChannel->ErrorHandlingInfo.CurrPort++;
+    }
+    if (pSataChannel->ErrorHandlingInfo.CurrPort > MV_SATA_PM_MAX_PORTS)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                 " %d %d: handlePortError: Finished All erring ports\n",
+                 pSataChannel->mvSataAdapter->adapterId,
+                 pSataChannel->channelNumber);
+        pSataChannel->ErrorHandlingInfo.state = MV_ERROR_HANDLING_STATE_IDLE;
+        pSataChannel->ErrorHandlingInfo.PortsWithErrors = 0;
+        _resetEdmaQPointers(pSataChannel);
+        _insertQCommandsIntoEdma(pSataChannel);
+        return;
+    }
+    insertReadLogExtCmnd(pSataChannel);
+}
+static MV_VOID softResetErringPorts(MV_SATA_CHANNEL *pSataChannel)
+{
+    while (pSataChannel->ErrorHandlingInfo.CurrPort <= MV_SATA_PM_MAX_PORTS)
+    {
+        if (((MV_U16)( 1 << pSataChannel->ErrorHandlingInfo.CurrPort)) & pSataChannel->ErrorHandlingInfo.PortsWithErrors)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                     " %d %d: softResetErringPorts: Device Error found on Port "
+                     "0x%02x\n", pSataChannel->mvSataAdapter->adapterId,
+                     pSataChannel->channelNumber,
+                     pSataChannel->ErrorHandlingInfo.CurrPort);
+            if (pSataChannel->PMSupported == MV_TRUE)
+            {
+                _setActivePMPort(pSataChannel, 
+                                 pSataChannel->ErrorHandlingInfo.CurrPort);
+
+            }
+            _doSoftReset(pSataChannel);
+        }
+        pSataChannel->ErrorHandlingInfo.CurrPort++;
+    }
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+             " %d %d: softResetErringPorts: Finished All erring ports\n",
+             pSataChannel->mvSataAdapter->adapterId,
+             pSataChannel->channelNumber);
+    pSataChannel->ErrorHandlingInfo.state = MV_ERROR_HANDLING_STATE_IDLE;
+    pSataChannel->ErrorHandlingInfo.PortsWithErrors = 0;
+    _resetEdmaQPointers(pSataChannel);
+    _insertQCommandsIntoEdma(pSataChannel);
+    return;
+}
+static MV_BOOLEAN sendNoneUdmaCommand(MV_SATA_CHANNEL *pSataChannel,
+                                      MV_QUEUED_COMMAND_ENTRY *pCommandEntry)
+{
+    MV_NONE_UDMA_COMMAND_PARAMS *pParams =
+    &pCommandEntry->pCommandInfo->commandParams.NoneUdmaCommand;
+    MV_BUS_ADDR_T   ioBaseAddr = pSataChannel->mvSataAdapter->adapterIoBaseAddress;
+    MV_U32          eDmaRegsOffset;
+    MV_U8           ATAstatus;
+    unsigned int             i;
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG|MV_DEBUG_NON_UDMA_COMMAND,
+             " %d %d Issue NON UDMA command: protocol(%d) buff %p , words %x ,"
+             " features %x , sector count %x , lba %x.%x.%x device %x "
+             "command=%x\n", pSataChannel->mvSataAdapter->adapterId,
+             pSataChannel->channelNumber, pParams->protocolType,
+             pParams->bufPtr, pParams->count,
+             pParams->features, pParams->sectorCount,
+             pParams->lbaLow, pParams->lbaMid,
+             pParams->lbaHigh, pParams->device,
+             pParams->command);
+
+    eDmaRegsOffset = pSataChannel->eDmaRegsOffset;
+
+    ATAstatus = MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset +
+                                 MV_ATA_DEVICE_STATUS_REG_OFFSET);
+    if ((ATAstatus & (MV_ATA_READY_STATUS | MV_ATA_BUSY_STATUS)) !=
+        MV_ATA_READY_STATUS)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d: storage drive is not"
+                 " ready, ATA STATUS=0x%02x\n",
+                 pSataChannel->mvSataAdapter->adapterId,
+                 pSataChannel->channelNumber, ATAstatus);
+        return MV_FALSE;
+    }
+
+    if(pCommandEntry->pCommandInfo->type == MV_QUEUED_COMMAND_TYPE_PACKET)
+    {
+        if(pParams->protocolType == MV_NON_UDMA_PROTOCOL_PACKET_DMA)
+        {
+            MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                      MV_ATA_DEVICE_FEATURES_REG_OFFSET, MV_BIT0);
+        }
+        else
+        {
+            MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                      MV_ATA_DEVICE_FEATURES_REG_OFFSET, 0);
+         }
+
+        MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                      MV_ATA_DEVICE_SECTOR_COUNT_REG_OFFSET, 0);
+
+        MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                      MV_ATA_DEVICE_LBA_LOW_REG_OFFSET, 0);
+
+	/* set byte count limit to 8KB (0x2000)*/
+        MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                      MV_ATA_DEVICE_LBA_MID_REG_OFFSET,  0x00);
+
+        MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                          MV_ATA_DEVICE_LBA_HIGH_REG_OFFSET, 0x20);
+
+       MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                      MV_ATA_DEVICE_HEAD_REG_OFFSET, 0);
+        MV_CPU_WRITE_BUFFER_FLUSH();
+
+        MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                      MV_ATA_DEVICE_COMMAND_REG_OFFSET,MV_ATA_COMMAND_PACKET );
+   
+    }
+    else
+    {
+        if (pParams->isEXT == MV_TRUE)
+        {
+        MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                          MV_ATA_DEVICE_FEATURES_REG_OFFSET,
+                          (pParams->features & 0xff00) >> 8);
+        MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                          MV_ATA_DEVICE_SECTOR_COUNT_REG_OFFSET,
+                          (pParams->sectorCount & 0xff00) >> 8);
+        MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                          MV_ATA_DEVICE_LBA_LOW_REG_OFFSET,
+                          (pParams->lbaLow & 0xff00) >> 8);
+        MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                          MV_ATA_DEVICE_LBA_MID_REG_OFFSET,
+                          (pParams->lbaMid & 0xff00) >> 8);
+        MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                          MV_ATA_DEVICE_LBA_HIGH_REG_OFFSET,
+                          (pParams->lbaHigh & 0xff00) >> 8);
+        }
+        else
+        {
+            if ((pParams->features & 0xff00) ||
+            (pParams->sectorCount & 0xff00) ||
+            (pParams->lbaLow & 0xff00) ||
+            (pParams->lbaMid & 0xff00) ||
+            (pParams->lbaHigh & 0xff00))
+            {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR | MV_DEBUG_NON_UDMA_COMMAND,
+                     " %d %d :in Issue NON UDMA command:"
+                     " bits[15:8] of register values should be reserved"
+                     " Features 0x%02x, SectorCount 0x%02x, LBA Low 0x%02x,"
+                     " LBA Mid 0x%02x, LBA High 0x%02x\n",
+                     pSataChannel->mvSataAdapter->adapterId,
+                     pSataChannel->channelNumber, pParams->features,
+                     pParams->sectorCount, pParams->lbaLow,
+                     pParams->lbaMid, pParams->lbaHigh);
+            return MV_FALSE;
+            }
+        }
+    
+    MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                      MV_ATA_DEVICE_FEATURES_REG_OFFSET, pParams->features & 0xff);
+    MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                      MV_ATA_DEVICE_SECTOR_COUNT_REG_OFFSET, pParams->sectorCount & 0xff);
+    MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                      MV_ATA_DEVICE_LBA_LOW_REG_OFFSET, pParams->lbaLow & 0xff);
+    MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                      MV_ATA_DEVICE_LBA_MID_REG_OFFSET, pParams->lbaMid & 0xff);
+    MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                      MV_ATA_DEVICE_LBA_HIGH_REG_OFFSET,    pParams->lbaHigh    &    0xff);
+    MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                      MV_ATA_DEVICE_HEAD_REG_OFFSET, pParams->device);
+
+    MV_CPU_WRITE_BUFFER_FLUSH();
+
+    MV_REG_WRITE_BYTE(ioBaseAddr, eDmaRegsOffset +
+                      MV_ATA_DEVICE_COMMAND_REG_OFFSET, pParams->command);
+    }
+    if ((pParams->protocolType == MV_NON_UDMA_PROTOCOL_PIO_DATA_OUT) ||
+        (pCommandEntry->pCommandInfo->type == MV_QUEUED_COMMAND_TYPE_PACKET))
+    {
+        MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset +
+                         MV_ATA_DEVICE_ALTERNATE_REG_OFFSET);
+
+        /* Wait for the command to complete */
+        if (waitWhileStorageDevIsBusy(pSataChannel->mvSataAdapter,
+                                      ioBaseAddr, eDmaRegsOffset, 10000, 100) ==
+            MV_FALSE)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d: in Issue PIO "
+                     "DATA-OUT command: disk not ready.\n",
+                     pSataChannel->mvSataAdapter->adapterId,
+                     pSataChannel->channelNumber);
+            return MV_FALSE;
+        }
+
+        if (pSataChannel->mvSataAdapter->sataAdapterGeneration >= MV_SATA_GEN_II)
+        {
+
+            if (waitForDRQ(pSataChannel->mvSataAdapter, ioBaseAddr, eDmaRegsOffset, 500, 10000)
+                == MV_FALSE)
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d: DRQ bit in ATA STATUS"
+                         " register is not set\n", pSataChannel->mvSataAdapter->adapterId, pSataChannel->channelNumber);
+                return MV_FALSE;
+            }
+        }
+        /* Check the status register on DATA request commands */
+        ATAstatus = MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset +
+                                     MV_ATA_DEVICE_STATUS_REG_OFFSET);
+        if ((ATAstatus & (MV_ATA_DATA_REQUEST_STATUS | MV_ATA_BUSY_STATUS | MV_ATA_ERROR_STATUS)) !=
+            MV_ATA_DATA_REQUEST_STATUS)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d: in Issue PIO "
+                     "DATA-OUT command: Bad ATA STATUS:0x%02x.\n",
+                     pSataChannel->mvSataAdapter->adapterId,
+                     pSataChannel->channelNumber, ATAstatus);
+            return MV_FALSE;
+        }
+
+        if (pSataChannel->mvSataAdapter->sataAdapterGeneration >= MV_SATA_GEN_II)
+        {
+            /* Perform a dummy read */
+            MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset +
+                             MV_ATA_DEVICE_STATUS_REG_OFFSET);
+            mvMicroSecondsDelay (pSataChannel->mvSataAdapter, 1);
+        }
+#ifdef MV_SUPPORT_ATAPI
+        if(pCommandEntry->pCommandInfo->type == MV_QUEUED_COMMAND_TYPE_PACKET)
+        {
+            MV_PACKET_COMMAND_PARAMS *pParams =
+                &pCommandEntry->pCommandInfo->commandParams.packetCommand;
+            for (i = 0; i < pParams->cdb_len ; i++)
+            {
+                MV_REG_WRITE_WORD(ioBaseAddr, eDmaRegsOffset +
+                                  MV_ATA_DEVICE_PIO_DATA_REG_OFFSET,
+                                  MV_CPU_TO_LE16(pParams->cdb_buffer[i]));
+            }
+            for(; i < 6; i++)
+            {
+                MV_REG_WRITE_WORD(ioBaseAddr, eDmaRegsOffset +
+                                  MV_ATA_DEVICE_PIO_DATA_REG_OFFSET,
+                                  0);
+ 
+            }
+            MV_CPU_WRITE_BUFFER_FLUSH();
+            pSataChannel->waitForBMDMA = MV_FALSE;
+            if(pParams->protocolType == MV_NON_UDMA_PROTOCOL_PACKET_DMA)
+            {
+               activateBMDmaMode(pSataChannel->mvSataAdapter,
+                                 pSataChannel->channelNumber,
+                                 pParams->prdHighAddr,
+                                 pParams->prdLowAddr, 
+                        (pParams->flags & MV_BIT0) ? MV_UDMA_TYPE_WRITE: MV_UDMA_TYPE_READ); 
+               
+            }
+            return MV_TRUE;
+        }
+#endif
+        for (i = 0; i < ATA_SECTOR_SIZE_IN_WORDS; i++)
+        {
+            MV_REG_WRITE_WORD(ioBaseAddr, eDmaRegsOffset +
+                              MV_ATA_DEVICE_PIO_DATA_REG_OFFSET,
+                              *pParams->bufPtr++);
+            MV_CPU_WRITE_BUFFER_FLUSH();
+        }
+        pParams->count -= ATA_SECTOR_SIZE_IN_WORDS;
+#ifdef MV_SATA_SUPPORT_READ_WRITE_LONG
+
+        /* for Write long only*/
+        if (pParams->count == 4)
+        {
+            if (pSataChannel->mvSataAdapter->sataAdapterGeneration >= MV_SATA_GEN_II)
+            {
+                /* Perform a dummy read */
+                MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset +
+                                 MV_ATA_DEVICE_STATUS_REG_OFFSET);
+                mvMicroSecondsDelay (pSataChannel->mvSataAdapter, 1);
+            }
+            if (waitWhileStorageDevIsBusy(pSataChannel->mvSataAdapter,
+                                          ioBaseAddr, eDmaRegsOffset,
+                                          50000, 100) == MV_FALSE)
+            {
+                return MV_FALSE;
+            }
+            if (pSataChannel->mvSataAdapter->sataAdapterGeneration >= MV_SATA_GEN_II)
+            {
+                if (waitForDRQ(pSataChannel->mvSataAdapter, ioBaseAddr, eDmaRegsOffset, 50000, 100)
+                    == MV_FALSE)
+                {
+                    return MV_FALSE;
+                }
+            }
+            for (i = 0; i < 4; i++)
+            {
+                MV_REG_WRITE_WORD(ioBaseAddr, eDmaRegsOffset +
+                                  MV_ATA_DEVICE_PIO_DATA_REG_OFFSET,
+                                  *pParams->bufPtr++);
+                MV_CPU_WRITE_BUFFER_FLUSH();
+
+
+                ATAstatus = MV_REG_READ_BYTE(ioBaseAddr, eDmaRegsOffset +
+                                             MV_ATA_DEVICE_STATUS_REG_OFFSET);
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: Write Long ECC data"
+                         " xfered. ATA STATUS:0x%02x.\n",
+                         pSataChannel->mvSataAdapter->adapterId,
+                         pSataChannel->channelNumber, ATAstatus);
+            }
+            pParams->count -= 4;
+        }
+#endif /*MV_SATA_SUPPORT_READ_WRITE_LONG*/
+    }
+    return MV_TRUE;
+}
+
+/*   SATA Core API functions        */
+
+/*******************************************************************************
+* mvSataInitAdapter - initialize MV88SX50XX adapter
+*
+* DESCRIPTION:
+*   this function initializes glabal registers that concerns PCI access
+*   and Interrupts.
+*
+* INPUT:
+*   *pAdapter   - pointer to the adapter data structure.
+*
+* RETURN:
+*   MV_TRUE on success, MV_FALSE otherwise.
+*
+* COMMENTS:
+*   The adapter will not be able yet to generate interrupts
+*
+*******************************************************************************/
+MV_BOOLEAN mvSataInitAdapter (MV_SATA_ADAPTER *pAdapter)
+{
+    MV_U8    sataUnit;
+    MV_U8    channelIndex;
+    MV_U32  regVal;
+
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "    : mvSataInitAdapter"
+                 " Failed, Bad adapter data structure pointer\n");
+        return MV_FALSE;
+    }
+
+    if (mvOsSemInit(&pAdapter->semaphore) == MV_FALSE)
+    {
+        return MV_FALSE;
+    }
+
+    if (mvOsSemInit(&pAdapter->interruptsMaskSem) == MV_FALSE)
+    {
+        return MV_FALSE;
+    }
+#ifdef MV_SATA_IO_GRANULARITY
+    if (mvOsSemInit(&pAdapter->iogSemaphore) == MV_FALSE)
+    {
+        return MV_FALSE;
+    }
+#endif
+
+    if (pAdapter->mvSataEventNotify == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d  : Bad pointer for "
+                 "mvSataEventNotify function\n", pAdapter->adapterId);
+        return MV_FALSE;
+    }
+
+    /* Initialize the hardware workarounds to false, and to 8 channels */
+    pAdapter->chipIs50XXB0 = MV_FALSE;
+    pAdapter->chipIs50XXB2 = MV_FALSE;
+    pAdapter->chipIs60X1B2 = MV_FALSE;
+    pAdapter->chipIs60X1C0 = MV_FALSE;
+    pAdapter->chipIs62X1Z0 = MV_FALSE;
+    pAdapter->chipIs65XXZ0 = MV_FALSE;
+    pAdapter->numberOfChannels = MV_SATA_CHANNELS_NUM;
+    pAdapter->numberOfUnits = MV_SATA_UNITS_NUM;
+    pAdapter->portsPerUnit = MV_SATA_PORT_PER_UNIT;
+    pAdapter->hostInterface = MV_HOST_IF_PCI;
+    pAdapter->mainMaskOffset = MV_MAIN_INTERRUPT_MASK_REG_OFFSET;
+    pAdapter->mainCauseOffset = MV_MAIN_INTERRUPT_CAUSE_REG_OFFSET;
+    switch (pAdapter->pciConfigDeviceId)
+    {
+    case MV_SATA_DEVICE_ID_5080 :
+        pAdapter->sataAdapterGeneration = MV_SATA_GEN_I;
+        switch (pAdapter->pciConfigRevisionId)
+        {
+        case 0x1:
+            pAdapter->chipIs50XXB0 = MV_TRUE;
+            break;
+        case 0x3:
+            pAdapter->chipIs50XXB2 = MV_TRUE;
+            break;
+        default:
+            if (pAdapter->pciConfigRevisionId > 0x3)
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                         " %d : Warning: Future revision ID %02x for Device "
+                         "ID %02x. Implementing latest workarounds\n",
+                         pAdapter->adapterId, pAdapter->pciConfigRevisionId,
+                         pAdapter->pciConfigDeviceId);
+                pAdapter->chipIs50XXB2 = MV_TRUE;
+            }
+            else
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                         " %d : Bad revision ID %02x for Device ID %02x\n",
+                         pAdapter->adapterId, pAdapter->pciConfigRevisionId,
+                         pAdapter->pciConfigDeviceId);
+                return MV_FALSE;
+            }
+        }
+        break;
+    case MV_SATA_DEVICE_ID_5041 :
+    case MV_SATA_DEVICE_ID_5040 :
+        pAdapter->numberOfChannels = MV_SATA_PORT_PER_UNIT;
+        pAdapter->numberOfUnits = 1;
+    case MV_SATA_DEVICE_ID_5081 :
+        pAdapter->sataAdapterGeneration = MV_SATA_GEN_I;
+        switch (pAdapter->pciConfigRevisionId)
+        {
+        case 0x0:
+            pAdapter->chipIs50XXB0 = MV_TRUE;
+            break;
+        case 0x3:
+            pAdapter->chipIs50XXB2 = MV_TRUE;
+            break;
+        default:
+            if (pAdapter->pciConfigRevisionId > 0x3)
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d : Warning: Future revis"
+                         "ion ID %02x. Implementing latest workarounds\n",
+                         pAdapter->adapterId, pAdapter->pciConfigRevisionId);
+                pAdapter->chipIs50XXB2 = MV_TRUE;
+            }
+            else
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d : Bad revisi"
+                         "on ID %02x\n",    pAdapter->adapterId,
+                         pAdapter->pciConfigRevisionId);
+                return MV_FALSE;
+            }
+        }
+        break;
+    case MV_SATA_DEVICE_ID_6041 :
+        pAdapter->numberOfChannels = MV_SATA_PORT_PER_UNIT;
+        pAdapter->numberOfUnits = 1;
+    case MV_SATA_DEVICE_ID_6081 :
+        pAdapter->sataAdapterGeneration = MV_SATA_GEN_II;
+        switch (pAdapter->pciConfigRevisionId)
+        {
+        case 0x7:/*B2*/
+            pAdapter->chipIs60X1B2 = MV_TRUE;
+            break;
+        case 0x9:/*C0*/
+            pAdapter->chipIs60X1C0 = MV_TRUE;
+            break;
+        default:
+            if (pAdapter->pciConfigRevisionId > 0x9)
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d : Warning:"
+                         " Future revision ID %02x. Implementing latest "
+                         "workarounds\n", pAdapter->adapterId,
+                         pAdapter->pciConfigRevisionId);
+                pAdapter->chipIs60X1C0 = MV_TRUE;
+            }
+            else
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                         " %d : Device %02x Bad revision ID %02x\n",
+                         pAdapter->adapterId,
+                         pAdapter->pciConfigDeviceId,
+                         pAdapter->pciConfigRevisionId);
+                return MV_FALSE;
+            }
+        }
+        break;
+    case MV_SATA_DEVICE_ID_7042 :
+        pAdapter->hostInterface = MV_HOST_IF_PEX;
+    case MV_SATA_DEVICE_ID_6042 :
+        pAdapter->numberOfChannels = MV_SATA_PORT_PER_UNIT;
+        pAdapter->numberOfUnits = 1;
+        pAdapter->sataAdapterGeneration = MV_SATA_GEN_IIE;
+        switch (pAdapter->pciConfigRevisionId)
+        {
+        case 0x2:/*B0*/
+            pAdapter->chipIs60X1C0 = MV_TRUE;
+            break;
+        default:
+            if (pAdapter->pciConfigRevisionId > 0x2)
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d : Warning:"
+                         " Future revision ID %02x for Device %02x."
+                         " Implementing latest workarounds\n",
+                         pAdapter->adapterId,
+                         pAdapter->pciConfigRevisionId,
+                         pAdapter->pciConfigDeviceId);
+                pAdapter->chipIs60X1C0 = MV_TRUE;
+            }
+            else
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                         " %d : Device %02x Bad revision ID %02x\n",
+                         pAdapter->adapterId,
+                         pAdapter->pciConfigDeviceId,
+                         pAdapter->pciConfigRevisionId);
+                return MV_FALSE;
+            }
+        }
+        break;
+
+    case MV_SATA_DEVICE_ID_5182:
+        pAdapter->numberOfChannels = MV_SATA_5182_PORT_NUM;
+        pAdapter->numberOfUnits = 1;
+        pAdapter->portsPerUnit = MV_SATA_5182_PORT_NUM;
+        pAdapter->sataAdapterGeneration = MV_SATA_GEN_IIE;
+        /*The integrated sata core chip based on 60x1 C0*/
+        pAdapter->chipIs60X1C0 = MV_TRUE;
+        pAdapter->hostInterface = MV_HOST_IF_INTEGRATED;
+        pAdapter->mainMaskOffset = 0x20024; /*the iobaseaddress is 0x60000*/
+        pAdapter->mainCauseOffset = 0x20020;
+        break;
+
+    case MV_SATA_DEVICE_ID_5082:
+        pAdapter->numberOfChannels = MV_SATA_5082_PORT_NUM;
+        pAdapter->numberOfUnits = 1;
+        pAdapter->portsPerUnit = MV_SATA_5082_PORT_NUM;
+        pAdapter->sataAdapterGeneration = MV_SATA_GEN_IIE;
+        /*The integrated sata core chip based on 60x1 C0*/
+        pAdapter->chipIs60X1C0 = MV_TRUE;
+        pAdapter->hostInterface = MV_HOST_IF_INTEGRATED;
+        pAdapter->mainMaskOffset = 0x20024; /*the iobaseaddress is 0x60000*/
+        pAdapter->mainCauseOffset = 0x20020;
+	mvSataChannelPhyShutdown(pAdapter, 1);
+        break;
+
+    case MV_SATA_DEVICE_ID_6082:
+        pAdapter->numberOfChannels = MV_SATA_6082_PORT_NUM;
+        pAdapter->numberOfUnits = 1;
+        pAdapter->portsPerUnit = MV_SATA_6082_PORT_NUM;
+        pAdapter->sataAdapterGeneration = MV_SATA_GEN_IIE;
+        /*The integrated sata core chip based on 60x1 C0*/
+        pAdapter->chipIs60X1C0 = MV_TRUE;
+        pAdapter->hostInterface = MV_HOST_IF_INTEGRATED;
+        pAdapter->mainMaskOffset = 0x20024; /*the iobaseaddress is 0x40000*/
+        pAdapter->mainCauseOffset = 0x20020;
+        break;
+
+    case MV_SATA_DEVICE_ID_6490:
+        pAdapter->numberOfChannels = MV_SATA_6490_PORT_NUM;
+        pAdapter->numberOfUnits = 1;
+        pAdapter->portsPerUnit = MV_SATA_6490_PORT_NUM;
+        pAdapter->sataAdapterGeneration = MV_SATA_GEN_IIE;
+        /*The integrated sata core chip based on 60x1 C0*/
+        pAdapter->chipIs60X1C0 = MV_TRUE;
+        pAdapter->hostInterface = MV_HOST_IF_INTEGRATED;
+        pAdapter->mainMaskOffset = 0x20024;
+        pAdapter->mainCauseOffset = 0x20020;
+
+	/* enable swap DMA Data, EDMA descriptors and PRD tables to keep the data layout
+	 * as in the PCI adapters 
+	 */
+	_clearRegBits(pAdapter->adapterIoBaseAddress,
+		      MV_SATAHC_0_REGS_BASE_OFFSET,
+		      MV_BIT10 | MV_BIT9 | MV_BIT8);
+
+        break;
+	case MV_SATA_DEVICE_ID_78XX0:
+	case MV_SATA_DEVICE_ID_78100:
+	case MV_SATA_DEVICE_ID_78200:
+		pAdapter->numberOfChannels = MV_SATA_78XX0_PORT_NUM;
+		pAdapter->numberOfUnits = 1;
+		pAdapter->portsPerUnit = MV_SATA_78XX0_PORT_NUM;
+		pAdapter->sataAdapterGeneration = MV_SATA_GEN_IIE;
+		/*The integrated sata core chip based on 60x1 C0*/
+		pAdapter->hostInterface = MV_HOST_IF_INTEGRATED;
+		pAdapter->mainMaskOffset = 0x20024;
+		pAdapter->mainCauseOffset = 0x20020;
+		pAdapter->chipIs62X1Z0 = MV_TRUE;
+		break;
+	case MV_SATA_DEVICE_ID_76100:
+		pAdapter->numberOfChannels = MV_SATA_76100_PORT_NUM;
+		pAdapter->numberOfUnits = 1;
+		pAdapter->portsPerUnit = MV_SATA_76100_PORT_NUM;
+		pAdapter->sataAdapterGeneration = MV_SATA_GEN_IIE;
+		/*The integrated sata core chip based on 60x1 C0*/
+		pAdapter->hostInterface = MV_HOST_IF_INTEGRATED;
+		pAdapter->mainMaskOffset = 0x20024;
+		pAdapter->mainCauseOffset = 0x20020;
+		pAdapter->chipIs62X1Z0 = MV_TRUE;
+		break;
+	case MV_SATA_DEVICE_ID_6323:
+		pAdapter->numberOfChannels = MV_SATA_6323_PORT_NUM;
+		pAdapter->numberOfUnits = 1;
+		pAdapter->portsPerUnit = MV_SATA_6323_PORT_NUM;
+		pAdapter->sataAdapterGeneration = MV_SATA_GEN_IIE;
+		/*The integrated sata core chip based on 60x1 C0*/
+		pAdapter->hostInterface = MV_HOST_IF_INTEGRATED;
+		pAdapter->mainMaskOffset = 0x20024;
+		pAdapter->mainCauseOffset = 0x20020;
+		pAdapter->chipIs62X1Z0 = MV_TRUE;
+		break;
+
+	case MV_SATA_DEVICE_ID_6281:
+		pAdapter->numberOfChannels = MV_SATA_6281_PORT_NUM;
+		pAdapter->numberOfUnits = 1;
+		pAdapter->portsPerUnit = MV_SATA_6281_PORT_NUM;
+		pAdapter->sataAdapterGeneration = MV_SATA_GEN_IIE;
+		/*The integrated sata core chip based on 60x1 C0*/
+		pAdapter->hostInterface = MV_HOST_IF_INTEGRATED;
+		pAdapter->mainMaskOffset = 0x20024;
+		pAdapter->mainCauseOffset = 0x20020;
+		pAdapter->chipIs62X1Z0 = MV_TRUE;
+		break;
+
+    	case MV_SATA_DEVICE_ID_6282:
+		pAdapter->numberOfChannels = MV_SATA_6282_PORT_NUM;
+		pAdapter->numberOfUnits = 1;
+		pAdapter->portsPerUnit = MV_SATA_6282_PORT_NUM;
+		pAdapter->sataAdapterGeneration = MV_SATA_GEN_IIE;
+		/*The integrated sata core chip based on 60x1 C0*/
+		pAdapter->hostInterface = MV_HOST_IF_INTEGRATED;
+		pAdapter->mainMaskOffset = 0x20024;
+		pAdapter->mainCauseOffset = 0x20020;
+		pAdapter->chipIs62X1Z0 = MV_TRUE;
+		break;
+
+	case MV_SATA_DEVICE_ID_6192:
+		pAdapter->numberOfChannels = MV_SATA_6192_PORT_NUM;
+		pAdapter->numberOfUnits = 1;
+		pAdapter->portsPerUnit = MV_SATA_6192_PORT_NUM;
+		pAdapter->sataAdapterGeneration = MV_SATA_GEN_IIE;
+		/*The integrated sata core chip based on 60x1 C0*/
+		pAdapter->hostInterface = MV_HOST_IF_INTEGRATED;
+		pAdapter->mainMaskOffset = 0x20024;
+		pAdapter->mainCauseOffset = 0x20020;
+		pAdapter->chipIs62X1Z0 = MV_TRUE;
+		break;
+
+	case MV_SATA_DEVICE_ID_6190:
+		pAdapter->numberOfChannels = MV_SATA_6190_PORT_NUM;
+		pAdapter->numberOfUnits = 1;
+		pAdapter->portsPerUnit = MV_SATA_6190_PORT_NUM;
+		pAdapter->sataAdapterGeneration = MV_SATA_GEN_IIE;
+		/*The integrated sata core chip based on 60x1 C0*/
+		pAdapter->hostInterface = MV_HOST_IF_INTEGRATED;
+		pAdapter->mainMaskOffset = 0x20024;
+		pAdapter->mainCauseOffset = 0x20020;
+		pAdapter->chipIs62X1Z0 = MV_TRUE;
+		break;
+
+	case MV_SATA_DEVICE_ID_6781:
+		pAdapter->numberOfChannels = MV_SATA_6781_PORT_NUM;
+		pAdapter->numberOfUnits = 1;
+		pAdapter->portsPerUnit = MV_SATA_6781_PORT_NUM;
+		pAdapter->sataAdapterGeneration = MV_SATA_GEN_IIE;
+		/*The integrated sata core chip based on 60x1 C0*/
+		pAdapter->hostInterface = MV_HOST_IF_INTEGRATED;
+		pAdapter->mainMaskOffset = 0x20024;
+		pAdapter->mainCauseOffset = 0x20020;
+		pAdapter->chipIs62X1Z0 = MV_TRUE;
+		break;
+
+    	case MV_SATA_DEVICE_ID_6550:
+	case MV_SATA_DEVICE_ID_6560:
+		pAdapter->numberOfChannels = MV_SATA_6781_PORT_NUM;
+		pAdapter->numberOfUnits = 1;
+		pAdapter->portsPerUnit = MV_SATA_65XX_PORT_NUM;
+		pAdapter->sataAdapterGeneration = MV_SATA_GEN_IIE;
+		/*The integrated sata core chip based on 60x1 C0*/
+		pAdapter->hostInterface = MV_HOST_IF_INTEGRATED;
+		pAdapter->mainMaskOffset = 0x20024;
+		pAdapter->mainCauseOffset = 0x20020;
+		pAdapter->chipIs65XXZ0 = MV_TRUE;
+		break;
+
+    default:
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d : Bad device ID"
+                 " 0x%04x\n", pAdapter->adapterId,
+                 pAdapter->pciConfigDeviceId);
+        return MV_FALSE;
+    }
+
+    /* Clear main mask register to prevent adapter from generating interrupts */
+    pAdapter->mainMask = 0;
+    pAdapter->interruptsAreMasked = MV_TRUE;
+    MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                        pAdapter->mainMaskOffset, pAdapter->mainMask);
+
+    /*
+     * Save the PRE and AMP in the adapter. Also set staggared spin up to be
+     * disabled on default (60x1 only).
+     */
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " %d : Saving PRE and AMP values\n",
+             pAdapter->adapterId);
+    for (channelIndex = 0; channelIndex < pAdapter->numberOfChannels; channelIndex++)
+    {
+        MV_U32  PHYModeRegister;
+        pAdapter->staggaredSpinup[channelIndex] = MV_FALSE;
+        pAdapter->ifSpeed[channelIndex] = MV_SATA_IF_SPEED_NO_LIMIT;
+        pAdapter->ifPowerState[channelIndex] = MV_SATA_IF_POWER_PHY_READY;
+        pAdapter->limitInterfaceSpeed[channelIndex] = MV_FALSE;
+        if (pAdapter->sataAdapterGeneration == MV_SATA_GEN_I)
+        {
+            PHYModeRegister = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                                MV_SATAHC_REGS_BASE_OFFSET((channelIndex & MV_BIT2) >> 2) +
+                                                MV_SATA_I_HC_PHY_MODE_BRIDGE_PORT_REG_OFFSET(channelIndex & (MV_BIT0 | MV_BIT1)));
+            pAdapter->signalAmps[channelIndex] = (MV_U8)((PHYModeRegister & MV_SATA_I_PHY_MODE_AMP_MASK) >> MV_SATA_I_PHY_MODE_AMP_OFFSET);
+            pAdapter->pre[channelIndex] = (MV_U8)((PHYModeRegister & MV_SATA_I_PHY_MODE_PRE_MASK) >> MV_SATA_I_PHY_MODE_PRE_OFFSET);
+        }
+        if (pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II)
+        {
+            /*
+             * Check if TWSI serial ROM initialization was triggered.
+             * If so, then PRE/AMP configuration probably are set after
+             * reset by serial ROM. If not then override the PRE/AMP
+             * values.
+             */
+            if ((pAdapter->hostInterface != MV_HOST_IF_INTEGRATED) && 
+                ((MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress, MV_RESET_CONFIG_REG_OFFSET))
+                    & MV_RESET_CONFIG_TWSI_INIT_MASK))
+            {
+
+                MV_U32 phyMode2Offset = getEdmaRegOffset(channelIndex) +
+                                        MV_SATA_II_PHY_MODE_2_REG_OFFSET;
+                /* Make sure EDMA is off */
+                MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                                    getEdmaRegOffset (channelIndex) +
+                                    MV_EDMA_COMMAND_REG_OFFSET,
+                                    MV_EDMA_COMMAND_DISABLE_MASK);
+                MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress,
+                                   getEdmaRegOffset(channelIndex) +
+                                   MV_EDMA_COMMAND_REG_OFFSET);
+                regVal = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                           phyMode2Offset);
+                pAdapter->signalAmps[channelIndex] =
+                (MV_U8)((regVal & MV_SATA_II_PHY_MODE_2_AMP_MASK) >>
+                        MV_SATA_II_PHY_MODE_2_AMP_OFFSET);
+                pAdapter->pre[channelIndex] =
+                (MV_U8)((regVal & MV_SATA_II_PHY_MODE_2_PRE_MASK) >>
+                        MV_SATA_II_PHY_MODE_2_PRE_OFFSET);
+            }
+            else
+            {
+                pAdapter->signalAmps[channelIndex] = 0x7;
+                pAdapter->pre[channelIndex] = 0x1;
+            }
+        }
+    }
+#ifndef MV_NO_SW_RESET_FOR_THE_ADAPTER
+    /* Revert the registers to it's default value (software reset) */
+    revertSataHCRegs (pAdapter);
+
+    if (pAdapter->hostInterface != MV_HOST_IF_INTEGRATED)
+    {
+        revertFlashInterfaceRegs (pAdapter);  
+    }
+
+    if (pAdapter->hostInterface == MV_HOST_IF_PEX)
+    {
+        revertPEXInterfaceRegs(pAdapter);    
+    }
+    else if (pAdapter->hostInterface == MV_HOST_IF_PCI)
+    {
+	 revertPCIInterfaceRegs(pAdapter);
+    }
+#endif
+
+    /* Enable the SATA LEDs if the silicon revision is B0 */
+    if (pAdapter->sataAdapterGeneration == MV_SATA_GEN_I)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " %d : Enabling SATA LEDS\n",
+                 pAdapter->adapterId);
+        /* Enable the SATA leds */
+        MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                           MV_FLASH_GPIO_PORT_CONTROL_OFFSET, 0x0);
+        if (pAdapter->chipIs50XXB2 == MV_TRUE)
+        {
+            regVal = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                       MV_FLASH_GPIO_PORT_CONTROL_OFFSET);
+            for (channelIndex = 0 ; channelIndex < pAdapter->numberOfChannels ;
+                channelIndex ++)
+            {
+		 if (mvSataIsStorageDeviceConnected (pAdapter,channelIndex, NULL) == MV_FALSE)
+                {
+                    regVal |= (MV_BIT8 << channelIndex);
+                }
+            }
+            MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                                MV_FLASH_GPIO_PORT_CONTROL_OFFSET,
+                                regVal);
+        }
+        /* disable Flash controller clock*/
+        regVal = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                   MV_PCI_REGS_OFFSET +
+                                   MV_PCI_EXPANSION_ROM_CONTROL_REG_OFFSET);
+
+        regVal &= ~(MV_BIT0);
+        MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                           MV_PCI_REGS_OFFSET + MV_PCI_EXPANSION_ROM_CONTROL_REG_OFFSET,
+                           regVal);
+    }
+
+    /* Enable the SATA LEDs for 88SX60X1 devices */
+    if ((pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II) &&
+        (pAdapter->hostInterface != MV_HOST_IF_INTEGRATED))
+
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " %d : Enabling SATA LEDS\n",
+                 pAdapter->adapterId);
+        /* Enable the SATA leds */
+        MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                           MV_FLASH_GPIO_PORT_CONTROL_OFFSET, 0x00000060);
+
+    }
+
+    /* Check if working in PCI-X mode, then disable all conventional PCI */
+    /* features */
+    if (pAdapter->hostInterface == MV_HOST_IF_PCI)
+    {
+        regVal = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                   MV_PCI_REGS_OFFSET + MV_PCI_MODE_REG_OFFSET);
+        if (((regVal & MV_PCI_MODE_MASK) >> MV_PCI_MODE_OFFSET) != 0) /* PCI-X */
+        {
+            if (pAdapter->pciCommand & MV_PCI_COMMAND_PCI_CONVENTIONAL_ONLY)
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d : disable pci conventio"
+                         "nal features when working in PCI-X. pciCommand origin"
+                         "al value:0x%08x. new value: 0x%08x.\n",
+                         pAdapter->adapterId,
+                         pAdapter->pciCommand, pAdapter->pciCommand &
+                         (~MV_PCI_COMMAND_PCI_CONVENTIONAL_ONLY));
+                pAdapter->pciCommand &= ~MV_PCI_COMMAND_PCI_CONVENTIONAL_ONLY;
+            }
+            if ((pAdapter->chipIs50XXB0 == MV_TRUE) ||
+                (pAdapter->chipIs50XXB2 == MV_TRUE) ||
+                (pAdapter->chipIs60X1B2 == MV_TRUE))
+            {
+                /* Fix for 88SX50xx FEr PCI#1*/
+                /* Fix for 88SX60x1 FEr PCI#7*/
+                if (pAdapter->pciCommand & MV_PCI_MWRITE_COMBINE_BIT)
+                {
+                    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d  : PCI-X Master"
+                             " Write combine enable rejected\n",
+                             pAdapter->adapterId);
+                    pAdapter->pciCommand &= ~MV_PCI_MWRITE_COMBINE_BIT;
+                }
+            }
+        }
+        else
+        {
+            if ((pAdapter->chipIs50XXB0 == MV_TRUE) ||
+                (pAdapter->chipIs50XXB2 == MV_TRUE))
+            {
+                /* Fix for 88SX50xx FEr PCI#2*/
+                if (pAdapter->pciCommand & MV_PCI_MWRITE_COMBINE_BIT)
+                {
+                    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d  : PCI Master"
+                             " Write combine enable rejected\n",
+                             pAdapter->adapterId);
+                    pAdapter->pciCommand &= ~MV_PCI_MWRITE_COMBINE_BIT;
+                }
+                if (pAdapter->pciCommand & MV_PCI_MREAD_COMBINE_BIT)
+                {
+                    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d  : PCI Master"
+                             " Read combine enable rejected\n",
+                             pAdapter->adapterId);
+                    pAdapter->pciCommand &= ~MV_PCI_MREAD_COMBINE_BIT;
+                }
+            }
+        }
+    }
+#if 0
+    /* Fix for 88SX60x1 FEr SATA#8*/
+    for (channelIndex = 0; channelIndex < pAdapter->numberOfChannels; channelIndex++)
+    {
+        if (pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II)
+        {
+            regVal = MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress,
+                                        getEdmaRegOffset (channelIndex) +
+                                        MV_SATA_II_SATA_CONFIG_REG_OFFSET);
+            /* Fix for 88SX60x1 FEr SATA#8*/
+            /* according to the spec, bits [31:12] must be set to 0x009B1 */
+            regVal &= 0x00000FFF;
+            /* regVal |= MV_BIT12;*/
+            regVal |= 0x009B1000;
+
+            MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                                getEdmaRegOffset (channelIndex) +
+                                MV_SATA_II_SATA_CONFIG_REG_OFFSET,
+                                regVal);
+            /* _channelHardReset(pAdapter, channelIndex);*/
+        }
+
+        _fixPhyParams(pAdapter, channelIndex);
+    }
+#endif
+   if (pAdapter->hostInterface == MV_HOST_IF_PCI)
+    {
+
+        MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                           MV_PCI_REGS_OFFSET + MV_PCI_COMMAND_REG_OFFSET,
+                           pAdapter->pciCommand);
+        MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                           MV_PCI_REGS_OFFSET + MV_PCI_SERR_MASK_REG_OFFSET,
+                           pAdapter->pciSerrMask);
+
+        MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                           MV_PCI_REGS_OFFSET + MV_PCI_INTERRUPT_MASK_REG_OFFSET,
+                           pAdapter->pciInterruptMask);
+    }
+    else if (pAdapter->hostInterface == MV_HOST_IF_PEX)
+    {
+        MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                           MV_PCI_REGS_OFFSET + MV_PCI_E_INTERRUPT_MASK_REG_OFFSET,
+                           MV_PCI_E_ERROR_MASK_VALUE);
+    }
+    for (sataUnit = 0; sataUnit < pAdapter->numberOfUnits; sataUnit++)
+    {
+        MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                           MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                           MV_SATAHC_INT_COAL_THRE_REG_OFFSET,
+                           pAdapter->intCoalThre[sataUnit]);
+        MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                           MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                           MV_SATAHC_INT_TIME_THRE_REG_OFFSET,
+                           pAdapter->intTimeThre[sataUnit]);
+
+    }
+    if (pAdapter->hostInterface == MV_HOST_IF_INTEGRATED)
+    {
+         pAdapter->mainMask = MV_BIT8|MV_BIT2|MV_BIT0;
+    }
+    else
+    {
+        pAdapter->mainMask = MV_MAIN_INTERRUPT_MASK_ENABLE_ALL;
+    }
+    pAdapter->interruptsScheme = MV_SATA_INTERRUPT_HANDLING_IN_ISR;
+
+    for (channelIndex = 0; channelIndex < pAdapter->numberOfChannels; channelIndex++)
+    {
+        unmaskEdmaInterrupts(pAdapter, channelIndex);
+    }
+    return MV_TRUE;
+}
+
+/*******************************************************************************
+* mvSataShutDownAdapter - Shuts down adapter.
+*
+* DESCRIPTION: Shuts down a specific 88SX50xx adapter.
+*
+* INPUT:
+*   *pAdapter   - pointer to the adapter data structure.
+*
+* OUTPUT:
+*   None.
+*
+* RETURN:
+*   MV_TRUE on success, MV_FALSE on failure
+*
+* COMMENTS:
+*   None.
+*
+*******************************************************************************/
+
+MV_BOOLEAN mvSataShutdownAdapter(MV_SATA_ADAPTER *pAdapter)
+{
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    : "
+                 "mvSataShutdownAdapter Failed, Bad adapter data structure "
+                 "pointer\n");
+        return MV_FALSE;
+    }
+    pAdapter->interruptsAreMasked = MV_TRUE;
+    MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                       pAdapter->mainMaskOffset, 0);
+    return MV_TRUE;
+}
+
+/*******************************************************************************
+* mvSataReadReg - return the value of register.
+*
+* DESCRIPTION:
+*   return the value of a register, which have the offset regOffset, in a
+*   MV88SX50XX adapter.
+*   Note that if reading from storage device's internal registers and EDMA
+*   is enabled, then the read transaction will never complete and possibly
+*   cause system hang.
+*
+* INPUT:
+*   pAdapter    - pointer to the adapter data structure.
+*       regOffset   - offset of the register
+*
+* RETURN:
+*   the register value in 32 bit.
+* COMMENTS:
+*   NONE
+*
+*******************************************************************************/
+MV_U32     mvSataReadReg(MV_SATA_ADAPTER *pAdapter, MV_U32 regOffset)
+{
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    : mvSataReadReg Failed,"
+                 " Bad adapter data structure pointer\n");
+        return 0;
+    }
+
+    return MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress, regOffset);
+}
+
+/*******************************************************************************
+* mvSataWriteReg - return the value of register.
+*
+* DESCRIPTION:
+*   write the regValue to a register, which have the offset regOffset, in a
+*   MV88SX50XX adapter.
+*   Note that if writing to storage device's internal registers and EDMA
+*   is enabled, then the write transaction will never complete and possibly
+*   cause system hang.
+*
+* INPUT:
+*   pAdapter    - pointer to the adapter data structure.
+*       regOffset   - offset of the register
+*   regValue    - the value to write to the register
+*
+* RETURN:
+*   None.
+* COMMENTS:
+*   for 8 or 16 bit registers the low bits of the regValue should hold the
+*   requested value to be written.
+*
+*******************************************************************************/
+MV_VOID mvSataWriteReg(MV_SATA_ADAPTER *pAdapter, MV_U32 regOffset,
+                       MV_U32 regValue)
+{
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    : mvSataWriteReg Failed,"
+                 " Bad adapter data structure pointer\n");
+        return;
+    }
+
+    MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress, regOffset, regValue);
+}
+/*******************************************************************************
+* mvSataConfigureChannel - configure Sata channel
+*
+*
+* DESCRIPTION:
+*   this function configures SATA channel by resetting the low level fields
+*   of the channel data structure and configures EDMA regs accourdingly
+*
+* INPUT:
+*   pAdapter   - pointer to the MV88SX50XX adapter data structure
+*   channelIndex    - the index of the channel where the response received
+*
+* RETURN:
+*   MV_TRUE on success, MV_FALSE otherwise.
+*
+* COMMENTS:
+*   None.
+*
+*******************************************************************************/
+MV_BOOLEAN mvSataConfigureChannel(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex)
+{
+    MV_SATA_CHANNEL     *pSataChannel;
+    MV_BOOLEAN          result;
+
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    : mvSataConfigureChannel"
+                 " Failed, Bad adapter data structure pointer\n");
+        return MV_FALSE;
+    }
+    pSataChannel = pAdapter->sataChannel[channelIndex];
+    if (pSataChannel == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d: mvSataConfigureChann"
+                 "el Failed, channel data structure not allocated\n",
+                 pAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+    }
+    if (pAdapter->numberOfChannels <= channelIndex)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d: mvSataConfigureChann"
+                 "el Failed - requsted to configure a non-valid channel\n",
+                 pAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+    }
+    pSataChannel->eDmaRegsOffset = getEdmaRegOffset(channelIndex);
+    pSataChannel->mvSataAdapter = pAdapter;
+
+    if (mvOsSemInit(&pSataChannel->semaphore)==MV_FALSE)
+    {
+        return MV_FALSE;
+    }
+    mvOsSemTake(&pSataChannel->semaphore);
+
+    /* Sets the request and response queues base addresses */
+    pSataChannel->queueCommandsEnabled = MV_FALSE;
+    pSataChannel->EdmaActive = MV_FALSE;
+    pSataChannel->deviceType = MV_SATA_DEVICE_TYPE_UNKNOWN;
+    if (pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II)
+    {
+        pSataChannel->PMSupported = MV_TRUE;
+    }
+    else
+    {
+        pSataChannel->PMSupported = MV_FALSE;
+    }
+    if (pAdapter->sataAdapterGeneration >= MV_SATA_GEN_IIE)
+    {
+        pSataChannel->commandsQueue = pAdapter->adapterCommands +
+                                      (MV_SATA_GEN2E_SW_QUEUE_SIZE * channelIndex);
+        pSataChannel->commandsQueueSize = MV_SATA_GEN2E_SW_QUEUE_SIZE;
+    }
+    else
+    {
+        pSataChannel->commandsQueue = pAdapter->adapterCommands + 
+                                      (MV_SATA_SW_QUEUE_SIZE * channelIndex);
+        pSataChannel->commandsQueueSize = MV_SATA_SW_QUEUE_SIZE;
+    }
+    pSataChannel->DRQDataBlockSize = 1;
+    pSataChannel->FBSEnabled = MV_FALSE;
+    pSataChannel->use128Entries = MV_FALSE;
+    pSataChannel->EDMAQueuePtrMask = MV_EDMA_QUEUE_MASK;
+    pSataChannel->EDMARequestInpMask = MV_EDMA_REQUEST_Q_INP_MASK;
+    result = resetEdmaChannel(pSataChannel);
+    disableSaDevInterrupts(pAdapter, channelIndex);
+    mvOsSemRelease(&pSataChannel->semaphore);
+    return result;
+}
+
+/*******************************************************************************
+* mvSataRemoveChannel -
+*
+* DESCRIPTION:  Removes data structures and other parameters used for the
+*   specific SATA channel that is indicated by pAdapter and channelIndex.
+*
+* INPUT:
+*   pAdapter - A pointer to an MV_SATA_ADAPTER data structure that holds
+*                information to access the 88SX50xx device.
+*   channelIndex - An index to a specific 88SX50xx channel.
+* OUTPUT:
+*   None.
+* RETURN:
+*   MV_TRUE on success, MV_FALSE otherwise.
+* COMMENTS:
+*
+*******************************************************************************/
+
+MV_BOOLEAN mvSataRemoveChannel(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex)
+{
+    MV_SATA_CHANNEL     *pSataChannel;
+
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    : mvSataRemoveChannel"
+                 " Failed, Bad adapter data structure pointer\n");
+        return MV_FALSE;
+    }
+    mvOsSemTake(&pAdapter->semaphore);
+    pSataChannel = pAdapter->sataChannel[channelIndex];
+
+    if (pSataChannel == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d: mvSataRemoveChannel"
+                 " Failed, channel data structure not allocated\n",
+                 pAdapter->adapterId, channelIndex);
+        mvOsSemRelease(&pAdapter->semaphore);
+        return MV_FALSE;
+    }
+    mvOsSemTake(&pSataChannel->semaphore);
+    if (pSataChannel->queueCommandsEnabled == MV_TRUE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: mvSataRemoveChannel "
+                 "failed, DMA is enabled\n", pAdapter->adapterId, channelIndex);
+        mvOsSemRelease(&pSataChannel->semaphore);
+        mvOsSemRelease(&pAdapter->semaphore);
+        return MV_FALSE;
+    }
+    mvOsSemRelease(&pSataChannel->semaphore);
+    mvOsSemRelease(&pAdapter->semaphore);
+    return MV_TRUE;
+}
+
+/*******************************************************************************
+* mvSataIsStorageDeviceConnected - Check if storage device is connected to a
+*                                  SATA channel.
+*
+* DESCRIPTION:
+*       This function reads the DET field from the R00 status bridge register
+*       of the corresponding channel.
+*
+* INPUT:
+*       pAdapter     - Pointer to the device data structure.
+*       channelIndex - Index of the required channel
+* OUTPU:
+*	SStatus	     - Pointer to SATA status reg value
+*
+* RETURN:
+*       MV_TRUE when storage device is connected, MV_FALSE otherwise( also when
+*       loopback mode is used).
+*
+* COMMENTS:
+*       None
+*
+*******************************************************************************/
+MV_BOOLEAN mvSataIsStorageDeviceConnected(MV_SATA_ADAPTER *pAdapter,
+                                          MV_U8 channelIndex,
+					  MV_U32 *SStatus)
+{
+    MV_U32  SStatusOffset = 0;
+    MV_U32  det;
+
+    if (pAdapter == NULL)
+    {
+     	mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,"    : "
+                 "mvSataIsStorageDeviceConnected Failed, Bad adapter data"
+                 " structure pointer\n");
+        return MV_FALSE;
+    }
+
+    if (pAdapter->numberOfChannels <= channelIndex)
+    {
+       	mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: "
+                 "mvSataIsStorageDeviceConnected Failed, Bad channelIndex "
+                 " input on a 0x%x adapterstructure pointer\n",
+                 pAdapter->adapterId,channelIndex,pAdapter->pciConfigDeviceId);
+        return MV_FALSE;
+    }
+
+    if (pAdapter->sataAdapterGeneration == MV_SATA_GEN_I)
+    {
+        MV_U8   sataUnit = (channelIndex & MV_BIT2) >> 2;
+        MV_U8   port = channelIndex & (MV_BIT0 | MV_BIT1);
+        SStatusOffset = MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                        MV_SATA_I_HC_R00_STATUS_BRIDGE_PORT_OFFSET(port);
+    }
+    if (pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II)
+    {
+        SStatusOffset = getEdmaRegOffset(channelIndex) +
+                        MV_SATA_II_S_STATUS_REG_OFFSET;
+        if (pAdapter->staggaredSpinup[channelIndex] == MV_FALSE)
+        {
+            return MV_FALSE;
+        }
+    }
+
+    det = MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress,
+                             SStatusOffset) & 0xf;
+
+    switch (det)
+    {
+    case MV_PHY_DET_STATE_NO_DEVICE:
+        break;
+    case MV_PHY_DET_STATE_DEVICE_NO_PHY_COM:
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                 " %d %d: Detection value is 1\n", pAdapter->adapterId,
+                 channelIndex);
+
+        MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                          SStatusOffset);
+        mvMicroSecondsDelay(pAdapter, MV_PHY_COM_SETUP_WAIT);
+        det = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                SStatusOffset) & 0xf;
+        if (det != MV_PHY_DET_STATE_DEVICE_AND_PHY_COM)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: Failed to"
+                     " establish SATA PHY communication\n",
+                     pAdapter->adapterId, channelIndex);
+            break;
+        }
+    case MV_PHY_DET_STATE_DEVICE_AND_PHY_COM:
+        return MV_TRUE;
+    case MV_PHY_DET_STATE_PHY_OFFLINE:
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: WARNING: SATA PHY is "
+                 "offline\n", pAdapter->adapterId, channelIndex);
+        break;
+    default:
+	return MV_FALSE;
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: unknow value for\
+                      R00 Status Bridge reg bits[3:0] (0x%02x)\n",
+                 pAdapter->adapterId, channelIndex, det);
+    }
+    return MV_FALSE;
+}
+
+static MV_BOOLEAN _checkSStatusAfterHReset(MV_SATA_ADAPTER* pAdapter,
+                                           MV_U8 channelIndex)
+{
+    MV_U32 SStatusOffset;
+    MV_U32  SStatus;
+    if (pAdapter->sataAdapterGeneration == MV_SATA_GEN_I)
+    {
+        /*  Get DET field in SControl register to 1 */
+        MV_U8       port = channelIndex & (MV_BIT0 | MV_BIT1);
+        MV_U8       sataUnit = (channelIndex & MV_BIT2) >> 2;
+        SStatusOffset = MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                        MV_SATA_I_HC_R00_STATUS_BRIDGE_PORT_OFFSET(port);
+    }
+    else
+    {
+        if (pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II)
+        {
+            SStatusOffset = getEdmaRegOffset(channelIndex) +
+                            MV_SATA_II_S_STATUS_REG_OFFSET;
+        }
+        else
+        {
+            return MV_TRUE;
+        }
+    }
+    SStatus = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                SStatusOffset);
+    SStatus &= (MV_BIT0 | MV_BIT1);
+    if ((SStatus == (MV_BIT0 | MV_BIT1)) || (SStatus == 0))
+    {
+        return MV_TRUE;
+    }
+    else
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: in Channel Hard "
+                 "Reset SATA communication not established.\n",
+                 pAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+    }
+}
+
+
+/*******************************************************************************
+* mvSataChannelHardReset - issue channel SATA HARD reset.
+*
+* DESCRIPTION:
+*   perform HARDWARE RESET to the connected device by asserting the RESET
+*   signal, this is done by setting the hardware reset bit of the EDMA
+*   command register
+*
+* INPUT:
+*   pAdapter    - pointer to the device data structure.
+*   channelIndex    - index of the required channel
+*
+* RETURN:
+*   MV_TRUE on success, MV_FALSE otherwise.
+* COMMENTS:
+*   NONE
+*
+*******************************************************************************/
+MV_BOOLEAN mvSataChannelHardReset(MV_SATA_ADAPTER *pAdapter,
+                                  MV_U8 channelIndex)
+{
+    MV_SATA_CHANNEL *pSataChannel;
+    MV_BUS_ADDR_T   ioBaseAddr;
+    MV_U32      count = 0;
+
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    : mvSataChannelHardReset"
+                 " Failed, Bad adapter data structure pointer\n");
+        return MV_FALSE;
+    }
+    pSataChannel = pAdapter->sataChannel[channelIndex];
+    ioBaseAddr = pAdapter->adapterIoBaseAddress;
+    if (pSataChannel == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d: "
+                 "mvSataChannelHardReset Failed, channel data structure not "
+                 "allocated\n", pAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+    }
+  if(pSataChannel)
+	 mvOsSemTake(&pSataChannel->semaphore);
+
+    if (pSataChannel && pSataChannel->queueCommandsEnabled == MV_TRUE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d: Error:\
+                 mvSataIChannelHardReset called while EDMA is active\n",
+                 pAdapter->adapterId,channelIndex);
+        mvOsSemRelease( &pSataChannel->semaphore);
+        return MV_FALSE;
+    }
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: Issue HRST\n", pAdapter->adapterId,
+             channelIndex);
+
+
+    _channelHardReset(pAdapter, channelIndex);
+    _resetBmDma(pAdapter, channelIndex);
+    if ((pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II) &&
+        (pAdapter->staggaredSpinup[channelIndex] == MV_FALSE))
+    {
+	 if(pSataChannel)
+	      mvOsSemRelease( &pSataChannel->semaphore);
+        return MV_TRUE;
+    }
+    if (pAdapter->sataAdapterGeneration == MV_SATA_GEN_I)
+    {
+        while (1)
+        {
+            _establishSataComm(pAdapter, channelIndex);
+
+            /* try the DET fix 3 times */
+            if (_checkSStatusAfterHReset(pAdapter, channelIndex) == MV_FALSE)
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: in Channel Hard "
+                         "Reset storage drive is not ready, try fix #%d\n",
+                         pAdapter->adapterId, channelIndex, count);
+
+                count++;
+                if (count == 3)
+                {
+                    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: in Channel H"
+                             "ard Reset storage drive is not ready after 3 tries\n",
+                             pAdapter->adapterId, channelIndex);
+                    if(pSataChannel)
+			 mvOsSemRelease( &pSataChannel->semaphore);
+                    return MV_FALSE;
+                }
+            }
+            else
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_SATA_LINK, " %d %d: Disk is Ready After"
+                         " Hard Reset\n", pAdapter->adapterId, channelIndex);
+                break;
+            }
+        }
+    }
+
+    if (pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II)
+    {
+        _establishSataComm(pAdapter, channelIndex);
+    }
+    if(pSataChannel)
+	 mvOsSemRelease( &pSataChannel->semaphore);
+    return MV_TRUE;
+}
+/*******************************************************************************
+* mvSataSetFBSMode - set FIS based switching mode.
+*
+* DESCRIPTION:
+*
+* INPUT:
+*   pAdapter    - pointer to the adapter data structure.
+*   channelIndex    - index of the required channel
+*   enableFBS    -  if true then enable FBS mode.
+*   useQueueLen128 - if true then enable the 128 EDMA queue length.
+*
+* RETURN:
+*   MV_FALSE if
+*   1. the FBS feature set to be enable for an adapter that doesn't support this
+*      feature, or:
+*   2. the function called while EDMA is enabled.
+*   3. useQueueLen128 is true and enableFBS is false.
+*
+* COMMENTS:
+*   This function only sets the sw configuration, the harware is configured
+*   accordingly by mvSataConfigEdmaMode()
+*******************************************************************************/
+MV_BOOLEAN mvSataSetFBSMode(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex,
+                            MV_BOOLEAN enableFBS, MV_BOOLEAN useQueueLen128)
+{
+    MV_SATA_CHANNEL  *pSataChannel;
+
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    : mvSataSetFBSMode"
+                 " Failed, Bad adapter data structure pointer\n");
+        return MV_FALSE;
+    }
+    pSataChannel = pAdapter->sataChannel[channelIndex];
+    if (pSataChannel == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d: mvSataSetFBSMode"
+                 " Failed, channel data structure not allocated\n",
+                 pAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+    }
+
+    mvOsSemTake(&pSataChannel->semaphore);
+
+    if (pSataChannel->queueCommandsEnabled == MV_TRUE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                 " %d %d: mvSataSetFBSMode failed, EDMA is enabled\n",
+                 pAdapter->adapterId, channelIndex);
+        mvOsSemRelease(&pSataChannel->semaphore);
+        return MV_FALSE;
+    }
+    if (enableFBS == MV_FALSE)
+    {
+        pSataChannel->FBSEnabled = MV_FALSE;
+        pSataChannel->use128Entries = MV_FALSE;
+        mvOsSemRelease(&pSataChannel->semaphore);
+        if (useQueueLen128 == MV_TRUE)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                     " %d %d: mvSataSetFBSMode failed, 128 entries queue len is set"
+                     "while FBS mode is disabled\n",
+                     pAdapter->adapterId, channelIndex);
+            return MV_FALSE;
+        }
+        return MV_TRUE;
+    }
+
+    if (pAdapter->sataAdapterGeneration < MV_SATA_GEN_IIE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR," %d %d: mvSataSetFBSMode failed,"
+                 " Feature not supported by the adapter\n",
+                 pAdapter->adapterId, channelIndex);
+        pSataChannel->FBSEnabled = MV_FALSE;
+        mvOsSemRelease(&pSataChannel->semaphore);
+        return MV_FALSE;
+    }
+    pSataChannel->FBSEnabled = MV_TRUE;
+    pSataChannel->use128Entries = useQueueLen128;
+    mvOsSemRelease(&pSataChannel->semaphore);
+    return MV_TRUE;
+}
+
+/*******************************************************************************
+* mvSataConfigEdmaMode - set EDMA operating mode.
+*
+* DESCRIPTION:
+*   Set the EDMA operating mode - MV_EDMA_MODE_NOT_QUEUED,
+*   MV_EDMA_MODE_QUEUED or MV_EDMA_MODE_NATIVE_QUEUING.
+*   When set toe MV_EDMA_MODE_QUEUED or MV_EDMA_MODE_NATIVE_QUEUING then
+*   the maxQueueDepth should be valud.
+*
+* INPUT:
+*   pAdapter    - pointer to the adapter data structure.
+*   channelIndex    - index of the required channel
+*   eDmaMode    - the selected mode
+*   maxQueueDepth   - the maximum depth of the queue
+*
+* RETURN:
+*   MV_TRUE on success, MV_FALSE otherwise.
+*
+* COMMENTS:
+*   None.
+*
+*******************************************************************************/
+MV_BOOLEAN mvSataConfigEdmaMode(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex,
+                                MV_EDMA_MODE eDmaMode, MV_U8 maxQueueDepth)
+{
+    MV_SATA_CHANNEL  *pSataChannel;
+    MV_BUS_ADDR_T  ioBaseAddr;
+    MV_U32 eDmaRegsOffset;
+    MV_U32     val;
+
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    : mvSataConfigEdmaMode"
+                 " Failed, Bad adapter data structure pointer\n");
+        return MV_FALSE;
+    }
+    pSataChannel = pAdapter->sataChannel[channelIndex];
+    if (pSataChannel == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d: mvSataConfigEdmaMode"
+                 " Failed, channel data structure not allocated\n",
+                 pAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+    }
+    ioBaseAddr = pAdapter->adapterIoBaseAddress;
+    mvOsSemTake(&pSataChannel->semaphore);
+    eDmaRegsOffset = pSataChannel->eDmaRegsOffset;
+
+    if (pSataChannel->queueCommandsEnabled == MV_TRUE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR," %d %d: mvSataConfigEdmaMode failed,"
+                 " EDMA is enabled\n", pAdapter->adapterId, channelIndex);
+        mvOsSemRelease(&pSataChannel->semaphore);
+        return MV_FALSE;
+    }
+
+    val = MV_REG_READ_DWORD(ioBaseAddr, eDmaRegsOffset +
+                            MV_EDMA_CONFIG_REG_OFFSET);
+    if (eDmaMode == MV_EDMA_MODE_NATIVE_QUEUING)
+    {
+        if ((maxQueueDepth > MV_EDMA_QUEUE_LENGTH) ||  (maxQueueDepth == 0))
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR," %d %d: mvSataConfigEdmaMode "
+                     "failed, Bad queue depth(%d)\n", pAdapter->adapterId,
+                     channelIndex, maxQueueDepth);
+            mvOsSemRelease(&pSataChannel->semaphore);
+            return MV_FALSE;
+        }
+        if (pAdapter->sataAdapterGeneration < MV_SATA_GEN_II)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d: Trying to configure "
+                     "EDMA to NCQ on a non NCQ enabled EDMA\n",
+                     pAdapter->adapterId, channelIndex);
+            mvOsSemRelease(&pSataChannel->semaphore);
+            return MV_FALSE;
+        }
+        val &= ~MV_EDMA_CONFIG_Q_DEPTH_MASK; /* clear queue depth */
+        /* set the NCQ enable mode bit, and the queue depth bits*/
+        val |= MV_EDMA_CONFIG_NATIVE_QUEUING_MASK | (maxQueueDepth - 1);
+    }
+    if (eDmaMode == MV_EDMA_MODE_QUEUED)
+    {
+        if ((maxQueueDepth > MV_EDMA_QUEUE_LENGTH) ||  (maxQueueDepth == 0))
+        {
+            mvOsSemRelease(&pSataChannel->semaphore);
+            return MV_FALSE;
+        }
+        val &= ~MV_EDMA_CONFIG_Q_DEPTH_MASK; /* clear queue depth */
+        val &= ~MV_EDMA_CONFIG_NATIVE_QUEUING_MASK; /* clear NCQ mode*/
+        /* set the queue enable mode bit, and the queue depth bits*/
+        val |= MV_EDMA_CONFIG_EQUEUE_ENABLED_MASK | (maxQueueDepth - 1);
+    }
+
+    if (eDmaMode == MV_EDMA_MODE_NOT_QUEUED)
+    {
+        val &= ~MV_EDMA_CONFIG_Q_DEPTH_MASK; /* clear queue depth */
+        val &= ~MV_EDMA_CONFIG_NATIVE_QUEUING_MASK; /* clear NCQ mode*/
+        val &= ~MV_EDMA_CONFIG_EQUEUE_ENABLED_MASK;
+    }
+    pSataChannel->queuedDMA = eDmaMode;
+
+    if (pAdapter->sataAdapterGeneration == MV_SATA_GEN_I)
+    {
+        val |= MV_EDMA_CONFIG_BURST_SIZE_MASK;
+    }
+    if ((pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II)
+        && (pAdapter->hostInterface != MV_HOST_IF_INTEGRATED))
+
+    {
+        val |= (MV_EDMA_CONFIG_BURST_SIZE_EXT_MASK | MV_BIT13);
+    }
+
+
+    if (pAdapter->sataAdapterGeneration == MV_SATA_GEN_IIE)
+    {
+        /* disable RX PM port mask, required for PM*/
+        val |= MV_BIT23;
+
+        if (pSataChannel->FBSEnabled == MV_TRUE)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG,
+                     " %d %d: Enable FBS feature\n",
+                     pAdapter->adapterId, channelIndex);
+/*            val |= MV_BIT16;*/
+            /* Set bit 16 at FISDMAActiveSyncResp */
+            _setRegBits(ioBaseAddr, pSataChannel->eDmaRegsOffset + 
+                        MV_EDMA_FIS_CONFIGURATION_REG_OFFSET, MV_BIT16);
+            /* Set bit 8 at SingleSync */
+            _setRegBits(ioBaseAddr, pSataChannel->eDmaRegsOffset + 0x30C, MV_BIT8);
+        }
+        else
+        {
+            val &= ~MV_BIT16;
+        }
+
+        if (pSataChannel->use128Entries == MV_TRUE)
+        {
+            val |= MV_BIT19;
+            pSataChannel->EDMAQueuePtrMask = MV_EDMA_GEN2E_QUEUE_MASK;
+            pSataChannel->EDMARequestInpMask = MV_EDMA_GEN2E_REQUEST_Q_INP_MASK;
+        }
+        else
+        {
+            val &= ~MV_BIT19;
+            pSataChannel->EDMAQueuePtrMask = MV_EDMA_QUEUE_MASK;
+            pSataChannel->EDMARequestInpMask = MV_EDMA_REQUEST_Q_INP_MASK;
+        }
+        if(pAdapter->hostInterface != MV_HOST_IF_INTEGRATED)
+        {
+            /*enable cutthrough*/
+            val |= MV_BIT17;
+#ifdef MV_SUPPORT_ATAPI
+            /*enable early completion*/
+            val |= MV_BIT18;
+#endif
+        }
+        /*enable host queue cache*/
+        val |= MV_BIT22;
+        
+        if (pAdapter->hostInterface == MV_HOST_IF_PCI)
+        {
+            MV_U32 pciMode = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                               MV_PCI_REGS_OFFSET +
+                                               MV_PCI_MODE_REG_OFFSET);
+
+            if (getRegField(pciMode, MV_PCI_MODE_OFFSET, 2) == 0) /* PCI*/
+            {
+                if (MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                      MV_PCI_REGS_OFFSET +
+                                      MV_PCI_COMMAND_REG_OFFSET) & MV_BIT7)
+                {
+                    /*in this case disable cut through*/
+                    val &= ~MV_BIT17;
+                }
+            }
+        }
+    }
+    /* by defualt, the tags data srutcure initialized in mvSataConfigureChannel*/
+    /* for 32 host commands, so we call it again since use128Entries could be */
+    /* changed */
+    initChannelTags(pSataChannel);
+    MV_REG_WRITE_DWORD(ioBaseAddr, eDmaRegsOffset + MV_EDMA_CONFIG_REG_OFFSET,
+                       val);
+    setupEdmaDeviceErrorHandlingConfiguration(pSataChannel);
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG," %d %d: Edma Configuration Reg Value: 0x%08x\n",
+             pAdapter->adapterId, channelIndex,
+             MV_REG_READ_DWORD(ioBaseAddr, eDmaRegsOffset +
+                               MV_EDMA_CONFIG_REG_OFFSET));
+
+    mvOsSemRelease(&pSataChannel->semaphore);
+    return MV_TRUE;
+}
+
+/*******************************************************************************
+* mvSataEnableChannelDma - enable EDMA engine
+*
+* DESCRIPTION:
+*   enable the EDMA engine for the given channel
+*
+* INPUT:
+*   pAdapter    - pointer to the adapter data structure.
+*   channelIndex    - index of the required channel
+*
+* RETURN:
+*   MV_TRUE on success, MV_FALSE otherwise.
+* COMMENTS:
+*   NONE
+*
+*******************************************************************************/
+MV_BOOLEAN mvSataEnableChannelDma(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex)
+{
+    MV_SATA_CHANNEL  *pSataChannel;
+    MV_BUS_ADDR_T   ioBaseAddr;
+
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    : mvSataEnableChannelDma"
+                 " Failed, Bad adapter data structure pointer\n");
+        return MV_FALSE;
+    }
+    ioBaseAddr = pAdapter->adapterIoBaseAddress;
+    pSataChannel = pAdapter->sataChannel[channelIndex];
+    if (pSataChannel == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d: mvSataEnableChannelD"
+                 "ma Failed, channel data structure not allocated\n",
+                 pAdapter->adapterId, channelIndex );
+        return MV_FALSE;
+    }
+    mvOsSemTake(&pSataChannel->semaphore);
+
+    if (pSataChannel->queueCommandsEnabled == MV_TRUE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: mvSataEnableChannelDma "
+                 "failed, DMA is enabled\n", pAdapter->adapterId, channelIndex);
+        mvOsSemRelease(&pSataChannel->semaphore);
+        return MV_FALSE;
+    }
+#ifdef MV_SATA_C2C_COMM
+    /* C2C */
+    if (pSataChannel->C2CmodeEnabled == MV_TRUE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: mvSataEnableChannelDma "
+                 "failed, C2C mode is enabled\n", pAdapter->adapterId,
+                 channelIndex);
+        mvOsSemRelease(&pSataChannel->semaphore);
+        return MV_FALSE;
+    }
+#endif
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " %d %d: mvSataEnableChannelDma\n",
+             pAdapter->adapterId, channelIndex);
+    pSataChannel->queueCommandsEnabled = MV_TRUE;
+    activateEdma(pAdapter,channelIndex);
+
+    mvOsSemRelease(&pSataChannel->semaphore);
+    return MV_TRUE;
+}
+
+/*******************************************************************************
+* mvSataDisableChannelDma - disable EDMA engine
+*
+* DESCRIPTION:
+*   disable the EDMA engine for the given channel
+*
+* INPUT:
+*   pAdapter    - pointer to the adapter data structure.
+*   channelIndex    - index of the required channel
+*
+* RETURN:
+*   MV_TRUE on success, MV_FALSE otherwise.
+* COMMENTS:
+*   NONE
+*
+*******************************************************************************/
+MV_BOOLEAN mvSataDisableChannelDma(MV_SATA_ADAPTER *pAdapter,
+                                   MV_U8 channelIndex)
+{
+    MV_BUS_ADDR_T   ioBaseAddr;
+
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    : mvSataDisableChannelDma"
+                 " Failed, Bad adapter data structure pointer\n");
+        return MV_FALSE;
+    }
+    ioBaseAddr = pAdapter->adapterIoBaseAddress;
+    if (pAdapter->sataChannel[channelIndex] == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d: mvSataDisableChannel"
+                 "Dma Failed, channel data structure is not allocated\n",
+                 pAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+    }
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " %d %d: mvSataDisableChannel\n",
+             pAdapter->adapterId, channelIndex);
+    /* if this function called while commands still not finished, then it's */
+    /* probably timeout*/
+    if (pAdapter->sataChannel[channelIndex]->outstandingCommands)
+    {
+        _dumpSataRegs(pAdapter, channelIndex);
+        _dumpEDMARegs(pAdapter, channelIndex);
+        _dumpChannelQueues(pAdapter, channelIndex);
+    }
+
+    mvOsSemTake(&pAdapter->sataChannel[channelIndex]->semaphore);
+    pAdapter->sataChannel[channelIndex]->queueCommandsEnabled = MV_FALSE;
+    deactivateEdma(pAdapter,channelIndex);
+    mvOsSemRelease(&pAdapter->sataChannel[channelIndex]->semaphore);
+    return MV_TRUE;
+}
+
+/*******************************************************************************
+* mvSataFlushDmaQueue - flush the outstanding UDMA commands
+*
+* DESCRIPTION:
+*   flush posted UDMA ATA commands on a certain MV88SX50XX SATA channel. if
+*   the flush type is MV_FLUSH_TYPE_CALLBACK then all call back functions of
+*   the UDMA commands are called with a flush indication.
+*
+* INPUT:
+*   pAdapter    - pointer to the adapter data structure.
+*   channelIndex    - index of the required channel
+*   flushType   - indicates wheather to call the callBack function or not.
+*
+* RETURN:
+*   MV_TRUE on success, MV_FALSE otherwise.
+* COMMENTS:
+*   NONE
+*
+*******************************************************************************/
+MV_BOOLEAN mvSataFlushDmaQueue(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex,
+                               MV_FLUSH_TYPE flushType)
+{
+    MV_SATA_CHANNEL *pSataChannel;
+
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    : mvSataFlushDmaQueue"
+                 " Failed, Bad adapter data structure pointer\n");
+        return MV_FALSE;
+    }
+    pSataChannel = pAdapter->sataChannel[channelIndex];
+    if (pSataChannel == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d: mvSataFlushDmaQueue "
+                 "Failed, channel data structure not allocated\n",
+                 pAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+    }
+    mvOsSemTake(&pSataChannel->semaphore);
+    if (pSataChannel->queueCommandsEnabled == MV_TRUE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: mvSataFlushDmaQueue "
+                 "Failed, EDMA not disabled\n",
+                 pAdapter->adapterId, channelIndex);
+        mvOsSemRelease(&pSataChannel->semaphore);
+        return MV_FALSE;
+    }
+    flushDmaQueue(pSataChannel, flushType, MV_COMPLETION_TYPE_ABORT, 0);
+    resetEdmaChannel(pSataChannel);
+    mvOsSemRelease(&pSataChannel->semaphore);
+    return MV_TRUE;
+}
+
+/*******************************************************************************
+* mvSataNumOfDmaCommands - get the number of the outstanding commmands for the
+*                           given channel
+*
+* DESCRIPTION:
+*   return the number of posted ATA commands on an EDMA engine for a
+*   specific SATA channel.
+*
+* INPUT:
+*   pAdapter    - pointer to the adapter data structure.
+*   channelIndex    - index of the required channel
+*
+* RETURN:
+*   num of queue commands.
+* COMMENTS:
+*   NONE
+*
+*******************************************************************************/
+MV_U8 mvSataNumOfDmaCommands(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex)
+{
+    MV_SATA_CHANNEL *pSataChannel;
+    MV_U8           result;
+
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    : mvSataNumOfDmaCommands"
+                 " Failed, Bad adapter data structure pointer\n");
+        return 0xFF;
+    }
+    pSataChannel = pAdapter->sataChannel[channelIndex];
+    if (pSataChannel == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d: mvSataNumOfDmaComman"
+                 "ds Failed, channel data structure not allocated\n",
+                 pAdapter->adapterId, channelIndex);
+        return 0xFF;
+    }
+    mvOsSemTake(&pSataChannel->semaphore);
+    result = pSataChannel->outstandingCommands;
+    mvOsSemRelease(&pSataChannel->semaphore);
+
+    return result;
+}
+/*******************************************************************************
+* mvSataGetNumOfPortQueuedCommands - get the number of the outstanding commmands for
+*                               the given port
+*
+* DESCRIPTION:
+*   return the number of posted ATA commands on an EDMA engine for a
+*   specific SATA port.
+*
+* INPUT:
+*   pAdapter    - pointer to the adapter data structure.
+*   channelIndex    - index of the required channel
+*   PMPort      - port number
+*   pCommandsPerChannel - if not null, gets the total number of outstanding
+*                   command for the given channel
+*
+* RETURN:
+*   num of queue commands, 0xFF if error detected.
+* COMMENTS:
+*
+*
+*******************************************************************************/
+MV_U8 mvSataGetNumOfPortQueuedCommands(MV_SATA_ADAPTER *pAdapter,
+                                       MV_U8 channelIndex,
+                                       MV_U8 PMPort,
+                                       MV_U8 *pCommandsPerChannel)
+{
+    MV_SATA_CHANNEL *pSataChannel;
+    MV_U8           result;
+
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    : mvSataGetNumOfPortQueuedCommands"
+                 " Failed, Bad adapter data structure pointer\n");
+        return 0xFF;
+    }
+    pSataChannel = pAdapter->sataChannel[channelIndex];
+    if (pSataChannel == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d %d: mvSataGetNumOfPortQueuedCommands"
+                 "ds Failed, channel data structure not allocated\n",
+                 pAdapter->adapterId, channelIndex, PMPort);
+        return 0xFF;
+    }
+    if (PMPort > MV_SATA_PM_MAX_PORTS)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d %d: mvSataGetNumOfPortQueuedCommands"
+                 "ds Failed, non valid port\n",
+                 pAdapter->adapterId, channelIndex, PMPort);
+        return 0xFF;
+    }
+    mvOsSemTake(&pSataChannel->semaphore);
+    result = pSataChannel->portQueuedCommands[PMPort];
+    if (pCommandsPerChannel)
+    {
+        *pCommandsPerChannel = pSataChannel->outstandingCommands;
+    }
+    mvOsSemRelease(&pSataChannel->semaphore);
+
+    return result;
+}
+
+/*******************************************************************************
+* mvSataSetIntCoalParams - update the interrupt Coalescing registers
+*
+* DESCRIPTION:  Sets the interrupt coalescing for a specific SATA unit
+*               (each SATA unit contains quad SATA channels).
+*
+* INPUT:
+*   pAdapter - pointer to the adapter data structure.
+*   sataUnit - which SATA unit to be changed (0xff for all SATA ports)
+*   intCoalThre - the value to be written to the Coalescing threshold register
+*   intTimeThre - the value to be written to the Time threshold register
+*
+* OUTPUT:
+*   None.
+* RETURN:
+*   MV_TRUE
+* COMMENTS:
+*   None.
+*
+*******************************************************************************/
+MV_BOOLEAN mvSataSetIntCoalParams (MV_SATA_ADAPTER *pAdapter, MV_U8 sataUnit,
+                                   MV_U32 intCoalThre, MV_U32 intTimeThre)
+{
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    : mvSataSetIntCoalParams"
+                 " Failed, Bad adapter data structure pointer\n");
+        return MV_FALSE;
+    }
+
+    if ((sataUnit != 0) && (sataUnit != 1) && (sataUnit != 0xff))
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d  : %d Bad"
+                 " unit number\n", pAdapter->adapterId, sataUnit);
+        return MV_FALSE;
+    }
+
+    mvOsSemTake(&pAdapter->semaphore);
+    if (sataUnit == 0xff)
+    {
+        if ((pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II) &&
+            (pAdapter->hostInterface != MV_HOST_IF_INTEGRATED))
+        {
+            MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                               MV_SATA_II_ALL_PORTS_INT_COAL_CMND_THR_REG_OFFSET,
+                               intCoalThre);
+
+            pAdapter->intCoalThre[0] = intCoalThre;
+            pAdapter->intCoalThre[1] = intCoalThre;
+            MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                               MV_SATA_II_ALL_PORTS_INT_COAL_TIME_THR_REG_OFFSET,
+                               intTimeThre);
+            pAdapter->intTimeThre[0] = intTimeThre;
+            pAdapter->intTimeThre[1] = intTimeThre;
+            pAdapter->mainMask |= MV_BIT21;
+            pAdapter->mainMask &= ~(MV_BIT17 | MV_BIT8);
+        }
+        else
+        {
+            MV_U8 count;
+            for (count = 0 ; count < pAdapter->numberOfUnits ; count ++)
+            {
+                MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                                   MV_SATAHC_REGS_BASE_OFFSET(count) +
+                                   MV_SATAHC_INT_COAL_THRE_REG_OFFSET,
+                                   intCoalThre);
+
+                pAdapter->intCoalThre[count] = intCoalThre;
+                MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                                   MV_SATAHC_REGS_BASE_OFFSET(count) +
+                                   MV_SATAHC_INT_TIME_THRE_REG_OFFSET,
+                                   intTimeThre);
+                pAdapter->intTimeThre[count] = intTimeThre;
+            }
+        }
+    }
+    else
+    {
+        MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                           MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                           MV_SATAHC_INT_COAL_THRE_REG_OFFSET,
+                           intCoalThre);
+
+        pAdapter->intCoalThre[sataUnit] = intCoalThre;
+        MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                           MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                           MV_SATAHC_INT_TIME_THRE_REG_OFFSET,
+                           intTimeThre);
+        pAdapter->intTimeThre[sataUnit] = intTimeThre;
+        if (pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II)
+        {
+            pAdapter->mainMask |= (MV_BIT17 | MV_BIT8);
+            pAdapter->mainMask &= ~MV_BIT21;
+        }
+    }
+    if (pAdapter->interruptsAreMasked == MV_FALSE)
+    {
+        MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                           pAdapter->mainMaskOffset,
+                           pAdapter->mainMask);
+
+        MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                          pAdapter->mainMaskOffset);
+
+    }
+    mvOsSemRelease(&pAdapter->semaphore);
+
+    return MV_TRUE;
+}
+
+/*******************************************************************************
+* mvSataSetChannelPhyParams - update the channel's Sata Phy params
+*
+* DESCRIPTION: This functoin changes the Sata Phy params such as the AMP and
+*       PRE by updating the PHY Mode register.
+*
+* INPUT:
+*   pAdapter    - pointer to the adapter data structure.
+*   channelIndex- index of the Edma channel number.
+*   signalAmps  - three bits value to be written to the Phy Mode register at
+*                   bits[7:5]
+*   pre         - two bits value to be written to the Phy Mode register at
+*                   bits[12:11]
+*
+* OUTPUT:
+*   None.
+*
+* RETURN:
+*   MV_TRUE on success, MV_FASLE otherwisw
+*
+*
+*******************************************************************************/
+MV_BOOLEAN mvSataSetChannelPhyParams(MV_SATA_ADAPTER *pAdapter,
+                                     MV_U8 channelIndex,
+                                     MV_U8 signalAmps, MV_U8 pre)
+{
+    MV_U32          regAddr;
+    MV_U32          val;
+    MV_U8       port = channelIndex & (MV_BIT0 | MV_BIT1);
+    MV_U8       unit = (channelIndex & MV_BIT2) >> 2;
+
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "  : mvSataSetChannelPhyParam"
+                 "s Failed, Bad adapter data structure pointer\n");
+        return MV_FALSE;
+    }
+
+    if ((pAdapter->chipIs62X1Z0 == MV_TRUE) || (pAdapter->chipIs65XXZ0 == MV_TRUE))
+    {
+	 mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "%d  : mvSataSetChannelPhyPara\
+m"
+		  "s Failed, This function not supported for this adapter\n",
+	      pAdapter->adapterId);
+	 return MV_FALSE;
+    }
+    if (pAdapter->sataAdapterGeneration == MV_SATA_GEN_I)
+    {
+        if ((signalAmps & 0xf8) || (pre & 0xfc))
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: "
+                     "mvSataSetChannelPhyParams Failed. Bad params\n",
+                     pAdapter->adapterId, channelIndex);
+            return MV_FALSE;
+        }
+
+        regAddr = MV_SATAHC_REGS_BASE_OFFSET(unit) +
+                  MV_SATA_I_HC_PHY_MODE_BRIDGE_PORT_REG_OFFSET(port);
+
+        val = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress, regAddr);
+
+        val &= ~MV_SATA_I_PHY_MODE_AMP_MASK;
+        val |= (signalAmps << MV_SATA_I_PHY_MODE_AMP_OFFSET) &
+               MV_SATA_I_PHY_MODE_AMP_MASK;
+
+        val &= ~MV_SATA_I_PHY_MODE_PRE_MASK;
+        val |= (pre << MV_SATA_I_PHY_MODE_PRE_OFFSET) &
+               MV_SATA_I_PHY_MODE_PRE_MASK;
+        MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress, regAddr, val);
+        pAdapter->pre[channelIndex] = pre;
+        pAdapter->signalAmps[channelIndex] = signalAmps;
+    }
+
+    if (pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II)
+    {
+        if ((signalAmps & 0xf8) || (pre & 0xf8))
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: "
+                     "mvSataSetChannelPhyParams Failed. Bad params\n",
+                     pAdapter->adapterId, channelIndex);
+            return MV_FALSE;
+        }
+
+
+        pAdapter->pre[channelIndex] = pre;
+        pAdapter->signalAmps[channelIndex] = signalAmps;
+        regAddr = getEdmaRegOffset(channelIndex) +
+                  MV_SATA_II_PHY_MODE_2_REG_OFFSET;
+        val = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress, regAddr);
+
+        val &= ~MV_SATA_II_PHY_MODE_2_AMP_MASK;
+        val |= (signalAmps << MV_SATA_II_PHY_MODE_2_AMP_OFFSET) &
+               MV_SATA_II_PHY_MODE_2_AMP_MASK;
+        val &= ~MV_SATA_II_PHY_MODE_2_PRE_MASK;
+        val |= (pre << MV_SATA_II_PHY_MODE_2_PRE_OFFSET) &
+               MV_SATA_II_PHY_MODE_2_PRE_MASK;
+        val &= ~MV_BIT16;
+        MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress, regAddr, val);
+    }
+
+    return MV_TRUE;
+}
+/*******************************************************************************
+* mvSataChannelPhyShutdown -
+*
+* DESCRIPTION: Shutdown the sata Phy of the given channel.
+*
+* INPUT:
+*   pAdapter    - pointer to the adapter data structure.
+*   channelIndex    - index of the required channel
+*
+* RETURN:
+*   MV_TRUE on success, MV_FALSE otherwise
+*
+* COMMENTS:
+*   After shutdown no connect / disconnect indication will be available.
+*
+*******************************************************************************/
+
+MV_BOOLEAN mvSataChannelPhyShutdown(MV_SATA_ADAPTER *pAdapter,
+                                    MV_U8 channelIndex)
+{
+    MV_U32      regVal;
+    MV_U8       port = channelIndex & (MV_BIT0 | MV_BIT1);
+    MV_U8       sataUnit = (channelIndex & MV_BIT2) >> 2;
+
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "  : mvSataChannelPhyShutdown"
+                 " Failed, Bad adapter data structure pointer\n");
+        return MV_FALSE;
+    }
+    if (pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II)
+    {
+        regVal = MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress,
+                                    getEdmaRegOffset (channelIndex) +
+                                    MV_SATA_II_SATA_CONFIG_REG_OFFSET);
+        /* Fix for 88SX60x1 FEr SATA#8*/
+        /* according to the spec, bits [31:12] must be set to 0x009B1 */
+        regVal &= 0x00000FFF;
+        /* regVal |= MV_BIT12;*/
+        regVal |= 0x009B1000;
+
+        regVal |=  MV_BIT9;
+        MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                            getEdmaRegOffset (channelIndex) +
+                            MV_SATA_II_SATA_CONFIG_REG_OFFSET,
+                            regVal);
+        return MV_TRUE;
+    }
+    regVal = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                               MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                               MV_SATA_I_HC_BRIDGES_TEST_CONTROL_REG_OFFSET);
+    regVal |=  MV_SATA_I_TEST_CONTROL_PHY_SHUTDOWN_MASK(port);
+
+    MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                       MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                       MV_SATA_I_HC_BRIDGES_TEST_CONTROL_REG_OFFSET, regVal);
+    MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                      MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                      MV_SATA_I_HC_BRIDGES_TEST_CONTROL_REG_OFFSET);
+    return MV_TRUE;
+}
+/*******************************************************************************
+* mvSataChannelPhyPowerOn -
+*
+* DESCRIPTION: power on the sata Phy of the given channel.
+*
+* INPUT:
+*   pAdapter    - pointer to the adapter data structure.
+*   channelIndex    - index of the required channel
+*
+* RETURN:
+*   MV_TRUE on success, MV_FALSE otherwise
+*
+* COMMENTS:
+*   None.
+*
+*******************************************************************************/
+
+MV_BOOLEAN mvSataChannelPhyPowerOn(MV_SATA_ADAPTER *pAdapter,
+                                   MV_U8 channelIndex)
+{
+    MV_U32      regVal;
+    MV_U8       port = channelIndex & (MV_BIT0 | MV_BIT1);
+    MV_U8       sataUnit = (channelIndex & MV_BIT2) >> 2;
+
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "  : mvSataChannelPhyPowerOn"
+                 " Failed, Bad adapter data structure pointer\n");
+        return MV_FALSE;
+    }
+    if (pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II)
+    {
+        regVal = MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress,
+                                    getEdmaRegOffset (channelIndex) +
+                                    MV_SATA_II_SATA_CONFIG_REG_OFFSET);
+        /* Fix for 88SX60x1 FEr SATA#8*/
+        /* according to the spec, bits [31:12] must be set to 0x009B1 */
+        regVal &= 0x00000FFF;
+        /* regVal |= MV_BIT12;*/
+        regVal |= 0x009B1000;
+
+
+        regVal &= ~(MV_BIT9);
+        MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                            getEdmaRegOffset (channelIndex) +
+                            MV_SATA_II_SATA_CONFIG_REG_OFFSET,
+                            regVal);
+        _channelHardReset(pAdapter, channelIndex);
+        return MV_TRUE;
+    }
+    _fixPhyParams(pAdapter, channelIndex);
+    regVal = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                               MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                               MV_SATA_I_HC_BRIDGES_TEST_CONTROL_REG_OFFSET);
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "  : %d %d %d mvSataChannelPhyPowerOn"
+             " reg[%x] = 0x%x -> 0x%x\n", pAdapter->adapterId, sataUnit, port,
+             MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+             MV_SATA_I_HC_BRIDGES_TEST_CONTROL_REG_OFFSET, regVal,
+             regVal & ~(MV_SATA_I_TEST_CONTROL_PHY_SHUTDOWN_MASK(port)));
+    regVal &=  ~(MV_SATA_I_TEST_CONTROL_PHY_SHUTDOWN_MASK(port));
+
+    MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                       MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                       MV_SATA_I_HC_BRIDGES_TEST_CONTROL_REG_OFFSET, regVal);
+    MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                      MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                      MV_SATA_I_HC_BRIDGES_TEST_CONTROL_REG_OFFSET);{
+        MV_U32 temp = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                        MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                                        MV_SATA_I_HC_R02_STATUS_BRIDGE_PORT_OFFSET(port));
+        temp &= ~0xf;
+        temp |= MV_BIT0;
+        MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                           MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                           MV_SATA_I_HC_R02_STATUS_BRIDGE_PORT_OFFSET(port), temp);
+    }
+    _fixPhyParams(pAdapter, channelIndex);
+    return MV_TRUE;
+}
+
+/*******************************************************************************
+* mvSataChannelFarLoopbackDiagnostic - do far end loopback
+*
+* DESCRIPTION: operate the far-end LB mode on the bridge
+*
+* INPUT:
+*   pAdapter    - pointer to the adapter data structure.
+*   channelIndex    - index of the required channel
+*
+* OUTPUT:
+*   None.
+* RETURN:
+*   MV_TRUE on success, MV_FALSE otherwise
+* COMMENTS:
+*   None.
+*******************************************************************************/
+
+MV_BOOLEAN mvSataChannelFarLoopbackDiagnostic(MV_SATA_ADAPTER *pAdapter,
+                                              MV_U8 channelIndex)
+{
+    MV_U8   sataUnit = (channelIndex & MV_BIT2) >> 2;
+    MV_U8   port = channelIndex & (MV_BIT0 | MV_BIT1);
+    MV_U32  regVal = 0, temp;
+    MV_U32  tryCount, pollCount;
+    MV_BOOLEAN  result = MV_TRUE;
+
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "  : mvSataChannelFarLoopback"
+                 "Diagnostic Failed, Bad adapter data structure pointer\n");
+        return MV_FALSE;
+    }
+
+    if (pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II)
+    {
+        /* TODO - Add support for far end loopback */
+        return MV_TRUE;
+    }
+
+    for (tryCount = 0; tryCount < 5; tryCount++)
+    {
+
+        /* Set Far-end loopback */
+        MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                           MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                           MV_SATA_I_HC_R04_STATUS_BRIDGE_PORT_OFFSET(port),
+                           0x00100000);
+        /* BIST pattern */
+        MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                           MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                           MV_SATA_I_HC_R05_STATUS_BRIDGE_PORT_OFFSET(port),
+                           0xb5b5b5b5);
+        /* BIST pattern */
+        MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                           MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                           MV_SATA_I_HC_R06_STATUS_BRIDGE_PORT_OFFSET(port),
+                           0xb5b5b5b5);
+        /* enable BIST */
+        MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                           MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                           MV_SATA_I_HC_R0F_STATUS_BRIDGE_PORT_OFFSET(port),
+                           0x00200000);
+
+        mvMicroSecondsDelay(pAdapter, MV_FAR_END_LOOPBACK_TEST_WAIT_TIME);
+
+        /* poll bit 20 of register 0F(bist finish) for 50 times*/
+        for (pollCount = 0; pollCount < 50; pollCount++)
+        {
+            regVal = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                       MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                                       MV_SATA_I_HC_R0F_STATUS_BRIDGE_PORT_OFFSET(port));
+
+            if (regVal & MV_BIT20)
+            {
+                break;
+            }
+        }
+
+        if (regVal & MV_BIT20)
+        {
+            break;
+        }/*if bit 20 still 0, then try the bist sequence again for 5 times*/
+        else
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: Warning: FarEnd LoopBack "
+                     "- bit 20 still not set try again, tryCount %d\n",pAdapter->adapterId,
+                     channelIndex, tryCount);
+            temp = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                     MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                                     MV_SATA_I_HC_R02_STATUS_BRIDGE_PORT_OFFSET(port));
+            temp &= 0xff0;
+            temp |= MV_BIT0;
+            MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                               MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                               MV_SATA_I_HC_R02_STATUS_BRIDGE_PORT_OFFSET(port), temp);
+
+            if (waitForBusyAfterHReset(pAdapter, channelIndex) == MV_FALSE)
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: in Channel Hard Rese"
+                         "t storage drive is not ready\n",pAdapter->adapterId,
+                         channelIndex);
+
+                result =  MV_FALSE;
+            }
+            _fixPhyParams(pAdapter, channelIndex);
+
+
+
+
+
+
+
+        }
+    }
+    if (tryCount == 5)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: FarEnd LoopBack Failed"
+                 "- the test doesn't finish\n",pAdapter->adapterId,
+                 channelIndex);
+        result = MV_FALSE;
+    }
+    else
+    {
+        if (((regVal & MV_BIT20) == 0) && (regVal & MV_BIT19))
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: FarEnd LoopBack"
+                     " finished with error, 0F regVal= %x\n",pAdapter->adapterId,
+                     channelIndex, regVal);
+            result = MV_FALSE;
+        }
+        else
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " %d %d: FarEnd LoopBack finished "
+                     "successfuly, 0F regVal= %x\n",pAdapter->adapterId,
+                     channelIndex, regVal);
+        }
+    }
+    /* disable BIST and start phy communication */
+    temp = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                             MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                             MV_SATA_I_HC_R02_STATUS_BRIDGE_PORT_OFFSET(port));
+    temp &= 0xff0;
+    temp |= MV_BIT0;
+    MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                       MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                       MV_SATA_I_HC_R02_STATUS_BRIDGE_PORT_OFFSET(port), temp);
+
+    if (waitForBusyAfterHReset(pAdapter, channelIndex) == MV_FALSE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: in Channel Hard Rese"
+                 "t storage drive is not ready\n",pAdapter->adapterId,
+                 channelIndex);
+
+        result =  MV_FALSE;
+    }
+    _fixPhyParams(pAdapter, channelIndex);
+
+    return result;
+}
+
+/*******************************************************************************
+* mvSataQueueCommand - Execute ATA command (PIO or UDMA)
+*
+* DESCRIPTION:
+*   adds ATA PIO or UDMA request to a MV88SX50XX specific sata channel
+*
+* INPUT:
+*   pAdapter    - pointer to the adapter data structure.
+*   channelIndex    - the index of the specific EDMA channel
+*   pCommandInfo - Pointer to the PIO or UDMA command
+*
+* RETURN:
+*   MV_DMA_QUEUE_RESULT_OK - Command queuing is successfull
+*   MV_QUEUE_COMMAND_RESULT_QUEUED_MODE_DISABLED - when trying to add command
+                            while command queuing is disabled
+*   MV_QUEUE_COMMAND_RESULT_FULL - Command queue is full
+*   MV_QUEUE_COMMAND_RESULT_BAD_LBA_ADDRESS - when the connected device doesn't
+*          support 48 bit addressing but the new command need's to use 48bit
+*           addressing.
+*   MV_QUEUE_RESULT_BAD_PARAMS - When bad parameters are received
+*
+* COMMENTS:
+*   None.
+*
+*******************************************************************************/
+MV_QUEUE_COMMAND_RESULT mvSataQueueCommand(MV_SATA_ADAPTER *pAdapter,
+                                           MV_U8 channelIndex,
+                                           MV_QUEUE_COMMAND_INFO *pCommandInfo)
+{
+    MV_SATA_CHANNEL *pSataChannel = pAdapter->sataChannel[channelIndex];
+    MV_QUEUED_COMMAND_ENTRY     *pCommandEntry;
+    MV_U32          eDmaRegsOffset;
+    MV_U8           hostTag;
+    MV_U8           deviceTag;
+
+#ifdef MV_SATA_IO_GRANULARITY
+    MV_U8          nextTransId;
+#endif
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "  : mvSataQueueCommand"
+                 " Failed, Bad adapter data structure pointer\n");
+        return MV_QUEUE_COMMAND_RESULT_BAD_PARAMS;
+    }
+
+    if (pSataChannel == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d: mvSataQueueCommand"
+                 " Failed, channel data structure not allocated\n",
+                 pAdapter->adapterId, channelIndex);
+        return MV_QUEUE_COMMAND_RESULT_BAD_PARAMS;
+    }
+    mvOsSemTake(&pSataChannel->semaphore);
+#ifdef MV_SATA_SUPPORT_EDMA_SINGLE_DATA_REGION
+    if ((pAdapter->sataAdapterGeneration < MV_SATA_GEN_IIE) &&
+        (MV_QUEUED_COMMAND_TYPE_UDMA == pCommandInfo->type) &&
+        (pCommandInfo->commandParams.udmaCommand.singleDataRegion == MV_TRUE))
+    {
+        mvOsSemRelease(&pSataChannel->semaphore);
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d: "
+                 "mvSataQueueCommand single Data region not supported\n",
+                 pAdapter->adapterId, channelIndex);
+        return MV_QUEUE_COMMAND_RESULT_BAD_PARAMS;
+    }
+#endif
+    eDmaRegsOffset = pSataChannel->eDmaRegsOffset;
+    if (pSataChannel->queueCommandsEnabled == MV_FALSE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: queued commands mode"
+                 " is disabled\n", pAdapter->adapterId, channelIndex);
+        mvOsSemRelease(&pSataChannel->semaphore);
+        return MV_QUEUE_COMMAND_RESULT_QUEUED_MODE_DISABLED;
+    }
+
+    if (getTag(pSataChannel, pCommandInfo->PMPort, &hostTag, &deviceTag) == MV_FALSE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: queue is full\n",
+                 pAdapter->adapterId, channelIndex );
+
+        mvOsSemRelease(&pSataChannel->semaphore);
+        return MV_QUEUE_COMMAND_RESULT_FULL;
+    }
+#ifdef MV_SATA_IO_GRANULARITY
+    if ((MV_QUEUED_COMMAND_TYPE_UDMA == pCommandInfo->type) &&
+        (MV_TRUE ==
+         pCommandInfo->commandParams.udmaCommand.ioGranularityEnabled))
+    {
+
+        if (MV_FALSE == pAdapter->iogEnabled)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d: IO granularity is "
+                     "disabled for the adapter\n",
+                     pAdapter->adapterId, channelIndex );
+            mvOsSemRelease(&pSataChannel->semaphore);
+            return MV_QUEUE_COMMAND_RESULT_BAD_PARAMS;
+        }
+        else
+        {
+            if (pAdapter->iogFreeIdsNum <= 0)
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d: IO granularity "
+                         "queue is full\n",
+                         pAdapter->adapterId);
+                mvOsSemRelease(&pSataChannel->semaphore);
+                return MV_QUEUE_COMMAND_RESULT_FULL;
+            }
+        }
+    }
+#endif
+    pCommandEntry = &(pSataChannel->commandsQueue[hostTag]);
+    pCommandEntry->hostTag = hostTag;
+    pCommandEntry->deviceTag = deviceTag;
+    pCommandEntry->isCommandInEdma = MV_FALSE;
+    pCommandEntry->commandAborted = MV_FALSE;
+    if (pCommandInfo->type == MV_QUEUED_COMMAND_TYPE_UDMA)
+    {
+        MV_UDMA_COMMAND_PARAMS  *pUdmaCommand = &pCommandInfo->commandParams.udmaCommand;
+        if (pSataChannel->queuedDMA == MV_EDMA_MODE_NATIVE_QUEUING)
+        {
+            pUdmaCommand->isEXT = MV_TRUE;
+        }
+#ifdef MV_SATA_IO_GRANULARITY
+        pUdmaCommand->iogCurrentTransId = MV_IOG_INVALID_COMMAND_ID;
+        if ((MV_TRUE == pAdapter->iogEnabled) &&
+            (MV_TRUE == pUdmaCommand->ioGranularityEnabled))
+        {
+            if (pUdmaCommand->iogCommandType == MV_IOG_COMMAND_TYPE_FIRST)
+            {
+                mvOsSemTake(&pAdapter->iogSemaphore);
+                nextTransId =
+                pAdapter->iogFreeIdsStack[--(pAdapter->iogFreeIdsNum)];
+                setIoGranularityCount(pAdapter,
+                                      nextTransId,
+                                      pUdmaCommand->ioGranularityCommandParam.transCount);
+                mvOsSemRelease(&pAdapter->iogSemaphore);
+            }
+            else
+            {
+                nextTransId =
+                pUdmaCommand->ioGranularityCommandParam.transId;
+            }
+            pUdmaCommand->iogCurrentTransId = nextTransId;
+        }
+#endif
+        if ((pSataChannel->noneUdmaOutstandingCommands == 0) &&
+#ifdef MV_SUPPORT_ATAPI
+            (pSataChannel->packetOutstandingCommands == 0) &&
+#endif
+            (pSataChannel->ErrorHandlingInfo.state == MV_ERROR_HANDLING_STATE_IDLE))
+        {
+            if (pSataChannel->EdmaActive == MV_FALSE)
+            {
+                disableSaDevInterrupts(pAdapter,channelIndex);
+                activateEdma(pAdapter,channelIndex);
+            }
+            addCommand(pSataChannel, pCommandEntry, pCommandInfo);
+            EdmaReqQueueInsert(pSataChannel, pCommandEntry,
+                               &pCommandInfo->commandParams.udmaCommand);
+        }
+        else
+        {
+            addCommand(pSataChannel, pCommandEntry, pCommandInfo);
+        }
+    }
+    else
+    {
+        addCommand(pSataChannel, pCommandEntry, pCommandInfo);
+        if (pSataChannel->outstandingCommands == 1)
+        {
+            if (pSataChannel->EdmaActive == MV_TRUE)
+            {
+                deactivateEdma(pAdapter,channelIndex);
+            }
+            if (pSataChannel->PMSupported == MV_TRUE)
+            {
+                _setActivePMPort(pSataChannel, pCommandInfo->PMPort);
+            }
+            if (sendNoneUdmaCommand(pSataChannel, pCommandEntry) == MV_FALSE)
+            {
+                removeCommand(pSataChannel,pCommandEntry);
+                _doSoftReset(pSataChannel);
+                mvOsSemRelease(&pSataChannel->semaphore);
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: Failed to "
+                         "Issue PIO command\n", pAdapter->adapterId,
+                         channelIndex);
+                return MV_QUEUE_COMMAND_RESULT_QUEUED_MODE_DISABLED;
+            }
+        }
+    }
+
+    mvOsSemRelease(&pSataChannel->semaphore);
+    return MV_QUEUE_COMMAND_RESULT_OK;
+
+
+
+
+
+
+
+}
+/*******************************************************************************
+* mvSataSetInterruptsScheme - Modify interrupt scheme
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       pAdapter    - pointer to the adapter data structure.
+*       interruptScheme =  A parameter containing the rquired interrupt scheme
+*
+* RETURN:
+*       MV_TRUE on success, otherwise MV_FALSE.
+* COMMENTS: This function doesn't modify the HW main mask register
+*
+*******************************************************************************/
+MV_BOOLEAN mvSataSetInterruptsScheme(MV_SATA_ADAPTER *pAdapter,
+                                     MV_SATA_INTERRUPT_SCHEME interruptScheme)
+{
+    mvOsSemTake(&pAdapter->semaphore);
+    switch (interruptScheme)
+    {
+    case MV_SATA_INTERRUPT_HANDLING_IN_ISR:
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_INTERRUPTS, " %d  : Interrupts"
+                 " scheme set to Handling in ISR\n", pAdapter->adapterId);
+        break;
+    case MV_SATA_INTERRUPT_HANDLING_IN_TASK:
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_INTERRUPTS, " %d  : Interrupts"
+                 " scheme set to Handling in TASK\n", pAdapter->adapterId);
+        break;
+    case MV_SATA_INTERRUPTS_DISABLED:
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_INTERRUPTS, " %d  : Interrupts"
+                 " scheme set to interrupts Disabled\n", pAdapter->adapterId);
+        break;
+    default:
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d  : in mvSataSet"
+                 "InterruptsScheme: Invalid Interrup scheme (%d)\n",
+                 pAdapter->adapterId, interruptScheme);
+        mvOsSemRelease(&pAdapter->semaphore);
+        return MV_FALSE;
+    }
+    pAdapter->interruptsScheme = interruptScheme;
+    mvOsSemRelease(&pAdapter->semaphore);
+    return MV_TRUE;
+}
+
+/*******************************************************************************
+* mvSataCheckPendingInterrupt - Check and mask interrupts
+*
+* DESCRIPTION:
+*       Check if an interrupt is pending, If there is  a pending interrupt then
+*   this function masks the adapter's interrupts and returns MV_TRUE
+*
+* INPUT:
+*       pAdapter    - pointer to the adapter data structure.
+*
+* RETURN:
+*       MV_TRUE if the interrupt issued by mv adapter, otherwise MV_FALSE.
+* COMMENTS:
+*       this function must be used only when interrupt scheme is set to
+*       MV_SATA_INTERRUPT_IN_TASK
+*
+*******************************************************************************/
+MV_BOOLEAN mvSataCheckPendingInterrupt(MV_SATA_ADAPTER *pAdapter)
+{
+    MV_U32  mainMask;
+    MV_BUS_ADDR_T   ioBaseAddr = pAdapter->adapterIoBaseAddress;
+
+    /*mvOsSemTake(&pAdapter->interruptsMaskSem);*/
+    mainMask = pAdapter->mainMask;
+    /*mvOsSemRelease(&pAdapter->interruptsMaskSem);*/
+    /* if the interrupt it ours*/
+    if (MV_REG_READ_DWORD(ioBaseAddr,pAdapter->mainCauseOffset) &
+        mainMask)
+    {
+        /*clear mainMask, the ISR enables the interrupt once served*/
+        MV_REG_WRITE_DWORD(ioBaseAddr, pAdapter->mainMaskOffset, 0);
+        return MV_TRUE;
+    }
+    /*bogus interrupt*/
+    return MV_FALSE;
+}
+/*******************************************************************************
+* mvSataInterruptServiceRoutine - Interrupt service routine
+*
+* DESCRIPTION:
+*       this function is an interrupt service routine that is called upon
+*       reception of an interrupt from a MV88SX50XX adapter.
+*
+* INPUT:
+*       pAdapter    - pointer to the adapter data structure.
+*
+* RETURN:
+*       MV_TRUE if the interrupt issued by mv adapter, otherwise MV_FALSE.
+* COMMENTS:
+*       this function handles all the events that generate interrupts incuding
+*       calling the upper layer call back functions.
+*
+*******************************************************************************/
+MV_BOOLEAN mvSataInterruptServiceRoutine(MV_SATA_ADAPTER *pAdapter)
+{
+    MV_U32  mainCause;
+    MV_U32  mainMask;
+    MV_U32  unitCause = 0;
+    MV_U32  responseDone;
+    MV_U32  edmaError;
+    MV_U32  deviceInterrupt;
+    MV_U8  sataUnit;
+    MV_U8  port;
+    MV_BUS_ADDR_T   ioBaseAddr = pAdapter->adapterIoBaseAddress;
+    mvOsSemTake(&pAdapter->semaphore);
+    mainCause = MV_REG_READ_DWORD(ioBaseAddr,
+                                  pAdapter->mainCauseOffset);
+
+    /* Check if the interrupt is ours */
+    mvOsSemTake(&pAdapter->interruptsMaskSem);
+    mainMask = pAdapter->mainMask;
+    mvOsSemRelease(&pAdapter->interruptsMaskSem);
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG | MV_DEBUG_INTERRUPTS,
+             " %d  : Interrupt. Cause = 0x%08x, mask 0x%08x\n",
+             pAdapter->adapterId, mainCause, mainMask);
+
+    /*
+     * Check if interrupt is our or interrupts are masked.
+     * in interrupts disaled scheme, the main mask register is cleared but the
+     * mainMask variable will hold the bits where interrupts expected, this why
+     * the sheme is not checked
+     */
+    if ((0 == (mainCause & mainMask)) ||
+        ((pAdapter->interruptsAreMasked == MV_TRUE) &&
+         (pAdapter->interruptsScheme != MV_SATA_INTERRUPTS_DISABLED)))
+    {
+        /* when interrupts handled in task, we expect to find interrupts here*/
+        if (pAdapter->interruptsScheme == MV_SATA_INTERRUPT_HANDLING_IN_TASK)
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR," %d  : ISR called "
+                     "but no interrutps are found in interrupts handle in task"
+                     "scheme!\n", pAdapter->adapterId);
+            /*anyway unmask interrupts*/
+            mvOsSemTake(&pAdapter->interruptsMaskSem);
+            if (pAdapter->interruptsAreMasked == MV_FALSE)
+            {
+                MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                                   pAdapter->mainMaskOffset,
+                                   pAdapter->mainMask);
+            }
+            mvOsSemRelease(&pAdapter->interruptsMaskSem);
+        }
+        mvOsSemRelease(&pAdapter->semaphore);
+        return MV_FALSE;
+    }
+
+    if (mainCause & MV_MAIN_INTERRUPT_MASK_REG_PCIERR_BIT)
+    {
+        handlePCIErrorInterrupt(pAdapter);
+    }
+#ifdef MV_SATA_IO_GRANULARITY
+    /*IO Granularity interrupt*/
+    if (mainCause & MV_IOG_TRANS_INT_MASK)
+    {
+        mvOsSemTake(&pAdapter->iogSemaphore);
+        iogInterrupt(pAdapter, ioBaseAddr, mainCause);
+        mvOsSemRelease(&pAdapter->iogSemaphore);
+    }
+#endif
+    for (sataUnit = 0; sataUnit < pAdapter->numberOfUnits; sataUnit++)
+    {
+        if ((pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II) && 
+		   (pAdapter->hostInterface != MV_HOST_IF_INTEGRATED))
+        {
+            /* Clear the all ports interrupt coalescing cause register */
+            MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                                MV_SATA_II_ALL_PORTS_INT_CAUSE_REG_OFFSET,
+                                0);
+        }
+
+        if (mainCause & 0x1ff)
+        {
+            MV_U32  unitCauseAddr = MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                                    MV_SATAHC_INTERRUPT_CAUSE_REG_OFFSET;
+            MV_U32  unitRspInPtr;
+
+            /* clear the cause bit of the Coalescing interrupt*/
+            MV_REG_WRITE_DWORD(ioBaseAddr, unitCauseAddr, ~MV_BIT4);
+            unitCause = MV_REG_READ_DWORD(ioBaseAddr, unitCauseAddr);
+            /* clear the cause register of the current unit */
+            MV_REG_WRITE_DWORD(ioBaseAddr, unitCauseAddr, ~unitCause | MV_BIT4);
+
+            unitRspInPtr = MV_REG_READ_DWORD(ioBaseAddr,
+                                             MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                                             MV_SATAHC_RESPONSE_Q_IN_POINTER_OFFSET);
+
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " %d unit %d : unitCause = 0x%08x,"
+                     " unitRspInPtr 0x%08x\n", pAdapter->adapterId, sataUnit,
+                     unitCause, unitRspInPtr);
+
+            for (port = 0; port < pAdapter->portsPerUnit; port++)
+            {
+                deviceInterrupt = unitCause & (MV_BIT8 << port);
+                responseDone = unitCause & (1 << port);
+                edmaError = (mainCause & MV_BIT0) ;
+
+                if (responseDone || edmaError)
+                {
+                    handleEdmaInterrupt(pAdapter, sataUnit, port,
+                                        (MV_U8)(unitRspInPtr),
+                                        responseDone,
+                                        edmaError, unitCause);
+                }
+                if (deviceInterrupt &&
+                    (SaDevInterrutpBit((MV_U8)MV_CHANNEL_INDEX(sataUnit, port)) & mainMask))
+                {
+                    handleDeviceInterrupt(pAdapter, sataUnit, port);
+                }
+
+
+                mainCause >>= 2;
+                unitRspInPtr >>= 8;
+            }
+        }
+        else
+        {
+            mainCause >>=8;
+        }
+        mainCause >>= 1;            /* this is for the coalescing 0-3 bit*/
+    }
+    if (pAdapter->interruptsScheme == MV_SATA_INTERRUPT_HANDLING_IN_TASK)
+    {
+        if (pAdapter->interruptsAreMasked == MV_FALSE)
+        {
+            MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                               pAdapter->mainMaskOffset,
+                               pAdapter->mainMask);
+        }
+    }
+    mvOsSemRelease(&pAdapter->semaphore);
+    return MV_TRUE;
+}
+/*******************************************************************************
+* mvSataMaskAdapterInterrupt - mask any interrupts can be generated from a
+*       MV88SX50XX adapter
+*
+* DESCRIPTION:
+*       mask all the interrupts that could occur from the adapter.
+*
+* INPUT:
+*       pAdapter    - pointer to the adapter data structure.
+*
+* RETURN:
+*       MV_TRUE on success, MV_FALSE otherwise.
+* COMMENTS:
+*       Before masking the interrupts, the value of the interrupt maks register
+*       will be stored in the adapter data structure.
+*
+*******************************************************************************/
+MV_BOOLEAN mvSataMaskAdapterInterrupt(MV_SATA_ADAPTER *pAdapter)
+{
+    pAdapter->interruptsAreMasked = MV_TRUE;
+    MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                       pAdapter->mainMaskOffset, 0);
+    return MV_TRUE;
+}
+
+/*******************************************************************************
+* mvSataUnmaskAdapterInterrupt - unmask interrupts can be generated from a
+*       MV88SX50XX adapter
+*
+* DESCRIPTION:
+*       Restore a previous value in the MV88SX50XX interrupt maks register by
+*       writing the previously stored value in the interruptMaskRegister field
+*       in the adapter data structure to the MV88SX50XX adapter main interrupt
+*       mask register
+*
+* INPUT:
+*       pAdapter    - pointer to the adapter data structure.
+*
+* RETURN:
+*       MV_TRUE on success, MV_FALSE otherwise.
+* COMMENTS:
+*
+*******************************************************************************/
+MV_BOOLEAN mvSataUnmaskAdapterInterrupt(MV_SATA_ADAPTER *pAdapter)
+{
+    mvOsSemTake(&pAdapter->interruptsMaskSem);
+    pAdapter->interruptsAreMasked = MV_FALSE;
+    MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                       pAdapter->mainMaskOffset,
+                       pAdapter->mainMask);
+    mvOsSemRelease(&pAdapter->interruptsMaskSem);
+    return MV_TRUE;
+}
+
+
+/*******************************************************************************
+* mvSataEnableStaggeredSpinUpAll - Enables staggared spin-up of all SATA channels
+*
+* DESCRIPTION:
+*       Enables staggared spin-up of all SATA II chnannel. This function is not
+*       relevant for SATA I.
+*
+* INPUT:
+*       pAdapter    - pointer to the adapter data structure.
+*
+* RETURN:
+*       MV_TRUE on success, MV_FALSE otherwise.
+* COMMENTS:
+*
+*******************************************************************************/
+MV_BOOLEAN mvSataEnableStaggeredSpinUpAll (MV_SATA_ADAPTER *pAdapter)
+{
+    MV_U8 channelIndex;
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    : "
+                 "mvSataEnableStaggeredSpinUp Failed, Bad adapter data structure"
+                 " pointer\n");
+        return MV_FALSE;
+    }
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " %d  : Staggered spin-up called for all "
+             "SATA channels\n",pAdapter->adapterId);
+    if (pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II)
+    {
+
+        mvOsSemTake(&pAdapter->semaphore);
+        _establishSataCommAll(pAdapter);
+        for (channelIndex = 0 ; channelIndex < pAdapter->numberOfChannels ;
+            channelIndex ++)
+        {
+            MV_U32 SStatusReg;
+            SStatusReg = MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress,
+                                            getEdmaRegOffset(channelIndex) +
+                                            MV_SATA_II_S_STATUS_REG_OFFSET);
+
+            /*
+             * Fix for 88SX60X1 FEr #10
+             */
+
+            if ((SStatusReg != 0x0) && (SStatusReg != 0x113) && (SStatusReg != 0x123))
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: SStatusRegs = %x ; "
+                         "retrying communication...",
+                         pAdapter->adapterId, channelIndex, SStatusReg);
+                _establishSataComm(pAdapter,channelIndex);
+                SStatusReg = MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress,
+                                                getEdmaRegOffset(channelIndex) +
+                                                MV_SATA_II_S_STATUS_REG_OFFSET);
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: New SStatus is %x\n",
+                         pAdapter->adapterId, channelIndex, SStatusReg);
+
+            }
+            if ( ((SStatusReg & 0xf) == MV_PHY_DET_STATE_DEVICE_NO_PHY_COM) ||
+                 ((SStatusReg & 0xf) == MV_PHY_DET_STATE_PHY_OFFLINE))
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: "
+                         "Error - failed to establish SATA link after staggered "
+                         "spin up (S Status = %08x)\n", pAdapter->adapterId,
+                         channelIndex, SStatusReg);
+            }
+            pAdapter->staggaredSpinup[channelIndex] = MV_TRUE;
+        }
+        mvOsSemRelease(&pAdapter->semaphore);
+    }
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_SATA_LINK | MV_DEBUG, " %d  : "
+             "Finished staggered spin-up\n", pAdapter->adapterId);
+
+    return MV_TRUE;
+}
+
+/*******************************************************************************
+* mvSataEnableStaggeredSpinUp - Enables staggared spin-up.
+*
+* DESCRIPTION:
+*       Enables staggared spin-up of SATA II chnannel. This function is not
+*       relevant for SATA I.
+*
+* INPUT:
+*       pAdapter    - pointer to the adapter data structure.
+*   channelIndex    - the index of the specific EDMA channel
+*
+* RETURN:
+*       MV_TRUE on success, MV_FALSE otherwise.
+* COMMENTS:
+*
+*******************************************************************************/
+MV_BOOLEAN mvSataEnableStaggeredSpinUp (MV_SATA_ADAPTER *pAdapter,
+                                        MV_U8 channelIndex)
+{
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    : "
+                 "mvSataEnableStaggeredSpinUp Failed, Bad adapter data structure"
+                 " pointer\n");
+        return MV_FALSE;
+    }
+    if (channelIndex >= pAdapter->numberOfChannels)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    : "
+                 "mvSataEnableStaggeredSpinUp Failed, bad channel index\n");
+        return MV_FALSE;
+    }
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " %d %d: Staggered spin-up called\n",
+             pAdapter->adapterId, channelIndex);
+    if (pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II)
+    {
+        MV_U32 SStatusReg;
+
+        mvOsSemTake(&pAdapter->semaphore);
+        _establishSataComm(pAdapter, channelIndex);
+        SStatusReg = MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress,
+                                        getEdmaRegOffset(channelIndex) +
+                                        MV_SATA_II_S_STATUS_REG_OFFSET);
+        if ( ((SStatusReg & 0xf) == MV_PHY_DET_STATE_DEVICE_NO_PHY_COM) ||
+             ((SStatusReg & 0xf) == MV_PHY_DET_STATE_PHY_OFFLINE))
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: "
+                     "Error - failed to establish SATA link after staggered "
+                     "spin up (S Status = %08x)\n", pAdapter->adapterId,
+                     channelIndex, SStatusReg);
+        }
+        pAdapter->staggaredSpinup[channelIndex] = MV_TRUE;
+        mvOsSemRelease(&pAdapter->semaphore);
+    }
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_SATA_LINK | MV_DEBUG, " %d %d: "
+             "Finished staggered spin-up\n", pAdapter->adapterId,
+             channelIndex);
+
+    return MV_TRUE;
+}
+
+/*******************************************************************************
+* mvSataDisableStaggeredSpinUpAll - Disables staggared spin-up on all channels
+*
+* DESCRIPTION:
+*       Disables staggared spin-up of all SATA II chnannel. This function is not
+*       relevant for SATA I.
+*
+* INPUT:
+*       pAdapter    - pointer to the adapter data structure.
+*
+* RETURN:
+*       MV_TRUE on success, MV_FALSE otherwise.
+* COMMENTS:
+*
+*******************************************************************************/
+MV_BOOLEAN mvSataDisableStaggeredSpinUpAll (MV_SATA_ADAPTER *pAdapter)
+{
+    MV_U8 channelIndex;
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    : "
+                 "mvSataDisableStaggeredSpinUp Failed, Bad adapter data structure"
+                 " pointer\n");
+        return MV_FALSE;
+    }
+    if (pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II)
+    {
+        /* OK to use mvSataDisableStaggeredSpinUp since it's fast enough */
+        for (channelIndex = 0 ; channelIndex < pAdapter->numberOfChannels ;
+            channelIndex ++)
+        {
+            mvSataDisableStaggeredSpinUp(pAdapter,channelIndex);
+        }
+    }
+    return MV_TRUE;
+}
+
+/*******************************************************************************
+* mvSataDisableStaggeredSpinUp - Disables staggared spin-up.
+*
+* DESCRIPTION:
+*       Disables staggared spin-up of SATA II chnannel. This function is not
+*       relevant for SATA I.
+*
+* INPUT:
+*       pAdapter    - pointer to the adapter data structure.
+*   channelIndex    - the index of the specific EDMA channel
+*
+* RETURN:
+*       MV_TRUE on success, MV_FALSE otherwise.
+* COMMENTS:
+*
+*******************************************************************************/
+MV_BOOLEAN mvSataDisableStaggeredSpinUp (MV_SATA_ADAPTER *pAdapter,
+                                         MV_U8 channelIndex)
+{
+    MV_U32 SControlOffset, regVal;
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    : "
+                 "mvSataDisableStaggeredSpinUp Failed, Bad adapter data structure"
+                 " pointer\n");
+        return MV_FALSE;
+    }
+    if (channelIndex >= pAdapter->numberOfChannels)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    : "
+                 "mvSataDisableStaggeredSpinUp Failed, bad channel index\n");
+        return MV_FALSE;
+    }
+    if (pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II)
+    {
+        mvOsSemTake(&pAdapter->semaphore);
+        SControlOffset = getEdmaRegOffset( channelIndex) +
+                         MV_SATA_II_S_CONTROL_REG_OFFSET;
+        regVal = MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress, SControlOffset);
+        regVal &= ~0xf;
+        regVal |= MV_PHY_DET_CONTROL_SHUTDOWN;
+        MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress, SControlOffset,
+                            regVal);
+        pAdapter->staggaredSpinup[channelIndex] = MV_FALSE;
+        mvOsSemRelease(&pAdapter->semaphore);
+    }
+    return MV_TRUE;
+}
+
+/*******************************************************************************
+* mvSataSetInterfaceSpeed - Sets the interface speed of a specific SATA channel
+*
+* DESCRIPTION:
+*       Sets the interface speed of a specific SATA channel (1.5/3 Gbps)
+*
+* INPUT:
+*       pAdapter    - pointer to the adapter data structure.
+*   channelIndex    - the index of the specific EDMA channel
+*
+* RETURN:
+*       MV_SATA_IF_SPEED_1_5 for 1.5 Gbps
+*       MV_SATA_IF_SPEED_3   for 3 Gbps
+*       MV_SATA_IF_SPEED_INVALID if no speed is negotiated
+*
+* COMMENTS:
+*
+*******************************************************************************/
+
+MV_BOOLEAN mvSataSetInterfaceSpeed (MV_SATA_ADAPTER *pAdapter,
+                                    MV_U8 channelIndex,
+                                    MV_SATA_IF_SPEED ifSpeed)
+{
+    MV_U32  SStatusOffset;
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    : "
+                 "mvSataSetInterfaceSpeed Failed, Bad adapter data structure"
+                 " pointer\n");
+        return MV_FALSE;
+    }
+    if (channelIndex >= pAdapter->numberOfChannels)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    : "
+                 "mvSataSetInterfaceSpeed Failed, bad channel index\n");
+        return MV_FALSE;
+    }
+    if (pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II)
+    {
+        MV_SATA_CHANNEL *pSataChannel;
+
+        pSataChannel = pAdapter->sataChannel[channelIndex];
+        if (pSataChannel != NULL)
+        {
+            mvOsSemTake(&pSataChannel->semaphore);
+            if (pSataChannel->queueCommandsEnabled == MV_TRUE)
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: Error:"
+                         "mvSataSetInterfaceSpeed called while EDMA is active\n",
+                         pAdapter->adapterId,channelIndex);
+                mvOsSemRelease( &pSataChannel->semaphore);
+                return MV_FALSE;
+            }
+            mvOsSemRelease(&pSataChannel->semaphore);
+        }
+
+        SStatusOffset = getEdmaRegOffset(channelIndex) +
+                        MV_SATA_II_S_STATUS_REG_OFFSET;
+
+        if (ifSpeed == MV_SATA_IF_SPEED_1_5_GBPS)
+        {
+            pAdapter->limitInterfaceSpeed[channelIndex] = MV_TRUE;
+            pAdapter->ifSpeed[channelIndex] = MV_SATA_IF_SPEED_1_5_GBPS;
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_SATA_LINK, " %d %d: Set Sata speed to "
+                     "1.5Gbps\n", pAdapter->adapterId,channelIndex);
+        }
+        else if (ifSpeed == MV_SATA_IF_SPEED_3_GBPS)
+        {
+            pAdapter->limitInterfaceSpeed[channelIndex] = MV_TRUE;
+            pAdapter->ifSpeed[channelIndex] = MV_SATA_IF_SPEED_3_GBPS;
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_SATA_LINK, " %d %d: Set Sata speed to "
+                     "3Gbps\n", pAdapter->adapterId,channelIndex);
+        }
+        else if (ifSpeed == MV_SATA_IF_SPEED_NO_LIMIT)
+        {
+            pAdapter->limitInterfaceSpeed[channelIndex] = MV_FALSE;
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_SATA_LINK, " %d %d: don't limit Sata"
+                     " speed \n", pAdapter->adapterId,channelIndex);
+        }
+        else
+        {
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    : "
+                     "mvSataSetInterfaceSpeed Failed, bad IF speed\n");
+            return MV_FALSE;
+        }
+
+        mvOsSemTake(&pAdapter->semaphore);
+        if (pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II)
+        {
+	    MV_U32 regVal, LPRegVal = 0;
+
+            regVal = MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress,
+                                    getEdmaRegOffset (channelIndex) +
+                                    MV_SATA_II_SATA_CONFIG_REG_OFFSET);
+	    if(pAdapter->chipIs65XXZ0 == MV_TRUE) {
+		LPRegVal = MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress,
+					      getEdmaRegOffset (channelIndex) +
+					      MV_SATA_II_LP_EXT_CTRL_REG_OFFSET);
+		LPRegVal &= ~(0xFF << 5);
+	    }
+
+            /* according to the spec, bits [31:12] must be set to 0x009B1 */
+            regVal &= 0x00000FFF;
+            /* regVal |= MV_BIT12;*/
+            regVal |= 0x009B1000;
+
+            if ((pAdapter->limitInterfaceSpeed[channelIndex] == MV_TRUE) &&
+                (pAdapter->ifSpeed[channelIndex] == MV_SATA_IF_SPEED_1_5_GBPS))
+            {
+                regVal &= ~MV_BIT7; /* Disable GEn II */
+		if(pAdapter->chipIs65XXZ0 == MV_TRUE) {
+			LPRegVal &= ~(0xFF << 5);
+		}
+            }
+            else
+            {
+                regVal |= MV_BIT7;  /* Enable GEn II */
+		if(pAdapter->chipIs65XXZ0 == MV_TRUE) {
+			LPRegVal |= ~(0x11 << 5);
+		}
+            }
+	    if(pAdapter->chipIs65XXZ0 == MV_TRUE) {
+		LPRegVal = MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+					      getEdmaRegOffset (channelIndex) +
+					       MV_SATA_II_LP_EXT_CTRL_REG_OFFSET, LPRegVal);
+	    }
+            MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                                getEdmaRegOffset (channelIndex) +
+                                MV_SATA_II_SATA_CONFIG_REG_OFFSET,
+                                regVal);
+        }
+ 
+        _channelHardReset(pAdapter, channelIndex);
+        /* If interface is already active, then device detection is needed */
+        if (pAdapter->staggaredSpinup[channelIndex] == MV_TRUE)
+        {
+            _establishSataComm(pAdapter, channelIndex);
+        }
+        mvOsSemRelease(&pAdapter->semaphore);
+        return MV_TRUE;
+    }
+    if ((pAdapter->sataAdapterGeneration == MV_SATA_GEN_I) &&
+        ((ifSpeed == MV_SATA_IF_SPEED_NO_LIMIT) ||
+         (ifSpeed == MV_SATA_IF_SPEED_1_5_GBPS)))
+    {
+        return MV_TRUE;
+    }
+    return MV_FALSE;
+}
+
+/*******************************************************************************
+* mvSataGetInterfaceSpeed - Gets the interface speed of a specific SATA channel
+*
+* DESCRIPTION:
+*       Gets the interface speed of a specific SATA channel (1.5/3 Gbps)
+*
+* INPUT:
+*       pAdapter    - pointer to the adapter data structure.
+*   channelIndex    - the index of the specific EDMA channel
+*
+* RETURN:
+*       MV_SATA_IF_SPEED_1_5 for 1.5 Gbps
+*       MV_SATA_IF_SPEED_3   for 3 Gbps
+*       MV_SATA_IF_SPEED_INVALID if no speed is negotiated
+*
+* COMMENTS:
+*
+*******************************************************************************/
+MV_SATA_IF_SPEED mvSataGetInterfaceSpeed (MV_SATA_ADAPTER *pAdapter,
+                                          MV_U8 channelIndex)
+{
+    MV_U32 SStatusOffset, regVal;
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    : "
+                 "mvSataGetInterfaceSpeed Failed, Bad adapter data structure"
+                 " pointer\n");
+        return MV_SATA_IF_SPEED_INVALID;
+    }
+    if (channelIndex >= pAdapter->numberOfChannels)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    : "
+                 "mvSataGetInterfaceSpeed Failed, bad channel index\n");
+        return MV_SATA_IF_SPEED_INVALID;
+    }
+    if (pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II)
+    {
+        if (pAdapter->staggaredSpinup[channelIndex] == MV_TRUE)
+        {
+            SStatusOffset = getEdmaRegOffset(channelIndex) +
+                            MV_SATA_II_S_STATUS_REG_OFFSET;
+            regVal = MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress, SStatusOffset);
+            if (regVal & MV_BIT4)
+            {
+                return MV_SATA_IF_SPEED_1_5_GBPS;
+            }
+            if (regVal & MV_BIT5)
+            {
+                return MV_SATA_IF_SPEED_3_GBPS;
+            }
+        }
+        return MV_SATA_IF_SPEED_INVALID;
+    }
+    return MV_SATA_IF_SPEED_1_5_GBPS;/*TBD*/
+}
+
+/*******************************************************************************
+* mvSataSetInterfacePowerState - Sets the sata interface power state of a 
+* specific SATA channel
+*
+* DESCRIPTION:
+*       Sets the interface power state of a specific SATA channel 
+*
+* INPUT:
+*       pAdapter    - pointer to the adapter data structure.
+*   channelIndex    - the index of the specific EDMA channel
+*   ifPowerState    - sata interface power state
+*
+* RETURN:
+*       MV_TRUE if the desired power state entered successfully.
+*       MV_FALSE otherwise
+* COMMENTS:
+*
+*******************************************************************************/
+MV_BOOLEAN mvSataSetInterfacePowerState (MV_SATA_ADAPTER *pAdapter,
+                                         MV_U8 channelIndex,
+                                         MV_SATA_IF_POWER_STATE ifPowerState)
+{
+    MV_U32  SControlOffset = getEdmaRegOffset(channelIndex) + 
+                             MV_SATA_II_S_CONTROL_REG_OFFSET;
+    MV_U32  SStatusOffset = getEdmaRegOffset(channelIndex) + 
+                            MV_SATA_II_S_STATUS_REG_OFFSET;
+    MV_U32  SControl;
+    MV_U32  SStatus;
+    MV_U32  IPM;
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    : "
+                 "mvSataSetInterfacePowerState Failed, Bad adapter data structure"
+                 " pointer\n");
+        return MV_FALSE;
+    }
+    if (channelIndex >= pAdapter->numberOfChannels)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    : "
+                 "mvSataSetInterfacePowerState Failed, bad channel index\n");
+        return MV_FALSE;
+    }
+    if (pAdapter->sataAdapterGeneration < MV_SATA_GEN_II)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: "
+                 "mvSataSetInterfacePowerState Failed, adapter not supported\n",
+                 pAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+    }
+    if (pAdapter->staggaredSpinup[channelIndex] == MV_FALSE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: "
+                 "mvSataSetInterfacePowerState Failed, sata link not established yet\n",
+                 pAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+    }
+
+    switch (ifPowerState)
+    {
+    case MV_SATA_IF_POWER_PHY_READY:
+        SControl = 0x4300;
+        break;
+    case MV_SATA_IF_POWER_PARTIAL:
+        SControl = 0x1300;
+        break;
+    case MV_SATA_IF_POWER_SLUMBER:
+        SControl = 0x2300;
+        break;
+    default:
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d: "
+                 "mvSataSetInterfacePowerState Failed, unkniwn state (0x%x)\n",
+                 pAdapter->adapterId, channelIndex, ifPowerState);
+        return MV_FALSE;
+    }
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " %d %d: "
+             "mvSataSetInterfacePowerState: enter state 0x%x (prev 0x%x)\n",
+             pAdapter->adapterId, channelIndex, ifPowerState,
+             pAdapter->ifPowerState[channelIndex]);
+    MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress, SControlOffset, SControl);
+    MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress, SControlOffset);
+    if (pAdapter->ifPowerState[channelIndex] == MV_SATA_IF_POWER_SLUMBER)
+    {
+        mvMicroSecondsDelay(pAdapter, 10000);
+    }
+    else
+    {
+        mvMicroSecondsDelay(pAdapter, 10);
+    }
+    SStatus = MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress, SStatusOffset);
+    IPM = getRegField(SStatus, 8, 4);
+    if (IPM != ifPowerState)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d: "
+                 "mvSataSetInterfacePowerState: IPM (0x%x) doesn't match the "
+                 "requested state 0x%x (prev 0x%x)\n",
+                 pAdapter->adapterId, channelIndex, IPM, ifPowerState,
+                 pAdapter->ifPowerState[channelIndex]);
+        pAdapter->ifPowerState[channelIndex] = MV_SATA_IF_POWER_SLUMBER;
+        return MV_FALSE;
+    }
+    pAdapter->ifPowerState[channelIndex] = ifPowerState;
+    return MV_TRUE;
+}
+/*******************************************************************************
+* mvSataGetInterfacePowerState - Gets the sata interface power state of a 
+* specific SATA channel
+*
+* DESCRIPTION:
+*       Gets the interface power state of a specific SATA channel from the HW 
+*       registers (SStatus)
+*
+* INPUT:
+*       pAdapter    - pointer to the adapter data structure.
+*   channelIndex    - the index of the specific EDMA channel
+*   ifPowerState    - sata interface power state
+*
+* RETURN:
+*       ifPowerState    - sata interface power state
+* COMMENTS:
+*
+*******************************************************************************/
+MV_BOOLEAN mvSataGetInterfacePowerState (MV_SATA_ADAPTER *pAdapter,
+                                         MV_U8 channelIndex,
+                                         MV_SATA_IF_POWER_STATE *ifPowerState)
+{
+    MV_U32  SStatusOffset = getEdmaRegOffset(channelIndex) + 
+                            MV_SATA_II_S_STATUS_REG_OFFSET;
+
+    MV_U32  SStatus;
+
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    : "
+                 "mvSataGetInterfacePowerState Failed, Bad adapter data structure"
+                 " pointer\n");
+        return MV_FALSE;
+    }
+    if (channelIndex >= pAdapter->numberOfChannels)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    : "
+                 "mvSataGetInterfacePowerState Failed, bad channel index\n");
+        return MV_FALSE;
+    }
+    if (pAdapter->sataAdapterGeneration < MV_SATA_GEN_II)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: "
+                 "mvSataGetInterfacePowerState Failed, adapter not supported\n",
+                 pAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+    }
+    if (pAdapter->staggaredSpinup[channelIndex] == MV_FALSE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: "
+                 "mvSataGetInterfacePowerState Failed, sata link not established yet\n",
+                 pAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+    }
+
+    SStatus = MV_REG_READ_DWORD (pAdapter->adapterIoBaseAddress, SStatusOffset);
+    *ifPowerState = getRegField(SStatus, 8, 4);
+    return MV_TRUE;
+}
+#if defined (MV_SUPPORT_ATAPI) || defined (MV_SATA_C2C_COMM)
+static void activateBMDmaMode(MV_SATA_ADAPTER *pAdapter,
+                              MV_U8 channelIndex,
+                              MV_U32 prdTableHi,
+                              MV_U32 prdTableLow,
+                              MV_UDMA_TYPE dmaType)
+{
+    MV_SATA_CHANNEL *pSataChannel = pAdapter->sataChannel[channelIndex];
+    MV_BUS_ADDR_T   ioBaseAddr = pAdapter->adapterIoBaseAddress;
+
+           mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG,
+                " activateBMDmaMode: BMDMA status(1) 0x%08x\n",
+                          MV_REG_READ_DWORD (ioBaseAddr,
+                             getEdmaRegOffset(pSataChannel->channelNumber) +MV_BMDMA_STATUS_OFFSET)
+           );
+    if(pAdapter->hostInterface == MV_HOST_IF_INTEGRATED)
+    {
+        _setRegBits(ioBaseAddr, pSataChannel->eDmaRegsOffset + 0x6C, MV_BIT0);
+    }
+    
+    
+    MV_REG_WRITE_DWORD (ioBaseAddr, pSataChannel->eDmaRegsOffset +
+                        MV_BMDMA_COMMAND_OFFSET, 0);
+           mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG,
+                " activateBMDmaMode: BMDMA status(2) 0x%08x\n",
+                          MV_REG_READ_DWORD (ioBaseAddr,
+                             getEdmaRegOffset(pSataChannel->channelNumber) +MV_BMDMA_STATUS_OFFSET)
+           );
+ 
+    MV_REG_WRITE_DWORD (ioBaseAddr, pSataChannel->eDmaRegsOffset +
+                        MV_BMDMA_PRD_TABLE_LOW_ADDRESS_OFFSET, prdTableLow);
+    MV_REG_WRITE_DWORD (ioBaseAddr, pSataChannel->eDmaRegsOffset +
+                        MV_BMDMA_PRD_TABLE_HIGH_ADDRESS_OFFSET, prdTableHi);
+
+    if (dmaType == MV_UDMA_TYPE_READ)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " %d %d: Activate BM-DMA in write Mode"
+                 " (Read from disk)\n", pAdapter->adapterId, channelIndex);
+        MV_REG_WRITE_DWORD (ioBaseAddr, pSataChannel->eDmaRegsOffset +
+                            MV_BMDMA_COMMAND_OFFSET, MV_BIT3 | MV_BIT0);
+    }
+    else
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " %d %d: Activate BM-DMA in read Mode"
+                 " (Writes to disk)\n", pAdapter->adapterId, channelIndex);
+        MV_REG_WRITE_DWORD (ioBaseAddr, pSataChannel->eDmaRegsOffset +
+                            MV_BMDMA_COMMAND_OFFSET, MV_BIT0);
+    }
+}
+#endif
+/*================C2C functions==========================================*/
+#ifdef MV_SATA_C2C_COMM
+/*******************************************************************************
+* mvSataC2CInit - setup channel-to-channel communication mode on
+*                   specific SATA channel
+*
+* DESCRIPTION:
+*       Initializes channel for channel-to-channel communication mode
+*
+* INPUT:
+*       pAdapter        - pointer to the adapter data structure.
+*       channelIndex    - the index of the specific SATA channel
+*       mvSataC2CMode   - Comunication mode for the channel:
+*                           target or initiator
+*
+*       mvSataC2CCallBack - callback function called on channel 2 channel
+*                           communication event
+*
+* RETURN:
+*       MV_TRUE on success
+*       MV_FALSE on error
+*
+* COMMENTS:
+*
+*******************************************************************************/
+
+MV_BOOLEAN mvSataC2CInit (MV_SATA_ADAPTER *pAdapter,
+                          MV_U8 channelIndex,
+                          MV_SATA_C2C_MODE mvSataC2CMode,
+                          C2CCallBack_t mvSataC2CCallBack)
+{
+    MV_SATA_CHANNEL *pSataChannel;
+    MV_BUS_ADDR_T   ioBaseAddr;
+    MV_U32          regVal;
+
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    : mvSataC2CInit"
+                 " Failed, Bad adapter data structure pointer\n");
+        return MV_FALSE;
+    }
+    ioBaseAddr = pAdapter->adapterIoBaseAddress;
+    pSataChannel = pAdapter->sataChannel[channelIndex];
+    if (pSataChannel == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d: mvSataC2CInit Failed"
+                 ", channel data structure not allocated\n",
+                 pAdapter->adapterId, channelIndex );
+        return MV_FALSE;
+    }
+    if (pSataChannel->queueCommandsEnabled == MV_TRUE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: mvSataC2CInit "
+                 "failed, DMA is enabled\n", pAdapter->adapterId, channelIndex);
+        mvOsSemRelease(&pSataChannel->semaphore);
+        return MV_FALSE;
+    }
+    if (pAdapter->sataAdapterGeneration == MV_SATA_GEN_I)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: mvSataC2CInit "
+                 "failed, Feature not supported by this HW\n",
+                 pAdapter->adapterId, channelIndex);
+        mvOsSemRelease(&pSataChannel->semaphore);
+        return MV_FALSE;
+    }
+
+    regVal = MV_REG_READ_DWORD (ioBaseAddr, pSataChannel->eDmaRegsOffset +
+                                MV_SATA_II_SATA_CONFIG_REG_OFFSET);
+    /* Enable communication mode */
+    regVal |= MV_BIT11;
+    /* Fix for 88SX60xx FEr SATA#8*/
+    /* according to the spec, bits [31:12] must be set to 0x009B1 */
+    regVal &= 0x00000FFF;
+    /* regVal |= MV_BIT12;*/
+    regVal |= 0x009B1000;
+
+
+    if (mvSataC2CMode == MV_SATA_C2C_MODE_INITIATOR)
+    {
+        regVal |= MV_BIT10; /* Initiator */
+    }
+    else
+    {
+        regVal &= ~MV_BIT10; /* Target */
+    }
+
+    maskEdmaInterrupts(pAdapter, channelIndex);
+
+    MV_REG_WRITE_DWORD (ioBaseAddr, pSataChannel->eDmaRegsOffset +
+                        MV_SATA_II_SATA_CONFIG_REG_OFFSET, regVal);
+    
+    _channelHardReset(pAdapter, channelIndex);
+
+    pSataChannel->C2CmodeEnabled = MV_TRUE;
+    pSataChannel->C2CMode = mvSataC2CMode;
+    pSataChannel->C2CCallback = mvSataC2CCallBack;
+
+    mvSataMaskAdapterInterrupt(pAdapter);
+    pAdapter->mainMask |= SaDevInterrutpBit(channelIndex);
+    mvSataUnmaskAdapterInterrupt(pAdapter);
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " %d %d: mvSataC2CInit %s mode\n",
+             pAdapter->adapterId, channelIndex,
+             (mvSataC2CMode == MV_SATA_C2C_MODE_INITIATOR) ? "Initiator" :
+             "Target");
+
+    mvOsSemRelease(&pSataChannel->semaphore);
+    return MV_TRUE;
+}
+
+
+/*******************************************************************************
+* mvSataC2CStop - Stop channel to channel communication mode
+*
+* DESCRIPTION:
+*       Stop channel to channel communication mode on
+*                   specific SATA channel
+*
+* INPUT:
+*       pAdapter        - pointer to the adapter data structure.
+*       channelIndex    - the index of the specific SATA channel
+*
+* RETURN:
+*       MV_TRUE on success
+*       MV_FALSE on error
+*
+* COMMENTS:
+*
+*******************************************************************************/
+
+MV_BOOLEAN mvSataC2CStop (MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex)
+{
+    MV_SATA_CHANNEL  *pSataChannel;
+    MV_BUS_ADDR_T   ioBaseAddr;
+    MV_U32          regVal;
+
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, "    : mvSataC2CStop"
+                 " Failed, Bad adapter data structure pointer\n");
+        return MV_FALSE;
+    }
+    ioBaseAddr = pAdapter->adapterIoBaseAddress;
+    pSataChannel = pAdapter->sataChannel[channelIndex];
+    if (pSataChannel == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d: mvSataC2CStop Failed"
+                 ", channel data structure not allocated\n",
+                 pAdapter->adapterId, channelIndex );
+        return MV_FALSE;
+    }
+    mvOsSemTake(&pSataChannel->semaphore);
+
+    if (pSataChannel->queueCommandsEnabled == MV_TRUE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: mvSataC2CStop "
+                 "failed, DMA is enabled\n", pAdapter->adapterId, channelIndex);
+        mvOsSemRelease(&pSataChannel->semaphore);
+        return MV_FALSE;
+    }
+
+    regVal = MV_REG_READ_DWORD (ioBaseAddr, pSataChannel->eDmaRegsOffset +
+                                MV_SATA_II_SATA_CONFIG_REG_OFFSET);
+    regVal &= ~MV_BIT11;    /* Disable communication mode */
+    /* Fix for 88SX60xx FEr SATA#8*/
+    /* according to the spec, bits [31:12] must be set to 0x009B1 */
+    regVal &= 0x00000FFF;
+    /* regVal |= MV_BIT12;*/
+    regVal |= 0x009B1000;
+
+    MV_REG_WRITE_DWORD (ioBaseAddr, pSataChannel->eDmaRegsOffset +
+                        MV_SATA_II_SATA_CONFIG_REG_OFFSET, regVal);
+    MV_REG_READ_DWORD (ioBaseAddr, pSataChannel->eDmaRegsOffset +
+                       MV_SATA_II_SATA_CONFIG_REG_OFFSET);
+    mvSataMaskAdapterInterrupt(pAdapter);
+    pAdapter->mainMask &= ~SaDevInterrutpBit(channelIndex);
+    mvSataUnmaskAdapterInterrupt(pAdapter);
+
+    _channelHardReset(pAdapter, channelIndex);
+    pSataChannel->C2CmodeEnabled = MV_FALSE;
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG, " %d %d: mvSataC2CStop\n",
+             pAdapter->adapterId, channelIndex);
+
+    mvOsSemRelease(&pSataChannel->semaphore);
+    return MV_TRUE;
+}
+
+
+
+/*******************************************************************************
+* mvSataC2CSendRegisterDeviceToHostFIS - sends Register device to host FIS
+*
+* DESCRIPTION:
+*                   Sends Register device to host FIS
+*                   used for channel-to-channel communication mode on
+*                   specific SATA channel
+* INPUT:
+*       pAdapter        - pointer to the adapter data structure.
+*       channelIndex    - the index of the specific SATA channel
+*       pmPort          - port multiplier port
+*       bInterrupt      - determine whether the interrupt is being generated on
+*                           the receiver side
+*       msg             - message containing 10 bytes of user data
+*
+* RETURN:
+*       MV_TRUE on success
+*       MV_FALSE on error
+*
+* COMMENTS:
+*
+*******************************************************************************/
+
+MV_BOOLEAN  mvSataC2CSendRegisterDeviceToHostFIS(
+                                                MV_SATA_ADAPTER *pAdapter,
+                                                MV_U8 channelIndex,
+                                                MV_U8 pmPort,
+                                                MV_BOOLEAN bInterrupt,
+                                                MV_U8 msg[MV_C2C_MESSAGE_SIZE])
+
+{
+
+    MV_SATA_CHANNEL *pSataChannel;
+    MV_BUS_ADDR_T   ioBaseAddr;
+    MV_U32          buffer[5];
+    MV_BOOLEAN      res;
+
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d "
+                 "mvSataC2CSendRegisterDeviceToHostFIS failed - "
+                 "Bad adapter data structure pointer.\n",
+                 pAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+    }
+
+    ioBaseAddr = pAdapter->adapterIoBaseAddress;
+    pSataChannel = pAdapter->sataChannel[channelIndex];
+    if (pSataChannel == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d "
+                 "mvSataC2CSendRegisterDeviceToHostFIS failed - "
+                 "channel data structure not allocated.\n",
+                 pAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+    }
+    mvOsSemTake(&pSataChannel->semaphore);
+
+    if (pSataChannel->C2CmodeEnabled == MV_FALSE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: mvSataC2CInitiator"
+                 "mvSataC2CSendRegisterDeviceToHostFIS failed - "
+                 "Bad C2C configuration.\n",
+                 pAdapter->adapterId, channelIndex);
+        mvOsSemRelease(&pSataChannel->semaphore);
+        return MV_FALSE;
+    }
+
+    buffer[0] = MV_SATA_REGISTER_HOST_2_DEVICE_FIS;
+    buffer[0] |= ((MV_U32)(pmPort & 0xF)) << 8;
+    if (MV_TRUE == bInterrupt)
+    {
+        buffer[0] |= 1 << 14;
+    }
+    buffer[0] |= ((MV_U32)msg[0]) << 24;
+    buffer[1] = msg[1] |
+                ((MV_U32)msg[2]) << 8 |
+                ((MV_U32)msg[3]) << 16 |
+                ((MV_U32)msg[4]) << 24;
+    buffer[2] = msg[5] |
+                ((MV_U32)msg[6]) << 8 |
+                ((MV_U32)msg[7]) << 16;
+    buffer[3] = msg[8] |
+                ((MV_U32)msg[9]) << 8;
+    buffer[4] = 0;
+    res = sendVendorUniqueFIS(pAdapter,
+                              channelIndex,
+                              (MV_U32*)buffer,
+                              5);
+    mvOsSemRelease(&pSataChannel->semaphore);
+    return res;
+}
+
+
+
+/*******************************************************************************
+* mvSataC2CActivateBmDma - activate B-M DMA
+*
+* DESCRIPTION:
+*       Activates Bus Master DMA for the specific SATA channel
+*
+* INPUT:
+*       pAdapter        - pointer to the adapter data structure.
+*       channelIndex    - the index of the specific EDMA channel
+*       pmPort          - port multiplier port
+*       prdTableHi      - upper 32 bits of PRD table address
+*       prdTableHi      - lower 32 bits of PRD table address
+*       dmaType         - DMA type (read o write) from the initiator point
+                        of view
+*
+* RETURN:
+*       MV_TRUE on success
+*       MV_FALSE on error
+*
+* COMMENTS:
+*
+*******************************************************************************/
+
+MV_BOOLEAN  mvSataC2CActivateBmDma(MV_SATA_ADAPTER *pAdapter,
+                                   MV_U8 channelIndex,
+                                   MV_U8 pmPort,
+                                   MV_U32 prdTableHi,
+                                   MV_U32 prdTableLow,
+                                   MV_UDMA_TYPE dmaType)
+{
+    MV_SATA_CHANNEL *pSataChannel;
+    MV_BUS_ADDR_T   ioBaseAddr;
+    MV_BOOLEAN      res = MV_TRUE;
+
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d "
+                 "mvSataC2CActivateBmDma failed - "
+                 "Bad adapter data structure pointer.\n",
+                 pAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+    }
+    ioBaseAddr = pAdapter->adapterIoBaseAddress;
+    pSataChannel = pAdapter->sataChannel[channelIndex];
+    if (pSataChannel == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d "
+                 "mvSataC2CActivateBmDma failed - "
+                 "channel data structure not allocated\n",
+                 pAdapter->adapterId, channelIndex );
+        return MV_FALSE;
+    }
+    mvOsSemTake(&pSataChannel->semaphore);
+    if (pSataChannel->C2CmodeEnabled == MV_FALSE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d "
+                 "mvSataC2CActivateBmDma failed - "
+                 "bad C2C configuration.\n",
+                 pAdapter->adapterId, channelIndex);
+        mvOsSemRelease(&pSataChannel->semaphore);
+        return MV_FALSE;
+    }
+    if (pSataChannel->C2CMode == MV_SATA_C2C_MODE_TARGET)
+    {
+        activateBMDmaMode(pAdapter, channelIndex,
+                          prdTableHi, prdTableLow,
+                          (dmaType == MV_UDMA_TYPE_WRITE) ?
+                          MV_UDMA_TYPE_READ : MV_UDMA_TYPE_WRITE);
+        if (dmaType == MV_UDMA_TYPE_WRITE)
+        {
+            MV_U32 buffer[1] = {MV_SATA_DMA_ACTIVATE_FIS};
+
+            buffer[0] |= ((MV_U32)(pmPort & 0xF)) << 8;
+            res = sendVendorUniqueFIS(pAdapter,
+                                      channelIndex,
+                                      (MV_U32*)buffer,
+                                      1);
+        }
+        else
+        {
+            MV_U32 val = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                           pAdapter->sataChannel[channelIndex]->eDmaRegsOffset +
+                                           MV_SATA_II_IF_CONTROL_REG_OFFSET);
+            val |= MV_BIT16;
+            MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                               pAdapter->sataChannel[channelIndex]->eDmaRegsOffset +
+                               MV_SATA_II_IF_CONTROL_REG_OFFSET,
+                               val);
+        }
+    }
+    else
+    {
+        activateBMDmaMode(pAdapter, channelIndex, prdTableHi, prdTableLow,
+                          dmaType);
+    }
+    mvOsSemRelease(&pSataChannel->semaphore);
+    return res;
+}
+
+
+/*******************************************************************************
+* mvSataC2CResetBmDma - reset B-M DMA
+*
+* DESCRIPTION:
+*       Reset Bus Master DMA for the specific SATA channel
+*
+* INPUT:
+*       pAdapter        - pointer to the adapter data structure.
+*       channelIndex    - the index of the specific EDMA channel
+*
+* RETURN:
+*       MV_TRUE on success
+*       MV_FALSE on error
+*
+* COMMENTS:
+*
+*******************************************************************************/
+
+MV_BOOLEAN mvSataC2CResetBmDma(MV_SATA_ADAPTER *pAdapter,
+                               MV_U8 channelIndex)
+{
+    MV_SATA_CHANNEL *pSataChannel;
+
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d %d "
+                 "mvSataC2CResetBmDma failed - "
+                 "Bad adapter data structure pointer.\n",
+                 pAdapter->adapterId, channelIndex);
+        return MV_FALSE;
+    }
+    pSataChannel = pAdapter->sataChannel[channelIndex];
+    if (pSataChannel)
+    {
+
+        mvOsSemTake(&pSataChannel->semaphore);
+    }
+
+    _resetBmDma(pAdapter, channelIndex);    
+
+    if (pSataChannel)
+    {
+        mvOsSemRelease(&pSataChannel->semaphore);
+    }
+    return MV_TRUE;
+}
+#endif
+void _resetBmDma(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex)
+{
+    MV_BUS_ADDR_T   ioBaseAddr = pAdapter->adapterIoBaseAddress;
+    MV_U32  val;
+    MV_U8       port = channelIndex & (MV_BIT0 | MV_BIT1);
+    MV_U8       sataUnit = (channelIndex & MV_BIT2) >> 2;
+    MV_U32      unitCauseAddr = MV_SATAHC_REGS_BASE_OFFSET(sataUnit) +
+                                MV_SATAHC_INTERRUPT_CAUSE_REG_OFFSET;
+
+    /*Reset bm dma*/
+    val = MV_REG_READ_DWORD (ioBaseAddr,
+                             getEdmaRegOffset(channelIndex) +
+                             MV_BMDMA_COMMAND_OFFSET);
+    /*The DMA direction must be preserved*/
+    val &= ~MV_BIT0;
+    MV_REG_WRITE_DWORD (ioBaseAddr,
+                        getEdmaRegOffset(channelIndex) +
+                        MV_BMDMA_COMMAND_OFFSET, val);
+
+    MV_REG_WRITE_DWORD(ioBaseAddr,
+                       getEdmaRegOffset(channelIndex) +
+                       MV_SATA_II_IF_CONTROL_REG_OFFSET,
+                       0);
+    /*clear BM Done interrupt*/
+    MV_REG_WRITE_DWORD(ioBaseAddr, unitCauseAddr, ~(1 << port));
+}
+/*******************************************************************************
+* sendVendorUniqueFIS - send vendor unique FIS
+*
+* DESCRIPTION:
+*       Performs vendor unique FIS transmission
+*
+* INPUT:
+*       pAdapter            - pointer to the adapter data structure.
+*       channelIndex        - the index of the specific SATA channel
+*       vendorUniqueBuffer  - data buffer to transmit
+*       numOfDWords         - number of double words in the buffer
+*
+* RETURN:
+*       MV_TRUE on success
+*       MV_FALSE on error
+*
+* COMMENTS:
+*
+*  1. Verify the Transport Layer is in idle, field TransFsmSts in
+*     Serial-ATA Interface Status Register is cleared.
+*  2. Set Vendor Unique Mode. Write 1 to bit VendorUqMd in register
+*     Serial-ATA Interface Control Register.
+*  3. Insert data into Vendor Unique Register.
+*  4. Repeat steps 3 until all data except last Dword in the vendor unique
+*     FIS is transferred. Note that according to Serial-ATA protocol the
+*     FIS length is limited to 8 KB.
+*  5. Write 1 to bit VendorUqSend in register Serial-ATA Interface Control
+*     Register.
+*  6. Write last Dword in the FIS to Complete FIS transmission.
+*  7. Wait for transmission completion. Bit VendorUqDn or bit VendorUqErr
+*     in Serial-ATA Interface Status Register is set to 1.
+*  8. Verify successful transmission of the FIS. Bit VendorUqErr in
+*     Serial-ATA Interface Status Register is cleared.
+*  9. Clear Vendor Unique Mode. Write 0 to bit VendorUqMd in register
+*     Serial-ATA Interface Control Register.
+*******************************************************************************/
+static MV_BOOLEAN sendVendorUniqueFIS(MV_SATA_ADAPTER *pAdapter,
+                                      MV_U8 channelIndex,
+                                      MV_U32 *vendorUniqueBuffer,
+                                      MV_U8 numOfDWords)
+{
+    MV_SATA_CHANNEL *pSataChannel = pAdapter->sataChannel[channelIndex];
+    MV_BUS_ADDR_T   ioBaseAddr = pAdapter->adapterIoBaseAddress;
+    MV_U32          regVal;
+    MV_U8           i;
+    MV_BOOLEAN      res = MV_FALSE;
+
+    regVal = MV_REG_READ_DWORD(ioBaseAddr, pSataChannel->eDmaRegsOffset +
+                               MV_SATA_II_IF_STATUS_REG_OFFSET);
+
+    if (regVal & MV_SATA_II_IF_STATUS_FSM_STATUS_MASK)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: ERROR : sendVendorUniqueFIS"
+                 " Transport Layer is not in Idle status\n", pAdapter->adapterId,
+                 channelIndex);
+        return MV_FALSE;
+    }
+
+    /* Set Vendor Unique Mode */
+    MV_REG_WRITE_DWORD(ioBaseAddr, pSataChannel->eDmaRegsOffset +
+                       MV_SATA_II_IF_CONTROL_REG_OFFSET, MV_BIT8);
+
+    for (i = 1; i < numOfDWords; i++)
+    {
+        MV_REG_WRITE_DWORD(ioBaseAddr, pSataChannel->eDmaRegsOffset +
+                           MV_SATA_II_VENDOR_UQ_REG_OFFSET,
+                           vendorUniqueBuffer[i - 1]);
+    }
+
+    /* Write 1 to bit VendorUqSend */
+    MV_REG_WRITE_DWORD(ioBaseAddr, pSataChannel->eDmaRegsOffset +
+                       MV_SATA_II_IF_CONTROL_REG_OFFSET,  MV_BIT9|MV_BIT8);
+
+    MV_REG_WRITE_DWORD(ioBaseAddr, pSataChannel->eDmaRegsOffset +
+                       MV_SATA_II_VENDOR_UQ_REG_OFFSET,
+                       vendorUniqueBuffer[i - 1]);
+
+
+    /* polling with timeout*/
+    for (i = 0;  i < 200; i++)
+    {
+        regVal = MV_REG_READ_DWORD(ioBaseAddr, pSataChannel->eDmaRegsOffset +
+                                   MV_SATA_II_IF_STATUS_REG_OFFSET);
+
+        if (regVal & (MV_SATA_II_IF_STATUS_VUQ_DONE_MASK |
+                      MV_SATA_II_IF_STATUS_VUQ_ERR_MASK))
+        {
+            if (regVal & MV_SATA_II_IF_STATUS_VUQ_DONE_MASK)
+            {
+                res = MV_TRUE;
+                break;
+            }
+            else
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: ERROR"
+                         "sendVendorUniqueFIS operation failed. "
+                         "regVal = 0x%08x\n",
+                         pAdapter->adapterId, channelIndex, regVal);
+                break;
+            }
+        }
+        mvMicroSecondsDelay(pAdapter, 1);
+    }
+    /* Clear Vendor Unique Mode */
+    MV_REG_WRITE_DWORD(ioBaseAddr, pSataChannel->eDmaRegsOffset +
+                       MV_SATA_II_IF_CONTROL_REG_OFFSET, 0);
+
+    if (res != MV_TRUE)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: ERROR in sendVendorUniqueFI"
+                 "S operation didn't finish. regVal = 0x%08x\n",
+                 pAdapter->adapterId, channelIndex, regVal);
+    }
+    return res;
+}
+
+/*******************************************************************************
+* mvSata60X1B2CheckDevError - check if device errors occurred
+*
+* DESCRIPTION:
+*      This function checks if the drive reported device errors, the 60X1 B2
+*      may not issue error interrupt when the device error reported after 
+*      transferring part of the data, this function need to be called every
+*      period of time(e.g 0.5 seconds).
+*
+* INPUT:
+*       pAdapter            - pointer to the adapter data structure.
+*       channelIndex        - the index of the specific SATA channel
+*
+* RETURN:
+*       MV_TRUE if device error is reported
+*       MV_FALSE otherwise
+*
+* COMMENTS:
+*******************************************************************************/
+MV_BOOLEAN mvSata60X1B2CheckDevError(MV_SATA_ADAPTER *pAdapter,
+                                     MV_U8 channelIndex)
+{
+    MV_SATA_CHANNEL *pSataChannel;
+    MV_BUS_ADDR_T   ioBaseAddr;
+    MV_U32          testCtrlReg;
+
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR,
+                 "    : mvSata60X1B2CheckDevError Failed, Bad adapter "
+                 "data structure pointer\n");
+        return MV_FALSE;
+    }
+    ioBaseAddr = pAdapter->adapterIoBaseAddress;
+    pSataChannel = pAdapter->sataChannel[channelIndex];
+    if (pSataChannel == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR,
+                 " %d %d: mvSata60X1B2CheckDevError Failed, channel "
+                 "data structure not allocated\n", pAdapter->adapterId,
+                 channelIndex );
+        return MV_FALSE;
+    }
+    mvOsSemTake(&pSataChannel->semaphore);
+
+    if ((pAdapter->chipIs60X1B2 == MV_FALSE) ||
+        (pSataChannel->queueCommandsEnabled == MV_FALSE) ||
+        (pSataChannel->EdmaActive == MV_FALSE) ||
+        (pSataChannel->queuedDMA != MV_EDMA_MODE_NOT_QUEUED))
+    {
+        mvOsSemRelease(&pSataChannel->semaphore);
+        return MV_FALSE;
+    }
+    mvOsSemRelease(&pSataChannel->semaphore);
+
+    testCtrlReg = MV_REG_READ_DWORD (ioBaseAddr, 
+                                     pSataChannel->eDmaRegsOffset +
+                                     MV_SATA_II_IF_TEST_CTRL_REG_OFFSET);
+    if (testCtrlReg & 0xFFFF0000)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                 " %d %d: PortNumDevErr is set 0x%04x\n",
+                 pAdapter->adapterId,
+                 channelIndex, 
+                 (testCtrlReg >> 16) & 0xFFFF);
+        MV_REG_WRITE_DWORD (ioBaseAddr,
+                            pSataChannel->eDmaRegsOffset +
+                            MV_EDMA_COMMAND_REG_OFFSET,
+                            MV_EDMA_COMMAND_DISABLE_MASK);
+        handleSelfDisable(pAdapter, channelIndex, MV_BIT7|MV_BIT2);
+        return MV_TRUE;
+    }
+    return MV_FALSE;
+}
+
+MV_BOOLEAN mvSataIfD2HReceived(MV_SATA_ADAPTER *pAdapter,
+			       MV_U8 channelIndex,
+			       MV_U8 port)
+{
+     MV_U32 regVal = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+				       edmaRegOffst[ channelIndex]  +
+				       MV_SATA_II_IF_STATUS_REG_OFFSET);
+     mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG,
+                 " %d %d: mvSataIfD2HReceived: if status reg %08x\n",
+	      pAdapter->adapterId,
+	      channelIndex,
+	      regVal);
+     if(((regVal & 0xFF) == 0x34) && (((regVal >> 8) & 0xF) == port))
+	  return MV_TRUE;
+     
+     return MV_FALSE;
+}
+
+#ifdef MV_SATA_IO_GRANULARITY
+
+/*Public functions*/
+
+/*******************************************************************************
+* mvSataEnableIoGranularity - Enable/disable I/O granularity for the specific
+*                             SATA adapter
+*
+* DESCRIPTION:
+*               Enable/disable I/O granularity for the specific
+*               SATA adapter. if IO/granularity is enabled, the function masks
+*               all channel's and channel coalescing interrupts and enables
+*               I/O granularity coalescing interupts
+* INPUT:
+*       pAdapter    - pointer to the adapter data structure.
+*       enable    -  MV_TRUE to enable I/O granularity
+*                    MV_FALSE to disable I/O granularity
+*
+* RETURN:
+*       MV_TRUE if succeed
+*       MV_FALSE otherwise
+*
+* COMMENTS:
+*
+*******************************************************************************/
+
+MV_BOOLEAN mvSataEnableIoGranularity(MV_SATA_ADAPTER *pAdapter,
+                                     MV_BOOLEAN enable)
+{
+    MV_U32 i;
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_FATAL_ERROR, " %d: "
+                 "mvSataEnableIoGranularity Failed, Bad adapter data structure"
+                 " pointer\n", pAdapter->adapterId);
+        return MV_FALSE;
+    }
+    if (pAdapter->sataAdapterGeneration < MV_SATA_GEN_II)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d: "
+                 "mvSataEnableIoGranularity Failed, Feature is not supported by HW\n",
+                 pAdapter->adapterId);
+        return MV_FALSE;
+    }
+    if (enable)
+    {
+        if (MV_TRUE == pAdapter->iogEnabled)
+        {
+            return MV_TRUE;
+        }
+        mvOsSemTake(&pAdapter->iogSemaphore);
+        for (i = 0; i < MV_IOG_QUEUE_SIZE; i++)
+        {
+            pAdapter->iogFreeIdsStack[i] = i;
+
+        }
+        pAdapter->iogFreeIdsNum = MV_IOG_QUEUE_SIZE;
+        pAdapter->iogEnabled = MV_TRUE;
+        mvOsSemRelease(&pAdapter->iogSemaphore);
+
+        mvOsSemTake(&pAdapter->interruptsMaskSem);
+        pAdapter->mainMask &= ~(MV_BIT1 | MV_BIT3 |  MV_BIT5 |  MV_BIT7 |
+                                MV_BIT10 | MV_BIT12 |  MV_BIT14 |  MV_BIT16 |
+                                MV_BIT17 | MV_BIT8);
+        pAdapter->mainMask |= MV_IOG_TRANS_INT_MASK;
+        MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                           pAdapter->mainMaskOffset,
+                           pAdapter->mainMask);
+        mvOsSemRelease(&pAdapter->interruptsMaskSem);
+
+    }
+    else
+    {
+        if (MV_FALSE == pAdapter->iogEnabled)
+        {
+            return MV_TRUE;
+        }
+
+        mvOsSemTake(&pAdapter->interruptsMaskSem);
+        pAdapter->mainMask &= ~MV_IOG_TRANS_INT_MASK;
+        MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                           pAdapter->mainMaskOffset,
+                           pAdapter->mainMask);
+        mvOsSemRelease(&pAdapter->interruptsMaskSem);
+
+        mvOsSemTake(&pAdapter->iogSemaphore);
+        pAdapter->iogFreeIdsNum = 0;
+        pAdapter->iogEnabled = MV_FALSE;
+        mvOsSemRelease(&pAdapter->iogSemaphore);
+    }
+    return MV_TRUE;
+}
+/*Static functions*/
+
+/*******************************************************************************
+* setIoGranularityCount - Set I/O granularity transaction control register.
+*
+* DESCRIPTION:
+*       This function Sets I/O granularity transaction control register for
+*       specific transaction ID
+*
+* INPUT:
+*       pAdapter     - Pointer to the MV88SX60XX adapter data structure.
+*       transId     -  transaction ID
+*       counter     -  I/O granularity counter transaction for current
+*                       transaction Id
+*
+* RETURN:
+*       None
+*
+* COMMENTS:
+*       This function assumes that the channel semaphore is locked.
+*
+*******************************************************************************/
+
+static void setIoGranularityCount(MV_SATA_ADAPTER *pAdapter,
+                                  MV_U8 transId,
+                                  MV_U8 counter)
+{
+    MV_U32 offset  = MV_IOG_TRANS_CTRL_REG_OFFSET + transId;
+    MV_U8 value  = (counter & 0x1F);
+    MV_REG_WRITE_BYTE(pAdapter->adapterIoBaseAddress, offset, value);
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG | MV_DEBUG_UDMA_COMMAND,
+             " %d : setIoGranularityCount "
+             "writing 0x%X to 0x%X, transId = 0x%X\n",
+             pAdapter->adapterId, value, offset, transId);
+}
+
+/*******************************************************************************
+* readIoGranularityCount - Read I/O granularity transaction control register.
+*
+* DESCRIPTION:
+*       This function reads I/O granularity transaction control register for
+*       specific transaction ID
+*
+* INPUT:
+*       pAdapter     - Pointer to the MV88SX60XX adapter data structure.
+*       transId     -  transaction ID
+*
+*
+* RETURN:
+*        I/O granularity counter for transaction Id
+*
+* COMMENTS:
+*       This function assumes that the channel semaphore is locked.
+*
+*******************************************************************************/
+static MV_U8 readIoGranularityCount(MV_SATA_ADAPTER *pAdapter,
+                                    MV_U8 transId)
+{
+    MV_U32 offset  = MV_IOG_TRANS_CTRL_REG_OFFSET + transId;
+    MV_U8 value  = MV_REG_READ_BYTE(pAdapter->adapterIoBaseAddress, offset);
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_INTERRUPTS, " %d : readIoGranularityCount "
+             "reading 0x%X from 0x%X, transId = 0x%X\n",
+             pAdapter->adapterId, value, offset, transId);
+    return value;
+}
+
+
+/*******************************************************************************
+* checkIogBit - Check bit of I/O granularity cause register.
+*
+* DESCRIPTION:
+*       Checks bits in I/O granularity cause register for completion
+*
+* INPUT:
+*       pAdapter     - Pointer to the MV88SX60XX adapter data structure.
+*       bitOffset    - bit offset in register for current transaction id
+*       value        - register value
+*
+* RETURN:
+*        None
+*
+* COMMENTS:
+*       Assume that is function is called while IO granularity semaphore is
+*       locked
+*******************************************************************************/
+
+static void checkIogBit(MV_SATA_ADAPTER *pAdapter,
+                        MV_U8 bitOffset,
+                        MV_U8 value)
+{
+    MV_U32 i;
+    MV_U8 id = 0x40;
+    for (i = 0; i < 8; i++)
+    {
+        if ((value >> i) & 0x1)
+        {
+            MV_U8 iogCount;
+            id = bitOffset + i;
+            iogCount = readIoGranularityCount(pAdapter, id);
+            if (iogCount > 0)
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_INTERRUPTS,
+                         " %d: unexpected IO granularity "
+                         "transaction counter = %d > 0\n",
+                         pAdapter->adapterId, iogCount);
+            }
+            else
+            {
+                mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_INTERRUPTS,
+                         " %d: IO granularity transaction Id 0x%X done.\n",
+                         pAdapter->adapterId, id);
+            }
+            pAdapter->iogFreeIdsStack[pAdapter->iogFreeIdsNum++] = id;
+        }
+    }
+}
+
+/*******************************************************************************
+* checkIogCompletion - Check bit of I/O granularity cause register.
+*
+* DESCRIPTION:
+*       Checks I/O granularity completion
+*
+* INPUT:
+*       pAdapter     - Pointer to the MV88SX60XX adapter data structure.
+*       iogCause     - I/O granularity cause register value
+*       Offset      -  0 if transaction Id is 0-31, 32 if transaction Id 32-63
+*
+* RETURN:
+*        None
+*
+* COMMENTS:
+*
+*******************************************************************************/
+
+static void checkIogCompletion(MV_SATA_ADAPTER *pAdapter,
+                               MV_U32 iogCause, MV_U8 offset)
+{
+    MV_U32 id;
+    MV_U8  byte;
+
+    if (iogCause & 0xFFFF0000)
+    {
+        byte = (MV_U8)(iogCause >> 24);
+        if (byte)
+        {
+            checkIogBit(pAdapter, (offset) + 24, byte);
+        }
+        byte  =  (MV_U8)((iogCause >> 16) & 0xFF);
+        if (byte)
+        {
+            checkIogBit(pAdapter, (offset) + 16, byte);
+        }
+    }
+    if (iogCause & 0x0000FFFF)
+    {
+        byte = (MV_U8)(iogCause >> 8);
+        if (byte)
+        {
+            checkIogBit(pAdapter, (offset) + 8, byte);
+        }
+        byte  =  (MV_U8)(iogCause & 0xFF);
+        if (byte)
+        {
+            checkIogBit(pAdapter, (offset), byte);
+        }
+    }
+}
+
+/*******************************************************************************
+* iogInterrupt - I/O granularity ISR.
+*
+* DESCRIPTION:
+*       Checks bit of I/O granularity cause register for
+*       specific transaction ID
+*
+* INPUT:
+*       pAdapter     - Pointer to the MV88SX60XX adapter data structure.
+*       ioBaseAddr   - SATA Adapter base address
+*       mainCause   - interrupt cause register
+*
+* RETURN:
+*        None
+*
+* COMMENTS:
+*
+*******************************************************************************/
+
+static void iogInterrupt(MV_SATA_ADAPTER *pAdapter,
+                         MV_BUS_ADDR_T ioBaseAddr,
+                         MV_U32 mainCause)
+{
+    MV_U32 iogCauseRegister;
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG | MV_DEBUG_INTERRUPTS,
+             " %d: IO Granularity Interrupt."
+             "Cause = 0x%08x", pAdapter->adapterId, mainCause);
+    if (mainCause & MV_IOG_TRANS_LOW_BIT)
+    {
+
+        iogCauseRegister = MV_REG_READ_DWORD(ioBaseAddr,
+                                             MV_IOG_TRANS_LOW_REG_OFFSET);
+        MV_REG_WRITE_DWORD (ioBaseAddr,
+                            MV_IOG_TRANS_LOW_REG_OFFSET,
+                            ~iogCauseRegister);
+        if (MV_TRUE == pAdapter->iogEnabled)
+            checkIogCompletion(pAdapter, iogCauseRegister, 0);
+    }
+    if (mainCause & MV_IOG_TRANS_HIGH_BIT)
+    {
+        iogCauseRegister = MV_REG_READ_DWORD(ioBaseAddr,
+                                             MV_IOG_TRANS_HIGH_REG_OFFSET);
+        MV_REG_WRITE_DWORD (ioBaseAddr,
+                            MV_IOG_TRANS_HIGH_REG_OFFSET,
+                            ~iogCauseRegister);
+        if (MV_TRUE == pAdapter->iogEnabled)
+            checkIogCompletion(pAdapter, iogCauseRegister, 32);
+    }
+}
+
+
+/*******************************************************************************
+* iogReset - reset all settings in HW related to I/O granularity.
+*
+* DESCRIPTION:
+*       The function is executed when the error is occured and IO granularity
+*       is enabled for the adapter. The function performs the following
+*       operations
+*       1. IO granularity interrupts are masked
+*       2. Clear IO granularity cause registers
+*       3. Reset all IO granularity transcation counters
+*
+* INPUT:
+*       pAdapter     - Pointer to the MV88SX60XX adapter data structure.
+*
+* RETURN:
+*        None
+*
+* COMMENTS:
+*
+*******************************************************************************/
+
+static MV_BOOLEAN iogReset(MV_SATA_ADAPTER *pAdapter)
+{
+    MV_U32 i;
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+             " %d: IO Granularity error handler is executed.\n.",
+             pAdapter->adapterId);
+    /*Mask IO Granularity interrupt*/
+    mvOsSemTake(&pAdapter->interruptsMaskSem);
+    MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress,
+                       pAdapter->mainMaskOffset,
+                       (pAdapter->mainMask & (~MV_IOG_TRANS_INT_MASK)));
+    mvOsSemRelease(&pAdapter->interruptsMaskSem);
+
+    mvOsSemTake(&pAdapter->iogSemaphore);
+    /*Clear IO Granularity cause registers*/
+    MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                        MV_IOG_TRANS_LOW_REG_OFFSET,
+                        0);
+    MV_REG_WRITE_DWORD (pAdapter->adapterIoBaseAddress,
+                        MV_IOG_TRANS_HIGH_REG_OFFSET,
+                        0);
+
+    /*Set all transaction counters to zero*/
+    for (i = 0; i < MV_IOG_QUEUE_SIZE; i += 4)
+    {
+        MV_U32 offset  = MV_IOG_TRANS_CTRL_REG_OFFSET + i;
+        MV_REG_WRITE_DWORD(pAdapter->adapterIoBaseAddress, offset, 0);
+    }
+    mvOsSemRelease(&pAdapter->iogSemaphore);
+}
+
+
+
+#endif
+static MV_U32 getRegField(MV_U32 regVal, MV_U32 fieldOff, MV_U32 bitsNum)
+{
+    MV_U32  mask = ((1 << bitsNum) - 1);
+    return(regVal >> fieldOff) & mask;
+}
+
+#ifdef MV_LOGGER
+void _dumpPCIRegs(MV_SATA_ADAPTER *pAdapter)
+{
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d "
+                 "_dumpPCIRegs failed - "
+                 "Bad adapter data structure pointer.\n",
+                 pAdapter->adapterId);
+        return ;
+    }
+    if (pAdapter->hostInterface == MV_HOST_IF_INTEGRATED)
+    {
+        /* no pci interface*/
+        return;
+    }
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "%d :Dump PCI Regs\n",
+             pAdapter->adapterId);
+
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "%-25s  %04x %08x\n",
+             "Main interrupt Cause",pAdapter->mainCauseOffset,
+             MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                               pAdapter->mainCauseOffset));
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "%-25s  %04x %08x\n",
+             "Main interrupt Mask",pAdapter->mainMaskOffset,
+             MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                               pAdapter->mainMaskOffset));
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "%-25s  %04x %08x\n",
+             "SErr Mask",0xC28,
+             MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress, 0xc28));
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "%-25s  %04x %08x\n",
+             "Error Addr Low",0x1d40,
+             MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress, 0x1d40));
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "%-25s  %04x %08x\n",
+             "Error Addr High",0x1d44,
+             MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress, 0x1d44));
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "%-25s  %04x %08x\n",
+             "Error Attr",0x1d48,
+             MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress, 0x1d48));
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "%-25s  %04x %08x\n",
+             "Error Command",0x1d50,
+             MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress, 0x1d50));
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "%-25s  %04x %08x\n",
+             "Intr Cause",0x1d58,
+             MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress, 0x1d58));
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "%-25s  %04x %08x\n",
+             "Intr Mask",0x1d5c,
+             MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress, 0x1d5c));
+}
+
+void _dumpEDMARegs(MV_SATA_ADAPTER *pMvSataAdapter, MV_U8 channelIndex)
+{
+    MV_U32  regVal, regOff;
+
+    if (pMvSataAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d "
+                 "_dumpEDMARegs failed - "
+                 "Bad adapter data structure pointer.\n",
+                 pMvSataAdapter->adapterId, channelIndex);
+        return;
+    }
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "%d %d:Dump Edma HW Regs\n",
+             pMvSataAdapter->adapterId, channelIndex);
+
+    regOff = edmaRegOffst[ channelIndex] + MV_EDMA_CONFIG_REG_OFFSET;
+    regVal = mvSataReadReg(pMvSataAdapter, regOff);
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+             " EMDA CFG   off 0x%08x val 0x%08x: depth 0x%x NCQ %x BURST SIZE %x "
+             "eQueue %x Stop On Err %x BURST EXT %x WRITE BURST SIZE %x\n",
+             regOff, regVal,
+             getRegField(regVal, 0, 5),
+             getRegField(regVal, 5, 1),
+             getRegField(regVal, 8, 1),
+             getRegField(regVal, 9, 1),
+             getRegField(regVal, 10, 1),
+             getRegField(regVal, 11, 1),
+             getRegField(regVal, 13, 1));
+
+    regOff = edmaRegOffst[ channelIndex] + MV_EDMA_INTERRUPT_ERROR_CAUSE_REG_OFFSET;
+    regVal = mvSataReadReg(pMvSataAdapter, regOff);
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR," Intr Cause off 0x%08x val 0x%08x\n", regOff, regVal);
+
+    regOff = edmaRegOffst[ channelIndex] + MV_EDMA_INTERRUPT_ERROR_MASK_REG_OFFSET;
+    regVal = mvSataReadReg(pMvSataAdapter, regOff);
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR," Intr Mask  off 0x%08x val 0x%08x\n", regOff, regVal);
+
+    regOff = edmaRegOffst[ channelIndex] + MV_EDMA_REQUEST_Q_BAH_REG_OFFSET;
+    regVal = mvSataReadReg(pMvSataAdapter, regOff);
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR," Req AddrHi off 0x%08x val 0x%08x\n", regOff, regVal);
+
+    regOff = edmaRegOffst[ channelIndex] + MV_EDMA_REQUEST_Q_INP_REG_OFFSET;
+    regVal = mvSataReadReg(pMvSataAdapter, regOff);
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR," Req INP    off 0x%08x val 0x%08x: INP 0x%x BA 0x%x\n",
+             regOff, regVal,
+             getRegField(regVal, 5, 5),
+             getRegField(regVal, 10, 22));
+
+    regOff = edmaRegOffst[ channelIndex] + MV_EDMA_REQUEST_Q_OUTP_REG_OFFSET;
+    regVal = mvSataReadReg(pMvSataAdapter, regOff);
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR," Req OUTP   off 0x%08x val 0x%08x: OUT 0x%x\n",
+             regOff, regVal,
+             getRegField(regVal, 5, 5));
+
+    regOff = edmaRegOffst[ channelIndex] + MV_EDMA_RESPONSE_Q_BAH_REG_OFFSET;
+    regVal = mvSataReadReg(pMvSataAdapter, regOff);
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR," Res AddrHi off 0x%08x val 0x%08x\n",
+             regOff, regVal);
+
+    regOff = edmaRegOffst[ channelIndex] + MV_EDMA_RESPONSE_Q_INP_REG_OFFSET;
+    regVal = mvSataReadReg(pMvSataAdapter, regOff);
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR," Res INP    off 0x%08x val 0x%08x: INP 0x%x\n",
+             regOff, regVal,
+             getRegField(regVal, 3, 5));
+
+    regOff = edmaRegOffst[ channelIndex] + MV_EDMA_RESPONSE_Q_OUTP_REG_OFFSET;
+    regVal = mvSataReadReg(pMvSataAdapter, regOff);
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR," Res OUTP   off 0x%08x val 0x%08x: OUTP 0x%x BA 0x%x\n",
+             regOff, regVal,
+             getRegField(regVal, 3, 5),
+             getRegField(regVal, 8, 24));
+
+    regOff = edmaRegOffst[ channelIndex] + MV_EDMA_COMMAND_REG_OFFSET;
+    regVal = mvSataReadReg(pMvSataAdapter, regOff);
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR," Command    off 0x%08x val 0x%08x: EN %x DIS %x HW RESET %x\n",
+             regOff, regVal,
+             getRegField(regVal, 0, 1),
+             getRegField(regVal, 1, 1),
+             getRegField(regVal, 2, 1));
+
+    regOff = edmaRegOffst[ channelIndex] + MV_EDMA_STATUS_REG_OFFSET;
+    regVal = mvSataReadReg(pMvSataAdapter, regOff);
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR," Status     off 0x%08x val 0x%08x: TAG 0x%x\n",
+             regOff, regVal,
+             getRegField(regVal, 0, 5));
+
+    if (pMvSataAdapter->sataAdapterGeneration == MV_SATA_GEN_IIE)
+    {
+#define PRINT_REG(name, offset)\
+        {\
+            regOff = edmaRegOffst[ channelIndex] + (offset);\
+            mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,"%s      off 0x%08x val 0x%08x\n",\
+                 name, regOff, mvSataReadReg(pMvSataAdapter, regOff));\
+        }
+        PRINT_REG("EDMA Halt Conditions Register", 0x60);
+        PRINT_REG("EDMA FSM Debug Status Register", 0x084);
+        PRINT_REG("EDMA Busy Status Register", 0x88);
+        PRINT_REG("EDMA TCQ Status Register", 0x08c);
+        PRINT_REG("EDMA Rx FIS Parser Register", 0x090);
+        PRINT_REG("EDMA NCQ0 Done/TCQ0 Outstanding Status Register", 0x098);
+        PRINT_REG("EDMA NCQ1 Done/TCQ1 Outstanding Status Register", 0x09c);
+        PRINT_REG("EDMA NCQ2 Done/TCQ2 Outstanding Status Register", 0x0a0);
+        PRINT_REG("EDMA NCQ3 Done/TCQ3 Outstanding Status Register", 0x0a4);
+        PRINT_REG("EDMA Interrupt Error 2 Cause Register", 0x064);
+        PRINT_REG("FIS Interrupt Cause Register", 0x364);
+        PRINT_REG("FIS Interrupt Mask  Register", 0x368);
+        PRINT_REG("FIS DW0 Register", 0x370);
+        PRINT_REG("FIS DW1 Register", 0x374);
+        PRINT_REG("FIS DW2 Register", 0x378);
+        PRINT_REG("FIS DW3 Register", 0x37c);
+        PRINT_REG("FIS DW4 Register", 0x380);
+        PRINT_REG("FIS DW5 Register", 0x384);
+        PRINT_REG("FIS DW6 Register", 0x388);
+
+    }
+
+
+
+
+
+}
+
+void _dumpChannelQueues(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex)
+{
+    MV_SATA_CHANNEL *pSataChannel;
+    MV_U32  i;
+    MV_U32  entries = MV_EDMA_QUEUE_LENGTH;
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d "
+                 "_dumpChannelQueues failed - "
+                 "Bad adapter data structure pointer.\n",
+                 pAdapter->adapterId, channelIndex);
+        return ;
+    }
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "%d %d:Dump Channel Queues\n",
+             pAdapter->adapterId, channelIndex);
+    pSataChannel = pAdapter->sataChannel[channelIndex];
+    if (pSataChannel == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d: _dumpChannelQueues"
+                 "el Failed, channel data structure not allocated\n",
+                 pAdapter->adapterId, channelIndex);
+        return ;
+    }
+
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "Request Qeueu Info:\n");
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " virt addr %p:\n",
+             pSataChannel->requestQueue);
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " phy low addr %08x:\n",
+             pSataChannel->requestQueuePciLowAddress);
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " phy high addr %08x:\n",
+             pSataChannel->requestQueuePciHiAddress);
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " SW IN pointer %x:\n",
+             pSataChannel->reqInPtr);
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "Request Qeueu Entries:\n");
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+             "Index [3:0]       [7:4]       [11:8]       [15:12]\n");
+    if (pSataChannel->use128Entries == MV_TRUE)
+    {
+        entries = MV_EDMA_GEN2E_QUEUE_LENGTH;
+    }
+    for (i = 0; i < entries; i++)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                 "[%2d] 0x%08x  0x%08x  0x%08x  0x%08x  0x%08x  0x%08x  0x%08x  0x%08x\n",i,
+                 *((MV_U32 *)(pSataChannel->requestQueue + i)),
+                 *(((MV_U32 *)(pSataChannel->requestQueue + i)) + 1),
+                 *(((MV_U32 *)(pSataChannel->requestQueue + i)) + 2),
+                 *(((MV_U32 *)(pSataChannel->requestQueue + i)) + 3),
+                 *(((MV_U32 *)(pSataChannel->requestQueue + i)) + 4),
+                 *(((MV_U32 *)(pSataChannel->requestQueue + i)) + 5),
+                 *(((MV_U32 *)(pSataChannel->requestQueue + i)) + 6),
+                 *(((MV_U32 *)(pSataChannel->requestQueue + i)) + 7));
+    }
+
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "Responset Qeueu Info:\n");
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " virt addr %p:\n",
+             pSataChannel->responseQueue);
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " phy low addr %08x:\n",
+             pSataChannel->responseQueuePciLowAddress);
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " phy high addr %08x:\n",
+             pSataChannel->responseQueuePciHiAddress);
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " SW OUT pointer %x:\n",
+             pSataChannel->rspOutPtr);
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, "Response Qeueu Entries:\n");
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+             "Index [1:0]   [3:2]   [7:4]\n");
+    for (i = 0; i < entries; i++)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                 "[%2d] 0x%04x  0x%04x  0x%08x\n",i,
+                 *((MV_U16 *)(pSataChannel->responseQueue + i)),
+                 *(((MV_U16 *)(pSataChannel->responseQueue + i)) + 1),
+                 *(((MV_U32 *)(pSataChannel->responseQueue + i)) + 1));
+    }
+}
+void _dumpSataRegs(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex)
+{
+    MV_U32  regVal;
+
+    if (pAdapter == NULL)
+    {
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR, " %d %d "
+                 "_dumpSataRegs failed - "
+                 "Bad adapter data structure pointer.\n",
+                 pAdapter->adapterId, channelIndex);
+        return;
+    }
+
+    if (pAdapter->sataAdapterGeneration >= MV_SATA_GEN_II)
+    {
+        regVal = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                   edmaRegOffst[ channelIndex]  +
+                                   MV_SATA_II_S_STATUS_REG_OFFSET);
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                 " SStatus  0x%08x:\n", regVal);
+
+        regVal = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                   edmaRegOffst[ channelIndex]  +
+                                   MV_SATA_II_S_CONTROL_REG_OFFSET);
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                 " SControl 0x%08x:\n", regVal);
+
+        regVal = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                   edmaRegOffst[ channelIndex]  +
+                                   MV_SATA_II_S_ERROR_REG_OFFSET);
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                 " SError    0x%08x:\n", regVal);
+
+        regVal = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                   edmaRegOffst[ channelIndex]  +
+                                   MV_SATA_II_IF_CONTROL_REG_OFFSET);
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                 " IF Ctrl  0x%08x: TXPort 0x%x\n", regVal,
+                 getRegField(regVal, 0, 4));
+        regVal = MV_REG_READ_DWORD(pAdapter->adapterIoBaseAddress,
+                                   edmaRegOffst[ channelIndex]  +
+                                   MV_SATA_II_IF_STATUS_REG_OFFSET);
+        mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+                 " IF status 0x%08x: RXFIS 0x%x RXPort 0x%x\n", regVal,
+                 getRegField(regVal, 0, 8),
+                 getRegField(regVal, 8, 4));
+    }
+}
+void _printATARegs(MV_STORAGE_DEVICE_REGISTERS   *pDeviceRegs)
+{
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+             " ATA Drive Registers:\n");
+    if (pDeviceRegs == NULL)
+    {
+        return;
+    }
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+             "%20s : %04x\n","Error", pDeviceRegs->errorRegister);
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+             "%20s : %04x\n","SectorCount", pDeviceRegs->sectorCountRegister);
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+             "%20s : %04x\n","LBA Low", pDeviceRegs->lbaLowRegister);
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+             "%20s : %04x\n","LBA Mid", pDeviceRegs->lbaMidRegister);
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+             "%20s : %04x\n","LBA High", pDeviceRegs->lbaHighRegister);
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+             "%20s : %04x\n","Device", pDeviceRegs->deviceRegister);
+    mvLogMsg(MV_CORE_DRIVER_LOG_ID, MV_DEBUG_ERROR,
+             "%20s : %04x\n","Status", pDeviceRegs->statusRegister);
+}
+
+#endif /*MV_LOGGER*/
+
+
+
+
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/sata/CoreDriver/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/sata/CoreDriver/Makefile
@@ -0,0 +1,6 @@
+include $(srctree)/$(subst ",,$(CONFIG_MV_HAL_RULES_PATH))
+# Objects list
+obj-$(CONFIG_SCSI_MVSATA) += mvSata.o
+obj-$(CONFIG_SCSI_MVSATA) += mvStorageDev.o
+obj-$(CONFIG_SCSI_MVSATA) += mvLog.o
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/sata/CoreDriver/mvSataAddrDec.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/sata/CoreDriver/mvSataAddrDec.c
@@ -0,0 +1,413 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvRegs.h"
+#include "mvSata.h"
+#include "mvSysSataConfig.h"
+
+/* Address decoding regs.	*/
+#define MV_SATA_MAX_ADDR_DECODE_WIN 4
+
+#define MV_SATA_WIN_CTRL_REG(dev, win)        (MV_SATA_REGS_BASE + 0x30 + ((win)<<4))
+#define MV_SATA_WIN_BASE_REG(dev, win)        (MV_SATA_REGS_BASE + 0x34 + ((win)<<4))
+
+/* BITs in Bridge Interrupt Cause and Mask registers */
+#define MV_SATA_ADDR_DECODE_ERROR_BIT        0
+#define MV_SATA_ADDR_DECODE_ERROR_MASK       (1<<MV_SATA_ADDR_DECODE_ERROR_BIT)
+
+/* BITs in Windows 0-3 Control and Base Registers */
+#define MV_SATA_WIN_ENABLE_BIT               0
+#define MV_SATA_WIN_ENABLE_MASK              (1<<MV_SATA_WIN_ENABLE_BIT)
+
+#define MV_SATA_WIN_TARGET_OFFSET            4
+#define MV_SATA_WIN_TARGET_MASK              (0xF<<MV_SATA_WIN_TARGET_OFFSET)
+
+#define MV_SATA_WIN_ATTR_OFFSET              8
+#define MV_SATA_WIN_ATTR_MASK                (0xFF<<MV_SATA_WIN_ATTR_OFFSET)
+
+#define MV_SATA_WIN_SIZE_OFFSET              16
+#define MV_SATA_WIN_SIZE_MASK                (0xFFFF<<MV_SATA_WIN_SIZE_OFFSET)
+
+#define MV_SATA_WIN_BASE_OFFSET              16
+#define MV_SATA_WIN_BASE_MASK                (0xFFFF<<MV_SATA_WIN_BASE_OFFSET)
+
+#define MV_SATA_WIN_SIZE_ALIGN		    _16K
+
+MV_TARGET sataAddrDecPrioTab[] =
+{
+#if defined(MV_INCLUDE_SDRAM_CS0)
+    SDRAM_CS0,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS1)
+    SDRAM_CS1,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS2)
+    SDRAM_CS2,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS3)
+    SDRAM_CS3,
+#endif
+#if defined(MV_INCLUDE_PEX)
+    PEX0_MEM,
+#endif
+    TBL_TERM
+};
+
+
+/*******************************************************************************
+* sataWinOverlapDetect - Detect SATA address windows overlapping
+*
+* DESCRIPTION:
+*       An unpredicted behaviur is expected in case SATA address decode 
+*       windows overlapps.
+*       This function detects SATA address decode windows overlapping of a 
+*       specified window. The function does not check the window itself for 
+*       overlapping. The function also skipps disabled address decode windows.
+*
+* INPUT:
+*       winNum      - address decode window number.
+*       pAddrDecWin - An address decode window struct.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE if the given address window overlap current address
+*       decode map, MV_FALSE otherwise, MV_ERROR if reading invalid data 
+*       from registers.
+*
+*******************************************************************************/
+static MV_STATUS sataWinOverlapDetect(int dev, MV_U32 winNum, 
+				      MV_ADDR_WIN *pAddrWin)
+{
+    MV_U32		winNumIndex;
+    MV_UNIT_WIN_INFO	addrDecWin;
+
+    for(winNumIndex=0; winNumIndex<MV_SATA_MAX_ADDR_DECODE_WIN; winNumIndex++)
+    {
+        /* Do not check window itself       */
+        if (winNumIndex == winNum)
+        {
+            continue;
+        }
+
+        /* Get window parameters    */
+        if (MV_OK != mvSataWinRead(dev, winNumIndex, &addrDecWin))
+        {
+            mvOsPrintf("%s: ERR. mvSataWinGet failed\n", __FUNCTION__);
+            return MV_ERROR;
+        }
+
+        /* Do not check disabled windows    */
+        if(addrDecWin.enable == MV_FALSE)
+        {
+            continue;
+        }
+
+        if (MV_TRUE == mvWinOverlapTest(pAddrWin, &(addrDecWin.addrWin)))
+        {
+            return MV_TRUE;
+        }        
+    }
+    return MV_FALSE;
+}
+
+
+/*******************************************************************************
+* mvSataWinWrite - Set SATA target address window
+*
+* DESCRIPTION:
+*       This function sets a peripheral target (e.g. SDRAM bank0, PCI_MEM0) 
+*       address window, also known as address decode window. 
+*       After setting this target window, the SATA will be able to access the 
+*       target within the address window. 
+*
+* INPUT:
+*       winNum      - SATA target address decode window number.
+*       pAddrDecWin - SATA target window data structure.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_ERROR if address window overlapps with other address decode windows.
+*       MV_BAD_PARAM if base address is invalid parameter or target is 
+*       unknown.
+*
+*******************************************************************************/
+MV_STATUS mvSataWinWrite(MV_U32 dev, MV_U32 winNum, MV_UNIT_WIN_INFO *pAddrDecWin)
+{
+    MV_U32  sizeReg, baseReg;
+
+    /* Parameter checking   */
+    if (winNum >= MV_SATA_MAX_ADDR_DECODE_WIN)
+    {
+        mvOsPrintf("%s: ERR. Invalid win num %d\n",__FUNCTION__, winNum);
+        return MV_BAD_PARAM;
+    }
+    
+    /* Check if the requested window overlapps with current windows         */
+    if (MV_TRUE == sataWinOverlapDetect(dev, winNum, &pAddrDecWin->addrWin))
+    {
+        mvOsPrintf("%s: ERR. Window %d overlap\n", __FUNCTION__, winNum);
+        return MV_ERROR;
+    }
+
+    /* check if address is aligned to the size */
+    if(MV_IS_NOT_ALIGN(pAddrDecWin->addrWin.baseLow, pAddrDecWin->addrWin.size))
+    {
+	mvOsPrintf("mvSataWinSet:Error setting SATA window %d.\n"\
+		   "Address 0x%08x is unaligned to size 0x%x.\n",
+		   winNum,
+		   pAddrDecWin->addrWin.baseLow,
+		   pAddrDecWin->addrWin.size);
+	return MV_ERROR;
+    }
+
+    baseReg = pAddrDecWin->addrWin.baseLow & MV_SATA_WIN_BASE_MASK;
+    sizeReg = (pAddrDecWin->addrWin.size / MV_SATA_WIN_SIZE_ALIGN) - 1;
+    sizeReg = sizeReg << MV_SATA_WIN_SIZE_OFFSET;
+
+    /* set attributes */
+    sizeReg &= ~MV_SATA_WIN_ATTR_MASK;
+    sizeReg |= (pAddrDecWin->attrib << MV_SATA_WIN_ATTR_OFFSET);
+
+    /* set target ID */
+    sizeReg &= ~MV_SATA_WIN_TARGET_MASK;
+    sizeReg |= (pAddrDecWin->targetId << MV_SATA_WIN_TARGET_OFFSET);
+
+    if (pAddrDecWin->enable == MV_TRUE)
+        sizeReg |= MV_SATA_WIN_ENABLE_MASK;
+    else
+        sizeReg &= ~MV_SATA_WIN_ENABLE_MASK;
+
+    MV_REG_WRITE( MV_SATA_WIN_CTRL_REG(dev, winNum), sizeReg);
+    MV_REG_WRITE( MV_SATA_WIN_BASE_REG(dev, winNum), baseReg);
+    
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvSataWinRead - Get SATA peripheral target address window.
+*
+* DESCRIPTION:
+*       Get SATA peripheral target address window.
+*
+* INPUT:
+*       winNum - SATA target address decode window number.
+*
+* OUTPUT:
+*       pAddrDecWin - SATA target window data structure.
+*
+* RETURN:
+*       MV_ERROR if register parameters are invalid.
+*
+*******************************************************************************/
+MV_STATUS mvSataWinRead(MV_U32 dev, MV_U32 winNum, MV_UNIT_WIN_INFO *pAddrDecWin)
+{
+    MV_U32  sizeReg, baseReg;
+    MV_U32  sizeRegVal;
+
+    /* Parameter checking   */
+    if (winNum >= MV_SATA_MAX_ADDR_DECODE_WIN)
+    {
+        mvOsPrintf("%s (dev=%d): ERR. Invalid winNum %d\n", 
+                    __FUNCTION__, dev, winNum);
+        return MV_NOT_SUPPORTED;
+    }
+
+    baseReg = MV_REG_READ( MV_SATA_WIN_BASE_REG(dev, winNum) );
+    sizeReg = MV_REG_READ( MV_SATA_WIN_CTRL_REG(dev, winNum) );
+
+
+    /* Extract base address and size	*/
+    sizeRegVal = (sizeReg & MV_SATA_WIN_SIZE_MASK) >> MV_SATA_WIN_SIZE_OFFSET;
+    pAddrDecWin->addrWin.size = (sizeRegVal + 1) *MV_SATA_WIN_SIZE_ALIGN;
+    pAddrDecWin->addrWin.baseLow = baseReg & MV_SATA_WIN_BASE_MASK;
+    pAddrDecWin->addrWin.baseHigh =  0;
+
+    /* attrib and targetId		*/
+    pAddrDecWin->attrib = (sizeReg & MV_SATA_WIN_ATTR_MASK) >> MV_SATA_WIN_ATTR_OFFSET;
+    pAddrDecWin->targetId = (sizeReg & MV_SATA_WIN_TARGET_MASK) >> MV_SATA_WIN_TARGET_OFFSET;
+
+    /* Check if window is enabled	*/
+    if(sizeReg & MV_SATA_WIN_ENABLE_MASK) 
+        pAddrDecWin->enable = MV_TRUE;
+    else
+        pAddrDecWin->enable = MV_FALSE;
+    return MV_OK;
+}
+
+#if 0
+/*******************************************************************************
+* mvSataAddrDecShow - Print the SATA address decode map.
+*
+* DESCRIPTION:
+*		This function print the SATA address decode map.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_VOID mvSataAddrDecShow(MV_VOID)
+{
+    MV_SATA_DEC_WIN win;
+    int i,j;
+
+    for( j = 0; j < MV_SATA_MAX_CHAN; j++ )
+    {
+	if (MV_FALSE == mvCtrlPwrClckGet(SATA_UNIT_ID, j)) 
+	    return;
+
+	mvOsOutput( "\n" );
+	mvOsOutput( "SATA %d:\n", j );
+	mvOsOutput( "----\n" );
+
+	for( i = 0; i < MV_SATA_MAX_ADDR_DECODE_WIN; i++ )
+	{
+            memset( &win, 0, sizeof(MV_SATA_DEC_WIN) );
+
+	    mvOsOutput( "win%d - ", i );
+
+	    if( mvSataWinGet(j, i, &win ) == MV_OK )
+	    {
+	        if( win.enable )
+	        {
+                    mvOsOutput( "%s base %08x, ",
+                    mvCtrlTargetNameGet(win.target), win.addrWin.baseLow );
+                    mvOsOutput( "...." );
+
+                    mvSizePrint( win.addrWin.size );
+    
+		    mvOsOutput( "\n" );
+                }
+		else
+		    mvOsOutput( "disable\n" );
+	    }
+	}
+    }
+}
+#endif
+
+/*******************************************************************************
+* mvSataWinInit - Initialize the integrated SATA target address window.
+*
+* DESCRIPTION:
+*       Initialize the SATA peripheral target address window.
+*
+* INPUT:
+*
+*
+* OUTPUT:
+*     
+*
+* RETURN:
+*       MV_ERROR if register parameters are invalid.
+*
+*******************************************************************************/
+MV_STATUS mvSataWinInit(MV_UNIT_WIN_INFO *addrWinMap)
+{
+    MV_U32		winNum;
+    MV_UNIT_WIN_INFO	*addrDecWin;
+    MV_U32		winPrioIndex = 0;
+
+    /* Initiate Sata address decode */
+
+    /* First disable all address decode windows */
+    for(winNum = 0; winNum < MV_SATA_MAX_ADDR_DECODE_WIN; winNum++)
+    {
+        MV_U32  regVal = MV_REG_READ(MV_SATA_WIN_CTRL_REG(0, winNum));
+        regVal &= ~MV_SATA_WIN_ENABLE_MASK;
+        MV_REG_WRITE(MV_SATA_WIN_CTRL_REG(0, winNum), regVal);
+    }
+
+    winNum = 0;
+    while( (sataAddrDecPrioTab[winPrioIndex] != TBL_TERM) &&
+           (winNum < MV_SATA_MAX_ADDR_DECODE_WIN) )
+    {
+	addrDecWin = &addrWinMap[sataAddrDecPrioTab[winPrioIndex]];
+        if (addrDecWin->enable == MV_TRUE)
+        {
+            if(MV_OK != mvSataWinWrite(0/*dev*/, winNum, addrDecWin))
+            {
+                return MV_ERROR;
+            }
+            winNum++;
+        }
+        winPrioIndex++;
+    }
+    return MV_OK;
+}
+
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/sata/CoreDriver/mvLog.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/sata/CoreDriver/mvLog.h
@@ -0,0 +1,187 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+/*******************************************************************************
+* mvLog.h - Header File for CORE driver logger
+*
+* DESCRIPTION:
+*       None.
+*
+* DEPENDENCIES:
+*
+*******************************************************************************/
+#ifndef __INCmvLogh
+#define __INCmvLogh
+
+#ifdef __cplusplus
+extern "C" /*{*/
+#endif /* __cplusplus */
+
+#include "mvOsS.h"
+
+/*-------------H file-----------------------------*/
+#define MV_DEBUG_FATAL_ERROR                    0x01
+#define MV_DEBUG_ERROR                          0x02
+#define MV_DEBUG_INIT                           0x04
+#define MV_DEBUG_INTERRUPTS                     0x08
+#define MV_DEBUG_SATA_LINK                      0x10
+#define MV_DEBUG_UDMA_COMMAND                   0x20
+#define MV_DEBUG_NON_UDMA_COMMAND               0x40
+#define MV_DEBUG_PM                             0x80
+#define MV_DEBUG                                0x100
+#define MV_DEBUG_INFO                           0x200
+
+#define MV_DEBUG_ENABLE_ALL			0x3FF
+
+#define MV_MAX_LOG_MODULES         16
+#define MV_MAX_MESSAGE_TYPE        10
+#define MV_RAW_MSG_ID              0xF
+
+typedef struct
+{
+    MV_BOOLEAN      used;
+    MV_U32          filterMask;
+    const char      *name;
+    char            *filters;
+} MV_LOG_FILTER_HEADER;
+
+
+#if defined (MV_LOG_DEBUG) || defined (MV_LOG_ERROR)
+    #define MV_LOGGER       1
+    #if defined (WIN32)
+ULONG
+_cdecl
+DbgPrint(
+        PCH Format,
+        ...
+        );
+        #define MV_LOG_PRINT    DbgPrint
+    #elif defined (LINUX)
+        #define MV_LOG_PRINT    printk
+    #elif defined __DOS__
+        #define MV_LOG_PRINT    printf
+    #elif defined __UBOOT__
+        #define MV_LOG_PRINT    printf
+    #else
+        #define MV_LOG_PRINT	printf
+    #endif
+
+
+MV_BOOLEAN mvLogRegisterModule(MV_U8 moduleId, MV_U32 filterMask, const char* name);
+MV_BOOLEAN mvLogSetModuleFilter(MV_U8 moduleId, MV_U32 filterMask);
+MV_U32 mvLogGetModuleFilter(MV_U8 moduleId);
+void mvLogMsg(MV_U8 moduleId, MV_U32 type, const char* format, ...);
+
+#else /*defined (MV_LOG_DEBUG) || defined (MV_LOG_ERROR)*/
+
+    #undef MV_LOGGER
+
+    #if defined (WIN32)
+        #define MV_LOG_PRINT
+        #define mvLogRegisterModule
+        #define mvLogGetModuleFilter
+        #define mvLogRegisterAllModules
+        #define mvLogMsg
+
+    #elif defined (MV_LINUX)
+        #define MV_LOG_PRINT(x...)
+        #define mvLogRegisterModule(x...)
+        #define mvLogSetModuleFilter(x...)
+        #define mvLogGetModuleFilter(x...)
+        #define mvLogRegisterAllModules(x...)
+        #define mvLogMsg(x...)
+
+    #elif defined (MV_UBOOT)
+        #define MV_LOG_PRINT(x...)
+        #define mvLogRegisterModule(x...)
+        #define mvLogSetModuleFilter(x...)
+        #define mvLogGetModuleFilter(x...)
+        #define mvLogRegisterAllModules(x...)
+        #define mvLogMsg(x...)
+
+    #elif defined (__DOS__)
+        #define MV_LOG_PRINT()
+        #define mvLogRegisterModule()
+        #define mvLogSetModuleFilter()
+        #define mvLogGetModuleFilter()
+        #define mvLogRegisterAllModules()
+        #define mvLogMsg()
+
+    #else
+        #define MV_LOG_PRINT
+        #define mvLogRegisterModule
+        #define mvLogSetModuleFilter
+        #define mvLogGetModuleFilter
+        #define mvLogRegisterAllModules
+        #define mvLogMsg
+    #endif
+
+#endif /*!defined (MV_LOG_DEBUG) && !defined (MV_LOG_ERROR)*/
+
+#ifdef __cplusplus
+
+/*}*/
+#endif /* __cplusplus */
+
+#endif
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/sata/CoreDriver/mvRegs.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/sata/CoreDriver/mvRegs.h
@@ -0,0 +1,416 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+/*******************************************************************************
+* mvRegs.h - Header file that includes the regs addresses
+*
+* DESCRIPTION:
+*       None.
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+#ifndef __INCmvRegs
+#define __INCmvRegs
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/* General Definitions */
+#define MV_BIT0                                 0x00000001
+#define MV_BIT1                                 0x00000002
+#define MV_BIT2                                 0x00000004
+#define MV_BIT3                                 0x00000008
+#define MV_BIT4                                 0x00000010
+#define MV_BIT5                                 0x00000020
+#define MV_BIT6                                 0x00000040
+#define MV_BIT7                                 0x00000080
+#define MV_BIT8                                 0x00000100
+#define MV_BIT9                                 0x00000200
+#define MV_BIT10                                0x00000400
+#define MV_BIT11                                0x00000800
+#define MV_BIT12                                0x00001000
+#define MV_BIT13                                0x00002000
+#define MV_BIT14                                0x00004000
+#define MV_BIT15                                0x00008000
+#define MV_BIT16                                0x00010000
+#define MV_BIT17                                0x00020000
+#define MV_BIT18                                0x00040000
+#define MV_BIT19                                0x00080000
+#define MV_BIT20                                0x00100000
+#define MV_BIT21                                0x00200000
+#define MV_BIT22                                0x00400000
+#define MV_BIT23                                0x00800000
+#define MV_BIT24                                0x01000000
+#define MV_BIT25                                0x02000000
+#define MV_BIT26                                0x04000000
+#define MV_BIT27                                0x08000000
+#define MV_BIT28                                0x10000000
+#define MV_BIT29                                0x20000000
+#define MV_BIT30                                0x40000000
+#define MV_BIT31                                0x80000000
+
+
+#define MV_PCI_REGS_OFFSET                      0x0
+
+/* PCI registers */
+
+#define MV_MAIN_INTERRUPT_CAUSE_REG_OFFSET      0x1d60
+
+#define MV_MAIN_INTERRUPT_MASK_REG_OFFSET       0x1d64
+#define MV_MAIN_INTERRUPT_MASK_REG_ALL_BITS     0x7ffff
+#define MV_MAIN_INTERRUPT_MASK_REG_PCIERR_BIT   MV_BIT18
+#define MV_MAIN_INTERRUPT_HOST_SELF_INT_BIT     MV_BIT23
+
+#define MV_PCI_CONTROL_REG_OFFSET               0x1d68
+#define MV_PCI_CONTROL_REG_H2H_INT_BIT          MV_BIT1
+
+/* enable ports error, coalescing done and pci error*/
+#define MV_MAIN_INTERRUPT_MASK_ENABLE_ALL       0x6ab55
+
+#define MV_PCI_DLL_STATUS_CONTROL_REG_OFFSET    0x1d20
+#define MV_PCI_COMMAND_REG_OFFSET               0xc00
+#define MV_PCI_COMMAND_REG_DEFAULT              0x0107E371
+#define MV_PCI_COMMAND_PCI_CONVENTIONAL_ONLY            \
+    (MV_BIT5|MV_BIT6|MV_BIT7|MV_BIT8|MV_BIT9|MV_BIT31)
+#define MV_PCI_MWRITE_COMBINE_BIT               MV_BIT4
+#define MV_PCI_MREAD_COMBINE_BIT                MV_BIT5
+
+#define MV_PCI_MODE_REG_OFFSET                  0xd00
+#define MV_PCI_MODE_MASK                        0x30
+#define MV_PCI_MODE_OFFSET                      4
+
+#define MV_PCI_DISCARD_TIMER_REG_OFFSET         0xd04
+
+#define MV_PCI_MSI_TRIGGER_REG_OFFSET           0xc38
+
+#define MV_PCI_EXPANSION_ROM_CONTROL_REG_OFFSET 0xd2c
+
+#define MV_PCI_XBAR_IF_TIMEOUT_REG_OFFSET       0x1d04
+
+#define MV_PCI_SERR_MASK_REG_OFFSET             0xc28
+#define MV_PCI_SERR_MASK_REG_ENABLE_ALL         0xd77fe6
+
+#define MV_PCI_INTERRUPT_CAUSE_REG_OFFSET       0x1d58
+
+#define MV_PCI_INTERRUPT_MASK_REG_OFFSET        0x1d5c
+
+#define MV_PCI_INTERRUPT_MASK_REG_ENABLE_ALL    MV_PCI_SERR_MASK_REG_ENABLE_ALL
+
+#define MV_PCI_ERROR_LOW_ADDRESS_REG_OFFSET     0x1d40
+
+#define MV_PCI_ERROR_HIGH_ADDRESS_REG_OFFSET    0x1d44
+
+#define MV_PCI_ERROR_ATTRIBUTE_REG_OFFSET       0x1d48
+
+#define MV_PCI_ERROR_COMMAND_REG_OFFSET         0x1d50
+
+#define MV_PCI_MAIN_COMMAND_STATUS_REG_OFFSET   0xd30 /*Relevant for 60x1 only*/
+#define MV_PCI_MAIN_COMMAND_DIS_CORE_CLK_MASK   MV_BIT0
+#define MV_PCI_MAIN_COMMAND_DIS_SHC1_CLK_MASK   MV_BIT0
+#define MV_PCI_MAIN_COMMAND_STOP_MASTER_MASK    MV_BIT2
+#define MV_PCI_MAIN_COMMAND_MASTER_EMPTY_MASK   MV_BIT3
+#define MV_PCI_MAIN_COMMAND_GLOBAL_RESET_MASK   MV_BIT4
+
+/*PEX (PCI-Express registers*/
+#define MV_PCI_E_INTERRUPT_CAUSE_REG_OFFSET     0x1900
+#define MV_PCI_E_INTERRUPT_MASK_REG_OFFSET      0x1910
+#define MV_PCI_E_ERROR_MASK_VALUE               (MV_BIT10|MV_BIT9|MV_BIT8|MV_BIT3|MV_BIT1)
+/* Flash interface registers */
+#define MV_FLASH_PARAMS_REG_OFFSET              0x1046c
+
+#define MV_FLASH_GPIO_PORT_CONTROL_OFFSET       0x104f0
+
+#define MV_RESET_CONFIG_REG_OFFSET              0x180d8
+#define MV_RESET_CONFIG_TWSI_INIT_MASK          MV_BIT0
+#define MV_SATA_II_ALL_PORTS_INT_COAL_CMND_THR_REG_OFFSET 0x180cc
+
+#define MV_SATA_II_ALL_PORTS_INT_COAL_TIME_THR_REG_OFFSET 0x180d0
+
+#define MV_SATA_II_ALL_PORTS_INT_CAUSE_REG_OFFSET 0x18008
+
+/* SATAHC registers*/
+#define MV_SATAHC_0_REGS_BASE_OFFSET            0x20000 /* 128KByte offset */
+
+#define MV_SATAHC_1_REGS_BASE_OFFSET            0x30000 /* 192KByte offset */
+
+#define MV_SATAHC_REGS_BASE_OFFSET(unit)        ((unit)?(MV_SATAHC_1_REGS_BASE_OFFSET):(MV_SATAHC_0_REGS_BASE_OFFSET))
+
+#define MV_SATAHC_XBAR_CONF_REG_OFFSET          0x000
+
+#define MV_SATAHC_RESPONSE_Q_IN_POINTER_OFFSET  0x008
+
+#define MV_SATAHC_INT_COAL_THRE_REG_OFFSET      0x00c
+
+#define MV_SATAHC_INT_TIME_THRE_REG_OFFSET      0x010
+
+#define MV_SATAHC_INTERRUPT_CAUSE_REG_OFFSET    0x014
+
+#define MV_SATA_I_HC_BRIDGES_TEST_CONTROL_REG_OFFSET    0x018
+#define MV_SATA_I_TEST_CONTROL_PATTERN_MASK         0x7
+#define MV_SATA_I_TEST_CONTROL_PATTERN_OFFSET           10
+#define MV_SATA_I_TEST_CONTROL_PORT_MASK                0x3
+#define MV_SATA_I_TEST_CONTROL_PORT_OFFSET              13
+#define MV_SATA_I_TEST_CONTROL_PHY_SHUTDOWN_MASK(port)  ((MV_U32)1 << (24 + (port)))
+
+#define MV_SATA_I_HC_BRIDGES_TEST_STATUS_REG_OFFSET 0x01c
+#define MV_SATA_I_TEST_STATUS_LOOPBACK_PASS_BIT     MV_BIT8
+
+#define MV_SATA_I_HC_BRIDGES_PINS_CONFIG_REG_OFFSET 0x020
+
+#define MV_SATA_I_HC_R00_STATUS_BRIDGE_PORT_OFFSET(port)        \
+    (0x100 + (port)*0x100)
+
+#define MV_SATA_I_HC_R00_STATUS_BRIDGE_DET_OFFSET  0x0
+#define MV_SATA_I_HC_R00_STATUS_BRIDGE_DET_MASK 0xf
+
+#define MV_SATA_I_HC_R02_STATUS_BRIDGE_PORT_OFFSET(port)    \
+    (0x108 + (port)*0x100)
+
+#define MV_SATA_I_HC_PHY_CONTROL_BRIDGE_PORT_OFFSET(port)   \
+    (0x10C + (port)*0x100)
+
+#define MV_SATA_I_HC_R04_STATUS_BRIDGE_PORT_OFFSET(port)    \
+    (0x110 + (port)*0x100)
+#define MV_SATA_I_HC_R05_STATUS_BRIDGE_PORT_OFFSET(port)    \
+    (0x114 + (port)*0x100)
+#define MV_SATA_I_HC_R06_STATUS_BRIDGE_PORT_OFFSET(port)    \
+    (0x118 + (port)*0x100)
+#define MV_SATA_I_HC_R0F_STATUS_BRIDGE_PORT_OFFSET(port)    \
+    (0x13c + (port)*0x100)
+#define MV_SATA_I_HC_LT_MODES_PORT_REG_OFFSET(port)         \
+    (0x130 + ((port) * 0x100))
+#define MV_SATA_I_HC_PHY_MODE_BRIDGE_PORT_REG_OFFSET(port)  \
+    (0x174 + ((port) * 0x100))
+#define MV_SATA_I_PHY_MODE_AMP_MASK             0xe0
+#define MV_SATA_I_PHY_MODE_AMP_OFFSET               5
+#define MV_SATA_I_PHY_MODE_PRE_MASK             0x1800
+#define MV_SATA_I_PHY_MODE_PRE_OFFSET               11
+
+#define MV_SATA_II_PHY_MODE_1_REG_OFFSET        0x32c
+
+#define MV_SATA_II_PHY_MODE_2_REG_OFFSET        0x330
+#define MV_SATA_II_PHY_MODE_2_AMP_MASK          0x700
+#define MV_SATA_II_PHY_MODE_2_AMP_OFFSET        8
+#define MV_SATA_II_PHY_MODE_2_PRE_MASK          0xe0
+#define MV_SATA_II_PHY_MODE_2_PRE_OFFSET        5
+
+#define MV_SATA_II_PHY_MODE_3_REG_OFFSET        0x310
+
+#define MV_SATA_II_PHY_MODE_4_REG_OFFSET        0x314
+
+#define MV_SATA_II_IF_CONTROL_REG_OFFSET        0x344
+#define MV_SATA_II_IF_CONTROL_PMTX_OFFSET       0
+#define MV_SATA_II_IF_CONTROL_PMTX_MASK         0xf
+
+#define MV_SATA_II_IF_TEST_CTRL_REG_OFFSET		0x348
+
+#define MV_SATA_II_IF_STATUS_REG_OFFSET         0x34c
+#define MV_SATA_II_IF_STATUS_VUQ_DONE_MASK      MV_BIT12
+#define MV_SATA_II_IF_STATUS_VUQ_ERR_MASK       MV_BIT13
+#define MV_SATA_II_IF_STATUS_FSM_STATUS_MASK    0x3f000000
+
+
+#define MV_SATA_II_VENDOR_UQ_REG_OFFSET         0x35c
+
+#define MV_SATA_II_S_STATUS_REG_OFFSET          0x300
+
+#define MV_SATA_II_S_ERROR_REG_OFFSET           0x304
+
+#define MV_SATA_II_S_CONTROL_REG_OFFSET         0x308
+
+#define MV_SATA_II_SATA_CONFIG_REG_OFFSET       0x50
+
+#define MV_SATA_II_LP_EXT_CTRL_REG_OFFSET       0x58
+
+#define MV_SATA_II_PHY_MODE_9_GEN1_REG_OFFSET   0x39c
+#define MV_SATA_II_PHY_MODE_9_GEN2_REG_OFFSET   0x398
+/* EDMA registers */
+
+#define MV_EDMA_PORT_BASE_OFFSET(port)          ( 0x2000UL * ((port) + 1))
+
+#define MV_EDMA_CONFIG_REG_OFFSET               0x000
+#define MV_EDMA_CONFIG_Q_DEPTH_MASK             0x1f
+#define MV_EDMA_CONFIG_NATIVE_QUEUING_MASK      MV_BIT5 /* Relevant for 60x1 */
+#define MV_EDMA_CONFIG_BURST_SIZE_MASK          MV_BIT8
+#define MV_EDMA_CONFIG_EQUEUE_ENABLED_MASK      MV_BIT9
+#define MV_EDMA_CONFIG_STOP_ON_ERROR_MASK       MV_BIT10
+#define MV_EDMA_CONFIG_BURST_SIZE_EXT_MASK      MV_BIT11
+#define MV_EDMA_CONFIG_CONONDEVERR_MASK			MV_BIT14
+
+#define MV_EDMA_TIMER_REG_OFFSET                0x004
+
+#define MV_EDMA_INTERRUPT_ERROR_CAUSE_REG_OFFSET 0x008
+
+#define MV_EDMA_INTERRUPT_ERROR_MASK_REG_OFFSET  0x00c
+
+/* unrecoverable EDMA errors*/
+#define MV_EDMA_GEN_I_UNRECOVERABLE_EDMA_ERROR		0x00001E6B
+#define MV_EDMA_GEN_I_RECOVERABLE_EDMA_ERROR		0x00000000
+#define MV_EDMA_GEN_I_ERROR_MASK					0x00001118
+
+#define MV_EDMA_GEN_II_UNRECOVERABLE_EDMA_ERROR		0xFC1E9E0B
+#define MV_EDMA_GEN_II_RECOVERABLE_EDMA_ERROR		0x03E16020
+#define MV_EDMA_GEN_II_NORMAL_RCVRBL_EDMA_ERROR		0x02200000
+
+/*don't enable rcvrbl errors that occur too often*/
+#define MV_EDMA_GEN_II_ERROR_MASK					0xFDDFF198
+
+
+#define MV_EDMA_REQUEST_Q_BAH_REG_OFFSET        0x010
+
+#define MV_EDMA_REQUEST_Q_INP_REG_OFFSET        0x014
+#define MV_EDMA_REQUEST_Q_INP_MASK              0x000003e0
+#define MV_EDMA_REQUEST_Q_INP_OFFSET            5
+#define MV_EDMA_REQUEST_Q_BA_MASK               0xfffffc00
+
+#define MV_EDMA_GEN2E_REQUEST_Q_INP_MASK        0x00000fe0
+#define MV_EDMA_GEN2E_REQUEST_Q_BA_MASK         0xfffff000
+
+#define MV_EDMA_REQUEST_Q_OUTP_REG_OFFSET       0x018
+#define MV_EDMA_REQUEST_Q_OUTP_MASK             0x000003e0
+
+#define MV_EDMA_RESPONSE_Q_BAH_REG_OFFSET       0x01c
+
+#define MV_EDMA_RESPONSE_Q_INP_REG_OFFSET       0x020
+#define MV_EDMA_RESPONSE_Q_INP_MASK             0x000000f8
+
+#define MV_EDMA_RESPONSE_Q_OUTP_REG_OFFSET      0x024
+#define MV_EDMA_RESPONSE_Q_OUTP_MASK            0x000000f8
+#define MV_EDMA_RESPONSE_Q_OUTP_OFFSET          3
+
+#define MV_EDMA_RESPONSE_Q_BA_MASK              0xffffff00
+
+
+#define MV_EDMA_COMMAND_REG_OFFSET              0x028
+#define MV_EDMA_COMMAND_ENABLE_MASK             MV_BIT0
+#define MV_EDMA_COMMAND_DISABLE_MASK            MV_BIT1
+#define MV_EDMA_COMMAND_HARD_RST_MASK           MV_BIT2
+
+#define MV_EDMA_TEST_CONTROL_REG_OFFSET         0x02c
+#define MV_EDMA_LOOPBACK_MODE_BIT               MV_BIT1
+
+#define MV_EDMA_STATUS_REG_OFFSET               0x030
+#define MV_EDMA_STATUS_TAG_MASK                 0x1f
+#define MV_EDMA_STATUS_TAG_OFFSET               0
+#define MV_EDMA_STATUS_ECACHE_EMPTY_BIT			MV_BIT6
+#define MV_EDMA_STATUS_EDMA_IDLE_BIT			MV_BIT7
+
+
+#define MV_EDMA_IORDY_TIMEOUT_REG_OFFSET        0x034
+
+#define MV_EDMA_ARBITER_CNFG_REG_OFFSET         0x038
+#define MV_EDMA_NO_SNOOP_BIT                    MV_BIT6
+
+#define MV_EDMA_CMD_DELAY_THRE_REG_OFFSET       0x040
+
+#define MV_EDMA_HALT_CONDITIONS_REG_OFFSET      0x060
+
+#define MV_EDMA_TCQ_STATUS_REG_OFFSET           0x08c
+
+#define MV_EDMA_NCQTCQ0_OUTSTANDING_REG_OFFSET	0x094
+#define MV_EDMA_NCQTCQ1_OUTSTANDING_REG_OFFSET	0x098
+#define MV_EDMA_NCQTCQ2_OUTSTANDING_REG_OFFSET	0x09c
+#define MV_EDMA_NCQTCQ3_OUTSTANDING_REG_OFFSET	0x0a0
+
+#define MV_EDMA_FIS_CONFIGURATION_REG_OFFSET	0x360
+#define MV_EDMA_FIS_INTERRUPT_CAUSE_REG_OFFSET	0x364
+#define MV_EDMA_FIS_INTERRUPT_MASK_REG_OFFSET	0x368
+/* C2C */
+/* BM DMA */
+#define MV_BMDMA_COMMAND_OFFSET                 0x224
+#define MV_BMDMA_STATUS_OFFSET                  0x228
+#define MV_BMDMA_PRD_TABLE_LOW_ADDRESS_OFFSET   0x22c
+#define MV_BMDMA_PRD_TABLE_HIGH_ADDRESS_OFFSET  0x230
+
+/* storage device registers*/
+
+#define MV_ATA_DEVICE_PIO_DATA_REG_OFFSET       0x100
+#define MV_ATA_DEVICE_FEATURES_REG_OFFSET       0x104
+#define MV_ATA_DEVICE_ERROR_REG_OFFSET          MV_ATA_DEVICE_FEATURES_REG_OFFSET
+#define MV_ATA_DEVICE_SECTOR_COUNT_REG_OFFSET   0x108
+#define MV_ATA_DEVICE_LBA_LOW_REG_OFFSET        0x10c
+#define MV_ATA_DEVICE_LBA_MID_REG_OFFSET        0x110
+#define MV_ATA_DEVICE_LBA_HIGH_REG_OFFSET       0x114
+#define MV_ATA_DEVICE_HEAD_REG_OFFSET           0x118
+#define MV_ATA_DEVICE_COMMAND_REG_OFFSET        0x11c
+#define MV_ATA_DEVICE_STATUS_REG_OFFSET         MV_ATA_DEVICE_COMMAND_REG_OFFSET
+#define MV_ATA_DEVICE_CONTROL_REG_OFFSET        0x120
+#define MV_ATA_DEVICE_ALTERNATE_REG_OFFSET      MV_ATA_DEVICE_CONTROL_REG_OFFSET
+
+#define MV_IOG_TRANS_LOW_BIT      (MV_BIT19)
+#define MV_IOG_TRANS_HIGH_BIT     (MV_BIT20)
+#define MV_IOG_TRANS_INT_MASK     (MV_IOG_TRANS_LOW_BIT | MV_IOG_TRANS_HIGH_BIT)
+#define MV_IOG_TRANS_LOW_REG_OFFSET  0x18088
+#define MV_IOG_TRANS_HIGH_REG_OFFSET 0x1808C
+#define MV_IOG_TRANS_CTRL_REG_OFFSET 0x18048
+
+#define MV_SATA_MAX_ADDR_DECODE_WIN 4
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* __INCmvRegs */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/sata/CoreDriver/mvLog.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/sata/CoreDriver/mvLog.c
@@ -0,0 +1,195 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+/*******************************************************************************
+* mvLog - C File for implementation of the core driver logger
+*
+* DESCRIPTION:
+*       None.
+*
+* DEPENDENCIES:
+*
+*******************************************************************************/
+#include "mvSataSoc.h"
+#include "mvOsS.h"
+
+
+#if defined (MV_LOG_DEBUG) || defined (MV_LOG_ERROR)
+
+const char* mvLogMsgType[MV_MAX_MESSAGE_TYPE] = {
+    " (FATAL_ERROR) ",
+    " (ERROR) ",
+    " (DEBUG INIT) ",
+    " (DEBUG INTERRUPTS) ",
+    " (DEBUG SATA LINK) ",
+    " (DEBUG UDMA COMMAND) ",
+    " (DEBUG NON UDMA COMMAND) ",
+    " (DEBUG PM) ",
+    " (DEBUG) ",
+    " (INFO) ",
+};
+
+static MV_LOG_FILTER_HEADER mvLogInstance[MV_MAX_LOG_MODULES] =
+{
+    {MV_FALSE, 0, NULL},
+    {MV_FALSE, 0, NULL},
+    {MV_FALSE, 0, NULL},
+    {MV_FALSE, 0, NULL},
+    {MV_FALSE, 0, NULL},
+    {MV_FALSE, 0, NULL},
+    {MV_FALSE, 0, NULL},
+    {MV_FALSE, 0, NULL},
+};
+
+static char szMessageBuffer[1024];
+
+
+MV_BOOLEAN mvLogRegisterModule(MV_U8 moduleId, MV_U32 filterMask, const char* name)
+{
+    if (moduleId >= MV_MAX_LOG_MODULES)
+    {
+        return MV_FALSE;
+    }
+    if (mvLogInstance[moduleId].used == MV_TRUE)
+    {
+        return MV_FALSE;
+    }
+    if (name == NULL)
+    {
+        return MV_FALSE;
+    }
+    mvLogInstance[moduleId].filterMask = filterMask;
+    mvLogInstance[moduleId].name = name;
+    mvLogInstance[moduleId].used = MV_TRUE;
+    return MV_TRUE;
+}
+
+MV_BOOLEAN mvLogSetModuleFilter(MV_U8 moduleId, MV_U32 filterMask)
+{
+    if (moduleId >= MV_MAX_LOG_MODULES)
+    {
+        return MV_FALSE;
+    }
+    if (mvLogInstance[moduleId].used == MV_FALSE)
+    {
+        return MV_FALSE;
+    }
+    mvLogInstance[moduleId].filterMask = filterMask;
+    return MV_TRUE;
+}
+
+
+MV_U32 mvLogGetModuleFilter(MV_U8 moduleId)
+{
+    if (moduleId >= MV_MAX_LOG_MODULES)
+    {
+        return 0;
+    }
+    if (mvLogInstance[moduleId].used == MV_FALSE)
+    {
+        return 0;
+    }
+    return mvLogInstance[moduleId].filterMask;
+}
+
+void mvLogMsg(MV_U8 moduleId, MV_U32 type, const char* format, ...)
+{
+    int len;
+    va_list args;
+
+    if (moduleId >= MV_MAX_LOG_MODULES)
+    {
+        return;
+    }
+    if ((moduleId != MV_RAW_MSG_ID) &&
+        ((mvLogInstance[moduleId].used == MV_FALSE) ||
+         ((mvLogInstance[moduleId].filterMask & type) == 0)))
+    {
+        return;
+    }
+    if ((moduleId != MV_RAW_MSG_ID) && (type & 0x1ff))
+    {
+        MV_U8 msgType = 0;
+        /* find least significant 1*/
+        while (msgType < MV_MAX_MESSAGE_TYPE)
+        {
+            if (type & ( 1 << msgType))
+            {
+                break;
+            }
+            msgType++;
+        }
+        len = sprintf(szMessageBuffer, "%s%s",
+                      mvLogInstance[moduleId].name, mvLogMsgType[msgType]);
+    }
+    else
+    {
+        len = 0;
+    }
+    va_start(args, format);
+    vsprintf(&szMessageBuffer[len], format, args);
+    va_end(args);
+    MV_LOG_PRINT("%s", szMessageBuffer);
+}
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/sata/CoreDriver/mvSata.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/sata/CoreDriver/mvSata.h
@@ -0,0 +1,797 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+/*******************************************************************************
+* mvSata.h - Header File for mvSata.c.
+*
+* DESCRIPTION:
+*       None.
+*
+* DEPENDENCIES:
+*       mvOs.h
+*       ATA/ATAPI-6 standard
+*
+*******************************************************************************/
+#ifndef __INCmvSatah
+#define __INCmvSatah
+#ifdef __cplusplus
+extern "C" /*{*/
+#endif /* __cplusplus */
+
+/* Includes */
+#include "mvOsS.h"
+#include "mvRegs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+
+/* Definitions */
+#define MV_CORE_DRIVER_LOG_ID                   0
+
+
+
+/* MV88SX50XX specific defines */
+#define MV_SATA_VENDOR_ID                       0x11AB
+#define MV_SATA_DEVICE_ID_5080                  0x5080
+#define MV_SATA_DEVICE_ID_5081                  0x5081
+#define MV_SATA_DEVICE_ID_5040                  0x5040
+#define MV_SATA_DEVICE_ID_5041                  0x5041
+#define MV_SATA_DEVICE_ID_6041                  0x6041
+#define MV_SATA_DEVICE_ID_6081                  0x6081
+#define MV_SATA_DEVICE_ID_6042                  0x6042
+#define MV_SATA_DEVICE_ID_7042                  0x7042
+#define MV_SATA_DEVICE_ID_5182                  0x5182 /*88F5182 integrated sata*/
+#define MV_SATA_DEVICE_ID_5082                  0x5082 /*88F5082 integrated sata*/
+#define MV_SATA_DEVICE_ID_6082                  0x6082 /* Same device ID for 6082L */
+#define MV_SATA_DEVICE_ID_6490                  0x6490 /*64660 integrated sata*/
+
+#define MV_SATA_DEVICE_ID_78XX0                 0x7800 /*78x00 Z0/Y0 integrated sata*/
+#define MV_SATA_DEVICE_ID_78100                 0x7810 /*78100 integrated sata*/
+#define MV_SATA_DEVICE_ID_78200                 0x7820 /*78200 integrated sata*/
+#define MV_SATA_DEVICE_ID_76100                 0x7610 /*76100 integrated sata*/
+#define MV_SATA_DEVICE_ID_6323                  0x6323 /*6323 integrated sata*/
+
+#define MV_SATA_DEVICE_ID_6281                 0x6281 /*88f6281 integrated sata*/
+#define MV_SATA_DEVICE_ID_6282                 0x1155 /*88f6282 integrated sata*/
+#define MV_SATA_DEVICE_ID_6192                 0x6192 /*88f6192 integrated sata*/
+#define MV_SATA_DEVICE_ID_6190                 0x6190 /*88f6190 integrated sata*/
+
+#define MV_SATA_DEVICE_ID_6781                 0x6781 /*88f6781 integrated sata*/
+
+#define MV_SATA_DEVICE_ID_6550		       0x6550 /*88f6550 integrated sata*/
+#define MV_SATA_DEVICE_ID_6560		       0x6560 /*88f6560 integrated sata*/
+
+#define MV_SATA_CHANNELS_NUM                    8
+#define MV_SATA_UNITS_NUM                       2
+
+#define MV_SATA_5082_PORT_NUM                   1
+#define MV_SATA_5182_PORT_NUM                   2
+#define MV_SATA_6082_PORT_NUM                   1
+#define MV_SATA_6490_PORT_NUM                   1
+#define MV_SATA_6281_PORT_NUM                   2
+#define MV_SATA_6282_PORT_NUM                   2
+#define MV_SATA_6192_PORT_NUM                   2
+#define MV_SATA_6190_PORT_NUM                   1
+#define MV_SATA_6781_PORT_NUM                   1
+#define MV_SATA_78XX0_PORT_NUM                  2
+#define MV_SATA_76100_PORT_NUM                  1
+#define MV_SATA_6323_PORT_NUM                   1
+
+#define MV_SATA_65XX_PORT_NUM			1
+
+#define MV_SATA_PM_MAX_PORTS                    15
+#define MV_SATA_PM_CONTROL_PORT                 15
+
+#define MV_EDMA_QUEUE_LENGTH                    32  /* Up to 32 outstanding  */
+#define MV_EDMA_GEN2E_QUEUE_LENGTH              128
+
+/* commands per SATA channel*/
+#ifndef MV_SATA_OVERRIDE_SW_QUEUE_SIZE
+    #define MV_SATA_SW_QUEUE_SIZE                   (MV_EDMA_QUEUE_LENGTH -1)
+#else
+    #define MV_SATA_SW_QUEUE_SIZE                   MV_SATA_REQUESTED_SW_QUEUE_SIZE
+#endif
+
+#ifdef MV_SATA_SUPPORT_GEN2E_128_QUEUE_LEN
+    #ifndef MV_SATA_OVERRIDE_GEN2E_SW_QUEUE_SIZE
+        #define MV_SATA_GEN2E_SW_QUEUE_SIZE                   (MV_EDMA_GEN2E_QUEUE_LENGTH -1)
+    #else
+        #define MV_SATA_GEN2E_SW_QUEUE_SIZE                   MV_SATA_REQUESTED_GEN2E_SW_QUEUE_SIZE
+    #endif
+#else
+    #define MV_SATA_GEN2E_SW_QUEUE_SIZE         (MV_SATA_SW_QUEUE_SIZE)
+#endif
+
+#if ((MV_SATA_SW_QUEUE_SIZE) >= (MV_EDMA_QUEUE_LENGTH))
+#error "FATAL ERROR: Bad Value for MV_SATA_SW_QUEUE_SIZE "
+#endif
+#if ((MV_SATA_GEN2E_SW_QUEUE_SIZE) >= (MV_EDMA_GEN2E_QUEUE_LENGTH))
+#error "FATAL ERROR: Bad Value for MV_EDMA_GEN2E_QUEUE_LENGTH "
+#endif
+#if ((MV_SATA_SW_QUEUE_SIZE) > (MV_SATA_GEN2E_SW_QUEUE_SIZE))
+#error "FATAL ERROR: MV_SATA_SW_QUEUE_SIZE bigger than MV_EDMA_GEN2E_QUEUE_LENGTH"
+#endif
+
+#if (((MV_SATA_GEN2E_SW_QUEUE_SIZE) * 4) > ((MV_SATA_SW_QUEUE_SIZE) * 8))
+#define _MV_SATA_COMMANDS_PER_ADAPTER ((MV_SATA_GEN2E_SW_QUEUE_SIZE) * 4)
+#else
+#define _MV_SATA_COMMANDS_PER_ADAPTER ((MV_SATA_SW_QUEUE_SIZE) * 8)
+#endif
+
+#define MV_EDMA_QUEUE_MASK                      0x1F
+#define MV_EDMA_REQUEST_ENTRY_SIZE              32
+#define MV_EDMA_RESPONSE_ENTRY_SIZE             8
+#define MV_EDMA_REQUEST_QUEUE_SIZE              1024 /* 32*32 = 1KBytes */
+#define MV_EDMA_RESPONSE_QUEUE_SIZE             256  /* 32*8 = 256 Bytes */
+
+#define MV_EDMA_GEN2E_QUEUE_MASK                      0x7F
+#define MV_EDMA_GEN2E_REQUEST_QUEUE_SIZE              4096 /* 128*32 = 4KBytes */
+#define MV_EDMA_GEN2E_RESPONSE_QUEUE_SIZE             1024  /* 128*8 = 1KBytes */
+
+#define MV_EDMA_PRD_ENTRY_SIZE                  16      /* 16Bytes*/
+#define MV_EDMA_PRD_NO_SNOOP_FLAG               MV_BIT0
+#define MV_EDMA_PRD_EOT_FLAG                    MV_BIT15
+
+#define MV_ATA_IDENTIFY_DEV_DATA_LENGTH         256 /* number of words(2 byte)*/
+#define MV_ATA_MODEL_NUMBER_LEN                 40
+#define ATA_SECTOR_SIZE                         512
+#define ATA_SECTOR_SIZE_IN_WORDS                256
+
+#define MV_SATA_COMM_INIT_DELAY                 1000 /*1000 us*/
+#define MV_SATA_COMM_INIT_WAIT_DELAY            20000 /*20 ms*/
+
+/*Channel to Channel*/
+#ifdef MV_SATA_C2C_COMM
+    #define MV_SATA_REGISTER_HOST_2_DEVICE_FIS         0x00000034
+    #define MV_SATA_DMA_ACTIVATE_FIS                   0x00000039
+    #define MV_C2C_MESSAGE_SIZE                        10
+
+#endif
+
+#ifdef MV_SATA_IO_GRANULARITY
+    #define MV_IOG_QUEUE_SIZE           0x40
+    #define MV_IOG_INVALID_COMMAND_ID   MV_IOG_QUEUE_SIZE
+#endif
+
+/* Typedefs    */
+typedef enum mvUdmaType
+{
+    MV_UDMA_TYPE_READ, MV_UDMA_TYPE_WRITE
+} MV_UDMA_TYPE;
+
+typedef enum mvFlushType
+{
+    MV_FLUSH_TYPE_CALLBACK, MV_FLUSH_TYPE_NONE
+} MV_FLUSH_TYPE;
+
+typedef enum mvCompletionType
+{
+    MV_COMPLETION_TYPE_NORMAL, MV_COMPLETION_TYPE_ERROR,
+    MV_COMPLETION_TYPE_ABORT
+} MV_COMPLETION_TYPE;
+
+typedef enum mvEventType
+{
+    MV_EVENT_TYPE_ADAPTER_ERROR, MV_EVENT_TYPE_SATA_CABLE,
+    MV_EVENT_TYPE_SATA_ERROR
+} MV_EVENT_TYPE;
+
+typedef enum mvSataCableEvent
+{
+    MV_SATA_CABLE_EVENT_DISCONNECT = 0,
+    MV_SATA_CABLE_EVENT_CONNECT,
+    MV_SATA_CABLE_EVENT_PM_HOT_PLUG
+} MV_SATA_CABLE_EVENT;
+
+typedef enum mvSataErrorEvent
+{
+    MV_SATA_RECOVERABLE_COMMUNICATION_ERROR = 0,
+    MV_SATA_UNRECOVERABLE_COMMUNICATION_ERROR,
+    MV_SATA_DEVICE_ERROR
+} MV_SATA_ERROR_EVENT;
+
+#ifdef MV_SATA_C2C_COMM
+typedef enum mvC2CEventType
+{
+    MV_C2C_REGISTER_DEVICE_TO_HOST_FIS_DONE,
+    MV_C2C_REGISTER_DEVICE_TO_HOST_FIS_ERROR,
+    MV_C2C_BM_DMA_DONE,
+    MV_C2C_BM_DMA_ERROR,
+} MV_C2C_EVENT_TYPE;
+#endif
+
+typedef enum mvEdmaMode
+{
+    MV_EDMA_MODE_QUEUED,
+    MV_EDMA_MODE_NOT_QUEUED,
+    MV_EDMA_MODE_NATIVE_QUEUING
+} MV_EDMA_MODE;
+
+typedef enum mvQueueCommandResult
+{
+    MV_QUEUE_COMMAND_RESULT_OK = 0,
+    MV_QUEUE_COMMAND_RESULT_QUEUED_MODE_DISABLED,
+    MV_QUEUE_COMMAND_RESULT_FULL,
+    MV_QUEUE_COMMAND_RESULT_BAD_LBA_ADDRESS,
+    MV_QUEUE_COMMAND_RESULT_BAD_PARAMS
+} MV_QUEUE_COMMAND_RESULT;
+
+typedef enum mvNonUdmaProtocol
+{
+    MV_NON_UDMA_PROTOCOL_NON_DATA,
+    MV_NON_UDMA_PROTOCOL_PIO_DATA_IN,
+    MV_NON_UDMA_PROTOCOL_PIO_DATA_OUT,
+    MV_NON_UDMA_PROTOCOL_PACKET_PIO_NON_DATA,
+    MV_NON_UDMA_PROTOCOL_PACKET_PIO_DATA_IN,
+    MV_NON_UDMA_PROTOCOL_PACKET_PIO_DATA_OUT,
+    MV_NON_UDMA_PROTOCOL_PACKET_DMA,
+    MV_NON_UDMA_PROTOCOL_UNKNOWN
+} MV_NON_UDMA_PROTOCOL;
+
+typedef enum mvSataGeneration
+{
+    MV_SATA_GEN_I, MV_SATA_GEN_II, MV_SATA_GEN_IIE
+} MV_SATA_GEN;
+
+typedef enum mvSataInterfaceSpeed
+{
+    MV_SATA_IF_SPEED_1_5_GBPS, MV_SATA_IF_SPEED_3_GBPS,
+    MV_SATA_IF_SPEED_NO_LIMIT, MV_SATA_IF_SPEED_INVALID
+} MV_SATA_IF_SPEED;
+
+typedef enum mvSataInterfacePowerState
+{
+    MV_SATA_IF_POWER_PHY_READY = 1, MV_SATA_IF_POWER_PARTIAL = 2,
+    MV_SATA_IF_POWER_SLUMBER = 6
+} MV_SATA_IF_POWER_STATE;
+
+#ifdef MV_SATA_C2C_COMM
+typedef enum mvSataC2CMode
+{
+    MV_SATA_C2C_MODE_INITIATOR, MV_SATA_C2C_MODE_TARGET
+} MV_SATA_C2C_MODE;
+#endif
+
+typedef enum mvSataDeviceType
+{
+    MV_SATA_DEVICE_TYPE_UNKNOWN = 0,
+    MV_SATA_DEVICE_TYPE_ATA_DISK,
+    MV_SATA_DEVICE_TYPE_ATAPI_DEVICE,
+    MV_SATA_DEVICE_TYPE_PM
+} MV_SATA_DEVICE_TYPE;
+
+typedef enum mvPMSwitchingmode
+{   
+    MV_SATA_SWITCHING_MODE_NONE = 0,
+    MV_SATA_SWITCHING_MODE_CBS,
+    MV_SATA_SWITCHING_MODE_QCBS,
+    MV_SATA_SWITCHING_MODE_FBS,
+}MV_SATA_SWITCHING_MODE;
+
+struct mvDmaRequestQueueEntry;
+struct mvDmaResponseQueueEntry;
+struct mvDmaCommandEntry;
+
+struct mvSataAdapter;
+struct mvStorageDevRegisters;
+struct mvSataChannel;
+
+typedef MV_BOOLEAN (* mvSataCommandCompletionCallBack_t)(struct mvSataAdapter *,
+                                                         MV_U8,
+                                                         MV_COMPLETION_TYPE,
+                                                         MV_VOID_PTR, MV_U16,
+                                                         MV_U32,
+                                                         struct mvStorageDevRegisters *);
+#ifdef MV_SATA_C2C_COMM
+typedef  MV_BOOLEAN (*C2CCallBack_t)(struct mvSataAdapter *,
+                                     struct mvSataChannel *,
+                                     MV_C2C_EVENT_TYPE event,
+                                     MV_U32 msgSize,
+                                     MV_U8* msg);
+
+#endif
+
+typedef enum mvQueuedCommandType
+{
+    MV_QUEUED_COMMAND_TYPE_UDMA,
+    MV_QUEUED_COMMAND_TYPE_NONE_UDMA,
+    MV_QUEUED_COMMAND_TYPE_PACKET
+} MV_QUEUED_COMMAND_TYPE;
+
+#ifdef MV_SATA_IO_GRANULARITY
+typedef enum mvIogQueuedCommandType
+{
+    MV_IOG_COMMAND_TYPE_FIRST,
+    MV_IOG_COMMAND_TYPE_NEXT
+}   MV_IOG_COMMAND_TYPE;
+#endif
+
+typedef enum mvSataInterruptScheme
+{
+    MV_SATA_INTERRUPT_HANDLING_IN_ISR,
+    MV_SATA_INTERRUPT_HANDLING_IN_TASK,
+    MV_SATA_INTERRUPTS_DISABLED
+}MV_SATA_INTERRUPT_SCHEME;
+
+typedef struct mvUdmaCommandParams
+{
+    MV_UDMA_TYPE readWrite;
+    MV_BOOLEAN   isEXT;
+    MV_BOOLEAN   FUA;
+    MV_U32       lowLBAAddress;
+    MV_U16       highLBAAddress;
+    MV_U16       numOfSectors;
+    MV_U32       prdLowAddr;
+    MV_U32       prdHighAddr;
+#ifdef MV_SATA_SUPPORT_EDMA_SINGLE_DATA_REGION
+    MV_BOOLEAN   singleDataRegion;
+    MV_U16       byteCount;
+#endif
+    mvSataCommandCompletionCallBack_t callBack;
+    MV_VOID_PTR  commandId;
+#ifdef MV_SATA_IO_GRANULARITY
+    MV_BOOLEAN   ioGranularityEnabled;
+    MV_IOG_COMMAND_TYPE  iogCommandType;
+    union
+    {
+        MV_U8 transId;
+        MV_U8 transCount;
+    }   ioGranularityCommandParam;
+    MV_U8 iogCurrentTransId;
+#endif
+} MV_UDMA_COMMAND_PARAMS;
+
+typedef struct mvNoneUdmaCommandParams
+{
+    MV_NON_UDMA_PROTOCOL protocolType;
+    MV_BOOLEAN  isEXT;
+    MV_U16_PTR  bufPtr;
+    MV_U32      count;
+    MV_U16      features;
+    MV_U16      sectorCount;
+    MV_U16      lbaLow;
+    MV_U16      lbaMid;
+    MV_U16      lbaHigh;
+    MV_U8       device;
+    MV_U8       command;
+    mvSataCommandCompletionCallBack_t callBack;
+    MV_VOID_PTR  commandId;
+} MV_NONE_UDMA_COMMAND_PARAMS;
+
+typedef struct mvPacketCommandParams
+{
+    MV_NON_UDMA_PROTOCOL protocolType;
+    MV_U16_PTR  bufPtr;
+    MV_U32      buffer_len;
+    MV_U32      transfered_data;
+    MV_U8       cdb_len;
+    MV_U16_PTR  cdb_buffer; /*SCSI command desciptor block*/
+    MV_U8       flags;/* bit 0:1-> DMA write*/
+                      /* bit 1:1-> single Data Region*/
+    MV_U32      prdLowAddr;
+    MV_U32      prdHighAddr;
+    mvSataCommandCompletionCallBack_t callBack;
+    MV_VOID_PTR  commandId;
+} MV_PACKET_COMMAND_PARAMS;
+
+typedef struct mvQueueCommandInfo
+{
+    MV_QUEUED_COMMAND_TYPE  type;
+    MV_U8   PMPort;
+    union
+    {
+        MV_UDMA_COMMAND_PARAMS      udmaCommand;
+        MV_NONE_UDMA_COMMAND_PARAMS NoneUdmaCommand;
+        MV_PACKET_COMMAND_PARAMS     packetCommand;
+    } commandParams;
+} MV_QUEUE_COMMAND_INFO;
+
+/* The following structure is for the Core Driver internal usage */
+typedef struct mvQueuedCommandEntry
+{
+    MV_BOOLEAN   isFreeEntry;
+    /*MV_U8        commandTag;*/
+    MV_U8        hostTag;
+    MV_U8        deviceTag;
+    MV_BOOLEAN   isCommandInEdma:1;
+    MV_BOOLEAN   commandAborted:1;
+    struct mvQueuedCommandEntry *next;
+    struct mvQueuedCommandEntry *prev;
+    MV_QUEUE_COMMAND_INFO   *pCommandInfo;
+#ifndef MV_SATA_STORE_COMMANDS_INFO_ON_IAL_STACK
+    MV_QUEUE_COMMAND_INFO   commandInfo;
+#endif
+} MV_QUEUED_COMMAND_ENTRY;
+
+
+typedef enum mvErrorHandlingState
+{
+    MV_ERROR_HANDLING_STATE_IDLE,
+    MV_ERROR_HANDLING_STATE_WAIT_FOR_COMPLETIONS,
+    MV_ERROR_HANDLING_STATE_WAIT_FOR_BUSY,
+    MV_ERROR_HANDLING_STATE_REQUEST_SENSE
+}MV_ERROR_HANDLING_STATE;
+
+typedef struct
+{
+    MV_ERROR_HANDLING_STATE state;
+    MV_U16                      PortsWithErrors;/*which ports reported errors*/
+    MV_U8                       CurrPort;
+    MV_QUEUED_COMMAND_ENTRY     *pReadLogExtEntry;
+    MV_U16_PTR                  ReadLogExtBuffer;
+    MV_BOOLEAN                  useVendorUniqGen2WA;
+}MV_ERROR_HANDLING_INFO;
+
+/*for internal usage*/
+#define MV_SATA_TAGS_PER_POOL                   32
+#ifdef MV_SATA_SUPPORT_GEN2E_128_QUEUE_LEN
+    #define MV_SATA_GEN2E_TAG_POOLS_NUM         (MV_SATA_PM_MAX_PORTS + 1)
+    #define MV_SATA_GEN2E_TAG_PMPORT_MASK       0x0F
+#else
+    #define MV_SATA_GEN2E_TAG_POOLS_NUM         1
+    #define MV_SATA_GEN2E_TAG_PMPORT_MASK       0x00
+#endif
+
+struct _mvTagsStack
+{
+    MV_U8   *pTagsArray;
+    MV_U8   top;
+};
+struct _mvChannelTags
+{
+    struct _mvTagsStack  HostTagsPool;
+    struct _mvTagsStack  DeviceTagsPool[MV_SATA_GEN2E_TAG_POOLS_NUM];
+    MV_U8               HostTags[MV_SATA_GEN2E_SW_QUEUE_SIZE];
+    MV_U8               DeviceTags[MV_SATA_GEN2E_TAG_POOLS_NUM][MV_SATA_TAGS_PER_POOL];
+};
+
+typedef enum mvHostInterfase
+{
+    MV_HOST_IF_INTEGRATED,   /*as in 5182*/
+    MV_HOST_IF_PEX,
+    MV_HOST_IF_PCI /*PCI/PCI-X*/
+}MV_HOST_IF;
+
+/* The following structures are part of the Core Driver API */
+typedef struct mvSataChannel
+{
+    /* Fields set by Intermediate Application Layer */
+    MV_U8                       channelNumber;
+    struct mvDmaRequestQueueEntry  *requestQueue;
+    struct mvDmaResponseQueueEntry *responseQueue;
+    MV_U32                      requestQueuePciHiAddress;
+    MV_U32                      requestQueuePciLowAddress;
+    MV_U32                      responseQueuePciHiAddress;
+    MV_U32                      responseQueuePciLowAddress;
+    /* DRQ Data Block size in sectors, Core Driver sets a default value of 1 */
+    /* sector in mvSataConfigureChannel*/
+    MV_U8                       DRQDataBlockSize;
+    /* Fields set by CORE driver */
+    struct mvSataAdapter        *mvSataAdapter;
+    MV_OS_SEMAPHORE             semaphore;
+    MV_U32                      eDmaRegsOffset;
+    MV_BOOLEAN                  EdmaActive;
+    MV_EDMA_MODE                queuedDMA;
+    MV_U8                       outstandingCommands;
+    MV_U8                       portQueuedCommands[MV_SATA_PM_MAX_PORTS + 1];
+    struct mvQueuedCommandEntry *commandsQueue;
+    struct mvQueuedCommandEntry *commandsQueueHead;
+    struct mvQueuedCommandEntry *commandsQueueTail;
+    MV_BOOLEAN                  queueCommandsEnabled;
+    MV_U8                       noneUdmaOutstandingCommands;
+#ifdef MV_SUPPORT_ATAPI
+    MV_U8                       packetOutstandingCommands;
+    MV_BOOLEAN                  waitForBMDMA;
+#endif
+    MV_U8                       EdmaQueuedCommands;
+    MV_U8                       commandsQueueSize;
+    struct _mvChannelTags       Tags;
+    MV_U8                       reqInPtr;
+    MV_U8                       rspOutPtr;
+    MV_U8       		EDMAQueuePtrMask;
+    MV_U32	                EDMARequestInpMask;
+    /* Port Multiplier fiels*/
+    MV_BOOLEAN                  PMSupported;
+    MV_SATA_DEVICE_TYPE         deviceType;
+    MV_BOOLEAN  		FBSEnabled;
+    MV_BOOLEAN                  use128Entries;
+#ifdef MV_SATA_C2C_COMM
+
+    /* Channel 2 Channel*/
+    MV_BOOLEAN                  C2CmodeEnabled;
+    MV_SATA_C2C_MODE            C2CMode;
+    C2CCallBack_t               C2CCallback;
+#endif
+    MV_U8                       recoveredErrorsCounter;
+    /* NCQ error handling*/
+    MV_ERROR_HANDLING_INFO  ErrorHandlingInfo;
+} MV_SATA_CHANNEL;
+
+
+
+typedef struct mvSataAdapter
+{
+    /* Fields set by Intermediate Application Layer */
+    MV_U32            adapterId;
+    MV_VOID_PTR       IALData;
+    MV_U8             pciConfigRevisionId;
+    MV_U16            pciConfigDeviceId;
+    MV_BUS_ADDR_T     adapterIoBaseAddress;
+    MV_U32            intCoalThre[MV_SATA_UNITS_NUM];
+    MV_U32            intTimeThre[MV_SATA_UNITS_NUM];
+    MV_BOOLEAN        (*mvSataEventNotify)(struct mvSataAdapter *,
+                                           MV_EVENT_TYPE,
+                                           MV_U32, MV_U32);
+    MV_SATA_CHANNEL   *sataChannel[MV_SATA_CHANNELS_NUM];
+    MV_U32            pciCommand;
+    MV_U32            pciSerrMask;
+    MV_U32            pciInterruptMask;
+
+
+    /* Fields set by CORE driver */
+    MV_SATA_GEN       sataAdapterGeneration;
+    MV_BOOLEAN        staggaredSpinup[MV_SATA_CHANNELS_NUM]; /* For 60x1 only */
+    MV_BOOLEAN        limitInterfaceSpeed[MV_SATA_CHANNELS_NUM]; /* For 60x1 only */
+    MV_SATA_IF_SPEED  ifSpeed[MV_SATA_CHANNELS_NUM];  /* For 60x1 only */
+    MV_SATA_IF_POWER_STATE ifPowerState[MV_SATA_CHANNELS_NUM];
+    MV_U8             numberOfChannels;/* 4 channels for 504x, 8 for 508x*/
+    MV_U8             numberOfUnits;/* 1 for 504x, 2 for 508x*/
+    MV_U8             portsPerUnit;
+    MV_OS_SEMAPHORE   semaphore;
+    MV_U32            mainMask;
+    MV_U32            mainMaskOffset;
+    MV_U32            mainCauseOffset;
+    MV_HOST_IF        hostInterface;
+    MV_BOOLEAN        interruptsAreMasked;
+    MV_SATA_INTERRUPT_SCHEME interruptsScheme;
+    MV_OS_SEMAPHORE   interruptsMaskSem;
+    MV_BOOLEAN        chipIs50XXB0;
+    MV_BOOLEAN        chipIs50XXB2;
+    MV_BOOLEAN        chipIs60X1B2;
+    MV_BOOLEAN        chipIs60X1C0;
+    MV_BOOLEAN        chipIs62X1Z0;
+    MV_BOOLEAN        chipIs65XXZ0;
+    MV_U8             signalAmps[MV_SATA_CHANNELS_NUM];
+    MV_U8             pre[MV_SATA_CHANNELS_NUM];
+    struct mvQueuedCommandEntry adapterCommands[_MV_SATA_COMMANDS_PER_ADAPTER];
+#ifdef MV_SATA_IO_GRANULARITY
+    MV_BOOLEAN        iogEnabled;
+    MV_U8             iogFreeIdsStack[MV_IOG_QUEUE_SIZE];
+    MV_U8             iogFreeIdsNum;
+    MV_OS_SEMAPHORE   iogSemaphore;
+#endif
+} MV_SATA_ADAPTER;
+
+/* this structure used by the IAL defines the PRD entries used by the EDMA HW */
+typedef struct mvSataEdmaPRDEntry
+{
+    volatile MV_U32 lowBaseAddr;
+    volatile MV_U16 byteCount;
+    volatile MV_U16 flags;
+    volatile MV_U32 highBaseAddr;
+    volatile MV_U32 reserved;
+}MV_SATA_EDMA_PRD_ENTRY;
+
+/* API Functions */
+
+/* CORE driver Adapter Management */
+MV_BOOLEAN mvSataInitAdapter(MV_SATA_ADAPTER *pAdapter);
+
+MV_BOOLEAN mvSataShutdownAdapter(MV_SATA_ADAPTER *pAdapter);
+
+MV_U32  mvSataReadReg(MV_SATA_ADAPTER *pAdapter, MV_U32 regOffset);
+
+MV_VOID mvSataWriteReg(MV_SATA_ADAPTER *pAdapter, MV_U32 regOffset,
+                       MV_U32 regValue);
+
+/* CORE driver SATA Channel Management */
+MV_BOOLEAN mvSataConfigureChannel(MV_SATA_ADAPTER *pAdapter,
+                                  MV_U8 channelIndex);
+
+MV_BOOLEAN mvSataRemoveChannel(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex);
+
+MV_BOOLEAN mvSataIsStorageDeviceConnected(MV_SATA_ADAPTER *pAdapter,
+                                          MV_U8 channelIndex, MV_U32 *SStatus);
+
+MV_BOOLEAN mvSataIfD2HReceived(MV_SATA_ADAPTER *pAdapter,
+			       MV_U8 channelIndex,
+			       MV_U8 port);
+
+MV_BOOLEAN mvSataChannelHardReset(MV_SATA_ADAPTER *pAdapter,
+                                  MV_U8 channelIndex);
+
+MV_BOOLEAN mvSataSetFBSMode(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex,
+							MV_BOOLEAN enableFBS, MV_BOOLEAN useQueueLen128);
+
+MV_BOOLEAN mvSataConfigEdmaMode(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex,
+                                MV_EDMA_MODE eDmaMode, MV_U8 maxQueueDepth);
+
+MV_BOOLEAN mvSataEnableChannelDma(MV_SATA_ADAPTER *pAdapter,
+                                  MV_U8 channelIndex);
+
+MV_BOOLEAN mvSataDisableChannelDma(MV_SATA_ADAPTER *pAdapter,
+                                   MV_U8 channelIndex);
+
+MV_BOOLEAN mvSataFlushDmaQueue(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex,
+                               MV_FLUSH_TYPE flushType);
+
+MV_U8 mvSataNumOfDmaCommands(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex);
+
+MV_U8 mvSataGetNumOfPortQueuedCommands(MV_SATA_ADAPTER *pAdapter,
+                                  MV_U8 channelIndex,
+                                  MV_U8 PMPort,
+                                  MV_U8 *pCommandsPerChannel);
+
+MV_BOOLEAN mvSataSetIntCoalParams (MV_SATA_ADAPTER *pAdapter, MV_U8 sataUnit,
+                                   MV_U32 intCoalThre, MV_U32 intTimeThre);
+
+MV_BOOLEAN mvSataSetChannelPhyParams(MV_SATA_ADAPTER *pAdapter,
+                                     MV_U8 channelIndex,
+                                     MV_U8 signalAmps, MV_U8 pre);
+
+MV_BOOLEAN mvSataChannelPhyShutdown(MV_SATA_ADAPTER *pAdapter,
+                                    MV_U8 channelIndex);
+
+MV_BOOLEAN mvSataChannelPhyPowerOn(MV_SATA_ADAPTER *pAdapter,
+                                   MV_U8 channelIndex);
+
+MV_BOOLEAN mvSataChannelFarLoopbackDiagnostic(MV_SATA_ADAPTER *pAdapter,
+                                              MV_U8 channelIndex);
+/* Queue ATA command */
+MV_QUEUE_COMMAND_RESULT mvSataQueueCommand(MV_SATA_ADAPTER *pAdapter,
+                                           MV_U8 channelIndex,
+                                           MV_QUEUE_COMMAND_INFO *pCommandParams);
+
+
+/* Interrupt Service Routine */
+MV_BOOLEAN mvSataInterruptServiceRoutine(MV_SATA_ADAPTER *pAdapter);
+
+MV_BOOLEAN mvSataMaskAdapterInterrupt(MV_SATA_ADAPTER *pAdapter);
+
+MV_BOOLEAN mvSataUnmaskAdapterInterrupt(MV_SATA_ADAPTER *pAdapter);
+
+MV_BOOLEAN mvSataCheckPendingInterrupt(MV_SATA_ADAPTER *pAdapter);
+
+MV_BOOLEAN mvSataSetInterruptsScheme(MV_SATA_ADAPTER *pAdapter,
+                                     MV_SATA_INTERRUPT_SCHEME interruptScheme);
+
+/*
+ * Staggered spin-ip support and SATA interface speed control
+ * (relevant for 60x1 adapters)
+ */
+MV_BOOLEAN mvSataEnableStaggeredSpinUpAll (MV_SATA_ADAPTER *pAdapter);
+
+MV_BOOLEAN mvSataEnableStaggeredSpinUp (MV_SATA_ADAPTER *pAdapter,
+                                        MV_U8 channelIndex);
+
+MV_BOOLEAN mvSataDisableStaggeredSpinUpAll (MV_SATA_ADAPTER *pAdapter);
+
+MV_BOOLEAN mvSataDisableStaggeredSpinUp (MV_SATA_ADAPTER *pAdapter,
+                                         MV_U8 channelIndex);
+
+
+MV_BOOLEAN mvSataSetInterfaceSpeed (MV_SATA_ADAPTER *pAdapter,
+                                    MV_U8 channelIndex,
+                                    MV_SATA_IF_SPEED ifSpeed);
+
+MV_SATA_IF_SPEED mvSataGetInterfaceSpeed (MV_SATA_ADAPTER *pAdapter,
+                                          MV_U8 channelIndex);
+
+MV_BOOLEAN mvSataSetInterfacePowerState (MV_SATA_ADAPTER *pAdapter,
+                                         MV_U8 channelIndex,
+                                         MV_SATA_IF_POWER_STATE ifPowerState);
+
+MV_BOOLEAN mvSataGetInterfacePowerState (MV_SATA_ADAPTER *pAdapter,
+                                         MV_U8 channelIndex,
+                                         MV_SATA_IF_POWER_STATE *ifPowerState);
+
+/* Command Completion and Event Notification (user implemented) */
+MV_BOOLEAN mvSataEventNotify(MV_SATA_ADAPTER *, MV_EVENT_TYPE ,
+                             MV_U32, MV_U32);
+#ifdef MV_SATA_C2C_COMM
+
+/* Channel 2 Channel communication */
+MV_BOOLEAN mvSataC2CInit (MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex,
+                          MV_SATA_C2C_MODE mvSataC2CMode,
+                          C2CCallBack_t mvSataC2CCallBack);
+
+MV_BOOLEAN mvSataC2CStop (MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex);
+
+
+MV_BOOLEAN  mvSataC2CSendRegisterDeviceToHostFIS(
+                                                MV_SATA_ADAPTER *pAdapter,
+                                                MV_U8 channelIndex,
+                                                MV_U8 pmPort,
+                                                MV_BOOLEAN bInterrupt,
+                                                MV_U8 message[MV_C2C_MESSAGE_SIZE]);
+
+MV_BOOLEAN  mvSataC2CActivateBmDma(MV_SATA_ADAPTER *pAdapter,
+                                   MV_U8 channelIndex,
+                                   MV_U8 pmPort,
+                                   MV_U32 prdTableHi,
+                                   MV_U32 prdTableLow,
+                                   MV_UDMA_TYPE dmaType);
+
+MV_BOOLEAN mvSataC2CResetBmDma(MV_SATA_ADAPTER *pAdapter,
+                               MV_U8 channelIndex);
+
+#endif
+
+#ifdef MV_SATA_IO_GRANULARITY
+
+MV_BOOLEAN mvSataEnableIoGranularity(MV_SATA_ADAPTER *pAdapter,
+                                     MV_BOOLEAN enable);
+
+#endif
+MV_BOOLEAN mvSata60X1B2CheckDevError(MV_SATA_ADAPTER *pAdapter,
+                                       MV_U8 channelIndex);
+
+
+MV_STATUS mvSataWinInit(MV_UNIT_WIN_INFO *addrWinMap);
+MV_STATUS mvSataWinRead(MV_U32 dev, MV_U32 winNum, MV_UNIT_WIN_INFO *pAddrDecWin);
+MV_STATUS mvSataWinWrite(MV_U32 dev, MV_U32 winNum, MV_UNIT_WIN_INFO *pAddrDecWin);
+
+#ifdef __cplusplus
+
+/*}*/
+#endif /* __cplusplus */
+
+#endif /* __INCmvSatah */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/sata/CoreDriver/mvStorageDev.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/sata/CoreDriver/mvStorageDev.h
@@ -0,0 +1,352 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+/*******************************************************************************
+* mvStorageDev.h - Header File for mvStorageDev.c.
+*
+* DESCRIPTION:
+*       None.
+*
+* DEPENDENCIES:
+*       mvSata.h.
+*       mvOs.h.
+*       ATA/ATAPI-6 standard
+*
+*******************************************************************************/
+#ifndef __INCmvStorageDevh
+#define __INCmvStorageDevh
+#ifdef __cplusplus
+
+extern "C" {
+#endif /* __cplusplus */
+
+/* Includes */
+
+/* Definitions */
+
+/* ATA register on the ATA drive*/
+
+#define MV_EDMA_ATA_FEATURES_ADDR               0x11
+#define MV_EDMA_ATA_SECTOR_COUNT_ADDR           0x12
+#define MV_EDMA_ATA_LBA_LOW_ADDR                0x13
+#define MV_EDMA_ATA_LBA_MID_ADDR                0x14
+#define MV_EDMA_ATA_LBA_HIGH_ADDR               0x15
+#define MV_EDMA_ATA_DEVICE_ADDR                 0x16
+#define MV_EDMA_ATA_COMMAND_ADDR                0x17
+
+#define MV_ATA_ERROR_STATUS                     MV_BIT0
+#define MV_ATA_DATA_REQUEST_STATUS              MV_BIT3
+#define MV_ATA_SERVICE_STATUS                   MV_BIT4
+#define MV_ATA_DEVICE_FAULT_STATUS              MV_BIT5
+#define MV_ATA_READY_STATUS                     MV_BIT6
+#define MV_ATA_BUSY_STATUS                      MV_BIT7
+
+
+#define MV_ATA_COMMAND_READ_SECTORS             0x20
+#define MV_ATA_COMMAND_READ_SECTORS_EXT         0x24
+#define MV_ATA_COMMAND_READ_LOG_EXT				0x2F
+#define MV_ATA_COMMAND_READ_VERIFY_SECTORS      0x40
+#define MV_ATA_COMMAND_READ_VERIFY_SECTORS_EXT  0x42
+#define MV_ATA_COMMAND_READ_BUFFER              0xE4
+#define MV_ATA_COMMAND_WRITE_BUFFER             0xE8
+#define MV_ATA_COMMAND_WRITE_SECTORS            0x30
+#define MV_ATA_COMMAND_WRITE_SECTORS_EXT        0x34
+#define MV_ATA_COMMAND_DIAGNOSTIC               0x90
+#define MV_ATA_COMMAND_SMART                    0xb0
+#define MV_ATA_COMMAND_READ_MULTIPLE            0xc4
+#define MV_ATA_COMMAND_WRITE_MULTIPLE           0xc5
+#define MV_ATA_COMMAND_STANDBY_IMMEDIATE        0xe0
+#define MV_ATA_COMMAND_IDLE_IMMEDIATE           0xe1
+#define MV_ATA_COMMAND_STANDBY                  0xe2
+#define MV_ATA_COMMAND_IDLE                     0xe3
+#define MV_ATA_COMMAND_SLEEP                    0xe6
+#define MV_ATA_COMMAND_IDENTIFY                 0xec
+#define MV_ATA_COMMAND_ATAPI_IDENTIFY           0xa1
+#define MV_ATA_COMMAND_PACKET                   0xa0
+#define MV_ATA_COMMAND_DEVICE_CONFIG            0xb1
+#define MV_ATA_COMMAND_SET_FEATURES             0xef
+#define MV_ATA_COMMAND_WRITE_DMA                0xca
+#define MV_ATA_COMMAND_WRITE_DMA_EXT            0x35
+#define MV_ATA_COMMAND_WRITE_DMA_QUEUED         0xcc
+#define MV_ATA_COMMAND_WRITE_DMA_QUEUED_EXT     0x36
+#define MV_ATA_COMMAND_WRITE_FPDMA_QUEUED_EXT   0x61
+#define MV_ATA_COMMAND_READ_DMA                 0xc8
+#define MV_ATA_COMMAND_READ_DMA_EXT             0x25
+#define MV_ATA_COMMAND_READ_DMA_QUEUED          0xc7
+#define MV_ATA_COMMAND_READ_DMA_QUEUED_EXT      0x26
+#define MV_ATA_COMMAND_READ_FPDMA_QUEUED_EXT    0x60
+#define MV_ATA_COMMAND_FLUSH_CACHE              0xe7
+#define MV_ATA_COMMAND_FLUSH_CACHE_EXT          0xea
+
+#define MV_ATA_COMMAND_PM_READ_REG              0xe4
+#define MV_ATA_COMMAND_PM_WRITE_REG             0xe8
+
+#define MV_SATA_GSCR_ID_REG_NUM                 0
+#define MV_SATA_GSCR_REVISION_REG_NUM           1
+#define MV_SATA_GSCR_INFO_REG_NUM               2
+#define MV_SATA_GSCR_ERROR_REG_NUM              32
+#define MV_SATA_GSCR_ERROR_ENABLE_REG_NUM       33
+#define MV_SATA_GSCR_FEATURES_REG_NUM           64
+#define MV_SATA_GSCR_FEATURES_ENABLE_REG_NUM    96
+
+
+#define MV_SATA_PSCR_SSTATUS_REG_NUM            0
+#define MV_SATA_PSCR_SERROR_REG_NUM             1
+#define MV_SATA_PSCR_SCONTROL_REG_NUM           2
+#define MV_SATA_PSCR_SACTIVE_REG_NUM            3
+
+
+
+#define MV_ATA_SET_FEATURES_DISABLE_8_BIT_PIO   0x01
+#define MV_ATA_SET_FEATURES_ENABLE_WCACHE       0x02  /* Enable write cache */
+#define MV_ATA_SET_FEATURES_TRANSFER            0x03  /* Set transfer mode  */
+#define MV_ATA_TRANSFER_UDMA_0                  0x40
+#define MV_ATA_TRANSFER_UDMA_1                  0x41
+#define MV_ATA_TRANSFER_UDMA_2                  0x42
+#define MV_ATA_TRANSFER_UDMA_3                  0x43
+#define MV_ATA_TRANSFER_UDMA_4                  0x44
+#define MV_ATA_TRANSFER_UDMA_5                  0x45
+#define MV_ATA_TRANSFER_UDMA_6                  0x46
+#define MV_ATA_TRANSFER_UDMA_7                  0x47
+#define MV_ATA_TRANSFER_PIO_SLOW                0x00
+#define MV_ATA_TRANSFER_PIO_0                   0x08
+#define MV_ATA_TRANSFER_PIO_1                   0x09
+#define MV_ATA_TRANSFER_PIO_2                   0x0A
+#define MV_ATA_TRANSFER_PIO_3                   0x0B
+#define MV_ATA_TRANSFER_PIO_4                   0x0C
+
+/* Enable advanced power management */
+#define MV_ATA_SET_FEATURES_ENABLE_APM          0x05
+
+/* Disable media status notification*/
+#define MV_ATA_SET_FEATURES_DISABLE_MSN         0x31
+
+/* Disable read look-ahead          */
+#define MV_ATA_SET_FEATURES_DISABLE_RLA         0x55
+
+/* Enable release interrupt         */
+#define MV_ATA_SET_FEATURES_ENABLE_RI           0x5D
+
+/* Enable SERVICE interrupt         */
+#define MV_ATA_SET_FEATURES_ENABLE_SI           0x5E
+
+/* Disable revert power-on defaults */
+#define MV_ATA_SET_FEATURES_DISABLE_RPOD        0x66
+
+/* Disable write cache              */
+#define MV_ATA_SET_FEATURES_DISABLE_WCACHE      0x82
+
+/* Disable advanced power management*/
+#define MV_ATA_SET_FEATURES_DISABLE_APM         0x85
+
+/* Enable media status notification */
+#define MV_ATA_SET_FEATURES_ENABLE_MSN          0x95
+
+/* Enable read look-ahead           */
+#define MV_ATA_SET_FEATURES_ENABLE_RLA          0xAA
+
+/* Enable revert power-on defaults  */
+#define MV_ATA_SET_FEATURES_ENABLE_RPOD         0xCC
+
+/* Disable release interrupt        */
+#define MV_ATA_SET_FEATURES_DISABLE_RI          0xDD
+
+/* Disable SERVICE interrupt        */
+#define MV_ATA_SET_FEATURES_DISABLE_SI          0xDE
+
+/* Defines for parsing the IDENTIFY command results*/
+#define IDEN_SERIAL_NUM_OFFSET                  10
+#define IDEN_SERIAL_NUM_SIZE                    (20-10)
+#define IDEN_FIRMWARE_OFFSET                    23
+#define IDEN_FIRMWARE_SIZE                      (27-23)
+#define IDEN_MODEL_OFFSET                       27
+#define IDEN_MODEL_SIZE                         (47-27)
+#define IDEN_CAPACITY_1_OFFSET                  49
+#define IDEN_VALID                              53
+#define IDEN_NUM_OF_ADDRESSABLE_SECTORS         60
+#define IDEN_PIO_MODE_SPPORTED                  64
+#define IDEN_QUEUE_DEPTH                        75
+#define IDEN_SATA_CAPABILITIES                  76
+#define IDEN_SATA_FEATURES_SUPPORTED            78
+#define IDEN_SATA_FEATURES_ENABLED              79
+#define IDEN_ATA_VERSION                        80
+#define IDEN_SUPPORTED_COMMANDS1                82
+#define IDEN_SUPPORTED_COMMANDS2                83
+#define IDEN_ENABLED_COMMANDS1                  85
+#define IDEN_ENABLED_COMMANDS2                  86
+#define IDEN_UDMA_MODE                          88
+
+/* Typedefs    */
+
+/* Structures  */
+
+    typedef struct mvStorageDevRegisters
+    {
+/* Fields set by CORE driver */
+        MV_U8    errorRegister;
+        MV_U16   featuresRegister;/*input only*/
+        MV_U8    commandRegister;/*input only*/
+        MV_U16   sectorCountRegister;
+        MV_U16   lbaLowRegister;
+        MV_U16   lbaMidRegister;
+        MV_U16   lbaHighRegister;
+        MV_U8    deviceRegister;
+        MV_U8    statusRegister;
+    } MV_STORAGE_DEVICE_REGISTERS;
+
+/* Function */
+
+    MV_BOOLEAN mvStorageDevATAExecuteNonUDMACommand(MV_SATA_ADAPTER *pAdapter,
+                                                    MV_U8 channelIndex,
+                                                    MV_U8   PMPort,
+                                                    MV_NON_UDMA_PROTOCOL protocolType,
+                                                    MV_BOOLEAN  isEXT,
+                                                    MV_U16_PTR bufPtr, MV_U32 count,
+                                                    MV_U16 features,
+                                                    MV_U16 sectorCount,
+                                                    MV_U16 lbaLow, MV_U16 lbaMid,
+                                                    MV_U16 lbaHigh, MV_U8 device,
+                                                    MV_U8 command);
+
+    MV_BOOLEAN mvStorageDevATAIdentifyDevice(MV_SATA_ADAPTER *pAdapter,
+                                             MV_U8 channelIndex,
+                                             MV_U8 PMPort,
+                                             MV_U16_PTR  identifyDeviceResult
+                                            );
+
+    MV_BOOLEAN mvStorageDevATASetFeatures(MV_SATA_ADAPTER *pAdapter,
+                                          MV_U8 channelIndex,
+                                          MV_U8   PMPort,
+                                          MV_U8 subCommand,
+                                          MV_U8 subCommandSpecific1,
+                                          MV_U8 subCommandSpecific2,
+                                          MV_U8 subCommandSpecific3,
+                                          MV_U8 subCommandSpecific4);
+
+    MV_BOOLEAN mvStorageDevATAIdleImmediate(MV_SATA_ADAPTER *pAdapter,
+                                            MV_U8 channelIndex);
+
+    MV_BOOLEAN mvStorageDevATASoftResetDevice(MV_SATA_ADAPTER *pAdapter,
+                                              MV_U8 channelIndex,
+                                              MV_U8 PMPort,
+                                              MV_STORAGE_DEVICE_REGISTERS *registerStruct
+                                             );
+
+/*PM*/
+
+    MV_BOOLEAN mvPMDevReadReg(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex,
+                              MV_U8 PMPort, MV_U8 PMReg, MV_U32 *pValue,
+                              MV_STORAGE_DEVICE_REGISTERS *registerStruct);
+
+    MV_BOOLEAN  mvPMDevWriteReg(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex,
+                                MV_U8 PMPort, MV_U8 PMReg, MV_U32 value,
+                                MV_STORAGE_DEVICE_REGISTERS *registerStruct);
+
+    MV_BOOLEAN  mvPMDevEnableStaggeredSpinUp(MV_SATA_ADAPTER *pAdapter,
+                                             MV_U8 channelIndex, MV_U8 PMPort);
+
+    MV_BOOLEAN  mvPMDevEnableStaggeredSpinUpAll(MV_SATA_ADAPTER *pAdapter,
+                                                MV_U8 channelIndex,
+                                                MV_U8 PMNumOfPorts,
+                                                MV_U16 *bitmask);
+     
+    MV_BOOLEAN mvPMDevEnableStaggeredSpinUpPort(MV_SATA_ADAPTER *pSataAdapter,
+						MV_U8 channelIndex,
+						MV_U8 PMPort,
+						MV_BOOLEAN force_gen1);
+     
+    MV_BOOLEAN  mvPMLinkUp(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex, MV_U8 PMPort,
+			   MV_BOOLEAN force_gen1);
+     
+    MV_BOOLEAN mvStorageDevExecutePIO(MV_SATA_ADAPTER *pAdapter,
+                                      MV_U8 channelIndex,
+                                      MV_U8 PMPort,
+                                      MV_NON_UDMA_PROTOCOL protocolType,
+                                      MV_BOOLEAN  isEXT, MV_U16_PTR bufPtr,
+                                      MV_U32 count,
+                                      MV_STORAGE_DEVICE_REGISTERS *pInATARegs,
+                                      MV_STORAGE_DEVICE_REGISTERS *pOutATARegs);
+
+
+    MV_BOOLEAN mvStorageDevATAStartSoftResetDevice(MV_SATA_ADAPTER *pAdapter,
+                                                   MV_U8 channelIndex,
+                                                   MV_U8 PMPort);
+
+    MV_BOOLEAN mvStorageIsDeviceBsyBitOff(MV_SATA_ADAPTER *pAdapter,
+                                          MV_U8 channelIndex,
+                                          MV_STORAGE_DEVICE_REGISTERS *registerStruct
+                                         );
+
+    MV_BOOLEAN  mvStorageDevSetDeviceType(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex,
+                                          MV_SATA_DEVICE_TYPE deviceType);
+
+    MV_SATA_DEVICE_TYPE mvStorageDevGetDeviceType(MV_SATA_ADAPTER *pAdapter,
+                                                  MV_U8 channelIndex);
+
+
+#ifdef __cplusplus
+
+}
+#endif /* __cplusplus */
+
+#endif /* __INCmvStorageDevh */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/sata/CoreDriver/mvSataSoc.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/sata/CoreDriver/mvSataSoc.h
@@ -0,0 +1,83 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+            this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+#ifndef __INCmvSataSoch
+#define __INCmvSataSoch
+#ifdef __cplusplus
+extern "C" /*{*/
+#endif /* __cplusplus */
+
+#include "mvCommon.h"
+
+
+MV_BOOL mvSataPhyShutdown(MV_U8 port);
+MV_BOOL mvSataPhyPowerOn(MV_U8 port);
+
+
+#ifdef __cplusplus
+
+/*}*/
+#endif /* __cplusplus */
+
+#endif /* __INCmvSatah */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/eth/mvEth.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/eth/mvEth.h
@@ -0,0 +1,384 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+/*******************************************************************************
+* mvEth.h - Header File for : Ethernet Controller 
+*
+* DESCRIPTION:
+*       This header file contains macros typedefs and function declaration for
+*       Marvell Gigabit Ethernet Controllers.
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+#ifndef __mvEth_h__
+#define __mvEth_h__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* includes */
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvSysEthConfig.h"
+#include "gbe/mvEthRegs.h"
+
+/* defines  */
+
+#define MV_ETH_EXTRA_FRAGS_NUM      2
+
+typedef struct
+{
+	MV_U32		maxPortNum;
+	MV_U32		cpuPclk;
+	MV_U32		tclk;
+#ifdef ETH_DESCR_IN_SRAM
+	MV_U32		sramSize;
+#endif
+
+	struct {
+		MV_BOOL			powerOn;
+		MV_32			phyAddr;
+		MV_BOOL			isSgmii;
+		MV_ETH_MAC_SPEED	macSpeed;
+	} portData [MV_ETH_MAX_PORTS];
+}MV_ETH_HAL_DATA;
+
+typedef enum
+{
+    MV_ETH_SPEED_AN,
+    MV_ETH_SPEED_10,
+    MV_ETH_SPEED_100,
+    MV_ETH_SPEED_1000
+    
+} MV_ETH_PORT_SPEED;
+
+typedef enum
+{
+    MV_ETH_DUPLEX_AN,
+    MV_ETH_DUPLEX_HALF,
+    MV_ETH_DUPLEX_FULL
+    
+} MV_ETH_PORT_DUPLEX;
+
+typedef enum
+{
+    MV_ETH_FC_AN_ADV_DIS,
+    MV_ETH_FC_AN_ADV_SYM,
+    MV_ETH_FC_DISABLE,
+    MV_ETH_FC_ENABLE
+
+} MV_ETH_PORT_FC;
+
+typedef enum
+{
+    MV_ETH_PRIO_FIXED = 0,  /* Fixed priority mode */
+    MV_ETH_PRIO_WRR   = 1   /* Weighted round robin priority mode */    
+} MV_ETH_PRIO_MODE;
+
+/* Ethernet port specific infomation */
+typedef struct
+{
+    int     maxRxPktSize;
+    int     rxDefQ;
+    int     rxBpduQ;
+    int     rxArpQ;
+    int     rxTcpQ;
+    int     rxUdpQ;
+    int     ejpMode;
+} MV_ETH_PORT_CFG;
+
+typedef struct
+{
+    int     descrNum;
+} MV_ETH_RX_Q_CFG;
+
+typedef struct
+{
+    int         descrNum;
+    MV_ETH_PRIO_MODE    prioMode;
+    int         quota;
+} MV_ETH_TX_Q_CFG;
+
+typedef struct
+{
+    int     maxRxPktSize;
+    int     rxDefQ;
+    int     txDescrNum[MV_ETH_TX_Q_NUM];
+    int     rxDescrNum[MV_ETH_RX_Q_NUM];
+    void    *osHandle;
+} MV_ETH_PORT_INIT;
+
+typedef struct
+{
+    MV_BOOL             isLinkUp;
+    MV_ETH_PORT_SPEED   speed;
+    MV_ETH_PORT_DUPLEX  duplex;
+    MV_ETH_PORT_FC      flowControl;
+
+} MV_ETH_PORT_STATUS;
+
+typedef enum
+{
+	MV_ETH_DISABLE_HEADER_MODE = 0, 
+	MV_ETH_ENABLE_HEADER_MODE_PRI_2_1 = 1, 
+	MV_ETH_ENABLE_HEADER_MODE_PRI_DBNUM = 2, 
+	MV_ETH_ENABLE_HEADER_MODE_PRI_SPID = 3
+} MV_ETH_HEADER_MODE;
+
+
+/* ethernet.h API list */
+void        mvEthHalInit(MV_ETH_HAL_DATA *halData);
+void        mvEthMemAttrGet(MV_BOOL* pIsSram, MV_BOOL* pIsSwCoher);
+
+/* Port Initalization routines */
+void*       mvEthPortInit (int port, MV_ETH_PORT_INIT *pPortInit);
+void        ethResetTxDescRing(void* pPortHndl, int queue);
+void        ethResetRxDescRing(void* pPortHndl, int queue);
+
+void*       mvEthPortHndlGet(int port);
+
+void        mvEthPortFinish(void* pEthPortHndl);
+MV_STATUS   mvEthPortDown(void* pEthPortHndl);
+MV_STATUS   mvEthPortDisable(void* pEthPortHndl);
+MV_STATUS   mvEthPortUp(void* pEthPortHndl);
+MV_STATUS   mvEthPortEnable(void* pEthPortHndl);
+
+/* Port data flow routines */
+MV_PKT_INFO *mvEthPortForceTxDone(void* pEthPortHndl, int txQueue);
+MV_PKT_INFO *mvEthPortForceRx(void* pEthPortHndl, int rxQueue);
+
+/* Port Configuration routines */
+MV_STATUS   mvEthDefaultsSet(void* pEthPortHndl);
+MV_STATUS   mvEthMaxRxSizeSet(void* pPortHndl, int maxRxSize);
+
+/* Port RX MAC Filtering control routines */
+MV_U8       mvEthMcastCrc8Get(MV_U8* pAddr);
+MV_STATUS   mvEthRxFilterModeSet(void* pPortHndl, MV_BOOL isPromisc);
+MV_STATUS   mvEthMacAddrSet(void* pPortHandle, MV_U8* pMacAddr, int queue);
+MV_STATUS   mvEthMcastAddrSet(void* pPortHandle, MV_U8 *pAddr, int queue);
+
+/* MIB Counters APIs */
+MV_U32      mvEthMibCounterRead(void* pPortHndl, unsigned int mibOffset, 
+                               MV_U32* pHigh32);
+void        mvEthMibCountersClear(void* pPortHandle);
+
+/* TX Scheduling configuration routines */
+MV_STATUS   mvEthTxQueueConfig(void* pPortHandle, int txQueue,                          
+                               MV_ETH_PRIO_MODE txPrioMode, int txQuota);
+
+/* RX Dispatching configuration routines */
+MV_STATUS   mvEthBpduRxQueue(void* pPortHandle, int bpduQueue);
+MV_STATUS   mvEthVlanPrioRxQueue(void* pPortHandle, int vlanPrio, int vlanPrioQueue);
+MV_STATUS   mvEthTosToRxqSet(void* pPortHandle, int tos, int rxq);
+int         mvEthTosToRxqGet(void* pPortHandle, int tos);
+
+/* Speed, Duplex, FlowControl routines */
+MV_STATUS   mvEthSpeedDuplexSet(void* pPortHandle, MV_ETH_PORT_SPEED speed, 
+                                                   MV_ETH_PORT_DUPLEX duplex);
+
+MV_STATUS   mvEthFlowCtrlSet(void* pPortHandle, MV_ETH_PORT_FC flowControl);
+
+#if (MV_ETH_VERSION >= 4)
+MV_STATUS   mvEthEjpModeSet(void* pPortHandle, int mode);
+#endif /* (MV_ETH_VERSION >= 4) */
+
+void        mvEthStatusGet(void* pPortHandle, MV_ETH_PORT_STATUS* pStatus);
+
+/* Marvell Header control               */
+MV_STATUS   mvEthHeaderModeSet(void* pPortHandle, MV_ETH_HEADER_MODE headerMode);
+
+/* PHY routines */
+void       mvEthPhyAddrSet(void* pPortHandle, int phyAddr);
+int        mvEthPhyAddrGet(void* pPortHandle);
+
+/* Power management routines */
+void        mvEthPortPowerDown(int port);
+void        mvEthPortPowerUp(int port);
+
+
+MV_STATUS mvEthWinInit (MV_U32 port, MV_UNIT_WIN_INFO *addrWinMap);
+MV_STATUS mvEthWinWrite(MV_U32 port, MV_U32 winNum, MV_UNIT_WIN_INFO *pAddrDecWin);
+MV_STATUS mvEthWinRead(MV_U32 port, MV_U32 winNum, MV_UNIT_WIN_INFO *pAddrDecWin);
+MV_STATUS mvEthWinEnable(MV_U32 port, MV_U32 winNum, MV_BOOL enable);
+
+/******************** ETH PRIVATE ************************/
+
+/*#define UNCACHED_TX_BUFFERS*/
+/*#define UNCACHED_RX_BUFFERS*/
+
+
+/* Port attributes */
+/* Size of a Tx/Rx descriptor used in chain list data structure */
+#define ETH_RX_DESC_ALIGNED_SIZE        32
+#define ETH_TX_DESC_ALIGNED_SIZE        32
+
+#define TX_DISABLE_TIMEOUT_MSEC     1000
+#define RX_DISABLE_TIMEOUT_MSEC     1000
+#define TX_FIFO_EMPTY_TIMEOUT_MSEC  10000
+#define PORT_DISABLE_WAIT_TCLOCKS   5000
+
+/* Macros that save access to desc in order to find next desc pointer  */
+#define RX_NEXT_DESC_PTR(pRxDescr, pQueueCtrl)                              \
+        ((pRxDescr) == (pQueueCtrl)->pLastDescr) ?                          \
+               (ETH_RX_DESC*)((pQueueCtrl)->pFirstDescr) :                  \
+               (ETH_RX_DESC*)(((MV_ULONG)(pRxDescr)) + ETH_RX_DESC_ALIGNED_SIZE)
+
+#define TX_NEXT_DESC_PTR(pTxDescr, pQueueCtrl)                              \
+        ((pTxDescr) == (pQueueCtrl)->pLastDescr) ?                          \
+               (ETH_TX_DESC*)((pQueueCtrl)->pFirstDescr) :                  \
+               (ETH_TX_DESC*)(((MV_ULONG)(pTxDescr)) + ETH_TX_DESC_ALIGNED_SIZE)
+
+#define RX_PREV_DESC_PTR(pRxDescr, pQueueCtrl)                              \
+        ((pRxDescr) == (pQueueCtrl)->pFirstDescr) ?                          \
+               (ETH_RX_DESC*)((pQueueCtrl)->pLastDescr) :                  \
+               (ETH_RX_DESC*)(((MV_ULONG)(pRxDescr)) - ETH_RX_DESC_ALIGNED_SIZE)
+
+#define TX_PREV_DESC_PTR(pTxDescr, pQueueCtrl)                              \
+        ((pTxDescr) == (pQueueCtrl)->pFirstDescr) ?                          \
+               (ETH_TX_DESC*)((pQueueCtrl)->pLastDescr) :                  \
+               (ETH_TX_DESC*)(((MV_ULONG)(pTxDescr)) - ETH_TX_DESC_ALIGNED_SIZE)
+
+
+/* Queue specific information */
+typedef struct 
+{
+    void*       pFirstDescr;
+    void*       pLastDescr;
+    void*       pCurrentDescr;
+    void*       pUsedDescr;
+    int         resource;
+    MV_BUF_INFO descBuf;
+} ETH_QUEUE_CTRL;
+
+
+/* Ethernet port specific infomation */
+typedef struct _ethPortCtrl
+{
+    int             portNo;
+    ETH_QUEUE_CTRL  rxQueue[MV_ETH_RX_Q_NUM]; /* Rx ring resource  */
+    ETH_QUEUE_CTRL  txQueue[MV_ETH_TX_Q_NUM]; /* Tx ring resource  */
+
+    MV_ETH_PORT_CFG portConfig;
+    MV_ETH_RX_Q_CFG rxQueueConfig[MV_ETH_RX_Q_NUM];
+    MV_ETH_TX_Q_CFG txQueueConfig[MV_ETH_TX_Q_NUM];
+
+    /* Register images - For DP */
+    MV_U32          portTxQueueCmdReg;   /* Port active Tx queues summary    */
+    MV_U32          portRxQueueCmdReg;   /* Port active Rx queues summary    */
+
+    MV_STATE        portState;
+
+    MV_U8           mcastCount[256];
+    MV_U32*         hashPtr;
+    void 	    *osHandle;
+} ETH_PORT_CTRL; 
+
+/************** MACROs ****************/
+
+/* MACROs to Flush / Invalidate TX / RX Buffers */
+#if (ETHER_DRAM_COHER == MV_CACHE_COHER_SW) && !defined(UNCACHED_TX_BUFFERS)
+#   define ETH_PACKET_CACHE_FLUSH(pAddr, size)                                  \
+        mvOsCacheClear(NULL, (pAddr), (size));                                  \
+        /*CPU_PIPE_FLUSH;*/
+#else
+#   define ETH_PACKET_CACHE_FLUSH(pAddr, size)                                  \
+        mvOsIoVirtToPhy(NULL, (pAddr));
+#endif /* ETHER_DRAM_COHER == MV_CACHE_COHER_SW */
+
+#if ( (ETHER_DRAM_COHER == MV_CACHE_COHER_SW) && !defined(UNCACHED_RX_BUFFERS) )
+#   define ETH_PACKET_CACHE_INVALIDATE(pAddr, size)                             \
+        mvOsCacheInvalidate (NULL, (pAddr), (size));                            \
+        /*CPU_PIPE_FLUSH;*/
+#else
+#   define ETH_PACKET_CACHE_INVALIDATE(pAddr, size)    
+#endif /* ETHER_DRAM_COHER == MV_CACHE_COHER_SW && !UNCACHED_RX_BUFFERS */
+
+#ifdef ETH_DESCR_UNCACHED
+
+#define ETH_DESCR_FLUSH_INV(pPortCtrl, pDescr)
+#define ETH_DESCR_INV(pPortCtrl, pDescr)
+
+#else
+
+#define ETH_DESCR_FLUSH_INV(pPortCtrl, pDescr)      \
+        mvOsCacheLineFlushInv(pPortCtrl->osHandle, (MV_ULONG)(pDescr))
+
+#define ETH_DESCR_INV(pPortCtrl, pDescr)            \
+        mvOsCacheLineInv(pPortCtrl->osHandle, (MV_ULONG)(pDescr))
+
+#endif /* ETH_DESCR_UNCACHED */
+
+//#include "eth/gbe/mvEthGbe.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* __mvEth_h__ */
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/eth/mvCompVer.txt
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/eth/mvCompVer.txt
@@ -0,0 +1,4 @@
+Global HAL Version: DOVE_HAL_3_1_2
+Unit HAL Version: 1.0.2
+Description: This component includes an implementation of the unit HAL drivers
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/eth/nfp/mvNfpNat.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/eth/nfp/mvNfpNat.c
@@ -0,0 +1,456 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+        this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+/* includes */
+#include "mvTypes.h"
+#include "mvOs.h"
+#include "mvStack.h"
+#include "mvDebug.h"
+#include "eth/nfp/mvNfp.h"
+#include "eth/mvEth.h"
+
+
+struct natRuleHashBucket    *natRuleDb;
+MV_U32                      natRuleDbSize;
+
+MV_U32                      natRuleUpdateCount = 0;
+MV_U32                      natRuleSetCount = 0;
+MV_U32                      natRuleDeleteCount = 0;
+MV_U32                      natHashMaxDepth = 0;
+
+/* Initialize NFP NAT Rule Database (SNAT + DNAT table) */
+MV_STATUS   mvFpNatDbInit(MV_U32 dbSize)
+{
+	natRuleDb = (struct natRuleHashBucket *)mvOsMalloc(sizeof(struct natRuleHashBucket)*dbSize);
+	if (natRuleDb == NULL) {
+		mvOsPrintf("NFP NAT Rule DB: Not Enough Memory\n");
+		return MV_NO_RESOURCE;
+	}
+	natRuleDbSize = dbSize;
+	memset(natRuleDb, 0, sizeof(struct natRuleHashBucket)*natRuleDbSize);
+
+    natRuleSetCount = natRuleDeleteCount = natRuleUpdateCount = 0;
+
+    mvOsPrintf("mvFpNatDb (%p): %d entries, %d bytes\n", 
+                natRuleDb, natRuleDbSize, sizeof(struct natRuleHashBucket)*natRuleDbSize);
+
+	return MV_OK;
+}
+
+/* Clear NFP NAT Rule Database (SNAT + DNAT table) */
+MV_STATUS   mvFpNatDbClear(void)
+{
+	MV_U32 i = 0;
+	MV_FP_NAT_RULE *currRule;
+	MV_FP_NAT_RULE *tmpRule;
+
+	if (natRuleDb == NULL) 
+		return MV_NOT_INITIALIZED;
+
+	for (i = 0; i < natRuleDbSize; i++) {
+		currRule = natRuleDb[i].natRuleChain;
+		while (currRule != NULL) {
+			tmpRule = currRule;
+			currRule = currRule->next;
+			mvOsFree(tmpRule);
+		}
+        	natRuleDb[i].natRuleChain = NULL;
+	}
+	return MV_OK;
+}
+
+/* Free NAT Database memory */
+void mvFpNatDbDestroy(void)
+{
+	if (natRuleDb != NULL)
+		mvOsFree(natRuleDb);
+}
+
+static void mvFpNatRuleUpdate(MV_FP_NAT_RULE *dstRule, const MV_FP_NAT_RULE *srcRule)
+{
+    dstRule->flags   = srcRule->flags;
+    dstRule->newIp   = srcRule->newIp;
+    dstRule->newPort = srcRule->newPort;
+    dstRule->new_count = srcRule->new_count;
+    dstRule->old_count = srcRule->old_count;
+}
+
+/* Set a NAT rule: create a new rule or update an existing rule in the SNAT + DNAT table */
+MV_STATUS mvFpNatRuleSet(MV_FP_NAT_RULE *pSetRule)
+{
+    int             depth = 0;
+    MV_U32          hash, hash_tr;
+    MV_FP_NAT_RULE  *pNatRule, *pNewRule;
+
+    hash = mv_jhash_3words(pSetRule->dstIp, pSetRule->srcIp, 
+                            (MV_U32)((pSetRule->dstPort << 16) | pSetRule->srcPort), 
+                            (MV_U32)((fp_ip_jhash_iv << 8) | pSetRule->proto));
+    hash_tr = hash & (natRuleDbSize - 1);
+    pNatRule = natRuleDb[hash_tr].natRuleChain;
+
+    while(pNatRule)
+    {
+        /* look for a matching rule */
+        if( (pNatRule->dstIp == pSetRule->dstIp) && 
+            (pNatRule->srcIp == pSetRule->srcIp) &&
+            (pNatRule->proto == pSetRule->proto) &&
+            (pNatRule->dstPort  == pSetRule->dstPort) &&
+            (pNatRule->srcPort  == pSetRule->srcPort) )
+        {
+            /* update rule */
+            mvFpNatRuleUpdate(pNatRule, pSetRule);
+            natRuleUpdateCount++;
+
+#ifdef MV_FP_DEBUG
+            mvOsPrintf("UpdNAT_%03u: DIP=0x%08x, SIP=0x%08x, proto=%d, DPort=%d, SPort=%d, hash=0x%04x, flags=0x%02x\n",
+                        natRuleUpdateCount, pNatRule->dstIp, pNatRule->srcIp, pNatRule->proto, 
+                        MV_16BIT_BE(pNatRule->dstPort), MV_16BIT_BE(pNatRule->srcPort), hash_tr, pNatRule->flags);
+#endif
+            return MV_OK;
+        }
+        pNatRule = pNatRule->next;
+    }
+    /* Allocate new entry */
+    pNewRule = mvOsMalloc(sizeof(MV_FP_NAT_RULE));
+    if(pNewRule == NULL)
+    {
+        mvOsPrintf("mvFpNatRuleSet: Can't allocate new rule\n");
+        return MV_FAIL;
+    }
+
+    memcpy(pNewRule, pSetRule, sizeof(*pNewRule));
+    pNewRule->next = NULL;
+
+    if(natRuleDb[hash_tr].natRuleChain == NULL)
+    {
+        natRuleDb[hash_tr].natRuleChain = pNewRule;
+    }
+    else 
+    {
+	    pNatRule = natRuleDb[hash_tr].natRuleChain;
+        
+        while (pNatRule->next != NULL)
+	{
+	     depth++;
+	     pNatRule = pNatRule->next;
+	}
+	pNatRule->next = pNewRule;
+    }
+    if(depth > natHashMaxDepth)
+	 natHashMaxDepth = depth;
+    natRuleSetCount++;
+
+#ifdef MV_FP_DEBUG
+    mvOsPrintf("SetNAT_%03u: DIP=0x%08x, SIP=0x%08x, proto=%d, DPort=%d, SPort=%d, hash=0x%04x, flags=0x%02x\n",
+                natRuleSetCount, pNewRule->dstIp, pNewRule->srcIp, pNewRule->proto, 
+                MV_16BIT_BE(pNewRule->dstPort), MV_16BIT_BE(pNewRule->srcPort), hash_tr, pNewRule->flags);
+#endif
+    return MV_OK;
+}
+
+/* Delete a specified NAT rule from the SNAT + DNAT table */
+MV_STATUS mvFpNatRuleDelete(MV_FP_NAT_RULE *natRule)
+{
+    MV_U32      hash, hash_tr;
+    MV_FP_NAT_RULE  *currRule, *prevRule;
+
+    natRuleDeleteCount++;
+
+    hash = mv_jhash_3words(natRule->dstIp, natRule->srcIp, 
+                            (MV_U32)((natRule->dstPort << 16) | natRule->srcPort), 
+                            (MV_U32)((fp_ip_jhash_iv << 8) | natRule->proto));
+    hash_tr = hash & (natRuleDbSize - 1);
+
+    prevRule = NULL;
+    for (currRule = natRuleDb[hash_tr].natRuleChain; 
+	 currRule != NULL; 
+	 prevRule = currRule, currRule = currRule->next) 
+    {
+	    if (currRule->srcIp == natRule->srcIp && 
+		currRule->dstIp == natRule->dstIp && 
+		currRule->srcPort == natRule->srcPort && 
+		currRule->dstPort == natRule->dstPort && 
+		currRule->proto == natRule->proto ) 
+	    {		
+		    if (prevRule == NULL)
+			    natRuleDb[hash_tr].natRuleChain = currRule->next;
+		    else
+			    prevRule->next = currRule->next;
+
+#ifdef MV_FP_DEBUG
+		    mvOsPrintf("DelNAT_%03u: DIP=0x%08x, SIP=0x%08x, proto=%d, DPort=%d, SPort=%d, hash=0x%04x\n",
+              	        natRuleDeleteCount, currRule->dstIp, currRule->srcIp, currRule->proto, 
+			            MV_16BIT_BE(currRule->dstPort), MV_16BIT_BE(currRule->srcPort), hash_tr);
+#endif
+		mvOsFree(currRule);	
+		return MV_OK;
+	    }
+    }
+    return MV_NOT_FOUND;
+}
+
+/* Check that protocol supported for FP NAT and extract srcPort and dstPort 
+ *  (or their equivalents)  from the packet.
+ */
+MV_U8   mvFpNatPortsGet(MV_IP_HEADER* pIpHdr, MV_U16* pDstPort, MV_U16* pSrcPort)
+{
+    MV_U8               proto = pIpHdr->protocol;
+    MV_UDP_HEADER       *pUdpHdr;
+    MV_TCP_HEADER       *pTcpHdr;
+    MV_ICMP_ECHO_HEADER *pIcmpHdr;
+
+    switch(proto)
+    {
+        case MV_IP_PROTO_TCP:
+            pTcpHdr = (MV_TCP_HEADER*)((unsigned)pIpHdr + sizeof(MV_IP_HEADER));
+            *pDstPort = pTcpHdr->dest;
+            *pSrcPort = pTcpHdr->source;
+            break;
+
+        case MV_IP_PROTO_UDP:
+            pUdpHdr = (MV_UDP_HEADER*)((unsigned)pIpHdr + sizeof(MV_IP_HEADER));
+            *pDstPort = pUdpHdr->dest;
+            *pSrcPort = pUdpHdr->source;
+            break;
+
+        case MV_IP_PROTO_ICMP:
+            pIcmpHdr = (MV_ICMP_ECHO_HEADER*)((unsigned)pIpHdr + sizeof(MV_IP_HEADER));
+            if( (pIcmpHdr->type == MV_ICMP_ECHO) || (pIcmpHdr->type == MV_ICMP_ECHOREPLY) )
+            {
+                *pDstPort = (pIcmpHdr->code << 8) | (pIcmpHdr->type);
+                *pSrcPort = pIcmpHdr->id;
+            }
+            else
+            {   
+                /* Do NAT for IP + protocol only (without ports) */
+                *pDstPort = 0;
+                *pSrcPort = 0;
+            }
+            break;
+
+	case MV_IP_PROTO_ZERO_HOP:
+               /* Do NAT for IP + protocol only (without ports) */
+                *pDstPort = 0;
+                *pSrcPort = 0;
+	    break;
+
+        /* Other protocols supporting NAT only without ports 
+         * case ???????:
+         * case ???????:
+         *     *pDstPort = 0;
+         *     *pSrcPort = 0;
+         *     break
+         *
+         */
+
+        default:
+            /* Skip NAT processing at all */
+            proto = MV_IP_PROTO_NULL;
+    }
+    return proto;
+}
+
+int    mvFpNatPktUpdate(MV_IP_HEADER* pIpHdr, MV_FP_NAT_RULE* pDnatRule, MV_FP_NAT_RULE* pSnatRule)
+{
+    MV_UDP_HEADER       *pUdpHdr;
+    MV_TCP_HEADER       *pTcpHdr;
+    MV_ICMP_ECHO_HEADER *pIcmpHdr;
+    int                 hdr_size = 0;
+    MV_U16              *pDstPort=NULL, *pSrcPort=NULL;
+
+    switch(pIpHdr->protocol)
+    {
+        case MV_IP_PROTO_TCP:
+            pTcpHdr = (MV_TCP_HEADER*)((unsigned)pIpHdr + sizeof(MV_IP_HEADER));
+            pDstPort = &pTcpHdr->dest;
+            pSrcPort = &pTcpHdr->source;
+            hdr_size = sizeof(MV_TCP_HEADER);
+            break;
+
+        case MV_IP_PROTO_UDP:
+            pUdpHdr = (MV_UDP_HEADER*)((unsigned)pIpHdr + sizeof(MV_IP_HEADER));
+            pDstPort = &pUdpHdr->dest;
+            pSrcPort = &pUdpHdr->source;
+            hdr_size = sizeof(MV_UDP_HEADER);
+            break;
+
+        case MV_IP_PROTO_ICMP:
+            pIcmpHdr = (MV_ICMP_ECHO_HEADER*)((unsigned)pIpHdr + sizeof(MV_IP_HEADER));
+            if( (pIcmpHdr->type == MV_ICMP_ECHO) || (pIcmpHdr->type == MV_ICMP_ECHOREPLY) )
+            {
+                pDstPort = &pIcmpHdr->id;
+                pSrcPort = &pIcmpHdr->id;
+                hdr_size = sizeof(MV_ICMP_ECHO_HEADER);
+            }
+            else
+            {
+                mvOsPrintf("Wrong ICMP type: 0x%x\n", pIcmpHdr->type & 0xFF);
+            }
+            break;
+
+	    case MV_IP_PROTO_ZERO_HOP:
+	        /* Do nothing - only IP addresses are updated for this protocol */
+	        break;
+
+        default:
+            mvOsPrintf("Unexpected IP protocol: 0x%x\n", 
+                        pIpHdr->protocol);
+    }
+    if(pDnatRule != NULL)
+    {
+        if(pDnatRule->flags & MV_FP_DIP_CMD_MAP)
+            pIpHdr->dstIP = pDnatRule->newIp;
+        if( (pDnatRule->flags & MV_FP_DPORT_CMD_MAP) && 
+            (pDstPort != NULL) )
+            *pDstPort = pDnatRule->newPort;
+    }
+
+    if(pSnatRule != NULL)
+    {
+        if(pSnatRule->flags & MV_FP_SIP_CMD_MAP)
+            pIpHdr->srcIP = pSnatRule->newIp;
+
+        if( (pSnatRule->flags & MV_FP_SPORT_CMD_MAP) && 
+            (pSrcPort != NULL) )
+            *pSrcPort = pSnatRule->newPort;
+    }
+    return hdr_size;
+}
+
+/* Print a NFP NAT Rule */
+void    mvFpNatRulePrint(const MV_FP_NAT_RULE *rule)
+{
+	/* Note: some of the fields in the NAT rule may contain invalid values */
+    mvOsPrintf("Original packet: ");
+    mvOsPrintf("SIP=");
+    mvDebugPrintIpAddr(MV_32BIT_BE(rule->srcIp)), 
+    mvOsPrintf(", DIP=");
+    mvDebugPrintIpAddr(MV_32BIT_BE(rule->dstIp)), 
+    mvOsPrintf(", SPort=%d", MV_16BIT_BE(rule->srcPort));
+    mvOsPrintf(", DPort=%d", MV_16BIT_BE(rule->dstPort)); 
+    mvOsPrintf("\nNAT Info: ");
+    mvOsPrintf("count=%u, flags=0x%x", rule->new_count, rule->flags);
+    mvOsPrintf(", newIP=");
+    mvDebugPrintIpAddr(MV_32BIT_BE(rule->newIp)); 
+    mvOsPrintf(", newPort=%d", MV_16BIT_BE(rule->newPort));
+    mvOsPrintf("\n");
+}
+
+/* Print NFP NAT Rule Database (SNAT + DNAT table) */
+MV_STATUS   mvFpNatDbPrint(void)
+{
+    MV_U32 count, i = 0;
+    MV_FP_NAT_RULE *currRule;
+	
+    mvOsPrintf("\nPrinting NFP NAT Rule Database: \n");
+    count = 0;
+    for (i=0; i<natRuleDbSize; i++) 
+    {
+	currRule = natRuleDb[i].natRuleChain;
+
+        if (currRule != NULL)
+    	    mvOsPrintf("\n%03u: NAT DB hash=0x%x\n", count, i);
+
+       	while (currRule != NULL) 
+        {
+	    if( (currRule->flags != MV_FP_NULL_BINDING) || (currRule->new_count > 0) )
+            {
+                mvOsPrintf("%03u: Rule=%p, Next=%p\n", count, currRule, currRule->next);
+	        mvFpNatRulePrint(currRule);
+            }
+	    currRule = currRule->next;
+            count++;
+       	}
+    }
+    return MV_OK;
+}
+
+/* Get the count value for a NAT rule */
+MV_U32 mvFpNatCountGet(MV_U32 srcIp, MV_U32 dstIp, MV_U16 srcPort, MV_U16 dstPort, MV_U8 proto)
+{
+    MV_U32      hash, hash_tr;
+    MV_FP_NAT_RULE  *pNatRule;
+
+    hash = mv_jhash_3words(dstIp, srcIp, (MV_U32)((dstPort << 16) | srcPort), 
+                            (MV_U32)((fp_ip_jhash_iv << 8) | proto));
+    hash_tr = hash & (natRuleDbSize - 1);
+    pNatRule = natRuleDb[hash_tr].natRuleChain;
+
+    while(pNatRule)
+    {
+        /* look for a matching rule */
+        if( (pNatRule->dstIp == dstIp) && 
+            (pNatRule->srcIp == srcIp) &&
+            (pNatRule->proto == proto) &&
+            (pNatRule->dstPort  == dstPort) &&
+            (pNatRule->srcPort  == srcPort) )
+        {
+	    return pNatRule->new_count;
+	}
+	pNatRule = pNatRule->next;
+    }
+    return 0;
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/eth/nfp/mvNfp.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/eth/nfp/mvNfp.h
@@ -0,0 +1,468 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+/*******************************************************************************
+* mvNfp.h - Header File for Marvell NFP (Routing and NAT)
+*
+* DESCRIPTION:
+*       This header file contains macros, typedefs and function declarations 
+* 	specific to the Marvell Network Fast Processing (Routing and NAT).
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+#ifndef __mvNfp_h__
+#define __mvNfp_h__
+
+/* includes */
+#include "mvTypes.h"
+#include "mvCommon.h"
+#include "mvStack.h"
+#include "mv802_3.h"
+#include "eth/mvEth.h"
+#include "mvSysEthConfig.h"
+
+/* defines */
+#define ETH_FP_IFINDEX_MAX     32
+
+/* uncomment to open some debug prints on adding and updating NFP rules */
+#undef MV_FP_DEBUG
+
+#ifdef MV_FP_DEBUG
+#   define MV_NFP_DBG(fmt, arg...) printk(KERN_INFO fmt, ##arg)
+#else
+#   define MV_NFP_DBG(fmt, arg...)
+#endif
+
+#ifdef MV_FP_STATISTICS
+# define MV_NFP_STAT(CODE) CODE;
+#else
+# define MV_NFP_STAT(CODE)
+#endif
+
+/* enumerations */
+typedef enum {
+	MV_FP_ROUTE_CMD, 		/* perform NFP routing */
+	MV_FP_DROP_CMD, 		/* drop packet */
+	MV_FP_TO_STACK_CMD,		/* pass packet to linux stack */
+	MV_FP_DIP_CMD,			/* replace DIP */
+	MV_FP_SIP_CMD,			/* replace SIP */
+	MV_FP_DPORT_CMD,		/* replace DPORT */
+	MV_FP_SPORT_CMD,		/* replace SPORT */
+	MV_FP_BRIDGE_CMD, 		/* perform fast path bridging */
+} MV_FP_CMD_TYPE;
+
+#define MV_FP_NULL_BINDING  0
+#define MV_FP_NULL_BINDING_SET	(1 << MV_FP_ROUTE_CMD)
+
+#define MV_FP_DIP_CMD_MAP   (1 << MV_FP_DIP_CMD)
+#define MV_FP_DPORT_CMD_MAP (1 << MV_FP_DPORT_CMD)
+#define MV_FP_DNAT_CMD_MAP  (MV_FP_DIP_CMD_MAP | MV_FP_DPORT_CMD_MAP)
+
+#define MV_FP_SIP_CMD_MAP   (1 << MV_FP_SIP_CMD)
+#define MV_FP_SPORT_CMD_MAP (1 << MV_FP_SPORT_CMD)
+#define MV_FP_SNAT_CMD_MAP  (MV_FP_SIP_CMD_MAP | MV_FP_SPORT_CMD_MAP)
+
+typedef enum {
+	MV_FP_STATIC_RULE, 	/* a static rule created by the user */
+	MV_FP_DYNAMIC_RULE	/* a dynamic rule */
+
+} MV_FP_RULE_TYPE;
+
+/* structure definitions (used by the NFP Manager and the NFP Database)*/
+typedef struct {
+	MV_FP_CMD_TYPE	actionType;
+	MV_U32		old_count;
+	int 		new_count;
+	MV_FP_RULE_TYPE	ruleType;
+	int 		dnat_aware_refcnt;
+	int 		snat_aware_refcnt;
+
+} MV_FP_RULE_MGMT_INFO;
+
+typedef struct {
+	MV_U32  dstIp;
+	MV_U32  srcIp;
+  	MV_U32  defGtwIp;
+	MV_U8   reserved;
+	MV_U8   aware_flags; 
+	/* dstMac should be 2 byte aligned */
+	MV_U8   dstMac[MV_MAC_ADDR_SIZE]; 
+	MV_U8   srcMac[MV_MAC_ADDR_SIZE];
+	MV_U8   inIfIndex;	/* Linux interface index */
+	MV_U8   outIfIndex;	/* Linux interface index */
+	
+} MV_FP_RULE_ROUTING_INFO;
+
+typedef struct _mv_fp_rule {
+	struct _mv_fp_rule *next;
+
+	MV_FP_RULE_MGMT_INFO    mgmtInfo;
+	MV_FP_RULE_ROUTING_INFO routingInfo;
+	
+} MV_FP_RULE;
+
+struct ruleHashBucket {
+	MV_FP_RULE *ruleChain; /* This is an entry in the rule hash table. */
+
+	/* Add additional fields (such as a lock) here if required */
+};
+
+#define MV_JHASH_MIX(a, b, c)        \
+{                                   \
+    a -= b; a -= c; a ^= (c>>13);   \
+    b -= c; b -= a; b ^= (a<<8);    \
+    c -= a; c -= b; c ^= (b>>13);   \
+    a -= b; a -= c; a ^= (c>>12);   \
+    b -= c; b -= a; b ^= (a<<16);   \
+    c -= a; c -= b; c ^= (b>>5);    \
+    a -= b; a -= c; a ^= (c>>3);    \
+    b -= c; b -= a; b ^= (a<<10);   \
+    c -= a; c -= b; c ^= (b>>15);   \
+}
+
+/* The golden ration: an arbitrary value */
+#define MV_JHASH_GOLDEN_RATIO           0x9e3779b9
+
+extern MV_U32   fp_ip_jhash_iv;
+
+static INLINE MV_U32 mv_jhash_3words(MV_U32 a, MV_U32 b, MV_U32 c, MV_U32 initval)
+{
+    a += MV_JHASH_GOLDEN_RATIO;    
+    b += MV_JHASH_GOLDEN_RATIO;
+    c += initval;
+    MV_JHASH_MIX(a, b, c);
+
+    return c;
+}
+#ifdef CONFIG_MV_ETH_NFP_NAT_SUPPORT
+
+typedef struct _mv_fp_nat_rule {
+	struct _mv_fp_nat_rule *next;
+	MV_U32  old_count;
+	MV_U32  new_count;
+
+	/* Original packet information */
+	/* Fields will contain invalid values if they are irrelevant */
+	MV_U32  srcIp; 
+	MV_U32  dstIp; 
+	MV_U16  srcPort; 
+	MV_U16  dstPort; 
+	MV_U8   proto;
+
+	/* NAT information */
+	MV_U8   flags;
+	MV_U32  newIp; 
+	MV_U16  newPort;
+
+} MV_FP_NAT_RULE;
+
+struct natRuleHashBucket {
+	MV_FP_NAT_RULE *natRuleChain; /* This is an entry in the NAT rule hash table. */
+
+	/* Add additional fields (such as a lock) here if required */
+};
+
+extern struct natRuleHashBucket *natRuleDb;
+extern MV_U32                   natRuleDbSize;
+extern MV_U32                   natRuleUpdateCount, natRuleSetCount, natRuleDeleteCount;
+extern MV_U32                   natHashMaxDepth;
+
+#endif /* CONFIG_MV_ETH_NFP_NAT_SUPPORT */
+
+#ifdef CONFIG_MV_ETH_NFP_FDB_SUPPORT
+
+#define MV_FP_FDB_IS_LOCAL 1
+
+typedef struct {
+	MV_U16  flags;
+	MV_U8   mac[6];
+	MV_U32  ifIndex;
+	MV_U32  bridge;
+} MV_FP_RULE_FDB_INFO;
+
+typedef struct _mv_fp_fdb_rule {
+	struct _mv_fp_fdb_rule *next;
+
+	MV_FP_RULE_MGMT_INFO    mgmtInfo;
+	MV_FP_RULE_FDB_INFO 	fdbInfo;
+	
+} MV_FP_FDB_RULE;
+
+struct fdbRuleHashBucket {
+	MV_FP_FDB_RULE *ruleChain;
+};
+
+extern struct   fdbRuleHashBucket *fdbRuleDb;
+extern MV_U32   fdbRuleDbSize;
+extern MV_U32   fdbMember[];
+extern MV_U32   fdbRuleUpdateCount, fdbRuleSetCount, fdbRuleDeleteCount;
+extern MV_U32   fdbHashMaxDepth;
+
+#endif /* CONFIG_MV_ETH_NFP_FDB_SUPPORT */
+
+typedef struct 
+{
+    MV_U32  parsing, process, multicast, non_ip, vlan_tagged;
+    MV_U32  ip_not_found, ip_ttl_expired, ip_found;
+
+#ifdef CONFIG_MV_ETH_NFP_NAT_SUPPORT
+    MV_U32  nat_bad_proto;
+    MV_U32  dnat_aware;
+    MV_U32  snat_aware;
+    MV_U32  dnat_found;
+    MV_U32  snat_found;
+    MV_U32  dnat_not_found;
+    MV_U32  snat_not_found;
+#endif /* CONFIG_MV_ETH_NFP_NAT_SUPPORT */
+
+#ifdef CONFIG_MV_ETH_NFP_FDB_SUPPORT
+	MV_U32  fdb_rx_local;
+	MV_U32  fdb_rx_unknown;
+	MV_U32  fdb_tx_found;
+	MV_U32  fdb_bridged;
+#endif /* CONFIG_MV_ETH_NFP_FDB_SUPPORT */
+
+} MV_FP_STATS;
+
+static INLINE MV_IP_HEADER*   mvFpParsing(MV_PKT_INFO *pPktInfo, MV_FP_STATS* pFpStats)
+{
+    MV_U8           *pData;
+    MV_IP_HEADER    *pIpHdr;
+    MV_U32	    tx_status;
+
+    pData = (MV_U8*)pPktInfo->pFrags[0].bufVirtPtr + ETH_MV_HEADER_SIZE;
+
+    MV_NFP_STAT( pFpStats->parsing++ );
+
+    /* Check LLC/SNAP and IP header */
+    if( ((pPktInfo->status & ETH_RX_NOT_LLC_SNAP_FORMAT_MASK) == 0) ||
+        ((pPktInfo->status & ETH_RX_IP_HEADER_OK_MASK) == 0) || 
+        (pPktInfo->fragIP) )
+    {
+        /* Non IP packet: go to Linux IP stack */
+        MV_NFP_STAT( pFpStats->non_ip++ );
+        return NULL;
+    }
+    tx_status =  ( ETH_TX_GENERATE_IP_CHKSUM_MASK 
+                 | ETH_TX_IP_NO_FRAG 
+                 | (5 << ETH_TX_IP_HEADER_LEN_OFFSET) );  
+
+    /* Calculate start of IP header */
+    if( (pPktInfo->status & ETH_RX_VLAN_TAGGED_FRAME_MASK) )
+    {
+        MV_NFP_STAT(pFpStats->vlan_tagged++);
+        pIpHdr = (MV_IP_HEADER*)(pData + sizeof(MV_802_3_HEADER) + MV_VLAN_HLEN);    
+        tx_status |= ETH_TX_VLAN_TAGGED_FRAME_MASK;
+    }
+    else
+    {
+        pIpHdr = (MV_IP_HEADER*)(pData + sizeof(MV_802_3_HEADER));
+    }
+
+    if( (pPktInfo->status & ETH_RX_L4_TYPE_MASK) == ETH_RX_L4_TCP_TYPE )
+    {
+	tx_status |= (ETH_TX_L4_TCP_TYPE | ETH_TX_GENERATE_L4_CHKSUM_MASK);
+    }
+    else if( (pPktInfo->status & ETH_RX_L4_TYPE_MASK) == ETH_RX_L4_UDP_TYPE )
+    {
+	tx_status |= (ETH_TX_L4_UDP_TYPE | ETH_TX_GENERATE_L4_CHKSUM_MASK);
+    }
+
+    pPktInfo->status = tx_status;
+
+    return pIpHdr;
+}
+
+/* Initialize NFP Rule Database (Routing + ARP information table) */
+MV_STATUS   mvFpRuleDbInit(MV_U32 dbSize);
+/* Clear NFP Rule Database (Routing + ARP information table) */
+MV_STATUS   mvFpRuleDbClear(void);
+/* Free Rule Database memory */
+void        mvFpRuleDbDestroy(void);
+/* Print NFP Rule Database (Routing + ARP information table) */
+MV_STATUS   mvFpRuleDbPrint(void);
+/* Copy all the information from src_rule to new_rule */
+/* Warning - doesn't perform any checks on memory, just copies */
+/* count is set to zero in new_rule */
+/* Note: the next pointer is not updated . */
+void        mvFpRuleCopy(MV_FP_RULE *newRule, const MV_FP_RULE *srcRule);
+/* Get the maximum count value for a rule with srcIp == given ip */
+MV_U32      mvFpMaxArpCountGet(MV_U32 ip);
+/* Get the count value for a rule that matches the given SIP, DIP */
+MV_U32      mvFpRouteCountGet(MV_U32 srcIp, MV_U32 dstIp);
+/* Set a Routing Rule: create a new rule or update an existing rule  */
+/* in the Routing + ARP information table */
+MV_STATUS   mvFpRuleSet(MV_FP_RULE *rule);
+/* Delete a specified rule from the Routing + ARP information table */
+MV_STATUS   mvFpRuleDelete(MV_FP_RULE *rule);
+/* Print a Rule */
+void        mvFpRulePrint(const MV_FP_RULE *rule);
+/* Enable NFP */
+void        mvFpEnable(void);
+/* Give all packets to Linux IP stack */
+void        mvFpDisable(void);
+MV_STATUS   mvFpInit(void);
+int         mvFpProcess(MV_U32 inIfIndex, MV_U8* pData, MV_IP_HEADER* pIpHdr, MV_FP_STATS* pFpStats);
+void        mvFpStatsPrint(MV_FP_STATS *pFpStats);
+
+/* NAT SUPPORT Functions */
+
+#ifdef CONFIG_MV_ETH_NFP_NAT_SUPPORT
+/* Find and return the first matching rule */
+static INLINE MV_FP_NAT_RULE* mvFpNatRuleFind(MV_U32 dstIp, MV_U32 srcIp, 
+                                              MV_U8 proto, MV_U16 dport, MV_U16 sport)
+{
+    MV_U32          hash, hash_tr;
+    MV_FP_NAT_RULE* pNatRule;
+    int             count = 0;
+
+    hash = mv_jhash_3words(dstIp, srcIp, (MV_U32)((dport << 16) | sport), 
+                            (MV_U32)((fp_ip_jhash_iv << 8) | proto));
+    hash_tr = hash & (natRuleDbSize - 1);
+/*
+    mvOsPrintf("mvFpNatRuleFind: DIP=0x%08x, SIP=0x%08x, proto=%d, DPort=%d, SPort=%d, hash=0x%08x (0x%x)\n",
+                dstIp, srcIp, proto, dport, sport, hash, hash_tr);
+*/
+    pNatRule = natRuleDb[hash_tr].natRuleChain;
+
+    while(pNatRule)
+    {
+        /* look for a matching rule */
+        if( (pNatRule->dstIp == dstIp) && 
+            (pNatRule->srcIp == srcIp) &&
+            (pNatRule->proto == proto) &&
+            (pNatRule->dstPort  == dport) &&
+            (pNatRule->srcPort  == sport) )
+        {
+	        pNatRule->new_count++;
+            return pNatRule;
+        }
+        pNatRule = pNatRule->next;
+        count++;
+    }
+    return NULL;
+}
+
+/* Initialize NFP NAT Rule Database (SNAT + DNAT table) */
+MV_STATUS   mvFpNatDbInit(MV_U32 dbSize);
+
+/* Clear NFP NAT Rule Database (SNAT + DNAT table) */
+MV_STATUS   mvFpNatDbClear(void);
+
+/* Free NAT Database memory */
+void        mvFpNatDbDestroy(void);
+
+/* Set a NAT rule: create a new rule or update an existing rule in the SNAT + DNAT table */
+MV_STATUS   mvFpNatRuleSet(MV_FP_NAT_RULE *natRule);
+
+MV_STATUS   mvFpRuleAwareSet(MV_FP_RULE *pSetRule);
+
+/* Delete a specified NAT rule from the SNAT + DNAT table */
+MV_STATUS   mvFpNatRuleDelete(MV_FP_NAT_RULE *natRule);
+
+/* Get the count value for a NAT rule */
+MV_U32      mvFpNatCountGet(MV_U32 srcIp, MV_U32 dstIp, MV_U16 srcPort, MV_U16 dstPort, MV_U8 proto);
+
+/* Print NFP NAT Rule Database (SNAT + DNAT table) */
+MV_STATUS   mvFpNatDbPrint(void);
+
+/* Print a NAT Rule */
+void        mvFpNatRulePrint(const MV_FP_NAT_RULE *rule);
+
+/* Extract dstPort and srcPort values from the packet */
+MV_U8       mvFpNatPortsGet(MV_IP_HEADER* pIpHdr, MV_U16* pDstPort, MV_U16* pSrcPort);
+
+int         mvFpNatPktUpdate(MV_IP_HEADER* pIpHdr, MV_FP_NAT_RULE* pDnatRule, MV_FP_NAT_RULE* pSnatRule);
+
+#endif /* CONFIG_MV_ETH_NFP_NAT_SUPPORT */
+
+
+#ifdef CONFIG_MV_ETH_NFP_FDB_SUPPORT
+
+/* Init NFP Bridge Rule Database */
+MV_STATUS 	mvFpFdbInit(MV_U32 dbSize);
+
+/* Clear NFP Bridge Rule Database */
+MV_STATUS 	mvFpFdbClear(void);
+
+/* Destroy NFP Bridge Rule Database */
+void 		mvFpFdbDestroy(void);
+
+/* Add NFP Bridge Rule */
+MV_STATUS 	mvFpFdbRuleSet(MV_FP_FDB_RULE *rule);
+
+/* Delete NFP Bridge Rule Database */
+MV_STATUS 	mvFpFdbRuleDel(MV_FP_FDB_RULE *rule);
+
+/* Aging NFP Bridge Rule Database */
+MV_U32 		mvFpFdbRuleAge(MV_FP_FDB_RULE *rule);
+
+/* Print NFP Bridge Rule Database */
+MV_STATUS 	mvFpFdbPrint(void);
+
+#endif /* CONFIG_MV_ETH_NFP_FDB_SUPPORT */
+#endif /* __mvNfp_h__ */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/eth/nfp/mvNfpFdb.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/eth/nfp/mvNfpFdb.c
@@ -0,0 +1,318 @@
+/*******************************************************************************
+Copyright (C) Marvell Interfdbional Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+Interfdbional Ltd. and/or its affiliates ("Marvell") under the following
+alterfdbive licensing terms.  Once you have made an election to distribute the
+File under one of the following license alterfdbives, please (i) delete this
+introductory statement regarding license alterfdbives, (ii) delete the two
+license alterfdbives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+        this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+/*******************************************************************************
+* mvFastPath.c - Marvell Fast Route Routing and Bridge
+*
+* DESCRIPTION:
+*       
+*       Supported Features:
+*       - OS independent. 
+*
+*******************************************************************************/
+
+/* includes */
+#include "mvOs.h"
+#include "mvDebug.h"
+#include "eth/nfp/mvNfp.h"
+#include "eth/mvEth.h"
+
+
+struct fdbRuleHashBucket    *fdbRuleDb;
+MV_U32                      fdbRuleDbSize;
+MV_U32 					    fdbMember[ETH_FP_IFINDEX_MAX];
+MV_U32                      fdbRuleUpdateCount = 0;
+MV_U32                      fdbRuleSetCount = 0;
+MV_U32                      fdbRuleDeleteCount = 0;
+MV_U32                      fdbHashMaxDepth;
+
+
+MV_STATUS mvFpFdbInit(MV_U32 dbSize)
+{
+	fdbRuleDb = (struct fdbRuleHashBucket *)mvOsMalloc(sizeof(struct fdbRuleHashBucket)*dbSize);
+	if (fdbRuleDb == NULL) {
+		mvOsPrintf("NFP (fdb): not enough memory\n");
+		return MV_NO_RESOURCE;
+	}
+	fdbRuleDbSize = dbSize;
+	memset(fdbRuleDb, 0, sizeof(struct fdbRuleHashBucket)*fdbRuleDbSize);
+	memset(fdbMember, 0, sizeof(fdbMember));
+
+    mvOsPrintf("NFP (fdb) init %d entries, %d bytes\n", 
+                fdbRuleDbSize, sizeof(struct fdbRuleHashBucket)*fdbRuleDbSize);
+	return MV_OK;
+}
+
+/* Clear Fast Route Bridge Rule Database (SNAT + DNAT table) */
+MV_STATUS mvFpFdbClear(void)
+{
+	MV_U32 i = fdbRuleDbSize;
+	MV_FP_FDB_RULE *rule, *tmp;
+
+	if (fdbRuleDb != NULL)
+		return MV_NOT_INITIALIZED;
+
+	while (i--) {
+		rule = fdbRuleDb[i].ruleChain;
+		while (rule) {
+			tmp = rule;
+			rule = rule->next;
+			mvOsFree(tmp);
+		}
+        fdbRuleDb[i].ruleChain = NULL;
+	}
+	return MV_OK;
+}
+
+void mvFpFdbDestroy(void)
+{
+	if (fdbRuleDb != NULL)
+		mvOsFree(fdbRuleDb);
+}
+
+static INLINE int mvFpFdbRuleCmp(MV_FP_RULE_FDB_INFO *rule1, MV_FP_RULE_FDB_INFO *rule2)
+{
+	return !((rule1->bridge == rule2->bridge) && 
+			 (rule1->ifIndex == rule2->ifIndex) &&
+			 !memcmp(rule1->mac, rule2->mac, 6));
+}
+
+static INLINE MV_U32 mvFpFdbRuleHash(MV_FP_FDB_RULE *rule)
+{
+	return mv_jhash_3words(rule->fdbInfo.bridge,
+						   0, 
+						   *(MV_U32*)(rule->fdbInfo.mac+2), fp_ip_jhash_iv);
+}
+
+MV_STATUS mvFpFdbRuleSet(MV_FP_FDB_RULE *newrule)
+{
+    int             depth = 0;
+    MV_U32          hash;
+    MV_FP_FDB_RULE* rule;
+
+	/* ignore foreign ifindex */
+	if (newrule->fdbInfo.ifIndex >= ETH_FP_IFINDEX_MAX)
+		return MV_OUT_OF_RANGE;
+
+	hash = mvFpFdbRuleHash(newrule);
+    hash &= (fdbRuleDbSize - 1);
+
+    rule = fdbRuleDb[hash].ruleChain;    
+    while (rule) {
+		if (!mvFpFdbRuleCmp(&rule->fdbInfo, &newrule->fdbInfo)) 
+        {
+            fdbRuleUpdateCount++;
+			goto out;
+        }
+        depth++;
+        rule = rule->next;
+    }
+    fdbRuleSetCount++;
+    if(depth > fdbHashMaxDepth)
+        fdbHashMaxDepth = depth;
+
+	rule = mvOsMalloc(sizeof(MV_FP_FDB_RULE));
+
+    if (!rule) {
+        mvOsPrintf("NFP (fdb): can't allocate new rule\n");
+        return MV_FAIL;
+    }
+
+	/* FIXME: No spinlocks */
+	rule->next = fdbRuleDb[hash].ruleChain;
+	fdbRuleDb[hash].ruleChain = rule;
+out:
+	mvOsMemcpy(rule, newrule, sizeof(MV_FP_FDB_RULE));
+
+	if (rule->fdbInfo.flags & MV_FP_FDB_IS_LOCAL) {
+		fdbMember[rule->fdbInfo.ifIndex] = rule->fdbInfo.bridge;
+		fdbMember[rule->fdbInfo.bridge] = rule->fdbInfo.bridge;
+	}
+
+	MV_NFP_DBG("NFP (fdb): new bridge=%d ifIndex=%d %02X:%02X:%02X:%02X:%02X:%02X flags=%x\n",
+			rule->fdbInfo.bridge, rule->fdbInfo.ifIndex,
+			rule->fdbInfo.mac[0], rule->fdbInfo.mac[1], rule->fdbInfo.mac[2], 
+			rule->fdbInfo.mac[3], rule->fdbInfo.mac[4], rule->fdbInfo.mac[5], 
+			rule->fdbInfo.flags);
+
+    return MV_OK;
+}
+
+MV_STATUS mvFpFdbRuleDel(MV_FP_FDB_RULE *oldrule)
+{
+	MV_U32 hash;
+	MV_FP_FDB_RULE* rule, *prev;
+
+	/* ignore foreign ifindex */
+	if (oldrule->fdbInfo.ifIndex >= ETH_FP_IFINDEX_MAX)
+		return MV_OUT_OF_RANGE;
+
+	if (oldrule->fdbInfo.flags & MV_FP_FDB_IS_LOCAL) {
+		fdbMember[oldrule->fdbInfo.ifIndex] = 0;
+		fdbMember[oldrule->fdbInfo.bridge] = 0;
+		MV_NFP_DBG("NFP (fdb): del member bridge=%d ifIndex=%d\n", 
+                oldrule->fdbInfo.bridge, oldrule->fdbInfo.ifIndex);
+	}
+
+	hash = mvFpFdbRuleHash(oldrule);
+	hash &= (fdbRuleDbSize - 1);
+
+	rule = fdbRuleDb[hash].ruleChain;    
+	prev = NULL;
+
+	while (rule) {
+		if (!mvFpFdbRuleCmp(&rule->fdbInfo, &oldrule->fdbInfo)) {
+
+			if (prev)
+				prev->next = rule->next;
+			else
+				fdbRuleDb[hash].ruleChain = rule->next;
+
+            fdbRuleDeleteCount++;
+			MV_NFP_DBG("NFP (fdb): del bridge=%d ifIndex=%d %02X:%02X:%02X:%02X:%02X:%02X flags=%x count=%d\n",
+					rule->fdbInfo.bridge, rule->fdbInfo.ifIndex,
+					rule->fdbInfo.mac[0], rule->fdbInfo.mac[1], rule->fdbInfo.mac[2], 
+					rule->fdbInfo.mac[3], rule->fdbInfo.mac[4], rule->fdbInfo.mac[5], 
+					rule->fdbInfo.flags, rule->mgmtInfo.new_count);
+
+			mvOsFree(rule);	
+			return MV_OK;
+		}
+
+		prev = rule;
+		rule = rule->next;
+	}
+
+	return MV_NOT_FOUND;
+}
+
+MV_U32 mvFpFdbRuleAge(MV_FP_FDB_RULE *oldrule)
+{
+	MV_U32 hash, age;
+	MV_FP_FDB_RULE* rule, *prev;
+
+	/* ignore foreign ifindex */
+	if (oldrule->fdbInfo.ifIndex >= ETH_FP_IFINDEX_MAX)
+		return 0;
+
+	hash = mvFpFdbRuleHash(oldrule);
+	hash &= (fdbRuleDbSize - 1);
+
+	rule = fdbRuleDb[hash].ruleChain;    
+	prev = NULL;
+
+	while (rule) {
+		if (!mvFpFdbRuleCmp(&rule->fdbInfo, &oldrule->fdbInfo)) {
+
+			MV_NFP_DBG("NFP (fdb): age bridge=%d ifIndex=%d %02X:%02X:%02X:%02X:%02X:%02X flags=%x age=%d\n",
+					rule->fdbInfo.bridge, rule->fdbInfo.ifIndex,
+					rule->fdbInfo.mac[0], rule->fdbInfo.mac[1], rule->fdbInfo.mac[2], 
+					rule->fdbInfo.mac[3], rule->fdbInfo.mac[4], rule->fdbInfo.mac[5], 
+					rule->fdbInfo.flags, rule->mgmtInfo.new_count);
+
+			age = rule->mgmtInfo.new_count;
+			rule->mgmtInfo.new_count = 0;
+			return age;
+
+		}
+
+		prev = rule;
+		rule = rule->next;
+	}
+
+	return 0;
+}
+
+static void mvFpFdbRulePrint(MV_FP_FDB_RULE *rule, MV_U32 hash)
+{
+	mvOsPrintf("NFP (fdb): 0x%x bridge=%d ifIndex=%d %02X:%02X:%02X:%02X:%02X:%02X flags=%x count=%d\n",
+			mvFpFdbRuleHash((MV_FP_FDB_RULE*)rule),
+			rule->fdbInfo.bridge, rule->fdbInfo.ifIndex,
+			rule->fdbInfo.mac[0], rule->fdbInfo.mac[1], rule->fdbInfo.mac[2], 
+			rule->fdbInfo.mac[3], rule->fdbInfo.mac[4], rule->fdbInfo.mac[5], 
+			rule->fdbInfo.flags, rule->mgmtInfo.new_count);
+}
+
+MV_STATUS mvFpFdbPrint(void)
+{
+    MV_U32 i = fdbRuleDbSize;
+    MV_FP_FDB_RULE *rule;
+
+	for (i=0; i<ETH_FP_IFINDEX_MAX; i++) {
+		if (fdbMember[i])
+			mvOsPrintf("NFP (fdb): bridge=%d ifIndex=%d\n",fdbMember[i],i);
+	}
+
+	for (i=0; i<fdbRuleDbSize; i++) {
+		rule = fdbRuleDb[i].ruleChain;
+
+       	while (rule) {
+			mvFpFdbRulePrint(rule, i);
+			rule = rule->next;
+       	}
+    }
+    return MV_OK;
+}
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/eth/nfp/mvNfp.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/eth/nfp/mvNfp.c
@@ -0,0 +1,728 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+        this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+/*******************************************************************************
+* mvNfp.c - Marvell Network Fast Processing (Routing and NAT)
+*
+* DESCRIPTION:
+*       
+*       Supported Features:
+*       - OS independent. 
+*
+*******************************************************************************/
+
+/* includes */
+#include "mvOs.h"
+#include "mvDebug.h"
+#include "eth/nfp/mvNfp.h"
+#include "eth/mvEth.h"
+
+static struct ruleHashBucket    *ruleDb;
+static MV_U32                   ruleDbSize;
+
+static MV_U32                   nfpHashMaxDepth;
+static MV_U32                   nfpRuleSetCount;
+static MV_U32                   nfpRuleUpdateCount;
+static MV_U32                   nfpRuleDeleteCount;
+
+MV_U32   fp_ip_jhash_iv = 0;
+
+
+MV_STATUS   mvFpInit(void)
+{
+    fp_ip_jhash_iv = mvOsRand();
+
+    return MV_OK;
+}
+
+
+/* Initialize NFP Rule Database (Routing + ARP information table) */
+MV_STATUS   mvFpRuleDbInit(MV_U32 dbSize)
+{
+    ruleDb = (struct ruleHashBucket *)mvOsMalloc(sizeof(struct ruleHashBucket)*dbSize);
+    if (ruleDb == NULL) {
+	    mvOsPrintf("NFP Rule DB: Not Enough Memory\n");
+	    return MV_NO_RESOURCE;
+    }
+    ruleDbSize = dbSize;
+    memset(ruleDb, 0, sizeof(struct ruleHashBucket)*ruleDbSize);
+    nfpRuleSetCount = nfpRuleUpdateCount = nfpRuleDeleteCount = 0;
+
+    mvOsPrintf("mvFpRuleDb (%p): %d entries, %d bytes\n", 
+                ruleDb, ruleDbSize, sizeof(struct ruleHashBucket)*ruleDbSize);
+
+    return MV_OK;
+}
+
+/* Clear NFP Rule Database (Routing + ARP information table) */
+MV_STATUS   mvFpRuleDbClear(void)
+{
+	MV_U32 i = 0;
+	MV_FP_RULE *currRule;
+	MV_FP_RULE *tmpRule;
+
+	if (ruleDb == NULL) 
+		return MV_NOT_INITIALIZED;
+
+	for (i = 0; i < ruleDbSize; i++) {
+		currRule = ruleDb[i].ruleChain;
+		while (currRule != NULL) {
+			tmpRule = currRule;
+			currRule = currRule->next;
+			mvOsFree(tmpRule);
+		}
+        	ruleDb[i].ruleChain = NULL;
+	}
+	return MV_OK;
+}
+
+
+/* Free Rule Database memory */
+void mvFpRuleDbDestroy(void)
+{
+	if (ruleDb != NULL)
+		mvOsFree(ruleDb);
+}
+
+/* Print rule action type. Assume rule is not NULL. */
+static void    mvFpActionTypePrint(const MV_FP_RULE *rule)
+{
+	switch(rule->mgmtInfo.actionType) {
+		case MV_FP_ROUTE_CMD:
+			mvOsPrintf("A=Route, ");
+			break;
+		case MV_FP_DROP_CMD:
+			mvOsPrintf("A=Drop, ");
+			break;
+		case MV_FP_TO_STACK_CMD:
+			mvOsPrintf("A=Stack, ");
+			break;
+		default:
+			mvOsPrintf("A=Unknown (%d), ", rule->mgmtInfo.actionType);
+			break;
+	}
+}
+
+/* Print rule type (static or dynamic). Assume rule is not NULL. */
+static void    mvFpRuleTypePrint(const MV_FP_RULE *rule)
+{
+	switch(rule->mgmtInfo.ruleType) {
+		case MV_FP_STATIC_RULE:
+			mvOsPrintf("T=Static");
+			break;
+		case MV_FP_DYNAMIC_RULE:
+			mvOsPrintf("T=Dynamic");
+			break;
+		default:
+			mvOsPrintf("T=Unknown");
+			break;
+	}
+}
+
+/* Print a NFP Rule */
+void    mvFpRulePrint(const MV_FP_RULE *rule)
+{
+	mvFpActionTypePrint(rule);
+	mvFpRuleTypePrint(rule);
+	mvOsPrintf(", SIP=");
+	mvDebugPrintIpAddr(MV_32BIT_BE(rule->routingInfo.srcIp));
+	mvOsPrintf(", DIP=");
+	mvDebugPrintIpAddr(MV_32BIT_BE(rule->routingInfo.dstIp));
+	mvOsPrintf(", GTW=");
+	mvDebugPrintIpAddr(MV_32BIT_BE(rule->routingInfo.defGtwIp));
+	mvOsPrintf(", DA=");
+	mvDebugPrintMacAddr(rule->routingInfo.dstMac);
+	mvOsPrintf(", SA=");
+	mvDebugPrintMacAddr(rule->routingInfo.srcMac);
+	mvOsPrintf(", inIf=%d", rule->routingInfo.inIfIndex);
+	mvOsPrintf(", outIf=%d", rule->routingInfo.outIfIndex);
+
+  	mvOsPrintf(", count=%d, aware_flags=0x%X", rule->mgmtInfo.new_count, rule->routingInfo.aware_flags);
+	mvOsPrintf("\n");
+}
+
+/* Print NFP Rule Database (Routing + ARP information table) */
+MV_STATUS   mvFpRuleDbPrint(void)
+{
+	MV_U32 count, i;
+	MV_FP_RULE *currRule;
+
+	mvOsPrintf("\nPrinting NFP Rule Database\n");
+    count = 0;
+
+	for(i=0; i<ruleDbSize; i++) 
+    {
+		currRule = ruleDb[i].ruleChain;
+
+        if(currRule != NULL)
+    	    mvOsPrintf("\n%03u: FP DB hash=0x%x", count, i);
+
+		while (currRule != NULL) {
+          	mvOsPrintf("\n%03u: Rule=%p: ", count, currRule);
+	        mvFpRulePrint(currRule);
+	        currRule = currRule->next;
+            count++;
+        }
+	}
+	return MV_OK;
+}
+
+
+/* Copy all the information from src_rule to new_rule */
+/* Warning - doesn't perform any checks on memory, just copies */
+/* count is set to zero in new_rule */
+/* Note: the next pointer is not updated . */
+void mvFpRuleCopy(MV_FP_RULE *dstRule, const MV_FP_RULE *srcRule)
+{
+	dstRule->mgmtInfo.actionType = srcRule->mgmtInfo.actionType;
+	dstRule->mgmtInfo.new_count = srcRule->mgmtInfo.new_count;
+	dstRule->mgmtInfo.old_count = srcRule->mgmtInfo.old_count;
+	dstRule->mgmtInfo.ruleType = srcRule->mgmtInfo.ruleType;
+	dstRule->mgmtInfo.snat_aware_refcnt = srcRule->mgmtInfo.snat_aware_refcnt;
+	dstRule->mgmtInfo.dnat_aware_refcnt = srcRule->mgmtInfo.dnat_aware_refcnt;
+
+	dstRule->routingInfo.aware_flags = srcRule->routingInfo.aware_flags;
+	dstRule->routingInfo.srcIp = srcRule->routingInfo.srcIp;
+	dstRule->routingInfo.dstIp = srcRule->routingInfo.dstIp;
+	dstRule->routingInfo.defGtwIp = srcRule->routingInfo.defGtwIp;
+	memcpy(dstRule->routingInfo.srcMac, srcRule->routingInfo.srcMac, MV_MAC_ADDR_SIZE);
+	memcpy(dstRule->routingInfo.dstMac, srcRule->routingInfo.dstMac, MV_MAC_ADDR_SIZE);
+	dstRule->routingInfo.inIfIndex = srcRule->routingInfo.inIfIndex;
+	dstRule->routingInfo.outIfIndex = srcRule->routingInfo.outIfIndex;
+}
+
+/* Get the count value for a rule that matches the given SIP, DIP */
+MV_U32 mvFpRouteCountGet(MV_U32 srcIp, MV_U32 dstIp)
+{
+    MV_U32      hash, hash_tr;
+    MV_FP_RULE  *pRule;
+
+    hash = mv_jhash_3words(dstIp, srcIp, (MV_U32)0, fp_ip_jhash_iv);
+    hash_tr = hash & (ruleDbSize - 1);
+
+    pRule = ruleDb[hash_tr].ruleChain;    
+    while(pRule)
+    {
+        /* look for a matching rule */
+        if( (pRule->routingInfo.dstIp == dstIp) && 
+            (pRule->routingInfo.srcIp == srcIp) )
+        {
+	        return pRule->mgmtInfo.new_count;
+        }
+        pRule = pRule->next;
+    }
+    return 0;
+}
+
+MV_STATUS mvFpRuleAwareSet(MV_FP_RULE *pSetRule)
+{
+    MV_U32      hash, hash_tr;
+    MV_FP_RULE  *pRule;
+
+    hash = mv_jhash_3words(pSetRule->routingInfo.dstIp, pSetRule->routingInfo.srcIp, 
+                            (MV_U32)0, fp_ip_jhash_iv);
+    hash_tr = hash & (ruleDbSize - 1);
+
+    pRule = ruleDb[hash_tr].ruleChain;    
+    while(pRule)
+    {
+	    if( (pRule->routingInfo.srcIp == pSetRule->routingInfo.srcIp) &&
+	        (pRule->routingInfo.dstIp == pSetRule->routingInfo.dstIp) ) {
+
+	        
+            pRule->routingInfo.aware_flags = pSetRule->routingInfo.aware_flags;
+#ifdef MV_FP_DEBUG
+	        mvOsPrintf("Update FP aware: DIP=%u.%u.%u.%u, SIP=%u.%u.%u.%u, hash0x%x, flags=0x%x\n",
+                	    MV_IP_QUAD(pSetRule->routingInfo.dstIp), 
+                        MV_IP_QUAD(pSetRule->routingInfo.srcIp), 
+                	    hash_tr, pSetRule->routingInfo.aware_flags);
+#endif
+	        return MV_OK;
+	    }
+        pRule = pRule->next;
+    }
+#ifdef MV_FP_DEBUG
+    mvOsPrintf("FP aware NOT found: DIP=%u.%u.%u.%u, SIP=%u.%u.%u.%u, hash=0x%x, flags=0x%x\n",
+                	    MV_IP_QUAD(pSetRule->routingInfo.dstIp), 
+                        MV_IP_QUAD(pSetRule->routingInfo.srcIp), 
+                	    hash_tr, pSetRule->routingInfo.aware_flags);
+#endif
+    return MV_NOT_FOUND;
+}
+
+/* Set a Routing Rule: create a new rule or update an existing rule  */
+/* in the Routing + ARP information table */
+MV_STATUS mvFpRuleSet(MV_FP_RULE *pSetRule)
+{
+    MV_U32      hash, hash_tr;
+    int         depth = 0;
+    MV_FP_RULE  *pRule, *pNewRule;
+
+    hash = mv_jhash_3words(pSetRule->routingInfo.dstIp, pSetRule->routingInfo.srcIp, 
+                            (MV_U32)0, fp_ip_jhash_iv);
+    hash_tr = hash & (ruleDbSize - 1);
+
+    pRule = ruleDb[hash_tr].ruleChain;    
+    while(pRule)
+    {
+	    if( (pRule->routingInfo.srcIp == pSetRule->routingInfo.srcIp &&
+	         pRule->routingInfo.dstIp == pSetRule->routingInfo.dstIp) ) {
+
+	        mvFpRuleCopy(pRule, pSetRule);
+            nfpRuleUpdateCount++;
+
+#ifdef MV_FP_DEBUG
+	        mvOsPrintf("UpdNFP_%03u: DIP=%u.%u.%u.%u, SIP=%u.%u.%u.%u, hash=0x%04x\n",
+                	    nfpRuleUpdateCount, MV_IP_QUAD(pSetRule->routingInfo.dstIp), 
+                        MV_IP_QUAD(pSetRule->routingInfo.srcIp), hash_tr);
+#endif
+	        return MV_OK;
+	    }
+        pRule = pRule->next;
+    }
+
+    /* Allocate new entry */
+    pNewRule = mvOsMalloc(sizeof(MV_FP_RULE));
+    if(pNewRule == NULL)
+    {
+        mvOsPrintf("mvFpRuleSet: Can't allocate new rule\n");
+        return MV_FAIL;
+    }
+
+    mvFpRuleCopy(pNewRule, pSetRule);
+    pNewRule->next = NULL;
+
+    if(ruleDb[hash_tr].ruleChain == NULL)
+        ruleDb[hash_tr].ruleChain = pNewRule;
+    else {
+	    pRule = ruleDb[hash_tr].ruleChain;
+        while (pRule->next != NULL)
+	{
+	     depth++;
+	     pRule = pRule->next;
+	}
+	pRule->next = pNewRule;
+    }
+    if(depth > nfpHashMaxDepth)
+	 nfpHashMaxDepth = depth;
+    nfpRuleSetCount++;
+
+#ifdef MV_FP_DEBUG
+    mvOsPrintf("SetNFP_%03u: DIP=%u.%u.%u.%u, SIP=%u.%u.%u.%u, hash=0x%04x, aware=0x%02x\n",
+                nfpRuleSetCount, MV_IP_QUAD(pSetRule->routingInfo.dstIp), 
+                MV_IP_QUAD(pSetRule->routingInfo.srcIp), 
+                hash_tr, pSetRule->routingInfo.aware_flags);
+#endif
+    return MV_OK;
+}
+
+/* Delete a specified rule from the Routing + ARP information table */
+MV_STATUS mvFpRuleDelete(MV_FP_RULE *rule)
+{
+    MV_U32      hash, hash_tr;
+    MV_FP_RULE  *currRule, *prevRule;
+
+    nfpRuleDeleteCount++;
+    hash = mv_jhash_3words(rule->routingInfo.dstIp, rule->routingInfo.srcIp, 
+                            (MV_U32)0, fp_ip_jhash_iv);
+    hash_tr = hash & (ruleDbSize - 1);
+
+    prevRule = NULL;
+    for (currRule = ruleDb[hash_tr].ruleChain; 
+	     currRule != NULL; 
+	     prevRule = currRule, currRule = currRule->next) 
+    {
+	    if( (currRule->routingInfo.srcIp == rule->routingInfo.srcIp) && 
+		    (currRule->routingInfo.dstIp == rule->routingInfo.dstIp) ) 
+        {		
+		    if (prevRule == NULL)
+			    ruleDb[hash_tr].ruleChain = currRule->next;
+		    else
+			    prevRule->next = currRule->next;
+#ifdef MV_FP_DEBUG
+    		mvOsPrintf("DelNFP_%03u: DIP=%u.%u.%u.%u, SIP=%u.%u.%u.%u, hash=0x%04x\n",
+              	        nfpRuleDeleteCount, MV_IP_QUAD(currRule->routingInfo.dstIp), 
+                        MV_IP_QUAD(currRule->routingInfo.srcIp), hash_tr);
+#endif	
+		    mvOsFree(currRule);	
+		    return MV_OK;
+	    }
+    }
+    return MV_NOT_FOUND;
+}
+
+/* Find and return the first matching rule in the Routing + ARP information table */
+static INLINE MV_FP_RULE* mvFpRuleFind(MV_U32 dstIp, MV_U32 srcIp)
+{
+    MV_U32      hash, hash_tr;
+    MV_FP_RULE* pRule;
+    int         count = 0;
+
+    hash = mv_jhash_3words(dstIp, srcIp, (MV_U32)0, fp_ip_jhash_iv);
+    hash_tr = hash & (ruleDbSize - 1);
+
+    pRule = ruleDb[hash_tr].ruleChain;
+
+    while(pRule)
+    {
+        /* look for a matching rule */
+        if( (pRule->routingInfo.dstIp == dstIp) && 
+            (pRule->routingInfo.srcIp == srcIp) )
+        {
+	        pRule->mgmtInfo.new_count++;
+            return pRule;
+        }
+        pRule = pRule->next;
+        count++;
+    }
+    return NULL;
+}
+
+#ifdef CONFIG_MV_ETH_NFP_FDB_SUPPORT
+static INLINE MV_U32 mvFpFdbMember(MV_U32 ifIndex)
+{
+	return (ifIndex < ETH_FP_IFINDEX_MAX) ? fdbMember[ifIndex] : 0;
+}
+
+static MV_FP_FDB_RULE* mvFpFdbLookup(MV_U32 ifIndex, MV_U8* pDA)
+{
+    MV_U32          hash, hash_tr;
+    MV_FP_FDB_RULE* pRule;
+	MV_U32          bridgeId;
+    int             count = 0;
+
+	if (ifIndex >= ETH_FP_IFINDEX_MAX)
+		return NULL;
+
+	if (!(bridgeId = fdbMember[ifIndex]))
+		return NULL;
+
+    hash = mv_jhash_3words(bridgeId, 0, *(MV_U32*)(pDA+2), fp_ip_jhash_iv);
+    hash_tr = hash & (fdbRuleDbSize - 1);
+
+    pRule = fdbRuleDb[hash_tr].ruleChain;
+
+	while (pRule) {
+/*
+		MV_NFP_DBG("%s: looking %d %02x:%02x:%02x:%02x:%02x:%02x\n",
+			   __FUNCTION__, bridgeId, 
+				   pRule->fdbInfo.mac[0],
+				   pRule->fdbInfo.mac[1],
+				   pRule->fdbInfo.mac[2],
+				   pRule->fdbInfo.mac[3],
+				   pRule->fdbInfo.mac[4],
+				   pRule->fdbInfo.mac[5]);
+*/
+		if ((bridgeId == pRule->fdbInfo.bridge) &&
+			(*((MV_U16*)(pDA+0)) == *(MV_U16*)(&pRule->fdbInfo.mac[0])) &&
+			(*((MV_U16*)(pDA+2)) == *(MV_U16*)(&pRule->fdbInfo.mac[2])) &&
+			(*((MV_U16*)(pDA+4)) == *(MV_U16*)(&pRule->fdbInfo.mac[4])))
+		{
+			pRule->mgmtInfo.new_count++;
+			break;
+		}
+		pRule = pRule->next;
+		count++;
+	}
+/*
+	if (pRule)
+		MV_NFP_DBG("%s: lookup bridge=%d %02x:%02x:%02x:%02x:%02x:%02x => if=%d flags=%x\n",
+				__FUNCTION__, bridgeId, pDA[0],pDA[1],pDA[2],pDA[3],pDA[4],pDA[5],
+				pRule->fdbInfo.ifIndex, pRule->fdbInfo.flags);
+	else
+		MV_NFP_DBG("%s: lookup bridge=%d %02x:%02x:%02x:%02x:%02x:%02x => unknown\n",
+				__FUNCTION__, bridgeId, pDA[0],pDA[1],pDA[2],pDA[3],pDA[4],pDA[5]);
+				
+*/
+    return pRule;
+}
+#endif	/* CONFIG_MV_ETH_NFP_FDB_SUPPORT */
+int mvFpProcess(MV_U32 ifIndex, MV_U8* pData, MV_IP_HEADER* pIpHdr, MV_FP_STATS* pFpStats)
+{
+    MV_FP_RULE      *pFpRoute; 
+    MV_U32          dip, sip;
+#ifdef CONFIG_MV_ETH_NFP_NAT_SUPPORT
+    MV_U8           proto;
+    MV_U16          srcPort, dstPort;
+    MV_FP_NAT_RULE  *pDnatRule, *pSnatRule;
+#endif /* CONFIG_MV_ETH_NFP_NAT_SUPPORT */
+#ifdef CONFIG_MV_ETH_NFP_FDB_SUPPORT
+	MV_FP_FDB_RULE	*pFdb;
+#endif
+    MV_U8*	        pEthHeader = pData + ETH_MV_HEADER_SIZE;
+
+    MV_NFP_STAT( pFpStats->process++ );
+
+    /* Check MAC address: 
+     *   WAN - non-promiscous mode. 
+     *       Unicast packets - NFP, 
+     *       Multicast, Broadcast - Linux 
+     *   LAN - Promiscous mode. 
+     *       LAN Unicast MAC - NFP, 
+     *       Multicast, Broadcast, Unknown Unicast - Linux 
+     */
+    if(pEthHeader[0] & 0x1)
+    {
+        /* Go to Linux IP stack */   
+        MV_NFP_STAT( pFpStats->multicast++);
+        return -1;
+    }
+
+#ifdef CONFIG_MV_ETH_NFP_FDB_SUPPORT
+	if (mvFpFdbMember(ifIndex))
+	{
+		pFdb = mvFpFdbLookup(ifIndex, pEthHeader);
+		if (!pFdb) {
+			MV_NFP_STAT( pFpStats->fdb_rx_unknown++ );
+			return -1;
+		}
+		if (pFdb->fdbInfo.flags & MV_FP_FDB_IS_LOCAL) {
+			/* DA is local, continue with routing */
+			MV_NFP_STAT( pFpStats->fdb_rx_local++ );
+		} 
+		else {
+			/* perform bridging */
+			MV_NFP_STAT( pFpStats->fdb_bridged++ );
+			return pFdb->fdbInfo.ifIndex;
+		}
+	}
+#endif /* CONFIG_MV_ETH_NFP_FDB_SUPPORT */
+    /* Check TTL value */
+    if(pIpHdr->ttl <= 1)
+    {
+        /* TTL expired */
+        MV_NFP_STAT( pFpStats->ip_ttl_expired++ );
+        return -1;
+    }
+
+    dip = pIpHdr->dstIP;
+    sip = pIpHdr->srcIP;
+
+#ifdef CONFIG_MV_ETH_NFP_NAT_SUPPORT
+    proto = mvFpNatPortsGet(pIpHdr, &dstPort, &srcPort);
+    if(proto == MV_IP_PROTO_NULL)
+    {
+        /* NAT not supported for this protocol */
+        MV_NFP_STAT( pFpStats->nat_bad_proto++ );
+        pDnatRule = NULL;
+    }
+    else
+    {
+        /* Lookup NAT database accordingly with 5 tuple key */
+        pDnatRule = mvFpNatRuleFind(dip, sip, proto, dstPort, srcPort);
+    }
+    if(pDnatRule != NULL) 
+    {
+        if(pDnatRule->flags & MV_FP_DIP_CMD_MAP)
+        {
+            dip = pDnatRule->newIp;
+        }
+        if(pDnatRule->flags & MV_FP_DPORT_CMD_MAP)
+        {
+            dstPort = pDnatRule->newPort;
+        }
+    }
+    else
+    {
+        MV_NFP_STAT( pFpStats->dnat_not_found++ );
+    }
+
+#endif /* CONFIG_MV_ETH_NFP_NAT_SUPPORT */
+
+    pFpRoute = mvFpRuleFind(dip, sip);
+    if(pFpRoute == NULL)
+    {
+        /* IP Routing rule is not found: go to Linux IP stack */
+        MV_NFP_STAT( pFpStats->ip_not_found++ );
+        return -1;
+    }
+    MV_NFP_STAT(pFpStats->ip_found++);
+
+#ifdef CONFIG_MV_ETH_NFP_NAT_SUPPORT
+    if( (pDnatRule != NULL) && (pDnatRule->flags & MV_FP_DNAT_CMD_MAP) )
+    {
+        MV_NFP_STAT( pFpStats->dnat_found++ );
+        pSnatRule = mvFpNatRuleFind(dip, sip, proto, dstPort, srcPort);
+    }
+    else
+    {
+        pSnatRule = pDnatRule;
+    }
+    
+    if( (pSnatRule != NULL) && (pSnatRule->flags & MV_FP_SNAT_CMD_MAP) )
+    {
+        MV_NFP_STAT( pFpStats->snat_found++ );
+    }
+    else
+    {
+        MV_NFP_STAT( pFpStats->snat_not_found++ );
+    }
+    
+    /* Check IP awareness */
+    if( (pFpRoute->routingInfo.aware_flags & MV_FP_DIP_CMD_MAP) &&
+        (pDnatRule == NULL) )
+    {
+        MV_NFP_STAT( pFpStats->dnat_aware++ );
+        return -1;
+    }
+
+    if( (pFpRoute->routingInfo.aware_flags & MV_FP_SIP_CMD_MAP) &&
+        (pSnatRule == NULL) )
+    {
+        MV_NFP_STAT( pFpStats->snat_aware++ );
+        return -1;
+    }
+
+    /* Update packet accordingly with NAT rules */
+    if( (pDnatRule != NULL) || (pSnatRule != NULL) )
+    {
+        mvFpNatPktUpdate(pIpHdr, pDnatRule, pSnatRule);
+    }
+#endif /* CONFIG_MV_ETH_NFP_NAT_SUPPORT */
+
+    if( (unsigned int)pEthHeader & 0x2)
+    {
+        *((MV_U16*)(pEthHeader)) = *(MV_U16*)(&pFpRoute->routingInfo.dstMac[0]);
+        *((MV_U32*)(pEthHeader + 2)) = *(MV_U32*)(&pFpRoute->routingInfo.dstMac[2]);
+        *((MV_U32*)(pEthHeader + 2 + 4)) = *(MV_U32*)(&pFpRoute->routingInfo.srcMac[0]);
+        *((MV_U16*)(pEthHeader + 2 + 4 + 4)) = *(MV_U16*)(&pFpRoute->routingInfo.srcMac[4]);
+    }   
+    else
+    {
+        memcpy(pEthHeader, pFpRoute->routingInfo.dstMac, MV_MAC_ADDR_SIZE*2);
+    }
+    pIpHdr->ttl--;
+
+#ifdef CONFIG_MV_ETH_NFP_FDB_SUPPORT
+	/* find actual port inside bridge, otherwise br->xmit is called */
+	if (mvFpFdbMember(pFpRoute->routingInfo.outIfIndex)) {
+		pFdb = mvFpFdbLookup(pFpRoute->routingInfo.outIfIndex, pEthHeader);
+		if (pFdb) {
+			MV_NFP_STAT( pFpStats->fdb_tx_found++ );
+			return pFdb->fdbInfo.ifIndex;
+		} 
+	}
+#endif /* CONFIG_MV_ETH_NFP_FDB_SUPPORT */
+    
+    return pFpRoute->routingInfo.outIfIndex;
+}
+
+void        mvFpStatsPrint(MV_FP_STATS *pFpStats)
+{
+#ifdef MV_FP_STATISTICS
+    int         i = 0;
+
+    mvOsPrintf( "\n====================================================\n" );
+    mvOsPrintf( " NFP statistics");
+    mvOsPrintf( "\n-------------------------------\n" );
+
+    mvOsPrintf( "nfp_parsing....................%10u\n", pFpStats->parsing );
+    mvOsPrintf( "nfp_process....................%10u\n", pFpStats->process );
+    mvOsPrintf( "nfp_multicast..................%10u\n", pFpStats->multicast );
+    mvOsPrintf( "nfp_non_ip.....................%10u\n", pFpStats->non_ip );
+    mvOsPrintf( "nfp_vlan_tagged................%10u\n", pFpStats->vlan_tagged );
+    mvOsPrintf( "nfp_ip_not_found...............%10u\n", pFpStats->ip_not_found );
+    mvOsPrintf( "nfp_ttl_expired................%10u\n", pFpStats->ip_ttl_expired );
+    mvOsPrintf( "nfp_ip_found...................%10u\n", pFpStats->ip_found );
+
+#ifdef CONFIG_MV_ETH_NFP_NAT_SUPPORT
+    mvOsPrintf( "nfp_nat_bad_proto..............%10u\n", pFpStats->nat_bad_proto);
+    mvOsPrintf( "nfp_nat_dnat_found.............%10u\n", pFpStats->dnat_found);
+    mvOsPrintf( "nfp_nat_snat_found.............%10u\n", pFpStats->snat_found);
+    mvOsPrintf( "nfp_nat_dnat_not_found.........%10u\n", pFpStats->dnat_not_found);
+    mvOsPrintf( "nfp_nat_snat_not_found.........%10u\n", pFpStats->snat_not_found);
+    mvOsPrintf( "nfp_nat_dnat_aware.............%10u\n", pFpStats->dnat_aware);
+    mvOsPrintf( "nfp_nat_snat_aware.............%10u\n", pFpStats->snat_aware);
+#endif /* CONFIG_MV_ETH_NFP_NAT_SUPPORT */
+
+#ifdef CONFIG_MV_ETH_NFP_FDB_SUPPORT
+	mvOsPrintf( "nfp_fdb_rx_local...............%10u\n", pFpStats->fdb_rx_local);
+	mvOsPrintf( "nfp_fdb_rx_unknown.............%10u\n", pFpStats->fdb_rx_unknown);
+	mvOsPrintf( "nfp_fdb_tx_found...............%10u\n", pFpStats->fdb_tx_found);
+	mvOsPrintf( "nfp_fdb_bridged................%10u\n", pFpStats->fdb_bridged);
+#endif /* CONFIG_MV_ETH_NFP_FDB_SUPPORT */
+
+    memset(pFpStats, 0, sizeof(MV_FP_STATS));
+#endif /* MV_FP_STATISTICS */
+
+    mvOsPrintf("\n");
+    mvOsPrintf("Routing rules: Set=%u, Update=%u, Delete=%u, maxDepth=%u\n",
+                nfpRuleSetCount, nfpRuleUpdateCount, nfpRuleDeleteCount, 
+                nfpHashMaxDepth);
+
+#ifdef CONFIG_MV_ETH_NFP_NAT_SUPPORT
+    mvOsPrintf("\n");
+    mvOsPrintf("NAT rules:     Set=%u, Update=%u, Delete=%u, maxDepth=%u\n",
+                natRuleSetCount, natRuleUpdateCount, natRuleDeleteCount, 
+                natHashMaxDepth);
+#endif /* CONFIG_MV_ETH_NFP_NAT_SUPPORT */
+
+#ifdef CONFIG_MV_ETH_NFP_FDB_SUPPORT
+    mvOsPrintf("\n");
+    mvOsPrintf("FDB rules:     Set=%u, Update=%u, Delete=%u, maxDepth=%u\n",
+                fdbRuleSetCount, fdbRuleUpdateCount, fdbRuleDeleteCount, 
+                fdbHashMaxDepth);
+#endif /* CONFIG_MV_ETH_NFP_FDB_SUPPORT */
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/eth/gbe/mvEthAddrDec.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/eth/gbe/mvEthAddrDec.c
@@ -0,0 +1,466 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "../mvEth.h"
+#include "mvEthRegs.h"
+
+MV_TARGET ethAddrDecPrioTab[] =
+{
+#if defined(MV_INCLUDE_SDRAM_CS0)
+        SDRAM_CS0,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS1)
+        SDRAM_CS1,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS2)
+        SDRAM_CS2,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS3)
+        SDRAM_CS3,
+#endif
+#if defined(MV_INCLUDE_DEVICE_CS0)
+        DEVICE_CS0,
+#endif
+#if defined(MV_INCLUDE_DEVICE_CS1)
+        DEVICE_CS1,
+#endif
+#if defined(MV_INCLUDE_DEVICE_CS2)
+        DEVICE_CS2,
+#endif
+#if defined(MV_INCLUDE_DEVICE_CS3)
+        DEVICE_CS3,
+#endif
+#if defined(MV_INCLUDE_PEX)
+        PEX0_IO,
+	PEX1_IO, 
+#endif
+        TBL_TERM
+};
+
+static MV_STATUS ethWinOverlapDetect(int port, MV_U32 winNum, MV_ADDR_WIN *pAddrWin);
+
+/*******************************************************************************
+* mvEthWinInit
+*
+* DESCRIPTION:
+*	This function initialize ETH window decode unit. It set the default 
+*	address decode windows of the unit.
+*
+* INPUT:
+*	port	 : The port number to initialize the address decoding for.
+*	addWinMap: An array holding the address decoding information for the
+*		    system.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_ERROR if setting fail.
+*******************************************************************************/
+MV_STATUS mvEthWinInit (MV_U32 port, MV_UNIT_WIN_INFO *addrWinMap)
+{
+    MV_U32		winNum, winPrioIndex=0, i, regVal=0;
+    MV_UNIT_WIN_INFO	*addrDecWin;
+    static MV_U32	accessProtReg = 0;
+
+#if (MV_ETH_VERSION <= 1)
+    static MV_BOOL  isFirst = MV_TRUE;
+
+    if(isFirst == MV_FALSE) {
+        MV_REG_WRITE(ETH_ACCESS_PROTECT_REG(port), accessProtReg);
+        return MV_OK;
+    }
+    isFirst = MV_FALSE;
+#endif /* MV_GIGA_ETH_VERSION */
+
+    /* Initiate Ethernet address decode */
+    /* First disable all address decode windows */
+    for(winNum=0; winNum<ETH_MAX_DECODE_WIN; winNum++)
+        regVal |= MV_BIT_MASK(winNum);
+
+    MV_REG_WRITE(ETH_BASE_ADDR_ENABLE_REG(port), regVal);
+
+    /* Go through all windows in user table until table terminator      */
+    for (winNum=0; ((ethAddrDecPrioTab[winPrioIndex] != TBL_TERM) && 
+                    (winNum < ETH_MAX_DECODE_WIN)); ) {
+	addrDecWin = &addrWinMap[ethAddrDecPrioTab[winPrioIndex]];
+
+	if (addrDecWin->enable == MV_TRUE) {
+	    if(MV_OK != mvEthWinWrite(port, winNum, addrDecWin)) {
+		mvOsPrintf("mvEthWinInit: ERR. mvEthWinWrite failed winNum=%d\n",
+				winNum);
+		return MV_ERROR;
+	    }
+	    winNum++;
+	}
+	winPrioIndex ++;
+    }
+
+    /* set full access to all windows. */
+    for(i=0; i<winNum; i++) 
+        accessProtReg |= (FULL_ACCESS << (i*2));
+
+    MV_REG_WRITE(ETH_ACCESS_PROTECT_REG(port), accessProtReg);
+
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvEthWinWrite
+*
+* DESCRIPTION:
+*	This function writes the address decoding registers according to the
+*	given window configuration.
+*
+* INPUT:
+*	unit	    - The Ethernet unit number to configure. 
+*       winNum	    - ETH target address decode window number.
+*       pAddrDecWin - ETH target window data structure.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_OK on success,
+*	MV_BAD_PARAM if winNum is invalid.
+*	MV_ERROR otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvEthWinWrite(MV_U32 port, MV_U32 winNum, MV_UNIT_WIN_INFO *pAddrDecWin)
+{
+    MV_U32  size, alignment;
+    MV_U32  baseReg, sizeReg;
+
+    /* Parameter checking   */
+    if (winNum >= ETH_MAX_DECODE_WIN) {
+        mvOsPrintf("mvEthWinSet: ERR. Invalid win num %d\n",winNum);
+        return MV_BAD_PARAM;
+    }    
+
+    /* Check if the requested window overlapps with current windows     */
+    if (MV_TRUE == ethWinOverlapDetect(port, winNum, &pAddrDecWin->addrWin))
+    {
+        mvOsPrintf("mvEthWinWrite: ERR. Window %d overlap\n", winNum);
+        return MV_ERROR;
+    }
+
+    /* check if address is aligned to the size */
+    if(MV_IS_NOT_ALIGN(pAddrDecWin->addrWin.baseLow, pAddrDecWin->addrWin.size)) {
+	mvOsPrintf("mvEthWinSet: Error setting Ethernet window %d.\n"\
+		   "Address 0x%08x is unaligned to size 0x%x.\n",
+		   winNum,
+		   pAddrDecWin->addrWin.baseLow,
+		   pAddrDecWin->addrWin.size);
+	return MV_ERROR;
+    }
+
+    size = pAddrDecWin->addrWin.size;
+    if(!MV_IS_POWER_OF_2(size)) {
+	mvOsPrintf("mvEthWinWrite: Error setting AUDIO window %d. "\
+		    "Window size is not a power to 2.",winNum);
+	return MV_BAD_PARAM;
+    }
+
+    baseReg = (pAddrDecWin->addrWin.baseLow & ETH_WIN_BASE_MASK);
+    sizeReg = MV_REG_READ(ETH_WIN_SIZE_REG(port, winNum));
+
+    /* set size */
+    alignment = 1 << ETH_WIN_SIZE_OFFS;
+    sizeReg &= ~ETH_WIN_SIZE_MASK;
+    sizeReg |= (((size / alignment) - 1) << ETH_WIN_SIZE_OFFS);
+
+    /* set attributes */
+    baseReg &= ~ETH_WIN_ATTR_MASK;
+    baseReg |= pAddrDecWin->attrib << ETH_WIN_ATTR_OFFS;
+
+    /* set target ID */
+    baseReg &= ~ETH_WIN_TARGET_MASK;
+    baseReg |= pAddrDecWin->targetId << ETH_WIN_TARGET_OFFS;
+
+    /* for the safe side we disable the window before writing the new
+    values */
+    mvEthWinEnable(port, winNum, MV_FALSE);
+    MV_REG_WRITE(ETH_WIN_BASE_REG(port, winNum), baseReg);
+    
+    /* Write to address decode Size Register                            */
+    MV_REG_WRITE(ETH_WIN_SIZE_REG(port, winNum), sizeReg);
+
+    /* Enable address decode target window                              */
+    if (pAddrDecWin->enable == MV_TRUE)
+	mvEthWinEnable(port, winNum, MV_TRUE);
+
+    return MV_OK;
+}
+
+/*******************************************************************************
+* ethWinOverlapDetect - Detect ETH address windows overlapping
+*
+* DESCRIPTION:
+*       An unpredicted behaviur is expected in case ETH address decode
+*       windows overlapps.
+*       This function detects ETH address decode windows overlapping of a
+*       specified window. The function does not check the window itself for
+*       overlapping. The function also skipps disabled address decode windows.
+*
+* INPUT:
+*       winNum      - address decode window number.
+*       pAddrDecWin - An address decode window struct.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE if the given address window overlap current address
+*       decode map, MV_FALSE otherwise, MV_ERROR if reading invalid data
+*       from registers.
+*
+*******************************************************************************/
+static MV_STATUS ethWinOverlapDetect(int port, MV_U32 winNum, MV_ADDR_WIN *pAddrWin)
+{
+    MV_U32              baseAddrEnableReg;
+    MV_U32              winNumIndex;
+    MV_UNIT_WIN_INFO	addrDecWin;
+
+    /* Read base address enable register. Do not check disabled windows     */
+    baseAddrEnableReg = MV_REG_READ(ETH_BASE_ADDR_ENABLE_REG(port));
+                                                                                                                             
+    for (winNumIndex=0; winNumIndex<ETH_MAX_DECODE_WIN; winNumIndex++)
+    {
+        /* Do not check window itself           */
+        if (winNumIndex == winNum)
+        {
+            continue;
+        }
+    
+        /* Do not check disabled windows        */
+        if (baseAddrEnableReg & (1 << winNumIndex))
+        {
+            continue;
+        }
+    
+        /* Get window parameters        */
+        if (MV_OK != mvEthWinRead(port, winNumIndex, &addrDecWin))
+        {
+            mvOsPrintf("ethWinOverlapDetect: ERR. TargetWinGet failed\n");
+            return MV_ERROR;
+        }
+
+        if (MV_TRUE == mvWinOverlapTest(pAddrWin, &(addrDecWin.addrWin)))
+        {
+            return MV_TRUE;
+        }
+    }
+    return MV_FALSE;
+}
+
+
+/*******************************************************************************
+* mvEthWinRead
+*
+* DESCRIPTION:
+*       Read Ethernet peripheral target address window.
+*
+* INPUT:
+*       winNum - ETH to target address decode window number.
+*
+* OUTPUT:
+*       pAddrDecWin - ETH target window data structure.
+*
+* RETURN:
+*	MV_BAD_PARAM if winNum is invalid.
+*	MV_ERROR otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvEthWinRead(MV_U32 port, MV_U32 winNum, MV_UNIT_WIN_INFO *pAddrDecWin)
+{
+    MV_U32  baseReg, sizeReg;
+    MV_U32  alignment, size;
+
+    /* Parameter checking   */
+    if (winNum >= ETH_MAX_DECODE_WIN)
+    {
+        mvOsPrintf("mvEthWinGet: ERR. Invalid winNum %d\n", winNum);
+        return MV_NOT_SUPPORTED;
+    }
+    
+    baseReg =  MV_REG_READ(ETH_WIN_BASE_REG(port, winNum));
+    sizeReg = MV_REG_READ(ETH_WIN_SIZE_REG(port, winNum));
+
+    alignment = 1 << ETH_WIN_SIZE_OFFS;
+    size = (sizeReg & ETH_WIN_SIZE_MASK) >> ETH_WIN_SIZE_OFFS;
+    pAddrDecWin->addrWin.size = (size + 1) * alignment;
+
+    /* Extract base address					*/
+    pAddrDecWin->addrWin.baseLow = baseReg & ETH_WIN_BASE_MASK;
+    pAddrDecWin->addrWin.baseHigh =  0;
+
+    /* attrib and targetId */
+    pAddrDecWin->attrib = (baseReg & ETH_WIN_ATTR_MASK) >> ETH_WIN_ATTR_OFFS;
+    pAddrDecWin->targetId = (baseReg & ETH_WIN_TARGET_MASK) >> ETH_WIN_TARGET_OFFS;
+
+    /* Check if window is enabled   */
+    if (~(MV_REG_READ(ETH_BASE_ADDR_ENABLE_REG(port))) & (1 << winNum) )
+        pAddrDecWin->enable = MV_TRUE;
+    else
+        pAddrDecWin->enable = MV_FALSE;
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvEthWinEnable - Enable/disable a ETH to target address window
+*
+* DESCRIPTION:
+*       This function enable/disable a ETH to target address window.
+*       According to parameter 'enable' the routine will enable the
+*       window, thus enabling ETH accesses (before enabling the window it is
+*       tested for overlapping). Otherwise, the window will be disabled.
+*
+* INPUT:
+*       winNum - ETH to target address decode window number.
+*       enable - Enable/disable parameter.
+*
+* OUTPUT:
+*       N/A
+*
+* RETURN:
+*       MV_ERROR if decode window number was wrong or enabled window overlapps.
+*
+*******************************************************************************/
+MV_STATUS mvEthWinEnable(MV_U32 port, MV_U32 winNum, MV_BOOL enable)
+{
+    /* Parameter checking   */
+    if (winNum >= ETH_MAX_DECODE_WIN) {
+        mvOsPrintf("mvEthTargetWinEnable:ERR. Invalid winNum%d\n",winNum);
+        return MV_ERROR;
+    }
+
+    if (enable == MV_TRUE)
+        MV_REG_BIT_RESET(ETH_BASE_ADDR_ENABLE_REG(port), (1 << winNum));
+    else
+	/* Disable address decode target window                             */
+	MV_REG_BIT_SET(ETH_BASE_ADDR_ENABLE_REG(port), (1 << winNum));
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvEthProtWinSet - Set access protection of Ethernet to target window.
+*
+* DESCRIPTION:
+*       Each Ethernet port can be configured with access attributes for each 
+*       of the Ethenret to target windows (address decode windows). This
+*       function sets access attributes to a given window for the given channel.
+*
+* INPUTS:
+*       ethPort   - ETH channel number. See MV_ETH_CHANNEL enumerator.
+*       winNum - IETH to target address decode window number.
+*       access - IETH access rights. See MV_ACCESS_RIGHTS enumerator.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_ERROR in case window number is invalid or access right reserved.
+*
+*******************************************************************************/
+MV_STATUS mvEthProtWinSet(MV_U32 portNo, MV_U32 winNum, MV_ACCESS_RIGHTS access)
+{    
+    MV_U32 protReg;
+
+    /* Parameter checking   */
+    if(portNo >= MV_ETH_MAX_PORTS)
+    {
+        mvOsPrintf("mvEthProtWinSet:ERR. Invalid port number %d\n", portNo);
+        return MV_ERROR;
+    }
+    
+    if (winNum >= ETH_MAX_DECODE_WIN)
+    {
+            mvOsPrintf("mvEthProtWinSet:ERR. Invalid winNum%d\n",winNum);
+            return MV_ERROR;
+    }
+
+    if((access == ACC_RESERVED) || (access >= MAX_ACC_RIGHTS))
+    {
+        mvOsPrintf("mvEthProtWinSet:ERR. Inv access param %d\n", access);
+        return MV_ERROR;
+    }
+    /* Read current protection register */
+    protReg = MV_REG_READ(ETH_ACCESS_PROTECT_REG(portNo));
+                          
+    /* Clear protection window field */
+    protReg &= ~(ETH_PROT_WIN_MASK(winNum));
+
+    /* Set new protection field value */
+    protReg |= (access << (ETH_PROT_WIN_OFFS(winNum)));
+    
+    /* Write protection register back   */
+    MV_REG_WRITE(ETH_ACCESS_PROTECT_REG(portNo), protReg);
+
+    return MV_OK;
+}               
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/eth/gbe/mvEthRegs.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/eth/gbe/mvEthRegs.h
@@ -0,0 +1,730 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+        this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#ifndef __INCmvEthRegsh
+#define __INCmvEthRegsh
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+#include "mvSysEthConfig.h"
+
+/****************************************/
+/*        Ethernet Unit Registers       */
+/****************************************/
+#define ETH_PHY_ADDR_REG(port)              (MV_ETH_REGS_BASE(port) + 0x000)
+#define ETH_SMI_REG(port)                   (MV_ETH_REGS_BASE(port) + 0x004)
+#define ETH_UNIT_DEF_ADDR_REG(port)         (MV_ETH_REGS_BASE(port) + 0x008)
+#define ETH_UNIT_DEF_ID_REG(port)           (MV_ETH_REGS_BASE(port) + 0x00c)
+#define ETH_UNIT_RESERVED(port)             (MV_ETH_REGS_BASE(port) + 0x014)
+#define ETH_UNIT_INTR_CAUSE_REG(port)       (MV_ETH_REGS_BASE(port) + 0x080)
+#define ETH_UNIT_INTR_MASK_REG(port)        (MV_ETH_REGS_BASE(port) + 0x084)
+
+
+#define ETH_UNIT_ERROR_ADDR_REG(port)       (MV_ETH_REGS_BASE(port) + 0x094)
+#define ETH_UNIT_INT_ADDR_ERROR_REG(port)   (MV_ETH_REGS_BASE(port) + 0x098)
+#define ETH_UNIT_CONTROL_REG(port)          (MV_ETH_REGS_BASE(port) + 0x0B0)
+
+#define ETH_PORT_CONFIG_REG(port)           (MV_ETH_REGS_BASE(port) + 0x400)
+#define ETH_PORT_CONFIG_EXTEND_REG(port)    (MV_ETH_REGS_BASE(port) + 0x404)
+#define ETH_MII_SERIAL_PARAM_REG(port)      (MV_ETH_REGS_BASE(port) + 0x408)
+#define ETH_GMII_SERIAL_PARAM_REG(port)     (MV_ETH_REGS_BASE(port) + 0x40c)
+#define ETH_VLAN_ETHER_TYPE_REG(port)       (MV_ETH_REGS_BASE(port) + 0x410)
+#define ETH_MAC_ADDR_LOW_REG(port)          (MV_ETH_REGS_BASE(port) + 0x414)
+#define ETH_MAC_ADDR_HIGH_REG(port)         (MV_ETH_REGS_BASE(port) + 0x418)
+#define ETH_SDMA_CONFIG_REG(port)           (MV_ETH_REGS_BASE(port) + 0x41c)
+#define ETH_DIFF_SERV_PRIO_REG(port, code)  (MV_ETH_REGS_BASE(port) + 0x420  + ((code)<<2))
+#define ETH_PORT_SERIAL_CTRL_REG(port)      (MV_ETH_REGS_BASE(port) + 0x43c)
+#define ETH_VLAN_TAG_TO_PRIO_REG(port)      (MV_ETH_REGS_BASE(port) + 0x440)
+#define ETH_PORT_STATUS_REG(port)           (MV_ETH_REGS_BASE(port) + 0x444)
+
+#define ETH_RX_QUEUE_COMMAND_REG(port)      (MV_ETH_REGS_BASE(port) + 0x680)
+#define ETH_TX_QUEUE_COMMAND_REG(port)      (MV_ETH_REGS_BASE(port) + 0x448)
+
+#define ETH_PORT_SERIAL_CTRL_1_REG(port)    (MV_ETH_REGS_BASE(port) + 0x44c)
+#define ETH_PORT_STATUS_1_REG(port)         (MV_ETH_REGS_BASE(port) + 0x450)
+#define ETH_PORT_MARVELL_HEADER_REG(port)   (MV_ETH_REGS_BASE(port) + 0x454)
+#define ETH_PORT_FIFO_PARAMS_REG(port)      (MV_ETH_REGS_BASE(port) + 0x458)
+#define ETH_MAX_TOKEN_BUCKET_SIZE_REG(port) (MV_ETH_REGS_BASE(port) + 0x45c)
+#define ETH_INTR_CAUSE_REG(port)            (MV_ETH_REGS_BASE(port) + 0x460)
+#define ETH_INTR_CAUSE_EXT_REG(port)        (MV_ETH_REGS_BASE(port) + 0x464)
+#define ETH_INTR_MASK_REG(port)             (MV_ETH_REGS_BASE(port) + 0x468)
+#define ETH_INTR_MASK_EXT_REG(port)         (MV_ETH_REGS_BASE(port) + 0x46c)
+#define ETH_TX_FIFO_URGENT_THRESH_REG(port) (MV_ETH_REGS_BASE(port) + 0x474)
+#define ETH_RX_MINIMAL_FRAME_SIZE_REG(port) (MV_ETH_REGS_BASE(port) + 0x47c)
+#define ETH_RX_DISCARD_PKTS_CNTR_REG(port)  (MV_ETH_REGS_BASE(port) + 0x484)
+#define ETH_RX_OVERRUN_PKTS_CNTR_REG(port)  (MV_ETH_REGS_BASE(port) + 0x488)
+#define ETH_INTERNAL_ADDR_ERROR_REG(port)   (MV_ETH_REGS_BASE(port) + 0x494)
+#define ETH_TX_FIXED_PRIO_CFG_REG(port)     (MV_ETH_REGS_BASE(port) + 0x4dc)
+#define ETH_TX_TOKEN_RATE_CFG_REG(port)     (MV_ETH_REGS_BASE(port) + 0x4e0)
+#define ETH_TX_QUEUE_COMMAND1_REG(port)     (MV_ETH_REGS_BASE(port) + 0x4e4)
+#define ETH_MAX_TRANSMIT_UNIT_REG(port)     (MV_ETH_REGS_BASE(port) + 0x4e8)
+#define ETH_TX_TOKEN_BUCKET_SIZE_REG(port)  (MV_ETH_REGS_BASE(port) + 0x4ec)
+#define ETH_TX_TOKEN_BUCKET_COUNT_REG(port) (MV_ETH_REGS_BASE(port) + 0x780)
+#define ETH_RX_DESCR_STAT_CMD_REG(port, q)  (MV_ETH_REGS_BASE(port) + 0x600 + ((q)<<4))
+#define ETH_RX_BYTE_COUNT_REG(port, q)      (MV_ETH_REGS_BASE(port) + 0x604 + ((q)<<4))
+#define ETH_RX_BUF_PTR_REG(port, q)         (MV_ETH_REGS_BASE(port) + 0x608 + ((q)<<4))
+#define ETH_RX_CUR_DESC_PTR_REG(port, q)    (MV_ETH_REGS_BASE(port) + 0x60c + ((q)<<4))
+#define ETH_TX_CUR_DESC_PTR_REG(port, q)    (MV_ETH_REGS_BASE(port) + 0x6c0 + ((q)<<2))
+
+#define ETH_TXQ_TOKEN_COUNT_REG(port, q)    (MV_ETH_REGS_BASE(port) + 0x700 + ((q)<<4))
+#define ETH_TXQ_TOKEN_CFG_REG(port, q)      (MV_ETH_REGS_BASE(port) + 0x704 + ((q)<<4))
+#define ETH_TXQ_ARBITER_CFG_REG(port, q)    (MV_ETH_REGS_BASE(port) + 0x708 + ((q)<<4))
+
+#if (MV_ETH_VERSION >= 4) 
+#define ETH_TXQ_CMD_1_REG(port)             (MV_ETH_REGS_BASE(port) + 0x4E4)
+#define ETH_EJP_TX_HI_IPG_REG(port)         (MV_ETH_REGS_BASE(port) + 0x7A8)
+#define ETH_EJP_TX_LO_IPG_REG(port)         (MV_ETH_REGS_BASE(port) + 0x7B8)
+#define ETH_EJP_HI_TKN_LO_PKT_REG(port)     (MV_ETH_REGS_BASE(port) + 0x7C0)
+#define ETH_EJP_HI_TKN_ASYNC_PKT_REG(port)  (MV_ETH_REGS_BASE(port) + 0x7C4)
+#define ETH_EJP_LO_TKN_ASYNC_PKT_REG(port)  (MV_ETH_REGS_BASE(port) + 0x7C8)
+#define ETH_EJP_TX_SPEED_REG(port)          (MV_ETH_REGS_BASE(port) + 0x7D0)
+#endif /* MV_ETH_VERSION >= 4 */
+
+#define ETH_MIB_COUNTERS_BASE(port)         (MV_ETH_REGS_BASE(port) + 0x1000)
+#define ETH_DA_FILTER_SPEC_MCAST_BASE(port) (MV_ETH_REGS_BASE(port) + 0x1400)
+#define ETH_DA_FILTER_OTH_MCAST_BASE(port)  (MV_ETH_REGS_BASE(port) + 0x1500)
+#define ETH_DA_FILTER_UCAST_BASE(port)      (MV_ETH_REGS_BASE(port) + 0x1600)
+
+/* Phy address register definitions */
+#define ETH_PHY_ADDR_OFFS          0                                       
+#define ETH_PHY_ADDR_MASK          (0x1f <<ETH_PHY_ADDR_OFFS)
+                                 
+/* MIB Counters register definitions */
+#define ETH_MIB_GOOD_OCTETS_RECEIVED_LOW    0x0
+#define ETH_MIB_GOOD_OCTETS_RECEIVED_HIGH   0x4
+#define ETH_MIB_BAD_OCTETS_RECEIVED         0x8
+#define ETH_MIB_INTERNAL_MAC_TRANSMIT_ERR   0xc
+#define ETH_MIB_GOOD_FRAMES_RECEIVED        0x10
+#define ETH_MIB_BAD_FRAMES_RECEIVED         0x14
+#define ETH_MIB_BROADCAST_FRAMES_RECEIVED   0x18
+#define ETH_MIB_MULTICAST_FRAMES_RECEIVED   0x1c
+#define ETH_MIB_FRAMES_64_OCTETS            0x20
+#define ETH_MIB_FRAMES_65_TO_127_OCTETS     0x24
+#define ETH_MIB_FRAMES_128_TO_255_OCTETS    0x28
+#define ETH_MIB_FRAMES_256_TO_511_OCTETS    0x2c
+#define ETH_MIB_FRAMES_512_TO_1023_OCTETS   0x30
+#define ETH_MIB_FRAMES_1024_TO_MAX_OCTETS   0x34
+#define ETH_MIB_GOOD_OCTETS_SENT_LOW        0x38
+#define ETH_MIB_GOOD_OCTETS_SENT_HIGH       0x3c
+#define ETH_MIB_GOOD_FRAMES_SENT            0x40
+#define ETH_MIB_EXCESSIVE_COLLISION         0x44
+#define ETH_MIB_MULTICAST_FRAMES_SENT       0x48
+#define ETH_MIB_BROADCAST_FRAMES_SENT       0x4c
+#define ETH_MIB_UNREC_MAC_CONTROL_RECEIVED  0x50
+#define ETH_MIB_FC_SENT                     0x54
+#define ETH_MIB_GOOD_FC_RECEIVED            0x58
+#define ETH_MIB_BAD_FC_RECEIVED             0x5c
+#define ETH_MIB_UNDERSIZE_RECEIVED          0x60
+#define ETH_MIB_FRAGMENTS_RECEIVED          0x64
+#define ETH_MIB_OVERSIZE_RECEIVED           0x68
+#define ETH_MIB_JABBER_RECEIVED             0x6c
+#define ETH_MIB_MAC_RECEIVE_ERROR           0x70
+#define ETH_MIB_BAD_CRC_EVENT               0x74
+#define ETH_MIB_COLLISION                   0x78
+#define ETH_MIB_LATE_COLLISION              0x7c
+
+
+/****************************************/
+/*        Ethernet Unit Register BITs   */
+/****************************************/
+
+#define ETH_RXQ_ENABLE_OFFSET               0
+#define ETH_RXQ_ENABLE_MASK                 (0x000000FF << ETH_RXQ_ENABLE_OFFSET)
+
+#define ETH_RXQ_DISABLE_OFFSET              8
+#define ETH_RXQ_DISABLE_MASK                (0x000000FF << ETH_RXQ_DISABLE_OFFSET)
+
+/***** BITs of Transmit Queue Command (TQC) register *****/
+#define ETH_TXQ_ENABLE_OFFSET               0
+#define ETH_TXQ_ENABLE_MASK                 (0x000000FF << ETH_TXQ_ENABLE_OFFSET)
+
+#define ETH_TXQ_DISABLE_OFFSET              8
+#define ETH_TXQ_DISABLE_MASK                (0x000000FF << ETH_TXQ_DISABLE_OFFSET)
+
+#if (MV_ETH_VERSION >= 4) 
+#define ETH_TX_EJP_RESET_BIT                0
+#define ETH_TX_EJP_RESET_MASK               (1 << ETH_TX_EJP_RESET_BIT)
+
+#define ETH_TX_EJP_ENABLE_BIT               2
+#define ETH_TX_EJP_ENABLE_MASK              (1 << ETH_TX_EJP_ENABLE_BIT)
+
+#define ETH_TX_LEGACY_WRR_BIT               3
+#define ETH_TX_LEGACY_WRR_MASK              (1 << ETH_TX_LEGACY_WRR_BIT)
+#endif /* (MV_ETH_VERSION >= 4) */
+
+/***** BITs of Ethernet Port Status reg (PSR) *****/
+#define ETH_LINK_UP_BIT                     1
+#define ETH_LINK_UP_MASK                    (1<<ETH_LINK_UP_BIT)
+                     
+#define ETH_FULL_DUPLEX_BIT                 2
+#define ETH_FULL_DUPLEX_MASK                (1<<ETH_FULL_DUPLEX_BIT)
+
+#define ETH_ENABLE_RCV_FLOW_CTRL_BIT        3
+#define ETH_ENABLE_RCV_FLOW_CTRL_MASK       (1<<ETH_ENABLE_RCV_FLOW_CTRL_BIT)
+
+#define ETH_GMII_SPEED_1000_BIT             4
+#define ETH_GMII_SPEED_1000_MASK            (1<<ETH_GMII_SPEED_1000_BIT)
+
+#define ETH_MII_SPEED_100_BIT               5
+#define ETH_MII_SPEED_100_MASK              (1<<ETH_MII_SPEED_100_BIT)
+
+#define ETH_TX_IN_PROGRESS_BIT              7
+#define ETH_TX_IN_PROGRESS_MASK             (1<<ETH_TX_IN_PROGRESS_BIT)
+
+#define ETH_TX_FIFO_EMPTY_BIT               10
+#define ETH_TX_FIFO_EMPTY_MASK              (1<<ETH_TX_FIFO_EMPTY_BIT)
+
+/***** BITs of Ethernet Port Status 1 reg (PS1R) *****/
+#define ETH_AUTO_NEG_DONE_BIT               4
+#define ETH_AUTO_NEG_DONE_MASK              (1<<ETH_AUTO_NEG_DONE_BIT)
+
+#define ETH_SERDES_PLL_LOCKED_BIT           6
+#define ETH_SERDES_PLL_LOCKED_MASK          (1<<ETH_SERDES_PLL_LOCKED_BIT)
+
+/***** BITs of Port Configuration reg (PxCR) *****/
+#define ETH_UNICAST_PROMISCUOUS_MODE_BIT    0
+#define ETH_UNICAST_PROMISCUOUS_MODE_MASK   (1<<ETH_UNICAST_PROMISCUOUS_MODE_BIT)
+
+#define ETH_DEF_RX_QUEUE_OFFSET             1
+#define ETH_DEF_RX_QUEUE_ALL_MASK           (0x7<<ETH_DEF_RX_QUEUE_OFFSET)
+#define ETH_DEF_RX_QUEUE_MASK(queue)        ((queue)<<ETH_DEF_RX_QUEUE_OFFSET)
+
+#define ETH_DEF_RX_ARP_QUEUE_OFFSET         4
+#define ETH_DEF_RX_ARP_QUEUE_ALL_MASK       (0x7<<ETH_DEF_RX_ARP_QUEUE_OFFSET)
+#define ETH_DEF_RX_ARP_QUEUE_MASK(queue)    ((queue)<<ETH_DEF_RX_ARP_QUEUE_OFFSET)
+
+#define ETH_REJECT_NOT_IP_ARP_BCAST_BIT     7
+#define ETH_REJECT_NOT_IP_ARP_BCAST_MASK    (1<<ETH_REJECT_NOT_IP_ARP_BCAST_BIT)
+
+#define ETH_REJECT_IP_BCAST_BIT             8
+#define ETH_REJECT_IP_BCAST_MASK            (1<<ETH_REJECT_IP_BCAST_BIT)
+
+#define ETH_REJECT_ARP_BCAST_BIT            9
+#define ETH_REJECT_ARP_BCAST_MASK           (1<<ETH_REJECT_ARP_BCAST_BIT)
+
+#define ETH_TX_NO_SET_ERROR_SUMMARY_BIT     12
+#define ETH_TX_NO_SET_ERROR_SUMMARY_MASK    (1<<ETH_TX_NO_SET_ERROR_SUMMARY_BIT)
+
+#define ETH_CAPTURE_TCP_FRAMES_ENABLE_BIT   14
+#define ETH_CAPTURE_TCP_FRAMES_ENABLE_MASK  (1<<ETH_CAPTURE_TCP_FRAMES_ENABLE_BIT)
+
+#define ETH_CAPTURE_UDP_FRAMES_ENABLE_BIT   15
+#define ETH_CAPTURE_UDP_FRAMES_ENABLE_MASK  (1<<ETH_CAPTURE_UDP_FRAMES_ENABLE_BIT)
+
+#define ETH_DEF_RX_TCP_QUEUE_OFFSET         16
+#define ETH_DEF_RX_TCP_QUEUE_ALL_MASK       (0x7<<ETH_DEF_RX_TCP_QUEUE_OFFSET)
+#define ETH_DEF_RX_TCP_QUEUE_MASK(queue)    ((queue)<<ETH_DEF_RX_TCP_QUEUE_OFFSET)
+
+#define ETH_DEF_RX_UDP_QUEUE_OFFSET         19
+#define ETH_DEF_RX_UDP_QUEUE_ALL_MASK       (0x7<<ETH_DEF_RX_UDP_QUEUE_OFFSET)
+#define ETH_DEF_RX_UDP_QUEUE_MASK(queue)    ((queue)<<ETH_DEF_RX_UDP_QUEUE_OFFSET)
+
+#define ETH_DEF_RX_BPDU_QUEUE_OFFSET        22
+#define ETH_DEF_RX_BPDU_QUEUE_ALL_MASK      (0x7<<ETH_DEF_RX_BPDU_QUEUE_OFFSET)
+#define ETH_DEF_RX_BPDU_QUEUE_MASK(queue)   ((queue)<<ETH_DEF_RX_BPDU_QUEUE_OFFSET)
+
+#define ETH_RX_CHECKSUM_MODE_OFFSET         25
+#define ETH_RX_CHECKSUM_NO_PSEUDO_HDR       (0<<ETH_RX_CHECKSUM_MODE_OFFSET)
+#define ETH_RX_CHECKSUM_WITH_PSEUDO_HDR     (1<<ETH_RX_CHECKSUM_MODE_OFFSET)
+
+/***** BITs of Port Configuration Extend reg (PxCXR) *****/
+#define ETH_CAPTURE_SPAN_BPDU_ENABLE_BIT    1
+#define ETH_CAPTURE_SPAN_BPDU_ENABLE_MASK   (1<<ETH_CAPTURE_SPAN_BPDU_ENABLE_BIT)
+
+#define ETH_TX_DISABLE_GEN_CRC_BIT          3
+#define ETH_TX_DISABLE_GEN_CRC_MASK         (1<<ETH_TX_DISABLE_GEN_CRC_BIT)
+
+/***** BITs of Tx/Rx queue command reg (RQCR/TQCR) *****/
+#define ETH_QUEUE_ENABLE_OFFSET             0
+#define ETH_QUEUE_ENABLE_ALL_MASK           (0xFF<<ETH_QUEUE_ENABLE_OFFSET)
+#define ETH_QUEUE_ENABLE_MASK(queue)        (1<<((queue)+ETH_QUEUE_ENABLE_OFFSET))
+
+#define ETH_QUEUE_DISABLE_OFFSET            8 
+#define ETH_QUEUE_DISABLE_ALL_MASK          (0xFF<<ETH_QUEUE_DISABLE_OFFSET)
+#define ETH_QUEUE_DISABLE_MASK(queue)       (1<<((queue)+ETH_QUEUE_DISABLE_OFFSET))
+
+
+/***** BITs of Port Sdma Configuration reg (SDCR) *****/
+#define ETH_RX_FRAME_INTERRUPT_BIT          0
+#define ETH_RX_FRAME_INTERRUPT_MASK         (1<<ETH_RX_FRAME_INTERRUPT_BIT)
+
+#define ETH_BURST_SIZE_1_64BIT_VALUE        0   
+#define ETH_BURST_SIZE_2_64BIT_VALUE        1
+#define ETH_BURST_SIZE_4_64BIT_VALUE        2
+#define ETH_BURST_SIZE_8_64BIT_VALUE        3
+#define ETH_BURST_SIZE_16_64BIT_VALUE       4
+
+#define ETH_RX_BURST_SIZE_OFFSET            1
+#define ETH_RX_BURST_SIZE_ALL_MASK          (0x7<<ETH_RX_BURST_SIZE_OFFSET)
+#define ETH_RX_BURST_SIZE_MASK(burst)       ((burst)<<ETH_RX_BURST_SIZE_OFFSET)
+
+#define ETH_RX_NO_DATA_SWAP_BIT             4
+#define ETH_RX_NO_DATA_SWAP_MASK            (1<<ETH_RX_NO_DATA_SWAP_BIT)
+#define ETH_RX_DATA_SWAP_MASK               (0<<ETH_RX_NO_DATA_SWAP_BIT)
+
+#define ETH_TX_NO_DATA_SWAP_BIT             5
+#define ETH_TX_NO_DATA_SWAP_MASK            (1<<ETH_TX_NO_DATA_SWAP_BIT)
+#define ETH_TX_DATA_SWAP_MASK               (0<<ETH_TX_NO_DATA_SWAP_BIT)
+
+#define ETH_DESC_SWAP_BIT                   6
+#define ETH_DESC_SWAP_MASK                  (1<<ETH_DESC_SWAP_BIT)
+#define ETH_NO_DESC_SWAP_MASK               (0<<ETH_DESC_SWAP_BIT)
+
+#define ETH_RX_INTR_COAL_OFFSET             7
+#define ETH_RX_INTR_COAL_ALL_MASK           (0x3fff<<ETH_RX_INTR_COAL_OFFSET)
+#define ETH_RX_INTR_COAL_MASK(value)        (((value)<<ETH_RX_INTR_COAL_OFFSET)  \
+                                             & ETH_RX_INTR_COAL_ALL_MASK)
+
+#define ETH_TX_BURST_SIZE_OFFSET            22
+#define ETH_TX_BURST_SIZE_ALL_MASK          (0x7<<ETH_TX_BURST_SIZE_OFFSET)
+#define ETH_TX_BURST_SIZE_MASK(burst)       ((burst)<<ETH_TX_BURST_SIZE_OFFSET)
+
+#define ETH_RX_INTR_COAL_MSB_BIT            25
+#define ETH_RX_INTR_COAL_MSB_MASK           (1<<ETH_RX_INTR_COAL_MSB_BIT)  
+
+/* BITs Port #x Tx FIFO Urgent Threshold (PxTFUT) */
+#define ETH_TX_INTR_COAL_OFFSET             4
+#define ETH_TX_INTR_COAL_ALL_MASK           (0x3fff << ETH_TX_INTR_COAL_OFFSET)
+#define ETH_TX_INTR_COAL_MASK(value)        (((value) << ETH_TX_INTR_COAL_OFFSET)  \
+                                             & ETH_TX_INTR_COAL_ALL_MASK)
+
+/* BITs of Port Serial Control reg (PSCR) */
+#define ETH_PORT_ENABLE_BIT                 0
+#define ETH_PORT_ENABLE_MASK                (1<<ETH_PORT_ENABLE_BIT)
+
+#define ETH_FORCE_LINK_PASS_BIT             1
+#define ETH_FORCE_LINK_PASS_MASK            (1<<ETH_FORCE_LINK_PASS_BIT)
+
+#define ETH_DISABLE_DUPLEX_AUTO_NEG_BIT     2
+#define ETH_DISABLE_DUPLEX_AUTO_NEG_MASK    (1<<ETH_DISABLE_DUPLEX_AUTO_NEG_BIT)
+
+#define ETH_DISABLE_FC_AUTO_NEG_BIT         3
+#define ETH_DISABLE_FC_AUTO_NEG_MASK        (1<<ETH_DISABLE_FC_AUTO_NEG_BIT)
+
+#define ETH_ADVERTISE_SYM_FC_BIT            4
+#define ETH_ADVERTISE_SYM_FC_MASK           (1<<ETH_ADVERTISE_SYM_FC_BIT)
+
+#define ETH_TX_FC_MODE_OFFSET               5
+#define ETH_TX_FC_MODE_MASK                 (3<<ETH_TX_FC_MODE_OFFSET)
+#define ETH_TX_FC_NO_PAUSE                  (0<<ETH_TX_FC_MODE_OFFSET)
+#define ETH_TX_FC_SEND_PAUSE                (1<<ETH_TX_FC_MODE_OFFSET)
+
+#define ETH_TX_BP_MODE_OFFSET               7
+#define ETH_TX_BP_MODE_MASK                 (3<<ETH_TX_BP_MODE_OFFSET)
+#define ETH_TX_BP_NO_JAM                    (0<<ETH_TX_BP_MODE_OFFSET)
+#define ETH_TX_BP_SEND_JAM                  (1<<ETH_TX_BP_MODE_OFFSET)
+
+#define ETH_DO_NOT_FORCE_LINK_FAIL_BIT      10
+#define ETH_DO_NOT_FORCE_LINK_FAIL_MASK     (1<<ETH_DO_NOT_FORCE_LINK_FAIL_BIT)
+
+#define ETH_RETRANSMIT_FOREVER_BIT          11
+#define ETH_RETRANSMIT_FOREVER_MASK         (1<<ETH_RETRANSMIT_FOREVER_BIT)
+
+#define ETH_DISABLE_SPEED_AUTO_NEG_BIT      13
+#define ETH_DISABLE_SPEED_AUTO_NEG_MASK     (1<<ETH_DISABLE_SPEED_AUTO_NEG_BIT)
+
+#define ETH_DTE_ADVERT_BIT                  14    
+#define ETH_DTE_ADVERT_MASK                 (1<<ETH_DTE_ADVERT_BIT)    
+
+#define ETH_MII_PHY_MODE_BIT                15  
+#define ETH_MII_PHY_MODE_MAC                (0<<ETH_MII_PHY_MODE_BIT)
+#define ETH_MII_PHY_MODE_PHY                (1<<ETH_MII_PHY_MODE_BIT)
+
+#define ETH_MII_SOURCE_SYNCH_BIT            16
+#define ETH_MII_STANDARD_SYNCH              (0<<ETH_MII_SOURCE_SYNCH_BIT)
+#define ETH_MII_400Mbps_SYNCH               (1<<ETH_MII_SOURCE_CLK_BIT)
+
+#define ETH_MAX_RX_PACKET_SIZE_OFFSET       17
+#define ETH_MAX_RX_PACKET_SIZE_MASK         (7<<ETH_MAX_RX_PACKET_SIZE_OFFSET)
+#define ETH_MAX_RX_PACKET_1518BYTE          (0<<ETH_MAX_RX_PACKET_SIZE_OFFSET)
+#define ETH_MAX_RX_PACKET_1522BYTE          (1<<ETH_MAX_RX_PACKET_SIZE_OFFSET)
+#define ETH_MAX_RX_PACKET_1552BYTE          (2<<ETH_MAX_RX_PACKET_SIZE_OFFSET)
+#define ETH_MAX_RX_PACKET_9022BYTE          (3<<ETH_MAX_RX_PACKET_SIZE_OFFSET)
+#define ETH_MAX_RX_PACKET_9192BYTE          (4<<ETH_MAX_RX_PACKET_SIZE_OFFSET)
+#define ETH_MAX_RX_PACKET_9700BYTE          (5<<ETH_MAX_RX_PACKET_SIZE_OFFSET)
+
+#define ETH_SET_FULL_DUPLEX_BIT             21
+#define ETH_SET_FULL_DUPLEX_MASK            (1<<ETH_SET_FULL_DUPLEX_BIT)
+
+#define ETH_SET_FLOW_CTRL_BIT               22
+#define ETH_SET_FLOW_CTRL_MASK              (1<<ETH_SET_FLOW_CTRL_BIT)
+
+#define ETH_SET_GMII_SPEED_1000_BIT         23
+#define ETH_SET_GMII_SPEED_1000_MASK        (1<<ETH_SET_GMII_SPEED_1000_BIT)
+
+#define ETH_SET_MII_SPEED_100_BIT           24
+#define ETH_SET_MII_SPEED_100_MASK          (1<<ETH_SET_MII_SPEED_100_BIT)
+
+/* BITs of Port Serial Control 1 reg (PSC1R) */
+#define ETH_PSC_ENABLE_BIT                  2
+#define ETH_PSC_ENABLE_MASK                 (1<<ETH_PSC_ENABLE_BIT)
+
+#define ETH_RGMII_ENABLE_BIT                3
+#define ETH_RGMII_ENABLE_MASK               (1<<ETH_RGMII_ENABLE_BIT)
+
+#define ETH_PORT_RESET_BIT                  4
+#define ETH_PORT_RESET_MASK                 (1<<ETH_PORT_RESET_BIT)
+
+#define ETH_INBAND_AUTO_NEG_ENABLE_BIT      6
+#define ETH_INBAND_AUTO_NEG_ENABLE_MASK     (1<<ETH_INBAND_AUTO_NEG_ENABLE_BIT)
+
+#define ETH_INBAND_AUTO_NEG_BYPASS_BIT      7
+#define ETH_INBAND_AUTO_NEG_BYPASS_MASK     (1<<ETH_INBAND_AUTO_NEG_BYPASS_BIT)
+
+#define ETH_INBAND_AUTO_NEG_START_BIT       8
+#define ETH_INBAND_AUTO_NEG_START_MASK      (1<<ETH_INBAND_AUTO_NEG_START_BIT)
+
+#define ETH_PORT_TYPE_BIT                   11
+#define ETH_PORT_TYPE_1000BasedX_MASK       (1<<ETH_PORT_TYPE_BIT)
+
+#define ETH_SGMII_MODE_BIT                  12
+#define ETH_1000BaseX_MODE_MASK             (0<<ETH_SGMII_MODE_BIT)
+#define ETH_SGMII_MODE_MASK                 (1<<ETH_SGMII_MODE_BIT)
+            
+#define ETH_MGMII_MODE_BIT                  13
+
+#define ETH_EN_MII_ODD_PRE_BIT		    22
+#define ETH_EN_MII_ODD_PRE_MASK		    (1<<ETH_EN_MII_ODD_PRE_BIT)
+
+/* BITs of SDMA Descriptor Command/Status field */
+#if defined(MV_CPU_BE)
+typedef struct _ethRxDesc
+{
+    MV_U16      byteCnt    ;    /* Descriptor buffer byte count     */
+    MV_U16      bufSize    ;    /* Buffer size                      */
+    MV_U32      cmdSts     ;    /* Descriptor command status        */
+    MV_U32      nextDescPtr;    /* Next descriptor pointer          */
+    MV_U32      bufPtr     ;    /* Descriptor buffer pointer        */
+    MV_ULONG    returnInfo ;    /* User resource return information */
+} ETH_RX_DESC;
+
+typedef struct _ethTxDesc
+{
+    MV_U16      byteCnt    ;    /* Descriptor buffer byte count     */
+    MV_U16      L4iChk     ;    /* CPU provided TCP Checksum        */
+    MV_U32      cmdSts     ;    /* Descriptor command status        */
+    MV_U32      nextDescPtr;    /* Next descriptor pointer          */
+    MV_U32      bufPtr     ;    /* Descriptor buffer pointer        */
+    MV_ULONG    returnInfo ;    /* User resource return information */
+    MV_U8*      alignBufPtr;    /* Pointer to 8 byte aligned buffer */
+} ETH_TX_DESC;
+
+#elif defined(MV_CPU_LE)
+
+typedef struct _ethRxDesc
+{
+    MV_U32      cmdSts     ;    /* Descriptor command status        */
+    MV_U16      bufSize    ;    /* Buffer size                      */
+    MV_U16      byteCnt    ;    /* Descriptor buffer byte count     */
+    MV_U32      bufPtr     ;    /* Descriptor buffer pointer        */
+    MV_U32      nextDescPtr;    /* Next descriptor pointer          */
+    MV_ULONG    returnInfo ;    /* User resource return information */
+} ETH_RX_DESC;
+
+typedef struct _ethTxDesc
+{
+    MV_U32      cmdSts     ;    /* Descriptor command status        */
+    MV_U16      L4iChk     ;    /* CPU provided TCP Checksum        */
+    MV_U16      byteCnt    ;    /* Descriptor buffer byte count     */
+    MV_U32      bufPtr     ;    /* Descriptor buffer pointer        */
+    MV_U32      nextDescPtr;    /* Next descriptor pointer          */
+    MV_ULONG    returnInfo ;    /* User resource return information */
+    MV_U8*      alignBufPtr;    /* Pointer to 32 byte aligned buffer */
+} ETH_TX_DESC;
+
+#else
+#error "MV_CPU_BE or MV_CPU_LE must be defined"
+#endif /* MV_CPU_BE || MV_CPU_LE */
+
+/* Buffer offset from buffer pointer */
+#define ETH_RX_BUF_OFFSET               0x2
+
+
+/* Tx & Rx descriptor bits */
+#define ETH_ERROR_SUMMARY_BIT               0
+#define ETH_ERROR_SUMMARY_MASK              (1<<ETH_ERROR_SUMMARY_BIT)
+
+#define ETH_BUFFER_OWNER_BIT                31             
+#define ETH_BUFFER_OWNED_BY_DMA             (1<<ETH_BUFFER_OWNER_BIT)
+#define ETH_BUFFER_OWNED_BY_HOST            (0<<ETH_BUFFER_OWNER_BIT)
+
+/* Tx descriptor bits */
+#define ETH_TX_ERROR_CODE_OFFSET            1
+#define ETH_TX_ERROR_CODE_MASK              (3<<ETH_TX_ERROR_CODE_OFFSET)
+#define ETH_TX_LATE_COLLISION_ERROR         (0<<ETH_TX_ERROR_CODE_OFFSET)
+#define ETH_TX_UNDERRUN_ERROR               (1<<ETH_TX_ERROR_CODE_OFFSET)
+#define ETH_TX_EXCESSIVE_COLLISION_ERROR    (2<<ETH_TX_ERROR_CODE_OFFSET)
+
+#define ETH_TX_LLC_SNAP_FORMAT_BIT          9
+#define ETH_TX_LLC_SNAP_FORMAT_MASK         (1<<ETH_TX_LLC_SNAP_FORMAT_BIT)
+
+#define ETH_TX_IP_FRAG_BIT                  10
+#define ETH_TX_IP_FRAG_MASK                 (1<<ETH_TX_IP_FRAG_BIT)
+#define ETH_TX_IP_FRAG                      (0<<ETH_TX_IP_FRAG_BIT)
+#define ETH_TX_IP_NO_FRAG                   (1<<ETH_TX_IP_FRAG_BIT)
+
+#define ETH_TX_IP_HEADER_LEN_OFFSET         11
+#define ETH_TX_IP_HEADER_LEN_ALL_MASK       (0xF<<ETH_TX_IP_HEADER_LEN_OFFSET)
+#define ETH_TX_IP_HEADER_LEN_MASK(len)      ((len)<<ETH_TX_IP_HEADER_LEN_OFFSET)
+
+#define ETH_TX_VLAN_TAGGED_FRAME_BIT        15
+#define ETH_TX_VLAN_TAGGED_FRAME_MASK       (1<<ETH_TX_VLAN_TAGGED_FRAME_BIT)
+
+#define ETH_TX_L4_TYPE_BIT                  16
+#define ETH_TX_L4_TCP_TYPE                  (0<<ETH_TX_L4_TYPE_BIT)
+#define ETH_TX_L4_UDP_TYPE                  (1<<ETH_TX_L4_TYPE_BIT)
+
+#define ETH_TX_GENERATE_L4_CHKSUM_BIT       17
+#define ETH_TX_GENERATE_L4_CHKSUM_MASK      (1<<ETH_TX_GENERATE_L4_CHKSUM_BIT)
+
+#define ETH_TX_GENERATE_IP_CHKSUM_BIT       18
+#define ETH_TX_GENERATE_IP_CHKSUM_MASK      (1<<ETH_TX_GENERATE_IP_CHKSUM_BIT)
+
+#define ETH_TX_ZERO_PADDING_BIT             19
+#define ETH_TX_ZERO_PADDING_MASK            (1<<ETH_TX_ZERO_PADDING_BIT)
+
+#define ETH_TX_LAST_DESC_BIT                20
+#define ETH_TX_LAST_DESC_MASK               (1<<ETH_TX_LAST_DESC_BIT)
+
+#define ETH_TX_FIRST_DESC_BIT               21
+#define ETH_TX_FIRST_DESC_MASK              (1<<ETH_TX_FIRST_DESC_BIT)
+
+#define ETH_TX_GENERATE_CRC_BIT             22
+#define ETH_TX_GENERATE_CRC_MASK            (1<<ETH_TX_GENERATE_CRC_BIT)
+
+#define ETH_TX_ENABLE_INTERRUPT_BIT         23
+#define ETH_TX_ENABLE_INTERRUPT_MASK        (1<<ETH_TX_ENABLE_INTERRUPT_BIT)
+
+#define ETH_TX_AUTO_MODE_BIT                30
+#define ETH_TX_AUTO_MODE_MASK               (1<<ETH_TX_AUTO_MODE_BIT)
+
+
+/* Rx descriptor bits */
+#define ETH_RX_ERROR_CODE_OFFSET            1
+#define ETH_RX_ERROR_CODE_MASK              (3<<ETH_RX_ERROR_CODE_OFFSET)
+#define ETH_RX_CRC_ERROR                    (0<<ETH_RX_ERROR_CODE_OFFSET)
+#define ETH_RX_OVERRUN_ERROR                (1<<ETH_RX_ERROR_CODE_OFFSET)
+#define ETH_RX_MAX_FRAME_LEN_ERROR          (2<<ETH_RX_ERROR_CODE_OFFSET)
+#define ETH_RX_RESOURCE_ERROR               (3<<ETH_RX_ERROR_CODE_OFFSET)
+
+#define ETH_RX_L4_CHECKSUM_OFFSET           3
+#define ETH_RX_L4_CHECKSUM_MASK             (0xffff<<ETH_RX_L4_CHECKSUM_OFFSET)
+
+#define ETH_RX_VLAN_TAGGED_FRAME_BIT        19
+#define ETH_RX_VLAN_TAGGED_FRAME_MASK       (1<<ETH_RX_VLAN_TAGGED_FRAME_BIT)
+
+#define ETH_RX_BPDU_FRAME_BIT               20
+#define ETH_RX_BPDU_FRAME_MASK              (1<<ETH_RX_BPDU_FRAME_BIT)
+
+#define ETH_RX_L4_TYPE_OFFSET               21
+#define ETH_RX_L4_TYPE_MASK                 (3<<ETH_RX_L4_TYPE_OFFSET)
+#define ETH_RX_L4_TCP_TYPE                  (0<<ETH_RX_L4_TYPE_OFFSET)
+#define ETH_RX_L4_UDP_TYPE                  (1<<ETH_RX_L4_TYPE_OFFSET)
+#define ETH_RX_L4_OTHER_TYPE                (2<<ETH_RX_L4_TYPE_OFFSET)
+
+#define ETH_RX_NOT_LLC_SNAP_FORMAT_BIT      23
+#define ETH_RX_NOT_LLC_SNAP_FORMAT_MASK     (1<<ETH_RX_NOT_LLC_SNAP_FORMAT_BIT)
+
+#define ETH_RX_IP_FRAME_TYPE_BIT            24
+#define ETH_RX_IP_FRAME_TYPE_MASK           (1<<ETH_RX_IP_FRAME_TYPE_BIT)
+
+#define ETH_RX_IP_HEADER_OK_BIT             25
+#define ETH_RX_IP_HEADER_OK_MASK            (1<<ETH_RX_IP_HEADER_OK_BIT)
+
+#define ETH_RX_LAST_DESC_BIT                26
+#define ETH_RX_LAST_DESC_MASK               (1<<ETH_RX_LAST_DESC_BIT)
+
+#define ETH_RX_FIRST_DESC_BIT               27
+#define ETH_RX_FIRST_DESC_MASK              (1<<ETH_RX_FIRST_DESC_BIT)
+
+#define ETH_RX_UNKNOWN_DA_BIT               28
+#define ETH_RX_UNKNOWN_DA_MASK              (1<<ETH_RX_UNKNOWN_DA_BIT)
+
+#define ETH_RX_ENABLE_INTERRUPT_BIT         29
+#define ETH_RX_ENABLE_INTERRUPT_MASK        (1<<ETH_RX_ENABLE_INTERRUPT_BIT)
+
+#define ETH_RX_L4_CHECKSUM_OK_BIT           30
+#define ETH_RX_L4_CHECKSUM_OK_MASK          (1<<ETH_RX_L4_CHECKSUM_OK_BIT)
+
+/* Rx descriptor bufSize field */
+#define ETH_RX_IP_FRAGMENTED_FRAME_BIT      2
+#define ETH_RX_IP_FRAGMENTED_FRAME_MASK     (1<<ETH_RX_IP_FRAGMENTED_FRAME_BIT)
+
+#define ETH_RX_BUFFER_MASK                  0xFFF8
+
+
+/* Ethernet Cause Register BITs */
+#define ETH_CAUSE_RX_READY_SUM_BIT          0
+#define ETH_CAUSE_EXTEND_BIT                1
+
+#define ETH_CAUSE_RX_READY_OFFSET           2
+#define ETH_CAUSE_RX_READY_BIT(queue)       (ETH_CAUSE_RX_READY_OFFSET + (queue))
+#define ETH_CAUSE_RX_READY_MASK(queue)      (1 << (ETH_CAUSE_RX_READY_BIT(queue))) 
+
+#define ETH_CAUSE_RX_ERROR_SUM_BIT          10
+#define ETH_CAUSE_RX_ERROR_OFFSET           11
+#define ETH_CAUSE_RX_ERROR_BIT(queue)       (ETH_CAUSE_RX_ERROR_OFFSET + (queue))
+#define ETH_CAUSE_RX_ERROR_MASK(queue)      (1 << (ETH_CAUSE_RX_ERROR_BIT(queue))) 
+
+#define ETH_CAUSE_TX_END_BIT                19
+#define ETH_CAUSE_SUM_BIT                   31
+
+/* Ethernet Cause Extended Register BITs */
+#define ETH_CAUSE_TX_BUF_OFFSET             0
+#define ETH_CAUSE_TX_BUF_BIT(queue)         (ETH_CAUSE_TX_BUF_OFFSET + (queue))
+#define ETH_CAUSE_TX_BUF_MASK(queue)        (1 << (ETH_CAUSE_TX_BUF_BIT(queue)))
+         
+#define ETH_CAUSE_TX_ERROR_OFFSET           8
+#define ETH_CAUSE_TX_ERROR_BIT(queue)       (ETH_CAUSE_TX_ERROR_OFFSET + (queue))
+#define ETH_CAUSE_TX_ERROR_MASK(queue)      (1 << (ETH_CAUSE_TX_ERROR_BIT(queue)))
+
+#define ETH_CAUSE_PHY_STATUS_CHANGE_BIT     16
+#define ETH_CAUSE_RX_OVERRUN_BIT            18          
+#define ETH_CAUSE_TX_UNDERRUN_BIT           19
+#define ETH_CAUSE_LINK_STATE_CHANGE_BIT     20
+#define ETH_CAUSE_INTERNAL_ADDR_ERR_BIT     23
+#define ETH_CAUSE_EXTEND_SUM_BIT            31
+
+/* Marvell Header Register */
+/* Marvell Header register bits */
+#define ETH_MVHDR_EN_BIT                    0
+#define ETH_MVHDR_EN_MASK                   (1 << ETH_MVHDR_EN_BIT)
+
+#define ETH_MVHDR_DAPREFIX_BIT              1
+#define ETH_MVHDR_DAPREFIX_MASK             (0x3 << ETH_MVHDR_DAPREFIX_BIT)
+#define ETH_MVHDR_DAPREFIX_PRI_1_2          (0x1 << ETH_MVHDR_DAPREFIX_BIT)
+#define ETH_MVHDR_DAPREFIX_DBNUM_PRI        (0x2 << ETH_MVHDR_DAPREFIX_BIT)
+#define ETH_MVHDR_DAPREFIX_SPID_PRI         (0x3 << ETH_MVHDR_DAPREFIX_BIT)
+
+#define ETH_MVHDR_MHMASK_BIT                8
+#define ETH_MVHDR_MHMASK_MASK               (0x3 << ETH_MVHDR_MHMASK_BIT)
+#define ETH_MVHDR_MHMASK_8_QUEUE            (0x0 << ETH_MVHDR_MHMASK_BIT)
+#define ETH_MVHDR_MHMASK_4_QUEUE            (0x1 << ETH_MVHDR_MHMASK_BIT)
+#define ETH_MVHDR_MHMASK_2_QUEUE            (0x3 << ETH_MVHDR_MHMASK_BIT)
+
+
+/* Relevant for 6183 ONLY */
+#define ETH_UNIT_PORTS_PADS_CALIB_0_REG     (MV_ETH_REGS_BASE(0) + 0x0A0)
+#define ETH_UNIT_PORTS_PADS_CALIB_1_REG     (MV_ETH_REGS_BASE(0) + 0x0A4)
+#define ETH_UNIT_PORTS_PADS_CALIB_2_REG     (MV_ETH_REGS_BASE(0) + 0x0A8)
+/* Ethernet Unit Ports Pads Calibration_REG (ETH_UNIT_PORTS_PADS_CALIB_x_REG)  */
+#define ETH_ETHERNET_PAD_CLIB_DRVN_OFFS		0
+#define ETH_ETHERNET_PAD_CLIB_DRVN_MASK		(0x1F << ETH_ETHERNET_PAD_CLIB_DRVN_OFFS)
+
+#define ETH_ETHERNET_PAD_CLIB_DRVP_OFFS         5                      
+#define ETH_ETHERNET_PAD_CLIB_DRVP_MASK         (0x1F << ETH_ETHERNET_PAD_CLIB_DRVP_OFFS)
+ 
+#define ETH_ETHERNET_PAD_CLIB_TUNEEN_OFFS       16                      
+#define ETH_ETHERNET_PAD_CLIB_TUNEEN_MASK       (0x1 << ETH_ETHERNET_PAD_CLIB_TUNEEN_OFFS) 
+
+#define ETH_ETHERNET_PAD_CLIB_LOCKN_OFFS        17                   
+#define ETH_ETHERNET_PAD_CLIB_LOCKN_MASK        (0x1F << ETH_ETHERNET_PAD_CLIB_LOCKN_OFFS) 
+
+#define ETH_ETHERNET_PAD_CLIB_OFFST_OFFS        24                   
+#define ETH_ETHERNET_PAD_CLIB_OFFST_MASK        (0x1F << ETH_ETHERNET_PAD_CLIB_OFFST_OFFS) 
+
+#define ETH_ETHERNET_PAD_CLIB_WR_EN_OFFS        31                   
+#define ETH_ETHERNET_PAD_CLIB_WR_EN_MASK        (0x1  << ETH_ETHERNET_PAD_CLIB_WR_EN_OFFS) 
+
+
+/**** Address decode register ****/
+
+#define ETH_WIN_BASE_REG(port, win)         (MV_ETH_REGS_BASE(port) + 0x200 + ((win)<<3))
+#define ETH_WIN_SIZE_REG(port, win)         (MV_ETH_REGS_BASE(port) + 0x204 + ((win)<<3))
+#define ETH_WIN_REMAP_REG(port, win)        (MV_ETH_REGS_BASE(port) + 0x280 + ((win)<<2))
+#define ETH_BASE_ADDR_ENABLE_REG(port)      (MV_ETH_REGS_BASE(port) + 0x290)
+#define ETH_ACCESS_PROTECT_REG(port)        (MV_ETH_REGS_BASE(port) + 0x294)
+
+/* Ethernet Base Address Register bits		    */
+#define ETH_MAX_DECODE_WIN              6
+#define ETH_MAX_HIGH_ADDR_REMAP_WIN     4
+
+/* Ethernet Port Access Protect (EPAP) register	    */
+/* The target associated with this window	    */
+#define ETH_WIN_TARGET_OFFS             0 
+#define ETH_WIN_TARGET_MASK             (0xf << ETH_WIN_TARGET_OFFS)
+/* The target attributes Associated with window	    */
+#define ETH_WIN_ATTR_OFFS               8 
+#define ETH_WIN_ATTR_MASK               (0xff << ETH_WIN_ATTR_OFFS)
+
+#define ETH_WIN_SIZE_OFFS		16
+#define ETH_WIN_SIZE_MASK		(0xFFFF<<ETH_WIN_SIZE_OFFS)
+#define ETH_WIN_BASE_OFFS		16
+#define ETH_WIN_BASE_MASK		(0xFFFF<<ETH_WIN_BASE_OFFS)
+
+/* Ethernet Port Access Protect Register (EPAPR)    */
+#define ETH_PROT_NO_ACCESS              NO_ACCESS_ALLOWED
+#define ETH_PROT_READ_ONLY              READ_ONLY
+#define ETH_PROT_FULL_ACCESS            FULL_ACCESS
+#define ETH_PROT_WIN_OFFS(winNum)       (2 * (winNum))
+#define ETH_PROT_WIN_MASK(winNum)       (0x3 << ETH_PROT_WIN_OFFS(winNum))
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* __INCmvEthRegsh */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/eth/gbe/mvEthDebug.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/eth/gbe/mvEthDebug.c
@@ -0,0 +1,747 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+        this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+/*******************************************************************************
+* mvEthDebug.c - Source file for user friendly debug functions
+*
+* DESCRIPTION:
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvSysEthConfig.h"
+#include "mvEthRegs.h"
+#include "eth/mvEth.h"
+#include "mvEthDebug.h"
+#include "mvEthGbe.h"
+
+/* #define mvOsPrintf printf */
+
+void    mvEthPortShow(void* pHndl);
+void    mvEthQueuesShow(void* pHndl, int rxQueue, int txQueue, int mode);
+
+/******************************************************************************/
+/*                          Debug functions                                   */
+/******************************************************************************/
+void    ethRxCoal(int port, int usec)
+{
+    void*   pHndl;
+
+    pHndl = mvEthPortHndlGet(port);
+    if(pHndl != NULL)
+    {
+        mvEthRxCoalSet(pHndl, usec);
+    }
+}
+
+void    ethTxCoal(int port, int usec)
+{
+    void*   pHndl;
+
+    pHndl = mvEthPortHndlGet(port);
+    if(pHndl != NULL)
+    {
+        mvEthTxCoalSet(pHndl, usec);
+    }
+}
+
+#if (MV_ETH_VERSION >= 4)
+void     ethEjpModeSet(int port, int mode)
+{
+    void*   pHndl;
+
+    pHndl = mvEthPortHndlGet(port);
+    if(pHndl != NULL)
+    {
+        mvEthEjpModeSet(pHndl, mode);
+    }
+}
+#endif /* (MV_ETH_VERSION >= 4) */
+
+void    ethBpduRxQ(int port, int bpduQueue)
+{
+    void*   pHndl;
+
+    pHndl = mvEthPortHndlGet(port);
+    if(pHndl != NULL)
+    {
+        mvEthBpduRxQueue(pHndl, bpduQueue);
+    }
+}
+
+void    ethArpRxQ(int port, int arpQueue)
+{
+    void*   pHndl;
+
+    pHndl = mvEthPortHndlGet(port);
+    if(pHndl != NULL)
+    {
+        mvEthArpRxQueue(pHndl, arpQueue);
+    }
+}
+
+void    ethTcpRxQ(int port, int tcpQueue)
+{
+    void*   pHndl;
+
+    pHndl = mvEthPortHndlGet(port);
+    if(pHndl != NULL)
+    {
+        mvEthTcpRxQueue(pHndl, tcpQueue);
+    }
+}
+
+void    ethUdpRxQ(int port, int udpQueue)
+{
+    void*   pHndl;
+
+    pHndl = mvEthPortHndlGet(port);
+    if(pHndl != NULL)
+    {
+        mvEthUdpRxQueue(pHndl, udpQueue);
+    }
+}
+
+void    ethTxPolicyRegs(int port)
+{
+    int             queue;
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)mvEthPortHndlGet(port);
+
+    if(pPortCtrl == NULL) 
+    {
+        return;
+    }
+    mvOsPrintf("Port #%d TX Policy: EJP=%d, TXQs: ", 
+                port, pPortCtrl->portConfig.ejpMode);
+    for(queue=0; queue<MV_ETH_TX_Q_NUM; queue++)
+    {
+        if(pPortCtrl->txQueueConfig[queue].descrNum > 0)
+            mvOsPrintf("%d, ", queue);
+    }
+    mvOsPrintf("\n");
+
+    mvOsPrintf("\n\t TX policy Port #%d configuration registers\n", port);
+
+    mvOsPrintf("ETH_TX_QUEUE_COMMAND_REG            : 0x%X = 0x%08x\n", 
+                ETH_TX_QUEUE_COMMAND_REG(port), 
+                MV_REG_READ( ETH_TX_QUEUE_COMMAND_REG(port) ) );    
+    
+    mvOsPrintf("ETH_TX_FIXED_PRIO_CFG_REG           : 0x%X = 0x%08x\n", 
+                ETH_TX_FIXED_PRIO_CFG_REG(port), 
+                MV_REG_READ( ETH_TX_FIXED_PRIO_CFG_REG(port) ) );
+
+    mvOsPrintf("ETH_TX_TOKEN_RATE_CFG_REG           : 0x%X = 0x%08x\n", 
+                ETH_TX_TOKEN_RATE_CFG_REG(port), 
+                MV_REG_READ( ETH_TX_TOKEN_RATE_CFG_REG(port) ) );
+
+    mvOsPrintf("ETH_MAX_TRANSMIT_UNIT_REG           : 0x%X = 0x%08x\n", 
+                ETH_MAX_TRANSMIT_UNIT_REG(port), 
+                MV_REG_READ( ETH_MAX_TRANSMIT_UNIT_REG(port) ) );
+
+    mvOsPrintf("ETH_TX_TOKEN_BUCKET_SIZE_REG        : 0x%X = 0x%08x\n", 
+                ETH_TX_TOKEN_BUCKET_SIZE_REG(port), 
+                MV_REG_READ( ETH_TX_TOKEN_BUCKET_SIZE_REG(port) ) );
+
+    mvOsPrintf("ETH_TX_TOKEN_BUCKET_COUNT_REG       : 0x%X = 0x%08x\n", 
+                ETH_TX_TOKEN_BUCKET_COUNT_REG(port), 
+                MV_REG_READ( ETH_TX_TOKEN_BUCKET_COUNT_REG(port) ) );
+
+    for(queue=0; queue<MV_ETH_MAX_TXQ; queue++)
+    {
+        mvOsPrintf("\n\t TX policy Port #%d, Queue #%d configuration registers\n", port, queue);
+
+        mvOsPrintf("ETH_TXQ_TOKEN_COUNT_REG             : 0x%X = 0x%08x\n", 
+                ETH_TXQ_TOKEN_COUNT_REG(port, queue), 
+                MV_REG_READ( ETH_TXQ_TOKEN_COUNT_REG(port, queue) ) );
+
+        mvOsPrintf("ETH_TXQ_TOKEN_CFG_REG               : 0x%X = 0x%08x\n", 
+                ETH_TXQ_TOKEN_CFG_REG(port, queue), 
+                MV_REG_READ( ETH_TXQ_TOKEN_CFG_REG(port, queue) ) );
+
+        mvOsPrintf("ETH_TXQ_ARBITER_CFG_REG             : 0x%X = 0x%08x\n", 
+                ETH_TXQ_ARBITER_CFG_REG(port, queue), 
+                MV_REG_READ( ETH_TXQ_ARBITER_CFG_REG(port, queue) ) );
+    }
+    mvOsPrintf("\n");
+}
+
+/* Print important registers of Ethernet port */
+void    ethPortRegs(int port)
+{
+    mvOsPrintf("\n\t ethGiga #%d port Registers:\n", port);
+
+    mvOsPrintf("ETH_PORT_STATUS_REG                 : 0x%X = 0x%08x\n", 
+                ETH_PORT_STATUS_REG(port), 
+                MV_REG_READ( ETH_PORT_STATUS_REG(port) ) );
+
+    mvOsPrintf("ETH_PORT_SERIAL_CTRL_REG            : 0x%X = 0x%08x\n", 
+                ETH_PORT_SERIAL_CTRL_REG(port), 
+                MV_REG_READ( ETH_PORT_SERIAL_CTRL_REG(port) ) );
+
+    mvOsPrintf("ETH_PORT_CONFIG_REG                 : 0x%X = 0x%08x\n", 
+                ETH_PORT_CONFIG_REG(port), 
+                MV_REG_READ( ETH_PORT_CONFIG_REG(port) ) );    
+
+    mvOsPrintf("ETH_PORT_CONFIG_EXTEND_REG          : 0x%X = 0x%08x\n", 
+                ETH_PORT_CONFIG_EXTEND_REG(port), 
+                MV_REG_READ( ETH_PORT_CONFIG_EXTEND_REG(port) ) );    
+
+    mvOsPrintf("ETH_SDMA_CONFIG_REG                 : 0x%X = 0x%08x\n", 
+                ETH_SDMA_CONFIG_REG(port), 
+                MV_REG_READ( ETH_SDMA_CONFIG_REG(port) ) );    
+
+    mvOsPrintf("ETH_TX_FIFO_URGENT_THRESH_REG       : 0x%X = 0x%08x\n", 
+                ETH_TX_FIFO_URGENT_THRESH_REG(port), 
+                MV_REG_READ( ETH_TX_FIFO_URGENT_THRESH_REG(port) ) );    
+
+    mvOsPrintf("ETH_RX_QUEUE_COMMAND_REG            : 0x%X = 0x%08x\n", 
+                ETH_RX_QUEUE_COMMAND_REG(port), 
+                MV_REG_READ( ETH_RX_QUEUE_COMMAND_REG(port) ) );    
+
+    mvOsPrintf("ETH_TX_QUEUE_COMMAND_REG            : 0x%X = 0x%08x\n", 
+                ETH_TX_QUEUE_COMMAND_REG(port), 
+                MV_REG_READ( ETH_TX_QUEUE_COMMAND_REG(port) ) );    
+
+    mvOsPrintf("ETH_INTR_CAUSE_REG                  : 0x%X = 0x%08x\n", 
+                ETH_INTR_CAUSE_REG(port), 
+                MV_REG_READ( ETH_INTR_CAUSE_REG(port) ) );    
+
+    mvOsPrintf("ETH_INTR_EXTEND_CAUSE_REG           : 0x%X = 0x%08x\n", 
+                ETH_INTR_CAUSE_EXT_REG(port), 
+                MV_REG_READ( ETH_INTR_CAUSE_EXT_REG(port) ) );    
+
+    mvOsPrintf("ETH_INTR_MASK_REG                   : 0x%X = 0x%08x\n", 
+                ETH_INTR_MASK_REG(port), 
+                MV_REG_READ( ETH_INTR_MASK_REG(port) ) );    
+
+    mvOsPrintf("ETH_INTR_EXTEND_MASK_REG            : 0x%X = 0x%08x\n", 
+                ETH_INTR_MASK_EXT_REG(port), 
+                MV_REG_READ( ETH_INTR_MASK_EXT_REG(port) ) );    
+
+    mvOsPrintf("ETH_RX_DESCR_STAT_CMD_REG           : 0x%X = 0x%08x\n", 
+                ETH_RX_DESCR_STAT_CMD_REG(port, 0), 
+                MV_REG_READ( ETH_RX_DESCR_STAT_CMD_REG(port, 0) ) );    
+
+    mvOsPrintf("ETH_RX_BYTE_COUNT_REG               : 0x%X = 0x%08x\n", 
+                ETH_RX_BYTE_COUNT_REG(port, 0), 
+                MV_REG_READ( ETH_RX_BYTE_COUNT_REG(port, 0) ) );    
+
+    mvOsPrintf("ETH_RX_BUF_PTR_REG                  : 0x%X = 0x%08x\n", 
+                ETH_RX_BUF_PTR_REG(port, 0), 
+                MV_REG_READ( ETH_RX_BUF_PTR_REG(port, 0) ) );    
+
+    mvOsPrintf("ETH_RX_CUR_DESC_PTR_REG             : 0x%X = 0x%08x\n", 
+                ETH_RX_CUR_DESC_PTR_REG(port, 0), 
+                MV_REG_READ( ETH_RX_CUR_DESC_PTR_REG(port, 0) ) );    
+}
+
+
+/* Print Giga Ethernet UNIT registers */
+void    ethRegs(int port)
+{
+    mvOsPrintf("ETH_PHY_ADDR_REG               : 0x%X = 0x%08x\n", 
+                ETH_PHY_ADDR_REG(port), 
+                MV_REG_READ(ETH_PHY_ADDR_REG(port)) );    
+
+    mvOsPrintf("ETH_UNIT_INTR_CAUSE_REG        : 0x%X = 0x%08x\n", 
+                ETH_UNIT_INTR_CAUSE_REG(port), 
+                MV_REG_READ( ETH_UNIT_INTR_CAUSE_REG(port)) );    
+
+    mvOsPrintf("ETH_UNIT_INTR_MASK_REG         : 0x%X = 0x%08x\n", 
+                ETH_UNIT_INTR_MASK_REG(port), 
+                MV_REG_READ( ETH_UNIT_INTR_MASK_REG(port)) );    
+
+    mvOsPrintf("ETH_UNIT_ERROR_ADDR_REG        : 0x%X = 0x%08x\n", 
+                ETH_UNIT_ERROR_ADDR_REG(port), 
+                MV_REG_READ(ETH_UNIT_ERROR_ADDR_REG(port)) );    
+
+    mvOsPrintf("ETH_UNIT_INT_ADDR_ERROR_REG    : 0x%X = 0x%08x\n", 
+                ETH_UNIT_INT_ADDR_ERROR_REG(port), 
+                MV_REG_READ(ETH_UNIT_INT_ADDR_ERROR_REG(port)) );    
+    
+}
+
+/******************************************************************************/
+/*                      MIB Counters functions                                */
+/******************************************************************************/
+
+/*******************************************************************************
+* ethClearMibCounters - Clear all MIB counters
+*
+* DESCRIPTION:
+*       This function clears all MIB counters of a specific ethernet port.
+*       A read from the MIB counter will reset the counter.
+*
+* INPUT:
+*       int    port -  Ethernet Port number.
+*
+* RETURN: None
+*
+*******************************************************************************/
+void ethClearCounters(int port)
+{
+    void*   pHndl;
+
+    pHndl = mvEthPortHndlGet(port);
+    if(pHndl != NULL)
+        mvEthMibCountersClear(pHndl);
+
+    return;
+}
+
+
+/* Print counters of the Ethernet port */
+void    ethPortCounters(int port)
+{
+    MV_U32  regValue, regValHigh;
+    void*   pHndl;
+
+    pHndl = mvEthPortHndlGet(port);
+    if(pHndl == NULL)
+        return;
+
+    mvOsPrintf("\n\t Port #%d MIB Counters\n\n", port);
+
+    mvOsPrintf("GoodFramesReceived          = %u\n", 
+              mvEthMibCounterRead(pHndl, ETH_MIB_GOOD_FRAMES_RECEIVED, NULL));
+    mvOsPrintf("BadFramesReceived           = %u\n", 
+              mvEthMibCounterRead(pHndl, ETH_MIB_BAD_FRAMES_RECEIVED, NULL));
+    mvOsPrintf("BroadcastFramesReceived     = %u\n", 
+              mvEthMibCounterRead(pHndl, ETH_MIB_BROADCAST_FRAMES_RECEIVED, NULL));
+    mvOsPrintf("MulticastFramesReceived     = %u\n", 
+              mvEthMibCounterRead(pHndl, ETH_MIB_MULTICAST_FRAMES_RECEIVED, NULL));
+
+    regValue = mvEthMibCounterRead(pHndl, ETH_MIB_GOOD_OCTETS_RECEIVED_LOW, 
+                                 &regValHigh);
+    mvOsPrintf("GoodOctetsReceived          = 0x%08x%08x\n", 
+               regValHigh, regValue);
+
+    mvOsPrintf("\n");
+    mvOsPrintf("GoodFramesSent              = %u\n", 
+              mvEthMibCounterRead(pHndl, ETH_MIB_GOOD_FRAMES_SENT, NULL));
+    mvOsPrintf("BroadcastFramesSent         = %u\n", 
+              mvEthMibCounterRead(pHndl, ETH_MIB_BROADCAST_FRAMES_SENT, NULL));
+    mvOsPrintf("MulticastFramesSent         = %u\n", 
+              mvEthMibCounterRead(pHndl, ETH_MIB_MULTICAST_FRAMES_SENT, NULL));
+
+    regValue = mvEthMibCounterRead(pHndl, ETH_MIB_GOOD_OCTETS_SENT_LOW, 
+                                 &regValHigh);
+    mvOsPrintf("GoodOctetsSent              = 0x%08x%08x\n", regValHigh, regValue);
+
+
+    mvOsPrintf("\n\t FC Control Counters\n");
+
+    regValue = mvEthMibCounterRead(pHndl, ETH_MIB_UNREC_MAC_CONTROL_RECEIVED, NULL);
+    mvOsPrintf("UnrecogMacControlReceived   = %u\n", regValue);
+
+    regValue = mvEthMibCounterRead(pHndl, ETH_MIB_GOOD_FC_RECEIVED, NULL);
+    mvOsPrintf("GoodFCFramesReceived        = %u\n", regValue);
+
+    regValue = mvEthMibCounterRead(pHndl, ETH_MIB_BAD_FC_RECEIVED, NULL);
+    mvOsPrintf("BadFCFramesReceived         = %u\n", regValue);
+
+    regValue = mvEthMibCounterRead(pHndl, ETH_MIB_FC_SENT, NULL);
+    mvOsPrintf("FCFramesSent                = %u\n", regValue);
+
+
+    mvOsPrintf("\n\t RX Errors\n");
+
+    regValue = mvEthMibCounterRead(pHndl, ETH_MIB_BAD_OCTETS_RECEIVED, NULL);
+    mvOsPrintf("BadOctetsReceived           = %u\n", regValue);
+
+    regValue = mvEthMibCounterRead(pHndl, ETH_MIB_UNDERSIZE_RECEIVED, NULL);
+    mvOsPrintf("UndersizeFramesReceived     = %u\n", regValue);
+
+    regValue = mvEthMibCounterRead(pHndl, ETH_MIB_FRAGMENTS_RECEIVED, NULL);
+    mvOsPrintf("FragmentsReceived           = %u\n", regValue);
+
+    regValue = mvEthMibCounterRead(pHndl, ETH_MIB_OVERSIZE_RECEIVED, NULL);
+    mvOsPrintf("OversizeFramesReceived      = %u\n", regValue);
+    
+    regValue = mvEthMibCounterRead(pHndl, ETH_MIB_JABBER_RECEIVED, NULL);
+    mvOsPrintf("JabbersReceived             = %u\n", regValue);
+
+    regValue = mvEthMibCounterRead(pHndl, ETH_MIB_MAC_RECEIVE_ERROR, NULL);
+    mvOsPrintf("MacReceiveErrors            = %u\n", regValue);
+
+    regValue = mvEthMibCounterRead(pHndl, ETH_MIB_BAD_CRC_EVENT, NULL);
+    mvOsPrintf("BadCrcReceived              = %u\n", regValue);
+
+    mvOsPrintf("\n\t TX Errors\n");
+
+    regValue = mvEthMibCounterRead(pHndl, ETH_MIB_INTERNAL_MAC_TRANSMIT_ERR, NULL);
+    mvOsPrintf("TxMacErrors                 = %u\n", regValue);
+
+    regValue = mvEthMibCounterRead(pHndl, ETH_MIB_EXCESSIVE_COLLISION, NULL);
+    mvOsPrintf("TxExcessiveCollisions       = %u\n", regValue);
+
+    regValue = mvEthMibCounterRead(pHndl, ETH_MIB_COLLISION, NULL);
+    mvOsPrintf("TxCollisions                = %u\n", regValue);
+
+    regValue = mvEthMibCounterRead(pHndl, ETH_MIB_LATE_COLLISION, NULL);
+    mvOsPrintf("TxLateCollisions            = %u\n", regValue);
+
+
+    mvOsPrintf("\n");
+    regValue = MV_REG_READ( ETH_RX_DISCARD_PKTS_CNTR_REG(port));
+    mvOsPrintf("Rx Discard packets counter  = %u\n", regValue);
+
+    regValue = MV_REG_READ(ETH_RX_OVERRUN_PKTS_CNTR_REG(port));
+    mvOsPrintf("Rx Overrun packets counter  = %u\n", regValue);
+}
+
+/* Print RMON counters of the Ethernet port */
+void    ethPortRmonCounters(int port)
+{
+    void*   pHndl;
+
+    pHndl = mvEthPortHndlGet(port);
+    if(pHndl == NULL)
+        return;
+
+    mvOsPrintf("\n\t Port #%d RMON MIB Counters\n\n", port);
+
+    mvOsPrintf("64 ByteFramesReceived           = %u\n", 
+              mvEthMibCounterRead(pHndl, ETH_MIB_FRAMES_64_OCTETS, NULL));
+    mvOsPrintf("65...127 ByteFramesReceived     = %u\n", 
+              mvEthMibCounterRead(pHndl, ETH_MIB_FRAMES_65_TO_127_OCTETS, NULL));
+    mvOsPrintf("128...255 ByteFramesReceived    = %u\n", 
+              mvEthMibCounterRead(pHndl, ETH_MIB_FRAMES_128_TO_255_OCTETS, NULL));
+    mvOsPrintf("256...511 ByteFramesReceived    = %u\n", 
+              mvEthMibCounterRead(pHndl, ETH_MIB_FRAMES_256_TO_511_OCTETS, NULL));
+    mvOsPrintf("512...1023 ByteFramesReceived   = %u\n", 
+              mvEthMibCounterRead(pHndl, ETH_MIB_FRAMES_512_TO_1023_OCTETS, NULL));
+    mvOsPrintf("1024...Max ByteFramesReceived   = %u\n", 
+              mvEthMibCounterRead(pHndl, ETH_MIB_FRAMES_1024_TO_MAX_OCTETS, NULL));
+}
+
+/* Print port information */
+void    ethPortStatus(int port)
+{
+    void*   pHndl;
+
+    pHndl = mvEthPortHndlGet(port);
+    if(pHndl != NULL)
+    {
+        mvEthPortShow(pHndl);
+    }
+}
+
+/* Print port queues information */
+void    ethPortQueues(int port, int rxQueue, int txQueue, int mode)  
+{
+    void*   pHndl;
+
+    pHndl = mvEthPortHndlGet(port);
+    if(pHndl != NULL)
+    {
+        mvEthQueuesShow(pHndl, rxQueue, txQueue, mode);
+    }
+}
+
+void    ethUcastSet(int port, char* macStr, int queue)
+{
+    void*   pHndl;
+    MV_U8   macAddr[MV_MAC_ADDR_SIZE];
+
+    pHndl = mvEthPortHndlGet(port);
+    if(pHndl != NULL)
+    {
+        mvMacStrToHex(macStr, macAddr);
+        mvEthMacAddrSet(pHndl, macAddr, queue);
+    }
+}
+
+
+void    ethPortUcastShow(int port)
+{
+    MV_U32  unicastReg, macL, macH;
+    int     i, j;
+
+    macL = MV_REG_READ(ETH_MAC_ADDR_LOW_REG(port));
+    macH = MV_REG_READ(ETH_MAC_ADDR_HIGH_REG(port));
+ 
+    mvOsPrintf("\n\t Port #%d Unicast MAC table: %02x:%02x:%02x:%02x:%02x:%02x\n\n", 
+                port, ((macH >> 24) & 0xff), ((macH >> 16) & 0xff),
+                      ((macH >> 8) & 0xff), (macH  & 0xff), 
+                      ((macL >> 8) & 0xff), (macL  & 0xff) );
+
+    for (i=0; i<4; i++)
+    {
+        unicastReg = MV_REG_READ( (ETH_DA_FILTER_UCAST_BASE(port) + i*4));
+        for(j=0; j<4; j++)
+        {
+            MV_U8   macEntry = (unicastReg >> (8*j)) & 0xFF;
+
+            mvOsPrintf("%X: %8s, Q = %d\n", i*4+j, 
+                (macEntry & BIT0) ? "Accept" : "Reject", (macEntry >> 1) & 0x7);
+        }
+    }
+} 
+
+void    ethMcastAdd(int port, char* macStr, int queue)
+{
+    void*   pHndl;
+    MV_U8   macAddr[MV_MAC_ADDR_SIZE];
+
+    pHndl = mvEthPortHndlGet(port);
+    if(pHndl != NULL)
+    {
+        mvMacStrToHex(macStr, macAddr);
+        mvEthMcastAddrSet(pHndl, macAddr, queue);
+    }
+}
+
+void    ethPortMcast(int port)
+{
+    int     tblIdx, regIdx;
+    MV_U32  regVal;
+
+    mvOsPrintf("\n\t Port #%d Special (IP) Multicast table: 01:00:5E:00:00:XX\n\n", 
+                port);
+
+    for(tblIdx=0; tblIdx<(256/4); tblIdx++)
+    {
+        regVal = MV_REG_READ((ETH_DA_FILTER_SPEC_MCAST_BASE(port) + tblIdx*4));
+        for(regIdx=0; regIdx<4; regIdx++)
+        {
+            if((regVal & (0x01 << (regIdx*8))) != 0)
+            {
+                mvOsPrintf("0x%02X: Accepted, rxQ = %d\n", 
+                    tblIdx*4+regIdx, ((regVal >> (regIdx*8+1)) & 0x07));
+            }
+        }
+    }
+    mvOsPrintf("\n\t Port #%d Other Multicast table\n\n", port);
+    for(tblIdx=0; tblIdx<(256/4); tblIdx++)
+    {
+        regVal = MV_REG_READ((ETH_DA_FILTER_OTH_MCAST_BASE(port) + tblIdx*4));
+        for(regIdx=0; regIdx<4; regIdx++)
+        {
+            if((regVal & (0x01 << (regIdx*8))) != 0)
+            {
+                mvOsPrintf("Crc8=0x%02X: Accepted, rxQ = %d\n", 
+                    tblIdx*4+regIdx, ((regVal >> (regIdx*8+1)) & 0x07));
+            }
+        }
+    }
+}
+
+
+/* Print status of Ethernet port */
+void    mvEthPortShow(void* pHndl)
+{
+    MV_U32              regValue, rxCoal, txCoal;
+    int                 speed, queue, port;
+    ETH_PORT_CTRL*      pPortCtrl = (ETH_PORT_CTRL*)pHndl;
+
+    port = pPortCtrl->portNo;
+
+    regValue = MV_REG_READ( ETH_PORT_STATUS_REG(port) );
+
+    mvOsPrintf("\n\t ethGiga #%d port Status: 0x%04x = 0x%08x\n\n", 
+                port, ETH_PORT_STATUS_REG(port), regValue);
+
+    mvOsPrintf("descInSram=%d, descSwCoher=%d\n", 
+                ethDescInSram, ethDescSwCoher);
+
+    if(regValue & ETH_GMII_SPEED_1000_MASK)
+        speed = 1000;
+    else if(regValue & ETH_MII_SPEED_100_MASK)
+        speed = 100;
+    else
+        speed = 10;
+
+    mvEthCoalGet(pPortCtrl, &rxCoal, &txCoal);
+
+    /* Link, Speed, Duplex, FlowControl */
+    mvOsPrintf("Link=%s, Speed=%d, Duplex=%s, RxFlowControl=%s",
+                (regValue & ETH_LINK_UP_MASK) ? "UP" : "DOWN",
+                speed, 
+                (regValue & ETH_FULL_DUPLEX_MASK) ? "FULL" : "HALF",
+                (regValue & ETH_ENABLE_RCV_FLOW_CTRL_MASK) ? "ENABLE" : "DISABLE");
+
+    mvOsPrintf("\n");
+
+    mvOsPrintf("RxCoal = %d usec, TxCoal = %d usec\n", 
+                rxCoal, txCoal);
+
+    mvOsPrintf("rxDefQ=%d, arpQ=%d, bpduQ=%d, tcpQ=%d, udpQ=%d\n\n",
+                pPortCtrl->portConfig.rxDefQ, pPortCtrl->portConfig.rxArpQ, 
+                pPortCtrl->portConfig.rxBpduQ, 
+                pPortCtrl->portConfig.rxTcpQ, pPortCtrl->portConfig.rxUdpQ); 
+
+    /* Print all RX and TX queues */
+    for(queue=0; queue<MV_ETH_RX_Q_NUM; queue++)
+    {
+        mvOsPrintf("RX Queue #%d: base=0x%lx, free=%d\n", 
+                    queue, (MV_ULONG)pPortCtrl->rxQueue[queue].pFirstDescr,
+                    mvEthRxResourceGet(pPortCtrl, queue) );
+    }
+    mvOsPrintf("\n");
+    for(queue=0; queue<MV_ETH_TX_Q_NUM; queue++)
+    {
+        mvOsPrintf("TX Queue #%d: base=0x%lx, free=%d\n", 
+                queue, (MV_ULONG)pPortCtrl->txQueue[queue].pFirstDescr,
+                mvEthTxResourceGet(pPortCtrl, queue) );
+    }
+}
+
+/* Print RX and TX queue of the Ethernet port */
+void    mvEthQueuesShow(void* pHndl, int rxQueue, int txQueue, int mode)  
+{
+    ETH_PORT_CTRL   *pPortCtrl = (ETH_PORT_CTRL*)pHndl;
+    ETH_QUEUE_CTRL  *pQueueCtrl;
+    MV_U32          regValue;
+    ETH_RX_DESC     *pRxDescr;
+    ETH_TX_DESC     *pTxDescr;
+    int             i, port = pPortCtrl->portNo;
+
+    if( (rxQueue >=0) && (rxQueue < MV_ETH_RX_Q_NUM) )
+    {
+        pQueueCtrl = &(pPortCtrl->rxQueue[rxQueue]);
+        mvOsPrintf("Port #%d, RX Queue #%d\n\n", port, rxQueue);
+
+        mvOsPrintf("CURR_RX_DESC_PTR        : 0x%X = 0x%08x\n", 
+            ETH_RX_CUR_DESC_PTR_REG(port, rxQueue), 
+            MV_REG_READ( ETH_RX_CUR_DESC_PTR_REG(port, rxQueue)));
+
+
+        if(pQueueCtrl->pFirstDescr != NULL)
+        {
+            mvOsPrintf("pFirstDescr=0x%lx, pLastDescr=0x%lx, numOfResources=%d\n",
+                (MV_ULONG)pQueueCtrl->pFirstDescr, (MV_ULONG)pQueueCtrl->pLastDescr, 
+                pQueueCtrl->resource);
+            mvOsPrintf("pCurrDescr: 0x%lx, pUsedDescr: 0x%lx\n",
+                (MV_ULONG)pQueueCtrl->pCurrentDescr, 
+                (MV_ULONG)pQueueCtrl->pUsedDescr);
+
+            if(mode == 1)
+            {
+                pRxDescr = (ETH_RX_DESC*)pQueueCtrl->pFirstDescr;
+                i = 0; 
+                do 
+                {
+                    mvOsPrintf("%3d. desc=%08x (%08x), cmd=%08x, data=%4d, buf=%4d, buf=%08x, pkt=%lx, os=%lx\n", 
+                                i, (MV_U32)pRxDescr, (MV_U32)ethDescVirtToPhy(pQueueCtrl, (MV_U8*)pRxDescr), 
+                                pRxDescr->cmdSts, pRxDescr->byteCnt, (MV_U32)pRxDescr->bufSize, 
+                                (unsigned int)pRxDescr->bufPtr, (MV_ULONG)pRxDescr->returnInfo,
+                                ((MV_PKT_INFO*)pRxDescr->returnInfo)->osInfo);
+
+                    ETH_DESCR_INV(pPortCtrl, pRxDescr);
+                    pRxDescr = RX_NEXT_DESC_PTR(pRxDescr, pQueueCtrl);
+                    i++;
+                } while (pRxDescr != pQueueCtrl->pFirstDescr);
+            }
+        }
+        else
+            mvOsPrintf("RX Queue #%d is NOT CREATED\n", rxQueue);
+    }
+
+    if( (txQueue >=0) && (txQueue < MV_ETH_TX_Q_NUM) )
+    {
+        pQueueCtrl = &(pPortCtrl->txQueue[txQueue]);
+        mvOsPrintf("Port #%d, TX Queue #%d\n\n", port, txQueue);
+
+        regValue = MV_REG_READ( ETH_TX_CUR_DESC_PTR_REG(port, txQueue));
+        mvOsPrintf("CURR_TX_DESC_PTR        : 0x%X = 0x%08x\n", 
+                    ETH_TX_CUR_DESC_PTR_REG(port, txQueue), regValue);
+
+        if(pQueueCtrl->pFirstDescr != NULL)
+        {
+            mvOsPrintf("pFirstDescr=0x%lx, pLastDescr=0x%lx, numOfResources=%d\n",
+                       (MV_ULONG)pQueueCtrl->pFirstDescr, 
+                       (MV_ULONG)pQueueCtrl->pLastDescr, 
+                        pQueueCtrl->resource);
+            mvOsPrintf("pCurrDescr: 0x%lx, pUsedDescr: 0x%lx\n",
+                       (MV_ULONG)pQueueCtrl->pCurrentDescr, 
+                       (MV_ULONG)pQueueCtrl->pUsedDescr);
+
+            if(mode == 1)
+            {
+                pTxDescr = (ETH_TX_DESC*)pQueueCtrl->pFirstDescr;
+                i = 0; 
+                do 
+                {
+                    mvOsPrintf("%3d. desc=%08x (%08x), cmd=%08x, data=%4d, buf=%08x, pkt=%lx, os=%lx\n", 
+                                i, (MV_U32)pTxDescr, (MV_U32)ethDescVirtToPhy(pQueueCtrl, (MV_U8*)pTxDescr), 
+                                pTxDescr->cmdSts, pTxDescr->byteCnt, 
+                                (MV_U32)pTxDescr->bufPtr, (MV_ULONG)pTxDescr->returnInfo,
+                                pTxDescr->returnInfo ? (((MV_PKT_INFO*)pTxDescr->returnInfo)->osInfo) : 0x0);
+
+                    ETH_DESCR_INV(pPortCtrl, pTxDescr);
+                    pTxDescr = TX_NEXT_DESC_PTR(pTxDescr, pQueueCtrl);
+                    i++;
+                } while (pTxDescr != pQueueCtrl->pFirstDescr);
+            }
+        }
+        else
+            mvOsPrintf("TX Queue #%d is NOT CREATED\n", txQueue);
+    }
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/eth/gbe/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/eth/gbe/Makefile
@@ -0,0 +1,5 @@
+include $(srctree)/$(subst ",,$(CONFIG_MV_HAL_RULES_PATH))
+# Objects list
+obj-$(CONFIG_MV_INCLUDE_GIG_ETH) += mvEth.o
+obj-$(CONFIG_MV_INCLUDE_GIG_ETH) += mvEthDebug.o
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/eth/gbe/mvEthDebug.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/eth/gbe/mvEthDebug.h
@@ -0,0 +1,154 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+#ifndef __MV_ETH_DEBUG_H__
+#define __MV_ETH_DEBUG_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if 0
+/*
+ ** Externs
+ */
+void     ethBpduRxQ(int port, int bpduQueue);
+void     ethArpRxQ(int port, int bpduQueue);
+void     ethTcpRxQ(int port, int bpduQueue);
+void     ethUdpRxQ(int port, int bpduQueue);
+void     ethMcastAdd(int port, char* macStr, int queue);
+
+#ifdef INCLUDE_MULTI_QUEUE
+void   	ethRxPolicy( int port);
+void   	ethTxPolicy( int port);
+void   	ethTxPolDA(int port, char* macStr, int txQ, char* headerHexStr);
+void   	ethRxPolMode(int port, MV_ETH_PRIO_MODE prioMode);
+void    ethRxPolQ(int port, int rxQueue, int rxQuota);
+#endif /* INCLUDE_MULTI_QUEUE */
+
+void    print_egiga_stat(void *sc, unsigned int port);
+void    ethPortStatus (int port);
+void    ethPortQueues( int port, int rxQueue, int txQueue, int mode);
+void    ethPortMcast(int port);
+void    ethPortRegs(int port);
+void    ethPortCounters(int port);
+void 	ethPortRmonCounters(int port);
+void    ethRxCoal(int port, int usec);
+void    ethTxCoal(int port, int usec);
+
+void    ethRegs(int port);
+void	ethClearCounters(int port);
+void    ethUcastSet(int port, char* macStr, int queue);
+void    ethPortUcastShow(int port);
+
+#ifdef CONFIG_MV_ETH_HEADER
+void	run_com_header(const char *buffer);
+#endif
+
+#ifdef INCLUDE_MULTI_QUEUE
+void    ethRxPolMode(int port, MV_ETH_PRIO_MODE prioMode);
+void    ethRxPolQ(int port, int queue, int quota);
+void    ethRxPolicy(int port);
+void    ethTxPolDef(int port, int txQ, char* headerHexStr);
+void    ethTxPolDA(int port, char* macStr, int txQ, char* headerHexStr);
+void    ethTxPolicy(int port);
+#endif /* INCLUDE_MULTI_QUEUE */
+
+#if (MV_ETH_VERSION >= 4)
+void     ethEjpModeSet(int port, int mode)
+#endif
+#endif /* 0 */
+
+
+
+
+void    ethRxCoal(int port, int usec);
+void    ethTxCoal(int port, int usec);
+#if (MV_ETH_VERSION >= 4)
+void     ethEjpModeSet(int port, int mode);
+#endif /* (MV_ETH_VERSION >= 4) */
+
+void    ethBpduRxQ(int port, int bpduQueue);
+void    ethArpRxQ(int port, int arpQueue);
+void    ethTcpRxQ(int port, int tcpQueue);
+void    ethUdpRxQ(int port, int udpQueue);
+void    ethTxPolicyRegs(int port);
+void    ethPortRegs(int port);
+void    ethRegs(int port);
+void ethClearCounters(int port);
+void    ethPortCounters(int port);
+void    ethPortRmonCounters(int port);
+void    ethPortStatus(int port);
+void    ethPortQueues(int port, int rxQueue, int txQueue, int mode);
+void    ethUcastSet(int port, char* macStr, int queue);
+void    ethPortUcastShow(int port);
+void    ethMcastAdd(int port, char* macStr, int queue);
+void    ethPortMcast(int port);
+void    mvEthPortShow(void* pHndl);
+void    mvEthQueuesShow(void* pHndl, int rxQueue, int txQueue, int mode);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/eth/gbe/mvEth.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/eth/gbe/mvEth.c
@@ -0,0 +1,2947 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+        this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+/*******************************************************************************
+* mvEth.c - Marvell's Gigabit Ethernet controller low level driver
+*
+* DESCRIPTION:
+*       This file introduce OS independent APIs to Marvell's Gigabit Ethernet
+*       controller. This Gigabit Ethernet Controller driver API controls
+*       1) Operations (i.e. port Init, Finish, Up, Down, PhyReset etc').
+*       2) Data flow (i.e. port Send, Receive etc').
+*       3) MAC Filtering functions (ethSetMcastAddr, ethSetRxFilterMode, etc.)
+*       4) MIB counters support (ethReadMibCounter)
+*       5) Debug functions (ethPortRegs, ethPortCounters, ethPortQueues, etc.)
+*       Each Gigabit Ethernet port is controlled via ETH_PORT_CTRL struct.
+*       This struct includes configuration information as well as driver
+*       internal data needed for its operations.
+*
+*       Supported Features:
+*       - OS independent. All required OS services are implemented via external 
+*       OS dependent components (like osLayer or ethOsg)
+*       - The user is free from Rx/Tx queue managing.
+*       - Simple Gigabit Ethernet port operation API.
+*       - Simple Gigabit Ethernet port data flow API.
+*       - Data flow and operation API support per queue functionality.
+*       - Support cached descriptors for better performance.
+*       - PHY access and control API.
+*       - Port Configuration API.
+*       - Full control over Special and Other Multicast MAC tables.
+*
+*******************************************************************************/
+/* includes */
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvSysEthConfig.h"
+#include "mvEthRegs.h"
+#include "eth/mvEth.h"
+#include "mvEthGbe.h"
+
+#ifdef MV_RT_DEBUG
+#   define ETH_DEBUG
+#endif
+
+
+/* locals */
+MV_BOOL         ethDescInSram;
+MV_BOOL         ethDescSwCoher;
+MV_ETH_HAL_DATA	ethHalData;
+
+/* This array holds the control structure of each port */
+ETH_PORT_CTRL* ethPortCtrl[MV_ETH_MAX_PORTS];
+
+/* Ethernet Port Local routines */
+
+static void    ethInitRxDescRing(ETH_PORT_CTRL* pPortCtrl, int queue);
+
+static void    ethInitTxDescRing(ETH_PORT_CTRL* pPortCtrl, int queue);
+
+static void    ethSetUcastTable(int portNo, int queue);
+
+static MV_BOOL ethSetUcastAddr (int ethPortNum, MV_U8 lastNibble, int queue);
+static MV_BOOL ethSetSpecialMcastAddr(int ethPortNum, MV_U8 lastByte, int queue);
+static MV_BOOL ethSetOtherMcastAddr(int ethPortNum, MV_U8 crc8, int queue);
+
+static void    ethFreeDescrMemory(ETH_PORT_CTRL* pEthPortCtrl, MV_BUF_INFO* pDescBuf);
+static MV_U8*  ethAllocDescrMemory(ETH_PORT_CTRL* pEthPortCtrl, int size, 
+                                   MV_ULONG* pPhysAddr, MV_U32 *memHandle);
+
+static MV_U32 mvEthMruGet(MV_U32 maxRxPktSize);
+
+static void mvEthPortSgmiiConfig(int port);
+
+
+
+/******************************************************************************/
+/*                      EthDrv Initialization functions                       */
+/******************************************************************************/
+
+/*******************************************************************************
+* mvEthHalInit - Initialize the Giga Ethernet unit
+*
+* DESCRIPTION:
+*       This function initialize the Giga Ethernet unit.
+*       1) Configure Address decode windows of the unit
+*       2) Set registers to HW default values. 
+*       3) Clear and Disable interrupts
+*
+* INPUT:  NONE
+*
+* RETURN: NONE
+*
+* NOTE: this function is called once in the boot process.
+*******************************************************************************/
+void    mvEthHalInit(MV_ETH_HAL_DATA *halData)
+{
+    int port;
+
+    mvOsMemcpy(&ethHalData, halData, sizeof(MV_ETH_HAL_DATA));
+
+    /* Init static data structures */
+    for (port=0; port<MV_ETH_MAX_PORTS; port++)
+    {
+        ethPortCtrl[port] = NULL;
+    }
+    /* Power down all existing ports */
+    for(port=0; port<ethHalData.maxPortNum; port++)
+    {
+	if(ethHalData.portData[port].powerOn == MV_FALSE)
+		continue;
+#ifdef CONFIG_MV78200
+	/* Skip ports mapped to another CPU*/
+	if (MV_FALSE == mvSocUnitIsMappedToThisCpu(GIGA0+port))
+	{
+		continue;
+	}		
+#endif
+
+
+        /* Disable Giga Ethernet Unit interrupts */
+        MV_REG_WRITE(ETH_UNIT_INTR_MASK_REG(port), 0);
+
+        /* Clear ETH_UNIT_INTR_CAUSE_REG register */
+        MV_REG_WRITE(ETH_UNIT_INTR_CAUSE_REG(port), 0);
+
+    }
+
+    mvEthMemAttrGet(&ethDescInSram, &ethDescSwCoher);
+
+#if defined(ETH_DESCR_IN_SRAM)
+    if(ethDescInSram == MV_FALSE)
+    {
+        mvOsPrintf("ethDrv: WARNING! Descriptors will be allocated in DRAM instead of SRAM.\n");
+    }
+#endif /* ETH_DESCR_IN_SRAM */
+}
+
+/*******************************************************************************
+* mvEthMemAttrGet - Define properties (SRAM/DRAM, SW_COHER / HW_COHER / UNCACHED) 
+*                       of of memory location for RX and TX descriptors.
+*
+* DESCRIPTION:
+*       This function allocates memory for RX and TX descriptors.
+*       - If ETH_DESCR_IN_SRAM defined, allocate from SRAM memory.
+*       - If ETH_DESCR_IN_SDRAM defined, allocate from SDRAM memory.
+*
+* INPUT:
+*   MV_BOOL* pIsSram - place of descriptors: 
+*                      MV_TRUE  - in SRAM
+*                      MV_FALSE - in DRAM
+*   MV_BOOL* pIsSwCoher - cache coherency of descriptors:
+*                      MV_TRUE  - driver is responsible for cache coherency
+*                      MV_FALSE - driver is not responsible for cache coherency
+*
+* RETURN:
+*
+*******************************************************************************/
+void   mvEthMemAttrGet(MV_BOOL* pIsSram, MV_BOOL* pIsSwCoher)
+{
+    MV_BOOL isSram, isSwCoher;
+
+    isSram = MV_FALSE;
+#if (ETHER_DRAM_COHER == MV_CACHE_COHER_SW) 
+    isSwCoher = MV_TRUE;
+#else 
+    isSwCoher = MV_FALSE;
+#endif
+
+#if defined(ETH_DESCR_IN_SRAM)
+    if( ethHalData.sramSize > 0)
+    {
+        isSram = MV_TRUE;
+        #if (INTEG_SRAM_COHER == MV_CACHE_COHER_SW) 
+            isSwCoher = MV_TRUE;
+        #else 
+            isSwCoher = MV_FALSE;
+        #endif
+    }
+#endif /* ETH_DESCR_IN_SRAM */
+
+    if(pIsSram != NULL)
+        *pIsSram = isSram;
+
+    if(pIsSwCoher != NULL)
+        *pIsSwCoher = isSwCoher;
+}
+
+
+
+/******************************************************************************/
+/*                      Port Initialization functions                         */
+/******************************************************************************/
+
+/*******************************************************************************
+* mvEthPortInit - Initialize the Ethernet port driver
+*
+* DESCRIPTION:
+*       This function initialize the ethernet port.
+*       1) Allocate and initialize internal port Control structure.
+*       2) Create RX and TX descriptor rings for default RX and TX queues
+*       3) Disable RX and TX operations, clear cause registers and 
+*          mask all interrupts.
+*       4) Set all registers to default values and clean all MAC tables. 
+*
+* INPUT:
+*       int             portNo          - Ethernet port number
+*       ETH_PORT_INIT   *pEthPortInit   - Ethernet port init structure
+*
+* RETURN:
+*       void* - ethernet port handler, that should be passed to the most other
+*               functions dealing with this port.
+*
+* NOTE: This function is called once per port when loading the eth module.
+*******************************************************************************/
+void*   mvEthPortInit(int portNo, MV_ETH_PORT_INIT *pEthPortInit)
+{
+    int             queue, descSize;
+    ETH_PORT_CTRL*  pPortCtrl;
+
+    /* Check validity of parameters */
+    if( (portNo >= (int)ethHalData.maxPortNum) || 
+        (pEthPortInit->rxDefQ   >= MV_ETH_RX_Q_NUM)  ||
+        (pEthPortInit->maxRxPktSize < 1518) )
+    {
+        mvOsPrintf("EthPort #%d: Bad initialization parameters\n", portNo);
+        return NULL;
+    }
+    if( (pEthPortInit->rxDescrNum[pEthPortInit->rxDefQ]) == 0)
+    {
+        mvOsPrintf("EthPort #%d: rxDefQ (%d) must be created\n", 
+                    portNo, pEthPortInit->rxDefQ);
+        return NULL;
+    }
+
+    pPortCtrl = (ETH_PORT_CTRL*)mvOsMalloc( sizeof(ETH_PORT_CTRL) );
+    if(pPortCtrl == NULL)   
+    {
+       mvOsPrintf("EthDrv: Can't allocate %dB for port #%d control structure!\n",
+                   (int)sizeof(ETH_PORT_CTRL), portNo);
+       return NULL;
+    }
+
+    memset(pPortCtrl, 0, sizeof(ETH_PORT_CTRL) );
+    ethPortCtrl[portNo] = pPortCtrl;
+
+    pPortCtrl->portState = MV_UNDEFINED_STATE;
+
+    pPortCtrl->portNo = portNo;
+
+    pPortCtrl->osHandle = pEthPortInit->osHandle;
+
+    /* Copy Configuration parameters */
+    pPortCtrl->portConfig.maxRxPktSize = pEthPortInit->maxRxPktSize;
+    pPortCtrl->portConfig.rxDefQ = pEthPortInit->rxDefQ;
+    pPortCtrl->portConfig.ejpMode = 0;
+
+    for( queue=0; queue<MV_ETH_RX_Q_NUM; queue++ )
+    {
+        pPortCtrl->rxQueueConfig[queue].descrNum = pEthPortInit->rxDescrNum[queue];
+    }
+    for( queue=0; queue<MV_ETH_TX_Q_NUM; queue++ )
+    {
+        pPortCtrl->txQueueConfig[queue].descrNum = pEthPortInit->txDescrNum[queue];
+    }
+
+    mvEthPortDisable(pPortCtrl);
+
+    /* Set the board information regarding PHY address */
+    mvEthPhyAddrSet(pPortCtrl, ethHalData.portData[portNo].phyAddr );
+
+    /* Create all requested RX queues */
+    for(queue=0; queue<MV_ETH_RX_Q_NUM; queue++)
+    {
+        if(pPortCtrl->rxQueueConfig[queue].descrNum == 0)
+            continue;
+
+        /* Allocate memory for RX descriptors */
+        descSize = ((pPortCtrl->rxQueueConfig[queue].descrNum * ETH_RX_DESC_ALIGNED_SIZE) +
+                                                        CPU_D_CACHE_LINE_SIZE);
+ 
+        pPortCtrl->rxQueue[queue].descBuf.bufVirtPtr = 
+                        ethAllocDescrMemory(pPortCtrl, descSize, 
+					    &pPortCtrl->rxQueue[queue].descBuf.bufPhysAddr,
+					    &pPortCtrl->rxQueue[queue].descBuf.memHandle);
+        pPortCtrl->rxQueue[queue].descBuf.bufSize = descSize;
+        if(pPortCtrl->rxQueue[queue].descBuf.bufVirtPtr == NULL)
+        {
+            mvOsPrintf("EthPort #%d, rxQ=%d: Can't allocate %d bytes in %s for %d RX descr\n", 
+                        pPortCtrl->portNo, queue, descSize, 
+                        ethDescInSram ? "SRAM" : "DRAM",
+                        pPortCtrl->rxQueueConfig[queue].descrNum);
+            return NULL;
+        }
+
+        ethInitRxDescRing(pPortCtrl, queue);
+    }
+    /* Create TX queues */
+    for(queue=0; queue<MV_ETH_TX_Q_NUM; queue++)
+    {
+        if(pPortCtrl->txQueueConfig[queue].descrNum == 0)
+            continue;
+
+        /* Allocate memory for TX descriptors */
+        descSize = ((pPortCtrl->txQueueConfig[queue].descrNum * ETH_TX_DESC_ALIGNED_SIZE) +
+                                                        CPU_D_CACHE_LINE_SIZE);
+ 
+        pPortCtrl->txQueue[queue].descBuf.bufVirtPtr = 
+		ethAllocDescrMemory(pPortCtrl, descSize,
+				    &pPortCtrl->txQueue[queue].descBuf.bufPhysAddr,
+				    &pPortCtrl->txQueue[queue].descBuf.memHandle);
+        pPortCtrl->txQueue[queue].descBuf.bufSize = descSize;
+        if(pPortCtrl->txQueue[queue].descBuf.bufVirtPtr == NULL)
+        {
+            mvOsPrintf("EthPort #%d, txQ=%d: Can't allocate %d bytes in %s for %d TX descr\n", 
+                        pPortCtrl->portNo, queue, descSize, ethDescInSram ? "SRAM" : "DRAM",
+                        pPortCtrl->txQueueConfig[queue].descrNum);
+            return NULL;
+        }
+
+        ethInitTxDescRing(pPortCtrl, queue);
+    }
+    mvEthDefaultsSet(pPortCtrl);
+
+    pPortCtrl->portState = MV_IDLE;
+    return pPortCtrl;
+}
+
+/*******************************************************************************
+* ethPortFinish - Finish the Ethernet port driver
+*
+* DESCRIPTION:
+*       This function finish the ethernet port.
+*       1) Down ethernet port if needed.
+*       2) Delete RX and TX descriptor rings for all created RX and TX queues
+*       3) Free internal port Control structure.
+*
+* INPUT:
+*       void*   pEthPortHndl  - Ethernet port handler
+*
+* RETURN:   NONE.
+*
+*******************************************************************************/
+void    mvEthPortFinish(void* pPortHndl)
+{
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pPortHndl;
+    int             queue, portNo  = pPortCtrl->portNo;
+
+    if(pPortCtrl->portState == MV_ACTIVE)
+    {
+        mvOsPrintf("ethPort #%d: Warning !!! Finish port in Active state\n",
+                 portNo);
+        mvEthPortDisable(pPortHndl);
+    }
+
+    /* Free all allocated RX queues */
+    for(queue=0; queue<MV_ETH_RX_Q_NUM; queue++)
+    {
+        ethFreeDescrMemory(pPortCtrl, &pPortCtrl->rxQueue[queue].descBuf);
+    }
+
+    /* Free all allocated TX queues */
+    for(queue=0; queue<MV_ETH_TX_Q_NUM; queue++)
+    {
+        ethFreeDescrMemory(pPortCtrl, &pPortCtrl->txQueue[queue].descBuf);
+    }
+
+    /* Free port control structure */
+    mvOsFree(pPortCtrl);
+
+    ethPortCtrl[portNo] = NULL;
+}
+
+/*******************************************************************************
+* mvEthDefaultsSet - Set defaults to the ethernet port
+*
+* DESCRIPTION:
+*       This function set default values to the ethernet port.
+*       1) Clear Cause registers and Mask all interrupts
+*       2) Clear all MAC tables
+*       3) Set defaults to all registers
+*       4) Reset all created RX and TX descriptors ring
+*       5) Reset PHY
+*
+* INPUT:
+*       void*   pEthPortHndl  - Ethernet port handler
+*
+* RETURN:   MV_STATUS  
+*               MV_OK - Success, Others - Failure
+* NOTE:
+*   This function update all the port configuration except those set
+*   Initialy by the OsGlue by MV_ETH_PORT_INIT.
+*   This function can be called after portDown to return the port setting 
+*   to defaults.
+*******************************************************************************/
+MV_STATUS   mvEthDefaultsSet(void* pPortHndl)
+{
+    int                 ethPortNo, queue;
+    ETH_PORT_CTRL*      pPortCtrl = (ETH_PORT_CTRL*)pPortHndl;
+    ETH_QUEUE_CTRL*     pQueueCtrl;
+    MV_U32              txPrio;
+    MV_U32              portCfgReg, portCfgExtReg, portSerialCtrlReg, portSerialCtrl1Reg, portSdmaCfgReg;
+    MV_ETH_MAC_SPEED  	boardMacCfg;
+
+    ethPortNo = pPortCtrl->portNo;
+
+    /* Clear Cause registers */
+    MV_REG_WRITE(ETH_INTR_CAUSE_REG(ethPortNo),0);
+    MV_REG_WRITE(ETH_INTR_CAUSE_EXT_REG(ethPortNo),0);
+
+    /* Mask all interrupts */
+    MV_REG_WRITE(ETH_INTR_MASK_REG(ethPortNo),0);
+    MV_REG_WRITE(ETH_INTR_MASK_EXT_REG(ethPortNo),0);
+
+    portCfgReg  =   PORT_CONFIG_VALUE;
+    portCfgExtReg  =  PORT_CONFIG_EXTEND_VALUE;
+
+    boardMacCfg = ethHalData.portData[ethPortNo].macSpeed;
+
+    if(boardMacCfg == ETH_MAC_SPEED_100M)
+    {
+        portSerialCtrlReg = PORT_SERIAL_CONTROL_100MB_FORCE_VALUE;
+    }
+    else if(boardMacCfg == ETH_MAC_SPEED_1000M)
+    {
+        portSerialCtrlReg = PORT_SERIAL_CONTROL_1000MB_FORCE_VALUE;
+    }
+    else
+    {
+        portSerialCtrlReg =  PORT_SERIAL_CONTROL_VALUE;
+    }
+
+    /* build PORT_SDMA_CONFIG_REG */
+    portSdmaCfgReg = ETH_TX_INTR_COAL_MASK(0);
+    portSdmaCfgReg |= ETH_TX_BURST_SIZE_MASK(ETH_BURST_SIZE_16_64BIT_VALUE);
+
+#if ( (ETHER_DRAM_COHER == MV_CACHE_COHER_HW_WB) ||  \
+      (ETHER_DRAM_COHER == MV_CACHE_COHER_HW_WT) )
+    /* some devices have restricted RX burst size when using HW coherency */
+    portSdmaCfgReg |= ETH_RX_BURST_SIZE_MASK(ETH_BURST_SIZE_4_64BIT_VALUE);
+#else
+    portSdmaCfgReg |= ETH_RX_BURST_SIZE_MASK(ETH_BURST_SIZE_16_64BIT_VALUE);
+#endif
+
+#if defined(MV_CPU_BE)
+    /* big endian */
+# if defined(MV_ARM)
+    portSdmaCfgReg |= (ETH_RX_NO_DATA_SWAP_MASK |
+                       ETH_TX_NO_DATA_SWAP_MASK |
+                       ETH_DESC_SWAP_MASK);
+# elif defined(MV_PPC)
+    portSdmaCfgReg |= (ETH_RX_DATA_SWAP_MASK |
+                       ETH_TX_DATA_SWAP_MASK |
+                       ETH_NO_DESC_SWAP_MASK);
+# else
+# error "Giga Ethernet Swap policy is not defined for the CPU_ARCH"
+# endif /* MV_ARM / MV_PPC */
+
+#else /* MV_CPU_LE */
+    /* little endian */
+    portSdmaCfgReg |= (ETH_RX_NO_DATA_SWAP_MASK | 
+                       ETH_TX_NO_DATA_SWAP_MASK | 
+                       ETH_NO_DESC_SWAP_MASK);
+#endif /* MV_CPU_BE / MV_CPU_LE */
+
+    pPortCtrl->portRxQueueCmdReg = 0;
+    pPortCtrl->portTxQueueCmdReg = 0;
+
+#if (MV_ETH_VERSION >= 4) 
+    if(pPortCtrl->portConfig.ejpMode == MV_FALSE)
+    {
+        MV_REG_WRITE(ETH_TXQ_CMD_1_REG(ethPortNo), ETH_TX_EJP_ENABLE_MASK);
+    }
+    else
+    {
+        MV_REG_WRITE(ETH_TXQ_CMD_1_REG(ethPortNo), 0);
+    }
+#endif /* (MV_ETH_VERSION >= 4) */
+
+    ethSetUcastTable(ethPortNo, -1);
+    mvEthSetSpecialMcastTable(ethPortNo, -1);
+    mvEthSetOtherMcastTable(ethPortNo, -1);
+
+    portSerialCtrlReg &= ~ETH_MAX_RX_PACKET_SIZE_MASK;
+
+    portSerialCtrlReg |= mvEthMruGet(pPortCtrl->portConfig.maxRxPktSize);
+
+    MV_REG_WRITE(ETH_PORT_SERIAL_CTRL_REG(ethPortNo), portSerialCtrlReg);
+
+    /* Update value of PortConfig register accordingly with all RxQueue types */
+    pPortCtrl->portConfig.rxArpQ = pPortCtrl->portConfig.rxDefQ;
+    pPortCtrl->portConfig.rxBpduQ = pPortCtrl->portConfig.rxDefQ; 
+    pPortCtrl->portConfig.rxTcpQ = pPortCtrl->portConfig.rxDefQ; 
+    pPortCtrl->portConfig.rxUdpQ = pPortCtrl->portConfig.rxDefQ; 
+
+    portCfgReg &= ~ETH_DEF_RX_QUEUE_ALL_MASK;
+    portCfgReg |= ETH_DEF_RX_QUEUE_MASK(pPortCtrl->portConfig.rxDefQ);
+    
+    portCfgReg &= ~ETH_DEF_RX_ARP_QUEUE_ALL_MASK;
+    portCfgReg |= ETH_DEF_RX_ARP_QUEUE_MASK(pPortCtrl->portConfig.rxArpQ); 
+
+    portCfgReg &= ~ETH_DEF_RX_BPDU_QUEUE_ALL_MASK;
+    portCfgReg |= ETH_DEF_RX_BPDU_QUEUE_MASK(pPortCtrl->portConfig.rxBpduQ);
+
+    portCfgReg &= ~ETH_DEF_RX_TCP_QUEUE_ALL_MASK;
+    portCfgReg |= ETH_DEF_RX_TCP_QUEUE_MASK(pPortCtrl->portConfig.rxTcpQ);
+
+    portCfgReg &= ~ETH_DEF_RX_UDP_QUEUE_ALL_MASK;
+    portCfgReg |= ETH_DEF_RX_UDP_QUEUE_MASK(pPortCtrl->portConfig.rxUdpQ);
+
+    /* Assignment of Tx CTRP of given queue */
+    txPrio = 0;
+
+    for(queue=0; queue<MV_ETH_TX_Q_NUM; queue++)
+    {
+        pQueueCtrl = &pPortCtrl->txQueue[queue];
+
+        if(pQueueCtrl->pFirstDescr != NULL)
+        {
+            ethResetTxDescRing(pPortCtrl, queue);
+
+            MV_REG_WRITE(ETH_TXQ_TOKEN_COUNT_REG(ethPortNo, queue),
+                         0x3fffffff);
+            MV_REG_WRITE(ETH_TXQ_TOKEN_CFG_REG(ethPortNo, queue), 
+                         0x03ffffff);
+        }
+        else
+        {
+            MV_REG_WRITE(ETH_TXQ_TOKEN_COUNT_REG(ethPortNo, queue),  0x0);
+            MV_REG_WRITE(ETH_TXQ_TOKEN_CFG_REG(ethPortNo, queue), 0x0);
+        }
+    }
+
+    /* Assignment of Rx CRDP of given queue */
+    for(queue=0; queue<MV_ETH_RX_Q_NUM; queue++)
+    {
+        ethResetRxDescRing(pPortCtrl, queue);
+    }
+
+    /* Allow receiving packes with odd number of preamble nibbles */
+    portSerialCtrl1Reg = MV_REG_READ(ETH_PORT_SERIAL_CTRL_1_REG(ethPortNo));
+    portSerialCtrl1Reg |= ETH_EN_MII_ODD_PRE_MASK;
+    MV_REG_WRITE(ETH_PORT_SERIAL_CTRL_1_REG(ethPortNo), portSerialCtrl1Reg);
+
+    /* Assign port configuration and command. */
+    MV_REG_WRITE(ETH_PORT_CONFIG_REG(ethPortNo), portCfgReg);
+
+    MV_REG_WRITE(ETH_PORT_CONFIG_EXTEND_REG(ethPortNo), portCfgExtReg);
+
+    /* Assign port SDMA configuration */
+    MV_REG_WRITE(ETH_SDMA_CONFIG_REG(ethPortNo), portSdmaCfgReg);
+    
+    /* Turn off the port/queue bandwidth limitation */
+    MV_REG_WRITE(ETH_MAX_TRANSMIT_UNIT_REG(ethPortNo), 0x0);
+
+    return MV_OK;
+}
+
+/*******************************************************************************
+* ethPortUp - Start the Ethernet port RX and TX activity.
+*
+* DESCRIPTION:
+*       This routine start Rx and Tx activity:
+*
+*       Note: Each Rx and Tx queue descriptor's list must be initialized prior
+*       to calling this function (use etherInitTxDescRing for Tx queues and
+*       etherInitRxDescRing for Rx queues).
+*
+* INPUT:
+*       void*   pEthPortHndl  - Ethernet port handler
+*
+* RETURN:   MV_STATUS
+*           MV_OK - Success, Others - Failure.
+*
+* NOTE : used for port link up.
+*******************************************************************************/
+MV_STATUS   mvEthPortUp(void* pEthPortHndl)
+{
+    int             ethPortNo;
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pEthPortHndl;
+
+    ethPortNo = pPortCtrl->portNo;
+    
+    if( (pPortCtrl->portState != MV_ACTIVE) && 
+        (pPortCtrl->portState != MV_PAUSED) )
+    {
+        mvOsPrintf("ethDrv port%d: Unexpected port state %d\n", 
+                        ethPortNo, pPortCtrl->portState);
+        return MV_BAD_STATE;
+    }
+    
+    ethPortNo = pPortCtrl->portNo;
+
+    /* Enable port RX. */
+    MV_REG_WRITE(ETH_RX_QUEUE_COMMAND_REG(ethPortNo), pPortCtrl->portRxQueueCmdReg);
+
+    /* Enable port TX. */
+    MV_REG_VALUE(ETH_TX_QUEUE_COMMAND_REG(ethPortNo)) = pPortCtrl->portTxQueueCmdReg;
+
+    pPortCtrl->portState = MV_ACTIVE;
+
+    return MV_OK;
+}
+
+/*******************************************************************************
+* ethPortDown - Stop the Ethernet port activity.
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       void*   pEthPortHndl  - Ethernet port handler
+*
+* RETURN:   MV_STATUS
+*               MV_OK - Success, Others - Failure.
+*
+* NOTE : used for port link down.
+*******************************************************************************/
+MV_STATUS   mvEthPortDown(void* pEthPortHndl)
+{
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pEthPortHndl;
+    int             ethPortNum = pPortCtrl->portNo;
+    unsigned int    regData;
+    volatile int    uDelay, mDelay;
+
+    /* Stop Rx port activity. Check port Rx activity. */
+    regData = (MV_REG_READ(ETH_RX_QUEUE_COMMAND_REG(ethPortNum))) & ETH_RXQ_ENABLE_MASK;
+    if(regData != 0)
+    {
+        /* Issue stop command for active channels only */
+        MV_REG_WRITE(ETH_RX_QUEUE_COMMAND_REG(ethPortNum), (regData << ETH_RXQ_DISABLE_OFFSET));
+    }
+
+    /* Stop Tx port activity. Check port Tx activity. */
+    regData = (MV_REG_READ(ETH_TX_QUEUE_COMMAND_REG(ethPortNum))) & ETH_TXQ_ENABLE_MASK;
+    if(regData != 0)
+    {
+        /* Issue stop command for active channels only */
+        MV_REG_WRITE(ETH_TX_QUEUE_COMMAND_REG(ethPortNum), 
+                            (regData << ETH_TXQ_DISABLE_OFFSET) ); 
+    }
+
+    /* Force link down */
+/*
+    regData = MV_REG_READ(ETH_PORT_SERIAL_CTRL_REG(ethPortNum));
+    regData &= ~(ETH_DO_NOT_FORCE_LINK_FAIL_MASK);
+    MV_REG_WRITE(ETH_PORT_SERIAL_CTRL_REG(ethPortNum), regData);
+*/
+    /* Wait for all Rx activity to terminate. */
+    mDelay = 0;
+    do
+    {
+        if(mDelay >= RX_DISABLE_TIMEOUT_MSEC)
+        {
+            mvOsPrintf("ethPort_%d: TIMEOUT for RX stopped !!! rxQueueCmd - 0x08%x\n", 
+                        ethPortNum, regData);
+            break;
+        }
+        mvOsDelay(1);
+        mDelay++;
+        
+        /* Check port RX Command register that all Rx queues are stopped */
+        regData = MV_REG_READ(ETH_RX_QUEUE_COMMAND_REG(ethPortNum));
+    }
+    while(regData & 0xFF);
+
+    /* Wait for all Tx activity to terminate. */
+    mDelay = 0;
+    do
+    {
+        if(mDelay >= TX_DISABLE_TIMEOUT_MSEC)
+        {
+            mvOsPrintf("ethPort_%d: TIMEOUT for TX stoped !!! txQueueCmd - 0x08%x\n", 
+                        ethPortNum, regData);
+            break;
+        }
+        mvOsDelay(1);
+        mDelay++;
+
+        /* Check port TX Command register that all Tx queues are stopped */
+        regData = MV_REG_READ(ETH_TX_QUEUE_COMMAND_REG(ethPortNum));
+    }
+    while(regData & 0xFF);
+    
+    /* Double check to Verify that TX FIFO is Empty */
+    mDelay = 0;
+    while(MV_TRUE)
+    {
+        do
+        {
+            if(mDelay >= TX_FIFO_EMPTY_TIMEOUT_MSEC)
+            {
+                mvOsPrintf("\n ethPort_%d: TIMEOUT for TX FIFO empty !!! portStatus - 0x08%x\n", 
+                            ethPortNum, regData);
+                break;
+            }
+            mvOsDelay(1);
+            mDelay++;
+
+            regData = MV_REG_READ(ETH_PORT_STATUS_REG(ethPortNum));
+        }
+        while( ((regData & ETH_TX_FIFO_EMPTY_MASK) == 0) || 
+               ((regData & ETH_TX_IN_PROGRESS_MASK) != 0) );
+
+        if(mDelay >= TX_FIFO_EMPTY_TIMEOUT_MSEC)
+            break;
+
+        /* Double check */
+        regData = MV_REG_READ(ETH_PORT_STATUS_REG(ethPortNum));
+        if( ((regData & ETH_TX_FIFO_EMPTY_MASK) != 0) && 
+            ((regData & ETH_TX_IN_PROGRESS_MASK) == 0) )
+        {
+            break;
+        }
+        else
+            mvOsPrintf("ethPort_%d: TX FIFO Empty double check failed. %d msec, portStatus=0x%x\n",
+                                ethPortNum, mDelay, regData);     
+    }
+
+    /* Do NOT force link down */
+/*
+    regData = MV_REG_READ(ETH_PORT_SERIAL_CTRL_REG(ethPortNum));
+    regData |= (ETH_DO_NOT_FORCE_LINK_FAIL_MASK);
+    MV_REG_WRITE(ETH_PORT_SERIAL_CTRL_REG(ethPortNum), regData);
+*/
+    /* Wait about 2500 tclk cycles */
+    uDelay = (PORT_DISABLE_WAIT_TCLOCKS/(ethHalData.tclk/1000000));
+    mvOsUDelay(uDelay);
+
+    pPortCtrl->portState = MV_PAUSED;
+
+    return MV_OK;   
+}
+
+
+/*******************************************************************************
+* ethPortEnable - Enable the Ethernet port and Start RX and TX.
+*
+* DESCRIPTION:
+*       This routine enable the Ethernet port and Rx and Tx activity:
+*
+*       Note: Each Rx and Tx queue descriptor's list must be initialized prior
+*       to calling this function (use etherInitTxDescRing for Tx queues and
+*       etherInitRxDescRing for Rx queues).
+*
+* INPUT:
+*       void*   pEthPortHndl  - Ethernet port handler
+*
+* RETURN:   MV_STATUS
+*               MV_OK - Success, Others - Failure.
+*
+* NOTE: main usage is to enable the port after ifconfig up.
+*******************************************************************************/
+MV_STATUS   mvEthPortEnable(void* pEthPortHndl)
+{
+    int             ethPortNo;
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pEthPortHndl;
+    MV_U32      portSerialCtrlReg;
+
+    ethPortNo = pPortCtrl->portNo;
+
+    /* Enable port */
+    portSerialCtrlReg = MV_REG_READ(ETH_PORT_SERIAL_CTRL_REG(ethPortNo));
+    portSerialCtrlReg |= (ETH_DO_NOT_FORCE_LINK_FAIL_MASK | ETH_PORT_ENABLE_MASK);
+
+    MV_REG_WRITE(ETH_PORT_SERIAL_CTRL_REG(ethPortNo), portSerialCtrlReg);
+
+    mvEthMibCountersClear(pEthPortHndl);
+
+    pPortCtrl->portState = MV_PAUSED;
+
+    /* If Link is UP, Start RX and TX traffic */
+    if( MV_REG_READ( ETH_PORT_STATUS_REG(ethPortNo) ) & ETH_LINK_UP_MASK)
+        return( mvEthPortUp(pEthPortHndl) );
+    
+    return MV_NOT_READY;
+}
+
+
+/*******************************************************************************
+* mvEthPortDisable - Stop RX and TX activities and Disable the Ethernet port.
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       void*   pEthPortHndl  - Ethernet port handler
+*
+* RETURN:   MV_STATUS
+*               MV_OK - Success, Others - Failure.
+*
+* NOTE: main usage is to disable the port after ifconfig down.
+*******************************************************************************/
+MV_STATUS   mvEthPortDisable(void* pEthPortHndl)
+{
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pEthPortHndl;
+    int             ethPortNum = pPortCtrl->portNo;
+    unsigned int    regData;
+    volatile int    mvDelay;
+
+    if(pPortCtrl->portState == MV_ACTIVE)           
+    {    
+        /* Stop RX and TX activities */
+        mvEthPortDown(pEthPortHndl);
+    }
+
+    /* Reset the Enable bit in the Serial Control Register */
+    regData = MV_REG_READ(ETH_PORT_SERIAL_CTRL_REG(ethPortNum));
+    regData &= ~(ETH_PORT_ENABLE_MASK);
+    MV_REG_WRITE(ETH_PORT_SERIAL_CTRL_REG(ethPortNum), regData);
+
+    /* Wait about 2500 tclk cycles */
+    mvDelay = (PORT_DISABLE_WAIT_TCLOCKS*(ethHalData.cpuPclk/ethHalData.tclk));
+    for(mvDelay; mvDelay>0; mvDelay--);
+
+    pPortCtrl->portState = MV_IDLE;
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvEthPortForceTxDone - Get next buffer from TX queue in spite of buffer ownership.
+*
+* DESCRIPTION:
+*       This routine used to free buffers attached to the Tx ring and should
+*       be called only when Giga Ethernet port is Down
+*
+* INPUT:
+*       void*       pEthPortHndl    - Ethernet Port handler.
+*       int         txQueue         - Number of TX queue.
+*
+* OUTPUT:
+*       MV_PKT_INFO *pPktInfo       - Pointer to packet was sent.
+*
+* RETURN:
+*       MV_EMPTY    - There is no more buffers in this queue.
+*       MV_OK       - Buffer detached from the queue and pPktInfo structure 
+*                   filled with relevant information.
+*
+*******************************************************************************/
+MV_PKT_INFO*    mvEthPortForceTxDone(void* pEthPortHndl, int txQueue)
+{
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pEthPortHndl;
+    ETH_QUEUE_CTRL* pQueueCtrl;
+    MV_PKT_INFO*    pPktInfo;
+    ETH_TX_DESC*    pTxDesc;
+    int             port = pPortCtrl->portNo;
+
+    pQueueCtrl = &pPortCtrl->txQueue[txQueue];
+
+    while( (pQueueCtrl->pUsedDescr != pQueueCtrl->pCurrentDescr) ||
+           (pQueueCtrl->resource == 0) )
+    {
+        /* Free next descriptor */
+        pQueueCtrl->resource++;
+        pTxDesc = (ETH_TX_DESC*)pQueueCtrl->pUsedDescr;
+
+	/* pPktInfo is available only in descriptors which are last descriptors */
+        pPktInfo = (MV_PKT_INFO*)pTxDesc->returnInfo;
+	if (pPktInfo)
+        	pPktInfo->status = pTxDesc->cmdSts;
+
+        pTxDesc->cmdSts = 0x0;
+        pTxDesc->returnInfo = 0x0;
+        ETH_DESCR_FLUSH_INV(pPortCtrl, pTxDesc);
+
+        pQueueCtrl->pUsedDescr = TX_NEXT_DESC_PTR(pTxDesc, pQueueCtrl);
+
+        if (pPktInfo)
+		if (pPktInfo->status  & ETH_TX_LAST_DESC_MASK) 
+            		return pPktInfo;
+    }   
+    MV_REG_WRITE( ETH_TX_CUR_DESC_PTR_REG(port, txQueue), 
+                    (MV_U32)ethDescVirtToPhy(pQueueCtrl, pQueueCtrl->pCurrentDescr) );
+    return NULL;
+}
+
+        
+
+/*******************************************************************************
+* mvEthPortForceRx - Get next buffer from RX queue in spite of buffer ownership.
+*
+* DESCRIPTION:
+*       This routine used to free buffers attached to the Rx ring and should
+*       be called only when Giga Ethernet port is Down
+*
+* INPUT:
+*       void*       pEthPortHndl    - Ethernet Port handler.
+*       int         rxQueue         - Number of Rx queue.
+*
+* OUTPUT:
+*       MV_PKT_INFO *pPktInfo       - Pointer to received packet.
+*
+* RETURN:
+*       MV_EMPTY    - There is no more buffers in this queue.
+*       MV_OK       - Buffer detached from the queue and pBufInfo structure 
+*                   filled with relevant information.
+*
+*******************************************************************************/
+MV_PKT_INFO*    mvEthPortForceRx(void* pEthPortHndl, int rxQueue)
+{
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pEthPortHndl;
+    ETH_QUEUE_CTRL* pQueueCtrl;
+    ETH_RX_DESC*    pRxDesc;
+    MV_PKT_INFO*    pPktInfo;
+    int             port = pPortCtrl->portNo;
+       
+    pQueueCtrl = &pPortCtrl->rxQueue[rxQueue];
+
+    if(pQueueCtrl->resource == 0)
+    {
+        MV_REG_WRITE( ETH_RX_CUR_DESC_PTR_REG(port, rxQueue), 
+                    (MV_U32)ethDescVirtToPhy(pQueueCtrl, pQueueCtrl->pCurrentDescr) );
+
+        return NULL;
+    }
+    /* Free next descriptor */
+    pQueueCtrl->resource--;
+    pRxDesc = (ETH_RX_DESC*)pQueueCtrl->pCurrentDescr;
+    pPktInfo = (MV_PKT_INFO*)pRxDesc->returnInfo;
+
+    pPktInfo->status  = pRxDesc->cmdSts;
+    pRxDesc->cmdSts = 0x0;
+    pRxDesc->returnInfo = 0x0;
+    ETH_DESCR_FLUSH_INV(pPortCtrl, pRxDesc);
+
+    pQueueCtrl->pCurrentDescr = RX_NEXT_DESC_PTR(pRxDesc, pQueueCtrl);
+    return pPktInfo;    
+}
+
+
+/******************************************************************************/
+/*                          Port Configuration functions                      */
+/******************************************************************************/
+/*******************************************************************************
+* mvEthMruGet - Get MRU configuration for Max Rx packet size.
+*
+* INPUT:
+*           MV_U32 maxRxPktSize - max  packet size.
+*
+* RETURN:   MV_U32 - MRU configuration.
+*
+*******************************************************************************/
+static MV_U32 mvEthMruGet(MV_U32 maxRxPktSize)
+{
+    MV_U32 portSerialCtrlReg = 0;
+
+    if(maxRxPktSize > 9192)
+        portSerialCtrlReg |= ETH_MAX_RX_PACKET_9700BYTE;
+    else if(maxRxPktSize > 9022)
+        portSerialCtrlReg |= ETH_MAX_RX_PACKET_9192BYTE;
+    else if(maxRxPktSize > 1552)
+        portSerialCtrlReg |= ETH_MAX_RX_PACKET_9022BYTE;
+    else if(maxRxPktSize > 1522)
+        portSerialCtrlReg |= ETH_MAX_RX_PACKET_1552BYTE;
+    else if(maxRxPktSize > 1518)
+        portSerialCtrlReg |= ETH_MAX_RX_PACKET_1522BYTE;
+    else
+        portSerialCtrlReg |= ETH_MAX_RX_PACKET_1518BYTE;
+
+    return portSerialCtrlReg;
+}
+
+/*******************************************************************************
+* mvEthRxCoalSet  - Sets coalescing interrupt mechanism on RX path
+*
+* DESCRIPTION:
+*       This routine sets the RX coalescing interrupt mechanism parameter.
+*       This parameter is a timeout counter, that counts in 64 tClk
+*       chunks, that when timeout event occurs a maskable interrupt occurs.
+*       The parameter is calculated using the tCLK frequency of the
+*       MV-64xxx chip, and the required number is in micro seconds.
+*
+* INPUT:
+*       void*           pPortHndl   - Ethernet Port handler.
+*       MV_U32          uSec        - Number of micro seconds between 
+*                                   RX interrupts
+*
+* RETURN:
+*       None.
+*
+* COMMENT:     
+*   1 sec           - TCLK_RATE clocks
+*   1 uSec          - TCLK_RATE / 1,000,000 clocks
+*
+*   Register Value for N micro seconds -  ((N * ( (TCLK_RATE / 1,000,000)) / 64)
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_U32    mvEthRxCoalSet (void* pPortHndl, MV_U32 uSec) 
+{
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pPortHndl;
+    MV_U32          coal = ((uSec * (ethHalData.tclk / 1000000)) / 64);
+    MV_U32          portSdmaCfgReg;
+
+    portSdmaCfgReg =  MV_REG_READ(ETH_SDMA_CONFIG_REG(pPortCtrl->portNo));
+    portSdmaCfgReg &= ~ETH_RX_INTR_COAL_ALL_MASK;
+
+    portSdmaCfgReg |= ETH_RX_INTR_COAL_MASK(coal);
+
+#if (MV_ETH_VERSION >= 2)
+    /* Set additional bit if needed ETH_RX_INTR_COAL_MSB_BIT (25) */
+    if(ETH_RX_INTR_COAL_MASK(coal) > ETH_RX_INTR_COAL_ALL_MASK)
+        portSdmaCfgReg |= ETH_RX_INTR_COAL_MSB_MASK;
+#endif /* MV_ETH_VERSION >= 2 */
+
+    MV_REG_WRITE (ETH_SDMA_CONFIG_REG(pPortCtrl->portNo), portSdmaCfgReg);
+    return coal;
+}
+
+/*******************************************************************************
+* mvEthTxCoalSet - Sets coalescing interrupt mechanism on TX path
+*
+* DESCRIPTION:
+*       This routine sets the TX coalescing interrupt mechanism parameter.
+*       This parameter is a timeout counter, that counts in 64 tClk
+*       chunks, that when timeout event occurs a maskable interrupt
+*       occurs.
+*       The parameter is calculated using the tCLK frequency of the
+*       MV-64xxx chip, and the required number is in micro seconds.
+*
+* INPUT:
+*       void*           pPortHndl    - Ethernet Port handler.
+*       MV_U32          uSec        - Number of micro seconds between 
+*                                   RX interrupts
+*
+* RETURN:
+*       None.
+*
+* COMMENT:     
+*   1 sec           - TCLK_RATE clocks
+*   1 uSec          - TCLK_RATE / 1,000,000 clocks
+*
+*   Register Value for N micro seconds -  ((N * ( (TCLK_RATE / 1,000,000)) / 64)
+*
+*******************************************************************************/
+MV_U32    mvEthTxCoalSet(void* pPortHndl, MV_U32 uSec) 
+{
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pPortHndl;
+    MV_U32          coal = ((uSec * (ethHalData.tclk / 1000000)) / 64);
+    MV_U32          regVal;
+
+    regVal = MV_REG_READ(ETH_TX_FIFO_URGENT_THRESH_REG(pPortCtrl->portNo));
+    regVal &= ~ETH_TX_INTR_COAL_ALL_MASK;
+    regVal |= ETH_TX_INTR_COAL_MASK(coal);
+
+    /* Set TX Coalescing mechanism */
+    MV_REG_WRITE (ETH_TX_FIFO_URGENT_THRESH_REG(pPortCtrl->portNo), regVal); 
+    return coal;
+}
+
+/*******************************************************************************
+* mvEthCoalGet - Gets RX and TX coalescing values in micro seconds
+*
+* DESCRIPTION:
+*       This routine gets the RX and TX coalescing interrupt values.
+*       The parameter is calculated using the tCLK frequency of the
+*       MV-64xxx chip, and the returned numbers are in micro seconds.
+*
+* INPUTs:
+*       void*   pPortHndl   - Ethernet Port handler.
+*
+* OUTPUTs:
+*       MV_U32* pRxCoal     - Number of micro seconds between RX interrupts
+*       MV_U32* pTxCoal     - Number of micro seconds between TX interrupts
+*
+* RETURN:
+*       MV_STATUS   MV_OK  - success
+*                   Others - failure.
+*
+* COMMENT:     
+*   1 sec           - TCLK_RATE clocks
+*   1 uSec          - TCLK_RATE / 1,000,000 clocks
+*
+*   Register Value for N micro seconds -  ((N * ( (TCLK_RATE / 1,000,000)) / 64)
+*
+*******************************************************************************/
+MV_STATUS   mvEthCoalGet(void* pPortHndl, MV_U32* pRxCoal, MV_U32* pTxCoal)
+{
+    MV_U32  regVal, coal, usec;
+
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pPortHndl;
+
+    /* get TX Coalescing */
+    regVal = MV_REG_READ (ETH_TX_FIFO_URGENT_THRESH_REG(pPortCtrl->portNo));
+    coal = ((regVal & ETH_TX_INTR_COAL_ALL_MASK) >> ETH_TX_INTR_COAL_OFFSET);
+
+    usec = (coal * 64) / (ethHalData.tclk / 1000000);
+    if(pTxCoal != NULL)
+        *pTxCoal = usec;
+
+    /* Get RX Coalescing */
+    regVal =  MV_REG_READ(ETH_SDMA_CONFIG_REG(pPortCtrl->portNo));
+    coal = ((regVal & ETH_RX_INTR_COAL_ALL_MASK) >> ETH_RX_INTR_COAL_OFFSET);
+
+#if (MV_ETH_VERSION >= 2)
+    if(regVal & ETH_RX_INTR_COAL_MSB_MASK)
+    {
+        /* Add MSB */
+        coal |= (ETH_RX_INTR_COAL_ALL_MASK + 1);
+    }
+#endif /* MV_ETH_VERSION >= 2 */
+
+    usec = (coal * 64) / (ethHalData.tclk / 1000000);
+    if(pRxCoal != NULL)
+        *pRxCoal = usec;
+
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvEthMaxRxSizeSet - 
+*
+* DESCRIPTION:
+*       Change maximum receive size of the port. This configuration will take place 
+*       after next call of ethPortSetDefaults() function.
+*
+* INPUT:
+*
+* RETURN:
+*******************************************************************************/
+MV_STATUS   mvEthMaxRxSizeSet(void* pPortHndl, int maxRxSize)
+{
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pPortHndl;
+    MV_U32      portSerialCtrlReg;
+
+    if((maxRxSize < 1518) || (maxRxSize & ~ETH_RX_BUFFER_MASK))
+       return MV_BAD_PARAM;
+    
+    pPortCtrl->portConfig.maxRxPktSize = maxRxSize;
+
+    portSerialCtrlReg =  MV_REG_READ(ETH_PORT_SERIAL_CTRL_REG(pPortCtrl->portNo));
+    portSerialCtrlReg &= ~ETH_MAX_RX_PACKET_SIZE_MASK;
+    portSerialCtrlReg |= mvEthMruGet(pPortCtrl->portConfig.maxRxPktSize);
+    MV_REG_WRITE(ETH_PORT_SERIAL_CTRL_REG(pPortCtrl->portNo), portSerialCtrlReg);
+
+    return MV_OK;
+}
+
+
+/******************************************************************************/
+/*                      MAC Filtering functions                               */
+/******************************************************************************/
+
+/*******************************************************************************
+* mvEthRxFilterModeSet - Configure Fitering mode of Ethernet port
+*
+* DESCRIPTION:
+*       This routine used to free buffers attached to the Rx ring and should
+*       be called only when Giga Ethernet port is Down
+*
+* INPUT:
+*       void*       pEthPortHndl    - Ethernet Port handler.
+*       MV_BOOL     isPromisc       - Promiscous mode
+*                                   MV_TRUE  - accept all Broadcast, Multicast 
+*                                              and Unicast packets
+*                                   MV_FALSE - accept all Broadcast, 
+*                                              specially added Multicast and
+*                                              single Unicast packets
+*
+* RETURN:   MV_STATUS   MV_OK - Success, Other - Failure
+*
+*******************************************************************************/
+MV_STATUS   mvEthRxFilterModeSet(void* pEthPortHndl, MV_BOOL isPromisc)
+{
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pEthPortHndl;
+    int             queue;
+    MV_U32      portCfgReg;
+
+    portCfgReg = MV_REG_READ(ETH_PORT_CONFIG_REG(pPortCtrl->portNo));
+    /* Set / Clear UPM bit in port configuration register */
+    if(isPromisc)
+    {
+        /* Accept all multicast packets to RX default queue */
+        queue = pPortCtrl->portConfig.rxDefQ;
+        portCfgReg |= ETH_UNICAST_PROMISCUOUS_MODE_MASK;
+        memset(pPortCtrl->mcastCount, 1, sizeof(pPortCtrl->mcastCount));
+        MV_REG_WRITE(ETH_MAC_ADDR_LOW_REG(pPortCtrl->portNo),0xFFFF);
+        MV_REG_WRITE(ETH_MAC_ADDR_HIGH_REG(pPortCtrl->portNo),0xFFFFFFFF);
+    }
+    else
+    {
+        /* Reject all Multicast addresses */
+        queue = -1;
+        portCfgReg &= ~ETH_UNICAST_PROMISCUOUS_MODE_MASK;
+        /* Clear all mcastCount */
+        memset(pPortCtrl->mcastCount, 0, sizeof(pPortCtrl->mcastCount));
+    }
+    MV_REG_WRITE(ETH_PORT_CONFIG_REG(pPortCtrl->portNo), portCfgReg);        
+
+    /* Set Special Multicast and Other Multicast tables */
+    mvEthSetSpecialMcastTable(pPortCtrl->portNo, queue);
+    mvEthSetOtherMcastTable(pPortCtrl->portNo, queue);
+    ethSetUcastTable(pPortCtrl->portNo, queue);
+
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvEthMacAddrSet - This function Set the port Unicast address.
+*
+* DESCRIPTION:
+*       This function Set the port Ethernet MAC address. This address
+*       will be used to send Pause frames if enabled. Packets with this
+*       address will be accepted and dispatched to default RX queue
+*
+* INPUT:
+*       void*   pEthPortHndl    - Ethernet port handler.
+*       char*   pAddr           - Address to be set
+*
+* RETURN:   MV_STATUS
+*               MV_OK - Success,  Other - Faulure
+*
+*******************************************************************************/
+MV_STATUS   mvEthMacAddrSet(void* pPortHndl, unsigned char *pAddr, int queue)
+{
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pPortHndl;
+    unsigned int    macH;
+    unsigned int    macL;
+
+    if(queue >= MV_ETH_RX_Q_NUM)
+    {
+        mvOsPrintf("ethDrv: RX queue #%d is out of range\n", queue);
+        return MV_BAD_PARAM;
+    }
+
+    if(queue != -1)
+    {
+        macL =  (pAddr[4] << 8) | (pAddr[5]);
+        macH =  (pAddr[0] << 24)| (pAddr[1] << 16) |
+                (pAddr[2] << 8) | (pAddr[3] << 0);
+
+        MV_REG_WRITE(ETH_MAC_ADDR_LOW_REG(pPortCtrl->portNo),  macL);
+        MV_REG_WRITE(ETH_MAC_ADDR_HIGH_REG(pPortCtrl->portNo), macH);
+    }
+
+    /* Accept frames of this address */
+    ethSetUcastAddr(pPortCtrl->portNo, pAddr[5], queue);
+
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvEthMacAddrGet - This function returns the port Unicast address.
+*
+* DESCRIPTION:
+*       This function returns the port Ethernet MAC address.
+*
+* INPUT:
+*       int     portNo          - Ethernet port number.
+*       char*   pAddr           - Pointer where address will be written to
+*
+* RETURN:   MV_STATUS
+*               MV_OK - Success,  Other - Faulure
+*
+*******************************************************************************/
+MV_STATUS   mvEthMacAddrGet(int portNo, unsigned char *pAddr)
+{
+    unsigned int    macH;
+    unsigned int    macL;
+
+    if(pAddr == NULL)
+    {
+        mvOsPrintf("mvEthMacAddrGet: NULL pointer.\n");
+        return MV_BAD_PARAM;
+    }
+
+    macH = MV_REG_READ(ETH_MAC_ADDR_HIGH_REG(portNo));
+    macL = MV_REG_READ(ETH_MAC_ADDR_LOW_REG(portNo));
+    pAddr[0] = (macH >> 24) & 0xff;
+    pAddr[1] = (macH >> 16) & 0xff;
+    pAddr[2] = (macH >> 8) & 0xff;
+    pAddr[3] = macH  & 0xff;
+    pAddr[4] = (macL >> 8) & 0xff;
+    pAddr[5] = macL  & 0xff;
+
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvEthMcastCrc8Get - Calculate CRC8 of MAC address.
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       MV_U8*  pAddr           - Address to calculate CRC-8
+*
+* RETURN: MV_U8 - CRC-8 of this MAC address
+*
+*******************************************************************************/
+MV_U8   mvEthMcastCrc8Get(MV_U8* pAddr)
+{
+    unsigned int    macH;
+    unsigned int    macL;
+    int             macArray[48];
+    int             crc[8];
+    int             i;
+    unsigned char   crcResult = 0;
+
+        /* Calculate CRC-8 out of the given address */
+    macH =  (pAddr[0] << 8) | (pAddr[1]);
+    macL =  (pAddr[2] << 24)| (pAddr[3] << 16) |
+            (pAddr[4] << 8) | (pAddr[5] << 0);
+
+    for(i=0; i<32; i++)
+        macArray[i] = (macL >> i) & 0x1;
+
+    for(i=32; i<48; i++)
+        macArray[i] = (macH >> (i - 32)) & 0x1;
+
+    crc[0] = macArray[45] ^ macArray[43] ^ macArray[40] ^ macArray[39] ^
+             macArray[35] ^ macArray[34] ^ macArray[31] ^ macArray[30] ^
+             macArray[28] ^ macArray[23] ^ macArray[21] ^ macArray[19] ^
+             macArray[18] ^ macArray[16] ^ macArray[14] ^ macArray[12] ^
+             macArray[8]  ^ macArray[7]  ^ macArray[6]  ^ macArray[0];
+
+    crc[1] = macArray[46] ^ macArray[45] ^ macArray[44] ^ macArray[43] ^
+             macArray[41] ^ macArray[39] ^ macArray[36] ^ macArray[34] ^
+             macArray[32] ^ macArray[30] ^ macArray[29] ^ macArray[28] ^
+             macArray[24] ^ macArray[23] ^ macArray[22] ^ macArray[21] ^
+             macArray[20] ^ macArray[18] ^ macArray[17] ^ macArray[16] ^
+             macArray[15] ^ macArray[14] ^ macArray[13] ^ macArray[12] ^
+             macArray[9]  ^ macArray[6]  ^ macArray[1]  ^ macArray[0];
+
+    crc[2] = macArray[47] ^ macArray[46] ^ macArray[44] ^ macArray[43] ^
+             macArray[42] ^ macArray[39] ^ macArray[37] ^ macArray[34] ^
+             macArray[33] ^ macArray[29] ^ macArray[28] ^ macArray[25] ^
+             macArray[24] ^ macArray[22] ^ macArray[17] ^ macArray[15] ^
+             macArray[13] ^ macArray[12] ^ macArray[10] ^ macArray[8]  ^
+             macArray[6]  ^ macArray[2]  ^ macArray[1]  ^ macArray[0];
+
+    crc[3] = macArray[47] ^ macArray[45] ^ macArray[44] ^ macArray[43] ^
+             macArray[40] ^ macArray[38] ^ macArray[35] ^ macArray[34] ^
+             macArray[30] ^ macArray[29] ^ macArray[26] ^ macArray[25] ^
+             macArray[23] ^ macArray[18] ^ macArray[16] ^ macArray[14] ^
+             macArray[13] ^ macArray[11] ^ macArray[9]  ^ macArray[7]  ^
+             macArray[3]  ^ macArray[2]  ^ macArray[1];
+
+    crc[4] = macArray[46] ^ macArray[45] ^ macArray[44] ^ macArray[41] ^
+             macArray[39] ^ macArray[36] ^ macArray[35] ^ macArray[31] ^
+             macArray[30] ^ macArray[27] ^ macArray[26] ^ macArray[24] ^
+             macArray[19] ^ macArray[17] ^ macArray[15] ^ macArray[14] ^
+             macArray[12] ^ macArray[10] ^ macArray[8]  ^ macArray[4]  ^
+             macArray[3]  ^ macArray[2];
+
+    crc[5] = macArray[47] ^ macArray[46] ^ macArray[45] ^ macArray[42] ^
+             macArray[40] ^ macArray[37] ^ macArray[36] ^ macArray[32] ^
+             macArray[31] ^ macArray[28] ^ macArray[27] ^ macArray[25] ^
+             macArray[20] ^ macArray[18] ^ macArray[16] ^ macArray[15] ^
+             macArray[13] ^ macArray[11] ^ macArray[9]  ^ macArray[5]  ^
+             macArray[4]  ^ macArray[3];
+
+    crc[6] = macArray[47] ^ macArray[46] ^ macArray[43] ^ macArray[41] ^
+             macArray[38] ^ macArray[37] ^ macArray[33] ^ macArray[32] ^
+             macArray[29] ^ macArray[28] ^ macArray[26] ^ macArray[21] ^
+             macArray[19] ^ macArray[17] ^ macArray[16] ^ macArray[14] ^
+             macArray[12] ^ macArray[10] ^ macArray[6]  ^ macArray[5]  ^
+             macArray[4];
+
+    crc[7] = macArray[47] ^ macArray[44] ^ macArray[42] ^ macArray[39] ^
+             macArray[38] ^ macArray[34] ^ macArray[33] ^ macArray[30] ^
+             macArray[29] ^ macArray[27] ^ macArray[22] ^ macArray[20] ^
+             macArray[18] ^ macArray[17] ^ macArray[15] ^ macArray[13] ^
+             macArray[11] ^ macArray[7]  ^ macArray[6]  ^ macArray[5];
+
+    for(i=0; i<8; i++)
+        crcResult = crcResult | (crc[i] << i);
+
+    return crcResult;
+}
+/*******************************************************************************
+* mvEthMcastAddrSet - Multicast address settings.
+*
+* DESCRIPTION:
+*       This API controls the MV device MAC multicast support.
+*       The MV device supports multicast using two tables:
+*       1) Special Multicast Table for MAC addresses of the form
+*          0x01-00-5E-00-00-XX (where XX is between 0x00 and 0xFF).
+*          The MAC DA[7:0] bits are used as a pointer to the Special Multicast
+*          Table entries in the DA-Filter table.
+*          In this case, the function calls ethPortSmcAddr() routine to set the
+*          Special Multicast Table.
+*       2) Other Multicast Table for multicast of another type. A CRC-8bit
+*          is used as an index to the Other Multicast Table entries in the
+*          DA-Filter table.
+*          In this case, the function calculates the CRC-8bit value and calls
+*          ethPortOmcAddr() routine to set the Other Multicast Table.
+*
+* INPUT:
+*       void*   pEthPortHndl    - Ethernet port handler.
+*       MV_U8*  pAddr           - Address to be set
+*       int     queue           - RX queue to capture all packets with this 
+*                               Multicast MAC address.
+*                               -1 means delete this Multicast address.
+*
+* RETURN: MV_STATUS
+*       MV_TRUE - Success, Other - Failure
+*
+*******************************************************************************/
+MV_STATUS   mvEthMcastAddrSet(void* pPortHndl, MV_U8 *pAddr, int queue)
+{
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pPortHndl;
+    unsigned char   crcResult = 0;
+
+    if(queue >= MV_ETH_RX_Q_NUM)
+    {
+        mvOsPrintf("ethPort %d: RX queue #%d is out of range\n", 
+                    pPortCtrl->portNo, queue);
+        return MV_BAD_PARAM;
+    }
+
+    if((pAddr[0] == 0x01) &&
+       (pAddr[1] == 0x00) &&
+       (pAddr[2] == 0x5E) &&
+       (pAddr[3] == 0x00) &&
+       (pAddr[4] == 0x00))
+    {
+        ethSetSpecialMcastAddr(pPortCtrl->portNo, pAddr[5], queue);
+    }
+    else
+    {
+        crcResult = mvEthMcastCrc8Get(pAddr);
+
+        /* Check Add counter for this CRC value */
+        if(queue == -1)
+        {
+            if(pPortCtrl->mcastCount[crcResult] == 0)
+            {
+                mvOsPrintf("ethPort #%d: No valid Mcast for crc8=0x%02x\n",
+                            pPortCtrl->portNo, (unsigned)crcResult);
+                return MV_NO_SUCH;
+            }
+
+            pPortCtrl->mcastCount[crcResult]--;
+            if(pPortCtrl->mcastCount[crcResult] != 0)
+            {
+                mvOsPrintf("ethPort #%d: After delete there are %d valid Mcast for crc8=0x%02x\n",
+                            pPortCtrl->portNo, pPortCtrl->mcastCount[crcResult],
+                            (unsigned)crcResult);
+                return MV_NO_CHANGE;
+            }
+        }
+        else
+        {
+            pPortCtrl->mcastCount[crcResult]++;
+            if(pPortCtrl->mcastCount[crcResult] > 1)
+            {
+                mvOsPrintf("ethPort #%d: Valid Mcast for crc8=0x%02x already exists\n",
+                                pPortCtrl->portNo, (unsigned)crcResult);
+                return MV_NO_CHANGE;
+            }
+        }
+        ethSetOtherMcastAddr(pPortCtrl->portNo, crcResult, queue);
+    }
+    return MV_OK;
+}
+
+/*******************************************************************************
+* ethSetUcastTable - Unicast address settings.
+*
+* DESCRIPTION:
+*      Set all entries in the Unicast MAC Table queue==-1 means reject all 
+* INPUT:
+*
+* RETURN: 
+*
+*******************************************************************************/
+static void    ethSetUcastTable(int portNo, int queue)
+{
+    int     offset;
+    MV_U32  regValue;
+
+    if(queue == -1)
+    {
+        regValue = 0;
+    }
+    else
+    {
+        regValue = (((0x01 | (queue<<1)) << 0)  |
+                    ((0x01 | (queue<<1)) << 8)  |
+                    ((0x01 | (queue<<1)) << 16) |
+                    ((0x01 | (queue<<1)) << 24));
+    }
+
+    for (offset=0; offset<=0xC; offset+=4)
+        MV_REG_WRITE((ETH_DA_FILTER_UCAST_BASE(portNo) + offset), regValue);
+}
+
+/*******************************************************************************
+* mvEthSetSpecialMcastTable - Special Multicast address settings.
+*
+* DESCRIPTION:
+*   Set all entries to the Special Multicast MAC Table. queue==-1 means reject all
+* INPUT:
+*
+* RETURN: 
+*
+*******************************************************************************/
+MV_VOID    mvEthSetSpecialMcastTable(int portNo, int queue)
+{
+    int     offset;
+    MV_U32  regValue;
+
+    if(queue == -1)
+    {
+        regValue = 0;
+    }
+    else
+    {
+        regValue = (((0x01 | (queue<<1)) << 0)  |
+                    ((0x01 | (queue<<1)) << 8)  |
+                    ((0x01 | (queue<<1)) << 16) |
+                    ((0x01 | (queue<<1)) << 24));
+    }
+
+    for (offset=0; offset<=0xFC; offset+=4)
+    {
+        MV_REG_WRITE((ETH_DA_FILTER_SPEC_MCAST_BASE(portNo) + 
+                      offset), regValue);
+    }
+}
+
+/*******************************************************************************
+* mvEthSetOtherMcastTable - Other Multicast address settings.
+*
+* DESCRIPTION:
+*   Set all entries to the Other Multicast MAC Table. queue==-1 means reject all
+* INPUT:
+*
+* RETURN: 
+*
+*******************************************************************************/
+MV_VOID    mvEthSetOtherMcastTable(int portNo, int queue)
+{
+    int     offset;
+    MV_U32  regValue;
+
+    if(queue == -1)
+    {
+        regValue = 0;
+    }
+    else
+    {
+        regValue = (((0x01 | (queue<<1)) << 0)  |
+                    ((0x01 | (queue<<1)) << 8)  |
+                    ((0x01 | (queue<<1)) << 16) |
+                    ((0x01 | (queue<<1)) << 24));
+    }
+
+    for (offset=0; offset<=0xFC; offset+=4)
+    {
+        MV_REG_WRITE((ETH_DA_FILTER_OTH_MCAST_BASE(portNo) + 
+                      offset), regValue);
+    }
+}
+
+/*******************************************************************************
+* ethSetUcastAddr - This function Set the port unicast address table
+*
+* DESCRIPTION:
+*       This function locates the proper entry in the Unicast table for the
+*       specified MAC nibble and sets its properties according to function
+*       parameters.
+*
+* INPUT:
+*       int     ethPortNum  - Port number.
+*       MV_U8   lastNibble  - Unicast MAC Address last nibble.
+*       int     queue       - Rx queue number for this MAC address.
+*                           value "-1" means remove address
+*
+* OUTPUT:
+*       This function add/removes MAC addresses from the port unicast address
+*       table.
+*
+* RETURN:
+*       MV_TRUE is output succeeded.
+*       MV_FALSE if option parameter is invalid.
+*
+*******************************************************************************/
+static MV_BOOL ethSetUcastAddr(int portNo, MV_U8 lastNibble, int queue)
+{
+    unsigned int unicastReg;
+    unsigned int tblOffset;
+    unsigned int regOffset;
+
+    /* Locate the Unicast table entry */
+    lastNibble  = (0xf & lastNibble);
+    tblOffset = (lastNibble / 4) * 4; /* Register offset from unicast table base*/
+    regOffset = lastNibble % 4;     /* Entry offset within the above register */
+
+
+    unicastReg = MV_REG_READ( (ETH_DA_FILTER_UCAST_BASE(portNo) + 
+                               tblOffset));
+                 
+
+    if(queue == -1)
+    {
+        /* Clear accepts frame bit at specified unicast DA table entry */
+        unicastReg &= ~(0xFF << (8*regOffset));
+    }
+    else
+    {
+        unicastReg &= ~(0xFF << (8*regOffset));
+        unicastReg |= ((0x01 | (queue<<1)) << (8*regOffset));
+    }
+    MV_REG_WRITE( (ETH_DA_FILTER_UCAST_BASE(portNo) + tblOffset),
+                  unicastReg);
+
+    return MV_TRUE;
+}
+
+/*******************************************************************************
+* ethSetSpecialMcastAddr - Special Multicast address settings.
+*
+* DESCRIPTION:
+*       This routine controls the MV device special MAC multicast support.
+*       The Special Multicast Table for MAC addresses supports MAC of the form
+*       0x01-00-5E-00-00-XX (where XX is between 0x00 and 0xFF).
+*       The MAC DA[7:0] bits are used as a pointer to the Special Multicast
+*       Table entries in the DA-Filter table.
+*       This function set the Special Multicast Table appropriate entry
+*       according to the argument given.
+*
+* INPUT:
+*       int     ethPortNum      Port number.
+*       unsigned char   mcByte      Multicast addr last byte (MAC DA[7:0] bits).
+*       int          queue      Rx queue number for this MAC address.
+*       int             option      0 = Add, 1 = remove address.
+*
+* OUTPUT:
+*       See description.
+*
+* RETURN:
+*       MV_TRUE is output succeeded.
+*       MV_FALSE if option parameter is invalid.
+*
+*******************************************************************************/
+static MV_BOOL ethSetSpecialMcastAddr(int ethPortNum, MV_U8 lastByte, int queue)
+{
+    unsigned int smcTableReg;
+    unsigned int tblOffset;
+    unsigned int regOffset;
+
+    /* Locate the SMC table entry */
+    tblOffset = (lastByte / 4);     /* Register offset from SMC table base    */
+    regOffset = lastByte % 4;       /* Entry offset within the above register */
+
+    smcTableReg = MV_REG_READ((ETH_DA_FILTER_SPEC_MCAST_BASE(ethPortNum) + tblOffset*4));
+    
+    if(queue == -1)
+    {
+        /* Clear accepts frame bit at specified Special DA table entry */
+        smcTableReg &= ~(0xFF << (8 * regOffset));
+    }
+    else
+    {
+        smcTableReg &= ~(0xFF << (8 * regOffset));
+        smcTableReg |= ((0x01 | (queue<<1)) << (8 * regOffset));
+    }
+    MV_REG_WRITE((ETH_DA_FILTER_SPEC_MCAST_BASE(ethPortNum) + 
+                  tblOffset*4), smcTableReg);
+
+    return MV_TRUE;
+}
+
+/*******************************************************************************
+* ethSetOtherMcastAddr - Multicast address settings.
+*
+* DESCRIPTION:
+*       This routine controls the MV device Other MAC multicast support.
+*       The Other Multicast Table is used for multicast of another type.
+*       A CRC-8bit is used as an index to the Other Multicast Table entries
+*       in the DA-Filter table.
+*       The function gets the CRC-8bit value from the calling routine and
+*       set the Other Multicast Table appropriate entry according to the
+*       CRC-8 argument given.
+*
+* INPUT:
+*       int     ethPortNum  Port number.
+*       MV_U8   crc8        A CRC-8bit (Polynomial: x^8+x^2+x^1+1).
+*       int     queue       Rx queue number for this MAC address.
+*
+* OUTPUT:
+*       See description.
+*
+* RETURN:
+*       MV_TRUE is output succeeded.
+*       MV_FALSE if option parameter is invalid.
+*
+*******************************************************************************/
+static MV_BOOL ethSetOtherMcastAddr(int ethPortNum, MV_U8 crc8, int queue)
+{
+    unsigned int omcTableReg;
+    unsigned int tblOffset;
+    unsigned int regOffset;
+
+    /* Locate the OMC table entry */
+    tblOffset = (crc8 / 4) * 4;     /* Register offset from OMC table base    */
+    regOffset = crc8 % 4;           /* Entry offset within the above register */
+
+    omcTableReg = MV_REG_READ(
+        (ETH_DA_FILTER_OTH_MCAST_BASE(ethPortNum) + tblOffset));
+
+    if(queue == -1)
+    {
+        /* Clear accepts frame bit at specified Other DA table entry */
+        omcTableReg &= ~(0xFF << (8 * regOffset));
+    }
+    else
+    {
+        omcTableReg &= ~(0xFF << (8 * regOffset));
+        omcTableReg |= ((0x01 | (queue<<1)) << (8 * regOffset));
+    }
+
+    MV_REG_WRITE((ETH_DA_FILTER_OTH_MCAST_BASE(ethPortNum) + tblOffset), 
+                    omcTableReg);
+
+    return MV_TRUE;
+}
+
+
+/******************************************************************************/
+/*                      MIB Counters functions                                */
+/******************************************************************************/
+
+
+/*******************************************************************************
+* mvEthMibCounterRead - Read a MIB counter
+*
+* DESCRIPTION:
+*       This function reads a MIB counter of a specific ethernet port.
+*       NOTE - Read from ETH_MIB_GOOD_OCTETS_RECEIVED_LOW or 
+*              ETH_MIB_GOOD_OCTETS_SENT_LOW counters will return 64 bits value,
+*              so pHigh32 pointer should not be NULL in this case.
+*
+* INPUT:
+*       int           ethPortNum  - Ethernet Port number.
+*       unsigned int  mibOffset   - MIB counter offset.
+*
+* OUTPUT:
+*       MV_U32*       pHigh32 - pointer to place where 32 most significant bits
+*                             of the counter will be stored.
+*
+* RETURN:
+*       32 low sgnificant bits of MIB counter value.
+*
+*******************************************************************************/
+MV_U32  mvEthMibCounterRead(void* pPortHandle, unsigned int mibOffset, 
+                            MV_U32* pHigh32)
+{
+    int             portNo;
+    MV_U32          valLow32, valHigh32;
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pPortHandle;
+
+    portNo = pPortCtrl->portNo;
+
+    valLow32 = MV_REG_READ(ETH_MIB_COUNTERS_BASE(portNo) + mibOffset);
+    
+    /* Implement FEr ETH. Erroneous Value when Reading the Upper 32-bits    */
+    /* of a 64-bit MIB Counter.                                             */
+    if( (mibOffset == ETH_MIB_GOOD_OCTETS_RECEIVED_LOW) || 
+        (mibOffset == ETH_MIB_GOOD_OCTETS_SENT_LOW) )
+    {
+        valHigh32 = MV_REG_READ(ETH_MIB_COUNTERS_BASE(portNo) + mibOffset + 4);
+        if(pHigh32 != NULL)
+            *pHigh32 = valHigh32;
+    }
+    return valLow32;
+}
+
+/*******************************************************************************
+* mvEthMibCountersClear - Clear all MIB counters
+*
+* DESCRIPTION:
+*       This function clears all MIB counters
+*
+* INPUT:
+*       int           ethPortNum  - Ethernet Port number.
+*
+*
+* RETURN:   void
+*
+*******************************************************************************/
+void  mvEthMibCountersClear(void* pPortHandle)
+{
+    int             i, portNo;
+    unsigned int    dummy;
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pPortHandle;
+
+    portNo = pPortCtrl->portNo;
+
+    /* Perform dummy reads from MIB counters */
+    for(i=ETH_MIB_GOOD_OCTETS_RECEIVED_LOW; i<ETH_MIB_LATE_COLLISION; i+=4)
+        dummy = MV_REG_READ((ETH_MIB_COUNTERS_BASE(portNo) + i));
+}
+    
+
+/******************************************************************************/
+/*                        RX Dispatching configuration routines               */
+/******************************************************************************/
+
+int     mvEthTosToRxqGet(void* pPortHandle, int tos)
+{
+    MV_U32          regValue;
+    int             regIdx, regOffs, rxq;
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pPortHandle;
+
+    if(tos > 0xFF)
+    {
+        mvOsPrintf("eth_%d: tos=0x%x is out of range\n", pPortCtrl->portNo, tos);
+        return -1;
+    }
+    regIdx  = mvOsDivide(tos>>2, 10);
+    regOffs = mvOsReminder(tos>>2, 10);
+    
+    regValue = MV_REG_READ(ETH_DIFF_SERV_PRIO_REG(pPortCtrl->portNo, regIdx) );
+    rxq = (regValue >> (regOffs*3));
+    rxq &= 0x7;
+
+    return rxq;
+}
+
+/*******************************************************************************
+* mvEthTosToRxqSet - Map packets with special TOS value to special RX queue
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       void*   pPortHandle - Pointer to port specific handler;
+*       int     tos         - TOS value in the IP header of the packet
+*       int     rxq         - RX Queue for packets with the configured TOS value
+*                           Negative value (-1) means no special processing for these packets, 
+*                           so they will be processed as regular packets.
+*
+* RETURN:   MV_STATUS
+*******************************************************************************/
+MV_STATUS   mvEthTosToRxqSet(void* pPortHandle, int tos, int rxq)
+{
+    MV_U32          regValue;
+    int             regIdx, regOffs;
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pPortHandle;
+
+    if( (rxq < 0) || (rxq >= MV_ETH_RX_Q_NUM) )
+    {
+        mvOsPrintf("eth_%d: RX queue #%d is out of range\n", pPortCtrl->portNo, rxq);
+        return MV_BAD_PARAM;
+    }
+    if(tos > 0xFF)
+    {
+        mvOsPrintf("eth_%d: tos=0x%x is out of range\n", pPortCtrl->portNo, tos);
+        return MV_BAD_PARAM;
+    }
+    regIdx  = mvOsDivide(tos>>2, 10);
+    regOffs = mvOsReminder(tos>>2, 10);
+    
+    regValue = MV_REG_READ(ETH_DIFF_SERV_PRIO_REG(pPortCtrl->portNo, regIdx) );
+    regValue &= ~(0x7 << (regOffs*3));
+    regValue |= (rxq << (regOffs*3));
+
+    MV_REG_WRITE(ETH_DIFF_SERV_PRIO_REG(pPortCtrl->portNo, regIdx), regValue);
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvEthVlanPrioRxQueue - Configure RX queue to capture VLAN tagged packets with 
+*                        special priority bits [0-2]
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       void*   pPortHandle - Pointer to port specific handler;
+*       int     bpduQueue   - Special queue to capture VLAN tagged packets with special
+*                           priority.
+*                           Negative value (-1) means no special processing for these packets, 
+*                           so they will be processed as regular packets.
+*
+* RETURN:   MV_STATUS
+*       MV_OK       - Success
+*       MV_FAIL     - Failed. 
+*
+*******************************************************************************/
+MV_STATUS   mvEthVlanPrioRxQueue(void* pPortHandle, int vlanPrio, int vlanPrioQueue)
+{
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pPortHandle;
+    MV_U32          vlanPrioReg;
+
+    if(vlanPrioQueue >= MV_ETH_RX_Q_NUM)
+    {
+        mvOsPrintf("ethDrv: RX queue #%d is out of range\n", vlanPrioQueue);
+        return MV_BAD_PARAM;
+    }
+    if(vlanPrio >= 8)
+    {
+        mvOsPrintf("ethDrv: vlanPrio=%d is out of range\n", vlanPrio);
+        return MV_BAD_PARAM;
+    }
+  
+    vlanPrioReg = MV_REG_READ(ETH_VLAN_TAG_TO_PRIO_REG(pPortCtrl->portNo));
+    vlanPrioReg &= ~(0x7 << (vlanPrio*3));
+    vlanPrioReg |= (vlanPrioQueue << (vlanPrio*3));
+    MV_REG_WRITE(ETH_VLAN_TAG_TO_PRIO_REG(pPortCtrl->portNo), vlanPrioReg);
+
+    return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvEthBpduRxQueue - Configure RX queue to capture BPDU packets.
+*
+* DESCRIPTION:
+*       This function defines processing of BPDU packets. 
+*   BPDU packets can be accepted and captured to one of RX queues 
+*   or can be processing as regular Multicast packets. 
+*
+* INPUT:
+*       void*   pPortHandle - Pointer to port specific handler;
+*       int     bpduQueue   - Special queue to capture BPDU packets (DA is equal to 
+*                           01-80-C2-00-00-00 through 01-80-C2-00-00-FF, 
+*                           except for the Flow-Control Pause packets). 
+*                           Negative value (-1) means no special processing for BPDU, 
+*                           packets so they will be processed as regular Multicast packets.
+*
+* RETURN:   MV_STATUS
+*       MV_OK       - Success
+*       MV_FAIL     - Failed. 
+*
+*******************************************************************************/
+MV_STATUS   mvEthBpduRxQueue(void* pPortHandle, int bpduQueue)
+{
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pPortHandle;
+    MV_U32      portCfgReg;
+    MV_U32      portCfgExtReg;
+
+    if(bpduQueue >= MV_ETH_RX_Q_NUM)
+    {
+        mvOsPrintf("ethDrv: RX queue #%d is out of range\n", bpduQueue);
+        return MV_BAD_PARAM;
+    }
+  
+    portCfgExtReg = MV_REG_READ(ETH_PORT_CONFIG_EXTEND_REG(pPortCtrl->portNo));
+
+    portCfgReg = MV_REG_READ(ETH_PORT_CONFIG_REG(pPortCtrl->portNo));
+    if(bpduQueue >= 0)
+    {
+        pPortCtrl->portConfig.rxBpduQ = bpduQueue;
+
+        portCfgReg &= ~ETH_DEF_RX_BPDU_QUEUE_ALL_MASK;
+        portCfgReg |= ETH_DEF_RX_BPDU_QUEUE_MASK(pPortCtrl->portConfig.rxBpduQ);
+
+        MV_REG_WRITE(ETH_PORT_CONFIG_REG(pPortCtrl->portNo), portCfgReg);
+
+        portCfgExtReg |= ETH_CAPTURE_SPAN_BPDU_ENABLE_MASK;
+    }
+    else
+    {
+        pPortCtrl->portConfig.rxBpduQ = -1;
+        /* no special processing for BPDU packets */
+        portCfgExtReg &= (~ETH_CAPTURE_SPAN_BPDU_ENABLE_MASK);
+    }
+
+    MV_REG_WRITE(ETH_PORT_CONFIG_EXTEND_REG(pPortCtrl->portNo),  portCfgExtReg);
+
+    return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvEthArpRxQueue - Configure RX queue to capture ARP packets.
+*
+* DESCRIPTION:
+*       This function defines processing of ARP (type=0x0806) packets. 
+*   ARP packets can be accepted and captured to one of RX queues 
+*   or can be processed as other Broadcast packets. 
+*
+* INPUT:
+*       void*   pPortHandle - Pointer to port specific handler;
+*       int     arpQueue    - Special queue to capture ARP packets (type=0x806). 
+*                           Negative value (-1) means discard ARP packets
+*
+* RETURN:   MV_STATUS
+*       MV_OK       - Success
+*       MV_FAIL     - Failed. 
+*
+*******************************************************************************/
+MV_STATUS   mvEthArpRxQueue(void* pPortHandle, int arpQueue)
+{
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pPortHandle;
+    MV_U32      portCfgReg;
+
+    if(arpQueue >= MV_ETH_RX_Q_NUM)
+    {
+        mvOsPrintf("ethDrv: RX queue #%d is out of range\n", arpQueue);
+        return MV_BAD_PARAM;
+    }
+
+    portCfgReg = MV_REG_READ(ETH_PORT_CONFIG_REG(pPortCtrl->portNo));
+
+    if(arpQueue >= 0)
+    {
+        pPortCtrl->portConfig.rxArpQ = arpQueue;
+        portCfgReg &= ~ETH_DEF_RX_ARP_QUEUE_ALL_MASK;
+        portCfgReg |= ETH_DEF_RX_ARP_QUEUE_MASK(pPortCtrl->portConfig.rxArpQ);
+
+        portCfgReg &= (~ETH_REJECT_ARP_BCAST_MASK);
+    }
+    else
+    {
+        pPortCtrl->portConfig.rxArpQ = -1;
+        portCfgReg |= ETH_REJECT_ARP_BCAST_MASK;
+    }
+
+    MV_REG_WRITE(ETH_PORT_CONFIG_REG(pPortCtrl->portNo), portCfgReg);
+
+    return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvEthTcpRxQueue - Configure RX queue to capture TCP packets.
+*
+* DESCRIPTION:
+*       This function defines processing of TCP packets. 
+*   TCP packets can be accepted and captured to one of RX queues 
+*   or can be processed as regular Unicast packets. 
+*
+* INPUT:
+*       void*   pPortHandle - Pointer to port specific handler;
+*       int     tcpQueue    - Special queue to capture TCP packets. Value "-1" 
+*                           means no special processing for TCP packets, 
+*                           so they will be processed as regular
+*
+* RETURN:   MV_STATUS
+*       MV_OK       - Success
+*       MV_FAIL     - Failed. 
+*
+*******************************************************************************/
+MV_STATUS   mvEthTcpRxQueue(void* pPortHandle, int tcpQueue)
+{
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pPortHandle;
+    MV_U32      portCfgReg;
+
+    if(tcpQueue >= MV_ETH_RX_Q_NUM)
+    {
+        mvOsPrintf("ethDrv: RX queue #%d is out of range\n", tcpQueue);
+        return MV_BAD_PARAM;
+    }
+    portCfgReg = MV_REG_READ(ETH_PORT_CONFIG_REG(pPortCtrl->portNo));
+
+    if(tcpQueue >= 0)
+    {
+        pPortCtrl->portConfig.rxTcpQ = tcpQueue;
+        portCfgReg &= ~ETH_DEF_RX_TCP_QUEUE_ALL_MASK;
+        portCfgReg |= ETH_DEF_RX_TCP_QUEUE_MASK(pPortCtrl->portConfig.rxTcpQ);
+
+        portCfgReg |= ETH_CAPTURE_TCP_FRAMES_ENABLE_MASK;
+    }
+    else
+    {
+        pPortCtrl->portConfig.rxTcpQ = -1;
+        portCfgReg &= (~ETH_CAPTURE_TCP_FRAMES_ENABLE_MASK);
+    }
+
+    MV_REG_WRITE(ETH_PORT_CONFIG_REG(pPortCtrl->portNo), portCfgReg);
+
+    return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvEthUdpRxQueue - Configure RX queue to capture UDP packets.
+*
+* DESCRIPTION:
+*       This function defines processing of UDP packets. 
+*   TCP packets can be accepted and captured to one of RX queues 
+*   or can be processed as regular Unicast packets. 
+*
+* INPUT:
+*       void*   pPortHandle - Pointer to port specific handler;
+*       int     udpQueue    - Special queue to capture UDP packets. Value "-1" 
+*                           means no special processing for UDP packets, 
+*                           so they will be processed as regular
+*
+* RETURN:   MV_STATUS
+*       MV_OK       - Success
+*       MV_FAIL     - Failed. 
+*
+*******************************************************************************/
+MV_STATUS   mvEthUdpRxQueue(void* pPortHandle, int udpQueue)
+{
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pPortHandle;
+    MV_U32          portCfgReg;
+
+    if(udpQueue >= MV_ETH_RX_Q_NUM)
+    {
+        mvOsPrintf("ethDrv: RX queue #%d is out of range\n", udpQueue);
+        return MV_BAD_PARAM;
+    }
+
+    portCfgReg = MV_REG_READ(ETH_PORT_CONFIG_REG(pPortCtrl->portNo));
+
+    if(udpQueue >= 0)
+    {
+        pPortCtrl->portConfig.rxUdpQ = udpQueue;
+        portCfgReg &= ~ETH_DEF_RX_UDP_QUEUE_ALL_MASK;
+        portCfgReg |= ETH_DEF_RX_UDP_QUEUE_MASK(pPortCtrl->portConfig.rxUdpQ);
+
+        portCfgReg |= ETH_CAPTURE_UDP_FRAMES_ENABLE_MASK;        
+    }
+    else
+    {
+        pPortCtrl->portConfig.rxUdpQ = -1;
+        portCfgReg &= ~ETH_CAPTURE_UDP_FRAMES_ENABLE_MASK;
+    }
+
+    MV_REG_WRITE(ETH_PORT_CONFIG_REG(pPortCtrl->portNo), portCfgReg);
+
+    return MV_OK;
+}
+
+
+/******************************************************************************/
+/*                          Speed, Duplex, FlowControl routines               */
+/******************************************************************************/
+
+/*******************************************************************************
+* mvEthSpeedDuplexSet - Set Speed and Duplex of the port.
+*
+* DESCRIPTION:
+*       This function configure the port to work with desirable Duplex and Speed.
+*       Changing of these parameters are allowed only when port is disabled.
+*       This function disable the port if was enabled, change duplex and speed 
+*       and, enable the port back if needed.
+*
+* INPUT:
+*       void*           pPortHandle - Pointer to port specific handler;
+*       ETH_PORT_SPEED  speed       - Speed of the port.
+*       ETH_PORT_SPEED  duplex      - Duplex of the port.
+*
+* RETURN:   MV_STATUS
+*       MV_OK           - Success
+*       MV_OUT_OF_RANGE - Failed. Port is out of valid range
+*       MV_NOT_FOUND    - Failed. Port is not initialized.
+*       MV_BAD_PARAM    - Input parameters (speed/duplex) in conflict.
+*       MV_BAD_VALUE    - Value of one of input parameters (speed, duplex) 
+*                       is not valid
+*
+*******************************************************************************/
+MV_STATUS   mvEthSpeedDuplexSet(void* pPortHandle, MV_ETH_PORT_SPEED speed, 
+                                MV_ETH_PORT_DUPLEX duplex)
+{
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pPortHandle;
+    int             port = pPortCtrl->portNo;
+    MV_U32      portSerialCtrlReg;
+    
+    if( (port < 0) || (port >= (int)ethHalData.maxPortNum) )
+        return MV_OUT_OF_RANGE;
+
+    pPortCtrl = ethPortCtrl[port];
+    if(pPortCtrl == NULL)
+        return MV_NOT_FOUND;
+
+    /* Check validity */
+    if( (speed == MV_ETH_SPEED_1000) && (duplex == MV_ETH_DUPLEX_HALF) )
+        return MV_BAD_PARAM;
+
+    portSerialCtrlReg = MV_REG_READ(ETH_PORT_SERIAL_CTRL_REG(port));
+    /* Set Speed */
+    switch(speed)
+    {
+        case MV_ETH_SPEED_AN:
+            portSerialCtrlReg &= ~ETH_DISABLE_SPEED_AUTO_NEG_MASK;
+            break;
+
+        case MV_ETH_SPEED_10:
+            portSerialCtrlReg |= ETH_DISABLE_SPEED_AUTO_NEG_MASK;
+            portSerialCtrlReg &= ~ETH_SET_GMII_SPEED_1000_MASK;
+            portSerialCtrlReg &= ~ETH_SET_MII_SPEED_100_MASK;
+            break;
+
+        case MV_ETH_SPEED_100:
+            portSerialCtrlReg |= ETH_DISABLE_SPEED_AUTO_NEG_MASK;
+            portSerialCtrlReg &= ~ETH_SET_GMII_SPEED_1000_MASK;
+            portSerialCtrlReg |= ETH_SET_MII_SPEED_100_MASK;
+            break;
+
+        case MV_ETH_SPEED_1000:
+            portSerialCtrlReg |= ETH_DISABLE_SPEED_AUTO_NEG_MASK;
+            portSerialCtrlReg |= ETH_SET_GMII_SPEED_1000_MASK;
+            break;
+
+        default:
+            mvOsPrintf("ethDrv: Unexpected Speed value %d\n", speed);
+            return MV_BAD_VALUE;
+    }
+    /* Set duplex */
+    switch(duplex)
+    {
+        case MV_ETH_DUPLEX_AN:
+            portSerialCtrlReg &= ~ETH_DISABLE_DUPLEX_AUTO_NEG_MASK;
+            break;
+
+        case MV_ETH_DUPLEX_HALF:
+            portSerialCtrlReg |= ETH_DISABLE_DUPLEX_AUTO_NEG_MASK;
+            portSerialCtrlReg &= ~ETH_SET_FULL_DUPLEX_MASK;
+            break;
+
+        case MV_ETH_DUPLEX_FULL:
+            portSerialCtrlReg |= ETH_DISABLE_DUPLEX_AUTO_NEG_MASK;
+            portSerialCtrlReg |= ETH_SET_FULL_DUPLEX_MASK;
+            break;
+
+        default:
+            mvOsPrintf("ethDrv: Unexpected Duplex value %d\n", duplex);
+            return MV_BAD_VALUE;
+    }
+    MV_REG_WRITE(ETH_PORT_SERIAL_CTRL_REG(port), portSerialCtrlReg);
+
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvEthFlowCtrlSet - Set Flow Control of the port.
+*
+* DESCRIPTION:
+*       This function configure the port to work with desirable Duplex and 
+*       Speed. Changing of these parameters are allowed only when port is 
+*       disabled. This function disable the port if was enabled, change 
+*       duplex and speed and, enable the port back if needed.
+*
+* INPUT:
+*       void*           pPortHandle - Pointer to port specific handler;
+*       MV_ETH_PORT_FC  flowControl - Flow control of the port.
+*
+* RETURN:   MV_STATUS
+*       MV_OK           - Success
+*       MV_OUT_OF_RANGE - Failed. Port is out of valid range
+*       MV_NOT_FOUND    - Failed. Port is not initialized.
+*       MV_BAD_VALUE    - Value flowControl parameters is not valid
+*
+*******************************************************************************/
+MV_STATUS   mvEthFlowCtrlSet(void* pPortHandle, MV_ETH_PORT_FC flowControl)
+{
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pPortHandle;
+    int             port = pPortCtrl->portNo;
+    MV_U32      portSerialCtrlReg;
+    
+    if( (port < 0) || (port >= (int)ethHalData.maxPortNum ) )
+        return MV_OUT_OF_RANGE;
+
+    pPortCtrl = ethPortCtrl[port];
+    if(pPortCtrl == NULL)
+        return MV_NOT_FOUND;
+
+    portSerialCtrlReg = MV_REG_READ(ETH_PORT_SERIAL_CTRL_REG(port));
+    switch(flowControl)
+    {
+        case MV_ETH_FC_AN_ADV_DIS:
+            portSerialCtrlReg &= ~ETH_DISABLE_FC_AUTO_NEG_MASK;
+            portSerialCtrlReg &= ~ETH_ADVERTISE_SYM_FC_MASK;
+            break;
+
+        case MV_ETH_FC_AN_ADV_SYM:
+            portSerialCtrlReg &= ~ETH_DISABLE_FC_AUTO_NEG_MASK;
+            portSerialCtrlReg |= ETH_ADVERTISE_SYM_FC_MASK;
+            break;
+
+        case MV_ETH_FC_DISABLE:
+            portSerialCtrlReg |= ETH_DISABLE_FC_AUTO_NEG_MASK;
+            portSerialCtrlReg &= ~ETH_SET_FLOW_CTRL_MASK;
+            break;
+
+        case MV_ETH_FC_ENABLE:
+            portSerialCtrlReg |= ETH_DISABLE_FC_AUTO_NEG_MASK;
+            portSerialCtrlReg |= ETH_SET_FLOW_CTRL_MASK;
+            break;
+
+        default:
+            mvOsPrintf("ethDrv: Unexpected FlowControl value %d\n", flowControl);
+            return MV_BAD_VALUE;
+    }
+    MV_REG_WRITE(ETH_PORT_SERIAL_CTRL_REG(port), portSerialCtrlReg);
+
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvEthHeaderModeSet - Set port header mode.
+*
+* DESCRIPTION:
+*       This function configures the port to work in Marvell-Header mode.
+*
+* INPUT:
+*       void*           pPortHandle - Pointer to port specific handler;
+*       MV_ETH_HEADER_MODE headerMode - The header mode to set the port in.
+*
+* RETURN:   MV_STATUS
+*       MV_OK           - Success
+*       MV_NOT_SUPPORTED- Feature not supported.
+*       MV_OUT_OF_RANGE - Failed. Port is out of valid range
+*       MV_NOT_FOUND    - Failed. Port is not initialized.
+*       MV_BAD_VALUE    - Value of headerMode or numRxQueue parameter is not valid.
+*
+*******************************************************************************/
+MV_STATUS mvEthHeaderModeSet(void* pPortHandle, MV_ETH_HEADER_MODE headerMode)
+{
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pPortHandle;
+    int             port = pPortCtrl->portNo;
+    MV_U32			mvHeaderReg;
+    MV_U32          numRxQ = MV_ETH_RX_Q_NUM;
+    
+    if((port < 0) || (port >= ethHalData.maxPortNum))
+        return MV_OUT_OF_RANGE;
+
+    pPortCtrl = ethPortCtrl[port];
+    if(pPortCtrl == NULL)
+        return MV_NOT_FOUND;
+
+    mvHeaderReg = MV_REG_READ(ETH_PORT_MARVELL_HEADER_REG(port));
+    /* Disable header mode.             */
+    mvHeaderReg &= ~ETH_MVHDR_EN_MASK;
+
+    if(headerMode != MV_ETH_DISABLE_HEADER_MODE)
+    {
+        /* Enable Header mode.              */
+        mvHeaderReg |= ETH_MVHDR_EN_MASK;
+
+        /* Clear DA-Prefix  & MHMask fields.*/
+        mvHeaderReg &= ~(ETH_MVHDR_DAPREFIX_MASK | ETH_MVHDR_MHMASK_MASK);
+
+        if(numRxQ > 1)
+        {
+            switch (headerMode)
+            {
+                case(MV_ETH_ENABLE_HEADER_MODE_PRI_2_1):
+                    mvHeaderReg |= ETH_MVHDR_DAPREFIX_PRI_1_2;
+                    break;
+                case(MV_ETH_ENABLE_HEADER_MODE_PRI_DBNUM):
+                    mvHeaderReg |= ETH_MVHDR_DAPREFIX_DBNUM_PRI;
+                    break;
+                case(MV_ETH_ENABLE_HEADER_MODE_PRI_SPID):
+                    mvHeaderReg |= ETH_MVHDR_DAPREFIX_SPID_PRI;
+                    break;
+                default:
+                    break;
+            }
+
+            switch (numRxQ)
+            {
+                case (4):
+                    mvHeaderReg |= ETH_MVHDR_MHMASK_4_QUEUE;
+                    break;
+                case (8):
+                    mvHeaderReg |= ETH_MVHDR_MHMASK_8_QUEUE;
+                    break;
+                default:
+                    break;
+            }
+        }
+    }
+
+    MV_REG_WRITE(ETH_PORT_MARVELL_HEADER_REG(port), mvHeaderReg);
+
+    return MV_OK;
+}
+
+#if (MV_ETH_VERSION >= 4)
+/*******************************************************************************
+* mvEthEjpModeSet - Enable / Disable EJP policy for TX.
+*
+* DESCRIPTION:
+*       This function 
+*
+* INPUT:
+*       void*           pPortHandle - Pointer to port specific handler;
+*       MV_BOOL         TRUE - enable EJP mode
+*                       FALSE - disable EJP mode
+*
+* OUTPUT:   MV_STATUS
+*       MV_OK           - Success
+*       Other           - Failure
+*
+* RETURN:   None.
+*
+*******************************************************************************/
+MV_STATUS    mvEthEjpModeSet(void* pPortHandle, int mode) 
+{
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pPortHandle;
+    int             port = pPortCtrl->portNo;
+    
+    if((port < 0) || (port >= ethHalData.maxPortNum))
+        return MV_OUT_OF_RANGE;
+
+    pPortCtrl = ethPortCtrl[port];
+    if(pPortCtrl == NULL)
+        return MV_NOT_FOUND;
+    
+    pPortCtrl->portConfig.ejpMode = mode;
+    if(mode)
+    {
+        /* EJP enabled */
+        MV_REG_WRITE(ETH_TXQ_CMD_1_REG(port), ETH_TX_EJP_ENABLE_MASK);
+    }
+    else
+    {
+        /* EJP disabled */
+        MV_REG_WRITE(ETH_TXQ_CMD_1_REG(port), 0);
+    }
+    mvOsPrintf("eth_%d: EJP %s - ETH_TXQ_CMD_1_REG: 0x%x = 0x%08x\n", 
+        port, mode ? "Enabled" : "Disabled", ETH_TXQ_CMD_1_REG(port), 
+                    MV_REG_READ(ETH_TXQ_CMD_1_REG(port)));
+
+    return MV_OK;
+}
+#endif /* MV_ETH_VERSION >= 4 */
+
+/*******************************************************************************
+* mvEthStatusGet - Get major properties of the port .
+*
+* DESCRIPTION:
+*       This function get major properties of the port (link, speed, duplex, 
+*       flowControl, etc) and return them using the single structure.
+*
+* INPUT:
+*       void*           pPortHandle - Pointer to port specific handler;
+*
+* OUTPUT:
+*       MV_ETH_PORT_STATUS* pStatus - Pointer to structure, were port status 
+*                                   will be placed.
+*
+* RETURN:   None.
+*
+*******************************************************************************/
+void    mvEthStatusGet(void* pPortHandle, MV_ETH_PORT_STATUS* pStatus)
+{
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pPortHandle;
+    int             port = pPortCtrl->portNo;
+
+    MV_U32  regValue;
+
+    regValue = MV_REG_READ( ETH_PORT_STATUS_REG(port) );
+
+    if(regValue & ETH_GMII_SPEED_1000_MASK)
+        pStatus->speed = MV_ETH_SPEED_1000;
+    else if(regValue & ETH_MII_SPEED_100_MASK)
+        pStatus->speed = MV_ETH_SPEED_100;
+    else
+        pStatus->speed = MV_ETH_SPEED_10;
+
+    if(regValue & ETH_LINK_UP_MASK) 
+        pStatus->isLinkUp = MV_TRUE;
+    else
+        pStatus->isLinkUp = MV_FALSE;
+
+    if(regValue & ETH_FULL_DUPLEX_MASK) 
+        pStatus->duplex = MV_ETH_DUPLEX_FULL; 
+    else
+        pStatus->duplex = MV_ETH_DUPLEX_HALF; 
+
+
+    if(regValue & ETH_ENABLE_RCV_FLOW_CTRL_MASK) 
+        pStatus->flowControl = MV_ETH_FC_ENABLE;
+    else
+        pStatus->flowControl = MV_ETH_FC_DISABLE;
+}
+
+
+/******************************************************************************/
+/*                         PHY Control Functions                              */
+/******************************************************************************/
+
+
+/*******************************************************************************
+* mvEthPhyAddrSet - Set the ethernet port PHY address.
+*
+* DESCRIPTION:
+*       This routine set the ethernet port PHY address according to given
+*       parameter.
+*
+* INPUT:
+*       void*   pPortHandle     - Pointer to port specific handler;
+*       int     phyAddr         - PHY address       
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+void    mvEthPhyAddrSet(void* pPortHandle, int phyAddr)
+{
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pPortHandle;
+    int             port = pPortCtrl->portNo;
+    unsigned int    regData;
+
+    regData = MV_REG_READ(ETH_PHY_ADDR_REG(port));
+
+    regData &= ~ETH_PHY_ADDR_MASK;
+    regData |=  phyAddr;
+
+    MV_REG_WRITE(ETH_PHY_ADDR_REG(port), regData);
+
+    return;
+}
+
+/*******************************************************************************
+* mvEthPhyAddrGet - Get the ethernet port PHY address.
+*
+* DESCRIPTION:
+*       This routine returns the given ethernet port PHY address.
+*
+* INPUT:
+*       void*   pPortHandle - Pointer to port specific handler;
+*
+*
+* RETURN: int - PHY address.
+*
+*******************************************************************************/
+int     mvEthPhyAddrGet(void* pPortHandle)
+{
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pPortHandle;
+    int             port = pPortCtrl->portNo;
+    unsigned int    regData;
+
+    regData = MV_REG_READ(ETH_PHY_ADDR_REG(port));
+
+    return ((regData >> (5 * port)) & 0x1f);
+}
+
+/******************************************************************************/
+/*                Descriptor handling Functions                               */
+/******************************************************************************/
+
+/*******************************************************************************
+* etherInitRxDescRing - Curve a Rx chain desc list and buffer in memory.
+*
+* DESCRIPTION:
+*       This function prepares a Rx chained list of descriptors and packet
+*       buffers in a form of a ring. The routine must be called after port
+*       initialization routine and before port start routine.
+*       The Ethernet SDMA engine uses CPU bus addresses to access the various
+*       devices in the system (i.e. DRAM). This function uses the ethernet
+*       struct 'virtual to physical' routine (set by the user) to set the ring
+*       with physical addresses.
+*
+* INPUT:
+*       ETH_QUEUE_CTRL  *pEthPortCtrl   Ethernet Port Control srtuct.
+*       int             rxQueue         Number of Rx queue.
+*       int             rxDescNum       Number of Rx descriptors
+*       MV_U8*          rxDescBaseAddr  Rx descriptors memory area base addr.
+*
+* OUTPUT:
+*       The routine updates the Ethernet port control struct with information
+*       regarding the Rx descriptors and buffers.
+*
+* RETURN: None
+*
+*******************************************************************************/
+static void ethInitRxDescRing(ETH_PORT_CTRL* pPortCtrl, int queue)
+{
+    ETH_RX_DESC     *pRxDescBase, *pRxDesc, *pRxPrevDesc; 
+    int             ix, rxDescNum = pPortCtrl->rxQueueConfig[queue].descrNum;
+    ETH_QUEUE_CTRL  *pQueueCtrl = &pPortCtrl->rxQueue[queue];
+
+    /* Make sure descriptor address is cache line size aligned  */        
+    pRxDescBase = (ETH_RX_DESC*)MV_ALIGN_UP((MV_ULONG)pQueueCtrl->descBuf.bufVirtPtr,
+                                     CPU_D_CACHE_LINE_SIZE);
+
+    pRxDesc      = (ETH_RX_DESC*)pRxDescBase;
+    pRxPrevDesc  = pRxDesc;
+
+    /* initialize the Rx descriptors ring */
+    for (ix=0; ix<rxDescNum; ix++)
+    {
+        pRxDesc->bufSize     = 0x0;
+        pRxDesc->byteCnt     = 0x0;
+        pRxDesc->cmdSts      = ETH_BUFFER_OWNED_BY_HOST;
+        pRxDesc->bufPtr      = 0x0;
+        pRxDesc->returnInfo  = 0x0;
+        pRxPrevDesc = pRxDesc;
+        if(ix == (rxDescNum-1))
+        {
+            /* Closing Rx descriptors ring */
+            pRxPrevDesc->nextDescPtr = (MV_U32)ethDescVirtToPhy(pQueueCtrl, (void*)pRxDescBase);
+        }
+        else
+        {
+            pRxDesc = (ETH_RX_DESC*)((MV_ULONG)pRxDesc + ETH_RX_DESC_ALIGNED_SIZE);
+            pRxPrevDesc->nextDescPtr = (MV_U32)ethDescVirtToPhy(pQueueCtrl, (void*)pRxDesc);
+        }
+        ETH_DESCR_FLUSH_INV(pPortCtrl, pRxPrevDesc);
+    }
+
+    pQueueCtrl->pCurrentDescr = pRxDescBase;
+    pQueueCtrl->pUsedDescr = pRxDescBase;
+    
+    pQueueCtrl->pFirstDescr = pRxDescBase;
+    pQueueCtrl->pLastDescr = pRxDesc;
+    pQueueCtrl->resource = 0;
+}
+
+void ethResetRxDescRing(void* pPortHndl, int queue)
+{
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pPortHndl;
+    ETH_QUEUE_CTRL* pQueueCtrl = &pPortCtrl->rxQueue[queue];
+    ETH_RX_DESC*    pRxDesc = (ETH_RX_DESC*)pQueueCtrl->pFirstDescr;
+
+    pQueueCtrl->resource = 0;
+    if(pQueueCtrl->pFirstDescr != NULL)
+    {
+        while(MV_TRUE)
+        {
+            pRxDesc->bufSize     = 0x0;
+            pRxDesc->byteCnt     = 0x0;
+            pRxDesc->cmdSts      = ETH_BUFFER_OWNED_BY_HOST;
+            pRxDesc->bufPtr      = 0x0;
+            pRxDesc->returnInfo  = 0x0;
+            ETH_DESCR_FLUSH_INV(pPortCtrl, pRxDesc);
+            if( (void*)pRxDesc == pQueueCtrl->pLastDescr)
+                    break;
+            pRxDesc = RX_NEXT_DESC_PTR(pRxDesc, pQueueCtrl);
+        }
+        pQueueCtrl->pCurrentDescr = pQueueCtrl->pFirstDescr;
+        pQueueCtrl->pUsedDescr = pQueueCtrl->pFirstDescr;
+
+        /* Update RX Command register */
+        pPortCtrl->portRxQueueCmdReg |= (1 << queue);
+
+        /* update HW */
+        MV_REG_WRITE( ETH_RX_CUR_DESC_PTR_REG(pPortCtrl->portNo, queue),
+                 (MV_U32)ethDescVirtToPhy(pQueueCtrl, pQueueCtrl->pCurrentDescr) );
+    }
+    else
+    {
+        /* Update RX Command register */
+        pPortCtrl->portRxQueueCmdReg &= ~(1 << queue);
+
+        /* update HW */
+        MV_REG_WRITE( ETH_RX_CUR_DESC_PTR_REG(pPortCtrl->portNo, queue), 0);
+    }
+}
+
+/*******************************************************************************
+* etherInitTxDescRing - Curve a Tx chain desc list and buffer in memory.
+*
+* DESCRIPTION:
+*       This function prepares a Tx chained list of descriptors and packet
+*       buffers in a form of a ring. The routine must be called after port
+*       initialization routine and before port start routine.
+*       The Ethernet SDMA engine uses CPU bus addresses to access the various
+*       devices in the system (i.e. DRAM). This function uses the ethernet
+*       struct 'virtual to physical' routine (set by the user) to set the ring
+*       with physical addresses.
+*
+* INPUT:
+*       ETH_PORT_CTRL   *pEthPortCtrl   Ethernet Port Control srtuct.
+*       int             txQueue         Number of Tx queue.
+*       int             txDescNum       Number of Tx descriptors
+*       int             txBuffSize      Size of Tx buffer
+*       MV_U8*          pTxDescBase     Tx descriptors memory area base addr.
+*
+* OUTPUT:
+*       The routine updates the Ethernet port control struct with information
+*       regarding the Tx descriptors and buffers.
+*
+* RETURN:   None.
+*
+*******************************************************************************/
+static void ethInitTxDescRing(ETH_PORT_CTRL* pPortCtrl, int queue)
+{
+    ETH_TX_DESC     *pTxDescBase, *pTxDesc, *pTxPrevDesc; 
+    int             ix, txDescNum = pPortCtrl->txQueueConfig[queue].descrNum;
+    ETH_QUEUE_CTRL  *pQueueCtrl = &pPortCtrl->txQueue[queue];
+
+    /* Make sure descriptor address is cache line size aligned  */
+    pTxDescBase = (ETH_TX_DESC*)MV_ALIGN_UP((MV_ULONG)pQueueCtrl->descBuf.bufVirtPtr, 
+                                     CPU_D_CACHE_LINE_SIZE);
+
+    pTxDesc      = (ETH_TX_DESC*)pTxDescBase;
+    pTxPrevDesc  = pTxDesc;
+
+    /* initialize the Tx descriptors ring */
+    for (ix=0; ix<txDescNum; ix++)
+    {
+        pTxDesc->byteCnt     = 0x0000;
+        pTxDesc->L4iChk      = 0x0000;
+        pTxDesc->cmdSts      = ETH_BUFFER_OWNED_BY_HOST;
+        pTxDesc->bufPtr      = 0x0;
+        pTxDesc->returnInfo  = 0x0;
+
+        pTxPrevDesc = pTxDesc;
+
+        if(ix == (txDescNum-1))
+        {
+            /* Closing Tx descriptors ring */
+            pTxPrevDesc->nextDescPtr = (MV_U32)ethDescVirtToPhy(pQueueCtrl, (void*)pTxDescBase);
+        }
+        else
+        {
+            pTxDesc = (ETH_TX_DESC*)((MV_ULONG)pTxDesc + ETH_TX_DESC_ALIGNED_SIZE);
+            pTxPrevDesc->nextDescPtr = (MV_U32)ethDescVirtToPhy(pQueueCtrl, (void*)pTxDesc);
+        }
+        ETH_DESCR_FLUSH_INV(pPortCtrl, pTxPrevDesc);
+    }
+
+    pQueueCtrl->pCurrentDescr = pTxDescBase;
+    pQueueCtrl->pUsedDescr = pTxDescBase;
+    
+    pQueueCtrl->pFirstDescr = pTxDescBase;
+    pQueueCtrl->pLastDescr = pTxDesc;
+    /* Leave one TX descriptor out of use */
+    pQueueCtrl->resource = txDescNum - 1;
+}
+
+void ethResetTxDescRing(void* pPortHndl, int queue)
+{
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pPortHndl;
+    ETH_QUEUE_CTRL* pQueueCtrl = &pPortCtrl->txQueue[queue];
+    ETH_TX_DESC*    pTxDesc = (ETH_TX_DESC*)pQueueCtrl->pFirstDescr;
+    
+    pQueueCtrl->resource = 0;
+    if(pQueueCtrl->pFirstDescr != NULL)
+    {
+        while(MV_TRUE)
+        {
+            pTxDesc->byteCnt     = 0x0000;
+            pTxDesc->L4iChk      = 0x0000;
+            pTxDesc->cmdSts      = ETH_BUFFER_OWNED_BY_HOST;
+            pTxDesc->bufPtr      = 0x0;
+            pTxDesc->returnInfo  = 0x0;
+            ETH_DESCR_FLUSH_INV(pPortCtrl, pTxDesc);
+            pQueueCtrl->resource++;
+            if( (void*)pTxDesc == pQueueCtrl->pLastDescr)
+                    break;
+            pTxDesc = TX_NEXT_DESC_PTR(pTxDesc, pQueueCtrl);
+        }
+        /* Leave one TX descriptor out of use */
+        pQueueCtrl->resource--;
+        pQueueCtrl->pCurrentDescr = pQueueCtrl->pFirstDescr;
+        pQueueCtrl->pUsedDescr = pQueueCtrl->pFirstDescr;
+
+        /* Update TX Command register */
+        pPortCtrl->portTxQueueCmdReg |= MV_32BIT_LE_FAST(1 << queue);
+        /* update HW */
+        MV_REG_WRITE( ETH_TX_CUR_DESC_PTR_REG(pPortCtrl->portNo, queue),
+        (MV_U32)ethDescVirtToPhy(pQueueCtrl, pQueueCtrl->pCurrentDescr) );
+    }
+    else
+    {
+        /* Update TX Command register */
+        pPortCtrl->portTxQueueCmdReg &=  MV_32BIT_LE_FAST(~(1 << queue));
+        /* update HW */
+        MV_REG_WRITE( ETH_TX_CUR_DESC_PTR_REG(pPortCtrl->portNo, queue), 0 );    
+    }
+}
+
+/*******************************************************************************
+* ethAllocDescrMemory - Free memory allocated for RX and TX descriptors.
+*
+* DESCRIPTION:
+*       This function allocates memory for RX and TX descriptors.
+*       - If ETH_DESCR_IN_SRAM defined, allocate memory from SRAM.
+*       - If ETH_DESCR_IN_SDRAM defined, allocate memory in SDRAM.
+*
+* INPUT:
+*       int size - size of memory should be allocated.
+*
+* RETURN: None
+*
+*******************************************************************************/
+static MV_U8*  ethAllocDescrMemory(ETH_PORT_CTRL* pPortCtrl, int descSize, 
+                            MV_ULONG* pPhysAddr, MV_U32 *memHandle)
+{
+    MV_U8*  pVirt;
+
+#if defined(ETH_DESCR_IN_SRAM)
+    if(ethDescInSram == MV_TRUE)
+        pVirt = (MV_U8*)mvSramMalloc(descSize, pPhysAddr);
+    else
+#endif /* ETH_DESCR_IN_SRAM */
+    {
+#ifdef ETH_DESCR_UNCACHED
+        pVirt = (MV_U8*)mvOsIoUncachedMalloc(pPortCtrl->osHandle, descSize,
+					    pPhysAddr,memHandle);
+#else
+        pVirt = (MV_U8*)mvOsIoCachedMalloc(pPortCtrl->osHandle, descSize,
+					  pPhysAddr, memHandle);
+#endif /* ETH_DESCR_UNCACHED */
+    }
+    memset(pVirt, 0, descSize);
+
+    return pVirt;
+}
+
+/*******************************************************************************
+* ethFreeDescrMemory - Free memory allocated for RX and TX descriptors.
+*
+* DESCRIPTION:
+*       This function frees memory allocated for RX and TX descriptors.
+*       - If ETH_DESCR_IN_SRAM defined, free memory using gtSramFree() function.
+*       - If ETH_DESCR_IN_SDRAM defined, free memory using mvOsFree() function.
+*
+* INPUT:
+*       void* pVirtAddr - virtual pointer to memory allocated for RX and TX
+*                       desriptors.        
+*
+* RETURN: None
+*
+*******************************************************************************/
+void    ethFreeDescrMemory(ETH_PORT_CTRL* pPortCtrl, MV_BUF_INFO* pDescBuf)
+{
+    if( (pDescBuf == NULL) || (pDescBuf->bufVirtPtr == NULL) )
+        return;
+
+#if defined(ETH_DESCR_IN_SRAM)
+    if( ethDescInSram )
+    {
+        mvSramFree(pDescBuf->bufSize, pDescBuf->bufPhysAddr, pDescBuf->bufVirtPtr);
+        return;
+    }
+#endif /* ETH_DESCR_IN_SRAM */
+
+#ifdef ETH_DESCR_UNCACHED
+    mvOsIoUncachedFree(pPortCtrl->osHandle, pDescBuf->bufSize, pDescBuf->bufPhysAddr, 
+                     pDescBuf->bufVirtPtr,pDescBuf->memHandle);
+#else
+    mvOsIoCachedFree(pPortCtrl->osHandle, pDescBuf->bufSize, pDescBuf->bufPhysAddr, 
+                     pDescBuf->bufVirtPtr,pDescBuf->memHandle);
+#endif /* ETH_DESCR_UNCACHED */
+}
+                                                                                                                             
+/******************************************************************************/
+/*                Other Functions                                         */
+/******************************************************************************/
+
+void mvEthPortPowerUp(int port)
+{
+    MV_U32  regVal;
+
+    /* MAC Cause register should be cleared */
+    MV_REG_WRITE(ETH_UNIT_INTR_CAUSE_REG(port), 0);
+
+	if (ethHalData.portData[port].isSgmii)
+    mvEthPortSgmiiConfig(port);
+
+    /* Cancel Port Reset */
+    regVal = MV_REG_READ(ETH_PORT_SERIAL_CTRL_1_REG(port));
+    regVal &= (~ETH_PORT_RESET_MASK);
+    MV_REG_WRITE(ETH_PORT_SERIAL_CTRL_1_REG(port), regVal);
+    while( (MV_REG_READ(ETH_PORT_SERIAL_CTRL_1_REG(port)) & ETH_PORT_RESET_MASK) != 0);
+}
+
+void mvEthPortPowerDown(int port)
+{
+    MV_U32  regVal;
+
+    /* Port must be DISABLED */
+    regVal = MV_REG_READ(ETH_PORT_SERIAL_CTRL_REG(port));
+    if( (regVal & ETH_PORT_ENABLE_MASK) != 0)
+    {
+        mvOsPrintf("ethPort #%d: PowerDown - port must be Disabled (PSC=0x%x)\n",
+                    port, regVal);
+        return;
+    }
+
+    /* Port Reset (Read after write the register as a precaution) */
+    regVal = MV_REG_READ(ETH_PORT_SERIAL_CTRL_1_REG(port));
+    MV_REG_WRITE(ETH_PORT_SERIAL_CTRL_1_REG(port), regVal | ETH_PORT_RESET_MASK);
+    while((MV_REG_READ(ETH_PORT_SERIAL_CTRL_1_REG(port)) & ETH_PORT_RESET_MASK) == 0);
+}
+
+static void mvEthPortSgmiiConfig(int port)
+{
+    MV_U32  regVal;
+
+    regVal = MV_REG_READ(ETH_PORT_SERIAL_CTRL_1_REG(port));
+
+    regVal |= (ETH_SGMII_MODE_MASK /*| ETH_INBAND_AUTO_NEG_ENABLE_MASK */);
+    regVal &= (~ETH_INBAND_AUTO_NEG_BYPASS_MASK);
+
+    MV_REG_WRITE(ETH_PORT_SERIAL_CTRL_1_REG(port), regVal);
+}
+
+
+
+
+
+
+
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/eth/gbe/mvEthGbe.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/eth/gbe/mvEthGbe.h
@@ -0,0 +1,759 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+/*******************************************************************************
+* mvEth.h - Header File for : Marvell Gigabit Ethernet Controller
+*
+* DESCRIPTION:
+*       This header file contains macros typedefs and function declaration specific to 
+*       the Marvell Gigabit Ethernet Controller.
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+#ifndef __mvEthGbe_h__
+#define __mvEthGbe_h__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern MV_BOOL         ethDescInSram;
+extern MV_BOOL         ethDescSwCoher;
+extern ETH_PORT_CTRL*  ethPortCtrl[];
+
+static INLINE MV_ULONG  ethDescVirtToPhy(ETH_QUEUE_CTRL* pQueueCtrl, MV_U8* pDesc)
+{
+#if defined (ETH_DESCR_IN_SRAM)
+    if( ethDescInSram )
+        return mvSramVirtToPhy(pDesc);
+    else
+#endif /* ETH_DESCR_IN_SRAM */
+        return (pQueueCtrl->descBuf.bufPhysAddr + (pDesc - pQueueCtrl->descBuf.bufVirtPtr));
+}
+/* Return port handler */
+#define mvEthPortHndlGet(port)  ethPortCtrl[port]
+
+/* Used as WA for HW/SW race on TX */
+static INLINE int      mvEthPortTxEnable(void* pPortHndl, int queue, int max_deep)
+{
+    int                 deep = 0;
+    MV_U32              txCurrReg, txEnReg;
+    ETH_TX_DESC*        pTxLastDesc;
+    ETH_QUEUE_CTRL*     pQueueCtrl;
+    ETH_PORT_CTRL*      pPortCtrl = (ETH_PORT_CTRL*)pPortHndl;
+
+    txEnReg = MV_REG_VALUE(ETH_TX_QUEUE_COMMAND_REG(pPortCtrl->portNo));
+    if( (txEnReg & MV_32BIT_LE_FAST(ETH_TXQ_ENABLE_MASK)) == 0)
+    {
+        MV_REG_VALUE(ETH_TX_QUEUE_COMMAND_REG(pPortCtrl->portNo)) = pPortCtrl->portTxQueueCmdReg;
+        return 0;
+    }
+
+    pQueueCtrl = &pPortCtrl->txQueue[queue];
+    pTxLastDesc = pQueueCtrl->pCurrentDescr;
+    txCurrReg = MV_REG_READ(ETH_TX_CUR_DESC_PTR_REG(pPortCtrl->portNo, queue));
+    if(ethDescVirtToPhy(pQueueCtrl, (MV_U8*)pTxLastDesc) == txCurrReg)
+    {
+        /* All descriptors are processed, no chance for race */
+        return 0;
+    }
+
+    /* Check distance betwee HW and SW location: */
+    /* If distance between HW and SW pointers is less than max_deep descriptors */
+    /* Race condition is possible, so wait end of TX and restart TXQ */
+    while(deep < max_deep)
+    {
+        pTxLastDesc = TX_PREV_DESC_PTR(pTxLastDesc, pQueueCtrl);
+        if(ethDescVirtToPhy(pQueueCtrl, (MV_U8*)pTxLastDesc) == txCurrReg)
+        {
+            int count = 0;
+
+            while( (txEnReg & MV_32BIT_LE_FAST(ETH_TXQ_ENABLE_MASK)) != 0)
+            {   
+                count++;
+                if(count > 10000)
+                {
+                    mvOsPrintf("mvEthPortTxEnable: timeout - TXQ_CMD=0x%08x\n", 
+                                MV_REG_READ(ETH_TX_QUEUE_COMMAND_REG(pPortCtrl->portNo)) );
+                    break;
+                }
+                txEnReg = MV_REG_VALUE(ETH_TX_QUEUE_COMMAND_REG(pPortCtrl->portNo));
+            }
+
+            MV_REG_VALUE(ETH_TX_QUEUE_COMMAND_REG(pPortCtrl->portNo)) = pPortCtrl->portTxQueueCmdReg;
+            return count;
+        }
+        deep++;
+    }
+    /* Distance between HW and SW pointers is more than max_deep descriptors, */
+    /* So NO race condition - do nothing */
+    return -1;
+}
+
+
+/* defines  */
+#define ETH_CSUM_MIN_BYTE_COUNT     72
+
+/* Tailgate and Kirwood have only 2K TX FIFO */
+#if (MV_ETH_VERSION == 2) || (MV_ETH_VERSION == 4)
+#define ETH_CSUM_MAX_BYTE_COUNT     1600
+#else
+#define ETH_CSUM_MAX_BYTE_COUNT     9*1024
+#endif /* MV_ETH_VERSION */
+
+#define ETH_MV_HEADER_SIZE	    2
+#define ETH_MV_TX_EN
+
+/* An offest in Tx descriptors to store data for buffers less than 8 Bytes */
+#define MIN_TX_BUFF_LOAD            8
+#define TX_BUF_OFFSET_IN_DESC       (ETH_TX_DESC_ALIGNED_SIZE - MIN_TX_BUFF_LOAD)
+
+/* Default port configuration value */
+#define PORT_CONFIG_VALUE                       \
+             ETH_DEF_RX_QUEUE_MASK(0)       |   \
+             ETH_DEF_RX_ARP_QUEUE_MASK(0)   |   \
+             ETH_DEF_RX_TCP_QUEUE_MASK(0)   |   \
+             ETH_DEF_RX_UDP_QUEUE_MASK(0)   |   \
+             ETH_DEF_RX_BPDU_QUEUE_MASK(0)  |   \
+             ETH_RX_CHECKSUM_WITH_PSEUDO_HDR
+
+/* Default port extend configuration value */
+#define PORT_CONFIG_EXTEND_VALUE            0
+
+#define PORT_SERIAL_CONTROL_VALUE                           \
+            ETH_DISABLE_FC_AUTO_NEG_MASK                |   \
+            BIT9                                        |   \
+            ETH_DO_NOT_FORCE_LINK_FAIL_MASK             |   \
+            ETH_MAX_RX_PACKET_1552BYTE                  |   \
+            ETH_SET_FULL_DUPLEX_MASK
+
+#define PORT_SERIAL_CONTROL_100MB_FORCE_VALUE               \
+            ETH_FORCE_LINK_PASS_MASK                    |   \
+            ETH_DISABLE_DUPLEX_AUTO_NEG_MASK            |   \
+            ETH_DISABLE_FC_AUTO_NEG_MASK                |   \
+            BIT9                                        |   \
+            ETH_DO_NOT_FORCE_LINK_FAIL_MASK             |   \
+            ETH_DISABLE_SPEED_AUTO_NEG_MASK             |   \
+            ETH_SET_FULL_DUPLEX_MASK                    |   \
+            ETH_SET_MII_SPEED_100_MASK                  |   \
+            ETH_MAX_RX_PACKET_1552BYTE
+
+
+#define PORT_SERIAL_CONTROL_1000MB_FORCE_VALUE              \
+            ETH_FORCE_LINK_PASS_MASK                    |   \
+            ETH_DISABLE_DUPLEX_AUTO_NEG_MASK            |   \
+            ETH_DISABLE_FC_AUTO_NEG_MASK                |   \
+            BIT9                                        |   \
+            ETH_DO_NOT_FORCE_LINK_FAIL_MASK             |   \
+            ETH_DISABLE_SPEED_AUTO_NEG_MASK             |   \
+            ETH_SET_FULL_DUPLEX_MASK                    |   \
+            ETH_SET_GMII_SPEED_1000_MASK                |   \
+            ETH_MAX_RX_PACKET_1552BYTE
+
+#define PORT_SERIAL_CONTROL_SGMII_IBAN_VALUE                \
+            ETH_DISABLE_FC_AUTO_NEG_MASK                |   \
+            BIT9                                        |   \
+            ETH_IN_BAND_AN_EN_MASK                      |   \
+            ETH_DO_NOT_FORCE_LINK_FAIL_MASK             |   \
+            ETH_MAX_RX_PACKET_1552BYTE                  
+
+/* Function headers: */
+MV_VOID     mvEthSetSpecialMcastTable(int portNo, int queue);
+MV_STATUS   mvEthArpRxQueue(void* pPortHandle, int arpQueue);
+MV_STATUS   mvEthUdpRxQueue(void* pPortHandle, int udpQueue);
+MV_STATUS   mvEthTcpRxQueue(void* pPortHandle, int tcpQueue);
+MV_STATUS   mvEthMacAddrGet(int portNo, unsigned char *pAddr);
+MV_VOID     mvEthSetOtherMcastTable(int portNo, int queue);
+MV_STATUS   mvEthHeaderModeSet(void* pPortHandle, MV_ETH_HEADER_MODE headerMode);
+/* Interrupt Coalesting functions */
+MV_U32      mvEthRxCoalSet(void* pPortHndl, MV_U32 uSec);
+MV_U32      mvEthTxCoalSet(void* pPortHndl, MV_U32 uSec);
+MV_STATUS   mvEthCoalGet(void* pPortHndl, MV_U32* pRxCoal, MV_U32* pTxCoal);
+
+/******************************************************************************/
+/*                          Data Flow functions                               */
+/******************************************************************************/
+static INLINE void      mvEthPortTxRestart(void* pPortHndl)
+{
+    ETH_PORT_CTRL*      pPortCtrl = (ETH_PORT_CTRL*)pPortHndl;
+
+    MV_REG_VALUE(ETH_TX_QUEUE_COMMAND_REG(pPortCtrl->portNo)) = pPortCtrl->portTxQueueCmdReg;
+}
+
+/* Get number of Free resources in specific TX queue */
+static INLINE int     mvEthTxResourceGet(void* pPortHndl, int txQueue)
+{
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pPortHndl;
+
+    return (pPortCtrl->txQueue[txQueue].resource);      
+}
+
+/* Get number of Free resources in specific RX queue */
+static INLINE int     mvEthRxResourceGet(void* pPortHndl, int rxQueue)
+{
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pPortHndl;
+
+    return (pPortCtrl->rxQueue[rxQueue].resource);      
+}
+
+static INLINE int     mvEthTxQueueIsFull(void* pPortHndl, int txQueue)
+{
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pPortHndl;
+
+    if(pPortCtrl->txQueue[txQueue].resource == 0)
+        return MV_TRUE;
+
+    return MV_FALSE;
+}
+
+/* Get number of Free resources in specific RX queue */
+static INLINE int     mvEthRxQueueIsFull(void* pPortHndl, int rxQueue)
+{
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pPortHndl;
+    ETH_QUEUE_CTRL* pQueueCtrl = &pPortCtrl->rxQueue[rxQueue];
+
+    if( (pQueueCtrl->pUsedDescr == pQueueCtrl->pCurrentDescr) && 
+        (pQueueCtrl->resource != 0) )
+        return MV_TRUE;
+
+    return MV_FALSE;
+}
+
+static INLINE int     mvEthTxQueueIsEmpty(void* pPortHndl, int txQueue)
+{
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pPortHndl;
+    ETH_QUEUE_CTRL* pQueueCtrl = &pPortCtrl->txQueue[txQueue];
+
+    if( (pQueueCtrl->pUsedDescr == pQueueCtrl->pCurrentDescr) &&
+        (pQueueCtrl->resource != 0) )
+    {
+        return MV_TRUE;
+    }
+    return MV_FALSE;
+}
+
+/* Get number of Free resources in specific RX queue */
+static INLINE int     mvEthRxQueueIsEmpty(void* pPortHndl, int rxQueue)
+{
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pPortHndl;
+
+    if(pPortCtrl->rxQueue[rxQueue].resource == 0)
+        return MV_TRUE;
+
+    return MV_FALSE;
+}
+
+/*******************************************************************************
+* mvEthPortTx - Send an Ethernet packet
+*
+* DESCRIPTION:
+*       This routine send a given packet described by pPktInfo parameter. 
+*       Single buffer only.
+*
+* INPUT:
+*       void*       pEthPortHndl  - Ethernet Port handler.
+*       int         txQueue       - Number of Tx queue.
+*       MV_PKT_INFO *pPktInfo     - User packet to send.
+*
+* RETURN:
+*       MV_NO_RESOURCE  - No enough resources to send this packet.
+*       MV_ERROR        - Unexpected Fatal error.
+*       MV_OK           - Packet send successfully.
+*
+*******************************************************************************/
+static INLINE MV_STATUS   mvEthPortTx(void* pEthPortHndl, int txQueue, MV_PKT_INFO* pPktInfo)
+{
+    ETH_TX_DESC*    pTxCurrDesc;
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pEthPortHndl;
+    ETH_QUEUE_CTRL* pQueueCtrl;
+    int             portNo;
+    MV_BUF_INFO*    pBufInfo = pPktInfo->pFrags;
+
+#ifdef ETH_DEBUG
+    if(pPortCtrl->portState != MV_ACTIVE)
+        return MV_BAD_STATE;
+#endif /* ETH_DEBUG */
+
+    portNo = pPortCtrl->portNo;
+    pQueueCtrl = &pPortCtrl->txQueue[txQueue];
+
+    /* Get the Tx Desc ring indexes */
+    pTxCurrDesc = pQueueCtrl->pCurrentDescr;
+
+    /* Check if there is enough resources to send the packet */
+    if(pQueueCtrl->resource == 0)
+        return MV_NO_RESOURCE;
+
+    pTxCurrDesc->byteCnt = pBufInfo->dataSize;
+
+    /* Flush Buffer */
+    if(pPktInfo->pktSize != 0)
+    {
+#ifdef MV_NETBSD
+        pTxCurrDesc->bufPtr = pBufInfo->bufPhysAddr;
+	ETH_PACKET_CACHE_FLUSH(pBufInfo->bufVirtPtr, pPktInfo->pktSize);
+#else
+        pTxCurrDesc->bufPtr = ETH_PACKET_CACHE_FLUSH(pBufInfo->bufVirtPtr, pPktInfo->pktSize);
+#endif
+        pPktInfo->pktSize = 0;
+    }
+    else
+	 pTxCurrDesc->bufPtr = pBufInfo->bufPhysAddr;
+
+    pTxCurrDesc->returnInfo = (MV_ULONG)pPktInfo;
+
+    /* There is only one buffer in the packet */
+    /* The OSG might set some bits for checksum offload, so add them to first descriptor */
+    pTxCurrDesc->cmdSts = pPktInfo->status              |
+                          ETH_BUFFER_OWNED_BY_DMA       |
+                          ETH_TX_GENERATE_CRC_MASK      |
+                          ETH_TX_ENABLE_INTERRUPT_MASK  |
+                          ETH_TX_ZERO_PADDING_MASK      |
+                          ETH_TX_FIRST_DESC_MASK        |
+                          ETH_TX_LAST_DESC_MASK;
+
+    ETH_DESCR_FLUSH_INV(pPortCtrl, pTxCurrDesc);
+
+    pQueueCtrl->resource--;
+    pQueueCtrl->pCurrentDescr = TX_NEXT_DESC_PTR(pTxCurrDesc, pQueueCtrl);
+
+    /* Apply send command */
+    MV_REG_VALUE(ETH_TX_QUEUE_COMMAND_REG(portNo)) = pPortCtrl->portTxQueueCmdReg;
+
+    return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvEthPortSgTx - Send an Ethernet packet
+*
+* DESCRIPTION:
+*       This routine send a given packet described by pBufInfo parameter. It
+*       supports transmitting of a packet spaned over multiple buffers. 
+*
+* INPUT:
+*       void*       pEthPortHndl  - Ethernet Port handler.
+*       int         txQueue       - Number of Tx queue.
+*       MV_PKT_INFO *pPktInfo     - User packet to send.
+*
+* RETURN:
+*       MV_NO_RESOURCE  - No enough resources to send this packet.
+*       MV_ERROR        - Unexpected Fatal error.
+*       MV_OK           - Packet send successfully.
+*
+*******************************************************************************/
+static INLINE MV_STATUS   mvEthPortSgTx(void* pEthPortHndl, int txQueue, MV_PKT_INFO* pPktInfo)
+{
+    ETH_TX_DESC*    pTxFirstDesc;
+    ETH_TX_DESC*    pTxCurrDesc;
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pEthPortHndl;
+    ETH_QUEUE_CTRL* pQueueCtrl;
+    int             portNo, bufCount;
+    MV_BUF_INFO*    pBufInfo = pPktInfo->pFrags;
+    MV_U8*          pTxBuf;
+
+#ifdef ETH_DEBUG
+    if(pPortCtrl->portState != MV_ACTIVE)
+        return MV_BAD_STATE;
+#endif /* ETH_DEBUG */
+
+    portNo = pPortCtrl->portNo;
+    pQueueCtrl = &pPortCtrl->txQueue[txQueue];
+
+    /* Get the Tx Desc ring indexes */
+    pTxCurrDesc = pQueueCtrl->pCurrentDescr;
+
+    /* Check if there is enough resources to send the packet */
+    if(pQueueCtrl->resource < pPktInfo->numFrags)
+        return MV_NO_RESOURCE;
+
+    /* Remember first desc */
+    pTxFirstDesc  = pTxCurrDesc;
+
+    bufCount = 0;
+    while(MV_TRUE)
+    {   
+        if(pBufInfo[bufCount].dataSize <= MIN_TX_BUFF_LOAD)
+        {
+            /* Buffers with a payload smaller than MIN_TX_BUFF_LOAD (8 bytes) must be aligned    */
+            /* to 64-bit boundary. Two options here:                                             */
+            /* 1) Usually, copy the payload to the reserved 8 bytes inside descriptor.           */
+            /* 2) In the Half duplex workaround, the reserved 8 bytes inside descriptor are used */ 
+            /*    as a pointer to the aligned buffer, copy the small payload to this buffer.     */
+            pTxBuf = ((MV_U8*)pTxCurrDesc)+TX_BUF_OFFSET_IN_DESC;
+            mvOsBCopy(pBufInfo[bufCount].bufVirtPtr, pTxBuf, pBufInfo[bufCount].dataSize);
+            pTxCurrDesc->bufPtr = ethDescVirtToPhy(pQueueCtrl, pTxBuf);
+        }
+        else
+        {
+            /* Flush Buffer */
+#ifdef MV_NETBSD
+	     pTxCurrDesc->bufPtr = pBufInfo[bufCount].bufPhysAddr;
+	     ETH_PACKET_CACHE_FLUSH(pBufInfo[bufCount].bufVirtPtr, pBufInfo[bufCount].dataSize);
+#else
+	     pTxCurrDesc->bufPtr = ETH_PACKET_CACHE_FLUSH(pBufInfo[bufCount].bufVirtPtr, pBufInfo[bufCount].dataSize);
+#endif
+        }
+
+        pTxCurrDesc->byteCnt = pBufInfo[bufCount].dataSize;
+        bufCount++;
+
+        if(bufCount >= pPktInfo->numFrags)
+            break;
+
+        if(bufCount > 1)
+        {
+            /* There is middle buffer of the packet Not First and Not Last */
+            pTxCurrDesc->cmdSts = ETH_BUFFER_OWNED_BY_DMA;
+            ETH_DESCR_FLUSH_INV(pPortCtrl, pTxCurrDesc);
+        }
+        /* Go to next descriptor and next buffer */
+        pTxCurrDesc = TX_NEXT_DESC_PTR(pTxCurrDesc, pQueueCtrl);
+    }
+    /* Set last desc with DMA ownership and interrupt enable. */
+    pTxCurrDesc->returnInfo = (MV_ULONG)pPktInfo;
+    if(bufCount == 1) 
+    {
+        /* There is only one buffer in the packet */
+        /* The OSG might set some bits for checksum offload, so add them to first descriptor */
+        pTxCurrDesc->cmdSts = pPktInfo->status              |
+                              ETH_BUFFER_OWNED_BY_DMA       |
+                              ETH_TX_GENERATE_CRC_MASK      |
+                              ETH_TX_ENABLE_INTERRUPT_MASK  |
+                              ETH_TX_ZERO_PADDING_MASK      |
+                              ETH_TX_FIRST_DESC_MASK        |
+                              ETH_TX_LAST_DESC_MASK;
+
+        ETH_DESCR_FLUSH_INV(pPortCtrl, pTxCurrDesc);
+    }
+    else
+    {
+        /* Last but not First */
+        pTxCurrDesc->cmdSts = ETH_BUFFER_OWNED_BY_DMA       |
+                              ETH_TX_ENABLE_INTERRUPT_MASK  |
+                              ETH_TX_ZERO_PADDING_MASK      |
+                              ETH_TX_LAST_DESC_MASK;
+
+        ETH_DESCR_FLUSH_INV(pPortCtrl, pTxCurrDesc);
+
+        /* Update First when more than one buffer in the packet */
+        /* The OSG might set some bits for checksum offload, so add them to first descriptor */
+        pTxFirstDesc->cmdSts = pPktInfo->status             |
+                               ETH_BUFFER_OWNED_BY_DMA      |
+                               ETH_TX_GENERATE_CRC_MASK     |
+                               ETH_TX_FIRST_DESC_MASK;
+
+        ETH_DESCR_FLUSH_INV(pPortCtrl, pTxFirstDesc);
+    }
+    /* Update txQueue state */
+    pQueueCtrl->resource -= bufCount;
+    pQueueCtrl->pCurrentDescr = TX_NEXT_DESC_PTR(pTxCurrDesc, pQueueCtrl);
+
+    /* Apply send command */
+    MV_REG_VALUE(ETH_TX_QUEUE_COMMAND_REG(portNo)) = pPortCtrl->portTxQueueCmdReg;
+
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvEthPortTxDone - Free all used Tx descriptors and mBlks.
+*
+* DESCRIPTION:
+*       This routine returns the transmitted packet information to the caller.
+*
+* INPUT:
+*       void*       pEthPortHndl    - Ethernet Port handler.
+*       int         txQueue         - Number of Tx queue.
+*
+* OUTPUT:
+*       MV_PKT_INFO *pPktInfo       - Pointer to packet was sent.
+*
+* RETURN:
+*       MV_NOT_FOUND    - No transmitted packets to return. Transmit in progress.
+*       MV_EMPTY        - No transmitted packets to return. TX Queue is empty.
+*       MV_ERROR        - Unexpected Fatal error.
+*       MV_OK           - There is transmitted packet in the queue, 
+*                       'pPktInfo' filled with relevant information.
+*
+*******************************************************************************/
+static INLINE MV_PKT_INFO*    mvEthPortTxDone(void* pEthPortHndl, int txQueue)
+{
+    ETH_TX_DESC*    pTxCurrDesc;
+    ETH_TX_DESC*    pTxUsedDesc;
+    ETH_QUEUE_CTRL* pQueueCtrl;
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pEthPortHndl;
+    MV_PKT_INFO*    pPktInfo;
+    MV_U32          commandStatus;
+
+    pQueueCtrl = &pPortCtrl->txQueue[txQueue];
+
+    pTxUsedDesc = pQueueCtrl->pUsedDescr;
+    pTxCurrDesc = pQueueCtrl->pCurrentDescr;
+
+    while(MV_TRUE)
+    {
+        /* No more used descriptors */
+        commandStatus = pTxUsedDesc->cmdSts;
+        if (commandStatus  & (ETH_BUFFER_OWNED_BY_DMA))
+        {           
+            ETH_DESCR_INV(pPortCtrl, pTxUsedDesc);
+            return NULL;
+        }
+        if( (pTxUsedDesc == pTxCurrDesc) &&
+            (pQueueCtrl->resource != 0) )
+        {
+            return NULL;
+        }
+        pQueueCtrl->resource++;
+        pQueueCtrl->pUsedDescr = TX_NEXT_DESC_PTR(pTxUsedDesc, pQueueCtrl);
+        if(commandStatus & (ETH_TX_LAST_DESC_MASK)) 
+        {
+            pPktInfo = (MV_PKT_INFO*)pTxUsedDesc->returnInfo;
+            pPktInfo->status  = commandStatus;            
+            return pPktInfo;
+        }
+        pTxUsedDesc = pQueueCtrl->pUsedDescr;
+    }
+}
+
+/*******************************************************************************
+* mvEthPortRx - Get new received packets from Rx queue.
+*
+* DESCRIPTION:
+*       This routine returns the received data to the caller. There is no
+*       data copying during routine operation. All information is returned
+*       using pointer to packet information struct passed from the caller.
+*
+* INPUT:
+*       void*       pEthPortHndl    - Ethernet Port handler.
+*       int         rxQueue         - Number of Rx queue.
+*
+* OUTPUT:
+*       MV_PKT_INFO *pPktInfo       - Pointer to received packet.
+*
+* RETURN:
+*       MV_NO_RESOURCE  - No free resources in RX queue.
+*       MV_ERROR        - Unexpected Fatal error.
+*       MV_OK           - New packet received and 'pBufInfo' structure filled
+*                       with relevant information.
+*
+*******************************************************************************/
+static INLINE MV_PKT_INFO*    mvEthPortRx(void* pEthPortHndl, int rxQueue)
+{
+    ETH_RX_DESC     *pRxCurrDesc;
+    MV_U32          commandStatus;
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pEthPortHndl;
+    ETH_QUEUE_CTRL* pQueueCtrl;
+    MV_PKT_INFO*    pPktInfo;
+
+    pQueueCtrl = &(pPortCtrl->rxQueue[rxQueue]);
+
+    /* Check resources */
+    if(pQueueCtrl->resource == 0)
+    {
+        mvOsPrintf("ethPortRx: no more resources\n");
+        return NULL;
+    }
+    while(MV_TRUE)
+    {
+        /* Get the Rx Desc ring 'curr and 'used' indexes */
+        pRxCurrDesc = pQueueCtrl->pCurrentDescr;
+    
+        commandStatus   = pRxCurrDesc->cmdSts;
+        if (commandStatus & (ETH_BUFFER_OWNED_BY_DMA))
+        {
+            /* Nothing to receive... */
+            ETH_DESCR_INV(pPortCtrl, pRxCurrDesc);
+            return NULL;
+        }
+        
+        /* Valid RX only if FIRST and LAST bits are set */
+        if( (commandStatus & (ETH_RX_LAST_DESC_MASK | ETH_RX_FIRST_DESC_MASK)) == 
+                             (ETH_RX_LAST_DESC_MASK | ETH_RX_FIRST_DESC_MASK) )
+        {
+            pPktInfo = (MV_PKT_INFO*)pRxCurrDesc->returnInfo;
+            pPktInfo->pFrags->dataSize  = pRxCurrDesc->byteCnt - 4;
+            pPktInfo->status            = commandStatus;
+            pPktInfo->fragIP            = pRxCurrDesc->bufSize & ETH_RX_IP_FRAGMENTED_FRAME_MASK;
+
+            pQueueCtrl->resource--;
+            /* Update 'curr' in data structure */
+            pQueueCtrl->pCurrentDescr = RX_NEXT_DESC_PTR(pRxCurrDesc, pQueueCtrl);
+
+#ifdef INCLUDE_SYNC_BARR
+            mvCpuIfSyncBarr(DRAM_TARGET);
+#endif
+            return pPktInfo;
+        }
+        else
+        {
+            ETH_RX_DESC*    pRxUsedDesc = pQueueCtrl->pUsedDescr;
+
+#ifdef ETH_DEBUG
+            mvOsPrintf("ethDrv: Unexpected Jumbo frame: "
+                       "status=0x%08x, byteCnt=%d, pData=0x%x\n", 
+                        commandStatus, pRxCurrDesc->byteCnt, pRxCurrDesc->bufPtr);
+#endif /* ETH_DEBUG */
+
+            /* move buffer from pCurrentDescr position to pUsedDescr position */
+            pRxUsedDesc->bufPtr     = pRxCurrDesc->bufPtr;
+            pRxUsedDesc->returnInfo = pRxCurrDesc->returnInfo;
+            pRxUsedDesc->bufSize    = pRxCurrDesc->bufSize & ETH_RX_BUFFER_MASK;
+
+            /* Return the descriptor to DMA ownership */
+            pRxUsedDesc->cmdSts = ETH_BUFFER_OWNED_BY_DMA | 
+                                  ETH_RX_ENABLE_INTERRUPT_MASK;
+
+            /* Flush descriptor and CPU pipe */
+            ETH_DESCR_FLUSH_INV(pPortCtrl, pRxUsedDesc);
+
+            /* Move the used descriptor pointer to the next descriptor */
+            pQueueCtrl->pUsedDescr = RX_NEXT_DESC_PTR(pRxUsedDesc, pQueueCtrl);
+            pQueueCtrl->pCurrentDescr = RX_NEXT_DESC_PTR(pRxCurrDesc, pQueueCtrl);            
+        }
+    }
+}
+
+/*******************************************************************************
+* mvEthPortRxDone - Returns a Rx buffer back to the Rx ring.
+*
+* DESCRIPTION:
+*       This routine returns a Rx buffer back to the Rx ring. 
+*
+* INPUT:
+*       void*       pEthPortHndl    - Ethernet Port handler.
+*       int         rxQueue         - Number of Rx queue.
+*       MV_PKT_INFO *pPktInfo       - Pointer to received packet.
+*
+* RETURN:
+*       MV_ERROR        - Unexpected Fatal error.
+*       MV_OUT_OF_RANGE - RX queue is already FULL, so this buffer can't be 
+*                       returned to this queue.
+*       MV_FULL         - Buffer returned successfully and RX queue became full.
+*                       More buffers should not be returned at the time.
+*       MV_OK           - Buffer returned successfully and there are more free 
+*                       places in the queue.
+*
+*******************************************************************************/
+static INLINE MV_STATUS   mvEthPortRxDone(void* pEthPortHndl, int rxQueue, MV_PKT_INFO *pPktInfo)
+{
+    ETH_RX_DESC*    pRxUsedDesc;
+    ETH_QUEUE_CTRL* pQueueCtrl;
+    ETH_PORT_CTRL*  pPortCtrl = (ETH_PORT_CTRL*)pEthPortHndl;
+            
+    pQueueCtrl = &pPortCtrl->rxQueue[rxQueue];
+
+    /* Get 'used' Rx descriptor */
+    pRxUsedDesc = pQueueCtrl->pUsedDescr;
+
+    /* Check that ring is not FULL */
+    if( (pQueueCtrl->pUsedDescr == pQueueCtrl->pCurrentDescr) && 
+        (pQueueCtrl->resource != 0) )
+    {
+        mvOsPrintf("%s %d: out of range Error resource=%d, curr=%p, used=%p\n", 
+                    __FUNCTION__, pPortCtrl->portNo, pQueueCtrl->resource, 
+                    pQueueCtrl->pCurrentDescr, pQueueCtrl->pUsedDescr);
+        return MV_OUT_OF_RANGE;
+    }
+
+    pRxUsedDesc->bufPtr     = pPktInfo->pFrags->bufPhysAddr;
+    pRxUsedDesc->returnInfo = (MV_ULONG)pPktInfo;
+    pRxUsedDesc->bufSize    = pPktInfo->pFrags->bufSize & ETH_RX_BUFFER_MASK;
+
+    /* Invalidate data buffer accordingly with pktSize */
+    if(pPktInfo->pktSize != 0)
+    {
+        ETH_PACKET_CACHE_INVALIDATE(pPktInfo->pFrags->bufVirtPtr, pPktInfo->pktSize);
+        pPktInfo->pktSize = 0;
+    }
+
+    /* Return the descriptor to DMA ownership */
+    pRxUsedDesc->cmdSts = ETH_BUFFER_OWNED_BY_DMA | ETH_RX_ENABLE_INTERRUPT_MASK;
+
+    /* Flush descriptor and CPU pipe */
+    ETH_DESCR_FLUSH_INV(pPortCtrl, pRxUsedDesc);
+
+    pQueueCtrl->resource++;
+
+    /* Move the used descriptor pointer to the next descriptor */
+    pQueueCtrl->pUsedDescr = RX_NEXT_DESC_PTR(pRxUsedDesc, pQueueCtrl);
+    
+    /* If ring became Full return MV_FULL */
+    if(pQueueCtrl->pUsedDescr == pQueueCtrl->pCurrentDescr) 
+        return MV_FULL;
+
+    return MV_OK;
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* __mvEthGbe_h__ */
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/mvUsbAddrDec.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/mvUsbAddrDec.c
@@ -0,0 +1,339 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+        this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvUsbRegs.h"
+#include "mvUsb.h"
+
+MV_TARGET usbAddrDecPrioTab[] =
+{
+#if defined(MV_INCLUDE_SDRAM_CS0)
+    SDRAM_CS0,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS1)
+    SDRAM_CS1,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS2)
+    SDRAM_CS2,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS3)
+    SDRAM_CS3,
+#endif
+#if defined(MV_INCLUDE_CESA) && defined(USB_UNDERRUN_WA)
+    CRYPT_ENG,
+#endif
+#if defined(MV_INCLUDE_PEX)
+    PEX0_MEM,
+    PEX1_MEM,
+#endif
+    TBL_TERM
+};
+
+
+
+/*******************************************************************************
+* usbWinOverlapDetect - Detect USB address windows overlapping
+*
+* DESCRIPTION:
+*       An unpredicted behaviur is expected in case USB address decode
+*       windows overlapps.
+*       This function detects USB address decode windows overlapping of a
+*       specified window. The function does not check the window itself for
+*       overlapping. The function also skipps disabled address decode windows.
+*
+* INPUT:
+*       winNum      - address decode window number.
+*       pAddrDecWin - An address decode window struct.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE if the given address window overlap current address
+*       decode map, MV_FALSE otherwise, MV_ERROR if reading invalid data
+*       from registers.
+*
+*******************************************************************************/
+static MV_STATUS usbWinOverlapDetect(int dev, MV_U32 winNum,
+                                     MV_ADDR_WIN *pAddrWin)
+{
+    MV_U32		winNumIndex;
+    MV_UNIT_WIN_INFO	addrDecWin;
+
+    for(winNumIndex=0; winNumIndex<MV_USB_MAX_ADDR_DECODE_WIN; winNumIndex++)
+    {
+        /* Do not check window itself       */
+        if (winNumIndex == winNum)
+        {
+            continue;
+        }
+
+        /* Get window parameters    */
+        if (MV_OK != mvUsbWinRead(dev, winNumIndex, &addrDecWin))
+        {
+            mvOsPrintf("%s: ERR. TargetWinGet failed\n", __FUNCTION__);
+            return MV_ERROR;
+        }
+
+        /* Do not check disabled windows    */
+        if(addrDecWin.enable == MV_FALSE)
+            continue;
+
+        if (MV_TRUE == mvWinOverlapTest(pAddrWin, &(addrDecWin.addrWin)))
+            return MV_TRUE;
+    }
+    return MV_FALSE;
+}
+
+/*******************************************************************************
+* mvUsbWinWrite - Set USB target address window
+*
+* DESCRIPTION:
+*       This function sets a peripheral target (e.g. SDRAM bank0, PCI_MEM0)
+*       address window, also known as address decode window.
+*       After setting this target window, the USB will be able to access the
+*       target within the address window.
+*
+* INPUT:
+*       winNum      - USB target address decode window number.
+*       pAddrDecWin - USB target window data structure.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_ERROR if address window overlapps with other address decode windows.
+*       MV_BAD_PARAM if base address is invalid parameter or target is
+*       unknown.
+*
+*******************************************************************************/
+MV_STATUS mvUsbWinWrite(int dev, MV_U32 winNum, MV_UNIT_WIN_INFO *pDecWin)
+{
+    MV_U32  sizeReg, baseReg;
+    MV_U32  size;
+
+    /* Parameter checking   */
+    if (winNum >= MV_USB_MAX_ADDR_DECODE_WIN)
+    {
+        mvOsPrintf("%s: ERR. Invalid win num %d\n",__FUNCTION__, winNum);
+        return MV_BAD_PARAM;
+    }
+
+    /* Check if the requested window overlapps with current windows         */
+    if (MV_TRUE == usbWinOverlapDetect(dev, winNum, &pDecWin->addrWin))
+    {
+        mvOsPrintf("%s: ERR. Window %d overlap\n", __FUNCTION__, winNum);
+        return MV_ERROR;
+    }
+
+    /* check if address is aligned to the size */
+    if(MV_IS_NOT_ALIGN(pDecWin->addrWin.baseLow, pDecWin->addrWin.size))
+    {
+        mvOsPrintf("mvUsbWinWrite:Error setting USB window %d.\n"\
+                   "Address 0x%08x is unaligned to size 0x%x.\n",
+                   winNum,
+                   pDecWin->addrWin.baseLow,
+                   pDecWin->addrWin.size);
+        return MV_ERROR;
+    }
+
+    if(!MV_IS_POWER_OF_2(pDecWin->addrWin.size)) {
+	mvOsPrintf("mvUsbWinWrite: Bad windows size.\n");
+	return MV_BAD_PARAM;
+    }
+
+    size = pDecWin->addrWin.size / MV_USB_WIN_SIZE_ALIGN - 1;
+
+    /* set Size, Attributes and TargetID */
+    sizeReg = (((pDecWin->targetId << MV_USB_WIN_TARGET_OFFSET) & MV_USB_WIN_TARGET_MASK) |
+               ((pDecWin->attrib   << MV_USB_WIN_ATTR_OFFSET)   & MV_USB_WIN_ATTR_MASK)   |
+               ((size << MV_USB_WIN_SIZE_OFFSET) & MV_USB_WIN_SIZE_MASK));
+
+#if defined(MV645xx) || defined(MV646xx)
+    /* If window is DRAM with HW cache coherency, make sure bit2 is set */
+    sizeReg &= ~MV_USB_WIN_BURST_WR_LIMIT_MASK;
+
+    if((MV_TARGET_IS_DRAM(pDecWin->target)) &&
+       (pDecWin->addrWinAttr.cachePolicy != NO_COHERENCY))
+    {
+        sizeReg |= MV_USB_WIN_BURST_WR_32BIT_LIMIT;
+    }
+    else
+    {
+        sizeReg |= MV_USB_WIN_BURST_WR_NO_LIMIT;
+    }
+#endif /* MV645xx || MV646xx */
+
+    if (pDecWin->enable == MV_TRUE)
+        sizeReg |= MV_USB_WIN_ENABLE_MASK;
+    else
+        sizeReg &= ~MV_USB_WIN_ENABLE_MASK;
+
+    /* Update Base value  */
+    baseReg = (pDecWin->addrWin.baseLow & MV_USB_WIN_BASE_MASK);
+
+    MV_REG_WRITE( MV_USB_WIN_CTRL_REG(dev, winNum), sizeReg);
+    MV_REG_WRITE( MV_USB_WIN_BASE_REG(dev, winNum), baseReg);
+
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvUsbWinRead - Get USB peripheral target address window.
+*
+* DESCRIPTION:
+*       Get USB peripheral target address window.
+*
+* INPUT:
+*       winNum - USB target address decode window number.
+*
+* OUTPUT:
+*       pDecWin - USB target window data structure.
+*
+* RETURN:
+*       MV_ERROR if register parameters are invalid.
+*
+*******************************************************************************/
+MV_STATUS mvUsbWinRead(int dev, MV_U32 winNum, MV_UNIT_WIN_INFO *pDecWin)
+{
+    MV_U32              sizeReg, baseReg;
+
+    /* Parameter checking   */
+    if (winNum >= MV_USB_MAX_ADDR_DECODE_WIN)
+    {
+        mvOsPrintf("%s (dev=%d): ERR. Invalid winNum %d\n",
+                    __FUNCTION__, dev, winNum);
+        return MV_NOT_SUPPORTED;
+    }
+
+    baseReg = MV_REG_READ( MV_USB_WIN_BASE_REG(dev, winNum) );
+    sizeReg = MV_REG_READ( MV_USB_WIN_CTRL_REG(dev, winNum) );
+
+   /* Check if window is enabled   */
+    if(sizeReg & MV_USB_WIN_ENABLE_MASK)
+    {
+        pDecWin->enable = MV_TRUE;
+
+        /* Extract window parameters from registers */
+        pDecWin->targetId = (sizeReg & MV_USB_WIN_TARGET_MASK) >> MV_USB_WIN_TARGET_OFFSET;
+        pDecWin->attrib   = (sizeReg & MV_USB_WIN_ATTR_MASK) >> MV_USB_WIN_ATTR_OFFSET;
+        pDecWin->addrWin.size = (sizeReg & MV_USB_WIN_SIZE_MASK) >> MV_USB_WIN_SIZE_OFFSET;
+	pDecWin->addrWin.size = (pDecWin->addrWin.size + 1) * MV_USB_WIN_SIZE_ALIGN;
+        pDecWin->addrWin.baseLow = (baseReg & MV_USB_WIN_BASE_MASK);
+	pDecWin->addrWin.baseHigh = 0;
+    }
+    else
+    {
+        pDecWin->enable = MV_FALSE;
+    }
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvUsbWinInit -
+*
+* INPUT:
+*
+* OUTPUT:
+*
+* RETURN:
+*       MV_ERROR if register parameters are invalid.
+*
+*******************************************************************************/
+MV_STATUS   mvUsbWinInit(MV_U32 dev, MV_UNIT_WIN_INFO *addrWinMap)
+{
+    MV_UNIT_WIN_INFO	*addrDecWin;
+    MV_U32		winNum;
+    MV_U32		winPrioIndex = 0;
+
+    /* First disable all address decode windows */
+    for(winNum = 0; winNum < MV_USB_MAX_ADDR_DECODE_WIN; winNum++)
+    {
+        MV_REG_BIT_RESET(MV_USB_WIN_CTRL_REG(dev, winNum), MV_USB_WIN_ENABLE_MASK);
+    }
+
+    /* Go through all windows in user table until table terminator          */
+    winNum = 0;
+    while( (usbAddrDecPrioTab[winPrioIndex] != TBL_TERM) &&
+           (winNum < MV_USB_MAX_ADDR_DECODE_WIN) )
+    {
+	addrDecWin = &addrWinMap[usbAddrDecPrioTab[winPrioIndex]];
+        if (addrDecWin->enable == MV_TRUE)
+        {
+#if defined(MV645xx) || defined(MV646xx)
+            /* Get the default attributes for that target window */
+            mvCtrlDefAttribGet(usbWin.target, &usbWin.addrWinAttr);
+#endif /* MV645xx || MV646xx */
+
+            if(MV_OK != mvUsbWinWrite(dev, winNum, addrDecWin))
+                return MV_ERROR;
+            winNum++;
+        }
+        winPrioIndex++;
+    }
+    return MV_OK;
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/mvUsbRegs.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/mvUsbRegs.h
@@ -0,0 +1,227 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+        this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCmvUsbRegsh
+#define __INCmvUsbRegsh
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+#include "mvSysUsbConfig.h"
+
+/*******************************************/
+/* USB ARC Core Registers                  */
+/*******************************************/
+#define MV_USB_CORE_ID_REG(dev)                 (MV_USB_REGS_BASE(dev) + 0x00)
+#define MV_USB_CORE_GENERAL_REG(dev)            (MV_USB_REGS_BASE(dev) + 0x04)
+#define MV_USB_CORE_HOST_REG(dev)               (MV_USB_REGS_BASE(dev) + 0x08)
+#define MV_USB_CORE_DEVICE_REG(dev)             (MV_USB_REGS_BASE(dev) + 0x0C)
+#define MV_USB_CORE_TX_BUF_REG(dev)             (MV_USB_REGS_BASE(dev) + 0x10)
+#define MV_USB_CORE_RX_BUF_REG(dev)             (MV_USB_REGS_BASE(dev) + 0x14)
+#define MV_USB_CORE_TTTX_BUF_REG(dev)           (MV_USB_REGS_BASE(dev) + 0x18)
+#define MV_USB_CORE_TTRX_BUF_REG(dev)           (MV_USB_REGS_BASE(dev) + 0x1C)
+
+#define MV_USB_CORE_CAP_LENGTH_REG(dev)         (MV_USB_REGS_BASE(dev) + 0x100)
+#define MV_USB_CORE_CAP_HCS_PARAMS_REG(dev)     (MV_USB_REGS_BASE(dev) + 0x104)
+#define MV_USB_CORE_CAP_HCC_PARAMS_REG(dev)     (MV_USB_REGS_BASE(dev) + 0x108)
+
+#define MV_USB_CORE_CAP_DCI_VERSION_REG(dev)    (MV_USB_REGS_BASE(dev) + 0x120)
+#define MV_USB_CORE_CAP_DCC_PARAMS_REG(dev)     (MV_USB_REGS_BASE(dev) + 0x124)
+
+#define MV_USB_CORE_CMD_REG(dev)                (MV_USB_REGS_BASE(dev) + 0x140)
+
+#define MV_USB_CORE_CMD_RUN_BIT             0
+#define MV_USB_CORE_CMD_RUN_MASK            (1 << MV_USB_CORE_CMD_RUN_BIT)
+
+#define MV_USB_CORE_CMD_RESET_BIT           1
+#define MV_USB_CORE_CMD_RESET_MASK          (1 << MV_USB_CORE_CMD_RESET_BIT)
+
+#define MV_USB_CORE_STATUS_REG(dev)             (MV_USB_REGS_BASE(dev) + 0x144)
+#define MV_USB_CORE_INTR_REG(dev)               (MV_USB_REGS_BASE(dev) + 0x148)
+#define MV_USB_CORE_FRAME_INDEX_REG(dev)        (MV_USB_REGS_BASE(dev) + 0x14C)
+
+#define MV_USB_CORE_PERIODIC_LIST_BASE_REG(dev) (MV_USB_REGS_BASE(dev) + 0x154)
+#define MV_USB_CORE_DEV_ADDR_REG(dev)           (MV_USB_REGS_BASE(dev) + 0x154)
+
+#define MV_USB_CORE_ASYNC_LIST_ADDR_REG(dev)    (MV_USB_REGS_BASE(dev) + 0x158)
+#define MV_USB_CORE_ENDPOINT_LIST_ADDR_REG(dev) (MV_USB_REGS_BASE(dev) + 0x158)
+
+#define MV_USB_CORE_TT_CTRL_REG(dev)            (MV_USB_REGS_BASE(dev) + 0x15C)
+#define MV_USB_CORE_BURST_SIZE_REG(dev)         (MV_USB_REGS_BASE(dev) + 0x160)
+#define MV_USB_CORE_TX_FILL_TUNING_REG(dev)     (MV_USB_REGS_BASE(dev) + 0x164)
+#define MV_USB_CORE_TX_TT_FILL_TUNING_REG(dev)  (MV_USB_REGS_BASE(dev) + 0x168)
+#define MV_USB_CORE_CONFIG_FLAG_REG(dev)        (MV_USB_REGS_BASE(dev) + 0x180)
+#define MV_USB_CORE_PORTSC_REG(dev)             (MV_USB_REGS_BASE(dev) + 0x184)
+#define MV_USB_CORE_OTGSC_REG(dev)              (MV_USB_REGS_BASE(dev) + 0x1A4)
+
+#define MV_USB_CORE_MODE_REG(dev)               (MV_USB_REGS_BASE(dev) + 0x1A8)
+
+#define MV_USB_CORE_MODE_OFFSET                 0
+#define MV_USB_CORE_MODE_MASK                   (3 << MV_USB_CORE_MODE_OFFSET)
+#define MV_USB_CORE_MODE_HOST                   (3 << MV_USB_CORE_MODE_OFFSET)
+#define MV_USB_CORE_MODE_DEVICE                 (2 << MV_USB_CORE_MODE_OFFSET)
+
+/* Bit[2] (ES) - don't care */
+
+#define MV_USB_CORE_SETUP_LOCK_DISABLE_BIT      3
+#define MV_USB_CORE_SETUP_LOCK_DISABLE_MASK     (1 << MV_USB_CORE_SETUP_LOCK_DISABLE_BIT)
+
+#define MV_USB_CORE_STREAM_DISABLE_BIT          4
+#define MV_USB_CORE_STREAM_DISABLE_MASK         (1 << MV_USB_CORE_STREAM_DISABLE_BIT)
+
+
+#define MV_USB_CORE_ENDPT_SETUP_STAT_REG(dev)    (MV_USB_REGS_BASE(dev) + 0x1AC)
+#define MV_USB_CORE_ENDPT_PRIME_REG(dev)         (MV_USB_REGS_BASE(dev) + 0x1B0)
+#define MV_USB_CORE_ENDPT_FLUSH_REG(dev)         (MV_USB_REGS_BASE(dev) + 0x1B4)
+#define MV_USB_CORE_ENDPT_STATUS_REG(dev)        (MV_USB_REGS_BASE(dev) + 0x1B8)
+#define MV_USB_CORE_ENDPT_COMPLETE_REG(dev)      (MV_USB_REGS_BASE(dev) + 0x1BC)
+#define MV_USB_CORE_ENDPT_CTRL_REG(dev, ep)      (MV_USB_REGS_BASE(dev) + 0x1C0 + (ep*4))
+
+/*******************************************/
+/* Interrupt Controller Registers          */
+/*******************************************/
+#define USB_CAUSE_REG(dev)                  (MV_USB_REGS_BASE(dev) + 0x310)
+#define USB_MASK_REG(dev)                   (MV_USB_REGS_BASE(dev) + 0x314)
+#define USB_ERROR_ADDR_REG(dev)             (MV_USB_REGS_BASE(dev) + 0x31c)
+
+#define MV_USB_BRIDGE_INTR_CAUSE_REG(dev)        (MV_USB_REGS_BASE(dev) + 0x310)
+#define MV_USB_BRIDGE_INTR_MASK_REG(dev)         (MV_USB_REGS_BASE(dev) + 0x314)
+
+/*******************************************/
+/* USB Bridge Registers                    */
+/*******************************************/
+
+/* BITs in Bridge Interrupt Cause and Mask registers */
+#define MV_USB_ADDR_DECODE_ERROR_BIT        0
+#define MV_USB_ADDR_DECODE_ERROR_MASK       (1<<MV_USB_ADDR_DECODE_ERROR_BIT)
+
+#define MV_USB_BRIDGE_ERROR_ADDR_REG(dev)        (MV_USB_REGS_BASE(dev) + 0x31C)
+
+#define MV_USB_BRIDGE_CTRL_REG(dev)              (MV_USB_REGS_BASE(dev) + 0x300)
+#define MV_USB_BRIDGE_CORE_BYTE_SWAP_OFFSET 4
+#define MV_USB_BRIDGE_CORE_BYTE_SWAP_MASK   (1 << MV_USB_BRIDGE_CORE_BYTE_SWAP_OFFSET)
+#define MV_USB_BRIDGE_CORE_BYTE_SWAP_EN     (0 << MV_USB_BRIDGE_CORE_BYTE_SWAP_OFFSET)
+
+#define MV_USB_BRIDGE_IPG_REG(dev)          (MV_USB_REGS_BASE(dev) + 0x360)
+
+/*******************************************/
+/* USB PHY Registers                       */
+/*******************************************/
+
+#define MV_USB_PHY_POWER_CTRL_REG(dev)          (MV_USB_REGS_BASE(dev) + 0x400)
+
+#define MV_USB_PHY_POWER_UP_BIT                 0
+#define MV_USB_PHY_POWER_UP_MASK                (1<<MV_USB_PHY_POWER_UP_BIT)
+
+#define MV_USB_PHY_PLL_POWER_UP_BIT             1
+#define MV_USB_PHY_PLL_POWER_UP_MASK            (1<<MV_USB_PHY_PLL_POWER_UP_BIT)
+
+#define MV_USB_PHY_PLL_CTRL_REG(dev)            (MV_USB_REGS_BASE(dev) + 0x410)
+#define MV_USB_PHY_TX_CTRL_REG(dev)             (MV_USB_REGS_BASE(dev) + 0x420) 
+#define MV_USB_PHY_RX_CTRL_REG(dev)             (MV_USB_REGS_BASE(dev) + 0x430) 
+#define MV_USB_PHY_IVREF_CTRL_REG(dev)          (MV_USB_REGS_BASE(dev) + 0x440) 
+#define MV_USB_PHY_TEST_GROUP_CTRL_REG_0(dev)   (MV_USB_REGS_BASE(dev) + 0x450) 
+#define MV_USB_PHY_TEST_GROUP_CTRL_REG_1(dev)   (MV_USB_REGS_BASE(dev) + 0x454) 
+
+
+
+
+/*******************************************/
+/* USB Windows Registers		   */
+/*******************************************/
+#define MV_USB_MAX_ADDR_DECODE_WIN  4
+
+#define MV_USB_WIN_CTRL_REG(dev, win)        (MV_USB_REGS_BASE(dev) + 0x320 + ((win)<<4)) 
+#define MV_USB_WIN_BASE_REG(dev, win)        (MV_USB_REGS_BASE(dev) + 0x324 + ((win)<<4))
+
+/* BITs in Windows 0-3 Control and Base Registers */
+#define MV_USB_WIN_ENABLE_BIT               0
+#define MV_USB_WIN_ENABLE_MASK              (1 << MV_USB_WIN_ENABLE_BIT)
+
+#define MV_USB_WIN_BURST_WR_LIMIT_BIT       1
+#define MV_USB_WIN_BURST_WR_LIMIT_MASK      (1 << MV_USB_WIN_BURST_WR_LIMIT_BIT)
+#define MV_USB_WIN_BURST_WR_NO_LIMIT        (0 << MV_USB_WIN_BURST_WR_LIMIT_BIT)
+#define MV_USB_WIN_BURST_WR_32BIT_LIMIT     (1 << MV_USB_WIN_BURST_WR_LIMIT_BIT)
+
+#define MV_USB_WIN_TARGET_OFFSET            4
+#define MV_USB_WIN_TARGET_MASK              (0xF << MV_USB_WIN_TARGET_OFFSET)
+
+#define MV_USB_WIN_ATTR_OFFSET              8
+#define MV_USB_WIN_ATTR_MASK                (0xFF << MV_USB_WIN_ATTR_OFFSET)
+
+#define MV_USB_WIN_SIZE_OFFSET              16
+#define MV_USB_WIN_SIZE_MASK                (0xFFFF << MV_USB_WIN_SIZE_OFFSET)
+
+#define MV_USB_WIN_BASE_OFFSET              16
+#define MV_USB_WIN_BASE_MASK                (0xFFFF << MV_USB_WIN_BASE_OFFSET)
+
+#define MV_USB_WIN_SIZE_ALIGN		    _64K
+#define MV_USB_BRIDGE_IPG_REG(dev)          (MV_USB_REGS_BASE(dev) + 0x360)
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* __INCmvUsbRegsh */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/Makefile
@@ -0,0 +1,4 @@
+include $(srctree)/$(subst ",,$(CONFIG_MV_HAL_RULES_PATH))
+# Objects list
+obj-$(CONFIG_MV_INCLUDE_USB) += mvUsb.o
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/mvCompVer.txt
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/mvCompVer.txt
@@ -0,0 +1,4 @@
+Global HAL Version: DOVE_HAL_3_1_2
+Unit HAL Version: 1.0.2
+Description: This component includes an implementation of the unit HAL drivers
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/mvUsb.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/mvUsb.c
@@ -0,0 +1,1247 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+        this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvSysUsbConfig.h"
+#include "mvUsbRegs.h"
+#include "mvUsb.h"
+#include "mvDeviceId.h"
+
+static MV_USB_HAL_DATA	usbHalData;
+
+MV_U32  mvUsbGetCapRegAddr(int devNo)
+{
+    return (MV_USB_CORE_CAP_LENGTH_REG(devNo));
+}
+
+#ifdef MV_USB_VOLTAGE_FIX
+#if 0
+/* GPIO Settings for Back voltage problem workaround */
+MV_U8  mvUsbGppInit(int dev)
+{
+    MV_U32  regVal;
+    MV_U8   gppNo = (MV_U8)mvBoardUSBVbusGpioPinGet(dev);
+    MV_U8   gppVbusEnNo = (MV_U8)mvBoardUSBVbusEnGpioPinGet(dev);
+
+    /* DDR1 => gpp5, DDR2 => gpp1 */
+    if(gppNo != (MV_U8)N_A)
+    {
+        /*mvOsPrintf("mvUsbGppInit: gppNo=%d\n", gppNo);*/
+
+        /* MPP Control Register - set to GPP*/
+        regVal = MV_REG_READ(mvCtrlMppRegGet((unsigned int)(gppNo/8)));
+        regVal &= ~(0xf << ((gppNo%8)*4));
+        MV_REG_WRITE(mvCtrlMppRegGet((unsigned int)(gppNo/8)), regVal);
+
+
+        if(gppNo < 32)
+	{
+		/* GPIO Data Out Enable Control Register - set to input*/
+        	mvGppTypeSet(0, (1<<gppNo), MV_GPP_IN & (1<<gppNo) );
+		/* GPIO Data In Polarity Register */
+		mvGppPolaritySet(0, (1<<gppNo), (0<<gppNo) );
+	}
+	else
+	{
+		/* GPIO Data Out Enable Control Register - set to input*/
+		mvGppTypeSet(1, (1<<(gppNo-32)), MV_GPP_IN & (1<<(gppNo-32)) );
+		/* GPIO Data In Polarity Register */
+		mvGppPolaritySet(1, (1<<(gppNo-32)), (0<<(gppNo-32)) );
+	}
+
+        /* GPIO Data In Polarity Register */
+       /* mvGppPolaritySet(mppGrp, (1<<gppNo), (0<<gppNo) ); */
+
+        regVal = MV_REG_READ(MV_USB_PHY_POWER_CTRL_REG(dev));
+        regVal &= ~(7 << 24);
+        MV_REG_WRITE(MV_USB_PHY_POWER_CTRL_REG(dev), regVal);
+    }
+
+    /* for device - reset vbus enable gpp, for host - set by default */
+    if(gppVbusEnNo != (MV_U8)N_A)
+    {
+	/*mvOsPrintf("mvUsbGppInit: gppVbusEnNo = %d \n", gppVbusEnNo);*/
+
+	regVal = MV_REG_READ(GPP_DATA_OUT_REG((gppVbusEnNo/32)));
+	if(gppVbusEnNo < 32)
+	{
+		MV_REG_WRITE(GPP_DATA_OUT_REG(0), (regVal & ~(1 << gppVbusEnNo)));
+	}
+	else
+	{
+		MV_REG_WRITE(GPP_DATA_OUT_REG(1), (regVal & ~(1 << (gppVbusEnNo - 32))));
+	}
+
+    }
+
+    return gppNo;
+}
+
+int    mvUsbBackVoltageUpdate(int dev, MV_U8 gppNo)
+{
+    int     vbusChange = 0;
+    MV_U32  gppData, regVal, gppInv;
+
+    if(gppNo < 32)
+    {
+    	gppInv = mvGppPolarityGet(0, (1 << gppNo));
+	    gppData = mvGppValueGet(0, (1 << gppNo));
+    }
+    else
+    {
+	    gppInv = mvGppPolarityGet(1, (1 << (gppNo-32)));
+	    gppData = mvGppValueGet(1, (1 << (gppNo-32)));
+    }
+    regVal = MV_REG_READ(MV_USB_PHY_POWER_CTRL_REG(dev));
+
+    if( (gppInv == 0) &&
+        (gppData != 0) )
+    {
+        /* VBUS appear */
+        regVal |= (7 << 24);
+	    
+        if(gppNo < 32)
+            gppInv |= (1 << gppNo);
+	    else
+		    gppInv |= (1 << (gppNo-32));
+
+        /*mvOsPrintf("VBUS appear: dev=%d, gpp=%d\n", dev, gppNo);*/
+        vbusChange = 1;
+    }
+    else if( (gppInv != 0) &&
+             (gppData != 0) )
+    {
+        /* VBUS disappear */
+        regVal &= ~(7 << 24);
+	    
+        if(gppNo < 32)
+        	gppInv &= ~(1 << gppNo);
+	    else
+		    gppInv &= ~(1 << (gppNo-32));
+
+        /*mvOsPrintf("VBUS disappear: dev=%d, gpp=%d\n", dev, gppNo);*/
+        vbusChange = 2;
+    }
+    else
+    {
+        /* No changes */
+        return vbusChange;
+    }
+    MV_REG_WRITE(MV_USB_PHY_POWER_CTRL_REG(dev), regVal);
+
+    if(gppNo < 32)
+	    mvGppPolaritySet(0, (1<<gppNo), gppInv);
+    else
+	    mvGppPolaritySet(1, (1<<(gppNo-32)), gppInv);
+
+    return vbusChange;
+}
+#else
+#include <linux/gpio.h>
+#include "mvKW_HAL_glue.h"
+/* GPIO Settings for Back voltage problem workaround */
+MV_U8  mvUsbGppInit(int dev)
+{
+    MV_U32  regVal;
+    MV_U8   gppNo = (MV_U8)mvBoardUSBVbusGpioPinGet(dev);
+    MV_U8   gppVbusEnNo = (MV_U8)mvBoardUSBVbusEnGpioPinGet(dev);
+
+    /* DDR1 => gpp5, DDR2 => gpp1 */
+    if(gppNo != (MV_U8)N_A)
+    {
+	    /*mvOsPrintf("mvUsbGppInit: gppNo=%d\n", gppNo);*/
+	    if (gpio_request(gppNo, "USB VBUS") != 0 ||
+		gpio_direction_input(gppNo) != 0)
+		    pr_err(" failed to setup USB VBUS GPIO\n");
+
+
+	    regVal = MV_REG_READ(MV_USB_PHY_POWER_CTRL_REG(dev));
+	    regVal &= ~(7 << 24);
+	    MV_REG_WRITE(MV_USB_PHY_POWER_CTRL_REG(dev), regVal);
+    }
+
+    /* for device - reset vbus enable gpp, for host - set by default */
+    if(gppVbusEnNo != (MV_U8)N_A)
+    {
+	/*mvOsPrintf("mvUsbGppInit: gppVbusEnNo = %d \n", gppVbusEnNo);*/
+	    if (gpio_request(gppNo, "USB VBUS EN") != 0 ||
+		gpio_direction_output(gppNo, 0) != 0)
+		    pr_err(" failed to setup USB VBUS EN GPIO\n");
+    }
+
+    return gppNo;
+}
+
+int    mvUsbBackVoltageUpdate(int dev, MV_U8 gppNo)
+{
+    int     vbusChange = 0;
+    MV_U32  gppData, regVal;
+
+    gppData = gpio_get_value(gppNo);
+    regVal = MV_REG_READ(MV_USB_PHY_POWER_CTRL_REG(dev));
+
+    if(gppData != 0)
+    {
+        /* VBUS appear */
+        regVal |= (7 << 24);
+	    
+        mvOsPrintf("VBUS appear: dev=%d, gpp=%d\n", dev, gppNo);
+        vbusChange = 1;
+    }
+    else
+    {
+        /* VBUS disappear */
+        regVal &= ~(7 << 24);
+
+        mvOsPrintf("VBUS disappear: dev=%d, gpp=%d\n", dev, gppNo);
+        vbusChange = 2;
+    }
+
+    MV_REG_WRITE(MV_USB_PHY_POWER_CTRL_REG(dev), regVal);
+
+    return vbusChange;
+}
+
+#endif
+#endif /* MV_USB_VOLTAGE_FIX */
+
+/* USB Phy init (change from defaults) specific for 65nm (78100 78200 A0 and later) */
+void    mvUsbPhy65nmNewInit(int dev)
+{
+    MV_U32          regVal;
+
+    /******* USB PHY PLL Control Register 0x410 *******/
+    regVal = MV_REG_READ(MV_USB_PHY_PLL_CTRL_REG(dev)); 
+    
+    /* bit[21]	(VCOCAL_ START) */ 
+    regVal |= (0x1 << 21);
+    MV_REG_WRITE(MV_USB_PHY_PLL_CTRL_REG(dev), regVal); 
+    regVal &= ~(0x1 << 21);
+    MV_REG_WRITE(MV_USB_PHY_PLL_CTRL_REG(dev), regVal); 
+    /*-------------------------------------------------*/
+
+    /******* USB PHY Tx Control Register Register 0x420 *******/
+    regVal = MV_REG_READ(MV_USB_PHY_TX_CTRL_REG(dev)); 
+
+    /* Force impedance auto calibrate */
+	/* bit[12]	(REG_RCAL_START) = 1 */ 
+    regVal |= (0x1 << 12);
+    MV_REG_WRITE(MV_USB_PHY_TX_CTRL_REG(dev), regVal); 
+
+    /* bit[12]	(REG_RCAL_START) = 0 */ 
+    regVal &= ~(0x1 << 12);
+    MV_REG_WRITE(MV_USB_PHY_TX_CTRL_REG(dev), regVal); 
+    /*-------------------------------------------------*/
+
+    /******* USB PHY Rx Control Register 0x430 *******/
+    regVal = MV_REG_READ(MV_USB_PHY_RX_CTRL_REG(dev)); 
+
+    /* bits[7:4]	SQ_THRESH	= 0x7 */
+    regVal &= ~(0xf << 4);
+    regVal |= (0x7 << 4);
+
+    MV_REG_WRITE(MV_USB_PHY_RX_CTRL_REG(dev), regVal);
+    /*-------------------------------------------------*/
+
+    /******* USB PHY IVREF Control Register 0x440 *******/
+    regVal = MV_REG_READ(MV_USB_PHY_IVREF_CTRL_REG(dev)); 
+    /* bits[9:8]	TXVDD12 = 0x3 */
+    regVal &= ~(0x3 << 8);
+    regVal |= (0x3 << 8);
+    
+    MV_REG_WRITE(MV_USB_PHY_IVREF_CTRL_REG(dev), regVal);
+    /*-------------------------------------------------*/
+    /***** USB PHY TEST GROUP CONTROL Register: 0x450 *****/
+
+    /* Nothing to change */
+}
+
+/* USB Phy init (change from defaults) specific for 65nm (6781-Z0/Z1 device) */
+static void    mvUsbPhy6781Init(int dev)
+{
+    MV_U32          regVal;
+
+    /******* USB PHY PLL Control Register 0x410 *******/
+    regVal = MV_REG_READ(MV_USB_PHY_PLL_CTRL_REG(dev)); 
+	
+    /* VCO recalibrate */
+    regVal |= (0x1 << 21);
+    MV_REG_WRITE(MV_USB_PHY_PLL_CTRL_REG(dev), regVal); 
+    regVal &= ~(0x1 << 21);
+
+    MV_REG_WRITE(MV_USB_PHY_PLL_CTRL_REG(dev), regVal); 
+    /*-------------------------------------------------*/
+
+    /******* USB PHY Tx Control Register Register 0x420 *******/
+    regVal = MV_REG_READ(MV_USB_PHY_TX_CTRL_REG(dev)); 
+	
+    /* bit[11]	(LOWVDD_EN)	= 1 */ 
+    regVal |= (0x1 << 11);
+
+    /* bit[12]	(REG_RCAL_START) = 1 */ 
+    regVal |= (0x1 << 12);
+
+    /* Bit[16:14] (IMP_CAL_VTH)
+     *     510 = 101
+     *     others = unchanged
+     */
+    if (usbHalData.ctrlModel == MV_510_DEV_ID) {
+        regVal &= ~(0x7 << 14);
+        regVal |= (0x5 << 14);
+    }
+
+    /* bit[21]	(TX_BLOCK_EN)	= 0 */ 
+    regVal &= ~(0x1 << 21);
+
+    /* bit[31]  (HS_STRESS_CTRL) = 0 */
+    regVal &= ~(0x1 << 31);
+
+    MV_REG_WRITE(MV_USB_PHY_TX_CTRL_REG(dev), regVal); 
+    /* Force impedance auto calibrate */
+    /* bit[12]	(REG_RCAL_START) = 0 */ 
+    regVal &= ~(0x1 << 12);
+    MV_REG_WRITE(MV_USB_PHY_TX_CTRL_REG(dev), regVal); 
+    /*-------------------------------------------------*/
+
+    /******* USB PHY Rx Control Register 0x430 *******/
+    regVal = MV_REG_READ(MV_USB_PHY_RX_CTRL_REG(dev)); 
+
+    /* bits[3:2]	LPL_COEF
+     *   510      = 01
+     *   else     = 00  */
+    regVal &= ~(0x3 << 2);
+    if (usbHalData.ctrlModel == MV_510_DEV_ID) {
+        regVal |= (0x1 << 2);
+    }
+
+    /* bits[7:4]	SQ_THRESH
+     *      510       = 1100
+     *      else      = 0111
+     */
+    regVal &= ~(0xf << 4);
+    if (usbHalData.ctrlModel == MV_510_DEV_ID) {
+        regVal |= (0xC << 4);
+    } else {
+        regVal |= (0x7 << 4);
+    }
+
+    /* bits[16:15]	REG_SQ_LENGTH	= 0x1 */
+    regVal &= ~(0x3 << 15);
+    regVal |= (0x1 << 15);
+
+    /* bit[21]	CDR_FASTLOCK_EN	= 0x0 */
+    regVal &= ~(0x1 << 21);
+
+    /* bits[27:26]	EDGE_DET	= 0x0 (1 Tran)*/
+    regVal &= ~(0x3 << 26);
+
+    MV_REG_WRITE(MV_USB_PHY_RX_CTRL_REG(dev), regVal);
+    /*-------------------------------------------------*/
+
+    /******* USB PHY IVREF Control Register 0x440 *******/
+    regVal = MV_REG_READ(MV_USB_PHY_IVREF_CTRL_REG(dev)); 
+
+ 	/* bits[9:8]	TXVDD12 = 0x3 */
+    	regVal &= ~(0x3 << 8);
+	regVal |= (0x3 << 8);
+    
+    MV_REG_WRITE(MV_USB_PHY_IVREF_CTRL_REG(dev), regVal);
+    /*-------------------------------------------------*/
+
+    /***** USB PHY TEST GROUP CONTROL Register: 0x450 *****/
+    regVal = MV_REG_READ(MV_USB_PHY_TEST_GROUP_CTRL_REG_0(dev)); 
+
+    /* bit[15]	REG_FIFO_SQ_RST	= 0x0 */
+    regVal &= ~(0x1 << 15);
+
+    MV_REG_WRITE(MV_USB_PHY_TEST_GROUP_CTRL_REG_0(dev), regVal);
+    /*-------------------------------------------------*/
+
+}
+
+
+/* USB Phy init (change from defaults) specific for 65nm (6781-Y0 device) */
+static void    mvUsbPhy6781Y0Init(int dev)
+{
+    MV_U32          regVal;
+    /******* USB PHY PLL Control Register 0x410 *******/
+    regVal = MV_REG_READ(MV_USB_PHY_PLL_CTRL_REG(dev)); 
+	
+    /* VCO recalibrate */
+    regVal |= (0x1 << 21);
+    MV_REG_WRITE(MV_USB_PHY_PLL_CTRL_REG(dev), regVal); 
+    /* wait 500 usec */
+    mvOsUDelay(500);
+    regVal &= ~(0x1 << 21);
+    MV_REG_WRITE(MV_USB_PHY_PLL_CTRL_REG(dev), regVal); 
+    /*-------------------------------------------------*/
+
+    /******* USB PHY Tx Control Register Register 0x420 *******/
+    regVal = MV_REG_READ(MV_USB_PHY_TX_CTRL_REG(dev)); 
+	
+    /* bit[11]	(LOWVDD_EN)	= 1 */ 
+    regVal |= (0x1 << 11);
+
+    /* bit[12]	(REG_RCAL_START) = 1 */ 
+    regVal |= (0x1 << 12);
+
+    /* bits[16:14]	(IMPCAL_VTH[2:0] = 101) */
+    regVal &= ~(0x7 << 14);
+    regVal |= (0x5 << 14);
+
+    /* bit[21]	(TX_BLOCK_EN)	= 0 */ 
+    regVal &= ~(0x1 << 21);
+
+    /* bit[31]  (HS_STRESS_CTRL) = 0 */
+    regVal &= ~(0x1 << 31);
+	
+    MV_REG_WRITE(MV_USB_PHY_TX_CTRL_REG(dev), regVal);
+
+    /* wait 500 usec */
+    mvOsUDelay(500);
+ 
+    /* Force impedance auto calibrate */
+    /* bit[12]	(REG_RCAL_START) = 0 */ 
+    regVal &= ~(0x1 << 12);
+    MV_REG_WRITE(MV_USB_PHY_TX_CTRL_REG(dev), regVal); 
+    /*-------------------------------------------------*/
+
+    /******* USB PHY Rx Control Register 0x430 *******/
+    regVal = MV_REG_READ(MV_USB_PHY_RX_CTRL_REG(dev)); 
+    
+    /* bits[3:2]	LPL_COEF	= 0x1 (1/8) */
+    regVal &= ~(0x3 << 2);
+    regVal |= (0x1 << 2);
+
+    /* bits[7:4]	SQ_THRESH	= 0xC */
+    regVal &= ~(0xf << 4);
+    regVal |= (0xC << 4);
+
+    /* bits[16:15]	REG_SQ_LENGTH	= 0x1 */
+    regVal &= ~(0x3 << 15);
+    regVal |= (0x1 << 15);
+
+    /* bit[21]	CDR_FASTLOCK_EN	= 0x0 */
+    regVal &= ~(0x1 << 21);
+
+    /* bits[27:26]	EDGE_DET	= 0x0 (1 Tran)*/
+    regVal &= ~(0x3 << 26);
+
+    MV_REG_WRITE(MV_USB_PHY_RX_CTRL_REG(dev), regVal);
+    /*-------------------------------------------------*/
+
+    /******* USB PHY IVREF Control Register 0x440 *******/
+    regVal = MV_REG_READ(MV_USB_PHY_IVREF_CTRL_REG(dev)); 
+
+ 	/* bits[9:8]	TXVDD12 = 0x3 */
+    	regVal &= ~(0x3 << 8);
+	regVal |= (0x3 << 8);
+    
+    MV_REG_WRITE(MV_USB_PHY_IVREF_CTRL_REG(dev), regVal);
+    /*-------------------------------------------------*/
+
+    /***** USB PHY TEST GROUP CONTROL Register: 0x450 *****/
+    regVal = MV_REG_READ(MV_USB_PHY_TEST_GROUP_CTRL_REG_0(dev)); 
+
+    /* bit[15]	REG_FIFO_SQ_RST	= 0x0 */
+    regVal &= ~(0x1 << 15);
+
+    MV_REG_WRITE(MV_USB_PHY_TEST_GROUP_CTRL_REG_0(dev), regVal);
+    /*-------------------------------------------------*/
+
+}
+
+
+/* USB Phy init (change from defaults) specific for 65nm (78XX0 and 6281) */
+static void    mvUsbPhy65nmInit(int dev)
+{
+    MV_U32      regVal;
+
+    /******* USB PHY PLL Control Register 0x410 *******/
+    regVal = MV_REG_READ(MV_USB_PHY_PLL_CTRL_REG(dev)); 
+	
+    /* bit[14:12]	(ICP) = 6 */ 
+    regVal &= ~(0x7 << 12);
+    regVal |= (0x6 << 12);
+
+    /* bit[12]	(KVCO_EXT) = 1 */ 
+    regVal |= (0x1 << 22);
+
+    MV_REG_WRITE(MV_USB_PHY_PLL_CTRL_REG(dev), regVal); 
+    /*-------------------------------------------------*/
+
+    /******* USB PHY Tx Control Register Register 0x420 *******/
+    regVal = MV_REG_READ(MV_USB_PHY_TX_CTRL_REG(dev)); 
+	
+    /* bit[11]	(LOWVDD_EN)	= 1 */ 
+    regVal |= (0x1 << 11);
+
+    /* bit[12]	(REG_RCAL_START) = 1 */ 
+    regVal |= (0x1 << 12);
+
+    /* bit[21]	(TX_BLOCK_EN)	= 0 */ 
+    regVal &= ~(0x1 << 21);
+
+    /* bit[31]  (HS_STRESS_CTRL) = 0 */
+    regVal &= ~(0x1 << 31);
+	
+    MV_REG_WRITE(MV_USB_PHY_TX_CTRL_REG(dev), regVal); 
+    /* Force impedance auto calibrate */
+    /* bit[12]	(REG_RCAL_START) = 0 */ 
+    regVal &= ~(0x1 << 12);
+    MV_REG_WRITE(MV_USB_PHY_TX_CTRL_REG(dev), regVal); 
+    /*-------------------------------------------------*/
+
+    /******* USB PHY Rx Control Register 0x430 *******/
+    regVal = MV_REG_READ(MV_USB_PHY_RX_CTRL_REG(dev)); 
+    
+    /* bits[3:2]	LPL_COEF	= 0x0 (1/8) */
+    regVal &= ~(0x3 << 2);
+
+    /* bits[7:4]	SQ_THRESH	= 0x7 */
+    regVal &= ~(0xf << 4);
+    regVal |= (0x7 << 4);
+
+    /* bits[16:15]	REG_SQ_LENGTH	= 0x1 */
+    regVal &= ~(0x3 << 15);
+    regVal |= (0x1 << 15);
+
+    /* bit[21]	CDR_FASTLOCK_EN	= 0x0 */
+    regVal &= ~(0x1 << 21);
+
+    /* bits[27:26]	EDGE_DET	= 0x0 (1 Tran)*/
+    regVal &= ~(0x3 << 26);
+
+    MV_REG_WRITE(MV_USB_PHY_RX_CTRL_REG(dev), regVal);
+    /*-------------------------------------------------*/
+
+	/******* USB PHY IVREF Control Register 0x440 *******/
+	regVal = MV_REG_READ(MV_USB_PHY_IVREF_CTRL_REG(dev)); 
+
+	/* bits[9:8]	TXVDD12 = 0x3 */
+	regVal &= ~(0x3 << 8);
+	regVal |= (0x3 << 8);
+    
+    MV_REG_WRITE(MV_USB_PHY_IVREF_CTRL_REG(dev), regVal);
+    /*-------------------------------------------------*/
+
+    /***** USB PHY TEST GROUP CONTROL Register: 0x450 *****/
+    regVal = MV_REG_READ(MV_USB_PHY_TEST_GROUP_CTRL_REG_0(dev)); 
+
+    /* bit[15]	REG_FIFO_SQ_RST	= 0x0 */
+    regVal &= ~(0x1 << 15);
+
+    MV_REG_WRITE(MV_USB_PHY_TEST_GROUP_CTRL_REG_0(dev), regVal);
+    /*-------------------------------------------------*/
+}
+
+/* USB Phy init (change from defaults) specific for 90nm (6183 and later) */
+static void    mvUsbPhy90nmInit(int dev)
+{
+    MV_U32          regVal;
+
+    /******* USB 2.0 Power Control Register 0x400 *******/
+    regVal= MV_REG_READ(MV_USB_PHY_POWER_CTRL_REG(dev));
+
+    /* Bits 7:6 (BG_VSEL) = 0x0 */
+    regVal &= ~(0x3 << 6);
+
+    MV_REG_WRITE(MV_USB_PHY_POWER_CTRL_REG(dev),regVal);
+    /*-------------------------------------------------*/
+
+    /******* USB PHY Tx Control Register Register 0x420 *******/
+    regVal = MV_REG_READ(MV_USB_PHY_TX_CTRL_REG(dev));
+
+    /* bit[21]	(TX_BLK_EN) = 0 for B0 only */
+    if( (usbHalData.ctrlModel == MV_6183_DEV_ID))
+    	regVal &= ~(0x1 << 21);
+
+
+    /* Force Auto calibration */
+    /* Bit[13] = 0x1, (REG_EXT_RCAL_EN = 0x1) */
+    regVal |= (0x1<<13);
+
+    /* bit[11]	(LOWVDD_EN)	= 1 */
+    regVal |= (0x1 << 11);
+
+    /* Bit[6:3] (IMP_CAL) = 0x8 for A0 and B0*/
+    /* Bit[6:3] (IMP_CAL) = 0xf for A1 */
+    regVal &= ~(0xf << 3);
+    regVal |= (0x8 << 3);
+
+    if( (usbHalData.ctrlModel == MV_6183_DEV_ID))
+    {
+	regVal &= ~(0x7);
+	regVal |= (0x4);
+    }
+
+    MV_REG_WRITE(MV_USB_PHY_TX_CTRL_REG(dev), regVal);
+    /*-------------------------------------------------*/
+
+    /******* USB PHY Rx Control Register 0x430 *******/
+    regVal = MV_REG_READ(MV_USB_PHY_RX_CTRL_REG(dev));
+
+    /* bits[3:2]	LPF_COEF	= 0x0 */
+    regVal &= ~(0x3 << 2);
+
+    /* bits[7:4]	SQ_THRESH	= 0x0 */
+    /* bits[7:4]	SQ_THRESH = 0x3 for A1 and above */
+    regVal &= ~(0xf << 4);
+
+    /* bits[16:15]	REG_SQ_LENGTH	= 0x1 */
+    regVal &= ~(0x3 << 15);
+    regVal |= (0x1 << 15);
+
+    /* bit[21]	CDR_FASTLOCK_EN	= 0x0 */
+    regVal &= ~(0x1 << 21);
+
+    /* bits[27:26]	EDGE_DET_SEL	= 0x0 */
+    regVal &= ~(0x3 << 26);
+
+    MV_REG_WRITE(MV_USB_PHY_RX_CTRL_REG(dev), regVal);
+	/*-------------------------------------------------*/
+
+    /******* USB PHY IVREF Control Register 0x440 *******/
+    regVal = MV_REG_READ(MV_USB_PHY_IVREF_CTRL_REG(dev));
+
+    /* bits[7:6]	RXVDD18	            = 0x0 */
+    regVal &= ~(0x3 << 6);
+
+    /* bits[11]	SQ_CM_SEL = 0x1 for 6183 B0 only */
+    if( (usbHalData.ctrlModel == MV_6183_DEV_ID))
+	regVal |= (0x1 << 11);
+
+    /* bit[24]	    REG_TEST_SUSPENDM	= 0x1 */
+    regVal |= (0x1 << 24);
+
+    MV_REG_WRITE(MV_USB_PHY_IVREF_CTRL_REG(dev), regVal);
+    /*-------------------------------------------------*/
+
+    /***** USB PHY TEST GROUP CONTROL Register: 0x450 *****/
+    regVal = MV_REG_READ(MV_USB_PHY_TEST_GROUP_CTRL_REG_0(dev));
+
+    /* bit[15]	REG_FIFO_SQ_RST	= 0x0 */
+    regVal &= ~(0x1 << 15);
+
+    MV_REG_WRITE(MV_USB_PHY_TEST_GROUP_CTRL_REG_0(dev), regVal);
+    /*-------------------------------------------------*/
+}
+
+/* USB Phy init (change from defaults) for 150nm chips:
+ *  - 645xx, 646xx
+ *  - 51xx, 52xx
+ *  - 6082
+ */
+static void    mvUsbPhyInit(int dev)
+{
+    MV_U32          regVal;
+
+    /* GL# USB-9 */
+    /******* USB 2.0 Power Control Register 0x400 *******/
+    regVal= MV_REG_READ(MV_USB_PHY_POWER_CTRL_REG(dev));
+
+    /* Bits 7:6 (BG_VSEL) = 0x1 */
+    regVal &= ~(0x3 << 6);
+    regVal |= (0x1 << 6);
+
+    MV_REG_WRITE(MV_USB_PHY_POWER_CTRL_REG(dev),regVal);
+
+    /* GL# USB-1 */
+    /******* USB PHY Tx Control Register Register 0x420 *******/
+    regVal = MV_REG_READ(MV_USB_PHY_TX_CTRL_REG(dev));
+
+    if( (usbHalData.ctrlModel == MV_5181_DEV_ID) && (usbHalData.ctrlRev <= MV_5181_A1_REV) )
+    {
+        /* For OrionI A1/A0 rev:  Bit[21] = 0 (TXDATA_BLOCK_EN  = 0). */
+        regVal &= ~(1 << 21);
+    }
+    else
+    {
+        regVal |= (1 << 21);
+    }
+
+    /* Force Auto calibration */
+
+    /* Bit[13] = 0x1, (REG_EXT_RCAL_EN = 0x1) */
+    regVal |= (1<<13);
+
+    /* Bits[2:0] (TxAmp)
+     *      64560, 64660, 6082, 5181, 5182, etc = 0x4
+     *      5281                                = 0x3
+     */
+    if(usbHalData.ctrlModel == MV_5281_DEV_ID)
+    {
+        regVal &= ~(0x7 << 0);
+        regVal |= (0x3 << 0);
+    }
+    else
+    {
+        regVal &= ~(0x7 << 0);
+        regVal |= (0x4 << 0);
+    }
+
+    /* Bit[6:3] (IMP_CAL)
+     *      64560, 64660 = 0xA
+     *      Others       = 0x8
+     *
+     */
+    regVal &= ~(0xf << 3);
+    if( (usbHalData.ctrlModel == MV64560_DEV_ID) ||
+        (usbHalData.ctrlModel == MV64660_DEV_ID))
+    {
+        regVal |= (0xA << 3);
+    }
+    else
+    {
+        regVal |= (0x8 << 3);
+    }
+
+    MV_REG_WRITE(MV_USB_PHY_TX_CTRL_REG(dev), regVal);
+
+    /* GL# USB-3 GL# USB-9 */
+    /******* USB PHY Rx Control Register 0x430 *******/
+    regVal = MV_REG_READ(MV_USB_PHY_RX_CTRL_REG(dev));
+
+    /* bit[8:9] - (DISCON_THRESHOLD ). */
+    /* 88F5181-A0/A1/B0 = 11, 88F5281-A0 = 10, all other 00 */
+    /* 64660-A0 = 10 */
+    regVal &= ~(0x3 << 8);
+    if( (usbHalData.ctrlModel == MV_5181_DEV_ID) && (usbHalData.ctrlRev <= MV_5181_B0_REV) )
+    {
+        regVal |= (0x3 << 8);
+    }
+    else if(usbHalData.ctrlModel == MV64660_DEV_ID)
+    {
+        regVal |= (0x2 << 8);
+    }
+
+    /* bit[21] = 0 (CDR_FASTLOCK_EN = 0). */
+    regVal &= ~(1 << 21);
+
+    /* bit[27:26] = 00 ( EDGE_DET_SEL = 00). */
+    regVal &= ~(0x3 << 26);
+
+    /* Bits[31:30] = RXDATA_BLOCK_LENGHT = 0x3 */
+    regVal |= (0x3 << 30);
+
+    /* Bits 7:4 (SQ_THRESH)
+     *      64560, 64660                = 0x1
+     *      5181, 5182, 5281, 6082, etc = 0x0
+     */
+
+    regVal &= ~(0xf << 4);
+    if( (usbHalData.ctrlModel == MV64560_DEV_ID) ||
+        (usbHalData.ctrlModel == MV64660_DEV_ID)) {
+        regVal |= (0x1 << 4);
+    }
+
+    MV_REG_WRITE(MV_USB_PHY_RX_CTRL_REG(dev), regVal);
+
+    /* GL# USB-3 GL# USB-9 */
+    /******* USB PHY IVREF Control Register 0x440 *******/
+    regVal = MV_REG_READ(MV_USB_PHY_IVREF_CTRL_REG(dev));
+
+    /*Bits[1:0] = 0x2 (PLLVDD12 = 0x2)*/
+    regVal &= ~(0x3 << 0);
+    regVal |= (0x2 << 0);
+
+    /* Bits 5:4 (RXVDD) = 0x3; */
+    regVal &= ~(0x3 << 4);
+    regVal |= (0x3 << 4);
+
+
+    /* <VPLLCAL> bits[17:16] = 0x1 */
+    if( (usbHalData.ctrlModel == MV64560_DEV_ID) ||
+        (usbHalData.ctrlModel == MV64660_DEV_ID))
+    {
+        regVal &= ~(0x3 << 16);
+        regVal |= (0x1 << 16);
+    }
+
+    /* <ISAMPLE_SEL> bits[19:18] = 0x2 */
+    regVal &= ~(0x3 << 18);
+    regVal |= (0x2 << 18);
+
+    /* <SAMPLER_CTRL> bit[20] = 0x0 */
+    regVal &= ~(0x1 << 20);
+
+    /* <ICHGPBUF_SEL> bit[21] = 0x1 */
+    regVal |= (0x1 << 21);
+
+    MV_REG_WRITE(MV_USB_PHY_IVREF_CTRL_REG(dev), regVal);
+
+    /***** USB PHY TEST GROUP CONTROL Register: 0x450 *****/
+    regVal = MV_REG_READ(MV_USB_PHY_TEST_GROUP_CTRL_REG_0(dev));
+
+    /* bit[15] = 0 (REG_FIFO_SQ_RST = 0). */
+    regVal &= ~(1 << 15);
+
+    /* <REG_FIFO_OVUF_SEL> bit[17] = 0x1 */
+    if( (usbHalData.ctrlModel == MV64560_DEV_ID) ||
+        (usbHalData.ctrlModel == MV64660_DEV_ID))
+    {
+        regVal |= (1 << 17);
+    }
+
+    MV_REG_WRITE(MV_USB_PHY_TEST_GROUP_CTRL_REG_0(dev), regVal);
+}
+
+/*******************************************************************************
+* mvUsbHalInit - Initialize USB engine
+*
+* DESCRIPTION:
+*       This function initialize USB unit. It set the default address decode
+*       windows of the unit.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_ERROR if setting fail.
+*******************************************************************************/
+MV_STATUS   mvUsbHalInit(int dev, MV_BOOL isHost, MV_USB_HAL_DATA *halData)
+{
+    MV_U32          regVal;
+
+    mvOsMemcpy(&usbHalData, halData, sizeof(MV_USB_HAL_DATA));
+
+    /* Clear Interrupt Cause and Mask registers */
+    MV_REG_WRITE(MV_USB_BRIDGE_INTR_CAUSE_REG(dev), 0);
+    MV_REG_WRITE(MV_USB_BRIDGE_INTR_MASK_REG(dev), 0);
+
+    /* Reset controller */
+    regVal = MV_REG_READ(MV_USB_CORE_CMD_REG(dev));
+    MV_REG_WRITE(MV_USB_CORE_CMD_REG(dev), regVal | MV_USB_CORE_CMD_RESET_MASK);
+    while( MV_REG_READ(MV_USB_CORE_CMD_REG(dev)) & MV_USB_CORE_CMD_RESET_MASK);
+
+    /* Clear bit 4 in USB bridge control register for enableing core byte swap */
+    if((usbHalData.ctrlModel == MV64560_DEV_ID) || (usbHalData.ctrlModel == MV64660_DEV_ID))
+    {
+        MV_REG_WRITE(MV_USB_BRIDGE_CTRL_REG(dev),(MV_REG_READ(MV_USB_BRIDGE_CTRL_REG(dev))
+                           & ~MV_USB_BRIDGE_CORE_BYTE_SWAP_MASK));
+    }
+
+    /* GL# USB-10 */
+    /* The new register 0x360 USB 2.0 IPG Metal Fix Register
+     * dont' exists in the following chip revisions:
+     * OrionN B1 (id=0x5180, rev 3)
+     * Orion1 B1 (id=0x5181, rev=3) and before
+     * Orion1-VoIP A0 (id=0x5181, rev=8)
+     * Orion1-NAS A1 (id=0x5182, rev=1) and before
+     * Orion2 B0 (id=0x5281, rev=1) and before
+     */
+    if( ((usbHalData.ctrlModel == MV_5181_DEV_ID) &&
+         ((usbHalData.ctrlRev <= MV_5181_B1_REV) || (usbHalData.ctrlRev == MV_5181L_A0_REV))) ||
+        ((usbHalData.ctrlModel == MV_5182_DEV_ID) &&
+         (usbHalData.ctrlRev <= MV_5182_A1_REV)) ||
+        ((usbHalData.ctrlModel == MV_5180_DEV_ID) &&
+         (usbHalData.ctrlRev <= MV_5180N_B1_REV)) )
+    {
+        /* Do nothing */
+    }
+    else if ((usbHalData.ctrlModel == MV_6781_DEV_ID) || (usbHalData.ctrlModel == MV_510_DEV_ID))
+    {
+        /* Change value of new register 0x360 */
+        regVal = MV_REG_READ(MV_USB_BRIDGE_IPG_REG(dev));
+
+        /*  Change bits31 & bit30 from 1 to 0 */
+        regVal &= ~(0x3 << 30);
+
+        /*  Change bits[14:8] - IPG for non Start of Frame Packets
+         *  from 0x9(default) to 0xD
+         */
+        regVal &= ~(0x7F << 8);
+        regVal |= (0xD << 8);
+
+        MV_REG_WRITE(MV_USB_BRIDGE_IPG_REG(dev), regVal);
+
+    }
+    else
+    {
+        /* Change value of new register 0x360 */
+        regVal = MV_REG_READ(MV_USB_BRIDGE_IPG_REG(dev));
+
+        /*  Change bits[14:8] - IPG for non Start of Frame Packets
+         *  from 0x9(default) to 0xD
+         */
+        regVal &= ~(0x7F << 8);
+        regVal |= (0xD << 8);
+
+        MV_REG_WRITE(MV_USB_BRIDGE_IPG_REG(dev), regVal);
+    }
+
+    /********* Update USB PHY configuration **********/
+	switch (usbHalData.ctrlModel) {
+		case MV_78100_DEV_ID:
+		case MV_78200_DEV_ID:
+			mvUsbPhy65nmNewInit(dev);
+		break;
+		case MV_6281_DEV_ID:
+		case MV_6192_DEV_ID:
+		case MV_6180_DEV_ID:
+		case MV_78XX0_DEV_ID:
+			mvUsbPhy65nmInit(dev);
+		break;
+		case MV_6183_DEV_ID:
+			mvUsbPhy90nmInit(dev);
+		break;
+		case MV_6781_DEV_ID:
+			switch (usbHalData.ctrlRev) {
+				case MV_6781_Z0_REV:
+				case MV_6781_Z1_REV:
+				case MV_6781_X0_REV:
+					mvUsbPhy6781Init(dev);
+				break;
+				default:
+					mvUsbPhy6781Y0Init(dev);
+				break;
+			}
+		break;
+		case MV_510_DEV_ID:
+			mvUsbPhy6781Init(dev);
+		break;
+		default:
+			mvUsbPhyInit(dev);
+		break;
+	}
+
+    /* Set Mode register (Stop and Reset USB Core before) */
+    /* Stop the controller */
+    regVal = MV_REG_READ(MV_USB_CORE_CMD_REG(dev));
+    regVal &= ~MV_USB_CORE_CMD_RUN_MASK;
+    MV_REG_WRITE(MV_USB_CORE_CMD_REG(dev), regVal);
+
+    /* Reset the controller to get default values */
+    regVal = MV_REG_READ(MV_USB_CORE_CMD_REG(dev));
+    regVal |= MV_USB_CORE_CMD_RESET_MASK;
+    MV_REG_WRITE(MV_USB_CORE_CMD_REG(dev), regVal);
+
+    /* Wait for the controller reset to complete */
+    do
+    {
+        regVal = MV_REG_READ(MV_USB_CORE_CMD_REG(dev));
+    } while (regVal & MV_USB_CORE_CMD_RESET_MASK);
+
+    /* Set USB_MODE register */
+    if(isHost)
+    {
+        regVal = MV_USB_CORE_MODE_HOST;
+    }
+    else
+    {
+        regVal = MV_USB_CORE_MODE_DEVICE | MV_USB_CORE_SETUP_LOCK_DISABLE_MASK;
+    }
+
+#if (MV_USB_VERSION == 0)
+    regVal |= MV_USB_CORE_STREAM_DISABLE_MASK;
+#endif
+
+    MV_REG_WRITE(MV_USB_CORE_MODE_REG(dev), regVal);
+
+    return MV_OK;
+}
+
+
+void        mvUsbPowerDown(int dev)
+{
+    MV_U32  regVal;
+
+    /* Stop USB Controller core */
+    regVal = MV_REG_READ(MV_USB_CORE_CMD_REG(dev));
+    if(regVal & MV_USB_CORE_CMD_RUN_MASK)
+    {
+        mvOsPrintf("USB #%d:  Warning USB core was not disabled\n", dev);
+        regVal &= ~MV_USB_CORE_CMD_RUN_MASK;
+        MV_REG_WRITE(MV_USB_CORE_CMD_REG(dev), regVal);
+    }
+
+    /* Power Down USB PHY */
+    regVal = MV_REG_READ(MV_USB_PHY_POWER_CTRL_REG(dev));
+    regVal &= ~(MV_USB_PHY_POWER_UP_MASK | MV_USB_PHY_PLL_POWER_UP_MASK);
+
+    MV_REG_WRITE(MV_USB_PHY_POWER_CTRL_REG(dev), regVal);
+}
+
+void        mvUsbPowerUp(int dev)
+{
+    MV_U32  regVal;
+
+    /* Power Up USB PHY */
+    regVal = MV_REG_READ(MV_USB_PHY_POWER_CTRL_REG(dev));
+    regVal |= (MV_USB_PHY_POWER_UP_MASK | MV_USB_PHY_PLL_POWER_UP_MASK);
+
+    MV_REG_WRITE(MV_USB_PHY_POWER_CTRL_REG(dev), regVal);
+
+    /* Start USB core */
+    regVal = MV_REG_READ(MV_USB_CORE_CMD_REG(dev));
+    if(regVal & MV_USB_CORE_CMD_RUN_MASK)
+    {
+        mvOsPrintf("USB #%d:  Warning USB core is enabled\n", dev);
+    }
+    else
+    {
+        regVal |= MV_USB_CORE_CMD_RUN_MASK;
+        MV_REG_WRITE(MV_USB_CORE_CMD_REG(dev), regVal);
+    }
+}
+
+
+void        mvUsbRegs(int dev)
+{
+    mvOsPrintf("\n\tUSB-%d Bridge Registers\n\n", dev);
+
+    mvOsPrintf("MV_USB_BRIDGE_CTRL_REG          : 0x%X = 0x%08x\n",
+                    MV_USB_BRIDGE_CTRL_REG(dev),
+                    MV_REG_READ(MV_USB_BRIDGE_CTRL_REG(dev)) );
+
+    mvOsPrintf("MV_USB_BRIDGE_INTR_MASK_REG     : 0x%X = 0x%08x\n",
+               MV_USB_BRIDGE_INTR_MASK_REG(dev),
+               MV_REG_READ(MV_USB_BRIDGE_INTR_MASK_REG(dev)));
+
+    mvOsPrintf("MV_USB_BRIDGE_INTR_CAUSE_REG    : 0x%X = 0x%08x\n",
+               MV_USB_BRIDGE_INTR_CAUSE_REG(dev),
+               MV_REG_READ(MV_USB_BRIDGE_INTR_CAUSE_REG(dev)));
+
+    mvOsPrintf("MV_USB_BRIDGE_ERROR_ADDR_REG    : 0x%X = 0x%08x\n",
+               MV_USB_BRIDGE_ERROR_ADDR_REG(dev),
+               MV_REG_READ(MV_USB_BRIDGE_ERROR_ADDR_REG(dev)));
+
+    mvOsPrintf("\n\tUSB-%d PHY Registers\n\n", dev);
+
+    mvOsPrintf("MV_USB_PHY_POWER_CTRL_REG       : 0x%X = 0x%08x\n",
+                MV_USB_PHY_POWER_CTRL_REG(dev),
+               MV_REG_READ(MV_USB_PHY_POWER_CTRL_REG(dev)) );
+
+    mvOsPrintf("MV_USB_PHY_TX_CTRL_REG          : 0x%X = 0x%08x\n",
+                MV_USB_PHY_TX_CTRL_REG(dev),
+               MV_REG_READ(MV_USB_PHY_TX_CTRL_REG(dev)) );
+    mvOsPrintf("MV_USB_PHY_RX_CTRL_REG          : 0x%X = 0x%08x\n",
+                MV_USB_PHY_RX_CTRL_REG(dev),
+               MV_REG_READ(MV_USB_PHY_RX_CTRL_REG(dev)) );
+    mvOsPrintf("MV_USB_PHY_IVREF_CTRL_REG       : 0x%X = 0x%08x\n",
+                MV_USB_PHY_IVREF_CTRL_REG(dev),
+               MV_REG_READ(MV_USB_PHY_IVREF_CTRL_REG(dev)) );
+
+    mvOsPrintf("\n");
+
+}
+
+void        mvUsbCoreRegs(int dev, MV_BOOL isHost)
+{
+    mvOsPrintf("\n\t USB-%d Core %s Registers\n\n",
+                    dev, isHost ? "HOST" : "DEVICE");
+
+    mvOsPrintf("MV_USB_CORE_ID_REG                  : 0x%X = 0x%08x\n",
+                MV_USB_CORE_ID_REG(dev),
+               MV_REG_READ(MV_USB_CORE_ID_REG(dev)) );
+
+    mvOsPrintf("MV_USB_CORE_GENERAL_REG             : 0x%X = 0x%08x\n",
+                MV_USB_CORE_GENERAL_REG(dev),
+               MV_REG_READ(MV_USB_CORE_GENERAL_REG(dev)) );
+
+    if(isHost)
+    {
+        mvOsPrintf("MV_USB_CORE_HOST_REG                : 0x%X = 0x%08x\n",
+                    MV_USB_CORE_HOST_REG(dev),
+                   MV_REG_READ(MV_USB_CORE_HOST_REG(dev)) );
+
+        mvOsPrintf("MV_USB_CORE_TTTX_BUF_REG            : 0x%X = 0x%08x\n",
+                    MV_USB_CORE_TTTX_BUF_REG(dev),
+                   MV_REG_READ(MV_USB_CORE_TTTX_BUF_REG(dev)) );
+
+        mvOsPrintf("MV_USB_CORE_TTRX_BUF_REG            : 0x%X = 0x%08x\n",
+                    MV_USB_CORE_TTRX_BUF_REG(dev),
+                   MV_REG_READ(MV_USB_CORE_TTRX_BUF_REG(dev)) );
+    }
+    else
+    {
+        mvOsPrintf("MV_USB_CORE_DEVICE_REG              : 0x%X = 0x%08x\n",
+                    MV_USB_CORE_DEVICE_REG(dev),
+                   MV_REG_READ(MV_USB_CORE_DEVICE_REG(dev)) );
+    }
+
+    mvOsPrintf("MV_USB_CORE_TX_BUF_REG              : 0x%X = 0x%08x\n",
+                MV_USB_CORE_TX_BUF_REG(dev),
+               MV_REG_READ(MV_USB_CORE_TX_BUF_REG(dev)) );
+
+    mvOsPrintf("MV_USB_CORE_RX_BUF_REG              : 0x%X = 0x%08x\n",
+                MV_USB_CORE_RX_BUF_REG(dev),
+               MV_REG_READ(MV_USB_CORE_RX_BUF_REG(dev)) );
+
+    mvOsPrintf("MV_USB_CORE_CAP_LENGTH_REG          : 0x%X = 0x%08x\n",
+                MV_USB_CORE_CAP_LENGTH_REG(dev),
+               MV_REG_READ(MV_USB_CORE_CAP_LENGTH_REG(dev)) );
+
+    if(isHost)
+    {
+        mvOsPrintf("MV_USB_CORE_CAP_HCS_PARAMS_REG      : 0x%X = 0x%08x\n",
+                    MV_USB_CORE_CAP_HCS_PARAMS_REG(dev),
+                   MV_REG_READ(MV_USB_CORE_CAP_HCS_PARAMS_REG(dev)) );
+
+        mvOsPrintf("MV_USB_CORE_CAP_HCC_PARAMS_REG      : 0x%X = 0x%08x\n",
+                    MV_USB_CORE_CAP_HCC_PARAMS_REG(dev),
+                   MV_REG_READ(MV_USB_CORE_CAP_HCC_PARAMS_REG(dev)) );
+    }
+    else
+    {
+        mvOsPrintf("MV_USB_CORE_CAP_DCI_VERSION_REG     : 0x%X = 0x%08x\n",
+                    MV_USB_CORE_CAP_DCI_VERSION_REG(dev),
+                   MV_REG_READ(MV_USB_CORE_CAP_DCI_VERSION_REG(dev)) );
+
+        mvOsPrintf("MV_USB_CORE_CAP_DCC_PARAMS_REG      : 0x%X = 0x%08x\n",
+                    MV_USB_CORE_CAP_DCC_PARAMS_REG(dev),
+                   MV_REG_READ(MV_USB_CORE_CAP_DCC_PARAMS_REG(dev)) );
+    }
+
+    mvOsPrintf("MV_USB_CORE_CMD_REG                 : 0x%X = 0x%08x\n",
+                MV_USB_CORE_CMD_REG(dev),
+               MV_REG_READ(MV_USB_CORE_CMD_REG(dev)) );
+
+    mvOsPrintf("MV_USB_CORE_STATUS_REG              : 0x%X = 0x%08x\n",
+                MV_USB_CORE_STATUS_REG(dev),
+               MV_REG_READ(MV_USB_CORE_STATUS_REG(dev)) );
+
+    mvOsPrintf("MV_USB_CORE_INTR_REG                : 0x%X = 0x%08x\n",
+                MV_USB_CORE_INTR_REG(dev),
+               MV_REG_READ(MV_USB_CORE_INTR_REG(dev)) );
+
+    mvOsPrintf("MV_USB_CORE_FRAME_INDEX_REG         : 0x%X = 0x%08x\n",
+                MV_USB_CORE_FRAME_INDEX_REG(dev),
+               MV_REG_READ(MV_USB_CORE_FRAME_INDEX_REG(dev)) );
+
+    mvOsPrintf("MV_USB_CORE_MODE_REG                : 0x%X = 0x%08x\n",
+                MV_USB_CORE_MODE_REG(dev),
+               MV_REG_READ(MV_USB_CORE_MODE_REG(dev)) );
+
+    if(isHost)
+    {
+        mvOsPrintf("MV_USB_CORE_PERIODIC_LIST_BASE_REG  : 0x%X = 0x%08x\n",
+                    MV_USB_CORE_PERIODIC_LIST_BASE_REG(dev),
+                   MV_REG_READ(MV_USB_CORE_PERIODIC_LIST_BASE_REG(dev)) );
+
+        mvOsPrintf("MV_USB_CORE_ASYNC_LIST_ADDR_REG     : 0x%X = 0x%08x\n",
+                    MV_USB_CORE_ASYNC_LIST_ADDR_REG(dev),
+                   MV_REG_READ(MV_USB_CORE_ASYNC_LIST_ADDR_REG(dev)) );
+
+        mvOsPrintf("MV_USB_CORE_CONFIG_FLAG_REG         : 0x%X = 0x%08x\n",
+                    MV_USB_CORE_CONFIG_FLAG_REG(dev),
+                   MV_REG_READ(MV_USB_CORE_CONFIG_FLAG_REG(dev)) );
+    }
+    else
+    {
+        int     numEp, ep;
+        MV_U32  epCtrlVal;
+
+        mvOsPrintf("MV_USB_CORE_DEV_ADDR_REG            : 0x%X = 0x%08x\n",
+                    MV_USB_CORE_DEV_ADDR_REG(dev),
+                   MV_REG_READ(MV_USB_CORE_DEV_ADDR_REG(dev)) );
+
+        mvOsPrintf("MV_USB_CORE_ENDPOINT_LIST_ADDR_REG  : 0x%X = 0x%08x\n",
+                    MV_USB_CORE_ENDPOINT_LIST_ADDR_REG(dev),
+                   MV_REG_READ(MV_USB_CORE_ENDPOINT_LIST_ADDR_REG(dev)) );
+
+        mvOsPrintf("MV_USB_CORE_ENDPT_SETUP_STAT_REG    : 0x%X = 0x%08x\n",
+                    MV_USB_CORE_ENDPT_SETUP_STAT_REG(dev),
+                    MV_REG_READ(MV_USB_CORE_ENDPT_SETUP_STAT_REG(dev)) );
+
+        mvOsPrintf("MV_USB_CORE_ENDPT_PRIME_REG         : 0x%X = 0x%08x\n",
+                    MV_USB_CORE_ENDPT_PRIME_REG(dev),
+                    MV_REG_READ(MV_USB_CORE_ENDPT_PRIME_REG(dev)) );
+
+        mvOsPrintf("MV_USB_CORE_ENDPT_FLUSH_REG         : 0x%X = 0x%08x\n",
+                    MV_USB_CORE_ENDPT_FLUSH_REG(dev),
+                    MV_REG_READ(MV_USB_CORE_ENDPT_FLUSH_REG(dev)) );
+
+        mvOsPrintf("MV_USB_CORE_ENDPT_STATUS_REG        : 0x%X = 0x%08x\n",
+                    MV_USB_CORE_ENDPT_STATUS_REG(dev),
+                    MV_REG_READ(MV_USB_CORE_ENDPT_STATUS_REG(dev)) );
+
+        mvOsPrintf("MV_USB_CORE_ENDPT_COMPLETE_REG      : 0x%X = 0x%08x\n",
+                    MV_USB_CORE_ENDPT_COMPLETE_REG(dev),
+                    MV_REG_READ(MV_USB_CORE_ENDPT_COMPLETE_REG(dev)) );
+
+        numEp = MV_REG_READ(MV_USB_CORE_CAP_DCC_PARAMS_REG(dev)) & 0x1F;
+
+        for(ep=0; ep<numEp; ep++)
+        {
+            epCtrlVal = MV_REG_READ( MV_USB_CORE_ENDPT_CTRL_REG(dev, ep));
+            if(epCtrlVal == 0)
+                continue;
+
+            mvOsPrintf("MV_USB_CORE_ENDPT_CTRL_REG[%02d]      : 0x%X = 0x%08x\n",
+                    ep, MV_USB_CORE_ENDPT_CTRL_REG(dev, ep), epCtrlVal);
+        }
+    }
+
+    mvOsPrintf("MV_USB_CORE_PORTSC_REG              : 0x%X = 0x%08x\n",
+                MV_USB_CORE_PORTSC_REG(dev),
+               MV_REG_READ(MV_USB_CORE_PORTSC_REG(dev)) );
+}
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/mvUsb.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/mvUsb.h
@@ -0,0 +1,106 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+        this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCmvUsbh
+#define __INCmvUsbh
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvSysUsbConfig.h"
+#include "usb/mvUsbRegs.h"
+
+typedef struct {
+	MV_U16		ctrlModel;
+	MV_U8		ctrlRev;
+} MV_USB_HAL_DATA;
+
+/* Functions */
+MV_STATUS   mvUsbHalInit(int dev, MV_BOOL isHost, MV_USB_HAL_DATA *halData);
+MV_U32      mvUsbGetCapRegAddr(int devNo);
+void        mvUsbDevResetComplete(int devNo);
+
+#ifdef MV_USB_VOLTAGE_FIX
+MV_U8       mvUsbGppInit(int dev);
+int         mvUsbBackVoltageUpdate(int dev, MV_U8 gppNo);
+#endif /* MV_USB_VOLTAGE_FIX */
+
+/* Power management routines */
+void        mvUsbPowerDown(int port);
+void        mvUsbPowerUp(int port);
+
+void        mvUsbRegs(int dev);
+void        mvUsbCoreRegs(int dev, MV_BOOL isHost);
+
+MV_STATUS   mvUsbWinInit(MV_U32 dev, MV_UNIT_WIN_INFO *addrWinMap);
+MV_STATUS   mvUsbWinRead(int dev, MV_U32 winNum, MV_UNIT_WIN_INFO *pDecWin);
+MV_STATUS   mvUsbWinWrite(int dev, MV_U32 winNum, MV_UNIT_WIN_INFO *pDecWin);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* __INCmvUsbh */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/common/mvUsbCore.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/common/mvUsbCore.h
@@ -0,0 +1,720 @@
+/*******************************************************************************
+
+This software file (the "File") is distributed by Marvell International Ltd. 
+or its affiliate(s) under the terms of the GNU General Public License Version 2, 
+June 1991 (the "License").  You may use, redistribute and/or modify this File 
+in accordance with the terms and conditions of the License, a copy of which 
+is available along with the File in the license.txt file or by writing to the 
+Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 
+or on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+(C) Copyright 2004 - 2007 Marvell Semiconductor Israel Ltd. All Rights Reserved.
+(C) Copyright 1999 - 2004 Chipidea Microelectronica, S.A. All Rights Reserved.
+
+*******************************************************************************/
+
+#ifndef __mvUsbCore_h__
+#define __mvUsbCore_h__
+
+#include "mvUsbTypes.h"
+
+/* VUSBHS specific defines */
+#define  VUSBHS_MAX_PORTS                          (8)
+#define  EHCI_CAP_LEN_MASK                         (0x000000FF)
+#define  EHCI_DATA_STRUCTURE_BASE_ADDRESS          (0)
+
+/* Command Register Bit Masks */
+#define  EHCI_CMD_RUN_STOP                         (0x00000001)
+#define  EHCI_CMD_CTRL_RESET                       (0x00000002)
+#define  EHCI_CMD_SETUP_TRIPWIRE_SET               (0x00002000)
+#define  EHCI_CMD_SETUP_TRIPWIRE_CLEAR             ~EHCI_CMD_SETUP_TRIPWIRE_SET
+
+#define  EHCI_CMD_ATDTW_TRIPWIRE_SET               (0x00004000)
+#define  EHCI_CMD_ATDTW_TRIPWIRE_CLEAR             ~EHCI_CMD_ATDTW_TRIPWIRE_SET
+
+/*bit 15,3,2 are for frame list size */
+#define  EHCI_CMD_FRAME_SIZE_1024                  (0x00000000) /* 000 */
+#define  EHCI_CMD_FRAME_SIZE_512                   (0x00000004) /* 001 */
+#define  EHCI_CMD_FRAME_SIZE_256                   (0x00000008) /* 010 */
+#define  EHCI_CMD_FRAME_SIZE_128                   (0x0000000C) /* 011 */
+#define  EHCI_CMD_FRAME_SIZE_64                    (0x00008000) /* 100 */
+#define  EHCI_CMD_FRAME_SIZE_32                    (0x00008004) /* 101 */
+#define  EHCI_CMD_FRAME_SIZE_16                    (0x00008008) /* 110 */
+#define  EHCI_CMD_FRAME_SIZE_8                     (0x0000800C) /* 111 */
+
+/* Hardware Rev 4.0 related change */                                             
+/* Mode Register Bit Masks */
+#define  VUSBHS_MODE_CTRL_MODE_IDLE                (0x00000000)
+#define  VUSBHS_MODE_CTRL_MODE_DEV                 (0x00000002)
+#define  VUSBHS_MODE_CTRL_MODE_HOST                (0x00000003)
+#define  VUSBHS_MODE_BIG_ENDIAN                    (0x00000004)
+#define  VUSBHS_MODE_SETUP_LOCK_DISABLE            (0x00000008)
+#define  VUSBHS_MODE_STREAM_DISABLE                (0x00000010)
+    
+/* Interrupt Enable Register Bit Masks */
+#define  EHCI_INTR_INT_EN                          (0x00000001)
+#define  EHCI_INTR_ERR_INT_EN                      (0x00000002)
+#define  EHCI_INTR_PORT_CHANGE_DETECT_EN           (0x00000004)
+
+#define  EHCI_INTR_ASYNC_ADV_AAE                   (0x00000020)
+#define  EHCI_INTR_ASYNC_ADV_AAE_ENABLE            (0x00000020) /* | with this to enable */
+#define  EHCI_INTR_ASYNC_ADV_AAE_DISABLE           (0xFFFFFFDF) /* & with this to disable */
+
+#define  EHCI_INTR_RESET_EN                        (0x00000040)
+#define  EHCI_INTR_SOF_UFRAME_EN                   (0x00000080)
+#define  EHCI_INTR_DEVICE_SUSPEND                  (0x00000100)
+
+/* Interrupt Status Register Masks */
+#define  EHCI_STS_SOF                              (0x00000080)
+#define  EHCI_STS_RESET                            (0x00000040)
+#define  EHCI_STS_PORT_CHANGE                      (0x00000004)
+#define  EHCI_STS_ERR                              (0x00000002)
+#define  EHCI_STS_INT                              (0x00000001)
+#define  EHCI_STS_SUSPEND                          (0x00000100)
+#define  EHCI_STS_HC_HALTED                        (0x00001000)
+
+/* Endpoint Queue Head Bit Masks */
+#define  VUSB_EP_QUEUE_HEAD_IOS                    (0x00008000)
+#define  VUSB_EP_QUEUE_HEAD_IOC                    (0x00008000)
+#define  VUSB_EP_QUEUE_HEAD_INT                    (0x00000100)
+#define  VUSB_EP_QUEUE_HEAD_NEXT_TERMINATE         (0x00000001)
+#define  VUSB_EP_QUEUE_HEAD_MAX_PKT_LEN_POS        (16)
+#define  VUSB_EP_QUEUE_HEAD_ZERO_LEN_TER_SEL       (0x20000000)
+#define  VUSB_EP_QUEUE_HEAD_MULT_POS               (30)
+#define  VUSB_EP_MAX_LENGTH_TRANSFER               (0x4000)
+
+#define  VUSB_EP_QUEUE_HEAD_STATUS_ACTIVE          (0x00000080)
+
+#define  VUSBHS_TD_NEXT_TERMINATE                  (0x00000001)
+#define  VUSBHS_TD_IOC                             (0x00008000)
+#define  VUSBHS_TD_STATUS_ACTIVE                   (0x00000080)
+#define  VUSBHS_TD_STATUS_HALTED                   (0x00000040)
+#define  VUSBHS_TD_RESERVED_FIELDS                 (0x00007F00)
+#define  VUSBHS_TD_ERROR_MASK                      (0x68)
+#define  VUSBHS_TD_ADDR_MASK                       (0xFFFFFFE0)
+#define  VUSBHS_TD_LENGTH_BIT_POS                  (16)
+
+#define  EHCI_EPCTRL_TX_ALL_MASK                   (0xFFFF0000)
+#define  EHCI_EPCTRL_RX_ALL_MASK                   (0x0000FFFF)
+
+#define  EHCI_EPCTRL_TX_DATA_TOGGLE_RST            (0x00400000)
+#define  EHCI_EPCTRL_TX_EP_STALL                   (0x00010000)
+#define  EHCI_EPCTRL_RX_EP_STALL                   (0x00000001)
+#define  EHCI_EPCTRL_RX_DATA_TOGGLE_RST            (0x00000040)
+#define  EHCI_EPCTRL_RX_ENABLE                     (0x00000080)
+#define  EHCI_EPCTRL_TX_ENABLE                     (0x00800000)
+#define  EHCI_EPCTRL_CONTROL                       (0x00000000)
+#define  EHCI_EPCTRL_ISOCHRONOUS                   (0x00040000)
+#define  EHCI_EPCTRL_BULK                          (0x00080000)
+#define  EHCI_EPCTRL_INT                           (0x000C0000)
+#define  EHCI_EPCTRL_TX_TYPE                       (0x000C0000)
+#define  EHCI_EPCTRL_RX_TYPE                       (0x0000000C)
+#define  EHCI_EPCTRL_DATA_TOGGLE_INHIBIT           (0x00000020)
+#define  EHCI_EPCTRL_TX_EP_TYPE_SHIFT              (18)
+#define  EHCI_EPCTRL_RX_EP_TYPE_SHIFT              (2)
+
+/* set bit 24 (PFSC) in PORTSCX register */
+#define  EHCI_PORTSCX_FORCE_FULL_SPEED_CONNECT     (0x01000000) 
+/* set bit 23 (PHCD) in PORTSCX register */
+#define  EHCI_PORTSCX_PHY_CLOCK_DISABLE            (0x00800000) 
+
+#define  EHCI_PORTSCX_PORT_POWER                   (0x00001000)
+#define  EHCI_PORTSCX_LINE_STATUS_BITS             (0x00000C00)
+#define  EHCI_PORTSCX_LINE_STATUS_SE0              (0x00000000)
+#define  EHCI_PORTSCX_LINE_STATUS_KSTATE           (0x00000400)
+#define  EHCI_PORTSCX_LINE_STATUS_JSTATE           (0x00000800)
+#define  EHCI_PORTSCX_PORT_HIGH_SPEED              (0x00000200)
+#define  EHCI_PORTSCX_PORT_RESET                   (0x00000100)
+#define  EHCI_PORTSCX_PORT_SUSPEND                 (0x00000080)
+#define  EHCI_PORTSCX_PORT_FORCE_RESUME            (0x00000040)
+#define  EHCI_PORTSCX_PORT_EN_DIS_CHANGE           (0x00000008)
+#define  EHCI_PORTSCX_PORT_ENABLE                  (0x00000004)
+#define  EHCI_PORTSCX_CONNECT_STATUS_CHANGE        (0x00000002)
+#define  EHCI_PORTSCX_CURRENT_CONNECT_STATUS       (0x00000001)
+
+#define  VUSBHS_PORTSCX_PORT_SPEED_FULL            (0x00000000)
+#define  VUSBHS_PORTSCX_PORT_SPEED_LOW             (0x04000000)
+#define  VUSBHS_PORTSCX_PORT_SPEED_HIGH            (0x08000000)
+#define  VUSBHS_SPEED_MASK                         (0x0C000000)
+#define  VUSBHS_SPEED_BIT_POS                      (26)
+
+#define  EHCI_PORTSCX_W1C_BITS                     (0x2A)
+#define  VUSB_EP_QH_PACKET_SIZE                    (0x3FFF0000)
+#define  VUSB_EP_TR_PACKET_SIZE                    (0x7FFF0000)
+
+#define  VUSBHS_FRINDEX_MS_MASK                    (0xFFFFFFF8)
+#define  VUSBHS_ADDRESS_BIT_SHIFT                  (25)
+
+#define  VUSB20_DCC_MAX_ENDPTS_SUPPORTED           (0x1F)
+#define  VUSB20_DCC_HOST_MODE_MASK                 (1 << 8)               
+#define  VUSB20_DCC_DEVICE_MODE_MASK               (1 << 7)               
+
+#define  EHCI_HCC_PARAMS_64_BIT_ADDR_CAP           (0x01)
+#define  EHCI_HCC_PARAMS_PGM_FRM_LIST_FLAG         (0x02)
+#define  EHCI_HCC_PARAMS_ASYNC_PARK_CAP            (0x04)
+#define  EHCI_HCC_PARAMS_ISOCH_SCHED_THRESHOLD     (0xF0)
+#define  EHCI_HCC_PARAMS_ISOCH_FRAME_CACHED        (0x80)
+
+#define  VUSB20_HCS_PARAMS_PORT_POWER_CONTROL_FLAG (0x10)
+
+#define  VUSB20_HOST_INTR_EN_BITS                  (0x37)
+
+#define  VUSB20_DEFAULT_PERIODIC_FRAME_LIST_SIZE   (1024)
+#define  VUSB20_NEW_PERIODIC_FRAME_LIST_BITS       (2)
+#define  EHCI_FRAME_LIST_ELEMENT_POINTER_T_BIT     (0x01)
+#define  EHCI_ITD_T_BIT                            (0x01)
+#define  EHCI_SITD_T_BIT                           (0x01)
+#define  EHCI_QUEUE_HEAD_POINTER_T_BIT             (0x01)
+
+
+/************************************************************
+Split transatcions specific defines
+************************************************************/
+#define  EHCI_START_SPLIT_MAX_BUDGET               188
+
+#define  EHCI_ELEMENT_TYPE_ITD                     (0x00)
+#define  EHCI_ELEMENT_TYPE_QH                      (0x02)
+#define  EHCI_ELEMENT_TYPE_SITD                    (0x04)
+#define  EHCI_ELEMENT_TYPE_FSTN                    (0x06)
+#define  EHCI_ELEMENT_TYPE_MASK                    (0x06)
+
+#define  EHCI_FRAME_LIST_ELEMENT_TYPE_ITD          (0x00)
+#define  EHCI_FRAME_LIST_ELEMENT_TYPE_QH           (0x01)
+#define  EHCI_FRAME_LIST_ELEMENT_TYPE_SITD         (0x02)
+#define  EHCI_FRAME_LIST_ELEMENT_TYPE_FSTN         (0x03)
+#define  EHCI_FRAME_LIST_ELEMENT_TYPE_BIT_POS      (1)
+
+
+#define  EHCI_QH_ELEMENT_TYPE_ITD                  (0x00)
+#define  EHCI_QH_ELEMENT_TYPE_QH                   (0x01)
+#define  EHCI_QH_ELEMENT_TYPE_SITD                 (0x02)
+#define  EHCI_QH_ELEMENT_TYPE_FSTN                 (0x03)
+
+#define  EHCI_QH_ELEMENT_TYPE_BIT_POS              (1)
+
+#define  EHCI_QTD_PID_OUT_TOKEN                    (0x000)
+#define  EHCI_QTD_PID_IN_TOKEN                     (0x100)
+#define  EHCI_QTD_PID_SETUP_TOKEN                  (0x200)
+#define  EHCI_QTD_IOC                              (0x8000)
+#define  EHCI_QTD_STATUS_ACTIVE                    (0x0080)
+#define  EHCI_QTD_STATUS_HALTED                    (0x0040)
+#define  EHCI_QTD_PID_SETUP                        (0x0200)
+#define  EHCI_QTD_PID_IN                           (0x0100)
+#define  EHCI_QTD_PID_OUT                          (0x0000)
+#define  EHCI_QTD_LENGTH_BIT_POS                   (16)
+#define  EHCI_QTD_DATA_TOGGLE                      (0x80000000)
+#define  EHCI_QTD_DATA_TOGGLE_BIT_POS              (31)
+#define  EHCI_QTD_LENGTH_BIT_MASK                  (0x7FFF0000)
+#define  EHCI_QTD_ERROR_BITS_MASK                  (0x0000003E)
+#define  EHCI_QTD_DEFAULT_CERR_VALUE               (0xC00)
+
+#define  EHCI_SETUP_TOKEN                          (2)
+#define  EHCI_OUT_TOKEN                            (0)
+#define  EHCI_IN_TOKEN                             (1)
+
+#define  EHCI_QTD_T_BIT                            (0x01)
+
+#define  EHCI_QH_ENDPOINT_SPEED_FULL               (0x00)
+#define  EHCI_QH_ENDPOINT_SPEED_LOW                (0x01)
+#define  EHCI_QH_ENDPOINT_SPEED_HIGH               (0x02)
+#define  EHCI_QH_ENDPOINT_SPEED_RESERVED           (0x03)
+
+#define  EHCI_ITD_LENGTH_BIT_POS                   (16)
+#define  EHCI_ITD_IOC_BIT                          (0x00008000)
+#define  EHCI_ITD_ACTIVE_BIT                       (0x80000000)
+#define  EHCI_ITD_PG_SELECT_BIT_POS                (12)
+#define  EHCI_ITD_DIRECTION_BIT_POS                (11)
+#define  EHCI_ITD_EP_BIT_POS                       (8)
+#define  EHCI_ITD_STATUS                           (0xF0000000)
+#define  EHCI_ITD_STATUS_ACTIVE                    (0x80000000) /*bit 4 = 1000*/
+#define  EHCI_ITD_STATUS_DATA_BUFFER_ERR           (0x40000000) /*bit 3 = 0100*/
+#define  EHCI_ITD_STATUS_BABBLE_ERROR              (0x20000000) /*bit 2 = 0010*/
+#define  EHCI_ITD_STATUS_TRANSACTION_ERR           (0x10000000) /*bit 4 = 0001*/
+
+#define  EHCI_ITD_LENGTH_TRANSMITTED               (0x0FFF0000)
+#define  EHCI_ITD_BUFFER_OFFSET                    (0x00000FFF)
+#define  EHCI_ITD_PAGE_NUMBER                      (0x00007000)
+#define  EHCI_ITD_BUFFER_POINTER                   (0xFFFFF000)
+#define  EHCI_ITD_MULTI_TRANSACTION_BITS           (0x00000003)
+
+          
+
+/* SITD position bits */
+#define  EHCI_SITD_DIRECTION_BIT_POS                (31)
+#define  EHCI_SITD_PORT_NUMBER_BIT_POS              (24)
+#define  EHCI_SITD_HUB_ADDR_BIT_POS                 (16)
+#define  EHCI_SITD_EP_ADDR_BIT_POS                  (8)
+
+#define  EHCI_SITD_COMPLETE_SPLIT_MASK_BIT_POS      (8)
+
+#define  EHCI_SITD_IOC_BIT_SET                      (0x80000000)
+#define  EHCI_SITD_PAGE_SELECT_BIT_POS              (30)
+#define  EHCI_SITD_TRANSFER_LENGTH_BIT_POS          (16)
+#define  EHCI_SITD_STATUS_ACTIVE                    (0x80)
+
+#define  EHCI_SITD_STATUS                           (0xFF)
+#define  EHCI_SITD_LENGTH_TRANSMITTED               (0x03FF0000)
+#define  EHCI_SITD_BUFFER_OFFSET                    (0x00000FFF)
+#define  EHCI_SITD_PAGE_NUMBER                      (0x40000000)
+#define  EHCI_SITD_BUFFER_POINTER                   (0xFFFFF000)
+
+
+
+#define  EHCI_SITD_BUFFER_PTR_BIT_POS              (12)
+#define  EHCI_SITD_TP_BIT_POS                      (3)
+#define  EHCI_SITD_TP_ALL                          (0)
+#define  EHCI_SITD_TP_BEGIN                        (1)
+#define  EHCI_SITD_TP_MID                          (2)
+#define  EHCI_SITD_TP_END                          (3)
+
+
+
+/* Interrupt enable bit masks */
+#define  EHCI_IER_ASYNCH_ADVANCE                   (0x00000020)
+#define  EHCI_IER_HOST_SYS_ERROR                   (0x00000010)
+#define  EHCI_IER_FRAME_LIST_ROLLOVER              (0x00000008)
+#define  EHCI_IER_PORT_CHANGE                      (0x00000004)
+#define  EHCI_IER_USB_ERROR                        (0x00000002)
+#define  EHCI_IER_USB_INTERRUPT                    (0x00000001)
+
+/* Interrupt status bit masks */
+#define  EHCI_STS_RECLAIMATION                     (0x00002000)
+#define  EHCI_STS_SOF_COUNT                        (0x00000080)
+#define  EHCI_STS_ASYNCH_ADVANCE                   (0x00000020)
+#define  EHCI_STS_HOST_SYS_ERROR                   (0x00000010)
+#define  EHCI_STS_FRAME_LIST_ROLLOVER              (0x00000008)
+#define  EHCI_STS_PORT_CHANGE                      (0x00000004)
+#define  EHCI_STS_USB_ERROR                        (0x00000002)
+#define  EHCI_STS_USB_INTERRUPT                    (0x00000001)
+
+/* Status bit masks */
+#define  EHCI_STS_ASYNCH_SCHEDULE                  (0x00008000)
+#define  EHCI_STS_PERIODIC_SCHEDULE                (0x00004000)
+#define  EHCI_STS_RECLAMATION                      (0x00002000)
+#define  EHCI_STS_HC_HALTED                        (0x00001000)
+
+/* USB command bit masks */
+#define  EHCI_USBCMD_ASYNC_SCHED_ENABLE            (0x00000020)
+#define  EHCI_USBCMD_PERIODIC_SCHED_ENABLE         (0x00000010)
+
+#define  EHCI_HCS_PARAMS_N_PORTS                   (0x0F)
+
+#define  VUSB_HS_DELAY                             (3500)
+
+#define  EHCI_QH_EP_NUM_MASK                       (0x0F00)
+#define  EHCI_QH_EP_NUM_BITS_POS                   (8)
+#define  EHCI_QH_DEVICE_ADDRESS_MASK               (0x7F)
+#define  EHCI_QH_SPEED_BITS_POS                    (12)
+#define  EHCI_QH_MAX_PKT_SIZE_BITS_POS             (16)
+#define  EHCI_QH_NAK_COUNT_RL_BITS_POS             (28)
+#define  EHCI_QH_EP_CTRL_FLAG_BIT_POS              (27)
+#define  EHCI_QH_HEAD_RECLAMATION_BIT_POS          (15)
+#define  EHCI_QH_DTC_BIT_POS                       (14)
+#define  EHCI_QH_HIGH_BW_MULT_BIT_POS              (30)
+#define  EHCI_QH_HUB_PORT_NUM_BITS_POS             (23)
+#define  EHCI_QH_HUB_ADDR_BITS_POS                 (16)
+#define  EHCI_QH_SPLIT_COMPLETION_MASK_BITS_POS    (8)
+#define  EHCI_QH_SPLIT_COMPLETION_MASK             (0xFF00)
+#define  EHCI_QH_INTR_SCHED_MASK                   (0xFF)
+#define  EHCI_QH_INACTIVATE_NEXT_TR_BIT_POS        (7)
+#define  EHCI_QH_HORIZ_PHY_ADDRESS_MASK            (0xFFFFFFE0)
+#define  EHCI_QH_TR_OVERLAY_DT_BIT                 (0x80000000)
+
+#define  EHCI_SITD_SPLIT_COMPLETION_MASK_BITS_POS  (8)
+
+#define  EHCI_INTR_NO_THRESHOLD_IMMEDIATE          (0x00010000)
+#define  EHCI_NEW_PERIODIC_FRAME_LIST_SIZE         (1024)
+#define  EHCI_FRAME_LIST_SIZE_BITS_POS             (2)
+#define  EHCI_HORIZ_PHY_ADDRESS_MASK              (0xFFFFFFE0)
+
+#define  DEFAULT_MAX_NAK_COUNT                     (15)
+
+/* OTG Status and control register bit masks */
+
+/* OTG interrupt enable bit masks */
+#define  VUSBHS_OTGSC_INTERRUPT_ENABLE_BITS_MASK   (0x5F000000)
+#define  VUSBHS_OTGSC_DPIE                         (0x40000000)   /* Data-line pulsing IE */
+#define  VUSBHS_OTGSC_1MSIE                        (0x20000000)
+#define  VUSBHS_OTGSC_BSEIE                        (0x10000000)   /* B-session end IE */
+#define  VUSBHS_OTGSC_BSVIE                        (0x08000000)   /* B-session valid IE */
+#define  VUSBHS_OTGSC_ASVIE                        (0x04000000)   /* A-session valid IE */
+#define  VUSBHS_OTGSC_AVVIE                        (0x02000000)   /* A-V-bus valid IE */
+#define  VUSBHS_OTGSC_IDIE                         (0x01000000)   /* OTG ID IE */
+
+/* OTG interrupt status bit masks */
+#define  VUSBHS_OTGSC_INTERRUPT_STATUS_BITS_MASK   (0x005F0000)
+#define  VUSBHS_OTGSC_DPIS                         (0x00400000)   /* Data-line pulsing IS */
+#define  VUSBHS_OTGSC_1MSIS                        (0x00200000)
+#define  VUSBHS_OTGSC_BSEIS                        (0x00100000)   /* B-session end IS */
+#define  VUSBHS_OTGSC_BSVIS                        (0x00080000)   /* B-session valid IS */
+#define  VUSBHS_OTGSC_ASVIS                        (0x00040000)   /* A-session valid IS */
+#define  VUSBHS_OTGSC_AVVIS                        (0x00020000)   /* A-Vbus valid IS */
+#define  VUSBHS_OTGSC_IDIS                         (0x00010000)   /* OTG ID IS */
+
+/* OTG status bit masks */
+#define  VUSBHS_OTGSC_DPS                          (0x00004000)
+#define  VUSBHS_OTGSC_BSE                          (0x00001000)   /* B-session end */
+#define  VUSBHS_OTGSC_BSV                          (0x00000800)   /* B-session valid */
+#define  VUSBHS_OTGSC_ASV                          (0x00000400)   /* A-session valid */
+#define  VUSBHS_OTGSC_AVV                          (0x00000200)   /* A-Vbus Valid */
+#define  VUSBHS_OTGSC_ID                           (0x00000100)   /* OTG ID */
+
+/* OTG control bit masks */
+#define  VUSBHS_OTGSC_CTL_BITS                     (0x2F)
+#define  VUSBHS_OTGSC_HABA                         (0x00000080)   /* hardware assisted data pulse bits*/
+#define  VUSBHS_OTGSC_HADP                         (0x00000040)   /* hardware assisted data pulse bits*/
+
+#ifdef PATCH_3
+/* the following change is to be compatable with 4.0 revision of
+hardware. Enable the following switch in config.mk to enable the
+changes. */
+
+    /* WEB20040409 below line changed from VUSBHS_OTGSC_B_HOST_EN to VUSBHS_OTGSC_IDPU 
+       to reflect change in usbhs4.0  B_HOST_EN has not been used quite some time */
+    #define  VUSBHS_OTGSC_IDPU                         (0x00000020)   /* ID pull enable */
+#else
+    #define  VUSBHS_OTGSC_B_HOST_EN                    (0x00000020)   /* B_host_enable */
+#endif
+
+#define  VUSBHS_OTGSC_DP                           (0x00000010)   /* Data-pulsing */
+#define  VUSBHS_OTGSC_OT                           (0x00000008)   /* OTG termination */
+#if 0
+    #define  VUSBHS_OTGSC_VO                       (0x00000004)   /* Vbus on */
+#endif
+
+#define  VUSBHS_OTGSC_HAAR                         (0x00000004)   /* Auto reset bit*/
+
+#define  VUSBHS_OTGSC_VC                           (0x00000002)   /* Vbus charge */
+#define  VUSBHS_OTGSC_VD                           (0x00000001)   /* Vbus discharge */
+
+typedef  uint_32  USB_REGISTER, _PTR_ USB_REGISTER_PTR;
+
+/* The VUSB register structure */
+typedef struct {
+   union  {
+      struct  {
+         volatile USB_REGISTER   CAPLENGTH_HCIVER;
+         volatile USB_REGISTER   HCS_PARAMS;       /* HC structural parameters */
+         volatile USB_REGISTER   HCC_PARAMS;       /* HC Capability Parameters*/
+         volatile USB_REGISTER   RESERVED1[5];
+         volatile USB_REGISTER   DCI_VERSION;      /* DC version number and reserved 16 bits */
+         volatile USB_REGISTER   DCC_PARAMS;       /* DC Capability Parameters */
+      } CAPABILITY_REGISTERS;
+      
+      struct  {
+         volatile USB_REGISTER   USB_CMD;                   /* Command register */
+         volatile USB_REGISTER   USB_STS;                   /* Status register */
+         volatile USB_REGISTER   USB_INTR;                  /* Interrupt enable */
+         volatile USB_REGISTER   USB_FRINDEX;               /* Frame index */
+         volatile USB_REGISTER   CTRLDSSEGMENT;             /* 4G segment selector */
+         volatile USB_REGISTER   DEVICE_ADDR;               /* Device Address */
+         volatile USB_REGISTER   EP_LIST_ADDR;              /* Endpoint List Address */
+         volatile USB_REGISTER   RESERVED0[9];
+         volatile USB_REGISTER   CONFIG_FLAG;               /* Configured Flag register */
+         volatile USB_REGISTER   PORTSCX[VUSBHS_MAX_PORTS]; /* Port Status/Control x, x = 1..8 */
+         volatile USB_REGISTER   OTGSC;
+         volatile USB_REGISTER   USB_MODE;                  /* USB Host/Device mode */
+         volatile USB_REGISTER   ENDPT_SETUP_STAT;          /* Endpoint Setup Status */
+         volatile USB_REGISTER   ENDPTPRIME;                /* Endpoint Initialize */
+         volatile USB_REGISTER   ENDPTFLUSH;                /* Endpoint De-initialize */
+         volatile USB_REGISTER   ENDPTSTATUS;               /* Endpoint Status */
+         volatile USB_REGISTER   ENDPTCOMPLETE;             /* Endpoint Interrupt On Complete */
+         volatile USB_REGISTER   ENDPTCTRLX[16];            /* Endpoint Control, where x = 0.. 15 */
+      } OPERATIONAL_DEVICE_REGISTERS;
+      
+      struct  {
+         volatile USB_REGISTER   USB_CMD;                   /* Command register */
+         volatile USB_REGISTER   USB_STS;                   /* Status register */
+         volatile USB_REGISTER   USB_INTR;                  /* Interrupt enable */
+         volatile USB_REGISTER   USB_FRINDEX;               /* Frame index */
+         volatile USB_REGISTER   CTRLDSSEGMENT;             /* 4G segment selector */
+         volatile USB_REGISTER   PERIODIC_LIST_BASE_ADDR;   /* Periodic schedule list */
+         volatile USB_REGISTER   CURR_ASYNC_LIST_ADDR;      /* Current Asynch schedule list */
+         volatile USB_REGISTER   ASYNCTTSTS;                /* Async buffer in embedded TT control */
+         volatile USB_REGISTER   RESERVED0[8];
+         volatile USB_REGISTER   CONFIG_FLAG;               /* Configured Flag register */
+         volatile USB_REGISTER   PORTSCX[VUSBHS_MAX_PORTS]; /* Port Status/Control x, x = 1..8 */
+         volatile USB_REGISTER   OTGSC;                     /* OTG status and control register */
+         volatile USB_REGISTER   USB_MODE;                  /* USB Host/Device mode */
+      } OPERATIONAL_HOST_REGISTERS;
+   } REGISTERS;
+} VUSB20_REG_STRUCT, _PTR_ VUSB20_REG_STRUCT_PTR;
+
+typedef struct {
+   volatile uint_32   MAX_PKT_LENGTH;    /* Bits 16..26 Bit 15 is Interrupt 
+                                          ** On Setup 
+                                          */
+   volatile uint_32   CURR_DTD_PTR;        /* Current dTD Pointer */
+   volatile uint_32   NEXT_DTD_PTR;        /* Next dTD Pointer */
+   volatile uint_32   SIZE_IOC_INT_STS;    /* Total bytes (16..30), IOC (15), 
+                                          ** INT (8), STS (0-7) 
+                                          */
+   volatile uint_32   BUFF_PTR0;           /* Buffer pointer Page 0 (12-31) */
+   volatile uint_32   BUFF_PTR1;           /* Buffer pointer Page 1 (12-31) */
+   volatile uint_32   BUFF_PTR2;           /* Buffer pointer Page 2 (12-31) */
+   volatile uint_32   BUFF_PTR3;           /* Buffer pointer Page 3 (12-31) */
+   volatile uint_32   BUFF_PTR4;           /* Buffer pointer Page 4 (12-31) */
+   volatile uint_32   RESERVED1;
+   volatile uint_8    SETUP_BUFFER[8];     /* 8 bytes of setup data that follows 
+                                            ** the Setup PID 
+                                            */
+   volatile uint_32   RESERVED2[4];
+} VUSB20_EP_QUEUE_HEAD_STRUCT, _PTR_ VUSB20_EP_QUEUE_HEAD_STRUCT_PTR;
+
+typedef struct {
+   pointer              PRIVATE;
+   void (_CODE_PTR_     FREE)(pointer);
+   pointer              XD_FOR_THIS_DTD;
+} SCRATCH_STRUCT, _PTR_ SCRATCH_STRUCT_PTR;
+
+typedef struct ep_tr_struct {
+   volatile uint_32      NEXT_TR_ELEM_PTR; /* Memory address of next 
+                                          ** dTD to be processed (5-31)
+                                          ** and the T (bit 0) indicating 
+                                          ** pointer validity
+                                          */
+   volatile uint_32      SIZE_IOC_STS;     /* total bytes (16-30), 
+                                          ** IOC (15), Status (0-7) 
+                                          */
+   volatile uint_32      BUFF_PTR0;        /* Buffer pointer Page 0 */
+   volatile uint_32      BUFF_PTR1;        /* Buffer pointer Page 1 */
+   volatile uint_32      BUFF_PTR2;        /* Buffer pointer Page 2 */
+   volatile uint_32      BUFF_PTR3;        /* Buffer pointer Page 3 */
+   volatile uint_32      BUFF_PTR4;        /* Buffer pointer Page 4 */
+   volatile SCRATCH_STRUCT_PTR   SCRATCH_PTR;
+} VUSB20_EP_TR_STRUCT, _PTR_ VUSB20_EP_TR_STRUCT_PTR;
+
+typedef struct {
+   uint_32      NEXT_LINK_PTR;    /* (5-31) Memory address of 
+                                          ** next schedule data structure 
+                                          ** item Type (1..2 ) and the 
+                                          ** T (bit 0) indicating pointer 
+                                          ** validity
+                                          */
+   uint_32      TR_STATUS_CTL_LIST[8];  /* bits 31-28: Status,
+                                                ** bits 27-16: Tr X length
+                                                ** bit 15: Int on complete
+                                                ** bits 14-12: Page Select
+                                                ** bits 11-0: Tr X offset
+                                                */
+   uint_32      BUFFER_PAGE_PTR_LIST[7];  /* bits 31-12 4K aligned pointer 
+                                                ** to physical memory 
+                                                ** bits 11-8 endpoint no.
+                                                ** bit 7: reserved
+                                                ** bits 6-0 device address*/
+   SCRATCH_STRUCT_PTR   SCRATCH_PTR;
+   pointer      PIPE_DESCR_FOR_THIS_ITD;
+   pointer      PIPE_TR_DESCR_FOR_THIS_ITD;
+   uint_32_ptr  frame_list_ptr;
+   uint_32      number_of_transactions;
+   /* 32-byte aligned structures */
+   uint_32        RESERVED[11];
+} EHCI_ITD_STRUCT, _PTR_ EHCI_ITD_STRUCT_PTR;
+
+typedef struct {
+   uint_32      NEXT_LINK_PTR;    /* (5-31) Memory address of 
+                                          ** next schedule data structure 
+                                          ** item Type (1..2 ) and the 
+                                          ** T (bit 0) indicating pointer 
+                                          ** validity
+                                          */
+   uint_32      EP_CAPAB_CHARAC;  /* bits 31: Direction (I/O),
+                                          ** bits 30-24: Port number
+                                          ** bit 23: reserved
+                                          ** bits 22-16: Hub address
+                                          ** bits 15-12: Reserved
+                                          ** bits 11-8: Endpoint number
+                                          ** bit 7: reserved
+                                          ** bits 6-0: device address
+                                          */
+   uint_32      UFRAME_SCHED_CTL; /* bits 31-16: reserved 
+                                          ** bits 15-8: Split completion mask
+                                          ** bits 7-0: Split start mask
+                                          */
+   uint_32      TRANSFER_STATE;   /* bit 31: int on complete
+                                          ** bit 30: Page Select
+                                          ** bits 29-26: Reserved
+                                          ** bits 25-16: total bytes to 
+                                          ** transfer
+                                          ** bits 15-8: uframe 
+                                          ** complete-split progress mask
+                                          ** bits 7-0: status
+                                          */
+   uint_32      BUFFER_PTR_0;     /* bits 31-12: 4K aligned pointer 
+                                          ** to physical memory 
+                                          ** bits 11-0: Current offset
+                                          */
+   uint_32      BUFFER_PTR_1;     /* bits 31-12: 4K aligned pointer 
+                                          ** to physical memory 
+                                          ** bits 11-5 reserved
+                                          ** bits 4-3 tr position
+                                          ** bits 2-0 tr count
+                                          */
+   uint_32      BACK_LINK_PTR;    /* bits 31-5 back pointer points to sITD 
+                                          ** bits 4-1: reserved
+                                          ** bit 0: terminate
+                                          */
+   SCRATCH_STRUCT_PTR   SCRATCH_PTR;
+   pointer      PIPE_DESCR_FOR_THIS_SITD;
+   pointer      PIPE_TR_DESCR_FOR_THIS_SITD;
+   uint_32_ptr  frame_list_ptr;
+
+   /* align to 16 word boundry */
+   uint_32      RESERVED[5];
+
+} EHCI_SITD_STRUCT, _PTR_ EHCI_SITD_STRUCT_PTR;
+
+typedef struct {
+   uint_32      NEXT_QTD_PTR;     /* (5-31) Memory address of 
+                                          ** next qTD to be processed
+                                          ** (4..1) reserved 
+                                          ** T (bit 0) indicating pointer 
+                                          ** validity
+                                          */
+   uint_32      ALT_NEXT_QTD_PTR; /* bits 31-5: alternate next 
+                                          ** qTD if the above one encounters 
+                                          ** a short packet
+                                          ** (4..1) reserved 
+                                          ** T (bit 0) indicating pointer 
+                                          ** validity
+                                          */
+   uint_32      TOKEN;            /* bits 31: data toggle 
+                                          ** bits 30-16: Total bytes to transfer
+                                          ** bit 15: Interrupt on Complete
+                                          ** bits 14-12: Current page
+                                          ** bits 11-10: Error Counter
+                                          ** bits 9-8: PID code
+                                          ** bits 7-0: status
+                                          */
+   uint_32      BUFFER_PTR_0;     /* bit 31-12: 4K-page aligned 
+                                          ** physical memory address
+                                          ** bit 11-0: Current Offset
+                                          */
+   uint_32      BUFFER_PTR_1;     /* bit 31-12: 4K-page aligned 
+                                          ** physical memory address
+                                          ** bit 11-0: reserved
+                                          */
+   uint_32      BUFFER_PTR_2;     /* bit 31-12: 4K-page aligned 
+                                          ** physical memory address
+                                          ** bit 11-0: reserved
+                                          */
+   uint_32      BUFFER_PTR_3;     /* bit 31-12: 4K-page aligned 
+                                          ** physical memory address
+                                          ** bit 11-0: reserved
+                                          */
+   uint_32      BUFFER_PTR_4;     /* bit 31-12: 4K-page aligned 
+                                          ** physical memory address
+                                          ** bit 11-0: reserved
+                                          */
+   SCRATCH_STRUCT_PTR   SCRATCH_PTR;
+   pointer     PIPE_DESCR_FOR_THIS_QTD;
+   pointer     TR_FOR_THIS_QTD;
+   uint_32     RESERVED[5];
+} EHCI_QTD_STRUCT, _PTR_ EHCI_QTD_STRUCT_PTR;
+
+typedef struct {
+   uint_32      HORIZ_LINK_PTR;   /* (5-31) Memory address of 
+                                          ** next data object to be processed
+                                          ** (4..3) reserved 
+                                          ** (2..1) type of the item
+                                          ** T (bit 0) indicating pointer 
+                                          ** validity
+                                          */
+   uint_32      EP_CAPAB_CHARAC1; /* bits 31-28: NAK count reload,
+                                          ** bit 27: Control endpoint flag
+                                          ** bit 26-16: Maximum packet length
+                                          ** bit 15: Head of reclamation 
+                                          ** list flag
+                                          ** bit 14: data toggle control
+                                          ** bits 13-12: endpoint speed
+                                          ** bit 11-8: endpoint number
+                                          ** bits 7: Inactivate on next tr
+                                          ** bits 6-0: Device address
+                                          */
+   uint_32      EP_CAPAB_CHARAC2; /* bits 31-30: High-BW pipe 
+                                          ** Multiplier, 
+                                          ** bit 29-23: Port number
+                                          ** bit 22-16: Hub address
+                                          ** bit 15-8: Split completion mask
+                                          ** bit 7-0: Interrupt schedule mask
+                                          */
+   uint_32      CURR_QTD_LINK_PTR;/* bits 31-5: physical memory address
+                                          ** of the current xaction processed
+                                          */
+   uint_32      NEXT_QTD_LINK_PTR;/* bits 31-5: physical memory address
+                                          ** of the current xaction processed
+                                          ** bit 0: Terminate bit
+                                          */
+   uint_32      ALT_NEXT_QTD_LINK_PTR;  /* bits 31-5: physical memory address
+                                                ** of the current xaction processed
+                                                ** bits 4-1: NAK counter
+                                                ** bit 0: Terminate bit
+                                                */
+   uint_32      STATUS;           /* bit 31: data-toggle
+                                          ** bits 30-16: total bytes to transfer
+                                          ** bit 15: Interrupt on complete
+                                          ** bits 11-10: Error counter
+                                          ** bit 0: Ping state/Err
+                                          ** physical memory address
+                                          ** bit 11-0: reserved
+                                          */
+   uint_32      BUFFER_PTR_0;     /* bit 31-12: 4K-page aligned 
+                                          ** physical memory address
+                                          ** bit 11-0: reserved
+                                          */
+   uint_32      BUFFER_PTR_1;     /* bit 31-12: 4K-page aligned 
+                                          ** physical memory address
+                                          ** bit 7-0: Split-transaction, 
+                                          ** complete-split progress
+                                          */
+   uint_32      BUFFER_PTR_2;     /* bits 31-12: 4K-page aligned 
+                                          ** physical memory address
+                                          ** bits 11-5: S-bytes
+                                          ** bits 4-0: Split-transaction 
+                                          ** frame tag
+                                          */
+   uint_32      BUFFER_PTR_3;     /* bit 31-12: 4K-page aligned 
+                                          ** physical memory address
+                                          ** bit 11-0: reserved
+                                          */
+   uint_32      BUFFER_PTR_4;     /* bit 31-12: 4K-page aligned 
+                                          ** physical memory address
+                                          ** bit 11-0: reserved
+                                          */
+   SCRATCH_STRUCT_PTR   SCRATCH_PTR;
+   pointer     PIPE_DESCR_FOR_THIS_QH;
+   uint_32     RESERVED[18];
+} EHCI_QH_STRUCT, _PTR_ EHCI_QH_STRUCT_PTR;
+
+typedef struct {
+   uint_32      NORMAL_PATH_LINK_PTR;   /* (5-31) Memory address of 
+                                                ** next data object to be processed
+                                                ** in the periodic list
+                                                ** bits 4-3: reserved 
+                                                ** (2..1) type of the item
+                                                ** T (bit 0) indicating pointer 
+                                                ** validity
+                                                */
+   uint_32      BACK_PATH_LINK_PTR;     /* bits 31-5: Memory address of 
+                                                ** the queue head,
+                                                ** bit 4-3: reserved
+                                                ** (2..1) type of the item
+                                                ** T (bit 0) indicating pointer 
+                                                ** validity
+                                                */
+   SCRATCH_STRUCT_PTR   SCRATCH_PTR;
+   /* 32-bytes aligned */
+   uint_32              RESERVED[6];
+} EHCI_FSTN_STRUCT, _PTR_ EHCI_FSTN_STRUCT_PTR;
+
+typedef uint_32   EHCI_FRAME_LIST_ELEMENT_POINTER;
+
+#endif /* __mvUsbCore_h__ */
+/* EOF */
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/common/mvUsbDesc.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/common/mvUsbDesc.h
@@ -0,0 +1,162 @@
+/*******************************************************************************
+
+This software file (the "File") is distributed by Marvell International Ltd. 
+or its affiliate(s) under the terms of the GNU General Public License Version 2, 
+June 1991 (the "License").  You may use, redistribute and/or modify this File 
+in accordance with the terms and conditions of the License, a copy of which 
+is available along with the File in the license.txt file or by writing to the 
+Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 
+or on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+(C) Copyright 2004 - 2007 Marvell Semiconductor Israel Ltd. All Rights Reserved.
+(C) Copyright 1999 - 2004 Chipidea Microelectronica, S.A. All Rights Reserved.
+
+*******************************************************************************/
+
+#ifndef __mvUsbDesc_h__
+#define __mvUsbDesc_h__
+
+#include "mvUsbTypes.h"
+
+typedef struct usb_device_descriptor
+{
+   uint_8   bLength;          /* Descriptor size in bytes = 18 */
+   uint_8   bDescriptorType;  /* DEVICE descriptor type = 1 */
+   uint_8   bcdUSD[2];        /* USB spec in BCD, e.g. 0x0200 */
+   uint_8   bDeviceClass;     /* Class code, if 0 see interface */
+   uint_8   bDeviceSubClass;  /* Sub-Class code, 0 if class = 0 */
+   uint_8   bDeviceProtocol;  /* Protocol, if 0 see interface */
+   uint_8   bMaxPacketSize;   /* Endpoint 0 max. size */
+   uint_8   idVendor[2];      /* Vendor ID per USB-IF */
+   uint_8   idProduct[2];     /* Product ID per manufacturer */
+   uint_8   bcdDevice[2];     /* Device release # in BCD */
+   uint_8   iManufacturer;    /* Index to manufacturer string */
+   uint_8   iProduct;         /* Index to product string */
+   uint_8   iSerialNumber;    /* Index to serial number string */
+   uint_8   bNumConfigurations; /* Number of possible configurations */ 
+} DEVICE_DESCRIPTOR, _PTR_ DEVICE_DESCRIPTOR_PTR;  
+
+typedef struct usb_configuration_descriptor
+{
+   uint_8   bLength;          /* Descriptor size in bytes = 9 */
+   uint_8   bDescriptorType;  /* CONFIGURATION type = 2 or 7 */
+   uint_8   wTotalLength[2];  /* Length of concatenated descriptors */
+   uint_8   bNumInterfaces;   /* Number of interfaces, this config. */
+   uint_8   bConfigurationValue;  /* Value to set this config. */ 
+   uint_8   iConfig;          /* Index to configuration string */
+   uint_8   bmAttributes;     /* Config. characteristics */
+   #define  CONFIG_RES7       (0x80)  /* Reserved, always = 1 */
+   #define  CONFIG_SELF_PWR   (0x40)  /* Self-powered device */
+   #define  CONFIG_WAKEUP     (0x20)  /* Remote wakeup */
+   uint_8   bMaxPower;        /* Max.power from bus, 2mA units */
+} CONFIGURATION_DESCRIPTOR, _PTR_ CONFIGURATION_DESCRIPTOR_PTR;  
+
+typedef struct usb_interface_descriptor
+{
+   uint_8   bLength;          /* Descriptor size in bytes = 9 */
+   uint_8   bDescriptorType;  /* INTERFACE descriptor type = 4 */
+   uint_8   bInterfaceNumber; /* Interface no.*/
+   uint_8   bAlternateSetting;  /* Value to select this IF */
+   uint_8   bNumEndpoints;    /* Number of endpoints excluding 0 */
+   uint_8   bInterfaceClass;  /* Class code, 0xFF = vendor */
+   uint_8   bInterfaceSubClass;  /* Sub-Class code, 0 if class = 0 */
+   uint_8   bInterfaceProtocol;  /* Protocol, 0xFF = vendor */
+   uint_8   iInterface;       /* Index to interface string */
+} INTERFACE_DESCRIPTOR, _PTR_ INTERFACE_DESCRIPTOR_PTR;  
+
+typedef struct usb_endpoint_descriptor
+{
+   uint_8   bLength;          /* Descriptor size in bytes = 7 */
+   uint_8   bDescriptorType;  /* ENDPOINT descriptor type = 5 */
+   uint_8   bEndpointAddress; /* Endpoint # 0 - 15 | IN/OUT */
+   #define  IN_ENDPOINT    (0x80)   /* IN endpoint, device to host */
+   #define  OUT_ENDPOINT   (0x00)   /* OUT endpoint, host to device */
+   #define  ENDPOINT_MASK  (0x0F)   /* Mask endpoint # */
+   uint_8   bmAttributes;     /* Transfer type */
+   #define  CONTROL_ENDPOINT  (0x00)   /* Control transfers */
+   #define  ISOCH_ENDPOINT    (0x01)   /* Isochronous transfers */
+   #define  BULK_ENDPOINT     (0x02)   /* Bulk transfers */
+   #define  IRRPT_ENDPOINT    (0x03)   /* Interrupt transfers */
+   #define  EP_TYPE_MASK      (0x03)   /* Mask type bits */
+   /* Following must be zero except for isochronous endpoints */
+   #define  ISOCH_NOSYNC      (0x00)   /* No synchronization */
+   #define  ISOCH_ASYNC       (0x04)   /* Asynchronous */
+   #define  ISOCH_ADAPT       (0x08)   /* Adaptive */
+   #define  ISOCH_SYNCH       (0x0C)   /* Synchrounous */
+   #define  ISOCH_DATA        (0x00)   /* Data endpoint */
+   #define  ISOCH_FEEDBACK    (0x10)   /* Feedback endpoint */
+   #define  ISOCH_IMPLICIT    (0x20)   /* Implicit feedback */
+   #define  ISOCH_RESERVED    (0x30)   /* Reserved */
+   uint_8   wMaxPacketSize[2];   /* Bits 10:0 = max. packet size */
+   /* For high-speed interrupt or isochronous only, additional
+   **   transaction opportunities per microframe follow.*/
+   #define  PACKET_SIZE_MASK     (0x7FF)  /* packet size bits */
+   #define  NO_ADDITONAL      (0x0000)   /* 1 / microframe */
+   #define  ONE_ADDITIONAL    (0x0800)   /* 2 / microframe */
+   #define  TWO_ADDITIONAL    (0x1000)   /* 3 / microframe */
+   #define  ADDITIONAL_MASK   (ONE_ADDITIONAL | TWO_ADDITIONAL)
+   uint_8   iInterval;        /* Polling interval in (micro) frames */
+} ENDPOINT_DESCRIPTOR, _PTR_ ENDPOINT_DESCRIPTOR_PTR;  
+
+typedef struct usb_qualifier_descriptor
+{
+   uint_8   bLength;          /* Descriptor size in bytes = 10 */
+   uint_8   bDescriptorType;  /* DEVICE QUALIFIER type = 6 */
+   uint_8   bcdUSD[2];        /* USB spec in BCD, e.g. 0x0200 */
+   uint_8   bDeviceClass;     /* Class code, if 0 see interface */
+   uint_8   bDeviceSubClass;  /* Sub-Class code, 0 if class = 0 */
+   uint_8   bDeviceProtocol;  /* Protocol, if 0 see interface */
+   uint_8   bMaxPacketSize;   /* Endpoint 0 max. size */
+   uint_8   bNumConfigurations; /* Number of possible configurations */
+   uint_8   bReserved;        /* Reserved = 0 */ 
+} QUALIFIER_DESCRIPTOR, _PTR_ QUALIFIER_DESCRIPTOR_PTR;  
+
+/* Other-Config type 7 fields are identical to type 2 above */
+
+/* Interface-Power descriptor  type 8 not used  in this version */
+
+typedef struct usb_otg_descriptor
+{
+   uint_8   bLength;          /* Descriptor size in bytes = 9 */
+   uint_8   bDescriptorType;  /* CONFIGURATION type = 2 or 7 */
+   uint_8   bmAttributes;     /* OTG characteristics */
+   #define  OTG_SRP_SUPPORT   (0x01)  /* Supports SRP */
+   #define  OTG_HNP_SUPPORT   (0x02)  /* Supports HNP */
+} OTG_DESCRIPTOR, _PTR_ OTG_DESCRIPTOR_PTR;  
+
+typedef union descriptor_union
+{
+   uint_32                       word;
+   uint_8_ptr                    bufr;
+   pointer                       pntr;
+   DEVICE_DESCRIPTOR_PTR         dvic;
+   CONFIGURATION_DESCRIPTOR_PTR  cfig;
+   INTERFACE_DESCRIPTOR_PTR      intf;
+   ENDPOINT_DESCRIPTOR_PTR       ndpt;
+   QUALIFIER_DESCRIPTOR_PTR      qual;
+   OTG_DESCRIPTOR_PTR            otg;
+}  DESCRIPTOR_UNION, _PTR_ DESCRIPTOR_UNION_PTR;
+                           
+/* Prototypes */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern uint_32 usb_host_init(uint_8, uint_32, 
+                  _usb_host_handle _PTR_);
+extern uint_32 _usb_host_open_pipe(_usb_host_handle, 
+                  PIPE_INIT_PARAM_STRUCT_PTR, _usb_pipe_handle _PTR_ );
+
+#ifdef __cplusplus
+}
+#endif                         
+
+#endif /* __mvUsbDesc_h__ */
+
+/* EOF */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/device/mvUsbDevPrv.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/device/mvUsbDevPrv.h
@@ -0,0 +1,267 @@
+/*******************************************************************************
+
+This software file (the "File") is distributed by Marvell International Ltd. 
+or its affiliate(s) under the terms of the GNU General Public License Version 2, 
+June 1991 (the "License").  You may use, redistribute and/or modify this File 
+in accordance with the terms and conditions of the License, a copy of which 
+is available along with the File in the license.txt file or by writing to the 
+Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 
+or on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+(C) Copyright 2004 - 2007 Marvell Semiconductor Israel Ltd. All Rights Reserved.
+(C) Copyright 1999 - 2004 Chipidea Microelectronica, S.A. All Rights Reserved.
+
+*******************************************************************************/
+
+#ifndef __mvUsbDevPrv_h__
+#define __mvUsbDevPrv_h__
+
+#include "mvUsbCore.h"
+
+
+#define USB_TEST_MODE_TEST_PACKET_LENGTH   (53)
+
+ 
+#define USB_XD_QADD(head,tail,XD)      \
+   if ((head) == NULL) {         \
+      (head) = (XD);            \
+   } else {                      \
+      (tail)->SCRATCH_PTR->PRIVATE = (XD);   \
+   } /* Endif */                 \
+   (tail) = (XD);               \
+   (XD)->SCRATCH_PTR->PRIVATE = NULL
+   
+#define USB_XD_QGET(head,tail,XD)      \
+   (XD) = (head);               \
+   if (head) {                   \
+      (head) = (XD_STRUCT_PTR)((head)->SCRATCH_PTR->PRIVATE);  \
+      if ((head) == NULL) {      \
+         (tail) = NULL;          \
+      } /* Endif */              \
+   } /* Endif */
+
+#define EHCI_DTD_QADD(head,tail,dTD)      \
+   if ((head) == NULL) {         \
+      (head) = (dTD);            \
+   } else {                      \
+      (tail)->SCRATCH_PTR->PRIVATE = (void *) (dTD);   \
+   } /* Endif */                 \
+   (tail) = (dTD);               \
+   (dTD)->SCRATCH_PTR->PRIVATE = NULL
+   
+#define EHCI_DTD_QGET(head,tail,dTD)      \
+   (dTD) = (head);               \
+   if (head) {                   \
+      (head) = (head)->SCRATCH_PTR->PRIVATE;  \
+      if ((head) == NULL) {      \
+         (tail) = NULL;          \
+      } /* Endif */              \
+   } /* Endif */
+
+/***************************************
+**
+** Data structures
+**
+*/
+
+typedef struct
+{
+    uint_32     usb_isr_count;
+    uint_32     usb_reset_count;
+    uint_32     usb_send_count;
+    uint_32     usb_recv_count;
+    uint_32     usb_setup_count;
+    uint_32     free_XD_count;
+    uint_32     free_dTD_count;
+    uint_32     usb_cancel_count;
+    uint_32     usb_add_count;
+    uint_32     usb_add_not_empty_count;
+    uint_32     usb_empty_isr_count;
+    uint_32     usb_empty_complete_count;
+    uint_32     usb_read_setup_count;
+    uint_32     usb_complete_isr_count;
+    uint_32     usb_complete_count;
+    uint_32     usb_complete_max_count;
+    uint_32     usb_port_change_count; 
+    uint_32     usb_suspend_count;
+    uint_32     usb_complete_ep_count[ARC_USB_MAX_ENDPOINTS*2];
+
+} USB_STATS;
+
+
+
+/* Callback function storage structure */
+typedef struct service_struct 
+{
+    uint_8   TYPE;
+    void     (_CODE_PTR_ SERVICE)(pointer, uint_8, boolean, uint_8, uint_8_ptr, uint_32, uint_8);
+    struct service_struct _PTR_   NEXT;
+
+} SERVICE_STRUCT, _PTR_ SERVICE_STRUCT_PTR;
+
+typedef struct xd_struct 
+{
+    uint_8         EP_NUM;           /* Endpoint number */
+    uint_8         BDIRECTION;       /* Direction : Send/Receive */
+    uint_8         EP_TYPE;          /* Type of the endpoint: Ctrl, Isoch, Bulk, Int */
+    uint_8         BSTATUS;          /* Current transfer status */
+    uint_8_ptr     WSTARTADDRESS;    /* Address of first byte */
+    uint_32        WTOTALLENGTH;     /* Number of bytes to send/recv */
+    uint_32        WSOFAR;           /* Number of bytes recv'd so far */
+    uint_16        WMAXPACKETSIZE;   /* Max Packet size */
+    boolean        DONT_ZERO_TERMINATE;
+    uint_8         MAX_PKTS_PER_UFRAME;
+    SCRATCH_STRUCT *SCRATCH_PTR;
+} XD_STRUCT, _PTR_ XD_STRUCT_PTR;
+
+/* The USB Device State Structure */
+typedef struct 
+{
+    boolean                          BUS_RESETTING;       /* Device is 
+                                                         ** being reset */
+    volatile VUSB20_REG_STRUCT_PTR   CAP_REGS_PTR;        /* Capabilities registers */
+
+    volatile VUSB20_REG_STRUCT_PTR   DEV_PTR;            /* Device Controller 
+                                                         ** Register base 
+                                                         ** address */
+
+    SERVICE_STRUCT_PTR               SERVICE_HEAD_PTR;   /* Head struct 
+                                                         ** address of 
+                                                         ** registered services 
+                                                         */
+    XD_STRUCT_PTR                    TEMP_XD_PTR;         /* Temp xd for ep init */
+    XD_STRUCT_PTR                    XD_BASE;
+    XD_STRUCT_PTR                    XD_HEAD;             /* Head Transaction 
+                                                         ** descriptors 
+                                                         */
+    XD_STRUCT_PTR                    XD_TAIL;             /* Tail Transaction 
+                                                         ** descriptors 
+                                                         */
+    uint_32                          XD_ENTRIES;
+    uint_8*                          EP_QUEUE_HEAD_BASE;
+    uint_32                          EP_QUEUE_HEAD_PHYS;
+    uint_32                          EP_QUEUE_HEAD_SIZE;
+    VUSB20_EP_QUEUE_HEAD_STRUCT_PTR  EP_QUEUE_HEAD_PTR;   /* Endpoint Queue head */   
+
+    uint_8*                          DTD_BASE_PTR;        /* Device transfer descriptor pool address */
+    uint_32                          DTD_BASE_PHYS;
+    uint_32                          DTD_SIZE;
+    VUSB20_EP_TR_STRUCT_PTR          DTD_ALIGNED_BASE_PTR;/* Aligned transfer descriptor pool address */
+
+    VUSB20_EP_TR_STRUCT_PTR          DTD_HEAD;
+    VUSB20_EP_TR_STRUCT_PTR          DTD_TAIL;
+    VUSB20_EP_TR_STRUCT_PTR          EP_DTD_HEADS[ARC_USB_MAX_ENDPOINTS * 2];
+    VUSB20_EP_TR_STRUCT_PTR          EP_DTD_TAILS[ARC_USB_MAX_ENDPOINTS * 2];
+    SCRATCH_STRUCT_PTR               XD_SCRATCH_STRUCT_BASE;
+   
+   
+    SCRATCH_STRUCT_PTR               SCRATCH_STRUCT_BASE;
+   
+    uint_16                          USB_STATE;
+    uint_16                          USB_DEVICE_STATE;
+    uint_16                          USB_SOF_COUNT;
+    uint_16                          DTD_ENTRIES;
+    uint_16                          ERRORS;
+    uint_16                          ERROR_STATE;
+    uint_16                          USB_DEV_STATE_B4_SUSPEND;
+    uint_8                           DEV_NUM;             /* USB device number 
+                                                         ** on the board 
+                                                         */
+    uint_8                           SPEED;               /* Low Speed, 
+                                                         ** High Speed, 
+                                                         ** Full Speed 
+                                                         */
+    uint_8                           MAX_ENDPOINTS;       /* Max endpoints
+                                                         ** supported by this
+                                                         ** device
+                                                         */
+                                                         
+    uint_8                           USB_CURR_CONFIG;                                                         
+    uint_8                           DEVICE_ADDRESS;
+    uint_8                           FORCE_FS;
+    USB_STATS                        STATS;
+
+    uint_8*                          STATUS_UNAIGNED_PTR;
+    uint_16*                         STATUS_PTR;
+
+    uint_8*                          TEST_PKT_UNAIGNED_PTR;
+    uint_8*                          TEST_PKT_PTR;
+
+} USB_DEV_STATE_STRUCT, _PTR_ USB_DEV_STATE_STRUCT_PTR;
+
+/* ONLY For data bases allocated by the driver (when PHYS and VIRT bases are known) */
+#define USB_EP_QH_VIRT_TO_PHYS(handle, virtAddr)                                                    \
+    (((virtAddr) == NULL) ? 0 : ((handle)->EP_QUEUE_HEAD_PHYS +                                \
+                          ((uint_32)(virtAddr) - (uint_32)(handle)->EP_QUEUE_HEAD_BASE)))
+
+#define USB_DTD_VIRT_TO_PHYS(handle, virtAddr)                                                    \
+    (((virtAddr) == NULL) ? 0 : ((handle)->DTD_BASE_PHYS +                                \
+                          ((uint_32)(virtAddr) - (uint_32)(handle)->DTD_BASE_PTR)))
+
+#define USB_DTD_PHYS_TO_VIRT(handle, physAddr)                                                    \
+    (((physAddr) == 0) ? NULL : ((handle)->DTD_BASE_PTR +                             \
+                                ((physAddr) - (handle)->DTD_BASE_PHYS)))
+
+
+/***************************************
+**
+** Prototypes
+**
+*/
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern uint_8  _usb_device_call_service(void* handle, uint_8, boolean,
+                                 boolean, uint_8_ptr, uint_32, uint_8);
+
+extern uint_8   _usb_dci_vusb20_init(uint_8, _usb_device_handle);
+extern void     _usb_device_free_XD(pointer);
+extern void     _usb_dci_vusb20_free_dTD(pointer);
+extern uint_8   _usb_dci_vusb20_add_dTD(_usb_device_handle, XD_STRUCT_PTR);
+extern uint_8   _usb_dci_vusb20_cancel_transfer(_usb_device_handle, uint_8, uint_8);
+extern uint_8   _usb_dci_vusb20_get_transfer_status(_usb_device_handle, uint_8, uint_8);
+extern XD_STRUCT_PTR _usb_dci_vusb20_get_transfer_details(_usb_device_handle, uint_8, uint_8);
+extern void     _usb_dci_vusb20_process_tr_complete(_usb_device_handle);
+extern void     _usb_dci_vusb20_process_reset(_usb_device_handle);
+extern void     _usb_dci_vusb20_process_tr_complete(_usb_device_handle);
+extern void     _usb_dci_vusb20_process_suspend(_usb_device_handle);
+extern void     _usb_dci_vusb20_process_SOF(_usb_device_handle);
+extern void     _usb_dci_vusb20_process_port_change(_usb_device_handle);
+extern void     _usb_dci_vusb20_process_error(_usb_device_handle);
+extern void     _usb_dci_vusb20_shutdown(_usb_device_handle);
+extern void     _usb_dci_vusb20_set_speed_full(_usb_device_handle, uint_8);
+extern void     _usb_dci_vusb20_suspend_phy(_usb_device_handle, uint_8);
+extern void     _usb_dci_vusb20_hnp_shutdown(void);
+extern void     _usb_dci_vusb20_set_address(_usb_device_handle, uint_8);
+extern void     _usb_dci_vusb20_get_setup_data(_usb_device_handle, uint_8, uint_8_ptr);
+extern void     _usb_dci_vusb20_assert_resume(_usb_device_handle);
+extern uint_8   _usb_dci_vusb20_init_endpoint(_usb_device_handle, XD_STRUCT_PTR);
+extern void     _usb_dci_vusb20_stall_endpoint(_usb_device_handle, uint_8, uint_8);
+extern void     _usb_dci_vusb20_unstall_endpoint(_usb_device_handle, uint_8, uint_8);
+extern uint_8   _usb_dci_vusb20_is_endpoint_stalled(_usb_device_handle, uint_8, uint_8);
+extern uint_8   _usb_dci_vusb20_deinit_endpoint(_usb_device_handle, uint_8, uint_8);
+extern void     _usb_dci_vusb20_chip_initialize(_usb_device_handle);
+extern void     _usb_dci_vusb20_stop(_usb_device_handle handle);
+extern void     _usb_dci_vusb20_start(_usb_device_handle handle);
+
+#if defined(USB_UNDERRUN_WA)
+
+extern uint_8*  usbSramBase;
+extern int      usbSramSize;
+
+void    _usb_reset_send_queue(void);
+void    usbSendComplete(void* handle, uint_8 type, boolean setup, uint_8 dir, 
+                        uint_8_ptr buffer, uint_32 length, uint_8 error);
+#endif /* USB_UNDERRUN_WA */
+                         
+#ifdef __cplusplus
+}
+#endif
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/device/mvUsbHsDevMain.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/device/mvUsbHsDevMain.c
@@ -0,0 +1,1868 @@
+/*******************************************************************************
+
+This software file (the "File") is distributed by Marvell International Ltd. 
+or its affiliate(s) under the terms of the GNU General Public License Version 2, 
+June 1991 (the "License").  You may use, redistribute and/or modify this File 
+in accordance with the terms and conditions of the License, a copy of which 
+is available along with the File in the license.txt file or by writing to the 
+Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 
+or on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+(C) Copyright 2004 - 2007 Marvell Semiconductor Israel Ltd. All Rights Reserved.
+(C) Copyright 1999 - 2004 Chipidea Microelectronica, S.A. All Rights Reserved.
+
+*******************************************************************************/
+
+#include "mvUsbDevApi.h"
+#include "mvUsbDevPrv.h"
+
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_dci_vusb20_init
+*  Returned Value : USB_OK or error code
+*  Comments       :
+*        Initializes the USB device controller.
+*
+*END*-----------------------------------------------------------------*/
+uint_8 _usb_dci_vusb20_init
+   (
+      /* [IN] the USB device controller to initialize */
+      uint_8                     devnum,
+
+      /* [OUT] the USB_dev_initialize state structure */
+      _usb_device_handle         handle
+   )
+{ /* Body */
+    USB_DEV_STATE_STRUCT_PTR    usb_dev_ptr;
+    uint_32                     temp;
+    uint_8*                     pBuf;
+    unsigned long               phyAddr;
+      
+    usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+
+    usb_dev_ptr->CAP_REGS_PTR = 
+       (VUSB20_REG_STRUCT_PTR)USB_get_cap_reg_addr(devnum);
+      
+    /* Get the base address of the VUSB_HS registers */
+    usb_dev_ptr->DEV_PTR = 
+      (VUSB20_REG_STRUCT_PTR)(((uint_32)usb_dev_ptr->CAP_REGS_PTR) + 
+       (USB_32BIT_LE(usb_dev_ptr->CAP_REGS_PTR->REGISTERS.CAPABILITY_REGISTERS.CAPLENGTH_HCIVER) & 
+                                                                EHCI_CAP_LEN_MASK));
+
+    /* Get the maximum number of endpoints supported by this USB controller */
+    usb_dev_ptr->MAX_ENDPOINTS = 
+      (USB_32BIT_LE(usb_dev_ptr->CAP_REGS_PTR->REGISTERS.CAPABILITY_REGISTERS.DCC_PARAMS) & 
+                                                VUSB20_DCC_MAX_ENDPTS_SUPPORTED);
+
+    USB_printf("USB init: CAP_REGS=0x%x, DEV_REGS=0x%x, MAX_EP=%d\n",
+                (unsigned)usb_dev_ptr->CAP_REGS_PTR, (unsigned)usb_dev_ptr->DEV_PTR, 
+                usb_dev_ptr->MAX_ENDPOINTS);
+
+    temp = (usb_dev_ptr->MAX_ENDPOINTS * 2);
+   
+    pBuf = (uint_8*)USB_uncached_memalloc(temp*sizeof(VUSB20_EP_QUEUE_HEAD_STRUCT), 
+                                          2048, &phyAddr);      
+    if (pBuf == NULL) 
+    {
+        USB_printf("_usb_dci_vusb20_init, malloc of %d bytes in Uncached area failed\n",
+                        temp*sizeof(VUSB20_EP_QUEUE_HEAD_STRUCT));
+        return USBERR_ALLOC;
+    }
+
+    /****************************************************************   
+      Assign QH base
+    ****************************************************************/   
+    usb_dev_ptr->EP_QUEUE_HEAD_BASE = pBuf;
+    usb_dev_ptr->EP_QUEUE_HEAD_PHYS = (uint_32)phyAddr;
+
+    /* Align the endpoint queue head to 2K boundary */   
+    usb_dev_ptr->EP_QUEUE_HEAD_PTR = (VUSB20_EP_QUEUE_HEAD_STRUCT_PTR)
+                USB_MEM2048_ALIGN((uint_32)usb_dev_ptr->EP_QUEUE_HEAD_BASE);
+
+    usb_dev_ptr->EP_QUEUE_HEAD_SIZE = temp*sizeof(VUSB20_EP_QUEUE_HEAD_STRUCT) +
+                                      ((uint_32)usb_dev_ptr->EP_QUEUE_HEAD_PTR - 
+                                       (uint_32)usb_dev_ptr->EP_QUEUE_HEAD_BASE);
+
+    /****************************************************************   
+      Zero out the memory allocated
+    ****************************************************************/   
+    USB_memzero( (void*)usb_dev_ptr->EP_QUEUE_HEAD_PTR, 
+                 temp*sizeof(VUSB20_EP_QUEUE_HEAD_STRUCT));
+
+    USB_printf("USB EP_QH: Base=%p (0x%x), Aligned(%d)=%p, Size=%d\n",
+                usb_dev_ptr->EP_QUEUE_HEAD_BASE, usb_dev_ptr->EP_QUEUE_HEAD_PHYS,
+                2048, usb_dev_ptr->EP_QUEUE_HEAD_PTR, usb_dev_ptr->EP_QUEUE_HEAD_SIZE);
+
+    /****************************************************************   
+      Assign DTD base
+    ****************************************************************/   
+    pBuf = (uint_8*)USB_uncached_memalloc(MAX_EP_TR_DESCRS*sizeof(VUSB20_EP_TR_STRUCT), 
+                                          32, &phyAddr);      
+    if (pBuf == NULL) 
+    {
+        USB_printf("_usb_dci_vusb20_init, malloc of %d bytes in Uncached area failed\n",
+                        MAX_EP_TR_DESCRS*sizeof(VUSB20_EP_TR_STRUCT));
+        return USBERR_ALLOC;
+    }
+
+    usb_dev_ptr->DTD_BASE_PTR = pBuf;
+    usb_dev_ptr->DTD_BASE_PHYS = (uint_32)phyAddr;
+    
+    /* Align the dTD base to 32 byte boundary */   
+    usb_dev_ptr->DTD_ALIGNED_BASE_PTR = (VUSB20_EP_TR_STRUCT_PTR)
+                        USB_MEM32_ALIGN((uint_32)usb_dev_ptr->DTD_BASE_PTR);
+
+    usb_dev_ptr->DTD_SIZE = MAX_EP_TR_DESCRS*sizeof(VUSB20_EP_TR_STRUCT) +
+                                ((uint_32)usb_dev_ptr->EP_QUEUE_HEAD_PTR - 
+                                 (uint_32)usb_dev_ptr->EP_QUEUE_HEAD_BASE);
+
+    /****************************************************************   
+      Zero out the memory allocated
+    ****************************************************************/   
+    USB_memzero((void*)usb_dev_ptr->DTD_ALIGNED_BASE_PTR, 
+                MAX_EP_TR_DESCRS*sizeof(VUSB20_EP_TR_STRUCT));
+
+    /****************************************************************   
+      Assign SCRATCH Structure base
+    ****************************************************************/   
+    /* Allocate memory for internal scratch structure */   
+    pBuf = USB_memalloc(MAX_EP_TR_DESCRS*sizeof(SCRATCH_STRUCT));
+    if (pBuf == NULL) 
+    {
+        USB_printf("_usb_dci_vusb20_init, malloc of %d bytes failed\n",
+                        MAX_EP_TR_DESCRS*sizeof(SCRATCH_STRUCT));
+        return USBERR_ALLOC;
+    }
+    usb_dev_ptr->SCRATCH_STRUCT_BASE = (SCRATCH_STRUCT_PTR)pBuf;
+    USB_memzero(usb_dev_ptr->SCRATCH_STRUCT_BASE, 
+            MAX_EP_TR_DESCRS*sizeof(SCRATCH_STRUCT));
+
+    USB_printf("USB dTD(%d): Base=%p (0x%x), Aligned(%d)=%p, Size=%d, Scratch=%p\n",
+                MAX_EP_TR_DESCRS, usb_dev_ptr->DTD_BASE_PTR, usb_dev_ptr->DTD_BASE_PHYS,
+                32, usb_dev_ptr->DTD_ALIGNED_BASE_PTR, usb_dev_ptr->DTD_SIZE,
+                usb_dev_ptr->SCRATCH_STRUCT_BASE);
+
+#ifdef USB_UNDERRUN_WA
+    usbSramBase = (uint_8*)USB_get_sram_addr(&usbSramSize);
+    if (usbSramBase == NULL) 
+    {
+        USB_printf("_usb_dci_vusb20_init, SRAM is not available\n");                        
+        return USBERR_ALLOC;
+    }
+    USB_memzero(usbSramBase, usbSramSize);
+    USB_printf("USB WA_Queue: base=%p, size=%d, parts=%d\n", 
+                    usbSramBase, usbSramSize, global_wa_sram_parts);
+#endif /* USB_UNDERRUN_WA */
+
+    usb_dev_ptr->USB_STATE = ARC_USB_STATE_UNKNOWN;
+
+    /* Initialize the VUSB_HS controller */   
+    _usb_dci_vusb20_chip_initialize((pointer)usb_dev_ptr);
+
+    return USB_OK;   
+} /* EndBody */
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_dci_vusb20_chip_initialize
+*  Returned Value : USB_OK or error code
+*  Comments       :
+*        Initializes the USB device controller.
+*
+*END*-----------------------------------------------------------------*/
+void _usb_dci_vusb20_chip_initialize
+   (
+      /* [IN] the USB_dev_initialize state structure */
+      _usb_device_handle         handle
+   )
+{ /* Body */
+    USB_DEV_STATE_STRUCT_PTR         usb_dev_ptr;
+    VUSB20_REG_STRUCT_PTR            dev_ptr;
+    VUSB20_EP_QUEUE_HEAD_STRUCT_PTR  ep_queue_head_ptr;
+    VUSB20_EP_TR_STRUCT_PTR          dTD_ptr;
+    uint_32                          i, port_control;
+    SCRATCH_STRUCT_PTR               temp_scratch_ptr;
+    volatile unsigned long           delay;
+
+    ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_INIT, "chip_initialize\n");
+   
+    usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+
+    dev_ptr = (VUSB20_REG_STRUCT_PTR)usb_dev_ptr->DEV_PTR;
+   
+    /* Stop the controller */
+    dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_CMD &= ~(USB_32BIT_LE(EHCI_CMD_RUN_STOP));
+      
+    /* Reset the controller to get default values */
+    dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_CMD = USB_32BIT_LE(EHCI_CMD_CTRL_RESET);
+
+    USB_printf("USB Init: Wait for RESET completed\n");
+   
+    delay = 0x100000;
+    while (dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_CMD & 
+                                    (USB_32BIT_LE(EHCI_CMD_CTRL_RESET))) 
+    {
+        /* Wait for the controller reset to complete */
+        delay--;
+        if(delay == 0)
+            break;
+    } /* EndWhile */
+
+    if(delay == 0)
+    {
+        USB_printf("USB Init: Wait for RESET completed TIMEOUT\n");
+    }
+    else
+    {
+        USB_printf("USB Init: RESET completed\n");
+    }
+    /* Call BSP callback to complete reset process */
+    USB_reset_complete(usb_dev_ptr->DEV_NUM);
+
+    /* Initialize the internal dTD head and tail to NULL */   
+    usb_dev_ptr->DTD_HEAD = NULL;
+    usb_dev_ptr->DTD_TAIL = NULL;
+    usb_dev_ptr->DTD_ENTRIES = 0; 
+    usb_dev_ptr->ERROR_STATE = 0;
+
+   /* Make sure the 16 MSBs of this register are 0s */
+   dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPT_SETUP_STAT = USB_32BIT_LE(0);
+   
+   ep_queue_head_ptr = usb_dev_ptr->EP_QUEUE_HEAD_PTR;
+
+   /* Initialize all device queue heads */
+   for (i=0; i<(usb_dev_ptr->MAX_ENDPOINTS*2); i++) 
+   {
+      /* Interrupt on Setup packet */
+      (ep_queue_head_ptr + i)->MAX_PKT_LENGTH = (USB_32BIT_LE(
+          ((uint_32)USB_MAX_CTRL_PAYLOAD << VUSB_EP_QUEUE_HEAD_MAX_PKT_LEN_POS) | 
+            VUSB_EP_QUEUE_HEAD_IOS));
+
+      (ep_queue_head_ptr + i)->NEXT_DTD_PTR = (USB_32BIT_LE(VUSB_EP_QUEUE_HEAD_NEXT_TERMINATE));
+   } /* Endfor */
+
+   /* Configure the Endpoint List Address */
+   dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.EP_LIST_ADDR = 
+                            USB_32BIT_LE(USB_EP_QH_VIRT_TO_PHYS(usb_dev_ptr, ep_queue_head_ptr));
+      
+   port_control = USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.PORTSCX[0]);
+   if (usb_dev_ptr->CAP_REGS_PTR->REGISTERS.CAPABILITY_REGISTERS.HCS_PARAMS & 
+                                        USB_32BIT_LE(VUSB20_HCS_PARAMS_PORT_POWER_CONTROL_FLAG)) 
+   {
+      port_control &= (~EHCI_PORTSCX_W1C_BITS | ~EHCI_PORTSCX_PORT_POWER);
+   } /* Endif */
+   
+   if(usb_dev_ptr->FORCE_FS == TRUE)
+   {
+       port_control |= EHCI_PORTSCX_FORCE_FULL_SPEED_CONNECT;
+   }
+   else
+   {
+       port_control &= (~EHCI_PORTSCX_FORCE_FULL_SPEED_CONNECT);
+   }
+   dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.PORTSCX[0] = USB_32BIT_LE(port_control);
+
+   dTD_ptr = usb_dev_ptr->DTD_ALIGNED_BASE_PTR;
+
+   temp_scratch_ptr = usb_dev_ptr->SCRATCH_STRUCT_BASE;
+
+   /* Enqueue all the dTDs */   
+   for (i=0; i<MAX_EP_TR_DESCRS; i++) 
+   {
+      dTD_ptr->SCRATCH_PTR = temp_scratch_ptr;
+      dTD_ptr->SCRATCH_PTR->FREE = _usb_dci_vusb20_free_dTD;
+      /* Set the dTD to be invalid */
+      dTD_ptr->NEXT_TR_ELEM_PTR = USB_32BIT_LE(VUSBHS_TD_NEXT_TERMINATE);
+      /* Set the Reserved fields to 0 */
+      dTD_ptr->SIZE_IOC_STS &= ~(USB_32BIT_LE(VUSBHS_TD_RESERVED_FIELDS));
+      dTD_ptr->SCRATCH_PTR->PRIVATE = (pointer)usb_dev_ptr;
+      _usb_dci_vusb20_free_dTD((pointer)dTD_ptr);
+      dTD_ptr++;
+      temp_scratch_ptr++;
+   } /* Endfor */
+} /* EndBody */
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_dci_vusb20_free_dTD
+*  Returned Value : void
+*  Comments       :
+*        Enqueues a dTD onto the free DTD ring.
+*
+*END*-----------------------------------------------------------------*/
+
+void _usb_dci_vusb20_free_dTD
+   (
+      /* [IN] the dTD to enqueue */
+      pointer  dTD_ptr
+   )
+{ /* Body */
+   USB_DEV_STATE_STRUCT_PTR     usb_dev_ptr;
+   int                          lockKey;
+
+   usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)(((VUSB20_EP_TR_STRUCT_PTR)dTD_ptr)->SCRATCH_PTR->PRIVATE);
+
+   ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_TRACE, "free_dTD: dTD_ptr=0x%x\n", (unsigned)dTD_ptr);
+
+   ARC_DEBUG_CODE(ARC_DEBUG_FLAG_STATS, (usb_dev_ptr->STATS.free_dTD_count++));
+
+
+   /*
+   ** This function can be called from any context, and it needs mutual
+   ** exclusion with itself.
+   */
+   lockKey = USB_lock();
+
+   /*
+   ** Add the dTD to the free dTD queue (linked via PRIVATE) and
+   ** increment the tail to the next descriptor
+   */
+   EHCI_DTD_QADD(usb_dev_ptr->DTD_HEAD, usb_dev_ptr->DTD_TAIL, (VUSB20_EP_TR_STRUCT_PTR)dTD_ptr);
+   usb_dev_ptr->DTD_ENTRIES++;
+
+   USB_unlock(lockKey);
+
+} /* Endbody */
+
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_dci_vusb20_add_dTD
+*  Returned Value : USB_OK or error code
+*  Comments       :
+*        Adds a device transfer desriptor(s) to the queue.
+*
+*END*-----------------------------------------------------------------*/
+uint_8 _usb_dci_vusb20_add_dTD
+   (
+      /* [IN] the USB_dev_initialize state structure */
+      _usb_device_handle         handle,
+     
+      /* [IN] The transfer descriptor address */
+      XD_STRUCT_PTR              xd_ptr
+   )
+{ /* Body */
+   USB_DEV_STATE_STRUCT_PTR         usb_dev_ptr;
+   VUSB20_REG_STRUCT_PTR            dev_ptr;
+   VUSB20_EP_TR_STRUCT_PTR          dTD_ptr, temp_dTD_ptr, first_dTD_ptr = NULL;
+   VUSB20_EP_QUEUE_HEAD_STRUCT_PTR  ep_queue_head_ptr;
+   uint_32                          curr_pkt_len, remaining_len; 
+   uint_32                          curr_offset, temp, bit_pos;
+   volatile unsigned long           timeout;
+   
+   /*********************************************************************
+   For a optimal implementation, we need to detect the fact that
+   we are adding DTD to an empty list. If list is empty, we can
+   actually skip several programming steps esp. those for ensuring
+   that there is no race condition.The following boolean will be useful
+   in skipping some code here.
+   *********************************************************************/
+   boolean           list_empty = FALSE;
+   
+   usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+   dev_ptr = (VUSB20_REG_STRUCT_PTR)usb_dev_ptr->DEV_PTR;
+
+   remaining_len = xd_ptr->WTOTALLENGTH;
+   
+   curr_offset = 0;
+   temp = (2*xd_ptr->EP_NUM + xd_ptr->BDIRECTION);
+   bit_pos = (1 << (16 * xd_ptr->BDIRECTION + xd_ptr->EP_NUM));
+   
+   ep_queue_head_ptr = (VUSB20_EP_QUEUE_HEAD_STRUCT_PTR)usb_dev_ptr->EP_QUEUE_HEAD_PTR + temp;
+
+   /*********************************************************************
+   This loops iterates through the length of the transfer and divides
+   the data in to DTDs each handling the a max of 0x4000 bytes of data.
+   The first DTD in the list is stored in a pointer called first_dTD_ptr.
+   This pointer is later linked in to QH for processing by the hardware.   
+   *********************************************************************/
+
+    do 
+    {
+        /* Check if we need to split the transfer into multiple dTDs */
+        if (remaining_len > VUSB_EP_MAX_LENGTH_TRANSFER) 
+        {
+            curr_pkt_len = VUSB_EP_MAX_LENGTH_TRANSFER;
+        } 
+        else 
+        {
+            curr_pkt_len = remaining_len;
+        } /* Endif */
+   
+        /* Get a dTD from the queue */   
+        EHCI_DTD_QGET(usb_dev_ptr->DTD_HEAD, usb_dev_ptr->DTD_TAIL, dTD_ptr);
+   
+        if (!dTD_ptr) 
+        {
+            USB_printf("Error: Can't get dTD\n");
+            return USBERR_TR_FAILED;
+        } /* Endif */
+
+        ARC_DEBUG_CODE(ARC_DEBUG_FLAG_STATS, (usb_dev_ptr->STATS.usb_add_count++));
+
+        remaining_len -= curr_pkt_len;
+
+        usb_dev_ptr->DTD_ENTRIES--;
+
+        if (curr_offset == 0) 
+        {
+            first_dTD_ptr = dTD_ptr;
+        } /* Endif */
+
+        /* Zero the dTD. Leave the last 4 bytes as that is the scratch pointer */
+        USB_memzero((void *) dTD_ptr,(sizeof(VUSB20_EP_TR_STRUCT) - 4));
+
+        /* Initialize the dTD */
+        dTD_ptr->SCRATCH_PTR->PRIVATE = handle;
+   
+        /* Set the Terminate bit */
+        dTD_ptr->NEXT_TR_ELEM_PTR = USB_32BIT_LE(VUSB_EP_QUEUE_HEAD_NEXT_TERMINATE);
+
+        /*************************************************************
+        FIX ME: For hig-speed and high-bandwidth ISO IN endpoints,
+        we must initialize the multiplied field so that Host can issues
+        multiple IN transactions on the endpoint. See the DTD data
+        structure for MultiIO field.
+      
+        S Garg 11/06/2003
+        *************************************************************/
+      
+        /* Fill in the transfer size */
+        if (!remaining_len) 
+        {
+            dTD_ptr->SIZE_IOC_STS = USB_32BIT_LE((curr_pkt_len << 
+                    VUSBHS_TD_LENGTH_BIT_POS) | (VUSBHS_TD_IOC) | (VUSBHS_TD_STATUS_ACTIVE));
+        } 
+        else 
+        {
+            dTD_ptr->SIZE_IOC_STS = USB_32BIT_LE((curr_pkt_len << VUSBHS_TD_LENGTH_BIT_POS) 
+                                                   | VUSBHS_TD_STATUS_ACTIVE);
+        } /* Endif */
+   
+        /* Set the reserved field to 0 */
+        dTD_ptr->SIZE_IOC_STS &= ~USB_32BIT_LE(VUSBHS_TD_RESERVED_FIELDS);
+
+        /* 4K apart buffer page pointers */
+        if(xd_ptr->WSTARTADDRESS != NULL)
+        {
+            uint_32 physAddr = USB_virt_to_phys((uint_8*)xd_ptr->WSTARTADDRESS + curr_offset);
+
+            dTD_ptr->BUFF_PTR0 = USB_32BIT_LE(physAddr);
+            
+            physAddr += 4096;
+            dTD_ptr->BUFF_PTR1 = USB_32BIT_LE(physAddr);
+
+            physAddr += 4096;
+            dTD_ptr->BUFF_PTR2 = USB_32BIT_LE(physAddr);
+
+            physAddr += 4096;
+            dTD_ptr->BUFF_PTR3 = USB_32BIT_LE(physAddr);
+
+            physAddr += 4096;
+            dTD_ptr->BUFF_PTR4 = USB_32BIT_LE(physAddr);
+        }
+        else
+        {
+            dTD_ptr->BUFF_PTR0 = dTD_ptr->BUFF_PTR1 = dTD_ptr->BUFF_PTR2 = 0;
+            dTD_ptr->BUFF_PTR3 = dTD_ptr->BUFF_PTR4 = 0;
+        }
+        curr_offset += curr_pkt_len;
+
+      /* Maintain the first and last device transfer descriptor per 
+      ** endpoint and direction 
+      */
+      if (!usb_dev_ptr->EP_DTD_HEADS[temp]) 
+      {
+         usb_dev_ptr->EP_DTD_HEADS[temp] = dTD_ptr;
+         /***********************************************
+         If list does not have a head, it means that list
+         is empty. An empty condition is detected.
+         ***********************************************/
+         list_empty = TRUE;
+      } /* Endif */ 
+   
+      /* Check if the transfer is to be queued at the end or beginning */
+      temp_dTD_ptr = usb_dev_ptr->EP_DTD_TAILS[temp];
+      
+      /* Remember which XD to use for this dTD */
+      dTD_ptr->SCRATCH_PTR->XD_FOR_THIS_DTD = (pointer)xd_ptr;
+      
+      /* New tail */
+      usb_dev_ptr->EP_DTD_TAILS[temp] = dTD_ptr;
+      if (temp_dTD_ptr) 
+      {
+         /* Should not do |=. The Terminate bit should be zero */
+         temp_dTD_ptr->NEXT_TR_ELEM_PTR = USB_32BIT_LE(USB_DTD_VIRT_TO_PHYS(usb_dev_ptr, dTD_ptr));
+      } /* Endif */
+   } while (remaining_len); /* EndWhile */
+
+
+   /**************************************************************
+   In the loop above DTD has already been added to the list
+   However endpoint has not been primed yet. If list is not empty 
+   we need safter ways to add DTD to the existing list. 
+   Else we just skip to adding DTD to QH safely.
+   **************************************************************/
+   
+    if(list_empty == FALSE)
+    {
+        volatile boolean    read_safe = FALSE;                      
+        uint_32             prime, temp_ep_stat=0;
+
+        /*********************************************************
+        Hardware v3.2+ require the use of semaphore to ensure that
+        QH is safely updated.
+        *********************************************************/
+        ARC_DEBUG_CODE(ARC_DEBUG_FLAG_STATS, (usb_dev_ptr->STATS.usb_add_not_empty_count++));
+
+        /*********************************************************
+        Check the prime bit. If set goto done
+        *********************************************************/
+        prime = USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTPRIME);
+/*
+        USB_printf("%03d: Add not empty: bit_pos=%x, prime=0x%x, status=0x%x\n",
+                    usb_dev_ptr->STATS.usb_add_not_empty_count, prime, bit_pos,
+                    USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTSTATUS),
+                    USB_32BIT_LE(ep_queue_head_ptr->SIZE_IOC_INT_STS) );
+*/
+        if(prime & bit_pos)
+        {
+            timeout = 0x1000;
+            while( dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTPRIME
+                    & USB_32BIT_LE(bit_pos) ) 
+            {
+               /* Wait for the ENDPTPRIME to go to zero */
+                timeout--;
+                if(timeout <= 0)
+                {
+                    USB_printf(
+                        "timeout: CTRL=%x, PRIME=%x, STAT=%x, INTR=%x, ADDR=%x, PORTSC=%x, dTD=%p, temp_dTD=%p\n",
+                        USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTCTRLX[0]),
+                        USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTPRIME), 
+                        USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTSTATUS), 
+                        USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_STS),
+                        USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.DEVICE_ADDR),
+                        USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.PORTSCX[0]), 
+                        first_dTD_ptr, temp_dTD_ptr);
+
+                    _usb_ep_status(handle, xd_ptr->EP_NUM, xd_ptr->BDIRECTION);
+
+                    return USBERR_TR_FAILED;
+                }
+            } /* EndWhile */
+
+            /*ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_TRANSFER,*/
+            if(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTSTATUS & USB_32BIT_LE(bit_pos))
+            {
+                goto done;
+            }
+        }
+
+        read_safe = FALSE;
+        timeout = 1000000;
+        while(read_safe == FALSE)
+        {
+            timeout--;
+            if(timeout <= 0)
+            {
+                USB_printf("%s: Timeout for ATDTW_TRIPWIRE reg = 0x%x\n", __FUNCTION__, 
+                    (unsigned)USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_CMD));
+                return USBERR_TR_FAILED;
+            }
+
+           /*********************************************************
+           start with setting the semaphores
+           *********************************************************/
+           dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_CMD |= 
+                                          USB_32BIT_LE(EHCI_CMD_ATDTW_TRIPWIRE_SET);
+               
+           /*********************************************************
+           Read the endpoint status
+           *********************************************************/
+           temp_ep_stat = USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTSTATUS) 
+                                        & bit_pos; 
+
+           /*********************************************************
+           Reread the ATDTW semaphore bit to check if it is cleared.
+           When hardware see a hazard, it will clear the bit or
+           else we remain set to 1 and we can proceed with priming
+           of endpoint if not already primed.
+           *********************************************************/
+           if( dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_CMD & 
+                                          USB_32BIT_LE(EHCI_CMD_ATDTW_TRIPWIRE_SET))
+           {
+               read_safe = TRUE;
+           }
+
+        }/*end while loop */
+
+        /*********************************************************
+        Clear the semaphore
+        *********************************************************/
+        dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_CMD &= 
+                                       USB_32BIT_LE(EHCI_CMD_ATDTW_TRIPWIRE_CLEAR);
+
+        /*********************************************************
+         * If endpoint is not active, we activate it now.               
+         *********************************************************/
+         if(!temp_ep_stat)
+         {
+            /* No other transfers on the queue */
+            ep_queue_head_ptr->NEXT_DTD_PTR = USB_32BIT_LE(
+                        USB_DTD_VIRT_TO_PHYS(usb_dev_ptr, first_dTD_ptr));
+            ep_queue_head_ptr->SIZE_IOC_INT_STS = 0;
+
+            /* Prime the Endpoint */
+            dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTPRIME = USB_32BIT_LE(bit_pos);
+         }
+    }
+    else
+    {
+         /* No other transfers on the queue */
+         ep_queue_head_ptr->NEXT_DTD_PTR = USB_32BIT_LE(
+                            USB_DTD_VIRT_TO_PHYS(usb_dev_ptr, first_dTD_ptr));
+         ep_queue_head_ptr->SIZE_IOC_INT_STS = 0;
+   
+         /* Prime the Endpoint */
+         dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTPRIME = USB_32BIT_LE(bit_pos);
+         /* delay */
+         timeout = 0x100;
+         while(timeout > 0)
+             timeout--;
+
+         dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTPRIME = USB_32BIT_LE(bit_pos);
+    }
+
+done:
+   if(first_dTD_ptr == NULL)
+       USB_printf("ERROR !!!! first_dTD_ptr=NULL\n");
+
+   ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_TRANSFER,
+               " add_%d: fri=0x%x, ep=%d%s, buf=%p, size=%d, xd=%p, dTD=%p %p, empty=%d\n",
+               usb_dev_ptr->STATS.usb_add_count & 0xFFFF, 
+               USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_FRINDEX), 
+               xd_ptr->EP_NUM, xd_ptr->BDIRECTION ? "in" : "out", 
+               xd_ptr->WSTARTADDRESS, (int)xd_ptr->WTOTALLENGTH, 
+               xd_ptr, (unsigned)first_dTD_ptr, 
+               usb_dev_ptr->EP_DTD_HEADS[temp], list_empty);
+
+
+   return USB_OK;
+   /* End CR 1015 */
+} /* EndBody */
+
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_dci_vusb20_process_tr_complete
+*  Returned Value : None
+*  Comments       :
+*        Services transaction complete interrupt
+*
+*END*-----------------------------------------------------------------*/
+void _usb_dci_vusb20_process_tr_complete
+   (
+      /* [IN] the USB_dev_initialize state structure */
+      _usb_device_handle         handle
+   )
+{ /* Body */
+   USB_DEV_STATE_STRUCT_PTR                     usb_dev_ptr;
+   volatile VUSB20_REG_STRUCT_PTR               dev_ptr;
+   volatile VUSB20_EP_TR_STRUCT_PTR             dTD_ptr; 
+   VUSB20_EP_TR_STRUCT_PTR                      temp_dTD_ptr;
+   VUSB20_EP_QUEUE_HEAD_STRUCT_PTR              ep_queue_head_ptr;
+   uint_32                                      temp, i, ep_num = 0, direction = 0, bit_pos;
+   uint_32                                      remaining_length = 0;
+   uint_32                                      actual_transfer_length = 0;
+   uint_32                                      counter, errors = 0;
+   XD_STRUCT_PTR                                xd_ptr;
+   XD_STRUCT_PTR                                temp_xd_ptr = NULL;
+   uint_8_ptr                                   buff_start_address = NULL;
+   boolean                                      endpoint_detected = FALSE;
+   
+   usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+   dev_ptr = (VUSB20_REG_STRUCT_PTR)usb_dev_ptr->DEV_PTR;
+
+   ARC_DEBUG_CODE(ARC_DEBUG_FLAG_STATS, (usb_dev_ptr->STATS.usb_complete_isr_count++));
+
+   /* We use separate loops for ENDPTSETUPSTAT and ENDPTCOMPLETE because the 
+   ** setup packets are to be read ASAP 
+   */
+   
+   /* Process all Setup packet received interrupts */
+   bit_pos = USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPT_SETUP_STAT);
+   
+   if (bit_pos) 
+   {
+      ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_SETUP, "setup_isr: bit_pos=0x%x\n", (unsigned)bit_pos);
+      for(i=0; i<USB_MAX_CONTROL_ENDPOINTS; i++) 
+      {
+         if (bit_pos & (1 << i)) 
+         {
+            ARC_DEBUG_CODE(ARC_DEBUG_FLAG_STATS, (usb_dev_ptr->STATS.usb_setup_count++));
+            _usb_device_call_service(handle, i, TRUE, 0, 0, 8, 0);
+         } /* Endif */
+      } /* Endfor */
+   } /* Endif */
+   
+   /* Don't clear the endpoint setup status register here. It is cleared as a 
+   ** setup packet is read out of the buffer 
+   */
+
+   /* Process non-setup transaction complete interrupts */   
+   bit_pos = USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTCOMPLETE);
+
+   /* Clear the bits in the register */
+   dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTCOMPLETE = USB_32BIT_LE(bit_pos);
+   
+   if (bit_pos) 
+   {
+        ARC_DEBUG_CODE(ARC_DEBUG_FLAG_STATS, (usb_dev_ptr->STATS.usb_complete_count++));
+
+        /* Get the endpoint number and the direction of transfer */
+        counter = 0;
+        for (i=0; i<(ARC_USB_MAX_ENDPOINTS*2); i++) 
+        {
+            endpoint_detected = FALSE;
+            if ((i < ARC_USB_MAX_ENDPOINTS) && (bit_pos & (1 << i)))
+            {
+                ep_num = i;
+                direction = ARC_USB_RECV;
+                endpoint_detected = TRUE;
+            }
+            else
+            {
+                if( (i >= ARC_USB_MAX_ENDPOINTS) && 
+                    (bit_pos & (1 << (i+16-ARC_USB_MAX_ENDPOINTS))))
+                {
+                    ep_num = (i - ARC_USB_MAX_ENDPOINTS);
+                    direction = ARC_USB_SEND;
+                    endpoint_detected = TRUE;
+                }            
+            }
+
+            if(endpoint_detected)
+            {
+                temp = (2*ep_num + direction);
+
+                /* Get the first dTD */      
+                dTD_ptr = usb_dev_ptr->EP_DTD_HEADS[temp];
+            
+                ep_queue_head_ptr = (VUSB20_EP_QUEUE_HEAD_STRUCT_PTR)usb_dev_ptr->EP_QUEUE_HEAD_PTR + temp;
+
+                /* Process all the dTDs for respective transfers */
+                while (dTD_ptr) 
+                {            
+                    if (USB_32BIT_LE(dTD_ptr->SIZE_IOC_STS) & VUSBHS_TD_STATUS_ACTIVE) 
+                    {
+                        /* No more dTDs to process. Next one is owned by VUSB */
+                        if(counter == 0)
+                        {
+                            ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_ISR, "tr_complete - break: ep=%d %s, bit_pos=0x%x\n",
+                                    (unsigned)ep_num, direction ? "SEND" : "RECV", (unsigned)bit_pos);
+
+                            ARC_DEBUG_CODE(ARC_DEBUG_FLAG_STATS, (usb_dev_ptr->STATS.usb_empty_complete_count++));
+                        }
+                        break;
+                    } /* Endif */
+               
+                    /* Get the correct internal transfer descriptor */
+                    xd_ptr = (XD_STRUCT_PTR)dTD_ptr->SCRATCH_PTR->XD_FOR_THIS_DTD;
+                    if (xd_ptr) 
+                    {
+                        buff_start_address = xd_ptr->WSTARTADDRESS;
+                        actual_transfer_length = xd_ptr->WTOTALLENGTH;
+                        temp_xd_ptr = xd_ptr;
+                    } /* Endif */
+               
+                    /* Get the address of the next dTD */
+                    temp_dTD_ptr = (VUSB20_EP_TR_STRUCT_PTR)USB_DTD_PHYS_TO_VIRT(usb_dev_ptr, 
+                                (uint_32)(USB_32BIT_LE(dTD_ptr->NEXT_TR_ELEM_PTR) & VUSBHS_TD_ADDR_MASK) );
+                  
+                    /* Read the errors */
+                    errors = (USB_32BIT_LE(dTD_ptr->SIZE_IOC_STS) & VUSBHS_TD_ERROR_MASK);                  
+                    if (!errors) 
+                    {
+                        /* No errors */
+                        /* Get the length of transfer from the current dTD */   
+                        remaining_length += ((USB_32BIT_LE(dTD_ptr->SIZE_IOC_STS) & VUSB_EP_TR_PACKET_SIZE) >> 16);
+                        actual_transfer_length -= remaining_length;
+                    } 
+                    else 
+                    {
+                        if (errors & VUSBHS_TD_STATUS_HALTED) 
+                        {
+                            /* Clear the errors and Halt condition */
+                            ep_queue_head_ptr->SIZE_IOC_INT_STS &= USB_32BIT_LE(~errors);
+                        } /* Endif */
+
+                        ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_ERROR, 
+                            "complete_tr ERROR: ep=%d %s: STS=0x%x, dTD=%p, dTD_next=%p, xd=%p, qh->sts=0x%x\n", 
+                                    (unsigned)ep_num, direction ? "SEND" : "RECV", 
+                                    (unsigned)dTD_ptr->SIZE_IOC_STS, dTD_ptr, temp_dTD_ptr, 
+                                    xd_ptr, ep_queue_head_ptr->SIZE_IOC_INT_STS);
+                    } /* Endif */
+               
+                    /* Retire the processed dTD */
+                    counter++;
+                    _usb_dci_vusb20_cancel_transfer(handle, ep_num, direction);
+                    if( (temp_dTD_ptr == NULL) || 
+                        (temp_dTD_ptr->SCRATCH_PTR->XD_FOR_THIS_DTD != temp_xd_ptr) ) 
+                    {
+                        /* Transfer complete. Call the register service function for the endpoint */
+                        ARC_DEBUG_CODE(ARC_DEBUG_FLAG_STATS, (usb_dev_ptr->STATS.usb_complete_ep_count[temp]++));
+
+#if defined(USB_UNDERRUN_WA)
+                        if( (direction == ARC_USB_SEND) && 
+                            (((ep_queue_head_ptr->MAX_PKT_LENGTH >> 16) & 0x7FF) > global_wa_threshold) )
+                            usbSendComplete(handle, ep_num, FALSE, direction, 
+                                   buff_start_address, actual_transfer_length, errors);
+                        else
+#endif /* USB_UNDERRUN_WA */
+                            _usb_device_call_service(handle, ep_num, FALSE, direction, 
+                                   buff_start_address, actual_transfer_length, errors);
+                        remaining_length = 0;
+
+                        ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_TRANSFER,
+                            "comp_%d: fri=0x%x, ep=%d%s, buf=%p, size=%d, xd=%p, dTD=%p %p %p, COMP=0x%x\n", 
+                            usb_dev_ptr->STATS.usb_complete_count & 0xFFFF, 
+                            USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_FRINDEX), 
+                            (unsigned)ep_num, direction ? "in" : "out", 
+                            buff_start_address, actual_transfer_length,
+                            temp_xd_ptr, dTD_ptr, temp_dTD_ptr, usb_dev_ptr->EP_DTD_HEADS[temp], (unsigned)bit_pos);
+
+                    } /* Endif */
+                    else
+                    {
+                        ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_TRANSFER, "tr_complete not completed: ep=%d %s\n", 
+                                (unsigned)ep_num, direction ? "SEND" : "RECV");
+                    }
+                    if( (temp_dTD_ptr == NULL) && (usb_dev_ptr->EP_DTD_HEADS[temp] != NULL) )
+                    {
+/*
+                        USB_printf("tr_complete: ep=%d, temp_dTD=%p, dTD_ptr=%p (%p), DTD_HEADS=%p, remain=%d\n",
+                                    temp, temp_dTD_ptr, dTD_ptr, 
+                                    USB_DTD_PHYS_TO_VIRT(usb_dev_ptr, (uint_32)(USB_32BIT_LE(dTD_ptr->NEXT_TR_ELEM_PTR) & VUSBHS_TD_ADDR_MASK) ),
+                                    usb_dev_ptr->EP_DTD_HEADS[temp], remaining_length);
+*/
+                        dTD_ptr = usb_dev_ptr->EP_DTD_HEADS[temp];
+                    }
+                    else
+                    {
+                        dTD_ptr = temp_dTD_ptr;
+                    }
+                    errors = 0;
+                } /* Endwhile */
+            } /* Endif */
+        } /* Endfor */
+        ARC_DEBUG_CODE(ARC_DEBUG_FLAG_STATS, 
+               ( {if(usb_dev_ptr->STATS.usb_complete_max_count < counter) 
+                            usb_dev_ptr->STATS.usb_complete_max_count = counter;}));
+   } /* Endif */
+} /* EndBody */
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_dci_vusb20_isr
+*  Returned Value : None
+*  Comments       :
+*        Services all the VUSB_HS interrupt sources
+*
+*END*-----------------------------------------------------------------*/
+void _usb_dci_vusb20_isr
+   (
+      _usb_device_handle handle
+   )
+{ /* Body */
+   USB_DEV_STATE_STRUCT_PTR     usb_dev_ptr;
+   VUSB20_REG_STRUCT_PTR        dev_ptr;
+   uint_32                      status;
+
+   usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+
+   ARC_DEBUG_CODE(ARC_DEBUG_FLAG_STATS, (usb_dev_ptr->STATS.usb_isr_count++));
+
+   dev_ptr = (VUSB20_REG_STRUCT_PTR)usb_dev_ptr->DEV_PTR;
+
+   status = USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_STS);
+   
+   status &= USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_INTR);
+
+   if(status == 0) 
+   {
+       ARC_DEBUG_CODE(ARC_DEBUG_FLAG_STATS, (usb_dev_ptr->STATS.usb_empty_isr_count++));
+       return;
+   } /* Endif */
+/*
+    USB_printf("USB_ISR: FRINDEX=0x%x, status=0x%x, PORTSC=0x%x, EP_SETUP=0x%x, EP_COMPLETE=0x%x\n", 
+                    USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_FRINDEX),
+                    status, 
+                    USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.PORTSCX[0]),
+                    USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPT_SETUP_STAT),
+                    USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTCOMPLETE) );
+*/
+   /* Clear all the interrupts occured */
+   dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_STS = USB_32BIT_LE(status);
+   
+   if (status & EHCI_STS_ERR) 
+   {
+        usb_dev_ptr->ERROR_STATE = (status & 0xFFFF);
+
+        _usb_dci_vusb20_process_error((pointer)usb_dev_ptr);
+        /* do tr_complete if no STS_INT set */
+        if( (status & EHCI_STS_INT) == 0)
+            _usb_dci_vusb20_process_tr_complete((pointer)usb_dev_ptr);
+
+        /*USB_printf("USB process error: status=0x%x\n", status);*/
+   } /* Endif */
+
+   if (status & EHCI_STS_RESET) 
+   {
+       _usb_dci_vusb20_process_reset((pointer)usb_dev_ptr);
+   } /* Endif */
+   
+   if (status & EHCI_STS_PORT_CHANGE) 
+   {
+      _usb_dci_vusb20_process_port_change((pointer)usb_dev_ptr);
+   } /* Endif */
+      
+   if (status & EHCI_STS_SOF) 
+   {
+      _usb_dci_vusb20_process_SOF((pointer)usb_dev_ptr);
+   } /* Endif */
+   
+   if (status & EHCI_STS_INT) 
+   {
+      _usb_dci_vusb20_process_tr_complete((pointer)usb_dev_ptr);
+   } /* Endif */
+   
+    if (status & EHCI_STS_SUSPEND) 
+    {
+        _usb_dci_vusb20_process_suspend((pointer)usb_dev_ptr);
+    } /* Endif */
+
+} /* EndBody */
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_dci_vusb20_process_reset
+*  Returned Value : None
+*  Comments       :
+*        Services reset interrupt
+*
+*END*-----------------------------------------------------------------*/
+void _usb_dci_vusb20_process_reset
+   (
+      /* [IN] the USB_dev_initialize state structure */
+      _usb_device_handle         handle
+   )
+{ /* Body */
+   USB_DEV_STATE_STRUCT_PTR     usb_dev_ptr;
+   VUSB20_REG_STRUCT_PTR        dev_ptr;
+   uint_32                      temp;
+   volatile unsigned long       timeout;
+
+   usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+
+   ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_ISR, "process_reset\n");
+   ARC_DEBUG_CODE(ARC_DEBUG_FLAG_STATS, (usb_dev_ptr->STATS.usb_reset_count++));
+   
+   dev_ptr = (VUSB20_REG_STRUCT_PTR)usb_dev_ptr->DEV_PTR;
+
+   /* Inform the application so that it can cancel all previously queued transfers */
+   _usb_device_call_service(usb_dev_ptr, ARC_USB_SERVICE_BUS_RESET, 0, 0, 0, 0, 0);
+
+#if defined(USB_UNDERRUN_WA)
+    _usb_reset_send_queue();
+#endif /* USB_UNDERRUN_WA */
+   
+   /* The address bits are past bit 25-31. Set the address */
+   dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.DEVICE_ADDR &= ~USB_32BIT_LE(0xFE000000);
+   
+   /* Clear all the setup token semaphores */
+   temp = USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPT_SETUP_STAT);
+   dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPT_SETUP_STAT = USB_32BIT_LE(temp);
+
+   /* Clear all the endpoint complete status bits */   
+   temp = USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTCOMPLETE);
+   dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTCOMPLETE = USB_32BIT_LE(temp);
+   
+    timeout = 0x10000;
+    while (USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTPRIME) & 0xFFFFFFFF) 
+    {
+        timeout--;
+        if(timeout <= 0)
+        {
+            USB_printf("%s: Timeout for ENDPTPRIME = 0x%x\n", __FUNCTION__, 
+                (unsigned)USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTPRIME));
+            break;
+        }
+
+      /* Wait until all ENDPTPRIME bits cleared */
+    } /* Endif */
+   
+   /* Write 1s to the Flush register */
+   dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTFLUSH = USB_32BIT_LE(0xFFFFFFFF);
+   
+    if( (usb_dev_ptr->ERROR_STATE == 0x0) &&
+        (USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.PORTSCX[0]) & 
+                                                EHCI_PORTSCX_PORT_RESET) )
+    {
+        ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_RESET,
+                    "USB Bus Reset: fri=0x%x, dev_ptr=%p, STATE=%d, PORTSC=0x%x, CMD=0x%x, ENDPT[0]=0x%x\n", 
+                    USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_FRINDEX), 
+                    usb_dev_ptr, usb_dev_ptr->USB_STATE,
+                    USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.PORTSCX[0]),
+                    USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_CMD),
+                    USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTCTRLX[0]));
+
+        usb_dev_ptr->BUS_RESETTING = TRUE;
+        usb_dev_ptr->USB_STATE = ARC_USB_STATE_POWERED;
+    } 
+    else 
+    { 
+        USB_printf("USB Chip reinit: PORTSC=0x%x\n", 
+                USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.PORTSCX[0]));
+
+        /* re-initialize */      
+        _usb_dci_vusb20_chip_initialize((pointer)usb_dev_ptr);
+        ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_INIT, "process_reset, Chip reinit hw\n");
+    } /* Endif */
+   
+    _usb_device_call_service(usb_dev_ptr, ARC_USB_SERVICE_BUS_RESET, 1, 0, 0, 0, 0);
+
+} /* EndBody */
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_dci_vusb20_process_suspend
+*  Returned Value : None
+*  Comments       :
+*        Services suspend interrupt
+*
+*END*-----------------------------------------------------------------*/
+void _usb_dci_vusb20_process_suspend
+   (
+      /* [IN] the USB_dev_initialize state structure */
+      _usb_device_handle         handle
+   )
+{ /* Body */
+    USB_DEV_STATE_STRUCT_PTR     usb_dev_ptr;
+    VUSB20_REG_STRUCT_PTR        dev_ptr;
+   
+    usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+
+    dev_ptr = (VUSB20_REG_STRUCT_PTR)usb_dev_ptr->DEV_PTR;
+
+    ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_ISR, "process_suspend\n");
+    ARC_DEBUG_CODE(ARC_DEBUG_FLAG_STATS, (usb_dev_ptr->STATS.usb_suspend_count++));
+   
+    usb_dev_ptr->USB_DEV_STATE_B4_SUSPEND = usb_dev_ptr->USB_STATE;
+   
+    usb_dev_ptr->USB_STATE = ARC_USB_STATE_SUSPEND;
+
+    /* Inform the upper layers */
+    _usb_device_call_service(usb_dev_ptr, ARC_USB_SERVICE_SLEEP, 0, 0, 0, 0, 0);
+   
+} /* EndBody */
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_dci_vusb20_process_SOF
+*  Returned Value : None
+*  Comments       :
+*        Services SOF interrupt
+*
+*END*-----------------------------------------------------------------*/
+void _usb_dci_vusb20_process_SOF
+   (
+      /* [IN] the USB_dev_initialize state structure */
+      _usb_device_handle         handle
+   )
+{ /* Body */
+   USB_DEV_STATE_STRUCT_PTR                     usb_dev_ptr;
+   VUSB20_REG_STRUCT_PTR                        dev_ptr;
+
+   ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_ISR, "process_SOF\n");
+   
+   usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+   dev_ptr = (VUSB20_REG_STRUCT_PTR)usb_dev_ptr->DEV_PTR;
+
+   /* Inform the upper layer */   
+   _usb_device_call_service(usb_dev_ptr, ARC_USB_SERVICE_SOF, 0, 0, 0, 
+      USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_FRINDEX), 0);
+
+} /* EndBody */
+
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_dci_vusb20_process_port_change
+*  Returned Value : None
+*  Comments       :
+*        Services port change detect interrupt
+*
+*END*-----------------------------------------------------------------*/
+void _usb_dci_vusb20_process_port_change
+   (
+      /* [IN] the USB_dev_initialize state structure */
+      _usb_device_handle         handle
+   )
+{ /* Body */
+    USB_DEV_STATE_STRUCT_PTR                     usb_dev_ptr;
+    VUSB20_REG_STRUCT_PTR                        dev_ptr;
+
+    usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+
+    ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_ISR, "process_port_change\n");
+    ARC_DEBUG_CODE(ARC_DEBUG_FLAG_STATS, (usb_dev_ptr->STATS.usb_port_change_count++));
+
+    dev_ptr = (VUSB20_REG_STRUCT_PTR)usb_dev_ptr->DEV_PTR;
+/*
+    USB_printf("port_change: PORTSC=0x%x, DTD_ENTRIES=%d, XD_ENTRIES=%d\n", 
+                USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.PORTSCX[0]),
+                usb_dev_ptr->DTD_ENTRIES, usb_dev_ptr->XD_ENTRIES);
+*/
+    if (usb_dev_ptr->BUS_RESETTING) 
+    {
+        /* Bus reset operation complete */
+        usb_dev_ptr->BUS_RESETTING = FALSE;
+    } /* Endif */
+   
+    if (!(USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.PORTSCX[0]) & 
+                                                EHCI_PORTSCX_PORT_RESET)) 
+    {
+        /* Get the speed */
+        if (USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.PORTSCX[0]) & 
+                                            EHCI_PORTSCX_PORT_HIGH_SPEED) 
+        {
+            usb_dev_ptr->SPEED = ARC_USB_SPEED_HIGH;
+        } 
+        else 
+        {
+            usb_dev_ptr->SPEED = ARC_USB_SPEED_FULL;
+        } /* Endif */
+/*
+        USB_printf("USB %s speed device detected\n", 
+                (usb_dev_ptr->SPEED == ARC_USB_SPEED_HIGH) ? "High" : "Full");
+*/
+        /* Inform the upper layers of the speed of operation */      
+        _usb_device_call_service(usb_dev_ptr, ARC_USB_SERVICE_SPEED_DETECTION, 0, 0, 
+                                0, usb_dev_ptr->SPEED, 0);
+    } /* Endif */
+      
+    if (USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.PORTSCX[0]) & 
+                                                EHCI_PORTSCX_PORT_SUSPEND) 
+    {   
+        usb_dev_ptr->USB_DEV_STATE_B4_SUSPEND = usb_dev_ptr->USB_STATE;
+        usb_dev_ptr->USB_STATE = ARC_USB_STATE_SUSPEND;
+
+        /* Inform the upper layers */
+        USB_printf("USB suspend\n");
+        _usb_device_call_service(usb_dev_ptr, ARC_USB_SERVICE_SUSPEND, 0, 0, 0, 0, 0);
+    } /* Endif */
+   
+    if (!(USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.PORTSCX[0]) & EHCI_PORTSCX_PORT_SUSPEND) 
+                    && (usb_dev_ptr->USB_STATE == ARC_USB_STATE_SUSPEND)) 
+    {
+        USB_printf("USB resume\n");
+        usb_dev_ptr->USB_STATE = usb_dev_ptr->USB_DEV_STATE_B4_SUSPEND;
+        /* Inform the upper layers */
+        _usb_device_call_service(usb_dev_ptr, ARC_USB_SERVICE_RESUME, 0, 0, 0, 0, 0);
+
+        ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_SUSPEND, "process_port_change, SUCCESSFUL, resumed\n");
+        return;
+    } /* Endif */
+   
+    usb_dev_ptr->USB_STATE = ARC_USB_STATE_DEFAULT;
+      
+} /* EndBody */
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_dci_vusb20_process_error
+*  Returned Value : None
+*  Comments       :
+*        Services error interrupt
+*
+*END*-----------------------------------------------------------------*/
+void _usb_dci_vusb20_process_error
+   (
+      /* [IN] the USB_dev_initialize state structure */
+      _usb_device_handle         handle
+   )
+{ /* Body */
+   USB_DEV_STATE_STRUCT_PTR          usb_dev_ptr;
+   
+   usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+   
+   /* Increment the error count */
+   usb_dev_ptr->ERRORS++;
+   
+    ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_ERROR, 
+                "process_error_%d: state=0x%x\n", 
+                    usb_dev_ptr->ERRORS, usb_dev_ptr->ERROR_STATE); 
+} /* EndBody */
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_dci_vusb20_set_speed_full
+*  Returned Value : None
+*  Comments       :
+*        Force the controller port in full speed mode.
+*
+*END*-----------------------------------------------------------------*/
+void _usb_dci_vusb20_set_speed_full
+   (
+      /* [IN] the USB_dev_initialize state structure */
+      _usb_device_handle         handle,
+     
+      /* The port number on the device */
+      uint_8                     port_number
+   )
+{ /* Body */
+   USB_DEV_STATE_STRUCT_PTR                     usb_dev_ptr;
+   VUSB20_REG_STRUCT_PTR                        dev_ptr;
+   uint_32                                      port_control;
+   
+   ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_ANY, "FORCE set_speed_full\n");
+   
+   usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+   dev_ptr = (VUSB20_REG_STRUCT_PTR)usb_dev_ptr->DEV_PTR;
+
+   port_control = USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.PORTSCX[port_number]);   
+   port_control |= EHCI_PORTSCX_FORCE_FULL_SPEED_CONNECT;
+   dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.PORTSCX[port_number] = USB_32BIT_LE(port_control);
+  
+} /* EndBody */
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_dci_vusb20_suspend_phy
+*  Returned Value : None
+*  Comments       :
+*        Suspends the PHY in low power mode
+*
+*END*-----------------------------------------------------------------*/
+void _usb_dci_vusb20_suspend_phy
+   (
+      /* [IN] the USB_dev_initialize state structure */
+      _usb_device_handle         handle,
+     
+      /* The port number on the device */
+      uint_8                     port_number
+   )
+{ /* Body */
+   USB_DEV_STATE_STRUCT_PTR                     usb_dev_ptr;
+   VUSB20_REG_STRUCT_PTR                        dev_ptr;
+   uint_32                                      port_control;
+      
+   ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_SUSPEND, "set_suspend_phy\n");
+   
+   usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+   dev_ptr = (VUSB20_REG_STRUCT_PTR)usb_dev_ptr->DEV_PTR;
+
+   port_control = USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.PORTSCX[port_number]);   
+   port_control |= EHCI_PORTSCX_PHY_CLOCK_DISABLE;
+   dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.PORTSCX[port_number] = USB_32BIT_LE(port_control);
+   
+} /* EndBody */
+
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_dci_vusb20_set_address
+*  Returned Value : None
+*  Comments       :
+*        Sets the newly assigned device address
+*
+*END*-----------------------------------------------------------------*/
+void _usb_dci_vusb20_set_address
+   (
+      /* [IN] the USB_dev_initialize state structure */
+      _usb_device_handle         handle,
+     
+      /* Address of the device assigned by the host */
+      uint_8                     address
+   )
+{ /* Body */
+   USB_DEV_STATE_STRUCT_PTR          usb_dev_ptr;
+   VUSB20_REG_STRUCT_PTR             dev_ptr;
+
+   ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_ADDR, "set_address: address=%d\n",address);
+   
+   usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+   dev_ptr = (VUSB20_REG_STRUCT_PTR)usb_dev_ptr->DEV_PTR;
+   
+#ifdef SET_ADDRESS_HARDWARE_ASSISTANCE   
+   /***********************************************************
+   Hardware Rev 4.0 onwards have special assistance built in
+   for handling the set_address command. As per the USB specs
+   a device should be able to receive the response on a new
+   address, within 2 msecs after status phase of set_address is
+   completed. Since 2 mili second may be a very small time window
+   (on high interrupt latency systems) before software could 
+   come to the code below and write the device register,
+   this routine will be called in advance when status phase of
+   set_address is still not finished. The following line in the
+   code will set the bit 24 to '1' and hardware will take
+   the address and queue it in an internal buffer. From which
+   it will use it to decode the next USB token. Please look
+   at hardware rev details for the implementation of this
+   assistance.
+   
+   Also note that writing bit 24 to 0x01 will not break
+   any old hardware revs because it was an unused bit.
+   ***********************************************************/
+   /* The address bits are past bit 25-31. Set the address 
+   also set the bit 24 to 0x01 to start hardware assitance*/
+   dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.DEVICE_ADDR = 
+      USB_32BIT_LE((uint_32)address << VUSBHS_ADDRESS_BIT_SHIFT) | 
+      (0x01 << (VUSBHS_ADDRESS_BIT_SHIFT -1)); 
+#else
+   dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.DEVICE_ADDR = 
+      USB_32BIT_LE((uint_32)address << VUSBHS_ADDRESS_BIT_SHIFT); 
+#endif /* SET_ADDRESS_HARDWARE_ASSISTANCE */
+   
+   usb_dev_ptr->USB_STATE = ARC_USB_STATE_ADDRESS;
+      
+} /* EndBody */
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_dci_vusb20_get_setup_data
+*  Returned Value : None
+*  Comments       :
+*        Reads the Setup data from the 8-byte setup buffer
+*
+*END*-----------------------------------------------------------------*/
+void _usb_dci_vusb20_get_setup_data
+   (
+      /* [IN] the USB_dev_initialize state structure */
+      _usb_device_handle         handle,
+            
+      /* [IN] the Endpoint number */
+      uint_8                     ep_num,
+            
+      /* [OUT] address of the buffer to read the setup data into */
+      uint_8_ptr                  buffer_ptr
+   )
+{ /* Body */
+    USB_DEV_STATE_STRUCT_PTR                    usb_dev_ptr;
+    volatile VUSB20_REG_STRUCT_PTR              dev_ptr;
+    volatile VUSB20_EP_QUEUE_HEAD_STRUCT_PTR    ep_queue_head_ptr;
+    volatile boolean                            read_safe = FALSE;                      
+    volatile unsigned long                      timeout;
+
+   
+   usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+   dev_ptr = (VUSB20_REG_STRUCT_PTR)usb_dev_ptr->DEV_PTR;
+
+   /* Get the endpoint queue head */
+   ep_queue_head_ptr = (VUSB20_EP_QUEUE_HEAD_STRUCT_PTR)usb_dev_ptr->EP_QUEUE_HEAD_PTR + 
+                                                                2*ep_num + ARC_USB_RECV;
+
+   /********************************************************************
+   CR 1219. Hardware versions 2.3+ have a implementation of tripwire 
+   semaphore mechanism that requires that we read the contents of 
+   QH safely by using the semaphore. Read the USBHS document to under
+   stand how the code uses the semaphore mechanism. The following are
+   the steps in brief
+   
+   1. USBCMD Write ‘1’ to Setup Tripwire in register.
+   2. Duplicate contents of dQH.StatusBuffer into local software byte
+      array.
+   3  Read Setup TripWire in register. (if set - continue; if
+      cleared goto 1.)
+   4. Write '0' to clear Setup Tripwire in register.
+   5. Process setup packet using local software byte array copy and
+      execute status/handshake phases.
+   
+           
+   ********************************************************************/
+    timeout = 0x100000;
+    while(!read_safe)
+    {
+        /*********************************************************
+        start with setting the semaphores
+        *********************************************************/
+
+        dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_CMD |= 
+                                                USB_32BIT_LE(EHCI_CMD_SETUP_TRIPWIRE_SET);
+
+        /* Copy the setup packet to private buffer */
+        USB_memcopy((uint_8_ptr)ep_queue_head_ptr->SETUP_BUFFER, buffer_ptr, 8);
+
+        /*********************************************************
+        If setup tripwire semaphore is cleared by hardware it means
+        that we have a danger and we need to restart.
+        else we can exit out of loop safely.
+        *********************************************************/
+        if(USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_CMD) &
+                                                   EHCI_CMD_SETUP_TRIPWIRE_SET)
+        {
+            read_safe = TRUE; /* we can proceed exiting out of loop*/
+        }
+        if(timeout <= 0)
+        {
+            USB_printf("%s: Timeout for SETUP_TRIPWIRE = 0x%x\n", __FUNCTION__, 
+                        (unsigned)USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_CMD));
+            break;
+        }
+    }
+    ARC_DEBUG_CODE(ARC_DEBUG_FLAG_STATS, (usb_dev_ptr->STATS.usb_read_setup_count++));
+  
+   /*********************************************************
+   Clear the semaphore bit now
+   *********************************************************/
+   dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_CMD &=
+                                    USB_32BIT_LE(EHCI_CMD_SETUP_TRIPWIRE_CLEAR);                         
+   
+   /* Clear the bit in the ENDPTSETUPSTAT */
+   dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPT_SETUP_STAT = USB_32BIT_LE(1 << ep_num);
+   
+} /* EndBody */
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_dci_vusb20_init_endpoint
+*  Returned Value : None
+*  Comments       :
+*        Initializes the specified endpoint and the endpoint queue head
+*
+*END*-----------------------------------------------------------------*/
+uint_8 _usb_dci_vusb20_init_endpoint
+   (
+      /* [IN] the USB_dev_initialize state structure */
+      _usb_device_handle         handle,
+            
+      /* [IN] the transaction descriptor address */
+      XD_STRUCT_PTR              xd_ptr
+   )
+{ /* Body */
+   USB_DEV_STATE_STRUCT_PTR                     usb_dev_ptr;
+   VUSB20_REG_STRUCT_PTR                        dev_ptr;
+   VUSB20_EP_QUEUE_HEAD_STRUCT _PTR_            ep_queue_head_ptr;
+   uint_32                                      val, bit_pos;
+   
+   usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+   dev_ptr = (VUSB20_REG_STRUCT_PTR)usb_dev_ptr->DEV_PTR;
+
+   /* Get the endpoint queue head address */
+   ep_queue_head_ptr = (VUSB20_EP_QUEUE_HEAD_STRUCT_PTR)usb_dev_ptr->EP_QUEUE_HEAD_PTR + 
+                                                    2*xd_ptr->EP_NUM + xd_ptr->BDIRECTION;
+      
+   bit_pos = (1 << (16 * xd_ptr->BDIRECTION + xd_ptr->EP_NUM));
+
+   /* Check if the Endpoint is Primed */
+   if ((!(USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTPRIME) & bit_pos)) && 
+       (!(USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTSTATUS) & bit_pos))) 
+   { 
+      /* Set the max packet length, interrupt on Setup and Mult fields */
+      if (xd_ptr->EP_TYPE == ARC_USB_ISOCHRONOUS_ENDPOINT) 
+      {
+         /* Mult bit should be set for isochronous endpoints */
+         ep_queue_head_ptr->MAX_PKT_LENGTH = USB_32BIT_LE((xd_ptr->WMAXPACKETSIZE << 16) | 
+            ((xd_ptr->MAX_PKTS_PER_UFRAME ?  xd_ptr->MAX_PKTS_PER_UFRAME : 1) << 
+            VUSB_EP_QUEUE_HEAD_MULT_POS));
+      } 
+      else 
+      {
+         if (xd_ptr->EP_TYPE != ARC_USB_CONTROL_ENDPOINT) 
+         {
+             /* BULK or INTERRUPT */
+            ep_queue_head_ptr->MAX_PKT_LENGTH = USB_32BIT_LE((xd_ptr->WMAXPACKETSIZE << 16) | 
+               (xd_ptr->DONT_ZERO_TERMINATE ? VUSB_EP_QUEUE_HEAD_ZERO_LEN_TER_SEL : 0));
+         } 
+         else 
+         {
+             /* CONTROL */
+            ep_queue_head_ptr->MAX_PKT_LENGTH = USB_32BIT_LE((xd_ptr->WMAXPACKETSIZE << 16) | 
+                                                    VUSB_EP_QUEUE_HEAD_IOS);
+         } /* Endif */
+      } /* Endif */
+      
+      /* Enable the endpoint for Rx or Tx and set the endpoint type */
+      val = dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTCTRLX[xd_ptr->EP_NUM];
+      if(xd_ptr->BDIRECTION  == ARC_USB_SEND)
+      {
+          val &= ~(USB_32BIT_LE(EHCI_EPCTRL_TX_ALL_MASK));
+          val |= USB_32BIT_LE((EHCI_EPCTRL_TX_ENABLE | EHCI_EPCTRL_TX_DATA_TOGGLE_RST) | 
+                          (xd_ptr->EP_TYPE << EHCI_EPCTRL_TX_EP_TYPE_SHIFT));
+      }
+      else
+      {
+          val &= ~(USB_32BIT_LE(EHCI_EPCTRL_RX_ALL_MASK));
+          val |= USB_32BIT_LE((EHCI_EPCTRL_RX_ENABLE | EHCI_EPCTRL_RX_DATA_TOGGLE_RST) | 
+                          (xd_ptr->EP_TYPE << EHCI_EPCTRL_RX_EP_TYPE_SHIFT));
+      }
+      dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTCTRLX[xd_ptr->EP_NUM] = val;
+      
+      /* Implement Guideline (GL# USB-7) The unused endpoint type must  */
+      /* be programmed to bulk.                                         */
+      if( (dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTCTRLX[xd_ptr->EP_NUM] & 
+            USB_32BIT_LE(EHCI_EPCTRL_RX_ENABLE)) == 0)
+      {
+          dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTCTRLX[xd_ptr->EP_NUM] |= 
+              USB_32BIT_LE(ARC_USB_BULK_ENDPOINT << EHCI_EPCTRL_RX_EP_TYPE_SHIFT);
+      }
+
+      if( (dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTCTRLX[xd_ptr->EP_NUM] & 
+            USB_32BIT_LE(EHCI_EPCTRL_TX_ENABLE)) == 0)
+      {
+          dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTCTRLX[xd_ptr->EP_NUM] |= 
+              USB_32BIT_LE(ARC_USB_BULK_ENDPOINT << EHCI_EPCTRL_TX_EP_TYPE_SHIFT);
+      }
+
+      ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_INIT,
+                    "init ep #%d %s: type=0x%x, EPCTRLX=0x%x, SETUP=0x%x, PRIME=0x%x, STATUS=0x%x, COMPL=0x%x\n", 
+                        xd_ptr->EP_NUM, xd_ptr->BDIRECTION ? "SEND" : "RECV", xd_ptr->EP_TYPE, 
+                        (unsigned)USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTCTRLX[xd_ptr->EP_NUM]),
+                        (unsigned)USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPT_SETUP_STAT),
+                        (unsigned)USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTPRIME),
+                        (unsigned)USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTSTATUS),
+                        (unsigned)USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTCOMPLETE) );
+   } 
+   else 
+   { 
+      USB_printf("ep=%d %s: Init ERROR: ENDPTPRIME=0x%x, ENDPTSTATUS=0x%x, bit_pos=0x%x\n",
+                (unsigned)xd_ptr->EP_NUM, xd_ptr->BDIRECTION ? "SEND" : "RECV",
+                (unsigned)USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTPRIME),
+                (unsigned)USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTSTATUS), 
+                (unsigned)bit_pos);
+        return USBERR_EP_INIT_FAILED;
+   } /* Endif */
+      
+   return USB_OK;
+   
+} /* EndBody */
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_dci_vusb20_get_transfer_status
+*  Returned Value : USB_OK or error code
+*  Comments       :
+*        Gets the status of a transfer
+*
+*END*-----------------------------------------------------------------*/
+uint_8 _usb_dci_vusb20_get_transfer_status
+   (
+      /* [IN] the USB_dev_initialize state structure */
+      _usb_device_handle         handle,
+     
+      /* [IN] the Endpoint number */
+      uint_8                     ep_num,
+            
+      /* [IN] direction */
+      uint_8                     direction
+   )
+{ /* Body */
+   USB_DEV_STATE_STRUCT_PTR                     usb_dev_ptr;
+   VUSB20_EP_TR_STRUCT_PTR                      dTD_ptr;
+   XD_STRUCT_PTR                                xd_ptr;
+   uint_8                                       status;
+   
+   usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+  
+   /* Unlink the dTD */
+   dTD_ptr = usb_dev_ptr->EP_DTD_HEADS[2*ep_num + direction];
+
+   if (dTD_ptr) 
+   {
+      /* Get the transfer descriptor for the dTD */
+      xd_ptr = (XD_STRUCT_PTR)dTD_ptr->SCRATCH_PTR->XD_FOR_THIS_DTD;
+      status = xd_ptr->BSTATUS;
+   } 
+   else 
+   {
+      status = ARC_USB_STATUS_IDLE;
+   } /* Endif */
+   
+   return (status);
+
+} /* EndBody */
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_dci_vusb20_get_transfer_details
+*  Returned Value : pointer to structure that has details for transfer
+*        Gets the status of a transfer
+*
+*END*-----------------------------------------------------------------*/
+XD_STRUCT_PTR  _usb_dci_vusb20_get_transfer_details
+   (
+      /* [IN] the USB_dev_initialize state structure */
+      _usb_device_handle         handle,
+     
+      /* [IN] the Endpoint number */
+      uint_8                     ep_num,
+            
+      /* [IN] direction */
+      uint_8                     direction
+   )
+{ /* Body */
+   USB_DEV_STATE_STRUCT_PTR                     usb_dev_ptr;
+   VUSB20_REG_STRUCT_PTR                        dev_ptr;
+   VUSB20_EP_TR_STRUCT_PTR                      dTD_ptr, temp_dTD_ptr;
+   XD_STRUCT_PTR                                xd_ptr;
+   uint_32                                      temp, remaining_bytes;
+   VUSB20_EP_QUEUE_HEAD_STRUCT_PTR              ep_queue_head_ptr;
+
+   
+   usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+   dev_ptr = (VUSB20_REG_STRUCT_PTR)usb_dev_ptr->DEV_PTR;
+   temp = (2*ep_num + direction);
+
+   /* get a pointer to QH for this endpoint */   
+   ep_queue_head_ptr = (VUSB20_EP_QUEUE_HEAD_STRUCT_PTR)usb_dev_ptr->EP_QUEUE_HEAD_PTR + temp;
+
+   ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_TRACE, "get_transfer_details\n");
+   
+   /* Unlink the dTD */
+   dTD_ptr = usb_dev_ptr->EP_DTD_HEADS[2*ep_num + direction];
+
+   if (dTD_ptr) 
+   {      
+      /* Get the transfer descriptor for the dTD */
+      xd_ptr = (XD_STRUCT_PTR)dTD_ptr->SCRATCH_PTR->XD_FOR_THIS_DTD;
+      if(!xd_ptr) return NULL;
+      
+      /* Initialize the transfer length field */
+      xd_ptr->WSOFAR =0;
+      remaining_bytes =0;
+      
+      /*if length of this transfer is greater than 20K
+      we have multiple DTDs to count */
+      if(xd_ptr->WTOTALLENGTH > VUSB_EP_MAX_LENGTH_TRANSFER)
+      {
+         /* it is a valid DTD. We should parse all DTDs for this XD
+         and find the total bytes used so far */
+         temp_dTD_ptr = dTD_ptr;
+      
+         /*loop through the list of DTDS until an active DTD is found
+         or list has finished */
+         while(!(USB_32BIT_LE(dTD_ptr->NEXT_TR_ELEM_PTR) & VUSBHS_TD_NEXT_TERMINATE))         
+         {
+            
+            /**********************************************************
+            If this DTD has been overlayed, we take the actual length 
+            from QH.
+            **********************************************************/
+
+            if ((uint_32)(USB_32BIT_LE(ep_queue_head_ptr->CURR_DTD_PTR) & VUSBHS_TD_ADDR_MASK) ==
+                                     USB_DTD_VIRT_TO_PHYS(usb_dev_ptr, temp_dTD_ptr) )
+            {
+                remaining_bytes += 
+                  ((USB_32BIT_LE(ep_queue_head_ptr->SIZE_IOC_INT_STS) & VUSB_EP_TR_PACKET_SIZE) >> 16);
+            }
+            else
+            {
+               /* take the length from DTD itself */
+                remaining_bytes += 
+                  ((USB_32BIT_LE(temp_dTD_ptr->SIZE_IOC_STS) & VUSB_EP_TR_PACKET_SIZE) >> 16);
+            }
+   
+            dTD_ptr = temp_dTD_ptr;
+             
+            /* Get the address of the next dTD */
+            temp_dTD_ptr = (VUSB20_EP_TR_STRUCT_PTR)USB_DTD_PHYS_TO_VIRT(usb_dev_ptr, 
+                                (uint_32)(USB_32BIT_LE(temp_dTD_ptr->NEXT_TR_ELEM_PTR) & VUSBHS_TD_ADDR_MASK) );
+         }
+         xd_ptr->WSOFAR = xd_ptr->WTOTALLENGTH - remaining_bytes;
+      }
+      else
+      {
+         /*look at actual length from QH*/
+         xd_ptr->WSOFAR = xd_ptr->WTOTALLENGTH - 
+            ((USB_32BIT_LE(ep_queue_head_ptr->SIZE_IOC_INT_STS) & VUSB_EP_TR_PACKET_SIZE) >> 16);         
+      }      
+   } 
+   else 
+   {
+      xd_ptr = NULL;
+   } /* Endif */
+   
+   return (xd_ptr);
+
+} /* EndBody */
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_dci_vusb20_deinit_endpoint
+*  Returned Value : None
+*  Comments       :
+*        Disables the specified endpoint and the endpoint queue head
+*
+*END*-----------------------------------------------------------------*/
+uint_8 _usb_dci_vusb20_deinit_endpoint
+   (
+      /* [IN] the USB_dev_initialize state structure */
+      _usb_device_handle         handle,
+            
+      /* [IN] the Endpoint number */
+      uint_8                     ep_num,
+            
+      /* [IN] direction */
+      uint_8                     direction
+   )
+{ /* Body */
+    USB_DEV_STATE_STRUCT_PTR        usb_dev_ptr;
+    VUSB20_REG_STRUCT_PTR           dev_ptr;
+    VUSB20_EP_QUEUE_HEAD_STRUCT*    ep_queue_head_ptr;
+    uint_32                         bit_pos;
+    uint_8                          status = USB_OK;
+   
+    usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+    dev_ptr = (VUSB20_REG_STRUCT_PTR)usb_dev_ptr->DEV_PTR;
+   
+    /* Get the endpoint queue head address */
+    ep_queue_head_ptr = (VUSB20_EP_QUEUE_HEAD_STRUCT_PTR)usb_dev_ptr->EP_QUEUE_HEAD_PTR +
+                                                                    (2*ep_num + direction);
+      
+    bit_pos = (1 << (16 * direction + ep_num));
+
+    ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_INIT,
+               "deinit ep #%d-%s: bit_pos=0x%x, EPCTRLX=0x%x, SETUP=0x%x, PRIME=0x%x, STATUS=0x%x, COMPL=0x%x\n", 
+                   ep_num, direction ? "SEND" : "RECV", bit_pos,
+                   (unsigned)USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTCTRLX[ep_num]),
+                   (unsigned)USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPT_SETUP_STAT),
+                   (unsigned)USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTPRIME),
+                   (unsigned)USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTSTATUS),
+                   (unsigned)USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTCOMPLETE) );
+      
+    /* Check if the Endpoint is Primed */
+    if( ((USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTPRIME) & bit_pos)) || 
+        ((USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTSTATUS) & bit_pos)) ) 
+    { 
+        USB_printf("ep=%d %s: Deinit ERROR: ENDPTPRIME=0x%x, ENDPTSTATUS=0x%x, bit_pos=0x%x\n",
+                (unsigned)ep_num, direction ? "SEND" : "RECV",
+                (unsigned)USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTPRIME),
+                (unsigned)USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTSTATUS), 
+                (unsigned)bit_pos);
+        status = USBERR_EP_DEINIT_FAILED;
+    }
+
+    /* Reset the max packet length and the interrupt on Setup */
+    ep_queue_head_ptr->MAX_PKT_LENGTH = 0;
+      
+    /* Disable the endpoint for Rx or Tx and reset the endpoint type */
+    dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTCTRLX[ep_num] &= 
+         USB_32BIT_LE( ~((direction ? EHCI_EPCTRL_TX_ENABLE : EHCI_EPCTRL_RX_ENABLE) | 
+                        (direction ? EHCI_EPCTRL_TX_TYPE : EHCI_EPCTRL_RX_TYPE)));
+      
+   return status;
+}
+
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_dci_vusb20_shutdown
+*  Returned Value : None
+*  Comments       :
+*        Shuts down the VUSB_HS Device
+*
+*END*-----------------------------------------------------------------*/
+void _usb_dci_vusb20_shutdown
+   (
+      /* [IN] the USB_dev_initialize state structure */
+      _usb_device_handle         handle
+   )
+{ /* Body */
+    USB_DEV_STATE_STRUCT_PTR                     usb_dev_ptr;
+    VUSB20_REG_STRUCT_PTR                        dev_ptr;
+   
+    usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+    dev_ptr = (VUSB20_REG_STRUCT_PTR)usb_dev_ptr->DEV_PTR;
+   
+    /* Disable interrupts */
+    dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_INTR &= 
+      ~(USB_32BIT_LE(EHCI_INTR_INT_EN | EHCI_INTR_ERR_INT_EN |
+      EHCI_INTR_PORT_CHANGE_DETECT_EN | EHCI_INTR_RESET_EN));
+      
+    USB_uncached_memfree(usb_dev_ptr->EP_QUEUE_HEAD_BASE, 
+                        usb_dev_ptr->EP_QUEUE_HEAD_SIZE, 
+                        usb_dev_ptr->EP_QUEUE_HEAD_PHYS);
+
+    USB_uncached_memfree(usb_dev_ptr->DTD_BASE_PTR, 
+                        usb_dev_ptr->DTD_SIZE, 
+                        usb_dev_ptr->DTD_BASE_PHYS);
+
+    USB_memfree(usb_dev_ptr->SCRATCH_STRUCT_BASE);
+
+    USB_printf("USB shutdown: usb_dev_ptr=%p\n", usb_dev_ptr);
+
+   /* Reset the Run the bit in the command register to stop VUSB */
+   dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_CMD &= ~USB_32BIT_LE(EHCI_CMD_RUN_STOP);
+   
+   /* Reset the controller to get default values */
+   dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_CMD = USB_32BIT_LE(EHCI_CMD_CTRL_RESET);
+              
+} /* EndBody */
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_dci_vusb20_stop
+*  Returned Value : None
+*  Comments       :
+*        Stop USB device controller
+*
+*END*-----------------------------------------------------------------*/
+void _usb_dci_vusb20_stop(_usb_device_handle handle)
+{
+   USB_DEV_STATE_STRUCT_PTR     usb_dev_ptr;
+   VUSB20_REG_STRUCT_PTR        dev_ptr;
+   
+   usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+   dev_ptr = (VUSB20_REG_STRUCT_PTR)usb_dev_ptr->DEV_PTR;
+
+    /* Disable interrupts */
+   dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_INTR &= 
+            ~(USB_32BIT_LE(EHCI_INTR_INT_EN | EHCI_INTR_ERR_INT_EN |
+                           EHCI_INTR_PORT_CHANGE_DETECT_EN | EHCI_INTR_RESET_EN));
+
+   /* Reset the Run the bit in the command register to stop VUSB */
+   dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_CMD &= ~USB_32BIT_LE(EHCI_CMD_RUN_STOP);
+}
+
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_dci_vusb20_start
+*  Returned Value : None
+*  Comments       :
+*        Start USB device controller
+*
+*END*-----------------------------------------------------------------*/
+void _usb_dci_vusb20_start(_usb_device_handle handle)
+{
+   USB_DEV_STATE_STRUCT_PTR     usb_dev_ptr;
+   VUSB20_REG_STRUCT_PTR        dev_ptr;
+   
+   usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+   dev_ptr = (VUSB20_REG_STRUCT_PTR)usb_dev_ptr->DEV_PTR;
+
+      /* Enable interrupts */
+   dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_INTR = USB_32BIT_LE(
+                           EHCI_INTR_INT_EN
+                         | EHCI_INTR_ERR_INT_EN 
+                         | EHCI_INTR_PORT_CHANGE_DETECT_EN 
+                         | EHCI_INTR_RESET_EN 
+                         | EHCI_INTR_DEVICE_SUSPEND
+                       /*  
+                         | EHCI_INTR_SOF_UFRAME_EN 
+                        */
+                         );
+   
+   usb_dev_ptr->USB_STATE = ARC_USB_STATE_UNKNOWN;
+   
+   /* Set the Run bit in the command register */
+   dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_CMD = USB_32BIT_LE(EHCI_CMD_RUN_STOP);
+}
+
+/* EOF */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/device/mvUsbHsDevCncl.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/device/mvUsbHsDevCncl.c
@@ -0,0 +1,222 @@
+/*******************************************************************************
+
+This software file (the "File") is distributed by Marvell International Ltd. 
+or its affiliate(s) under the terms of the GNU General Public License Version 2, 
+June 1991 (the "License").  You may use, redistribute and/or modify this File 
+in accordance with the terms and conditions of the License, a copy of which 
+is available along with the File in the license.txt file or by writing to the 
+Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 
+or on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+(C) Copyright 2004 - 2007 Marvell Semiconductor Israel Ltd. All Rights Reserved.
+(C) Copyright 1999 - 2004 Chipidea Microelectronica, S.A. All Rights Reserved.
+
+*******************************************************************************/
+
+#include "mvUsbDevApi.h"
+#include "mvUsbDevPrv.h"
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_dci_vusb20_cancel_transfer
+*  Returned Value : USB_OK or error code
+*  Comments       :
+*        Cancels a transfer
+*
+*END*-----------------------------------------------------------------*/
+uint_8 _usb_dci_vusb20_cancel_transfer
+   (
+      /* [IN] the USB_dev_initialize state structure */
+      _usb_device_handle         handle,
+     
+      /* [IN] the Endpoint number */
+      uint_8                     ep_num,
+            
+      /* [IN] direction */
+      uint_8                     direction
+   )
+{ /* Body */
+   USB_DEV_STATE_STRUCT_PTR             usb_dev_ptr;
+   VUSB20_REG_STRUCT_PTR                dev_ptr;
+   VUSB20_EP_TR_STRUCT_PTR              dTD_ptr, check_dTD_ptr;
+   VUSB20_EP_QUEUE_HEAD_STRUCT_PTR      ep_queue_head_ptr;
+   XD_STRUCT_PTR                        xd_ptr;
+   uint_32                              temp, bit_pos;
+   volatile unsigned long               timeout, status_timeout;
+   
+   usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+   dev_ptr = (VUSB20_REG_STRUCT_PTR)usb_dev_ptr->DEV_PTR;
+   
+   bit_pos = (1 << (16 * direction + ep_num));
+   temp = (2*ep_num + direction);
+   
+   ep_queue_head_ptr = (VUSB20_EP_QUEUE_HEAD_STRUCT_PTR)usb_dev_ptr->EP_QUEUE_HEAD_PTR + temp;
+   
+   /* Unlink the dTD */
+   dTD_ptr = usb_dev_ptr->EP_DTD_HEADS[temp];
+   
+   if (dTD_ptr) 
+   {
+      ARC_DEBUG_CODE(ARC_DEBUG_FLAG_STATS, (usb_dev_ptr->STATS.usb_cancel_count++));
+
+      check_dTD_ptr = (VUSB20_EP_TR_STRUCT_PTR)USB_DTD_PHYS_TO_VIRT(usb_dev_ptr, 
+                            ((uint_32)USB_32BIT_LE(dTD_ptr->NEXT_TR_ELEM_PTR) & VUSBHS_TD_ADDR_MASK));
+
+      if (USB_32BIT_LE(dTD_ptr->SIZE_IOC_STS) & VUSBHS_TD_STATUS_ACTIVE) 
+      {
+         /* Flushing will halt the pipe */
+         /* Write 1 to the Flush register */
+         dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTFLUSH = USB_32BIT_LE(bit_pos);
+
+         /* Wait until flushing completed */
+         timeout = 0x1000000;
+         while (USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTFLUSH) & bit_pos) 
+         {
+            /* ENDPTFLUSH bit should be cleared to indicate this operation is complete */
+            timeout--;
+            if(timeout == 0)
+            {
+                USB_printf("USB Cancel: - TIMEOUT for ENDPTFLUSH=0x%x, bit_pos=0x%x \n", 
+                      (unsigned)USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTFLUSH), 
+                      (unsigned)bit_pos);
+                break;
+            }
+         } /* EndWhile */
+         status_timeout = 0x100000;
+         while (USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTSTATUS) & bit_pos) 
+         {
+            status_timeout--;
+            if(status_timeout == 0)
+            {
+                USB_printf("USB Cancel: - TIMEOUT for ENDPTSTATUS=0x%x, bit_pos=0x%x\n", 
+                      (unsigned)USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTSTATUS), 
+                      (unsigned)bit_pos);
+                break;
+            }
+
+            /* Write 1 to the Flush register */
+            dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTFLUSH = USB_32BIT_LE(bit_pos);
+         
+            /* Wait until flushing completed */
+            timeout = 0x1000000;
+            while (USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTFLUSH) & bit_pos) 
+            {
+               /* ENDPTFLUSH bit should be cleared to indicate this operation is complete */
+               timeout--;
+               if(timeout == 0)
+                {
+                    USB_printf("USB Cancel: - TIMEOUT for ENDPTFLUSH=0x%x, ENDPTSTATUS=0x%x, bit_pos=0x%x\n", 
+                            (unsigned)USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTFLUSH), 
+                            (unsigned)USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTSTATUS),
+                            (unsigned)bit_pos);
+                    break;
+                }
+            } /* EndWhile */
+         } /* EndWhile */
+      } /* Endif */
+      
+      /* Retire the current dTD */
+      dTD_ptr->SIZE_IOC_STS = 0;
+      dTD_ptr->NEXT_TR_ELEM_PTR = USB_32BIT_LE(VUSBHS_TD_NEXT_TERMINATE);
+      
+      /* The transfer descriptor for this dTD */
+      xd_ptr = (XD_STRUCT_PTR)dTD_ptr->SCRATCH_PTR->XD_FOR_THIS_DTD;
+      dTD_ptr->SCRATCH_PTR->PRIVATE = (pointer)usb_dev_ptr;
+
+      ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_TRANSFER,
+                      "cncl_%d: fri=0x%x, ep=%d%s, buf=%p, size=%d, xd=%p, dTD=%p %p, bit=0x%x\n",
+                       usb_dev_ptr->STATS.usb_cancel_count & 0xFFFF, 
+                       USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_FRINDEX), 
+                       ep_num, direction ? "in" : "out", 
+                       xd_ptr->WSTARTADDRESS, xd_ptr->WTOTALLENGTH, xd_ptr, 
+                       dTD_ptr, check_dTD_ptr, bit_pos);
+       
+      /* Free the dTD */
+      _usb_dci_vusb20_free_dTD((pointer)dTD_ptr);
+      
+      /* Update the dTD head and tail for specific endpoint/direction */
+      if (!check_dTD_ptr) 
+      {
+         usb_dev_ptr->EP_DTD_HEADS[temp] = NULL;
+         usb_dev_ptr->EP_DTD_TAILS[temp] = NULL;
+         if (xd_ptr) 
+         {
+            xd_ptr->SCRATCH_PTR->PRIVATE = (pointer)usb_dev_ptr;
+            /* Free the transfer descriptor */
+            _usb_device_free_XD((pointer)xd_ptr);
+         } /* Endif */
+         /* No other transfers on the queue */
+         ep_queue_head_ptr->NEXT_DTD_PTR = USB_32BIT_LE(VUSB_EP_QUEUE_HEAD_NEXT_TERMINATE);
+         ep_queue_head_ptr->SIZE_IOC_INT_STS = 0;
+      } 
+      else 
+      {
+         usb_dev_ptr->EP_DTD_HEADS[temp] = check_dTD_ptr;
+            
+         if (xd_ptr) 
+         {
+            if ((uint_32)check_dTD_ptr->SCRATCH_PTR->XD_FOR_THIS_DTD != (uint_32)xd_ptr) 
+            {
+               xd_ptr->SCRATCH_PTR->PRIVATE = (pointer)usb_dev_ptr;
+               /* Free the transfer descriptor */
+               _usb_device_free_XD((pointer)xd_ptr);
+            } /* Endif */
+         } /* Endif */
+         
+         if (USB_32BIT_LE(check_dTD_ptr->SIZE_IOC_STS) & VUSBHS_TD_STATUS_ACTIVE) 
+         {         
+            /* Start CR 1015 */
+            /* Prime the Endpoint */
+            dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTPRIME = USB_32BIT_LE(bit_pos);
+
+            if (!(USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTSTATUS) & bit_pos)) 
+            {
+               timeout = 0x100000;
+               while (USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTPRIME) & bit_pos) 
+               {
+                  /* Wait for the ENDPTPRIME to go to zero */
+                  timeout--;
+                  if(timeout == 0)
+                  {
+                      USB_printf("USB Cancel: - TIMEOUT for ENDPTPRIME=0x%x, bit_pos=0x%x\n", 
+                                (unsigned)USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTPRIME), 
+                                (unsigned)bit_pos);
+                      break;
+                  }
+               } /* EndWhile */
+
+               if (USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTSTATUS) & bit_pos) 
+               {
+                  /* The endpoint was not not primed so no other transfers on 
+                  ** the queue 
+                  */
+                  goto done;
+               } /* Endif */
+            } 
+            else 
+            {
+               goto done;
+            } /* Endif */
+
+            /* No other transfers on the queue */
+            ep_queue_head_ptr->NEXT_DTD_PTR = (uint_32)USB_32BIT_LE((uint_32)check_dTD_ptr);
+            ep_queue_head_ptr->SIZE_IOC_INT_STS = 0;
+   
+            /* Prime the Endpoint */
+            dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTPRIME = USB_32BIT_LE(bit_pos);
+         } /* Endif */
+      } /* Endif */
+   } /* Endif */
+   
+done:
+
+   /* End CR 1015 */  
+   return USB_OK;
+} /* EndBody */
+
+/* EOF */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/device/mvUsbDevSend.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/device/mvUsbDevSend.c
@@ -0,0 +1,373 @@
+/*******************************************************************************
+
+This software file (the "File") is distributed by Marvell International Ltd. 
+or its affiliate(s) under the terms of the GNU General Public License Version 2, 
+June 1991 (the "License").  You may use, redistribute and/or modify this File 
+in accordance with the terms and conditions of the License, a copy of which 
+is available along with the File in the license.txt file or by writing to the 
+Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 
+or on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+(C) Copyright 2004 - 2007 Marvell Semiconductor Israel Ltd. All Rights Reserved.
+(C) Copyright 1999 - 2004 Chipidea Microelectronica, S.A. All Rights Reserved.
+
+*******************************************************************************/
+
+#include "mvUsbDevApi.h"
+#include "mvUsbDevPrv.h"
+
+#if defined(USB_UNDERRUN_WA)
+
+typedef struct
+{
+    uint_8*     buff_ptr[MAX_XDS_FOR_TR_CALLS];
+    uint_32     size[MAX_XDS_FOR_TR_CALLS];
+    uint_8      ep_num[MAX_XDS_FOR_TR_CALLS];
+    int         head;
+    int         tail;
+    int         tail_dma;
+    int         num;
+    int         num_dma;
+
+} USB_SEND_QUEUE;
+
+uint_8*         usbSramBase;
+int             usbSramSize;
+int		        usbSramPartSize;
+USB_SEND_QUEUE  usbSendQueue;
+
+uint_32         usbSentSize = 0;
+uint_32         usbDmaSize = 0;
+
+#define S_FREE	    0
+#define S_BUSY	    1
+
+uint_32		    dma_index = 0;
+uint_32		    sent_index = 0;
+uint_32		    sram_parts[USB_SRAM_MAX_PARTS];
+
+
+void    _usb_reset_send_queue(void)
+{
+    int     i;
+
+    usbSendQueue.num = 0;
+	usbSendQueue.num_dma = 0;
+    usbSendQueue.head = 0;
+    usbSendQueue.tail = 0;
+	usbSendQueue.tail_dma = 0;
+    for(i=0; i<MAX_XDS_FOR_TR_CALLS; i++)
+    {
+        usbSendQueue.size[i] = 0;
+        usbSendQueue.buff_ptr[i] = NULL;
+        usbSendQueue.ep_num[i] = 0;
+    }        
+	usbSramPartSize = usbSramSize/global_wa_sram_parts;
+
+    for(i=0; i<global_wa_sram_parts; i++)
+    {
+		sram_parts[i] = S_FREE;
+    }
+}
+
+uint_8 _usb_prepare_to_send(void*   handle)
+{
+    XD_STRUCT_PTR               xd_ptr;
+    USB_DEV_STATE_STRUCT_PTR    usb_dev_ptr;
+    uint_8*                     buff_ptr;
+    uint_8*			            tmp_buff;
+    uint_32                     size;
+    int                         num_dma, tail_dma, i;
+    uint_8			            error = 0;
+
+    usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+
+    tail_dma = usbSendQueue.tail_dma;
+    num_dma = usbSendQueue.num_dma;
+    buff_ptr = usbSendQueue.buff_ptr[tail_dma];
+    size = usbSendQueue.size[tail_dma];
+
+    if(num_dma == 0)
+	    return 0;
+
+/*
+    USB_printf("_usb_prepare_to_send: num=%d, tail=%d, sentSize=%d, size=%d, buff=%p\n", 
+                num_dma, tail_dma, usbSentSize, size, buff_ptr);
+*/
+    for(i=0; i<global_wa_sram_parts; i++)
+    {
+	    if(sram_parts[dma_index] != S_FREE)
+	        break;
+	
+	    if(usbDmaSize >= usbSendQueue.size[tail_dma])
+	    {
+	        /* Remove from the usbSendQueues */
+	        num_dma--;
+            tail_dma++;
+            if(tail_dma == MAX_XDS_FOR_TR_CALLS)
+                tail_dma = 0;
+
+            usbSendQueue.tail_dma = tail_dma;
+            usbSendQueue.num_dma = num_dma;
+            usbDmaSize = 0;
+
+            if(num_dma == 0)
+                break;
+        }
+
+	    buff_ptr = usbSendQueue.buff_ptr[tail_dma] + usbDmaSize;
+	    size = MIN(usbSramPartSize, (usbSendQueue.size[tail_dma] - usbDmaSize) ); 
+
+	    usbDmaSize += size;
+
+	    if(size > global_wa_threshold)
+	    {
+	        tmp_buff = buff_ptr;
+	        buff_ptr = (uint_8*)((int)usbSramBase + (dma_index * usbSramPartSize));
+	        USB_idma_copy(buff_ptr, tmp_buff, size);
+
+	        sram_parts[dma_index] = S_BUSY;
+            dma_index++;
+            if(dma_index == global_wa_sram_parts)
+                dma_index = 0;
+	    }
+        
+
+	    /* Get a transfer descriptor */
+	    USB_XD_QGET(usb_dev_ptr->XD_HEAD, usb_dev_ptr->XD_TAIL, xd_ptr);
+
+	    usb_dev_ptr->XD_ENTRIES--;
+	    USB_dcache_flush((pointer)buff_ptr, size);   
+
+	    /* Initialize the new transfer descriptor */      
+	    xd_ptr->EP_NUM = usbSendQueue.ep_num[tail_dma];
+	    xd_ptr->BDIRECTION = ARC_USB_SEND;
+	    xd_ptr->WTOTALLENGTH = size;
+	    xd_ptr->WSOFAR = 0;
+	    xd_ptr->WSTARTADDRESS = buff_ptr;   
+	    xd_ptr->BSTATUS = ARC_USB_STATUS_TRANSFER_ACCEPTED;
+
+	    error = _usb_dci_vusb20_add_dTD(handle, xd_ptr);
+
+	    if(error)
+	        break;
+    }
+
+    return error;    
+}
+
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : usbSendComplete
+*  Returned Value : None
+*  Comments       :
+*        Callback for send transfer complete event.
+*
+*END*-----------------------------------------------------------------*/
+void    usbSendComplete(void* handle, uint_8 type, boolean setup, uint_8 dir, 
+                        uint_8_ptr buffer, uint_32 length, uint_8 error)
+{
+    /* Check if this complete is one from the sendQueue */
+    if( (usbSendQueue.ep_num[usbSendQueue.tail] == type) &&
+        (usbSendQueue.num > 0) )
+    {
+        USB_DEV_STATE_STRUCT_PTR    usb_dev_ptr;
+        uint_8*                     buff_ptr;
+        uint_32                     size;
+        int                         num, tail;
+
+        usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+
+        tail = usbSendQueue.tail;
+        num = usbSendQueue.num;
+        buff_ptr = usbSendQueue.buff_ptr[tail];
+        size = usbSendQueue.size[tail];
+/*
+        USB_printf("usbSendComplete: num=%d, tail=%d, usbSentSize=%d, type=%d, length=%d (%d), buff=%p (%p)\n", 
+                num, tail, usbSentSize, type, length, usbSendQueue.size[tail], 
+                buffer, usbSendQueue.buff_ptr[tail]);
+*/
+        usbSentSize += length;
+
+	    /* if the buffer was on the SRAM */
+	    if( ((unsigned)buffer >= (unsigned)usbSramBase) &&
+	    ((unsigned)buffer < ((unsigned)usbSramBase + (usbSramPartSize * global_wa_sram_parts))) )
+	    {
+	        sram_parts[sent_index] = S_FREE;
+            sent_index++;
+            if(sent_index == global_wa_sram_parts)
+                sent_index = 0;
+	    }
+
+        if(usbSentSize >= usbSendQueue.size[tail])
+        {
+            /* Remove from the usbSendQueues */
+            num--;
+            tail++;
+            if(tail == MAX_XDS_FOR_TR_CALLS)
+                tail = 0;
+
+            usbSendQueue.tail = tail;
+            usbSendQueue.num = num;
+            usbSentSize = 0;
+
+            /* Call complete callback */
+            _usb_device_call_service(handle, type, setup, dir, 
+                         buff_ptr, size, error);
+
+            if(num == 0)
+                return;
+        }
+
+	    error = _usb_prepare_to_send(handle);	
+        if (error) 
+        {
+            USB_printf("usbSendComplete, add_dTD failed\n");
+        }	
+
+    }
+    else
+    {
+        /* Call complete callback */
+        _usb_device_call_service(handle, type, setup, dir, 
+                        buffer, length, error);
+    }
+}
+#endif /* USB_UNDERRUN_WA */
+
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_device_send_data
+*  Returned Value : USB_OK or error code
+*  Comments       :
+*        Sends data on a specified endpoint.
+*
+*END*-----------------------------------------------------------------*/
+uint_8 _usb_device_send_data
+   (
+      /* [IN] the USB_USB_dev_initialize state structure */
+      _usb_device_handle         handle,
+            
+      /* [IN] the Endpoint number */
+      uint_8                     ep_num,
+            
+      /* [IN] buffer to send */
+      uint_8_ptr                 buff_ptr,
+            
+      /* [IN] length of the transfer */
+      uint_32                    size
+   )
+{ /* Body */
+   int 	                        lockKey;
+   uint_8                       error = 0;
+   XD_STRUCT_PTR                xd_ptr;
+   USB_DEV_STATE_STRUCT_PTR     usb_dev_ptr;
+   boolean                      toSend = TRUE;
+
+   usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+
+   ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_TX,
+       "send_data: handle=%p, ep=%d, pBuf=0x%x, size=%d, EP_QH=%p\n", 
+       handle, ep_num, (unsigned)buff_ptr, (int)size, usb_dev_ptr->EP_QUEUE_HEAD_PTR);
+
+   ARC_DEBUG_CODE(ARC_DEBUG_FLAG_STATS, (usb_dev_ptr->STATS.usb_send_count++));
+      
+   lockKey = USB_lock();
+
+   if (!usb_dev_ptr->XD_ENTRIES) 
+   {
+      USB_unlock(lockKey);
+      USB_printf("_usb_device_send_data, transfer in progress\n");
+      return ARC_USB_STATUS_TRANSFER_IN_PROGRESS;
+   } /* Endif */
+
+#if defined(USB_UNDERRUN_WA)
+    {
+        int 			                head;
+       	VUSB20_EP_QUEUE_HEAD_STRUCT* 	ep_queue_head_ptr;
+
+		ep_queue_head_ptr = (VUSB20_EP_QUEUE_HEAD_STRUCT_PTR)usb_dev_ptr->EP_QUEUE_HEAD_PTR + 
+                       						                  2*ep_num + ARC_USB_SEND;
+
+        if( ((ep_queue_head_ptr->MAX_PKT_LENGTH >> 16) & 0x7FF) > global_wa_threshold) 
+        {
+            /* Only Endpoints with maxPktSize more than 128 bytes need special processing */
+            if( (size > global_wa_threshold) || 
+                (usbSendQueue.num != 0) )
+            {
+/*
+                USB_printf("_usb_device_send_data: ep_num=%d, maxPktSize=%d, size=%d\n",
+                        ep_num, (ep_queue_head_ptr->MAX_PKT_LENGTH >> 16) & 0x7FF, size);
+*/
+                /* Check if usbSendQueue is not Full */
+                if(usbSendQueue.num == MAX_XDS_FOR_TR_CALLS)
+                {
+                    USB_printf("ep=%d: usbSendQueue is FULL\n", ep_num);
+                    USB_unlock(lockKey);
+                    return USBERR_TX_FAILED;
+                }
+
+                /* Add to usbSendQueu */
+                head = usbSendQueue.head;
+
+                usbSendQueue.num++;
+		        usbSendQueue.num_dma++;
+                usbSendQueue.size[head] = size;
+                usbSendQueue.buff_ptr[head] = buff_ptr;
+                usbSendQueue.ep_num[head] = ep_num;
+
+                head++;
+                if(head == MAX_XDS_FOR_TR_CALLS)
+                    head = 0;
+
+                usbSendQueue.head = head;
+
+                /* Process first usbSendQueue element if possible */
+                if(usbSendQueue.num == 1)
+                {
+		            error = _usb_prepare_to_send(handle);
+		        }
+		        toSend = FALSE;
+            }
+        }
+    }
+#endif /* USB_UNDERRUN_WA */
+
+    if(toSend == TRUE)
+    {
+        /* Get a transfer descriptor */
+        USB_XD_QGET(usb_dev_ptr->XD_HEAD, usb_dev_ptr->XD_TAIL, xd_ptr);
+
+        usb_dev_ptr->XD_ENTRIES--;
+
+        if(buff_ptr != NULL)
+            USB_dcache_flush((pointer)buff_ptr, size);   
+
+        /* Initialize the new transfer descriptor */      
+        xd_ptr->EP_NUM = ep_num;
+        xd_ptr->BDIRECTION = ARC_USB_SEND;
+        xd_ptr->WTOTALLENGTH = size;
+        xd_ptr->WSOFAR = 0;
+        xd_ptr->WSTARTADDRESS = buff_ptr;   
+        xd_ptr->BSTATUS = ARC_USB_STATUS_TRANSFER_ACCEPTED;
+
+        error = _usb_dci_vusb20_add_dTD(handle, xd_ptr);
+    }
+    USB_unlock(lockKey);
+   
+    if (error) 
+    {
+        USB_printf("_usb_device_send_data, transfer failed\n");
+        return USBERR_TX_FAILED;
+    } /* Endif */
+    return error;
+
+} /* EndBody */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/device/mvUsbDevUtl.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/device/mvUsbDevUtl.c
@@ -0,0 +1,635 @@
+/*******************************************************************************
+
+This software file (the "File") is distributed by Marvell International Ltd. 
+or its affiliate(s) under the terms of the GNU General Public License Version 2, 
+June 1991 (the "License").  You may use, redistribute and/or modify this File 
+in accordance with the terms and conditions of the License, a copy of which 
+is available along with the File in the license.txt file or by writing to the 
+Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 
+or on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+(C) Copyright 2004 - 2007 Marvell Semiconductor Israel Ltd. All Rights Reserved.
+(C) Copyright 1999 - 2004 Chipidea Microelectronica, S.A. All Rights Reserved.
+
+*******************************************************************************/
+
+#include "mvUsbDevApi.h"
+#include "mvUsbDevPrv.h"
+
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_device_unstall_endpoint
+*  Returned Value : USB_OK or error code
+*  Comments       :
+*     Unstalls the endpoint in specified direction
+*
+*END*-----------------------------------------------------------------*/
+void _usb_device_unstall_endpoint
+   (
+      /* [IN] the USB_USB_dev_initialize state structure */
+      _usb_device_handle         handle,
+            
+      /* [IN] the Endpoint number */
+      uint_8                     ep_num,
+            
+      /* [IN] direction */
+      uint_8                     direction
+   )
+{ /* Body */
+   USB_DEV_STATE_STRUCT_PTR   	usb_dev_ptr;
+   int							lockKey;
+   
+   usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+ 
+   lockKey = USB_lock();
+   
+   _usb_dci_vusb20_unstall_endpoint(handle, ep_num, direction);
+
+   USB_unlock(lockKey);
+  
+} /* EndBody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : _usb_device_get_status
+* Returned Value : USB_OK or error code
+* Comments       :
+*     Provides API to access the USB internal state.
+* 
+*END*--------------------------------------------------------------------*/
+uint_8 _usb_device_get_status
+   (
+      /* [IN] Handle to the USB device */
+      _usb_device_handle   handle,
+      
+      /* [IN] What to get the status of */
+      uint_8               component,
+      
+      /* [OUT] The requested status */
+      uint_16_ptr          status
+   )
+{ /* Body */
+   	USB_DEV_STATE_STRUCT_PTR 	usb_dev_ptr;
+	int							lockKey;
+
+   usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+  
+   lockKey = USB_lock();
+
+   switch (component) 
+   {
+      case ARC_USB_STATUS_DEVICE_STATE:
+         *status = usb_dev_ptr->USB_STATE;
+         break;
+
+      case ARC_USB_STATUS_DEVICE:
+         *status = usb_dev_ptr->USB_DEVICE_STATE;
+         break;
+
+      case ARC_USB_STATUS_INTERFACE:
+          *status = 0;
+         break;
+         
+      case ARC_USB_STATUS_ADDRESS:
+         *status = usb_dev_ptr->DEVICE_ADDRESS;
+         break;
+         
+      case ARC_USB_STATUS_CURRENT_CONFIG:
+         *status = usb_dev_ptr->USB_CURR_CONFIG;
+         break;
+
+      case ARC_USB_STATUS_SOF_COUNT:
+         *status = usb_dev_ptr->USB_SOF_COUNT;
+         break;
+   
+      default:
+            USB_unlock(lockKey);
+            USB_printf("_usb_device_get_status, bad status\n");
+            return USBERR_BAD_STATUS;
+  
+   } /* Endswitch */
+   USB_unlock(lockKey);
+  
+   return USB_OK;   
+} /* EndBody */  
+ 
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : _usb_device_set_status
+* Returned Value : USB_OK or error code
+* Comments       :
+*     Provides API to set internal state
+* 
+*END*--------------------------------------------------------------------*/
+uint_8 _usb_device_set_status
+   (
+      /* [IN] Handle to the usb device */
+      _usb_device_handle   handle,
+      
+      /* [IN] What to set the status of */
+      uint_8               component,
+      
+      /* [IN] What to set the status to */
+      uint_16              setting
+   )
+{ /* Body */
+   USB_DEV_STATE_STRUCT_PTR usb_dev_ptr;
+   int 					    lockKey;
+
+   ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_STATUS, 
+            "set_status: component=0x%x, value=0x%x\n", component, setting);
+   
+   usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+   lockKey = USB_lock();
+
+   switch (component) 
+   {
+      case ARC_USB_STATUS_DEVICE_STATE:
+         usb_dev_ptr->USB_STATE = setting;
+         break;
+
+      case ARC_USB_STATUS_DEVICE:
+         usb_dev_ptr->USB_DEVICE_STATE = setting;
+         break;
+
+      case ARC_USB_STATUS_INTERFACE:
+         break;
+
+      case ARC_USB_STATUS_CURRENT_CONFIG:
+         usb_dev_ptr->USB_CURR_CONFIG = setting;
+         break;
+
+      case ARC_USB_STATUS_SOF_COUNT:
+         usb_dev_ptr->USB_SOF_COUNT = setting;
+         break;
+
+      case ARC_USB_FORCE_FULL_SPEED:
+         _usb_dci_vusb20_set_speed_full((pointer)usb_dev_ptr, setting);
+         break;
+
+      case ARC_USB_PHY_LOW_POWER_SUSPEND:
+         _usb_dci_vusb20_suspend_phy((pointer)usb_dev_ptr, setting);
+         break;
+
+      case ARC_USB_STATUS_ADDRESS:
+         usb_dev_ptr->DEVICE_ADDRESS = setting;
+
+         _usb_dci_vusb20_set_address((pointer)usb_dev_ptr, setting);
+         break;
+      
+      case ARC_USB_STATUS_TEST_MODE:
+         _usb_dci_vusb20_set_test_mode(handle, setting);
+         break;
+         
+      default:
+            USB_unlock(lockKey);
+            USB_printf("_usb_device_set_status, bad status\n");
+            return USBERR_BAD_STATUS;
+  
+   } /* Endswitch */
+
+   USB_unlock(lockKey);
+   
+   return USB_OK;   
+} /* EndBody */
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_device_stall_endpoint
+*  Returned Value : USB_OK or error code
+*  Comments       :
+*     Stalls the endpoint.
+*
+*END*-----------------------------------------------------------------*/
+void _usb_device_stall_endpoint
+   (
+      /* [IN] the USB_USB_dev_initialize state structure */
+      _usb_device_handle         handle,
+            
+      /* [IN] the Endpoint number */
+      uint_8                     ep_num,
+            
+      /* [IN] direction */
+      uint_8                     direction
+   )
+{ /* Body */
+   USB_DEV_STATE_STRUCT_PTR     usb_dev_ptr;
+   int							lockKey;
+
+   usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+
+   lockKey = USB_lock();
+
+   _usb_dci_vusb20_stall_endpoint(handle, ep_num, direction);
+
+   USB_unlock(lockKey);
+   
+} /* EndBody */
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_device_is_endpoint_stalled
+*  Returned Value : USB_OK or error code
+*  Comments       :
+*     Stalls the endpoint.
+*
+*END*-----------------------------------------------------------------*/
+uint_8 _usb_device_is_endpoint_stalled
+   (
+      /* [IN] the USB_USB_dev_initialize state structure */
+      _usb_device_handle         handle,
+            
+      /* [IN] the Endpoint number */
+      uint_8                     ep_num,
+            
+      /* [IN] direction */
+      uint_8                     direction
+   )
+{ /* Body */
+   USB_DEV_STATE_STRUCT_PTR     usb_dev_ptr;
+   uint_8                       val;
+   int							lockKey;
+
+   usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+
+   lockKey = USB_lock();
+
+   val = _usb_dci_vusb20_is_endpoint_stalled(handle, ep_num, direction);
+
+   USB_unlock(lockKey);
+
+   return val;
+   
+} /* EndBody */
+
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_device_process_resume
+*  Returned Value : USB_OK or error code
+*  Comments       :
+*        Process Resume event
+*
+*END*-----------------------------------------------------------------*/
+void _usb_device_assert_resume
+   (
+      /* [IN] the USB_USB_dev_initialize state structure */
+      _usb_device_handle         handle
+   )
+{ /* Body */
+   USB_DEV_STATE_STRUCT_PTR      usb_dev_ptr;
+   
+   usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+
+   _usb_dci_vusb20_assert_resume(handle);
+
+} /* EndBody */
+
+
+/***************************/
+/* ARC USB Debug functions */
+/***************************/
+void _usb_status(void* usbHandle)
+{
+    USB_DEV_STATE_STRUCT*   pUsbDev = (USB_DEV_STATE_STRUCT*)usbHandle;
+
+    if(pUsbDev == NULL)
+    {
+        USB_printf("USB Device core is not initialized\n");
+        return;
+    }
+
+    USB_printf("\n\tUSB Status\n\n");
+
+    USB_printf("DEV_NUM=%d, DEV_ADDR=%d, CAP_REGS=0x%x, DEV_REGS=0x%x, MAX_EP=%d\n",
+                pUsbDev->DEV_NUM,
+                pUsbDev->DEVICE_ADDRESS,
+                (unsigned)pUsbDev->CAP_REGS_PTR, 
+                (unsigned)pUsbDev->DEV_PTR, 
+                pUsbDev->MAX_ENDPOINTS);
+
+    USB_printf("BUS_RESET=%s, STATE=0x%02x, DEV_STATE=0x%02x, SPEED=%d, ERRORS=%d, ERROR_STATE=0x%04x\n",
+                pUsbDev->BUS_RESETTING ? "Yes" : "No",
+                pUsbDev->USB_STATE,
+                pUsbDev->USB_DEVICE_STATE,
+                pUsbDev->SPEED, 
+                pUsbDev->ERRORS,
+                pUsbDev->ERROR_STATE);
+
+    USB_printf("EP_QUEUE_HEAD: SIZE=%d, BASE=%p (0x%08x), ALIGNED=%p, SERVICE_HEAD=%p\n",
+                pUsbDev->EP_QUEUE_HEAD_SIZE,
+                pUsbDev->EP_QUEUE_HEAD_BASE, 
+                pUsbDev->EP_QUEUE_HEAD_PHYS,
+                pUsbDev->EP_QUEUE_HEAD_PTR,
+                pUsbDev->SERVICE_HEAD_PTR);
+
+    USB_printf("XD: BASE=%p, HEAD=%p, TAIL=%p, ENTRIES=%d, SCRATCH=%p, TEMP=%p\n",
+                pUsbDev->XD_BASE,
+                pUsbDev->XD_HEAD,
+                pUsbDev->XD_TAIL,
+                pUsbDev->XD_ENTRIES,
+                pUsbDev->XD_SCRATCH_STRUCT_BASE,
+                pUsbDev->TEMP_XD_PTR);
+
+    USB_printf("DTD: SIZE=%d, BASE=%p (0x%08x), ALIGNED=%p, HEAD=0x%08x, TAIL=0x%08x, ENTRIES=%d, SCRATCH=%p\n",
+                pUsbDev->DTD_SIZE,
+                pUsbDev->DTD_BASE_PTR,
+                pUsbDev->DTD_BASE_PHYS,
+                pUsbDev->DTD_ALIGNED_BASE_PTR,
+                pUsbDev->DTD_HEAD,
+                pUsbDev->DTD_TAIL,
+                pUsbDev->DTD_ENTRIES,
+                pUsbDev->SCRATCH_STRUCT_BASE);
+}
+
+void _usb_stats(void* usbHandle)
+{
+    USB_DEV_STATE_STRUCT*   pUsbDev = (USB_DEV_STATE_STRUCT*)usbHandle;
+    USB_STATS*              pUsbStats = &pUsbDev->STATS;
+    int                     i;
+
+    USB_printf("\n\tUSB Statistics\n\n");
+
+    USB_printf("isr=%u, empty_isr=%u, reset=%u, setup=%u, read_setup=%u\n", 
+                    pUsbStats->usb_isr_count, pUsbStats->usb_empty_isr_count, 
+                    pUsbStats->usb_reset_count, pUsbStats->usb_setup_count, 
+                    pUsbStats->usb_read_setup_count);
+
+    USB_printf("recv=%u, send=%u, add=%u (%u), cancel=%u\n", 
+                pUsbStats->usb_recv_count, pUsbStats->usb_send_count, 
+                pUsbStats->usb_add_count, pUsbStats->usb_add_not_empty_count, 
+                pUsbStats->usb_cancel_count);
+
+    USB_printf("free_XD=%u, free_dTD=%u\n", 
+            pUsbStats->free_XD_count, pUsbStats->free_dTD_count);
+
+    USB_printf("complete_isr=%u, complete=%u, empty_complete=%u, max_complete=%u\n", 
+                pUsbStats->usb_complete_isr_count, pUsbStats->usb_complete_count, 
+                pUsbStats->usb_empty_complete_count, pUsbStats->usb_complete_max_count);
+
+    USB_printf("port_change=%u, suspend=%u\n", 
+                pUsbStats->usb_port_change_count, pUsbStats->usb_suspend_count);
+    for(i=0; i<(pUsbDev->MAX_ENDPOINTS); i++)
+    {
+        if( (pUsbStats->usb_complete_ep_count[i*2] == 0) && 
+            (pUsbStats->usb_complete_ep_count[i*2+1] == 0) )
+            continue;
+
+        USB_printf("EP #%d: RECV (OUT) = %3u, \tSEND (IN) = %u\n", i,
+                    pUsbStats->usb_complete_ep_count[i*2], 
+                    pUsbStats->usb_complete_ep_count[i*2+1]);
+    }
+    USB_printf("\n");
+}
+
+void _usb_clear_stats(void* usbHandle)
+{
+    USB_DEV_STATE_STRUCT*   pUsbDev = (USB_DEV_STATE_STRUCT*)usbHandle;
+
+    USB_memzero(&pUsbDev->STATS, sizeof(pUsbDev->STATS));
+}
+
+void _usb_regs(void* usbHandle)
+{
+    USB_DEV_STATE_STRUCT*   pUsbDev = (USB_DEV_STATE_STRUCT*)usbHandle;
+    VUSB20_REG_STRUCT*      cap_regs, *dev_regs;
+    int                     dev_num;
+
+    if(pUsbDev == NULL)
+    {
+        USB_printf("USB Device core is not initialized\n");
+        return;
+    }
+    USB_printf("\n\tUSB Capability Registers\n\n");
+
+    cap_regs = pUsbDev->CAP_REGS_PTR;
+    USB_printf("CAPLENGTH_HCIVER (0x%08x) = 0x%08x\n", 
+        (unsigned)&cap_regs->REGISTERS.CAPABILITY_REGISTERS.CAPLENGTH_HCIVER,
+        (unsigned)USB_32BIT_LE(cap_regs->REGISTERS.CAPABILITY_REGISTERS.CAPLENGTH_HCIVER));
+
+    USB_printf("DCI_VERSION      (0x%08x) = 0x%08x\n", 
+        (unsigned)&cap_regs->REGISTERS.CAPABILITY_REGISTERS.DCI_VERSION,
+        (unsigned)USB_32BIT_LE(cap_regs->REGISTERS.CAPABILITY_REGISTERS.DCI_VERSION));
+
+    USB_printf("DCC_PARAMS       (0x%08x) = 0x%08x\n", 
+        (unsigned)&cap_regs->REGISTERS.CAPABILITY_REGISTERS.DCC_PARAMS,
+        (unsigned)USB_32BIT_LE(cap_regs->REGISTERS.CAPABILITY_REGISTERS.DCC_PARAMS));
+
+    dev_regs = pUsbDev->DEV_PTR;
+    dev_num = pUsbDev->DEV_NUM;
+    USB_printf("\n\tUSB Device Operational Registers\n\n");
+
+    USB_printf("USB_CMD          (0x%08x) = 0x%08x\n", 
+        (unsigned)&dev_regs->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_CMD,
+        (unsigned)USB_32BIT_LE(dev_regs->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_CMD));
+
+    USB_printf("USB_STS          (0x%08x) = 0x%08x\n", 
+        (unsigned)&dev_regs->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_STS,
+        (unsigned)USB_32BIT_LE(dev_regs->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_STS));
+
+    USB_printf("USB_INTR         (0x%08x) = 0x%08x\n", 
+        (unsigned)&dev_regs->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_INTR,
+        (unsigned)USB_32BIT_LE(dev_regs->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_INTR));
+
+    USB_printf("USB_FRINDEX      (0x%08x) = 0x%08x\n", 
+        (unsigned)&dev_regs->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_FRINDEX,
+        (unsigned)USB_32BIT_LE(dev_regs->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_FRINDEX));
+
+    /* Skip CTRLDSSEGMENT register */
+    USB_printf("DEVICE_ADDR      (0x%08x) = 0x%08x\n", 
+        (unsigned)&dev_regs->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.DEVICE_ADDR,
+        (unsigned)USB_32BIT_LE(dev_regs->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.DEVICE_ADDR));
+
+    USB_printf("EP_LIST_ADDR     (0x%08x) = 0x%08x\n", 
+        (unsigned)&dev_regs->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.EP_LIST_ADDR,
+        (unsigned)USB_32BIT_LE(dev_regs->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.EP_LIST_ADDR));
+
+    /* Skip CONFIG_FLAG register */
+
+    /* Skip PORTSCX[0..15] registers*/
+    USB_printf("PORTSCX[0]       (0x%08x) = 0x%08x\n", 
+        (unsigned)&dev_regs->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.PORTSCX[0],
+        (unsigned)USB_32BIT_LE(dev_regs->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.PORTSCX[0]));
+
+    /* Skip OTGSC register */
+
+    USB_printf("USB_MODE         (0x%08x) = 0x%08x\n", 
+        (unsigned)&dev_regs->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_MODE,
+        (unsigned)USB_32BIT_LE(dev_regs->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.USB_MODE));
+
+    USB_printf("ENDPT_SETUP_STAT (0x%08x) = 0x%08x\n", 
+        (unsigned)&dev_regs->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPT_SETUP_STAT,
+        (unsigned)USB_32BIT_LE(dev_regs->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPT_SETUP_STAT));
+
+    USB_printf("ENDPTPRIME       (0x%08x) = 0x%08x\n", 
+        (unsigned)&dev_regs->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTPRIME,
+        (unsigned)USB_32BIT_LE(dev_regs->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTPRIME));
+
+    USB_printf("ENDPTFLUSH       (0x%08x) = 0x%08x\n", 
+        (unsigned)&dev_regs->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTFLUSH,
+        (unsigned)USB_32BIT_LE(dev_regs->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTFLUSH));
+
+    USB_printf("ENDPTSTATUS      (0x%08x) = 0x%08x\n", 
+        (unsigned)&dev_regs->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTSTATUS,
+        (unsigned)USB_32BIT_LE(dev_regs->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTSTATUS));
+
+    USB_printf("ENDPTCOMPLETE    (0x%08x) = 0x%08x\n", 
+        (unsigned)&dev_regs->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTCOMPLETE,
+        (unsigned)USB_32BIT_LE(dev_regs->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTCOMPLETE));
+}
+
+    
+void _usb_ep_status(void* usbHandle, int ep_num, int direction)
+{
+    USB_DEV_STATE_STRUCT*               pUsbDev = (USB_DEV_STATE_STRUCT*)usbHandle;
+    int                                 i, ep_idx;
+    VUSB20_EP_QUEUE_HEAD_STRUCT_PTR     ep_queue_head_ptr;
+    VUSB20_EP_TR_STRUCT_PTR             dTD_ptr, head_dTD_ptr, tail_dTD_ptr, next_dTD_ptr;
+    XD_STRUCT_PTR                       xd_ptr, next_xd_ptr;
+    VUSB20_REG_STRUCT_PTR               dev_regs;
+
+    if(pUsbDev == NULL)
+    {
+        USB_printf("USB Device core is not initialized\n");
+        return;
+    }
+
+    USB_printf("\n\tUSB Endpoint #%d - %s status\n\n", ep_num,
+        (direction == ARC_USB_SEND) ? "SEND (IN)" : "RECV (OUT)" );
+
+    ep_idx = ep_num*2 + direction;
+    dev_regs = pUsbDev->DEV_PTR;
+
+    USB_printf("ENDPTCTRLX[%d]    (0x%08x) = 0x%08x\n", ep_num,
+        (unsigned)&dev_regs->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTCTRLX[ep_num],
+        (unsigned)USB_32BIT_LE(dev_regs->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTCTRLX[ep_num]));
+
+    ep_queue_head_ptr = (VUSB20_EP_QUEUE_HEAD_STRUCT_PTR)pUsbDev->EP_QUEUE_HEAD_PTR + ep_idx;
+
+    head_dTD_ptr = pUsbDev->EP_DTD_HEADS[ep_idx];
+    tail_dTD_ptr = pUsbDev->EP_DTD_TAILS[ep_idx];
+
+    USB_printf("EP_QH=0x%08x: MAX_PKT=0x%x, SIZE_IOC_INT_STS=0x%x, CURR_DTD=0x%x, NEXT_DTD=0x%x\n", 
+                (unsigned)ep_queue_head_ptr, (unsigned)USB_32BIT_LE(ep_queue_head_ptr->MAX_PKT_LENGTH), 
+                (unsigned)USB_32BIT_LE(ep_queue_head_ptr->SIZE_IOC_INT_STS), 
+                (unsigned)USB_32BIT_LE(ep_queue_head_ptr->CURR_DTD_PTR), 
+                (unsigned)USB_32BIT_LE(ep_queue_head_ptr->NEXT_DTD_PTR));
+
+    USB_printf("\tBUF_0=0x%08x, BUF_1=0x%08x, BUF_2=0x%08x, BUF_3=0x%08x, BUF_4=0x%08x\n",
+                (unsigned)USB_32BIT_LE(ep_queue_head_ptr->BUFF_PTR0), 
+                (unsigned)USB_32BIT_LE(ep_queue_head_ptr->BUFF_PTR1), 
+                (unsigned)USB_32BIT_LE(ep_queue_head_ptr->BUFF_PTR2), 
+                (unsigned)USB_32BIT_LE(ep_queue_head_ptr->BUFF_PTR3), 
+                (unsigned)USB_32BIT_LE(ep_queue_head_ptr->BUFF_PTR4));
+    
+    USB_printf("\tSETUP_BUFFER (%p): ", ep_queue_head_ptr->SETUP_BUFFER);
+    for(i=0; i<sizeof(ep_queue_head_ptr->SETUP_BUFFER); i++)
+        USB_printf("%02x", ep_queue_head_ptr->SETUP_BUFFER[i] & 0xFF);
+    USB_printf("\n");
+
+    USB_printf("\ndTD_HEAD=0x%08x, dTD_TAIL=0x%08x\n", 
+                (unsigned)head_dTD_ptr, (unsigned)tail_dTD_ptr);
+
+    dTD_ptr = head_dTD_ptr;
+    i = 0;
+    while(dTD_ptr != NULL)
+    {
+        USB_printf("%d. dTD=0x%08x (0x%08x), SIZE_IOC_STS=0x%08x, BUF_0=0x%08x, NEXT=0x%08x\n", 
+                    i, (unsigned)dTD_ptr, USB_DTD_VIRT_TO_PHYS(pUsbDev, dTD_ptr),
+                    (unsigned)USB_32BIT_LE(dTD_ptr->SIZE_IOC_STS), 
+                    (unsigned)USB_32BIT_LE(dTD_ptr->BUFF_PTR0), 
+                    (unsigned)USB_32BIT_LE(dTD_ptr->NEXT_TR_ELEM_PTR));
+
+        xd_ptr = dTD_ptr->SCRATCH_PTR->XD_FOR_THIS_DTD;
+
+        next_dTD_ptr = (VUSB20_EP_TR_STRUCT_PTR)USB_DTD_PHYS_TO_VIRT(pUsbDev, 
+                           (uint_32)(USB_32BIT_LE(dTD_ptr->NEXT_TR_ELEM_PTR) & VUSBHS_TD_ADDR_MASK));
+        if(next_dTD_ptr != NULL) 
+            next_xd_ptr = next_dTD_ptr->SCRATCH_PTR->XD_FOR_THIS_DTD;
+        else
+            next_xd_ptr = NULL;
+
+        if(next_xd_ptr != xd_ptr)
+        {
+            USB_printf("\tXD=0x%08x, ADDR=0x%08x, SIZE=%u, STATUS=0x%02x\n",
+                (unsigned)xd_ptr, (unsigned)xd_ptr->WSTARTADDRESS, 
+                (unsigned)xd_ptr->WTOTALLENGTH, xd_ptr->BSTATUS);
+        }
+        i++;
+        dTD_ptr = next_dTD_ptr;
+    }
+}
+
+
+/* DEBUG */
+uint_32 usbDebugFlags = ARC_DEBUG_FLAG_STATS
+                      | ARC_DEBUG_FLAG_INIT 
+                      | ARC_DEBUG_FLAG_ERROR 
+                      | ARC_DEBUG_FLAG_STALL
+                      | ARC_DEBUG_FLAG_RESET;
+                      /*| ARC_DEBUG_FLAG_TRANSFER;*/
+
+void    _usb_debug_set_flags(uint_32 flags)     
+{
+    usbDebugFlags = (flags);                        
+}
+
+uint_32 _usb_debug_get_flags(void)     
+{
+    return usbDebugFlags;  
+}
+
+#if defined(MV_USB_TRACE_LOG)
+
+uint_16 DEBUG_TRACE_ARRAY_COUNTER = 0;
+char    DEBUG_TRACE_ARRAY[TRACE_ARRAY_SIZE][MAX_STRING_SIZE];
+
+void  _usb_debug_init_trace_log(void)                   
+{                                                  
+    USB_memzero(DEBUG_TRACE_ARRAY, TRACE_ARRAY_SIZE*MAX_STRING_SIZE);
+	DEBUG_TRACE_ARRAY_COUNTER =0;                  
+}                               
+
+void    _usb_debug_print_trace_log(void)                     
+{                                                       
+    int     i;                                          
+                                                        
+    USB_printf("USB Trace log: start=0x%x, end=0x%x, idx=%d, flags=0x%x\n\n", 
+               &DEBUG_TRACE_ARRAY[0][0], &DEBUG_TRACE_ARRAY[TRACE_ARRAY_SIZE-1][0], 
+               DEBUG_TRACE_ARRAY_COUNTER, usbDebugFlags);      
+
+    for(i=DEBUG_TRACE_ARRAY_COUNTER; i<TRACE_ARRAY_SIZE; i++)                      
+    {                                                 
+        if(DEBUG_TRACE_ARRAY[i][0] == '\0')              
+            continue;                     
+        
+        USB_printf("%3d. %s", i, DEBUG_TRACE_ARRAY[i]);
+    }                                                 
+    for(i=0; i<DEBUG_TRACE_ARRAY_COUNTER; i++)       
+    {                                                 
+        if(DEBUG_TRACE_ARRAY[i][0] == '\0')           
+            continue;                                 
+        USB_printf("%3d. %s", i, DEBUG_TRACE_ARRAY[i]);
+    }                          
+    _usb_debug_init_trace_log();
+}
+#else
+void  _usb_debug_init_trace_log(void)                   
+{
+}
+
+void    _usb_debug_print_trace_log(void)
+{
+    USB_printf("USB trace log is not supported\n");
+}
+#endif /* MV_USB_TRACE_LOG */
+
+
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/device/mvUsbDevMain.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/device/mvUsbDevMain.c
@@ -0,0 +1,768 @@
+/*******************************************************************************
+
+This software file (the "File") is distributed by Marvell International Ltd. 
+or its affiliate(s) under the terms of the GNU General Public License Version 2, 
+June 1991 (the "License").  You may use, redistribute and/or modify this File 
+in accordance with the terms and conditions of the License, a copy of which 
+is available along with the File in the license.txt file or by writing to the 
+Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 
+or on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+(C) Copyright 2004 - 2007 Marvell Semiconductor Israel Ltd. All Rights Reserved.
+(C) Copyright 1999 - 2004 Chipidea Microelectronica, S.A. All Rights Reserved.
+
+*******************************************************************************/
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "mvUsbDevApi.h"
+#include "mvUsbDevPrv.h"
+
+USB_IMPORT_FUNCS*           global_import_funcs = NULL;
+
+#ifdef USB_UNDERRUN_WA
+USB_WA_FUNCS*               global_wa_funcs = NULL;
+int                         global_wa_threshold = 64;
+int                         global_wa_sram_parts = 2;
+#endif /* USB_UNDERRUN_WA */
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_device_cleanup
+*  Returned Value : void
+*  Comments       :
+*        Cleanup allocated structures.
+*
+*END*-----------------------------------------------------------------*/
+
+static void    _usb_device_cleanup(USB_DEV_STATE_STRUCT_PTR usb_dev_ptr)
+{
+    /* Free all internal transfer descriptors */
+    if(usb_dev_ptr->XD_BASE != NULL)
+    {
+        USB_memfree((pointer)usb_dev_ptr->XD_BASE);
+    }
+   
+    /* Free all XD scratch memory */
+    if(usb_dev_ptr->XD_SCRATCH_STRUCT_BASE != NULL)
+    {
+        USB_memfree((pointer)usb_dev_ptr->XD_SCRATCH_STRUCT_BASE);
+    }
+    /* Free the temp ep init XD */
+    if(usb_dev_ptr->TEMP_XD_PTR != NULL)
+    {
+        USB_memfree((pointer)usb_dev_ptr->TEMP_XD_PTR);
+    }
+
+    if(usb_dev_ptr->STATUS_UNAIGNED_PTR != NULL)
+        USB_memfree((pointer)usb_dev_ptr->STATUS_UNAIGNED_PTR);
+
+    if(usb_dev_ptr->TEST_PKT_UNAIGNED_PTR != NULL)
+        USB_memfree((pointer)usb_dev_ptr->TEST_PKT_UNAIGNED_PTR);
+
+    /* Free the USB state structure */
+    USB_memfree((pointer)usb_dev_ptr);
+}
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_device_free_XD
+*  Returned Value : void
+*  Comments       :
+*        Enqueues a XD onto the free XD ring.
+*
+*END*-----------------------------------------------------------------*/
+
+void _usb_device_free_XD
+   (
+      /* [IN] the dTD to enqueue */
+      pointer  xd_ptr
+   )
+{ /* Body */
+    int                         lockKey;
+    USB_DEV_STATE_STRUCT_PTR    usb_dev_ptr;
+  
+    usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)(((XD_STRUCT_PTR)xd_ptr)->SCRATCH_PTR->PRIVATE);
+
+    ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_TRACE, "free_XD: xd_ptr=0x%x\n", (unsigned)xd_ptr);
+
+    ARC_DEBUG_CODE(ARC_DEBUG_FLAG_STATS, (usb_dev_ptr->STATS.free_XD_count++));
+
+   /*
+   ** This function can be called from any context, and it needs mutual
+   ** exclusion with itself.
+   */
+
+   lockKey = USB_lock();
+
+   /*
+   ** Add the XD to the free XD queue (linked via PRIVATE) and
+   ** increment the tail to the next descriptor
+   */
+   USB_XD_QADD(usb_dev_ptr->XD_HEAD, usb_dev_ptr->XD_TAIL, (XD_STRUCT_PTR)xd_ptr);
+   usb_dev_ptr->XD_ENTRIES++;
+
+   USB_unlock(lockKey);
+
+} /* Endbody */
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_device_set_bsp_funcs
+*  Returned Value : NONE
+*  Comments       :
+*        Set pointer to structure of imported BSP functions
+*
+*END*-----------------------------------------------------------------*/
+void _usb_device_set_bsp_funcs(USB_IMPORT_FUNCS* pBspFuncs)
+{
+    static  boolean isFirst = TRUE;
+    
+    if(isFirst)
+    {
+        global_import_funcs = pBspFuncs;
+       _usb_debug_init_trace_log();
+       isFirst = FALSE;
+    }
+}
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_device_get_max_endpoint
+*  Returned Value : handle or NULL
+*  Comments       :
+*        Return maximum number of endpoints supportedby USB device 
+*        (for DEBUG only)
+*
+*END*-----------------------------------------------------------------*/
+uint_8 _usb_device_get_max_endpoint(_usb_device_handle handle)
+{
+    USB_DEV_STATE_STRUCT_PTR     usb_dev_ptr;
+
+    usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+
+    return usb_dev_ptr->MAX_ENDPOINTS;
+}
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_device_get_dev_num
+*  Returned Value : handle or NULL
+*  Comments       :
+*        Return unique USB device number
+*        (for DEBUG only)
+*
+*END*-----------------------------------------------------------------*/
+uint_8  _usb_device_get_dev_num(_usb_device_handle handle)
+{
+    USB_DEV_STATE_STRUCT_PTR     usb_dev_ptr;
+
+    usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+
+    return usb_dev_ptr->DEV_NUM;
+}
+
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_device_init
+*  Returned Value : USB_OK or error code
+*  Comments       :
+*        Initializes the USB device specific data structures and calls 
+*  the low-level device controller chip initialization routine.
+*
+*END*-----------------------------------------------------------------*/
+uint_8 _usb_device_init
+   (
+      /* [IN] the USB device controller to initialize */
+      uint_8                    devnum,
+
+      /* [OUT] the USB_USB_dev_initialize state structure */
+      _usb_device_handle*       handle
+   )
+{ /* Body */
+   USB_DEV_STATE_STRUCT_PTR         usb_dev_ptr;
+   XD_STRUCT_PTR                    xd_ptr;
+   uint_8                           i, error;
+   SCRATCH_STRUCT_PTR               temp_scratch_ptr;
+
+   /* global_import_funcs must be initailized before */
+   if(global_import_funcs == NULL)
+       return USBERR_INIT_FAILED;
+
+   if (devnum > MAX_USB_DEVICES)
+   {
+        USB_printf("_usb_device_init, error invalid device number");
+        return USBERR_INVALID_DEVICE_NUM;
+   } /* Endif */
+   
+   /* Allocate memory for the state structure */
+   usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)USB_memalloc(sizeof(USB_DEV_STATE_STRUCT));      
+   if (usb_dev_ptr == NULL) 
+   {
+        USB_printf("_usb_device_init, malloc of %d bytes for USB_DEV_STATE_STRUCT failed\n", 
+                    sizeof(USB_DEV_STATE_STRUCT));
+        return USBERR_ALLOC_STATE;
+   } /* Endif */
+   
+   /* Zero out the internal USB state structure */
+   USB_memzero(usb_dev_ptr, sizeof(USB_DEV_STATE_STRUCT));
+    
+   usb_dev_ptr->DEV_NUM = devnum;
+
+   /* Multiple devices will have different base addresses and 
+   ** interrupt vectors (For future)
+   */   
+   usb_dev_ptr->USB_STATE = ARC_USB_STATE_UNKNOWN;
+   
+   /* Allocate MAX_XDS_FOR_TR_CALLS */
+   xd_ptr = (XD_STRUCT_PTR)USB_memalloc(sizeof(XD_STRUCT) * MAX_XDS_FOR_TR_CALLS);      
+   if (xd_ptr == NULL) 
+   {
+        _usb_device_cleanup(usb_dev_ptr);
+        USB_printf("_usb_device_init, malloc of %d bytes for %d XD_STRUCT failed\n", 
+                        sizeof(XD_STRUCT) * MAX_XDS_FOR_TR_CALLS, MAX_XDS_FOR_TR_CALLS);
+        return USBERR_ALLOC_TR;
+   } /* Endif */
+   
+   usb_dev_ptr->XD_BASE = xd_ptr;
+
+   _usb_clear_stats(usb_dev_ptr);
+
+   USB_memzero(xd_ptr, sizeof(XD_STRUCT) * MAX_XDS_FOR_TR_CALLS);
+
+   /* Allocate memory for internal scratch structure */   
+   usb_dev_ptr->XD_SCRATCH_STRUCT_BASE = (SCRATCH_STRUCT_PTR)
+                    USB_memalloc(sizeof(SCRATCH_STRUCT) * MAX_XDS_FOR_TR_CALLS);
+   if (usb_dev_ptr->XD_SCRATCH_STRUCT_BASE == NULL) 
+   {
+        _usb_device_cleanup(usb_dev_ptr);
+        USB_printf("_usb_device_init, malloc of %d bytes for %d XD_STRUCT failed\n", 
+                        sizeof(SCRATCH_STRUCT) * MAX_XDS_FOR_TR_CALLS, MAX_XDS_FOR_TR_CALLS);
+        return USBERR_ALLOC;
+   } /* Endif */
+
+   temp_scratch_ptr = usb_dev_ptr->XD_SCRATCH_STRUCT_BASE;
+   usb_dev_ptr->XD_HEAD = NULL;
+   usb_dev_ptr->XD_TAIL = NULL;
+   usb_dev_ptr->XD_ENTRIES = 0;
+
+   /* Enqueue all the XDs */   
+   for (i=0;i<MAX_XDS_FOR_TR_CALLS;i++) 
+   {
+      xd_ptr->SCRATCH_PTR = temp_scratch_ptr;
+      xd_ptr->SCRATCH_PTR->FREE = _usb_device_free_XD;
+      xd_ptr->SCRATCH_PTR->PRIVATE = (pointer)usb_dev_ptr;
+      _usb_device_free_XD((pointer)xd_ptr);
+      xd_ptr++;
+      temp_scratch_ptr++;
+   } /* Endfor */
+
+   usb_dev_ptr->TEMP_XD_PTR = (XD_STRUCT_PTR)USB_memalloc(sizeof(XD_STRUCT));
+   if(usb_dev_ptr->TEMP_XD_PTR == NULL)
+   {
+        USB_printf("_usb_device_init, malloc of %d bytes for TEMP_XD_STRUCT failed\n", 
+                        sizeof(XD_STRUCT));
+        _usb_device_cleanup(usb_dev_ptr);
+        return USBERR_ALLOC;
+   }
+   USB_memzero(usb_dev_ptr->TEMP_XD_PTR, sizeof(XD_STRUCT));
+
+   /* Allocate 2 bytes for USB_STATUS to be sent over USB, so Cache line aligned */
+   usb_dev_ptr->STATUS_UNAIGNED_PTR = (uint_8*)USB_memalloc(sizeof(uint_16) + PSP_CACHE_LINE_SIZE);
+   if(usb_dev_ptr->STATUS_UNAIGNED_PTR == NULL)
+   {
+        USB_printf("_usb_device_init, malloc of %d bytes for USB_STATUS failed\n", 
+                        sizeof(uint_16) + PSP_CACHE_LINE_SIZE);
+        _usb_device_cleanup(usb_dev_ptr);
+        return USBERR_ALLOC;
+   }
+   USB_memzero(usb_dev_ptr->STATUS_UNAIGNED_PTR, sizeof(uint_16) + PSP_CACHE_LINE_SIZE);
+   usb_dev_ptr->STATUS_PTR = (uint_16*)USB_CACHE_ALIGN((uint_32)usb_dev_ptr->STATUS_UNAIGNED_PTR);
+
+   /* Allocate 53 bytes for USB Test packet to be sent over USB, so Cache line aligned */
+   usb_dev_ptr->TEST_PKT_UNAIGNED_PTR = (uint_8*)USB_memalloc(USB_TEST_MODE_TEST_PACKET_LENGTH + PSP_CACHE_LINE_SIZE);
+   if(usb_dev_ptr->TEST_PKT_UNAIGNED_PTR == NULL)
+   {
+        USB_printf("_usb_device_init, malloc of %d bytes for USB Test packet failed\n", 
+                        USB_TEST_MODE_TEST_PACKET_LENGTH + PSP_CACHE_LINE_SIZE);
+        _usb_device_cleanup(usb_dev_ptr);
+        return USBERR_ALLOC;
+   }
+   USB_memzero(usb_dev_ptr->TEST_PKT_UNAIGNED_PTR, USB_TEST_MODE_TEST_PACKET_LENGTH + PSP_CACHE_LINE_SIZE);
+   usb_dev_ptr->TEST_PKT_PTR = (uint_8*)USB_CACHE_ALIGN((uint_32)usb_dev_ptr->TEST_PKT_UNAIGNED_PTR);
+
+   /* Initialize the USB controller chip */
+   error = _usb_dci_vusb20_init(devnum, usb_dev_ptr);
+   if (error) 
+   {
+        _usb_device_cleanup(usb_dev_ptr);
+        USB_printf("_usb_device_init, init failed");
+        return USBERR_INIT_FAILED;
+   } /* Endif */
+
+   USB_printf("device_init: pDev=0x%x, pXD(%d)=0x%x, pSCRATCH(%d)=0x%x, pTempXD=0x%x\n",
+                (unsigned)usb_dev_ptr, MAX_XDS_FOR_TR_CALLS, (unsigned)usb_dev_ptr->XD_BASE,
+                MAX_XDS_FOR_TR_CALLS, (unsigned)usb_dev_ptr->XD_SCRATCH_STRUCT_BASE,
+                (unsigned)usb_dev_ptr->TEMP_XD_PTR);
+
+   *handle = usb_dev_ptr;
+   return USB_OK;   
+} /* EndBody */
+
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_device_shutdown
+*  Returned Value : USB_OK or error code
+*  Comments       :
+*        Shutdown an initialized USB device
+*
+*END*-----------------------------------------------------------------*/
+void _usb_device_shutdown(_usb_device_handle handle)
+{ /* Body */
+    USB_DEV_STATE_STRUCT_PTR     usb_dev_ptr;
+    SERVICE_STRUCT_PTR           service_ptr;
+    int                          ep;
+
+    ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_CTRL, "shutdown\n");
+   
+    usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+
+    for(ep=0; ep<(usb_dev_ptr->MAX_ENDPOINTS); ep++)
+    {
+        /* Cancel all transfers on all endpoints */
+        while(_usb_device_get_transfer_status(handle, ep, ARC_USB_RECV) != 
+                                                    ARC_USB_STATUS_IDLE)
+        {
+            _usb_device_cancel_transfer(handle, ep, ARC_USB_RECV);
+        }
+        while(_usb_device_get_transfer_status(handle, ep, ARC_USB_SEND) != 
+                                                    ARC_USB_STATUS_IDLE)
+        {
+            _usb_device_cancel_transfer(handle, ep, ARC_USB_SEND);
+        }
+    }
+    _usb_dci_vusb20_shutdown(usb_dev_ptr);
+   
+    /* Free all the Callback function structure memory */
+    for( service_ptr = usb_dev_ptr->SERVICE_HEAD_PTR; service_ptr;
+         service_ptr = service_ptr->NEXT) 
+    {
+        USB_printf("_usb_device_shutdown: free service_ptr = 0x%x\n", 
+                            service_ptr);
+        USB_memfree(service_ptr);
+    }
+    usb_dev_ptr->SERVICE_HEAD_PTR = NULL;
+
+    _usb_device_cleanup(usb_dev_ptr);
+} /* EndBody */
+
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : _usb_device_register_service
+* Returned Value : USB_OK or error code
+* Comments       :
+*     Registers a callback routine for a specified event or endpoint.
+* 
+*END*--------------------------------------------------------------------*/
+uint_8 _usb_device_register_service
+   (
+      /* [IN] Handle to the USB device */
+      _usb_device_handle         handle,
+      
+      /* [IN] type of event or endpoint number to service */
+      uint_8                     type,
+      
+      /* [IN] Pointer to the service's callback function */
+      void(_CODE_PTR_ service)(pointer, uint_8, boolean, uint_8, uint_8_ptr, uint_32, uint_8)
+   )
+{ /* Body */
+   USB_DEV_STATE_STRUCT_PTR   usb_dev_ptr;
+   SERVICE_STRUCT_PTR         service_ptr;
+   SERVICE_STRUCT_PTR _PTR_   search_ptr;
+   int                        lockKey;
+ 
+   usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+   /* Needs mutual exclusion */
+   lockKey = USB_lock();
+   
+   /* Search for an existing entry for type */
+   for (search_ptr = &usb_dev_ptr->SERVICE_HEAD_PTR;
+      *search_ptr;
+      search_ptr = &(*search_ptr)->NEXT) 
+   {
+      if ((*search_ptr)->TYPE == type) 
+      {
+         /* Found an existing entry */
+         USB_unlock(lockKey);
+         USB_printf("_usb_device_register_service, service %d already opened\n");
+         return USBERR_OPEN_SERVICE;
+      } /* Endif */
+   } /* Endfor */
+   
+   /* No existing entry found - create a new one */
+   service_ptr = (SERVICE_STRUCT_PTR)USB_memalloc(sizeof(SERVICE_STRUCT));
+   if (!service_ptr) 
+   {
+      USB_unlock(lockKey);
+      USB_printf("_usb_device_register_service, malloc for %d bytes failed\n", 
+                    sizeof(SERVICE_STRUCT));
+      return USBERR_ALLOC;
+   } /* Endif */
+
+   service_ptr->TYPE = type;
+   service_ptr->SERVICE = service;
+   service_ptr->NEXT = NULL;
+   *search_ptr = service_ptr;
+   
+   USB_unlock(lockKey);
+
+   return USB_OK;
+} /* EndBody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : _usb_device_unregister_service
+* Returned Value : USB_OK or error code
+* Comments       :
+*     Unregisters a callback routine for a specified event or endpoint.
+* 
+*END*--------------------------------------------------------------------*/
+uint_8 _usb_device_unregister_service
+   (
+      /* [IN] Handle to the USB device */
+      _usb_device_handle         handle,
+
+      /* [IN] type of event or endpoint number to service */
+      uint_8                     type
+   )
+{ /* Body */
+   USB_DEV_STATE_STRUCT_PTR   usb_dev_ptr;
+   SERVICE_STRUCT_PTR         service_ptr;
+   SERVICE_STRUCT_PTR _PTR_   search_ptr;
+   int                        lockKey;
+ 
+   usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+   /* Needs mutual exclusion */
+   lockKey = USB_lock();
+   
+   /* Search for an existing entry for type */
+   for (search_ptr = &usb_dev_ptr->SERVICE_HEAD_PTR;
+      *search_ptr;
+      search_ptr = &(*search_ptr)->NEXT) 
+   {
+      if ((*search_ptr)->TYPE == type) {
+         /* Found an existing entry - delete it */
+         break;
+      } /* Endif */
+   } /* Endfor */
+   
+   /* No existing entry found */
+   if (!*search_ptr) 
+   {
+      USB_unlock(lockKey);
+      USB_printf("_usb_device_unregister_service, no service found\n");
+      return USBERR_CLOSED_SERVICE;
+   } /* Endif */
+   
+   service_ptr = *search_ptr;
+   *search_ptr = service_ptr->NEXT;
+
+   USB_memfree((pointer)service_ptr);
+   
+   USB_unlock(lockKey);
+
+   return USB_OK;
+
+} /* EndBody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : _usb_device_call_service
+* Returned Value : USB_OK or error code
+* Comments       :
+*     Calls the appropriate service for the specified type, if one is
+*     registered. Used internally only.
+* 
+*END*--------------------------------------------------------------------*/
+uint_8 _usb_device_call_service
+   (
+      /* [IN] Handle to the USB device */
+      _usb_device_handle   handle,
+
+      /* [OUT] Type of service or endpoint */
+      uint_8               type,
+      
+      /* [OUT] Is it a Setup transfer? */
+      boolean              setup,
+      
+      /* [OUT] Direction of transmission; is it a Transmit? */
+      boolean              direction,
+
+      /* [OUT] Pointer to the data */
+      uint_8_ptr           buffer_ptr,
+      
+      /* [OUT] Number of bytes in transmission */
+      uint_32              length,
+
+      /* [OUT] Any errors */
+      uint_8               errors
+   )
+{ /* Body */
+   USB_DEV_STATE_STRUCT_PTR     usb_dev_ptr;
+   SERVICE_STRUCT _PTR_         service_ptr;
+   int                          lockKey;
+
+   usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+   /* Needs mutual exclusion */
+   lockKey = USB_lock();
+   
+   /* Search for an existing entry for type */
+   for (service_ptr = usb_dev_ptr->SERVICE_HEAD_PTR;
+        service_ptr;
+        service_ptr = service_ptr->NEXT) 
+   {
+      if (service_ptr->TYPE == type) 
+      {
+         service_ptr->SERVICE(handle, type, setup, direction, buffer_ptr, length, errors);
+         USB_unlock(lockKey);
+
+         return USB_OK;
+      } /* Endif */
+      
+   } /* Endfor */
+
+   USB_unlock(lockKey);
+
+   ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_CTRL, "_usb_device_call_service, service %d is closed\n", type);
+
+   return USBERR_CLOSED_SERVICE;
+} /* EndBody */
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_device_init_endpoint
+*  Returned Value : USB_OK or error code
+*  Comments       :
+*     Initializes the endpoint and the data structures associated with the 
+*  endpoint
+*
+*END*-----------------------------------------------------------------*/
+uint_8 _usb_device_init_endpoint
+   (
+      /* [IN] the USB_USB_dev_initialize state structure */
+      _usb_device_handle         handle,
+            
+      /* [IN] the Endpoint number */
+      uint_8                     ep_num,
+            
+      /* [IN] MAX Packet size for this endpoint */
+      uint_16                    max_pkt_size,
+            
+      /* [IN] Direction */
+      uint_8                     direction,
+            
+      /* [IN] Type of Endpoint */
+      uint_8                     type,
+            
+      /* [IN] After all data is transfered, should we terminate the transfer 
+      ** with a zero length packet if the last packet size == MAX_PACKET_SIZE? 
+      */
+      uint_8                     flag   
+   )
+{ /* Body */
+
+    int                         lockKey;
+    uint_8                      error = 0;
+    USB_DEV_STATE_STRUCT_PTR    usb_dev_ptr;
+   
+    usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+
+    /* Initialize the transfer descriptor */
+    usb_dev_ptr->TEMP_XD_PTR->EP_NUM = ep_num;
+    usb_dev_ptr->TEMP_XD_PTR->BDIRECTION = direction;
+    usb_dev_ptr->TEMP_XD_PTR->WMAXPACKETSIZE = max_pkt_size;
+    usb_dev_ptr->TEMP_XD_PTR->EP_TYPE = type;
+    usb_dev_ptr->TEMP_XD_PTR->DONT_ZERO_TERMINATE = flag;
+    usb_dev_ptr->TEMP_XD_PTR->MAX_PKTS_PER_UFRAME = 
+                    ((flag & ARC_USB_MAX_PKTS_PER_UFRAME) >> 1);
+
+    lockKey = USB_lock();
+    error = _usb_dci_vusb20_init_endpoint(handle, usb_dev_ptr->TEMP_XD_PTR);
+    USB_unlock(lockKey);
+   
+   return error;
+
+} /* EndBody */
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_device_deinit_endpoint
+*  Returned Value : USB_OK or error code
+*  Comments       :
+*  Disables the endpoint and the data structures associated with the 
+*  endpoint
+*
+*END*-----------------------------------------------------------------*/
+uint_8 _usb_device_deinit_endpoint
+   (
+      /* [IN] the USB_USB_dev_initialize state structure */
+      _usb_device_handle         handle,
+            
+      /* [IN] the Endpoint number */
+      uint_8                    ep_num,
+            
+      /* [IN] Direction */
+      uint_8                    direction
+   )
+{ /* Body */
+   int                          lockKey;
+   uint_8                       error = 0;
+   lockKey = USB_lock();
+
+   error = _usb_dci_vusb20_deinit_endpoint(handle, ep_num, direction);
+   
+   USB_unlock(lockKey);
+   
+   return error;
+} /* EndBody */
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_device_get_transfer_status
+*  Returned Value : Status of the transfer
+*  Comments       :
+*        returns the status of the transaction on the specified endpoint.
+*
+*END*-----------------------------------------------------------------*/
+uint_8 _usb_device_get_transfer_status
+   (
+      /* [IN] the USB_USB_dev_initialize state structure */
+      _usb_device_handle         handle,
+            
+      /* [IN] the Endpoint number */
+      uint_8                     ep_num,
+            
+      /* [IN] direction */
+      uint_8                     direction
+   )
+{ /* Body */
+   uint_8                       status;
+   int                          lockKey;
+
+   lockKey = USB_lock();
+
+   status = _usb_dci_vusb20_get_transfer_status(handle, ep_num, direction);
+
+   USB_unlock(lockKey);
+
+   /* Return the status of the last queued transfer */
+   return (status);
+
+} /* EndBody */
+
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_device_read_setup_data
+*  Returned Value : USB_OK or error code
+*  Comments       :
+*        Reads the setup data from the hardware
+*
+*END*-----------------------------------------------------------------*/
+void _usb_device_read_setup_data
+   (
+      /* [IN] the USB_USB_dev_initialize state structure */
+      _usb_device_handle         handle,
+            
+      /* [IN] the Endpoint number */
+      uint_8                     ep_num,
+            
+      /* [IN] buffer for receiving Setup packet */
+      uint_8_ptr                  buff_ptr
+   )
+{ /* Body */
+   int                           lockKey;
+ 
+   lockKey = USB_lock();
+
+   _usb_dci_vusb20_get_setup_data(handle, ep_num, buff_ptr);
+
+   USB_unlock(lockKey);
+
+} /* EndBody */
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_device_cancel_transfer
+*  Returned Value : USB_OK or error code
+*  Comments       :
+*        returns the status of the transaction on the specified endpoint.
+*
+*END*-----------------------------------------------------------------*/
+uint_8 _usb_device_cancel_transfer
+   (
+      /* [IN] the USB_USB_dev_initialize state structure */
+      _usb_device_handle         handle,
+            
+      /* [IN] the Endpoint number */
+      uint_8                     ep_num,
+            
+      /* [IN] direction */
+      uint_8                     direction
+   )
+{ /* Body */
+   uint_8                        error = USB_OK;
+   int                           lockKey;
+   
+   lockKey = USB_lock();
+
+   /* Cancel transfer on the specified endpoint for the specified 
+   ** direction 
+   */
+   error = _usb_dci_vusb20_cancel_transfer(handle, ep_num, direction);
+
+   USB_unlock(lockKey);
+
+   return error;
+} /* EndBody */
+
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_device_stop
+*  Returned Value : None
+*  Comments       :
+*        Stop USB device
+*
+*END*-----------------------------------------------------------------*/
+void _usb_device_stop(_usb_device_handle handle)
+{
+    int         lockKey;
+
+    lockKey = USB_lock();
+    _usb_dci_vusb20_stop(handle);
+    USB_unlock(lockKey);
+}
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_device_start
+*  Returned Value : None
+*  Comments       :
+*        Start USB device
+*
+*END*-----------------------------------------------------------------*/
+void _usb_device_start(_usb_device_handle handle)
+{
+    int         lockKey;
+
+    lockKey = USB_lock();
+    _usb_dci_vusb20_start(handle);
+    USB_unlock(lockKey);
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/device/mvUsbDevRecv.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/device/mvUsbDevRecv.c
@@ -0,0 +1,99 @@
+/*******************************************************************************
+
+This software file (the "File") is distributed by Marvell International Ltd. 
+or its affiliate(s) under the terms of the GNU General Public License Version 2, 
+June 1991 (the "License").  You may use, redistribute and/or modify this File 
+in accordance with the terms and conditions of the License, a copy of which 
+is available along with the File in the license.txt file or by writing to the 
+Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 
+or on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+(C) Copyright 2004 - 2007 Marvell Semiconductor Israel Ltd. All Rights Reserved.
+(C) Copyright 1999 - 2004 Chipidea Microelectronica, S.A. All Rights Reserved.
+
+*******************************************************************************/
+
+#include "mvUsbDevApi.h"
+#include "mvUsbDevPrv.h"
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_device_recv_data
+*  Returned Value : USB_OK or error code
+*  Comments       :
+*        Receives data on a specified endpoint.
+*
+*END*-----------------------------------------------------------------*/
+uint_8 _usb_device_recv_data
+   (
+      /* [IN] the USB_USB_dev_initialize state structure */
+      _usb_device_handle         handle,
+            
+      /* [IN] the Endpoint number */
+      uint_8                     ep_num,
+            
+      /* [IN] buffer to receive data */
+      uint_8_ptr                 buff_ptr,
+            
+      /* [IN] length of the transfer */
+      uint_32                    size
+   )
+{ /* Body */
+    int                              lockKey;
+    uint_8                           error = USB_OK;
+    XD_STRUCT_PTR                    xd_ptr;
+    USB_DEV_STATE_STRUCT_PTR         usb_dev_ptr;
+   
+    usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+
+    ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_RX, "recv_data: ep=%d, buf_ptr=0x%x, size=%d\n",
+                                       ep_num, (unsigned)buff_ptr, (int)size);
+
+    ARC_DEBUG_CODE(ARC_DEBUG_FLAG_STATS, (usb_dev_ptr->STATS.usb_recv_count++));
+
+    if(buff_ptr != NULL)
+        USB_dcache_inv((pointer)buff_ptr,size);   
+    
+    lockKey = USB_lock();
+
+    if (!usb_dev_ptr->XD_ENTRIES) 
+    {
+        USB_unlock(lockKey);
+        USB_printf("_usb_device_recv_data, transfer in progress\n");
+        return ARC_USB_STATUS_TRANSFER_IN_PROGRESS;
+    } /* Endif */
+
+    /* Get a transfer descriptor for the specified endpoint 
+    ** and direction 
+    */
+    USB_XD_QGET(usb_dev_ptr->XD_HEAD, usb_dev_ptr->XD_TAIL, xd_ptr);
+   
+    usb_dev_ptr->XD_ENTRIES--;
+
+    /* Initialize the new transfer descriptor */      
+    xd_ptr->EP_NUM = ep_num;
+    xd_ptr->BDIRECTION = ARC_USB_RECV;
+    xd_ptr->WTOTALLENGTH = size;
+    xd_ptr->WSOFAR = 0;
+    xd_ptr->WSTARTADDRESS = buff_ptr;
+   
+    xd_ptr->BSTATUS = ARC_USB_STATUS_TRANSFER_ACCEPTED;
+
+    error = _usb_dci_vusb20_add_dTD(handle, xd_ptr);
+
+    USB_unlock(lockKey);
+   
+    if (error) 
+    {
+        USB_printf("_usb_device_recv_data, receive failed\n");
+        return USBERR_RX_FAILED;
+    } /* Endif */
+
+    return error;
+
+} /* EndBody */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/device/mvUsbHsDevUtl.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/device/mvUsbHsDevUtl.c
@@ -0,0 +1,271 @@
+/*******************************************************************************
+
+This software file (the "File") is distributed by Marvell International Ltd. 
+or its affiliate(s) under the terms of the GNU General Public License Version 2, 
+June 1991 (the "License").  You may use, redistribute and/or modify this File 
+in accordance with the terms and conditions of the License, a copy of which 
+is available along with the File in the license.txt file or by writing to the 
+Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 
+or on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+(C) Copyright 2004 - 2007 Marvell Semiconductor Israel Ltd. All Rights Reserved.
+(C) Copyright 1999 - 2004 Chipidea Microelectronica, S.A. All Rights Reserved.
+
+*******************************************************************************/
+
+#include "mvUsbDevApi.h"
+#include "mvUsbDevPrv.h"
+#include "mvUsbDefs.h"
+
+/* Test packet for Test Mode : TEST_PACKET. USB 2.0 Specification section 7.1.20 */
+uint_8 test_packet[USB_TEST_MODE_TEST_PACKET_LENGTH] = 
+{
+   /* Synch */
+   /* DATA 0 PID */
+   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+   0x00, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 
+   0xAA, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 
+   0xEE, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 
+   0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x7F, 0xBF, 0xDF, 
+   0xEF, 0xF7, 0xFB, 0xFD, 0xFC, 0x7E, 0xBF, 0xDF, 
+   0xEF, 0xF7, 0xFB, 0xFD, 0x7E
+};
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_dci_vusb20_assert_resume
+*  Returned Value : None
+*  Comments       :
+*        Resume signalling for remote wakeup
+*
+*END*-----------------------------------------------------------------*/
+void _usb_dci_vusb20_assert_resume
+   (
+      /* [IN] the USB_dev_initialize state structure */
+      _usb_device_handle         handle
+   )
+{ /* Body */
+   USB_DEV_STATE_STRUCT_PTR                     usb_dev_ptr;
+   VUSB20_REG_STRUCT_PTR             dev_ptr;
+   uint_32                                      temp;
+ 
+   usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+   dev_ptr = (VUSB20_REG_STRUCT_PTR)usb_dev_ptr->DEV_PTR;
+
+   /* Assert the Resume signal */   
+   temp = USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.PORTSCX[0]);
+   temp &= ~EHCI_PORTSCX_W1C_BITS;
+   temp |= EHCI_PORTSCX_PORT_FORCE_RESUME;
+   dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.PORTSCX[0] = USB_32BIT_LE(temp);
+   
+   /* Port change interrupt will be asserted at the end of resume 
+   ** operation 
+   */
+
+} /* EndBody */
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_dci_vusb20_stall_endpoint
+*  Returned Value : None
+*  Comments       :
+*        Stalls the specified endpoint
+*
+*END*-----------------------------------------------------------------*/
+void _usb_dci_vusb20_stall_endpoint
+   (
+      /* [IN] the USB_dev_initialize state structure */
+      _usb_device_handle         handle,
+            
+      /* [IN] the Endpoint number */
+      uint_8                     ep_num,
+            
+      /* [IN] direction */
+      uint_8                     direction
+   )
+{ /* Body */
+   USB_DEV_STATE_STRUCT_PTR             usb_dev_ptr;
+   VUSB20_REG_STRUCT_PTR                dev_ptr;
+   VUSB20_EP_QUEUE_HEAD_STRUCT _PTR_    ep_queue_head_ptr;
+      
+   usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+   dev_ptr = (VUSB20_REG_STRUCT_PTR)usb_dev_ptr->DEV_PTR;
+   
+   /* Get the endpoint queue head address */
+   ep_queue_head_ptr = (VUSB20_EP_QUEUE_HEAD_STRUCT_PTR)usb_dev_ptr->EP_QUEUE_HEAD_PTR + 
+                                                                    2*ep_num + direction;
+   /* Stall the endpoint for Rx or Tx and set the endpoint type */
+   if (ep_queue_head_ptr->MAX_PKT_LENGTH & USB_32BIT_LE(VUSB_EP_QUEUE_HEAD_IOS)) 
+   {
+      /* This is a control endpoint so STALL both directions */
+      dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTCTRLX[ep_num] |= 
+         USB_32BIT_LE((EHCI_EPCTRL_TX_EP_STALL | EHCI_EPCTRL_RX_EP_STALL));
+   } 
+   else 
+   {   
+       if(direction) 
+       {
+            dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTCTRLX[ep_num] |= 
+                        USB_32BIT_LE(EHCI_EPCTRL_TX_EP_STALL);
+       }
+       else {
+            dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTCTRLX[ep_num] |= 
+                        USB_32BIT_LE(EHCI_EPCTRL_RX_EP_STALL);
+       }
+   } /* Endif */
+
+   ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_STALL, 
+                    "STALL ep=%d %s: EPCTRLX=0x%x, CURR_dTD=0x%x, NEXT_dTD=0x%x, SIZE=0x%x\n", 
+                    ep_num, direction ? "SEND" : "RECV",
+                    (unsigned)USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTCTRLX[ep_num]),
+                    (unsigned)USB_32BIT_LE(ep_queue_head_ptr->CURR_DTD_PTR), 
+                    (unsigned)USB_32BIT_LE(ep_queue_head_ptr->NEXT_DTD_PTR),
+                    (unsigned)USB_32BIT_LE(ep_queue_head_ptr->SIZE_IOC_INT_STS));
+      
+} /* EndBody */
+
+/*FUNCTION*-------------------------------------------------------------
+*
+*  Function Name  : _usb_dci_vusb20_unstall_endpoint
+*  Returned Value : None
+*  Comments       :
+*        Unstall the specified endpoint in the specified direction
+*
+*END*-----------------------------------------------------------------*/
+void _usb_dci_vusb20_unstall_endpoint
+   (
+      /* [IN] the USB_dev_initialize state structure */
+      _usb_device_handle         handle,
+            
+      /* [IN] the Endpoint number */
+      uint_8                     ep_num,
+            
+      /* [IN] direction */
+      uint_8                     direction
+   )
+{ /* Body */
+   USB_DEV_STATE_STRUCT_PTR     usb_dev_ptr;
+   VUSB20_REG_STRUCT_PTR        dev_ptr;
+
+   usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+   dev_ptr = (VUSB20_REG_STRUCT_PTR)usb_dev_ptr->DEV_PTR;
+   
+   /* Enable the endpoint for Rx or Tx and set the endpoint type */
+   if(direction)
+   {
+        dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTCTRLX[ep_num] |= 
+              USB_32BIT_LE(EHCI_EPCTRL_TX_DATA_TOGGLE_RST);
+
+        dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTCTRLX[ep_num] &= 
+                ~(USB_32BIT_LE(EHCI_EPCTRL_TX_EP_STALL));
+   }
+   else
+   {
+        dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTCTRLX[ep_num] |= 
+              USB_32BIT_LE(EHCI_EPCTRL_RX_DATA_TOGGLE_RST);
+
+        dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTCTRLX[ep_num] &= 
+                ~(USB_32BIT_LE(EHCI_EPCTRL_RX_EP_STALL));
+   }     
+
+   ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_STALL, 
+                    "UNSTALL ep=%d %s: EPCTRLX=0x%x\n", 
+                    ep_num, direction ? "SEND" : "RECV",
+                    (unsigned)USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTCTRLX[ep_num]));
+
+
+} /* EndBody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : _usb_dci_vusb20_is_endpoint_stalled
+* Returned Value : None
+* Comments       :
+*     Gets the endpoint status
+* 
+*END*--------------------------------------------------------------------*/
+uint_8 _usb_dci_vusb20_is_endpoint_stalled
+   (
+      /* [IN] Handle to the USB device */
+      _usb_device_handle   handle,
+      
+      /* [IN] Endpoint number */
+      uint_8               ep,
+
+      /* [IN] Endpoint direction */
+      uint_8               dir
+   )
+{ /* Body */
+   USB_DEV_STATE_STRUCT_PTR     usb_dev_ptr;
+   VUSB20_REG_STRUCT_PTR        dev_ptr;
+   uint_32                      value;
+
+   ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_TRACE, "is_endpoint_stalled\n");
+   
+   usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+   dev_ptr = (VUSB20_REG_STRUCT_PTR)usb_dev_ptr->DEV_PTR;
+  
+   if(dir)
+   {
+        value = dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTCTRLX[ep] & 
+                                    (USB_32BIT_LE(EHCI_EPCTRL_TX_EP_STALL));
+   }
+   else
+   {
+        value = dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTCTRLX[ep] & 
+                                    (USB_32BIT_LE(EHCI_EPCTRL_RX_EP_STALL));
+   }
+   return (value) ? 1 : 0;
+} /* EndBody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : _usb_dci_vusb20_set_test_mode
+* Returned Value : None
+* Comments       :
+*     sets/resets the test mode
+* 
+*END*--------------------------------------------------------------------*/
+void _usb_dci_vusb20_set_test_mode
+   (
+      /* [IN] Handle to the USB device */
+      _usb_device_handle handle,
+      
+      /* [IN] Test mode */
+      uint_16 test_mode
+   )
+{ /* Body */
+   USB_DEV_STATE_STRUCT_PTR                     usb_dev_ptr;
+   VUSB20_REG_STRUCT_PTR                        dev_ptr;
+   uint_32                                      temp;
+
+   ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_ANY, "set_test_mode\n");
+   
+   usb_dev_ptr = (USB_DEV_STATE_STRUCT_PTR)handle;
+   dev_ptr = (VUSB20_REG_STRUCT_PTR)usb_dev_ptr->DEV_PTR;
+   
+   temp = USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTCTRLX[0]);
+   
+   dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.ENDPTCTRLX[0] = 
+                                USB_32BIT_LE((temp | EHCI_EPCTRL_TX_DATA_TOGGLE_RST));
+
+   if (test_mode == ARC_USB_TEST_MODE_TEST_PACKET) 
+   {
+       USB_memcopy(test_packet, usb_dev_ptr->TEST_PKT_PTR, USB_TEST_MODE_TEST_PACKET_LENGTH); 
+      _usb_device_send_data(handle, 0, usb_dev_ptr->TEST_PKT_PTR, USB_TEST_MODE_TEST_PACKET_LENGTH);
+
+   } /* Endif */
+   
+   temp = USB_32BIT_LE(dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.PORTSCX[0]);
+   temp &= ~EHCI_PORTSCX_W1C_BITS;
+   
+   dev_ptr->REGISTERS.OPERATIONAL_DEVICE_REGISTERS.PORTSCX[0] = 
+                                    USB_32BIT_LE(temp | ((uint_32)test_mode << 8));
+             
+} /* EndBody */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/device/mvUsbDevCh9.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/device/mvUsbDevCh9.c
@@ -0,0 +1,301 @@
+/*******************************************************************************
+
+This software file (the "File") is distributed by Marvell International Ltd. 
+or its affiliate(s) under the terms of the GNU General Public License Version 2, 
+June 1991 (the "License").  You may use, redistribute and/or modify this File 
+in accordance with the terms and conditions of the License, a copy of which 
+is available along with the File in the license.txt file or by writing to the 
+Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 
+or on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+(C) Copyright 2004 - 2007 Marvell Semiconductor Israel Ltd. All Rights Reserved.
+(C) Copyright 1999 - 2004 Chipidea Microelectronica, S.A. All Rights Reserved.
+
+*******************************************************************************/
+
+#include "mvUsbDevApi.h"
+#include "mvUsbDevPrv.h"
+#include "mvUsbCh9.h"
+
+static volatile boolean  ENTER_TEST_MODE = FALSE; 
+static volatile uint_16  test_mode_index = 0;
+
+
+void    mvUsbCh9GetStatus(_usb_device_handle handle, boolean setup, 
+                         SETUP_STRUCT* ctrl_req)
+{ /* Body */
+    uint_8                  endpoint, direction;
+    uint_16                 usb_status;
+    USB_DEV_STATE_STRUCT*   usb_dev_ptr = (USB_DEV_STATE_STRUCT*)handle; 
+
+    ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_SETUP, "%s: setup=%d\n", __FUNCTION__, (int)setup);
+
+    if(!setup)
+        return;
+
+    switch (ctrl_req->REQUESTTYPE) 
+    {
+       case (REQ_DIR_IN | REQ_RECIP_DEVICE):
+          /* Device request */
+          _usb_device_get_status(handle, ARC_USB_STATUS_DEVICE, &usb_status);
+          break;
+
+       case (REQ_DIR_IN | REQ_RECIP_INTERFACE):
+          /* Interface request */
+          _usb_device_get_status(handle, ARC_USB_STATUS_INTERFACE, &usb_status);
+          break;
+    
+       case (REQ_DIR_IN | REQ_RECIP_ENDPOINT):
+          /* Endpoint request */
+          endpoint = ctrl_req->INDEX & ARC_USB_STATUS_ENDPOINT_NUMBER_MASK;
+          if( (ctrl_req->INDEX & (1 << REQ_DIR_OFFSET)) == REQ_DIR_IN)
+            direction = ARC_USB_SEND;
+          else
+            direction = ARC_USB_RECV;
+
+          usb_status = _usb_device_is_endpoint_stalled(handle, endpoint, direction);
+          break;
+       
+       default:
+          /* Unknown request */
+           USB_printf("GetStatus: Unknown request type 0x%x\n", ctrl_req->REQUESTTYPE);
+          _usb_device_stall_endpoint(handle, 0, ARC_USB_RECV);
+          return;
+    } /* Endswitch */
+
+    /* Send the requested data */
+    *usb_dev_ptr->STATUS_PTR = USB_16BIT_LE(usb_status);
+    _usb_device_send_data(handle, 0, (uint_8_ptr)usb_dev_ptr->STATUS_PTR, sizeof(uint_16));
+    
+    /* status phase */
+    _usb_device_recv_data(handle, 0, NULL, 0);
+    
+    return;
+} /* Endbody */
+
+void    mvUsbCh9ClearFeature(_usb_device_handle handle, boolean setup, 
+                            SETUP_STRUCT* setup_ptr)
+{ /* Body */
+    uint_8   endpoint, direction;
+    uint_16  usb_status;
+     
+    ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_SETUP, "%s: setup=%d\n", __FUNCTION__, (int)setup);
+
+    _usb_device_get_status(handle, ARC_USB_STATUS_DEVICE_STATE, &usb_status);
+    if ((usb_status != ARC_USB_STATE_CONFIG) && (usb_status != ARC_USB_STATE_ADDRESS)) 
+    {
+        USB_printf("ClearFeature: Wrong USB state %d\n", usb_status);
+        _usb_device_stall_endpoint(handle, 0, ARC_USB_RECV);
+        return;
+    } /* Endif */
+
+    if(!setup)
+        return;
+
+    switch (setup_ptr->REQUESTTYPE) 
+    {
+        case (REQ_DIR_OUT | REQ_RECIP_DEVICE):
+            /* DEVICE */
+            switch(setup_ptr->VALUE)
+            {
+                case DEVICE_REMOTE_WAKEUP: 
+                    /* clear remote wakeup */
+                    _usb_device_get_status(handle, ARC_USB_STATUS_DEVICE, &usb_status);
+                    usb_status &= ~ARC_USB_REMOTE_WAKEUP;
+                    _usb_device_set_status(handle, ARC_USB_STATUS_DEVICE, usb_status);
+                    USB_printf("Clear REMOTE_WAKEUP feature\n");
+                    break;
+
+                case DEVICE_TEST_MODE:
+                    /* Exit Test Mode */
+                    _usb_device_set_status(handle, ARC_USB_STATUS_TEST_MODE, 0);
+                    break;
+
+                default:
+                    USB_printf("ClearFeature: Unknown Device feature %d\n", 
+                                setup_ptr->VALUE);
+                    _usb_device_stall_endpoint(handle, 0, ARC_USB_RECV);
+                    return;
+            } /* Endif */
+            break;
+         
+        case (REQ_DIR_OUT | REQ_RECIP_ENDPOINT):
+            /* ENDPOINT */
+            if (setup_ptr->VALUE != ENDPOINT_HALT) 
+            {
+                USB_printf("ClearFeature: Wrong Endpoint feature %d\n", 
+                            setup_ptr->VALUE);
+                _usb_device_stall_endpoint(handle, 0, ARC_USB_RECV);
+                return;
+            } /* Endif */
+
+            endpoint = setup_ptr->INDEX & ARC_USB_STATUS_ENDPOINT_NUMBER_MASK;
+            if( (setup_ptr->INDEX & (1 << REQ_DIR_OFFSET)) == REQ_DIR_IN)
+                direction = ARC_USB_SEND;
+            else
+                direction = ARC_USB_RECV;
+
+            _usb_device_unstall_endpoint(handle, endpoint, direction);
+            break;
+
+        default:
+            USB_printf("ClearFeature: Unknown REQUEST_TYPE %d\n", 
+                                setup_ptr->REQUESTTYPE);
+
+            _usb_device_stall_endpoint(handle, 0, ARC_USB_RECV);
+            return;
+    } /* Endswitch */
+      
+    /* status phase */
+    _usb_device_send_data(handle, 0, 0, 0);
+}
+
+void    mvUsbCh9SetFeature(_usb_device_handle handle, boolean setup, 
+                          SETUP_STRUCT* setup_ptr)
+{
+   uint_16                  usb_status;
+   uint_8                   endpoint, direction;
+   USB_DEV_STATE_STRUCT*    usb_dev_ptr = (USB_DEV_STATE_STRUCT*)handle; 
+
+   ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_SETUP, "%s: setup=%d\n", __FUNCTION__, (int)setup);
+
+   if (setup) 
+   {
+      switch (setup_ptr->REQUESTTYPE) 
+      {
+         case (REQ_DIR_OUT | REQ_RECIP_DEVICE):
+            /* DEVICE */
+            switch (setup_ptr->VALUE) 
+            {
+               case DEVICE_REMOTE_WAKEUP:
+                  /* set remote wakeup */
+                  _usb_device_get_status(handle, ARC_USB_STATUS_DEVICE, &usb_status);
+                  usb_status |= ARC_USB_REMOTE_WAKEUP;
+                  _usb_device_set_status(handle, ARC_USB_STATUS_DEVICE, usb_status);
+                  USB_printf("Set REMOTE_WAKEUP feature\n");
+                  break;
+
+               case DEVICE_TEST_MODE:
+                  /* Test Mode */
+                  if( (setup_ptr->INDEX & 0x00FF) || (usb_dev_ptr->SPEED != ARC_USB_SPEED_HIGH) ) 
+                  {
+                     USB_printf("SetFeature: Wrong Test mode parameters: mode=%d, speed=%d\n", 
+                                (setup_ptr->INDEX & 0x00FF), usb_dev_ptr->SPEED);
+                     _usb_device_stall_endpoint(handle, 0, ARC_USB_RECV);
+                     return;
+                  } /* Endif */
+
+                  _usb_device_get_status(handle, ARC_USB_STATUS_DEVICE_STATE, &usb_status);
+                  if( (usb_status == ARC_USB_STATE_CONFIG)  || 
+                      (usb_status == ARC_USB_STATE_ADDRESS) || 
+                      (usb_status == ARC_USB_STATE_DEFAULT)) 
+                  {
+                      /* wait with Set Test mode */
+                      ENTER_TEST_MODE = TRUE;
+                      test_mode_index = (setup_ptr->INDEX & 0xFF00);
+                      USB_printf("SetFeature: Prepare for Test mode 0x%x\n", test_mode_index);
+                  } 
+                  else 
+                  {
+                     USB_printf("SetFeature: Wrong USB state for Test mode: state=%d\n", 
+                                usb_status);
+                     _usb_device_stall_endpoint(handle, 0, ARC_USB_RECV);
+                     return;
+                  } /* Endif */
+                  break;
+
+               default:
+                    USB_printf("SetFeature: Unknown Device feature %d\n", 
+                                setup_ptr->VALUE);
+                  _usb_device_stall_endpoint(handle, 0, ARC_USB_RECV);
+                  return;
+            } /* Endswitch */
+            break;
+            
+         case (REQ_DIR_OUT | REQ_RECIP_ENDPOINT):
+            /* ENDPOINT */
+            if (setup_ptr->VALUE != ENDPOINT_HALT) 
+            {
+                USB_printf("SetFeature: Unknown Endpoint feature %d\n", 
+                            setup_ptr->VALUE);
+                _usb_device_stall_endpoint(handle, 0, ARC_USB_RECV);
+                return;
+            } /* Endif */
+
+            endpoint = setup_ptr->INDEX & ARC_USB_STATUS_ENDPOINT_NUMBER_MASK;
+            if( (setup_ptr->INDEX & (1 << REQ_DIR_OFFSET)) == REQ_DIR_IN)
+                direction = ARC_USB_SEND;
+            else
+                direction = ARC_USB_RECV;
+
+            _usb_device_stall_endpoint(handle, endpoint, direction);
+            break;
+
+         default:
+            USB_printf("SetFeature: Unknown REQUEST_TYPE %d\n", 
+                       setup_ptr->REQUESTTYPE);
+
+            _usb_device_stall_endpoint(handle, 0, ARC_USB_RECV);
+            return;
+      } /* Endswitch */
+      
+      /* status phase */
+      _usb_device_send_data(handle, 0, 0, 0);
+   } 
+   else 
+   {
+      if (ENTER_TEST_MODE) 
+      {
+         /* Enter Test Mode */
+          USB_printf("SetFeature: Activate Test mode 0x%x\n", test_mode_index);
+         _usb_device_set_status(handle, ARC_USB_STATUS_TEST_MODE, test_mode_index);
+      } /* Endif */
+   } /* Endif */
+}
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : ch9SetAddress
+* Returned Value : None
+* Comments       :
+*     Chapter 9 SetAddress command
+*     We setup a TX packet of 0 length ready for the IN token
+*     Once we get the TOK_DNE interrupt for the IN token, then
+*     we change the ADDR register and go to the ADDRESS state.
+* 
+*END*--------------------------------------------------------------------*/
+void    mvUsbCh9SetAddress(_usb_device_handle handle,
+                        boolean setup, SETUP_STRUCT* setup_ptr)
+{ /* Body */
+   static uint_8            new_address;
+
+   ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_ADDR, "usbDisk %s: setup=%d, address=%d\n", 
+                                    __FUNCTION__, (int)setup, setup_ptr->VALUE);
+
+   if (setup) 
+   {
+      new_address = setup_ptr->VALUE;
+      /*******************************************************
+       * if hardware assitance is enabled for set_address (see
+       * hardware rev for details) we need to do the set_address
+       * before queuing the status phase.
+       *******************************************************/
+#ifdef SET_ADDRESS_HARDWARE_ASSISTANCE      
+       _usb_device_set_status(handle, ARC_USB_STATUS_ADDRESS, new_address);
+#endif
+      /* ack */
+      _usb_device_send_data(handle, 0, 0, 0);
+   } 
+   else 
+   {
+#ifndef SET_ADDRESS_HARDWARE_ASSISTANCE
+      _usb_device_set_status(handle, ARC_USB_STATUS_ADDRESS, new_address);
+#endif
+      _usb_device_set_status(handle, ARC_USB_STATUS_DEVICE_STATE, ARC_USB_STATE_ADDRESS);        
+   }
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/api/mvUsbDefs.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/api/mvUsbDefs.h
@@ -0,0 +1,139 @@
+/*******************************************************************************
+
+This software file (the "File") is distributed by Marvell International Ltd. 
+or its affiliate(s) under the terms of the GNU General Public License Version 2, 
+June 1991 (the "License").  You may use, redistribute and/or modify this File 
+in accordance with the terms and conditions of the License, a copy of which 
+is available along with the File in the license.txt file or by writing to the 
+Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 
+or on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+(C) Copyright 2004 - 2007 Marvell Semiconductor Israel Ltd. All Rights Reserved.
+(C) Copyright 1999 - 2004 Chipidea Microelectronica, S.A. All Rights Reserved.
+
+*******************************************************************************/
+
+#ifndef __mvUsbDefs_h__
+#define __mvUsbDefs_h__
+
+#include "mvUsbTypes.h"
+
+/* Host specific */
+#define  USB_DEBOUNCE_DELAY                  (101)
+#define  USB_RESET_RECOVERY_DELAY            (11)
+#define  USB_RESET_DELAY                     (60)
+
+/* Error codes */
+#define  USB_OK                              (0x00)
+#define  USBERR_ALLOC                        (0x81)
+#define  USBERR_BAD_STATUS                   (0x82)
+#define  USBERR_CLOSED_SERVICE               (0x83)
+#define  USBERR_OPEN_SERVICE                 (0x84)
+#define  USBERR_TRANSFER_IN_PROGRESS         (0x85)
+#define  USBERR_ENDPOINT_STALLED             (0x86)
+#define  USBERR_ALLOC_STATE                  (0x87)
+#define  USBERR_DRIVER_INSTALL_FAILED        (0x88)
+#define  USBERR_DRIVER_NOT_INSTALLED         (0x89)
+#define  USBERR_INSTALL_ISR                  (0x8A)
+#define  USBERR_INVALID_DEVICE_NUM           (0x8B)
+#define  USBERR_ALLOC_SERVICE                (0x8C)
+#define  USBERR_INIT_FAILED                  (0x8D)
+#define  USBERR_SHUTDOWN                     (0x8E)
+#define  USBERR_INVALID_PIPE_HANDLE          (0x8F)
+#define  USBERR_OPEN_PIPE_FAILED             (0x90)
+#define  USBERR_INIT_DATA                    (0x91)
+#define  USBERR_SRP_REQ_INVALID_STATE        (0x92)
+#define  USBERR_TX_FAILED                    (0x93)
+#define  USBERR_RX_FAILED                    (0x94)
+#define  USBERR_EP_INIT_FAILED               (0x95)
+#define  USBERR_EP_DEINIT_FAILED             (0x96)
+#define  USBERR_TR_FAILED                    (0x97)
+#define  USBERR_BANDWIDTH_ALLOC_FAILED       (0x98)
+#define  USBERR_INVALID_NUM_OF_ENDPOINTS     (0x99)
+
+#define  USBERR_DEVICE_NOT_FOUND             (0xC0)
+#define  USBERR_DEVICE_BUSY                  (0xC1)
+#define  USBERR_NO_DEVICE_CLASS              (0xC3)
+#define  USBERR_UNKNOWN_ERROR                (0xC4)
+#define  USBERR_INVALID_BMREQ_TYPE           (0xC5)
+#define  USBERR_GET_MEMORY_FAILED            (0xC6)
+#define  USBERR_INVALID_MEM_TYPE             (0xC7)
+#define  USBERR_NO_DESCRIPTOR                (0xC8)
+#define  USBERR_NULL_CALLBACK                (0xC9)
+#define  USBERR_NO_INTERFACE                 (0xCA)
+#define  USBERR_INVALID_CFIG_NUM             (0xCB)
+#define  USBERR_INVALID_ANCHOR               (0xCC)
+#define  USBERR_INVALID_REQ_TYPE             (0xCD)
+
+/* Error Codes for lower-layer */
+#define  USBERR_ALLOC_EP_QUEUE_HEAD          (0xA8)
+#define  USBERR_ALLOC_TR                     (0xA9)
+#define  USBERR_ALLOC_DTD_BASE               (0xAA)
+#define  USBERR_CLASS_DRIVER_INSTALL         (0xAB)
+
+
+/* Pipe Types */
+#define  USB_ISOCHRONOUS_PIPE                (0x01)
+#define  USB_INTERRUPT_PIPE                  (0x02)
+#define  USB_CONTROL_PIPE                    (0x03)
+#define  USB_BULK_PIPE                       (0x04)
+
+#define  ARC_USB_STATE_UNKNOWN               (0xff)
+#define  ARC_USB_STATE_POWERED               (0x03)
+#define  ARC_USB_STATE_DEFAULT               (0x02)
+#define  ARC_USB_STATE_ADDRESS               (0x01)
+#define  ARC_USB_STATE_CONFIG                (0x00)
+#define  ARC_USB_STATE_SUSPEND               (0x80)
+
+#define  ARC_USB_SELF_POWERED                (0x01)
+#define  ARC_USB_REMOTE_WAKEUP               (0x02)
+
+/* Bus Control values */
+#define  ARC_USB_NO_OPERATION                (0x00)
+#define  ARC_USB_ASSERT_BUS_RESET            (0x01)
+#define  ARC_USB_DEASSERT_BUS_RESET          (0x02)
+#define  ARC_USB_ASSERT_RESUME               (0x03)
+#define  ARC_USB_DEASSERT_RESUME             (0x04)
+#define  ARC_USB_SUSPEND_SOF                 (0x05)
+#define  ARC_USB_RESUME_SOF                  (0x06)
+
+/* possible values of XD->bStatus */
+#define  ARC_USB_STATUS_IDLE                 (0)
+#define  ARC_USB_STATUS_TRANSFER_ACCEPTED    (1)
+#define  ARC_USB_STATUS_TRANSFER_PENDING     (2)
+#define  ARC_USB_STATUS_TRANSFER_IN_PROGRESS (3)
+#define  ARC_USB_STATUS_ERROR                (4)
+#define  ARC_USB_STATUS_DISABLED             (5)
+#define  ARC_USB_STATUS_STALLED              (6)
+#define  ARC_USB_STATUS_TRANSFER_QUEUED      (7)
+
+#define  ARC_USB_RECV                        (0)
+#define  ARC_USB_SEND                        (1)
+
+#define  ARC_USB_DEVICE_DONT_ZERO_TERMINATE  (0x1)
+
+#define  ARC_USB_SETUP_DATA_XFER_DIRECTION   (0x80)
+
+#define  ARC_USB_SPEED_FULL                  (0)
+#define  ARC_USB_SPEED_LOW                   (1)
+#define  ARC_USB_SPEED_HIGH                  (2)
+
+#define  ARC_USB_MAX_PKTS_PER_UFRAME         (0x6)
+
+/* USB 1.1 Setup Packet */
+typedef struct setup_struct {
+   uint_8      REQUESTTYPE;
+   uint_8      REQUEST;
+   uint_16     VALUE;
+   uint_16     INDEX;
+   uint_16     LENGTH;
+} SETUP_STRUCT, _PTR_ SETUP_STRUCT_PTR;
+
+#endif /* __mvUsbDefs_h__ */
+
+/* EOF */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/api/mvUsbDevApi.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/api/mvUsbDevApi.h
@@ -0,0 +1,159 @@
+/*******************************************************************************
+
+This software file (the "File") is distributed by Marvell International Ltd. 
+or its affiliate(s) under the terms of the GNU General Public License Version 2, 
+June 1991 (the "License").  You may use, redistribute and/or modify this File 
+in accordance with the terms and conditions of the License, a copy of which 
+is available along with the File in the license.txt file or by writing to the 
+Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 
+or on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+(C) Copyright 2004 - 2007 Marvell Semiconductor Israel Ltd. All Rights Reserved.
+(C) Copyright 1999 - 2004 Chipidea Microelectronica, S.A. All Rights Reserved.
+
+*******************************************************************************/
+
+#ifndef __mvUsbDevApi_h__
+#define __mvUsbDevApi_h__
+
+#include "mvUsbTypes.h"
+#include "mvUsbDebug.h"
+#include "mvUsbDefs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+
+
+#define ARC_USB_MAX_ENDPOINTS               (16)
+
+#define MAX_EP_TR_DESCRS                    (48)
+#define MAX_XDS_FOR_TR_CALLS                (32)
+#define MAX_USB_DEVICES                     MV_USB_MAX_PORTS
+
+/*Assumption here is that all control endpoints are sequential 0,1,..
+if they are not you need to modify the tr_complete routine to handle that */
+#define USB_MAX_CONTROL_ENDPOINTS           (1)
+
+#define USB_MAX_CTRL_PAYLOAD                (64)
+
+
+/* Endpoint types */
+#define  ARC_USB_CONTROL_ENDPOINT             (0)
+#define  ARC_USB_ISOCHRONOUS_ENDPOINT         (1)
+#define  ARC_USB_BULK_ENDPOINT                (2)
+#define  ARC_USB_INTERRUPT_ENDPOINT           (3)
+
+/* Informational Request/Set Types */
+#define  ARC_USB_STATUS_DEVICE_STATE          (0x01)
+#define  ARC_USB_STATUS_INTERFACE             (0x02)
+#define  ARC_USB_STATUS_ADDRESS               (0x03)
+#define  ARC_USB_STATUS_CURRENT_CONFIG        (0x04)
+#define  ARC_USB_STATUS_SOF_COUNT             (0x05)
+#define  ARC_USB_STATUS_DEVICE                (0x06)
+#define  ARC_USB_STATUS_TEST_MODE             (0x07)
+#define  ARC_USB_FORCE_FULL_SPEED             (0x08)
+#define  ARC_USB_PHY_LOW_POWER_SUSPEND        (0x09)
+
+#define  ARC_USB_STATUS_ENDPOINT_NUMBER_MASK  (0x000F)
+#define  ARC_USB_STATUS_ENDPOINT_DIR_MASK     (0x0080)
+
+#define  ARC_USB_TEST_MODE_TEST_PACKET        (0x0400)
+
+/* Available service types */
+/* Services 0 through 15 are reserved for endpoints */
+#define  ARC_USB_SERVICE_EP0                  (0x00)
+#define  ARC_USB_SERVICE_EP1                  (0x01)
+#define  ARC_USB_SERVICE_EP2                  (0x02)
+#define  ARC_USB_SERVICE_EP3                  (0x03)
+#define  ARC_USB_SERVICE_BUS_RESET            (0x10)
+#define  ARC_USB_SERVICE_SUSPEND              (0x11)
+#define  ARC_USB_SERVICE_SOF                  (0x12)
+#define  ARC_USB_SERVICE_RESUME               (0x13)
+#define  ARC_USB_SERVICE_SLEEP                (0x14)
+#define  ARC_USB_SERVICE_SPEED_DETECTION      (0x15)
+#define  ARC_USB_SERVICE_ERROR                (0x16)
+#define  ARC_USB_SERVICE_STALL                (0x17)
+
+typedef pointer _usb_device_handle;
+typedef void (*USB_SERVICE_FUNC)(void* handle, uint_8, boolean, uint_8, 
+                                                 uint_8_ptr, uint_32, uint_8);
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void    _usb_dci_vusb20_isr(void* handle);
+
+void    _usb_device_set_bsp_funcs(USB_IMPORT_FUNCS* pBspFuncs);
+
+uint_8  _usb_device_init(uint_8 devNo, void** pHandle);
+
+uint_8  _usb_device_get_max_endpoint(void* handle);
+
+uint_8  _usb_device_get_dev_num(void* handle);
+
+void    _usb_device_shutdown(void* handle);
+
+void    _usb_device_stop(void* handle);
+void    _usb_device_start(void* handle);
+
+uint_8  _usb_device_init_endpoint(void* handle, uint_8 ep_num, uint_16 max_pkt_size, 
+                                  uint_8 direction, uint_8 type, uint_8 flag);
+uint_8  _usb_device_deinit_endpoint(void* handle, uint_8 ep_num, uint_8 direction);
+
+uint_8  _usb_device_recv_data(void* handle, uint_8 ep_num, uint_8* buf_ptr, uint_32 size);
+uint_8  _usb_device_send_data(void* handle, uint_8 ep_num, uint_8* buf_ptr, uint_32 size);
+uint_8  _usb_device_cancel_transfer(void* handle, uint_8 ep_num, uint_8 direction);
+uint_8  _usb_device_get_transfer_status(void* handle, uint_8 ep_num, uint_8 direction);
+void    _usb_device_stall_endpoint(void* handle, uint_8 ep_num, uint_8 direction);
+void    _usb_device_unstall_endpoint(void* handle, uint_8 ep_num, uint_8 direction);
+uint_8  _usb_device_is_endpoint_stalled(void* handle, uint_8 ep_num, uint_8 direction);
+void    _usb_device_assert_resume(void* handle);
+uint_8  _usb_device_get_status(void* handle, uint_8 component, uint_16* status_ptr);
+uint_8  _usb_device_set_status(void* handle, uint_8 component, uint_16 setting);
+void    _usb_device_read_setup_data(void* handle, uint_8 ep_num, uint_8* buf_ptr);
+
+uint_8  _usb_device_register_service(void* handle, uint_8 type, USB_SERVICE_FUNC serviceFunc);
+
+uint_8  _usb_device_unregister_service(void* handle, uint_8 type);
+
+
+
+/* These functions that implement USB 2.0 standard Chapter 9 Setup requests */
+void    mvUsbCh9GetStatus(void* handle, boolean setup, 
+                                  SETUP_STRUCT* ctrl_req);
+
+void    mvUsbCh9ClearFeature(void* handle, boolean setup, 
+                                   SETUP_STRUCT* setup_ptr);
+
+void    mvUsbCh9SetFeature(void* handle, boolean setup, 
+                                 SETUP_STRUCT* setup_ptr);
+
+void    mvUsbCh9SetAddress(void* handle, boolean setup, 
+                                   SETUP_STRUCT* setup_ptr);
+
+/* DEBUG Functions */
+void    _usb_dci_vusb20_set_test_mode(void* handle, uint_16 testMode);   
+
+void    _usb_debug_set_flags(uint_32 flags);     
+uint_32 _usb_debug_get_flags(void);
+     
+void    _usb_debug_init_trace_log(void);
+void    _usb_debug_print_trace_log(void);
+
+void    _usb_regs(void* usbHandle);
+void    _usb_status(void* usbHandle);
+void    _usb_stats(void* usbHandle);
+void    _usb_clear_stats(void* usbHandle);
+void    _usb_ep_status(void* usbHandle, int ep_num, int direction);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __mvUsbDevApi_h__ */
+/* EOF */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/api/mvUsbCh9.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/api/mvUsbCh9.h
@@ -0,0 +1,124 @@
+/*******************************************************************************
+
+This software file (the "File") is distributed by Marvell International Ltd. 
+or its affiliate(s) under the terms of the GNU General Public License Version 2, 
+June 1991 (the "License").  You may use, redistribute and/or modify this File 
+in accordance with the terms and conditions of the License, a copy of which 
+is available along with the File in the license.txt file or by writing to the 
+Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 
+or on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+(C) Copyright 2004 - 2007 Marvell Semiconductor Israel Ltd. All Rights Reserved.
+(C) Copyright 1999 - 2004 Chipidea Microelectronica, S.A. All Rights Reserved.
+
+*******************************************************************************/
+
+#ifndef __mvUsbCh9_h__
+#define __mvUsbCh9_h__
+
+#include "mvUsbTypes.h"
+/*----------------------------------------------------------------**
+** Chapter 9.4 Standard Device Requests -- all devices            **
+** See Table 9-3 p. 250 of USB 2.0 spec for combinations          **
+**   of request type bitfields with requests, WVALUE, WINDEX etc. **
+**----------------------------------------------------------------*/
+#define REQ_RECIP_MASK          0x1f
+#define REQ_RECIP_DEVICE        0x00
+#define REQ_RECIP_INTERFACE     0x01
+#define REQ_RECIP_ENDPOINT      0x02
+#define REQ_RECIP_OTHER         0x03
+
+/* Also for class requests set the following bit */
+#define REQ_TYPE_OFFSET         5
+#define REQ_TYPE_MASK			(0x03 << REQ_TYPE_OFFSET)
+#define REQ_TYPE_STANDARD		(0x00 << REQ_TYPE_OFFSET)
+#define REQ_TYPE_CLASS			(0x01 << REQ_TYPE_OFFSET)
+#define REQ_TYPE_VENDOR			(0x02 << REQ_TYPE_OFFSET)
+#define REQ_TYPE_RESERVED		(0x03 << REQ_TYPE_OFFSET)
+
+/* Combine one of the 3 above with one of the following 2 */
+#define REQ_DIR_OFFSET         7
+#define REQ_DIR_IN             (1 << REQ_DIR_OFFSET)
+#define REQ_DIR_OUT            (0 << REQ_DIR_OFFSET)
+
+/* Standard USB requests, see Chapter 9 */
+#define REQ_GET_STATUS          0
+#define REQ_CLEAR_FEATURE       1
+#define REQ_SET_FEATURE         3
+#define REQ_SET_ADDRESS         5
+#define REQ_GET_DESCRIPTOR      6
+#define REQ_SET_DESCRIPTOR      7
+#define REQ_GET_CONFIGURATION   8
+#define REQ_SET_CONFIGURATION   9
+#define REQ_GET_INTERFACE       10
+#define REQ_SET_INTERFACE       11
+#define REQ_SYNCH_FRAME         12
+
+#define DESC_TYPE_DEVICE         0x1
+#define DESC_TYPE_CONFIG         0x2
+#define DESC_TYPE_STRING         0x3
+#define DESC_TYPE_INTERFACE      0x4
+#define DESC_TYPE_ENDPOINT       0x5
+#define DESC_TYPE_QUALIFIER      0x6
+#define DESC_TYPE_OTHER_SPEED    0x7
+#define DESC_TYPE_INTF_POWER     0x8
+#define DESC_TYPE_OTG            0x9
+
+/*******************************************************************
+**
+** Values specific to CLEAR FEATURE commands (must go to common.h later)
+*/
+
+#define  ENDPOINT_HALT          0
+#define  DEVICE_SELF_POWERED    0
+#define  DEVICE_REMOTE_WAKEUP   1
+#define  DEVICE_TEST_MODE       2
+
+
+/* States of device instances on the device list */
+
+/* initial device state */
+#define  DEVSTATE_INITIAL        0x00
+
+/* device descriptor [0..7]*/
+#define  DEVSTATE_DEVDESC8       0x01
+
+/* address set */
+#define  DEVSTATE_ADDR_SET       0x02
+
+/* full device descriptor */
+#define  DEVSTATE_DEV_DESC       0x03
+
+/* config descriptor [0..7] */
+#define  DEVSTATE_GET_CFG9       0x04
+
+/* config set */
+#define  DEVSTATE_SET_CFG        0x05
+
+/* full config desc. read in */
+#define  DEVSTATE_CFG_READ       0x06
+
+/* application callbacks */
+#define  DEVSTATE_APP_CALL       0x07
+
+/* Select interface done */
+#define  DEVSTATE_SET_INTF       0x08
+
+#define  DEVSTATE_ENUM_OK        0x09
+
+#define  DEVSTATE_CHK_OTG        0x0A
+
+/* Event codes for attach/detach etc. callback */
+#define  USB_ATTACH_EVENT        1   /* device attach */
+#define  USB_DETACH_EVENT        2   /* device detach */
+#define  USB_CONFIG_EVENT        3   /* device reconfigured */
+#define  USB_INTF_EVENT          4   /* device interface selected */
+
+#endif /* __mvUsbCh9_h__ */
+
+/* EOF */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/api/mvUsbTypes.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/api/mvUsbTypes.h
@@ -0,0 +1,238 @@
+/*******************************************************************************
+
+This software file (the "File") is distributed by Marvell International Ltd. 
+or its affiliate(s) under the terms of the GNU General Public License Version 2, 
+June 1991 (the "License").  You may use, redistribute and/or modify this File 
+in accordance with the terms and conditions of the License, a copy of which 
+is available along with the File in the license.txt file or by writing to the 
+Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 
+or on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+(C) Copyright 2004 - 2007 Marvell Semiconductor Israel Ltd. All Rights Reserved.
+(C) Copyright 1999 - 2004 Chipidea Microelectronica, S.A. All Rights Reserved.
+
+*******************************************************************************/
+
+#ifndef __mvUsbTypes_h__
+#define __mvUsbTypes_h__
+
+#define _PTR_      *
+#define _CODE_PTR_ *
+
+typedef char _PTR_                    char_ptr;    /* signed character       */
+
+typedef signed   char  int_8, _PTR_   int_8_ptr;   /* 8-bit signed integer   */
+typedef unsigned char  uint_8, _PTR_   uint_8_ptr;  /* 8-bit signed integer   */
+
+typedef          short int_16, _PTR_   int_16_ptr;  /* 16-bit signed integer  */
+typedef unsigned short uint_16, _PTR_  uint_16_ptr; /* 16-bit unsigned integer*/
+
+typedef          int   int_32, _PTR_   int_32_ptr;  /* 32-bit signed integer  */
+typedef unsigned int   uint_32, _PTR_  uint_32_ptr; /* 32-bit unsigned integer*/
+
+typedef unsigned long  boolean;  /* Machine representation of a boolean */
+
+typedef void _PTR_     pointer;  /* Machine representation of a pointer */
+
+/*--------------------------------------------------------------------------*/
+/*
+**                          STANDARD CONSTANTS
+**
+**  Note that if standard 'C' library files are included after types.h,
+**  the defines of TRUE, FALSE and NULL may sometimes conflict, as most
+**  standard library files do not check for previous definitions.
+*/
+
+#ifndef  FALSE
+#   define FALSE ((boolean)0)   
+#endif
+
+#ifndef  TRUE
+#   define TRUE ((boolean)!FALSE) 
+#endif
+
+#ifndef  NULL
+#   ifdef __cplusplus
+#       define NULL (0)
+#   else
+#       define NULL ((pointer)0)
+#   endif
+#endif
+
+#ifndef _ASSERT_
+   #define ASSERT(X,Y)
+#else
+   #define ASSERT(X,Y) if(Y) { USB_printf(X); exit(1);}
+#endif
+
+#ifndef  MIN
+#   define MIN(a,b)   ((a) < (b) ? (a) : (b))      
+#endif
+
+#define USB_MEM_ALIGN(n, align)            ((n) + (-(n) & (align-1)))
+
+/* Macro for aligning the EP queue head to 32 byte boundary */
+#define USB_MEM32_ALIGN(n)                  USB_MEM_ALIGN(n, 32)
+
+/* Macro for aligning the EP queue head to 1024 byte boundary */
+#define USB_MEM1024_ALIGN(n)                USB_MEM_ALIGN(n, 1024)
+
+/* Macro for aligning the EP queue head to 1024 byte boundary */
+#define USB_MEM2048_ALIGN(n)                USB_MEM_ALIGN(n, 2048)
+
+#define PSP_CACHE_LINE_SIZE                 32
+
+#define USB_uint_16_low(x)                  ((x) & 0xFF)
+#define USB_uint_16_high(x)                 (((x) >> 8) & 0xFF)
+
+#define USB_CACHE_ALIGN(n)                  USB_MEM_ALIGN(n, PSP_CACHE_LINE_SIZE)       
+
+#ifndef INLINE
+#   if defined(MV_VXWORKS)
+#       define INLINE   __inline
+#   else
+#       define INLINE   inline
+#   endif /* MV_VXWORKS */
+#endif /* INLINE */
+
+/* 16bit byte swap. For example 0x1122 -> 0x2211                            */
+static INLINE uint_16 USB_BYTE_SWAP_16BIT(uint_16 value)
+{
+    return ( ((value & 0x00ff) << 8) | 
+             ((value & 0xff00) >> 8) );
+}
+
+/* 32bit byte swap. For example 0x11223344 -> 0x44332211                    */
+static INLINE uint_32 USB_BYTE_SWAP_32BIT(uint_32 value)
+{
+    return ( ((value & 0x000000ff) << 24) |                      
+             ((value & 0x0000ff00) << 8)  |                    
+             ((value & 0x00ff0000) >> 8)  |       
+             ((value & 0xff000000) >> 24));
+}
+
+    
+/* Endianess macros.                                                        */
+#if defined(MV_CPU_LE)
+#   define USB_16BIT_LE(X)  (X) 
+#   define USB_32BIT_LE(X)  (X)
+#   define USB_16BIT_BE(X)  USB_BYTE_SWAP_16BIT(X)
+#   define USB_32BIT_BE(X)  USB_BYTE_SWAP_32BIT(X)
+#elif defined(MV_CPU_BE)
+#   define USB_16BIT_LE(X)  USB_BYTE_SWAP_16BIT(X) 
+#   define USB_32BIT_LE(X)  USB_BYTE_SWAP_32BIT(X)
+#   define USB_16BIT_BE(X)  (X)
+#   define USB_32BIT_BE(X)  (X)
+#else
+    #error "CPU endianess isn't defined!\n"
+#endif 
+
+typedef struct
+{
+    void    (*bspPrintf)          (const char *  fmt, ...);
+    int     (*bspSprintf)         (char* buffer, const char *  fmt, ...);
+    void*   (*bspUncachedMalloc)  (void* pDev, uint_32 size, uint_32 align,
+                                   unsigned long* pPhyAddr);     
+    void    (*bspUncachedFree)    (void* pDev, uint_32 size, unsigned long phyAddr, 
+                                    void*  pVirtAddr);
+    void*   (*bspMalloc)          (unsigned int size);
+    void    (*bspFree)            (void* ptr);
+    void*   (*bspMemset)          (void* ptr, int val, unsigned int size);
+    void*   (*bspMemcpy)          (void* dst, const void* src, unsigned int size);
+    unsigned long (*bspCacheFlush)      (void* pDev, void* pVirtAddr, int size);
+    unsigned long (*bspCacheInv)        (void* pDev, void* pVirtAddr, int size);
+    unsigned long (*bspVirtToPhys)    (void* pDev, void* pVirtAddr);
+    int     (*bspLock)            (void);
+    void    (*bspUnlock)          (int lockKey);
+    uint_32 (*bspGetCapRegAddr)   (int devNo);
+    void    (*bspResetComplete)   (int devNo);
+
+} USB_IMPORT_FUNCS;
+
+extern USB_IMPORT_FUNCS*            global_import_funcs;
+
+#define USB_sprintf(frmt, x...)     if( (global_import_funcs != NULL) &&                \
+                                         global_import_funcs->bspSprintf != NULL)        \
+                                        global_import_funcs->bspSprintf(frmt, ##x)
+
+#define USB_printf(frmt, x...)      if( (global_import_funcs != NULL) &&                \
+                                        (global_import_funcs->bspPrintf != NULL) )        \
+                                        global_import_funcs->bspPrintf(frmt, ##x)
+
+
+#define USB_virt_to_phys(pVirt)     (global_import_funcs->bspVirtToPhys == NULL) ?      \
+                                        (uint_32)(pVirt) : global_import_funcs->bspVirtToPhys(NULL, pVirt)
+
+#define USB_get_cap_reg_addr(dev)   global_import_funcs->bspGetCapRegAddr(dev)
+
+static INLINE void* USB_uncached_memalloc(uint_32 size, uint_32 align, unsigned long* pPhyAddr) 
+{
+    /*USB_printf("**** USB_uncached_memalloc: size=%d\n", (size));       */
+    return global_import_funcs->bspUncachedMalloc(NULL, size, align, pPhyAddr); 
+}
+
+static INLINE void* USB_memalloc(uint_32 size)                                                                              
+{
+    /*USB_printf("**** USB_memalloc: size=%d\n", (size)); */
+    return global_import_funcs->bspMalloc(size);        
+}
+
+#define USB_uncached_memfree(pVirt, size, physAddr)                                 \
+                /*USB_printf("#### USB_uncached_memfree: pVirt=0x%x\n", (pVirt)); */\
+                global_import_funcs->bspUncachedFree(NULL, size, physAddr, pVirt);
+
+#define USB_memfree(ptr)                                                            \
+                /*USB_printf("#### USB_memfree: ptr=0x%x\n", (ptr));*/              \
+                global_import_funcs->bspFree(ptr);
+
+#define USB_memzero(ptr, n)         global_import_funcs->bspMemset(ptr, 0,  n)
+#define USB_memcopy(src, dst, n)    global_import_funcs->bspMemcpy(dst, src, n)
+
+#define USB_dcache_inv(ptr, size)   if(global_import_funcs->bspCacheInv != NULL)  \
+                                        global_import_funcs->bspCacheInv(NULL, ptr, size)     
+
+#define USB_dcache_flush(ptr, size) if(global_import_funcs->bspCacheFlush != NULL)  \
+                                        global_import_funcs->bspCacheFlush(NULL, ptr, size)     
+
+#define USB_lock()                  (global_import_funcs->bspLock == NULL) ?        \
+                                                    0 : global_import_funcs->bspLock()
+
+#define USB_unlock(key)             if(global_import_funcs->bspUnlock != NULL)  \
+                                        global_import_funcs->bspUnlock(key)     
+
+#define USB_reset_complete(dev)     if(global_import_funcs->bspResetComplete)       \
+                                        global_import_funcs->bspResetComplete(dev)
+
+
+#if defined(USB_UNDERRUN_WA)
+
+#define USB_SRAM_MAX_PARTS  16  
+
+typedef struct
+{
+    uint_32 (*bspGetSramAddr) (uint_32* pSize);
+    void    (*bspIdmaCopy) (void* dst, void* src, unsigned int size);
+
+} USB_WA_FUNCS;
+
+extern USB_WA_FUNCS*    global_wa_funcs;
+extern int              global_wa_sram_parts;
+extern int              global_wa_threshold; 
+
+#define USB_get_sram_addr(pSize)        global_wa_funcs->bspGetSramAddr(pSize)
+
+#define USB_idma_copy(dst, src, size)                                   \
+            if(global_wa_funcs->bspIdmaCopy != NULL)                    \
+                global_wa_funcs->bspIdmaCopy(dst, src, size)
+
+#endif /* USB_UNDERRUN_WA */
+
+#endif /* __mvUsbTypes_h__ */
+
+/* EOF */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/api/mvUsbDebug.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/api/mvUsbDebug.h
@@ -0,0 +1,109 @@
+/*******************************************************************************
+
+This software file (the "File") is distributed by Marvell International Ltd. 
+or its affiliate(s) under the terms of the GNU General Public License Version 2, 
+June 1991 (the "License").  You may use, redistribute and/or modify this File 
+in accordance with the terms and conditions of the License, a copy of which 
+is available along with the File in the license.txt file or by writing to the 
+Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 
+or on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+(C) Copyright 2004 - 2007 Marvell Semiconductor Israel Ltd. All Rights Reserved.
+(C) Copyright 1999 - 2004 Chipidea Microelectronica, S.A. All Rights Reserved.
+
+*******************************************************************************/
+
+#ifndef __mvUsbDebug_h__
+#define __mvUsbDebug_h__
+
+#include "mvUsbTypes.h"
+
+#define MV_USB_RT_DEBUG
+
+/************************************************************
+The following array is used to make a run time trace route
+inside the USB stack.
+*************************************************************/
+
+#define ARC_DEBUG_FLAG_ANY      0x00000000
+
+#define ARC_DEBUG_FLAG_TRACE    0x00000001
+#define ARC_DEBUG_FLAG_CTRL     0x00000002
+#define ARC_DEBUG_FLAG_RX       0x00000004
+#define ARC_DEBUG_FLAG_TX       0x00000008
+#define ARC_DEBUG_FLAG_STALL    0x00000010
+#define ARC_DEBUG_FLAG_STATUS   0x00000020
+#define ARC_DEBUG_FLAG_TRANSFER 0x00000040
+#define ARC_DEBUG_FLAG_INIT     0x00000080
+#define ARC_DEBUG_FLAG_ISR      0x00000100
+#define ARC_DEBUG_FLAG_ERROR    0x00000200
+#define ARC_DEBUG_FLAG_ADDR     0x00000400
+#define ARC_DEBUG_FLAG_DUMP     0x00000800
+#define ARC_DEBUG_FLAG_SETUP    0x00001000
+#define ARC_DEBUG_FLAG_CLASS    0x00002000
+#define ARC_DEBUG_FLAG_SPEED    0x00004000
+#define ARC_DEBUG_FLAG_RESET    0x00008000
+#define ARC_DEBUG_FLAG_SUSPEND  0x00010000
+#define ARC_DEBUG_FLAG_RESUME   0x00020000
+#define ARC_DEBUG_FLAG_EP0      0x00040000
+#define ARC_DEBUG_FLAG_EP1      0x00080000
+#define ARC_DEBUG_FLAG_STATS    0x00100000
+
+
+#define ARC_DEBUG_FLAG_ALL      0xffffffff
+
+extern uint_32  usbDebugFlags;
+
+#ifdef MV_USB_RT_DEBUG
+#   define ARC_DEBUG_CODE(flags, code)    	        \
+        if( (usbDebugFlags & (flags)) == (flags) )  \
+            code
+#else
+#   define ARC_DEBUG_CODE(flags, code)
+#endif
+
+#if defined(MV_USB_TRACE_LOG)
+
+#define TRACE_ARRAY_SIZE 400
+#define MAX_STRING_SIZE  132
+
+extern uint_16 DEBUG_TRACE_ARRAY_COUNTER;
+extern char    DEBUG_TRACE_ARRAY[TRACE_ARRAY_SIZE][MAX_STRING_SIZE];
+
+#define ARC_DEBUG_TRACE(flags, format, x...)                                        \
+{                                                                                   \
+    if( (usbDebugFlags & (flags)) == (flags))                                   \
+    {                                                                               \
+        USB_sprintf(DEBUG_TRACE_ARRAY[DEBUG_TRACE_ARRAY_COUNTER], format, ##x);     \
+        DEBUG_TRACE_ARRAY_COUNTER++;                                                \
+        if(DEBUG_TRACE_ARRAY_COUNTER >= TRACE_ARRAY_SIZE)                           \
+            {DEBUG_TRACE_ARRAY_COUNTER = 0;}                                        \
+    }                                                                               \
+}
+                                                    
+#elif defined(MV_USB_TRACE_PRINT)
+
+#   define ARC_DEBUG_TRACE(flags, format, x...)           \
+        if((usbDebugFlags & (flags)) == (flags))      \
+            USB_printf(format, ##x)
+
+/*if trace switch is not enabled define debug log trace to empty*/
+#else
+#   define ARC_DEBUG_TRACE(flags, fromat, x...)
+#endif
+
+
+/************************************************************
+The following are global data structures that can be used
+to copy data from stack on run time. This structure can
+be analyzed at run time to see the state of various other
+data structures in the memory.
+*************************************************************/
+
+#endif /* __mvUsbDebug_h__ */
+/* EOF */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/examples/disk.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/examples/disk.h
@@ -0,0 +1,86 @@
+/*******************************************************************************
+
+This software file (the "File") is distributed by Marvell International Ltd. 
+or its affiliate(s) under the terms of the GNU General Public License Version 2, 
+June 1991 (the "License").  You may use, redistribute and/or modify this File 
+in accordance with the terms and conditions of the License, a copy of which 
+is available along with the File in the license.txt file or by writing to the 
+Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 
+or on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+(C) Copyright 2004 - 2007 Marvell Semiconductor Israel Ltd. All Rights Reserved.
+(C) Copyright 1999 - 2004 Chipidea Microelectronica, S.A. All Rights Reserved.
+
+*******************************************************************************/
+
+#ifndef __disk_h__
+#define __disk_h__
+
+#define  USB_DCBWSIGNATURE       (0x43425355)
+#define  USB_DCSWSIGNATURE       (0x53425355)
+#define  USB_CBW_DIRECTION_BIT   (0x80)
+
+/* USB Command Block Wrapper */
+typedef struct cbw_struct {
+   uint_32  DCBWSIGNATURE;
+   uint_32  DCBWTAG;
+   uint_32  DCBWDATALENGTH;
+   uint_8   BMCBWFLAGS;
+   /* 4 MSBs bits reserved */
+   uint_8   BCBWCBLUN;
+   /* 3 MSB reserved */
+   uint_8   BCBWCBLENGTH;
+   uint_8   CBWCB[16];
+} CBW_STRUCT, _PTR_ CBW_STRUCT_PTR;
+
+/* USB Command Status Wrapper */
+typedef struct csw_struct {
+   uint_32  DCSWSIGNATURE;
+   uint_32  DCSWTAG;
+   uint_32  DCSWDATARESIDUE;
+   uint_8   BCSWSTATUS;
+} CSW_STRUCT, _PTR_ CSW_STRUCT_PTR;
+
+/* USB Mass storage Inquiry Command */
+typedef struct mass_storage_inquiry {
+   uint_8   OPCODE;
+   uint_8   LUN;
+   uint_8   PAGE_CODE;
+   uint_8   RESERVED1;
+   uint_8   ALLOCATION_LENGTH;
+   uint_8   RESERVED2[7];
+} DISK_INQUIRY, _PTR_ DISK_INQUIRY_PTR;
+
+/* USB Mass storage READ CAPACITY Data */
+typedef struct mass_storage_read_capacity {
+   uint_8   LAST_LOGICAL_BLOCK_ADDRESS[4];
+   uint_8   BLOCK_LENGTH_IN_BYTES[4];
+} DISK_READ_CAPACITY, _PTR_ DISK_READ_CAPACITY_PTR;
+
+/* USB Mass storage Device information */
+typedef struct mass_storage_device_info {
+   uint_8   PERIPHERAL_DEVICE_TYPE;    /* Bits 0-4. All other bits reserved */
+   uint_8   RMB;                       /* Bit 7. All other bits reserved */
+   uint_8   ANSI_ECMA_ISO_VERSION;     /* ANSI: bits 0-2, ECMA: bits 3-5, 
+                                       ** ISO: bits 6-7 
+                                       */
+   uint_8   RESPONSE_DATA_FORMAT;      /* bits 0-3. All other bits reserved */
+   uint_8   ADDITIONAL_LENGTH;         /* For UFI device: always set to 0x1F */
+   uint_8   RESERVED1[3];
+   uint_8   VENDOR_INFORMATION[8];
+   uint_8   PRODUCT_ID[16];
+   uint_8   PRODUCT_REVISION_LEVEL[4];
+} DISK_DEVICE_INFO, _PTR_ DISK_DEVICE_INFO_PTR;
+
+
+extern _usb_device_handle  usbDiskLoad(int devNo, int diskSize);
+extern void                usbDiskUnload(_usb_device_handle  handle);
+
+#endif /* __disk_h__ */
+
+/* EOF */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/examples/disk.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/examples/disk.c
@@ -0,0 +1,2296 @@
+/*******************************************************************************
+
+This software file (the "File") is distributed by Marvell International Ltd. 
+or its affiliate(s) under the terms of the GNU General Public License Version 2, 
+June 1991 (the "License").  You may use, redistribute and/or modify this File 
+in accordance with the terms and conditions of the License, a copy of which 
+is available along with the File in the license.txt file or by writing to the 
+Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 
+or on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+(C) Copyright 2004 - 2007 Marvell Semiconductor Israel Ltd. All Rights Reserved.
+(C) Copyright 1999 - 2004 Chipidea Microelectronica, S.A. All Rights Reserved.
+
+*******************************************************************************/
+
+/**************************************************************************
+Include the USB stack and local header files.
+**************************************************************************/
+
+#include "mvUsbDefs.h"
+#include "mvUsbCh9.h"
+#include "mvUsbDebug.h"
+#include "mvUsbDevApi.h"
+#include "disk.h"
+
+/* MSB of debug flags for USB device usage */
+#define ARC_DEBUG_FLAG_DISK         0x01000000
+#define ARC_DEBUG_FLAG_DISK_READ    0x02000000
+#define ARC_DEBUG_FLAG_DISK_WRITE   0x04000000
+#define ARC_DEBUG_FLAG_DISK_CAP     0x08000000
+#define ARC_DEBUG_FLAG_DISK_DATA    0x10000000
+#define ARC_DEBUG_FLAG_DISK_DUMP    0x20000000
+
+
+/**************************************************************************
+Include the OS and BSP dependent files that define IO functions and
+basic types. You may like to change these files for your board and RTOS 
+**************************************************************************/
+   
+
+/**************************************************************************
+Global variables and some defines for device.
+**************************************************************************/
+
+#define BUFFERSIZE                      (2048)
+
+#define EP_TEMP_BUFFERSIZE              (32)
+#define MASS_STORAGE_INTERFACE          (0)
+
+#define APP_CONTROL_MAX_PKT_SIZE        (64)
+#define DEV_DESC_MAX_PACKET_SIZE        (7)
+#define DISK_FS_MAX_PACKET_SIZE         (64)
+#define DISK_HS_MAX_PACKET_SIZE         (512)
+
+#define CFG_DESC_EP_IN_TYPE_OFFSET              (21)
+#define CFG_DESC_EP_IN_MAX_PACKET_SIZE_OFFSET   (22)
+#define CFG_DESC_EP_OUT_TYPE_OFFSET             (28)
+#define CFG_DESC_EP_OUT_MAX_PACKET_SIZE_OFFSET  (29)
+
+#define TOTAL_LOGICAL_ADDRESS_BLOCKS    (4096)
+#define LENGTH_OF_EACH_LAB              (512)
+
+#define DISK_IN_EP_NO       1
+#define DISK_OUT_EP_NO      2
+
+#define DISK_IN_EP_TYPE     2 /* Bulk */
+#define DISK_OUT_EP_TYPE    2 /* Bulk */
+
+typedef struct
+{
+    _usb_device_handle  usbDevHandle;     /* Must be first field */
+    uint_32             devNo;
+    uint_8_ptr          Send_Buffer_Unaligned;
+
+    uint_8_ptr          DevDesc;
+    uint_8_ptr          DevQualifierDesc;
+    uint_8_ptr          ConfigDesc;
+    uint_8_ptr          other_speed_config;
+    uint_8_ptr          ep1_buf;
+    uint_8_ptr          epTemp_buf;
+    DISK_READ_CAPACITY* pReadCapacity;
+    CSW_STRUCT*         pCSW;
+    uint_8_ptr          MASS_STORAGE_DISK;
+
+    SETUP_STRUCT        local_setup_packet;
+
+    volatile boolean    TEST_ENABLED;
+    volatile boolean    ENTER_TEST_MODE; 
+    volatile uint_16    test_mode_index;
+    volatile uint_8     speed;
+    uint_16             logicalBlocks;
+    uint_32             hsMaxPktSize;
+    uint_32             fsMaxPktSize;
+
+    uint_32             inEpType;
+    uint_32             outEpType;
+
+    uint_32             inEpNo;
+    uint_32             outEpNo;
+    boolean             CBW_PROCESSED;
+    boolean             ZERO_TERMINATE;
+
+} USB_DISK_STRUCT;
+
+uint_32             diskHsMaxPktSize = DISK_HS_MAX_PACKET_SIZE;
+uint_32             diskFsMaxPktSize = DISK_FS_MAX_PACKET_SIZE;
+
+uint_32             diskInEpType = DISK_IN_EP_TYPE;
+uint_32             diskOutEpType = DISK_OUT_EP_TYPE;
+
+uint_32             diskInEpNo = DISK_IN_EP_NO;
+uint_32             diskOutEpNo = DISK_OUT_EP_NO;
+
+static USB_DISK_STRUCT*  usbDisksPtr[MAX_USB_DEVICES] = { NULL, NULL };
+
+/**************************************************************************
+DESCRIPTORS DESCRIPTORS DESCRIPTORS DESCRIPTORS DESCRIPTORS DESCRIPTORS
+**************************************************************************/
+
+#define DEVICE_DESCRIPTOR_SIZE 18
+static const uint_8  DevDescData[DEVICE_DESCRIPTOR_SIZE] =
+{
+   /* Length of DevDesc */
+   DEVICE_DESCRIPTOR_SIZE,
+   /* "Device" Type of descriptor */
+   1,
+   /* BCD USB version */
+   0, 2,
+   /* Device Class is indicated in the interface descriptors */
+   0x00,
+   /* Device Subclass is indicated in the interface descriptors */
+   0x00,
+   /* Mass storage devices do not use class-specific protocols */
+   0x00,
+   /* Max packet size */
+   APP_CONTROL_MAX_PKT_SIZE,
+   /* Vendor ID */
+   USB_uint_16_low(0x1286), USB_uint_16_high(0x1286),
+   /* Product ID */
+   USB_uint_16_low(0x1), USB_uint_16_high(0x1),
+   /* BCD Device version */
+   USB_uint_16_low(0x0002), USB_uint_16_high(0x0002),
+   /* Manufacturer string index */
+   0x1,
+   /* Product string index */
+   0x2,
+   /* Serial number string index */
+   0x6,
+   /* Number of configurations available */
+   0x1
+};
+
+/* USB 2.0 specific descriptor */
+#define DEVICE_QUALIFIER_DESCRIPTOR_SIZE 10
+static const uint_8  DevQualifierDescData[DEVICE_QUALIFIER_DESCRIPTOR_SIZE] =
+{
+   DEVICE_QUALIFIER_DESCRIPTOR_SIZE,  /* bLength Length of this descriptor */
+   6,                         /* bDescType This is a DEVICE Qualifier descr */
+   0,2,                       /* bcdUSB USB revision 2.0 */
+   0,                         /* bDeviceClass */
+   0,                         /* bDeviceSubClass */
+   0,                         /* bDeviceProtocol */
+   APP_CONTROL_MAX_PKT_SIZE,  /* bMaxPacketSize0 */
+   0x01,                      /* bNumConfigurations */
+   0
+};
+
+#define CONFIG_DESC_NUM_INTERFACES  (4)
+/* This must be counted manually and updated with the descriptor */
+/* 1*Config(9) + 1*Interface(9) + 2*Endpoint(7) = 32 bytes */
+#define CONFIG_DESC_SIZE            (32)
+
+/**************************************************************
+we declare the config desc as USB_Uncached because this descriptor
+is updated on the fly for max packet size during enumeration. Making
+it uncached ensures that main memory is updated whenever this
+descriptor pointer is used.
+**************************************************************/
+static const uint_8 ConfigDescData[CONFIG_DESC_SIZE] =
+{
+   /* Configuration Descriptor - always 9 bytes */
+   9,
+   /* "Configuration" type of descriptor */
+   2,
+   /* Total length of the Configuration descriptor */
+   USB_uint_16_low(CONFIG_DESC_SIZE), 
+   USB_uint_16_high(CONFIG_DESC_SIZE),
+   /* NumInterfaces */
+   1,
+   /* Configuration Value */
+   1,
+   /* Configuration Description String Index*/
+   4,
+   /* Attributes.  Self-powered. */
+   0xc0,
+   /* Current draw from bus */
+   0,
+   /* Interface 0 Descriptor - always 9 bytes */
+   9,
+   /* "Interface" type of descriptor */
+   4,
+   /* Number of this interface */
+   MASS_STORAGE_INTERFACE,
+   /* Alternate Setting */
+   0,
+   /* Number of endpoints on this interface */
+   2,
+   /* Interface Class */
+   0x08,
+   /* Interface Subclass: SCSI transparent command set */
+   0x06,
+   /* Interface Protocol: Bulk only protocol */
+   0x50,
+   /* Interface Description String Index */
+   0,
+   /* Endpoint 1 (Bulk In Endpoint), Interface 0 Descriptor - always 7 bytes*/
+   7,
+   /* "Endpoint" type of descriptor */
+   5,
+   /*
+   ** Endpoint address.  The low nibble contains the endpoint number and the
+   ** high bit indicates TX(1) or RX(0).
+   */
+   ((ARC_USB_SEND<<7) | DISK_IN_EP_NO) /*0x81*/,
+   /* Attributes.  0=Control 1=Isochronous 2=Bulk 3=Interrupt */
+   DISK_IN_EP_TYPE,
+   /* Max Packet Size for this endpoint */
+   USB_uint_16_low(DISK_FS_MAX_PACKET_SIZE), 
+   USB_uint_16_high(DISK_FS_MAX_PACKET_SIZE),
+   /* Polling Interval (ms) */
+   0,
+   /* Endpoint 2 (Bulk Out Endpoint), Interface 0 Descriptor - always 7 bytes*/
+   7,
+   /* "Endpoint" type of descriptor */
+   5,
+   /*
+   ** Endpoint address.  The low nibble contains the endpoint number and the
+   ** high bit indicates TX(1) or RX(0).
+   */
+   ((ARC_USB_RECV<<7) | DISK_OUT_EP_NO), /*0x02*/
+   /* Attributes.  0=Control 1=Isochronous 2=Bulk 3=Interrupt */
+   DISK_OUT_EP_TYPE,
+   /* Max Packet Size for this endpoint */
+   USB_uint_16_low(DISK_FS_MAX_PACKET_SIZE), 
+   USB_uint_16_high(DISK_FS_MAX_PACKET_SIZE),
+   /* Polling Interval (ms) */
+   0
+};
+
+#define OTHER_SPEED_CONFIG_DESC_SIZE  CONFIG_DESC_SIZE
+static const uint_8  other_speed_config_data[CONFIG_DESC_SIZE] =
+{
+   9,                         /* bLength Length of this descriptor */
+   7,                         /* bDescType This is a Other speed config descr */
+   USB_uint_16_low(OTHER_SPEED_CONFIG_DESC_SIZE), 
+   USB_uint_16_high(OTHER_SPEED_CONFIG_DESC_SIZE),
+   1,
+   1,
+   4,
+   0xc0,
+   0,
+   /* Interface 0 Descriptor - always 9 bytes */
+   9,
+   /* "Interface" type of descriptor */
+   4,
+   /* Number of this interface */
+   MASS_STORAGE_INTERFACE,
+   /* Alternate Setting */
+   0,
+   /* Number of endpoints on this interface */
+   2,
+   /* Interface Class */
+   0x08,
+   /* Interface Subclass: SCSI transparent command set */
+   0x06,
+   /* Interface Protocol: Bulk only protocol */
+   0x50,
+   /* Interface Description String Index */
+   0,
+   /* Endpoint 1 (Bulk In Endpoint), Interface 0 Descriptor - always 7 bytes*/
+   7,
+   /* "Endpoint" type of descriptor */
+   5,
+   /*
+   ** Endpoint address.  The low nibble contains the endpoint number and the
+   ** high bit indicates TX(1) or RX(0).
+   */
+   ((ARC_USB_SEND<<7) | DISK_IN_EP_NO), /*0x81*/
+   /* Attributes.  0=Control 1=Isochronous 2=Bulk 3=Interrupt */
+   DISK_IN_EP_TYPE,
+   /* Max Packet Size for this endpoint */
+   USB_uint_16_low(DISK_HS_MAX_PACKET_SIZE), 
+   USB_uint_16_high(DISK_HS_MAX_PACKET_SIZE),
+   /* Polling Interval (ms) */
+   0,
+   /* Endpoint 2 (Bulk Out Endpoint), Interface 0 Descriptor - always 7 bytes*/
+   7,
+   /* "Endpoint" type of descriptor */
+   5,
+   /*
+   ** Endpoint address.  The low nibble contains the endpoint number and the
+   ** high bit indicates TX(1) or RX(0).
+   */
+   ((ARC_USB_RECV<<7) | DISK_OUT_EP_NO), /*0x02*/
+
+   /* Attributes.  0=Control 1=Isochronous 2=Bulk 3=Interrupt */
+   DISK_OUT_EP_TYPE,
+   /* Max Packet Size for this endpoint */
+   USB_uint_16_low(DISK_HS_MAX_PACKET_SIZE), 
+   USB_uint_16_high(DISK_HS_MAX_PACKET_SIZE),
+   /* Polling Interval (ms) */
+   0
+};
+
+static uint_8 USB_IF_ALT[4] = { 0, 0, 0, 0};
+
+/* number of strings in the table not including 0 or n. */
+static const uint_8 USB_STR_NUM = 7;
+
+/*
+** if the number of strings changes, look for USB_STR_0 everywhere and make 
+** the obvious changes.  It should be found in 3 places.
+*/
+
+static uint_16 USB_STR_0[ 2] = {(0x300 + sizeof(USB_STR_0)),(0x0409)};
+static uint_16 USB_STR_1[26] = {(0x300 + sizeof(USB_STR_1)),
+      'M','a','r','v','e','l','l',' ','S','e','m','i','c','o','n','d','u','c','t','o','r',' ','L','t','d'};       
+static uint_16 USB_STR_2[28] = {(0x300 + sizeof(USB_STR_2)),
+      'M','A','R','V','E','L','L',' ','M','a','s','s',' ','S','t','o','r','a','g','e',' ',\
+      'D','e','v','i','c','e'};
+static uint_16 USB_STR_3[ 5] = {(0x300 + sizeof(USB_STR_3)),
+      'B','E','T','A'};
+static uint_16 USB_STR_4[ 4] = {(0x300 + sizeof(USB_STR_4)),
+      '#','0','2'};
+static uint_16 USB_STR_5[ 4] = {(0x300 + sizeof(USB_STR_5)),
+      '_','A','1'};
+      /* Serial number has to be at least 12 bytes */
+static uint_16 USB_STR_6[ 13] = {(0x300 + sizeof(USB_STR_6)),
+      '0','0','0','0','0','0','0','0','0','0','0','1'};     
+static uint_16 USB_STR_7[15] = {(0x300 + sizeof(USB_STR_7)),
+      'Y','o','u','r',' ','n','a','m','e',' ','h','e','r','e'};
+static uint_16 USB_STR_n[17] = {(0x300 + sizeof(USB_STR_n)),
+      'B','A','D',' ','S','T','R','I','N','G',' ','I','n','d','e','x'};
+
+#define USB_STRING_ARRAY_SIZE  9
+static uint_8_ptr USB_STRING_DESC[USB_STRING_ARRAY_SIZE] =
+{
+   (uint_8_ptr)((pointer)USB_STR_0),
+   (uint_8_ptr)((pointer)USB_STR_1),
+   (uint_8_ptr)((pointer)USB_STR_2),
+   (uint_8_ptr)((pointer)USB_STR_3),
+   (uint_8_ptr)((pointer)USB_STR_4),
+   (uint_8_ptr)((pointer)USB_STR_5),
+   (uint_8_ptr)((pointer)USB_STR_6),
+   (uint_8_ptr)((pointer)USB_STR_7),
+   (uint_8_ptr)((pointer)USB_STR_n)
+};
+
+/*****************************************************************
+MASS STORAGE SPECIFIC GLOBALS
+*****************************************************************/
+
+static const DISK_DEVICE_INFO device_information_data = 
+{
+   0, 0x80, 0, 0x01, 0x1F, 
+   /* Reserved */
+   {0, 0, 0},
+   /* Vendor information: "MARVELL  " */
+   {0x4D, 0x41, 0x52, 0x56, 0x45, 0x4C, 0x4C, 0x20,},
+   /* Product information: "Disk            " */
+   {0x44, 0x69, 0x73, 0x6B, 0x20, 0x20, 0x20, 0x20,
+   0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20}, 
+   /* Product Revision level: "Demo" */
+   {0x44, 0x65, 0x6D, 0x6F}
+}; 
+
+static const DISK_READ_CAPACITY read_capacity = 
+{
+   /* Data for the capacity */
+   {
+      0x00, 0x00, USB_uint_16_high(TOTAL_LOGICAL_ADDRESS_BLOCKS-14), 
+      USB_uint_16_low(TOTAL_LOGICAL_ADDRESS_BLOCKS-14)
+   }, 
+   {
+      0x00, 0x00, USB_uint_16_high(LENGTH_OF_EACH_LAB), 
+      USB_uint_16_low(LENGTH_OF_EACH_LAB)
+   }
+};
+
+static const uint_8 BOOT_SECTOR_AREA[512] = 
+{
+   /* Block 0 is the boot sector. Following is the data in the boot sector */
+   /* 80x86 "short: jump instruction, indicating that the disk is formatted */
+    0xEB, 
+    /* 8-bit displacement */
+    0x3C, 
+    /* NOP OPCode */
+    0x90, 
+    /* 8-bytes for OEM identification: "ARC 4.3 " */
+    0x41, 0x52, 0x43, 0x20, 0x34, 0x2E, 0x33, 0x20, 
+    /* bytes/sector: 512 bytes (0x0200) */
+    0x00, 0x02, 
+    /* Sectors/allocation unit */
+    0x01,
+    /* Reserved sectors: 0x0001 */
+    0x01, 0x00, 
+    /* Number of File Allocation Tables (FATs): 2 */
+    0x02,
+    /* Number of root directory entries */
+    0x00, 0x02, 
+    /* Total Small sectors in logical volume */
+    USB_uint_16_low(TOTAL_LOGICAL_ADDRESS_BLOCKS), 
+    USB_uint_16_high(TOTAL_LOGICAL_ADDRESS_BLOCKS),
+    /* Media descriptor byte: 0xF8: Fixed disk */
+    0xF8,
+    /* Sectors/FAT: 3 (Each FAT starts at a new sector) */
+    0x80, 0x00, 
+    /* Sectors/track: 9 */
+    0x09, 0x00, 
+    /* Number of heads */
+    0x02, 0x00, 
+    /* Number of hidden sectors: 0 */
+    0x00, 0x00, 0x00, 0x00, 
+    /* Total Large sectors in logical volume */
+    0x00, 0x00, 0x00, 0x00, 
+    /* Physical drive number */
+    0x00, 
+    /* Reserved */
+    0x00, 
+    /* Extended boot signature record: 0x29 */
+    0x29,
+    /* 32-bit binary volume ID */
+    0x01, 0x02, 0x03, 0x04, 
+    /* Volume label */
+    0x53, 0x54, 0x55, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 
+    /* Reserved FAT-16*/
+    0x46, 0x41, 0x54, 0x31, 0x36, 0x00, 0x00, 0x00,
+    /* Bootstrap */
+    0x33, 0xC0, 0x8E, 0xD0, 0xBC, 0x00, 0x7C, 0xFC, 0xE8, 0x45, 0x00, 
+    /* String: \r\nNon-System disk\r\nPress any key to reboot\r\n" */
+    0x0D, 0x0A, 0x4E, 0x6F, 0x6E, 0x2D, 0x53, 0x79, 0x73, 0x74, 0x65,
+    0x6D, 0x20, 0x64, 0x69, 0x73, 0x6B, 0x0D, 0x0A, 0x50, 0x72, 0x65, 
+    0x73, 0x73, 0x20, 0x61, 0x6E, 0x79, 0x20, 0x6B, 0x65, 0x79, 0x20, 
+    0x74, 0x6F, 0x20, 0x72, 0x65, 0x62, 0x6F, 0x6F, 0x74, 0x0D, 0x0A, 
+    0x5E, 0xEB, 0x02, 0xCD, 0x10, 0xB4, 0x0E, 0xBB, 0x07, 0x00, 0x2E, 
+    0xAC, 0x84, 0xC0, 0x75, 0xF3, 0x98, 0xCD, 0x16, 0xCD, 0x19, 0xEB, 
+    0xB1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+    /* Partition descriptors */
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0xAA
+};
+
+
+static const uint_8 FAT16_SPECIAL_BYTES[3] = 
+{
+   /* FAT ID: Same as Media descriptor */
+   0xF8, 0xFF, 0xFF
+};
+
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : ch9GetDescription
+* Returned Value : None
+* Comments       :
+*     Chapter 9 GetDescription command
+*     The Device Request can ask for Device/Config/string/interface/endpoint
+*     descriptors (via wValue). We then post an IN response to return the
+*     requested descriptor.
+*     And then wait for the OUT which terminates the control transfer.
+* 
+*END*--------------------------------------------------------------------*/
+static void ch9GetDescription
+   (
+      /* USB handle */
+      _usb_device_handle handle,
+      
+      /* Is it a Setup phase? */
+      boolean setup,
+            
+      /* The setup packet pointer */
+      SETUP_STRUCT_PTR setup_ptr
+   )
+{ /* Body */
+    int                 devNo = _usb_device_get_dev_num(handle);
+    USB_DISK_STRUCT*    pDiskCtrl = usbDisksPtr[devNo];
+    uint_32             max_pkt_size;
+
+    ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_SETUP, "usbDisk %s: setup=%d, value=0x%x, length=%d\n", 
+                __FUNCTION__, (int)setup, setup_ptr->VALUE, setup_ptr->LENGTH);
+
+    if (setup) 
+    {
+        /* Load the appropriate string depending on the descriptor requested.*/
+        switch (setup_ptr->VALUE & 0xFF00) 
+        {
+            case 0x0100:
+                _usb_device_send_data(handle, 0, pDiskCtrl->DevDesc,
+                    MIN(setup_ptr->LENGTH, DEVICE_DESCRIPTOR_SIZE));
+                break;
+
+            case 0x0200:
+                /* Set the Max Packet Size in the config and other speed config */
+                if(pDiskCtrl->speed == ARC_USB_SPEED_HIGH) 
+                {
+                    max_pkt_size = pDiskCtrl->hsMaxPktSize;
+                } 
+                else 
+                {
+                    max_pkt_size = pDiskCtrl->fsMaxPktSize;
+                } /* Endif */
+        
+                *(pDiskCtrl->ConfigDesc + CFG_DESC_EP_IN_TYPE_OFFSET) = (uint_8)pDiskCtrl->inEpType;
+
+                *(pDiskCtrl->ConfigDesc + CFG_DESC_EP_IN_MAX_PACKET_SIZE_OFFSET) = 
+                                                USB_uint_16_low(max_pkt_size);
+                *(pDiskCtrl->ConfigDesc + CFG_DESC_EP_IN_MAX_PACKET_SIZE_OFFSET+1) = 
+                                                USB_uint_16_high(max_pkt_size);
+
+                *(pDiskCtrl->ConfigDesc + CFG_DESC_EP_OUT_TYPE_OFFSET) = (uint_8)pDiskCtrl->outEpType;
+
+                *(pDiskCtrl->ConfigDesc + CFG_DESC_EP_OUT_MAX_PACKET_SIZE_OFFSET) = 
+                                                USB_uint_16_low(max_pkt_size);
+                *(pDiskCtrl->ConfigDesc + CFG_DESC_EP_OUT_MAX_PACKET_SIZE_OFFSET+1) = 
+                                                USB_uint_16_high(max_pkt_size);
+
+                _usb_device_send_data(handle, 0, pDiskCtrl->ConfigDesc,
+                            MIN(setup_ptr->LENGTH, CONFIG_DESC_SIZE));
+                break;
+
+            case 0x0300:
+                if ((setup_ptr->VALUE & 0x00FF) > USB_STR_NUM) {
+                    _usb_device_send_data(handle, 0, USB_STRING_DESC[USB_STR_NUM+1],
+                            MIN(setup_ptr->LENGTH, USB_STRING_DESC[USB_STR_NUM+1][0]));
+                } 
+                else 
+                {
+                    _usb_device_send_data(handle, 0, USB_STRING_DESC[setup_ptr->VALUE & 0x00FF],
+                            MIN(setup_ptr->LENGTH, USB_STRING_DESC[setup_ptr->VALUE & 0x00FF][0]));
+                } /* Endif */      
+                break;
+            
+            case 0x600:
+                _usb_device_send_data(handle, 0, (uint_8_ptr)pDiskCtrl->DevQualifierDesc, 
+                        MIN(setup_ptr->LENGTH, DEVICE_QUALIFIER_DESCRIPTOR_SIZE));
+                break;
+            
+            case 0x700:
+                if(pDiskCtrl->speed == ARC_USB_SPEED_HIGH) 
+                {
+                    max_pkt_size = pDiskCtrl->fsMaxPktSize;
+                } 
+                else 
+                {
+                    max_pkt_size = pDiskCtrl->hsMaxPktSize;
+                } /* Endif */
+            
+                *(pDiskCtrl->other_speed_config + CFG_DESC_EP_IN_TYPE_OFFSET) = (uint_8)pDiskCtrl->inEpType;
+
+                *(pDiskCtrl->other_speed_config + CFG_DESC_EP_IN_MAX_PACKET_SIZE_OFFSET) = 
+                    USB_uint_16_low(max_pkt_size);
+                *(pDiskCtrl->other_speed_config + CFG_DESC_EP_IN_MAX_PACKET_SIZE_OFFSET+1) = 
+                    USB_uint_16_high(max_pkt_size);
+
+                *(pDiskCtrl->other_speed_config + CFG_DESC_EP_OUT_TYPE_OFFSET) = (uint_8)pDiskCtrl->outEpType;
+
+                *(pDiskCtrl->other_speed_config + CFG_DESC_EP_OUT_MAX_PACKET_SIZE_OFFSET) = 
+                    USB_uint_16_low(max_pkt_size);
+                *(pDiskCtrl->other_speed_config + CFG_DESC_EP_OUT_MAX_PACKET_SIZE_OFFSET+1) = 
+                    USB_uint_16_high(max_pkt_size);
+            
+                _usb_device_send_data(handle, 0, (uint_8_ptr)pDiskCtrl->other_speed_config, 
+                            MIN(setup_ptr->LENGTH, OTHER_SPEED_CONFIG_DESC_SIZE));
+               
+                break;
+
+            default:
+                USB_printf("usbDisk_%d, %s: Unexpected VALUE=0x%04x\n", 
+                        _usb_device_get_dev_num(handle), __FUNCTION__, setup_ptr->VALUE);
+                _usb_device_stall_endpoint(handle, 0, ARC_USB_RECV);
+                return;
+        } /* Endswitch */
+        /* status phase */
+        _usb_device_recv_data(handle, 0, NULL, 0);
+    } /* Endif */
+    return;
+} /* Endbody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : ch9SetDescription
+* Returned Value : None
+* Comments       :
+*     Chapter 9 SetDescription command
+* 
+*END*--------------------------------------------------------------------*/
+static void ch9SetDescription
+   (
+      /* USB handle */
+      _usb_device_handle handle,
+      
+      /* Is it a Setup phase? */
+      boolean setup,
+            
+      /* The setup packet pointer */
+      SETUP_STRUCT_PTR setup_ptr
+   )
+{ /* Body */
+   USB_printf("usbDisk_%d, %s: setup=%d\n", 
+        _usb_device_get_dev_num(handle), __FUNCTION__, (int)setup);
+   _usb_device_stall_endpoint(handle, 0, ARC_USB_RECV);
+
+   return;
+} /* Endbody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : ch9GetConfig
+* Returned Value : None
+* Comments       :
+*     Chapter 9 GetConfig command
+* 
+*END*--------------------------------------------------------------------*/
+static void ch9GetConfig
+   (
+      /* USB handle */
+      _usb_device_handle handle,
+      
+      /* Is it a Setup phase? */
+      boolean setup,
+            
+      /* The setup packet pointer */
+      SETUP_STRUCT_PTR setup_ptr
+   )
+{ /* Body */
+    uint_16             current_config;
+    int                 devNo = _usb_device_get_dev_num(handle);
+    USB_DISK_STRUCT*    pDiskCtrl = usbDisksPtr[devNo];
+
+    ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_SETUP, "usbDisk %s: setup=%d\n", __FUNCTION__, (int)setup);
+
+    /* Return the currently selected configuration */
+    if (setup)
+    { 
+        _usb_device_get_status(handle, ARC_USB_STATUS_CURRENT_CONFIG,
+                                &current_config);
+        *pDiskCtrl->epTemp_buf = (current_config & 0xFF);      
+        _usb_device_send_data(handle, 0, pDiskCtrl->epTemp_buf, sizeof(uint_8));
+        /* status phase */
+        _usb_device_recv_data(handle, 0, NULL, 0);
+    } /* Endif */
+    return;
+} /* Endbody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : ch9SetConfig
+* Returned Value : None
+* Comments       :
+*     Chapter 9 SetConfig command
+* 
+*END*--------------------------------------------------------------------*/
+static void ch9SetConfig
+   (
+      /* USB handle */
+      _usb_device_handle handle,
+      
+      /* Is it a Setup phase? */
+      boolean setup,
+            
+      /* The setup packet pointer */
+      SETUP_STRUCT_PTR setup_ptr
+   )
+{ /* Body */
+    int                 devNo = _usb_device_get_dev_num(handle);
+    USB_DISK_STRUCT*    pDiskCtrl = usbDisksPtr[devNo];
+    uint_16             usb_state;
+    uint_32             max_pkt_size;
+   
+    ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_SETUP, "usbDisk %s: setup=%d, value=0x%x\n", 
+                    __FUNCTION__, (int)setup, setup_ptr->VALUE);
+
+    if (setup) 
+    {
+        if ((setup_ptr->VALUE & 0x00FF) > 1) 
+        {
+            /* generate stall */
+            USB_printf("usbDisk_%d, %s: Wrong VALUE=0x%04x\n", 
+                    _usb_device_get_dev_num(handle), __FUNCTION__, setup_ptr->VALUE);
+            _usb_device_stall_endpoint(handle, 0, ARC_USB_RECV);
+            return;
+        } /* Endif */
+
+        /* 0 indicates return to unconfigured state */
+        if ((setup_ptr->VALUE & 0x00FF) == 0) 
+        {
+            _usb_device_get_status(handle, ARC_USB_STATUS_DEVICE_STATE, &usb_state);
+            if( (usb_state == ARC_USB_STATE_CONFIG) || 
+                (usb_state == ARC_USB_STATE_ADDRESS) ) 
+            {
+                /* clear the currently selected config value */
+                _usb_device_set_status(handle, ARC_USB_STATUS_CURRENT_CONFIG, 0);
+                _usb_device_set_status(handle, ARC_USB_STATUS_DEVICE_STATE,
+                                                    ARC_USB_STATE_ADDRESS);
+                /* status phase */      
+                _usb_device_send_data(handle, 0, 0, 0);
+            } 
+            else 
+            {
+                USB_printf("usbDisk_%d, %s: Wrong usb_state=%d\n", 
+                    _usb_device_get_dev_num(handle), __FUNCTION__, usb_state);
+                _usb_device_stall_endpoint(handle, 0, ARC_USB_RECV);
+            } /* Endif */
+            return;
+        } /* Endif */
+
+        /*
+        ** If the configuration value (setup_ptr->VALUE & 0x00FF) differs
+        ** from the current configuration value, then endpoints must be
+        ** reconfigured to match the new device configuration
+        */
+        _usb_device_get_status(handle, ARC_USB_STATUS_CURRENT_CONFIG,
+                                                        &usb_state);
+
+        ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_SETUP, "usbDisk: Set configuration: old=%d, new=%d\n", 
+                    usb_state, setup_ptr->VALUE & 0x00FF);
+
+        if (usb_state != (setup_ptr->VALUE & 0x00FF)) 
+        {
+            /* Reconfigure endpoints here */
+            switch (setup_ptr->VALUE & 0x00FF) 
+            {
+                default:
+                break;
+            } /* Endswitch */
+
+            _usb_device_set_status(handle, ARC_USB_STATUS_CURRENT_CONFIG,
+                                    setup_ptr->VALUE & 0x00FF);
+        } /* Endif */
+
+        if (pDiskCtrl->speed == ARC_USB_SPEED_HIGH) 
+        {
+            max_pkt_size = pDiskCtrl->hsMaxPktSize;
+        } 
+        else 
+        {
+            max_pkt_size = pDiskCtrl->fsMaxPktSize;
+        } /* Endif */
+      
+        _usb_device_init_endpoint(handle, pDiskCtrl->outEpNo, max_pkt_size,
+                ARC_USB_RECV, ARC_USB_BULK_ENDPOINT, ARC_USB_DEVICE_DONT_ZERO_TERMINATE);
+        _usb_device_init_endpoint(handle, pDiskCtrl->inEpNo, max_pkt_size,
+                ARC_USB_SEND, ARC_USB_BULK_ENDPOINT, ARC_USB_DEVICE_DONT_ZERO_TERMINATE);
+    
+        if (_usb_device_get_transfer_status(handle, pDiskCtrl->outEpNo, ARC_USB_RECV) == USB_OK) 
+        {
+            _usb_device_recv_data(handle, pDiskCtrl->outEpNo, pDiskCtrl->ep1_buf, 31);
+        } /* Endif */      
+      
+        pDiskCtrl->TEST_ENABLED = TRUE;
+
+        _usb_device_set_status(handle, ARC_USB_STATUS_DEVICE_STATE,
+                                ARC_USB_STATE_CONFIG);
+        /* status phase */
+        _usb_device_send_data(handle, 0, 0, 0);
+
+        USB_printf("USB %s speed disk: config = %d\n", 
+            (pDiskCtrl->speed == ARC_USB_SPEED_HIGH) ? "High" : "Full", 
+            setup_ptr->VALUE & 0x00FF);
+
+    } /* Endif */
+    return;
+} /* Endbody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : ch9GetInterface
+* Returned Value : None
+* Comments       :
+*     Chapter 9 GetInterface command
+* 
+*END*--------------------------------------------------------------------*/
+static void ch9GetInterface
+   (
+      /* USB handle */
+      _usb_device_handle handle,
+      
+      /* Is it a Setup phase? */
+      boolean setup,
+            
+      /* The setup packet pointer */
+      SETUP_STRUCT_PTR setup_ptr
+   )
+{ /* Body */
+    uint_16 usb_state;
+   
+    ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_SETUP, "usbDisk %s: setup=%d\n", __FUNCTION__, (int)setup);
+
+    _usb_device_get_status(handle, ARC_USB_STATUS_DEVICE_STATE, &usb_state);
+    if (usb_state != ARC_USB_STATE_CONFIG) 
+    {
+        USB_printf("usbDisk_%d, %s: Wrong usb_state=%d\n", 
+                    _usb_device_get_dev_num(handle), __FUNCTION__, usb_state);
+        _usb_device_stall_endpoint(handle, 0, ARC_USB_RECV);
+        return;
+    } /* Endif */
+
+    if (setup) 
+    {
+        _usb_device_send_data(handle, 0, &USB_IF_ALT[setup_ptr->INDEX & 0x00FF],
+                            MIN(setup_ptr->LENGTH, sizeof(uint_8)));
+        /* status phase */      
+        _usb_device_recv_data(handle, 0, NULL, 0);
+    } /* Endif */
+    return;
+} /* Endbody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : ch9SetInterface
+* Returned Value : None
+* Comments       :
+*     Chapter 9 SetInterface command
+* 
+*END*--------------------------------------------------------------------*/
+static void ch9SetInterface
+   (
+      /* USB handle */
+      _usb_device_handle handle,
+      
+      /* Is it a Setup phase? */
+      boolean setup,
+            
+      /* The setup packet pointer */
+      SETUP_STRUCT_PTR setup_ptr
+   )
+{ /* Body */
+    ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_SETUP, "usbDisk %s: setup=%d\n", __FUNCTION__, (int)setup);
+
+    if (setup) 
+    {
+        if (setup_ptr->REQUESTTYPE != 0x01) 
+        {
+            USB_printf("usbDisk_%d, %s: Wrong REQUESTTYPE=0x%02x\n", 
+                        _usb_device_get_dev_num(handle), __FUNCTION__, 
+                        setup_ptr->REQUESTTYPE);
+            _usb_device_stall_endpoint(handle, 0, ARC_USB_RECV);
+            return;
+        } /* Endif */
+
+        /*
+        ** If the alternate value (setup_ptr->VALUE & 0x00FF) differs
+        ** from the current alternate value for the specified interface,
+        ** then endpoints must be reconfigured to match the new alternate
+        */
+        if (USB_IF_ALT[setup_ptr->INDEX & 0x00FF]
+                        != (setup_ptr->VALUE & 0x00FF))
+        {
+            USB_IF_ALT[setup_ptr->INDEX & 0x00FF] = (setup_ptr->VALUE & 0x00FF);
+            /* Reconfigure endpoints here. */
+         
+        } /* Endif */
+
+        /* status phase */
+        _usb_device_send_data(handle, 0, 0, 0);
+    } /* Endif */
+    return;
+} /* Endbody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : ch9SynchFrame
+* Returned Value : 
+* Comments       :
+*     Chapter 9 SynchFrame command
+* 
+*END*--------------------------------------------------------------------*/
+static void ch9SynchFrame
+   (
+      /* USB handle */
+      _usb_device_handle handle,
+      
+      /* Is it a Setup phase? */
+      boolean setup,
+            
+      /* The setup packet pointer */
+      SETUP_STRUCT_PTR setup_ptr
+   )
+{ /* Body */
+
+    uint_16             usbStatus;
+    int                 devNo = _usb_device_get_dev_num(handle);
+    USB_DISK_STRUCT*    pDiskCtrl = usbDisksPtr[devNo];
+
+    ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_SETUP, "usbDisk %s: setup=%d\n", 
+                                        __FUNCTION__, (int)setup);
+
+    if (setup) 
+    {
+        if (setup_ptr->REQUESTTYPE != (REQ_RECIP_ENDPOINT | REQ_TYPE_STANDARD | REQ_DIR_OUT) )
+        {
+            USB_printf("usbDisk_%d, %s: Wrong REQUESTTYPE=0x%02x\n", 
+                        _usb_device_get_dev_num(handle), __FUNCTION__, 
+                        setup_ptr->REQUESTTYPE);
+            _usb_device_stall_endpoint(handle, 0, ARC_USB_RECV);
+            return;
+        } /* Endif */
+
+        if ((setup_ptr->INDEX & 0x00FF) >=
+            pDiskCtrl->ConfigDesc[CONFIG_DESC_NUM_INTERFACES])
+        {
+            USB_printf("usbDisk_%d, %s: Wrong INDEX=0x%02x\n", 
+                        _usb_device_get_dev_num(handle), __FUNCTION__, setup_ptr->INDEX);
+            _usb_device_stall_endpoint(handle, 0, ARC_USB_RECV);
+            return;
+        } /* Endif */
+
+        _usb_device_get_status(handle, ARC_USB_STATUS_SOF_COUNT, &usbStatus);
+        pDiskCtrl->epTemp_buf[0] = USB_uint_16_low(usbStatus);
+        pDiskCtrl->epTemp_buf[1] = USB_uint_16_high(usbStatus);
+        _usb_device_send_data(handle, 0, pDiskCtrl->epTemp_buf, MIN(setup_ptr->LENGTH, sizeof(uint_16)));
+        /* status phase */      
+        _usb_device_recv_data(handle, 0, NULL, 0);
+    } /* Endif */
+    return;
+} /* Endbody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : ch9Class
+* Returned Value : 
+* Comments       :
+*     Chapter 9 Class specific request
+*     See section 9.4.11 (page 195) of the USB 1.1 Specification.
+* 
+*END*--------------------------------------------------------------------*/
+static void ch9Class
+   (
+      _usb_device_handle handle,
+      boolean setup,
+      uint_8  direction,
+      SETUP_STRUCT_PTR setup_ptr
+   )
+{ /* Body */
+    int                 devNo = _usb_device_get_dev_num(handle);
+    USB_DISK_STRUCT*    pDiskCtrl = usbDisksPtr[devNo];
+   
+    ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_CLASS, 
+                "usbDisk %s: setup=%d, request=0x%x, value=%d, index=%d, size=%d\n", 
+                __FUNCTION__, (int)setup, setup_ptr->REQUEST,
+                setup_ptr->VALUE, setup_ptr->INDEX, setup_ptr->LENGTH);
+
+    if (setup) 
+    {
+        switch (setup_ptr->REQUEST) 
+        {
+            case 0xFF:
+                /* Bulk-Only Mass Storage Reset: Ready the device for the next 
+                ** CBW from the host 
+                */
+                if ((setup_ptr->VALUE != 0) || 
+                    (setup_ptr->INDEX != MASS_STORAGE_INTERFACE) ||
+                    (setup_ptr->LENGTH != 0)) 
+                {
+                    USB_printf("usbDisk_%d, %s: Wrong Setup: VALUE=%d, INDEX=%d, LENGTH=%d\n", 
+                        _usb_device_get_dev_num(handle), __FUNCTION__, setup_ptr->VALUE, 
+                        setup_ptr->INDEX, setup_ptr->LENGTH);
+
+                    _usb_device_stall_endpoint(handle, 0, 0);
+                } 
+                else 
+                { /* Body */
+                    pDiskCtrl->CBW_PROCESSED = FALSE;
+                    pDiskCtrl->ZERO_TERMINATE = FALSE;
+                    _usb_device_cancel_transfer(handle, pDiskCtrl->outEpNo, ARC_USB_RECV);
+                    _usb_device_cancel_transfer(handle, pDiskCtrl->inEpNo, ARC_USB_SEND);
+               
+                    /* unstall bulk endpoint */
+                    _usb_device_unstall_endpoint(handle, pDiskCtrl->outEpNo, ARC_USB_RECV);
+                    _usb_device_unstall_endpoint(handle, pDiskCtrl->inEpNo, ARC_USB_SEND);
+               
+                    _usb_device_recv_data(handle, pDiskCtrl->outEpNo, pDiskCtrl->ep1_buf, 31);
+                    /* send zero packet to control pipe */
+                    _usb_device_send_data(handle, 0, NULL, 0);
+                } /* Endbody */
+                break;
+
+            case 0xFE:
+                /* For Get Max LUN use any of these responses*/
+                if (setup_ptr->LENGTH == 0) 
+                { /* Body */
+
+                    USB_printf("usbDisk_%d, %s: Wrong Length: LENGTH=%d\n", 
+                        _usb_device_get_dev_num(handle), __FUNCTION__, setup_ptr->LENGTH);
+
+                    _usb_device_stall_endpoint(handle, 0, 0);
+                } 
+                else
+                {
+                    if ((setup_ptr->VALUE != 0) ||
+                        (setup_ptr->INDEX != MASS_STORAGE_INTERFACE) ||
+                        (setup_ptr->LENGTH != 1)) 
+                    { /* Body */
+                        USB_printf("usbDisk_%d, %s: Wrong Setup: VALUE=%d, INDEX=%d, LENGTH=%d\n", 
+                                    _usb_device_get_dev_num(handle), __FUNCTION__, setup_ptr->VALUE, 
+                                    setup_ptr->INDEX, setup_ptr->LENGTH);
+                        _usb_device_stall_endpoint(handle, 0, 0);
+                    } 
+                    else 
+                    { /* Body */
+                        /* Send Max LUN = 0 to the the control pipe */
+                        *pDiskCtrl->epTemp_buf = 0;
+                        _usb_device_send_data(handle, 0, pDiskCtrl->epTemp_buf, 1);
+                        /* status phase */
+                        _usb_device_recv_data(handle, 0, 0, 0);
+                    } /* Endbody */     
+                }
+                break;
+
+            default :
+                USB_printf("usbDisk_%d, %s: Wrong REQUEST=0x%02x\n", 
+                    _usb_device_get_dev_num(handle), __FUNCTION__, setup_ptr->REQUEST);
+                _usb_device_stall_endpoint(handle, 0, 0);
+                return;
+        } /* EndSwitch */
+    } 
+    return;
+} /* Endbody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : service_ep0
+* Returned Value : None
+* Comments       :
+*     Called upon a completed endpoint 0 (USB 1.1 Chapter 9) transfer
+* 
+*END*--------------------------------------------------------------------*/
+static void service_ep0
+   (
+      /* [IN] Handle of the USB device */
+      _usb_device_handle   handle,
+
+      /* [IN] request type as registered */
+      uint_8               type,
+
+      /* [IN] Is it a setup packet? */
+      boolean              setup,
+      
+      /* [IN] Direction of the transfer.  Is it transmit? */
+      uint_8               direction,
+      
+      /* [IN] Pointer to the data buffer */
+      uint_8_ptr           buffer,
+      
+      /* [IN] Length of the transfer */
+      uint_32              length,
+      
+      /* [IN] Error, if any */
+      uint_8               error
+            
+   )
+{ /* Body */
+    int                 devNo = _usb_device_get_dev_num(handle);
+    USB_DISK_STRUCT*    pDiskCtrl = usbDisksPtr[devNo];
+    SETUP_STRUCT*       pSetupPacket = &pDiskCtrl->local_setup_packet;
+
+   if (setup) 
+   {
+      _usb_device_read_setup_data(handle, 0, (uint_8_ptr)pSetupPacket);
+        pSetupPacket->VALUE = USB_16BIT_LE(pSetupPacket->VALUE);
+        pSetupPacket->INDEX = USB_16BIT_LE(pSetupPacket->INDEX);
+        pSetupPacket->LENGTH = USB_16BIT_LE(pSetupPacket->LENGTH);
+   }
+   
+   ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_EP0,
+              "disk %s: setup=%s, dir=%s, pBuf=0x%x, length=%d, reqType=0x%x, req=0x%x\n",
+                    __FUNCTION__, (setup ? "YES" : "NO"), 
+                    (direction == ARC_USB_RECV) ? "RECV" : "SEND", 
+                    (unsigned)buffer, (int)length, pSetupPacket->REQUESTTYPE, 
+                    pSetupPacket->REQUEST);
+
+   switch (pSetupPacket->REQUESTTYPE & REQ_TYPE_MASK) 
+   {
+      case REQ_TYPE_STANDARD:
+         switch (pSetupPacket->REQUEST) 
+         {
+            case REQ_GET_STATUS:
+               mvUsbCh9GetStatus(handle, setup, pSetupPacket);
+               break;
+
+            case REQ_CLEAR_FEATURE:
+               mvUsbCh9ClearFeature(handle, setup, pSetupPacket);
+               break;
+
+            case REQ_SET_FEATURE:
+               mvUsbCh9SetFeature(handle, setup, pSetupPacket);
+               break;
+
+            case REQ_SET_ADDRESS:
+               mvUsbCh9SetAddress(handle, setup, pSetupPacket);
+               break;
+
+            case REQ_GET_DESCRIPTOR:
+               ch9GetDescription(handle, setup, pSetupPacket);
+               break;
+
+            case REQ_SET_DESCRIPTOR:
+               ch9SetDescription(handle, setup, pSetupPacket);
+               break;
+
+            case REQ_GET_CONFIGURATION:
+               ch9GetConfig(handle, setup, pSetupPacket);
+               break;
+
+            case REQ_SET_CONFIGURATION:
+               ch9SetConfig(handle, setup, pSetupPacket);
+               break;
+
+            case REQ_GET_INTERFACE:
+               ch9GetInterface(handle, setup, pSetupPacket);
+               break;
+
+            case REQ_SET_INTERFACE:
+               ch9SetInterface(handle, setup, pSetupPacket);
+               break;
+
+            case REQ_SYNCH_FRAME:
+               ch9SynchFrame(handle, setup, pSetupPacket);
+               break;
+
+            default:
+                USB_printf("usbDisk_%d, %s: Wrong REQUEST = 0x%02x\n", 
+                        _usb_device_get_dev_num(handle), __FUNCTION__, pSetupPacket->REQUEST);
+               _usb_device_stall_endpoint(handle, 0, 0);
+               break;
+
+         } /* Endswitch */
+         
+         break;
+
+      case REQ_TYPE_CLASS:
+         /* class specific request */
+         ch9Class(handle, setup, direction, pSetupPacket);
+         return;
+
+      case REQ_TYPE_VENDOR:
+         /* vendor specific request can be handled here*/
+         USB_printf("usbDisk_%d, %s: Vendor REQUESTTYPE (%d) not supported\n", 
+               _usb_device_get_dev_num(handle), __FUNCTION__, REQ_TYPE_VENDOR);
+         
+         _usb_device_stall_endpoint(handle, 0, 0);
+         break;
+      
+      default:
+         USB_printf("usbDisk_%d, %s: Unexpected REQUESTTYPE = 0x%x\n", 
+                _usb_device_get_dev_num(handle), __FUNCTION__, 
+                pSetupPacket->REQUESTTYPE);
+         
+         _usb_device_stall_endpoint(handle, 0, 0);
+         break;
+         
+   } /* Endswitch */
+   
+   return;
+} /* Endbody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : _process_inquiry_command
+* Returned Value : None
+* Comments       :
+*     Process a Mass storage class Inquiry command
+* 
+*END*--------------------------------------------------------------------*/
+void _process_inquiry_command
+   (
+      /* [IN] Handle of the USB device */
+      _usb_device_handle   handle,
+            
+      /* [IN] Endpoint number */
+      uint_8               ep_num,
+      
+      /* [IN] Pointer to the data buffer */
+      CBW_STRUCT_PTR       cbw_ptr
+   )
+{ /* Body */
+    int                 devNo = _usb_device_get_dev_num(handle);
+    USB_DISK_STRUCT*    pDiskCtrl = usbDisksPtr[devNo];
+
+    if (cbw_ptr->DCBWDATALENGTH) 
+    {
+        if (cbw_ptr->BMCBWFLAGS & USB_CBW_DIRECTION_BIT) 
+        {      
+            /* Send the device information */
+            _usb_device_send_data(handle, pDiskCtrl->inEpNo, (uint_8_ptr)&device_information_data, 36);
+        } /* Endif */
+    } /* Endif */
+   
+    /* The actual length will never exceed the DCBWDATALENGTH */            
+    pDiskCtrl->pCSW->DCSWDATARESIDUE = USB_32BIT_LE(cbw_ptr->DCBWDATALENGTH - 36);
+    pDiskCtrl->pCSW->BCSWSTATUS = 0;
+   
+} /* EndBody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : _process_unsupported_command
+* Returned Value : None
+* Comments       :
+*     Responds appropriately to unsupported commands
+* 
+*END*--------------------------------------------------------------------*/
+void _process_unsupported_command
+   (
+      /* [IN] Handle of the USB device */
+      _usb_device_handle   handle,
+            
+      /* [IN] Endpoint number */
+      uint_8               ep_num,
+      
+      /* [IN] Pointer to the data buffer */
+      CBW_STRUCT_PTR       cbw_ptr
+   )
+{ /* Body */
+    int                 devNo = _usb_device_get_dev_num(handle);
+    USB_DISK_STRUCT*    pDiskCtrl = usbDisksPtr[devNo];
+   
+    ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_DISK, 
+                    "disk unsupported command: BMCBWFLAGS = 0x%02x\n", cbw_ptr->BMCBWFLAGS);
+
+    /* The actual length will never exceed the DCBWDATALENGTH */
+    pDiskCtrl->pCSW->DCSWDATARESIDUE = 0;
+    pDiskCtrl->pCSW->BCSWSTATUS = 0;
+
+    if (cbw_ptr->BMCBWFLAGS & USB_CBW_DIRECTION_BIT) 
+    {      
+        /* Send a zero-length packet */
+        _usb_device_send_data(handle, pDiskCtrl->inEpNo, (uint_8_ptr)NULL, 0);
+    } 
+    else 
+    {
+        pDiskCtrl->CBW_PROCESSED = FALSE;
+        /* Send the command status information */
+        _usb_device_send_data(handle, pDiskCtrl->inEpNo, (uint_8_ptr)pDiskCtrl->pCSW, 13);
+        _usb_device_recv_data(handle, pDiskCtrl->outEpNo, pDiskCtrl->ep1_buf, 31);
+    } /* Endif */
+   
+} /* EndBody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : _process_report_capacity
+* Returned Value : None
+* Comments       :
+*     Reports the media capacity as a response to READ CAPACITY Command.
+* 
+*END*--------------------------------------------------------------------*/
+void _process_report_capacity
+   (
+      /* [IN] Handle of the USB device */
+      _usb_device_handle   handle,
+            
+      /* [IN] Endpoint number */
+      uint_8               ep_num,
+      
+      /* [IN] Pointer to the data buffer */
+      CBW_STRUCT_PTR       cbw_ptr
+   )
+{ /* Body */
+    int                 devNo = _usb_device_get_dev_num(handle);
+    USB_DISK_STRUCT*    pDiskCtrl = usbDisksPtr[devNo];
+
+    ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_DISK_CAP, 
+                    "disk read_capacity: BMCBWFLAGS = 0x%02x\n", cbw_ptr->BMCBWFLAGS);
+
+    if (cbw_ptr->BMCBWFLAGS & USB_CBW_DIRECTION_BIT) 
+    {      
+        /* Send a zero-length packet */
+        _usb_device_send_data(handle, pDiskCtrl->inEpNo, (uint_8_ptr)pDiskCtrl->pReadCapacity, 8);
+      
+    } /* Endif */
+   
+    /* The actual length will never exceed the DCBWDATALENGTH */            
+    pDiskCtrl->pCSW->DCSWDATARESIDUE = 0;
+    pDiskCtrl->pCSW->BCSWSTATUS = 0;
+   
+} /* EndBody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : _process_read_command
+* Returned Value : None
+* Comments       :
+*     Sends data as a response to READ Command.
+* 
+*END*--------------------------------------------------------------------*/
+void _process_read_command
+   (
+      /* [IN] Handle of the USB device */
+      _usb_device_handle   handle,
+            
+      /* [IN] Endpoint number */
+      uint_8               ep_num,
+      
+      /* [IN] Pointer to the data buffer */
+      CBW_STRUCT_PTR       cbw_ptr
+   )
+{ /* Body */
+    uint_32             index1 = 0, index2 = 0;
+    uint_32             max_pkt_size, byteSize;
+    int                 devNo = _usb_device_get_dev_num(handle);
+    USB_DISK_STRUCT*    pDiskCtrl = usbDisksPtr[devNo];
+
+    if (cbw_ptr->BMCBWFLAGS & USB_CBW_DIRECTION_BIT) 
+    {                
+      /* Send a zero-length packet */
+      index1  = ((uint_32)cbw_ptr->CBWCB[4] << 8);
+      index1  |= cbw_ptr->CBWCB[5];
+      index2 = ((uint_32)cbw_ptr->CBWCB[7] << 8);
+      index2 |= (uint_32)cbw_ptr->CBWCB[8];
+
+      ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_DISK_READ, 
+                    "disk read: FLAGS=0x%02x, LENGTH=0x%x, index1=0x%x, index2=0x%x\n", 
+                    cbw_ptr->BMCBWFLAGS, cbw_ptr->DCBWDATALENGTH, index1, index2);
+
+      if(cbw_ptr->CBWCB[0] != 0x3E)
+      {
+          byteSize = index2 * LENGTH_OF_EACH_LAB;
+      }
+      else
+      {
+          byteSize = index2;
+          index2 = (USB_MEM_ALIGN(byteSize, LENGTH_OF_EACH_LAB) / LENGTH_OF_EACH_LAB);
+      }
+
+      /* Check index validities */
+      if( (index1 + index2) >= pDiskCtrl->logicalBlocks)
+      {
+          USB_printf("USB disk read: invalid indexes - addr=%d, size=%d\n",
+                        index1, index2);
+          pDiskCtrl->pCSW->DCSWDATARESIDUE = USB_32BIT_LE(cbw_ptr->DCBWDATALENGTH);
+          pDiskCtrl->pCSW->BCSWSTATUS = 1;
+          /* Send zero size packet */
+          _usb_device_send_data(handle, pDiskCtrl->inEpNo, (uint_8_ptr)NULL, 0);
+          return;
+      }
+ 
+      if (cbw_ptr->DCBWDATALENGTH == 0) 
+      { /* Body */
+         pDiskCtrl->pCSW->DCSWDATARESIDUE = 0;
+         pDiskCtrl->pCSW->BCSWSTATUS = 2;
+         pDiskCtrl->CBW_PROCESSED = FALSE;
+         /* Send the command status information */
+         _usb_device_send_data(handle, pDiskCtrl->inEpNo, (uint_8_ptr)pDiskCtrl->pCSW, 13);
+         _usb_device_recv_data(handle, pDiskCtrl->outEpNo, pDiskCtrl->ep1_buf, 31);
+         return;
+      } 
+      else 
+      { /* Body */
+         pDiskCtrl->pCSW->DCSWDATARESIDUE = 0;
+         pDiskCtrl->pCSW->BCSWSTATUS = 0;         
+         if (byteSize > cbw_ptr->DCBWDATALENGTH) 
+         { /* Body */
+            byteSize = cbw_ptr->DCBWDATALENGTH;
+            pDiskCtrl->pCSW->DCSWDATARESIDUE = USB_32BIT_LE(cbw_ptr->DCBWDATALENGTH);
+            pDiskCtrl->pCSW->BCSWSTATUS = 2;
+         } 
+         else 
+         {
+            if (byteSize < cbw_ptr->DCBWDATALENGTH) 
+            { /* Body */
+                pDiskCtrl->pCSW->DCSWDATARESIDUE = USB_32BIT_LE(cbw_ptr->DCBWDATALENGTH - index2);
+                if (byteSize > 0) 
+                { /* Body */
+                    if (pDiskCtrl->speed == ARC_USB_SPEED_HIGH) 
+                    {
+                        max_pkt_size = pDiskCtrl->hsMaxPktSize;
+                    } 
+                    else 
+                    {
+                        max_pkt_size = pDiskCtrl->fsMaxPktSize;
+                    }
+
+                    if( (byteSize % max_pkt_size) == 0) 
+                    { /* Body */
+                        /* Need send a zero terminate packet to host */
+                        pDiskCtrl->ZERO_TERMINATE = TRUE;
+                    } /* Endbody */
+                } /* Endbody */  
+            } /* Endbody */
+         }
+
+         _usb_device_send_data(handle, pDiskCtrl->inEpNo, 
+            pDiskCtrl->MASS_STORAGE_DISK + (index1*LENGTH_OF_EACH_LAB), byteSize);
+      } /* Endbody */
+   } 
+   else 
+   { /* Body */
+      USB_printf("disk read incorrect: FLAGS=0x%02x, LENGTH=0x%x\n", 
+                    cbw_ptr->BMCBWFLAGS, cbw_ptr->DCBWDATALENGTH);
+
+      /* Incorrect but valid CBW */
+      if (cbw_ptr->DCBWDATALENGTH > BUFFERSIZE)
+         byteSize = BUFFERSIZE;
+      else
+         byteSize = cbw_ptr->DCBWDATALENGTH;
+
+      pDiskCtrl->pCSW->DCSWDATARESIDUE = USB_32BIT_LE(cbw_ptr->DCBWDATALENGTH);
+      pDiskCtrl->pCSW->BCSWSTATUS = 2;
+       _usb_device_recv_data(handle, pDiskCtrl->outEpNo, pDiskCtrl->ep1_buf, index2);   
+   } /* Endbody */     
+} /* EndBody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : _process_write_command
+* Returned Value : None
+* Comments       :
+*     Sends data as a response to WRITE Command.
+* 
+*END*--------------------------------------------------------------------*/
+void _process_write_command
+   (
+      /* [IN] Handle of the USB device */
+      _usb_device_handle   handle,
+            
+      /* [IN] Endpoint number */
+      uint_8               ep_num,
+      
+      /* [IN] Pointer to the data buffer */
+      CBW_STRUCT_PTR       cbw_ptr
+   )
+{ /* Body */
+    uint_32             index1 = 0, index2 = 0;
+    uint_32             byteSize;
+    int                 devNo = _usb_device_get_dev_num(handle);
+    USB_DISK_STRUCT*    pDiskCtrl = usbDisksPtr[devNo];
+
+    if (!(cbw_ptr->BMCBWFLAGS & USB_CBW_DIRECTION_BIT)) 
+    {
+        index1  = ((uint_32)cbw_ptr->CBWCB[4] << 8);
+        index1  |= cbw_ptr->CBWCB[5];
+        index2 = ((uint_32)cbw_ptr->CBWCB[7] << 8);
+        index2 |= (uint_32)cbw_ptr->CBWCB[8];
+        
+        ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_DISK_WRITE, 
+                      "disk write: FLAGS=0x%02x, LENGTH=0x%x, index1=0x%x, index2=0x%x\n", 
+                      cbw_ptr->BMCBWFLAGS, cbw_ptr->DCBWDATALENGTH, index1, index2);
+        
+        if(cbw_ptr->CBWCB[0] != 0x3F)
+        {
+            byteSize = index2 * LENGTH_OF_EACH_LAB;
+        }
+        else
+        {
+            byteSize = index2;
+            index2 = (USB_MEM_ALIGN(byteSize, LENGTH_OF_EACH_LAB) / LENGTH_OF_EACH_LAB);
+        }
+        
+        /* Check index validities */
+        if( (index1 + index2) >= pDiskCtrl->logicalBlocks)
+        {
+            USB_printf("USB disk write: invalid indexes - addr=%d, size=%d\n",
+                          index1, index2);
+            pDiskCtrl->pCSW->DCSWDATARESIDUE = 0;
+            pDiskCtrl->pCSW->BCSWSTATUS = 1;
+            pDiskCtrl->CBW_PROCESSED = FALSE;
+            /* Send the command status information */
+            _usb_device_send_data(handle, pDiskCtrl->inEpNo, (uint_8_ptr)pDiskCtrl->pCSW, 13);
+            _usb_device_recv_data(handle, pDiskCtrl->outEpNo, pDiskCtrl->ep1_buf, 31);
+            return;
+        }
+
+        if (cbw_ptr->DCBWDATALENGTH == 0) 
+        { /* Body */
+            /* Zero transfer length */
+            pDiskCtrl->pCSW->DCSWDATARESIDUE = 0;
+            pDiskCtrl->pCSW->BCSWSTATUS = 2;
+            pDiskCtrl->CBW_PROCESSED = FALSE;
+            
+            /* Send the command status information */
+            _usb_device_send_data(handle, pDiskCtrl->inEpNo, (uint_8_ptr)pDiskCtrl->pCSW, 13);
+            
+            _usb_device_recv_data(handle, pDiskCtrl->outEpNo, pDiskCtrl->ep1_buf, 31);
+            return;
+        } 
+        else 
+        { /* Body */
+            pDiskCtrl->pCSW->DCSWDATARESIDUE = 0;
+            pDiskCtrl->pCSW->BCSWSTATUS = 0;
+         
+            if (byteSize < cbw_ptr->DCBWDATALENGTH) 
+            { /* Body */
+                /* The actual length will never exceed the DCBWDATALENGTH */
+                pDiskCtrl->pCSW->DCSWDATARESIDUE = USB_32BIT_LE(cbw_ptr->DCBWDATALENGTH - byteSize);
+                byteSize = cbw_ptr->DCBWDATALENGTH;
+            } 
+            else if (byteSize > cbw_ptr->DCBWDATALENGTH) 
+            { /* Body */
+                pDiskCtrl->pCSW->DCSWDATARESIDUE = USB_32BIT_LE(cbw_ptr->DCBWDATALENGTH);
+                pDiskCtrl->pCSW->BCSWSTATUS = 2;
+                byteSize = cbw_ptr->DCBWDATALENGTH;
+            } /* Endbody */
+            
+            if (_usb_device_get_transfer_status(handle, pDiskCtrl->outEpNo, ARC_USB_RECV) != USB_OK) 
+            {
+                _usb_device_cancel_transfer(handle, ep_num, ARC_USB_RECV);
+            } /* Endif */
+
+            _usb_device_recv_data(handle, pDiskCtrl->outEpNo, 
+                    pDiskCtrl->MASS_STORAGE_DISK + (index1*LENGTH_OF_EACH_LAB), byteSize);
+        }
+    } 
+    else 
+    { /* Body */
+        USB_printf("disk write incorrect: FLAGS=0x%02x, LENGTH=0x%x\n", 
+                    cbw_ptr->BMCBWFLAGS, cbw_ptr->DCBWDATALENGTH);
+
+        /* Incorrect but valid CBW */
+        pDiskCtrl->pCSW->DCSWDATARESIDUE = USB_32BIT_LE(cbw_ptr->DCBWDATALENGTH);
+        pDiskCtrl->pCSW->BCSWSTATUS = 2;
+        _usb_device_send_data(handle, pDiskCtrl->inEpNo, 0, 0);
+        return;
+    } /* Endbody */
+   
+} /* EndBody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : _process_test_unit_ready
+* Returned Value : None
+* Comments       :
+*     Responds appropriately to unit ready query
+* 
+*END*--------------------------------------------------------------------*/
+void _process_test_unit_ready
+   (
+      /* [IN] Handle of the USB device */
+      _usb_device_handle   handle,
+            
+      /* [IN] Endpoint number */
+      uint_8               ep_num,
+      
+      /* [IN] Pointer to the data buffer */
+      CBW_STRUCT_PTR       cbw_ptr
+   )
+{ /* Body */
+    uint_32             bufSize;
+    int                 devNo = _usb_device_get_dev_num(handle);
+    USB_DISK_STRUCT*    pDiskCtrl = usbDisksPtr[devNo];
+   
+    if ((cbw_ptr->BMCBWFLAGS & USB_CBW_DIRECTION_BIT) ||
+        (cbw_ptr->DCBWDATALENGTH == 0)) 
+    {
+        /* The actual length will never exceed the DCBWDATALENGTH */
+        pDiskCtrl->pCSW->DCSWDATARESIDUE = 0;
+        pDiskCtrl->pCSW->BCSWSTATUS = 0;
+   
+        pDiskCtrl->CBW_PROCESSED = FALSE;
+
+        /* Send the command status information */
+        _usb_device_send_data(handle, pDiskCtrl->inEpNo, (uint_8_ptr)pDiskCtrl->pCSW, 13);
+        _usb_device_recv_data(handle, pDiskCtrl->outEpNo, pDiskCtrl->ep1_buf, 31);
+    } 
+    else 
+    { /* Body */
+      /* Incorrect but valid CBW */
+        if (cbw_ptr->DCBWDATALENGTH > BUFFERSIZE)
+            bufSize = BUFFERSIZE;
+        else
+            bufSize = cbw_ptr->DCBWDATALENGTH;
+
+        pDiskCtrl->pCSW->DCSWDATARESIDUE = USB_32BIT_LE(cbw_ptr->DCBWDATALENGTH);
+        pDiskCtrl->pCSW->BCSWSTATUS = 1;
+        _usb_device_recv_data(handle, pDiskCtrl->outEpNo, pDiskCtrl->ep1_buf, bufSize);
+    } /* Endbody */
+   
+} /* EndBody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : _process_prevent_allow_medium_removal
+* Returned Value : None
+* Comments       :
+*     Responds appropriately to unit ready query
+* 
+*END*--------------------------------------------------------------------*/
+void _process_prevent_allow_medium_removal
+   (
+      /* [IN] Handle of the USB device */
+      _usb_device_handle   handle,
+            
+      /* [IN] Endpoint number */
+      uint_8               ep_num,
+      
+      /* [IN] Pointer to the data buffer */
+      CBW_STRUCT_PTR       cbw_ptr
+   )
+{ /* Body */
+    int                 devNo = _usb_device_get_dev_num(handle);
+    USB_DISK_STRUCT*    pDiskCtrl = usbDisksPtr[devNo];
+
+    /* The actual length will never exceed the DCBWDATALENGTH */
+    pDiskCtrl->pCSW->DCSWDATARESIDUE = 0;
+    pDiskCtrl->pCSW->BCSWSTATUS = 0;
+   
+    pDiskCtrl->CBW_PROCESSED = FALSE;
+
+    /* Send the command status information */
+    _usb_device_send_data(handle, pDiskCtrl->inEpNo, (uint_8_ptr)pDiskCtrl->pCSW, 13);
+    _usb_device_recv_data(handle, pDiskCtrl->outEpNo, pDiskCtrl->ep1_buf, 31);
+   
+} /* EndBody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : _process_mass_storage_command
+* Returned Value : None
+* Comments       :
+*     Process a Mass storage class command
+* 
+*END*--------------------------------------------------------------------*/
+void _process_mass_storage_command
+   (
+      /* [IN] Handle of the USB device */
+      _usb_device_handle   handle,
+            
+      /* [IN] Endpoint number */
+      uint_8               ep_num,
+      
+      /* [IN] Pointer to the data buffer */
+      CBW_STRUCT_PTR       cbw_ptr
+   )
+{ /* Body */
+
+    ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_DISK, 
+                    "disk command: CBWCB[0]=0x%02x, FLAGS=0x%02x, LENGTH=0x%x\n", 
+                    cbw_ptr->CBWCB[0], cbw_ptr->BMCBWFLAGS, cbw_ptr->DCBWDATALENGTH);
+
+   switch (cbw_ptr->CBWCB[0]) 
+   {
+      case 0x00: /* Request the device to report if it is ready */
+         _process_test_unit_ready(handle, ep_num, cbw_ptr);
+         break;
+
+      case 0x12: /* Inquity command. Get device information */
+         _process_inquiry_command(handle, ep_num, cbw_ptr);
+         break;
+
+      case 0x1A:
+         _process_unsupported_command(handle, ep_num, cbw_ptr);
+         break;
+
+      case 0x1E: /* Prevent or allow the removal of media from a removable media device */
+         _process_prevent_allow_medium_removal(handle, ep_num, cbw_ptr);
+         break;
+
+      case 0x23: /* Read Format Capacities. Report current media capacity and 
+                 ** formattable capacities supported by media 
+                  */
+         /* We bahave like already installed medium. No need to send any data */
+         _process_unsupported_command(handle, ep_num, cbw_ptr);
+         break;
+
+      case 0x25: /* Report current media capacity */
+         _process_report_capacity(handle, ep_num, cbw_ptr);
+         break;
+
+      case 0x28: /* Read (10) Transfer binary data from media to the host */
+      case 0x3E:
+          _process_read_command(handle, ep_num, cbw_ptr);
+         break;
+
+      case 0x2A: /* Write (10) Transfer binary data from the host to the media */
+      case 0x3F:
+         _process_write_command(handle, ep_num, cbw_ptr);
+         break;
+
+      case 0x01: /* Position a head of the drive to zero track */
+      case 0x03: /* Transfer status sense data to the host */
+      case 0x04: /* Format unformatted media */
+      case 0x1B: /* Request a request a removable-media device to load or 
+                 ** unload its media 
+                 */
+      case 0x1D: /* Perform a hard reset and execute diagnostics */
+      case 0x2B: /* Seek the device to a specified address */
+      case 0x2E: /* Transfer binary data from the host to the media and 
+                 ** verify data 
+                 */
+      case 0x2F: /* Verify data on the media */
+      case 0x55: /* Allow the host to set parameters in a peripheral */
+      case 0x5A: /* Report parameters to the host */
+      case 0xA8: /* Read (12) Transfer binary data from the media to the host */
+      case 0xAA: /* Write (12) Transfer binary data from the host to the 
+                 ** media 
+                 */
+      default:
+         _process_unsupported_command(handle, ep_num, cbw_ptr);
+         break;
+   } /* Endswitch */
+
+} /* EndBody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : service_ep1
+* Returned Value : None
+* Comments       :
+*     Called upon a completed endpoint 1 (USB 1.1 Chapter 9) transfer
+* 
+*END*--------------------------------------------------------------------*/
+static void service_ep1
+   (
+      /* [IN] Handle of the USB device */
+      _usb_device_handle   handle,
+
+      /* [IN] Service type as registered */
+      uint_8               type,
+      
+      /* [IN] Is it a setup packet? */
+      boolean              setup,
+      
+      /* [IN] Direction of the transfer.  Is it transmit? */
+      uint_8               direction,
+      
+      /* [IN] Pointer to the data buffer */
+      uint_8_ptr           buffer,
+      
+      /* [IN] Length of the transfer */
+      uint_32              length,
+
+      /* [IN] Error, if any */
+      uint_8               error
+            
+   )
+{ /* Body */
+    int                 devNo = _usb_device_get_dev_num(handle);
+    USB_DISK_STRUCT*    pDiskCtrl = usbDisksPtr[devNo];
+    CBW_STRUCT_PTR cbw_ptr = (CBW_STRUCT_PTR)((pointer)buffer);      
+
+    ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_EP1, 
+                    "disk %s: ep=%d, dir=%s, pBuf=0x%x, length=%d, error=0x%x\n",
+                    __FUNCTION__, type, (direction == ARC_USB_RECV) ? "RECV" : "SEND", 
+                    (unsigned)buffer, (int)length, error);
+
+    if ((!direction) && (!pDiskCtrl->CBW_PROCESSED) && (length == 31) && 
+        (cbw_ptr->DCBWSIGNATURE == USB_32BIT_LE(USB_DCBWSIGNATURE))) 
+    {
+        /* A valid CBW was received */
+        pDiskCtrl->pCSW->DCSWSIGNATURE = USB_32BIT_LE(USB_DCSWSIGNATURE);
+        pDiskCtrl->pCSW->DCSWTAG = cbw_ptr->DCBWTAG;
+        pDiskCtrl->CBW_PROCESSED = TRUE;
+
+        /* Swap 32 bit fields if neccessary */
+        cbw_ptr->DCBWDATALENGTH = USB_32BIT_LE(cbw_ptr->DCBWDATALENGTH);
+
+        /* Process the command */
+        _process_mass_storage_command(handle, type, cbw_ptr);
+    } 
+    else 
+    {
+        /* If a CBW was processed then send the status information and 
+        ** queue another cbw receive request, else just queue another CBW receive
+        ** request if we received an invalid CBW 
+        */
+        if (pDiskCtrl->CBW_PROCESSED) 
+        {
+            int     i;
+
+            ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_DISK_DATA, 
+                    "disk %s: ep=%d, dir=%s, pBuf=0x%x, length=%d, error=0x%x\n",
+                    __FUNCTION__, type, (direction == ARC_USB_RECV) ? "RECV" : "SEND", 
+                    (unsigned)buffer, (int)length, error);
+
+            for(i=0; i<64; i++)
+            {
+                if( (i % 16) == 0)
+                {
+                    ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_DISK_DUMP, "\n0x%08x: ", &buffer[i]);
+                }
+                ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_DISK_DUMP, "%02x ", buffer[i]);
+                if( (i % 3) == 0)
+                    ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_DISK_DUMP, " ");                
+            }
+
+            if (pDiskCtrl->ZERO_TERMINATE) 
+            { /* Body */
+                pDiskCtrl->ZERO_TERMINATE = FALSE;
+                _usb_device_send_data(handle, pDiskCtrl->inEpNo, 0, 0);
+            } 
+            else 
+            { /* Body */
+                pDiskCtrl->CBW_PROCESSED = FALSE;
+
+                /* Send the command status information */
+                _usb_device_send_data(handle, pDiskCtrl->inEpNo, (uint_8_ptr)pDiskCtrl->pCSW, 13);        
+                _usb_device_recv_data(handle, pDiskCtrl->outEpNo, pDiskCtrl->ep1_buf, 31);
+            }
+        } 
+        else
+        {
+            if (!direction) 
+            {
+                USB_printf("usbDisk_%d, %s: Wrong direction = %d\n", 
+                    _usb_device_get_dev_num(handle), __FUNCTION__, direction);
+                _usb_device_stall_endpoint(handle, pDiskCtrl->outEpNo, ARC_USB_RECV);
+                _usb_device_stall_endpoint(handle, pDiskCtrl->inEpNo, ARC_USB_SEND);
+
+                /* Invalid CBW received. Queue another receive buffer */
+                _usb_device_recv_data(handle, pDiskCtrl->outEpNo, pDiskCtrl->ep1_buf, 31);  
+            }
+        } /* Endif */
+    } /* Endif */
+   
+    return;
+} /* Endbody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : service_speed
+* Returned Value : None
+* Comments       :
+*     Called upon a speed detection event.
+* 
+*END*--------------------------------------------------------------------*/
+static void service_speed
+   (
+      /* [IN] Handle of the USB device */
+      _usb_device_handle   handle,
+
+      /* [IN] request type as registered */
+      uint_8               type,
+
+      /* [IN] Unused */
+      boolean              setup,
+   
+      /* [IN] Unused */
+      uint_8               direction,
+   
+      /* [IN] Unused */
+      uint_8_ptr           buffer,
+   
+      /* [IN] Unused */
+      uint_32              length,
+
+      /* [IN] Error, if any */
+      uint_8               error
+            
+   )
+{ /* EndBody */
+    int                 devNo = _usb_device_get_dev_num(handle);
+    USB_DISK_STRUCT*    pDiskCtrl = usbDisksPtr[devNo];
+    
+    ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_SPEED, "disk %s: speed = %d\n", __FUNCTION__, (unsigned)length);
+
+    pDiskCtrl->speed = length;
+    return;
+} /* EndBody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : reset_ep0
+* Returned Value : None
+* Comments       :
+*     Called upon a bus reset event.  Initialises the control endpoint.
+* 
+*END*--------------------------------------------------------------------*/
+static void reset_ep0
+   (
+      /* [IN] Handle of the USB device */
+      _usb_device_handle   handle,
+   
+      /* [IN] request type as registered */
+      uint_8               type,
+
+      /* [IN] Unused */
+      boolean              setup,
+   
+      /* [IN] Unused */
+      uint_8               direction,
+   
+      /* [IN] Unused */
+      uint_8_ptr           buffer,
+   
+      /* [IN] Unused */
+      uint_32              length,
+
+      /* [IN] Error, if any */
+      uint_8               error
+            
+   )
+{ /* Body */
+    int                 devNo = _usb_device_get_dev_num(handle);
+    USB_DISK_STRUCT*    pDiskCtrl = usbDisksPtr[devNo];
+    
+    ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_RESET, "disk-%d %s: pDiskCtrl=%p, handle=%p\n", 
+                    devNo, __FUNCTION__, pDiskCtrl, handle);
+
+    /* on a reset always ensure all transfers are cancelled on control EP*/
+    _usb_device_cancel_transfer(handle, 0, ARC_USB_RECV);
+    _usb_device_cancel_transfer(handle, 0, ARC_USB_SEND);
+
+    _usb_device_start(handle);
+    /* Initialize the endpoint 0 in both directions */
+    _usb_device_init_endpoint(handle, 0, pDiskCtrl->DevDesc[DEV_DESC_MAX_PACKET_SIZE], 
+                                ARC_USB_RECV, ARC_USB_CONTROL_ENDPOINT, 0);
+    _usb_device_init_endpoint(handle, 0, pDiskCtrl->DevDesc[DEV_DESC_MAX_PACKET_SIZE], 
+                                ARC_USB_SEND, ARC_USB_CONTROL_ENDPOINT, 0);
+
+
+    if (pDiskCtrl->TEST_ENABLED) 
+    {
+        int out_ep_count=0, in_ep_count=0;
+
+        while(_usb_device_get_transfer_status(handle, pDiskCtrl->outEpNo, ARC_USB_RECV) != 
+                                                    ARC_USB_STATUS_IDLE)
+        {
+            out_ep_count++;
+            _usb_device_cancel_transfer(handle, pDiskCtrl->outEpNo, ARC_USB_RECV);
+        }
+        while(_usb_device_get_transfer_status(handle, pDiskCtrl->inEpNo, ARC_USB_SEND) != 
+                                                    ARC_USB_STATUS_IDLE)
+        {
+            in_ep_count++;
+            _usb_device_cancel_transfer(handle, pDiskCtrl->inEpNo, ARC_USB_SEND);
+        }
+        ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_RESET, "disk %s: out_ep_count=%d, in_ep_count=%d\n", 
+                        __FUNCTION__, out_ep_count, in_ep_count);
+    } /* Endif */
+
+    pDiskCtrl->TEST_ENABLED = FALSE;
+
+    return;
+} /* EndBody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : usbDiskLoad - main task
+* Inputs:
+*   int diskSize  - size of created disk in KBytes    
+* Returned Value : None
+* Comments       :
+*     First function called.  Initialises the USB and registers Chapter 9
+*     callback functions.
+* 
+*END*--------------------------------------------------------------------*/
+_usb_device_handle  usbDiskLoad(int devNo, int diskSize)
+{ /* Body */
+    _usb_device_handle  handle;
+    USB_DISK_STRUCT*    pDiskCtrl;
+    uint_8_ptr          Send_Buffer_aligned;
+    uint_8              error;
+    uint_32             send_data_buffer_size=0;
+    uint_8_ptr          temp;
+    int                 lockKey, i, j;
+    static boolean      isFirst = TRUE;
+
+    ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_INIT, "%s: devNo=%d, diskSize=%d\n", 
+                        __FUNCTION__, devNo, diskSize);
+
+    if(devNo >= MAX_USB_DEVICES)
+    {
+        USB_printf("USB disk: devNo=%d too large\n", devNo);
+        return NULL;
+    }
+
+    /*lock interrupts */
+    lockKey = USB_lock();
+
+    if(isFirst)
+    {
+        for(i=0; i<MAX_USB_DEVICES; i++)
+        {
+            usbDisksPtr[i] = NULL;
+        }
+        /* Swap all USB_STRING_DESC */
+        for(i=0; i<(sizeof(USB_STRING_DESC)/sizeof(USB_STRING_DESC[0])); i++)
+        {
+            uint_16* usbStr = (uint_16*)(USB_STRING_DESC[i]);
+            uint_16 size = (usbStr[0]-0x300)/sizeof(uint_16);
+
+            for(j=0; j<size; j++)
+            {
+                usbStr[j] = USB_16BIT_LE(usbStr[j]);
+            }
+        }
+        isFirst = FALSE;
+    }
+
+    if(usbDisksPtr[devNo] != NULL)
+    {
+        USB_printf("USB disk: devNo=%d is busy\n", devNo);
+        USB_unlock(lockKey);
+        return NULL;
+    }
+
+    /* Allocate Disk control structure */
+    pDiskCtrl = USB_memalloc(sizeof(USB_DISK_STRUCT));
+    if(pDiskCtrl == NULL)
+    {
+        USB_printf("USB disk #%d: Can't allocate USB_DISK_STRUCT (%d bytes)\n", 
+                    devNo, sizeof(USB_DISK_STRUCT));
+        USB_unlock(lockKey);
+        return NULL;
+    }
+    USB_memzero(pDiskCtrl, sizeof(USB_DISK_STRUCT));
+
+    if(diskSize == 0)
+        pDiskCtrl->logicalBlocks = TOTAL_LOGICAL_ADDRESS_BLOCKS;
+    else
+        pDiskCtrl->logicalBlocks = (diskSize*1024)/LENGTH_OF_EACH_LAB;
+
+    if(pDiskCtrl->logicalBlocks < 16)
+    {
+        USB_printf("USB disk size (%d) is too small. Minimum is 8 Kbytes\n",
+                    diskSize);
+        USB_unlock(lockKey);
+        return NULL;
+    }
+    
+    pDiskCtrl->devNo = devNo;
+    pDiskCtrl->hsMaxPktSize = diskHsMaxPktSize;
+    pDiskCtrl->fsMaxPktSize = diskFsMaxPktSize;
+
+    pDiskCtrl->inEpType     = diskInEpType;
+    pDiskCtrl->outEpType    = diskOutEpType;
+
+    pDiskCtrl->inEpNo       = diskInEpNo;
+    pDiskCtrl->outEpNo      = diskOutEpNo;
+
+    /* Initialize the USB interface */
+    error = _usb_device_init(devNo, &handle);
+    if (error != USB_OK) 
+    {
+        USB_unlock(lockKey);
+        USB_printf("\nUSB Initialization failed. Error: %x", error);
+        return NULL;
+    } /* Endif */
+
+    /* Self Power, Remote wakeup disable */
+    _usb_device_set_status(handle, ARC_USB_STATUS_DEVICE, (1 << DEVICE_SELF_POWERED));    
+
+    error = _usb_device_register_service(handle, ARC_USB_SERVICE_EP0, service_ep0);   
+    if (error != USB_OK) 
+    {
+        USB_unlock(lockKey);
+        USB_printf("\nUSB Service Registration failed. Error: %x", error);
+        return NULL;
+    } /* Endif */
+   
+    error = _usb_device_register_service(handle, ARC_USB_SERVICE_BUS_RESET, reset_ep0);   
+    if (error != USB_OK) 
+    {
+        USB_unlock(lockKey);
+        USB_printf("\nUSB Service Registration failed. Error: %x", error);
+        return NULL;
+    } /* Endif */
+   
+    error = _usb_device_register_service(handle, ARC_USB_SERVICE_SPEED_DETECTION, 
+                                                        service_speed);
+    if (error != USB_OK) 
+    {
+        USB_unlock(lockKey);
+        USB_printf("\nUSB Service Registration failed. Error: %x", error);
+        return NULL;
+    } /* Endif */
+         
+    error = _usb_device_register_service(handle, pDiskCtrl->outEpNo, service_ep1);   
+    if (error != USB_OK) 
+    {
+        USB_unlock(lockKey);
+        USB_printf("\nUSB Service Registration failed. Error: %x", error);
+        return NULL;
+    } /* Endif */
+
+    if(pDiskCtrl->outEpNo != pDiskCtrl->inEpNo)
+    {
+        error = _usb_device_register_service(handle, pDiskCtrl->inEpNo, service_ep1);   
+        if (error != USB_OK) 
+        {
+            USB_unlock(lockKey);
+            USB_printf("\nUSB Service Registration failed. Error: %x", error);
+            return NULL;
+        } /* Endif */
+    }
+
+    /**************************************************************************
+    Best way to handle the Data cache is to allocate a large buffer that is
+    cache aligned and keep all data inside it. Flush the line of the cache
+    that you have changed. In this program, we have static data such as 
+    descriptors which never changes. Such data can be kept in this buffer
+    and flushed only once. Note that you can reduce the size of this buffer
+    by aligning the addresses in a different way.   
+    ***************************************************************************/
+    send_data_buffer_size =  (DEVICE_DESCRIPTOR_SIZE +  PSP_CACHE_LINE_SIZE) +
+                            (CONFIG_DESC_SIZE + PSP_CACHE_LINE_SIZE) +
+                            (DEVICE_QUALIFIER_DESCRIPTOR_SIZE + PSP_CACHE_LINE_SIZE) +
+                            (OTHER_SPEED_CONFIG_DESC_SIZE + PSP_CACHE_LINE_SIZE) +
+                            (BUFFERSIZE + PSP_CACHE_LINE_SIZE) +
+                            (EP_TEMP_BUFFERSIZE + PSP_CACHE_LINE_SIZE) + 
+                            (sizeof(DISK_READ_CAPACITY) + PSP_CACHE_LINE_SIZE) +
+                            (sizeof(CSW_STRUCT) + PSP_CACHE_LINE_SIZE) +
+                            (pDiskCtrl->logicalBlocks*LENGTH_OF_EACH_LAB + PSP_CACHE_LINE_SIZE);
+
+    pDiskCtrl->Send_Buffer_Unaligned   = (uint_8_ptr) USB_memalloc(send_data_buffer_size);
+    if (pDiskCtrl->Send_Buffer_Unaligned == NULL) 
+    {
+        USB_unlock(lockKey);
+        USB_printf("diskLoad: Buffer allocation of %d bytes is failed\n", 
+                    (unsigned)send_data_buffer_size);
+        return NULL;
+    }
+   
+    Send_Buffer_aligned = (uint_8_ptr) USB_CACHE_ALIGN((uint_32)pDiskCtrl->Send_Buffer_Unaligned);
+    /* keep a temporary copy of the aligned address */
+    temp = Send_Buffer_aligned;
+   
+    /**************************************************************************
+    Assign pointers to different buffers from it and copy data inside.
+    ***************************************************************************/
+    pDiskCtrl->DevDesc =  (uint_8_ptr) Send_Buffer_aligned;
+    USB_memcopy(DevDescData, pDiskCtrl->DevDesc, DEVICE_DESCRIPTOR_SIZE);
+    Send_Buffer_aligned += ((DEVICE_DESCRIPTOR_SIZE/PSP_CACHE_LINE_SIZE) + 1)* PSP_CACHE_LINE_SIZE; 
+   
+    pDiskCtrl->ConfigDesc =  (uint_8_ptr) Send_Buffer_aligned;
+    USB_memcopy(ConfigDescData, pDiskCtrl->ConfigDesc, CONFIG_DESC_SIZE);
+    Send_Buffer_aligned += ((CONFIG_DESC_SIZE/PSP_CACHE_LINE_SIZE) + 1)* PSP_CACHE_LINE_SIZE; 
+   
+    pDiskCtrl->DevQualifierDesc =  (uint_8_ptr) Send_Buffer_aligned;
+    USB_memcopy(DevQualifierDescData, pDiskCtrl->DevQualifierDesc, DEVICE_QUALIFIER_DESCRIPTOR_SIZE);
+    Send_Buffer_aligned += ((DEVICE_QUALIFIER_DESCRIPTOR_SIZE/PSP_CACHE_LINE_SIZE) + 1) * PSP_CACHE_LINE_SIZE;
+
+    pDiskCtrl->other_speed_config =  (uint_8_ptr) Send_Buffer_aligned;
+    USB_memcopy(other_speed_config_data, pDiskCtrl->other_speed_config, OTHER_SPEED_CONFIG_DESC_SIZE);
+    Send_Buffer_aligned += ((OTHER_SPEED_CONFIG_DESC_SIZE/PSP_CACHE_LINE_SIZE) + 1)* PSP_CACHE_LINE_SIZE; 
+
+    /*buffer to receive data from Bulk OUT */
+    pDiskCtrl->ep1_buf =  (uint_8_ptr) Send_Buffer_aligned;
+    USB_memzero(pDiskCtrl->ep1_buf, BUFFERSIZE);
+    Send_Buffer_aligned += ((BUFFERSIZE/PSP_CACHE_LINE_SIZE) + 1)* PSP_CACHE_LINE_SIZE;
+   
+    /*buffer for control endpoint to send data */
+    pDiskCtrl->epTemp_buf =  (uint_8_ptr) Send_Buffer_aligned;
+    USB_memzero(pDiskCtrl->epTemp_buf, EP_TEMP_BUFFERSIZE);
+    
+    Send_Buffer_aligned += ((EP_TEMP_BUFFERSIZE/PSP_CACHE_LINE_SIZE) + 1)* PSP_CACHE_LINE_SIZE; 
+
+    /* Buffer for read Capacity message */
+    pDiskCtrl->pReadCapacity = (DISK_READ_CAPACITY*)Send_Buffer_aligned;
+    USB_memcopy((void*)&read_capacity, pDiskCtrl->pReadCapacity, sizeof(DISK_READ_CAPACITY));
+
+    /* Update read_capacity */
+    pDiskCtrl->pReadCapacity->LAST_LOGICAL_BLOCK_ADDRESS[2] = 
+                            USB_uint_16_high(pDiskCtrl->logicalBlocks-14);
+    pDiskCtrl->pReadCapacity->LAST_LOGICAL_BLOCK_ADDRESS[3] = 
+                            USB_uint_16_low(pDiskCtrl->logicalBlocks-14);
+
+    Send_Buffer_aligned += ((sizeof(DISK_READ_CAPACITY)/PSP_CACHE_LINE_SIZE) + 1) * PSP_CACHE_LINE_SIZE; 
+
+    /* Buffer for CSW message */
+    pDiskCtrl->pCSW = (CSW_STRUCT*)Send_Buffer_aligned;
+    USB_memzero(pDiskCtrl->pCSW , sizeof(CSW_STRUCT));
+    
+    Send_Buffer_aligned += ((sizeof(CSW_STRUCT)/PSP_CACHE_LINE_SIZE) + 1) * PSP_CACHE_LINE_SIZE; 
+
+    /*buffer for storage disk */
+    pDiskCtrl->MASS_STORAGE_DISK = (uint_8_ptr)Send_Buffer_aligned;
+    
+    USB_printf("usbDisk-%d: pDiskCtrl=%p, %d bytes allocated addr=0x%x\n", 
+                 devNo, pDiskCtrl, (unsigned)send_data_buffer_size, 
+                 (unsigned)pDiskCtrl->Send_Buffer_Unaligned);
+    USB_printf("usbDisk-%d: DevDesc=0x%x, ConfigDesc=0x%x, QualifierDesc=0x%x, otherSpeedDesc=0x%x\n",
+                 devNo, (unsigned)pDiskCtrl->DevDesc, (unsigned)pDiskCtrl->ConfigDesc, 
+                 (unsigned)pDiskCtrl->DevQualifierDesc, (unsigned)pDiskCtrl->other_speed_config);
+    USB_printf("usbDisk-%d: ep1_buf=0x%x, epTemp_buf=0x%x, MASS_STORAGE_DISK=0x%x\n",
+                 devNo, (unsigned)pDiskCtrl->ep1_buf, (unsigned)pDiskCtrl->epTemp_buf, 
+                 (unsigned)pDiskCtrl->MASS_STORAGE_DISK);
+    
+    USB_memzero(pDiskCtrl->MASS_STORAGE_DISK, (pDiskCtrl->logicalBlocks*LENGTH_OF_EACH_LAB));
+
+    /* Format the "disk" */      
+    USB_memcopy(BOOT_SECTOR_AREA, pDiskCtrl->MASS_STORAGE_DISK, 512);
+
+    /* Update BOOT Sector "Total Small sectors" field */
+    pDiskCtrl->MASS_STORAGE_DISK[19] = USB_uint_16_low(pDiskCtrl->logicalBlocks);
+    pDiskCtrl->MASS_STORAGE_DISK[20] = USB_uint_16_high(pDiskCtrl->logicalBlocks);
+
+    USB_memcopy((void *)FAT16_SPECIAL_BYTES, pDiskCtrl->MASS_STORAGE_DISK + 512, 3);
+    USB_memcopy((void *)FAT16_SPECIAL_BYTES, pDiskCtrl->MASS_STORAGE_DISK + 512*4, 3);
+                         
+    /**************************************************************************
+    Flush the cache to ensure main memory is updated.
+    ***************************************************************************/
+    USB_dcache_flush(temp, send_data_buffer_size);
+
+    pDiskCtrl->usbDevHandle = handle;
+    usbDisksPtr[devNo] = pDiskCtrl;
+
+    USB_unlock(lockKey);
+
+    USB_printf("USB Disk is READY: diskSize=%d KBytes, blockSize=%d Bytes, numBlocks=%d\n",
+                diskSize, LENGTH_OF_EACH_LAB, pDiskCtrl->logicalBlocks);
+
+    return pDiskCtrl->usbDevHandle;
+} /* Endbody */
+
+void    usbDiskUnload(_usb_device_handle handle)
+{
+    int                 lockKey;
+    int                 devNo = _usb_device_get_dev_num(handle);
+    USB_DISK_STRUCT*    pDiskCtrl = usbDisksPtr[devNo];
+
+    if(pDiskCtrl == NULL)
+    {
+        USB_printf("USB disk #%d: Disk is not loaded\n", pDiskCtrl->devNo);
+        return;
+    }
+    /*lock interrupts */
+    lockKey = USB_lock();
+    
+    /* ensure all transfers are cancelled */
+    _usb_device_cancel_transfer(handle, pDiskCtrl->outEpNo, ARC_USB_RECV);
+    _usb_device_cancel_transfer(handle, pDiskCtrl->inEpNo,  ARC_USB_SEND);
+
+    /* Stop Endpoints */
+    _usb_device_deinit_endpoint(handle, pDiskCtrl->outEpNo, ARC_USB_RECV);
+    _usb_device_deinit_endpoint(handle, pDiskCtrl->inEpNo, ARC_USB_SEND);
+
+    _usb_device_deinit_endpoint(handle, 0, ARC_USB_RECV);
+    _usb_device_deinit_endpoint(handle, 0, ARC_USB_SEND);
+
+    _usb_device_stop(handle);
+
+    /* Deregister all services */
+    _usb_device_unregister_service(handle, ARC_USB_SERVICE_EP0);   
+    _usb_device_unregister_service(handle, ARC_USB_SERVICE_BUS_RESET);   
+    _usb_device_unregister_service(handle, ARC_USB_SERVICE_SPEED_DETECTION);
+    _usb_device_unregister_service(handle, pDiskCtrl->outEpNo);   
+    if(pDiskCtrl->outEpNo != pDiskCtrl->inEpNo)
+    {
+        _usb_device_unregister_service(handle, pDiskCtrl->inEpNo);   
+    }
+
+    _usb_device_shutdown(handle);
+
+    /* Free memory allocated for Disk device */
+    if(pDiskCtrl->Send_Buffer_Unaligned != NULL)
+    {
+        USB_memfree(pDiskCtrl->Send_Buffer_Unaligned);
+    }
+
+    /* Free Control structure */
+    USB_memfree(pDiskCtrl);
+    usbDisksPtr[devNo] = NULL;
+
+    USB_unlock(lockKey);
+}
+
+/* EOF */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/examples/mouse.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/examples/mouse.h
@@ -0,0 +1,29 @@
+/*******************************************************************************
+
+This software file (the "File") is distributed by Marvell International Ltd. 
+or its affiliate(s) under the terms of the GNU General Public License Version 2, 
+June 1991 (the "License").  You may use, redistribute and/or modify this File 
+in accordance with the terms and conditions of the License, a copy of which 
+is available along with the File in the license.txt file or by writing to the 
+Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 
+or on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+(C) Copyright 2004 - 2007 Marvell Semiconductor Israel Ltd. All Rights Reserved.
+(C) Copyright 1999 - 2004 Chipidea Microelectronica, S.A. All Rights Reserved.
+
+*******************************************************************************/
+
+#ifndef __mouse_h__
+#define __mouse_h__
+
+extern _usb_device_handle   usbMouseLoad(int devNo);
+extern void                 usbMouseUnload(_usb_device_handle handle);
+extern void                 usbMousePeriodicResume(_usb_device_handle handle);
+
+#endif /* __mouse_h__ */
+/* EOF */
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/examples/mouse.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-orion/mv_hal_drivers/mv_hal/usb/examples/mouse.c
@@ -0,0 +1,1709 @@
+/*******************************************************************************
+
+This software file (the "File") is distributed by Marvell International Ltd. 
+or its affiliate(s) under the terms of the GNU General Public License Version 2, 
+June 1991 (the "License").  You may use, redistribute and/or modify this File 
+in accordance with the terms and conditions of the License, a copy of which 
+is available along with the File in the license.txt file or by writing to the 
+Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 
+or on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+(C) Copyright 2004 - 2007 Marvell Semiconductor Israel Ltd. All Rights Reserved.
+(C) Copyright 1999 - 2004 Chipidea Microelectronica, S.A. All Rights Reserved.
+
+*******************************************************************************/
+
+/**************************************************************************
+Include the USB stack header files.
+**************************************************************************/
+#include "mvUsbDefs.h"
+#include "mvUsbDebug.h"
+#include "mvUsbCh9.h"
+#include "mvUsbDevApi.h"
+
+#include "mouse.h"
+
+
+/**************************************************************************
+global variables and some defines for device.
+**************************************************************************/
+
+#define CONTROL_MAX_PACKET_SIZE         (64)
+#define INTERRUPT_MAX_PACKET_SIZE       (0x0008)
+#define DEV_DESC_MAX_PACKET_SIZE        (7)
+#define INTERRUPT_EP                    (1)
+#define FRAME_INTERVAL                  (15)
+
+/**************************************************************************
+Include the OS and BSP dependent files that define IO functions and
+basic types. You may like to change these files for your board and RTOS 
+**************************************************************************/
+
+int frame_interval = FRAME_INTERVAL;
+int mouseCntr = 0;
+int mouseDelay = 2;
+
+static volatile boolean TEST_ENABLED = FALSE;
+static volatile boolean USB_SUSPENDED = FALSE;
+
+#define EP1_RECV_BUFFER_SIZE 10
+static uint_8_ptr hid_test_rep_data;
+static uint_8_ptr hid_test_rep_data_unaligned;
+
+/********************************
+Buffers for sending data to stack
+********************************/
+#define EP0_SEND_BUFFER_SIZE 200
+static uint_8_ptr Send_Buffer_Unaligned;
+static uint_8_ptr Send_Buffer_aligned;
+
+static uint_8         data_to_send;
+static uint_16        sof_count;
+static SETUP_STRUCT   local_setup_packet;
+
+
+/*************************************************************************
+Device descriptors are always 18 bytes 
+
+Offset|       Field        | Value |  Description  
+------|--------------------|-------|--------------------
+  0   |      bLength       |  0x12 |The size of this 
+      |                    |       |descriptor is 18 bytes
+------|--------------------|-------|--------------------
+  1   |  bDescriptorType   |  0x01 |DEVICE Descriptor Type
+------|--------------------|-------|--------------------
+  2   |       bcdUSB       | 0x0100|Device compliant to 
+      |                    |       |the USB 
+      |                    |       |specification 
+      |                    |       |version 1.00   
+------|--------------------|-------|--------------------
+  4   |    bDeviceClass    |  0x00 |Each interface 
+      |                    |       |specifies its own 
+      |                    |       |class information
+------|--------------------|-------|--------------------
+  5   |  bDeviceSubClass   |  0x00 |Each interface 
+      |                    |       |specifies its own 
+      |                    |       |subclass information
+------|--------------------|-------|--------------------
+  6   |  bDeviceProtocol   |  0x00 |No protocols on the 
+      |                    |       |device basis
+------|--------------------|-------|--------------------
+  7   |  bMaxPacketSize0   |  0x08 |Maximum packet size 
+      |                    |       |for endpoint zero is 8
+------|--------------------|-------|--------------------
+  8   |      idVendor      | 0x0261|Vendor ID is 609: 
+      |                    |       
+------|--------------------|-------|--------------------
+  10  |     idProduct      | 0x4D03|The Product ID is 0x4D03
+------|--------------------|-------|--------------------
+  12  |     bcdDevice      | 0x0441|The device release 
+      |                    |       |number is 4.41
+------|--------------------|-------|--------------------
+  14  |   iManufacturer    |  0x00 |The device doesn't 
+      |                    |       |have the string 
+      |                    |       |descriptor 
+      |                    |       |describing the manufacturer
+------|--------------------|-------|--------------------
+  15  |      iProduct      |  0x00 |The device doesn't 
+      |                    |       |have the string 
+      |                    |       |descriptor 
+      |                    |       |describing the product
+------|--------------------|-------|--------------------
+  16  |   iSerialNumber    |  0x00 | 
+------|--------------------|-------|--------------------
+  17  | bNumConfigurations |  0x01 | 
+------|--------------------|-------|--------------------
+*************************************************************************/
+#define DEVICE_DESCRIPTOR_SIZE 18
+static uint_8_ptr DevDesc;
+static uint_8  DevDescData[DEVICE_DESCRIPTOR_SIZE] =
+{
+   DEVICE_DESCRIPTOR_SIZE,
+   0x01,
+   0x0,2,
+   
+   0x00,
+   0x00,
+   0x00,
+   CONTROL_MAX_PACKET_SIZE,
+   /* Vendor ID = MARVELL */
+   USB_uint_16_low(0x1286), USB_uint_16_high(0x1286),
+   /* Product ID */
+   USB_uint_16_low(0x1), USB_uint_16_high(0x1),
+   /* BCD Device version */
+   USB_uint_16_low(0x0002), USB_uint_16_high(0x0002),
+
+   0x01,                      /* iManufacturer */
+   0x02,                      /* iProduct */
+   0x00,                      /* iSerialNumber */
+   0x01                       /* bNumConfigurations */
+   
+};
+
+/* USB 2.0 specific descriptor */
+#define DEVICE_QUALIFIER_DESCRIPTOR_SIZE 10
+static uint_8_ptr DevQualifierDesc;
+static uint_8  DevQualifierDescData[DEVICE_QUALIFIER_DESCRIPTOR_SIZE] =
+{
+   DEVICE_QUALIFIER_DESCRIPTOR_SIZE,  /* bLength Length of this descriptor */
+   6,                         /* bDescType This is a DEVICE Qualifier descr */
+   0,2,                       /* bcdUSB USB revision 2.0 */
+   0,                         /* bDeviceClass */
+   0,                         /* bDeviceSubClass */
+   0,                         /* bDeviceProtocol */
+   CONTROL_MAX_PACKET_SIZE,  /* bMaxPacketSize0 */
+   0x01,                      /* bNumConfigurations */
+   0
+};
+
+
+/*******************************************************************
+   CONFIG DESCRIPTOR
+
+Data stage (34 bytes) :
+------------------------------------
+
+       CONFIGURATION Descriptor
+       ------------------------
+Offset|        Field        | Value |  Description  
+------|---------------------|-------|--------------------
+  0   |       bLength       |  0x09 |The size of this 
+      |                     |       |descriptor is 9 bytes
+------|---------------------|-------|--------------------
+  1   |   bDescriptorType   |  0x02 |CONFIGURATION 
+      |                     |       |Descriptor Type
+------|---------------------|-------|--------------------
+  2   |    wTotalLength     | 0x0022|The total length of 
+      |                     |       |data for this 
+      |                     |       |configuration is 34. 
+      |                     |       |This includes the 
+      |                     |       |combined length of 
+      |                     |       |all the descriptors returned
+------|---------------------|-------|--------------------
+  4   |   bNumInterfaces    |  0x01 |This configuration 
+      |                     |       |supports 1 interfaces
+------|---------------------|-------|--------------------
+  5   | bConfigurationValue |  0x01 |The value 1 should 
+      |                     |       |be used to select 
+      |                     |       |this configuration
+------|---------------------|-------|--------------------
+  6   |   iConfiguration    |  0x00 |The device doesn't 
+      |                     |       |have the string 
+      |                     |       |descriptor 
+      |                     |       |describing this configuration
+------|---------------------|-------|--------------------
+  7   |    bmAttributes     |  0x80 |Configuration characteristics :
+      |                     |       |Bit 7: Reserved (set to one) 1 
+      |                     |       |Bit 6: Self-powered          0 
+      |                     |       |Bit 5: Remote Wakeup         1 
+------|---------------------|-------|--------------------
+  8   |      MaxPower       |  0x32 |Maximum power 
+      |                     |       |consumption of the 
+      |                     |       |device in this 
+      |                     |       |configuration is 100 mA
+------|---------------------|-------|--------------------
+
+       INTERFACE Descriptor
+       --------------------
+Offset|       Field        | Value |  Description  
+------|--------------------|-------|--------------------
+  0   |      bLength       |  0x09 |The size of this 
+      |                    |       |descriptor is 9 bytes
+------|--------------------|-------|--------------------
+  1   |  bDescriptorType   |  0x04 |INTERFACE Descriptor Type
+------|--------------------|-------|--------------------
+  2   |  bInterfaceNumber  |  0x00 |The number of this 
+      |                    |       |interface is 0
+------|--------------------|-------|--------------------
+  3   | bAlternateSetting  |  0x00 |The value used to 
+      |                    |       |select alternate 
+      |                    |       |setting for this 
+      |                    |       |interface is 0
+------|--------------------|-------|--------------------
+  4   |   bNumEndpoints    |  0x01 |The number of 
+      |                    |       |endpoints used by 
+      |                    |       |this interface is 1 
+      |                    |       |(excluding endpoint zero)
+------|--------------------|-------|--------------------
+  5   |  bInterfaceClass   |  0x03 |The interface 
+      |                    |       |implements HID class
+------|--------------------|-------|--------------------
+  6   | bInterfaceSubClass |  0x01 |The subclass code is 0x01
+------|--------------------|-------|--------------------
+  7   | bInterfaceProtocol |  0x02 |The protocol code is 0x02
+------|--------------------|-------|--------------------
+  8   |     iInterface     |  0x00 |The device doesn't 
+      |                    |       |have the string 
+      |                    |       |descriptor 
+      |                    |       |describing this interface
+------|--------------------|-------|--------------------
+
+       HID Descriptor
+       --------------
+Offset|       Field       | Value |  Description  
+------|-------------------|-------|--------------------
+  0   |      bLength      |  0x09 |The size of this 
+      |                   |       |descriptor is 9 bytes
+------|-------------------|-------|--------------------
+  1   |  bDescriptorType  |  0x21 |HID Descriptor Type
+------|-------------------|-------|--------------------
+  2   |      bcdHID       | 0x0100|Device compliant to 
+      |                   |       |the HID 
+      |                   |       |specification 
+      |                   |       |version 1.00   
+------|-------------------|-------|--------------------
+  4   |   bCountryCode    |  0x00 |The country code is 0x00
+------|-------------------|-------|--------------------
+  5   |  bNumDescriptors  |  0x01 |The number of class 
+      |                   |       |descriptors is 1
+------|-------------------|-------|--------------------
+  6   |  bDescriptorType  |  0x22 |The class descriptor 
+      |                   |       |is Report descriptor
+------|-------------------|-------|--------------------
+  7   | wDescriptorlength | 0x0034|The total size of 
+      |                   |       |the class descriptor 
+      |                   |       |is 52
+------|-------------------|-------|--------------------
+
+       ENDPOINT Descriptor
+       -------------------
+Offset|      Field       | Value |  Description  
+------|------------------|-------|--------------------
+  0   |     bLength      |  0x07 |The size of this 
+      |                  |       |descriptor is 7 bytes
+------|------------------|-------|--------------------
+  1   | bDescriptorType  |  0x05 |ENDPOINT Descriptor Type
+------|------------------|-------|--------------------
+  2   | bEndpointAddress |  0x81 |This is an IN 
+      |                  |       |endpoint with 
+      |                  |       |address (endpoint 
+      |                  |       |number) 1
+------|------------------|-------|--------------------
+  3   |   bmAttributes   |  0x03 |Types - 
+      |                  |       |Transfer:INTERRUPT 
+      |                  |       |Sync:No Sync 
+      |                  |       |Usage:Data EP
+------|------------------|-------|--------------------
+  4   |  wMaxPacketSize  | 0x0004|Maximum packet size 
+      |                  |       |value for this 
+      |                  |       |endpoint is 0x4 
+      |                  |       |(Bits 12-11: Addtl. Transactions/frame)
+------|------------------|-------|--------------------
+  6   |    bInterval     |  0x0A |bInterval:10. The 
+      |                  |       |polling interval 
+      |                  |       |value is bInterval 
+      |                  |       |or 2**(bInterval-1)
+------|------------------|-------|--------------------
+
+*******************************************************************/
+
+
+#define CONFIG_DESC_NUM_INTERFACES  (4)
+
+/* This must be counted manually and updated with the descriptor */
+/* 1*Config(9) + 1*Interface(9) + 1*HID(9) + 1* Endpoint (7)= 34 bytes */
+#define CONFIG_DESC_SIZE            (34)
+
+static uint_8_ptr ConfigDesc;
+
+static uint_8 ConfigDescData[CONFIG_DESC_SIZE] =
+{
+   /*Config Descriptor */
+   0x09,
+   0x02,
+   USB_uint_16_low(CONFIG_DESC_SIZE),
+   USB_uint_16_high(CONFIG_DESC_SIZE),
+   0x01,
+   0x01,
+   0x00,
+   0xE0, /* 0x80, */
+   0x0,
+   /* Interface Descriptor */	
+   0x09,
+   0x04,
+   0x00,
+   0x00,
+   0x01,
+   0x03,
+   0x01,
+   0x02,
+   0x00,
+
+   /* HID descriptor */
+   0x09,
+   0x21,
+   USB_uint_16_low(0x0100),
+   USB_uint_16_high(0x0100),
+   0x00,
+   0x01,
+   0x22,
+   USB_uint_16_low(0x0034),
+   USB_uint_16_high(0x0034),
+ 
+   /*Endpoint descriptor */
+   0x07,
+   0x05,
+   (0x80+INTERRUPT_EP),
+   0x03,
+   USB_uint_16_low(INTERRUPT_MAX_PACKET_SIZE), 
+   USB_uint_16_high(INTERRUPT_MAX_PACKET_SIZE),
+   FRAME_INTERVAL
+};
+
+#define OTHER_SPEED_CONFIG_DESC_SIZE  CONFIG_DESC_SIZE
+static uint_8_ptr  other_speed_config;
+static uint_8  other_speed_config_data[CONFIG_DESC_SIZE] =
+{
+   /*Config Descriptor */
+   0x09,
+   0x07,
+   USB_uint_16_low(CONFIG_DESC_SIZE),
+   USB_uint_16_high(CONFIG_DESC_SIZE),
+   0x01,
+   0x01,
+   0x00,
+   0xE0, /* 0x80, */
+   0x0,
+   /* Interface Descriptor */	
+   0x09,
+   0x04,
+   0x00,
+   0x00,
+   0x01,
+   0x03,
+   0x01,
+   0x02,
+   0x00,
+
+   /* HID descriptor */
+   0x09,
+   0x21,
+   USB_uint_16_low(0x0100),
+   USB_uint_16_high(0x0100),
+   0x00,
+   0x01,
+   0x22,
+   USB_uint_16_low(0x0034),
+   USB_uint_16_high(0x0034),
+ 
+   /*Endpoint descriptor */
+   0x07,
+   0x05,
+   (0x80+INTERRUPT_EP),
+   0x03,
+   USB_uint_16_low(INTERRUPT_MAX_PACKET_SIZE), 
+   USB_uint_16_high(INTERRUPT_MAX_PACKET_SIZE),
+   FRAME_INTERVAL
+
+};
+/************************************************************************
+
+HID Class Report Descriptor :
+
+Item						Value(Hex)
+------------------------------------------------------------------------------------------------------------
+Usage Page (Generic Desktop Control)			05 01 
+Usage (Mouse)					09 02 
+Collection (Application)				A1 01 
+  Usage (Pointer)					09 01 
+  Collection (Physical)				A1 00 
+    Usage Page (Button)				05 09 
+    Usage Minimum (1)				19 01 
+    Usage Maximum (3)				29 03 
+    Logical Minimum (0)				15 00 
+    Logical Maximum (1)				25 01 
+    Report Count (3)					95 03 
+    Report Size (1)					75 01 
+    Input (Data, Variable, Absolute)			81 02 
+    Report Count (1)					95 01 
+    Report Size (5)					75 05 
+    Input (Constant)					81 01 
+    Usage Page (Generic Desktop Control)		05 01 
+    Usage (X)					09 30 
+    Usage (Y)					09 31 
+    Usage (Wheel)					09 38 
+    Logical Minimum (-127)				15 81 
+    Logical Maximum (127)				25 7F 
+    Report Size (8)					75 08 
+    Report Count (3)					95 03 
+    Input (Data, Variable, Relative)			81 06 
+  End Collection					C0 
+End Collection					C0 
+
+
+************************************************************************/
+
+#define REPORT_DESC_SIZE            (52)
+static uint_8_ptr ReportDesc;
+
+static uint_8 ReportDescData[REPORT_DESC_SIZE] =
+{
+   0x05,
+   0x01,
+   0x09,
+   0x02,
+   0xA1,
+   0x01,
+   0x09,
+   0x01,
+   
+   0xA1,
+   0x00,
+   0x05,
+   0x09,
+   0x19,
+   0x01,
+   0x29,
+   0x03,
+   
+   0x15,
+   0x00,
+   0x25,
+   0x01,
+   0x95,
+   0x03,
+   0x75,
+   0x01,
+   
+   0x81,
+   0x02,
+   0x95,
+   0x01,
+   0x75,
+   0x05,
+   0x81,
+   0x01,
+   
+   0x05,
+   0x01,
+   0x09,
+   0x30,
+   0x09,
+   0x31,
+   0x09,
+   0x38,
+   
+   0x15,
+   0x81,
+   0x25,
+   0x7F,
+   0x75,
+   0x08,
+   0x95,
+   0x03,
+   
+   0x81,
+   0x06,
+   0xC0,
+   0xC0   
+};
+
+/**************************************************************
+This report descriptor can be used to report the set_report
+and get_report capability to host. When this is used, modify
+the config descriptor to reflect the size of report descriptor.
+The following lines should be changed,
+
+USB_uint_16_low(0x0038),  //   Changed from USB_uint_16_low(0x0034),
+USB_uint_16_high(0x0038), //   Changed from USB_uint_16_high(0x0034),
+  
+
+
+
+uint_8  ReportDesc[56] = {
+    0x06, 0x00, 0xff,              		// USAGE_PAGE (Generic Desktop)
+    0x09, 0x01,                    		// USAGE (Vendor Usage 1)
+    0xa1, 0x01,                    		// COLLECTION (Application)
+
+    0x09, 0x02,                    		//   USAGE (Vendor Usage 2)
+    0x15, 0x80,                    		//   LOGICAL_MINIMUM (-128)																			
+    0x25, 0x7f,                    		//   LOGICAL_MAXIMUM (127) 																			
+    0x95, 0x01,                    		//   REPORT_COUNT (1)      																			
+    0x75, 0x08,                    		//   REPORT_SIZE (8)       																			
+    0xb1, 0x02,                    		//   FEATURE (Data,Var,Abs)																			
+
+    0x09, 0x03,                    		//   USAGE (Vendor Usage 3)																			
+    0x15, 0x80,                    		//   LOGICAL_MINIMUM (-128)																			
+    0x25, 0x7f,                    		//   LOGICAL_MAXIMUM (127) 																			
+    0x95, 0x01,                    		//   REPORT_COUNT (1)      																			
+    0x75, 0x08,                    		//   REPORT_SIZE (8)
+    0xb1, 0x02,                    		//   FEATURE (Data,Var,Abs)																			
+
+    0x09, 0x04,                    		//   USAGE (Vendor Usage 4)																			
+    0x15, 0x80,                    		//   LOGICAL_MINIMUM (-128)																			
+    0x25, 0x7f,                    		//   LOGICAL_MAXIMUM (127) 																			
+    0x95, 0x01,                    		//   REPORT_COUNT (1)      																			
+    0x75, 0x08,                    		//   REPORT_SIZE (8)
+    0xb1, 0x02,                    		//   FEATURE (Data,Var,Abs)																			
+
+    0x09, 0x05,                    		//   USAGE (Vendor Usage 5)																			
+    0x15, 0x80,                    		//   LOGICAL_MINIMUM (-128)																			
+    0x25, 0x7f,                    		//   LOGICAL_MAXIMUM (127) 																			
+    0x95, 0x01,                    		//   REPORT_COUNT (1)      																			
+    0x75, 0x08,                    		//   REPORT_SIZE (8)
+    0xb1, 0x02,                    		//   FEATURE (Data,Var,Abs)																			
+        
+    0xc0                           		// END_COLLECTION          																			
+};
+***************************************************************/
+
+/**********************************************************************
+Mouse data (this structure is used to send mouse movement information)
+**********************************************************************/
+typedef struct   _MOUSE_DATA {
+   char  a;
+   char  b;
+   char  c;
+   char  d;
+
+} MOUSE_DATA_STRUCT;
+
+static MOUSE_DATA_STRUCT mouse_data = {0,0,0,0};
+
+static uint_8 USB_IF_ALT[4] = { 0, 0, 0, 0};
+
+/* number of strings in the table not including 0 or n. */
+static const uint_8 USB_STR_NUM  = 6;
+
+/*
+** if the number of strings changes, look for USB_STR_0 everywhere and make 
+** the obvious changes.  It should be found in 3 places.
+*/
+
+static const uint_16 USB_STR_0[ 2] = {0x0300 + sizeof(USB_STR_0),0x0409};
+static const uint_16 USB_STR_1[26] = {0x0300 + sizeof(USB_STR_1),
+      'M','a','r','v','e','l','l',' ','S','e','m','i','c','o','n','d','u','c','t','o','r',' ','L','t','d'};       
+static const uint_16 USB_STR_2[28] = {0x0300 + sizeof(USB_STR_2),
+      'M','A','R','V','E','L','L',' ','U','S','B',' ','h','i','d','m','o','u','s','e',' ',\
+      'D','e','v','i','c','e'};
+static const uint_16 USB_STR_3[ 5] = {0x0300 + sizeof(USB_STR_3),
+      'B','E','T','A'};
+static const uint_16 USB_STR_4[ 4] = {0x0300 + sizeof(USB_STR_4),
+      '#','0','2'};
+static const uint_16 USB_STR_5[ 4] = {0x0300 + sizeof(USB_STR_5),
+      '_','A','1'};
+static const uint_16 USB_STR_6[15] = {0x0300 + sizeof(USB_STR_6),
+      'Y','o','u','r',' ','n','a','m','e',' ','h','e','r','e'};
+static const uint_16 USB_STR_n[17] = {0x0300 + sizeof(USB_STR_n),
+      'B','A','D',' ','S','T','R','I','N','G',' ','I','n','d','e','x'};
+
+#define USB_STRING_ARRAY_SIZE  8
+static const uint_8_ptr USB_STRING_DESC[USB_STRING_ARRAY_SIZE] =
+{
+   (uint_8_ptr)USB_STR_0,
+   (uint_8_ptr)USB_STR_1,
+   (uint_8_ptr)USB_STR_2,
+   (uint_8_ptr)USB_STR_3,
+   (uint_8_ptr)USB_STR_4,
+   (uint_8_ptr)USB_STR_5,
+   (uint_8_ptr)USB_STR_6,
+   (uint_8_ptr)USB_STR_n
+};
+
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : ch9GetDescription
+* Returned Value : None
+* Comments       :
+*     Chapter 9 GetDescription command
+*     The Device Request can ask for Device/Config/string/interface/endpoint
+*     descriptors (via wValue). We then post an IN response to return the
+*     requested descriptor.
+*     And then wait for the OUT which terminates the control transfer.
+*     See section 9.4.3 (page 189) of the USB 1.1 Specification.
+* 
+*END*--------------------------------------------------------------------*/
+static void ch9GetDescription
+   (
+      /* USB handle */
+      _usb_device_handle handle,
+      
+      /* Is it a Setup phase? */
+      boolean setup,
+            
+      /* The setup packet pointer */
+      SETUP_STRUCT_PTR setup_ptr
+   )
+{ /* Body */
+   if (setup) {
+      /* Load the appropriate string depending on the descriptor requested.*/
+      switch (setup_ptr->VALUE & 0xFF00) {
+
+         case 0x0100:
+            _usb_device_send_data(handle, 0, DevDesc,
+               MIN(setup_ptr->LENGTH, DEVICE_DESCRIPTOR_SIZE));
+
+            break;
+
+         case 0x0200:
+             *(ConfigDesc + 33) = frame_interval;
+            _usb_device_send_data(handle, 0, ConfigDesc,
+               MIN(setup_ptr->LENGTH, CONFIG_DESC_SIZE));
+                           
+            break;
+
+         case 0x2200:
+         _usb_device_send_data(handle, 0, ReportDesc,
+            MIN(setup_ptr->LENGTH, REPORT_DESC_SIZE));
+
+         /*send some data for the mouse in the interrupt pipe queue */
+         _usb_device_send_data(handle, INTERRUPT_EP, (uint_8_ptr)((pointer)&mouse_data),
+                                sizeof(MOUSE_DATA_STRUCT));
+               
+            break;      
+   
+         case 0x0300:
+            if ((setup_ptr->VALUE & 0x00FF) > USB_STR_NUM) {
+               _usb_device_send_data(handle, 0, USB_STRING_DESC[USB_STR_NUM+1],
+                  MIN(setup_ptr->LENGTH, USB_STRING_DESC[USB_STR_NUM+1][0]));
+            } else {
+               _usb_device_send_data(handle, 0,
+                  USB_STRING_DESC[setup_ptr->VALUE & 0x00FF],
+                  MIN(setup_ptr->LENGTH, USB_STRING_DESC[setup_ptr->VALUE & 0x00FF][0]));
+            } /* Endif */      
+            break;
+
+         case 0x600:
+            _usb_device_send_data(handle, 0, (uint_8_ptr)DevQualifierDesc, 
+               MIN(setup_ptr->LENGTH, DEVICE_QUALIFIER_DESCRIPTOR_SIZE));
+            break;
+            
+         case 0x700:      
+            *(other_speed_config + 33) = frame_interval;
+
+            _usb_device_send_data(handle, 0, (uint_8_ptr)other_speed_config, 
+               MIN(setup_ptr->LENGTH, OTHER_SPEED_CONFIG_DESC_SIZE));
+            break;
+        
+         default:
+            USB_printf("usbMouse_%d, %s: Unexpected VALUE=0x%04x\n", 
+                _usb_device_get_dev_num(handle), __FUNCTION__, setup_ptr->VALUE);                
+            _usb_device_stall_endpoint(handle, 0, 0);
+            return;
+      } /* Endswitch */
+      /* status phase */
+      _usb_device_recv_data(handle, 0, 0, 0);
+   } /* Endif */
+   return;
+} /* Endbody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : ch9SetDescription
+* Returned Value : None
+* Comments       :
+*     Chapter 9 SetDescription command
+*     See section 9.4.8 (page 193) of the USB 1.1 Specification.
+* 
+*END*--------------------------------------------------------------------*/
+static void ch9SetDescription
+   (
+      /* USB handle */
+      _usb_device_handle handle,
+      
+      /* Is it a Setup phase? */
+      boolean setup,
+            
+      /* The setup packet pointer */
+      SETUP_STRUCT_PTR setup_ptr
+   )
+{ /* Body */
+    USB_printf("usbMouse_%d, %s: setup=%d\n", 
+            _usb_device_get_dev_num(handle), __FUNCTION__, (int)setup);
+   _usb_device_stall_endpoint(handle, 0, 0);
+   return;
+} /* Endbody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : ch9GetConfig
+* Returned Value : None
+* Comments       :
+*     Chapter 9 GetConfig command
+*     See section 9.4.2 (page 189) of the USB 1.1 Specification.
+* 
+*END*--------------------------------------------------------------------*/
+static void ch9GetConfig
+   (
+      /* USB handle */
+      _usb_device_handle handle,
+      
+      /* Is it a Setup phase? */
+      boolean setup,
+            
+      /* The setup packet pointer */
+      SETUP_STRUCT_PTR setup_ptr
+   )
+{ /* Body */
+   uint_16 current_config;
+   /* Return the currently selected configuration */
+   if (setup){ 
+      _usb_device_get_status(handle, ARC_USB_STATUS_CURRENT_CONFIG,
+         &current_config);
+      data_to_send = (uint_8)current_config;      
+      _usb_device_send_data(handle, 0, (pointer) &data_to_send, sizeof(data_to_send));
+      /* status phase */
+      _usb_device_recv_data(handle, 0, 0, 0);
+   } /* Endif */
+   return;
+} /* Endbody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : ch9SetConfig
+* Returned Value : None
+* Comments       :
+*     Chapter 9 SetConfig command
+* 
+*END*--------------------------------------------------------------------*/
+static void ch9SetConfig
+   (
+      /* USB handle */
+      _usb_device_handle handle,
+      
+      /* Is it a Setup phase? */
+      boolean setup,
+            
+      /* The setup packet pointer */
+      SETUP_STRUCT_PTR setup_ptr
+   )
+{ /* Body */
+    uint_16 usb_state;
+   
+    if (setup) 
+    {
+        if ((setup_ptr->VALUE & 0x00FF) > 1) 
+        {
+            /* generate stall */
+            USB_printf("usbMouse_%d, %s: Wrong VALUE=0x%04x\n", 
+                    _usb_device_get_dev_num(handle), __FUNCTION__, setup_ptr->VALUE);
+            _usb_device_stall_endpoint(handle, 0, 0);
+            return;
+        } /* Endif */
+
+        /* 0 indicates return to unconfigured state */
+        if ((setup_ptr->VALUE & 0x00FF) == 0) 
+        {
+            _usb_device_get_status(handle, ARC_USB_STATUS_DEVICE_STATE, &usb_state);
+            if ((usb_state == ARC_USB_STATE_CONFIG) || 
+                (usb_state == ARC_USB_STATE_ADDRESS)) 
+            {
+                /* clear the currently selected config value */
+                _usb_device_set_status(handle, ARC_USB_STATUS_CURRENT_CONFIG, 0);
+                _usb_device_set_status(handle, ARC_USB_STATUS_DEVICE_STATE,
+                                                        ARC_USB_STATE_ADDRESS);
+                /* status phase */      
+                _usb_device_send_data(handle, 0, 0, 0);
+            } 
+            else 
+            {
+                USB_printf("usbMouse_%d, %s: Wrong usb_state=%d\n", 
+                        _usb_device_get_dev_num(handle), __FUNCTION__, usb_state);
+
+                _usb_device_stall_endpoint(handle, 0, 0);
+            } /* Endif */
+            return;
+        } /* Endif */
+
+        /*
+        ** If the configuration value (setup_ptr->VALUE & 0x00FF) differs
+        ** from the current configuration value, then endpoints must be
+        ** reconfigured to match the new device configuration
+        */
+        _usb_device_get_status(handle, ARC_USB_STATUS_CURRENT_CONFIG, &usb_state);
+        ARC_DEBUG_TRACE(ARC_DEBUG_FLAG_SETUP, 
+                        "usbMouse: Set configuration: old=%d, new=%d\n", 
+                        usb_state, setup_ptr->VALUE & 0x00FF);
+
+        if (usb_state != (setup_ptr->VALUE & 0x00FF)) 
+        {
+            /* Reconfigure endpoints here */
+            switch (setup_ptr->VALUE & 0x00FF) 
+            {
+                default:
+                break;
+            } /* Endswitch */
+            _usb_device_set_status(handle, ARC_USB_STATUS_CURRENT_CONFIG,
+                                setup_ptr->VALUE & 0x00FF);
+        } /* Endif */
+        /* Init Interrupt endpoint */
+        _usb_device_init_endpoint(handle,INTERRUPT_EP, INTERRUPT_MAX_PACKET_SIZE, 
+                                   ARC_USB_SEND, ARC_USB_INTERRUPT_ENDPOINT, 
+                                   ARC_USB_DEVICE_DONT_ZERO_TERMINATE);
+
+        TEST_ENABLED = TRUE;
+
+        _usb_device_set_status(handle, ARC_USB_STATUS_DEVICE_STATE,
+                             ARC_USB_STATE_CONFIG);
+        /* status phase */
+        _usb_device_send_data(handle, 0, 0, 0);
+    } /* Endif */
+    return;
+} /* Endbody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : ch9GetInterface
+* Returned Value : None
+* Comments       :
+*     Chapter 9 GetInterface command
+*     See section 9.4.4 (page 190) of the USB 1.1 Specification.
+* 
+*END*--------------------------------------------------------------------*/
+static void ch9GetInterface
+   (
+      /* USB handle */
+      _usb_device_handle handle,
+      
+      /* Is it a Setup phase? */
+      boolean setup,
+            
+      /* The setup packet pointer */
+      SETUP_STRUCT_PTR setup_ptr
+   )
+{ /* Body */
+    uint_16 usb_state;
+   
+    _usb_device_get_status(handle, ARC_USB_STATUS_DEVICE_STATE, &usb_state);
+    if (usb_state != ARC_USB_STATE_CONFIG) 
+    {
+        USB_printf("usbMouse_%d, %s: Wrong usb_state=%d\n", 
+                    _usb_device_get_dev_num(handle), __FUNCTION__, usb_state);
+        _usb_device_stall_endpoint(handle, 0, 0);
+        return;
+    } /* Endif */
+
+    if (setup) 
+    {
+        _usb_device_send_data(handle, 0, &USB_IF_ALT[setup_ptr->INDEX & 0x00FF],
+                                MIN(setup_ptr->LENGTH, sizeof(uint_8)));
+        /* status phase */      
+        _usb_device_recv_data(handle, 0, 0, 0);
+    } /* Endif */
+    return;
+} /* Endbody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : ch9SetInterface
+* Returned Value : None
+* Comments       :
+*     Chapter 9 SetInterface command
+*     See section 9.4.10 (page 195) of the USB 1.1 Specification.
+* 
+*END*--------------------------------------------------------------------*/
+static void ch9SetInterface
+   (
+      /* USB handle */
+      _usb_device_handle handle,
+      
+      /* Is it a Setup phase? */
+      boolean setup,
+            
+      /* The setup packet pointer */
+      SETUP_STRUCT_PTR setup_ptr
+   )
+{ /* Body */
+    if (setup) 
+    {
+        if (setup_ptr->REQUESTTYPE != 0x01) 
+        {
+            USB_printf("usbDisk_%d, %s: Wrong REQUESTTYPE=0x%02x\n", 
+                        _usb_device_get_dev_num(handle), __FUNCTION__, 
+                        setup_ptr->REQUESTTYPE);
+
+            _usb_device_stall_endpoint(handle, 0, 0);
+            return;
+        } /* Endif */
+
+        /*
+        ** If the alternate value (setup_ptr->VALUE & 0x00FF) differs
+        ** from the current alternate value for the specified interface,
+        ** then endpoints must be reconfigured to match the new alternate
+        */
+        if (USB_IF_ALT[setup_ptr->INDEX & 0x00FF]
+                    != (setup_ptr->VALUE & 0x00FF))
+        {
+            USB_IF_ALT[setup_ptr->INDEX & 0x00FF] = (setup_ptr->VALUE & 0x00FF);
+            /* Reconfigure endpoints here. */
+         
+        } /* Endif */
+
+        /* status phase */
+        _usb_device_send_data(handle, 0, 0, 0);
+    } /* Endif */
+    return;
+} /* Endbody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : ch9SynchFrame
+* Returned Value : 
+* Comments       :
+*     Chapter 9 SynchFrame command
+*     See section 9.4.11 (page 195) of the USB 1.1 Specification.
+* 
+*END*--------------------------------------------------------------------*/
+static void ch9SynchFrame
+   (
+      /* USB handle */
+      _usb_device_handle handle,
+      
+      /* Is it a Setup phase? */
+      boolean setup,
+            
+      /* The setup packet pointer */
+      SETUP_STRUCT_PTR setup_ptr
+   )
+{ /* Body */
+   
+    if (setup) 
+    {
+        if (setup_ptr->REQUESTTYPE != 0x02) 
+        {
+            USB_printf("usbMouse_%d, %s: Wrong REQUESTTYPE=0x%02x\n", 
+                        _usb_device_get_dev_num(handle), __FUNCTION__, 
+                        setup_ptr->REQUESTTYPE);
+            _usb_device_stall_endpoint(handle, 0, 0);
+            return;
+        } /* Endif */
+
+        if ((setup_ptr->INDEX & 0x00FF) >=
+                ConfigDesc[CONFIG_DESC_NUM_INTERFACES])
+        {
+            USB_printf("usbMouse_%d, %s: Wrong INDEX=0x%04x\n", 
+                        _usb_device_get_dev_num(handle), __FUNCTION__, setup_ptr->INDEX);
+            _usb_device_stall_endpoint(handle, 0, 0);
+            return;
+        } /* Endif */
+
+        _usb_device_get_status(handle, ARC_USB_STATUS_SOF_COUNT, &sof_count);
+
+        sof_count = USB_16BIT_LE(sof_count);
+        _usb_device_send_data(handle, 0, (uint_8_ptr)&sof_count,
+                        MIN(setup_ptr->LENGTH, sizeof(sof_count)));
+        /* status phase */      
+        _usb_device_recv_data(handle, 0, 0, 0);
+    } /* Endif */
+    return;
+} /* Endbody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : get_report
+* Returned Value : 
+* Comments       :
+*     Chapter 9 Class specific request
+*     See section 9.4.11 (page 195) of the USB 1.1 Specification.
+* 
+*END*--------------------------------------------------------------------*/
+
+void get_report
+	(
+	/* USB handle */
+	_usb_device_handle handle,
+	
+	/* Is it a Setup phase? */
+	boolean     setup,
+   
+   /* [IN] Direction of the transfer. (1 for USB IN token)*/
+   uint_8      direction,
+	
+	/* The setup packet pointer */
+	SETUP_STRUCT_PTR setup_ptr
+
+	)
+{ 
+    int i;
+      
+   for(i=0;i<10;i++)	
+	{
+		hid_test_rep_data[i] = (uint_8) i;
+	}
+
+	if (setup)
+	{
+		_usb_device_send_data(handle, 0, (uint_8_ptr)hid_test_rep_data, MIN(setup_ptr->LENGTH,4));
+	}
+         
+   _usb_device_recv_data(handle, 0, 0, 0);
+         
+
+	return;
+} 
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : set_report
+* Returned Value : 
+* Comments       :
+*     Chapter 9 Class specific request
+*     See section 9.4.11 (page 195) of the USB 1.1 Specification.
+* 
+*END*--------------------------------------------------------------------*/
+
+void set_report
+	(
+	/* USB handle */
+	_usb_device_handle handle,
+	
+	/* Is it a Setup phase? */
+	boolean setup,
+   
+   /* [IN] Direction of the transfer. (1 for USB IN token)*/
+   uint_8               direction,
+
+	
+	/* The setup packet pointer */
+	SETUP_STRUCT_PTR setup_ptr
+	)
+{ 
+	if (setup)      /*on a SetUP packet*/
+   {
+	  _usb_device_recv_data(handle, 0, (uint_8_ptr)hid_test_rep_data, MIN(setup_ptr->LENGTH,4));
+ 
+	}
+   else if(direction == ARC_USB_RECV)   /*on a OUT packet*/
+   {
+	_usb_device_recv_data(handle, 0, (uint_8_ptr)hid_test_rep_data, MIN(setup_ptr->LENGTH,4));
+     _usb_device_send_data(handle, 0, 0, 0);
+   }
+
+	return;
+} 
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : set_idle
+* Returned Value : 
+* Comments       :
+*     Chapter 9 Class specific request
+*     See section 9.4.11 (page 195) of the USB 1.1 Specification.
+* 
+*END*--------------------------------------------------------------------*/
+
+void set_idle
+	(
+	/* USB handle */
+	_usb_device_handle handle,
+	
+	/* Is it a Setup phase? */
+	boolean setup,
+   
+   /* [IN] Direction of the transfer. (1 for USB IN token)*/
+   uint_8               direction,
+
+	
+	/* The setup packet pointer */
+	SETUP_STRUCT_PTR setup_ptr
+	)
+{ 
+   /* SET_IDLE is a No data phase transaction from HID class. All it needs
+   is a terminating IN token */
+	if (setup)      /*on a SetUP packet*/
+   {
+	  _usb_device_send_data(handle, 0, 0, 0);  
+	}
+	return;
+} 
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : ch9Class
+* Returned Value : 
+* Comments       :
+*     Chapter 9 Class specific request
+*     See section 9.4.11 (page 195) of the USB 1.1 Specification.
+* 
+*END*--------------------------------------------------------------------*/
+static void ch9Class
+   (
+      /* USB handle */
+      _usb_device_handle handle,
+      
+      /* Is it a Setup phase? */
+      boolean setup,
+      
+      /* [IN] Direction of the transfer. (1 for USB IN token)*/
+      uint_8               direction,
+
+      /* The setup packet pointer */
+      SETUP_STRUCT_PTR setup_ptr
+   )
+{ /* Body */
+   
+   switch (setup_ptr->REQUEST) 
+   {
+   
+      case 0x01:
+         get_report(handle, setup, direction, setup_ptr);
+         break;
+      
+      case 0x09:
+         set_report(handle, setup, direction, setup_ptr);
+         break;
+
+      case 0x0A:
+         set_idle(handle, setup, direction, setup_ptr);
+         break;
+     
+      default:
+        USB_printf("usbMouse_%d, %s: Wrong REQUEST=0x%02x\n", 
+              _usb_device_get_dev_num(handle), __FUNCTION__, setup_ptr->REQUEST);
+
+         _usb_device_stall_endpoint(handle, 0, 0);
+         break;
+
+   } /* EndSwitch */
+
+} /* Endbody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : service_ep0
+* Returned Value : None
+* Comments       :
+*     Called upon a completed endpoint 0 (USB 1.1 Chapter 9) transfer
+* 
+*END*--------------------------------------------------------------------*/
+static void service_ep0
+   (
+      /* [IN] Handle of the USB device */
+      _usb_device_handle   handle,
+      
+      /* [IN] request type as registered */
+      uint_8               type,
+
+      /* [IN] Is it a setup packet? */
+      boolean              setup,
+      
+      /* [IN] Direction of the transfer.  Is it transmit? */
+      uint_8               direction,
+      
+      /* [IN] Pointer to the data buffer */
+      uint_8_ptr           buffer,
+      
+      /* [IN] Length of the transfer */
+      uint_32              length,
+      
+      /* [IN] Error, if any */
+      uint_8               error
+            
+            
+   )
+{ /* Body */
+   boolean  class_request = FALSE;
+   
+   if (setup) 
+   {
+      _usb_device_read_setup_data(handle, 0, (uint_8_ptr)&local_setup_packet);
+      local_setup_packet.VALUE = USB_16BIT_LE(local_setup_packet.VALUE);
+      local_setup_packet.INDEX = USB_16BIT_LE(local_setup_packet.INDEX);
+      local_setup_packet.LENGTH = USB_16BIT_LE(local_setup_packet.LENGTH);
+   } 
+   else if (class_request) {
+      class_request = FALSE;
+      /* Finish your class or vendor request here */
+      
+      return;
+   } /* Endif */
+   
+   switch (local_setup_packet.REQUESTTYPE & 0x60) {
+
+      case 0x00:
+         switch (local_setup_packet.REQUEST) {
+
+            case 0x0:
+               mvUsbCh9GetStatus(handle, setup, &local_setup_packet);
+               break;
+
+            case 0x1:
+               mvUsbCh9ClearFeature(handle, setup, &local_setup_packet);
+               break;
+
+            case 0x3:
+               mvUsbCh9SetFeature(handle, setup, &local_setup_packet);
+               break;
+
+            case 0x5:
+               mvUsbCh9SetAddress(handle, setup, &local_setup_packet);
+               break;
+
+            case 0x6:
+               ch9GetDescription(handle, setup, &local_setup_packet);
+               break;
+
+            case 0x7:
+               ch9SetDescription(handle, setup, &local_setup_packet);
+               break;
+
+            case 0x8:
+               ch9GetConfig(handle, setup, &local_setup_packet);
+               break;
+
+            case 0x9:
+               ch9SetConfig(handle, setup, &local_setup_packet);
+               break;
+
+            case 0xa:
+               ch9GetInterface(handle, setup, &local_setup_packet);
+               break;
+
+            case 0xb:
+               ch9SetInterface(handle, setup, &local_setup_packet);
+               break;
+
+            case 0xc:
+               ch9SynchFrame(handle, setup, &local_setup_packet);
+               break;
+
+            default:
+                USB_printf("usbMouse_%d, %s: Wrong REQUEST = 0x%02x\n", 
+                        _usb_device_get_dev_num(handle), __FUNCTION__, local_setup_packet.REQUEST);
+               _usb_device_stall_endpoint(handle, 0, 0);
+               break;
+
+         } /* Endswitch */
+         
+         break;
+
+      case 0x20:
+         ch9Class(handle, setup, direction, &local_setup_packet);
+
+         break;
+
+      case 0x40:
+         /* vendor specific request */
+         break;
+      
+      default:
+         USB_printf("usbMouse_%d, %s: Unexpected REQUESTTYPE = 0x%x\n", 
+                _usb_device_get_dev_num(handle), __FUNCTION__, 
+                local_setup_packet.REQUESTTYPE);
+
+         _usb_device_stall_endpoint(handle, 0, 0);
+         break;
+         
+   } /* Endswitch */
+   
+   return;
+} /* Endbody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : service_ep1
+* Returned Value : None
+* Comments       :
+*     Called upon a completed endpoint 1 (USB 1.1 Chapter 9) transfer
+* 
+*END*--------------------------------------------------------------------*/
+static void service_ep1
+   (
+      /* [IN] Handle of the USB device */
+      _usb_device_handle   handle,
+
+      /* [IN] request type as registered */
+      uint_8               type,
+      
+      /* [IN] Is it a setup packet? */
+      boolean              setup,
+      
+      /* [IN] Direction of the transfer.  Is it transmit? */
+      uint_8               direction,
+      
+      /* [IN] Pointer to the data buffer */
+      uint_8_ptr           buffer,
+      
+      /* [IN] Length of the transfer */
+      uint_32              length,
+
+      /* [IN] Error, if any */
+      uint_8               error
+            
+            
+   )
+{ /* Body */
+
+/********************************************************************
+   The following code will move the mouse right and left on the screen.
+   Comment this out if this behaviour is not desired.
+********************************************************************/
+
+    static int       x = 0;  
+    static boolean   right = FALSE;
+    static int       wait = 0;
+
+    mouseCntr++;
+    if(wait == 0)
+    {
+        if (right == FALSE)  
+        {
+            mouse_data.b = 1; 
+            x++;
+            right = (x > 200) ? TRUE : FALSE;     
+        }
+   
+        if (right == TRUE)  
+        {
+            mouse_data.b = -1; 
+            x--;
+            right = (x < 0) ? FALSE : TRUE;     
+        }
+        wait = mouseDelay;
+    }
+    else
+    {
+        wait--;
+        mouse_data.b = 0; 
+    }
+   
+   _usb_device_send_data(handle, INTERRUPT_EP, (uint_8_ptr)((pointer)&mouse_data),
+                            sizeof(MOUSE_DATA_STRUCT));
+ 
+   return;
+} /* Endbody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : reset_ep0
+* Returned Value : None
+* Comments       :
+*     Called upon a bus reset event.  Initialises the control endpoint.
+* 
+*END*--------------------------------------------------------------------*/
+static void reset_ep0
+   (
+      /* [IN] Handle of the USB device */
+      _usb_device_handle   handle,
+
+      /* [IN] request type as registered */
+      uint_8               type,
+      
+      /* [IN] Unused */
+      boolean              setup,
+   
+      /* [IN] Unused */
+      uint_8               direction,
+   
+      /* [IN] Unused */
+      uint_8_ptr           buffer,
+   
+      /* [IN] Unused */
+      uint_32              length,
+
+      /* [IN] Error, if any */
+      uint_8               error
+            
+            
+   )
+{ /* Body */
+
+   /*on a reset always cancel all transfers all EP 0 */
+   _usb_device_cancel_transfer(handle, 0, ARC_USB_RECV);
+   _usb_device_cancel_transfer(handle, 0, ARC_USB_SEND);
+
+   _usb_device_start(handle);
+
+   /* Initialize the endpoint 0 in both directions */
+   _usb_device_init_endpoint(handle, 0, DevDesc[DEV_DESC_MAX_PACKET_SIZE], 0,
+      ARC_USB_CONTROL_ENDPOINT, 0);
+   _usb_device_init_endpoint(handle, 0, DevDesc[DEV_DESC_MAX_PACKET_SIZE], 1,
+      ARC_USB_CONTROL_ENDPOINT, 0);
+
+   if (TEST_ENABLED) 
+   {
+      _usb_device_cancel_transfer(handle, INTERRUPT_EP, ARC_USB_SEND);
+   } /* Endif */
+   
+   TEST_ENABLED = FALSE;
+   mouseCntr = 0;
+         
+   return;
+} /* EndBody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : service_suspend
+* Returned Value : None
+* Comments       :
+*     Called when host suspend the USB port. Do remote wake up if desired.
+* 
+*END*--------------------------------------------------------------------*/
+static void service_suspend
+   (
+      /* [IN] Handle of the USB device */
+      _usb_device_handle   handle,
+   
+      /* [IN] request type as registered */
+      uint_8               type,
+
+      /* [IN] Unused */
+      boolean              setup,
+   
+      /* [IN] Unused */
+      uint_8               direction,
+   
+      /* [IN] Unused */
+      uint_8_ptr           buffer,
+   
+      /* [IN] Unused */
+      uint_32              length,
+
+      /* [IN] Error, if any */
+      uint_8               error                        
+   )
+{ /* Body */
+   uint_16      usb_status;
+   int          lockKey;            
+   
+   _usb_device_get_status(handle, ARC_USB_STATUS_DEVICE, &usb_status);
+   if (usb_status & ARC_USB_REMOTE_WAKEUP) 
+   { 
+       lockKey = USB_lock();
+
+       USB_printf("Mouse Suspended: type=%d, usbStatus=0x%x\n", type, usb_status);
+       USB_SUSPENDED = TRUE;
+
+       USB_unlock(lockKey);
+   } 
+          
+   return;
+} /* EndBody */
+
+/*FUNCTION*----------------------------------------------------------------
+* 
+* Function Name  : usbMouseLoad
+* Returned Value : None
+* Comments       :
+*     First function called.  Initialises the USB and registers Chapter 9
+*     callback functions.
+* 
+*END*--------------------------------------------------------------------*/
+_usb_device_handle  usbMouseLoad(int devNo)
+{ /* Body */
+   _usb_device_handle   handle;
+   uint_8               error;
+   uint_32              send_data_buffer_size=0;
+   uint_8_ptr           temp;
+   int                  lockKey, i, j;
+   static boolean       isFirst = TRUE;
+
+    if(isFirst)
+    {
+        /* Swap all USB_STRING_DESC */
+        for(i=0; i<(sizeof(USB_STRING_DESC)/sizeof(USB_STRING_DESC[0])); i++)
+        {
+            uint_16* usbStr = (uint_16*)(USB_STRING_DESC[i]);
+            uint_16 size = (usbStr[0]-0x300)/sizeof(uint_16);
+
+            for(j=0; j<size; j++)
+            {
+                usbStr[j] = USB_16BIT_LE(usbStr[j]);
+            }
+        }
+        isFirst = FALSE;
+    }
+
+   lockKey = USB_lock();
+   
+    /* Initialize the USB interface */
+    error = _usb_device_init(devNo, &handle);   
+    if (error != USB_OK) 
+    {
+        USB_printf("\nUSB Initialization failed. Error: %x\n", error);
+        return NULL;
+    } /* Endif */
+   
+    /* Self Power, Remote wakeup disable */
+    _usb_device_set_status(handle, ARC_USB_STATUS_DEVICE, (1 << DEVICE_SELF_POWERED));    
+
+    error = _usb_device_register_service(handle, ARC_USB_SERVICE_EP0, service_ep0);
+    if (error != USB_OK) 
+    {
+        USB_printf("\nUSB EP0 Service Registration failed. Error: %x\n", error);
+        return NULL;
+    } /* Endif */
+   
+    error = _usb_device_register_service(handle, ARC_USB_SERVICE_BUS_RESET, reset_ep0);
+    if (error != USB_OK) 
+    {
+        USB_printf("\nUSB BUS_RESET Service Registration failed. Error: %x\n", error);
+        return NULL;
+    } /* Endif */
+   
+    error = _usb_device_register_service(handle, INTERRUPT_EP, service_ep1);   
+    if (error != USB_OK) 
+    {
+        USB_printf("\nUSB EP1 Service Registration failed. Error: %x\n", error);
+        return NULL;
+    } /* Endif */
+
+    error = _usb_device_register_service(handle, ARC_USB_SERVICE_SUSPEND, service_suspend);
+    if (error != USB_OK) 
+    {
+        USB_printf("\nUSB SUSPEND Service Registration failed. Error: %x\n", error);
+        return NULL;
+    } /* Endif */
+
+    error = _usb_device_register_service(handle, ARC_USB_SERVICE_SLEEP, service_suspend);
+    if (error != USB_OK) 
+    {
+        USB_printf("\nUSB SUSPEND Service Registration failed. Error: %x\n", error);
+        return NULL;
+    } /* Endif */
+
+    /***********************************************************************
+    Allocate memory to receive data at endpoint 0. Ensure that buffers are
+    cache aligned.
+    ***********************************************************************/
+    hid_test_rep_data_unaligned   = (uint_8_ptr) USB_memalloc((EP1_RECV_BUFFER_SIZE + PSP_CACHE_LINE_SIZE));
+    if(hid_test_rep_data_unaligned == NULL)
+    {
+        USB_printf("mouseLoad: Buffer allocation of %d bytes is failed\n", 
+                    (unsigned)EP1_RECV_BUFFER_SIZE + PSP_CACHE_LINE_SIZE);
+        return NULL;
+    }
+
+    hid_test_rep_data = (uint_8_ptr) USB_CACHE_ALIGN((uint_32) hid_test_rep_data_unaligned);
+    
+    /**************************************************************************
+    Best way to handle the Data cache is to allocate a large buffer that is
+    cache aligned and keep all data inside it. Flush the line of the cache
+    that you have changed. In this program, we have static data such as 
+    descriptors which never changes. Such data can be kept in this buffer
+    and flushed only once. Note that you can reduce the size of this buffer
+    by aligning the addresses in a different way.
+    ***************************************************************************/
+    send_data_buffer_size =  (DEVICE_DESCRIPTOR_SIZE +  PSP_CACHE_LINE_SIZE) +
+                             (CONFIG_DESC_SIZE + PSP_CACHE_LINE_SIZE) +
+                             (REPORT_DESC_SIZE + PSP_CACHE_LINE_SIZE) +
+                             (DEVICE_QUALIFIER_DESCRIPTOR_SIZE + PSP_CACHE_LINE_SIZE) +
+                             (OTHER_SPEED_CONFIG_DESC_SIZE + PSP_CACHE_LINE_SIZE);
+                               
+    Send_Buffer_Unaligned   = (uint_8_ptr) USB_memalloc(send_data_buffer_size);
+    if (Send_Buffer_Unaligned == NULL) 
+    {
+        USB_printf("\nMouse: %d bytes Buffer allocation failed\n", send_data_buffer_size);
+        return NULL;
+    }
+   
+    Send_Buffer_aligned = (uint_8_ptr) USB_CACHE_ALIGN((uint_32) Send_Buffer_Unaligned);
+    /* keep a temporary copy of the aligned address */
+    temp = Send_Buffer_aligned;
+   
+
+    /**************************************************************************
+    Assign pointers to different descriptors from it and copy descriptors inside.
+    ***************************************************************************/
+    DevDesc =  (uint_8_ptr) Send_Buffer_aligned;
+    USB_memcopy(DevDescData, DevDesc, DEVICE_DESCRIPTOR_SIZE);
+    Send_Buffer_aligned += ((DEVICE_DESCRIPTOR_SIZE/PSP_CACHE_LINE_SIZE) + 1)* PSP_CACHE_LINE_SIZE; 
+   
+    ConfigDesc =  (uint_8_ptr) Send_Buffer_aligned;
+    USB_memcopy(ConfigDescData, ConfigDesc, CONFIG_DESC_SIZE);
+
+    Send_Buffer_aligned += ((CONFIG_DESC_SIZE/PSP_CACHE_LINE_SIZE) + 1)* PSP_CACHE_LINE_SIZE; 
+
+    ReportDesc =  (uint_8_ptr) Send_Buffer_aligned;
+    USB_memcopy(ReportDescData, ReportDesc, REPORT_DESC_SIZE);
+    Send_Buffer_aligned += ((REPORT_DESC_SIZE/PSP_CACHE_LINE_SIZE) + 1)* PSP_CACHE_LINE_SIZE; 
+
+   
+    DevQualifierDesc =  (uint_8_ptr) Send_Buffer_aligned;
+    USB_memcopy(DevQualifierDescData, DevQualifierDesc, DEVICE_QUALIFIER_DESCRIPTOR_SIZE);
+    Send_Buffer_aligned += ((DEVICE_QUALIFIER_DESCRIPTOR_SIZE/PSP_CACHE_LINE_SIZE) + \
+                           1)* PSP_CACHE_LINE_SIZE;
+
+    other_speed_config =  (uint_8_ptr) Send_Buffer_aligned;
+    USB_memcopy(other_speed_config_data, other_speed_config, OTHER_SPEED_CONFIG_DESC_SIZE);
+    Send_Buffer_aligned += ((OTHER_SPEED_CONFIG_DESC_SIZE/PSP_CACHE_LINE_SIZE) + 1)* PSP_CACHE_LINE_SIZE; 
+                           
+    /**************************************************************************
+    Flush the cache to ensure main memory is updated.
+    ***************************************************************************/
+    USB_dcache_flush(temp,send_data_buffer_size);
+
+     /* Initialize the endpoint 0 in both directions */
+    _usb_device_init_endpoint(handle, 0, DevDesc[DEV_DESC_MAX_PACKET_SIZE], 0,
+                            ARC_USB_CONTROL_ENDPOINT, 0);
+    _usb_device_init_endpoint(handle, 0, DevDesc[DEV_DESC_MAX_PACKET_SIZE], 1,
+                            ARC_USB_CONTROL_ENDPOINT, 0);
+
+    USB_unlock(lockKey);
+
+    USB_printf("USB Mouse example is READY\n");
+   
+    return handle; 
+} /* Endbody */
+
+void    usbMouseUnload(_usb_device_handle handle)
+{
+    int     lockKey;
+
+    if(handle == NULL)
+        return;
+
+    /*lock interrupts */
+    lockKey = USB_lock();
+    
+    /* ensure all transfers are cancelled */
+    _usb_device_cancel_transfer(handle, INTERRUPT_EP,  ARC_USB_SEND);
+
+    /* Stop Endpoints */
+    _usb_device_deinit_endpoint(handle, INTERRUPT_EP, ARC_USB_SEND);
+
+    _usb_device_deinit_endpoint(handle, 0, ARC_USB_RECV);
+    _usb_device_deinit_endpoint(handle, 0, ARC_USB_SEND);
+
+    _usb_device_stop(handle);
+
+    /* Deregister all services */
+    _usb_device_unregister_service(handle, ARC_USB_SERVICE_EP0);   
+    _usb_device_unregister_service(handle, ARC_USB_SERVICE_BUS_RESET);   
+    _usb_device_unregister_service(handle, ARC_USB_SERVICE_SUSPEND);
+    _usb_device_unregister_service(handle, ARC_USB_SERVICE_SLEEP);
+    _usb_device_unregister_service(handle, INTERRUPT_EP);   
+
+    _usb_device_shutdown(handle);
+
+    /* Free memory allocated for Disk device */
+    if(Send_Buffer_Unaligned != NULL)
+    {
+        USB_memfree(Send_Buffer_Unaligned);
+        Send_Buffer_Unaligned = NULL;
+    }
+
+    if(hid_test_rep_data_unaligned != NULL)
+    {
+        USB_memfree(hid_test_rep_data_unaligned);
+        hid_test_rep_data_unaligned  = NULL;
+    }
+
+    /* Clear gloabal variables */
+    TEST_ENABLED = FALSE;
+    USB_SUSPENDED = FALSE;    
+    
+    USB_unlock(lockKey);
+}
+
+void    usbMousePeriodicResume(_usb_device_handle handle)
+{
+    if (USB_SUSPENDED) 
+    {
+       /*
+        * Send RESUME signal whenever host suspends the USB port. In real case, we should
+        *  send RESUME signal only when a mouse button being clicked.
+        */
+        USB_printf("Mouse Resumed\n");
+
+        _usb_device_assert_resume(handle);
+        USB_SUSPENDED = FALSE;     
+    } /* Endbody */
+}
+/* EOF */
--- linux-mvl-dove-2.6.32.orig/arch/arm/common/pxa-dma.c
+++ linux-mvl-dove-2.6.32/arch/arm/common/pxa-dma.c
@@ -0,0 +1,207 @@
+/*
+ *  linux/arch/arm/mach-pxa/dma.c
+ *
+ *  PXA DMA registration and IRQ dispatching
+ *
+ *  Author:	Nicolas Pitre
+ *  Created:	Nov 15, 2001
+ *  Copyright:	MontaVista Software Inc.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/errno.h>
+
+#include <asm/system.h>
+#include <asm/irq.h>
+#include <mach/hardware.h>
+#include <linux/mbus.h>
+#include <asm/hardware/pxa-dma.h>
+#include <mach/pm.h>
+
+#include <mach/pxa-regs.h>
+
+struct dma_channel {
+	char *name;
+	pxa_dma_prio prio;
+	void (*irq_handler)(int, void *);
+	void *data;
+};
+
+static struct dma_channel *dma_channels;
+static int num_dma_channels;
+
+int pxa_request_dma_intr (char *name, int dma_ch,
+		void (*irq_handler)(int, void *),
+		void *data)
+{
+	dma_channels[dma_ch].name = name;
+	dma_channels[dma_ch].irq_handler = irq_handler;
+	dma_channels[dma_ch].data = data;
+	return 0;
+}
+
+/*
+** Reserve a DMA channel to be used by external clients.
+*/
+int pxa_reserve_dma_channel (int dma_ch)
+{
+	dma_channels[dma_ch].name = "reserved";
+	return 0;
+}
+
+int pxa_request_dma (char *name, pxa_dma_prio prio,
+			 void (*irq_handler)(int, void *),
+		 	 void *data)
+{
+	unsigned long flags;
+	int i, found = 0;
+
+	/* basic sanity checks */
+	if (!name || !irq_handler)
+		return -EINVAL;
+
+	local_irq_save(flags);
+
+	do {
+		/* try grabbing a DMA channel with the requested priority */
+		for (i = 0; i < num_dma_channels; i++) {
+			if ((dma_channels[i].prio == prio) &&
+			    !dma_channels[i].name) {
+				found = 1;
+				break;
+			}
+		}
+		/* if requested prio group is full, try a hier priority */
+	} while (!found && prio--);
+
+	if (found) {
+		DCSR(i) = DCSR_STARTINTR|DCSR_ENDINTR|DCSR_BUSERR;
+		dma_channels[i].name = name;
+		dma_channels[i].irq_handler = irq_handler;
+		dma_channels[i].data = data;
+	} else {
+		printk (KERN_WARNING "No more available DMA channels for %s\n", name);
+		i = -ENODEV;
+	}
+
+	local_irq_restore(flags);
+	return i;
+}
+
+void pxa_free_dma (int dma_ch)
+{
+	unsigned long flags;
+
+	if (!dma_channels[dma_ch].name) {
+		printk (KERN_CRIT
+			"%s: trying to free channel %d which is already freed\n",
+			__func__, dma_ch);
+		return;
+	}
+
+	local_irq_save(flags);
+	DCSR(dma_ch) = DCSR_STARTINTR|DCSR_ENDINTR|DCSR_BUSERR;
+	dma_channels[dma_ch].name = NULL;
+	local_irq_restore(flags);
+}
+
+static irqreturn_t dma_irq_handler(int irq, void *dev_id)
+{
+	int i, dint = DINT;
+
+	for (i = 0; i < num_dma_channels; i++) {
+		if (dint & (1 << i)) {
+			struct dma_channel *channel = &dma_channels[i];
+			if (channel->name && channel->irq_handler) {
+				channel->irq_handler(i, channel->data);
+			} else {
+				/*
+				 * IRQ for an unregistered DMA channel:
+				 * let's clear the interrupts and disable it.
+				 */
+				printk (KERN_WARNING "spurious IRQ for DMA channel %d\n", i);
+				DCSR(i) = DCSR_STARTINTR|DCSR_ENDINTR|DCSR_BUSERR;
+			}
+		}
+	}
+	return IRQ_HANDLED;
+}
+
+int __init pxa_init_dma(int num_ch)
+{
+	int i, ret;
+
+	dma_channels = kzalloc(sizeof(struct dma_channel) * num_ch, GFP_KERNEL);
+	if (dma_channels == NULL)
+		return -ENOMEM;
+
+	/* dma channel priorities on pxa2xx processors:
+	 * ch 0 - 3,  16 - 19  <--> (0) DMA_PRIO_HIGH
+	 * ch 4 - 7,  20 - 23  <--> (1) DMA_PRIO_MEDIUM
+	 * ch 8 - 15, 24 - 31  <--> (2) DMA_PRIO_LOW
+	 */
+	for (i = 0; i < num_ch; i++) {
+		DCSR(i) = 0;
+		dma_channels[i].prio = min((i & 0xf) >> 2, DMA_PRIO_LOW);
+	}
+
+	ret = request_irq(IRQ_DMA, dma_irq_handler, IRQF_DISABLED, "DMA", NULL);
+	if (ret) {
+		printk (KERN_CRIT "Wow!  Can't register IRQ for DMA\n");
+		kfree(dma_channels);
+		return ret;
+	}
+
+	num_dma_channels = num_ch;
+	return 0;
+}
+
+#define DMA_MAX_DECODE_WIN	4
+int __init pxa_init_dma_wins(struct mbus_dram_target_info * dram)
+{
+	int i;
+	int ddr_csn;
+
+	/* First of all close all windows */
+	for (i = 0; i < DMA_MAX_DECODE_WIN; i++) {
+		DWCR(i) = 0x0;
+		DWBR(i) = 0x0;
+	}
+
+	if (dram->num_cs >= DMA_MAX_DECODE_WIN)
+		ddr_csn = (DMA_MAX_DECODE_WIN - 1);
+	else
+		ddr_csn = dram->num_cs;
+
+	/* Open DDR Windows */
+	for (i = 0; i < ddr_csn; i++) {
+		struct mbus_dram_window *cs = dram->cs + i;
+
+		DWBR(i) = cs->base;
+		DWCR(i) = ((((cs->size >> 14) - 1) << DWCR_SIZE_OFFS) |
+			   ((cs->mbus_attr << DWCR_ATTR_OFFS) & DWCR_ATTR_MASK) |
+			   DWCR_WINEN);
+	}
+
+	/* Open last window to NAND internal registers */
+	DWBR(DMA_MAX_DECODE_WIN - 1) = DOVE_SB_REGS_PHYS_BASE;
+	DWCR(DMA_MAX_DECODE_WIN - 1) = 0x03FF03C1; /* 16M, Attrib=0x03, Target=0xC, WinEn=1 */ 
+
+#ifdef CONFIG_PM
+	for(i = 0; i < DMA_MAX_DECODE_WIN; i++) {
+		pm_registers_add_single(DWBR_ADDR(i));
+		pm_registers_add_single(DWCR_ADDR(i));
+	}
+#endif
+	return 0;
+}
+
+EXPORT_SYMBOL(pxa_request_dma);
+EXPORT_SYMBOL(pxa_free_dma);
--- linux-mvl-dove-2.6.32.orig/arch/arm/common/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/common/Makefile
@@ -17,3 +17,5 @@
 obj-$(CONFIG_ARCH_IXP23XX)	+= uengine.o
 obj-$(CONFIG_PCI_HOST_ITE8152)  += it8152.o
 obj-$(CONFIG_COMMON_CLKDEV)	+= clkdev.o
+obj-$(CONFIG_ARCH_PXA)		+= pxa-dma.o
+obj-$(CONFIG_ARCH_DOVE)		+= pxa-dma.o
--- linux-mvl-dove-2.6.32.orig/arch/arm/common/sa1111.c
+++ linux-mvl-dove-2.6.32/arch/arm/common/sa1111.c
@@ -887,8 +887,6 @@
 	if (!save)
 		return 0;
 
-	spin_lock_irqsave(&sachip->lock, flags);
-
 	/*
 	 * Ensure that the SA1111 is still here.
 	 * FIXME: shouldn't do this here.
@@ -905,6 +903,13 @@
 	 * First of all, wake up the chip.
 	 */
 	sa1111_wake(sachip);
+
+	/*
+	 * Only lock for write ops. Also, sa1111_wake must be called with
+	 * released spinlock!
+	 */
+	spin_lock_irqsave(&sachip->lock, flags);
+
 	sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN0);
 	sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN1);
 
--- linux-mvl-dove-2.6.32.orig/arch/arm/include/asm/ucontext.h
+++ linux-mvl-dove-2.6.32/arch/arm/include/asm/ucontext.h
@@ -59,23 +59,18 @@
 #endif /* CONFIG_IWMMXT */
 
 #ifdef CONFIG_VFP
-#if __LINUX_ARM_ARCH__ < 6
-/* For ARM pre-v6, we use fstmiax and fldmiax.  This adds one extra
- * word after the registers, and a word of padding at the end for
- * alignment.  */
 #define VFP_MAGIC		0x56465001
-#define VFP_STORAGE_SIZE	152
-#else
-#define VFP_MAGIC		0x56465002
-#define VFP_STORAGE_SIZE	144
-#endif
 
 struct vfp_sigframe
 {
 	unsigned long		magic;
 	unsigned long		size;
-	union vfp_state		storage;
-};
+	struct user_vfp		ufp;
+} __attribute__((__aligned__(8)));
+
+/* 8 byte for magic and size, 272 byte for ufp */
+#define VFP_STORAGE_SIZE	sizeof(struct vfp_sigframe)
+
 #endif /* CONFIG_VFP */
 
 /*
@@ -91,7 +86,7 @@
 #ifdef CONFIG_IWMMXT
 	struct iwmmxt_sigframe	iwmmxt;
 #endif
-#if 0 && defined CONFIG_VFP /* Not yet saved.  */
+#ifdef CONFIG_VFP
 	struct vfp_sigframe	vfp;
 #endif
 	/* Something that isn't a valid magic number for any coprocessor.  */
--- linux-mvl-dove-2.6.32.orig/arch/arm/include/asm/setup.h
+++ linux-mvl-dove-2.6.32/arch/arm/include/asm/setup.h
@@ -21,6 +21,11 @@
 /* The list ends with an ATAG_NONE node. */
 #define ATAG_NONE	0x00000000
 
+/* Some sanity checks are needed */
+#define ATAG_MAX_SZ	PAGE_SIZE
+#define atag_valid(tag)							\
+	((tag)->hdr.size && ((tag)->hdr.size <= ATAG_MAX_SZ))
+
 struct tag_header {
 	__u32 size;
 	__u32 tag;
@@ -143,6 +148,55 @@
 	__u32 fmemclk;
 };
 
+#if defined (CONFIG_PM) && defined (CONFIG_ARCH_DOVE)
+
+/* Marvell Dove DRAM parameters */
+#define ATAG_MV_DRAM_PARAMS   	0x41000403
+
+#define MV_DRAM_HEADERS_CNT	16
+#define MV_DRAM_REG_PAIRS_CNT	200
+
+/* Marvell DRAM frequency bit mask */
+#define MV_DDR_100   		0x00000001
+#define MV_DDR_133   		0x00000002
+#define MV_DDR_167   		0x00000004
+#define MV_DDR_200   		0x00000008
+#define MV_DDR_233   		0x00000010
+#define MV_DDR_250   		0x00000020
+#define MV_DDR_267   		0x00000040
+#define MV_DDR_333   		0x00000080
+#define MV_DDR_400   		0x00000100
+#define MV_DDR_500   		0x00000200
+#define MV_DDR_533   		0x00000400
+#define MV_DDR_ALL   		0xFFFFFFFF
+
+typedef struct __mvDramRegInit
+{
+	u32 		reg_addr;
+	u32 		reg_value;
+} MV_DRAM_REG_INIT;
+
+typedef struct __mvDramInitCtrl
+{
+	u32 		freq_mask;
+	u16 		start_index;
+	u16 		size;
+	u32 		flags;
+} MV_DRAM_INIT_CTRL;
+
+typedef struct __mvDramInit
+{
+	MV_DRAM_INIT_CTRL dram_init_ctrl[MV_DRAM_HEADERS_CNT];
+	MV_DRAM_REG_INIT reg_init[MV_DRAM_REG_PAIRS_CNT];
+} MV_DRAM_INIT;
+
+struct tag_mv_dram {
+        u32 		version;
+	MV_DRAM_INIT 	mv_dram_init;
+};
+#endif /* defined (CONFIG_PM) && defined (CONFIG_ARCH_DOVE) */
+
+
 struct tag {
 	struct tag_header hdr;
 	union {
@@ -165,6 +219,12 @@
 		 * DC21285 specific
 		 */
 		struct tag_memclk	memclk;
+#if defined (CONFIG_PM) && defined (CONFIG_ARCH_DOVE)
+                /*
+                 * Marvell specific
+                 */
+                struct tag_mv_dram     mv_dram;
+#endif
 	} u;
 };
 
@@ -173,9 +233,10 @@
 	int (*parse)(const struct tag *);
 };
 
-#define tag_member_present(tag,member)				\
-	((unsigned long)(&((struct tag *)0L)->member + 1)	\
-		<= (tag)->hdr.size * 4)
+#define tag_member_present(tag,member)					\
+	(atag_valid(tag) &&						\
+		(((unsigned long)(&((struct tag *)0L)->member + 1)	\
+			<= (tag)->hdr.size * 4))
 
 #define tag_next(t)	((struct tag *)((__u32 *)(t) + (t)->hdr.size))
 #define tag_size(type)	((sizeof(struct tag_header) + sizeof(struct type)) >> 2)
--- linux-mvl-dove-2.6.32.orig/arch/arm/include/asm/highmem.h
+++ linux-mvl-dove-2.6.32/arch/arm/include/asm/highmem.h
@@ -11,7 +11,11 @@
 
 #define kmap_prot		PAGE_KERNEL
 
-#define flush_cache_kmaps()	flush_cache_all()
+#define flush_cache_kmaps() \
+	do { \
+		if (cache_is_vivt()) \
+			flush_cache_all(); \
+	} while (0)
 
 extern pte_t *pkmap_page_table;
 
@@ -21,11 +25,20 @@
 extern void *kmap_high_get(struct page *page);
 extern void kunmap_high(struct page *page);
 
+extern void *kmap_high_l1_vipt(struct page *page, pte_t *saved_pte);
+extern void kunmap_high_l1_vipt(struct page *page, pte_t saved_pte);
+
+/*
+ * The following functions are already defined by <linux/highmem.h>
+ * when CONFIG_HIGHMEM is not set.
+ */
+#ifdef CONFIG_HIGHMEM
 extern void *kmap(struct page *page);
 extern void kunmap(struct page *page);
 extern void *kmap_atomic(struct page *page, enum km_type type);
 extern void kunmap_atomic(void *kvaddr, enum km_type type);
 extern void *kmap_atomic_pfn(unsigned long pfn, enum km_type type);
 extern struct page *kmap_atomic_to_page(const void *ptr);
+#endif
 
 #endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/include/asm/suspend.h
+++ linux-mvl-dove-2.6.32/arch/arm/include/asm/suspend.h
@@ -0,0 +1,35 @@
+#ifndef _ASMARM_SUSPEND_H
+#define _ASMARM_SUSPEND_H
+/*
+ * Based on code include/asm-i386/suspend.h
+ * Copyright 2001-2002 Pavel Machek <pavel@suse.cz>
+ * Copyright 2001 Patrick Mochel <mochel@osdl.org>
+ */
+
+static inline int
+arch_prepare_suspend(void)
+{
+	return 0;
+}
+
+/* image of the saved processor state */
+struct saved_context {
+	/*
+	 * Structure saved_context would be used to hold processor state
+	 * except caller and callee registers, just before suspending.
+	 */
+
+	/* coprocessor 15 registers */
+	__u32 CR;
+	__u32 ACR;
+	__u32 TTBR0;
+	__u32 TTBR1;
+	__u32 TTBCR;
+	__u32 DACR;
+	__u32 TLBLR;
+	__u32 FCSE;
+	__u32 CID;
+	__u32 EFR;
+};
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/include/asm/cacheflush.h
+++ linux-mvl-dove-2.6.32/arch/arm/include/asm/cacheflush.h
@@ -154,16 +154,16 @@
  *	Please note that the implementation of these, and the required
  *	effects are cache-type (VIVT/VIPT/PIPT) specific.
  *
- *	flush_cache_kern_all()
+ *	flush_kern_all()
  *
  *		Unconditionally clean and invalidate the entire cache.
  *
- *	flush_cache_user_mm(mm)
+ *	flush_user_all()
  *
  *		Clean and invalidate all user space cache entries
  *		before a change of page tables.
  *
- *	flush_cache_user_range(start, end, flags)
+ *	flush_user_range(start, end, flags)
  *
  *		Clean and invalidate a range of cache entries in the
  *		specified address space before a change of page tables.
@@ -179,6 +179,20 @@
  *		- start  - virtual start address
  *		- end    - virtual end address
  *
+ *	coherent_user_range(start, end)
+ *
+ *		Ensure coherency between the Icache and the Dcache in the
+ *		region described by start, end.  If you have non-snooping
+ *		Harvard caches, you need to implement this function.
+ *		- start  - virtual start address
+ *		- end    - virtual end address
+ *
+ *	flush_kern_dcache_area(kaddr, size)
+ *
+ *		Ensure that the data held in page is written back.
+ *		- kaddr  - page address
+ *		- size   - region size
+ *
  *	DMA Cache Coherency
  *	===================
  *
@@ -418,10 +432,18 @@
 	extern void v6_icache_inval_all(void);
 	v6_icache_inval_all();
 #else
+#ifdef CONFIG_CPU_PJ4_ERRATA_4574_4731
 	asm("mcr	p15, 0, %0, c7, c5, 0	@ invalidate I-cache\n"
 	    :
 	    : "r" (0));
 #endif
+	asm("mcr	p15, 0, %0, c7, c5, 0	@ invalidate I-cache\n"
+	    :
+	    : "r" (0));
+#endif
+	asm("mcr	p15, 0, %0, c7, c5, 4	@ ISB is required per ARM spec\n"
+	    :
+	    : "r" (0));
 }
 
 #define ARCH_HAS_FLUSH_ANON_PAGE
--- linux-mvl-dove-2.6.32.orig/arch/arm/include/asm/assembler.h
+++ linux-mvl-dove-2.6.32/arch/arm/include/asm/assembler.h
@@ -215,7 +215,7 @@
 	@ Slightly optimised to avoid incrementing the pointer twice
 	usraccoff \instr, \reg, \ptr, \inc, 0, \cond, \abort
 	.if	\rept == 2
-	usraccoff \instr, \reg, \ptr, \inc, 4, \cond, \abort
+	usraccoff \instr, \reg, \ptr, \inc, \inc, \cond, \abort
 	.endif
 
 	add\cond \ptr, #\rept * \inc
--- linux-mvl-dove-2.6.32.orig/arch/arm/include/asm/mman.h
+++ linux-mvl-dove-2.6.32/arch/arm/include/asm/mman.h
@@ -1 +1,4 @@
 #include <asm-generic/mman.h>
+
+#define arch_mmap_check(addr, len, flags) \
+	(((flags) & MAP_FIXED && (addr) < FIRST_USER_ADDRESS) ? -EINVAL : 0)
--- linux-mvl-dove-2.6.32.orig/arch/arm/include/asm/user.h
+++ linux-mvl-dove-2.6.32/arch/arm/include/asm/user.h
@@ -88,6 +88,9 @@
 struct user_vfp {
 	unsigned long long fpregs[32];
 	unsigned long fpscr;
+	unsigned long fpexc;
+	unsigned long fpinst;
+	unsigned long fpinst2;
 };
 
 #endif /* _ARM_USER_H */
--- linux-mvl-dove-2.6.32.orig/arch/arm/include/asm/kmap_types.h
+++ linux-mvl-dove-2.6.32/arch/arm/include/asm/kmap_types.h
@@ -18,6 +18,7 @@
 	KM_IRQ1,
 	KM_SOFTIRQ0,
 	KM_SOFTIRQ1,
+	KM_L1_CACHE,
 	KM_L2_CACHE,
 	KM_TYPE_NR
 };
--- linux-mvl-dove-2.6.32.orig/arch/arm/include/asm/time.h
+++ linux-mvl-dove-2.6.32/arch/arm/include/asm/time.h
@@ -0,0 +1,28 @@
+/*
+ * include/asm-arm/plat-orion/time.h
+ *
+ * Marvell Orion SoC time handling.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __ASM_PLAT_ORION_TIME_H
+#define __ASM_PLAT_ORION_TIME_H
+#define   TIMER_CTRL		(TIMER_VIRT_BASE + 0x0000)
+#define    TIMER0_EN		0x0001
+#define    TIMER0_RELOAD_EN	0x0002
+#define    TIMER1_EN		0x0004
+#define    TIMER1_RELOAD_EN	0x0008
+#define   TIMER0_RELOAD		(TIMER_VIRT_BASE + 0x0010)
+#define   TIMER0_VAL		(TIMER_VIRT_BASE + 0x0014)
+#define   TIMER1_RELOAD		(TIMER_VIRT_BASE + 0x0018)
+#define   TIMER1_VAL		(TIMER_VIRT_BASE + 0x001c)
+#define   TIMER_WD_RELOAD		(TIMER_VIRT_BASE + 0x0020)
+#define   TIMER_WD_VAL		(TIMER_VIRT_BASE + 0x0024)
+
+void orion_time_init(unsigned int irq, unsigned int tclk);
+
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/include/asm/ptrace.h
+++ linux-mvl-dove-2.6.32/arch/arm/include/asm/ptrace.h
@@ -150,15 +150,24 @@
  */
 static inline int valid_user_regs(struct pt_regs *regs)
 {
-	if (user_mode(regs) && (regs->ARM_cpsr & PSR_I_BIT) == 0) {
-		regs->ARM_cpsr &= ~(PSR_F_BIT | PSR_A_BIT);
-		return 1;
+	unsigned long mode = regs->ARM_cpsr & MODE_MASK;
+
+	/*
+	 * Always clear the F (FIQ) and A (delayed abort) bits
+	 */
+	regs->ARM_cpsr &= ~(PSR_F_BIT | PSR_A_BIT);
+
+	if ((regs->ARM_cpsr & PSR_I_BIT) == 0) {
+		if (mode == USR_MODE)
+			return 1;
+		if (elf_hwcap & HWCAP_26BIT && mode == USR26_MODE)
+			return 1;
 	}
 
 	/*
 	 * Force CPSR to something logical...
 	 */
-	regs->ARM_cpsr &= PSR_f | PSR_s | (PSR_x & ~PSR_A_BIT) | PSR_T_BIT | MODE32_BIT;
+	regs->ARM_cpsr &= PSR_f | PSR_s | PSR_x | PSR_T_BIT | MODE32_BIT;
 	if (!(elf_hwcap & HWCAP_26BIT))
 		regs->ARM_cpsr |= USR_MODE;
 
--- linux-mvl-dove-2.6.32.orig/arch/arm/include/asm/xor.h
+++ linux-mvl-dove-2.6.32/arch/arm/include/asm/xor.h
@@ -139,3 +139,8 @@
 		xor_speed(&xor_block_8regs);	\
 		xor_speed(&xor_block_32regs);	\
 	} while (0)
+
+
+#ifdef CONFIG_MV_RAID5_XOR_OFFLOAD
+int xor_mv(unsigned int src_no, unsigned int bytes, void **bh_ptr, void *dest_buff);
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/include/asm/tlbflush.h
+++ linux-mvl-dove-2.6.32/arch/arm/include/asm/tlbflush.h
@@ -164,10 +164,24 @@
 # define v4wb_always_flags	(-1UL)
 #endif
 
+#ifdef CONFIG_CACHE_TAUROS2
+#ifdef CONFIG_MRV_PTE_IN_L2
 #define v6wbi_tlb_flags (TLB_WB | TLB_DCLEAN | TLB_BTB | \
 			 TLB_V6_I_FULL | TLB_V6_D_FULL | \
 			 TLB_V6_I_PAGE | TLB_V6_D_PAGE | \
 			 TLB_V6_I_ASID | TLB_V6_D_ASID)
+#else /* Non Table walking on L2 */
+#define v6wbi_tlb_flags (TLB_WB | TLB_DCLEAN | TLB_BTB | TLB_L2CLEAN_FR | \
+			 TLB_V6_I_FULL | TLB_V6_D_FULL |	\
+			 TLB_V6_I_PAGE | TLB_V6_D_PAGE |	\
+			 TLB_V6_I_ASID | TLB_V6_D_ASID)
+#endif
+#else
+#define v6wbi_tlb_flags (TLB_WB | TLB_DCLEAN | TLB_BTB | \
+			 TLB_V6_I_FULL | TLB_V6_D_FULL |	\
+			 TLB_V6_I_PAGE | TLB_V6_D_PAGE |	\
+			 TLB_V6_I_ASID | TLB_V6_D_ASID)
+#endif
 
 #ifdef CONFIG_CPU_TLB_V6
 # define v6wbi_possible_flags	v6wbi_tlb_flags
@@ -186,8 +200,13 @@
 #define v7wbi_tlb_flags (TLB_WB | TLB_DCLEAN | TLB_BTB | \
 			 TLB_V7_UIS_FULL | TLB_V7_UIS_PAGE | TLB_V7_UIS_ASID)
 #else
+#if defined(CONFIG_CACHE_TAUROS2) && !defined(CONFIG_MRV_PTE_IN_L2)
+#define v7wbi_tlb_flags (TLB_WB | TLB_DCLEAN | TLB_BTB | TLB_L2CLEAN_FR |\
+			 TLB_V6_U_FULL | TLB_V6_U_PAGE | TLB_V6_U_ASID)
+#else
 #define v7wbi_tlb_flags (TLB_WB | TLB_DCLEAN | TLB_BTB | \
 			 TLB_V6_U_FULL | TLB_V6_U_PAGE | TLB_V6_U_ASID)
+#endif /* CONFIG_CACHE_TAUROS2 && .. */
 #endif
 
 #ifdef CONFIG_CPU_TLB_V7
@@ -211,6 +230,7 @@
 
 #include <linux/sched.h>
 
+
 struct cpu_tlb_fns {
 	void (*flush_user_range)(unsigned long, unsigned long, struct vm_area_struct *);
 	void (*flush_kern_range)(unsigned long, unsigned long);
@@ -369,12 +389,17 @@
 	if (tlb_flag(TLB_V6_I_ASID))
 		asm("mcr p15, 0, %0, c8, c5, 2" : : "r" (asid) : "cc");
 	if (tlb_flag(TLB_V7_UIS_ASID))
+#ifdef CONFIG_ARM_ERRATA_720789
+		asm("mcr p15, 0, %0, c8, c3, 0" : : "r" (zero) : "cc");
+#else
 		asm("mcr p15, 0, %0, c8, c3, 2" : : "r" (asid) : "cc");
+#endif
 
 	if (tlb_flag(TLB_BTB)) {
 		/* flush the branch target cache */
 		asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc");
 		dsb();
+		isb();
 	}
 }
 
@@ -402,19 +427,32 @@
 			asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc");
 	}
 
+#ifdef CONFIG_CPU_PJ4_ERRATA_4315
+	if (tlb_flag(TLB_V6_U_PAGE)) {
+		unsigned long asid;
+		asid  = ASID(vma->vm_mm);
+		asm("mcr p15, 0, %0, c8, c7, 2" : : "r" (asid) : "cc");
+	}
+#else
 	if (tlb_flag(TLB_V6_U_PAGE))
 		asm("mcr p15, 0, %0, c8, c7, 1" : : "r" (uaddr) : "cc");
+#endif
 	if (tlb_flag(TLB_V6_D_PAGE))
 		asm("mcr p15, 0, %0, c8, c6, 1" : : "r" (uaddr) : "cc");
 	if (tlb_flag(TLB_V6_I_PAGE))
 		asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (uaddr) : "cc");
 	if (tlb_flag(TLB_V7_UIS_PAGE))
+#ifdef CONFIG_ARM_ERRATA_720789
+		asm("mcr p15, 0, %0, c8, c3, 3" : : "r" (uaddr & PAGE_MASK) : "cc");
+#else
 		asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (uaddr) : "cc");
+#endif
 
 	if (tlb_flag(TLB_BTB)) {
 		/* flush the branch target cache */
 		asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc");
 		dsb();
+		isb();
 	}
 }
 
@@ -438,9 +476,14 @@
 		asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (kaddr) : "cc");
 	if (!tlb_flag(TLB_V4_I_PAGE) && tlb_flag(TLB_V4_I_FULL))
 		asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc");
-
+#ifdef CONFIG_CPU_PJ4_ERRATA_4315
+	/* Invalidate all bcoz no vma info */
+	if (tlb_flag(TLB_V6_U_PAGE))
+		asm("mcr p15, 0, %0, c8, c7, 0" : : "r" (0));
+#else
 	if (tlb_flag(TLB_V6_U_PAGE))
 		asm("mcr p15, 0, %0, c8, c7, 1" : : "r" (kaddr) : "cc");
+#endif
 	if (tlb_flag(TLB_V6_D_PAGE))
 		asm("mcr p15, 0, %0, c8, c6, 1" : : "r" (kaddr) : "cc");
 	if (tlb_flag(TLB_V6_I_PAGE))
@@ -478,9 +521,13 @@
 			: : "r" (pmd) : "cc");
 
 	if (tlb_flag(TLB_L2CLEAN_FR))
+#ifndef CONFIG_CACHE_TAUROS2
 		asm("mcr	p15, 1, %0, c15, c9, 1  @ L2 flush_pmd"
 			: : "r" (pmd) : "cc");
-
+#else
+	asm("mcr        p15, 1, %0, c7, c11, 1  @ L2 flush_pmd"
+	    		: : "r" (pmd) : "cc");
+#endif
 	if (tlb_flag(TLB_WB))
 		dsb();
 }
@@ -494,8 +541,13 @@
 			: : "r" (pmd) : "cc");
 
 	if (tlb_flag(TLB_L2CLEAN_FR))
+#ifndef CONFIG_CACHE_TAUROS2
 		asm("mcr	p15, 1, %0, c15, c9, 1  @ L2 flush_pmd"
 			: : "r" (pmd) : "cc");
+#else
+		asm("mcr        p15, 1, %0, c7, c11, 1  @ L2 flush_pmd"
+		    	: : "r" (pmd) : "cc");
+#endif
 }
 
 #undef tlb_flag
--- linux-mvl-dove-2.6.32.orig/arch/arm/include/asm/hardware/pxa-dma.h
+++ linux-mvl-dove-2.6.32/arch/arm/include/asm/hardware/pxa-dma.h
@@ -0,0 +1,50 @@
+/*
+ *  arch/arm/mach-pxa/include/mach/dma.h
+ *
+ *  Author:	Nicolas Pitre
+ *  Created:	Jun 15, 2001
+ *  Copyright:	MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_ARCH_DMA_H
+#define __ASM_ARCH_DMA_H
+
+/*
+ * Descriptor structure for PXA's DMA engine
+ * Note: this structure must always be aligned to a 16-byte boundary.
+ */
+
+typedef struct pxa_dma_desc {
+	volatile u32 ddadr;	/* Points to the next descriptor + flags */
+	volatile u32 dsadr;	/* DSADR value for the current transfer */
+	volatile u32 dtadr;	/* DTADR value for the current transfer */
+	volatile u32 dcmd;	/* DCMD value for the current transfer */
+} pxa_dma_desc;
+
+typedef enum {
+	DMA_PRIO_HIGH = 0,
+	DMA_PRIO_MEDIUM = 1,
+	DMA_PRIO_LOW = 2
+} pxa_dma_prio;
+
+/*
+ * DMA registration
+ */
+
+int __init pxa_init_dma(int num_ch);
+
+int pxa_request_dma (char *name,
+			 pxa_dma_prio prio,
+			 void (*irq_handler)(int, void *),
+			 void *data);
+
+void pxa_free_dma (int dma_ch);
+int pxa_request_dma_intr (char *name, int ch_num,
+		void (*irq_handler)(int, void *),
+		void *data);
+int pxa_reserve_dma_channel (int dma_ch);
+
+#endif /* _ASM_ARCH_DMA_H */
--- linux-mvl-dove-2.6.32.orig/arch/arm/include/asm/hardware/cache-tauros2.h
+++ linux-mvl-dove-2.6.32/arch/arm/include/asm/hardware/cache-tauros2.h
@@ -0,0 +1,13 @@
+/*
+ * include/asm-arm/plat-orion/cache-tauros2.h
+ *
+ * Copyright (C) 2008 Marvell Semiconductor
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+extern void __init tauros2_init(void);
+extern void tauros2_halt(void);
+extern void tauros2_resume(void);
--- linux-mvl-dove-2.6.32.orig/arch/arm/include/asm/mach/map.h
+++ linux-mvl-dove-2.6.32/arch/arm/include/asm/mach/map.h
@@ -27,6 +27,7 @@
 #define MT_MEMORY		9
 #define MT_ROM			10
 #define MT_MEMORY_NONCACHED	11
+#define MT_EXEC_REGS		12
 
 #ifdef CONFIG_MMU
 extern void iotable_init(struct map_desc *, int);
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-realview/Kconfig
+++ linux-mvl-dove-2.6.32/arch/arm/mach-realview/Kconfig
@@ -18,6 +18,7 @@
 	bool "Support ARM11MPCore tile"
 	depends on MACH_REALVIEW_EB
 	select CPU_V6
+	select ARCH_HAS_BARRIERS if SMP
 	help
 	  Enable support for the ARM11MPCore tile on the Realview platform.
 
@@ -35,6 +36,7 @@
 	select CPU_V6
 	select ARM_GIC
 	select HAVE_PATA_PLATFORM
+	select ARCH_HAS_BARRIERS if SMP
 	help
 	  Include support for the ARM(R) RealView MPCore Platform Baseboard.
 	  PB11MPCore is a platform with an on-board ARM11MPCore and has
@@ -46,6 +48,15 @@
 	select ARM_GIC
 	help
 	  Include support for the ARM(R) RealView ARM1176 Platform Baseboard.
+config REALVIEW_DOVE_GPIO_IRQ
+	bool "Support RealView GPIO interrupt for Dove FlareonGV EB"
+	depends on MACH_REALVIEW_EB
+	select GENERIC_GPIO
+	default n
+	help
+	  Enable support for interrupt trigger on GPIO.
+	  Since the LCD, VMETA and GPU on the Dove FlareonGV EB use the GPIO
+	  on RealView platform as their interrupt source. 
 
 config REALVIEW_PB1176_SECURE_FLASH
 	bool "Allow access to the secure flash memory block"
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-realview/realview_eb.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-realview/realview_eb.c
@@ -3,6 +3,7 @@
  *
  *  Copyright (C) 2004 ARM Limited
  *  Copyright (C) 2000 Deep Blue Solutions Ltd
+ *  Ported by Peter Liao and all code is heavily based on Lennert Buytenhek MRVL 2.6.26 git
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -26,6 +27,7 @@
 #include <linux/amba/pl061.h>
 #include <linux/amba/mmci.h>
 #include <linux/io.h>
+#include <linux/smc911x.h>
 
 #include <mach/hardware.h>
 #include <asm/irq.h>
@@ -36,6 +38,9 @@
 #include <asm/hardware/cache-l2x0.h>
 #include <asm/localtimer.h>
 
+#ifdef CONFIG_CACHE_TAUROS2
+#include <asm/plat-orion/cache-tauros2.h>
+#endif
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
@@ -259,6 +264,16 @@
 	},
 };
 
+static struct smc911x_platdata realview_eb_smc911x_platdata = {
+	.int_polarity	= 1,
+};
+
+static struct platform_device realview_eb_eth_device = {
+	.id		= 0,
+	.num_resources	= ARRAY_SIZE(realview_eb_eth_resources),
+	.resource	= realview_eb_eth_resources,
+};
+
 /*
  * Detect and register the correct Ethernet device. RealView/EB rev D
  * platforms use the newer SMSC LAN9118 Ethernet chip
@@ -273,9 +288,15 @@
 		return -ENOMEM;
 
 	idrev = readl(eth_addr + 0x50);
-	if ((idrev & 0xFFFF0000) != 0x01180000)
-		/* SMSC LAN9118 not present, use LAN91C111 instead */
-		name = "smc91x";
+	if ((idrev & 0xFFFF0000) == 0x01180000) {
+		/* SMSC LAN9118 chip present */
+		realview_eb_eth_device.name = "smc911x";
+		realview_eb_eth_device.dev.platform_data =
+			&realview_eb_smc911x_platdata;
+	} else {
+		/* SMSC 91C111 chip present */
+		realview_eb_eth_device.name = "smc91x";
+	}
 
 	iounmap(eth_addr);
 	return realview_eth_register(name, realview_eb_eth_resources);
@@ -394,6 +415,10 @@
 		l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff);
 #endif
 	}
+#ifdef CONFIG_CACHE_TAUROS2
+	tauros2_init();
+#endif
+	clk_register(&realview_clcd_clk);
 
 	realview_flash_register(&realview_eb_flash_resource, 1);
 	platform_device_register(&realview_i2c_device);
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-realview/dove_gpio_irq.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-realview/dove_gpio_irq.c
@@ -0,0 +1,328 @@
+#include <linux/string.h>
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+
+#include <asm/types.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/irqs.h>
+#include <asm/arch/platform.h>
+#include <asm/arch/dove_gpio_irq.h>
+
+/*
+*	GPIO controlling API
+*/
+#define GPIODATA_OFFSET 0x0		// PrimeCell GPIO data register
+#define GPIODIR_OFFSET 0x400	// PrimeCell GPIO data direction register
+#define GPIOIS_OFFSET 0x404		// PrimeCell GPIO interrupt sense register
+#define GPIOIBE_OFFSET 0x408	// PrimeCell GPIO interrupt both edges register
+#define GPIOIEV_OFFSET 0x40c	// PrimeCell GPIO interrupt event register
+#define GPIOIE_OFFSET 0x410		// PrimeCell GPIO interrupt mask
+#define GPIORIS_OFFSET 0x414	// PrimeCell GPIO raw interrupt status
+#define GPIOMIS_OFFSET 0x418	// PrimeCell GPIO masked interrupt status
+#define GPIOIC_OFFSET 0x41c		// PrimeCell GPIO interrupt clear
+
+static u32 gpio_base_addr;
+
+/*
+*	config the gpio pin for interrupt
+*/
+static void gpio_pin_int_config(dove_gpio0_pin pin, gpio_intr_gen intr_gen, gpio_intr_trig intr_trig)
+{
+	u8 reg_value, set_value = 0;
+
+	// config GPIOIBE
+	reg_value = ioread8(gpio_base_addr + GPIOIBE_OFFSET);
+	set_value = 1 << (int)pin;
+	switch(intr_trig) {
+		case GPIO_TRIG_RISING_EDGE:
+		case GPIO_TRIG_FALLING_EDGE:
+		case GPIO_TRIG_HIGH_LEVEL:
+		case GPIO_TRIG_LOW_LEVEL:
+			reg_value = reg_value & (~set_value);
+			break;
+		case GPIO_TRIG_BOTH_EDGE:
+			reg_value = reg_value | set_value;
+			break;
+		default:
+			break;
+	}
+	iowrite8(reg_value, gpio_base_addr + GPIOIBE_OFFSET);
+
+	// config GPIOIEV
+	reg_value = ioread8(gpio_base_addr + GPIOIEV_OFFSET);
+	set_value = 1 << (int)pin;
+	switch(intr_trig) {
+		case GPIO_TRIG_RISING_EDGE:
+		case GPIO_TRIG_HIGH_LEVEL:
+			reg_value = reg_value | set_value;
+			break;
+		case GPIO_TRIG_FALLING_EDGE:
+		case GPIO_TRIG_LOW_LEVEL:
+			reg_value = reg_value & (~set_value);
+			break;
+		case GPIO_TRIG_BOTH_EDGE:
+		default:
+			break;
+	}
+	iowrite8(reg_value, gpio_base_addr + GPIOIEV_OFFSET);
+
+	// config GPIOIS
+	reg_value = ioread8(gpio_base_addr + GPIOIS_OFFSET);
+	set_value = 1 << (int)pin;
+	switch(intr_gen) {
+		case GPIO_INTR_EDGE_TRIGGER:
+			reg_value = reg_value & (~set_value);
+			break;
+		case GPIO_INTR_LEVEL_TRIGGER:
+			reg_value = reg_value | set_value;
+			break;
+		default:
+			break;
+	}
+	iowrite8(reg_value, gpio_base_addr + GPIOIS_OFFSET);
+
+	// clear all interrupt
+	set_value = 0xff;
+	iowrite8(reg_value, gpio_base_addr + GPIOIC_OFFSET);
+
+	// config GPIOIE
+	reg_value = ioread8(gpio_base_addr + GPIOIE_OFFSET);
+	set_value = 1 << (int)pin;
+	reg_value = reg_value | set_value;
+	iowrite8(reg_value, gpio_base_addr + GPIOIE_OFFSET);
+
+	return;
+}
+
+static  u32 gpio_get_int_src(void)
+{
+	u32 status;
+	
+	// read GPIOMIS
+	status = ioread8(gpio_base_addr + GPIOMIS_OFFSET);
+
+	return status;
+}
+
+static void gpio_clear_int(dove_gpio0_pin pin)
+{
+	u8 set_value;
+	
+	// clear GPIOIC
+	set_value = 1 << (int)pin;
+	iowrite8(set_value, gpio_base_addr + GPIOIC_OFFSET);
+
+	return;
+}
+
+/*
+*	Dove FlareonGV use these gpio0 pins as interrupt on Realview EB
+*	
+*	GPIO0_0: LCD
+*	GPIO0_3: VMETA
+*	GPIO0_7: GPU
+*/
+#define NR_DOVE_GPIO_IRQ 3
+#define DOVE_GPIO0_LCD 0
+#define DOVE_GPIO0_VMETA 1
+#define DOVE_GPIO0_GPU 2
+static struct dove_gpio_irq_handler irq_handles[NR_DOVE_GPIO_IRQ];
+
+int dove_gpio_request(dove_gpio0_pin pin, struct dove_gpio_irq_handler *handle)
+{
+	int nr_irq = 0;
+	int ret = 0;
+
+	// check for GPIO pins
+	if((pin != DOVE_GPIO0_0) && (pin != DOVE_GPIO0_3) && (pin != DOVE_GPIO0_7))
+		return -EINVAL;
+
+	// check for device
+	if((handle == NULL) || (handle->dev_name == NULL)) {
+		printk(KERN_WARNING  "%s: Attempt to assing null device to GPIO0 %d.\n", 
+			__func__, (int)pin);
+		ret = -EINVAL;
+		goto out;
+	}
+
+	// assign interrupt handles
+	switch(pin) {
+		case DOVE_GPIO0_0:
+			nr_irq = DOVE_GPIO0_LCD;
+			break;
+		case DOVE_GPIO0_3:
+			nr_irq = DOVE_GPIO0_VMETA;
+			break;
+		case DOVE_GPIO0_7:
+			nr_irq = DOVE_GPIO0_GPU;
+			break;
+		default:
+			break;
+	}
+
+	if((irq_handles[nr_irq].dev_name == NULL) ||
+		(!strcmp(irq_handles[nr_irq].dev_name, handle->dev_name))) {
+		irq_handles[nr_irq].dev_name = handle->dev_name;
+		irq_handles[nr_irq].dev_id = handle->dev_id;
+		irq_handles[nr_irq].handler = handle->handler;
+		irq_handles[nr_irq].intr_gen = handle->intr_gen;
+		irq_handles[nr_irq].intr_trig = handle->intr_trig;
+	} else {
+		printk(KERN_WARNING "%s: GPIO0 %d already allocated to %s!\n", 
+			__func__, (int)pin, irq_handles[nr_irq].dev_name);
+		ret = -EBUSY;
+		goto out;
+	}
+
+	// enable interrupt
+	gpio_pin_int_config(pin, handle->intr_gen, handle->intr_trig);
+
+out:
+	return ret;
+}
+EXPORT_SYMBOL(dove_gpio_request);
+
+int dove_gpio_free(dove_gpio0_pin pin, char *dev_name)
+{
+	u8 reg_value, set_value;
+	int nr_irq;
+
+	// check for GPIO pins
+	if((pin != DOVE_GPIO0_0) || (pin != DOVE_GPIO0_3) || (pin != DOVE_GPIO0_7))
+		return -EINVAL;
+
+	// check for device
+	if(dev_name == NULL)
+		return -EINVAL;
+
+	// release GPIO interrupts
+	switch(pin) {
+		case DOVE_GPIO0_0:
+			nr_irq = DOVE_GPIO0_LCD;
+			break;
+		case DOVE_GPIO0_3:
+			nr_irq = DOVE_GPIO0_VMETA;
+			break;
+		case DOVE_GPIO0_7:
+			nr_irq = DOVE_GPIO0_GPU;
+			break;
+		default:
+			break;
+	}
+
+	if(irq_handles[nr_irq].dev_name == NULL)
+		return -ENXIO;
+
+	if(strcmp(irq_handles[nr_irq].dev_name, dev_name)) {
+		printk(KERN_WARNING "%s: Attempt to release GPIO0 %d failed!\n",
+			__func__, (int)pin);
+		return -ENXIO;
+	}
+
+	// config GPIOIE
+	reg_value = ioread8(gpio_base_addr + GPIOIE_OFFSET);
+	set_value = 1 << (int)pin;
+	reg_value = reg_value & (~set_value);
+	iowrite8(reg_value, gpio_base_addr + GPIOIE_OFFSET);
+
+	irq_handles[nr_irq].dev_name = NULL;
+	irq_handles[nr_irq].dev_id = NULL;
+	irq_handles[nr_irq].handler = NULL;
+
+	return 0;
+}
+EXPORT_SYMBOL(dove_gpio_free);
+
+static irqreturn_t realview_dove_gpio_irqhandler(int irq, void *dev_id)//, struct pt_regs *reg)
+{
+	u32 int_status;
+	int nr_irq;
+	dove_gpio0_pin intr_pin = DOVE_GPIO0_0;
+
+	// get interrupt status
+	int_status = gpio_get_int_src();
+
+	if(int_status & (1 << (int)DOVE_GPIO0_0)) {
+		nr_irq = DOVE_GPIO0_LCD;
+		intr_pin = DOVE_GPIO0_0;
+	} else if(int_status & (1 << (int)DOVE_GPIO0_3)) {
+		nr_irq = DOVE_GPIO0_VMETA;
+		intr_pin = DOVE_GPIO0_3;
+	} else if(int_status & (1 << (int)DOVE_GPIO0_7)) {
+		nr_irq = DOVE_GPIO0_GPU;
+		intr_pin = DOVE_GPIO0_7;
+	} else {
+		printk(KERN_WARNING "%s: didn't use GPIO0 %d as interrupt\n",
+				__func__, int_status);
+		goto out;
+	}
+
+	if(irq_handles[nr_irq].handler == NULL) {
+		printk(KERN_WARNING "%s: No interrupt handler for GPIO0 %d\n", 
+			__func__, int_status);
+		goto out;
+	}
+	
+	irq_handles[nr_irq].handler((int)int_status, (void*)irq_handles[nr_irq].dev_id);
+
+out:
+	// clear interrupt
+	gpio_clear_int(intr_pin);
+
+	return IRQ_HANDLED;
+}
+
+static int __init dove_gpio_irq_init(void)
+{
+	int reg_value;
+	int result;
+	int i;
+
+	/* get the gpio0 base addr */
+	gpio_base_addr = (u32)ioremap(REALVIEW_EB_GPIO0_BASE, 0xfff);
+	/* PLiao add for loading galcore module unstable issue, force all GPIO0 pins to be input */
+	reg_value = 0;
+	iowrite8(reg_value, gpio_base_addr + GPIODIR_OFFSET);
+	/* End of add */
+	/* configure the SYS_IOSEL for GPIO0 */
+	reg_value = ioread32(IO_ADDRESS(REALVIEW_SYS_IOSEL));
+	reg_value = (reg_value & (~0x00700000)) | 0x00100000;
+	iowrite32(reg_value, IO_ADDRESS(REALVIEW_SYS_IOSEL));
+
+	/* config GPIODIR */
+	reg_value = ioread8(gpio_base_addr + GPIODIR_OFFSET);
+	reg_value &= ~(DOVE_GPIO0_0 | DOVE_GPIO0_3 | DOVE_GPIO0_7);
+	iowrite8(reg_value, gpio_base_addr + GPIODIR_OFFSET);
+	
+	/* Request IRQ for GPIO 0 */
+	result = request_irq(IRQ_EB_GPIO0, realview_dove_gpio_irqhandler, 0, DOVE_GPIO_DRV_NAME, NULL);
+	if(result < 0) {
+		printk(KERN_ERR "%s: can not request IRQ(%d)\n", DOVE_GPIO_DRV_NAME, IRQ_EB_GPIO0);
+		return result;
+	}
+
+	/* Initialize interrupt handlers */
+	for(i=0; i<NR_DOVE_GPIO_IRQ; i++) {
+		irq_handles[i].dev_name = NULL;
+		irq_handles[i].dev_id = NULL;
+		irq_handles[i].handler = NULL;
+	}
+
+	return 0;
+}
+
+static void __exit dove_gpio_irq_exit(void)
+{
+	/* free requested IRQ */
+	free_irq(IRQ_EB_GPIO0, NULL);
+
+	/* unmap the gpio0 address */
+	iounmap((void*)gpio_base_addr);
+}
+
+module_init(dove_gpio_irq_init);
+module_exit(dove_gpio_irq_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("Dove GPIO driver");
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-realview/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/mach-realview/Makefile
@@ -11,3 +11,4 @@
 obj-$(CONFIG_SMP)			+= platsmp.o headsmp.o
 obj-$(CONFIG_HOTPLUG_CPU)		+= hotplug.o
 obj-$(CONFIG_LOCAL_TIMERS)		+= localtimer.o
+obj-$(CONFIG_REALVIEW_DOVE_GPIO_IRQ)	+= dove_gpio_irq.o
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-realview/include/mach/barriers.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-realview/include/mach/barriers.h
@@ -0,0 +1,8 @@
+/*
+ * Barriers redefined for RealView ARM11MPCore platforms with L220 cache
+ * controller to work around hardware errata causing the outer_sync()
+ * operation to deadlock the system.
+ */
+#define mb()		dsb()
+#define rmb()		dmb()
+#define wmb()		mb()
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-pxa/em-x270.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-pxa/em-x270.c
@@ -497,16 +497,15 @@
 		goto err_free_vbus_gpio;
 
 	/* USB Hub power-on and reset */
-	gpio_direction_output(usb_hub_reset, 0);
+	gpio_direction_output(usb_hub_reset, 1);
+	gpio_direction_output(GPIO9_USB_VBUS_EN, 0);
 	regulator_enable(em_x270_usb_ldo);
-	gpio_set_value(usb_hub_reset, 1);
 	gpio_set_value(usb_hub_reset, 0);
+	gpio_set_value(usb_hub_reset, 1);
 	regulator_disable(em_x270_usb_ldo);
 	regulator_enable(em_x270_usb_ldo);
-	gpio_set_value(usb_hub_reset, 1);
-
-	/* enable VBUS */
-	gpio_direction_output(GPIO9_USB_VBUS_EN, 1);
+	gpio_set_value(usb_hub_reset, 0);
+	gpio_set_value(GPIO9_USB_VBUS_EN, 1);
 
 	return 0;
 
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-pxa/cm-x300.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-pxa/cm-x300.c
@@ -143,10 +143,10 @@
 	GPIO99_GPIO,			/* Ethernet IRQ */
 
 	/* RTC GPIOs */
-	GPIO95_GPIO,			/* RTC CS */
-	GPIO96_GPIO,			/* RTC WR */
-	GPIO97_GPIO,			/* RTC RD */
-	GPIO98_GPIO,			/* RTC IO */
+	GPIO95_GPIO | MFP_LPM_DRIVE_HIGH,	/* RTC CS */
+	GPIO96_GPIO | MFP_LPM_DRIVE_HIGH,	/* RTC WR */
+	GPIO97_GPIO | MFP_LPM_DRIVE_HIGH,	/* RTC RD */
+	GPIO98_GPIO,				/* RTC IO */
 
 	/* Standard I2C */
 	GPIO21_I2C_SCL,
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-pxa/include/mach/colibri.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-pxa/include/mach/colibri.h
@@ -2,6 +2,7 @@
 #define _COLIBRI_H_
 
 #include <net/ax88796.h>
+#include <mach/mfp.h>
 
 /*
  * common settings for all modules
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-pxa/include/mach/regs-ac97.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-pxa/include/mach/regs-ac97.h
@@ -71,6 +71,9 @@
 #define CAR		__REG(0x40500020)  /* CODEC Access Register */
 #define CAR_CAIP	(1 << 0)	/* Codec Access In Progress */
 
+#define PCSDR		__REG(0x4050002C)    /* PCM Surround Data Register */
+#define PCCLDR		__REG(0x40500038)    /* PCM Center / LFE Data Register */
+
 #define PCDR		__REG(0x40500040)  /* PCM FIFO Data Register */
 #define MCDR		__REG(0x40500060)  /* Mic-in FIFO Data Register */
 
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-mxc/gpio.c
+++ linux-mvl-dove-2.6.32/arch/arm/plat-mxc/gpio.c
@@ -223,13 +223,16 @@
 	struct mxc_gpio_port *port =
 		container_of(chip, struct mxc_gpio_port, chip);
 	u32 l;
+	unsigned long flags;
 
+	spin_lock_irqsave(&port->lock, flags);
 	l = __raw_readl(port->base + GPIO_GDIR);
 	if (dir)
 		l |= 1 << offset;
 	else
 		l &= ~(1 << offset);
 	__raw_writel(l, port->base + GPIO_GDIR);
+	spin_unlock_irqrestore(&port->lock, flags);
 }
 
 static void mxc_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
@@ -238,9 +241,12 @@
 		container_of(chip, struct mxc_gpio_port, chip);
 	void __iomem *reg = port->base + GPIO_DR;
 	u32 l;
+	unsigned long flags;
 
+	spin_lock_irqsave(&port->lock, flags);
 	l = (__raw_readl(reg) & (~(1 << offset))) | (value << offset);
 	__raw_writel(l, reg);
+	spin_unlock_irqrestore(&port->lock, flags);
 }
 
 static int mxc_gpio_get(struct gpio_chip *chip, unsigned offset)
@@ -294,6 +300,8 @@
 		port[i].chip.base = i * 32;
 		port[i].chip.ngpio = 32;
 
+		spin_lock_init(&port[i].lock);
+
 		/* its a serious configuration bug when it fails */
 		BUG_ON( gpiochip_add(&port[i].chip) < 0 );
 
--- linux-mvl-dove-2.6.32.orig/arch/arm/plat-mxc/include/mach/gpio.h
+++ linux-mvl-dove-2.6.32/arch/arm/plat-mxc/include/mach/gpio.h
@@ -19,6 +19,7 @@
 #ifndef __ASM_ARCH_MXC_GPIO_H__
 #define __ASM_ARCH_MXC_GPIO_H__
 
+#include <linux/spinlock.h>
 #include <mach/hardware.h>
 #include <asm-generic/gpio.h>
 
@@ -36,6 +37,7 @@
 	int virtual_irq_start;
 	struct gpio_chip chip;
 	u32 both_edges;
+	spinlock_t lock;
 };
 
 int mxc_gpio_init(struct mxc_gpio_port*, int);
--- linux-mvl-dove-2.6.32.orig/arch/arm/oprofile/op_arm_model.h
+++ linux-mvl-dove-2.6.32/arch/arm/oprofile/op_arm_model.h
@@ -24,6 +24,10 @@
 extern struct op_arm_model_spec op_xscale_spec;
 #endif
 
+#ifdef CONFIG_OPROFILE_MRVL_PJ4
+extern struct op_arm_model_spec op_mrvl_pj4_spec;
+#endif
+
 extern struct op_arm_model_spec op_armv6_spec;
 extern struct op_arm_model_spec op_mpcore_spec;
 extern struct op_arm_model_spec op_armv7_spec;
--- linux-mvl-dove-2.6.32.orig/arch/arm/oprofile/op_model_mrvl_pj4.c
+++ linux-mvl-dove-2.6.32/arch/arm/oprofile/op_model_mrvl_pj4.c
@@ -0,0 +1,399 @@
+/**
+ * @file op_model_mrvl_pj4.c
+ * Marvell PJ4 Performance Monitor Driver
+ *
+ * Based on op_model_xscale.c
+ *
+ * @remark Copyright 2000-2004 Deepak Saxena <dsaxena@mvista.com>
+ * @remark Copyright 2000-2004 MontaVista Software Inc
+ * @remark Copyright 2004 Dave Jiang <dave.jiang@intel.com>
+ * @remark Copyright 2004 Intel Corporation
+ * @remark Copyright 2004 Zwane Mwaikambo <zwane@arm.linux.org.uk>
+ * @remark Copyright 2004 OProfile Authors
+ *
+ * @remark Read the file COPYING
+ *
+ * @author 
+ */
+
+/* #define DEBUG */
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/sched.h>
+#include <linux/oprofile.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+
+#include <asm/system.h>
+
+#include "op_counter.h"
+#include "op_arm_model.h"
+
+#define	PMU_ENABLE	0x001	/* Enable counters */
+#define PMN_RESET	0x002	/* Reset event counters */
+#define	CCNT_RESET	0x004	/* Reset clock counter */
+#define	PMU_RESET	(CCNT_RESET | PMN_RESET)
+#define PMU_CNT64	0x008	/* Make CCNT count every 64th cycle */
+
+/* TODO do runtime detection */
+#if (CONFIG_ARCH_DOVE && CONFIG_CPU_PJ4)
+#define PJ4_PERFORM_MNTR_IRQ  IRQ_DOVE_PERFORM_MNTR
+#endif
+
+/*
+ * Different types of events that can be counted by the Marvell PJ4 Performermance Monitor
+ * as used by Oprofile userspace. Here primarily for documentation purposes.
+ */
+#define SOFTWARE_INCR			0x00	/* software increment */
+#define IFU_IFETCH_REFILL		0x01	/* instruction fetch that cause a refill at the lowest level of instruction or unified cache */
+#define IF_TLB_REFILL			0x02	/* instruction fetch that cause a TLB refill at the lowest level of TLB */
+#define DATA_RW_CACHE_REFILL		0x03	/* data read or write operation that causes a refill of at the lowest level of data or unified cache */
+#define DATA_RW_CACHE_ACCESS		0x04	/* data read or write operation that causes a cache access at the lowest level of data or unified cache */
+#define DATA_RW_TLB_REFILL		0x05	/* data read or write operation that causes a TLB refill at the lowest level of TLB */
+#define DATA_READ_INST_EXEC		0x06	/* data read architecturally executed */
+#define DATA_WRIT_INST_EXEC		0x07	/* data write architecturally executed */
+#define INSN_EXECUTED			0x08	/* instruction architecturally executed */
+#define EXCEPTION_TAKEN			0x09	/* exception taken */
+#define EXCEPTION_RETURN		0x0a	/* exception return architecturally executed */
+#define INSN_WR_CONTEXTIDR		0x0b	/* instruction that writes to the Context ID Register architecturally executed */
+#define SW_CHANGE_PC			0x0c	/* software change of PC, except by an exception, architecturally executed */
+#define BR_EXECUTED			0x0d	/* immediate branch architecturally executed, taken or not taken */
+#define PROCEDURE_RETURN		0x0e	/* procedure return architecturally executed */
+#define UNALIGNED_ACCESS		0x0f	/* unaligned access architecturally executed */
+#define BR_INST_MISS_PRED		0x10	/* branch mispredicted or not predicted */
+#define CYCLE_COUNT			0x11	/* cycle count */
+#define BR_PRED_TAKEN			0x12	/* branches or other change in the program flow that could have been predicted by the branch prediction resources of the processor */
+#define DCACHE_READ_HIT 		0x40	/* counts the number of Data Cache read hits */
+#define DCACHE_READ_MISS		0x41	/* connts the number of Data Cache read misses */
+#define DCACHE_WRITE_HIT 		0x42	/* counts the number of Data Cache write hits */
+#define DCACHE_WRITE_MISS		0x43	/* counts the number of Data Cache write misses */
+#define MMU_BUS_REQUEST			0x44	/* counts the number of cycles of request to the MMU Bus */
+#define ICACHE_BUS_REQUEST 		0x45	/* counts the number of cycles the Instruction Cache requests the bus until the data return */
+#define WB_WRITE_LATENCY 		0x46	/* counts the number of cycles the Write Buffer requests the bus */
+#define HOLD_LDM_STM 			0x47	/* counts the number of cycles the pipeline is held because of a load/store multiple instruction */
+#define NO_DUAL_CFLAG 			0x48	/* counts the number of cycles the processor cannot dual issue because of a Carry flag dependency */
+#define NO_DUAL_REGISTER_PLUS 		0x49	/* counts the number of cycles the processor cannot dual issue because the register file does not have enough read ports and at least one other reason */
+#define LDST_ROB0_ON_HOLD 		0x4a	/* counts the number of cycles a load or store instruction waits to retire from ROB0 */
+#define LDST_ROB1_ON_HOLD 		0x4b	/* counts the number of cycles a load or store instruction waits to retire from ROB0=1 */
+#define DATA_WRITE_ACCESS_COUNT 	0x4c 	/* counts the number of any Data write access */
+#define DATA_READ_ACCESS_COUNT 		0x4d 	/* counts the number of any Data read access */
+#define A2_STALL 			0x4e 	/* counts the number of cycles ALU A2 is stalled */
+#define L2C_WRITE_HIT 			0x4f 	/* counts the number of write accesses to addresses already in the L2C */
+#define L2C_WRITE_MISS 			0x50	/* counts the number of write accesses to addresses not in the L2C */
+#define L2C_READ_COUNT 			0x51	/* counts the number of L2C cache-to-bus external read request */
+#define ICACHE_READ_MISS 		0x60 	/* counts the number of Instruction Cache read misses */
+#define ITLB_MISS 			0x61 	/* counts the number of instruction TLB miss */
+#define SINGLE_ISSUE 			0x62 	/* counts the number of cycles the processor single issues */
+#define BR_RETIRED 			0x63 	/* counts the number of times one branch retires */
+#define ROB_FULL 			0x64 	/* counts the number of cycles the Re-order Buffer (ROB) is full */
+#define MMU_READ_BEAT 			0x65 	/* counts the number of times the bus returns RDY to the MMU */
+#define WB_WRITE_BEAT 			0x66 	/* counts the number times the bus returns ready to the Write Buffer */
+#define DUAL_ISSUE 			0x67 	/* counts the number of cycles the processor dual issues */
+#define NO_DUAL_RAW 			0x68 	/* counts the number of cycles the processor cannot dual issue because of a Read after Write hazard */
+#define HOLD_IS 			0x69 	/* counts the number of cycles the issue is held */
+#define L2C_LATENCY 			0x6a 	/* counts the latency for the most recent L2C read from the external bus Counts cycles */
+#define DCACHE_ACCESS 			0x70 	/* counts the number of times the Data cache is accessed */
+#define DTLB_MISS 			0x71 	/* counts the number of data TLB misses */
+#define BR_PRED_MISS 			0x72 	/* counts the number of mispredicted branches */
+#define A1_STALL 			0x74 	/* counts the number of cycles ALU A1 is stalled */
+#define DCACHE_READ_LATENCY 		0x75 	/* counts the number of cycles the Data cache requests the bus for a read */
+#define DCACHE_WRITE_LATENCY 		0x76 	/* counts the number of cycles the Data cache requests the bus for a write */
+#define NO_DUAL_REGISTER_FILE 		0x77 	/* counts the number of cycles the processor cannot dual issue because the register file doesn't have enough read ports */
+#define BIU_SIMULTANEOUS_ACCESS 	0x78 	/* BIU Simultaneous Access */
+#define L2C_READ_HIT 			0x79 	/* counts the number of L2C cache-to-bus external read requests */
+#define L2C_READ_MISS 			0x7a 	/* counts the number of L2C read accesses that resulted in an external read request */
+#define L2C_WB_FULL 			0x7b 	/* Not Applicable (L2C no longer has a Write Buffer(WB)) */
+#define TLB_MISS 			0x80 	/* counts the number of instruction and data TLB misses */
+#define BR_TAKEN 			0x81 	/* counts the number of taken branches */
+#define WB_FULL 			0x82 	/* counts the number of cycles WB is full */
+#define DCACHE_READ_BEAT 		0x83 	/* counts the number of times the bus returns Data to the Data cache during read request */
+#define DCACHE_WRITE_BEAT 		0x84 	/* counts the number of times the bus returns ready to the Data cache during write request */
+#define NO_DUAL_HW 			0x85 	/* counts the number of cycles the processor cannot dual issue because of hardware conflict */
+#define NO_DUAL_MULTIPLE 		0x86 	/* counts the number of cycles the processor cannot dual issue because of multiple reasons */
+#define BIU_ANY_ACCESS 			0x87 	/* counts the number of cycles the BIU is accessed by any unit */
+#define MAIN_TLB_REFILL_BY_ICACHE 	0x88 	/* counts the number of instruction fetch operations that causes a Main TLB walk */
+#define MAIN_TLB_REFILL_BY_DCACHE 	0x89 	/* counts the number of Data read or write operations that causes a Main TLB walk */
+#define ICACHE_READ_BEAT 		0x8a 	/* counts the number of times the bus returns RDY to the instruction cache */
+#define WMMX2_STORE_FIFO_FULL 		0xc0 	/* counts the number of cycles when the WMMX2 store FIFO is full */
+#define WMMX2_FINISH_FIFO_FULL 		0xc1 	/* counts the number of cycles when the WMMX2 finish FIFO is full */
+#define WMMX2_INST_FIFO_FULL 		0xc2 	/* counts the number of cycles when the WMMX2 instruction FIFO is full */
+#define WMMX2_INST_RETIRED 		0xc3 	/* counts the number of retired WMMX2 instructions */
+#define WMMX2_BUSY 			0xc4 	/* counts the number of cycles when the WMMX2 is busy */
+#define WMMX2_HOLD_MI 			0xc5 	/* counts the number of cycles when WMMX2 holds the issue stage */
+#define WMMX2_HOLD_MW 			0xc6 	/* counts the number of cycles when WMMX2 holds the write back stage */
+/* EVT_CCNT is not hardware defined */
+#define EVT_CCNT			0xFE		/* CPU_CYCLE */
+#define EVT_UNUSED			0xFF
+
+struct pmu_counter {
+	volatile unsigned long ovf;
+	unsigned long reset_counter;
+};
+
+enum { CCNT, PMN0, PMN1, PMN2, PMN3, MAX_COUNTERS };
+
+static struct pmu_counter results[MAX_COUNTERS];
+
+enum { PMU_PJ4 };
+
+struct pmu_type {
+	int id;
+	char *name;
+	int num_counters;
+	unsigned int int_enable;
+	unsigned int cnt_ovf[MAX_COUNTERS];
+	unsigned int cnt_sel[MAX_COUNTERS];
+	unsigned int int_mask[MAX_COUNTERS];
+};
+
+static struct pmu_type pmu_parms[] = {
+	{
+		.id		= PMU_PJ4,
+		.name		= "arm/mrvl_pj4",
+		.num_counters	= 5,
+		.int_mask	= { [CCNT] = 0x80000000, [PMN0] = 0x01,
+				    [PMN1] = 0x02, [PMN2] = 0x04,
+				    [PMN3] = 0x08 },
+		.cnt_ovf	= { [CCNT] = 0x80000000, [PMN0] = 0x01,
+				    [PMN1] = 0x02, [PMN2] = 0x04,
+				    [PMN3] = 0x08 },
+		.cnt_sel	= { [CCNT] = 0xFFFFFFFF, [PMN0] = 0x0, 
+				    [PMN1] = 0x01, [PMN2] = 0x02, 
+				    [PMN3] = 0x03},
+	},
+};
+
+static struct pmu_type *pmu;
+
+static void write_pmnc(u32 val)
+{
+	asm volatile("mcr p15, 0, %0, c9, c12, 0": : "r"(val));
+} 
+
+static u32 read_pmnc(void)
+{
+	u32 val = 0;
+
+	asm volatile("mrc p15, 0, %0, c9, c12, 0" : "=r"(val));
+
+	return val;
+}
+
+static u32 __pj4_read_counter(int counter)
+{
+	u32 val = 0;
+	int reg_shift = 0;
+
+	switch (counter) {
+	case CCNT:
+		asm volatile("mrc p15, 0, %0, c9, c13, 0" : "=r" (val));
+		break;
+	case PMN0:
+	case PMN1:
+	case PMN2:
+	case PMN3:
+		reg_shift = 1 << pmu->cnt_sel[counter];
+		asm volatile("mcr p15, 0, %0, c9, c12, 2": : "r"(reg_shift));
+		asm volatile("mcr p15, 0, %0, c9, c12, 5": : "r"(pmu->cnt_sel[counter]));
+		asm volatile("mrc p15, 0, %0, c9, c13, 2" : "=r"(val));
+		break;
+ 	}
+
+	return val;
+} 
+
+static u32 read_counter(int counter)
+{
+	u32 val = 0;
+
+	val = __pj4_read_counter(counter);
+
+	return val;
+}
+
+static void __pj4_write_counter(int counter, u32 val)
+{
+	int reg_shift = 0;
+
+	switch (counter) {
+	case CCNT:
+		asm volatile("mcr p15, 0, %0, c9, c13, 0" : : "r" (val));
+		break;
+	case PMN0:
+	case PMN1:
+	case PMN2:
+	case PMN3:
+		reg_shift = 1 << pmu->cnt_sel[counter];
+		asm volatile("mcr p15, 0, %0, c9, c12, 2": : "r"(reg_shift));
+		asm volatile("mcr p15, 0, %0, c9, c12, 5": : "r"(pmu->cnt_sel[counter]));
+		asm volatile("mcr p15, 0, %0, c9, c13, 2": : "r"(val));
+		break;
+	}
+}
+
+static void write_counter(int counter, u32 val)
+{
+	__pj4_write_counter(counter, val);
+}
+
+static void __pj4_counter_enable(int int_enable)
+{
+	asm volatile("mcr p15, 0, %0, c9, c12, 1": : "r"(int_enable));
+} 
+
+static void __pj4_counter_disable(int int_enable)
+{ 
+	asm volatile("mcr p15, 0, %0, c9, c12, 2": : "r"(int_enable));
+}
+
+static void __pj4_interrupt_set(int int_enable)
+{
+	asm volatile("mcr p15, 0, %0, c9, c14, 1": : "r"(int_enable));
+} 
+
+static void __pj4_interrupt_clear(int int_enable)
+{ 
+	asm volatile("mcr p15, 0, %0, c9, c14, 2": : "r"(int_enable));
+}
+
+static int mrvl_pj4_setup_ctrs(void)
+{
+	int i = 0;
+
+	for (i = CCNT; i < MAX_COUNTERS; i++) {
+		if (counter_config[i].enabled) {
+			if(i != CCNT) {
+				/* set type of perf counter */
+				int reg_shift = 1 << pmu->cnt_sel[i];
+				asm volatile("mcr p15, 0, %0, c9, c12, 2": : "r"(reg_shift));
+				asm volatile("mcr p15, 0, %0, c9, c12, 5": : "r"(pmu->cnt_sel[i]));
+				asm volatile("mcr p15, 0, %0, c9, c13, 1": : "r"(counter_config[i].event));
+			}
+		} else
+			counter_config[i].event = EVT_UNUSED;
+	}
+
+	for (i = CCNT; i < MAX_COUNTERS; i++) {
+		if (counter_config[i].event == EVT_UNUSED) {
+			counter_config[i].event = 0;
+			pmu->int_enable &= ~pmu->int_mask[i];
+			continue;
+		}
+
+		results[i].reset_counter = counter_config[i].count;
+		write_counter(i, -(u32)counter_config[i].count);
+		pmu->int_enable |= pmu->int_mask[i];
+		printk(KERN_DEBUG "mrvl_pj4_setup_ctrs: counter%d %#08x from %#08lx\n", i,
+			    read_counter(i), counter_config[i].count);
+	}
+
+	return 0;
+}
+
+static void __pj4_check_ctrs(void)
+{
+	int i = 0;
+	u32 flag = 0;
+	u32 pmnc = read_pmnc();
+	
+	pmnc &= ~PMU_ENABLE;
+	write_pmnc(pmnc);
+	/* read overflow flag register */
+	asm volatile("mrc p15, 0, %0, c9, c12, 3" : "=r"(flag));
+	for (i = CCNT; i < MAX_COUNTERS; i++) {
+		if (!(pmu->int_mask[i] & pmu->int_enable))
+			continue;
+
+		if (flag & pmu->cnt_ovf[i])
+			results[i].ovf++;
+		
+ 	}
+
+	/* writeback clears overflow bits */
+	asm volatile("mcr p15, 0, %0, c9, c12, 3": : "r"(flag));
+} 
+
+static irqreturn_t mrvl_pj4_pmu_interrupt(int irq, void *arg)
+{
+	int i = 0;
+	u32 pmnc = read_pmnc();
+
+	/* check counter */
+	__pj4_check_ctrs();
+	
+	for (i = CCNT; i < MAX_COUNTERS; i++) {
+		if (!results[i].ovf)
+			continue;
+		write_counter(i, -(u32)results[i].reset_counter);
+		oprofile_add_sample(get_irq_regs(), i);
+		results[i].ovf--;
+ 	}
+	__pj4_counter_enable(pmu->int_enable);
+	
+	pmnc |= PMU_ENABLE;
+	write_pmnc(pmnc);
+	
+	return IRQ_HANDLED;
+} 
+
+static void mrvl_pj4_pmu_stop(void)
+{
+	u32 pmnc = read_pmnc();
+	
+	/* disable each performonce counter & interrupt */
+	__pj4_interrupt_clear(pmu->int_enable);
+	__pj4_counter_disable(pmu->int_enable);
+
+	pmnc &= ~PMU_ENABLE;
+	write_pmnc(pmnc);
+
+	free_irq(PJ4_PERFORM_MNTR_IRQ, results);
+} 
+
+static int mrvl_pj4_pmu_start(void)
+{ 
+	int ret = 0;
+	u32 pmnc = read_pmnc();
+
+	ret = request_irq(PJ4_PERFORM_MNTR_IRQ, mrvl_pj4_pmu_interrupt, IRQ_NOREQUEST,
+			"Marvell PJ4 Performance Monitor Unit", (void *)results);
+	if (ret < 0) {
+		printk(KERN_ERR "oprofile: unable to request IRQ%d for PJ4 Perfromance Monitor Unit\n",
+			PJ4_PERFORM_MNTR_IRQ);
+		return ret;
+ 	} 
+
+	/* enable each performance counter & interrupt */
+	__pj4_counter_enable(pmu->int_enable);
+
+	pmnc |= PMU_ENABLE;
+	write_pmnc(pmnc);
+	printk(KERN_DEBUG "marvell_mrvl_pj4_pmu_start: pmnc: %#08x mask: %08x\n", pmnc, pmu->int_enable);
+
+	__pj4_interrupt_set(pmu->int_enable);
+
+	return 0;
+}
+
+static int mrvl_pj4_detect_pmu(void)
+{
+	int ret = 0;
+
+	pmu = &pmu_parms[PMU_PJ4];
+
+	if (!ret) {
+		op_mrvl_pj4_spec.name = pmu->name;
+		op_mrvl_pj4_spec.num_counters = pmu->num_counters;
+		printk(KERN_DEBUG "marvell_mrvl_pj4_detect_pmu: detected %s PMU\n", pmu->name);
+	}
+
+	return ret;
+}
+
+struct op_arm_model_spec op_mrvl_pj4_spec = {
+	.init		= mrvl_pj4_detect_pmu,
+	.setup_ctrs	= mrvl_pj4_setup_ctrs,
+	.start		= mrvl_pj4_pmu_start,
+	.stop		= mrvl_pj4_pmu_stop,
+}; 
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/oprofile/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/oprofile/Makefile
@@ -12,3 +12,4 @@
 oprofile-$(CONFIG_OPROFILE_ARMV6)	+= op_model_v6.o
 oprofile-$(CONFIG_OPROFILE_MPCORE)	+= op_model_mpcore.o
 oprofile-$(CONFIG_OPROFILE_ARMV7)	+= op_model_v7.o
+oprofile-$(CONFIG_OPROFILE_MRVL_PJ4)	+= op_model_mrvl_pj4.o
--- linux-mvl-dove-2.6.32.orig/arch/arm/oprofile/common.c
+++ linux-mvl-dove-2.6.32/arch/arm/oprofile/common.c
@@ -149,6 +149,10 @@
 	spec = &op_armv7_spec;
 #endif
 
+#ifdef CONFIG_OPROFILE_MRVL_PJ4
+	spec = &op_mrvl_pj4_spec;
+#endif
+
 	if (spec) {
 		ret = spec->init();
 		if (ret < 0)
--- linux-mvl-dove-2.6.32.orig/arch/arm/lib/findbit.S
+++ linux-mvl-dove-2.6.32/arch/arm/lib/findbit.S
@@ -174,8 +174,8 @@
  */
 .L_found:
 #if __LINUX_ARM_ARCH__ >= 5
-		rsb	r1, r3, #0
-		and	r3, r3, r1
+		rsb	r0, r3, #0
+		and	r3, r3, r0
 		clz	r3, r3
 		rsb	r3, r3, #31
 		add	r0, r2, r3
@@ -190,5 +190,7 @@
 		addeq	r2, r2, #1
 		mov	r0, r2
 #endif
+		cmp	r1, r0			@ Clamp to maxbit
+		movlo	r0, r1
 		mov	pc, lr
 
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-integrator/Kconfig
+++ linux-mvl-dove-2.6.32/arch/arm/mach-integrator/Kconfig
@@ -1,5 +1,33 @@
 if ARCH_INTEGRATOR
 
+menu "Marvell Tahoe Options"
+
+choice
+	depends on ARCH_INTEGRATOR_AP
+	prompt "Tahoe_AHB/Tahoe_AXI/DoveNB"
+	default ARCH_TAHOE_AXI
+
+config ARCH_TAHOE_AXI
+	bool "Support Tahoe AXI platform"
+	default n
+	help
+	  Include support for Marvell Tahoe AXI Platform
+
+config ARCH_TAHOE_AHB
+	bool "Support Tahoe AHB platform"
+	default n
+	help
+	  Include support for Marvell Tahoe AHB Platform
+
+config ARCH_DOVENB_ON_TAHOE_AXI
+	bool "Support Dove NB Testchip on Tahoe AXI platform"
+	default n
+	help
+	  Include support for Marvell Tahoe AHB Platform
+endchoice
+
+endmenu
+
 menu "Integrator Options"
 
 config ARCH_INTEGRATOR_AP
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-integrator/integrator_ap.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-integrator/integrator_ap.c
@@ -37,6 +37,9 @@
 
 #include <mach/lm.h>
 
+#ifdef CONFIG_CACHE_TAUROS2
+#include <asm/hardware/cache-tauros2.h>
+#endif
 #include <asm/mach/arch.h>
 #include <asm/mach/flash.h>
 #include <asm/mach/irq.h>
@@ -57,6 +60,12 @@
 #define VA_EBI_BASE	IO_ADDRESS(INTEGRATOR_EBI_BASE)
 #define VA_CMIC_BASE	IO_ADDRESS(INTEGRATOR_HDR_BASE) + INTEGRATOR_HDR_IC_OFFSET
 
+#define PHY_DOVEMC_BASE 0xB0000000
+#define VA_DOVEMC_BASE  IO_ADDRESS(PHY_DOVEMC_BASE)
+
+#define PHY_DOVEMC_BASE 0xB0000000
+#define VA_DOVEMC_BASE  IO_ADDRESS(PHY_DOVEMC_BASE)
+
 /*
  * Logical      Physical
  * e8000000	40000000	PCI memory		PHYS_PCI_MEM_BASE	(max 512M)
@@ -141,6 +150,16 @@
 		.pfn		= __phys_to_pfn(PHYS_PCI_IO_BASE),
 		.length		= SZ_64K,
 		.type		= MT_DEVICE
+        }, {
+                .virtual        = IO_ADDRESS(PHY_DOVEMC_BASE),
+                .pfn            = __phys_to_pfn(PHY_DOVEMC_BASE),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE
+	}, {
+                .virtual        = IO_ADDRESS(PHY_DOVEMC_BASE),
+                .pfn            = __phys_to_pfn(PHY_DOVEMC_BASE),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE
 	}
 };
 
@@ -310,7 +329,9 @@
 {
 	unsigned long sc_dec;
 	int i;
-
+#ifdef CONFIG_CACHE_TAUROS2
+	tauros2_init();
+#endif
 	platform_device_register(&cfi_flash_device);
 
 	sc_dec = readl(VA_SC_BASE + INTEGRATOR_SC_DEC_OFFSET);
@@ -332,6 +353,29 @@
 
 		lm_device_register(lmdev);
 	}
+	/*
+	 * Maseter 0 - CPU
+	 * Maseter 1 - MCB
+	 */
+        sc_dec = readl(VA_DOVEMC_BASE + 0x280);
+        printk("PLiao: DOVE_MC @ 0x280 is %08X\n", sc_dec);
+        sc_dec = sc_dec&0xfffff0ff | 0x00000e00;
+        writel( sc_dec, VA_DOVEMC_BASE + 0x280);
+        /*
+	 * Master 0 - VMeta
+	 * Master 1 - GC500
+	 * Master 2 - LCD
+	 * Master 3 - Upstream (SB)
+	 */
+        sc_dec = readl(VA_DOVEMC_BASE + 0x510);
+        printk("PLiao: DOVE_MC @ 0x510 is %08X\n", sc_dec);
+        sc_dec = sc_dec&0xf0f0f0f0 | 0x010e0101;
+        writel( sc_dec, VA_DOVEMC_BASE + 0x510);
+        sc_dec = readl(VA_DOVEMC_BASE + 0x280);
+        printk("PLiao: DOVE_MC @ 0x280 is %08X after mod\n", sc_dec);
+        sc_dec = readl(VA_DOVEMC_BASE + 0x510);
+        printk("PLiao: DOVE_MC @ 0x510 is %08X after mod\n", sc_dec);
+        /* End of supersection testing */
 }
 
 static void __init ap_init_timer(void)
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-integrator/include/mach/vmalloc.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-integrator/include/mach/vmalloc.h
@@ -1,5 +1,5 @@
 /*
- *  arch/arm/mach-integrator/include/mach/vmalloc.h
+ *  linux/include/asm-arm/arch-integrator/vmalloc.h
  *
  *  Copyright (C) 2000 Russell King.
  *
@@ -17,4 +17,4 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
-#define VMALLOC_END       (PAGE_OFFSET + 0x10000000)
+#define VMALLOC_END       (PAGE_OFFSET + 0x28000000)
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-integrator/include/mach/memory.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-integrator/include/mach/memory.h
@@ -1,5 +1,5 @@
 /*
- *  arch/arm/mach-integrator/include/mach/memory.h
+ *  linux/include/asm-arm/arch-integrator/memory.h
  *
  *  Copyright (C) 1999 ARM Limited
  *
@@ -24,10 +24,17 @@
  * Physical DRAM offset.
  */
 #define PHYS_OFFSET	UL(0x00000000)
-
 #define BUS_OFFSET	UL(0x80000000)
+
 #define __virt_to_bus(x)	((x) - PAGE_OFFSET + BUS_OFFSET)
 #define __bus_to_virt(x)	((x) - BUS_OFFSET + PAGE_OFFSET)
 #define __pfn_to_bus(x)		(((x) << PAGE_SHIFT) + BUS_OFFSET)
 
+/*
+ * Increase size of DMA-consistent memory region
+ *
+ */
+#define CONSISTENT_DMA_SIZE 0x3000000   // 48M
+#define CONFIG_FORCE_MAX_ZONEORDER 14
+
 #endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-orion5x/irq.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-orion5x/irq.c
@@ -22,7 +22,6 @@
 static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
 	BUG_ON(irq < IRQ_ORION5X_GPIO_0_7 || irq > IRQ_ORION5X_GPIO_24_31);
-
 	orion_gpio_irq_handler((irq - IRQ_ORION5X_GPIO_0_7) << 3);
 }
 
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-orion5x/common.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-orion5x/common.c
@@ -717,7 +717,7 @@
 void __init tag_fixup_mem32(struct machine_desc *mdesc, struct tag *t,
 			    char **from, struct meminfo *meminfo)
 {
-	for (; t->hdr.size; t = tag_next(t))
+	for (; atag_valid(t); t = tag_next(t))
 		if (t->hdr.tag == ATAG_MEM &&
 		    (!t->u.mem.size || t->u.mem.size & ~PAGE_MASK ||
 		     t->u.mem.start & ~PAGE_MASK)) {
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -37,6 +37,10 @@
 #define SYSTEM_REV_S_USES_VAUX3 0x8
 
 static int board_keymap[] = {
+	/*
+	 * Note that KEY(x, 8, KEY_XXX) entries represent "entrire row
+	 * connected to the ground" matrix state.
+	 */
 	KEY(0, 0, KEY_Q),
 	KEY(0, 1, KEY_O),
 	KEY(0, 2, KEY_P),
@@ -44,6 +48,7 @@
 	KEY(0, 4, KEY_BACKSPACE),
 	KEY(0, 6, KEY_A),
 	KEY(0, 7, KEY_S),
+
 	KEY(1, 0, KEY_W),
 	KEY(1, 1, KEY_D),
 	KEY(1, 2, KEY_F),
@@ -52,6 +57,7 @@
 	KEY(1, 5, KEY_J),
 	KEY(1, 6, KEY_K),
 	KEY(1, 7, KEY_L),
+
 	KEY(2, 0, KEY_E),
 	KEY(2, 1, KEY_DOT),
 	KEY(2, 2, KEY_UP),
@@ -59,6 +65,8 @@
 	KEY(2, 5, KEY_Z),
 	KEY(2, 6, KEY_X),
 	KEY(2, 7, KEY_C),
+	KEY(2, 8, KEY_F9),
+
 	KEY(3, 0, KEY_R),
 	KEY(3, 1, KEY_V),
 	KEY(3, 2, KEY_B),
@@ -67,20 +75,23 @@
 	KEY(3, 5, KEY_SPACE),
 	KEY(3, 6, KEY_SPACE),
 	KEY(3, 7, KEY_LEFT),
+
 	KEY(4, 0, KEY_T),
 	KEY(4, 1, KEY_DOWN),
 	KEY(4, 2, KEY_RIGHT),
 	KEY(4, 4, KEY_LEFTCTRL),
 	KEY(4, 5, KEY_RIGHTALT),
 	KEY(4, 6, KEY_LEFTSHIFT),
+	KEY(4, 8, KEY_F10),
+
 	KEY(5, 0, KEY_Y),
+	KEY(5, 8, KEY_F11),
+
 	KEY(6, 0, KEY_U),
+
 	KEY(7, 0, KEY_I),
 	KEY(7, 1, KEY_F7),
 	KEY(7, 2, KEY_F8),
-	KEY(0xff, 2, KEY_F9),
-	KEY(0xff, 4, KEY_F10),
-	KEY(0xff, 5, KEY_F11),
 };
 
 static struct matrix_keymap_data board_map_data = {
--- linux-mvl-dove-2.6.32.orig/arch/arm/vfp/vfpmodule.c
+++ linux-mvl-dove-2.6.32/arch/arm/vfp/vfpmodule.c
@@ -38,6 +38,9 @@
  */
 unsigned int VFP_arch;
 
+extern unsigned int pmDebug;
+extern unsigned int pmDebug1;
+
 static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v)
 {
 	struct thread_info *thread = v;
@@ -152,11 +155,24 @@
 		return;
 	}
 
-	/*
-	 * Update the FPSCR with the additional exception flags.
-	 * Comparison instructions always return at least one of
-	 * these flags set.
-	 */
+
+        /*
+         * If any of the status flags are set, update the FPSCR.
+         * Comparison instructions always return at least one of
+         * these flags set.
+         */
+        /*
+           ARM spec does not define that H/W have to clear all condition
+           flags when bouncing a floating-point compare instruction. The
+           new support code only ORR the result flags on top of the
+           original flags without clearing any flags. This does not make
+           any sense to me, because clearing flags is also part of the
+           compare result. So we clear these bits here to make it PASS
+        */
+
+        if (exceptions & (FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V))
+                fpscr &= ~(FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V);
+
 	fpscr |= exceptions;
 
 	fmxr(FPSCR, fpscr);
@@ -221,6 +237,10 @@
 {
 	u32 fpscr, orig_fpscr, fpsid, exceptions;
 
+	/* Adjust saved PC for thumb-2 user program */
+	if (regs->ARM_cpsr & PSR_T_BIT)
+		regs->ARM_pc += 2;
+
 	pr_debug("VFP: bounce: trigger %08x fpexc %08x\n", trigger, fpexc);
 
 	/*
@@ -376,18 +396,40 @@
 	sysdev_register(&vfp_pm_sysdev);
 }
 
+void vfp_save(void)
+{
+	struct pm_message temp;
+	/*
+	 * if VFP was not initialized yet, then do nothing
+	 */
+	if (VFP_arch)
+		vfp_pm_suspend(NULL , temp);
+}
+
+void vfp_restore(void)
+{
+	if (VFP_arch)
+		vfp_pm_resume(NULL);
+}
 
 #else
 static inline void vfp_pm_init(void) { }
 #endif /* CONFIG_PM */
 
 /*
- * Synchronise the hardware VFP state of a thread other than current with the
- * saved one. This function is used by the ptrace mechanism.
+ * Synchronise the hardware VFP state of a thread with the saved one.
+ * This function is used by the ptrace mechanism and the signal handler path.
  */
-#ifdef CONFIG_SMP
 void vfp_sync_state(struct thread_info *thread)
 {
+	unsigned int cpu = get_cpu();
+	u32 fpexc = fmrx(FPEXC);
+	int vfp_enabled;
+	int self;
+
+	vfp_enabled = fpexc & FPEXC_EN;
+	self = thread == current_thread_info();
+#ifdef CONFIG_SMP
 	/*
 	 * On SMP systems, the VFP state is automatically saved at every
 	 * context switch. We mark the thread VFP state as belonging to a
@@ -395,18 +437,22 @@
 	 * needed.
 	 */
 	thread->vfpstate.hard.cpu = NR_CPUS;
-}
-#else
-void vfp_sync_state(struct thread_info *thread)
-{
-	unsigned int cpu = get_cpu();
-	u32 fpexc = fmrx(FPEXC);
-
 	/*
-	 * If VFP is enabled, the previous state was already saved and
-	 * last_VFP_context updated.
+	 * Only the current thread's saved VFP context can be out-of-date.
+	 * For others there is nothing else to do, since we already ensured
+	 * force loading above.
+	 */
+	if (!self)
+		goto out;
+#endif
+	/*
+	 * If the VFP is enabled only the current thread's saved VFP
+	 * context can get out-of-date. For other threads the context
+	 * was updated when the current thread started to use the VFP.
+	 * This also means that the context will be reloaded next time
+	 * the thread uses the VFP, so no need to enforce it.
 	 */
-	if (fpexc & FPEXC_EN)
+	if (vfp_enabled && !self)
 		goto out;
 
 	if (!last_VFP_context[cpu])
@@ -415,8 +461,14 @@
 	/*
 	 * Save the last VFP state on this CPU.
 	 */
-	fmxr(FPEXC, fpexc | FPEXC_EN);
+	if (!vfp_enabled)
+		fmxr(FPEXC, fpexc | FPEXC_EN);
 	vfp_save_state(last_VFP_context[cpu], fpexc);
+	/*
+	 * Disable VFP in case it was enabled so that the force reload
+	 * can happen.
+	 */
+	fpexc &= ~FPEXC_EN;
 	fmxr(FPEXC, fpexc);
 
 	/*
@@ -428,7 +480,6 @@
 out:
 	put_cpu();
 }
-#endif
 
 #include <linux/smp.h>
 
@@ -506,3 +557,4 @@
 }
 
 late_initcall(vfp_init);
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/vfp/vfphw.S
+++ linux-mvl-dove-2.6.32/arch/arm/vfp/vfphw.S
@@ -277,9 +277,10 @@
 #ifdef CONFIG_VFPv3
 	@ d16 - d31 registers
 	.irp	dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
-1:	mcrr	p11, 3, r1, r2, c\dr	@ fmdrr	r1, r2, d\dr
+1:	mcrr	p11, 3, r0, r1, c\dr	@ fmdrr	r0, r1, d\dr
 	mov	pc, lr
 	.org	1b + 8
 	.endr
 #endif
 ENDPROC(vfp_put_double)
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mm/cache-v7.S
+++ linux-mvl-dove-2.6.32/arch/arm/mm/cache-v7.S
@@ -91,7 +91,12 @@
  THUMB(	stmfd	sp!, {r4-r7, r9-r11, lr}	)
 	bl	v7_flush_dcache_all
 	mov	r0, #0
+#ifdef CONFIG_CPU_PJ4_ERRATA_4574_4731
 	mcr	p15, 0, r0, c7, c5, 0		@ I+BTB cache invalidate
+#endif
+	mcr	p15, 0, r0, c7, c5, 0		@ I+BTB cache invalidate
+	isb					@ ISB and DSB are required per
+	dsb					@ ARM spec
  ARM(	ldmfd	sp!, {r4-r5, r7, r9-r11, lr}	)
  THUMB(	ldmfd	sp!, {r4-r7, r9-r11, lr}	)
 	mov	pc, lr
@@ -161,6 +166,9 @@
 1:
  USER(	mcr	p15, 0, r0, c7, c11, 1	)	@ clean D line to the point of unification
 	dsb
+#ifdef CONFIG_CPU_PJ4_ERRATA_4574_4731
+ USER(	mcr	p15, 0, r0, c7, c5, 1	)	@ invalidate I line
+#endif
  USER(	mcr	p15, 0, r0, c7, c5, 1	)	@ invalidate I line
 	add	r0, r0, r2
 2:
--- linux-mvl-dove-2.6.32.orig/arch/arm/mm/fault.c
+++ linux-mvl-dove-2.6.32/arch/arm/mm/fault.c
@@ -386,6 +386,9 @@
 	if (addr < TASK_SIZE)
 		return do_page_fault(addr, fsr, regs);
 
+	if (user_mode(regs))
+		goto bad_area;
+
 	index = pgd_index(addr);
 
 	/*
--- linux-mvl-dove-2.6.32.orig/arch/arm/mm/highmem.c
+++ linux-mvl-dove-2.6.32/arch/arm/mm/highmem.c
@@ -79,7 +79,8 @@
 	unsigned int idx = type + KM_TYPE_NR * smp_processor_id();
 
 	if (kvaddr >= (void *)FIXADDR_START) {
-		__cpuc_flush_dcache_page((void *)vaddr);
+		if (cache_is_vivt())
+			__cpuc_flush_dcache_page((void *)vaddr);
 #ifdef CONFIG_DEBUG_HIGHMEM
 		BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx));
 		set_pte_ext(TOP_PTE(vaddr), __pte(0), 0);
@@ -124,3 +125,87 @@
 	pte = TOP_PTE(vaddr);
 	return pte_page(*pte);
 }
+
+#ifdef CONFIG_CPU_CACHE_VIPT
+
+#include <linux/percpu.h>
+
+/*
+ * The VIVT cache of a highmem page is always flushed before the page
+ * is unmapped. Hence unmapped highmem pages need no cache maintenance
+ * in that case.
+ *
+ * However unmapped pages may still be cached with a VIPT cache, and
+ * it is not possible to perform cache maintenance on them using physical
+ * addresses unfortunately.  So we have no choice but to set up a temporary
+ * virtual mapping for that purpose.
+ *
+ * Yet this VIPT cache maintenance may be triggered from DMA support
+ * functions which are possibly called from interrupt context. As we don't
+ * want to keep interrupt disabled all the time when such maintenance is
+ * taking place, we therefore allow for some reentrancy by preserving and
+ * restoring the previous fixmap entry before the interrupted context is
+ * resumed.  If the reentrancy depth is 0 then there is no need to restore
+ * the previous fixmap, and leaving the current one in place allow it to
+ * be reused the next time without a TLB flush (common with DMA).
+ */
+
+static DEFINE_PER_CPU(int, kmap_high_l1_vipt_depth);
+
+void *kmap_high_l1_vipt(struct page *page, pte_t *saved_pte)
+{
+	unsigned int idx, cpu = smp_processor_id();
+	int *depth = &per_cpu(kmap_high_l1_vipt_depth, cpu);
+	unsigned long vaddr, flags;
+	pte_t pte, *ptep;
+
+	idx = KM_L1_CACHE + KM_TYPE_NR * cpu;
+	vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
+	ptep = TOP_PTE(vaddr);
+	pte = mk_pte(page, kmap_prot);
+
+	if (!in_interrupt())
+		preempt_disable();
+
+	raw_local_irq_save(flags);
+	(*depth)++;
+	if (pte_val(*ptep) == pte_val(pte)) {
+		*saved_pte = pte;
+	} else {
+		*saved_pte = *ptep;
+		set_pte_ext(ptep, pte, 0);
+		local_flush_tlb_kernel_page(vaddr);
+	}
+	raw_local_irq_restore(flags);
+
+	return (void *)vaddr;
+}
+
+void kunmap_high_l1_vipt(struct page *page, pte_t saved_pte)
+{
+	unsigned int idx, cpu = smp_processor_id();
+	int *depth = &per_cpu(kmap_high_l1_vipt_depth, cpu);
+	unsigned long vaddr, flags;
+	pte_t pte, *ptep;
+
+	idx = KM_L1_CACHE + KM_TYPE_NR * cpu;
+	vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
+	ptep = TOP_PTE(vaddr);
+	pte = mk_pte(page, kmap_prot);
+
+	BUG_ON(pte_val(*ptep) != pte_val(pte));
+	BUG_ON(*depth <= 0);
+
+	raw_local_irq_save(flags);
+	(*depth)--;
+	if (*depth != 0 && pte_val(pte) != pte_val(saved_pte)) {
+		set_pte_ext(ptep, saved_pte, 0);
+		local_flush_tlb_kernel_page(vaddr);
+	}
+	raw_local_irq_restore(flags);
+
+	if (!in_interrupt())
+		preempt_enable();
+}
+
+#endif  /* CONFIG_CPU_CACHE_VIPT */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mm/init.c
+++ linux-mvl-dove-2.6.32/arch/arm/mm/init.c
@@ -632,10 +632,10 @@
 void free_initmem(void)
 {
 #ifdef CONFIG_HAVE_TCM
-	extern char *__tcm_start, *__tcm_end;
+	extern char __tcm_start, __tcm_end;
 
-	totalram_pages += free_area(__phys_to_pfn(__pa(__tcm_start)),
-				    __phys_to_pfn(__pa(__tcm_end)),
+	totalram_pages += free_area(__phys_to_pfn(__pa(&__tcm_start)),
+				    __phys_to_pfn(__pa(&__tcm_end)),
 				    "TCM link");
 #endif
 
--- linux-mvl-dove-2.6.32.orig/arch/arm/mm/copypage-v4wt.c
+++ linux-mvl-dove-2.6.32/arch/arm/mm/copypage-v4wt.c
@@ -25,7 +25,7 @@
 {
 	asm("\
 	stmfd	sp!, {r4, lr}			@ 2\n\
-	mov	r2, %0				@ 1\n\
+	mov	r2, %2				@ 1\n\
 	ldmia	r1!, {r3, r4, ip, lr}		@ 4\n\
 1:	stmia	r0!, {r3, r4, ip, lr}		@ 4\n\
 	ldmia	r1!, {r3, r4, ip, lr}		@ 4+1\n\
@@ -40,7 +40,7 @@
 	mcr	p15, 0, r2, c7, c7, 0		@ flush ID cache\n\
 	ldmfd	sp!, {r4, pc}			@ 3"
 	:
-	: "I" (PAGE_SIZE / 64));
+	: "r" (kto), "r" (kfrom), "I" (PAGE_SIZE / 64));
 }
 
 void v4wt_copy_user_highpage(struct page *to, struct page *from,
--- linux-mvl-dove-2.6.32.orig/arch/arm/mm/flush.c
+++ linux-mvl-dove-2.6.32/arch/arm/mm/flush.c
@@ -13,6 +13,7 @@
 
 #include <asm/cacheflush.h>
 #include <asm/cachetype.h>
+#include <asm/highmem.h>
 #include <asm/system.h>
 #include <asm/tlbflush.h>
 
@@ -125,14 +126,20 @@
 	 * page.  This ensures that data in the physical page is mutually
 	 * coherent with the kernels mapping.
 	 */
-#ifdef CONFIG_HIGHMEM
-	/*
-	 * kmap_atomic() doesn't set the page virtual address, and
-	 * kunmap_atomic() takes care of cache flushing already.
-	 */
-	if (page_address(page))
-#endif
+	if (!PageHighMem(page)) {
 		__cpuc_flush_dcache_page(page_address(page));
+	} else {
+		void *addr = kmap_high_get(page);
+		if (addr) {
+			__cpuc_flush_dcache_page(addr);
+			kunmap_high(page);
+		} else if (cache_is_vipt()) {
+			pte_t saved_pte;
+			addr = kmap_high_l1_vipt(page, &saved_pte);
+			__cpuc_flush_dcache_page(addr);
+			kunmap_high_l1_vipt(page, saved_pte);
+		}
+	}
 
 	/*
 	 * If this is a page cache page, and we have an aliasing VIPT cache,
@@ -243,11 +250,4 @@
 		 */
 		flush_pfn_alias(pfn, vmaddr);
 	}
-
-	/*
-	 * Invalidate kernel mapping.  No data should be contained
-	 * in this mapping of the page.  FIXME: this is overkill
-	 * since we actually ask for a write-back and invalidate.
-	 */
-	__cpuc_flush_dcache_page(page_address(page));
 }
--- linux-mvl-dove-2.6.32.orig/arch/arm/mm/Kconfig
+++ linux-mvl-dove-2.6.32/arch/arm/mm/Kconfig
@@ -388,7 +388,7 @@
 
 # ARMv6
 config CPU_V6
-	bool "Support ARM V6 processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB || MACH_REALVIEW_PBX
+	bool "Support ARM V6 processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB || MACH_REALVIEW_PBX || ARCH_DOVE
 	select CPU_32v6
 	select CPU_ABRT_EV6
 	select CPU_PABRT_V6
@@ -398,6 +398,7 @@
 	select CPU_HAS_ASID if MMU
 	select CPU_COPY_V6 if MMU
 	select CPU_TLB_V6 if MMU
+	select CPU_PJ4 if DOVE_REV_Y0 || ARCH_INTEGRATOR
 
 # ARMv6k
 config CPU_32v6K
@@ -413,7 +414,7 @@
 
 # ARMv7
 config CPU_V7
-	bool "Support ARM V7 processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB || MACH_REALVIEW_PBX
+	bool "Support ARM V7 processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB || MACH_REALVIEW_PBX || ARCH_DOVE
 	select CPU_32v6K
 	select CPU_32v7
 	select CPU_ABRT_EV7
@@ -424,6 +425,7 @@
 	select CPU_HAS_ASID if MMU
 	select CPU_COPY_V6 if MMU
 	select CPU_TLB_V7 if MMU
+	select CPU_PJ4 if DOVE_REV_Y0 || ARCH_INTEGRATOR
 
 # Figure out what processor architecture version we should be using.
 # This defines the compiler instruction set which depends on the machine type.
@@ -454,6 +456,9 @@
 config CPU_32v7
 	bool
 
+config CPU_PJ4
+        bool
+
 # The abort model
 config CPU_ABRT_NOMMU
 	bool
@@ -722,7 +727,7 @@
 config HAS_TLS_REG
 	bool
 	depends on !TLS_REG_EMUL
-	default y if SMP || CPU_32v7
+	default y if SMP || ( CPU_32v7 && !ANDROID)
 	help
 	  This selects support for the CP15 thread register.
 	  It is defined to be available on some ARMv6 processors (including
@@ -767,12 +772,123 @@
 config CACHE_XSC3L2
 	bool "Enable the L2 cache on XScale3"
 	depends on CPU_XSC3
-	default y
-	select OUTER_CACHE
-	help
+        default y
+        select OUTER_CACHE
+        help
 	  This option enables the L2 cache on XScale3.
 
 config ARM_L1_CACHE_SHIFT
 	int
 	default 6 if ARCH_OMAP3
 	default 5
+
+config CACHE_TAUROS2
+	bool "Enable the Tauros2 L2 cache controller"
+	depends on MACH_REALVIEW_EB || ARCH_DOVE || ARCH_INTEGRATOR
+	default y
+	select OUTER_CACHE
+	help
+	  This option enables the Tauros2 L2 cache controller (as
+	  found on PJ1/PJ4).
+
+config MRV_PTE_IN_L2
+	bool "Enable Table walk in L2 to improve performance"
+	depends on CACHE_TAUROS2
+	default y
+	help
+	  Say Y if you wan to enable table walk in L2 (MMU get pte
+	  from L2 memory) to improve performance
+
+config CACHE_L2LINEFILL_BURST8_ENABLE
+	bool "Enable L2 Line Fill Burst Length 8"
+	depends on CACHE_TAUROS2 && !MV_L2_PREFETCH_OFF
+	default n
+	help
+	  Say Y to enable L2 line fill burst length to 8
+
+config MV_L2_WA_ON
+       bool "Enable Write allocate for L2 cache"
+        default n
+	 help
+	   Say Y if you want to enable write allocate feature
+	   of L2 cache H/W
+	   depends on CACHE_TAUROS2 && CPU_WA_ENABLE
+
+config MV_L2_PREFETCH_OFF
+	bool "Disable prefetch mode for L2 chache"
+	depends on CACHE_TAUROS2
+	default y
+	help
+	  Say Y if you want to disable prefetch feature
+	  of L2 cache H/W
+
+
+config CPU_PJ4_PMC_ACCESS_IN_USERMODE
+	bool "Enabled User mode access for PMC"
+	depends on CPU_PJ4
+	default n
+	help
+	  Say Y if you allow user mode application to access Performance 
+	  Monitor Counter of PJ4 in user mode
+
+config DOVE_DEBUGGER_MODE_V6
+	bool "Dove debugger mode is V6"
+	depends on ARCH_DOVE
+	default y
+	help
+	  Say Y if Debugger mode of the cpu is v6.
+
+config CPU_ENABLE_WRITECO
+	bool "Enable Write Buffer Coalescing"
+	depends on CPU_PJ4
+	default y
+	help
+	  Say Y if you to enable write buffer coalescing feature
+
+config CPU_WRITECO_CYCLE
+	int "Write Buffer Coalescing cycles"
+	depends on CPU_ENABLE_WRITECO
+	default 3
+	range 0 7
+	help
+	Defines the number of cycles a store might stay in the write 
+	buffer waiting for coalescing.	
+	0 -> no wait cycles
+	1 -> 2 wait cycle
+	2 -> 4 wait cycles
+	3 -> 8 wait cycles
+	4 -> 16 wait cycles
+
+choice
+	prompt "Cache Write Allocate Setting"
+	depends on (CPU_V6 || CPU_V7 || CPU_PJ4) && MV_L2_WA_ON
+
+config CPU_L2WAONLY_ENABLE
+	bool "Support Outer Write Allocate only"
+	depends on CPU_V6 || CPU_V7
+	default y
+	help
+	  Say Y to set Inner cache write allocate only
+
+config CPU_WA_DISABLE
+	bool "Disable Inner & Outer Write Allocate"
+	depends on CPU_V6 || CPU_V7 || CPU_PJ4
+	default n
+	help
+	  Say Y to disable Write allocate support
+endchoice
+
+config CPU_PJ4_ERRATA_4574_4731
+	bool "Marvell CPU errata 4574 and 4731 S/W fix"
+	depends on CPU_PJ4
+	default y
+	help
+	  Say Y to enable Marvell CPU errata S/W work
+	  around for #4574 and #4731
+config CPU_PJ4_ERRATA_4315
+	bool "Marvell CPU errata 4315 S/W fix"
+	depends on CPU_PJ4
+	default y
+	help
+	  Say Y to enable Marvell CPU errata S/W work
+	  around for #4315
--- linux-mvl-dove-2.6.32.orig/arch/arm/mm/copypage-v6.c
+++ linux-mvl-dove-2.6.32/arch/arm/mm/copypage-v6.c
@@ -41,6 +41,7 @@
 	kfrom = kmap_atomic(from, KM_USER0);
 	kto = kmap_atomic(to, KM_USER1);
 	copy_page(kto, kfrom);
+	__cpuc_flush_dcache_page(kto);
 	kunmap_atomic(kto, KM_USER1);
 	kunmap_atomic(kfrom, KM_USER0);
 }
--- linux-mvl-dove-2.6.32.orig/arch/arm/mm/mmu.c
+++ linux-mvl-dove-2.6.32/arch/arm/mm/mmu.c
@@ -192,6 +192,7 @@
 
 #define PROT_PTE_DEVICE		L_PTE_PRESENT|L_PTE_YOUNG|L_PTE_DIRTY|L_PTE_WRITE
 #define PROT_SECT_DEVICE	PMD_TYPE_SECT|PMD_SECT_AP_WRITE
+#define PROT_SO_EXEC_DEVICE	PMD_TYPE_SECT|PMD_SECT_AP_WRITE
 
 static struct mem_type mem_types[] = {
 	[MT_DEVICE] = {		  /* Strongly ordered / ARMv6 shared device */
@@ -257,6 +258,12 @@
 		.prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE,
 		.domain    = DOMAIN_KERNEL,
 	},
+	[MT_EXEC_REGS] = {	  /* Strongly ordered executable device (registers) */
+		.prot_pte	= PROT_PTE_DEVICE,
+		.prot_l1	= PMD_TYPE_TABLE,
+		.prot_sect	= PROT_SO_EXEC_DEVICE | PMD_SECT_UNCACHED,
+		.domain		= DOMAIN_IO,
+	},
 };
 
 const struct mem_type *get_mem_type(unsigned int type)
@@ -1068,4 +1075,6 @@
 		pmd[1] = __pmd(pmdval + (1 << (PGDIR_SHIFT - 1)));
 		flush_pmd_entry(pmd);
 	}
+
+	local_flush_tlb_all();
 }
--- linux-mvl-dove-2.6.32.orig/arch/arm/mm/copypage-v4wb.c
+++ linux-mvl-dove-2.6.32/arch/arm/mm/copypage-v4wb.c
@@ -27,7 +27,7 @@
 {
 	asm("\
 	stmfd	sp!, {r4, lr}			@ 2\n\
-	mov	r2, %0				@ 1\n\
+	mov	r2, %2				@ 1\n\
 	ldmia	r1!, {r3, r4, ip, lr}		@ 4\n\
 1:	mcr	p15, 0, r0, c7, c6, 1		@ 1   invalidate D line\n\
 	stmia	r0!, {r3, r4, ip, lr}		@ 4\n\
@@ -44,7 +44,7 @@
 	mcr	p15, 0, r1, c7, c10, 4		@ 1   drain WB\n\
 	ldmfd	 sp!, {r4, pc}			@ 3"
 	:
-	: "I" (PAGE_SIZE / 64));
+	: "r" (kto), "r" (kfrom), "I" (PAGE_SIZE / 64));
 }
 
 void v4wb_copy_user_highpage(struct page *to, struct page *from,
--- linux-mvl-dove-2.6.32.orig/arch/arm/mm/proc-macros.S
+++ linux-mvl-dove-2.6.32/arch/arm/mm/proc-macros.S
@@ -105,7 +105,11 @@
 	.long	0x00						@ L_PTE_MT_UNCACHED
 	.long	PTE_EXT_TEX(1)					@ L_PTE_MT_BUFFERABLE
 	.long	PTE_CACHEABLE					@ L_PTE_MT_WRITETHROUGH
-	.long	PTE_CACHEABLE | PTE_BUFFERABLE			@ L_PTE_MT_WRITEBACK
+#if defined(CONFIG_CPU_L2WAONLY_ENABLE)
+	.long	PTE_EXT_TEX(5) | PTE_CACHEABLE | PTE_BUFFERABLE	@ L_PTE_MT_WRITEBACK (L2 WA only)
+#else
+	.long   PTE_CACHEABLE | PTE_BUFFERABLE			@ L_PTE_MT_WRITEBACK
+#endif
 	.long	PTE_BUFFERABLE					@ L_PTE_MT_DEV_SHARED
 	.long	0x00						@ unused
 	.long	0x00						@ L_PTE_MT_MINICACHE (not present)
@@ -149,9 +153,12 @@
 	tst	r1, #L_PTE_YOUNG
 	tstne	r1, #L_PTE_PRESENT
 	moveq	r3, #0
-
 	str	r3, [r0]
 	mcr	p15, 0, r0, c7, c10, 1		@ flush_pte
+#ifndef CONFIG_MRV_PTE_IN_L2
+	mcr     p15, 1, r0, c7, c11, 1 @ clean L2C D entry
+#endif
+	
 	.endm
 
 
--- linux-mvl-dove-2.6.32.orig/arch/arm/mm/cache-v6.S
+++ linux-mvl-dove-2.6.32/arch/arm/mm/cache-v6.S
@@ -56,8 +56,9 @@
 ENTRY(v6_flush_kern_cache_all)
 	mov	r0, #0
 #ifdef HARVARD_CACHE
-	mcr	p15, 0, r0, c7, c14, 0		@ D cache clean+invalidate
 #ifndef CONFIG_ARM_ERRATA_411920
+	mcr     p15, 0, r0, c7, c10, 0          @ D cache clean
+	mcr     p15, 0, r0, c7, c6, 0           @ D cache invalidate
 	mcr	p15, 0, r0, c7, c5, 0		@ I+BTB cache invalidate
 #else
 	b	v6_icache_inval_all
@@ -248,6 +249,11 @@
  *	- end     - virtual end address of region
  */
 ENTRY(v6_dma_flush_range)
+#ifdef CONFIG_CACHE_FLUSH_RANGE_LIMIT
+	sub	r2, r1, r0
+	cmp	r2, #CONFIG_CACHE_FLUSH_RANGE_LIMIT
+	bhi	v6_dma_flush_dcache_all
+#endif
 	bic	r0, r0, #D_CACHE_LINE_SIZE - 1
 1:
 #ifdef HARVARD_CACHE
@@ -262,6 +268,18 @@
 	mcr	p15, 0, r0, c7, c10, 4		@ drain write buffer
 	mov	pc, lr
 
+#ifdef CONFIG_CACHE_FLUSH_RANGE_LIMIT
+v6_dma_flush_dcache_all:
+	mov	r0, #0
+#ifdef HARVARD_CACHE
+	mcr	p15, 0, r0, c7, c14, 0		@ D cache clean+invalidate
+#else
+	mcr	p15, 0, r0, c7, c15, 0		@ Cache clean+invalidate
+#endif
+	mcr	p15, 0, r0, c7, c10, 4		@ drain write buffer
+	mov	pc, lr
+#endif
+
 	__INITDATA
 
 	.type	v6_cache_fns, #object
--- linux-mvl-dove-2.6.32.orig/arch/arm/mm/copypage-feroceon.c
+++ linux-mvl-dove-2.6.32/arch/arm/mm/copypage-feroceon.c
@@ -18,7 +18,7 @@
 {
 	asm("\
 	stmfd	sp!, {r4-r9, lr}		\n\
-	mov	ip, %0				\n\
+	mov	ip, %2				\n\
 1:	mov	lr, r1				\n\
 	ldmia	r1!, {r2 - r9}			\n\
 	pld	[lr, #32]			\n\
@@ -64,7 +64,7 @@
 	mcr	p15, 0, ip, c7, c10, 4		@ drain WB\n\
 	ldmfd	sp!, {r4-r9, pc}"
 	:
-	: "I" (PAGE_SIZE));
+	: "r" (kto), "r" (kfrom), "I" (PAGE_SIZE));
 }
 
 void feroceon_copy_user_highpage(struct page *to, struct page *from,
--- linux-mvl-dove-2.6.32.orig/arch/arm/mm/proc-v6.S
+++ linux-mvl-dove-2.6.32/arch/arm/mm/proc-v6.S
@@ -45,6 +45,9 @@
 	stmfd	sp!, {lr}
 	cpsid	if				@ disable interrupts
 	bl	v6_flush_kern_cache_all
+#if defined(CONFIG_CACHE_TAUROS2)
+	mcr	p15, 1, r0, c7, c11, 0		@ L2C clean all
+#endif
 	mrc	p15, 0, r0, c1, c0, 0		@ ctrl register
 	bic	r0, r0, #0x1000			@ ...i............
 	bic	r0, r0, #0x0006			@ .............ca.
@@ -59,8 +62,6 @@
  *	to what would be the reset vector.
  *
  *	- loc   - location to jump to for soft reset
- *
- *	It is assumed that:
  */
 	.align	5
 ENTRY(cpu_v6_reset)
@@ -77,11 +78,21 @@
 	mov	r1, #0
 	mcr	p15, 0, r1, c7, c10, 4		@ DWB - WFI may enter a low-power mode
 	mcr	p15, 0, r1, c7, c0, 4		@ wait for interrupt
+#ifdef CONFIG_DOVE_REV_Y0
+	mrc	p15, 0, r0, c0, c0, 0		@ Main ID
+	and	r0, #0xF
+	cmp	r0, #1				@ issue the following instructions for Y0 only
+	mcreq   p15, 0, r1, c7, c5, 4           @ Prefetch Flush - ISB
+	mcreq	p15, 0, r1, c7, c10, 4		@ Sync Data barrier
+#endif
 	mov	pc, lr
 
 ENTRY(cpu_v6_dcache_clean_area)
 #ifndef TLB_CAN_READ_FROM_L1_CACHE
 1:	mcr	p15, 0, r0, c7, c10, 1		@ clean D entry
+#ifndef CONFIG_MRV_PTE_IN_L2
+	mcr     p15, 1, r0, c7, c11, 1		@ clean L2C D entry
+#endif
 	add	r0, r0, #D_CACHE_LINE_SIZE
 	subs	r1, r1, #D_CACHE_LINE_SIZE
 	bhi	1b
@@ -102,7 +113,11 @@
 #ifdef CONFIG_MMU
 	mov	r2, #0
 	ldr	r1, [r1, #MM_CONTEXT_ID]	@ get mm->context.id
+#ifdef CONFIG_MRV_PTE_IN_L2
 	orr	r0, r0, #TTB_FLAGS
+#else
+	bic     r0, r0, #0x18                   @ DONOT Cache the page table in L2
+#endif
 	mcr	p15, 0, r2, c7, c5, 6		@ flush BTAC/BTB
 	mcr	p15, 0, r2, c7, c10, 4		@ drain write buffer
 	mcr	p15, 0, r0, c2, c0, 0		@ set TTB 0
@@ -132,7 +147,19 @@
 
 
 cpu_v6_name:
-	.asciz	"ARMv6-compatible processor"
+	.asciiz	"ARMv6-compatible processor"
+	.size	cpu_v6_name, . - cpu_v6_name
+
+cpu_pj4_name:
+	.ascii	"Marvell PJ4 v6 processor"
+#ifdef CONFIG_IWMMXT
+	.ascii	"-wmmx"
+#endif
+#ifdef CONFIG_CPU_ENABLE_WRITECO
+	.ascii	"-wco"
+#endif
+	.ascii	"\0"
+	.size	cpu_pj4_name, . - cpu_pj4_name
 	.align
 
 	__INIT
@@ -159,6 +186,14 @@
 	mcr	p15, 0, r0, c1, c0, 1
 #endif
 
+#ifdef CONFIG_CPU_PJ4_PMC_ACCESS_IN_USERMODE
+	@ Enable performance counters user access
+        mrc     p15, 0, r0, c9, c14, 0
+        orr     r0, r0, #0x1
+        mcr     p15, 0, r0, c9, c14, 0
+#endif /* CONFIG_CPU_PJ4_PMC_ACCESS_IN_USERMODE */
+
+
 	mov	r0, #0
 	mcr	p15, 0, r0, c7, c14, 0		@ clean+invalidate D cache
 	mcr	p15, 0, r0, c7, c5, 0		@ invalidate I cache
@@ -167,9 +202,22 @@
 #ifdef CONFIG_MMU
 	mcr	p15, 0, r0, c8, c7, 0		@ invalidate I + D TLBs
 	mcr	p15, 0, r0, c2, c0, 2		@ TTB control register
+#ifdef CONFIG_MRV_PTE_IN_L2
 	orr	r4, r4, #TTB_FLAGS
+#else
+						@ OC bits in TTB1 register
+	bic	r4, r4, #0x18                   @ DONOT Cache the page table in L2
+#endif
 	mcr	p15, 0, r4, c2, c0, 1		@ load TTB1
 #endif /* CONFIG_MMU */
+#ifdef CONFIG_CPU_ENABLE_WRITECO
+						@ Refer 88SV581x-v6.Rev1.5.pdf
+	mrc	p15, 1, r0, c15, c1, 0		@ Marvell Extra Features Reg
+	orr	r0, r0, #0x100
+						@ Write coalesce cycles
+	orr	r0, r0, #CONFIG_CPU_WRITECO_CYCLE << 9
+	mcr	p15, 1, r0, c15, c1, 0		@ Marvell Extra Features Reg
+#endif
 	adr	r5, v6_crval
 	ldmia	r5, {r5, r6}
 #ifdef CONFIG_CPU_ENDIAN_BE8
@@ -205,7 +253,7 @@
 
 	.type	cpu_arch_name, #object
 cpu_arch_name:
-	.asciz	"armv6"
+	.ascii	"armv6"
 	.size	cpu_arch_name, . - cpu_arch_name
 
 	.type	cpu_elf_name, #object
@@ -221,8 +269,8 @@
 	 */
 	.type	__v6_proc_info, #object
 __v6_proc_info:
-	.long	0x0007b000
-	.long	0x0007f000
+	.long	0x000f0000
+	.long	0x000f0000
 	.long   PMD_TYPE_SECT | \
 		PMD_SECT_AP_WRITE | \
 		PMD_SECT_AP_READ | \
@@ -241,3 +289,26 @@
 	.long	v6_user_fns
 	.long	v6_cache_fns
 	.size	__v6_proc_info, . - __v6_proc_info
+
+	.type	__pj4_v6_proc_info, #object
+__pj4_v6_proc_info:
+	.long	0x560f5810
+	.long	0xff0ffff0
+	.long   PMD_TYPE_SECT | \
+		PMD_SECT_AP_WRITE | \
+		PMD_SECT_AP_READ | \
+		PMD_FLAGS
+	.long   PMD_TYPE_SECT | \
+		PMD_SECT_XN | \
+		PMD_SECT_AP_WRITE | \
+		PMD_SECT_AP_READ
+	b	__v6_setup
+	.long	cpu_arch_name
+	.long	cpu_elf_name
+	.long	HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP
+	.long	cpu_pj4_name
+	.long	v6_processor_functions
+	.long	v6wbi_tlb_fns
+	.long	v6_user_fns
+	.long	v6_cache_fns
+	.size	__pj4_v6_proc_info, . - __pj4_v6_proc_info
--- linux-mvl-dove-2.6.32.orig/arch/arm/mm/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/mm/Makefile
@@ -27,6 +27,9 @@
 obj-$(CONFIG_CPU_ABRT_EV6)	+= abort-ev6.o
 obj-$(CONFIG_CPU_ABRT_EV7)	+= abort-ev7.o
 
+AFLAGS_abort-ev6.o	:=-Wa,-march=armv6k
+AFLAGS_abort-ev7.o	:=-Wa,-march=armv7-a
+
 obj-$(CONFIG_CPU_PABRT_LEGACY)	+= pabort-legacy.o
 obj-$(CONFIG_CPU_PABRT_V6)	+= pabort-v6.o
 obj-$(CONFIG_CPU_PABRT_V7)	+= pabort-v7.o
@@ -38,11 +41,15 @@
 obj-$(CONFIG_CPU_CACHE_V6)	+= cache-v6.o
 obj-$(CONFIG_CPU_CACHE_V7)	+= cache-v7.o
 obj-$(CONFIG_CPU_CACHE_FA)	+= cache-fa.o
+AFLAGS_cache-v7.o		:= -Wa,-march=armv7a
+
+AFLAGS_cache-v6.o	:=-Wa,-march=armv6
+AFLAGS_cache-v7.o	:=-Wa,-march=armv7-a
 
 obj-$(CONFIG_CPU_COPY_V3)	+= copypage-v3.o
 obj-$(CONFIG_CPU_COPY_V4WT)	+= copypage-v4wt.o
 obj-$(CONFIG_CPU_COPY_V4WB)	+= copypage-v4wb.o
-obj-$(CONFIG_CPU_COPY_FEROCEON)	+= copypage-feroceon.o
+obj-$(CONFIG_CPU_COPY_FEROCEON)        += copypage-feroceon.o
 obj-$(CONFIG_CPU_COPY_V6)	+= copypage-v6.o context.o
 obj-$(CONFIG_CPU_SA1100)	+= copypage-v4mc.o
 obj-$(CONFIG_CPU_XSCALE)	+= copypage-xscale.o
@@ -57,6 +64,10 @@
 obj-$(CONFIG_CPU_TLB_V6)	+= tlb-v6.o
 obj-$(CONFIG_CPU_TLB_V7)	+= tlb-v7.o
 obj-$(CONFIG_CPU_TLB_FA)	+= tlb-fa.o
+AFLAGS_tlb-v7.o			:= -Wa,-march=armv7a
+
+AFLAGS_tlb-v6.o		:=-Wa,-march=armv6
+AFLAGS_tlb-v7.o		:=-Wa,-march=armv7-a
 
 obj-$(CONFIG_CPU_ARM610)	+= proc-arm6_7.o
 obj-$(CONFIG_CPU_ARM710)	+= proc-arm6_7.o
@@ -83,8 +94,12 @@
 obj-$(CONFIG_CPU_FEROCEON)	+= proc-feroceon.o
 obj-$(CONFIG_CPU_V6)		+= proc-v6.o
 obj-$(CONFIG_CPU_V7)		+= proc-v7.o
+AFLAGS_proc-v7.o		:= -Wa,-march=armv7a
+
+AFLAGS_proc-v6.o	:=-Wa,-march=armv6
+AFLAGS_proc-v7.o	:=-Wa,-march=armv7-a
 
 obj-$(CONFIG_CACHE_FEROCEON_L2)	+= cache-feroceon-l2.o
 obj-$(CONFIG_CACHE_L2X0)	+= cache-l2x0.o
 obj-$(CONFIG_CACHE_XSC3L2)	+= cache-xsc3l2.o
-
+obj-$(CONFIG_CACHE_TAUROS2)	+= cache-tauros2.o
--- linux-mvl-dove-2.6.32.orig/arch/arm/mm/tlb-v7.S
+++ linux-mvl-dove-2.6.32/arch/arm/mm/tlb-v7.S
@@ -18,6 +18,7 @@
 #include <asm/tlbflush.h>
 #include "proc-macros.S"
 
+
 /*
  *	v7wbi_flush_user_tlb_range(start, end, vma)
  *
@@ -35,12 +36,19 @@
 	vma_vm_mm r3, r2			@ get vma->vm_mm
 	mmid	r3, r3				@ get vm_mm->context.id
 	dsb
+#ifndef CONFIG_CPU_PJ4_ERRATA_4315
 	mov	r0, r0, lsr #PAGE_SHIFT		@ align address
 	mov	r1, r1, lsr #PAGE_SHIFT
 	asid	r3, r3				@ mask ASID
 	orr	r0, r3, r0, lsl #PAGE_SHIFT	@ Create initial MVA
 	mov	r1, r1, lsl #PAGE_SHIFT
 	vma_vm_flags r2, r2			@ get vma->vm_flags
+#else
+	asid    r0, r3				@ mask ASID
+	mcr     p15, 0, r0, c8, c7, 2           @ TLB invalidate U ASID
+	vma_vm_flags r2, r2			@ get vma->vm_flags
+	b	2f
+#endif
 1:
 #ifdef CONFIG_SMP
 	mcr	p15, 0, r0, c8, c3, 1		@ TLB invalidate U MVA (shareable) 
@@ -50,9 +58,11 @@
 	add	r0, r0, #PAGE_SZ
 	cmp	r0, r1
 	blo	1b
+2:
 	mov	ip, #0
 	mcr	p15, 0, ip, c7, c5, 6		@ flush BTAC/BTB
 	dsb
+	isb
 	mov	pc, lr
 ENDPROC(v7wbi_flush_user_tlb_range)
 
@@ -70,6 +80,12 @@
 	mov	r1, r1, lsr #PAGE_SHIFT
 	mov	r0, r0, lsl #PAGE_SHIFT
 	mov	r1, r1, lsl #PAGE_SHIFT
+	#ifdef CONFIG_CPU_PJ4_ERRATA_4315
+	mov	r2, #0x0
+	mcr     p15, 0, r2, c8, c7, 0           @ TLB invalidate U ASID all
+						@ Invalidate all bcoz no vma info
+	b	2f
+	#endif
 1:
 #ifdef CONFIG_SMP
 	mcr	p15, 0, r0, c8, c3, 1		@ TLB invalidate U MVA (shareable)
@@ -79,6 +95,7 @@
 	add	r0, r0, #PAGE_SZ
 	cmp	r0, r1
 	blo	1b
+2:
 	mov	r2, #0
 	mcr	p15, 0, r2, c7, c5, 6		@ flush BTAC/BTB
 	dsb
--- linux-mvl-dove-2.6.32.orig/arch/arm/mm/dma-mapping.c
+++ linux-mvl-dove-2.6.32/arch/arm/mm/dma-mapping.c
@@ -602,6 +602,12 @@
 			vaddr += offset;
 			inner_op(vaddr, vaddr + size);
 			kunmap_high(page);
+		} else if (cache_is_vipt()) {
+			pte_t saved_pte;
+			vaddr = kmap_high_l1_vipt(page, &saved_pte);
+			vaddr += offset;
+			inner_op(vaddr, vaddr + size);
+			kunmap_high_l1_vipt(page, saved_pte);
 		}
 	}
 
--- linux-mvl-dove-2.6.32.orig/arch/arm/mm/abort-ev6.S
+++ linux-mvl-dove-2.6.32/arch/arm/mm/abort-ev6.S
@@ -32,6 +32,7 @@
  * Faulty SWP instruction on 1136 doesn't set bit 11 in DFSR (erratum 326103).
  * The test below covers all the write situations, including Java bytecodes
  */
+#if 0 /* Uncomment it because it will cause Thumb2 rootfs cannot mounting*/
 	bic	r1, r1, #1 << 11		@ clear bit 11 of FSR
 	tst	r3, #PSR_J_BIT			@ Java?
 	movne	pc, lr
@@ -43,6 +44,7 @@
 	do_ldrd_abort
 	tst	r3, #1 << 20			@ L = 0 -> write
 	orreq	r1, r1, #1 << 11		@ yes.
+#endif
 	mov	pc, lr
 
 
--- linux-mvl-dove-2.6.32.orig/arch/arm/mm/cache-tauros2.c
+++ linux-mvl-dove-2.6.32/arch/arm/mm/cache-tauros2.c
@@ -0,0 +1,379 @@
+/*
+ * arch/arm/mm/cache-tauros2.c - Tauros2 L2 cache controller support
+ *
+ * Copyright (C) 2008 Marvell Semiconductor
+ * Original Author: Lennert Buytenhek
+ * Modified by Peter Liao <pliao@marvell.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ *
+ * References:
+ * - PJ1 CPU Core Datasheet,
+ *   Document ID MV-S104837-01, Rev 0.7, January 24 2008.
+ * - PJ4 CPU Core Datasheet,
+ *   Document ID MV-S105190-00, Rev 1.1, March 14 2008.
+ */
+
+#include <linux/init.h>
+#include <asm/cacheflush.h>
+#include <asm/hardware/cache-tauros2.h>
+
+static int ignore_extra_features;
+static int __init ignore_extra_features_setup(char *__unused)
+{
+	ignore_extra_features = 1;
+	return 1;
+}
+
+__setup("ignore_extra_features", ignore_extra_features_setup);
+
+/*
+ * When Tauros2 is used on a CPU that supports the v7 hierarchical
+ * cache operations, the cache handling code in proc-v7.S takes care
+ * of everything, including handling DMA coherency.
+ *
+ * So, we only need to register outer cache operations here if we're
+ * being used on a pre-v7 CPU, and we only need to build support for
+ * outer cache operations into the kernel image if the kernel has been
+ * configured to support a pre-v7 CPU.
+ */
+#if __LINUX_ARM_ARCH__ >= 6
+/*
+ * Low-level cache maintenance operations.
+ */
+static inline void tauros2_clean_pa(unsigned long addr)
+{
+	__asm__("mcr p15, 1, %0, c7, c11, 3" : : "r" (addr));
+}
+
+static inline void tauros2_clean_inv_pa(unsigned long addr)
+{
+	__asm__("mcr p15, 1, %0, c7, c15, 3" : : "r" (addr));
+}
+
+static inline void tauros2_inv_pa(unsigned long addr)
+{
+	__asm__("mcr p15, 1, %0, c7, c7, 3" : : "r" (addr));
+}
+
+
+/*
+ * Linux primitives.
+ *
+ * Note that the end addresses passed to Linux primitives are
+ * noninclusive.
+ */
+#define CACHE_LINE_SIZE		32
+
+static void tauros2_inv_range(unsigned long start, unsigned long end)
+{
+	/*
+	 * Clean and invalidate partial first cache line.
+	 */
+	if (start & (CACHE_LINE_SIZE - 1)) {
+		tauros2_clean_inv_pa(start & ~(CACHE_LINE_SIZE - 1));
+		start = (start | (CACHE_LINE_SIZE - 1)) + 1;
+	}
+
+	/*
+	 * Clean and invalidate partial last cache line.
+	 */
+	if (end & (CACHE_LINE_SIZE - 1)) {
+		tauros2_clean_inv_pa(end & ~(CACHE_LINE_SIZE - 1));
+		end &= ~(CACHE_LINE_SIZE - 1);
+	}
+
+	/*
+	 * Invalidate all full cache lines between 'start' and 'end'.
+	 */
+	while (start < end) {
+		tauros2_inv_pa(start);
+		start += CACHE_LINE_SIZE;
+	}
+
+	dsb();
+}
+
+static void tauros2_clean_range(unsigned long start, unsigned long end)
+{
+	start &= ~(CACHE_LINE_SIZE - 1);
+	while (start < end) {
+		tauros2_clean_pa(start);
+		start += CACHE_LINE_SIZE;
+	}
+
+	dsb();
+}
+
+static void tauros2_flush_range(unsigned long start, unsigned long end)
+{
+	start &= ~(CACHE_LINE_SIZE - 1);
+	while (start < end) {
+		tauros2_clean_inv_pa(start);
+		start += CACHE_LINE_SIZE;
+	}
+
+	dsb();
+}
+#endif
+
+static inline u32 read_extra_features(void)
+{
+	u32 u;
+
+	__asm__("mrc p15, 1, %0, c15, c1, 0" : "=r" (u));
+
+	return u;
+}
+
+static inline void write_extra_features(u32 u)
+{
+	if (ignore_extra_features)
+		printk(KERN_WARNING "ignore_extra_features was set, skip "
+		       "modifying the extra features register\n");
+	else
+		__asm__("mcr p15, 1, %0, c15, c1, 0" : : "r" (u));
+}
+
+static void disable_l2_prefetch(void)
+{
+	u32 u;
+
+	/*
+	 * Read the CPU Extra Features register and verify that the
+	 * Disable L2 Prefetch bit is set.
+	 */
+	u = read_extra_features();
+	if (!(u & 0x01000000)) {
+		printk(KERN_INFO "Tauros2: Disabling L2 prefetch.\n");
+		write_extra_features(u | 0x01000000);
+	}
+}
+
+static void disable_l2_wa(void)
+{
+	u32 u;
+
+	/*
+	 * Read the CPU Extra Features register and verify that the
+	 * Enable L2 write allocate bit is set.
+	 */
+	u = read_extra_features();
+	if (u & 0x10000000) {
+		printk(KERN_INFO "Tauros2: Disabling L2 write allocate.\n");
+		write_extra_features(u & 0xefffffff);
+	}
+}
+
+static void enable_l2_wa(void)
+{
+	u32 u;
+
+	/*
+	 * Read the CPU Extra Features register and verify that the
+	 * Enable L2 write allocate bit is clear.
+	 */
+	u = read_extra_features();
+	if (!(u & 0x10000000)) {
+		write_extra_features(u | 0x10000000);
+	}
+}
+
+static void disable_l2_burst8(void)
+{
+	u32 u;
+
+	/*
+	 * Read the CPU Extra Features register and verify that the
+	 * Enable L2 burst lenght 8 bit is set.
+	 */
+	u = read_extra_features();
+	if (u & 0x00100000) {
+		printk(KERN_INFO "Tauros2: Disabling L2 Burst Length 8 \n");
+		write_extra_features(u & 0xffefffff);
+	}
+}
+
+static void enable_l2_burst8(void)
+{
+	u32 u;
+
+	/*
+	 * Read the CPU Extra Features register and verify that the
+	 * Enable L2 burst lenght 8 bit is clear.
+	 */
+	u = read_extra_features();
+	if (!(u & 0x00100000)) {
+		write_extra_features(u | 0x00100000);
+	}
+}
+
+static void enable_l2_prefetch(void)
+{
+	u32 u;
+
+	/*
+	 * Read the CPU Extra Features register and verify that the
+	 * Disable L2 Prefetch bit is set.
+	 */
+	u = read_extra_features();
+	if ((u & 0x01000000)) {
+		write_extra_features(u & 0xfeffffff);
+	}
+}
+
+static inline int __init cpuid_scheme(void)
+{
+	extern int processor_id;
+
+	return !!((processor_id & 0x000f0000) == 0x000f0000);
+}
+
+static inline u32 __init read_mmfr3(void)
+{
+	u32 mmfr3;
+
+	__asm__("mrc p15, 0, %0, c0, c1, 7\n" : "=r" (mmfr3));
+
+	return mmfr3;
+}
+
+static inline u32 __init read_actlr(void)
+{
+	u32 actlr;
+
+	__asm__("mrc p15, 0, %0, c1, c0, 1\n" : "=r" (actlr));
+
+	return actlr;
+}
+
+static inline void __init write_actlr(u32 actlr)
+{
+	__asm__("mcr p15, 0, %0, c1, c0, 1\n" : : "r" (actlr));
+}
+
+void __init tauros2_init(void)
+{
+	extern int processor_id;
+	char *mode;
+#ifdef CONFIG_MV_L2_PREFETCH_OFF
+	disable_l2_prefetch();
+#else
+	enable_l2_prefetch();
+#endif
+
+#ifdef CONFIG_MV_L2_WA_ON
+	enable_l2_wa();
+#else
+	disable_l2_wa();
+#endif
+
+#ifdef CONFIG_CACHE_L2LINEFILL_BURST8_ENABLE
+	enable_l2_burst8();
+#else
+	disable_l2_burst8();
+#endif
+
+#ifdef CONFIG_CPU_32v5
+	if ((processor_id & 0xff0f0000) == 0x56050000) {
+		u32 feat;
+
+		/*
+		 * v5 CPUs with Tauros2 have the L2 cache enable bit
+		 * located in the CPU Extra Features register.
+		 */
+		feat = read_extra_features();
+		if (!(feat & 0x00400000)) {
+			printk(KERN_INFO "Tauros2: Enabling L2 cache.\n");
+			write_extra_features(feat | 0x00400000);
+		}
+
+		mode = "ARMv5";
+		outer_cache.inv_range = tauros2_inv_range;
+		outer_cache.clean_range = tauros2_clean_range;
+		outer_cache.flush_range = tauros2_flush_range;
+	}
+#endif
+
+#ifdef CONFIG_CPU_32v6
+	/*
+	 * Check whether this CPU lacks support for the v7 hierarchical
+	 * cache ops.  (PJ4 is in its v6 personality mode if the MMFR3
+	 * register indicates no support for the v7 hierarchical cache
+	 * ops.)
+	 */
+	if (cpuid_scheme() && (read_mmfr3() & 0xf) == 0) {
+		/*
+		 * When Tauros2 is used in an ARMv6 system, the L2
+		 * enable bit is in the ARMv6 ARM-mandated position
+		 * (bit [26] of the System Control Register).
+		 */
+		if (!(get_cr() & 0x04000000)) {
+			printk(KERN_INFO "Tauros2: Enabling L2 cache.\n");
+			adjust_cr(0x04000000, 0x04000000);
+		}
+
+		mode = "ARMv6";
+		outer_cache.inv_range = tauros2_inv_range;
+		outer_cache.clean_range = tauros2_clean_range;
+		outer_cache.flush_range = tauros2_flush_range;
+	}
+#endif
+
+#ifdef CONFIG_CPU_32v7
+	/*
+	 * Check whether this CPU has support for the v7 hierarchical
+	 * cache ops.  (PJ4 is in its v7 personality mode if the MMFR3
+	 * register indicates support for the v7 hierarchical cache
+	 * ops.)
+	 *
+	 * (Although strictly speaking there may exist CPUs that
+	 * implement the v7 cache ops but are only ARMv6 CPUs (due to
+	 * not complying with all of the other ARMv7 requirements),
+	 * there are no real-life examples of Tauros2 being used on
+	 * such CPUs as of yet.)
+	 */
+	if (cpuid_scheme() && (read_mmfr3() & 0xf) == 1) {
+		u32 actlr;
+
+		/*
+		 * When Tauros2 is used in an ARMv7 system, the L2
+		 * enable bit is located in the Auxiliary System Control
+		 * Register (which is the only register allowed by the
+		 * ARMv7 spec to contain fine-grained cache control bits).
+		 */
+		actlr = read_actlr();
+		if (!(actlr & 0x00000002)) {
+			printk(KERN_INFO "Tauros2: Enabling L2 cache.\n");
+			write_actlr(actlr | 0x00000002);
+		}
+
+		mode = "ARMv7";
+	}
+#ifdef CONFIG_DOVE_DEBUGGER_MODE_V6
+        if (cpuid_scheme() && (read_mmfr3() & 0xf) == 0) {
+                if (!(get_cr() & 0x04000000)) {
+                        printk(KERN_INFO "Tauros2: Enabling L2 cache.\n");
+                        adjust_cr(0x04000000, 0x04000000);
+                }
+
+                mode = "ARMv7";
+                outer_cache.inv_range = tauros2_inv_range;
+                outer_cache.clean_range = tauros2_clean_range;
+                outer_cache.flush_range = tauros2_flush_range;
+        }
+#endif
+
+#endif
+
+	if (mode == NULL) {
+		printk(KERN_CRIT "Tauros2: Unable to detect CPU mode.\n");
+		return;
+	}
+
+	printk(KERN_INFO "Tauros2: L2 cache support initialised "
+			 "in %s mode.\n", mode);
+
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/mm/proc-v7.S
+++ linux-mvl-dove-2.6.32/arch/arm/mm/proc-v7.S
@@ -30,6 +30,7 @@
 #define TTB_IRGN_WT	((1 << 0) | (0 << 6))
 #define TTB_IRGN_WB	((1 << 0) | (1 << 6))
 
+
 #ifndef CONFIG_SMP
 /* PTWs cacheable, inner WB not shareable, outer WB not shareable */
 #define TTB_FLAGS	TTB_IRGN_WB|TTB_RGN_OC_WB
@@ -40,12 +41,28 @@
 #define PMD_FLAGS	PMD_SECT_WBWA|PMD_SECT_S
 #endif
 
+#ifdef CONFIG_CPU_PJ4
+#define CPU_V7_CR_TRE_REMAP_ENABLE
+#endif
+
 ENTRY(cpu_v7_proc_init)
 	mov	pc, lr
 ENDPROC(cpu_v7_proc_init)
 
 ENTRY(cpu_v7_proc_fin)
-	mov	pc, lr
+	stmfd	sp!, {lr}
+	cpsid	if				@ disable interrupts
+	bl	v7_flush_kern_cache_all
+	mrc	p15, 0, r0, c1, c0, 0		@ ctrl register
+	bic	r0, r0, #0x1000			@ ...i............
+	bic	r0, r0, #0x0006			@ .............ca.
+	mcr	p15, 0, r0, c1, c0, 0		@ disable caches
+#ifdef CONFIG_CPU_PJ4
+	mrc	p15, 0, r0, c1, c0, 1
+	bic	r0, r0, #0x2
+	mcr	p15, 0, r0, c1, c0, 1		@ disable L2 cache
+#endif
+	ldmfd	sp!, {pc}
 ENDPROC(cpu_v7_proc_fin)
 
 /*
@@ -56,8 +73,6 @@
  *	to what would be the reset vector.
  *
  *	- loc   - location to jump to for soft reset
- *
- *	It is assumed that:
  */
 	.align	5
 ENTRY(cpu_v7_reset)
@@ -72,8 +87,21 @@
  *	IRQs are already disabled.
  */
 ENTRY(cpu_v7_do_idle)
+
 	dsb					@ WFI may enter a low-power mode
+#ifdef CONFIG_DOVE_DEBUGGER_MODE_V6
+	mov	r1, #0
+	mcr	p15, 0, r1, c7, c0, 4		@ wait for interrupt
+#else
 	wfi
+#endif
+#ifdef CONFIG_DOVE_REV_Y0
+	mrc	p15, 0, r0, c0, c0, 0		@ Main ID
+	and	r0, #0xF
+	cmp	r0, #1				@ issue the following instructions for Y0 only
+	mcreq   p15, 0, r1, c7, c5, 4           @ Prefetch Flush - ISB
+	mcreq	p15, 0, r1, c7, c10, 4		@ Sync Data barrier
+#endif
 	mov	pc, lr
 ENDPROC(cpu_v7_do_idle)
 
@@ -81,6 +109,9 @@
 #ifndef TLB_CAN_READ_FROM_L1_CACHE
 	dcache_line_size r2, r3
 1:	mcr	p15, 0, r0, c7, c10, 1		@ clean D entry
+#ifndef CONFIG_MRV_PTE_IN_L2
+	mcr     p15, 1, r0, c7, c11, 1		@ clean L2C D entry
+#endif
 	add	r0, r0, r2
 	subs	r1, r1, r2
 	bhi	1b
@@ -103,10 +134,15 @@
 #ifdef CONFIG_MMU
 	mov	r2, #0
 	ldr	r1, [r1, #MM_CONTEXT_ID]	@ get mm->context.id
+#ifdef CONFIG_MRV_PTE_IN_L2 
 	orr	r0, r0, #TTB_FLAGS
+#else
+	bic     r0, r0, #0x18                   @ DONOT Cache the page table in L2
+#endif
 #ifdef CONFIG_ARM_ERRATA_430973
 	mcr	p15, 0, r2, c7, c5, 6		@ flush BTAC/BTB
 #endif
+	isb
 	mcr	p15, 0, r2, c13, c0, 1		@ set reserved context ID
 	isb
 1:	mcr	p15, 0, r0, c2, c0, 0		@ set TTB 0
@@ -127,7 +163,9 @@
  *	- pte   - PTE value to store
  *	- ext	- value for extended PTE bits
  */
+	armv6_mt_table cpu_v7
 ENTRY(cpu_v7_set_pte_ext)
+#ifdef CPU_V7_CR_TRE_REMAP_ENABLE
 #ifdef CONFIG_MMU
  ARM(	str	r1, [r0], #-2048	)	@ linux version
  THUMB(	str	r1, [r0]		)	@ linux version
@@ -156,17 +194,35 @@
 	tst	r1, #L_PTE_YOUNG
 	tstne	r1, #L_PTE_PRESENT
 	moveq	r3, #0
-
 	str	r3, [r0]
 	mcr	p15, 0, r0, c7, c10, 1		@ flush_pte
+#ifndef CONFIG_MRV_PTE_IN_L2
+        mcr     p15, 1, r0, c7, c11, 1 @ clean L2C D entry
 #endif
+#endif
+#else /* CPU_V7_CR_TRE_REMAP_ENABLE */
+	/* Use TRE=0 (remap is off) scheme for full featured MMU */
+	armv6_set_pte_ext cpu_v7 
+#endif /* CPU_V7_CR_TRE_REMAP_ENABLE */
 	mov	pc, lr
+
 ENDPROC(cpu_v7_set_pte_ext)
 
 cpu_v7_name:
 	.ascii	"ARMv7 Processor"
 	.align
 
+cpu_pj4_name:
+	.ascii	"Marvell PJ4 v7 Processor"
+#ifdef CONFIG_IWMMXT
+	.ascii	"-wmmx"
+#endif
+#ifdef CONFIG_CPU_ENABLE_WRITECO
+	.ascii	"-wco"
+#endif 
+	.ascii  "\0"
+	.align
+
 	__INIT
 
 /*
@@ -185,12 +241,28 @@
  *	- cache type register is implemented
  */
 __v7_setup:
+#ifdef CONFIG_DOVE_REV_Y0
+	mrc p15, 1, r0, c15, c1, 0
+        mrc     p15, 0, r10, c0, c0, 0          @ Main ID Y0 or not
+        and     r10, #0xF
+        cmp     r10, #5
+	orr  	r0, r0, #(1<<15)		@ Disable VFP/WMMX dual issue
+        cmp     r10, #1
+	orrle   r0, r0, #(1<<21)		@ X0 - Enable L2 Cache Way 7-4 
+	mcr p15, 1, r0, c15, c1, 0
+#endif
 #ifdef CONFIG_SMP
 	mrc	p15, 0, r0, c1, c0, 1
 	tst	r0, #(1 << 6)			@ SMP/nAMP mode enabled?
 	orreq	r0, r0, #(1 << 6) | (1 << 0)	@ Enable SMP/nAMP mode and
 	mcreq	p15, 0, r0, c1, c0, 1		@ TLB ops broadcasting
 #endif
+#ifdef CONFIG_CPU_PJ4_PMC_ACCESS_IN_USERMODE
+	@ Enable performance counters user access
+	mrc     p15, 0, r0, c9, c14, 0
+	orr     r0, r0, #0x1
+	mcr     p15, 0, r0, c9, c14, 0
+#endif /* CONFIG_CPU_PJ4_PMC_ACCESS_IN_USERMODE */
 	adr	r12, __v7_setup_stack		@ the local stack
 	stmia	r12, {r0-r5, r7, r9, r11, lr}
 	bl	v7_flush_dcache_all
@@ -227,13 +299,43 @@
 
 2:	mov	r10, #0
 #ifdef HARVARD_CACHE
+	#ifdef CONFIG_CPU_PJ4_ERRATA_4574_4731
+	mcr	p15, 0, r10, c7, c5, 0		@ I+BTB cache invalidate
+	#endif
 	mcr	p15, 0, r10, c7, c5, 0		@ I+BTB cache invalidate
 #endif
 	dsb
 #ifdef CONFIG_MMU
 	mcr	p15, 0, r10, c8, c7, 0		@ invalidate I + D TLBs
 	mcr	p15, 0, r10, c2, c0, 2		@ TTB control register
+	dsb
+	isb
+#ifdef CONFIG_MRV_PTE_IN_L2
 	orr	r4, r4, #TTB_FLAGS
+#else
+						@ OC bits in TTB1 register
+	bic	r4, r4, #0x18                   @ DONOT Cache the page table in L2
+#endif
+#ifdef CONFIG_CPU_ENABLE_WRITECO
+						@ Refer 88SV581x-v7.Rev1.5.pdf
+	mrc	p15, 1, r0, c15, c1, 0		@ Read Marvell Extra Features Reg
+	orr	r0, r0, #0x100
+        mrc     p15, 0, r10, c0, c0, 0          @ Main ID Y0 or not
+        and     r10, #0xF
+        cmp     r10, #1
+						@ Write coalesce cycles
+						@ Only for not X0
+	orreq	r0, r0, #CONFIG_CPU_WRITECO_CYCLE << 9	@ Y0
+	mcr	p15, 1, r0, c15, c1, 0		@ Write Marvell Extra Features Reg
+	mrcne   p15, 1, r0, c15, c2, 0          @ Auxiliary Function Reg
+	bicne	r0, #0x3 << 4
+	orrne	r0, r0, #CONFIG_CPU_WRITECO_CYCLE << 4	@ X0
+	mcrne   p15, 1, r0, c15, c2, 0          @ Write Marvell Auxiliary Function Reg
+#else
+	mrc     p15, 1, r0, c15, c1, 0          @ Read Marvell Extra Features Reg
+	bic 	r0, r0, #0x100
+	mcr     p15, 1, r0, c15, c1, 0          @ Write Marvell Extra Features Reg
+#endif
 	mcr	p15, 0, r4, c2, c0, 1		@ load TTB1
 	mov	r10, #0x1f			@ domains 0, 1 = manager
 	mcr	p15, 0, r10, c3, c0, 0		@ load domain access register
@@ -267,6 +369,20 @@
 	 */
 	ldr	r5, =0xff0a81a8			@ PRRR
 	ldr	r6, =0x40e040e0			@ NMRR
+#ifdef CONFIG_CPU_ENABLE_WRITECO
+						@ FIXME: Work around for WCO
+						@ not working when TRE=1
+						@ Set write-through, noWA instead
+						@ Impact: D$ performance
+
+	mrc	p15, 0, r0, c0, c0, 0		@ Main ID
+	and	r0, #0xF
+	cmp	r0, #1
+	ldreq	r6, =0x40e840e8
+#endif
+#ifdef	CONFIG_CPU_L2WAONLY_ENABLE
+	bic	r6, r6, #0x800000
+#endif
 	mcr	p15, 0, r5, c10, c2, 0		@ write PRRR
 	mcr	p15, 0, r6, c10, c2, 1		@ write NMRR
 #endif
@@ -290,7 +406,11 @@
 	 */
 	.type	v7_crval, #object
 v7_crval:
+#ifdef CPU_V7_CR_TRE_REMAP_ENABLE
 	crval	clear=0x0120c302, mmuset=0x10c03c7d, ucset=0x00c01c7c
+#else
+	crval	clear=0x0120c302, mmuset=0x00c03c7d, ucset=0x00c01c7c
+#endif
 
 __v7_setup_stack:
 	.space	4 * 11				@ 11 registers
@@ -322,6 +442,33 @@
 	.section ".proc.info.init", #alloc, #execinstr
 
 	/*
+	 * Match Marvell PJ4 v7 processor core.
+	 */
+	.type	__pj4_v7_proc_info, #object
+__pj4_v7_proc_info:
+	.long	0x560f5810		@ Marvell PJ4 ID
+	.long	0xff0ffff0		@ Mask for ID
+	.long   PMD_TYPE_SECT | \
+		PMD_SECT_AP_WRITE | \
+		PMD_SECT_AP_READ | \
+		PMD_FLAGS
+	.long   PMD_TYPE_SECT | \
+		PMD_SECT_XN | \
+		PMD_SECT_AP_WRITE | \
+		PMD_SECT_AP_READ
+	b	__v7_setup
+	.long	cpu_arch_name
+	.long	cpu_elf_name
+	.long	HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP
+	.long	cpu_pj4_name
+	.long	v7_processor_functions
+	.long	v7wbi_tlb_fns
+	.long	v6_user_fns
+	.long	v7_cache_fns
+	.size	__pj4_v7_proc_info, . - __pj4_v7_proc_info
+
+	
+	/*
 	 * Match any ARMv7 processor core.
 	 */
 	.type	__v7_proc_info, #object
--- linux-mvl-dove-2.6.32.orig/arch/arm/mm/alignment.c
+++ linux-mvl-dove-2.6.32/arch/arm/mm/alignment.c
@@ -533,6 +533,64 @@
 	return TYPE_ERROR;
 }
 
+#ifdef CONFIG_MRVL_ERRATA_THUMB_VLDR
+#define vmov_single(reg, val) \
+	__asm__(					\
+	"	.fpu	vfp\n"				\
+	"	vmov	s"#reg", %0\n"			\
+	: : "r" (val))
+
+#define case_reg(reg, val) \
+	case ((reg)):					\
+		vmov_single(reg, (val));		\
+		break
+
+static int
+do_alignment_thumb_vldr(unsigned long addr, unsigned long instr, struct pt_regs *regs)
+{
+	unsigned int double_op = (instr >> 8) & 1;
+	unsigned int vd = (instr >> 12) & 15;
+	unsigned int d = (instr >> 22) & 1;
+	unsigned int reg, val;
+	unsigned int fault;
+	int i;
+
+	/* Align the address to word */
+	addr &= ~3;
+
+	if (double_op) {
+		reg = (d << 4) | vd;
+		reg = reg << 1;
+	} else
+		reg = (vd << 1) | d;
+
+	for (i = 0; i <= double_op; i++) {
+		fault = __get_user(val, (u32 *)addr);
+		if (fault)
+			goto fault;
+		switch (reg) {
+			case_reg(0, val); case_reg(1, val); case_reg(2, val); case_reg(3, val);
+			case_reg(4, val); case_reg(5, val); case_reg(6, val); case_reg(7, val);
+			case_reg(8, val); case_reg(9, val); case_reg(10, val); case_reg(11, val);
+			case_reg(12, val); case_reg(13, val); case_reg(14, val); case_reg(15, val);
+			case_reg(16, val); case_reg(17, val); case_reg(18, val); case_reg(19, val);
+			case_reg(20, val); case_reg(21, val); case_reg(22, val); case_reg(23, val);
+			case_reg(24, val); case_reg(25, val); case_reg(26, val); case_reg(27, val);
+			case_reg(28, val); case_reg(29, val); case_reg(30, val); case_reg(31, val);
+		}
+		addr += 4;
+		reg += 1;
+	}
+
+	return TYPE_DONE;
+
+ fault:
+	return TYPE_FAULT;
+}
+#undef vmov_single
+#undef case_reg
+#endif /* CONFIG_MRVL_ERRATA_THUMB_VLDR */
+
 /*
  * Convert Thumb ld/st instruction forms to equivalent ARM instructions so
  * we can reuse ARM userland alignment fault fixups for Thumb.
@@ -746,6 +804,24 @@
 		fault = __get_user(instr, (u32 *)instrptr);
 	set_fs(fs);
 
+#ifdef CONFIG_MRVL_ERRATA_THUMB_VLDR
+	{
+		int id;
+		asm volatile("mrc p15, 0, %0, c0, c0, 0":"=r" (id));
+		if ((id & 0xf) >= 5) //This errata is not needed for revision >= 5
+			goto errata_end;
+	}
+
+	if (!fault && thumb_mode(regs) && ((instr & 0xff3f0e00) == 0xed1f0a00)) {
+		fault = do_alignment_thumb_vldr(addr, instr, regs);
+		if (fault == TYPE_DONE) {
+			regs->ARM_pc += isize;
+			return 0;
+		}
+	}
+errata_end:
+#endif
+
 	if (fault) {
 		type = TYPE_FAULT;
 		goto bad_or_fault;
--- linux-mvl-dove-2.6.32.orig/arch/arm/mm/mmap.c
+++ linux-mvl-dove-2.6.32/arch/arm/mm/mmap.c
@@ -54,7 +54,8 @@
 	 * We enforce the MAP_FIXED case.
 	 */
 	if (flags & MAP_FIXED) {
-		if (aliasing && flags & MAP_SHARED && addr & (SHMLBA - 1))
+		if (aliasing && flags & MAP_SHARED &&
+		    (addr - (pgoff << PAGE_SHIFT)) & (SHMLBA - 1))
 			return -EINVAL;
 		return addr;
 	}
--- linux-mvl-dove-2.6.32.orig/arch/arm/mm/copypage-xsc3.c
+++ linux-mvl-dove-2.6.32/arch/arm/mm/copypage-xsc3.c
@@ -34,7 +34,7 @@
 {
 	asm("\
 	stmfd	sp!, {r4, r5, lr}		\n\
-	mov	lr, %0				\n\
+	mov	lr, %2				\n\
 						\n\
 	pld	[r1, #0]			\n\
 	pld	[r1, #32]			\n\
@@ -67,7 +67,7 @@
 						\n\
 	ldmfd	sp!, {r4, r5, pc}"
 	:
-	: "I" (PAGE_SIZE / 64 - 1));
+	: "r" (kto), "r" (kfrom), "I" (PAGE_SIZE / 64 - 1));
 }
 
 void xsc3_mc_copy_user_highpage(struct page *to, struct page *from,
--- linux-mvl-dove-2.6.32.orig/arch/arm/kernel/atags.c
+++ linux-mvl-dove-2.6.32/arch/arm/kernel/atags.c
@@ -26,8 +26,11 @@
 
 	return count;
 }
-
+#if defined (CONFIG_PM) && defined (CONFIG_ARCH_DOVE)
+#define BOOT_PARAMS_SIZE (1536  + 2532)
+#else
 #define BOOT_PARAMS_SIZE 1536
+#endif
 static char __initdata atags_copy[BOOT_PARAMS_SIZE];
 
 void __init save_atags(const struct tag *tags)
@@ -51,7 +54,7 @@
 		return -EINVAL;
 	}
 
-	for (; tag->hdr.size; tag = tag_next(tag))
+	for (; atag_valid(tag); tag = tag_next(tag))
 		;
 
 	/* include the terminating ATAG_NONE */
--- linux-mvl-dove-2.6.32.orig/arch/arm/kernel/debug.S
+++ linux-mvl-dove-2.6.32/arch/arm/kernel/debug.S
@@ -49,6 +49,26 @@
 1002:
 		.endm
 
+#elif defined(CONFIG_CPU_V7)
+
+		.macro	addruart, rx
+		.endm
+
+		.macro	senduart, rd, rx
+		mcr	p14, 0, \rd, c0, c5, 0
+		.endm
+
+		.macro	busyuart, rd, rx
+busy:		mrc	p14, 0, pc, c0, c1, 0
+		bcs	busy
+		.endm
+
+		.macro	waituart, rd, rx
+wait:		mrc	p14, 0, pc, c0, c1, 0
+		bcs	wait
+
+		.endm
+
 #elif defined(CONFIG_CPU_XSCALE)
 
 		.macro	addruart, rx
--- linux-mvl-dove-2.6.32.orig/arch/arm/kernel/sys_arm.c
+++ linux-mvl-dove-2.6.32/arch/arm/kernel/sys_arm.c
@@ -28,41 +28,6 @@
 #include <linux/ipc.h>
 #include <linux/uaccess.h>
 
-extern unsigned long do_mremap(unsigned long addr, unsigned long old_len,
-			       unsigned long new_len, unsigned long flags,
-			       unsigned long new_addr);
-
-/* common code for old and new mmaps */
-inline long do_mmap2(
-	unsigned long addr, unsigned long len,
-	unsigned long prot, unsigned long flags,
-	unsigned long fd, unsigned long pgoff)
-{
-	int error = -EINVAL;
-	struct file * file = NULL;
-
-	flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-
-	if (flags & MAP_FIXED && addr < FIRST_USER_ADDRESS)
-		goto out;
-
-	error = -EBADF;
-	if (!(flags & MAP_ANONYMOUS)) {
-		file = fget(fd);
-		if (!file)
-			goto out;
-	}
-
-	down_write(&current->mm->mmap_sem);
-	error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
-	up_write(&current->mm->mmap_sem);
-
-	if (file)
-		fput(file);
-out:
-	return error;
-}
-
 struct mmap_arg_struct {
 	unsigned long addr;
 	unsigned long len;
@@ -84,29 +49,11 @@
 	if (a.offset & ~PAGE_MASK)
 		goto out;
 
-	error = do_mmap2(a.addr, a.len, a.prot, a.flags, a.fd, a.offset >> PAGE_SHIFT);
+	error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd, a.offset >> PAGE_SHIFT);
 out:
 	return error;
 }
 
-asmlinkage unsigned long
-sys_arm_mremap(unsigned long addr, unsigned long old_len,
-	       unsigned long new_len, unsigned long flags,
-	       unsigned long new_addr)
-{
-	unsigned long ret = -EINVAL;
-
-	if (flags & MREMAP_FIXED && new_addr < FIRST_USER_ADDRESS)
-		goto out;
-
-	down_write(&current->mm->mmap_sem);
-	ret = do_mremap(addr, old_len, new_len, flags, new_addr);
-	up_write(&current->mm->mmap_sem);
-
-out:
-	return ret;
-}
-
 /*
  * Perform the select(nd, in, out, ex, tv) and mmap() system
  * calls.
--- linux-mvl-dove-2.6.32.orig/arch/arm/kernel/calls.S
+++ linux-mvl-dove-2.6.32/arch/arm/kernel/calls.S
@@ -172,7 +172,7 @@
 /* 160 */	CALL(sys_sched_get_priority_min)
 		CALL(sys_sched_rr_get_interval)
 		CALL(sys_nanosleep)
-		CALL(sys_arm_mremap)
+		CALL(sys_mremap)
 		CALL(sys_setresuid16)
 /* 165 */	CALL(sys_getresuid16)
 		CALL(sys_ni_syscall)		/* vm86 */
--- linux-mvl-dove-2.6.32.orig/arch/arm/kernel/vmlinux.lds.S
+++ linux-mvl-dove-2.6.32/arch/arm/kernel/vmlinux.lds.S
@@ -167,12 +167,6 @@
 		__init_end = .;
 #endif
 
-		. = ALIGN(PAGE_SIZE);
-		__nosave_begin = .;
-		*(.data.nosave)
-		. = ALIGN(PAGE_SIZE);
-		__nosave_end = .;
-
 		/*
 		 * then the cacheline aligned data
 		 */
@@ -255,6 +249,11 @@
 		__tcm_end = .;
 	}
 #endif
+	. = ALIGN(PAGE_SIZE);
+	__nosave_begin = .;
+	.data.nosave : { *(.data.nosave) }
+	. = ALIGN(PAGE_SIZE);
+	__nosave_end = .;
 
 	.bss : {
 		__bss_start = .;	/* BSS				*/
--- linux-mvl-dove-2.6.32.orig/arch/arm/kernel/entry-common.S
+++ linux-mvl-dove-2.6.32/arch/arm/kernel/entry-common.S
@@ -382,11 +382,13 @@
 
 sys_sigreturn_wrapper:
 		add	r0, sp, #S_OFF
+		mov	why, #0		@ prevent syscall restart handling
 		b	sys_sigreturn
 ENDPROC(sys_sigreturn_wrapper)
 
 sys_rt_sigreturn_wrapper:
 		add	r0, sp, #S_OFF
+		mov	why, #0		@ prevent syscall restart handling
 		b	sys_rt_sigreturn
 ENDPROC(sys_rt_sigreturn_wrapper)
 
@@ -416,12 +418,12 @@
 		tst	r5, #PGOFF_MASK
 		moveq	r5, r5, lsr #PAGE_SHIFT - 12
 		streq	r5, [sp, #4]
-		beq	do_mmap2
+		beq	sys_mmap_pgoff
 		mov	r0, #-EINVAL
 		mov	pc, lr
 #else
 		str	r5, [sp, #4]
-		b	do_mmap2
+		b	sys_mmap_pgoff
 #endif
 ENDPROC(sys_mmap2)
 
--- linux-mvl-dove-2.6.32.orig/arch/arm/kernel/setup.c
+++ linux-mvl-dove-2.6.32/arch/arm/kernel/setup.c
@@ -102,6 +102,7 @@
 #endif
 #ifdef CONFIG_OUTER_CACHE
 struct outer_cache_fns outer_cache;
+EXPORT_SYMBOL(outer_cache);
 #endif
 
 struct stack {
@@ -556,7 +557,7 @@
  */
 static int __init parse_tag_core(const struct tag *tag)
 {
-	if (tag->hdr.size > 2) {
+	if ((atag_valid(tag) && (tag->hdr.size > 2))) {
 		if ((tag->u.core.flags & 1) == 0)
 			root_mountflags &= ~MS_RDONLY;
 		ROOT_DEV = old_decode_dev(tag->u.core.rootdev);
@@ -635,6 +636,45 @@
 
 __tagtable(ATAG_CMDLINE, parse_tag_cmdline);
 
+
+#if defined (CONFIG_PM) && defined (CONFIG_ARCH_DOVE)
+
+MV_DRAM_INIT 	mv_dram_init_info;
+u32		mv_dram_init_valid = 0;
+
+static int __init parse_tag_mv_dram(const struct tag *tag)
+{
+	int hdr = 0, cfg = 0;
+ 
+	printk(KERN_INFO "Marvell Dove DRAM parameters found (version = 0x%08X)\n", tag->u.mv_dram.version);
+
+	memcpy(&mv_dram_init_info, &(tag->u.mv_dram.mv_dram_init), sizeof(MV_DRAM_INIT));
+	mv_dram_init_valid = 1;
+
+#ifdef CONFIG_PM_DEBUG
+	/* for debug print the DDR parameters */
+	for (hdr = 0; hdr < MV_DRAM_HEADERS_CNT; hdr++) {
+		if (mv_dram_init_info.dram_init_ctrl[hdr].freq_mask == 0)
+			break;
+		printk(KERN_INFO "Configuration #%d: Frequency Mask = 0x%08X, Flags = 0x%08X, start index = %d, size = %d\n", 
+			hdr, mv_dram_init_info.dram_init_ctrl[hdr].freq_mask, mv_dram_init_info.dram_init_ctrl[hdr].flags, 
+			mv_dram_init_info.dram_init_ctrl[hdr].start_index, mv_dram_init_info.dram_init_ctrl[hdr].size);
+		for (cfg = mv_dram_init_info.dram_init_ctrl[hdr].start_index; 
+		     cfg < mv_dram_init_info.dram_init_ctrl[hdr].start_index + mv_dram_init_info.dram_init_ctrl[hdr].size; 
+		     cfg++) {
+				printk(KERN_INFO "cfg = %d, Reg = 0x%08X, Value = 0x%08X\n", cfg, 
+					mv_dram_init_info.reg_init[cfg].reg_addr, mv_dram_init_info.reg_init[cfg].reg_value);
+		}
+	}
+#endif
+	return 0;
+}
+
+__tagtable(ATAG_MV_DRAM_PARAMS, parse_tag_mv_dram);
+
+#endif
+
+
 /*
  * Scan the tag table for this tag, and call its parse function.
  * The tag table is built by the linker from all the __tagtable
@@ -660,7 +700,7 @@
  */
 static void __init parse_tags(const struct tag *t)
 {
-	for (; t->hdr.size; t = tag_next(t))
+	for (; atag_valid(t); t = tag_next(t))
 		if (!parse_tag(t))
 			printk(KERN_WARNING
 				"Ignoring unrecognised tag 0x%08x\n",
--- linux-mvl-dove-2.6.32.orig/arch/arm/kernel/signal.c
+++ linux-mvl-dove-2.6.32/arch/arm/kernel/signal.c
@@ -18,6 +18,7 @@
 #include <asm/cacheflush.h>
 #include <asm/ucontext.h>
 #include <asm/unistd.h>
+#include <asm/vfp.h>
 
 #include "ptrace.h"
 #include "signal.h"
@@ -175,6 +176,88 @@
 
 #endif
 
+#ifdef CONFIG_VFP
+
+static int preserve_vfp_context(struct vfp_sigframe __user *frame)
+{
+	struct thread_info *thread = current_thread_info();
+	struct vfp_hard_struct *h = &thread->vfpstate.hard;
+	const unsigned long magic = VFP_MAGIC;
+	const unsigned long size = VFP_STORAGE_SIZE;
+	int err = 0;
+
+	vfp_sync_state(thread);
+	__put_user_error(magic, &frame->magic, err);
+	__put_user_error(size, &frame->size, err);
+
+	/*
+	 * Copy the floating point registers. There can be unused
+	 * registers see asm/hwcap.h for details.
+	 */
+	err |= __copy_to_user(&frame->ufp.fpregs, &h->fpregs,
+			      sizeof(h->fpregs));
+	/*
+	 * Copy the status and control register.
+	 */
+	__put_user_error(h->fpscr, &frame->ufp.fpscr, err);
+
+	/*
+	 * Copy the exception registers.
+	 */
+	__put_user_error(h->fpexc, &frame->ufp.fpexc, err);
+	__put_user_error(h->fpinst, &frame->ufp.fpinst, err);
+	__put_user_error(h->fpinst2, &frame->ufp.fpinst2, err);
+
+	return err ? -EFAULT : 0;
+}
+
+static int restore_vfp_context(struct vfp_sigframe __user *frame)
+{
+	struct thread_info *thread = current_thread_info();
+	struct vfp_hard_struct *h = &thread->vfpstate.hard;
+	unsigned long magic;
+	unsigned long size;
+	unsigned long fpexc;
+	int err = 0;
+
+	vfp_sync_state(thread);
+	__get_user_error(magic, &frame->magic, err);
+	__get_user_error(size, &frame->size, err);
+
+	if (err)
+		return -EFAULT;
+	if (magic != VFP_MAGIC || size != VFP_STORAGE_SIZE)
+		return -EINVAL;
+
+	/*
+	 * Copy the floating point registers. There can be unused
+	 * registers see asm/hwcap.h for details.
+	 */
+	err |= __copy_from_user(&h->fpregs, &frame->ufp.fpregs,
+				sizeof(h->fpregs));
+	/*
+	 * Copy the status and control register.
+	 */
+	__get_user_error(h->fpscr, &frame->ufp.fpscr, err);
+
+	/*
+	 * Sanitise and restore the exception registers.
+	 */
+	__get_user_error(fpexc, &frame->ufp.fpexc, err);
+	/* Ensure the VFP is enabled. */
+	fpexc |= FPEXC_EN;
+	/* Ensure FPINST2 is invalid and the exception flag is cleared. */
+	fpexc &= ~(FPEXC_EX | FPEXC_FP2V);
+	h->fpexc = fpexc;
+
+	__get_user_error(h->fpinst, &frame->ufp.fpinst, err);
+	__get_user_error(h->fpinst2, &frame->ufp.fpinst2, err);
+
+	return err ? -EFAULT : 0;
+}
+
+#endif
+
 /*
  * Do a signal return; undo the signal stack.  These are aligned to 64-bit.
  */
@@ -233,8 +316,8 @@
 		err |= restore_iwmmxt_context(&aux->iwmmxt);
 #endif
 #ifdef CONFIG_VFP
-//	if (err == 0)
-//		err |= vfp_restore_state(&sf->aux.vfp);
+	if (err == 0)
+		err |= restore_vfp_context(&aux->vfp);
 #endif
 
 	return err;
@@ -348,8 +431,8 @@
 		err |= preserve_iwmmxt_context(&aux->iwmmxt);
 #endif
 #ifdef CONFIG_VFP
-//	if (err == 0)
-//		err |= vfp_save_state(&sf->aux.vfp);
+	if (err == 0)
+		err |= preserve_vfp_context(&aux->vfp);
 #endif
 	__put_user_error(0, &aux->end_magic, err);
 
@@ -389,7 +472,9 @@
 	unsigned long handler = (unsigned long)ka->sa.sa_handler;
 	unsigned long retcode;
 	int thumb = 0;
-	unsigned long cpsr = regs->ARM_cpsr & ~PSR_f;
+	unsigned long cpsr = regs->ARM_cpsr & ~(PSR_f | PSR_E_BIT);
+
+	cpsr |= PSR_ENDSTATE;
 
 	/*
 	 * Maybe we need to deliver a 32-bit signal to a 26-bit task.
@@ -517,6 +602,14 @@
 
 static inline void setup_syscall_restart(struct pt_regs *regs)
 {
+	if (regs->ARM_ORIG_r0 == -ERESTARTNOHAND ||
+	    regs->ARM_ORIG_r0 == -ERESTARTSYS ||
+	    regs->ARM_ORIG_r0 == -ERESTARTNOINTR ||
+	    regs->ARM_ORIG_r0 == -ERESTART_RESTARTBLOCK) {
+		/* the syscall cannot be safely restarted, return -EINTR instead */
+		regs->ARM_r0 = -EINTR;
+		return;
+	}
 	regs->ARM_r0 = regs->ARM_ORIG_r0;
 	regs->ARM_pc -= thumb_mode(regs) ? 2 : 4;
 }
@@ -649,6 +742,7 @@
 	 */
 	if (syscall) {
 		if (regs->ARM_r0 == -ERESTART_RESTARTBLOCK) {
+			regs->ARM_r0 = -EAGAIN; /* prevent multiple restarts */
 			if (thumb_mode(regs)) {
 				regs->ARM_r7 = __NR_restart_syscall - __NR_SYSCALL_BASE;
 				regs->ARM_pc -= 2;
--- linux-mvl-dove-2.6.32.orig/arch/arm/kernel/head.S
+++ linux-mvl-dove-2.6.32/arch/arm/kernel/head.S
@@ -194,6 +194,23 @@
  */
 	.align	5
 __turn_mmu_on:
+#ifdef CONFIG_DOVE_REV_Y0
+	mrc	p15, 0, r3, c0, c0, 0		@ Main ID
+	and	r3, #0xF
+	cmp	r3, #5
+	blt	2f
+	cmp	r3, #1
+	mrc     p15, 1, r3, c15, c1, 1
+	bic     r3, r3, #1                      @ Turn off return stack
+	mcr     p15, 1, r3, c15, c1, 1		@ for Dove X0 and A0
+	b	1f
+2:
+	mrc     p15, 0, r3, c1, c0, 1
+	bic	r3, r3, #1			@ Turn off return stack
+						@ 3383
+	mcr	p15, 0, r3, c1, c0, 1
+1:	
+#endif
 	mov	r0, r0
 	mcr	p15, 0, r0, c1, c0, 0		@ write control reg
 	mrc	p15, 0, r3, c0, c0, 0		@ read id reg
--- linux-mvl-dove-2.6.32.orig/arch/arm/kernel/sys_oabi-compat.c
+++ linux-mvl-dove-2.6.32/arch/arm/kernel/sys_oabi-compat.c
@@ -311,7 +311,7 @@
 	long err;
 	int i;
 
-	if (nsops < 1)
+	if (nsops < 1 || nsops > SEMOPM)
 		return -EINVAL;
 	sops = kmalloc(sizeof(*sops) * nsops, GFP_KERNEL);
 	if (!sops)
--- linux-mvl-dove-2.6.32.orig/arch/arm/kernel/kprobes-decode.c
+++ linux-mvl-dove-2.6.32/arch/arm/kernel/kprobes-decode.c
@@ -583,13 +583,14 @@
 {
 	insn_llret_3arg_fn_t *i_fn = (insn_llret_3arg_fn_t *)&p->ainsn.insn[0];
 	kprobe_opcode_t insn = p->opcode;
+	long ppc = (long)p->addr + 8;
 	union reg_pair fnr;
 	int rd = (insn >> 12) & 0xf;
 	int rn = (insn >> 16) & 0xf;
 	int rm = insn & 0xf;
 	long rdv;
-	long rnv  = regs->uregs[rn];
-	long rmv  = regs->uregs[rm]; /* rm/rmv may be invalid, don't care. */
+	long rnv = (rn == 15) ? ppc : regs->uregs[rn];
+	long rmv = (rm == 15) ? ppc : regs->uregs[rm];
 	long cpsr = regs->ARM_cpsr;
 
 	fnr.dr = insnslot_llret_3arg_rflags(rnv, 0, rmv, cpsr, i_fn);
--- linux-mvl-dove-2.6.32.orig/arch/arm/kernel/asm-offsets.c
+++ linux-mvl-dove-2.6.32/arch/arm/kernel/asm-offsets.c
@@ -12,6 +12,7 @@
  */
 #include <linux/sched.h>
 #include <linux/mm.h>
+#include <linux/suspend.h>
 #include <asm/mach/arch.h>
 #include <asm/thread_info.h>
 #include <asm/memory.h>
@@ -112,5 +113,8 @@
 #ifdef MULTI_PABORT
   DEFINE(PROCESSOR_PABT_FUNC,	offsetof(struct processor, _prefetch_abort));
 #endif
+  DEFINE(PBE_ADDRESS, 		offsetof(struct pbe, address));
+  DEFINE(PBE_ORIG_ADDRESS, offsetof(struct pbe, orig_address));
+  DEFINE(PBE_NEXT, offsetof(struct pbe, next));
   return 0; 
 }
--- linux-mvl-dove-2.6.32.orig/arch/arm/kernel/iwmmxt.S
+++ linux-mvl-dove-2.6.32/arch/arm/kernel/iwmmxt.S
@@ -58,11 +58,19 @@
 
 ENTRY(iwmmxt_task_enable)
 
+#if defined(CONFIG_CPU_PJ4)
+    mrc     p15, 0, r2, c1, c0, 2
+    tst     r2, #0xf                        @ CP0 and CP1 accessible?
+    movne   pc, lr                          @ if so no business here
+    orr     r2, r2, #0xf                    @ enable access to CP0 and CP1
+    mcr     p15, 0, r2, c1, c0, 2
+#else
 	mrc	p15, 0, r2, c15, c1, 0
 	tst	r2, #0x3			@ CP0 and CP1 accessible?
 	movne	pc, lr				@ if so no business here
 	orr	r2, r2, #0x3			@ enable access to CP0 and CP1
 	mcr	p15, 0, r2, c15, c1, 0
+#endif
 
 	ldr	r3, =concan_owner
 	add	r0, r10, #TI_IWMMXT_STATE	@ get task Concan save area
@@ -179,17 +187,28 @@
 	teqne	r1, r2				@ or specified one?
 	bne	1f				@ no: quit
 
+#if defined(CONFIG_CPU_PJ4)
+	mrc	p15, 0, r4, c1, c0, 2
+	orr	r4, r4, #0xf			@ enable access to CP0 and CP1
+	mcr	p15, 0, r4, c1, c0, 2
+#else
 	mrc	p15, 0, r4, c15, c1, 0
 	orr	r4, r4, #0x3			@ enable access to CP0 and CP1
 	mcr	p15, 0, r4, c15, c1, 0
+#endif
 	mov	r0, #0				@ nothing to load
 	str	r0, [r3]			@ no more current owner
 	mrc	p15, 0, r2, c2, c0, 0
 	mov	r2, r2				@ cpwait
 	bl	concan_save
 
+#if defined(CONFIG_CPU_PJ4)
+	bic	r4, r4, #0xf			@ disable access to CP0 and CP1
+	mcr	p15, 0, r4, c1, c0, 2
+#else
 	bic	r4, r4, #0x3			@ disable access to CP0 and CP1
 	mcr	p15, 0, r4, c15, c1, 0
+#endif
 	mrc	p15, 0, r2, c2, c0, 0
 	mov	r2, r2				@ cpwait
 
@@ -277,8 +296,13 @@
  */
 ENTRY(iwmmxt_task_switch)
 
+#if defined(CONFIG_CPU_PJ4)
+	mrc	p15, 0, r1, c1, c0, 2
+	tst	r1, #0xf			@ CP0 and CP1 accessible?
+#else
 	mrc	p15, 0, r1, c15, c1, 0
 	tst	r1, #0x3			@ CP0 and CP1 accessible?
+#endif
 	bne	1f				@ yes: block them for next task
 
 	ldr	r2, =concan_owner
@@ -287,8 +311,13 @@
 	teq	r2, r3				@ next task owns it?
 	movne	pc, lr				@ no: leave Concan disabled
 
+#if defined(CONFIG_CPU_PJ4)
+1:	eor	r1, r1, #0xf			@ flip Concan access
+	mcr	p15, 0, r1, c1, c0, 2
+#else
 1:	eor	r1, r1, #3			@ flip Concan access
 	mcr	p15, 0, r1, c15, c1, 0
+#endif
 
 	mrc	p15, 0, r1, c2, c0, 0
 	sub	pc, lr, r1, lsr #32		@ cpwait and return
--- linux-mvl-dove-2.6.32.orig/arch/arm/kernel/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/kernel/Makefile
@@ -43,6 +43,7 @@
 obj-$(CONFIG_CPU_XSCALE)	+= xscale-cp0.o
 obj-$(CONFIG_CPU_XSC3)		+= xscale-cp0.o
 obj-$(CONFIG_CPU_MOHAWK)	+= xscale-cp0.o
+obj-$(CONFIG_CPU_PJ4)		+= xscale-cp0.o
 obj-$(CONFIG_IWMMXT)		+= iwmmxt.o
 AFLAGS_iwmmxt.o			:= -Wa,-mcpu=iwmmxt
 
--- linux-mvl-dove-2.6.32.orig/arch/arm/kernel/compat.c
+++ linux-mvl-dove-2.6.32/arch/arm/kernel/compat.c
@@ -220,7 +220,7 @@
 
 void __init squash_mem_tags(struct tag *tag)
 {
-	for (; tag->hdr.size; tag = tag_next(tag))
+	for (; atag_valid(tag); tag = tag_next(tag))
 		if (tag->hdr.tag == ATAG_MEM)
 			tag->hdr.tag = ATAG_NONE;
 }
--- linux-mvl-dove-2.6.32.orig/arch/arm/kernel/process.c
+++ linux-mvl-dove-2.6.32/arch/arm/kernel/process.c
@@ -120,6 +120,9 @@
 void (*arm_pm_restart)(char str, const char *cmd) = arm_machine_restart;
 EXPORT_SYMBOL_GPL(arm_pm_restart);
 
+void (*arm_shut_down)(void);
+EXPORT_SYMBOL(arm_shut_down);
+
 
 /*
  * This is our default idle handler.  We need to disable
@@ -192,6 +195,8 @@
 
 void machine_halt(void)
 {
+	if (arm_shut_down)
+		arm_shut_down();
 }
 
 
--- linux-mvl-dove-2.6.32.orig/arch/arm/kernel/xscale-cp0.c
+++ linux-mvl-dove-2.6.32/arch/arm/kernel/xscale-cp0.c
@@ -93,7 +93,11 @@
 	u32 value;
 
 	__asm__ __volatile__ (
+#if defined(CONFIG_CPU_PJ4)	
+        "mrc	p15, 0, %0, c1, c0, 2\n\t"
+#else
 		"mrc	p15, 0, %0, c15, c1, 0\n\t"
+#endif		
 		: "=r" (value));
 
 	return value;
@@ -104,8 +108,13 @@
 	u32 temp;
 
 	__asm__ __volatile__ (
+#if defined(CONFIG_CPU_PJ4)	
+        "mcr	p15, 0, %1, c1, c0, 2\n\t"
+		"mrc	p15, 0, %0, c1, c0, 2\n\t"
+#else	
 		"mcr	p15, 0, %1, c15, c1, 0\n\t"
 		"mrc	p15, 0, %0, c15, c1, 0\n\t"
+#endif		
 		"mov	%0, %0\n\t"
 		"sub	pc, pc, #4\n\t"
 		: "=r" (temp) : "r" (value));
@@ -122,6 +131,13 @@
 	u32 lo;
 	u32 hi;
 
+#if defined(CONFIG_CPU_PJ4)
+#ifdef CONFIG_IWMMXT
+    return 1;
+#else
+    return 0;
+#endif    
+#endif
 	/*
 	 * This sequence is interpreted by the DSP coprocessor as:
 	 *	mar	acc0, %2, %3
@@ -153,8 +169,13 @@
 {
 	u32 cp_access;
 
+#if defined(CONFIG_CPU_PJ4)
+	cp_access = xscale_cp_access_read() & ~0xf;
+	xscale_cp_access_write(cp_access | 0x3);
+#else
 	cp_access = xscale_cp_access_read() & ~3;
 	xscale_cp_access_write(cp_access | 1);
+#endif
 
 	if (cpu_has_iwmmxt()) {
 #ifndef CONFIG_IWMMXT
@@ -165,12 +186,14 @@
 		elf_hwcap |= HWCAP_IWMMXT;
 		thread_register_notifier(&iwmmxt_notifier_block);
 #endif
-	} else {
+	} 
+#if defined(CONFIG_CPU_XSCALE) || defined(CONFIG_CPU_XSC3)	
+	else {
 		printk(KERN_INFO "XScale DSP coprocessor detected.\n");
 		thread_register_notifier(&dsp_notifier_block);
 		cp_access |= 1;
 	}
-
+#endif
 	xscale_cp_access_write(cp_access);
 
 	return 0;
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-versatile/Kconfig
+++ linux-mvl-dove-2.6.32/arch/arm/mach-versatile/Kconfig
@@ -3,14 +3,14 @@
 
 config ARCH_VERSATILE_PB
 	bool "Support Versatile/PB platform"
-	select CPU_ARM926T
+	select CPU_V7
 	default y
 	help
 	  Include support for the ARM(R) Versatile/PB platform.
 
 config MACH_VERSATILE_AB
 	bool "Support Versatile/AB platform"
-	select CPU_ARM926T
+	select CPU_V7
 	help
 	  Include support for the ARM(R) Versatile/AP platform.
 
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/dove-front-panel-common.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/dove-front-panel-common.c
@@ -0,0 +1,232 @@
+/*
+ * arch/arm/mach-dove/dove-front-panel-common.c
+ *
+ * Marvell Dove MV88F6781-RD/DB Board Setup for device on front panel
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/irq.h>
+#include <linux/gpio_mouse.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/ads7846.h>
+#include <linux/gpio.h>
+#include <video/dovefb.h>
+#include <video/dovefbreg.h>
+#include <mach/dove_bl.h>
+#include <plat/cafe-orion.h>
+#include "dove-front-panel-common.h"
+
+static struct dovefb_mach_info dove_lcd0_dmi = {
+	.id_gfx			= "GFX Layer 0",
+	.id_ovly		= "Video Layer 0",
+	.clk_src		= MRVL_PLL_CLK,
+	.clk_name		= "accurate_LCDCLK",
+//	.num_modes		= ARRAY_SIZE(video_modes),
+//	.modes			= video_modes,
+	.pix_fmt		= PIX_FMT_RGB888PACK,
+#if defined(CONFIG_FB_DOVE_CLCD_DCONB_BYPASS0)
+	.io_pin_allocation	= IOPAD_DUMB24,
+	.panel_rgb_type		= DUMB24_RGB888_0,
+#else
+	.io_pin_allocation	= IOPAD_DUMB18SPI,
+	.panel_rgb_type		= DUMB18_RGB666_0,
+#endif
+	.panel_rgb_reverse_lanes= 0,
+	.gpio_output_data	= 0,
+	.gpio_output_mask	= 0,
+	.ddc_i2c_adapter	= 0,
+	.invert_composite_blank	= 0,
+	.invert_pix_val_ena	= 0,
+	.invert_pixclock	= 0,
+	.invert_vsync		= 0,
+	.invert_hsync		= 0,
+	.panel_rbswap		= 1,
+	.active			= 1,
+};
+
+static struct dovefb_mach_info dove_lcd0_vid_dmi = {
+	.id_ovly		= "Video Layer 0",
+//	.num_modes		= ARRAY_SIZE(video_modes),
+//	.modes			= video_modes,
+	.pix_fmt		= PIX_FMT_RGB888PACK,
+	.io_pin_allocation	= IOPAD_DUMB18SPI,
+	.panel_rgb_type		= DUMB18_RGB666_0,
+	.panel_rgb_reverse_lanes= 0,
+	.gpio_output_data	= 0,
+	.gpio_output_mask	= 0,
+	.ddc_i2c_adapter	= -1,
+	.invert_composite_blank	= 0,
+	.invert_pix_val_ena	= 0,
+	.invert_pixclock	= 0,
+	.invert_vsync		= 0,
+	.invert_hsync		= 0,
+	.panel_rbswap		= 1,
+	.active			= 0,
+	.enable_lcd0		= 0,
+};
+
+static struct dovefb_mach_info dove_lcd1_dmi = {
+	.id_gfx			= "GFX Layer 1",
+	.id_ovly		= "Video Layer 1",
+	.clk_src		= MRVL_EXT_CLK1,
+	.clk_name		= "IDT_CLK1",
+//	.num_modes		= ARRAY_SIZE(video_modes),
+//	.modes			= video_modes,
+	.pix_fmt		= PIX_FMT_RGB565,
+	.io_pin_allocation	= IOPAD_DUMB24,
+	.panel_rgb_type		= DUMB24_RGB888_0,
+	.panel_rgb_reverse_lanes= 0,
+	.gpio_output_data	= 0,
+	.gpio_output_mask	= 0,
+	.ddc_i2c_adapter	= 0,
+	.invert_composite_blank	= 0,
+	.invert_pix_val_ena	= 0,
+	.invert_pixclock	= 0,
+	.invert_vsync		= 0,
+	.invert_hsync		= 0,
+	.panel_rbswap		= 1,
+	.active			= 1,
+#ifndef CONFIG_FB_DOVE_CLCD
+	.enable_lcd0		= 1,
+#else
+	.enable_lcd0		= 0,
+#endif
+};
+
+static struct dovefb_mach_info dove_lcd1_vid_dmi = {
+	.id_ovly		= "Video Layer 1",
+//	.num_modes		= ARRAY_SIZE(video_modes),
+//	.modes			= video_modes,
+	.pix_fmt		= PIX_FMT_RGB888PACK,
+	.io_pin_allocation	= IOPAD_DUMB24,
+	.panel_rgb_type		= DUMB24_RGB888_0,
+	.panel_rgb_reverse_lanes= 0,
+	.gpio_output_data	= 0,
+	.gpio_output_mask	= 0,
+	.ddc_i2c_adapter	= -1,
+	.invert_composite_blank	= 0,
+	.invert_pix_val_ena	= 0,
+	.invert_pixclock	= 0,
+	.invert_vsync		= 0,
+	.invert_hsync		= 0,
+	.panel_rbswap		= 1,
+	.active			= 0,
+};
+
+static struct dovebl_platform_data fp_backlight_data = {
+	.default_intensity = 0xa,
+	.gpio_pm_control = 1,
+
+	.lcd_start = DOVE_LCD1_PHYS_BASE,	/* lcd power control reg base. */
+	.lcd_end = DOVE_LCD1_PHYS_BASE+0x1C8,	/* end of reg map. */
+	.lcd_offset = LCD_SPU_DUMB_CTRL,	/* register offset */
+	.lcd_mapped = 0,		/* va = 0, pa = 1 */
+	.lcd_mask = 0x200000,		/* mask, bit[21] */
+	.lcd_on = 0x200000,			/* value to enable lcd power */
+	.lcd_off = 0x0,			/* value to disable lcd power */
+
+	.blpwr_start = DOVE_LCD1_PHYS_BASE, /* bl pwr ctrl reg base. */
+	.blpwr_end = DOVE_LCD1_PHYS_BASE+0x1C8,	/* end of reg map. */
+	.blpwr_offset = LCD_SPU_DUMB_CTRL,	/* register offset */
+	.blpwr_mapped = 0,		/* pa = 0, va = 1 */
+	.blpwr_mask = 0x100000,		/* mask */
+	.blpwr_on = 0x100000,		/* value to enable bl power */
+	.blpwr_off = 0x0,		/* value to disable bl power */
+
+	.btn_start = DOVE_LCD1_PHYS_BASE, /* brightness control reg base. */
+	.btn_end = DOVE_LCD1_PHYS_BASE+0x1C8,	/* end of reg map. */
+	.btn_offset = LCD_CFG_GRA_PITCH,	/* register offset */
+	.btn_mapped = 0,		/* pa = 0, va = 1 */
+	.btn_mask = 0xF0000000,	/* mask */
+	.btn_level = 15,	/* how many level can be configured. */
+	.btn_min = 0x1,	/* min value */
+	.btn_max = 0xF,	/* max value */
+	.btn_inc = 0x1,	/* increment */
+
+};
+
+struct cafe_cam_platform_data dove_cafe_cam_data = {
+	.power_down 	= 1, //CTL0 connected to the sensor power down
+	.reset		= 2, //CTL1 connected to the sensor reset
+};
+
+struct gpio_mouse_platform_data tact_dove_fp_data = {
+	.scan_ms = 10,
+	.polarity = 1,
+	{
+		{
+			.up = 15,
+			.down = 12,
+			.left = 13,
+			.right = 14,
+			.bleft = 18,
+			.bright = -1,
+			.bmiddle = -1
+		}
+	}
+};
+
+#define DOVE_FP_TS_PEN_GPIO	(53)
+#define DOVE_FP_TS_PEN_IRQ	(DOVE_FP_TS_PEN_GPIO + 64)
+
+static int dove_fp_get_pendown_state(void)
+{
+	return !gpio_get_value(irq_to_gpio(DOVE_FP_TS_PEN_IRQ));
+}
+
+static const struct ads7846_platform_data dove_fp_ts_data = {
+	.model			= 7846,
+	.x_min			= 80,
+	.x_max			= 3940,
+	.y_min			= 330,
+	.y_max			= 3849,
+	.get_pendown_state	= dove_fp_get_pendown_state,
+};
+
+struct spi_board_info __initdata dove_fp_spi_devs[] = {
+	{
+		.modalias	= "ads7846",
+		.platform_data	= &dove_fp_ts_data,
+		.irq		= DOVE_FP_TS_PEN_IRQ,
+		.max_speed_hz	= 125000 * 4,
+		.bus_num	= 2,
+		.chip_select	= 0,
+	},
+};
+
+int __init dove_fp_spi_devs_num(void)
+{
+	return ARRAY_SIZE(dove_fp_spi_devs);
+}
+
+int __init dove_fp_ts_gpio_setup(void)
+{
+	set_irq_chip(DOVE_FP_TS_PEN_IRQ, &orion_gpio_irq_chip);
+	set_irq_handler(DOVE_FP_TS_PEN_IRQ, handle_edge_irq);
+	set_irq_type(DOVE_FP_TS_PEN_IRQ, IRQ_TYPE_EDGE_FALLING);
+	orion_gpio_set_valid(DOVE_FP_TS_PEN_GPIO, 1);
+	if (gpio_request(DOVE_FP_TS_PEN_GPIO, "DOVE_TS_PEN_IRQ") != 0)
+		pr_err("Dove: failed to setup TS IRQ GPIO\n");
+	if (gpio_direction_input(DOVE_FP_TS_PEN_GPIO) != 0) {
+		printk(KERN_ERR "%s failed "
+		       "to set output pin %d\n", __func__,
+		       DOVE_FP_TS_PEN_GPIO);
+		gpio_free(DOVE_FP_TS_PEN_GPIO);
+		return -1;
+	}
+	return 0;
+}
+
+void __init dove_fp_clcd_init(void) {
+#ifdef CONFIG_FB_DOVE
+	clcd_platform_init(&dove_lcd0_dmi, &dove_lcd0_vid_dmi,
+			   &dove_lcd1_dmi, &dove_lcd1_vid_dmi,
+			   &fp_backlight_data);
+#endif /* CONFIG_FB_DOVE */
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/Makefile.boot
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/Makefile.boot
@@ -0,0 +1,3 @@
+   zreladdr-y	:= 0x00008000
+params_phys-y	:= 0x00000100
+initrd_phys-y	:= 0x00800000
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/dove-videoplug-setup.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/dove-videoplug-setup.c
@@ -0,0 +1,571 @@
+/*
+ * arch/arm/mach-dove/dove-videoplug-setup.c
+ *
+ * Marvell 88AP510 Video Plug Board Setup
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/irq.h>
+#include <linux/mtd/physmap.h>
+#include <linux/mtd/nand.h>
+#include <linux/timer.h>
+#include <linux/ata_platform.h>
+#include <linux/mv643xx_eth.h>
+#include <linux/i2c.h>
+#include <linux/i2c/pca953x.h>
+#include <linux/pci.h>
+#include <linux/gpio_mouse.h>
+#include <linux/gpio_keys.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/orion_spi.h>
+#include <linux/spi/flash.h>
+#include <linux/spi/tsc200x.h>
+#include <video/dovefb.h>
+#include <video/dovefbreg.h>
+#include <mach/dove_bl.h>
+#include <plat/i2s-orion.h>
+#include <asm/mach-types.h>
+#include <asm/gpio.h>
+#include <asm/mach/arch.h>
+#include <mach/dove.h>
+#include <asm/hardware/pxa-dma.h>
+#include <plat/orion_nfc.h>
+#include <mach/dove_ssp.h>
+#include <mach/pm.h>
+#include <plat/cafe-orion.h>
+#include "common.h"
+#include "clock.h"
+#include "idt5v49ee503.h"
+#include "mpp.h"
+#include "pmu/mvPmu.h"
+#include "pmu/mvPmuRegs.h"
+#include "pdma/mvPdma.h"
+
+#define DOVE_VIDEOPLUG_WAKEUP_GPIO	(3)
+#define DOVE_VIDEOPLUG_POWER_OFF_GPIO	(8)
+
+static unsigned int use_hal_giga = 0;
+#ifdef CONFIG_MV643XX_ETH
+module_param(use_hal_giga, uint, 0);
+MODULE_PARM_DESC(use_hal_giga, "Use the HAL giga driver");
+#endif
+
+extern unsigned int useHalDrivers;
+extern char *useNandHal;
+
+static struct dovefb_mach_info dove_videoplug_lcd0_dmi = {
+	.id_gfx			= "GFX Layer 0",
+	.id_ovly		= "Video Layer 0",
+
+	.clk_src		= MRVL_EXT_CLK1, /* enable using external clock */
+	.clk_name		= "IDT_CLK1", /* use clock 1 */
+
+//	.num_modes		= ARRAY_SIZE(video_modes),
+//	.modes			= video_modes,
+	.pix_fmt		= PIX_FMT_RGB888PACK,
+	.io_pin_allocation	= IOPAD_DUMB24,
+	.panel_rgb_type		= DUMB24_RGB888_0,
+	.panel_rgb_reverse_lanes= 0,
+	.gpio_output_data	= 0,// AVG 3,
+	.gpio_output_mask	= 0,// AVG 3,
+#ifndef CONFIG_FB_DOVE_CLCD0_I2C_DEFAULT_SETTING
+	.ddc_i2c_adapter	= CONFIG_FB_DOVE_CLCD0_I2C_CHANNEL,
+	.ddc_i2c_address	= CONFIG_FB_DOVE_CLCD0_I2C_ADDRESS,
+#else
+	.ddc_i2c_adapter	= 0,// AVG3,
+	.ddc_i2c_address	= 0x3f,
+#endif
+	.invert_composite_blank	= 0,
+	.invert_pix_val_ena	= 0,
+	.invert_pixclock	= 0,
+	.invert_vsync		= 0,
+	.invert_hsync		= 0,
+	.panel_rbswap		= 1,
+	.active			= 1,
+};
+
+static struct dovefb_mach_info dove_videoplug_lcd0_vid_dmi = {
+	.id_ovly		= "Video Layer 0",
+//	.num_modes		= ARRAY_SIZE(video_modes),
+//	.modes			= video_modes,
+	.pix_fmt		= PIX_FMT_RGB888PACK,
+	.io_pin_allocation	= IOPAD_DUMB24, //IOPAD_DUMB18GPIO,
+	.panel_rgb_type		= DUMB24_RGB888_0, //DUMB18_RGB666_0,
+	.panel_rgb_reverse_lanes= 0,
+	.gpio_output_data	= 0, // AVG 3,
+	.gpio_output_mask	= 0, // AVG 3,
+	.ddc_i2c_adapter	= -1,
+	.invert_composite_blank	= 0,
+	.invert_pix_val_ena	= 0,
+	.invert_pixclock	= 0,
+	.invert_vsync		= 0,
+	.invert_hsync		= 0,
+	.panel_rbswap		= 1,
+	.active			= 1,
+	.enable_lcd0		= 1,
+};
+
+static struct dove_ssp_platform_data dove_ssp_platform_data = {
+	.use_dma = 0,
+	.use_loopback = 1,
+	.dss = 32,
+	.scr = 2,
+	.frf = 1,
+	.rft = 8,
+	.tft = 8
+};
+
+void __init dove_videoplug_clcd_init(void) {
+#ifdef CONFIG_FB_DOVE
+	u32 dev, rev;
+	
+	dove_pcie_id(&dev, &rev);
+
+	/* LCD external clock supported only starting from rev A0 */
+	if (rev < DOVE_REV_A0)
+		dove_videoplug_lcd0_dmi.clk_src = MRVL_PLL_CLK;
+
+	clcd_platform_init(&dove_videoplug_lcd0_dmi, &dove_videoplug_lcd0_vid_dmi,
+			   NULL, NULL, NULL);
+#endif /* CONFIG_FB_DOVE */
+}
+
+extern int __init pxa_init_dma_wins(struct mbus_dram_target_info * dram);
+
+static struct orion_i2s_platform_data i2s1_data = {
+	.i2s_play	= 0,
+	.i2s_rec	= 0,
+	.spdif_play	= 1,
+};
+
+#ifndef CONFIG_SND_DOVE_AC97
+static struct orion_i2s_platform_data i2s0_data = {
+	.i2s_play	= 0,
+	.i2s_rec	= 0,
+};
+#else
+
+#endif
+
+#if 1
+static struct mv643xx_eth_platform_data dove_videoplug_ge00_data = {
+	.phy_addr	= MV643XX_ETH_PHY_ADDR_DEFAULT,
+};
+
+#endif
+
+static struct mv_sata_platform_data dove_videoplug_sata_data = {
+        .n_ports        = 1,
+};
+
+
+/*****************************************************************************
+ * SPI Devices:
+ * 	SPI0: 4M Flash ST-M25P32-VMF6P
+ ****************************************************************************/
+static const struct flash_platform_data dove_videoplug_spi_flash_data = {
+	.type		= "m25p64",
+};
+
+static struct spi_board_info __initdata dove_videoplug_spi_flash_info[] = {
+	{
+		.modalias       = "m25p80",
+		.platform_data  = &dove_videoplug_spi_flash_data,
+		.irq            = -1,
+		.max_speed_hz   = 20000000,
+		.bus_num        = 0,
+		.chip_select    = 0,
+	},
+};
+
+/*****************************************************************************
+ * PCI
+ ****************************************************************************/
+static int __init dove_videoplug_pci_init(void)
+{
+	if (machine_is_videoplug())
+		dove_pcie_init(1, 1);
+
+	return 0;
+}
+
+subsys_initcall(dove_videoplug_pci_init);
+
+
+/*****************************************************************************
+ * I2C buses - adc, hdmi
+ ****************************************************************************/
+static struct i2c_board_info __initdata i2c_plug[] = {
+	{
+		I2C_BOARD_INFO("adi9889_i2c", 0x39),
+	},
+	{
+		I2C_BOARD_INFO("adi9889_edid_i2c", 0x3F),
+	},
+};
+
+/*****************************************************************************
+ * IDT clock 
+ ****************************************************************************/
+static struct idt_data dove_videoplug_idt_data = {
+	/* clock 0 connected to pin LCD_EXT_REF_CLK[0]*/
+	.clock0_enable = 1,
+	.clock0_out_id = IDT_OUT_ID_2,
+	.clock0_pll_id = IDT_PLL_1,
+	/* clock 1 connected to pin LCD_EXT_REF_CLK[1]*/
+	.clock1_enable = 1,
+	.clock1_out_id = IDT_OUT_ID_3,
+	.clock1_pll_id = IDT_PLL_2,
+};
+
+static struct i2c_board_info __initdata idt = {
+	I2C_BOARD_INFO("idt5v49ee503", 0x6A),
+	.platform_data = &dove_videoplug_idt_data,
+};
+
+/*****************************************************************************
+ * A2D on I2C bus
+ ****************************************************************************/
+static struct i2c_board_info __initdata i2c_a2d = {
+	I2C_BOARD_INFO("cs42l51", 0x4A),
+};
+
+static struct platform_device dit_data = {
+	.name = "spdif-dit",
+	.id = -1
+};
+
+
+/*****************************************************************************
+ * NAND
+ ****************************************************************************/
+static struct mtd_partition partition_dove[] = {
+	{ .name		= "UBoot",
+	  .offset	= 0,
+	  .size		= 1 * SZ_1M },
+	{ .name		= "uImage",
+	  .offset	= MTDPART_OFS_APPEND,
+	  .size		= 4 * SZ_1M },
+	{ .name		= "initrd",
+	  .offset	= MTDPART_OFS_APPEND,
+	  .size		= 4 * SZ_1M },
+	{ .name		= "root",
+	  .offset	= MTDPART_OFS_APPEND,
+	  .size         = MTDPART_SIZ_FULL},
+};
+static u64 nfc_dmamask = DMA_BIT_MASK(32);
+
+static struct nfc_platform_data dove_videoplug_nfc_hal_data = {
+	.nfc_width      = 8,			/* Assume non-ganged mode by default */
+	.num_devs       = 1,			/* Assume non-ganged mode by default */
+	.num_cs         = 1,
+	.use_dma	= 1,
+	.ecc_type	= MV_NFC_ECC_BCH_1K,	/* Assume 8bit ECC by default - K9LBG08U0D */
+	.parts = partition_dove,
+	.nr_parts = ARRAY_SIZE(partition_dove)
+};
+
+static struct nfc_platform_data dove_videoplug_nfc_data = {
+	.nfc_width      = 8,
+	.num_devs       = 1,
+	.use_dma        = 1,
+	.ecc_type	= MV_NFC_ECC_HAMMING,
+	.parts = partition_dove,
+	.nr_parts = ARRAY_SIZE(partition_dove)
+ };
+
+static struct resource dove_nfc_resources[]  = {
+	[0] = {
+		.start	= (DOVE_NFC_PHYS_BASE),
+		.end	= (DOVE_NFC_PHYS_BASE + 0xFF),
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= IRQ_NAND,
+		.end	= IRQ_NAND,
+		.flags	= IORESOURCE_IRQ,
+	},
+	[2] = {
+		/* DATA DMA */
+		.start	= 97,
+		.end	= 97,
+		.flags	= IORESOURCE_DMA,
+	},
+	[3] = {
+		/* COMMAND DMA */
+		.start	= 99,
+		.end	= 99,
+		.flags	= IORESOURCE_DMA,
+	},
+};
+
+static struct platform_device dove_nfc = {
+	.name		= "orion-nfc",
+	.id		= -1,
+	.dev		= {
+		.dma_mask		= &nfc_dmamask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+		.platform_data		= &dove_videoplug_nfc_data,
+	},
+	.resource	= dove_nfc_resources,
+	.num_resources	= ARRAY_SIZE(dove_nfc_resources),
+};
+
+static void __init dove_videoplug_nfc_init(void)
+{
+	/* Check if HAL driver is intended */
+	if(useHalDrivers || useNandHal) {
+		dove_nfc.name = "orion-nfc-hal";
+
+		/* Check for ganaged mode */
+		if (strncmp(useNandHal, "ganged", 6) == 0) {
+			dove_videoplug_nfc_hal_data.nfc_width = 16;
+			dove_videoplug_nfc_hal_data.num_devs = 2;
+			useNandHal += 7;
+		}
+
+		/* Check for ECC type directive */
+		if (strcmp(useNandHal, "4bitecc") == 0) {
+			dove_videoplug_nfc_hal_data.ecc_type = MV_NFC_ECC_BCH_2K;
+		} else if (strcmp(useNandHal, "8bitecc") == 0) {
+			dove_videoplug_nfc_hal_data.ecc_type = MV_NFC_ECC_BCH_1K;
+		} else if (strcmp(useNandHal, "12bitecc") == 0) {
+			dove_videoplug_nfc_hal_data.ecc_type = MV_NFC_ECC_BCH_704B;
+		} else if (strcmp(useNandHal, "16bitecc") == 0) {
+			dove_videoplug_nfc_hal_data.ecc_type = MV_NFC_ECC_BCH_512B;
+		}
+
+		dove_videoplug_nfc_hal_data.tclk = dove_tclk_get();
+		dove_nfc.dev.platform_data = &dove_videoplug_nfc_hal_data;
+
+	} else {  /* NON HAL driver is used */
+		dove_videoplug_nfc_data.tclk = dove_tclk_get();
+	}
+
+	platform_device_register(&dove_nfc);
+}
+
+static struct dove_mpp_mode dove_videoplug_mpp_modes[] __initdata = {
+	{ 0, MPP_GPIO },           	/* WOL_INT */
+	{ 1, MPP_GPIO },           	/* Green Led Status */
+
+	{ 2, MPP_PMU },			/* Standby power control / PM Standby enable*/
+	{ 3, MPP_PMU },			/* Power button - standby wakeup */
+	{ 4, MPP_PMU },			/* Core power good indication */
+	{ 5, MPP_PMU },			/* DeepIdle power control/CPU Enable */
+	{ 6, MPP_GPIO},			/* DDR termination */
+	{ 7, MPP_PMU },			/* CPU Power good indication */
+
+	{ 8, MPP_GPIO },		/* power off */
+
+	{ 10, MPP_PMU },		/* DVS SDI control */
+
+	{ 12, MPP_SDIO1 },           	/* SDIO1 */
+	{ 13, MPP_GPIO },           	/* Blue Led Status */
+
+        { 15, MPP_GPIO },               /* Amber Les status ( could be MPP14 )*/
+
+	{ 24, MPP_CAM }, /* will configure MPPs 24-39*/
+
+	{ 40, MPP_SDIO0 }, /* will configure MPPs 40-45 */
+
+	{ 46, MPP_SDIO1 }, /*  will configure MPPs 46-51 */
+
+        { 52, MPP_AUDIO1 }, /* AU1 Group - ill configure MPPs 52-57  */
+ 
+	{ 58, MPP_SPI0 }, /* will configure MPPs 58-61 */
+
+        { 62, MPP_UART1 }, /* UA1 */
+        { 64, MPP_GPIO }, /* will configure MPPs 64-72 -  NF_IO [8:15] */
+        { -1 },
+};
+
+static void dove_videoplug_power_off(void)
+{
+	if (gpio_request(DOVE_VIDEOPLUG_POWER_OFF_GPIO, "DOVE_VIDEOPLUG_POWER_OFF") != 0) {
+		pr_err("Dove: failed to setup power off GPIO\n");
+		return;
+	}
+
+	if (gpio_direction_output(DOVE_VIDEOPLUG_POWER_OFF_GPIO, 0) != 0) {
+ 		printk(KERN_ERR "%s failed to set power off output pin %d\n",
+		       __func__, DOVE_VIDEOPLUG_POWER_OFF_GPIO);
+		return;
+	}
+}
+
+#ifdef CONFIG_PM
+/*****************************************************************************
+ * POWER MANAGEMENT
+ ****************************************************************************/
+static int __init dove_videoplug_pm_init(void)
+{
+	MV_PMU_INFO pmuInitInfo;
+	u32 dev, rev;
+
+	if (!machine_is_videoplug())
+		return 0;
+
+	dove_pcie_id(&dev, &rev);
+
+	pmuInitInfo.batFltMngDis = MV_FALSE;			/* Keep battery fault enabled */
+	pmuInitInfo.exitOnBatFltDis = MV_FALSE;			/* Keep exit from STANDBY on battery fail enabled */
+	pmuInitInfo.sigSelctor[0] = PMU_SIGNAL_NC;
+	pmuInitInfo.sigSelctor[1] = PMU_SIGNAL_NC;
+	pmuInitInfo.sigSelctor[2] = PMU_SIGNAL_SLP_PWRDWN;	/* STANDBY => 0: I/O off, 1: I/O on */
+	pmuInitInfo.sigSelctor[3] = PMU_SIGNAL_EXT0_WKUP;	/* power on push button */	
+	if (rev >= DOVE_REV_X0) /* For X0 and higher Power Good indication is not needed */
+		pmuInitInfo.sigSelctor[4] = PMU_SIGNAL_NC;
+	else
+		pmuInitInfo.sigSelctor[4] = PMU_SIGNAL_CPU_PWRGOOD;	/* CORE power good used as Standby PG */
+	pmuInitInfo.sigSelctor[5] = PMU_SIGNAL_CPU_PWRDWN;	/* DEEP-IdLE => 0: CPU off, 1: CPU on */
+	pmuInitInfo.sigSelctor[6] = PMU_SIGNAL_NC;		/* Charger interrupt - not used */
+	pmuInitInfo.sigSelctor[7] = PMU_SIGNAL_NC;		/* CPU power good  - not used */
+	pmuInitInfo.sigSelctor[8] = PMU_SIGNAL_NC;
+	pmuInitInfo.sigSelctor[9] = PMU_SIGNAL_NC;
+	pmuInitInfo.sigSelctor[10] = PMU_SIGNAL_SDI;		/* Voltage regulator control */
+	pmuInitInfo.sigSelctor[11] = PMU_SIGNAL_NC;
+	pmuInitInfo.sigSelctor[12] = PMU_SIGNAL_NC;
+	pmuInitInfo.sigSelctor[13] = PMU_SIGNAL_NC;
+	pmuInitInfo.sigSelctor[14] = PMU_SIGNAL_NC;
+	pmuInitInfo.sigSelctor[15] = PMU_SIGNAL_NC;
+	pmuInitInfo.dvsDelay = 0x4200;				/* ~100us in 166MHz cc - delay for DVS change */
+	pmuInitInfo.ddrTermGpioNum = 6;			/* GPIO 6 used to disable terminations */
+	if (rev >= DOVE_REV_X0) /* For X0 and higher wait at least 150ms + spare */
+		pmuInitInfo.standbyPwrDelay = 0x2000;		/* 250ms delay to wait for complete powerup */
+	else
+		pmuInitInfo.standbyPwrDelay = 0x140;		/* 10ms delay after getting the power good indication */
+
+	/* Initialize the PMU HAL */
+	if (mvPmuInit(&pmuInitInfo) != MV_OK)
+	{
+		printk(KERN_ERR "ERROR: Failed to initialise the PMU!\n");
+		return 0;
+	}
+
+	/* Configure wakeup events */
+	mvPmuWakeupEventSet(PMU_STBY_WKUP_CTRL_EXT0_FALL | PMU_STBY_WKUP_CTRL_RTC_MASK);
+
+	/* Register the PM operation in the Linux stack */
+	dove_pm_register();
+
+	return 0;
+}
+
+__initcall(dove_videoplug_pm_init);
+#endif
+
+/*****************************************************************************
+ * Board Init
+ ****************************************************************************/
+//extern struct mbus_dram_target_info dove_mbus_dram_info;
+//extern int __init pxa_init_dma_wins(struct mbus_dram_target_info * dram);
+static void __init dove_videoplug_init(void)
+{
+	/*
+	 * Basic Dove setup. Needs to be called early.
+	 */
+	dove_init();
+
+	dove_mpp_conf(dove_videoplug_mpp_modes);
+	
+	pm_power_off = dove_videoplug_power_off;
+
+        /* the (SW1) button is for use as a "wakeup" button */
+	dove_wakeup_button_setup(DOVE_VIDEOPLUG_WAKEUP_GPIO);
+
+	/* sdio card interrupt workaround using GPIOs */
+	dove_sd_card_int_wa_setup(0);
+
+
+#if defined(CONFIG_SND_DOVE_AC97)
+#if !defined(CONFIG_CPU_ENDIAN_BE8)
+	/* FIXME:
+	 * we need fix __AC97(x) definition in
+	 * arch/arm/mach-dove/include/mach/pxa-regs.h
+	 * to resolve endian access.
+	 */
+	/* Initialize AC'97 related regs.	*/
+//	dove_ac97_setup();
+#endif
+#endif
+
+	dove_rtc_init();
+
+	pxa_init_dma_wins(&dove_mbus_dram_info);
+	pxa_init_dma(16);
+#ifdef CONFIG_MV_HAL_DRIVERS_SUPPORT
+	if(useHalDrivers || useNandHal) {
+		if (mvPdmaHalInit(MV_PDMA_MAX_CHANNELS_NUM) != MV_OK) {
+			printk(KERN_ERR "mvPdmaHalInit() failed.\n");
+			BUG();
+		}
+		/* reserve channels for NAND Data and command PDMA */
+		pxa_reserve_dma_channel(MV_PDMA_NAND_DATA);
+		pxa_reserve_dma_channel(MV_PDMA_NAND_COMMAND);
+	}
+#endif
+	dove_xor0_init();
+	dove_xor1_init();
+#ifdef CONFIG_MV_ETHERNET
+	if(use_hal_giga || useHalDrivers)
+		dove_mv_eth_init();
+	else
+#endif
+	dove_ge00_init(&dove_videoplug_ge00_data);
+	dove_ehci0_init();
+	dove_ehci1_init();
+
+	/* ehci init functions access the usb port, only now it's safe to disable
+	 * all clocks
+	 */
+	ds_clks_disable_all(0, 0);
+	dove_sata_init(&dove_videoplug_sata_data);
+	dove_spi0_init(0);
+	dove_spi1_init(1);
+	dove_uart0_init();
+	dove_uart1_init();
+	dove_i2c_init();
+	dove_i2c_exp_init(0);
+	dove_i2c_exp_init(1);
+	dove_sdhci_cam_mbus_init();
+	dove_sdio0_init();
+	dove_videoplug_nfc_init();
+	dove_videoplug_clcd_init();
+	dove_vmeta_init();
+	dove_gpu_init();
+	dove_ssp_init(&dove_ssp_platform_data);
+	dove_cesa_init();
+	dove_hwmon_init();
+
+#if !defined(CONFIG_SND_DOVE_AC97)
+	dove_i2s_init(0, &i2s0_data);
+#endif
+	dove_i2s_init(1, &i2s1_data);
+	platform_device_register(&dit_data);
+
+	i2c_register_board_info(0, i2c_plug, ARRAY_SIZE(i2c_plug));
+	i2c_register_board_info(0, &i2c_a2d, 1);
+	i2c_register_board_info(0, &idt, 1);
+	//i2c_register_board_info(0, dove_videoplug_gpio_ext_info, 1);
+	spi_register_board_info(dove_videoplug_spi_flash_info,
+				ARRAY_SIZE(dove_videoplug_spi_flash_info));
+}
+
+MACHINE_START(DOVE_VIDEOPLUG, "Marvell 88FAP510 Video Plug Board")
+	.phys_io	= DOVE_SB_REGS_PHYS_BASE,
+	.io_pg_offst	= ((DOVE_SB_REGS_VIRT_BASE) >> 18) & 0xfffc,
+	.boot_params	= 0x00000100,
+	.init_machine	= dove_videoplug_init,
+	.map_io		= dove_map_io,
+	.init_irq	= dove_init_irq,
+	.timer		= &dove_timer,
+/* reserve memory for VMETA and GPU */
+	.fixup		= dove_tag_fixup_mem32,
+MACHINE_END
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/Kconfig
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/Kconfig
@@ -0,0 +1,104 @@
+if ARCH_DOVE
+
+config  MV_HAL_RULES_PATH
+        string "path of the mvRules.mk file for HAL drivers"
+        default "arch/arm/mach-dove/mv_hal_support/mvRules.mk"
+        ---help---
+	
+#source "arch/arm/plat-orion/mv_hal_drivers/Kconfig"
+
+menu "Marvell Dove Implementations"
+choice
+	prompt "Dove SoC Silicon Revision"
+	default DOVE_REV_Y0
+
+config DOVE_REV_Y0
+	bool "Dove Revision Y0"
+	help
+	  This enables support for Dove Y0 silicon
+
+endchoice
+
+config MACH_DOVE_RD_AVNG
+	bool "Marvell RD-MV88F6781 Avengers Reference design platform"
+	select I2C_BOARDINFO
+	depends on DOVE_REV_Y0
+	help
+	  Say 'Y' here if you want your kernel to support the
+	  Marvell RD-MV88F6781 Avengers Mobile Internet Device Reference design
+	  platform.
+
+config MV_INCLUDE_MPP_SYSFS
+        bool "Avengers MPP sysfs Support"
+        depends on MACH_DOVE_RD_AVNG_Z0 || MACH_DOVE_RD_AVNG
+        default y
+        ---help---
+        Please don't change this configs unless you know what you are doing.
+
+config MACH_DOVE_RD
+	bool "Marvell RD-MV88F6781 Reference design platform"
+	select I2C_BOARDINFO
+	help
+	  Say 'Y' here if you want your kernel to support the
+	  Marvell RD-MV88F6781 Reference design platform.
+
+config MACH_DOVE_DB
+	bool "Marvell DB-MV88F6781 Development Board"
+	select I2C_BOARDINFO
+	depends on DOVE_REV_Y0
+	help
+	  Say 'Y' here if you want your kernel to support the
+
+config MACH_DOVE_DB_B
+	bool "Marvell DB-88AP510-BP-B Development Board"
+	select I2C_BOARDINFO
+	depends on DOVE_REV_Y0
+	help
+	  Say 'Y' here if you want your kernel to support the
+
+config DOVE_DB_USE_GPIO_I2C
+        bool "Use gpio-i2c driver for TWSI option 2 bus"
+	select I2C_GPIO
+	depends on MACH_DOVE_DB_B
+	default n
+	help
+	  Say 'Y' here is you want to use the gpio-i2c driver to control
+	  TWSI option2 wires. This is usefull when this bus used for VGA
+	  port and DDC1 screen is connected.
+
+config MACH_DOVE_VIDEOPLUG
+       bool "Marvell 88AP510 Video Plug Board"
+       select I2C_BOARDINFO
+       depends on DOVE_REV_Y0
+       help
+	  Say 'Y' here if you want your kernel to support the
+	  Marvell  88AP510 Video Plug Board.
+
+endmenu
+
+config MV_HAL_DRIVERS_SUPPORT
+	bool "Enable HAL based drivers support"
+	depends on ARCH_DOVE
+	select MV_INCLUDE_INTEG_SATA
+	help
+	  Say 'Y' here if you want your kernel to support HAL 
+	  based drivers where possible.
+
+config DOVE_GC600
+	tristate "Marvell Dove Graphics Accelerator GC600"
+	default y
+	help
+	  Say 'Y' here if you want to build the GC600 support.
+
+config DOVE_PM_SUPPORT
+	depends on PM && MV_INCLUDE_PMU && MV_HAL_DRIVERS_SUPPORT
+	def_bool y
+
+config MV_EXT_VGA_CLOCK
+       tristate "Marvell external IDT5V49EE503 clock on 88AP510 Board"
+       help
+	  Say 'Y' here if you want your kernel to support the
+	  external video clock on Marvell  88AP510 Board.
+	  This clock enables dual-head VGA out with different resolution
+
+endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/twsi.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/twsi.c
@@ -0,0 +1,74 @@
+/*
+ * arch/arm/mach-dove/twsi.c
+ *
+ * TWSI MUX functions for Marvell Dove 88F6781 SoC
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <mach/dove.h>
+
+#include "twsi.h"
+
+static void dove_twsi_option_set(dove_twsi_option option, unsigned int enable)
+{
+	u32	reg;
+	unsigned int addr;
+	unsigned int mask;
+
+	switch (option)
+	{
+	case DOVE_TWSI_OPTION1:
+		addr = DOVE_GLOBAL_CONFIG_1;
+		mask = DOVE_TWSI_ENABLE_OPTION1;
+		break;
+	case DOVE_TWSI_OPTION2:
+		addr = DOVE_GLOBAL_CONFIG_2;
+		mask = DOVE_TWSI_ENABLE_OPTION2;
+		break;
+	case DOVE_TWSI_OPTION3:
+		addr = DOVE_GLOBAL_CONFIG_2;
+		mask = DOVE_TWSI_ENABLE_OPTION3;
+		break;
+	default:
+		printk("error: unknown TWSI option %d\n", option);
+		return;
+	}
+
+	reg = readl(addr);
+
+	if (enable)
+		reg |= mask;
+	else
+		reg &= ~mask;
+
+	writel(reg, addr);	
+}
+
+static unsigned int port_id_old = -1;
+
+int dove_select_exp_port(unsigned int port_id)
+{
+	if(port_id_old != port_id)
+	{	       
+		/* disable all*/
+		dove_twsi_option_set(DOVE_TWSI_OPTION1, 0);
+		dove_twsi_option_set(DOVE_TWSI_OPTION2, 0);
+		dove_twsi_option_set(DOVE_TWSI_OPTION3, 0);
+
+		/* enable requested port*/
+		dove_twsi_option_set(port_id, 1);
+		port_id_old = port_id;
+	}
+
+	return 0;
+}
+
+void dove_reset_exp_port()
+{
+	port_id_old = -1;
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/dove-rd-setup.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/dove-rd-setup.c
@@ -0,0 +1,345 @@
+/*
+ * arch/arm/mach-dove/dove-rd-setup.c
+ *
+ * Marvell Dove MV88F6781-RD Board Setup
+ *
+ * Author: Tzachi Perelstein <tzachi@marvell.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/irq.h>
+#include <linux/mtd/physmap.h>
+#include <linux/mtd/nand.h>
+#include <linux/timer.h>
+#include <linux/ata_platform.h>
+#include <linux/mv643xx_eth.h>
+#include <linux/i2c.h>
+#include <linux/pci.h>
+#include <linux/gpio_mouse.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/orion_spi.h>
+#include <linux/spi/flash.h>
+#include <linux/spi/ads7846.h>
+#include <video/dovefb.h>
+#include <plat/i2s-orion.h>
+#include <asm/mach-types.h>
+#include <asm/gpio.h>
+#include <asm/mach/arch.h>
+#include <mach/dove.h>
+#include <asm/hardware/pxa-dma.h>
+#include <plat/orion_nfc.h>
+#include "common.h"
+#include "mpp.h"
+#include "clock.h"
+#include "dove-front-panel-common.h"
+#include <mach/pm.h>
+#include "pmu/mvPmu.h"
+#include "pmu/mvPmuRegs.h"
+
+#define DOVE_RD_WAKEUP_GPIO	(3)
+
+extern int __init pxa_init_dma_wins(struct mbus_dram_target_info *dram);
+#ifdef CONFIG_MV_ETHERNET
+#else
+static struct mv643xx_eth_platform_data dove_rd_ge00_data = {
+	.phy_addr	= MV643XX_ETH_PHY_ADDR_DEFAULT,
+};
+#endif
+static struct orion_i2s_platform_data i2s0_data = {
+	.i2s_play	= 1,
+	.i2s_rec	= 1,
+	.spdif_play	= 0, /* RD doesn't have SPDIF ports */
+	.spdif_rec	= 0,
+};
+
+/*****************************************************************************
+ * SATA
+ ****************************************************************************/
+static struct mv_sata_platform_data dove_rd_sata_data = {
+	.n_ports	= 1,
+};
+
+/*****************************************************************************
+ * SPI Devices:
+ * 	SPI0: 4M Flash ST-M25P32-VMF6P
+ ****************************************************************************/
+static const struct flash_platform_data dove_rd_spi_flash_data = {
+	.type		= "m25p32",
+};
+
+static struct spi_board_info __initdata dove_rd_spi_flash_info[] = {
+	{
+		.modalias       = "m25p80",
+		.platform_data  = &dove_rd_spi_flash_data,
+		.irq            = -1,
+		.max_speed_hz   = 20000000,
+		.bus_num        = 0,
+		.chip_select    = 0,
+	},
+};
+
+/*****************************************************************************
+ * I2C devices:
+ * 	Audio codec CS42L51-CNZ, address 0x94
+ * 	eeprom CAT24C64LI-G, address 0xa0
+ * 	VGA connector, address ??
+ * 	LCD board, address ??
+ * 	Battery, address ??
+ * 	Charger, address ??
+ ****************************************************************************/
+static struct i2c_board_info __initdata dove_rd_i2c_devs[] = {
+	{ I2C_BOARD_INFO("cs42l51", 0x4A) },
+	{ I2C_BOARD_INFO("bq2084_i2c", 0x0B) },		/* Battery Gauge */
+	{ I2C_BOARD_INFO("max1535_i2c", 0x09) },	/* SMBus Charger */
+};
+
+/*****************************************************************************
+ * NAND
+ ****************************************************************************/
+static struct mtd_partition partition_dove[] = {
+	{ .name		= "UBoot",
+	  .offset	= 0,
+	  .size		= 1 * SZ_1M },
+	{ .name		= "UImage",
+	  .offset	= MTDPART_OFS_APPEND,
+	  .size		= 4 * SZ_1M },
+	{ .name		= "Root",
+	  .offset	= MTDPART_OFS_APPEND,
+	  .size		= 2043 * SZ_1M },
+};
+static u64 nfc_dmamask = DMA_BIT_MASK(32);
+static struct nfc_platform_data dove_rd_nfc_data = {
+	.nfc_width	= 8,
+	.use_dma	= 1,
+	.use_ecc	= 1,
+	.use_bch	= 1,
+	.parts = partition_dove,
+	.nr_parts = ARRAY_SIZE(partition_dove)
+};
+
+static struct resource dove_nfc_resources[]  = {
+	[0] = {
+		.start	= (DOVE_NFC_PHYS_BASE),
+		.end	= (DOVE_NFC_PHYS_BASE + 0xFF),
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= IRQ_NAND,
+		.end	= IRQ_NAND,
+		.flags	= IORESOURCE_IRQ,
+	},
+	[2] = {
+		/* DATA DMA */
+		.start	= 97,
+		.end	= 97,
+		.flags	= IORESOURCE_DMA,
+	},
+	[3] = {
+		/* COMMAND DMA */
+		.start	= 99,
+		.end	= 99,
+		.flags	= IORESOURCE_DMA,
+	},
+};
+
+static struct platform_device dove_nfc = {
+	.name		= "orion-nfc",
+	.id		= -1,
+	.dev		= {
+		.dma_mask		= &nfc_dmamask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+		.platform_data		= &dove_rd_nfc_data,
+	},
+	.resource	= dove_nfc_resources,
+	.num_resources	= ARRAY_SIZE(dove_nfc_resources),
+};
+
+static void __init dove_rd_nfc_init(void)
+{
+	dove_rd_nfc_data.tclk = dove_tclk_get();
+	platform_device_register(&dove_nfc);
+}
+
+
+/*****************************************************************************
+ * MPP
+ ****************************************************************************/
+static struct dove_mpp_mode dove_rd_mpp_modes[] __initdata = {
+	{  1, MPP_PMU },		/* CPU power control */
+	{  3, MPP_PMU },		/* Wakeup - power button */
+	{  4, MPP_PMU },		/* CPU power good inication */
+	{  7, MPP_PMU }, 		/* Standby Led */
+	{ 10, MPP_PMU }, 		/* DVS SDI control */
+	{ 12, MPP_GPIO },
+	{ 13, MPP_GPIO },
+	{ 14, MPP_GPIO },
+	{ 15, MPP_GPIO },
+	{ 18, MPP_GPIO },
+//	{ 20, MPP_LCD0_SPI},
+//	{ 21, MPP_LCD0_SPI},
+//	{ 22, MPP_LCD0_SPI},
+//	{ 23, MPP_LCD0_SPI},
+	{ 24, MPP_CAM },		/* CAM Group */
+	{ 40, MPP_SDIO0 },		/* SDIO0 Group */
+	{ 46, MPP_SDIO1 },		/* SDIO1 Group */
+	{ 52, MPP_GPIO },		/* AU1 Group to GPIO */
+	{ -1 },
+};
+
+void __init dove_battery_init(void)
+{
+	platform_device_register_simple("bq2084-battery", 0, NULL, 0);
+}
+
+#ifdef CONFIG_PM
+/*****************************************************************************
+ * POWER MANAGEMENT
+ ****************************************************************************/
+static int __init dove_rd_pm_init(void)
+{
+	MV_PMU_INFO pmuInitInfo;	
+
+	if (!machine_is_dove_rd())
+		return 0;
+
+	pmuInitInfo.batFltMngDis = MV_FALSE;			/* Keep battery fault enabled */
+	pmuInitInfo.exitOnBatFltDis = MV_FALSE;			/* Keep exit from STANDBY on battery fail enabled */
+	pmuInitInfo.sigSelctor[0] = PMU_SIGNAL_NC;
+	pmuInitInfo.sigSelctor[1] = PMU_SIGNAL_CPU_PWRDWN;	/* DEEP-IdLE => 0: CPU off, 1: CPU on */
+	pmuInitInfo.sigSelctor[2] = PMU_SIGNAL_NC;		/* STANDBY => Not used in Z0 */
+	pmuInitInfo.sigSelctor[3] = PMU_SIGNAL_EXT0_WKUP;	/* power on push button */
+	pmuInitInfo.sigSelctor[4] = PMU_SIGNAL_CPU_PWRGOOD;	/* CORE power good used as Standby PG */
+	pmuInitInfo.sigSelctor[5] = PMU_SIGNAL_NC;		/* NON PMU in Z0 Board */
+	pmuInitInfo.sigSelctor[6] = PMU_SIGNAL_NC;		/* Charger interrupt - not used */
+	pmuInitInfo.sigSelctor[7] = PMU_SIGNAL_1;		/* Standby Led - inverted */
+	pmuInitInfo.sigSelctor[8] = PMU_SIGNAL_NC;		/* PM OFF Control - used as GPIO */
+	pmuInitInfo.sigSelctor[9] = PMU_SIGNAL_NC;		/* CPU power good  - not used */
+	pmuInitInfo.sigSelctor[10] = PMU_SIGNAL_SDI;		/* Voltage regulator control */
+	pmuInitInfo.sigSelctor[11] = PMU_SIGNAL_NC;
+	pmuInitInfo.sigSelctor[12] = PMU_SIGNAL_NC;
+	pmuInitInfo.sigSelctor[13] = PMU_SIGNAL_NC;
+	pmuInitInfo.sigSelctor[14] = PMU_SIGNAL_NC;
+	pmuInitInfo.sigSelctor[15] = PMU_SIGNAL_NC;
+	pmuInitInfo.dvsDelay = 0x4200;				/* ~100us in 166MHz cc - delay for DVS change */
+	pmuInitInfo.ddrTermGpioNum = -1;			/* No GPIO is used to disable terminations */
+
+	/* Initialize the PMU HAL */
+	if (mvPmuInit(&pmuInitInfo) != MV_OK)
+	{
+		printk(KERN_NOTICE "Failed to initialise the PMU!\n");
+		return 0;
+	}
+
+	/* Configure wakeup events */
+	mvPmuWakeupEventSet(PMU_STBY_WKUP_CTRL_EXT0_FALL | PMU_STBY_WKUP_CTRL_RTC_MASK);
+
+	/* Register the PM operation in the Linux stack */
+	dove_pm_register();
+
+	return 0;
+}
+
+__initcall(dove_rd_pm_init);
+#endif
+
+/*****************************************************************************
+ * Board Init
+ ****************************************************************************/
+static void __init dove_rd_init(void)
+{
+	/*
+	 * Basic Dove setup (needs to be called early).
+	 */
+	dove_init();
+
+	if (dove_fp_ts_gpio_setup() != 0)
+		return;
+
+	/*
+	 * Mux pins and GPIO pins setup
+	 */
+	dove_mpp_conf(dove_rd_mpp_modes);
+
+        /* the (SW1) button is for use as a "wakeup" button */
+//	dove_wakeup_button_setup(DOVE_RD_WAKEUP_GPIO);
+
+	/* card interrupt workaround using GPIOs */
+//	dove_sd_card_int_wa_setup(0);
+//	dove_sd_card_int_wa_setup(1);
+
+	/*
+	 * On-chip device registration
+	 */
+	dove_rtc_init();
+	pxa_init_dma_wins(&dove_mbus_dram_info);
+	pxa_init_dma(16);
+	dove_xor0_init();
+	dove_xor1_init();
+	dove_ehci0_init();
+	dove_ehci1_init();
+
+	/* ehci init functions access the usb port, only now it's safe to disable
+	 * all clocks
+	 */
+	ds_clks_disable_all(1, 1);
+
+#ifdef CONFIG_MV_ETHERNET
+	dove_mv_eth_init();
+#else
+	dove_ge00_init(&dove_rd_ge00_data);
+#endif
+	dove_sata_init(&dove_rd_sata_data);
+	dove_spi0_init(0);
+	dove_spi1_init(0);
+	/* uart1 is the debug port, register it first so it will be */
+	/* represented by device ttyS0, root filesystems usually expect the */
+	/* console to be on that device */
+	dove_uart1_init();
+	dove_uart0_init();
+	/* dove_uart2_init(); not in use (?) */
+	/* dove_uart3_init(); not in use (?) */
+	dove_i2c_init();
+	dove_i2c_exp_init(0);
+	dove_sdhci_cam_mbus_init();
+	dove_sdio0_init();
+	dove_sdio1_init();
+	dove_rd_nfc_init();
+	dove_i2s_init(0, &i2s0_data);
+
+	dove_cam_init(&dove_cafe_cam_data);
+	dove_lcd_spi_init();
+	dove_fp_clcd_init();
+	dove_vmeta_init();
+	dove_gpu_init();
+	dove_tact_init(&tact_dove_fp_data);
+	dove_cesa_init();
+	dove_hwmon_init();
+
+	/*
+	 * On-board device registration
+	 */
+
+	spi_register_board_info(dove_rd_spi_flash_info,
+				ARRAY_SIZE(dove_rd_spi_flash_info));
+	spi_register_board_info(dove_fp_spi_devs, dove_fp_spi_devs_num());
+	i2c_register_board_info(0, dove_rd_i2c_devs, ARRAY_SIZE(dove_rd_i2c_devs));
+	dove_battery_init();
+}
+
+MACHINE_START(DOVE_RD, "Marvell MV88F6781-RD Board")
+	.phys_io	= DOVE_SB_REGS_PHYS_BASE,
+	.io_pg_offst	= ((DOVE_SB_REGS_VIRT_BASE) >> 18) & 0xfffc,
+	.boot_params	= 0x00000100,
+	.init_machine	= dove_rd_init,
+	.map_io		= dove_map_io,
+	.init_irq	= dove_init_irq,
+	.timer		= &dove_timer,
+/* reserve memory for VMETA and GPU */
+	.fixup		= dove_tag_fixup_mem32,
+MACHINE_END
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/hwmon.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/hwmon.c
@@ -0,0 +1,356 @@
+/*
+ * hwmon-dove.c - temperature monitoring driver for Dove SoC
+ *
+ * Inspired from other hwmon drivers
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301 USA.
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/jiffies.h>
+#include <linux/hwmon.h>
+#include <linux/sysfs.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/err.h>
+#include <linux/list.h>
+#include <linux/platform_device.h>
+#include <linux/cpu.h>
+#include <asm/io.h>
+#include "pmu/mvPmuRegs.h"
+
+#define DOVE_OVERHEAT_TEMP	105000		/* milidegree Celsius */
+#define DOVE_OVERHEAT_DELAY	0x700
+#define DOVE_OVERCOOL_TEMP	10000		/* milidegree Celsius */
+#define	DOVE_OVERCOOL_DELAY	0x700
+#define DOVE_OVERHEAT_MIN	0
+#define DOVE_OVERHEAT_MAX	110000
+#define DOVE_OVERCOOL_MIN	0
+#define DOVE_OVERCOOL_MAX	110000
+
+/* Junction Temperature */
+#define DOVE_TSEN_TEMP2RAW(x)  ((2281638 - (10 * x)) / 7298)    /* in millCelsius */
+#define DOVE_TSEN_RAW2TEMP(x)  ((2281638 - (7298 * x)) / 10)	/* in miliCelsius */
+
+#define LABEL "T-junction"
+static struct device *hwmon_dev;
+unsigned int temp_min = DOVE_OVERCOOL_TEMP;
+unsigned int temp_max = DOVE_OVERHEAT_TEMP;
+
+typedef enum { 
+	SHOW_TEMP, 
+	TEMP_MAX,
+	TEMP_MIN,
+	SHOW_NAME,
+	SHOW_TYPE,
+	SHOW_LABEL } SHOW;
+
+static void dovetemp_set_thresholds(unsigned int max, unsigned int min)
+{
+	u32 temp, reg; 
+
+	/* Set the overheat threashold & delay */
+	temp = DOVE_TSEN_TEMP2RAW(max);
+	reg = readl(INTER_REGS_BASE | PMU_THERMAL_MNGR_REG);
+	reg &= ~PMU_TM_OVRHEAT_THRSH_MASK;
+	reg |= (temp << PMU_TM_OVRHEAT_THRSH_OFFS);
+	writel(reg, (INTER_REGS_BASE | PMU_THERMAL_MNGR_REG));
+
+	/* Set the overcool threshole & delay */
+	temp = DOVE_TSEN_TEMP2RAW(min);
+	reg = readl(INTER_REGS_BASE | PMU_THERMAL_MNGR_REG);
+	reg &= ~PMU_TM_COOL_THRSH_MASK;
+	reg |= (temp << PMU_TM_COOL_THRSH_OFFS);
+	writel(reg, (INTER_REGS_BASE | PMU_THERMAL_MNGR_REG));	
+}
+
+static int dovetemp_init_sensor(void)
+{
+	u32 reg;
+	u32 i;
+
+	/* Configure the Diode Control Register #0 */
+        reg = readl(INTER_REGS_BASE | PMU_TEMP_DIOD_CTRL0_REG);
+	/* Use average of 2 */
+	reg &= ~PMU_TDC0_AVG_NUM_MASK;
+	reg |= (0x1 << PMU_TDC0_AVG_NUM_OFFS);
+	/* Reference calibration value */
+	reg &= ~PMU_TDC0_REF_CAL_CNT_MASK;
+	reg |= (0x0F1 << PMU_TDC0_REF_CAL_CNT_OFFS);
+	/* Set the high level reference for calibration */
+	reg &= ~PMU_TDC0_SEL_VCAL_MASK;
+	reg |= (0x2 << PMU_TDC0_SEL_VCAL_OFFS);
+	writel(reg, (INTER_REGS_BASE | PMU_TEMP_DIOD_CTRL0_REG));
+
+	/* Reset the sensor */
+	reg = readl(INTER_REGS_BASE | PMU_TEMP_DIOD_CTRL0_REG);
+	writel((reg | PMU_TDC0_SW_RST_MASK), (INTER_REGS_BASE | PMU_TEMP_DIOD_CTRL0_REG));
+	writel(reg, (INTER_REGS_BASE | PMU_TEMP_DIOD_CTRL0_REG));	
+
+	/* Enable the sensor */
+	reg = readl(INTER_REGS_BASE | PMU_THERMAL_MNGR_REG);
+	reg &= ~PMU_TM_DISABLE_MASK;
+	writel(reg, (INTER_REGS_BASE | PMU_THERMAL_MNGR_REG));
+
+	/* Poll the sensor for the first reading */
+	for (i=0; i< 1000000; i++) {
+		reg = readl(INTER_REGS_BASE | PMU_THERMAL_MNGR_REG);
+		if (reg & PMU_TM_CURR_TEMP_MASK)
+			break;;
+	}
+
+	if (i== 1000000)
+		return -EIO;
+
+	/* Set thresholds */
+	dovetemp_set_thresholds(temp_max, temp_min);
+
+	/* Set delays */
+	writel(DOVE_OVERHEAT_DELAY, (INTER_REGS_BASE | PMU_TM_OVRHEAT_DLY_REG));	
+	writel(DOVE_OVERCOOL_DELAY, (INTER_REGS_BASE | PMU_TM_COOLING_DLY_REG));
+
+	return 0;
+}
+
+static int dovetemp_read_temp(void)
+{
+	u32 reg = 0;
+	u32 reg1 = 0;
+	u32 i;
+
+	/* Verify that the temperature is valid */
+	reg = readl(INTER_REGS_BASE | PMU_TEMP_DIOD_CTRL1_REG);
+	if ((reg & PMU_TDC1_TEMP_VLID_MASK) == 0x0)
+		return -EIO;
+
+	/*
+	 * Read the thermal sensor looking two successive readings that differ
+	 * in LSb only.
+	 */
+	for (i=0; i<16; i++) {
+		/* Read the raw temperature */
+		reg = readl(INTER_REGS_BASE | PMU_THERMAL_MNGR_REG);
+		reg &= PMU_TM_CURR_TEMP_MASK;
+		reg >>= PMU_TM_CURR_TEMP_OFFS;
+
+		if (((reg ^ reg1) & 0x1FE) == 0x0)
+			break;
+		/* save the current reading for the next iteration */
+		reg1 = reg;
+	}
+
+	if (i==16)
+		printk(KERN_WARNING "dove-hwmon: Thermal sensor is unstable!\n");
+	
+	/* Convert the temperature to Celsuis */
+	return DOVE_TSEN_RAW2TEMP(reg);
+}
+
+
+/*
+ * Sysfs stuff
+ */
+
+static ssize_t show_name(struct device *dev, struct device_attribute
+			  *devattr, char *buf) {
+	return sprintf(buf, "%s\n", "dove-hwmon");
+}
+
+static ssize_t show_alarm(struct device *dev, struct device_attribute
+			  *devattr, char *buf)
+{
+	int alarm = 0;
+	u32 reg;
+
+	reg = readl(INTER_REGS_BASE | PMU_INT_CAUSE_REG);
+	if (reg & PMU_INT_OVRHEAT_MASK)
+	{
+		alarm = 1;
+		writel ((reg & ~PMU_INT_OVRHEAT_MASK), (INTER_REGS_BASE | PMU_INT_CAUSE_REG));
+	}
+	else if (reg & PMU_INT_COOLING_MASK)
+	{
+		alarm = 2;
+		writel ((reg & ~PMU_INT_COOLING_MASK), (INTER_REGS_BASE | PMU_INT_CAUSE_REG));
+	}
+
+	return sprintf(buf, "%d\n", alarm);
+}
+
+static ssize_t show_info(struct device *dev,
+			 struct device_attribute *devattr, char *buf) {
+	int ret;
+	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+
+	if (attr->index == SHOW_TYPE)
+		ret = sprintf(buf, "%d\n", 3);
+	else if (attr->index == SHOW_LABEL)
+		ret = sprintf(buf, "%s\n", LABEL);
+	else
+		ret = sprintf(buf, "%d\n", -1);
+	return ret;
+}
+
+static ssize_t show_temp(struct device *dev,
+			 struct device_attribute *devattr, char *buf) {
+	int ret;
+	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+
+	if (attr->index == SHOW_TEMP)
+		ret = sprintf(buf, "%d\n", dovetemp_read_temp());
+	else if (attr->index == TEMP_MAX)
+		ret = sprintf(buf, "%d\n", temp_max);
+	else if (attr->index == TEMP_MIN)
+		ret = sprintf(buf, "%d\n", temp_min);
+	else
+		ret = sprintf(buf, "%d\n", -1);
+
+	return ret;
+}
+
+static ssize_t set_temp(struct device *dev, struct device_attribute *devattr,
+			 const char *buf, size_t count) {
+
+	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+	unsigned int temp;
+
+	if (sscanf(buf, "%d", &temp) != 1)
+		printk(KERN_WARNING "Invalid input string for temperature!");	
+
+	if (attr->index == TEMP_MAX) {
+		if((temp < DOVE_OVERHEAT_MIN) || (temp > DOVE_OVERHEAT_MAX))
+			printk(KERN_WARNING "Invalid max temperature input (out of range: %d-%d)!",
+				DOVE_OVERHEAT_MIN, DOVE_OVERHEAT_MAX);
+		else {
+			temp_max = temp;
+			dovetemp_set_thresholds(temp_max, temp_min);	
+		}
+	}
+	else if (attr->index == TEMP_MIN) {
+		if((temp < DOVE_OVERCOOL_MIN) || (temp > DOVE_OVERCOOL_MAX))
+			printk(KERN_WARNING "Invalid min temperature input (out of range: %d-%d)!",
+				DOVE_OVERCOOL_MIN, DOVE_OVERCOOL_MAX);
+		else {
+			temp_min = temp;
+			dovetemp_set_thresholds(temp_max, temp_min);
+		}
+	}
+	else
+		printk(KERN_ERR "dove-temp: Invalid sensor attribute!");
+
+	printk(KERN_INFO "set_temp got string: %d\n", temp);
+
+	return count;
+}
+
+/* TODO - Add read/write support in order to support setting max/min */
+static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO, show_info, NULL,
+			  SHOW_TYPE);
+static SENSOR_DEVICE_ATTR(temp1_label, S_IRUGO, show_info, NULL,
+			  SHOW_LABEL);
+static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL,
+			  SHOW_TEMP);
+static SENSOR_DEVICE_ATTR(temp1_max, S_IRWXUGO, show_temp, set_temp,
+			  TEMP_MAX);
+static SENSOR_DEVICE_ATTR(temp1_min, S_IRWXUGO, show_temp, set_temp,
+			  TEMP_MIN);
+static DEVICE_ATTR(temp1_crit_alarm, S_IRUGO, show_alarm, NULL);
+static SENSOR_DEVICE_ATTR(name, S_IRUGO, show_name, NULL, SHOW_NAME);
+
+static struct attribute *dovetemp_attributes[] = {
+	&sensor_dev_attr_name.dev_attr.attr,
+	&dev_attr_temp1_crit_alarm.attr,
+	&sensor_dev_attr_temp1_input.dev_attr.attr,
+	&sensor_dev_attr_temp1_max.dev_attr.attr,
+	&sensor_dev_attr_temp1_min.dev_attr.attr,
+	&sensor_dev_attr_temp1_type.dev_attr.attr,
+	&sensor_dev_attr_temp1_label.dev_attr.attr,
+	NULL
+};
+
+static const struct attribute_group dovetemp_group = {
+	.attrs = dovetemp_attributes,
+};
+
+static int __devinit dovetemp_probe(struct platform_device *pdev)
+{
+	int err;
+
+	err = dovetemp_init_sensor();
+	if (err)
+		goto exit;
+
+	err = sysfs_create_group(&pdev->dev.kobj, &dovetemp_group);
+	if (err)
+		goto exit;
+
+	hwmon_dev = hwmon_device_register(&pdev->dev);
+	if (IS_ERR(hwmon_dev)) {
+		dev_err(&pdev->dev, "Class registration failed (%d)\n",
+			err);
+		goto exit;
+	}
+
+	printk(KERN_INFO "Dove hwmon thermal sensor initialized.\n");
+
+	return 0;
+
+exit:
+	sysfs_remove_group(&pdev->dev.kobj, &dovetemp_group);
+	return err;
+}
+
+static int __devexit dovetemp_remove(struct platform_device *pdev)
+{
+	struct dovetemp_data *data = platform_get_drvdata(pdev);
+
+	hwmon_device_unregister(hwmon_dev);
+	sysfs_remove_group(&pdev->dev.kobj, &dovetemp_group);
+	platform_set_drvdata(pdev, NULL);
+	kfree(data);
+	return 0;
+}
+
+static int dovetemp_resume(struct platform_device *dev)
+{
+	return dovetemp_init_sensor();
+}
+
+static struct platform_driver dovetemp_driver = {
+	.driver = {
+		.owner = THIS_MODULE,
+		.name = "dove-temp",
+	},
+	.probe = dovetemp_probe,
+	.remove = __devexit_p(dovetemp_remove),
+	.resume = dovetemp_resume,
+};
+
+static int __init dovetemp_init(void)
+{
+	return platform_driver_register(&dovetemp_driver);
+}
+
+static void __exit dovetemp_exit(void)
+{
+	platform_driver_unregister(&dovetemp_driver);
+}
+
+MODULE_AUTHOR("Marvell Semiconductors");
+MODULE_DESCRIPTION("Marvell Dove SoC hwmon driver");
+MODULE_LICENSE("GPL");
+
+module_init(dovetemp_init)
+module_exit(dovetemp_exit)
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/irq.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/irq.c
@@ -0,0 +1,136 @@
+/*
+ * arch/arm/mach-dove/irq.c
+ *
+ * Dove IRQ handling.
+ *
+ * Author: Tzachi Perelstein <tzachi@marvell.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <asm/mach/arch.h>
+#include <asm/gpio.h>
+#include <asm/io.h>
+#include <plat/irq.h>
+#include <asm/mach/irq.h>
+#include <mach/pm.h>
+#include <mach/bridge-regs.h>
+#include "common.h"
+
+static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
+{
+	int irqoff;
+	BUG_ON(irq < IRQ_DOVE_GPIO_0_7 || irq > IRQ_DOVE_HIGH_GPIO);
+
+	irqoff = irq <= IRQ_DOVE_GPIO_16_23 ? irq - IRQ_DOVE_GPIO_0_7 :
+		3 + irq - IRQ_DOVE_GPIO_24_31;
+
+	orion_gpio_irq_handler(irqoff << 3);
+	if(irq == IRQ_DOVE_HIGH_GPIO) {
+		orion_gpio_irq_handler(40);
+		orion_gpio_irq_handler(48);
+		orion_gpio_irq_handler(56);
+	}
+}
+
+static void pmu_irq_mask(unsigned int irq)
+{
+	int pin = irq_to_pmu(irq);
+	u32 u;
+
+	u = readl(PMU_INTERRUPT_MASK);
+	u &= ~(1 << (pin & 31));
+	writel(u, PMU_INTERRUPT_MASK);
+}
+
+static void pmu_irq_unmask(unsigned int irq)
+{
+	int pin = irq_to_pmu(irq);
+	u32 u;
+
+	u = readl(PMU_INTERRUPT_MASK);
+	u |= 1 << (pin & 31);
+	writel(u, PMU_INTERRUPT_MASK);
+}
+
+static void pmu_irq_ack(unsigned int irq)
+{
+	int pin = irq_to_pmu(irq);
+	u32 u;
+
+	u = readl(PMU_INTERRUPT_CAUSE);
+	u &= ~(1 << (pin & 31));
+	writel(u, PMU_INTERRUPT_CAUSE);
+}
+
+static struct irq_chip pmu_irq_chip = {
+	.name		= "pmu_irq",
+        .mask		= pmu_irq_mask,
+        .unmask		= pmu_irq_unmask,
+        .ack		= pmu_irq_ack,
+};
+
+static void pmu_irq_handler(unsigned int irq, struct irq_desc *desc)
+{
+	unsigned long cause = readl(PMU_INTERRUPT_CAUSE);
+
+	cause &= readl(PMU_INTERRUPT_MASK);
+	if (cause == 0) {
+		do_bad_IRQ(irq, desc);
+		return;
+	}
+
+	for (irq = 0; irq < NR_PMU_IRQS; irq++) {
+		if(!(cause & (1 << irq)))
+			continue;
+		irq = pmu_to_irq(irq);
+		desc = irq_desc + irq;
+		desc_handle_irq(irq, desc);
+	}
+}
+
+void __init dove_init_irq(void)
+{
+	int i;
+
+	orion_irq_init(0, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF));
+	orion_irq_init(32, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF));
+
+	/*
+	 * Mask and clear GPIO IRQ interrupts.
+	 */
+	writel(0, GPIO_LEVEL_MASK(0));
+	writel(0, GPIO_EDGE_MASK(0));
+	writel(0, GPIO_EDGE_CAUSE(0));
+
+	/*
+	 * Mask and clear PMU interrupts
+	 */
+	writel(0, PMU_INTERRUPT_MASK);
+	writel(0, PMU_INTERRUPT_CAUSE);
+
+	for (i = IRQ_DOVE_GPIO_START; i < IRQ_DOVE_PMU_START; i++) {
+		set_irq_chip(i, &orion_gpio_irq_chip);
+		set_irq_handler(i, handle_level_irq);
+		irq_desc[i].status |= IRQ_LEVEL;
+		set_irq_flags(i, IRQF_VALID);
+	}
+	set_irq_chained_handler(IRQ_DOVE_GPIO_0_7, gpio_irq_handler);
+	set_irq_chained_handler(IRQ_DOVE_GPIO_8_15, gpio_irq_handler);
+	set_irq_chained_handler(IRQ_DOVE_GPIO_16_23, gpio_irq_handler);
+	set_irq_chained_handler(IRQ_DOVE_GPIO_24_31, gpio_irq_handler);
+	set_irq_chained_handler(IRQ_DOVE_HIGH_GPIO, gpio_irq_handler);
+
+	for (i = IRQ_DOVE_PMU_START; i < NR_IRQS; i++) {
+		set_irq_chip(i, &pmu_irq_chip);
+		set_irq_handler(i, handle_level_irq);
+		irq_desc[i].status |= IRQ_LEVEL;
+		set_irq_flags(i, IRQF_VALID);
+	}
+	set_irq_chained_handler(IRQ_DOVE_PMU, pmu_irq_handler);
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/dove-front-panel-common.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/dove-front-panel-common.h
@@ -0,0 +1,24 @@
+/*
+ * arch/arm/mach-dove/dove-front-panel-common.h
+ *
+ * Marvell Dove MV88F6781-RD/DB Board Setup for device on front panel
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+#ifndef __ARCH_DOVE_FRONT_PANEL_COMMON_H
+#define __ARCH_DOVE_FRONT_PANEL_COMMON_H
+extern struct gpio_mouse_platform_data tact_dove_fp_data;
+
+extern struct spi_board_info __initdata dove_fp_spi_devs[];
+
+extern struct cafe_cam_platform_data dove_cafe_cam_data;
+
+int __init dove_fp_spi_devs_num(void);
+
+int __init dove_fp_ts_gpio_setup(void);
+
+void __init dove_fp_clcd_init(void);
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/pcie.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/pcie.c
@@ -0,0 +1,336 @@
+/*
+ * arch/arm/mach-dove/pcie.c
+ *
+ * PCIe functions for Marvell Dove 88F6781 SoC
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/mbus.h>
+#include <linux/delay.h>
+#include <asm/mach/pci.h>
+#include <asm/mach/arch.h>
+#include <asm/setup.h>
+#include <plat/pcie.h>
+#include <mach/irqs.h>
+#include <mach/bridge-regs.h>
+#include "common.h"
+
+struct pcie_port {
+	u8			index;
+	u8			root_bus_nr;
+	void __iomem		*base;
+	spinlock_t		conf_lock;
+	char			io_space_name[16];
+	char			mem_space_name[16];
+	struct resource		res[2];
+};
+
+static struct pcie_port pcie_port[2];
+static int num_pcie_ports;
+
+static unsigned int noscan = 0;
+module_param(noscan, uint, 0);
+MODULE_PARM_DESC(noscan, "set to 1 to disable pci scan.");
+
+#define PCIE_BASE	((void __iomem *)DOVE_PCIE0_VIRT_BASE)
+
+#define PCIE_PHY_INDIRECT_ACCESS_REG	0x1B00
+#define  PCIE_PHY_INDIRECT_ACCESS_RD_FLAG	(1 << 31)
+#define  PCIE_PHY_INDIRECT_ACCESS_OFFSET	16
+
+void __init dove_pcie_id(u32 *dev, u32 *rev)
+{
+	*dev = orion_pcie_dev_id(PCIE_BASE);
+	*rev = orion_pcie_rev(PCIE_BASE);
+}
+
+/*
+ * Optimal setting for PCIe clocks current drive - 13.5mA
+ */
+static void dove_pcie_clk_out_config(int nr)
+{
+	u32 reg = readl(DOVE_PCIE_PORT_CONTROL);
+	reg |= 3 << (nr * 2);
+	writel(reg, DOVE_PCIE_PORT_CONTROL);
+}
+
+static void dove_pcie_tune_phy(void __iomem *base)
+{
+	u32 reg;
+	/* request read access of register 0x92 */
+	writel(PCIE_PHY_INDIRECT_ACCESS_RD_FLAG|
+	       0x92 << PCIE_PHY_INDIRECT_ACCESS_OFFSET
+	       , base + PCIE_PHY_INDIRECT_ACCESS_REG);
+	reg = readl(base + PCIE_PHY_INDIRECT_ACCESS_REG);
+	/* set bit 7:0 to 0x8B */
+	reg &= ~0xFF;
+	reg |= 0x8B;
+	/* clear the read flag */
+	reg &= ~PCIE_PHY_INDIRECT_ACCESS_RD_FLAG;
+	writel(reg, base + PCIE_PHY_INDIRECT_ACCESS_REG);
+}
+static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys)
+{
+	struct pcie_port *pp;
+
+	if (nr >= num_pcie_ports)
+		return 0;
+
+	pp = &pcie_port[nr];
+	pp->root_bus_nr = sys->busnr;
+
+	/* dove specific clock settings */
+	dove_pcie_clk_out_config(nr);
+
+	/* dove specific phy settings */
+	dove_pcie_tune_phy(pp->base);
+
+	/*
+	 * Generic PCIe unit setup.
+	 */
+	orion_pcie_set_local_bus_nr(pp->base, sys->busnr);
+#ifdef CONFIG_MV_HAL_DRIVERS_SUPPORT
+	orion_pcie_setup(pp->base, NULL);
+#else
+	orion_pcie_setup(pp->base, &dove_mbus_dram_info);
+#endif
+
+	/*
+	 * IORESOURCE_IO
+	 */
+	snprintf(pp->io_space_name, sizeof(pp->io_space_name),
+		 "PCIe %d I/O", pp->index);
+	pp->io_space_name[sizeof(pp->io_space_name) - 1] = 0;
+	pp->res[0].name = pp->io_space_name;
+	if (pp->index == 0) {
+		pp->res[0].start = DOVE_PCIE0_IO_BUS_BASE;
+		pp->res[0].end = pp->res[0].start + DOVE_PCIE0_IO_SIZE - 1;
+	} else {
+		pp->res[0].start = DOVE_PCIE1_IO_BUS_BASE;
+		pp->res[0].end = pp->res[0].start + DOVE_PCIE1_IO_SIZE - 1;
+	}
+	pp->res[0].flags = IORESOURCE_IO;
+	if (request_resource(&ioport_resource, &pp->res[0]))
+		panic("Request PCIe IO resource failed\n");
+	sys->resource[0] = &pp->res[0];
+
+	/*
+	 * IORESOURCE_MEM
+	 */
+	snprintf(pp->mem_space_name, sizeof(pp->mem_space_name),
+		 "PCIe %d MEM", pp->index);
+	pp->mem_space_name[sizeof(pp->mem_space_name) - 1] = 0;
+	pp->res[1].name = pp->mem_space_name;
+	if (pp->index == 0) {
+		pp->res[1].start = DOVE_PCIE0_MEM_PHYS_BASE;
+		pp->res[1].end = pp->res[1].start + DOVE_PCIE0_MEM_SIZE - 1;
+	} else {
+		pp->res[1].start = DOVE_PCIE1_MEM_PHYS_BASE;
+		pp->res[1].end = pp->res[1].start + DOVE_PCIE1_MEM_SIZE - 1;
+	}
+	pp->res[1].flags = IORESOURCE_MEM;
+	if (request_resource(&iomem_resource, &pp->res[1]))
+		panic("Request PCIe Memory resource failed\n");
+	sys->resource[1] = &pp->res[1];
+
+	sys->resource[2] = NULL;
+
+	return 1;
+}
+
+static struct pcie_port *bus_to_port(int bus)
+{
+	int i;
+
+	for (i = num_pcie_ports - 1; i >= 0; i--) {
+		int rbus = pcie_port[i].root_bus_nr;
+		if (rbus != -1 && rbus <= bus)
+			break;
+	}
+
+	return i >= 0 ? pcie_port + i : NULL;
+}
+
+static int pcie_valid_config(struct pcie_port *pp, int bus, int dev)
+{
+	/*
+	 * Don't go out when trying to access nonexisting devices
+	 * on the local bus.
+	 */
+	if (bus == pp->root_bus_nr && dev > 1)
+		return 0;
+
+	return 1;
+}
+
+static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where,
+			int size, u32 *val)
+{
+	struct pcie_port *pp = bus_to_port(bus->number);
+	unsigned long flags;
+	int ret;
+
+	if (noscan)
+		return PCIBIOS_DEVICE_NOT_FOUND;
+
+	if (pcie_valid_config(pp, bus->number, PCI_SLOT(devfn)) == 0) {
+		*val = 0xffffffff;
+		return PCIBIOS_DEVICE_NOT_FOUND;
+	}
+
+	spin_lock_irqsave(&pp->conf_lock, flags);
+	ret = orion_pcie_rd_conf(pp->base, bus, devfn, where, size, val);
+	spin_unlock_irqrestore(&pp->conf_lock, flags);
+
+	return ret;
+}
+
+static int pcie_wr_conf(struct pci_bus *bus, u32 devfn,
+			int where, int size, u32 val)
+{
+	struct pcie_port *pp = bus_to_port(bus->number);
+	unsigned long flags;
+	int ret;
+
+	if (pcie_valid_config(pp, bus->number, PCI_SLOT(devfn)) == 0)
+		return PCIBIOS_DEVICE_NOT_FOUND;
+
+	spin_lock_irqsave(&pp->conf_lock, flags);
+	ret = orion_pcie_wr_conf(pp->base, bus, devfn, where, size, val);
+	spin_unlock_irqrestore(&pp->conf_lock, flags);
+
+	return ret;
+}
+
+static struct pci_ops pcie_ops = {
+	.read = pcie_rd_conf,
+	.write = pcie_wr_conf,
+};
+
+static void __devinit rc_pci_fixup(struct pci_dev *dev)
+{
+	/*
+	 * Prevent enumeration of root complex.
+	 */
+	if (dev->bus->parent == NULL && dev->devfn == 0) {
+		int i;
+
+		for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
+			dev->resource[i].start = 0;
+			dev->resource[i].end   = 0;
+			dev->resource[i].flags = 0;
+		}
+	}
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL, PCI_ANY_ID, rc_pci_fixup);
+
+static struct pci_bus __init *
+dove_pcie_scan_bus(int nr, struct pci_sys_data *sys)
+{
+	struct pci_bus *bus;
+
+	if (nr < num_pcie_ports) {
+		bus = pci_scan_bus(sys->busnr, &pcie_ops, sys);
+	} else {
+		bus = NULL;
+		BUG();
+	}
+
+	return bus;
+}
+
+static int __init dove_pcie_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+{
+	struct pcie_port *pp = bus_to_port(dev->bus->number);
+     
+	return pp->index ? IRQ_DOVE_PCIE1 : IRQ_DOVE_PCIE0;
+}
+
+static struct hw_pci dove_pci __initdata = {
+	.nr_controllers	= 2,
+	.swizzle	= pci_std_swizzle,
+	.setup		= dove_pcie_setup,
+	.scan		= dove_pcie_scan_bus,
+	.map_irq	= dove_pcie_map_irq,
+};
+
+static void __init add_pcie_port(int index, unsigned long base)
+{
+	printk(KERN_INFO "Dove PCIe port %d: ", index);
+
+	if (orion_pcie_link_up((void __iomem *)base)) {
+		struct pcie_port *pp = &pcie_port[num_pcie_ports++];
+
+		printk("link up\n");
+
+		pp->index = index;
+		pp->root_bus_nr = -1;
+		pp->base = (void __iomem *)base;
+		spin_lock_init(&pp->conf_lock);
+		memset(pp->res, 0, sizeof(pp->res));
+	} else {
+		printk("link down, ignoring\n");
+	}
+}
+
+void __init dove_pcie_init(int init_port0, int init_port1)
+{
+	if (init_port0)
+		add_pcie_port(0, DOVE_PCIE0_VIRT_BASE);
+
+	if (init_port1)
+		add_pcie_port(1, DOVE_PCIE1_VIRT_BASE);
+
+	pci_common_init(&dove_pci);
+}
+
+#ifdef CONFIG_PM
+void dove_save_pcie_regs(void)
+{
+
+}
+
+void dove_restore_pcie_regs(void)
+{
+	u32 i;
+	u32 timeout = 50;
+	u32 reg;
+
+	/* Configure PCIE ports */
+	for (i = 0; i<num_pcie_ports; i++)
+	{
+		orion_pcie_set_local_bus_nr(pcie_port[i].base, pcie_port[i].root_bus_nr);
+		orion_pcie_setup(pcie_port[i].base, &dove_mbus_dram_info);
+		dove_pcie_clk_out_config(i);
+		dove_pcie_tune_phy(pcie_port[i].base);
+	}
+
+	/* Enable Link on both ports */
+	reg = readl(CPU_CONTROL);
+	reg &= ~(CPU_CTRL_PCIE0_LINK | CPU_CTRL_PCIE1_LINK);
+	writel(reg, CPU_CONTROL);
+
+	/*
+	 * Loop waiting for link up on the phy of the ports.
+	 */
+
+	do {
+		int i;
+		int links_ready = 1;
+
+		for (i = 0; i < num_pcie_ports; i++)
+			if (!orion_pcie_link_up(pcie_port[i].base))
+				links_ready = 0;
+
+		if (links_ready)
+			break;
+
+		mdelay(1);
+	} while (timeout--);
+}
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/pm.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/pm.c
@@ -0,0 +1,895 @@
+/*
+ * pm.c
+ *
+ * Power Management functions for Marvell Dove System On Chip
+ *
+ * Maintainer: Tawfik Bayouk <tawfik@marvell.com>
+ *
+ * This file is licensed under  the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#undef DEBUG
+
+#include <linux/module.h>
+#include <linux/sysfs.h>
+#include <linux/proc_fs.h>
+#include <linux/interrupt.h>
+#include <linux/suspend.h>
+#include <linux/interrupt.h>
+#include <linux/fb.h>
+#include <asm/hardware/cache-tauros2.h>
+#include <asm/mach/arch.h>
+#include <asm-arm/vfp.h>
+#include "mvOs.h"
+#include "pmu/mvPmu.h"
+#include "pmu/mvPmuRegs.h"
+#include "gpp/mvGppRegs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "ctrlEnv/sys/mvCpuIfRegs.h"
+#include "common.h"
+#include "mpp.h"
+#include "twsi.h"
+#define CONFIG_PMU_PROC
+
+/*
+ * Global holding the target PM state
+ * This should be replaced by the PMU flag register
+ */
+static suspend_state_t dove_target_pm_state = PM_SUSPEND_ON;
+
+/* manage generic interface for list of registers to save & restore */
+static LIST_HEAD(registers_list);
+static DEFINE_MUTEX(registers_mutex);
+
+struct regs_entry {
+	struct list_head	node;
+	union {
+		u32		*regs_addresses;
+		u32		reg_address;
+	};
+	union {      
+		u32		*regs_values;
+		u32		reg_value;
+	};
+	int		count;
+	int		single;
+};
+
+enum pm_action_type {
+	SAVE,
+	RESTORE
+};
+static int __pm_registers_add(u32 *registers, int count, int single)
+{
+	struct regs_entry *entry;
+	
+	if (!count)
+		return 0;
+
+	entry = kzalloc(sizeof(struct regs_entry), GFP_KERNEL);
+	if (!entry)
+		return -ENOMEM;
+	
+	if (single)
+		entry->reg_address = *registers;
+	else
+		entry->regs_addresses = registers;
+
+	entry->count = count;
+	entry->single = single;
+	
+	if (!single) {
+		entry->regs_values = kmalloc(sizeof(u32) * count, GFP_KERNEL);
+		if (!entry->regs_values) {
+			kfree(entry);
+			return -ENOMEM;
+		}
+	}
+
+	mutex_lock(&registers_mutex);
+	list_add_tail(&entry->node, &registers_list);
+	mutex_unlock(&registers_mutex);
+
+	return 0;
+}
+
+int pm_registers_add(u32 *registers, int count)
+{
+	return __pm_registers_add(registers, count, 0);
+}
+
+int pm_registers_add_single(u32 register_address)
+{
+	return __pm_registers_add(&register_address, 1, 1);
+}
+
+static void pm_registers_action(enum pm_action_type type)
+{
+	struct regs_entry *p;
+	
+	list_for_each_entry(p, &registers_list, node) {
+		int i;
+		if (p->single) {
+			if (type == SAVE)
+                                p->reg_value = readl(p->reg_address);
+                        else
+                                writel(p->reg_value, p->reg_address);
+		} 
+		else 
+			for (i = 0; i < p->count; i++)
+				if (type == SAVE)
+					p->regs_values[i] = readl(p->regs_addresses[i]);
+				else
+					writel(p->regs_values[i], p->regs_addresses[i]);
+	}
+}
+
+#ifdef CONFIG_PMU_PROC
+extern MV_STATUS mvPmuDvs (MV_U32 pSet, MV_U32 vSet, MV_U32 rAddr, MV_U32 sAddr);
+extern MV_STATUS mvPmuCpuFreqScale (MV_PMU_CPU_SPEED cpuSpeed);
+void dove_pm_cpuidle_deepidle (void);
+int pmu_proc_write(struct file *file, const char *buffer,unsigned long count,
+		     void *data)
+{
+	int len = 0;
+	char *str;
+	unsigned long ints;
+	unsigned int mc, mc2;
+	int dummy;
+	MV_U32 reg;
+	MV_STATUS stat;
+
+	str = "dvs ";
+	if(!strncmp(buffer+len, str,strlen(str))) {
+		len += strlen(str);
+		str = "+10";
+		if(!strncmp(buffer+len, str,strlen(str))) {
+			if (mvPmuDvs(15, 0x8, 0x2, 0x5) != MV_OK)
+				printk(">>>>>>>>>>>>> FAILED\n");
+		}
+		str = "+7.5";
+		if(!strncmp(buffer+len, str,strlen(str))) {
+			if (mvPmuDvs(14, 0x8, 0x2, 0x5) != MV_OK)
+				printk(">>>>>>>>>>>>> FAILED\n");
+		}
+		str = "+5";
+		if(!strncmp(buffer+len, str,strlen(str))) {
+			if (mvPmuDvs(13, 0x8, 0x2, 0x5) != MV_OK)
+				printk(">>>>>>>>>>>>> FAILED\n");
+		}
+		str = "+2.5";
+		if(!strncmp(buffer+len, str,strlen(str))) {
+			if (mvPmuDvs(12, 0x8, 0x2, 0x5) != MV_OK)
+				printk(">>>>>>>>>>>>> FAILED\n");
+		}
+		str = "0";
+		if(!strncmp(buffer+len, str,strlen(str))) {
+			if (mvPmuDvs(0, 0, 0x2, 0x5) != MV_OK)
+				printk(">>>>>>>>>>>>> FAILED\n");
+		}
+		str = "-2.5";
+		if(!strncmp(buffer+len, str,strlen(str))) {
+			if (mvPmuDvs(11, 0x8, 0x2, 0x5) != MV_OK)
+				printk(">>>>>>>>>>>>> FAILED\n");
+		}
+		str = "-5";
+		if(!strncmp(buffer+len, str,strlen(str))) {
+			if (mvPmuDvs(10, 0x8, 0x2, 0x5) != MV_OK)
+				printk(">>>>>>>>>>>>> FAILED\n");
+		}
+		str = "-7.5";
+		if(!strncmp(buffer+len, str,strlen(str))) {
+			if (mvPmuDvs(9, 0x8, 0x2, 0x5) != MV_OK)
+				printk(">>>>>>>>>>>>> FAILED\n");
+		}
+		str = "-10";
+		if(!strncmp(buffer+len, str,strlen(str))) {
+			if (mvPmuDvs(8, 0x8, 0x2, 0x5) != MV_OK)
+				printk(">>>>>>>>>>>>> FAILED\n");
+		}
+		str = "1.2";
+		if(!strncmp(buffer+len, str,strlen(str))) {
+			if (mvPmuDvs(0, 0x9, 0x2, 0x5) != MV_OK)
+				printk(">>>>>>>>>>>>> FAILED\n");
+		}
+		str = "1.0";
+		if(!strncmp(buffer+len, str,strlen(str))) {
+			if (mvPmuDvs(0, 0x8, 0x2, 0x5) != MV_OK)
+				printk(">>>>>>>>>>>>> FAILED\n");
+		}
+
+		goto done;
+	}
+
+	str = "cpudfs ";
+	if(!strncmp(buffer+len, str,strlen(str))) {
+		len += strlen(str);
+		str = "turbo";
+		if(!strncmp(buffer+len, str,strlen(str))) {
+			len += strlen(str);
+			printk("Set CPU Frequency to TURBO");			
+
+			local_irq_save(ints);
+			mc = MV_REG_READ(CPU_MAIN_IRQ_MASK_HIGH_REG);
+			MV_REG_WRITE(CPU_MAIN_IRQ_MASK_HIGH_REG, (mc | 0x2));	/* enable PMU interrupts if not already enabled */
+			stat = mvPmuCpuFreqScale (CPU_CLOCK_TURBO);
+			MV_REG_WRITE(CPU_MAIN_IRQ_MASK_HIGH_REG, mc);
+			local_irq_restore(ints);			
+
+			if (stat != MV_OK)
+				printk(">E\n");
+			else
+				printk("\n");
+			
+			
+			goto done;
+		}
+		str = "ddr";
+		if(!strncmp(buffer+len, str,strlen(str))) {
+			len += strlen(str);
+			printk("Set CPU Frequency to DDR");
+			
+			local_irq_save(ints);
+			mc = MV_REG_READ(CPU_MAIN_IRQ_MASK_HIGH_REG);
+			MV_REG_WRITE(CPU_MAIN_IRQ_MASK_HIGH_REG, (mc | 0x2));
+			stat = mvPmuCpuFreqScale (CPU_CLOCK_SLOW);
+			MV_REG_WRITE(CPU_MAIN_IRQ_MASK_HIGH_REG, mc);
+			local_irq_restore(ints);
+
+			if (stat != MV_OK)
+				printk(">E\n");
+			else
+				printk("\n");
+						
+			goto done;
+		}
+		goto done;
+	}
+
+	str = "sysdfs ";
+	if(!strncmp(buffer+len, str,strlen(str))) {
+		MV_U32 cpuFreq, l2Freq, ddrFreq;
+
+		len += strlen(str);
+		sscanf (buffer+len, "%d %d %d", &cpuFreq, &l2Freq, &ddrFreq);
+
+		printk("Set New System Frequencies to CPU %dMhz, L2 %dMhz, DDR %dMhz", cpuFreq, l2Freq, ddrFreq);
+		local_irq_save(ints);
+		mc = MV_REG_READ(CPU_MAIN_IRQ_MASK_HIGH_REG);
+		MV_REG_WRITE(CPU_MAIN_IRQ_MASK_HIGH_REG, (mc | 0x2));	/* PMU Interrupt Enable */
+		if (mvPmuSysFreqScale (ddrFreq, l2Freq, cpuFreq) != MV_OK)
+			printk(">>>>>> FAILED\n");
+		else
+			printk("\n");
+		MV_REG_WRITE(CPU_MAIN_IRQ_MASK_HIGH_REG, mc);
+		local_irq_restore(ints);
+		goto done;
+	}
+
+	str = "deepidle_block";
+	if(!strncmp(buffer+len, str,strlen(str))) {
+		printk("Enter DeepIdle mode ");
+		mc = MV_REG_READ(CPU_MAIN_IRQ_MASK_REG);
+		mc2 = MV_REG_READ(CPU_MAIN_IRQ_MASK_HIGH_REG);
+		MV_REG_WRITE(CPU_MAIN_IRQ_MASK_REG, 0x80); /* disable all interrupts except UART0 */
+		MV_REG_WRITE(CPU_MAIN_IRQ_MASK_HIGH_REG, 0x0);
+		dove_pm_cpuidle_deepidle();
+		MV_REG_WRITE(CPU_MAIN_IRQ_MASK_REG, mc);
+		MV_REG_WRITE(CPU_MAIN_IRQ_MASK_HIGH_REG, mc2);
+		goto done;
+	}        	
+
+	str = "deepidle";
+	if(!strncmp(buffer+len, str,strlen(str))) {
+		local_irq_save(ints);
+		dove_pm_cpuidle_deepidle();
+		local_irq_restore(ints);
+		goto done;
+	}
+
+	str = "standby";
+	if(!strncmp(buffer+len, str,strlen(str))) {
+		printk("Enter Standby mode ");
+
+		if (mvPmuStandby() != MV_OK)
+			printk(">>>>>> FAILED\n");
+		else
+			printk("\n");
+		goto done;
+	}
+
+	str = "wfi_block";
+	if(!strncmp(buffer+len, str,strlen(str))) {
+		printk("Enter WFI mode ");
+		mc = MV_REG_READ(CPU_MAIN_IRQ_MASK_REG);
+		mc2 = MV_REG_READ(CPU_MAIN_IRQ_MASK_HIGH_REG);
+		MV_REG_WRITE(CPU_MAIN_IRQ_MASK_REG, 0x80); /* disable all interrupts except UART0 */
+		MV_REG_WRITE(CPU_MAIN_IRQ_MASK_HIGH_REG, 0x0);		
+
+#ifdef CONFIG_DOVE_DEBUGGER_MODE_V6
+		__asm__ __volatile__("mcr p15, 0, %0, c7, c0, 4\n" : "=r" (dummy));
+#else
+		__asm__ __volatile__("wfi\n");
+#endif
+		MV_REG_WRITE(CPU_MAIN_IRQ_MASK_REG, mc);
+		MV_REG_WRITE(CPU_MAIN_IRQ_MASK_HIGH_REG, mc2);
+		goto done;
+	}
+
+	str = "block";
+	if(!strncmp(buffer+len, str,strlen(str))) {
+		mc = MV_REG_READ(CPU_MAIN_IRQ_MASK_REG);
+		mc2 = MV_REG_READ(CPU_MAIN_IRQ_MASK_HIGH_REG);
+		MV_REG_WRITE(CPU_MAIN_IRQ_MASK_REG, 0x0);
+		MV_REG_WRITE(CPU_MAIN_IRQ_MASK_HIGH_REG, 0x0);
+		while(1);
+		goto done;
+	}
+
+	str = "dvfs ";
+	if(!strncmp(buffer+len, str,strlen(str))) {
+		len += strlen(str);
+		str = "hi";
+		if(!strncmp(buffer+len, str,strlen(str))) {
+			len += strlen(str);
+			printk("Going to hi gear (CPU=TURBO, V=1.10) ");
+			/* Upscale Voltage +10% */
+			if (mvPmuDvs(15, 0x8, 0x2, 0x5) != MV_OK)
+				printk("Volatge up-scaling failed\n");
+
+			/* Upscale frequency */
+			local_irq_save(ints);
+			mc = MV_REG_READ(CPU_MAIN_INT_CAUSE_HIGH_REG);
+			MV_REG_WRITE(CPU_MAIN_IRQ_MASK_HIGH_REG, (mc | 0x2));
+			if (mvPmuCpuFreqScale (CPU_CLOCK_TURBO) != MV_OK)
+				printk(">>>>>> FAILED\n");
+			else
+				printk("\n");
+			MV_REG_WRITE(CPU_MAIN_IRQ_MASK_HIGH_REG, mc);
+			local_irq_restore(ints);
+			goto done;
+		}
+		str = "lo";
+		if(!strncmp(buffer+len, str,strlen(str))) {
+			len += strlen(str);
+			printk("Going to low gear (CPU=DDR, V=0.975) ");
+			/* Downscale frequency */
+			local_irq_save(ints);
+			mc = MV_REG_READ(CPU_MAIN_INT_CAUSE_HIGH_REG);
+			MV_REG_WRITE(CPU_MAIN_IRQ_MASK_HIGH_REG, (mc | 0x2));
+			if (mvPmuCpuFreqScale (CPU_CLOCK_SLOW) != MV_OK)
+				printk(">>>>>> FAILED\n");
+			else
+				printk("\n");
+			MV_REG_WRITE(CPU_MAIN_IRQ_MASK_HIGH_REG, mc);
+			local_irq_restore(ints);
+
+			/* Downscale Voltage -2.5% */
+			if (mvPmuDvs(11, 0x8, 0x2, 0x5) != MV_OK)
+				printk("Volatge down-scaling failed\n");
+			goto done;
+		}
+		goto done;
+	}
+
+	str = "units ";
+	if(!strncmp(buffer+len, str,strlen(str))) {
+		len += strlen(str);
+		str = "off";
+		if(!strncmp(buffer+len, str,strlen(str))) {
+			MV_U32 units_reg;			
+			len += strlen(str);
+
+			printk("Units Disabled: SATA, NAND, CAM, AUD0, AUD1, CESA, PDMA, XOR0, XOR1\n");
+			/* Unit clock gating */
+			units_reg = MV_REG_READ(0xD0038);
+			units_reg &= ~0x01C0BC08;
+			MV_REG_WRITE(0xD0038, units_reg);
+
+			goto done;
+		}
+		str = "on";
+		if (!strncmp(buffer+len, str, strlen(str))) {
+			MV_U32 units_reg;
+			len += strlen(str);
+
+			printk(KERN_INFO "Units Enabled: SATA, NAND, CAM, AUD0, AUD1, CESA, PDMA, XOR0, XOR1\n");
+			/* Unit clock gating */
+			units_reg = MV_REG_READ(0xD0038);
+			units_reg |= 0x01C0BC08;
+			MV_REG_WRITE(0xD0038, units_reg);
+			goto done;
+		}
+		goto done;
+	}
+
+	str = "vpu ";
+	if(!strncmp(buffer+len, str,strlen(str))) {
+		len += strlen(str);
+		str = "off";
+		if(!strncmp(buffer+len, str,strlen(str))) {
+			len += strlen(str);
+			printk("Setting VPU power OFF.\n");
+			/* enable isolators */
+			reg = MV_REG_READ(PMU_ISO_CTRL_REG);
+			reg &= ~PMU_ISO_VIDEO_MASK;
+			MV_REG_WRITE(PMU_ISO_CTRL_REG, reg);
+			/* reset unit */
+			reg = MV_REG_READ(PMU_SW_RST_CTRL_REG);
+			reg &= ~PMU_SW_RST_VIDEO_MASK;
+			MV_REG_WRITE(PMU_SW_RST_CTRL_REG, reg);
+			/* power off */
+			reg = MV_REG_READ(PMU_PWR_SUPLY_CTRL_REG);
+			reg |= PMU_PWR_VPU_PWR_DWN_MASK;
+			MV_REG_WRITE(PMU_PWR_SUPLY_CTRL_REG, reg);
+			goto done;
+		}
+		str = "on";
+		if(!strncmp(buffer+len, str,strlen(str))) {
+			len += strlen(str);
+			printk("Setting VPU power ON.\n");
+			/* power on */
+			reg = MV_REG_READ(PMU_PWR_SUPLY_CTRL_REG);
+			reg &= ~PMU_PWR_VPU_PWR_DWN_MASK;
+			MV_REG_WRITE(PMU_PWR_SUPLY_CTRL_REG, reg);
+			/* un-reset unit */
+			reg = MV_REG_READ(PMU_SW_RST_CTRL_REG);
+			reg |= PMU_SW_RST_VIDEO_MASK;
+			MV_REG_WRITE(PMU_SW_RST_CTRL_REG, reg);
+			/* disable isolators */
+			reg = MV_REG_READ(PMU_ISO_CTRL_REG);
+			reg |= PMU_ISO_VIDEO_MASK;
+			MV_REG_WRITE(PMU_ISO_CTRL_REG, reg);
+			goto done;
+		}
+		goto done;
+	}
+
+	str = "gpu ";
+	if(!strncmp(buffer+len, str,strlen(str))) {
+		len += strlen(str);
+		str = "off";
+		if(!strncmp(buffer+len, str,strlen(str))) {
+			len += strlen(str);
+			printk("Setting GPU power OFF.\n");
+			/* enable isolators */
+			reg = MV_REG_READ(PMU_ISO_CTRL_REG);
+			reg &= ~PMU_ISO_GPU_MASK;
+			MV_REG_WRITE(PMU_ISO_CTRL_REG, reg);
+			/* reset unit */
+			reg = MV_REG_READ(PMU_SW_RST_CTRL_REG);
+			reg &= ~PMU_SW_RST_GPU_MASK;
+			MV_REG_WRITE(PMU_SW_RST_CTRL_REG, reg);
+			/* power off */
+			reg = MV_REG_READ(PMU_PWR_SUPLY_CTRL_REG);
+			reg |= PMU_PWR_GPU_PWR_DWN_MASK;
+			MV_REG_WRITE(PMU_PWR_SUPLY_CTRL_REG, reg);
+			goto done;
+		}
+		str = "on";
+		if(!strncmp(buffer+len, str,strlen(str))) {
+			len += strlen(str);
+			printk("Setting GPU power ON.\n");
+			/* power on */
+			reg = MV_REG_READ(PMU_PWR_SUPLY_CTRL_REG);
+			reg &= ~PMU_PWR_GPU_PWR_DWN_MASK;
+			MV_REG_WRITE(PMU_PWR_SUPLY_CTRL_REG, reg);
+			/* un-reset unit */
+			reg = MV_REG_READ(PMU_SW_RST_CTRL_REG);
+			reg |= PMU_SW_RST_GPU_MASK;
+			MV_REG_WRITE(PMU_SW_RST_CTRL_REG, reg);
+			/* disable isolators */
+			reg = MV_REG_READ(PMU_ISO_CTRL_REG);
+			reg |= PMU_ISO_GPU_MASK;
+			MV_REG_WRITE(PMU_ISO_CTRL_REG, reg);
+			goto done;
+		}
+		goto done;
+	}
+
+	str = "lcd ";
+	if(!strncmp(buffer+len, str,strlen(str))) {
+		len += strlen(str);
+		str = "off";
+		if(!strncmp(buffer+len, str,strlen(str))) {
+			len += strlen(str);
+			printk("HW doesn't support LCD power OFF.\n");
+			goto done;
+		}
+		str = "on";
+		if(!strncmp(buffer+len, str,strlen(str))) {
+			len += strlen(str);
+			printk("HW doesn't support LCD power ON.\n");
+			goto done;
+		}
+		goto done;
+	}
+
+	str = "wlan ";
+	if(!strncmp(buffer+len, str,strlen(str))) {
+		len += strlen(str);
+		str = "off";
+		if(!strncmp(buffer+len, str,strlen(str))) {
+			len += strlen(str);
+			printk("Setting WLAN SC in low power.\n");
+			/* Set level */
+			reg = MV_REG_READ(GPP_DATA_OUT_REG(0));
+			reg &= ~0x10;
+			MV_REG_WRITE(GPP_DATA_OUT_REG(0), reg);
+			/* verify pin is output */
+			reg = MV_REG_READ(GPP_DATA_OUT_EN_REG(0));
+			reg &= ~0x10;
+			MV_REG_WRITE(GPP_DATA_OUT_EN_REG(0), reg);
+			goto done;
+		}
+		str = "on";
+		if(!strncmp(buffer+len, str,strlen(str))) {
+			len += strlen(str);
+			printk("Setting WLAN SC out of low power.\n");
+			/* Set level */
+			reg = MV_REG_READ(GPP_DATA_OUT_REG(0));
+			reg |= 0x10;
+			MV_REG_WRITE(GPP_DATA_OUT_REG(0), reg);
+			/* verify pin is output */
+			reg = MV_REG_READ(GPP_DATA_OUT_EN_REG(0));
+			reg &= ~0x10;
+			MV_REG_WRITE(GPP_DATA_OUT_EN_REG(0), reg);
+			goto done;
+		}
+		goto done;
+	}
+
+	str = "freqs";
+	if(!strncmp(buffer+len, str,strlen(str)))
+	{
+		MV_PMU_FREQ_INFO freqs;
+
+		printk("Frequencies: ");
+		if(mvPmuGetCurrentFreq(&freqs) != MV_OK)
+			printk(">>>>>> FAILED!\n");
+		else
+			printk(KERN_INFO "PLL %dMhz CPU %dMhz, AXI %dMHz,"
+			       " L2 %dMhz, DDR %dMhz\n", freqs.pllFreq, 
+			       freqs.cpuFreq, freqs.axiFreq, freqs.l2Freq,
+			       freqs.ddrFreq);
+	}
+
+done:
+	return count;
+}
+
+int pmu_proc_read(char* page, char** start, off_t off, int count,int* eof,
+		    void* data)
+{
+	int len = 0;
+
+	len += sprintf(page+len,"PM Proc debug shell:\n");
+	len += sprintf(page+len,"   dvs <+10|+7.5|+5|+2.5|0|-2.5|-5|-7.5|-10>\n");
+	len += sprintf(page+len,"   cpudfs <turbo|ddr>\n");
+	len += sprintf(page+len,"   sysdfs <cpu> <l2> <ddr>\n");
+	len += sprintf(page+len,"   freqs\n");
+	len += sprintf(page+len,"   deepidle\n");
+	len += sprintf(page+len,"   standby\n");
+	len += sprintf(page+len,"   deepidle_block\n");
+	len += sprintf(page+len,"   wfi_block\n");
+	len += sprintf(page+len,"   dvfs <hi|lo>\n");
+	len += sprintf(page+len,"   gpu <on|off>\n");
+	len += sprintf(page+len,"   vpu <on|off>\n");
+	len += sprintf(page+len,"   wlan <on|off>\n");
+	len += sprintf(page+len,"   units <on|off>\n");
+	len += sprintf(page+len,"   deepcnt\n");
+	return len;
+}
+
+static struct proc_dir_entry *pmu_proc_entry;
+extern struct proc_dir_entry proc_root;
+static int pm_proc_init(void)
+{
+	pmu_proc_entry = create_proc_entry("pm", 0644, &proc_root);
+	pmu_proc_entry->read_proc = pmu_proc_read;
+	pmu_proc_entry->write_proc = pmu_proc_write;
+	return 0;
+}
+#endif /* CONFIG_PMU_PROC */
+
+#if defined(CONFIG_FB)
+static MV_BOOL enable_ebook = MV_TRUE;
+#else
+/* Use Deep-Idle by default if no FB in the system */
+static MV_BOOL enable_ebook = MV_FALSE;
+#endif
+
+static ssize_t ebook_show(struct kobject *kobj, struct kobj_attribute *attr,
+			 char *buf)
+{
+	return sprintf(buf, "%lu\n", (unsigned long)enable_ebook);
+}
+
+static ssize_t ebook_store(struct kobject *kobj, struct kobj_attribute *attr,
+			  const char * buf, size_t n)
+{
+	unsigned short value;
+	if (sscanf(buf, "%hu", &value) != 1 ||
+	    (value != 0 && value != 1)) {
+		printk(KERN_ERR "idle_sleep_store: Invalid value\n");
+		return -EINVAL;
+	}
+	if (value)
+		enable_ebook = MV_TRUE;
+	else
+		enable_ebook = MV_FALSE;
+		
+	return n;
+}
+
+static struct kobj_attribute ebook_attr =
+	__ATTR(ebook, 0644, ebook_show, ebook_store);
+
+#if defined(CONFIG_FB)
+
+/* The framebuffer notifier block */
+static struct notifier_block fb_notif;
+
+/* This callback gets called when something important happens inside a
+ * framebuffer driver. If the LCD is blancking then go into Deep-Idle
+ * instead of eBook.
+ */
+static int pm_fb_notifier_callback(struct notifier_block *self,
+				unsigned long event, void *data)
+{
+	struct fb_event *evdata = data;
+
+	/* If we aren't interested in this event, skip it immediately ... */
+	if (event != FB_EVENT_BLANK && event != FB_EVENT_CONBLANK)
+		return 0;
+
+	if (*(int *)evdata->data == FB_BLANK_UNBLANK) {
+		pr_debug("FB notifier: Using eBook mode...\n");
+		enable_ebook = MV_TRUE;		/* Work in eBook mode */
+	}
+	else {
+		pr_debug("FB notifier: Using Deep-Idle mode...\n");
+		enable_ebook = MV_FALSE;	/* Work in Deep-Idle mode */
+	}
+
+	return 0;
+}
+
+static int pm_register_fb(void)
+{
+	memset(&fb_notif, 0, sizeof(fb_notif));
+	fb_notif.notifier_call = pm_fb_notifier_callback;
+	return fb_register_client(&fb_notif);
+}
+#endif /* CONFIG_FB */
+
+
+/*
+ * Enter the Dove DEEP IDLE mode (power off CPU only)
+ */
+void dove_deepidle(void)
+{
+	MV_U32 reg;
+
+	pr_debug("dove_deepidle: Entering Dove DEEP IDLE mode.\n");
+	
+	/* Put on the Led on MPP7 */
+	reg = MV_REG_READ(PMU_SIG_SLCT_CTRL_0_REG);
+	reg &= ~PMU_SIG_7_SLCT_CTRL_MASK;
+	reg |= (PMU_SIGNAL_0 << PMU_SIG_7_SLCT_CTRL_OFFS);
+	MV_REG_WRITE(PMU_SIG_SLCT_CTRL_0_REG, reg);
+
+#ifdef CONFIG_IWMMXT
+	/* force any iWMMXt context to ram **/
+	if (elf_hwcap & HWCAP_IWMMXT)
+		iwmmxt_task_disable(NULL);
+#endif
+
+#if defined(CONFIG_VFP)
+	vfp_save();
+#endif
+
+	/* Suspend the CPU only */
+	mvPmuDeepIdle(enable_ebook);
+	cpu_init();
+
+#if defined(CONFIG_VFP)
+	vfp_restore();
+#endif
+
+	/* Put off the Led on MPP7 */
+	reg = MV_REG_READ(PMU_SIG_SLCT_CTRL_0_REG);
+	reg &= ~PMU_SIG_7_SLCT_CTRL_MASK;
+	reg |= (PMU_SIGNAL_1 << PMU_SIG_7_SLCT_CTRL_OFFS);
+	MV_REG_WRITE(PMU_SIG_SLCT_CTRL_0_REG, reg);
+
+	pr_debug("dove_deepidle: Exiting Dove DEEP IDLE mode.\n");
+}
+
+/*
+ * Enter the Dove STANDBY mode (Power off all SoC)
+ */
+void dove_standby(void)
+{
+	MV_U32 reg;
+
+	printk(KERN_NOTICE "Dove: Entering Standby Mode...\n");
+
+	/* Put on the Led on MPP7 */
+	reg = MV_REG_READ(PMU_SIG_SLCT_CTRL_0_REG);
+	reg &= ~PMU_SIG_7_SLCT_CTRL_MASK;
+	reg |= (PMU_SIGNAL_BLINK/*PMU_SIGNAL_0*/ << PMU_SIG_7_SLCT_CTRL_OFFS);
+	MV_REG_WRITE(PMU_SIG_SLCT_CTRL_0_REG, reg);
+
+#ifdef CONFIG_IWMMXT
+	/* force any iWMMXt context to ram **/
+	if (elf_hwcap & HWCAP_IWMMXT)
+		iwmmxt_task_disable(NULL);
+#endif
+
+	/* Save generic list of registes */
+	pm_registers_action(SAVE);
+
+	/* Save CPU Peripherals state */
+	dove_save_cpu_wins();
+	dove_save_cpu_conf_regs();
+	dove_save_upstream_regs();	
+	dove_save_timer_regs();	
+	dove_save_int_regs();
+
+	/* Suspend the CPU only */	
+	mvPmuStandby();	
+	cpu_init();
+
+	/* Restore CPU Peripherals state */
+	dove_restore_int_regs();
+	dove_restore_timer_regs();	
+	dove_restore_upstream_regs();	
+	dove_restore_cpu_conf_regs();
+	dove_restore_cpu_wins();
+
+	/* Save generic list of registes */
+	pm_registers_action(RESTORE);
+
+	dove_restore_pcie_regs(); /* Should be done after restoring cpu configuration registers */
+	/* reset the current i2c expander port id to sync with hw settings */
+#ifdef CONFIG_I2C_MV64XXX_PORT_EXPANDER
+	dove_reset_exp_port();
+#endif
+	/* Put off the Led on MPP7 */
+	reg = MV_REG_READ(PMU_SIG_SLCT_CTRL_0_REG);
+	reg &= ~PMU_SIG_7_SLCT_CTRL_MASK;
+	reg |= (PMU_SIGNAL_1 << PMU_SIG_7_SLCT_CTRL_OFFS);
+	MV_REG_WRITE(PMU_SIG_SLCT_CTRL_0_REG, reg);
+
+	printk(KERN_NOTICE "Dove: Exiting Standby Mode...\n");
+}
+
+/*
+ * Logical check for Dove valid PM states
+ */
+static int dove_pm_valid(suspend_state_t state)
+{
+	return ((state == PM_SUSPEND_MEM) ||
+		(state == PM_SUSPEND_STANDBY));
+}
+
+/*
+ * Initialise a transition to given system sleep state.
+ * This is needed by all devices to decide whether to save device context
+ * (for "ram") or not (for "standby")
+ */
+static int dove_pm_begin(suspend_state_t state)
+{
+	/* TODO: write target mode to the PMU flag register */
+	dove_target_pm_state = state;
+	return 0;
+}
+
+/*
+ * Check if the CORE devices will loose (or have lost) power during suspend
+ */
+int dove_io_core_lost_power(void)
+{
+	if (dove_target_pm_state >= PM_SUSPEND_MEM)
+		return 1;
+
+	return 0;
+}
+EXPORT_SYMBOL(dove_io_core_lost_power);
+
+/*
+ * Preparation to enter a new PM state. This includes disabling the call
+ * for the WFI instruction from the context of the do_idle() routine
+ */
+static int dove_pm_prepare(void)
+{
+	pr_debug("PM DEBUG: Preparing to enter PM state.\n");
+	return 0;
+}
+
+/*
+ * Enter the requested PM state
+ */
+static int dove_pm_enter(suspend_state_t state)
+{
+	pr_debug("PM DEBUG: Entering PM state (%d).\n", state);
+	switch (state)	{
+	case PM_SUSPEND_STANDBY:
+		dove_deepidle();
+		break;
+	case PM_SUSPEND_MEM:
+		dove_standby();
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+/*
+ * This is called when the system has just left a sleep state, right after
+ * the nonboot CPUs have been enabled.
+ */
+static void dove_pm_finish(void)
+{
+	local_irq_enable();
+}
+
+/*
+ * This is called by the PM core right after resuming devices, to indicate to
+ * the platform that the system has returned to the working state or
+ * the transition to the sleep state has been aborted.
+ */
+static void dove_pm_end(void)
+{
+	dove_target_pm_state = PM_SUSPEND_ON;
+}
+
+static struct platform_suspend_ops dove_pm_ops = {
+	.valid		= dove_pm_valid,
+	.begin     	= dove_pm_begin,
+	.prepare	= dove_pm_prepare,
+	.enter		= dove_pm_enter,
+	.finish		= dove_pm_finish,
+	.end		= dove_pm_end,
+};
+
+int dove_timekeeping_resume(void);
+int dove_timekeeping_suspend(void);
+
+void dove_pm_cpuidle_deepidle (void)
+{
+	dove_pm_enter(PM_SUSPEND_STANDBY);
+}
+
+void dove_pm_register (void)
+{
+	MV_PMU_FREQ_INFO freqs;
+
+	printk(KERN_NOTICE "Power Management for Marvell Dove.\n");
+
+	suspend_set_ops(&dove_pm_ops);
+
+	/* Create EBook control file in sysfs */
+	if (sysfs_create_file(power_kobj, &ebook_attr.attr))
+		printk(KERN_ERR "dove_pm_register: ebook sysfs_create_file failed!");
+
+#ifdef CONFIG_PMU_PROC
+	pm_proc_init();
+#endif
+
+#if defined(CONFIG_FB)
+	if (pm_register_fb())
+		printk(KERN_ERR "dove_pm_register: FB notifier register failed!");
+#endif
+
+	if (mvPmuGetCurrentFreq(&freqs) == MV_OK)
+		printk(KERN_NOTICE "PMU Detected Frequencies CPU %dMhz, AXI %dMhz, L2 %dMhz, DDR %dMhz\n", 
+				freqs.cpuFreq, freqs.axiFreq, freqs.l2Freq, freqs.ddrFreq);
+	else
+		printk(KERN_ERR "PMU Failed to detect current system frequencies!\n");
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/cpu.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/cpu.c
@@ -0,0 +1,102 @@
+/*
+ * cpu.c  - Suspend support specific for ARM.
+ *		based on arch/i386/power/cpu.c
+ *
+ * Distribute under GPLv2
+ *
+ * Copyright (c) 2002 Pavel Machek <pavel@suse.cz>
+ * Copyright (c) 2001 Patrick Mochel <mochel@osdl.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/spinlock.h>
+#include <linux/poll.h>
+#include <linux/delay.h>
+#include <linux/sysrq.h>
+#include <linux/proc_fs.h>
+#include <linux/pm.h>
+#include <linux/device.h>
+#include <linux/suspend.h>
+#include <asm/irq.h>
+#include <asm/uaccess.h>
+#include <asm/tlbflush.h>
+#include <asm/suspend.h>
+
+static struct saved_context saved_context;
+
+extern void enable_sep_cpu(void *);
+
+void __save_processor_state(struct saved_context *ctxt)
+{
+	/* save preempt state and disable it */
+	preempt_disable();
+
+	/* save coprocessor 15 registers */
+	asm volatile ("mrc p15, 0, %0, c1, c0, 0" : "=r" (ctxt->CR));
+	asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (ctxt->ACR));
+	asm volatile ("mrc p15, 0, %0, c3, c0, 0" : "=r" (ctxt->DACR));
+	asm volatile ("mrc p15, 0, %0, c10, c0, 0" : "=r" (ctxt->TLBLR));
+	asm volatile ("mrc p15, 0, %0, c13, c0, 0" : "=r" (ctxt->FCSE));
+	asm volatile ("mrc p15, 0, %0, c13, c0, 1" : "=r" (ctxt->CID));
+	asm volatile ("mrc p15, 0, %0, c2, c0, 2" : "=r" (ctxt->TTBCR));
+	asm volatile ("mrc p15, 0, %0, c2, c0, 0" : "=r" (ctxt->TTBR0));
+	asm volatile ("mrc p15, 0, %0, c2, c0, 1" : "=r" (ctxt->TTBR1));
+	asm volatile ("mrc p15, 0, %0, c15, c1, 0" : "=r" (ctxt->EFR));
+}
+
+extern void swsusp_save_pg_dir(void);
+void save_processor_state(void)
+{
+	__save_processor_state(&saved_context);
+}
+
+void __restore_processor_state(struct saved_context *ctxt)
+{
+	/* restore coprocessor 15 registers */
+	asm volatile ("mcr p15, 0, %0, c15, c1, 0" : : "r" (ctxt->EFR));
+	asm volatile ("mcr p15, 0, %0, c2, c0, 1" : : "r" (ctxt->TTBR1));
+	asm volatile ("mcr p15, 0, %0, c2, c0, 0" : : "r" (ctxt->TTBR0));
+	asm volatile ("mcr p15, 0, %0, c2, c0, 2" : : "r" (ctxt->TTBCR));
+	asm volatile ("mcr p15, 0, %0, c13, c0, 1" : : "r" (ctxt->CID));
+	asm volatile ("mcr p15, 0, %0, c13, c0, 0" : : "r" (ctxt->FCSE));
+	asm volatile ("mcr p15, 0, %0, c10, c0, 0" : : "r" (ctxt->TLBLR));
+	asm volatile ("mcr p15, 0, %0, c3, c0, 0" : : "r" (ctxt->DACR));
+	asm volatile ("mcr p15, 0, %0, c1, c0, 1" : : "r" (ctxt->ACR));
+	asm volatile ("mcr p15, 0, %0, c1, c0, 0" : : "r" (ctxt->CR));
+
+	/* restore preempt state */
+	preempt_enable();
+}
+
+void restore_processor_state(void)
+{
+	__restore_processor_state(&saved_context);
+}
+
+EXPORT_SYMBOL(save_processor_state);
+EXPORT_SYMBOL(restore_processor_state);
+extern const void __nosave_begin, __nosave_end;
+
+int pfn_is_nosave(unsigned long pfn)
+{
+        unsigned long begin_pfn = __pa(&__nosave_begin) >> PAGE_SHIFT;
+        unsigned long end_pfn = PAGE_ALIGN(__pa(&__nosave_end)) >> PAGE_SHIFT;
+
+        return (pfn >= begin_pfn) && (pfn < end_pfn);
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/Makefile
@@ -0,0 +1,25 @@
+AFLAGS_swsusp.o			:= -DTEXT_OFFSET=$(TEXT_OFFSET)
+
+obj-y				+= clock.o common.o addr-map.o irq.o pcie.o mpp.o \
+				sdhci_cam_mbus.o
+obj-$(CONFIG_MACH_DOVE_RD_AVNG)	+= dove-rd-avng-setup.o
+obj-$(CONFIG_MACH_DOVE_RD)	+= dove-rd-setup.o dove-front-panel-common.o
+obj-$(CONFIG_MACH_DOVE_DB)	+= dove-db-setup.o dove-front-panel-common.o
+obj-$(CONFIG_MACH_DOVE_DB_B)	+= dove-db-setup.o dove-front-panel-common.o
+obj-$(CONFIG_MACH_DOVE_VIDEOPLUG)	+= dove-videoplug-setup.o
+obj-$(CONFIG_I2C_MV64XXX_PORT_EXPANDER)	+= twsi.o
+obj-$(CONFIG_DOVE_PM_SUPPORT)	+= pm.o
+obj-$(CONFIG_CPU_FREQ_DOVE)	+= cpufreq.o
+obj-$(CONFIG_HIBERNATION)	+= cpu.o swsusp.o
+obj-$(CONFIG_SENSORS_DOVE)	+= hwmon.o
+obj-$(CONFIG_FB_DOVE_CLCD)	+= clcd.o
+obj-$(CONFIG_FB_DOVE_CLCD1)	+= clcd.o
+obj-$(CONFIG_MV_INCLUDE_MPP_SYSFS)	+= avng_mpp.o
+obj-$(CONFIG_CPU_IDLE)		+= cpuidle.o
+obj-$(CONFIG_PROC_FS)		+= dump_cp15_regs.o
+obj-$(CONFIG_MV_EXT_VGA_CLOCK)	+= idt5v49ee503.o
+obj-$(CONFIG_DOVE_GC600)	+= gc600_driver_dove/
+
+include $(srctree)/$(subst ",,$(CONFIG_MV_HAL_RULES_PATH))
+
+obj-y           += mv_hal_support/
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/common.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/common.c
@@ -0,0 +1,2077 @@
+/*
+ * arch/arm/mach-dove/common.c
+ *
+ * Core functions for Marvell Dove MV88F6781 System On Chip
+ *
+ * Author: Tzachi Perelstein <tzachi@marvell.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/pci.h>
+#include <linux/serial_8250.h>
+#include <linux/clk.h>
+#include <linux/mbus.h>
+#include <linux/mv643xx_eth.h>
+#include <linux/mv643xx_i2c.h>
+#include <linux/ata_platform.h>
+#include <linux/spi/orion_spi.h>
+#include <linux/spi/mv_spi.h>
+#include <linux/gpio_mouse.h>
+#include <linux/dove_sdhci.h>
+#include <linux/gpio_keys.h>
+#include <linux/i2c-gpio.h>
+#include <linux/input.h>
+#include <asm/page.h>
+#include <asm/setup.h>
+#include <asm/timex.h>
+#include <asm/mach/map.h>
+#include <asm/mach/time.h>
+#include <asm/mach/pci.h>
+#include <mach/dove.h>
+#include <mach/bridge-regs.h>
+#include <asm/mach/arch.h>
+#include <mach/gpio.h>
+#include <linux/irq.h>
+#include <asm/hardware/cache-tauros2.h>
+#include <plat/ehci-orion.h>
+#include <plat/i2s-orion.h>
+#include <plat/orion_nand.h>
+#include <plat/mv_eth.h>
+#include <plat/mv_cesa.h>
+#include <plat/time.h>
+#include <plat/mv_xor.h>
+#include <mvSysHwConfig.h>
+#include <ctrlEnv/mvCtrlEnvRegs.h>
+#include "ctrlEnv/sys/mvCpuIfRegs.h"
+#ifdef CONFIG_MV_HAL_DRIVERS_SUPPORT
+#include "mvTypes.h"
+#endif
+#ifdef CONFIG_MV_ETHERNET
+#include "../plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_network/mv_ethernet/mv_netdev.h"
+#endif
+#include <mach/pm.h>
+#include "clock.h"
+#include "twsi.h"
+#ifdef CONFIG_USB_ANDROID
+#include <linux/usb/android_composite.h>
+#endif
+
+static unsigned int dove_vmeta_memory_start;
+static unsigned int dove_gpu_memory_start;
+
+
+/* used for memory allocation for the VMETA video engine */
+#ifdef CONFIG_UIO_VMETA
+#define UIO_DOVE_VMETA_MEM_SIZE (CONFIG_UIO_DOVE_VMETA_MEM_SIZE << 20)
+#else
+#define UIO_DOVE_VMETA_MEM_SIZE 0
+#endif
+
+unsigned int vmeta_size = UIO_DOVE_VMETA_MEM_SIZE;
+
+/* used for memory allocation for the GPU graphics engine */
+#ifdef CONFIG_DOVE_GPU
+#define DOVE_GPU_MEM_SIZE (CONFIG_DOVE_GPU_MEM_SIZE << 20)
+#else
+#define DOVE_GPU_MEM_SIZE 0
+#endif
+
+unsigned int __initdata gpu_size = DOVE_GPU_MEM_SIZE;
+
+
+unsigned int __initdata pvt_size = 0;
+
+static int __init pvt_size_setup(char *str)
+{
+	get_option(&str, &pvt_size);
+
+	if (!pvt_size)
+		return 1;
+
+	pvt_size <<= 20;
+
+	return 1;
+}
+__setup("pvt_size=", pvt_size_setup);
+
+char *useNandHal = NULL;
+static int __init useNandHal_setup(char *s)
+{
+	useNandHal = s;
+	return 1;
+}
+__setup("useNandHal=", useNandHal_setup);
+
+int useHalDrivers = 0;
+#ifdef CONFIG_MV_HAL_DRIVERS_SUPPORT
+static int __init useHalDrivers_setup(char *__unused)
+{
+     useHalDrivers = 1;
+     return 1;
+}
+__setup("useHalDrivers", useHalDrivers_setup);
+#endif
+
+#ifdef CONFIG_MV_INCLUDE_USB
+#include "mvSysUsbApi.h"
+/* Required to get the configuration string from the Kernel Command Line */
+static char *usb0Mode = "host";
+static char *usb1Mode = "host";
+static char *usb_dev_name  = "mv_udc";
+int mv_usb0_cmdline_config(char *s);
+int mv_usb1_cmdline_config(char *s);
+__setup("usb0Mode=", mv_usb0_cmdline_config);
+__setup("usb1Mode=", mv_usb1_cmdline_config);
+
+int mv_usb0_cmdline_config(char *s)
+{
+    usb0Mode = s;
+    return 1;
+}
+
+int mv_usb1_cmdline_config(char *s)
+{
+    usb1Mode = s;
+    return 1;
+}
+
+#endif 
+
+static int noL2 = 0;
+static int __init noL2_setup(char *__unused)
+{
+     noL2 = 1;
+     return 1;
+}
+
+__setup("noL2", noL2_setup);
+
+int pm_disable = 0;
+static int __init pm_disable_setup(char *__unused)
+{
+     pm_disable = 1;
+     return 1;
+}
+
+__setup("pm_disable", pm_disable_setup);
+
+static int __init pm_enable_setup(char *__unused)
+{
+     pm_disable = 0;
+     return 1;
+}
+
+__setup("pm_enable", pm_enable_setup);
+
+
+int cpufreq_disable = 0;
+static int __init cpufreq_disable_setup(char *__unused)
+{
+     cpufreq_disable = 1;
+     return 1;
+}
+
+__setup("cpufreq_disable", cpufreq_disable_setup);
+
+
+#include "common.h"
+
+#ifdef CONFIG_PM
+enum orion_dwnstrm_conf_save_state {
+	/* CPU Configuration Registers */
+	DOVE_DWNSTRM_BRDG_CPU_CONFIG = 0,
+	DOVE_DWNSTRM_BRDG_CPU_CONTROL,
+	DOVE_DWNSTRM_BRDG_RSTOUTn_MASK,
+	DOVE_DWNSTRM_BRDG_BRIDGE_MASK,
+	DOVE_DWNSTRM_BRDG_POWER_MANAGEMENT,
+	/* CPU Timers Registers */
+	DOVE_DWNSTRM_BRDG_TIMER_CTRL,
+	DOVE_DWNSTRM_BRDG_TIMER0_RELOAD,
+	DOVE_DWNSTRM_BRDG_TIMER1_RELOAD,
+	DOVE_DWNSTRM_BRDG_TIMER_WD_RELOAD,
+	/* Main Interrupt Controller Registers */
+	DOVE_DWNSTRM_BRDG_IRQ_MASK_LOW,
+	DOVE_DWNSTRM_BRDG_FIQ_MASK_LOW,
+	DOVE_DWNSTRM_BRDG_ENDPOINT_MASK_LOW,
+	DOVE_DWNSTRM_BRDG_IRQ_MASK_HIGH,
+	DOVE_DWNSTRM_BRDG_FIQ_MASK_HIGH,
+	DOVE_DWNSTRM_BRDG_ENDPOINT_MASK_HIGH,
+	DOVE_DWNSTRM_BRDG_PCIE_INTERRUPT_MASK,	
+
+	DOVE_DWNSTRM_BRDG_SIZE
+};
+
+#define DOVE_DWNSTRM_BRDG_SAVE(x) \
+	dove_downstream_regs[DOVE_DWNSTRM_BRDG_##x] = readl(x)
+#define DOVE_DWNSTRM_BRDG_RESTORE(x) \
+	writel(dove_downstream_regs[DOVE_DWNSTRM_BRDG_##x], x)
+
+static u32 dove_downstream_regs[DOVE_DWNSTRM_BRDG_SIZE];
+
+enum orion_uptrm_conf_save_state {
+	/* Upstream Bridge Configuration Registers */
+	DOVE_UPSTRM_AXI_P_D_CTRL_REG = 0,
+	DOVE_UPSTRM_D2X_ARB_LO_REG,
+	DOVE_UPSTRM_D2X_ARB_HI_REG,
+
+	DOVE_UPSTRM_BRDG_SIZE
+};
+
+#define DOVE_UPSTRM_BRDG_SAVE(x) \
+	dove_upstream_regs[DOVE_##x] = readl(DOVE_SB_REGS_VIRT_BASE | x)
+#define DOVE_UPSTRM_BRDG_RESTORE(x) \
+	writel(dove_upstream_regs[DOVE_##x], (DOVE_SB_REGS_VIRT_BASE | x))
+
+static u32 dove_upstream_regs[DOVE_UPSTRM_BRDG_SIZE];
+#endif
+
+/*****************************************************************************
+ * General
+ ****************************************************************************/
+
+/*
+ * Identify device ID and revision.
+ */
+u32 chip_dev, chip_rev;
+EXPORT_SYMBOL(chip_dev);
+EXPORT_SYMBOL(chip_rev);
+
+static char * __init dove_id(void)
+{
+	u32 dev, rev;
+
+	dove_pcie_id(&dev, &rev);
+	chip_dev = dev;
+	chip_rev = rev;
+
+	if (rev == DOVE_REV_Z0)
+		return "MV88AP510-Z0";
+	if (rev == DOVE_REV_Z1)
+		return "MV88AP510-Z1";
+	if (rev == DOVE_REV_Y0)
+		return "MV88AP510-Y0";
+	if (rev == DOVE_REV_Y1)
+		return "MV88AP510-Y1";
+	if (rev == DOVE_REV_X0)
+		return "MV88AP510-X0";
+	if (rev == DOVE_REV_A0)
+		return "MV88AP510-A0";
+	else
+		return "MV88AP510-Rev-Unsupported";
+}
+
+/*****************************************************************************
+ * I/O Address Mapping
+ ****************************************************************************/
+static struct map_desc dove_io_desc[] __initdata = {
+	{
+		.virtual	= DOVE_SCRATCHPAD_VIRT_BASE,
+		.pfn		= __phys_to_pfn(DOVE_SCRATCHPAD_PHYS_BASE),
+		.length		= DOVE_SCRATCHPAD_SIZE,
+		.type		= MT_EXEC_REGS,
+	}, {
+		.virtual	= DOVE_SB_REGS_VIRT_BASE,
+		.pfn		= __phys_to_pfn(DOVE_SB_REGS_PHYS_BASE),
+		.length		= DOVE_SB_REGS_SIZE,
+		.type		= MT_DEVICE,
+	}, {
+		.virtual	= DOVE_NB_REGS_VIRT_BASE,
+		.pfn		= __phys_to_pfn(DOVE_NB_REGS_PHYS_BASE),
+		.length		= DOVE_NB_REGS_SIZE,
+		.type		= MT_DEVICE,
+	}, {
+		.virtual	= DOVE_PCIE0_IO_VIRT_BASE,
+		.pfn		= __phys_to_pfn(DOVE_PCIE0_IO_PHYS_BASE),
+		.length		= DOVE_PCIE0_IO_SIZE,
+		.type		= MT_DEVICE,
+	}, {
+		.virtual	= DOVE_PCIE1_IO_VIRT_BASE,
+		.pfn		= __phys_to_pfn(DOVE_PCIE1_IO_PHYS_BASE),
+		.length		= DOVE_PCIE1_IO_SIZE,
+		.type		= MT_DEVICE,
+	},{
+		.virtual	= DOVE_CESA_VIRT_BASE,
+		.pfn		= __phys_to_pfn(DOVE_CESA_PHYS_BASE),
+		.length		= DOVE_CESA_SIZE,
+		.type		= MT_DEVICE,
+	},
+
+
+};
+
+void __init dove_map_io(void)
+{
+	iotable_init(dove_io_desc, ARRAY_SIZE(dove_io_desc));
+}
+/*****************************************************************************
+ * SDIO
+ ****************************************************************************/
+#define DOVE_SD0_START_GPIO	40
+#define DOVE_SD1_START_GPIO	46
+
+
+struct sdhci_dove_int_wa sdio0_data = {
+	.gpio = DOVE_SD0_START_GPIO + 3,
+	.func_select_bit = 0
+};
+
+static u64 sdio_dmamask = DMA_BIT_MASK(32);
+/*****************************************************************************
+ * SDIO0
+ ****************************************************************************/
+
+static struct resource dove_sdio0_resources[] = {
+	{
+		.start	= DOVE_SDIO0_PHYS_BASE,
+		.end	= DOVE_SDIO0_PHYS_BASE + SZ_4K - 1,
+		.flags	= IORESOURCE_MEM,
+	}, {
+		.start	= IRQ_DOVE_SDIO0,
+		.end	= IRQ_DOVE_SDIO0,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device dove_sdio0 = {
+	.name		= "sdhci-mv",
+	.id		= 0,
+	.dev		= {
+		.dma_mask		= &sdio_dmamask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+	},
+	.resource	= dove_sdio0_resources,
+	.num_resources	= ARRAY_SIZE(dove_sdio0_resources),
+};
+
+void __init dove_sdio0_init(void)
+{
+	platform_device_register(&dove_sdio0);
+}
+
+/*****************************************************************************
+ * SDIO1
+ ****************************************************************************/
+struct sdhci_dove_int_wa sdio1_data = {
+	.gpio = DOVE_SD1_START_GPIO + 3,
+	.func_select_bit = 1
+};
+
+static struct resource dove_sdio1_resources[] = {
+	{
+		.start	= DOVE_SDIO1_PHYS_BASE,
+		.end	= DOVE_SDIO1_PHYS_BASE + SZ_4K - 1,
+		.flags	= IORESOURCE_MEM,
+	}, {
+		.start	= IRQ_DOVE_SDIO1,
+		.end	= IRQ_DOVE_SDIO1,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device dove_sdio1 = {
+	.name		= "sdhci-mv",
+	.id		= 1,
+	.dev		= {
+		.dma_mask		= &sdio_dmamask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+	},
+	.resource	= dove_sdio1_resources,
+	.num_resources	= ARRAY_SIZE(dove_sdio1_resources),
+};
+
+void __init dove_sdio1_init(void)
+{
+	platform_device_register(&dove_sdio1);
+}
+
+/* sdio card interrupt workaround, when no command is running, switch the
+ * DATA[1] pin to be gpio-in with level interrupt.
+ */
+
+void __init dove_sd_card_int_wa_setup(int port)
+{
+	int	gpio = 0, i, irq = 0;
+	char	*name;
+
+	switch(port) {
+	case 0:
+		gpio = DOVE_SD0_START_GPIO;
+		name = "sd0";
+		dove_sdio0.dev.platform_data = &sdio0_data;
+		irq = sdio0_data.irq = gpio_to_irq(sdio0_data.gpio);
+		break;
+	case 1:
+		gpio = DOVE_SD1_START_GPIO;
+		name = "sd1";
+		dove_sdio1.dev.platform_data = &sdio1_data;
+		irq = sdio1_data.irq = gpio_to_irq(sdio1_data.gpio);
+		break;
+	default:
+		printk(KERN_ERR "dove_sd_card_int_wa_setup: bad port (%d)\n", 
+		       port);
+		return;
+	}
+	
+	for (i = gpio; i < (gpio + 6); i++) {
+		orion_gpio_set_valid(i, 1);
+		
+		if (gpio_request(i, name) != 0)
+			printk(KERN_ERR "dove: failed to config gpio (%d) for %s\n",
+			       i, name);
+
+		gpio_direction_input(i);
+	}
+	set_irq_type(irq, IRQ_TYPE_LEVEL_LOW);
+}
+
+/*****************************************************************************
+ * EHCI
+ ****************************************************************************/
+static struct orion_ehci_data dove_ehci_data = {
+	.dram		= &dove_mbus_dram_info,
+	.phy_version	= EHCI_PHY_DOVE,
+};
+
+static u64 ehci_dmamask = DMA_BIT_MASK(32);
+
+/*****************************************************************************
+ * EHCI0
+ ****************************************************************************/
+static struct resource dove_ehci0_resources[] = {
+	{
+		.start	= DOVE_USB0_PHYS_BASE,
+		.end	= DOVE_USB0_PHYS_BASE + SZ_4K - 1,
+		.flags	= IORESOURCE_MEM,
+	}, {
+		.start	= IRQ_DOVE_USB0,
+		.end	= IRQ_DOVE_USB0,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device dove_ehci0 = {
+	.name		= "orion-ehci",
+	.id		= 0,
+	.dev		= {
+		.dma_mask		= &ehci_dmamask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+		.platform_data		= &dove_ehci_data,
+	},
+	.resource	= dove_ehci0_resources,
+	.num_resources	= ARRAY_SIZE(dove_ehci0_resources),
+};
+
+void __init dove_ehci0_init(void)
+{
+#ifdef CONFIG_MV_INCLUDE_USB
+	if (	(strcmp(usb0Mode, "device") == 0) && 
+		(strcmp(usb1Mode, "device") == 0)) {
+		printk("Warning: trying to set both USB0 and USB1 to device mode!\n");
+	}
+
+	if (strcmp(usb0Mode, "host") == 0) {
+		printk("Initializing USB0 Host\n");
+		if (useHalDrivers) {
+			dove_ehci_data.dram = NULL;
+			dove_ehci_data.phy_version = EHCI_PHY_NA;
+			mvSysUsbInit(0, 1);
+		}
+	}
+	else {
+		printk("Initializing USB0 Device\n");
+		dove_ehci0.name = usb_dev_name;
+		mvSysUsbInit(0, 0);
+	}
+#endif
+	platform_device_register(&dove_ehci0);
+}
+
+/*****************************************************************************
+ * EHCI1
+ ****************************************************************************/
+static struct resource dove_ehci1_resources[] = {
+	{
+		.start	= DOVE_USB1_PHYS_BASE,
+		.end	= DOVE_USB1_PHYS_BASE + SZ_4K - 1,
+		.flags	= IORESOURCE_MEM,
+	}, {
+		.start	= IRQ_DOVE_USB1,
+		.end	= IRQ_DOVE_USB1,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device dove_ehci1 = {
+	.name		= "orion-ehci",
+	.id		= 1,
+	.dev		= {
+		.dma_mask		= &ehci_dmamask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+		.platform_data		= &dove_ehci_data,
+	},
+	.resource	= dove_ehci1_resources,
+	.num_resources	= ARRAY_SIZE(dove_ehci1_resources),
+};
+
+void __init dove_ehci1_init(void)
+{
+#ifdef CONFIG_MV_INCLUDE_USB
+	if (strcmp(usb1Mode, "host") == 0) {
+		printk("Initializing USB1 Host\n");
+		if (useHalDrivers) {
+			dove_ehci_data.dram = NULL;
+			dove_ehci_data.phy_version = EHCI_PHY_NA;
+			mvSysUsbInit(1, 1);
+		}
+	}
+	else {
+		printk("Initializing USB1 Device\n");
+		dove_ehci1.name = usb_dev_name;
+		mvSysUsbInit(1, 0);
+	}
+#endif
+	platform_device_register(&dove_ehci1);
+}
+
+#ifdef CONFIG_MV_ETHERNET
+/*****************************************************************************
+ * Ethernet
+ ****************************************************************************/
+struct mv_eth_addr_dec_platform_data dove_eth_addr_dec_data = {
+	.dram		= &dove_mbus_dram_info,
+};
+
+static struct platform_device dove_eth_addr_dec = {
+	.name		= MV_ETH_ADDR_DEC_NAME,
+	.id		= 0,
+	.dev		= {
+		.platform_data	= &dove_eth_addr_dec_data,
+	},
+	.num_resources	= 0,
+};
+
+static struct mv_netdev_platform_data dove_eth_data = {
+	.port_number = 0
+};
+
+static struct resource dove_eth_resources[] = {
+	{
+		.name	= "eth irq",
+		.start	= IRQ_DOVE_GE00_SUM,
+		.end	= IRQ_DOVE_GE00_SUM,
+		.flags	= IORESOURCE_IRQ,
+	}
+};
+
+static struct platform_device dove_eth = {
+	.name		= MV_NETDEV_ETH_NAME,
+	.id		= 0,
+	.num_resources	= 1,
+	.resource	= dove_eth_resources,
+};
+
+void __init dove_mv_eth_init(void)
+{
+	dove_eth.dev.platform_data = &dove_eth_data;
+	platform_device_register(&dove_eth);
+	if(!useHalDrivers)
+		platform_device_register(&dove_eth_addr_dec);
+}
+#endif
+#if 1
+/*****************************************************************************
+ * GE00
+ ****************************************************************************/
+struct mv643xx_eth_shared_platform_data dove_ge00_shared_data = {
+	.t_clk		= 0,
+	.dram		= &dove_mbus_dram_info,
+};
+
+static struct resource dove_ge00_shared_resources[] = {
+	{
+		.name	= "ge00 base",
+		.start	= DOVE_GE00_PHYS_BASE + 0x2000,
+		.end	= DOVE_GE00_PHYS_BASE + SZ_16K - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device dove_ge00_shared = {
+	.name		= MV643XX_ETH_SHARED_NAME,
+	.id		= 0,
+	.dev		= {
+		.platform_data	= &dove_ge00_shared_data,
+	},
+	.num_resources	= 1,
+	.resource	= dove_ge00_shared_resources,
+};
+
+static struct resource dove_ge00_resources[] = {
+	{
+		.name	= "ge00 irq",
+		.start	= IRQ_DOVE_GE00_SUM,
+		.end	= IRQ_DOVE_GE00_SUM,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device dove_ge00 = {
+	.name		= MV643XX_ETH_NAME,
+	.id		= 0,
+	.num_resources	= 1,
+	.resource	= dove_ge00_resources,
+	.dev		= {
+		.coherent_dma_mask	= 0xffffffff,
+	},
+};
+
+void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)
+{
+	eth_data->shared = &dove_ge00_shared;
+	dove_ge00.dev.platform_data = eth_data;
+
+	platform_device_register(&dove_ge00_shared);
+	platform_device_register(&dove_ge00);
+}
+#endif
+
+/*****************************************************************************
+ * SoC RTC
+ ****************************************************************************/
+static struct resource dove_rtc_resource[] = {
+	{
+		.start	= DOVE_RTC_PHYS_BASE,
+		.end	= DOVE_RTC_PHYS_BASE + 32 - 1,
+		.flags	= IORESOURCE_MEM,
+	}, {
+		.start	= IRQ_DOVE_RTC,
+		.flags	= IORESOURCE_IRQ,
+	}
+};
+
+void __init dove_rtc_init(void)
+{
+	platform_device_register_simple("rtc-mv", -1, dove_rtc_resource, 2);
+}
+
+/*****************************************************************************
+ * SoC hwmon Thermal Sensor
+ ****************************************************************************/
+void __init dove_hwmon_init(void)
+{
+	platform_device_register_simple("dove-temp", 0, NULL, 0);
+}
+
+/*****************************************************************************
+ * SATA
+ ****************************************************************************/
+static struct resource dove_sata_resources[] = {
+	{
+		.name	= "sata base",
+		.start	= DOVE_SATA_PHYS_BASE,
+		.end	= DOVE_SATA_PHYS_BASE + 0x5000 - 1,
+		.flags	= IORESOURCE_MEM,
+	}, {
+		.name	= "sata irq",
+		.start	= IRQ_DOVE_SATA,
+		.end	= IRQ_DOVE_SATA,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device dove_sata = {
+	.name		= "sata_mv",
+	.id		= 0,
+	.dev		= {
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+	},
+	.num_resources	= ARRAY_SIZE(dove_sata_resources),
+	.resource	= dove_sata_resources,
+};
+
+void __init dove_sata_init(struct mv_sata_platform_data *sata_data)
+{
+	if (useHalDrivers) {
+		sata_data->dram = NULL;
+		dove_sata.name = "sata_mv_hal";
+	} else
+		sata_data->dram = &dove_mbus_dram_info;
+
+	dove_sata.dev.platform_data = sata_data;
+
+	platform_device_register(&dove_sata);
+}
+
+/*****************************************************************************
+ * UART0
+ ****************************************************************************/
+static struct plat_serial8250_port dove_uart0_data[] = {
+	{
+		.mapbase	= DOVE_UART0_PHYS_BASE,
+		.membase	= (char *)DOVE_UART0_VIRT_BASE,
+		.irq		= IRQ_DOVE_UART_0,
+		.flags		= UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
+		.iotype		= UPIO_MEM,
+		.regshift	= 2,
+		.uartclk	= 0,
+	}, {
+	},
+};
+
+static struct resource dove_uart0_resources[] = {
+	{
+		.start		= DOVE_UART0_PHYS_BASE,
+		.end		= DOVE_UART0_PHYS_BASE + SZ_256 - 1,
+		.flags		= IORESOURCE_MEM,
+	}, {
+		.start		= IRQ_DOVE_UART_0,
+		.end		= IRQ_DOVE_UART_0,
+		.flags		= IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device dove_uart0 = {
+	.name			= "serial8250",
+	.id			= 0,
+	.dev			= {
+		.platform_data	= dove_uart0_data,
+	},
+	.resource		= dove_uart0_resources,
+	.num_resources		= ARRAY_SIZE(dove_uart0_resources),
+};
+
+void __init dove_uart0_init(void)
+{
+	platform_device_register(&dove_uart0);
+}
+
+/*****************************************************************************
+ * UART1
+ ****************************************************************************/
+static struct plat_serial8250_port dove_uart1_data[] = {
+	{
+		.mapbase	= DOVE_UART1_PHYS_BASE,
+		.membase	= (char *)DOVE_UART1_VIRT_BASE,
+		.irq		= IRQ_DOVE_UART_1,
+		.flags		= UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
+		.iotype		= UPIO_MEM,
+		.regshift	= 2,
+		.uartclk	= 0,
+	}, {
+	},
+};
+
+static struct resource dove_uart1_resources[] = {
+	{
+		.start		= DOVE_UART1_PHYS_BASE,
+		.end		= DOVE_UART1_PHYS_BASE + SZ_256 - 1,
+		.flags		= IORESOURCE_MEM,
+	}, {
+		.start		= IRQ_DOVE_UART_1,
+		.end		= IRQ_DOVE_UART_1,
+		.flags		= IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device dove_uart1 = {
+	.name			= "serial8250",
+	.id			= 1,
+	.dev			= {
+		.platform_data	= dove_uart1_data,
+	},
+	.resource		= dove_uart1_resources,
+	.num_resources		= ARRAY_SIZE(dove_uart1_resources),
+};
+
+void __init dove_uart1_init(void)
+{
+	platform_device_register(&dove_uart1);
+}
+
+/*****************************************************************************
+ * UART2
+ ****************************************************************************/
+static struct plat_serial8250_port dove_uart2_data[] = {
+	{
+		.mapbase	= DOVE_UART2_PHYS_BASE,
+		.membase	= (char *)DOVE_UART2_VIRT_BASE,
+		.irq		= IRQ_DOVE_UART_2,
+		.flags		= UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
+		.iotype		= UPIO_MEM,
+		.regshift	= 2,
+		.uartclk	= 0,
+	}, {
+	},
+};
+
+static struct resource dove_uart2_resources[] = {
+	{
+		.start		= DOVE_UART2_PHYS_BASE,
+		.end		= DOVE_UART2_PHYS_BASE + SZ_256 - 1,
+		.flags		= IORESOURCE_MEM,
+	}, {
+		.start		= IRQ_DOVE_UART_2,
+		.end		= IRQ_DOVE_UART_2,
+		.flags		= IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device dove_uart2 = {
+	.name			= "serial8250",
+	.id			= 2,
+	.dev			= {
+		.platform_data	= dove_uart2_data,
+	},
+	.resource		= dove_uart2_resources,
+	.num_resources		= ARRAY_SIZE(dove_uart2_resources),
+};
+
+void __init dove_uart2_init(void)
+{
+	platform_device_register(&dove_uart2);
+}
+
+/*****************************************************************************
+ * UART3
+ ****************************************************************************/
+static struct plat_serial8250_port dove_uart3_data[] = {
+	{
+		.mapbase	= DOVE_UART3_PHYS_BASE,
+		.membase	= (char *)DOVE_UART3_VIRT_BASE,
+		.irq		= IRQ_DOVE_UART_3,
+		.flags		= UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
+		.iotype		= UPIO_MEM,
+		.regshift	= 2,
+		.uartclk	= 0,
+	}, {
+	},
+};
+
+static struct resource dove_uart3_resources[] = {
+	{
+		.start		= DOVE_UART3_PHYS_BASE,
+		.end		= DOVE_UART3_PHYS_BASE + SZ_256 - 1,
+		.flags		= IORESOURCE_MEM,
+	}, {
+		.start		= IRQ_DOVE_UART_3,
+		.end		= IRQ_DOVE_UART_3,
+		.flags		= IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device dove_uart3 = {
+	.name			= "serial8250",
+	.id			= 3,
+	.dev			= {
+		.platform_data	= dove_uart3_data,
+	},
+	.resource		= dove_uart3_resources,
+	.num_resources		= ARRAY_SIZE(dove_uart3_resources),
+};
+
+void __init dove_uart3_init(void)
+{
+	platform_device_register(&dove_uart3);
+}
+
+/*****************************************************************************
+ * SPI0
+ ****************************************************************************/
+static struct orion_spi_info dove_spi0_data = {
+	.tclk		= 0,
+	.optional_div	= 1,
+};
+
+static struct resource dove_spi0_resources[] = {
+	{
+		.start	= DOVE_SPI0_PHYS_BASE,
+		.end	= DOVE_SPI0_PHYS_BASE + SZ_512 - 1,
+		.flags	= IORESOURCE_MEM,
+	}, {
+		.start	= IRQ_DOVE_SPI0,
+		.end	= IRQ_DOVE_SPI0,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device dove_spi0 = {
+	.name		= "orion_spi",
+	.id		= 0,
+	.resource	= dove_spi0_resources,
+	.dev		= {
+		.platform_data	= &dove_spi0_data,
+	},
+	.num_resources	= ARRAY_SIZE(dove_spi0_resources),
+};
+
+void __init dove_spi0_init(int use_interrupt)
+{
+	dove_spi0_data.use_interrupt = use_interrupt;
+	platform_device_register(&dove_spi0);
+}
+
+/*****************************************************************************
+ * SPI1
+ ****************************************************************************/
+static struct orion_spi_info dove_spi1_data = {
+	.tclk		= 0,
+	.optional_div	= 1,
+};
+
+static struct resource dove_spi1_resources[] = {
+	{
+		.start	= DOVE_SPI1_PHYS_BASE,
+		.end	= DOVE_SPI1_PHYS_BASE + SZ_512 - 1,
+		.flags	= IORESOURCE_MEM,
+	}, {
+		.start	= IRQ_DOVE_SPI1,
+		.end	= IRQ_DOVE_SPI1,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device dove_spi1 = {
+	.name		= "orion_spi",
+	.id		= 1,
+	.resource	= dove_spi1_resources,
+	.dev		= {
+		.platform_data	= &dove_spi1_data,
+	},
+	.num_resources	= ARRAY_SIZE(dove_spi1_resources),
+};
+
+void __init dove_spi1_init(int use_interrupt)
+{
+	dove_spi1_data.use_interrupt = use_interrupt;
+	platform_device_register(&dove_spi1);
+}
+
+/*****************************************************************************
+ * LCD SPI
+ ****************************************************************************/
+static struct mv_spi_info dove_lcd_spi_data = {
+	.clk		= 400000000,
+};
+
+static struct resource dove_lcd_spi_resources[] = {
+	{
+		.start	= DOVE_LCD_PHYS_BASE + 0x10000,
+		.end	= DOVE_LCD_PHYS_BASE + 0x10000 + SZ_512 - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device dove_lcd_spi = {
+	.name		= "mv_spi",
+	.id		= 2,
+	.dev		= {
+		.platform_data	= &dove_lcd_spi_data,
+	},
+};
+
+void __init dove_lcd_spi_init(void)
+{
+	platform_device_register(&dove_lcd_spi);
+}
+
+/*****************************************************************************
+ * I2C
+ ****************************************************************************/
+static struct mv64xxx_i2c_pdata dove_i2c_data = {
+	.freq_m		= 10, /* assumes 166 MHz TCLK gets 94.3kHz */
+	.freq_n		= 3,
+	.delay_after_stop = 3, /* 3 ms delay needed when freq is 94.3kHz */
+	.timeout	= 1000, /* Default timeout of 1 second */
+#ifdef CONFIG_I2C_MV64XXX_PORT_EXPANDER
+	.select_exp_port = dove_select_exp_port,
+#endif
+};
+
+static struct resource dove_i2c_resources[] = {
+	{
+		.name	= "i2c base",
+		.start	= DOVE_I2C_PHYS_BASE,
+		.end	= DOVE_I2C_PHYS_BASE + 0x20 -1,
+		.flags	= IORESOURCE_MEM,
+	}, {
+		.name	= "i2c irq",
+		.start	= IRQ_DOVE_I2C,
+		.end	= IRQ_DOVE_I2C,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device dove_i2c = {
+	.name		= MV64XXX_I2C_CTLR_NAME,
+	.id		= 0,
+	.num_resources	= ARRAY_SIZE(dove_i2c_resources),
+	.resource	= dove_i2c_resources,
+	.dev		= {
+		.platform_data = &dove_i2c_data,
+	},
+};
+#ifdef CONFIG_I2C_MV64XXX_PORT_EXPANDER
+static struct mv64xxx_i2c_exp_pdata dove_i2c_exp_port0_data = {
+	.hw_adapter	= &dove_i2c,
+	.timeout	= 1000, /* Default timeout of 1 second */
+};
+
+static struct platform_device dove_i2c_exp_port0 = {
+	.name		= MV64XXX_I2C_EXPANDER_NAME,
+	.id		= 0,
+	.dev		= {
+		.platform_data = &dove_i2c_exp_port0_data,
+	},
+};
+
+static struct mv64xxx_i2c_exp_pdata dove_i2c_exp_port1_data = {
+	.hw_adapter	= &dove_i2c,
+	.timeout	= 1000, /* Default timeout of 1 second */
+};
+
+static struct platform_device dove_i2c_exp_port1 = {
+	.name		= MV64XXX_I2C_EXPANDER_NAME,
+	.id		= 1,
+	.dev		= {
+		.platform_data = &dove_i2c_exp_port1_data,
+	},
+};
+
+static struct mv64xxx_i2c_exp_pdata dove_i2c_exp_port2_data = {
+	.hw_adapter	= &dove_i2c,
+	.timeout	= 1000, /* Default timeout of 1 second */
+};
+
+static struct platform_device dove_i2c_exp_port2 = {
+	.name		= MV64XXX_I2C_EXPANDER_NAME,
+	.id		= 2,
+	.dev		= {
+		.platform_data = &dove_i2c_exp_port2_data,
+	},
+};
+#endif
+void __init dove_i2c_init(void)
+{
+	platform_device_register(&dove_i2c);
+}
+
+void __init dove_i2c_exp_init(int nr)
+{
+#ifdef CONFIG_I2C_MV64XXX_PORT_EXPANDER
+	if (nr == 0) {
+		dove_i2c_exp_port0_data.hw_adapter = &dove_i2c;
+		platform_device_register(&dove_i2c_exp_port0);
+	}
+
+	if (nr == 1) {
+		dove_i2c_exp_port1_data.hw_adapter = &dove_i2c;
+		platform_device_register(&dove_i2c_exp_port1);
+	}
+	if (nr == 2) {
+		dove_i2c_exp_port2_data.hw_adapter = &dove_i2c;
+		platform_device_register(&dove_i2c_exp_port2);
+	}
+#endif
+}
+
+#ifdef CONFIG_DOVE_DB_USE_GPIO_I2C
+static struct i2c_gpio_platform_data dove_gpio_i2c_pdata = {
+	.sda_pin	= 17,
+	.scl_pin	= 19,
+	.udelay		= 2, /* ~100 kHz */
+};
+
+static struct platform_device dove_gpio_i2c_device = {
+	.name                   = "i2c-gpio",
+	.id                     = 1,
+	.dev.platform_data      = &dove_gpio_i2c_pdata,
+};
+
+void __init dove_add_gpio_i2c(void)
+{
+	platform_device_register(&dove_gpio_i2c_device);
+}
+#endif
+
+/*****************************************************************************
+ * Camera
+ ****************************************************************************/
+static struct resource dove_cam_resources[] = {
+	{
+		.start	= DOVE_CAM_PHYS_BASE,
+		.end	= DOVE_CAM_PHYS_BASE + SZ_16K - 1,
+		.flags	= IORESOURCE_MEM,
+	}, {
+		.start	= IRQ_DOVE_CAM,
+		.end	= IRQ_DOVE_CAM,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static u64 dove_cam_dmamask = DMA_BIT_MASK(32);
+
+static struct platform_device dove_cam = {
+	.name			= "cafe1000-ccic",
+	.id			= 0,
+	.dev			= {
+		.dma_mask		= &dove_cam_dmamask,
+		.coherent_dma_mask = 0xFFFFFFFF,
+	},
+	.num_resources		= ARRAY_SIZE(dove_cam_resources),
+	.resource		= dove_cam_resources,
+};
+
+void __init dove_cam_init(struct cafe_cam_platform_data *cafe_cam_data)
+{
+	dove_cam.dev.platform_data = cafe_cam_data;
+	platform_device_register(&dove_cam);
+}
+
+/*****************************************************************************
+ * SDIO and Camera mbus driver
+ ****************************************************************************/
+#define DOVE_SDHCI_CAM_MBUS_PHYS_BASE DOVE_CAFE_WIN_PHYS_BASE
+static struct resource dove_sdhci_cam_mbus_resources[] = {
+	{
+		.start	= DOVE_SDHCI_CAM_MBUS_PHYS_BASE,
+		.end	= DOVE_SDHCI_CAM_MBUS_PHYS_BASE + 64 - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device dove_sdhci_cam_mbus = {
+	.name			= "sdhci_cam_mbus",
+	.id			= 0,
+	.dev			= {
+		.platform_data	= &dove_mbus_dram_info,
+	},
+	.num_resources		= ARRAY_SIZE(dove_sdhci_cam_mbus_resources),
+	.resource		= dove_sdhci_cam_mbus_resources,
+};
+
+void __init dove_sdhci_cam_mbus_init(void)
+{
+	platform_device_register(&dove_sdhci_cam_mbus);
+}
+
+/*****************************************************************************
+ * I2S/SPDIF
+ ****************************************************************************/
+static struct resource dove_i2s0_resources[] = {
+	[0] = {
+		.start  = DOVE_AUD0_PHYS_BASE,
+		.end    = DOVE_AUD0_PHYS_BASE + SZ_16K -1,
+		.flags  = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start  = IRQ_DOVE_I2S0,
+		.end    = IRQ_DOVE_I2S0,
+		.flags  = IORESOURCE_IRQ,
+	}
+};
+
+static u64 dove_i2s0_dmamask = 0xFFFFFFFFUL;
+
+ 
+static struct platform_device dove_i2s0 = {
+	.name           = "mv88fx_snd",
+	.id             = 0,
+	.dev            = {
+		.dma_mask = &dove_i2s0_dmamask,
+		.coherent_dma_mask = 0xFFFFFFFF,
+	},
+	.num_resources  = ARRAY_SIZE(dove_i2s0_resources),
+	.resource       = dove_i2s0_resources,
+};
+
+static struct resource dove_i2s1_resources[] = {
+	[0] = {
+		.start  = DOVE_AUD1_PHYS_BASE,
+		.end    = DOVE_AUD1_PHYS_BASE + SZ_16K -1,
+		.flags  = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start  = IRQ_DOVE_I2S1,
+		.end    = IRQ_DOVE_I2S1,
+		.flags  = IORESOURCE_IRQ,
+	}
+};
+
+static u64 dove_i2s1_dmamask = 0xFFFFFFFFUL;
+
+static struct platform_device dove_i2s1 = {
+	.name           = "mv88fx_snd",
+	.id             = 1,
+	.dev            = {
+		.dma_mask = &dove_i2s1_dmamask,
+		.coherent_dma_mask = 0xFFFFFFFF,
+	},
+	.num_resources  = ARRAY_SIZE(dove_i2s1_resources),
+	.resource       = dove_i2s1_resources,
+};
+
+static struct platform_device dove_mv88fx_i2s0 = {
+	.name           = "mv88fx-i2s",
+	.id             = 0,
+};
+
+static struct platform_device dove_mv88fx_i2s1 = {
+	.name           = "mv88fx-i2s",
+	.id             = 1,
+};
+
+
+void __init dove_i2s_init(int port, struct orion_i2s_platform_data *i2s_data)
+{
+	switch(port){
+	case 0:
+		platform_device_register(&dove_mv88fx_i2s0);
+		i2s_data->dram = &dove_mbus_dram_info;
+		dove_i2s0.dev.platform_data = i2s_data;
+		platform_device_register(&dove_i2s0);
+		return;
+	case 1:
+		platform_device_register(&dove_mv88fx_i2s1);
+		i2s_data->dram = &dove_mbus_dram_info;
+		dove_i2s1.dev.platform_data = i2s_data;
+		platform_device_register(&dove_i2s1);
+		return;
+	default:
+		BUG();
+	}
+
+		
+}
+
+/*****************************************************************************
+ * CESA
+ ****************************************************************************/
+struct mv_cesa_addr_dec_platform_data dove_cesa_addr_dec_data = {
+	.dram		= &dove_mbus_dram_info,
+};
+
+static struct platform_device dove_cesa_ocf = {
+	.name           = "dove_cesa_ocf",
+	.id             = -1,
+	.dev		= {
+		.platform_data	= &dove_cesa_addr_dec_data,
+	},
+};
+
+static struct platform_device dove_cesadev = {
+	.name           = "dove_cesadev",
+	.id             = -1,
+};
+
+
+void __init dove_cesa_init(void)
+{
+	platform_device_register(&dove_cesa_ocf);
+	platform_device_register(&dove_cesadev);
+}
+
+/*****************************************************************************
+ * VPU
+ ****************************************************************************/
+static struct resource dove_vmeta_resources[] = {
+	[0] = {
+		.start	= DOVE_VPU_PHYS_BASE,
+		.end	= DOVE_VPU_PHYS_BASE + 0x280000 - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {		/* Place holder for reserved memory */
+		.start	= 0,
+		.end	= 0,
+		.flags	= IORESOURCE_MEM,
+	},
+	[2] = {
+		.start  = IRQ_DOVE_VMETA_DMA1,
+		.end    = IRQ_DOVE_VMETA_DMA1,
+		.flags  = IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device dove_vmeta = {
+	.name		= "ap510-vmeta",
+	.id		= 0,
+	.dev		= {
+		.dma_mask		= DMA_BIT_MASK(32),
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+	},
+	.resource	= dove_vmeta_resources,
+	.num_resources	= ARRAY_SIZE(dove_vmeta_resources),
+};
+
+void __init dove_vmeta_init(void)
+{
+#ifdef CONFIG_UIO_VMETA
+	if (vmeta_size == 0) {
+		printk("memory allocation for VMETA failed\n");
+		return;
+	}
+
+	dove_vmeta_resources[1].start = dove_vmeta_memory_start;
+	dove_vmeta_resources[1].end = dove_vmeta_memory_start + vmeta_size - 1;
+
+	platform_device_register(&dove_vmeta);
+#endif
+}
+
+#ifdef CONFIG_DOVE_VPU_USE_BMM
+unsigned int dove_vmeta_get_memory_start(void)
+{
+	return dove_vmeta_memory_start;
+}
+EXPORT_SYMBOL(dove_vmeta_get_memory_start);
+
+int dove_vmeta_get_memory_size(void)
+{
+	return vmeta_size;
+}
+EXPORT_SYMBOL(dove_vmeta_get_memory_size);
+#endif
+
+/*****************************************************************************
+ * GPU
+ ****************************************************************************/
+static struct resource dove_gpu_resources[] = {
+	{
+		.name   = "gpu_irq",
+		.start	= IRQ_DOVE_GPU,
+		.end	= IRQ_DOVE_GPU,
+		.flags	= IORESOURCE_IRQ,
+	},
+	{
+		.name   = "gpu_base",
+		.start	= DOVE_GPU_PHYS_BASE,
+		.end	= DOVE_GPU_PHYS_BASE + 0x40000 - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+	{
+		.name   = "gpu_mem",
+		.start	= 0,
+		.end	= 0,
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device dove_gpu = {
+	.name		= "galcore",
+	.id		= 0,
+	.num_resources  = ARRAY_SIZE(dove_gpu_resources),
+	.resource       = dove_gpu_resources,
+};
+
+void __init dove_gpu_init(void)
+{
+#ifdef CONFIG_DOVE_GPU
+	if (gpu_size == 0) {
+		printk("memory allocation for GPU failed\n");
+		return;
+	}
+
+	dove_gpu_resources[2].start = dove_gpu_memory_start;
+	dove_gpu_resources[2].end = dove_gpu_memory_start + gpu_size - 1;
+	
+	platform_device_register(&dove_gpu);
+#endif
+}
+
+#ifdef CONFIG_DOVE_GPU_USE_BMM
+unsigned int dove_gpu_get_memory_start(void)
+{
+	return dove_gpu_memory_start;
+}
+EXPORT_SYMBOL(dove_gpu_get_memory_start);
+
+int dove_gpu_get_memory_size(void)
+{
+	return gpu_size;
+}
+EXPORT_SYMBOL(dove_gpu_get_memory_size);
+#endif
+
+/*****************************************************************************
+ * SSP
+ ****************************************************************************/
+static struct resource dove_ssp_resources[] = {
+	{
+		.name	= "ssp base",
+		.start	=  DOVE_SSP_PHYS_BASE,
+		.end	=  DOVE_SSP_PHYS_BASE +  64 - 1,
+		.flags	= IORESOURCE_MEM,
+	}, {
+		.name	= "ssp csr",
+		.start	=  DOVE_SSP_CTRL_STATUS_1,
+		.end	=  DOVE_SSP_CTRL_STATUS_1 +  16 - 1,
+		.flags	= IORESOURCE_MEM,
+	}, {
+		.name	= "ssp irq",
+		.start	= IRQ_DOVE_SSP,
+		.end	= IRQ_DOVE_SSP,
+		.flags	= IORESOURCE_IRQ,
+	},
+	{
+		/* Receive */
+		.start	= 13,
+		.end	= 13,
+		.flags	= IORESOURCE_DMA,
+	},
+	{
+		/* Transmit */
+		.start	= 14,
+		.end	= 14,
+		.flags	= IORESOURCE_DMA,
+	},
+
+};
+
+
+
+
+static struct platform_device dove_ssp_pdev = {
+	.name		= "dove-ssp",
+	.id		= 0,
+	.dev = {
+		.platform_data = NULL,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+	},
+	.num_resources	= ARRAY_SIZE(dove_ssp_resources),
+	.resource	= dove_ssp_resources,
+};
+
+
+
+void __init dove_ssp_init(struct dove_ssp_platform_data *pdata)
+{
+	dove_ssp_pdev.dev.platform_data = pdata;
+	platform_device_register(&dove_ssp_pdev);
+}
+
+
+/*****************************************************************************
+ * TACT switch
+ ****************************************************************************/
+static struct platform_device dove_tact = {
+	.name			= "gpio_mouse",
+	.id			= 0,
+};
+
+void __init dove_tact_init(struct gpio_mouse_platform_data *tact_data)
+{
+	dove_tact.dev.platform_data = tact_data;
+	platform_device_register(&dove_tact);
+}
+
+/*****************************************************************************
+ * Time handling
+ ****************************************************************************/
+
+static void dove_timer_init(void)
+{
+	orion_time_init(IRQ_DOVE_BRIDGE, dove_tclk_get());
+}
+
+struct sys_timer dove_timer = {
+	.init = dove_timer_init,
+};
+
+/*****************************************************************************
+ * XOR 
+ ****************************************************************************/
+static struct mv_xor_platform_shared_data dove_xor_shared_data = {
+	.dram		= &dove_mbus_dram_info,
+};
+
+/*****************************************************************************
+ * XOR 0
+ ****************************************************************************/
+static u64 dove_xor0_dmamask = DMA_BIT_MASK(32);
+
+static struct resource dove_xor0_shared_resources[] = {
+	{
+		.name	= "xor 0 low",
+		.start	= DOVE_XOR0_PHYS_BASE,
+		.end	= DOVE_XOR0_PHYS_BASE + 0xff,
+		.flags	= IORESOURCE_MEM,
+	}, {
+		.name	= "xor 0 high",
+		.start	= DOVE_XOR0_HIGH_PHYS_BASE,
+		.end	= DOVE_XOR0_HIGH_PHYS_BASE + 0xff,
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device dove_xor0_shared = {
+	.name		= MV_XOR_SHARED_NAME,
+	.id		= 0,
+	.dev		= {
+		.platform_data = &dove_xor_shared_data,
+	},
+	.num_resources	= ARRAY_SIZE(dove_xor0_shared_resources),
+	.resource	= dove_xor0_shared_resources,
+};
+
+static struct resource dove_xor00_resources[] = {
+	[0] = {
+		.start	= IRQ_DOVE_XOR_00,
+		.end	= IRQ_DOVE_XOR_00,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct mv_xor_platform_data dove_xor00_data = {
+	.shared		= &dove_xor0_shared,
+	.hw_id		= 0,
+	.pool_size	= PAGE_SIZE,
+};
+
+static struct platform_device dove_xor00_channel = {
+	.name		= MV_XOR_NAME,
+	.id		= 0,
+	.num_resources	= ARRAY_SIZE(dove_xor00_resources),
+	.resource	= dove_xor00_resources,
+	.dev		= {
+		.dma_mask		= &dove_xor0_dmamask,
+		.coherent_dma_mask	= DMA_BIT_MASK(64),
+		.platform_data		= (void *)&dove_xor00_data,
+	},
+};
+
+static struct resource dove_xor01_resources[] = {
+	[0] = {
+		.start	= IRQ_DOVE_XOR_01,
+		.end	= IRQ_DOVE_XOR_01,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct mv_xor_platform_data dove_xor01_data = {
+	.shared		= &dove_xor0_shared,
+	.hw_id		= 1,
+	.pool_size	= PAGE_SIZE,
+};
+
+static struct platform_device dove_xor01_channel = {
+	.name		= MV_XOR_NAME,
+	.id		= 1,
+	.num_resources	= ARRAY_SIZE(dove_xor01_resources),
+	.resource	= dove_xor01_resources,
+	.dev		= {
+		.dma_mask		= &dove_xor0_dmamask,
+		.coherent_dma_mask	= DMA_BIT_MASK(64),
+		.platform_data		= (void *)&dove_xor01_data,
+	},
+};
+
+void __init dove_xor0_init(void)
+{
+	if(useHalDrivers) {
+		platform_device_register_simple("mv_xor_hal", -1, NULL, 0);
+	} else {
+		platform_device_register(&dove_xor0_shared);
+
+		/*
+		 * two engines can't do memset simultaneously, this limitation
+		 * satisfied by removing memset support from one of the engines.
+		 */
+		dma_cap_set(DMA_MEMCPY, dove_xor00_data.cap_mask);
+		dma_cap_set(DMA_XOR, dove_xor00_data.cap_mask);
+		platform_device_register(&dove_xor00_channel);
+
+		dma_cap_set(DMA_MEMCPY, dove_xor01_data.cap_mask);
+		dma_cap_set(DMA_MEMSET, dove_xor01_data.cap_mask);
+		dma_cap_set(DMA_XOR, dove_xor01_data.cap_mask);
+		platform_device_register(&dove_xor01_channel);
+	}
+}
+
+/*****************************************************************************
+ * XOR 1
+ ****************************************************************************/
+static u64 dove_xor1_dmamask = DMA_BIT_MASK(32);
+
+static struct resource dove_xor1_shared_resources[] = {
+	{
+		.name	= "xor 0 low",
+		.start	= DOVE_XOR1_PHYS_BASE,
+		.end	= DOVE_XOR1_PHYS_BASE + 0xff,
+		.flags	= IORESOURCE_MEM,
+	}, {
+		.name	= "xor 0 high",
+		.start	= DOVE_XOR1_HIGH_PHYS_BASE,
+		.end	= DOVE_XOR1_HIGH_PHYS_BASE + 0xff,
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device dove_xor1_shared = {
+	.name		= MV_XOR_SHARED_NAME,
+	.id		= 1,
+	.dev		= {
+		.platform_data = &dove_xor_shared_data,
+	},
+	.num_resources	= ARRAY_SIZE(dove_xor1_shared_resources),
+	.resource	= dove_xor1_shared_resources,
+};
+
+static struct resource dove_xor10_resources[] = {
+	[0] = {
+		.start	= IRQ_DOVE_XOR_10,
+		.end	= IRQ_DOVE_XOR_10,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct mv_xor_platform_data dove_xor10_data = {
+	.shared		= &dove_xor1_shared,
+	.hw_id		= 0,
+	.pool_size	= PAGE_SIZE,
+};
+
+static struct platform_device dove_xor10_channel = {
+	.name		= MV_XOR_NAME,
+	.id		= 2,
+	.num_resources	= ARRAY_SIZE(dove_xor10_resources),
+	.resource	= dove_xor10_resources,
+	.dev		= {
+		.dma_mask		= &dove_xor1_dmamask,
+		.coherent_dma_mask	= DMA_BIT_MASK(64),
+		.platform_data		= (void *)&dove_xor10_data,
+	},
+};
+
+static struct resource dove_xor11_resources[] = {
+	[0] = {
+		.start	= IRQ_DOVE_XOR_11,
+		.end	= IRQ_DOVE_XOR_11,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct mv_xor_platform_data dove_xor11_data = {
+	.shared		= &dove_xor1_shared,
+	.hw_id		= 1,
+	.pool_size	= PAGE_SIZE,
+};
+
+static struct platform_device dove_xor11_channel = {
+	.name		= MV_XOR_NAME,
+	.id		= 3,
+	.num_resources	= ARRAY_SIZE(dove_xor11_resources),
+	.resource	= dove_xor11_resources,
+	.dev		= {
+		.dma_mask		= &dove_xor1_dmamask,
+		.coherent_dma_mask	= DMA_BIT_MASK(64),
+		.platform_data		= (void *)&dove_xor11_data,
+	},
+};
+
+void __init dove_xor1_init(void)
+{
+	if(useHalDrivers)
+		dove_xor_shared_data.dram = NULL;
+	platform_device_register(&dove_xor1_shared);
+
+	/*
+	 * two engines can't do memset simultaneously, this limitation
+	 * satisfied by removing memset support from one of the engines.
+	 */
+	dma_cap_set(DMA_MEMCPY, dove_xor10_data.cap_mask);
+	dma_cap_set(DMA_XOR, dove_xor10_data.cap_mask);
+	platform_device_register(&dove_xor10_channel);
+
+	dma_cap_set(DMA_MEMCPY, dove_xor11_data.cap_mask);
+	dma_cap_set(DMA_MEMSET, dove_xor11_data.cap_mask);
+	dma_cap_set(DMA_XOR, dove_xor11_data.cap_mask);
+	platform_device_register(&dove_xor11_channel);
+}
+
+/*****************************************************************************
+ * General
+ ****************************************************************************/
+static struct gpio_keys_button gpio_standby_button = {
+	.code			= KEY_POWER,
+	.desc			= "standby",
+	.type			= EV_KEY,
+	.active_low		= 1,
+	.wakeup			= 1,
+};
+
+static struct gpio_keys_platform_data gpio_standby_data = {
+	.buttons  = &gpio_standby_button,
+	.nbuttons = 1,
+};
+
+static struct platform_device gpio_standby_keys = {
+	.name = "gpio-keys",
+	.dev  = {
+		.platform_data = &gpio_standby_data,
+	},
+	.id   = 0,
+};
+
+void __init dove_wakeup_button_setup(int gpio)
+{
+	orion_gpio_set_valid(gpio, 1);
+	gpio_standby_button.gpio = gpio;
+	platform_device_register(&gpio_standby_keys);
+}
+
+/*
+ * This fixup function is used to reserve memory for the GPU and VPU engines
+ * as these drivers require large chunks of consecutive memory.
+ */
+void __init dove_tag_fixup_mem32(struct machine_desc *mdesc, struct tag *t,
+		char **from, struct meminfo *meminfo)
+{
+	struct tag *last_tag = NULL;
+	int total_size = vmeta_size + gpu_size;
+
+	for (; t->hdr.size; t = tag_next(t))
+		if ((t->hdr.tag == ATAG_MEM) && (t->u.mem.size >= total_size)) {
+			if ((last_tag == NULL) ||
+			    (t->u.mem.start > last_tag->u.mem.start))
+				last_tag = t;
+		}
+
+	if (last_tag == NULL) {
+		early_printk(KERN_WARNING "No suitable memory tag was found, "
+				"required memory %d MB.\n", total_size);
+		vmeta_size = 0;
+		gpu_size = 0;
+		return;
+	}
+
+	/* Resereve memory from last tag for PVT tests	*/
+	last_tag->u.mem.size -= pvt_size;
+	dove_vmeta_memory_start = last_tag->u.mem.start + last_tag->u.mem.size;
+
+	/* Resereve memory from last tag for VPU usage.	*/
+	last_tag->u.mem.size -= vmeta_size;
+	dove_vmeta_memory_start = last_tag->u.mem.start + last_tag->u.mem.size;
+
+	/* Reserve memory for gpu usage */
+	last_tag->u.mem.size -= gpu_size;
+	dove_gpu_memory_start = last_tag->u.mem.start + last_tag->u.mem.size;
+}
+
+static struct resource dove_ac97_resources[] = {
+        [0] = {
+                .start  = DOVE_AC97_PHYS_BASE,
+                .end    = DOVE_AC97_PHYS_BASE + 0xfff,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_AC97,
+                .end    = IRQ_AC97,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static u64 dove_ac97_dmamask = DMA_BIT_MASK(32);
+
+
+struct platform_device dove_device_ac97 = {
+	.name           = "pxa2xx-ac97",
+	.id             = -1,
+	.dev            = {
+		.dma_mask = &dove_ac97_dmamask,
+		.coherent_dma_mask = DMA_BIT_MASK(32),
+	},
+	.num_resources  = ARRAY_SIZE(dove_ac97_resources),
+	.resource       = dove_ac97_resources,
+};
+
+void __init dove_ac97_setup(void)
+{
+	uint32_t reg;
+	/* Enable AC97 Control 			*/
+	reg = readl(DOVE_SB_REGS_VIRT_BASE + MPP_GENERAL_CONTROL_REG);
+	if ((reg & 0x10000) == 0) {
+		printk("\nError: AC97 is disabled according to sample at reset "
+			"option (Reg 0x%x).\n", MPP_GENERAL_CONTROL_REG);
+		return;
+	}
+
+	platform_device_register(&dove_device_ac97);
+}
+
+#ifdef CONFIG_PM
+static u32 dove_arbitration_regs[] = {
+	DOVE_MC_VIRT_BASE + 0x280,
+	DOVE_MC_VIRT_BASE + 0x510,
+};
+#endif
+void __init dove_config_arbitration(void)
+{
+	u32 sc_dec;
+
+	sc_dec = readl(DOVE_MC_VIRT_BASE + 0x280);
+	printk("DOVE_MC @ 0x280 is %08X\n", sc_dec);
+	#ifdef CONFIG_DOVE_REV_Y0
+	sc_dec &= 0xfff0ffff;
+	sc_dec |= 0x000e0000;
+	#endif
+	writel(sc_dec, DOVE_MC_VIRT_BASE + 0x280);
+	
+        /* Dove Z0 and Z1
+        * Master 0 - Vmeta
+        * Master 1 - GC500
+        * Master 2 - LCD
+        * Master 3 - Upstream (SB)
+        */
+
+	/* Dove Y0
+ 	 * MC Master 0 - CPU
+ 	 * MC Master 1 - vmeta-GC-UP
+ 	 * MC Master 2 - LCD
+ 	 */
+        /*
+  	 * MC Master 1
+         * Master 0 - Vmeta
+	 * Master 1 - GC500
+	 * Master 2 - LCD
+	 * Master 3 - Upstream (SB)
+	 */
+
+        sc_dec = readl(DOVE_MC_VIRT_BASE + 0x510);
+        printk("PLiao: DOVE_MC @ 0x510 is %08X\n", sc_dec);
+	
+	sc_dec &= 0xf0f0f0f0;
+#ifdef CONFIG_DOVE_REV_Y0
+	sc_dec |= 0x01010101;
+#endif
+        writel(sc_dec, DOVE_MC_VIRT_BASE + 0x510);
+        /* End of supersection testing */
+#ifdef CONFIG_PM
+	pm_registers_add(dove_arbitration_regs,
+			 ARRAY_SIZE(dove_arbitration_regs));
+#endif
+}
+
+#ifdef CONFIG_DEBUG_LL
+extern void printascii(const char *);
+static void check_cpu_mode(void)
+{
+		u32 cpu_id_code_ext;
+		int cpu_mode = 0;
+		asm volatile("mrc p15, 1, %0, c15, c12, 0": "=r"(cpu_id_code_ext));
+
+		if (((cpu_id_code_ext >> 16) & 0xF) == 0x2)
+			cpu_mode = 6;
+		else if (((cpu_id_code_ext >> 16) & 0xF) == 0x3)
+			cpu_mode = 7;
+		else 
+			pr_err("unknow cpu mode!!!\n");
+
+#ifdef CONFIG_DOVE_DEBUGGER_MODE_V6
+		if (cpu_mode != 6) {
+			printascii("cpu mode (ARMv7) doesn't mach kernel configuration\n");
+			panic("cpu mode mismatch");
+		}
+#else
+#ifdef CONFIG_CPU_V7
+		if (cpu_mode != 7) {
+			printascii("cpu mode (ARMv6) doesn't mach kernel configuration\n");
+			panic("cpu mode mismatch");
+		}
+#endif
+#endif
+}
+#endif
+void __init dove_init(void)
+{
+	int tclk;
+	struct clk *clk;
+
+	dove_devclks_init();
+	clk = clk_get(NULL, "tclk");
+	if (IS_ERR(clk)) {
+	     printk(KERN_ERR "failed to get tclk \n");
+	     return;
+	}
+	tclk = clk_get_rate(clk);
+
+	printk(KERN_INFO "Dove %s SoC, ", dove_id());
+	printk("TCLK = %dMHz\n", (tclk + 499999) / 1000000);
+#ifdef CONFIG_DEBUG_LL
+	check_cpu_mode();
+#endif
+	dove_setup_cpu_mbus();
+	dove_config_arbitration();
+#if defined(CONFIG_CACHE_TAUROS2)
+	if (!noL2)
+		tauros2_init();
+#endif
+	dove_clk_config(NULL, "GCCLK", 500*1000000);
+	dove_clk_config(NULL, "AXICLK", 333*1000000);
+
+#if 1
+	dove_ge00_shared_data.t_clk = tclk;
+#endif
+	dove_uart0_data[0].uartclk = tclk;
+	dove_uart1_data[0].uartclk = tclk;
+	dove_uart2_data[0].uartclk = tclk;
+	dove_uart3_data[0].uartclk = tclk;
+	dove_spi0_data.tclk = tclk;
+	dove_spi1_data.tclk = tclk;
+}
+
+#ifdef CONFIG_PM
+void dove_save_cpu_conf_regs(void)
+{
+	DOVE_DWNSTRM_BRDG_SAVE(CPU_CONFIG);
+	DOVE_DWNSTRM_BRDG_SAVE(CPU_CONTROL);
+	DOVE_DWNSTRM_BRDG_SAVE(RSTOUTn_MASK);
+	DOVE_DWNSTRM_BRDG_SAVE(BRIDGE_MASK);
+	DOVE_DWNSTRM_BRDG_SAVE(POWER_MANAGEMENT);
+}
+
+void dove_restore_cpu_conf_regs(void)
+{
+	DOVE_DWNSTRM_BRDG_RESTORE(CPU_CONFIG);
+	DOVE_DWNSTRM_BRDG_RESTORE(CPU_CONTROL);
+	DOVE_DWNSTRM_BRDG_RESTORE(RSTOUTn_MASK);
+	DOVE_DWNSTRM_BRDG_RESTORE(BRIDGE_MASK);
+	DOVE_DWNSTRM_BRDG_RESTORE(POWER_MANAGEMENT);
+}
+
+void dove_save_upstream_regs(void)
+{
+	DOVE_UPSTRM_BRDG_SAVE(UPSTRM_AXI_P_D_CTRL_REG);
+	DOVE_UPSTRM_BRDG_SAVE(UPSTRM_D2X_ARB_LO_REG);
+	DOVE_UPSTRM_BRDG_SAVE(UPSTRM_D2X_ARB_HI_REG);
+}
+
+void dove_restore_upstream_regs(void)
+{
+	DOVE_UPSTRM_BRDG_RESTORE(UPSTRM_AXI_P_D_CTRL_REG);
+	DOVE_UPSTRM_BRDG_RESTORE(UPSTRM_D2X_ARB_LO_REG);
+	DOVE_UPSTRM_BRDG_RESTORE(UPSTRM_D2X_ARB_HI_REG);
+}
+
+void dove_save_timer_regs(void)
+{
+	DOVE_DWNSTRM_BRDG_SAVE(TIMER_CTRL);
+	DOVE_DWNSTRM_BRDG_SAVE(TIMER0_RELOAD);
+	DOVE_DWNSTRM_BRDG_SAVE(TIMER1_RELOAD);
+	DOVE_DWNSTRM_BRDG_SAVE(TIMER_WD_RELOAD);
+}
+
+void dove_restore_timer_regs(void)
+{
+	DOVE_DWNSTRM_BRDG_RESTORE(TIMER_CTRL);
+	DOVE_DWNSTRM_BRDG_RESTORE(TIMER0_RELOAD);
+	DOVE_DWNSTRM_BRDG_RESTORE(TIMER1_RELOAD);
+	DOVE_DWNSTRM_BRDG_RESTORE(TIMER_WD_RELOAD);
+}
+
+void dove_save_int_regs(void)
+{
+	DOVE_DWNSTRM_BRDG_SAVE(IRQ_MASK_LOW);
+	DOVE_DWNSTRM_BRDG_SAVE(FIQ_MASK_LOW);
+        DOVE_DWNSTRM_BRDG_SAVE(ENDPOINT_MASK_LOW);
+	DOVE_DWNSTRM_BRDG_SAVE(IRQ_MASK_HIGH);
+	DOVE_DWNSTRM_BRDG_SAVE(FIQ_MASK_HIGH);
+	DOVE_DWNSTRM_BRDG_SAVE(ENDPOINT_MASK_HIGH);
+	DOVE_DWNSTRM_BRDG_SAVE(PCIE_INTERRUPT_MASK);
+}
+
+void dove_restore_int_regs(void)
+{
+	DOVE_DWNSTRM_BRDG_RESTORE(IRQ_MASK_LOW);
+	DOVE_DWNSTRM_BRDG_RESTORE(FIQ_MASK_LOW);
+	DOVE_DWNSTRM_BRDG_RESTORE(ENDPOINT_MASK_LOW);
+	DOVE_DWNSTRM_BRDG_RESTORE(IRQ_MASK_HIGH);
+	DOVE_DWNSTRM_BRDG_RESTORE(FIQ_MASK_HIGH);
+	DOVE_DWNSTRM_BRDG_RESTORE(ENDPOINT_MASK_HIGH);
+	DOVE_DWNSTRM_BRDG_RESTORE(PCIE_INTERRUPT_MASK);
+}
+#endif
+
+
+
+#ifdef CONFIG_USB_ANDROID
+static char *usb_functions[] = {
+#ifdef CONFIG_USB_ANDROID_ADB
+        "adb",
+#endif
+#ifdef CONFIG_USB_ANDROID_RNDIS
+        "rndis",
+#endif
+#ifdef CONFIG_USB_ANDROID_ACM
+        "acm",
+#endif
+#if defined(CONFIG_USB_ANDROID_MASS_STORAGE) || defined(CONFIG_USB_FILE_STORAG)
+        "usb_mass_storage",
+#endif
+};
+
+#if defined(CONFIG_USB_ANDROID_MASS_STORAGE) || defined(CONFIG_USB_FILE_STORAG)
+static struct usb_mass_storage_platform_data mass_storage_pdata = {
+        .nluns = 2,
+        .vendor = "Marvell     ",
+        .product = "Android   ",
+        .release = 0x0100,
+};
+
+
+static struct platform_device usb_mass_storage_device = {
+        .name = "usb_mass_storage",
+        .id = -1,
+        .dev = {
+                .platform_data = &mass_storage_pdata,
+        },
+};
+#endif
+
+static struct android_usb_platform_data android_usb_pdata = {
+        .vendor_id      = 0x0bb4, //temporary use HTC vendor name
+        .product_id     = 0x0c01,
+        .version        = 0x0100,
+        .product_name   = "Android",
+        .manufacturer_name = "Marvell",
+        .num_functions  = ARRAY_SIZE(usb_functions),
+        .functions      = &usb_functions,
+};
+
+static struct platform_device android_device_usb = {
+        .name   = "android_usb",
+        .id             = -1,
+        .dev            = {
+                .platform_data = &android_usb_pdata,
+        },
+};
+
+
+void android_add_usb_devices(void)
+{
+#if defined(CONFIG_USB_ANDROID_MASS_STORAGE) || defined(CONFIG_USB_FILE_STORAG)
+        platform_device_register(&usb_mass_storage_device);
+#endif
+        platform_device_register(&android_device_usb);
+}
+
+
+struct platform_device dove_udc = {
+        .name           = "mv_udc",
+        .id             = -1,
+        .resource       = dove_ehci1_resources,
+        .num_resources  = ARRAY_SIZE(dove_ehci1_resources),
+
+};
+
+void __init dove_udc_init(void)
+{
+        platform_device_register(&dove_udc);
+}
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/addr-map.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/addr-map.c
@@ -0,0 +1,219 @@
+/*
+ * arch/arm/mach-dove/addr-map.c
+ *
+ * Address map functions for Marvell Dove MV88F6781 SoC
+ *
+ * Author: Tzachi Perelstein <tzachi@marvell.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/mbus.h>
+#include <asm/mach/arch.h>
+//#include <asm/hardware.h>
+#include <asm/io.h>
+#include <asm/setup.h>
+#include "common.h"
+
+/*
+ * Generic Address Decode Windows bit settings
+ */
+#define TARGET_DDR		0x0
+#define TARGET_BOOTROM		0x1
+#define TARGET_CESA		0x3
+#define TARGET_PCIE0		0x4
+#define TARGET_PCIE1		0x8
+#define TARGET_SCRATCHPAD	0xd
+
+#define ATTR_CESA		0x01
+#define ATTR_BOOTROM		0xfd
+#define ATTR_DEV_SPI0_ROM	0xfe
+#define ATTR_DEV_SPI1_ROM	0xfb
+#define ATTR_PCIE_IO		0xe0
+#define ATTR_PCIE_MEM		0xe8
+#define ATTR_SCRATCHPAD		0x0
+
+/*
+ * CPU Address Decode Windows registers
+ */
+#define WIN_CTRL(n)	(BRIDGE_VIRT_BASE + ((n) << 4) + 0x0)
+#define WIN_BASE(n)	(BRIDGE_VIRT_BASE + ((n) << 4) + 0x4)
+#define WIN_REMAP_LO(n)	(BRIDGE_VIRT_BASE + ((n) << 4) + 0x8)
+#define WIN_REMAP_HI(n)	(BRIDGE_VIRT_BASE + ((n) << 4) + 0xc)
+
+struct mbus_dram_target_info dove_mbus_dram_info;
+
+static inline void __iomem *ddr_map_sc(int i)
+{
+	return (void __iomem *)(DOVE_MC_VIRT_BASE + 0x100 + ((i) << 4));
+}
+
+static int cpu_win_can_remap(int win)
+{
+	if (win < 4)
+		return 1;
+
+	return 0;
+}
+
+static void __init setup_cpu_win(int win, u32 base, u32 size,
+				 u8 target, u8 attr, int remap)
+{
+	u32 ctrl;
+
+	base &= 0xffff0000;
+	ctrl = ((size - 1) & 0xffff0000) | (attr << 8) | (target << 4) | 1;
+
+	writel(base, WIN_BASE(win));
+	writel(ctrl, WIN_CTRL(win));
+	if (cpu_win_can_remap(win)) {
+		if (remap < 0)
+			remap = base;
+		writel(remap & 0xffff0000, WIN_REMAP_LO(win));
+		writel(0, WIN_REMAP_HI(win));
+	}
+}
+
+void __init dove_setup_cpu_mbus(void)
+{
+	int i;
+	int cs;
+	u32 dev, rev;
+
+	/*
+	 * First, disable and clear windows.
+	 */
+	for (i = 0; i < 8; i++) {
+		writel(0, WIN_BASE(i));
+		writel(0, WIN_CTRL(i));
+		if (cpu_win_can_remap(i)) {
+			writel(0, WIN_REMAP_LO(i));
+			writel(0, WIN_REMAP_HI(i));
+		}
+	}
+
+	/*
+	 * Setup windows for PCIe IO+MEM space.
+	 */
+	setup_cpu_win(0, DOVE_PCIE0_IO_PHYS_BASE, DOVE_PCIE0_IO_SIZE,
+		      TARGET_PCIE0, ATTR_PCIE_IO, DOVE_PCIE0_IO_BUS_BASE);
+	setup_cpu_win(1, DOVE_PCIE1_IO_PHYS_BASE, DOVE_PCIE1_IO_SIZE,
+		      TARGET_PCIE1, ATTR_PCIE_IO, DOVE_PCIE1_IO_BUS_BASE);
+	setup_cpu_win(2, DOVE_PCIE0_MEM_PHYS_BASE, DOVE_PCIE0_MEM_SIZE,
+		      TARGET_PCIE0, ATTR_PCIE_MEM, -1);
+	setup_cpu_win(3, DOVE_PCIE1_MEM_PHYS_BASE, DOVE_PCIE1_MEM_SIZE,
+		      TARGET_PCIE1, ATTR_PCIE_MEM, -1);
+
+	/*
+	 * Setup window for CESA engine.
+	 */
+	setup_cpu_win(4, DOVE_CESA_PHYS_BASE, DOVE_CESA_SIZE,
+		      TARGET_CESA, ATTR_CESA, -1);
+
+	/*
+	 * Setup the Window to the BootROM for Stanby and Sleep Resume
+	 */
+	dove_pcie_id(&dev, &rev);
+	if (rev >= DOVE_REV_X0) /* For X0 and higher use the internal BootROM */
+		setup_cpu_win(5, DOVE_BOOTROM_PHYS_BASE, DOVE_BOOTROM_SIZE,
+			      TARGET_BOOTROM, ATTR_BOOTROM, -1);
+	else			/* Use the BootROM on the SPI */
+		setup_cpu_win(5, DOVE_BOOTROM_PHYS_BASE, DOVE_BOOTROM_SIZE,
+			      TARGET_BOOTROM, ATTR_DEV_SPI0_ROM, -1);
+
+	/*
+	 * Setup the Window to the PMU Scratch Pad space
+	 */
+	setup_cpu_win(6, DOVE_SCRATCHPAD_PHYS_BASE, DOVE_SCRATCHPAD_SIZE,
+		      TARGET_SCRATCHPAD, ATTR_SCRATCHPAD, -1);
+
+	/*
+	 * Setup MBUS dram target info.
+	 */
+	dove_mbus_dram_info.mbus_dram_target_id = TARGET_DDR;
+
+	for (i = 0, cs = 0; i < 2; i++) {
+		u32 map = readl(ddr_map_sc(i));
+
+		/*
+		 * Chip select enabled?
+		 */
+		if (map & 1) {
+			struct mbus_dram_window *w;
+
+			w = &dove_mbus_dram_info.cs[cs++];
+			w->cs_index = i;
+			w->mbus_attr = 0; /* CS address decoding done inside */
+					  /* the DDR controller, no need to  */
+					  /* provide attributes */
+			w->base = map & 0xff800000;
+			w->size = 0x100000 << (((map & 0x000f0000) >> 16) - 4);
+		}
+	}
+	dove_mbus_dram_info.num_cs = cs;
+}
+
+#ifdef CONFIG_PM
+static u32 wins_pm_regs[8*4];	/* max 4 registers per window */
+
+void dove_save_cpu_wins(void)
+{
+	int i;
+
+	/* Save all all address decode windows */
+	for (i = 0; i < 8; i++) {
+		wins_pm_regs[i*4] = readl(WIN_CTRL(i));
+		wins_pm_regs[i*4+1] = readl(WIN_BASE(i));
+		if (cpu_win_can_remap(i)) {
+			wins_pm_regs[i*4+2] = readl(WIN_REMAP_LO(i));
+			wins_pm_regs[i*4+3] = readl(WIN_REMAP_HI(i));
+		}
+	}
+}
+
+void dove_restore_cpu_wins(void)
+{
+	int i = 0;
+
+	/* Verify that all windows are closed before overloading them */
+	for (i = 0; i < 8; i++) 
+		writel(0, WIN_CTRL(i));
+
+	/* Restore original value */
+	for (i = 0; i < 8; i++) {
+		writel(wins_pm_regs[i*4+1], WIN_BASE(i));
+		if (cpu_win_can_remap(i))	{
+			writel(wins_pm_regs[i*4+2], WIN_REMAP_LO(i));
+			writel(wins_pm_regs[i*4+3], WIN_REMAP_HI(i));
+		}
+		writel(wins_pm_regs[i*4], WIN_CTRL(i));
+	}
+}
+#if 0
+static u32 orion_dev_wins_regs[ORION_DEV_WINS_REG_SAVE_SIZE];
+
+void orion_save_device_wins(void)
+{
+	/* Save BAR0 used for internal registers */
+	ORION_DEV_WINS_REGL_SAVE(PCIE_BAR_LO, 0);
+	ORION_DEV_WINS_REGL_SAVE(PCIE_BAR_HI, 0);
+}
+
+void orion_restore_device_wins(void)
+{
+	u32 dev, rev;
+
+	/* Reinitialize the Orion Devices windows to the DDR */
+	orion_pcie_id(&dev, &rev);
+	orion_setup_device_wins(dev);
+
+	/* Restore BAR0 used for the internal registers */
+	ORION_DEV_WINS_REGL_RESTORE(PCIE_BAR_LO, 0);
+	ORION_DEV_WINS_REGL_RESTORE(PCIE_BAR_HI, 0);
+}
+#endif
+#endif /* CONFIG_PM */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/dump_cp15_regs.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/dump_cp15_regs.c
@@ -0,0 +1,233 @@
+/*
+ * arch/arm/mach-dove/dump_cp15_regs.c
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/init.h>
+
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/types.h>
+#include <linux/proc_fs.h>
+
+static int
+proc_dump_cp15_read(char *page, char **start, off_t off, int count, int *eof,
+			void *data)
+{
+	char *p = page;
+	int len;
+	unsigned int value;
+	
+	asm volatile("mrc p15, 0, %0, c0, c0, 0": "=r"(value));
+	p += sprintf(p, "Main ID: 0x%08x\n", value);
+	
+	asm volatile("mrc p15, 0, %0, c0, c0, 1": "=r"(value));
+	p += sprintf(p, "Cache Type: 0x%08x\n", value);
+	
+	asm volatile("mrc p15, 0, %0, c0, c0, 3": "=r"(value));
+	p += sprintf(p, "TLB Type: 0x%08x\n", value);
+	
+	asm volatile("mrc p15, 0, %0, c0, c1, 0": "=r"(value));
+	p += sprintf(p, "Processor Feature 0: 0x%08x\n", value);
+	
+	asm volatile("mrc p15, 0, %0, c0, c1, 1": "=r"(value));
+	p += sprintf(p, "Processor Feature 1: 0x%08x\n", value);
+	
+	asm volatile("mrc p15, 0, %0, c0, c1, 2": "=r"(value));
+	p += sprintf(p, "Debug Feature 0: 0x%08x\n", value);
+	
+	asm volatile("mrc p15, 0, %0, c0, c1, 3": "=r"(value));
+	p += sprintf(p, "Auxiliary Feature 0: 0x%08x\n", value);
+	
+	asm volatile("mrc p15, 0, %0, c0, c1, 4": "=r"(value));
+	p += sprintf(p, "Memory Model Feature 0: 0x%08x\n", value);
+	
+	asm volatile("mrc p15, 0, %0, c0, c1, 5": "=r"(value));
+	p += sprintf(p, "Memory Model Feature 1: 0x%08x\n", value);
+	
+	asm volatile("mrc p15, 0, %0, c0, c1, 6": "=r"(value));
+	p += sprintf(p, "Memory Model Feature 2: 0x%08x\n", value);
+
+	asm volatile("mrc p15, 0, %0, c0, c1, 7": "=r"(value));
+	p += sprintf(p, "Memory Model Feature 3: 0x%08x\n", value);
+	
+	asm volatile("mrc p15, 0, %0, c0, c2, 0": "=r"(value));
+	p += sprintf(p, "Set Attribute 0: 0x%08x\n", value);
+	
+	asm volatile("mrc p15, 0, %0, c0, c2, 1": "=r"(value));
+	p += sprintf(p, "Set Attribute 1: 0x%08x\n", value);
+	
+	asm volatile("mrc p15, 0, %0, c0, c2, 2": "=r"(value));
+	p += sprintf(p, "Set Attribute 2: 0x%08x\n", value);
+
+	asm volatile("mrc p15, 0, %0, c0, c2, 3": "=r"(value));
+	p += sprintf(p, "Set Attribute 3: 0x%08x\n", value);
+	
+	asm volatile("mrc p15, 0, %0, c0, c2, 4": "=r"(value));
+	p += sprintf(p, "Set Attribute 4: 0x%08x\n", value);
+	
+	asm volatile("mrc p15, 0, %0, c0, c2, 5": "=r"(value));
+	p += sprintf(p, "Set Attribute 5: 0x%08x\n", value);
+#ifdef CONFIG_CPU_V7
+	asm volatile("mrc p15, 1, %0, c0, c0, 0": "=r"(value));
+	p += sprintf(p, "Current Cache Size ID: 0x%08x\n", value);
+	
+	asm volatile("mrc p15, 1, %0, c0, c0, 1": "=r"(value));
+	p += sprintf(p, "Current Cache Level ID: 0x%08x\n", value);
+
+	asm volatile("mrc p15, 2, %0, c0, c0, 0": "=r"(value));
+	p += sprintf(p, "Cache Size Selection: 0x%08x\n", value);
+
+#endif
+	asm volatile("mrc p15, 0, %0, c1, c0, 0": "=r"(value));
+	p += sprintf(p, "Control : 0x%08x\n", value);
+#if defined(CONFIG_CPU_V6) || defined(CONFIG_DOVE_DEBUGGER_MODE_V6)
+	p += sprintf(p, "    L2\t\t: %s\n", (value & (1 << 26)) ?
+		     "Enabled" : "Disabled");
+#endif
+	asm volatile("mrc p15, 0, %0, c1, c0, 1": "=r"(value));
+	p += sprintf(p, "Auxiliary Control : 0x%08x\n", value);
+
+#ifdef CONFIG_CPU_V7
+#ifndef CONFIG_DOVE_DEBUGGER_MODE_V6
+	p += sprintf(p, "    L2\t\t: %s\n", (value & (1 << 1)) ?
+		     "Enabled" : "Disabled");
+#endif
+#endif
+	asm volatile("mrc p15, 0, %0, c1, c0, 2": "=r"(value));
+	p += sprintf(p, "Coprocessor Access Control : 0x%08x\n", value);
+	
+	asm volatile("mrc p15, 0, %0, c1, c1, 0": "=r"(value));
+	p += sprintf(p, "Secure Configuration : 0x%08x\n", value);
+
+	asm volatile("mrc p15, 0, %0, c2, c0, 0": "=r"(value));
+	p += sprintf(p, "Translation Table Base 0 : 0x%08x\n", value);
+	
+	asm volatile("mrc p15, 0, %0, c2, c0, 1": "=r"(value));
+	p += sprintf(p, "Translation Table Base 1 : 0x%08x\n", value);
+	
+	asm volatile("mrc p15, 0, %0, c2, c0, 2": "=r"(value));
+	p += sprintf(p, "Translation Table Control : 0x%08x\n", value);
+	
+	asm volatile("mrc p15, 0, %0, c3, c0, 0": "=r"(value));
+	p += sprintf(p, "Domain Access Control : 0x%08x\n", value);
+	
+	asm volatile("mrc p15, 0, %0, c5, c0, 0": "=r"(value));
+	p += sprintf(p, "Data Fault Status : 0x%08x\n", value);
+
+	asm volatile("mrc p15, 0, %0, c5, c0, 1": "=r"(value));
+	p += sprintf(p, "Instruction Fault Status : 0x%08x\n", value);
+	
+	asm volatile("mrc p15, 0, %0, c6, c0, 0": "=r"(value));
+	p += sprintf(p, "Data Fault Address : 0x%08x\n", value);
+
+	asm volatile("mrc p15, 0, %0, c6, c0, 1": "=r"(value));
+	p += sprintf(p, "Watchpoint Fault Address : 0x%08x\n", value);
+
+	asm volatile("mrc p15, 0, %0, c6, c0, 2": "=r"(value));
+	p += sprintf(p, "Instruction Fault Address : 0x%08x\n", value);
+	
+	asm volatile("mrc p15, 0, %0, c7, c10, 6": "=r"(value));
+	p += sprintf(p, "Cache Dirty Status: 0x%08x\n", value);
+	
+	asm volatile("mrc p15, 1, %0, c15, c1, 0": "=r"(value));
+	p += sprintf(p, "L2 Extra Features: 0x%08x\n", value);
+
+	asm volatile("mrc p15, 1, %0, c15, c1, 0": "=r"(value));
+	p += sprintf(p, "Control Configuration: 0x%08x\n", value);
+	p += sprintf(p, "    Write Buffer Coalescing\t: %s\n", (value & (1 << 8)) ?
+		     "Enabled" : "Disabled");
+	if (value & (1 << 8))
+		p += sprintf(p, "    WB WAIT CYC\t: 0x%x\n", (value >> 9) & 0x7);
+
+	p += sprintf(p, "    Coprocessor dual issue \t: %s\n", (value & (1 << 15)) ?
+		     "Disabled" : "Enabled");
+
+	p += sprintf(p, "    L2 Cache Burst 8 \t: %s\n", (value & (1 << 20)) ?
+		     "Enabled" : "Disabled");
+
+	p += sprintf(p, "    L2 Cache Way 7-4 \t: %s\n", (value & (1 << 21)) ?
+		     "Disabled" : "Enabled");
+		
+	p += sprintf(p, "    L2 ECC\t: %s\n", (value & (1 << 23)) ?
+		     "Enabled" : "Disabled");
+
+	p += sprintf(p, "    L2 Prefetch\t: %s\n", (value & (1 << 24)) ?
+		     "Disabled" : "Enabled");
+
+	p += sprintf(p, "    L2 write allocate\t: %s\n", (value & (1 << 28)) ?
+		     "Enabled" : "Disabled");
+
+	p += sprintf(p, "    Streaming\t: %s\n", (value & (1 << 29)) ?
+		     "Enabled" : "Disabled");
+	
+	asm volatile("mrc p15, 1, %0, c15, c12, 0": "=r"(value));
+	p += sprintf(p, "CPU ID Code Extension: 0x%08x\n", value);
+	
+	asm volatile("mrc p15, 1, %0, c15, c9, 6": "=r"(value));
+	p += sprintf(p, "L2C Error Counter: 0x%08x\n", value);
+
+	p += sprintf(p, "    L2C Uncorrectable Errors \t: 0x%04x\n", value & 0xFFFF);
+	p += sprintf(p, "    L2C Correctable Errors \t: 0x%04x\n", 
+		     (value >> 16) & 0xFFFF);
+
+	asm volatile("mrc p15, 1, %0, c15, c9, 7": "=r"(value));
+	p += sprintf(p, "L2C Error Threshold: 0x%08x\n", value);
+	 
+	asm volatile("mrc p15, 1, %0, c15, c11, 7": "=r"(value));
+	p += sprintf(p, "L2C Error Capture: 0x%08x\n", value);
+	
+	asm volatile("mrc p15, 0, %0, c9, c14, 0": "=r"(value));
+	p += sprintf(p, "User mode access for PMC registers: %s\n", (value & 1) ?
+		     "Enabled" : "Disabled");
+	asm volatile("mrc p15, 0, %0, c10, c2, 0": "=r"(value));
+	p += sprintf(p, "Memory Attribute PRRR: 0x%08x\n", value);
+
+	asm volatile("mrc p15, 0, %0, c10, c2, 1": "=r"(value));
+	p += sprintf(p, "Memory Attribute NMRR: 0x%08x\n", value);
+
+	asm volatile("mrc p15, 1, %0, c15, c1, 1": "=r"(value));
+	p += sprintf(p, "Auxiliary Debug Modes Control: 0x%08x\n", value);
+
+	asm volatile("mrc p15, 1, %0, c15, c2, 0": "=r"(value));
+	p += sprintf(p, "Auxiliary Functional Modes Control: 0x%08x\n", value);
+
+	len = (p - page) - off;
+	if (len < 0)
+		len = 0;
+	
+	*eof = (len <= count) ? 1 : 0;
+	*start = page + off;
+
+	return len;
+}
+int dump_init_module(void)
+{
+#ifdef CONFIG_PROC_FS
+	struct proc_dir_entry *res;
+	res = create_proc_entry("mv_dump_cp15", S_IRUSR, NULL);
+	if (!res)
+		return -ENOMEM;
+
+	res->read_proc = proc_dump_cp15_read;
+#endif
+
+	return 0;
+}
+
+void dump_cleanup_module(void)
+{
+	remove_proc_entry("mv_dump_cp15", NULL);
+}
+
+module_init(dump_init_module);
+module_exit(dump_cleanup_module);
+
+MODULE_AUTHOR("Saeed Bishara");
+MODULE_LICENSE("GPL");
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/clock.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/clock.c
@@ -0,0 +1,1074 @@
+/*
+ *  linux/arch/arm/mach-dove/clock.c
+ */
+
+/* TODO: Implement the functions below...	*/
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/string.h>
+#include <linux/clk.h>
+#include <linux/spinlock.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/io.h>
+#include <asm/clkdev.h>
+
+#include <mach/pm.h>
+#include <mach/hardware.h>
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include <audio/mvAudioRegs.h>
+#include "clock.h"
+#include "mvOs.h"
+#include "pmu/mvPmuRegs.h"
+
+#define AXI_BASE_CLK	(2000000000ll)	/* 2000MHz */
+
+/* downstream clocks*/
+void ds_clks_disable_all(int include_pci0, int include_pci1)
+{
+	u32 ctrl = readl(CLOCK_GATING_CONTROL);
+	
+	ctrl &= ~(CLOCK_GATING_USB0_MASK |
+		  CLOCK_GATING_USB1_MASK |
+		  CLOCK_GATING_GBE_MASK  | CLOCK_GATING_GIGA_PHY_MASK | 
+#ifndef CONFIG_MV_HAL_DRIVERS_SUPPORT
+		  CLOCK_GATING_SATA_MASK |
+#endif
+		  /* CLOCK_GATING_PCIE0_MASK | */
+		  /* CLOCK_GATING_PCIE1_MASK | */
+		  CLOCK_GATING_SDIO0_MASK |
+		  CLOCK_GATING_SDIO1_MASK |
+		  CLOCK_GATING_NAND_MASK |
+		  CLOCK_GATING_CAMERA_MASK |
+		  CLOCK_GATING_I2S0_MASK |
+		  CLOCK_GATING_I2S1_MASK |
+		  /* CLOCK_GATING_CRYPTO_MASK |*/
+		  CLOCK_GATING_AC97_MASK |
+		  /* CLOCK_GATING_PDMA_MASK |*/
+#ifndef CONFIG_MV_HAL_DRIVERS_SUPPORT
+		  CLOCK_GATING_XOR0_MASK |
+#endif
+		  CLOCK_GATING_XOR1_MASK
+		);
+
+	if (include_pci0)
+		ctrl &= ~CLOCK_GATING_PCIE0_MASK;
+
+	if (include_pci1)
+		ctrl &= ~CLOCK_GATING_PCIE1_MASK;
+
+	writel(ctrl, CLOCK_GATING_CONTROL);
+}
+
+static void __ds_clk_enable(struct clk *clk)
+{
+	u32 ctrl;
+
+	if (clk->flags & ALWAYS_ENABLED)
+		return;
+
+	ctrl = readl(CLOCK_GATING_CONTROL);
+	ctrl |= clk->mask;
+	writel(ctrl, CLOCK_GATING_CONTROL);
+	return;
+}
+
+static void __ds_clk_disable(struct clk *clk)
+{
+	u32 ctrl;
+
+	if (clk->flags & ALWAYS_ENABLED)
+		return;
+
+	ctrl = readl(CLOCK_GATING_CONTROL);
+	ctrl &= ~clk->mask;
+	writel(ctrl, CLOCK_GATING_CONTROL);
+}
+
+const struct clkops ds_clk_ops = {
+	.enable		= __ds_clk_enable,
+	.disable	= __ds_clk_disable,
+};
+
+static void __ac97_clk_enable(struct clk *clk)
+{
+	u32 reg, ctrl;
+
+
+	__ds_clk_enable(clk);
+
+	/*
+	 * change BPB to use DCO0
+	 */
+	reg = readl(DOVE_SSP_CTRL_STATUS_1);
+	reg &= ~DOVE_SSP_BPB_CLOCK_SRC_SSP;
+	writel(reg, DOVE_SSP_CTRL_STATUS_1);
+
+	/* Set DCO clock to 24.576		*/
+	/* make sure I2S Audio 0 is not gated off */
+	ctrl = readl(CLOCK_GATING_CONTROL);
+	if (!(ctrl & CLOCK_GATING_I2S0_MASK))
+		writel(ctrl | CLOCK_GATING_I2S0_MASK, CLOCK_GATING_CONTROL);
+
+	/* update the DCO clock frequency */
+	reg = readl(DOVE_SB_REGS_VIRT_BASE + MV_AUDIO_DCO_CTRL_REG(0));
+	reg = (reg & ~0x3) | 0x2;
+	writel(reg, DOVE_SB_REGS_VIRT_BASE + MV_AUDIO_DCO_CTRL_REG(0));
+
+	/* disable back I2S 0 */
+	if (!(ctrl & CLOCK_GATING_I2S0_MASK))
+		writel(ctrl, CLOCK_GATING_CONTROL);
+
+	return;
+}
+
+static void __ac97_clk_disable(struct clk *clk)
+{
+	u32 ctrl;
+
+	/* 
+	 * change BPB to use PLL clock instead of DCO0
+	 */
+	ctrl = readl(DOVE_SSP_CTRL_STATUS_1);
+	ctrl |= DOVE_SSP_BPB_CLOCK_SRC_SSP;
+	writel(ctrl, DOVE_SSP_CTRL_STATUS_1);
+
+	__ds_clk_disable(clk);
+}
+
+const struct clkops ac97_clk_ops = {
+	.enable		= __ac97_clk_enable,
+	.disable	= __ac97_clk_disable,
+};
+
+/*****************************************************************************
+ * GPU and AXI clocks
+ ****************************************************************************/
+static u32 dove_clocks_get_bits(u32 addr, u32 start_bit, u32 end_bit)
+{
+	u32 mask;
+	u32 value;
+
+	value = readl(addr);
+	mask = ((1 << (end_bit + 1 - start_bit)) - 1) << start_bit;
+	value = (value & mask) >> start_bit;
+	return value;
+}
+
+static void dove_clocks_set_bits(u32 addr, u32 start_bit, u32 end_bit,
+				 u32 value)
+{
+	u32 mask;
+	u32 new_value;
+	u32 old_value;
+
+
+	old_value = readl(addr);
+
+	mask = ((1 << (end_bit + 1 - start_bit)) -1) << start_bit;
+	new_value = old_value & (~mask);
+	new_value |= (mask & (value << start_bit));
+	writel(new_value, addr);
+}
+
+static u32 dove_clocks_divide(u32 dividend, u32 divisor)
+{
+	u32 result = dividend / divisor;
+	u32 r      = dividend % divisor;
+
+	if ((r << 1) >= divisor)
+		result++;
+	return result;
+}
+
+static void dove_clocks_set_gpu_clock(u32 divider)
+{
+	dove_clocks_set_bits(DOVE_SB_REGS_VIRT_BASE + 0x000D0068, 10, 10, 1);
+	dove_clocks_set_bits(DOVE_SB_REGS_VIRT_BASE + 0x000D0064, 8, 13,
+			     divider);
+	dove_clocks_set_bits(DOVE_SB_REGS_VIRT_BASE + 0x000D0064, 14, 14, 1);
+	udelay(1);
+	dove_clocks_set_bits(DOVE_SB_REGS_VIRT_BASE + 0x000D0064, 14, 14, 0);
+}
+
+static void dove_clocks_set_vmeta_clock(u32 divider)
+{
+	dove_clocks_set_bits(DOVE_SB_REGS_VIRT_BASE + 0x000D0068, 10, 10, 1);
+	dove_clocks_set_bits(DOVE_SB_REGS_VIRT_BASE + 0x000D0064, 15, 20,
+			     divider);
+	dove_clocks_set_bits(DOVE_SB_REGS_VIRT_BASE + 0x000D0064, 21, 21, 1);
+	udelay(1);
+	dove_clocks_set_bits(DOVE_SB_REGS_VIRT_BASE + 0x000D0064, 21, 21, 0);
+}
+
+static void dove_clocks_set_lcd_clock(u32 divider)
+{
+	dove_clocks_set_bits(DOVE_SB_REGS_VIRT_BASE + 0x000D0068, 10, 10, 1);
+	dove_clocks_set_bits(DOVE_SB_REGS_VIRT_BASE + 0x000D0064, 22, 27,
+			     divider);
+	dove_clocks_set_bits(DOVE_SB_REGS_VIRT_BASE + 0x000D0064, 28, 28, 1);
+	udelay(1);
+	dove_clocks_set_bits(DOVE_SB_REGS_VIRT_BASE + 0x000D0064, 28, 28, 0);
+}
+
+static void dove_clocks_set_axi_clock(u32 divider)
+{
+	dove_clocks_set_bits(DOVE_SB_REGS_VIRT_BASE + 0x000D0068, 10, 10, 1);
+	dove_clocks_set_bits(DOVE_SB_REGS_VIRT_BASE + 0x000D0064, 1, 6, 
+			     divider);
+	dove_clocks_set_bits(DOVE_SB_REGS_VIRT_BASE + 0x000D0064, 7, 7, 1);
+	udelay(1);
+	dove_clocks_set_bits(DOVE_SB_REGS_VIRT_BASE + 0x000D0064, 7, 7, 0);
+}
+
+static unsigned long gpu_get_clock(struct clk *clk)
+{
+	u32 divider;
+	u32 c;
+
+	divider = dove_clocks_get_bits(DOVE_SB_REGS_VIRT_BASE + 0x000D0064, 8, 13);
+	c = dove_clocks_divide(2000, divider);
+
+	return c * 1000000UL;
+}
+
+static int gpu_set_clock(struct clk *clk, unsigned long rate)
+{
+	u32 divider;
+
+	divider = dove_clocks_divide(2000, rate/1000000);
+	printk(KERN_INFO "Setting gpu clock to %lu (divider: %u)\n",
+	       rate, divider);
+	dove_clocks_set_gpu_clock(divider);
+	return 0;
+}
+
+static void vmeta_clk_enable(struct clk *clk)
+{
+	unsigned int reg;
+
+	/* power on */
+	reg = MV_REG_READ(PMU_PWR_SUPLY_CTRL_REG);
+	reg &= ~PMU_PWR_VPU_PWR_DWN_MASK;
+	MV_REG_WRITE(PMU_PWR_SUPLY_CTRL_REG, reg);
+	/* un-reset unit */
+	reg = MV_REG_READ(PMU_SW_RST_CTRL_REG);
+	reg |= PMU_SW_RST_VIDEO_MASK;
+	MV_REG_WRITE(PMU_SW_RST_CTRL_REG, reg);
+	/* disable isolators */
+	reg = MV_REG_READ(PMU_ISO_CTRL_REG);
+	reg |= PMU_ISO_VIDEO_MASK;
+	MV_REG_WRITE(PMU_ISO_CTRL_REG, reg);
+}
+
+static void vmeta_clk_disable(struct clk *clk)
+{
+	unsigned int reg;
+
+	/* enable isolators */
+	reg = MV_REG_READ(PMU_ISO_CTRL_REG);
+	reg &= ~PMU_ISO_VIDEO_MASK;
+	MV_REG_WRITE(PMU_ISO_CTRL_REG, reg);
+	/* reset unit */
+	reg = MV_REG_READ(PMU_SW_RST_CTRL_REG);
+	reg &= ~PMU_SW_RST_VIDEO_MASK;
+	MV_REG_WRITE(PMU_SW_RST_CTRL_REG, reg);
+	/* power off */
+	reg = MV_REG_READ(PMU_PWR_SUPLY_CTRL_REG);
+	reg |= PMU_PWR_VPU_PWR_DWN_MASK;
+	MV_REG_WRITE(PMU_PWR_SUPLY_CTRL_REG, reg);
+}
+
+static unsigned long vmeta_get_clock(struct clk *clk)
+{
+	u32 divider;
+	u32 c;
+
+	divider = dove_clocks_get_bits(DOVE_SB_REGS_VIRT_BASE + 0x000D0064, 15, 20);
+	c = dove_clocks_divide(2000, divider);
+
+	return c * 1000000UL;
+}
+
+static int vmeta_set_clock(struct clk *clk, unsigned long rate)
+{
+	u32 divider;
+
+	divider = dove_clocks_divide(2000, rate/1000000);
+	printk(KERN_INFO "Setting vmeta clock to %lu (divider: %u)\n",
+	       rate, divider);
+	dove_clocks_set_vmeta_clock(divider);
+	return 0;
+}
+
+static void set_lcd_internal_ref_clock(u32 clock_div, u32 is_half_div)
+{
+	u32	reg;
+	u32	old_clock_div, old_half_div;
+
+	/* disable preemption, the gen conf regs might be accessed by other
+	** drivers.
+	*/
+	preempt_disable();
+
+	/*
+	 * If current setting is right, just return.
+	 */
+	reg = readl(DOVE_GLOBAL_CONFIG_1);
+	old_clock_div = (reg & (0x3F << 10)) >> 10;
+	old_half_div = (reg & (1 << 16)) >> 16;
+
+	if (clock_div == old_clock_div && is_half_div == old_half_div) {
+		preempt_enable();
+		return;
+	}
+
+	/* Clear LCD_Clk_Enable (Enable LCD Clock).			*/
+	reg &= ~(1 << 17);
+	writel(reg, DOVE_GLOBAL_CONFIG_1);
+
+	/* Set LCD_CLK_DIV_SEL in LCD TWSI and CPU Configuration 1	*/
+	reg = readl(DOVE_GLOBAL_CONFIG_1);
+	reg &= ~(1 << 9);
+	writel(reg, DOVE_GLOBAL_CONFIG_1);
+
+	/* Configure division factor (N = LCD_EXT_DIV[5:0], N<32) in 	*/
+	/* Config 1 Register.						*/
+	reg &= ~(0x3F << 10);
+	reg |= (clock_div << 10);
+
+	/* Set LCD_Half_integer_divider = 1 in LCD TWSI and CPU Config 1*/
+	if (is_half_div)
+		reg |= (1 << 16);
+	else
+		reg &= ~(1 << 16);
+
+	writel(reg, DOVE_GLOBAL_CONFIG_1);
+
+	/* Set LCD_Ext_Clk_Div_Load in LCD TWSI and CPU Config 2.	*/
+	reg = readl(DOVE_GLOBAL_CONFIG_2);
+	reg |= (1 << 24);
+	writel(reg, DOVE_GLOBAL_CONFIG_2);
+
+	preempt_enable();
+
+	/* Insert S/W delay of at least 200 nsec.			*/
+	udelay(1);
+
+	preempt_disable();
+	/* Clear LCD_Ext_Clk_Div_Load.					*/
+	reg = readl(DOVE_GLOBAL_CONFIG_2);
+	reg &= ~(1 << 24);
+	writel(reg, DOVE_GLOBAL_CONFIG_2);
+
+	/* Set LCD_Clk_Enable (Enable LCD Clock).			*/
+	reg = readl(DOVE_GLOBAL_CONFIG_1);
+	reg |= (1 << 17);
+	writel(reg, DOVE_GLOBAL_CONFIG_1);
+	preempt_enable();
+
+	return;
+}
+
+
+static inline u64 calc_diff(u64 a, u64 b)
+{
+	if (a > b)
+		return a - b;
+	else
+		return b - a;
+}
+static void calc_best_clock_div(u32 tar_freq, u32 *axi_div,
+		u32 *is_ext_rem)
+{
+	u64 req_div;
+	u64 best_rem = 0xFFFFFFFFFFFFFFFFll;
+	unsigned int best_axi_div = 0;
+	unsigned int best_lcd_div = 0;
+	u64 tmp_lcd_div;
+	int ext_rem = 0;
+	u32 i, borders;
+	u64 rem;
+	u64 temp;
+	int override = 0;	/* Used to mark special cases where the LCD */
+	int div_2_skip = 3;	/* divider value is not recommended.	    */
+				/* (in our case it's divider 3).	    */
+
+	/* Calculate required dividor */
+	req_div = AXI_BASE_CLK;
+	do_div(req_div, tar_freq);
+
+	/* Look for the whole division with the smallest remainder */
+	for (i = 5; i < 64; i++) {
+		temp = (u64)tar_freq * (u64)i;
+		borders = req_div;
+		do_div(borders, i);
+		/* The LCD divsion must be smaller than 64K */
+		if (borders < SZ_64K) {
+			tmp_lcd_div = AXI_BASE_CLK;
+			/* We cannot do 64-bit / 64-bit operations,
+			** thus... */
+			do_div(tmp_lcd_div, i);
+			do_div(tmp_lcd_div, tar_freq);
+			rem = calc_diff(AXI_BASE_CLK, (temp * tmp_lcd_div));
+			if ((rem < best_rem) ||
+			    ((override == 1) && (rem == best_rem))) {
+				best_rem = rem;
+				best_axi_div = i;
+				best_lcd_div = tmp_lcd_div;
+				override = ((best_lcd_div == div_2_skip) ?
+						1 : 0);
+			}
+			if ((best_rem == 0) && (override == 0))
+				break;
+			/* Check the next LCD divider */
+			tmp_lcd_div++;
+			rem = calc_diff((temp * tmp_lcd_div), AXI_BASE_CLK);
+			if ((rem < best_rem) ||
+			    ((override == 1) && (rem == best_rem))) {
+				best_rem = rem;
+				best_axi_div = i;
+				best_lcd_div = tmp_lcd_div;
+				override = ((best_lcd_div == div_2_skip) ?
+						1 : 0);
+			}
+			if ((best_rem == 0) && (override == 0))
+				break;
+		}
+	}
+
+	/* Look for the extended division with the smallest remainder */
+	if (best_rem != 0) {
+		req_div = AXI_BASE_CLK * 10;
+		do_div(req_div, tar_freq);
+		/* Half div can be between 12.5 & 31.5 */
+		for (i = 55; i <= 315; i += 10) {
+			temp = (u64)tar_freq * (u64)i;
+			borders = req_div;
+			do_div(borders, i);
+			if (borders < SZ_64K) {
+				tmp_lcd_div = AXI_BASE_CLK * 10;
+				/* We cannot do 64-bit / 64-bit operations,
+				** thus... */
+				do_div(tmp_lcd_div, i);
+				do_div(tmp_lcd_div, tar_freq);
+
+				rem = calc_diff(AXI_BASE_CLK * 10,
+						(tmp_lcd_div * temp));
+				do_div(rem, 10);
+				if ((rem < best_rem) ||
+				    ((override == 1) && (rem == best_rem))) {
+					ext_rem = 1;
+					best_rem = rem;
+					best_axi_div = i / 10;
+					best_lcd_div = tmp_lcd_div;
+					override = ((best_lcd_div == div_2_skip)
+							? 1 : 0);
+				}
+				if ((best_rem == 0) && (override == 0))
+					break;
+				/* Check next LCD divider */
+				tmp_lcd_div++;
+				rem = calc_diff((tmp_lcd_div * temp),
+						AXI_BASE_CLK * 10);
+				do_div(rem, 10);
+				if ((rem < best_rem) ||
+				    ((override == 1) && (rem == best_rem))) {
+					ext_rem = 1;
+					best_rem = rem;
+					best_axi_div = i / 10;
+					best_lcd_div = tmp_lcd_div;
+					override = ((best_lcd_div == div_2_skip)
+							? 1 : 0);
+				}
+				if ((best_rem == 0) && (override == 0))
+					break;
+			}
+		}
+	}
+
+	*is_ext_rem = ext_rem;
+	*axi_div = best_axi_div;
+	return;
+}
+
+static unsigned long lcd_get_clock(struct clk *clk)
+{
+	u32 c;
+	u32 reg;
+	u32 old_clock_div, old_half_div;
+	u32 pll_src;
+
+	pll_src = 2000000000;
+
+	/* disable preemption, the gen conf regs might be accessed by other
+	** drivers.
+	*/
+	preempt_disable();
+
+	/*
+	 * If current setting is right, just return.
+	 */
+	reg = readl(DOVE_GLOBAL_CONFIG_1);
+	old_clock_div = (reg & (0x3F << 10)) >> 10;
+	old_half_div = (reg & (1 << 16)) >> 16;
+
+	preempt_enable();
+
+	c = (pll_src*2)/(old_clock_div*2+ old_half_div*1);
+
+	return c;
+}
+#ifndef CONFIG_FB_DOVE_CLCD_SCLK_VALUE
+#define LCD_SCLK	(1000*1000*1000)
+#else
+#define LCD_SCLK	(CONFIG_FB_DOVE_CLCD_SCLK_VALUE*1000*1000)
+#endif
+int lcd_set_clock(struct clk *clk, unsigned long rate)
+{
+	u32 axi_div, is_ext = 0;
+
+	rate = LCD_SCLK;
+	axi_div = 2000000000 / rate;
+	printk(KERN_INFO "set internal refclk divider to %d.%d\n",
+	       axi_div, is_ext ? 5 : 0);
+	set_lcd_internal_ref_clock(axi_div, is_ext);
+
+	return 0;
+}
+
+int accrt_lcd_set_clock(struct clk *clk, unsigned long rate)
+{
+	u32 axi_div, is_ext = 0;
+
+	calc_best_clock_div(rate, &axi_div, &is_ext);
+
+	printk(KERN_INFO "set internal refclk divider to %d.%d."
+	       "(accurate mode)\n", axi_div, is_ext ? 5 : 0);
+	set_lcd_internal_ref_clock(axi_div, is_ext);
+
+	return 0;
+}
+
+static void __lcd_clk_enable(struct clk *clk)
+{
+	u32	reg;
+	reg = readl(DOVE_GLOBAL_CONFIG_1);
+	reg |= (1 << 17);
+	writel(reg, DOVE_GLOBAL_CONFIG_1);
+
+	/* We keep original PLL output 2G clock. */
+	dove_clocks_set_lcd_clock(1);
+	return;
+}
+
+static void __lcd_clk_disable(struct clk *clk)
+{
+	u32	reg;
+	reg = readl(DOVE_GLOBAL_CONFIG_1);
+	reg &= ~(1 << 17);
+	writel(reg, DOVE_GLOBAL_CONFIG_1);
+	dove_clocks_set_lcd_clock(0);
+	return;
+}
+
+u32 axi_divider[] = {-1, 2, 1, 3, 4, 6, 5, 7, 8, 10, 9};
+
+static unsigned long axi_get_clock(struct clk *clk)
+{
+	u32 divider;
+	u32 c;
+
+	divider = dove_clocks_get_bits(DOVE_SB_REGS_VIRT_BASE + 0x000D0064, 1, 6);
+	c = 2000 / axi_divider[divider];
+
+        return c * 1000000UL;
+}
+
+static int axi_set_clock(struct clk *clk, unsigned long rate)
+{
+	u32 divider = 0, i;
+
+	for (i = 1; i < 11; i++) {
+		if ((2000/axi_divider[i]) == (rate/1000000)) {
+			divider = i;
+			break;
+		}
+	}
+
+	if (i == 11) {
+		printk(KERN_ERR "Unsupported AXI clock %lu\n",
+			 rate);
+
+		return -1;
+	}
+	printk(KERN_INFO "Setting axi clock to %lu (divider: %u)\n",
+		 rate, divider);
+	dove_clocks_set_axi_clock(divider);
+	return 0;
+}
+
+
+static unsigned long ssp_get_clock(struct clk *clk)
+{
+	u32 divider;
+	u32 c;
+
+	divider = dove_clocks_get_bits(DOVE_SSP_CTRL_STATUS_1, 2, 7);
+	c = dove_clocks_divide(1000, divider);
+
+	return c * 1000000UL;
+}
+
+static int ssp_set_clock(struct clk *clk, unsigned long rate)
+{
+	u32 divider;
+
+	divider = dove_clocks_divide(1000, rate/1000000);
+	printk(KERN_INFO "Setting ssp clock to %lu (divider: %u)\n",
+		rate, divider);
+
+	dove_clocks_set_bits(DOVE_SSP_CTRL_STATUS_1, 2, 7, divider);
+
+	return 0;
+}
+
+
+const struct clkops ssp_clk_ops = {
+	.getrate	= ssp_get_clock,
+	.setrate	= ssp_set_clock,
+};
+
+
+
+
+
+#ifdef CONFIG_SYSFS
+static struct platform_device dove_clocks_sysfs = {
+	.name		= "dove_clocks_sysfs",
+	.id		= 0,
+	.num_resources  = 0,
+	.resource       = NULL,
+};
+
+static ssize_t dove_clocks_axi_show(struct kobject *kobj,
+				   struct kobj_attribute *attr, char *buf)
+{
+	return sprintf(buf, "%lu \n", axi_get_clock(NULL));
+}
+
+static ssize_t dove_clocks_axi_store(struct kobject *kobj,
+				    struct kobj_attribute *attr,
+				    const char *buf, size_t n)
+{
+	unsigned long value;
+
+	if (sscanf(buf, "%lu", &value) != 1)
+		return -EINVAL;
+	axi_set_clock(NULL, value);
+	return n;
+}
+
+static ssize_t dove_clocks_gpu_show(struct kobject *kobj,
+				   struct kobj_attribute *attr, char *buf)
+{
+	return sprintf(buf, "%lu\n", gpu_get_clock(NULL));
+}
+
+static ssize_t dove_clocks_gpu_store(struct kobject *kobj,
+				struct kobj_attribute *attr,
+				const char *buf, size_t n)
+{
+	unsigned long value;
+
+	if (sscanf(buf, "%lu", &value) != 1)
+		return -EINVAL;
+	gpu_set_clock(NULL, value);
+	return n;
+}
+
+static ssize_t dove_clocks_vmeta_show(struct kobject *kobj,
+				   struct kobj_attribute *attr, char *buf)
+{
+	return sprintf(buf, "%lu\n", vmeta_get_clock(NULL));
+}
+
+static ssize_t dove_clocks_vmeta_store(struct kobject *kobj,
+				struct kobj_attribute *attr,
+				const char *buf, size_t n)
+{
+	unsigned long value;
+
+	if (sscanf(buf, "%lu", &value) != 1)
+		return -EINVAL;
+	vmeta_set_clock(NULL, value);
+	return n;
+}
+
+static ssize_t dove_clocks_lcd_show(struct kobject *kobj,
+				   struct kobj_attribute *attr, char *buf)
+{
+	return sprintf(buf, "%lu\n", lcd_get_clock(NULL));
+}
+
+static ssize_t dove_clocks_lcd_store(struct kobject *kobj,
+				struct kobj_attribute *attr,
+				const char *buf, size_t n)
+{
+	unsigned long value;
+
+	if (sscanf(buf, "%lu", &value) != 1)
+		return -EINVAL;
+	lcd_set_clock(NULL, value);
+	return n;
+}
+
+static struct kobj_attribute dove_clocks_axi_attr =
+	__ATTR(axi, 0644, dove_clocks_axi_show, dove_clocks_axi_store);
+
+static struct kobj_attribute dove_clocks_gpu_attr =
+	__ATTR(gpu, 0644, dove_clocks_gpu_show, dove_clocks_gpu_store);
+
+static struct kobj_attribute dove_clocks_vmeta_attr =
+	__ATTR(vmeta, 0644, dove_clocks_vmeta_show, dove_clocks_vmeta_store);
+
+static struct kobj_attribute dove_clocks_lcd_attr =
+	__ATTR(lcd, 0644, dove_clocks_lcd_show, dove_clocks_lcd_store);
+
+static int __init dove_upstream_clocks_sysfs_setup(void)
+{
+	platform_device_register(&dove_clocks_sysfs);
+
+	if (sysfs_create_file(&dove_clocks_sysfs.dev.kobj,
+			&dove_clocks_axi_attr.attr))
+		printk(KERN_ERR "%s: sysfs_create_file failed!", __func__);
+	if (sysfs_create_file(&dove_clocks_sysfs.dev.kobj,
+			&dove_clocks_gpu_attr.attr))
+		printk(KERN_ERR "%s: sysfs_create_file failed!", __func__);
+	if (sysfs_create_file(&dove_clocks_sysfs.dev.kobj,
+			&dove_clocks_vmeta_attr.attr))
+		printk(KERN_ERR "%s: sysfs_create_file failed!", __func__);
+	if (sysfs_create_file(&dove_clocks_sysfs.dev.kobj,
+			&dove_clocks_lcd_attr.attr))
+		printk(KERN_ERR "%s: sysfs_create_file lcd clock failed!", __func__);
+
+	return 0;
+}
+#endif
+const struct clkops gpu_clk_ops = {
+	.getrate	= gpu_get_clock,
+	.setrate	= gpu_set_clock,
+};
+
+const struct clkops vpu_clk_ops = {
+	.enable		= vmeta_clk_enable,
+	.disable	= vmeta_clk_disable,
+	.getrate	= vmeta_get_clock,
+	.setrate	= vmeta_set_clock,
+};
+
+const struct clkops axi_clk_ops = {
+	.getrate	= axi_get_clock,
+	.setrate	= axi_set_clock,
+};
+
+const struct clkops lcd_clk_ops = {
+	.enable		= __lcd_clk_enable,
+	.disable	= __lcd_clk_disable,
+	.getrate	= lcd_get_clock,
+	.setrate	= lcd_set_clock,
+};
+
+const struct clkops accrt_lcd_clk_ops = {
+	.enable		= __lcd_clk_enable,
+	.disable	= __lcd_clk_disable,
+	.getrate	= lcd_get_clock,
+	.setrate	= accrt_lcd_set_clock,
+};
+
+int clk_enable(struct clk *clk)
+{
+	if (clk == NULL || IS_ERR(clk))
+		return -EINVAL;
+
+	if (clk->usecount++ == 0)
+		if (clk->ops->enable)
+			clk->ops->enable(clk);
+
+	return 0;
+}
+EXPORT_SYMBOL(clk_enable);
+
+void clk_disable(struct clk *clk)
+{
+	if (clk == NULL || IS_ERR(clk))
+		return;
+
+	if (clk->usecount > 0 && !(--clk->usecount))
+		if (clk->ops->disable)
+			clk->ops->disable(clk);
+}
+EXPORT_SYMBOL(clk_disable);
+
+unsigned long clk_get_rate(struct clk *clk)
+{
+	if (clk == NULL || IS_ERR(clk))
+		return -EINVAL;
+
+	if (clk->ops->getrate)
+		return clk->ops->getrate(clk);
+
+	return *(clk->rate);
+}
+EXPORT_SYMBOL(clk_get_rate);
+
+long clk_round_rate(struct clk *clk, unsigned long rate)
+{
+	if (clk == NULL || IS_ERR(clk))
+		return -EINVAL;
+
+	return *(clk->rate);
+}
+EXPORT_SYMBOL(clk_round_rate);
+
+int clk_set_rate(struct clk *clk, unsigned long rate)
+{
+	if (clk == NULL || IS_ERR(clk))
+		return -EINVAL;
+
+	if (clk->ops->setrate)
+		return clk->ops->setrate(clk, rate);
+
+	return -EINVAL;
+}
+
+EXPORT_SYMBOL(clk_set_rate);
+
+unsigned int  dove_tclk_get(void)
+{
+	/* tzachi: use DOVE_RESET_SAMPLE_HI/LO to detect tclk
+	 * wait for spec, currently use hard code */
+	return 166666667;
+}
+
+static unsigned long tclk_rate;
+
+static struct clk clk_core = {
+	.ops	= &ds_clk_ops,
+	.rate	= &tclk_rate,
+	.flags	= ALWAYS_ENABLED,
+};
+
+static struct clk clk_usb0 = {
+	.ops	= &ds_clk_ops,
+	.rate	= &tclk_rate,
+	.mask	= CLOCK_GATING_USB0_MASK,
+};
+
+static struct clk clk_usb1 = {
+	.ops	= &ds_clk_ops,
+	.rate	= &tclk_rate,
+	.mask	= CLOCK_GATING_USB1_MASK,
+};
+
+static struct clk clk_gbe = {
+	.ops	= &ds_clk_ops,
+	.rate	= &tclk_rate,
+	.mask	= CLOCK_GATING_GBE_MASK | CLOCK_GATING_GIGA_PHY_MASK,
+};
+
+static struct clk clk_sata = {
+	.ops	= &ds_clk_ops,
+	.rate	= &tclk_rate,
+	.mask	= CLOCK_GATING_SATA_MASK,
+};
+
+static struct clk clk_pcie0 = {
+	.ops	= &ds_clk_ops,
+	.rate	= &tclk_rate,
+	.mask	= CLOCK_GATING_PCIE0_MASK,
+};
+
+static struct clk clk_pcie1 = {
+	.ops	= &ds_clk_ops,
+	.rate	= &tclk_rate,
+	.mask	= CLOCK_GATING_PCIE1_MASK,
+};
+
+static struct clk clk_sdio0 = {
+	.ops	= &ds_clk_ops,
+	.rate	= &tclk_rate,
+	.mask	= CLOCK_GATING_SDIO0_MASK,
+};
+
+static struct clk clk_sdio1 = {
+	.ops	= &ds_clk_ops,
+	.rate	= &tclk_rate,
+	.mask	= CLOCK_GATING_SDIO1_MASK,
+};
+
+static struct clk clk_nand = {
+	.ops	= &ds_clk_ops,
+	.rate	= &tclk_rate,
+	.mask	= CLOCK_GATING_NAND_MASK,
+};
+
+static struct clk clk_camera = {
+	.ops	= &ds_clk_ops,
+	.rate	= &tclk_rate,
+	.mask	= CLOCK_GATING_CAMERA_MASK,
+};
+
+static struct clk clk_i2s0 = {
+	.ops	= &ds_clk_ops,
+	.rate	= &tclk_rate,
+	.mask	= CLOCK_GATING_I2S0_MASK,
+};
+
+static struct clk clk_i2s1 = {
+	.ops	= &ds_clk_ops,
+	.rate	= &tclk_rate,
+	.mask	= CLOCK_GATING_I2S1_MASK,
+};
+
+static struct clk clk_crypto = {
+	.ops	= &ds_clk_ops,
+	.rate	= &tclk_rate,
+	.mask	= CLOCK_GATING_CRYPTO_MASK,
+};
+
+static struct clk clk_ac97 = {
+	.ops	= &ac97_clk_ops,
+	.rate	= &tclk_rate,
+	.mask	= CLOCK_GATING_AC97_MASK,
+};
+
+static struct clk clk_pdma = {
+	.ops	= &ds_clk_ops,
+	.rate	= &tclk_rate,
+	.mask	= CLOCK_GATING_PDMA_MASK,
+};
+
+static struct clk clk_xor0 = {
+	.ops	= &ds_clk_ops,
+	.rate	= &tclk_rate,
+	.mask	= CLOCK_GATING_XOR0_MASK,
+};
+
+static struct clk clk_xor1 = {
+	.ops	= &ds_clk_ops,
+	.rate	= &tclk_rate,
+	.mask	= CLOCK_GATING_XOR1_MASK,
+};
+
+//static struct clk clk_giga_phy = {
+//	.rate	= &tclk_rate,
+//	.mask	= CLOCK_GATING_GIGA_PHY_MASK,
+//};
+
+static struct clk clk_gpu = {
+	.ops	= &gpu_clk_ops,
+};
+
+static struct clk clk_vpu = {
+	.ops	= &vpu_clk_ops,
+};
+
+static struct clk clk_axi = {
+	.ops	= &axi_clk_ops,
+};
+
+static struct clk clk_ssp = {
+	.ops	= &ssp_clk_ops,
+};
+
+static struct clk clk_lcd = {
+	.ops	= &lcd_clk_ops,
+};
+
+static struct clk accrt_clk_lcd = {
+	.ops	= &accrt_lcd_clk_ops,
+};
+
+
+#define INIT_CK(dev,con,ck)			\
+	{ .dev_id = dev, .con_id = con, .clk = ck }
+
+static struct clk_lookup dove_clocks[] = {
+	INIT_CK(NULL, "tclk", &clk_core),
+	INIT_CK("orion-ehci.0", NULL, &clk_usb0),
+	INIT_CK("orion-ehci.1", NULL, &clk_usb1),
+	INIT_CK(NULL, "usb0", &clk_usb0), /* for udc device mode */
+	INIT_CK(NULL, "usb1", &clk_usb1), /* for udc device mode */
+	INIT_CK("mv_netdev.0", NULL, &clk_gbe),
+	INIT_CK("mv643xx_eth.0", NULL, &clk_gbe),
+	INIT_CK("sata_mv.0", NULL, &clk_sata),
+	INIT_CK(NULL, "PCI0", &clk_pcie0),
+	INIT_CK(NULL, "PCI1", &clk_pcie1),
+	INIT_CK("sdhci-mv.0", NULL, &clk_sdio0),
+	INIT_CK("sdhci-mv.1", NULL, &clk_sdio1),
+	INIT_CK("dove-nand", NULL, &clk_nand),
+	INIT_CK("cafe1000-ccic.0", NULL, &clk_camera),
+	INIT_CK("mv88fx_snd.0", NULL, &clk_i2s0),
+	INIT_CK("mv88fx_snd.1", NULL, &clk_i2s1),
+	INIT_CK("crypto", NULL, &clk_crypto),
+	INIT_CK(NULL, "AC97CLK", &clk_ac97),
+	INIT_CK(NULL, "PDMA", &clk_pdma),
+	INIT_CK("mv_xor_shared.0", NULL, &clk_xor0),
+	INIT_CK("mv_xor_shared.1", NULL, &clk_xor1),
+//	INIT_CK(NULL, "GIGA_PHY", &clk_giga_phy),
+	INIT_CK(NULL, "GCCLK", &clk_gpu),
+	INIT_CK(NULL, "AXICLK", &clk_axi),
+	INIT_CK(NULL, "LCDCLK", &clk_lcd),
+	INIT_CK(NULL, "accurate_LCDCLK", &accrt_clk_lcd),
+	INIT_CK(NULL, "VMETA_CLK", &clk_vpu),
+	INIT_CK(NULL, "ssp", &clk_ssp),
+};
+
+int __init dove_clk_config(struct device *dev, const char *id, unsigned long rate)
+{
+	struct clk *clk;
+	int ret = 0;
+
+	clk = clk_get(dev, id);
+	if (IS_ERR(clk)) {
+		printk(KERN_ERR "failed to get clk %s\n", dev ? dev_name(dev):
+		       id);
+		return PTR_ERR(clk);
+	}
+	ret = clk_set_rate(clk, rate); 
+	if (ret < 0) 
+		printk(KERN_ERR "failed to set %s clk to %lu \n", 
+		       dev?dev_name(dev):id, rate);
+	return ret;
+}
+
+int __init dove_devclks_init(void)
+{
+	int i;
+	
+	tclk_rate = dove_tclk_get();
+
+	/* disable the clocks of all peripherals */
+	//__clks_disable_all();
+
+	for (i = 0; i < ARRAY_SIZE(dove_clocks); i++)
+                clkdev_add(&dove_clocks[i]);
+
+#ifdef CONFIG_SYSFS
+	dove_upstream_clocks_sysfs_setup();
+#endif
+#ifdef CONFIG_PM
+	/* ask the pm to save & restore this register */
+	pm_registers_add_single(CLOCK_GATING_CONTROL);
+#endif
+//	__clk_disable(&clk_usb0);
+//	__clk_disable(&clk_usb1);
+//	__clk_disable(&clk_ac97);
+	vmeta_clk_disable(&clk_vpu);
+	return 0;
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/common.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/common.h
@@ -0,0 +1,92 @@
+/*
+ * arch/arm/mach-dove/common.h
+ *
+ * Core functions for Marvell Dove MV88F6781 System On Chip
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __ARCH_DOVE_COMMON_H
+#define __ARCH_DOVE_COMMON_H
+
+struct mv643xx_eth_platform_data;
+struct mv_sata_platform_data;
+struct dovefb_mach_info;
+struct gpio_mouse_platform_data;
+struct orion_i2s_platform_data;
+struct cafe_cam_platform_data;
+struct dove_ssp_platform_data;
+
+extern struct sys_timer dove_timer;
+extern struct mbus_dram_target_info dove_mbus_dram_info;
+
+/*
+ * Basic Dove init functions used early by machine-setup.
+ */
+int get_tclk(void);
+void dove_pcie_id(u32 *dev, u32 *rev);
+void dove_map_io(void);
+void dove_init(void);
+void dove_init_irq(void);
+void dove_setup_cpu_mbus(void);
+void dove_ge00_init(struct mv643xx_eth_platform_data *eth_data);
+void dove_mv_eth_init(void);
+void dove_sata_init(struct mv_sata_platform_data *sata_data);
+void dove_fb_init(struct dovefb_mach_info *fb_data);
+void dove_pcie_init(int init_port0, int init_port1);
+void dove_rtc_init(void);
+void dove_ehci0_init(void);
+void dove_ehci1_init(void);
+void dove_sdio0_init(void);
+void dove_sdio1_init(void);
+void dove_uart0_init(void);
+void dove_uart1_init(void);
+void dove_uart2_init(void);
+void dove_uart3_init(void);
+void dove_spi0_init(int use_interrupt);
+void dove_spi1_init(int use_interrupt);
+void dove_i2c_init(void);
+void dove_i2c_exp_init(int);
+void dove_add_gpio_i2c(void);
+void dove_i2s_init(int port, struct orion_i2s_platform_data *i2s_data);
+void dove_cam_init(struct cafe_cam_platform_data *cafe_cam_data);
+void dove_sdhci_cam_mbus_init(void);
+void dove_tact_init(struct gpio_mouse_platform_data *tact_data);
+void dove_lcd_spi_init(void);
+void dove_vmeta_init(void);
+void dove_gpu_init(void);
+void dove_wakeup_button_setup(int gpio);
+void dove_tag_fixup_mem32(struct machine_desc *mdesc, struct tag *t,
+			  char **from, struct meminfo *meminfo);
+void dove_sd_card_int_wa_setup(int port);
+void dove_xor0_init(void);
+void dove_xor1_init(void);
+void dove_cesa_init(void);
+void dove_hwmon_init(void);
+void dove_ssp_init(struct dove_ssp_platform_data *pdata);
+void dove_ac97_setup(void);
+
+#ifdef CONFIG_USB_ANDROID
+void dove_udc_init(void);
+void android_add_usb_devices(void);
+#endif
+/*
+ * Basic Dove PM functions
+ */
+#ifdef CONFIG_PM
+void dove_save_cpu_wins(void);
+void dove_restore_cpu_wins(void);
+void dove_restore_pcie_regs(void);
+void dove_save_cpu_conf_regs(void);
+void dove_save_timer_regs(void);	
+void dove_restore_timer_regs(void);	
+void dove_restore_cpu_conf_regs(void);
+void dove_save_int_regs(void);
+void dove_restore_int_regs(void);
+void dove_save_upstream_regs(void);
+void dove_restore_upstream_regs(void);
+#endif
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mpp.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mpp.c
@@ -0,0 +1,441 @@
+/*
+ * arch/arm/mach-dove/mpp.c
+ *
+ * MPP functions for Marvell Dove SoCs
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/mbus.h>
+#include <asm/gpio.h>
+//#include <asm/hardware.h>
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/mach/arch.h>
+#include "common.h"
+#include <mach/pm.h>
+#include "mpp.h"
+#include "ctrlEnv/mvCtrlEnvRegs.h"
+
+#ifdef CONFIG_PM
+static u32 dove_mpp_regs[] = {
+	DOVE_MPP_VIRT_BASE,
+	DOVE_MPP_VIRT_BASE + 4,
+	DOVE_MPP_VIRT_BASE + 8,
+	DOVE_PMU_MPP_GENERAL_CTRL,
+	DOVE_MPP_GENERAL_VIRT_BASE,
+	DOVE_MPP_CTRL4_VIRT_BASE,
+	DOVE_SSP_CTRL_STATUS_1
+};
+
+static u32 dove_pm_gpio_regs[] = DOVE_GPIO_REGISTERS;
+#endif
+
+#define DOVE_MPP_MAX_OPTIONS	7
+#define DOVE_PMU_MAX_PINS	16
+
+struct mpp_type {
+	enum dove_mpp_type	type;
+	int			val;
+};
+
+#define MPP_LAST	{MPP_END, 0}
+#define MPP_LAST2	MPP_LAST, MPP_LAST
+#define MPP_LAST3	MPP_LAST, MPP_LAST2
+#define MPP_LAST4	MPP_LAST, MPP_LAST3
+#define MPP_LAST5	MPP_LAST, MPP_LAST4
+#define MPP_LAST6	MPP_LAST, MPP_LAST5
+
+struct mpp_config {
+	struct  mpp_type types[DOVE_MPP_MAX_OPTIONS];
+	int	(*config)(int mpp, enum dove_mpp_type type, int val);
+};
+
+int __init dove_mpp_legacy_config(int mpp, enum dove_mpp_type type, int val);
+int __init dove_mpp_high_config(int mpp, enum dove_mpp_type type, int val);
+void __init dove_mpp_pmu_config(int mpp, enum dove_mpp_type type);
+
+/* The index is the mpp number
+ * The table still not complete
+ */
+struct mpp_config dove_mpp_table[] __initdata = 
+{
+	/* MPP 0 */
+	{{{MPP_GPIO, 0}, {MPP_PMU, 0}, {MPP_SDIO0, 3}, MPP_LAST3},
+	 dove_mpp_legacy_config},
+	/* MPP 1 */
+	{{{MPP_GPIO, 0}, {MPP_SDIO0, 3}, {MPP_PMU, 0}, {MPP_LCD, 0xf}, MPP_LAST3},
+	 dove_mpp_legacy_config},
+	/* MPP 2 */
+	{{{MPP_GPIO, 0}, {MPP_SATA_PRESENCE, 1}, {MPP_PMU, 0}, MPP_LAST4},
+	 dove_mpp_legacy_config},
+	/* MPP 3 */
+	{{{MPP_GPIO, 0}, {MPP_PMU, 0}, MPP_LAST5},
+	 dove_mpp_legacy_config},
+	/* MPP 4 */
+	{{{MPP_GPIO, 0}, {MPP_PMU, 0}, MPP_LAST5},
+	 dove_mpp_legacy_config},
+	/* MPP 5 */
+	{{{MPP_GPIO, 0}, {MPP_PMU, 0}, MPP_LAST5},
+	 dove_mpp_legacy_config},
+	/* MPP 6 */
+	{{{MPP_GPIO, 0}, {MPP_PMU, 0}, MPP_LAST5},
+	 dove_mpp_legacy_config},
+	/* MPP 7 */
+	{{{MPP_GPIO, 0}, {MPP_PMU, 0}, {MPP_MII, 5}, MPP_LAST4},
+	 dove_mpp_legacy_config},
+	/* MPP 8 */
+	{{{MPP_GPIO, 0}, MPP_LAST6},
+	 dove_mpp_legacy_config},
+	/* MPP 9 */
+	{{{MPP_GPIO, 0}, {MPP_PMU, 0}, {MPP_PCIE, 5}, MPP_LAST4},
+	 dove_mpp_legacy_config},
+	/* MPP 10 */
+	{{{MPP_GPIO, 0}, {MPP_PMU, 0}, MPP_LAST5},
+	 dove_mpp_legacy_config},
+	/* MPP 11 */
+	{{{MPP_GPIO, 0}, {MPP_SATA_PRESENCE, 1}, {MPP_SATA_ACT, 2}, {MPP_SDIO0, 3},
+	  {MPP_SDIO1, 4}, MPP_LAST2},
+	 dove_mpp_legacy_config},
+	/* MPP 12 */
+	{{{MPP_GPIO, 0}, {MPP_SDIO1, 4}, MPP_LAST5},
+	 dove_mpp_legacy_config},
+	/* MPP 13 */
+	{{{MPP_GPIO, 0}, {MPP_SDIO1, 4}, MPP_LAST5},
+	 dove_mpp_legacy_config},
+	/* MPP 14 */
+	{{{MPP_GPIO, 0}, {MPP_UART2, 2}, MPP_LAST5},
+	 dove_mpp_legacy_config},
+	/* MPP 15 */
+	{{{MPP_GPIO, 0}, {MPP_UART2, 2}, MPP_LAST5},
+	 dove_mpp_legacy_config},
+	/* MPP 16 */
+	{{{MPP_GPIO, 0}, {MPP_SDIO0, 3}, MPP_LAST5},
+	 dove_mpp_legacy_config},
+	/* MPP 17 */
+	{{{MPP_GPIO, 0}, {MPP_TWSI, 4}, MPP_LAST5},
+	 dove_mpp_legacy_config},
+	/* MPP 18 */
+	{{{MPP_GPIO, 0}, {MPP_UART3, 2}, {MPP_LCD, 4}, MPP_LAST4},
+	 dove_mpp_legacy_config},
+	/* MPP 19 */
+	{{{MPP_GPIO, 0}, {MPP_UART3, 2}, {MPP_TWSI, 4}, {MPP_MII, 6}, MPP_LAST3},
+	 dove_mpp_legacy_config},
+	/* MPP 20 */
+	{{{MPP_GPIO, 0}, {MPP_NB_CLOCK, 4}, {MPP_LCD0_SPI, 2}, {MPP_SPI1, 6}, MPP_LAST3},
+	 dove_mpp_legacy_config},
+	/* MPP 21 */
+	{{{MPP_GPIO, 0}, {MPP_UART1, 1}, {MPP_LCD0_SPI, 2}, {MPP_SPI1, 6}, MPP_LAST3},
+	 dove_mpp_legacy_config},
+	/* MPP 22 */
+	{{{MPP_GPIO, 0}, {MPP_UART1, 1}, {MPP_LCD0_SPI, 2}, {MPP_SPI1, 6}, MPP_LAST3},
+	 dove_mpp_legacy_config},
+	/* MPP 23 */
+	{{{MPP_GPIO, 0}, {MPP_LCD0_SPI, 2}, {MPP_SPI1, 6}, MPP_LAST4},
+	 dove_mpp_legacy_config},
+	/* MPP 24 */
+	{{{MPP_GPIO, 2}, {MPP_CAM, 2}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 25 */
+	{{{MPP_GPIO, 2}, {MPP_CAM, 2}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 26 */
+	{{{MPP_GPIO, 2}, {MPP_CAM, 2}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 27 */
+	{{{MPP_GPIO, 2}, {MPP_CAM, 2}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 28 */
+	{{{MPP_GPIO, 2}, {MPP_CAM, 2}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 29 */
+	{{{MPP_GPIO, 2}, {MPP_CAM, 2}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 30 */
+	{{{MPP_GPIO, 2}, {MPP_CAM, 2}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 31 */
+	{{{MPP_GPIO, 2}, {MPP_CAM, 2}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 32 (HIGH 0) */
+	{{{MPP_GPIO, 2}, {MPP_CAM, 2}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 33 (HIGH 1) */
+	{{{MPP_GPIO, 2}, {MPP_CAM, 2}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 34 (HIGH 2) */
+	{{{MPP_GPIO, 2}, {MPP_CAM, 2}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 35 (HIGH 3) */
+	{{{MPP_GPIO, 2}, {MPP_CAM, 2}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 36 (HIGH 4) */
+	{{{MPP_GPIO, 2}, {MPP_CAM, 2}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 37 (HIGH 5) */
+	{{{MPP_GPIO, 2}, {MPP_CAM, 2}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 38 (HIGH 6) */
+	{{{MPP_GPIO, 2}, {MPP_CAM, 2}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 39 (HIGH 7) */
+	{{{MPP_GPIO, 2}, {MPP_CAM, 2}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 40 (HIGH 8) */
+	{{{MPP_GPIO, 0}, {MPP_SDIO0, 0}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 41 (HIGH 9) */
+	{{{MPP_GPIO, 0}, {MPP_SDIO0, 0}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 42 (HIGH 10) */
+	{{{MPP_GPIO, 0}, {MPP_SDIO0, 0}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 43 (HIGH 11) */
+	{{{MPP_GPIO, 0}, {MPP_SDIO0, 0}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 44 (HIGH 12) */
+	{{{MPP_GPIO, 0}, {MPP_SDIO0, 0}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 45 (HIGH 13) */
+	{{{MPP_GPIO, 0}, {MPP_SDIO0, 0}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 46 (HIGH 14) */
+	{{{MPP_GPIO, 1}, {MPP_SDIO1, 1}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 47 (HIGH 15) */
+	{{{MPP_GPIO, 1}, {MPP_SDIO1, 1}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 48 (HIGH 16) */
+	{{{MPP_GPIO, 1}, {MPP_SDIO1, 1}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 49 (HIGH 17) */
+	{{{MPP_GPIO, 1}, {MPP_SDIO1, 1}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 50 (HIGH 18) */
+	{{{MPP_GPIO, 1}, {MPP_SDIO1, 1}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 51 (HIGH 19) */
+	{{{MPP_GPIO, 1}, {MPP_SDIO1, 1}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 52 (HIGH 20) */
+	{{{MPP_GPIO, 3}, {MPP_AUDIO1, 3}, {MPP_SSP, 3}, MPP_LAST4},
+	 dove_mpp_high_config},
+	/* MPP 53 (HIGH 21) */
+	{{{MPP_GPIO, 3}, {MPP_AUDIO1, 3}, {MPP_SSP, 3}, MPP_LAST4},
+	 dove_mpp_high_config},
+	/* MPP 54 (HIGH 22) */
+	{{{MPP_GPIO, 3}, {MPP_AUDIO1, 3}, {MPP_SSP, 3}, MPP_LAST4},
+	 dove_mpp_high_config},
+	/* MPP 55 (HIGH 23) */
+	{{{MPP_GPIO, 3}, {MPP_AUDIO1, 3}, {MPP_SSP, 3}, MPP_LAST4},
+	 dove_mpp_high_config},
+	/* MPP 56 (HIGH 24) */
+	{{{MPP_GPIO, 3}, {MPP_AUDIO1, 3}, {MPP_TWSI, 3}, MPP_LAST4},
+	 dove_mpp_high_config},
+	/* MPP 57 (HIGH 25) */
+	{{{MPP_GPIO, 3}, {MPP_GPIO_AUDIO1, 3}, {MPP_AUDIO1, 3}, {MPP_TWSI, 3}, MPP_LAST3},
+	 dove_mpp_high_config},
+	/* MPP 58 (HIGH 26) */
+	{{{MPP_GPIO, 5}, {MPP_SPI0, 5}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 59 (HIGH 27) */
+	{{{MPP_GPIO, 5}, {MPP_SPI0, 5}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 60 (HIGH 28) */
+	{{{MPP_GPIO, 5}, {MPP_SPI0, 5}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 61 (HIGH 29) */
+	{{{MPP_GPIO, 5}, {MPP_SPI0, 5}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 62 (HIGH 30) */
+	{{{MPP_GPIO, 4}, {MPP_UART1, 4}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 63 (HIGH 31) */
+	{{{MPP_GPIO, 4}, {MPP_UART1, 4}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 64 (HIGH 32) */
+	{{{MPP_GPIO, 0}, {MPP_NFC8_15, 0}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 65 (HIGH 33) */
+	{{{MPP_GPIO, 0}, {MPP_NFC8_15, 0}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 66 (HIGH 34) */
+	{{{MPP_GPIO, 0}, {MPP_NFC8_15, 0}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 67 (HIGH 35) */
+	{{{MPP_GPIO, 0}, {MPP_NFC8_15, 0}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 68 (HIGH 36) */
+	{{{MPP_GPIO, 0}, {MPP_NFC8_15, 0}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 69 (HIGH 37) */
+	{{{MPP_GPIO, 0}, {MPP_NFC8_15, 0}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 70 (HIGH 38) */
+	{{{MPP_GPIO, 0}, {MPP_NFC8_15, 0}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 71 (HIGH 39) */
+	{{{MPP_GPIO, 0}, {MPP_NFC8_15, 0}, MPP_LAST5},
+	 dove_mpp_high_config},
+	/* MPP 72 (HIGH 40) */
+	{{{MPP_GPIO, 0}, {MPP_NFC8_15, 0}, MPP_LAST5},
+	 dove_mpp_high_config},
+
+};
+
+void __init dove_mpp_conf(struct dove_mpp_mode *mode)
+{
+	/* Initialize gpiolib. */
+	orion_gpio_init();
+
+	while (mode->mpp >= 0) {
+		struct mpp_config *entry;
+		int i;
+		int found = 0;
+
+		if(mode->mpp >= sizeof(dove_mpp_table)) {
+			printk("dove_mpp_conf: invalid MPP number (%d)\n",
+			       mode->mpp);
+			return;
+		}
+		/* 
+		 * First configure PMU/MPP pin selection 
+		 * Valid for first 16 pins only
+		 */
+		if(mode->mpp < DOVE_PMU_MAX_PINS)
+			dove_mpp_pmu_config(mode->mpp, mode->type);	
+
+		entry = &dove_mpp_table[mode->mpp];
+
+		for (i = 0; i < DOVE_MPP_MAX_OPTIONS; i++) {
+			if (entry->types[i].type == mode->type) {
+				found = 1;
+				break;
+			}
+			if (entry->types[i].type == MPP_END)
+				break;
+		}
+
+		if (found) {
+			if (entry->config)
+				entry->config(mode->mpp,
+					      entry->types[i].type,
+					      entry->types[i].val);
+
+			if (mode->type == MPP_UNUSED)
+				orion_gpio_set_unused(mode->mpp);
+			if ((mode->type == MPP_GPIO) || (mode->type == MPP_GPIO_AUDIO1))
+				orion_gpio_set_valid(mode->mpp, 1);
+			else
+				orion_gpio_set_valid(mode->mpp, 0);
+		} else {
+			printk("dove_mpp_conf: MPP[%d] type %d not supported\n",
+			       mode->mpp ,mode->type);
+			return;
+		}
+		mode++;
+	}
+#ifdef CONFIG_PM
+	pm_registers_add(dove_mpp_regs, ARRAY_SIZE(dove_mpp_regs));
+	pm_registers_add(dove_pm_gpio_regs, ARRAY_SIZE(dove_pm_gpio_regs));
+#endif
+}
+
+/* This function configures mpp mode for mpps 0-23 */
+int __init dove_mpp_legacy_config(int mpp, enum dove_mpp_type type, int val)
+{
+	u32 mpp_ctrl_reg;
+	u32 mpp_ctrl;
+	int shift;
+	
+	switch (mpp) {
+	case 0 ... 7:
+		mpp_ctrl_reg = DOVE_MPP_VIRT_BASE;
+		break;
+	case 8 ... 15:
+		mpp_ctrl_reg = DOVE_MPP_VIRT_BASE + 4;
+		break;
+	case 16 ... 23:
+		mpp_ctrl_reg = DOVE_MPP_VIRT_BASE + 8;
+		break;
+	default:
+		printk(KERN_ERR "%s: invalid MPP (%d)\n", __func__, mpp);
+		return -1;
+	}
+	
+	mpp_ctrl = readl(mpp_ctrl_reg);
+
+	shift = (mpp & 7) << 2;
+	mpp_ctrl &= ~(0xf << shift);
+	mpp_ctrl |= (val & 0xf) << shift;
+		
+	writel(mpp_ctrl, mpp_ctrl_reg);
+	return 0;
+}
+
+/* This function configures mpp mode for mpps >= 24 */
+int __init dove_mpp_high_config(int mpp, enum dove_mpp_type type, int mask)
+{
+	u32 mpp_ctrl = readl(DOVE_MPP_CTRL4_VIRT_BASE);
+
+	if (type == MPP_GPIO)
+	mpp_ctrl |= 0x1 << mask;
+	else
+	mpp_ctrl &= ~(0x1 << mask);
+
+	writel(mpp_ctrl, DOVE_MPP_CTRL4_VIRT_BASE);
+
+	if (mpp >= 52 && mpp <= 55) {
+		u32 ssp_ctrl = readl(DOVE_SSP_CTRL_STATUS_1);
+
+		if (type == MPP_AUDIO1)
+			ssp_ctrl &= ~DOVE_SSP_ON_AU1;
+		else
+			ssp_ctrl |= DOVE_SSP_ON_AU1;
+		writel(ssp_ctrl, DOVE_SSP_CTRL_STATUS_1);
+	}
+	if (mpp >= 56 && mpp <= 57) {
+		u32 global_config_2 = readl(DOVE_GLOBAL_CONFIG_2);
+
+		if (type == MPP_TWSI)
+			global_config_2 |= DOVE_TWSI_OPTION3_GPIO;
+		else
+			global_config_2 &= ~DOVE_TWSI_OPTION3_GPIO;
+		writel(global_config_2, DOVE_GLOBAL_CONFIG_2);
+	}
+	if (mpp == 57) {
+		u32 mpp_general_config = readl(DOVE_MPP_GENERAL_VIRT_BASE);
+		if (type == MPP_GPIO_AUDIO1)
+			mpp_general_config |= DOVE_AU1_SPDIFO_GPIO_EN;
+		else
+			mpp_general_config &= ~DOVE_AU1_SPDIFO_GPIO_EN;
+		writel(mpp_general_config, DOVE_MPP_GENERAL_VIRT_BASE);
+	}
+	if (mpp >= 64 && mpp <= 72) {
+		u32 mpp_general_config = readl(DOVE_MPP_GENERAL_VIRT_BASE);
+		if (type == MPP_GPIO)
+			mpp_general_config |= 0x1 << mask;
+		else
+			mpp_general_config &= ~(0x1 << mask);
+		writel(mpp_general_config, DOVE_MPP_GENERAL_VIRT_BASE);
+	}
+
+	return 0;
+}
+
+/* This function routes MPP to PMU directly */
+void __init dove_mpp_pmu_config(int mpp, enum dove_mpp_type type)
+{
+	u32 pmu_mpp_ctrl;
+	
+	pmu_mpp_ctrl = readl(DOVE_PMU_MPP_GENERAL_CTRL);
+	if (type == MPP_PMU)
+		pmu_mpp_ctrl |= (1 << mpp);
+	else
+		pmu_mpp_ctrl &= ~(1 << mpp);
+	writel(pmu_mpp_ctrl, DOVE_PMU_MPP_GENERAL_CTRL);
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/idt5v49ee503.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/idt5v49ee503.h
@@ -0,0 +1,38 @@
+/* IDT clock configurations header file */
+
+#ifndef _INC_IDT5V49EE503_H
+#define _INC_IDT5V49EE503_H
+
+/* PLL ID inside the clock chip */
+typedef enum 
+{
+	IDT_PLL_0 = 0,
+	IDT_PLL_1 = 1,
+	IDT_PLL_2 = 2,
+	IDT_PLL_3 = 3,
+	IDT_PLL_NUM
+
+} idt_clock_id_t;
+
+/* Output pin ID where the PLL is connected */
+typedef enum 
+{
+	IDT_OUT_ID_0 = 0,
+	IDT_OUT_ID_1 = 1,
+	IDT_OUT_ID_2 = 2,
+	IDT_OUT_ID_3 = 3,
+	IDT_OUT_ID_6 = 6,
+	IDT_OUT_ID_INV
+
+} idt_output_id_t;
+
+struct idt_data {
+	int		clock0_enable; /* set to 1 to enable clock 0*/
+	idt_output_id_t clock0_out_id; /* idt output id of clock 0 */
+	idt_clock_id_t	clock0_pll_id; /* pll to use for clock 0 */
+	int		clock1_enable; /* set to 1 to enable clock 1*/
+	idt_output_id_t clock1_out_id; /* idt output id of clock 1 */
+	idt_clock_id_t	clock1_pll_id; /* pll to use for clock 1 */
+};
+
+#endif /* _INC_IDT5V49EE503_H */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/dove-db-setup.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/dove-db-setup.c
@@ -0,0 +1,1141 @@
+/*
+ * arch/arm/mach-dove/dove-db-setup.c
+ *
+ * Marvell DB-MV88F6781-BP Development Board Setup
+ *
+ * Author: Tzachi Perelstein <tzachi@marvell.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/irq.h>
+#include <linux/mtd/physmap.h>
+#include <linux/mtd/nand.h>
+#include <linux/timer.h>
+#include <linux/ata_platform.h>
+#include <linux/mv643xx_eth.h>
+#include <linux/i2c.h>
+#include <linux/i2c/pca953x.h>
+#include <linux/pci.h>
+#include <linux/gpio_mouse.h>
+#include <linux/gpio_keys.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/orion_spi.h>
+#include <linux/spi/flash.h>
+#include <linux/spi/tsc200x.h>
+#include <video/dovefb.h>
+#include <video/dovefbreg.h>
+#include <mach/dove_bl.h>
+#include <plat/i2s-orion.h>
+#include <asm/mach-types.h>
+#include <asm/gpio.h>
+#include <asm/mach/arch.h>
+#include <mach/dove.h>
+#include <asm/hardware/pxa-dma.h>
+#include <plat/orion_nfc.h>
+#include <mach/dove_ssp.h>
+#include <mach/pm.h>
+#include <plat/cafe-orion.h>
+#include "common.h"
+#include "clock.h"
+#include "idt5v49ee503.h"
+#include "mpp.h"
+#include "pmu/mvPmu.h"
+#include "pmu/mvPmuRegs.h"
+#include "pdma/mvPdma.h"
+
+#define DOVE_DB_WAKEUP_GPIO	(3)
+#define DOVE_DB_POWER_OFF_GPIO	(8)
+
+static unsigned int front_panel = 0;
+module_param(front_panel, uint, 0);
+MODULE_PARM_DESC(front_panel, "set to 1 if the dove DB front panel connected");
+
+static unsigned int lcd2dvi = 0;
+module_param(lcd2dvi, uint, 0);
+MODULE_PARM_DESC(lcd2dvi, "set to 1 if the LCD2DVI connected");
+
+static unsigned int left_tact = 0;
+module_param(left_tact, uint, 0);
+MODULE_PARM_DESC(left_tact, "Use left tact as mouse");
+
+static unsigned int right_tact = 0;
+module_param(right_tact, uint, 0);
+MODULE_PARM_DESC(right_tact, "Use Right tact as keys");
+
+static unsigned int use_hal_giga = 0;
+#ifdef CONFIG_MV643XX_ETH
+module_param(use_hal_giga, uint, 0);
+MODULE_PARM_DESC(use_hal_giga, "Use the HAL giga driver");
+#endif
+
+static unsigned int standby_fix = 1;
+module_param(standby_fix, uint, 0);
+MODULE_PARM_DESC(standby_fix, "if 1 then CKE and MRESET are connected to MPP4 and MPP6");
+
+static int dvs_enable = 1;
+module_param(dvs_enable, int, 1);
+MODULE_PARM_DESC(dvs_enable, "if 1 then enable DVS");
+
+extern unsigned int useHalDrivers;
+extern char *useNandHal;
+/*
+ * set lcd clock source in dovefb_mach_info, notice the sequence is not
+ * same to bootargs.
+ * = MRVL_AXI_CLK, choose AXI, 333Mhz.
+         name is "AXICLK"
+ * = MRVL_PLL_CLK, choose PLL, auto use accurate mode if only one LCD refer to it.
+         name is "LCDCLK" or "accurate_LCDCLK"
+ * = MRVL_EXT_CLK0, choose external clk#0, (available REV A0)
+         name is "IDT_CLK0"
+ * = MRVL_EXT_CLK1, choose external clk#1, (available REV A0)
+         name is "IDT_CLK1"
+ */
+/*
+ * LCD HW output Red[0] to LDD[0] when set bit [19:16] of reg 0x190
+ * to 0x0. Which means HW outputs BGR format default. All platforms
+ * uses this controller should enable .panel_rbswap. Unless layout
+ * design connects Blue[0] to LDD[0] instead.
+ */
+static struct dovefb_mach_info dove_db_lcd0_dmi = {
+	.id_gfx			= "GFX Layer 0",
+	.id_ovly		= "Video Layer 0",
+	.clk_src		= MRVL_EXT_CLK1,
+	.clk_name		= "IDT_CLK1",
+//	.num_modes		= ARRAY_SIZE(video_modes),
+//	.modes			= video_modes,
+	.pix_fmt		= PIX_FMT_RGB888PACK,
+	.io_pin_allocation	= IOPAD_DUMB24,
+	.panel_rgb_type		= DUMB24_RGB888_0,
+	.panel_rgb_reverse_lanes= 0,
+	.gpio_output_data	= 0,
+	.gpio_output_mask	= 0,
+#ifndef CONFIG_FB_DOVE_CLCD0_I2C_DEFAULT_SETTING
+	.ddc_i2c_adapter	= CONFIG_FB_DOVE_CLCD0_I2C_CHANNEL,
+	.ddc_i2c_address	= CONFIG_FB_DOVE_CLCD0_I2C_ADDRESS,
+#else
+	.ddc_i2c_adapter	= 0,
+	.ddc_i2c_address        = 0x3f,
+#endif
+	.invert_composite_blank	= 0,
+	.invert_pix_val_ena	= 0,
+	.invert_pixclock	= 0,
+	.invert_vsync		= 0,
+	.invert_hsync		= 0,
+	.panel_rbswap		= 1,
+	.active			= 1,
+};
+
+static struct dovefb_mach_info dove_db_lcd0_vid_dmi = {
+	.id_ovly		= "Video Layer 0",
+//	.num_modes		= ARRAY_SIZE(video_modes),
+//	.modes			= video_modes,
+	.pix_fmt		= PIX_FMT_RGB888PACK,
+	.io_pin_allocation	= IOPAD_DUMB24,
+	.panel_rgb_type		= DUMB24_RGB888_0,
+	.panel_rgb_reverse_lanes= 0,
+	.gpio_output_data	= 0,
+	.gpio_output_mask	= 0,
+	.ddc_i2c_adapter	= -1,
+	.invert_composite_blank	= 0,
+	.invert_pix_val_ena	= 0,
+	.invert_pixclock	= 0,
+	.invert_vsync		= 0,
+	.invert_hsync		= 0,
+	.panel_rbswap		= 1,
+	.active			= 0,
+	.enable_lcd0		= 0,
+};
+
+static struct dovefb_mach_info dove_db_fp_lcd0_dmi = {
+	.id_gfx			= "GFX Layer 0",
+	.id_ovly		= "Video Layer 0",
+	.clk_src		= MRVL_EXT_CLK1,
+	.clk_name		= "IDT_CLK1",
+//	.num_modes		= ARRAY_SIZE(video_modes),
+//	.modes			= video_modes,
+	.pix_fmt		= PIX_FMT_RGB888PACK,
+#if defined(CONFIG_FB_DOVE_CLCD_DCONB_BYPASS0)
+	.io_pin_allocation	= IOPAD_DUMB24,
+	.panel_rgb_type		= DUMB24_RGB888_0,
+#else
+	.io_pin_allocation	= IOPAD_DUMB18GPIO,
+	.panel_rgb_type		= DUMB18_RGB666_0,
+#endif
+	.panel_rgb_reverse_lanes= 0,
+	.gpio_output_data	= 3,
+	.gpio_output_mask	= 3,
+	.ddc_polling_disable	= 1,
+#ifndef CONFIG_FB_DOVE_CLCD0_I2C_DEFAULT_SETTING
+        .ddc_i2c_adapter        = CONFIG_FB_DOVE_CLCD0_I2C_CHANNEL,
+        .ddc_i2c_address        = CONFIG_FB_DOVE_CLCD0_I2C_ADDRESS,
+#else
+	.ddc_i2c_adapter	= 3,
+	.ddc_i2c_address	= 0x50,
+#endif
+	.invert_composite_blank	= 0,
+	.invert_pix_val_ena	= 0,
+	.invert_pixclock	= 0,
+	.invert_vsync		= 0,
+	.invert_hsync		= 0,
+	.panel_rbswap		= 1,
+	.active			= 1,
+};
+
+static struct dovefb_mach_info dove_db_fp_lcd0_vid_dmi = {
+	.id_ovly		= "Video Layer 0",
+//	.num_modes		= ARRAY_SIZE(video_modes),
+//	.modes			= video_modes,
+	.pix_fmt		= PIX_FMT_RGB888PACK,
+	.io_pin_allocation	= IOPAD_DUMB18GPIO,
+	.panel_rgb_type		= DUMB18_RGB666_0,
+	.panel_rgb_reverse_lanes= 0,
+	.gpio_output_data	= 3,
+	.gpio_output_mask	= 3,
+	.ddc_i2c_adapter	= -1,
+	.invert_composite_blank	= 0,
+	.invert_pix_val_ena	= 0,
+	.invert_pixclock	= 0,
+	.invert_vsync		= 0,
+	.invert_hsync		= 0,
+	.panel_rbswap		= 1,
+	.active			= 0,
+	.enable_lcd0		= 0,
+};
+
+static struct dovefb_mach_info dove_db_lcd1_dmi = {
+	.id_gfx			= "GFX Layer 1",
+	.id_ovly		= "Video Layer 1",
+	.clk_src		= MRVL_PLL_CLK,
+	.clk_name		= "accurate_LCDCLK",
+//	.num_modes		= ARRAY_SIZE(video_modes),
+//	.modes			= video_modes,
+	.pix_fmt		= PIX_FMT_RGB565,
+	.io_pin_allocation	= IOPAD_DUMB24,
+	.panel_rgb_type		= DUMB24_RGB888_0,
+	.panel_rgb_reverse_lanes= 0,
+	.gpio_output_data	= 0,
+	.gpio_output_mask	= 0,
+#ifndef CONFIG_FB_DOVE_CLCD1_I2C_DEFAULT_SETTING
+        .ddc_i2c_adapter        = CONFIG_FB_DOVE_CLCD1_I2C_CHANNEL,
+        .ddc_i2c_address        = CONFIG_FB_DOVE_CLCD1_I2C_ADDRESS,
+#else
+        .ddc_i2c_adapter        = 1,
+        .ddc_i2c_address        = 0x50,
+#endif
+	.invert_composite_blank	= 0,
+	.invert_pix_val_ena	= 0,
+	.invert_pixclock	= 0,
+	.invert_vsync		= 0,
+	.invert_hsync		= 0,
+	.panel_rbswap		= 1,
+	.active			= 1,
+#ifndef CONFIG_FB_DOVE_CLCD
+	.enable_lcd0		= 1,
+#else
+	.enable_lcd0		= 0,
+#endif
+};
+
+static struct dovefb_mach_info dove_db_lcd1_vid_dmi = {
+	.id_ovly		= "Video Layer 1",
+//	.num_modes		= ARRAY_SIZE(video_modes),
+//	.modes			= video_modes,
+	.pix_fmt		= PIX_FMT_RGB888PACK,
+	.io_pin_allocation	= IOPAD_DUMB24,
+	.panel_rgb_type		= DUMB24_RGB888_0,
+	.panel_rgb_reverse_lanes= 0,
+	.gpio_output_data	= 0,
+	.gpio_output_mask	= 0,
+	.ddc_i2c_adapter	= -1,
+	.invert_composite_blank	= 0,
+	.invert_pix_val_ena	= 0,
+	.invert_pixclock	= 0,
+	.invert_vsync		= 0,
+	.invert_hsync		= 0,
+	.panel_rbswap		= 1,
+	.active			= 0,
+};
+
+
+
+static struct dove_ssp_platform_data dove_ssp_platform_data = {
+	.use_dma = 0,
+	.use_loopback = 1,
+	.dss = 32,
+	.scr = 2,
+	.frf = 1,
+	.rft = 8,
+	.tft = 8
+};
+
+
+/*****************************************************************************
+ * BACKLIGHT
+ ****************************************************************************/
+static struct dovebl_platform_data dove_db_backlight_data = {
+	.default_intensity = 0xa,
+	.gpio_pm_control = 1,
+
+	.lcd_start = DOVE_LCD1_PHYS_BASE,	/* lcd power control reg base. */
+	.lcd_end = DOVE_LCD1_PHYS_BASE+0x1C8,	/* end of reg map. */
+	.lcd_offset = LCD_SPU_DUMB_CTRL,	/* register offset */
+	.lcd_mapped = 0,		/* va = 0, pa = 1 */
+	.lcd_mask = 0x200000,		/* mask, bit[21] */
+	.lcd_on = 0x200000,			/* value to enable lcd power */
+	.lcd_off = 0x0,			/* value to disable lcd power */
+
+	.blpwr_start = DOVE_LCD1_PHYS_BASE, /* bl pwr ctrl reg base. */
+	.blpwr_end = DOVE_LCD1_PHYS_BASE+0x1C8,	/* end of reg map. */
+	.blpwr_offset = LCD_SPU_DUMB_CTRL,	/* register offset */
+	.blpwr_mapped = 0,		/* pa = 0, va = 1 */
+	.blpwr_mask = 0x100000,		/* mask */
+	.blpwr_on = 0x100000,		/* value to enable bl power */
+	.blpwr_off = 0x0,		/* value to disable bl power */
+
+	.btn_start = DOVE_LCD1_PHYS_BASE, /* brightness control reg base. */
+	.btn_end = DOVE_LCD1_PHYS_BASE+0x1C8,	/* end of reg map. */
+	.btn_offset = LCD_CFG_GRA_PITCH,	/* register offset */
+	.btn_mapped = 0,		/* pa = 0, va = 1 */
+	.btn_mask = 0xF0000000,	/* mask */
+	.btn_level = 15,	/* how many level can be configured. */
+	.btn_min = 0x1,	/* min value */
+	.btn_max = 0xF,	/* max value */
+	.btn_inc = 0x1,	/* increment */
+};
+
+void __init dove_db_clcd_init(void) {
+#ifdef CONFIG_FB_DOVE
+	struct dovefb_mach_info *lcd0_dmi, *lcd0_vid_dmi;
+	u32 dev, rev;
+	
+	dove_pcie_id(&dev, &rev);
+
+	if (front_panel) {
+		lcd0_dmi = &dove_db_fp_lcd0_dmi;
+		lcd0_vid_dmi = &dove_db_fp_lcd0_vid_dmi;
+	} else {
+		lcd0_dmi = &dove_db_lcd0_dmi;
+		lcd0_vid_dmi = &dove_db_lcd0_vid_dmi;
+	}
+
+	clcd_platform_init(lcd0_dmi, lcd0_vid_dmi,
+			   &dove_db_lcd1_dmi, &dove_db_lcd1_vid_dmi,
+			   &dove_db_backlight_data);
+
+#endif /* CONFIG_FB_DOVE */
+}
+
+#define DOVE_DB_PHY_RST_GPIO	(1)
+#define DOVE_DB_TS_PEN_GPIO	(63)
+#define DOVE_DB_TS_PEN_IRQ	(64 + DOVE_DB_TS_PEN_GPIO)
+
+static struct tsc2005_platform_data ts_info = {
+	.model			= 2005,
+	.x_plate_ohms		= 450,
+	.y_plate_ohms		= 250,
+};
+
+struct spi_board_info __initdata dove_db_spi_ts_dev[] = {
+	{
+		.modalias  		= "tsc2005",
+		.irq			= DOVE_DB_TS_PEN_IRQ,
+		.max_speed_hz		= 10000000, //10MHz
+		.bus_num		= 1,
+		.chip_select		= 0,
+		.mode		        = SPI_MODE_0,      
+		.platform_data          = &ts_info,
+	},
+};
+
+int __init dove_db_ts_gpio_setup(void)
+{
+	orion_gpio_set_valid(DOVE_DB_TS_PEN_GPIO, 1);
+	if (gpio_request(DOVE_DB_TS_PEN_GPIO, "DOVE_TS_PEN_IRQ") != 0)
+		pr_err("Dove: failed to setup TS IRQ GPIO\n");
+	if (gpio_direction_input(DOVE_DB_TS_PEN_GPIO) != 0) {
+		printk(KERN_ERR "%s failed "
+		       "to set output pin %d\n", __func__,
+		       DOVE_DB_TS_PEN_GPIO);
+		gpio_free(DOVE_DB_TS_PEN_GPIO);
+		return -1;
+	}
+	//IRQ
+	set_irq_chip(DOVE_DB_TS_PEN_IRQ, &orion_gpio_irq_chip);
+	set_irq_handler(DOVE_DB_TS_PEN_IRQ, handle_level_irq);
+	set_irq_type(DOVE_DB_TS_PEN_IRQ, IRQ_TYPE_LEVEL_LOW);
+
+	return 0;
+}
+
+int __init dove_db_b_giga_phy_gpio_setup(void)
+{
+	orion_gpio_set_valid(DOVE_DB_PHY_RST_GPIO, 1);
+	if (gpio_request(DOVE_DB_PHY_RST_GPIO, "Giga Phy reset gpio") != 0)
+		pr_err("Dove: failed to setup Giga phy reset GPIO\n");
+	if (gpio_direction_output(DOVE_DB_PHY_RST_GPIO, 1) != 0) {
+		printk(KERN_ERR "%s failed to set output pin %d\n", __func__,
+		       DOVE_DB_PHY_RST_GPIO);
+		gpio_free(DOVE_DB_PHY_RST_GPIO);
+		return -1;
+	}
+
+	return 0;
+}
+
+static struct cafe_cam_platform_data dove_cafe_cam_data = {
+	.power_down 	= 1, //CTL0 connected to the sensor power down
+	.reset		= 2, //CTL1 connected to the sensor reset
+	.numbered_i2c_bus = 1,
+	.i2c_bus_id	= 3,
+};
+
+extern int __init pxa_init_dma_wins(struct mbus_dram_target_info * dram);
+
+static struct orion_i2s_platform_data i2s1_data = {
+	.i2s_play	= 1,
+	.i2s_rec	= 1,
+	.spdif_play	= 1,
+};
+
+static struct orion_i2s_platform_data i2s0_data = {
+	.i2s_play	= 1,
+	.i2s_rec	= 1,
+};
+
+static struct mv643xx_eth_platform_data dove_db_ge00_data = {
+	.phy_addr	= MV643XX_ETH_PHY_ADDR_DEFAULT,
+};
+
+static struct mv643xx_eth_platform_data dove_db_b_ge00_data = {
+	.phy_addr	= 1,
+};
+
+static struct mv_sata_platform_data dove_db_sata_data = {
+        .n_ports        = 1,
+};
+
+static struct gpio_mouse_platform_data ltact_dove_data = {
+        .scan_ms = 10,
+        .polarity = 1,
+        {
+                {
+			.up = 67,
+			.down = 64,
+			.left = 65,
+			.right = 66,
+			.bleft = 68,
+                        .bright = -1,
+                        .bmiddle = -1
+                } 
+        },
+	.use_activity_irq = 1,
+	.activity_gpio = 57,
+};
+
+static struct gpio_keys_button gpio_buttons[] = {
+	{
+		.code			= KEY_KP2,
+		.gpio			= 72,
+		.active_low		= 1,
+		.debounce_interval	= 10,
+		.desc			= "down",
+	},
+	{
+		.code			= KEY_KP4,
+		.gpio			= 73,
+		.active_low		= 1,
+		.debounce_interval	= 10,
+		.desc			= "left",
+	},
+	{
+		.code			= KEY_KP6,
+		.gpio			= 74,
+		.active_low		= 1,
+		.debounce_interval	= 10,
+		.desc			= "right",
+	},
+	{
+		.code			= KEY_KP8,
+		.gpio			= 75,
+		.active_low		= 1,
+		.debounce_interval	= 10,
+		.desc			= "up",
+	},
+	{
+		.code			= KEY_ENTER,
+		.gpio			= 76,
+		.active_low		= 1,
+		.debounce_interval	= 10,
+		.desc			= "enter",
+	},
+};
+
+static struct gpio_keys_platform_data gpio_key_info = {
+	.buttons	= gpio_buttons,
+	.nbuttons	= ARRAY_SIZE(gpio_buttons),
+	.use_shared_irq = 1,
+	.shared_irq = 57 + 64,
+};
+
+static struct platform_device keys_gpio = {
+	.name	= "gpio-keys",
+	.id	= 1,
+	.dev	= {
+		.platform_data	= &gpio_key_info,
+	},
+};
+
+/*****************************************************************************
+ * SPI Devices:
+ * 	SPI0: 8M Flash ST-M25P64-VMF6P
+ ****************************************************************************/
+static const struct flash_platform_data dove_db_spi_flash_data = {
+	.type		= "m25p64",
+};
+
+static struct spi_board_info __initdata dove_db_spi_flash_info[] = {
+	{
+		.modalias       = "m25p80",
+		.platform_data  = &dove_db_spi_flash_data,
+		.irq            = -1,
+		.max_speed_hz   = 20000000,
+		.bus_num        = 0,
+		.chip_select    = 0,
+	},
+};
+
+/*****************************************************************************
+ * 7-Segment on GPIO 14,15,18,19
+ * Dummy counter up to 7 every 1 sec
+ ****************************************************************************/
+
+static struct timer_list dove_db_timer;
+static int dove_db_7seg_gpios[] = {14, 15, 62};
+
+static void dove_db_7seg_event(unsigned long data)
+{
+     static int count = 0;
+
+     gpio_set_value(dove_db_7seg_gpios[0], count & 1);
+     gpio_set_value(dove_db_7seg_gpios[1], count & (1 << 1));
+     gpio_set_value(dove_db_7seg_gpios[2], count & (1 << 2));
+
+     count = (count + 1) & 7;
+     mod_timer(&dove_db_timer, jiffies + 1 * HZ);
+}
+
+static int __init dove_db_7seg_init(void)
+{
+	if (machine_is_dove_db() || machine_is_dove_db_b()) {
+		int i;
+		
+		for(i = 0; i < 3; i++){
+			int pin = dove_db_7seg_gpios[i];
+
+			if (gpio_request(pin, "7seg LED") == 0) {
+				if (gpio_direction_output(pin, 0) != 0) {
+					printk(KERN_ERR "%s failed "
+					       "to set output pin %d\n", __func__,
+					       pin);
+					gpio_free(pin);
+					return 0;
+				}
+			} else {
+				printk(KERN_ERR "%s failed "
+				       "to request gpio %d\n", __func__, pin);
+				return 0;
+			}
+		}
+		setup_timer(&dove_db_timer, dove_db_7seg_event, 0);
+		mod_timer(&dove_db_timer, jiffies + 1 * HZ);
+	}
+	return 0;
+}
+
+__initcall(dove_db_7seg_init);
+
+/*****************************************************************************
+ * PCI
+ ****************************************************************************/
+static int __init dove_db_pci_init(void)
+{
+	if (machine_is_dove_db() || machine_is_dove_db_b())
+		dove_pcie_init(1, 1);
+
+	return 0;
+}
+
+subsys_initcall(dove_db_pci_init);
+
+static int __init dove_db_cam_init(void)
+{
+	if ((machine_is_dove_db() || machine_is_dove_db_b())  &&  front_panel)
+		dove_cam_init(&dove_cafe_cam_data);
+	
+	return 0;
+}
+
+late_initcall(dove_db_cam_init);
+
+static int pca9555_setup(struct i2c_client *client,
+			 unsigned gpio, unsigned ngpio,
+			 void *context)
+{
+	if(front_panel) {
+		if(left_tact)
+			dove_tact_init(&ltact_dove_data);
+		if(right_tact)
+			platform_device_register(&keys_gpio);
+	}
+	return 0;
+}
+
+/* PCA9555 */
+static struct pca953x_platform_data dove_db_gpio_ext_pdata = {
+	.gpio_base = 64,
+	.setup = pca9555_setup,
+};
+
+static struct i2c_board_info dove_db_gpio_ext_info[] = {
+	[0] = {
+		I2C_BOARD_INFO("pca9555", 0x27),
+		.platform_data = &dove_db_gpio_ext_pdata,
+	},
+};
+
+/*****************************************************************************
+ * A2D on I2C bus
+ ****************************************************************************/
+static struct i2c_board_info __initdata i2c_a2d = {
+	I2C_BOARD_INFO("cs42l51", 0x4A),
+};
+
+/*****************************************************************************
+ * IDT clock 
+ ****************************************************************************/
+static struct idt_data dove_db_idt_data = {
+	/* clock 0 connected to pin LCD_EXT_REF_CLK[0]*/
+	.clock0_enable = 1,
+	.clock0_out_id = IDT_OUT_ID_2,
+	.clock0_pll_id = IDT_PLL_1,
+	/* clock 1 connected to pin LCD_EXT_REF_CLK[1]*/
+	.clock1_enable = 1,
+	.clock1_out_id = IDT_OUT_ID_3,
+	.clock1_pll_id = IDT_PLL_2,
+};
+
+static struct i2c_board_info __initdata idt = {
+	I2C_BOARD_INFO("idt5v49ee503", 0x6A),
+	.platform_data = &dove_db_idt_data,
+};
+
+/*****************************************************************************
+ * I2C buses - ADI9889 LCD to HDMI/DVI/VGA converter
+ ****************************************************************************/
+static struct i2c_board_info __initdata adi9889[] = {
+	{
+		I2C_BOARD_INFO("adi9889_i2c", 0x3d),
+	},
+	{
+		I2C_BOARD_INFO("adi9889_edid_i2c", 0x3F),
+	},
+	{
+		I2C_BOARD_INFO("ths8200_i2c", 0x21),
+	},
+};
+
+/*****************************************************************************
+ * NAND
+ ****************************************************************************/
+static struct mtd_partition partition_dove[] = {
+	{ .name		= "UBoot",
+	  .offset	= 0,
+	  .size		= 1 * SZ_1M },
+	{ .name		= "UImage",
+	  .offset	= MTDPART_OFS_APPEND,
+	  .size		= 4 * SZ_1M },
+	{ .name		= "Root",
+	  .offset	= MTDPART_OFS_APPEND,
+	  .size         = MTDPART_SIZ_FULL},
+};
+static u64 nfc_dmamask = DMA_BIT_MASK(32);
+static struct nfc_platform_data dove_db_nfc_hal_data = {
+	.nfc_width      = 8,			/* Assume non-ganged by default */
+	.num_devs       = 1,			/* Assume non-ganged by default */
+	.num_cs         = 2,			/* Samsung K9HBG08U1A */
+//	.num_cs		= 1,			/* MT 29F64G908CBAAA */
+	.use_dma	= 1,
+	.ecc_type	= MV_NFC_ECC_BCH_2K,	/* 4bit ECC required by K9HBG08U1A */
+	.parts = partition_dove,
+	.nr_parts = ARRAY_SIZE(partition_dove)
+};
+
+static struct nfc_platform_data dove_db_nfc_data = {
+	.nfc_width      = 8,
+	.num_devs       = 1,
+	.num_cs         = 2,
+	.use_dma        = 1,
+	.ecc_type	= MV_NFC_ECC_HAMMING,
+	.parts = partition_dove,
+	.nr_parts = ARRAY_SIZE(partition_dove)
+ };
+
+static struct resource dove_nfc_resources[]  = {
+	[0] = {
+		.start	= (DOVE_NFC_PHYS_BASE),
+		.end	= (DOVE_NFC_PHYS_BASE + 0xFF),
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= IRQ_NAND,
+		.end	= IRQ_NAND,
+		.flags	= IORESOURCE_IRQ,
+	},
+	[2] = {
+		/* DATA DMA */
+		.start	= 97,
+		.end	= 97,
+		.flags	= IORESOURCE_DMA,
+	},
+	[3] = {
+		/* COMMAND DMA */
+		.start	= 99,
+		.end	= 99,
+		.flags	= IORESOURCE_DMA,
+	},
+};
+
+static struct platform_device dove_nfc = {
+	.name		= "orion-nfc",
+	.id		= -1,
+	.dev		= {
+		.dma_mask		= &nfc_dmamask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+		.platform_data		= &dove_db_nfc_data,
+	},
+	.resource	= dove_nfc_resources,
+	.num_resources	= ARRAY_SIZE(dove_nfc_resources),
+};
+
+static void __init dove_db_nfc_init(void)
+{
+	/* Check if HAL driver is intended */
+	if(useHalDrivers || useNandHal) {
+		dove_nfc.name = "orion-nfc-hal";
+
+		/* Check for ganaged mode */
+		if (strncmp(useNandHal, "ganged", 6) == 0) {
+			dove_db_nfc_hal_data.nfc_width = 16;
+			dove_db_nfc_hal_data.num_devs = 2;
+			useNandHal += 7;
+		}
+
+		/* Check for ECC type directive */
+		if (strcmp(useNandHal, "4bitecc") == 0) {
+			dove_db_nfc_hal_data.ecc_type = MV_NFC_ECC_BCH_2K;
+		} else if (strcmp(useNandHal, "8bitecc") == 0) {
+			dove_db_nfc_hal_data.ecc_type = MV_NFC_ECC_BCH_1K;
+		} else if (strcmp(useNandHal, "12bitecc") == 0) {
+			dove_db_nfc_hal_data.ecc_type = MV_NFC_ECC_BCH_704B;
+		} else if (strcmp(useNandHal, "16bitecc") == 0) {
+			dove_db_nfc_hal_data.ecc_type = MV_NFC_ECC_BCH_512B;
+		}
+
+		dove_db_nfc_hal_data.tclk = dove_tclk_get();
+		dove_nfc.dev.platform_data = &dove_db_nfc_hal_data;
+
+	} else {  /* NON HAL driver is used */
+		dove_db_nfc_data.tclk = dove_tclk_get();
+	}
+
+	platform_device_register(&dove_nfc);
+}
+
+static struct dove_mpp_mode dove_db_mpp_modes[] __initdata = {
+	{ 0, MPP_SDIO0 },           	/* SDIO0 */
+	{ 1, MPP_SDIO0 },           	/* SDIO0 */
+
+	{ 2, MPP_PMU },			/* Standby power control */
+	{ 3, MPP_PMU },			/* Power button - standby wakeup */
+	{ 4, MPP_PMU },			/* Core power good indication */
+	{ 5, MPP_PMU },			/* DeepIdle power control */
+	{ 6, MPP_PMU },			/* Wakup - Charger */
+	{ 7, MPP_PMU },			/* Standby led */
+
+	{ 8, MPP_GPIO },		/* power off */
+
+	{ 9, MPP_PMU },			/* Cpu power good indication */
+	{ 10, MPP_PMU },		/* DVS SDI control */
+
+	{ 11, MPP_SATA_ACT },           /* SATA active */
+	{ 12, MPP_SDIO1 },           	/* SDIO1 */
+	{ 13, MPP_SDIO1 },           	/* SDIO1 */
+
+        { 14, MPP_GPIO },               /* 7segDebug Led */
+        { 15, MPP_GPIO },               /* 7segDebug Led */
+	{ 16, MPP_GPIO },		/* PMU - DDR termination control */
+	{ 17, MPP_TWSI },
+	{ 18, MPP_GPIO },
+	{ 19, MPP_TWSI },
+
+	{ 20, MPP_SPI1 },
+	{ 21, MPP_SPI1 },
+	{ 22, MPP_SPI1 },
+	{ 23, MPP_SPI1 },
+
+	{ 24, MPP_CAM }, /* will configure MPPs 24-39*/
+
+	{ 40, MPP_SDIO0 }, /* will configure MPPs 40-45 */
+
+	{ 46, MPP_SDIO1 }, /* SD0 Group */
+	{ 47, MPP_SDIO1 }, /* SD0 Group */
+	{ 48, MPP_SDIO1 }, /* SD0 Group */
+	{ 49, MPP_SDIO1 }, /* SD0 Group */
+	{ 50, MPP_SDIO1 }, /* SD0 Group */
+	{ 51, MPP_SDIO1 }, /* SD0 Group */
+
+        { 52, MPP_AUDIO1 }, /* AU1 Group */
+        { 53, MPP_AUDIO1 }, /* AU1 Group */
+        { 54, MPP_AUDIO1 }, /* AU1 Group */
+        { 55, MPP_AUDIO1 }, /* AU1 Group */
+        { 56, MPP_AUDIO1 }, /* AU1 Group */
+        { 57, MPP_AUDIO1 }, /* AU1 Group */
+
+	{ 58, MPP_SPI0 }, /* will configure MPPs 58-61 */
+
+        { 62, MPP_GPIO }, /* 7segDebug Led */
+        { 63, MPP_GPIO }, /* Touch screen irq */
+        { -1 },
+};
+
+static struct dove_mpp_mode dove_db_b_mpp_modes[] __initdata = {
+	{ 0, MPP_PMU },           	/*  */
+	{ 1, MPP_PMU },           	/* SDIO0 */
+
+	{ 2, MPP_GPIO },		/* PMU - DDR termination control */	
+	{ 3, MPP_PMU },			/* standby wakeup/wake on lan */
+	{ 4, MPP_PMU },			/* CKE mask */
+	{ 5, MPP_PMU },			/* Standby power control */
+	{ 6, MPP_PMU },			/* DDR-M-RESET */
+	{ 7, MPP_PMU },			/* Standby led */
+
+	{ 8, MPP_GPIO },		/* power off */
+
+	{ 9, MPP_GPIO },		/* USB DEV VBUS */
+	{ 10, MPP_PMU },		/* DVS SDI control */
+
+	{ 11, MPP_SATA_ACT },           /* SATA active */
+	{ 12, MPP_SDIO1 },           	/* SDIO1 */
+	{ 13, MPP_SDIO1 },           	/* SDIO1 */
+
+        { 14, MPP_GPIO },               /* 7segDebug Led */
+        { 15, MPP_GPIO },               /* 7segDebug Led */
+	{ 16, MPP_SDIO0 },		/* SDIO0 */
+#ifdef CONFIG_DOVE_DB_USE_GPIO_I2C
+	{ 17, MPP_GPIO },
+	{ 19, MPP_GPIO },
+#else
+	{ 17, MPP_TWSI },
+	{ 19, MPP_TWSI },
+#endif
+	{ 18, MPP_GPIO },
+	{ 20, MPP_SPI1 },
+	{ 21, MPP_SPI1 },
+	{ 22, MPP_SPI1 },
+	{ 23, MPP_SPI1 },
+
+	{ 24, MPP_CAM }, /* will configure MPPs 24-39*/
+
+	{ 40, MPP_SDIO0 }, /* will configure MPPs 40-45 */
+
+	{ 46, MPP_SDIO1 }, /* SD1 Group */
+	{ 47, MPP_SDIO1 }, /* SD1 Group */
+	{ 48, MPP_SDIO1 }, /* SD1 Group */
+	{ 49, MPP_SDIO1 }, /* SD1 Group */
+	{ 50, MPP_SDIO1 }, /* SD1 Group */
+	{ 51, MPP_SDIO1 }, /* SD1 Group */
+
+        { 52, MPP_AUDIO1 }, /* AU1 Group */
+        { 53, MPP_AUDIO1 }, /* AU1 Group */
+        { 54, MPP_AUDIO1 }, /* AU1 Group */
+        { 55, MPP_AUDIO1 }, /* AU1 Group */
+        { 56, MPP_AUDIO1 }, /* AU1 Group */
+        { 57, MPP_AUDIO1 }, /* AU1 Group */
+
+	{ 58, MPP_SPI0 }, /* will configure MPPs 58-61 */
+
+        { 62, MPP_GPIO }, /* 7segDebug Led */
+        { 63, MPP_GPIO }, /* Touch screen irq */
+        { -1 },
+};
+
+static struct dove_mpp_mode dove_db_tact_int_mpp_modes[] __initdata = {
+	{ 57, MPP_GPIO_AUDIO1 }, /* use this mpp for the tact irq line */
+	{ -1 },
+};
+
+static void dove_db_power_off(void)
+{
+	if (gpio_request(DOVE_DB_POWER_OFF_GPIO, "DOVE_DB_POWER_OFF") != 0) {
+		pr_err("Dove: failed to setup power off GPIO\n");
+		return;
+	}
+
+	if (gpio_direction_output(DOVE_DB_POWER_OFF_GPIO, 0) != 0) {
+ 		printk(KERN_ERR "%s failed to set power off output pin %d\n",
+		       __func__, DOVE_DB_POWER_OFF_GPIO);
+		return;
+	}
+}
+
+#ifdef CONFIG_PM
+/*****************************************************************************
+ * POWER MANAGEMENT
+ ****************************************************************************/
+extern int global_dvs_enable;
+static int __init dove_db_pm_init(void)
+{
+	MV_PMU_INFO pmuInitInfo;
+	u32 dev, rev;
+
+	if (!machine_is_dove_db() && !machine_is_dove_db_b())
+		return 0;
+
+	global_dvs_enable = dvs_enable;
+
+	dove_pcie_id(&dev, &rev);
+
+	pmuInitInfo.batFltMngDis = MV_FALSE;				/* Keep battery fault enabled */
+	pmuInitInfo.exitOnBatFltDis = MV_FALSE;				/* Keep exit from STANDBY on battery fail enabled */
+	if (machine_is_dove_db() && rev < DOVE_REV_A0) {
+
+		pmuInitInfo.sigSelctor[0] = PMU_SIGNAL_NC;
+		pmuInitInfo.sigSelctor[1] = PMU_SIGNAL_NC;
+		pmuInitInfo.sigSelctor[2] = PMU_SIGNAL_SLP_PWRDWN;		/* STANDBY => 0: I/O off, 1: I/O on */
+		pmuInitInfo.sigSelctor[3] = PMU_SIGNAL_EXT0_WKUP;		/* power on push button */	
+		if (rev >= DOVE_REV_X0) { /* For X0 and higher Power Good indication is not needed */
+			if (standby_fix)
+				pmuInitInfo.sigSelctor[4] = PMU_SIGNAL_CKE_OVRID;	/* CKE controlled by Dove */
+			else
+				pmuInitInfo.sigSelctor[4] = PMU_SIGNAL_NC;
+		}
+		else
+			pmuInitInfo.sigSelctor[4] = PMU_SIGNAL_CPU_PWRGOOD;	/* CORE power good used as Standby PG */
+		
+		pmuInitInfo.sigSelctor[5] = PMU_SIGNAL_CPU_PWRDWN;		/* DEEP-IdLE => 0: CPU off, 1: CPU on */
+		
+		if ((rev >= DOVE_REV_X0) && (standby_fix)) /* For boards with X0 we use MPP6 as MRESET */
+			pmuInitInfo.sigSelctor[6] = PMU_SIGNAL_MRESET_OVRID;		/* M_RESET is pulled up - always HI */
+		else
+			pmuInitInfo.sigSelctor[6] = PMU_SIGNAL_NC;
+	} else {
+		
+		pmuInitInfo.sigSelctor[0] = PMU_SIGNAL_CPU_PWRDWN; /* DEEP-IdLE => 0: CPU off, 1: CPU on */
+		pmuInitInfo.sigSelctor[1] = PMU_SIGNAL_1;
+		
+		pmuInitInfo.sigSelctor[2] = PMU_SIGNAL_NC;
+		
+		pmuInitInfo.sigSelctor[3] = PMU_SIGNAL_EXT0_WKUP;		/* power on push button */	
+		pmuInitInfo.sigSelctor[4] = PMU_SIGNAL_CKE_OVRID;	/* CKE controlled by Dove */
+		pmuInitInfo.sigSelctor[5] = PMU_SIGNAL_SLP_PWRDWN;		/* STANDBY => 0: I/O off, 1: I/O on */
+		
+		/* For boards with X0 we use MPP6 as MRESET */
+		pmuInitInfo.sigSelctor[6] = PMU_SIGNAL_MRESET_OVRID;
+	}
+	pmuInitInfo.sigSelctor[7] = PMU_SIGNAL_1;			/* Standby Led - inverted */
+	pmuInitInfo.sigSelctor[8] = PMU_SIGNAL_NC;
+	pmuInitInfo.sigSelctor[9] = PMU_SIGNAL_NC;			/* CPU power good  - not used */
+	pmuInitInfo.sigSelctor[10] = PMU_SIGNAL_SDI;			/* Voltage regulator control */
+	pmuInitInfo.sigSelctor[11] = PMU_SIGNAL_NC;
+	pmuInitInfo.sigSelctor[12] = PMU_SIGNAL_NC;
+	pmuInitInfo.sigSelctor[13] = PMU_SIGNAL_NC;
+	pmuInitInfo.sigSelctor[14] = PMU_SIGNAL_NC;
+	pmuInitInfo.sigSelctor[15] = PMU_SIGNAL_NC;
+	pmuInitInfo.dvsDelay = 0x4200;				/* ~100us in 166MHz cc - delay for DVS change */
+	if (machine_is_dove_db_b() || rev >= DOVE_REV_A0)
+		pmuInitInfo.ddrTermGpioNum = 2;			/* GPIO 2 used to disable terminations */
+	else
+		pmuInitInfo.ddrTermGpioNum = 16;			/* GPIO 16 used to disable terminations */
+
+	if (rev >= DOVE_REV_X0) /* For X0 and higher wait at least 150ms + spare */
+		pmuInitInfo.standbyPwrDelay = 0x2000;		/* 250ms delay to wait for complete powerup */
+	else
+		pmuInitInfo.standbyPwrDelay = 0x140;		/* 10ms delay after getting the power good indication */
+
+	/* Initialize the PMU HAL */
+	if (mvPmuInit(&pmuInitInfo) != MV_OK)
+	{
+		printk(KERN_ERR "ERROR: Failed to initialise the PMU!\n");
+		return 0;
+	}
+
+	/* Configure wakeup events */
+	mvPmuWakeupEventSet(PMU_STBY_WKUP_CTRL_EXT0_FALL | PMU_STBY_WKUP_CTRL_RTC_MASK);
+
+	/* Register the PM operation in the Linux stack */
+	dove_pm_register();
+
+	return 0;
+}
+
+__initcall(dove_db_pm_init);
+#endif
+
+/*****************************************************************************
+ * Board Init
+ ****************************************************************************/
+//extern struct mbus_dram_target_info dove_mbus_dram_info;
+//extern int __init pxa_init_dma_wins(struct mbus_dram_target_info * dram);
+static void __init dove_db_init(void)
+{
+	u32 dev, rev;
+
+	/*
+	 * Basic Dove setup. Needs to be called early.
+	 */
+	dove_init();
+
+	dove_pcie_id(&dev, &rev);
+
+	if (machine_is_dove_db_b() || rev >= DOVE_REV_A0) {
+		dove_mpp_conf(dove_db_b_mpp_modes);
+		dove_db_b_giga_phy_gpio_setup();
+	} else
+		dove_mpp_conf(dove_db_mpp_modes);
+	
+	if ((front_panel) && (left_tact || right_tact)) {
+		dove_mpp_conf(dove_db_tact_int_mpp_modes);
+		i2s1_data.spdif_play = 0;
+	}
+
+	pm_power_off = dove_db_power_off;
+
+        /* the (SW1) button is for use as a "wakeup" button */
+	dove_wakeup_button_setup(DOVE_DB_WAKEUP_GPIO);
+
+	/* sdio card interrupt workaround using GPIOs */
+	dove_sd_card_int_wa_setup(0);
+	dove_sd_card_int_wa_setup(1);
+
+	if(front_panel) {
+		/* JPR6 shoud be on 1-2 for touchscreen irq line */
+
+		if (dove_db_ts_gpio_setup() != 0)
+			return;
+	}
+
+#if defined(CONFIG_SND_DOVE_AC97)
+#if !defined(CONFIG_CPU_ENDIAN_BE8)
+	/* FIXME:
+	 * we need fix __AC97(x) definition in
+	 * arch/arm/mach-dove/include/mach/pxa-regs.h
+	 * to resolve endian access.
+	 */
+	/* Initialize AC'97 related regs.	*/
+	dove_ac97_setup();
+#endif
+#endif
+
+	dove_rtc_init();
+
+	pxa_init_dma_wins(&dove_mbus_dram_info);
+	pxa_init_dma(16);
+#ifdef CONFIG_MV_HAL_DRIVERS_SUPPORT
+	if(useHalDrivers || useNandHal) {
+		if (mvPdmaHalInit(MV_PDMA_MAX_CHANNELS_NUM) != MV_OK) {
+			printk(KERN_ERR "mvPdmaHalInit() failed.\n");
+			BUG();
+		}
+		/* reserve channels for NAND Data and command PDMA */
+		pxa_reserve_dma_channel(MV_PDMA_NAND_DATA);
+		pxa_reserve_dma_channel(MV_PDMA_NAND_COMMAND);
+	}
+#endif
+	dove_xor0_init();
+	dove_xor1_init();
+#ifdef CONFIG_MV_ETHERNET
+	if(use_hal_giga || useHalDrivers)
+		dove_mv_eth_init();
+	else
+#endif
+	if (rev >= DOVE_REV_A0)
+		dove_ge00_init(&dove_db_b_ge00_data);
+	else
+		dove_ge00_init(&dove_db_ge00_data);
+	dove_ehci0_init();
+	dove_ehci1_init();
+
+	/* ehci init functions access the usb port, only now it's safe to disable
+	 * all clocks
+	 */
+	ds_clks_disable_all(0, 0);
+	dove_sata_init(&dove_db_sata_data);
+	dove_spi0_init(0);
+	dove_spi1_init(1);
+	dove_uart0_init();
+	dove_uart1_init();
+	dove_i2c_init();
+	dove_i2c_exp_init(0);
+#ifdef CONFIG_DOVE_DB_USE_GPIO_I2C
+	dove_add_gpio_i2c();
+#else
+	dove_i2c_exp_init(1);
+#endif
+	dove_sdhci_cam_mbus_init();
+	dove_sdio0_init();
+	dove_sdio1_init();
+	dove_db_nfc_init();
+	dove_db_clcd_init();
+	dove_vmeta_init();
+	dove_gpu_init();
+	dove_ssp_init(&dove_ssp_platform_data);
+	dove_cesa_init();
+	dove_hwmon_init();
+
+#if !defined(CONFIG_SND_DOVE_AC97)
+	dove_i2s_init(0, &i2s0_data);
+#endif
+	dove_i2s_init(1, &i2s1_data);
+
+	i2c_register_board_info(0, &i2c_a2d, 1);
+	i2c_register_board_info(0, dove_db_gpio_ext_info, 1);
+	if (machine_is_dove_db_b() || rev >= DOVE_REV_A0)
+		i2c_register_board_info(0, &idt, 1);
+	if (lcd2dvi)
+		i2c_register_board_info(0, adi9889, ARRAY_SIZE(adi9889));
+	spi_register_board_info(dove_db_spi_flash_info,
+				ARRAY_SIZE(dove_db_spi_flash_info));
+	if (front_panel)
+		spi_register_board_info(dove_db_spi_ts_dev, 
+					ARRAY_SIZE(dove_db_spi_ts_dev));
+}
+
+MACHINE_START(DOVE_DB, "Marvell DB-MV88F6781-BP Development Board")
+	.phys_io	= DOVE_SB_REGS_PHYS_BASE,
+	.io_pg_offst	= ((DOVE_SB_REGS_VIRT_BASE) >> 18) & 0xfffc,
+	.boot_params	= 0x00000100,
+	.init_machine	= dove_db_init,
+	.map_io		= dove_map_io,
+	.init_irq	= dove_init_irq,
+	.timer		= &dove_timer,
+/* reserve memory for VMETA and GPU */
+	.fixup		= dove_tag_fixup_mem32,
+MACHINE_END
+
+MACHINE_START(DOVE_DB_B, "Marvell DB-MV88F6781-BP-B Development Board")
+	.phys_io	= DOVE_SB_REGS_PHYS_BASE,
+	.io_pg_offst	= ((DOVE_SB_REGS_VIRT_BASE) >> 18) & 0xfffc,
+	.boot_params	= 0x00000100,
+	.init_machine	= dove_db_init,
+	.map_io		= dove_map_io,
+	.init_irq	= dove_init_irq,
+	.timer		= &dove_timer,
+/* reserve memory for VMETA and GPU */
+	.fixup		= dove_tag_fixup_mem32,
+MACHINE_END
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mpp.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mpp.h
@@ -0,0 +1,61 @@
+#ifndef __ARCH_DOVE_MPP_H
+#define __ARCH_DOVE_MPP_H
+
+enum dove_mpp_type {
+	/*
+	 * This MPP is unused.
+	 */
+	MPP_UNUSED,
+
+	/*
+	 * This MPP pin is used as a generic GPIO pin.
+	 */
+	MPP_GPIO,
+
+        /*
+         * This MPP is used as a SATA activity LED.
+         */
+        MPP_SATA_ACT,
+        MPP_SATA_PRESENCE,
+        /*
+         * This MPP is used as a functional pad.
+         */
+//        MPP_FUNCTIONAL,
+
+
+	MPP_SPI0,
+	MPP_SPI1,
+	MPP_LCD0_SPI,
+	MPP_SDIO0,
+	MPP_SDIO1,
+	MPP_CAM,
+	MPP_AUDIO1,
+	MPP_GPIO_AUDIO1, /* this type is used only for MPP high[25], it means 
+			  * that this MPP is GPIO, but the AU1 group is selected
+			  */
+	MPP_SSP,
+	MPP_TWSI,
+	MPP_UART1,
+	MPP_UART2,
+	MPP_UART3,
+	MPP_NB_CLOCK,
+	MPP_LCD,
+	MPP_PMU,
+	MPP_MII,
+	MPP_PCIE,
+	MPP_NFC8_15,
+	/*
+	 * This indicates end of table .
+	 */
+	MPP_END,
+
+};
+
+struct dove_mpp_mode {
+	int			mpp;
+	enum dove_mpp_type	type;
+};
+
+void dove_mpp_conf(struct dove_mpp_mode *mode);
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/dove-rd-avng-setup.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/dove-rd-avng-setup.c
@@ -0,0 +1,1031 @@
+/* * arch/arm/mach-dove/dove-rd-avng-setup.c
+ *
+ * Marvell Dove MV88F6781-RD Avengers Mobile Internet Device Board Setup
+ *
+ * Author: Tzachi Perelstein <tzachi@marvell.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/irq.h>
+#include <linux/mtd/physmap.h>
+#include <linux/mtd/nand.h>
+#include <linux/timer.h>
+#include <linux/ata_platform.h>
+#include <linux/mv643xx_eth.h>
+#include <linux/i2c.h>
+#include <linux/pci.h>
+#include <linux/gpio_mouse.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/orion_spi.h>
+#include <linux/spi/flash.h>
+#include <video/dovefb.h>
+#include <video/dovefbreg.h>
+#include <mach/dove_bl.h>
+#include <plat/i2s-orion.h>
+#include <asm/mach-types.h>
+#include <asm/gpio.h>
+#include <asm/mach/arch.h>
+#include <mach/dove.h>
+#include <asm/hardware/pxa-dma.h>
+#include <plat/orion_nfc.h>
+#include <mach/pm.h>
+#include <plat/cafe-orion.h>
+#include "common.h"
+#include "clock.h"
+#include "idt5v49ee503.h"
+#include "mpp.h"
+#include "mach/pm.h"
+#include "pmu/mvPmu.h"
+#include "pmu/mvPmuRegs.h"
+#include "pdma/mvPdma.h"
+#include <ctrlEnv/mvCtrlEnvRegs.h>
+#include <audio/mvAudioRegs.h>
+#include "gpp/mvGppRegs.h"
+
+#define DOVE_AVNG_POWER_OFF_GPIO	(8)
+
+extern int __init pxa_init_dma_wins(struct mbus_dram_target_info *dram);
+
+static unsigned int use_hal_giga = 0;
+#ifdef CONFIG_MV643XX_ETH
+module_param(use_hal_giga, uint, 0);
+MODULE_PARM_DESC(use_hal_giga, "Use the HAL giga driver");
+#endif
+
+static unsigned int standby_fix = 1;
+module_param(standby_fix, uint, 0);
+MODULE_PARM_DESC(standby_fix, "if 1 then CKE and MRESET are connected to MPP4 and MPP6");
+
+static int dvs_enable = 0;
+module_param(dvs_enable, int, 1);
+MODULE_PARM_DESC(dvs_enable, "if 1 then enable DVS");
+
+extern unsigned int useHalDrivers;
+extern char *useNandHal;
+
+
+/*****************************************************************************
+ * LCD
+ ****************************************************************************/
+/*
+ * LCD HW output Red[0] to LDD[0] when set bit [19:16] of reg 0x190
+ * to 0x0. Which means HW outputs BGR format default. All platforms
+ * uses this controller should enable .panel_rbswap. Unless layout
+ * design connects Blue[0] to LDD[0] instead.
+ */
+static struct dovefb_mach_info dove_rd_avng_lcd0_dmi = {
+	.id_gfx			= "GFX Layer 0",
+	.id_ovly		= "Video Layer 0",
+	.clk_src		= MRVL_EXT_CLK1,
+	.clk_name		= "IDT_CLK1",
+//	.num_modes		= ARRAY_SIZE(video_modes),
+//	.modes			= video_modes,
+	.pix_fmt		= PIX_FMT_RGB888PACK,
+	.io_pin_allocation	= IOPAD_DUMB24,
+	.panel_rgb_type		= DUMB24_RGB888_0,
+	.panel_rgb_reverse_lanes= 0,
+	.gpio_output_data	= 0,
+	.gpio_output_mask	= 0,
+#ifndef CONFIG_FB_DOVE_CLCD0_I2C_DEFAULT_SETTING
+	.ddc_i2c_adapter	= CONFIG_FB_DOVE_CLCD0_I2C_CHANNEL,
+	.ddc_i2c_address	= CONFIG_FB_DOVE_CLCD0_I2C_ADDRESS,
+#else
+	.ddc_i2c_adapter	= 1,
+	.ddc_i2c_address	= 0x3f,
+#endif
+	.invert_composite_blank	= 0,
+	.invert_pix_val_ena	= 0,
+	.invert_pixclock	= 0,
+	.invert_vsync		= 0,
+	.invert_hsync		= 0,
+	.panel_rbswap		= 1,
+	.active			= 1,
+};
+
+static struct dovefb_mach_info dove_rd_avng_lcd0_vid_dmi = {
+	.id_ovly		= "Video Layer 0",
+//	.num_modes		= ARRAY_SIZE(video_modes),
+//	.modes			= video_modes,
+	.pix_fmt		= PIX_FMT_RGB888PACK,
+	.io_pin_allocation	= IOPAD_DUMB24,
+	.panel_rgb_type		= DUMB24_RGB888_0,
+	.panel_rgb_reverse_lanes= 0,
+	.gpio_output_data	= 0,
+	.gpio_output_mask	= 0,
+	.ddc_i2c_adapter	= -1,
+	.invert_composite_blank	= 0,
+	.invert_pix_val_ena	= 0,
+	.invert_pixclock	= 0,
+	.invert_vsync		= 0,
+	.invert_hsync		= 0,
+	.panel_rbswap		= 1,
+	.active			= 0,
+	.enable_lcd0		= 0,
+};
+
+static struct dovefb_mach_info dove_rd_avng_lcd1_dmi = {
+	.id_gfx			= "GFX Layer 1",
+	.id_ovly		= "Video Layer 1",
+	.clk_src		= MRVL_PLL_CLK,
+	.clk_name		= "accurate_LCDCLK",
+//	.num_modes		= ARRAY_SIZE(video_modes),
+//	.modes			= video_modes,
+	.pix_fmt		= PIX_FMT_RGB888PACK,
+	.io_pin_allocation	= IOPAD_DUMB24,
+	.panel_rgb_type		= DUMB24_RGB888_0,
+	.panel_rgb_reverse_lanes= 0,
+	.gpio_output_data	= 0,
+	.gpio_output_mask	= 0,
+#ifndef CONFIG_FB_DOVE_CLCD1_I2C_DEFAULT_SETTING
+	.ddc_i2c_adapter	= CONFIG_FB_DOVE_CLCD1_I2C_CHANNEL,
+	.ddc_i2c_address	= CONFIG_FB_DOVE_CLCD1_I2C_ADDRESS,
+#else
+	.ddc_i2c_adapter	= 1,
+	.ddc_i2c_address	= 0x50,
+#endif
+	.invert_composite_blank	= 0,
+	.invert_pix_val_ena	= 0,
+	.invert_pixclock	= 0,
+	.invert_vsync		= 0,
+	.invert_hsync		= 0,
+	.panel_rbswap		= 1,
+	.active			= 1,
+#ifndef CONFIG_FB_DOVE_CLCD
+	.enable_lcd0		= 1,
+#else
+	.enable_lcd0		= 0,
+#endif
+};
+
+static struct dovefb_mach_info dove_rd_avng_lcd1_vid_dmi = {
+	.id_ovly		= "Video Layer 1",
+//	.num_modes		= ARRAY_SIZE(video_modes),
+//	.modes			= video_modes,
+	.pix_fmt		= PIX_FMT_RGB888PACK,
+	.io_pin_allocation	= IOPAD_DUMB24,
+	.panel_rgb_type		= DUMB24_RGB888_0,
+	.panel_rgb_reverse_lanes= 0,
+	.gpio_output_data	= 0,
+	.gpio_output_mask	= 0,
+	.ddc_i2c_adapter	= -1,
+	.invert_composite_blank	= 0,
+	.invert_pix_val_ena	= 0,
+	.invert_pixclock	= 0,
+	.invert_vsync		= 0,
+	.invert_hsync		= 0,
+	.panel_rbswap		= 1,
+	.active			= 0,
+};
+
+
+/*****************************************************************************
+ * BACKLIGHT
+ ****************************************************************************/
+static struct dovebl_platform_data dove_rd_avng_backlight_data = {
+	.default_intensity = 0xa,
+	.gpio_pm_control = 1,
+
+	.lcd_start = DOVE_SB_REGS_VIRT_BASE,	/* lcd power control reg base. */
+	.lcd_end = DOVE_SB_REGS_VIRT_BASE+GPP_DATA_OUT_REG(0),	/* end of reg map. */
+	.lcd_offset = GPP_DATA_OUT_REG(0),	/* register offset */
+	.lcd_mapped = 1,		/* va = 0, pa = 1 */
+	.lcd_mask = 0x800,		/* mask, bit[11] */
+	.lcd_on = 0x800,		/* value to enable lcd power */
+	.lcd_off = 0x0,			/* value to disable lcd power */
+
+	.blpwr_start = DOVE_SB_REGS_VIRT_BASE, /* bl pwr ctrl reg base. */
+	.blpwr_end = DOVE_SB_REGS_VIRT_BASE+GPP_DATA_OUT_REG(0),	/* end of reg map. */
+	.blpwr_offset = GPP_DATA_OUT_REG(0),	/* register offset */
+	.blpwr_mapped = 1,		/* pa = 0, va = 1 */
+	.blpwr_mask = 0x2000,		/* mask, bit[13] */
+	.blpwr_on = 0x2000,		/* value to enable bl power */
+	.blpwr_off = 0x0,		/* value to disable bl power */
+
+	.btn_start = DOVE_LCD1_PHYS_BASE, /* brightness control reg base. */
+	.btn_end = DOVE_LCD1_PHYS_BASE+0x1C8,	/* end of reg map. */
+	.btn_offset = LCD_CFG_GRA_PITCH,	/* register offset */
+	.btn_mapped = 0,		/* pa = 0, va = 1 */
+	.btn_mask = 0xF0000000,		/* mask */
+	.btn_level = 15,		/* how many level can be configured. */
+	.btn_min = 0x1,			/* min value */
+	.btn_max = 0xF,			/* max value */
+	.btn_inc = 0x1,			/* increment */
+};
+
+void __init dove_rd_avng_clcd_init(void) {
+#ifdef CONFIG_FB_DOVE
+	clcd_platform_init(&dove_rd_avng_lcd0_dmi, &dove_rd_avng_lcd0_vid_dmi,
+			   &dove_rd_avng_lcd1_dmi, &dove_rd_avng_lcd1_vid_dmi,
+			   &dove_rd_avng_backlight_data);
+#endif /* CONFIG_FB_DOVE */
+}
+
+/*****************************************************************************
+ * I2C devices:
+ * 	ALC5630 codec, address 0x
+ * 	Battery charger, address 0x??
+ * 	G-Sensor, address 0x??
+ * 	MCU PIC-16F887, address 0x??
+ ****************************************************************************/
+static struct i2c_board_info __initdata dove_rd_avng_i2c_bus0_devs[] = {
+	{
+		I2C_BOARD_INFO("rt5630", 0x1f),
+	},
+	{
+		I2C_BOARD_INFO("rt5623", 0x1a),
+	},
+	{
+		I2C_BOARD_INFO("ec_key_i2c", 0x2c),
+		.irq = IRQ_DOVE_GPIO_START,
+	},
+	{
+		I2C_BOARD_INFO("bma020", 0x38),
+		.irq = IRQ_DOVE_GPIO_16_23,
+	},
+	{
+		I2C_BOARD_INFO("anx7150_i2c", 0x3B),	/* 0x3B*2->0x76..For ANX7150 */
+	},
+	{
+		I2C_BOARD_INFO("kg2_i2c", 0x10),	/* 0x10 for KG2 */
+	},
+#ifdef CONFIG_CH7025_COMPOSITE
+	{
+		I2C_BOARD_INFO("ch7025_i2c",0x76),
+	},
+#endif
+#if 0
+	{
+		I2C_BOARD_INFO("pic-16f887", 0x??),
+	},
+#endif
+#ifdef CONFIG_BATTERY_MCU
+	{
+		I2C_BOARD_INFO("power_mcu", 0x2C),
+	},
+#endif
+};
+
+static struct i2c_board_info __initdata dove_rd_avng_i2c_bus1_devs[] = {
+#ifdef CONFIG_ADI9889
+	{
+		I2C_BOARD_INFO("adi9889_i2c", 0x39),
+	},
+	{
+		I2C_BOARD_INFO("adi9889_edid_i2c", 0x3F),
+	},
+#endif
+};
+
+/*****************************************************************************
+ * IDT clock
+ ****************************************************************************/
+static struct idt_data dove_uc2_idt_data = {
+	/* clock 0 connected to pin LCD_EXT_REF_CLK[0]*/
+	.clock0_enable = 1,
+	.clock0_out_id = IDT_OUT_ID_2,
+	.clock0_pll_id = IDT_PLL_2,
+	/* clock 1 connected to pin LCD_EXT_REF_CLK[1]*/
+	.clock1_enable = 1,
+	.clock1_out_id = IDT_OUT_ID_1,
+	.clock1_pll_id = IDT_PLL_1,
+};
+
+static struct i2c_board_info __initdata idt = {
+	I2C_BOARD_INFO("idt5v49ee503", 0x6A),
+	.platform_data = &dove_uc2_idt_data,
+};
+
+/*****************************************************************************
+ * PCI
+ ****************************************************************************/
+static int __init dove_rd_avng_pci_init(void)
+{
+	if (machine_is_dove_rd_avng())
+			dove_pcie_init(1, 1);
+
+	return 0;
+}
+
+subsys_initcall(dove_rd_avng_pci_init);
+
+/*****************************************************************************
+ * Camera
+ ****************************************************************************/
+static struct cafe_cam_platform_data dove_cafe_cam_data = {
+	.power_down 	= 2, //CTL0 connected to the sensor power down
+	.reset		= 1, //CTL1 connected to the sensor reset
+	.numbered_i2c_bus = 1,
+	.i2c_bus_id	= 3,
+};
+
+static int __init dove_rd_avng_cam_init(void)
+{
+	if (machine_is_dove_rd_avng())
+		dove_cam_init(&dove_cafe_cam_data);
+
+	return 0;
+}
+
+late_initcall(dove_rd_avng_cam_init);
+
+/*****************************************************************************
+ * Audio I2S
+ ****************************************************************************/
+static struct orion_i2s_platform_data i2s1_data = {
+	.i2s_play	= 1,
+	.i2s_rec	= 1,
+	.spdif_play	= 1,
+};
+
+/*****************************************************************************
+ * Ethernet
+ ****************************************************************************/
+static struct mv643xx_eth_platform_data dove_rd_avng_ge00_data = {
+	.phy_addr	= MV643XX_ETH_PHY_ADDR_DEFAULT,
+};
+
+/*****************************************************************************
+ * SATA
+ ****************************************************************************/
+static struct mv_sata_platform_data dove_rd_avng_sata_data = {
+        .n_ports        = 1,
+};
+
+/*****************************************************************************
+ * SPI Devices:
+ *     SPI0: 4M Flash MX25L3205D
+ ****************************************************************************/
+static const struct flash_platform_data dove_rd_avng_spi_flash_data = {
+	.type           = "mx25l3205d",
+};
+
+static struct spi_board_info __initdata dove_rd_avng_spi_flash_info[] = {
+	{
+		.modalias       = "m25p80",
+		.platform_data  = &dove_rd_avng_spi_flash_data,
+		.irq            = -1,
+		.max_speed_hz   = 20000000,
+		.bus_num        = 0,
+		.chip_select    = 0,
+	},
+};
+
+/*****************************************************************************
+ * NAND
+ ****************************************************************************/
+static struct mtd_partition partition_dove[] = {
+	{ .name		= "Root",
+	  .offset	= 0,
+	  .size		= MTDPART_SIZ_FULL },
+};
+static u64 nfc_dmamask = DMA_BIT_MASK(32);
+static struct nfc_platform_data dove_rd_avng_nfc_hal_data = {
+	.nfc_width      = 8,			/* Assume non ganaged mode by default */
+	.num_devs       = 1,			/* Assume non ganaged mode by defautl */
+	.num_cs         = 1,			/* K9LBG08U0D */
+	.use_dma	= 1,
+	.ecc_type	= MV_NFC_ECC_BCH_1K,	/* 8bit ECC required by K9LBG08U0D */
+	.parts = partition_dove,
+	.nr_parts = ARRAY_SIZE(partition_dove)
+};
+
+static struct nfc_platform_data dove_rd_avng_nfc_data = {
+	.nfc_width      = 8,
+	.num_devs       = 1,
+	.num_cs         = 1,
+	.use_dma        = 1,
+	.ecc_type	= MV_NFC_ECC_HAMMING,
+	.parts = partition_dove,
+	.nr_parts = ARRAY_SIZE(partition_dove)
+};
+
+static struct resource dove_nfc_resources[]  = {
+	[0] = {
+		.start	= (DOVE_NFC_PHYS_BASE),
+		.end	= (DOVE_NFC_PHYS_BASE + 0xFF),
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= IRQ_NAND,
+		.end	= IRQ_NAND,
+		.flags	= IORESOURCE_IRQ,
+	},
+	[2] = {
+		/* DATA DMA */
+		.start	= 97,
+		.end	= 97,
+		.flags	= IORESOURCE_DMA,
+	},
+	[3] = {
+		/* COMMAND DMA */
+		.start	= 99,
+		.end	= 99,
+		.flags	= IORESOURCE_DMA,
+	},
+};
+
+static struct platform_device dove_nfc = {
+	.name		= "orion-nfc",
+	.id		= -1,
+	.dev		= {
+		.dma_mask		= &nfc_dmamask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+		.platform_data		= &dove_rd_avng_nfc_data,
+	},
+	.resource	= dove_nfc_resources,
+	.num_resources	= ARRAY_SIZE(dove_nfc_resources),
+};
+
+static void __init dove_rd_avng_nfc_init(void)
+{
+	/* Check if HAL driver is intended */
+	if(useHalDrivers || useNandHal) {
+		dove_nfc.name = "orion-nfc-hal";
+
+		/* Check for ganaged mode */
+		if (strncmp(useNandHal, "ganged", 6) == 0) {
+			dove_rd_avng_nfc_hal_data.nfc_width = 16;
+			dove_rd_avng_nfc_hal_data.num_devs = 2;
+			useNandHal += 7;
+		}
+
+		/* Check for ECC type directive */
+		if (strcmp(useNandHal, "4bitecc") == 0) {
+			dove_rd_avng_nfc_hal_data.ecc_type = MV_NFC_ECC_BCH_2K;
+		} else if (strcmp(useNandHal, "8bitecc") == 0) {
+			dove_rd_avng_nfc_hal_data.ecc_type = MV_NFC_ECC_BCH_1K;
+		} else if (strcmp(useNandHal, "12bitecc") == 0) {
+			dove_rd_avng_nfc_hal_data.ecc_type = MV_NFC_ECC_BCH_704B;
+		} else if (strcmp(useNandHal, "16bitecc") == 0) {
+			dove_rd_avng_nfc_hal_data.ecc_type = MV_NFC_ECC_BCH_512B;
+		}
+
+		dove_rd_avng_nfc_hal_data.tclk = dove_tclk_get();
+		dove_nfc.dev.platform_data = &dove_rd_avng_nfc_hal_data;
+
+	} else {  /* NON HAL driver is used */
+		dove_rd_avng_nfc_data.tclk = dove_tclk_get();
+	}
+
+	platform_device_register(&dove_nfc);
+}
+
+/*****************************************************************************
+ * MPP
+ ****************************************************************************/
+static struct dove_mpp_mode dove_rd_avng_y0_mpp_modes[] __initdata = {
+	{ 0, MPP_GPIO },	/* MCU_INTRn */
+	{ 1, MPP_GPIO },	/* I2S_CODEC_IRQ */
+	{ 2, MPP_PMU },		/* Standby power control */
+	{ 3, MPP_PMU },		/* Power button - standby wakeup */
+	{ 4, MPP_PMU },		/* Core power good indication */
+	{ 5, MPP_PMU },		/* DeepIdle power control */
+	{ 6, MPP_GPIO },	/* PMU - DDR termination control */
+	{ 7, MPP_PMU  },	/* Standby led */
+
+	{ 8, MPP_GPIO },	/* OFF_CTRL */
+
+	{ 9, MPP_GPIO },	/* HUB_RESETn */
+	{ 10, MPP_PMU },	/* DVS SDI control */
+
+	{ 11, MPP_GPIO },	/* LCM_DCM */
+	{ 12, MPP_SDIO1 },	/* SD1_CDn */
+	{ 13, MPP_GPIO },	/* WLAN_WAKEUP_HOST */
+	{ 14, MPP_GPIO },	/* HOST_WAKEUP_WLAN */
+	{ 15, MPP_GPIO },	/* BT_WAKEUP_HOST */
+	{ 16, MPP_GPIO },	/* HOST_WAKEUP_BT */
+	{ 17, MPP_GPIO },	/* LCM_BL_CTRL */
+
+	{ 18, MPP_LCD },	/* LCD0_PWM */
+	{ 19, MPP_GPIO },	/* AU_IRQOUT */
+	{ 20, MPP_GPIO },	/* GP_WLAN_RSTn */
+	{ 21, MPP_UART1 },	/* UA1_RTSn */
+	{ 22, MPP_UART1 },	/* UA1_CTSn */
+	{ 23, MPP_GPIO },	/* G_INT */
+
+	{ 24, MPP_CAM },	/* will configure MPPs 24-39*/
+
+	{ 40, MPP_SDIO0 },	/* will configure MPPs 40-45 */
+
+	{ 46, MPP_SDIO1 },	/* SD1 Group */
+	{ 47, MPP_SDIO1 },	/* SD1 Group */
+	{ 48, MPP_SDIO1 },	/* SD1 Group */
+	{ 49, MPP_SDIO1 },	/* SD1 Group */
+	{ 50, MPP_SDIO1 },	/* SD1 Group */
+	{ 51, MPP_SDIO1 },	/* SD1 Group */
+
+	{ 52, MPP_AUDIO1 },	/* AU1 Group */
+	{ 53, MPP_AUDIO1 },	/* AU1 Group */
+	{ 54, MPP_AUDIO1 },	/* AU1 Group */
+	{ 55, MPP_AUDIO1 },	/* AU1 Group */
+	{ 56, MPP_AUDIO1 },	/* AU1 Group */
+	{ 57, MPP_AUDIO1 },	/* AU1 Group */
+
+	{ 58, MPP_SPI0 },	/* will configure MPPs 58-61 */
+	{ 62, MPP_UART1 },	/* UART1 active */
+	{ -1 },
+};
+
+static struct dove_mpp_mode dove_rd_avng_x0_mpp_modes[] __initdata = {
+	{ 0, MPP_GPIO },	/* MCU_INTRn */
+	{ 1, MPP_GPIO },	/* I2S_CODEC_IRQ */
+	{ 2, MPP_PMU },		/* Standby power control */
+	{ 3, MPP_PMU },		/* Power button - standby wakeup */
+	{ 4, MPP_PMU },		/* M_CKE_MASK */
+	{ 5, MPP_PMU },		/* DeepIdle power control */
+	{ 6, MPP_PMU },		/* M_RST_MASK */
+	{ 7, MPP_PMU  },	/* Standby led */
+
+	{ 8, MPP_GPIO },	/* OFF_CTRL */
+
+	{ 9, MPP_GPIO },	/* HUB_RESETn */
+	{ 10, MPP_PMU },	/* DVS SDI control */
+
+	{ 11, MPP_GPIO },	/* LCM_DCM */
+	{ 12, MPP_SDIO1 },	/* SD1_CDn */
+	{ 13, MPP_GPIO },	/* LCM_BL_CTRL */
+	{ 14, MPP_GPIO },	/* USB_DEV_DET */
+	{ 15, MPP_GPIO },	/* AU_IRQOUT */
+	{ 16, MPP_GPIO },	/* PMU - DDR termination control */
+	{ 17, MPP_TWSI },	/* TW_SDA Option 2 */
+
+	{ 18, MPP_LCD },	/* LCD0_PWM */
+	{ 19, MPP_TWSI },	/* TW_SCK Option 2 */
+	{ 20, MPP_GPIO },	/* GP_WLAN_RSTn */
+	{ 21, MPP_UART1 },	/* UA1_RTSn */
+	{ 22, MPP_UART1 },	/* UA1_CTSn */
+	{ 23, MPP_GPIO },	/* G_INT */
+
+	{ 24, MPP_CAM },	/* will configure MPPs 24-39*/
+
+	{ 40, MPP_SDIO0 },	/* will configure MPPs 40-45 */
+
+	{ 46, MPP_SDIO1 },	/* SD1 Group */
+	{ 47, MPP_SDIO1 },	/* SD1 Group */
+	{ 48, MPP_SDIO1 },	/* SD1 Group */
+	{ 49, MPP_SDIO1 },	/* SD1 Group */
+	{ 50, MPP_SDIO1 },	/* SD1 Group */
+	{ 51, MPP_SDIO1 },	/* SD1 Group */
+
+	{ 52, MPP_AUDIO1 },	/* AU1 Group */
+	{ 53, MPP_AUDIO1 },	/* AU1 Group */
+	{ 54, MPP_AUDIO1 },	/* AU1 Group */
+	{ 55, MPP_AUDIO1 },	/* AU1 Group */
+	{ 56, MPP_AUDIO1 },	/* AU1 Group */
+	{ 57, MPP_AUDIO1 },	/* AU1 Group */
+
+	{ 58, MPP_SPI0 },	/* will configure MPPs 58-61 */
+	{ 62, MPP_UART1 },	/* UART1 active */
+	{ -1 },
+};
+
+/*****************************************************************************
+ * GPIO
+ ****************************************************************************/
+static void dove_rd_avng_power_off(void)
+{
+	if (gpio_direction_output(DOVE_AVNG_POWER_OFF_GPIO, 0) != 0) {
+ 		printk(KERN_ERR "%s failed to set power off output pin %d\n",
+		       __func__, DOVE_AVNG_POWER_OFF_GPIO);
+	}
+}
+
+static void dove_rd_avng_gpio_init(u32 rev)
+{
+	int pin;
+
+	orion_gpio_set_valid(0, 1);
+	if (gpio_request(0, "MCU_INTRn") != 0)
+		printk(KERN_ERR "Dove: failed to setup GPIO for MCU_INTRn\n");
+	gpio_direction_input(0);	/* MCU interrupt */
+	orion_gpio_set_valid(1, 1);
+	if (gpio_request(1, "I2S_CODEC_IRQ") != 0)
+		printk(KERN_ERR "Dove: failed to setup GPIO for I2S_CODEC_IRQ\n");
+	gpio_direction_input(1);	/* Interrupt from ALC5632 */
+
+	if (rev >= DOVE_REV_X0) {
+		pin = 16;
+	} else {
+		pin = 6;
+	}
+	orion_gpio_set_valid(pin, 1);
+	if (gpio_request(pin, "MPP_DDR_TERM") != 0)
+	printk(KERN_ERR "Dove: failed to setup GPIO for MPP_DDR_TERM\n");
+	gpio_direction_output(pin, 1);	/* Enable DDR 1.8v */
+
+	orion_gpio_set_valid(DOVE_AVNG_POWER_OFF_GPIO, 1);
+	if (gpio_request(DOVE_AVNG_POWER_OFF_GPIO, "OFF_CTRL") != 0)
+		printk(KERN_ERR "Dove: failed to setup GPIO for OFF_CTRL\n");
+	gpio_direction_output(DOVE_AVNG_POWER_OFF_GPIO, 1);	/* Power off */
+	orion_gpio_set_valid(9, 1);
+	if (gpio_request(9, "HUB_RESETn") != 0)
+		printk(KERN_ERR "Dove: failed to setup GPIO for HUB_RESETn\n");
+	gpio_direction_output(9, 1);	/* HUB_RESETn */
+
+	orion_gpio_set_valid(11, 1);
+	if (gpio_request(11, "LCM_DCM") != 0)
+		printk(KERN_ERR "Dove: failed to setup GPIO for LCM_DCM\n");
+	gpio_direction_output(11, 1);	/* Enable LCD power */
+
+	orion_gpio_set_valid(13, 1);
+	if (rev >= DOVE_REV_X0) {
+		if (gpio_request(13, "LCM_BL_CTRL") != 0)
+			printk(KERN_ERR "Dove: failed to setup GPIO for LCM_BL_CTRL\n");
+		gpio_direction_output(13, 1);	/* Enable LCD backlight */
+	} else {
+		if (gpio_request(13, "WLAN_WAKEUP_HOST") != 0)
+			printk(KERN_ERR "Dove: failed to setup GPIO for WLAN_WAKEUP_HOST\n");
+		gpio_direction_input(13);
+	}
+
+	orion_gpio_set_valid(14, 1);
+	if (rev >= DOVE_REV_X0) {
+		if (gpio_request(14, "USB_DEV_DET") != 0)
+			printk(KERN_ERR "Dove: failed to setup GPIO for USB_DEV_DET\n");
+		gpio_direction_input(14);
+	} else {
+		if (gpio_request(14, "HOST_WAKEUP_WLAN") != 0)
+			printk(KERN_ERR "Dove: failed to setup GPIO for HOST_WAKEUP_WLAN\n");
+		gpio_direction_output(14, 0);
+	}
+
+	if (rev < DOVE_REV_X0) {
+		orion_gpio_set_valid(15, 1);
+		if (gpio_request(15, "BT_WAKEUP_HOST") != 0)
+			printk(KERN_ERR "Dove: failed to setup GPIO for BT_WAKEUP_HOSTn");
+		gpio_direction_input(15);
+		orion_gpio_set_valid(16, 1);
+		if (gpio_request(16, "HOST_WAKEUP_BT") != 0)
+			printk(KERN_ERR "Dove: failed to setup GPIO for HOST_WAKEUP_BT\n");
+		gpio_direction_output(16, 0);
+		orion_gpio_set_valid(17, 1);
+		if (gpio_request(17, "LCM_BL_CTRL") != 0)
+			printk(KERN_ERR "Dove: failed to setup GPIO for LCM_BL_CTRL\n");
+		gpio_direction_output(17, 1);	/* Enable LCD back light */
+	}
+
+	orion_gpio_set_valid(20, 1);
+	if (gpio_request(20, "GP_WLAN_RSTn") != 0)
+		printk(KERN_ERR "Dove: failed to setup GPIO for GP_WLAN_RSTn\n");
+	gpio_direction_output(20, 1);
+	orion_gpio_set_valid(23, 1);
+	if (gpio_request(23, "G_INT") != 0)
+		printk(KERN_ERR "Dove: failed to setup GPIO for G_INT\n");
+	gpio_direction_input(23);	/* Interrupt from G-sensor */
+}
+
+#ifdef CONFIG_PM
+extern int global_dvs_enable;
+/*****************************************************************************
+ * POWER MANAGEMENT
+ ****************************************************************************/
+static int __init dove_rd_avng_pm_init(void)
+{
+	MV_PMU_INFO pmuInitInfo;
+	u32 dev, rev;
+
+	if (!machine_is_dove_rd_avng())
+		return 0;
+
+	global_dvs_enable = dvs_enable;
+
+	dove_pcie_id(&dev, &rev);
+
+	pmuInitInfo.batFltMngDis = MV_FALSE;			/* Keep battery fault enabled */
+	pmuInitInfo.exitOnBatFltDis = MV_FALSE;			/* Keep exit from STANDBY on battery fail enabled */
+	pmuInitInfo.sigSelctor[0] = PMU_SIGNAL_NC;
+	pmuInitInfo.sigSelctor[1] = PMU_SIGNAL_NC;
+	pmuInitInfo.sigSelctor[2] = PMU_SIGNAL_SLP_PWRDWN;	/* STANDBY => 0: I/O off, 1: I/O on */
+	pmuInitInfo.sigSelctor[3] = PMU_SIGNAL_EXT0_WKUP;	/* power on push button */
+	if (rev >= DOVE_REV_X0) { /* For X0 and higher Power Good indication is not needed */
+		if (standby_fix)
+			pmuInitInfo.sigSelctor[4] = PMU_SIGNAL_CKE_OVRID;	/* CKE controlled by Dove */
+		else
+			pmuInitInfo.sigSelctor[4] = PMU_SIGNAL_NC;
+	}
+	else
+		pmuInitInfo.sigSelctor[4] = PMU_SIGNAL_CPU_PWRGOOD;	/* CORE power good used as Standby PG */
+
+	pmuInitInfo.sigSelctor[5] = PMU_SIGNAL_CPU_PWRDWN;	/* DEEP-IdLE => 0: CPU off, 1: CPU on */
+
+	if ((rev >= DOVE_REV_X0) && (standby_fix)) /* For boards with X0 we use MPP6 as MRESET */
+		pmuInitInfo.sigSelctor[6] = PMU_SIGNAL_MRESET_OVRID;		/* M_RESET is pulled up - always HI */
+	else
+		pmuInitInfo.sigSelctor[6] = PMU_SIGNAL_NC;
+	pmuInitInfo.sigSelctor[7] = PMU_SIGNAL_1;		/* Standby Led - inverted */
+	pmuInitInfo.sigSelctor[8] = PMU_SIGNAL_NC;
+	pmuInitInfo.sigSelctor[9] = PMU_SIGNAL_NC;		/* CPU power good  - not used */
+	pmuInitInfo.sigSelctor[10] = PMU_SIGNAL_SDI;		/* Voltage regulator control */
+	pmuInitInfo.sigSelctor[11] = PMU_SIGNAL_NC;
+	pmuInitInfo.sigSelctor[12] = PMU_SIGNAL_NC;
+	pmuInitInfo.sigSelctor[13] = PMU_SIGNAL_NC;
+	pmuInitInfo.sigSelctor[14] = PMU_SIGNAL_NC;
+	pmuInitInfo.sigSelctor[15] = PMU_SIGNAL_NC;
+	pmuInitInfo.dvsDelay = 0x4200;				/* ~100us in 166MHz cc - delay for DVS change */
+	if (rev >= DOVE_REV_X0) { /* For X0 and higher wait at least 150ms + spare */
+		pmuInitInfo.standbyPwrDelay = 0x2000;		/* 250ms delay to wait for complete powerup */
+		pmuInitInfo.ddrTermGpioNum = 16;		/* GPIO 16 used to disable terminations */
+	} else {
+		pmuInitInfo.standbyPwrDelay = 0x140;		/* 10ms delay after getting the power good indication */
+		pmuInitInfo.ddrTermGpioNum = 6;			/* GPIO 6 used to disable terminations */
+	}
+
+	/* Initialize the PMU HAL */
+	if (mvPmuInit(&pmuInitInfo) != MV_OK)
+	{
+		printk(KERN_ERR "ERROR: Failed to initialise the PMU!\n");
+		return 0;
+	}
+
+	/* Configure wakeup events */
+	mvPmuWakeupEventSet(PMU_STBY_WKUP_CTRL_EXT0_FALL | PMU_STBY_WKUP_CTRL_RTC_MASK);
+
+	/* Register the PM operation in the Linux stack */
+	dove_pm_register();
+
+	return 0;
+}
+
+__initcall(dove_rd_avng_pm_init);
+#endif
+
+/*****************************************************************************
+ * AC97 Interface
+ ****************************************************************************/
+
+void __init dove_avng_ac97_init(void)
+{
+	uint32_t reg;
+
+	/* Enable AC97 Control 			*/
+	reg = readl(DOVE_SB_REGS_VIRT_BASE + MPP_GENERAL_CONTROL_REG);
+
+	reg = (reg |0x10000);
+	writel(reg, DOVE_SB_REGS_VIRT_BASE + MPP_GENERAL_CONTROL_REG);
+
+	/* Set DCO clock to 24.576		*/
+	reg = readl(DOVE_SB_REGS_VIRT_BASE + MV_AUDIO_DCO_CTRL_REG(0));
+	reg = (reg & ~0x3) | 0x2;
+	writel(reg, DOVE_SB_REGS_VIRT_BASE + MV_AUDIO_DCO_CTRL_REG(0));
+
+}
+
+/*****************************************************************************
+ * AC97 Touch Panel Control
+ ****************************************************************************/
+
+#define DOVE_AVNG_AC97_CODEC_GPIO_X0	(15)
+#define DOVE_AVNG_AC97_CODEC_GPIO_Y0	(19)
+
+static struct resource dove_ac97_codec_resources[] = {
+
+	[0] = {
+		.start	= 0,
+		.end	= 0,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+int __init dove_avng_ac97_ts_gpio_setup(void)
+{
+	u32 dev, rev;
+	int pin, irq;
+
+	if (!machine_is_dove_rd_avng())
+		return 0;
+
+	dove_pcie_id(&dev, &rev);
+
+	if (rev >= DOVE_REV_X0)
+		pin = DOVE_AVNG_AC97_CODEC_GPIO_X0;
+	else
+		pin = DOVE_AVNG_AC97_CODEC_GPIO_Y0;
+	irq = pin + IRQ_DOVE_GPIO_START;
+
+	dove_ac97_codec_resources[0].start = irq;
+	dove_ac97_codec_resources[0].end = irq;
+
+	orion_gpio_set_valid(pin, 1);
+	if (gpio_request(pin, "DOVE_AVNG_AC97_CODEC_IRQ") != 0)
+		pr_err("Dove: failed to setup AC97 CODEC IRQ GPIO\n");
+	if (gpio_direction_input(pin) != 0) {
+		printk(KERN_ERR "%s failed to set output pin %d\n", __func__,
+		       pin);
+		gpio_free(pin);
+		return -1;
+	}
+	/* IRQ */
+	set_irq_chip(irq, &orion_gpio_irq_chip);
+	set_irq_handler(irq, handle_level_irq);
+	set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH);
+
+	return 0;
+}
+
+static struct platform_device dove_ac97_touch = {
+	.name           = "rt5611_ts",
+	.id             = 0,
+	.num_resources  = 1,
+	.resource       = dove_ac97_codec_resources,
+};
+
+static struct platform_device dove_ac97_snd = {
+	.name           = "rt5611_snd",
+	.id             = 0,
+	.num_resources  = 1,
+	.resource       = dove_ac97_codec_resources,
+};
+
+void __init dove_ac97_dev_init(void)
+{
+	/* TouchScreen */
+	dove_avng_ac97_ts_gpio_setup();
+	platform_device_register(&dove_ac97_touch);
+
+	/* Codec */
+	platform_device_register(&dove_ac97_snd);
+}
+
+#ifdef CONFIG_BATTERY_MCU
+void __init dove_battery_init(void)
+{
+	platform_device_register_simple("battery", 0, NULL, 0);
+}
+#endif
+
+#ifdef CONFIG_ANDROID_PMEM
+#include <linux/dma-mapping.h>
+#include <linux/android_pmem.h>
+
+void android_add_pmem(char *name, size_t size, int no_allocator, int cached)
+{
+        struct platform_device *android_pmem_device;
+        struct android_pmem_platform_data *android_pmem_pdata;
+        struct page *page;
+        unsigned long addr, tmp;
+        static int id;
+        unsigned long paddr = 0;
+
+        android_pmem_device = kzalloc(sizeof(struct platform_device), GFP_KERNEL);
+        if(android_pmem_device == NULL)
+                return ;
+
+        android_pmem_pdata = kzalloc(sizeof(struct android_pmem_platform_data), GFP_KERNEL);
+        if(android_pmem_pdata == NULL) {
+                kfree(android_pmem_device);
+                return ;
+        }
+
+        page = alloc_pages(GFP_KERNEL, get_order(size));
+        if (page == NULL)
+                return ;
+
+        addr = (unsigned long)page_address(page);
+        paddr = virt_to_phys((void *)addr);
+        tmp = size;
+        dma_cache_maint(addr, size, DMA_FROM_DEVICE);
+        while(tmp > 0) {
+                SetPageReserved(virt_to_page(addr));
+                addr += PAGE_SIZE;
+                tmp -= PAGE_SIZE;
+        }
+        android_pmem_pdata->name = name;
+        android_pmem_pdata->start = paddr;
+        android_pmem_pdata->size = size;
+        android_pmem_pdata->no_allocator = no_allocator ;
+        android_pmem_pdata->cached = cached;
+
+        android_pmem_device->name = "android_pmem";
+        android_pmem_device->id = id++;
+        android_pmem_device->dev.platform_data = android_pmem_pdata;
+
+        platform_device_register(android_pmem_device);
+}
+#endif
+
+
+/*****************************************************************************
+ * Board Init
+ ****************************************************************************/
+static void __init dove_rd_avng_init(void)
+{
+	u32 dev, rev;
+
+	/*
+	 * Basic Dove setup. Needs to be called early.
+	 */
+	dove_init();
+	dove_pcie_id(&dev, &rev);
+	if (rev >= DOVE_REV_X0)
+		dove_mpp_conf(dove_rd_avng_x0_mpp_modes);
+	else
+		dove_mpp_conf(dove_rd_avng_y0_mpp_modes);
+	dove_rd_avng_gpio_init(rev);
+
+	pm_power_off = dove_rd_avng_power_off;
+
+	/* sdio card interrupt workaround using GPIOs */
+	dove_sd_card_int_wa_setup(0);
+	dove_sd_card_int_wa_setup(1);
+
+	/* Initialize AC'97 related regs. */
+	dove_avng_ac97_init();
+	dove_ac97_setup();
+	dove_ac97_dev_init();
+
+	dove_rtc_init();
+	pxa_init_dma_wins(&dove_mbus_dram_info);
+	pxa_init_dma(16);
+#ifdef CONFIG_MV_HAL_DRIVERS_SUPPORT
+	if (useHalDrivers || useNandHal) {
+		if (mvPdmaHalInit(MV_PDMA_MAX_CHANNELS_NUM) != MV_OK) {
+			printk(KERN_ERR "mvPdmaHalInit() failed.\n");
+			BUG();
+		}
+		/* reserve channels for NAND Data and command PDMA */
+		pxa_reserve_dma_channel(MV_PDMA_NAND_DATA);
+		pxa_reserve_dma_channel(MV_PDMA_NAND_COMMAND);
+	}
+#endif
+	dove_xor0_init();
+	dove_xor1_init();
+#ifdef CONFIG_MV_ETHERNET
+	if (use_hal_giga || useHalDrivers)
+		dove_mv_eth_init();
+	else
+#endif
+	dove_ge00_init(&dove_rd_avng_ge00_data);
+	dove_ehci0_init();
+	dove_ehci1_init();
+	/* ehci init functions access the usb port, only now it's safe to disable
+	 * all clocks
+	 */
+	ds_clks_disable_all(0, 0);
+	dove_sata_init(&dove_rd_avng_sata_data);
+	dove_spi0_init(0);
+	/* dove_spi1_init(1); */
+
+	/* uart0 is the debug port, register it first so it will be */
+	/* represented by device ttyS0, root filesystems usually expect the */
+	/* console to be on that device */
+	dove_uart0_init();
+	dove_uart1_init();
+	dove_i2c_init();
+	dove_i2c_exp_init(0);
+	if (rev >= DOVE_REV_X0) {
+		dove_i2c_exp_init(1);
+	}
+	dove_sdhci_cam_mbus_init();
+	dove_sdio0_init();
+	dove_sdio1_init();
+	dove_rd_avng_nfc_init();
+	dove_rd_avng_clcd_init();
+	dove_vmeta_init();
+	dove_gpu_init();
+	dove_cesa_init();
+	dove_hwmon_init();
+
+	dove_i2s_init(1, &i2s1_data);
+	i2c_register_board_info(0, dove_rd_avng_i2c_bus0_devs,
+				ARRAY_SIZE(dove_rd_avng_i2c_bus0_devs));
+	if (rev >= DOVE_REV_X0) {
+		i2c_register_board_info(1, dove_rd_avng_i2c_bus1_devs,
+					ARRAY_SIZE(dove_rd_avng_i2c_bus1_devs));
+	}
+
+	if (rev >= DOVE_REV_A0)
+		i2c_register_board_info(0, &idt, 1);
+
+	spi_register_board_info(dove_rd_avng_spi_flash_info,
+				ARRAY_SIZE(dove_rd_avng_spi_flash_info));
+#ifdef CONFIG_BATTERY_MCU
+	dove_battery_init();
+#endif
+#ifdef CONFIG_ANDROID_PMEM
+        android_add_pmem("pmem", 0x01800000UL, 1, 0);
+        android_add_pmem("pmem_adsp", 0x04000000UL, 0, 0);
+#endif
+
+#ifdef CONFIG_USB_ANDROID
+	dove_udc_init();
+	android_add_usb_devices();
+#endif
+}
+
+MACHINE_START(DOVE_RD_AVNG, "Marvell MV88F6781-RD Avengers MID Board")
+	.phys_io	= DOVE_SB_REGS_PHYS_BASE,
+	.io_pg_offst	= ((DOVE_SB_REGS_VIRT_BASE) >> 18) & 0xfffc,
+	.boot_params	= 0x00000100,
+	.init_machine	= dove_rd_avng_init,
+	.map_io		= dove_map_io,
+	.init_irq	= dove_init_irq,
+	.timer		= &dove_timer,
+/* reserve memory for VMETA and GPU */
+	.fixup		= dove_tag_fixup_mem32,
+MACHINE_END
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/cpufreq.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/cpufreq.c
@@ -0,0 +1,277 @@
+/*
+ * arch/arm/mach-dove/cpufreq.c
+ *
+ * Clock scaling for Dove SoC
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/cpufreq.h>
+#include <asm/io.h>
+#include <linux/mbus.h>
+#include <asm/mach/pci.h>
+#include <plat/pcie.h>
+#include "pmu/mvPmu.h"
+#include "pmu/mvPmuRegs.h"
+#include "ctrlEnv/mvCtrlEnvRegs.h"
+
+#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "dove_cpufreq", msg)
+
+/*
+ * Following table maps 4 bit reset sample to CPU clock.
+ */
+u32 dove_sar2cpu_clk[] = { 0, 0, 0, 0, 0, /* 0->4 are reserved */
+			   1000000, 933000, 933000,
+			   800000, 800000, 800000,
+			   1067000, 667000, 533000,
+			   400000, 333000};
+
+/*
+ * Following table maps 3 bit reset sample to CPU:L2 ratio.
+ */
+					/* CPU:L2 */
+u32 dove_sar_cpu2l2_ratio[] = { 10, 	/* 1:1 */
+				0, 	/* Reserved */
+				20, 	/* 1:2 */
+				0, 	/* Reserved */
+				30, 	/* 1:3 */
+				0, 	/* Reserved */
+				40, 	/* 1:4 */
+				0};	/* Reserved */
+
+/*
+ * Following table maps 4 bit reset sample to CPU:DDR ratio.
+ */
+					/* CPU:DDR */
+u32 dove_sar_cpu2ddr_ratio[] = {10, 	/* 1:1 */
+				0, 	/* Reserved */
+				20, 	/* 1:2 */
+				0, 	/* Reserved */
+				30, 	/* 1:3 */
+				0, 	/* Reserved */
+				40, 	/* 1:4 */
+				0,	/* Reserved */
+				50, 	/* 1:5 */
+				0, 	/* Reserved */
+				60, 	/* 1:6 */
+				0, 	/* Reserved */
+				70, 	/* 1:7 */
+				0, 	/* Reserved */
+				80, 	/* 1:8 */
+				100};	/* 1:10 */
+
+enum dove_cpufreq_range {
+	DOVE_CPUFREQ_DDR 	= 0,
+	DOVE_CPUFREQ_HIGH 	= 1,
+	DOVE_CPUFREQ_STEPS_NR
+};
+
+static struct cpufreq_frequency_table dove_freqs[] = {
+        { 0, 0                  },	/* DDR */
+        { 0, 0                  },	/* HIGH */
+        { 0, CPUFREQ_TABLE_END  }
+}; 
+
+
+/*
+ * Power management function: set or unset powersave mode
+ */
+int global_dvs_enable = 0;
+static inline int dove_set_frequency(enum dove_cpufreq_range freq)
+{
+	unsigned long flags;
+	int ret = 0;
+
+        local_irq_save(flags);
+
+        if (freq == DOVE_CPUFREQ_DDR) {
+		dprintk("Going to DDR Frequency\n");
+		if (mvPmuCpuSetOP (CPU_CLOCK_SLOW, (global_dvs_enable ? MV_TRUE : MV_FALSE)) != MV_OK)
+			ret = -EIO;			
+	}
+        else if (freq == DOVE_CPUFREQ_HIGH) {
+		dprintk("Going to HIGH Frequency\n");
+		if (mvPmuCpuSetOP (CPU_CLOCK_TURBO, (global_dvs_enable ? MV_TRUE : MV_FALSE)) != MV_OK)
+			ret = -EIO;
+	}
+	else {
+		ret = -EINVAL;
+	}
+
+        local_irq_restore(flags);
+	return ret;
+}
+
+static int dove_cpufreq_verify(struct cpufreq_policy *policy)
+{
+        if (unlikely(!cpu_online(policy->cpu)))
+                return -ENODEV;
+
+        return cpufreq_frequency_table_verify(policy, dove_freqs);
+}
+
+/* 
+ * Get the current frequency for a given cpu.
+ */
+static unsigned int dove_cpufreq_get(unsigned int cpu)
+{
+        unsigned int freq;
+        u32 reg;
+
+        if (unlikely(!cpu_online(cpu)))
+                return -ENODEV;
+
+	/* Read the PMU DFS status register - CpuSlowModeStts */
+        reg = readl(INTER_REGS_BASE | PMU_DFS_STATUS_REG);
+
+        if (reg & PMU_DFS_STAT_SLOW_MASK)
+                freq = dove_freqs[DOVE_CPUFREQ_DDR].frequency;
+        else
+                freq = dove_freqs[DOVE_CPUFREQ_HIGH].frequency;
+
+	dprintk("Current frequency: %dMHz\n", (freq/1000));
+
+        return freq;
+}
+
+/* 
+ * Set the frequency for a given cpu.
+ */
+static int dove_cpufreq_target(struct cpufreq_policy *policy,
+                unsigned int target_freq, unsigned int relation)
+{
+        unsigned int index;
+	struct cpufreq_freqs freqs;
+	int ret;
+
+        if (unlikely(!cpu_online(policy->cpu)))
+                return -ENODEV;
+
+        /* Lookup the next frequency */
+        if (unlikely(cpufreq_frequency_table_target(policy, 
+                        dove_freqs, target_freq, relation, &index))) 
+                return -EINVAL;
+
+	freqs.old = policy->cur;
+	freqs.new = dove_freqs[index].frequency;
+	freqs.cpu = policy->cpu;
+
+	/* Check if no change is needed */
+	if (freqs.new == freqs.old)
+		return 0;
+
+        cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
+
+	ret = dove_set_frequency(index);
+
+        cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
+
+	dprintk("Set frequency: %dMHz\n", (dove_freqs[index].frequency / 1000));
+
+        return ret;
+}
+
+static int dove_cpufreq_cpu_init(struct cpufreq_policy *policy)
+{
+        u32 reg;
+	u32 cpuClk, ddrRatio;
+	int ret;
+
+        if (unlikely(!cpu_online(policy->cpu)))
+                return -ENODEV;
+
+	/* Read SAR register */
+        reg = readl(INTER_REGS_BASE | MPP_SAMPLE_AT_RESET_REG0);
+
+	/* Calculate CPU clock */
+	cpuClk = ((reg & MSAR_CPUCLCK_MASK) >> MSAR_CPUCLCK_OFFS);
+	cpuClk = dove_sar2cpu_clk[cpuClk];
+
+	/* Calculate DDR clock */
+	ddrRatio = ((reg & MSAR_DDRCLCK_RTIO_MASK) >> MSAR_DDRCLCK_RTIO_OFFS);
+	ddrRatio = dove_sar_cpu2ddr_ratio[ddrRatio]; /* x10 */
+
+	if ((cpuClk == 0) || (ddrRatio == 0)) {
+		printk(KERN_WARNING "Dove cpuFreq: Unknown Reset Configuration\n");
+		ret = -EINVAL;
+		goto error;
+	}
+
+        /* Set both HIGH and DDR frequencies */
+        dove_freqs[DOVE_CPUFREQ_HIGH].frequency = cpuClk;
+	dove_freqs[DOVE_CPUFREQ_DDR].frequency = ((cpuClk * 10) / ddrRatio);
+        
+	dprintk("Hight frequency: %dHz - Low frequency: %dHz\n",
+                        dove_freqs[DOVE_CPUFREQ_HIGH].frequency,
+                        dove_freqs[DOVE_CPUFREQ_DDR].frequency);
+
+	/* 
+	 * The voltage regulator needs ~60us to step up voltage depending on the
+	 * current consumption. So as to be on the safe side, 100us is used.
+	 */
+	policy->cpuinfo.transition_latency = 100000; /* in nano seconds */
+	policy->cur = cpuClk;
+
+	cpufreq_frequency_table_get_attr(dove_freqs, policy->cpu);
+
+	ret = cpufreq_frequency_table_cpuinfo(policy, dove_freqs);
+
+	printk(KERN_INFO "Dove cpuFreq Driver Initialized (%d/%d)\n", 
+		(dove_freqs[DOVE_CPUFREQ_HIGH].frequency / 1000000), 
+		(dove_freqs[DOVE_CPUFREQ_DDR].frequency / 1000000));
+
+error:	
+	return ret;
+}
+
+static int dove_cpufreq_cpu_exit(struct cpufreq_policy *policy)
+{
+        cpufreq_frequency_table_put_attr(policy->cpu);
+
+        return 0;
+}
+
+static struct freq_attr* dove_freq_attr[] = {
+        &cpufreq_freq_attr_scaling_available_freqs,
+        NULL,
+};
+
+static struct cpufreq_driver dove_freq_driver = {
+        .owner          = THIS_MODULE,
+        .name           = "dove_cpufreq",
+        .init           = dove_cpufreq_cpu_init,
+        .exit		= dove_cpufreq_cpu_exit,
+        .verify         = dove_cpufreq_verify,
+        .target         = dove_cpufreq_target,
+        .get            = dove_cpufreq_get,
+        .attr           = dove_freq_attr,
+};
+
+extern int cpufreq_disable;
+
+static int __init dove_cpufreq_init(void)
+{
+	if (cpufreq_disable)
+		return 0;
+
+        return cpufreq_register_driver(&dove_freq_driver);
+}
+
+static void __exit dove_cpufreq_exit(void)
+{
+	if (cpufreq_disable)
+		return;
+
+        cpufreq_unregister_driver(&dove_freq_driver);
+}
+
+MODULE_AUTHOR("Marvell Semiconductors ltd.");
+MODULE_DESCRIPTION("CPU frequency scaling for Dove SoC");
+MODULE_LICENSE("GPL");
+module_init(dove_cpufreq_init);
+module_exit(dove_cpufreq_exit);
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/twsi.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/twsi.h
@@ -0,0 +1,9 @@
+
+typedef enum {
+	DOVE_TWSI_OPTION1 = 0,
+	DOVE_TWSI_OPTION2 = 1,
+	DOVE_TWSI_OPTION3 = 2,
+} dove_twsi_option;
+
+int dove_select_exp_port(unsigned int port_id);
+void dove_reset_exp_port(void);
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/swsusp.S
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/swsusp.S
@@ -0,0 +1,332 @@
+/*
+ * swsusp.S - This file is based on arch/i386/power/swsusp.S;
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+/*
+ * This may not use any stack, nor any variable that is not "NoSave":
+ *
+ * Its rewriting one kernel image with another. What is stack in "old"
+ * image could very well be data page in "new" image, and overwriting
+ * your own stack under you is bad idea.
+ */
+
+/*
+ * FIXME: Work needs to be done for core with fp.
+ */
+
+#include <linux/linkage.h>
+#include <asm/memory.h>
+#include <asm/segment.h>
+#include <asm/page.h>
+#include <asm/asm-offsets.h>
+
+	.text
+
+#define	LOCAL_WORD(x) \
+	.data			; \
+	.p2align 2		; \
+	.type   x, #object	; \
+	.size   x, 4		; \
+x:				; \
+	.long 1
+
+#define WORD_ADDR(x) \
+	.align 2		; \
+.L##x:				; \
+	.word x
+
+#define	FUNC(x) \
+        .text			; \
+	.p2align 2		; \
+	.globl x		; \
+	.type   x, #function	; \
+x:
+
+#define	FUNC_END(x) \
+	.size	x, .-x
+
+#define CHANGE_MODE(x) \
+	mov	r1, r0		; \
+	bic	r1, r1, #0x1f	; \
+	orr	r1, r1, #0x##x	; \
+	msr	cpsr_c, r1
+
+/* nonvolatile int registers */
+#ifdef DEBUG
+	.globl	saved_context_r0	// for debug
+#endif
+	LOCAL_WORD(saved_context_r0)
+	LOCAL_WORD(saved_context_r1)
+	LOCAL_WORD(saved_context_r2)
+	LOCAL_WORD(saved_context_r3)
+	LOCAL_WORD(saved_context_r4)
+	LOCAL_WORD(saved_context_r5)
+	LOCAL_WORD(saved_context_r6)
+	LOCAL_WORD(saved_context_r7)
+	LOCAL_WORD(saved_context_r8)
+	LOCAL_WORD(saved_context_r9)
+	LOCAL_WORD(saved_context_r10)
+	LOCAL_WORD(saved_context_r11)
+	LOCAL_WORD(saved_context_r12)
+	LOCAL_WORD(saved_context_r13)
+	LOCAL_WORD(saved_context_r14)
+	LOCAL_WORD(saved_cpsr)
+
+	LOCAL_WORD(saved_context_r8_fiq)
+	LOCAL_WORD(saved_context_r9_fiq)
+	LOCAL_WORD(saved_context_r10_fiq)
+	LOCAL_WORD(saved_context_r11_fiq)
+	LOCAL_WORD(saved_context_r12_fiq)
+	LOCAL_WORD(saved_context_r13_fiq)
+	LOCAL_WORD(saved_context_r14_fiq)
+	LOCAL_WORD(saved_spsr_fiq)
+
+	LOCAL_WORD(saved_context_r13_irq)
+	LOCAL_WORD(saved_context_r14_irq)
+	LOCAL_WORD(saved_spsr_irq)
+	LOCAL_WORD(saved_context_r13_svc)
+	LOCAL_WORD(saved_context_r14_svc)
+	LOCAL_WORD(saved_spsr_svc)
+
+	LOCAL_WORD(saved_context_r13_abt)
+	LOCAL_WORD(saved_context_r14_abt)
+	LOCAL_WORD(saved_spsr_abt)
+
+	LOCAL_WORD(saved_context_r13_und)
+	LOCAL_WORD(saved_context_r14_und)
+	LOCAL_WORD(saved_spsr_und)
+//	LOCAL_WORD(nr_copy_pages)
+//	LOCAL_WORD(pagedir_nosave)
+
+/*
+ * non volatile fpu registers 
+ * s16 - s31
+ */
+	/* XXX:TBD */
+
+FUNC(swsusp_arch_suspend)
+
+	/* save current program status register */
+	ldr	r3, .Lsaved_cpsr
+	mrs	r1, cpsr
+	str	r1, [r3]
+
+	/* hold current mode */
+	mrs	r0, cpsr
+
+	CHANGE_MODE(1f)	/* change to system(user) mode */
+	/* save nonvolatile int register */
+	ldr	r3, .Lsaved_context_r0
+	stmia	r3, {r0-r14}
+
+	CHANGE_MODE(11) /* change to fiq mode */
+	/* save nonvolatile int register */
+	ldr	r3, .Lsaved_context_r8_fiq
+	stmia	r3, {r8-r14}
+	/* save spsr_fiq register */
+	ldr	r3, .Lsaved_spsr_fiq
+	mrs	r1, spsr
+	str	r1, [r3]
+
+	CHANGE_MODE(12) /* change to irq mode */
+	/* save nonvolatile int register */
+	ldr	r3, .Lsaved_context_r13_irq
+	stmia	r3, {r13-r14}
+	/* save spsr_irq register */
+	ldr	r3, .Lsaved_spsr_irq
+	mrs	r1, spsr
+	str	r1, [r3]
+
+	CHANGE_MODE(13) /* change to svc mode */
+	/* save nonvolatile int register */
+	ldr	r3, .Lsaved_context_r13_svc
+	stmia	r3, {r13-r14}
+	/* save spsr_svc register */
+	ldr	r3, .Lsaved_spsr_svc
+	mrs	r1, spsr
+	str	r1, [r3]
+
+	CHANGE_MODE(17) /* change to abt mode */
+	/* save nonvolatile int register */
+	ldr	r3, .Lsaved_context_r13_abt
+	stmia	r3, {r13-r14}
+	/* save spsr_abt register */
+	ldr	r3, .Lsaved_spsr_abt
+	mrs	r1, spsr
+	str	r1, [r3]
+
+	CHANGE_MODE(1b) /* change to und mode */
+	/* save nonvolatile int register */
+	ldr	r3, .Lsaved_context_r13_und
+	stmia	r3, {r13-r14}
+	/* save spsr_und register */
+	ldr	r3, .Lsaved_spsr_und
+	mrs	r1, spsr
+	str	r1, [r3]
+
+	/* go back to original mode */
+	msr	cpsr_c, r0
+
+	/*
+	 * save nonvolatile fp registers
+	 * and fp status/system registers, if needed
+	 */
+	/* XXX:TBD */
+
+	/* call swsusp_save */
+	bl	swsusp_save
+
+	/* restore return address */
+	ldr	r3, .Lsaved_context_r14_svc
+	ldr	lr, [r3]
+	mov	pc, lr
+
+	WORD_ADDR(saved_context_r0)
+	WORD_ADDR(saved_cpsr)
+	WORD_ADDR(saved_context_r8_fiq)
+	WORD_ADDR(saved_spsr_fiq)
+	WORD_ADDR(saved_context_r13_irq)
+	WORD_ADDR(saved_spsr_irq)
+	WORD_ADDR(saved_context_r13_svc)
+	WORD_ADDR(saved_context_r14_svc)
+	WORD_ADDR(saved_spsr_svc)
+	WORD_ADDR(saved_context_r13_abt)
+	WORD_ADDR(saved_spsr_abt)
+	WORD_ADDR(saved_context_r13_und)
+	WORD_ADDR(saved_spsr_und)
+
+FUNC_END(swsusp_arch_suspend)
+
+#define KERNEL_RAM_PADDR	(PHYS_OFFSET + TEXT_OFFSET)
+#define SWAPPER_PG_DIR		(KERNEL_RAM_PADDR - 0x4000)
+
+FUNC(swsusp_arch_resume)
+	/* set page table if needed */
+	ldr	r0, =SWAPPER_PG_DIR
+	mcr	p15, 0, r0, c2, c0, 0		@ load page table pointer
+	mcr	p15, 0, r0, c8, c7, 0		@ invalidate I,D TLBs
+	mcr	p15, 0, r0, c7, c5, 4		@ ISB
+
+	/*
+	 * retore "nr_copy_pages" pages which are saved and specified
+	 * at "pagedir_nosave"
+	 */
+
+	ldr	r0, .Lrestore_pblist
+	ldr	r6, [r0]
+	cmp	r6, #0
+	beq	.Lnothing_to_copy
+	
+.Lcopy_loop:
+	ldr	r4, [r6, #PBE_ADDRESS]     /* src */
+	ldr	r5, [r6, #PBE_ORIG_ADDRESS] /* dst */
+	mov	r9, #1024
+
+	/* this loop could be optimized by using stm and ldm. */
+.Lcopy_one_page:
+	ldr	r8, [r4]
+	str	r8, [r5]
+
+	add	r4, r4, #4
+	add	r5, r5, #4
+	sub	r9, r9, #1
+	cmp	r9, #0
+	bne	.Lcopy_one_page
+
+	ldr	r6, [r6, #PBE_NEXT] /* 16 means sizeof(suspend_pagedir_t) */
+	cmp	r6, #0
+	bne	.Lcopy_loop
+
+.Lnothing_to_copy:
+	/* hold current mode */
+	mrs	r0, cpsr
+
+	CHANGE_MODE(1f) /* change to system(user) mode */
+	/* restore nonvolatile int register */
+	ldr	r3, .Lsaved_context_r0
+	ldmia	r3, {r0-r14}
+	/* restore current program status register */
+	ldr	r3, .Lsaved_cpsr
+	ldr	r1, [r3]
+	msr	cpsr_cxsf, r1
+
+	CHANGE_MODE(11) /* change to fiq mode */
+	/* restore nonvolatile int register */
+	ldr	r3, .Lsaved_context_r8_fiq
+	ldmia	r3, {r8-r14}
+	/* restore spsr_fiq register */
+	ldr	r3, .Lsaved_spsr_fiq
+	ldr	r1, [r3]
+	msr	spsr_cxsf, r1
+
+	CHANGE_MODE(12) /* change to irq mode */
+	/* restore nonvolatile int register */
+	ldr	r3, .Lsaved_context_r13_irq
+	ldmia	r3, {r13-r14}
+	/* restore spsr_irq register */
+	ldr	r3, .Lsaved_spsr_irq
+	ldr	r1, [r3]
+	msr	spsr_cxsf, r1
+
+	CHANGE_MODE(13) /* change to svc mode */
+	/* restore nonvolatile int register */
+	ldr	r3, .Lsaved_context_r13_svc
+	ldmia	r3, {r13-r14}
+	/* restore spsr_svc register */
+	ldr	r3, .Lsaved_spsr_svc
+	ldr	r1, [r3]
+	msr	spsr_cxsf, r1
+
+	CHANGE_MODE(17) /* change to abt mode */
+	/* restore nonvolatile int register */
+	ldr	r3, .Lsaved_context_r13_abt
+	ldmia	r3, {r13-r14}
+	/* restore spsr_abt register */
+	ldr	r3, .Lsaved_spsr_abt
+	ldr	r1, [r3]
+	msr	spsr_cxsf, r1
+
+	CHANGE_MODE(1b) /* change to und mode */
+	/* restore nonvolatile int register */
+	ldr	r3, .Lsaved_context_r13_und
+	ldmia	r3, {r13-r14}
+	/* restore spsr_und register */
+	ldr	r3, .Lsaved_spsr_und
+	ldr	r1, [r3]
+	msr	spsr_cxsf, r1
+
+	/* go back to original mode */
+	msr	cpsr_c, r0
+
+	/*
+	 * restore nonvolatile fp registers
+	 *  and fp status/system registers, if needed
+	 */
+	/* XXX:TBD */
+
+	/* call swsusp_restore */
+//	bl	swsusp_restore
+
+	/* r0 will be the return value of swsusp_arch_suspend */
+	mov	r0, #0
+	/* restore return address */
+	ldr	r3, .Lsaved_context_r14_svc
+	ldr	lr, [r3]
+	mov	pc, lr
+
+	WORD_ADDR(restore_pblist)
+
+FUNC_END(swsusp_arch_resume)
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/clock.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/clock.h
@@ -0,0 +1,24 @@
+struct clk;
+
+struct clkops {
+	void			(*enable)(struct clk *);
+	void			(*disable)(struct clk *);
+	unsigned long		(*getrate)(struct clk *);
+	int			(*setrate)(struct clk *, unsigned long rate);
+};
+
+struct clk {
+	const struct clkops     *ops;
+	unsigned long		*rate;
+	u32			flags;
+	__s8                    usecount;
+	u32			mask;
+};
+
+/* Clock flags */
+#define ALWAYS_ENABLED          1
+
+int dove_devclks_init(void);
+unsigned int  dove_tclk_get(void);
+int dove_clk_config(struct device *dev, const char *id, unsigned long rate);
+void ds_clks_disable_all(int include_pci0, int include_pci1);
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/sdhci_cam_mbus.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/sdhci_cam_mbus.c
@@ -0,0 +1,147 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+*******************************************************************************/
+
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <linux/platform_device.h>
+#include <linux/mbus.h>
+
+#define SDHCI_CAM_MBUS_NAME   "sdhci_cam_mbus"
+/*
+ * driver for the MBUS Address decoding of the sdhci and camera controllers
+ */
+
+
+#define WINDOW_CTRL(i)          (0x30 + ((i) << 4))
+#define WINDOW_BASE(i)          (0x34 + ((i) << 4))
+
+static void sdhci_cam_conf_mbus_windows(void __iomem *base,
+					struct mbus_dram_target_info *dram)
+{
+	int i;
+	
+	for (i = 0; i < 4; i++) {
+		writel(0, base + WINDOW_CTRL(i));
+		writel(0, base + WINDOW_BASE(i));
+	}
+	
+	for (i = 0; i < dram->num_cs; i++) {
+		struct mbus_dram_window *cs = dram->cs + i;
+		
+		BUG_ON(i >= 4);
+		writel(((cs->size - 1) & 0xffff0000) |
+		       (cs->mbus_attr << 8) |
+		       (dram->mbus_dram_target_id << 4) | 1,
+		       base + WINDOW_CTRL(i));
+                writel(cs->base, base + WINDOW_BASE(i));
+	}
+}
+
+static int sdhci_cam_mbus_probe(struct platform_device *pdev)
+{
+	struct mbus_dram_target_info    *dram = pdev->dev.platform_data;
+	void __iomem *base;
+        struct resource *res;
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (res == NULL)
+                return -ENOMEM;
+
+        base = devm_ioremap(&pdev->dev, res->start, res->end - res->start + 1);
+        if (base == NULL)
+		return -ENOMEM;
+
+	platform_set_drvdata(pdev, base);
+        /*
+         * (Re-)program MBUS remapping windows if we are asked to.
+         */
+        if (dram != NULL)
+                sdhci_cam_conf_mbus_windows(base, dram);
+
+	return 0;
+}
+
+static int sdhci_cam_mbus_remove(struct platform_device *pdev)
+{
+	// Nothing to do meanwhile...
+	return 0;
+}
+
+#ifdef CONFIG_PM
+static int sdhci_cam_mbus_suspend(struct platform_device *pdev,
+				      pm_message_t state)
+{
+	return 0;
+}
+static int sdhci_cam_mbus_resume(struct platform_device *pdev)
+{
+	struct mbus_dram_target_info    *dram = pdev->dev.platform_data;
+	void __iomem *base = platform_get_drvdata(pdev);
+
+        /*
+         * (Re-)program MBUS remapping windows if we are asked to.
+         */
+        if (dram != NULL)
+                sdhci_cam_conf_mbus_windows(base, dram);
+	return 0;
+}
+
+#else
+#define sdhci_cam_mbus_suspend	NULL
+#define sdhci_cam_mbus_resume	NULL
+#endif
+
+static struct platform_driver sdhci_cam_mbus_driver = {
+	.probe		= sdhci_cam_mbus_probe,
+	.remove		= sdhci_cam_mbus_remove,
+	.suspend	= sdhci_cam_mbus_suspend,
+	.resume		= sdhci_cam_mbus_resume,
+	.driver = {
+		.name	= SDHCI_CAM_MBUS_NAME,
+		.owner	= THIS_MODULE,
+	},
+};
+
+static int __init sdhci_cam_mbus_init_module(void)
+{
+	int rc;
+
+	rc = platform_driver_register(&sdhci_cam_mbus_driver);
+
+	return rc;
+}
+module_init(sdhci_cam_mbus_init_module);
+
+static void __exit sdhci_cam_mbus_cleanup_module(void)
+{
+	platform_driver_unregister(&sdhci_cam_mbus_driver);
+}
+module_exit( sdhci_cam_mbus_cleanup_module);
+
+MODULE_ALIAS("platform:" SDHCI_CAM_MBUS_NAME);
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/clcd.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/clcd.c
@@ -0,0 +1,792 @@
+/*
+ *  linux/arch/arm/mach-dove/clcd.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/list.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/string.h>
+#include <linux/sysdev.h>
+#include <linux/amba/bus.h>
+#include <linux/amba/kmi.h>
+
+//#include <asm/hardware.h>
+#include <linux/io.h>
+#include <asm/irq.h>
+#include <asm/setup.h>
+#include <linux/param.h>		/* HZ */
+#include <asm/mach-types.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/flash.h>
+#include <asm/mach/irq.h>
+#include <asm/mach/map.h>
+#include <asm/mach/time.h>
+#include <video/dovefb.h>
+#include <video/dovefbreg.h>
+#include <video/dovedcon.h>
+#include <mach/dove_bl.h>
+#include "gpp/mvGppRegs.h"
+#include <ctrlEnv/mvCtrlEnvRegs.h>
+#include "common.h"
+
+unsigned int lcd0_enable;
+module_param(lcd0_enable, uint, 0);
+MODULE_PARM_DESC(lcd0_enable, "set to 1 to enable LCD0 output.");
+unsigned int lcd1_enable = 1;
+module_param(lcd1_enable, uint, 0);
+MODULE_PARM_DESC(lcd1_enable, "set to 1 to enable LCD1 output.");
+
+/*
+ * set lcd clock source in bootargs
+ * = -1, Use dovefb_mach_info default setting.
+ * =  0, choose AXI, 333Mhz.
+ * =  1, choose PLL, auto use accurate mode if only one LCD refer to it.
+ * =  2, choose external clk#0, (available REV A0)
+ * =  3, choose external clk#1, (available REV A0)
+ */
+static int lcd0_clk = -1;
+module_param(lcd0_clk, int, 0);
+MODULE_PARM_DESC(lcd0_clk, "set to 0 to force internal AXI clk, 1 for internal PLL, 2 for external clk#0, 3 for external clk#1");
+
+static int lcd1_clk = -1;
+module_param(lcd1_clk, int, 0);
+MODULE_PARM_DESC(lcd1_clk, "set to 0 to force internal AXI clk, 1 for internal PLL, 2 for external clk#0, 3 for external clk#1");
+
+#if defined(CONFIG_FB_DOVE_CLCD_FLAREON_GV) || \
+    defined(CONFIG_FB_DOVE_CLCD_FLAREON_GV_MODULE)
+	#ifndef CONFIG_ARCH_DOVENB_ON_TAHOE_AXI
+	#define	LCD_BASE_PHY_ADDR		0x80400000
+	#define	LCD1_BASE_PHY_ADDR		0x80410000
+	#define	DCON_BASE_PHY_ADDR		0x80420000
+	#else
+	#define	LCD_BASE_PHY_ADDR		0xB0020000
+	#define	LCD1_BASE_PHY_ADDR		0xB0010000
+	#define	DCON_BASE_PHY_ADDR		0xB0030000
+	#endif
+#elif defined(CONFIG_ARCH_DOVE)
+	#define	LCD_BASE_PHY_ADDR		(DOVE_LCD1_PHYS_BASE)
+	#define	LCD1_BASE_PHY_ADDR		(DOVE_LCD2_PHYS_BASE)
+	#define	DCON_BASE_PHY_ADDR		(DOVE_LCD_DCON_PHYS_BASE)
+#else
+	#ifdef CONFIG_ARCH_TAHOE_AXI
+	#define LCD_BASE_PHY_ADDR		0x1C010000
+	#define LCD1_BASE_PHY_ADDR		0x1C020000
+	#else
+	#define	LCD_BASE_PHY_ADDR		0x70000000
+	#define	LCD1_BASE_PHY_ADDR		0x70010000
+	#define	DCON_BASE_PHY_ADDR		0x70020000
+	#define	IRE_BASE_PHY_ADDR		0x70021000
+
+	#endif /* CONFIG_ARCH_TAHOE */
+#endif
+
+/*
+ * LCD IRQ Line
+ */
+#ifndef IRQ_DOVE_LCD0
+#define IRQ_DOVE_LCD1		10
+#define IRQ_DOVE_LCD0		10
+#define IRQ_DOVE_LCD_DCON	10
+#endif
+
+/*
+ * DCON base addr. (PA)
+ */
+#ifndef DCON_BASE_PHY_ADDR
+#define	DCON_BASE_PHY_ADDR			0x0
+#endif
+
+/*
+ * Default mode database.
+ */
+static struct fb_videomode video_modes[] = {
+	[0] = {			/* 640x480@60 */
+	.pixclock	= 0,
+	.refresh	= 60,
+	.xres		= 640, 
+	.yres		= 480,
+
+	.right_margin	= 16,
+	.hsync_len	= 96,
+	.left_margin	= 48,
+
+	.lower_margin	= 11,
+	.vsync_len	= 2,
+	.upper_margin	= 31,
+	.sync		= 0,
+	},
+	[1] = {			/* 640x480@72 */
+	.pixclock	= 0,
+	.refresh	= 72,
+	.xres		= 640, 
+	.yres		= 480,
+
+	.right_margin	= 24,
+	.hsync_len	= 40,
+	.left_margin	= 128,
+
+	.lower_margin	= 9,
+	.vsync_len	= 3,
+	.upper_margin	= 28,
+	.sync		= 0,
+	},
+	[2] = {			/* 640x480@75 */
+	.pixclock	= 0,
+	.refresh	= 75,
+	.xres		= 640, 
+	.yres		= 480,
+
+	.right_margin	= 16,
+	.hsync_len	= 96,
+	.left_margin	= 48,
+
+	.lower_margin	= 11,
+	.vsync_len	= 2,
+	.upper_margin	= 32,
+	.sync		= 0,
+	},
+	[3] = {			/* 640x480@85 */
+	.pixclock	= 0,
+	.refresh	= 85,
+	.xres		= 640, 
+	.yres		= 480,
+
+	.right_margin	= 32,
+	.hsync_len	= 48,
+	.left_margin	= 112,
+
+	.lower_margin	= 1,
+	.vsync_len	= 3,
+	.upper_margin	= 25,
+	.sync		= 0,
+	},
+	[4] = {			/* 800x600@56 */
+	.pixclock	= 0,
+	.refresh	= 56,
+	.xres		= 800, 
+	.yres		= 600,
+
+	.right_margin	= 32,
+	.hsync_len	= 128,
+	.left_margin	= 128,
+
+	.lower_margin	= 1,
+	.vsync_len	= 4,
+	.upper_margin	= 14,
+	.sync		= 0,
+	},
+	[5] = {			/* 800x600@60 */
+	.pixclock	= 0,
+	.refresh	= 60,
+	.xres		= 800,
+	.yres		= 600,
+
+	.right_margin	= 40,
+	.hsync_len	= 128,
+	.left_margin	= 88,
+
+	.lower_margin	= 1,
+	.vsync_len	= 4,
+	.upper_margin	= 23,
+	.sync		= 0,
+	},
+	[6] = {			/* 800x600@72 */
+	.pixclock	= 0,
+	.refresh	= 72,
+	.xres		= 800,
+	.yres		= 600,
+
+	.right_margin	= 56,
+	.hsync_len	= 120,
+	.left_margin	= 64,
+
+	.lower_margin	= 37,
+	.vsync_len	= 6,
+	.upper_margin	= 23,
+	.sync		= 0,
+	},
+	[7] = {			/* 800x600@75 */
+	.pixclock	= 0,
+	.refresh	= 75,
+	.xres		= 800,
+	.yres		= 600,
+
+	.right_margin	= 16,
+	.hsync_len	= 80,
+	.left_margin	= 160,
+
+	.lower_margin	= 1,
+	.vsync_len	= 2,
+	.upper_margin	= 21,
+	.sync		= 0,
+	},
+	[8] = {			/* 800x600@85 */
+	.pixclock	= 0,
+	.refresh	= 85,
+	.xres		= 800,
+	.yres		= 600,
+
+	.right_margin	= 32,
+	.hsync_len	= 64,
+	.left_margin	= 152,
+
+	.lower_margin	= 1,
+	.vsync_len	= 3,
+	.upper_margin	= 27,
+	.sync		= 0,
+	},
+	[9] = {			/* 1024x600@60 */
+	.pixclock	= 0,
+	.refresh	= 60,
+	.xres		= 1024,
+	.yres		= 600,
+
+	.right_margin	= 38,
+	.hsync_len	= 100,
+	.left_margin	= 38,
+	.right_margin	= 38,
+
+	.lower_margin	= 8,
+	.vsync_len	= 4,
+	.upper_margin	= 8,
+	.sync		= 0,
+	},
+	[10] = {			/* 1024x768@60 */
+	.pixclock	= 0,
+	.refresh	= 60,
+	.xres		= 1024,
+	.yres		= 768,
+
+	.right_margin	= 24,
+	.hsync_len	= 136,
+	.left_margin	= 160,
+
+	.lower_margin	= 3,
+	.vsync_len	= 6,
+	.upper_margin	= 29,
+	.sync		= 0,
+	},
+	[11] = {			/* 1024x768@70 */
+	.pixclock	= 0,
+	.refresh	= 70,
+	.xres		= 1024,
+	.yres		= 768,
+
+	.right_margin	= 24,
+	.hsync_len	= 136,
+	.left_margin	= 144,
+
+	.lower_margin	= 3,
+	.vsync_len	= 6,
+	.upper_margin	= 29,
+	.sync		= 0,
+	},
+	[12] = {			/* 1024x768@75 */
+	.pixclock	= 0,
+	.refresh	= 75,
+	.xres		= 1024,
+	.yres		= 768,
+
+	.right_margin	= 16,
+	.hsync_len	= 96,
+	.left_margin	= 176,
+
+	.lower_margin	= 1,
+	.vsync_len	= 3,
+	.upper_margin	= 28,
+	.sync		= 0,
+	},
+	[12] = {			/* 1024x768@85 */
+	.pixclock	= 0,
+	.refresh	= 85,
+	.xres		= 1024,
+	.yres		= 768,
+
+	.right_margin	= 48,
+	.hsync_len	= 96,
+	.left_margin	= 208,
+
+	.lower_margin	= 1,
+	.vsync_len	= 3,
+	.upper_margin	= 36,
+	.sync		= 0,
+	},
+	[13] = {			/* 1280x720@60 */
+	.pixclock	= 0,
+	.refresh	= 60,
+	.xres		= 1280, /* 1328 */
+	.yres		= 720,  /* 816 */
+
+	.hsync_len	= 40,
+	.left_margin	= 220,
+	.right_margin	= 110,
+
+	.vsync_len	= 5,
+	.upper_margin	= 20,
+	.lower_margin	= 5,
+	.sync		= 0,
+	},
+	[14] = {			/* 1280x1024@60 */
+	.pixclock	= 0,
+	.refresh	= 60,
+	.xres		= 1280,
+	.yres		= 1024,
+
+	.right_margin	= 48,
+	.hsync_len	= 112,
+	.left_margin	= 248,
+
+	.lower_margin	= 1,
+	.vsync_len	= 3,
+	.upper_margin	= 38,
+	.sync		= 0,
+	},
+	[15] = {			/* 1366x768@60 */
+	.pixclock	= 0,
+	.refresh	= 60,
+	.xres		= 1366,
+	.yres		= 768,
+
+	.right_margin	= 72,
+	.hsync_len	= 144,
+	.left_margin	= 216,
+
+	.lower_margin	= 1,
+	.vsync_len	= 3,
+	.upper_margin	= 23,
+	.sync		= 0,
+	},
+#if 1
+	[16] = {			/* 1650x1050@60 */
+	.pixclock	= 0,
+	.refresh	= 60,
+	.xres		= 1650,
+	.yres		= 1050,
+
+	.right_margin	= 104,
+	.hsync_len	= 184,
+	.left_margin	= 288,
+
+	.lower_margin	= 1,
+	.vsync_len	= 3,
+	.upper_margin	= 33,
+	.sync		= 0,
+	},
+	[17] = {			/* 1920x1080@60 */
+	.pixclock	= 0,
+	.refresh	= 60,
+	.xres		= 1920,
+	.yres		= 1080,
+
+	.right_margin	= 88,
+	.hsync_len	= 44,
+	.left_margin	= 148,
+
+	.lower_margin	= 4,
+	.vsync_len	= 5,
+	.upper_margin	= 36,
+	.sync		= 0,
+	},
+	[18] = {			/* 1920x1200@60 */
+	.pixclock	= 0,
+	.refresh	= 60,
+	.xres		= 1920,
+	.yres		= 1200,
+
+	.right_margin	= 128,
+	.hsync_len	= 208,
+	.left_margin	= 336,
+
+	.lower_margin	= 1,
+	.vsync_len	= 3,
+	.upper_margin	= 38,
+	.sync		= 0,
+	},
+#endif
+
+};
+
+#ifdef CONFIG_FB_DOVE_CLCD1
+
+static struct resource lcd1_vid_res[] = {
+	[0] = {
+		.start	= LCD1_BASE_PHY_ADDR,
+		.end	= LCD1_BASE_PHY_ADDR+0x001C8,
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= LCD_BASE_PHY_ADDR,
+		.end	= LCD_BASE_PHY_ADDR+0x001C8,
+		.flags	= IORESOURCE_MEM,
+	},
+	[2] = {
+		.start	= IRQ_DOVE_LCD1,
+		.end	= IRQ_DOVE_LCD1,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct resource lcd1_res[] = {
+	[0] = {
+		.start	= LCD1_BASE_PHY_ADDR,
+		.end	= LCD1_BASE_PHY_ADDR+0x001C8,
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= LCD_BASE_PHY_ADDR,
+		.end	= LCD_BASE_PHY_ADDR+0x001C8,
+		.flags	= IORESOURCE_MEM,
+	},
+	[2] = {
+		.start	= IRQ_DOVE_LCD1,
+		.end	= IRQ_DOVE_LCD1,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+
+static struct platform_device lcd1_platform_device = {
+	.name = "dovefb",
+	.id = 1,			/* lcd1 */
+	.dev = {
+		.coherent_dma_mask = ~0,
+//		.platform_data = &lcd1_dmi,
+	},
+	.num_resources	= ARRAY_SIZE(lcd1_res),
+	.resource	= lcd1_res,
+};
+
+static struct platform_device lcd1_vid_platform_device = {
+	.name = "dovefb_ovly",
+	.id = 1,			/* lcd1 */
+	.dev = {
+		.coherent_dma_mask = ~0,
+//		.platform_data = &lcd1_vid_dmi,
+	},
+	.num_resources	= ARRAY_SIZE(lcd1_vid_res),
+	.resource	= lcd1_vid_res,
+};
+#endif /* CONFIG_FB_DOVE_CLCD1 */
+
+#if defined(CONFIG_FB_DOVE_CLCD)
+
+static struct resource lcd0_vid_res[] = {
+	[0] = {
+		.start	= LCD_BASE_PHY_ADDR,
+		.end	= LCD_BASE_PHY_ADDR+0x1C8,
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= IRQ_DOVE_LCD0,
+		.end	= IRQ_DOVE_LCD0,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+
+static struct resource lcd0_res[] = {
+	[0] = {
+		.start	= LCD_BASE_PHY_ADDR,
+		.end	= LCD_BASE_PHY_ADDR+0x1C8,
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= IRQ_DOVE_LCD0,
+		.end	= IRQ_DOVE_LCD0,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+
+static struct platform_device lcd0_platform_device = {
+	.name = "dovefb",
+	.id = 0,			/* lcd0 */
+	.dev = {
+		.coherent_dma_mask = ~0,
+//		.platform_data = &lcd0_dmi,
+	},
+	.num_resources	= ARRAY_SIZE(lcd0_res),
+	.resource	= lcd0_res,
+};
+
+static struct platform_device lcd0_vid_platform_device = {
+	.name = "dovefb_ovly",
+	.id = 0,			/* lcd0 */
+	.dev = {
+		.coherent_dma_mask = ~0,
+//		.platform_data = &lcd0_vid_dmi,
+	},
+	.num_resources	= ARRAY_SIZE(lcd0_vid_res),
+	.resource	= lcd0_vid_res,
+};
+#endif /* CONFIG_FB_DOVE_CLCD */
+
+#ifdef CONFIG_FB_DOVE_DCON
+static struct resource dcon_res[] = {
+	[0] = {
+		.start	= DCON_BASE_PHY_ADDR,
+		.end	= DCON_BASE_PHY_ADDR+0x100,
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= IRQ_DOVE_LCD_DCON,
+		.end	= IRQ_DOVE_LCD_DCON,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct dovedcon_mach_info dcon_data = {
+	.port_a = 1,
+	.port_b = 1,
+};
+
+static struct platform_device dcon_platform_device = {
+	.name = "dovedcon",
+	.id = -1,
+	.dev = {
+		.platform_data = &dcon_data,
+	},
+	.num_resources	= ARRAY_SIZE(dcon_res),
+	.resource	= dcon_res,
+};
+#endif /* CONFIG_FB_DOVE_DCON */
+
+#ifdef CONFIG_BACKLIGHT_DOVE
+static struct resource backlight_res[] = {
+	[0] = {
+		.start	= LCD_BASE_PHY_ADDR,
+		.end	= LCD_BASE_PHY_ADDR+0x1C8,
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device backlight_platform_device = {
+	.name = "dove-bl",
+	.id = 0,
+	.num_resources	= ARRAY_SIZE(backlight_res),
+	.resource	= backlight_res,
+};
+
+#endif /* CONFIG_FB_DOVE_DCON */
+
+int compatibility_check(int lcd_args, struct dovefb_mach_info *lcd_dmi_data)
+{
+	u32 dev, rev;
+
+	if (!lcd_dmi_data)
+		return -1;
+
+	/* Get chip version. */
+	dove_pcie_id(&dev, &rev);
+
+	/* LCD external clock supported only starting from rev A0 */
+	if ((rev < DOVE_REV_A0) && ((lcd_args > 1) ||
+		(MRVL_EXT_CLK0 == lcd_dmi_data->clk_src) ||
+		(MRVL_EXT_CLK1 == lcd_dmi_data->clk_src))) {
+		lcd_dmi_data->clk_src = MRVL_PLL_CLK;
+		lcd_dmi_data->clk_name = "accurate_LCDCLK";
+		lcd_dmi_data->accurate_clk = 1;
+		printk(KERN_WARNING "Bootargs choose wrong refclk for %s.\n",
+			lcd_dmi_data->id_gfx);
+	}
+
+	return 0;
+}
+
+int is_clksrc_pll(int lcd_args, struct dovefb_mach_info *lcd_dmi_data)
+{
+	int use_pll = 0;
+
+	/* Check whether bootargs existed first. */
+	if (-1 != lcd_args) {
+		if(1 == lcd_args)
+			use_pll = 1;
+	/* No bootargs, than check platform info. */
+	} else if (lcd_dmi_data && (MRVL_PLL_CLK == lcd_dmi_data->clk_src))
+		use_pll = 1;
+
+	return use_pll;
+}
+
+int clcd_platform_init(struct dovefb_mach_info *lcd0_dmi_data,
+		       struct dovefb_mach_info *lcd0_vid_dmi_data,
+		       struct dovefb_mach_info *lcd1_dmi_data,
+		       struct dovefb_mach_info *lcd1_vid_dmi_data,
+		       struct dovebl_platform_data *backlight_data)
+{
+	u32 total_x, total_y, i;
+	u64 div_result;
+	u32 dev, rev;
+	unsigned int lcd_accurate_clock = 1;
+	unsigned int lcd0_use_pll;
+	unsigned int lcd1_use_pll;
+
+	dove_pcie_id(&dev, &rev);
+
+	for (i = 0; i < ARRAY_SIZE(video_modes); i++) {
+		total_x = video_modes[i].xres + video_modes[i].hsync_len +
+			video_modes[i].left_margin +
+			video_modes[i].right_margin;
+		total_y = video_modes[i].yres + video_modes[i].vsync_len +
+			video_modes[i].upper_margin +
+			video_modes[i].lower_margin;
+		div_result = 1000000000000ll;
+		do_div(div_result,
+			(total_x * total_y * video_modes[i].refresh));
+		video_modes[i].pixclock	= div_result;
+	}
+
+	/* check compatibility for different chip. */
+	compatibility_check(lcd0_clk, lcd0_dmi_data);
+	compatibility_check(lcd1_clk, lcd1_dmi_data);
+
+	/* Only one lcd uses internal refclk, we turn on accurate mode. */
+	lcd0_use_pll = is_clksrc_pll(lcd0_clk, lcd0_dmi_data);
+	lcd1_use_pll = is_clksrc_pll(lcd1_clk, lcd1_dmi_data);
+
+	printk(KERN_WARNING "LCD0 %s PLL.\n", lcd0_use_pll ?
+		"uses":"doesn't use");
+	printk(KERN_WARNING "LCD1 %s PLL.\n", lcd1_use_pll ?
+		"uses":"doesn't use");
+	if (lcd0_use_pll && lcd1_use_pll)
+		lcd_accurate_clock = 0;
+
+	printk(KERN_WARNING "Turn %s PLL accurate mode.\n",
+	       lcd_accurate_clock ? "on" : "off");
+
+	/*
+	 * Because DCON depends on lcd0 & lcd1 clk. Here we
+	 * try to reorder the load sequence. Fix me when h/w
+	 * changes.
+	 */
+#ifdef CONFIG_FB_DOVE_CLCD
+	/* lcd0 */
+	if (lcd0_enable && lcd0_dmi_data && lcd0_vid_dmi_data) {
+		switch(lcd0_clk) {
+		case -1: /* default, using dovefb_mach_info */
+			break;
+		case 0:
+			lcd0_dmi_data->clk_src = MRVL_AXI_CLK;
+
+			lcd0_dmi_data->clk_name = "AXICLK";
+			break;
+		case 1:
+			lcd0_dmi_data->clk_src = MRVL_PLL_CLK;
+			break;
+		case 2:
+			lcd0_dmi_data->clk_src = MRVL_EXT_CLK0;
+			lcd0_dmi_data->clk_name = "IDT_CLK0";
+			break;
+		case 3:
+			lcd0_dmi_data->clk_src = MRVL_EXT_CLK1;
+			lcd0_dmi_data->clk_name = "IDT_CLK1";
+			break;
+		default:
+			printk(KERN_ERR "error: invalid value(%d) for lcd0_clk patameter\n",
+			       lcd0_clk);
+
+		}
+
+		if (lcd0_dmi_data->clk_src == MRVL_PLL_CLK) {
+			lcd0_dmi_data->accurate_clk = lcd_accurate_clock;
+			if (lcd0_dmi_data->accurate_clk)
+				lcd0_dmi_data->clk_name = "accurate_LCDCLK";
+			else
+				lcd0_dmi_data->clk_name = "LCDCLK";
+		}
+		lcd0_vid_dmi_data->modes = video_modes;
+		lcd0_vid_dmi_data->num_modes = ARRAY_SIZE(video_modes);
+		lcd0_vid_platform_device.dev.platform_data = lcd0_vid_dmi_data;
+
+		lcd0_dmi_data->modes = video_modes;
+		lcd0_dmi_data->num_modes = ARRAY_SIZE(video_modes);
+		lcd0_platform_device.dev.platform_data = lcd0_dmi_data;
+		platform_device_register(&lcd0_vid_platform_device);
+		platform_device_register(&lcd0_platform_device);
+	} else {
+		printk(KERN_INFO "LCD 0 disabled.\n");
+	}
+#endif
+
+#ifdef CONFIG_FB_DOVE_CLCD1
+	/* lcd1 */
+	if (lcd1_enable && lcd1_dmi_data && lcd1_vid_dmi_data) {
+		switch(lcd1_clk) {
+		case -1: /* default, using dovefb_mach_info */
+			break;
+		case 0:
+			lcd1_dmi_data->clk_src = MRVL_AXI_CLK;
+			lcd1_dmi_data->clk_name = "AXICLK";
+			break;
+		case 1:
+			lcd1_dmi_data->clk_src = MRVL_PLL_CLK;
+			break;
+		case 2:
+			lcd1_dmi_data->clk_src = MRVL_EXT_CLK0;
+			lcd1_dmi_data->clk_name = "IDT_CLK0";
+			break;
+		case 3:
+			lcd1_dmi_data->clk_src = MRVL_EXT_CLK1;
+			lcd1_dmi_data->clk_name = "IDT_CLK1";
+			break;
+		default:
+			printk(KERN_ERR "error: invalid value(%d) for lcd1_clk patameter\n",
+			       lcd1_clk);
+		}
+
+		if (lcd1_dmi_data->clk_src == MRVL_PLL_CLK) {
+			lcd1_dmi_data->accurate_clk = lcd_accurate_clock;
+			if (lcd1_dmi_data->accurate_clk)
+				lcd1_dmi_data->clk_name = "accurate_LCDCLK";
+			else
+				lcd1_dmi_data->clk_name = "LCDCLK";
+		}
+
+#ifdef CONFIG_FB_DOVE_CLCD
+		lcd1_dmi_data->enable_lcd0 = (lcd0_enable ? 0 : 1);
+#endif
+		lcd1_vid_dmi_data->modes = video_modes;
+		lcd1_vid_dmi_data->num_modes = ARRAY_SIZE(video_modes);
+		lcd1_vid_platform_device.dev.platform_data = lcd1_vid_dmi_data;
+
+		lcd1_dmi_data->modes = video_modes;
+		lcd1_dmi_data->num_modes = ARRAY_SIZE(video_modes);
+		lcd1_platform_device.dev.platform_data = lcd1_dmi_data;
+		platform_device_register(&lcd1_vid_platform_device);
+		platform_device_register(&lcd1_platform_device);
+	} else {
+		printk(KERN_INFO "LCD 1 disabled.\n");
+	}
+#endif
+
+#ifdef CONFIG_FB_DOVE_DCON
+	if (lcd0_enable || lcd1_enable) {
+		if (lcd0_enable)
+			dcon_data.port_a = 1;
+		if (lcd1_enable)
+			dcon_data.port_b = 1;
+#ifdef CONFIG_FB_DOVE_CLCD_DCONB_BYPASS0
+		dcon_data.port_b = 1;
+#endif
+		platform_device_register(&dcon_platform_device);
+	}
+#endif
+
+#ifdef CONFIG_BACKLIGHT_DOVE
+	if (lcd0_enable) {
+		backlight_platform_device.dev.platform_data = backlight_data;
+		platform_device_register(&backlight_platform_device);
+	}
+#endif
+
+	return 0;
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/idt5v49ee503.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/idt5v49ee503.c
@@ -0,0 +1,1260 @@
+/*
+ *  linux/arch/arm/mach-dove/idt5v49ee503.c
+ *  EEPROM programmable clock generator (IDT5V49EE503) driver
+ */
+
+/* TODO: move to Dove's clock.c ? */
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/i2c.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <asm/clkdev.h>
+#include <asm/string.h>
+#include <asm/div64.h>
+#include "idt5v49ee503.h"
+#include "clock.h"
+
+#define IDT5V49EE503_BUS_ADDR			0x6A /* 7'b1101010 */
+
+#define IDT5V49EE503_SW_MODE_CTL_REG		0x0
+#define IDT5V49EE503_CFG_SEL_REG		0x1
+#define IDT5V49EE503_OUT_ENA_REG		0x2
+#define IDT5V49EE503_OUT_SUSPEND_REG		0x3
+#define IDT5V49EE503_PLL_SUSPEND_REG		0x4
+#define IDT5V49EE503_XTCLKSEL_REG		0x5
+#define IDT5V49EE503_XTAL_REG			0x7
+
+/********************/
+/* LOCLA DATA TYPES */
+/********************/
+/* Clock configuration ID */
+typedef enum
+{
+	IDT_CLK_CFG_0 = 0,
+	IDT_CLK_CFG_1 = 1,
+	IDT_CLK_CFG_2 = 2,
+	IDT_CLK_CFG_3 = 3,
+	IDT_CLK_CFG_4 = 4,
+	IDT_CLK_CFG_5 = 5,
+	IDT_CLK_CFG_NUM
+
+} idt_clock_cfg_id_t;
+
+/* Clock output divider */
+typedef enum
+{
+	IDT_OUT_DIV1 = 0,
+	IDT_OUT_DIV2,
+	IDT_OUT_DIV3,
+	IDT_OUT_DIV6,
+	IDT_OUT_DIV_NUM,
+	IDT_OUT_DIV_INV = IDT_OUT_DIV_NUM
+
+} idt_out_div_t;
+
+
+typedef struct _idt_clock_cfg_t
+{
+	int			bus_id;		/* i2c bus/adapter ID to use with i2c_get_adapter() */\
+	int			clk_src_clkin;  /* clock source is CLKIN(0) or XTAL/REFIN(0) */
+	idt_clock_id_t		clock_id;	/* clock ID to configure (PLL0-PLL3) */
+	idt_output_id_t		out_id;		/* output pin where PLL + output divider are connected */
+	idt_clock_cfg_id_t	cfg_id;		/* clock internal configuration ID */
+	unsigned int		cfg_act;	/* when !=0 this configuration is not just stored */
+						/* in the clock EEPROM, but also set as active  and */
+						/* PLL + output are enabled */
+} idt_clock_cfg_t;
+
+/* Clock source IDs (MUX names) */
+typedef enum
+{
+	IDT_CLK_SRC_ID_PRIM = 0,
+	IDT_CLK_SRC_ID_0,
+	IDT_CLK_SRC_ID_1,
+	IDT_CLK_SRC_ID_2,
+	IDT_CLK_SRC_ID_3,
+	IDT_CLK_SRC_ID_6,
+	IDT_CLK_SRC_ID_NUM
+
+} idt_clock_src_id_t;
+
+/* Clock sources (MUX selection) */
+typedef enum
+{
+	IDT_CLK_SRC_DIV1 = 0x0,
+	IDT_CLK_SRC_DIV3 = 0x1,
+	IDT_CLK_SRC_REFIN= 0x2,
+	IDT_CLK_SRC_RSRVD= 0x3,
+	IDT_CLK_SRC_PLL0 = 0x4,
+	IDT_CLK_SRC_PLL1 = 0x5,
+	IDT_CLK_SRC_PLL2 = 0x6,
+	IDT_CLK_SRC_PLL3 = 0x7
+
+} idt_clock_src_t;
+
+/* Clock sources (MUX selection) */
+typedef enum
+{
+	IDT_PRM_CLK_CRYSTAL = 0,
+	IDT_PRM_CLK_CLKIN   = 1
+} idt_prim_clock_src_t;
+
+/* Clock registers for variour PLL parameters */
+typedef struct _idt_pll_reg_set_t
+{
+	unsigned char N_lreg;	/* feedback divider LSB N[7:0]  */
+	unsigned char N_mreg;	/* feedback divider MSB N[11:8] */
+	unsigned char N_mlshft;	/* N[11:8] nibble left-shift value */
+	unsigned char D_reg;	/* reference divider D[6:0]  */
+	unsigned char IP_reg;	/* Loop Filter  */
+} idt_pll_reg_set_t;
+
+/* Clock registers for MUX source configuration */
+typedef struct _idt_src_reg_set_t
+{
+	unsigned char	lreg;		/* SRCx[1:0] or SRCx[2:0] register address (LSB) */
+	unsigned char	lshift;		/* SRCx[1:0] or SRCx[2:0] data shift */
+	unsigned char   lmask;		/* SRCx[1:0] or SRCx[2:0] data mask (width) */
+	unsigned char	mreg;		/* SRCx[2] register address (MSB, only is separated from [1:0]) */
+	unsigned char	mshift;		/* SRCx[2] data shift (MSB, only is separated from [1:0]) */
+} idt_src_reg_set_t;
+
+/* Fixed frequencies table entry */
+typedef struct _idt_freq_ten_t
+{
+	unsigned long	f_out;	/* output frequency Hz */
+	unsigned long 	f_in;	/* input (reference) freqency Hz */
+	unsigned int	n;	/* N (feedback divider) is 12 bits wide in HW */
+	unsigned int	d;	/* D (reference divider) is 7 bits wide in HW */
+	unsigned int	odiv;	/* ODIV, total output divider 7 and 1 bits in HW */
+	
+} idt_freq_ten_t;
+
+typedef struct _idt_drv_info_t
+{
+	struct i2c_client 	*i2c_cl;
+} idt_drv_info_t;
+
+/***************/
+/* STATIC DATA */
+/***************/
+idt_drv_info_t *idt_drv_g;
+
+/* Registers addresses in clock programming tables */
+static idt_pll_reg_set_t idt5v49ee503_pll_regs[IDT_CLK_CFG_NUM][IDT_PLL_NUM] = {
+	/*  N[7:0]  N[11:8]  Nsh  D[6:0] IP */
+	{ { 0x18,   0x1C,    0,   0x10    , 0xC}, /* PLL0 */
+	  { 0x30,   0x34,    0,   0x28    , 0x24}, /* PLL1 */
+	  { 0x48,   0x4C,    0,   0x40    , 0x3C}, /* PLL2 */
+	  { 0x64,   0x34,    4,   0x5C    , 0x58}  /* PLL3 */
+	}, /* CFG0 */
+	{ { 0x19,   0x1D,    0,   0x11    , 0xD}, /* PLL0 */
+	  { 0x31,   0x35,    0,   0x29    , 0x25}, /* PLL1 */
+	  { 0x49,   0x4D,    0,   0x41    , 0x3D}, /* PLL2 */
+	  { 0x65,   0x35,    4,   0x5D    , 0x59}  /* PLL3 */
+	}, /* CFG1 */
+	{ { 0x1A,   0x1E,    0,   0x12    , 0xE}, /* PLL0 */
+	  { 0x32,   0x36,    0,   0x2A    , 0x26}, /* PLL1 */
+	  { 0x4A,   0x4E,    0,   0x42    , 0x3E}, /* PLL2 */
+	  { 0x66,   0x36,    4,   0x5E    , 0x5A }  /* PLL3 */
+	}, /* CFG2 */
+	{ { 0x1B,   0x1F,    0,   0x13    , 0xF}, /* PLL0 */
+	  { 0x33,   0x37,    0,   0x2B    , 0x27}, /* PLL1 */
+	  { 0x4B,   0x4F,    0,   0x43    , 0x3F }, /* PLL2 */
+	  { 0x67,   0x37,    4,   0x5F    , 0x5B}  /* PLL3 */
+	}, /* CFG3 */
+	{ { 0x16,   0x20,    0,   0x14    , 0xA}, /* PLL0 */
+	  { 0x2E,   0x38,    0,   0x2C    , 0x22}, /* PLL1 */
+	  { 0x46,   0x50,    0,   0x44    , 0x3A}, /* PLL2 */
+	  { 0x62,   0x38,    4,   0x60    , 0x56}  /* PLL3 */
+	}, /* CFG4 */
+	{ { 0x17,   0x21,    0,   0x15    , 0xB}, /* PLL0 */
+	  { 0x2F,   0x39,    0,   0x2D    , 0x23}, /* PLL1 */
+	  { 0x47,   0x51,    0,   0x45    , 0x3B}, /* PLL2 */
+	  { 0x63,   0x39,    4,   0x61    , 0x57}  /* PLL3 */
+	}  /* CFG5 */
+};
+
+/* register addresses for output dividers */
+static unsigned int idt5v49ee503_div_regs[IDT_CLK_CFG_NUM][IDT_OUT_DIV_NUM] = {
+	/* DIV1  DIV2  DIV3  DIV6 */
+	{  0x88, 0x90, 0x94, 0xA8 }, /* CFG0 */
+	{  0x89, 0x91, 0x95, 0xA9 }, /* CFG1 */
+	{  0x8A, 0x92, 0x96, 0xAA }, /* CFG2 */
+	{  0x8B, 0x93, 0x97, 0xAB }, /* CFG3 */
+	{  0x8C, 0x8E, 0x98, 0xA6 }, /* CFG4 */
+	{  0x8D, 0x8F, 0x99, 0xA7 }  /* CFG5 */
+};
+
+/* Registers addresses for source selectors (0xFF - not valid) */
+static idt_src_reg_set_t idt5v49ee503_src_regs[IDT_CLK_CFG_NUM][IDT_CLK_SRC_ID_NUM] = {
+	/*  lreg  lshift  lmask mreg  mshift */
+	{ { 0xC0, 0x0,    0x3,  0xFF, 0x0  }, /* IDT_CLK_SRC_ID_PRIM */
+	  { 0xC0, 0x4,    0x3,  0xFF, 0x0  }, /* IDT_CLK_SRC_ID_0 */
+	  { 0xC0, 0x6,    0x3,  0xC4, 0x0  }, /* IDT_CLK_SRC_ID_1 */
+	  { 0xC4, 0x1,    0x7,  0xFF, 0x0  }, /* IDT_CLK_SRC_ID_2 */
+	  { 0xC4, 0x4,    0x7,  0xFF, 0x0  }, /* IDT_CLK_SRC_ID_3 */
+	  { 0xCC, 0x5,    0x7,  0xFF, 0x0  }, /* IDT_CLK_SRC_ID_6 */
+	}, /* CFG0 */
+	{ { 0xC1, 0x0,    0x3,  0xFF, 0x0  }, /* IDT_CLK_SRC_ID_PRIM */
+	  { 0xC1, 0x4,    0x3,  0xFF, 0x0  }, /* IDT_CLK_SRC_ID_0 */
+	  { 0xC1, 0x6,    0x3,  0xC5, 0x0  }, /* IDT_CLK_SRC_ID_1 */
+	  { 0xC5, 0x1,    0x7,  0xFF, 0x0  }, /* IDT_CLK_SRC_ID_2 */
+	  { 0xC5, 0x4,    0x7,  0xFF, 0x0  }, /* IDT_CLK_SRC_ID_3 */
+	  { 0xCD, 0x5,    0x7,  0xFF, 0x0  }, /* IDT_CLK_SRC_ID_6 */
+	}, /* CFG1 */
+	{ { 0xC2, 0x0,    0x3,  0xFF, 0x0  }, /* IDT_CLK_SRC_ID_PRIM */
+	  { 0xC2, 0x4,    0x3,  0xFF, 0x0  }, /* IDT_CLK_SRC_ID_0 */
+	  { 0xC2, 0x6,    0x3,  0xC6, 0x0  }, /* IDT_CLK_SRC_ID_1 */
+	  { 0xC6, 0x1,    0x7,  0xFF, 0x0  }, /* IDT_CLK_SRC_ID_2 */
+	  { 0xC6, 0x4,    0x7,  0xFF, 0x0  }, /* IDT_CLK_SRC_ID_3 */
+	  { 0xCE, 0x5,    0x7,  0xFF, 0x0  }, /* IDT_CLK_SRC_ID_6 */
+	}, /* CFG2 */
+	{ { 0xC3, 0x0,    0x3,  0xFF, 0x0  }, /* IDT_CLK_SRC_ID_PRIM */
+	  { 0xC3, 0x4,    0x3,  0xFF, 0x0  }, /* IDT_CLK_SRC_ID_0 */
+	  { 0xC3, 0x6,    0x3,  0xC7, 0x0  }, /* IDT_CLK_SRC_ID_1 */
+	  { 0xC7, 0x1,    0x7,  0xFF, 0x0  }, /* IDT_CLK_SRC_ID_2 */
+	  { 0xC7, 0x4,    0x7,  0xFF, 0x0  }, /* IDT_CLK_SRC_ID_3 */
+	  { 0xCF, 0x5,    0x7,  0xFF, 0x0  }, /* IDT_CLK_SRC_ID_6 */
+	}, /* CFG3 */
+	{ { 0xBE, 0x0,    0x3,  0xFF, 0x0  }, /* IDT_CLK_SRC_ID_PRIM */
+	  { 0xBE, 0x4,    0x3,  0xFF, 0x0  }, /* IDT_CLK_SRC_ID_0 */
+	  { 0xBE, 0x6,    0x3,  0xC8, 0x0  }, /* IDT_CLK_SRC_ID_1 */
+	  { 0xC8, 0x1,    0x7,  0xFF, 0x0  }, /* IDT_CLK_SRC_ID_2 */
+	  { 0xC8, 0x4,    0x7,  0xFF, 0x0  }, /* IDT_CLK_SRC_ID_3 */
+	  { 0xCA, 0x5,    0x7,  0xFF, 0x0  }, /* IDT_CLK_SRC_ID_6 */
+	}, /* CFG4 */
+	{ { 0xBF, 0x0,    0x3,  0xFF, 0x0  }, /* IDT_CLK_SRC_ID_PRIM */
+	  { 0xBF, 0x4,    0x3,  0xFF, 0x0  }, /* IDT_CLK_SRC_ID_0 */
+	  { 0xBF, 0x6,    0x3,  0xC9, 0x0  }, /* IDT_CLK_SRC_ID_1 */
+	  { 0xC9, 0x1,    0x7,  0xFF, 0x0  }, /* IDT_CLK_SRC_ID_2 */
+	  { 0xC9, 0x4,    0x7,  0xFF, 0x0  }, /* IDT_CLK_SRC_ID_3 */
+	  { 0xCB, 0x5,    0x7,  0xFF, 0x0  }, /* IDT_CLK_SRC_ID_6 */
+	}  /* CFG5 */
+};
+
+/* The following equation is used for parameters computation:
+   Fout = (Fin * (M/D))/ODIV
+   Where for PLL0:
+	M = 2 * N + A + 1 (for A > 0)
+	M = 2 * N (for A = 0)
+   For PLL1, PLL2, PLL3:
+	M = N
+*/
+/* Supported fixed frequencies table */
+static idt_freq_ten_t idt5v49ee503_freq_tbl[] = {
+	/*f_out      f_in      n    d   odiv */
+	{ 148500000, 25000000, 891, 25,  6},
+	{  64109000, 25000000, 877, 19, 18},
+	{ 108883000, 25000000, 662, 19, 8},
+	{ 160963000, 25000000, 734, 19,  6},
+	{ 136358000, 25000000, 480, 11,  8},
+	{         0,        0,   0,  0,  0},
+};
+
+static idt_output_id_t clock0_out_id = IDT_OUT_ID_2;
+static idt_clock_id_t clock0_pll_id = IDT_PLL_1;
+static idt_output_id_t clock1_out_id = IDT_OUT_ID_3;
+static idt_clock_id_t clock1_pll_id = IDT_PLL_2;
+
+#define FIN 25000000ULL
+static int calc_freq_div(unsigned long long freq, idt_freq_ten_t *entry)
+{
+	unsigned int n, d, odiv;
+	unsigned long long max_diff, diff;
+	uint64_t tmp;
+	uint32_t factor;
+
+	max_diff = freq * 1;
+	do_div(max_diff, 10000);
+	for (odiv = 4; odiv < 256; odiv+=2)
+		for (d = odiv/*1*/; d < 127; d++) {
+			tmp = freq * odiv * d;
+			do_div(tmp, FIN);
+			if (tmp < 1 || tmp > 4095)
+				continue;
+			n = (unsigned int) tmp;
+			/* check if this n gives accurate Fout */
+			tmp = FIN * n;
+			factor = d * odiv;
+			do_div(tmp, factor);
+			if (tmp > freq)
+				diff = tmp - freq;
+			else
+				diff = freq - tmp;
+			
+			if (diff < max_diff) {
+				printk(KERN_DEBUG "dividers found for Fout = %lld. n=%d d=%d odiv %d\n",
+				       freq, n, d, odiv);
+				printk(KERN_DEBUG "diff = %lld. max diff %lld freq %lld tmp %lld\n",
+				       diff, max_diff, freq, tmp);
+				entry->odiv = odiv;
+				entry->d = d;
+				entry->n = n;
+				return 0;
+			}
+		}
+
+	printk("error: can't find dividers for Fout = %lld\n", freq);
+
+	return -1;
+}
+
+/****************************************************************************** 
+   Write I2C register
+   Input:
+ 	driver - driver control structure
+ 	addr   - register address
+ 	val    - register value
+   Output:
+      	NONE
+ 
+   Returns:
+	0 on success or error value
+*******************************************************************************/
+static int idt5v49ee503_write_reg (idt_drv_info_t *idt_drv,
+				   unsigned char  addr,
+				   unsigned char  val)
+{
+ 	unsigned char buf[3] = {0, addr, val}; /* fist byte is command (0) */
+	int rc = i2c_master_send(idt_drv->i2c_cl, buf, 3);
+//	printk("%s: addr %x val %x\n", __func__, addr, val);
+	if (rc != 3) {
+		printk(KERN_ERR "idt: failed to write 0x%x to register 0x%x (rc %d)\n", 
+		       val, addr, rc);
+		return -EIO;
+	}
+	return 0;
+
+} /* end of idt5v49ee503_read_reg */
+
+/****************************************************************************** 
+   Read I2C register
+   Input:
+ 	idt_drv - driver control structure
+ 	addr   - register address
+ 	val    - register value
+   Output:
+      	NONE
+ 
+   Returns:
+	0 on success or error value
+*******************************************************************************/
+static int idt5v49ee503_read_reg (idt_drv_info_t *idt_drv,
+				  unsigned char  addr,
+				  unsigned char  *val)
+{
+
+	int           rval;
+	unsigned char buf[3] = {0, addr, 0}; /* fist byte for WRITE is command (0)
+	                                        or ID byte for READ (ignored) */
+	struct i2c_msg msg[2];
+
+	msg[0].addr = idt_drv->i2c_cl->addr;
+	msg[0].flags = 0;
+	msg[0].buf = buf;
+	msg[0].len = 2;
+
+	msg[1].addr = idt_drv->i2c_cl->addr;
+	msg[1].flags = I2C_M_RD;
+	msg[1].buf = buf;
+	msg[1].len = 2;
+
+	rval = i2c_transfer(idt_drv->i2c_cl->adapter, &msg[0], 2);
+	*val = buf[1];
+	return (rval != 2);
+
+} /* end of idt5v49ee503_read_reg */
+
+/****************************************************************************** 
+   Read, modify and write back I2C register
+   Input:
+ 	idt_drv - driver control structure
+ 	addr   - register address
+ 	fval   - register's field value
+ 	shift  - number of bits to shift the field
+ 	mask   - the field's mask (before shifting)
+   Output:
+      	NONE
+ 
+   Returns:
+	0 on success or error value
+*******************************************************************************/
+static int idt5v49ee503_mod_reg (idt_drv_info_t *idt_drv,
+				 unsigned char  addr,
+				 unsigned char  fval,
+				 unsigned char  shift,
+				 unsigned char	mask)
+{
+	int           rval;
+	unsigned char val = 0;
+
+	if ((rval = idt5v49ee503_read_reg(idt_drv, addr, &val)) != 0)
+		return rval;
+
+	val &= ~(mask << shift); 
+	val |= (fval & mask) <<	shift;
+
+	return idt5v49ee503_write_reg(idt_drv, addr, val);
+
+} /* end of idt5v49ee503_mod_reg */
+
+
+/****************************************************************************** 
+   Connect PLL to specific output pin and output divider
+   Input:
+ 	idt_drv - driver control structure
+ 	clock_cfg - clock configuration
+   Output:
+      	NONE
+ 
+   Returns:
+	Output divider ID
+*******************************************************************************/
+static idt_out_div_t idt5v49ee503_setup_output (idt_drv_info_t	*idt_drv,
+						idt_clock_cfg_t	*clock_cfg)
+{
+	idt_clock_src_id_t	clk_src_id[2]; /* maximum 2 clock sources to config */
+	idt_clock_src_t		clk_src[2];
+	idt_out_div_t		divider; /* currently only one level division support */
+	idt_src_reg_set_t	*reg_set = idt5v49ee503_src_regs[clock_cfg->cfg_id];
+	int			i;
+
+	if (idt_drv == NULL)
+		return IDT_OUT_DIV_INV;
+
+	/* second source MUX will usually not be used (excepting OUT0) */
+	clk_src_id[1] = IDT_OUT_ID_INV;
+	
+	/* find out MUX ID and divider based on output pin - see datasheet page 2 */
+	switch (clock_cfg->out_id)
+	{
+	case IDT_OUT_ID_0:
+		clk_src_id[0] = IDT_CLK_SRC_ID_1; 
+		clk_src_id[1] = IDT_CLK_SRC_ID_0;
+		clk_src[1] = IDT_CLK_SRC_DIV1; /* always use DIV1 for OUT0 */
+		divider = IDT_OUT_DIV1;
+		break;
+
+	case IDT_OUT_ID_1:
+		clk_src_id[0] = IDT_CLK_SRC_ID_1;
+		divider = IDT_OUT_DIV1;
+		break;
+
+	case IDT_OUT_ID_2:
+		clk_src_id[0] = IDT_CLK_SRC_ID_2;
+		divider = IDT_OUT_DIV2;
+		break;
+
+	case IDT_OUT_ID_3:
+		clk_src_id[0] = IDT_CLK_SRC_ID_3;
+		divider = IDT_OUT_DIV3;
+		break;
+
+	case IDT_OUT_ID_6:
+		if (clock_cfg->clock_id != IDT_PLL_1)
+			return IDT_OUT_DIV_INV;
+		clk_src_id[0] = IDT_CLK_SRC_ID_6;
+		divider = IDT_OUT_DIV6;
+		break;
+	default:
+		return IDT_OUT_DIV_INV;
+
+	} /* switch(clock_cfg->out_id) */
+
+	/* find out MUX input selection based on PLL ID */
+	switch (clock_cfg->clock_id)
+	{
+	case IDT_PLL_0:
+		clk_src[0] = IDT_CLK_SRC_PLL0;
+		break;
+
+	case IDT_PLL_1:
+		clk_src[0] = IDT_CLK_SRC_PLL1;
+		break;
+
+	case IDT_PLL_2:
+		clk_src[0] = IDT_CLK_SRC_PLL2;
+		break;
+
+	case IDT_PLL_3:
+		clk_src[0] = IDT_CLK_SRC_PLL3;
+		break;
+
+	default:
+		return IDT_OUT_DIV_INV;
+
+	} /* switch (clock_cfg->clock_id) */
+
+	/* Write SRCx MUX configuration to clock registers */
+	for (i = 0; i < 2; i++)
+	{		
+		if (clk_src_id[i] == IDT_OUT_ID_INV)
+			continue;
+
+		if (idt5v49ee503_mod_reg(idt_drv,
+				         reg_set[clk_src_id[i]].lreg,
+				         clk_src[i],
+				         reg_set[clk_src_id[i]].lshift,
+				         reg_set[clk_src_id[i]].lmask) != 0)
+			return IDT_OUT_DIV_INV;
+
+		/* MSB bit is located in other than LSB register? */
+		if (reg_set[clk_src_id[i]].mreg != 0xFF)
+		{
+			if (idt5v49ee503_mod_reg(idt_drv,
+						 reg_set[clk_src_id[i]].mreg,
+						 clk_src[i],
+						 reg_set[clk_src_id[i]].mshift,
+						 0x1) != 0)
+				return IDT_OUT_DIV_INV;
+		}
+	}	
+
+	/* Configure primary clock source */
+	if (idt5v49ee503_mod_reg(idt_drv,
+				 reg_set[IDT_CLK_SRC_ID_PRIM].lreg,
+				 clock_cfg->clk_src_clkin != 0 ? 
+					IDT_PRM_CLK_CLKIN : IDT_PRM_CLK_CRYSTAL,
+				 reg_set[IDT_CLK_SRC_ID_PRIM].lshift,
+				 reg_set[IDT_CLK_SRC_ID_PRIM].lmask) != 0)
+		return IDT_OUT_DIV_INV;
+	return divider;
+
+} /* end of idt5v49ee503_setup_output */
+
+/****************************************************************************** 
+   Write PLL parameters to clock HW according to specific frequency index
+   Input:
+ 	freq_idx  - index to fixed frequencies table
+ 	clock_cfg - clock configuration
+   Output:
+      	NONE
+ 
+   Returns:
+	0	- success,
+*******************************************************************************/
+static int idt5v49ee503_write_cfg (idt_drv_info_t *idt_drv,
+				   idt_freq_ten_t *freq,
+				   idt_clock_cfg_t *clock_cfg)
+{
+	idt_out_div_t		div_id; /* output divider */
+	idt_pll_reg_set_t 	*pll_regs = idt5v49ee503_pll_regs[clock_cfg->cfg_id];
+	unsigned int 		*div_regs = idt5v49ee503_div_regs[clock_cfg->cfg_id];
+	unsigned int		div_val, n_lsb, n_msb = 0;
+
+
+	/* Setup SRCx MUXes and primary clock source first */
+	if ((div_id = idt5v49ee503_setup_output(idt_drv, clock_cfg)) == IDT_OUT_DIV_INV)
+		return -EIO;
+	/* Configure clock parameters */
+	if (idt5v49ee503_write_reg(idt_drv,
+				 pll_regs[clock_cfg->clock_id].D_reg,
+				 freq->d) != 0)
+		return -EIO;
+
+	if (clock_cfg->clock_id == IDT_PLL_0)
+	{ /* M = 2 * N (A=0) */
+		n_lsb = (freq->n >> 1) & 0xFF;
+		n_msb = (freq->n >> 9) & 0xF;
+	} /* M = 2 * N (A=0) */
+	else
+	{ /* M =  N */
+		n_lsb = freq->n & 0xFF;
+		n_msb = (freq->n >> 8) & 0xF;
+	} /* M =  N */
+
+	if (idt5v49ee503_write_reg(idt_drv,
+				   pll_regs[clock_cfg->clock_id].N_lreg,
+				   n_lsb) != 0)
+		return -EIO;
+
+	/* MSP part of N parameter shares register space with others */
+	if (idt5v49ee503_mod_reg(idt_drv,
+				 pll_regs[clock_cfg->clock_id].N_mreg,
+				 n_msb,
+				 pll_regs[clock_cfg->clock_id].N_mlshft,
+				 0xF) != 0)
+		return -EIO;
+
+	/* Configure output divider */
+	if (freq->odiv == 1)
+		div_val = 0xFF;
+	else if (freq->odiv == 2)
+		div_val = 0;
+	else /* ODIV = (Q[6:0] + 2) * 2 */
+		div_val = ((freq->odiv >> 1) - 2) | 0x80; 
+
+	if (idt5v49ee503_write_reg(idt_drv,
+				   div_regs[div_id],
+				   div_val) != 0)
+		return -EIO;
+
+	/* Configure loop filter */
+	if (idt5v49ee503_write_reg(idt_drv,
+				   pll_regs[clock_cfg->clock_id].IP_reg,
+				   0x10) != 0)
+		return -EIO;
+
+	return 0;
+
+} /* end of idt5v49ee503_write_cfg */
+
+/****************************************************************************** 
+   activate specific clock configuration
+   Input:
+	idt_drv	    - driver data
+	clock_cfg   - clock configuration
+   Output:
+      	NONE
+ 
+   Returns:
+ 	0      - success,
+ 	-EPERM - the clock is not initialized
+ 	-EINVAL - bad configuration ID
+*******************************************************************************/
+int idt5v49ee503_set_act_cfg (idt_drv_info_t *idt_drv, idt_clock_cfg_t *clock_cfg)
+{
+	if (clock_cfg->cfg_id >= IDT_CLK_CFG_NUM)
+		return -EINVAL;
+
+	/* Activate configuration */
+	return idt5v49ee503_write_reg(idt_drv,
+				      IDT5V49EE503_CFG_SEL_REG,
+				      clock_cfg->cfg_id);
+
+} /* end of idt5v49ee503_act_cfg */
+
+/****************************************************************************** 
+   Save all clock registers to EEPROM
+   Input:
+ 	idt_drv - driver data
+   Output:
+      	NONE
+ 
+   Returns:
+ 	0      - success,
+*******************************************************************************/
+int idt5v49ee503_save_regs (idt_drv_info_t *idt_drv)
+{
+	/* PROGSAVE command (1) */
+	char		cmd = 0x1;
+
+	return i2c_master_send(idt_drv->i2c_cl, &cmd, 1);
+
+} /* end of idt5v49ee503_save_regs */
+
+/****************************************************************************** 
+   Save all clock registers to EEPROM
+   Input:
+ 	idt_drv - driver data
+   Output:
+      	NONE
+ 
+   Returns:
+ 	0      - success,
+*******************************************************************************/
+int idt5v49ee503_restore_regs (idt_drv_info_t *idt_drv)
+{
+	/* PROGRESTORE command (2) */
+	char		cmd = 0x2;
+
+	return i2c_master_send(idt_drv->i2c_cl, &cmd, 1);
+
+} /* end of idt5v49ee503_save_regs */
+
+/****************************************************************************** 
+   Enable or disable PLL
+   Input:
+ 	idt_drv  - driver data
+ 	pll_id  - PLL ID
+ 	enable  - 1 for enable, 0 for disable
+   Output:
+      	NONE
+ 
+   Returns:
+ 	0      - success,
+*******************************************************************************/
+int idt5v49ee503_pll_enable (idt_drv_info_t *idt_drv,
+			     idt_clock_id_t pll_id,
+			     int            enable)
+{
+
+	/* Enable specific PLL */
+	return idt5v49ee503_mod_reg(idt_drv,
+				    IDT5V49EE503_PLL_SUSPEND_REG,
+				    enable != 0 ? 1 : 0,
+				    pll_id,
+				    0x1);
+
+} /* end of idt5v49ee503_pll_enable */
+
+/****************************************************************************** 
+   Enable or disable clock Output
+   Input:
+ 	idt_drv  - driver data
+ 	out_id  - output ID
+ 	enable  - 1 for enable, 0 for disable
+   Output:
+      	NONE
+ 
+   Returns:
+ 	0      - success,
+*******************************************************************************/
+int idt5v49ee503_out_enable (idt_drv_info_t *idt_drv,
+			     idt_output_id_t out_id,
+			     int             enable)
+{
+	/* Enable specific PLL */
+	return idt5v49ee503_mod_reg(idt_drv,
+				    IDT5V49EE503_OUT_SUSPEND_REG,
+				    enable != 0 ? 1 : 0,
+				    out_id,
+				    0x1);
+
+} /* end of idt5v49ee503_out_enable */
+
+/****************************************************************************** 
+   Enable or disable clock Output
+   Input:
+ 	idr_drv - driver data
+ 	sw_ctl  - 1 - SW control, 0 - HW control
+   Output:
+      	NONE
+ 
+   Returns:
+ 	0      - success,
+*******************************************************************************/
+int idt5v49ee503_sw_ctrl (idt_drv_info_t *idt_drv,
+			  int  sw_ctl)
+{
+	/* Enable specific PLL */
+	return idt5v49ee503_write_reg(idt_drv,
+				      IDT5V49EE503_SW_MODE_CTL_REG,
+				      sw_ctl != 0 ? 1 : 0);
+
+} /* end of idt5v49ee503_sw_ctrl */
+
+/****************************************************************************** 
+   Program clock with specific frequency from known fixed freqiencies
+   Input:
+ 	freq_set - frequency to be programmed
+ 		(only a number of fixed freqiencies is supported)
+ 	clock_cfg - clock configuration
+   Output:
+      	NONE
+ 
+   Returns:
+	0	- success,
+	-EINVAL	- unsupported frequency
+*******************************************************************************/
+int idt5v49ee503_set (idt_drv_info_t *idt_drv,
+		      unsigned long	freq_set, 
+		      idt_clock_cfg_t	*clock_cfg)
+{
+	int	i;
+	int	rval;
+
+	for (i = 0; idt5v49ee503_freq_tbl[i].f_out != 0; i++)
+	{
+		if (idt5v49ee503_freq_tbl[i].f_out == freq_set)
+		{
+
+			rval = idt5v49ee503_write_cfg(idt_drv, &idt5v49ee503_freq_tbl[i], clock_cfg);
+
+			if ((rval == 0) && (clock_cfg->cfg_act))
+			{ /* activate clock and config */
+
+				rval = idt5v49ee503_set_act_cfg(idt_drv, clock_cfg);
+
+				/* enable PLL core */
+				if (rval == 0)
+				{	
+					rval = idt5v49ee503_pll_enable(idt_drv,
+								       clock_cfg->clock_id,
+								       1);
+				}
+				/* enable clock output pin */
+				if (rval == 0)
+				{	
+					rval = idt5v49ee503_out_enable(idt_drv,
+								       clock_cfg->out_id,
+								       1);
+				}
+				/* use SW control (i.e. values stored in clock registers) */
+				return idt5v49ee503_sw_ctrl(idt_drv, 1);
+
+			} /* activate clock and config */
+		}
+	}
+
+	return -EINVAL;
+
+} /* end of idt5v49ee503_set */
+#if 1
+/****************************************************************************** 
+   Program clock with specific frequency
+   Input:
+ 	freq - frequency to be programmed
+ 	clock_cfg - clock configuration
+   Output:
+      	NONE
+ 
+   Returns:
+	0	- success,
+	-EINVAL	- unsupported frequency
+*******************************************************************************/
+int idt5v49ee503_set_freq (idt_drv_info_t *idt_drv,
+			   unsigned long long	freq, 
+			   idt_clock_cfg_t	*clock_cfg)
+{
+	int	rval;
+	idt_freq_ten_t entry;
+	
+	if (calc_freq_div(freq, &entry) < -1)
+		return -1;
+
+	rval = idt5v49ee503_write_cfg(idt_drv, &entry, clock_cfg);
+
+	if ((rval == 0) && (clock_cfg->cfg_act))
+	{ /* activate clock and config */
+		
+		rval = idt5v49ee503_set_act_cfg(idt_drv, clock_cfg);
+		/* enable PLL core */
+		if (rval == 0)
+		{	
+			rval = idt5v49ee503_pll_enable(idt_drv,
+						       clock_cfg->clock_id,
+						       1);
+		}
+				/* enable clock output pin */
+		if (rval == 0)
+		{	
+			rval = idt5v49ee503_out_enable(idt_drv,
+						       clock_cfg->out_id,
+						       1);
+		}
+		/* use SW control (i.e. values stored in clock registers) */
+		return idt5v49ee503_sw_ctrl(idt_drv, 1);
+		
+	} /* activate clock and config */
+
+	return -EINVAL;
+
+} /* end of idt5v49ee503_set */
+#endif
+/*
+ * Generic counter attributes
+ */
+static ssize_t idt5v49ee503_show(struct device *dev, struct device_attribute *attr,
+			   char *buf)
+{
+	dev_dbg(dev, "idt5v49ee503_show() called on %s\n", attr->attr.name);
+
+	/* Format the output string and return # of bytes */
+	return sprintf(buf, "%d\n", 0);
+}
+
+static ssize_t idt5v49ee503_store(struct device *dev, struct device_attribute *attr,
+			    const char *buf, size_t count)
+{
+	struct i2c_client *client = to_i2c_client(dev);
+	idt_drv_info_t *idt_drv = i2c_get_clientdata(client);
+	idt_clock_cfg_t *cfg;
+	char *endp;
+	u64 val;
+
+	dev_dbg(dev, "idt5v49ee503_store() called on %s\n", attr->attr.name);
+
+	/* Decode input */
+	val = simple_strtoull(buf, &endp, 0);
+	if (buf == endp) {
+		dev_dbg(dev, "input string not a number\n");
+		return -EINVAL;
+	}
+	cfg = kzalloc(sizeof(idt_clock_cfg_t), GFP_KERNEL);
+	if (cfg == NULL) {
+		dev_dbg(dev, "failed to allocate memory\n");
+		return -EINVAL;
+	}
+	cfg->clk_src_clkin = IDT_PRM_CLK_CRYSTAL;
+	cfg->clock_id = clock0_pll_id;
+	cfg->out_id = clock0_out_id;
+	cfg->cfg_id = IDT_CLK_CFG_0;
+	cfg->cfg_act = 1;
+		
+	if (idt5v49ee503_set_freq(idt_drv, val, cfg)) {
+		dev_err(dev, "failed to set clock to %llu\n", val);
+		count = -EIO;
+		goto exit;
+	}
+	return count;
+exit:
+	kfree(cfg);
+	return count;
+}
+
+static ssize_t idt5v49ee503_store2(struct device *dev, struct device_attribute *attr,
+			    const char *buf, size_t count)
+{
+	struct i2c_client *client = to_i2c_client(dev);
+	idt_drv_info_t *idt_drv = i2c_get_clientdata(client);
+	idt_clock_cfg_t *cfg;
+	char *endp;
+	u64 val;
+
+	dev_dbg(dev, "idt5v49ee503_store() called on %s\n", attr->attr.name);
+
+	/* Decode input */
+	val = simple_strtoull(buf, &endp, 0);
+	if (buf == endp) {
+		dev_dbg(dev, "input string not a number\n");
+		return -EINVAL;
+	}
+	cfg = kzalloc(sizeof(idt_clock_cfg_t), GFP_KERNEL);
+	if (cfg == NULL) {
+		dev_dbg(dev, "failed to allocate memory\n");
+		return -EINVAL;
+	}
+	cfg->clk_src_clkin = IDT_PRM_CLK_CRYSTAL;
+	cfg->clock_id = clock1_pll_id;
+	cfg->out_id = clock1_out_id;
+	cfg->cfg_id = IDT_CLK_CFG_0;
+	cfg->cfg_act = 1;
+		
+	if (idt5v49ee503_set_freq(idt_drv, val, cfg)) {
+		dev_err(dev, "failed to set clock to %llu\n", val);
+		count = -EIO;
+		goto exit;
+	}
+	return count;
+exit:
+	kfree(cfg);
+	return count;
+}
+
+static ssize_t idt5v49ee503_storef(struct device *dev, struct device_attribute *attr,
+			    const char *buf, size_t count)
+{
+	struct i2c_client *client = to_i2c_client(dev);
+	idt_drv_info_t *idt_drv = i2c_get_clientdata(client);
+	idt_clock_cfg_t *cfg;
+	char *endp;
+	u64 val;
+
+	dev_dbg(dev, "idt5v49ee503_store() called on %s\n", attr->attr.name);
+
+	/* Decode input */
+	val = simple_strtoull(buf, &endp, 0);
+	if (buf == endp) {
+		dev_dbg(dev, "input string not a number\n");
+		return -EINVAL;
+	}
+	cfg = kzalloc(sizeof(idt_clock_cfg_t), GFP_KERNEL);
+	if (cfg == NULL) {
+		dev_dbg(dev, "failed to allocate memory\n");
+		return -EINVAL;
+	}
+	cfg->clk_src_clkin = IDT_PRM_CLK_CRYSTAL;
+	cfg->clock_id = clock0_pll_id;
+	cfg->out_id = clock0_out_id;
+	cfg->cfg_id = IDT_CLK_CFG_0;
+	cfg->cfg_act = 1;
+		
+	if (idt5v49ee503_set(idt_drv, val, cfg)) {
+		dev_err(dev, "failed to set clock to %llu\n", val);
+		return -EIO;
+	}
+
+	return count;
+}
+unsigned char  reg_addr;
+static ssize_t idt5v49ee503_store_reg(struct device *dev, struct device_attribute *attr,
+			    const char *buf, size_t count)
+{
+	char *endp;
+	u64 val;
+
+	dev_dbg(dev, "idt5v49ee503_store_reg() called on %s\n", attr->attr.name);
+
+	/* Decode input */
+	val = simple_strtoull(buf, &endp, 0);
+	if (buf == endp) {
+		dev_dbg(dev, "input string not a number\n");
+		return -EINVAL;
+	}
+	reg_addr = val;
+
+	return count;
+}
+static ssize_t idt5v49ee503_show_reg(struct device *dev, struct device_attribute *attr,
+			   char *buf)
+{
+	dev_dbg(dev, "idt5v49ee503_show_reg() called on %s\n", attr->attr.name);
+
+	/* Format the output string and return # of bytes */
+	return sprintf(buf, "%x\n", reg_addr);
+}
+
+static ssize_t idt5v49ee503_store_reg_val(struct device *dev, struct device_attribute *attr,
+			    const char *buf, size_t count)
+{
+	struct i2c_client *client = to_i2c_client(dev);
+	idt_drv_info_t *idt_drv = i2c_get_clientdata(client);
+	char *endp;
+	unsigned int val;
+
+	dev_dbg(dev, "idt5v49ee503_store_reg_val() called on %s\n", attr->attr.name);
+
+	/* Decode input */
+	val = simple_strtoul(buf, &endp, 0);
+	if (buf == endp) {
+		dev_dbg(dev, "input string not a number\n");
+		return -EINVAL;
+	}
+	dev_printk(KERN_INFO, dev, "idt5v49ee503 write 0x%x to register 0x%x \n", val, (unsigned int)reg_addr);
+	idt5v49ee503_write_reg(idt_drv,
+			       reg_addr,
+			       val);
+
+	return count;
+}
+static ssize_t idt5v49ee503_show_reg_val(struct device *dev, struct device_attribute *attr,
+			   char *buf)
+{
+	struct i2c_client *client = to_i2c_client(dev);
+	idt_drv_info_t *idt_drv = i2c_get_clientdata(client);
+	int           rval;
+	unsigned char val = 0;
+
+	dev_dbg(dev, "idt5v49ee503_show_reg_val() called on %s\n", attr->attr.name);
+	dev_printk(KERN_INFO, dev, "idt5v49ee503 read from register 0x%x \n", (unsigned int)reg_addr);
+	if ((rval = idt5v49ee503_read_reg(idt_drv, reg_addr, &val)) != 0)
+                return rval;
+
+	/* Format the output string and return # of bytes */
+	return sprintf(buf, "%x\n", val);
+}
+
+/*
+ * Simple register attributes
+ */
+
+static DEVICE_ATTR(clk0, S_IRUGO | S_IWUSR, idt5v49ee503_show, idt5v49ee503_store);
+static DEVICE_ATTR(clk1, S_IRUGO | S_IWUSR, idt5v49ee503_show, idt5v49ee503_store2);
+static DEVICE_ATTR(clkf, S_IRUGO | S_IWUSR, idt5v49ee503_show, idt5v49ee503_storef);
+static DEVICE_ATTR(reg, S_IRUGO | S_IWUSR, idt5v49ee503_show_reg, idt5v49ee503_store_reg);
+static DEVICE_ATTR(val, S_IRUGO | S_IWUSR, idt5v49ee503_show_reg_val, idt5v49ee503_store_reg_val);
+
+static const struct attribute_group idt5v49ee503_group = {
+	.attrs = (struct attribute *[]) {
+		&dev_attr_clk0.attr,
+		&dev_attr_clk1.attr,
+		&dev_attr_clkf.attr,
+		&dev_attr_reg.attr,
+		&dev_attr_val.attr,
+		NULL,
+	},
+};
+
+static void  idt_clk_enable(struct clk *clk)
+{
+	idt_clock_id_t pll_id;
+	if (clk->flags == 0)
+		pll_id = clock0_pll_id;
+	else
+		pll_id = clock1_pll_id;
+		
+	idt5v49ee503_pll_enable(idt_drv_g, pll_id , 1);
+
+	return;
+}
+
+static void  idt_clk_disable(struct clk *clk)
+{
+	idt_clock_id_t pll_id;
+
+	if (clk->flags == 0)
+		pll_id = clock0_pll_id;
+	else
+		pll_id = clock1_pll_id;
+		
+	idt5v49ee503_pll_enable(idt_drv_g, pll_id , 0);
+
+	return;
+}
+static unsigned long idt_clk_getrate(struct clk *clk)
+{
+	return *(clk->rate);
+}
+
+static int idt_clk_setrate(struct clk *clk, unsigned long rate)
+{
+	idt_clock_cfg_t *cfg;
+	idt_clock_id_t pll_id;
+	idt_output_id_t out_id;
+	int rc = 0;
+
+	if (clk->flags == 0) {
+		pll_id = clock0_pll_id;
+		out_id = clock0_out_id;
+	} else {
+		pll_id = clock1_pll_id;
+		out_id = clock1_out_id;
+	}
+
+	cfg = kzalloc(sizeof(idt_clock_cfg_t), GFP_KERNEL);
+	if (cfg == NULL) {
+		printk("idt clk: failed to allocate memory\n");
+		return -EINVAL;
+	}
+	cfg->clk_src_clkin = IDT_PRM_CLK_CRYSTAL;
+	cfg->clock_id = pll_id;
+	cfg->out_id = out_id;
+	cfg->cfg_id = IDT_CLK_CFG_0;
+	cfg->cfg_act = 1;
+	printk("set clk %d to %lu\n", clk->flags, rate);	
+	if (idt5v49ee503_set_freq(idt_drv_g, rate, cfg)) {
+		printk("idt clk: failed to set clock to %lu\n", rate);
+		rc = -EIO;
+	} else
+		*(clk->rate) = rate;
+	kfree(cfg);
+	return rc;
+}
+
+const struct clkops idt_clk_ops = {
+	.enable		= idt_clk_enable,
+	.disable	= idt_clk_disable,
+	.setrate	= idt_clk_setrate,
+	.getrate	= idt_clk_getrate,
+};
+static unsigned long idt_clk0_rate = 0;
+static unsigned long idt_clk1_rate = 0;
+
+static struct clk idt_clk0 = {
+	.ops	= &idt_clk_ops,
+	.flags	= 0,
+	.rate	= &idt_clk0_rate,
+};
+
+static struct clk idt_clk1 = {
+	.ops	= &idt_clk_ops,
+	.flags	= 1,
+	.rate	= &idt_clk1_rate,
+};
+
+static struct clk_lookup idt_clocks[] = {
+	{
+		.con_id = "IDT_CLK0",
+		.clk	= &idt_clk0,
+	},
+	{
+		.con_id = "IDT_CLK1",
+		.clk	= &idt_clk1,
+	},
+};
+
+/*
+ * Called when a idt5v49ee503 device is matched with this driver
+ */
+static int idt5v49ee503_probe(struct i2c_client *client,
+			const struct i2c_device_id *id)
+{
+	idt_drv_info_t *idt_drv;
+	struct idt_data *data;
+	int i;
+	int rc;
+
+	if (!i2c_check_functionality(client->adapter,
+				     I2C_FUNC_SMBUS_I2C_BLOCK)) {
+		dev_err(&client->dev, "i2c bus does not support the idt5v49ee503\n");
+		rc = -ENODEV;
+		goto exit;
+	}
+	idt_drv = kzalloc(sizeof(idt_drv_info_t), GFP_KERNEL);
+	
+	if (idt_drv == NULL)
+		return -ENOMEM;
+	idt_drv_g = idt_drv;
+	idt_drv->i2c_cl = client;
+	i2c_set_clientdata(client, idt_drv);
+
+	/* disable all pll's by default */
+	idt5v49ee503_write_reg(idt_drv,
+			       IDT5V49EE503_PLL_SUSPEND_REG,
+			       0);
+	idt5v49ee503_write_reg(idt_drv,
+			       IDT5V49EE503_OUT_ENA_REG,
+			       0);
+	idt5v49ee503_write_reg(idt_drv,
+			       IDT5V49EE503_OUT_SUSPEND_REG,
+			       0);
+
+
+	rc = sysfs_create_group(&client->dev.kobj, &idt5v49ee503_group);
+	if (rc)
+		goto free;
+
+	data = client->dev.platform_data;
+	if (data) {
+		if (data->clock0_enable) {
+			clock0_out_id = data->clock0_out_id;
+			clock0_pll_id = data->clock0_pll_id;
+			clkdev_add(&idt_clocks[0]);
+		}
+		if (data->clock1_enable) {
+			clock1_out_id = data->clock1_out_id;
+			clock1_pll_id = data->clock1_pll_id;
+			clkdev_add(&idt_clocks[1]);
+		}
+	} else /* if no platform data provided, enable two clocks using the default configuration */
+		for (i = 0; i < ARRAY_SIZE(idt_clocks); i++)
+			clkdev_add(&idt_clocks[i]);
+
+	return rc;
+ free:
+	kfree(idt_drv);
+ exit:
+	return rc;
+}
+
+static int idt5v49ee503_remove(struct i2c_client *client)
+{
+	sysfs_remove_group(&client->dev.kobj, &idt5v49ee503_group);
+	return 0;
+}
+
+static const struct i2c_device_id idt5v49ee503_id[] = {
+	{ "idt5v49ee503", IDT5V49EE503_BUS_ADDR },
+	{ }
+};
+MODULE_DEVICE_TABLE(i2c, idt5v49ee503_id);
+
+static struct i2c_driver idt5v49ee503_driver = {
+	.driver = {
+		.name = "idt5v49ee503",
+	},
+	.probe = idt5v49ee503_probe,
+	.remove = idt5v49ee503_remove,
+	.id_table = idt5v49ee503_id,
+};
+
+static int __init idt5v49ee503_i2c_init(void)
+{
+	return i2c_add_driver(&idt5v49ee503_driver);
+}
+
+static void __exit idt5v49ee503_i2c_exit(void)
+{
+	i2c_del_driver(&idt5v49ee503_driver);
+}
+
+MODULE_AUTHOR("kostap <kostap@gandalf602.il.marvell.com>");
+MODULE_DESCRIPTION("IDT5V49EE503 I2C clock generator driver");
+MODULE_LICENSE("GPL");
+
+module_init(idt5v49ee503_i2c_init);
+module_exit(idt5v49ee503_i2c_exit);
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/cpuidle.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/cpuidle.c
@@ -0,0 +1,92 @@
+/*
+ * arch/arm/mach-dove/cpuidle.c
+ *
+ * CPU idle implementation for Marvell Dove SoCs
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/cpuidle.h>
+#include <asm/io.h>
+#include <asm/proc-fns.h>
+#include <mach/pm.h>
+
+#define DOVE_IDLE_STATES	2
+
+struct cpuidle_driver dove_idle_driver = {
+	.name =         "dove_idle",
+	.owner =        THIS_MODULE,
+};
+
+DEFINE_PER_CPU(struct cpuidle_device, dove_cpuidle_device);
+
+/* Actual code that puts the SoC in different idle states */
+static int dove_enter_idle(struct cpuidle_device *dev,
+			       struct cpuidle_state *state)
+{
+	struct timeval before, after;
+	int idle_time;
+
+	local_irq_disable();
+	do_gettimeofday(&before);
+	if (state == &dev->states[0]) {
+		/* Wait for interrupt state */
+		cpu_do_idle();
+	}
+	else if (state == &dev->states[1]) {
+		/* Deep Idle or Ebook depending on LCD status */
+		dove_pm_cpuidle_deepidle();
+		//cpu_do_idle();
+	}
+	do_gettimeofday(&after);
+	local_irq_enable();
+	idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +
+			(after.tv_usec - before.tv_usec);
+	return idle_time;
+}
+extern int pm_disable;
+/* 
+ * Register Dove IDLE states
+ */
+int dove_init_cpuidle(void)
+{
+	struct cpuidle_device *device;
+
+	cpuidle_register_driver(&dove_idle_driver);
+	device = &per_cpu(dove_cpuidle_device, smp_processor_id());
+	device->state_count = DOVE_IDLE_STATES;
+
+	/* Wait for interrupt state */
+	device->states[0].enter = dove_enter_idle;
+	device->states[0].exit_latency = 1;		/* Few CPU clock cycles */
+	device->states[0].target_residency = 1000;
+	device->states[0].flags = CPUIDLE_FLAG_TIME_VALID;
+	strcpy(device->states[0].name, "WFI");
+	strcpy(device->states[0].desc, "Wait for interrupt");
+
+	/* Deep Idle Mode (eBook if LCD is OFF) */
+	device->states[1].enter = dove_enter_idle;
+	device->states[1].exit_latency = 300;		/* 300us regulator powerup delay */
+	device->states[1].target_residency = 10000;
+	device->states[1].flags = CPUIDLE_FLAG_TIME_VALID;
+	strcpy(device->states[1].name, "DEEP IDLE");
+	strcpy(device->states[1].desc, "Deep Idle (eBook if LCD is OFF)");
+
+	if (pm_disable)
+		return 0;
+
+	if (cpuidle_register_device(device)) {
+		printk(KERN_ERR "dove_init_cpuidle: Failed registering\n");
+		return -EIO;
+	}
+
+	return 0;
+}
+
+device_initcall(dove_init_cpuidle);
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/avng_mpp.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/avng_mpp.c
@@ -0,0 +1,294 @@
+/*
+ * arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_mpp/mv_mpp.c
+ *
+ * Marvell Orion SoC MPP handling
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/bitops.h>
+#include <linux/sysdev.h>
+#include <linux/platform_device.h>
+#include <asm/gpio.h>
+#include <linux/delay.h>
+
+
+#ifdef CONFIG_MACH_DOVE_RD_AVNG
+#define MPP_Amp_PwrDn		2
+#define MPP_GePhy_PwrDn		2
+#define MPP_STBY_DETECTED	3
+#define MPP_SHDN_DETECTED	4
+#endif
+
+
+/*
+ * /sys/devices/platform/mv_mpp for MPP related hardware specific control
+ *
+ */
+
+#ifdef CONFIG_MACH_DOVE_RD_AVNG
+
+/*
+ * For Avengers
+ *
+ *   /audio_amp_sw
+ *      * used to control the power supplied to audio amplifier
+ *      * is read/write as "on" or "off"
+ *
+ *   /eth_phy_sw
+ *      * used to control the ethernet PHY entering COMA state
+ *      * is read/write as "on" or "off"
+ *
+ *   /standby_detect
+ *      * used to determine if the system is required to stand by immediately
+ *      * is read only as "1" or "0"
+ *
+ *   /shutdown_detect
+ *      * used to determine if the system is required to shut down immediately
+ *      * is read only as "1" or "0"
+ *
+ */
+
+static const char *status_str[2] = { "off", "on" };
+
+static ssize_t store_mpp_powerdown(int pin, const char *buf, size_t count)
+{
+	char state[8];
+	int value;
+
+	if (sscanf(buf, "%3s", state) != 1)
+		return -EINVAL;
+
+	if (strnicmp(state, status_str[0], 3) == 0)
+		value = 1;
+	else if (strnicmp(state, status_str[1], 2) == 0)
+		value = 0;
+	else
+		return -EINVAL;
+
+	gpio_direction_output(pin, value);
+
+	return count;
+}
+
+static ssize_t show_mpp_powerdown(int pin, char *buf)
+{
+	int ret;
+
+	ret = gpio_get_value(pin);
+
+	if (ret < 0)
+		return ret;
+
+	return sprintf(buf, "%s\n", ret ? status_str[0] : status_str[1]);
+}
+
+#define CREATE_DEVICE_ATTR(_name, _pin)					\
+	static ssize_t show_##_name(struct device *dev,			\
+				    struct device_attribute *attr,	\
+				    char *buf)				\
+	{								\
+		return show_mpp_powerdown(_pin, buf);			\
+	}								\
+	static ssize_t store_##_name(struct device *dev,		\
+				     struct device_attribute *attr,	\
+				     const char *buf, size_t count)	\
+	{								\
+		return store_mpp_powerdown(_pin, buf, count);		\
+	}								\
+	static struct device_attribute dev_attr_##_name = {		\
+		.attr = {						\
+			.name = __stringify(_name),			\
+			.mode = 0644,					\
+			.owner = THIS_MODULE },				\
+		.show   = show_##_name,					\
+		.store  = store_##_name,				\
+	}
+
+CREATE_DEVICE_ATTR(eth_phy_sw, MPP_GePhy_PwrDn);
+CREATE_DEVICE_ATTR(audio_amp_sw, MPP_Amp_PwrDn);
+
+static ssize_t show_standby_detect(struct device *dev,
+			struct device_attribute *attr, char *buf)
+{
+	return sprintf(buf, "%d\n",
+			gpio_get_value(MPP_STBY_DETECTED));
+}
+
+static DEVICE_ATTR(standby_detect, S_IRUSR, show_standby_detect, NULL);
+
+static ssize_t show_shutdown_detect(struct device *dev,
+			struct device_attribute *attr, char *buf)
+{
+	return sprintf(buf, "%d\n",
+			gpio_get_value(MPP_SHDN_DETECTED));
+}
+
+static DEVICE_ATTR(shutdown_detect, S_IRUSR, show_shutdown_detect, NULL);
+
+#endif
+
+#ifdef CONFIG_MV_MPP_TEST
+
+/*
+ * write_mpp_test - write method for "test" file in sysfs
+ */
+static ssize_t write_mpp_test(struct device *dev,
+			struct device_attribute *attr,
+			const char *buf, size_t count)
+{
+	char command[8];
+	int pin, value = 0, ret;
+
+	ret = sscanf(buf, "%7s:%d:%x", command, &pin, &value);
+	if (ret == 2 || ret == 3)
+		goto process_command;
+
+	ret = sscanf(buf, "%6s:%d:%x", command, &pin, &value);
+	if (ret == 2 || ret == 3)
+		goto process_command;
+
+	ret = sscanf(buf, "%5s:%d:%x", command, &pin, &value);
+	if (ret == 2 || ret == 3)
+		goto process_command;
+
+	ret = sscanf(buf, "%4s:%d:%x", command, &pin, &value);
+	if (ret == 2 || ret == 3)
+		goto process_command;
+
+	return -EINVAL;
+
+process_command:
+
+	if (strnicmp(command, "getval", 6) == 0) {
+		ret = gpio_get_value(pin);
+		if (ret >=0)
+			printk("Pin-%d: value=%x\n", pin, ret);
+	} else if (strnicmp(command, "free", 4) == 0) {
+		gpio_free(pin);
+		ret = 0;
+	} else if (strnicmp(command, "request", 7) == 0) {
+		ret = gpio_request(pin, "test");
+	} else if (strnicmp(command, "setin", 5) == 0) {
+		ret = gpio_direction_input(pin);
+	} else if (strnicmp(command, "setout", 6) == 0) {
+		ret = gpio_direction_output(pin, value);
+	} else if (strnicmp(command, "setval", 6) == 0) {
+		gpio_set_value(pin, value);
+		ret = 0;
+	} else {
+		return -EINVAL;
+	}
+
+	if (ret < 0) {
+		printk("%s failed (ret=%d)\n", command, ret);
+		return ret;
+	}
+
+	return count;
+}
+
+static DEVICE_ATTR(test, S_IWUSR, NULL, write_mpp_test);
+
+#endif
+
+static struct attribute *mpp_attributes[] = {
+
+#ifdef CONFIG_MACH_DOVE_RD_AVNG
+	&dev_attr_audio_amp_sw.attr,
+	&dev_attr_eth_phy_sw.attr,
+	&dev_attr_standby_detect.attr,
+	&dev_attr_shutdown_detect.attr,
+#endif
+
+#ifdef CONFIG_MV_MPP_TEST
+	&dev_attr_test.attr,
+#endif
+
+	NULL
+};
+
+static struct attribute_group mpp_attribute_group = {
+	.attrs = mpp_attributes
+};
+
+static int gpio_suspend(struct platform_device *pdev, pm_message_t state)
+{
+	return 0;
+}
+
+static int gpio_resume(struct platform_device *pdev)
+{
+	return 0;
+}
+
+static struct platform_driver mpp_driver = {
+	.suspend	= gpio_suspend,
+	.resume		= gpio_resume,
+	.driver = {
+		   .name = "mv_mpp",
+		   .owner = THIS_MODULE,
+		   },
+};
+
+static struct platform_device *mpp_device;
+
+static void __init gpio_hw_device_reset(void)
+{
+
+#ifdef CONFIG_MACH_DOVE_RD_AVNG
+	/* Reset audio codec */
+	gpio_direction_output(55, 0);	/* IO_RST# for Audio_RST# and Hub_RST# */
+	mdelay(5);
+	gpio_direction_output(55, 1);
+#endif
+
+}
+
+int __init mvmpp_sys_init(void)
+{
+	int ret;
+
+	gpio_hw_device_reset();
+
+	/* Register platform stuff */
+	ret = platform_driver_register(&mpp_driver);
+	if (ret)
+		goto fail_platform_driver;
+
+	mpp_device = platform_device_alloc("mv_mpp", -1);
+	if (! mpp_device) {
+		ret = -ENOMEM;
+		goto fail_platform_device1;
+	}
+
+	ret = platform_device_add(mpp_device);
+	if (ret)
+		goto fail_platform_device2;
+
+	ret = sysfs_create_group(&mpp_device->dev.kobj,
+				&mpp_attribute_group);
+	if (ret)
+		goto fail_sysfs;
+
+	printk(KERN_NOTICE "Marvell MPP Driver Load\n");
+
+	return 0;
+
+fail_sysfs:
+	platform_device_del(mpp_device);
+
+fail_platform_device2:
+	platform_device_put(mpp_device);
+
+fail_platform_device1:
+	platform_driver_unregister(&mpp_driver);
+
+fail_platform_driver:
+	return ret;
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/include/mach/pxa-regs.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/include/mach/pxa-regs.h
@@ -0,0 +1,32 @@
+/*
+ *  linux/include/asm-arm/arch-pxa/pxa-regs.h
+ *
+ *  Author:	Nicolas Pitre
+ *  Created:	Jun 15, 2001
+ *  Copyright:	MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __PXA_REGS_H
+#define __PXA_REGS_H
+/*
+ * DMA Controller
+ */
+#define __DMA(x)	*((volatile u32 *)(DOVE_PDMA_VIRT_BASE + (x)))
+#define __ADDR(x)	(DOVE_PDMA_VIRT_BASE + (x))
+#define __DMA2(x, y)	*((volatile u32 *)(DOVE_PDMA_VIRT_BASE + (x) + (y)))
+#define __ADDR2(x, y)	(DOVE_PDMA_VIRT_BASE + (x) + (y))
+
+#include <asm/hardware/pxa-dma-regs.h>
+
+/*
+ * AC97 Controller
+ */
+#define __AC97(x)	*((volatile u32 *)(DOVE_AC97_VIRT_BASE + (x)))
+#define AC97_REG_4_PDMA(x)	(0x58190000 | (x & 0xFFFF))
+#include <asm/hardware/pxa-ac97-regs.h>
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/include/mach/uncompress.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/include/mach/uncompress.h
@@ -0,0 +1,43 @@
+/*
+ * include/asm-arm/arch-dove/uncompress.h
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <mach/dove.h>
+
+#if defined(CONFIG_MACH_DOVE_RD_AVNG) || defined(CONFIG_MACH_DOVE_RD_AVNG_Z0) ||\
+	defined(CONFIG_MACH_DOVE_RD_AVNG_NB_Z0) || defined(CONFIG_MACH_DOVE_DB)
+#define UART_THR ((volatile unsigned char *)(DOVE_UART0_PHYS_BASE + 0x0))
+#define UART_LSR ((volatile unsigned char *)(DOVE_UART0_PHYS_BASE + 0x14))
+#else
+#define UART_THR ((volatile unsigned char *)(DOVE_UART1_PHYS_BASE + 0x0))
+#define UART_LSR ((volatile unsigned char *)(DOVE_UART1_PHYS_BASE + 0x14))
+#endif
+
+#define LSR_THRE	0x20
+
+static void putc(const char c)
+{
+	int i;
+
+	for (i = 0; i < 0x1000; i++) {
+		/* Transmit fifo not full? */
+		if (*UART_LSR & LSR_THRE)
+			break;
+	}
+
+	*UART_THR = c;
+}
+
+static void flush(void)
+{
+}
+
+/*
+ * nothing to do
+ */
+#define arch_decomp_setup()
+#define arch_decomp_wdog()
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/include/mach/dove_bl.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/include/mach/dove_bl.h
@@ -0,0 +1,35 @@
+#ifndef __ASM_ARCH_DOVE_BL_H
+#define __ASM_ARCH_DOVE_BL_H
+#include <linux/ioport.h>
+
+struct dovebl_platform_data {
+	int	default_intensity;
+	int	gpio_pm_control; /* enable LCD/panel power management via gpio*/
+
+	resource_size_t lcd_start;	/* lcd power control reg base. */
+	resource_size_t lcd_end;	/* end of reg map. */
+	unsigned long lcd_offset;	/* register offset */
+	unsigned long lcd_mapped;	/* pa = 0, va = 1 */
+	unsigned long lcd_mask;		/* mask */
+	unsigned long lcd_on;		/* value to enable lcd power */
+	unsigned long lcd_off;		/* value to disable lcd power */
+
+	resource_size_t blpwr_start;	/* backlight pwr ctrl reg base. */
+	resource_size_t blpwr_end;	/* end of reg map. */
+	unsigned long blpwr_offset;	/* register offset */
+	unsigned long blpwr_mapped;	/* pa = 0, va = 1 */
+	unsigned long blpwr_mask;	/* mask */
+	unsigned long blpwr_on;		/* value to enable bl power */
+	unsigned long blpwr_off;	/* value to disable bl power */
+
+	resource_size_t btn_start;	/* brightness control reg base. */
+	resource_size_t btn_end;	/* end of reg map. */
+	unsigned long btn_offset;	/* register offset */
+	unsigned long btn_mapped;	/* pa = 0, va = 1 */
+	unsigned long btn_mask;	/* mask */
+	unsigned long btn_level;	/* how many level can be configured. */
+	unsigned long btn_min;	/* min value */
+	unsigned long btn_max;	/* max value */
+	unsigned long btn_inc;	/* increment */
+};
+#endif /* __ASM_ARCH_DOVE_BL_H */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/include/mach/pxa2xx-gpio.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/include/mach/pxa2xx-gpio.h
@@ -0,0 +1,31 @@
+/*
+ *  linux/include/asm-arm/arch-dove/pxa2xx-gpio.h
+ *
+ *  Author:	Shadi Ammouri
+ *  Created:	Jun 10, 2008
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+
+/*
+ * Dummy values for GPIO constants used by the PXA AC'97 driver.
+ * TODO: Revisit to make sure that these are still needed in the future.
+ */
+#define GPIO31_SYNC_AC97_MD		0
+#define GPIO30_SDATA_OUT_AC97_MD	0
+#define GPIO28_BITCLK_AC97_MD		0
+#define GPIO29_SDATA_IN_AC97_MD		0
+
+
+/*
+ * Stubs for PXA GPIO functions used by the PXA AC'97 driver.
+ */
+static inline int pxa_gpio_mode(int gpio_mode)
+{
+	return 0;
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/include/mach/map.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/include/mach/map.h
@@ -0,0 +1,37 @@
+/*
+ *  linux/include/asm-arm/map.h
+ *
+ *  Copyright (C) 1999-2000 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Page table mapping constructs and function prototypes
+ */
+#include <asm/io.h>
+
+struct map_desc {
+	unsigned long virtual;
+	unsigned long pfn;
+	unsigned long length;
+	unsigned int type;
+};
+
+/* types 0-3 are defined in asm/io.h */
+#define MT_CACHECLEAN		4
+#define MT_MINICLEAN		5
+#define MT_LOW_VECTORS		6
+#define MT_HIGH_VECTORS		7
+#define MT_MEMORY		8
+#define MT_ROM			9
+#define MT_EXEC_REGS		10
+
+#define MT_NONSHARED_DEVICE	MT_DEVICE_NONSHARED
+#define MT_IXP2000_DEVICE	MT_DEVICE_IXP2000
+
+#ifdef CONFIG_MMU
+extern void iotable_init(struct map_desc *, int);
+#else
+#define iotable_init(map,num)	do { } while (0)
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/include/mach/audio.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/include/mach/audio.h
@@ -0,0 +1,30 @@
+#ifndef __ASM_ARCH_AUDIO_H__
+#define __ASM_ARCH_AUDIO_H__
+
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/ac97_codec.h>
+
+/*
+ * @reset_gpio: AC97 reset gpio (normally gpio113 or gpio95)
+ *              a -1 value means no gpio will be used for reset
+ * @codec_pdata: AC97 codec platform_data
+
+ * reset_gpio should only be specified for pxa27x CPUs where a silicon
+ * bug prevents correct operation of the reset line. If not specified,
+ * the default behaviour on these CPUs is to consider gpio 113 as the
+ * AC97 reset line, which is the default on most boards.
+ */
+typedef struct {
+	int (*startup)(struct snd_pcm_substream *, void *);
+	void (*shutdown)(struct snd_pcm_substream *, void *);
+	void (*suspend)(void *);
+	void (*resume)(void *);
+	void *priv;
+	int reset_gpio;
+	void *codec_pdata[AC97_BUS_MAX_DEVICES];
+} pxa2xx_audio_ops_t;
+
+extern void pxa_set_ac97_info(pxa2xx_audio_ops_t *ops);
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/include/mach/pm.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/include/mach/pm.h
@@ -0,0 +1,70 @@
+/*
+ * arch/arm/mach-dove/include/mach/pm.h
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __MACH_PM_H
+#define __MACH_PM_H
+
+#include <asm/errno.h>
+#include <mach/irqs.h>
+
+#define CLOCK_GATING_CONTROL	(DOVE_PMU_VIRT_BASE + 0x38)
+#define  CLOCK_GATING_USB0_MASK		(1 << 0)
+#define  CLOCK_GATING_USB1_MASK		(1 << 1)
+#define  CLOCK_GATING_GBE_MASK		(1 << 2)
+#define  CLOCK_GATING_SATA_MASK		(1 << 3)
+#define  CLOCK_GATING_PCIE0_MASK	(1 << 4)
+#define  CLOCK_GATING_PCIE1_MASK	(1 << 5)
+#define  CLOCK_GATING_SDIO0_MASK	(1 << 8)
+#define  CLOCK_GATING_SDIO1_MASK	(1 << 9)
+#define  CLOCK_GATING_NAND_MASK		(1 << 10)
+#define  CLOCK_GATING_CAMERA_MASK	(1 << 11)
+#define  CLOCK_GATING_I2S0_MASK		(1 << 12)
+#define  CLOCK_GATING_I2S1_MASK		(1 << 13)
+#define  CLOCK_GATING_CRYPTO_MASK	(1 << 15)
+#define  CLOCK_GATING_AC97_MASK		(1 << 21)
+#define  CLOCK_GATING_PDMA_MASK		(1 << 22)
+#define  CLOCK_GATING_XOR0_MASK		(1 << 23)
+#define  CLOCK_GATING_XOR1_MASK		(1 << 24)
+#define  CLOCK_GATING_GIGA_PHY_MASK	(1 << 30)
+
+#define PMU_INTERRUPT_CAUSE	(DOVE_PMU_VIRT_BASE + 0x50)
+#define PMU_INTERRUPT_MASK	(DOVE_PMU_VIRT_BASE + 0x54)
+
+static inline int pmu_to_irq(int pin)
+{
+	if (pin < NR_PMU_IRQS)
+		return pin + IRQ_DOVE_PMU_START;
+
+	return -EINVAL;
+}
+
+static inline int irq_to_pmu(int irq)
+{
+	if (IRQ_DOVE_PMU_START < irq && irq < NR_IRQS)
+		return irq - IRQ_DOVE_PMU_START;
+
+	return -EINVAL;
+}
+
+/* request the pm core to save & restore a list of registes on power management
+ * transitions.
+ * The registers list is not copied, instead, the pm will use the pointer,
+ * so the callee must not free it.
+ */
+int pm_registers_add(u32 *registers, int count);
+
+/*
+ * request the pm core to save & restore single register
+ */
+int pm_registers_add_single(u32 register_address);
+
+void dove_pm_register (void);
+
+void dove_pm_cpuidle_deepidle (void);
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/include/mach/dove_ssp.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/include/mach/dove_ssp.h
@@ -0,0 +1,14 @@
+#ifndef __ASM_ARCH_DOVE_SSP_H
+#define __ASM_ARCH_DOVE_SSP_H
+
+
+struct dove_ssp_platform_data {
+	u8 use_dma;
+	u8 use_loopback;
+	u32 dss;
+	u32 scr;
+	u32 frf;
+	u32 rft;
+	u32 tft;
+};
+#endif /* __ASM_ARCH_DOVE_SSP_H */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/include/mach/hardware.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/include/mach/hardware.h
@@ -0,0 +1,26 @@
+/*
+ * include/asm-arm/arch-dove/hardware.h
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __ASM_ARCH_HARDWARE_H
+#define __ASM_ARCH_HARDWARE_H
+
+#include "dove.h"
+
+#define pcibios_assign_all_busses()	1
+
+#define PCIBIOS_MIN_IO			0x1000
+#define PCIBIOS_MIN_MEM			0x01000000
+#define PCIMEM_BASE			DOVE_PCIE0_MEM_PHYS_BASE /* mem base for VGA */
+
+
+/* Macros below are required for compatibility with PXA AC'97 driver.	*/
+#define __REG(x)	(*((volatile u32 *)((x) - DOVE_SB_REGS_PHYS_BASE + \
+				DOVE_SB_REGS_VIRT_BASE)))
+#define __PREG(x)	(((u32)&(x)) - DOVE_SB_REGS_VIRT_BASE + \
+		DOVE_SB_REGS_PHYS_BASE)
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/include/mach/regs-ac97.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/include/mach/regs-ac97.h
@@ -0,0 +1,8 @@
+#ifndef __ASM_ARCH_REGS_AC97_H
+#define __ASM_ARCH_REGS_AC97_H
+
+/* this is a stub .h file to comply w/ PXA AC97 driver include files */
+
+#include <mach/pxa-regs.h>
+
+#endif /* __ASM_ARCH_REGS_AC97_H */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/include/mach/dove.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/include/mach/dove.h
@@ -0,0 +1,196 @@
+/*
+ * include/asm-arm/arch-dove/dove.h
+ *
+ * Generic definitions for Marvell Dove MV88F6781 SoC
+ *
+ * Author: Tzachi Perelstein <tzachi@marvell.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __ASM_ARCH_DOVE_H
+#define __ASM_ARCH_DOVE_H
+
+#include <mach/vmalloc.h>
+
+/*
+ * Marvell Dove Revision IDs
+ */
+#define DOVE_REV_Z0			0x0
+#define DOVE_REV_Z1			0x1
+#define DOVE_REV_Y0			0x2
+#define DOVE_REV_Y1			0x3
+#define DOVE_REV_X0			0x4
+#define DOVE_REV_A0			0x6
+
+/*
+ * Marvell Dove address maps.
+ *
+ * phys		virt		size
+ * c8000000	fdb00000	1M	Cryptographic SRAM
+ * e0000000	@runtime	128M	PCIe-0 Memory space
+ * e8000000	@runtime	128M	PCIe-1 Memory space
+ * f1000000	fde00000	8M	on-chip south-bridge registers
+ * f1800000	fe600000	8M	on-chip north-bridge registers
+ * f2000000	fee00000	1M	PCIe-0 I/O space
+ * f2100000	fef00000	1M	PCIe-1 I/O space
+ */
+
+#define DOVE_CESA_PHYS_BASE		0xc8000000
+#define DOVE_CESA_VIRT_BASE		(0xfdb00000 - DOVE_LCD_FB_MEMORY)
+#define DOVE_CESA_SIZE			SZ_1M
+
+#define DOVE_PCIE0_MEM_PHYS_BASE	0xe0000000
+#define DOVE_PCIE0_MEM_SIZE		SZ_128M
+
+#define DOVE_PCIE1_MEM_PHYS_BASE	0xe8000000
+#define DOVE_PCIE1_MEM_SIZE		SZ_128M
+
+#define DOVE_BOOTROM_PHYS_BASE		0xf8000000
+#define DOVE_BOOTROM_SIZE		SZ_128M
+
+#define DOVE_SCRATCHPAD_PHYS_BASE	0xf0000000
+#define DOVE_SCRATCHPAD_VIRT_BASE	(0xfdd00000 - DOVE_LCD_FB_MEMORY)
+#define DOVE_SCRATCHPAD_SIZE		SZ_1M
+
+#define DOVE_SB_REGS_HW_DEF_PHYS_BASE	0xD0000000
+#define DOVE_SB_REGS_PHYS_BASE		0xf1000000
+#define DOVE_SB_REGS_VIRT_BASE		(0xfde00000 - DOVE_LCD_FB_MEMORY)
+#define DOVE_SB_REGS_SIZE		SZ_8M
+
+#define DOVE_NB_REGS_PHYS_BASE		0xf1800000
+#define DOVE_NB_REGS_VIRT_BASE		(0xfe600000 - DOVE_LCD_FB_MEMORY)
+#define DOVE_NB_REGS_SIZE		SZ_8M
+
+#define DOVE_PCIE0_IO_PHYS_BASE		0xf2000000
+#define DOVE_PCIE0_IO_VIRT_BASE		(0xfee00000 - DOVE_LCD_FB_MEMORY)
+#define DOVE_PCIE0_IO_BUS_BASE		0x00000000
+#define DOVE_PCIE0_IO_SIZE		SZ_1M
+
+#define DOVE_PCIE1_IO_PHYS_BASE		0xf2100000
+#define DOVE_PCIE1_IO_VIRT_BASE		(0xfef00000 - DOVE_LCD_FB_MEMORY)
+#define DOVE_PCIE1_IO_BUS_BASE		0x00100000
+#define DOVE_PCIE1_IO_SIZE		SZ_1M
+
+/*
+ * Dove Core Registers Map
+ */
+
+/* SPI, I2C, UART */
+#define DOVE_I2C_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE | 0x11000)
+#define DOVE_UART0_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE | 0x12000)
+#define DOVE_UART0_VIRT_BASE	(DOVE_SB_REGS_VIRT_BASE | 0x12000)
+#define DOVE_UART1_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE | 0x12100)
+#define DOVE_UART1_VIRT_BASE	(DOVE_SB_REGS_VIRT_BASE | 0x12100)
+#define DOVE_UART2_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE | 0x12200)
+#define DOVE_UART2_VIRT_BASE	(DOVE_SB_REGS_VIRT_BASE | 0x12200)
+#define DOVE_UART3_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE | 0x12300)
+#define DOVE_UART3_VIRT_BASE	(DOVE_SB_REGS_VIRT_BASE | 0x12300)
+#define DOVE_SPI0_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE | 0x10600)
+#define DOVE_SPI1_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE | 0x14600)
+
+/* North-South Bridge */
+#define BRIDGE_VIRT_BASE	(DOVE_SB_REGS_VIRT_BASE | 0x20000)
+
+/* Cryptographic Engine */
+#define DOVE_CRYPT_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE | 0x30000)
+
+/* PCIe 0 */
+#define DOVE_PCIE0_VIRT_BASE	(DOVE_SB_REGS_VIRT_BASE | 0x40000)
+
+/* USB */
+#define DOVE_USB0_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE | 0x50000)
+#define DOVE_USB1_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE | 0x51000)
+
+/* XOR 0 Engine */
+#define DOVE_XOR0_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE | 0x60800)
+#define DOVE_XOR0_VIRT_BASE	(DOVE_SB_REGS_VIRT_BASE | 0x60800)
+#define DOVE_XOR0_HIGH_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE | 0x60A00)
+#define DOVE_XOR0_HIGH_VIRT_BASE	(DOVE_SB_REGS_VIRT_BASE | 0x60A00)
+
+/* XOR 1 Engine */
+#define DOVE_XOR1_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE | 0x60900)
+#define DOVE_XOR1_VIRT_BASE	(DOVE_SB_REGS_VIRT_BASE | 0x60900)
+#define DOVE_XOR1_HIGH_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE | 0x60B00)
+#define DOVE_XOR1_HIGH_VIRT_BASE	(DOVE_SB_REGS_VIRT_BASE | 0x60B00)
+
+/* Gigabit Ethernet */
+#define DOVE_GE00_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE | 0x70000)
+
+/* PCIe 1 */
+#define DOVE_PCIE1_VIRT_BASE	(DOVE_SB_REGS_VIRT_BASE | 0x80000)
+
+/* CAFE */
+#define DOVE_SDIO0_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE | 0x92000)
+#define DOVE_SDIO1_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE | 0x90000)
+#define DOVE_CAM_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE | 0x94000)
+#define DOVE_CAFE_WIN_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE | 0x98000)
+
+/* SATA */
+#define DOVE_SATA_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE | 0xa0000)
+
+/* I2S/SPDIF */
+#define DOVE_AUD0_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE | 0xb0000)
+#define DOVE_AUD1_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE | 0xb4000)
+
+/* NAND Flash Controller */
+#define DOVE_NFC_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE | 0xc0000)
+
+/* MPP, GPIO, Reset Sampling */
+#define DOVE_MPP_VIRT_BASE	(DOVE_SB_REGS_VIRT_BASE | 0xd0200)
+#define DOVE_PMU_MPP_GENERAL_CTRL (DOVE_MPP_VIRT_BASE + 0x10)
+#define DOVE_RESET_SAMPLE_LO	(DOVE_MPP_VIRT_BASE | 0x014)
+#define DOVE_RESET_SAMPLE_HI	(DOVE_MPP_VIRT_BASE | 0x018)
+#define DOVE_GPIO_VIRT_BASE	(DOVE_SB_REGS_VIRT_BASE | 0xd0400)
+#define DOVE_MPP_GENERAL_VIRT_BASE	(DOVE_SB_REGS_VIRT_BASE | 0xe803c)
+#define  DOVE_AU1_SPDIFO_GPIO_EN	(1 << 1)
+#define  DOVE_NAND_GPIO_EN		(1 << 0)
+#define DOVE_MPP_CTRL4_VIRT_BASE	(DOVE_GPIO_VIRT_BASE + 0x40)
+
+#define DOVE_PCIE_PORT_CONTROL	(DOVE_SB_REGS_VIRT_BASE | 0xd02e0)
+
+/* Power Management */
+#define DOVE_PMU_VIRT_BASE	(DOVE_SB_REGS_VIRT_BASE | 0xd0000)
+
+/* Real Time Clock */
+#define DOVE_RTC_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE | 0xd8500)
+
+/* AC97 */
+#define DOVE_AC97_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE | 0xe0000)
+#define DOVE_AC97_VIRT_BASE	(DOVE_SB_REGS_VIRT_BASE | 0xe0000)
+
+/* Peripheral DMA */
+#define DOVE_PDMA_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE | 0xe4000)
+#define DOVE_PDMA_VIRT_BASE	(DOVE_SB_REGS_VIRT_BASE | 0xe4000)
+
+#define DOVE_GLOBAL_CONFIG_1	(DOVE_SB_REGS_VIRT_BASE | 0xe802C)
+#define  DOVE_TWSI_ENABLE_OPTION1	(1 << 7)
+#define DOVE_GLOBAL_CONFIG_2	(DOVE_SB_REGS_VIRT_BASE | 0xe8030)
+#define  DOVE_TWSI_ENABLE_OPTION2	(1 << 20)
+#define  DOVE_TWSI_ENABLE_OPTION3	(1 << 21)
+#define  DOVE_TWSI_OPTION3_GPIO		(1 << 22)
+#define DOVE_SSP_PHYS_BASE	(DOVE_SB_REGS_PHYS_BASE | 0xec000)
+#define DOVE_SSP_CTRL_STATUS_1	(DOVE_SB_REGS_VIRT_BASE | 0xe8034)
+#define  DOVE_SSP_ON_AU1		(1 << 0)
+#define  DOVE_SSP_CLOCK_ENABLE		(1 << 1)
+#define  DOVE_SSP_BPB_CLOCK_SRC_SSP	(1 << 11)
+
+#define DOVE_LCD1_CONFIG_VIRT	(DOVE_SB_REGS_VIRT_BASE | 0xe8040)
+/* Memory Controller */
+#define DOVE_MC_VIRT_BASE	(DOVE_NB_REGS_VIRT_BASE | 0x00000)
+
+/* LCD Controller */
+#define DOVE_LCD_PHYS_BASE	(DOVE_NB_REGS_PHYS_BASE | 0x10000)
+#define DOVE_LCD1_PHYS_BASE	(DOVE_NB_REGS_PHYS_BASE | 0x20000)
+#define DOVE_LCD2_PHYS_BASE	(DOVE_NB_REGS_PHYS_BASE | 0x10000)
+#define DOVE_LCD_DCON_PHYS_BASE	(DOVE_NB_REGS_PHYS_BASE | 0x30000)
+
+/* Graphic Engine */
+#define DOVE_GPU_PHYS_BASE	(DOVE_NB_REGS_PHYS_BASE | 0x40000)
+
+/* Video Engine */
+#define DOVE_VPU_PHYS_BASE	(DOVE_NB_REGS_PHYS_BASE + 0x400000)
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/include/mach/irqs.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/include/mach/irqs.h
@@ -0,0 +1,105 @@
+/*
+ * include/asm-arm/arch-dove/irqs.h
+ *
+ * IRQ definitions for Marvell Dove MV88F6781 SoC
+ *
+ * Author: Tzachi Perelstein <tzachi@marvell.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __ASM_ARCH_IRQS_H
+#define __ASM_ARCH_IRQS_H
+
+/*
+ * Dove Low Interrupt Controller
+ */
+#define IRQ_DOVE_BRIDGE		0
+#define IRQ_DOVE_H2C		1
+#define IRQ_DOVE_C2H		2
+#define IRQ_DOVE_NAND		3
+#define IRQ_DOVE_PDMA		4
+#define IRQ_DOVE_SPI1		5
+#define IRQ_DOVE_SPI0		6
+#define IRQ_DOVE_UART_0		7
+#define IRQ_DOVE_UART_1		8
+#define IRQ_DOVE_UART_2		9
+#define IRQ_DOVE_UART_3		10
+#define IRQ_DOVE_I2C		11
+#define IRQ_DOVE_GPIO_0_7	12
+#define IRQ_DOVE_GPIO_8_15	13
+#define IRQ_DOVE_GPIO_16_23	14
+#define IRQ_DOVE_PCIE0_ERR	15
+#define IRQ_DOVE_PCIE0		16
+#define IRQ_DOVE_PCIE1_ERR	17
+#define IRQ_DOVE_PCIE1		18
+#define IRQ_DOVE_I2S0		19
+#define IRQ_DOVE_I2S0_ERR	20
+#define IRQ_DOVE_I2S1		21
+#define IRQ_DOVE_I2S1_ERR	22
+#define IRQ_DOVE_USB_ERR	23
+#define IRQ_DOVE_USB0		24
+#define IRQ_DOVE_USB1		25
+#define IRQ_DOVE_GE00_RX	26
+#define IRQ_DOVE_GE00_TX	27
+#define IRQ_DOVE_GE00_MISC	28
+#define IRQ_DOVE_GE00_SUM	29
+#define IRQ_DOVE_GE00_ERR	30
+#define IRQ_DOVE_CRYPTO		31
+
+#define ETH_PORT_IRQ_NUM(x)	IRQ_DOVE_GE00_SUM
+
+/*
+ * Dove High Interrupt Controller
+ */
+#define IRQ_DOVE_AC97		32
+#define IRQ_DOVE_PMU		33
+#define IRQ_DOVE_CAM		34
+#define IRQ_DOVE_SDIO0		35
+#define IRQ_DOVE_SDIO1		36
+#define IRQ_DOVE_SDIO0_WAKEUP	37
+#define IRQ_DOVE_SDIO1_WAKEUP	38
+#define IRQ_DOVE_XOR_00		39
+#define IRQ_DOVE_XOR_01		40
+#define IRQ_DOVE_XOR0_ERR	41
+#define IRQ_DOVE_XOR_10		42
+#define IRQ_DOVE_XOR_11		43
+#define IRQ_DOVE_XOR1_ERR	44
+#define IRQ_DOVE_LCD_DCON	45
+#define IRQ_DOVE_LCD1		46
+#define IRQ_DOVE_LCD0		47
+#define IRQ_DOVE_GPU		48
+#define IRQ_DOVE_PERFORM_MNTR	49
+#define IRQ_DOVE_VMETA_DMA1	51
+#define IRQ_DOVE_SSP_TIMER	54
+#define IRQ_DOVE_SSP		55
+#define IRQ_DOVE_MC_L2_ERR	56
+#define IRQ_DOVE_CRYPTO_ERR	59
+#define IRQ_DOVE_GPIO_24_31	60
+#define IRQ_DOVE_HIGH_GPIO	61
+#define IRQ_DOVE_SATA		62
+
+/*
+ * DOVE General Purpose Pins
+ */
+#define IRQ_DOVE_GPIO_START	64
+#define NR_GPIO_IRQS		64
+
+/*
+ * PMU interrupts
+ */
+#define IRQ_DOVE_PMU_START	(IRQ_DOVE_GPIO_START + NR_GPIO_IRQS)
+#define NR_PMU_IRQS		7
+#define IRQ_DOVE_RTC		(IRQ_DOVE_PMU_START + 5)
+
+#define NR_IRQS			(IRQ_DOVE_PMU_START + NR_PMU_IRQS)
+
+/* Required for compatability with PXA AC97 driver.	*/
+#define IRQ_AC97		IRQ_DOVE_AC97
+/* Required for compatability with PXA DMA driver.	*/
+#define IRQ_DMA			IRQ_DOVE_PDMA
+/* Required for compatability with PXA NAND driver 	*/
+#define IRQ_NAND		IRQ_DOVE_NAND
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/include/mach/vmalloc.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/include/mach/vmalloc.h
@@ -0,0 +1,13 @@
+/*
+ * include/asm-arm/arch-dove/vmalloc.h
+ */
+
+/* Dove LCD driver performs big allocations for FrameBuffer memory, we need to
+ * move CONSISTENT_BASE by 32MB
+ */
+/* This should be deleted... */
+#define DOVE_LCD_FB_MEMORY	(0x0)
+/* Was 0x2000000 */
+
+#define VMALLOC_END	(0xfd800000 - DOVE_LCD_FB_MEMORY)
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/include/mach/system.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/include/mach/system.h
@@ -0,0 +1,36 @@
+/*
+ * arch/arm/mach-dove/include/mach/system.h
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __ASM_ARCH_SYSTEM_H
+#define __ASM_ARCH_SYSTEM_H
+
+#include <mach/bridge-regs.h>
+
+static inline void arch_idle(void)
+{
+	cpu_do_idle();
+}
+
+static inline void arch_reset(char mode, const char *cmd)
+{
+	/*
+	 * Enable soft reset to assert RSTOUTn.
+	 */
+	writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
+
+	/*
+	 * Assert soft reset.
+	 */
+	writel(SOFT_RESET, SYSTEM_SOFT_RESET);
+
+	while (1)
+		;
+}
+
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/include/mach/bridge-regs.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/include/mach/bridge-regs.h
@@ -0,0 +1,58 @@
+/*
+ * arch/arm/mach-dove/include/mach/bridge-regs.h
+ *
+ * Mbus-L to Mbus Bridge Registers
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __ASM_ARCH_BRIDGE_REGS_H
+#define __ASM_ARCH_BRIDGE_REGS_H
+
+#include <mach/dove.h>
+
+#define CPU_CONFIG		(BRIDGE_VIRT_BASE | 0x0000)
+
+#define CPU_CONTROL		(BRIDGE_VIRT_BASE | 0x0104)
+#define  CPU_CTRL_PCIE0_LINK	0x00000001
+#define  CPU_RESET		0x00000002
+#define  CPU_CTRL_PCIE1_LINK	0x00000008
+
+#define RSTOUTn_MASK		(BRIDGE_VIRT_BASE | 0x0108)
+#define SOFT_RESET_OUT_EN	0x00000004
+
+#define SYSTEM_SOFT_RESET	(BRIDGE_VIRT_BASE | 0x010c)
+#define SOFT_RESET		0x00000001
+
+#define BRIDGE_CAUSE		(BRIDGE_VIRT_BASE | 0x0110)
+#define BRIDGE_MASK		(BRIDGE_VIRT_BASE | 0x0114)
+#define BRIDGE_INT_TIMER0	0x0002
+#define BRIDGE_INT_TIMER1	0x0004
+#define BRIDGE_INT_TIMER1_CLR	(~0x0004)
+
+#define IRQ_VIRT_BASE		(BRIDGE_VIRT_BASE | 0x0200)
+#define IRQ_CAUSE_LOW_OFF	0x0000
+#define IRQ_MASK_LOW_OFF	0x0004
+#define FIQ_MASK_LOW_OFF	0x0008
+#define ENDPOINT_MASK_LOW_OFF	0x000c
+#define IRQ_CAUSE_HIGH_OFF	0x0010
+#define IRQ_MASK_HIGH_OFF	0x0014
+#define FIQ_MASK_HIGH_OFF	0x0018
+#define ENDPOINT_MASK_HIGH_OFF	0x001c
+#define PCIE_INTERRUPT_MASK_OFF	0x0020
+
+#define IRQ_MASK_LOW		(IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF)
+#define FIQ_MASK_LOW		(IRQ_VIRT_BASE + FIQ_MASK_LOW_OFF)
+#define ENDPOINT_MASK_LOW	(IRQ_VIRT_BASE + ENDPOINT_MASK_LOW_OFF)
+#define IRQ_MASK_HIGH		(IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF)
+#define FIQ_MASK_HIGH		(IRQ_VIRT_BASE + FIQ_MASK_HIGH_OFF)
+#define ENDPOINT_MASK_HIGH	(IRQ_VIRT_BASE + ENDPOINT_MASK_HIGH_OFF)
+#define PCIE_INTERRUPT_MASK	(IRQ_VIRT_BASE + PCIE_INTERRUPT_MASK_OFF)
+
+#define POWER_MANAGEMENT	(BRIDGE_VIRT_BASE | 0x011c)
+
+#define TIMER_VIRT_BASE		(BRIDGE_VIRT_BASE | 0x0300)
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/include/mach/gpio.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/include/mach/gpio.h
@@ -0,0 +1,71 @@
+/*
+ * include/asm-arm/arch-dove/gpio.h
+ *
+ * Author: Tzachi Perelstein <tzachi@marvell.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __ASM_ARCH_GPIO_H
+#define __ASM_ARCH_GPIO_H
+
+#include <asm/errno.h>
+#include <mach/irqs.h>
+#include <plat/gpio.h>
+#include <asm-generic/gpio.h>		/* cansleep wrappers */
+
+#define GPIO_MAX	64
+
+#define GPIO_BASE_LO		(DOVE_GPIO_VIRT_BASE + 0x00)
+#define GPIO_BASE_HI		(DOVE_GPIO_VIRT_BASE + 0x20)
+
+#define GPIO_BASE(pin)		((pin < 32) ? GPIO_BASE_LO : GPIO_BASE_HI)
+
+#define GPIO_OUT(pin)		(GPIO_BASE(pin) + 0x00)
+#define GPIO_IO_CONF(pin)	(GPIO_BASE(pin) + 0x04)
+#define GPIO_BLINK_EN(pin)	(GPIO_BASE(pin) + 0x08)
+#define GPIO_IN_POL(pin)	(GPIO_BASE(pin) + 0x0c)
+#define GPIO_DATA_IN(pin)	(GPIO_BASE(pin) + 0x10)
+#define GPIO_EDGE_CAUSE(pin)	(GPIO_BASE(pin) + 0x14)
+#define GPIO_EDGE_MASK(pin)	(GPIO_BASE(pin) + 0x18)
+#define GPIO_LEVEL_MASK(pin)	(GPIO_BASE(pin) + 0x1c)
+
+#define DOVE_GPIO_REGISTERS	\
+{				\
+	GPIO_OUT(0),		\
+	GPIO_IO_CONF(0),	\
+	GPIO_BLINK_EN(0),	\
+	GPIO_IN_POL(0),		\
+	GPIO_DATA_IN(0),	\
+	GPIO_EDGE_CAUSE(0),	\
+	GPIO_EDGE_MASK(0),	\
+	GPIO_LEVEL_MASK(0),	\
+	GPIO_OUT(32),		\
+	GPIO_IO_CONF(32),	\
+	GPIO_BLINK_EN(32),	\
+	GPIO_IN_POL(32),	\
+	GPIO_DATA_IN(32),	\
+	GPIO_EDGE_CAUSE(32),	\
+	GPIO_EDGE_MASK(32),	\
+	GPIO_LEVEL_MASK(32)	\
+}
+
+static inline int gpio_to_irq(int pin)
+{
+	if (pin < NR_GPIO_IRQS)
+		return pin + IRQ_DOVE_GPIO_START;
+
+	return -EINVAL;
+}
+
+static inline int irq_to_gpio(int irq)
+{
+	if (IRQ_DOVE_GPIO_START <= irq && irq < NR_IRQS)
+		return irq - IRQ_DOVE_GPIO_START;
+
+	return -EINVAL;
+}
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/include/mach/memory.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/include/mach/memory.h
@@ -0,0 +1,26 @@
+/*
+ * include/asm-arm/arch-mv78xx0/memory.h
+ */
+
+#ifndef __ASM_ARCH_MEMORY_H
+#define __ASM_ARCH_MEMORY_H
+
+#define PHYS_OFFSET		UL(0x00000000)
+
+
+
+/* Override the ARM default */
+#ifdef CONFIG_FB_DOVE_CONSISTENT_DMA_SIZE
+
+#if (CONFIG_FB_DOVE_CONSISTENT_DMA_SIZE == 0)
+#undef CONFIG_FB_DOVE_CONSISTENT_DMA_SIZE
+#define CONFIG_FB_DOVE_CONSISTENT_DMA_SIZE 2
+#endif
+
+#define CONSISTENT_DMA_SIZE \
+	(((CONFIG_FB_DOVE_CONSISTENT_DMA_SIZE + 1) & ~1) * 1024 * 1024)
+
+#endif
+
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/include/mach/clkdev.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/include/mach/clkdev.h
@@ -0,0 +1,7 @@
+#ifndef __ASM_MACH_CLKDEV_H
+#define __ASM_MACH_CLKDEV_H
+
+#define __clk_get(clk) ({ 1; })
+#define __clk_put(clk) do { } while (0)
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/include/mach/timex.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/include/mach/timex.h
@@ -0,0 +1,9 @@
+/*
+ * include/asm-arm/arch-dove/timex.h
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#define CLOCK_TICK_RATE		(100 * HZ)
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/include/mach/debug-macro.S
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/include/mach/debug-macro.S
@@ -0,0 +1,20 @@
+/*
+ * include/asm-arm/arch-dove/debug-macro.S
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <mach/bridge-regs.h>
+
+	.macro	addruart,rx
+	mrc	p15, 0, \rx, c1, c0
+	tst	\rx, #1					@ MMU enabled?
+	ldreq	\rx, =DOVE_SB_REGS_PHYS_BASE
+	ldrne	\rx, =DOVE_SB_REGS_VIRT_BASE
+	orr	\rx, \rx, #0x00012000
+	.endm
+
+#define UART_SHIFT	2
+#include <asm/hardware/debug-8250.S>
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/include/mach/io.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/include/mach/io.h
@@ -0,0 +1,20 @@
+/*
+ * include/asm-arm/arch-dove/io.h
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __ASM_ARCH_IO_H
+#define __ASM_ARCH_IO_H
+
+#include "dove.h"
+
+#define IO_SPACE_LIMIT		0xffffffff
+
+#define __io(a)		((void __iomem *)((a) - DOVE_PCIE0_IO_BUS_BASE + \
+						DOVE_PCIE0_IO_VIRT_BASE))
+#define __mem_pci(a)	(a)
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/include/mach/entry-macro.S
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/include/mach/entry-macro.S
@@ -0,0 +1,39 @@
+/*
+ * include/asm-arm/arch-dove/entry-macro.S
+ *
+ * Low-level IRQ helper macros for Marvell Dove platforms
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <mach/bridge-regs.h>
+
+	.macro  disable_fiq
+	.endm
+
+	.macro  arch_ret_to_user, tmp1, tmp2
+	.endm
+
+	.macro  get_irqnr_preamble, base, tmp
+	ldr	\base, =IRQ_VIRT_BASE
+	.endm
+
+	.macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
+	@ check low interrupts
+	ldr	\irqstat, [\base, #IRQ_CAUSE_LOW_OFF]
+	ldr	\tmp, [\base, #IRQ_MASK_LOW_OFF]
+	mov	\irqnr, #31
+	ands	\irqstat, \irqstat, \tmp
+
+	@ if no low interrupts set, check high interrupts
+	ldreq	\irqstat, [\base, #IRQ_CAUSE_HIGH_OFF]
+	ldreq	\tmp, [\base, #IRQ_MASK_HIGH_OFF]
+	moveq	\irqnr, #63
+	andeqs	\irqstat, \irqstat, \tmp
+
+	@ find first active interrupt source
+	clzne	\irqstat, \irqstat
+	subne	\irqnr, \irqnr, \irqstat
+	.endm
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_DOVE_GC600)	+= galcore_ko_src/
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/readme
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/readme
@@ -0,0 +1,79 @@
+    Dove Graphics Driver for Generic Linux
+    Ver0.8.0.1123
+
+1.  Introduction
+    This package contains Dove unified graphics driver for 
+    generic linux and some documents. 
+    This document is used to describe the package contents, how to build 
+    kernel mode driver and how to install the driver binaries to device.
+ 
+2.  Revision History 
+    Ver0.8.0.1123
+		1. Add texture generation support
+		2. Workaround the YUV texture quality issue.
+		3. Merge 2009.9 vivante driver.
+
+
+3.  Package Contents
+    --/                   -- Package root directory
+       galcroe_ko_src     -- GC source code needed to build kernel mode driver
+       libgfx
+          bin/            -- GC driver binaries
+          include/        -- GC sdk header files
+          samples/        -- GC sample codes
+ 
+
+4.  Build and Installation
+4.1 System Requirement 
+    Host PC :
+       Operating system   -- Ubuntu 8.04 or newer
+       Toolchain          -- arm-marvell-linux-gnueabi
+    Target Device:
+        Platform          -- PXA950 processor EVB platform
+                             PXA968 processor EVB platform
+                             ARMADA 610 processor EVB platform
+        Operation system  -- Linux kernel 2.6.29 or newer
+   
+4.2  Build Kernel Mode Driver
+     Enter ~/galcore_ko_src, modify the "Makefile" according to your system:
+        1)  Modify "CROSS_COMPILE" to your toolchain directory with prefix
+           (path_to_your_marvelltoolchain_dir/bin/arm-marvell-linux-gnueabi-);
+        2)  Modify "KERNEL_DIR" to point to your linux kernel tree.
+     Build kernel mode driver by commands:
+        #make clean
+        #make
+     If no error, the build result galcore.ko will be placed on current directory.
+	
+4.3 Build Samples
+    1) Enter the ~/libgfx/samples, modify the Makefile according to your system;
+    2) Modify "CC" point to your toolchain gcc compiler;
+    3) Build samples by commands:
+       #make clean
+       #make
+
+4.4 Installation
+    Copy galcore.ko to device /lib/modules directory:
+       #cp ~/galcore.ko         /lib/modules/
+    Copy *.so to device /usr/lib directory:
+       #cp ~/bin/libGAL.so      /usr/lib/
+       #cp ~/bin/libEGL.so      /usr/lib/
+       #cp ~/bin/libGLES_CM.so  /usr/lib/
+       #cp ~/bin/libOpenVG.so   /usr/lib/
+       #cp ~/bin/libGLESv2x.so  /usr/lib/
+       #cp ~/bin/libGLESv2SC.so /usr/lib/
+       #cp ~/bin/libVDK.so      /usr/lib/
+    Make sure the system startup script already contains the command to load kernel mode driver,
+	For example, you can add a init script in /ect/init.d/galcore.sh like:
+		#!/bin/sh
+		insmod /lib/modules/galcore.ko registerMemBase=0xf1840000 irqLine=48 contiguousBase=0x8000000 contiguousSize=0x2000000
+		mknod /dev/galcore c 199 0
+		chmod 777 /dev/galcore
+
+5.  FAQ
+    1. "We can't find the arm-marvell-linux-gnueabi toolchain".
+       Contact your Marvell representative to get arm-marvell-linux-gnueabi toolchain.
+
+6.  Known Issues
+    Problem   : The OpenVG implementation does not enable anti-alias by default.
+    Workaround: Choose the EGL configuration with EGL_SAMPLES = 4.
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/common.node
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/common.node
@@ -0,0 +1,45 @@
+##############################################################################
+#  
+#    Copyright (C) 2005 - 2010 by Vivante Corp.
+#  
+#    This program is free software; you can redistribute it and/or modify
+#    it under the terms of the GNU General Public License as published by
+#    the Free Software Foundation; either version 2 of the license, or
+#    (at your option) any later version.
+#  
+#    This program is distributed in the hope that it will be useful,
+#    but WITHOUT ANY WARRANTY; without even the implied warranty of
+#    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+#    GNU General Public Lisence for more details.
+#  
+#    You should have received a copy of the GNU General Public License
+#    along with this program; if not write to the Free Software
+#    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+#  
+##############################################################################
+
+
+#
+# Common makefile for the node.
+#
+
+################################################################################
+# Specify the targets.
+
+.PHONY: all clean install $(MODULES)
+
+all: $(MAIN_MODULE)
+
+clean:
+	$(MAKE) V_TARGET=clean STATIC_LINK=$(STATIC_LINK)
+
+install:
+	$(MAKE) V_TARGET=install STATIC_LINK=$(STATIC_LINK)
+
+ifneq ($(VIVANTE_NO_3D), 1)
+$(MODULES):
+	@test ! -d $@ || $(MAKE) --directory=$@ $(V_TARGET) STATIC_LINK=$(STATIC_LINK)
+else
+$(MODULES):
+	@test ! -d $@ || $(MAKE) --directory=$@ $(V_TARGET) VIVANTE_NO_3D=1 STATIC_LINK=$(STATIC_LINK)
+endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/Makefile.linux
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/Makefile.linux
@@ -0,0 +1,35 @@
+PWD := $(shell pwd)
+
+ARCH=arm
+CROSS_COMPILE = arm-marvell-linux-gnueabi-
+GPU_TYPE = Unified
+KERNEL_DIR = ${PWD}/linux
+
+DEBUG = 0
+ABI = aapcs-linux
+ENABLE_ARM_L2_CACHE = 1
+NO_DMA_COHERENT = 1
+CONFIG_DOVE_GPU = 1
+ANDROID = 0
+ENABLE_GPU_CLOCK_BY_DRIVER = 0
+
+BUILD_OPTIONS  = DEBUG=${DEBUG}
+BUILD_OPTIONS += ABI=${ABI}
+BUILD_OPTIONS += ENABLE_ARM_L2_CACHE=${ENABLE_ARM_L2_CACHE}
+BUILD_OPTIONS += NO_DMA_COHERENT=${NO_DMA_COHERENT}
+BUILD_OPTIONS += CONFIG_DOVE_GPU=${CONFIG_DOVE_GPU}
+BUILD_OPTIONS += ANDROID=${ANDROID}
+BUILD_OPTIONS += ENABLE_GPU_CLOCK_BY_DRIVER=${ENABLE_GPU_CLOCK_BY_DRIVER}
+
+GCX00_COMPILE_ENV = ${BUILD_OPTIONS} ARCH=${ARCH} CROSS_COMPILE=${CROSS_COMPILE}\
+	AQROOT=${PWD} AQARCH=${PWD}/arch/${GPU_TYPE} KERNEL_DIR=${KERNEL_DIR}
+
+all:
+	make ${GCX00_COMPILE_ENV} -C ${PWD} -f Kbuild
+	cp $(PWD)/hal/driver/galcore.ko .
+
+clean:
+	make ${GCX00_COMPILE_ENV} -C ${PWD} -f Kbuild clean
+
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/makefile
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/makefile
@@ -0,0 +1,35 @@
+PWD := $(shell pwd)
+
+ARCH=arm
+CROSS_COMPILE ?= /usr/local/arm-marvell-linux-gnueabi/bin/arm-marvell-linux-gnueabi-
+GPU_TYPE = unified
+KERNEL_DIR ?= /usr/local/tools/linux
+
+DEBUG = 0
+ABI = aapcs-linux
+ENABLE_ARM_L2_CACHE = 1
+NO_DMA_COHERENT = 1
+CONFIG_DOVE_GPU = 1
+ANDROID = 0
+ENABLE_GPU_CLOCK_BY_DRIVER = 0
+
+BUILD_OPTIONS  = DEBUG=${DEBUG}
+BUILD_OPTIONS += ABI=${ABI}
+BUILD_OPTIONS += ENABLE_ARM_L2_CACHE=${ENABLE_ARM_L2_CACHE}
+BUILD_OPTIONS += NO_DMA_COHERENT=${NO_DMA_COHERENT}
+BUILD_OPTIONS += CONFIG_DOVE_GPU=${CONFIG_DOVE_GPU}
+BUILD_OPTIONS += ANDROID=${ANDROID}
+BUILD_OPTIONS += ENABLE_GPU_CLOCK_BY_DRIVER=${ENABLE_GPU_CLOCK_BY_DRIVER}
+
+GCX00_COMPILE_ENV = ${BUILD_OPTIONS} ARCH=${ARCH} CROSS_COMPILE=${CROSS_COMPILE}\
+	AQROOT=${PWD} AQARCH=${PWD}/arch/${GPU_TYPE} KERNEL_DIR=${KERNEL_DIR}
+
+all:
+	make ${GCX00_COMPILE_ENV} -C ${PWD} -f Kbuild
+	cp $(PWD)/hal/driver/galcore.ko .
+
+clean:
+	make ${GCX00_COMPILE_ENV} -C ${PWD} -f Kbuild clean
+
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/makefile.linux.def
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/makefile.linux.def
@@ -0,0 +1,347 @@
+##############################################################################
+#
+#    Copyright (c) 2005 - 2010 by Vivante Corp.  All rights reserved.
+#
+#    The material in this file is confidential and contains trade secrets
+#    of Vivante Corporation. This is proprietary information owned by
+#    Vivante Corporation. No part of this work may be disclosed,
+#    reproduced, copied, transmitted, or used in any way for any purpose,
+#    without the express written permission of Vivante Corporation.
+#
+##############################################################################
+#
+#
+##############################################################################
+
+
+#
+# Common inlude file for Linux build.
+#
+
+################################################################
+# Arch.
+
+ARCH_TYPE       ?= arm
+CPU_TYPE        ?= arm920
+CPU_ARCH        ?= 0
+STATIC_LINK     ?= 0
+EGL_API_FB      ?= 0
+USE_VDK         ?= 0
+USE_PROFILER    ?= 0
+USE_SW_FB       ?= 0
+USE_3D_VG		=1
+ABI             ?= 0
+ANDROID         ?= 0
+EGL_API_ANDROID ?= 0
+ANDROID_VERSION_ECLAIR  ?= 0
+ENUM_WORKAROUND ?= 0
+ENDIANNESS		?=
+QNX             ?= 0
+LINUX_OABI		?= 0
+USE_ARMCC		?= 0
+
+ifeq ($(LINUX_OABI), 1)
+ABI             ?= 0
+else
+ABI             ?= aapcs-linux
+endif
+
+################################################################
+# Toolchain.
+
+ifeq ($(USE_ARMCC),1)
+	ARM_BASE		?=	/home/software/ARM
+	ARM_VERSION		?=	4.0/650
+	CROSS_COMPILE	?=	$(ARM_BASE)/RVCT/Programs/$(ARM_VERSION)/linux-pentium/arm
+	CFLAGS			+=	-I$(ARM_BASE)/RVCT/Data/$(ARM_VERSION)/include/unix
+	CC     := $(CROSS_COMPILE)cc
+	CXX    := $(CROSS_COMPILE)cc
+	AR     := $(CROSS_COMPILE)ar
+	AS     := $(CROSS_COMPILE)as
+	LD     := $(CROSS_COMPILE)link
+else
+	CROSS_COMPILE ?= arm-none-linux-gnueabi-
+	CC     := $(CROSS_COMPILE)gcc
+	CXX    := $(CROSS_COMPILE)g++
+	AR     := $(CROSS_COMPILE)ar
+	AS     := $(CROSS_COMPILE)as
+	LD     := $(CROSS_COMPILE)ld
+	RANLIB := $(CROSS_COMPILE)ranlib
+	STRIP  := $(CROSS_COMPILE)strip
+endif
+
+################################################################
+# Make command.
+
+MAKE     = make --makefile=makefile.linux
+DRV_MAKE ?= make --makefile=Kbuild
+
+################################################################
+# Resource.
+
+TOOL_DIR     ?= /home/software/Linux
+ANDROID_HOME ?=
+KERNEL_DIR   ?= $(TOOL_DIR)/kernel
+X11_ARM_DIR  ?= $(TOOL_DIR)/X11_ARM
+
+################################################################
+# Target directory.
+
+ifeq ($(DEBUG), 1)
+OBJ_DIR	?= bin_d
+else
+OBJ_DIR	?= bin_r
+endif
+
+################################################################
+# Force to use the new compiler.
+
+SC2X_NEW ?= 1
+ES11_NEW ?= 1
+
+################################################################
+# Release directory.
+
+SDK_DIR ?= $(AQROOT)/build/sdk
+VIVANTE_SDK_DIR ?= $(SDK_DIR)
+VIVANTE_SDK_INC ?= $(VIVANTE_SDK_DIR)/include
+VIVANTE_SDK_LIB ?= $(VIVANTE_SDK_DIR)/drivers
+
+################################################################
+# Force to use dma_coherent_* stuff.
+
+NO_DMA_COHERENT ?= 0
+
+################################################################
+# Set this value to 1 if you are using ARM L2 cache.
+
+ENABLE_ARM_L2_CACHE	?= 0
+
+################################################################
+# Set this value to 1 if you are using DOVE board.
+CONFIG_DOVE_GPU		?= 0
+
+###############################################################
+# Common CFLAGS.
+
+ifeq ($(USE_ARMCC), 1)
+	CFLAGS += --c99 #--strict
+else
+ifeq ($(ABI), 0)
+else
+	CFLAGS += -mabi=$(ABI)
+endif
+
+ifneq ($(ENDIANNESS),)
+	CFLAGS += $(ENDIANNESS)
+	LFLAGS += $(ENDIANNESS)
+	PFLAGS += $(ENDIANNESS)
+endif
+endif
+
+ifeq ($(ANDROID), 1)
+    USE_VDK = 0
+
+    ifeq ($(ARCH_TYPE), arm)
+	CFLAGS += -I$(ANDROID_HOME)/bionic/libstdc++/include -I$(ANDROID_HOME)/bionic/libc/arch-arm/include -I$(ANDROID_HOME)/bionic/libc/include -I$(ANDROID_HOME)/bionic/libc/kernel/common/ -I$(ANDROID_HOME)/bionic/libc/kernel/arch-arm -I$(ANDROID_HOME)/bionic/libm/include -I$(ANDROID_HOME)/bionic/libm/include/arch/arm -I$(ANDROID_HOME)/bionic/libthread_db/include -I$(ANDROID_HOME)/system/core/include -I$(ANDROID_HOME)/frameworks/base/include
+        CFLAGS += -DANDROID -D__ARM_ARCH_5__ -D__ARM_ARCH_5T__ -D__ARM_ARCH_5E__ -D__ARM_ARCH_5TE__ -fno-short-enums
+    endif
+
+    ifeq ($(ARCH_TYPE), xburst)
+        CFLAGS += -I$(ANDROID_HOME)/bionic/libstdc++/include -I$(ANDROID_HOME)/bionic/libc/arch-xburst/include -I$(ANDROID_HOME)/bionic/libc/include -I$(ANDROID_HOME)/bionic/libc/kernel/common/ -I$(ANDROID_HOME)/bionic/libc/kernel/arch-xburst -I$(ANDROID_HOME)/bionic/libm/include -I$(ANDROID_HOME)/bionic/libm/include/mips -I$(ANDROID_HOME)/bionic/libthread_db/include
+    endif
+
+    ifeq ($(EGL_API_ANDROID), 1)
+        CFLAGS += -DEGL_API_ANDROID
+    endif
+
+    ifeq ($(ANDROID_VERSION_ECLAIR), 1)
+        CFLAGS += -DANDROID_VERSION_ECLAIR
+    endif
+endif
+
+ifeq ($(QNX), 1)
+	CFLAGS += -D__QNXNTO__
+else
+	ifneq ($(USE_ARMCC),1)
+		CFLAGS += -DLINUX
+	endif
+endif
+
+ifeq ($(LINUX_OABI), 1)
+	CFLAGS += -DLINUX_OABI
+endif
+
+ifneq ($(USE_ARMCC), 1)
+CFLAGS += -Wall -D_REENTRANT -fno-strict-aliasing
+
+ifeq ($(CPU_TYPE), 0)
+else
+	CFLAGS += -mcpu=$(CPU_TYPE)
+	AFLAGS += -mcpu=$(CPU_TYPE)
+endif
+
+ifeq ($(CPU_ARCH), 0)
+else
+	CFLAGS += -march=$(CPU_ARCH)
+	AFLAGS += -march=$(CPU_ARCH)
+endif
+endif
+
+ifeq ($(DEBUG), 1)
+	CFLAGS += -g -fPIC -O0 -DDEBUG -D_DEBUG
+else
+	CFLAGS += -O2 -fPIC -g
+endif
+
+ifeq ($(EGL_API_FB), 1)
+	CFLAGS += -DEGL_API_FB
+endif
+
+ifeq ($(STATIC_LINK), 1)
+	CFLAGS += -DSTATIC_LINK
+endif
+
+ifeq ($(USE_VDK), 1)
+	CFLAGS += -DUSE_VDK=1 -DUSE_SW_FB=$(USE_SW_FB)
+else
+	CFLAGS += -DUSE_VDK=0 -DUSE_SW_FB=$(USE_SW_FB)
+endif
+ifeq ($(MRVL_NATIVE_IMAGE_KHR_FOR_CHROME),1)
+    CFLAGS += -DMRVL_NATIVE_IMAGE_KHR_FOR_CHROME=1
+else
+    CFLAGS += -DMRVL_NATIVE_IMAGE_KHR_FOR_CHROME=0
+endif
+
+ifeq ($(MRVL_EGL_SUPPORT_RESIZE_WINDOW),1)
+    CFLAGS += -DMRVL_EGL_SUPPORT_RESIZE_WINDOW=1
+else
+    CFLAGS += -DMRVL_EGL_SUPPORT_RESIZE_WINDOW=0
+endif
+
+ifeq ($(USE_NEW_LINUX_SIGNAL), 1)
+	CFLAGS += -DUSE_NEW_LINUX_SIGNAL=1
+endif
+
+ifneq ($(USE_ARMCC), 1)
+CXXFLAGS += -fno-short-enums
+endif
+
+ifneq (,$(EGL_APPENDIX))
+CFLAGS += -D_EGL_APPENDIX=$(EGL_APPENDIX)
+endif
+ifneq (,$(GL_11_APPENDIX))
+CFLAGS += -D_GL_11_APPENDIX=$(GL_11_APPENDIX)
+endif
+ifneq (,$(GL_2_APPENDIX))
+CFLAGS += -D_GL_2_APPENDIX=$(GL_2_APPENDIX)
+endif
+ifneq (,$(VG_APPENDIX))
+CFLAGS += -D_VG_APPENDIX=$(VG_APPENDIX)
+endif
+
+CFLAGS += -DgcdREGISTER_ACCESS_FROM_USER=1
+
+################################################################################
+# Build with profiler
+ifeq ($(USE_PROFILER),1)
+CFLAGS += -DVIVANTE_PROFILER=1
+endif
+
+
+################################################################
+# Module directories.
+
+# drivers
+GAL_DIR         := $(AQROOT)/hal
+ifeq ($(ES11_NEW), 1)
+GLES11_DIR      := $(AQROOT)/driver/openGL/libGLESv11
+else
+GLES11_DIR      := $(AQROOT)/driver/openGL/es11/driver
+endif
+EGL_DIR         := $(AQROOT)/driver/openGL/egl
+GLES2X_DIR      := $(AQROOT)/driver/openGL/libGLESv2x
+ifeq ($(USE_3D_VG), 1)
+VG11_DIR        := $(AQROOT)/driver/openVG/vg11
+OVG11_DIR       := $(AQROOT)/driver/openVG/vg11/driver
+else
+VG11_DIR        := $(AQROOT)/driver/openGL/libOpenVG
+OVG11_DIR       := $(AQROOT)/driver/openGL/libOpenVG
+endif
+GFX_DIR         := $(AQROOT)/driver/gfx
+
+ifeq ($(SC2X_NEW), 1)
+SC2X_LIB_DIR    := $(GLES2X_DIR)/compiler/libGLESv2SC/entry
+else
+SC2X_LIB_DIR    := $(GLES2X_DIR)/slc/glslang/MachineIndependent/compiler
+endif
+
+ifeq ($(ANDROID), 1)
+GCU_DIR		:= $(AQROOT)/gcu/proj/eclair
+else
+GCU_DIR		:= $(AQROOT)/gcu/proj/linux
+endif
+
+VIVANTE_LIB_DIR	:= $(AQROOT)/sdk/vivante
+
+# applications
+EGL_TEST_DIR	:= $(AQROOT)/test/egl
+ES11_TEST_DIR   := $(AQROOT)/test/es11/Linux
+ES2X_TEST_DIR   := $(AQROOT)/test/es20
+ES2X_EXTERN_DIR := $(AQROOT)/test/es20/extern
+ES20_TEST_DIR   := $(AQROOT)/sdk/samples/es20
+
+ifeq ($(USE_VDK), 0)
+TUTORIAL_DIR    := $(ES11_TEST_DIR)
+endif
+VDK_TEST_DIR    := $(AQROOT)/sdk/samples/vdk
+HAL_TEST_DIR    := $(AQROOT)/sdk
+HAL_CUSTOM_DIR	:= $(AQROOT)/test/hal/Linux/custom
+CHIPINFO_DIR    := $(AQROOT)/test/hal/common/chipinfo
+VDK_DIR         := $(AQROOT)/sdk/vdk
+
+ifeq ($(USE_VDK), 1)
+CONFORM_DIR     := $(AQROOT)/test/es11/conform
+else
+# old es11 conformce test was removed
+# $(AQROOT)/driver/openGL/es11/test/conform
+CONFORM_DIR	    :=
+endif
+
+GLBES11_DIR     := $(AQROOT)/test/es11/GLBenchmark_ES1.1v2
+GLBES20_DIR     := $(AQROOT)/test/es20/GLBenchmark2_RC2
+GLBESNAVI11_DIR := $(AQROOT)/test/es11/GLBenchmark_Navi_Beta2/es11
+GLBESNAVI20_DIR := $(AQROOT)/test/es11/GLBenchmark_Navi_Beta2/es20
+GTF_DIR         := $(AQROOT)/test/es20/conform/GTF_ES/glsl/GTF
+VGMARK_DIR      := $(AQROOT)/test/vg/common/VGMark_10_src
+VGMARK11_DIR    := $(AQROOT)/test/vg11/VGMark11/VGMark11_addendum
+VGCTS_DIR       := $(AQROOT)/test/vg/ovg_1.0.1_cts_rc10
+VGCTS11_DIR     := $(AQROOT)/test/vg/ovg_1.1_cts_rc10
+ifeq ($(USE_VDK), 1)
+MM06_DIR        := $(AQROOT)/test/es11/common/3DMarkMobile06/configuration/vdk
+else
+MM06_DIR        := $(ES11_TEST_DIR)/3DMarkMobile06
+endif
+MM07_DIR        := $(ES2X_TEST_DIR)/3DMarkMobileES2_RC_src
+MM07U_DIR       := $(ES2X_TEST_DIR)/3DMarkMobileES2_Update
+SM20_DIR        := $(AQROOT)/test/es20/SimulationMark_ES_2.0
+KANZI_DIR       := $(AQROOT)/test/es20/Kanzi_UI_demo/Kanzi_UI_src
+AB20_DIR        := $(ES2X_TEST_DIR)/Automotive
+JRC_DIR         := $(ES2X_TEST_DIR)/JRC
+GFX_TEST_DIR    := $(AQROOT)/test/gfx
+ES11_UNIT_DIR   := $(AQROOT)/test/es11/common/UnitTest
+ES11_EXTERN_DIR := $(AQROOT)/test/es11/extern
+VG11_UNIT_DIR   := $(AQROOT)/test/vg11/UnitTest
+VG11_EXTERN_DIR := $(AQROOT)/test/vg11/extern
+
+# third party resources
+DFB_DIR ?= $(TOOL_DIR)/dfb
+
+TEXTURE5_DIR    := $(ES2X_TEST_DIR)/texture5
+TEXTURE7_DIR    := $(ES2X_TEST_DIR)/texture7
+
+ACTINIUM_DIR    := $(ES2X_TEST_DIR)/actinium
+VVLAUNCHER_DIR  := $(ES2X_TEST_DIR)/vv_launcher
+
+VIDEOCUBE_DIR	:= $(AQROOT)/test/es11/extern/VideoCube
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/common.target
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/common.target
@@ -0,0 +1,108 @@
+##############################################################################
+#  
+#    Copyright (C) 2005 - 2010 by Vivante Corp.
+#  
+#    This program is free software; you can redistribute it and/or modify
+#    it under the terms of the GNU General Public License as published by
+#    the Free Software Foundation; either version 2 of the license, or
+#    (at your option) any later version.
+#  
+#    This program is distributed in the hope that it will be useful,
+#    but WITHOUT ANY WARRANTY; without even the implied warranty of
+#    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+#    GNU General Public Lisence for more details.
+#  
+#    You should have received a copy of the GNU General Public License
+#    along with this program; if not write to the Free Software
+#    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+#  
+##############################################################################
+
+
+################################################################################
+# Define a shortcut for the main target.
+SO_SUFFIX = .1
+TARGET_OUTPUT = $(OBJ_DIR)/$(TARGET_NAME)
+
+################################################################################
+# Specify targets.
+
+all: $(TARGET_OUTPUT)
+
+clean:
+	@rm -f $(PREREQUISITES)
+	@rm -rf $(OBJ_DIR)/* $(OBJ_DIR)
+	@rm -rf $(CLEAN_EXTRA)
+
+install: $(TARGET_OUTPUT)
+ifneq ($(INSTALL_DIR),)
+	@mkdir -p $(INSTALL_DIR)
+	@-cp $(TARGET_OUTPUT) $(INSTALL_DIR)
+endif
+
+ifeq ($(COMMON_LITE), 1)
+    PREREQUISITES	:= .Prerequisites_cl
+else
+    PREREQUISITES	:= .Prerequisites
+endif
+
+ifeq ($(DEBUG), 1)
+    PREREQUISITES	:= $(PREREQUISITES)_d
+else
+    PREREQUISITES	:= $(PREREQUISITES)_r
+endif
+
+MAKEFILE_NAME	= makefile.linux
+
+ifeq ($(STATIC_LINK),1)
+ifneq ($(USE_ARMCC), 1)
+  PFLAGS += -static
+else
+  PFLAGS += -L--no_search_dynamic_libraries
+endif
+endif
+
+ifeq ($(PROGRAM), 1)
+$(TARGET_OUTPUT): $(PREREQUISITES) $(OBJECTS)
+ifeq ($(SRC_CXX),)
+	$(CC) $(PFLAGS) $(OBJECTS) $(LIBS) -o $(TARGET_OUTPUT)
+else
+	$(CXX) $(PFLAGS) $(OBJECTS) $(LIBS) -o $(TARGET_OUTPUT)
+endif
+
+ifneq ($(USE_ARMCC), 1)
+ifneq ($(DEBUG), 1)
+	$(STRIP) $(TARGET_OUTPUT)
+endif
+endif
+endif
+
+ifeq ($(DYNAMIC), 1)
+ifeq ($(USE_ARMCC), 1)
+LFLAGS += --shared -L--soname=,$(TARGET_NAME)$(SO_SUFFIX)
+else
+LFLAGS += -Wall -shared -Wl,-soname,$(TARGET_NAME)$(SO_SUFFIX)
+endif
+$(TARGET_OUTPUT): $(PREREQUISITES) $(OBJECTS)
+	$(CC) $(LFLAGS) $(OBJECTS) $(LIBS) -o $(TARGET_OUTPUT)
+endif
+
+ifeq ($(STATIC), 1)
+$(TARGET_OUTPUT): $(PREREQUISITES) $(OBJECTS)
+	$(AR) -r $(TARGET_OUTPUT) $(OBJECTS)
+ifneq ($(USE_ARMCC), 1)
+	$(RANLIB) $(TARGET_OUTPUT)
+endif
+endif
+
+$(PREREQUISITES): $(MAKEFILE_NAME)
+	@-mkdir -p $(OBJ_DIR)
+	@-touch $(PREREQUISITES)
+
+$(OBJ_DIR)/%.o: %.c $(PREREQUISITES)
+	@mkdir -p $(OBJ_DIR)
+	$(CC) -c $(CFLAGS) -o $@ $<
+
+$(OBJ_DIR)/%.o: %.cpp $(PREREQUISITES)
+	@mkdir -p $(OBJ_DIR)
+	$(CXX) -c $(CFLAGS) -o $@ $<
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/Android.mk.def
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/Android.mk.def
@@ -0,0 +1,92 @@
+##############################################################################
+#
+#    Copyright (c) 2005 - 2010 by Vivante Corp.  All rights reserved.
+#
+#    The material in this file is confidential and contains trade secrets
+#    of Vivante Corporation. This is proprietary information owned by
+#    Vivante Corporation. No part of this work may be disclosed,
+#    reproduced, copied, transmitted, or used in any way for any purpose,
+#    without the express written permission of Vivante Corporation.
+#
+##############################################################################
+#
+#
+##############################################################################
+
+
+#
+# Common include file for Android build
+#
+
+################################################################
+# Options.
+
+# CPU arch type. Could be 'arm' or 'mips'
+ARCH_TYPE 				    ?= arm
+FIXED_ARCH_TYPE				?=
+
+# CPU arch type.
+GPU_TYPE					?= XAQ2
+
+# Kernel directory
+export KERNEL_DIR			?= $(ANDROID_BUILD_TOP)/kernel/kernel
+
+# Cross compiler for building kernel module
+export CROSS_COMPILE		?= arm-eabi-
+
+# Driver build options.
+NO_DMA_COHERENT				?= 1
+ENABLE_GPU_CLOCK_BY_DRIVER	?= 1
+ENABLE_ARM_L2_CACHE			?= 1
+USE_PLATFORM_DRIVER			?= 1
+USE_NEW_LINUX_SIGNAL		?= 0
+USE_PROFILER				?= 0
+
+
+################################################################
+# Target INCLUDES.
+
+C_INCLUDES	:= $(TARGET_C_INCLUDES) $(filter-out %/opengl/include,$(TARGET_PROJECT_INCLUDES))
+
+
+################################################################
+# Target CFLAGS.
+
+CFLAGS		:= $(TARGET_GLOBAL_CFLAGS) $(TARGET_$(ARCH_TYPE)_CFLAGS)
+
+CFLAGS		+= -DANDROID=1 -DEGL_API_ANDROID=1 -DUSE_VDK=0 -DLINUX
+CFLAGS		+= -fno-strict-aliasing -fno-short-enums
+
+ifeq ($(PLATFORM_SDK_VERSION), 7)
+CFLAGS		+= -DANDROID_VERSION_ECLAIR
+else
+$(error This makefile is only for eclair)
+endif
+
+ifeq ($(USE_PROFILER), 1)
+CFLAGS		+= -DVIVANTE_PROFILER=1
+else
+CFLAGS		+= -DVIVANTE_PROFILER=0
+endif
+
+
+################################################################
+# Tag.
+
+TAG					:= VIVANTE
+
+################################################################
+# Variables.
+
+export AQROOT				:= $(abspath $(call my-dir))
+export AQARCH				:= $(AQROOT)/arch/$(GPU_TYPE)
+
+GC_HAL_USER_DIR				:= hal/user
+GC_HAL_ARCH_USER_DIR		:= arch/$(GPU_TYPE)/hal/user
+GC_HAL_OS_USER_DIR			:= hal/os/linux/user
+GC_HAL_OPTIMIZER_DIR		:= hal/optimizer
+GC_EGL_DIR					:= driver/openGL/egl
+GC_GLES11_DIR				:= driver/openGL/libGLESv11
+GC_GLESv2X_DIR				:= driver/openGL/libGLESv2x/driver
+GC_GLESv2SC_DIR				:= driver/openGL/libGLESv2x/compiler/libGLESv2SC
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/config
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/config
@@ -0,0 +1,24 @@
+##############################################################################
+#
+#    Copyright (C) 2005 - 2010 by Vivante Corp.
+#
+#    This program is free software; you can redistribute it and/or modify
+#    it under the terms of the GNU General Public License as published by
+#    the Free Software Foundation; either version 2 of the license, or
+#    (at your option) any later version.
+#
+#    This program is distributed in the hope that it will be useful,
+#    but WITHOUT ANY WARRANTY; without even the implied warranty of
+#    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+#    GNU General Public Lisence for more details.
+#
+#    You should have received a copy of the GNU General Public License
+#    along with this program; if not write to the Free Software
+#    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+#
+##############################################################################
+
+
+ARCH_TYPE	?= arm
+SDK_DIR		?= $(AQROOT)/build/sdk
+USE_3D_VG	= 1
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/Makefile
@@ -0,0 +1,180 @@
+PWD := $(srctree)/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src
+
+ARCH=arm
+#CROSS_COMPILE ?= /usr/local/arm-marvell-linux-gnueabi/bin/arm-marvell-linux-gnueabi-
+GPU_TYPE = unified
+KERNEL_DIR = ${PWD}/linux
+
+DEBUG = 0
+ABI = aapcs-linux
+ENABLE_ARM_L2_CACHE = 1
+NO_DMA_COHERENT = 1
+CONFIG_DOVE_GPU = 1
+ANDROID = 0
+ENABLE_GPU_CLOCK_BY_DRIVER = 0
+
+BUILD_OPTIONS  = DEBUG=${DEBUG}
+BUILD_OPTIONS += ABI=${ABI}
+BUILD_OPTIONS += ENABLE_ARM_L2_CACHE=${ENABLE_ARM_L2_CACHE}
+BUILD_OPTIONS += NO_DMA_COHERENT=${NO_DMA_COHERENT}
+BUILD_OPTIONS += CONFIG_DOVE_GPU=${CONFIG_DOVE_GPU}
+BUILD_OPTIONS += ANDROID=${ANDROID}
+BUILD_OPTIONS += ENABLE_GPU_CLOCK_BY_DRIVER=${ENABLE_GPU_CLOCK_BY_DRIVER}
+
+#AQROOT := ${PWD}
+AQROOT := $(srctree)/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src
+AQARCH=${PWD}/arch/${GPU_TYPE}
+GCX00_COMPILE_ENV = ${BUILD_OPTIONS} ARCH=${ARCH} CROSS_COMPILE=${CROSS_COMPILE}\
+	AQROOT=${PWD}  AQARCH=${PWD}/arch/${GPU_TYPE} KERNEL_DIR=${KERNEL_DIR}
+
+# from Kbuild
+include $(AQROOT)/config
+
+DRIVER_OUT_DIR = hal/driver
+KERNEL_DIR ?= $(TOOL_DIR)/kernel
+
+OS_KERNEL_DIR   := hal/os/linux/kernel
+ARCH_KERNEL_DIR := arch/$(notdir $(AQARCH))/hal/kernel
+HAL_KERNEL_DIR  := hal/kernel
+
+EXTRA_CFLAGS += -Werror
+
+OBJS := $(OS_KERNEL_DIR)/gc_hal_kernel_debug.o \
+        $(OS_KERNEL_DIR)/gc_hal_kernel_device.o \
+        $(OS_KERNEL_DIR)/gc_hal_kernel_driver.o \
+        $(OS_KERNEL_DIR)/gc_hal_kernel_linux.o \
+        $(OS_KERNEL_DIR)/gc_hal_kernel_os.o
+
+ifeq ($(USE_3D_VG), 1)
+
+OBJS += $(HAL_KERNEL_DIR)/gc_hal_kernel.o \
+        $(HAL_KERNEL_DIR)/gc_hal_kernel_command.o \
+        $(HAL_KERNEL_DIR)/gc_hal_kernel_event.o \
+        $(HAL_KERNEL_DIR)/gc_hal_kernel_heap.o \
+        $(HAL_KERNEL_DIR)/gc_hal_kernel_mmu.o \
+        $(HAL_KERNEL_DIR)/gc_hal_kernel_video_memory.o
+
+OBJS += $(ARCH_KERNEL_DIR)/gc_hal_kernel_hardware.o
+
+else
+
+OBJS += $(HAL_KERNEL_DIR)/gc_hal_kernel.o \
+        $(HAL_KERNEL_DIR)/gc_hal_kernel_command.o \
+        $(HAL_KERNEL_DIR)/gc_hal_kernel_heap.o \
+        $(HAL_KERNEL_DIR)/gc_hal_kernel_interrupt.o \
+        $(HAL_KERNEL_DIR)/gc_hal_kernel_mmu.o \
+        $(HAL_KERNEL_DIR)/gc_hal_kernel_video_memory.o
+
+OBJS += $(ARCH_KERNEL_DIR)/gc_hal_kernel_hardware.o \
+        $(ARCH_KERNEL_DIR)/gc_hal_kernel_hardware_command.o
+
+endif
+
+ifeq ($(KERNELRELEASE), )
+
+.PHONY: all clean install
+
+# Define targets.
+all:
+	@mkdir -p $(DRIVER_OUT_DIR)
+	@make V=$(V) ARCH=$(ARCH_TYPE) -C $(KERNEL_DIR) SUBDIRS=`pwd` modules
+
+clean:
+	@rm -rf $(OBJS)
+	@rm -rf $(DRIVER_OUT_DIR)
+	@rm -rf modules.order Module.symvers
+
+install: all
+	@mkdir -p $(SDK_DIR)/drivers
+	@cp $(DRIVER_OUT_DIR)/galcore.ko $(SDK_DIR)/drivers
+
+else
+
+
+EXTRA_CFLAGS += -DLINUX -DDRIVER
+
+ifeq ($(ENUM_WORKAROUND), 1)
+EXTRA_CFLAGS += -DENUM_WORKAROUND=1
+else
+EXTRA_CFLAGS += -DENUM_WORKAROUND=0
+endif
+
+ifeq ($(FLAREON),1)
+EXTRA_CFLAGS += -DFLAREON
+endif
+
+ifeq ($(DEBUG), 1)
+EXTRA_CFLAGS += -DDBG=1 -DDEBUG -D_DEBUG
+else
+EXTRA_CFLAGS += -DDBG=0
+endif
+
+ifeq ($(NO_DMA_COHERENT), 1)
+EXTRA_CFLAGS += -DNO_DMA_COHERENT
+endif
+
+ifeq ($(ENABLE_ARM_L2_CACHE), 1)
+EXTRA_CFLAGS += -DENABLE_ARM_L2_CACHE=1
+else
+EXTRA_CFLAGS += -DENABLE_ARM_L2_CACHE=0
+endif
+
+ifeq ($(CONFIG_DOVE_GPU), 1)
+EXTRA_CFLAGS += -DCONFIG_DOVE_GPU=1
+endif
+
+ifneq ($(USE_PLATFORM_DRIVER), 0)
+EXTRA_CFLAGS += -DUSE_PLATFORM_DRIVER=1
+else
+EXTRA_CFLAGS += -DUSE_PLATFORM_DRIVER=0
+endif
+
+ifeq ($(USE_PROFILER), 1)
+EXTRA_CFLAGS += -DVIVANTE_PROFILER=1
+else
+EXTRA_CFLAGS += -DVIVANTE_PROFILER=0
+endif
+
+ifeq ($(ANDROID), 1)
+EXTRA_CFLAGS += -DANDROID=1
+endif
+
+ifeq ($(ENABLE_GPU_CLOCK_BY_DRIVER), 1)
+EXTRA_CFLAGS += -DENABLE_GPU_CLOCK_BY_DRIVER=1
+else
+EXTRA_CFLAGS += -DENABLE_GPU_CLOCK_BY_DRIVER=0
+endif
+
+ifeq ($(USE_NEW_LINUX_SIGNAL), 1)
+EXTRA_CFLAGS += -DUSE_NEW_LINUX_SIGNAL=1
+else
+EXTRA_CFLAGS += -DUSE_NEW_LINUX_SIGNAL=0
+endif
+
+ifeq ($(NO_USER_DIRECT_ACCESS_FROM_KERNEL), 1)
+EXTRA_CFLAGS += -DNO_USER_DIRECT_ACCESS_FROM_KERNEL=1
+else
+EXTRA_CFLAGS += -DNO_USER_DIRECT_ACCESS_FROM_KERNEL=0
+endif
+
+EXTRA_CFLAGS += -I$(AQROOT)/hal/inc
+EXTRA_CFLAGS += -I$(AQROOT)/hal/kernel
+EXTRA_CFLAGS += -I$(AQARCH)/hal/kernel
+EXTRA_CFLAGS += -I$(AQARCH)/cmodel/inc
+EXTRA_CFLAGS += -I$(AQROOT)/hal/user
+
+galcore-objs  = $(OBJS)
+obj-$(CONFIG_DOVE_GC600) = galcore.o
+
+endif
+
+
+#all:
+#	make ${GCX00_COMPILE_ENV} -C ${PWD} -f Kbuild
+#	cp $(PWD)/hal/driver/galcore.ko .
+
+#clean:
+#	make ${GCX00_COMPILE_ENV} -C ${PWD} -f Kbuild clean
+
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/Makefile.linux.def
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/Makefile.linux.def
@@ -0,0 +1,324 @@
+##############################################################################
+#  
+#    Copyright (C) 2002 - 2008 by Vivante Corp.
+#  
+#    This program is free software; you can redistribute it and/or modify
+#    it under the terms of the GNU General Public Lisence as published by
+#    the Free Software Foundation; either version 2 of the license, or
+#    (at your option) any later version.
+#  
+#    This program is distributed in the hope that it will be useful,
+#    but WITHOUT ANY WARRANTY; without even the implied warranty of
+#    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+#    GNU General Public Lisence for more details.
+#  
+#    You should have received a copy of the GNU General Public License
+#    along with this program; if not write to the Free Software
+#    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+#  
+##############################################################################
+
+
+#
+# Common inlude file for Linux build.
+#
+
+################################################################
+# Arch.
+
+ARCH_TYPE       ?= arm
+CPU_TYPE        ?= arm920
+CPU_ARCH        ?= 0
+STATIC_LINK     ?= 0
+EGL_API_FB      ?= 0
+USE_VDK         ?= 0
+USE_PROFILER    ?= 0
+USE_SW_FB       ?= 0
+USE_3D_VG		=1
+ABI             ?= 0
+ANDROID         ?= 0
+EGL_API_ANDROID ?= 0
+ANDROID_VERSION_ECLAIR  ?= 0
+ENUM_WORKAROUND ?= 0
+ENDIANNESS		?= 0
+QNX             ?= 0
+LINUX_OABI		?= 0
+
+ifeq ($(LINUX_OABI), 1)
+ABI             ?= 0
+else
+ABI             ?= aapcs-linux
+endif
+
+################################################################
+# Toolchain.
+
+CROSS_COMPILE ?= arm-none-linux-gnueabi-
+
+CC     := $(CROSS_COMPILE)gcc
+CXX    := $(CROSS_COMPILE)g++
+AR     := $(CROSS_COMPILE)ar
+AS     := $(CROSS_COMPILE)as
+LD     := $(CROSS_COMPILE)ld
+RANLIB := $(CROSS_COMPILE)ranlib
+STRIP  := $(CROSS_COMPILE)strip
+
+################################################################
+# Make command.
+
+MAKE     = make --makefile=Makefile.linux
+DRV_MAKE ?= make --makefile=Kbuild
+
+################################################################
+# Resource.
+
+TOOL_DIR     ?= /home/software/Linux
+ANDROID_HOME ?=
+KERNEL_DIR   ?= $(TOOL_DIR)/kernel
+X11_ARM_DIR  ?= $(TOOL_DIR)/X11_ARM
+
+################################################################
+# Target directory.
+
+ifeq ($(DEBUG), 1)
+OBJ_DIR	?= bin_d
+else
+OBJ_DIR	?= bin_r
+endif
+
+################################################################
+# Force to use the new compiler.
+
+SC2X_NEW ?= 1
+ES11_NEW ?= 1
+
+################################################################
+# Release directory.
+
+SDK_DIR ?= $(AQROOT)/build/sdk
+VIVANTE_SDK_DIR ?= $(SDK_DIR)
+VIVANTE_SDK_INC ?= $(VIVANTE_SDK_DIR)/include
+VIVANTE_SDK_LIB ?= $(VIVANTE_SDK_DIR)/drivers
+
+################################################################
+# Force to use dma_coherent_* stuff.
+
+NO_DMA_COHERENT ?= 0
+
+################################################################
+# Set this value to 1 if you are using ARM L2 cache.
+
+ENABLE_ARM_L2_CACHE	?= 0
+
+################################################################
+# Set this value to 1 if you are using DOVE board.
+CONFIG_DOVE_GPU		?= 0
+
+###############################################################
+# Common CFLAGS.
+ifeq ($(ENUM_WORKAROUND), 1)
+    CFLAGS += -DENUM_WORKAROUND=1
+else
+    CFLAGS += -DENUM_WORKAROUND=0
+endif
+
+ifeq ($(ABI), 0)
+else
+	CFLAGS += -mabi=$(ABI)
+endif
+
+ifeq ($(ENDIANNESS), 0)
+else
+    CFLAGS += -m$(ENDIANNESS)
+	LFLAGS += -m$(ENDIANNESS)
+	PFLAGS += -m$(ENDIANNESS)
+endif
+
+ifeq ($(ANDROID), 1)
+    USE_VDK = 0
+
+    ifeq ($(ARCH_TYPE), arm)
+	CFLAGS += -I$(ANDROID_HOME)/bionic/libstdc++/include -I$(ANDROID_HOME)/bionic/libc/arch-arm/include -I$(ANDROID_HOME)/bionic/libc/include -I$(ANDROID_HOME)/bionic/libc/kernel/common/ -I$(ANDROID_HOME)/bionic/libc/kernel/arch-arm -I$(ANDROID_HOME)/bionic/libm/include -I$(ANDROID_HOME)/bionic/libm/include/arch/arm -I$(ANDROID_HOME)/bionic/libthread_db/include -I$(ANDROID_HOME)/system/core/include -I$(ANDROID_HOME)/frameworks/base/include 
+        CFLAGS += -DANDROID -D__ARM_ARCH_5__ -D__ARM_ARCH_5T__ -D__ARM_ARCH_5E__ -D__ARM_ARCH_5TE__ -fno-short-enums
+    endif
+
+    ifeq ($(ARCH_TYPE), xburst)
+        CFLAGS += -I$(ANDROID_HOME)/bionic/libstdc++/include -I$(ANDROID_HOME)/bionic/libc/arch-xburst/include -I$(ANDROID_HOME)/bionic/libc/include -I$(ANDROID_HOME)/bionic/libc/kernel/common/ -I$(ANDROID_HOME)/bionic/libc/kernel/arch-xburst -I$(ANDROID_HOME)/bionic/libm/include -I$(ANDROID_HOME)/bionic/libm/include/mips -I$(ANDROID_HOME)/bionic/libthread_db/include
+    endif
+
+    ifeq ($(EGL_API_ANDROID), 1)
+        CFLAGS += -DEGL_API_ANDROID
+    endif
+
+    ifeq ($(ANDROID_VERSION_ECLAIR), 1)
+        CFLAGS += -DANDROID_VERSION_ECLAIR
+    endif
+endif
+
+ifeq ($(QNX), 1)
+	CFLAGS += -D__QNXNTO__   
+else
+	CFLAGS += -DLINUX
+endif
+
+ifeq ($(LINUX_OABI), 1)
+	CFLAGS += -DLINUX_OABI
+endif
+
+ifeq ($(FLAREON),1)
+	CFLAGS += -Wall -D_REENTRANT -fno-strict-aliasing
+else
+	CFLAGS += -Wall -D_REENTRANT -fno-strict-aliasing
+endif
+
+ifeq ($(CPU_TYPE), 0)
+else
+	CFLAGS += -mcpu=$(CPU_TYPE)
+	AFLAGS += -mcpu=$(CPU_TYPE)
+endif
+
+ifeq ($(CPU_ARCH), 0)
+else
+	CFLAGS += -march=$(CPU_ARCH)
+	AFLAGS += -march=$(CPU_ARCH)
+endif
+
+ifeq ($(DEBUG), 1)
+	CFLAGS += -g -fPIC -O0 -DDEBUG -D_DEBUG
+else
+	CFLAGS += -O2 -fPIC
+endif
+
+ifeq ($(EGL_API_FB), 1)
+	CFLAGS += -DEGL_API_FB
+endif
+
+ifeq ($(STATIC_LINK), 1)
+	CFLAGS += -DSTATIC_LINK
+endif
+
+ifeq ($(USE_VDK), 1)
+	CFLAGS += -DUSE_VDK=1 -DUSE_SW_FB=$(USE_SW_FB)
+else
+	CFLAGS += -DUSE_VDK=0 -DUSE_SW_FB=$(USE_SW_FB)
+endif
+
+ifeq ($(USE_FB_DOUBLE_BUFFER), 1)
+	CFLAGS += -DUSE_FB_DOUBLE_BUFFER=1
+else
+	CFLAGS += -DUSE_FB_DOUBLE_BUFFER=0
+endif
+
+ifeq ($(USE_NEW_LINUX_SIGNAL), 1)
+	CFLAGS += -DUSE_NEW_LINUX_SIGNAL=1
+else
+	CFLAGS += -DUSE_NEW_LINUX_SIGNAL=0
+endif
+
+ifeq ($(MRVL_NATIVE_IMAGE_KHR_FOR_CHROME),1)
+    CFLAGS += -DMRVL_NATIVE_IMAGE_KHR_FOR_CHROME=1
+else
+    CFLAGS += -DMRVL_NATIVE_IMAGE_KHR_FOR_CHROME=0
+endif
+
+CXXFLAGS += -fno-short-enums
+
+################################################################################
+# Build with profiler
+ifeq ($(USE_PROFILER),1)
+CFLAGS += -DVIVANTE_PROFILER=1
+else
+CFLAGS += -DVIVANTE_PROFILER=0
+endif
+
+################################################################
+# Module directories.
+
+# drivers
+GAL_DIR         := $(AQROOT)/hal
+ifeq ($(ES11_NEW), 1)
+GLES11_DIR      := $(AQROOT)/driver/openGL/libGLESv11
+else
+GLES11_DIR      := $(AQROOT)/driver/openGL/es11/driver
+endif
+EGL_DIR         := $(AQROOT)/driver/openGL/egl
+GLES2X_DIR      := $(AQROOT)/driver/openGL/libGLESv2x
+ifeq ($(USE_3D_VG), 1)
+VG11_DIR        := $(AQROOT)/driver/openVG/vg11
+OVG11_DIR       := $(AQROOT)/driver/openVG/vg11/driver
+else
+VG11_DIR        := $(AQROOT)/driver/openGL/libOpenVG
+OVG11_DIR       := $(AQROOT)/driver/openGL/libOpenVG
+endif
+GFX_DIR         := $(AQROOT)/driver/gfx
+
+ifeq ($(SC2X_NEW), 1)
+SC2X_LIB_DIR    := $(GLES2X_DIR)/compiler/libGLESv2SC/entry
+else
+SC2X_LIB_DIR    := $(GLES2X_DIR)/slc/glslang/MachineIndependent/compiler
+endif
+
+GCU_DIR		:= $(AQROOT)/gcu/proj/linux
+
+# applications
+EGL_TEST_DIR	:= $(AQROOT)/test/egl
+ES11_TEST_DIR   := $(AQROOT)/test/es11/Linux
+ES2X_TEST_DIR   := $(AQROOT)/test/es20
+ES2X_EXTERN_DIR := $(AQROOT)/test/es20/extern
+ES20_TEST_DIR   := $(AQROOT)/sdk/samples/es20
+
+ifeq ($(USE_VDK), 0)
+TUTORIAL_DIR    := $(ES11_TEST_DIR)
+endif
+VDK_TEST_DIR    := $(AQROOT)/sdk/samples/vdk
+HAL_TEST_DIR    := $(AQROOT)/sdk
+HAL_CUSTOM_DIR	:= $(AQROOT)/test/hal/Linux/custom
+CHIPINFO_DIR    := $(AQROOT)/test/hal/common/chipinfo
+VDK_DIR         := $(AQROOT)/sdk/vdk
+
+ifeq ($(USE_VDK), 1)
+CONFORM_DIR     := $(AQROOT)/test/es11/conform
+else
+# old es11 conformce test was removed
+# $(AQROOT)/driver/openGL/es11/test/conform
+CONFORM_DIR	    := 
+endif
+
+GLBES11_DIR     := $(AQROOT)/test/es11/GLBenchmark_ES1.1v2
+GLBES20_DIR     := $(AQROOT)/test/es20/GLBenchmark2_RC2
+GLBESNAVI11_DIR := $(AQROOT)/test/es11/GLBenchmark_Navi_Beta2/es11
+GLBESNAVI20_DIR := $(AQROOT)/test/es11/GLBenchmark_Navi_Beta2/es20
+GTF_DIR         := $(AQROOT)/test/es20/conform/GTF_ES/glsl/GTF
+VGMARK_DIR      := $(AQROOT)/test/vg/common/VGMark_10_src
+VGMARK11_DIR    := $(AQROOT)/test/vg11/VGMark11/VGMark11_addendum
+VGCTS_DIR       := $(AQROOT)/test/vg/ovg_1.0.1_cts_rc10
+VGCTS11_DIR     := $(AQROOT)/test/vg/ovg_1.1_cts_rc10
+ifeq ($(USE_VDK), 1)
+MM06_DIR        := $(AQROOT)/test/es11/common/3DMarkMobile06/configuration/vdk
+else
+MM06_DIR        := $(ES11_TEST_DIR)/3DMarkMobile06
+endif
+MM07_DIR        := $(ES2X_TEST_DIR)/3DMarkMobileES2_RC_src
+MM07U_DIR       := $(ES2X_TEST_DIR)/3DMarkMobileES2_Update
+SM20_DIR        := $(AQROOT)/test/es20/SimulationMark_ES_2.0
+KANZI_DIR       := $(AQROOT)/test/es20/Kanzi_UI_demo/Kanzi_UI_src
+AB20_DIR        := $(ES2X_TEST_DIR)/Automotive
+JRC_DIR         := $(ES2X_TEST_DIR)/JRC
+GFX_TEST_DIR    := $(AQROOT)/test/gfx
+ES11_UNIT_DIR   := $(AQROOT)/test/es11/common/UnitTest
+ES11_EXTERN_DIR := $(AQROOT)/test/es11/extern
+VG11_UNIT_DIR   := $(AQROOT)/test/vg11/UnitTest
+VG11_EXTERN_DIR := $(AQROOT)/test/vg11/extern
+
+# third party resources
+DFB_DIR ?= $(TOOL_DIR)/dfb
+
+TEXTURE5_DIR    := $(ES2X_TEST_DIR)/texture5
+TEXTURE7_DIR    := $(ES2X_TEST_DIR)/texture7
+
+ACTINIUM_DIR    := $(ES2X_TEST_DIR)/actinium
+VVLAUNCHER_DIR  := $(ES2X_TEST_DIR)/vv_launcher
+
+VIDEOCUBE_DIR	:= $(AQROOT)/test/es11/extern/VideoCube
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/init_ko.sh
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/init_ko.sh
@@ -0,0 +1,23 @@
+#!/bin/sh
+
+export MARVELL_GCC=1
+
+if [ "$MARVELL_GCC" = "1" ];then
+export CROSS_COMPILE=arm-marvell-linux-gnueabi-
+export LIB_DIR=/usr/local/arm-marvell-linux-gnueabi/arm-marvell-linux-gnueabi/lib
+export PATH=/usr/local/arm-marvell-linux-gnueabi/bin:$PATH
+else
+export CROSS_COMPILE=arm-linux-
+export LIB_DIR=/usr/local/arm-linux-4.1.1/arm-iwmmxt-linux-gnueabi/lib
+export PATH=/usr/local/arm-linux-4.1.1/bin:$PATH
+fi
+
+export ARCH=arm
+export AQROOT=$PWD
+export AQARCH=$PWD/arch/XAQ2
+export TOOL_DIR=$AQROOT/../resource
+export KERNEL_DIR=$TOOL_DIR/linux-2.6.28
+
+
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/linux
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/linux
@@ -0,0 +1 @@
+/vobs/clone/avd1
\ No newline at end of file
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/makefile.linux
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/makefile.linux
@@ -0,0 +1,46 @@
+##############################################################################
+#
+#    Copyright (c) 2005 - 2010 by Vivante Corp.  All rights reserved.
+#
+#    The material in this file is confidential and contains trade secrets
+#    of Vivante Corporation. This is proprietary information owned by
+#    Vivante Corporation. No part of this work may be disclosed,
+#    reproduced, copied, transmitted, or used in any way for any purpose,
+#    without the express written permission of Vivante Corporation.
+#
+##############################################################################
+#
+#
+##############################################################################
+
+
+
+#
+# Linux build file for the user level HAL libraries.
+#
+
+
+
+################################################################################
+# Define make command.
+
+MAKE = make --makefile=makefile.linux
+
+
+################################################################################
+# Define build directories.
+
+HAL_USER_DRV_ARCH	:= $(AQARCH)/hal/user
+ifeq ($(QNX), 1)
+HAL_USER_DRV_OS 	:= $(AQROOT)/hal/os/qnx/user
+else
+HAL_USER_DRV_OS 	:= $(AQROOT)/hal/os/linux/user
+endif
+HAL_USER_DRV_MAIN	:= $(AQROOT)/hal/user
+
+$(HAL_USER_DRV_MAIN): $(HAL_USER_DRV_ARCH) $(HAL_USER_DRV_OS)
+
+MODULES 	:= $(HAL_USER_DRV_ARCH) $(HAL_USER_DRV_OS) $(HAL_USER_DRV_MAIN)
+MAIN_MODULE	= $(HAL_USER_DRV_MAIN)
+
+include $(AQROOT)/common.node
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/Kbuild
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/Kbuild
@@ -0,0 +1,134 @@
+##############################################################################
+#  
+#    Copyright (C) 2002 - 2009 by Vivante Corp.
+#  
+#    This program is free software; you can redistribute it and/or modify
+#    it under the terms of the GNU General Public Lisence as published by
+#    the Free Software Foundation; either version 2 of the license, or
+#    (at your option) any later version.
+#  
+#    This program is distributed in the hope that it will be useful,
+#    but WITHOUT ANY WARRANTY; without even the implied warranty of
+#    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+#    GNU General Public Lisence for more details.
+#  
+#    You should have received a copy of the GNU General Public License
+#    along with this program; if not write to the Free Software
+#    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+#  
+##############################################################################
+
+
+
+#
+# Linux build file for kernel HAL driver.
+#
+
+include $(AQROOT)/config
+
+DRIVER_OUT_DIR = hal/driver
+KERNEL_DIR ?= $(TOOL_DIR)/kernel
+
+ifeq ($(KERNELRELEASE), )
+
+.PHONY: all clean install
+
+# Define targets.
+all:
+	@mkdir -p $(DRIVER_OUT_DIR)
+	@make V=$(V) ARCH=$(ARCH_TYPE) -C $(KERNEL_DIR) SUBDIRS=`pwd` modules
+
+clean:
+	@make V=$(V) ARCH=$(ARCH_TYPE) -C $(KERNEL_DIR) SUBDIRS=`pwd` clean
+	@rm -rf $(DRIVER_OUT_DIR)
+	@rm -rf modules.order Module.symvers
+
+install: all
+	@mkdir -p $(SDK_DIR)/drivers
+	@cp $(DRIVER_OUT_DIR)/galcore.ko $(SDK_DIR)/drivers
+
+else
+
+
+EXTRA_CFLAGS += -DLINUX -DDRIVER
+
+ifeq ($(ABI), 0)
+else
+EXTRA_CFLAGS += -mabi=$(ABI)
+endif
+
+ifeq ($(ENUM_WORKAROUND), 1)
+EXTRA_CFLAGS += -DENUM_WORKAROUND=1
+else
+EXTRA_CFLAGS += -DENUM_WORKAROUND=0
+endif
+
+ifeq ($(FLAREON),1)
+EXTRA_CFLAGS += -DFLAREON
+endif
+
+ifeq ($(DEBUG), 1)
+EXTRA_CFLAGS += -DDBG=1 -DDEBUG -D_DEBUG
+else
+EXTRA_CFLAGS += -DDBG=0
+endif
+
+ifeq ($(NO_DMA_COHERENT), 1)
+EXTRA_CFLAGS += -DNO_DMA_COHERENT
+endif
+
+ifeq ($(ENABLE_ARM_L2_CACHE), 1)
+EXTRA_CFLAGS += -DENABLE_ARM_L2_CACHE=1
+endif
+
+ifeq ($(CONFIG_DOVE_GPU), 1)
+EXTRA_CFLAGS += -DCONFIG_DOVE_GPU=1
+endif
+
+ifeq ($(USE_VIVANTE), 1)
+EXTRA_CFLAGS += -DVIVANTE_PROFILER=1
+else
+EXTRA_CFLAGS += -DVIVANTE_PROFILER=0
+endif
+
+ifeq ($(ANDROID), 1)
+EXTRA_CFLAGS += -DANDROID=1
+endif
+
+ifeq ($(ENABLE_GPU_CLOCK_BY_DRIVER), 1)
+EXTRA_CFLAGS += -DENABLE_GPU_CLOCK_BY_DRIVER=1
+else
+EXTRA_CFLAGS += -DENABLE_GPU_CLOCK_BY_DRIVER=0
+endif
+
+EXTRA_CFLAGS += -I$(AQROOT)/hal/inc
+EXTRA_CFLAGS += -I$(AQROOT)/hal/kernel
+EXTRA_CFLAGS += -I$(AQARCH)/hal/kernel
+EXTRA_CFLAGS += -I$(AQARCH)/cmodel/inc
+EXTRA_CFLAGS += -I$(AQROOT)/hal/user
+
+OS_KERNEL_DIR 	:= os/linux/kernel
+ARCH_KERNEL_DIR	:= ../arch/$(notdir $(AQARCH))/hal/kernel
+HAL_KERNEL_DIR	:= kernel
+
+OBJS	:=	$(OS_KERNEL_DIR)/Driver.o \
+          	$(OS_KERNEL_DIR)/Device.o \
+          	$(OS_KERNEL_DIR)/Debug.o \
+          	$(OS_KERNEL_DIR)/Kernel.o \
+          	$(OS_KERNEL_DIR)/Os.o
+
+OBJS	+=	$(HAL_KERNEL_DIR)/Command.o \
+		    $(HAL_KERNEL_DIR)/Event.o \
+			$(HAL_KERNEL_DIR)/Heap.o \
+			$(HAL_KERNEL_DIR)/Kernel.o \
+			$(HAL_KERNEL_DIR)/Mmu.o \
+			$(HAL_KERNEL_DIR)/VidMem.o
+
+OBJS	+=	$(ARCH_KERNEL_DIR)/Hardware.o
+
+obj-m = $(DRIVER_OUT_DIR)/galcore.o
+
+$(DRIVER_OUT_DIR)/galcore-objs  = $(OBJS)
+
+endif
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/user/gc_hal_user_compiler.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/user/gc_hal_user_compiler.h
@@ -0,0 +1,661 @@
+/****************************************************************************
+*
+*    Copyright (c) 2005 - 2010 by Vivante Corp.  All rights reserved.
+*
+*    The material in this file is confidential and contains trade secrets
+*    of Vivante Corporation. This is proprietary information owned by
+*    Vivante Corporation. No part of this work may be disclosed,
+*    reproduced, copied, transmitted, or used in any way for any purpose,
+*    without the express written permission of Vivante Corporation.
+*
+*****************************************************************************
+*
+*
+*****************************************************************************/
+
+
+
+
+#ifndef __gc_hal_user_compiler_h_
+#define __gc_hal_user_compiler_h_
+
+#include "gc_hal_compiler.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/******************************************************************************\
+|******************************* SHADER LANGUAGE ******************************|
+\******************************************************************************/
+
+/* Special register indices. */
+#define gcSL_POSITION			((gctSIZE_T) -1)
+#define gcSL_POINT_SIZE			((gctSIZE_T) -2)
+#define gcSL_COLOR				((gctSIZE_T) -3)
+#define gcSL_FRONT_FACING		((gctSIZE_T) -4)
+#define gcSL_POINT_COORD		((gctSIZE_T) -5)
+#define gcSL_POSITION_W			((gctSIZE_T) -6)
+
+/* Special code generation indices. */
+#define gcSL_CG_TEMP1			112
+#define gcSL_CG_TEMP1_X			113
+#define gcSL_CG_TEMP1_XY		114
+#define gcSL_CG_TEMP1_XYZ		115
+#define gcSL_CG_TEMP1_XYZW		116
+#define gcSL_CG_TEMP2			117
+#define gcSL_CG_TEMP2_X			118
+#define gcSL_CG_TEMP2_XY		119
+#define gcSL_CG_TEMP2_XYZ		120
+#define gcSL_CG_TEMP2_XYZW		121
+#define gcSL_CG_TEMP3			122
+#define gcSL_CG_TEMP3_X			123
+#define gcSL_CG_TEMP3_XY		124
+#define gcSL_CG_TEMP3_XYZ		125
+#define gcSL_CG_TEMP3_XYZW		126
+#define gcSL_CG_CONSTANT		127
+
+/* 4-bit enable bits. */
+#define gcdSL_TARGET_Enable					 0 : 4
+/* Indexed addressing mode of type gcSL_INDEXED. */
+#define gcdSL_TARGET_Indexed				 4 : 4
+/* 4-bit condition of type gcSL_CONDITION. */
+#define gcdSL_TARGET_Condition				 8 : 4
+/* Target format of type gcSL_FORMAT. */
+#define gcdSL_TARGET_Format					12 : 2
+/* Flag whether source0 index has been patched. */
+#define gcdSL_TARGET_Source0Patched			14 : 1
+/* Flag whether source1 index has been patched. */
+#define gcdSL_TARGET_Source1Patched			15 : 1
+
+#define gcmSL_TARGET_GET(Value, Field) \
+	gcmGETBITS(Value, gctUINT16, gcdSL_TARGET_##Field)
+
+#define gcmSL_TARGET_SET(Value, Field, NewValue) \
+	gcmSETBITS(Value, gctUINT16, gcdSL_TARGET_##Field, NewValue)
+
+/* Register type of type gcSL_TYPE. */
+#define gcdSL_SOURCE_Type					 0 : 3
+/* Indexed register swizzle. */
+#define gcdSL_SOURCE_Indexed				 3 : 3
+/* Source format of type gcSL_FORMAT. */
+#define gcdSL_SOURCE_Format					 6 : 2
+/* Swizzle fields of type gcSL_SWIZZLE. */
+#define gcdSL_SOURCE_Swizzle				 8 : 8
+#define gcdSL_SOURCE_SwizzleX				 8 : 2
+#define gcdSL_SOURCE_SwizzleY				10 : 2
+#define gcdSL_SOURCE_SwizzleZ				12 : 2
+#define gcdSL_SOURCE_SwizzleW				14 : 2
+
+#define gcmSL_SOURCE_GET(Value, Field) \
+	gcmGETBITS(Value, gctUINT16, gcdSL_SOURCE_##Field)
+
+#define gcmSL_SOURCE_SET(Value, Field, NewValue) \
+	gcmSETBITS(Value, gctUINT16, gcdSL_SOURCE_##Field, NewValue)
+
+/* Index of register. */
+#define gcdSL_INDEX_Index					 0 : 14
+/* Constant value. */
+#define gcdSL_INDEX_ConstValue				14 :  2
+
+#define gcmSL_INDEX_GET(Value, Field) \
+	gcmGETBITS(Value, gctUINT16, gcdSL_INDEX_##Field)
+
+#define gcmSL_INDEX_SET(Value, Field, NewValue) \
+	gcmSETBITS(Value, gctUINT16, gcdSL_INDEX_##Field, NewValue)
+
+/* Structure that defines a gcSL instruction. */
+typedef struct _gcSL_INSTRUCTION
+{
+	/* Opcode of type gcSL_OPCODE. */
+	gctUINT16					opcode;
+
+	/* Opcode condition and target write enable bits of type gcSL_TARGET. */
+	gctUINT16					temp;
+
+	/* 16-bit temporary register index. */
+	gctUINT16					tempIndex;
+
+	/* Indexed register for destination. */
+	gctUINT16					tempIndexed;
+
+	/* Type of source 0 operand of type gcSL_SOURCE. */
+	gctUINT16					source0;
+
+	/* 16-bit register index for source 0 operand of type gcSL_INDEX. */
+	gctUINT16					source0Index;
+
+	/* Indexed register for source 0 operand. */
+	gctUINT16					source0Indexed;
+
+	/* Type of source 1 operand of type gcSL_SOURCE. */
+	gctUINT16					source1;
+
+	/* 16-bit register index for source 1 operand of type gcSL_INDEX. */
+	gctUINT16					source1Index;
+
+	/* Indexed register for source 1 operand. */
+	gctUINT16					source1Indexed;
+}
+* gcSL_INSTRUCTION;
+
+/******************************************************************************\
+|*********************************** SHADERS **********************************|
+\******************************************************************************/
+
+/* Structure the defines an attribute (input) for a shader. */
+struct _gcATTRIBUTE
+{
+	/* The object. */
+	gcsOBJECT					object;
+
+	/* Index of the attribute. */
+	gctUINT16					index;
+
+	/* Type of the attribute. */
+	gcSHADER_TYPE				type;
+
+	/* Number of array elements for this attribute. */
+	gctSIZE_T					arraySize;
+
+	/* Flag to indicate this attribute is used as a texture coordinate. */
+	gctBOOL						isTexture;
+
+	/* Flag to indicate this attribute is used as a position. */
+	gctBOOL						isPosition;
+
+	/* Flag to indicate this attribute is enabeld or not. */
+	gctBOOL						enabled;
+
+	/* Assigned input register index. */
+	gctINT						inputIndex;
+
+	/* Length of the attribute name. */
+	gctSIZE_T					nameLength;
+
+	/* The attribute name. */
+	char						name[1];
+};
+
+/* Sampel structure, but inside a binary. */
+typedef struct _gcBINARY_ATTRIBUTE
+{
+	/* Type for this attribute of type gcATTRIBUTE_TYPE. */
+	gctINT8						type;
+
+	/* Flag to indicate this attribute is used as a texture coordinate. */
+	gctINT8						isTexture;
+
+	/* Number of array elements for this attribute. */
+	gctINT16					arraySize;
+
+	/* Length of the attribute name. */
+	gctINT16					nameLength;
+
+	/* The attribute name. */
+	char						name[1];
+}
+* gcBINARY_ATTRIBUTE;
+
+/* Structure that defines an uniform (constant register) for a shader. */
+struct _gcUNIFORM
+{
+	/* The object. */
+	gcsOBJECT					object;
+
+	/* Pointer to the gcoHAL object. */
+	gcoHAL						hal;
+
+	/* Index of the uniform. */
+	gctUINT16					index;
+
+	/* Type of the uniform. */
+	gcSHADER_TYPE				type;
+
+	/* Number of array elements for this uniform. */
+	gctINT						arraySize;
+
+	/* Physically assigned values. */
+	gctINT						physical;
+	gctUINT8					swizzle;
+	gctUINT32					address;
+
+	/* Length of the uniform name. */
+	gctSIZE_T					nameLength;
+
+	/* The uniform name. */
+	char						name[1];
+};
+
+/* Same structure, but inside a binary. */
+typedef struct _gcBINARY_UNIFORM
+{
+	/* Uniform type of type gcUNIFORM_TYPE. */
+	gctINT16					type;
+
+	/* Number of array elements for this uniform. */
+	gctINT16					arraySize;
+
+	/* Length of the uniform name. */
+	gctINT16					nameLength;
+
+	/* The uniform name. */
+	char						name[1];
+}
+* gcBINARY_UNIFORM;
+
+/* Structure that defines an output for a shader. */
+struct _gcOUTPUT
+{
+	/* The object. */
+	gcsOBJECT					object;
+
+	/* Type for this output. */
+	gcSHADER_TYPE				type;
+
+	/* Number of array elements for this output. */
+	gctSIZE_T					arraySize;
+
+	/* Temporary register index that holds the output value. */
+	gctUINT16					tempIndex;
+
+	/* Converted to physical register. */
+	gctBOOL						physical;
+
+	/* Length of the output name. */
+	gctSIZE_T					nameLength;
+
+	/* The output name. */
+	char						name[1];
+};
+
+/* Same structure, but inside a binary. */
+typedef struct _gcBINARY_OUTPUT
+{
+	/* Type for this output. */
+	gctINT8						type;
+
+	/* Number of array elements for this output. */
+	gctINT8						arraySize;
+
+	/* Temporary register index that holds the output value. */
+	gctUINT16					tempIndex;
+
+	/* Length of the output name. */
+	gctINT16					nameLength;
+
+	/* The output name. */
+	char						name[1];
+}
+* gcBINARY_OUTPUT;
+
+/* Structure that defines a variable for a shader. */
+struct _gcVARIABLE
+{
+	/* The object. */
+	gcsOBJECT					object;
+
+	/* Type for this output. */
+	gcSHADER_TYPE				type;
+
+	/* Number of array elements for this output. */
+	gctSIZE_T					arraySize;
+
+	/* Temporary register index that holds the variable value. */
+	gctUINT16					tempIndex;
+
+	/* Length of the output name. */
+	gctSIZE_T					nameLength;
+
+	/* The output name. */
+	char						name[1];
+};
+
+typedef struct _gcsFUNCTION_ARGUMENT
+{
+	gctUINT16					index;
+	gctUINT8					enable;
+	gctUINT8					qualifier;
+}
+gcsFUNCTION_ARGUMENT,
+* gcsFUNCTION_ARGUMENT_PTR;
+
+struct _gcsFUNCTION
+{
+	gcsOBJECT					object;
+	gcoOS						os;
+
+	gctSIZE_T					argumentCount;
+	gcsFUNCTION_ARGUMENT_PTR	arguments;
+
+	gctUINT16					label;
+
+	/* Local variables. */
+	gctSIZE_T					variableCount;
+	gcVARIABLE *				variables;
+
+	gctUINT						codeStart;
+	gctUINT						codeCount;
+
+	gctSIZE_T					nameLength;
+	char						name[1];
+};
+
+/* Index into current instruction. */
+typedef enum _gcSHADER_INSTRUCTION_INDEX
+{
+	gcSHADER_OPCODE,
+	gcSHADER_SOURCE0,
+	gcSHADER_SOURCE1,
+}
+gcSHADER_INSTRUCTION_INDEX;
+
+typedef struct _gcSHADER_LINK * gcSHADER_LINK;
+
+/* Structure defining a linked references for a label. */
+struct _gcSHADER_LINK
+{
+	gcSHADER_LINK				next;
+	gctUINT						referenced;
+};
+
+typedef struct _gcSHADER_LABEL * gcSHADER_LABEL;
+
+/* Structure defining a label. */
+struct _gcSHADER_LABEL
+{
+	gcSHADER_LABEL				next;
+	gctUINT						label;
+	gctUINT						defined;
+	gcSHADER_LINK				referenced;
+};
+
+/* The structure that defines the gcSHADER object to the outside world. */
+struct _gcSHADER
+{
+	/* The base object. */
+	gcsOBJECT					object;
+
+	/* Pointer to an gcoHAL object. */
+	gcoHAL						hal;
+
+	/* Type of shader. */
+	gctINT						type;
+
+	/* Attributes. */
+	gctSIZE_T					attributeCount;
+	gcATTRIBUTE *				attributes;
+
+	/* Uniforms. */
+	gctSIZE_T					uniformCount;
+	gcUNIFORM *					uniforms;
+	gctINT						samplerIndex;
+
+	/* Outputs. */
+	gctSIZE_T					outputCount;
+	gcOUTPUT *					outputs;
+
+	/* Global variables. */
+	gctSIZE_T					variableCount;
+	gcVARIABLE *				variables;
+
+	/* Functions. */
+	gctSIZE_T					functionCount;
+	gcFUNCTION *				functions;
+	gcFUNCTION					currentFunction;
+
+	/* Code. */
+	gctSIZE_T					codeCount;
+	gctUINT						lastInstruction;
+	gcSHADER_INSTRUCTION_INDEX	instrIndex;
+	gcSHADER_LABEL				labels;
+	gcSL_INSTRUCTION			code;
+
+	/* Optimization option. */
+	gctUINT						optimizationOption;
+};
+
+/******************************************************************************\
+|************************* gcSL_BRANCH_LIST structure. ************************|
+\******************************************************************************/
+
+typedef struct _gcSL_BRANCH_LIST * gcSL_BRANCH_LIST;
+
+struct _gcSL_BRANCH_LIST
+{
+	/* Pointer to next gcSL_BRANCH_LIST structure in list. */
+	gcSL_BRANCH_LIST	next;
+
+	/* Pointer to generated instruction. */
+	gctUINT				ip;
+
+	/* Target instruction for branch. */
+	gctUINT				target;
+
+	/* Flag whether this is a branch or a call. */
+	gctBOOL				call;
+};
+
+/******************************************************************************\
+|**************************** gcLINKTREE structure. ***************************|
+\******************************************************************************/
+
+typedef struct _gcsLINKTREE_LIST *	gcsLINKTREE_LIST_PTR;
+
+/* Structure that defines the linked list of dependencies. */
+typedef struct _gcsLINKTREE_LIST
+{
+	/* Pointer to next dependent register. */
+	gcsLINKTREE_LIST_PTR			next;
+
+	/* Type of dependent register. */
+	gcSL_TYPE						type;
+
+	/* Index of dependent register. */
+	gctINT							index;
+
+	/* Reference counter. */
+	gctINT							counter;
+}
+gcsLINKTREE_LIST;
+
+/* Structure that defines the dependencies for an attribute. */
+typedef struct _gcLINKTREE_ATTRIBUTE
+{
+	/* In-use flag. */
+	gctBOOL						inUse;
+
+	/* Instruction location the attribute was last used. */
+	gctINT						lastUse;
+
+	/* A linked list of all temporary registers using this attribute. */
+	gcsLINKTREE_LIST_PTR		users;
+}
+* gcLINKTREE_ATTRIBUTE;
+
+/* Structure that defines the dependencies for a temporary register. */
+typedef struct _gcLINKTREE_TEMP
+{
+	/* In-use flag. */
+	gctBOOL						inUse;
+
+	/* Usage flags for the temporary register. */
+	gctUINT8					usage;
+
+	/* True if the reghister is used as an index. */
+	gctBOOL						isIndex;
+
+	/* Instruction locations that defines the temporary register. */
+	gcsLINKTREE_LIST_PTR		defined;
+
+	/* Instruction location the temporary register was last used. */
+	gctINT						lastUse;
+
+	/* Dependencies for the temporary register. */
+	gcsLINKTREE_LIST_PTR		dependencies;
+
+	/* Whether the register holds a constant. */
+	gctINT8						constUsage[4];
+	gctFLOAT					constValue[4];
+
+	/* A linked list of all registers using this temporary register. */
+	gcsLINKTREE_LIST_PTR		users;
+
+	/* Physical register this temporary register is assigned to. */
+	gctINT						assigned;
+	gctUINT8					swizzle;
+	gctINT						shift;
+
+	/* Function arguments. */
+	gcFUNCTION					owner;
+	gceINPUT_OUTPUT				inputOrOutput;
+
+	/* Variable in shader's symbol table. */
+	gcVARIABLE					variable;
+}
+* gcLINKTREE_TEMP;
+
+/* Structure that defines the outputs. */
+typedef struct _gcLINKTREE_OUTPUT
+{
+	/* In-use flag. */
+	gctBOOL						inUse;
+
+	/* Temporary register holding the output value. */
+	gctINT						tempHolding;
+
+	/* Fragment attribute linked to this vertex output. */
+	gctINT						fragmentAttribute;
+	gctINT						fragmentIndex;
+}
+* gcLINKTREE_OUTPUT;
+
+typedef struct _gcsCODE_CALLER	*gcsCODE_CALLER_PTR;
+typedef struct _gcsCODE_CALLER
+{
+	gcsCODE_CALLER_PTR			next;
+
+	gctINT						caller;
+}
+gcsCODE_CALLER;
+
+typedef struct _gcsCODE_HINT
+{
+	/* Pointer to function to which this code belongs. */
+	gcFUNCTION					owner;
+
+	/* Callers to this instruction. */
+	gcsCODE_CALLER_PTR			callers;
+
+	/* Nesting of call. */
+	gctINT						callNest;
+}
+gcsCODE_HINT, *gcsCODE_HINT_PTR;
+
+/* Structure that defines the entire life and dependency for a shader. */
+typedef struct _gcLINKTREE
+{
+	/* Pointer to an gcoOS object. */
+	gcoOS						os;
+
+	/* Pointer to the gcSHADER object. */
+	gcSHADER					shader;
+
+	/* Number of attributes. */
+	gctSIZE_T					attributeCount;
+
+	/* Attributes. */
+	gcLINKTREE_ATTRIBUTE		attributeArray;
+
+	/* Number of temporary registers. */
+	gctSIZE_T					tempCount;
+
+	/* Temporary registers. */
+	gcLINKTREE_TEMP				tempArray;
+
+	/* Number of outputs. */
+	gctSIZE_T					outputCount;
+
+	/* Outputs. */
+	gcLINKTREE_OUTPUT			outputArray;
+
+	/* Uniform usage. */
+	gctSIZE_T					uniformUsage;
+
+	/* Resource allocation passed. */
+	gctBOOL						physical;
+
+	/* Branch list. */
+	gcSL_BRANCH_LIST			branch;
+
+	/* Code hints. */
+	gcsCODE_HINT_PTR			hints;
+}
+* gcLINKTREE;
+
+/* Generate hardware states. */
+gceSTATUS
+gcLINKTREE_GenerateStates(
+	IN gcLINKTREE Tree,
+	IN gceSHADER_FLAGS Flags,
+	IN OUT gctSIZE_T * StateBufferSize,
+	IN OUT gctPOINTER * StateBuffer,
+	OUT gcsHINT_PTR * Hints
+	);
+
+typedef struct _gcsCODE_GENERATOR	gcsCODE_GENERATOR;
+typedef struct _gcsCODE_GENERATOR	* gcsCODE_GENERATOR_PTR;
+
+gctUINT
+gcsCODE_GENERATOR_GetIP(
+	gcsCODE_GENERATOR_PTR CodeGen
+	);
+
+typedef gctBOOL (*gctSL_FUNCTION_PTR)(
+	IN gcLINKTREE Tree,
+	IN gcsCODE_GENERATOR_PTR CodeGen,
+	IN gcSL_INSTRUCTION Instruction,
+	IN OUT gctUINT32 * States
+	);
+
+typedef struct _gcsSL_PATTERN		gcsSL_PATTERN;
+typedef struct _gcsSL_PATTERN		* gcsSL_PATTERN_PTR;
+struct _gcsSL_PATTERN
+{
+	/* Positive: search index, aproaching zero.
+	   Negative: code generation index aproaching zero. */
+	gctINT							count;
+
+	/* Opcode. */
+	gctUINT							opcode;
+
+	/* Destination reference number. */
+	gctINT8							dest;
+
+	/* Source 0 reference number. */
+	gctINT8							source0;
+
+	/* Source 1 reference number. */
+	gctINT8							source1;
+
+	/* Source 2 reference number. */
+	gctINT8							source2;
+
+	/* Sampler reference number. */
+	gctINT8							sampler;
+
+	/* Code generation function. */
+	gctSL_FUNCTION_PTR				function;
+};
+
+gctSIZE_T
+gcSHADER_GetHintSize(
+	void
+	);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __gc_hal_user_compiler_h_ */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/user/Brush.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/user/Brush.h
@@ -0,0 +1,140 @@
+/****************************************************************************
+*  
+*    Copyright (c) 2002 - 2008 by Vivante Corp.  All rights reserved.
+*  
+*    The material in this file is confidential and contains trade secrets
+*    of Vivante Corporation. This is proprietary information owned by
+*    Vivante Corporation. No part of this work may be disclosed, 
+*    reproduced, copied, transmitted, or used in any way for any purpose, 
+*    without the express written permission of Vivante Corporation.
+*  
+*****************************************************************************
+*  
+*  
+*****************************************************************************/
+
+
+
+
+
+
+#ifndef __brush_h_
+#define __brush_h_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/******************************************************************************\
+***************************** gcoBRUSH_CACHE Object *****************************
+\******************************************************************************/
+
+/* Create an gcoBRUSH_CACHE object. */
+gceSTATUS
+gcoBRUSH_CACHE_Construct(
+	IN gcoHAL Hal,
+	gcoBRUSH_CACHE * BrushCache
+	);
+
+/* Destroy an gcoBRUSH_CACHE object. */
+gceSTATUS
+gcoBRUSH_CACHE_Destroy(
+	IN gcoBRUSH_CACHE BrushCache
+	);
+
+/* Sets the maximum number of brushes in the cache. */
+gceSTATUS
+gcoBRUSH_CACHE_SetBrushLimit(
+	IN gcoBRUSH_CACHE BrushCache,
+	IN gctUINT MaxCount
+	);
+
+/* Compute the brush ID based on the brush data. */
+gceSTATUS
+gcoBRUSH_CACHE_GetBrushID(
+	IN gcoBRUSH_CACHE BrushCache,
+	IN gctPOINTER BrushData,
+	IN gctUINT32 DataCount,
+	IN OUT gctUINT32 * BrushID
+	);
+
+/* Find a matching brush by the passed brush data set and return a pointer
+   to the brush. If a matching brush was found, its usage counter is
+   automatically incremented. Call gcoBRUSH_CACHE_DeleteBrush
+   to release the brush. */
+gceSTATUS
+gcoBRUSH_CACHE_GetBrush(
+	IN gcoBRUSH_CACHE BrushCache,
+	IN gctUINT32 BrushID,
+	IN gctPOINTER BrushData,
+	IN gctUINT32 DataCount,
+	IN OUT gcoBRUSH * Brush
+	);
+
+/* Add a brush to the brush cache. */
+gceSTATUS
+gcoBRUSH_CACHE_AddBrush(
+	IN gcoBRUSH_CACHE BrushCache,
+	IN gcoBRUSH Brush,
+	IN gctUINT32 BrushID,
+	IN gctBOOL NeedMemory
+	);
+
+/* Remove a brush from the brush cache. */
+gceSTATUS
+gcoBRUSH_CACHE_DeleteBrush(
+	IN gcoBRUSH_CACHE BrushCache,
+	IN gcoBRUSH Brush
+	);
+
+/* Flush the brush. */
+gceSTATUS
+gcoBRUSH_CACHE_FlushBrush(
+	IN gcoBRUSH_CACHE BrushCache,
+	IN gcoBRUSH Brush
+	);
+
+
+/******************************************************************************\
+******************************** gcoBRUSH Object *******************************
+\******************************************************************************/
+
+/* Frees all resources held up the specified gcoBRUSH object. */
+gceSTATUS
+gcoBRUSH_Delete(
+	IN gcoBRUSH Brush
+	);
+
+/* Returns a buffer fileld with complete set of brush parameters. */
+gceSTATUS
+gcoBRUSH_GetBrushData(
+	IN gcoBRUSH Brush,
+	IN OUT gctPOINTER BrushData,
+	IN OUT gctUINT32 * DataCount
+	);
+
+/* Flush the brush. */
+gceSTATUS
+gcoBRUSH_FlushBrush(
+	IN gcoBRUSH Brush,
+	IN gctBOOL Upload,
+	IN gcsSURF_NODE_PTR Node
+	);
+
+
+/******************************************************************************\
+********************************** gco2D Object *********************************
+\******************************************************************************/
+
+/* Return a pointer to the brush cache. */
+gceSTATUS
+gco2D_GetBrushCache(
+	IN gco2D Hardware,
+	IN OUT gcoBRUSH_CACHE * BrushCache
+	);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __brush_h_ */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/user/PreComp.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/user/PreComp.h
@@ -0,0 +1,31 @@
+/****************************************************************************
+*
+*    Copyright (c) 2002 - 2008 by Vivante Corp.  All rights reserved.
+*
+*    The material in this file is confidential and contains trade secrets
+*    of Vivante Corporation. This is proprietary information owned by
+*    Vivante Corporation. No part of this work may be disclosed,
+*    reproduced, copied, transmitted, or used in any way for any purpose,
+*    without the express written permission of Vivante Corporation.
+*
+*****************************************************************************
+*
+*
+*****************************************************************************/
+
+
+
+
+
+
+#include "aqHalUser.h"
+#include "aqHalUserInt.h"
+
+
+#include "gcCompiler.h"
+#include "gcCompilerInt.h"
+
+
+#include "gcProfiler.h"
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/user/aqHalUserInt.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/user/aqHalUserInt.h
@@ -0,0 +1,240 @@
+/****************************************************************************
+*
+*    Copyright (c) 2002 - 2008 by Vivante Corp.  All rights reserved.
+*
+*    The material in this file is confidential and contains trade secrets
+*    of Vivante Corporation. This is proprietary information owned by
+*    Vivante Corporation. No part of this work may be disclosed,
+*    reproduced, copied, transmitted, or used in any way for any purpose,
+*    without the express written permission of Vivante Corporation.
+*
+*****************************************************************************
+*
+*
+*****************************************************************************/
+
+
+
+
+
+
+#ifndef __aqhaluserint_h_
+#define __aqhaluserint_h_
+
+#ifdef LINUX
+#define PENDING_FREED_MEMORY_SIZE_LIMIT		(4 * 1024 * 1024)
+#endif
+
+/******************************************************************************\
+********************************* gcoHAL object *********************************
+\******************************************************************************/
+
+struct _gcoHAL
+{
+	/* The object. */
+	gcsOBJECT				object;
+
+	/* Context passed in during creation. */
+	gctPOINTER				context;
+
+	/* Pointer to an gcoOS object. */
+	gcoOS					os;
+
+	/* Pointer to an gcoHARDWARE object. */
+	gcoHARDWARE				hardware;
+
+	/* Pointer to the gco2D and gco3D objects. */
+	gco2D					engine2D;
+	gcoVG					engineVG;
+	gco3D					engine3D;
+
+#ifdef PENDING_FREED_MEMORY_SIZE_LIMIT
+	/* Pending freed memory size */
+	gctSIZE_T				pendingFreedMemorySize;
+#endif
+
+	/* Pointer to te gcoDUMP object. */
+	gcoDUMP					dump;
+
+#if VIVANTE_PROFILER
+    gcsPROFILER             profiler;
+#endif
+
+    /* Process handle */
+    gctHANDLE               process;
+
+    /* Pointer to version string */
+    gctCONST_STRING         version;
+
+#if MRVL_BENCH
+	/* timer object for bench mark */
+	gcoAPIBENCH	apiBench;
+#endif
+};
+
+
+/******************************************************************************\
+********************************* gcoSURF object ********************************
+\******************************************************************************/
+
+typedef struct _gcsSURF_NODE
+{
+	/* Surface memory pool. */
+	gcePOOL					pool;
+
+	/* Lock count for the surface. */
+	gctINT					lockCount;
+
+	/* If not zero, the node is locked in the kernel. */
+	gctBOOL					lockedInKernel;
+
+	/* Number of planes in the surface for planar format support. */
+	gctUINT					count;
+
+	/* Node valid flag for the surface pointers. */
+	gctBOOL					valid;
+
+	/* The physical addresses of the surface. */
+	gctUINT32				physical;
+	gctUINT32				physical2;
+	gctUINT32				physical3;
+
+	/* The logical addresses of the surface. */
+	gctUINT8_PTR			logical;
+	gctUINT8_PTR			logical2;
+	gctUINT8_PTR			logical3;
+
+	/* Linear size and filler for tile status. */
+	gctSIZE_T				size;
+	gctUINT32				filler;
+	gctBOOL					firstLock;
+
+	union _gcuSURF_NODE_LIST
+	{
+		/* Allocated through HAL. */
+		struct _gcsMEM_NODE_NORMAL
+		{
+			gcuVIDMEM_NODE_PTR	node;
+		}
+		normal;
+
+		/* Wrapped around user-allocated surface (gcvPOOL_USER). */
+		struct _gcsMEM_NODE_WRAPPED
+		{
+			gctBOOL				logicalMapped;
+			gctPOINTER			mappingInfo;
+		}
+		wrapped;
+	}
+	u;
+}
+gcsSURF_NODE;
+
+typedef struct _gcsSURF_INFO
+{
+	/* Type usage and format of surface. */
+	gceSURF_TYPE			type;
+	gceSURF_FORMAT			format;
+
+	/* Surface size. */
+	gcsRECT					rect;
+	gctUINT					alignedWidth;
+	gctUINT					alignedHeight;
+	gctBOOL					is16Bit;
+
+	/* Rotation flag. */
+	gceSURF_ROTATION		rotation;
+	gceORIENTATION			orientation;
+
+	/* Surface stride and size. */
+	gctUINT					stride;
+	gctUINT					size;
+
+	/* YUV planar surface parameters. */
+	gctUINT					uOffset;
+	gctUINT					vOffset;
+	gctUINT					uStride;
+	gctUINT					vStride;
+
+	/* Video memory node for surface. */
+	gcsSURF_NODE			node;
+
+	/* Samples. */
+	gcsSAMPLES				samples;
+	gctBOOL					vaa;
+
+	/* Tile status. */
+	gctBOOL					tileStatusDisabled;
+	gctBOOL					superTiled;
+	gctUINT32				clearValue;
+
+	/* Hierarchical Z buffer pointer. */
+	gcsSURF_NODE			hzNode;
+}
+gcsSURF_INFO;
+
+struct _gcoSURF
+{
+	/* Object. */
+	gcsOBJECT				object;
+
+	/* Pointer to an gcoHAL object. */
+	gcoHAL					hal;
+
+	/* Surface information structure. */
+	struct _gcsSURF_INFO	info;
+
+	/* Depth of the surface in planes. */
+	gctUINT					depth;
+
+	gctBOOL					resolvable;
+
+    /* Video memory node for tile status. */
+    gcsSURF_NODE			tileStatusNode;
+	gcsSURF_NODE			hzTileStatusNode;
+
+	/* Surface color type. */
+	gceSURF_COLOR_TYPE      colorType;
+
+	/* Automatic stride calculation. */
+	gctBOOL					autoStride;
+
+	/* User pointers for the surface wrapper. */
+	gctPOINTER				logical;
+	gctUINT32				physical;
+
+	/* Reference count of surface. */
+	gctINT32				referenceCount;
+};
+
+/******************************************************************************\
+******************************** gcoQUEUE Object *******************************
+\******************************************************************************/
+
+/* Construct a new gcoQUEUE object. */
+gceSTATUS
+gcoQUEUE_Construct(
+	IN gcoOS Os,
+	OUT gcoQUEUE * Queue
+	);
+
+/* Destroy a gcoQUEUE object. */
+gceSTATUS
+gcoQUEUE_Destroy(
+	IN gcoQUEUE Queue
+	);
+
+/* Append an event to a gcoQUEUE object. */
+gceSTATUS
+gcoQUEUE_AppendEvent(
+	IN gcoQUEUE Queue,
+	IN gcsHAL_INTERFACE * Interface
+	);
+
+/* Commit and event queue. */
+gceSTATUS
+gcoQUEUE_Commit(
+	IN gcoQUEUE Queue
+	);
+
+#endif /* __aqhaluserint_h_ */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/user/Context.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/user/Context.h
@@ -0,0 +1,133 @@
+/****************************************************************************
+*  
+*    Copyright (c) 2002 - 2008 by Vivante Corp.  All rights reserved.
+*  
+*    The material in this file is confidential and contains trade secrets
+*    of Vivante Corporation. This is proprietary information owned by
+*    Vivante Corporation. No part of this work may be disclosed, 
+*    reproduced, copied, transmitted, or used in any way for any purpose, 
+*    without the express written permission of Vivante Corporation.
+*  
+*****************************************************************************
+*  
+*  
+*****************************************************************************/
+
+
+
+
+
+
+#ifndef __context_h_
+#define __context_h_
+
+
+/* gcoCONTEXT structure that hold the current context. */
+struct _gcoCONTEXT
+{
+	/* Object. */
+	gcsOBJECT					object;
+
+	/* Pointer to gcoOS object. */
+	gcoOS						os;
+
+	/* Pointer to gcoHARDWARE object. */
+	gcoHARDWARE					hardware;
+
+	/* Context ID. */
+	gctUINT64					id;
+
+	/* State mapping. */
+	gctUINT32_PTR				map;
+
+	/* Context buffer. */
+	gctUINT32_PTR				buffer;
+	gctUINT32					pipe3DIndex;
+	gctUINT32					pipe2DIndex;
+	gctUINT32					linkIndex;
+	gctUINT32					inUseIndex;
+	gctSIZE_T					bufferSize;
+
+	/* Context buffer used for commitment. */
+	gctSIZE_T					bytes;
+	gctPHYS_ADDR				physical;
+	gctPOINTER					logical;
+
+	/* Pointer to final LINK command. */
+	gctPOINTER					link;
+
+	/* Requested pipe select for context. */
+	gctUINT32					initialPipe;
+	gctUINT32					entryPipe;
+	gctUINT32					currentPipe;
+
+	/* Flag to specify whether PostCommit needs to be called. */
+	gctBOOL						postCommit;
+
+	/* Busy flag. */
+	volatile gctBOOL *			inUse;
+
+	/* Variables used for building state buffer. */
+	gctUINT32					lastAddress;
+	gctSIZE_T					lastSize;
+	gctUINT32					lastIndex;
+	gctBOOL						lastFixed;
+};
+
+struct _gcoCMDBUF
+{
+	/* The object. */
+	gcsOBJECT					object;
+
+	/* Pointer to gcoOS object. */
+	gcoOS						os;
+
+	/* Pointer to gcoHARDWARE object. */
+	gcoHARDWARE					hardware;
+
+	/* Physical address of command buffer. */
+	gctPHYS_ADDR				physical;
+
+	/* Logical address of command buffer. */
+	gctPOINTER					logical;
+
+	/* Number of bytes in command buffer. */
+	gctSIZE_T					bytes;
+
+	/* Current offset into the command buffer. */
+	gctUINT32					offset;
+
+	/* Number of free bytes in command buffer. */
+	gctSIZE_T					free;
+
+	/* Pointer to next command buffer or gcvNULL if this is the last one. */
+	gcoCMDBUF					sibling;
+};
+
+typedef struct _gcsQUEUE * gcsQUEUE_PTR;
+
+typedef struct _gcsQUEUE
+{
+	/* Pointer to next gcsQUEUE structure. */
+	gcsQUEUE_PTR				next;
+
+	/* Event information. */
+	gcsHAL_INTERFACE			interface;
+}
+gcsQUEUE;
+
+/* Event queue. */
+struct _gcoQUEUE
+{
+	/* The object. */
+	gcsOBJECT					object;
+
+	/* Pointer to gcoOS object. */
+	gcoOS						os;
+
+	/* Pointer to current event queue. */
+	gcsQUEUE_PTR				head;
+	gcsQUEUE_PTR				tail;
+};
+
+#endif /* __context_h_ */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/user/gc_hal_user_brush.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/user/gc_hal_user_brush.h
@@ -0,0 +1,139 @@
+/****************************************************************************
+*
+*    Copyright (c) 2005 - 2010 by Vivante Corp.  All rights reserved.
+*
+*    The material in this file is confidential and contains trade secrets
+*    of Vivante Corporation. This is proprietary information owned by
+*    Vivante Corporation. No part of this work may be disclosed,
+*    reproduced, copied, transmitted, or used in any way for any purpose,
+*    without the express written permission of Vivante Corporation.
+*
+*****************************************************************************
+*
+*
+*****************************************************************************/
+
+
+
+
+#ifndef __gc_hal_user_brush_h_
+#define __gc_hal_user_brush_h_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/******************************************************************************\
+***************************** gcoBRUSH_CACHE Object *****************************
+\******************************************************************************/
+
+/* Create an gcoBRUSH_CACHE object. */
+gceSTATUS
+gcoBRUSH_CACHE_Construct(
+	IN gcoHAL Hal,
+	gcoBRUSH_CACHE * BrushCache
+	);
+
+/* Destroy an gcoBRUSH_CACHE object. */
+gceSTATUS
+gcoBRUSH_CACHE_Destroy(
+	IN gcoBRUSH_CACHE BrushCache
+	);
+
+/* Sets the maximum number of brushes in the cache. */
+gceSTATUS
+gcoBRUSH_CACHE_SetBrushLimit(
+	IN gcoBRUSH_CACHE BrushCache,
+	IN gctUINT MaxCount
+	);
+
+/* Compute the brush ID based on the brush data. */
+gceSTATUS
+gcoBRUSH_CACHE_GetBrushID(
+	IN gcoBRUSH_CACHE BrushCache,
+	IN gctPOINTER BrushData,
+	IN gctUINT32 DataCount,
+	IN OUT gctUINT32 * BrushID
+	);
+
+/* Find a matching brush by the passed brush data set and return a pointer
+   to the brush. If a matching brush was found, its usage counter is
+   automatically incremented. Call gcoBRUSH_CACHE_DeleteBrush
+   to release the brush. */
+gceSTATUS
+gcoBRUSH_CACHE_GetBrush(
+	IN gcoBRUSH_CACHE BrushCache,
+	IN gctUINT32 BrushID,
+	IN gctPOINTER BrushData,
+	IN gctUINT32 DataCount,
+	IN OUT gcoBRUSH * Brush
+	);
+
+/* Add a brush to the brush cache. */
+gceSTATUS
+gcoBRUSH_CACHE_AddBrush(
+	IN gcoBRUSH_CACHE BrushCache,
+	IN gcoBRUSH Brush,
+	IN gctUINT32 BrushID,
+	IN gctBOOL NeedMemory
+	);
+
+/* Remove a brush from the brush cache. */
+gceSTATUS
+gcoBRUSH_CACHE_DeleteBrush(
+	IN gcoBRUSH_CACHE BrushCache,
+	IN gcoBRUSH Brush
+	);
+
+/* Flush the brush. */
+gceSTATUS
+gcoBRUSH_CACHE_FlushBrush(
+	IN gcoBRUSH_CACHE BrushCache,
+	IN gcoBRUSH Brush
+	);
+
+
+/******************************************************************************\
+******************************** gcoBRUSH Object *******************************
+\******************************************************************************/
+
+/* Frees all resources held up the specified gcoBRUSH object. */
+gceSTATUS
+gcoBRUSH_Delete(
+	IN gcoBRUSH Brush
+	);
+
+/* Returns a buffer fileld with complete set of brush parameters. */
+gceSTATUS
+gcoBRUSH_GetBrushData(
+	IN gcoBRUSH Brush,
+	IN OUT gctPOINTER BrushData,
+	IN OUT gctUINT32 * DataCount
+	);
+
+/* Flush the brush. */
+gceSTATUS
+gcoBRUSH_FlushBrush(
+	IN gcoBRUSH Brush,
+	IN gctBOOL Upload,
+	IN gcsSURF_NODE_PTR Node
+	);
+
+
+/******************************************************************************\
+********************************** gco2D Object *********************************
+\******************************************************************************/
+
+/* Return a pointer to the brush cache. */
+gceSTATUS
+gco2D_GetBrushCache(
+	IN gco2D Hardware,
+	IN OUT gcoBRUSH_CACHE * BrushCache
+	);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __gc_hal_user_brush_h_ */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/user/gcProfiler.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/user/gcProfiler.h
@@ -0,0 +1,44 @@
+/****************************************************************************
+*  
+*    Copyright (c) 2002 - 2008 by Vivante Corp.  All rights reserved.
+*  
+*    The material in this file is confidential and contains trade secrets
+*    of Vivante Corporation. This is proprietary information owned by
+*    Vivante Corporation. No part of this work may be disclosed, 
+*    reproduced, copied, transmitted, or used in any way for any purpose, 
+*    without the express written permission of Vivante Corporation.
+*  
+*****************************************************************************
+*  
+*  
+*****************************************************************************/
+
+
+#ifndef __gl2_profile_h_
+#define __gl2_profile_h_
+
+#include <stdio.h>
+
+
+#define GLVERTEX_OBJECT 10
+#define GLVERTEX_OBJECT_BYTES 11
+
+#define GLINDEX_OBJECT 20
+#define GLINDEX_OBJECT_BYTES 21
+  
+#define GLTEXTURE_OBJECT 30
+#define GLTEXTURE_OBJECT_BYTES 31
+               
+#define GL_SHADER_OBJECT 40
+
+#define GL_PROGRAM_IN_USE_BEGIN 50
+
+#if VIVANTE_PROFILER
+#	define gcmPROFILE_GC(hal, _enum, value) countGCProfiler(hal, _enum, value)
+#else
+#	define gcmPROFILE_GC(hal, _enum, value)
+#endif
+
+void countGCProfiler( IN gcoHAL , gctUINT32 , int );
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/user/gc_hal_user_queue.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/user/gc_hal_user_queue.h
@@ -0,0 +1 @@
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/user/gc_hal_user_precomp.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/user/gc_hal_user_precomp.h
@@ -0,0 +1,36 @@
+/****************************************************************************
+*
+*    Copyright (c) 2005 - 2010 by Vivante Corp.  All rights reserved.
+*
+*    The material in this file is confidential and contains trade secrets
+*    of Vivante Corporation. This is proprietary information owned by
+*    Vivante Corporation. No part of this work may be disclosed,
+*    reproduced, copied, transmitted, or used in any way for any purpose,
+*    without the express written permission of Vivante Corporation.
+*
+*****************************************************************************
+*
+*
+*****************************************************************************/
+
+
+
+
+#ifndef __gc_hal_user_precomp_h__
+#define __gc_hal_user_precomp_h__
+
+#if !defined(HAL_EXPORTS)
+#	define HAL_EXPORTS
+#endif
+
+#include "gc_hal_user.h"
+
+#ifndef VIVANTE_NO_3D
+#include "gc_hal_compiler.h"
+#include "gc_hal_user_compiler.h"
+#endif /* VIVANTE_NO_3D */
+
+#include "gc_hal_profiler.h"
+
+#endif /* __gc_hal_user_precomp_h__ */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/user/gc_hal_user.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/user/gc_hal_user.h
@@ -0,0 +1,2312 @@
+/****************************************************************************
+*
+*    Copyright (c) 2005 - 2010 by Vivante Corp.  All rights reserved.
+*
+*    The material in this file is confidential and contains trade secrets
+*    of Vivante Corporation. This is proprietary information owned by
+*    Vivante Corporation. No part of this work may be disclosed,
+*    reproduced, copied, transmitted, or used in any way for any purpose,
+*    without the express written permission of Vivante Corporation.
+*
+*****************************************************************************
+*
+*
+*****************************************************************************/
+
+
+
+
+#ifndef __gc_hal_user_h_
+#define __gc_hal_user_h_
+
+#include "gc_hal.h"
+#include "gc_hal_driver.h"
+#include "gc_hal_enum.h"
+#include "gc_hal_dump.h"
+#include "gc_hal_base.h"
+#include "gc_hal_raster.h"
+
+#ifndef VIVANTE_NO_3D
+#include "gc_hal_engine.h"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if MRVL_OPTI_USE_RESERVE_MEMORY
+#define RESERVE_MEMORY_NUM  3
+#define RESERVE_MEMORY_SIZE 524288
+#endif
+/******************************************************************************\
+******************************* Multicast values *******************************
+\******************************************************************************/
+
+/* Value types. */
+typedef enum _gceVALUE_TYPE
+{
+	gcvVALUE_UINT,
+	gcvVALUE_FIXED,
+	gcvVALUE_FLOAT,
+}
+gceVALUE_TYPE;
+
+/* Value unions. */
+typedef union _gcuVALUE
+{
+	gctUINT						uintValue;
+	gctFIXED_POINT				fixedValue;
+	gctFLOAT					floatValue;
+}
+gcuVALUE;
+
+/******************************************************************************\
+***************************** gcsSAMPLES Structure *****************************
+\******************************************************************************/
+
+typedef struct _gcsSAMPLES
+{
+	gctUINT8 x;
+	gctUINT8 y;
+}
+gcsSAMPLES;
+
+/******************************************************************************\
+****************************** Object Declarations *****************************
+\******************************************************************************/
+
+typedef struct _gcoBUFFER *				gcoBUFFER;
+
+/******************************************************************************\
+******************************* gcoHARDWARE Object ******************************
+\******************************************************************************/
+
+/*----------------------------------------------------------------------------*/
+/*----------------------------- gcoHARDWARE Common ----------------------------*/
+
+/* Construct a new gcoHARDWARE object. */
+gceSTATUS
+gcoHARDWARE_Construct(
+	IN gcoHAL Hal,
+	OUT gcoHARDWARE * Hardware
+	);
+
+/* Destroy an gcoHARDWARE object. */
+gceSTATUS
+gcoHARDWARE_Destroy(
+	IN gcoHARDWARE Hardware
+	);
+
+/* Query the identity of the hardware. */
+gceSTATUS
+gcoHARDWARE_QueryChipIdentity(
+    IN gcoHARDWARE Hardware,
+	OUT gceCHIPMODEL* ChipModel,
+	OUT gctUINT32* ChipRevision,
+	OUT gctUINT32* ChipFeatures,
+	OUT gctUINT32* ChipMinorFeatures,
+	OUT gctUINT32* ChipMinorFeatures1
+	);
+
+/* Verify whether the specified feature is available in hardware. */
+gceSTATUS
+gcoHARDWARE_IsFeatureAvailable(
+    IN gcoHARDWARE Hardware,
+	IN gceFEATURE Feature
+    );
+
+/* Query command buffer requirements. */
+gceSTATUS
+gcoHARDWARE_QueryCommandBuffer(
+	IN gcoHARDWARE Hardware,
+	OUT gctSIZE_T * Alignment,
+	OUT gctSIZE_T * ReservedHead,
+	OUT gctSIZE_T * ReservedTail
+	);
+
+/* Select a graphics pipe. */
+gceSTATUS
+gcoHARDWARE_SelectPipe(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT8 Pipe
+	);
+
+/* Flush the current graphics pipe. */
+gceSTATUS
+gcoHARDWARE_FlushPipe(
+	IN gcoHARDWARE Hardware
+	);
+
+/* Send semaphore down the current pipe. */
+gceSTATUS
+gcoHARDWARE_Semaphore(
+	IN gcoHARDWARE Hardware,
+	IN gceWHERE From,
+	IN gceWHERE To,
+	IN gceHOW How
+	);
+
+/* Load a number of load states. */
+gceSTATUS
+gcoHARDWARE_LoadState(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 Address,
+	IN gctSIZE_T Count,
+	IN gctPOINTER States
+	);
+
+/* Load a number of load states. */
+gceSTATUS
+gcoHARDWARE_LoadStateBuffer(
+	IN gcoHARDWARE Hardware,
+	IN gctCONST_POINTER StateBuffer,
+	IN gctSIZE_T Bytes
+	);
+
+/* Load a number of load states from external buffer. */
+gceSTATUS
+gcoHARDWARE_LoadStateExternalBuffer(
+	IN gcoHARDWARE Hardware,
+	IN gctPOINTER StateBuffer,
+	IN gctSIZE_T Size
+	);
+
+/* Load a number of load states in fixed-point (3D pipe). */
+gceSTATUS
+gcoHARDWARE_LoadStateX(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 Address,
+	IN gctSIZE_T Count,
+	IN gctPOINTER States
+	);
+
+/* Load a number of load states in floating-point (3D pipe). */
+gceSTATUS
+gcoHARDWARE_LoadStateF(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 Address,
+	IN gctSIZE_T Count,
+	IN gctPOINTER States
+	);
+
+/* Load one 32-bit load state. */
+gceSTATUS
+gcoHARDWARE_LoadState32(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 Address,
+	IN gctUINT32 Data
+	);
+
+/* Load one 32-bit load state. */
+gceSTATUS
+gcoHARDWARE_LoadState32x(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 Address,
+	IN gctFIXED_POINT Data
+	);
+
+/* Load one 64-bit load state. */
+gceSTATUS
+gcoHARDWARE_LoadState64(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 Address,
+	IN gctUINT64 Data
+	);
+
+gceSTATUS
+gcoHARDWARE_LoadStateBlock(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32_PTR States,
+	IN gctSIZE_T Count
+	);
+
+/* Preserve cmd buffer space */
+gceSTATUS
+gcoHARDWARE_PreserveCmdSpace(
+    IN gcoHARDWARE  Hardware,
+    IN gctSIZE_T    Size
+    );
+
+/* Commit the current command buffer. */
+gceSTATUS
+gcoHARDWARE_Commit(
+	IN gcoHARDWARE Hardware
+	);
+
+/* Stall the pipe. */
+gceSTATUS
+gcoHARDWARE_Stall(
+	IN gcoHARDWARE Hardware
+	);
+
+/* Resolve. */
+gceSTATUS
+gcoHARDWARE_ResolveRect(
+	IN gcoHARDWARE Hardware,
+	IN gcsSURF_INFO_PTR SrcInfo,
+	IN gcsSURF_INFO_PTR DestInfo,
+	IN gcsPOINT_PTR SrcOrigin,
+	IN gcsPOINT_PTR DestOrigin,
+	IN gcsPOINT_PTR RectSize
+	);
+
+/* Resolve depth buffer. */
+gceSTATUS
+gcoHARDWARE_ResolveDepth(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 SrcTileStatusAddress,
+	IN gcsSURF_INFO_PTR SrcInfo,
+	IN gcsSURF_INFO_PTR DestInfo,
+	IN gcsPOINT_PTR SrcOrigin,
+	IN gcsPOINT_PTR DestOrigin,
+	IN gcsPOINT_PTR RectSize
+	);
+
+/* Query the tile size of the given surface. */
+gceSTATUS
+gcoHARDWARE_GetSurfaceTileSize(
+	IN gcsSURF_INFO_PTR Surface,
+	OUT gctINT32 * TileWidth,
+	OUT gctINT32 * TileHeight
+	);
+
+/* Query tile sizes. */
+gceSTATUS
+gcoHARDWARE_QueryTileSize(
+	OUT gctINT32 * TileWidth2D,
+	OUT gctINT32 * TileHeight2D,
+	OUT gctINT32 * TileWidth3D,
+	OUT gctINT32 * TileHeight3D,
+	OUT gctUINT32 * StrideAlignment
+	);
+
+/* Get tile status sizes for a surface. */
+gceSTATUS
+gcoHARDWARE_QueryTileStatus(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT Width,
+	IN gctUINT Height,
+	IN gctSIZE_T Bytes,
+	OUT gctSIZE_T_PTR Size,
+	OUT gctUINT_PTR Alignment,
+	OUT gctUINT32_PTR Filler
+	);
+
+/* Enable tile status for a surface. */
+gceSTATUS
+gcoHARDWARE_EnableTileStatus(
+	IN gcoHARDWARE Hardware,
+	IN gcsSURF_INFO_PTR Surface,
+	IN gctUINT32 TileStatusAddress,
+	IN gcsSURF_NODE_PTR HzTileStatus
+	);
+
+/* Disable tile status for a surface. */
+gceSTATUS
+gcoHARDWARE_DisableTileStatus(
+	IN gcoHARDWARE Hardware,
+	IN gcsSURF_INFO_PTR Surface,
+	IN gctBOOL CpuAccess
+	);
+
+/* Flush tile status cache. */
+gceSTATUS
+gcoHARDWARE_FlushTileStatus(
+	IN gcoHARDWARE Hardware,
+	IN gcsSURF_INFO_PTR Surface,
+	IN gctBOOL Decompress
+	);
+
+typedef enum _gceTILE_STATUS_CONTROL
+{
+	gcvTILE_STATUS_PAUSE,
+	gcvTILE_STATUS_RESUME,
+}
+gceTILE_STATUS_CONTROL;
+
+/* Pause or resume tile status. */
+gceSTATUS gcoHARDWARE_PauseTileStatus(
+	IN gcoHARDWARE Hardware,
+	IN gceTILE_STATUS_CONTROL Control
+	);
+
+/* Lock a surface. */
+gceSTATUS
+gcoHARDWARE_Lock(
+	IN gcoHARDWARE Hardware,
+	IN gcsSURF_NODE_PTR Node,
+	OUT gctUINT32 * Address,
+	OUT gctPOINTER * Memory
+	);
+
+/* Unlock a surface. */
+gceSTATUS
+gcoHARDWARE_Unlock(
+	IN gcoHARDWARE Hardware,
+	IN gcsSURF_NODE_PTR Node,
+	IN gceSURF_TYPE Type
+	);
+
+/* Call kernel for event. */
+gceSTATUS
+gcoHARDWARE_CallEvent(
+	IN gcoHARDWARE Hardware,
+	IN OUT gcsHAL_INTERFACE * Interface
+	);
+
+/* Schedule destruction for the specified video memory node. */
+gceSTATUS
+gcoHARDWARE_ScheduleVideoMemory(
+	IN gcoHARDWARE Hardware,
+	IN gcsSURF_NODE_PTR Node
+	);
+
+/* Allocate a temporary surface with specified parameters. */
+gceSTATUS
+gcoHARDWARE_AllocateTemporarySurface(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT Width,
+	IN gctUINT Height,
+	IN gcsSURF_FORMAT_INFO_PTR Format,
+	IN gceSURF_TYPE Type
+	);
+
+/* Free the temporary surface. */
+gceSTATUS
+gcoHARDWARE_FreeTemporarySurface(
+	IN gcoHARDWARE Hardware,
+	IN gctBOOL Synchronized
+	);
+
+/* Convert pixel format. */
+gceSTATUS
+gcoHARDWARE_ConvertPixel(
+	IN gcoHARDWARE Hardware,
+	IN gctPOINTER SrcPixel,
+	OUT gctPOINTER TrgPixel,
+	IN gctUINT SrcBitOffset,
+	IN gctUINT TrgBitOffset,
+	IN gcsSURF_FORMAT_INFO_PTR SrcFormat,
+	IN gcsSURF_FORMAT_INFO_PTR TrgFormat,
+	IN gcsBOUNDARY_PTR SrcBoundary,
+	IN gcsBOUNDARY_PTR TrgBoundary
+	);
+
+/* Copy a rectangular area with format conversion. */
+gceSTATUS
+gcoHARDWARE_CopyPixels(
+	IN gcoHARDWARE Hardware,
+	IN gcsSURF_INFO_PTR Source,
+	IN gcsSURF_INFO_PTR Target,
+	IN gctINT SourceX,
+	IN gctINT SourceY,
+	IN gctINT TargetX,
+	IN gctINT TargetY,
+	IN gctINT Width,
+	IN gctINT Height
+	);
+
+/* Enable or disable anti-aliasing. */
+gceSTATUS
+gcoHARDWARE_SetAntiAlias(
+	IN gcoHARDWARE Hardware,
+	IN gctBOOL Enable
+	);
+
+/* Write data into the command buffer. */
+gceSTATUS
+gcoHARDWARE_WriteBuffer(
+	IN gcoHARDWARE Hardware,
+	IN gctCONST_POINTER Data,
+	IN gctSIZE_T Bytes,
+	IN gctBOOL Aligned
+	);
+
+/* Convert RGB8 color value to YUV color space. */
+void gcoHARDWARE_RGB2YUV(
+	gctUINT8 R,
+	gctUINT8 G,
+	gctUINT8 B,
+	gctUINT8_PTR Y,
+	gctUINT8_PTR U,
+	gctUINT8_PTR V
+	);
+
+/* Convert YUV color value to RGB8 color space. */
+void gcoHARDWARE_YUV2RGB(
+	gctUINT8 Y,
+	gctUINT8 U,
+	gctUINT8 V,
+	gctUINT8_PTR R,
+	gctUINT8_PTR G,
+	gctUINT8_PTR B
+	);
+
+/* Convert an API format. */
+gceSTATUS
+gcoHARDWARE_ConvertFormat(
+	IN gcoHARDWARE Hardware,
+	IN gceSURF_FORMAT Format,
+	OUT gctUINT32 * BitsPerPixel,
+	OUT gctUINT32 * BytesPerTile
+	);
+
+/* Align size to tile boundary. */
+gceSTATUS
+gcoHARDWARE_AlignToTile(
+	IN gcoHARDWARE Hardware,
+	IN gceSURF_TYPE Type,
+	IN OUT gctUINT32_PTR Width,
+	IN OUT gctUINT32_PTR Height,
+	OUT gctBOOL_PTR SuperTiled
+	);
+
+/*----------------------------------------------------------------------------*/
+/*----------------------- gcoHARDWARE Fragment Processor ---------------------*/
+
+/* Set the fragment processor configuration. */
+gceSTATUS
+gcoHARDWARE_SetFragmentConfiguration(
+	IN gcoHARDWARE Hardware,
+	IN gctBOOL ColorFromStream,
+	IN gctBOOL EnableFog,
+	IN gctBOOL EnableSmoothPoint,
+	IN gctUINT32 ClipPlanes
+	);
+
+/* Enable/disable texture stage operation. */
+gceSTATUS
+gcoHARDWARE_EnableTextureStage(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Stage,
+	IN gctBOOL Enable
+	);
+
+/* Program the channel enable masks for the color texture function. */
+gceSTATUS
+gcoHARDWARE_SetTextureColorMask(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Stage,
+	IN gctBOOL ColorEnabled,
+	IN gctBOOL AlphaEnabled
+	);
+
+/* Program the channel enable masks for the alpha texture function. */
+gceSTATUS
+gcoHARDWARE_SetTextureAlphaMask(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Stage,
+	IN gctBOOL ColorEnabled,
+	IN gctBOOL AlphaEnabled
+	);
+
+/* Program the constant fragment color. */
+gceSTATUS
+gcoHARDWARE_SetFragmentColorX(
+	IN gcoHARDWARE Hardware,
+	IN gctFIXED_POINT Red,
+	IN gctFIXED_POINT Green,
+	IN gctFIXED_POINT Blue,
+	IN gctFIXED_POINT Alpha
+	);
+
+gceSTATUS
+gcoHARDWARE_SetFragmentColorF(
+	IN gcoHARDWARE Hardware,
+	IN gctFLOAT Red,
+	IN gctFLOAT Green,
+	IN gctFLOAT Blue,
+	IN gctFLOAT Alpha
+	);
+
+/* Program the constant fog color. */
+gceSTATUS
+gcoHARDWARE_SetFogColorX(
+	IN gcoHARDWARE Hardware,
+	IN gctFIXED_POINT Red,
+	IN gctFIXED_POINT Green,
+	IN gctFIXED_POINT Blue,
+	IN gctFIXED_POINT Alpha
+	);
+
+gceSTATUS
+gcoHARDWARE_SetFogColorF(
+	IN gcoHARDWARE Hardware,
+	IN gctFLOAT Red,
+	IN gctFLOAT Green,
+	IN gctFLOAT Blue,
+	IN gctFLOAT Alpha
+	);
+
+/* Program the constant texture color. */
+gceSTATUS
+gcoHARDWARE_SetTetxureColorX(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Stage,
+	IN gctFIXED_POINT Red,
+	IN gctFIXED_POINT Green,
+	IN gctFIXED_POINT Blue,
+	IN gctFIXED_POINT Alpha
+	);
+
+gceSTATUS
+gcoHARDWARE_SetTetxureColorF(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Stage,
+	IN gctFLOAT Red,
+	IN gctFLOAT Green,
+	IN gctFLOAT Blue,
+	IN gctFLOAT Alpha
+	);
+
+/* Configure color texture function. */
+gceSTATUS
+gcoHARDWARE_SetColorTextureFunction(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Stage,
+	IN gceTEXTURE_FUNCTION Function,
+	IN gceTEXTURE_SOURCE Source0,
+	IN gceTEXTURE_CHANNEL Channel0,
+	IN gceTEXTURE_SOURCE Source1,
+	IN gceTEXTURE_CHANNEL Channel1,
+	IN gceTEXTURE_SOURCE Source2,
+	IN gceTEXTURE_CHANNEL Channel2,
+	IN gctINT Scale
+	);
+
+/* Configure alpha texture function. */
+gceSTATUS
+gcoHARDWARE_SetAlphaTextureFunction(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Stage,
+	IN gceTEXTURE_FUNCTION Function,
+	IN gceTEXTURE_SOURCE Source0,
+	IN gceTEXTURE_CHANNEL Channel0,
+	IN gceTEXTURE_SOURCE Source1,
+	IN gceTEXTURE_CHANNEL Channel1,
+	IN gceTEXTURE_SOURCE Source2,
+	IN gceTEXTURE_CHANNEL Channel2,
+	IN gctINT Scale
+	);
+
+/*----------------------------------------------------------------------------*/
+/*------------------------------- gcoHARDWARE 2D ------------------------------*/
+
+/* Translate API source color format to its hardware value. */
+gceSTATUS
+gcoHARDWARE_TranslateSourceFormat(
+	IN gcoHARDWARE Hardware,
+	IN gceSURF_FORMAT APIValue,
+	OUT gctUINT32* HwValue,
+	OUT gctUINT32* HwSwizzleValue,
+	OUT gctUINT32* HwIsYUVValue
+	);
+
+/* Translate API destination color format to its hardware value. */
+gceSTATUS
+gcoHARDWARE_TranslateDestinationFormat(
+    IN gcoHARDWARE Hardware,
+	IN gceSURF_FORMAT APIValue,
+	OUT gctUINT32* HwValue,
+	OUT gctUINT32* HwSwizzleValue,
+	OUT gctUINT32* HwIsYUVValue
+	);
+
+/* Translate API pattern color format to its hardware value. */
+gceSTATUS
+gcoHARDWARE_TranslatePatternFormat(
+    IN gcoHARDWARE Hardware,
+	IN gceSURF_FORMAT APIValue,
+	OUT gctUINT32* HwValue,
+	OUT gctUINT32* HwSwizzleValue,
+	OUT gctUINT32* HwIsYUVValue
+	);
+
+/* Translate API transparency mode to its hardware value. */
+gceSTATUS
+gcoHARDWARE_TranslateTransparency(
+	IN gceSURF_TRANSPARENCY APIValue,
+	OUT gctUINT32* HwValue
+	);
+
+/* Translate SURF API transparency mode to PE 2.0 transparency values. */
+gceSTATUS
+gcoHARDWARE_TranslateSurfTransparency(
+	IN gceSURF_TRANSPARENCY APIValue,
+	OUT gctUINT32* srcTransparency,
+	OUT gctUINT32* dstTransparency,
+	OUT gctUINT32* patTransparency
+	);
+
+/* Translate API transparency mode to its PE 1.0 hardware value. */
+gceSTATUS
+gcoHARDWARE_TranslateTransparencies(
+	IN gcoHARDWARE	Hardware,
+	IN gctUINT32	srcTransparency,
+	IN gctUINT32	dstTransparency,
+	IN gctUINT32	patTransparency,
+	OUT gctUINT32*  HwValue
+	);
+
+/* Translate API transparency mode to its hardware value. */
+gceSTATUS
+gcoHARDWARE_TranslateSourceTransparency(
+	IN gce2D_TRANSPARENCY APIValue,
+	OUT gctUINT32 * HwValue
+	);
+
+/* Translate API transparency mode to its hardware value. */
+gceSTATUS
+gcoHARDWARE_TranslateDestinationTransparency(
+	IN gce2D_TRANSPARENCY APIValue,
+	OUT gctUINT32 * HwValue
+	);
+
+/* Translate API transparency mode to its hardware value. */
+gceSTATUS
+gcoHARDWARE_TranslatePatternTransparency(
+	IN gce2D_TRANSPARENCY APIValue,
+	OUT gctUINT32 * HwValue
+	);
+
+/* Translate API YUV Color mode to its hardware value. */
+gceSTATUS
+gcoHARDWARE_TranslateYUVColorMode(
+	IN	gce2D_YUV_COLOR_MODE APIValue,
+	OUT gctUINT32 * HwValue
+	);
+
+/* Translate API pixel color multiply mode to its hardware value. */
+gceSTATUS
+gcoHARDWARE_PixelColorMultiplyMode(
+	IN	gce2D_PIXEL_COLOR_MULTIPLY_MODE APIValue,
+	OUT gctUINT32 * HwValue
+	);
+
+/* Translate API global color multiply mode to its hardware value. */
+gceSTATUS
+gcoHARDWARE_GlobalColorMultiplyMode(
+	IN	gce2D_GLOBAL_COLOR_MULTIPLY_MODE APIValue,
+	OUT gctUINT32 * HwValue
+	);
+
+/* Translate API mono packing mode to its hardware value. */
+gceSTATUS
+gcoHARDWARE_TranslateMonoPack(
+	IN gceSURF_MONOPACK APIValue,
+	OUT gctUINT32* HwValue
+	);
+
+/* Translate API 2D command to its hardware value. */
+gceSTATUS
+gcoHARDWARE_TranslateCommand(
+	IN gce2D_COMMAND APIValue,
+	OUT gctUINT32* HwValue
+	);
+
+/* Translate API per-pixel alpha mode to its hardware value. */
+gceSTATUS
+gcoHARDWARE_TranslatePixelAlphaMode(
+	IN gceSURF_PIXEL_ALPHA_MODE APIValue,
+	OUT gctUINT32* HwValue
+	);
+
+/* Translate API global alpha mode to its hardware value. */
+gceSTATUS
+gcoHARDWARE_TranslateGlobalAlphaMode(
+	IN gceSURF_GLOBAL_ALPHA_MODE APIValue,
+	OUT gctUINT32* HwValue
+	);
+
+/* Translate API per-pixel color mode to its hardware value. */
+gceSTATUS
+gcoHARDWARE_TranslatePixelColorMode(
+	IN gceSURF_PIXEL_COLOR_MODE APIValue,
+	OUT gctUINT32* HwValue
+	);
+
+/* Translate API alpha factor mode to its hardware value. */
+gceSTATUS
+gcoHARDWARE_TranslateAlphaFactorMode(
+	IN	gcoHARDWARE Hardware,
+	IN	gceSURF_BLEND_FACTOR_MODE APIValue,
+	OUT gctUINT32_PTR HwValue
+	);
+
+/* Configure monochrome source. */
+gceSTATUS
+gcoHARDWARE_SetMonochromeSource(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT8 MonoTransparency,
+	IN gceSURF_MONOPACK DataPack,
+	IN gctBOOL CoordRelative,
+	IN gctUINT32 FgColor32,
+	IN gctUINT32 BgColor32
+	);
+
+/* Configure color source. */
+gceSTATUS
+gcoHARDWARE_SetColorSource(
+	IN gcoHARDWARE Hardware,
+	IN gcsSURF_INFO_PTR Surface,
+	IN gctBOOL CoordRelative
+	);
+
+/* Configure masked color source. */
+gceSTATUS
+gcoHARDWARE_SetMaskedSource(
+	IN gcoHARDWARE Hardware,
+	IN gcsSURF_INFO_PTR Surface,
+	IN gctBOOL CoordRelative,
+	IN gceSURF_MONOPACK MaskPack
+	);
+
+/* Setup the source rectangle. */
+gceSTATUS
+gcoHARDWARE_SetSource(
+	IN gcoHARDWARE Hardware,
+	IN gcsRECT_PTR SrcRect
+	);
+
+/* Setup the fraction of the source origin for filter blit. */
+gceSTATUS
+gcoHARDWARE_SetOriginFraction(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT16 HorFraction,
+	IN gctUINT16 VerFraction
+	);
+
+/* Load 256-entry color table for INDEX8 source surfaces. */
+gceSTATUS
+gcoHARDWARE_LoadPalette(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT FirstIndex,
+	IN gctUINT IndexCount,
+	IN gctPOINTER ColorTable,
+	IN gctBOOL ColorConvert
+	);
+
+/* Setup the source pixel swizzle. */
+gceSTATUS
+gcoHARDWARE_SetSourceSwizzle(
+	IN gcoHARDWARE Hardware,
+	IN gceSURF_SWIZZLE Swizzle
+	);
+
+/* Setup the source pixel UV swizzle. */
+gceSTATUS
+gcoHARDWARE_SetSourceSwizzleUV(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 SwizzleUV
+	);
+
+/* Setup the source global color value in ARGB8 format. */
+gceSTATUS
+gcoHARDWARE_SetSourceGlobalColor(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 Color
+	);
+
+/* Setup the target global color value in ARGB8 format. */
+gceSTATUS
+gcoHARDWARE_SetTargetGlobalColor(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 Color
+	);
+
+/* Setup the source and target pixel multiply modes. */
+gceSTATUS
+gcoHARDWARE_SetMultiplyModes(
+	IN gcoHARDWARE Hardware,
+	IN gce2D_PIXEL_COLOR_MULTIPLY_MODE SrcPremultiplySrcAlpha,
+	IN gce2D_PIXEL_COLOR_MULTIPLY_MODE DstPremultiplyDstAlpha,
+	IN gce2D_GLOBAL_COLOR_MULTIPLY_MODE SrcPremultiplyGlobalMode,
+	IN gce2D_PIXEL_COLOR_MULTIPLY_MODE DstDemultiplyDstAlpha
+	);
+
+/* Setup the source, target and pattern transparency modes. */
+gceSTATUS
+gcoHARDWARE_SetTransparencyModes(
+	IN gcoHARDWARE Hardware,
+	IN gce2D_TRANSPARENCY SrcTransparency,
+	IN gce2D_TRANSPARENCY DstTransparency,
+	IN gce2D_TRANSPARENCY PatTransparency
+	);
+
+/* Setup the source, target and pattern transparency modes.
+   Used only for have backward compatibility.
+*/
+gceSTATUS
+gcoHARDWARE_SetAutoTransparency(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT8 FgRop,
+	IN gctUINT8 BgRop
+	);
+
+/* Setup the source color key value in ARGB8 format. */
+gceSTATUS
+gcoHARDWARE_SetSourceColorKeyRange(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 ColorLow,
+	IN gctUINT32 ColorHigh,
+	IN gctBOOL ColorPack
+	);
+
+/* Setup the YUV color space mode. */
+gceSTATUS gcoHARDWARE_YUVColorMode(
+	IN gcoHARDWARE Hardware,
+	IN gce2D_YUV_COLOR_MODE  Mode
+	);
+
+/* Save mono colors for later programming. */
+gceSTATUS gcoHARDWARE_SaveMonoColors(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 FgColor,
+	IN gctUINT32 BgColor
+	);
+
+/* Save transparency color for later programming. */
+gceSTATUS gcoHARDWARE_SaveTransparencyColor(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 Color32
+	);
+
+/* Set clipping rectangle. */
+gceSTATUS
+gcoHARDWARE_SetClipping(
+	IN gcoHARDWARE Hardware,
+	IN gcsRECT_PTR Rect
+	);
+
+/* Configure destination. */
+gceSTATUS
+gcoHARDWARE_SetTarget(
+	IN gcoHARDWARE Hardware,
+	IN gcsSURF_INFO_PTR Surface
+	);
+
+/* Set the target color format. */
+gceSTATUS
+gcoHARDWARE_SetTargetFormat(
+	IN gcoHARDWARE Hardware,
+	IN gceSURF_FORMAT Format
+	);
+
+/* Setup the destination color key value in ARGB8 format. */
+gceSTATUS
+gcoHARDWARE_SetTargetColorKeyRange(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 ColorLow,
+	IN gctUINT32 ColorHigh
+	);
+
+/* Load solid (single) color pattern. */
+gceSTATUS
+gcoHARDWARE_LoadSolidColorPattern(
+	IN gcoHARDWARE Hardware,
+	IN gctBOOL ColorConvert,
+	IN gctUINT32 Color,
+	IN gctUINT64 Mask
+	);
+
+/* Load monochrome pattern. */
+gceSTATUS
+gcoHARDWARE_LoadMonochromePattern(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 OriginX,
+	IN gctUINT32 OriginY,
+	IN gctBOOL ColorConvert,
+	IN gctUINT32 FgColor,
+	IN gctUINT32 BgColor,
+	IN gctUINT64 Bits,
+	IN gctUINT64 Mask
+	);
+
+/* Load color pattern. */
+gceSTATUS
+gcoHARDWARE_LoadColorPattern(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 OriginX,
+	IN gctUINT32 OriginY,
+	IN gctUINT32 Address,
+	IN gceSURF_FORMAT Format,
+	IN gctUINT64 Mask
+	);
+
+/* Calculate stretch factor. */
+gctUINT32
+gcoHARDWARE_GetStretchFactor(
+	IN gctINT32 SrcSize,
+	IN gctINT32 DestSize
+	);
+
+/* Calculate the stretch factors. */
+gceSTATUS
+gcoHARDWARE_GetStretchFactors(
+	IN gcsRECT_PTR SrcRect,
+	IN gcsRECT_PTR DestRect,
+	OUT gctUINT32 * HorFactor,
+	OUT gctUINT32 * VerFactor
+	);
+
+/* Calculate and program the stretch factors. */
+gceSTATUS
+gcoHARDWARE_SetStretchFactors(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 HorFactor,
+	IN gctUINT32 VerFactor
+	);
+
+/* Determines the usage of 2D resources (source/pattern/destination). */
+void
+gcoHARDWARE_Get2DResourceUsage(
+	IN gctUINT8 FgRop,
+	IN gctUINT8 BgRop,
+	IN gctUINT32 Transparency,
+	OUT gctBOOL_PTR UseSource,
+	OUT gctBOOL_PTR UsePattern,
+	OUT gctBOOL_PTR UseDestination
+	);
+
+/* Set 2D clear color in A8R8G8B8 format. */
+gceSTATUS
+gcoHARDWARE_Set2DClearColor(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 Color,
+	IN gctBOOL ColorConvert
+	);
+
+/* Enable/disable 2D BitBlt mirrorring. */
+gceSTATUS
+gcoHARDWARE_SetBitBlitMirror(
+	IN gcoHARDWARE Hardware,
+	IN gctBOOL HorizontalMirror,
+	IN gctBOOL VerticalMirror
+	);
+
+/* Start a DE command. */
+gceSTATUS
+gcoHARDWARE_StartDE(
+	IN gcoHARDWARE Hardware,
+	IN gce2D_COMMAND Command,
+	IN gctUINT32 SrcRectCount,
+	IN gcsRECT_PTR SrcRect,
+	IN gctUINT32 DestRectCount,
+	IN gcsRECT_PTR DestRect,
+	IN gctUINT32 FgRop,
+	IN gctUINT32 BgRop
+	);
+
+/* Start a DE command to draw one or more Lines,
+   with a common or individual color. */
+gceSTATUS
+gcoHARDWARE_StartDELine(
+	IN gcoHARDWARE Hardware,
+	IN gce2D_COMMAND Command,
+	IN gctUINT32 RectCount,
+	IN gcsRECT_PTR DestRect,
+	IN gctUINT32 ColorCount,
+	IN gctUINT32_PTR Color32,
+	IN gctUINT32 FgRop,
+	IN gctUINT32 BgRop
+	);
+
+/* Start a DE command with a monochrome stream. */
+gceSTATUS
+gcoHARDWARE_StartDEStream(
+	IN gcoHARDWARE Hardware,
+	IN gcsRECT_PTR DestRect,
+	IN gctUINT32 FgRop,
+	IN gctUINT32 BgRop,
+	IN gctUINT32 StreamSize,
+	OUT gctPOINTER * StreamBits
+	);
+
+/* Set kernel size. */
+gceSTATUS
+gcoHARDWARE_SetKernelSize(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT8 HorKernelSize,
+	IN gctUINT8 VerKernelSize
+	);
+
+/* Set filter type. */
+gceSTATUS
+gcoHARDWARE_SetFilterType(
+	IN gcoHARDWARE Hardware,
+	IN gceFILTER_TYPE FilterType
+	);
+
+/* Set the filter kernel array by user. */
+gceSTATUS gcoHARDWARE_SetUserFilterKernel(
+	IN gcoHARDWARE Hardware,
+	IN gceFILTER_PASS_TYPE PassType,
+	IN gctUINT16_PTR KernelArray
+	);
+
+/* Select the pass(es) to be done for user defined filter. */
+gceSTATUS gcoHARDWARE_EnableUserFilterPasses(
+	IN gcoHARDWARE Hardware,
+	IN gctBOOL HorPass,
+	IN gctBOOL VerPass
+	);
+
+/* Frees the kernel weight array. */
+gceSTATUS
+gcoHARDWARE_FreeKernelArray(
+	IN gcoHARDWARE Hardware
+	);
+
+/* Frees the temporary buffer allocated by filter blit operation. */
+gceSTATUS
+gcoHARDWARE_FreeFilterBuffer(
+	IN gcoHARDWARE Hardware
+	);
+
+/* Filter blit. */
+gceSTATUS
+gcoHARDWARE_FilterBlit(
+	IN gcoHARDWARE Hardware,
+	IN gcsSURF_INFO_PTR SrcSurface,
+	IN gcsSURF_INFO_PTR DestSurface,
+	IN gcsRECT_PTR SrcRect,
+	IN gcsRECT_PTR DestRect,
+	IN gcsRECT_PTR DestSubRect
+	);
+
+/* Enable alpha blending engine in the hardware and disengage the ROP engine. */
+gceSTATUS
+gcoHARDWARE_EnableAlphaBlend(
+	IN gcoHARDWARE Hardware,
+	IN gceSURF_PIXEL_ALPHA_MODE SrcAlphaMode,
+	IN gceSURF_PIXEL_ALPHA_MODE DstAlphaMode,
+	IN gceSURF_GLOBAL_ALPHA_MODE SrcGlobalAlphaMode,
+	IN gceSURF_GLOBAL_ALPHA_MODE DstGlobalAlphaMode,
+	IN gceSURF_BLEND_FACTOR_MODE SrcFactorMode,
+	IN gceSURF_BLEND_FACTOR_MODE DstFactorMode,
+	IN gceSURF_PIXEL_COLOR_MODE SrcColorMode,
+	IN gceSURF_PIXEL_COLOR_MODE DstColorMode
+	);
+
+/* Disable alpha blending engine in the hardware and engage the ROP engine. */
+gceSTATUS
+gcoHARDWARE_DisableAlphaBlend(
+	IN gcoHARDWARE Hardware
+	);
+
+/* Set the GPU clock cycles, after which the idle 2D engine
+   will trigger a flush. */
+gceSTATUS
+gcoHARDWARE_SetAutoFlushCycles(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 Cycles
+	);
+
+gceSTATUS
+gcoHARDWARE_ColorConvertToARGB8(
+	IN gceSURF_FORMAT Format,
+	IN gctUINT32 NumColors,
+	IN gctUINT32_PTR Color,
+	OUT gctUINT32_PTR Color32
+	);
+
+gceSTATUS
+gcoHARDWARE_ColorConvertFromARGB8(
+	IN gceSURF_FORMAT Format,
+	IN gctUINT32 NumColors,
+	IN gctUINT32_PTR Color32,
+	OUT gctUINT32_PTR Color
+	);
+
+gceSTATUS
+gcoHARDWARE_ColorPackFromARGB8(
+	IN gceSURF_FORMAT Format,
+	IN gctUINT32 Color32,
+	OUT gctUINT32_PTR Color
+	);
+
+#ifndef VIVANTE_NO_3D
+/*----------------------------------------------------------------------------*/
+/*------------------------------- gcoHARDWARE 3D ------------------------------*/
+
+/* Query if a surface is renderable or not. */
+gceSTATUS
+gcoHARDWARE_IsSurfaceRenderable(
+	IN gcoHARDWARE Hardware,
+	IN gcsSURF_INFO_PTR Surface
+	);
+
+/* Initialize the 3D hardware. */
+gceSTATUS
+gcoHARDWARE_Initialize3D(
+	IN gcoHARDWARE Hardware
+	);
+
+/* Query the OpenGL ES 2.0 capabilities. */
+gceSTATUS
+gcoHARDWARE_QueryOpenGL2(
+	OUT gctBOOL * OpenGL2
+	);
+
+/* Query the stream capabilities. */
+gceSTATUS
+gcoHARDWARE_QueryStreamCaps(
+	IN gcoHARDWARE Hardware,
+	OUT gctUINT * MaxAttributes,
+	OUT gctUINT * MaxStreamSize,
+	OUT gctUINT * NumberOfStreams,
+	OUT gctUINT * Alignment
+	);
+
+/* Flush the evrtex caches. */
+gceSTATUS
+gcoHARDWARE_FlushVertex(
+	IN gcoHARDWARE Hardware
+	);
+
+/* Flush the evrtex caches. */
+gceSTATUS
+gcoHARDWARE_FlushL2Cache(
+	IN gcoHARDWARE Hardware
+	);
+
+/* Query the index capabilities. */
+gceSTATUS
+gcoHARDWARE_QueryIndexCaps(
+	OUT gctBOOL * Index8,
+	OUT gctBOOL * Index16,
+	OUT gctBOOL * Index32,
+	OUT gctUINT * MaxIndex
+	);
+
+/* Query the target capabilities. */
+gceSTATUS
+gcoHARDWARE_QueryTargetCaps(
+	IN gcoHARDWARE Hardware,
+	OUT gctUINT * MaxWidth,
+	OUT gctUINT * MaxHeight,
+	OUT gctUINT * MultiTargetCount,
+	OUT gctUINT * MaxSamples
+	);
+
+/* Query the texture capabilities. */
+gceSTATUS
+gcoHARDWARE_QueryTextureCaps(
+	OUT gctUINT * MaxWidth,
+	OUT gctUINT * MaxHeight,
+	OUT gctUINT * MaxDepth,
+	OUT gctBOOL * Cubic,
+	OUT gctBOOL * NonPowerOfTwo,
+	OUT gctUINT * VertexSamplers,
+	OUT gctUINT * PixelSamplers
+	);
+
+/* Query the shader support. */
+gceSTATUS
+gcoHARDWARE_QueryShaderCaps(
+	OUT gctUINT * VertexUniforms,
+	OUT gctUINT * FragmentUniforms,
+	OUT gctUINT * Varyings
+	);
+
+gceSTATUS
+gcoHARDWARE_GetClosestTextureFormat(
+	IN gcoHARDWARE Hardware,
+	IN gceSURF_FORMAT InFormat,
+	OUT gceSURF_FORMAT* OutFormat
+	);
+
+/* Query the texture support. */
+gceSTATUS
+gcoHARDWARE_QueryTexture(
+	IN gceSURF_FORMAT Format,
+	IN gctUINT Level,
+	IN gctUINT Width,
+	IN gctUINT Height,
+	IN gctUINT Depth,
+	IN gctUINT Faces,
+	OUT gctUINT * WidthAlignment,
+	OUT gctUINT * HeightAlignment,
+	OUT gctSIZE_T * SliceSize
+	);
+
+/* Upload data into a texture. */
+gceSTATUS
+gcoHARDWARE_UploadTexture(
+	IN gcoHARDWARE Hardware,
+	IN gceSURF_FORMAT TargetFormat,
+	IN gctUINT32 Address,
+	IN gctPOINTER Logical,
+	IN gctUINT32 Offset,
+	IN gctINT TargetStride,
+	IN gctUINT X,
+	IN gctUINT Y,
+	IN gctUINT Width,
+	IN gctUINT Height,
+	IN gctCONST_POINTER Memory,
+	IN gctINT SourceStride,
+	IN gceSURF_FORMAT SourceFormat
+	);
+
+/* Flush the texture cache. */
+gceSTATUS
+gcoHARDWARE_FlushTexture(
+	IN gcoHARDWARE Hardware
+	);
+
+/* Set the texture addressing mode. */
+gceSTATUS
+gcoHARDWARE_SetTextureAddressingMode(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Sampler,
+	IN gceTEXTURE_WHICH Which,
+	IN gceTEXTURE_ADDRESSING Mode
+	);
+
+/* Set the unsigned integer texture border color. */
+gceSTATUS
+gcoHARDWARE_SetTextureBorderColor(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Sampler,
+	IN gctUINT Red,
+	IN gctUINT Green,
+	IN gctUINT Blue,
+	IN gctUINT Alpha
+	);
+
+/* Set the fixed point texture border color. */
+gceSTATUS
+gcoHARDWARE_SetTextureBorderColorX(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Sampler,
+	IN gctFIXED_POINT Red,
+	IN gctFIXED_POINT Green,
+	IN gctFIXED_POINT Blue,
+	IN gctFIXED_POINT Alpha
+	);
+
+/* Set the floating point texture border color. */
+gceSTATUS
+gcoHARDWARE_SetTextureBorderColorF(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Sampler,
+	IN gctFLOAT Red,
+	IN gctFLOAT Green,
+	IN gctFLOAT Blue,
+	IN gctFLOAT Alpha
+	);
+
+/* Set the texture minification filter. */
+gceSTATUS
+gcoHARDWARE_SetTextureMinFilter(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Sampler,
+	IN gceTEXTURE_FILTER Filter
+	);
+
+/* Set the texture magnification filter. */
+gceSTATUS
+gcoHARDWARE_SetTextureMagFilter(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Sampler,
+	IN gceTEXTURE_FILTER Filter
+	);
+
+/* Set the texture mip map filter. */
+gceSTATUS
+gcoHARDWARE_SetTextureMipFilter(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Sampler,
+	IN gceTEXTURE_FILTER Filter
+	);
+
+/*Set RoundUV, add 1./64. to UV for Nearest sample*/
+gceSTATUS
+gcoHARDWARE_SetTextureRoundUV(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Sampler,
+	IN gctINT RoundEnable
+	);
+
+/* Set the fixed point bias for the level of detail. */
+gceSTATUS
+gcoHARDWARE_SetTextureLODBiasX(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Sampler,
+	IN gctFIXED_POINT Bias
+	);
+
+/* Set the floating point bias for the level of detail. */
+gceSTATUS
+gcoHARDWARE_SetTextureLODBiasF(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Sampler,
+	IN gctFLOAT Bias
+	);
+
+/* Set the fixed point minimum value for the level of detail. */
+gceSTATUS
+gcoHARDWARE_SetTextureLODMinX(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Sampler,
+	IN gctFIXED_POINT LevelOfDetail
+	);
+
+/* Set the floating point minimum value for the level of detail. */
+gceSTATUS
+gcoHARDWARE_SetTextureLODMinF(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Sampler,
+	IN gctFLOAT LevelOfDetail
+	);
+
+/* Set the fixed point maximum value for the level of detail. */
+gceSTATUS
+gcoHARDWARE_SetTextureLODMaxX(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Sampler,
+	IN gctFIXED_POINT LevelOfDetail
+	);
+
+/* Set the floating point maximum value for the level of detail. */
+gceSTATUS
+gcoHARDWARE_SetTextureLODMaxF(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Sampler,
+	IN gctFLOAT LevelOfDetail
+	);
+
+/* Set texture format. */
+gceSTATUS
+gcoHARDWARE_SetTextureFormat(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Sampler,
+	IN gceSURF_FORMAT Format,
+	IN gceENDIAN_HINT EndianHint,
+	IN gctUINT Width,
+	IN gctUINT Height,
+	IN gctUINT Depth,
+	IN gctUINT Faces
+	);
+
+/* Set texture LOD address. */
+gceSTATUS
+gcoHARDWARE_SetTextureLOD(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Sampler,
+	IN gctINT LevelOfDetail,
+	IN gctUINT32 Address,
+	IN gctINT Stride
+	);
+
+/* Clear wrapper to distinguish between software and resolve(3d) clear cases. */
+gceSTATUS
+gcoHARDWARE_ClearRect(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 Address,
+	IN gctPOINTER LogicalAddress,
+	IN gctUINT32 Stride,
+	IN gctINT Left,
+	IN gctINT Top,
+	IN gctINT Right,
+	IN gctINT Bottom,
+	IN gceSURF_FORMAT Format,
+	IN gctUINT32 ClearValue,
+	IN gctUINT8 ClearMask
+	);
+
+/* Append a TILE STATUS CLEAR command to a command queue. */
+gceSTATUS
+gcoHARDWARE_ClearTileStatus(
+	IN gcoHARDWARE Hardware,
+	IN gcsSURF_INFO_PTR Surface,
+	IN gctUINT32 Address,
+	IN gctSIZE_T Bytes,
+	IN gceSURF_TYPE Type,
+	IN gctUINT32 ClearValue,
+	IN gctUINT8 ClearMask
+	);
+
+gceSTATUS
+gco3D_ClearHzTileStatus(
+	IN gco3D Engine,
+	IN gcsSURF_INFO_PTR Surface,
+	IN gcsSURF_NODE_PTR TileStatus
+	);
+
+gceSTATUS
+gcoHARDWARE_SetRenderTarget(
+	IN gcoHARDWARE Hardware,
+	IN gcsSURF_INFO_PTR Surface
+	);
+
+gceSTATUS
+gcoHARDWARE_SetDepthBuffer(
+	IN gcoHARDWARE Hardware,
+	IN gcsSURF_INFO_PTR Surface
+	);
+
+gceSTATUS
+gcoHARDWARE_SetAPI(
+	IN gcoHARDWARE Hardware,
+	IN gceAPI Api
+	);
+
+gceSTATUS
+gcoHARDWARE_SetViewport(
+	IN gcoHARDWARE Hardware,
+	IN gctINT32 Left,
+	IN gctINT32 Top,
+	IN gctINT32 Right,
+	IN gctINT32 Bottom
+	);
+
+gceSTATUS
+gcoHARDWARE_SetScissors(
+	IN gcoHARDWARE Hardware,
+	IN gctINT32 Left,
+	IN gctINT32 Top,
+	IN gctINT32 Right,
+	IN gctINT32 Bottom
+	);
+
+gceSTATUS
+gcoHARDWARE_SetShading(
+	IN gcoHARDWARE Hardware,
+	IN gceSHADING Shading
+	);
+
+gceSTATUS
+gcoHARDWARE_SetBlendEnable(
+	IN gcoHARDWARE Hardware,
+	IN gctBOOL Enabled
+	);
+
+gceSTATUS
+gcoHARDWARE_SetBlendFunctionSource(
+	IN gcoHARDWARE Hardware,
+	IN gceBLEND_FUNCTION FunctionRGB,
+	IN gceBLEND_FUNCTION FunctionAlpha
+	);
+
+gceSTATUS
+gcoHARDWARE_SetBlendFunctionTarget(
+	IN gcoHARDWARE Hardware,
+	IN gceBLEND_FUNCTION FunctionRGB,
+	IN gceBLEND_FUNCTION FunctionAlpha
+	);
+
+gceSTATUS
+gcoHARDWARE_SetBlendMode(
+	IN gcoHARDWARE Hardware,
+	IN gceBLEND_MODE ModeRGB,
+	IN gceBLEND_MODE ModeAlpha
+	);
+
+gceSTATUS
+gcoHARDWARE_SetBlendColor(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT8 Red,
+	IN gctUINT8 Green,
+	IN gctUINT8 Blue,
+	IN gctUINT8 Alpha
+	);
+
+gceSTATUS
+gcoHARDWARE_SetBlendColorX(
+	IN gcoHARDWARE Hardware,
+	IN gctFIXED_POINT Red,
+	IN gctFIXED_POINT Green,
+	IN gctFIXED_POINT Blue,
+	IN gctFIXED_POINT Alpha
+	);
+
+gceSTATUS
+gcoHARDWARE_SetBlendColorF(
+	IN gcoHARDWARE Hardware,
+	IN gctFLOAT Red,
+	IN gctFLOAT Green,
+	IN gctFLOAT Blue,
+	IN gctFLOAT Alpha
+	);
+
+gceSTATUS
+gcoHARDWARE_SetCulling(
+	IN gcoHARDWARE Hardware,
+	IN gceCULL Mode
+	);
+
+gceSTATUS
+gcoHARDWARE_SetPointSizeEnable(
+	IN gcoHARDWARE Hardware,
+	IN gctBOOL Enable
+	);
+
+gceSTATUS
+gcoHARDWARE_SetPointSprite(
+	IN gcoHARDWARE Hardware,
+	IN gctBOOL Enable
+	);
+
+gceSTATUS
+gcoHARDWARE_SetFill(
+	IN gcoHARDWARE Hardware,
+	IN gceFILL Mode
+	);
+
+gceSTATUS
+gcoHARDWARE_SetDepthCompare(
+	IN gcoHARDWARE Hardware,
+	IN gceCOMPARE DepthCompare
+	);
+
+gceSTATUS
+gcoHARDWARE_SetDepthWrite(
+	IN gcoHARDWARE Hardware,
+	IN gctBOOL Enable
+	);
+
+gceSTATUS
+gcoHARDWARE_SetDepthMode(
+	IN gcoHARDWARE Hardware,
+	IN gceDEPTH_MODE DepthMode
+	);
+
+gceSTATUS
+gcoHARDWARE_SetDepthRangeX(
+	IN gcoHARDWARE Hardware,
+	IN gceDEPTH_MODE DepthMode,
+	IN gctFIXED_POINT Near,
+	IN gctFIXED_POINT Far
+	);
+
+gceSTATUS
+gcoHARDWARE_SetDepthRangeF(
+	IN gcoHARDWARE Hardware,
+	IN gceDEPTH_MODE DepthMode,
+	IN gctFLOAT Near,
+	IN gctFLOAT Far
+	);
+
+gceSTATUS
+gcoHARDWARE_SetDepthScaleBiasX(
+	IN gcoHARDWARE Hardware,
+	IN gctFIXED_POINT DepthScale,
+	IN gctFIXED_POINT DepthBias
+	);
+
+gceSTATUS
+gcoHARDWARE_SetDepthScaleBiasF(
+	IN gcoHARDWARE Hardware,
+	IN gctFLOAT DepthScale,
+	IN gctFLOAT DepthBias
+	);
+
+gceSTATUS
+gcoHARDWARE_SetLastPixelEnable(
+	IN gcoHARDWARE Hardware,
+	IN gctBOOL Enable
+	);
+
+gceSTATUS
+gcoHARDWARE_SetDither(
+	IN gcoHARDWARE Hardware,
+	IN gctBOOL Enable
+	);
+
+gceSTATUS
+gcoHARDWARE_SetColorWrite(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT8 Enable
+	);
+
+gceSTATUS
+gcoHARDWARE_SetEarlyDepth(
+	IN gcoHARDWARE Hardware,
+	IN gctBOOL Enable
+	);
+
+gceSTATUS
+gcoHARDWARE_SetStencilMode(
+	IN gcoHARDWARE Hardware,
+	IN gceSTENCIL_MODE Mode
+	);
+
+gceSTATUS
+gcoHARDWARE_SetStencilMask(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT8 Mask
+	);
+
+gceSTATUS
+gcoHARDWARE_SetStencilWriteMask(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT8 Mask
+	);
+
+gceSTATUS
+gcoHARDWARE_SetStencilReference(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT8 Reference
+	);
+
+gceSTATUS
+gcoHARDWARE_SetStencilCompare(
+	IN gcoHARDWARE Hardware,
+	IN gceSTENCIL_WHERE Where,
+	IN gceCOMPARE Compare
+	);
+
+gceSTATUS
+gcoHARDWARE_SetStencilPass(
+	IN gcoHARDWARE Hardware,
+	IN gceSTENCIL_WHERE Where,
+	IN gceSTENCIL_OPERATION Operation
+	);
+
+gceSTATUS
+gcoHARDWARE_SetStencilFail(
+	IN gcoHARDWARE Hardware,
+	IN gceSTENCIL_WHERE Where,
+	IN gceSTENCIL_OPERATION Operation
+	);
+
+gceSTATUS
+gcoHARDWARE_SetStencilDepthFail(
+	IN gcoHARDWARE Hardware,
+	IN gceSTENCIL_WHERE Where,
+	IN gceSTENCIL_OPERATION Operation
+	);
+
+gceSTATUS
+gcoHARDWARE_SetAlphaTest(
+	IN gcoHARDWARE Hardware,
+	IN gctBOOL Enable
+	);
+
+gceSTATUS
+gcoHARDWARE_SetAlphaCompare(
+	IN gcoHARDWARE Hardware,
+	IN gceCOMPARE Compare
+	);
+
+gceSTATUS
+gcoHARDWARE_SetAlphaReference(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT8 Reference
+	);
+
+gceSTATUS
+gcoHARDWARE_SetAlphaReferenceX(
+	IN gcoHARDWARE Hardware,
+	IN gctFIXED_POINT Reference
+	);
+
+gceSTATUS
+gcoHARDWARE_SetAlphaReferenceF(
+	IN gcoHARDWARE Hardware,
+	IN gctFLOAT Reference
+	);
+
+gceSTATUS
+gcoHARDWARE_BindStream(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 Address,
+	IN gctINT Stride,
+	IN gctUINT Number
+	);
+
+gceSTATUS
+gcoHARDWARE_BindIndex(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 Address,
+	IN gceINDEX_TYPE IndexType
+	);
+
+gceSTATUS
+gcoHARDWARE_SetAntiAliasLine(
+	IN gcoHARDWARE Hardware,
+	IN gctBOOL Enable
+	);
+
+gceSTATUS
+gcoHARDWARE_SetAALineTexSlot(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT TexSlot
+	);
+
+gceSTATUS
+gcoHARDWARE_SetAALineWidth(
+	IN gcoHARDWARE Hardware,
+	IN gctFLOAT Width
+	);
+
+
+/* Draw a number of primitives. */
+gceSTATUS
+gcoHARDWARE_DrawPrimitives(
+	IN gcoHARDWARE Hardware,
+	IN gcePRIMITIVE Type,
+	IN gctINT StartVertex,
+	IN gctSIZE_T PrimitiveCount
+	);
+
+/* Draw a number of primitives using offsets. */
+gceSTATUS
+gcoHARDWARE_DrawPrimitivesOffset(
+	IN gcoHARDWARE Hardware,
+	IN gcePRIMITIVE Type,
+	IN gctINT32 StartOffset,
+	IN gctSIZE_T PrimitiveCount
+	);
+
+/* Draw a number of indexed primitives. */
+gceSTATUS
+gcoHARDWARE_DrawIndexedPrimitives(
+	IN gcoHARDWARE Hardware,
+	IN gcePRIMITIVE Type,
+	IN gctINT BaseVertex,
+	IN gctINT StartIndex,
+	IN gctSIZE_T PrimitiveCount
+	);
+
+/* Draw a number of indexed primitives using offsets. */
+gceSTATUS
+gcoHARDWARE_DrawIndexedPrimitivesOffset(
+	IN gcoHARDWARE Hardware,
+	IN gcePRIMITIVE Type,
+	IN gctINT32 BaseOffset,
+	IN gctINT32 StartOffset,
+	IN gctSIZE_T PrimitiveCount
+	);
+
+/* Copy data into video memory. */
+gceSTATUS
+gcoHARDWARE_CopyData(
+	IN gcoHARDWARE Hardware,
+	IN gcsSURF_NODE_PTR Memory,
+	IN gctUINT32 Offset,
+	IN gctCONST_POINTER Buffer,
+	IN gctSIZE_T Bytes
+	);
+
+gceSTATUS
+gcoHARDWARE_SetStream(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 Index,
+	IN gctUINT32 Address,
+	IN gctUINT32 Stride
+	);
+
+gceSTATUS
+gcoHARDWARE_SetAttributes(
+	IN gcoHARDWARE Hardware,
+	IN gcsVERTEX_ATTRIBUTES_PTR Attributes,
+	IN gctUINT32 AttributeCount
+	);
+
+gceSTATUS
+gcoHARDWARE_QuerySamplerBase(
+	IN gcoHARDWARE Hardware,
+	OUT gctSIZE_T * VertexCount,
+	OUT gctINT_PTR VertexBase,
+	OUT gctSIZE_T * FragmentCount,
+	OUT gctINT_PTR FragmentBase
+	);
+
+gceSTATUS
+gcoHARDWARE_SetDepthOnly(
+	IN gcoHARDWARE Hardware,
+	IN gctBOOL Enable
+	);
+
+gceSTATUS
+gcoHARDWARE_SetCentroids(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32	Index,
+	IN gctPOINTER	Centroids
+	);
+#endif /* VIVANTE_NO_3D */
+
+/* Append a CLEAR command to a command queue. */
+gceSTATUS
+gcoHARDWARE_Clear(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 Address,
+	IN gctUINT32 Stride,
+	IN gctINT32 Left,
+	IN gctINT32 Top,
+	IN gctINT32 Right,
+	IN gctINT32 Bottom,
+	IN gceSURF_FORMAT Format,
+	IN gctUINT32 ClearValue,
+	IN gctUINT8 ClearMask
+	);
+
+/* Software clear. */
+gceSTATUS
+gcoHARDWARE_ClearSoftware(
+	IN gcoHARDWARE Hardware,
+	IN gctPOINTER LogicalAddress,
+	IN gctUINT32 Stride,
+	IN gctINT32 Left,
+	IN gctINT32 Top,
+	IN gctINT32 Right,
+	IN gctINT32 Bottom,
+	IN gceSURF_FORMAT Format,
+	IN gctUINT32 ClearValue,
+	IN gctUINT8 ClearMask
+	);
+
+/* Verifies whether 2D engine is available. */
+gceSTATUS
+gcoHARDWARE_Is2DAvailable(
+    IN gcoHARDWARE Hardware
+    );
+
+/* Sets the software 2D renderer force flag. */
+gceSTATUS
+gcoHARDWARE_UseSoftware2D(
+    IN gcoHARDWARE Hardware,
+	IN gctBOOL Enable
+    );
+
+/* Sets the maximum number of brushes in the cache. */
+gceSTATUS
+gcoHARDWARE_SetBrushLimit(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT MaxCount
+	);
+
+/* Return a pointer to the brush cache. */
+gceSTATUS
+gcoHARDWARE_GetBrushCache(
+	IN gcoHARDWARE Hardware,
+	IN OUT gcoBRUSH_CACHE * BrushCache
+	);
+
+/* Program the brush. */
+gceSTATUS
+gcoHARDWARE_FlushBrush(
+	IN gcoHARDWARE Hardware,
+	IN gcoBRUSH Brush
+	);
+
+/* Clear one or more rectangular areas. */
+gceSTATUS
+gcoHARDWARE_Clear2D(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 RectCount,
+	IN gcsRECT_PTR Rect,
+	IN gctUINT32 Color,
+	IN gctBOOL ColorConvert,
+	IN gctUINT8 FgRop,
+	IN gctUINT8 BgRop
+	);
+
+/* Draw one or more Bresenham lines using a brush. */
+gceSTATUS
+gcoHARDWARE_Line2D(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 LineCount,
+	IN gcsRECT_PTR Position,
+	IN gcoBRUSH Brush,
+	IN gctUINT8 FgRop,
+	IN gctUINT8 BgRop
+	);
+
+/* Draw one or more Bresenham lines using solid color(s). */
+gceSTATUS
+gcoHARDWARE_Line2DEx(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 LineCount,
+	IN gcsRECT_PTR Position,
+	IN gctUINT32 ColorCount,
+	IN gctUINT32_PTR Color32,
+	IN gctUINT8 FgRop,
+	IN gctUINT8 BgRop
+	);
+
+/* Monochrome blit. */
+gceSTATUS
+gcoHARDWARE_MonoBlit(
+	IN gcoHARDWARE Hardware,
+	IN gctPOINTER StreamBits,
+	IN gcsPOINT_PTR StreamSize,
+	IN gcsRECT_PTR StreamRect,
+	IN gceSURF_MONOPACK SrcStreamPack,
+	IN gceSURF_MONOPACK DestStreamPack,
+	IN gcsRECT_PTR DestRect,
+	IN gctUINT32 FgRop,
+	IN gctUINT32 BgRop
+	);
+
+/******************************************************************************\
+******************************** gcoBUFFER Object *******************************
+\******************************************************************************/
+
+/* Construct a new gcoBUFFER object. */
+gceSTATUS
+gcoBUFFER_Construct(
+	IN gcoHAL Hal,
+	IN gcoHARDWARE Hardware,
+	IN gctSIZE_T MaxSize,
+	OUT gcoBUFFER * Buffer
+	);
+
+/* Destroy an gcoBUFFER object. */
+gceSTATUS
+gcoBUFFER_Destroy(
+	IN gcoBUFFER Buffer
+	);
+
+/* Reserve space in a command buffer. */
+gceSTATUS
+gcoBUFFER_Reserve(
+	IN gcoBUFFER Buffer,
+	IN gctSIZE_T Bytes,
+	IN gctBOOL Aligned,
+	IN gctBOOL_PTR AddressHints,
+	OUT gctPOINTER * Memory
+	);
+
+/* Preserve space in a command buffer. */
+gceSTATUS
+gcoBUFFER_Preserve(
+	IN gcoBUFFER Buffer,
+	IN gctSIZE_T Bytes,
+	IN gctBOOL Aligned
+	);
+
+/* Write data into the command buffer. */
+gceSTATUS
+gcoBUFFER_Write(
+	IN gcoBUFFER Buffer,
+	IN gctCONST_POINTER Data,
+	IN gctSIZE_T Bytes,
+	IN gctBOOL Aligned
+	);
+
+/* Write 32-bit data into the command buffer. */
+gceSTATUS
+gcoBUFFER_Write32(
+	IN gcoBUFFER Buffer,
+	IN gctUINT32 Data,
+	IN gctBOOL Aligned
+	);
+
+/* Write 64-bit data into the command buffer. */
+gceSTATUS
+gcoBUFFER_Write64(
+	IN gcoBUFFER Buffer,
+	IN gctUINT64 Data,
+	IN gctBOOL Aligned
+	);
+
+/* Commit the command buffer. */
+gceSTATUS
+gcoBUFFER_Commit(
+	IN gcoBUFFER Buffer,
+	IN gcoCONTEXT Context,
+	IN gcoQUEUE Queue
+	);
+
+/******************************************************************************\
+******************************** gcoCMDBUF Object *******************************
+\******************************************************************************/
+
+typedef struct _gcsCOMMAND_INFO	* gcsCOMMAND_INFO_PTR;
+
+/* Construct a new gcoCMDBUF object. */
+gceSTATUS
+gcoCMDBUF_Construct(
+	IN gcoOS Os,
+	IN gcoHARDWARE Hardware,
+	IN gctSIZE_T Bytes,
+	IN gcsCOMMAND_INFO_PTR Info,
+	OUT gcoCMDBUF * Buffer
+	);
+
+/* Destroy an gcoCMDBUF object. */
+gceSTATUS
+gcoCMDBUF_Destroy(
+	IN gcoCMDBUF Buffer
+	);
+
+/******************************************************************************\
+******************************* gcoCONTEXT Object *******************************
+\******************************************************************************/
+
+gceSTATUS
+gcoCONTEXT_Construct(
+	IN gcoOS Os,
+	IN gcoHARDWARE Hardware,
+	OUT gcoCONTEXT * Context
+	);
+
+gceSTATUS
+gcoCONTEXT_Destroy(
+	IN gcoCONTEXT Context
+	);
+
+gceSTATUS
+gcoCONTEXT_Buffer(
+	IN gcoCONTEXT Context,
+	IN gctUINT32 Address,
+	IN gctSIZE_T Count,
+	IN gctUINT32_PTR Data,
+	OUT gctBOOL_PTR Hints
+	);
+
+gceSTATUS
+gcoCONTEXT_BufferX(
+	IN gcoCONTEXT Context,
+	IN gctUINT32 Address,
+	IN gctSIZE_T Count,
+	IN gctFIXED_POINT * Data
+	);
+
+gceSTATUS
+gcoCONTEXT_PreCommit(
+	IN OUT gcoCONTEXT Context
+	);
+
+gceSTATUS
+gcoCONTEXT_PostCommit(
+	IN OUT gcoCONTEXT Context
+	);
+
+#ifdef LINUX
+#define PENDING_FREED_MEMORY_SIZE_LIMIT		(4 * 1024 * 1024)
+#endif
+
+/******************************************************************************\
+********************************* gcoHAL object *********************************
+\******************************************************************************/
+
+struct _gcoHAL
+{
+	/* The object. */
+	gcsOBJECT				object;
+
+	/* Context passed in during creation. */
+	gctPOINTER				context;
+
+	/* Pointer to an gcoOS object. */
+	gcoOS					os;
+
+	/* Pointer to an gcoHARDWARE object. */
+	gcoHARDWARE				hardware;
+
+	/* Pointer to the gco2D and gco3D objects. */
+	gco2D					engine2D;
+	gcoVG					engineVG;
+	gco3D					engine3D;
+
+	/* Pointer to te gcoDUMP object. */
+	gcoDUMP					dump;
+
+#if VIVANTE_PROFILER
+    gcsPROFILER             profiler;
+#endif
+
+    /* Process handle */
+    gctHANDLE               process;
+
+    /* Pointer to version string */
+    gctCONST_STRING         version;
+
+#if MRVL_BENCH
+	/* timer object for bench mark */
+	gcoAPIBENCH	apiBench;
+#endif
+
+#if MRVL_OPTI_USE_RESERVE_MEMORY
+    gctUINT32                   reserveMemorySwitchNum;
+    gctBOOL                     bReserveMemoryPending;
+	gcoSTREAM					reserveMemory[RESERVE_MEMORY_NUM];
+	gctUINT32					reserveMemoryIndex;
+	gctSIGNAL					reserveMemorySignals[RESERVE_MEMORY_NUM];
+	gctUINT32				    reserveMemoryOffset;
+    gctUINT32                   reserveMemorySize[RESERVE_MEMORY_NUM];
+    gctUINT32                   streamAlign;
+    gctUINT32                   indexAlign;
+#endif
+};
+
+
+/******************************************************************************\
+********************************* gcoSURF object ********************************
+\******************************************************************************/
+
+typedef struct _gcsSURF_NODE
+{
+	/* Surface memory pool. */
+	gcePOOL					pool;
+
+	/* Lock count for the surface. */
+	gctINT					lockCount;
+
+	/* If not zero, the node is locked in the kernel. */
+	gctBOOL					lockedInKernel;
+
+	/* Number of planes in the surface for planar format support. */
+	gctUINT					count;
+
+	/* Node valid flag for the surface pointers. */
+	gctBOOL					valid;
+
+	/* The physical addresses of the surface. */
+	gctUINT32				physical;
+	gctUINT32				physical2;
+	gctUINT32				physical3;
+
+	/* The logical addresses of the surface. */
+	gctUINT8_PTR			logical;
+	gctUINT8_PTR			logical2;
+	gctUINT8_PTR			logical3;
+
+	/* Linear size and filler for tile status. */
+	gctSIZE_T				size;
+	gctUINT32				filler;
+	gctBOOL					firstLock;
+
+	union _gcuSURF_NODE_LIST
+	{
+		/* Allocated through HAL. */
+		struct _gcsMEM_NODE_NORMAL
+		{
+			gcuVIDMEM_NODE_PTR	node;
+#ifdef __QNXNTO__
+			gctUINT32			bytes;
+#endif
+		}
+		normal;
+
+		/* Wrapped around user-allocated surface (gcvPOOL_USER). */
+		struct _gcsMEM_NODE_WRAPPED
+		{
+			gctBOOL				logicalMapped;
+			gctPOINTER			mappingInfo;
+		}
+		wrapped;
+	}
+	u;
+}
+gcsSURF_NODE;
+
+typedef struct _gcsSURF_INFO
+{
+	/* Type usage and format of surface. */
+	gceSURF_TYPE			type;
+	gceSURF_FORMAT			format;
+
+	/* Surface size. */
+	gcsRECT					rect;
+	gctUINT					alignedWidth;
+	gctUINT					alignedHeight;
+	gctBOOL					is16Bit;
+
+	/* Rotation flag. */
+	gceSURF_ROTATION		rotation;
+	gceORIENTATION			orientation;
+
+	/* Surface stride and size. */
+	gctUINT					stride;
+	gctUINT					size;
+
+	/* YUV planar surface parameters. */
+	gctUINT					uOffset;
+	gctUINT					vOffset;
+	gctUINT					uStride;
+	gctUINT					vStride;
+
+	/* Video memory node for surface. */
+	gcsSURF_NODE			node;
+
+	/* Samples. */
+	gcsSAMPLES				samples;
+	gctBOOL					vaa;
+
+	/* Tile status. */
+	gctBOOL					tileStatusDisabled;
+	gctBOOL					superTiled;
+	gctUINT32				clearValue;
+
+	/* Hierarchical Z buffer pointer. */
+	gcsSURF_NODE			hzNode;
+}
+gcsSURF_INFO;
+
+struct _gcoSURF
+{
+	/* Object. */
+	gcsOBJECT				object;
+
+	/* Pointer to an gcoHAL object. */
+	gcoHAL					hal;
+
+	/* Surface information structure. */
+	struct _gcsSURF_INFO	info;
+
+	/* Depth of the surface in planes. */
+	gctUINT					depth;
+
+#ifndef VIVANTE_NO_3D
+	gctBOOL					resolvable;
+#endif /* VIVANTE_NO_3D */
+
+    /* Video memory node for tile status. */
+    gcsSURF_NODE			tileStatusNode;
+	gcsSURF_NODE			hzTileStatusNode;
+
+	/* Surface color type. */
+	gceSURF_COLOR_TYPE      colorType;
+
+	/* Automatic stride calculation. */
+	gctBOOL					autoStride;
+
+	/* User pointers for the surface wrapper. */
+	gctPOINTER				logical;
+	gctUINT32				physical;
+
+	/* Reference count of surface. */
+	gctINT32				referenceCount;
+};
+
+/******************************************************************************\
+******************************** gcoQUEUE Object *******************************
+\******************************************************************************/
+
+/* Construct a new gcoQUEUE object. */
+gceSTATUS
+gcoQUEUE_Construct(
+	IN gcoOS Os,
+	OUT gcoQUEUE * Queue
+	);
+
+/* Destroy a gcoQUEUE object. */
+gceSTATUS
+gcoQUEUE_Destroy(
+	IN gcoQUEUE Queue
+	);
+
+/* Append an event to a gcoQUEUE object. */
+gceSTATUS
+gcoQUEUE_AppendEvent(
+	IN gcoQUEUE Queue,
+	IN gcsHAL_INTERFACE * Interface
+	);
+
+/* Commit and event queue. */
+gceSTATUS
+gcoQUEUE_Commit(
+	IN gcoQUEUE Queue
+	);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __gc_hal_user_h_ */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/user/Queue.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/user/Queue.h
@@ -0,0 +1,19 @@
+/****************************************************************************
+*  
+*    Copyright (c) 2002 - 2008 by Vivante Corp.  All rights reserved.
+*  
+*    The material in this file is confidential and contains trade secrets
+*    of Vivante Corporation. This is proprietary information owned by
+*    Vivante Corporation. No part of this work may be disclosed, 
+*    reproduced, copied, transmitted, or used in any way for any purpose, 
+*    without the express written permission of Vivante Corporation.
+*  
+*****************************************************************************
+*  
+*  
+*****************************************************************************/
+
+
+
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/user/gc_hal_user_context.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/user/gc_hal_user_context.h
@@ -0,0 +1,165 @@
+/****************************************************************************
+*
+*    Copyright (c) 2005 - 2010 by Vivante Corp.  All rights reserved.
+*
+*    The material in this file is confidential and contains trade secrets
+*    of Vivante Corporation. This is proprietary information owned by
+*    Vivante Corporation. No part of this work may be disclosed,
+*    reproduced, copied, transmitted, or used in any way for any purpose,
+*    without the express written permission of Vivante Corporation.
+*
+*****************************************************************************
+*
+*
+*****************************************************************************/
+
+
+
+
+#ifndef __gc_hal_user_context_h_
+#define __gc_hal_user_context_h_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* gcoCONTEXT structure that hold the current context. */
+struct _gcoCONTEXT
+{
+    /* Object. */
+    gcsOBJECT                   object;
+
+    /* Pointer to gcoOS object. */
+    gcoOS                       os;
+
+    /* Pointer to gcoHARDWARE object. */
+    gcoHARDWARE                 hardware;
+
+    /* Context ID. */
+    gctUINT64                   id;
+
+    /* State mapping. */
+    gctUINT32_PTR               map;
+    gctSIZE_T                   stateCount;
+
+    /* State hinting. */
+    gctUINT8_PTR                hint;
+    gctUINT8                    hintValue;
+    gctSIZE_T                   hintCount;
+
+    /* Context buffer. */
+    gctUINT32_PTR               buffer;
+    gctUINT32                   pipe3DIndex;
+    gctUINT32                   pipe2DIndex;
+    gctUINT32                   linkIndex;
+    gctUINT32                   inUseIndex;
+    gctSIZE_T                   bufferSize;
+
+    /* Context buffer used for commitment. */
+    gctSIZE_T                   bytes;
+    gctPHYS_ADDR                physical;
+    gctPOINTER                  logical;
+
+    /* Pointer to final LINK command. */
+    gctPOINTER                  link;
+
+    /* Requested pipe select for context. */
+    gctUINT32                   initialPipe;
+    gctUINT32                   entryPipe;
+    gctUINT32                   currentPipe;
+
+    /* Flag to specify whether PostCommit needs to be called. */
+    gctBOOL                     postCommit;
+
+    /* Busy flag. */
+    volatile gctBOOL *          inUse;
+
+    /* Variables used for building state buffer. */
+    gctUINT32                   lastAddress;
+    gctSIZE_T                   lastSize;
+    gctUINT32                   lastIndex;
+    gctBOOL                     lastFixed;
+
+    /* Hint array. */
+    gctUINT32_PTR               hintArray;
+    gctUINT32_PTR               hintIndex;
+};
+
+struct _gcoCMDBUF
+{
+    /* The object. */
+    gcsOBJECT                   object;
+
+    /* Pointer to gcoOS object. */
+    gcoOS                       os;
+
+    /* Pointer to gcoHARDWARE object. */
+    gcoHARDWARE                 hardware;
+
+    /* Physical address of command buffer. */
+    gctPHYS_ADDR                physical;
+
+    /* Logical address of command buffer. */
+    gctPOINTER                  logical;
+
+    /* Number of bytes in command buffer. */
+    gctSIZE_T                   bytes;
+
+    /* Start offset into the command buffer. */
+    gctUINT32                   startOffset;
+
+    /* Current offset into the command buffer. */
+    gctUINT32                   offset;
+
+    /* Number of free bytes in command buffer. */
+    gctSIZE_T                   free;
+
+#if gcdSECURE_USER
+    /* Table of offsets that define the physical addresses to be mapped. */
+    gctUINT32_PTR               hintTable;
+
+    /* Current index into map table. */
+    gctUINT32_PTR               hintIndex;
+
+    /* Commit index for map table. */
+    gctUINT32_PTR               hintCommit;
+#endif
+};
+
+typedef struct _gcsQUEUE * gcsQUEUE_PTR;
+
+typedef struct _gcsQUEUE
+{
+    /* Pointer to next gcsQUEUE structure. */
+    gcsQUEUE_PTR                next;
+
+#ifdef __QNXNTO__
+    /* Size of this object. */
+    gctSIZE_T                   bytes;
+#endif
+
+    /* Event information. */
+    gcsHAL_INTERFACE            iface;
+}
+gcsQUEUE;
+
+/* Event queue. */
+struct _gcoQUEUE
+{
+    /* The object. */
+    gcsOBJECT                   object;
+
+    /* Pointer to gcoOS object. */
+    gcoOS                       os;
+
+    /* Pointer to current event queue. */
+    gcsQUEUE_PTR                head;
+    gcsQUEUE_PTR                tail;
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __gc_hal_user_context_h_ */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/user/gcCompilerInt.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/user/gcCompilerInt.h
@@ -0,0 +1,662 @@
+/****************************************************************************
+*  
+*    Copyright (c) 2002 - 2008 by Vivante Corp.  All rights reserved.
+*  
+*    The material in this file is confidential and contains trade secrets
+*    of Vivante Corporation. This is proprietary information owned by
+*    Vivante Corporation. No part of this work may be disclosed, 
+*    reproduced, copied, transmitted, or used in any way for any purpose, 
+*    without the express written permission of Vivante Corporation.
+*  
+*****************************************************************************
+*  
+*  
+*****************************************************************************/
+
+
+
+
+/*
+**	Include file that the defines the front- and back-end compilers, as well as
+**	the objects they use.
+*/
+
+#ifndef __gccompilerint_h_
+#define __gccompilerint_h_
+
+#include "gcCompiler.h"
+
+/******************************************************************************\
+|******************************* SHADER LANGUAGE ******************************|
+\******************************************************************************/
+
+/* Special register indices. */
+#define gcSL_POSITION			-1
+#define gcSL_POINT_SIZE			-2
+#define gcSL_COLOR				-3
+#define gcSL_FRONT_FACING		-4
+#define gcSL_POINT_COORD		-5
+#define gcSL_POSITION_W			-6
+
+/* Special code generation indices. */
+#define gcSL_CG_TEMP1			112
+#define gcSL_CG_TEMP1_X			113
+#define gcSL_CG_TEMP1_XY		114
+#define gcSL_CG_TEMP1_XYZ		115
+#define gcSL_CG_TEMP1_XYZW		116
+#define gcSL_CG_TEMP2			117
+#define gcSL_CG_TEMP2_X			118
+#define gcSL_CG_TEMP2_XY		119
+#define gcSL_CG_TEMP2_XYZ		120
+#define gcSL_CG_TEMP2_XYZW		121
+#define gcSL_CG_TEMP3			122
+#define gcSL_CG_TEMP3_X			123
+#define gcSL_CG_TEMP3_XY		124
+#define gcSL_CG_TEMP3_XYZ		125
+#define gcSL_CG_TEMP3_XYZW		126
+#define gcSL_CG_CONSTANT		127
+
+/* Structure defining a target operand. */
+typedef struct _gcSL_TARGET
+{
+	/* 4-bit enable bits. */
+	gctUINT16					enable : 4;
+
+	/* Indexed addressing mode of type gcSL_INDEXED. */
+	gctUINT16					indexed : 4;
+
+	/* 4-bit condition of type gcSL_CONDITION. */
+	gctUINT16					condition : 4;
+
+	/* Target format of type gcSL_FORMAT. */
+	gctUINT16					format : 2;
+
+	/* Flag whether source0 index has been patched. */
+	gctUINT16					source0Patched : 1;
+
+	/* Flag whether source1 index has been patched. */
+	gctUINT16					source1Patched : 1;
+}
+gcSL_TARGET;
+
+/* Structure defining a source operand. */
+typedef struct _gcSL_SOURCE
+{
+	/* Register type of type gcSL_TYPE. */
+	gctUINT16					type : 3;
+
+	/* Indexed register swizzle. */
+	gctUINT16					indexed : 3;
+
+	/* Source format of type gcSL_FORMAT. */
+	gctUINT16					format : 2;
+
+	/* Swizzle fields of type gcSL_SWIZZLE. */
+	gctUINT16					swizzleX : 2;
+	gctUINT16					swizzleY : 2;
+	gctUINT16					swizzleZ : 2;
+	gctUINT16					swizzleW : 2;
+}
+gcSL_SOURCE;
+
+/* Structure defining an index. */
+typedef struct _gcSL_INDEX
+{
+	/* Index of register. */
+	gctUINT16	index : 14;
+
+	/* Constant value. */
+	gctUINT16	constValue : 2;
+}
+gcSL_INDEX;
+
+/* Structure that defines a gcSL instruction. */
+typedef struct _gcSL_INSTRUCTION
+{
+	/* Opcode of type gcSL_OPCODE. */
+	gctUINT16					opcode;
+
+	/* Opcode condition and target write enable bits of type gcSL_TARGET. */
+	gctUINT16					temp;
+
+	/* 16-bit temporary register index. */
+	gctUINT16					tempIndex;
+
+	/* Indexed register for destination. */
+	gctUINT16					tempIndexed;
+
+	/* Type of source 0 operand of type gcSL_SOURCE. */
+	gctUINT16					source0;
+
+	/* 16-bit register index for source 0 operand of type gcSL_INDEX. */
+	gctUINT16					source0Index;
+
+	/* Indexed register for source 0 operand. */
+	gctUINT16					source0Indexed;
+
+	/* Type of source 1 operand of type gcSL_SOURCE. */
+	gctUINT16					source1;
+
+	/* 16-bit register index for source 1 operand of type gcSL_INDEX. */
+	gctUINT16					source1Index;
+
+	/* Indexed register for source 1 operand. */
+	gctUINT16					source1Indexed;
+}
+* gcSL_INSTRUCTION;
+
+/******************************************************************************\
+|*********************************** SHADERS **********************************|
+\******************************************************************************/
+
+/* Structure the defines an attribute (input) for a shader. */
+struct _gcATTRIBUTE
+{
+	/* The object. */
+	gcsOBJECT					object;
+
+	/* Index of the attribute. */
+	gctUINT16					index;
+
+	/* Type of the attribute. */
+	gcSHADER_TYPE				type;
+
+	/* Number of array elements for this attribute. */
+	gctSIZE_T					arraySize;
+
+	/* Flag to indicate this attribute is used as a texture coordinate. */
+	gctBOOL						isTexture;
+
+	/* Flag to indicate this attribute is used as a position. */
+	gctBOOL						isPosition;
+
+	/* Flag to indicate this attribute is enabeld or not. */
+	gctBOOL						enabled;
+
+	/* Assigned input register index. */
+	gctINT						inputIndex;
+
+	/* Length of the attribute name. */
+	gctSIZE_T					nameLength;
+
+	/* The attribute name. */
+	char						name[1];
+};
+
+/* Sampel structure, but inside a binary. */
+typedef struct _gcBINARY_ATTRIBUTE
+{
+	/* Type for this attribute of type gcATTRIBUTE_TYPE. */
+	gctINT8						type;
+
+	/* Flag to indicate this attribute is used as a texture coordinate. */
+	gctINT8						isTexture;
+
+	/* Number of array elements for this attribute. */
+	gctINT16					arraySize;
+
+	/* Length of the attribute name. */
+	gctINT16					nameLength;
+
+	/* The attribute name. */
+	char						name[1];
+}
+* gcBINARY_ATTRIBUTE;
+
+/* Structure that defines an uniform (constant register) for a shader. */
+struct _gcUNIFORM
+{
+	/* The object. */
+	gcsOBJECT					object;
+
+	/* Pointer to the AQHAL object. */
+	gcoHAL						hal;
+
+	/* Index of the uniform. */
+	gctUINT16					index;
+
+	/* Type of the uniform. */
+	gcSHADER_TYPE				type;
+
+	/* Number of array elements for this uniform. */
+	gctINT						arraySize;
+
+	/* Physically assigned values. */
+	gctINT						physical;
+	gctUINT8					swizzle;
+	gctUINT32					address;
+
+	/* Length of the uniform name. */
+	gctSIZE_T					nameLength;
+
+	/* The uniform name. */
+	char						name[1];
+};
+
+/* Same structure, but inside a binary. */
+typedef struct _gcBINARY_UNIFORM
+{
+	/* Uniform type of type gcUNIFORM_TYPE. */
+	gctINT16					type;
+
+	/* Number of array elements for this uniform. */
+	gctINT16					arraySize;
+
+	/* Length of the uniform name. */
+	gctINT16					nameLength;
+
+	/* The uniform name. */
+	char						name[1];
+}
+* gcBINARY_UNIFORM;
+
+/* Structure that defines an output for a shader. */
+struct _gcOUTPUT
+{
+	/* The object. */
+	gcsOBJECT					object;
+
+	/* Type for this output. */
+	gcSHADER_TYPE				type;
+
+	/* Number of array elements for this output. */
+	gctSIZE_T					arraySize;
+
+	/* Temporary register index that holds the output value. */
+	gctUINT16					tempIndex;
+
+	/* Converted to physical register. */
+	gctBOOL						physical;
+
+	/* Length of the output name. */
+	gctSIZE_T					nameLength;
+
+	/* The output name. */
+	char						name[1];
+};
+
+/* Same structure, but inside a binary. */
+typedef struct _gcBINARY_OUTPUT
+{
+	/* Type for this output. */
+	gctINT8						type;
+
+	/* Number of array elements for this output. */
+	gctINT8						arraySize;
+
+	/* Temporary register index that holds the output value. */
+	gctUINT16					tempIndex;
+
+	/* Length of the output name. */
+	gctINT16					nameLength;
+
+	/* The output name. */
+	char						name[1];
+}
+* gcBINARY_OUTPUT;
+
+/* Structure that defines a variable for a shader. */
+struct _gcVARIABLE
+{
+	/* The object. */
+	gcsOBJECT					object;
+
+	/* Type for this output. */
+	gcSHADER_TYPE				type;
+
+	/* Number of array elements for this output. */
+	gctSIZE_T					arraySize;
+
+	/* Temporary register index that holds the variable value. */
+	gctUINT16					tempIndex;
+
+	/* Length of the output name. */
+	gctSIZE_T					nameLength;
+
+	/* The output name. */
+	char						name[1];
+};
+
+typedef struct _gcsFUNCTION_ARGUMENT
+{
+	gctUINT16					index;
+	gctUINT8					enable;
+	gctUINT8					qualifier;
+}
+gcsFUNCTION_ARGUMENT,
+* gcsFUNCTION_ARGUMENT_PTR;
+
+struct _gcsFUNCTION
+{
+	gcsOBJECT					object;
+	gcoOS						os;
+
+	gctSIZE_T					argumentCount;
+	gcsFUNCTION_ARGUMENT_PTR	arguments;
+
+	gctUINT16					label;
+
+	/* Local variables. */
+	gctSIZE_T					variableCount;
+	gcVARIABLE *				variables;
+
+	gctUINT						codeStart;
+	gctUINT						codeCount;
+
+	gctSIZE_T					nameLength;
+	char						name[1];
+};
+
+/* Index into current instruction. */
+typedef enum _gcSHADER_INSTRUCTION_INDEX
+{
+	gcSHADER_OPCODE,
+	gcSHADER_SOURCE0,
+	gcSHADER_SOURCE1,
+}
+gcSHADER_INSTRUCTION_INDEX;
+
+typedef struct _gcSHADER_LINK * gcSHADER_LINK;
+
+/* Structure defining a linked references for a label. */
+struct _gcSHADER_LINK
+{
+	gcSHADER_LINK				next;
+	gctUINT						referenced;
+};
+
+typedef struct _gcSHADER_LABEL * gcSHADER_LABEL;
+
+/* Structure defining a label. */
+struct _gcSHADER_LABEL
+{
+	gcSHADER_LABEL				next;
+	gctUINT						label;
+	gctUINT						defined;
+	gcSHADER_LINK				referenced;
+};
+
+/* The structure that defines the gcSHADER object to the outside world. */
+struct _gcSHADER
+{
+	/* The base object. */
+	gcsOBJECT					object;
+
+	/* Pointer to an AQHAL object. */
+	gcoHAL						hal;
+
+	/* Type of shader. */
+	gctINT						type;
+
+	/* Attributes. */
+	gctSIZE_T					attributeCount;
+	gcATTRIBUTE *				attributes;
+
+	/* Uniforms. */
+	gctSIZE_T					uniformCount;
+	gcUNIFORM *					uniforms;
+	gctINT						samplerIndex;
+
+	/* Outputs. */
+	gctSIZE_T					outputCount;
+	gcOUTPUT *					outputs;
+
+	/* Global variables. */
+	gctSIZE_T					variableCount;
+	gcVARIABLE *				variables;
+
+	/* Functions. */
+	gctSIZE_T					functionCount;
+	gcFUNCTION *				functions;
+	gcFUNCTION					currentFunction;
+
+	/* Code. */
+	gctSIZE_T					codeCount;
+	gctUINT						lastInstruction;
+	gcSHADER_INSTRUCTION_INDEX	instrIndex;
+	gcSHADER_LABEL				labels;
+	gcSL_INSTRUCTION			code;
+
+	/* Optimization option. */
+	gctUINT						optimizationOption;
+};
+
+/******************************************************************************\
+|************************* gcSL_BRANCH_LIST structure. ************************|
+\******************************************************************************/
+
+typedef struct _gcSL_BRANCH_LIST * gcSL_BRANCH_LIST;
+
+struct _gcSL_BRANCH_LIST
+{
+	/* Pointer to next gcSL_BRANCH_LIST structure in list. */
+	gcSL_BRANCH_LIST	next;
+
+	/* Pointer to generated instruction. */
+	gctUINT				ip;
+
+	/* Target instruction for branch. */
+	gctUINT				target;
+
+	/* Flag whether this is a branch or a call. */
+	gctBOOL				call;
+};
+
+/******************************************************************************\
+|**************************** gcLINKTREE structure. ***************************|
+\******************************************************************************/
+
+typedef struct _gcsLINKTREE_LIST *	gcsLINKTREE_LIST_PTR;
+
+/* Structure that defines the linked list of dependencies. */
+typedef struct _gcsLINKTREE_LIST
+{
+	/* Pointer to next dependent register. */
+	gcsLINKTREE_LIST_PTR			next;
+
+	/* Type of dependent register. */
+	gcSL_TYPE						type;
+
+	/* Index of dependent register. */
+	gctINT							index;
+
+	/* Reference counter. */
+	gctINT							counter;
+}
+gcsLINKTREE_LIST;
+
+/* Structure that defines the dependencies for an attribute. */
+typedef struct _gcLINKTREE_ATTRIBUTE
+{
+	/* In-use flag. */
+	gctBOOL						inUse;
+
+	/* Instruction location the attribute was last used. */
+	gctINT						lastUse;
+
+	/* A linked list of all temporary registers using this attribute. */
+	gcsLINKTREE_LIST_PTR		users;
+}
+* gcLINKTREE_ATTRIBUTE;
+
+/* Structure that defines the dependencies for a temporary register. */
+typedef struct _gcLINKTREE_TEMP
+{
+	/* In-use flag. */
+	gctBOOL						inUse;
+
+	/* Usage flags for the temporary register. */
+	gctUINT8					usage;
+
+	/* True if the reghister is used as an index. */
+	gctBOOL						isIndex;
+
+	/* Instruction locations that defines the temporary register. */
+	gcsLINKTREE_LIST_PTR		defined;
+
+	/* Instruction location the temporary register was last used. */
+	gctINT						lastUse;
+
+	/* Dependencies for the temporary register. */
+	gcsLINKTREE_LIST_PTR		dependencies;
+
+	/* Whether the register holds a constant. */
+	gctINT8						constUsage[4];
+	gctFLOAT					constValue[4];
+
+	/* A linked list of all registers using this temporary register. */
+	gcsLINKTREE_LIST_PTR		users;
+
+	/* Physical register this temporary register is assigned to. */
+	gctINT						assigned;
+	gctUINT8					swizzle;
+	gctINT						shift;
+
+	/* Function arguments. */
+	gcFUNCTION					owner;
+	gceINPUT_OUTPUT				inputOrOutput;
+
+	/* Variable in shader's symbol table. */
+	gcVARIABLE					variable;
+}
+* gcLINKTREE_TEMP;
+
+/* Structure that defines the outputs. */
+typedef struct _gcLINKTREE_OUTPUT
+{
+	/* In-use flag. */
+	gctBOOL						inUse;
+
+	/* Temporary register holding the output value. */
+	gctINT						tempHolding;
+
+	/* Fragment attribute linked to this vertex output. */
+	gctINT						fragmentAttribute;
+	gctINT						fragmentIndex;
+}
+* gcLINKTREE_OUTPUT;
+
+typedef struct _gcsCODE_CALLER	*gcsCODE_CALLER_PTR;
+typedef struct _gcsCODE_CALLER
+{
+	gcsCODE_CALLER_PTR			next;
+
+	gctINT						caller;
+}
+gcsCODE_CALLER;
+
+typedef struct _gcsCODE_HINT
+{
+	/* Pointer to function to which this code belongs. */
+	gcFUNCTION					owner;
+
+	/* Callers to this instruction. */
+	gcsCODE_CALLER_PTR			callers;
+
+	/* Nesting of call. */
+	gctINT						callNest;
+}
+gcsCODE_HINT, *gcsCODE_HINT_PTR;
+
+/* Structure that defines the entire life and dependency for a shader. */
+typedef struct _gcLINKTREE
+{
+	/* Pointer to an AQOS object. */
+	gcoOS						os;
+
+	/* Pointer to the gcSHADER object. */
+	gcSHADER					shader;
+
+	/* Number of attributes. */
+	gctSIZE_T					attributeCount;
+
+	/* Attributes. */
+	gcLINKTREE_ATTRIBUTE		attributeArray;
+
+	/* Number of temporary registers. */
+	gctSIZE_T					tempCount;
+
+	/* Temporary registers. */
+	gcLINKTREE_TEMP				tempArray;
+
+	/* Number of outputs. */
+	gctSIZE_T					outputCount;
+
+	/* Outputs. */
+	gcLINKTREE_OUTPUT			outputArray;
+
+	/* Uniform usage. */
+	gctSIZE_T					uniformUsage;
+
+	/* Resource allocation passed. */
+	gctBOOL						physical;
+
+	/* Branch list. */
+	gcSL_BRANCH_LIST			branch;
+
+	/* Code hints. */
+	gcsCODE_HINT_PTR			hints;
+}
+* gcLINKTREE;
+
+/* Generate hardware states. */
+gceSTATUS
+gcLINKTREE_GenerateStates(
+	IN gcLINKTREE Tree,
+	IN gceSHADER_FLAGS Flags,
+	IN OUT gctSIZE_T * StateBufferSize,
+	IN OUT gctPOINTER * StateBuffer,
+	OUT gcsHINT_PTR * Hints
+	);
+
+typedef struct _gcsCODE_GENERATOR	gcsCODE_GENERATOR;
+typedef struct _gcsCODE_GENERATOR	* gcsCODE_GENERATOR_PTR;
+
+gctUINT
+gcsCODE_GENERATOR_GetIP(
+	gcsCODE_GENERATOR_PTR CodeGen
+	);
+
+typedef gctBOOL (*gctSL_FUNCTION_PTR)(
+	IN gcLINKTREE Tree,
+	IN gcsCODE_GENERATOR_PTR CodeGen,
+	IN gcSL_INSTRUCTION Instruction,
+	IN OUT gctUINT32 * States
+	);
+
+typedef struct _gcsSL_PATTERN		gcsSL_PATTERN;
+typedef struct _gcsSL_PATTERN		* gcsSL_PATTERN_PTR;
+struct _gcsSL_PATTERN
+{
+	/* Positive: search index, aproaching zero.
+	   Negative: code generation index aproaching zero. */
+	gctINT							count;
+
+	/* Opcode. */
+	gctUINT							opcode;
+
+	/* Destination reference number. */
+	gctINT8							dest;
+
+	/* Source 0 reference number. */
+	gctINT8							source0;
+
+	/* Source 1 reference number. */
+	gctINT8							source1;
+
+	/* Source 2 reference number. */
+	gctINT8							source2;
+
+	/* Sampler reference number. */
+	gctINT8							sampler;
+
+	/* Code generation function. */
+	gctSL_FUNCTION_PTR				function;
+};
+
+gctSIZE_T
+gcSHADER_GetHintSize(
+	void
+	);
+
+#endif /* __gccompilerint_h_ */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gcDump.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gcDump.h
@@ -0,0 +1,89 @@
+/****************************************************************************
+*  
+*    Copyright (C) 2002 - 2008 by Vivante Corp.
+*  
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public Lisence as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*  
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*  
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*  
+*****************************************************************************/
+
+
+
+
+#ifndef __gcdump_h_
+#define __gcdump_h_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**	FILE LAYOUT:
+**
+**		gcsDUMP_FILE structure
+**
+**		gcsDUMP_DATA frame
+**			gcsDUMP_DATA or gcDUMP_DATA_SIZE records rendingring the frame
+**			gctUINT8 data[length]
+*/
+
+#define gcvDUMP_FILE_SIGNATURE		gcmCC('g','c','D','B')
+
+typedef struct _gcsDUMP_FILE
+{
+	gctUINT32   		signature;	/* File signature */
+	gctSIZE_T 			length;		/* Length of file */
+	gctUINT32 			frames;		/* Number of frames in file */
+}
+gcsDUMP_FILE;
+
+typedef enum _gceDUMP_TAG
+{
+	gcvTAG_SURFACE					= gcmCC('s','u','r','f'),
+	gcvTAG_FRAME					= gcmCC('f','r','m',' '),
+	gcvTAG_COMMAND					= gcmCC('c','m','d',' '),
+	gcvTAG_INDEX					= gcmCC('i','n','d','x'),
+	gcvTAG_STREAM					= gcmCC('s','t','r','m'),
+	gcvTAG_TEXTURE					= gcmCC('t','e','x','t'),
+	gcvTAG_RENDER_TARGET			= gcmCC('r','n','d','r'),
+	gcvTAG_DEPTH					= gcmCC('z','b','u','f'),
+	gcvTAG_RESOLVE					= gcmCC('r','s','l','v'),
+	gcvTAG_DELETE					= gcmCC('d','e','l',' '),
+}
+gceDUMP_TAG;
+
+typedef struct _gcsDUMP_SURFACE
+{
+	gceDUMP_TAG			type;		/* Type of record. */
+	gctUINT32     		address;	/* Address of the surface. */
+	gctINT16      		width;		/* Width of surface. */
+	gctINT16	   		height;		/* Height of surface. */
+	gceSURF_FORMAT		format;		/* Surface pixel format. */
+	gctSIZE_T			length;		/* Number of bytes inside the surface. */
+}
+gcsDUMP_SURFACE;
+
+typedef struct _gcsDUMP_DATA
+{
+	gceDUMP_TAG		 	type;		/* Type of record. */
+	gctSIZE_T     		length;		/* Number of bytes of data. */
+	gctUINT32     		address;	/* Address for the data. */
+}
+gcsDUMP_DATA;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __gcdump_h_ */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/aqHalEnum.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/aqHalEnum.h
@@ -0,0 +1,527 @@
+/****************************************************************************
+*
+*    Copyright (C) 2002 - 2008 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public Lisence as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+
+
+#ifndef __aqhalenum_h_
+#define __aqhalenum_h_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Chip models. */
+typedef enum _gceCHIPMODEL
+{
+	gcv300  = 0x0300,
+	gcv400  = 0x0400,
+	gcv410  = 0x0410,
+	gcv450  = 0x0450,
+	gcv500  = 0x0500,
+	gcv530  = 0x0530,
+	gcv600  = 0x0600,
+	gcv700  = 0x0700,
+	gcv800  = 0x0800,
+	gcv860  = 0x0860,
+	gcv1000 = 0x1000,
+}
+gceCHIPMODEL;
+
+/* Chip features. */
+typedef enum _gceFEATURE
+{
+	gcvFEATURE_PIPE_2D,
+	gcvFEATURE_PIPE_3D,
+	gcvFEATURE_PIPE_VG,
+	gcvFEATURE_DC,
+	gcvFEATURE_HIGH_DYNAMIC_RANGE,
+	gcvFEATURE_MODULE_CG,
+	gcvFEATURE_MIN_AREA,
+	gcvFEATURE_BUFFER_INTERLEAVING,
+	gcvFEATURE_BYTE_WRITE_2D,
+	gcvFEATURE_ENDIANNESS_CONFIG,
+	gcvFEATURE_DUAL_RETURN_BUS,
+	gcvFEATURE_DEBUG_MODE,
+	gcvFEATURE_YUY2_RENDER_TARGET,
+	gcvFEATURE_FRAGMENT_PROCESSOR,
+	gcvFEATURE_2DPE20,
+	gcvFEATURE_FAST_CLEAR,
+	gcvFEATURE_YUV420_TILER,
+	gcvFEATURE_YUY2_AVERAGING,
+	gcvFEATURE_FLIP_Y,
+	gcvFEATURE_EARLY_Z,
+	gcvFEATURE_Z_COMPRESSION,
+	gcvFEATURE_MSAA,
+	gcvFEATURE_SPECIAL_ANTI_ALIASING,
+	gcvFEATURE_SPECIAL_MSAA_LOD,
+	gcvFEATURE_422_TEXTURE_COMPRESSION,
+	gcvFEATURE_DXT_TEXTURE_COMPRESSION,
+	gcvFEATURE_ETC1_TEXTURE_COMPRESSION,
+	gcvFEATURE_CORRECT_TEXTURE_CONVERTER,
+	gcvFEATURE_TEXTURE_8K,
+	gcvFEATURE_SCALER,
+	gcvFEATURE_YUV420_SCALER,
+	gcvFEATURE_SHADER_HAS_W,
+	gcvFEATURE_SHADER_HAS_SIGN,
+	gcvFEATURE_SHADER_HAS_FLOOR,
+	gcvFEATURE_SHADER_HAS_CEIL,
+	gcvFEATURE_SHADER_HAS_SQRT,
+	gcvFEATURE_SHADER_HAS_TRIG,
+	gcvFEATURE_VAA,
+	gcvFEATURE_HZ,
+	gcvFEATURE_CORRECT_STENCIL,
+	gcvFEATURE_VG20,
+	gcvFEATURE_VG_FILTER,
+	gcvFEATURE_VG21,
+	gcvFEATURE_VG_DOUBLE_BUFFER,
+	gcvFEATURE_MC20,
+}
+gceFEATURE;
+
+/* Chip Power Status. */
+typedef enum _gceCHIPPOWERSTATE
+{
+	gcvPOWER_ON,
+	gcvPOWER_OFF,
+	gcvPOWER_IDLE,
+	gcvPOWER_SUSPEND,
+}
+gceCHIPPOWERSTATE;
+
+/* Surface types. */
+typedef enum _gceSURF_TYPE
+{
+	gcvSURF_TYPE_UNKNOWN,
+	gcvSURF_INDEX,
+	gcvSURF_VERTEX,
+	gcvSURF_TEXTURE,
+	gcvSURF_RENDER_TARGET,
+	gcvSURF_DEPTH,
+	gcvSURF_BITMAP,
+	gcvSURF_TILE_STATUS,
+	gcvSURF_MASK,
+	gcvSURF_SCISSOR,
+	gcvSURF_HIERARCHICAL_DEPTH,
+	gcvSURF_NUM_TYPES, /* Make sure this is the last one! */
+
+	/* Combinations. */
+	gcvSURF_NO_TILE_STATUS = 0x100,
+	gcvSURF_RENDER_TARGET_NO_TILE_STATUS = gcvSURF_RENDER_TARGET
+										 | gcvSURF_NO_TILE_STATUS,
+	gcvSURF_DEPTH_NO_TILE_STATUS = gcvSURF_DEPTH
+								 | gcvSURF_NO_TILE_STATUS,
+}
+gceSURF_TYPE;
+
+typedef enum _gceSURF_COLOR_TYPE
+{
+	gcvSURF_COLOR_UNKNOWN,
+	gcvSURF_COLOR_LINEAR		= 0x01,
+	gcvSURF_COLOR_ALPHA_PRE		= 0x02,
+}
+gceSURF_COLOR_TYPE;
+
+/* Rotation. */
+typedef enum _gceSURF_ROTATION
+{
+	gcvSURF_0_DEGREE,
+	gcvSURF_90_DEGREE,
+	gcvSURF_180_DEGREE,
+	gcvSURF_270_DEGREE
+}
+gceSURF_ROTATION;
+
+/* Surface formats. */
+typedef enum _gceSURF_FORMAT
+{
+	/* Unknown format. */
+	gcvSURF_UNKNOWN,
+
+	/* Palettized formats. */
+	gcvSURF_INDEX1				= 100,
+	gcvSURF_INDEX4,
+	gcvSURF_INDEX8,
+
+	/* RGB formats. */
+	gcvSURF_A2R2G2B2			= 200,
+	gcvSURF_R3G3B2,
+	gcvSURF_A8R3G3B2,
+	gcvSURF_X4R4G4B4,
+	gcvSURF_A4R4G4B4,
+	gcvSURF_R4G4B4A4,
+	gcvSURF_X1R5G5B5,
+	gcvSURF_A1R5G5B5,
+	gcvSURF_R5G5B5A1,
+	gcvSURF_R5G6B5,
+	gcvSURF_R8G8B8,
+	gcvSURF_X8R8G8B8,
+	gcvSURF_A8R8G8B8,
+	gcvSURF_R8G8B8A8,
+	gcvSURF_G8R8G8B8,
+	gcvSURF_R8G8B8G8,
+	gcvSURF_X2R10G10B10,
+	gcvSURF_A2R10G10B10,
+	gcvSURF_X12R12G12B12,
+	gcvSURF_A12R12G12B12,
+	gcvSURF_X16R16G16B16,
+	gcvSURF_A16R16G16B16,
+	gcvSURF_R8G8B8X8,
+	gcvSURF_R5G5B5X1,
+	gcvSURF_R4G4B4X4,
+
+	/* BGR formats. */
+	gcvSURF_A4B4G4R4			= 300,
+	gcvSURF_A1B5G5R5,
+	gcvSURF_B5G6R5,
+	gcvSURF_B8G8R8,
+	gcvSURF_X8B8G8R8,
+	gcvSURF_A8B8G8R8,
+	gcvSURF_A2B10G10R10,
+	gcvSURF_A16B16G16R16,
+	gcvSURF_G16R16,
+	gcvSURF_B4G4R4A4,
+	gcvSURF_B5G5R5A1,
+	gcvSURF_B8G8R8X8,
+	gcvSURF_B8G8R8A8,
+	gcvSURF_X4B4G4R4,
+	gcvSURF_X1B5G5R5,
+	gcvSURF_B4G4R4X4,
+	gcvSURF_B5G5R5X1,
+
+	/* Compressed formats. */
+	gcvSURF_DXT1				= 400,
+	gcvSURF_DXT2,
+	gcvSURF_DXT3,
+	gcvSURF_DXT4,
+	gcvSURF_DXT5,
+	gcvSURF_CXV8U8,
+	gcvSURF_ETC1,
+
+	/* YUV formats. */
+	gcvSURF_YUY2				= 500,
+	gcvSURF_UYVY,
+	gcvSURF_YV12,
+	gcvSURF_I420,
+	gcvSURF_NV12,
+	gcvSURF_NV21,
+	gcvSURF_NV16,
+	gcvSURF_NV61,
+	gcvSURF_YVYU,
+	gcvSURF_VYUY,
+
+	/* Depth formats. */
+	gcvSURF_D16					= 600,
+	gcvSURF_D24S8,
+	gcvSURF_D32,
+	gcvSURF_D24X8,
+
+	/* Alpha formats. */
+	gcvSURF_A4					= 700,
+	gcvSURF_A8,
+	gcvSURF_A12,
+	gcvSURF_A16,
+	gcvSURF_A32,
+	gcvSURF_A1,
+
+	/* Luminance formats. */
+	gcvSURF_L4					= 800,
+	gcvSURF_L8,
+	gcvSURF_L12,
+	gcvSURF_L16,
+	gcvSURF_L32,
+	gcvSURF_L1,
+
+	/* Alpha/Luminance formats. */
+	gcvSURF_A4L4				= 900,
+	gcvSURF_A2L6,
+	gcvSURF_A8L8,
+	gcvSURF_A4L12,
+	gcvSURF_A12L12,
+	gcvSURF_A16L16,
+
+	/* Bump formats. */
+	gcvSURF_L6V5U5				= 1000,
+	gcvSURF_V8U8,
+	gcvSURF_X8L8V8U8,
+	gcvSURF_Q8W8V8U8,
+	gcvSURF_A2W10V10U10,
+	gcvSURF_V16U16,
+	gcvSURF_Q16W16V16U16,
+
+	/* Floating point formats. */
+	gcvSURF_R16F				= 1100,
+	gcvSURF_G16R16F,
+	gcvSURF_A16B16G16R16F,
+	gcvSURF_R32F,
+	gcvSURF_G32R32F,
+	gcvSURF_A32B32G32R32F,
+
+#if 0
+	/* FIXME: remove HDR support for now. */
+	/* HDR formats. */
+	gcvSURF_HDR7E3				= 1200,
+	gcvSURF_HDR6E4,
+	gcvSURF_HDR5E5,
+	gcvSURF_HDR6E5,
+#endif
+}
+gceSURF_FORMAT;
+
+/* Pixel swizzle modes. */
+typedef enum _gceSURF_SWIZZLE
+{
+	gcvSURF_NOSWIZZLE,
+	gcvSURF_ARGB,
+	gcvSURF_ABGR,
+	gcvSURF_RGBA,
+	gcvSURF_BGRA
+}
+gceSURF_SWIZZLE;
+
+/* Transparency modes. */
+typedef enum _gceSURF_TRANSPARENCY
+{
+	/* Valid only for PE 1.0 */
+	gcvSURF_OPAQUE,
+	gcvSURF_SOURCE_MATCH,
+	gcvSURF_SOURCE_MASK,
+	gcvSURF_PATTERN_MASK,
+}
+gceSURF_TRANSPARENCY;
+
+/* Transparency modes. */
+typedef enum _gce2D_TRANSPARENCY
+{
+	/* Valid only for PE 2.0 */
+	gcv2D_OPAQUE,
+	gcv2D_KEYED,
+	gcv2D_MASKED
+}
+gce2D_TRANSPARENCY;
+
+/* Mono packing modes. */
+typedef enum _gceSURF_MONOPACK
+{
+	gcvSURF_PACKED8,
+	gcvSURF_PACKED16,
+	gcvSURF_PACKED32,
+	gcvSURF_UNPACKED,
+}
+gceSURF_MONOPACK;
+
+/* Blending modes. */
+typedef enum _gceSURF_BLEND_MODE
+{
+	/* Porter-Duff blending modes.                   */
+	/*                         Fsrc      Fdst        */
+	gcvBLEND_CLEAR,         /* 0         0           */
+	gcvBLEND_SRC,           /* 1         0           */
+	gcvBLEND_DST,           /* 0         1           */
+	gcvBLEND_SRC_OVER_DST,  /* 1         1 - Asrc    */
+	gcvBLEND_DST_OVER_SRC,  /* 1 - Adst  1           */
+	gcvBLEND_SRC_IN_DST,    /* Adst      0           */
+	gcvBLEND_DST_IN_SRC,    /* 0         Asrc        */
+	gcvBLEND_SRC_OUT_DST,   /* 1 - Adst  0           */
+	gcvBLEND_DST_OUT_SRC,   /* 0         1 - Asrc    */
+	gcvBLEND_SRC_ATOP_DST,  /* Adst      1 - Asrc    */
+	gcvBLEND_DST_ATOP_SRC,  /* 1 - Adst  Asrc        */
+	gcvBLEND_SRC_XOR_DST,   /* 1 - Adst  1 - Asrc    */
+
+	/* Special blending modes.                       */
+	gcvBLEND_SET,           /* DST = 1               */
+	gcvBLEND_SUB            /* DST = DST * (1 - SRC) */
+}
+gceSURF_BLEND_MODE;
+
+/* Per-pixel alpha modes. */
+typedef enum _gceSURF_PIXEL_ALPHA_MODE
+{
+	gcvSURF_PIXEL_ALPHA_STRAIGHT,
+	gcvSURF_PIXEL_ALPHA_INVERSED
+}
+gceSURF_PIXEL_ALPHA_MODE;
+
+/* Global alpha modes. */
+typedef enum _gceSURF_GLOBAL_ALPHA_MODE
+{
+	gcvSURF_GLOBAL_ALPHA_OFF,
+	gcvSURF_GLOBAL_ALPHA_ON,
+	gcvSURF_GLOBAL_ALPHA_SCALE
+}
+gceSURF_GLOBAL_ALPHA_MODE;
+
+/* Color component modes for alpha blending. */
+typedef enum _gceSURF_PIXEL_COLOR_MODE
+{
+	gcvSURF_COLOR_STRAIGHT,
+	gcvSURF_COLOR_MULTIPLY
+}
+gceSURF_PIXEL_COLOR_MODE;
+
+/* Color component modes for alpha blending. */
+typedef enum _gce2D_PIXEL_COLOR_MULTIPLY_MODE
+{
+	gcv2D_COLOR_MULTIPLY_DISABLE,
+	gcv2D_COLOR_MULTIPLY_ENABLE
+}
+gce2D_PIXEL_COLOR_MULTIPLY_MODE;
+
+/* Color component modes for alpha blending. */
+typedef enum _gce2D_GLOBAL_COLOR_MULTIPLY_MODE
+{
+	gcv2D_GLOBAL_COLOR_MULTIPLY_DISABLE,
+	gcv2D_GLOBAL_COLOR_MULTIPLY_ALPHA,
+	gcv2D_GLOBAL_COLOR_MULTIPLY_COLOR
+}
+gce2D_GLOBAL_COLOR_MULTIPLY_MODE;
+
+/* Alpha blending factor modes. */
+typedef enum _gceSURF_BLEND_FACTOR_MODE
+{
+	gcvSURF_BLEND_ZERO,
+	gcvSURF_BLEND_ONE,
+	gcvSURF_BLEND_STRAIGHT,
+	gcvSURF_BLEND_INVERSED,
+	gcvSURF_BLEND_COLOR,
+	gcvSURF_BLEND_COLOR_INVERSED,
+	gcvSURF_BLEND_SRC_ALPHA_SATURATED
+}
+gceSURF_BLEND_FACTOR_MODE;
+
+/* Alpha blending porter duff rules. */
+typedef enum _gce2D_PORTER_DUFF_RULE
+{
+	gcvPD_CLEAR,
+	gcvPD_SRC,
+	gcvPD_SRC_OVER,
+	gcvPD_DST_OVER,
+	gcvPD_SRC_IN,
+	gcvPD_DST_IN,
+	gcvPD_SRC_OUT,
+	gcvPD_DST_OUT,
+	gcvPD_SRC_ATOP,
+	gcvPD_DST_ATOP,
+	gcvPD_ADD,
+	gcvPD_XOR,
+	gcvPD_DST
+}
+gce2D_PORTER_DUFF_RULE;
+
+/* Alpha blending factor modes. */
+typedef enum _gce2D_YUV_COLOR_MODE
+{
+	gcv2D_YUV_601,
+	gcv2D_YUV_709
+}
+gce2D_YUV_COLOR_MODE;
+
+/* 2D Rotation and flipping. */
+typedef enum _gce2D_ORIENTATION
+{
+	gcv2D_0_DEGREE,
+	gcv2D_90_DEGREE,
+	gcv2D_180_DEGREE,
+	gcv2D_270_DEGREE,
+	gcv2D_X_FLIP,
+	gcv2D_Y_FLIP
+}
+gce2D_ORIENTATION;
+
+typedef enum _gce2D_COMMAND
+{
+	gcv2D_CLEAR,
+	gcv2D_LINE,
+	gcv2D_BLT,
+	gcv2D_STRETCH,
+	gcv2D_HOR_FILTER,
+	gcv2D_VER_FILTER,
+}
+gce2D_COMMAND;
+
+/* Texture functions. */
+typedef enum _gceTEXTURE_FUNCTION
+{
+	gcvTEXTURE_DUMMY = 0,
+	gcvTEXTURE_REPLACE = 0,
+	gcvTEXTURE_MODULATE,
+	gcvTEXTURE_ADD,
+	gcvTEXTURE_ADD_SIGNED,
+	gcvTEXTURE_INTERPOLATE,
+	gcvTEXTURE_SUBTRACT,
+	gcvTEXTURE_DOT3
+}
+gceTEXTURE_FUNCTION;
+
+/* Texture sources. */
+typedef enum _gceTEXTURE_SOURCE
+{
+	gcvCOLOR_FROM_TEXTURE,
+	gcvCOLOR_FROM_CONSTANT_COLOR,
+	gcvCOLOR_FROM_PRIMARY_COLOR,
+	gcvCOLOR_FROM_PREVIOUS_COLOR
+}
+gceTEXTURE_SOURCE;
+
+/* Texture source channels. */
+typedef enum _gceTEXTURE_CHANNEL
+{
+	gcvFROM_COLOR,
+	gcvFROM_ONE_MINUS_COLOR,
+	gcvFROM_ALPHA,
+	gcvFROM_ONE_MINUS_ALPHA
+}
+gceTEXTURE_CHANNEL;
+
+/* Filter types. */
+typedef enum _gceFILTER_TYPE
+{
+	gcvFILTER_SYNC,
+	gcvFILTER_BLUR,
+	gcvFILTER_USER
+}
+gceFILTER_TYPE;
+
+/* Filter pass types. */
+typedef enum _gceFILTER_PASS_TYPE
+{
+	gcvFILTER_HOR_PASS,
+	gcvFILTER_VER_PASS
+}
+gceFILTER_PASS_TYPE;
+
+
+/******************************************************************************\
+****************************** Object Declarations *****************************
+\******************************************************************************/
+
+typedef struct _gcoCONTEXT *		gcoCONTEXT;
+typedef struct _gcoCMDBUF *			gcoCMDBUF;
+typedef struct _gcoQUEUE *			gcoQUEUE;
+typedef struct _gcsHAL_INTERFACE *	gcsHAL_INTERFACE_PTR;
+typedef struct gco2D_PROFILE *  		gco2D_PROFILE_PTR;
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif
+
+#endif /* __aqhalenum_h_ */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gc_hal_options.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gc_hal_options.h
@@ -0,0 +1,326 @@
+/****************************************************************************
+*
+*    Copyright (C) 2005 - 2010 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public License as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+#ifndef __gc_hal_options_h_
+#define __gc_hal_options_h_
+
+/*
+	USE_NEW_LINUX_SIGNAL
+
+	This define enables the Linux kernel signaling between kernel and user.
+*/
+#ifndef USE_NEW_LINUX_SIGNAL
+#	define USE_NEW_LINUX_SIGNAL		0
+#endif
+
+/*
+	NO_USER_DIRECT_ACCESS_FROM_KERNEL
+
+	This define enables the Linux kernel behavior accessing user memory.
+*/
+#ifndef NO_USER_DIRECT_ACCESS_FROM_KERNEL
+#	define NO_USER_DIRECT_ACCESS_FROM_KERNEL		0
+#endif
+
+/*
+	VIVANTE_PROFILER
+
+	This define enables the profiler.
+*/
+#ifndef VIVANTE_PROFILER
+#	define VIVANTE_PROFILER			0
+#endif
+
+/*
+	gcdUSE_VG
+
+	Enable VG HAL layer (only for GC350).
+*/
+#ifndef gcdUSE_VG
+#	define gcdUSE_VG				0
+#endif
+
+/*
+	USE_SW_FB
+
+	Set to 1 if the frame buffer memory cannot be accessed by the GPU.
+*/
+#ifndef USE_SW_FB
+#define USE_SW_FB					0
+#endif
+
+/*
+    USE_SHADER_SYMBOL_TABLE
+
+    This define enables the symbol table in shader object.
+*/
+#define USE_SHADER_SYMBOL_TABLE		1
+
+/*
+    USE_SUPER_SAMPLING
+
+    This define enables super-sampling support.
+*/
+#define USE_SUPER_SAMPLING			0
+
+/*
+    PROFILE_HAL_COUNTERS
+
+    This define enables HAL counter profiling support.
+    HW and SHADER Counter profiling depends on this.
+*/
+#define PROFILE_HAL_COUNTERS		1
+
+/*
+    PROFILE_HW_COUNTERS
+
+    This define enables HW counter profiling support.
+*/
+#define PROFILE_HW_COUNTERS			1
+
+/*
+    PROFILE_SHADER_COUNTERS
+
+    This define enables SHADER counter profiling support.
+*/
+#define PROFILE_SHADER_COUNTERS		1
+
+/*
+    COMMAND_PROCESSOR_VERSION
+
+    The version of the command buffer and task manager.
+*/
+#define COMMAND_PROCESSOR_VERSION	1
+
+/*
+	gcdDUMP
+
+		When set to 1, a dump of all states and memory uploads, as well as other
+		hardware related execution will be printed to the debug console.  This
+		data can be used for playing back applications.
+*/
+#define gcdDUMP						0
+
+/*
+	gcdDUMP_IN_KERNEL
+
+		When set to 1, all dumps will happen in the kernel.  This is handy if
+		you want the kernel to dump its command buffers as well and the data
+		needs to be in sync.
+*/
+#define gcdDUMP_IN_KERNEL			0
+
+/*
+	gcdDUMP_COMMAND
+
+		When set to non-zero, the command queue will dump all incoming command
+		and context buffers as well as all other modifications to the command
+		queue.
+*/
+#define gcdDUMP_COMMAND				0
+
+/*
+	gcdNULL_DRIVER
+*/
+#define gcdNULL_DRIVER				0
+
+/*
+	gcdENABLE_TIMEOUT_DETECTION
+
+	Enable timeout detection.
+*/
+#define gcdENABLE_TIMEOUT_DETECTION	0
+
+/*
+	gcdCMD_BUFFERS
+
+	Number of command buffers to use per client.  Each command buffer is 32kB in
+	size.
+*/
+#define gcdCMD_BUFFERS				2
+
+/*
+	gcdPOWER_CONTROL_DELAY
+
+	The delay in milliseconds required to wait until the GPU has woke up from a
+	suspend or power-down state.  This is system dependent because the bus clock
+	also needs to be stabalize.
+*/
+#define gcdPOWER_CONTROL_DELAY		1
+
+/*
+	gcdMMU_SIZE
+
+	Size of the MMU page table in bytes.  Each 4 bytes can hold 4kB worth of
+	virtual data.
+*/
+#define gcdMMU_SIZE					(128 << 10)
+
+/*
+	gcdSECURE_USER
+
+	Use logical addresses instead of physical addresses in user land.  In this
+    case a hint table is created for both command buffers and context buffers,
+    and that hint table will be used to patch up those buffers in the kernel
+    when they are ready to submit.
+*/
+#define gcdSECURE_USER      		        0
+
+/*
+    gcdSECURE_CACHE_SLOTS
+
+    Number of slots in the logical to DMA address cache table.  Each time a
+    logical address needs to be translated into a DMA address for the GPU, this
+    cache will be walked.  The replacement scheme is LRU.
+*/
+#define gcdSECURE_CACHE_SLOTS               64
+
+/*
+	gcdREGISTER_ACCESS_FROM_USER
+
+	Set to 1 to allow IOCTL calls to get through from user land.  This should
+	only be in debug or development drops.
+*/
+#ifndef gcdREGISTER_ACCESS_FROM_USER
+#	define gcdREGISTER_ACCESS_FROM_USER		1
+#endif
+
+/*
+	gcdHEAP_SIZE
+
+	Set the allocation size for the internal heaps.  Each time a heap is full,
+	a new heap will be allocated with this minmimum amount of bytes.  The bigger
+	this size, the fewer heaps there are to allocate, the better the
+	performance.  However, heaps won't be freed until they are completely free,
+	so there might be some more memory waste if the size is too big.
+*/
+#define gcdHEAP_SIZE				(64 << 10)
+/*
+    MRVL_TAVOR_PV2_DISABLE_YFLIP
+*/
+#define MRVL_TAVOR_PV2_DISABLE_YFLIP        0
+
+
+/*
+    MRVL_LOW_POWER_MODE_DEBUG
+*/
+#define MRVL_LOW_POWER_MODE_DEBUG           0
+
+/*
+    MRVL Utility Options
+*/
+#define MRVL_FORCE_MSAA_ON                  0
+
+/*
+    MRVL_SWAP_BUFFER_IN_EVERY_DRAW
+
+    This define force swapbuffer after every drawElement/drawArray.
+*/
+#define MRVL_SWAP_BUFFER_IN_EVERY_DRAW      0
+
+#define MRVL_BENCH							0
+
+
+#define MRVL_EANBLE_COMPRESSION_DXT         0
+
+/* Texture coordinate generation */
+#define MRVL_TEXGEN							1
+
+/* Tex gen code from Vivante */
+#define VIVANTE_TEXGEN                      0
+
+/* Swap buffer optimization */
+#define MRVL_OPTI_SWAP_BUFFER               1
+
+/* Disable swap worker thread */
+#define MRVL_DISABLE_SWAP_THREAD			0
+
+/* API log enable */
+#define MRVL_ENABLE_API_LOG				    0
+#define MRVL_ENABLE_EGL_API_LOG			    0
+#define MRVL_ENABLE_OES1_API_LOG			0
+#define MRVL_ENABLE_OES2_API_LOG			0
+#define MRVL_ENABLE_OVG_API_LOG			    0
+
+/* Optimization for Eclair UI */
+#define MRVL_OPTI_ANDROID_IMAGE             1
+
+/* if pmem is enabled and cacheable, enable it */
+#define MRVL_CACHEABLE_PMEM                 1
+
+#define MRVL_DISABLE_FASTCLEAR              0
+
+#define MRVL_OPTI_COMPOSITOR                1
+#define MRVL_OPTI_COMPOSITOR_DEBUG          0
+
+#define MRVL_OPTI_STREAM_FAST_PATH          1
+#define MRVL_OPTI_USE_RESERVE_MEMORY        1
+
+/* Enable a timer thread to check the status of GC periodically */
+#define MRVL_TIMER                          0
+
+/* Enable silent reset */
+#define MRVL_SILENT_RESET                   0
+
+/* Force surface format RGBA8888*/
+#define MRVL_FORCE_8888                     0
+
+
+/* Preserve cmd buffer space to avoid unneeded split(then context switch */
+#define MRVL_PRESERVE_CMD_BUFFER            1
+
+/*
+    MRVL_PRINT_CMD_BUFFER
+
+    This define enable print cmd buffer and link chain code
+*/
+#define MRVL_PRINT_CMD_BUFFER               0
+
+/*
+    POWER_OFF_GC_WHEN_IDLE
+    This enable idle-power-off strategy on TD
+*/
+#define POWER_OFF_GC_WHEN_IDLE  1
+
+/*
+    Definitions for vendor, renderer and version strings
+*/
+#define _VENDOR_STRING_             "Marvell Technology Group Ltd"
+
+#define _EGL_VERSION_STRING_        "EGL 1.3 Ver0.8.0.1998";
+
+#if defined(COMMON_LITE)
+#define _OES11_VERSION_STRING_      "OpenGL ES-CL 1.1 Ver0.8.0.1998";
+#else
+#define _OES11_VERSION_STRING_      "OpenGL ES-CM 1.1 Ver0.8.0.1998";
+#endif
+
+#define _OES20_VERSION_STRING_      "OpenGL ES 2.0 Ver0.8.0.1998";
+#define _GLSL_ES_VERSION_STRING_    "OpenGL ES GLSL ES 1.00 Ver0.8.0.1998"
+
+#define _OPENVG_VERSION_STRING_     "OpenVG 1.1 Ver0.8.0.1998"
+
+#define _GAL_VERSION_STRING_        "GAL Ver0.8.0.1998"
+
+#endif /* __gc_hal_options_h_ */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gc_hal_base.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gc_hal_base.h
@@ -0,0 +1,2630 @@
+/****************************************************************************
+*
+*    Copyright (C) 2005 - 2010 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public License as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+#ifndef __gc_hal_base_h_
+#define __gc_hal_base_h_
+
+#include "gc_hal_enum.h"
+#include "gc_hal_types.h"
+#include "gc_hal_dump.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/******************************************************************************\
+****************************** Object Declarations *****************************
+\******************************************************************************/
+
+typedef struct _gcoHAL *                gcoHAL;
+typedef struct _gcoOS *                 gcoOS;
+typedef struct _gco2D *                 gco2D;
+typedef struct _gcoVG *                 gcoVG;
+typedef struct _gco3D *                 gco3D;
+typedef struct _gcoSURF *               gcoSURF;
+typedef struct _gcsSURF_INFO *          gcsSURF_INFO_PTR;
+typedef struct _gcsSURF_NODE *          gcsSURF_NODE_PTR;
+typedef struct _gcsSURF_FORMAT_INFO *   gcsSURF_FORMAT_INFO_PTR;
+typedef struct _gcsPOINT *              gcsPOINT_PTR;
+typedef struct _gcsSIZE *               gcsSIZE_PTR;
+typedef struct _gcsRECT *               gcsRECT_PTR;
+typedef struct _gcsBOUNDARY *           gcsBOUNDARY_PTR;
+typedef struct _gcoDUMP *               gcoDUMP;
+typedef struct _gcoHARDWARE *           gcoHARDWARE;
+
+/******************************************************************************\
+********************************* Enumerations *********************************
+\******************************************************************************/
+
+/* Video memory pool type. */
+typedef enum _gcePOOL
+{
+    gcvPOOL_UNKNOWN,
+    gcvPOOL_DEFAULT,
+    gcvPOOL_LOCAL,
+    gcvPOOL_LOCAL_INTERNAL,
+    gcvPOOL_LOCAL_EXTERNAL,
+    gcvPOOL_UNIFIED,
+    gcvPOOL_SYSTEM,
+    gcvPOOL_VIRTUAL,
+    gcvPOOL_USER,
+    gcvPOOL_CONTIGUOUS
+}
+gcePOOL;
+
+/* Blending functions. */
+typedef enum _gceBLEND_FUNCTION
+{
+    gcvBLEND_ZERO,
+    gcvBLEND_ONE,
+    gcvBLEND_SOURCE_COLOR,
+    gcvBLEND_INV_SOURCE_COLOR,
+    gcvBLEND_SOURCE_ALPHA,
+    gcvBLEND_INV_SOURCE_ALPHA,
+    gcvBLEND_TARGET_COLOR,
+    gcvBLEND_INV_TARGET_COLOR,
+    gcvBLEND_TARGET_ALPHA,
+    gcvBLEND_INV_TARGET_ALPHA,
+    gcvBLEND_SOURCE_ALPHA_SATURATE,
+    gcvBLEND_CONST_COLOR,
+    gcvBLEND_INV_CONST_COLOR,
+    gcvBLEND_CONST_ALPHA,
+    gcvBLEND_INV_CONST_ALPHA,
+}
+gceBLEND_FUNCTION;
+
+/* Blending modes. */
+typedef enum _gceBLEND_MODE
+{
+    gcvBLEND_ADD,
+    gcvBLEND_SUBTRACT,
+    gcvBLEND_REVERSE_SUBTRACT,
+    gcvBLEND_MIN,
+    gcvBLEND_MAX,
+}
+gceBLEND_MODE;
+
+/* API flags. */
+typedef enum _gceAPI
+{
+    gcvAPI_D3D                  = 0x1,
+    gcvAPI_OPENGL               = 0x2,
+}
+gceAPI;
+
+/* Depth modes. */
+typedef enum _gceDEPTH_MODE
+{
+    gcvDEPTH_NONE,
+    gcvDEPTH_Z,
+    gcvDEPTH_W,
+}
+gceDEPTH_MODE;
+
+typedef enum _gceWHERE
+{
+    gcvWHERE_COMMAND,
+    gcvWHERE_RASTER,
+    gcvWHERE_PIXEL,
+}
+gceWHERE;
+
+typedef enum _gceHOW
+{
+    gcvHOW_SEMAPHORE            = 0x1,
+    gcvHOW_STALL                = 0x2,
+    gcvHOW_SEMAPHORE_STALL      = 0x3,
+}
+gceHOW;
+
+/******************************************************************************\
+********************************* gcoHAL Object *********************************
+\******************************************************************************/
+
+/* Construct a new gcoHAL object. */
+gceSTATUS
+gcoHAL_Construct(
+    IN gctPOINTER Context,
+    IN gcoOS Os,
+    OUT gcoHAL * Hal
+    );
+
+/* Destroy an gcoHAL object. */
+gceSTATUS
+gcoHAL_Destroy(
+    IN gcoHAL Hal
+    );
+
+/* Get pointer to gco2D object. */
+gceSTATUS
+gcoHAL_Get2DEngine(
+    IN gcoHAL Hal,
+    OUT gco2D * Engine
+    );
+
+/* Get pointer to gcoVG object. */
+gceSTATUS
+gcoHAL_GetVGEngine(
+    IN gcoHAL Hal,
+    OUT gcoVG * Engine
+    );
+
+/* Get pointer to gco3D object. */
+gceSTATUS
+gcoHAL_Get3DEngine(
+    IN gcoHAL Hal,
+    OUT gco3D * Engine
+    );
+
+/* Verify whether the specified feature is available in hardware. */
+gceSTATUS
+gcoHAL_IsFeatureAvailable(
+    IN gcoHAL Hal,
+    IN gceFEATURE Feature
+    );
+
+/* Query the identity of the hardware. */
+gceSTATUS
+gcoHAL_QueryChipIdentity(
+    IN gcoHAL Hal,
+    OUT gceCHIPMODEL* ChipModel,
+    OUT gctUINT32* ChipRevision,
+    OUT gctUINT32* ChipFeatures,
+    OUT gctUINT32* ChipMinorFeatures
+    );
+
+/* Query the amount of video memory. */
+gceSTATUS
+gcoHAL_QueryVideoMemory(
+    IN gcoHAL Hal,
+    OUT gctPHYS_ADDR * InternalAddress,
+    OUT gctSIZE_T * InternalSize,
+    OUT gctPHYS_ADDR * ExternalAddress,
+    OUT gctSIZE_T * ExternalSize,
+    OUT gctPHYS_ADDR * ContiguousAddress,
+    OUT gctSIZE_T * ContiguousSize
+    );
+
+/* Map video memory. */
+gceSTATUS
+gcoHAL_MapMemory(
+    IN gcoHAL Hal,
+    IN gctPHYS_ADDR Physical,
+    IN gctSIZE_T NumberOfBytes,
+    OUT gctPOINTER * Logical
+    );
+
+/* Unmap video memory. */
+gceSTATUS
+gcoHAL_UnmapMemory(
+    IN gcoHAL Hal,
+    IN gctPHYS_ADDR Physical,
+    IN gctSIZE_T NumberOfBytes,
+    IN gctPOINTER Logical
+    );
+
+/* Schedule an unmap of a buffer mapped through its physical address. */
+gceSTATUS
+gcoHAL_ScheduleUnmapMemory(
+    IN gcoHAL Hal,
+    IN gctPHYS_ADDR Physical,
+    IN gctSIZE_T NumberOfBytes,
+    IN gctPOINTER Logical
+    );
+
+/* Schedule an unmap of a user buffer using event mechanism. */
+gceSTATUS
+gcoHAL_ScheduleUnmapUserMemory(
+    IN gcoHAL Hal,
+    IN gctPOINTER Info,
+    IN gctSIZE_T Size,
+    IN gctUINT32 Address,
+    IN gctPOINTER Memory
+    );
+
+/* Commit the current command buffer. */
+gceSTATUS
+gcoHAL_Commit(
+    IN gcoHAL Hal,
+    IN gctBOOL Stall
+    );
+
+gceSTATUS
+gcoHAL_Commit2(
+    IN gcoHAL Hal,
+    IN gctBOOL Stall,
+    IN gctPOINTER Buffer,
+    IN gctUINT32 Size
+    );
+
+/* Query the tile capabilities. */
+gceSTATUS
+gcoHAL_QueryTiled(
+    IN gcoHAL Hal,
+    OUT gctINT32 * TileWidth2D,
+    OUT gctINT32 * TileHeight2D,
+    OUT gctINT32 * TileWidth3D,
+    OUT gctINT32 * TileHeight3D
+    );
+
+gceSTATUS
+gcoHAL_Compact(
+    IN gcoHAL Hal
+    );
+
+gceSTATUS
+gcoHAL_ProfileStart(
+    IN gcoHAL Hal
+    );
+
+gceSTATUS
+gcoHAL_ProfileEnd(
+    IN gcoHAL Hal,
+    IN gctCONST_STRING Title
+    );
+
+/* Power Management */
+gceSTATUS
+gcoHAL_SetPowerManagementState(
+    IN gcoHAL Hal,
+    IN gceCHIPPOWERSTATE State
+    );
+
+gceSTATUS
+gcoHAL_QueryPowerManagementState(
+    IN gcoHAL Hal,
+    OUT gceCHIPPOWERSTATE *State
+    );
+
+/* Set the filter type for filter blit. */
+gceSTATUS
+gcoHAL_SetFilterType(
+    IN gcoHAL Hal,
+    IN gceFILTER_TYPE FilterType
+    );
+
+gceSTATUS
+gcoHAL_GetDump(
+    IN gcoHAL Hal,
+    OUT gcoDUMP * Dump
+    );
+
+/* Call the kernel HAL layer. */
+gceSTATUS
+gcoHAL_Call(
+    IN gcoHAL Hal,
+    IN OUT gcsHAL_INTERFACE_PTR Interface
+    );
+
+/* Schedule an event. */
+gceSTATUS
+gcoHAL_ScheduleEvent(
+    IN gcoHAL Hal,
+    IN OUT gcsHAL_INTERFACE_PTR Interface
+    );
+
+/* Destroy a surface. */
+gceSTATUS
+gcoHAL_DestroySurface(
+	IN gcoHAL Hal,
+	IN gcoSURF Surface
+	);
+
+/******************************************************************************\
+********************************** gcoOS Object *********************************
+\******************************************************************************/
+
+/* Construct a new gcoOS object. */
+gceSTATUS
+gcoOS_Construct(
+    IN gctPOINTER Context,
+    OUT gcoOS * Os
+    );
+
+/* Destroy an gcoOS object. */
+gceSTATUS
+gcoOS_Destroy(
+    IN gcoOS Os
+    );
+
+/* Get the base address for the physical memory. */
+gceSTATUS
+gcoOS_GetBaseAddress(
+    IN gcoOS Os,
+    OUT gctUINT32_PTR BaseAddress
+    );
+
+/* Allocate memory from the heap. */
+gceSTATUS
+gcoOS_Allocate(
+    IN gcoOS Os,
+    IN gctSIZE_T Bytes,
+    OUT gctPOINTER * Memory
+    );
+
+/* Free allocated memory. */
+gceSTATUS
+gcoOS_Free(
+    IN gcoOS Os,
+    IN gctPOINTER Memory
+    );
+
+/* Allocate memory. */
+gceSTATUS
+gcoOS_AllocateMemory(
+    IN gcoOS Os,
+    IN gctSIZE_T Bytes,
+    OUT gctPOINTER * Memory
+    );
+
+/* Free memory. */
+gceSTATUS
+gcoOS_FreeMemory(
+    IN gcoOS Os,
+    IN gctPOINTER Memory
+    );
+
+/* Allocate contiguous memory. */
+gceSTATUS
+gcoOS_AllocateContiguous(
+    IN gcoOS Os,
+    IN gctBOOL InUserSpace,
+    IN OUT gctSIZE_T * Bytes,
+    OUT gctPHYS_ADDR * Physical,
+    OUT gctPOINTER * Logical
+    );
+
+/* Free contiguous memory. */
+gceSTATUS
+gcoOS_FreeContiguous(
+    IN gcoOS Os,
+    IN gctPHYS_ADDR Physical,
+    IN gctPOINTER Logical,
+    IN gctSIZE_T Bytes
+    );
+
+/* Map user memory. */
+gceSTATUS
+gcoOS_MapUserMemory(
+    IN gcoOS Os,
+    IN gctPOINTER Memory,
+    IN gctSIZE_T Size,
+    OUT gctPOINTER * Info,
+    OUT gctUINT32_PTR Address
+    );
+
+/* Unmap user memory. */
+gceSTATUS
+gcoOS_UnmapUserMemory(
+    IN gcoOS Os,
+    IN gctPOINTER Memory,
+    IN gctSIZE_T Size,
+    IN gctPOINTER Info,
+    IN gctUINT32 Address
+    );
+
+/* Device I/O Control call to the kernel HAL layer. */
+gceSTATUS
+gcoOS_DeviceControl(
+    IN gcoOS Os,
+    IN gctUINT32 IoControlCode,
+    IN gctPOINTER InputBuffer,
+    IN gctSIZE_T InputBufferSize,
+    IN gctPOINTER OutputBuffer,
+    IN gctSIZE_T OutputBufferSize
+    );
+
+/* Allocate non paged memory. */
+gceSTATUS gcoOS_AllocateNonPagedMemory(
+        IN gcoOS Os,
+        IN gctBOOL InUserSpace,
+        IN OUT gctSIZE_T * Bytes,
+        OUT gctPHYS_ADDR * Physical,
+        OUT gctPOINTER * Logical
+        );
+
+/* Free non paged memory. */
+gceSTATUS gcoOS_FreeNonPagedMemory(
+        IN gcoOS Os,
+        IN gctSIZE_T Bytes,
+        IN gctPHYS_ADDR Physical,
+        IN gctPOINTER Logical
+        );
+
+typedef enum _gceFILE_MODE
+{
+    gcvFILE_CREATE          = 0,
+    gcvFILE_APPEND,
+    gcvFILE_READ,
+    gcvFILE_CREATETEXT,
+    gcvFILE_APPENDTEXT,
+    gcvFILE_READTEXT,
+}
+gceFILE_MODE;
+
+/* Open a file. */
+gceSTATUS
+gcoOS_Open(
+    IN gcoOS Os,
+    IN gctCONST_STRING FileName,
+    IN gceFILE_MODE Mode,
+    OUT gctFILE * File
+    );
+
+/* Close a file. */
+gceSTATUS
+gcoOS_Close(
+    IN gcoOS Os,
+    IN gctFILE File
+    );
+
+/* Read data from a file. */
+gceSTATUS
+gcoOS_Read(
+    IN gcoOS Os,
+    IN gctFILE File,
+    IN gctSIZE_T ByteCount,
+    IN gctPOINTER Data,
+    OUT gctSIZE_T * ByteRead
+    );
+
+/* Write data to a file. */
+gceSTATUS
+gcoOS_Write(
+    IN gcoOS Os,
+    IN gctFILE File,
+    IN gctSIZE_T ByteCount,
+    IN gctCONST_POINTER Data
+    );
+
+typedef enum _gceFILE_WHENCE
+{
+    gcvFILE_SEEK_SET,
+    gcvFILE_SEEK_CUR,
+    gcvFILE_SEEK_END
+}
+gceFILE_WHENCE;
+
+/* Set the current position of a file. */
+gceSTATUS
+gcoOS_Seek(
+    IN gcoOS Os,
+    IN gctFILE File,
+    IN gctUINT32 Offset,
+    IN gceFILE_WHENCE Whence
+    );
+
+/* Set the current position of a file. */
+gceSTATUS
+gcoOS_SetPos(
+    IN gcoOS Os,
+    IN gctFILE File,
+    IN gctUINT32 Position
+    );
+
+/* Get the current position of a file. */
+gceSTATUS
+gcoOS_GetPos(
+    IN gcoOS Os,
+    IN gctFILE File,
+    OUT gctUINT32 * Position
+    );
+
+/* Perform a memory copy. */
+gceSTATUS
+gcoOS_MemCopy(
+    IN gctPOINTER Destination,
+    IN gctCONST_POINTER Source,
+    IN gctSIZE_T Bytes
+    );
+
+/* Perform a memory fill. */
+gceSTATUS
+gcoOS_MemFill(
+    IN gctPOINTER Destination,
+    IN gctUINT8 Filler,
+    IN gctSIZE_T Bytes
+    );
+
+/* Zero memory. */
+gceSTATUS
+gcoOS_ZeroMemory(
+    IN gctPOINTER Memory,
+    IN gctSIZE_T Bytes
+    );
+
+/* Find the last occurance of a character inside a string. */
+gceSTATUS
+gcoOS_StrFindReverse(
+    IN gctCONST_STRING String,
+    IN gctINT8 Character,
+    OUT gctSTRING * Output
+    );
+
+gceSTATUS
+gcoOS_StrLen(
+    IN gctCONST_STRING String,
+    OUT gctSIZE_T * Length
+    );
+
+gceSTATUS
+gcoOS_StrDup(
+    IN gcoOS Os,
+    IN gctCONST_STRING String,
+    OUT gctSTRING * Target
+    );
+
+/* Copy a string. */
+gceSTATUS
+gcoOS_StrCopySafe(
+    IN gctSTRING Destination,
+    IN gctSIZE_T DestinationSize,
+    IN gctCONST_STRING Source
+    );
+
+/* Append a string. */
+gceSTATUS
+gcoOS_StrCatSafe(
+    IN gctSTRING Destination,
+    IN gctSIZE_T DestinationSize,
+    IN gctCONST_STRING Source
+    );
+
+/* Compare two strings. */
+gceSTATUS
+gcoOS_StrCmp(
+    IN gctCONST_STRING String1,
+    IN gctCONST_STRING String2
+    );
+
+/* Compare characters of two strings. */
+gceSTATUS
+gcoOS_StrNCmp(
+    IN gctCONST_STRING String1,
+    IN gctCONST_STRING String2,
+    IN gctSIZE_T Count
+    );
+
+/* Convert string to float. */
+gceSTATUS
+gcoOS_StrToFloat(
+    IN gctCONST_STRING String,
+    OUT gctFLOAT * Float
+    );
+
+/* Convert string to integer. */
+gceSTATUS
+gcoOS_StrToInt(
+    IN gctCONST_STRING String,
+    OUT gctINT * Int
+    );
+
+gceSTATUS
+gcoOS_MemCmp(
+    IN gctCONST_POINTER Memory1,
+    IN gctCONST_POINTER Memory2,
+    IN gctSIZE_T Bytes
+    );
+
+gceSTATUS
+gcoOS_PrintStrSafe(
+    OUT gctSTRING String,
+    IN gctSIZE_T StringSize,
+    IN OUT gctUINT * Offset,
+    IN gctCONST_STRING Format,
+    ...
+    );
+
+gceSTATUS
+gcoOS_PrintStrVSafe(
+    OUT gctSTRING String,
+    IN gctSIZE_T StringSize,
+    IN OUT gctUINT * Offset,
+    IN gctCONST_STRING Format,
+    IN gctPOINTER Arguments
+    );
+
+gceSTATUS
+gcoOS_LoadLibrary(
+    IN gcoOS Os,
+    IN gctCONST_STRING Library,
+    OUT gctHANDLE * Handle
+    );
+
+gceSTATUS
+gcoOS_FreeLibrary(
+    IN gcoOS Os,
+    IN gctHANDLE Handle
+    );
+
+gceSTATUS
+gcoOS_GetProcAddress(
+    IN gcoOS Os,
+    IN gctHANDLE Handle,
+    IN gctCONST_STRING Name,
+    OUT gctPOINTER * Function
+    );
+
+gceSTATUS
+gcoOS_Compact(
+    IN gcoOS Os
+    );
+
+gceSTATUS
+gcoOS_ProfileStart(
+    IN gcoOS Os
+    );
+
+gceSTATUS
+gcoOS_ProfileEnd(
+    IN gcoOS Os,
+    IN gctCONST_STRING Title
+    );
+
+gceSTATUS
+gcoOS_SetProfileSetting(
+        IN gcoOS Os,
+        IN gctBOOL Enable,
+        IN gctCONST_STRING FileName
+    );
+gctINT32
+gcoOS_GetMilliTime(
+    void
+    );
+
+char* gcoOS_GetProgramName(char* buf, int size);
+
+#if MRVL_BENCH
+
+/*
+** Check point for timer.
+** To add new profiling point, modify below two members:
+gceSTATUS
+gcoOS_SetProfileSetting(
+        IN gcoOS Os,
+        IN gctBOOL Enable,
+        IN gctCONST_STRING FileName
+        );
+
+*/
+typedef enum _apiBenchIndex  {
+	APIBENCH_INDEX_FRAME,
+    APIBENCH_INDEX_DRAWARRAY,
+	APIBENCH_INDEX_DRAWELEMENTS,
+	APIBENCH_INDEX_BUILDSTREAM,
+	APIBENCH_INDEX_INDEXBUFFER,
+	APIBENCH_INDEX_DRAWARRAY_UPDATESTATE,
+	APIBENCH_INDEX_DRAWARRAY_UPDATESTATE1,
+    APIBENCH_INDEX_UPDATESTATE,
+    APIBENCH_INDEX_UPDATESTATE1,
+	APIBENCH_INDEX_SWAPBUFFERS,
+	APIBENCH_INDEX_DRAWIMAGE,
+	APIBENCH_INDEX_SWTEXTUREUPLOAD,
+	APIBENCH_INDEX_DIRECTTEXTURE,
+	APIBENCH_INDEX_GLEGLIMAGETEXTURE,
+	APIBENCH_INDEX_DRAWTEX,
+	APIBENCH_INDEX_BUFFERDATA,
+	APIBENCH_INDEX_BUFFERSUBDATA,
+	APIBENCH_INDEX_MAX
+}apiBenchIndex;
+
+#define APIBENCHNAME { 	\
+	"Frame",			\
+	"DrawArray",		\
+	"DrawElement",		\
+	"_buildStream",		\
+	"IndexBuffer",		\
+	"DrawArray_UpdateState",	\
+	"DrawArray_UpdateState1",   \
+	"UpdateState",		\
+	"UpdateState1",		\
+	"eglSwapBuffers",	\
+	"DrawImage",        \
+	"SWTextureUpload",  \
+	"uploadDirectTexture",      \
+	"glEGLImageTexture2D",      \
+	"glDrawTex",        \
+	"glBufferData",     \
+	"glBufferSubData",  \
+}
+
+/*
+** Check point for state update
+**
+*/
+typedef enum _apiBenchStateIndex {
+	APIBENCH_STATE_INDEX_FRAME,
+	APIBENCH_STATE_INDEX_TEXTURE,
+	APIBENCH_STATE_INDEX_SHADER,
+	APIBENCH_STATE_INDEX_MAX
+}apiBenchStateIndex;
+
+#define APIBENCHSTATENAME {	\
+	"Frame",				\
+	"Texture",				\
+	"Shader",				\
+}
+
+ /*  Timer structure to store the profile result */
+typedef struct _gcoTIMER
+{
+	gctUINT32				start;
+	gctUINT32				end;
+	gctUINT32				totalTime;
+	gctUINT32				count;
+}gcoTIMER;
+
+ /*  global structure for api bench */
+typedef struct _gcoAPIBENCH
+{
+	/* frame count */
+	gctUINT32			frameCount;
+
+	/* timer object for bench mark */
+	gcoTIMER			timer[APIBENCH_INDEX_MAX];
+
+	/* total sent command size */
+	gctUINT32			commandSize;
+
+	/* commit times */
+	gctUINT32			commitNumber;
+
+	/* profile the state update, use same structure of timer */
+	gcoTIMER			stateCounter[APIBENCH_STATE_INDEX_MAX];
+
+}gcoAPIBENCH;
+
+ /*  Frame count to print */
+#define PROFILE_DRIVER_FRAME_PRINT		10
+
+
+void gcoDUMP_APIBenchStart(
+	IN gcoHAL Hal,
+	IN gctUINT32 timerIndex
+	);
+
+void gcoDUMP_APIBenchEnd(
+	IN gcoHAL Hal,
+	IN gctUINT32 timerIndex
+	);
+
+void gcoDUMP_APIBenchPrint(
+	IN gcoHAL Hal
+	);
+
+void gcoDUMP_APIBenchInit(
+	IN gcoHAL Hal
+	);
+
+void gcoDUMP_APIBenchFrame(
+	IN gcoHAL Hal
+	);
+
+void gcoDUMP_APIBenchCommand(
+	IN gcoHAL Hal,
+	IN gctUINT32 size
+	);
+
+void gcoDUMP_APIBenchCommit(
+	IN gcoHAL Hal
+	);
+
+void gcoDUMP_APIBenchStateEnd(
+	IN gcoHAL Hal,
+	IN gctUINT32 stateIndex
+	);
+
+void gcoDUMP_APIBenchStateStart(
+	IN gcoHAL Hal,
+	IN gctUINT32 stateIndex
+	);
+
+#else
+
+
+#endif
+
+/* Query the video memory. */
+gceSTATUS
+gcoOS_QueryVideoMemory(
+    IN gcoOS Os,
+    OUT gctPHYS_ADDR * InternalAddress,
+    OUT gctSIZE_T * InternalSize,
+    OUT gctPHYS_ADDR * ExternalAddress,
+    OUT gctSIZE_T * ExternalSize,
+    OUT gctPHYS_ADDR * ContiguousAddress,
+    OUT gctSIZE_T * ContiguousSize
+    );
+
+/*----------------------------------------------------------------------------*/
+/*----- Atoms ----------------------------------------------------------------*/
+
+typedef struct gcsATOM * gcsATOM_PTR;
+
+/* Construct an atom. */
+gceSTATUS
+gcoOS_AtomConstruct(
+    IN gcoOS Os,
+    OUT gcsATOM_PTR * Atom
+    );
+
+/* Destroy an atom. */
+gceSTATUS
+gcoOS_AtomDestroy(
+    IN gcoOS Os,
+    IN gcsATOM_PTR Atom
+    );
+
+/* Increment an atom. */
+gceSTATUS
+gcoOS_AtomIncrement(
+    IN gcoOS Os,
+    IN gcsATOM_PTR Atom,
+    OUT gctINT32_PTR OldValue
+    );
+
+/* Decrement an atom. */
+gceSTATUS
+gcoOS_AtomDecrement(
+    IN gcoOS Os,
+    IN gcsATOM_PTR Atom,
+    OUT gctINT32_PTR OldValue
+    );
+
+gctHANDLE
+gcoOS_GetCurrentProcessID(
+    void
+    );
+
+/*----------------------------------------------------------------------------*/
+/*----- Time -----------------------------------------------------------------*/
+
+/* Get the number of milliseconds since the system started. */
+gctUINT32
+gcoOS_GetTicks(
+    void
+    );
+
+/* Get time in microseconds. */
+gceSTATUS
+gcoOS_GetTime(
+    gctUINT64_PTR Time
+    );
+
+/* Get CPU usage in microseconds. */
+gceSTATUS
+gcoOS_GetCPUTime(
+    gctUINT64_PTR CPUTime
+    );
+
+/* Get memory usage. */
+gceSTATUS
+gcoOS_GetMemoryUsage(
+    gctUINT32_PTR MaxRSS,
+    gctUINT32_PTR IxRSS,
+    gctUINT32_PTR IdRSS,
+    gctUINT32_PTR IsRSS
+    );
+
+/* Delay a number of microseconds. */
+gceSTATUS
+gcoOS_Delay(
+    IN gcoOS Os,
+    IN gctUINT32 Delay
+    );
+
+/*----------------------------------------------------------------------------*/
+/*----- Mutexes --------------------------------------------------------------*/
+
+/* Create a new mutex. */
+gceSTATUS
+gcoOS_CreateMutex(
+    IN gcoOS Os,
+    OUT gctPOINTER * Mutex
+    );
+
+/* Delete a mutex. */
+gceSTATUS
+gcoOS_DeleteMutex(
+    IN gcoOS Os,
+    IN gctPOINTER Mutex
+    );
+
+/* Acquire a mutex. */
+gceSTATUS
+gcoOS_AcquireMutex(
+    IN gcoOS Os,
+    IN gctPOINTER Mutex,
+    IN gctUINT32 Timeout
+    );
+
+/* Release a mutex. */
+gceSTATUS
+gcoOS_ReleaseMutex(
+    IN gcoOS Os,
+    IN gctPOINTER Mutex
+    );
+
+/*----------------------------------------------------------------------------*/
+/*----- Signals --------------------------------------------------------------*/
+
+/* Create a signal. */
+gceSTATUS
+gcoOS_CreateSignal(
+    IN gcoOS Os,
+    IN gctBOOL ManualReset,
+    OUT gctSIGNAL * Signal
+    );
+
+/* Destroy a signal. */
+gceSTATUS
+gcoOS_DestroySignal(
+    IN gcoOS Os,
+    IN gctSIGNAL Signal
+    );
+
+/* Signal a signal. */
+gceSTATUS
+gcoOS_Signal(
+    IN gcoOS Os,
+    IN gctSIGNAL Signal,
+    IN gctBOOL State
+    );
+
+/* Wait for a signal. */
+gceSTATUS
+gcoOS_WaitSignal(
+    IN gcoOS Os,
+    IN gctSIGNAL Signal,
+    IN gctUINT32 Wait
+    );
+
+/* Write a register. */
+gceSTATUS
+gcoOS_WriteRegister(
+    IN gcoOS Os,
+    IN gctUINT32 Address,
+    IN gctUINT32 Data
+    );
+
+/* Read a register. */
+gceSTATUS
+gcoOS_ReadRegister(
+    IN gcoOS Os,
+    IN gctUINT32 Address,
+    OUT gctUINT32 * Data
+    );
+
+gceSTATUS
+gcoOS_CacheFlush(
+    IN gcoOS Os,
+    IN gctPOINTER Logical,
+    IN gctSIZE_T Bytes
+    );
+
+gceSTATUS
+gcoOS_CacheInvalidate(
+    IN gcoOS Os,
+    IN gctPOINTER Logical,
+    IN gctSIZE_T Bytes
+    );
+
+/*******************************************************************************
+**  gcoMATH object
+*/
+
+#define gcdPI                   3.14159265358979323846f
+
+gctUINT32
+gcoMATH_Log2in5dot5(
+    IN gctINT X
+    );
+
+gctFLOAT
+gcoMATH_Sine(
+    IN gctFLOAT X
+    );
+
+gctFLOAT
+gcoMATH_Cosine(
+    IN gctFLOAT X
+    );
+
+gctFLOAT
+gcoMATH_Floor(
+    IN gctFLOAT X
+    );
+
+gctFLOAT
+gcoMATH_Ceiling(
+    IN gctFLOAT X
+    );
+
+gctFLOAT
+gcoMATH_SquareRoot(
+    IN gctFLOAT X
+    );
+
+gctFLOAT
+gcoMATH_Log2(
+    IN gctFLOAT X
+    );
+
+gctFLOAT
+gcoMATH_Power(
+    IN gctFLOAT X,
+    IN gctFLOAT Y
+    );
+
+gctFLOAT
+gcoMATH_Modulo(
+    IN gctFLOAT X,
+    IN gctFLOAT Y
+    );
+
+gctFLOAT
+gcoMATH_Exp(
+    IN gctFLOAT X
+    );
+
+gctFLOAT
+gcoMATH_Absolute(
+    IN gctFLOAT X
+    );
+
+gctFLOAT
+gcoMATH_ArcCosine(
+    IN gctFLOAT X
+    );
+
+gctFLOAT
+gcoMATH_Tangent(
+    IN gctFLOAT X
+    );
+
+gctFLOAT
+gcoMATH_UInt2Float(
+    IN gctUINT X
+    );
+
+gctUINT
+gcoMATH_Float2UInt(
+    IN gctFLOAT X
+    );
+
+gctFLOAT
+gcoMATH_Multiply(
+    IN gctFLOAT X,
+    IN gctFLOAT Y
+    );
+
+/******************************************************************************\
+**************************** Coordinate Structures *****************************
+\******************************************************************************/
+
+typedef struct _gcsPOINT
+{
+    gctINT32                    x;
+    gctINT32                    y;
+}
+gcsPOINT;
+
+typedef struct _gcsSIZE
+{
+    gctINT32                    width;
+    gctINT32                    height;
+}
+gcsSIZE;
+
+typedef struct _gcsRECT
+{
+    gctINT32                    left;
+    gctINT32                    top;
+    gctINT32                    right;
+    gctINT32                    bottom;
+}
+gcsRECT;
+
+
+/******************************************************************************\
+********************************* gcoSURF Object ********************************
+\******************************************************************************/
+
+/*----------------------------------------------------------------------------*/
+/*------------------------------- gcoSURF Common ------------------------------*/
+
+/* Color format classes. */
+typedef enum _gceFORMAT_CLASS
+{
+    gcvFORMAT_CLASS_RGBA        = 4500,
+    gcvFORMAT_CLASS_YUV,
+    gcvFORMAT_CLASS_INDEX,
+    gcvFORMAT_CLASS_LUMINANCE,
+    gcvFORMAT_CLASS_BUMP,
+    gcvFORMAT_CLASS_DEPTH,
+}
+gceFORMAT_CLASS;
+
+/* Special enums for width field in gcsFORMAT_COMPONENT. */
+typedef enum _gceCOMPONENT_CONTROL
+{
+    gcvCOMPONENT_NOTPRESENT     = 0x00,
+    gcvCOMPONENT_DONTCARE       = 0x80,
+    gcvCOMPONENT_WIDTHMASK      = 0x7F,
+    gcvCOMPONENT_ODD            = 0x80
+}
+gceCOMPONENT_CONTROL;
+
+/* Color format component parameters. */
+typedef struct _gcsFORMAT_COMPONENT
+{
+    gctUINT8                    start;
+    gctUINT8                    width;
+}
+gcsFORMAT_COMPONENT;
+
+/* RGBA color format class. */
+typedef struct _gcsFORMAT_CLASS_TYPE_RGBA
+{
+    gcsFORMAT_COMPONENT         alpha;
+    gcsFORMAT_COMPONENT         red;
+    gcsFORMAT_COMPONENT         green;
+    gcsFORMAT_COMPONENT         blue;
+}
+gcsFORMAT_CLASS_TYPE_RGBA;
+
+/* YUV color format class. */
+typedef struct _gcsFORMAT_CLASS_TYPE_YUV
+{
+    gcsFORMAT_COMPONENT         y;
+    gcsFORMAT_COMPONENT         u;
+    gcsFORMAT_COMPONENT         v;
+}
+gcsFORMAT_CLASS_TYPE_YUV;
+
+/* Index color format class. */
+typedef struct _gcsFORMAT_CLASS_TYPE_INDEX
+{
+    gcsFORMAT_COMPONENT         value;
+}
+gcsFORMAT_CLASS_TYPE_INDEX;
+
+/* Luminance color format class. */
+typedef struct _gcsFORMAT_CLASS_TYPE_LUMINANCE
+{
+    gcsFORMAT_COMPONENT         alpha;
+    gcsFORMAT_COMPONENT         value;
+}
+gcsFORMAT_CLASS_TYPE_LUMINANCE;
+
+/* Bump map color format class. */
+typedef struct _gcsFORMAT_CLASS_TYPE_BUMP
+{
+    gcsFORMAT_COMPONENT         alpha;
+    gcsFORMAT_COMPONENT         l;
+    gcsFORMAT_COMPONENT         v;
+    gcsFORMAT_COMPONENT         u;
+    gcsFORMAT_COMPONENT         q;
+    gcsFORMAT_COMPONENT         w;
+}
+gcsFORMAT_CLASS_TYPE_BUMP;
+
+/* Depth and stencil format class. */
+typedef struct _gcsFORMAT_CLASS_TYPE_DEPTH
+{
+    gcsFORMAT_COMPONENT         depth;
+    gcsFORMAT_COMPONENT         stencil;
+}
+gcsFORMAT_CLASS_TYPE_DEPTH;
+
+/* Format parameters. */
+typedef struct _gcsSURF_FORMAT_INFO
+{
+    /* Format code and class. */
+    gceSURF_FORMAT              format;
+    gceFORMAT_CLASS             fmtClass;
+
+    /* The size of one pixel in bits. */
+    gctUINT8                    bitsPerPixel;
+
+    /* Component swizzle. */
+    gceSURF_SWIZZLE             swizzle;
+
+    /* Some formats have two neighbour pixels interleaved together. */
+    /* To describe such format, set the flag to 1 and add another   */
+    /* like this one describing the odd pixel format.               */
+    gctUINT8                    interleaved;
+
+    /* Format components. */
+    union
+    {
+        gcsFORMAT_CLASS_TYPE_BUMP       bump;
+        gcsFORMAT_CLASS_TYPE_RGBA       rgba;
+        gcsFORMAT_CLASS_TYPE_YUV        yuv;
+        gcsFORMAT_CLASS_TYPE_LUMINANCE  lum;
+        gcsFORMAT_CLASS_TYPE_INDEX      index;
+        gcsFORMAT_CLASS_TYPE_DEPTH      depth;
+    } u;
+}
+gcsSURF_FORMAT_INFO;
+
+/* Frame buffer information. */
+typedef struct _gcsSURF_FRAMEBUFFER
+{
+    gctPOINTER                  logical;
+    gctUINT                     width, height;
+    gctINT                      stride;
+    gceSURF_FORMAT              format;
+}
+gcsSURF_FRAMEBUFFER;
+
+/* Generic pixel component descriptors. */
+extern gcsFORMAT_COMPONENT gcvPIXEL_COMP_XXX8;
+extern gcsFORMAT_COMPONENT gcvPIXEL_COMP_XX8X;
+extern gcsFORMAT_COMPONENT gcvPIXEL_COMP_X8XX;
+extern gcsFORMAT_COMPONENT gcvPIXEL_COMP_8XXX;
+
+typedef enum _gceORIENTATION
+{
+    gcvORIENTATION_TOP_BOTTOM,
+    gcvORIENTATION_BOTTOM_TOP,
+}
+gceORIENTATION;
+
+
+/* Construct a new gcoSURF object. */
+gceSTATUS
+gcoSURF_Construct(
+    IN gcoHAL Hal,
+    IN gctUINT Width,
+    IN gctUINT Height,
+    IN gctUINT Depth,
+    IN gceSURF_TYPE Type,
+    IN gceSURF_FORMAT Format,
+    IN gcePOOL Pool,
+    OUT gcoSURF * Surface
+    );
+
+/* Destroy an gcoSURF object. */
+gceSTATUS
+gcoSURF_Destroy(
+    IN gcoSURF Surface
+    );
+
+/* Map user-allocated surface. */
+gceSTATUS
+gcoSURF_MapUserSurface(
+    IN gcoSURF Surface,
+    IN gctUINT Alignment,
+    IN gctPOINTER Logical,
+    IN gctUINT32 Physical
+    );
+
+/* Set the color type of the surface. */
+gceSTATUS
+gcoSURF_SetColorType(
+    IN gcoSURF Surface,
+    IN gceSURF_COLOR_TYPE ColorType
+    );
+
+/* Get the color type of the surface. */
+gceSTATUS
+gcoSURF_GetColorType(
+    IN gcoSURF Surface,
+    OUT gceSURF_COLOR_TYPE *ColorType
+    );
+
+/* Set the surface ration angle. */
+gceSTATUS
+gcoSURF_SetRotation(
+    IN gcoSURF Surface,
+    IN gceSURF_ROTATION Rotation
+    );
+
+/* Verify and return the state of the tile status mechanism. */
+gceSTATUS
+gcoSURF_IsTileStatusSupported(
+    IN gcoSURF Surface
+    );
+
+/* Enable tile status for the specified surface. */
+gceSTATUS
+gcoSURF_EnableTileStatus(
+    IN gcoSURF Surface
+    );
+
+/* Disable tile status for the specified surface. */
+gceSTATUS
+gcoSURF_DisableTileStatus(
+    IN gcoSURF Surface,
+    IN gctBOOL Decompress
+    );
+
+/* Get surface size. */
+gceSTATUS
+gcoSURF_GetSize(
+    IN gcoSURF Surface,
+    OUT gctUINT * Width,
+    OUT gctUINT * Height,
+    OUT gctUINT * Depth
+    );
+
+/* Get surface aligned sizes. */
+gceSTATUS
+gcoSURF_GetAlignedSize(
+    IN gcoSURF Surface,
+    OUT gctUINT * Width,
+    OUT gctUINT * Height,
+    OUT gctINT * Stride
+    );
+
+/* Get surface type and format. */
+gceSTATUS
+gcoSURF_GetFormat(
+    IN gcoSURF Surface,
+    OUT gceSURF_TYPE * Type,
+    OUT gceSURF_FORMAT * Format
+    );
+
+/* Lock the surface. */
+gceSTATUS
+gcoSURF_Lock(
+    IN gcoSURF Surface,
+    IN OUT gctUINT32 * Address,
+    IN OUT gctPOINTER * Memory
+    );
+
+/* Unlock the surface. */
+gceSTATUS
+gcoSURF_Unlock(
+    IN gcoSURF Surface,
+    IN gctPOINTER Memory
+    );
+
+/* Return pixel format parameters. */
+gceSTATUS
+gcoSURF_QueryFormat(
+    IN gceSURF_FORMAT Format,
+    OUT gcsSURF_FORMAT_INFO_PTR * Info
+    );
+
+/* Compute the color pixel mask. */
+gceSTATUS
+gcoSURF_ComputeColorMask(
+    IN gcsSURF_FORMAT_INFO_PTR Format,
+    OUT gctUINT32_PTR ColorMask
+    );
+
+/* Flush the surface. */
+gceSTATUS
+gcoSURF_Flush(
+    IN gcoSURF Surface
+    );
+
+/* Fill surface with a value. */
+gceSTATUS
+gcoSURF_Fill(
+    IN gcoSURF Surface,
+    IN gcsPOINT_PTR Origin,
+    IN gcsSIZE_PTR Size,
+    IN gctUINT32 Value,
+    IN gctUINT32 Mask
+    );
+
+/* Alpha blend two surfaces together. */
+gceSTATUS
+gcoSURF_Blend(
+    IN gcoSURF SrcSurface,
+    IN gcoSURF DestSurface,
+    IN gcsPOINT_PTR SrcOrig,
+    IN gcsPOINT_PTR DestOrigin,
+    IN gcsSIZE_PTR Size,
+    IN gceSURF_BLEND_MODE Mode
+    );
+
+/* Create a new gcoSURF wrapper object. */
+gceSTATUS
+gcoSURF_ConstructWrapper(
+    IN gcoHAL Hal,
+    OUT gcoSURF * Surface
+    );
+
+/* Set the underlying buffer for the surface wrapper. */
+gceSTATUS
+gcoSURF_SetBuffer(
+    IN gcoSURF Surface,
+    IN gceSURF_TYPE Type,
+    IN gceSURF_FORMAT Format,
+    IN gctUINT Stride,
+    IN gctPOINTER Logical,
+    IN gctUINT32 Physical
+    );
+
+/* Set the size of the surface in pixels and map the underlying buffer. */
+gceSTATUS
+gcoSURF_SetWindow(
+    IN gcoSURF Surface,
+    IN gctUINT X,
+    IN gctUINT Y,
+    IN gctUINT Width,
+    IN gctUINT Height
+    );
+
+/* Increase reference count of the surface. */
+gceSTATUS
+gcoSURF_ReferenceSurface(
+    IN gcoSURF Surface
+    );
+
+/* Get surface reference count. */
+gceSTATUS
+gcoSURF_QueryReferenceCount(
+    IN gcoSURF Surface,
+    OUT gctINT32 * ReferenceCount
+    );
+
+/* Set surface orientation. */
+gceSTATUS
+gcoSURF_SetOrientation(
+    IN gcoSURF Surface,
+    IN gceORIENTATION Orientation
+    );
+
+/* Query surface orientation. */
+gceSTATUS
+gcoSURF_QueryOrientation(
+    IN gcoSURF Surface,
+    OUT gceORIENTATION * Orientation
+    );
+ /* #define DUMP_SURFACE     0 */
+
+/* Dump a buffer to a BMP file */
+int gcoOS_DumpBMP(
+                  IN gctPOINTER dumpBase,
+                  IN gctINT dumpWidth,
+                  IN gctINT dumpHeight,
+                  IN gctINT dumpStride,
+                  IN gctINT dumpBpp,
+                  IN gceSURF_FORMAT format,
+                  IN gceORIENTATION orientation,
+                  IN gctCONST_STRING fileName
+                  );
+
+
+/* Dump surface to a BMP file. */
+gceSTATUS
+gcoSURF_DumpSurface(
+	IN gcoSURF Surface,
+	IN gctBOOL bCheckOrientation,
+	IN gctCONST_STRING fileName
+	);
+
+
+/******************************************************************************\
+********************************* gcoDUMP Object ********************************
+\******************************************************************************/
+
+/* Construct a new gcoDUMP object. */
+gceSTATUS
+gcoDUMP_Construct(
+    IN gcoOS Os,
+    IN gcoHAL Hal,
+    OUT gcoDUMP * Dump
+    );
+
+/* Destroy a gcoDUMP object. */
+gceSTATUS
+gcoDUMP_Destroy(
+    IN gcoDUMP Dump
+    );
+
+/* Enable/disable dumping. */
+gceSTATUS
+gcoDUMP_Control(
+    IN gcoDUMP Dump,
+    IN gctSTRING FileName
+    );
+
+gceSTATUS
+gcoDUMP_IsEnabled(
+    IN gcoDUMP Dump,
+    OUT gctBOOL * Enabled
+    );
+
+/* Add surface. */
+gceSTATUS
+gcoDUMP_AddSurface(
+    IN gcoDUMP Dump,
+    IN gctINT32 Width,
+    IN gctINT32 Height,
+    IN gceSURF_FORMAT PixelFormat,
+    IN gctUINT32 Address,
+    IN gctSIZE_T ByteCount
+    );
+
+/* Mark the beginning of a frame. */
+gceSTATUS
+gcoDUMP_FrameBegin(
+    IN gcoDUMP Dump
+    );
+
+/* Mark the end of a frame. */
+gceSTATUS
+gcoDUMP_FrameEnd(
+    IN gcoDUMP Dump
+    );
+
+/* Dump data. */
+gceSTATUS
+gcoDUMP_DumpData(
+    IN gcoDUMP Dump,
+    IN gceDUMP_TAG Type,
+    IN gctUINT32 Address,
+    IN gctSIZE_T ByteCount,
+    IN gctCONST_POINTER Data
+    );
+
+/* Delete an address. */
+gceSTATUS
+gcoDUMP_Delete(
+    IN gcoDUMP Dump,
+    IN gctUINT32 Address
+    );
+
+/******************************************************************************\
+******************************* gcsRECT Structure ******************************
+\******************************************************************************/
+
+/* Initialize rectangle structure. */
+gceSTATUS
+gcsRECT_Set(
+    OUT gcsRECT_PTR Rect,
+    IN gctINT32 Left,
+    IN gctINT32 Top,
+    IN gctINT32 Right,
+    IN gctINT32 Bottom
+    );
+
+/* Return the width of the rectangle. */
+gceSTATUS
+gcsRECT_Width(
+    IN gcsRECT_PTR Rect,
+    OUT gctINT32 * Width
+    );
+
+/* Return the height of the rectangle. */
+gceSTATUS
+gcsRECT_Height(
+    IN gcsRECT_PTR Rect,
+    OUT gctINT32 * Height
+    );
+
+/* Ensure that top left corner is to the left and above the right bottom. */
+gceSTATUS
+gcsRECT_Normalize(
+    IN OUT gcsRECT_PTR Rect
+    );
+
+/* Compare two rectangles. */
+gceSTATUS
+gcsRECT_IsEqual(
+    IN gcsRECT_PTR Rect1,
+    IN gcsRECT_PTR Rect2,
+    OUT gctBOOL * Equal
+    );
+
+/* Compare the sizes of two rectangles. */
+gceSTATUS
+gcsRECT_IsOfEqualSize(
+    IN gcsRECT_PTR Rect1,
+    IN gcsRECT_PTR Rect2,
+    OUT gctBOOL * EqualSize
+    );
+
+
+/******************************************************************************\
+**************************** gcsBOUNDARY Structure *****************************
+\******************************************************************************/
+
+typedef struct _gcsBOUNDARY
+{
+    gctINT                      x;
+    gctINT                      y;
+    gctINT                      width;
+    gctINT                      height;
+}
+gcsBOUNDARY;
+
+/******************************************************************************\
+********************************* gcoHEAP Object ********************************
+\******************************************************************************/
+
+typedef struct _gcoHEAP *       gcoHEAP;
+
+/* Construct a new gcoHEAP object. */
+gceSTATUS
+gcoHEAP_Construct(
+    IN gcoOS Os,
+    IN gctSIZE_T AllocationSize,
+    OUT gcoHEAP * Heap
+    );
+
+/* Destroy an gcoHEAP object. */
+gceSTATUS
+gcoHEAP_Destroy(
+    IN gcoHEAP Heap
+    );
+
+/* Allocate memory. */
+gceSTATUS
+gcoHEAP_Allocate(
+    IN gcoHEAP Heap,
+    IN gctSIZE_T Bytes,
+    OUT gctPOINTER * Node
+    );
+
+/* Free memory. */
+gceSTATUS
+gcoHEAP_Free(
+    IN gcoHEAP Heap,
+    IN gctPOINTER Node
+    );
+
+/* Profile the heap. */
+gceSTATUS
+gcoHEAP_ProfileStart(
+    IN gcoHEAP Heap
+    );
+
+gceSTATUS
+gcoHEAP_ProfileEnd(
+    IN gcoHEAP Heap,
+    IN gctCONST_STRING Title
+    );
+
+#if defined gcdHAL_TEST
+gceSTATUS
+gcoHEAP_Test(
+    IN gcoHEAP Heap,
+    IN gctSIZE_T Vectors,
+    IN gctSIZE_T MaxSize
+    );
+#endif
+
+/******************************************************************************\
+******************************* Debugging Macros *******************************
+\******************************************************************************/
+
+void
+gcoOS_SetDebugLevel(
+    IN gctUINT32 Level
+    );
+
+void
+gcoOS_SetDebugZone(
+    IN gctUINT32 Zone
+    );
+
+void
+gcoOS_SetDebugLevelZone(
+    IN gctUINT32 Level,
+    IN gctUINT32 Zone
+    );
+
+void
+gcoOS_SetDebugZones(
+    IN gctUINT32 Zones,
+    IN gctBOOL Enable
+    );
+
+void
+gcoOS_SetDebugFile(
+    IN gctCONST_STRING FileName
+    );
+
+/*******************************************************************************
+**
+**  gcmFATAL
+**
+**      Print a message to the debugger and execute a break point.
+**
+**  ARGUMENTS:
+**
+**      message Message.
+**      ...     Optional arguments.
+*/
+
+void
+gckOS_DebugFatal(
+    IN gctCONST_STRING Message,
+    ...
+    );
+
+void
+gcoOS_DebugFatal(
+    IN gctCONST_STRING Message,
+    ...
+    );
+
+#if gcdDEBUG
+#   define gcmFATAL             gcoOS_DebugFatal
+#   define gcmkFATAL            gckOS_DebugFatal
+#elif gcdHAS_ELLIPSES
+#   define gcmFATAL(...)
+#   define gcmkFATAL(...)
+#else
+    gcmINLINE static void
+    __dummy_fatal(
+        IN gctCONST_STRING Message,
+        ...
+        )
+    {
+    }
+#   define gcmFATAL             __dummy_fatal
+#   define gcmkFATAL            __dummy_fatal
+#endif
+
+#define gcmENUM2TEXT(e)         case e: return #e
+
+/*******************************************************************************
+**
+**  gcmTRACE
+**
+**      Print a message to the debugfer if the correct level has been set.  In
+**      retail mode this macro does nothing.
+**
+**  ARGUMENTS:
+**
+**      level   Level of message.
+**      message Message.
+**      ...     Optional arguments.
+*/
+#define gcvLEVEL_NONE           -1
+#define gcvLEVEL_ERROR          0
+#define gcvLEVEL_WARNING        1
+#define gcvLEVEL_INFO           2
+#define gcvLEVEL_VERBOSE        3
+
+void
+gckOS_DebugTrace(
+    IN gctUINT32 Level,
+    IN gctCONST_STRING Message,
+    ...
+    );
+void
+
+gcoOS_DebugTrace(
+    IN gctUINT32 Level,
+    IN gctCONST_STRING Message,
+    ...
+    );
+
+#if gcdDEBUG
+#   define gcmTRACE             gcoOS_DebugTrace
+#   define gcmkTRACE            gckOS_DebugTrace
+#elif gcdHAS_ELLIPSES
+#   define gcmTRACE(...)
+#   define gcmkTRACE(...)
+#else
+    gcmINLINE static void
+    __dummy_trace(
+        IN gctUINT32 Level,
+        IN gctCONST_STRING Message,
+        ...
+        )
+    {
+    }
+#   define gcmTRACE             __dummy_trace
+#   define gcmkTRACE            __dummy_trace
+#endif
+
+/* Debug zones. */
+#define gcvZONE_OS              (1 << 0)
+#define gcvZONE_HARDWARE        (1 << 1)
+#define gcvZONE_HEAP            (1 << 2)
+
+/* Kernel zones. */
+#define gcvZONE_KERNEL          (1 << 3)
+#define gcvZONE_VIDMEM          (1 << 4)
+#define gcvZONE_COMMAND         (1 << 5)
+#define gcvZONE_DRIVER          (1 << 6)
+#define gcvZONE_CMODEL          (1 << 7)
+#define gcvZONE_MMU             (1 << 8)
+#define gcvZONE_EVENT           (1 << 9)
+#define gcvZONE_DEVICE          (1 << 10)
+
+/* User zones. */
+#define gcvZONE_HAL             (1 << 3)
+#define gcvZONE_BUFFER          (1 << 4)
+#define gcvZONE_CONTEXT         (1 << 5)
+#define gcvZONE_SURFACE         (1 << 6)
+#define gcvZONE_INDEX           (1 << 7)
+#define gcvZONE_STREAM          (1 << 8)
+#define gcvZONE_TEXTURE         (1 << 9)
+#define gcvZONE_2D              (1 << 10)
+#define gcvZONE_3D              (1 << 11)
+#define gcvZONE_COMPILER        (1 << 12)
+#define gcvZONE_MEMORY          (1 << 13)
+#define gcvZONE_STATE           (1 << 14)
+#define gcvZONE_AUX             (1 << 15)
+
+/* API definitions. */
+#define gcvZONE_API_HAL         (0 << 28)
+#define gcvZONE_API_EGL         (1 << 28)
+#define gcvZONE_API_ES11        (2 << 28)
+#define gcvZONE_API_ES20        (3 << 28)
+#define gcvZONE_API_VG11        (4 << 28)
+#define gcvZONE_API_GL          (5 << 28)
+#define gcvZONE_API_DFB         (6 << 28)
+#define gcvZONE_API_GDI         (7 << 28)
+#define gcvZONE_API_D3D         (8 << 28)
+
+#define gcmZONE_GET_API(zone)   ((zone) >> 28)
+#define gcdZONE_MASK            0x0FFFFFFF
+
+/* Handy zones. */
+#define gcvZONE_NONE            0
+#define gcvZONE_ALL             gcdZONE_MASK
+
+/*******************************************************************************
+**
+**  gcmTRACE_ZONE
+**
+**      Print a message to the debugger if the correct level and zone has been
+**      set.  In retail mode this macro does nothing.
+**
+**  ARGUMENTS:
+**
+**      Level   Level of message.
+**      Zone    Zone of message.
+**      Message Message.
+**      ...     Optional arguments.
+*/
+
+void
+gckOS_DebugTraceZone(
+    IN gctUINT32 Level,
+    IN gctUINT32 Zone,
+    IN gctCONST_STRING Message,
+    ...
+    );
+
+void
+gcoOS_DebugTraceZone(
+    IN gctUINT32 Level,
+    IN gctUINT32 Zone,
+    IN gctCONST_STRING Message,
+    ...
+    );
+
+#if gcdDEBUG
+#   define gcmTRACE_ZONE            gcoOS_DebugTraceZone
+#   define gcmkTRACE_ZONE           gckOS_DebugTraceZone
+#elif gcdHAS_ELLIPSES
+#   define gcmTRACE_ZONE(...)
+#   define gcmkTRACE_ZONE(...)
+#else
+    gcmINLINE static void
+    __dummy_trace_zone(
+        IN gctUINT32 Level,
+        IN gctUINT32 Zone,
+        IN gctCONST_STRING Message,
+        ...
+        )
+    {
+    }
+#   define gcmTRACE_ZONE            __dummy_trace_zone
+#   define gcmkTRACE_ZONE           __dummy_trace_zone
+#endif
+
+/******************************************************************************\
+******************************** Logging Macros ********************************
+\******************************************************************************/
+
+#define gcdHEADER_LEVEL             gcvLEVEL_VERBOSE
+
+#define gcmHEADER() \
+    gcmTRACE_ZONE(gcdHEADER_LEVEL, _GC_OBJ_ZONE, \
+                  "++%s(%d)", __FUNCTION__, __LINE__)
+
+#if gcdHAS_ELLIPSES
+#   define gcmHEADER_ARG(Text, ...) \
+        gcmTRACE_ZONE(gcdHEADER_LEVEL, _GC_OBJ_ZONE, \
+                      "++%s(%d): " Text, __FUNCTION__, __LINE__, __VA_ARGS__)
+#else
+    gcmINLINE static void
+    __dummy_header_arg(
+        IN gctCONST_STRING Text,
+        ...
+        )
+    {
+    }
+#   define gcmHEADER_ARG                __dummy_header_arg
+#endif
+
+#define gcmFOOTER() \
+    gcmTRACE_ZONE(gcdHEADER_LEVEL, _GC_OBJ_ZONE, \
+                  "--%s(%d): status=%d", \
+                  __FUNCTION__, __LINE__, status)
+
+#define gcmFOOTER_NO() \
+    gcmTRACE_ZONE(gcdHEADER_LEVEL, _GC_OBJ_ZONE, \
+                  "--%s(%d)", __FUNCTION__, __LINE__)
+
+#if gcdHAS_ELLIPSES
+#   define gcmFOOTER_ARG(Text, ...) \
+        gcmTRACE_ZONE(gcdHEADER_LEVEL, _GC_OBJ_ZONE, \
+                      "--%s(%d): " Text, \
+                      __FUNCTION__, __LINE__, __VA_ARGS__)
+#else
+    gcmINLINE static void
+    __dummy_footer_arg(
+        IN gctCONST_STRING Text,
+        ...
+        )
+    {
+    }
+#   define gcmFOOTER_ARG                __dummy_footer_arg
+#endif
+
+#define gcmkHEADER() \
+    gcmkTRACE_ZONE(gcdHEADER_LEVEL, _GC_OBJ_ZONE, \
+                   "++%s(%d)", __FUNCTION__, __LINE__)
+
+#if gcdHAS_ELLIPSES
+#   define gcmkHEADER_ARG(Text, ...) \
+        gcmkTRACE_ZONE(gcdHEADER_LEVEL, _GC_OBJ_ZONE, \
+                       "++%s(%d): " Text, __FUNCTION__, __LINE__, __VA_ARGS__)
+#else
+    gcmINLINE static void
+    __dummy_kheader_arg(
+        IN gctCONST_STRING Text,
+        ...
+        )
+    {
+    }
+#   define gcmkHEADER_ARG               __dummy_kheader_arg
+#endif
+
+#define gcmkFOOTER() \
+    gcmkTRACE_ZONE(gcdHEADER_LEVEL, _GC_OBJ_ZONE, \
+                   "--%s(%d): status=%d", \
+                   __FUNCTION__, __LINE__, status)
+
+#define gcmkFOOTER_NO() \
+    gcmkTRACE_ZONE(gcdHEADER_LEVEL, _GC_OBJ_ZONE, \
+                   "--%s(%d)", __FUNCTION__, __LINE__)
+
+#if gcdHAS_ELLIPSES
+#   define gcmkFOOTER_ARG(Text, ...) \
+        gcmkTRACE_ZONE(gcdHEADER_LEVEL, _GC_OBJ_ZONE, \
+                       "--%s(%d): " Text, \
+                       __FUNCTION__, __LINE__, __VA_ARGS__)
+#else
+    gcmINLINE static void
+    __dummy_kfooter_arg(
+        IN gctCONST_STRING Text,
+        ...
+        )
+    {
+    }
+#   define gcmkFOOTER_ARG               __dummy_kfooter_arg
+#endif
+
+#define gcmOPT_VALUE(ptr)           (((ptr) == gcvNULL) ? 0 : *(ptr))
+#define gcmOPT_POINTER(ptr)         (((ptr) == gcvNULL) ? gcvNULL : *(ptr))
+
+void
+gcoOS_Print(
+    IN gctCONST_STRING Message,
+    ...
+    );
+void
+gckOS_Print(
+    IN gctCONST_STRING Message,
+    ...
+    );
+#define gcmPRINT                gcoOS_Print
+#define gcmkPRINT               gckOS_Print
+
+/*******************************************************************************
+**
+**  gcmDUMP
+**
+**      Print a dump message.
+**
+**  ARGUMENTS:
+**
+**      gctSTRING   Message.
+**
+**      ...         Optional arguments.
+*/
+
+#if gcdDUMP
+gceSTATUS
+gcfDump(
+    IN gcoOS Os,
+    IN gctCONST_STRING String,
+    ...
+    );
+#  define gcmDUMP               gcfDump
+#elif gcdHAS_ELLIPSES
+#  define gcmDUMP(...)
+#else
+    gcmINLINE static void
+    __dummy_dump(
+        IN gcoOS Os,
+        IN gctCONST_STRING Message,
+        ...
+        )
+    {
+    }
+#  define gcmDUMP               __dummy_dump
+#endif
+
+/*******************************************************************************
+**
+**  gcmDUMP_DATA
+**
+**      Add data to the dump.
+**
+**  ARGUMENTS:
+**
+**      gctSTRING Tag
+**          Tag for dump.
+**
+**      gctPOINTER Logical
+**          Logical address of buffer.
+**
+**      gctSIZE_T Bytes
+**          Number of bytes.
+*/
+
+#if gcdDUMP
+geSTATUS
+gcfDumpData(
+    IN gcoOS Os,
+    IN gctSTRING Tag,
+    IN gctPOINTER Logical,
+    IN gctSIZE_T Bytes
+    );
+#  define gcmDUMP_DATA          gcfDumpData
+#elif gcdHAS_ELLIPSES
+#  define gcmDUMP_DATA(...)
+#else
+    gcmINLINE static void
+    __dummy_dump_data(
+        IN gcoOS Os,
+        IN gctSTRING Tag,
+        IN gctPOINTER Logical,
+        IN gctSIZE_T Bytes
+        )
+    {
+    }
+#  define gcmDUMP_DATA          __dummy_dump_data
+#endif
+
+/*******************************************************************************
+**
+**  gcmDUMP_BUFFER
+**
+**      Print a buffer to the dump.
+**
+**  ARGUMENTS:
+**
+**      gctSTRING Tag
+**          Tag for dump.
+**
+**      gctUINT32 Physical
+**          Physical address of buffer.
+**
+**      gctPOINTER Logical
+**          Logical address of buffer.
+**
+**      gctUINT32 Offset
+**          Offset into buffer.
+**
+**      gctSIZE_T Bytes
+**          Number of bytes.
+*/
+
+#if gcdDUMP
+void gcfDumpBuffer(
+    IN gcoOS Os,
+    IN gctSTRING Tag,
+    IN gctUINT32 Physical,
+    IN gctPOINTER Logical,
+    IN gctUINT32 Offset,
+    IN gctSIZE_T Bytes
+    );
+#   define gcmDUMP_BUFFER       gcfDumpBuffer
+#elif gcdHAS_ELLIPSES
+#   define gcmDUMP_BUFFER(...)
+#else
+    gcmINLINE static void
+    __dummy_dump_buffer(
+        IN gcoOS Os,
+        IN gctSTRING Tag,
+        IN gctUINT32 Physical,
+        IN gctPOINTER Logical,
+        IN gctUINT32 Offset,
+        IN gctSIZE_T Bytes
+        )
+    {
+    }
+#   define gcmDUMP_BUFFER       __dummy_dump_buffer
+#endif
+
+/*******************************************************************************
+**
+**  gcmTRACE_RELEASE
+**
+**      Print a message to the shader debugger.
+**
+**  ARGUMENTS:
+**
+**      message Message.
+**      ...     Optional arguments.
+*/
+
+#define gcmTRACE_RELEASE                gcoOS_DebugShaderTrace
+
+void
+gcoOS_DebugShaderTrace(
+    IN gctCONST_STRING Message,
+    ...
+    );
+
+void
+gcoOS_SetDebugShaderFiles(
+    IN gctCONST_STRING VSFileName,
+    IN gctCONST_STRING FSFileName
+    );
+
+void
+gcoOS_SetDebugShaderFileType(
+    IN gctUINT32 ShaderType
+    );
+
+/*******************************************************************************
+**
+**  gcmBREAK
+**
+**      Break into the debugger.  In retail mode this macro does nothing.
+**
+**  ARGUMENTS:
+**
+**      None.
+*/
+
+void
+gcoOS_DebugBreak(
+    void
+    );
+
+void
+gckOS_DebugBreak(
+    void
+    );
+
+#if gcdDEBUG
+#   define gcmBREAK             gcoOS_DebugBreak
+#   define gcmkBREAK            gckOS_DebugBreak
+#else
+#   define gcmBREAK()
+#   define gcmkBREAK()
+#endif
+
+/*******************************************************************************
+**
+**  gcmASSERT
+**
+**      Evaluate an expression and break into the debugger if the expression
+**      evaluates to false.  In retail mode this macro does nothing.
+**
+**  ARGUMENTS:
+**
+**      exp     Expression to evaluate.
+*/
+#if gcdDEBUG
+#   define _gcmASSERT(prefix, exp) \
+        do \
+        { \
+            if (!(exp)) \
+            { \
+                prefix##TRACE(gcvLEVEL_ERROR, \
+                              #prefix "ASSERT at %s(%d) in " __FILE__, \
+                              __FUNCTION__, __LINE__); \
+                prefix##TRACE(gcvLEVEL_ERROR, \
+                              "(%s)", #exp); \
+                prefix##BREAK(); \
+            } \
+        } \
+        while (gcvFALSE)
+#   define gcmASSERT(exp)           _gcmASSERT(gcm, exp)
+#   define gcmkASSERT(exp)          _gcmASSERT(gcmk, exp)
+#else
+#   define gcmASSERT(exp)
+#   define gcmkASSERT(exp)
+#endif
+
+/*******************************************************************************
+**
+**  gcmVERIFY
+**
+**      Verify if an expression returns true.  If the expression does not
+**      evaluates to true, an assertion will happen in debug mode.
+**
+**  ARGUMENTS:
+**
+**      exp     Expression to evaluate.
+*/
+#if gcdDEBUG
+#   define gcmVERIFY(exp)           gcmASSERT(exp)
+#   define gcmkVERIFY(exp)          gcmkASSERT(exp)
+#else
+#   define gcmVERIFY(exp)           exp
+#   define gcmkVERIFY(exp)          exp
+#endif
+
+/*******************************************************************************
+**
+**  gcmVERIFY_OK
+**
+**      Verify a fucntion returns gcvSTATUS_OK.  If the function does not return
+**      gcvSTATUS_OK, an assertion will happen in debug mode.
+**
+**  ARGUMENTS:
+**
+**      func    Function to evaluate.
+*/
+
+void
+gcoOS_Verify(
+    IN gceSTATUS Status
+    );
+
+void
+gckOS_Verify(
+    IN gceSTATUS Status
+    );
+
+#if gcdDEBUG
+#   define gcmVERIFY_OK(func) \
+        do \
+        { \
+            gceSTATUS verifyStatus = func; \
+            gcoOS_Verify(verifyStatus); \
+            gcmASSERT(verifyStatus == gcvSTATUS_OK); \
+        } \
+        while (gcvFALSE)
+#   define gcmkVERIFY_OK(func) \
+        do \
+        { \
+            gceSTATUS verifyStatus = func; \
+            gckOS_Verify(verifyStatus); \
+            gcmkASSERT(verifyStatus == gcvSTATUS_OK); \
+        } \
+        while (gcvFALSE)
+#else
+#   define gcmVERIFY_OK(func)       func
+#   define gcmkVERIFY_OK(func)      func
+#endif
+
+/*******************************************************************************
+**
+**  gcmERR_BREAK
+**
+**      Executes a break statement on error.
+**
+**  ASSUMPTIONS:
+**
+**      'status' variable of gceSTATUS type must be defined.
+**
+**  ARGUMENTS:
+**
+**      func    Function to evaluate.
+*/
+#define _gcmERR_BREAK(prefix, func) \
+    status = func; \
+    if (gcmIS_ERROR(status)) \
+    { \
+        prefix##TRACE(gcvLEVEL_ERROR, \
+            #prefix "ERR_BREAK: status=%d @ %s(%d) in " __FILE__, \
+            status, __FUNCTION__, __LINE__); \
+        break; \
+    } \
+    do { } while (gcvFALSE)
+#define gcmERR_BREAK(func)          _gcmERR_BREAK(gcm, func)
+#define gcmkERR_BREAK(func)         _gcmERR_BREAK(gcmk, func)
+
+/*******************************************************************************
+**
+**  gcmERR_RETURN
+**
+**      Executes a return on error.
+**
+**  ASSUMPTIONS:
+**
+**      'status' variable of gceSTATUS type must be defined.
+**
+**  ARGUMENTS:
+**
+**      func    Function to evaluate.
+*/
+#define _gcmERR_RETURN(prefix, func) \
+    status = func; \
+    if (gcmIS_ERROR(status)) \
+    { \
+        prefix##TRACE(gcvLEVEL_ERROR, \
+            #prefix "ERR_RETURN: status=%d @ %s(%d) in " __FILE__, \
+            status, __FUNCTION__, __LINE__); \
+        return status; \
+    } \
+    do { } while (gcvFALSE)
+#define gcmERR_RETURN(func)         _gcmERR_RETURN(gcm, func)
+#define gcmkERR_RETURN(func)        _gcmERR_RETURN(gcmk, func)
+
+/*******************************************************************************
+**
+**  gcmONERROR
+**
+**      Jump to the error handler in case there is an error.
+**
+**  ASSUMPTIONS:
+**
+**      'status' variable of gceSTATUS type must be defined.
+**
+**  ARGUMENTS:
+**
+**      func    Function to evaluate.
+*/
+#define _gcmONERROR(prefix, func) \
+    do \
+    { \
+        status = func; \
+        if (gcmIS_ERROR(status)) \
+        { \
+            prefix##TRACE(gcvLEVEL_ERROR, \
+                #prefix "ONERROR: status=%d @ %s(%d) in " __FILE__, \
+                status, __FUNCTION__, __LINE__); \
+            goto OnError; \
+        } \
+    } \
+    while (gcvFALSE)
+#define gcmONERROR(func)            _gcmONERROR(gcm, func)
+#define gcmkONERROR(func)           _gcmONERROR(gcmk, func)
+
+/*******************************************************************************
+**
+**  gcmVERIFY_LOCK
+**
+**      Verifies whether the surface is locked.
+**
+**  ARGUMENTS:
+**
+**      surfaceInfo Pointer to the surface iniformational structure.
+*/
+#define gcmVERIFY_LOCK(surfaceInfo) \
+    if (!surfaceInfo->node.valid) \
+    { \
+        status = gcvSTATUS_MEMORY_UNLOCKED; \
+        break; \
+    } \
+    do { } while (gcvFALSE)
+
+/*******************************************************************************
+**
+**  gcmVERIFY_NODE_LOCK
+**
+**      Verifies whether the surface node is locked.
+**
+**  ARGUMENTS:
+**
+**      surfaceInfo Pointer to the surface iniformational structure.
+*/
+#define gcmVERIFY_NODE_LOCK(surfaceNode) \
+    if (!surfaceNode->valid) \
+    { \
+        status = gcvSTATUS_MEMORY_UNLOCKED; \
+        break; \
+    } \
+    do { } while (gcvFALSE)
+
+/*******************************************************************************
+**
+**  gcmBADOBJECT_BREAK
+**
+**      Executes a break statement on bad object.
+**
+**  ARGUMENTS:
+**
+**      obj     Object to test.
+**      t       Expected type of the object.
+*/
+#define gcmBADOBJECT_BREAK(obj, t) \
+    if ((obj == gcvNULL) \
+    ||  (((gcsOBJECT *)(obj))->type != t) \
+    ) \
+    { \
+        status = gcvSTATUS_INVALID_OBJECT; \
+        break; \
+    } \
+    do { } while (gcvFALSE)
+
+/*******************************************************************************
+**
+**  gcmCHECK_STATUS
+**
+**      Executes a break statement on error.
+**
+**  ASSUMPTIONS:
+**
+**      'status' variable of gceSTATUS type must be defined.
+**
+**  ARGUMENTS:
+**
+**      func    Function to evaluate.
+*/
+#define _gcmCHECK_STATUS(prefix, func) \
+    do \
+    { \
+        last = func; \
+        if (gcmIS_ERROR(last)) \
+        { \
+            prefix##TRACE(gcvLEVEL_ERROR, \
+                #prefix "CHECK_STATUS: status=%d @ %s(%d) in " __FILE__, \
+                last, __FUNCTION__, __LINE__); \
+            status = last; \
+        } \
+    } \
+    while (gcvFALSE)
+#define gcmCHECK_STATUS(func)       _gcmCHECK_STATUS(gcm, func)
+#define gcmkCHECK_STATUS(func)      _gcmCHECK_STATUS(gcmk, func)
+
+/*******************************************************************************
+**
+**  gcmVERIFY_ARGUMENT
+**
+**      Assert if an argument does not apply to the specified expression.  If
+**      the argument evaluates to false, gcvSTATUS_INVALID_ARGUMENT will be
+**      returned from the current function.  In retail mode this macro does
+**      nothing.
+**
+**  ARGUMENTS:
+**
+**      arg     Argument to evaluate.
+*/
+#ifndef EGL_API_ANDROID
+#   define _gcmVERIFY_ARGUMENT(prefix, arg) \
+       do \
+       { \
+           if (!(arg)) \
+           { \
+               prefix##TRACE(gcvLEVEL_ERROR, #prefix "VERIFY_ARGUMENT failed:"); \
+               prefix##ASSERT(arg); \
+               prefix##FOOTER_ARG("status=%d", gcvSTATUS_INVALID_ARGUMENT); \
+               return gcvSTATUS_INVALID_ARGUMENT; \
+           } \
+       } \
+       while (gcvFALSE)
+#   define gcmVERIFY_ARGUMENT(arg)     _gcmVERIFY_ARGUMENT(gcm, arg)
+#   define gcmkVERIFY_ARGUMENT(arg)    _gcmVERIFY_ARGUMENT(gcmk, arg)
+#else
+#   define gcmVERIFY_ARGUMENT(arg)
+#   define gcmkVERIFY_ARGUMENT(arg)
+#endif
+
+/*******************************************************************************
+**
+**  gcmVERIFY_ARGUMENT_RETURN
+**
+**      Assert if an argument does not apply to the specified expression.  If
+**      the argument evaluates to false, gcvSTATUS_INVALID_ARGUMENT will be
+**      returned from the current function.  In retail mode this macro does
+**      nothing.
+**
+**  ARGUMENTS:
+**
+**      arg     Argument to evaluate.
+*/
+#ifndef EGL_API_ANDROID
+#   define _gcmVERIFY_ARGUMENT_RETURN(prefix, arg, value) \
+       do \
+       { \
+           if (!(arg)) \
+           { \
+               prefix##TRACE(gcvLEVEL_ERROR, \
+                             #prefix "gcmVERIFY_ARGUMENT_RETURN failed:"); \
+               prefix##ASSERT(arg); \
+               prefix##FOOTER_ARG("value=%d", value); \
+               return value; \
+           } \
+       } \
+       while (gcvFALSE)
+#   define gcmVERIFY_ARGUMENT_RETURN(arg, value) \
+				_gcmVERIFY_ARGUMENT_RETURN(gcm, arg, value)
+#   define gcmkVERIFY_ARGUMENT_RETURN(arg, value) \
+				_gcmVERIFY_ARGUMENT_RETURN(gcmk, arg, value)
+#else
+#   define gcmVERIFY_ARGUMENT_RETURN(arg, value)
+#   define gcmkVERIFY_ARGUMENT_RETURN(arg, value)
+#endif
+void gcoOS_Log(IN unsigned int filter, IN char* msg,
+			...
+			);
+
+void gckOS_Log(IN unsigned int filter, IN char* msg,
+			...
+			);
+
+void gcoOS_SetLogFilter(IN unsigned int filter);
+
+
+ /*  Logging service  */
+#define _GFX_LOG_ERROR_         0x00000001
+#define _GFX_LOG_WARNING_       0x00000002
+#define _GFX_LOG_EGL_API_       0x00000004
+#define _GFX_LOG_NATIVE_API_    0x00000008
+#define _GFX_LOG_OES_API_       0x00000010
+#define _GFX_LOG_VG_API_        0x00000020
+#define _GFX_LOG_CONFIG_        0x00000040
+#define _GFX_LOG_INFO_          0x00000080
+#define _GFX_LOG_NOTIFY_        0x00000100
+#define _GFX_LOG_ALL_           0xffffffff
+
+
+#if MRVL_ENABLE_EGL_API_LOG
+#define EGL_API_LOG(x)		    gcoOS_Log x
+#else
+#define EGL_API_LOG(x)
+#endif
+#define EGL_LOG(x)              gcoOS_Log x
+
+
+#if MRVL_ENABLE_OES1_API_LOG
+#define OES11_API_LOG(x)		gcoOS_Log x
+#else
+#define OES11_API_LOG(x)
+#endif
+#define OES11_LOG(x)            gcoOS_Log x
+
+#if MRVL_ENABLE_OES2_API_LOG
+#define OES20_API_LOG(x)		gcoOS_Log x
+#else
+#define OES20_API_LOG(x)
+#endif
+#define OES20_LOG               gcoOS_Log x
+
+#if MRVL_ENABLE_OVG_API_LOG
+#define OVG_API_LOG(x)		    gcoOS_Log x
+#else
+#define OVG_API_LOG(x)
+#endif
+#define OVG_LOG(x)              gcoOS_Log x
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __gc_hal_base_h_ */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/aqHalDriver.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/aqHalDriver.h
@@ -0,0 +1,592 @@
+/****************************************************************************
+*
+*    Copyright (C) 2002 - 2008 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public Lisence as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+
+
+#ifndef __aqhaldriver_h_
+#define __aqhaldriver_h_
+
+#include "aqTypes.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/******************************************************************************\
+******************************* I/O Control Codes ******************************
+\******************************************************************************/
+
+#define gcvHAL_CLASS					"galcore"
+#define IOCTL_GCHAL_INTERFACE			30000
+#define IOCTL_GCHAL_KERNEL_INTERFACE	30001
+
+/******************************************************************************\
+********************************* Command Codes ********************************
+\******************************************************************************/
+
+typedef enum _gceHAL_COMMAND_CODES
+{
+	/* Generic query. */
+	gcvHAL_QUERY_VIDEO_MEMORY,
+	gcvHAL_QUERY_CHIP_IDENTITY,
+
+	/* Contigous memory. */
+	gcvHAL_ALLOCATE_NON_PAGED_MEMORY,
+	gcvHAL_FREE_NON_PAGED_MEMORY,
+	gcvHAL_ALLOCATE_CONTIGUOUS_MEMORY,
+	gcvHAL_FREE_CONTIGUOUS_MEMORY,
+
+	/* Video memory allocation. */
+	gcvHAL_ALLOCATE_VIDEO_MEMORY,			/* Enforced alignment. */
+	gcvHAL_ALLOCATE_LINEAR_VIDEO_MEMORY,	/* No alignment. */
+	gcvHAL_FREE_VIDEO_MEMORY,
+
+	/* Physical-to-logical mapping. */
+	gcvHAL_MAP_MEMORY,
+	gcvHAL_UNMAP_MEMORY,
+
+	/* Logical-to-physical mapping. */
+	gcvHAL_MAP_USER_MEMORY,
+	gcvHAL_UNMAP_USER_MEMORY,
+
+	/* Surface lock/unlock. */
+	gcvHAL_LOCK_VIDEO_MEMORY,
+	gcvHAL_UNLOCK_VIDEO_MEMORY,
+
+	/* Event queue. */
+#if USE_EVENT_QUEUE
+	gcvHAL_EVENT_COMMIT,
+#else
+	gcvHAL_EVENT,
+#endif
+
+	gcvHAL_USER_SIGNAL,
+	gcvHAL_SIGNAL,
+	gcvHAL_WRITE_DATA,
+
+	gcvHAL_COMMIT,
+	gcvHAL_STALL,
+
+    gcvHAL_READ_REGISTER,
+    gcvHAL_WRITE_REGISTER,
+
+	gcvHAL_GET_PROFILE_SETTING,
+	gcvHAL_SET_PROFILE_SETTING,
+
+    gcvHAL_READ_ALL_PROFILE_REGISTERS,
+	gcvHAL_PROFILE_REGISTERS_2D,
+
+    /* Power management. */
+    gcvHAL_SET_POWER_MANAGEMENT_STATE,
+    gcvHAL_QUERY_POWER_MANAGEMENT_STATE,
+
+	gcvHAL_GET_BASE_ADDRESS,
+
+	gcvHAL_SET_IDLE,
+
+	/* Queries. */
+	gcvHAL_QUERY_KERNEL_SETTINGS,
+
+	/* Reset. */
+	gcvHAL_RESET,
+}
+gceHAL_COMMAND_CODES;
+
+/******************************************************************************\
+****************************** Interface Structure *****************************
+\******************************************************************************/
+
+#define gcmMAX_PROFILE_FILE_NAME	128
+
+typedef struct _gcsHAL_INTERFACE
+{
+	/* Command code. */
+	gceHAL_COMMAND_CODES		command;
+
+	/* Status value. */
+	gceSTATUS					status;
+
+	/* Union of command structures. */
+	union _u
+	{
+		/* gcvHAL_GET_BASE_ADDRESS */
+		struct _gcsHAL_GET_BASE_ADDRESS
+		{
+			/* Physical memory address of internal memory. */
+			OUT gctUINT32				baseAddress;
+		}
+		GetBaseAddress;
+
+		/* gcvHAL_QUERY_VIDEO_MEMORY */
+		struct _gcsHAL_QUERY_VIDEO_MEMORY
+		{
+			/* Physical memory address of internal memory. */
+			OUT gctPHYS_ADDR			internalPhysical;
+
+			/* Size in bytes of internal memory.*/
+			OUT gctSIZE_T				internalSize;
+
+			/* Physical memory address of external memory. */
+			OUT gctPHYS_ADDR			externalPhysical;
+
+			/* Size in bytes of external memory.*/
+			OUT gctSIZE_T				externalSize;
+
+			/* Physical memory address of contiguous memory. */
+			OUT gctPHYS_ADDR			contiguousPhysical;
+
+			/* Size in bytes of contiguous memory.*/
+			OUT gctSIZE_T				contiguousSize;
+		}
+		QueryVideoMemory;
+
+		/* gcvHAL_QUERY_CHIP_IDENTITY */
+		struct _gcsHAL_QUERY_CHIP_IDENTITY
+		{
+
+			/* Chip model. */
+			OUT gceCHIPMODEL			chipModel;
+
+			/* Revision value.*/
+			OUT gctUINT32				chipRevision;
+
+			/* Supported feature fields. */
+			OUT gctUINT32				chipFeatures;
+
+			/* Supported minor feature fields. */
+			OUT gctUINT32				chipMinorFeatures;
+
+			/* Number of streams supported. */
+			OUT gctUINT32				streamCount;
+
+			/* Total number of temporary registers per thread. */
+			OUT gctUINT32				registerMax;
+
+			/* Maximum number of threads. */
+			OUT gctUINT32				threadCount;
+
+			/* Number of shader cores. */
+			OUT gctUINT32				shaderCoreCount;
+
+			/* Size of the vertex cache. */
+			OUT gctUINT32				vertexCacheSize;
+
+			/* Number of entries in the vertex output buffer. */
+			OUT gctUINT32				vertexOutputBufferSize;
+		}
+		QueryChipIdentity;
+
+		/* gcvHAL_MAP_MEMORY */
+		struct _gcsHAL_MAP_MEMORY
+		{
+			/* Physical memory address to map. */
+			IN gctPHYS_ADDR				physical;
+
+			/* Number of bytes in physical memory to map. */
+			IN gctSIZE_T				bytes;
+
+			/* Address of mapped memory. */
+			OUT gctPOINTER				logical;
+		}
+		MapMemory;
+
+		/* gcvHAL_UNMAP_MEMORY */
+		struct _gcsHAL_UNMAP_MEMORY
+		{
+			/* Physical memory address to unmap. */
+			IN gctPHYS_ADDR				physical;
+
+			/* Number of bytes in physical memory to unmap. */
+			IN gctSIZE_T				bytes;
+
+			/* Address of mapped memory to unmap. */
+			IN gctPOINTER				logical;
+		}
+		UnmapMemory;
+
+		/* gcvHAL_ALLOCATE_LINEAR_VIDEO_MEMORY */
+		struct _gcsHAL_ALLOCATE_LINEAR_VIDEO_MEMORY
+		{
+			/* Number of bytes to allocate. */
+			IN OUT gctUINT				bytes;
+
+			/* Buffer alignment. */
+			IN gctUINT					alignment;
+
+			/* Type of allocation. */
+			IN gceSURF_TYPE				type;
+
+			/* Memory pool to allocate from. */
+			IN OUT gcePOOL				pool;
+
+			/* Allocated video memory. */
+			OUT gcuVIDMEM_NODE_PTR		node;
+		}
+		AllocateLinearVideoMemory;
+
+		/* gcvHAL_ALLOCATE_VIDEO_MEMORY */
+		struct _gcsHAL_ALLOCATE_VIDEO_MEMORY
+		{
+			/* Width of rectangle to allocate. */
+			IN OUT gctUINT				width;
+
+			/* Height of rectangle to allocate. */
+			IN OUT gctUINT				height;
+
+			/* Depth of rectangle to allocate. */
+			IN gctUINT					depth;
+
+			/* Format rectangle to allocate in gceSURF_FORMAT. */
+			IN gceSURF_FORMAT			format;
+
+			/* Type of allocation. */
+			IN gceSURF_TYPE				type;
+
+			/* Memory pool to allocate from. */
+			IN OUT gcePOOL				pool;
+
+			/* Allocated video memory. */
+			OUT gcuVIDMEM_NODE_PTR		node;
+		}
+		AllocateVideoMemory;
+
+		/* gcvHAL_FREE_VIDEO_MEMORY */
+		struct _gcsHAL_FREE_VIDEO_MEMORY
+		{
+			/* Allocated video memory. */
+			IN gcuVIDMEM_NODE_PTR		node;
+		}
+		FreeVideoMemory;
+
+		/* gcvHAL_LOCK_VIDEO_MEMORY */
+		struct _gcsHAL_LOCK_VIDEO_MEMORY
+		{
+			/* Allocated video memory. */
+			IN gcuVIDMEM_NODE_PTR		node;
+
+			/* Hardware specific address. */
+			OUT gctUINT32				address;
+
+			/* Mapped logical address. */
+			OUT gctPOINTER				memory;
+		}
+		LockVideoMemory;
+
+		/* gcvHAL_UNLOCK_VIDEO_MEMORY */
+		struct _gcsHAL_UNLOCK_VIDEO_MEMORY
+		{
+			/* Allocated video memory. */
+			IN gcuVIDMEM_NODE_PTR		node;
+
+			/* Type of surface. */
+			IN gceSURF_TYPE				type;
+
+#if USE_EVENT_QUEUE
+			/* Flag to unlock surface asynchroneously. */
+			IN OUT gctBOOL				asynchroneous;
+#else
+			/* Size of local command buffer. */
+			IN OUT gctSIZE_T			commandSize;
+
+			/* Local command buffer. */
+			OUT gctUINT8				commands[32];
+#endif
+		}
+		UnlockVideoMemory;
+
+		/* gcvHAL_ALLOCATE_NON_PAGED_MEMORY */
+		struct _gcsHAL_ALLOCATE_NON_PAGED_MEMORY
+		{
+			/* Number of bytes to allocate. */
+			IN OUT gctSIZE_T			bytes;
+
+			/* Physical address of allocation. */
+			OUT gctPHYS_ADDR			physical;
+
+			/* Logical address of allocation. */
+			OUT gctPOINTER				logical;
+		}
+		AllocateNonPagedMemory;
+
+		/* gcvHAL_FREE_NON_PAGED_MEMORY */
+		struct _gcsHAL_FREE_NON_PAGED_MEMORY
+		{
+			/* Number of bytes allocated. */
+			IN gctSIZE_T				bytes;
+
+			/* Physical address of allocation. */
+			IN gctPHYS_ADDR				physical;
+
+			/* Logical address of allocation. */
+			IN gctPOINTER				logical;
+		}
+		FreeNonPagedMemory;
+
+#if USE_EVENT_QUEUE
+		/* gcvHAL_EVENT_COMMIT. */
+		struct _gcsHAL_EVENT_COMMIT
+		{
+			/* Event queue. */
+			IN struct _gcsQUEUE *		queue;
+		}
+		Event;
+#else
+		/* gcvHAL_EVENT */
+		struct _gcsHAL_EVENT
+		{
+			/* Event type. */
+			IN gceEVENT_TYPE			type;
+
+			/* Event data. */
+			IN gcuEVENT_DATA			data;
+
+			/* Size of local command buffer. */
+			IN OUT gctSIZE_T			commandSize;
+
+			/* Local command buffer. */
+			OUT gctUINT8				commands[32];
+		}
+		Event;
+#endif
+
+		/* gcvHAL_COMMIT */
+		struct _gcsHAL_COMMIT
+		{
+			/* Command buffer. */
+			IN gcoCMDBUF				commandBuffer;
+
+			/* Context buffer. */
+			IN gcoCONTEXT				contextBuffer;
+		}
+		Commit;
+
+		/* gcvHAL_MAP_USER_MEMORY */
+		struct _gcsHAL_MAP_USER_MEMORY
+		{
+			/* Base address of user memory to map. */
+			IN gctPOINTER				memory;
+
+			/* Size of user memory in bytes to map. */
+			IN gctSIZE_T				size;
+
+			/* Info record required by gcvHAL_UNMAP_USER_MEMORY. */
+			OUT gctPOINTER				info;
+
+			/* Physical address of mapped memory. */
+			OUT gctUINT32				address;
+		}
+		MapUserMemory;
+
+		/* gcvHAL_UNMAP_USER_MEMORY */
+		struct _gcsHAL_UNMAP_USER_MEMORY
+		{
+			/* Base address of user memory to unmap. */
+			IN gctPOINTER				memory;
+
+			/* Size of user memory in bytes to unmap. */
+			IN gctSIZE_T				size;
+
+			/* Info record returned by gcvHAL_MAP_USER_MEMORY. */
+			IN gctPOINTER				info;
+
+			/* Physical address of mapped memory as returned by
+			   gcvHAL_MAP_USER_MEMORY. */
+			IN gctUINT32				address;
+		}
+		UnmapUserMemory;
+
+#if !USE_NEW_LINUX_SIGNAL
+		/* gcsHAL_USER_SIGNAL  */
+		struct _gcsHAL_USER_SIGNAL
+		{
+			/* Command. */
+			gceUSER_SIGNAL_COMMAND_CODES command;
+
+			/* Signal ID. */
+			IN OUT gctINT				id;
+
+			/* Reset mode. */
+			IN gctBOOL					manualReset;
+
+			/* Wait timedout. */
+			IN gctUINT32				wait;
+
+			/* State. */
+			IN gctBOOL					state;
+		}
+		UserSignal;
+#endif
+
+		/* gcvHAL_SIGNAL. */
+		struct _gcsHAL_SIGNAL
+		{
+			/* Signal handle to signal. */
+			IN gctSIGNAL				signal;
+
+			/* Reserved. */
+			IN gctSIGNAL				auxSignal;
+
+			/* Process owning the signal. */
+			IN gctHANDLE				process;
+
+            /* Event generated from where of pipeline */
+            IN gceKERNEL_WHERE          fromWhere;
+		}
+		Signal;
+
+		/* gcvHAL_WRITE_DATA. */
+		struct _gcsHAL_WRITE_DATA
+		{
+			/* Address to write data to. */
+			IN gctUINT32				address;
+
+			/* Logical address in kernel to write data to. */
+			IN  gctPOINTER			kernelAddress;
+
+			/* Data to write. */
+			IN gctUINT32				data;
+		}
+		WriteData;
+
+		/* gcvHAL_ALLOCATE_CONTIGUOUS_MEMORY */
+		struct _gcsHAL_ALLOCATE_CONTIGUOUS_MEMORY
+		{
+			/* Number of bytes to allocate. */
+			IN OUT gctSIZE_T			bytes;
+
+			/* Physical address of allocation. */
+			OUT gctPHYS_ADDR			physical;
+
+			/* Logical address of allocation. */
+			OUT gctPOINTER				logical;
+		}
+		AllocateContiguousMemory;
+
+		/* gcvHAL_FREE_CONTIGUOUS_MEMORY */
+		struct _gcsHAL_FREE_CONTIGUOUS_MEMORY
+		{
+			/* Number of bytes allocated. */
+			IN gctSIZE_T				bytes;
+
+			/* Physical address of allocation. */
+			IN gctPHYS_ADDR				physical;
+
+			/* Logical address of allocation. */
+			IN gctPOINTER				logical;
+		}
+		FreeContiguousMemory;
+
+        /* gcvHAL_READ_REGISTER */
+	    struct _gcsHAL_READ_REGISTER
+	    {
+		    /* Logical address of memory to write data to. */
+		    IN gctUINT32			address;
+
+		    /* Data read. */
+		    OUT gctUINT32			data;
+	    }
+	    ReadRegisterData;
+
+        /* gcvHAL_WRITE_REGISTER */
+	    struct _gcsHAL_WRITE_REGISTER
+	    {
+		    /* Logical address of memory to write data to. */
+		    IN gctUINT32			address;
+
+		    /* Data read. */
+		    IN gctUINT32			data;
+	    }
+	    WriteRegisterData;
+
+		/* gcvHAL_GET_PROFILE_SETTING */
+		struct _gcsHAL_GET_PROFILE_SETTING
+		{
+			/* Enable profiling */
+			OUT gctBOOL				enable;
+
+			/* The profile file name */
+			OUT gctCHAR				fileName[gcmMAX_PROFILE_FILE_NAME];
+		}
+		GetProfileSetting;
+
+		/* gcvHAL_SET_PROFILE_SETTING */
+		struct _gcsHAL_SET_PROFILE_SETTING
+		{
+			/* Enable profiling */
+			IN gctBOOL				enable;
+
+			/* The profile file name */
+			IN gctCHAR				fileName[gcmMAX_PROFILE_FILE_NAME];
+		}
+		SetProfileSetting;
+
+        /* gcvHAL_READ_ALL_PROFILE_REGISTERS */
+        struct _gcsHAL_READ_ALL_PROFILE_REGISTERS
+        {
+		    /* Data read. */
+			OUT struct _gcoHWProfile		hwProfile;
+        }
+        RegisterProfileData;
+
+        /* gcvHAL_PROFILE_REGISTERS_2D */
+        struct _gcsHAL_PROFILE_REGISTERS_2D
+        {
+		    /* Data read. */
+		    OUT gco2D_PROFILE_PTR hwProfile2D;
+        }
+        RegisterProfileData2D;
+
+        /* Power management. */
+        /* gcvHAL_SET_POWER_MANAGEMENT_STATE */
+        struct _gcsHAL_SET_POWER_MANAGEMENT
+        {
+		    /* Data read. */
+		    IN gceCHIPPOWERSTATE state;
+        }
+        SetPowerManagement;
+
+        /* gcvHAL_QUERY_POWER_MANAGEMENT_STATE */
+        struct _gcsHAL_QUERY_POWER_MANAGEMENT
+        {
+		    /* Data read. */
+		    OUT gceCHIPPOWERSTATE state;
+        }
+        QueryPowerManagement;
+
+		/* gcvHAL_QUERY_KERNEL_SETTINGS */
+		struct _gcsHAL_QUERY_KERNEL_SETTINGS
+		{
+			/* Settings.*/
+			OUT gcsKERNEL_SETTINGS settings;
+		}
+		QueryKernelSettings;
+    }
+	u;
+}
+gcsHAL_INTERFACE;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __aqhaldriver_h_ */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/aqHalUser.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/aqHalUser.h
@@ -0,0 +1,2220 @@
+/****************************************************************************
+*
+*    Copyright (C) 2002 - 2008 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public Lisence as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+/*
+ * Include file for the user HAL layer.
+ */
+
+#ifndef __aqhaluser_h_
+#define __aqhaluser_h_
+
+#include "aqHal.h"
+#include "aqHalDriver.h"
+#include "aqHalEnum.h"
+#include "gcDump.h"
+
+#include "gcHAL_Base.h"
+#include "gcHAL_2D.h"
+
+#include "gcHAL_3D.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/******************************************************************************\
+******************************* Multicast values *******************************
+\******************************************************************************/
+
+/* Value types. */
+typedef enum _gceVALUE_TYPE
+{
+	gcvVALUE_UINT,
+	gcvVALUE_FIXED,
+	gcvVALUE_FLOAT,
+}
+gceVALUE_TYPE;
+
+/* Value unions. */
+typedef union _gcuVALUE
+{
+	gctUINT						uintValue;
+	gctFIXED_POINT				fixedValue;
+	gctFLOAT					floatValue;
+}
+gcuVALUE;
+
+/******************************************************************************\
+******************************* Fixed Point Math *******************************
+\******************************************************************************/
+
+#define gcmXMultiply(x1, x2) \
+	(gctFIXED_POINT) (((gctINT64) (x1) * (x2)) >> 16)
+
+#define gcmXDivide(x1, x2) \
+	(gctFIXED_POINT) ((((gctINT64) (x1)) << 16) / (x2))
+
+#define gcmXMultiplyDivide(x1, x2, x3) \
+	(gctFIXED_POINT) ((gctINT64) (x1) * (x2) / (x3))
+
+/******************************************************************************\
+***************************** gcsSAMPLES Structure *****************************
+\******************************************************************************/
+
+typedef struct _gcsSAMPLES
+{
+	gctUINT8 x;
+	gctUINT8 y;
+}
+gcsSAMPLES;
+
+/******************************************************************************\
+****************************** Object Declarations *****************************
+\******************************************************************************/
+
+typedef struct _gcoBUFFER *				gcoBUFFER;
+typedef struct _gcoDUMP *				gcoDUMP;
+
+/******************************************************************************\
+********************************** gcoHAL Object ********************************
+\******************************************************************************/
+
+gceSTATUS
+gcoHAL_GetDump(
+	IN gcoHAL Hal,
+	OUT gcoDUMP * Dump
+	);
+
+/* Call the kernel HAL layer. */
+gceSTATUS
+gcoHAL_Call(
+	IN gcoHAL Hal,
+	IN OUT gcsHAL_INTERFACE * Interface
+	);
+
+/* Schedule an event. */
+gceSTATUS
+gcoHAL_ScheduleEvent(
+	IN gcoHAL Hal,
+	IN OUT gcsHAL_INTERFACE * Interface
+	);
+
+/******************************************************************************\
+******************************* gcoHARDWARE Object ******************************
+\******************************************************************************/
+
+
+
+/*----------------------------------------------------------------------------*/
+/*----------------------------- gcoHARDWARE Common ----------------------------*/
+
+/* Verify whether the specified feature is available in hardware. */
+gctBOOL
+gcoHARDWARE_IsFeatureAvailable(
+    IN gcoHARDWARE Hardware,
+	IN gceFEATURE Feature
+    );
+
+/* Select a graphics pipe. */
+gceSTATUS
+gcoHARDWARE_SelectPipe(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT8 Pipe
+	);
+
+/* Flush the current graphics pipe. */
+gceSTATUS
+gcoHARDWARE_FlushPipe(
+	IN gcoHARDWARE Hardware
+	);
+
+/* Send semaphore down the current pipe. */
+gceSTATUS
+gcoHARDWARE_Semaphore(
+	IN gcoHARDWARE Hardware,
+	IN gceWHERE From,
+	IN gceWHERE To,
+	IN gceHOW How
+	);
+
+/* Load a number of load states. */
+gceSTATUS
+gcoHARDWARE_LoadState(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 Address,
+	IN gctSIZE_T Count,
+	IN gctPOINTER States
+	);
+
+/* Load a number of load states. */
+gceSTATUS
+gcoHARDWARE_LoadStateBuffer(
+	IN gcoHARDWARE Hardware,
+	IN gctCONST_POINTER StateBuffer,
+	IN gctSIZE_T Bytes
+	);
+
+/* Load a number of load states in fixed-point (3D pipe). */
+gceSTATUS
+gcoHARDWARE_LoadStateX(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 Address,
+	IN gctSIZE_T Count,
+	IN gctPOINTER States
+	);
+
+/* Load a number of load states in floating-point (3D pipe). */
+gceSTATUS
+gcoHARDWARE_LoadStateF(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 Address,
+	IN gctSIZE_T Count,
+	IN gctPOINTER States
+	);
+
+/* Load one 32-bit load state. */
+gceSTATUS
+gcoHARDWARE_LoadState32(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 Address,
+	IN gctUINT32 Data
+	);
+
+/* Load one 32-bit load state. */
+gceSTATUS
+gcoHARDWARE_LoadState32x(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 Address,
+	IN gctFIXED_POINT Data
+	);
+
+/* Load one 64-bit load state. */
+gceSTATUS
+gcoHARDWARE_LoadState64(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 Address,
+	IN gctUINT64 Data
+	);
+
+/* Commit the current command buffer. */
+gceSTATUS
+gcoHARDWARE_Commit(
+	IN gcoHARDWARE Hardware
+	);
+
+/* Stall the pipe. */
+gceSTATUS
+gcoHARDWARE_Stall(
+	IN gcoHARDWARE Hardware
+	);
+
+/* Resolve. */
+gceSTATUS
+gcoHARDWARE_ResolveRect(
+	IN gcoHARDWARE Hardware,
+	IN gcsSURF_INFO_PTR SrcInfo,
+	IN gcsSURF_INFO_PTR DestInfo,
+	IN gcsPOINT_PTR SrcOrigin,
+	IN gcsPOINT_PTR DestOrigin,
+	IN gcsPOINT_PTR RectSize
+	);
+
+/* Resolve depth buffer. */
+gceSTATUS
+gcoHARDWARE_ResolveDepth(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 SrcTileStatusAddress,
+	IN gcsSURF_INFO_PTR SrcInfo,
+	IN gcsSURF_INFO_PTR DestInfo,
+	IN gcsPOINT_PTR SrcOrigin,
+	IN gcsPOINT_PTR DestOrigin,
+	IN gcsPOINT_PTR RectSize
+	);
+
+/* Query the tile size of the given surface. */
+gceSTATUS
+gcoHARDWARE_GetSurfaceTileSize(
+	IN gcsSURF_INFO_PTR Surface,
+	OUT gctINT32 * TileWidth,
+	OUT gctINT32 * TileHeight
+	);
+
+/* Query tile sizes. */
+gceSTATUS
+gcoHARDWARE_QueryTileSize(
+	OUT gctINT32 * TileWidth2D,
+	OUT gctINT32 * TileHeight2D,
+	OUT gctINT32 * TileWidth3D,
+	OUT gctINT32 * TileHeight3D,
+	OUT gctUINT32 * StrideAlignment
+	);
+
+/* Get tile status sizes for a surface. */
+gceSTATUS
+gcoHARDWARE_QueryTileStatus(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT Width,
+	IN gctUINT Height,
+	IN gctSIZE_T Bytes,
+	OUT gctSIZE_T_PTR Size,
+	OUT gctUINT_PTR Alignment,
+	OUT gctUINT32_PTR Filler
+	);
+
+/* Enable tile status for a surface. */
+gceSTATUS
+gcoHARDWARE_EnableTileStatus(
+	IN gcoHARDWARE Hardware,
+	IN gcsSURF_INFO_PTR Surface,
+	IN gctUINT32 TileStatusAddress,
+	IN gcsSURF_NODE_PTR HzTileStatus
+	);
+
+/* Disable tile status for a surface. */
+gceSTATUS
+gcoHARDWARE_DisableTileStatus(
+	IN gcoHARDWARE Hardware,
+	IN gcsSURF_INFO_PTR Surface,
+	IN gctBOOL CpuAccess
+	);
+
+/* Flush tile status cache. */
+gceSTATUS
+gcoHARDWARE_FlushTileStatus(
+	IN gcoHARDWARE Hardware,
+	IN gcsSURF_INFO_PTR Surface,
+	IN gctBOOL Decompress
+	);
+
+typedef enum _gceTILE_STATUS_CONTROL
+{
+	gcvTILE_STATUS_PAUSE,
+	gcvTILE_STATUS_RESUME,
+}
+gceTILE_STATUS_CONTROL;
+
+/* Pause or resume tile status. */
+gceSTATUS gcoHARDWARE_PauseTileStatus(
+	IN gcoHARDWARE Hardware,
+	IN gceTILE_STATUS_CONTROL Control
+	);
+
+/* Lock a surface. */
+gceSTATUS
+gcoHARDWARE_Lock(
+	IN gcoHARDWARE Hardware,
+	IN gcsSURF_NODE_PTR Node,
+	OUT gctUINT32 * Address,
+	OUT gctPOINTER * Memory
+	);
+
+/* Unlock a surface. */
+gceSTATUS
+gcoHARDWARE_Unlock(
+	IN gcoHARDWARE Hardware,
+	IN gcsSURF_NODE_PTR Node,
+	IN gceSURF_TYPE Type
+	);
+
+/* Call kernel for event. */
+gceSTATUS
+gcoHARDWARE_CallEvent(
+	IN gcoHARDWARE Hardware,
+	IN OUT gcsHAL_INTERFACE * Interface
+	);
+
+/* Schedule destruction for the specified video memory node. */
+gceSTATUS
+gcoHARDWARE_ScheduleVideoMemory(
+	IN gcoHARDWARE Hardware,
+	IN gcsSURF_NODE_PTR Node
+	);
+
+/* Allocate a temporary surface with specified parameters. */
+gceSTATUS
+gcoHARDWARE_AllocateTemporarySurface(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT Width,
+	IN gctUINT Height,
+	IN gcsSURF_FORMAT_INFO_PTR Format,
+	IN gceSURF_TYPE Type
+	);
+
+/* Free the temporary surface. */
+gceSTATUS
+gcoHARDWARE_FreeTemporarySurface(
+	IN gcoHARDWARE Hardware,
+	IN gctBOOL Synchronized
+	);
+
+/* Convert pixel format. */
+gceSTATUS
+gcoHARDWARE_ConvertPixel(
+	IN gcoHARDWARE Hardware,
+	IN gctPOINTER SrcPixel,
+	OUT gctPOINTER TrgPixel,
+	IN gctUINT SrcBitOffset,
+	IN gctUINT TrgBitOffset,
+	IN gcsSURF_FORMAT_INFO_PTR SrcFormat,
+	IN gcsSURF_FORMAT_INFO_PTR TrgFormat,
+	IN gcsBOUNDARY_PTR SrcBoundary,
+	IN gcsBOUNDARY_PTR TrgBoundary
+	);
+
+/* Copy a rectangular area with format conversion. */
+gceSTATUS
+gcoHARDWARE_CopyPixels(
+	IN gcoHARDWARE Hardware,
+	IN gcsSURF_INFO_PTR Source,
+	IN gcsSURF_INFO_PTR Target,
+	IN gctINT SourceX,
+	IN gctINT SourceY,
+	IN gctINT TargetX,
+	IN gctINT TargetY,
+	IN gctINT Width,
+	IN gctINT Height
+	);
+
+/* Enable or disable anti-aliasing. */
+gceSTATUS
+gcoHARDWARE_SetAntiAlias(
+	IN gcoHARDWARE Hardware,
+	IN gctBOOL Enable
+	);
+
+/* Write data into the command buffer. */
+gceSTATUS
+gcoHARDWARE_WriteBuffer(
+	IN gcoHARDWARE Hardware,
+	IN gctCONST_POINTER Data,
+	IN gctSIZE_T Bytes,
+	IN gctBOOL Aligned
+	);
+
+/* Convert RGB8 color value to YUV color space. */
+void gcoHARDWARE_RGB2YUV(
+	gctUINT8 R,
+	gctUINT8 G,
+	gctUINT8 B,
+	gctUINT8_PTR Y,
+	gctUINT8_PTR U,
+	gctUINT8_PTR V
+	);
+
+/* Convert YUV color value to RGB8 color space. */
+void gcoHARDWARE_YUV2RGB(
+	gctUINT8 Y,
+	gctUINT8 U,
+	gctUINT8 V,
+	gctUINT8_PTR R,
+	gctUINT8_PTR G,
+	gctUINT8_PTR B
+	);
+
+/*----------------------------------------------------------------------------*/
+/*----------------------- gcoHARDWARE Fragment Processor ---------------------*/
+
+/* Set the fragment processor configuration. */
+gceSTATUS
+gcoHARDWARE_SetFragmentConfiguration(
+	IN gcoHARDWARE Hardware,
+	IN gctBOOL ColorFromStream,
+	IN gctBOOL EnableFog,
+	IN gctBOOL EnableSmoothPoint,
+	IN gctUINT32 ClipPlanes
+	);
+
+/* Enable/disable texture stage operation. */
+gceSTATUS
+gcoHARDWARE_EnableTextureStage(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Stage,
+	IN gctBOOL Enable
+	);
+
+/* Program the channel enable masks for the color texture function. */
+gceSTATUS
+gcoHARDWARE_SetTextureColorMask(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Stage,
+	IN gctBOOL ColorEnabled,
+	IN gctBOOL AlphaEnabled
+	);
+
+/* Program the channel enable masks for the alpha texture function. */
+gceSTATUS
+gcoHARDWARE_SetTextureAlphaMask(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Stage,
+	IN gctBOOL ColorEnabled,
+	IN gctBOOL AlphaEnabled
+	);
+
+/* Program the constant fragment color. */
+gceSTATUS
+gcoHARDWARE_SetFragmentColorX(
+	IN gcoHARDWARE Hardware,
+	IN gctFIXED_POINT Red,
+	IN gctFIXED_POINT Green,
+	IN gctFIXED_POINT Blue,
+	IN gctFIXED_POINT Alpha
+	);
+
+gceSTATUS
+gcoHARDWARE_SetFragmentColorF(
+	IN gcoHARDWARE Hardware,
+	IN gctFLOAT Red,
+	IN gctFLOAT Green,
+	IN gctFLOAT Blue,
+	IN gctFLOAT Alpha
+	);
+
+/* Program the constant fog color. */
+gceSTATUS
+gcoHARDWARE_SetFogColorX(
+	IN gcoHARDWARE Hardware,
+	IN gctFIXED_POINT Red,
+	IN gctFIXED_POINT Green,
+	IN gctFIXED_POINT Blue,
+	IN gctFIXED_POINT Alpha
+	);
+
+gceSTATUS
+gcoHARDWARE_SetFogColorF(
+	IN gcoHARDWARE Hardware,
+	IN gctFLOAT Red,
+	IN gctFLOAT Green,
+	IN gctFLOAT Blue,
+	IN gctFLOAT Alpha
+	);
+
+/* Program the constant texture color. */
+gceSTATUS
+gcoHARDWARE_SetTetxureColorX(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Stage,
+	IN gctFIXED_POINT Red,
+	IN gctFIXED_POINT Green,
+	IN gctFIXED_POINT Blue,
+	IN gctFIXED_POINT Alpha
+	);
+
+gceSTATUS
+gcoHARDWARE_SetTetxureColorF(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Stage,
+	IN gctFLOAT Red,
+	IN gctFLOAT Green,
+	IN gctFLOAT Blue,
+	IN gctFLOAT Alpha
+	);
+
+/* Configure color texture function. */
+gceSTATUS
+gcoHARDWARE_SetColorTextureFunction(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Stage,
+	IN gceTEXTURE_FUNCTION Function,
+	IN gceTEXTURE_SOURCE Source0,
+	IN gceTEXTURE_CHANNEL Channel0,
+	IN gceTEXTURE_SOURCE Source1,
+	IN gceTEXTURE_CHANNEL Channel1,
+	IN gceTEXTURE_SOURCE Source2,
+	IN gceTEXTURE_CHANNEL Channel2,
+	IN gctINT Scale
+	);
+
+/* Configure alpha texture function. */
+gceSTATUS
+gcoHARDWARE_SetAlphaTextureFunction(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Stage,
+	IN gceTEXTURE_FUNCTION Function,
+	IN gceTEXTURE_SOURCE Source0,
+	IN gceTEXTURE_CHANNEL Channel0,
+	IN gceTEXTURE_SOURCE Source1,
+	IN gceTEXTURE_CHANNEL Channel1,
+	IN gceTEXTURE_SOURCE Source2,
+	IN gceTEXTURE_CHANNEL Channel2,
+	IN gctINT Scale
+	);
+
+/*----------------------------------------------------------------------------*/
+/*------------------------------- gcoHARDWARE 2D ------------------------------*/
+
+/* Translate API source color format to its hardware value. */
+gceSTATUS
+gcoHARDWARE_TranslateSourceFormat(
+	IN gcoHARDWARE Hardware,
+	IN gceSURF_FORMAT APIValue,
+	OUT gctUINT32* HwValue,
+	OUT gctUINT32* HwSwizzleValue,
+	OUT gctUINT32* HwIsYUVValue
+	);
+
+/* Translate API destination color format to its hardware value. */
+gceSTATUS
+gcoHARDWARE_TranslateDestinationFormat(
+    IN gcoHARDWARE Hardware,
+	IN gceSURF_FORMAT APIValue,
+	OUT gctUINT32* HwValue,
+	OUT gctUINT32* HwSwizzleValue,
+	OUT gctUINT32* HwIsYUVValue
+	);
+
+/* Translate API pattern color format to its hardware value. */
+gceSTATUS
+gcoHARDWARE_TranslatePatternFormat(
+    IN gcoHARDWARE Hardware,
+	IN gceSURF_FORMAT APIValue,
+	OUT gctUINT32* HwValue,
+	OUT gctUINT32* HwSwizzleValue,
+	OUT gctUINT32* HwIsYUVValue
+	);
+
+/* Translate API transparency mode to its hardware value. */
+gceSTATUS
+gcoHARDWARE_TranslateTransparency(
+	IN gceSURF_TRANSPARENCY APIValue,
+	OUT gctUINT32* HwValue
+	);
+
+/* Translate SURF API transparency mode to PE 2.0 transparency values. */
+gceSTATUS
+gcoHARDWARE_TranslateSurfTransparency(
+	IN gceSURF_TRANSPARENCY APIValue,
+	OUT gctUINT32* srcTransparency,
+	OUT gctUINT32* dstTransparency,
+	OUT gctUINT32* patTransparency
+	);
+
+/* Translate API transparency mode to its PE 1.0 hardware value. */
+gceSTATUS
+gcoHARDWARE_TranslateTransparencies(
+	IN gcoHARDWARE	Hardware,
+	IN gctUINT32	srcTransparency,
+	IN gctUINT32	dstTransparency,
+	IN gctUINT32	patTransparency,
+	OUT gctUINT32*  HwValue
+	);
+
+/* Translate API transparency mode to its hardware value. */
+gceSTATUS
+gcoHARDWARE_TranslateSourceTransparency(
+	IN gce2D_TRANSPARENCY APIValue,
+	OUT gctUINT32 * HwValue
+	);
+
+/* Translate API transparency mode to its hardware value. */
+gceSTATUS
+gcoHARDWARE_TranslateDestinationTransparency(
+	IN gce2D_TRANSPARENCY APIValue,
+	OUT gctUINT32 * HwValue
+	);
+
+/* Translate API transparency mode to its hardware value. */
+gceSTATUS
+gcoHARDWARE_TranslatePatternTransparency(
+	IN gce2D_TRANSPARENCY APIValue,
+	OUT gctUINT32 * HwValue
+	);
+
+/* Translate API YUV Color mode to its hardware value. */
+gceSTATUS
+gcoHARDWARE_TranslateYUVColorMode(
+	IN	gce2D_YUV_COLOR_MODE APIValue,
+	OUT gctUINT32 * HwValue
+	);
+
+/* Translate API pixel color multiply mode to its hardware value. */
+gceSTATUS
+gcoHARDWARE_PixelColorMultiplyMode(
+	IN	gce2D_PIXEL_COLOR_MULTIPLY_MODE APIValue,
+	OUT gctUINT32 * HwValue
+	);
+
+/* Translate API global color multiply mode to its hardware value. */
+gceSTATUS
+gcoHARDWARE_GlobalColorMultiplyMode(
+	IN	gce2D_GLOBAL_COLOR_MULTIPLY_MODE APIValue,
+	OUT gctUINT32 * HwValue
+	);
+
+/* Translate API mono packing mode to its hardware value. */
+gceSTATUS
+gcoHARDWARE_TranslateMonoPack(
+	IN gceSURF_MONOPACK APIValue,
+	OUT gctUINT32* HwValue
+	);
+
+/* Translate API 2D command to its hardware value. */
+gceSTATUS
+gcoHARDWARE_TranslateCommand(
+	IN gce2D_COMMAND APIValue,
+	OUT gctUINT32* HwValue
+	);
+
+/* Translate API per-pixel alpha mode to its hardware value. */
+gceSTATUS
+gcoHARDWARE_TranslatePixelAlphaMode(
+	IN gceSURF_PIXEL_ALPHA_MODE APIValue,
+	OUT gctUINT32* HwValue
+	);
+
+/* Translate API global alpha mode to its hardware value. */
+gceSTATUS
+gcoHARDWARE_TranslateGlobalAlphaMode(
+	IN gceSURF_GLOBAL_ALPHA_MODE APIValue,
+	OUT gctUINT32* HwValue
+	);
+
+/* Translate API per-pixel color mode to its hardware value. */
+gceSTATUS
+gcoHARDWARE_TranslatePixelColorMode(
+	IN gceSURF_PIXEL_COLOR_MODE APIValue,
+	OUT gctUINT32* HwValue
+	);
+
+/* Translate API alpha factor mode to its hardware value. */
+gceSTATUS
+gcoHARDWARE_TranslateAlphaFactorMode(
+	IN	gcoHARDWARE Hardware,
+	IN	gceSURF_BLEND_FACTOR_MODE APIValue,
+	OUT gctUINT32_PTR HwValue
+	);
+
+/* Configure monochrome source. */
+gceSTATUS
+gcoHARDWARE_SetMonochromeSource(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT8 MonoTransparency,
+	IN gceSURF_MONOPACK DataPack,
+	IN gctBOOL CoordRelative,
+	IN gctUINT32 FgColor32,
+	IN gctUINT32 BgColor32
+	);
+
+/* Configure color source. */
+gceSTATUS
+gcoHARDWARE_SetColorSource(
+	IN gcoHARDWARE Hardware,
+	IN gcsSURF_INFO_PTR Surface,
+	IN gctBOOL CoordRelative
+	);
+
+/* Configure masked color source. */
+gceSTATUS
+gcoHARDWARE_SetMaskedSource(
+	IN gcoHARDWARE Hardware,
+	IN gcsSURF_INFO_PTR Surface,
+	IN gctBOOL CoordRelative,
+	IN gceSURF_MONOPACK MaskPack
+	);
+
+/* Setup the source rectangle. */
+gceSTATUS
+gcoHARDWARE_SetSource(
+	IN gcoHARDWARE Hardware,
+	IN gcsRECT_PTR SrcRect
+	);
+
+/* Setup the fraction of the source origin for filter blit. */
+gceSTATUS
+gcoHARDWARE_SetOriginFraction(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT16 HorFraction,
+	IN gctUINT16 VerFraction
+	);
+
+/* Load 256-entry color table for INDEX8 source surfaces. */
+gceSTATUS
+gcoHARDWARE_LoadPalette(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT FirstIndex,
+	IN gctUINT IndexCount,
+	IN gctPOINTER ColorTable,
+	IN gctBOOL ColorConvert
+	);
+
+/* Setup the source pixel swizzle. */
+gceSTATUS
+gcoHARDWARE_SetSourceSwizzle(
+	IN gcoHARDWARE Hardware,
+	IN gceSURF_SWIZZLE Swizzle
+	);
+
+/* Setup the source pixel UV swizzle. */
+gceSTATUS
+gcoHARDWARE_SetSourceSwizzleUV(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 SwizzleUV
+	);
+
+/* Setup the source global color value in ARGB8 format. */
+gceSTATUS
+gcoHARDWARE_SetSourceGlobalColor(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 Color
+	);
+
+/* Setup the target global color value in ARGB8 format. */
+gceSTATUS
+gcoHARDWARE_SetTargetGlobalColor(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 Color
+	);
+
+/* Setup the source and target pixel multiply modes. */
+gceSTATUS
+gcoHARDWARE_SetMultiplyModes(
+	IN gcoHARDWARE Hardware,
+	IN gce2D_PIXEL_COLOR_MULTIPLY_MODE SrcPremultiplySrcAlpha,
+	IN gce2D_PIXEL_COLOR_MULTIPLY_MODE DstPremultiplyDstAlpha,
+	IN gce2D_GLOBAL_COLOR_MULTIPLY_MODE SrcPremultiplyGlobalMode,
+	IN gce2D_PIXEL_COLOR_MULTIPLY_MODE DstDemultiplyDstAlpha
+	);
+
+/* Setup the source, target and pattern transparency modes. */
+gceSTATUS
+gcoHARDWARE_SetTransparencyModes(
+	IN gcoHARDWARE Hardware,
+	IN gce2D_TRANSPARENCY SrcTransparency,
+	IN gce2D_TRANSPARENCY DstTransparency,
+	IN gce2D_TRANSPARENCY PatTransparency
+	);
+
+/* Setup the source, target and pattern transparency modes.
+   Used only for have backward compatibility.
+*/
+gceSTATUS
+gcoHARDWARE_SetAutoTransparency(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT8 FgRop,
+	IN gctUINT8 BgRop
+	);
+
+/* Setup the source color key value in ARGB8 format. */
+gceSTATUS
+gcoHARDWARE_SetSourceColorKeyRange(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 ColorLow,
+	IN gctUINT32 ColorHigh,
+	IN gctBOOL ColorPack
+	);
+
+/* Setup the YUV color space mode. */
+gceSTATUS gcoHARDWARE_YUVColorMode(
+	IN gcoHARDWARE Hardware,
+	IN gce2D_YUV_COLOR_MODE  Mode
+	);
+
+/* Save mono colors for later programming. */
+gceSTATUS gcoHARDWARE_SaveMonoColors(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 FgColor,
+	IN gctUINT32 BgColor
+	);
+
+/* Save transparency color for later programming. */
+gceSTATUS gcoHARDWARE_SaveTransparencyColor(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 Color32
+	);
+
+/* Set clipping rectangle. */
+gceSTATUS
+gcoHARDWARE_SetClipping(
+	IN gcoHARDWARE Hardware,
+	IN gcsRECT_PTR Rect
+	);
+
+/* Configure destination. */
+gceSTATUS
+gcoHARDWARE_SetTarget(
+	IN gcoHARDWARE Hardware,
+	IN gcsSURF_INFO_PTR Surface
+	);
+
+/* Set the target color format. */
+gceSTATUS
+gcoHARDWARE_SetTargetFormat(
+	IN gcoHARDWARE Hardware,
+	IN gceSURF_FORMAT Format
+	);
+
+/* Setup the destination color key value in ARGB8 format. */
+gceSTATUS
+gcoHARDWARE_SetTargetColorKeyRange(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 ColorLow,
+	IN gctUINT32 ColorHigh
+	);
+
+/* Load solid (single) color pattern. */
+gceSTATUS
+gcoHARDWARE_LoadSolidColorPattern(
+	IN gcoHARDWARE Hardware,
+	IN gctBOOL ColorConvert,
+	IN gctUINT32 Color,
+	IN gctUINT64 Mask
+	);
+
+/* Load monochrome pattern. */
+gceSTATUS
+gcoHARDWARE_LoadMonochromePattern(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 OriginX,
+	IN gctUINT32 OriginY,
+	IN gctBOOL ColorConvert,
+	IN gctUINT32 FgColor,
+	IN gctUINT32 BgColor,
+	IN gctUINT64 Bits,
+	IN gctUINT64 Mask
+	);
+
+/* Load color pattern. */
+gceSTATUS
+gcoHARDWARE_LoadColorPattern(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 OriginX,
+	IN gctUINT32 OriginY,
+	IN gctUINT32 Address,
+	IN gceSURF_FORMAT Format,
+	IN gctUINT64 Mask
+	);
+
+/* Calculate stretch factor. */
+gctUINT32
+gcoHARDWARE_GetStretchFactor(
+	IN gctINT32 SrcSize,
+	IN gctINT32 DestSize
+	);
+
+/* Calculate the stretch factors. */
+gceSTATUS
+gcoHARDWARE_GetStretchFactors(
+	IN gcsRECT_PTR SrcRect,
+	IN gcsRECT_PTR DestRect,
+	OUT gctUINT32 * HorFactor,
+	OUT gctUINT32 * VerFactor
+	);
+
+/* Calculate and program the stretch factors. */
+gceSTATUS
+gcoHARDWARE_SetStretchFactors(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 HorFactor,
+	IN gctUINT32 VerFactor
+	);
+
+/* Determines the usage of 2D resources (source/pattern/destination). */
+void
+gcoHARDWARE_Get2DResourceUsage(
+	IN gctUINT8 FgRop,
+	IN gctUINT8 BgRop,
+	IN gctUINT32 Transparency,
+	OUT gctBOOL_PTR UseSource,
+	OUT gctBOOL_PTR UsePattern,
+	OUT gctBOOL_PTR UseDestination
+	);
+
+/* Set 2D clear color in A8R8G8B8 format. */
+gceSTATUS
+gcoHARDWARE_Set2DClearColor(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 Color,
+	IN gctBOOL ColorConvert
+	);
+
+/* Enable/disable 2D BitBlt mirrorring. */
+gceSTATUS
+gcoHARDWARE_SetBitBlitMirror(
+	IN gcoHARDWARE Hardware,
+	IN gctBOOL HorizontalMirror,
+	IN gctBOOL VerticalMirror
+	);
+
+/* Start a DE command. */
+gceSTATUS
+gcoHARDWARE_StartDE(
+	IN gcoHARDWARE Hardware,
+	IN gce2D_COMMAND Command,
+	IN gctUINT32 SrcRectCount,
+	IN gcsRECT_PTR SrcRect,
+	IN gctUINT32 DestRectCount,
+	IN gcsRECT_PTR DestRect,
+	IN gctUINT32 FgRop,
+	IN gctUINT32 BgRop
+	);
+
+/* Start a DE command to draw one or more Lines,
+   with a common or individual color. */
+gceSTATUS
+gcoHARDWARE_StartDELine(
+	IN gcoHARDWARE Hardware,
+	IN gce2D_COMMAND Command,
+	IN gctUINT32 RectCount,
+	IN gcsRECT_PTR DestRect,
+	IN gctUINT32 ColorCount,
+	IN gctUINT32_PTR Color32,
+	IN gctUINT32 FgRop,
+	IN gctUINT32 BgRop
+	);
+
+/* Start a DE command with a monochrome stream. */
+gceSTATUS
+gcoHARDWARE_StartDEStream(
+	IN gcoHARDWARE Hardware,
+	IN gcsRECT_PTR DestRect,
+	IN gctUINT32 FgRop,
+	IN gctUINT32 BgRop,
+	IN gctUINT32 StreamSize,
+	OUT gctPOINTER * StreamBits
+	);
+
+/* Set kernel size. */
+gceSTATUS
+gcoHARDWARE_SetKernelSize(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT8 HorKernelSize,
+	IN gctUINT8 VerKernelSize
+	);
+
+/* Set filter type. */
+gceSTATUS
+gcoHARDWARE_SetFilterType(
+	IN gcoHARDWARE Hardware,
+	IN gceFILTER_TYPE FilterType
+	);
+
+/* Set the filter kernel array by user. */
+gceSTATUS gcoHARDWARE_SetUserFilterKernel(
+	IN gcoHARDWARE Hardware,
+	IN gceFILTER_PASS_TYPE PassType,
+	IN gctUINT16_PTR KernelArray
+	);
+
+/* Select the pass(es) to be done for user defined filter. */
+gceSTATUS gcoHARDWARE_EnableUserFilterPasses(
+	IN gcoHARDWARE Hardware,
+	IN gctBOOL HorPass,
+	IN gctBOOL VerPass
+	);
+
+/* Frees the kernel weight array. */
+gceSTATUS
+gcoHARDWARE_FreeKernelArray(
+	IN gcoHARDWARE Hardware
+	);
+
+/* Frees the temporary buffer allocated by filter blit operation. */
+gceSTATUS
+gcoHARDWARE_FreeFilterBuffer(
+	IN gcoHARDWARE Hardware
+	);
+
+/* Filter blit. */
+gceSTATUS
+gcoHARDWARE_FilterBlit(
+	IN gcoHARDWARE Hardware,
+	IN gcsSURF_INFO_PTR SrcSurface,
+	IN gcsSURF_INFO_PTR DestSurface,
+	IN gcsRECT_PTR SrcRect,
+	IN gcsRECT_PTR DestRect,
+	IN gcsRECT_PTR DestSubRect
+	);
+
+/* Enable alpha blending engine in the hardware and disengage the ROP engine. */
+gceSTATUS
+gcoHARDWARE_EnableAlphaBlend(
+	IN gcoHARDWARE Hardware,
+	IN gceSURF_PIXEL_ALPHA_MODE SrcAlphaMode,
+	IN gceSURF_PIXEL_ALPHA_MODE DstAlphaMode,
+	IN gceSURF_GLOBAL_ALPHA_MODE SrcGlobalAlphaMode,
+	IN gceSURF_GLOBAL_ALPHA_MODE DstGlobalAlphaMode,
+	IN gceSURF_BLEND_FACTOR_MODE SrcFactorMode,
+	IN gceSURF_BLEND_FACTOR_MODE DstFactorMode,
+	IN gceSURF_PIXEL_COLOR_MODE SrcColorMode,
+	IN gceSURF_PIXEL_COLOR_MODE DstColorMode
+	);
+
+/* Disable alpha blending engine in the hardware and engage the ROP engine. */
+gceSTATUS
+gcoHARDWARE_DisableAlphaBlend(
+	IN gcoHARDWARE Hardware
+	);
+
+/* Set the GPU clock cycles, after which the idle 2D engine
+   will trigger a flush. */
+gceSTATUS
+gcoHARDWARE_SetAutoFlushCycles(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 Cycles
+	);
+
+gceSTATUS
+gcoHARDWARE_ColorConvertToARGB8(
+	IN gceSURF_FORMAT Format,
+	IN gctUINT32 NumColors,
+	IN gctUINT32_PTR Color,
+	OUT gctUINT32_PTR Color32
+	);
+
+gceSTATUS
+gcoHARDWARE_ColorConvertFromARGB8(
+	IN gceSURF_FORMAT Format,
+	IN gctUINT32 NumColors,
+	IN gctUINT32_PTR Color32,
+	OUT gctUINT32_PTR Color
+	);
+
+gceSTATUS
+gcoHARDWARE_ColorPackFromARGB8(
+	IN gceSURF_FORMAT Format,
+	IN gctUINT32 Color32,
+	OUT gctUINT32_PTR Color
+	);
+
+/*----------------------------------------------------------------------------*/
+/*------------------------------- gcoHARDWARE 3D ------------------------------*/
+
+/* Query if a surface is renderable or not. */
+gceSTATUS
+gcoHARDWARE_IsSurfaceRenderable(
+	IN gcoHARDWARE Hardware,
+	IN gcsSURF_INFO_PTR Surface
+	);
+
+/* Initialize the 3D hardware. */
+gceSTATUS
+gcoHARDWARE_Initialize3D(
+	IN gcoHARDWARE Hardware
+	);
+
+/* Query the OpenGL ES 2.0 capabilities. */
+gceSTATUS
+gcoHARDWARE_QueryOpenGL2(
+	OUT gctBOOL * OpenGL2
+	);
+
+/* Query the stream capabilities. */
+gceSTATUS
+gcoHARDWARE_QueryStreamCaps(
+	IN gcoHARDWARE Hardware,
+	OUT gctUINT * MaxAttributes,
+	OUT gctUINT * MaxStreamSize,
+	OUT gctUINT * NumberOfStreams,
+	OUT gctUINT * Alignment
+	);
+
+/* Flush the evrtex caches. */
+gceSTATUS
+gcoHARDWARE_FlushVertex(
+	IN gcoHARDWARE Hardware
+	);
+
+/* Flush the evrtex caches. */
+gceSTATUS
+gcoHARDWARE_FlushL2Cache(
+	IN gcoHARDWARE Hardware
+	);
+
+/* Query the index capabilities. */
+gceSTATUS
+gcoHARDWARE_QueryIndexCaps(
+	OUT gctBOOL * Index8,
+	OUT gctBOOL * Index16,
+	OUT gctBOOL * Index32,
+	OUT gctUINT * MaxIndex
+	);
+
+/* Query the target capabilities. */
+gceSTATUS
+gcoHARDWARE_QueryTargetCaps(
+	IN gcoHARDWARE Hardware,
+	OUT gctUINT * MaxWidth,
+	OUT gctUINT * MaxHeight,
+	OUT gctUINT * MultiTargetCount,
+	OUT gctUINT * MaxSamples
+	);
+
+/* Query the texture capabilities. */
+gceSTATUS
+gcoHARDWARE_QueryTextureCaps(
+	OUT gctUINT * MaxWidth,
+	OUT gctUINT * MaxHeight,
+	OUT gctUINT * MaxDepth,
+	OUT gctBOOL * Cubic,
+	OUT gctBOOL * NonPowerOfTwo,
+	OUT gctUINT * VertexSamplers,
+	OUT gctUINT * PixelSamplers
+	);
+
+/* Query the shader support. */
+gceSTATUS
+gcoHARDWARE_QueryShaderCaps(
+	OUT gctUINT * VertexUniforms,
+	OUT gctUINT * FragmentUniforms,
+	OUT gctUINT * Varyings
+	);
+
+gceSTATUS
+gcoHARDWARE_GetClosestTextureFormat(
+	IN gcoHARDWARE Hardware,
+	IN gceSURF_FORMAT InFormat,
+	OUT gceSURF_FORMAT* OutFormat
+	);
+
+/* Query the texture support. */
+gceSTATUS
+gcoHARDWARE_QueryTexture(
+	IN gceSURF_FORMAT Format,
+	IN gctUINT Level,
+	IN gctUINT Width,
+	IN gctUINT Height,
+	IN gctUINT Depth,
+	IN gctUINT Faces,
+	OUT gctUINT * WidthAlignment,
+	OUT gctUINT * HeightAlignment,
+	OUT gctSIZE_T * SliceSize
+	);
+
+/* Upload data into a texture. */
+gceSTATUS
+gcoHARDWARE_UploadTexture(
+	IN gcoHARDWARE Hardware,
+	IN gceSURF_FORMAT TargetFormat,
+	IN gctUINT32 Address,
+	IN gctPOINTER Logical,
+	IN gctUINT32 Offset,
+	IN gctINT TargetStride,
+	IN gctUINT X,
+	IN gctUINT Y,
+	IN gctUINT Width,
+	IN gctUINT Height,
+	IN gctCONST_POINTER Memory,
+	IN gctINT SourceStride,
+	IN gceSURF_FORMAT SourceFormat
+	);
+
+/* Flush the texture cache. */
+gceSTATUS
+gcoHARDWARE_FlushTexture(
+	IN gcoHARDWARE Hardware
+	);
+
+/* Set the texture addressing mode. */
+gceSTATUS
+gcoHARDWARE_SetTextureAddressingMode(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Sampler,
+	IN gceTEXTURE_WHICH Which,
+	IN gceTEXTURE_ADDRESSING Mode
+	);
+
+/* Set the unsigned integer texture border color. */
+gceSTATUS
+gcoHARDWARE_SetTextureBorderColor(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Sampler,
+	IN gctUINT Red,
+	IN gctUINT Green,
+	IN gctUINT Blue,
+	IN gctUINT Alpha
+	);
+
+/* Set the fixed point texture border color. */
+gceSTATUS
+gcoHARDWARE_SetTextureBorderColorX(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Sampler,
+	IN gctFIXED_POINT Red,
+	IN gctFIXED_POINT Green,
+	IN gctFIXED_POINT Blue,
+	IN gctFIXED_POINT Alpha
+	);
+
+/* Set the floating point texture border color. */
+gceSTATUS
+gcoHARDWARE_SetTextureBorderColorF(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Sampler,
+	IN gctFLOAT Red,
+	IN gctFLOAT Green,
+	IN gctFLOAT Blue,
+	IN gctFLOAT Alpha
+	);
+
+/* Set the texture minification filter. */
+gceSTATUS
+gcoHARDWARE_SetTextureMinFilter(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Sampler,
+	IN gceTEXTURE_FILTER Filter
+	);
+
+/* Set the texture magnification filter. */
+gceSTATUS
+gcoHARDWARE_SetTextureMagFilter(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Sampler,
+	IN gceTEXTURE_FILTER Filter
+	);
+
+/* Set the texture mip map filter. */
+gceSTATUS
+gcoHARDWARE_SetTextureMipFilter(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Sampler,
+	IN gceTEXTURE_FILTER Filter
+	);
+
+/* Set the fixed point bias for the level of detail. */
+gceSTATUS
+gcoHARDWARE_SetTextureLODBiasX(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Sampler,
+	IN gctFIXED_POINT Bias
+	);
+
+/* Set the floating point bias for the level of detail. */
+gceSTATUS
+gcoHARDWARE_SetTextureLODBiasF(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Sampler,
+	IN gctFLOAT Bias
+	);
+
+/* Set the fixed point minimum value for the level of detail. */
+gceSTATUS
+gcoHARDWARE_SetTextureLODMinX(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Sampler,
+	IN gctFIXED_POINT LevelOfDetail
+	);
+
+/* Set the floating point minimum value for the level of detail. */
+gceSTATUS
+gcoHARDWARE_SetTextureLODMinF(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Sampler,
+	IN gctFLOAT LevelOfDetail
+	);
+
+/* Set the fixed point maximum value for the level of detail. */
+gceSTATUS
+gcoHARDWARE_SetTextureLODMaxX(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Sampler,
+	IN gctFIXED_POINT LevelOfDetail
+	);
+
+/* Set the floating point maximum value for the level of detail. */
+gceSTATUS
+gcoHARDWARE_SetTextureLODMaxF(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Sampler,
+	IN gctFLOAT LevelOfDetail
+	);
+
+/* Set texture format. */
+gceSTATUS
+gcoHARDWARE_SetTextureFormat(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Sampler,
+	IN gceSURF_FORMAT Format,
+	IN gctUINT Width,
+	IN gctUINT Height,
+	IN gctUINT Depth,
+	IN gctUINT Faces
+	);
+
+/* Set texture LOD address. */
+gceSTATUS
+gcoHARDWARE_SetTextureLOD(
+	IN gcoHARDWARE Hardware,
+	IN gctINT Sampler,
+	IN gctINT LevelOfDetail,
+	IN gctUINT32 Address,
+	IN gctINT Stride
+	);
+
+/* Clear wrapper to distinguish between software and resolve(3d) clear cases. */
+gceSTATUS
+gcoHARDWARE_ClearRect(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 Address,
+	IN gctPOINTER LogicalAddress,
+	IN gctUINT32 Stride,
+	IN gctINT Left,
+	IN gctINT Top,
+	IN gctINT Right,
+	IN gctINT Bottom,
+	IN gceSURF_FORMAT Format,
+	IN gctUINT32 ClearValue,
+	IN gctUINT8 ClearMask
+	);
+
+/* Append a TILE STATUS CLEAR command to a command queue. */
+gceSTATUS
+gcoHARDWARE_ClearTileStatus(
+	IN gcoHARDWARE Hardware,
+	IN gcsSURF_INFO_PTR Surface,
+	IN gctUINT32 Address,
+	IN gctSIZE_T Bytes,
+	IN gceSURF_TYPE Type,
+	IN gctUINT32 ClearValue,
+	IN gctUINT8 ClearMask
+	);
+
+gceSTATUS
+gco3D_ClearHzTileStatus(
+	IN gco3D Engine,
+	IN gcsSURF_INFO_PTR Surface,
+	IN gcsSURF_NODE_PTR TileStatus
+	);
+
+gceSTATUS
+gcoHARDWARE_SetRenderTarget(
+	IN gcoHARDWARE Hardware,
+	IN gcsSURF_INFO_PTR Surface
+	);
+
+gceSTATUS
+gcoHARDWARE_SetDepthBuffer(
+	IN gcoHARDWARE Hardware,
+	IN gcsSURF_INFO_PTR Surface
+	);
+
+gceSTATUS
+gcoHARDWARE_SetAPI(
+	IN gcoHARDWARE Hardware,
+	IN gceAPI Api
+	);
+
+gceSTATUS
+gcoHARDWARE_SetViewport(
+	IN gcoHARDWARE Hardware,
+	IN gctINT32 Left,
+	IN gctINT32 Top,
+	IN gctINT32 Right,
+	IN gctINT32 Bottom
+	);
+
+gceSTATUS
+gcoHARDWARE_SetScissors(
+	IN gcoHARDWARE Hardware,
+	IN gctINT32 Left,
+	IN gctINT32 Top,
+	IN gctINT32 Right,
+	IN gctINT32 Bottom
+	);
+
+gceSTATUS
+gcoHARDWARE_SetShading(
+	IN gcoHARDWARE Hardware,
+	IN gceSHADING Shading
+	);
+
+gceSTATUS
+gcoHARDWARE_SetBlendEnable(
+	IN gcoHARDWARE Hardware,
+	IN gctBOOL Enabled
+	);
+
+gceSTATUS
+gcoHARDWARE_SetBlendFunctionSource(
+	IN gcoHARDWARE Hardware,
+	IN gceBLEND_FUNCTION FunctionRGB,
+	IN gceBLEND_FUNCTION FunctionAlpha
+	);
+
+gceSTATUS
+gcoHARDWARE_SetBlendFunctionTarget(
+	IN gcoHARDWARE Hardware,
+	IN gceBLEND_FUNCTION FunctionRGB,
+	IN gceBLEND_FUNCTION FunctionAlpha
+	);
+
+gceSTATUS
+gcoHARDWARE_SetBlendMode(
+	IN gcoHARDWARE Hardware,
+	IN gceBLEND_MODE ModeRGB,
+	IN gceBLEND_MODE ModeAlpha
+	);
+
+gceSTATUS
+gcoHARDWARE_SetBlendColor(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT8 Red,
+	IN gctUINT8 Green,
+	IN gctUINT8 Blue,
+	IN gctUINT8 Alpha
+	);
+
+gceSTATUS
+gcoHARDWARE_SetBlendColorX(
+	IN gcoHARDWARE Hardware,
+	IN gctFIXED_POINT Red,
+	IN gctFIXED_POINT Green,
+	IN gctFIXED_POINT Blue,
+	IN gctFIXED_POINT Alpha
+	);
+
+gceSTATUS
+gcoHARDWARE_SetBlendColorF(
+	IN gcoHARDWARE Hardware,
+	IN gctFLOAT Red,
+	IN gctFLOAT Green,
+	IN gctFLOAT Blue,
+	IN gctFLOAT Alpha
+	);
+
+gceSTATUS
+gcoHARDWARE_SetCulling(
+	IN gcoHARDWARE Hardware,
+	IN gceCULL Mode
+	);
+
+gceSTATUS
+gcoHARDWARE_SetPointSizeEnable(
+	IN gcoHARDWARE Hardware,
+	IN gctBOOL Enable
+	);
+
+gceSTATUS
+gcoHARDWARE_SetPointSprite(
+	IN gcoHARDWARE Hardware,
+	IN gctBOOL Enable
+	);
+
+gceSTATUS
+gcoHARDWARE_SetFill(
+	IN gcoHARDWARE Hardware,
+	IN gceFILL Mode
+	);
+
+gceSTATUS
+gcoHARDWARE_SetDepthCompare(
+	IN gcoHARDWARE Hardware,
+	IN gceCOMPARE DepthCompare
+	);
+
+gceSTATUS
+gcoHARDWARE_SetDepthWrite(
+	IN gcoHARDWARE Hardware,
+	IN gctBOOL Enable
+	);
+
+gceSTATUS
+gcoHARDWARE_SetDepthMode(
+	IN gcoHARDWARE Hardware,
+	IN gceDEPTH_MODE DepthMode
+	);
+
+gceSTATUS
+gcoHARDWARE_SetDepthRangeX(
+	IN gcoHARDWARE Hardware,
+	IN gceDEPTH_MODE DepthMode,
+	IN gctFIXED_POINT Near,
+	IN gctFIXED_POINT Far
+	);
+
+gceSTATUS
+gcoHARDWARE_SetDepthRangeF(
+	IN gcoHARDWARE Hardware,
+	IN gceDEPTH_MODE DepthMode,
+	IN gctFLOAT Near,
+	IN gctFLOAT Far
+	);
+
+gceSTATUS
+gcoHARDWARE_SetDepthScaleBiasX(
+	IN gcoHARDWARE Hardware,
+	IN gctFIXED_POINT DepthScale,
+	IN gctFIXED_POINT DepthBias
+	);
+
+gceSTATUS
+gcoHARDWARE_SetDepthScaleBiasF(
+	IN gcoHARDWARE Hardware,
+	IN gctFLOAT DepthScale,
+	IN gctFLOAT DepthBias
+	);
+
+gceSTATUS
+gcoHARDWARE_SetLastPixelEnable(
+	IN gcoHARDWARE Hardware,
+	IN gctBOOL Enable
+	);
+
+gceSTATUS
+gcoHARDWARE_SetDither(
+	IN gcoHARDWARE Hardware,
+	IN gctBOOL Enable
+	);
+
+gceSTATUS
+gcoHARDWARE_SetColorWrite(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT8 Enable
+	);
+
+gceSTATUS
+gcoHARDWARE_SetEarlyDepth(
+	IN gcoHARDWARE Hardware,
+	IN gctBOOL Enable
+	);
+
+gceSTATUS
+gcoHARDWARE_SetStencilMode(
+	IN gcoHARDWARE Hardware,
+	IN gceSTENCIL_MODE Mode
+	);
+
+gceSTATUS
+gcoHARDWARE_SetStencilMask(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT8 Mask
+	);
+
+gceSTATUS
+gcoHARDWARE_SetStencilWriteMask(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT8 Mask
+	);
+
+gceSTATUS
+gcoHARDWARE_SetStencilReference(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT8 Reference
+	);
+
+gceSTATUS
+gcoHARDWARE_SetStencilCompare(
+	IN gcoHARDWARE Hardware,
+	IN gceSTENCIL_WHERE Where,
+	IN gceCOMPARE Compare
+	);
+
+gceSTATUS
+gcoHARDWARE_SetStencilPass(
+	IN gcoHARDWARE Hardware,
+	IN gceSTENCIL_WHERE Where,
+	IN gceSTENCIL_OPERATION Operation
+	);
+
+gceSTATUS
+gcoHARDWARE_SetStencilFail(
+	IN gcoHARDWARE Hardware,
+	IN gceSTENCIL_WHERE Where,
+	IN gceSTENCIL_OPERATION Operation
+	);
+
+gceSTATUS
+gcoHARDWARE_SetStencilDepthFail(
+	IN gcoHARDWARE Hardware,
+	IN gceSTENCIL_WHERE Where,
+	IN gceSTENCIL_OPERATION Operation
+	);
+
+gceSTATUS
+gcoHARDWARE_SetAlphaTest(
+	IN gcoHARDWARE Hardware,
+	IN gctBOOL Enable
+	);
+
+gceSTATUS
+gcoHARDWARE_SetAlphaCompare(
+	IN gcoHARDWARE Hardware,
+	IN gceCOMPARE Compare
+	);
+
+gceSTATUS
+gcoHARDWARE_SetAlphaReference(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT8 Reference
+	);
+
+gceSTATUS
+gcoHARDWARE_SetAlphaReferenceX(
+	IN gcoHARDWARE Hardware,
+	IN gctFIXED_POINT Reference
+	);
+
+gceSTATUS
+gcoHARDWARE_SetAlphaReferenceF(
+	IN gcoHARDWARE Hardware,
+	IN gctFLOAT Reference
+	);
+
+gceSTATUS
+gcoHARDWARE_BindStream(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 Address,
+	IN gctINT Stride,
+	IN gctUINT Number
+	);
+
+gceSTATUS
+gcoHARDWARE_BindIndex(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 Address,
+	IN gceINDEX_TYPE IndexType
+	);
+
+gceSTATUS
+gcoHARDWARE_SetAntiAliasLine(
+	IN gcoHARDWARE Hardware,
+	IN gctBOOL Enable
+	);
+
+gceSTATUS
+gcoHARDWARE_SetAALineTexSlot(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT TexSlot
+	);
+
+gceSTATUS
+gcoHARDWARE_SetAALineWidth(
+	IN gcoHARDWARE Hardware,
+	IN gctFLOAT Width
+	);
+
+
+/* Draw a number of primitives. */
+gceSTATUS
+gcoHARDWARE_DrawPrimitives(
+	IN gcoHARDWARE Hardware,
+	IN gcePRIMITIVE Type,
+	IN gctINT StartVertex,
+	IN gctSIZE_T PrimitiveCount
+	);
+
+/* Draw a number of primitives using offsets. */
+gceSTATUS
+gcoHARDWARE_DrawPrimitivesOffset(
+	IN gcoHARDWARE Hardware,
+	IN gcePRIMITIVE Type,
+	IN gctINT32 StartOffset,
+	IN gctSIZE_T PrimitiveCount
+	);
+
+/* Draw a number of indexed primitives. */
+gceSTATUS
+gcoHARDWARE_DrawIndexedPrimitives(
+	IN gcoHARDWARE Hardware,
+	IN gcePRIMITIVE Type,
+	IN gctINT BaseVertex,
+	IN gctINT StartIndex,
+	IN gctSIZE_T PrimitiveCount
+	);
+
+/* Draw a number of indexed primitives using offsets. */
+gceSTATUS
+gcoHARDWARE_DrawIndexedPrimitivesOffset(
+	IN gcoHARDWARE Hardware,
+	IN gcePRIMITIVE Type,
+	IN gctINT32 BaseOffset,
+	IN gctINT32 StartOffset,
+	IN gctSIZE_T PrimitiveCount
+	);
+
+/* Copy data into video memory. */
+gceSTATUS
+gcoHARDWARE_CopyData(
+	IN gcoHARDWARE Hardware,
+	IN gcsSURF_NODE_PTR Memory,
+	IN gctUINT32 Offset,
+	IN gctCONST_POINTER Buffer,
+	IN gctSIZE_T Bytes
+	);
+
+gceSTATUS
+gcoHARDWARE_SetStream(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 Index,
+	IN gctUINT32 Address,
+	IN gctUINT32 Stride
+	);
+
+gceSTATUS
+gcoHARDWARE_SetAttributes(
+	IN gcoHARDWARE Hardware,
+	IN gcsVERTEX_ATTRIBUTES_PTR Attributes,
+	IN gctUINT32 AttributeCount
+	);
+
+gceSTATUS
+gcoHARDWARE_QuerySamplerBase(
+	IN gcoHARDWARE Hardware,
+	OUT gctSIZE_T * VertexCount,
+	OUT gctINT_PTR VertexBase,
+	OUT gctSIZE_T * FragmentCount,
+	OUT gctINT_PTR FragmentBase
+	);
+
+gceSTATUS
+gcoHARDWARE_SetDepthOnly(
+	IN gcoHARDWARE Hardware,
+	IN gctBOOL Enable
+	);
+
+gceSTATUS
+gcoHARDWARE_SetCentroids(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32	Index,
+	IN gctPOINTER	Centroids
+	);
+
+/* Append a CLEAR command to a command queue. */
+gceSTATUS
+gcoHARDWARE_Clear(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 Address,
+	IN gctUINT32 Stride,
+	IN gctINT32 Left,
+	IN gctINT32 Top,
+	IN gctINT32 Right,
+	IN gctINT32 Bottom,
+	IN gceSURF_FORMAT Format,
+	IN gctUINT32 ClearValue,
+	IN gctUINT8 ClearMask
+	);
+
+/* Software clear. */
+gceSTATUS
+gcoHARDWARE_ClearSoftware(
+	IN gcoHARDWARE Hardware,
+	IN gctPOINTER LogicalAddress,
+	IN gctUINT32 Stride,
+	IN gctINT32 Left,
+	IN gctINT32 Top,
+	IN gctINT32 Right,
+	IN gctINT32 Bottom,
+	IN gceSURF_FORMAT Format,
+	IN gctUINT32 ClearValue,
+	IN gctUINT8 ClearMask
+	);
+
+/* Verifies whether 2D engine is available. */
+gctBOOL
+gcoHARDWARE_Is2DAvailable(
+    IN gcoHARDWARE Hardware
+    );
+
+/* Sets the software 2D renderer force flag. */
+gceSTATUS
+gcoHARDWARE_UseSoftware2D(
+    IN gcoHARDWARE Hardware,
+	IN gctBOOL Enable
+    );
+
+/* Sets the maximum number of brushes in the cache. */
+gceSTATUS
+gcoHARDWARE_SetBrushLimit(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT MaxCount
+	);
+
+/* Return a pointer to the brush cache. */
+gceSTATUS
+gcoHARDWARE_GetBrushCache(
+	IN gcoHARDWARE Hardware,
+	IN OUT gcoBRUSH_CACHE * BrushCache
+	);
+
+/* Program the brush. */
+gceSTATUS
+gcoHARDWARE_FlushBrush(
+	IN gcoHARDWARE Hardware,
+	IN gcoBRUSH Brush
+	);
+
+/* Clear one or more rectangular areas. */
+gceSTATUS
+gcoHARDWARE_Clear2D(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 RectCount,
+	IN gcsRECT_PTR Rect,
+	IN gctUINT32 Color,
+	IN gctBOOL ColorConvert,
+	IN gctUINT8 FgRop,
+	IN gctUINT8 BgRop
+	);
+
+/* Draw one or more Bresenham lines using a brush. */
+gceSTATUS
+gcoHARDWARE_Line2D(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 LineCount,
+	IN gcsRECT_PTR Position,
+	IN gcoBRUSH Brush,
+	IN gctUINT8 FgRop,
+	IN gctUINT8 BgRop
+	);
+
+/* Draw one or more Bresenham lines using solid color(s). */
+gceSTATUS
+gcoHARDWARE_Line2DEx(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 LineCount,
+	IN gcsRECT_PTR Position,
+	IN gctUINT32 ColorCount,
+	IN gctUINT32_PTR Color32,
+	IN gctUINT8 FgRop,
+	IN gctUINT8 BgRop
+	);
+
+/* Monochrome blit. */
+gceSTATUS
+gcoHARDWARE_MonoBlit(
+	IN gcoHARDWARE Hardware,
+	IN gctPOINTER StreamBits,
+	IN gcsPOINT_PTR StreamSize,
+	IN gcsRECT_PTR StreamRect,
+	IN gceSURF_MONOPACK SrcStreamPack,
+	IN gceSURF_MONOPACK DestStreamPack,
+	IN gcsRECT_PTR DestRect,
+	IN gctUINT32 FgRop,
+	IN gctUINT32 BgRop
+	);
+
+/******************************************************************************\
+******************************** gcoBUFFER Object *******************************
+\******************************************************************************/
+
+/* Construct a new gcoBUFFER object. */
+gceSTATUS
+gcoBUFFER_Construct(
+	IN gcoHAL Hal,
+	IN gcoHARDWARE Hardware,
+	IN gctSIZE_T MaxSize,
+	OUT gcoBUFFER * Buffer
+	);
+
+/* Destroy an gcoBUFFER object. */
+gceSTATUS
+gcoBUFFER_Destroy(
+	IN gcoBUFFER Buffer
+	);
+
+/* Reserve space in a command buffer. */
+gceSTATUS
+gcoBUFFER_Reserve(
+	IN gcoBUFFER Buffer,
+	IN gctSIZE_T Bytes,
+	IN gctBOOL Aligned,
+	OUT gctPOINTER * Memory
+	);
+
+/* Write data into the command buffer. */
+gceSTATUS
+gcoBUFFER_Write(
+	IN gcoBUFFER Buffer,
+	IN gctCONST_POINTER Data,
+	IN gctSIZE_T Bytes,
+	IN gctBOOL Aligned
+	);
+
+/* Write 32-bit data into the command buffer. */
+gceSTATUS
+gcoBUFFER_Write32(
+	IN gcoBUFFER Buffer,
+	IN gctUINT32 Data,
+	IN gctBOOL Aligned
+	);
+
+/* Write 64-bit data into the command buffer. */
+gceSTATUS
+gcoBUFFER_Write64(
+	IN gcoBUFFER Buffer,
+	IN gctUINT64 Data,
+	IN gctBOOL Aligned
+	);
+
+/* Commit the command buffer. */
+gceSTATUS
+gcoBUFFER_Commit(
+	IN gcoBUFFER Buffer,
+	IN gcoCONTEXT Context,
+	IN gcoQUEUE Queue
+	);
+
+/******************************************************************************\
+******************************** gcoCMDBUF Object *******************************
+\******************************************************************************/
+
+typedef struct _gcsCOMMAND_INFO	* gcsCOMMAND_INFO_PTR;
+
+/* Construct a new gcoCMDBUF object. */
+gceSTATUS
+gcoCMDBUF_Construct(
+	IN gcoOS Os,
+	IN gcoHARDWARE Hardware,
+	IN gctSIZE_T Bytes,
+	IN gcsCOMMAND_INFO_PTR Info,
+	IN gcoCMDBUF Parent,
+	OUT gcoCMDBUF * Buffer
+	);
+
+/* Destroy an gcoCMDBUF object. */
+gceSTATUS
+gcoCMDBUF_Destroy(
+	IN gcoCMDBUF Buffer
+	);
+
+/******************************************************************************\
+******************************* gcoCONTEXT Object *******************************
+\******************************************************************************/
+
+gceSTATUS
+gcoCONTEXT_Construct(
+	IN gcoOS Os,
+	IN gcoHARDWARE Hardware,
+	OUT gcoCONTEXT * Context
+	);
+
+gceSTATUS
+gcoCONTEXT_Destroy(
+	IN gcoCONTEXT Context
+	);
+
+gceSTATUS
+gcoCONTEXT_Buffer(
+	IN gcoCONTEXT Context,
+	IN gctUINT32 Address,
+	IN gctSIZE_T Count,
+	IN gctUINT32_PTR Data
+	);
+
+gceSTATUS
+gcoCONTEXT_BufferX(
+	IN gcoCONTEXT Context,
+	IN gctUINT32 Address,
+	IN gctSIZE_T Count,
+	IN gctFIXED_POINT * Data
+	);
+
+gceSTATUS
+gcoCONTEXT_PreCommit(
+	IN OUT gcoCONTEXT Context
+	);
+
+gceSTATUS
+gcoCONTEXT_PostCommit(
+	IN OUT gcoCONTEXT Context
+	);
+
+/******************************************************************************\
+********************************* gcoDUMP Object ********************************
+\******************************************************************************/
+
+/* Construct a new gcoDUMP object. */
+gceSTATUS
+gcoDUMP_Construct(
+	IN gcoOS Os,
+	IN gcoHAL Hal,
+	OUT gcoDUMP * Dump
+	);
+
+/* Destroy a gcoDUMP object. */
+gceSTATUS
+gcoDUMP_Destroy(
+	IN gcoDUMP Dump
+	);
+
+/* Enable/disable dumping. */
+gceSTATUS
+gcoDUMP_Control(
+	IN gcoDUMP Dump,
+	IN gctSTRING FileName
+	);
+
+gceSTATUS
+gcoDUMP_IsEnabled(
+	IN gcoDUMP Dump,
+	OUT gctBOOL * Enabled
+	);
+
+/* Add surface. */
+gceSTATUS
+gcoDUMP_AddSurface(
+	IN gcoDUMP Dump,
+	IN gctINT32 Width,
+	IN gctINT32 Height,
+	IN gceSURF_FORMAT PixelFormat,
+	IN gctUINT32 Address,
+	IN gctSIZE_T ByteCount
+	);
+
+/* Mark the beginning of a frame. */
+gceSTATUS
+gcoDUMP_FrameBegin(
+	IN gcoDUMP Dump
+	);
+
+/* Mark the end of a frame. */
+gceSTATUS
+gcoDUMP_FrameEnd(
+	IN gcoDUMP Dump
+	);
+
+/* Dump data. */
+gceSTATUS
+gcoDUMP_DumpData(
+	IN gcoDUMP Dump,
+	IN gceDUMP_TAG Type,
+	IN gctUINT32 Address,
+	IN gctSIZE_T ByteCount,
+	IN gctCONST_POINTER Data
+	);
+
+/* Delete an address. */
+gceSTATUS
+gcoDUMP_Delete(
+	IN gcoDUMP Dump,
+	IN gctUINT32 Address
+	);
+
+/******************************************************************************\
+********************************* gcoSURF Object ********************************
+\******************************************************************************/
+
+/*----------------------------------------------------------------------------*/
+/*------------------------------- gcoSURF Common ------------------------------*/
+
+/* Color format component parameters. */
+typedef struct _gcsFORMAT_COMPONENT
+{
+	gctUINT8					start;
+	gctUINT8					width;
+}
+gcsFORMAT_COMPONENT;
+
+/* RGBA color format class. */
+typedef struct _gcsFORMAT_CLASS_TYPE_RGBA
+{
+	gcsFORMAT_COMPONENT			alpha;
+	gcsFORMAT_COMPONENT			red;
+	gcsFORMAT_COMPONENT			green;
+	gcsFORMAT_COMPONENT			blue;
+}
+gcsFORMAT_CLASS_TYPE_RGBA;
+
+/* YUV color format class. */
+typedef struct _gcsFORMAT_CLASS_TYPE_YUV
+{
+	gcsFORMAT_COMPONENT			y;
+	gcsFORMAT_COMPONENT			u;
+	gcsFORMAT_COMPONENT			v;
+}
+gcsFORMAT_CLASS_TYPE_YUV;
+
+/* Index color format class. */
+typedef struct _gcsFORMAT_CLASS_TYPE_INDEX
+{
+	gcsFORMAT_COMPONENT			value;
+}
+gcsFORMAT_CLASS_TYPE_INDEX;
+
+/* Luminance color format class. */
+typedef struct _gcsFORMAT_CLASS_TYPE_LUMINANCE
+{
+	gcsFORMAT_COMPONENT			alpha;
+	gcsFORMAT_COMPONENT			value;
+}
+gcsFORMAT_CLASS_TYPE_LUMINANCE;
+
+/* Bump map color format class. */
+typedef struct _gcsFORMAT_CLASS_TYPE_BUMP
+{
+	gcsFORMAT_COMPONENT			alpha;
+	gcsFORMAT_COMPONENT			l;
+	gcsFORMAT_COMPONENT			v;
+	gcsFORMAT_COMPONENT			u;
+	gcsFORMAT_COMPONENT			q;
+	gcsFORMAT_COMPONENT			w;
+}
+gcsFORMAT_CLASS_TYPE_BUMP;
+
+/* Depth and stencil format class. */
+typedef struct _gcsFORMAT_CLASS_TYPE_DEPTH
+{
+	gcsFORMAT_COMPONENT			depth;
+	gcsFORMAT_COMPONENT			stencil;
+}
+gcsFORMAT_CLASS_TYPE_DEPTH;
+
+/* Format parameters. */
+typedef struct _gcsSURF_FORMAT_INFO
+{
+	/* Format code and class. */
+	gceSURF_FORMAT				format;
+	gceFORMAT_CLASS				fmtClass;
+
+	/* The size of one pixel in bits. */
+	gctUINT8					bitsPerPixel;
+
+	/* Component swizzle. */
+	gceSURF_SWIZZLE				swizzle;
+
+	/* Some formats have two neighbour pixels interleaved together. */
+	/* To describe such format, set the flag to 1 and add another   */
+	/* like this one describing the odd pixel format.               */
+	gctUINT8					interleaved;
+
+	/* Format components. */
+	union
+	{
+		gcsFORMAT_CLASS_TYPE_BUMP		bump;
+		gcsFORMAT_CLASS_TYPE_RGBA		rgba;
+		gcsFORMAT_CLASS_TYPE_YUV		yuv;
+		gcsFORMAT_CLASS_TYPE_LUMINANCE	lum;
+		gcsFORMAT_CLASS_TYPE_INDEX		index;
+		gcsFORMAT_CLASS_TYPE_DEPTH		depth;
+	};
+}
+gcsSURF_FORMAT_INFO;
+
+/* Frame buffer information. */
+typedef struct _gcsSURF_FRAMEBUFFER
+{
+	gctPOINTER					logical;
+	gctUINT						width, height;
+	gctINT						stride;
+	gceSURF_FORMAT				format;
+}
+gcsSURF_FRAMEBUFFER;
+
+/* Generic pixel component descriptors. */
+extern gcsFORMAT_COMPONENT gcvPIXEL_COMP_XXX8;
+extern gcsFORMAT_COMPONENT gcvPIXEL_COMP_XX8X;
+extern gcsFORMAT_COMPONENT gcvPIXEL_COMP_X8XX;
+extern gcsFORMAT_COMPONENT gcvPIXEL_COMP_8XXX;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __aqhaluser_h_ */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gc_hal.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gc_hal.h
@@ -0,0 +1,1642 @@
+/****************************************************************************
+*
+*    Copyright (C) 2005 - 2010 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public License as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+#ifndef __gc_hal_h_
+#define __gc_hal_h_
+
+#include "gc_hal_types.h"
+#include "gc_hal_enum.h"
+#include "gc_hal_base.h"
+#include "gc_hal_profiler.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/******************************************************************************\
+******************************* Alignment Macros *******************************
+\******************************************************************************/
+
+#define gcmALIGN(n, align) \
+( \
+	((n) + ((align) - 1)) & ~((align) - 1) \
+)
+
+/******************************************************************************\
+***************************** Element Count Macro *****************************
+\******************************************************************************/
+
+#define gcmSIZEOF(a) \
+( \
+	(gctSIZE_T) (sizeof(a)) \
+)
+
+#define gcmCOUNTOF(a) \
+( \
+	sizeof(a) / sizeof(a[0]) \
+)
+
+/******************************************************************************\
+******************************** gcsOBJECT Object *******************************
+\******************************************************************************/
+
+/* Type of objects. */
+typedef enum _gceOBJECT_TYPE
+{
+	gcvOBJ_UNKNOWN 				= 0,
+	gcvOBJ_2D					= gcmCC('2','D',' ',' '),
+	gcvOBJ_3D					= gcmCC('3','D',' ',' '),
+	gcvOBJ_ATTRIBUTE			= gcmCC('A','T','T','R'),
+	gcvOBJ_BRUSHCACHE			= gcmCC('B','R','U','$'),
+	gcvOBJ_BRUSHNODE			= gcmCC('B','R','U','n'),
+	gcvOBJ_BRUSH				= gcmCC('B','R','U','o'),
+	gcvOBJ_BUFFER				= gcmCC('B','U','F','R'),
+	gcvOBJ_COMMAND				= gcmCC('C','M','D',' '),
+	gcvOBJ_COMMANDBUFFER		= gcmCC('C','M','D','B'),
+	gcvOBJ_CONTEXT				= gcmCC('C','T','X','T'),
+	gcvOBJ_DEVICE				= gcmCC('D','E','V',' '),
+	gcvOBJ_DUMP					= gcmCC('D','U','M','P'),
+	gcvOBJ_EVENT				= gcmCC('E','V','N','T'),
+	gcvOBJ_FUNCTION				= gcmCC('F','U','N','C'),
+	gcvOBJ_HAL					= gcmCC('H','A','L',' '),
+	gcvOBJ_HARDWARE				= gcmCC('H','A','R','D'),
+	gcvOBJ_HEAP					= gcmCC('H','E','A','P'),
+	gcvOBJ_INDEX				= gcmCC('I','N','D','X'),
+	gcvOBJ_INTERRUPT			= gcmCC('I','N','T','R'),
+	gcvOBJ_KERNEL				= gcmCC('K','E','R','N'),
+	gcvOBJ_MEMORYBUFFER		    = gcmCC('M','E','M','B'),
+	gcvOBJ_MMU					= gcmCC('M','M','U',' '),
+	gcvOBJ_OS					= gcmCC('O','S',' ',' '),
+	gcvOBJ_OUTPUT				= gcmCC('O','U','T','P'),
+	gcvOBJ_PAINT				= gcmCC('P','N','T',' '),
+	gcvOBJ_PATH					= gcmCC('P','A','T','H'),
+	gcvOBJ_QUEUE				= gcmCC('Q','U','E',' '),
+	gcvOBJ_SAMPLER				= gcmCC('S','A','M','P'),
+	gcvOBJ_SHADER				= gcmCC('S','H','D','R'),
+	gcvOBJ_STREAM				= gcmCC('S','T','R','M'),
+	gcvOBJ_SURF					= gcmCC('S','U','R','F'),
+	gcvOBJ_TEXTURE				= gcmCC('T','X','T','R'),
+	gcvOBJ_UNIFORM				= gcmCC('U','N','I','F'),
+	gcvOBJ_VARIABLE				= gcmCC('V','A','R','I'),
+	gcvOBJ_VERTEX				= gcmCC('V','R','T','X'),
+	gcvOBJ_VIDMEM				= gcmCC('V','M','E','M'),
+	gcvOBJ_VG					= gcmCC('V','G',' ',' '),
+}
+gceOBJECT_TYPE;
+
+/* gcsOBJECT object defintinon. */
+typedef struct _gcsOBJECT
+{
+	/* Type of an object. */
+	gceOBJECT_TYPE				type;
+}
+gcsOBJECT;
+
+/* Kernel settings. */
+typedef struct _gcsKERNEL_SETTINGS
+{
+	/* Used RealTime signal between kernel and user. */
+	gctINT signal;
+}
+gcsKERNEL_SETTINGS;
+
+/*******************************************************************************
+**
+**	gcmVERIFY_OBJECT
+**
+**		Assert if an object is invalid or is not of the specified type.  If the
+**		object is invalid or not of the specified type, gcvSTATUS_INVALID_OBJECT
+**		will be returned from the current function.  In retail mode this macro
+**		does nothing.
+**
+**	ARGUMENTS:
+**
+**		obj		Object to test.
+**		t		Expected type of the object.
+*/
+#ifndef EGL_API_ANDROID
+#   define _gcmVERIFY_OBJECT(prefix, obj, t) \
+		do \
+		{ \
+			if ((obj) == gcvNULL) \
+			{ \
+				prefix##TRACE(gcvLEVEL_ERROR, \
+				              #prefix "VERIFY_OBJECT failed: NULL"); \
+				prefix##TRACE(gcvLEVEL_ERROR, "  expected: %c%c%c%c", \
+				              gcmCC_PRINT(t)); \
+				prefix##ASSERT((obj) != gcvNULL); \
+				prefix##FOOTER_ARG("status=%d", gcvSTATUS_INVALID_OBJECT); \
+				return gcvSTATUS_INVALID_OBJECT; \
+			} \
+			else if (((gcsOBJECT*) (obj))->type != t) \
+			{ \
+				prefix##TRACE(gcvLEVEL_ERROR, \
+							  #prefix "VERIFY_OBJECT failed: %c%c%c%c", \
+							  gcmCC_PRINT(((gcsOBJECT*) (obj))->type)); \
+				prefix##TRACE(gcvLEVEL_ERROR, "  expected: %c%c%c%c", \
+				              gcmCC_PRINT(t)); \
+				prefix##ASSERT(((gcsOBJECT*)(obj))->type == t); \
+				prefix##FOOTER_ARG("status=%d", gcvSTATUS_INVALID_OBJECT); \
+				return gcvSTATUS_INVALID_OBJECT; \
+			} \
+		} \
+		while (gcvFALSE)
+#   define gcmVERIFY_OBJECT(obj, t)		_gcmVERIFY_OBJECT(gcm, obj, t)
+#   define gcmkVERIFY_OBJECT(obj, t)	_gcmVERIFY_OBJECT(gcmk, obj, t)
+#else
+#   define gcmVERIFY_OBJECT(obj, t)		do {} while (gcvFALSE)
+#   define gcmkVERIFY_OBJECT(obj, t)	do {} while (gcvFALSE)
+#endif
+
+/******************************************************************************\
+********************************** gckOS Object *********************************
+\******************************************************************************/
+
+typedef struct _gckOS			* gckOS;
+
+/* Construct a new gckOS object. */
+gceSTATUS
+gckOS_Construct(
+	IN gctPOINTER Context,
+	OUT gckOS * Os
+	);
+
+/* Destroy an gckOS object. */
+gceSTATUS
+gckOS_Destroy(
+	IN gckOS Os
+	);
+
+/* Query the video memory. */
+gceSTATUS
+gckOS_QueryVideoMemory(
+	IN gckOS Os,
+	OUT gctPHYS_ADDR * InternalAddress,
+	OUT gctSIZE_T * InternalSize,
+	OUT gctPHYS_ADDR * ExternalAddress,
+	OUT gctSIZE_T * ExternalSize,
+	OUT gctPHYS_ADDR * ContiguousAddress,
+	OUT gctSIZE_T * ContiguousSize
+	);
+
+/* Allocate memory from the heap. */
+gceSTATUS
+gckOS_Allocate(
+	IN gckOS Os,
+	IN gctSIZE_T Bytes,
+	OUT gctPOINTER * Memory
+	);
+
+/* Free allocated memory. */
+gceSTATUS
+gckOS_Free(
+	IN gckOS Os,
+	IN gctPOINTER Memory
+	);
+
+/* Wrapper for allocation memory.. */
+gceSTATUS
+gckOS_AllocateMemory(
+	IN gckOS Os,
+	IN gctSIZE_T Bytes,
+	OUT gctPOINTER * Memory
+	);
+
+/* Wrapper for freeing memory. */
+gceSTATUS
+gckOS_FreeMemory(
+	IN gckOS Os,
+	IN gctPOINTER Memory
+	);
+
+/* Allocate paged memory. */
+gceSTATUS
+gckOS_AllocatePagedMemory(
+	IN gckOS Os,
+	IN gctSIZE_T Bytes,
+	OUT gctPHYS_ADDR * Physical
+	);
+
+/* Allocate paged memory. */
+gceSTATUS
+gckOS_AllocatePagedMemoryEx(
+	IN gckOS Os,
+	IN gctBOOL Contiguous,
+	IN gctSIZE_T Bytes,
+	OUT gctPHYS_ADDR * Physical
+	);
+
+/* Lock pages. */
+gceSTATUS
+gckOS_LockPages(
+	IN gckOS Os,
+	IN gctPHYS_ADDR Physical,
+	IN gctSIZE_T Bytes,
+#ifdef __QNXNTO__
+	IN gctUINT32 Pid,
+#endif
+	OUT gctPOINTER * Logical,
+	OUT gctSIZE_T * PageCount
+	);
+
+/* Map pages. */
+gceSTATUS
+gckOS_MapPages(
+	IN gckOS Os,
+	IN gctPHYS_ADDR Physical,
+#ifdef __QNXNTO__
+	IN gctPOINTER Logical,
+#endif
+	IN gctSIZE_T PageCount,
+	IN gctPOINTER PageTable
+	);
+
+/* Unlock pages. */
+gceSTATUS
+gckOS_UnlockPages(
+	IN gckOS Os,
+	IN gctPHYS_ADDR Physical,
+#ifdef __QNXNTO__
+	IN gctUINT32 Pid,
+#endif
+	IN gctSIZE_T Bytes,
+	IN gctPOINTER Logical
+	);
+
+/* Free paged memory. */
+gceSTATUS
+gckOS_FreePagedMemory(
+	IN gckOS Os,
+	IN gctPHYS_ADDR Physical,
+	IN gctSIZE_T Bytes
+	);
+
+/* Allocate non-paged memory. */
+gceSTATUS
+gckOS_AllocateNonPagedMemory(
+	IN gckOS Os,
+	IN gctBOOL InUserSpace,
+	IN OUT gctSIZE_T * Bytes,
+	OUT gctPHYS_ADDR * Physical,
+	OUT gctPOINTER * Logical
+	);
+
+/* Free non-paged memory. */
+gceSTATUS
+gckOS_FreeNonPagedMemory(
+	IN gckOS Os,
+	IN gctSIZE_T Bytes,
+	IN gctPHYS_ADDR Physical,
+	IN gctPOINTER Logical
+	);
+
+/* Allocate contiguous memory. */
+gceSTATUS
+gckOS_AllocateContiguous(
+	IN gckOS Os,
+	IN gctBOOL InUserSpace,
+	IN OUT gctSIZE_T * Bytes,
+	OUT gctPHYS_ADDR * Physical,
+	OUT gctPOINTER * Logical
+	);
+
+/* Free contiguous memory. */
+gceSTATUS
+gckOS_FreeContiguous(
+	IN gckOS Os,
+	IN gctPHYS_ADDR Physical,
+	IN gctPOINTER Logical,
+	IN gctSIZE_T Bytes
+	);
+
+/* Get the number fo bytes per page. */
+gceSTATUS
+gckOS_GetPageSize(
+	IN gckOS Os,
+	OUT gctSIZE_T * PageSize
+	);
+
+/* Get the physical address of a corresponding logical address. */
+gceSTATUS
+gckOS_GetPhysicalAddress(
+	IN gckOS Os,
+	IN gctPOINTER Logical,
+	OUT gctUINT32 * Address
+	);
+
+/* Map physical memory. */
+gceSTATUS
+gckOS_MapPhysical(
+	IN gckOS Os,
+	IN gctUINT32 Physical,
+	IN gctUINT32 OriginalLogical,
+	IN gctSIZE_T Bytes,
+	OUT gctPOINTER * Logical
+	);
+
+/* Unmap previously mapped physical memory. */
+gceSTATUS
+gckOS_UnmapPhysical(
+	IN gckOS Os,
+	IN gctPOINTER Logical,
+	IN gctSIZE_T Bytes
+	);
+
+/* Read data from a hardware register. */
+gceSTATUS
+gckOS_ReadRegister(
+	IN gckOS Os,
+	IN gctUINT32 Address,
+	OUT gctUINT32 * Data
+	);
+
+/* Write data to a hardware register. */
+gceSTATUS
+gckOS_WriteRegister(
+	IN gckOS Os,
+	IN gctUINT32 Address,
+	IN gctUINT32 Data
+	);
+
+/* Write data to a 32-bit memory location. */
+gceSTATUS
+gckOS_WriteMemory(
+	IN gckOS Os,
+	IN gctPOINTER Address,
+	IN gctUINT32 Data
+	);
+
+/* Map physical memory into the process space. */
+gceSTATUS
+gckOS_MapMemory(
+	IN gckOS Os,
+	IN gctPHYS_ADDR Physical,
+	IN gctSIZE_T Bytes,
+	OUT gctPOINTER * Logical
+	);
+
+/* Unmap physical memory from the process space. */
+gceSTATUS
+gckOS_UnmapMemory(
+	IN gckOS Os,
+	IN gctPHYS_ADDR Physical,
+	IN gctSIZE_T Bytes,
+	IN gctPOINTER Logical
+	);
+
+/* Create a new mutex. */
+gceSTATUS
+gckOS_CreateMutex(
+	IN gckOS Os,
+	OUT gctPOINTER * Mutex
+	);
+
+/* Delete a mutex. */
+gceSTATUS
+gckOS_DeleteMutex(
+	IN gckOS Os,
+	IN gctPOINTER Mutex
+	);
+
+/* Acquire a mutex. */
+gceSTATUS
+gckOS_AcquireMutex(
+	IN gckOS Os,
+	IN gctPOINTER Mutex,
+	IN gctUINT32 Timeout
+	);
+
+/* Release a mutex. */
+gceSTATUS
+gckOS_ReleaseMutex(
+	IN gckOS Os,
+	IN gctPOINTER Mutex
+	);
+
+/* Atomically exchange a pair of 32-bit values. */
+gceSTATUS
+gckOS_AtomicExchange(
+	IN gckOS Os,
+    IN OUT gctUINT32_PTR Target,
+	IN gctUINT32 NewValue,
+    OUT gctUINT32_PTR OldValue
+	);
+
+/* Atomically exchange a pair of pointers. */
+gceSTATUS
+gckOS_AtomicExchangePtr(
+	IN gckOS Os,
+    IN OUT gctPOINTER * Target,
+	IN gctPOINTER NewValue,
+    OUT gctPOINTER * OldValue
+	);
+
+/* Delay a number of microseconds. */
+gceSTATUS
+gckOS_Delay(
+	IN gckOS Os,
+	IN gctUINT32 Delay
+	);
+
+/* Memory barrier. */
+gceSTATUS
+gckOS_MemoryBarrier(
+	IN gckOS Os,
+	IN gctPOINTER Address
+	);
+
+/* Map user pointer. */
+gceSTATUS
+gckOS_MapUserPointer(
+	IN gckOS Os,
+	IN gctPOINTER Pointer,
+	IN gctSIZE_T Size,
+	OUT gctPOINTER * KernelPointer
+	);
+
+/* Unmap user pointer. */
+gceSTATUS
+gckOS_UnmapUserPointer(
+	IN gckOS Os,
+	IN gctPOINTER Pointer,
+	IN gctSIZE_T Size,
+	IN gctPOINTER KernelPointer
+	);
+
+gceSTATUS
+gckOS_ClockOff(
+    void
+	);
+
+gceSTATUS
+gckOS_ClockOn(
+	IN gctUINT64 Frequency
+	);
+
+gceSTATUS
+gckOS_Reset(
+	IN gckOS Os
+	);
+
+gceSTATUS
+gckOS_SetConstraint(
+	IN gckOS Os,
+	IN gctBOOL enableDVFM,
+	IN gctBOOL enableLPM
+	);
+
+gceSTATUS
+gckOS_UnSetConstraint(
+	IN gckOS Os,
+	IN gctBOOL enableDVFM,
+	IN gctBOOL enableLPM
+	);
+
+gceSTATUS
+gckOS_NotifyIdle(
+	IN gckOS Os,
+	IN gctBOOL Idle
+	);
+
+gctUINT32
+gckOS_GetTicks(
+    void
+    );
+
+gceSTATUS
+gckOS_IdleProfile(
+    IN gckOS Os,
+    IN OUT gctUINT32* Timeslice,
+    OUT gctUINT32* IdleTime
+    );
+
+#ifdef __QNXNTO__
+/* Map user physical address. */
+gceSTATUS
+gckOS_MapUserPhysical(
+	IN gckOS Os,
+	IN gctPHYS_ADDR Phys,
+	OUT gctPOINTER * KernelPointer
+	);
+
+/* Allocate from user's shared pool. */
+gceSTATUS
+gckOS_AllocateNonPagedMemoryShmPool(
+	IN gckOS Os,
+	IN gctBOOL InUserSpace,
+	IN gctUINT32 Pid,
+	IN gctHANDLE Handle,
+	IN OUT gctSIZE_T * Bytes,
+	OUT gctPHYS_ADDR * Physical,
+	OUT gctPOINTER * Logical
+	);
+#endif
+
+gceSTATUS
+gckOS_SuspendInterrupt(
+	IN gckOS Os
+	);
+
+gceSTATUS
+gckOS_ResumeInterrupt(
+	IN gckOS Os
+	);
+
+/* Get the base address for the physical memory. */
+gceSTATUS
+gckOS_GetBaseAddress(
+	IN gckOS Os,
+	OUT gctUINT32_PTR BaseAddress
+	);
+
+/* Perform a memory copy. */
+gceSTATUS
+gckOS_MemCopy(
+	IN gctPOINTER Destination,
+	IN gctCONST_POINTER Source,
+	IN gctSIZE_T Bytes
+	);
+
+/* Zero memory. */
+gceSTATUS
+gckOS_ZeroMemory(
+	IN gctPOINTER Memory,
+	IN gctSIZE_T Bytes
+	);
+
+/* Device I/O control to the kernel HAL layer. */
+gceSTATUS
+gckOS_DeviceControl(
+	IN gckOS Os,
+    IN gctBOOL FromUser,
+	IN gctUINT32 IoControlCode,
+	IN gctPOINTER InputBuffer,
+	IN gctSIZE_T InputBufferSize,
+	OUT gctPOINTER OutputBuffer,
+	IN gctSIZE_T OutputBufferSize
+	);
+
+/******************************************************************************\
+********************************** Signal Object *********************************
+\******************************************************************************/
+
+/* User signal command codes. */
+typedef enum _gceUSER_SIGNAL_COMMAND_CODES
+{
+	gcvUSER_SIGNAL_CREATE,
+	gcvUSER_SIGNAL_DESTROY,
+	gcvUSER_SIGNAL_SIGNAL,
+	gcvUSER_SIGNAL_WAIT,
+}
+gceUSER_SIGNAL_COMMAND_CODES;
+
+/* Create a signal. */
+gceSTATUS
+gckOS_CreateSignal(
+	IN gckOS Os,
+	IN gctBOOL ManualReset,
+	OUT gctSIGNAL * Signal
+	);
+
+/* Destroy a signal. */
+gceSTATUS
+gckOS_DestroySignal(
+	IN gckOS Os,
+	IN gctSIGNAL Signal
+	);
+
+/* Signal a signal. */
+gceSTATUS
+gckOS_Signal(
+	IN gckOS Os,
+	IN gctSIGNAL Signal,
+	IN gctBOOL State
+	);
+
+/* Wait for a signal. */
+gceSTATUS
+gckOS_WaitSignal(
+	IN gckOS Os,
+	IN gctSIGNAL Signal,
+	IN gctUINT32 Wait
+	);
+
+/* Map a user signal to the kernel space. */
+gceSTATUS
+gckOS_MapSignal(
+	IN gckOS Os,
+	IN gctSIGNAL Signal,
+	IN gctHANDLE Process,
+	OUT gctSIGNAL * MappedSignal
+	);
+
+/* Map user memory. */
+gceSTATUS
+gckOS_MapUserMemory(
+	IN gckOS Os,
+	IN gctPOINTER Memory,
+	IN gctSIZE_T Size,
+	OUT gctPOINTER * Info,
+	OUT gctUINT32_PTR Address
+	);
+
+/* Unmap user memory. */
+gceSTATUS
+gckOS_UnmapUserMemory(
+	IN gckOS Os,
+	IN gctPOINTER Memory,
+	IN gctSIZE_T Size,
+	IN gctPOINTER Info,
+	IN gctUINT32 Address
+	);
+
+#ifdef ANDROID_VERSION_ECLAIR
+gceSTATUS
+gcoOS_FlushCache(
+    int fd,
+    int offset,
+    int size
+    );
+#endif
+#if !USE_NEW_LINUX_SIGNAL
+/* Create signal to be used in the user space. */
+gceSTATUS
+gckOS_CreateUserSignal(
+	IN gckOS Os,
+	IN gctBOOL ManualReset,
+	OUT gctINT * SignalID
+	);
+
+/* Destroy signal used in the user space. */
+gceSTATUS
+gckOS_DestroyUserSignal(
+	IN gckOS Os,
+	IN gctINT SignalID
+	);
+
+/* Wait for signal used in the user space. */
+gceSTATUS
+gckOS_WaitUserSignal(
+	IN gckOS Os,
+	IN gctINT SignalID,
+	IN gctUINT32 Wait
+	);
+
+/* Signal a signal used in the user space. */
+gceSTATUS
+gckOS_SignalUserSignal(
+	IN gckOS Os,
+	IN gctINT SignalID,
+	IN gctBOOL State
+	);
+#endif /* USE_NEW_LINUX_SIGNAL */
+
+/* Set a signal owned by a process. */
+#if defined(__QNXNTO__)
+gceSTATUS
+gckOS_UserSignal(
+    IN gckOS Os,
+    IN gctSIGNAL Signal,
+    IN gctINT Recvid,
+    IN gctINT Coid
+    );
+#else
+gceSTATUS
+gckOS_UserSignal(
+	IN gckOS Os,
+	IN gctSIGNAL Signal,
+	IN gctHANDLE Process
+	);
+#endif
+
+/******************************************************************************\
+** Cache Support
+*/
+
+gceSTATUS
+gckOS_CacheFlush(
+	gckOS Os,
+	gctHANDLE ProcessId,
+	gctPOINTER Logical,
+	gctSIZE_T Bytes
+	);
+
+gceSTATUS
+gckOS_CacheInvalidate(
+	gckOS Os,
+	gctHANDLE ProcessId,
+	gctPOINTER Logical,
+	gctSIZE_T Bytes
+	);
+
+/******************************************************************************\
+** Debug Support
+*/
+
+void
+gckOS_SetDebugLevel(
+	IN gctUINT32 Level
+	);
+
+void
+gckOS_SetDebugZone(
+	IN gctUINT32 Zone
+	);
+
+void
+gckOS_SetDebugLevelZone(
+	IN gctUINT32 Level,
+	IN gctUINT32 Zone
+	);
+
+void
+gckOS_SetDebugZones(
+	IN gctUINT32 Zones,
+	IN gctBOOL Enable
+	);
+
+void
+gckOS_SetDebugFile(
+	IN gctCONST_STRING FileName
+	);
+
+/******************************************************************************\
+********************************* gckHEAP Object ********************************
+\******************************************************************************/
+
+typedef struct _gckHEAP *		gckHEAP;
+
+/* Construct a new gckHEAP object. */
+gceSTATUS
+gckHEAP_Construct(
+	IN gckOS Os,
+	IN gctSIZE_T AllocationSize,
+	OUT gckHEAP * Heap
+	);
+
+/* Destroy an gckHEAP object. */
+gceSTATUS
+gckHEAP_Destroy(
+	IN gckHEAP Heap
+	);
+
+/* Allocate memory. */
+gceSTATUS
+gckHEAP_Allocate(
+	IN gckHEAP Heap,
+	IN gctSIZE_T Bytes,
+	OUT gctPOINTER * Node
+	);
+
+/* Free memory. */
+gceSTATUS
+gckHEAP_Free(
+	IN gckHEAP Heap,
+	IN gctPOINTER Node
+	);
+
+/* Profile the heap. */
+gceSTATUS
+gckHEAP_ProfileStart(
+	IN gckHEAP Heap
+	);
+
+gceSTATUS
+gckHEAP_ProfileEnd(
+	IN gckHEAP Heap,
+	IN gctCONST_STRING Title
+	);
+
+#if defined gcdHAL_TEST
+gceSTATUS
+gckHEAP_Test(
+	IN gckHEAP Heap,
+	IN gctSIZE_T Vectors,
+	IN gctSIZE_T MaxSize
+	);
+#endif
+
+/******************************************************************************\
+******************************** gckVIDMEM Object ******************************
+\******************************************************************************/
+
+typedef struct _gckVIDMEM *			gckVIDMEM;
+typedef union  _gcuVIDMEM_NODE *	gcuVIDMEM_NODE_PTR;
+typedef struct _gckHARDWARE *		gckHARDWARE;
+typedef struct _gckKERNEL *			gckKERNEL;
+
+/* Construct a new gckVIDMEM object. */
+gceSTATUS
+gckVIDMEM_Construct(
+	IN gckOS Os,
+	IN gctUINT32 BaseAddress,
+	IN gctSIZE_T Bytes,
+	IN gctSIZE_T Threshold,
+	IN gctSIZE_T Banking,
+	OUT gckVIDMEM * Memory
+	);
+
+/* Destroy an gckVDIMEM object. */
+gceSTATUS
+gckVIDMEM_Destroy(
+	IN gckVIDMEM Memory
+	);
+
+/* Allocate rectangular memory. */
+gceSTATUS
+gckVIDMEM_Allocate(
+	IN gckVIDMEM Memory,
+	IN gctUINT Width,
+	IN gctUINT Height,
+	IN gctUINT Depth,
+	IN gctUINT BytesPerPixel,
+	IN gctUINT32 Alignment,
+	IN gceSURF_TYPE Type,
+#ifdef __QNXNTO__
+	IN gctHANDLE Handle,
+#endif
+	OUT gcuVIDMEM_NODE_PTR * Node
+	);
+
+/* Allocate linear memory. */
+gceSTATUS
+gckVIDMEM_AllocateLinear(
+	IN gckVIDMEM Memory,
+	IN gctSIZE_T Bytes,
+	IN gctUINT32 Alignment,
+	IN gceSURF_TYPE Type,
+#ifdef __QNXNTO__
+	IN gctHANDLE Handle,
+#endif
+	OUT gcuVIDMEM_NODE_PTR * Node
+	);
+
+/* Free memory. */
+gceSTATUS
+gckVIDMEM_Free(
+	IN gcuVIDMEM_NODE_PTR Node
+	);
+
+/* Lock memory. */
+gceSTATUS
+gckVIDMEM_Lock(
+	IN gcuVIDMEM_NODE_PTR Node,
+	OUT gctUINT32 * Address
+	);
+
+/* Unlock memory. */
+gceSTATUS
+gckVIDMEM_Unlock(
+	IN gcuVIDMEM_NODE_PTR Node,
+	IN gceSURF_TYPE Type,
+	IN OUT gctBOOL * Asynchroneous
+	);
+
+/* Construct a gcuVIDMEM_NODE union for virtual memory. */
+gceSTATUS
+gckVIDMEM_ConstructVirtual(
+	IN gckKERNEL Kernel,
+	IN gctBOOL Contiguous,
+	IN gctSIZE_T Bytes,
+#ifdef __QNXNTO__
+	IN gctHANDLE Handle,
+#endif
+	OUT gcuVIDMEM_NODE_PTR * Node
+	);
+
+/* Destroy a gcuVIDMEM_NODE union for virtual memory. */
+gceSTATUS
+gckVIDMEM_DestroyVirtual(
+	IN gcuVIDMEM_NODE_PTR Node
+	);
+
+#ifdef __QNXNTO__
+/* Set the allocating process' PID for this node. */
+gceSTATUS
+gckVIDMEM_SetPID(
+	IN gcuVIDMEM_NODE_PTR Node,
+	IN gctUINT32 Pid);
+#endif
+
+/******************************************************************************\
+******************************** gckKERNEL Object ******************************
+\******************************************************************************/
+
+struct _gcsHAL_INTERFACE;
+
+/* Notifications. */
+typedef enum _gceNOTIFY
+{
+	gcvNOTIFY_INTERRUPT,
+	gcvNOTIFY_COMMAND_QUEUE,
+}
+gceNOTIFY;
+
+/* Event locations. */
+typedef enum _gceKERNEL_WHERE
+{
+	gcvKERNEL_COMMAND,
+	gcvKERNEL_VERTEX,
+	gcvKERNEL_TRIANGLE,
+	gcvKERNEL_TEXTURE,
+	gcvKERNEL_PIXEL,
+}
+gceKERNEL_WHERE;
+
+/* Flush flags. */
+typedef enum _gceKERNEL_FLUSH
+{
+	gcvFLUSH_COLOR				= 0x01,
+	gcvFLUSH_DEPTH				= 0x02,
+	gcvFLUSH_TEXTURE			= 0x04,
+	gcvFLUSH_2D					= 0x08,
+}
+gceKERNEL_FLUSH;
+
+/* Construct a new gckKERNEL object. */
+gceSTATUS
+gckKERNEL_Construct(
+	IN gckOS Os,
+	IN gctPOINTER Context,
+	OUT gckKERNEL * Kernel
+	);
+
+/* Destroy an gckKERNEL object. */
+gceSTATUS
+gckKERNEL_Destroy(
+	IN gckKERNEL Kernel
+	);
+
+/* Dispatch a user-level command. */
+gceSTATUS
+gckKERNEL_Dispatch(
+	IN gckKERNEL Kernel,
+	IN gctBOOL FromUser,
+	IN OUT struct _gcsHAL_INTERFACE * Interface
+	);
+
+/* Query the video memory. */
+gceSTATUS
+gckKERNEL_QueryVideoMemory(
+	IN gckKERNEL Kernel,
+	OUT struct _gcsHAL_INTERFACE * Interface
+	);
+
+/* Lookup the gckVIDMEM object for a pool. */
+gceSTATUS
+gckKERNEL_GetVideoMemoryPool(
+	IN gckKERNEL Kernel,
+	IN gcePOOL Pool,
+	OUT gckVIDMEM * VideoMemory
+	);
+
+/* Map video memory. */
+gceSTATUS
+gckKERNEL_MapVideoMemory(
+	IN gckKERNEL Kernel,
+	IN gctBOOL InUserSpace,
+	IN gctUINT32 Address,
+#ifdef __QNXNTO__
+	IN gctUINT32 Pid,
+	IN gctUINT32 Bytes,
+#endif
+	OUT gctPOINTER * Logical
+	);
+
+#ifdef __QNXNTO__
+/* Unmap video memory. */
+gceSTATUS
+gckKERNEL_UnmapVideoMemory(
+	IN gckKERNEL Kernel,
+	IN gctPOINTER Logical,
+	IN gctUINT32 Pid,
+	IN gctUINT32 Bytes
+	);
+#endif
+
+/* Map memory. */
+gceSTATUS
+gckKERNEL_MapMemory(
+	IN gckKERNEL Kernel,
+	IN gctPHYS_ADDR Physical,
+	IN gctSIZE_T Bytes,
+	OUT gctPOINTER * Logical
+	);
+
+/* Unmap memory. */
+gceSTATUS
+gckKERNEL_UnmapMemory(
+	IN gckKERNEL Kernel,
+	IN gctPHYS_ADDR Physical,
+	IN gctSIZE_T Bytes,
+	IN gctPOINTER Logical
+	);
+
+/* Notification of events. */
+gceSTATUS
+gckKERNEL_Notify(
+	IN gckKERNEL Kernel,
+	IN gceNOTIFY Notifcation,
+	IN gctBOOL Data
+	);
+
+gceSTATUS
+gckKERNEL_QuerySettings(
+	IN gckKERNEL Kernel,
+	OUT gcsKERNEL_SETTINGS * Settings
+	);
+
+/******************************************************************************\
+******************************* gckHARDWARE Object *****************************
+\******************************************************************************/
+
+/* Construct a new gckHARDWARE object. */
+gceSTATUS
+gckHARDWARE_Construct(
+	IN gckOS Os,
+	OUT gckHARDWARE * Hardware
+	);
+
+/* Destroy an gckHARDWARE object. */
+gceSTATUS
+gckHARDWARE_Destroy(
+	IN gckHARDWARE Hardware
+	);
+
+/* Query system memory requirements. */
+gceSTATUS
+gckHARDWARE_QuerySystemMemory(
+	IN gckHARDWARE Hardware,
+	OUT gctSIZE_T * SystemSize,
+	OUT gctUINT32 * SystemBaseAddress
+	);
+
+/* Build virtual address. */
+gceSTATUS
+gckHARDWARE_BuildVirtualAddress(
+	IN gckHARDWARE Hardware,
+	IN gctUINT32 Index,
+	IN gctUINT32 Offset,
+	OUT gctUINT32 * Address
+	);
+
+/* Query command buffer requirements. */
+gceSTATUS
+gckHARDWARE_QueryCommandBuffer(
+	IN gckHARDWARE Hardware,
+	OUT gctSIZE_T * Alignment,
+	OUT gctSIZE_T * ReservedHead,
+	OUT gctSIZE_T * ReservedTail
+	);
+
+/* Add a WAIT/LINK pair in the command queue. */
+gceSTATUS
+gckHARDWARE_WaitLink(
+	IN gckHARDWARE Hardware,
+	IN gctPOINTER Logical,
+	IN gctUINT32 Offset,
+	IN OUT gctSIZE_T * Bytes,
+	OUT gctPOINTER * Wait,
+	OUT gctSIZE_T * WaitBytes
+	);
+
+/* Kickstart the command processor. */
+gceSTATUS
+gckHARDWARE_Execute(
+	IN gckHARDWARE Hardware,
+	IN gctPOINTER Logical,
+#ifdef __QNXNTO__
+    IN gctPOINTER Physical,
+	IN gctBOOL PhysicalAddresses,
+#endif
+	IN gctSIZE_T Bytes
+	);
+
+/* Add an END command in the command queue. */
+gceSTATUS
+gckHARDWARE_End(
+	IN gckHARDWARE Hardware,
+	IN gctPOINTER Logical,
+	IN OUT gctSIZE_T * Bytes
+	);
+
+/* Add a NOP command in the command queue. */
+gceSTATUS
+gckHARDWARE_Nop(
+	IN gckHARDWARE Hardware,
+	IN gctPOINTER Logical,
+	IN OUT gctSIZE_T * Bytes
+	);
+
+/* Add a WAIT command in the command queue. */
+gceSTATUS
+gckHARDWARE_Wait(
+	IN gckHARDWARE Hardware,
+	IN gctPOINTER Logical,
+	IN gctUINT32 Count,
+	IN OUT gctSIZE_T * Bytes
+	);
+
+/* Add a PIPESELECT command in the command queue. */
+gceSTATUS
+gckHARDWARE_PipeSelect(
+	IN gckHARDWARE Hardware,
+	IN gctPOINTER Logical,
+	IN gctUINT32 Pipe,
+	IN OUT gctSIZE_T * Bytes
+	);
+
+/* Add a LINK command in the command queue. */
+gceSTATUS
+gckHARDWARE_Link(
+	IN gckHARDWARE Hardware,
+	IN gctPOINTER Logical,
+	IN gctPOINTER FetchAddress,
+	IN gctSIZE_T FetchSize,
+	IN OUT gctSIZE_T * Bytes
+	);
+
+/* Add an EVENT command in the command queue. */
+gceSTATUS
+gckHARDWARE_Event(
+	IN gckHARDWARE Hardware,
+	IN gctPOINTER Logical,
+	IN gctUINT8 Event,
+	IN gceKERNEL_WHERE FromWhere,
+	IN OUT gctSIZE_T * Bytes
+	);
+
+/* Query the available memory. */
+gceSTATUS
+gckHARDWARE_QueryMemory(
+	IN gckHARDWARE Hardware,
+	OUT gctSIZE_T * InternalSize,
+	OUT gctUINT32 * InternalBaseAddress,
+	OUT gctUINT32 * InternalAlignment,
+	OUT gctSIZE_T * ExternalSize,
+	OUT gctUINT32 * ExternalBaseAddress,
+	OUT gctUINT32 * ExternalAlignment,
+	OUT gctUINT32 * HorizontalTileSize,
+	OUT gctUINT32 * VerticalTileSize
+	);
+
+/* Query the identity of the hardware. */
+gceSTATUS
+gckHARDWARE_QueryChipIdentity(
+    IN gckHARDWARE Hardware,
+	OUT gceCHIPMODEL* ChipModel,
+	OUT gctUINT32* ChipRevision,
+	OUT gctUINT32* ChipFeatures,
+	OUT gctUINT32* ChipMinorFeatures,
+	OUT gctUINT32* ChipMinorFeatures1
+	);
+
+/* Query the specifications sof the hardware. */
+gceSTATUS
+gckHARDWARE_QueryChipSpecs(
+	IN gckHARDWARE Hardware,
+	OUT gctUINT32_PTR StreamCount,
+	OUT gctUINT32_PTR RegisterMax,
+	OUT gctUINT32_PTR ThreadCount,
+	OUT gctUINT32_PTR ShaderCoreCount,
+	OUT gctUINT32_PTR VertexCacheSize,
+	OUT gctUINT32_PTR VertexOutputBufferSize
+	);
+
+/* Convert an API format. */
+gceSTATUS
+gckHARDWARE_ConvertFormat(
+	IN gckHARDWARE Hardware,
+	IN gceSURF_FORMAT Format,
+	OUT gctUINT32 * BitsPerPixel,
+	OUT gctUINT32 * BytesPerTile
+	);
+
+/* Split a harwdare specific address into API stuff. */
+gceSTATUS
+gckHARDWARE_SplitMemory(
+	IN gckHARDWARE Hardware,
+	IN gctUINT32 Address,
+	OUT gcePOOL * Pool,
+	OUT gctUINT32 * Offset
+	);
+
+/* Align size to tile boundary. */
+gceSTATUS
+gckHARDWARE_AlignToTile(
+	IN gckHARDWARE Hardware,
+	IN gceSURF_TYPE Type,
+	IN OUT gctUINT32_PTR Width,
+	IN OUT gctUINT32_PTR Height,
+	OUT gctBOOL_PTR SuperTiled
+	);
+
+/* Update command queue tail pointer. */
+gceSTATUS
+gckHARDWARE_UpdateQueueTail(
+	IN gckHARDWARE Hardware,
+	IN gctPOINTER Logical,
+	IN gctUINT32 Offset
+	);
+
+/* Convert logical address to hardware specific address. */
+gceSTATUS
+gckHARDWARE_ConvertLogical(
+	IN gckHARDWARE Hardware,
+	IN gctPOINTER Logical,
+	OUT gctUINT32 * Address
+	);
+
+#ifdef __QNXNTO__
+/* Convert physical address to hardware specific address. */
+gceSTATUS
+gckHARDWARE_ConvertPhysical(
+	IN gckHARDWARE Hardware,
+	IN gctPHYS_ADDR Physical,
+	OUT gctUINT32 * Address
+	);
+#endif
+
+/* Interrupt manager. */
+gceSTATUS
+gckHARDWARE_Interrupt(
+	IN gckHARDWARE Hardware,
+	IN gctBOOL InterruptValid
+	);
+
+/* Program MMU. */
+gceSTATUS
+gckHARDWARE_SetMMU(
+	IN gckHARDWARE Hardware,
+	IN gctPOINTER Logical
+	);
+
+/* Flush the MMU. */
+gceSTATUS
+gckHARDWARE_FlushMMU(
+	IN gckHARDWARE Hardware
+	);
+
+/* Get idle register. */
+gceSTATUS
+gckHARDWARE_GetIdle(
+	IN gckHARDWARE Hardware,
+	IN gctBOOL Wait,
+	OUT gctUINT32 * Data
+	);
+
+/* Flush the caches. */
+gceSTATUS
+gckHARDWARE_Flush(
+	IN gckHARDWARE Hardware,
+	IN gceKERNEL_FLUSH Flush,
+    IN gctPOINTER Logical,
+    IN OUT gctSIZE_T * Bytes
+	);
+
+/* Enable/disable fast clear. */
+gceSTATUS
+gckHARDWARE_SetFastClear(
+    IN gckHARDWARE Hardware,
+    IN gctINT Enable,
+	IN gctINT Compression
+    );
+
+gceSTATUS
+gckHARDWARE_ReadInterrupt(
+	IN gckHARDWARE Hardware,
+	OUT gctUINT32_PTR IDs
+	);
+
+/* Power management. */
+gceSTATUS
+gckHARDWARE_SetPowerManagementState(
+    IN gckHARDWARE Hardware,
+    IN gceCHIPPOWERSTATE State
+    );
+
+gceSTATUS
+gckHARDWARE_QueryPowerManagementState(
+    IN gckHARDWARE Hardware,
+    OUT gceCHIPPOWERSTATE* State
+    );
+
+/* Profile 2D Engine. */
+gceSTATUS
+gckHARDWARE_ProfileEngine2D(
+	IN gckHARDWARE Hardware,
+	OUT gcs2D_PROFILE_PTR Profile
+	);
+
+gceSTATUS
+gckHARDWARE_InitializeHardware(
+    IN gckHARDWARE Hardware
+	);
+
+gceSTATUS
+gckHARDWARE_Reset(
+	IN gckHARDWARE Hardware
+	);
+
+/******************************************************************************\
+***************************** gckINTERRUPT Object ******************************
+\******************************************************************************/
+
+typedef struct _gckINTERRUPT *	gckINTERRUPT;
+
+typedef gceSTATUS (* gctINTERRUPT_HANDLER)(
+	IN gckKERNEL Kernel
+	);
+
+gceSTATUS
+gckINTERRUPT_Construct(
+	IN gckKERNEL Kernel,
+	OUT gckINTERRUPT * Interrupt
+	);
+
+gceSTATUS
+gckINTERRUPT_Destroy(
+	IN gckINTERRUPT Interrupt
+	);
+
+gceSTATUS
+gckINTERRUPT_SetHandler(
+	IN gckINTERRUPT Interrupt,
+	IN OUT gctINT32_PTR Id,
+	IN gctINTERRUPT_HANDLER Handler
+	);
+
+gceSTATUS
+gckINTERRUPT_Notify(
+	IN gckINTERRUPT Interrupt,
+	IN gctBOOL Valid
+	);
+
+/******************************************************************************\
+******************************** gckEVENT Object *******************************
+\******************************************************************************/
+
+typedef struct _gckEVENT *		gckEVENT;
+
+/* Construct a new gckEVENT object. */
+gceSTATUS
+gckEVENT_Construct(
+	IN gckKERNEL Kernel,
+	OUT gckEVENT * Event
+	);
+
+/* Destroy an gckEVENT object. */
+gceSTATUS
+gckEVENT_Destroy(
+	IN gckEVENT Event
+	);
+
+/* Schedule a FreeNonPagedMemory event. */
+gceSTATUS
+gckEVENT_FreeNonPagedMemory(
+	IN gckEVENT Event,
+	IN gctSIZE_T Bytes,
+	IN gctPHYS_ADDR Physical,
+	IN gctPOINTER Logical,
+	IN gceKERNEL_WHERE FromWhere
+	);
+
+/* Schedule a FreeContiguousMemory event. */
+gceSTATUS
+gckEVENT_FreeContiguousMemory(
+	IN gckEVENT Event,
+	IN gctSIZE_T Bytes,
+	IN gctPHYS_ADDR Physical,
+	IN gctPOINTER Logical,
+	IN gceKERNEL_WHERE FromWhere
+	);
+
+/* Schedule a FreeVideoMemory event. */
+gceSTATUS
+gckEVENT_FreeVideoMemory(
+	IN gckEVENT Event,
+	IN gcuVIDMEM_NODE_PTR VideoMemory,
+	IN gceKERNEL_WHERE FromWhere
+	);
+
+/* Schedule a signal event. */
+gceSTATUS
+gckEVENT_Signal(
+	IN gckEVENT Event,
+	IN gctSIGNAL Signal,
+	IN gceKERNEL_WHERE FromWhere,
+	IN gctBOOL Locking
+	);
+
+/* Schedule an Unlock event. */
+gceSTATUS
+gckEVENT_Unlock(
+	IN gckEVENT Event,
+	IN gceKERNEL_WHERE FromWhere,
+	IN gcuVIDMEM_NODE_PTR Node,
+	IN gceSURF_TYPE Type
+	);
+
+gceSTATUS
+gckEVENT_Submit(
+	IN gckEVENT Event,
+	IN gctBOOL Wait,
+	IN gctBOOL Locking
+	);
+
+struct _gcsQUEUE;
+
+/* Commit an event queue. */
+gceSTATUS
+gckEVENT_Commit(
+	IN gckEVENT Event,
+	IN struct _gcsQUEUE * Queue
+	);
+
+/* Event callback routine. */
+gceSTATUS
+gckEVENT_Notify(
+	IN gckEVENT Event,
+	IN gctBOOL IsReset
+	);
+
+/* Event callback routine. */
+gceSTATUS
+gckEVENT_Interrupt(
+	IN gckEVENT Event,
+	IN gctUINT32 IDs
+	);
+
+/* Try to set idle */
+gceSTATUS
+gckEVENT_TryToSetIdle(
+	IN gckEVENT Event
+	);
+/******************************************************************************\
+******************************* gckCOMMAND Object ******************************
+\******************************************************************************/
+
+typedef struct _gckCOMMAND *		gckCOMMAND;
+
+/* Construct a new gckCOMMAND object. */
+gceSTATUS
+gckCOMMAND_Construct(
+	IN gckKERNEL Kernel,
+	OUT gckCOMMAND * Command
+	);
+
+/* Destroy an gckCOMMAND object. */
+gceSTATUS
+gckCOMMAND_Destroy(
+	IN gckCOMMAND Command
+	);
+
+/* Start the command queue. */
+gceSTATUS
+gckCOMMAND_Start(
+	IN gckCOMMAND Command
+	);
+
+/* Stop the command queue. */
+gceSTATUS
+gckCOMMAND_Stop(
+	IN gckCOMMAND Command
+	);
+
+/* Commit a buffer to the command queue. */
+gceSTATUS
+gckCOMMAND_Commit(
+	IN gckCOMMAND Command,
+	IN gcoCMDBUF CommandBuffer,
+	IN gcoCONTEXT Context,
+    IN gctHANDLE Process
+	);
+
+/* Reserve space in the command buffer. */
+gceSTATUS
+gckCOMMAND_Reserve(
+	IN gckCOMMAND Command,
+	IN gctSIZE_T RequestedBytes,
+	IN gctBOOL Locking,
+	OUT gctPOINTER * Buffer,
+	OUT gctSIZE_T * BufferSize
+	);
+
+/* Release reserved space in the command buffer. */
+gceSTATUS
+gckCOMMAND_Release(
+	IN gckCOMMAND Command
+	);
+
+/* Execute reserved space in the command buffer. */
+gceSTATUS
+gckCOMMAND_Execute(
+	IN gckCOMMAND Command,
+	IN gctSIZE_T RequstedBytes,
+	IN gctBOOL Locking
+	);
+
+/* Stall the command queue. */
+gceSTATUS
+gckCOMMAND_Stall(
+	IN gckCOMMAND Command
+	);
+
+/******************************************************************************\
+********************************* gckMMU Object ********************************
+\******************************************************************************/
+
+typedef struct _gckMMU *			gckMMU;
+
+/* Construct a new gckMMU object. */
+gceSTATUS
+gckMMU_Construct(
+	IN gckKERNEL Kernel,
+	IN gctSIZE_T MmuSize,
+	OUT gckMMU * Mmu
+	);
+
+/* Destroy an gckMMU object. */
+gceSTATUS
+gckMMU_Destroy(
+	IN gckMMU Mmu
+	);
+
+/* Allocate pages inside the MMU. */
+gceSTATUS
+gckMMU_AllocatePages(
+	IN gckMMU Mmu,
+	IN gctSIZE_T PageCount,
+	OUT gctPOINTER * PageTable,
+	OUT gctUINT32 * Address
+	);
+
+/* Remove a page table from	the MMU. */
+gceSTATUS
+gckMMU_FreePages(
+	IN gckMMU Mmu,
+	IN gctPOINTER PageTable,
+	IN gctSIZE_T PageCount
+	);
+
+#ifdef __QNXNTO__
+gceSTATUS
+gckMMU_InsertNode(
+    IN gckMMU Mmu,
+    IN gcuVIDMEM_NODE_PTR Node);
+
+gceSTATUS
+gckMMU_RemoveNode(
+    IN gckMMU Mmu,
+    IN gcuVIDMEM_NODE_PTR Node);
+#endif
+
+#ifdef __QNXNTO__
+gceSTATUS
+gckMMU_FreeHandleMemory(
+    IN gckMMU Mmu,
+    IN gctHANDLE Handle
+    );
+#endif
+
+#if defined gcdHAL_TEST
+gceSTATUS
+gckMMU_Test(
+	IN gckMMU Mmu,
+	IN gctSIZE_T Vectors,
+	IN gctINT MaxSize
+	);
+#endif
+
+gceSTATUS
+gckHARDWARE_QueryProfileRegisters(
+	IN gckHARDWARE Hardware,
+    OUT gcsPROFILER_COUNTERS * Counters
+	);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __gc_hal_h_ */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gc_hal_mem.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gc_hal_mem.h
@@ -0,0 +1,472 @@
+/****************************************************************************
+*
+*    Copyright (C) 2005 - 2010 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public License as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+/*
+**	Include file for the local memory management.
+*/
+
+#ifndef __gc_hal_mem_h_
+#define __gc_hal_mem_h_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+#if 0
+*******************************************************************************
+**  Usage:
+
+	The macros to declare MemPool type and functions are
+	gcmMEM_DeclareFSMemPool (Type, TypeName, Prefix)
+	gcmMEM_DeclareVSMemPool (Type, TypeName, Prefix)
+	gcmMEM_DeclareAFSMemPool(Type, TypeName, Prefix)
+
+	The data structures for MemPool are
+	typedef struct _gcsMEM_FS_MEM_POOL *	gcsMEM_FS_MEM_POOL;
+	typedef struct _gcsMEM_VS_MEM_POOL *	gcsMEM_VS_MEM_POOL;
+	typedef struct _gcsMEM_AFS_MEM_POOL *	gcsMEM_AFS_MEM_POOL;
+
+	The MemPool constructor and destructor functions are
+	gcfMEM_InitFSMemPool(gcsMEM_FS_MEM_POOL *, gcoOS, gctUINT, gctUINT);
+	gcfMEM_FreeFSMemPool(gcsMEM_FS_MEM_POOL *);
+	gcfMEM_InitVSMemPool(gcsMEM_VS_MEM_POOL *, gcoOS, gctUINT, gctBOOL);
+	gcfMEM_FreeVSMemPool(gcsMEM_VS_MEM_POOL *);
+	gcfMEM_InitAFSMemPool(gcsMEM_AFS_MEM_POOL *, gcoOS, gctUINT);
+	gcfMEM_FreeAFSMemPool(gcsMEM_AFS_MEM_POOL *);
+
+	FS:  for Fixed-Size data structures
+	VS:  for Variable-size data structures
+	AFS: for Array of Fixed-Size data structures
+
+
+	 /*  Example 1: For a fixed-size data structure, struct gcsNode. */
+	 /*  It is used locally in a file, so the functions are static without prefix. */
+	 /*  At top level, declear allocate and free functions. */
+	 /*  The first argument is the data type. */
+	 /*  The second armument is the short name used in the fuctions. */
+	gcmMEM_DeclareFSMemPool(struct gcsNode, Node, );
+
+	 /*  The previous macro creates two inline functions, */
+	 /*  _AllocateNode and _FreeNode. */
+
+	 /*  In function or struct */
+	gcsMEM_FS_MEM_POOL nodeMemPool;
+
+	 /*  In function, */
+	struct gcsNode * node;
+	gceSTATUS status;
+
+	 /*  Before using the memory pool, initialize it. */
+	 /*  The second argument is the gcoOS object. */
+	 /*  The third argument is the number of data structures to allocate for each chunk. */
+	status = gcfMEM_InitFSMemPool(&nodeMemPool, os, 100, sizeof(struct gcsNode));
+	...
+
+	 /*  Allocate a node. */
+	status = _AllocateNode(nodeMemPool, &node);
+	...
+	 /*  Free a node. */
+	_FreeNode(nodeMemPool, node);
+
+	 /*  After using the memory pool, free it. */
+	gcfMEM_FreeFSMemPool(&nodeMemPool);
+
+
+	 /*  Example 2: For array of fixed-size data structures, struct gcsNode. */
+	 /*  It is used in several files, so the functions are extern with prefix. */
+	 /*  At top level, declear allocate and free functions. */
+	 /*  The first argument is the data type, and the second one is the short name */
+	 /*  used in the fuctions. */
+	gcmMEM_DeclareAFSMemPool(struct gcsNode, NodeArray, gcfOpt);
+
+	 /*  The previous macro creates two inline functions, */
+	 /*  gcfOpt_AllocateNodeArray and gcfOpt_FreeNodeArray. */
+
+	 /*  In function or struct */
+	gcsMEM_AFS_MEM_POOL nodeArrayMemPool;
+
+	 /*  In function, */
+	struct gcsNode * nodeArray;
+	gceSTATUS status;
+
+	 /*  Before using the array memory pool, initialize it. */
+	 /*  The second argument is the gcoOS object, the third is the number of data */
+	 /*  structures to allocate for each chunk. */
+	status = gcfMEM_InitAFSMemPool(&nodeArrayMemPool, os, sizeof(struct gcsNode));
+	...
+
+	 /*  Allocate a node array of size 100. */
+	status = gcfOpt_AllocateNodeArray(nodeArrayMemPool, &nodeArray, 100);
+	...
+	 /*  Free a node array. */
+	gcfOpt_FreeNodeArray(&nodeArrayMemPool, nodeArray);
+
+	 /*  After using the array memory pool, free it. */
+	gcfMEM_FreeAFSMemPool(&nodeArrayMemPool);
+
+*******************************************************************************
+#endif
+
+/*******************************************************************************
+**	To switch back to use gcoOS_Allocate and gcoOS_Free, add
+**	#define USE_LOCAL_MEMORY_POOL 0
+**	before including this file.
+*******************************************************************************/
+#ifndef USE_LOCAL_MEMORY_POOL
+/*
+    USE_LOCAL_MEMORY_POOL
+
+    This define enables the local memory management to improve performance.
+*/
+#define USE_LOCAL_MEMORY_POOL		1
+#endif
+
+/*******************************************************************************
+**							Memory Pool Data Structures
+*******************************************************************************/
+#if USE_LOCAL_MEMORY_POOL
+	typedef struct _gcsMEM_FS_MEM_POOL *	gcsMEM_FS_MEM_POOL;
+	typedef struct _gcsMEM_VS_MEM_POOL *	gcsMEM_VS_MEM_POOL;
+	typedef struct _gcsMEM_AFS_MEM_POOL *	gcsMEM_AFS_MEM_POOL;
+#else
+	typedef gcoOS	gcsMEM_FS_MEM_POOL;
+	typedef gcoOS	gcsMEM_VS_MEM_POOL;
+	typedef gcoOS	gcsMEM_AFS_MEM_POOL;
+#endif
+
+/*******************************************************************************
+**							Memory Pool Macros
+*******************************************************************************/
+#if USE_LOCAL_MEMORY_POOL
+#define gcmMEM_DeclareFSMemPool(Type, TypeName, Prefix) \
+gceSTATUS \
+Prefix##_Allocate##TypeName( \
+	gcsMEM_FS_MEM_POOL		MemPool, \
+	Type **					Pointer \
+	) \
+{ \
+	return(gcfMEM_FSMemPoolGetANode(MemPool, (gctPOINTER *) Pointer)); \
+} \
+ \
+gceSTATUS \
+Prefix##_CAllocate##TypeName( \
+	gcsMEM_FS_MEM_POOL		MemPool, \
+	Type **					Pointer \
+	) \
+{ \
+	gceSTATUS				status; \
+	gcmERR_RETURN(gcfMEM_FSMemPoolGetANode(MemPool, (gctPOINTER *) Pointer)); \
+	gcmVERIFY_OK(gcoOS_ZeroMemory(*(gctPOINTER *) Pointer, gcmSIZEOF(Type))); \
+	return gcvSTATUS_OK; \
+} \
+ \
+gceSTATUS \
+Prefix##_Free##TypeName( \
+	gcsMEM_FS_MEM_POOL		MemPool, \
+	Type *					Pointer \
+	) \
+{ \
+	return(gcfMEM_FSMemPoolFreeANode(MemPool, (gctPOINTER) Pointer)); \
+} \
+ \
+gceSTATUS \
+Prefix##_Free##TypeName##List( \
+	gcsMEM_FS_MEM_POOL		MemPool, \
+	Type *					FirstPointer, \
+	Type *					LastPointer \
+	) \
+{ \
+	return(gcfMEM_FSMemPoolFreeAList(MemPool, (gctPOINTER) FirstPointer, (gctPOINTER) LastPointer)); \
+}
+
+#define gcmMEM_DeclareVSMemPool(Type, TypeName, Prefix) \
+gceSTATUS \
+Prefix##_Allocate##TypeName( \
+	gcsMEM_FS_MEM_POOL		MemPool, \
+	Type **					Pointer, \
+	gctUINT					Size \
+	) \
+{ \
+	return(gcfMEM_VSMemPoolGetANode(MemPool, Size, (gctPOINTER *) Pointer)); \
+} \
+ \
+gceSTATUS \
+ Prefix##_CAllocate##TypeName( \
+	gcsMEM_FS_MEM_POOL		MemPool, \
+	Type **					Pointer, \
+	gctUINT					Size \
+	) \
+{ \
+	gceSTATUS				status; \
+	gcmERR_RETURN(gcfMEM_VSMemPoolGetANode(MemPool, Size, (gctPOINTER *) Pointer)); \
+	gcmVERIFY_OK(gcoOS_ZeroMemory(*(gctPOINTER *) Pointer, size)); \
+	return gcvSTATUS_OK; \
+} \
+ \
+gceSTATUS \
+Prefix##_Free##TypeName( \
+	gcsMEM_FS_MEM_POOL		MemPool, \
+	Type *					Pointer \
+	) \
+{ \
+	return(gcfMEM_VSMemPoolFreeANode(MemPool, (gctPOINTER) Pointer)); \
+}
+
+#define gcmMEM_DeclareAFSMemPool(Type, TypeName, Prefix) \
+gceSTATUS \
+Prefix##_Allocate##TypeName( \
+	gcsMEM_AFS_MEM_POOL		MemPool, \
+	Type **					Pointer, \
+	gctUINT					Count \
+	) \
+{ \
+	return(gcfMEM_AFSMemPoolGetANode(MemPool, Count, (gctPOINTER *) Pointer)); \
+} \
+ \
+gceSTATUS \
+Prefix##_CAllocate##TypeName( \
+	gcsMEM_AFS_MEM_POOL		MemPool, \
+	Type **					Pointer, \
+	gctUINT					Count \
+	) \
+{ \
+	gceSTATUS				status; \
+	gcmERR_RETURN(gcfMEM_AFSMemPoolGetANode(MemPool, Count, (gctPOINTER *) Pointer)); \
+	gcmVERIFY_OK(gcoOS_ZeroMemory(*(gctPOINTER *) Pointer, Count * gcmSIZEOF(Type))); \
+	return gcvSTATUS_OK; \
+} \
+ \
+gceSTATUS \
+Prefix##_Free##TypeName( \
+	gcsMEM_AFS_MEM_POOL		MemPool, \
+	Type *					Pointer \
+	) \
+{ \
+	return(gcfMEM_AFSMemPoolFreeANode(MemPool, (gctPOINTER) Pointer)); \
+}
+
+#else
+
+#define gcmMEM_DeclareFSMemPool(Type, TypeName, Prefix) \
+gceSTATUS \
+Prefix##_Allocate##TypeName( \
+	gcsMEM_FS_MEM_POOL		MemPool, \
+	Type **					Pointer \
+	) \
+{ \
+	return(gcoOS_Allocate(MemPool, \
+							gcmSIZEOF(Type), \
+							(gctPOINTER *) Pointer)); \
+} \
+ \
+gceSTATUS \
+Prefix##_CAllocate##TypeName( \
+	gcsMEM_FS_MEM_POOL		MemPool, \
+	Type **					Pointer \
+	) \
+{ \
+	gceSTATUS				status; \
+	gcmERR_RETURN(gcoOS_Allocate(MemPool, \
+							gcmSIZEOF(Type), \
+							(gctPOINTER *) Pointer)); \
+	gcmVERIFY_OK(gcoOS_ZeroMemory(*(gctPOINTER *) Pointer, gcmSIZEOF(Type))); \
+	return gcvSTATUS_OK; \
+} \
+ \
+gceSTATUS \
+Prefix##_Free##TypeName( \
+	gcsMEM_FS_MEM_POOL		MemPool, \
+	Type *					Pointer \
+	) \
+{ \
+	return(gcoOS_Free(MemPool, Pointer)); \
+}
+
+#define gcmMEM_DeclareVSMemPool(Type, TypeName, Prefix) \
+gceSTATUS \
+Prefix##_Allocate##TypeName( \
+	gcsMEM_VS_MEM_POOL		MemPool, \
+	Type **					Pointer, \
+	gctUINT					Size \
+	) \
+{ \
+	return(gcoOS_Allocate(MemPool, \
+							Size, \
+							(gctPOINTER *) Pointer)); \
+} \
+ \
+gceSTATUS \
+Prefix##_CAllocate##TypeName( \
+	gcsMEM_VS_MEM_POOL		MemPool, \
+	Type **					Pointer, \
+	gctUINT					Size \
+	) \
+{ \
+	gceSTATUS				status; \
+	gcmERR_RETURN(gcoOS_Allocate(MemPool, \
+							Size, \
+							(gctPOINTER *) Pointer)); \
+	gcmVERIFY_OK(gcoOS_ZeroMemory(*(gctPOINTER *) Pointer, Size)); \
+	return gcvSTATUS_OK; \
+} \
+ \
+gceSTATUS \
+Prefix##_Free##TypeName( \
+	gcsMEM_VS_MEM_POOL		MemPool, \
+	Type *					Pointer \
+	) \
+{ \
+	return(gcoOS_Free(MemPool, Pointer)); \
+}
+
+#define gcmMEM_DeclareAFSMemPool(Type, TypeName, Prefix) \
+gceSTATUS \
+Prefix##_Allocate##TypeName( \
+	gcsMEM_AFS_MEM_POOL		MemPool, \
+	Type **					Pointer, \
+	gctUINT					Count \
+	) \
+{ \
+	return(gcoOS_Allocate(MemPool, \
+							Count * gcmSIZEOF(Type), \
+							(gctPOINTER *) Pointer)); \
+} \
+ \
+gceSTATUS \
+Prefix##_CAllocate##TypeName( \
+	gcsMEM_AFS_MEM_POOL		MemPool, \
+	Type **					Pointer, \
+	gctUINT					Count \
+	) \
+{ \
+	gceSTATUS				status; \
+	gcmERR_RETURN(gcoOS_Allocate(MemPool, \
+							Count * gcmSIZEOF(Type), \
+							(gctPOINTER *) Pointer)); \
+	gcmVERIFY_OK(gcoOS_ZeroMemory(*(gctPOINTER *) Pointer, Count * gcmSIZEOF(Type))); \
+	return gcvSTATUS_OK; \
+} \
+ \
+gceSTATUS \
+Prefix##_Free##TypeName( \
+	gcsMEM_AFS_MEM_POOL		MemPool, \
+	Type *					Pointer \
+	) \
+{ \
+	return(gcoOS_Free(MemPool, Pointer)); \
+}
+#endif
+
+/*******************************************************************************
+**							Memory Pool Data Functions
+*******************************************************************************/
+gceSTATUS
+gcfMEM_InitFSMemPool(
+	IN gcsMEM_FS_MEM_POOL * MemPool,
+	IN gcoOS				OS,
+	IN gctUINT				NodeCount,
+	IN gctUINT				NodeSize
+	);
+
+gceSTATUS
+gcfMEM_FreeFSMemPool(
+	IN gcsMEM_FS_MEM_POOL * MemPool
+	);
+
+gceSTATUS
+gcfMEM_FSMemPoolGetANode(
+	IN gcsMEM_FS_MEM_POOL	MemPool,
+	OUT gctPOINTER *		Node
+	);
+
+gceSTATUS
+gcfMEM_FSMemPoolFreeANode(
+	IN gcsMEM_FS_MEM_POOL	MemPool,
+	IN gctPOINTER			Node
+	);
+
+gceSTATUS
+gcfMEM_FSMemPoolFreeAList(
+	IN gcsMEM_FS_MEM_POOL	MemPool,
+	IN gctPOINTER			FirstNode,
+	IN gctPOINTER			LastNode
+	);
+
+gceSTATUS
+gcfMEM_InitVSMemPool(
+	IN gcsMEM_VS_MEM_POOL * MemPool,
+	IN gcoOS				OS,
+	IN gctUINT				BlockSize,
+	IN gctBOOL				RecycleFreeNode
+	);
+
+gceSTATUS
+gcfMEM_FreeVSMemPool(
+	IN gcsMEM_VS_MEM_POOL * MemPool
+	);
+
+gceSTATUS
+gcfMEM_VSMemPoolGetANode(
+	IN gcsMEM_VS_MEM_POOL	MemPool,
+	IN gctUINT				Size,
+	IN gctUINT				Alignment,
+	OUT gctPOINTER *		Node
+	);
+
+gceSTATUS
+gcfMEM_VSMemPoolFreeANode(
+	IN gcsMEM_VS_MEM_POOL	MemPool,
+	IN gctPOINTER			Node
+	);
+
+gceSTATUS
+gcfMEM_InitAFSMemPool(
+	IN gcsMEM_AFS_MEM_POOL *MemPool,
+	IN gcoOS				OS,
+	IN gctUINT				NodeCount,
+	IN gctUINT				NodeSize
+	);
+
+gceSTATUS
+gcfMEM_FreeAFSMemPool(
+	IN gcsMEM_AFS_MEM_POOL *MemPool
+	);
+
+gceSTATUS
+gcfMEM_AFSMemPoolGetANode(
+	IN gcsMEM_AFS_MEM_POOL	MemPool,
+	IN gctUINT				Count,
+	OUT gctPOINTER *		Node
+	);
+
+gceSTATUS
+gcfMEM_AFSMemPoolFreeANode(
+	IN gcsMEM_AFS_MEM_POOL	MemPool,
+	IN gctPOINTER			Node
+	);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __gc_hal_mem_h_ */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gcHAL_3D.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gcHAL_3D.h
@@ -0,0 +1,1565 @@
+/****************************************************************************
+*
+*    Copyright (C) 2002 - 2008 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public Lisence as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+/*
+ * Include file for the 3D stuff.
+ */
+
+#ifndef __gchal_3d_h_
+#define __gchal_3d_h_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "aqTypes.h"
+#include "aqHalEnum.h"
+
+/******************************************************************************\
+****************************** Object Declarations *****************************
+\******************************************************************************/
+
+typedef struct _gcoSTREAM *				gcoSTREAM;
+typedef struct _gcoVERTEX *				gcoVERTEX;
+typedef struct _gcoTEXTURE *  			gcoTEXTURE;
+typedef struct _gcoINDEX *				gcoINDEX;
+typedef struct _gcsVERTEX_ATTRIBUTES *	gcsVERTEX_ATTRIBUTES_PTR;
+
+/******************************************************************************\
+********************************* Enumerations *********************************
+\******************************************************************************/
+
+/* Shading format. */
+typedef enum _gceSHADING
+{
+	gcvSHADING_SMOOTH,
+	gcvSHADING_FLAT_D3D,
+	gcvSHADING_FLAT_OPENGL,
+}
+gceSHADING;
+
+/* Culling modes. */
+typedef enum _gceCULL
+{
+	gcvCULL_NONE,
+	gcvCULL_CCW,
+	gcvCULL_CW,
+}
+gceCULL;
+
+/* Fill modes. */
+typedef enum _gceFILL
+{
+	gcvFILL_POINT,
+	gcvFILL_WIRE_FRAME,
+	gcvFILL_SOLID,
+}
+gceFILL;
+
+/* Compare modes. */
+typedef enum _gceCOMPARE
+{
+	gcvCOMPARE_NEVER,
+	gcvCOMPARE_NOT_EQUAL,
+	gcvCOMPARE_LESS,
+	gcvCOMPARE_LESS_OR_EQUAL,
+	gcvCOMPARE_EQUAL,
+	gcvCOMPARE_GREATER,
+	gcvCOMPARE_GREATER_OR_EQUAL,
+	gcvCOMPARE_ALWAYS,
+}
+gceCOMPARE;
+
+/* Stencil modes. */
+typedef enum _gceSTENCIL_MODE
+{
+	gcvSTENCIL_NONE,
+	gcvSTENCIL_SINGLE_SIDED,
+	gcvSTENCIL_DOUBLE_SIDED,
+}
+gceSTENCIL_MODE;
+
+/* Stencil operations. */
+typedef enum _gceSTENCIL_OPERATION
+{
+	gcvSTENCIL_KEEP,
+	gcvSTENCIL_REPLACE,
+	gcvSTENCIL_ZERO,
+	gcvSTENCIL_INVERT,
+	gcvSTENCIL_INCREMENT,
+	gcvSTENCIL_DECREMENT,
+	gcvSTENCIL_INCREMENT_SATURATE,
+	gcvSTENCIL_DECREMENT_SATURATE,
+}
+gceSTENCIL_OPERATION;
+
+/* Stencil selection. */
+typedef enum _gceSTENCIL_WHERE
+{
+	gcvSTENCIL_FRONT,
+	gcvSTENCIL_BACK,
+}
+gceSTENCIL_WHERE;
+
+/* Texture addressing selection. */
+typedef enum _gceTEXTURE_WHICH
+{
+	gcvTEXTURE_S,
+	gcvTEXTURE_T,
+	gcvTEXTURE_R,
+}
+gceTEXTURE_WHICH;
+
+/* Texture addressing modes. */
+typedef enum _gceTEXTURE_ADDRESSING
+{
+	gcvTEXTURE_WRAP,
+	gcvTEXTURE_CLAMP,
+	gcvTEXTURE_BORDER,
+	gcvTEXTURE_MIRROR,
+	gcvTEXTURE_MIRROR_ONCE,
+}
+gceTEXTURE_ADDRESSING;
+
+/* Texture filters. */
+typedef enum _gceTEXTURE_FILTER
+{
+	gcvTEXTURE_NONE,
+	gcvTEXTURE_POINT,
+	gcvTEXTURE_LINEAR,
+	gcvTEXTURE_ANISOTROPIC,
+}
+gceTEXTURE_FILTER;
+
+/* Primitive types. */
+typedef enum _gcePRIMITIVE
+{
+	gcvPRIMITIVE_POINT_LIST,
+	gcvPRIMITIVE_LINE_LIST,
+	gcvPRIMITIVE_LINE_STRIP,
+	gcvPRIMITIVE_LINE_LOOP,
+	gcvPRIMITIVE_TRIANGLE_LIST,
+	gcvPRIMITIVE_TRIANGLE_STRIP,
+	gcvPRIMITIVE_TRIANGLE_FAN,
+}
+gcePRIMITIVE;
+
+/* Index types. */
+typedef enum _gceINDEX_TYPE
+{
+	gcvINDEX_8,
+	gcvINDEX_16,
+	gcvINDEX_32,
+}
+gceINDEX_TYPE;
+
+/******************************************************************************\
+********************************* gcoHAL Object *********************************
+\******************************************************************************/
+
+/* Query the target capabilities. */
+gceSTATUS
+gcoHAL_QueryTargetCaps(
+	IN gcoHAL Hal,
+	OUT gctUINT * MaxWidth,
+	OUT gctUINT * MaxHeight,
+	OUT gctUINT * MultiTargetCount,
+	OUT gctUINT * MaxSamples
+	);
+
+gceSTATUS
+gcoHAL_SetDepthOnly(
+	IN gcoHAL Hal,
+	IN gctBOOL Enable
+	);
+
+gceSTATUS
+gcoHAL_QueryShaderCaps(
+	IN gcoHAL Hal,
+	OUT gctUINT * VertexUniforms,
+	OUT gctUINT * FragmentUniforms,
+	OUT gctUINT * Varyings
+	);
+
+gceSTATUS
+gcoHAL_QueryTextureCaps(
+	IN gcoHAL Hal,
+	OUT gctUINT * MaxWidth,
+	OUT gctUINT * MaxHeight,
+	OUT gctUINT * MaxDepth,
+	OUT gctBOOL * Cubic,
+	OUT gctBOOL * NonPowerOfTwo,
+	OUT gctUINT * VertexSamplers,
+	OUT gctUINT * PixelSamplers
+	);
+
+gceSTATUS
+gcoHAL_QueryStreamCaps(
+	IN gcoHAL Hal,
+	OUT gctUINT32 * MaxAttributes,
+	OUT gctUINT32 * MaxStreamSize,
+	OUT gctUINT32 * NumberOfStreams,
+	OUT gctUINT32 * Alignment
+	);
+
+/******************************************************************************\
+********************************* gcoSURF Object ********************************
+\******************************************************************************/
+
+/*----------------------------------------------------------------------------*/
+/*--------------------------------- gcoSURF 3D --------------------------------*/
+
+/* Copy surface. */
+gceSTATUS
+gcoSURF_Copy(
+	IN gcoSURF Surface,
+	IN gcoSURF Source
+	);
+
+/* Clear surface. */
+gceSTATUS
+gcoSURF_Clear(
+	IN gcoSURF Surface,
+	IN gctUINT Flags
+	);
+
+/* Set number of samples for a gcoSURF object. */
+gceSTATUS
+gcoSURF_SetSamples(
+	IN gcoSURF Surface,
+	IN gctUINT Samples
+	);
+
+/* Get the number of samples per pixel. */
+gceSTATUS
+gcoSURF_GetSamples(
+	IN gcoSURF Surface,
+	OUT gctUINT_PTR Samples
+	);
+
+/* Clear rectangular surface. */
+gceSTATUS
+gcoSURF_ClearRect(
+	IN gcoSURF Surface,
+	IN gctINT Left,
+	IN gctINT Top,
+	IN gctINT Right,
+	IN gctINT Bottom,
+	IN gctUINT Flags
+	);
+
+/* TO BE REMOVED */
+#if 1
+	gceSTATUS
+	depr_gcoSURF_Resolve(
+		IN gcoSURF SrcSurface,
+		IN gcoSURF DestSurface,
+		IN gctUINT32 DestAddress,
+		IN gctPOINTER DestBits,
+		IN gctINT DestStride,
+		IN gceSURF_TYPE DestType,
+		IN gceSURF_FORMAT DestFormat,
+		IN gctUINT DestWidth,
+		IN gctUINT DestHeight
+		);
+
+	gceSTATUS
+	depr_gcoSURF_ResolveRect(
+		IN gcoSURF SrcSurface,
+		IN gcoSURF DestSurface,
+		IN gctUINT32 DestAddress,
+		IN gctPOINTER DestBits,
+		IN gctINT DestStride,
+		IN gceSURF_TYPE DestType,
+		IN gceSURF_FORMAT DestFormat,
+		IN gctUINT DestWidth,
+		IN gctUINT DestHeight,
+		IN gcsPOINT_PTR SrcOrigin,
+		IN gcsPOINT_PTR DestOrigin,
+		IN gcsPOINT_PTR RectSize
+		);
+#endif
+
+/* Resample surface. */
+gceSTATUS
+gcoSURF_Resample(
+	IN gcoSURF SrcSurface,
+	IN gcoSURF DestSurface
+	);
+
+/* Resolve surface. */
+gceSTATUS
+gcoSURF_Resolve(
+	IN gcoSURF SrcSurface,
+	IN gcoSURF DestSurface
+	);
+
+/* Resolve rectangular area of a surface. */
+gceSTATUS
+gcoSURF_ResolveRect(
+	IN gcoSURF SrcSurface,
+	IN gcoSURF DestSurface,
+	IN gcsPOINT_PTR SrcOrigin,
+	IN gcsPOINT_PTR DestOrigin,
+	IN gcsPOINT_PTR RectSize
+	);
+
+/* Set surface resolvability. */
+gceSTATUS
+gcoSURF_SetResolvability(
+	IN gcoSURF Surface,
+	IN gctBOOL Resolvable
+	);
+
+/******************************************************************************\
+******************************** gcoINDEX Object *******************************
+\******************************************************************************/
+
+/* Construct a new gcoINDEX object. */
+gceSTATUS
+gcoINDEX_Construct(
+	IN gcoHAL Hal,
+	OUT gcoINDEX * Index
+	);
+
+/* Destroy a gcoINDEX object. */
+gceSTATUS
+gcoINDEX_Destroy(
+	IN gcoINDEX Index
+	);
+
+/* Lock index in memory. */
+gceSTATUS
+gcoINDEX_Lock(
+	IN gcoINDEX Index,
+	OUT gctUINT32 * Address,
+	OUT gctPOINTER * Memory
+	);
+
+/* Unlock index that was previously locked with gcoINDEX_Lock. */
+gceSTATUS
+gcoINDEX_Unlock(
+	IN gcoINDEX Index
+	);
+
+/* Upload index data into the memory. */
+gceSTATUS
+gcoINDEX_Load(
+	IN gcoINDEX Index,
+	IN gceINDEX_TYPE IndexType,
+	IN gctUINT32 IndexCount,
+	IN gctPOINTER IndexBuffer
+	);
+
+/* Bind an index object to the hardware. */
+gceSTATUS
+gcoINDEX_Bind(
+	IN gcoINDEX Index,
+	IN gceINDEX_TYPE Type
+	);
+
+/* Bind an index object to the hardware. */
+gceSTATUS
+gcoINDEX_BindOffset(
+	IN gcoINDEX Index,
+	IN gceINDEX_TYPE Type,
+	IN gctUINT32 Offset
+	);
+
+/* Free existing index buffer. */
+gceSTATUS
+gcoINDEX_Free(
+	IN gcoINDEX Index
+	);
+
+/* Upload data into an index buffer. */
+gceSTATUS
+gcoINDEX_Upload(
+	IN gcoINDEX Index,
+	IN gctCONST_POINTER Buffer,
+	IN gctSIZE_T Bytes
+	);
+
+/* Upload data into an index buffer starting at an offset. */
+gceSTATUS
+gcoINDEX_UploadOffset(
+	IN gcoINDEX Index,
+	IN gctUINT32 Offset,
+	IN gctCONST_POINTER Buffer,
+	IN gctSIZE_T Bytes
+	);
+
+/* Query the index capabilities. */
+gceSTATUS
+gcoINDEX_QueryCaps(
+	OUT gctBOOL * Index8,
+	OUT gctBOOL * Index16,
+	OUT gctBOOL * Index32,
+	OUT gctUINT * MaxIndex
+	);
+
+/* Determine the index range in the current index buffer. */
+gceSTATUS
+gcoINDEX_GetIndexRange(
+	IN gcoINDEX Index,
+	IN gceINDEX_TYPE Type,
+	IN gctUINT32 Offset,
+	IN gctUINT32 Count,
+	OUT gctUINT32 * MinimumIndex,
+	OUT gctUINT32 * MaximumIndex
+	);
+
+/* Dynamic buffer management. */
+gceSTATUS
+gcoINDEX_SetDynamic(
+	IN gcoINDEX Index,
+	IN gctSIZE_T Bytes,
+	IN gctUINT Buffers
+	);
+
+gceSTATUS
+gcoINDEX_UploadDynamic(
+	IN gcoINDEX Index,
+	IN gctCONST_POINTER Data,
+	IN gctSIZE_T Bytes
+	);
+
+/******************************************************************************\
+********************************** gco3D Object *********************************
+\******************************************************************************/
+
+/* Clear flags. */
+typedef enum _gceCLEAR
+{
+	gcvCLEAR_COLOR				= 0x1,
+	gcvCLEAR_DEPTH				= 0x2,
+	gcvCLEAR_STENCIL			= 0x4,
+	gcvCLEAR_HZ					= 0x8,
+	gcvCLEAR_HAS_VAA			= 0x10,
+}
+gceCLEAR;
+
+/* Blending targets. */
+typedef enum _gceBLEND_UNIT
+{
+	gcvBLEND_SOURCE,
+	gcvBLEND_TARGET,
+}
+gceBLEND_UNIT;
+
+/* Construct a new gco3D object. */
+gceSTATUS
+gco3D_Construct(
+	IN gcoHAL Hal,
+	OUT gco3D * Engine
+	);
+
+/* Destroy an gco3D object. */
+gceSTATUS
+gco3D_Destroy(
+	IN gco3D Engine
+	);
+
+/* Set 3D API type. */
+gceSTATUS
+gco3D_SetAPI(
+	IN gco3D Engine,
+	IN gceAPI ApiType
+	);
+
+/* Set render target. */
+gceSTATUS
+gco3D_SetTarget(
+	IN gco3D Engine,
+	IN gcoSURF Surface
+	);
+
+/* Unset render target. */
+gceSTATUS
+gco3D_UnsetTarget(
+	IN gco3D Engine,
+	IN gcoSURF Surface
+	);
+
+/* Set depth buffer. */
+gceSTATUS
+gco3D_SetDepth(
+	IN gco3D Engine,
+	IN gcoSURF Surface
+	);
+
+/* Unset depth buffer. */
+gceSTATUS
+gco3D_UnsetDepth(
+	IN gco3D Engine,
+	IN gcoSURF Surface
+	);
+
+/* Set viewport. */
+gceSTATUS
+gco3D_SetViewport(
+	IN gco3D Engine,
+	IN gctINT32 Left,
+	IN gctINT32 Top,
+	IN gctINT32 Right,
+	IN gctINT32 Bottom
+	);
+
+/* Set scissors. */
+gceSTATUS
+gco3D_SetScissors(
+	IN gco3D Engine,
+	IN gctINT32 Left,
+	IN gctINT32 Top,
+	IN gctINT32 Right,
+	IN gctINT32 Bottom
+	);
+
+/* Set clear color. */
+gceSTATUS
+gco3D_SetClearColor(
+	IN gco3D Engine,
+	IN gctUINT8 Red,
+	IN gctUINT8 Green,
+	IN gctUINT8 Blue,
+	IN gctUINT8 Alpha
+	);
+
+/* Set fixed point clear color. */
+gceSTATUS
+gco3D_SetClearColorX(
+	IN gco3D Engine,
+	IN gctFIXED_POINT Red,
+	IN gctFIXED_POINT Green,
+	IN gctFIXED_POINT Blue,
+	IN gctFIXED_POINT Alpha
+	);
+
+/* Set floating point clear color. */
+gceSTATUS
+gco3D_SetClearColorF(
+	IN gco3D Engine,
+	IN gctFLOAT Red,
+	IN gctFLOAT Green,
+	IN gctFLOAT Blue,
+	IN gctFLOAT Alpha
+	);
+
+/* Set fixed point clear depth. */
+gceSTATUS
+gco3D_SetClearDepthX(
+	IN gco3D Engine,
+	IN gctFIXED_POINT Depth
+	);
+
+/* Set floating point clear depth. */
+gceSTATUS
+gco3D_SetClearDepthF(
+	IN gco3D Engine,
+	IN gctFLOAT Depth
+	);
+
+/* Set clear stencil. */
+gceSTATUS
+gco3D_SetClearStencil(
+	IN gco3D Engine,
+	IN gctUINT32 Stencil
+	);
+
+/* Clear a Rect sub-surface. */
+gceSTATUS
+gco3D_ClearRect(
+	IN gco3D Engine,
+	IN gctUINT32 Address,
+	IN gctPOINTER Memory,
+	IN gctUINT32 Stride,
+	IN gceSURF_FORMAT Format,
+	IN gctINT32 Left,
+	IN gctINT32 Top,
+	IN gctINT32 Right,
+	IN gctINT32 Bottom,
+	IN gctUINT32 Width,
+	IN gctUINT32 Height,
+	IN gctUINT32 Flags
+	);
+
+/* Clear surface. */
+gceSTATUS
+gco3D_Clear(
+	IN gco3D Engine,
+	IN gctUINT32 Address,
+	IN gctUINT32 Stride,
+	IN gceSURF_FORMAT Format,
+	IN gctUINT32 Width,
+	IN gctUINT32 Height,
+	IN gctUINT32 Flags
+	);
+
+
+/* Clear tile status. */
+gceSTATUS
+gco3D_ClearTileStatus(
+	IN gco3D Engine,
+	IN gcsSURF_INFO_PTR Surface,
+	IN gctUINT32 TileStatusAddress,
+	IN gctUINT32 Flags
+	);
+
+/* Set shading mode. */
+gceSTATUS
+gco3D_SetShading(
+	IN gco3D Engine,
+	IN gceSHADING Shading
+	);
+
+/* Set blending mode. */
+gceSTATUS
+gco3D_EnableBlending(
+	IN gco3D Engine,
+	IN gctBOOL Enable
+	);
+
+/* Set blending function. */
+gceSTATUS
+gco3D_SetBlendFunction(
+	IN gco3D Engine,
+	IN gceBLEND_UNIT Unit,
+	IN gceBLEND_FUNCTION FunctionRGB,
+	IN gceBLEND_FUNCTION FunctionAlpha
+	);
+
+/* Set blending mode. */
+gceSTATUS
+gco3D_SetBlendMode(
+	IN gco3D Engine,
+	IN gceBLEND_MODE ModeRGB,
+	IN gceBLEND_MODE ModeAlpha
+	);
+
+/* Set blending color. */
+gceSTATUS
+gco3D_SetBlendColor(
+	IN gco3D Engine,
+	IN gctUINT Red,
+	IN gctUINT Green,
+	IN gctUINT Blue,
+	IN gctUINT Alpha
+	);
+
+/* Set fixed point blending color. */
+gceSTATUS
+gco3D_SetBlendColorX(
+	IN gco3D Engine,
+	IN gctFIXED_POINT Red,
+	IN gctFIXED_POINT Green,
+	IN gctFIXED_POINT Blue,
+	IN gctFIXED_POINT Alpha
+	);
+
+/* Set floating point blending color. */
+gceSTATUS
+gco3D_SetBlendColorF(
+	IN gco3D Engine,
+	IN gctFLOAT Red,
+	IN gctFLOAT Green,
+	IN gctFLOAT Blue,
+	IN gctFLOAT Alpha
+	);
+
+/* Set culling mode. */
+gceSTATUS
+gco3D_SetCulling(
+	IN gco3D Engine,
+	IN gceCULL Mode
+	);
+
+/* Enable point size */
+gceSTATUS
+gco3D_SetPointSizeEnable(
+	IN gco3D Engine,
+	IN gctBOOL Enable
+	);
+
+/* Set point sprite */
+gceSTATUS
+gco3D_SetPointSprite(
+	IN gco3D Engine,
+	IN gctBOOL Enable
+	);
+
+/* Set fill mode. */
+gceSTATUS
+gco3D_SetFill(
+	IN gco3D Engine,
+	IN gceFILL Mode
+	);
+
+/* Set depth compare mode. */
+gceSTATUS
+gco3D_SetDepthCompare(
+	IN gco3D Engine,
+	IN gceCOMPARE Compare
+	);
+
+/* Enable depth writing. */
+gceSTATUS
+gco3D_EnableDepthWrite(
+	IN gco3D Engine,
+	IN gctBOOL Enable
+	);
+
+/* Set depth mode. */
+gceSTATUS
+gco3D_SetDepthMode(
+	IN gco3D Engine,
+	IN gceDEPTH_MODE Mode
+	);
+
+/* Set depth range. */
+gceSTATUS
+gco3D_SetDepthRangeX(
+	IN gco3D Engine,
+	IN gceDEPTH_MODE Mode,
+	IN gctFIXED_POINT Near,
+	IN gctFIXED_POINT Far
+	);
+
+/* Set depth range. */
+gceSTATUS
+gco3D_SetDepthRangeF(
+	IN gco3D Engine,
+	IN gceDEPTH_MODE Mode,
+	IN gctFLOAT Near,
+	IN gctFLOAT Far
+	);
+
+/* Set last pixel enable */
+gceSTATUS
+gco3D_SetLastPixelEnable(
+	IN gco3D Engine,
+	IN gctBOOL Enable
+	);
+
+/* Set depth Bias and Scale */
+gceSTATUS
+gco3D_SetDepthScaleBiasX(
+	IN gco3D Engine,
+	IN gctFIXED_POINT DepthScale,
+	IN gctFIXED_POINT DepthBias
+	);
+
+gceSTATUS
+gco3D_SetDepthScaleBiasF(
+	IN gco3D Engine,
+	IN gctFLOAT DepthScale,
+	IN gctFLOAT DepthBias
+	);
+
+/* Enable or disable dithering. */
+gceSTATUS
+gco3D_EnableDither(
+	IN gco3D Engine,
+	IN gctBOOL Enable
+	);
+
+/* Set color write enable bits. */
+gceSTATUS
+gco3D_SetColorWrite(
+	IN gco3D Engine,
+	IN gctUINT8 Enable
+	);
+
+/* Enable or disable early depth. */
+gceSTATUS
+gco3D_SetEarlyDepth(
+	IN gco3D Engine,
+	IN gctBOOL Enable
+	);
+
+/* Enable or disable depth-only mode. */
+gceSTATUS
+gco3D_SetDepthOnly(
+	IN gco3D Engine,
+	IN gctBOOL Enable
+	);
+
+/* Set stencil mode. */
+gceSTATUS
+gco3D_SetStencilMode(
+	IN gco3D Engine,
+	IN gceSTENCIL_MODE Mode
+	);
+
+/* Set stencil mask. */
+gceSTATUS
+gco3D_SetStencilMask(
+	IN gco3D Engine,
+	IN gctUINT8 Mask
+	);
+
+/* Set stencil write mask. */
+gceSTATUS
+gco3D_SetStencilWriteMask(
+	IN gco3D Engine,
+	IN gctUINT8 Mask
+	);
+
+/* Set stencil reference. */
+gceSTATUS
+gco3D_SetStencilReference(
+	IN gco3D Engine,
+	IN gctUINT8 Reference
+	);
+
+/* Set stencil compare. */
+gceSTATUS
+gco3D_SetStencilCompare(
+	IN gco3D Engine,
+	IN gceSTENCIL_WHERE Where,
+	IN gceCOMPARE Compare
+	);
+
+/* Set stencil operation on pass. */
+gceSTATUS
+gco3D_SetStencilPass(
+	IN gco3D Engine,
+	IN gceSTENCIL_WHERE Where,
+	IN gceSTENCIL_OPERATION Operation
+	);
+
+/* Set stencil operation on fail. */
+gceSTATUS
+gco3D_SetStencilFail(
+	IN gco3D Engine,
+	IN gceSTENCIL_WHERE Where,
+	IN gceSTENCIL_OPERATION Operation
+	);
+
+/* Set stencil operation on depth fail. */
+gceSTATUS
+gco3D_SetStencilDepthFail(
+	IN gco3D Engine,
+	IN gceSTENCIL_WHERE Where,
+	IN gceSTENCIL_OPERATION Operation
+	);
+
+/* Enable or disable alpha test. */
+gceSTATUS
+gco3D_SetAlphaTest(
+	IN gco3D Engine,
+	IN gctBOOL Enable
+	);
+
+/* Set alpha test compare. */
+gceSTATUS
+gco3D_SetAlphaCompare(
+	IN gco3D Engine,
+	IN gceCOMPARE Compare
+	);
+
+/* Set alpha test reference in unsigned integer. */
+gceSTATUS
+gco3D_SetAlphaReference(
+	IN gco3D Engine,
+	IN gctUINT8 Reference
+	);
+
+/* Set alpha test reference in fixed point. */
+gceSTATUS
+gco3D_SetAlphaReferenceX(
+	IN gco3D Engine,
+	IN gctFIXED_POINT Reference
+	);
+
+/* Set alpha test reference in floating point. */
+gceSTATUS
+gco3D_SetAlphaReferenceF(
+	IN gco3D Engine,
+	IN gctFLOAT Reference
+	);
+
+/* Enable/Disable anti-alias line. */
+gceSTATUS
+gco3D_SetAntiAliasLine(
+	IN gco3D Engine,
+	IN gctBOOL Enable
+	);
+
+/* Set texture slot for anti-alias line. */
+gceSTATUS
+gco3D_SetAALineTexSlot(
+	IN gco3D Engine,
+	IN gctUINT TexSlot
+	);
+
+/* Set anti-alias line width scale. */
+gceSTATUS
+gco3D_SetAALineWidth(
+	IN gco3D Engine,
+	IN gctFLOAT Width
+	);
+
+/* Draw a number of primitives. */
+gceSTATUS
+gco3D_DrawPrimitives(
+	IN gco3D Engine,
+	IN gcePRIMITIVE Type,
+	IN gctINT StartVertex,
+	IN gctSIZE_T PrimitiveCount
+	);
+
+/* Draw a number of primitives using offsets. */
+gceSTATUS
+gco3D_DrawPrimitivesOffset(
+	IN gco3D Engine,
+	IN gcePRIMITIVE Type,
+	IN gctINT32 StartOffset,
+	IN gctSIZE_T PrimitiveCount
+	);
+
+/* Draw a number of indexed primitives. */
+gceSTATUS
+gco3D_DrawIndexedPrimitives(
+	IN gco3D Engine,
+	IN gcePRIMITIVE Type,
+	IN gctINT BaseVertex,
+	IN gctINT StartIndex,
+	IN gctSIZE_T PrimitiveCount
+	);
+
+/* Draw a number of indexed primitives using offsets. */
+gceSTATUS
+gco3D_DrawIndexedPrimitivesOffset(
+	IN gco3D Engine,
+	IN gcePRIMITIVE Type,
+	IN gctINT32 BaseOffset,
+	IN gctINT32 StartOffset,
+	IN gctSIZE_T PrimitiveCount
+	);
+
+/* Send a state buffer to the hardware. */
+gceSTATUS
+gco3D_LoadStates(
+	IN gco3D Engine,
+	IN gctCONST_POINTER StateBuffer,
+	IN gctSIZE_T Bytes
+	);
+
+/* Backdoor state loading.  This will go away soon! */
+gceSTATUS
+gco3D_LoadStateX(
+	IN gco3D Engine,
+	IN gctUINT32 Address,
+	IN gctSIZE_T Count,
+	IN gctPOINTER States
+	);
+
+/* Backdoor state loading.  This will go away soon! */
+gceSTATUS
+gco3D_LoadStateF(
+	IN gco3D Engine,
+	IN gctUINT32 Address,
+	IN gctSIZE_T Count,
+	IN gctPOINTER States
+	);
+
+/* Enable or disable anti-aliasing. */
+gceSTATUS
+gco3D_SetAntiAlias(
+	IN gco3D Engine,
+	IN gctBOOL Enable
+	);
+
+/* Write data into the command buffer. */
+gceSTATUS
+gco3D_WriteBuffer(
+	IN gco3D Engine,
+	IN gctCONST_POINTER Data,
+	IN gctSIZE_T Bytes,
+	IN gctBOOL Aligned
+	);
+
+/*Send sempahore and stall until sempahore is signalled.*/
+gceSTATUS
+gco3D_Semaphore(
+	IN gco3D Engine,
+	IN gceWHERE From,
+	IN gceWHERE To,
+	IN gceHOW How);
+
+/*Set the subpixels center .*/
+gceSTATUS
+gco3D_SetCentroids(
+	IN gco3D		Engine,
+	IN gctUINT32	Index,
+	IN gctPOINTER	Centroids
+	);
+/*----------------------------------------------------------------------------*/
+/*-------------------------- gco3D Fragment Processor ------------------------*/
+
+/* Set the fragment processor configuration. */
+gceSTATUS
+gco3D_SetFragmentConfiguration(
+	IN gco3D Engine,
+	IN gctBOOL ColorFromStream,
+	IN gctBOOL EnableFog,
+	IN gctBOOL EnableSmoothPoint,
+	IN gctUINT32 ClipPlanes
+	);
+
+/* Enable/disable texture stage operation. */
+gceSTATUS
+gco3D_EnableTextureStage(
+	IN gco3D Engine,
+	IN gctINT Stage,
+	IN gctBOOL Enable
+	);
+
+/* Program the channel enable masks for the color texture function. */
+gceSTATUS
+gco3D_SetTextureColorMask(
+	IN gco3D Engine,
+	IN gctINT Stage,
+	IN gctBOOL ColorEnabled,
+	IN gctBOOL AlphaEnabled
+	);
+
+/* Program the channel enable masks for the alpha texture function. */
+gceSTATUS
+gco3D_SetTextureAlphaMask(
+	IN gco3D Engine,
+	IN gctINT Stage,
+	IN gctBOOL ColorEnabled,
+	IN gctBOOL AlphaEnabled
+	);
+
+/* Program the constant fragment color. */
+gceSTATUS
+gco3D_SetFragmentColorX(
+	IN gco3D Engine,
+	IN gctFIXED_POINT Red,
+	IN gctFIXED_POINT Green,
+	IN gctFIXED_POINT Blue,
+	IN gctFIXED_POINT Alpha
+	);
+
+gceSTATUS
+gco3D_SetFragmentColorF(
+	IN gco3D Engine,
+	IN gctFLOAT Red,
+	IN gctFLOAT Green,
+	IN gctFLOAT Blue,
+	IN gctFLOAT Alpha
+	);
+
+/* Program the constant fog color. */
+gceSTATUS
+gco3D_SetFogColorX(
+	IN gco3D Engine,
+	IN gctFIXED_POINT Red,
+	IN gctFIXED_POINT Green,
+	IN gctFIXED_POINT Blue,
+	IN gctFIXED_POINT Alpha
+	);
+
+gceSTATUS
+gco3D_SetFogColorF(
+	IN gco3D Engine,
+	IN gctFLOAT Red,
+	IN gctFLOAT Green,
+	IN gctFLOAT Blue,
+	IN gctFLOAT Alpha
+	);
+
+/* Program the constant texture color. */
+gceSTATUS
+gco3D_SetTetxureColorX(
+	IN gco3D Engine,
+	IN gctINT Stage,
+	IN gctFIXED_POINT Red,
+	IN gctFIXED_POINT Green,
+	IN gctFIXED_POINT Blue,
+	IN gctFIXED_POINT Alpha
+	);
+
+gceSTATUS
+gco3D_SetTetxureColorF(
+	IN gco3D Engine,
+	IN gctINT Stage,
+	IN gctFLOAT Red,
+	IN gctFLOAT Green,
+	IN gctFLOAT Blue,
+	IN gctFLOAT Alpha
+	);
+
+/* Configure color texture function. */
+gceSTATUS
+gco3D_SetColorTextureFunction(
+	IN gco3D Engine,
+	IN gctINT Stage,
+	IN gceTEXTURE_FUNCTION Function,
+	IN gceTEXTURE_SOURCE Source0,
+	IN gceTEXTURE_CHANNEL Channel0,
+	IN gceTEXTURE_SOURCE Source1,
+	IN gceTEXTURE_CHANNEL Channel1,
+	IN gceTEXTURE_SOURCE Source2,
+	IN gceTEXTURE_CHANNEL Channel2,
+	IN gctINT Scale
+	);
+
+/* Configure alpha texture function. */
+gceSTATUS
+gco3D_SetAlphaTextureFunction(
+	IN gco3D Engine,
+	IN gctINT Stage,
+	IN gceTEXTURE_FUNCTION Function,
+	IN gceTEXTURE_SOURCE Source0,
+	IN gceTEXTURE_CHANNEL Channel0,
+	IN gceTEXTURE_SOURCE Source1,
+	IN gceTEXTURE_CHANNEL Channel1,
+	IN gceTEXTURE_SOURCE Source2,
+	IN gceTEXTURE_CHANNEL Channel2,
+	IN gctINT Scale
+	);
+
+
+/******************************************************************************\
+******************************* gcoTEXTURE Object *******************************
+\******************************************************************************/
+
+/* Cube faces. */
+typedef enum _gceTEXTURE_FACE
+{
+	gcvFACE_NONE,
+	gcvFACE_POSITIVE_X,
+	gcvFACE_NEGATIVE_X,
+	gcvFACE_POSITIVE_Y,
+	gcvFACE_NEGATIVE_Y,
+	gcvFACE_POSITIVE_Z,
+	gcvFACE_NEGATIVE_Z,
+}
+gceTEXTURE_FACE;
+
+/* Construct a new gcoTEXTURE object. */
+gceSTATUS
+gcoTEXTURE_Construct(
+	IN gcoHAL Hal,
+	OUT gcoTEXTURE * Texture
+	);
+
+/* Construct a new sized gcoTEXTURE object. */
+gceSTATUS
+gcoTEXTURE_ConstructSized(
+	IN gcoHAL Hal,
+	IN gceSURF_FORMAT Format,
+	IN gctUINT Width,
+	IN gctUINT Height,
+	IN gctUINT Depth,
+	IN gctUINT Faces,
+	IN gctUINT MipMapCount,
+	IN gcePOOL Pool,
+	OUT gcoTEXTURE * Texture
+	);
+
+/* Destroy an gcoTEXTURE object. */
+gceSTATUS
+gcoTEXTURE_Destroy(
+	IN gcoTEXTURE Texture
+	);
+
+/* Upload data to an gcoTEXTURE object. */
+gceSTATUS
+gcoTEXTURE_Upload(
+	IN gcoTEXTURE Texture,
+	IN gceTEXTURE_FACE Face,
+	IN gctUINT Width,
+	IN gctUINT Height,
+	IN gctUINT Slice,
+	IN gctCONST_POINTER Memory,
+	IN gctINT Stride,
+	IN gceSURF_FORMAT Format
+	);
+
+/* Upload data to an gcoTEXTURE object. */
+gceSTATUS
+gcoTEXTURE_UploadSub(
+	IN gcoTEXTURE Texture,
+	IN gctUINT MipMap,
+	IN gceTEXTURE_FACE Face,
+	IN gctUINT X,
+	IN gctUINT Y,
+	IN gctUINT Width,
+	IN gctUINT Height,
+	IN gctUINT Slice,
+	IN gctCONST_POINTER Memory,
+	IN gctINT Stride,
+	IN gceSURF_FORMAT Format
+	);
+
+/* Upload compressed data to an gcoTEXTURE object. */
+gceSTATUS
+gcoTEXTURE_UploadCompressed(
+	IN gcoTEXTURE Texture,
+	IN gceTEXTURE_FACE Face,
+	IN gctUINT Width,
+	IN gctUINT Height,
+	IN gctUINT Slice,
+	IN gctCONST_POINTER Memory,
+	IN gctSIZE_T Bytes
+	);
+
+/* Get gcoSURF object for a mipmap level. */
+gceSTATUS
+gcoTEXTURE_GetMipMap(
+	IN gcoTEXTURE Texture,
+	IN gctUINT MipMap,
+	OUT gcoSURF * Surface
+	);
+
+/* Get gcoSURF object for a mipmap level and face offset. */
+gceSTATUS
+gcoTEXTURE_GetMipMapFace(
+	IN gcoTEXTURE Texture,
+	IN gctUINT MipMap,
+	IN gceTEXTURE_FACE Face,
+	OUT gcoSURF * Surface,
+	OUT gctUINT32_PTR Offset
+	);
+
+gceSTATUS
+gcoTEXTURE_AddMipMap(
+	IN gcoTEXTURE Texture,
+	IN gctINT Level,
+	IN gceSURF_FORMAT Format,
+	IN gctUINT Width,
+	IN gctUINT Height,
+	IN gctUINT Depth,
+	IN gctUINT Faces,
+	IN gcePOOL Pool,
+	OUT gcoSURF * Surface
+	);
+
+gceSTATUS
+gcoTEXTURE_AddMipMapFromClient(
+	IN gcoTEXTURE Texture,
+	IN gctINT     Level,
+	IN gcoSURF    Surface
+	);
+
+gceSTATUS
+gcoTEXTURE_AddMipMapFromSurface(
+	IN gcoTEXTURE Texture,
+	IN gctINT     Level,
+	IN gcoSURF    Surface
+	);
+
+gceSTATUS
+gcoTEXTURE_SetAddressingMode(
+	IN gcoTEXTURE Texture,
+	IN gceTEXTURE_WHICH Which,
+	IN gceTEXTURE_ADDRESSING Mode
+	);
+
+gceSTATUS
+gcoTEXTURE_SetBorderColor(
+	IN gcoTEXTURE Texture,
+	IN gctUINT Red,
+	IN gctUINT Green,
+	IN gctUINT Blue,
+	IN gctUINT Alpha
+	);
+
+gceSTATUS
+gcoTEXTURE_SetBorderColorX(
+	IN gcoTEXTURE Texture,
+	IN gctFIXED_POINT Red,
+	IN gctFIXED_POINT Green,
+	IN gctFIXED_POINT Blue,
+	IN gctFIXED_POINT Alpha
+	);
+
+gceSTATUS
+gcoTEXTURE_SetBorderColorF(
+	IN gcoTEXTURE Texture,
+	IN gctFLOAT Red,
+	IN gctFLOAT Green,
+	IN gctFLOAT Blue,
+	IN gctFLOAT Alpha
+	);
+
+gceSTATUS
+gcoTEXTURE_SetMinFilter(
+	IN gcoTEXTURE Texture,
+	IN gceTEXTURE_FILTER Filter
+	);
+
+gceSTATUS
+gcoTEXTURE_SetMagFilter(
+	IN gcoTEXTURE Texture,
+	IN gceTEXTURE_FILTER Filter
+	);
+
+gceSTATUS
+gcoTEXTURE_SetMipFilter(
+	IN gcoTEXTURE Texture,
+	IN gceTEXTURE_FILTER Filter
+	);
+
+gceSTATUS
+gcoTEXTURE_SetLODBiasX(
+	IN gcoTEXTURE Texture,
+	IN gctFIXED_POINT Bias
+	);
+
+gceSTATUS
+gcoTEXTURE_SetLODBiasF(
+	IN gcoTEXTURE Texture,
+	IN gctFLOAT Bias
+	);
+
+gceSTATUS
+gcoTEXTURE_SetLODMinX(
+	IN gcoTEXTURE Texture,
+	IN gctFIXED_POINT LevelOfDetail
+	);
+
+gceSTATUS
+gcoTEXTURE_SetLODMinF(
+	IN gcoTEXTURE Texture,
+	IN gctFLOAT LevelOfDetail
+	);
+
+gceSTATUS
+gcoTEXTURE_SetLODMaxX(
+	IN gcoTEXTURE Texture,
+	IN gctFIXED_POINT LevelOfDetail
+	);
+
+gceSTATUS
+gcoTEXTURE_SetLODMaxF(
+	IN gcoTEXTURE Texture,
+	IN gctFLOAT LevelOfDetail
+	);
+
+gceSTATUS
+gcoTEXTURE_Bind(
+	IN gcoTEXTURE Texture,
+	IN gctINT Sampler
+	);
+
+gceSTATUS
+gcoTEXTURE_Disable(
+	IN gcoHAL Hal,
+	IN gctINT Sampler
+	);
+
+gceSTATUS
+gcoTEXTURE_Flush(
+	IN gcoTEXTURE Texture
+	);
+
+gceSTATUS
+gcoTEXTURE_QueryCaps(
+	OUT gctUINT * MaxWidth,
+	OUT gctUINT * MaxHeight,
+	OUT gctUINT * MaxDepth,
+	OUT gctBOOL * Cubic,
+	OUT gctBOOL * NonPowerOfTwo,
+	OUT gctUINT * VertexSamplers,
+	OUT gctUINT * PixelSamplers
+	);
+
+gceSTATUS
+gcoTEXTURE_GetClosestFormat(
+	IN gcoHAL Hal,
+	IN gceSURF_FORMAT InFormat,
+	OUT gceSURF_FORMAT* OutFormat
+	);
+
+gceSTATUS
+gcoTEXTURE_RenderIntoMipMap(
+	IN gcoTEXTURE Texture,
+	IN gctINT Level
+	);
+
+gceSTATUS
+gcoTEXTURE_IsRenderable(
+	IN gcoTEXTURE Texture,
+	IN gctUINT Level
+	);
+
+/******************************************************************************\
+******************************* gcoSTREAM Object ******************************
+\******************************************************************************/
+
+typedef enum _gceVERTEX_FORMAT
+{
+	gcvVERTEX_BYTE,
+	gcvVERTEX_UNSIGNED_BYTE,
+	gcvVERTEX_SHORT,
+	gcvVERTEX_UNSIGNED_SHORT,
+	gcvVERTEX_INT,
+	gcvVERTEX_UNSIGNED_INT,
+	gcvVERTEX_FIXED,
+	gcvVERTEX_HALF,
+	gcvVERTEX_FLOAT,
+}
+gceVERTEX_FORMAT;
+
+gceSTATUS
+gcoSTREAM_Construct(
+	IN gcoHAL Hal,
+	OUT gcoSTREAM * Stream
+	);
+
+gceSTATUS
+gcoSTREAM_Destroy(
+	IN gcoSTREAM Stream
+	);
+
+gceSTATUS
+gcoSTREAM_Upload(
+	IN gcoSTREAM Stream,
+	IN gctCONST_POINTER Buffer,
+	IN gctUINT32 Offset,
+	IN gctSIZE_T Bytes,
+	IN gctBOOL Dynamic
+	);
+
+gceSTATUS
+gcoSTREAM_SetStride(
+	IN gcoSTREAM Stream,
+	IN gctUINT32 Stride
+	);
+
+gceSTATUS
+gcoSTREAM_Lock(
+	IN gcoSTREAM Stream,
+	OUT gctPOINTER * Logical,
+	OUT gctUINT32 * Physical
+	);
+
+gceSTATUS
+gcoSTREAM_Unlock(
+	IN gcoSTREAM Stream);
+
+gceSTATUS
+gcoSTREAM_Reserve(
+	IN gcoSTREAM Stream,
+	IN gctSIZE_T Bytes
+	);
+
+gceSTATUS
+gcoSTREAM_Flush(
+	IN gcoSTREAM Stream
+	);
+
+/* Dynamic buffer API. */
+gceSTATUS
+gcoSTREAM_SetDynamic(
+	IN gcoSTREAM Stream,
+	IN gctSIZE_T Bytes,
+	IN gctUINT Buffers
+	);
+
+typedef struct _gcsSTREAM_INFO
+{
+	gctUINT				index;
+	gceVERTEX_FORMAT	format;
+	gctBOOL				normalized;
+	gctUINT				components;
+	gctSIZE_T			size;
+	gctCONST_POINTER	data;
+	gctUINT				stride;
+}
+gcsSTREAM_INFO, * gcsSTREAM_INFO_PTR;
+
+gceSTATUS
+gcoSTREAM_UploadDynamic(
+	IN gcoSTREAM Stream,
+	IN gctUINT VertexCount,
+	IN gctUINT InfoCount,
+	IN gcsSTREAM_INFO_PTR Info,
+	IN gcoVERTEX Vertex
+	);
+
+/******************************************************************************\
+******************************** gcoVERTEX Object ******************************
+\******************************************************************************/
+
+typedef struct _gcsVERTEX_ATTRIBUTES
+{
+	gceVERTEX_FORMAT			format;
+	gctBOOL						normalized;
+	gctUINT32					components;
+	gctSIZE_T					size;
+	gctUINT32					stream;
+	gctUINT32					offset;
+	gctUINT32					stride;
+}
+gcsVERTEX_ATTRIBUTES;
+
+gceSTATUS
+gcoVERTEX_Construct(
+	IN gcoHAL Hal,
+	OUT gcoVERTEX * Vertex
+	);
+
+gceSTATUS
+gcoVERTEX_Destroy(
+	IN gcoVERTEX Vertex
+	);
+
+gceSTATUS
+gcoVERTEX_Reset(
+	IN gcoVERTEX Vertex
+	);
+
+gceSTATUS
+gcoVERTEX_EnableAttribute(
+	IN gcoVERTEX Vertex,
+	IN gctUINT32 Index,
+	IN gceVERTEX_FORMAT Format,
+	IN gctBOOL Normalized,
+	IN gctUINT32 Components,
+	IN gcoSTREAM Stream,
+	IN gctUINT32 Offset,
+	IN gctUINT32 Stride
+	);
+
+gceSTATUS
+gcoVERTEX_DisableAttribute(
+	IN gcoVERTEX Vertex,
+	IN gctUINT32 Index
+	);
+
+gceSTATUS
+gcoVERTEX_Bind(
+	IN gcoVERTEX Vertex
+	);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __gchal_3d_h_ */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gcProfiler.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gcProfiler.h
@@ -0,0 +1,311 @@
+/****************************************************************************
+*  
+*    Copyright (C) 2002 - 2008 by Vivante Corp.
+*  
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public Lisence as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*  
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*  
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*  
+*****************************************************************************/
+
+
+#ifndef __gc_profile_h_
+#define __gc_profile_h_
+
+#define GLVERTEX_OBJECT 10
+#define GLVERTEX_OBJECT_BYTES 11
+
+#define GLINDEX_OBJECT 20
+#define GLINDEX_OBJECT_BYTES 21
+  
+#define GLTEXTURE_OBJECT 30
+#define GLTEXTURE_OBJECT_BYTES 31
+               
+#if VIVANTE_PROFILER
+#define gcmPROFILE_GC(hal, _enum, value) countGCProfiler(hal, _enum, value)
+#else
+#define gcmPROFILE_GC(hal, _enum, value)
+#endif
+
+void countGCProfiler( IN gcoHAL , gctUINT32 , int );
+
+/* HW profile information. */
+struct _gcoHWProfile
+{
+    /* HW static counters. */
+    gctUINT32       gpuClock;
+    gctUINT32       axiClock;
+    gctUINT32       shaderClock;
+    /* HW vairable counters. */
+    gctUINT32       gpuClockStart;
+    gctUINT32       gpuClockEnd;
+
+    /* HW vairable counters. */
+    gctUINT32       gpuCyclesCounter;
+    gctUINT32       gpuTotalRead64BytesPerFrame;
+    gctUINT32       gpuTotalWrite64BytesPerFrame;
+
+    /* FE */
+	/*
+    gctUINT32       fe_counter_0;
+    gctUINT32       fe_counter_1;
+    gctUINT32       fe_counter_2;
+    gctUINT32       fe_counter_3;
+    gctUINT32       fe_counter_4;
+    gctUINT32       fe_counter_5;
+    gctUINT32       fe_counter_6;
+    gctUINT32       fe_counter_7;
+    gctUINT32       fe_counter_8;
+    gctUINT32       fe_counter_9;
+    gctUINT32       fe_counter_10;
+    gctUINT32       fe_counter_11;
+    gctUINT32       fe_counter_12;
+    gctUINT32       fe_counter_13;
+    gctUINT32       fe_counter_14;
+	*/
+
+    /* DE */
+	/*
+    gctUINT32       de_counter_0;
+    gctUINT32       de_counter_1;
+    gctUINT32       de_counter_2;
+    gctUINT32       de_counter_3;
+    gctUINT32       de_counter_4;
+    gctUINT32       de_counter_5;
+    gctUINT32       de_counter_6;
+    gctUINT32       de_counter_7;
+    gctUINT32       de_counter_8;
+    gctUINT32       de_counter_9;
+    gctUINT32       de_counter_10;
+    gctUINT32       de_counter_11;
+    gctUINT32       de_counter_12;
+    gctUINT32       de_counter_13;
+    gctUINT32       de_counter_14;
+	*/
+
+    /* PE */
+    gctUINT32       pe_pixel_count_killed_by_color_pipe;
+    gctUINT32       pe_pixel_count_killed_by_depth_pipe;
+    gctUINT32       pe_pixel_count_drawn_by_color_pipe;
+    gctUINT32       pe_pixel_count_drawn_by_depth_pipe;
+	/*
+    gctUINT32       pe_counter_4;
+    gctUINT32       pe_counter_5;
+    gctUINT32       pe_counter_6;
+    gctUINT32       pe_counter_7;
+    gctUINT32       pe_counter_8;
+    gctUINT32       pe_counter_9;
+    gctUINT32       pe_counter_10;
+    gctUINT32       pe_counter_11;
+    gctUINT32       pe_counter_12;
+    gctUINT32       pe_counter_13;
+    gctUINT32       pe_counter_14;
+	*/
+    
+    /* SH */
+	/*
+    gctUINT32       sh_counter_0;
+    gctUINT32       sh_counter_1;
+    gctUINT32       sh_counter_2;
+    gctUINT32       sh_counter_3;
+    gctUINT32       sh_counter_4;
+    gctUINT32       sh_counter_5;
+    gctUINT32       sh_counter_6;
+	*/
+    gctUINT32       ps_inst_counter;
+    gctUINT32       rendered_pixel_counter;
+    gctUINT32       vs_inst_counter;
+    gctUINT32       rendered_vertice_counter;
+    gctUINT32       vtx_branch_inst_counter;
+    gctUINT32       vtx_texld_inst_counter;
+    gctUINT32       pxl_branch_inst_counter;
+    gctUINT32       pxl_texld_inst_counter;
+
+    /* PA */
+	/*
+    gctUINT32       pa_pixel_count_killed_by_color_pipe;
+    gctUINT32       pa_pixel_count_killed_by_depth_pipe;
+    gctUINT32       pa_pixel_count_drawn_by_color_pipe;
+	*/
+    gctUINT32       pa_input_vtx_counter;
+    gctUINT32       pa_input_prim_counter;
+    gctUINT32       pa_output_prim_counter;
+    gctUINT32       pa_depth_clipped_counter;
+    gctUINT32       pa_trivial_rejected_counter;
+    gctUINT32       pa_culled_counter;
+	/*
+    gctUINT32       pa_counter_9;
+    gctUINT32       pa_counter_10;
+    gctUINT32       pa_counter_11;
+    gctUINT32       pa_counter_12;
+    gctUINT32       pa_counter_13;
+    gctUINT32       pa_counter_14;
+	*/
+
+    /* SE */
+    gctUINT32       se_culled_triangle_count;
+    gctUINT32       se_culled_lines_count;
+	/*
+    gctUINT32       se_counter_2;
+    gctUINT32       se_counter_3;
+    gctUINT32       se_counter_4;
+    gctUINT32       se_counter_5;
+    gctUINT32       se_counter_6;
+    gctUINT32       se_counter_7;
+    gctUINT32       se_counter_8;
+    gctUINT32       se_counter_9;
+    gctUINT32       se_counter_10;
+    gctUINT32       se_counter_11;
+    gctUINT32       se_counter_12;
+    gctUINT32       se_counter_13;
+    gctUINT32       se_counter_14;
+	*/
+
+    /* RA */
+    gctUINT32       ra_valid_pixel_count;
+    gctUINT32       ra_total_quad_count;
+    gctUINT32       ra_valid_quad_count_after_early_z;
+    gctUINT32       ra_total_primitive_count;
+	/*
+    gctUINT32       ra_counter_4;
+    gctUINT32       ra_counter_5;
+    gctUINT32       ra_counter_6;
+    gctUINT32       ra_counter_7;
+    gctUINT32       ra_counter_8;
+	*/
+    gctUINT32       ra_pipe_cache_miss_counter;
+    gctUINT32       ra_prefetch_cache_miss_counter;
+	gctUINT32       ra_eez_culled_counter;
+	/*
+    gctUINT32       ra_counter_11;
+    gctUINT32       ra_counter_12;
+    gctUINT32       ra_counter_13;
+    gctUINT32       ra_counter_14;
+	*/
+
+    /* TX */
+    gctUINT32       tx_total_bilinear_requests;
+    gctUINT32       tx_total_trilinear_requests;
+    gctUINT32       tx_total_discarded_texture_requests;
+    gctUINT32       tx_total_texture_requests;
+	/*
+    gctUINT32       tx_counter_4;
+	*/
+    gctUINT32       tx_mem_read_count;
+    gctUINT32       tx_mem_read_in_8B_count;
+    gctUINT32       tx_cache_miss_count;
+    gctUINT32       tx_cache_hit_texel_count;
+    gctUINT32       tx_cache_miss_texel_count;
+	/*
+    gctUINT32       tx_counter_10;
+    gctUINT32       tx_counter_11;
+    gctUINT32       tx_counter_12;
+    gctUINT32       tx_counter_13;
+    gctUINT32       tx_counter_14;
+	*/
+
+    /* MC */
+	/*
+    gctUINT32       mc_counter_0;
+	*/
+    gctUINT32       mc_total_read_req_8B_from_pipeline;
+    gctUINT32       mc_total_read_req_8B_from_IP;
+    gctUINT32       mc_total_write_req_8B_from_pipeline;
+	/*
+    gctUINT32       mc_counter_4;
+    gctUINT32       mc_counter_5;
+    gctUINT32       mc_counter_6;
+    gctUINT32       mc_counter_7;
+    gctUINT32       mc_counter_8;
+    gctUINT32       mc_counter_9;
+    gctUINT32       mc_counter_10;
+    gctUINT32       mc_counter_11;
+    gctUINT32       mc_counter_12;
+    gctUINT32       mc_counter_13;
+    gctUINT32       mc_counter_14;
+	*/
+    /* HI */
+    gctUINT32       hi_axi_cycles_read_request_stalled;
+    gctUINT32       hi_axi_cycles_write_request_stalled;
+    gctUINT32       hi_axi_cycles_write_data_stalled;
+	/*
+    gctUINT32       hi_counter_3;
+    gctUINT32       hi_counter_4;
+    gctUINT32       hi_counter_5;
+    gctUINT32       hi_counter_6;
+    gctUINT32       hi_counter_7;
+    gctUINT32       hi_counter_8;
+    gctUINT32       hi_counter_9;
+    gctUINT32       hi_counter_10;
+    gctUINT32       hi_counter_11;
+    gctUINT32       hi_counter_12;
+    gctUINT32       hi_counter_13;
+    gctUINT32       hi_counter_14;
+	*/
+};
+
+typedef struct _gcoHWProfile *	gcoHWProfile;
+
+
+/* HAL profile information. */
+struct _gcProfile
+{
+	gcoOS			os;
+
+    gctFILE         file;
+	gctUINT8		fileTempString[256];
+	gctSIZE_T		tempMsgLen;
+
+    /* Aggregate Information */
+
+    /* Clock Info */
+    gctUINT32       frameStart;
+    gctUINT32       frameEnd;
+
+    /* Current frame information */
+    gctUINT32       frameNumber;
+    gctUINT32       frameStartTimeMsec; 
+    gctUINT32       frameEndTimeMsec; 
+
+#if PROFILE_HAL_COUNTERS
+    gctUINT32       vertexBufferTotalBytesAlloc;
+    gctUINT32       vertexBufferNewBytesAlloc;
+    int             vertexBufferTotalObjectsAlloc;
+    int             vertexBufferNewObjectsAlloc;
+
+    gctUINT32       indexBufferTotalBytesAlloc;
+    gctUINT32       indexBufferNewBytesAlloc;
+    int             indexBufferTotalObjectsAlloc;
+    int             indexBufferNewObjectsAlloc;
+
+    gctUINT32       textureBufferTotalBytesAlloc;
+    gctUINT32       textureBufferNewBytesAlloc;
+    int             textureBufferTotalObjectsAlloc;
+    int             textureBufferNewObjectsAlloc;
+
+    gctUINT32       numCommits;
+    gctUINT32       drawPointCount;
+    gctUINT32       drawLineCount;
+    gctUINT32       drawTriangleCount;
+    gctUINT32       drawVertexCount;
+    gctUINT32       redundantStateChangeCalls;
+#endif
+
+#if PROFILE_HW_COUNTERS
+    gcoHWProfile    hwProfile;
+#endif
+
+};
+
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gc_hal_profiler.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gc_hal_profiler.h
@@ -0,0 +1,232 @@
+/****************************************************************************
+*
+*    Copyright (C) 2005 - 2010 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public License as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+#ifndef __gc_hal_profiler_h_
+#define __gc_hal_profiler_h_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define GLVERTEX_OBJECT 10
+#define GLVERTEX_OBJECT_BYTES 11
+
+#define GLINDEX_OBJECT 20
+#define GLINDEX_OBJECT_BYTES 21
+
+#define GLTEXTURE_OBJECT 30
+#define GLTEXTURE_OBJECT_BYTES 31
+
+#if VIVANTE_PROFILER
+#define gcmPROFILE_GC(Hal, Enum, Value)	gcoPROFILER_Count(Hal, Enum, Value)
+#else
+#define gcmPROFILE_GC(Hal, Enum, Value) do { } while (gcvFALSE)
+#endif
+
+/* HW profile information. */
+typedef struct _gcsPROFILER_COUNTERS
+{
+    /* HW static counters. */
+    gctUINT32       gpuClock;
+    gctUINT32       axiClock;
+    gctUINT32       shaderClock;
+
+    /* HW vairable counters. */
+    gctUINT32       gpuClockStart;
+    gctUINT32       gpuClockEnd;
+
+    /* HW vairable counters. */
+    gctUINT32       gpuCyclesCounter;
+    gctUINT32       gpuTotalRead64BytesPerFrame;
+    gctUINT32       gpuTotalWrite64BytesPerFrame;
+
+    /* PE */
+    gctUINT32       pe_pixel_count_killed_by_color_pipe;
+    gctUINT32       pe_pixel_count_killed_by_depth_pipe;
+    gctUINT32       pe_pixel_count_drawn_by_color_pipe;
+    gctUINT32       pe_pixel_count_drawn_by_depth_pipe;
+
+    /* SH */
+    gctUINT32       ps_inst_counter;
+    gctUINT32       rendered_pixel_counter;
+    gctUINT32       vs_inst_counter;
+    gctUINT32       rendered_vertice_counter;
+    gctUINT32       vtx_branch_inst_counter;
+    gctUINT32       vtx_texld_inst_counter;
+    gctUINT32       pxl_branch_inst_counter;
+    gctUINT32       pxl_texld_inst_counter;
+
+    /* PA */
+    gctUINT32       pa_input_vtx_counter;
+    gctUINT32       pa_input_prim_counter;
+    gctUINT32       pa_output_prim_counter;
+    gctUINT32       pa_depth_clipped_counter;
+    gctUINT32       pa_trivial_rejected_counter;
+    gctUINT32       pa_culled_counter;
+
+    /* SE */
+    gctUINT32       se_culled_triangle_count;
+    gctUINT32       se_culled_lines_count;
+
+    /* RA */
+    gctUINT32       ra_valid_pixel_count;
+    gctUINT32       ra_total_quad_count;
+    gctUINT32       ra_valid_quad_count_after_early_z;
+    gctUINT32       ra_total_primitive_count;
+    gctUINT32       ra_pipe_cache_miss_counter;
+    gctUINT32       ra_prefetch_cache_miss_counter;
+	gctUINT32       ra_eez_culled_counter;
+
+    /* TX */
+    gctUINT32       tx_total_bilinear_requests;
+    gctUINT32       tx_total_trilinear_requests;
+    gctUINT32       tx_total_discarded_texture_requests;
+    gctUINT32       tx_total_texture_requests;
+    gctUINT32       tx_mem_read_count;
+    gctUINT32       tx_mem_read_in_8B_count;
+    gctUINT32       tx_cache_miss_count;
+    gctUINT32       tx_cache_hit_texel_count;
+    gctUINT32       tx_cache_miss_texel_count;
+
+    /* MC */
+    gctUINT32       mc_total_read_req_8B_from_pipeline;
+    gctUINT32       mc_total_read_req_8B_from_IP;
+    gctUINT32       mc_total_write_req_8B_from_pipeline;
+
+    /* HI */
+    gctUINT32       hi_axi_cycles_read_request_stalled;
+    gctUINT32       hi_axi_cycles_write_request_stalled;
+    gctUINT32       hi_axi_cycles_write_data_stalled;
+}
+gcsPROFILER_COUNTERS;
+
+/* HAL profile information. */
+typedef struct _gcsPROFILER
+{
+    gctFILE         		file;
+
+    /* Aggregate Information */
+
+    /* Clock Info */
+    gctUINT64       		frameStart;
+    gctUINT64       		frameEnd;
+
+    /* Current frame information */
+    gctUINT32       		frameNumber;
+    gctUINT64       		frameStartTimeusec;
+    gctUINT64       		frameEndTimeusec;
+    gctUINT64       		frameStartCPUTimeusec;
+    gctUINT64       		frameEndCPUTimeusec;
+
+#if PROFILE_HAL_COUNTERS
+    gctUINT32       		vertexBufferTotalBytesAlloc;
+    gctUINT32       		vertexBufferNewBytesAlloc;
+    int             		vertexBufferTotalObjectsAlloc;
+    int             		vertexBufferNewObjectsAlloc;
+
+    gctUINT32       		indexBufferTotalBytesAlloc;
+    gctUINT32       		indexBufferNewBytesAlloc;
+    int             		indexBufferTotalObjectsAlloc;
+    int             		indexBufferNewObjectsAlloc;
+
+    gctUINT32       		textureBufferTotalBytesAlloc;
+    gctUINT32       		textureBufferNewBytesAlloc;
+    int             		textureBufferTotalObjectsAlloc;
+    int             		textureBufferNewObjectsAlloc;
+
+    gctUINT32       		numCommits;
+    gctUINT32       		drawPointCount;
+    gctUINT32       		drawLineCount;
+    gctUINT32       		drawTriangleCount;
+    gctUINT32       		drawVertexCount;
+    gctUINT32       		redundantStateChangeCalls;
+#endif
+}
+gcsPROFILER;
+
+/* Memory profile information. */
+struct _gcsMemProfile
+{
+    /* Memory Usage */
+    gctUINT32       videoMemUsed;
+    gctUINT32       systemMemUsed;
+    gctUINT32       commitBufferSize;
+    gctUINT32       contextBufferCopyBytes;
+};
+
+/* Shader profile information. */
+struct _gcsSHADER_PROFILER
+{
+    gctUINT32       shaderLength;
+    gctUINT32       shaderALUCycles;
+    gctUINT32       shaderTexLoadCycles;
+    gctUINT32       shaderTempRegCount;
+    gctUINT32       shaderSamplerRegCount;
+    gctUINT32       shaderInputRegCount;
+    gctUINT32       shaderOutputRegCount;
+};
+
+/* Initialize the gcsProfiler. */
+gceSTATUS
+gcoPROFILER_Initialize(
+    IN gcoHAL Hal,
+    IN gctFILE File
+    );
+
+/* Destroy the gcProfiler. */
+gceSTATUS
+gcoPROFILER_Destroy(
+    IN gcoHAL Hal
+    );
+
+/* Call to signal end of frame. */
+gceSTATUS
+gcoPROFILER_EndFrame(
+    IN gcoHAL Hal
+    );
+
+gceSTATUS
+gcoPROFILER_Count(
+	IN gcoHAL Hal,
+	IN gctUINT32 Enum,
+	IN gctINT Value
+	);
+
+/* Profile input vertex shader. */
+gceSTATUS
+gcoPROFILER_ShaderVS(
+    IN gcoHAL Hal,
+    IN gctPOINTER Vs
+    );
+
+/* Profile input fragment shader. */
+gceSTATUS
+gcoPROFILER_ShaderFS(
+    IN gcoHAL Hal,
+    IN gctPOINTER Fs
+    );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __gc_hal_profiler_h_ */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gcOptions.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gcOptions.h
@@ -0,0 +1,221 @@
+/****************************************************************************
+*  
+*    Copyright (C) 2002 - 2008 by Vivante Corp.
+*  
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public Lisence as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*  
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*  
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*  
+*****************************************************************************/
+
+
+
+
+#ifndef __gcoptions_h_
+#define __gcoptions_h_
+
+/*
+    USE_EVENT_QUEUE
+    
+    This define enables the new event management code.  Instead of using one
+    interrupt per event, this define will create one interrupt per commit.
+*/
+#define USE_EVENT_QUEUE				1
+
+/*
+    USE_MEMORY_HEAP
+    
+    This define enables the user memory heap.  This will reduce the system
+    memory fragmentation and increase performance.
+*/
+#define USE_MEMORY_HEAP				1
+
+/*
+    USE_SHADER_SYMBOL_TABLE
+    
+    This define enables the symbol table in shader object.
+*/
+#define USE_SHADER_SYMBOL_TABLE		1
+
+/*
+    USE_SUPER_SAMPLING
+
+    This define enables super-sampling support.
+*/
+#define USE_SUPER_SAMPLING			0
+
+/*
+    PROFILE_HAL_COUNTERS
+
+    This define enables HAL counter profiling support.
+    HW and SHADER Counter profiling depends on this.
+*/
+#define PROFILE_HAL_COUNTERS		1
+
+/*
+    PROFILE_HW_COUNTERS
+
+    This define enables HW counter profiling support.
+*/
+#define PROFILE_HW_COUNTERS			1
+
+/*
+    PROFILE_SHADER_COUNTERS
+
+    This define enables SHADER counter profiling support.
+*/
+#define PROFILE_SHADER_COUNTERS		1
+
+/*
+    USE_VALIDATION
+
+    This define enables local validation code and means different things
+	depending on the context.  This is used for debugging only.
+*/
+#define USE_VALIDATION				0
+
+/*
+    COMMAND_PROCESSOR_VERSION
+    
+    The version of the command buffer and task manager.
+*/
+#define COMMAND_PROCESSOR_VERSION	1
+
+/*
+    USE_COMMAND_BUFFER_POOL
+
+    This define enables the new command buffer pool code.
+*/
+#define USE_COMMAND_BUFFER_POOL		1
+
+/*
+	gcdDUMP
+
+	This define is used to turn on dumping for playback.
+*/
+#ifndef gcdDUMP
+#  define gcdDUMP					0
+#endif
+
+/*
+	gcdNULL_DRIVER
+*/
+#define gcdNULL_DRIVER				0
+
+/*
+    MRVL_TAVOR_PV2_PATCH
+    
+    Patch physical address for TavorPV2
+*/
+#define MRVL_TAVOR_PV2_PATCH                0
+
+/*
+	gcdENABLE_TIMEOUT_DETECTION
+
+	Enable timeout detection.
+*/
+#define gcdENABLE_TIMEOUT_DETECTION	0
+
+
+/*
+    MRVL_TAVOR_PV2_DISABLE_YFLIP
+*/
+#define MRVL_TAVOR_PV2_DISABLE_YFLIP        0
+
+
+/*
+    MRVL_LOW_POWER_MODE_DEBUG
+*/
+#define MRVL_LOW_POWER_MODE_DEBUG           0
+
+/*
+    MRVL Utility Options
+*/
+#define MRVL_FORCE_MSAA_ON                  1
+
+/*
+    MRVL_SWAP_BUFFER_IN_EVERY_DRAW
+    
+    This define force swapbuffer after every drawElement/drawArray.
+*/
+#define MRVL_SWAP_BUFFER_IN_EVERY_DRAW      0
+
+#define MRVL_BENCH							0
+
+
+#define MRVL_EANBLE_COMPRESSION_DXT         0
+
+/* Texture coordinate generation */
+#define MRVL_TEXGEN							1
+
+/* Swap buffer optimization */
+#define MRVL_OPTI_SWAP_BUFFER               1
+
+/* Disable swap worker thread */
+#define MRVL_DISABLE_SWAP_THREAD			0
+
+/* API log enable */
+#define MRVL_ENABLE_API_LOG				    0
+#define MRVL_ENABLE_EGL_API_LOG			    0
+#define MRVL_ENABLE_OES1_API_LOG			0
+#define MRVL_ENABLE_OES2_API_LOG			0
+#define MRVL_ENABLE_OVG_API_LOG			    0
+
+/* Optimization for Eclair UI */
+#define MRVL_OPTI_ANDROID_IMAGE             1
+
+/* if pmem is enabled and cacheable, enable it */
+#define MRVL_CACHEABLE_PMEM                 1
+
+
+#define MRVL_OPTI_COMPOSITOR                0
+#define MRVL_OPTI_COMPOSITOR_DEBUG          0
+
+#if MRVL_OPTI_COMPOSITOR
+#define MRVL_DISABLE_FASTCLEAR              1
+#define MRVL_OPTI_COMPOSITOR_FRAME_LOCK     0   
+#else
+#define MRVL_DISABLE_FASTCLEAR              1
+#define MRVL_OPTI_COMPOSITOR_FRAME_LOCK     0   
+#endif 
+
+
+/*
+    Definitions for vendor, renderer and version strings
+*/
+#define _VENDOR_STRING_             "Marvell Technology Group Ltd"
+
+#define _EGL_VERSION_STRING_        "EGL 1.3 Ver0.8.0.1550";      
+
+#if defined(COMMON_LITE)
+#define _OES11_VERSION_STRING_      "OpenGL ES-CL 1.1 Ver0.8.0.1550";
+#else
+#define _OES11_VERSION_STRING_      "OpenGL ES-CM 1.1 Ver0.8.0.1550";
+#endif
+
+#define _OES20_VERSION_STRING_      "OpenGL ES 2.0 Ver0.8.0.1550";
+#define _GLSL_ES_VERSION_STRING_    "OpenGL ES GLSL ES 1.00 Ver0.8.0.1550"
+
+#define _OPENVG_VERSION_STRING_     "OpenVG 1.1 Ver0.8.0.1550"
+
+#define _GAL_VERSION_STRING_        "GAL Ver0.8.0.1550"
+
+#endif /* __gcoptions_h_ */
+
+
+
+
+
+
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gc_hal_compiler.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gc_hal_compiler.h
@@ -0,0 +1,1841 @@
+/****************************************************************************
+*
+*    Copyright (C) 2005 - 2010 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public License as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+/*
+**	Include file the defines the front- and back-end compilers, as well as the
+**	objects they use.
+*/
+
+#ifndef __gc_hal_compiler_h_
+#define __gc_hal_compiler_h_
+
+#include "gc_hal_types.h"
+#include "gc_hal_engine.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/******************************************************************************\
+|******************************* SHADER LANGUAGE ******************************|
+\******************************************************************************/
+
+/* Possible shader language opcodes. */
+typedef enum _gcSL_OPCODE
+{
+	gcSL_NOP,							/* 0x00 */
+	gcSL_MOV,							/* 0x01 */
+	gcSL_SAT,							/* 0x02 */
+	gcSL_DP3,							/* 0x03 */
+	gcSL_DP4,							/* 0x04 */
+	gcSL_ABS,							/* 0x05 */
+	gcSL_JMP,							/* 0x06 */
+	gcSL_ADD,							/* 0x07 */
+	gcSL_MUL,							/* 0x08 */
+	gcSL_RCP,							/* 0x09 */
+	gcSL_SUB,							/* 0x0A */
+	gcSL_KILL,							/* 0x0B */
+	gcSL_TEXLD,							/* 0x0C */
+	gcSL_CALL,							/* 0x0D */
+	gcSL_RET,							/* 0x0E */
+	gcSL_NORM,							/* 0x0F */
+	gcSL_MAX,							/* 0x10 */
+	gcSL_MIN,							/* 0x11 */
+	gcSL_POW,							/* 0x12 */
+	gcSL_RSQ,							/* 0x13 */
+	gcSL_LOG,							/* 0x14 */
+	gcSL_FRAC,							/* 0x15 */
+	gcSL_FLOOR,							/* 0x16 */
+	gcSL_CEIL,							/* 0x17 */
+	gcSL_CROSS,							/* 0x18 */
+	gcSL_TEXLDP,						/* 0x19 */
+	gcSL_TEXBIAS,						/* 0x1A */
+	gcSL_TEXGRAD,						/* 0x1B */
+	gcSL_TEXLOD,						/* 0x1C */
+	gcSL_SIN,							/* 0x1D */
+	gcSL_COS,							/* 0x1E */
+	gcSL_TAN,							/* 0x1F */
+	gcSL_EXP,							/* 0x20 */
+	gcSL_SIGN,							/* 0x21 */
+	gcSL_STEP,							/* 0x22 */
+	gcSL_SQRT,							/* 0x23 */
+	gcSL_ACOS,							/* 0x24 */
+	gcSL_ASIN,							/* 0x25 */
+	gcSL_ATAN,							/* 0x26 */
+	gcSL_SET,							/* 0x27 */
+	gcSL_DSX,							/* 0x28 */
+	gcSL_DSY,							/* 0x29 */
+	gcSL_FWIDTH,						/* 0x2A */
+}
+gcSL_OPCODE;
+
+typedef enum _gcSL_FORMAT
+{
+	gcSL_FLOAT,							/* 0 */
+	gcSL_INTEGER,						/* 1 */
+	gcSL_BOOLEAN,						/* 2 */
+}
+gcSL_FORMAT;
+
+/* Destination write enable bits. */
+typedef enum _gcSL_ENABLE
+{
+	gcSL_ENABLE_X						= 0x1,
+	gcSL_ENABLE_Y						= 0x2,
+	gcSL_ENABLE_Z						= 0x4,
+	gcSL_ENABLE_W						= 0x8,
+	/* Combinations. */
+	gcSL_ENABLE_XY						= gcSL_ENABLE_X | gcSL_ENABLE_Y,
+	gcSL_ENABLE_XYZ						= gcSL_ENABLE_X | gcSL_ENABLE_Y | gcSL_ENABLE_Z,
+	gcSL_ENABLE_XYZW					= gcSL_ENABLE_X | gcSL_ENABLE_Y | gcSL_ENABLE_Z | gcSL_ENABLE_W,
+	gcSL_ENABLE_XYW						= gcSL_ENABLE_X | gcSL_ENABLE_Y | gcSL_ENABLE_W,
+	gcSL_ENABLE_XZ						= gcSL_ENABLE_X | gcSL_ENABLE_Z,
+	gcSL_ENABLE_XZW						= gcSL_ENABLE_X | gcSL_ENABLE_Z | gcSL_ENABLE_W,
+	gcSL_ENABLE_XW						= gcSL_ENABLE_X | gcSL_ENABLE_W,
+	gcSL_ENABLE_YZ						= gcSL_ENABLE_Y | gcSL_ENABLE_Z,
+	gcSL_ENABLE_YZW						= gcSL_ENABLE_Y | gcSL_ENABLE_Z | gcSL_ENABLE_W,
+	gcSL_ENABLE_YW						= gcSL_ENABLE_Y | gcSL_ENABLE_W,
+	gcSL_ENABLE_ZW						= gcSL_ENABLE_Z | gcSL_ENABLE_W,
+}
+gcSL_ENABLE;
+
+/* Possible indices. */
+typedef enum _gcSL_INDEXED
+{
+	gcSL_NOT_INDEXED,					/* 0 */
+	gcSL_INDEXED_X,						/* 1 */
+	gcSL_INDEXED_Y,						/* 2 */
+	gcSL_INDEXED_Z,						/* 3 */
+	gcSL_INDEXED_W,						/* 4 */
+}
+gcSL_INDEXED;
+
+/* Opcode conditions. */
+typedef enum _gcSL_CONDITION
+{
+	gcSL_ALWAYS,						/* 0x0 */
+	gcSL_NOT_EQUAL,						/* 0x1 */
+	gcSL_LESS_OR_EQUAL,					/* 0x2 */
+	gcSL_LESS,							/* 0x3 */
+	gcSL_EQUAL,							/* 0x4 */
+	gcSL_GREATER,						/* 0x5 */
+	gcSL_GREATER_OR_EQUAL,				/* 0x6 */
+	gcSL_AND,							/* 0x7 */
+	gcSL_OR,							/* 0x8 */
+	gcSL_XOR,							/* 0x9 */
+}
+gcSL_CONDITION;
+
+/* Possible source operand types. */
+typedef enum _gcSL_TYPE
+{
+	gcSL_NONE,							/* 0x0 */
+	gcSL_TEMP,							/* 0x1 */
+	gcSL_ATTRIBUTE,						/* 0x2 */
+	gcSL_UNIFORM,						/* 0x3 */
+	gcSL_SAMPLER,						/* 0x4 */
+	gcSL_CONSTANT,						/* 0x5 */
+	gcSL_OUTPUT,						/* 0x6 */
+	gcSL_PHYSICAL,						/* 0x7 */
+}
+gcSL_TYPE;
+
+/* Swizzle generator macro. */
+#define gcmSWIZZLE(Component1, Component2, Component3, Component4) \
+( \
+	(gcSL_SWIZZLE_ ## Component1 << 0) | \
+	(gcSL_SWIZZLE_ ## Component2 << 2) | \
+	(gcSL_SWIZZLE_ ## Component3 << 4) | \
+	(gcSL_SWIZZLE_ ## Component4 << 6)   \
+)
+
+/* Possible swizzle values. */
+typedef enum _gcSL_SWIZZLE
+{
+	gcSL_SWIZZLE_X,						/* 0x0 */
+	gcSL_SWIZZLE_Y,						/* 0x1 */
+	gcSL_SWIZZLE_Z,						/* 0x2 */
+	gcSL_SWIZZLE_W,						/* 0x3 */
+	/* Combinations. */
+	gcSL_SWIZZLE_XXXX = gcmSWIZZLE(X, X, X, X),
+	gcSL_SWIZZLE_YYYY = gcmSWIZZLE(Y, Y, Y, Y),
+	gcSL_SWIZZLE_ZZZZ = gcmSWIZZLE(Z, Z, Z, Z),
+	gcSL_SWIZZLE_WWWW = gcmSWIZZLE(W, W, W, W),
+	gcSL_SWIZZLE_XYYY = gcmSWIZZLE(X, Y, Y, Y),
+	gcSL_SWIZZLE_XZZZ = gcmSWIZZLE(X, Z, Z, Z),
+	gcSL_SWIZZLE_XWWW = gcmSWIZZLE(X, W, W, W),
+	gcSL_SWIZZLE_YZZZ = gcmSWIZZLE(Y, Z, Z, Z),
+	gcSL_SWIZZLE_YWWW = gcmSWIZZLE(Y, W, W, W),
+	gcSL_SWIZZLE_ZWWW = gcmSWIZZLE(Z, W, W, W),
+	gcSL_SWIZZLE_XYZZ = gcmSWIZZLE(X, Y, Z, Z),
+	gcSL_SWIZZLE_XYWW = gcmSWIZZLE(X, Y, W, W),
+	gcSL_SWIZZLE_XZWW = gcmSWIZZLE(X, Z, W, W),
+	gcSL_SWIZZLE_YZWW = gcmSWIZZLE(Y, Z, W, W),
+	gcSL_SWIZZLE_XXYZ = gcmSWIZZLE(X, X, Y, Z),
+	gcSL_SWIZZLE_XYZW = gcmSWIZZLE(X, Y, Z, W),
+	gcSL_SWIZZLE_XYXY = gcmSWIZZLE(X, Y, X, Y),
+}
+gcSL_SWIZZLE;
+
+
+/******************************************************************************\
+|*********************************** SHADERS **********************************|
+\******************************************************************************/
+
+/* Shader types. */
+#define gcSHADER_TYPE_UNKNOWN			0
+#define gcSHADER_TYPE_VERTEX			1
+#define gcSHADER_TYPE_FRAGMENT			2
+
+/* gcSHADER objects. */
+typedef struct _gcSHADER *				gcSHADER;
+typedef struct _gcATTRIBUTE *			gcATTRIBUTE;
+typedef struct _gcUNIFORM *				gcUNIFORM;
+typedef struct _gcOUTPUT *				gcOUTPUT;
+typedef struct _gcsFUNCTION *			gcFUNCTION;
+typedef struct _gcsHINT *				gcsHINT_PTR;
+typedef struct _gcSHADER_PROFILER *     gcSHADER_PROFILER;
+typedef struct _gcVARIABLE *			gcVARIABLE;
+
+/* gcSHADER_TYPE enumeration. */
+typedef enum _gcSHADER_TYPE
+{
+	gcSHADER_FLOAT_X1,					/* 0x00 */
+	gcSHADER_FLOAT_X2,					/* 0x01 */
+	gcSHADER_FLOAT_X3,					/* 0x02 */
+	gcSHADER_FLOAT_X4,					/* 0x03 */
+	gcSHADER_FLOAT_2X2,					/* 0x04 */
+	gcSHADER_FLOAT_3X3,					/* 0x05 */
+	gcSHADER_FLOAT_4X4,					/* 0x06 */
+	gcSHADER_BOOLEAN_X1,				/* 0x07 */
+	gcSHADER_BOOLEAN_X2,				/* 0x08 */
+	gcSHADER_BOOLEAN_X3,				/* 0x09 */
+	gcSHADER_BOOLEAN_X4,				/* 0x0A */
+	gcSHADER_INTEGER_X1,				/* 0x0B */
+	gcSHADER_INTEGER_X2,				/* 0x0C */
+	gcSHADER_INTEGER_X3,				/* 0x0D */
+	gcSHADER_INTEGER_X4,				/* 0x0E */
+	gcSHADER_SAMPLER_1D,				/* 0x0F */
+	gcSHADER_SAMPLER_2D,				/* 0x10 */
+	gcSHADER_SAMPLER_3D,				/* 0x11 */
+	gcSHADER_SAMPLER_CUBIC,				/* 0x12 */
+	gcSHADER_FIXED_X1,					/* 0x13 */
+	gcSHADER_FIXED_X2,					/* 0x14 */
+	gcSHADER_FIXED_X3,					/* 0x15 */
+	gcSHADER_FIXED_X4,					/* 0x16 */
+}
+gcSHADER_TYPE;
+
+/* Shader flags. */
+typedef enum _gceSHADER_FLAGS
+{
+	gcvSHADER_DEAD_CODE					= 0x01,
+	gcvSHADER_RESOURCE_USAGE			= 0x02,
+	gcvSHADER_OPTIMIZER					= 0x04,
+	gcvSHADER_USE_GL_Z					= 0x08,
+	gcvSHADER_USE_GL_POSITION			= 0x10,
+	gcvSHADER_USE_GL_FACE				= 0x20,
+	gcvSHADER_USE_GL_POINT_COORD		= 0x40,
+}
+gceSHADER_FLAGS;
+
+/* Function argument qualifier */
+typedef enum _gceINPUT_OUTPUT
+{
+	gcvFUNCTION_INPUT,
+	gcvFUNCTION_OUTPUT,
+	gcvFUNCTION_INOUT
+}
+gceINPUT_OUTPUT;
+
+/*******************************************************************************
+**                             gcSHADER_Construct
+********************************************************************************
+**
+**	Construct a new gcSHADER object.
+**
+**	INPUT:
+**
+**		gcoOS Hal
+**			Pointer to an gcoHAL object.
+**
+**		gctINT ShaderType
+**			Type of gcSHADER object to cerate.  'ShaderType' can be one of the
+**			following:
+**
+**				gcSHADER_TYPE_VERTEX	Vertex shader.
+**				gcSHADER_TYPE_FRAGMENT	Fragment shader.
+**
+**	OUTPUT:
+**
+**		gcSHADER * Shader
+**			Pointer to a variable receiving the gcSHADER object pointer.
+*/
+gceSTATUS
+gcSHADER_Construct(
+	IN gcoHAL Hal,
+	IN gctINT ShaderType,
+	OUT gcSHADER * Shader
+	);
+
+/*******************************************************************************
+**                              gcSHADER_Destroy
+********************************************************************************
+**
+**	Destroy a gcSHADER object.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcSHADER_Destroy(
+	IN gcSHADER Shader
+	);
+
+/*******************************************************************************
+**                                gcSHADER_Load
+********************************************************************************
+**
+**	Load a gcSHADER object from a binary buffer.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gctPOINTER Buffer
+**			Pointer to a binary buffer containg the shader data to load.
+**
+**		gctSIZE_T BufferSize
+**			Number of bytes inside the binary buffer pointed to by 'Buffer'.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcSHADER_Load(
+	IN gcSHADER Shader,
+	IN gctPOINTER Buffer,
+	IN gctSIZE_T BufferSize
+	);
+
+/*******************************************************************************
+**                                gcSHADER_Save
+********************************************************************************
+**
+**	Save a gcSHADER object to a binary buffer.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gctPOINTER Buffer
+**			Pointer to a binary buffer to be used as storage for the gcSHADER
+**			object.  If 'Buffer' is gcvNULL, the gcSHADER object will not be saved,
+**			but the number of bytes required to hold the binary output for the
+**			gcSHADER object will be returned.
+**
+**		gctSIZE_T * BufferSize
+**			Pointer to a variable holding the number of bytes allocated in
+**			'Buffer'.  Only valid if 'Buffer' is not gcvNULL.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * BufferSize
+**			Pointer to a variable receiving the number of bytes required to hold
+**			the binary form of the gcSHADER object.
+*/
+gceSTATUS
+gcSHADER_Save(
+	IN gcSHADER Shader,
+	IN gctPOINTER Buffer,
+	IN OUT gctSIZE_T * BufferSize
+	);
+
+/*******************************************************************************
+**							  gcSHADER_AddAttribute
+********************************************************************************
+**
+**	Add an attribute to a gcSHADER object.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gctCONST_STRING Name
+**			Name of the attribute to add.
+**
+**		gcSHADER_TYPE Type
+**			Type of the attribute to add.
+**
+**		gctSIZE_T Length
+**			Array length of the attribute to add.  'Length' must be at least 1.
+**
+**		gctBOOL IsTexture
+**			gcvTRUE if the attribute is used as a texture coordinate, gcvFALSE if not.
+**
+**	OUTPUT:
+**
+**		gcATTRIBUTE * Attribute
+**			Pointer to a variable receiving the gcATTRIBUTE object pointer.
+*/
+gceSTATUS
+gcSHADER_AddAttribute(
+	IN gcSHADER Shader,
+	IN gctCONST_STRING Name,
+	IN gcSHADER_TYPE Type,
+	IN gctSIZE_T Length,
+	IN gctBOOL IsTexture,
+	OUT gcATTRIBUTE * Attribute
+	);
+
+/*******************************************************************************
+**                         gcSHADER_GetAttributeCount
+********************************************************************************
+**
+**	Get the number of attributes for this shader.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * Count
+**			Pointer to a variable receiving the number of attributes.
+*/
+gceSTATUS
+gcSHADER_GetAttributeCount(
+	IN gcSHADER Shader,
+	OUT gctSIZE_T * Count
+	);
+
+/*******************************************************************************
+**                            gcSHADER_GetAttribute
+********************************************************************************
+**
+**	Get the gcATTRIBUTE object poniter for an indexed attribute for this shader.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gctUINT Index
+**			Index of the attribute to retrieve.
+**
+**	OUTPUT:
+**
+**		gcATTRIBUTE * Attribute
+**			Pointer to a variable receiving the gcATTRIBUTE object pointer.
+*/
+gceSTATUS
+gcSHADER_GetAttribute(
+	IN gcSHADER Shader,
+	IN gctUINT Index,
+	OUT gcATTRIBUTE * Attribute
+	);
+
+/*******************************************************************************
+**                            gcSHADER_GetPositionAttribute
+********************************************************************************
+**
+**	Get the gcATTRIBUTE object pointer for the attribute that defines the
+**	position.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**	OUTPUT:
+**
+**		gctUINT * Index
+**			Pointer to a variable receiving the index of te gcATTRIBUTE object
+**			used as a position.
+**
+**		gcATTRIBUTE * Attribute
+**			Pointer to a variable receiving the gcATTRIBUTE object pointer.
+*/
+gceSTATUS
+gcSHADER_GetPositionAttribute(
+	IN gcSHADER Shader,
+	OUT gctUINT * Index,
+	OUT gcATTRIBUTE * Attribute
+	);
+
+/*******************************************************************************
+**							   gcSHADER_AddUniform
+********************************************************************************
+**
+**	Add an uniform to a gcSHADER object.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gctCONST_STRING Name
+**			Name of the uniform to add.
+**
+**		gcSHADER_TYPE Type
+**			Type of the uniform to add.
+**
+**		gctSIZE_T Length
+**			Array length of the uniform to add.  'Length' must be at least 1.
+**
+**	OUTPUT:
+**
+**		gcUNIFORM * Uniform
+**			Pointer to a variable receiving the gcUNIFORM object pointer.
+*/
+gceSTATUS
+gcSHADER_AddUniform(
+	IN gcSHADER Shader,
+	IN gctCONST_STRING Name,
+	IN gcSHADER_TYPE Type,
+	IN gctSIZE_T Length,
+	OUT gcUNIFORM * Uniform
+	);
+
+/*******************************************************************************
+**                          gcSHADER_GetUniformCount
+********************************************************************************
+**
+**	Get the number of uniforms for this shader.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * Count
+**			Pointer to a variable receiving the number of uniforms.
+*/
+gceSTATUS
+gcSHADER_GetUniformCount(
+	IN gcSHADER Shader,
+	OUT gctSIZE_T * Count
+	);
+
+/*******************************************************************************
+**                             gcSHADER_GetUniform
+********************************************************************************
+**
+**	Get the gcUNIFORM object pointer for an indexed uniform for this shader.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gctUINT Index
+**			Index of the uniform to retrieve.
+**
+**	OUTPUT:
+**
+**		gcUNIFORM * Uniform
+**			Pointer to a variable receiving the gcUNIFORM object pointer.
+*/
+gceSTATUS
+gcSHADER_GetUniform(
+	IN gcSHADER Shader,
+	IN gctUINT Index,
+	OUT gcUNIFORM * Uniform
+	);
+
+/*******************************************************************************
+**							   gcSHADER_AddOutput
+********************************************************************************
+**
+**	Add an output to a gcSHADER object.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gctCONST_STRING Name
+**			Name of the output to add.
+**
+**		gcSHADER_TYPE Type
+**			Type of the output to add.
+**
+**		gctSIZE_T Length
+**			Array length of the output to add.  'Length' must be at least 1.
+**
+**		gctUINT16 TempRegister
+**			Temporary register index that holds the output value.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcSHADER_AddOutput(
+	IN gcSHADER Shader,
+	IN gctCONST_STRING Name,
+	IN gcSHADER_TYPE Type,
+	IN gctSIZE_T Length,
+	IN gctUINT16 TempRegister
+	);
+
+gceSTATUS
+gcSHADER_AddOutputIndexed(
+	IN gcSHADER Shader,
+	IN gctCONST_STRING Name,
+	IN gctSIZE_T Index,
+	IN gctUINT16 TempIndex
+	);
+
+/*******************************************************************************
+**							 gcSHADER_GetOutputCount
+********************************************************************************
+**
+**	Get the number of outputs for this shader.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * Count
+**			Pointer to a variable receiving the number of outputs.
+*/
+gceSTATUS
+gcSHADER_GetOutputCount(
+	IN gcSHADER Shader,
+	OUT gctSIZE_T * Count
+	);
+
+/*******************************************************************************
+**							   gcSHADER_GetOutput
+********************************************************************************
+**
+**	Get the gcOUTPUT object pointer for an indexed output for this shader.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gctUINT Index
+**			Index of output to retrieve.
+**
+**	OUTPUT:
+**
+**		gcOUTPUT * Output
+**			Pointer to a variable receiving the gcOUTPUT object pointer.
+*/
+gceSTATUS
+gcSHADER_GetOutput(
+	IN gcSHADER Shader,
+	IN gctUINT Index,
+	OUT gcOUTPUT * Output
+	);
+
+/*******************************************************************************
+**							   gcSHADER_AddVariable
+********************************************************************************
+**
+**	Add a variable to a gcSHADER object.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gctCONST_STRING Name
+**			Name of the variable to add.
+**
+**		gcSHADER_TYPE Type
+**			Type of the variable to add.
+**
+**		gctSIZE_T Length
+**			Array length of the variable to add.  'Length' must be at least 1.
+**
+**		gctUINT16 TempRegister
+**			Temporary register index that holds the variable value.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcSHADER_AddVariable(
+	IN gcSHADER Shader,
+	IN gctCONST_STRING Name,
+	IN gcSHADER_TYPE Type,
+	IN gctSIZE_T Length,
+	IN gctUINT16 TempRegister
+	);
+
+/*******************************************************************************
+**							 gcSHADER_GetVariableCount
+********************************************************************************
+**
+**	Get the number of variables for this shader.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * Count
+**			Pointer to a variable receiving the number of variables.
+*/
+gceSTATUS
+gcSHADER_GetVariableCount(
+	IN gcSHADER Shader,
+	OUT gctSIZE_T * Count
+	);
+
+/*******************************************************************************
+**							   gcSHADER_GetVariable
+********************************************************************************
+**
+**	Get the gcVARIABLE object pointer for an indexed variable for this shader.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gctUINT Index
+**			Index of variable to retrieve.
+**
+**	OUTPUT:
+**
+**		gcVARIABLE * Variable
+**			Pointer to a variable receiving the gcVARIABLE object pointer.
+*/
+gceSTATUS
+gcSHADER_GetVariable(
+	IN gcSHADER Shader,
+	IN gctUINT Index,
+	OUT gcVARIABLE * Variable
+	);
+
+/*******************************************************************************
+**							   gcSHADER_AddOpcode
+********************************************************************************
+**
+**	Add an opcode to a gcSHADER object.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gcSL_OPCODE Opcode
+**			Opcode to add.
+**
+**		gctUINT16 TempRegister
+**			Temporary register index that acts as the target of the opcode.
+**
+**		gctUINT8 Enable
+**			Write enable bits for the temporary register that acts as the target
+**			of the opcode.
+**
+**		gcSL_FORMAT Format
+**			Format of the temporary register.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcSHADER_AddOpcode(
+	IN gcSHADER Shader,
+	IN gcSL_OPCODE Opcode,
+	IN gctUINT16 TempRegister,
+	IN gctUINT8 Enable,
+	IN gcSL_FORMAT Format
+	);
+
+gceSTATUS
+gcSHADER_AddOpcode2(
+	IN gcSHADER Shader,
+	IN gcSL_OPCODE Opcode,
+	IN gcSL_CONDITION Condition,
+	IN gctUINT16 TempRegister,
+	IN gctUINT8 Enable,
+	IN gcSL_FORMAT Format
+	);
+
+/*******************************************************************************
+**							gcSHADER_AddOpcodeIndexed
+********************************************************************************
+**
+**	Add an opcode to a gcSHADER object that writes to an dynamically indexed
+**	target.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gcSL_OPCODE Opcode
+**			Opcode to add.
+**
+**		gctUINT16 TempRegister
+**			Temporary register index that acts as the target of the opcode.
+**
+**		gctUINT8 Enable
+**			Write enable bits  for the temporary register that acts as the
+**			target of the opcode.
+**
+**		gcSL_INDEXED Mode
+**			Location of the dynamic index inside the temporary register.  Valid
+**			values can be:
+**
+**				gcSL_INDEXED_X - Use x component of the temporary register.
+**				gcSL_INDEXED_Y - Use y component of the temporary register.
+**				gcSL_INDEXED_Z - Use z component of the temporary register.
+**				gcSL_INDEXED_W - Use w component of the temporary register.
+**
+**		gctUINT16 IndexRegister
+**			Temporary register index that holds the dynamic index.
+**
+**		gcSL_FORMAT Format
+**			Format of the temporary register.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcSHADER_AddOpcodeIndexed(
+	IN gcSHADER Shader,
+	IN gcSL_OPCODE Opcode,
+	IN gctUINT16 TempRegister,
+	IN gctUINT8 Enable,
+	IN gcSL_INDEXED Mode,
+	IN gctUINT16 IndexRegister,
+	IN gcSL_FORMAT Format
+	);
+
+/*******************************************************************************
+**						  gcSHADER_AddOpcodeConditional
+********************************************************************************
+**
+**	Add an conditional opcode to a gcSHADER object.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gcSL_OPCODE Opcode
+**			Opcode to add.
+**
+**		gcSL_CONDITION Condition
+**			Condition that needs to evaluate to gcvTRUE in order for the opcode to
+**			execute.
+**
+**		gctUINT Label
+**			Target label if 'Condition' evaluates to gcvTRUE.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcSHADER_AddOpcodeConditional(
+	IN gcSHADER Shader,
+	IN gcSL_OPCODE Opcode,
+	IN gcSL_CONDITION Condition,
+	IN gctUINT Label
+	);
+
+/*******************************************************************************
+**								gcSHADER_AddLabel
+********************************************************************************
+**
+**	Define a label at the current instruction of a gcSHADER object.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gctUINT Label
+**			Label to define.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcSHADER_AddLabel(
+	IN gcSHADER Shader,
+	IN gctUINT Label
+	);
+
+/*******************************************************************************
+**							   gcSHADER_AddSource
+********************************************************************************
+**
+**	Add a source operand to a gcSHADER object.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gcSL_TYPE Type
+**			Type of the source operand.
+**
+**		gctUINT16 SourceIndex
+**			Index of the source operand.
+**
+**		gctUINT8 Swizzle
+**			x, y, z, and w swizzle values packed into one 8-bit value.
+**
+**		gcSL_FORMAT Format
+**			Format of the source operand.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcSHADER_AddSource(
+	IN gcSHADER Shader,
+	IN gcSL_TYPE Type,
+	IN gctUINT16 SourceIndex,
+	IN gctUINT8 Swizzle,
+	IN gcSL_FORMAT Format
+	);
+
+/*******************************************************************************
+**							gcSHADER_AddSourceIndexed
+********************************************************************************
+**
+**	Add a dynamically indexed source operand to a gcSHADER object.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gcSL_TYPE Type
+**			Type of the source operand.
+**
+**		gctUINT16 SourceIndex
+**			Index of the source operand.
+**
+**		gctUINT8 Swizzle
+**			x, y, z, and w swizzle values packed into one 8-bit value.
+**
+**		gcSL_INDEXED Mode
+**			Addressing mode for the index.
+**
+**		gctUINT16 IndexRegister
+**			Temporary register index that holds the dynamic index.
+**
+**		gcSL_FORMAT Format
+**			Format of the source operand.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcSHADER_AddSourceIndexed(
+	IN gcSHADER Shader,
+	IN gcSL_TYPE Type,
+	IN gctUINT16 SourceIndex,
+	IN gctUINT8 Swizzle,
+	IN gcSL_INDEXED Mode,
+	IN gctUINT16 IndexRegister,
+	IN gcSL_FORMAT Format
+	);
+
+/*******************************************************************************
+**						   gcSHADER_AddSourceAttribute
+********************************************************************************
+**
+**	Add an attribute as a source operand to a gcSHADER object.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gcATTRIBUTE Attribute
+**			Pointer to a gcATTRIBUTE object.
+**
+**		gctUINT8 Swizzle
+**			x, y, z, and w swizzle values packed into one 8-bit value.
+**
+**		gctINT Index
+**			Static index into the attribute in case the attribute is a matrix
+**			or array.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcSHADER_AddSourceAttribute(
+	IN gcSHADER Shader,
+	IN gcATTRIBUTE Attribute,
+	IN gctUINT8 Swizzle,
+	IN gctINT Index
+	);
+
+/*******************************************************************************
+**						   gcSHADER_AddSourceAttributeIndexed
+********************************************************************************
+**
+**	Add an indexed attribute as a source operand to a gcSHADER object.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gcATTRIBUTE Attribute
+**			Pointer to a gcATTRIBUTE object.
+**
+**		gctUINT8 Swizzle
+**			x, y, z, and w swizzle values packed into one 8-bit value.
+**
+**		gctINT Index
+**			Static index into the attribute in case the attribute is a matrix
+**			or array.
+**
+**		gcSL_INDEXED Mode
+**			Addressing mode of the dynamic index.
+**
+**		gctUINT16 IndexRegister
+**			Temporary register index that holds the dynamic index.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcSHADER_AddSourceAttributeIndexed(
+	IN gcSHADER Shader,
+	IN gcATTRIBUTE Attribute,
+	IN gctUINT8 Swizzle,
+	IN gctINT Index,
+	IN gcSL_INDEXED Mode,
+	IN gctUINT16 IndexRegister
+	);
+
+/*******************************************************************************
+**							gcSHADER_AddSourceUniform
+********************************************************************************
+**
+**	Add a uniform as a source operand to a gcSHADER object.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gcUNIFORM Uniform
+**			Pointer to a gcUNIFORM object.
+**
+**		gctUINT8 Swizzle
+**			x, y, z, and w swizzle values packed into one 8-bit value.
+**
+**		gctINT Index
+**			Static index into the uniform in case the uniform is a matrix or
+**			array.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcSHADER_AddSourceUniform(
+	IN gcSHADER Shader,
+	IN gcUNIFORM Uniform,
+	IN gctUINT8 Swizzle,
+	IN gctINT Index
+	);
+
+/*******************************************************************************
+**						gcSHADER_AddSourceUniformIndexed
+********************************************************************************
+**
+**	Add an indexed uniform as a source operand to a gcSHADER object.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gcUNIFORM Uniform
+**			Pointer to a gcUNIFORM object.
+**
+**		gctUINT8 Swizzle
+**			x, y, z, and w swizzle values packed into one 8-bit value.
+**
+**		gctINT Index
+**			Static index into the uniform in case the uniform is a matrix or
+**			array.
+**
+**		gcSL_INDEXED Mode
+**			Addressing mode of the dynamic index.
+**
+**		gctUINT16 IndexRegister
+**			Temporary register index that holds the dynamic index.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcSHADER_AddSourceUniformIndexed(
+	IN gcSHADER Shader,
+	IN gcUNIFORM Uniform,
+	IN gctUINT8 Swizzle,
+	IN gctINT Index,
+	IN gcSL_INDEXED Mode,
+	IN gctUINT16 IndexRegister
+	);
+
+gceSTATUS
+gcSHADER_AddSourceSamplerIndexed(
+	IN gcSHADER Shader,
+	IN gctUINT8 Swizzle,
+	IN gcSL_INDEXED Mode,
+	IN gctUINT16 IndexRegister
+	);
+
+/*******************************************************************************
+**						   gcSHADER_AddSourceConstant
+********************************************************************************
+**
+**	Add a constant floating pointer value as a source operand to a gcSHADER
+**	object.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gctFLOAT Constant
+**			Floating pointer constant.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcSHADER_AddSourceConstant(
+	IN gcSHADER Shader,
+	IN gctFLOAT Constant
+	);
+
+/*******************************************************************************
+**								  gcSHADER_Pack
+********************************************************************************
+**
+**	Pack a dynamically created gcSHADER object by trimming the allocated arrays
+**	and resolving all the labeling.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcSHADER_Pack(
+	IN gcSHADER Shader
+	);
+
+/*******************************************************************************
+**								gcSHADER_SetOptimizationOption
+********************************************************************************
+**
+**	Set optimization option of a gcSHADER object.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gctUINT OptimizationOption
+**			Optimization option.  Can be one of the following:
+**
+**				0						- No optimization.
+**				1						- Full optimization.
+**				Other value				- For optimizer testing.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcSHADER_SetOptimizationOption(
+	IN gcSHADER Shader,
+	IN gctUINT OptimizationOption
+	);
+
+gceSTATUS
+gcSHADER_AddFunction(
+	IN gcSHADER Shader,
+	IN gctCONST_STRING Name,
+	OUT gcFUNCTION * Function
+	);
+
+gceSTATUS
+gcSHADER_BeginFunction(
+	IN gcSHADER Shader,
+	IN gcFUNCTION Function
+	);
+
+gceSTATUS
+gcSHADER_EndFunction(
+	IN gcSHADER Shader,
+	IN gcFUNCTION Function
+	);
+
+/*******************************************************************************
+**                             gcATTRIBUTE_GetType
+********************************************************************************
+**
+**	Get the type and array length of a gcATTRIBUTE object.
+**
+**	INPUT:
+**
+**		gcATTRIBUTE Attribute
+**			Pointer to a gcATTRIBUTE object.
+**
+**	OUTPUT:
+**
+**		gcSHADER_TYPE * Type
+**			Pointer to a variable receiving the type of the attribute.  'Type'
+**			can be gcvNULL, in which case no type will be returned.
+**
+**		gctSIZE_T * ArrayLength
+**			Pointer to a variable receiving the length of the array if the
+**			attribute was declared as an array.  If the attribute was not
+**			declared as an array, the array length will be 1.  'ArrayLength' can
+**			be gcvNULL, in which case no array length will be returned.
+*/
+gceSTATUS
+gcATTRIBUTE_GetType(
+	IN gcATTRIBUTE Attribute,
+	OUT gcSHADER_TYPE * Type,
+	OUT gctSIZE_T * ArrayLength
+	);
+
+/*******************************************************************************
+**                            gcATTRIBUTE_GetName
+********************************************************************************
+**
+**	Get the name of a gcATTRIBUTE object.
+**
+**	INPUT:
+**
+**		gcATTRIBUTE Attribute
+**			Pointer to a gcATTRIBUTE object.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * Length
+**			Pointer to a variable receiving the length of the attribute name.
+**			'Length' can be gcvNULL, in which case no length will be returned.
+**
+**		gctCONST_STRING * Name
+**			Pointer to a variable receiving the pointer to the attribute name.
+**			'Name' can be gcvNULL, in which case no name will be returned.
+*/
+gceSTATUS
+gcATTRIBUTE_GetName(
+	IN gcATTRIBUTE Attribute,
+	OUT gctSIZE_T * Length,
+	OUT gctCONST_STRING * Name
+	);
+
+/*******************************************************************************
+**                            gcATTRIBUTE_IsEnabled
+********************************************************************************
+**
+**	Query the enabled state of a gcATTRIBUTE object.
+**
+**	INPUT:
+**
+**		gcATTRIBUTE Attribute
+**			Pointer to a gcATTRIBUTE object.
+**
+**	OUTPUT:
+**
+**		gctBOOL * Enabled
+**			Pointer to a variable receiving the enabled state of the attribute.
+*/
+gceSTATUS
+gcATTRIBUTE_IsEnabled(
+	IN gcATTRIBUTE Attribute,
+	OUT gctBOOL * Enabled
+	);
+
+/*******************************************************************************
+**                              gcUNIFORM_GetType
+********************************************************************************
+**
+**	Get the type and array length of a gcUNIFORM object.
+**
+**	INPUT:
+**
+**		gcUNIFORM Uniform
+**			Pointer to a gcUNIFORM object.
+**
+**	OUTPUT:
+**
+**		gcSHADER_TYPE * Type
+**			Pointer to a variable receiving the type of the uniform.  'Type' can
+**			be gcvNULL, in which case no type will be returned.
+**
+**		gctSIZE_T * ArrayLength
+**			Pointer to a variable receiving the length of the array if the
+**			uniform was declared as an array.  If the uniform was not declared
+**			as an array, the array length will be 1.  'ArrayLength' can be gcvNULL,
+**			in which case no array length will be returned.
+*/
+gceSTATUS
+gcUNIFORM_GetType(
+	IN gcUNIFORM Uniform,
+	OUT gcSHADER_TYPE * Type,
+	OUT gctSIZE_T * ArrayLength
+	);
+
+/*******************************************************************************
+**                              gcUNIFORM_GetName
+********************************************************************************
+**
+**	Get the name of a gcUNIFORM object.
+**
+**	INPUT:
+**
+**		gcUNIFORM Uniform
+**			Pointer to a gcUNIFORM object.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * Length
+**			Pointer to a variable receiving the length of the uniform name.
+**			'Length' can be gcvNULL, in which case no length will be returned.
+**
+**		gctCONST_STRING * Name
+**			Pointer to a variable receiving the pointer to the uniform name.
+**			'Name' can be gcvNULL, in which case no name will be returned.
+*/
+gceSTATUS
+gcUNIFORM_GetName(
+	IN gcUNIFORM Uniform,
+	OUT gctSIZE_T * Length,
+	OUT gctCONST_STRING * Name
+	);
+
+/*******************************************************************************
+**                              gcUNIFORM_GetSampler
+********************************************************************************
+**
+**	Get the physical sampler number for a sampler gcUNIFORM object.
+**
+**	INPUT:
+**
+**		gcUNIFORM Uniform
+**			Pointer to a gcUNIFORM object.
+**
+**	OUTPUT:
+**
+**		gctUINT32 * Sampler
+**			Pointer to a variable receiving the physical sampler.
+*/
+gceSTATUS
+gcUNIFORM_GetSampler(
+	IN gcUNIFORM Uniform,
+	OUT gctUINT32 * Sampler
+	);
+
+/*******************************************************************************
+**							   gcUNIFORM_SetValue
+********************************************************************************
+**
+**	Set the value of a uniform in integer.
+**
+**	INPUT:
+**
+**		gcUNIFORM Uniform
+**			Pointer to a gcUNIFORM object.
+**
+**		gctSIZE_T Count
+**			Number of entries to program if the uniform has been declared as an
+**			array.
+**
+**		const gctINT * Value
+**			Pointer to a buffer holding the integer values for the uniform.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcUNIFORM_SetValue(
+	IN gcUNIFORM Uniform,
+	IN gctSIZE_T Count,
+	IN const gctINT * Value
+	);
+
+/*******************************************************************************
+**							   gcUNIFORM_SetValueX
+********************************************************************************
+**
+**	Set the value of a uniform in fixed point.
+**
+**	INPUT:
+**
+**		gcUNIFORM Uniform
+**			Pointer to a gcUNIFORM object.
+**
+**		gctSIZE_T Count
+**			Number of entries to program if the uniform has been declared as an
+**			array.
+**
+**		const gctFIXED_POINT * Value
+**			Pointer to a buffer holding the fixed point values for the uniform.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcUNIFORM_SetValueX(
+	IN gcUNIFORM Uniform,
+	IN gctSIZE_T Count,
+	IN gctFIXED_POINT * Value
+	);
+
+/*******************************************************************************
+**							   gcUNIFORM_SetValueF
+********************************************************************************
+**
+**	Set the value of a uniform in floating point.
+**
+**	INPUT:
+**
+**		gcUNIFORM Uniform
+**			Pointer to a gcUNIFORM object.
+**
+**		gctSIZE_T Count
+**			Number of entries to program if the uniform has been declared as an
+**			array.
+**
+**		const gctFLOAT * Value
+**			Pointer to a buffer holding the floating point values for the
+**			uniform.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcUNIFORM_SetValueF(
+	IN gcUNIFORM Uniform,
+	IN gctSIZE_T Count,
+	IN const gctFLOAT * Value
+	);
+
+/*******************************************************************************
+**								gcOUTPUT_GetType
+********************************************************************************
+**
+**	Get the type and array length of a gcOUTPUT object.
+**
+**	INPUT:
+**
+**		gcOUTPUT Output
+**			Pointer to a gcOUTPUT object.
+**
+**	OUTPUT:
+**
+**		gcSHADER_TYPE * Type
+**			Pointer to a variable receiving the type of the output.  'Type' can
+**			be gcvNULL, in which case no type will be returned.
+**
+**		gctSIZE_T * ArrayLength
+**			Pointer to a variable receiving the length of the array if the
+**			output was declared as an array.  If the output was not declared
+**			as an array, the array length will be 1.  'ArrayLength' can be gcvNULL,
+**			in which case no array length will be returned.
+*/
+gceSTATUS
+gcOUTPUT_GetType(
+	IN gcOUTPUT Output,
+	OUT gcSHADER_TYPE * Type,
+	OUT gctSIZE_T * ArrayLength
+	);
+
+/*******************************************************************************
+**							   gcOUTPUT_GetIndex
+********************************************************************************
+**
+**	Get the index of a gcOUTPUT object.
+**
+**	INPUT:
+**
+**		gcOUTPUT Output
+**			Pointer to a gcOUTPUT object.
+**
+**	OUTPUT:
+**
+**		gctUINT * Index
+**			Pointer to a variable receiving the temporary register index of the
+**			output.  'Index' can be gcvNULL,. in which case no index will be
+**			returned.
+*/
+gceSTATUS
+gcOUTPUT_GetIndex(
+	IN gcOUTPUT Output,
+	OUT gctUINT * Index
+	);
+
+/*******************************************************************************
+**								gcOUTPUT_GetName
+********************************************************************************
+**
+**	Get the name of a gcOUTPUT object.
+**
+**	INPUT:
+**
+**		gcOUTPUT Output
+**			Pointer to a gcOUTPUT object.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * Length
+**			Pointer to a variable receiving the length of the output name.
+**			'Length' can be gcvNULL, in which case no length will be returned.
+**
+**		gctCONST_STRING * Name
+**			Pointer to a variable receiving the pointer to the output name.
+**			'Name' can be gcvNULL, in which case no name will be returned.
+*/
+gceSTATUS
+gcOUTPUT_GetName(
+	IN gcOUTPUT Output,
+	OUT gctSIZE_T * Length,
+	OUT gctCONST_STRING * Name
+	);
+
+/*******************************************************************************
+*********************************************************** F U N C T I O N S **
+*******************************************************************************/
+
+gceSTATUS
+gcFUNCTION_AddArgument(
+	IN gcFUNCTION Function,
+	IN gctUINT16 TempIndex,
+	IN gctUINT8 Enable,
+	IN gctUINT8 Qualifier
+	);
+
+gceSTATUS
+gcFUNCTION_GetArgument(
+	IN gcFUNCTION Function,
+	IN gctUINT16 Index,
+	OUT gctUINT16_PTR Temp,
+	OUT gctUINT8_PTR Enable,
+	OUT gctUINT8_PTR Swizzle
+	);
+
+gceSTATUS
+gcFUNCTION_GetLabel(
+	IN gcFUNCTION Function,
+	OUT gctUINT_PTR Label
+	);
+
+/*******************************************************************************
+**                              gcCompileShader
+********************************************************************************
+**
+**	Compile a shader.
+**
+**	INPUT:
+**
+**		gcoOS Hal
+**			Pointer to an gcoHAL object.
+**
+**		gctINT ShaderType
+**			Shader type to compile.  Can be one of the following values:
+**
+**				gcSHADER_TYPE_VERTEX
+**					Compile a vertex shader.
+**
+**				gcSHADER_TYPE_FRAGMENT
+**					Compile a fragment shader.
+**
+**		gctSIZE_T SourceSize
+**			Size of the source buffer in bytes.
+**
+**		gctCONST_STRING Source
+**			Pointer to the buffer containing the shader source code.
+**
+**	OUTPUT:
+**
+**		gcSHADER * Binary
+**			Pointer to a variable receiving the pointer to a gcSHADER object
+**			containg the compiled shader code.
+**
+**		gctSTRING * Log
+**			Pointer to a variable receiving a string pointer containging the
+**			compile log.
+*/
+gceSTATUS
+gcCompileShader(
+	IN gcoHAL Hal,
+	IN gctINT ShaderType,
+	IN gctSIZE_T SourceSize,
+	IN gctCONST_STRING Source,
+	OUT gcSHADER * Binary,
+	OUT gctSTRING * Log
+	);
+
+/*******************************************************************************
+**                              gcOptimizeShader
+********************************************************************************
+**
+**	Optimize a shader.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object holding information about the compiled
+**			shader.
+**
+**		gctFILE LogFile
+**			Pointer to an open FILE object.
+*/
+gceSTATUS
+gcOptimizeShader(
+	IN gcSHADER Shader,
+	IN gctFILE LogFile
+	);
+
+/*******************************************************************************
+**                                gcLinkShaders
+********************************************************************************
+**
+**	Link two shaders and generate a harwdare specific state buffer by compiling
+**	the compiler generated code through the resource allocator and code
+**	generator.
+**
+**	INPUT:
+**
+**		gcSHADER VertexShader
+**			Pointer to a gcSHADER object holding information about the compiled
+**			vertex shader.
+**
+**		gcSHADER FragmentShader
+**			Pointer to a gcSHADER object holding information about the compiled
+**			fragment shader.
+**
+**		gceSHADER_FLAGS Flags
+**			Compiler flags.  Can be any of the following:
+**
+**				gcvSHADER_DEAD_CODE       - Dead code elimination.
+**				gcvSHADER_RESOURCE_USAGE  - Resource usage optimizaion.
+**				gcvSHADER_OPTIMIZER       - Full optimization.
+**				gcvSHADER_USE_GL_Z        - Use OpenGL ES Z coordinate.
+**				gcvSHADER_USE_GL_POSITION - Use OpenGL ES gl_Position.
+**				gcvSHADER_USE_GL_FACE     - Use OpenGL ES gl_FaceForward.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * StateBufferSize
+**			Pointer to a variable receicing the number of bytes in the buffer
+**			returned in 'StateBuffer'.
+**
+**		gctPOINTER * StateBuffer
+**			Pointer to a variable receiving a buffer pointer that contains the
+**			states required to download the shaders into the hardware.
+**
+**		gcsHINT_PTR * Hints
+**			Pointer to a variable receiving a gcsHINT structure pointer that
+**			contains information required when loading the shader states.
+*/
+gceSTATUS
+gcLinkShaders(
+	IN gcSHADER VertexShader,
+	IN gcSHADER FragmentShader,
+	IN gceSHADER_FLAGS Flags,
+	OUT gctSIZE_T * StateBufferSize,
+	OUT gctPOINTER * StateBuffer,
+	OUT gcsHINT_PTR * Hints
+	);
+
+/*******************************************************************************
+**                                gcLoadShaders
+********************************************************************************
+**
+**	Load a pre-compiled and pre-linked shader program into the hardware.
+**
+**	INPUT:
+**
+**		gcoHAL Hal
+**			Pointer to a gcoHAL object.
+**
+**		gctSIZE_T StateBufferSize
+**			The number of bytes in the 'StateBuffer'.
+**
+**		gctPOINTER StateBuffer
+**			Pointer to the states that make up the shader program.
+**
+**		gcsHINT_PTR Hints
+**			Pointer to a gcsHINT structure that contains information required
+**			when loading the shader states.
+**
+**		gcePRIMITIVE PrimitiveType
+**			Primitive type to be rendered.
+*/
+gceSTATUS
+gcLoadShaders(
+	IN gcoHAL Hal,
+	IN gctSIZE_T StateBufferSize,
+	IN gctPOINTER StateBuffer,
+	IN gcsHINT_PTR Hints,
+	IN gcePRIMITIVE PrimitiveType
+	);
+
+/*******************************************************************************
+**                                gcSaveProgram
+********************************************************************************
+**
+**	Save pre-compiled shaders and pre-linked programs to a binary file.
+**
+**	INPUT:
+**
+**		gcSHADER VertexShader
+**			Pointer to vertex shader object.
+**
+**		gcSHADER FragmentShader
+**			Pointer to fragment shader object.
+**
+**		gctSIZE_T ProgramBufferSize
+**			Number of bytes in 'ProgramBuffer'.
+**
+**		gctPOINTER ProgramBuffer
+**			Pointer to buffer containing the program states.
+**
+**		gcsHINT_PTR Hints
+**			Pointer to HINTS structure for program states.
+**
+**	OUTPUT:
+**
+**		gctPOINTER * Binary
+**			Pointer to a variable receiving the binary data to be saved.
+**
+**		gctSIZE_T * BinarySize
+**			Pointer to a variable receiving the number of bytes inside 'Binary'.
+*/
+gceSTATUS
+gcSaveProgram(
+	IN gcSHADER VertexShader,
+	IN gcSHADER FragmentShader,
+	IN gctSIZE_T ProgramBufferSize,
+	IN gctPOINTER ProgramBuffer,
+	IN gcsHINT_PTR Hints,
+	OUT gctPOINTER * Binary,
+	OUT gctSIZE_T * BinarySize
+	);
+
+/*******************************************************************************
+**                                gcLoadProgram
+********************************************************************************
+**
+**	Load pre-compiled shaders and pre-linked programs from a binary file.
+**
+**	INPUT:
+**
+**		gctPOINTER Binary
+**			Pointer to the binary data loaded.
+**
+**		gctSIZE_T BinarySize
+**			Number of bytes in 'Binary'.
+**
+**	OUTPUT:
+**
+**		gcSHADER * VertexShader
+**			Pointer to a variable receiving the vertex shader object.
+**
+**		gcSHADER * FragmentShader
+**			Pointer to a variable receiving the fragment shader object.
+**
+**		gctSIZE_T * ProgramBufferSize
+**			Pointer to a variable receicing the number of bytes in the buffer
+**			returned in 'ProgramBuffer'.
+**
+**		gctPOINTER * ProgramBuffer
+**			Pointer to a variable receiving a buffer pointer that contains the
+**			states required to download the shaders into the hardware.
+**
+**		gcsHINT_PTR * Hints
+**			Pointer to a variable receiving a gcsHINT structure pointer that
+**			contains information required when loading the shader states.
+*/
+gceSTATUS
+gcLoadProgram(
+	IN gctPOINTER Binary,
+	IN gctSIZE_T BinarySize,
+	OUT gcSHADER * VertexShader,
+	OUT gcSHADER * FragmentShader,
+	OUT gctSIZE_T * ProgramBufferSize,
+	OUT gctPOINTER * ProgramBuffer,
+	OUT gcsHINT_PTR * Hints
+	);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __gc_hal_compiler_h_ */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gc_hal_raster.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gc_hal_raster.h
@@ -0,0 +1,792 @@
+/****************************************************************************
+*
+*    Copyright (C) 2005 - 2010 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public License as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+#ifndef __gc_hal_raster_h_
+#define __gc_hal_raster_h_
+
+#include "gc_hal_enum.h"
+#include "gc_hal_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/******************************************************************************\
+****************************** Object Declarations *****************************
+\******************************************************************************/
+
+typedef struct _gcoBRUSH *				gcoBRUSH;
+typedef struct _gcoBRUSH_CACHE *  		gcoBRUSH_CACHE;
+
+/******************************************************************************\
+******************************** gcoBRUSH Object *******************************
+\******************************************************************************/
+
+/* Create a new solid color gcoBRUSH object. */
+gceSTATUS
+gcoBRUSH_ConstructSingleColor(
+	IN gcoHAL Hal,
+	IN gctUINT32 ColorConvert,
+	IN gctUINT32 Color,
+	IN gctUINT64 Mask,
+	gcoBRUSH * Brush
+	);
+
+/* Create a new monochrome gcoBRUSH object. */
+gceSTATUS
+gcoBRUSH_ConstructMonochrome(
+	IN gcoHAL Hal,
+	IN gctUINT32 OriginX,
+	IN gctUINT32 OriginY,
+	IN gctUINT32 ColorConvert,
+	IN gctUINT32 FgColor,
+	IN gctUINT32 BgColor,
+	IN gctUINT64 Bits,
+	IN gctUINT64 Mask,
+	gcoBRUSH * Brush
+	);
+
+/* Create a color gcoBRUSH object. */
+gceSTATUS
+gcoBRUSH_ConstructColor(
+	IN gcoHAL Hal,
+	IN gctUINT32 OriginX,
+	IN gctUINT32 OriginY,
+	IN gctPOINTER Address,
+	IN gceSURF_FORMAT Format,
+	IN gctUINT64 Mask,
+	gcoBRUSH * Brush
+	);
+
+/* Destroy an gcoBRUSH object. */
+gceSTATUS
+gcoBRUSH_Destroy(
+	IN gcoBRUSH Brush
+	);
+
+/******************************************************************************\
+******************************** gcoSURF Object *******************************
+\******************************************************************************/
+
+/* Set cipping rectangle. */
+gceSTATUS
+gcoSURF_SetClipping(
+	IN gcoSURF Surface
+	);
+
+/* Clear one or more rectangular areas. */
+gceSTATUS
+gcoSURF_Clear2D(
+	IN gcoSURF DestSurface,
+	IN gctUINT32 RectCount,
+	IN gcsRECT_PTR DestRect,
+	IN gctUINT32 LoColor,
+	IN gctUINT32 HiColor
+	);
+
+/* Draw one or more Bresenham lines. */
+gceSTATUS
+gcoSURF_Line(
+	IN gcoSURF Surface,
+	IN gctUINT32 LineCount,
+	IN gcsRECT_PTR Position,
+	IN gcoBRUSH Brush,
+	IN gctUINT8 FgRop,
+	IN gctUINT8 BgRop
+	);
+
+/* Generic rectangular blit. */
+gceSTATUS
+gcoSURF_Blit(
+	IN OPTIONAL gcoSURF SrcSurface,
+	IN gcoSURF DestSurface,
+	IN gctUINT32 RectCount,
+	IN OPTIONAL gcsRECT_PTR SrcRect,
+	IN gcsRECT_PTR DestRect,
+	IN OPTIONAL gcoBRUSH Brush,
+	IN gctUINT8 FgRop,
+	IN gctUINT8 BgRop,
+	IN OPTIONAL gceSURF_TRANSPARENCY Transparency,
+	IN OPTIONAL gctUINT32 TransparencyColor,
+	IN OPTIONAL gctPOINTER Mask,
+	IN OPTIONAL gceSURF_MONOPACK MaskPack
+	);
+
+/* Monochrome blit. */
+gceSTATUS
+gcoSURF_MonoBlit(
+	IN gcoSURF DestSurface,
+	IN gctPOINTER Source,
+	IN gceSURF_MONOPACK SourcePack,
+	IN gcsPOINT_PTR SourceSize,
+	IN gcsPOINT_PTR SourceOrigin,
+	IN gcsRECT_PTR DestRect,
+	IN OPTIONAL gcoBRUSH Brush,
+	IN gctUINT8 FgRop,
+	IN gctUINT8 BgRop,
+	IN gctBOOL ColorConvert,
+	IN gctUINT8 MonoTransparency,
+	IN gceSURF_TRANSPARENCY Transparency,
+	IN gctUINT32 FgColor,
+	IN gctUINT32 BgColor
+	);
+
+/* Filter blit. */
+gceSTATUS
+gcoSURF_FilterBlit(
+	IN gcoSURF SrcSurface,
+	IN gcoSURF DestSurface,
+	IN gcsRECT_PTR SrcRect,
+	IN gcsRECT_PTR DestRect,
+	IN gcsRECT_PTR DestSubRect
+	);
+
+/* Enable alpha blending engine in the hardware and disengage the ROP engine. */
+gceSTATUS
+gcoSURF_EnableAlphaBlend(
+	IN gcoSURF Surface,
+	IN gctUINT8 SrcGlobalAlphaValue,
+	IN gctUINT8 DstGlobalAlphaValue,
+	IN gceSURF_PIXEL_ALPHA_MODE SrcAlphaMode,
+	IN gceSURF_PIXEL_ALPHA_MODE DstAlphaMode,
+	IN gceSURF_GLOBAL_ALPHA_MODE SrcGlobalAlphaMode,
+	IN gceSURF_GLOBAL_ALPHA_MODE DstGlobalAlphaMode,
+	IN gceSURF_BLEND_FACTOR_MODE SrcFactorMode,
+	IN gceSURF_BLEND_FACTOR_MODE DstFactorMode,
+	IN gceSURF_PIXEL_COLOR_MODE SrcColorMode,
+	IN gceSURF_PIXEL_COLOR_MODE DstColorMode
+	);
+
+/* Disable alpha blending engine in the hardware and engage the ROP engine. */
+gceSTATUS
+gcoSURF_DisableAlphaBlend(
+	IN gcoSURF Surface
+	);
+
+/* Copy a rectangular area with format conversion. */
+gceSTATUS
+gcoSURF_CopyPixels(
+	IN gcoSURF Source,
+	IN gcoSURF Target,
+	IN gctINT SourceX,
+	IN gctINT SourceY,
+	IN gctINT TargetX,
+	IN gctINT TargetY,
+	IN gctINT Width,
+	IN gctINT Height
+	);
+
+/* Read surface pixel. */
+gceSTATUS
+gcoSURF_ReadPixel(
+	IN gcoSURF Surface,
+	IN gctPOINTER Memory,
+	IN gctINT X,
+	IN gctINT Y,
+	IN gceSURF_FORMAT Format,
+	OUT gctPOINTER PixelValue
+	);
+
+/* Write surface pixel. */
+gceSTATUS
+gcoSURF_WritePixel(
+	IN gcoSURF Surface,
+	IN gctPOINTER Memory,
+	IN gctINT X,
+	IN gctINT Y,
+	IN gceSURF_FORMAT Format,
+	IN gctPOINTER PixelValue
+	);
+
+/******************************************************************************\
+********************************** gco2D Object *********************************
+\******************************************************************************/
+
+/* Construct a new gco2D object. */
+gceSTATUS
+gco2D_Construct(
+	IN gcoHAL Hal,
+	OUT gco2D * Hardware
+	);
+
+/* Destroy an gco2D object. */
+gceSTATUS
+gco2D_Destroy(
+	IN gco2D Hardware
+	);
+
+/* Sets the maximum number of brushes in the brush cache. */
+gceSTATUS
+gco2D_SetBrushLimit(
+	IN gco2D Hardware,
+	IN gctUINT MaxCount
+	);
+
+/* Flush the brush. */
+gceSTATUS
+gco2D_FlushBrush(
+	IN gco2D Engine,
+	IN gcoBRUSH Brush,
+	IN gceSURF_FORMAT Format
+	);
+
+/* Program the specified solid color brush. */
+gceSTATUS
+gco2D_LoadSolidBrush(
+	IN gco2D Engine,
+	IN gceSURF_FORMAT Format,
+	IN gctUINT32 ColorConvert,
+	IN gctUINT32 Color,
+	IN gctUINT64 Mask
+	);
+
+/* Configure monochrome source. */
+gceSTATUS
+gco2D_SetMonochromeSource(
+	IN gco2D Engine,
+	IN gctBOOL ColorConvert,
+	IN gctUINT8 MonoTransparency,
+	IN gceSURF_MONOPACK DataPack,
+	IN gctBOOL CoordRelative,
+	IN gceSURF_TRANSPARENCY Transparency,
+	IN gctUINT32 FgColor,
+	IN gctUINT32 BgColor
+	);
+
+/* Configure color source. */
+gceSTATUS
+gco2D_SetColorSource(
+	IN gco2D Engine,
+	IN gctUINT32 Address,
+	IN gctUINT32 Stride,
+	IN gceSURF_FORMAT Format,
+	IN gceSURF_ROTATION Rotation,
+	IN gctUINT32 SurfaceWidth,
+	IN gctBOOL CoordRelative,
+	IN gceSURF_TRANSPARENCY Transparency,
+	IN gctUINT32 TransparencyColor
+	);
+
+/* Configure color source extension for full rotation. */
+gceSTATUS
+gco2D_SetColorSourceEx(
+	IN gco2D Engine,
+	IN gctUINT32 Address,
+	IN gctUINT32 Stride,
+	IN gceSURF_FORMAT Format,
+	IN gceSURF_ROTATION Rotation,
+	IN gctUINT32 SurfaceWidth,
+	IN gctUINT32 SurfaceHeight,
+	IN gctBOOL CoordRelative,
+	IN gceSURF_TRANSPARENCY Transparency,
+	IN gctUINT32 TransparencyColor
+	);
+
+/* Configure color source. */
+gceSTATUS
+gco2D_SetColorSourceAdvanced(
+	IN gco2D Engine,
+	IN gctUINT32 Address,
+	IN gctUINT32 Stride,
+	IN gceSURF_FORMAT Format,
+	IN gceSURF_ROTATION Rotation,
+	IN gctUINT32 SurfaceWidth,
+	IN gctUINT32 SurfaceHeight,
+	IN gctBOOL CoordRelative
+	);
+
+/* Configure masked color source. */
+gceSTATUS
+gco2D_SetMaskedSource(
+	IN gco2D Engine,
+	IN gctUINT32 Address,
+	IN gctUINT32 Stride,
+	IN gceSURF_FORMAT Format,
+	IN gctBOOL CoordRelative,
+	IN gceSURF_MONOPACK MaskPack
+	);
+
+/* Configure masked color source extension for full rotation. */
+gceSTATUS
+gco2D_SetMaskedSourceEx(
+	IN gco2D Engine,
+	IN gctUINT32 Address,
+	IN gctUINT32 Stride,
+	IN gceSURF_FORMAT Format,
+	IN gctBOOL CoordRelative,
+	IN gceSURF_MONOPACK MaskPack,
+	IN gceSURF_ROTATION Rotation,
+	IN gctUINT32 SurfaceWidth,
+	IN gctUINT32 SurfaceHeight
+	);
+
+/* Setup the source rectangle. */
+gceSTATUS
+gco2D_SetSource(
+	IN gco2D Engine,
+	IN gcsRECT_PTR SrcRect
+	);
+
+/* Set clipping rectangle. */
+gceSTATUS
+gco2D_SetClipping(
+	IN gco2D Engine,
+	IN gcsRECT_PTR Rect
+	);
+
+/* Configure destination. */
+gceSTATUS
+gco2D_SetTarget(
+	IN gco2D Engine,
+	IN gctUINT32 Address,
+	IN gctUINT32 Stride,
+	IN gceSURF_ROTATION Rotation,
+	IN gctUINT32 SurfaceWidth
+	);
+
+/* Configure destination extension for full rotation. */
+gceSTATUS
+gco2D_SetTargetEx(
+	IN gco2D Engine,
+	IN gctUINT32 Address,
+	IN gctUINT32 Stride,
+	IN gceSURF_ROTATION Rotation,
+	IN gctUINT32 SurfaceWidth,
+	IN gctUINT32 SurfaceHeight
+	);
+
+/* Calculate and program the stretch factors. */
+gceSTATUS
+gco2D_SetStretchFactors(
+	IN gco2D Engine,
+	IN gctUINT32 HorFactor,
+	IN gctUINT32 VerFactor
+	);
+
+/* Calculate and program the stretch factors based on the rectangles. */
+gceSTATUS
+gco2D_SetStretchRectFactors(
+	IN gco2D Engine,
+	IN gcsRECT_PTR SrcRect,
+	IN gcsRECT_PTR DestRect
+	);
+
+/* Create a new solid color gcoBRUSH object. */
+gceSTATUS
+gco2D_ConstructSingleColorBrush(
+	IN gco2D Engine,
+	IN gctUINT32 ColorConvert,
+	IN gctUINT32 Color,
+	IN gctUINT64 Mask,
+	gcoBRUSH * Brush
+	);
+
+/* Create a new monochrome gcoBRUSH object. */
+gceSTATUS
+gco2D_ConstructMonochromeBrush(
+	IN gco2D Engine,
+	IN gctUINT32 OriginX,
+	IN gctUINT32 OriginY,
+	IN gctUINT32 ColorConvert,
+	IN gctUINT32 FgColor,
+	IN gctUINT32 BgColor,
+	IN gctUINT64 Bits,
+	IN gctUINT64 Mask,
+	gcoBRUSH * Brush
+	);
+
+/* Create a color gcoBRUSH object. */
+gceSTATUS
+gco2D_ConstructColorBrush(
+	IN gco2D Engine,
+	IN gctUINT32 OriginX,
+	IN gctUINT32 OriginY,
+	IN gctPOINTER Address,
+	IN gceSURF_FORMAT Format,
+	IN gctUINT64 Mask,
+	gcoBRUSH * Brush
+	);
+
+/* Clear one or more rectangular areas. */
+gceSTATUS
+gco2D_Clear(
+	IN gco2D Engine,
+	IN gctUINT32 RectCount,
+	IN gcsRECT_PTR Rect,
+	IN gctUINT32 Color32,
+	IN gctUINT8 FgRop,
+	IN gctUINT8 BgRop,
+	IN gceSURF_FORMAT DestFormat
+	);
+
+gceSTATUS
+gco2D_ClearEx(
+	IN gco2D Engine,
+	IN gctUINT32 RectCount,
+	IN gcsRECT_PTR Rect,
+	IN gctUINT32 Color32,
+	IN gctUINT8 FgRop,
+	IN gctUINT8 BgRop,
+	IN gceSURF_FORMAT DestFormat
+	);
+
+/* Draw one or more Bresenham lines. */
+gceSTATUS
+gco2D_Line(
+	IN gco2D Engine,
+	IN gctUINT32 LineCount,
+	IN gcsRECT_PTR Position,
+	IN gcoBRUSH Brush,
+	IN gctUINT8 FgRop,
+	IN gctUINT8 BgRop,
+	IN gceSURF_FORMAT DestFormat
+	);
+
+/* Draw one or more Bresenham lines based on the 32-bit color. */
+gceSTATUS
+gco2D_ColorLine(
+	IN gco2D Engine,
+	IN gctUINT32 LineCount,
+	IN gcsRECT_PTR Position,
+	IN gctUINT32 Color32,
+	IN gctUINT8 FgRop,
+	IN gctUINT8 BgRop,
+	IN gceSURF_FORMAT DestFormat
+	);
+
+/* Generic blit. */
+gceSTATUS
+gco2D_Blit(
+	IN gco2D Engine,
+	IN gctUINT32 RectCount,
+	IN gcsRECT_PTR Rect,
+	IN gctUINT8 FgRop,
+	IN gctUINT8 BgRop,
+	IN gceSURF_FORMAT DestFormat
+	);
+
+/* Batch blit. */
+gceSTATUS
+gco2D_BatchBlit(
+	IN gco2D Engine,
+	IN gctUINT32 RectCount,
+	IN gcsRECT_PTR SrcRect,
+	IN gcsRECT_PTR DestRect,
+	IN gctUINT8 FgRop,
+	IN gctUINT8 BgRop,
+	IN gceSURF_FORMAT DestFormat
+	);
+
+/* Stretch blit. */
+gceSTATUS
+gco2D_StretchBlit(
+	IN gco2D Engine,
+	IN gctUINT32 RectCount,
+	IN gcsRECT_PTR Rect,
+	IN gctUINT8 FgRop,
+	IN gctUINT8 BgRop,
+	IN gceSURF_FORMAT DestFormat
+	);
+
+/* Monochrome blit. */
+gceSTATUS
+gco2D_MonoBlit(
+	IN gco2D Engine,
+	IN gctPOINTER StreamBits,
+	IN gcsPOINT_PTR StreamSize,
+	IN gcsRECT_PTR StreamRect,
+	IN gceSURF_MONOPACK SrcStreamPack,
+	IN gceSURF_MONOPACK DestStreamPack,
+	IN gcsRECT_PTR DestRect,
+	IN gctUINT32 FgRop,
+	IN gctUINT32 BgRop,
+	IN gceSURF_FORMAT DestFormat
+	);
+
+/* Set kernel size. */
+gceSTATUS
+gco2D_SetKernelSize(
+	IN gco2D Engine,
+	IN gctUINT8 HorKernelSize,
+	IN gctUINT8 VerKernelSize
+	);
+
+/* Set filter type. */
+gceSTATUS
+gco2D_SetFilterType(
+	IN gco2D Engine,
+	IN gceFILTER_TYPE FilterType
+	);
+
+/* Set the filter kernel by user. */
+gceSTATUS
+gco2D_SetUserFilterKernel(
+	IN gco2D Engine,
+	IN gceFILTER_PASS_TYPE PassType,
+	IN gctUINT16_PTR KernelArray
+	);
+
+/* Select the pass(es) to be done for user defined filter. */
+gceSTATUS
+gco2D_EnableUserFilterPasses(
+	IN gco2D Engine,
+	IN gctBOOL HorPass,
+	IN gctBOOL VerPass
+	);
+
+/* Frees the temporary buffer allocated by filter blit operation. */
+gceSTATUS
+gco2D_FreeFilterBuffer(
+	IN gco2D Engine
+	);
+
+/* Filter blit. */
+gceSTATUS
+gco2D_FilterBlit(
+	IN gco2D Engine,
+	IN gctUINT32 SrcAddress,
+	IN gctUINT SrcStride,
+	IN gctUINT32 SrcUAddress,
+	IN gctUINT SrcUStride,
+	IN gctUINT32 SrcVAddress,
+	IN gctUINT SrcVStride,
+	IN gceSURF_FORMAT SrcFormat,
+	IN gceSURF_ROTATION SrcRotation,
+	IN gctUINT32 SrcSurfaceWidth,
+	IN gcsRECT_PTR SrcRect,
+	IN gctUINT32 DestAddress,
+	IN gctUINT DestStride,
+	IN gceSURF_FORMAT DestFormat,
+	IN gceSURF_ROTATION DestRotation,
+	IN gctUINT32 DestSurfaceWidth,
+	IN gcsRECT_PTR DestRect,
+	IN gcsRECT_PTR DestSubRect
+	);
+
+/* Filter blit extension for full rotation. */
+gceSTATUS
+gco2D_FilterBlitEx(
+	IN gco2D Engine,
+	IN gctUINT32 SrcAddress,
+	IN gctUINT SrcStride,
+	IN gctUINT32 SrcUAddress,
+	IN gctUINT SrcUStride,
+	IN gctUINT32 SrcVAddress,
+	IN gctUINT SrcVStride,
+	IN gceSURF_FORMAT SrcFormat,
+	IN gceSURF_ROTATION SrcRotation,
+	IN gctUINT32 SrcSurfaceWidth,
+	IN gctUINT32 SrcSurfaceHeight,
+	IN gcsRECT_PTR SrcRect,
+	IN gctUINT32 DestAddress,
+	IN gctUINT DestStride,
+	IN gceSURF_FORMAT DestFormat,
+	IN gceSURF_ROTATION DestRotation,
+	IN gctUINT32 DestSurfaceWidth,
+	IN gctUINT32 DestSurfaceHeight,
+	IN gcsRECT_PTR DestRect,
+	IN gcsRECT_PTR DestSubRect
+	);
+
+/* Enable alpha blending engine in the hardware and disengage the ROP engine. */
+gceSTATUS
+gco2D_EnableAlphaBlend(
+	IN gco2D Engine,
+	IN gctUINT8 SrcGlobalAlphaValue,
+	IN gctUINT8 DstGlobalAlphaValue,
+	IN gceSURF_PIXEL_ALPHA_MODE SrcAlphaMode,
+	IN gceSURF_PIXEL_ALPHA_MODE DstAlphaMode,
+	IN gceSURF_GLOBAL_ALPHA_MODE SrcGlobalAlphaMode,
+	IN gceSURF_GLOBAL_ALPHA_MODE DstGlobalAlphaMode,
+	IN gceSURF_BLEND_FACTOR_MODE SrcFactorMode,
+	IN gceSURF_BLEND_FACTOR_MODE DstFactorMode,
+	IN gceSURF_PIXEL_COLOR_MODE SrcColorMode,
+	IN gceSURF_PIXEL_COLOR_MODE DstColorMode
+	);
+
+/* Enable alpha blending engine in the hardware. */
+gceSTATUS
+gco2D_EnableAlphaBlendAdvanced(
+	IN gco2D Engine,
+	IN gceSURF_PIXEL_ALPHA_MODE SrcAlphaMode,
+	IN gceSURF_PIXEL_ALPHA_MODE DstAlphaMode,
+	IN gceSURF_GLOBAL_ALPHA_MODE SrcGlobalAlphaMode,
+	IN gceSURF_GLOBAL_ALPHA_MODE DstGlobalAlphaMode,
+	IN gceSURF_BLEND_FACTOR_MODE SrcFactorMode,
+	IN gceSURF_BLEND_FACTOR_MODE DstFactorMode
+	);
+
+/* Enable alpha blending engine with Porter Duff rule. */
+gceSTATUS
+gco2D_SetPorterDuffBlending(
+	IN gco2D Engine,
+	IN gce2D_PORTER_DUFF_RULE Rule
+	);
+
+/* Disable alpha blending engine in the hardware and engage the ROP engine. */
+gceSTATUS
+gco2D_DisableAlphaBlend(
+	IN gco2D Engine
+	);
+
+/* Retrieve the maximum number of 32-bit data chunks for a single DE command. */
+gctUINT32
+gco2D_GetMaximumDataCount(
+	void
+	);
+
+/* Retrieve the maximum number of rectangles, that can be passed in a single DE command. */
+gctUINT32
+gco2D_GetMaximumRectCount(
+	void
+	);
+
+/* Returns the pixel alignment of the surface. */
+gceSTATUS
+gco2D_GetPixelAlignment(
+	gceSURF_FORMAT Format,
+	gcsPOINT_PTR Alignment
+	);
+
+/* Retrieve monochrome stream pack size. */
+gceSTATUS
+gco2D_GetPackSize(
+	IN gceSURF_MONOPACK StreamPack,
+	OUT gctUINT32 * PackWidth,
+	OUT gctUINT32 * PackHeight
+	);
+
+/* Flush the 2D pipeline. */
+gceSTATUS
+gco2D_Flush(
+	IN gco2D Engine
+	);
+
+/* Load 256-entry color table for INDEX8 source surfaces. */
+gceSTATUS
+gco2D_LoadPalette(
+	IN gco2D Engine,
+	IN gctUINT FirstIndex,
+	IN gctUINT IndexCount,
+	IN gctPOINTER ColorTable,
+	IN gctBOOL ColorConvert
+	);
+
+/* Enable/disable 2D BitBlt mirrorring. */
+gceSTATUS
+gco2D_SetBitBlitMirror(
+	IN gco2D Engine,
+	IN gctBOOL HorizontalMirror,
+	IN gctBOOL VerticalMirror
+	);
+
+/* Set the transparency for source, destination and pattern. */
+gceSTATUS
+gco2D_SetTransparencyAdvanced(
+	IN gco2D Engine,
+	IN gce2D_TRANSPARENCY SrcTransparency,
+	IN gce2D_TRANSPARENCY DstTransparency,
+	IN gce2D_TRANSPARENCY PatTransparency
+	);
+
+/* Set the source color key. */
+gceSTATUS
+gco2D_SetSourceColorKeyAdvanced(
+	IN gco2D Engine,
+	IN gctUINT32 ColorKey
+	);
+
+/* Set the source color key range. */
+gceSTATUS
+gco2D_SetSourceColorKeyRangeAdvanced(
+	IN gco2D Engine,
+	IN gctUINT32 ColorKeyLow,
+	IN gctUINT32 ColorKeyHigh
+	);
+
+/* Set the target color key. */
+gceSTATUS
+gco2D_SetTargetColorKeyAdvanced(
+	IN gco2D Engine,
+	IN gctUINT32 ColorKey
+	);
+
+/* Set the target color key range. */
+gceSTATUS
+gco2D_SetTargetColorKeyRangeAdvanced(
+	IN gco2D Engine,
+	IN gctUINT32 ColorKeyLow,
+	IN gctUINT32 ColorKeyHigh
+	);
+
+/* Set the YUV color space mode. */
+gceSTATUS
+gco2D_SetYUVColorMode(
+	IN gco2D Engine,
+	IN gce2D_YUV_COLOR_MODE Mode
+	);
+
+/* Setup the source global color value in ARGB8 format. */
+gceSTATUS gco2D_SetSourceGlobalColorAdvanced(
+	IN gco2D Engine,
+	IN gctUINT32 Color32
+	);
+
+/* Setup the target global color value in ARGB8 format. */
+gceSTATUS gco2D_SetTargetGlobalColorAdvanced(
+	IN gco2D Engine,
+	IN gctUINT32 Color32
+	);
+
+/* Setup the source and target pixel multiply modes. */
+gceSTATUS
+gco2D_SetPixelMultiplyModeAdvanced(
+	IN gco2D Engine,
+	IN gce2D_PIXEL_COLOR_MULTIPLY_MODE SrcPremultiplySrcAlpha,
+	IN gce2D_PIXEL_COLOR_MULTIPLY_MODE DstPremultiplyDstAlpha,
+	IN gce2D_GLOBAL_COLOR_MULTIPLY_MODE SrcPremultiplyGlobalMode,
+	IN gce2D_PIXEL_COLOR_MULTIPLY_MODE DstDemultiplyDstAlpha
+	);
+
+/* Set the GPU clock cycles after which the idle engine will keep auto-flushing. */
+gceSTATUS
+gco2D_SetAutoFlushCycles(
+	IN gco2D Engine,
+	IN gctUINT32 Cycles
+	);
+
+/* Read the profile registers available in the 2D engine and sets them in the profile.
+   The function will also reset the pixelsRendered counter every time.
+*/
+gceSTATUS
+gco2D_ProfileEngine(
+	IN gco2D Engine,
+	OPTIONAL gcs2D_PROFILE_PTR Profile
+	);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __gc_hal_raster_h_ */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gcMem.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gcMem.h
@@ -0,0 +1,457 @@
+/****************************************************************************
+*
+*    Copyright (C) 2002 - 2008 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public Lisence as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+/*
+**	Include file for the local memory management.
+*/
+
+#ifndef __gcmem_h_
+#define __gcmem_h_
+
+/*******************************************************************************
+**  Usage:
+
+	The macros to declare MemPool type and functions are
+	gcmMEM_DeclareFSMemPool (Type, TypeName, Prefix)
+	gcmMEM_DeclareVSMemPool (Type, TypeName, Prefix)
+	gcmMEM_DeclareAFSMemPool(Type, TypeName, Prefix)
+
+	The data structures for MemPool are
+	typedef struct _gcsMEM_FS_MEM_POOL *	gcsMEM_FS_MEM_POOL;
+	typedef struct _gcsMEM_VS_MEM_POOL *	gcsMEM_VS_MEM_POOL;
+	typedef struct _gcsMEM_AFS_MEM_POOL *	gcsMEM_AFS_MEM_POOL;
+
+	The MemPool constructor and destructor functions are
+	gcfMEM_InitFSMemPool(gcsMEM_FS_MEM_POOL *, gcoOS, gctUINT, gctUINT);
+	gcfMEM_FreeFSMemPool(gcsMEM_FS_MEM_POOL *);
+	gcfMEM_InitVSMemPool(gcsMEM_VS_MEM_POOL *, gcoOS, gctUINT, gctBOOL);
+	gcfMEM_FreeVSMemPool(gcsMEM_VS_MEM_POOL *);
+	gcfMEM_InitAFSMemPool(gcsMEM_AFS_MEM_POOL *, gcoOS, gctUINT);
+	gcfMEM_FreeAFSMemPool(gcsMEM_AFS_MEM_POOL *);
+
+	FS:  for Fixed-Size data structures
+	VS:  for Variable-size data structures
+	AFS: for Array of Fixed-Size data structures
+
+
+	// Example 1: For a fixed-size data structure, struct gcsNode.
+	// It is used locally in a file, so the functions are static without prefix.
+	// At top level, declear allocate and free functions.
+	// The first argument is the data type.
+	// The second armument is the short name used in the fuctions.
+	gcmMEM_DeclareFSMemPool(struct gcsNode, Node, );
+
+	// The previous macro creates two inline functions,
+	// _AllocateNode and _FreeNode.
+
+	// In function or struct
+	gcsMEM_FS_MEM_POOL nodeMemPool;
+
+	// In function,
+	struct gcsNode * node;
+	gceSTATUS status;
+
+	// Before using the memory pool, initialize it.
+	// The second argument is the gcoOS object.
+	// The third argument is the number of data structures to allocate for each chunk.
+	status = gcfMEM_InitFSMemPool(&nodeMemPool, os, 100, sizeof(struct gcsNode));
+	...
+
+	// Allocate a node.
+	status = _AllocateNode(nodeMemPool, &node);
+	...
+	// Free a node.
+	_FreeNode(nodeMemPool, node);
+
+	// After using the memory pool, free it.
+	gcfMEM_FreeFSMemPool(&nodeMemPool);
+
+
+	// Example 2: For array of fixed-size data structures, struct gcsNode.
+	// It is used in several files, so the functions are extern with prefix.
+	// At top level, declear allocate and free functions.
+	// The first argument is the data type, and the second one is the short name
+	// used in the fuctions.
+	gcmMEM_DeclareAFSMemPool(struct gcsNode, NodeArray, gcfOpt);
+
+	// The previous macro creates two inline functions,
+	// gcfOpt_AllocateNodeArray and gcfOpt_FreeNodeArray.
+
+	// In function or struct
+	gcsMEM_AFS_MEM_POOL nodeArrayMemPool;
+
+	// In function,
+	struct gcsNode * nodeArray;
+	gceSTATUS status;
+
+	// Before using the array memory pool, initialize it.
+	// The second argument is the gcoOS object, the third is the number of data
+	// structures to allocate for each chunk.
+	status = gcfMEM_InitAFSMemPool(&nodeArrayMemPool, os, sizeof(struct gcsNode));
+	...
+
+	// Allocate a node array of size 100.
+	status = gcfOpt_AllocateNodeArray(nodeArrayMemPool, &nodeArray, 100);
+	...
+	// Free a node array.
+	gcfOpt_FreeNodeArray(&nodeArrayMemPool, nodeArray);
+
+	// After using the array memory pool, free it.
+	gcfMEM_FreeAFSMemPool(&nodeArrayMemPool);
+
+*******************************************************************************/
+
+/*******************************************************************************
+**	To switch back to use gcoOS_Allocate and gcoOS_Free, add
+**	#define USE_LOCAL_MEMORY_POOL 0
+**	before including this file.
+*******************************************************************************/
+#ifndef USE_LOCAL_MEMORY_POOL
+/*
+    USE_LOCAL_MEMORY_POOL
+
+    This define enables the local memory management to improve performance.
+*/
+#define USE_LOCAL_MEMORY_POOL		1
+#endif
+
+/*******************************************************************************
+**							Memory Pool Data Structures
+*******************************************************************************/
+typedef struct _gcsMEM_FS_MEM_POOL *	gcsMEM_FS_MEM_POOL;
+typedef struct _gcsMEM_VS_MEM_POOL *	gcsMEM_VS_MEM_POOL;
+typedef struct _gcsMEM_AFS_MEM_POOL *	gcsMEM_AFS_MEM_POOL;
+
+/*******************************************************************************
+**							Memory Pool Macros
+*******************************************************************************/
+#if USE_LOCAL_MEMORY_POOL
+#define gcmMEM_DeclareFSMemPool(Type, TypeName, Prefix) \
+gcmINLINE gceSTATUS \
+Prefix##_Allocate##TypeName( \
+	gcsMEM_FS_MEM_POOL		MemPool, \
+	Type **					Pointer \
+	) \
+{ \
+	return(gcfMEM_FSMemPoolGetANode(MemPool, (gctPOINTER *) Pointer)); \
+} \
+ \
+gcmINLINE gceSTATUS \
+Prefix##_CAllocate##TypeName( \
+	gcsMEM_FS_MEM_POOL		MemPool, \
+	Type **					Pointer \
+	) \
+{ \
+	gceSTATUS				status; \
+	gcmERR_RETURN(gcfMEM_FSMemPoolGetANode(MemPool, (gctPOINTER *) Pointer)); \
+	gcmVERIFY_OK(gcoOS_ZeroMemory(*(gctPOINTER *) Pointer, gcmSIZEOF(Type))); \
+	return gcvSTATUS_OK; \
+} \
+ \
+gcmINLINE gceSTATUS \
+Prefix##_Free##TypeName( \
+	gcsMEM_FS_MEM_POOL		MemPool, \
+	Type *					Pointer \
+	) \
+{ \
+	return(gcfMEM_FSMemPoolFreeANode(MemPool, (gctPOINTER) Pointer)); \
+} \
+ \
+gcmINLINE gceSTATUS \
+Prefix##_Free##TypeName##List( \
+	gcsMEM_FS_MEM_POOL		MemPool, \
+	Type *					FirstPointer, \
+	Type *					LastPointer \
+	) \
+{ \
+	return(gcfMEM_FSMemPoolFreeAList(MemPool, (gctPOINTER) FirstPointer, (gctPOINTER) LastPointer)); \
+}
+
+#define gcmMEM_DeclareVSMemPool(Type, TypeName, Prefix) \
+gcmINLINE gceSTATUS \
+Prefix##_Allocate##TypeName( \
+	gcsMEM_FS_MEM_POOL		MemPool, \
+	Type **					Pointer, \
+	gctUINT					Size \
+	) \
+{ \
+	return(gcfMEM_VSMemPoolGetANode(MemPool, Size, (gctPOINTER *) Pointer)); \
+} \
+ \
+gcmINLINE gceSTATUS \
+Prefix##_CAllocate##TypeName( \
+	gcsMEM_FS_MEM_POOL		MemPool, \
+	Type **					Pointer, \
+	gctUINT					Size \
+	) \
+{ \
+	gceSTATUS				status; \
+	gcmERR_RETURN(gcfMEM_VSMemPoolGetANode(MemPool, Size, (gctPOINTER *) Pointer)); \
+	gcmVERIFY_OK(gcoOS_ZeroMemory(*(gctPOINTER *) Pointer, size)); \
+	return gcvSTATUS_OK; \
+} \
+ \
+gcmINLINE gceSTATUS \
+Prefix##_Free##TypeName( \
+	gcsMEM_FS_MEM_POOL		MemPool, \
+	Type *					Pointer \
+	) \
+{ \
+	return(gcfMEM_VSMemPoolFreeANode(MemPool, (gctPOINTER) Pointer)); \
+}
+
+#define gcmMEM_DeclareAFSMemPool(Type, TypeName, Prefix) \
+gcmINLINE gceSTATUS \
+Prefix##_Allocate##TypeName( \
+	gcsMEM_AFS_MEM_POOL		MemPool, \
+	Type **					Pointer, \
+	gctUINT					Count \
+	) \
+{ \
+	return(gcfMEM_AFSMemPoolGetANode(MemPool, Count, (gctPOINTER *) Pointer)); \
+} \
+ \
+gcmINLINE gceSTATUS \
+Prefix##_CAllocate##TypeName( \
+	gcsMEM_AFS_MEM_POOL		MemPool, \
+	Type **					Pointer, \
+	gctUINT					Count \
+	) \
+{ \
+	gceSTATUS				status; \
+	gcmERR_RETURN(gcfMEM_AFSMemPoolGetANode(MemPool, Count, (gctPOINTER *) Pointer)); \
+	gcmVERIFY_OK(gcoOS_ZeroMemory(*(gctPOINTER *) Pointer, Count * gcmSIZEOF(Type))); \
+	return gcvSTATUS_OK; \
+} \
+ \
+gcmINLINE gceSTATUS \
+Prefix##_Free##TypeName( \
+	gcsMEM_AFS_MEM_POOL		MemPool, \
+	Type *					Pointer \
+	) \
+{ \
+	return(gcfMEM_AFSMemPoolFreeANode(MemPool, (gctPOINTER) Pointer)); \
+}
+
+#else
+
+#define gcmMEM_DeclareFSMemPool(Type, TypeName, Prefix) \
+gcmINLINE gceSTATUS \
+Prefix##_Allocate##TypeName( \
+	gcsMEM_FS_MEM_POOL		MemPool, \
+	Type **					Pointer \
+	) \
+{ \
+	return(gcoOS_Allocate(MemPool->os, \
+							gcmSIZEOF(Type), \
+							(gctPOINTER *) Pointer)); \
+} \
+ \
+gcmINLINE gceSTATUS \
+Prefix##_CAllocate##TypeName( \
+	gcsMEM_FS_MEM_POOL		MemPool, \
+	Type **					Pointer \
+	) \
+{ \
+	gceSTATUS				status; \
+	gcmERR_RETURN(gcoOS_Allocate(MemPool->os, \
+							gcmSIZEOF(Type), \
+							(gctPOINTER *) Pointer)); \
+	gcmVERIFY_OK(gcoOS_ZeroMemory(*Block, gcmSIZEOF(Type))); \
+	return gcvSTATUS_OK; \
+} \
+ \
+gcmINLINE gceSTATUS \
+Prefix##_Free##TypeName( \
+	gcsMEM_FS_MEM_POOL		MemPool, \
+	Type *					Pointer \
+	) \
+{ \
+	return(gcoOS_Free(MemPool->os, Pointer)); \
+}
+
+#define gcmMEM_DeclareVSMemPool(Type, TypeName, Prefix) \
+gcmINLINE gceSTATUS \
+Prefix##_Allocate##TypeName( \
+	gcsMEM_VS_MEM_POOL		MemPool, \
+	Type **					Pointer, \
+	gctUINT					Size \
+	) \
+{ \
+	return(gcoOS_Allocate(MemPool->os, \
+							Size, \
+							(gctPOINTER *) Pointer)); \
+} \
+ \
+gcmINLINE gceSTATUS \
+Prefix##_CAllocate##TypeName( \
+	gcsMEM_VS_MEM_POOL		MemPool, \
+	Type **					Pointer, \
+	gctUINT					Size \
+	) \
+{ \
+	gceSTATUS				status; \
+	gcmERR_RETURN(gcoOS_Allocate(MemPool->os, \
+							Size, \
+							(gctPOINTER *) Pointer)); \
+	gcmVERIFY_OK(gcoOS_ZeroMemory(*Block, Size)); \
+	return gcvSTATUS_OK; \
+} \
+ \
+gcmINLINE gceSTATUS \
+Prefix##_Free##TypeName( \
+	gcsMEM_VS_MEM_POOL		MemPool, \
+	Type *					Pointer \
+	) \
+{ \
+	return(gcoOS_Free(MemPool->os, Pointer)); \
+}
+
+#define gcmMEM_DeclareAFSMemPool(Type, TypeName, Prefix) \
+gcmINLINE gceSTATUS \
+Prefix##_Allocate##TypeName( \
+	gcsMEM_AFS_MEM_POOL		MemPool, \
+	Type **					Pointer, \
+	gctUINT					Count \
+	) \
+{ \
+	return(gcoOS_Allocate(MemPool->os, \
+							Count * gcmSIZEOF(Type), \
+							(gctPOINTER *) Pointer)); \
+} \
+ \
+gcmINLINE gceSTATUS \
+Prefix##_CAllocate##TypeName( \
+	gcsMEM_AFS_MEM_POOL		MemPool, \
+	Type **					Pointer, \
+	gctUINT					Count \
+	) \
+{ \
+	gceSTATUS				status; \
+	gcmERR_RETURN(gcoOS_Allocate(MemPool->os, \
+							Count * gcmSIZEOF(Type), \
+							(gctPOINTER *) Pointer)); \
+	gcmVERIFY_OK(gcoOS_ZeroMemory(*Pointer, Count * gcmSIZEOF(Type))); \
+	return gcvSTATUS_OK; \
+} \
+ \
+gcmINLINE gceSTATUS \
+Prefix##_Free##TypeName( \
+	gcsMEM_AFS_MEM_POOL		MemPool, \
+	Type *					Pointer \
+	) \
+{ \
+	return(gcoOS_Free(MemPool->os, Pointer)); \
+}
+#endif
+
+/*******************************************************************************
+**							Memory Pool Data Functions
+*******************************************************************************/
+gceSTATUS
+gcfMEM_InitFSMemPool(
+	IN gcsMEM_FS_MEM_POOL * MemPool,
+	IN gcoOS				OS,
+	IN gctUINT				NodeCount,
+	IN gctUINT				NodeSize
+	);
+
+gceSTATUS
+gcfMEM_FreeFSMemPool(
+	IN gcsMEM_FS_MEM_POOL * MemPool
+	);
+
+gceSTATUS
+gcfMEM_FSMemPoolGetANode(
+	IN gcsMEM_FS_MEM_POOL	MemPool,
+	OUT gctPOINTER *		Node
+	);
+
+gceSTATUS
+gcfMEM_FSMemPoolFreeANode(
+	IN gcsMEM_FS_MEM_POOL	MemPool,
+	IN gctPOINTER			Node
+	);
+
+gceSTATUS
+gcfMEM_FSMemPoolFreeAList(
+	IN gcsMEM_FS_MEM_POOL	MemPool,
+	IN gctPOINTER			FirstNode,
+	IN gctPOINTER			LastNode
+	);
+
+gceSTATUS
+gcfMEM_InitVSMemPool(
+	IN gcsMEM_VS_MEM_POOL * MemPool,
+	IN gcoOS				OS,
+	IN gctUINT				BlockSize,
+	IN gctBOOL				RecycleFreeNode
+	);
+
+gceSTATUS
+gcfMEM_FreeVSMemPool(
+	IN gcsMEM_VS_MEM_POOL * MemPool
+	);
+
+gceSTATUS
+gcfMEM_VSMemPoolGetANode(
+	IN gcsMEM_VS_MEM_POOL	MemPool,
+	IN gctUINT				Size,
+	IN gctUINT				Alignment,
+	OUT gctPOINTER *		Node
+	);
+
+gceSTATUS
+gcfMEM_VSMemPoolFreeANode(
+	IN gcsMEM_VS_MEM_POOL	MemPool,
+	IN gctPOINTER			Node
+	);
+
+gceSTATUS
+gcfMEM_InitAFSMemPool(
+	IN gcsMEM_AFS_MEM_POOL *MemPool,
+	IN gcoOS				OS,
+	IN gctUINT				NodeCount,
+	IN gctUINT				NodeSize
+	);
+
+gceSTATUS
+gcfMEM_FreeAFSMemPool(
+	IN gcsMEM_AFS_MEM_POOL *MemPool
+	);
+
+gceSTATUS
+gcfMEM_AFSMemPoolGetANode(
+	IN gcsMEM_AFS_MEM_POOL	MemPool,
+	IN gctUINT				Count,
+	OUT gctPOINTER *		Node
+	);
+
+gceSTATUS
+gcfMEM_AFSMemPoolFreeANode(
+	IN gcsMEM_AFS_MEM_POOL	MemPool,
+	IN gctPOINTER			Node
+	);
+
+#endif /* __gcmem_h_ */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/aqHal.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/aqHal.h
@@ -0,0 +1,1646 @@
+/****************************************************************************
+*
+*    Copyright (C) 2002 - 2008 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public Lisence as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+
+
+#ifndef __aqhal_h_
+#define __aqhal_h_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "aqTypes.h"
+#include "aqHalEnum.h"
+#include "gcHAL_Base.h"
+#include "gcProfiler.h"
+
+/******************************************************************************\
+********************************* Inline Macro *********************************
+\******************************************************************************/
+
+#if defined(LINUX)
+#	define gcmINLINE inline
+#else
+#	define gcmINLINE __inline
+#endif
+
+/******************************************************************************\
+******************************* Alignment Macros *******************************
+\******************************************************************************/
+
+#define gcmALIGN(n, align) \
+( \
+	((n) + ((align) - 1)) & ~((align) - 1) \
+)
+
+/******************************************************************************\
+***************************** Element Count Macro *****************************
+\******************************************************************************/
+
+#define gcmSIZEOF(a) \
+( \
+	(gctSIZE_T) (sizeof(a)) \
+)
+
+#define gcmCOUNTOF(a) \
+( \
+	sizeof(a) / sizeof(a[0]) \
+)
+
+/******************************************************************************\
+******************************** gcsOBJECT Object *******************************
+\******************************************************************************/
+
+/* Macro to combine four characters into a Charcater Code. */
+#define gcmCC(c1, c2, c3, c4) \
+( \
+	(char)(c1) \
+	| \
+	((char)(c2) << 8) \
+	| \
+	((char)(c3) << 16) \
+	| \
+	((char)(c4) << 24) \
+)
+
+/* Type of objects. */
+typedef enum _gceOBJECT_TYPE
+{
+	gcvOBJ_UNKNOWN 				= 0,
+	gcvOBJ_2D					= gcmCC('2','D',' ',' '),
+	gcvOBJ_3D					= gcmCC('3','D',' ',' '),
+	gcvOBJ_ATTRIBUTE			= gcmCC('A','T','T','R'),
+	gcvOBJ_BRUSHCACHE			= gcmCC('B','R','U','$'),
+	gcvOBJ_BRUSHNODE			= gcmCC('B','R','U','n'),
+	gcvOBJ_BRUSH				= gcmCC('B','R','U','o'),
+	gcvOBJ_BUFFER				= gcmCC('B','U','F','R'),
+	gcvOBJ_COMMAND				= gcmCC('C','M','D',' '),
+	gcvOBJ_COMMANDBUFFER		= gcmCC('C','M','D','B'),
+	gcvOBJ_CONTEXT				= gcmCC('C','T','X','T'),
+	gcvOBJ_DUMP					= gcmCC('D','U','M','P'),
+	gcvOBJ_EVENT				= gcmCC('E','V','N','T'),
+	gcvOBJ_FUNCTION				= gcmCC('F','U','N','C'),
+	gcvOBJ_HAL					= gcmCC('H','A','L',' '),
+	gcvOBJ_HARDWARE				= gcmCC('H','A','R','D'),
+	gcvOBJ_HEAP					= gcmCC('H','E','A','P'),
+	gcvOBJ_INDEX				= gcmCC('I','N','D','X'),
+	gcvOBJ_INTERRUPT			= gcmCC('I','N','T','R'),
+	gcvOBJ_KERNEL				= gcmCC('K','E','R','N'),
+	gcvOBJ_MMU					= gcmCC('M','M','U',' '),
+	gcvOBJ_OS					= gcmCC('O','S',' ',' '),
+	gcvOBJ_OUTPUT				= gcmCC('O','U','T','P'),
+	gcvOBJ_PAINT				= gcmCC('P','N','T',' '),
+	gcvOBJ_PATH					= gcmCC('P','A','T','H'),
+	gcvOBJ_QUEUE				= gcmCC('Q','U','E',' '),
+	gcvOBJ_SAMPLER				= gcmCC('S','A','M','P'),
+	gcvOBJ_SHADER				= gcmCC('S','H','D','R'),
+	gcvOBJ_STREAM				= gcmCC('S','T','R','M'),
+	gcvOBJ_SURF					= gcmCC('S','U','R','F'),
+	gcvOBJ_TEXTURE				= gcmCC('T','X','T','R'),
+	gcvOBJ_UNIFORM				= gcmCC('U','N','I','F'),
+	gcvOBJ_VARIABLE				= gcmCC('V','A','R','I'),
+	gcvOBJ_VERTEX				= gcmCC('V','R','T','X'),
+	gcvOBJ_VIDMEM				= gcmCC('V','M','E','M'),
+	gcvOBJ_VG					= gcmCC('V','G',' ',' '),
+}
+gceOBJECT_TYPE;
+
+/* gcsOBJECT object defintinon. */
+typedef struct _gcsOBJECT
+{
+	/* Type of an object. */
+	gceOBJECT_TYPE				type;
+}
+gcsOBJECT;
+
+/* Kernel settings. */
+typedef struct _gcsKERNEL_SETTINGS
+{
+	/* Used RealTime signal between kernel and user. */
+	gctINT signal;
+}
+gcsKERNEL_SETTINGS;
+
+/*******************************************************************************
+**
+**	gcmVERIFY_OBJECT
+**
+**		Assert if an object is invalid or is not of the specified type.  If the
+**		object is invalid or not of the specified type, AQSTATUS_INVALD_OBJECT
+**		will be returned from the current function.  In retail mode this macro
+**		does nothing.
+**
+**	ARGUMENTS:
+**
+**		obj		Object to test.
+**		t		Expected type of the object.
+*/
+#ifdef _DEBUG
+#	define gcmVERIFY_OBJECT(obj, t) \
+		do \
+		{ \
+			if ( (obj == gcvNULL) || (((gcsOBJECT*)(obj))->type != t) ) \
+			{ \
+				gcmASSERT( \
+					(obj != gcvNULL) && (((gcsOBJECT*)(obj))->type == t) \
+					); \
+				return gcvSTATUS_INVALID_OBJECT; \
+			} \
+		} \
+		while (gcvFALSE)
+#else
+#	define gcmVERIFY_OBJECT(obj, t)
+#endif
+
+/******************************************************************************\
+********************************** gcoOS Object *********************************
+\******************************************************************************/
+
+/* Query the video memory. */
+gceSTATUS
+gcoOS_QueryVideoMemory(
+	IN gcoOS Os,
+	OUT gctPHYS_ADDR * InternalAddress,
+	OUT gctSIZE_T * InternalSize,
+	OUT gctPHYS_ADDR * ExternalAddress,
+	OUT gctSIZE_T * ExternalSize,
+	OUT gctPHYS_ADDR * ContiguousAddress,
+	OUT gctSIZE_T * ContiguousSize
+	);
+
+/* Allocate memory from the heap. */
+gceSTATUS
+gcoOS_Allocate(
+	IN gcoOS Os,
+	IN gctSIZE_T Bytes,
+	OUT gctPOINTER * Memory
+	);
+
+/* Free allocated memory. */
+gceSTATUS
+gcoOS_Free(
+	IN gcoOS Os,
+	IN gctPOINTER Memory
+	);
+
+/* Allocate paged memory. */
+gceSTATUS
+gcoOS_AllocatePagedMemory(
+	IN gcoOS Os,
+	IN gctSIZE_T Bytes,
+	OUT gctPHYS_ADDR * Physical
+	);
+
+/* Lock pages. */
+gceSTATUS
+gcoOS_LockPages(
+	IN gcoOS Os,
+	IN gctPHYS_ADDR Physical,
+	IN gctSIZE_T Bytes,
+	OUT gctPOINTER * Logical,
+	OUT gctSIZE_T * PageCount
+	);
+
+/* Map pages. */
+gceSTATUS
+gcoOS_MapPages(
+	IN gcoOS Os,
+	IN gctPHYS_ADDR Physical,
+	IN gctSIZE_T PageCount,
+	IN gctPOINTER PageTable
+	);
+
+/* Unlock pages. */
+gceSTATUS
+gcoOS_UnlockPages(
+	IN gcoOS Os,
+	IN gctPHYS_ADDR Physical,
+	IN gctSIZE_T Bytes,
+	IN gctPOINTER Logical
+	);
+
+/* Free paged memory. */
+gceSTATUS
+gcoOS_FreePagedMemory(
+	IN gcoOS Os,
+	IN gctPHYS_ADDR Physical,
+	IN gctSIZE_T Bytes
+	);
+
+/* Allocate non-paged memory. */
+gceSTATUS
+gcoOS_AllocateNonPagedMemory(
+	IN gcoOS Os,
+	IN gctBOOL InUserSpace,
+	IN OUT gctSIZE_T * Bytes,
+	OUT gctPHYS_ADDR * Physical,
+	OUT gctPOINTER * Logical
+	);
+
+/* Free non-paged memory. */
+gceSTATUS
+gcoOS_FreeNonPagedMemory(
+	IN gcoOS Os,
+	IN gctSIZE_T Bytes,
+	IN gctPHYS_ADDR Physical,
+	IN gctPOINTER Logical
+	);
+
+/* Allocate contiguous memory. */
+gceSTATUS
+gcoOS_AllocateContiguous(
+	IN gcoOS Os,
+	IN gctBOOL InUserSpace,
+	IN OUT gctSIZE_T * Bytes,
+	OUT gctPHYS_ADDR * Physical,
+	OUT gctPOINTER * Logical
+	);
+
+/* Free contiguous memory. */
+gceSTATUS
+gcoOS_FreeContiguous(
+	IN gcoOS Os,
+	IN gctPHYS_ADDR Physical,
+	IN gctPOINTER Logical,
+	IN gctSIZE_T Bytes
+	);
+
+/* Get the number fo bytes per page. */
+gceSTATUS
+gcoOS_GetPageSize(
+	IN gcoOS Os,
+	OUT gctSIZE_T * PageSize
+	);
+
+/* Get the physical address of a corresponding logical address. */
+gceSTATUS
+gcoOS_GetPhysicalAddress(
+	IN gcoOS Os,
+	IN gctPOINTER Logical,
+	OUT gctUINT32 * Address
+	);
+
+/* Map physical memory. */
+gceSTATUS
+gcoOS_MapPhysical(
+	IN gcoOS Os,
+	IN gctUINT32 Physical,
+	IN gctUINT32 OriginalLogical,	
+	IN gctSIZE_T Bytes,
+	OUT gctPOINTER * Logical
+	);
+
+/* Unmap previously mapped physical memory. */
+gceSTATUS
+gcoOS_UnmapPhysical(
+	IN gcoOS Os,
+	IN gctPOINTER Logical,
+	IN gctSIZE_T Bytes
+	);
+
+/* Read data from a hardware register. */
+gceSTATUS
+gcoOS_ReadRegister(
+	IN gcoOS Os,
+	IN gctUINT32 Address,
+	OUT gctUINT32 * Data
+	);
+
+/* Write data to a hardware register. */
+gceSTATUS
+gcoOS_WriteRegister(
+	IN gcoOS Os,
+	IN gctUINT32 Address,
+	IN gctUINT32 Data
+	);
+
+/* Write data to a 32-bit memory location. */
+gceSTATUS
+gcoOS_WriteMemory(
+	IN gcoOS Os,
+	IN gctPOINTER Address,
+	IN gctUINT32 Data
+	);
+
+/* Map physical memory into the process space. */
+gceSTATUS
+gcoOS_MapMemory(
+	IN gcoOS Os,
+	IN gctPHYS_ADDR Physical,
+	IN gctSIZE_T Bytes,
+	OUT gctPOINTER * Logical
+	);
+
+/* Unmap physical memory from the process space. */
+gceSTATUS
+gcoOS_UnmapMemory(
+	IN gcoOS Os,
+	IN gctPHYS_ADDR Physical,
+	IN gctSIZE_T Bytes,
+	IN gctPOINTER Logical
+	);
+
+/* Create a new mutex. */
+gceSTATUS
+gcoOS_CreateMutex(
+	IN gcoOS Os,
+	OUT gctPOINTER * Mutex
+	);
+
+/* Delete a mutex. */
+gceSTATUS
+gcoOS_DeleteMutex(
+	IN gcoOS Os,
+	IN gctPOINTER Mutex
+	);
+
+/* Acquire a mutex. */
+gceSTATUS
+gcoOS_AcquireMutex(
+	IN gcoOS Os,
+	IN gctPOINTER Mutex,
+	IN gctUINT32 Timeout
+	);
+
+/* Release a mutex. */
+gceSTATUS
+gcoOS_ReleaseMutex(
+	IN gcoOS Os,
+	IN gctPOINTER Mutex
+	);
+
+/* Atomically exchange a pair of 32-bit values. */
+gceSTATUS
+gcoOS_AtomicExchange(
+	IN gcoOS Os,
+    IN OUT gctUINT32_PTR Target,
+	IN gctUINT32 NewValue,
+    OUT gctUINT32_PTR OldValue
+	);
+
+/* Atomically exchange a pair of pointers. */
+gceSTATUS
+gcoOS_AtomicExchangePtr(
+	IN gcoOS Os,
+    IN OUT gctPOINTER * Target,
+	IN gctPOINTER NewValue,
+    OUT gctPOINTER * OldValue
+	);
+
+/* Delay a number of microseconds. */
+gceSTATUS
+gcoOS_Delay(
+	IN gcoOS Os,
+	IN gctUINT32 Delay
+	);
+
+/* Memory barrier. */
+gceSTATUS
+gcoOS_MemoryBarrier(
+	IN gcoOS Os,
+	IN gctPOINTER Address
+	);
+
+/* Map user pointer. */
+gceSTATUS
+gcoOS_MapUserPointer(
+	IN gcoOS Os,
+	IN gctPOINTER Pointer,
+	IN gctSIZE_T Size,
+	OUT gctPOINTER * KernelPointer
+	);
+
+/* Map user pointer. */
+gceSTATUS
+gcoOS_UnmapUserPointer(
+	IN gcoOS Os,
+	IN gctPOINTER Pointer,
+	IN gctSIZE_T Size,
+	IN gctPOINTER KernelPointer
+	);
+
+#if USE_EVENT_QUEUE
+gceSTATUS
+gcoOS_SuspendInterrupt(
+	IN gcoOS Os
+	);
+
+gceSTATUS
+gcoOS_ResumeInterrupt(
+	IN gcoOS Os
+	);
+#endif
+
+/* Notify the idle status. */
+gceSTATUS
+gcoOS_NotifyIdle(
+	IN gcoOS Os,
+	IN gctBOOL Idle
+	);
+
+gceSTATUS
+gcoOS_SetConstraint(
+	IN gcoOS Os,
+	IN gctBOOL enableDVFM,
+	IN gctBOOL enableLPM
+	);
+
+gceSTATUS
+gcoOS_UnSetConstraint(
+	IN gcoOS Os,
+	IN gctBOOL enableDVFM,
+	IN gctBOOL enableLPM
+	);
+
+/******************************************************************************\
+********************************** Signal Object *********************************
+\******************************************************************************/
+
+/* User signal command codes. */
+typedef enum _gceUSER_SIGNAL_COMMAND_CODES
+{
+	gcvUSER_SIGNAL_CREATE,
+	gcvUSER_SIGNAL_DESTROY,
+	gcvUSER_SIGNAL_SIGNAL,
+	gcvUSER_SIGNAL_WAIT,
+}
+gceUSER_SIGNAL_COMMAND_CODES;
+
+/* Create a signal. */
+gceSTATUS
+gcoOS_CreateSignal(
+	IN gcoOS Os,
+	IN gctBOOL ManualReset,
+	OUT gctSIGNAL * Signal
+	);
+
+/* Destroy a signal. */
+gceSTATUS
+gcoOS_DestroySignal(
+	IN gcoOS Os,
+	IN gctSIGNAL Signal
+	);
+
+/* Signal a signal. */
+gceSTATUS
+gcoOS_Signal(
+	IN gcoOS Os,
+	IN gctSIGNAL Signal,
+	IN gctBOOL State
+	);
+
+/* Wait for a signal. */
+gceSTATUS
+gcoOS_WaitSignal(
+	IN gcoOS Os,
+	IN gctSIGNAL Signal,
+	IN gctUINT32 Wait
+	);
+
+/* Map a user signal to the kernel space. */
+gceSTATUS
+gcoOS_MapSignal(
+	IN gcoOS Os,
+	IN gctSIGNAL Signal,
+	IN gctHANDLE Process,
+	OUT gctSIGNAL * MappedSignal
+	);
+
+/* Map user memory. */
+gceSTATUS
+gcoOS_MapUserMemory(
+	IN gcoOS Os,
+	IN gctPOINTER Memory,
+	IN gctSIZE_T Size,
+	OUT gctPOINTER * Info,
+	OUT gctUINT32_PTR Address
+	);
+
+/* Unmap user memory. */
+gceSTATUS
+gcoOS_UnmapUserMemory(
+	IN gcoOS Os,
+	IN gctPOINTER Memory,
+	IN gctSIZE_T Size,
+	IN gctPOINTER Info,
+	IN gctUINT32 Address
+	);
+
+#ifdef ANDROID_VERSION_ECLAIR
+gceSTATUS
+gcoOS_FlushCache(
+    int fd,
+    int offset,
+    int size 
+    );
+#endif
+
+#if !USE_NEW_LINUX_SIGNAL
+/* Create signal to be used in the user space. */
+gceSTATUS
+gcoOS_CreateUserSignal(
+	IN gcoOS Os,
+	IN gctBOOL ManualReset,
+	OUT gctINT * SignalID
+	);
+
+/* Destroy signal used in the user space. */
+gceSTATUS
+gcoOS_DestroyUserSignal(
+	IN gcoOS Os,
+	IN gctINT SignalID
+	);
+
+/* Wait for signal used in the user space. */
+gceSTATUS
+gcoOS_WaitUserSignal(
+	IN gcoOS Os,
+	IN gctINT SignalID,
+	IN gctUINT32 Wait
+	);
+
+/* Signal a signal used in the user space. */
+gceSTATUS
+gcoOS_SignalUserSignal(
+	IN gcoOS Os,
+	IN gctINT SignalID,
+	IN gctBOOL State
+	);
+#endif /* USE_NEW_LINUX_SIGNAL */
+
+/* Set a signal owned by a process. */
+gceSTATUS
+gcoOS_UserSignal(
+	IN gcoOS Os,
+	IN gctSIGNAL Signal,
+	IN gctHANDLE Process
+	);
+
+/******************************************************************************\
+********************************* gcoHEAP Object ********************************
+\******************************************************************************/
+
+typedef struct _gcoHEAP *		gcoHEAP;
+
+/* Construct a new gcoHEAP object. */
+gceSTATUS
+gcoHEAP_Construct(
+	IN gcoOS Os,
+	IN gctSIZE_T AllocationSize,
+	IN gctSIZE_T WasteThreshold,
+	OUT gcoHEAP * Heap
+	);
+
+/* Destroy an gcoHEAP object. */
+gceSTATUS
+gcoHEAP_Destroy(
+	IN gcoHEAP Heap
+	);
+
+/* Allocate memory. */
+gceSTATUS
+gcoHEAP_Allocate(
+	IN gcoHEAP Heap,
+	IN gctSIZE_T Bytes,
+	OUT gctPOINTER * Node
+	);
+
+/* Free memory. */
+gceSTATUS
+gcoHEAP_Free(
+	IN gcoHEAP Heap,
+	IN gctPOINTER Node
+	);
+
+/* Compact the heap. */
+gceSTATUS
+gcoHEAP_Compact(
+	IN gcoHEAP Heap
+	);
+
+/* Profile the heap. */
+void
+gcoHEAP_ProfileStart(
+	IN gcoHEAP Heap
+	);
+
+void
+gcoHEAP_ProfileEnd(
+	IN gcoHEAP Heap,
+	IN gctCONST_STRING Title
+	);
+
+/******************************************************************************\
+******************************** gcoVIDMEM Object *******************************
+\******************************************************************************/
+
+typedef struct _gcoVIDMEM *			gcoVIDMEM;
+typedef union  _gcuVIDMEM_NODE *	gcuVIDMEM_NODE_PTR;
+typedef struct _gcoHARDWARE *		gcoHARDWARE;
+typedef struct _gcoKERNEL *			gcoKERNEL;
+
+/* Construct a new gcoVIDMEM object. */
+gceSTATUS
+gcoVIDMEM_Construct(
+	IN gcoOS Os,
+	IN gctUINT32 BaseAddress,
+	IN gctSIZE_T Bytes,
+	IN gctSIZE_T Threshold,
+	IN gctSIZE_T Banking,
+	OUT gcoVIDMEM * Memory
+	);
+
+/* Destroy an AQVDIMEM object. */
+gceSTATUS
+gcoVIDMEM_Destroy(
+	IN gcoVIDMEM Memory
+	);
+
+/* Allocate rectangular memory. */
+gceSTATUS
+gcoVIDMEM_Allocate(
+	IN gcoVIDMEM Memory,
+	IN gctUINT Width,
+	IN gctUINT Height,
+	IN gctUINT Depth,
+	IN gctUINT BytesPerPixel,
+	IN gctUINT32 Alignment,
+	IN gceSURF_TYPE Type,
+	OUT gcuVIDMEM_NODE_PTR * Node
+	);
+
+/* Allocate linear memory. */
+gceSTATUS
+gcoVIDMEM_AllocateLinear(
+	IN gcoVIDMEM Memory,
+	IN gctSIZE_T Bytes,
+	IN gctUINT32 Alignment,
+	IN gceSURF_TYPE Type,
+	OUT gcuVIDMEM_NODE_PTR * Node
+	);
+
+/* Free memory. */
+gceSTATUS
+gcoVIDMEM_Free(
+	IN gcuVIDMEM_NODE_PTR Node
+	);
+
+/* Lock memory. */
+gceSTATUS
+gcoVIDMEM_Lock(
+	IN gcuVIDMEM_NODE_PTR Node,
+	OUT gctUINT32 * Address
+	);
+
+/* Unlock memory. */
+gceSTATUS
+gcoVIDMEM_Unlock(
+	IN gcuVIDMEM_NODE_PTR Node,
+	IN gceSURF_TYPE Type,
+#if USE_EVENT_QUEUE
+	IN OUT gctBOOL * Asynchroneous
+#else
+	IN OUT gctSIZE_T * CommandSize,
+	OUT gctPOINTER	Commands
+#endif
+	);
+
+/* Construct a gcuVIDMEM_NODE union for virtual memory. */
+gceSTATUS
+gcoVIDMEM_ConstructVirtual(
+	IN gcoKERNEL Kernel,
+	IN gctSIZE_T Bytes,
+	OUT gcuVIDMEM_NODE_PTR * Node
+	);
+
+/* Destroy a gcuVIDMEM_NODE union for virtual memory. */
+gceSTATUS
+gcoVIDMEM_DestroyVirtual(
+	IN gcuVIDMEM_NODE_PTR Node
+	);
+
+/******************************************************************************\
+******************************** gcoKERNEL Object *******************************
+\******************************************************************************/
+
+struct _gcsHAL_INTERFACE;
+
+/* Notifications. */
+typedef enum _gceNOTIFY
+{
+	gcvNOTIFY_INTERRUPT,
+	gcvNOTIFY_COMMAND_QUEUE,
+}
+gceNOTIFY;
+
+/* Event locations. */
+typedef enum _gceKERNEL_WHERE
+{
+	gcvKERNEL_COMMAND,
+	gcvKERNEL_VERTEX,
+	gcvKERNEL_TRIANGLE,
+	gcvKERNEL_TEXTURE,
+	gcvKERNEL_PIXEL,
+}
+gceKERNEL_WHERE;
+
+/* Flush flags. */
+typedef enum _gceKERNEL_FLUSH
+{
+	gcvFLUSH_COLOR				= 0x01,
+	gcvFLUSH_DEPTH				= 0x02,
+	gcvFLUSH_TEXTURE			= 0x04,
+	gcvFLUSH_2D					= 0x08,
+}
+gceKERNEL_FLUSH;
+
+/* Construct a new gcoKERNEL object. */
+gceSTATUS
+gcoKERNEL_Construct(
+	IN gcoOS Os,
+	IN gctPOINTER Context,
+	OUT gcoKERNEL * Kernel
+	);
+
+/* Destroy an gcoKERNEL object. */
+gceSTATUS
+gcoKERNEL_Destroy(
+	IN gcoKERNEL Kernel
+	);
+
+/* Dispatch a user-level command. */
+gceSTATUS
+gcoKERNEL_Dispatch(
+	IN gcoKERNEL Kernel,
+	IN gctBOOL FromUser,
+	IN OUT struct _gcsHAL_INTERFACE * Interface
+	);
+
+/* Query the video memory. */
+gceSTATUS
+gcoKERNEL_QueryVideoMemory(
+	IN gcoKERNEL Kernel,
+	OUT struct _gcsHAL_INTERFACE * Interface
+	);
+
+/* Lookup the gcoVIDMEM object for a pool. */
+gceSTATUS
+gcoKERNEL_GetVideoMemoryPool(
+	IN gcoKERNEL Kernel,
+	IN gcePOOL Pool,
+	OUT gcoVIDMEM * VideoMemory
+	);
+
+/* Map video memory. */
+gceSTATUS
+gcoKERNEL_MapVideoMemory(
+	IN gcoKERNEL Kernel,
+	IN gctBOOL InUserSpace,
+	IN gctUINT32 Address,
+	OUT gctPOINTER * Logical
+	);
+
+/* Map memory. */
+gceSTATUS
+gcoKERNEL_MapMemory(
+	IN gcoKERNEL Kernel,
+	IN gctPHYS_ADDR Physical,
+	IN gctSIZE_T Bytes,
+	OUT gctPOINTER * Logical
+	);
+
+/* Unmap memory. */
+gceSTATUS
+gcoKERNEL_UnmapMemory(
+	IN gcoKERNEL Kernel,
+	IN gctPHYS_ADDR Physical,
+	IN gctSIZE_T Bytes,
+	IN gctPOINTER Logical
+	);
+
+/* Notification of events. */
+gceSTATUS
+gcoKERNEL_Notify(
+	IN gcoKERNEL Kernel,
+	IN gceNOTIFY Notifcation,
+	IN gctBOOL Data
+	);
+
+gceSTATUS
+gcoKERNEL_QuerySettings(
+	IN gcoKERNEL Kernel,
+	OUT gcsKERNEL_SETTINGS * Settings
+	);
+
+/******************************************************************************\
+******************************* gcoHARDWARE Object ******************************
+\******************************************************************************/
+
+/* Construct a new gcoHARDWARE object. */
+gceSTATUS
+gcoHARDWARE_Construct(
+	IN gcoOS Os,
+	OUT gcoHARDWARE * Hardware
+	);
+
+/* Destroy an gcoHARDWARE object. */
+gceSTATUS
+gcoHARDWARE_Destroy(
+	IN gcoHARDWARE Hardware
+	);
+
+/* Query system memory requirements. */
+gceSTATUS
+gcoHARDWARE_QuerySystemMemory(
+	IN gcoHARDWARE Hardware,
+	OUT gctSIZE_T * SystemSize,
+	OUT gctUINT32 * SystemBaseAddress
+	);
+
+/* Build virtual address. */
+gceSTATUS
+gcoHARDWARE_BuildVirtualAddress(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 Index,
+	IN gctUINT32 Offset,
+	OUT gctUINT32 * Address
+	);
+
+/* Query command buffer requirements. */
+gceSTATUS
+gcoHARDWARE_QueryCommandBuffer(
+	IN gcoHARDWARE Hardware,
+	OUT gctSIZE_T * Alignment,
+	OUT gctSIZE_T * ReservedHead,
+	OUT gctSIZE_T * ReservedTail
+	);
+
+/* Add a WAIT/LINK pair in the command queue. */
+gceSTATUS
+gcoHARDWARE_WaitLink(
+	IN gcoHARDWARE Hardware,
+	IN gctPOINTER Logical,
+	IN gctUINT32 Offset,
+	IN OUT gctSIZE_T * Bytes,
+	OUT gctPOINTER * Wait,
+	OUT gctSIZE_T * WaitBytes
+	);
+
+/* Kickstart the command processor. */
+gceSTATUS
+gcoHARDWARE_Execute(
+	IN gcoHARDWARE Hardware,
+	IN gctPOINTER Logical,
+	IN gctSIZE_T Bytes
+	);
+
+/* Add an END command in the command queue. */
+gceSTATUS
+gcoHARDWARE_End(
+	IN gcoHARDWARE Hardware,
+	IN gctPOINTER Logical,
+	IN OUT gctSIZE_T * Bytes
+	);
+
+/* Add a NOP command in the command queue. */
+gceSTATUS
+gcoHARDWARE_Nop(
+	IN gcoHARDWARE Hardware,
+	IN gctPOINTER Logical,
+	IN OUT gctSIZE_T * Bytes
+	);
+
+/* Add a WAIT command in the command queue. */
+gceSTATUS
+gcoHARDWARE_Wait(
+	IN gcoHARDWARE Hardware,
+	IN gctPOINTER Logical,
+	IN gctUINT32 Count,
+	IN OUT gctSIZE_T * Bytes
+	);
+
+/* Add a PIPESELECT command in the command queue. */
+gceSTATUS
+gcoHARDWARE_PipeSelect(
+	IN gcoHARDWARE Hardware,
+	IN gctPOINTER Logical,
+	IN gctUINT32 Pipe,
+	IN OUT gctSIZE_T * Bytes
+	);
+
+/* Add a LINK command in the command queue. */
+gceSTATUS
+gcoHARDWARE_Link(
+	IN gcoHARDWARE Hardware,
+	IN gctPOINTER Logical,
+	IN gctPOINTER FetchAddress,
+	IN gctSIZE_T FetchSize,
+	IN OUT gctSIZE_T * Bytes
+	);
+
+/* Add an EVENT command in the command queue. */
+gceSTATUS
+gcoHARDWARE_Event(
+	IN gcoHARDWARE Hardware,
+	IN gctPOINTER Logical,
+	IN gctUINT8 Event,
+	IN gceKERNEL_WHERE FromWhere,
+	IN OUT gctSIZE_T * Bytes
+	);
+
+/* Query the available memory. */
+gceSTATUS
+gcoHARDWARE_QueryMemory(
+	IN gcoHARDWARE Hardware,
+	OUT gctSIZE_T * InternalSize,
+	OUT gctUINT32 * InternalBaseAddress,
+	OUT gctUINT32 * InternalAlignment,
+	OUT gctSIZE_T * ExternalSize,
+	OUT gctUINT32 * ExternalBaseAddress,
+	OUT gctUINT32 * ExternalAlignment,
+	OUT gctUINT32 * HorizontalTileSize,
+	OUT gctUINT32 * VerticalTileSize
+	);
+
+/* Query the identity of the hardware. */
+gceSTATUS
+gcoHARDWARE_QueryChipIdentity(
+    IN gcoHARDWARE Hardware,
+	OUT gceCHIPMODEL* ChipModel,
+	OUT gctUINT32* ChipRevision,
+	OUT gctUINT32* ChipFeatures,
+	OUT gctUINT32* ChipMinorFeatures
+	);
+
+/* Query the specifications sof the hardware. */
+gceSTATUS
+gcoHARDWARE_QueryChipSpecs(
+	IN gcoHARDWARE Hardware,
+	OUT gctUINT32_PTR StreamCount,
+	OUT gctUINT32_PTR RegisterMax,
+	OUT gctUINT32_PTR ThreadCount,
+	OUT gctUINT32_PTR ShaderCoreCount,
+	OUT gctUINT32_PTR VertexCacheSize,
+	OUT gctUINT32_PTR VertexOutputBufferSize
+	);
+
+/* Convert an API format. */
+gceSTATUS
+gcoHARDWARE_ConvertFormat(
+	IN gcoHARDWARE Hardware,
+	IN gceSURF_FORMAT Format,
+	OUT gctUINT32 * BitsPerPixel,
+	OUT gctUINT32 * BytesPerTile
+	);
+
+/* Split a harwdare specific address into API stuff. */
+gceSTATUS
+gcoHARDWARE_SplitMemory(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 Address,
+	OUT gcePOOL * Pool,
+	OUT gctUINT32 * Offset
+	);
+
+/* Align size to tile boundary. */
+gceSTATUS
+gcoHARDWARE_AlignToTile(
+	IN gcoHARDWARE Hardware,
+	IN gceSURF_TYPE Type,
+	IN OUT gctUINT32_PTR Width,
+	IN OUT gctUINT32_PTR Height,
+	OUT gctBOOL_PTR SuperTiled
+	);
+
+/* Update command queue tail pointer. */
+gceSTATUS
+gcoHARWDARE_UpdateQueueTail(
+	IN gcoHARDWARE Hardware,
+	IN gctPOINTER Logical,
+	IN gctUINT32 Offset
+	);
+
+/* Convert logical address to hardware specific address. */
+gceSTATUS
+gcoHARDWARE_ConvertLogical(
+	IN gcoHARDWARE Hardware,
+	IN gctPOINTER Logical,
+	OUT gctUINT32 * Address
+	);
+
+/* Interrupt manager. */
+gceSTATUS
+gcoHARDWARE_Interrupt(
+	IN gcoHARDWARE Hardware,
+	IN gctBOOL InterruptValid
+	);
+
+/* Program MMU. */
+gceSTATUS
+gcoHARDWARE_SetMMU(
+	IN gcoHARDWARE Hardware,
+	IN gctPOINTER Logical
+	);
+
+/* Flush the MMU. */
+gceSTATUS
+gcoHARDWARE_FlushMMU(
+	IN gcoHARDWARE Hardware
+	);
+
+/* Get idle register. */
+gceSTATUS
+gcoHARDWARE_GetIdle(
+	IN gcoHARDWARE Hardware,
+	IN gctBOOL Wait,
+	OUT gctUINT32 * Data
+	);
+
+/* Flush the caches. */
+gceSTATUS
+gcoHARDWARE_Flush(
+	IN gcoHARDWARE Hardware,
+	IN gceKERNEL_FLUSH Flush,
+    IN gctPOINTER Logical,
+    IN OUT gctSIZE_T * Bytes
+	);
+
+/* Enable/disable fast clear. */
+gceSTATUS
+gcoHARDWARE_SetFastClear(
+    IN gcoHARDWARE Hardware,
+    IN gctINT Enable,
+	IN gctINT Compression
+    );
+
+gceSTATUS
+gcoHARDWARE_ReadInterrupt(
+	IN gcoHARDWARE Hardware,
+	OUT gctUINT32_PTR IDs
+	);
+
+/* Power management. */
+gceSTATUS
+gcoHARDWARE_SetPowerManagementState(
+    IN gcoHARDWARE Hardware,
+    IN gceCHIPPOWERSTATE State
+    );
+
+gceSTATUS
+gcoHARDWARE_QueryPowerManagementState(
+    IN gcoHARDWARE Hardware,
+    OUT gceCHIPPOWERSTATE* State
+    );
+
+/* Profile 2D Engine. */
+gceSTATUS
+gcoHARDWARE_ProfileEngine2D(
+	IN gcoHARDWARE Hardware,
+	OUT gco2D_PROFILE_PTR Profile
+	);
+
+gceSTATUS
+gcoHARDWARE_InitializeHardware(
+    IN gcoHARDWARE Hardware
+	);
+
+gceSTATUS
+gcoHARDWARE_Reset(
+	IN gcoHARDWARE Hardware
+	);
+
+/******************************************************************************\
+***************************** gcoINTERRUPT Object ******************************
+\******************************************************************************/
+
+typedef struct _gcoINTERRUPT *	gcoINTERRUPT;
+
+typedef gceSTATUS (* gctINTERRUPT_HANDLER)(
+	IN gcoKERNEL Kernel
+	);
+
+gceSTATUS
+gcoINTERRUPT_Construct(
+	IN gcoKERNEL Kernel,
+	OUT gcoINTERRUPT * Interrupt
+	);
+
+gceSTATUS
+gcoINTERRUPT_Destroy(
+	IN gcoINTERRUPT Interrupt
+	);
+
+gceSTATUS
+gcoINTERRUPT_SetHandler(
+	IN gcoINTERRUPT Interrupt,
+	IN OUT gctINT32_PTR Id,
+	IN gctINTERRUPT_HANDLER Handler
+	);
+
+gceSTATUS
+gcoINTERRUPT_Notify(
+	IN gcoINTERRUPT Interrupt,
+	IN gctBOOL Valid
+	);
+
+/******************************************************************************\
+******************************** gcoEVENT Object ********************************
+\******************************************************************************/
+
+typedef struct _gcoEVENT *		gcoEVENT;
+
+#if !USE_EVENT_QUEUE
+/* Event types. */
+typedef enum _gceEVENT_TYPE
+{
+	gcvEVENT_SIGNAL,
+	gcvEVENT_UNLOCK,
+	gcvEVENT_UNMAP_MEMORY,
+	gcvEVENT_UNMAP_USER_MEMORY,
+	gcvEVENT_FREE_NON_PAGED_MEMORY,
+	gcvEVENT_FREE_CONTIGUOUS_MEMORY,
+	gcvEVENT_FREE_VIDEO_MEMORY,
+	gcvEVENT_WRITE_DATA,
+	gcvEVENT_SET_IDLE,
+}
+gceEVENT_TYPE;
+
+/* Event data. */
+typedef union _gcuEVENT_DATA
+{
+	/* gcvEVENT_FREE_NON_PAGED_MEMORY */
+	struct _gcsEVENT_FREE_NON_PAGED_MEMORY
+	{
+		/* Number of allocated bytes. */
+		IN gctSIZE_T			bytes;
+
+		/* Physical address of allocation. */
+		IN gctPHYS_ADDR			physical;
+
+		/* Logical address of allocation. */
+		IN gctPOINTER			logical;
+	}
+	FreeNonPagedMemory;
+
+	/* gcvEVENT_FREE_VIDEO_MEMORY */
+	struct _gcsEVENT_FREE_VIDEO_MEMORY
+	{
+		/* Allocated memory. */
+		IN gcuVIDMEM_NODE_PTR	node;
+	}
+	FreeVideoMemory;
+
+	/* gcvEVENT_WRITE_DATA */
+	struct _gcsEVENT_WRITE_DATA
+	{
+		/* Logical address of memory to write data to. */
+		IN gctPOINTER			address;
+
+		/* Logical address in kernel to write data to. */
+		IN gctPOINTER			kernelAddress;
+
+		/* Data to write. */
+		IN gctUINT32			data;
+	}
+	WriteData;
+
+	/* gcvEVENT_UNLOCK */
+	struct _gcsEVENT_UNLOCK
+	{
+		/* Video memory node to unlock. */
+		IN gcuVIDMEM_NODE_PTR	node;
+
+		/* Type of surface to unlock. */
+		IN gceSURF_TYPE			type;
+	}
+	Unlock;
+
+	/* gcvEVENT_SIGNAL */
+	struct _gcsEVENT_SIGNAL
+	{
+		/* Signal handle to signal. */
+		IN gctSIGNAL			signal;
+
+		/* Aux signal handle to signal. */
+		IN gctSIGNAL			auxSignal;
+
+		/* Process owning the signal. */
+		IN gctHANDLE			process;
+
+        /* Event generated from where of pipeline */
+        IN gceKERNEL_WHERE      fromWhere;
+	}
+	Signal;
+
+	/* gcvEVENT_FREE_CONTIGUOUS_MEMORY */
+	struct _gcsEVENT_FREE_CONTIGUOUS_MEMORY
+	{
+		/* Number of allocated bytes. */
+		IN gctSIZE_T			bytes;
+
+		/* Physical address of allocation. */
+		IN gctPHYS_ADDR			physical;
+
+		/* Logical address of allocation. */
+		IN gctPOINTER			logical;
+	}
+	FreeContiguousMemory;
+
+	/* gcvEVENT_UNMAP_USER_MEMORY */
+	struct _gcsEVENT_UNMAP_USER_MEMORY
+	{
+		/* Private data for memory mapping. */
+		IN gctPOINTER			info;
+
+		/* Memory size. */
+		IN gctSIZE_T			size;
+
+		/* Physical address. */
+		IN gctUINT32			address;
+
+		/* Virtual address. */
+		IN gctPOINTER			memory;
+	}
+	UnmapUserMemory;
+
+	/* gcvEVENT_UNMAP_MEMORY */
+	struct _gcsEVENT_UNMAP_MEMORY
+	{
+		/* Memory size. */
+		IN gctSIZE_T			bytes;
+
+		/* Physical address. */
+		IN gctPHYS_ADDR			physical;
+
+		/* Virtual address. */
+		IN gctPOINTER			logical;
+	}
+	UnmapMemory;
+}
+gcuEVENT_DATA;
+#endif
+
+/* Construct a new gcoEVENT object. */
+gceSTATUS
+gcoEVENT_Construct(
+	IN gcoKERNEL Kernel,
+	OUT gcoEVENT * Event
+	);
+
+/* Destroy an gcoEVENT object. */
+gceSTATUS
+gcoEVENT_Destroy(
+	IN gcoEVENT Event
+	);
+
+#if !USE_EVENT_QUEUE
+/* Schedule an event. */
+gceSTATUS
+gcoEVENT_Schedule(
+	IN gcoEVENT Event,
+	IN gceEVENT_TYPE Type,
+	IN gcuEVENT_DATA * Data,
+	IN gctPOINTER CommandBuffer,
+	IN OUT gctSIZE_T * CommandBufferSize
+	);
+#endif
+
+/* Schedule a FreeNonPagedMemory event. */
+gceSTATUS
+gcoEVENT_FreeNonPagedMemory(
+	IN gcoEVENT Event,
+	IN gctPOINTER CommandBuffer,
+	IN OUT gctSIZE_T * CommandBufferSize,
+	IN gctSIZE_T Bytes,
+	IN gctPHYS_ADDR Physical,
+	IN gctPOINTER Logical,
+	IN gceKERNEL_WHERE FromWhere,
+	IN gctBOOL Wait
+	);
+
+/* Schedule a FreeContiguousMemory event. */
+gceSTATUS
+gcoEVENT_FreeContiguousMemory(
+	IN gcoEVENT Event,
+	IN gctPOINTER CommandBuffer,
+	IN OUT gctSIZE_T * CommandBufferSize,
+	IN gctSIZE_T Bytes,
+	IN gctPHYS_ADDR Physical,
+	IN gctPOINTER Logical,
+	IN gceKERNEL_WHERE FromWhere,
+	IN gctBOOL Wait
+	);
+
+/* Schedule a FreeVideoMemory event. */
+gceSTATUS
+gcoEVENT_FreeVideoMemory(
+	IN gcoEVENT Event,
+	IN gctPOINTER CommandBuffer,
+	IN OUT gctSIZE_T * CommandBufferSize,
+	IN gcuVIDMEM_NODE_PTR VideoMemory,
+	IN gceKERNEL_WHERE FromWhere,
+	IN gctBOOL Wait
+	);
+
+/* Schedule a WriteData event. */
+gceSTATUS
+gcoEVENT_WriteData(
+	IN gcoEVENT Event,
+	IN gctPOINTER CommandBuffer,
+	IN OUT gctSIZE_T * CommandBufferSize,
+	IN gctPOINTER Logical,
+	IN gctUINT32 Data,
+	IN gceKERNEL_WHERE FromWhere,
+	IN gctBOOL Wait
+	);
+
+/* Schedule an Unlock event. */
+gceSTATUS
+gcoEVENT_Unlock(
+	IN gcoEVENT Event,
+	IN gctPOINTER CommandBuffer,
+	IN OUT gctSIZE_T * CommandBufferSize,
+	IN gceKERNEL_WHERE FromWhere,
+	IN gcuVIDMEM_NODE_PTR Node,
+	IN gceSURF_TYPE Type,
+	IN gctBOOL Wait
+	);
+
+#if USE_EVENT_QUEUE
+struct _gcsQUEUE;
+
+/* Commit an event queue. */
+gceSTATUS
+gcoEVENT_Commit(
+	IN gcoEVENT Event,
+	IN struct _gcsQUEUE * Queue
+	);
+
+/* Append an event to the event queue. */
+gceSTATUS
+gcoEVENT_Append(
+	IN gcoEVENT Event,
+	IN gctUINT8 Id,
+	IN gcsHAL_INTERFACE_PTR Interface
+	);
+
+/* Remove all commands from a queue. */
+gceSTATUS
+gcoEVENT_Clear(
+	IN gcoEVENT Event,
+	IN gctUINT8 Id
+	);
+#else
+/* Schedule a Signal event. */
+gceSTATUS
+gcoEVENT_Signal(
+	IN gcoEVENT Event,
+	IN gctPOINTER CommandBuffer,
+	IN OUT gctSIZE_T * CommandBufferSize,
+	IN gceKERNEL_WHERE FromWhere,
+	IN gctSIGNAL Signal,
+	IN gctSIGNAL AuxSignal,
+	IN gctHANDLE Process,
+	IN gctBOOL Wait
+	);
+
+/* Schedule an event to unmap a buffer mapped through its physical address. */
+gceSTATUS
+gcoEVENT_UnmapMemory(
+	IN gcoEVENT Event,
+	IN gctPOINTER CommandBuffer,
+	IN OUT gctSIZE_T * CommandSize,
+	IN gceKERNEL_WHERE FromWhere,
+	IN gctSIZE_T Size,
+	IN gctPHYS_ADDR Address,
+	IN gctPOINTER Memory,
+	IN gctBOOL Wait
+	);
+
+/* Schedule a user memory unmapping event. */
+gceSTATUS
+gcoEVENT_UnmapUserMemory(
+	IN gcoEVENT Event,
+	IN gctPOINTER CommandBuffer,
+	IN OUT gctSIZE_T * CommandBufferSize,
+	IN gceKERNEL_WHERE FromWhere,
+	IN gctPOINTER Memory,
+	IN gctSIZE_T Size,
+	IN gctPOINTER Info,
+	IN gctUINT32 Address,
+	IN gctBOOL Wait
+	);
+#endif
+
+/* Event callback routine. */
+gceSTATUS
+gcoEVENT_Notify(
+	IN gcoEVENT Event,
+	IN gctUINT32 IDs
+	);
+
+#if USE_EVENT_QUEUE
+/* Event callback routine. */
+gceSTATUS
+gcoEVENT_Interrupt(
+	IN gcoEVENT Event,
+	IN gctUINT32 IDs
+	);
+#endif
+
+/******************************************************************************\
+******************************* gcoCOMMAND Object *******************************
+\******************************************************************************/
+
+typedef struct _gcoCOMMAND *		gcoCOMMAND;
+
+/* Construct a new gcoCOMMAND object. */
+gceSTATUS
+gcoCOMMAND_Construct(
+	IN gcoKERNEL Kernel,
+	OUT gcoCOMMAND * Command
+	);
+
+/* Destroy an gcoCOMMAND object. */
+gceSTATUS
+gcoCOMMAND_Destroy(
+	IN gcoCOMMAND Command
+	);
+
+/* Start the command queue. */
+gceSTATUS
+gcoCOMMAND_Start(
+	IN gcoCOMMAND Command
+	);
+
+/* Stop the command queue. */
+gceSTATUS
+gcoCOMMAND_Stop(
+	IN gcoCOMMAND Command
+	);
+
+/* Commit a buffer to the command queue. */
+gceSTATUS
+gcoCOMMAND_Commit(
+	IN gcoCOMMAND Command,
+	IN gcoCMDBUF CommandBuffer,
+	IN gcoCONTEXT Context
+	);
+
+/* Reserve space in the command buffer. */
+gceSTATUS
+gcoCOMMAND_Reserve(
+	IN gcoCOMMAND Command,
+	IN gctSIZE_T RequestedBytes,
+	OUT gctPOINTER * Buffer,
+	OUT gctSIZE_T * BufferSize
+	);
+
+/* Release reserved space in the command buffer. */
+gceSTATUS
+gcoCOMMAND_Release(
+	IN gcoCOMMAND Command
+	);
+
+/* Execute reserved space in the command buffer. */
+gceSTATUS
+gcoCOMMAND_Execute(
+	IN gcoCOMMAND Command,
+	IN gctSIZE_T RequstedBytes
+	);
+
+/* Stall the command queue. */
+gceSTATUS
+gcoCOMMAND_Stall(
+	IN gcoCOMMAND Command
+	);
+
+/******************************************************************************\
+********************************* gcoMMU Object *********************************
+\******************************************************************************/
+
+typedef struct _gcoMMU *			gcoMMU;
+
+/* Construct a new gcoMMU object. */
+gceSTATUS
+gcoMMU_Construct(
+	IN gcoKERNEL Kernel,
+	IN gctSIZE_T MmuSize,
+	OUT gcoMMU * Mmu
+	);
+
+/* Destroy an gcoMMU object. */
+gceSTATUS
+gcoMMU_Destroy(
+	IN gcoMMU Mmu
+	);
+
+/* Allocate pages inside the MMU. */
+gceSTATUS
+gcoMMU_AllocatePages(
+	IN gcoMMU Mmu,
+	IN gctSIZE_T PageCount,
+	OUT gctPOINTER * PageTable,
+	OUT gctUINT32 * Address
+	);
+
+/* Remove a page table from	the MMU. */
+gceSTATUS
+gcoMMU_FreePages(
+	IN gcoMMU Mmu,
+	IN gctPOINTER PageTable,
+	IN gctSIZE_T PageCount
+	);
+
+/******************************************************************************\
+********************************* gcsPROFILER structure ***********************
+\******************************************************************************/
+
+typedef struct _gcProfile gcsPROFILER;
+
+gceSTATUS
+gcoHARDWARE_QueryProfileRegisters(
+	IN gcoHARDWARE Hardware,
+    OUT gctINT32_PTR HWProfile
+	);
+
+/* Memory profile information. */
+struct _gcMemProfile
+{
+    /* Memory Usage */
+    gctUINT32       videoMemUsed;
+    gctUINT32       systemMemUsed;
+    gctUINT32       commitBufferSize;
+    gctUINT32       contextBufferCopyBytes;
+
+};
+
+/* Shader profile information. */
+struct _gcSHADER_PROFILER
+{
+    gctUINT32       shaderLength;
+    gctUINT32       shaderALUCycles;
+    gctUINT32       shaderTexLoadCycles;
+    gctUINT32       shaderTempRegCount;
+    gctUINT32       shaderSamplerRegCount;
+    gctUINT32       shaderInputRegCount;
+    gctUINT32       shaderOutputRegCount;
+};
+
+/* Initialize the gcProfiler. */
+gceSTATUS
+gcsPROFILER_Initialize(
+    IN gcoHAL Hal,
+    void* Fptr
+    );
+
+/* Destroy the gcProfiler. */
+gceSTATUS
+gcsPROFILER_Destroy(
+    IN gcoHAL Hal
+    );
+
+/* Call to signal end of frame. */
+gceSTATUS
+gcsPROFILER_EndFrame(
+    IN gcoHAL Hal
+    );
+
+/* Profile input vertex shader. */
+void gcsPROFILER_ShaderVS(
+    IN gcoHAL Hal,
+    IN void* Vs
+    );
+
+/* Profile input fragment shader. */
+void gcsPROFILER_ShaderFS(
+    IN gcoHAL Hal,
+    IN void* Fs
+    );
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif
+
+#endif /* __aqhal_h_ */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gcHAL_Base.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gcHAL_Base.h
@@ -0,0 +1,1753 @@
+/****************************************************************************
+*
+*    Copyright (C) 2002 - 2008 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public Lisence as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+/*
+ * Include file for the HAL bases.
+ */
+
+#ifndef __gchal_base_h_
+#define __gchal_base_h_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "aqHalEnum.h"
+#include "aqTypes.h"
+
+/******************************************************************************\
+****************************** Object Declarations *****************************
+\******************************************************************************/
+
+typedef struct _gcoHAL *				gcoHAL;
+typedef struct _gcoOS *					gcoOS;
+typedef struct _gco2D *					gco2D;
+typedef struct _gcoVG *					gcoVG;
+typedef struct _gco3D *					gco3D;
+typedef struct _gcoSURF *				gcoSURF;
+typedef struct _gcsSURF_INFO *			gcsSURF_INFO_PTR;
+typedef struct _gcsSURF_NODE *			gcsSURF_NODE_PTR;
+typedef struct _gcsSURF_FORMAT_INFO *	gcsSURF_FORMAT_INFO_PTR;
+typedef struct _gcsPOINT *				gcsPOINT_PTR;
+typedef struct _gcsSIZE *				gcsSIZE_PTR;
+typedef struct _gcsRECT *				gcsRECT_PTR;
+typedef struct _gcsBOUNDARY *			gcsBOUNDARY_PTR;
+
+/******************************************************************************\
+********************************* Enumerations *********************************
+\******************************************************************************/
+
+/* Video memory pool type. */
+typedef enum _gcePOOL
+{
+	gcvPOOL_UNKNOWN,
+	gcvPOOL_DEFAULT,
+	gcvPOOL_LOCAL,
+	gcvPOOL_LOCAL_INTERNAL,
+	gcvPOOL_LOCAL_EXTERNAL,
+	gcvPOOL_UNIFIED,
+	gcvPOOL_SYSTEM,
+	gcvPOOL_VIRTUAL,
+	gcvPOOL_USER
+}
+gcePOOL;
+
+/* Blending functions. */
+typedef enum _gceBLEND_FUNCTION
+{
+	gcvBLEND_ZERO,
+	gcvBLEND_ONE,
+	gcvBLEND_SOURCE_COLOR,
+	gcvBLEND_INV_SOURCE_COLOR,
+	gcvBLEND_SOURCE_ALPHA,
+	gcvBLEND_INV_SOURCE_ALPHA,
+	gcvBLEND_TARGET_COLOR,
+	gcvBLEND_INV_TARGET_COLOR,
+	gcvBLEND_TARGET_ALPHA,
+	gcvBLEND_INV_TARGET_ALPHA,
+	gcvBLEND_SOURCE_ALPHA_SATURATE,
+	gcvBLEND_CONST_COLOR,
+	gcvBLEND_INV_CONST_COLOR,
+	gcvBLEND_CONST_ALPHA,
+	gcvBLEND_INV_CONST_ALPHA,
+}
+gceBLEND_FUNCTION;
+
+/* Blending modes. */
+typedef enum _gceBLEND_MODE
+{
+	gcvBLEND_ADD,
+	gcvBLEND_SUBTRACT,
+	gcvBLEND_REVERSE_SUBTRACT,
+	gcvBLEND_MIN,
+	gcvBLEND_MAX,
+}
+gceBLEND_MODE;
+
+/* API flags. */
+typedef enum _gceAPI
+{
+	gcvAPI_D3D					= 0x1,
+	gcvAPI_OPENGL				= 0x2,
+}
+gceAPI;
+
+/* Depth modes. */
+typedef enum _gceDEPTH_MODE
+{
+	gcvDEPTH_NONE,
+	gcvDEPTH_Z,
+	gcvDEPTH_W,
+}
+gceDEPTH_MODE;
+
+typedef enum _gceWHERE
+{
+	gcvWHERE_COMMAND,
+	gcvWHERE_RASTER,
+	gcvWHERE_PIXEL,
+}
+gceWHERE;
+
+typedef enum _gceHOW
+{
+	gcvHOW_SEMAPHORE			= 0x1,
+	gcvHOW_STALL				= 0x2,
+	gcvHOW_SEMAPHORE_STALL		= 0x3,
+}
+gceHOW;
+
+/******************************************************************************\
+********************************* gcoHAL Object *********************************
+\******************************************************************************/
+
+/* Construct a new gcoHAL object. */
+gceSTATUS
+gcoHAL_Construct(
+	IN gctPOINTER Context,
+	IN gcoOS Os,
+	OUT gcoHAL * Hal
+	);
+
+/* Destroy an gcoHAL object. */
+gceSTATUS
+gcoHAL_Destroy(
+	IN gcoHAL Hal
+	);
+
+/* Get pointer to gco2D object. */
+gceSTATUS
+gcoHAL_Get2DEngine(
+	IN gcoHAL Hal,
+	OUT gco2D * Engine
+	);
+
+/* Get pointer to gcoVG object. */
+gceSTATUS
+gcoHAL_GetVGEngine(
+	IN gcoHAL Hal,
+	OUT gcoVG * Engine
+	);
+
+/* Get pointer to gco3D object. */
+gceSTATUS
+gcoHAL_Get3DEngine(
+	IN gcoHAL Hal,
+	OUT gco3D * Engine
+	);
+
+/* Verify whether the specified feature is available in hardware. */
+gctBOOL
+gcoHAL_IsFeatureAvailable(
+    IN gcoHAL Hal,
+	IN gceFEATURE Feature
+    );
+
+/* Query the identity of the hardware. */
+gceSTATUS
+gcoHAL_QueryChipIdentity(
+	IN gcoHAL Hal,
+	OUT gceCHIPMODEL* ChipModel,
+	OUT gctUINT32* ChipRevision,
+	OUT gctUINT32* ChipFeatures,
+	OUT gctUINT32* ChipMinorFeatures
+	);
+
+/* Query the amount of video memory. */
+gceSTATUS
+gcoHAL_QueryVideoMemory(
+	IN gcoHAL Hal,
+	OUT gctPHYS_ADDR * InternalAddress,
+	OUT gctSIZE_T * InternalSize,
+	OUT gctPHYS_ADDR * ExternalAddress,
+	OUT gctSIZE_T * ExternalSize,
+	OUT gctPHYS_ADDR * ContiguousAddress,
+	OUT gctSIZE_T * ContiguousSize
+	);
+
+/* Map video memory. */
+gceSTATUS
+gcoHAL_MapMemory(
+	IN gcoHAL Hal,
+	IN gctPHYS_ADDR Physical,
+	IN gctSIZE_T NumberOfBytes,
+	OUT gctPOINTER * Logical
+	);
+
+/* Unmap video memory. */
+gceSTATUS
+gcoHAL_UnmapMemory(
+	IN gcoHAL Hal,
+	IN gctPHYS_ADDR Physical,
+	IN gctSIZE_T NumberOfBytes,
+	IN gctPOINTER Logical
+	);
+
+/* Schedule an unmap of a buffer mapped through its physical address. */
+gceSTATUS
+gcoHAL_ScheduleUnmapMemory(
+	IN gcoHAL Hal,
+	IN gctPHYS_ADDR Physical,
+	IN gctSIZE_T NumberOfBytes,
+	IN gctPOINTER Logical
+	);
+
+/* Schedule an unmap of a user buffer using event mechanism. */
+gceSTATUS
+gcoHAL_ScheduleUnmapUserMemory(
+	IN gcoHAL Hal,
+	IN gctPOINTER Info,
+	IN gctSIZE_T Size,
+	IN gctUINT32 Address,
+	IN gctPOINTER Memory
+	);
+
+/* Commit the current command buffer. */
+gceSTATUS
+gcoHAL_Commit(
+	IN gcoHAL Hal,
+	IN gctBOOL Stall
+	);
+
+/* Query the tile capabilities. */
+gceSTATUS
+gcoHAL_QueryTiled(
+	IN gcoHAL Hal,
+	OUT gctINT32 * TileWidth2D,
+	OUT gctINT32 * TileHeight2D,
+	OUT gctINT32 * TileWidth3D,
+	OUT gctINT32 * TileHeight3D
+	);
+
+gceSTATUS
+gcoHAL_Compact(
+	IN gcoHAL Hal
+	);
+
+void
+gcoHAL_ProfileStart(
+	IN gcoHAL Hal
+	);
+
+void
+gcoHAL_ProfileEnd(
+	IN gcoHAL Hal,
+	IN gctCONST_STRING Title
+	);
+
+/* Power Management */
+gceSTATUS
+gcoHAL_SetPowerManagementState(
+	IN gcoHAL Hal,
+    IN gceCHIPPOWERSTATE State
+    );
+
+gceSTATUS
+gcoHAL_QueryPowerManagementState(
+	IN gcoHAL Hal,
+    OUT gceCHIPPOWERSTATE *State
+    );
+
+/* Set the filter type for filter blit. */
+gceSTATUS
+gcoHAL_SetFilterType(
+	IN gcoHAL Hal,
+	IN gceFILTER_TYPE FilterType
+	);
+
+/******************************************************************************\
+********************************** gcoOS Object *********************************
+\******************************************************************************/
+
+/* Construct a new gcoOS object. */
+gceSTATUS
+gcoOS_Construct(
+	IN gctPOINTER Context,
+	OUT gcoOS * Os
+	);
+
+/* Destroy an gcoOS object. */
+gceSTATUS
+gcoOS_Destroy(
+	IN gcoOS Os
+	);
+
+/* Get the base address for the physical memory. */
+gceSTATUS
+gcoOS_GetBaseAddress(
+	IN gcoOS Os,
+	OUT gctUINT32_PTR BaseAddress
+	);
+
+/* Allocate memory. */
+gceSTATUS
+gcoOS_AllocateMemory(
+	IN gcoOS Os,
+	IN gctSIZE_T Bytes,
+	OUT gctPOINTER * Memory
+	);
+
+/* Free memory. */
+gceSTATUS
+gcoOS_FreeMemory(
+	IN gcoOS Os,
+	IN gctPOINTER Memory
+	);
+
+/* Device I/O Control call to the kernel HAL layer. */
+gceSTATUS
+gcoOS_DeviceControl(
+	IN gcoOS Os,
+	IN gctUINT32 IoControlCode,
+	IN gctPOINTER InputBuffer,
+	IN gctSIZE_T InputBufferSize,
+	IN gctPOINTER OutputBuffer,
+	IN gctSIZE_T OutputBufferSize
+	);
+
+typedef enum _gceFILE_MODE
+{
+	gcvFILE_CREATE			= 0,
+	gcvFILE_APPEND,
+	gcvFILE_READ,
+	gcvFILE_CREATETEXT,
+	gcvFILE_APPENDTEXT,
+	gcvFILE_READTEXT,
+}
+gceFILE_MODE;
+
+/* Open a file. */
+gceSTATUS
+gcoOS_Open(
+	IN gcoOS Os,
+	IN gctCONST_STRING FileName,
+	IN gceFILE_MODE Mode,
+	OUT gctFILE * File
+	);
+
+/* Close a file. */
+gceSTATUS
+gcoOS_Close(
+	IN gcoOS Os,
+	IN gctFILE File
+	);
+
+/* Read data from a file. */
+gceSTATUS
+gcoOS_Read(
+	IN gcoOS Os,
+	IN gctFILE File,
+	IN gctSIZE_T ByteCount,
+	IN gctPOINTER Data,
+	OUT gctSIZE_T * ByteRead
+	);
+
+/* Write data to a file. */
+gceSTATUS
+gcoOS_Write(
+	IN gcoOS Os,
+	IN gctFILE File,
+	IN gctSIZE_T ByteCount,
+	IN gctCONST_POINTER Data
+	);
+
+typedef enum _gceFILE_WHENCE
+{
+	gcvFILE_SEEK_SET,
+	gcvFILE_SEEK_CUR,
+	gcvFILE_SEEK_END
+}
+gceFILE_WHENCE;
+
+/* Set the current position of a file. */
+gceSTATUS
+gcoOS_Seek(
+	IN gcoOS Os,
+	IN gctFILE File,
+	IN gctUINT32 Offset,
+	IN gceFILE_WHENCE Whence
+	);
+
+/* Set the current position of a file. */
+gceSTATUS
+gcoOS_SetPos(
+	IN gcoOS Os,
+	IN gctFILE File,
+	IN gctUINT32 Position
+	);
+
+/* Get the current position of a file. */
+gceSTATUS
+gcoOS_GetPos(
+	IN gcoOS Os,
+	IN gctFILE File,
+	OUT gctUINT32 * Position
+	);
+
+/* Perform a memory copy. */
+gceSTATUS
+gcoOS_MemCopy(
+	IN gctPOINTER Destination,
+	IN gctCONST_POINTER Source,
+	IN gctSIZE_T Bytes
+	);
+
+/* Perform a memory fill. */
+gceSTATUS
+gcoOS_MemFill(
+	IN gctPOINTER Destination,
+	IN gctUINT8 Filler,
+	IN gctSIZE_T Bytes
+	);
+
+/* Zero memory. */
+gceSTATUS
+gcoOS_ZeroMemory(
+	IN gctPOINTER Memory,
+	IN gctSIZE_T Bytes
+	);
+
+gceSTATUS
+gcoOS_StrLen(
+	IN gctCONST_STRING String,
+	OUT gctSIZE_T * Length
+	);
+
+gceSTATUS
+gcoOS_StrDup(
+	IN gcoOS Os,
+	IN gctCONST_STRING String,
+	OUT gctSTRING * Target
+	);
+
+/* Copy a string. */
+gceSTATUS
+gcoOS_StrCopy(
+	IN gctSTRING Destination,
+	IN gctCONST_STRING Source
+	);
+
+/* Append a string. */
+gceSTATUS
+gcoOS_StrCat(
+	IN gctSTRING Destination,
+	IN gctCONST_STRING Source
+	);
+
+/* Compare two strings. */
+gceSTATUS
+gcoOS_StrCmp(
+	IN gctCONST_STRING String1,
+	IN gctCONST_STRING String2
+	);
+
+/* Compare characters of two strings. */
+gceSTATUS
+gcoOS_StrNCmp(
+	IN gctCONST_STRING String1,
+	IN gctCONST_STRING String2,
+	IN gctSIZE_T Count
+	);
+
+/* Find the last occurance of a character inside a string. */
+gceSTATUS
+gcoOS_StrFindReverse(
+	IN gctCONST_STRING String,
+	IN gctINT8 Character,
+    OUT gctSTRING * Output
+	);
+
+/* Convert string to float. */
+gceSTATUS
+gcoOS_StrToFloat(
+	IN gctCONST_STRING String,
+	OUT gctFLOAT * Float
+	);
+
+/* Convert string to integer. */
+gceSTATUS
+gcoOS_StrToInt(
+	IN gctCONST_STRING String,
+	OUT gctINT * Int
+	);
+
+gceSTATUS
+gcoOS_MemCmp(
+	IN gctCONST_POINTER Memory1,
+	IN gctCONST_POINTER Memory2,
+	IN gctSIZE_T Bytes
+	);
+
+gceSTATUS
+gcoOS_PrintStr(
+	OUT gctSTRING String,
+	IN OUT gctUINT * Offset,
+	IN gctCONST_STRING Format,
+	...
+	);
+
+gceSTATUS
+gcoOS_PrintStrV(
+	OUT gctSTRING String,
+	IN OUT gctUINT * Offset,
+	IN gctCONST_STRING Format,
+	IN gctPOINTER Arguments
+	);
+
+gceSTATUS
+gcoOS_PrintNStrV(
+	OUT gctSTRING String,
+	IN OUT gctUINT * Offset,
+	IN gctSIZE_T Count,
+	IN gctCONST_STRING Format,
+	IN gctPOINTER Arguments
+	);
+
+gceSTATUS
+gcoOS_LoadLibrary(
+	IN gcoOS Os,
+	IN gctCONST_STRING Library,
+	OUT gctHANDLE * Handle
+	);
+
+gceSTATUS
+gcoOS_FreeLibrary(
+	IN gcoOS Os,
+	IN gctHANDLE Handle
+	);
+
+gceSTATUS
+gcoOS_GetProcAddress(
+	IN gcoOS Os,
+	IN gctHANDLE Handle,
+	IN gctCONST_STRING Name,
+	OUT gctPOINTER * Function
+	);
+
+gceSTATUS
+gcoOS_Compact(
+	IN gcoOS Os
+	);
+
+void
+gcoOS_ProfileStart(
+	IN gcoOS Os
+	);
+
+void
+gcoOS_ProfileEnd(
+	IN gcoOS Os,
+	IN gctCONST_STRING Title
+	);
+
+gctINT32 
+gcoOS_GetMilliTime(
+    void
+    );
+
+char* gcoOS_GetProgramName(char* buf, int size);
+
+#if MRVL_BENCH
+
+/*
+** Check point for timer.
+** To add new profiling point, modify below two members:
+gceSTATUS
+gcoOS_SetProfileSetting(
+        IN gcoOS Os,
+        IN gctBOOL Enable,
+        IN gctCONST_STRING FileName
+        );
+
+*/
+typedef enum _apiBenchIndex  {
+	APIBENCH_INDEX_FRAME,
+	APIBENCH_INDEX_DRAWELEMENTS,
+	APIBENCH_INDEX_BUILDSTREAM,
+	APIBENCH_INDEX_INDEXBUFFER,
+	APIBENCH_INDEX_UPDATESTATE,
+	APIBENCH_INDEX_UPDATESTATE1,
+	APIBENCH_INDEX_SWAPBUFFERS,
+	APIBENCH_INDEX_DRAWIMAGE,
+	APIBENCH_INDEX_SWTEXTUREUPLOAD,	
+	APIBENCH_INDEX_DIRECTTEXTURE,	
+	APIBENCH_INDEX_GLEGLIMAGETEXTURE,
+	APIBENCH_INDEX_DRAWTEX,
+	APIBENCH_INDEX_BUFFERDATA,
+	APIBENCH_INDEX_BUFFERSUBDATA,
+	APIBENCH_INDEX_MAX
+}apiBenchIndex;
+
+#define APIBENCHNAME { 	\
+	"Frame",			\
+	"DrawElement",		\
+	"_buildStream",		\
+	"IndexBuffer",		\
+	"UpdateState",		\
+	"UpdateState1",		\
+	"eglSwapBuffers",	\
+	"DrawImage",        \
+	"SWTextureUpload",  \
+	"uploadDirectTexture", \
+	"glEGLImageTexture2D", \
+	"glDrawTex", \
+	"glBufferData", \
+	"glBufferSubData", \
+}
+
+/*
+** Check point for state update
+**
+*/
+typedef enum _apiBenchStateIndex {
+	APIBENCH_STATE_INDEX_FRAME,
+	APIBENCH_STATE_INDEX_TEXTURE,
+	APIBENCH_STATE_INDEX_SHADER,
+	APIBENCH_STATE_INDEX_MAX
+}apiBenchStateIndex;
+
+#define APIBENCHSTATENAME {	\
+	"Frame",				\
+	"Texture",				\
+	"Shader",				\
+}
+
+// Timer structure to store the profile result
+typedef struct _gcoTIMER
+{
+	gctUINT32				start;
+	gctUINT32				end;
+	gctUINT32				totalTime;
+	gctUINT32				count;	
+}gcoTIMER;
+
+// global structure for api bench
+typedef struct _gcoAPIBENCH
+{
+	/* frame count */
+	gctUINT32			frameCount;
+
+	/* timer object for bench mark */
+	gcoTIMER			timer[APIBENCH_INDEX_MAX];
+
+	/* total sent command size */
+	gctUINT32			commandSize;
+
+	/* commit times */
+	gctUINT32			commitNumber;
+
+	/* profile the state update, use same structure of timer */
+	gcoTIMER			stateCounter[APIBENCH_STATE_INDEX_MAX];
+
+}gcoAPIBENCH;
+
+// Frame count to print
+#define PROFILE_DRIVER_FRAME_PRINT		50
+
+
+void gcoDUMP_APIBenchStart(
+	IN gcoHAL Hal,
+	IN gctUINT32 timerIndex
+	);
+
+void gcoDUMP_APIBenchEnd(
+	IN gcoHAL Hal,
+	IN gctUINT32 timerIndex
+	);
+
+void gcoDUMP_APIBenchPrint(
+	IN gcoHAL Hal
+	);
+
+void gcoDUMP_APIBenchInit(
+	IN gcoHAL Hal
+	);
+
+void gcoDUMP_APIBenchFrame(
+	IN gcoHAL Hal
+	);
+
+void gcoDUMP_APIBenchCommand(
+	IN gcoHAL Hal,
+	IN gctUINT32 size
+	);
+
+void gcoDUMP_APIBenchCommit(
+	IN gcoHAL Hal
+	);
+
+void gcoDUMP_APIBenchStateEnd(
+	IN gcoHAL Hal,
+	IN gctUINT32 stateIndex
+	);
+
+void gcoDUMP_APIBenchStateStart(
+	IN gcoHAL Hal,
+	IN gctUINT32 stateIndex
+	);
+
+#else
+
+
+#endif
+
+/*----------------------------------------------------------------------------*/
+/*----------------------------------- Atoms ----------------------------------*/
+
+typedef struct gcsATOM * gcsATOM_PTR;
+
+/* Construct an atom. */
+gceSTATUS
+gcoOS_AtomConstruct(
+	IN gcoOS Os,
+	OUT gcsATOM_PTR * Atom
+	);
+
+/* Destroy an atom. */
+gceSTATUS
+gcoOS_AtomDestroy(
+	IN gcoOS Os,
+	IN gcsATOM_PTR Atom
+	);
+
+/* Increment an atom. */
+gceSTATUS
+gcoOS_AtomIncrement(
+	IN gcoOS Os,
+    IN gcsATOM_PTR Atom,
+    OUT gctINT32_PTR OldValue
+	);
+
+/* Decrement an atom. */
+gceSTATUS
+gcoOS_AtomDecrement(
+	IN gcoOS Os,
+    IN gcsATOM_PTR Atom,
+    OUT gctINT32_PTR OldValue
+	);
+
+gctHANDLE
+gcoOS_GetCurrentProcessID(
+	void
+	);
+
+/*----------------------------------------------------------------------------*/
+/*----------------------------------- Time -----------------------------------*/
+
+/* Get the number of milliseconds since the system started. */
+gctUINT32
+gcoOS_GetTicks(
+	void
+	);
+
+/******************************************************************************\
+**************************** Coordinate Structures *****************************
+\******************************************************************************/
+
+typedef struct _gcsPOINT
+{
+	gctINT32					x;
+	gctINT32					y;
+}
+gcsPOINT;
+
+typedef struct _gcsSIZE
+{
+	gctINT32					width;
+	gctINT32					height;
+}
+gcsSIZE;
+
+typedef struct _gcsRECT
+{
+	gctINT32					left;
+	gctINT32					top;
+	gctINT32					right;
+	gctINT32					bottom;
+}
+gcsRECT;
+
+
+/******************************************************************************\
+********************************* gcoSURF Object ********************************
+\******************************************************************************/
+
+/*----------------------------------------------------------------------------*/
+/*------------------------------- gcoSURF Common ------------------------------*/
+
+/* Color format classes. */
+typedef enum _gceFORMAT_CLASS
+{
+	gcvFORMAT_CLASS_RGBA		= 4500,
+	gcvFORMAT_CLASS_YUV,
+	gcvFORMAT_CLASS_INDEX,
+	gcvFORMAT_CLASS_LUMINANCE,
+	gcvFORMAT_CLASS_BUMP,
+	gcvFORMAT_CLASS_DEPTH,
+}
+gceFORMAT_CLASS;
+
+/* Special enums for width field in gcsFORMAT_COMPONENT. */
+typedef enum _gceCOMPONENT_CONTROL
+{
+	gcvCOMPONENT_NOTPRESENT		= 0x00,
+	gcvCOMPONENT_DONTCARE		= 0x80,
+	gcvCOMPONENT_WIDTHMASK		= 0x7F,
+	gcvCOMPONENT_ODD			= 0x80
+}
+gceCOMPONENT_CONTROL;
+
+
+typedef enum _gceORIENTATION
+{
+	gcvORIENTATION_TOP_BOTTOM,
+	gcvORIENTATION_BOTTOM_TOP,
+}
+gceORIENTATION;
+
+
+/* Construct a new gcoSURF object. */
+gceSTATUS
+gcoSURF_Construct(
+	IN gcoHAL Hal,
+	IN gctUINT Width,
+	IN gctUINT Height,
+	IN gctUINT Depth,
+	IN gceSURF_TYPE Type,
+	IN gceSURF_FORMAT Format,
+	IN gcePOOL Pool,
+	OUT gcoSURF * Surface
+	);
+
+/* Destroy an gcoSURF object. */
+gceSTATUS
+gcoSURF_Destroy(
+	IN gcoSURF Surface
+	);
+
+/* Map user-allocated surface. */
+gceSTATUS
+gcoSURF_MapUserSurface(
+	IN gcoSURF Surface,
+	IN gctUINT Alignment,
+	IN gctPOINTER Logical,
+	IN gctUINT32 Physical
+	);
+
+/* Set the color type of the surface. */
+gceSTATUS
+gcoSURF_SetColorType(
+	IN gcoSURF Surface,
+	IN gceSURF_COLOR_TYPE ColorType
+	);
+
+/* Get the color type of the surface. */
+gceSTATUS
+gcoSURF_GetColorType(
+	IN gcoSURF Surface,
+	OUT gceSURF_COLOR_TYPE *ColorType
+	);
+
+/* Set the surface ration angle. */
+gceSTATUS
+gcoSURF_SetRotation(
+	IN gcoSURF Surface,
+	IN gceSURF_ROTATION Rotation
+	);
+
+/* Verify and return the state of the tile status mechanism. */
+gceSTATUS
+gcoSURF_IsTileStatusSupported(
+	IN gcoSURF Surface
+	);
+
+/* Enable tile status for the specified surface. */
+gceSTATUS
+gcoSURF_EnableTileStatus(
+	IN gcoSURF Surface
+	);
+
+/* Disable tile status for the specified surface. */
+gceSTATUS
+gcoSURF_DisableTileStatus(
+	IN gcoSURF Surface,
+	IN gctBOOL Decompress
+	);
+
+/* Get surface size. */
+gceSTATUS
+gcoSURF_GetSize(
+	IN gcoSURF Surface,
+	OUT gctUINT * Width,
+	OUT gctUINT * Height,
+	OUT gctUINT * Depth
+	);
+
+/* Get surface aligned sizes. */
+gceSTATUS
+gcoSURF_GetAlignedSize(
+	IN gcoSURF Surface,
+	OUT gctUINT * Width,
+	OUT gctUINT * Height,
+	OUT gctINT * Stride
+	);
+
+/* Get surface type and format. */
+gceSTATUS
+gcoSURF_GetFormat(
+	IN gcoSURF Surface,
+	OUT gceSURF_TYPE * Type,
+	OUT gceSURF_FORMAT * Format
+	);
+
+/* Lock the surface. */
+gceSTATUS
+gcoSURF_Lock(
+	IN gcoSURF Surface,
+	IN OUT gctUINT32 * Address,
+	IN OUT gctPOINTER * Memory
+	);
+
+/* Unlock the surface. */
+gceSTATUS
+gcoSURF_Unlock(
+	IN gcoSURF Surface,
+	IN gctPOINTER Memory
+	);
+
+/* Return pixel format parameters. */
+gceSTATUS
+gcoSURF_QueryFormat(
+	IN gceSURF_FORMAT Format,
+	OUT gcsSURF_FORMAT_INFO_PTR * Info
+	);
+
+/* Compute the color pixel mask. */
+gceSTATUS
+gcoSURF_ComputeColorMask(
+	IN gcsSURF_FORMAT_INFO_PTR Format,
+	OUT gctUINT32_PTR ColorMask
+	);
+
+/* Flush the surface. */
+gceSTATUS
+gcoSURF_Flush(
+	IN gcoSURF Surface
+	);
+
+/* Fill surface with a value. */
+gceSTATUS
+gcoSURF_Fill(
+	IN gcoSURF Surface,
+	IN gcsPOINT_PTR Origin,
+	IN gcsSIZE_PTR Size,
+	IN gctUINT32 Value,
+	IN gctUINT32 Mask
+	);
+
+/* Alpha blend two surfaces together. */
+gceSTATUS
+gcoSURF_Blend(
+	IN gcoSURF SrcSurface,
+	IN gcoSURF DestSurface,
+	IN gcsPOINT_PTR SrcOrig,
+	IN gcsPOINT_PTR DestOrigin,
+	IN gcsSIZE_PTR Size,
+	IN gceSURF_BLEND_MODE Mode
+	);
+
+/* Create a new gcoSURF wrapper object. */
+gceSTATUS
+gcoSURF_ConstructWrapper(
+	IN gcoHAL Hal,
+	OUT gcoSURF * Surface
+	);
+
+/* Set the underlying buffer for the surface wrapper. */
+gceSTATUS
+gcoSURF_SetBuffer(
+	IN gcoSURF Surface,
+	IN gceSURF_TYPE Type,
+	IN gceSURF_FORMAT Format,
+	IN gctUINT Stride,
+	IN gctPOINTER Logical,
+	IN gctUINT32 Physical
+	);
+
+/* Set the size of the surface in pixels and map the underlying buffer. */
+gceSTATUS
+gcoSURF_SetWindow(
+	IN gcoSURF Surface,
+	IN gctUINT X,
+	IN gctUINT Y,
+	IN gctUINT Width,
+	IN gctUINT Height
+	);
+
+/* Increase reference count of the surface. */
+gceSTATUS
+gcoSURF_ReferenceSurface(
+	IN gcoSURF Surface
+	);
+
+/* Get surface reference count. */
+gceSTATUS
+gcoSURF_QueryReferenceCount(
+	IN gcoSURF Surface,
+	OUT gctINT32 * ReferenceCount
+	);
+
+/* Set surface orientation. */
+gceSTATUS
+gcoSURF_SetOrientation(
+	IN gcoSURF Surface,
+	IN gceORIENTATION Orientation
+	);
+
+/* Query surface orientation. */
+gceSTATUS
+gcoSURF_QueryOrientation(
+	IN gcoSURF Surface,
+	OUT gceORIENTATION * Orientation
+	);
+
+
+//#define DUMP_SURFACE     0
+
+/* Dump a buffer to a BMP file */
+int gcoOS_DumpBMP(
+                  IN gctPOINTER dumpBase,
+                  IN gctINT dumpWidth,
+                  IN gctINT dumpHeight,
+                  IN gctINT dumpStride,
+                  IN gctINT dumpBpp, 
+                  IN gceSURF_FORMAT format,
+                  IN gceORIENTATION orientation,
+                  IN gctCONST_STRING fileName
+                  );
+
+
+/* Dump surface to a BMP file. */
+gceSTATUS
+gcoSURF_DumpSurface(
+	IN gcoSURF Surface, 
+	IN gctBOOL bCheckOrientation,
+	IN gctCONST_STRING fileName
+	);
+
+
+/******************************************************************************\
+******************************* gcsRECT Structure ******************************
+\******************************************************************************/
+
+/* Initialize rectangle structure. */
+gceSTATUS
+gcsRECT_Set(
+	OUT gcsRECT_PTR Rect,
+	IN gctINT32 Left,
+	IN gctINT32 Top,
+	IN gctINT32 Right,
+	IN gctINT32 Bottom
+	);
+
+/* Return the width of the rectangle. */
+gceSTATUS
+gcsRECT_Width(
+	IN gcsRECT_PTR Rect,
+	OUT gctINT32 * Width
+	);
+
+/* Return the height of the rectangle. */
+gceSTATUS
+gcsRECT_Height(
+	IN gcsRECT_PTR Rect,
+	OUT gctINT32 * Height
+	);
+
+/* Ensure that top left corner is to the left and above the right bottom. */
+gceSTATUS
+gcsRECT_Normalize(
+	IN OUT gcsRECT_PTR Rect
+	);
+
+/* Compare two rectangles. */
+gceSTATUS
+gcsRECT_IsEqual(
+	IN gcsRECT_PTR Rect1,
+	IN gcsRECT_PTR Rect2,
+	OUT gctBOOL * Equal
+	);
+
+/* Compare the sizes of two rectangles. */
+gceSTATUS
+gcsRECT_IsOfEqualSize(
+	IN gcsRECT_PTR Rect1,
+	IN gcsRECT_PTR Rect2,
+	OUT gctBOOL * EqualSize
+	);
+
+
+/******************************************************************************\
+**************************** gcsBOUNDARY Structure *****************************
+\******************************************************************************/
+
+typedef struct _gcsBOUNDARY
+{
+	gctINT						x;
+	gctINT						y;
+	gctINT						width;
+	gctINT						height;
+}
+gcsBOUNDARY;
+
+
+/******************************************************************************\
+******************************* Debugging Macros *******************************
+\******************************************************************************/
+
+#if (DBG || defined(DEBUG)) && !defined(_DEBUG)
+#	define _DEBUG
+#endif
+
+void gcoOS_SetDebugLevel(
+	IN gctUINT32 Level
+	);
+
+void gcoOS_SetDebugZone(
+	IN gctUINT32 Zone
+	);
+
+void
+gcoOS_SetDebugFile(
+	IN gctCONST_STRING FileName
+	);
+
+/*******************************************************************************
+**
+**	gcmFATAL
+**
+**		Print a message to the debugger and execute a break point.
+**
+**	ARGUMENTS:
+**
+**		message	Message.
+**		...		Optional arguments.
+*/
+#ifdef _DEBUG
+	void
+	gcoOS_DebugFatal(
+		IN gctSTRING Message,
+		...
+		);
+#	define gcmFATAL				gcoOS_DebugFatal
+#elif defined(UNDER_CE)
+#	define gcmFATAL				__noop
+#else
+#	define gcmFATAL(...)
+#endif
+
+#define gcvLEVEL_NONE			-1
+#define gcvLEVEL_ERROR			0
+#define gcvLEVEL_WARNING		1
+#define gcvLEVEL_INFO			2
+#define gcvLEVEL_VERBOSE		3
+
+void
+gcoOS_DebugTrace(
+	IN gctUINT32 Level,
+	IN gctSTRING Message,
+	...
+	);
+
+#define gcmPRINT				gcoOS_DebugTrace
+
+/*******************************************************************************
+**
+**	gcmTRACE
+**
+**		Print a message to the debugfer if the correct level has been set.  In
+**		retail mode this macro does nothing.
+**
+**	ARGUMENTS:
+**
+**		level	Level of message.
+**		message	Message.
+**		...		Optional arguments.
+*/
+#ifdef _DEBUG
+#	define gcmTRACE				gcoOS_DebugTrace
+#elif defined(UNDER_CE)
+#	define gcmTRACE				__noop
+#else
+#	define gcmTRACE(...)
+#endif
+
+/* Debug zones. */
+#define gcvZONE_OS				(1 << 0)
+#define gcvZONE_HARDWARE		(1 << 1)
+#define gcvZONE_HEAP			(1 << 2)
+
+/* Kernel zones. */
+#define gcvZONE_KERNEL			(1 << 3)
+#define gcvZONE_VIDMEM			(1 << 4)
+#define gcvZONE_COMMAND			(1 << 5)
+#define gcvZONE_DRIVER			(1 << 6)
+#define gcvZONE_CMODEL			(1 << 7)
+#define gcvZONE_MMU				(1 << 8)
+#define gcvZONE_EVENT			(1 << 9)
+
+/* User zones. */
+#define gcvZONE_HAL				(1 << 3)
+#define gcvZONE_BUFFER			(1 << 4)
+#define gcvZONE_CONTEXT			(1 << 5)
+#define gcvZONE_SURFACE			(1 << 6)
+#define gcvZONE_INDEX			(1 << 7)
+#define gcvZONE_STREAM			(1 << 8)
+#define gcvZONE_TEXTURE			(1 << 9)
+#define gcvZONE_2D				(1 << 10)
+#define gcvZONE_3D				(1 << 11)
+#define gcvZONE_COMPILER		(1 << 12)
+#define gcvZONE_MEMORY			(1 << 13)
+#define gcvZONE_STATE			(1 << 14)
+#define gcvZONE_AUX				(1 << 15)
+
+/* OpenVG-specific zones. */
+#define gcvZONE_PAINT			(1 << 16)
+#define gcvZONE_FONT			(1 << 17)
+#define gcvZONE_IMAGE			(1 << 18)
+#define gcvZONE_PATH			(1 << 19)
+#define gcvZONE_FILTER			(1 << 20)
+#define gcvZONE_MASK			(1 << 21)
+#define gcvZONE_UTILITY			(1 << 22)
+#define gcvZONE_VG				((1 << (22 - 16 + 1)) - 1) << 16
+
+/* EGL-specific zones. */
+#define gcvZONE_EGL				(1 << 23)
+
+
+/*******************************************************************************
+**
+**	gcmTRACE_ZONE
+**
+**		Print a message to the debugger if the correct level and zone has been
+**		set.  In retail mode this macro does nothing.
+**
+**	ARGUMENTS:
+**
+**		level	Level of message.
+**		zone	Zone of message.
+**		message	Message.
+**		...		Optional arguments.
+*/
+#ifdef _DEBUG
+	void
+	gcoOS_DebugTraceZone(
+		IN gctUINT32 Level,
+		IN gctUINT32 Zone,
+		IN gctSTRING Message,
+		...
+		);
+#	define gcmTRACE_ZONE			gcoOS_DebugTraceZone
+#elif defined(UNDER_CE)
+#	define gcmTRACE_ZONE			__noop
+#else
+#	define gcmTRACE_ZONE(...)
+#endif
+
+/*******************************************************************************
+**
+**	gcmDUMP
+**
+**		Print a dump message.
+**
+**	ARGUMENTS:
+**
+**		gctSTRING	Message.
+**
+**		...			Optional arguments.
+*/
+
+void gcoOS_Print(
+	IN gctSTRING Message,
+	...
+	);
+#if gcdDUMP
+#  define gcmDUMP				gcoOS_Print
+#elif defined UNDER_CE
+#  define gcmDUMP				__noop
+#else
+#  define gcmDUMP(...)
+#endif
+
+/*******************************************************************************
+**
+**	gcmDUMP_DATA
+**
+**		Add data to the dump.
+**
+**	ARGUMENTS:
+**
+**		gctSTRING Tag
+**			Tag for dump.
+**
+**		gctPOINTER Logical
+**			Logical address of buffer.
+**
+**		gctSIZE_T Bytes
+**			Number of bytes.
+*/
+
+#if gcdDUMP
+void gcfDumpData(
+	IN gctSTRING Tag,
+	IN gctPOINTER Logical,
+	IN gctSIZE_T Bytes
+	);
+#  define gcmDUMP_DATA			gcfDumpData
+#elif defined UNDER_CE
+#  define gcmDUMP_DATA			__noop
+#else
+#  define gcmDUMP_DATA(...)
+#endif
+
+/*******************************************************************************
+**
+**	gcmDUMP_BUFFER
+**
+**		Print a buffer to the dump.
+**
+**	ARGUMENTS:
+**
+**		gctSTRING Tag
+**			Tag for dump.
+**
+**		gctUINT32 Physical
+**			Physical address of buffer.
+**
+**		gctPOINTER Logical
+**			Logical address of buffer.
+**
+**		gctUINT32 Offset
+**			Offset into buffer.
+**
+**		gctSIZE_T Bytes
+**			Number of bytes.
+*/
+
+#if gcdDUMP
+void gcfDumpBuffer(
+	IN gctSTRING Tag,
+	IN gctUINT32 Physical,
+	IN gctPOINTER Logical,
+	IN gctUINT32 Offset,
+	IN gctSIZE_T Bytes
+	);
+#  define gcmDUMP_BUFFER		gcfDumpBuffer
+#elif defined UNDER_CE
+#  define gcmDUMP_BUFFER		__noop
+#else
+#  define gcmDUMP_BUFFER(...)
+#endif
+
+/*******************************************************************************
+**
+**	gcmTRACE_RELEASE
+**
+**		Print a message to the shader debugger.
+**
+**	ARGUMENTS:
+**
+**		message	Message.
+**		...		Optional arguments.
+*/
+
+#define gcmTRACE_RELEASE				gcoOS_DebugShaderTrace
+
+void
+gcoOS_DebugShaderTrace(
+    IN char* Message,
+    ...
+    );
+
+void
+gcoOS_SetDebugShaderFiles(
+    IN gctCONST_STRING VSFileName,
+	IN gctCONST_STRING FSFileName
+	);
+
+void
+gcoOS_SetDebugShaderFileType(
+    IN gctUINT32 ShaderType
+    );
+
+/*******************************************************************************
+**
+**	gcmBREAK
+**
+**		Break into the debugger.  In retail mode this macro does nothing.
+**
+**	ARGUMENTS:
+**
+**		None.
+*/
+#ifdef _DEBUG
+	void
+	gcoOS_DebugBreak(
+		void
+		);
+#	define gcmBREAK				gcoOS_DebugBreak
+#else
+#	define gcmBREAK()
+#endif
+
+/*******************************************************************************
+**
+**	gcmASSERT
+**
+**		Evaluate an expression and break into the debugger if the expression
+**		evaluates to false.  In retail mode this macro does nothing.
+**
+**	ARGUMENTS:
+**
+**		exp		Expression to evaluate.
+*/
+#ifdef _DEBUG
+#	define gcmASSERT(exp) \
+		do \
+		{ \
+			if (!(exp)) \
+			{ \
+				gcmTRACE( \
+					gcvLEVEL_ERROR, \
+					"gcmASSERT: File %s, Line %d\n:= %s", \
+						__FILE__, __LINE__, #exp); \
+				gcmBREAK(); \
+			} \
+		} \
+		while (gcvFALSE)
+#else
+#	define gcmASSERT(exp)
+#endif
+
+/*******************************************************************************
+**
+**	gcmVERIFY
+**
+**		Verify if an expression returns true.  If the expression does not
+**		evaluates to true, an assertion will happen in debug mode.
+**
+**	ARGUMENTS:
+**
+**		exp		Expression to evaluate.
+*/
+#ifdef _DEBUG
+#	define gcmVERIFY(exp)			gcmASSERT(exp)
+#else
+#	define gcmVERIFY(exp)			exp
+#endif
+
+/*******************************************************************************
+**
+**	gcmVERIFY_OK
+**
+**		Verify a fucntion returns gcvSTATUS_OK.  If the function does not return
+**		gcvSTATUS_OK, an assertion will happen in debug mode.
+**
+**	ARGUMENTS:
+**
+**		func	Function to evaluate.
+*/
+#ifdef _DEBUG
+	void
+	gcoOS_Verify(
+		IN gceSTATUS _Status
+		);
+#	define gcmVERIFY_OK(func) \
+		do \
+		{ \
+			gceSTATUS __status__ = (func); \
+			gcoOS_Verify(__status__); \
+			gcmASSERT(__status__ == gcvSTATUS_OK); \
+		} \
+		while (gcvFALSE)
+#else
+#	define gcmVERIFY_OK(func) func
+#endif
+
+/*******************************************************************************
+**
+**	gcmERR_BREAK
+**
+**		Executes a break statement on error.
+**
+**	ASSUMPTIONS:
+**
+**		'status' variable of gceSTATUS type must be defined.
+**
+**	ARGUMENTS:
+**
+**		func	Function to evaluate.
+*/
+#define gcmERR_BREAK(func) \
+	status = func; \
+	if (gcmIS_ERROR(status)) \
+	{ \
+		gcmTRACE( \
+			gcvLEVEL_ERROR, \
+			"gcmERR_BREAK: status=%d @ line=%d in %s.", \
+			status, __LINE__, __FILE__ \
+			); \
+		break; \
+	}
+
+/*******************************************************************************
+**
+**	gcmERR_RETURN
+**
+**		Executes a return statement on error.
+**
+**	ASSUMPTIONS:
+**
+**		'status' variable of gceSTATUS type must be defined.
+**
+**	ARGUMENTS:
+**
+**		func	Function to evaluate.
+*/
+#define gcmERR_RETURN(func) \
+	status = func; \
+	if (gcmIS_ERROR(status)) \
+	{ \
+		gcmBREAK(); \
+		return status; \
+	}
+
+/*******************************************************************************
+**
+**	gcmONERROR
+**
+**		Jump to the error handler in case there is an error.
+**
+**	ASSUMPTIONS:
+**
+**		'status' variable of gceSTATUS type must be defined.
+**
+**	ARGUMENTS:
+**
+**		func	Function to evaluate.
+*/
+#define gcmONERROR(func) \
+	status = func; \
+	if (gcmIS_ERROR(status)) \
+	{ \
+		gcmTRACE( \
+			gcvLEVEL_ERROR, \
+			"gcmERR_GOTO: status=%d @ line=%d in %s.", \
+			status, __LINE__, __FILE__ \
+			); \
+		goto OnError; \
+	}
+
+/*******************************************************************************
+**
+**	gcmVERIFY_LOCK
+**
+**		Verifies whether the surface is locked.
+**
+**	ARGUMENTS:
+**
+**		surfaceInfo	Pointer to the surface iniformational structure.
+*/
+#define gcmVERIFY_LOCK(surfaceInfo) \
+	if (!surfaceInfo->node.valid) \
+	{ \
+		status = gcvSTATUS_MEMORY_UNLOCKED; \
+		break; \
+	}
+
+/*******************************************************************************
+**
+**	gcmVERIFY_NODE_LOCK
+**
+**		Verifies whether the surface node is locked.
+**
+**	ARGUMENTS:
+**
+**		surfaceInfo	Pointer to the surface iniformational structure.
+*/
+#define gcmVERIFY_NODE_LOCK(surfaceNode) \
+	if (!surfaceNode->valid) \
+	{ \
+		status = gcvSTATUS_MEMORY_UNLOCKED; \
+		break; \
+	}
+
+/*******************************************************************************
+**
+**	gcmBADOBJECT_BREAK
+**
+**		Executes a break statement on bad object.
+**
+**	ARGUMENTS:
+**
+**		obj		Object to test.
+**		t		Expected type of the object.
+*/
+#define gcmBADOBJECT_BREAK(obj, t) \
+	if ( (obj == gcvNULL) || (((gcsOBJECT*)(obj))->type != t) ) \
+	{ \
+		status = gcvSTATUS_INVALID_OBJECT; \
+		break; \
+	} \
+
+/*******************************************************************************
+**
+**	gcmCHECK_STATUS
+**
+**		Executes a break statement on error.
+**
+**	ASSUMPTIONS:
+**
+**		'status' variable of gceSTATUS type must be defined.
+**
+**	ARGUMENTS:
+**
+**		func	Function to evaluate.
+*/
+#define gcmCHECK_STATUS(func) \
+	last = func; \
+	if (gcmIS_ERROR(last)) \
+	{ \
+		gcmTRACE( \
+			gcvLEVEL_ERROR, \
+			"gcmCHECK_STATUS: status=%d @ line=%d in %s.", \
+			last, __LINE__, __FILE__ \
+			); \
+		status = last; \
+	}
+
+/*******************************************************************************
+**
+**	gcmVERIFY_ARGUMENT
+**
+**		Assert if an argument does not apply to teh speficied expression.  If
+**		the argument evaluates to false, AQSTATUS_INVALD_ARGUMENT will be
+**		returned from the current function.  In retail mode this macro does
+**		nothing.
+**
+**	ARGUMENTS:
+**
+**		arg		Argument to evaluate.
+*/
+#ifdef _DEBUG
+#	define gcmVERIFY_ARGUMENT(arg) \
+		do \
+		{ \
+			if (!(arg)) \
+			{ \
+				gcmASSERT(arg); \
+				return gcvSTATUS_INVALID_ARGUMENT; \
+			} \
+		} \
+		while (gcvFALSE)
+#else
+#	define gcmVERIFY_ARGUMENT(arg)
+#endif
+
+
+void gcoOS_Log(IN unsigned int filter, IN char* msg, 
+			...
+			);
+
+void gcoOS_SetLogFilter(IN unsigned int filter);
+
+
+// Logging service 
+#define _GFX_LOG_ERROR_         0x00000001
+#define _GFX_LOG_WARNING_       0x00000002    
+#define _GFX_LOG_EGL_API_       0x00000004
+#define _GFX_LOG_NATIVE_API_    0x00000008
+#define _GFX_LOG_OES_API_       0x00000010
+#define _GFX_LOG_VG_API_        0x00000020
+#define _GFX_LOG_CONFIG_        0x00000040  
+#define _GFX_LOG_INFO_          0x00000080
+#define _GFX_LOG_ALL_           0xffffffff
+
+
+#if MRVL_ENABLE_EGL_API_LOG
+#define EGL_API_LOG(x)		    gcoOS_Log x
+#else
+#define EGL_API_LOG(x)
+#endif
+#define EGL_LOG(x)              gcoOS_Log x
+
+
+#if MRVL_ENABLE_OES1_API_LOG
+#define OES11_API_LOG(x)		gcoOS_Log x
+#else
+#define OES11_API_LOG(x)
+#endif
+#define OES11_LOG(x)            gcoOS_Log x                   
+
+#if MRVL_ENABLE_OES2_API_LOG
+#define OES20_API_LOG(x)		gcoOS_Log x
+#else
+#define OES20_API_LOG(x)
+#endif
+#define OES20_LOG               gcoOS_Log x
+
+#if MRVL_ENABLE_OVG_API_LOG
+#define OVG_API_LOG(x)		    gcoOS_Log x
+#else
+#define OVG_API_LOG(x)
+#endif
+#define OVG_LOG(x)              gcoOS_Log x               
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __gchal_base_h_ */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gc_hal_enum.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gc_hal_enum.h
@@ -0,0 +1,534 @@
+/****************************************************************************
+*
+*    Copyright (C) 2005 - 2010 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public License as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+#ifndef __gc_hal_enum_h_
+#define __gc_hal_enum_h_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Chip models. */
+typedef enum _gceCHIPMODEL
+{
+	gcv300  = 0x0300,
+	gcv400  = 0x0400,
+	gcv410  = 0x0410,
+	gcv450  = 0x0450,
+	gcv500  = 0x0500,
+	gcv530  = 0x0530,
+	gcv600  = 0x0600,
+	gcv700  = 0x0700,
+	gcv800  = 0x0800,
+	gcv860  = 0x0860,
+	gcv1000 = 0x1000,
+}
+gceCHIPMODEL;
+
+/* Chip features. */
+typedef enum _gceFEATURE
+{
+	gcvFEATURE_PIPE_2D,
+	gcvFEATURE_PIPE_3D,
+	gcvFEATURE_PIPE_VG,
+	gcvFEATURE_DC,
+	gcvFEATURE_HIGH_DYNAMIC_RANGE,
+	gcvFEATURE_MODULE_CG,
+	gcvFEATURE_MIN_AREA,
+	gcvFEATURE_BUFFER_INTERLEAVING,
+	gcvFEATURE_BYTE_WRITE_2D,
+	gcvFEATURE_ENDIANNESS_CONFIG,
+	gcvFEATURE_DUAL_RETURN_BUS,
+	gcvFEATURE_DEBUG_MODE,
+	gcvFEATURE_YUY2_RENDER_TARGET,
+	gcvFEATURE_FRAGMENT_PROCESSOR,
+	gcvFEATURE_2DPE20,
+	gcvFEATURE_FAST_CLEAR,
+	gcvFEATURE_YUV420_TILER,
+	gcvFEATURE_YUY2_AVERAGING,
+	gcvFEATURE_FLIP_Y,
+	gcvFEATURE_EARLY_Z,
+	gcvFEATURE_Z_COMPRESSION,
+	gcvFEATURE_MSAA,
+	gcvFEATURE_SPECIAL_ANTI_ALIASING,
+	gcvFEATURE_SPECIAL_MSAA_LOD,
+	gcvFEATURE_422_TEXTURE_COMPRESSION,
+	gcvFEATURE_DXT_TEXTURE_COMPRESSION,
+	gcvFEATURE_ETC1_TEXTURE_COMPRESSION,
+	gcvFEATURE_CORRECT_TEXTURE_CONVERTER,
+	gcvFEATURE_TEXTURE_8K,
+	gcvFEATURE_SCALER,
+	gcvFEATURE_YUV420_SCALER,
+	gcvFEATURE_SHADER_HAS_W,
+	gcvFEATURE_SHADER_HAS_SIGN,
+	gcvFEATURE_SHADER_HAS_FLOOR,
+	gcvFEATURE_SHADER_HAS_CEIL,
+	gcvFEATURE_SHADER_HAS_SQRT,
+	gcvFEATURE_SHADER_HAS_TRIG,
+	gcvFEATURE_VAA,
+	gcvFEATURE_HZ,
+	gcvFEATURE_CORRECT_STENCIL,
+	gcvFEATURE_VG20,
+	gcvFEATURE_VG_FILTER,
+	gcvFEATURE_VG21,
+	gcvFEATURE_VG_DOUBLE_BUFFER,
+	gcvFEATURE_MC20,
+}
+gceFEATURE;
+
+/* Chip Power Status. */
+typedef enum _gceCHIPPOWERSTATE
+{
+	gcvPOWER_ON,
+	gcvPOWER_OFF,
+	gcvPOWER_IDLE,
+	gcvPOWER_SUSPEND,
+}
+gceCHIPPOWERSTATE;
+
+/* Surface types. */
+typedef enum _gceSURF_TYPE
+{
+	gcvSURF_TYPE_UNKNOWN,
+	gcvSURF_INDEX,
+	gcvSURF_VERTEX,
+	gcvSURF_TEXTURE,
+	gcvSURF_RENDER_TARGET,
+	gcvSURF_DEPTH,
+	gcvSURF_BITMAP,
+	gcvSURF_TILE_STATUS,
+	gcvSURF_MASK,
+	gcvSURF_SCISSOR,
+	gcvSURF_HIERARCHICAL_DEPTH,
+	gcvSURF_NUM_TYPES, /* Make sure this is the last one! */
+
+	/* Combinations. */
+	gcvSURF_NO_TILE_STATUS = 0x100,
+	gcvSURF_RENDER_TARGET_NO_TILE_STATUS = gcvSURF_RENDER_TARGET
+										 | gcvSURF_NO_TILE_STATUS,
+	gcvSURF_DEPTH_NO_TILE_STATUS = gcvSURF_DEPTH
+								 | gcvSURF_NO_TILE_STATUS,
+}
+gceSURF_TYPE;
+
+typedef enum _gceSURF_COLOR_TYPE
+{
+	gcvSURF_COLOR_UNKNOWN,
+	gcvSURF_COLOR_LINEAR		= 0x01,
+	gcvSURF_COLOR_ALPHA_PRE		= 0x02,
+}
+gceSURF_COLOR_TYPE;
+
+/* Rotation. */
+typedef enum _gceSURF_ROTATION
+{
+	gcvSURF_0_DEGREE,
+	gcvSURF_90_DEGREE,
+	gcvSURF_180_DEGREE,
+	gcvSURF_270_DEGREE
+}
+gceSURF_ROTATION;
+
+/* Surface formats. */
+typedef enum _gceSURF_FORMAT
+{
+	/* Unknown format. */
+	gcvSURF_UNKNOWN,
+
+	/* Palettized formats. */
+	gcvSURF_INDEX1				= 100,
+	gcvSURF_INDEX4,
+	gcvSURF_INDEX8,
+
+	/* RGB formats. */
+	gcvSURF_A2R2G2B2			= 200,
+	gcvSURF_R3G3B2,
+	gcvSURF_A8R3G3B2,
+	gcvSURF_X4R4G4B4,
+	gcvSURF_A4R4G4B4,
+	gcvSURF_R4G4B4A4,
+	gcvSURF_X1R5G5B5,
+	gcvSURF_A1R5G5B5,
+	gcvSURF_R5G5B5A1,
+	gcvSURF_R5G6B5,
+	gcvSURF_R8G8B8,
+	gcvSURF_X8R8G8B8,
+	gcvSURF_A8R8G8B8,
+	gcvSURF_R8G8B8A8,
+	gcvSURF_G8R8G8B8,
+	gcvSURF_R8G8B8G8,
+	gcvSURF_X2R10G10B10,
+	gcvSURF_A2R10G10B10,
+	gcvSURF_X12R12G12B12,
+	gcvSURF_A12R12G12B12,
+	gcvSURF_X16R16G16B16,
+	gcvSURF_A16R16G16B16,
+	gcvSURF_R8G8B8X8,
+	gcvSURF_R5G5B5X1,
+	gcvSURF_R4G4B4X4,
+
+	/* BGR formats. */
+	gcvSURF_A4B4G4R4			= 300,
+	gcvSURF_A1B5G5R5,
+	gcvSURF_B5G6R5,
+	gcvSURF_B8G8R8,
+	gcvSURF_X8B8G8R8,
+	gcvSURF_A8B8G8R8,
+	gcvSURF_A2B10G10R10,
+	gcvSURF_A16B16G16R16,
+	gcvSURF_G16R16,
+	gcvSURF_B4G4R4A4,
+	gcvSURF_B5G5R5A1,
+	gcvSURF_B8G8R8X8,
+	gcvSURF_B8G8R8A8,
+	gcvSURF_X4B4G4R4,
+	gcvSURF_X1B5G5R5,
+	gcvSURF_B4G4R4X4,
+	gcvSURF_B5G5R5X1,
+
+	/* Compressed formats. */
+	gcvSURF_DXT1				= 400,
+	gcvSURF_DXT2,
+	gcvSURF_DXT3,
+	gcvSURF_DXT4,
+	gcvSURF_DXT5,
+	gcvSURF_CXV8U8,
+	gcvSURF_ETC1,
+
+	/* YUV formats. */
+	gcvSURF_YUY2				= 500,
+	gcvSURF_UYVY,
+	gcvSURF_YV12,
+	gcvSURF_I420,
+	gcvSURF_NV12,
+	gcvSURF_NV21,
+	gcvSURF_NV16,
+	gcvSURF_NV61,
+	gcvSURF_YVYU,
+	gcvSURF_VYUY,
+
+	/* Depth formats. */
+	gcvSURF_D16					= 600,
+	gcvSURF_D24S8,
+	gcvSURF_D32,
+	gcvSURF_D24X8,
+
+	/* Alpha formats. */
+	gcvSURF_A4					= 700,
+	gcvSURF_A8,
+	gcvSURF_A12,
+	gcvSURF_A16,
+	gcvSURF_A32,
+	gcvSURF_A1,
+
+	/* Luminance formats. */
+	gcvSURF_L4					= 800,
+	gcvSURF_L8,
+	gcvSURF_L12,
+	gcvSURF_L16,
+	gcvSURF_L32,
+	gcvSURF_L1,
+
+	/* Alpha/Luminance formats. */
+	gcvSURF_A4L4				= 900,
+	gcvSURF_A2L6,
+	gcvSURF_A8L8,
+	gcvSURF_A4L12,
+	gcvSURF_A12L12,
+	gcvSURF_A16L16,
+
+	/* Bump formats. */
+	gcvSURF_L6V5U5				= 1000,
+	gcvSURF_V8U8,
+	gcvSURF_X8L8V8U8,
+	gcvSURF_Q8W8V8U8,
+	gcvSURF_A2W10V10U10,
+	gcvSURF_V16U16,
+	gcvSURF_Q16W16V16U16,
+
+	/* Floating point formats. */
+	gcvSURF_R16F				= 1100,
+	gcvSURF_G16R16F,
+	gcvSURF_A16B16G16R16F,
+	gcvSURF_R32F,
+	gcvSURF_G32R32F,
+	gcvSURF_A32B32G32R32F,
+
+#if 0
+	/* FIXME: remove HDR support for now. */
+	/* HDR formats. */
+	gcvSURF_HDR7E3				= 1200,
+	gcvSURF_HDR6E4,
+	gcvSURF_HDR5E5,
+	gcvSURF_HDR6E5,
+#endif
+}
+gceSURF_FORMAT;
+
+/* Pixel swizzle modes. */
+typedef enum _gceSURF_SWIZZLE
+{
+	gcvSURF_NOSWIZZLE,
+	gcvSURF_ARGB,
+	gcvSURF_ABGR,
+	gcvSURF_RGBA,
+	gcvSURF_BGRA
+}
+gceSURF_SWIZZLE;
+
+/* Transparency modes. */
+typedef enum _gceSURF_TRANSPARENCY
+{
+	/* Valid only for PE 1.0 */
+	gcvSURF_OPAQUE,
+	gcvSURF_SOURCE_MATCH,
+	gcvSURF_SOURCE_MASK,
+	gcvSURF_PATTERN_MASK,
+}
+gceSURF_TRANSPARENCY;
+
+/* Transparency modes. */
+typedef enum _gce2D_TRANSPARENCY
+{
+	/* Valid only for PE 2.0 */
+	gcv2D_OPAQUE,
+	gcv2D_KEYED,
+	gcv2D_MASKED
+}
+gce2D_TRANSPARENCY;
+
+/* Mono packing modes. */
+typedef enum _gceSURF_MONOPACK
+{
+	gcvSURF_PACKED8,
+	gcvSURF_PACKED16,
+	gcvSURF_PACKED32,
+	gcvSURF_UNPACKED,
+}
+gceSURF_MONOPACK;
+
+/* Blending modes. */
+typedef enum _gceSURF_BLEND_MODE
+{
+	/* Porter-Duff blending modes.                   */
+	/*                         Fsrc      Fdst        */
+	gcvBLEND_CLEAR,         /* 0         0           */
+	gcvBLEND_SRC,           /* 1         0           */
+	gcvBLEND_DST,           /* 0         1           */
+	gcvBLEND_SRC_OVER_DST,  /* 1         1 - Asrc    */
+	gcvBLEND_DST_OVER_SRC,  /* 1 - Adst  1           */
+	gcvBLEND_SRC_IN_DST,    /* Adst      0           */
+	gcvBLEND_DST_IN_SRC,    /* 0         Asrc        */
+	gcvBLEND_SRC_OUT_DST,   /* 1 - Adst  0           */
+	gcvBLEND_DST_OUT_SRC,   /* 0         1 - Asrc    */
+	gcvBLEND_SRC_ATOP_DST,  /* Adst      1 - Asrc    */
+	gcvBLEND_DST_ATOP_SRC,  /* 1 - Adst  Asrc        */
+	gcvBLEND_SRC_XOR_DST,   /* 1 - Adst  1 - Asrc    */
+
+	/* Special blending modes.                       */
+	gcvBLEND_SET,           /* DST = 1               */
+	gcvBLEND_SUB            /* DST = DST * (1 - SRC) */
+}
+gceSURF_BLEND_MODE;
+
+/* Per-pixel alpha modes. */
+typedef enum _gceSURF_PIXEL_ALPHA_MODE
+{
+	gcvSURF_PIXEL_ALPHA_STRAIGHT,
+	gcvSURF_PIXEL_ALPHA_INVERSED
+}
+gceSURF_PIXEL_ALPHA_MODE;
+
+/* Global alpha modes. */
+typedef enum _gceSURF_GLOBAL_ALPHA_MODE
+{
+	gcvSURF_GLOBAL_ALPHA_OFF,
+	gcvSURF_GLOBAL_ALPHA_ON,
+	gcvSURF_GLOBAL_ALPHA_SCALE
+}
+gceSURF_GLOBAL_ALPHA_MODE;
+
+/* Color component modes for alpha blending. */
+typedef enum _gceSURF_PIXEL_COLOR_MODE
+{
+	gcvSURF_COLOR_STRAIGHT,
+	gcvSURF_COLOR_MULTIPLY
+}
+gceSURF_PIXEL_COLOR_MODE;
+
+/* Color component modes for alpha blending. */
+typedef enum _gce2D_PIXEL_COLOR_MULTIPLY_MODE
+{
+	gcv2D_COLOR_MULTIPLY_DISABLE,
+	gcv2D_COLOR_MULTIPLY_ENABLE
+}
+gce2D_PIXEL_COLOR_MULTIPLY_MODE;
+
+/* Color component modes for alpha blending. */
+typedef enum _gce2D_GLOBAL_COLOR_MULTIPLY_MODE
+{
+	gcv2D_GLOBAL_COLOR_MULTIPLY_DISABLE,
+	gcv2D_GLOBAL_COLOR_MULTIPLY_ALPHA,
+	gcv2D_GLOBAL_COLOR_MULTIPLY_COLOR
+}
+gce2D_GLOBAL_COLOR_MULTIPLY_MODE;
+
+/* Alpha blending factor modes. */
+typedef enum _gceSURF_BLEND_FACTOR_MODE
+{
+	gcvSURF_BLEND_ZERO,
+	gcvSURF_BLEND_ONE,
+	gcvSURF_BLEND_STRAIGHT,
+	gcvSURF_BLEND_INVERSED,
+	gcvSURF_BLEND_COLOR,
+	gcvSURF_BLEND_COLOR_INVERSED,
+	gcvSURF_BLEND_SRC_ALPHA_SATURATED
+}
+gceSURF_BLEND_FACTOR_MODE;
+
+/* Alpha blending porter duff rules. */
+typedef enum _gce2D_PORTER_DUFF_RULE
+{
+	gcvPD_CLEAR,
+	gcvPD_SRC,
+	gcvPD_SRC_OVER,
+	gcvPD_DST_OVER,
+	gcvPD_SRC_IN,
+	gcvPD_DST_IN,
+	gcvPD_SRC_OUT,
+	gcvPD_DST_OUT,
+	gcvPD_SRC_ATOP,
+	gcvPD_DST_ATOP,
+	gcvPD_ADD,
+	gcvPD_XOR,
+	gcvPD_DST
+}
+gce2D_PORTER_DUFF_RULE;
+
+/* Alpha blending factor modes. */
+typedef enum _gce2D_YUV_COLOR_MODE
+{
+	gcv2D_YUV_601,
+	gcv2D_YUV_709
+}
+gce2D_YUV_COLOR_MODE;
+
+/* 2D Rotation and flipping. */
+typedef enum _gce2D_ORIENTATION
+{
+	gcv2D_0_DEGREE,
+	gcv2D_90_DEGREE,
+	gcv2D_180_DEGREE,
+	gcv2D_270_DEGREE,
+	gcv2D_X_FLIP,
+	gcv2D_Y_FLIP
+}
+gce2D_ORIENTATION;
+
+typedef enum _gce2D_COMMAND
+{
+	gcv2D_CLEAR,
+	gcv2D_LINE,
+	gcv2D_BLT,
+	gcv2D_STRETCH,
+	gcv2D_HOR_FILTER,
+	gcv2D_VER_FILTER,
+}
+gce2D_COMMAND;
+
+/* Texture functions. */
+typedef enum _gceTEXTURE_FUNCTION
+{
+	gcvTEXTURE_DUMMY = 0,
+	gcvTEXTURE_REPLACE = 0,
+	gcvTEXTURE_MODULATE,
+	gcvTEXTURE_ADD,
+	gcvTEXTURE_ADD_SIGNED,
+	gcvTEXTURE_INTERPOLATE,
+	gcvTEXTURE_SUBTRACT,
+	gcvTEXTURE_DOT3
+}
+gceTEXTURE_FUNCTION;
+
+/* Texture sources. */
+typedef enum _gceTEXTURE_SOURCE
+{
+	gcvCOLOR_FROM_TEXTURE,
+	gcvCOLOR_FROM_CONSTANT_COLOR,
+	gcvCOLOR_FROM_PRIMARY_COLOR,
+	gcvCOLOR_FROM_PREVIOUS_COLOR
+}
+gceTEXTURE_SOURCE;
+
+/* Texture source channels. */
+typedef enum _gceTEXTURE_CHANNEL
+{
+	gcvFROM_COLOR,
+	gcvFROM_ONE_MINUS_COLOR,
+	gcvFROM_ALPHA,
+	gcvFROM_ONE_MINUS_ALPHA
+}
+gceTEXTURE_CHANNEL;
+
+/* Filter types. */
+typedef enum _gceFILTER_TYPE
+{
+	gcvFILTER_SYNC,
+	gcvFILTER_BLUR,
+	gcvFILTER_USER
+}
+gceFILTER_TYPE;
+
+/* Filter pass types. */
+typedef enum _gceFILTER_PASS_TYPE
+{
+	gcvFILTER_HOR_PASS,
+	gcvFILTER_VER_PASS
+}
+gceFILTER_PASS_TYPE;
+
+/* Endian hints. */
+typedef enum _gceENDIAN_HINT
+{
+	gcvENDIAN_NO_SWAP			= 0,
+	gcvENDIAN_SWAP_WORD,
+	gcvENDIAN_SWAP_DWORD,
+}
+gceENDIAN_HINT;
+
+/******************************************************************************\
+****************************** Object Declarations *****************************
+\******************************************************************************/
+
+typedef struct _gcoCONTEXT *		gcoCONTEXT;
+typedef struct _gcoCMDBUF *			gcoCMDBUF;
+typedef struct _gcoQUEUE *			gcoQUEUE;
+typedef struct _gcsHAL_INTERFACE *	gcsHAL_INTERFACE_PTR;
+typedef struct gcs2D_PROFILE *  	gcs2D_PROFILE_PTR;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __gc_hal_enum_h_ */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gc_hal_driver.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gc_hal_driver.h
@@ -0,0 +1,634 @@
+/****************************************************************************
+*
+*    Copyright (C) 2005 - 2010 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public License as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+#ifndef __gc_hal_driver_h_
+#define __gc_hal_driver_h_
+
+#include "gc_hal_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/******************************************************************************\
+******************************* I/O Control Codes ******************************
+\******************************************************************************/
+
+#define gcvHAL_CLASS                    "galcore"
+#define IOCTL_GCHAL_INTERFACE           30000
+#define IOCTL_GCHAL_KERNEL_INTERFACE    30001
+#define IOCTL_GCHAL_TERMINATE           30002
+
+/******************************************************************************\
+********************************* Command Codes ********************************
+\******************************************************************************/
+
+typedef enum _gceHAL_COMMAND_CODES
+{
+    /* Generic query. */
+    gcvHAL_QUERY_VIDEO_MEMORY,
+    gcvHAL_QUERY_CHIP_IDENTITY,
+
+    /* Contiguous memory. */
+    gcvHAL_ALLOCATE_NON_PAGED_MEMORY,
+    gcvHAL_FREE_NON_PAGED_MEMORY,
+    gcvHAL_ALLOCATE_CONTIGUOUS_MEMORY,
+    gcvHAL_FREE_CONTIGUOUS_MEMORY,
+
+    /* Video memory allocation. */
+    gcvHAL_ALLOCATE_VIDEO_MEMORY,           /* Enforced alignment. */
+    gcvHAL_ALLOCATE_LINEAR_VIDEO_MEMORY,    /* No alignment. */
+    gcvHAL_FREE_VIDEO_MEMORY,
+
+    /* Physical-to-logical mapping. */
+    gcvHAL_MAP_MEMORY,
+    gcvHAL_UNMAP_MEMORY,
+
+    /* Logical-to-physical mapping. */
+    gcvHAL_MAP_USER_MEMORY,
+    gcvHAL_UNMAP_USER_MEMORY,
+
+    /* Surface lock/unlock. */
+    gcvHAL_LOCK_VIDEO_MEMORY,
+    gcvHAL_UNLOCK_VIDEO_MEMORY,
+
+    /* Event queue. */
+    gcvHAL_EVENT_COMMIT,
+
+    gcvHAL_USER_SIGNAL,
+    gcvHAL_SIGNAL,
+    gcvHAL_WRITE_DATA,
+
+    gcvHAL_COMMIT,
+    gcvHAL_STALL,
+
+    gcvHAL_READ_REGISTER,
+    gcvHAL_WRITE_REGISTER,
+
+    gcvHAL_GET_PROFILE_SETTING,
+    gcvHAL_SET_PROFILE_SETTING,
+
+    gcvHAL_READ_ALL_PROFILE_REGISTERS,
+    gcvHAL_PROFILE_REGISTERS_2D,
+
+    /* Power management. */
+    gcvHAL_SET_POWER_MANAGEMENT_STATE,
+    gcvHAL_QUERY_POWER_MANAGEMENT_STATE,
+
+    gcvHAL_GET_BASE_ADDRESS,
+
+    gcvHAL_SET_IDLE,
+
+    /* Queries. */
+    gcvHAL_QUERY_KERNEL_SETTINGS,
+
+    /* Reset. */
+    gcvHAL_RESET,
+
+    /* Map physical address into handle. */
+    gcvHAL_MAP_PHYSICAL,
+
+    /* Debugger stuff. */
+    gcvHAL_DEBUG,
+
+    /* Cache stuff. */
+    gcvHAL_CACHE,
+}
+gceHAL_COMMAND_CODES;
+
+/******************************************************************************\
+****************************** Interface Structure *****************************
+\******************************************************************************/
+
+#define gcdMAX_PROFILE_FILE_NAME    128
+
+typedef struct _gcsHAL_INTERFACE
+{
+    /* Command code. */
+    gceHAL_COMMAND_CODES        command;
+
+    /* Status value. */
+    gceSTATUS                   status;
+
+    /* Handle to this interface channel. */
+    gctHANDLE                   handle;
+
+    /* Pid of the client. */
+    gctUINT32                   pid;
+
+    /* Union of command structures. */
+    union _u
+    {
+        /* gcvHAL_GET_BASE_ADDRESS */
+        struct _gcsHAL_GET_BASE_ADDRESS
+        {
+            /* Physical memory address of internal memory. */
+            OUT gctUINT32               baseAddress;
+        }
+        GetBaseAddress;
+
+        /* gcvHAL_QUERY_VIDEO_MEMORY */
+        struct _gcsHAL_QUERY_VIDEO_MEMORY
+        {
+            /* Physical memory address of internal memory. */
+            OUT gctPHYS_ADDR            internalPhysical;
+
+            /* Size in bytes of internal memory.*/
+            OUT gctSIZE_T               internalSize;
+
+            /* Physical memory address of external memory. */
+            OUT gctPHYS_ADDR            externalPhysical;
+
+            /* Size in bytes of external memory.*/
+            OUT gctSIZE_T               externalSize;
+
+            /* Physical memory address of contiguous memory. */
+            OUT gctPHYS_ADDR            contiguousPhysical;
+
+            /* Size in bytes of contiguous memory.*/
+            OUT gctSIZE_T               contiguousSize;
+        }
+        QueryVideoMemory;
+
+        /* gcvHAL_QUERY_CHIP_IDENTITY */
+        struct _gcsHAL_QUERY_CHIP_IDENTITY
+        {
+
+            /* Chip model. */
+            OUT gceCHIPMODEL            chipModel;
+
+            /* Revision value.*/
+            OUT gctUINT32               chipRevision;
+
+            /* Supported feature fields. */
+            OUT gctUINT32               chipFeatures;
+
+            /* Supported minor feature fields. */
+            OUT gctUINT32               chipMinorFeatures;
+
+            /* Supported minor feature 1 fields. */
+            OUT gctUINT32               chipMinorFeatures1;
+
+            /* Number of streams supported. */
+            OUT gctUINT32               streamCount;
+
+            /* Total number of temporary registers per thread. */
+            OUT gctUINT32               registerMax;
+
+            /* Maximum number of threads. */
+            OUT gctUINT32               threadCount;
+
+            /* Number of shader cores. */
+            OUT gctUINT32               shaderCoreCount;
+
+            /* Size of the vertex cache. */
+            OUT gctUINT32               vertexCacheSize;
+
+            /* Number of entries in the vertex output buffer. */
+            OUT gctUINT32               vertexOutputBufferSize;
+        }
+        QueryChipIdentity;
+
+        /* gcvHAL_MAP_MEMORY */
+        struct _gcsHAL_MAP_MEMORY
+        {
+            /* Physical memory address to map. */
+            IN gctPHYS_ADDR             physical;
+
+            /* Number of bytes in physical memory to map. */
+            IN gctSIZE_T                bytes;
+
+            /* Address of mapped memory. */
+            OUT gctPOINTER              logical;
+        }
+        MapMemory;
+
+        /* gcvHAL_UNMAP_MEMORY */
+        struct _gcsHAL_UNMAP_MEMORY
+        {
+            /* Physical memory address to unmap. */
+            IN gctPHYS_ADDR             physical;
+
+            /* Number of bytes in physical memory to unmap. */
+            IN gctSIZE_T                bytes;
+
+            /* Address of mapped memory to unmap. */
+            IN gctPOINTER               logical;
+        }
+        UnmapMemory;
+
+        /* gcvHAL_ALLOCATE_LINEAR_VIDEO_MEMORY */
+        struct _gcsHAL_ALLOCATE_LINEAR_VIDEO_MEMORY
+        {
+            /* Number of bytes to allocate. */
+            IN OUT gctUINT              bytes;
+
+            /* Buffer alignment. */
+            IN gctUINT                  alignment;
+
+            /* Type of allocation. */
+            IN gceSURF_TYPE             type;
+
+            /* Memory pool to allocate from. */
+            IN OUT gcePOOL              pool;
+
+            /* Allocated video memory. */
+            OUT gcuVIDMEM_NODE_PTR      node;
+        }
+        AllocateLinearVideoMemory;
+
+        /* gcvHAL_ALLOCATE_VIDEO_MEMORY */
+        struct _gcsHAL_ALLOCATE_VIDEO_MEMORY
+        {
+            /* Width of rectangle to allocate. */
+            IN OUT gctUINT              width;
+
+            /* Height of rectangle to allocate. */
+            IN OUT gctUINT              height;
+
+            /* Depth of rectangle to allocate. */
+            IN gctUINT                  depth;
+
+            /* Format rectangle to allocate in gceSURF_FORMAT. */
+            IN gceSURF_FORMAT           format;
+
+            /* Type of allocation. */
+            IN gceSURF_TYPE             type;
+
+            /* Memory pool to allocate from. */
+            IN OUT gcePOOL              pool;
+
+            /* Allocated video memory. */
+            OUT gcuVIDMEM_NODE_PTR      node;
+        }
+        AllocateVideoMemory;
+
+        /* gcvHAL_FREE_VIDEO_MEMORY */
+        struct _gcsHAL_FREE_VIDEO_MEMORY
+        {
+            /* Allocated video memory. */
+            IN gcuVIDMEM_NODE_PTR       node;
+
+#ifdef __QNXNTO__
+/* TODO: This is part of the unlock - why is it here? */
+            /* Mapped logical address to unmap in user space. */
+            OUT gctPOINTER              memory;
+
+            /* Number of bytes to allocated. */
+            OUT gctSIZE_T               bytes;
+#endif
+        }
+        FreeVideoMemory;
+
+        /* gcvHAL_LOCK_VIDEO_MEMORY */
+        struct _gcsHAL_LOCK_VIDEO_MEMORY
+        {
+            /* Allocated video memory. */
+            IN gcuVIDMEM_NODE_PTR       node;
+
+            /* Hardware specific address. */
+            OUT gctUINT32               address;
+
+            /* Mapped logical address. */
+            OUT gctPOINTER              memory;
+        }
+        LockVideoMemory;
+
+        /* gcvHAL_UNLOCK_VIDEO_MEMORY */
+        struct _gcsHAL_UNLOCK_VIDEO_MEMORY
+        {
+            /* Allocated video memory. */
+            IN gcuVIDMEM_NODE_PTR       node;
+
+            /* Type of surface. */
+            IN gceSURF_TYPE             type;
+
+            /* Flag to unlock surface asynchroneously. */
+            IN OUT gctBOOL              asynchroneous;
+        }
+        UnlockVideoMemory;
+
+        /* gcvHAL_ALLOCATE_NON_PAGED_MEMORY */
+        struct _gcsHAL_ALLOCATE_NON_PAGED_MEMORY
+        {
+            /* Number of bytes to allocate. */
+            IN OUT gctSIZE_T            bytes;
+
+            /* Physical address of allocation. */
+            OUT gctPHYS_ADDR            physical;
+
+            /* Logical address of allocation. */
+            OUT gctPOINTER              logical;
+        }
+        AllocateNonPagedMemory;
+
+        /* gcvHAL_FREE_NON_PAGED_MEMORY */
+        struct _gcsHAL_FREE_NON_PAGED_MEMORY
+        {
+            /* Number of bytes allocated. */
+            IN gctSIZE_T                bytes;
+
+            /* Physical address of allocation. */
+            IN gctPHYS_ADDR             physical;
+
+            /* Logical address of allocation. */
+            IN gctPOINTER               logical;
+        }
+        FreeNonPagedMemory;
+
+        /* gcvHAL_EVENT_COMMIT. */
+        struct _gcsHAL_EVENT_COMMIT
+        {
+            /* Event queue. */
+            IN struct _gcsQUEUE *       queue;
+        }
+        Event;
+
+        /* gcvHAL_COMMIT */
+        struct _gcsHAL_COMMIT
+        {
+            /* Command buffer. */
+            IN gcoCMDBUF                commandBuffer;
+
+            /* Context buffer. */
+            IN gcoCONTEXT               contextBuffer;
+
+            /* Process handle. */
+            IN gctHANDLE                process;
+        }
+        Commit;
+
+        /* gcvHAL_MAP_USER_MEMORY */
+        struct _gcsHAL_MAP_USER_MEMORY
+        {
+            /* Base address of user memory to map. */
+            IN gctPOINTER               memory;
+
+            /* Size of user memory in bytes to map. */
+            IN gctSIZE_T                size;
+
+            /* Info record required by gcvHAL_UNMAP_USER_MEMORY. */
+            OUT gctPOINTER              info;
+
+            /* Physical address of mapped memory. */
+            OUT gctUINT32               address;
+        }
+        MapUserMemory;
+
+        /* gcvHAL_UNMAP_USER_MEMORY */
+        struct _gcsHAL_UNMAP_USER_MEMORY
+        {
+            /* Base address of user memory to unmap. */
+            IN gctPOINTER               memory;
+
+            /* Size of user memory in bytes to unmap. */
+            IN gctSIZE_T                size;
+
+            /* Info record returned by gcvHAL_MAP_USER_MEMORY. */
+            IN gctPOINTER               info;
+
+            /* Physical address of mapped memory as returned by
+               gcvHAL_MAP_USER_MEMORY. */
+            IN gctUINT32                address;
+        }
+        UnmapUserMemory;
+
+#if !USE_NEW_LINUX_SIGNAL
+        /* gcsHAL_USER_SIGNAL  */
+        struct _gcsHAL_USER_SIGNAL
+        {
+            /* Command. */
+            gceUSER_SIGNAL_COMMAND_CODES command;
+
+            /* Signal ID. */
+            IN OUT gctINT               id;
+
+            /* Reset mode. */
+            IN gctBOOL                  manualReset;
+
+            /* Wait timedout. */
+            IN gctUINT32                wait;
+
+            /* State. */
+            IN gctBOOL                  state;
+        }
+        UserSignal;
+#endif
+
+        /* gcvHAL_SIGNAL. */
+        struct _gcsHAL_SIGNAL
+        {
+            /* Signal handle to signal. */
+            IN gctSIGNAL                signal;
+
+            /* Reserved. */
+            IN gctSIGNAL                auxSignal;
+
+            /* Process owning the signal. */
+            IN gctHANDLE                process;
+
+#if defined(__QNXNTO__)
+            /* Client pulse side-channel connection ID. Set by client in gcoOS_CreateSignal. */
+            IN gctINT32     			coid;
+
+            /* Set by server. */
+            IN gctINT32                 rcvid;
+#endif
+            /* Event generated from where of pipeline */
+            IN gceKERNEL_WHERE          fromWhere;
+        }
+        Signal;
+
+		/* gcvHAL_WRITE_DATA. */
+		struct _gcsHAL_WRITE_DATA
+		{
+			/* Address to write data to. */
+			IN gctUINT32				address;
+
+			IN  gctPOINTER			kernelAddress;
+            /* Data to write. */
+            IN gctUINT32                data;
+        }
+        WriteData;
+
+        /* gcvHAL_ALLOCATE_CONTIGUOUS_MEMORY */
+        struct _gcsHAL_ALLOCATE_CONTIGUOUS_MEMORY
+        {
+            /* Number of bytes to allocate. */
+            IN OUT gctSIZE_T            bytes;
+
+            /* Physical address of allocation. */
+            OUT gctPHYS_ADDR            physical;
+
+            /* Logical address of allocation. */
+            OUT gctPOINTER              logical;
+
+        }
+        AllocateContiguousMemory;
+
+        /* gcvHAL_FREE_CONTIGUOUS_MEMORY */
+        struct _gcsHAL_FREE_CONTIGUOUS_MEMORY
+        {
+            /* Number of bytes allocated. */
+            IN gctSIZE_T                bytes;
+
+            /* Physical address of allocation. */
+            IN gctPHYS_ADDR             physical;
+
+            /* Logical address of allocation. */
+            IN gctPOINTER               logical;
+        }
+        FreeContiguousMemory;
+
+        /* gcvHAL_READ_REGISTER */
+        struct _gcsHAL_READ_REGISTER
+        {
+            /* Logical address of memory to write data to. */
+            IN gctUINT32            address;
+
+            /* Data read. */
+            OUT gctUINT32           data;
+        }
+        ReadRegisterData;
+
+        /* gcvHAL_WRITE_REGISTER */
+        struct _gcsHAL_WRITE_REGISTER
+        {
+            /* Logical address of memory to write data to. */
+            IN gctUINT32            address;
+
+            /* Data read. */
+            IN gctUINT32            data;
+        }
+        WriteRegisterData;
+
+        /* gcvHAL_GET_PROFILE_SETTING */
+        struct _gcsHAL_GET_PROFILE_SETTING
+        {
+            /* Enable profiling */
+            OUT gctBOOL             enable;
+
+            /* The profile file name */
+            OUT gctCHAR             fileName[gcdMAX_PROFILE_FILE_NAME];
+        }
+        GetProfileSetting;
+
+        /* gcvHAL_SET_PROFILE_SETTING */
+        struct _gcsHAL_SET_PROFILE_SETTING
+        {
+            /* Enable profiling */
+            IN gctBOOL              enable;
+
+            /* The profile file name */
+            IN gctCHAR              fileName[gcdMAX_PROFILE_FILE_NAME];
+        }
+        SetProfileSetting;
+
+        /* gcvHAL_READ_ALL_PROFILE_REGISTERS */
+        struct _gcsHAL_READ_ALL_PROFILE_REGISTERS
+        {
+            /* Data read. */
+            OUT gcsPROFILER_COUNTERS    counters;
+        }
+        RegisterProfileData;
+
+        /* gcvHAL_PROFILE_REGISTERS_2D */
+        struct _gcsHAL_PROFILE_REGISTERS_2D
+        {
+            /* Data read. */
+            OUT gcs2D_PROFILE_PTR       hwProfile2D;
+        }
+        RegisterProfileData2D;
+
+        /* Power management. */
+        /* gcvHAL_SET_POWER_MANAGEMENT_STATE */
+        struct _gcsHAL_SET_POWER_MANAGEMENT
+        {
+            /* Data read. */
+            IN gceCHIPPOWERSTATE        state;
+        }
+        SetPowerManagement;
+
+        /* gcvHAL_QUERY_POWER_MANAGEMENT_STATE */
+        struct _gcsHAL_QUERY_POWER_MANAGEMENT
+        {
+            /* Data read. */
+            OUT gceCHIPPOWERSTATE       state;
+
+            /* Idle query. */
+            OUT gctBOOL                 isIdle;
+        }
+        QueryPowerManagement;
+
+        /* gcvHAL_QUERY_KERNEL_SETTINGS */
+        struct _gcsHAL_QUERY_KERNEL_SETTINGS
+        {
+            /* Settings.*/
+            OUT gcsKERNEL_SETTINGS      settings;
+        }
+        QueryKernelSettings;
+
+        /* gcvHAL_MAP_PHYSICAL */
+        struct _gcsHAL_MAP_PHYSICAL
+        {
+            /* gcvTRUE to map, gcvFALSE to unmap. */
+            IN gctBOOL                  map;
+
+            /* Physical address. */
+            IN OUT gctPHYS_ADDR         physical;
+        }
+        MapPhysical;
+
+        /* gcvHAL_DEBUG */
+        struct _gcsHAL_DEBUG
+        {
+            /* If gcvTRUE, set the debug information. */
+            IN gctBOOL                  set;
+            IN gctUINT32                level;
+            IN gctUINT32                zones;
+            IN gctBOOL                  enable;
+
+            /* Message to print if not empty. */
+            IN gctCHAR                  message[80];
+        }
+        Debug;
+
+        struct _gcsHAL_CACHE
+        {
+            IN gctBOOL                  invalidate;
+            IN gctHANDLE                process;
+            IN gctPOINTER               logical;
+            IN gctSIZE_T                bytes;
+        }
+        Cache;
+    }
+    u;
+}
+gcsHAL_INTERFACE;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __gc_hal_driver_h_ */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gc_hal_engine.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gc_hal_engine.h
@@ -0,0 +1,1593 @@
+/****************************************************************************
+*
+*    Copyright (C) 2005 - 2010 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public License as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+#ifndef __gc_hal_engine_h_
+#define __gc_hal_engine_h_
+
+#include "gc_hal_types.h"
+#include "gc_hal_enum.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/******************************************************************************\
+****************************** Object Declarations *****************************
+\******************************************************************************/
+
+typedef struct _gcoSTREAM *				gcoSTREAM;
+typedef struct _gcoVERTEX *				gcoVERTEX;
+typedef struct _gcoTEXTURE *  			gcoTEXTURE;
+typedef struct _gcoINDEX *				gcoINDEX;
+typedef struct _gcsVERTEX_ATTRIBUTES *	gcsVERTEX_ATTRIBUTES_PTR;
+
+/******************************************************************************\
+********************************* Enumerations *********************************
+\******************************************************************************/
+
+/* Shading format. */
+typedef enum _gceSHADING
+{
+	gcvSHADING_SMOOTH,
+	gcvSHADING_FLAT_D3D,
+	gcvSHADING_FLAT_OPENGL,
+}
+gceSHADING;
+
+/* Culling modes. */
+typedef enum _gceCULL
+{
+	gcvCULL_NONE,
+	gcvCULL_CCW,
+	gcvCULL_CW,
+}
+gceCULL;
+
+/* Fill modes. */
+typedef enum _gceFILL
+{
+	gcvFILL_POINT,
+	gcvFILL_WIRE_FRAME,
+	gcvFILL_SOLID,
+}
+gceFILL;
+
+/* Compare modes. */
+typedef enum _gceCOMPARE
+{
+	gcvCOMPARE_NEVER,
+	gcvCOMPARE_NOT_EQUAL,
+	gcvCOMPARE_LESS,
+	gcvCOMPARE_LESS_OR_EQUAL,
+	gcvCOMPARE_EQUAL,
+	gcvCOMPARE_GREATER,
+	gcvCOMPARE_GREATER_OR_EQUAL,
+	gcvCOMPARE_ALWAYS,
+}
+gceCOMPARE;
+
+/* Stencil modes. */
+typedef enum _gceSTENCIL_MODE
+{
+	gcvSTENCIL_NONE,
+	gcvSTENCIL_SINGLE_SIDED,
+	gcvSTENCIL_DOUBLE_SIDED,
+}
+gceSTENCIL_MODE;
+
+/* Stencil operations. */
+typedef enum _gceSTENCIL_OPERATION
+{
+	gcvSTENCIL_KEEP,
+	gcvSTENCIL_REPLACE,
+	gcvSTENCIL_ZERO,
+	gcvSTENCIL_INVERT,
+	gcvSTENCIL_INCREMENT,
+	gcvSTENCIL_DECREMENT,
+	gcvSTENCIL_INCREMENT_SATURATE,
+	gcvSTENCIL_DECREMENT_SATURATE,
+}
+gceSTENCIL_OPERATION;
+
+/* Stencil selection. */
+typedef enum _gceSTENCIL_WHERE
+{
+	gcvSTENCIL_FRONT,
+	gcvSTENCIL_BACK,
+}
+gceSTENCIL_WHERE;
+
+/* Texture addressing selection. */
+typedef enum _gceTEXTURE_WHICH
+{
+	gcvTEXTURE_S,
+	gcvTEXTURE_T,
+	gcvTEXTURE_R,
+}
+gceTEXTURE_WHICH;
+
+/* Texture addressing modes. */
+typedef enum _gceTEXTURE_ADDRESSING
+{
+	gcvTEXTURE_WRAP,
+	gcvTEXTURE_CLAMP,
+	gcvTEXTURE_BORDER,
+	gcvTEXTURE_MIRROR,
+	gcvTEXTURE_MIRROR_ONCE,
+}
+gceTEXTURE_ADDRESSING;
+
+/* Texture filters. */
+typedef enum _gceTEXTURE_FILTER
+{
+	gcvTEXTURE_NONE,
+	gcvTEXTURE_POINT,
+	gcvTEXTURE_LINEAR,
+	gcvTEXTURE_ANISOTROPIC,
+}
+gceTEXTURE_FILTER;
+
+/* Primitive types. */
+typedef enum _gcePRIMITIVE
+{
+	gcvPRIMITIVE_POINT_LIST,
+	gcvPRIMITIVE_LINE_LIST,
+	gcvPRIMITIVE_LINE_STRIP,
+	gcvPRIMITIVE_LINE_LOOP,
+	gcvPRIMITIVE_TRIANGLE_LIST,
+	gcvPRIMITIVE_TRIANGLE_STRIP,
+	gcvPRIMITIVE_TRIANGLE_FAN,
+}
+gcePRIMITIVE;
+
+/* Index types. */
+typedef enum _gceINDEX_TYPE
+{
+	gcvINDEX_8,
+	gcvINDEX_16,
+	gcvINDEX_32,
+}
+gceINDEX_TYPE;
+
+/******************************************************************************\
+********************************* gcoHAL Object *********************************
+\******************************************************************************/
+
+/* Query the target capabilities. */
+gceSTATUS
+gcoHAL_QueryTargetCaps(
+	IN gcoHAL Hal,
+	OUT gctUINT * MaxWidth,
+	OUT gctUINT * MaxHeight,
+	OUT gctUINT * MultiTargetCount,
+	OUT gctUINT * MaxSamples
+	);
+
+gceSTATUS
+gcoHAL_SetDepthOnly(
+	IN gcoHAL Hal,
+	IN gctBOOL Enable
+	);
+
+gceSTATUS
+gcoHAL_QueryShaderCaps(
+	IN gcoHAL Hal,
+	OUT gctUINT * VertexUniforms,
+	OUT gctUINT * FragmentUniforms,
+	OUT gctUINT * Varyings
+	);
+
+gceSTATUS
+gcoHAL_QueryTextureCaps(
+	IN gcoHAL Hal,
+	OUT gctUINT * MaxWidth,
+	OUT gctUINT * MaxHeight,
+	OUT gctUINT * MaxDepth,
+	OUT gctBOOL * Cubic,
+	OUT gctBOOL * NonPowerOfTwo,
+	OUT gctUINT * VertexSamplers,
+	OUT gctUINT * PixelSamplers
+	);
+
+gceSTATUS
+gcoHAL_QueryStreamCaps(
+	IN gcoHAL Hal,
+	OUT gctUINT32 * MaxAttributes,
+	OUT gctUINT32 * MaxStreamSize,
+	OUT gctUINT32 * NumberOfStreams,
+	OUT gctUINT32 * Alignment
+	);
+
+/******************************************************************************\
+********************************* gcoSURF Object ********************************
+\******************************************************************************/
+
+/*----------------------------------------------------------------------------*/
+/*--------------------------------- gcoSURF 3D --------------------------------*/
+
+/* Copy surface. */
+gceSTATUS
+gcoSURF_Copy(
+	IN gcoSURF Surface,
+	IN gcoSURF Source
+	);
+
+/* Clear surface. */
+gceSTATUS
+gcoSURF_Clear(
+	IN gcoSURF Surface,
+	IN gctUINT Flags
+	);
+
+/* Set number of samples for a gcoSURF object. */
+gceSTATUS
+gcoSURF_SetSamples(
+	IN gcoSURF Surface,
+	IN gctUINT Samples
+	);
+
+/* Get the number of samples per pixel. */
+gceSTATUS
+gcoSURF_GetSamples(
+	IN gcoSURF Surface,
+	OUT gctUINT_PTR Samples
+	);
+
+/* Clear rectangular surface. */
+gceSTATUS
+gcoSURF_ClearRect(
+	IN gcoSURF Surface,
+	IN gctINT Left,
+	IN gctINT Top,
+	IN gctINT Right,
+	IN gctINT Bottom,
+	IN gctUINT Flags
+	);
+
+/* TO BE REMOVED */
+#if 1
+	gceSTATUS
+	depr_gcoSURF_Resolve(
+		IN gcoSURF SrcSurface,
+		IN gcoSURF DestSurface,
+		IN gctUINT32 DestAddress,
+		IN gctPOINTER DestBits,
+		IN gctINT DestStride,
+		IN gceSURF_TYPE DestType,
+		IN gceSURF_FORMAT DestFormat,
+		IN gctUINT DestWidth,
+		IN gctUINT DestHeight
+		);
+
+	gceSTATUS
+	depr_gcoSURF_ResolveRect(
+		IN gcoSURF SrcSurface,
+		IN gcoSURF DestSurface,
+		IN gctUINT32 DestAddress,
+		IN gctPOINTER DestBits,
+		IN gctINT DestStride,
+		IN gceSURF_TYPE DestType,
+		IN gceSURF_FORMAT DestFormat,
+		IN gctUINT DestWidth,
+		IN gctUINT DestHeight,
+		IN gcsPOINT_PTR SrcOrigin,
+		IN gcsPOINT_PTR DestOrigin,
+		IN gcsPOINT_PTR RectSize
+		);
+#endif
+
+/* Resample surface. */
+gceSTATUS
+gcoSURF_Resample(
+	IN gcoSURF SrcSurface,
+	IN gcoSURF DestSurface
+	);
+
+/* Resolve surface. */
+gceSTATUS
+gcoSURF_Resolve(
+	IN gcoSURF SrcSurface,
+	IN gcoSURF DestSurface
+	);
+
+/* Resolve rectangular area of a surface. */
+gceSTATUS
+gcoSURF_ResolveRect(
+	IN gcoSURF SrcSurface,
+	IN gcoSURF DestSurface,
+	IN gcsPOINT_PTR SrcOrigin,
+	IN gcsPOINT_PTR DestOrigin,
+	IN gcsPOINT_PTR RectSize
+	);
+
+/* Set surface resolvability. */
+gceSTATUS
+gcoSURF_SetResolvability(
+	IN gcoSURF Surface,
+	IN gctBOOL Resolvable
+	);
+
+/******************************************************************************\
+******************************** gcoINDEX Object *******************************
+\******************************************************************************/
+
+/* Construct a new gcoINDEX object. */
+gceSTATUS
+gcoINDEX_Construct(
+	IN gcoHAL Hal,
+	OUT gcoINDEX * Index
+	);
+
+/* Destroy a gcoINDEX object. */
+gceSTATUS
+gcoINDEX_Destroy(
+	IN gcoINDEX Index
+	);
+
+/* Lock index in memory. */
+gceSTATUS
+gcoINDEX_Lock(
+	IN gcoINDEX Index,
+	OUT gctUINT32 * Address,
+	OUT gctPOINTER * Memory
+	);
+
+/* Unlock index that was previously locked with gcoINDEX_Lock. */
+gceSTATUS
+gcoINDEX_Unlock(
+	IN gcoINDEX Index
+	);
+
+/* Upload index data into the memory. */
+gceSTATUS
+gcoINDEX_Load(
+	IN gcoINDEX Index,
+	IN gceINDEX_TYPE IndexType,
+	IN gctUINT32 IndexCount,
+	IN gctPOINTER IndexBuffer
+	);
+
+/* Bind an index object to the hardware. */
+gceSTATUS
+gcoINDEX_Bind(
+	IN gcoINDEX Index,
+	IN gceINDEX_TYPE Type
+	);
+
+/* Bind an index object to the hardware. */
+gceSTATUS
+gcoINDEX_BindOffset(
+	IN gcoINDEX Index,
+	IN gceINDEX_TYPE Type,
+	IN gctUINT32 Offset
+	);
+
+/* Free existing index buffer. */
+gceSTATUS
+gcoINDEX_Free(
+	IN gcoINDEX Index
+	);
+
+/* Upload data into an index buffer. */
+gceSTATUS
+gcoINDEX_Upload(
+	IN gcoINDEX Index,
+	IN gctCONST_POINTER Buffer,
+	IN gctSIZE_T Bytes
+	);
+
+/* Upload data into an index buffer starting at an offset. */
+gceSTATUS
+gcoINDEX_UploadOffset(
+	IN gcoINDEX Index,
+	IN gctUINT32 Offset,
+	IN gctCONST_POINTER Buffer,
+	IN gctSIZE_T Bytes
+	);
+
+/* Query the index capabilities. */
+gceSTATUS
+gcoINDEX_QueryCaps(
+	OUT gctBOOL * Index8,
+	OUT gctBOOL * Index16,
+	OUT gctBOOL * Index32,
+	OUT gctUINT * MaxIndex
+	);
+
+gceSTATUS
+gcoIndex_CopyFakeIndex(
+	IN gcoINDEX      index,
+	IN gctUINT8_PTR  logic,
+	IN gctUINT32     physical,
+	IN gctUINT32     offset,
+	IN gctUINT32     size);
+
+/* Determine the index range in the current index buffer. */
+gceSTATUS
+gcoINDEX_GetIndexRange(
+	IN gcoINDEX Index,
+	IN gceINDEX_TYPE Type,
+	IN gctUINT32 Offset,
+	IN gctUINT32 Count,
+	OUT gctUINT32 * MinimumIndex,
+	OUT gctUINT32 * MaximumIndex
+	);
+
+/* Dynamic buffer management. */
+gceSTATUS
+gcoINDEX_SetDynamic(
+	IN gcoINDEX Index,
+	IN gctSIZE_T Bytes,
+	IN gctUINT Buffers
+	);
+
+gceSTATUS
+gcoINDEX_UploadDynamic(
+	IN gcoINDEX Index,
+	IN gctCONST_POINTER Data,
+	IN gctSIZE_T Bytes
+	);
+
+/******************************************************************************\
+********************************** gco3D Object *********************************
+\******************************************************************************/
+
+/* Clear flags. */
+typedef enum _gceCLEAR
+{
+	gcvCLEAR_COLOR				= 0x1,
+	gcvCLEAR_DEPTH				= 0x2,
+	gcvCLEAR_STENCIL			= 0x4,
+	gcvCLEAR_HZ					= 0x8,
+	gcvCLEAR_HAS_VAA			= 0x10,
+}
+gceCLEAR;
+
+/* Blending targets. */
+typedef enum _gceBLEND_UNIT
+{
+	gcvBLEND_SOURCE,
+	gcvBLEND_TARGET,
+}
+gceBLEND_UNIT;
+
+/* Construct a new gco3D object. */
+gceSTATUS
+gco3D_Construct(
+	IN gcoHAL Hal,
+	OUT gco3D * Engine
+	);
+
+/* Destroy an gco3D object. */
+gceSTATUS
+gco3D_Destroy(
+	IN gco3D Engine
+	);
+
+/* Set 3D API type. */
+gceSTATUS
+gco3D_SetAPI(
+	IN gco3D Engine,
+	IN gceAPI ApiType
+	);
+
+/* Set render target. */
+gceSTATUS
+gco3D_SetTarget(
+	IN gco3D Engine,
+	IN gcoSURF Surface
+	);
+
+/* Unset render target. */
+gceSTATUS
+gco3D_UnsetTarget(
+	IN gco3D Engine,
+	IN gcoSURF Surface
+	);
+
+/* Set depth buffer. */
+gceSTATUS
+gco3D_SetDepth(
+	IN gco3D Engine,
+	IN gcoSURF Surface
+	);
+
+/* Unset depth buffer. */
+gceSTATUS
+gco3D_UnsetDepth(
+	IN gco3D Engine,
+	IN gcoSURF Surface
+	);
+
+/* Set viewport. */
+gceSTATUS
+gco3D_SetViewport(
+	IN gco3D Engine,
+	IN gctINT32 Left,
+	IN gctINT32 Top,
+	IN gctINT32 Right,
+	IN gctINT32 Bottom
+	);
+
+/* Set scissors. */
+gceSTATUS
+gco3D_SetScissors(
+	IN gco3D Engine,
+	IN gctINT32 Left,
+	IN gctINT32 Top,
+	IN gctINT32 Right,
+	IN gctINT32 Bottom
+	);
+
+/* Set clear color. */
+gceSTATUS
+gco3D_SetClearColor(
+	IN gco3D Engine,
+	IN gctUINT8 Red,
+	IN gctUINT8 Green,
+	IN gctUINT8 Blue,
+	IN gctUINT8 Alpha
+	);
+
+/* Set fixed point clear color. */
+gceSTATUS
+gco3D_SetClearColorX(
+	IN gco3D Engine,
+	IN gctFIXED_POINT Red,
+	IN gctFIXED_POINT Green,
+	IN gctFIXED_POINT Blue,
+	IN gctFIXED_POINT Alpha
+	);
+
+/* Set floating point clear color. */
+gceSTATUS
+gco3D_SetClearColorF(
+	IN gco3D Engine,
+	IN gctFLOAT Red,
+	IN gctFLOAT Green,
+	IN gctFLOAT Blue,
+	IN gctFLOAT Alpha
+	);
+
+/* Set fixed point clear depth. */
+gceSTATUS
+gco3D_SetClearDepthX(
+	IN gco3D Engine,
+	IN gctFIXED_POINT Depth
+	);
+
+/* Set floating point clear depth. */
+gceSTATUS
+gco3D_SetClearDepthF(
+	IN gco3D Engine,
+	IN gctFLOAT Depth
+	);
+
+/* Set clear stencil. */
+gceSTATUS
+gco3D_SetClearStencil(
+	IN gco3D Engine,
+	IN gctUINT32 Stencil
+	);
+
+/* Clear a Rect sub-surface. */
+gceSTATUS
+gco3D_ClearRect(
+	IN gco3D Engine,
+	IN gctUINT32 Address,
+	IN gctPOINTER Memory,
+	IN gctUINT32 Stride,
+	IN gceSURF_FORMAT Format,
+	IN gctINT32 Left,
+	IN gctINT32 Top,
+	IN gctINT32 Right,
+	IN gctINT32 Bottom,
+	IN gctUINT32 Width,
+	IN gctUINT32 Height,
+	IN gctUINT32 Flags
+	);
+
+/* Clear surface. */
+gceSTATUS
+gco3D_Clear(
+	IN gco3D Engine,
+	IN gctUINT32 Address,
+	IN gctUINT32 Stride,
+	IN gceSURF_FORMAT Format,
+	IN gctUINT32 Width,
+	IN gctUINT32 Height,
+	IN gctUINT32 Flags
+	);
+
+
+/* Clear tile status. */
+gceSTATUS
+gco3D_ClearTileStatus(
+	IN gco3D Engine,
+	IN gcsSURF_INFO_PTR Surface,
+	IN gctUINT32 TileStatusAddress,
+	IN gctUINT32 Flags
+	);
+
+/* Set shading mode. */
+gceSTATUS
+gco3D_SetShading(
+	IN gco3D Engine,
+	IN gceSHADING Shading
+	);
+
+/* Set blending mode. */
+gceSTATUS
+gco3D_EnableBlending(
+	IN gco3D Engine,
+	IN gctBOOL Enable
+	);
+
+/* Set blending function. */
+gceSTATUS
+gco3D_SetBlendFunction(
+	IN gco3D Engine,
+	IN gceBLEND_UNIT Unit,
+	IN gceBLEND_FUNCTION FunctionRGB,
+	IN gceBLEND_FUNCTION FunctionAlpha
+	);
+
+/* Set blending mode. */
+gceSTATUS
+gco3D_SetBlendMode(
+	IN gco3D Engine,
+	IN gceBLEND_MODE ModeRGB,
+	IN gceBLEND_MODE ModeAlpha
+	);
+
+/* Set blending color. */
+gceSTATUS
+gco3D_SetBlendColor(
+	IN gco3D Engine,
+	IN gctUINT Red,
+	IN gctUINT Green,
+	IN gctUINT Blue,
+	IN gctUINT Alpha
+	);
+
+/* Set fixed point blending color. */
+gceSTATUS
+gco3D_SetBlendColorX(
+	IN gco3D Engine,
+	IN gctFIXED_POINT Red,
+	IN gctFIXED_POINT Green,
+	IN gctFIXED_POINT Blue,
+	IN gctFIXED_POINT Alpha
+	);
+
+/* Set floating point blending color. */
+gceSTATUS
+gco3D_SetBlendColorF(
+	IN gco3D Engine,
+	IN gctFLOAT Red,
+	IN gctFLOAT Green,
+	IN gctFLOAT Blue,
+	IN gctFLOAT Alpha
+	);
+
+/* Set culling mode. */
+gceSTATUS
+gco3D_SetCulling(
+	IN gco3D Engine,
+	IN gceCULL Mode
+	);
+
+/* Enable point size */
+gceSTATUS
+gco3D_SetPointSizeEnable(
+	IN gco3D Engine,
+	IN gctBOOL Enable
+	);
+
+/* Set point sprite */
+gceSTATUS
+gco3D_SetPointSprite(
+	IN gco3D Engine,
+	IN gctBOOL Enable
+	);
+
+/* Set fill mode. */
+gceSTATUS
+gco3D_SetFill(
+	IN gco3D Engine,
+	IN gceFILL Mode
+	);
+
+/* Set depth compare mode. */
+gceSTATUS
+gco3D_SetDepthCompare(
+	IN gco3D Engine,
+	IN gceCOMPARE Compare
+	);
+
+/* Enable depth writing. */
+gceSTATUS
+gco3D_EnableDepthWrite(
+	IN gco3D Engine,
+	IN gctBOOL Enable
+	);
+
+/* Set depth mode. */
+gceSTATUS
+gco3D_SetDepthMode(
+	IN gco3D Engine,
+	IN gceDEPTH_MODE Mode
+	);
+
+/* Set depth range. */
+gceSTATUS
+gco3D_SetDepthRangeX(
+	IN gco3D Engine,
+	IN gceDEPTH_MODE Mode,
+	IN gctFIXED_POINT Near,
+	IN gctFIXED_POINT Far
+	);
+
+/* Set depth range. */
+gceSTATUS
+gco3D_SetDepthRangeF(
+	IN gco3D Engine,
+	IN gceDEPTH_MODE Mode,
+	IN gctFLOAT Near,
+	IN gctFLOAT Far
+	);
+
+/* Set last pixel enable */
+gceSTATUS
+gco3D_SetLastPixelEnable(
+	IN gco3D Engine,
+	IN gctBOOL Enable
+	);
+
+/* Set depth Bias and Scale */
+gceSTATUS
+gco3D_SetDepthScaleBiasX(
+	IN gco3D Engine,
+	IN gctFIXED_POINT DepthScale,
+	IN gctFIXED_POINT DepthBias
+	);
+
+gceSTATUS
+gco3D_SetDepthScaleBiasF(
+	IN gco3D Engine,
+	IN gctFLOAT DepthScale,
+	IN gctFLOAT DepthBias
+	);
+
+/* Enable or disable dithering. */
+gceSTATUS
+gco3D_EnableDither(
+	IN gco3D Engine,
+	IN gctBOOL Enable
+	);
+
+/* Set color write enable bits. */
+gceSTATUS
+gco3D_SetColorWrite(
+	IN gco3D Engine,
+	IN gctUINT8 Enable
+	);
+
+/* Enable or disable early depth. */
+gceSTATUS
+gco3D_SetEarlyDepth(
+	IN gco3D Engine,
+	IN gctBOOL Enable
+	);
+
+/* Enable or disable depth-only mode. */
+gceSTATUS
+gco3D_SetDepthOnly(
+	IN gco3D Engine,
+	IN gctBOOL Enable
+	);
+
+/* Set stencil mode. */
+gceSTATUS
+gco3D_SetStencilMode(
+	IN gco3D Engine,
+	IN gceSTENCIL_MODE Mode
+	);
+
+/* Set stencil mask. */
+gceSTATUS
+gco3D_SetStencilMask(
+	IN gco3D Engine,
+	IN gctUINT8 Mask
+	);
+
+/* Set stencil write mask. */
+gceSTATUS
+gco3D_SetStencilWriteMask(
+	IN gco3D Engine,
+	IN gctUINT8 Mask
+	);
+
+/* Set stencil reference. */
+gceSTATUS
+gco3D_SetStencilReference(
+	IN gco3D Engine,
+	IN gctUINT8 Reference
+	);
+
+/* Set stencil compare. */
+gceSTATUS
+gco3D_SetStencilCompare(
+	IN gco3D Engine,
+	IN gceSTENCIL_WHERE Where,
+	IN gceCOMPARE Compare
+	);
+
+/* Set stencil operation on pass. */
+gceSTATUS
+gco3D_SetStencilPass(
+	IN gco3D Engine,
+	IN gceSTENCIL_WHERE Where,
+	IN gceSTENCIL_OPERATION Operation
+	);
+
+/* Set stencil operation on fail. */
+gceSTATUS
+gco3D_SetStencilFail(
+	IN gco3D Engine,
+	IN gceSTENCIL_WHERE Where,
+	IN gceSTENCIL_OPERATION Operation
+	);
+
+/* Set stencil operation on depth fail. */
+gceSTATUS
+gco3D_SetStencilDepthFail(
+	IN gco3D Engine,
+	IN gceSTENCIL_WHERE Where,
+	IN gceSTENCIL_OPERATION Operation
+	);
+
+/* Enable or disable alpha test. */
+gceSTATUS
+gco3D_SetAlphaTest(
+	IN gco3D Engine,
+	IN gctBOOL Enable
+	);
+
+/* Set alpha test compare. */
+gceSTATUS
+gco3D_SetAlphaCompare(
+	IN gco3D Engine,
+	IN gceCOMPARE Compare
+	);
+
+/* Set alpha test reference in unsigned integer. */
+gceSTATUS
+gco3D_SetAlphaReference(
+	IN gco3D Engine,
+	IN gctUINT8 Reference
+	);
+
+/* Set alpha test reference in fixed point. */
+gceSTATUS
+gco3D_SetAlphaReferenceX(
+	IN gco3D Engine,
+	IN gctFIXED_POINT Reference
+	);
+
+/* Set alpha test reference in floating point. */
+gceSTATUS
+gco3D_SetAlphaReferenceF(
+	IN gco3D Engine,
+	IN gctFLOAT Reference
+	);
+
+/* Enable/Disable anti-alias line. */
+gceSTATUS
+gco3D_SetAntiAliasLine(
+	IN gco3D Engine,
+	IN gctBOOL Enable
+	);
+
+/* Set texture slot for anti-alias line. */
+gceSTATUS
+gco3D_SetAALineTexSlot(
+	IN gco3D Engine,
+	IN gctUINT TexSlot
+	);
+
+/* Set anti-alias line width scale. */
+gceSTATUS
+gco3D_SetAALineWidth(
+	IN gco3D Engine,
+	IN gctFLOAT Width
+	);
+
+/* Draw a number of primitives. */
+gceSTATUS
+gco3D_DrawPrimitives(
+	IN gco3D Engine,
+	IN gcePRIMITIVE Type,
+	IN gctINT StartVertex,
+	IN gctSIZE_T PrimitiveCount
+	);
+
+/* Draw a number of primitives using offsets. */
+gceSTATUS
+gco3D_DrawPrimitivesOffset(
+	IN gco3D Engine,
+	IN gcePRIMITIVE Type,
+	IN gctINT32 StartOffset,
+	IN gctSIZE_T PrimitiveCount
+	);
+
+/* Draw a number of indexed primitives. */
+gceSTATUS
+gco3D_DrawIndexedPrimitives(
+	IN gco3D Engine,
+	IN gcePRIMITIVE Type,
+	IN gctINT BaseVertex,
+	IN gctINT StartIndex,
+	IN gctSIZE_T PrimitiveCount
+	);
+
+/* Draw a number of indexed primitives using offsets. */
+gceSTATUS
+gco3D_DrawIndexedPrimitivesOffset(
+	IN gco3D Engine,
+	IN gcePRIMITIVE Type,
+	IN gctINT32 BaseOffset,
+	IN gctINT32 StartOffset,
+	IN gctSIZE_T PrimitiveCount
+	);
+
+/* Enable or disable anti-aliasing. */
+gceSTATUS
+gco3D_SetAntiAlias(
+	IN gco3D Engine,
+	IN gctBOOL Enable
+	);
+
+/* Write data into the command buffer. */
+gceSTATUS
+gco3D_WriteBuffer(
+	IN gco3D Engine,
+	IN gctCONST_POINTER Data,
+	IN gctSIZE_T Bytes,
+	IN gctBOOL Aligned
+	);
+
+/*Send sempahore and stall until sempahore is signalled.*/
+gceSTATUS
+gco3D_Semaphore(
+	IN gco3D Engine,
+	IN gceWHERE From,
+	IN gceWHERE To,
+	IN gceHOW How);
+
+/*Set the subpixels center .*/
+gceSTATUS
+gco3D_SetCentroids(
+	IN gco3D		Engine,
+	IN gctUINT32	Index,
+	IN gctPOINTER	Centroids
+	);
+/*----------------------------------------------------------------------------*/
+/*-------------------------- gco3D Fragment Processor ------------------------*/
+
+/* Set the fragment processor configuration. */
+gceSTATUS
+gco3D_SetFragmentConfiguration(
+	IN gco3D Engine,
+	IN gctBOOL ColorFromStream,
+	IN gctBOOL EnableFog,
+	IN gctBOOL EnableSmoothPoint,
+	IN gctUINT32 ClipPlanes
+	);
+
+/* Enable/disable texture stage operation. */
+gceSTATUS
+gco3D_EnableTextureStage(
+	IN gco3D Engine,
+	IN gctINT Stage,
+	IN gctBOOL Enable
+	);
+
+/* Program the channel enable masks for the color texture function. */
+gceSTATUS
+gco3D_SetTextureColorMask(
+	IN gco3D Engine,
+	IN gctINT Stage,
+	IN gctBOOL ColorEnabled,
+	IN gctBOOL AlphaEnabled
+	);
+
+/* Program the channel enable masks for the alpha texture function. */
+gceSTATUS
+gco3D_SetTextureAlphaMask(
+	IN gco3D Engine,
+	IN gctINT Stage,
+	IN gctBOOL ColorEnabled,
+	IN gctBOOL AlphaEnabled
+	);
+
+/* Program the constant fragment color. */
+gceSTATUS
+gco3D_SetFragmentColorX(
+	IN gco3D Engine,
+	IN gctFIXED_POINT Red,
+	IN gctFIXED_POINT Green,
+	IN gctFIXED_POINT Blue,
+	IN gctFIXED_POINT Alpha
+	);
+
+gceSTATUS
+gco3D_SetFragmentColorF(
+	IN gco3D Engine,
+	IN gctFLOAT Red,
+	IN gctFLOAT Green,
+	IN gctFLOAT Blue,
+	IN gctFLOAT Alpha
+	);
+
+/* Program the constant fog color. */
+gceSTATUS
+gco3D_SetFogColorX(
+	IN gco3D Engine,
+	IN gctFIXED_POINT Red,
+	IN gctFIXED_POINT Green,
+	IN gctFIXED_POINT Blue,
+	IN gctFIXED_POINT Alpha
+	);
+
+gceSTATUS
+gco3D_SetFogColorF(
+	IN gco3D Engine,
+	IN gctFLOAT Red,
+	IN gctFLOAT Green,
+	IN gctFLOAT Blue,
+	IN gctFLOAT Alpha
+	);
+
+/* Program the constant texture color. */
+gceSTATUS
+gco3D_SetTetxureColorX(
+	IN gco3D Engine,
+	IN gctINT Stage,
+	IN gctFIXED_POINT Red,
+	IN gctFIXED_POINT Green,
+	IN gctFIXED_POINT Blue,
+	IN gctFIXED_POINT Alpha
+	);
+
+gceSTATUS
+gco3D_SetTetxureColorF(
+	IN gco3D Engine,
+	IN gctINT Stage,
+	IN gctFLOAT Red,
+	IN gctFLOAT Green,
+	IN gctFLOAT Blue,
+	IN gctFLOAT Alpha
+	);
+
+/* Configure color texture function. */
+gceSTATUS
+gco3D_SetColorTextureFunction(
+	IN gco3D Engine,
+	IN gctINT Stage,
+	IN gceTEXTURE_FUNCTION Function,
+	IN gceTEXTURE_SOURCE Source0,
+	IN gceTEXTURE_CHANNEL Channel0,
+	IN gceTEXTURE_SOURCE Source1,
+	IN gceTEXTURE_CHANNEL Channel1,
+	IN gceTEXTURE_SOURCE Source2,
+	IN gceTEXTURE_CHANNEL Channel2,
+	IN gctINT Scale
+	);
+
+/* Configure alpha texture function. */
+gceSTATUS
+gco3D_SetAlphaTextureFunction(
+	IN gco3D Engine,
+	IN gctINT Stage,
+	IN gceTEXTURE_FUNCTION Function,
+	IN gceTEXTURE_SOURCE Source0,
+	IN gceTEXTURE_CHANNEL Channel0,
+	IN gceTEXTURE_SOURCE Source1,
+	IN gceTEXTURE_CHANNEL Channel1,
+	IN gceTEXTURE_SOURCE Source2,
+	IN gceTEXTURE_CHANNEL Channel2,
+	IN gctINT Scale
+	);
+
+
+/******************************************************************************\
+******************************* gcoTEXTURE Object *******************************
+\******************************************************************************/
+
+/* Cube faces. */
+typedef enum _gceTEXTURE_FACE
+{
+	gcvFACE_NONE,
+	gcvFACE_POSITIVE_X,
+	gcvFACE_NEGATIVE_X,
+	gcvFACE_POSITIVE_Y,
+	gcvFACE_NEGATIVE_Y,
+	gcvFACE_POSITIVE_Z,
+	gcvFACE_NEGATIVE_Z,
+}
+gceTEXTURE_FACE;
+
+/* Construct a new gcoTEXTURE object. */
+gceSTATUS
+gcoTEXTURE_Construct(
+	IN gcoHAL Hal,
+	OUT gcoTEXTURE * Texture
+	);
+
+/* Construct a new sized gcoTEXTURE object. */
+gceSTATUS
+gcoTEXTURE_ConstructSized(
+	IN gcoHAL Hal,
+	IN gceSURF_FORMAT Format,
+	IN gctUINT Width,
+	IN gctUINT Height,
+	IN gctUINT Depth,
+	IN gctUINT Faces,
+	IN gctUINT MipMapCount,
+	IN gcePOOL Pool,
+	OUT gcoTEXTURE * Texture
+	);
+
+/* Destroy an gcoTEXTURE object. */
+gceSTATUS
+gcoTEXTURE_Destroy(
+	IN gcoTEXTURE Texture
+	);
+
+/* Upload data to an gcoTEXTURE object. */
+gceSTATUS
+gcoTEXTURE_Upload(
+	IN gcoTEXTURE Texture,
+	IN gceTEXTURE_FACE Face,
+	IN gctUINT Width,
+	IN gctUINT Height,
+	IN gctUINT Slice,
+	IN gctCONST_POINTER Memory,
+	IN gctINT Stride,
+	IN gceSURF_FORMAT Format
+	);
+
+/* Upload data to an gcoTEXTURE object. */
+gceSTATUS
+gcoTEXTURE_UploadSub(
+	IN gcoTEXTURE Texture,
+	IN gctUINT MipMap,
+	IN gceTEXTURE_FACE Face,
+	IN gctUINT X,
+	IN gctUINT Y,
+	IN gctUINT Width,
+	IN gctUINT Height,
+	IN gctUINT Slice,
+	IN gctCONST_POINTER Memory,
+	IN gctINT Stride,
+	IN gceSURF_FORMAT Format
+	);
+
+/* Upload compressed data to an gcoTEXTURE object. */
+gceSTATUS
+gcoTEXTURE_UploadCompressed(
+	IN gcoTEXTURE Texture,
+	IN gceTEXTURE_FACE Face,
+	IN gctUINT Width,
+	IN gctUINT Height,
+	IN gctUINT Slice,
+	IN gctCONST_POINTER Memory,
+	IN gctSIZE_T Bytes
+	);
+
+/* Get gcoSURF object for a mipmap level. */
+gceSTATUS
+gcoTEXTURE_GetMipMap(
+	IN gcoTEXTURE Texture,
+	IN gctUINT MipMap,
+	OUT gcoSURF * Surface
+	);
+
+/* Get gcoSURF object for a mipmap level and face offset. */
+gceSTATUS
+gcoTEXTURE_GetMipMapFace(
+	IN gcoTEXTURE Texture,
+	IN gctUINT MipMap,
+	IN gceTEXTURE_FACE Face,
+	OUT gcoSURF * Surface,
+	OUT gctUINT32_PTR Offset
+	);
+
+gceSTATUS
+gcoTEXTURE_AddMipMap(
+	IN gcoTEXTURE Texture,
+	IN gctINT Level,
+	IN gceSURF_FORMAT Format,
+	IN gctUINT Width,
+	IN gctUINT Height,
+	IN gctUINT Depth,
+	IN gctUINT Faces,
+	IN gcePOOL Pool,
+	OUT gcoSURF * Surface
+	);
+
+gceSTATUS
+gcoTEXTURE_AddMipMapFromClient(
+	IN gcoTEXTURE Texture,
+	IN gctINT     Level,
+	IN gcoSURF    Surface
+	);
+
+gceSTATUS
+gcoTEXTURE_AddMipMapFromSurface(
+	IN gcoTEXTURE Texture,
+	IN gctINT     Level,
+	IN gcoSURF    Surface
+	);
+
+gceSTATUS
+gcoTEXTURE_SetEndianHint(
+	IN gcoTEXTURE Texture,
+	IN gceENDIAN_HINT EndianHint
+	);
+
+gceSTATUS
+gcoTEXTURE_SetAddressingMode(
+	IN gcoTEXTURE Texture,
+	IN gceTEXTURE_WHICH Which,
+	IN gceTEXTURE_ADDRESSING Mode
+	);
+
+gceSTATUS
+gcoTEXTURE_SetBorderColor(
+	IN gcoTEXTURE Texture,
+	IN gctUINT Red,
+	IN gctUINT Green,
+	IN gctUINT Blue,
+	IN gctUINT Alpha
+	);
+
+gceSTATUS
+gcoTEXTURE_SetBorderColorX(
+	IN gcoTEXTURE Texture,
+	IN gctFIXED_POINT Red,
+	IN gctFIXED_POINT Green,
+	IN gctFIXED_POINT Blue,
+	IN gctFIXED_POINT Alpha
+	);
+
+gceSTATUS
+gcoTEXTURE_SetBorderColorF(
+	IN gcoTEXTURE Texture,
+	IN gctFLOAT Red,
+	IN gctFLOAT Green,
+	IN gctFLOAT Blue,
+	IN gctFLOAT Alpha
+	);
+
+gceSTATUS
+gcoTEXTURE_SetMinFilter(
+	IN gcoTEXTURE Texture,
+	IN gceTEXTURE_FILTER Filter
+	);
+
+gceSTATUS
+gcoTEXTURE_SetMagFilter(
+	IN gcoTEXTURE Texture,
+	IN gceTEXTURE_FILTER Filter
+	);
+
+gceSTATUS
+gcoTEXTURE_SetMipFilter(
+	IN gcoTEXTURE Texture,
+	IN gceTEXTURE_FILTER Filter
+	);
+
+gceSTATUS
+gcoTEXTURE_SetLODBiasX(
+	IN gcoTEXTURE Texture,
+	IN gctFIXED_POINT Bias
+	);
+
+gceSTATUS
+gcoTEXTURE_SetLODBiasF(
+	IN gcoTEXTURE Texture,
+	IN gctFLOAT Bias
+	);
+
+gceSTATUS
+gcoTEXTURE_SetLODMinX(
+	IN gcoTEXTURE Texture,
+	IN gctFIXED_POINT LevelOfDetail
+	);
+
+gceSTATUS
+gcoTEXTURE_SetLODMinF(
+	IN gcoTEXTURE Texture,
+	IN gctFLOAT LevelOfDetail
+	);
+
+gceSTATUS
+gcoTEXTURE_SetLODMaxX(
+	IN gcoTEXTURE Texture,
+	IN gctFIXED_POINT LevelOfDetail
+	);
+
+gceSTATUS
+gcoTEXTURE_SetLODMaxF(
+	IN gcoTEXTURE Texture,
+	IN gctFLOAT LevelOfDetail
+	);
+
+gceSTATUS
+gcoTEXTURE_Bind(
+	IN gcoTEXTURE Texture,
+	IN gctINT Sampler
+	);
+
+gceSTATUS
+gcoTEXTURE_Disable(
+	IN gcoHAL Hal,
+	IN gctINT Sampler
+	);
+
+gceSTATUS
+gcoTEXTURE_Flush(
+	IN gcoTEXTURE Texture
+	);
+
+gceSTATUS
+gcoTEXTURE_QueryCaps(
+	OUT gctUINT * MaxWidth,
+	OUT gctUINT * MaxHeight,
+	OUT gctUINT * MaxDepth,
+	OUT gctBOOL * Cubic,
+	OUT gctBOOL * NonPowerOfTwo,
+	OUT gctUINT * VertexSamplers,
+	OUT gctUINT * PixelSamplers
+	);
+
+gceSTATUS
+gcoTEXTURE_GetClosestFormat(
+	IN gcoHAL Hal,
+	IN gceSURF_FORMAT InFormat,
+	OUT gceSURF_FORMAT* OutFormat
+	);
+
+gceSTATUS
+gcoTEXTURE_RenderIntoMipMap(
+	IN gcoTEXTURE Texture,
+	IN gctINT Level
+	);
+
+gceSTATUS
+gcoTEXTURE_IsRenderable(
+	IN gcoTEXTURE Texture,
+	IN gctUINT Level
+	);
+
+gceSTATUS
+gcoTEXTURE_IsComplete(
+	IN gcoTEXTURE Texture,
+	IN gctINT MaxLevel
+	);
+
+/******************************************************************************\
+******************************* gcoSTREAM Object ******************************
+\******************************************************************************/
+
+typedef enum _gceVERTEX_FORMAT
+{
+	gcvVERTEX_BYTE,
+	gcvVERTEX_UNSIGNED_BYTE,
+	gcvVERTEX_SHORT,
+	gcvVERTEX_UNSIGNED_SHORT,
+	gcvVERTEX_INT,
+	gcvVERTEX_UNSIGNED_INT,
+	gcvVERTEX_FIXED,
+	gcvVERTEX_HALF,
+	gcvVERTEX_FLOAT,
+}
+gceVERTEX_FORMAT;
+
+gceSTATUS
+gcoSTREAM_Construct(
+	IN gcoHAL Hal,
+	OUT gcoSTREAM * Stream
+	);
+
+gceSTATUS
+gcoSTREAM_Destroy(
+	IN gcoSTREAM Stream
+	);
+
+gceSTATUS
+gcoSTREAM_Upload(
+	IN gcoSTREAM Stream,
+	IN gctCONST_POINTER Buffer,
+	IN gctUINT32 Offset,
+	IN gctSIZE_T Bytes,
+	IN gctBOOL Dynamic
+	);
+
+gceSTATUS
+gcoSTREAM_SetStride(
+	IN gcoSTREAM Stream,
+	IN gctUINT32 Stride
+	);
+
+gceSTATUS
+gcoSTREAM_Lock(
+	IN gcoSTREAM Stream,
+	OUT gctPOINTER * Logical,
+	OUT gctUINT32 * Physical
+	);
+
+gceSTATUS
+gcoSTREAM_Unlock(
+	IN gcoSTREAM Stream);
+
+gceSTATUS
+gcoSTREAM_Reserve(
+	IN gcoSTREAM Stream,
+	IN gctSIZE_T Bytes,
+	IN gctBOOL   bSystemCache
+	);
+
+gceSTATUS
+gcoSTREAM_GetSystemCache(
+	IN gcoSTREAM    Stream,
+	OUT gctPOINTER*  pSystemCache);
+
+gceSTATUS
+gcoSTREAM_GetStreamSize(
+	IN gcoSTREAM    Stream,
+	OUT gctUINT32*  pSize);
+
+gceSTATUS
+gcoSTREAM_ConstructReserveMemory(
+    IN gcoHAL Hal);
+
+gceSTATUS
+gcoSTREAM_DestroyReserveMemory(
+    IN gcoHAL Hal);
+
+gceSTATUS
+gcoSTREAM_GetReserveMemory(
+    IN gcoHAL Hal,
+    IN gctUINT32 requestSize,
+    IN gcoSTREAM stream,
+    IN gcoINDEX index
+    );
+
+gctBOOL
+gcoSTREAM_SignalReserveMemory(
+    IN gcoHAL Hal);
+
+gceSTATUS
+gcoSTREAM_Flush(
+	IN gcoSTREAM Stream
+	);
+
+/* Dynamic buffer API. */
+gceSTATUS
+gcoSTREAM_SetDynamic(
+	IN gcoSTREAM Stream,
+	IN gctSIZE_T Bytes,
+	IN gctUINT Buffers
+	);
+
+typedef struct _gcsSTREAM_INFO
+{
+	gctUINT				index;
+	gceVERTEX_FORMAT	format;
+	gctBOOL				normalized;
+	gctUINT				components;
+	gctSIZE_T			size;
+	gctCONST_POINTER	data;
+	gctUINT				stride;
+}
+gcsSTREAM_INFO, * gcsSTREAM_INFO_PTR;
+
+gceSTATUS
+gcoSTREAM_UploadDynamic(
+	IN gcoSTREAM Stream,
+	IN gctUINT VertexCount,
+	IN gctUINT InfoCount,
+	IN gcsSTREAM_INFO_PTR Info,
+	IN gcoVERTEX Vertex
+	);
+
+/******************************************************************************\
+******************************** gcoVERTEX Object ******************************
+\******************************************************************************/
+
+typedef struct _gcsVERTEX_ATTRIBUTES
+{
+	gceVERTEX_FORMAT			format;
+	gctBOOL						normalized;
+	gctUINT32					components;
+	gctSIZE_T					size;
+	gctUINT32					stream;
+	gctUINT32					offset;
+	gctUINT32					stride;
+}
+gcsVERTEX_ATTRIBUTES;
+
+gceSTATUS
+gcoVERTEX_Construct(
+	IN gcoHAL Hal,
+	OUT gcoVERTEX * Vertex
+	);
+
+gceSTATUS
+gcoVERTEX_Destroy(
+	IN gcoVERTEX Vertex
+	);
+
+gceSTATUS
+gcoVERTEX_Reset(
+	IN gcoVERTEX Vertex
+	);
+
+gceSTATUS
+gcoVERTEX_EnableAttribute(
+	IN gcoVERTEX Vertex,
+	IN gctUINT32 Index,
+	IN gceVERTEX_FORMAT Format,
+	IN gctBOOL Normalized,
+	IN gctUINT32 Components,
+	IN gcoSTREAM Stream,
+	IN gctUINT32 Offset,
+	IN gctUINT32 Stride
+	);
+
+gceSTATUS
+gcoVERTEX_DisableAttribute(
+	IN gcoVERTEX Vertex,
+	IN gctUINT32 Index
+	);
+
+gceSTATUS
+gcoVERTEX_Bind_fast(
+	IN gcoVERTEX Vertex,
+	IN gctUINT32 attributeCount
+	);
+
+gceSTATUS
+gcoVERTEX_Bind(
+	IN gcoVERTEX Vertex
+	);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __gc_hal_engine_h_ */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gc_hal_types.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gc_hal_types.h
@@ -0,0 +1,543 @@
+/****************************************************************************
+*
+*    Copyright (C) 2005 - 2010 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public License as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+#ifndef __gc_hal_types_h_
+#define __gc_hal_types_h_
+
+#include "gc_hal_options.h"
+
+#ifdef _WIN32
+#pragma warning(disable:4127)	/* Conditional expression is constant (do { }
+								** while(0)). */
+#pragma warning(disable:4100)	/* Unreferenced formal parameter. */
+#pragma warning(disable:4204)	/* Non-constant aggregate initializer (C99). */
+#pragma warning(disable:4131)	/* Uses old-style declarator (for Bison and
+								** Flex generated files). */
+#pragma warning(disable:4206)	/* Translation unit is empty. */
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/******************************************************************************\
+**	Platform macros.
+*/
+
+#if defined(__GNUC__)
+#	define gcdHAS_ELLIPSES		1		/* GCC always has it. */
+#elif defined(__STDC_VERSION__) && (__STDC_VERSION__ >= 199901L)
+#	define gcdHAS_ELLIPSES		1		/* C99 has it. */
+#elif defined(_MSC_VER) && (_MSC_VER >= 1500)
+#	define gcdHAS_ELLIPSES		1		/* MSVC 2007+ has it. */
+#elif defined(UNDER_CE)
+#	define gcdHAS_ELLIPSES		0		/* Windows CE doesn't have it. */
+#else
+#   error "gcdHAS_ELLIPSES: Platform could not be determined"
+#endif
+
+/******************************************************************************\
+************************************ Keyword ***********************************
+\******************************************************************************/
+
+#if (defined(__STDC_VERSION__) && (__STDC_VERSION__ >= 199901L))
+#	define gcmINLINE			inline		/* C99 keyword. */
+#elif defined(__GNUC__)
+#	define gcmINLINE			__inline__	/* GNU keyword. */
+#elif defined(_MSC_VER) || defined(UNDER_CE)
+#	define gcmINLINE			__inline	/* Internal keyword. */
+#else
+#   error "gcmINLINE: Platform could not be determined"
+#endif
+
+#ifndef gcdDEBUG
+#	if (defined(DBG) && DBG) || defined(DEBUG) || defined(_DEBUG)
+#		define gcdDEBUG			1
+#	else
+#		define gcdDEBUG			0
+#	endif
+#endif
+
+#ifdef _USRDLL
+#	ifdef _MSC_VER
+#		ifdef HAL_EXPORTS
+#			define HALAPI		__declspec(dllexport)
+#		else
+#			define HALAPI		__declspec(dllimport)
+#		endif
+#		define HALDECL			__cdecl
+#	else
+#		ifdef HAL_EXPORTS
+#			define HALAPI
+#		else
+#			define HALAPI		extern
+#		endif
+#	endif
+#else
+#	define HALAPI
+#	define HALDECL
+#endif
+
+/******************************************************************************\
+********************************** Common Types ********************************
+\******************************************************************************/
+
+#define gcvFALSE				0
+#define gcvTRUE					1
+
+#define gcvINFINITE				((gctUINT32) ~0)
+
+typedef int						gctBOOL;
+typedef gctBOOL *				gctBOOL_PTR;
+
+typedef int						gctINT;
+typedef signed char				gctINT8;
+typedef signed short			gctINT16;
+typedef signed int				gctINT32;
+typedef signed long long		gctINT64;
+
+typedef gctINT *				gctINT_PTR;
+typedef gctINT8 *				gctINT8_PTR;
+typedef gctINT16 *				gctINT16_PTR;
+typedef gctINT32 *				gctINT32_PTR;
+typedef gctINT64 *				gctINT64_PTR;
+
+typedef unsigned int			gctUINT;
+typedef unsigned char			gctUINT8;
+typedef unsigned short			gctUINT16;
+typedef unsigned int			gctUINT32;
+typedef unsigned long long		gctUINT64;
+
+typedef gctUINT *				gctUINT_PTR;
+typedef gctUINT8 *				gctUINT8_PTR;
+typedef gctUINT16 *				gctUINT16_PTR;
+typedef gctUINT32 *				gctUINT32_PTR;
+typedef gctUINT64 *				gctUINT64_PTR;
+
+typedef unsigned long			gctSIZE_T;
+typedef gctSIZE_T *				gctSIZE_T_PTR;
+
+#ifdef __cplusplus
+#	define gcvNULL				0
+#else
+#	define gcvNULL				((void *) 0)
+#endif
+
+typedef float					gctFLOAT;
+typedef signed int				gctFIXED_POINT;
+typedef float *					gctFLOAT_PTR;
+
+typedef void *					gctPHYS_ADDR;
+typedef void *					gctHANDLE;
+typedef void *					gctFILE;
+typedef void *					gctSIGNAL;
+typedef void *					gctWINDOW;
+typedef void *					gctIMAGE;
+
+typedef void *					gctPOINTER;
+typedef const void *			gctCONST_POINTER;
+
+typedef char					gctCHAR;
+typedef char *					gctSTRING;
+typedef const char *			gctCONST_STRING;
+
+typedef struct _gcsCOUNT_STRING
+{
+	gctSIZE_T					Length;
+	gctCONST_STRING				String;
+}
+gcsCOUNT_STRING;
+
+/* Fixed point constants. */
+#define gcvZERO_X				((gctFIXED_POINT) 0x00000000)
+#define gcvHALF_X				((gctFIXED_POINT) 0x00008000)
+#define gcvONE_X				((gctFIXED_POINT) 0x00010000)
+#define gcvNEGONE_X				((gctFIXED_POINT) 0xFFFF0000)
+#define gcvTWO_X				((gctFIXED_POINT) 0x00020000)
+
+/******************************************************************************\
+******************************* Fixed Point Math *******************************
+\******************************************************************************/
+
+#define gcmXMultiply(x1, x2) \
+	(gctFIXED_POINT) (((gctINT64) (x1) * (x2)) >> 16)
+
+#define gcmXDivide(x1, x2) \
+	(gctFIXED_POINT) ((((gctINT64) (x1)) << 16) / (x2))
+
+#define gcmXMultiplyDivide(x1, x2, x3) \
+	(gctFIXED_POINT) ((gctINT64) (x1) * (x2) / (x3))
+
+/* 2D Engine profile. */
+struct gcs2D_PROFILE
+{
+	/* Cycle count.
+	   32bit counter incremented every 2D clock cycle.
+	   Wraps back to 0 when the counter overflows.
+	*/
+	gctUINT32 cycleCount;
+
+	/* Pixels rendered by the 2D engine.
+	   Resets to 0 every time it is read. */
+	gctUINT32 pixelsRendered;
+};
+
+
+/* Macro to combine four characters into a Charcater Code. */
+#define gcmCC(c1, c2, c3, c4) \
+( \
+	(char) (c1) \
+	| \
+	((char) (c2) <<  8) \
+	| \
+	((char) (c3) << 16) \
+	| \
+	((char) (c4) << 24) \
+)
+
+#define gcmPRINTABLE(c)			((((c) >= ' ') && ((c) <= '}')) ? (c) : ' ')
+
+#define gcmCC_PRINT(cc) \
+	gcmPRINTABLE((char) ( (cc)        & 0xFF)), \
+	gcmPRINTABLE((char) (((cc) >>  8) & 0xFF)), \
+	gcmPRINTABLE((char) (((cc) >> 16) & 0xFF)), \
+	gcmPRINTABLE((char) (((cc) >> 24) & 0xFF))
+
+/******************************************************************************\
+****************************** Function Parameters *****************************
+\******************************************************************************/
+
+#define IN
+#define OUT
+#define OPTIONAL
+
+/******************************************************************************\
+********************************* Status Codes *********************************
+\******************************************************************************/
+
+typedef enum _gceSTATUS
+{
+	gcvSTATUS_OK					= 	0,
+	gcvSTATUS_FALSE					= 	0,
+	gcvSTATUS_TRUE					= 	1,
+	gcvSTATUS_NO_MORE_DATA 			= 	2,
+	gcvSTATUS_CACHED				= 	3,
+	gcvSTATUS_MIPMAP_TOO_LARGE		= 	4,
+	gcvSTATUS_NAME_NOT_FOUND		=	5,
+	gcvSTATUS_NOT_OUR_INTERRUPT		=	6,
+	gcvSTATUS_MISMATCH				=	7,
+	gcvSTATUS_MIPMAP_TOO_SMALL		=	8,
+	gcvSTATUS_LARGER				=	9,
+	gcvSTATUS_SMALLER				=	10,
+	gcvSTATUS_CHIP_NOT_READY		= 	11,
+	gcvSTATUS_NEED_CONVERSION		=	12,
+	gcvSTATUS_SKIP					=	13,
+	gcvSTATUS_DATA_TOO_LARGE		=	14,
+	gcvSTATUS_INVALID_CONFIG		=	15,
+	gcvSTATUS_CHANGED				=	16,
+
+	gcvSTATUS_INVALID_ARGUMENT		= 	-1,
+	gcvSTATUS_INVALID_OBJECT 		= 	-2,
+	gcvSTATUS_OUT_OF_MEMORY 		= 	-3,
+	gcvSTATUS_MEMORY_LOCKED			= 	-4,
+	gcvSTATUS_MEMORY_UNLOCKED		= 	-5,
+	gcvSTATUS_HEAP_CORRUPTED		= 	-6,
+	gcvSTATUS_GENERIC_IO			= 	-7,
+	gcvSTATUS_INVALID_ADDRESS		= 	-8,
+	gcvSTATUS_CONTEXT_LOSSED		= 	-9,
+	gcvSTATUS_TOO_COMPLEX			= 	-10,
+	gcvSTATUS_BUFFER_TOO_SMALL		= 	-11,
+	gcvSTATUS_INTERFACE_ERROR		= 	-12,
+	gcvSTATUS_NOT_SUPPORTED			= 	-13,
+	gcvSTATUS_MORE_DATA				= 	-14,
+	gcvSTATUS_TIMEOUT				= 	-15,
+	gcvSTATUS_OUT_OF_RESOURCES		= 	-16,
+	gcvSTATUS_INVALID_DATA			= 	-17,
+	gcvSTATUS_INVALID_MIPMAP		= 	-18,
+	gcvSTATUS_NOT_FOUND				=	-19,
+	gcvSTATUS_NOT_ALIGNED			=	-20,
+	gcvSTATUS_INVALID_REQUEST		=	-21,
+
+	/* Linker errors. */
+	gcvSTATUS_GLOBAL_TYPE_MISMATCH	=	-1000,
+	gcvSTATUS_TOO_MANY_ATTRIBUTES	=	-1001,
+	gcvSTATUS_TOO_MANY_UNIFORMS		=	-1002,
+	gcvSTATUS_TOO_MANY_VARYINGS		=	-1003,
+	gcvSTATUS_UNDECLARED_VARYING	=	-1004,
+	gcvSTATUS_VARYING_TYPE_MISMATCH	=	-1005,
+	gcvSTATUS_MISSING_MAIN			=	-1006,
+	gcvSTATUS_NAME_MISMATCH			=	-1007,
+	gcvSTATUS_INVALID_INDEX			=	-1008,
+}
+gceSTATUS;
+
+/******************************************************************************\
+********************************* Status Macros ********************************
+\******************************************************************************/
+
+#define gcmIS_ERROR(status)			(status < 0)
+#define gcmNO_ERROR(status)			(status >= 0)
+#define gcmIS_SUCCESS(status)		(status == gcvSTATUS_OK)
+
+/******************************************************************************\
+********************************* Field Macros *********************************
+\******************************************************************************/
+
+#define __gcmSTART(reg_field) \
+	(0 ? reg_field)
+
+#define __gcmEND(reg_field) \
+	(1 ? reg_field)
+
+#define __gcmGETSIZE(reg_field) \
+	(__gcmEND(reg_field) - __gcmSTART(reg_field) + 1)
+
+#define __gcmALIGN(data, reg_field) \
+	(((gctUINT32) (data)) << __gcmSTART(reg_field))
+
+#define __gcmMASK(reg_field) \
+	((gctUINT32) ((__gcmGETSIZE(reg_field) == 32) \
+		?  ~0 \
+		: (~(~0 << __gcmGETSIZE(reg_field)))))
+
+/*******************************************************************************
+**
+**	gcmFIELDMASK
+**
+**		Get aligned field mask.
+**
+**	ARGUMENTS:
+**
+**		reg		Name of register.
+**		field	Name of field within register.
+*/
+#define gcmFIELDMASK(reg, field) \
+( \
+	__gcmALIGN(__gcmMASK(reg##_##field), reg##_##field) \
+)
+
+/*******************************************************************************
+**
+**	gcmGETFIELD
+**
+**		Extract the value of a field from specified data.
+**
+**	ARGUMENTS:
+**
+**		data	Data value.
+**		reg		Name of register.
+**		field	Name of field within register.
+*/
+#define gcmGETFIELD(data, reg, field) \
+( \
+	((((gctUINT32) (data)) >> __gcmSTART(reg##_##field)) \
+		& __gcmMASK(reg##_##field)) \
+)
+
+/*******************************************************************************
+**
+**	gcmSETFIELD
+**
+**		Set the value of a field within specified data.
+**
+**	ARGUMENTS:
+**
+**		data	Data value.
+**		reg		Name of register.
+**		field	Name of field within register.
+**		value	Value for field.
+*/
+#define gcmSETFIELD(data, reg, field, value) \
+( \
+	(((gctUINT32) (data)) \
+		& ~__gcmALIGN(__gcmMASK(reg##_##field), reg##_##field)) \
+		|  __gcmALIGN((gctUINT32) (value) \
+			& __gcmMASK(reg##_##field), reg##_##field) \
+)
+
+/*******************************************************************************
+**
+**	gcmSETFIELDVALUE
+**
+**		Set the value of a field within specified data with a
+**		predefined value.
+**
+**	ARGUMENTS:
+**
+**		data	Data value.
+**		reg		Name of register.
+**		field	Name of field within register.
+**		value	Name of the value within the field.
+*/
+#define gcmSETFIELDVALUE(data, reg, field, value) \
+( \
+	(((gctUINT32) (data)) \
+		& ~__gcmALIGN(__gcmMASK(reg##_##field), reg##_##field)) \
+		|  __gcmALIGN(reg##_##field##_##value \
+			& __gcmMASK(reg##_##field), reg##_##field) \
+)
+
+/*******************************************************************************
+**
+**	gcmSETMASKEDFIELD
+**
+**		Set the value of a masked field with specified data.
+**
+**	ARGUMENTS:
+**
+**		reg		Name of register.
+**		field	Name of field within register.
+**		value	Value for field.
+*/
+#define gcmSETMASKEDFIELD(reg, field, value) \
+( \
+	gcmSETFIELD(~0, reg, field, value) & \
+	gcmSETFIELDVALUE(~0, reg, MASK_ ## field, ENABLED) \
+)
+
+/*******************************************************************************
+**
+**	gcmVERIFYFIELDVALUE
+**
+**		Verify if the value of a field within specified data equals a
+**		predefined value.
+**
+**	ARGUMENTS:
+**
+**		data	Data value.
+**		reg		Name of register.
+**		field	Name of field within register.
+**		value	Name of the value within the field.
+*/
+#define gcmVERIFYFIELDVALUE(data, reg, field, value) \
+( \
+	(((gctUINT32) (data)) >> __gcmSTART(reg##_##field) & \
+							 __gcmMASK(reg##_##field)) \
+		== \
+	(reg##_##field##_##value & __gcmMASK(reg##_##field)) \
+)
+
+/*******************************************************************************
+**	Bit field macros.
+*/
+
+#define __gcmSTARTBIT(Field) \
+	( 1 ? Field )
+
+#define __gcmBITSIZE(Field) \
+	( 0 ? Field )
+
+#define __gcmBITMASK(Field) \
+( \
+	(1 << __gcmBITSIZE(Field)) - 1 \
+)
+
+#define gcmGETBITS(Value, Type, Field) \
+( \
+	( ((Type) (Value)) >> __gcmSTARTBIT(Field) ) \
+	& \
+	__gcmBITMASK(Field) \
+)
+
+#define gcmSETBITS(Value, Type, Field, NewValue) \
+( \
+	( ((Type) (Value)) \
+	& ~(__gcmBITMASK(Field) << __gcmSTARTBIT(Field)) \
+	) \
+	| \
+	( ( ((Type) (NewValue)) \
+	  & __gcmBITMASK(Field) \
+	  ) << __gcmSTARTBIT(Field) \
+	) \
+)
+
+/******************************************************************************\
+******************************** Min/Max Macros ********************************
+\******************************************************************************/
+
+#define gcmMIN(x, y)			(((x) <= (y)) ?  (x) :  (y))
+#define gcmMAX(x, y)			(((x) >= (y)) ?  (x) :  (y))
+#define gcmCLAMP(x, min, max)	(((x) < (min)) ? (min) : \
+								 ((x) > (max)) ? (max) : (x))
+#define gcmABS(x)				(((x) < 0)    ? -(x) :  (x))
+#define gcmNEG(x)				(((x) < 0)    ?  (x) : -(x))
+
+/*******************************************************************************
+**
+**	gcmPTR2INT
+**
+**		Convert a pointer to an integer value.
+**
+**	ARGUMENTS:
+**
+**		p		Pointer value.
+*/
+#if defined(_WIN32) || (defined(__LP64__) && __LP64__)
+#	define gcmPTR2INT(p) \
+	( \
+		(gctUINT32) (gctUINT64) (p) \
+	)
+#else
+# 	define gcmPTR2INT(p) \
+	( \
+		(gctUINT32) (p) \
+	)
+#endif
+
+/*******************************************************************************
+**
+**	gcmINT2PTR
+**
+**		Convert an integer value into a pointer.
+**
+**	ARGUMENTS:
+**
+**		v		Integer value.
+*/
+#define gcmINT2PTR(i) \
+( \
+	(gctPOINTER) (i) \
+)
+
+/*******************************************************************************
+**
+**	gcmOFFSETOF
+**
+**		Compute the byte offset of a field inside a structure.
+**
+**	ARGUMENTS:
+**
+**		s		Structure name.
+**		field	Field name.
+*/
+#define gcmOFFSETOF(s, field) \
+( \
+	gcmPTR2INT(& (((struct s *) 0)->field)) \
+)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __gc_hal_types_h_ */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gcCompiler.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gcCompiler.h
@@ -0,0 +1,1830 @@
+/****************************************************************************
+*  
+*    Copyright (C) 2002 - 2008 by Vivante Corp.
+*  
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public Lisence as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*  
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*  
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*  
+*****************************************************************************/
+
+
+
+
+/*
+**	Include file the defines the front- and back-end compilers, as well as the
+**	objects they use.
+*/
+
+#ifndef __gccompiler_h_
+#define __gccompiler_h_
+
+#include "aqTypes.h"
+
+/******************************************************************************\
+|******************************* SHADER LANGUAGE ******************************|
+\******************************************************************************/
+
+/* Possible shader language opcodes. */
+typedef enum _gcSL_OPCODE
+{
+	gcSL_NOP,							/* 0x00 */
+	gcSL_MOV,							/* 0x01 */
+	gcSL_SAT,							/* 0x02 */
+	gcSL_DP3,							/* 0x03 */
+	gcSL_DP4,							/* 0x04 */
+	gcSL_ABS,							/* 0x05 */
+	gcSL_JMP,							/* 0x06 */
+	gcSL_ADD,							/* 0x07 */
+	gcSL_MUL,							/* 0x08 */
+	gcSL_RCP,							/* 0x09 */
+	gcSL_SUB,							/* 0x0A */
+	gcSL_KILL,							/* 0x0B */
+	gcSL_TEXLD,							/* 0x0C */
+	gcSL_CALL,							/* 0x0D */
+	gcSL_RET,							/* 0x0E */
+	gcSL_NORM,							/* 0x0F */
+	gcSL_MAX,							/* 0x10 */
+	gcSL_MIN,							/* 0x11 */
+	gcSL_POW,							/* 0x12 */
+	gcSL_RSQ,							/* 0x13 */
+	gcSL_LOG,							/* 0x14 */
+	gcSL_FRAC,							/* 0x15 */
+	gcSL_FLOOR,							/* 0x16 */
+	gcSL_CEIL,							/* 0x17 */
+	gcSL_CROSS,							/* 0x18 */
+	gcSL_TEXLDP,						/* 0x19 */
+	gcSL_TEXBIAS,						/* 0x1A */
+	gcSL_TEXGRAD,						/* 0x1B */
+	gcSL_TEXLOD,						/* 0x1C */
+	gcSL_SIN,							/* 0x1D */
+	gcSL_COS,							/* 0x1E */
+	gcSL_TAN,							/* 0x1F */
+	gcSL_EXP,							/* 0x20 */
+	gcSL_SIGN,							/* 0x21 */
+	gcSL_STEP,							/* 0x22 */
+	gcSL_SQRT,							/* 0x23 */
+	gcSL_ACOS,							/* 0x24 */
+	gcSL_ASIN,							/* 0x25 */
+	gcSL_ATAN,							/* 0x26 */
+	gcSL_SET,							/* 0x27 */
+	gcSL_DSX,							/* 0x28 */
+	gcSL_DSY,							/* 0x29 */
+	gcSL_FWIDTH,						/* 0x2A */
+}
+gcSL_OPCODE;
+
+typedef enum _gcSL_FORMAT
+{
+	gcSL_FLOAT,							/* 0 */
+	gcSL_INTEGER,						/* 1 */
+	gcSL_BOOLEAN,						/* 2 */
+}
+gcSL_FORMAT;
+
+/* Destination write enable bits. */
+typedef enum _gcSL_ENABLE
+{
+	gcSL_ENABLE_X						= 0x1,
+	gcSL_ENABLE_Y						= 0x2,
+	gcSL_ENABLE_Z						= 0x4,
+	gcSL_ENABLE_W						= 0x8,
+	/* Combinations. */
+	gcSL_ENABLE_XY						= gcSL_ENABLE_X | gcSL_ENABLE_Y,
+	gcSL_ENABLE_XYZ						= gcSL_ENABLE_X | gcSL_ENABLE_Y | gcSL_ENABLE_Z,
+	gcSL_ENABLE_XYZW					= gcSL_ENABLE_X | gcSL_ENABLE_Y | gcSL_ENABLE_Z | gcSL_ENABLE_W,
+	gcSL_ENABLE_XYW						= gcSL_ENABLE_X | gcSL_ENABLE_Y | gcSL_ENABLE_W,
+	gcSL_ENABLE_XZ						= gcSL_ENABLE_X | gcSL_ENABLE_Z,
+	gcSL_ENABLE_XZW						= gcSL_ENABLE_X | gcSL_ENABLE_Z | gcSL_ENABLE_W,
+	gcSL_ENABLE_XW						= gcSL_ENABLE_X | gcSL_ENABLE_W,
+	gcSL_ENABLE_YZ						= gcSL_ENABLE_Y | gcSL_ENABLE_Z,
+	gcSL_ENABLE_YZW						= gcSL_ENABLE_Y | gcSL_ENABLE_Z | gcSL_ENABLE_W,
+	gcSL_ENABLE_YW						= gcSL_ENABLE_Y | gcSL_ENABLE_W,
+	gcSL_ENABLE_ZW						= gcSL_ENABLE_Z | gcSL_ENABLE_W,
+}
+gcSL_ENABLE;
+
+/* Possible indices. */
+typedef enum _gcSL_INDEXED
+{
+	gcSL_NOT_INDEXED,					/* 0 */
+	gcSL_INDEXED_X,						/* 1 */
+	gcSL_INDEXED_Y,						/* 2 */
+	gcSL_INDEXED_Z,						/* 3 */
+	gcSL_INDEXED_W,						/* 4 */
+}
+gcSL_INDEXED;
+
+/* Opcode conditions. */
+typedef enum _gcSL_CONDITION
+{
+	gcSL_ALWAYS,						/* 0x0 */
+	gcSL_NOT_EQUAL,						/* 0x1 */
+	gcSL_LESS_OR_EQUAL,					/* 0x2 */
+	gcSL_LESS,							/* 0x3 */
+	gcSL_EQUAL,							/* 0x4 */
+	gcSL_GREATER,						/* 0x5 */
+	gcSL_GREATER_OR_EQUAL,				/* 0x6 */
+	gcSL_AND,							/* 0x7 */
+	gcSL_OR,							/* 0x8 */
+	gcSL_XOR,							/* 0x9 */
+}
+gcSL_CONDITION;
+
+/* Possible source operand types. */
+typedef enum _gcSL_TYPE
+{
+	gcSL_NONE,							/* 0x0 */
+	gcSL_TEMP,							/* 0x1 */
+	gcSL_ATTRIBUTE,						/* 0x2 */
+	gcSL_UNIFORM,						/* 0x3 */
+	gcSL_SAMPLER,						/* 0x4 */
+	gcSL_CONSTANT,						/* 0x5 */
+	gcSL_OUTPUT,						/* 0x6 */
+	gcSL_PHYSICAL,						/* 0x7 */
+}
+gcSL_TYPE;
+
+/* Swizzle generator macro. */
+#define gcmSWIZZLE(Component1, Component2, Component3, Component4) \
+( \
+	(gcSL_SWIZZLE_ ## Component1 << 0) | \
+	(gcSL_SWIZZLE_ ## Component2 << 2) | \
+	(gcSL_SWIZZLE_ ## Component3 << 4) | \
+	(gcSL_SWIZZLE_ ## Component4 << 6)   \
+)
+
+/* Possible swizzle values. */
+typedef enum _gcSL_SWIZZLE
+{
+	gcSL_SWIZZLE_X,						/* 0x0 */
+	gcSL_SWIZZLE_Y,						/* 0x1 */
+	gcSL_SWIZZLE_Z,						/* 0x2 */
+	gcSL_SWIZZLE_W,						/* 0x3 */
+	/* Combinations. */
+	gcSL_SWIZZLE_XXXX = gcmSWIZZLE(X, X, X, X),
+	gcSL_SWIZZLE_YYYY = gcmSWIZZLE(Y, Y, Y, Y),
+	gcSL_SWIZZLE_ZZZZ = gcmSWIZZLE(Z, Z, Z, Z),
+	gcSL_SWIZZLE_WWWW = gcmSWIZZLE(W, W, W, W),
+	gcSL_SWIZZLE_XYYY = gcmSWIZZLE(X, Y, Y, Y),
+	gcSL_SWIZZLE_XZZZ = gcmSWIZZLE(X, Z, Z, Z),
+	gcSL_SWIZZLE_XWWW = gcmSWIZZLE(X, W, W, W),
+	gcSL_SWIZZLE_YZZZ = gcmSWIZZLE(Y, Z, Z, Z),
+	gcSL_SWIZZLE_YWWW = gcmSWIZZLE(Y, W, W, W),
+	gcSL_SWIZZLE_ZWWW = gcmSWIZZLE(Z, W, W, W),
+	gcSL_SWIZZLE_XYZZ = gcmSWIZZLE(X, Y, Z, Z),
+	gcSL_SWIZZLE_XYWW = gcmSWIZZLE(X, Y, W, W),
+	gcSL_SWIZZLE_XZWW = gcmSWIZZLE(X, Z, W, W),
+	gcSL_SWIZZLE_YZWW = gcmSWIZZLE(Y, Z, W, W),
+	gcSL_SWIZZLE_XXYZ = gcmSWIZZLE(X, X, Y, Z),
+	gcSL_SWIZZLE_XYZW = gcmSWIZZLE(X, Y, Z, W),
+}
+gcSL_SWIZZLE;
+
+
+/******************************************************************************\
+|*********************************** SHADERS **********************************|
+\******************************************************************************/
+
+/* Shader types. */
+#define gcSHADER_TYPE_UNKNOWN			0
+#define gcSHADER_TYPE_VERTEX			1
+#define gcSHADER_TYPE_FRAGMENT			2
+
+/* gcSHADER objects. */
+typedef struct _gcSHADER *				gcSHADER;
+typedef struct _gcATTRIBUTE *			gcATTRIBUTE;
+typedef struct _gcUNIFORM *				gcUNIFORM;
+typedef struct _gcOUTPUT *				gcOUTPUT;
+typedef struct _gcsFUNCTION *			gcFUNCTION;
+typedef struct _gcsHINT *				gcsHINT_PTR;
+typedef struct _gcSHADER_PROFILER *     gcSHADER_PROFILER; 
+typedef struct _gcVARIABLE *			gcVARIABLE;
+
+/* gcSHADER_TYPE enumeration. */
+typedef enum _gcSHADER_TYPE
+{
+	gcSHADER_FLOAT_X1,					/* 0x00 */
+	gcSHADER_FLOAT_X2,					/* 0x01 */
+	gcSHADER_FLOAT_X3,					/* 0x02 */
+	gcSHADER_FLOAT_X4,					/* 0x03 */
+	gcSHADER_FLOAT_2X2,					/* 0x04 */
+	gcSHADER_FLOAT_3X3,					/* 0x05 */
+	gcSHADER_FLOAT_4X4,					/* 0x06 */
+	gcSHADER_BOOLEAN_X1,				/* 0x07 */
+	gcSHADER_BOOLEAN_X2,				/* 0x08 */
+	gcSHADER_BOOLEAN_X3,				/* 0x09 */
+	gcSHADER_BOOLEAN_X4,				/* 0x0A */
+	gcSHADER_INTEGER_X1,				/* 0x0B */
+	gcSHADER_INTEGER_X2,				/* 0x0C */
+	gcSHADER_INTEGER_X3,				/* 0x0D */
+	gcSHADER_INTEGER_X4,				/* 0x0E */
+	gcSHADER_SAMPLER_1D,				/* 0x0F */
+	gcSHADER_SAMPLER_2D,				/* 0x10 */
+	gcSHADER_SAMPLER_3D,				/* 0x11 */
+	gcSHADER_SAMPLER_CUBIC,				/* 0x12 */
+	gcSHADER_FIXED_X1,					/* 0x13 */
+	gcSHADER_FIXED_X2,					/* 0x14 */
+	gcSHADER_FIXED_X3,					/* 0x15 */
+	gcSHADER_FIXED_X4,					/* 0x16 */
+}
+gcSHADER_TYPE;
+
+/* Shader flags. */
+typedef enum _gceSHADER_FLAGS
+{
+	gcvSHADER_DEAD_CODE					= 0x01,
+	gcvSHADER_RESOURCE_USAGE			= 0x02,
+	gcvSHADER_OPTIMIZER					= 0x04,
+	gcvSHADER_USE_GL_Z					= 0x08,
+	gcvSHADER_USE_GL_POSITION			= 0x10,
+	gcvSHADER_USE_GL_FACE				= 0x20,
+	gcvSHADER_USE_GL_POINT_COORD		= 0x40,
+}
+gceSHADER_FLAGS;
+
+/* Function argument qualifier */
+typedef enum _gceINPUT_OUTPUT
+{
+	gcvFUNCTION_INPUT,
+	gcvFUNCTION_OUTPUT,
+	gcvFUNCTION_INOUT
+}
+gceINPUT_OUTPUT;
+
+/*******************************************************************************
+**                             gcSHADER_Construct
+********************************************************************************
+**
+**	Construct a new gcSHADER object.
+**
+**	INPUT:
+**
+**		gcoOS Hal
+**			Pointer to an gcoHAL object.
+**
+**		gctINT ShaderType
+**			Type of gcSHADER object to cerate.  'ShaderType' can be one of the
+**			following:
+**
+**				gcSHADER_TYPE_VERTEX	Vertex shader.
+**				gcSHADER_TYPE_FRAGMENT	Fragment shader.
+**
+**	OUTPUT:
+**
+**		gcSHADER * Shader
+**			Pointer to a variable receiving the gcSHADER object pointer.
+*/
+gceSTATUS
+gcSHADER_Construct(
+	IN gcoHAL Hal,
+	IN gctINT ShaderType,
+	OUT gcSHADER * Shader
+	);
+
+/*******************************************************************************
+**                              gcSHADER_Destroy
+********************************************************************************
+**
+**	Destroy a gcSHADER object.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcSHADER_Destroy(
+	IN gcSHADER Shader
+	);
+
+/*******************************************************************************
+**                                gcSHADER_Load
+********************************************************************************
+**
+**	Load a gcSHADER object from a binary buffer.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gctPOINTER Buffer
+**			Pointer to a binary buffer containg the shader data to load.
+**
+**		gctSIZE_T BufferSize
+**			Number of bytes inside the binary buffer pointed to by 'Buffer'.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcSHADER_Load(
+	IN gcSHADER Shader,
+	IN gctPOINTER Buffer,
+	IN gctSIZE_T BufferSize
+	);
+
+/*******************************************************************************
+**                                gcSHADER_Save
+********************************************************************************
+**
+**	Save a gcSHADER object to a binary buffer.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gctPOINTER Buffer
+**			Pointer to a binary buffer to be used as storage for the gcSHADER
+**			object.  If 'Buffer' is gcvNULL, the gcSHADER object will not be saved,
+**			but the number of bytes required to hold the binary output for the
+**			gcSHADER object will be returned.
+**
+**		gctSIZE_T * BufferSize
+**			Pointer to a variable holding the number of bytes allocated in
+**			'Buffer'.  Only valid if 'Buffer' is not gcvNULL.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * BufferSize
+**			Pointer to a variable receiving the number of bytes required to hold
+**			the binary form of the gcSHADER object.
+*/
+gceSTATUS
+gcSHADER_Save(
+	IN gcSHADER Shader,
+	IN gctPOINTER Buffer,
+	IN OUT gctSIZE_T * BufferSize
+	);
+
+/*******************************************************************************
+**							  gcSHADER_AddAttribute
+********************************************************************************
+**
+**	Add an attribute to a gcSHADER object.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gctCONST_STRING Name
+**			Name of the attribute to add.
+**
+**		gcSHADER_TYPE Type
+**			Type of the attribute to add.
+**
+**		gctSIZE_T Length
+**			Array length of the attribute to add.  'Length' must be at least 1.
+**
+**		gctBOOL IsTexture
+**			gcvTRUE if the attribute is used as a texture coordinate, gcvFALSE if not.
+**
+**	OUTPUT:
+**
+**		gcATTRIBUTE * Attribute
+**			Pointer to a variable receiving the gcATTRIBUTE object pointer.
+*/
+gceSTATUS
+gcSHADER_AddAttribute(
+	IN gcSHADER Shader,
+	IN gctCONST_STRING Name,
+	IN gcSHADER_TYPE Type,
+	IN gctSIZE_T Length,
+	IN gctBOOL IsTexture,
+	OUT gcATTRIBUTE * Attribute
+	);
+
+/*******************************************************************************
+**                         gcSHADER_GetAttributeCount
+********************************************************************************
+**
+**	Get the number of attributes for this shader.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * Count
+**			Pointer to a variable receiving the number of attributes.
+*/
+gceSTATUS
+gcSHADER_GetAttributeCount(
+	IN gcSHADER Shader,
+	OUT gctSIZE_T * Count
+	);
+
+/*******************************************************************************
+**                            gcSHADER_GetAttribute
+********************************************************************************
+**
+**	Get the gcATTRIBUTE object poniter for an indexed attribute for this shader.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gctUINT Index
+**			Index of the attribute to retrieve.
+**
+**	OUTPUT:
+**
+**		gcATTRIBUTE * Attribute
+**			Pointer to a variable receiving the gcATTRIBUTE object pointer.
+*/
+gceSTATUS
+gcSHADER_GetAttribute(
+	IN gcSHADER Shader,
+	IN gctUINT Index,
+	OUT gcATTRIBUTE * Attribute
+	);
+
+/*******************************************************************************
+**                            gcSHADER_GetPositionAttribute
+********************************************************************************
+**
+**	Get the gcATTRIBUTE object pointer for the attribute that defines the
+**	position.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**	OUTPUT:
+**
+**		gctUINT * Index
+**			Pointer to a variable receiving the index of te gcATTRIBUTE object
+**			used as a position.
+**
+**		gcATTRIBUTE * Attribute
+**			Pointer to a variable receiving the gcATTRIBUTE object pointer.
+*/
+gceSTATUS
+gcSHADER_GetPositionAttribute(
+	IN gcSHADER Shader,
+	OUT gctUINT * Index,
+	OUT gcATTRIBUTE * Attribute
+	);
+
+/*******************************************************************************
+**							   gcSHADER_AddUniform
+********************************************************************************
+**
+**	Add an uniform to a gcSHADER object.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gctCONST_STRING Name
+**			Name of the uniform to add.
+**
+**		gcSHADER_TYPE Type
+**			Type of the uniform to add.
+**
+**		gctSIZE_T Length
+**			Array length of the uniform to add.  'Length' must be at least 1.
+**
+**	OUTPUT:
+**
+**		gcUNIFORM * Uniform
+**			Pointer to a variable receiving the gcUNIFORM object pointer.
+*/
+gceSTATUS
+gcSHADER_AddUniform(
+	IN gcSHADER Shader,
+	IN gctCONST_STRING Name,
+	IN gcSHADER_TYPE Type,
+	IN gctSIZE_T Length,
+	OUT gcUNIFORM * Uniform
+	);
+
+/*******************************************************************************
+**                          gcSHADER_GetUniformCount
+********************************************************************************
+**
+**	Get the number of uniforms for this shader.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * Count
+**			Pointer to a variable receiving the number of uniforms.
+*/
+gceSTATUS
+gcSHADER_GetUniformCount(
+	IN gcSHADER Shader,
+	OUT gctSIZE_T * Count
+	);
+
+/*******************************************************************************
+**                             gcSHADER_GetUniform
+********************************************************************************
+**
+**	Get the gcUNIFORM object pointer for an indexed uniform for this shader.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gctUINT Index
+**			Index of the uniform to retrieve.
+**
+**	OUTPUT:
+**
+**		gcUNIFORM * Uniform
+**			Pointer to a variable receiving the gcUNIFORM object pointer.
+*/
+gceSTATUS
+gcSHADER_GetUniform(
+	IN gcSHADER Shader,
+	IN gctUINT Index,
+	OUT gcUNIFORM * Uniform
+	);
+
+/*******************************************************************************
+**							   gcSHADER_AddOutput
+********************************************************************************
+**
+**	Add an output to a gcSHADER object.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gctCONST_STRING Name
+**			Name of the output to add.
+**
+**		gcSHADER_TYPE Type
+**			Type of the output to add.
+**
+**		gctSIZE_T Length
+**			Array length of the output to add.  'Length' must be at least 1.
+**
+**		gctUINT16 TempRegister
+**			Temporary register index that holds the output value.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcSHADER_AddOutput(
+	IN gcSHADER Shader,
+	IN gctCONST_STRING Name,
+	IN gcSHADER_TYPE Type,
+	IN gctSIZE_T Length,
+	IN gctUINT16 TempRegister
+	);
+
+gceSTATUS
+gcSHADER_AddOutputIndexed(
+	IN gcSHADER Shader,
+	IN gctCONST_STRING Name,
+	IN gctSIZE_T Index,
+	IN gctUINT16 TempIndex
+	);
+
+/*******************************************************************************
+**							 gcSHADER_GetOutputCount
+********************************************************************************
+**
+**	Get the number of outputs for this shader.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * Count
+**			Pointer to a variable receiving the number of outputs.
+*/
+gceSTATUS
+gcSHADER_GetOutputCount(
+	IN gcSHADER Shader,
+	OUT gctSIZE_T * Count
+	);
+
+/*******************************************************************************
+**							   gcSHADER_GetOutput
+********************************************************************************
+**
+**	Get the gcOUTPUT object pointer for an indexed output for this shader.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gctUINT Index
+**			Index of output to retrieve.
+**
+**	OUTPUT:
+**
+**		gcOUTPUT * Output
+**			Pointer to a variable receiving the gcOUTPUT object pointer.
+*/
+gceSTATUS
+gcSHADER_GetOutput(
+	IN gcSHADER Shader,
+	IN gctUINT Index,
+	OUT gcOUTPUT * Output
+	);
+
+/*******************************************************************************
+**							   gcSHADER_AddVariable
+********************************************************************************
+**
+**	Add a variable to a gcSHADER object.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gctCONST_STRING Name
+**			Name of the variable to add.
+**
+**		gcSHADER_TYPE Type
+**			Type of the variable to add.
+**
+**		gctSIZE_T Length
+**			Array length of the variable to add.  'Length' must be at least 1.
+**
+**		gctUINT16 TempRegister
+**			Temporary register index that holds the variable value.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcSHADER_AddVariable(
+	IN gcSHADER Shader,
+	IN gctCONST_STRING Name,
+	IN gcSHADER_TYPE Type,
+	IN gctSIZE_T Length,
+	IN gctUINT16 TempRegister
+	);
+
+/*******************************************************************************
+**							 gcSHADER_GetVariableCount
+********************************************************************************
+**
+**	Get the number of variables for this shader.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * Count
+**			Pointer to a variable receiving the number of variables.
+*/
+gceSTATUS
+gcSHADER_GetVariableCount(
+	IN gcSHADER Shader,
+	OUT gctSIZE_T * Count
+	);
+
+/*******************************************************************************
+**							   gcSHADER_GetVariable
+********************************************************************************
+**
+**	Get the gcVARIABLE object pointer for an indexed variable for this shader.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gctUINT Index
+**			Index of variable to retrieve.
+**
+**	OUTPUT:
+**
+**		gcVARIABLE * Variable
+**			Pointer to a variable receiving the gcVARIABLE object pointer.
+*/
+gceSTATUS
+gcSHADER_GetVariable(
+	IN gcSHADER Shader,
+	IN gctUINT Index,
+	OUT gcVARIABLE * Variable
+	);
+
+/*******************************************************************************
+**							   gcSHADER_AddOpcode
+********************************************************************************
+**
+**	Add an opcode to a gcSHADER object.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gcSL_OPCODE Opcode
+**			Opcode to add.
+**
+**		gctUINT16 TempRegister
+**			Temporary register index that acts as the target of the opcode.
+**
+**		gctUINT8 Enable
+**			Write enable bits for the temporary register that acts as the target
+**			of the opcode.
+**
+**		gcSL_FORMAT Format
+**			Format of the temporary register.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcSHADER_AddOpcode(
+	IN gcSHADER Shader,
+	IN gcSL_OPCODE Opcode,
+	IN gctUINT16 TempRegister,
+	IN gctUINT8 Enable,
+	IN gcSL_FORMAT Format
+	);
+
+gceSTATUS
+gcSHADER_AddOpcode2(
+	IN gcSHADER Shader,
+	IN gcSL_OPCODE Opcode,
+	IN gcSL_CONDITION Condition,
+	IN gctUINT16 TempRegister,
+	IN gctUINT8 Enable,
+	IN gcSL_FORMAT Format
+	);
+
+/*******************************************************************************
+**							gcSHADER_AddOpcodeIndexed
+********************************************************************************
+**
+**	Add an opcode to a gcSHADER object that writes to an dynamically indexed
+**	target.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gcSL_OPCODE Opcode
+**			Opcode to add.
+**
+**		gctUINT16 TempRegister
+**			Temporary register index that acts as the target of the opcode.
+**
+**		gctUINT8 Enable
+**			Write enable bits  for the temporary register that acts as the
+**			target of the opcode.
+**
+**		gcSL_INDEXED Mode
+**			Location of the dynamic index inside the temporary register.  Valid
+**			values can be:
+**
+**				gcSL_INDEXED_X - Use x component of the temporary register.
+**				gcSL_INDEXED_Y - Use y component of the temporary register.
+**				gcSL_INDEXED_Z - Use z component of the temporary register.
+**				gcSL_INDEXED_W - Use w component of the temporary register.
+**
+**		gctUINT16 IndexRegister
+**			Temporary register index that holds the dynamic index.
+**
+**		gcSL_FORMAT Format
+**			Format of the temporary register.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcSHADER_AddOpcodeIndexed(
+	IN gcSHADER Shader,
+	IN gcSL_OPCODE Opcode,
+	IN gctUINT16 TempRegister,
+	IN gctUINT8 Enable,
+	IN gcSL_INDEXED Mode,
+	IN gctUINT16 IndexRegister,
+	IN gcSL_FORMAT Format
+	);
+
+/*******************************************************************************
+**						  gcSHADER_AddOpcodeConditional
+********************************************************************************
+**
+**	Add an conditional opcode to a gcSHADER object.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gcSL_OPCODE Opcode
+**			Opcode to add.
+**
+**		gcSL_CONDITION Condition
+**			Condition that needs to evaluate to gcvTRUE in order for the opcode to
+**			execute.
+**
+**		gctUINT Label
+**			Target label if 'Condition' evaluates to gcvTRUE.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcSHADER_AddOpcodeConditional(
+	IN gcSHADER Shader,
+	IN gcSL_OPCODE Opcode,
+	IN gcSL_CONDITION Condition,
+	IN gctUINT Label
+	);
+
+/*******************************************************************************
+**								gcSHADER_AddLabel
+********************************************************************************
+**
+**	Define a label at the current instruction of a gcSHADER object.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gctUINT Label
+**			Label to define.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcSHADER_AddLabel(
+	IN gcSHADER Shader,
+	IN gctUINT Label
+	);
+
+/*******************************************************************************
+**							   gcSHADER_AddSource
+********************************************************************************
+**
+**	Add a source operand to a gcSHADER object.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gcSL_TYPE Type
+**			Type of the source operand.
+**
+**		gctUINT16 SourceIndex
+**			Index of the source operand.
+**
+**		gctUINT8 Swizzle
+**			x, y, z, and w swizzle values packed into one 8-bit value.
+**
+**		gcSL_FORMAT Format
+**			Format of the source operand.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcSHADER_AddSource(
+	IN gcSHADER Shader,
+	IN gcSL_TYPE Type,
+	IN gctUINT16 SourceIndex,
+	IN gctUINT8 Swizzle,
+	IN gcSL_FORMAT Format
+	);
+
+/*******************************************************************************
+**							gcSHADER_AddSourceIndexed
+********************************************************************************
+**
+**	Add a dynamically indexed source operand to a gcSHADER object.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gcSL_TYPE Type
+**			Type of the source operand.
+**
+**		gctUINT16 SourceIndex
+**			Index of the source operand.
+**
+**		gctUINT8 Swizzle
+**			x, y, z, and w swizzle values packed into one 8-bit value.
+**
+**		gcSL_INDEXED Mode
+**			Addressing mode for the index.
+**
+**		gctUINT16 IndexRegister
+**			Temporary register index that holds the dynamic index.
+**
+**		gcSL_FORMAT Format
+**			Format of the source operand.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcSHADER_AddSourceIndexed(
+	IN gcSHADER Shader,
+	IN gcSL_TYPE Type,
+	IN gctUINT16 SourceIndex,
+	IN gctUINT8 Swizzle,
+	IN gcSL_INDEXED Mode,
+	IN gctUINT16 IndexRegister,
+	IN gcSL_FORMAT Format
+	);
+
+/*******************************************************************************
+**						   gcSHADER_AddSourceAttribute
+********************************************************************************
+**
+**	Add an attribute as a source operand to a gcSHADER object.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gcATTRIBUTE Attribute
+**			Pointer to a gcATTRIBUTE object.
+**
+**		gctUINT8 Swizzle
+**			x, y, z, and w swizzle values packed into one 8-bit value.
+**
+**		gctINT Index
+**			Static index into the attribute in case the attribute is a matrix
+**			or array.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcSHADER_AddSourceAttribute(
+	IN gcSHADER Shader,
+	IN gcATTRIBUTE Attribute,
+	IN gctUINT8 Swizzle,
+	IN gctINT Index
+	);
+
+/*******************************************************************************
+**						   gcSHADER_AddSourceAttributeIndexed
+********************************************************************************
+**
+**	Add an indexed attribute as a source operand to a gcSHADER object.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gcATTRIBUTE Attribute
+**			Pointer to a gcATTRIBUTE object.
+**
+**		gctUINT8 Swizzle
+**			x, y, z, and w swizzle values packed into one 8-bit value.
+**
+**		gctINT Index
+**			Static index into the attribute in case the attribute is a matrix
+**			or array.
+**
+**		gcSL_INDEXED Mode
+**			Addressing mode of the dynamic index.
+**
+**		gctUINT16 IndexRegister
+**			Temporary register index that holds the dynamic index.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcSHADER_AddSourceAttributeIndexed(
+	IN gcSHADER Shader,
+	IN gcATTRIBUTE Attribute,
+	IN gctUINT8 Swizzle,
+	IN gctINT Index,
+	IN gcSL_INDEXED Mode,
+	IN gctUINT16 IndexRegister
+	);
+
+/*******************************************************************************
+**							gcSHADER_AddSourceUniform
+********************************************************************************
+**
+**	Add a uniform as a source operand to a gcSHADER object.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gcUNIFORM Uniform
+**			Pointer to a gcUNIFORM object.
+**
+**		gctUINT8 Swizzle
+**			x, y, z, and w swizzle values packed into one 8-bit value.
+**
+**		gctINT Index
+**			Static index into the uniform in case the uniform is a matrix or
+**			array.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcSHADER_AddSourceUniform(
+	IN gcSHADER Shader,
+	IN gcUNIFORM Uniform,
+	IN gctUINT8 Swizzle,
+	IN gctINT Index
+	);
+
+/*******************************************************************************
+**						gcSHADER_AddSourceUniformIndexed
+********************************************************************************
+**
+**	Add an indexed uniform as a source operand to a gcSHADER object.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gcUNIFORM Uniform
+**			Pointer to a gcUNIFORM object.
+**
+**		gctUINT8 Swizzle
+**			x, y, z, and w swizzle values packed into one 8-bit value.
+**
+**		gctINT Index
+**			Static index into the uniform in case the uniform is a matrix or
+**			array.
+**
+**		gcSL_INDEXED Mode
+**			Addressing mode of the dynamic index.
+**
+**		gctUINT16 IndexRegister
+**			Temporary register index that holds the dynamic index.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcSHADER_AddSourceUniformIndexed(
+	IN gcSHADER Shader,
+	IN gcUNIFORM Uniform,
+	IN gctUINT8 Swizzle,
+	IN gctINT Index,
+	IN gcSL_INDEXED Mode,
+	IN gctUINT16 IndexRegister
+	);
+
+gceSTATUS
+gcSHADER_AddSourceSamplerIndexed(
+	IN gcSHADER Shader,
+	IN gctUINT8 Swizzle,
+	IN gcSL_INDEXED Mode,
+	IN gctUINT16 IndexRegister
+	);
+
+/*******************************************************************************
+**						   gcSHADER_AddSourceConstant
+********************************************************************************
+**
+**	Add a constant floating pointer value as a source operand to a gcSHADER
+**	object.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gctFLOAT Constant
+**			Floating pointer constant.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcSHADER_AddSourceConstant(
+	IN gcSHADER Shader,
+	IN gctFLOAT Constant
+	);
+
+/*******************************************************************************
+**								  gcSHADER_Pack
+********************************************************************************
+**
+**	Pack a dynamically created gcSHADER object by trimming the allocated arrays
+**	and resolving all the labeling.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcSHADER_Pack(
+	IN gcSHADER Shader
+	);
+
+/*******************************************************************************
+**								gcSHADER_SetOptimizationOption
+********************************************************************************
+**
+**	Set optimization option of a gcSHADER object.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object.
+**
+**		gctUINT OptimizationOption
+**			Optimization option.  Can be one of the following:
+**
+**				0						- No optimization.
+**				1						- Full optimization.
+**				Other value				- For optimizer testing.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcSHADER_SetOptimizationOption(
+	IN gcSHADER Shader,
+	IN gctUINT OptimizationOption
+	);
+
+gceSTATUS
+gcSHADER_AddFunction(
+	IN gcSHADER Shader,
+	IN gctCONST_STRING Name,
+	OUT gcFUNCTION * Function
+	);
+
+gceSTATUS
+gcSHADER_BeginFunction(
+	IN gcSHADER Shader,
+	IN gcFUNCTION Function
+	);
+
+gceSTATUS
+gcSHADER_EndFunction(
+	IN gcSHADER Shader,
+	IN gcFUNCTION Function
+	);
+
+/*******************************************************************************
+**                             gcATTRIBUTE_GetType
+********************************************************************************
+**
+**	Get the type and array length of a gcATTRIBUTE object.
+**
+**	INPUT:
+**
+**		gcATTRIBUTE Attribute
+**			Pointer to a gcATTRIBUTE object.
+**
+**	OUTPUT:
+**
+**		gcSHADER_TYPE * Type
+**			Pointer to a variable receiving the type of the attribute.  'Type'
+**			can be gcvNULL, in which case no type will be returned.
+**
+**		gctSIZE_T * ArrayLength
+**			Pointer to a variable receiving the length of the array if the
+**			attribute was declared as an array.  If the attribute was not
+**			declared as an array, the array length will be 1.  'ArrayLength' can
+**			be gcvNULL, in which case no array length will be returned.
+*/
+gceSTATUS
+gcATTRIBUTE_GetType(
+	IN gcATTRIBUTE Attribute,
+	OUT gcSHADER_TYPE * Type,
+	OUT gctSIZE_T * ArrayLength
+	);
+
+/*******************************************************************************
+**                            gcATTRIBUTE_GetName
+********************************************************************************
+**
+**	Get the name of a gcATTRIBUTE object.
+**
+**	INPUT:
+**
+**		gcATTRIBUTE Attribute
+**			Pointer to a gcATTRIBUTE object.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * Length
+**			Pointer to a variable receiving the length of the attribute name.
+**			'Length' can be gcvNULL, in which case no length will be returned.
+**
+**		gctCONST_STRING * Name
+**			Pointer to a variable receiving the pointer to the attribute name.
+**			'Name' can be gcvNULL, in which case no name will be returned.
+*/
+gceSTATUS
+gcATTRIBUTE_GetName(
+	IN gcATTRIBUTE Attribute,
+	OUT gctSIZE_T * Length,
+	OUT gctCONST_STRING * Name
+	);
+
+/*******************************************************************************
+**                            gcATTRIBUTE_IsEnabled
+********************************************************************************
+**
+**	Query the enabled state of a gcATTRIBUTE object.
+**
+**	INPUT:
+**
+**		gcATTRIBUTE Attribute
+**			Pointer to a gcATTRIBUTE object.
+**
+**	OUTPUT:
+**
+**		gctBOOL * Enabled
+**			Pointer to a variable receiving the enabled state of the attribute.
+*/
+gceSTATUS
+gcATTRIBUTE_IsEnabled(
+	IN gcATTRIBUTE Attribute,
+	OUT gctBOOL * Enabled
+	);
+
+/*******************************************************************************
+**                              gcUNIFORM_GetType
+********************************************************************************
+**
+**	Get the type and array length of a gcUNIFORM object.
+**
+**	INPUT:
+**
+**		gcUNIFORM Uniform
+**			Pointer to a gcUNIFORM object.
+**
+**	OUTPUT:
+**
+**		gcSHADER_TYPE * Type
+**			Pointer to a variable receiving the type of the uniform.  'Type' can
+**			be gcvNULL, in which case no type will be returned.
+**
+**		gctSIZE_T * ArrayLength
+**			Pointer to a variable receiving the length of the array if the
+**			uniform was declared as an array.  If the uniform was not declared
+**			as an array, the array length will be 1.  'ArrayLength' can be gcvNULL,
+**			in which case no array length will be returned.
+*/
+gceSTATUS
+gcUNIFORM_GetType(
+	IN gcUNIFORM Uniform,
+	OUT gcSHADER_TYPE * Type,
+	OUT gctSIZE_T * ArrayLength
+	);
+
+/*******************************************************************************
+**                              gcUNIFORM_GetName
+********************************************************************************
+**
+**	Get the name of a gcUNIFORM object.
+**
+**	INPUT:
+**
+**		gcUNIFORM Uniform
+**			Pointer to a gcUNIFORM object.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * Length
+**			Pointer to a variable receiving the length of the uniform name.
+**			'Length' can be gcvNULL, in which case no length will be returned.
+**
+**		gctCONST_STRING * Name
+**			Pointer to a variable receiving the pointer to the uniform name.
+**			'Name' can be gcvNULL, in which case no name will be returned.
+*/
+gceSTATUS
+gcUNIFORM_GetName(
+	IN gcUNIFORM Uniform,
+	OUT gctSIZE_T * Length,
+	OUT gctCONST_STRING * Name
+	);
+
+/*******************************************************************************
+**                              gcUNIFORM_GetSampler
+********************************************************************************
+**
+**	Get the physical sampler number for a sampler gcUNIFORM object.
+**
+**	INPUT:
+**
+**		gcUNIFORM Uniform
+**			Pointer to a gcUNIFORM object.
+**
+**	OUTPUT:
+**
+**		gctUINT32 * Sampler
+**			Pointer to a variable receiving the physical sampler.
+*/
+gceSTATUS
+gcUNIFORM_GetSampler(
+	IN gcUNIFORM Uniform,
+	OUT gctUINT32 * Sampler
+	);
+
+/*******************************************************************************
+**							   gcUNIFORM_SetValue
+********************************************************************************
+**
+**	Set the value of a uniform in integer.
+**
+**	INPUT:
+**
+**		gcUNIFORM Uniform
+**			Pointer to a gcUNIFORM object.
+**
+**		gctSIZE_T Count
+**			Number of entries to program if the uniform has been declared as an
+**			array.
+**
+**		const gctINT * Value
+**			Pointer to a buffer holding the integer values for the uniform.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcUNIFORM_SetValue(
+	IN gcUNIFORM Uniform,
+	IN gctSIZE_T Count,
+	IN const gctINT * Value
+	);
+
+/*******************************************************************************
+**							   gcUNIFORM_SetValueX
+********************************************************************************
+**
+**	Set the value of a uniform in fixed point.
+**
+**	INPUT:
+**
+**		gcUNIFORM Uniform
+**			Pointer to a gcUNIFORM object.
+**
+**		gctSIZE_T Count
+**			Number of entries to program if the uniform has been declared as an
+**			array.
+**
+**		const gctFIXED_POINT * Value
+**			Pointer to a buffer holding the fixed point values for the uniform.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcUNIFORM_SetValueX(
+	IN gcUNIFORM Uniform,
+	IN gctSIZE_T Count,
+	IN gctFIXED_POINT * Value
+	);
+
+/*******************************************************************************
+**							   gcUNIFORM_SetValueF
+********************************************************************************
+**
+**	Set the value of a uniform in floating point.
+**
+**	INPUT:
+**
+**		gcUNIFORM Uniform
+**			Pointer to a gcUNIFORM object.
+**
+**		gctSIZE_T Count
+**			Number of entries to program if the uniform has been declared as an
+**			array.
+**
+**		const gctFLOAT * Value
+**			Pointer to a buffer holding the floating point values for the
+**			uniform.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcUNIFORM_SetValueF(
+	IN gcUNIFORM Uniform,
+	IN gctSIZE_T Count,
+	IN const gctFLOAT * Value
+	);
+
+/*******************************************************************************
+**								gcOUTPUT_GetType
+********************************************************************************
+**
+**	Get the type and array length of a gcOUTPUT object.
+**
+**	INPUT:
+**
+**		gcOUTPUT Output
+**			Pointer to a gcOUTPUT object.
+**
+**	OUTPUT:
+**
+**		gcSHADER_TYPE * Type
+**			Pointer to a variable receiving the type of the output.  'Type' can
+**			be gcvNULL, in which case no type will be returned.
+**
+**		gctSIZE_T * ArrayLength
+**			Pointer to a variable receiving the length of the array if the
+**			output was declared as an array.  If the output was not declared
+**			as an array, the array length will be 1.  'ArrayLength' can be gcvNULL,
+**			in which case no array length will be returned.
+*/
+gceSTATUS
+gcOUTPUT_GetType(
+	IN gcOUTPUT Output,
+	OUT gcSHADER_TYPE * Type,
+	OUT gctSIZE_T * ArrayLength
+	);
+
+/*******************************************************************************
+**							   gcOUTPUT_GetIndex
+********************************************************************************
+**
+**	Get the index of a gcOUTPUT object.
+**
+**	INPUT:
+**
+**		gcOUTPUT Output
+**			Pointer to a gcOUTPUT object.
+**
+**	OUTPUT:
+**
+**		gctUINT * Index
+**			Pointer to a variable receiving the temporary register index of the
+**			output.  'Index' can be gcvNULL,. in which case no index will be
+**			returned.
+*/
+gceSTATUS
+gcOUTPUT_GetIndex(
+	IN gcOUTPUT Output,
+	OUT gctUINT * Index
+	);
+
+/*******************************************************************************
+**								gcOUTPUT_GetName
+********************************************************************************
+**
+**	Get the name of a gcOUTPUT object.
+**
+**	INPUT:
+**
+**		gcOUTPUT Output
+**			Pointer to a gcOUTPUT object.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * Length
+**			Pointer to a variable receiving the length of the output name.
+**			'Length' can be gcvNULL, in which case no length will be returned.
+**
+**		gctCONST_STRING * Name
+**			Pointer to a variable receiving the pointer to the output name.
+**			'Name' can be gcvNULL, in which case no name will be returned.
+*/
+gceSTATUS
+gcOUTPUT_GetName(
+	IN gcOUTPUT Output,
+	OUT gctSIZE_T * Length,
+	OUT gctCONST_STRING * Name
+	);
+
+/*******************************************************************************
+*********************************************************** F U N C T I O N S **
+*******************************************************************************/
+
+gceSTATUS
+gcFUNCTION_AddArgument(
+	IN gcFUNCTION Function,
+	IN gctUINT16 TempIndex,
+	IN gctUINT8 Enable,
+	IN gctUINT8 Qualifier
+	);
+
+gceSTATUS
+gcFUNCTION_GetArgument(
+	IN gcFUNCTION Function,
+	IN gctUINT16 Index,
+	OUT gctUINT16_PTR Temp,
+	OUT gctUINT8_PTR Enable,
+	OUT gctUINT8_PTR Swizzle
+	);
+
+gceSTATUS
+gcFUNCTION_GetLabel(
+	IN gcFUNCTION Function,
+	OUT gctUINT_PTR Label
+	);
+
+/*******************************************************************************
+**                              gcCompileShader
+********************************************************************************
+**
+**	Compile a shader.
+**
+**	INPUT:
+**
+**		gcoOS Hal
+**			Pointer to an gcoHAL object.
+**
+**		gctINT ShaderType
+**			Shader type to compile.  Can be one of the following values:
+**
+**				gcSHADER_TYPE_VERTEX
+**					Compile a vertex shader.
+**
+**				gcSHADER_TYPE_FRAGMENT
+**					Compile a fragment shader.
+**
+**		gctSIZE_T SourceSize
+**			Size of the source buffer in bytes.
+**
+**		gctCONST_STRING Source
+**			Pointer to the buffer containing the shader source code.
+**
+**	OUTPUT:
+**
+**		gcSHADER * Binary
+**			Pointer to a variable receiving the pointer to a gcSHADER object
+**			containg the compiled shader code.
+**
+**		gctSTRING * Log
+**			Pointer to a variable receiving a string pointer containging the
+**			compile log.
+*/
+gceSTATUS
+gcCompileShader(
+	IN gcoHAL Hal,
+	IN gctINT ShaderType,
+	IN gctSIZE_T SourceSize,
+	IN gctCONST_STRING Source,
+	OUT gcSHADER * Binary,
+	OUT gctSTRING * Log
+	);
+
+/*******************************************************************************
+**                              gcOptimizeShader
+********************************************************************************
+**
+**	Optimize a shader.
+**
+**	INPUT:
+**
+**		gcSHADER Shader
+**			Pointer to a gcSHADER object holding information about the compiled
+**			shader.
+**
+**		gctFILE LogFile
+**			Pointer to an open FILE object.
+*/
+gceSTATUS
+gcOptimizeShader(
+	IN gcSHADER Shader,
+	IN gctFILE LogFile
+	);
+
+/*******************************************************************************
+**                                gcLinkShaders
+********************************************************************************
+**
+**	Link two shaders and generate a harwdare specific state buffer by compiling
+**	the compiler generated code through the resource allocator and code
+**	generator.
+**
+**	INPUT:
+**
+**		gcSHADER VertexShader
+**			Pointer to a gcSHADER object holding information about the compiled
+**			vertex shader.
+**
+**		gcSHADER FragmentShader
+**			Pointer to a gcSHADER object holding information about the compiled
+**			fragment shader.
+**
+**		gceSHADER_FLAGS Flags
+**			Compiler flags.  Can be any of the following:
+**
+**				gcvSHADER_DEAD_CODE       - Dead code elimination.
+**				gcvSHADER_RESOURCE_USAGE  - Resource usage optimizaion.
+**				gcvSHADER_OPTIMIZER       - Full optimization.
+**				gcvSHADER_USE_GL_Z        - Use OpenGL ES Z coordinate.
+**				gcvSHADER_USE_GL_POSITION - Use OpenGL ES gl_Position.
+**				gcvSHADER_USE_GL_FACE     - Use OpenGL ES gl_FaceForward.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * StateBufferSize
+**			Pointer to a variable receicing the number of bytes in the buffer
+**			returned in 'StateBuffer'.
+**
+**		gctPOINTER * StateBuffer
+**			Pointer to a variable receiving a buffer pointer that contains the
+**			states required to download the shaders into the hardware.
+**
+**		gcsHINT_PTR * Hints
+**			Pointer to a variable receiving a gcsHINT structure pointer that
+**			contains information required when loading the shader states.
+*/
+gceSTATUS
+gcLinkShaders(
+	IN gcSHADER VertexShader,
+	IN gcSHADER FragmentShader,
+	IN gceSHADER_FLAGS Flags,
+	OUT gctSIZE_T * StateBufferSize,
+	OUT gctPOINTER * StateBuffer,
+	OUT gcsHINT_PTR * Hints
+	);
+
+/*******************************************************************************
+**                                gcLoadShaders
+********************************************************************************
+**
+**	Load a pre-compiled and pre-linked shader program into the hardware.
+**
+**	INPUT:
+**
+**		gcoHAL Hal
+**			Pointer to a gcoHAL object.
+**
+**		gctSIZE_T StateBufferSize
+**			The number of bytes in the 'StateBuffer'.
+**
+**		gctPOINTER StateBuffer
+**			Pointer to the states that make up the shader program.
+**
+**		gcsHINT_PTR Hints
+**			Pointer to a gcsHINT structure that contains information required
+**			when loading the shader states.
+**
+**		gcePRIMITIVE PrimitiveType
+**			Primitive type to be rendered.
+*/
+gceSTATUS
+gcLoadShaders(
+	IN gcoHAL Hal,
+	IN gctSIZE_T StateBufferSize,
+	IN gctPOINTER StateBuffer,
+	IN gcsHINT_PTR Hints,
+	IN gcePRIMITIVE PrimitiveType
+	);
+
+/*******************************************************************************
+**                                gcSaveProgram
+********************************************************************************
+**
+**	Save pre-compiled shaders and pre-linked programs to a binary file.
+**
+**	INPUT:
+**
+**		gcSHADER VertexShader
+**			Pointer to vertex shader object.
+**
+**		gcSHADER FragmentShader
+**			Pointer to fragment shader object.
+**
+**		gctSIZE_T ProgramBufferSize
+**			Number of bytes in 'ProgramBuffer'.
+**
+**		gctPOINTER ProgramBuffer
+**			Pointer to buffer containing the program states.
+**
+**		gcsHINT_PTR Hints
+**			Pointer to HINTS structure for program states.
+**
+**	OUTPUT:
+**
+**		gctPOINTER * Binary
+**			Pointer to a variable receiving the binary data to be saved.
+**
+**		gctSIZE_T * BinarySize
+**			Pointer to a variable receiving the number of bytes inside 'Binary'.
+*/
+gceSTATUS
+gcSaveProgram(
+	IN gcSHADER VertexShader,
+	IN gcSHADER FragmentShader,
+	IN gctSIZE_T ProgramBufferSize,
+	IN gctPOINTER ProgramBuffer,
+	IN gcsHINT_PTR Hints,
+	OUT gctPOINTER * Binary,
+	OUT gctSIZE_T * BinarySize
+	);
+
+/*******************************************************************************
+**                                gcLoadProgram
+********************************************************************************
+**
+**	Load pre-compiled shaders and pre-linked programs from a binary file.
+**
+**	INPUT:
+**
+**		gctPOINTER Binary
+**			Pointer to the binary data loaded.
+**
+**		gctSIZE_T BinarySize
+**			Number of bytes in 'Binary'.
+**
+**	OUTPUT:
+**
+**		gcSHADER * VertexShader
+**			Pointer to a variable receiving the vertex shader object.
+**
+**		gcSHADER * FragmentShader
+**			Pointer to a variable receiving the fragment shader object.
+**
+**		gctSIZE_T * ProgramBufferSize
+**			Pointer to a variable receicing the number of bytes in the buffer
+**			returned in 'ProgramBuffer'.
+**
+**		gctPOINTER * ProgramBuffer
+**			Pointer to a variable receiving a buffer pointer that contains the
+**			states required to download the shaders into the hardware.
+**
+**		gcsHINT_PTR * Hints
+**			Pointer to a variable receiving a gcsHINT structure pointer that
+**			contains information required when loading the shader states.
+*/
+gceSTATUS
+gcLoadProgram(
+	IN gctPOINTER Binary,
+	IN gctSIZE_T BinarySize,
+	OUT gcSHADER * VertexShader,
+	OUT gcSHADER * FragmentShader,
+	OUT gctSIZE_T * ProgramBufferSize,
+	OUT gctPOINTER * ProgramBuffer,
+	OUT gcsHINT_PTR * Hints
+	);
+
+#endif /* __gccompiler_h_ */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/aqTypes.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/aqTypes.h
@@ -0,0 +1,492 @@
+/****************************************************************************
+*  
+*    Copyright (C) 2002 - 2008 by Vivante Corp.
+*  
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public Lisence as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*  
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*  
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*  
+*****************************************************************************/
+
+
+
+
+
+
+#ifndef __aqtypes_h_
+#define __aqtypes_h_
+
+#include "gcOptions.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/******************************************************************************\
+************************************ Keyword ***********************************
+\******************************************************************************/
+
+#ifndef INLINE
+#  ifdef _MSC_VER
+#    define INLINE				__inline
+#  else
+#    define INLINE				inline
+#  endif
+#endif
+
+#ifdef _USRDLL
+#	ifdef WIN32
+#		ifdef HAL_EXPORTS
+#			define HALAPI		__declspec(dllexport)
+#		else
+#			define HALAPI		__declspec(dllimport)
+#		endif
+#		define HALDECL			__cdecl
+#	else
+#		ifdef HAL_EXPORTS
+#			define HALAPI
+#		else
+#			define HALAPI		extern
+#		endif
+#	endif
+#else
+#	define HALAPI
+#	define HALDECL
+#endif
+
+/******************************************************************************\
+********************************** Common Types ********************************
+\******************************************************************************/
+
+#define gcvFALSE				0
+#define gcvTRUE					1
+
+#define gcvINFINITE				((gctUINT32) ~0)
+
+typedef int						gctBOOL;
+typedef gctBOOL *				gctBOOL_PTR;
+
+typedef int						gctINT;
+typedef signed char				gctINT8;
+typedef signed short			gctINT16;
+typedef signed int				gctINT32;
+typedef signed long long		gctINT64;
+
+typedef gctINT *				gctINT_PTR;
+typedef gctINT8 *				gctINT8_PTR;
+typedef gctINT16 *				gctINT16_PTR;
+typedef gctINT32 *				gctINT32_PTR;
+typedef gctINT64 *				gctINT64_PTR;
+
+typedef unsigned int			gctUINT;
+typedef unsigned char			gctUINT8;
+typedef unsigned short			gctUINT16;
+typedef unsigned int			gctUINT32;
+typedef unsigned long long		gctUINT64;
+
+typedef gctUINT *				gctUINT_PTR;
+typedef gctUINT8 *				gctUINT8_PTR;
+typedef gctUINT16 *				gctUINT16_PTR;
+typedef gctUINT32 *				gctUINT32_PTR;
+typedef gctUINT64 *				gctUINT64_PTR;
+
+typedef unsigned long			gctSIZE_T;
+typedef gctSIZE_T *				gctSIZE_T_PTR;
+
+#ifdef __cplusplus
+#	define gcvNULL				0
+#else
+#	define gcvNULL				((void *) 0)
+#endif
+
+typedef float					gctFLOAT;
+typedef signed int				gctFIXED_POINT;
+typedef float *					gctFLOAT_PTR;
+
+typedef void *					gctPHYS_ADDR;
+typedef void *					gctHANDLE;
+typedef void *					gctFILE;
+typedef void *					gctSIGNAL;
+typedef void *					gctWINDOW;
+typedef void *					gctIMAGE;
+
+typedef void *					gctPOINTER;
+typedef const void *			gctCONST_POINTER;
+
+typedef char					gctCHAR;
+typedef char *					gctSTRING;
+typedef const char *			gctCONST_STRING;
+
+typedef struct _gcsCOUNT_STRING
+{
+	gctSIZE_T					Length;
+	gctCONST_STRING				String;
+}
+gcsCOUNT_STRING;
+
+/* Fixed point constants. */
+#define gcvZERO_X				((gctFIXED_POINT) 0x00000000)
+#define gcvHALF_X				((gctFIXED_POINT) 0x00008000)
+#define gcvONE_X				((gctFIXED_POINT) 0x00010000)
+#define gcvNEGONE_X				((gctFIXED_POINT) 0xFFFF0000)
+#define gcvTWO_X				((gctFIXED_POINT) 0x00020000)
+
+/* 2D Engine profile. */
+struct gco2D_PROFILE
+{
+	/* Cycle count. 
+	   32bit counter incremented every 2D clock cycle. 
+	   Wraps back to 0 when the counter overflows.
+	*/
+	gctUINT32 cycleCount;
+
+	/* Pixels rendered by the 2D engine.
+	   Resets to 0 every time it is read. */
+	gctUINT32 pixelsRendered;
+};
+
+/******************************************************************************\
+****************************** Function Parameters *****************************
+\******************************************************************************/
+
+#define IN
+#define OUT
+#define OPTIONAL
+
+
+/******************************************************************************\
+********************************* Status Codes *********************************
+\******************************************************************************/
+
+typedef enum _gceSTATUS
+{
+	gcvSTATUS_OK					= 	0,
+	gcvSTATUS_FALSE					= 	0,
+	gcvSTATUS_TRUE					= 	1,
+	gcvSTATUS_NO_MORE_DATA 			= 	2,
+	gcvSTATUS_CACHED				= 	3,
+	gcvSTATUS_MIPMAP_TOO_LARGE		= 	4,
+	gcvSTATUS_NAME_NOT_FOUND		=	5,
+	gcvSTATUS_NOT_OUR_INTERRUPT		=	6,
+	gcvSTATUS_MISMATCH				=	7,
+	gcvSTATUS_MIPMAP_TOO_SMALL		=	8,
+	gcvSTATUS_LARGER				=	9,
+	gcvSTATUS_SMALLER				=	10,
+	gcvSTATUS_CHIP_NOT_READY		= 	11,
+	gcvSTATUS_NEED_CONVERSION		=	12,
+	gcvSTATUS_SKIP					=	13,
+	gcvSTATUS_DATA_TOO_LARGE		=	14,
+	gcvSTATUS_INVALID_CONFIG		=	15,
+
+	gcvSTATUS_INVALID_ARGUMENT		= 	-1,
+	gcvSTATUS_INVALID_OBJECT 		= 	-2,
+	gcvSTATUS_OUT_OF_MEMORY 		= 	-3,
+	gcvSTATUS_MEMORY_LOCKED			= 	-4,
+	gcvSTATUS_MEMORY_UNLOCKED		= 	-5,
+	gcvSTATUS_HEAP_CORRUPTED		= 	-6,
+	gcvSTATUS_GENERIC_IO			= 	-7,
+	gcvSTATUS_INVALID_ADDRESS		= 	-8,
+	gcvSTATUS_CONTEXT_LOSSED		= 	-9,
+	gcvSTATUS_TOO_COMPLEX			= 	-10,
+	gcvSTATUS_BUFFER_TOO_SMALL		= 	-11,
+	gcvSTATUS_INTERFACE_ERROR		= 	-12,
+	gcvSTATUS_NOT_SUPPORTED			= 	-13,
+	gcvSTATUS_MORE_DATA				= 	-14,
+	gcvSTATUS_TIMEOUT				= 	-15,
+	gcvSTATUS_OUT_OF_RESOURCES		= 	-16,
+	gcvSTATUS_INVALID_DATA			= 	-17,
+	gcvSTATUS_INVALID_MIPMAP		= 	-18,
+	gcvSTATUS_NOT_FOUND				=	-19,
+	gcvSTATUS_NOT_ALIGNED			=	-20,
+	gcvSTATUS_INVALID_REQUEST		=	-21,
+
+	/* Linker errors. */
+	gcvSTATUS_GLOBAL_TYPE_MISMATCH	=	-1000,
+	gcvSTATUS_TOO_MANY_ATTRIBUTES	=	-1001,
+	gcvSTATUS_TOO_MANY_UNIFORMS		=	-1002,
+	gcvSTATUS_TOO_MANY_VARYINGS		=	-1003,
+	gcvSTATUS_UNDECLARED_VARYING	=	-1004,
+	gcvSTATUS_VARYING_TYPE_MISMATCH	=	-1005,
+	gcvSTATUS_MISSING_MAIN			=	-1006,
+	gcvSTATUS_NAME_MISMATCH			=	-1007,
+	gcvSTATUS_INVALID_INDEX			=	-1008,
+}
+gceSTATUS;
+
+
+/******************************************************************************\
+********************************* Status Macros ********************************
+\******************************************************************************/
+
+#define gcmIS_ERROR(status)			(status < 0)
+#define gcmNO_ERROR(status)			(status >= 0)
+#define gcmIS_SUCCESS(status)		(status == gcvSTATUS_OK)
+
+
+/******************************************************************************\
+********************************* Field Macros *********************************
+\******************************************************************************/
+
+#define __gcmSTART(reg_field) \
+	(0 ? reg_field)
+
+#define __gcmEND(reg_field) \
+	(1 ? reg_field)
+
+#define __gcmGETSIZE(reg_field) \
+	(__gcmEND(reg_field) - __gcmSTART(reg_field) + 1)
+
+#define __gcmALIGN(data, reg_field) \
+	(((gctUINT32) (data)) << __gcmSTART(reg_field))
+
+#define __gcmMASK(reg_field) \
+	((gctUINT32) ((__gcmGETSIZE(reg_field) == 32) \
+		?  ~0 \
+		: (~(~0 << __gcmGETSIZE(reg_field)))))
+
+
+/*******************************************************************************
+**
+**	gcmFIELDMASK
+**
+**		Get aligned field mask.
+**
+**	ARGUMENTS:
+**
+**		reg		Name of register.
+**		field	Name of field within register.
+*/
+#define gcmFIELDMASK(reg, field) \
+( \
+	__gcmALIGN(__gcmMASK(reg##_##field), reg##_##field) \
+)
+
+
+/*******************************************************************************
+**
+**	gcmGETFIELD
+**
+**		Extract the value of a field from specified data.
+**
+**	ARGUMENTS:
+**
+**		data	Data value.
+**		reg		Name of register.
+**		field	Name of field within register.
+*/
+#define gcmGETFIELD(data, reg, field) \
+( \
+	((((gctUINT32) (data)) >> __gcmSTART(reg##_##field)) \
+		& __gcmMASK(reg##_##field)) \
+)
+
+
+/*******************************************************************************
+**
+**	gcmSETFIELD
+**
+**		Set the value of a field within specified data.
+**
+**	ARGUMENTS:
+**
+**		data	Data value.
+**		reg		Name of register.
+**		field	Name of field within register.
+**		value	Value for field.
+*/
+#define gcmSETFIELD(data, reg, field, value) \
+( \
+	(((gctUINT32) (data)) \
+		& ~__gcmALIGN(__gcmMASK(reg##_##field), reg##_##field)) \
+		|  __gcmALIGN((gctUINT32) (value) \
+			& __gcmMASK(reg##_##field), reg##_##field) \
+)
+
+
+/*******************************************************************************
+**
+**	gcmSETFIELDVALUE
+**
+**		Set the value of a field within specified data with a
+**		predefined value.
+**
+**	ARGUMENTS:
+**
+**		data	Data value.
+**		reg		Name of register.
+**		field	Name of field within register.
+**		value	Name of the value within the field.
+*/
+#define gcmSETFIELDVALUE(data, reg, field, value) \
+( \
+	(((gctUINT32) (data)) \
+		& ~__gcmALIGN(__gcmMASK(reg##_##field), reg##_##field)) \
+		|  __gcmALIGN(reg##_##field##_##value \
+			& __gcmMASK(reg##_##field), reg##_##field) \
+)
+
+
+/*******************************************************************************
+**
+**	gcmSETMASKEDFIELD
+**
+**		Set the value of a masked field with specified data.
+**
+**	ARGUMENTS:
+**
+**		reg		Name of register.
+**		field	Name of field within register.
+**		value	Value for field.
+*/
+#define gcmSETMASKEDFIELD(reg, field, value) \
+( \
+	gcmSETFIELD(~0, reg, field, value) & \
+	gcmSETFIELDVALUE(~0, reg, MASK_ ## field, ENABLED) \
+)
+
+
+/*******************************************************************************
+**
+**	gcmVERIFYFIELDVALUE
+**
+**		Verify if the value of a field within specified data equals a
+**		predefined value.
+**
+**	ARGUMENTS:
+**
+**		data	Data value.
+**		reg		Name of register.
+**		field	Name of field within register.
+**		value	Name of the value within the field.
+*/
+#define gcmVERIFYFIELDVALUE(data, reg, field, value) \
+( \
+	(((gctUINT32) (data)) >> __gcmSTART(reg##_##field) & \
+							 __gcmMASK(reg##_##field)) \
+		== \
+	(reg##_##field##_##value & __gcmMASK(reg##_##field)) \
+)
+
+
+/******************************************************************************\
+******************************** Min/Max Macros ********************************
+\******************************************************************************/
+
+#define gcmMIN(x, y)			(((x) <= (y)) ?  (x) :  (y))
+#define gcmMAX(x, y)			(((x) >= (y)) ?  (x) :  (y))
+#define gcmCLAMP(x, min, max)	(((x) < (min)) ? (min) : \
+								 ((x) > (max)) ? (max) : (x))
+#define gcmABS(x)				(((x) < 0)    ? -(x) :  (x))
+#define gcmNEG(x)				(((x) < 0)    ?  (x) : -(x))
+
+
+/*******************************************************************************
+**
+**	gcmOFFSETOF
+**
+**		Compute the byte offset of a field inside a structure.
+**
+**	ARGUMENTS:
+**
+**		s		Structure name.
+**		field	Field name.
+*/
+#ifdef LINUX
+#	define gcmOFFSETOF(s, field) \
+	( \
+		(gctUINT32) & (((struct s *) 0)->field) \
+	)
+#else
+#	define gcmOFFSETOF(s, field) \
+	( \
+		(gctUINT32) (gctUINT64) & (((struct s *) 0)->field) \
+	)
+#endif
+
+
+/*******************************************************************************
+**
+**	gcmPTR2INT
+**
+**		Convert a pointer to an integer value.
+**
+**	ARGUMENTS:
+**
+**		p		Pointer value.
+*/
+#ifdef LINUX
+#	define gcmPTR2INT(p) \
+	( \
+		(gctUINT32) (p) \
+	)
+#else
+#	define gcmPTR2INT(p) \
+	( \
+		(gctUINT32) (gctUINT64) (p) \
+	)
+#endif
+
+
+/*******************************************************************************
+**
+**	gcmINT2PTR
+**
+**		Convert an integer value into a pointer.
+**
+**	ARGUMENTS:
+**
+**		v		Integer value.
+*/
+#ifdef LINUX
+#	define gcmINT2PTR(v) \
+	( \
+		(gctPOINTER) (v) \
+	)
+#else
+#	define gcmINT2PTR(v) \
+	( \
+		(gctPOINTER) (gctUINT64) (v) \
+	)
+#endif
+
+
+/******************************************************************************\
+******************************* Version Macros ********************************
+\******************************************************************************/
+
+/*******************************************************************************
+**
+**	Version Macros.
+**
+**	Version value gets read from the hardware register and has the following
+**	format:
+**
+**		[31:24]		Major revision.
+**		[23:16]		Minor revision.
+**		[15:0]		Maintenance revision.
+*/
+
+#define gcmVERMAJOR(v) \
+	(((v) >> 24) & 0xFF)
+
+#define gcmVERMINOR(v) \
+	(((v) >> 16) & 0xFF)
+
+#define gcmVERMAINTENANCE(v) \
+	((v) & 0xFFFF)
+
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif
+#endif /* __aqtypes_h_ */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gcHAL_2D.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gcHAL_2D.h
@@ -0,0 +1,796 @@
+/****************************************************************************
+*
+*    Copyright (C) 2002 - 2008 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public Lisence as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+/*
+ * Include file for the 2D stuff.
+ */
+
+#ifndef __gchal_2d_h_
+#define __gchal_2d_h_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "aqHalEnum.h"
+#include "aqTypes.h"
+
+/******************************************************************************\
+****************************** Object Declarations *****************************
+\******************************************************************************/
+
+typedef struct _gcoBRUSH *				gcoBRUSH;
+typedef struct _gcoBRUSH_CACHE *  		gcoBRUSH_CACHE;
+
+/******************************************************************************\
+******************************** gcoBRUSH Object *******************************
+\******************************************************************************/
+
+/* Create a new solid color gcoBRUSH object. */
+gceSTATUS
+gcoBRUSH_ConstructSingleColor(
+	IN gcoHAL Hal,
+	IN gctUINT32 ColorConvert,
+	IN gctUINT32 Color,
+	IN gctUINT64 Mask,
+	gcoBRUSH * Brush
+	);
+
+/* Create a new monochrome gcoBRUSH object. */
+gceSTATUS
+gcoBRUSH_ConstructMonochrome(
+	IN gcoHAL Hal,
+	IN gctUINT32 OriginX,
+	IN gctUINT32 OriginY,
+	IN gctUINT32 ColorConvert,
+	IN gctUINT32 FgColor,
+	IN gctUINT32 BgColor,
+	IN gctUINT64 Bits,
+	IN gctUINT64 Mask,
+	gcoBRUSH * Brush
+	);
+
+/* Create a color gcoBRUSH object. */
+gceSTATUS
+gcoBRUSH_ConstructColor(
+	IN gcoHAL Hal,
+	IN gctUINT32 OriginX,
+	IN gctUINT32 OriginY,
+	IN gctPOINTER Address,
+	IN gceSURF_FORMAT Format,
+	IN gctUINT64 Mask,
+	gcoBRUSH * Brush
+	);
+
+/* Destroy an gcoBRUSH object. */
+gceSTATUS
+gcoBRUSH_Destroy(
+	IN gcoBRUSH Brush
+	);
+
+/******************************************************************************\
+******************************** gcoSURF Object *******************************
+\******************************************************************************/
+
+/* Set cipping rectangle. */
+gceSTATUS
+gcoSURF_SetClipping(
+	IN gcoSURF Surface
+	);
+
+/* Clear one or more rectangular areas. */
+gceSTATUS
+gcoSURF_Clear2D(
+	IN gcoSURF DestSurface,
+	IN gctUINT32 RectCount,
+	IN gcsRECT_PTR DestRect,
+	IN gctUINT32 LoColor,
+	IN gctUINT32 HiColor
+	);
+
+/* Draw one or more Bresenham lines. */
+gceSTATUS
+gcoSURF_Line(
+	IN gcoSURF Surface,
+	IN gctUINT32 LineCount,
+	IN gcsRECT_PTR Position,
+	IN gcoBRUSH Brush,
+	IN gctUINT8 FgRop,
+	IN gctUINT8 BgRop
+	);
+
+/* Generic rectangular blit. */
+gceSTATUS
+gcoSURF_Blit(
+	IN OPTIONAL gcoSURF SrcSurface,
+	IN gcoSURF DestSurface,
+	IN gctUINT32 RectCount,
+	IN OPTIONAL gcsRECT_PTR SrcRect,
+	IN gcsRECT_PTR DestRect,
+	IN OPTIONAL gcoBRUSH Brush,
+	IN gctUINT8 FgRop,
+	IN gctUINT8 BgRop,
+	IN OPTIONAL gceSURF_TRANSPARENCY Transparency,
+	IN OPTIONAL gctUINT32 TransparencyColor,
+	IN OPTIONAL gctPOINTER Mask,
+	IN OPTIONAL gceSURF_MONOPACK MaskPack
+	);
+
+/* Monochrome blit. */
+gceSTATUS
+gcoSURF_MonoBlit(
+	IN gcoSURF DestSurface,
+	IN gctPOINTER Source,
+	IN gceSURF_MONOPACK SourcePack,
+	IN gcsPOINT_PTR SourceSize,
+	IN gcsPOINT_PTR SourceOrigin,
+	IN gcsRECT_PTR DestRect,
+	IN OPTIONAL gcoBRUSH Brush,
+	IN gctUINT8 FgRop,
+	IN gctUINT8 BgRop,
+	IN gctBOOL ColorConvert,
+	IN gctUINT8 MonoTransparency,
+	IN gceSURF_TRANSPARENCY Transparency,
+	IN gctUINT32 FgColor,
+	IN gctUINT32 BgColor
+	);
+
+/* Filter blit. */
+gceSTATUS
+gcoSURF_FilterBlit(
+	IN gcoSURF SrcSurface,
+	IN gcoSURF DestSurface,
+	IN gcsRECT_PTR SrcRect,
+	IN gcsRECT_PTR DestRect,
+	IN gcsRECT_PTR DestSubRect
+	);
+
+/* Enable alpha blending engine in the hardware and disengage the ROP engine. */
+gceSTATUS
+gcoSURF_EnableAlphaBlend(
+	IN gcoSURF Surface,
+	IN gctUINT8 SrcGlobalAlphaValue,
+	IN gctUINT8 DstGlobalAlphaValue,
+	IN gceSURF_PIXEL_ALPHA_MODE SrcAlphaMode,
+	IN gceSURF_PIXEL_ALPHA_MODE DstAlphaMode,
+	IN gceSURF_GLOBAL_ALPHA_MODE SrcGlobalAlphaMode,
+	IN gceSURF_GLOBAL_ALPHA_MODE DstGlobalAlphaMode,
+	IN gceSURF_BLEND_FACTOR_MODE SrcFactorMode,
+	IN gceSURF_BLEND_FACTOR_MODE DstFactorMode,
+	IN gceSURF_PIXEL_COLOR_MODE SrcColorMode,
+	IN gceSURF_PIXEL_COLOR_MODE DstColorMode
+	);
+
+/* Disable alpha blending engine in the hardware and engage the ROP engine. */
+gceSTATUS
+gcoSURF_DisableAlphaBlend(
+	IN gcoSURF Surface
+	);
+
+/* Copy a rectangular area with format conversion. */
+gceSTATUS
+gcoSURF_CopyPixels(
+	IN gcoSURF Source,
+	IN gcoSURF Target,
+	IN gctINT SourceX,
+	IN gctINT SourceY,
+	IN gctINT TargetX,
+	IN gctINT TargetY,
+	IN gctINT Width,
+	IN gctINT Height
+	);
+
+/* Read surface pixel. */
+gceSTATUS
+gcoSURF_ReadPixel(
+	IN gcoSURF Surface,
+	IN gctPOINTER Memory,
+	IN gctINT X,
+	IN gctINT Y,
+	IN gceSURF_FORMAT Format,
+	OUT gctPOINTER PixelValue
+	);
+
+/* Write surface pixel. */
+gceSTATUS
+gcoSURF_WritePixel(
+	IN gcoSURF Surface,
+	IN gctPOINTER Memory,
+	IN gctINT X,
+	IN gctINT Y,
+	IN gceSURF_FORMAT Format,
+	IN gctPOINTER PixelValue
+	);
+
+/******************************************************************************\
+********************************** gco2D Object *********************************
+\******************************************************************************/
+
+/* Construct a new gco2D object. */
+gceSTATUS
+gco2D_Construct(
+	IN gcoHAL Hal,
+	OUT gco2D * Hardware
+	);
+
+/* Destroy an gco2D object. */
+gceSTATUS
+gco2D_Destroy(
+	IN gco2D Hardware
+	);
+
+/* Sets the maximum number of brushes in the brush cache. */
+gceSTATUS
+gco2D_SetBrushLimit(
+	IN gco2D Hardware,
+	IN gctUINT MaxCount
+	);
+
+/* Flush the brush. */
+gceSTATUS
+gco2D_FlushBrush(
+	IN gco2D Engine,
+	IN gcoBRUSH Brush,
+	IN gceSURF_FORMAT Format
+	);
+
+/* Program the specified solid color brush. */
+gceSTATUS
+gco2D_LoadSolidBrush(
+	IN gco2D Engine,
+	IN gceSURF_FORMAT Format,
+	IN gctUINT32 ColorConvert,
+	IN gctUINT32 Color,
+	IN gctUINT64 Mask
+	);
+
+/* Configure monochrome source. */
+gceSTATUS
+gco2D_SetMonochromeSource(
+	IN gco2D Engine,
+	IN gctBOOL ColorConvert,
+	IN gctUINT8 MonoTransparency,
+	IN gceSURF_MONOPACK DataPack,
+	IN gctBOOL CoordRelative,
+	IN gceSURF_TRANSPARENCY Transparency,
+	IN gctUINT32 FgColor,
+	IN gctUINT32 BgColor
+	);
+
+/* Configure color source. */
+gceSTATUS
+gco2D_SetColorSource(
+	IN gco2D Engine,
+	IN gctUINT32 Address,
+	IN gctUINT32 Stride,
+	IN gceSURF_FORMAT Format,
+	IN gceSURF_ROTATION Rotation,
+	IN gctUINT32 SurfaceWidth,
+	IN gctBOOL CoordRelative,
+	IN gceSURF_TRANSPARENCY Transparency,
+	IN gctUINT32 TransparencyColor
+	);
+
+/* Configure color source extension for full rotation. */
+gceSTATUS
+gco2D_SetColorSourceEx(
+	IN gco2D Engine,
+	IN gctUINT32 Address,
+	IN gctUINT32 Stride,
+	IN gceSURF_FORMAT Format,
+	IN gceSURF_ROTATION Rotation,
+	IN gctUINT32 SurfaceWidth,
+	IN gctUINT32 SurfaceHeight,
+	IN gctBOOL CoordRelative,
+	IN gceSURF_TRANSPARENCY Transparency,
+	IN gctUINT32 TransparencyColor
+	);
+
+/* Configure color source. */
+gceSTATUS
+gco2D_SetColorSourceAdvanced(
+	IN gco2D Engine,
+	IN gctUINT32 Address,
+	IN gctUINT32 Stride,
+	IN gceSURF_FORMAT Format,
+	IN gceSURF_ROTATION Rotation,
+	IN gctUINT32 SurfaceWidth,
+	IN gctUINT32 SurfaceHeight,
+	IN gctBOOL CoordRelative
+	);
+
+/* Configure masked color source. */
+gceSTATUS
+gco2D_SetMaskedSource(
+	IN gco2D Engine,
+	IN gctUINT32 Address,
+	IN gctUINT32 Stride,
+	IN gceSURF_FORMAT Format,
+	IN gctBOOL CoordRelative,
+	IN gceSURF_MONOPACK MaskPack
+	);
+
+/* Configure masked color source extension for full rotation. */
+gceSTATUS
+gco2D_SetMaskedSourceEx(
+	IN gco2D Engine,
+	IN gctUINT32 Address,
+	IN gctUINT32 Stride,
+	IN gceSURF_FORMAT Format,
+	IN gctBOOL CoordRelative,
+	IN gceSURF_MONOPACK MaskPack,
+	IN gceSURF_ROTATION Rotation,
+	IN gctUINT32 SurfaceWidth,
+	IN gctUINT32 SurfaceHeight
+	);
+
+/* Setup the source rectangle. */
+gceSTATUS
+gco2D_SetSource(
+	IN gco2D Engine,
+	IN gcsRECT_PTR SrcRect
+	);
+
+/* Set clipping rectangle. */
+gceSTATUS
+gco2D_SetClipping(
+	IN gco2D Engine,
+	IN gcsRECT_PTR Rect
+	);
+
+/* Configure destination. */
+gceSTATUS
+gco2D_SetTarget(
+	IN gco2D Engine,
+	IN gctUINT32 Address,
+	IN gctUINT32 Stride,
+	IN gceSURF_ROTATION Rotation,
+	IN gctUINT32 SurfaceWidth
+	);
+
+/* Configure destination extension for full rotation. */
+gceSTATUS
+gco2D_SetTargetEx(
+	IN gco2D Engine,
+	IN gctUINT32 Address,
+	IN gctUINT32 Stride,
+	IN gceSURF_ROTATION Rotation,
+	IN gctUINT32 SurfaceWidth,
+	IN gctUINT32 SurfaceHeight
+	);
+
+/* Calculate and program the stretch factors. */
+gceSTATUS
+gco2D_SetStretchFactors(
+	IN gco2D Engine,
+	IN gctUINT32 HorFactor,
+	IN gctUINT32 VerFactor
+	);
+
+/* Calculate and program the stretch factors based on the rectangles. */
+gceSTATUS
+gco2D_SetStretchRectFactors(
+	IN gco2D Engine,
+	IN gcsRECT_PTR SrcRect,
+	IN gcsRECT_PTR DestRect
+	);
+
+/* Create a new solid color gcoBRUSH object. */
+gceSTATUS
+gco2D_ConstructSingleColorBrush(
+	IN gco2D Engine,
+	IN gctUINT32 ColorConvert,
+	IN gctUINT32 Color,
+	IN gctUINT64 Mask,
+	gcoBRUSH * Brush
+	);
+
+/* Create a new monochrome gcoBRUSH object. */
+gceSTATUS
+gco2D_ConstructMonochromeBrush(
+	IN gco2D Engine,
+	IN gctUINT32 OriginX,
+	IN gctUINT32 OriginY,
+	IN gctUINT32 ColorConvert,
+	IN gctUINT32 FgColor,
+	IN gctUINT32 BgColor,
+	IN gctUINT64 Bits,
+	IN gctUINT64 Mask,
+	gcoBRUSH * Brush
+	);
+
+/* Create a color gcoBRUSH object. */
+gceSTATUS
+gco2D_ConstructColorBrush(
+	IN gco2D Engine,
+	IN gctUINT32 OriginX,
+	IN gctUINT32 OriginY,
+	IN gctPOINTER Address,
+	IN gceSURF_FORMAT Format,
+	IN gctUINT64 Mask,
+	gcoBRUSH * Brush
+	);
+
+/* Clear one or more rectangular areas. */
+gceSTATUS
+gco2D_Clear(
+	IN gco2D Engine,
+	IN gctUINT32 RectCount,
+	IN gcsRECT_PTR Rect,
+	IN gctUINT32 Color32,
+	IN gctUINT8 FgRop,
+	IN gctUINT8 BgRop,
+	IN gceSURF_FORMAT DestFormat
+	);
+
+
+gceSTATUS
+gco2D_ClearEx(
+	IN gco2D Engine,
+	IN gctUINT32 RectCount,
+	IN gcsRECT_PTR Rect,
+	IN gctUINT32 Color32,
+	IN gctUINT8 FgRop,
+	IN gctUINT8 BgRop,
+	IN gceSURF_FORMAT DestFormat
+	);
+
+/* Draw one or more Bresenham lines. */
+gceSTATUS
+gco2D_Line(
+	IN gco2D Engine,
+	IN gctUINT32 LineCount,
+	IN gcsRECT_PTR Position,
+	IN gcoBRUSH Brush,
+	IN gctUINT8 FgRop,
+	IN gctUINT8 BgRop,
+	IN gceSURF_FORMAT DestFormat
+	);
+
+/* Draw one or more Bresenham lines based on the 32-bit color. */
+gceSTATUS
+gco2D_ColorLine(
+	IN gco2D Engine,
+	IN gctUINT32 LineCount,
+	IN gcsRECT_PTR Position,
+	IN gctUINT32 Color32,
+	IN gctUINT8 FgRop,
+	IN gctUINT8 BgRop,
+	IN gceSURF_FORMAT DestFormat
+	);
+
+/* Generic blit. */
+gceSTATUS
+gco2D_Blit(
+	IN gco2D Engine,
+	IN gctUINT32 RectCount,
+	IN gcsRECT_PTR Rect,
+	IN gctUINT8 FgRop,
+	IN gctUINT8 BgRop,
+	IN gceSURF_FORMAT DestFormat
+	);
+
+/* Batch blit. */
+gceSTATUS
+gco2D_BatchBlit(
+	IN gco2D Engine,
+	IN gctUINT32 RectCount,
+	IN gcsRECT_PTR SrcRect,
+	IN gcsRECT_PTR DestRect,
+	IN gctUINT8 FgRop,
+	IN gctUINT8 BgRop,
+	IN gceSURF_FORMAT DestFormat
+	);
+
+/* Stretch blit. */
+gceSTATUS
+gco2D_StretchBlit(
+	IN gco2D Engine,
+	IN gctUINT32 RectCount,
+	IN gcsRECT_PTR Rect,
+	IN gctUINT8 FgRop,
+	IN gctUINT8 BgRop,
+	IN gceSURF_FORMAT DestFormat
+	);
+
+/* Monochrome blit. */
+gceSTATUS
+gco2D_MonoBlit(
+	IN gco2D Engine,
+	IN gctPOINTER StreamBits,
+	IN gcsPOINT_PTR StreamSize,
+	IN gcsRECT_PTR StreamRect,
+	IN gceSURF_MONOPACK SrcStreamPack,
+	IN gceSURF_MONOPACK DestStreamPack,
+	IN gcsRECT_PTR DestRect,
+	IN gctUINT32 FgRop,
+	IN gctUINT32 BgRop,
+	IN gceSURF_FORMAT DestFormat
+	);
+
+/* Set kernel size. */
+gceSTATUS
+gco2D_SetKernelSize(
+	IN gco2D Engine,
+	IN gctUINT8 HorKernelSize,
+	IN gctUINT8 VerKernelSize
+	);
+
+/* Set filter type. */
+gceSTATUS
+gco2D_SetFilterType(
+	IN gco2D Engine,
+	IN gceFILTER_TYPE FilterType
+	);
+
+/* Set the filter kernel by user. */
+gceSTATUS
+gco2D_SetUserFilterKernel(
+	IN gco2D Engine,
+	IN gceFILTER_PASS_TYPE PassType,
+	IN gctUINT16_PTR KernelArray
+	);
+
+/* Select the pass(es) to be done for user defined filter. */
+gceSTATUS
+gco2D_EnableUserFilterPasses(
+	IN gco2D Engine,
+	IN gctBOOL HorPass,
+	IN gctBOOL VerPass
+	);
+
+/* Frees the temporary buffer allocated by filter blit operation. */
+gceSTATUS
+gco2D_FreeFilterBuffer(
+	IN gco2D Engine
+	);
+
+/* Filter blit. */
+gceSTATUS
+gco2D_FilterBlit(
+	IN gco2D Engine,
+	IN gctUINT32 SrcAddress,
+	IN gctUINT SrcStride,
+	IN gctUINT32 SrcUAddress,
+	IN gctUINT SrcUStride,
+	IN gctUINT32 SrcVAddress,
+	IN gctUINT SrcVStride,
+	IN gceSURF_FORMAT SrcFormat,
+	IN gceSURF_ROTATION SrcRotation,
+	IN gctUINT32 SrcSurfaceWidth,
+	IN gcsRECT_PTR SrcRect,
+	IN gctUINT32 DestAddress,
+	IN gctUINT DestStride,
+	IN gceSURF_FORMAT DestFormat,
+	IN gceSURF_ROTATION DestRotation,
+	IN gctUINT32 DestSurfaceWidth,
+	IN gcsRECT_PTR DestRect,
+	IN gcsRECT_PTR DestSubRect
+	);
+
+/* Filter blit extension for full rotation. */
+gceSTATUS
+gco2D_FilterBlitEx(
+	IN gco2D Engine,
+	IN gctUINT32 SrcAddress,
+	IN gctUINT SrcStride,
+	IN gctUINT32 SrcUAddress,
+	IN gctUINT SrcUStride,
+	IN gctUINT32 SrcVAddress,
+	IN gctUINT SrcVStride,
+	IN gceSURF_FORMAT SrcFormat,
+	IN gceSURF_ROTATION SrcRotation,
+	IN gctUINT32 SrcSurfaceWidth,
+	IN gctUINT32 SrcSurfaceHeight,
+	IN gcsRECT_PTR SrcRect,
+	IN gctUINT32 DestAddress,
+	IN gctUINT DestStride,
+	IN gceSURF_FORMAT DestFormat,
+	IN gceSURF_ROTATION DestRotation,
+	IN gctUINT32 DestSurfaceWidth,
+	IN gctUINT32 DestSurfaceHeight,
+	IN gcsRECT_PTR DestRect,
+	IN gcsRECT_PTR DestSubRect
+	);
+
+/* Enable alpha blending engine in the hardware and disengage the ROP engine. */
+gceSTATUS
+gco2D_EnableAlphaBlend(
+	IN gco2D Engine,
+	IN gctUINT8 SrcGlobalAlphaValue,
+	IN gctUINT8 DstGlobalAlphaValue,
+	IN gceSURF_PIXEL_ALPHA_MODE SrcAlphaMode,
+	IN gceSURF_PIXEL_ALPHA_MODE DstAlphaMode,
+	IN gceSURF_GLOBAL_ALPHA_MODE SrcGlobalAlphaMode,
+	IN gceSURF_GLOBAL_ALPHA_MODE DstGlobalAlphaMode,
+	IN gceSURF_BLEND_FACTOR_MODE SrcFactorMode,
+	IN gceSURF_BLEND_FACTOR_MODE DstFactorMode,
+	IN gceSURF_PIXEL_COLOR_MODE SrcColorMode,
+	IN gceSURF_PIXEL_COLOR_MODE DstColorMode
+	);
+
+/* Enable alpha blending engine in the hardware. */
+gceSTATUS
+gco2D_EnableAlphaBlendAdvanced(
+	IN gco2D Engine,
+	IN gceSURF_PIXEL_ALPHA_MODE SrcAlphaMode,
+	IN gceSURF_PIXEL_ALPHA_MODE DstAlphaMode,
+	IN gceSURF_GLOBAL_ALPHA_MODE SrcGlobalAlphaMode,
+	IN gceSURF_GLOBAL_ALPHA_MODE DstGlobalAlphaMode,
+	IN gceSURF_BLEND_FACTOR_MODE SrcFactorMode,
+	IN gceSURF_BLEND_FACTOR_MODE DstFactorMode
+	);
+
+/* Enable alpha blending engine with Porter Duff rule. */
+gceSTATUS
+gco2D_SetPorterDuffBlending(
+	IN gco2D Engine,
+	IN gce2D_PORTER_DUFF_RULE Rule
+	);
+
+/* Disable alpha blending engine in the hardware and engage the ROP engine. */
+gceSTATUS
+gco2D_DisableAlphaBlend(
+	IN gco2D Engine
+	);
+
+/* Retrieve the maximum number of 32-bit data chunks for a single DE command. */
+gctUINT32
+gco2D_GetMaximumDataCount(
+	void
+	);
+
+/* Retrieve the maximum number of rectangles, that can be passed in a single DE command. */
+gctUINT32
+gco2D_GetMaximumRectCount(
+	void
+	);
+
+/* Returns the pixel alignment of the surface. */
+gceSTATUS
+gco2D_GetPixelAlignment(
+	gceSURF_FORMAT Format,
+	gcsPOINT_PTR Alignment
+	);
+
+/* Retrieve monochrome stream pack size. */
+gceSTATUS
+gco2D_GetPackSize(
+	IN gceSURF_MONOPACK StreamPack,
+	OUT gctUINT32 * PackWidth,
+	OUT gctUINT32 * PackHeight
+	);
+
+/* Flush the 2D pipeline. */
+gceSTATUS
+gco2D_Flush(
+	IN gco2D Engine
+	);
+
+/* Load 256-entry color table for INDEX8 source surfaces. */
+gceSTATUS
+gco2D_LoadPalette(
+	IN gco2D Engine,
+	IN gctUINT FirstIndex,
+	IN gctUINT IndexCount,
+	IN gctPOINTER ColorTable,
+	IN gctBOOL ColorConvert
+	);
+
+/* Enable/disable 2D BitBlt mirrorring. */
+gceSTATUS
+gco2D_SetBitBlitMirror(
+	IN gco2D Engine,
+	IN gctBOOL HorizontalMirror,
+	IN gctBOOL VerticalMirror
+	);
+
+/* Set the transparency for source, destination and pattern. */
+gceSTATUS
+gco2D_SetTransparencyAdvanced(
+	IN gco2D Engine,
+	IN gce2D_TRANSPARENCY SrcTransparency,
+	IN gce2D_TRANSPARENCY DstTransparency,
+	IN gce2D_TRANSPARENCY PatTransparency
+	);
+
+/* Set the source color key. */
+gceSTATUS
+gco2D_SetSourceColorKeyAdvanced(
+	IN gco2D Engine,
+	IN gctUINT32 ColorKey
+	);
+
+/* Set the source color key range. */
+gceSTATUS
+gco2D_SetSourceColorKeyRangeAdvanced(
+	IN gco2D Engine,
+	IN gctUINT32 ColorKeyLow,
+	IN gctUINT32 ColorKeyHigh
+	);
+
+/* Set the target color key. */
+gceSTATUS
+gco2D_SetTargetColorKeyAdvanced(
+	IN gco2D Engine,
+	IN gctUINT32 ColorKey
+	);
+
+/* Set the target color key range. */
+gceSTATUS
+gco2D_SetTargetColorKeyRangeAdvanced(
+	IN gco2D Engine,
+	IN gctUINT32 ColorKeyLow,
+	IN gctUINT32 ColorKeyHigh
+	);
+
+/* Set the YUV color space mode. */
+gceSTATUS
+gco2D_SetYUVColorMode(
+	IN gco2D Engine,
+	IN gce2D_YUV_COLOR_MODE Mode
+	);
+
+/* Setup the source global color value in ARGB8 format. */
+gceSTATUS gco2D_SetSourceGlobalColorAdvanced(
+	IN gco2D Engine,
+	IN gctUINT32 Color32
+	);
+
+/* Setup the target global color value in ARGB8 format. */
+gceSTATUS gco2D_SetTargetGlobalColorAdvanced(
+	IN gco2D Engine,
+	IN gctUINT32 Color32
+	);
+
+/* Setup the source and target pixel multiply modes. */
+gceSTATUS
+gco2D_SetPixelMultiplyModeAdvanced(
+	IN gco2D Engine,
+	IN gce2D_PIXEL_COLOR_MULTIPLY_MODE SrcPremultiplySrcAlpha,
+	IN gce2D_PIXEL_COLOR_MULTIPLY_MODE DstPremultiplyDstAlpha,
+	IN gce2D_GLOBAL_COLOR_MULTIPLY_MODE SrcPremultiplyGlobalMode,
+	IN gce2D_PIXEL_COLOR_MULTIPLY_MODE DstDemultiplyDstAlpha
+	);
+
+/* Set the GPU clock cycles after which the idle engine will keep auto-flushing. */
+gceSTATUS
+gco2D_SetAutoFlushCycles(
+	IN gco2D Engine,
+	IN gctUINT32 Cycles
+	);
+
+/* Read the profile registers available in the 2D engine and sets them in the profile.
+   The function will also reset the pixelsRendered counter every time.
+*/
+gceSTATUS
+gco2D_ProfileEngine(
+	IN gco2D Engine,
+	OPTIONAL gco2D_PROFILE_PTR Profile
+	);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __gchal_2d_h_ */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gc_hal_dump.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/inc/gc_hal_dump.h
@@ -0,0 +1,90 @@
+/****************************************************************************
+*
+*    Copyright (C) 2005 - 2010 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public License as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+#ifndef __gc_hal_dump_h_
+#define __gc_hal_dump_h_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**	FILE LAYOUT:
+**
+**		gcsDUMP_FILE structure
+**
+**		gcsDUMP_DATA frame
+**			gcsDUMP_DATA or gcDUMP_DATA_SIZE records rendingring the frame
+**			gctUINT8 data[length]
+*/
+
+#define gcvDUMP_FILE_SIGNATURE		gcmCC('g','c','D','B')
+
+typedef struct _gcsDUMP_FILE
+{
+	gctUINT32   		signature;	/* File signature */
+	gctSIZE_T 			length;		/* Length of file */
+	gctUINT32 			frames;		/* Number of frames in file */
+}
+gcsDUMP_FILE;
+
+typedef enum _gceDUMP_TAG
+{
+	gcvTAG_SURFACE					= gcmCC('s','u','r','f'),
+	gcvTAG_FRAME					= gcmCC('f','r','m',' '),
+	gcvTAG_COMMAND					= gcmCC('c','m','d',' '),
+	gcvTAG_INDEX					= gcmCC('i','n','d','x'),
+	gcvTAG_STREAM					= gcmCC('s','t','r','m'),
+	gcvTAG_TEXTURE					= gcmCC('t','e','x','t'),
+	gcvTAG_RENDER_TARGET			= gcmCC('r','n','d','r'),
+	gcvTAG_DEPTH					= gcmCC('z','b','u','f'),
+	gcvTAG_RESOLVE					= gcmCC('r','s','l','v'),
+	gcvTAG_DELETE					= gcmCC('d','e','l',' '),
+}
+gceDUMP_TAG;
+
+typedef struct _gcsDUMP_SURFACE
+{
+	gceDUMP_TAG			type;		/* Type of record. */
+	gctUINT32     		address;	/* Address of the surface. */
+	gctINT16      		width;		/* Width of surface. */
+	gctINT16	   		height;		/* Height of surface. */
+	gceSURF_FORMAT		format;		/* Surface pixel format. */
+	gctSIZE_T			length;		/* Number of bytes inside the surface. */
+}
+gcsDUMP_SURFACE;
+
+typedef struct _gcsDUMP_DATA
+{
+	gceDUMP_TAG		 	type;		/* Type of record. */
+	gctSIZE_T     		length;		/* Number of bytes of data. */
+	gctUINT32     		address;	/* Address for the data. */
+}
+gcsDUMP_DATA;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __gc_hal_dump_h_ */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/Kernel.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/Kernel.c
@@ -0,0 +1,883 @@
+/****************************************************************************
+*
+*    Copyright (C) 2002 - 2008 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public Lisence as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+
+
+#include "PreComp.h"
+/******************************************************************************\
+******************************* gcoKERNEL API Code ******************************
+\******************************************************************************/
+
+/*******************************************************************************
+**
+**	gcoKERNEL_Construct
+**
+**	Construct a new gcoKERNEL object.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		IN gctPOINTER Context
+**			Pointer to a driver defined context.
+**
+**	OUTPUT:
+**
+**		gcoKERNEL * Kernel
+**			Pointer to a variable that will hold the pointer to the gcoKERNEL
+**			object.
+*/
+
+#ifdef ANDROID
+#define DEFAULT_PROFILE_FILE_NAME	"/sdcard/vprofiler.xml"
+#else
+#define DEFAULT_PROFILE_FILE_NAME	"vprofiler.xml"
+#endif
+
+gceSTATUS gcoKERNEL_Construct(
+	IN gcoOS Os,
+	IN gctPOINTER Context,
+	OUT gcoKERNEL * Kernel
+	)
+{
+	gcoKERNEL kernel;
+	gceSTATUS status;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmVERIFY_ARGUMENT(Kernel != gcvNULL);
+
+	/* Allocate the gcoKERNEL object. */
+	gcmERR_RETURN(
+		gcoOS_Allocate(Os, sizeof(struct _gcoKERNEL), (gctPOINTER *) &kernel));
+
+#if MRVL_LOW_POWER_MODE_DEBUG
+    gcmERR_RETURN(
+		gcoOS_Allocate(Os, 0x100000, (gctPOINTER *) &kernel->kernelMSG));
+
+    kernel->msgLen = 0;
+#endif
+
+	/* Zero the object pointers. */
+	kernel->hardware = gcvNULL;
+	kernel->command  = gcvNULL;
+	kernel->event    = gcvNULL;
+	kernel->mmu      = gcvNULL;
+
+	/* Initialize the gcoKERNEL object. */
+	kernel->object.type = gcvOBJ_KERNEL;
+	kernel->os          = Os;
+
+	/* Save context. */
+	kernel->context = Context;
+
+	/* No clients attached. */
+	kernel->clients = 0;
+
+	/* Construct the gcoHARDWARE object. */
+	gcmONERROR(
+		gcoHARDWARE_Construct(Os, &kernel->hardware));
+
+	/* Set pointer to gcoKERNEL object in gcoHARDWARE object. */
+	kernel->hardware->kernel = kernel;
+
+	/* Initialize the hardware. */
+	gcmONERROR(
+		gcoHARDWARE_InitializeHardware(kernel->hardware));
+
+	/* Construct the gcoCOMMAND object. */
+	gcmONERROR(
+		gcoCOMMAND_Construct(kernel, &kernel->command));
+
+	/* Construct the gcoEVENT object. */
+	gcmONERROR(
+		gcoEVENT_Construct(kernel, &kernel->event));
+
+	/* Construct the gcoMMU object. */
+	gcmONERROR(
+		gcoMMU_Construct(kernel, 32 << 10, &kernel->mmu));
+
+	kernel->notifyIdle = gcvTRUE;//gcvFALSE;
+
+#if VIVANTE_PROFILER
+	/* Initialize profile setting */
+#if defined ANDROID
+	kernel->profileEnable = gcvFALSE;
+#else
+	kernel->profileEnable = gcvTRUE;
+#endif
+
+	gcmVERIFY_OK(
+		gcoOS_MemCopy(kernel->profileFileName,
+					DEFAULT_PROFILE_FILE_NAME,
+					  gcmSIZEOF(DEFAULT_PROFILE_FILE_NAME) + 1));
+#endif
+
+	/* Return pointer to the gcoKERNEL object. */
+	*Kernel = kernel;
+
+	/* Success. */
+	return gcvSTATUS_OK;
+
+OnError:
+	if (kernel->event != gcvNULL)
+	{
+		gcmVERIFY_OK(
+			gcoEVENT_Destroy(kernel->event));
+	}
+
+	if (kernel->command != gcvNULL)
+	{
+		gcmVERIFY_OK(
+			gcoCOMMAND_Destroy(kernel->command));
+	}
+
+	if (kernel->hardware != gcvNULL)
+	{
+		gcmVERIFY_OK(
+			gcoHARDWARE_Destroy(kernel->hardware));
+	}
+
+    kernel->version = _GAL_VERSION_STRING_;
+
+#if MRVL_LOW_POWER_MODE_DEBUG
+	gcmVERIFY_OK(
+		gcoOS_Free(Os, kernel->kernelMSG));
+#endif
+
+	gcmVERIFY_OK(
+		gcoOS_Free(Os, kernel));
+
+	/* Return the error. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gcoKERNEL_Destroy
+**
+**	Destroy an gcoKERNEL object.
+**
+**	INPUT:
+**
+**		gcoKERNEL Kernel
+**			Pointer to an gcoKERNEL object to destroy.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gcoKERNEL_Destroy(
+	IN gcoKERNEL Kernel
+	)
+{
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Kernel, gcvOBJ_KERNEL);
+
+	/* Destroy the gcoMMU object. */
+	gcmVERIFY_OK(gcoMMU_Destroy(Kernel->mmu));
+
+	/* Destroy the gcoEVENT object. */
+	gcmVERIFY_OK(gcoEVENT_Destroy(Kernel->event));
+
+	/* Destroy the AQCOMMNAND object. */
+	gcmVERIFY_OK(gcoCOMMAND_Destroy(Kernel->command));
+
+	/* Destroy the gcoHARDWARE object. */
+	gcmVERIFY_OK(gcoHARDWARE_Destroy(Kernel->hardware));
+
+	/* Mark the gcoKERNEL object as unknown. */
+	Kernel->object.type = gcvOBJ_UNKNOWN;
+
+#if MRVL_LOW_POWER_MODE_DEBUG
+    gcmVERIFY_OK(
+		gcoOS_Free(Kernel->os, Kernel->kernelMSG));
+#endif
+
+	/* Free the gcoKERNEL object. */
+	gcmVERIFY_OK(gcoOS_Free(Kernel->os, Kernel));
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	_AllocateMemory
+**
+**	Private function to walk all required memory pools to allocate the requested
+**	amount of video memory.
+**
+**	INPUT:
+**
+**		gcoKERNEL Kernel
+**			Pointer to an gcoKERNEL object.
+**
+**		gcsHAL_INTERFACE * Interface
+**			Pointer to a gcsHAL_INTERFACE structure that defines the command to
+**			be dispatched.
+**
+**	OUTPUT:
+**
+**		gcsHAL_INTERFACE * Interface
+**			Pointer to a gcsHAL_INTERFACE structure that receives any data to be
+**			returned.
+*/
+static gceSTATUS
+_AllocateMemory(
+	IN gcoKERNEL Kernel,
+	IN OUT gcePOOL * Pool,
+	IN gctSIZE_T Bytes,
+	IN gctSIZE_T Alignment,
+	IN gceSURF_TYPE Type,
+	OUT gcuVIDMEM_NODE_PTR * Node
+	)
+{
+	gcePOOL pool;
+	gceSTATUS status;
+	gcoVIDMEM videoMemory;
+
+	/* Get initial pool. */
+	switch (pool = *Pool)
+	{
+	case gcvPOOL_DEFAULT:
+	case gcvPOOL_LOCAL:
+		pool = gcvPOOL_LOCAL_INTERNAL;
+		break;
+
+	case gcvPOOL_UNIFIED:
+		pool = gcvPOOL_SYSTEM;
+		break;
+
+	default:
+		break;
+	}
+
+	do
+	{
+		/* Verify the number of bytes to allocate. */
+		if (Bytes == 0)
+		{
+			status = gcvSTATUS_INVALID_ARGUMENT;
+			break;
+		}
+
+		if (pool == gcvPOOL_VIRTUAL)
+		{
+			/* Create a gcuVIDMEM_NODE for virtual memory. */
+			gcmERR_BREAK(gcoVIDMEM_ConstructVirtual(Kernel, Bytes, Node));
+
+			/* Success. */
+			break;
+		}
+
+		else
+		{
+			/* Get pointer to gcoVIDMEM object for pool. */
+			status = gcoKERNEL_GetVideoMemoryPool(Kernel, pool, &videoMemory);
+
+			if (status == gcvSTATUS_OK)
+			{
+				/* Allocate memory. */
+				status = gcoVIDMEM_AllocateLinear(videoMemory,
+												  Bytes,
+												  Alignment,
+												  Type,
+												  Node);
+
+				if (status == gcvSTATUS_OK)
+				{
+					/* Memory allocated. */
+					break;
+				}
+			}
+		}
+
+		if (pool == gcvPOOL_LOCAL_INTERNAL)
+		{
+			/* Advance to external memory. */
+			pool = gcvPOOL_LOCAL_EXTERNAL;
+		}
+		else if (pool == gcvPOOL_LOCAL_EXTERNAL)
+		{
+			/* Advance to contiguous system memory. */
+			pool = gcvPOOL_SYSTEM;
+		}
+		else if (pool == gcvPOOL_SYSTEM)
+		{
+            static int count= 1;
+			/* Advance to virtual memory. */
+            if (count == 1)
+            {
+				gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_KERNEL,
+					"Try to allocate virtual memory!\n");
+                count = 0;
+            }
+			pool = gcvPOOL_VIRTUAL;
+		}
+		else
+		{
+			/* Out of pools. */
+			break;
+		}
+	}
+	/* Loop only for multiple selection pools. */
+	while ((*Pool == gcvPOOL_DEFAULT)
+	||     (*Pool == gcvPOOL_LOCAL)
+	||     (*Pool == gcvPOOL_UNIFIED)
+	);
+
+	if (gcmIS_SUCCESS(status))
+	{
+		/* Return pool used for allocation. */
+		*Pool = pool;
+	}
+
+	/* Return status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gcoKERNEL_Dispatch
+**
+**	Dispatch a command received from the user HAL layer.
+**
+**	INPUT:
+**
+**		gcoKERNEL Kernel
+**			Pointer to an gcoKERNEL object.
+**
+**		gctBOOL FromUser
+**			whether the call is from the user space.
+**
+**		gcsHAL_INTERFACE * Interface
+**			Pointer to a gcsHAL_INTERFACE structure that defines the command to
+**			be dispatched.
+**
+**	OUTPUT:
+**
+**		gcsHAL_INTERFACE * Interface
+**			Pointer to a gcsHAL_INTERFACE structure that receives any data to be
+**			returned.
+*/
+gceSTATUS gcoKERNEL_Dispatch(
+	IN gcoKERNEL Kernel,
+	IN gctBOOL FromUser,
+	IN OUT gcsHAL_INTERFACE * Interface
+	)
+{
+	gceSTATUS status;
+	gctUINT32 bitsPerPixel;
+	gctSIZE_T bytes;
+	gcsHAL_INTERFACE * kernelInterface;
+	gcuVIDMEM_NODE_PTR node;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Kernel, gcvOBJ_KERNEL);
+	gcmVERIFY_ARGUMENT(Interface != gcvNULL);
+
+	if (FromUser)
+	{
+		/* Map interface structure into kernel address space. */
+		status = gcoOS_MapUserPointer(Kernel->os,
+									  Interface,
+									  gcmSIZEOF(gcsHAL_INTERFACE),
+									  (gctPOINTER *)&kernelInterface);
+
+		if (gcmIS_ERROR(status))
+		{
+			return status;
+		}
+	}
+	else
+	{
+		kernelInterface = Interface;
+	}
+
+	/* Dispatch on command. */
+	switch (kernelInterface->command)
+	{
+	case gcvHAL_GET_BASE_ADDRESS:
+		/* Get base address. */
+		status = gcoOS_GetBaseAddress(
+			Kernel->os,
+			&kernelInterface->u.GetBaseAddress.baseAddress);
+		break;
+
+	case gcvHAL_QUERY_VIDEO_MEMORY:
+		/* Query video memory size. */
+		status = gcoKERNEL_QueryVideoMemory(Kernel, kernelInterface);
+		break;
+
+	case gcvHAL_QUERY_CHIP_IDENTITY:
+		/* Query chip identity. */
+		status = gcoHARDWARE_QueryChipIdentity(
+			Kernel->hardware,
+			&kernelInterface->u.QueryChipIdentity.chipModel,
+			&kernelInterface->u.QueryChipIdentity.chipRevision,
+			&kernelInterface->u.QueryChipIdentity.chipFeatures,
+			&kernelInterface->u.QueryChipIdentity.chipMinorFeatures
+			);
+
+		if (gcmIS_SUCCESS(status))
+		{
+			/* Query chip specifications. */
+			status = gcoHARDWARE_QueryChipSpecs(
+				Kernel->hardware,
+				&kernelInterface->u.QueryChipIdentity.streamCount,
+				&kernelInterface->u.QueryChipIdentity.registerMax,
+				&kernelInterface->u.QueryChipIdentity.threadCount,
+				&kernelInterface->u.QueryChipIdentity.shaderCoreCount,
+				&kernelInterface->u.QueryChipIdentity.vertexCacheSize,
+				&kernelInterface->u.QueryChipIdentity.vertexOutputBufferSize);
+		}
+		break;
+
+	case gcvHAL_MAP_MEMORY:
+		/* Map memory. */
+		status = gcoKERNEL_MapMemory(Kernel,
+									 kernelInterface->u.MapMemory.physical,
+									 kernelInterface->u.MapMemory.bytes,
+									 &kernelInterface->u.MapMemory.logical);
+		break;
+
+	case gcvHAL_UNMAP_MEMORY:
+		/* Unmap memory. */
+		status = gcoKERNEL_UnmapMemory(Kernel,
+									   kernelInterface->u.MapMemory.physical,
+									   kernelInterface->u.MapMemory.bytes,
+									   kernelInterface->u.MapMemory.logical);
+		break;
+
+	case gcvHAL_ALLOCATE_NON_PAGED_MEMORY:
+		/* Allocate non-paged memory. */
+		status = gcoOS_AllocateContiguous(
+			Kernel->os,
+			FromUser,
+			&kernelInterface->u.AllocateNonPagedMemory.bytes,
+			&kernelInterface->u.AllocateNonPagedMemory.physical,
+			&kernelInterface->u.AllocateNonPagedMemory.logical);
+		break;
+
+	case gcvHAL_FREE_NON_PAGED_MEMORY:
+		/* Free non-paged memory. */
+		status = gcoOS_FreeNonPagedMemory(
+			Kernel->os,
+			kernelInterface->u.AllocateNonPagedMemory.bytes,
+			kernelInterface->u.AllocateNonPagedMemory.physical,
+			kernelInterface->u.AllocateNonPagedMemory.logical);
+		break;
+
+	case gcvHAL_ALLOCATE_CONTIGUOUS_MEMORY:
+		/* Allocate contiguous memory. */
+		status = gcoOS_AllocateContiguous(
+			Kernel->os,
+			FromUser,
+			&kernelInterface->u.AllocateNonPagedMemory.bytes,
+			&kernelInterface->u.AllocateNonPagedMemory.physical,
+			&kernelInterface->u.AllocateNonPagedMemory.logical);
+		break;
+
+	case gcvHAL_FREE_CONTIGUOUS_MEMORY:
+		/* Free contiguous memory. */
+		status = gcoOS_FreeContiguous(
+			Kernel->os,
+			kernelInterface->u.AllocateNonPagedMemory.physical,
+			kernelInterface->u.AllocateNonPagedMemory.logical,
+			kernelInterface->u.AllocateNonPagedMemory.bytes);
+		break;
+
+	case gcvHAL_ALLOCATE_VIDEO_MEMORY:
+		/* Align width and height to tiles. */
+		status = gcoHARDWARE_AlignToTile(
+			Kernel->hardware,
+			kernelInterface->u.AllocateVideoMemory.type,
+			&kernelInterface->u.AllocateVideoMemory.width,
+			&kernelInterface->u.AllocateVideoMemory.height,
+			gcvNULL);
+
+		if (gcmIS_ERROR(status))
+		{
+			/* Error. */
+			break;
+		}
+
+		/* Convert format into bytes per pixel and bytes per tile. */
+		status = gcoHARDWARE_ConvertFormat(
+			Kernel->hardware,
+			kernelInterface->u.AllocateVideoMemory.format,
+			&bitsPerPixel,
+			gcvNULL);
+
+		/* Compute number of bytes for the allocation. */
+		bytes = kernelInterface->u.AllocateVideoMemory.width * bitsPerPixel *
+				kernelInterface->u.AllocateVideoMemory.height *
+				kernelInterface->u.AllocateVideoMemory.depth / 8;
+
+		/* Allocate memory. */
+		status = _AllocateMemory(Kernel,
+								 &kernelInterface->u.AllocateVideoMemory.pool,
+								 bytes,
+								 64,
+								 kernelInterface->u.AllocateVideoMemory.type,
+								 &kernelInterface->u.AllocateVideoMemory.node);
+		break;
+
+	case gcvHAL_ALLOCATE_LINEAR_VIDEO_MEMORY:
+		/* Allocate memory. */
+		status = _AllocateMemory(
+			Kernel,
+			&kernelInterface->u.AllocateLinearVideoMemory.pool,
+			kernelInterface->u.AllocateLinearVideoMemory.bytes,
+			kernelInterface->u.AllocateLinearVideoMemory.alignment,
+			kernelInterface->u.AllocateLinearVideoMemory.type,
+			&kernelInterface->u.AllocateLinearVideoMemory.node);
+		break;
+
+	case gcvHAL_FREE_VIDEO_MEMORY:
+		/* Free video memory. */
+		status = gcoVIDMEM_Free(Interface->u.FreeVideoMemory.node);
+		break;
+
+	case gcvHAL_LOCK_VIDEO_MEMORY:
+		/* Lock video memory. */
+		status = gcoVIDMEM_Lock(kernelInterface->u.LockVideoMemory.node,
+							    &kernelInterface->u.LockVideoMemory.address);
+
+		if (gcmIS_SUCCESS(status))
+		{
+			node = kernelInterface->u.LockVideoMemory.node;
+
+			if (node->VidMem.memory->object.type == gcvOBJ_VIDMEM)
+			{
+				/* Map video memory address into user space. */
+				status = gcoKERNEL_MapVideoMemory(
+					Kernel,
+					FromUser,
+					kernelInterface->u.LockVideoMemory.address,
+					&kernelInterface->u.LockVideoMemory.memory);
+
+				if (gcmIS_ERROR(status))
+				{
+					/* Roll back. */
+#if USE_EVENT_QUEUE
+					gcmVERIFY_OK(gcoVIDMEM_Unlock(
+						kernelInterface->u.LockVideoMemory.node,
+						gcvSURF_TYPE_UNKNOWN,
+						gcvNULL));
+#else
+					gcmVERIFY_OK(gcoVIDMEM_Unlock(
+						kernelInterface->u.LockVideoMemory.node,
+						gcvSURF_TYPE_UNKNOWN,
+						gcvNULL,
+						gcvNULL));
+#endif
+				}
+			}
+			else
+			{
+				/* Copy logical memory for virtual memory. */
+				kernelInterface->u.LockVideoMemory.memory =
+					node->Virtual.logical;
+
+				/* Success. */
+				status = gcvSTATUS_OK;
+			}
+		}
+
+		break;
+
+	case gcvHAL_UNLOCK_VIDEO_MEMORY:
+		/* Unlock video memory. */
+		node = kernelInterface->u.UnlockVideoMemory.node;
+
+		status = gcoVIDMEM_Unlock(
+			node,
+			kernelInterface->u.UnlockVideoMemory.type,
+#if USE_EVENT_QUEUE
+			&kernelInterface->u.UnlockVideoMemory.asynchroneous);
+#else
+			&kernelInterface->u.UnlockVideoMemory.commandSize,
+			kernelInterface->u.UnlockVideoMemory.commands);
+#endif
+		break;
+
+#if USE_EVENT_QUEUE
+	case gcvHAL_EVENT_COMMIT:
+		/* Commit an event queue. */
+		gcmERR_BREAK(gcoEVENT_Commit(Kernel->event,
+						             kernelInterface->u.Event.queue));
+        break;
+#else
+	case gcvHAL_EVENT:
+        /* Schedule an event. */
+        status = gcoEVENT_Schedule(Kernel->event,
+        						   kernelInterface->u.Event.type,
+                                   &kernelInterface->u.Event.data,
+                                   kernelInterface->u.Event.commands,
+                                   (kernelInterface->u.Event.commandSize == 0)
+	                                  ? gcvNULL
+	                                  : &kernelInterface->u.Event.commandSize);
+        break;
+#endif
+
+    case gcvHAL_COMMIT:
+        /* Commit a command and context buffer. */
+        gcmERR_BREAK(
+			gcoCOMMAND_Commit(
+				Kernel->command,
+				kernelInterface->u.Commit.commandBuffer,
+				kernelInterface->u.Commit.contextBuffer));
+        break;
+
+    case gcvHAL_STALL:
+        /* Stall the command queue. */
+        status = gcoCOMMAND_Stall(Kernel->command);
+        break;
+
+	case gcvHAL_MAP_USER_MEMORY:
+		/* Map user memory to DMA. */
+		status = gcoOS_MapUserMemory(Kernel->os,
+									 kernelInterface->u.MapUserMemory.memory,
+									 kernelInterface->u.MapUserMemory.size,
+									 &kernelInterface->u.MapUserMemory.info,
+									 &kernelInterface->u.MapUserMemory.address);
+		break;
+
+	case gcvHAL_UNMAP_USER_MEMORY:
+		/* Unmap user memory. */
+		status = gcoOS_UnmapUserMemory(
+			Kernel->os,
+			kernelInterface->u.UnmapUserMemory.memory,
+			kernelInterface->u.UnmapUserMemory.size,
+			kernelInterface->u.UnmapUserMemory.info,
+			kernelInterface->u.UnmapUserMemory.address);
+		break;
+
+#if !USE_NEW_LINUX_SIGNAL
+	case gcvHAL_USER_SIGNAL:
+		/* Dispatch depends on the user signal subcommands. */
+		switch(kernelInterface->u.UserSignal.command)
+		{
+		case gcvUSER_SIGNAL_CREATE:
+			/* Create a signal used in the user space. */
+			status = gcoOS_CreateUserSignal(Kernel->os,
+							kernelInterface->u.UserSignal.manualReset,
+							&kernelInterface->u.UserSignal.id);
+			break;
+
+		case gcvUSER_SIGNAL_DESTROY:
+			/* Destroy the signal. */
+			status = gcoOS_DestroyUserSignal(Kernel->os,
+							kernelInterface->u.UserSignal.id);
+			break;
+
+		case gcvUSER_SIGNAL_SIGNAL:
+			/* Signal the signal. */
+			status = gcoOS_SignalUserSignal(Kernel->os,
+							kernelInterface->u.UserSignal.id,
+							kernelInterface->u.UserSignal.state);
+			break;
+
+		case gcvUSER_SIGNAL_WAIT:
+			/* Wait on the signal. */
+			status = gcoOS_WaitUserSignal(Kernel->os,
+							kernelInterface->u.UserSignal.id,
+							kernelInterface->u.UserSignal.wait
+							);
+			break;
+
+		default:
+			/* Invalid user signal command. */
+			status = gcvSTATUS_INVALID_ARGUMENT;
+
+			break;
+		}
+        break;
+#endif
+
+    case gcvHAL_SET_POWER_MANAGEMENT_STATE:
+		/* Set the power management state. */
+		status = gcoHARDWARE_SetPowerManagementState(
+			Kernel->hardware,
+			kernelInterface->u.SetPowerManagement.state);
+		break;
+
+    case gcvHAL_QUERY_POWER_MANAGEMENT_STATE:
+		/* Query the power management state. */
+		status = gcoHARDWARE_QueryPowerManagementState(
+			Kernel->hardware,
+			&kernelInterface->u.QueryPowerManagement.state);
+        break;
+
+    case gcvHAL_READ_REGISTER:
+		/* Read a register. */
+        status = gcoOS_ReadRegister(
+			Kernel->os,
+			kernelInterface->u.ReadRegisterData.address,
+			&kernelInterface->u.ReadRegisterData.data);
+        break;
+
+    case gcvHAL_WRITE_REGISTER:
+		/* Write a register. */
+        status = gcoOS_WriteRegister(
+			Kernel->os,
+			kernelInterface->u.WriteRegisterData.address,
+			kernelInterface->u.WriteRegisterData.data);
+		break;
+
+    case gcvHAL_READ_ALL_PROFILE_REGISTERS:
+#if VIVANTE_PROFILER
+		/* Read all 3D profile registers. */
+        status = gcoHARDWARE_QueryProfileRegisters(
+			Kernel->hardware,
+			(gctINT32_PTR)&kernelInterface->u.RegisterProfileData.hwProfile);
+#else
+        status = gcvSTATUS_OK;
+#endif
+        break;
+
+    case gcvHAL_PROFILE_REGISTERS_2D:
+#if VIVANTE_PROFILER
+		/* Read all 2D profile registers. */
+        status = gcoHARDWARE_ProfileEngine2D(
+			Kernel->hardware,
+			kernelInterface->u.RegisterProfileData2D.hwProfile2D);
+#else
+        status = gcvSTATUS_OK;
+#endif
+        break;
+
+	case gcvHAL_GET_PROFILE_SETTING:
+#if VIVANTE_PROFILER
+	/* Get profile setting */
+	kernelInterface->u.GetProfileSetting.enable = Kernel->profileEnable;
+
+	gcmVERIFY_OK(gcoOS_MemCopy(kernelInterface->u.GetProfileSetting.fileName,
+					Kernel->profileFileName,
+					gcmMAX_PROFILE_FILE_NAME));
+#endif
+
+        status = gcvSTATUS_OK;
+        break;
+
+	case gcvHAL_SET_PROFILE_SETTING:
+#if VIVANTE_PROFILER
+	/* Set profile setting */
+	Kernel->profileEnable = kernelInterface->u.SetProfileSetting.enable;
+
+	gcmVERIFY_OK(gcoOS_MemCopy(Kernel->profileFileName,
+					kernelInterface->u.SetProfileSetting.fileName,
+					gcmMAX_PROFILE_FILE_NAME));
+#endif
+
+        status = gcvSTATUS_OK;
+	break;
+
+	case gcvHAL_QUERY_KERNEL_SETTINGS:
+		/* Get kernel settings. */
+		status = gcoKERNEL_QuerySettings(
+			Kernel,
+			&kernelInterface->u.QueryKernelSettings.settings);
+		break;
+
+	case gcvHAL_RESET:
+		/* Reset the hardware. */
+		status = gcoHARDWARE_Reset(Kernel->hardware);
+		break;
+
+	default:
+		/* Invalid command. */
+		status = gcvSTATUS_INVALID_ARGUMENT;
+		break;
+	}
+
+	/* Save status. */
+	kernelInterface->status = status;
+
+	if (FromUser)
+	{
+		/* Unmap interface from kernel address space. */
+		gcmVERIFY_OK(
+			gcoOS_UnmapUserPointer(Kernel->os,
+								   Interface,
+								   gcmSIZEOF(gcsHAL_INTERFACE),
+								   kernelInterface));
+	}
+
+	/* Return the status. */
+	return status;
+}
+
+gceSTATUS
+gcoKERNEL_AttachProcess(
+	IN gcoKERNEL Kernel,
+	IN gctBOOL Attach
+	)
+{
+	gceSTATUS status;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Kernel, gcvOBJ_KERNEL);
+
+	if (Attach)
+	{
+		if (Kernel->clients == 0)
+		{
+			/* First client attached, switch to ON power state. */
+			gcmONERROR(
+				gcoHARDWARE_SetPowerManagementState(Kernel->hardware,
+													gcvPOWER_ON));
+		}
+
+		/* Increment the number of clients attached. */
+		Kernel->clients += 1;
+	}
+
+	else
+	{
+		/* Decrement the number of clients attached. */
+		Kernel->clients -= 1;
+
+		if (Kernel->clients == 0)
+		{
+			/* Last client detached, switch to SUSPEND power state. */
+			gcmONERROR(
+				gcoHARDWARE_SetPowerManagementState(Kernel->hardware,
+													gcvPOWER_SUSPEND));
+		}
+	}
+
+	/* Success. */
+	return gcvSTATUS_OK;
+
+OnError:
+	gcmTRACE(gcvLEVEL_ERROR,
+			 "ERROR: gcoKERNEL_AttachProcess has error %d.",
+			 status);
+
+	/* Return the status. */
+	return status;
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/Mmu.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/Mmu.c
@@ -0,0 +1,432 @@
+/****************************************************************************
+*  
+*    Copyright (C) 2002 - 2008 by Vivante Corp.
+*  
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public Lisence as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*  
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*  
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*  
+*****************************************************************************/
+
+
+
+
+
+
+#include "PreComp.h"
+
+/*******************************************************************************
+**
+**	gcoMMU_Construct
+**
+**	Construct a new gcoMMU object.
+**
+**	INPUT:
+**
+**		gcoKERNEL Kernel
+**			Pointer to an gcoKERNEL object.
+**
+**		gctSIZE_T MmuSize
+**			Number of bytes for the page table.
+**
+**	OUTPUT:
+**
+**		gcoMMU * Mmu
+**			Pointer to a variable that receives the gcoMMU object pointer.
+*/
+gceSTATUS gcoMMU_Construct(
+	IN gcoKERNEL Kernel,
+	IN gctSIZE_T MmuSize,
+	OUT gcoMMU * Mmu
+	)
+{
+	gcoOS os;
+	gcoHARDWARE hardware;
+	gceSTATUS status;
+	gcoMMU mmu;
+	gctUINT32 * pageTable;
+	gctUINT32 i;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Kernel, gcvOBJ_KERNEL);
+	gcmVERIFY_ARGUMENT(MmuSize > 0);
+	gcmVERIFY_ARGUMENT(Mmu != gcvNULL);
+
+	/* Extract the gcoOS object pointer. */
+	os = Kernel->os;
+	gcmVERIFY_OBJECT(os, gcvOBJ_OS);
+
+	/* Extract the gcoHARDWARE object pointer. */
+	hardware = Kernel->hardware;
+	gcmVERIFY_OBJECT(hardware, gcvOBJ_HARDWARE);
+
+	/* Allocate memory for the gcoMMU object. */
+	status = gcoOS_Allocate(os, sizeof(struct _gcoMMU), (gctPOINTER *) &mmu);
+
+	if (status < 0)
+	{
+		/* Error. */
+		gcmFATAL("gcoMMU_Construct: Could not allocate gcoMMU object");
+		return status;
+	}
+
+	/* Initialize the gcoMMU object. */
+	mmu->object.type = gcvOBJ_MMU;
+	mmu->os = os;
+	mmu->hardware = hardware;
+
+	/* Create the mutex. */
+	status = gcoOS_CreateMutex(os, &mmu->mutex);
+
+	if (status < 0)
+	{
+		/* Roll back. */
+		mmu->object.type = gcvOBJ_UNKNOWN;
+		gcmVERIFY_OK(gcoOS_Free(os, mmu));
+
+		/* Error. */
+		return status;
+	}
+
+	/* Allocate the page table. */
+	mmu->pageTableSize = MmuSize;
+	status = gcoOS_AllocateContiguous(os,
+									  gcvFALSE,
+									  &mmu->pageTableSize,
+									  &mmu->pageTablePhysical,
+									  &mmu->pageTableLogical);
+
+	if (status < 0)
+	{
+		/* Roll back. */
+		gcmVERIFY_OK(gcoOS_DeleteMutex(os, mmu->mutex));
+
+		mmu->object.type = gcvOBJ_UNKNOWN;
+		gcmVERIFY_OK(gcoOS_Free(os, mmu));
+
+		/* Error. */
+		gcmFATAL("gcoMMU_Construct: Could not allocate page table");
+		return status;
+	}
+
+	/* Compute number of entries in page table. */
+	mmu->entryCount = mmu->pageTableSize / sizeof(gctUINT32);
+	mmu->entry = 0;
+
+	/* Mark the entire page table as available. */
+	pageTable = (gctUINT32 *) mmu->pageTableLogical;
+	for (i = 0; i < mmu->entryCount; i++)
+	{
+		pageTable[i] = ~0;
+	}
+
+	/* Set page table address. */
+	status = gcoHARDWARE_SetMMU(hardware, mmu->pageTableLogical);
+
+	if (status < 0)
+	{
+		/* Free the page table. */
+		gcmVERIFY_OK(gcoOS_FreeContiguous(mmu->os,
+									  mmu->pageTablePhysical,
+									  mmu->pageTableLogical,
+									  mmu->pageTableSize));
+
+		/* Roll back. */
+		gcmVERIFY_OK(gcoOS_DeleteMutex(os, mmu->mutex));
+
+		mmu->object.type = gcvOBJ_UNKNOWN;
+		gcmVERIFY_OK(gcoOS_Free(os, mmu));
+
+		/* Error. */
+		gcmFATAL("gcoMMU_Construct: Could not program page table");
+		return status;
+	}
+
+	/* Return the gcoMMU object pointer. */
+	*Mmu = mmu;
+
+	gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_MMU,
+			   "gcoMMU_Construct: %u entries at %p(0x%08X)",
+			   mmu->entryCount,
+			   mmu->pageTableLogical,
+			   mmu->pageTablePhysical);
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoMMU_Destroy
+**
+**	Destroy a nAQMMU object.
+**
+**	INPUT:
+**
+**		gcoMMU Mmu
+**			Pointer to an gcoMMU object.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gcoMMU_Destroy(
+	IN gcoMMU Mmu
+	)
+{
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Mmu, gcvOBJ_MMU);
+
+	/* Free the page table. */
+	gcmVERIFY_OK(gcoOS_FreeContiguous(Mmu->os,
+								  Mmu->pageTablePhysical,
+								  Mmu->pageTableLogical,
+								  Mmu->pageTableSize));
+
+	/* Roll back. */
+	gcmVERIFY_OK(gcoOS_DeleteMutex(Mmu->os, Mmu->mutex));
+
+	/* Mark the gcoMMU object as unknown. */
+	Mmu->object.type = gcvOBJ_UNKNOWN;
+
+	/* Free the gcoMMU object. */
+	gcmVERIFY_OK(gcoOS_Free(Mmu->os, Mmu));
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoMMU_AllocatePages
+**
+**	Allocate pages inside the page table.
+**
+**	INPUT:
+**
+**		gcoMMU Mmu
+**			Pointer to an gcoMMU object.
+**
+**		gctSIZE_T PageCount
+**			Number of pages to allocate.
+**
+**	OUTPUT:
+**
+**		gctPOINTER * PageTable
+**			Pointer to a variable that receives the	base address of the page
+**			table.
+**
+**		gctUINT32 * Address
+**			Pointer to a variable that receives the hardware specific address.
+*/
+gceSTATUS gcoMMU_AllocatePages(
+	IN gcoMMU Mmu,
+	IN gctSIZE_T PageCount,
+	OUT gctPOINTER * PageTable,
+	OUT gctUINT32 * Address
+	)
+{
+	gceSTATUS status;
+	gctUINT32 tail, index, i;
+	gctUINT32 * table;
+	gctBOOL allocated = gcvFALSE;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Mmu, gcvOBJ_MMU);
+	gcmVERIFY_ARGUMENT(PageCount > 0);
+	gcmVERIFY_ARGUMENT(PageTable != gcvNULL);
+	gcmVERIFY_ARGUMENT(Address != gcvNULL);
+
+	gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_MMU,
+			   "gcoMMU_AllocatePages: %u pages",
+			   PageCount);
+
+	if (PageCount > Mmu->entryCount)
+	{
+		gcmTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_MMU,
+				   "gcoMMU_AllocatePages: Page table too small for %u pages",
+				   PageCount);
+
+		/* Not enough pages avaiable. */
+		return gcvSTATUS_OUT_OF_RESOURCES;
+	}
+
+	/* Grab the mutex. */
+	status = gcoOS_AcquireMutex(Mmu->os, Mmu->mutex, gcvINFINITE);
+
+	if (status < 0)
+	{
+		gcmTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_MMU,
+				   "gcoMMU_AllocatePages: Could not acquire mutex");
+
+		/* Error. */
+		return status;
+	}
+
+	/* Compute the tail for this allocation. */
+	tail = Mmu->entryCount - PageCount;
+
+	/* Walk all entries until we find enough slots. */
+	for (index = Mmu->entry; index <= tail;)
+	{
+		/* Access page table. */
+		table =	(gctUINT32 *) Mmu->pageTableLogical + index;
+
+		/* See if all slots are available. */
+		for (i = 0; i < PageCount; i++, table++)
+		{
+			if (*table != ~0)
+			{
+				/* Start from next slot. */
+				index += i + 1;
+				break;
+			}
+		}
+
+		if (i == PageCount)
+		{
+			/* Bail out if we have enough page entries. */
+			allocated = gcvTRUE;
+			break;
+		}
+	}
+
+	if (!allocated)
+	{
+		/* Flush the MMU. */
+		status = gcoHARDWARE_FlushMMU(Mmu->hardware);
+
+		if (status >= 0)
+		{
+			/* Walk all entries until we find enough slots. */
+			for (index = 0; index <= tail;)
+			{
+				/* Access page table. */
+				table =	(gctUINT32 *) Mmu->pageTableLogical + index;
+
+				/* See if all slots are available. */
+				for (i = 0; i < PageCount; i++, table++)
+				{
+					if (*table != ~0)
+					{
+						/* Start from next slot. */
+						index += i + 1;
+						break;
+					}
+				}
+
+				if (i == PageCount)
+				{
+					/* Bail out if we have enough page entries. */
+					allocated = gcvTRUE;
+					break;
+				}
+			}
+		}
+	}
+
+	if (!allocated && (status >= 0))
+	{
+		gcmTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_MMU,
+				   "gcoMMU_AllocatePages: Not enough free pages for %u pages",
+				   PageCount);
+
+		/* Not enough empty slots available. */
+		status = gcvSTATUS_OUT_OF_RESOURCES;
+	}
+
+	if (status >= 0)
+	{
+		/* Build virtual address. */
+		status = gcoHARDWARE_BuildVirtualAddress(Mmu->hardware,
+												 index,
+												 0,
+												 Address);
+
+		if (status >= 0)
+		{
+			/* Update current entry into page table. */
+			Mmu->entry = index + PageCount;
+
+			/* Return pointer to page table. */
+			*PageTable = (gctUINT32 *)	Mmu->pageTableLogical + index;
+
+			gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_MMU,
+			   "gcoMMU_AllocatePages: "
+			   "Allocated %u pages at index %u (0x%08X) @ %p",
+			   PageCount,
+			   index,
+			   *Address,
+			   *PageTable);
+			}
+	}
+
+	/* Release the mutex. */
+	gcmVERIFY_OK(gcoOS_ReleaseMutex(Mmu->os, Mmu->mutex));
+
+	/* Return status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gcoMMU_FreePages
+**
+**	Free pages inside the page table.
+**
+**	INPUT:
+**
+**		gcoMMU Mmu
+**			Pointer to an gcoMMU object.
+**
+**		gctPOINTER PageTable
+**			Base address of the page table to free.
+**
+**		gctSIZE_T PageCount
+**			Number of pages to free.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gcoMMU_FreePages(
+	IN gcoMMU Mmu,
+	IN gctPOINTER PageTable,
+	IN gctSIZE_T PageCount
+	)
+{
+	gctUINT32 * table;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Mmu, gcvOBJ_MMU);
+	gcmVERIFY_ARGUMENT(PageTable != gcvNULL);
+	gcmVERIFY_ARGUMENT(PageCount > 0);
+
+	gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_MMU,
+			   "gcoMMU_FreePages: Freeing %u pages at index %u @ %p",
+			   PageCount,
+			   ((gctUINT32 *) PageTable - (gctUINT32 *) Mmu->pageTableLogical),
+			   PageTable);
+
+	/* Convert pointer. */
+	table = (gctUINT32 *) PageTable;
+
+	/* Mark the page table entries as available. */
+	while (PageCount-- > 0)
+	{
+		*table++ = ~0;
+	}
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/PreComp.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/PreComp.h
@@ -0,0 +1,31 @@
+/****************************************************************************
+*
+*    Copyright (C) 2002 - 2008 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public Lisence as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+
+
+#include "aqHal.h"
+#include "aqHalDriver.h"
+#include "aqHalInt.h"
+#if defined LINUX
+#include <linux/module.h>
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/aqHalInt.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/aqHalInt.h
@@ -0,0 +1,328 @@
+/****************************************************************************
+*  
+*    Copyright (C) 2002 - 2008 by Vivante Corp.
+*  
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public Lisence as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*  
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*  
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*  
+*****************************************************************************/
+
+
+
+
+
+
+#ifndef __aqhalint_h_
+#define __aqhalint_h_
+
+#include "aqHal.h"
+#include "aqHardware.h"
+#include "aqHalDriver.h"
+
+/******************************************************************************\
+********************************** Structures **********************************
+\******************************************************************************/
+
+/* gcoKERNEL object. */
+struct _gcoKERNEL
+{
+	/* Object. */
+	gcsOBJECT					object;
+
+	/* Pointer to gcoOS object. */
+	gcoOS						os;
+
+	/* Pointer to gcoHARDWARE object. */
+	gcoHARDWARE					hardware;
+
+	/* Pointer to gcoCOMMAND object. */
+	gcoCOMMAND					command;
+
+	/* Pointer to gcoEVENT object. */
+	gcoEVENT					event;
+
+	/* Pointer to context. */
+	gctPOINTER					context;
+
+	/* Pointer to gcoMMU object. */
+	gcoMMU						mmu;
+
+	/* Require to notify idle status */
+	gctBOOL						notifyIdle;
+
+	/* Number of attached clients. */
+	gctUINT						clients;
+
+#if VIVANTE_PROFILER
+	/* Enable profiling */
+	gctBOOL						profileEnable;
+
+	/* The profile file name */
+	gctCHAR						profileFileName[gcmMAX_PROFILE_FILE_NAME];
+#endif
+
+    /* Pointer to reversion string */
+    gctCONST_STRING             version;
+
+#if MRVL_LOW_POWER_MODE_DEBUG
+    /* The buffer to pool the output message before entering D2
+    ** these message can be output after exiting D2
+    */
+    char*                       kernelMSG;
+    /* The length of kernelMSG */
+    gctINT32                    msgLen;
+#endif    
+        
+};
+
+/* gcoCOMMAND object. */
+struct _gcoCOMMAND
+{
+	/* Object. */
+	gcsOBJECT					object;
+
+	/* Pointer to required object. */
+	gcoKERNEL					kernel;
+	gcoOS						os;
+
+	/* Number of bytes per page. */
+	gctSIZE_T					pageSize;
+
+	/* Current pipe select. */
+	gctUINT32					pipeSelect;
+
+	/* Command queue running flag. */
+	gctBOOL						running;
+
+	/* Idle flag and commit stamp. */
+	gctBOOL						idle;
+	gctUINT64					commitStamp;
+
+	/* Command queue mutex. */
+	gctPOINTER					mutexQueue;
+
+	/* Context switching mutex. */
+	gctPOINTER					mutexContext;
+
+	/* Current command queue. */
+	gctPHYS_ADDR				physical;
+	gctPOINTER					logical;
+	gctUINT32					offset;
+
+	/* The command queue is new. */
+	gctBOOL						newQueue;
+
+	/* Context counter used for unique ID. */
+	gctUINT64					contextCounter;
+
+	/* Current context ID. */
+	gctUINT64					currentContext;
+
+	/* Pointer to last WAIT command. */
+	gctPOINTER					wait;
+	gctSIZE_T					waitSize;
+
+	/* Command buffer alignment. */
+	gctSIZE_T					alignment;
+	gctSIZE_T					reservedHead;
+	gctSIZE_T					reservedTail;
+};
+
+typedef struct _gcsEVENT *		gcsEVENT_PTR;
+
+typedef struct _gcsEVENT
+{
+	/* Pointer to next event in queue. */
+	gcsEVENT_PTR				next;
+
+	/* Event information. */
+	gcsHAL_INTERFACE			event;
+}
+gcsEVENT;
+
+typedef struct _gcsEVENT_QUEUE
+{
+	/* Time stamp. */
+	gctUINT64					stamp;
+
+	/* Pointer to head of event queue. */
+	gcsEVENT_PTR				head;
+
+	/* Pointer to tail of event queue. */
+	gcsEVENT_PTR				tail;
+}
+gcsEVENT_QUEUE;
+
+/* gcoEVENT object. */
+struct _gcoEVENT
+{
+	/* The object. */
+	gcsOBJECT					object;
+
+	/* Pointer to required objects. */
+	gcoOS						os;
+	gcoKERNEL					kernel;
+
+	/* Time stamp. */
+	gctUINT64					stamp;
+	gctUINT64					lastCommitStamp;
+
+#if USE_EVENT_QUEUE
+	/* Queue mutex. */
+	gctPOINTER					mutexQueue;
+
+	/* Array of event queues. */
+	gcsEVENT_QUEUE				queues[32];
+
+	/* Event chain to be handled. */
+	gcsEVENT_PTR				head;
+	gcsEVENT_PTR				tail;
+#else
+
+	/* Array of events. */
+	struct _gcsEVENT_SCHEDULE
+	{
+		gctUINT64				stamp;
+		gceEVENT_TYPE			type;
+		gcuEVENT_DATA			data;
+	}							schedule[32];
+
+	/* Last used event. */
+	gctUINT8					lastID;
+#endif
+};
+
+/* gcuVIDMEM_NODE structure. */
+typedef union _gcuVIDMEM_NODE
+{
+	/* Allocated from gcoVIDMEM. */
+	struct _gcsVIDMEM_NODE_VIDMEM
+	{
+		/* Owner of this node. */
+		gcoVIDMEM				memory;
+
+		/* Dual-linked list of nodes. */
+		gcuVIDMEM_NODE_PTR		next;
+		gcuVIDMEM_NODE_PTR		prev;
+
+		/* Dual linked list of free nodes. */
+		gcuVIDMEM_NODE_PTR		nextFree;
+		gcuVIDMEM_NODE_PTR		prevFree;
+
+		/* Information for this node. */
+		gctUINT32				address;
+		gctSIZE_T				bytes;
+		gctUINT32				alignment;
+
+		/* Locked counter. */
+		gctINT32				locked;
+	}
+	VidMem;
+
+	/* Allocated from gcoOS. */
+	struct _AQVIDMEM_NODE_VIRTUAL
+	{
+		/* Pointer to gcoKERNEL object. */
+		gcoKERNEL				kernel;
+
+		/* Information for this node. */
+		gctPHYS_ADDR			physical;
+		gctSIZE_T				bytes;
+		gctPOINTER				logical;
+
+		/* Page table information. */
+		gctSIZE_T				pageCount;
+		gctPOINTER				pageTable;
+		gctUINT32				address;
+
+		/* Mutex. */
+		gctPOINTER				mutex;
+
+		/* Locked counter. */
+		gctINT32				locked;
+
+		/* Pending flag. */
+		gctBOOL					pending;
+	}
+	Virtual;
+}
+gcuVIDMEM_NODE;
+
+/* gcoVIDMEM object. */
+struct _gcoVIDMEM
+{
+	/* Object. */
+	gcsOBJECT					object;
+
+	/* Pointer to gcoOS object. */
+	gcoOS						os;
+
+	/* Information for this video memory heap. */
+	gctUINT32					baseAddress;
+	gctSIZE_T					bytes;
+	gctSIZE_T					freeBytes;
+
+	/* Mapping for each type of surface. */
+	gctINT						mapping[gcvSURF_NUM_TYPES];
+
+	/* Sentinel nodes for up to 8 banks. */
+	gcuVIDMEM_NODE				sentinel[8];
+
+	/* Allocation threshold. */
+	gctSIZE_T					threshold;
+
+    /* The heap mutex. */
+    gctPOINTER					mutex;
+};
+
+/* gcoMMU object. */
+struct _gcoMMU
+{
+	/* The object. */
+	gcsOBJECT					object;
+
+	/* Pointer to gcoOS object. */
+	gcoOS						os;
+
+	/* Pointer to gcoHARDWARE object. */
+	gcoHARDWARE					hardware;
+
+	/* The page table mutex. */
+	gctPOINTER					mutex;
+
+	/* Page table information. */
+	gctSIZE_T					pageTableSize;
+	gctPHYS_ADDR				pageTablePhysical;
+	gctPOINTER					pageTableLogical;
+
+	/* Allocation index. */
+	gctUINT32					entryCount;
+	gctUINT32					entry;
+};
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+gceSTATUS
+gcoKERNEL_AttachProcess(
+	IN gcoKERNEL Kernel,
+	IN gctBOOL Attach
+	);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __aqhalint_h_ */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/Makefile.linux
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/Makefile.linux
@@ -0,0 +1,59 @@
+##############################################################################
+#  
+#    Copyright (C) 2002 - 2008 by Vivante Corp.
+#  
+#    This program is free software; you can redistribute it and/or modify
+#    it under the terms of the GNU General Public Lisence as published by
+#    the Free Software Foundation; either version 2 of the license, or
+#    (at your option) any later version.
+#  
+#    This program is distributed in the hope that it will be useful,
+#    but WITHOUT ANY WARRANTY; without even the implied warranty of
+#    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+#    GNU General Public Lisence for more details.
+#  
+#    You should have received a copy of the GNU General Public License
+#    along with this program; if not write to the Free Software
+#    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+#  
+##############################################################################
+
+
+
+#
+# Linux build file for architecture dependent kernel HAL layer.
+#
+#
+
+
+################################################################################
+# Include common definitions.
+
+include $(AQROOT)/Makefile.linux.def
+
+################################################################################
+# Define a shortcut for the main target.
+
+STATIC = 1
+TARGET_NAME = libhalkernel.a
+
+################################################################################
+# Supply additional include directories.
+
+INCLUDE += -I$(AQROOT)/hal/inc
+INCLUDE += -I$(AQROOT)/hal/user
+INCLUDE += -I$(AQARCH)/hal/kernel
+
+CFLAGS += $(INCLUDE) -Werror
+
+################################################################################
+# Describe object files.
+
+OBJECTS = $(OBJ_DIR)/Command.o \
+          $(OBJ_DIR)/Event.o \
+          $(OBJ_DIR)/Heap.o \
+          $(OBJ_DIR)/Kernel.o \
+          $(OBJ_DIR)/Mmu.o \
+          $(OBJ_DIR)/VidMem.o
+
+include $(AQROOT)/common.target
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/GNUmakefile
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/GNUmakefile
@@ -0,0 +1,73 @@
+##############################################################################
+#  
+#    Copyright (C) 2002 - 2008 by Vivante Corp.
+#  
+#    This program is free software; you can redistribute it and/or modify
+#    it under the terms of the GNU General Public Lisence as published by
+#    the Free Software Foundation; either version 2 of the license, or
+#    (at your option) any later version.
+#  
+#    This program is distributed in the hope that it will be useful,
+#    but WITHOUT ANY WARRANTY; without even the implied warranty of
+#    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+#    GNU General Public Lisence for more details.
+#  
+#    You should have received a copy of the GNU General Public License
+#    along with this program; if not write to the Free Software
+#    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+#  
+##############################################################################
+
+
+
+#
+# This file is a part of Vivante software stack build environment for Linux.
+# It defines the rules necessary to build the kernel HAL driver.
+#
+
+
+################################################################################
+# Include common definitions.
+
+include $(AQROOT)/GNUmakefile.common
+
+
+################################################################################
+# Define a shortcut for the main target.
+
+TARGET_OUTPUT = $(OBJ_DIR)/libHALKernel.a
+
+
+################################################################################
+# Include common targets.
+
+include $(AQROOT)/GNUmakefile.source
+
+
+################################################################################
+# Supply additional include directories.
+
+INCLUDE += -I$(AQROOT)/hal/inc
+INCLUDE += -I$(AQROOT)/hal/user
+INCLUDE += -I$(AQARCH)/hal/kernel
+
+CFLAGS += $(INCLUDE)
+
+
+################################################################################
+# Describe object files.
+
+OBJECTS = $(OBJ_DIR)/Command.o \
+          $(OBJ_DIR)/Event.o \
+          $(OBJ_DIR)/Heap.o \
+          $(OBJ_DIR)/Kernel.o \
+          $(OBJ_DIR)/Mmu.o \
+          $(OBJ_DIR)/VidMem.o
+
+
+################################################################################
+# Describe dependencies.
+
+$(TARGET_OUTPUT): $(OBJ_DIR) $(PRE_COMPILED) $(OBJECTS)
+	$(AR) -r $(TARGET_OUTPUT) $(OBJECTS)
+	$(RANLIB) $(TARGET_OUTPUT)
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/gc_hal_kernel_video_memory.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/gc_hal_kernel_video_memory.c
@@ -0,0 +1,1745 @@
+/****************************************************************************
+*
+*    Copyright (C) 2005 - 2010 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public License as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+#include "gc_hal_kernel_precomp.h"
+
+#define _GC_OBJ_ZONE	gcvZONE_VIDMEM
+
+/******************************************************************************\
+******************************* Private Functions ******************************
+\******************************************************************************/
+
+/*******************************************************************************
+**
+**	_Split
+**
+**	Split a node on the required byte boundary.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gcuVIDMEM_NODE_PTR Node
+**			Pointer to the node to split.
+**
+**		gctSIZE_T Bytes
+**			Number of bytes to keep in the node.
+**
+**	OUTPUT:
+**
+**		Nothing.
+**
+**	RETURNS:
+**
+**		gctBOOL
+**			gcvTRUE if the node was split successfully, or gcvFALSE if there is an
+**			error.
+**
+*/
+static gctBOOL
+_Split(
+	IN gckOS Os,
+	IN gcuVIDMEM_NODE_PTR Node,
+	IN gctSIZE_T Bytes
+	)
+{
+	gcuVIDMEM_NODE_PTR node;
+
+	/* Make sure the byte boundary makes sense. */
+	if ((Bytes <= 0) || (Bytes > Node->VidMem.bytes))
+	{
+		return gcvFALSE;
+	}
+
+	/* Allocate a new gcuVIDMEM_NODE object. */
+	if (gcmIS_ERROR(gckOS_Allocate(Os,
+								   gcmSIZEOF(gcuVIDMEM_NODE),
+								   (gctPOINTER *) &node)))
+	{
+		/* Error. */
+		return gcvFALSE;
+	}
+
+	/* Initialize gcuVIDMEM_NODE structure. */
+	node->VidMem.offset    = Node->VidMem.offset + Bytes;
+	node->VidMem.bytes     = Node->VidMem.bytes  - Bytes;
+	node->VidMem.alignment = 0;
+	node->VidMem.locked    = 0;
+	node->VidMem.memory    = Node->VidMem.memory;
+	node->VidMem.pool      = Node->VidMem.pool;
+	node->VidMem.physical  = Node->VidMem.physical;
+#ifdef __QNXNTO__
+	node->VidMem.logical   = gcvNULL;
+	node->VidMem.handle    = 0;
+#endif
+
+	/* Insert node behind specified node. */
+	node->VidMem.next = Node->VidMem.next;
+	node->VidMem.prev = Node;
+	Node->VidMem.next = node->VidMem.next->VidMem.prev = node;
+
+	/* Insert free node behind specified node. */
+	node->VidMem.nextFree = Node->VidMem.nextFree;
+	node->VidMem.prevFree = Node;
+	Node->VidMem.nextFree = node->VidMem.nextFree->VidMem.prevFree = node;
+
+	/* Adjust size of specified node. */
+	Node->VidMem.bytes = Bytes;
+
+	/* Success. */
+	return gcvTRUE;
+}
+
+/*******************************************************************************
+**
+**	_Merge
+**
+**	Merge two adjacent nodes together.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gcuVIDMEM_NODE_PTR Node
+**			Pointer to the first of the two nodes to merge.
+**
+**	OUTPUT:
+**
+**		Nothing.
+**
+*/
+static gceSTATUS
+_Merge(
+	IN gckOS Os,
+	IN gcuVIDMEM_NODE_PTR Node
+	)
+{
+	gcuVIDMEM_NODE_PTR node;
+
+	/* Save pointer to next node. */
+	node = Node->VidMem.next;
+
+	/* This is a good time to make sure the heap is not corrupted. */
+	if (Node->VidMem.offset + Node->VidMem.bytes != node->VidMem.offset)
+	{
+		/* Corrupted heap. */
+		gcmkASSERT(
+			Node->VidMem.offset + Node->VidMem.bytes == node->VidMem.offset);
+		return gcvSTATUS_HEAP_CORRUPTED;
+	}
+
+	/* Adjust byte count. */
+	Node->VidMem.bytes += node->VidMem.bytes;
+
+	/* Unlink next node from linked list. */
+	Node->VidMem.next     = node->VidMem.next;
+	Node->VidMem.nextFree = node->VidMem.nextFree;
+
+	Node->VidMem.next->VidMem.prev         =
+	Node->VidMem.nextFree->VidMem.prevFree = Node;
+
+	/* Free next node. */
+	return gckOS_Free(Os, node);
+}
+
+/******************************************************************************\
+******************************* gckVIDMEM API Code ******************************
+\******************************************************************************/
+
+/*******************************************************************************
+**
+**	gckVIDMEM_ConstructVirtual
+**
+**	Construct a new gcuVIDMEM_NODE union for virtual memory.
+**
+**	INPUT:
+**
+**		gckKERNEL Kernel
+**			Pointer to an gckKERNEL object.
+**
+**		gctSIZE_T Bytes
+**			Number of byte to allocate.
+**
+**	OUTPUT:
+**
+**		gcuVIDMEM_NODE_PTR * Node
+**			Pointer to a variable that receives the gcuVIDMEM_NODE union pointer.
+*/
+gceSTATUS
+gckVIDMEM_ConstructVirtual(
+	IN gckKERNEL Kernel,
+	IN gctBOOL Contiguous,
+	IN gctSIZE_T Bytes,
+#ifdef __QNXNTO__
+	IN gctHANDLE Handle,
+#endif
+	OUT gcuVIDMEM_NODE_PTR * Node
+	)
+{
+	gckOS os;
+	gceSTATUS status;
+	gcuVIDMEM_NODE_PTR node = gcvNULL;
+
+	gcmkHEADER_ARG("Kernel=0x%x Bytes=%lu", Kernel, Bytes);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Kernel, gcvOBJ_KERNEL);
+	gcmkVERIFY_ARGUMENT(Bytes > 0);
+	gcmkVERIFY_ARGUMENT(Node != gcvNULL);
+#ifdef __QNXNTO__
+	gcmkVERIFY_ARGUMENT(Handle != gcvNULL);
+#endif
+
+	/* Extract the gckOS object pointer. */
+	os = Kernel->os;
+	gcmkVERIFY_OBJECT(os, gcvOBJ_OS);
+
+	/* Allocate an gcuVIDMEM_NODE union. */
+	gcmkONERROR(
+		gckOS_Allocate(os, gcmSIZEOF(gcuVIDMEM_NODE), (gctPOINTER *) &node));
+
+	/* Initialize gcuVIDMEM_NODE union for virtual memory. */
+	node->Virtual.kernel        = Kernel;
+	node->Virtual.contiguous 	= Contiguous;
+	node->Virtual.locked        = 0;
+	node->Virtual.logical       = gcvNULL;
+	node->Virtual.pageTable     = gcvNULL;
+	node->Virtual.mutex         = gcvNULL;
+#ifdef __QNXNTO__
+	node->Virtual.next          = gcvNULL;
+	node->Virtual.unlockPending = gcvFALSE;
+	node->Virtual.freePending   = gcvFALSE;
+	node->Virtual.handle        = Handle;
+#else
+	node->Virtual.pending       = gcvFALSE;
+#endif
+
+	/* Create the mutex. */
+	gcmkONERROR(
+		gckOS_CreateMutex(os, &node->Virtual.mutex));
+
+	/* Allocate the virtual memory. */
+	gcmkONERROR(
+		gckOS_AllocatePagedMemoryEx(os,
+									node->Virtual.contiguous,
+									node->Virtual.bytes = Bytes,
+									&node->Virtual.physical));
+
+#ifdef __QNXNTO__
+	/* Register. */
+	gckMMU_InsertNode(Kernel->mmu, node);
+#endif
+
+	/* Return pointer to the gcuVIDMEM_NODE union. */
+	*Node = node;
+
+	gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_VIDMEM,
+				   "Created virtual node 0x%x for %u bytes @ 0x%x",
+				   node, Bytes, node->Virtual.physical);
+
+	/* Success. */
+	gcmkFOOTER_ARG("*Node=0x%x", *Node);
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Roll back. */
+	if (node != gcvNULL)
+	{
+		if (node->Virtual.mutex != gcvNULL)
+		{
+			/* Destroy the mutex. */
+			gcmkVERIFY_OK(gckOS_DeleteMutex(os, node->Virtual.mutex));
+		}
+
+		/* Free the structure. */
+		gcmkVERIFY_OK(gckOS_Free(os, node));
+	}
+
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckVIDMEM_DestroyVirtual
+**
+**	Destroy an gcuVIDMEM_NODE union for virtual memory.
+**
+**	INPUT:
+**
+**		gcuVIDMEM_NODE_PTR Node
+**			Pointer to a gcuVIDMEM_NODE union.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckVIDMEM_DestroyVirtual(
+	IN gcuVIDMEM_NODE_PTR Node
+	)
+{
+	gckOS os;
+
+	gcmkHEADER_ARG("Node=0x%x", Node);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Node->Virtual.kernel, gcvOBJ_KERNEL);
+
+	/* Extact the gckOS object pointer. */
+	os = Node->Virtual.kernel->os;
+	gcmkVERIFY_OBJECT(os, gcvOBJ_OS);
+
+#ifdef __QNXNTO__
+    /* Unregister. */
+	gcmkVERIFY_OK(
+	        gckMMU_RemoveNode(Node->Virtual.kernel->mmu, Node));
+
+	/* Free virtual memory. */
+	gcmkVERIFY_OK(
+	        gckOS_FreePagedMemory(os,
+	                              Node->Virtual.physical,
+	                              Node->Virtual.bytes));
+#endif
+
+	/* Delete the mutex. */
+	gcmkVERIFY_OK(gckOS_DeleteMutex(os, Node->Virtual.mutex));
+
+	if (Node->Virtual.pageTable != gcvNULL)
+	{
+		/* Free the pages. */
+		gcmkVERIFY_OK(gckMMU_FreePages(Node->Virtual.kernel->mmu,
+									   Node->Virtual.pageTable,
+									   Node->Virtual.pageCount));
+	}
+
+	/* Delete the gcuVIDMEM_NODE union. */
+	gcmkVERIFY_OK(gckOS_Free(os, Node));
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckVIDMEM_Construct
+**
+**	Construct a new gckVIDMEM object.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctUINT32 BaseAddress
+**			Base address for the video memory heap.
+**
+**		gctSIZE_T Bytes
+**			Number of bytes in the video memory heap.
+**
+**		gctSIZE_T Threshold
+**			Minimum number of bytes beyond am allocation before the node is
+**			split.  Can be used as a minimum alignment requirement.
+**
+**		gctSIZE_T BankSize
+**			Number of bytes per physical memory bank.  Used by bank
+**			optimization.
+**
+**	OUTPUT:
+**
+**		gckVIDMEM * Memory
+**			Pointer to a variable that will hold the pointer to the gckVIDMEM
+**			object.
+*/
+gceSTATUS
+gckVIDMEM_Construct(
+	IN gckOS Os,
+	IN gctUINT32 BaseAddress,
+	IN gctSIZE_T Bytes,
+	IN gctSIZE_T Threshold,
+	IN gctSIZE_T BankSize,
+	OUT gckVIDMEM * Memory
+	)
+{
+	gckVIDMEM memory = gcvNULL;
+	gceSTATUS status;
+	gcuVIDMEM_NODE_PTR node;
+	gctINT i, banks = 0;
+
+	gcmkHEADER_ARG("Os=0x%x BaseAddress=%08x Bytes=%lu Threshold=%lu "
+				   "BankSize=%lu",
+				   Os, BaseAddress, Bytes, Threshold, BankSize);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmkVERIFY_ARGUMENT(Bytes > 0);
+	gcmkVERIFY_ARGUMENT(Memory != gcvNULL);
+
+	/* Allocate the gckVIDMEM object. */
+	gcmkONERROR(
+		gckOS_Allocate(Os,
+					   gcmSIZEOF(struct _gckVIDMEM),
+					   (gctPOINTER *) &memory));
+
+	/* Initialize the gckVIDMEM object. */
+	memory->object.type = gcvOBJ_VIDMEM;
+	memory->os          = Os;
+
+	/* Set video memory heap information. */
+	memory->baseAddress = BaseAddress;
+	memory->bytes       = Bytes;
+	memory->freeBytes   = Bytes;
+	memory->threshold   = Threshold;
+	memory->mutex       = gcvNULL;
+
+	BaseAddress = 0;
+
+	/* Walk all possible banks. */
+	for (i = 0; i < gcmCOUNTOF(memory->sentinel); ++i)
+	{
+		gctSIZE_T bytes;
+
+		if (BankSize == 0)
+		{
+			/* Use all bytes for the first bank. */
+			bytes = Bytes;
+		}
+		else
+		{
+			/* Compute number of bytes for this bank. */
+			bytes = gcmALIGN(BaseAddress + 1, BankSize) - BaseAddress;
+
+			if (bytes > Bytes)
+			{
+				/* Make sure we don't exceed the total number of bytes. */
+				bytes = Bytes;
+			}
+		}
+
+		if (bytes == 0)
+		{
+			/* Mark heap is not used. */
+			memory->sentinel[i].VidMem.next     =
+			memory->sentinel[i].VidMem.prev     =
+			memory->sentinel[i].VidMem.nextFree =
+			memory->sentinel[i].VidMem.prevFree = gcvNULL;
+			continue;
+		}
+
+		/* Allocate one gcuVIDMEM_NODE union. */
+		gcmkONERROR(
+			gckOS_Allocate(Os,
+						   gcmSIZEOF(gcuVIDMEM_NODE),
+						   (gctPOINTER *) &node));
+
+		/* Initialize gcuVIDMEM_NODE union. */
+		node->VidMem.memory    = memory;
+
+		node->VidMem.next      =
+		node->VidMem.prev      =
+		node->VidMem.nextFree  =
+		node->VidMem.prevFree  = &memory->sentinel[i];
+
+		node->VidMem.offset    = BaseAddress;
+		node->VidMem.bytes     = bytes;
+		node->VidMem.alignment = 0;
+		node->VidMem.physical  = 0;
+		node->VidMem.pool      = gcvPOOL_UNKNOWN;
+
+		node->VidMem.locked    = 0;
+
+#ifdef __QNXNTO__
+        node->VidMem.logical   = gcvNULL;
+        node->VidMem.handle    = 0;
+#endif
+
+		/* Initialize the linked list of nodes. */
+		memory->sentinel[i].VidMem.next     =
+		memory->sentinel[i].VidMem.prev     =
+		memory->sentinel[i].VidMem.nextFree =
+		memory->sentinel[i].VidMem.prevFree = node;
+
+		/* Mark sentinel. */
+		memory->sentinel[i].VidMem.bytes = 0;
+
+		/* Adjust address for next bank. */
+		BaseAddress += bytes;
+		Bytes       -= bytes;
+		banks       ++;
+	}
+
+	/* Assign all the bank mappings. */
+	memory->mapping[gcvSURF_RENDER_TARGET]      = banks - 1;
+	memory->mapping[gcvSURF_BITMAP]             = banks - 1;
+	if (banks > 1) --banks;
+	memory->mapping[gcvSURF_DEPTH]              = banks - 1;
+	memory->mapping[gcvSURF_HIERARCHICAL_DEPTH] = banks - 1;
+	if (banks > 1) --banks;
+	memory->mapping[gcvSURF_TEXTURE]            = banks - 1;
+	if (banks > 1) --banks;
+	memory->mapping[gcvSURF_VERTEX]             = banks - 1;
+	if (banks > 1) --banks;
+	memory->mapping[gcvSURF_INDEX]              = banks - 1;
+	if (banks > 1) --banks;
+	memory->mapping[gcvSURF_TILE_STATUS]        = banks - 1;
+	if (banks > 1) --banks;
+	memory->mapping[gcvSURF_TYPE_UNKNOWN]       = 0;
+
+	gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_VIDMEM,
+				  "[GALCORE] INDEX:         bank %d",
+				  memory->mapping[gcvSURF_INDEX]);
+	gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_VIDMEM,
+				  "[GALCORE] VERTEX:        bank %d",
+				  memory->mapping[gcvSURF_VERTEX]);
+	gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_VIDMEM,
+				  "[GALCORE] TEXTURE:       bank %d",
+				  memory->mapping[gcvSURF_TEXTURE]);
+	gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_VIDMEM,
+				  "[GALCORE] RENDER_TARGET: bank %d",
+				  memory->mapping[gcvSURF_RENDER_TARGET]);
+	gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_VIDMEM,
+				  "[GALCORE] DEPTH:         bank %d",
+				  memory->mapping[gcvSURF_DEPTH]);
+	gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_VIDMEM,
+				  "[GALCORE] TILE_STATUS:   bank %d",
+				  memory->mapping[gcvSURF_TILE_STATUS]);
+
+	/* Allocate the mutex. */
+	gcmkONERROR(gckOS_CreateMutex(Os, &memory->mutex));
+
+	/* Return pointer to the gckVIDMEM object. */
+	*Memory = memory;
+
+	/* Success. */
+	gcmkFOOTER_ARG("*Memory=0x%x", *Memory);
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Roll back. */
+	if (memory != gcvNULL)
+	{
+		if (memory->mutex != gcvNULL)
+		{
+			/* Delete the mutex. */
+			gcmkVERIFY_OK(gckOS_DeleteMutex(Os, memory->mutex));
+		}
+
+		for (i = 0; i < banks; ++i)
+		{
+			/* Free the heap. */
+			gcmkASSERT(memory->sentinel[i].VidMem.next != gcvNULL);
+			gcmkVERIFY_OK(gckOS_Free(Os, memory->sentinel[i].VidMem.next));
+		}
+
+		/* Free the object. */
+		gcmkVERIFY_OK(gckOS_Free(Os, memory));
+	}
+
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckVIDMEM_Destroy
+**
+**	Destroy an gckVIDMEM object.
+**
+**	INPUT:
+**
+**		gckVIDMEM Memory
+**			Pointer to an gckVIDMEM object to destroy.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckVIDMEM_Destroy(
+	IN gckVIDMEM Memory
+	)
+{
+	gcuVIDMEM_NODE_PTR node, next;
+	gctINT i;
+
+	gcmkHEADER_ARG("Memory=0x%x", Memory);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Memory, gcvOBJ_VIDMEM);
+
+	/* Walk all sentinels. */
+	for (i = 0; i < gcmCOUNTOF(Memory->sentinel); ++i)
+	{
+		/* Bail out of the heap is not used. */
+		if (Memory->sentinel[i].VidMem.next == gcvNULL)
+		{
+			break;
+		}
+
+		/* Walk all the nodes until we reach the sentinel. */
+		for (node = Memory->sentinel[i].VidMem.next;
+			 node->VidMem.bytes != 0;
+			 node = next)
+		{
+			/* Save pointer to the next node. */
+			next = node->VidMem.next;
+
+			/* Free the node. */
+			gcmkVERIFY_OK(gckOS_Free(Memory->os, node));
+		}
+	}
+
+    /* Free the mutex. */
+    gcmkVERIFY_OK(gckOS_DeleteMutex(Memory->os, Memory->mutex));
+
+	/* Mark the object as unknown. */
+	Memory->object.type = gcvOBJ_UNKNOWN;
+
+	/* Free the gckVIDMEM object. */
+	gcmkVERIFY_OK(gckOS_Free(Memory->os, Memory));
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckVIDMEM_Allocate
+**
+**	Allocate rectangular memory from the gckVIDMEM object.
+**
+**	INPUT:
+**
+**		gckVIDMEM Memory
+**			Pointer to an gckVIDMEM object.
+**
+**		gctUINT Width
+**			Width of rectangle to allocate.  Make sure the width is properly
+**			aligned.
+**
+**		gctUINT Height
+**			Height of rectangle to allocate.  Make sure the height is properly
+**			aligned.
+**
+**		gctUINT Depth
+**			Depth of rectangle to allocate.  This equals to the number of
+**			rectangles to allocate contiguously (i.e., for cubic maps and volume
+**			textures).
+**
+**		gctUINT BytesPerPixel
+**			Number of bytes per pixel.
+**
+**		gctUINT32 Alignment
+**			Byte alignment for allocation.
+**
+**		gceSURF_TYPE Type
+**			Type of surface to allocate (use by bank optimization).
+**
+**	OUTPUT:
+**
+**		gcuVIDMEM_NODE_PTR * Node
+**			Pointer to a variable that will hold the allocated memory node.
+*/
+gceSTATUS
+gckVIDMEM_Allocate(
+	IN gckVIDMEM Memory,
+	IN gctUINT Width,
+	IN gctUINT Height,
+	IN gctUINT Depth,
+	IN gctUINT BytesPerPixel,
+	IN gctUINT32 Alignment,
+	IN gceSURF_TYPE Type,
+#ifdef __QNXNTO__
+	IN gctHANDLE Handle,
+#endif
+	OUT gcuVIDMEM_NODE_PTR * Node
+	)
+{
+	gctSIZE_T bytes;
+	gceSTATUS status;
+
+	gcmkHEADER_ARG("Memory=0x%x Width=%u Height=%u Depth=%u BytesPerPixel=%u "
+				   "Alignment=%u Type=%d",
+				   Memory, Width, Height, Depth, BytesPerPixel, Alignment,
+				   Type);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Memory, gcvOBJ_VIDMEM);
+	gcmkVERIFY_ARGUMENT(Width > 0);
+	gcmkVERIFY_ARGUMENT(Height > 0);
+	gcmkVERIFY_ARGUMENT(Depth > 0);
+	gcmkVERIFY_ARGUMENT(BytesPerPixel > 0);
+	gcmkVERIFY_ARGUMENT(Node != gcvNULL);
+#ifdef __QNXNTO__
+	gcmkVERIFY_ARGUMENT(Handle != gcvNULL);
+#endif
+
+	/* Compute linear size. */
+	bytes = Width * Height * Depth * BytesPerPixel;
+
+	/* Allocate through linear function. */
+#ifdef __QNXNTO__
+	gcmkONERROR(
+		gckVIDMEM_AllocateLinear(Memory, bytes, Alignment, Type, Handle, Node));
+#else
+	gcmkONERROR(
+		gckVIDMEM_AllocateLinear(Memory, bytes, Alignment, Type, Node));
+#endif
+
+	/* Success. */
+	gcmkFOOTER_ARG("*Node=0x%x", *Node);
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+static gcuVIDMEM_NODE_PTR
+_FindNode(
+	IN gckVIDMEM Memory,
+	IN gctINT Bank,
+	IN gctSIZE_T Bytes,
+	IN OUT gctUINT32_PTR Alignment
+	)
+{
+	gcuVIDMEM_NODE_PTR node;
+	gctUINT32 alignment;
+
+	/* Walk all free nodes until we have one that is big enough or we have
+	   reached the sentinel. */
+	for (node = Memory->sentinel[Bank].VidMem.nextFree;
+		 node->VidMem.bytes != 0;
+		 node = node->VidMem.nextFree)
+	{
+		/* Compute number of bytes to skip for alignment. */
+		alignment = (*Alignment == 0)
+				  ? 0
+				  : (*Alignment - (node->VidMem.offset % *Alignment));
+
+		if (alignment == *Alignment)
+		{
+			/* Node is already aligned. */
+			alignment = 0;
+		}
+
+		if (node->VidMem.bytes >= Bytes + alignment)
+		{
+			/* This node is big enough. */
+			*Alignment = alignment;
+			return node;
+		}
+	}
+
+	/* Not enough memory. */
+	return gcvNULL;
+}
+
+/*******************************************************************************
+**
+**	gckVIDMEM_AllocateLinear
+**
+**	Allocate linear memory from the gckVIDMEM object.
+**
+**	INPUT:
+**
+**		gckVIDMEM Memory
+**			Pointer to an gckVIDMEM object.
+**
+**		gctSIZE_T Bytes
+**			Number of bytes to allocate.
+**
+**		gctUINT32 Alignment
+**			Byte alignment for allocation.
+**
+**		gceSURF_TYPE Type
+**			Type of surface to allocate (use by bank optimization).
+**
+**	OUTPUT:
+**
+**		gcuVIDMEM_NODE_PTR * Node
+**			Pointer to a variable that will hold the allocated memory node.
+*/
+gceSTATUS
+gckVIDMEM_AllocateLinear(
+	IN gckVIDMEM Memory,
+	IN gctSIZE_T Bytes,
+	IN gctUINT32 Alignment,
+	IN gceSURF_TYPE Type,
+#ifdef __QNXNTO__
+	IN gctHANDLE Handle,
+#endif
+	OUT gcuVIDMEM_NODE_PTR * Node
+	)
+{
+    gceSTATUS status;
+	gcuVIDMEM_NODE_PTR node;
+	gctUINT32 alignment;
+	gctINT bank, i;
+	gctBOOL acquired = gcvFALSE;
+
+	gcmkHEADER_ARG("Memory=0x%x Bytes=%lu Alignment=%u Type=%d",
+				   Memory, Bytes, Alignment, Type);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Memory, gcvOBJ_VIDMEM);
+	gcmkVERIFY_ARGUMENT(Bytes > 0);
+	gcmkVERIFY_ARGUMENT(Node != gcvNULL);
+#ifdef __QNXNTO__
+	gcmkVERIFY_ARGUMENT(Handle != gcvNULL);
+#endif
+
+    /* Acquire the mutex. */
+    gcmkONERROR(
+	gckOS_AcquireMutex(Memory->os, Memory->mutex, gcvINFINITE));
+
+    acquired = gcvTRUE;
+
+	if (Bytes > Memory->freeBytes)
+	{
+		/* Not enough memory. */
+		gcmkONERROR(gcvSTATUS_OUT_OF_MEMORY);
+	}
+
+	/* Find the default bank for this surface type. */
+	gcmkASSERT((gctINT) Type < gcmCOUNTOF(Memory->mapping));
+	bank      = Memory->mapping[Type];
+	alignment = Alignment;
+
+	/* Find a free node in the default bank. */
+	node = _FindNode(Memory, bank, Bytes, &alignment);
+
+	/* Out of memory? */
+	if (node == gcvNULL)
+	{
+		/* Walk all lower banks. */
+		for (i = bank - 1; i >= 0; --i)
+		{
+			/* Find a free node inside the current bank. */
+			node = _FindNode(Memory, i, Bytes, &alignment);
+			if (node != gcvNULL)
+			{
+				break;
+			}
+		}
+	}
+
+	if (node == gcvNULL)
+	{
+		/* Walk all upper banks. */
+		for (i = bank + 1; i < gcmCOUNTOF(Memory->sentinel); ++i)
+		{
+			if (Memory->sentinel[i].VidMem.nextFree == gcvNULL)
+			{
+				/* Abort when we reach unused banks. */
+				break;
+			}
+
+			/* Find a free node inside the current bank. */
+			node = _FindNode(Memory, i, Bytes, &alignment);
+			if (node != gcvNULL)
+			{
+				break;
+			}
+		}
+	}
+
+	if (node == gcvNULL)
+	{
+		/* Out of memory. */
+		gcmkONERROR(gcvSTATUS_OUT_OF_MEMORY);
+	}
+
+	/* Do we have an alignment? */
+	if (alignment > 0)
+	{
+		/* Split the node so it is aligned. */
+		if (_Split(Memory->os, node, alignment))
+		{
+			/* Successful split, move to aligned node. */
+			node = node->VidMem.next;
+
+			/* Remove alignment. */
+			alignment = 0;
+		}
+	}
+
+	/* Do we have enough memory after the allocation to split it? */
+	if (node->VidMem.bytes - Bytes > Memory->threshold)
+	{
+		/* Adjust the node size. */
+		_Split(Memory->os, node, Bytes);
+	}
+
+	/* Remove the node from the free list. */
+	node->VidMem.prevFree->VidMem.nextFree = node->VidMem.nextFree;
+	node->VidMem.nextFree->VidMem.prevFree = node->VidMem.prevFree;
+	node->VidMem.nextFree                  =
+	node->VidMem.prevFree                  = gcvNULL;
+
+	/* Fill in the information. */
+	node->VidMem.alignment = alignment;
+	node->VidMem.memory    = Memory;
+#ifdef __QNXNTO__
+	node->VidMem.logical   = gcvNULL;
+	node->VidMem.handle    = Handle;
+#endif
+
+	/* Adjust the number of free bytes. */
+	Memory->freeBytes -= node->VidMem.bytes;
+
+	/* Release the mutex. */
+	gcmkVERIFY_OK(gckOS_ReleaseMutex(Memory->os, Memory->mutex));
+
+	/* Return the pointer to the node. */
+	*Node = node;
+
+	gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_VIDMEM,
+				   "Allocated %u bytes @ 0x%x [0x%08X]",
+				   node->VidMem.bytes, node, node->VidMem.offset);
+
+	/* Success. */
+	gcmkFOOTER_ARG("*Node=0x%x", *Node);
+	return gcvSTATUS_OK;
+
+OnError:
+	if (acquired)
+	{
+	 /* Release the mutex. */
+	gcmkVERIFY_OK(gckOS_ReleaseMutex(Memory->os, Memory->mutex));
+    }
+
+    /* Return the status. */
+    gcmkFOOTER();
+    return status;
+}
+
+/*******************************************************************************
+**
+**	gckVIDMEM_Free
+**
+**	Free an allocated video memory node.
+**
+**	INPUT:
+**
+**		gcuVIDMEM_NODE_PTR Node
+**			Pointer to a gcuVIDMEM_NODE object.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckVIDMEM_Free(
+	IN gcuVIDMEM_NODE_PTR Node
+	)
+{
+	gckVIDMEM memory = gcvNULL;
+	gcuVIDMEM_NODE_PTR node;
+	gceSTATUS status;
+	gctBOOL acquired = gcvFALSE;
+
+	gcmkHEADER_ARG("Node=0x%x", Node);
+
+	/* Verify the arguments. */
+	if ((Node == gcvNULL)
+	||  (Node->VidMem.memory == gcvNULL)
+	)
+	{
+		/* Invalid object. */
+		gcmkONERROR(gcvSTATUS_INVALID_OBJECT);
+	}
+
+	/**************************** Video Memory ********************************/
+
+	if (Node->VidMem.memory->object.type == gcvOBJ_VIDMEM)
+	{
+		if (Node->VidMem.locked > 0)
+		{
+			gcmkTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_VIDMEM,
+						   "Node 0x%x is locked (%d)",
+						   Node, Node->VidMem.locked);
+
+			/* Node is locked. */
+			gcmkONERROR(gcvSTATUS_MEMORY_LOCKED);
+		}
+
+		/* Extract pointer to gckVIDMEM object owning the node. */
+		memory = Node->VidMem.memory;
+
+		/* Acquire the mutex. */
+		gcmkONERROR(
+			gckOS_AcquireMutex(memory->os, memory->mutex, gcvINFINITE));
+
+		acquired = gcvTRUE;
+
+#ifdef __QNXNTO__
+		/* Reset handle to 0. */
+        Node->VidMem.logical = gcvNULL;
+		Node->VidMem.handle = 0;
+
+        /* Don't try to a re-free an already freed node. */
+		if ((Node->VidMem.nextFree == gcvNULL)
+		&&  (Node->VidMem.prevFree == gcvNULL)
+		)
+#endif
+		{
+            /* Update the number of free bytes. */
+            memory->freeBytes += Node->VidMem.bytes;
+
+            /* Find the next free node. */
+            for (node = Node->VidMem.next;
+                 node->VidMem.nextFree == gcvNULL;
+                 node = node->VidMem.next) ;
+
+            /* Insert this node in the free list. */
+            Node->VidMem.nextFree = node;
+            Node->VidMem.prevFree = node->VidMem.prevFree;
+
+            Node->VidMem.prevFree->VidMem.nextFree =
+            node->VidMem.prevFree                  = Node;
+
+            /* Is the next node a free node and not the sentinel? */
+            if ((Node->VidMem.next == Node->VidMem.nextFree)
+            &&  (Node->VidMem.next->VidMem.bytes != 0)
+            )
+            {
+                /* Merge this node with the next node. */
+                gcmkONERROR(_Merge(memory->os, node = Node));
+                gcmkASSERT(node->VidMem.nextFree != node);
+                gcmkASSERT(node->VidMem.prevFree != node);
+            }
+
+            /* Is the previous node a free node and not the sentinel? */
+            if ((Node->VidMem.prev == Node->VidMem.prevFree)
+            &&  (Node->VidMem.prev->VidMem.bytes != 0)
+            )
+            {
+                /* Merge this node with the previous node. */
+                gcmkONERROR(_Merge(memory->os, node = Node->VidMem.prev));
+                gcmkASSERT(node->VidMem.nextFree != node);
+                gcmkASSERT(node->VidMem.prevFree != node);
+            }
+		}
+
+		/* Release the mutex. */
+		gcmkVERIFY_OK(gckOS_ReleaseMutex(memory->os, memory->mutex));
+
+		/* Success. */
+		gcmkFOOTER_NO();
+		return gcvSTATUS_OK;
+	}
+
+	/*************************** Virtual Memory *******************************/
+
+	/* Verify the gckKERNEL object pointer. */
+	gcmkVERIFY_OBJECT(Node->Virtual.kernel, gcvOBJ_KERNEL);
+
+#ifdef __QNXNTO__
+	if (!Node->Virtual.unlockPending && (Node->Virtual.locked > 0))
+#else
+	if (!Node->Virtual.pending && (Node->Virtual.locked > 0))
+#endif
+	{
+		gcmkTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_VIDMEM,
+					   "gckVIDMEM_Free: Virtual node 0x%x is locked (%d)",
+					   Node, Node->Virtual.locked);
+
+		/* Node is locked. */
+		gcmkONERROR(gcvSTATUS_MEMORY_LOCKED);
+	}
+
+#ifdef __QNXNTO__
+	if (!Node->Virtual.freePending) { if (Node->Virtual.unlockPending)
+#else
+    if (Node->Virtual.pending)
+#endif
+    {
+        gcmkASSERT(Node->Virtual.locked == 1);
+
+        /* Schedule the node to be freed. */
+        gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_VIDMEM,
+                       "gckVIDMEM_Free: Scheduling node 0x%x to be freed later",
+                       Node);
+
+        /* Schedule the video memory to be freed again. */
+        gcmkONERROR(gckEVENT_FreeVideoMemory(Node->Virtual.kernel->event,
+											 Node,
+											 gcvKERNEL_PIXEL));
+
+#ifdef __QNXNTO__
+		Node->Virtual.freePending = gcvTRUE; }
+#endif
+	}
+
+    else
+    {
+		/* Free the virtual memory. */
+		gcmkVERIFY_OK(gckOS_FreePagedMemory(Node->Virtual.kernel->os,
+										    Node->Virtual.physical,
+										    Node->Virtual.bytes));
+
+        /* Destroy the gcuVIDMEM_NODE union. */
+        gcmkVERIFY_OK(gckVIDMEM_DestroyVirtual(Node));
+    }
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+
+OnError:
+	if (acquired)
+	{
+		/* Release the mutex. */
+		gcmkVERIFY_OK(gckOS_ReleaseMutex(memory->os, memory->mutex));
+	}
+
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+
+#ifdef __QNXNTO__
+/*******************************************************************************
+**
+**	gcoVIDMEM_FreeHandleMemory
+**
+**	Free all allocated video memory nodes for a handle.
+**
+**	INPUT:
+**
+**		gcoVIDMEM Memory
+**			Pointer to an gcoVIDMEM object..
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckVIDMEM_FreeHandleMemory(
+	IN gckVIDMEM Memory,
+	IN gctHANDLE Handle
+	)
+{
+    gceSTATUS status;
+    gctBOOL mutex = gcvFALSE;
+	gcuVIDMEM_NODE_PTR node;
+	gctINT i;
+	gctUINT32 nodeCount = 0, byteCount = 0;
+	gctBOOL again;
+
+	gcmkHEADER_ARG("Memory=0x%x Handle=0x%x", Memory, Handle);
+
+	gcmkVERIFY_OBJECT(Memory, gcvOBJ_VIDMEM);
+
+	gcmkONERROR(gckOS_AcquireMutex(Memory->os, Memory->mutex, gcvINFINITE));
+	mutex = gcvTRUE;
+
+	/* Walk all sentinels. */
+	for (i = 0; i < gcmCOUNTOF(Memory->sentinel); ++i)
+	{
+		/* Bail out of the heap if it is not used. */
+		if (Memory->sentinel[i].VidMem.next == gcvNULL)
+		{
+			break;
+		}
+
+		do
+		{
+		    again = gcvFALSE;
+
+		    /* Walk all the nodes until we reach the sentinel. */
+            for (node = Memory->sentinel[i].VidMem.next;
+                 node->VidMem.bytes != 0;
+                 node = node->VidMem.next)
+            {
+                /* Free the node if it was allocated by Handle. */
+                if (node->VidMem.handle == Handle)
+                {
+                    /* Unlock video memory. */
+                    while (gckVIDMEM_Unlock(node, gcvSURF_TYPE_UNKNOWN, gcvNULL, gcvNULL)
+                        != gcvSTATUS_MEMORY_UNLOCKED)
+                        ;
+
+                    nodeCount++;
+                    byteCount += node->VidMem.bytes;
+
+                    /* Free video memory. */
+                    gcmkVERIFY_OK(gckVIDMEM_Free(node, gcvNULL));
+
+                    /*
+                     * Freeing may cause a merge which will invalidate our iteration.
+                     * Don't be clever, just restart.
+                     */
+                    again = gcvTRUE;
+
+                    break;
+                }
+            }
+		}
+		while (again);
+	}
+
+	gcmkVERIFY_OK(gckOS_ReleaseMutex(Memory->os, Memory->mutex));
+	gcmkFOOTER();
+	return gcvSTATUS_OK;
+
+OnError:
+    if (mutex)
+    {
+        gcmkVERIFY_OK(gckOS_ReleaseMutex(Memory->os, Memory->mutex));
+    }
+
+    gcmkFOOTER();
+    return status;
+}
+#endif
+
+/*******************************************************************************
+**
+**	gckVIDMEM_Lock
+**
+**	Lock a video memory node and return it's hardware specific address.
+**
+**	INPUT:
+**
+**		gcuVIDMEM_NODE_PTR Node
+**			Pointer to a gcuVIDMEM_NODE union.
+**
+**	OUTPUT:
+**
+**		gctUINT32 * Address
+**			Pointer to a variable that will hold the hardware specific address.
+*/
+gceSTATUS
+gckVIDMEM_Lock(
+	IN gcuVIDMEM_NODE_PTR Node,
+	OUT gctUINT32 * Address
+	)
+{
+	gceSTATUS status;
+	gctBOOL acquired = gcvFALSE;
+	gctBOOL locked = gcvFALSE;
+	gckOS os = gcvNULL;
+
+	gcmkHEADER_ARG("Node=0x%x", Node);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_ARGUMENT(Address != gcvNULL);
+
+	if ((Node == gcvNULL)
+	||  (Node->VidMem.memory == gcvNULL)
+	)
+	{
+		/* Invalid object. */
+		gcmkONERROR(gcvSTATUS_INVALID_OBJECT);
+	}
+
+	/**************************** Video Memory ********************************/
+
+	if (Node->VidMem.memory->object.type == gcvOBJ_VIDMEM)
+	{
+		/* Increment the lock count. */
+		Node->VidMem.locked ++;
+
+		/* Return the address of the node. */
+		*Address = Node->VidMem.memory->baseAddress
+				 + Node->VidMem.offset
+				 + Node->VidMem.alignment;
+
+		gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_VIDMEM,
+					  "Locked node 0x%x (%d) @ 0x%08X",
+					  Node,
+					  Node->VidMem.locked,
+					  *Address);
+	}
+
+	/*************************** Virtual Memory *******************************/
+
+	else
+	{
+		/* Verify the gckKERNEL object pointer. */
+		gcmkVERIFY_OBJECT(Node->Virtual.kernel, gcvOBJ_KERNEL);
+
+		/* Extract the gckOS object pointer. */
+		os = Node->Virtual.kernel->os;
+		gcmkVERIFY_OBJECT(os, gcvOBJ_OS);
+
+		/* Grab the mutex. */
+		gcmkONERROR(gckOS_AcquireMutex(os, Node->Virtual.mutex, gcvINFINITE));
+		acquired = gcvTRUE;
+
+		/* Increment the lock count. */
+		if (Node->Virtual.locked ++ == 0)
+		{
+			/* Is this node pending for a final unlock? */
+#ifdef __QNXNTO__
+			if (!Node->Virtual.contiguous && Node->Virtual.unlockPending)
+#else
+			if (!Node->Virtual.contiguous && Node->Virtual.pending)
+#endif
+			{
+				/* Make sure we have a page table. */
+				gcmkASSERT(Node->Virtual.pageTable != gcvNULL);
+
+				/* Remove pending unlock. */
+#ifdef __QNXNTO__
+                Node->Virtual.unlockPending = gcvFALSE;
+#else
+                Node->Virtual.pending = gcvFALSE;
+#endif
+			}
+
+			/* First lock - create a page table. */
+			gcmkASSERT(Node->Virtual.pageTable == gcvNULL);
+
+			/* Make sure we mark our node as not flushed. */
+#ifdef __QNXNTO__
+			Node->Virtual.unlockPending = gcvFALSE;
+#else
+			Node->Virtual.pending = gcvFALSE;
+#endif
+
+			/* Lock the allocated pages. */
+#ifdef __QNXNTO__
+			gcmkONERROR(
+				gckOS_LockPages(os,
+								Node->Virtual.physical,
+								Node->Virtual.bytes,
+								Node->Virtual.userPID,
+								&Node->Virtual.logical,
+								&Node->Virtual.pageCount));
+#else
+			gcmkONERROR(
+				gckOS_LockPages(os,
+								Node->Virtual.physical,
+								Node->Virtual.bytes,
+								&Node->Virtual.logical,
+								&Node->Virtual.pageCount));
+#endif
+
+			locked = gcvTRUE;
+
+			if (Node->Virtual.contiguous)
+			{
+				/* Get physical address directly */
+				gcmkONERROR(gckOS_GetPhysicalAddress(os,
+									Node->Virtual.logical,
+									&Node->Virtual.address));
+			}
+			else
+			{
+				/* Allocate pages inside the MMU. */
+				gcmkONERROR(
+					gckMMU_AllocatePages(Node->Virtual.kernel->mmu,
+										 Node->Virtual.pageCount,
+										 &Node->Virtual.pageTable,
+										 &Node->Virtual.address));
+
+				/* Map the pages. */
+#ifdef __QNXNTO__
+				gcmkONERROR(
+					gckOS_MapPages(os,
+								   Node->Virtual.physical,
+								   Node->Virtual.logical,
+								   Node->Virtual.pageCount,
+								   Node->Virtual.pageTable));
+#else
+				gcmkONERROR(
+					gckOS_MapPages(os,
+								   Node->Virtual.physical,
+								   Node->Virtual.pageCount,
+								   Node->Virtual.pageTable));
+#endif
+
+				gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_VIDMEM,
+							   "Mapped virtual node 0x%x to 0x%08X",
+							   Node,
+							   Node->Virtual.address);
+			}
+		}
+
+		/* Return hardware address. */
+		*Address = Node->Virtual.address;
+
+		/* Release the mutex. */
+		gcmkVERIFY_OK(gckOS_ReleaseMutex(os, Node->Virtual.mutex));
+	}
+
+	/* Success. */
+	gcmkFOOTER_ARG("*Address=%08x", *Address);
+	return gcvSTATUS_OK;
+
+OnError:
+	if (locked)
+	{
+		if (Node->Virtual.pageTable != gcvNULL)
+		{
+			/* Free the pages from the MMU. */
+			gcmkVERIFY_OK(
+				gckMMU_FreePages(Node->Virtual.kernel->mmu,
+								 Node->Virtual.pageTable,
+								 Node->Virtual.pageCount));
+
+			Node->Virtual.pageTable = gcvNULL;
+		}
+
+		/* Unlock the pages. */
+#ifdef __QNXNTO__
+		gcmkVERIFY_OK(
+			gckOS_UnlockPages(os,
+							  Node->Virtual.physical,
+							  Node->Virtual.userPID,
+							  Node->Virtual.bytes,
+							  Node->Virtual.logical));
+#else
+        gcmkVERIFY_OK(
+			gckOS_UnlockPages(os,
+							  Node->Virtual.physical,
+							  Node->Virtual.bytes,
+							  Node->Virtual.logical));
+#endif
+	}
+
+	if (acquired)
+	{
+		/* Release the mutex. */
+		gcmkVERIFY_OK(gckOS_ReleaseMutex(os, Node->Virtual.mutex));
+	}
+
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckVIDMEM_Unlock
+**
+**	Unlock a video memory node.
+**
+**	INPUT:
+**
+**		gcuVIDMEM_NODE_PTR Node
+**			Pointer to a locked gcuVIDMEM_NODE union.
+**
+**		gceSURF_TYPE Type
+**			Type of surface to unlock.
+**
+**		gctSIZE_T * CommandSize
+**			Pointer to a variable specifying the number of bytes in the command
+**			buffer specified by 'Commands'.  If gcvNULL, there is no command
+**			buffer and the video memory shoud be unlocked synchronously.
+**
+**		gctBOOL * Asynchroneous
+**			Pointer to a variable specifying whether the surface should be
+**			unlocked asynchroneously or not.
+**
+**	OUTPUT:
+**
+**		gctBOOL * Asynchroneous
+**			Pointer to a variable receiving the number of bytes used in the
+**			command buffer specified by 'Commands'.  If gcvNULL, there is no
+**			command buffer.
+*/
+gceSTATUS
+gckVIDMEM_Unlock(
+	IN gcuVIDMEM_NODE_PTR Node,
+	IN gceSURF_TYPE Type,
+	IN OUT gctBOOL * Asynchroneous
+	)
+{
+	gceSTATUS status;
+	gckKERNEL kernel;
+	gckHARDWARE hardware;
+	gctPOINTER buffer;
+	gctSIZE_T requested, bufferSize;
+	gckCOMMAND command = gcvNULL;
+	gceKERNEL_FLUSH flush;
+	gckOS os = gcvNULL;
+	gctBOOL acquired = gcvFALSE;
+	gctBOOL needRelease = gcvFALSE;
+	gctBOOL pendingUnlock = gcvFALSE;
+
+	gcmkHEADER_ARG("Node=0x%x Type=%d *Asynchroneous=%d",
+				   Node, Type, gcmOPT_VALUE(Asynchroneous));
+
+	/* Verify the arguments. */
+	if ((Node == gcvNULL)
+	||  (Node->VidMem.memory == gcvNULL)
+	)
+	{
+		/* Invalid object. */
+		gcmkONERROR(gcvSTATUS_INVALID_OBJECT);
+	}
+
+	/**************************** Video Memory ********************************/
+
+	if (Node->VidMem.memory->object.type == gcvOBJ_VIDMEM)
+	{
+		if (Node->VidMem.locked <= 0)
+		{
+			/* The surface was not locked. */
+			gcmkONERROR(gcvSTATUS_MEMORY_UNLOCKED);
+		}
+
+		/* Decrement the lock count. */
+		Node->VidMem.locked --;
+
+		if (Asynchroneous != gcvNULL)
+		{
+			/* No need for any events. */
+			*Asynchroneous = gcvFALSE;
+		}
+	}
+
+	/*************************** Virtual Memory *******************************/
+
+	else
+	{
+		/* Verify the gckKERNEL object pointer. */
+		kernel = Node->Virtual.kernel;
+		gcmkVERIFY_OBJECT(kernel, gcvOBJ_KERNEL);
+
+		/* Verify the gckHARDWARE object pointer. */
+		hardware = Node->Virtual.kernel->hardware;
+		gcmkVERIFY_OBJECT(hardware, gcvOBJ_HARDWARE);
+
+		/* Verify the gckCOMMAND object pointer. */
+		command = Node->Virtual.kernel->command;
+		gcmkVERIFY_OBJECT(command, gcvOBJ_COMMAND);
+
+		if (Asynchroneous == gcvNULL)
+		{
+			gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_VIDMEM,
+						   "gckVIDMEM_Unlock: Unlocking virtual node 0x%x (%d)",
+						   Node,
+						   Node->Virtual.locked);
+
+			/* Get the gckOS object pointer. */
+			os = kernel->os;
+			gcmkVERIFY_OBJECT(os, gcvOBJ_OS);
+
+			/* Grab the mutex. */
+			gcmkONERROR(
+				gckOS_AcquireMutex(os, Node->Virtual.mutex, gcvINFINITE));
+
+			/* If we need to unlock a node from virtual memory we have to be
+			** very carefull.  If the node is still inside the caches we
+			** might get a bus error later if the cache line needs to be
+			** replaced.  So - we have to flush the caches before we do
+			** anything.  We also need to stall to make sure the flush has
+			** happened.  However - when we get to this point we are inside
+			** the interrupt handler and we cannot just gckCOMMAND_Wait
+			** because it will wait forever.  So - what we do here is we
+			** verify the type of the surface, flush the appropriate cache,
+			** mark the node as flushed, and issue another unlock to unmap
+			** the MMU. */
+			if (!Node->Virtual.contiguous
+			&&  (Node->Virtual.locked == 1)
+#ifdef __QNXTO__
+			&&  !Node->Virtual.unlockPending
+#else
+			&&  !Node->Virtual.pending
+#endif
+			)
+			{
+				if (Type == gcvSURF_BITMAP)
+				{
+					/* Flush 2D cache. */
+					flush = gcvFLUSH_2D;
+				}
+				else if (Type == gcvSURF_RENDER_TARGET)
+				{
+					/* Flush color cache. */
+					flush = gcvFLUSH_COLOR;
+				}
+				else if (Type == gcvSURF_DEPTH)
+				{
+					/* Flush depth cache. */
+					flush = gcvFLUSH_DEPTH;
+				}
+				else
+				{
+					/* No flush required. */
+					flush = (gceKERNEL_FLUSH) 0;
+				}
+
+				gcmkONERROR(
+					gckHARDWARE_Flush(hardware, flush, gcvNULL, &requested));
+
+				if (requested != 0)
+				{
+                    gcmkONERROR(
+                        gckCOMMAND_Reserve(command,
+                                           requested,
+										   gcvFALSE,
+                                           &buffer,
+                                           &bufferSize));
+
+                    needRelease = gcvTRUE;
+
+                    gcmkONERROR(gckHARDWARE_Flush(hardware,
+												  flush,
+												  buffer,
+												  &bufferSize));
+
+                    gcmkONERROR(
+                        gckEVENT_Unlock(Node->Virtual.kernel->event,
+                                        gcvKERNEL_PIXEL,
+                                        Node,
+                                        Type));
+
+                    /* Mark node as pending. */
+#ifdef __QNXNTO__
+                    Node->Virtual.unlockPending = gcvTRUE;
+#else
+                    Node->Virtual.pending = gcvTRUE;
+#endif
+
+                    needRelease = gcvFALSE;
+
+                    gcmkONERROR(gckCOMMAND_Execute(command, requested, gcvFALSE));
+
+					pendingUnlock = gcvTRUE;
+				}
+			}
+
+			if (!pendingUnlock)
+			{
+				/* Decrement lock count. */
+				-- Node->Virtual.locked;
+
+				/* See if we can unlock the resources. */
+				if (Node->Virtual.locked == 0)
+				{
+					/* Unlock the pages. */
+#ifdef __QNXNTO__
+					gcmkONERROR(
+						gckOS_UnlockPages(os,
+										  Node->Virtual.physical,
+										  Node->Virtual.userPID,
+										  Node->Virtual.bytes,
+										  Node->Virtual.logical));
+#else
+					gcmkONERROR(
+						gckOS_UnlockPages(os,
+										  Node->Virtual.physical,
+										  Node->Virtual.bytes,
+										  Node->Virtual.logical));
+#endif
+
+					/* Free the page table. */
+					if (Node->Virtual.pageTable != gcvNULL)
+					{
+						gcmkONERROR(
+							gckMMU_FreePages(Node->Virtual.kernel->mmu,
+											 Node->Virtual.pageTable,
+											 Node->Virtual.pageCount));
+
+						/* Mark page table as freed. */
+						Node->Virtual.pageTable = gcvNULL;
+					}
+
+					/* Mark node as unlocked. */
+#ifdef __QNXTO
+					Node->Virtual.unlockPending = gcvFALSE;
+#else
+					Node->Virtual.pending = gcvFALSE;
+#endif
+				}
+
+				gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_VIDMEM,
+							   "Unmapped virtual node 0x%x from 0x%08X",
+							   Node, Node->Virtual.address);
+			}
+
+			/* Release the mutex. */
+			gcmkVERIFY_OK(gckOS_ReleaseMutex(os, Node->Virtual.mutex));
+		}
+
+		else
+		{
+			gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_VIDMEM,
+						   "Scheduled unlock for virtual node 0x%x",
+						   Node);
+
+			/* Schedule the surface to be unlocked. */
+			*Asynchroneous = gcvTRUE;
+		}
+	}
+
+	/* Success. */
+	gcmkFOOTER_ARG("*Asynchroneous=%d", gcmOPT_VALUE(Asynchroneous));
+	return gcvSTATUS_OK;
+
+OnError:
+	if (needRelease)
+	{
+		gcmkVERIFY_OK(gckCOMMAND_Release(command));
+	}
+
+	if (acquired)
+	{
+		/* Release the mutex. */
+		gcmkVERIFY_OK(gckOS_ReleaseMutex(os, Node->Virtual.mutex));
+	}
+
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+#ifdef __QNXNTO__
+/* Set the allocating process' PID for this node. */
+gceSTATUS
+gckVIDMEM_SetPID(
+	IN gcuVIDMEM_NODE_PTR Node,
+	IN gctUINT32 Pid
+	)
+{
+	if (Node != gcvNULL)
+	{
+		if (Node->VidMem.memory->object.type != gcvOBJ_VIDMEM)
+		{
+			Node->Virtual.userPID = Pid;
+		}
+
+	}
+	else
+	{
+		return gcvSTATUS_INVALID_OBJECT;
+	}
+
+	return gcvSTATUS_OK;
+}
+#endif
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/Command.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/Command.c
@@ -0,0 +1,1273 @@
+/****************************************************************************
+*
+*    Copyright (C) 2002 - 2008 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public Lisence as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+
+
+#include "PreComp.h"
+#include "Context.h"
+
+/******************************************************************************\
+********************************* Support Code *********************************
+\******************************************************************************/
+
+/*******************************************************************************
+**
+**	_NewQueue
+**
+**	Allocate a new command queue.
+**
+**	INPUT:
+**
+**		gcoCOMMAND Command
+**			Pointer to an gcoCOMMAND object.
+**
+**	OUTPUT:
+**
+**		gcoCOMMAND Command
+**			gcoCOMMAND object has been updated with a new command queue.
+*/
+static gceSTATUS _NewQueue(
+    IN OUT gcoCOMMAND Command
+    )
+{
+    gceSTATUS status;
+    gctPHYS_ADDR physical;
+    gctPOINTER logical;
+    gctSIZE_T bytes;
+
+    /* Allocate new command queue. */
+    status = gcoOS_AllocateNonPagedMemory(Command->os,
+										 gcvFALSE,
+										 &Command->pageSize,
+                                         &physical,
+										 &logical);
+
+    if (status < 0)
+    {
+        /* Error. */
+        return status;
+    }
+
+    bytes = Command->pageSize;
+
+    /* Schedule old command queue to be deleted. */
+    status = gcoEVENT_FreeNonPagedMemory(Command->kernel->event,
+    									logical,
+    									&bytes,
+                                        Command->pageSize,
+                                        Command->physical,
+                                        Command->logical,
+                                        gcvKERNEL_COMMAND,
+                                        gcvTRUE);
+
+    if (gcmIS_ERROR(status))
+    {
+        /* Roll back. */
+        gcmVERIFY_OK(gcoOS_FreeNonPagedMemory(Command->os, Command->pageSize,
+                                          physical, logical));
+
+        /* Error. */
+        return status;
+    }
+
+    /* Update gcoCOMMAND object with new command queue. */
+    Command->newQueue = gcvTRUE;
+    Command->physical = physical;
+    Command->logical = logical;
+    Command->offset = bytes;
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+/******************************************************************************\
+****************************** gcoCOMMAND API Code ******************************
+\******************************************************************************/
+
+/*******************************************************************************
+**
+**	gcoCOMMAND_Construct
+**
+**	Construct a new gcoCOMMAND object.
+**
+**	INPUT:
+**
+**		gcoKERNEL Kernel
+**			Pointer to an gcoKERNEL object.
+**
+**	OUTPUT:
+**
+**		gcoCOMMAND * Command
+**			Pointer to a variable that will hold the pointer to the gcoCOMMAND
+**			object.
+*/
+gceSTATUS gcoCOMMAND_Construct(
+	IN gcoKERNEL Kernel,
+	OUT gcoCOMMAND * Command
+	)
+{
+    gcoOS os;
+	gcoCOMMAND command;
+	gceSTATUS status;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Kernel, gcvOBJ_KERNEL);
+	gcmVERIFY_ARGUMENT(Command != gcvNULL);
+
+    /* Extract the gcoOS object. */
+    os = Kernel->os;
+
+	/* Allocate the gcoCOMMAND structure. */
+	status = gcoOS_Allocate(os, sizeof(struct _gcoCOMMAND), (gctPOINTER *) &command);
+
+	if (status != gcvSTATUS_OK)
+	{
+		/* Error. */
+		return status;
+	}
+
+	/* Initialize the gcoCOMMAND object.*/
+	command->object.type = gcvOBJ_COMMAND;
+	command->kernel = Kernel;
+	command->os = os;
+
+    /* Get the command buffer requirements. */
+    status = gcoHARDWARE_QueryCommandBuffer(Kernel->hardware,
+                                           &command->alignment,
+                                           &command->reservedHead,
+                                           &command->reservedTail);
+
+    if (status < 0)
+    {
+        /* Roll-back. */
+        gcmVERIFY_OK(gcoOS_Free(os, command));
+
+        /* Error. */
+        return status;
+    }
+
+    /* No contexts available yet. */
+    command->contextCounter = command->currentContext = 0;
+
+    /* Create the command queue mutex. */
+    status = gcoOS_CreateMutex(os, &command->mutexQueue);
+
+    if (status < 0)
+    {
+        /* Roll back. */
+        gcmVERIFY_OK(gcoOS_Free(os, command));
+
+        /* Error. */
+        return status;
+    }
+
+	/* Create the context switching mutex. */
+	status = gcoOS_CreateMutex(os, &command->mutexContext);
+
+	if (status < 0)
+	{
+	    /* Roll back. */
+        gcmVERIFY_OK(gcoOS_DeleteMutex(os, command->mutexQueue));
+	    gcmVERIFY_OK(gcoOS_Free(os, command));
+
+	    /* Error. */
+	    return status;
+	}
+
+	/* Get the page size from teh OS. */
+	status = gcoOS_GetPageSize(os, &command->pageSize);
+
+	if (status != gcvSTATUS_OK)
+	{
+		/* Roll back. */
+		gcmVERIFY_OK(gcoOS_Free(os, command));
+
+		/* Error. */
+		return status;
+	}
+
+	/* Set hardware to pipe 0. */
+	command->pipeSelect = 0;
+
+    /* No command queues created yet. */
+	command->newQueue = gcvFALSE;
+    command->logical = gcvNULL;
+
+	/* Command is not yet running. */
+	command->running = gcvFALSE;
+
+	/* Command queue is idle. */
+	command->idle = gcvTRUE;
+
+	/* Commit stamp is zero. */
+	command->commitStamp = 0;
+
+    /* Return pointer to the gcoCOMMAND object. */
+	*Command = command;
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoCOMMAND_Destroy
+**
+**	Destroy an gcoCOMMAND object.
+**
+**	INPUT:
+**
+**		gcoCOMMAND Command
+**			Pointer to an gcoCOMMAND object to destroy.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gcoCOMMAND_Destroy(
+	IN gcoCOMMAND Command
+	)
+{
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Command, gcvOBJ_COMMAND);
+
+	/* Stop the command queue. */
+	gcmVERIFY_OK(gcoCOMMAND_Stop(Command));
+
+	if (Command->logical != gcvNULL)
+	{
+		/* Free the command page. */
+		gcmVERIFY_OK(gcoOS_FreeNonPagedMemory(Command->os, Command->pageSize,
+										  Command->physical, Command->logical));
+	}
+
+    /* Delete the context switching mutex. */
+    gcmVERIFY_OK(gcoOS_DeleteMutex(Command->os, Command->mutexContext));
+
+    /* Delete the command queue mutex. */
+    gcmVERIFY_OK(gcoOS_DeleteMutex(Command->os, Command->mutexQueue));
+
+	/* Mark object as unknown. */
+	Command->object.type = gcvOBJ_UNKNOWN;
+
+	/* Free the gcoCOMMAND object. */
+	gcmVERIFY_OK(gcoOS_Free(Command->os, Command));
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoCOMMAND_Start
+**
+**	Start up the command queue.
+**
+**	INPUT:
+**
+**		gcoCOMMAND Command
+**			Pointer to an gcoCOMMAND object to start.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gcoCOMMAND_Start(
+	IN gcoCOMMAND Command
+	)
+{
+    gcoHARDWARE hardware;
+	gceSTATUS status;
+    gctSIZE_T bytes;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Command, gcvOBJ_COMMAND);
+
+	if (Command->running)
+	{
+		/* Command queue already running. */
+		return gcvSTATUS_OK;
+	}
+
+	/* Extract the gcoHARDWARE object. */
+	hardware = Command->kernel->hardware;
+	gcmVERIFY_OBJECT(hardware, gcvOBJ_HARDWARE);
+
+	if (Command->logical == gcvNULL)
+	{
+		/* Allocate command page. */
+		status = gcoOS_AllocateNonPagedMemory(Command->os, gcvFALSE,
+		                                     &Command->pageSize,
+		                                     &Command->physical,
+		                                     &Command->logical);
+
+		if (status != gcvSTATUS_OK)
+		{
+			/* Error. */
+			return status;
+		}
+	}
+
+	/* Start at beginning of page. */
+	Command->offset = 0;
+
+	/* Append WAIT/LINK. */
+    bytes = Command->pageSize;
+	gcmERR_RETURN(
+		gcoHARDWARE_WaitLink(hardware,
+							 Command->logical,
+							 0,
+							 &bytes,
+							 &Command->wait,
+							 &Command->waitSize));
+
+    /* Adjust offset. */
+    Command->offset = bytes;
+
+	/* Enable command processor. */
+	gcmERR_RETURN(
+		gcoHARDWARE_Execute(hardware,
+							Command->logical,
+							bytes));
+
+	/* Command queue is running. */
+	Command->running = gcvTRUE;
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoCOMMAND_Stop
+**
+**	Stop the command queue.
+**
+**	INPUT:
+**
+**		gcoCOMMAND Command
+**			Pointer to an gcoCOMMAND object to stop.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gcoCOMMAND_Stop(
+	IN gcoCOMMAND Command
+	)
+{
+    gcoHARDWARE hardware;
+	gceSTATUS status;
+//	gctUINT32 idle;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Command, gcvOBJ_COMMAND);
+
+	if (!Command->running)
+	{
+		/* Command queue is not running. */
+		return gcvSTATUS_OK;
+	}
+
+    /* Extract the gcoHARDWARE object. */
+    hardware = Command->kernel->hardware;
+    gcmVERIFY_OBJECT(hardware, gcvOBJ_HARDWARE);
+
+    /* Replace last WAIT with END. */
+    gcmERR_RETURN(
+		gcoHARDWARE_End(hardware,
+						Command->wait,
+						&Command->waitSize));
+    
+    /* There is no need to wait here */
+#if 0
+	/* Wait for idle. */
+	gcmERR_RETURN(
+		gcoHARDWARE_GetIdle(hardware, gcvTRUE, &idle));
+#endif
+	/* Command queue is no longer running. */
+	Command->running = gcvFALSE;
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+typedef struct _gcsMAPPED * gcsMAPPED_PTR;
+struct _gcsMAPPED
+{
+	gcsMAPPED_PTR next;
+	gctPOINTER pointer;
+	gctPOINTER kernelPointer;
+	gctSIZE_T bytes;
+};
+
+static gceSTATUS
+_AddMap(
+	IN gcoOS Os,
+	IN gctPOINTER Source,
+	IN gctSIZE_T Bytes,
+	OUT gctPOINTER * Destination,
+	IN OUT gcsMAPPED_PTR * Stack
+	)
+{
+	gcsMAPPED_PTR map = gcvNULL;
+	gceSTATUS status;
+
+	/* Don't try to map NULL pointers. */
+	if (Source == gcvNULL)
+	{
+		*Destination = gcvNULL;
+		return gcvSTATUS_OK;
+	}
+
+	do
+	{
+		/* Allocate the gcsMAPPED structure. */
+		gcmERR_BREAK(gcoOS_Allocate(Os, sizeof(*map), (gctPOINTER *) &map));
+
+		/* Map the user pointer into kernel addressing space. */
+		gcmERR_BREAK(gcoOS_MapUserPointer(Os, Source, Bytes, Destination));
+
+		/* Save mapping. */
+		map->pointer       = Source;
+		map->kernelPointer = *Destination;
+		map->bytes         = Bytes;
+
+		/* Push structure on top of the stack. */
+		map->next = *Stack;
+		*Stack    = map;
+
+		/* Success. */
+		status = gcvSTATUS_OK;
+	}
+	while (gcvFALSE);
+
+	if (gcmIS_ERROR(status) && (map != gcvNULL))
+	{
+		/* Roll back on error. */
+		gcmVERIFY_OK(gcoOS_Free(Os, map));
+	}
+
+	/* Return the status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gcoCOMMAND_Commit
+**
+**	Commit a command buffer to the command queue.
+**
+**	INPUT:
+**
+**		gcoCOMMAND Command
+**			Pointer to an gcoCOMMAND object.
+**
+**		gcoCMDBUF CommandBuffer
+**			Pointer to an gcoCMDBUF object.
+**
+**		gcoCONTEXT Context
+**			Pointer to an gcoCONTEXT object.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcoCOMMAND_Commit(
+	IN gcoCOMMAND Command,
+	IN gcoCMDBUF CommandBuffer,
+	IN gcoCONTEXT Context
+	)
+{
+	gcoCMDBUF commandBuffer;
+	gcoCONTEXT context;
+	gcoHARDWARE hardware;
+	gcoEVENT event;
+	gceSTATUS status;
+	gctPOINTER initialLink, link;
+	gctSIZE_T bytes, initialSize, lastRun;
+	gcoCMDBUF buffer;
+	gctPOINTER wait;
+	gctSIZE_T waitSize;
+	gctUINT32 offset;
+	gctPOINTER fetchAddress;
+	gctSIZE_T fetchSize;
+	gctPOINTER logical;
+	gcsMAPPED_PTR stack = gcvNULL;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Command, gcvOBJ_COMMAND);
+
+#if gcdNULL_DRIVER == 2
+	/* return success if gcdNULL_DRIVER == 2 */
+	return gcvSTATUS_OK;
+#endif
+
+	gcmVERIFY_OK(_AddMap(Command->os,
+						 CommandBuffer,
+						 sizeof(struct _gcoCMDBUF),
+						 (gctPOINTER *) &commandBuffer,
+						 &stack));
+	gcmVERIFY_OBJECT(commandBuffer, gcvOBJ_COMMANDBUFFER);
+	gcmVERIFY_OK(_AddMap(Command->os,
+						 Context,
+						 sizeof(struct _gcoCONTEXT),
+						 (gctPOINTER *) &context,
+						 &stack));
+	gcmVERIFY_OBJECT(context, gcvOBJ_CONTEXT);
+
+	/* Extract the gcoHARDWARE and gcoEVENT objects. */
+	hardware = Command->kernel->hardware;
+	gcmVERIFY_OBJECT(hardware, gcvOBJ_HARDWARE);
+	event = Command->kernel->event;
+	gcmVERIFY_OBJECT(event, gcvOBJ_EVENT);
+
+	/* Acquire the context switching mutex. */
+	status = gcoOS_AcquireMutex(Command->os,
+								Command->mutexContext,
+								gcvINFINITE);
+
+	if (gcmIS_ERROR(status))
+	{
+		/* Error. */
+		return status;
+	}
+
+	do
+	{
+		/* Reserved slot in the context or command buffer. */
+		gcmERR_BREAK(gcoHARDWARE_PipeSelect(hardware, gcvNULL, 0, &bytes));
+
+		/* Test if we need to switch to this context. */
+		if ((context->id != 0)
+		&&  (context->id != Command->currentContext)
+		)
+		{
+			gcmVERIFY_OK(_AddMap(Command->os,
+								 context->logical,
+								 bytes,
+								 &logical,
+								 &stack));
+
+			if (context->pipe2DIndex != 0)
+			{
+				if (context->initialPipe == Command->pipeSelect)
+				{
+					gctUINT32 reserved = bytes;
+					gctUINT8_PTR nop   = (gctUINT8_PTR) logical;
+
+					/* Already in the correct pipe, fill context buffer with NOP. */
+					while (reserved > 0)
+					{
+						bytes = reserved;
+						gcmERR_BREAK(gcoHARDWARE_Nop(hardware,
+													 nop,
+													 &bytes));
+
+						reserved -= bytes;
+						nop      += bytes;
+					}
+				}
+				else
+				{
+					/* Switch to the correct pipe. */
+					gcmERR_BREAK(gcoHARDWARE_PipeSelect(hardware,
+														logical,
+														context->initialPipe,
+														&bytes));
+				}
+			}
+
+			/* Save initial link pointer. */
+			initialLink = logical;
+			initialSize = context->bufferSize;
+
+			/* Save pointer to next link. */
+			gcmVERIFY_OK(_AddMap(Command->os,
+								 context->link,
+								 8,
+								 &link,
+								 &stack));
+
+			/* Start parsing CommandBuffer. */
+			buffer = commandBuffer;
+
+			/* Mark context buffer as used. */
+			if (context->inUse != gcvNULL)
+			{
+				*context->inUse = gcvTRUE;
+			}
+		}
+
+		else
+		{
+			/* Test if this is a new context. */
+			if (context->id == 0)
+			{
+				/* Generate unique ID for the context buffer. */
+				context->id = ++ Command->contextCounter;
+
+				if (context->id == 0)
+				{
+					/* Context counter overflow (wow!) */
+					status = gcvSTATUS_TOO_COMPLEX;
+					break;
+				}
+			}
+
+			gcmVERIFY_OK(_AddMap(Command->os,
+								 commandBuffer->logical,
+								 bytes,
+								 &logical,
+								 &stack));
+
+			if (context->entryPipe == Command->pipeSelect)
+			{
+				gctUINT32 reserved = bytes;
+				gctUINT8_PTR nop   = (gctUINT8_PTR) logical;
+
+				/* Already in the correct pipe, fill context buffer with NOP. */
+				while (reserved > 0)
+				{
+					bytes = reserved;
+					gcmERR_BREAK(gcoHARDWARE_Nop(hardware,
+												 nop,
+												 &bytes));
+
+					reserved -= bytes;
+					nop      += bytes;
+				}
+			}
+			else
+			{
+				/* Switch to the correct pipe. */
+				gcmVERIFY_OK(gcoHARDWARE_PipeSelect(hardware,
+													logical,
+													context->entryPipe,
+													&bytes));
+			}
+
+			/* Save initial link pointer. */
+			initialLink = logical;
+			initialSize = commandBuffer->offset + Command->reservedTail;
+
+			/* Save pointer to next link. */
+			link = (gctUINT8 *) logical + commandBuffer->offset;
+
+			/* Start parsing next CommandBuffer. */
+			gcmVERIFY_OK(_AddMap(Command->os,
+								 commandBuffer->sibling,
+								 sizeof(struct _gcoCMDBUF),
+								 (gctPOINTER *) &buffer,
+								 &stack));
+		}
+
+		/* Loop through all remaining command buffers. */
+		while (buffer != gcvNULL)
+		{
+			/* Reserved slot in the command buffer. */
+			bytes = Command->reservedHead;
+
+			/* First slot becomes a NOP. */
+			gcmVERIFY_OK(_AddMap(Command->os,
+								 buffer->logical,
+								 bytes,
+								 &logical,
+								 &stack));
+
+			{
+				gctUINT32 reserved = bytes;
+				gctUINT8_PTR nop   = (gctUINT8_PTR) logical;
+
+				/* Already in the correct pipe, fill context buffer with NOP. */
+				while (reserved > 0)
+				{
+					bytes = reserved;
+					gcmERR_BREAK(gcoHARDWARE_Nop(hardware,
+												 nop,
+												 &bytes));
+
+					reserved -= bytes;
+					nop      += bytes;
+				}
+			}
+
+			/* Generate the LINK to this command buffer. */
+			gcmERR_BREAK(
+				gcoHARDWARE_Link(hardware,
+								 link,
+								 logical,
+								 buffer->offset + Command->reservedTail,
+								 &bytes));
+
+			/* Save pointer to next link. */
+			link = (gctUINT8 *) logical + buffer->offset;
+
+			/* Parse next buffer. */
+			gcmVERIFY_OK(_AddMap(Command->os,
+								 buffer->sibling,
+								 sizeof(struct _gcoCMDBUF),
+								 (gctPOINTER *) &buffer,
+								 &stack));
+		}
+
+		/* Compute number of bytes required for WAIT/LINK. */
+		gcmERR_BREAK(
+			gcoHARDWARE_WaitLink(hardware,
+								 gcvNULL,
+								 Command->offset,
+								 &bytes,
+								 gcvNULL,
+								 gcvNULL));
+
+		lastRun = bytes;
+
+		/* Grab the command queue mutex. */
+		gcmERR_BREAK(gcoOS_AcquireMutex(Command->os,
+										Command->mutexQueue,
+										gcvINFINITE));
+
+		if (Command->kernel->notifyIdle)
+		{
+			/* Increase the commit stamp */
+			Command->commitStamp++;
+
+			/* Set busy if idle */
+			if (Command->idle)
+			{
+				Command->idle = gcvFALSE;
+
+				gcmVERIFY_OK(gcoOS_NotifyIdle(Command->os, gcvFALSE));
+			}
+		}
+
+		do
+		{
+			/* Compute number of bytes left in current command queue. */
+			bytes = Command->pageSize - Command->offset;
+
+			if (bytes < lastRun)
+			{
+				/* Create a new command queue. */
+				gcmERR_BREAK(_NewQueue(Command));
+
+				/* Adjust run size with any extra commands inserted. */
+				lastRun += Command->offset;
+			}
+
+			/* Get current offset. */
+			offset = Command->offset;
+
+			/* Append WAIT/LINK in command queue. */
+			bytes  = Command->pageSize - offset;
+
+			gcmERR_BREAK(
+				gcoHARDWARE_WaitLink(hardware,
+									 (gctUINT8 *) Command->logical + offset,
+									 offset,
+									 &bytes,
+									 &wait,
+									 &waitSize));
+
+			/* Adjust offset. */
+			offset += bytes;
+
+			if (Command->newQueue)
+			{
+				/* Compute fetch location and size for a new command queue. */
+				fetchAddress = Command->logical;
+				fetchSize = offset;
+			}
+			else
+			{
+				/* Compute fetch location and size for an existing command
+				   queue. */
+				fetchAddress = (gctUINT8 *) Command->logical + Command->offset;
+				fetchSize = offset - Command->offset;
+			}
+
+			bytes = 8;
+
+			/* Link in WAIT/LINK. */
+			gcmVERIFY_OK(gcoHARDWARE_Link(hardware,
+										  link,
+										  fetchAddress,
+										  fetchSize,
+										  &bytes));
+
+			/* Execute the entire sequence. */
+			gcmERR_BREAK(gcoHARDWARE_Link(hardware,
+										  Command->wait,
+										  initialLink,
+										  initialSize,
+										  &Command->waitSize));
+
+			/* Update command queue offset. */
+			Command->offset   = offset;
+			Command->newQueue = gcvFALSE;
+
+			/* Update address of last WAIT. */
+			Command->wait     = wait;
+			Command->waitSize = waitSize;
+
+			/* Update context and pipe select. */
+			Command->currentContext = context->id;
+			Command->pipeSelect     = context->currentPipe;
+
+			/* Update queue tail pointer. */
+			gcmERR_BREAK(gcoHARWDARE_UpdateQueueTail(hardware,
+													 Command->logical,
+													 Command->offset));
+		}
+		while (gcvFALSE);
+
+		/* Release the command queue mutex. */
+		gcmVERIFY_OK(gcoOS_ReleaseMutex(Command->os, Command->mutexQueue));
+	}
+	while (gcvFALSE);
+
+	/* Release the context switching mutex. */
+	gcmVERIFY_OK(gcoOS_ReleaseMutex(Command->os, Command->mutexContext));
+
+	/* Unmap all mapped pointers. */
+	while (stack != gcvNULL)
+	{
+		gcsMAPPED_PTR map = stack;
+		stack = map->next;
+
+		gcmVERIFY_OK(gcoOS_UnmapUserPointer(Command->os,
+											map->pointer,
+											map->bytes,
+											map->kernelPointer));
+
+		gcmVERIFY_OK(gcoOS_Free(Command->os, map));
+	}
+
+	/* Return status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gcoCOMMAND_Reserve
+**
+**	Reserve space in the command queue.  Also acquire the command queue mutex.
+**
+**	INPUT:
+**
+**		gcoCOMMAND Command
+**			Pointer to an gcoCOMMAND object.
+**
+**		gctSIZE_T RequestedBytes
+**			Number of bytes previously reserved.
+**
+**	OUTPUT:
+**
+**		gctPOINTER * Buffer
+**          Pointer to a variable that will receive the address of the reserved
+**          space.
+**
+**      gctSIZE_T * BufferSize
+**          Pointer to a variable that will receive the number of bytes
+**          available in the command queue.
+*/
+gceSTATUS gcoCOMMAND_Reserve(
+    IN gcoCOMMAND Command,
+    IN gctSIZE_T RequestedBytes,
+    OUT gctPOINTER * Buffer,
+    OUT gctSIZE_T * BufferSize
+    )
+{
+    gceSTATUS status;
+    gctSIZE_T requiredBytes, bytes;
+
+    /* Verify the arguments. */
+    gcmVERIFY_OBJECT(Command, gcvOBJ_COMMAND);
+
+    /* Grab the conmmand queue mutex. */
+    status = gcoOS_AcquireMutex(
+		Command->os,
+		Command->mutexQueue,
+		gcvINFINITE
+		);
+
+    if (status < 0)
+    {
+        /* Error. */
+        return status;
+    }
+
+    do
+    {
+        /* Compute number of bytes required for WAIT/LINK. */
+        gcmERR_BREAK(
+			gcoHARDWARE_WaitLink(Command->kernel->hardware,
+								 gcvNULL,
+								 Command->offset + gcmALIGN(RequestedBytes,
+															Command->alignment),
+                                 &requiredBytes,
+								 gcvNULL,
+								 gcvNULL));
+
+        /* Compute total number of bytes required. */
+        requiredBytes += gcmALIGN(RequestedBytes, Command->alignment);
+
+        /* Compute number of bytes available in command queue. */
+        bytes = Command->pageSize - Command->offset;
+
+        if (bytes < requiredBytes)
+        {
+            /* Create a new command queue. */
+            status = _NewQueue(Command);
+
+            if (status < 0)
+            {
+                /* Error. */
+                break;
+            }
+
+            /* Recompute number of bytes available in command queue. */
+            bytes = Command->pageSize - Command->offset;
+
+            if (bytes < requiredBytes)
+            {
+                /* Rare case, not enough room in command queue. */
+                status = gcvSTATUS_BUFFER_TOO_SMALL;
+                break;
+            }
+        }
+
+        /* Return pointer to empty slot command queue. */
+        *Buffer = (gctUINT8 *) Command->logical + Command->offset;
+
+        /* Return number of bytes left in command queue. */
+        *BufferSize = bytes;
+
+        /* Success. */
+        status = gcvSTATUS_OK;
+    }
+    while (gcvFALSE);
+
+    if (status < 0)
+    {
+        /* Release command queue mutex on error. */
+        gcmVERIFY_OK(gcoOS_ReleaseMutex(Command->os, Command->mutexQueue));
+    }
+
+    /* Return status. */
+    return status;
+}
+
+/*******************************************************************************
+**
+**	gcoCOMMAND_Release
+**
+**	Release a previously reserved command queue.  The command FIFO mutex will be
+**  released.
+**
+**	INPUT:
+**
+**		gcoCOMMAND Command
+**			Pointer to an gcoCOMMAND object.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gcoCOMMAND_Release(
+    IN gcoCOMMAND Command
+    )
+{
+    /* Verify the arguments. */
+    gcmVERIFY_OBJECT(Command, gcvOBJ_COMMAND);
+
+    /* Release the command queue mutex. */
+    gcmVERIFY_OK(gcoOS_ReleaseMutex(Command->os, Command->mutexQueue));
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoCOMMAND_Execute
+**
+**	Execute a previously reserved command queue by appending a WAIT/LINK command
+**  sequence after it and modifying the last WAIT into a LINK command.  The
+**  command FIFO mutex will be released whether this function succeeds or not.
+**
+**	INPUT:
+**
+**		gcoCOMMAND Command
+**			Pointer to an gcoCOMMAND object.
+**
+**		gctSIZE_T RequestedBytes
+**			Number of bytes previously reserved.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gcoCOMMAND_Execute(
+    IN gcoCOMMAND Command,
+    IN gctSIZE_T RequestedBytes
+    )
+{
+    gctUINT32 offset;
+    gctPOINTER address;
+    gctSIZE_T bytes;
+    gceSTATUS status;
+    gctPOINTER wait;
+    gctSIZE_T waitBytes;
+
+    /* Verify the arguments. */
+    gcmVERIFY_OBJECT(Command, gcvOBJ_COMMAND);
+
+    do
+    {
+		if (Command->kernel->notifyIdle)
+		{
+			/* Increase the commit stamp */
+			Command->commitStamp++;
+
+			/* Set busy if idle */
+			if (Command->idle)
+			{
+				Command->idle = gcvFALSE;
+
+				gcmVERIFY_OK(gcoOS_NotifyIdle(Command->os, gcvFALSE));
+			}
+		}
+
+        /* Compute offset for WAIT/LINK. */
+        offset = Command->offset + RequestedBytes;
+
+        /* Compute number of byts left in command queue. */
+        bytes = Command->pageSize - offset;
+
+        /* Append WAIT/LINK in command queue. */
+        gcmERR_BREAK(
+			gcoHARDWARE_WaitLink(Command->kernel->hardware,
+								 (gctUINT8 *) Command->logical + offset,
+								 offset,
+								 &bytes,
+								 &wait,
+								 &waitBytes));
+
+        if (Command->newQueue)
+        {
+            /* For a new command queue, point to the start of the command
+            ** queue and include both the commands inserted at the head of it
+            ** and the WAIT/LINK. */
+            address = Command->logical;
+            bytes  += offset;
+        }
+        else
+        {
+            /* For an existing command queue, point to the current offset and
+            ** include the WAIT/LINK. */
+            address = (gctUINT8 *) Command->logical + Command->offset;
+            bytes  += RequestedBytes;
+        }
+
+        /* Convert th last WAIT into a LINK. */
+        gcmERR_BREAK(gcoHARDWARE_Link(
+			Command->kernel->hardware, Command->wait,
+			address, bytes, &Command->waitSize
+			));
+
+        /* Update the pointer to the last WAIT. */
+        Command->wait = wait;
+        Command->waitSize = waitBytes;
+
+        /* Update the command queue. */
+        Command->offset += bytes;
+        Command->newQueue = gcvFALSE;
+
+        /* Update queue tail pointer. */
+        gcmERR_BREAK(gcoHARWDARE_UpdateQueueTail(
+			Command->kernel->hardware,
+			Command->logical,
+			Command->offset
+			));
+    }
+    while (gcvFALSE);
+
+    /* Release the command queue mutex. */
+    gcmVERIFY_OK(gcoOS_ReleaseMutex(Command->os, Command->mutexQueue));
+
+    /* Return status. */
+    return status;
+}
+
+/*******************************************************************************
+**
+**	gcoCOMMAND_Stall
+**
+**	The calling thread will be suspended until the command queue has been
+**  completed.
+**
+**	INPUT:
+**
+**		gcoCOMMAND Command
+**			Pointer to an gcoCOMMAND object.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gcoCOMMAND_Stall(
+    IN gcoCOMMAND Command
+    )
+{
+    gcoOS os;
+    gcoHARDWARE hardware;
+    gcoEVENT event;
+    gceSTATUS status;
+    volatile gctBOOL * busy;
+    gctSIZE_T requested, bytes;
+    gctUINT8 * buffer;
+    gctSIZE_T bufferSize;
+    gctBOOL acquired = gcvFALSE;
+	gctUINT32 counter = 0;
+
+    /* Verify the arguments. */
+    gcmVERIFY_OBJECT(Command, gcvOBJ_COMMAND);
+
+#if gcdNULL_DRIVER == 2
+	/* return success if gcdNULL_DRIVER == 2 */
+	return gcvSTATUS_OK;
+#endif
+
+    /* Extract the gcoOS object pointer. */
+    os = Command->os;
+    gcmVERIFY_OBJECT(os, gcvOBJ_OS);
+
+    /* Extract the gcoHARDWARE object pointer. */
+    hardware = Command->kernel->hardware;
+    gcmVERIFY_OBJECT(hardware, gcvOBJ_HARDWARE);
+
+    /* Extract the gcoEVENT object pointer. */
+    event = Command->kernel->event;
+    gcmVERIFY_OBJECT(event, gcvOBJ_EVENT);
+
+    /* Allocate the busy variable. */
+    status = gcoOS_Allocate(os, sizeof(gctBOOL), (gctPOINTER *) &busy);
+
+    if (gcmIS_ERROR(status))
+    {
+        /* Error. */
+        return status;
+    }
+
+    /* Mark the hardware as busy. */
+    *busy = gcvTRUE;
+
+    do
+    {
+        /* Get the size of the EVENT command. */
+        gcmERR_BREAK(gcoHARDWARE_Event(hardware,
+        						   gcvNULL,
+        						   0,
+        						   gcvKERNEL_PIXEL,
+        						   &requested));
+
+        /* Reserve space in the command queue. */
+        gcmERR_BREAK(gcoCOMMAND_Reserve(Command,
+								    requested,
+									(gctPOINTER *) &buffer,
+									&bufferSize));
+
+        /* Command queue has been acquired. */
+        acquired = gcvTRUE;
+
+        /* Append the EVENT command to write data into the boolean. */
+        bytes = bufferSize;
+        gcmERR_BREAK(gcoEVENT_WriteData(event,
+        						    buffer,
+        						    &bytes,
+        						    (gctPOINTER) busy,
+        						    gcvFALSE,
+                                    gcvKERNEL_PIXEL,
+                                    gcvTRUE));
+
+        /* Append the reserved commands to the command queue. */
+        status = gcoCOMMAND_Execute(Command, requested);
+
+        /* Execute releases the command queue. */
+        acquired = gcvFALSE;
+
+        if (gcmIS_ERROR(status) || (status == gcvSTATUS_CHIP_NOT_READY))
+        {
+            /* Error. */
+            break;
+        }
+
+        /* Loop while the hardware is busy. */
+        while (*busy)
+        {
+            /* Wait a little bit as not to consume the entire CPU resource. */
+            gcmVERIFY_OK(gcoOS_Delay(os, 1));
+
+			if ((++counter % 500) == 0)
+			{
+#if defined _DEBUG
+				gctUINT32 idle;
+
+				/* Read idle register. */
+				gcmVERIFY_OK(
+					gcoHARDWARE_GetIdle(Command->kernel->hardware,
+										gcvFALSE,
+										&idle));
+
+				gcmTRACE_ZONE(
+					gcvLEVEL_WARNING, gcvZONE_COMMAND,
+					"gcoCOMMAND_Stall: Idle register = 0x%08X",
+					idle);
+
+                gcoOS_Log(_GFX_LOG_WARNING_, "%s : %d : idle register = 0x%08x \n", 
+                            __FUNCTION__, __LINE__, idle);                
+#endif
+				gcmVERIFY_OK(
+					gcoOS_MemoryBarrier(os, gcvNULL));
+			}
+        }
+
+        /* Success. */
+        status = gcvSTATUS_OK;
+    }
+    while (gcvFALSE);
+
+    if (acquired)
+    {
+        /* Release the command queue. */
+        gcmVERIFY_OK(gcoCOMMAND_Release(Command));
+    }
+
+    /* Free the busy variable. */
+    gcmVERIFY_OK(gcoOS_Free(os, (gctPOINTER) busy));
+
+    /* Return status. */
+    return status;
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/gc_hal_kernel_heap.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/gc_hal_kernel_heap.c
@@ -0,0 +1,1056 @@
+/****************************************************************************
+*
+*    Copyright (C) 2005 - 2010 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public License as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+/**
+**	@file
+**	gckHEAP object for kernel HAL layer.  The heap implemented here is an arena-
+**	based memory allocation.  An arena-based memory heap allocates data quickly
+**	from specified arenas and reduces memory fragmentation.
+**
+*/
+#include "gc_hal_kernel_precomp.h"
+
+#define _GC_OBJ_ZONE			gcvZONE_HEAP
+
+/*******************************************************************************
+***** Structures ***************************************************************
+*******************************************************************************/
+
+#define gcdIN_USE				((gcskNODE_PTR) ~0)
+
+typedef struct _gcskNODE *		gcskNODE_PTR;
+typedef struct _gcskNODE
+{
+	/* Number of byets in node. */
+	gctSIZE_T					bytes;
+
+	/* Pointer to next free node, or gcvNULL to mark the node as freed, or
+	** gcdIN_USE to mark the node as used. */
+	gcskNODE_PTR				next;
+
+#if gcdDEBUG
+	/* Time stamp of allocation. */
+	gctUINT64					timeStamp;
+#endif
+}
+gcskNODE;
+
+typedef struct _gcskHEAP	*	gcskHEAP_PTR;
+typedef struct _gcskHEAP
+{
+	/* Linked list. */
+	gcskHEAP_PTR				next;
+	gcskHEAP_PTR				prev;
+
+	/* Heap size. */
+	gctSIZE_T					size;
+
+	/* Free list. */
+	gcskNODE_PTR				freeList;
+}
+gcskHEAP;
+
+struct _gckHEAP
+{
+	/* Object. */
+	gcsOBJECT					object;
+
+	/* Pointer to a gckOS object. */
+	gckOS						os;
+
+	/* Locking mutex. */
+	gctPOINTER					mutex;
+
+	/* Allocation parameters. */
+	gctSIZE_T					allocationSize;
+
+	/* Heap list. */
+	gcskHEAP_PTR				heap;
+#if gcdDEBUG
+	gctUINT64					timeStamp;
+#endif
+
+#if VIVANTE_PROFILER || gcdDEBUG
+	/* Profile information. */
+	gctUINT32					allocCount;
+	gctUINT64					allocBytes;
+	gctUINT64					allocBytesMax;
+	gctUINT64					allocBytesTotal;
+	gctUINT32					heapCount;
+	gctUINT32					heapCountMax;
+	gctUINT64					heapMemory;
+	gctUINT64					heapMemoryMax;
+#endif
+};
+
+/*******************************************************************************
+***** Static Support Functions *************************************************
+*******************************************************************************/
+
+#if gcdDEBUG
+static gctSIZE_T
+_DumpHeap(
+	IN gcskHEAP_PTR Heap
+	)
+{
+	gctPOINTER p;
+	gctSIZE_T leaked = 0;
+
+	/* Start at first node. */
+	for (p = Heap + 1;;)
+	{
+		/* Convert the pointer. */
+		gcskNODE_PTR node = (gcskNODE_PTR) p;
+
+		/* Check if this is a used node. */
+		if (node->next == gcdIN_USE)
+		{
+			/* Print the leaking node. */
+			gcmkTRACE_ZONE(gcvLEVEL_WARNING, gcvZONE_HEAP,
+						   "Detected leaking: node=0x%x bytes=%lu timeStamp=%llu "
+						   "(%08X %c%c%c%c)",
+						   node, node->bytes, node->timeStamp,
+						   ((gctUINT32_PTR) (node + 1))[0],
+						   gcmPRINTABLE(((gctUINT8_PTR) (node + 1))[0]),
+						   gcmPRINTABLE(((gctUINT8_PTR) (node + 1))[1]),
+						   gcmPRINTABLE(((gctUINT8_PTR) (node + 1))[2]),
+						   gcmPRINTABLE(((gctUINT8_PTR) (node + 1))[3]));
+
+			/* Add leaking byte count. */
+			leaked += node->bytes;
+		}
+
+		/* Test for end of heap. */
+		if (node->bytes == 0)
+		{
+			break;
+		}
+
+		else
+		{
+			/* Move to next node. */
+			p = (gctUINT8_PTR) node + node->bytes;
+		}
+	}
+
+	/* Return the number of leaked bytes. */
+	return leaked;
+}
+#endif
+
+static gceSTATUS
+_CompactKernelHeap(
+	IN gckHEAP Heap
+	)
+{
+	gcskHEAP_PTR heap, next;
+	gctPOINTER p;
+	gcskHEAP_PTR freeList = gcvNULL;
+
+	gcmkHEADER_ARG("Heap=0x%x", Heap);
+
+	/* Walk all the heaps. */
+	for (heap = Heap->heap; heap != gcvNULL; heap = next)
+	{
+		gcskNODE_PTR lastFree = gcvNULL;
+
+		/* Zero out the free list. */
+		heap->freeList = gcvNULL;
+
+		/* Start at the first node. */
+		for (p = (gctUINT8_PTR) (heap + 1);;)
+		{
+			/* Convert the pointer. */
+			gcskNODE_PTR node = (gcskNODE_PTR) p;
+
+			gcmkASSERT(p <= (gctPOINTER) ((gctUINT8_PTR) (heap + 1) + heap->size));
+
+			/* Test if this node not used. */
+			if (node->next != gcdIN_USE)
+			{
+				/* Test if this is the end of the heap. */
+				if (node->bytes == 0)
+				{
+					break;
+				}
+
+				/* Test of this is the first free node. */
+				else if (lastFree == gcvNULL)
+				{
+					/* Initialzie the free list. */
+					heap->freeList = node;
+					lastFree       = node;
+				}
+
+				else
+				{
+					/* Test if this free node is contiguous with the previous
+					** free node. */
+					if ((gctUINT8_PTR) lastFree + lastFree->bytes == p)
+					{
+						/* Just increase the size of the previous free node. */
+						lastFree->bytes += node->bytes;
+					}
+					else
+					{
+						/* Add to linked list. */
+						lastFree->next = node;
+						lastFree       = node;
+					}
+				}
+			}
+
+			/* Move to next node. */
+			p = (gctUINT8_PTR) node + node->bytes;
+		}
+
+		/* Mark the end of the chain. */
+		if (lastFree != gcvNULL)
+		{
+			lastFree->next = gcvNULL;
+		}
+
+		/* Get next heap. */
+		next = heap->next;
+
+		/* Check if the entire heap is free. */
+		if ((heap->freeList != gcvNULL)
+		&&  (heap->freeList->bytes == heap->size - gcmSIZEOF(gcskNODE))
+		)
+		{
+			/* Remove the heap from the linked list. */
+			if (heap->prev == gcvNULL)
+			{
+				Heap->heap = next;
+			}
+			else
+			{
+				heap->prev->next = next;
+			}
+
+			if (heap->next != gcvNULL)
+			{
+				heap->next->prev = heap->prev;
+			}
+
+#if VIVANTE_PROFILER || gcdDEBUG
+			/* Update profiling. */
+			Heap->heapCount  -= 1;
+			Heap->heapMemory -= heap->size + gcmSIZEOF(gcskHEAP);
+#endif
+
+			/* Add this heap to the list of heaps that need to be freed. */
+			heap->next = freeList;
+			freeList   = heap;
+		}
+	}
+
+	if (freeList != gcvNULL)
+	{
+		/* Release the mutex, remove any chance for a dead lock. */
+		gcmkVERIFY_OK(
+			gckOS_ReleaseMutex(Heap->os, Heap->mutex));
+
+		/* Free all heaps in the free list. */
+		for (heap = freeList; heap != gcvNULL; heap = next)
+		{
+			/* Get pointer to the next heap. */
+			next = heap->next;
+
+			/* Free the heap. */
+			gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HEAP,
+						   "Freeing heap 0x%x (%lu bytes)",
+						   heap, heap->size + gcmSIZEOF(gcskHEAP));
+			gcmkVERIFY_OK(gckOS_FreeMemory(Heap->os, heap));
+		}
+
+		/* Acquire the mutex again. */
+		gcmkVERIFY_OK(
+			gckOS_AcquireMutex(Heap->os, Heap->mutex, gcvINFINITE));
+	}
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+***** gckHEAP API Code *********************************************************
+*******************************************************************************/
+
+/*******************************************************************************
+**
+**	gckHEAP_Construct
+**
+**	Construct a new gckHEAP object.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to a gckOS object.
+**
+**		gctSIZE_T AllocationSize
+**			Minimum size per arena.
+**
+**	OUTPUT:
+**
+**		gckHEAP * Heap
+**			Pointer to a variable that will hold the pointer to the gckHEAP
+**			object.
+*/
+gceSTATUS
+gckHEAP_Construct(
+	IN gckOS Os,
+	IN gctSIZE_T AllocationSize,
+	OUT gckHEAP * Heap
+	)
+{
+	gceSTATUS status;
+	gckHEAP heap = gcvNULL;
+
+	gcmkHEADER_ARG("Os=0x%x AllocationSize=%lu", Os, AllocationSize);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmkVERIFY_ARGUMENT(Heap != gcvNULL);
+
+	/* Allocate the gckHEAP object. */
+	gcmkONERROR(
+		gckOS_AllocateMemory(Os,
+							 gcmSIZEOF(struct _gckHEAP),
+							 (gctPOINTER *) &heap));
+
+	/* Initialize the gckHEAP object. */
+	heap->object.type    = gcvOBJ_HEAP;
+	heap->os             = Os;
+	heap->allocationSize = AllocationSize;
+	heap->heap           = gcvNULL;
+#if gcdDEBUG
+	heap->timeStamp      = 0;
+#endif
+
+#if VIVANTE_PROFILER || gcdDEBUG
+	/* Zero the counters. */
+	heap->allocCount      = 0;
+	heap->allocBytes      = 0;
+	heap->allocBytesMax   = 0;
+	heap->allocBytesTotal = 0;
+	heap->heapCount       = 0;
+	heap->heapCountMax    = 0;
+	heap->heapMemory      = 0;
+	heap->heapMemoryMax   = 0;
+#endif
+
+	/* Create the mutex. */
+	gcmkONERROR(gckOS_CreateMutex(Os, &heap->mutex));
+
+	/* Return the pointer to the gckHEAP object. */
+	*Heap = heap;
+
+	/* Success. */
+	gcmkFOOTER_ARG("*Heap=0x%x", Heap);
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Roll back. */
+	if (heap != gcvNULL)
+	{
+		/* Free the heap structure. */
+		gcmkVERIFY_OK(gckOS_FreeMemory(Os, heap));
+	}
+
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckHEAP_Destroy
+**
+**	Destroy a gckHEAP object.
+**
+**	INPUT:
+**
+**		gckHEAP Heap
+**			Pointer to a gckHEAP object to destroy.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckHEAP_Destroy(
+	IN gckHEAP Heap
+	)
+{
+	gcskHEAP_PTR heap;
+#if gcdDEBUG
+	gctSIZE_T leaked = 0;
+#endif
+
+	gcmkHEADER_ARG("Heap=0x%x", Heap);
+
+	for (heap = Heap->heap; heap != gcvNULL; heap = Heap->heap)
+	{
+		/* Unlink heap from linked list. */
+		Heap->heap = heap->next;
+
+#if gcdDEBUG
+		/* Check for leaked memory. */
+		leaked += _DumpHeap(heap);
+#endif
+
+		/* Free the heap. */
+		gcmkVERIFY_OK(gckOS_FreeMemory(Heap->os, heap));
+	}
+
+	/* Free the mutex. */
+	gcmkVERIFY_OK(gckOS_DeleteMutex(Heap->os, Heap->mutex));
+
+	/* Free the heap structure. */
+	gcmkVERIFY_OK(gckOS_FreeMemory(Heap->os, Heap));
+
+	/* Success. */
+#if gcdDEBUG
+	gcmkFOOTER_ARG("leaked=%lu", leaked);
+#else
+	gcmkFOOTER_NO();
+#endif
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckHEAP_Allocate
+**
+**	Allocate data from the heap.
+**
+**	INPUT:
+**
+**		gckHEAP Heap
+**			Pointer to a gckHEAP object.
+**
+**		IN gctSIZE_T Bytes
+**			Number of byte to allocate.
+**
+**	OUTPUT:
+**
+**		gctPOINTER * Memory
+**			Pointer to a variable that will hold the address of the allocated
+**			memory.
+*/
+gceSTATUS
+gckHEAP_Allocate(
+	IN gckHEAP Heap,
+	IN gctSIZE_T Bytes,
+	OUT gctPOINTER * Memory
+	)
+{
+	gctBOOL acquired = gcvFALSE;
+	gcskHEAP_PTR heap;
+	gceSTATUS status;
+	gctSIZE_T bytes;
+	gcskNODE_PTR node, used, prevFree = gcvNULL;
+	gctPOINTER memory = gcvNULL;
+
+	gcmkHEADER_ARG("Heap=0x%x Bytes=%lu", Heap, Bytes);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Heap, gcvOBJ_HEAP);
+	gcmkVERIFY_ARGUMENT(Bytes > 0);
+	gcmkVERIFY_ARGUMENT(Memory != gcvNULL);
+
+	/* Determine number of bytes required for a node. */
+	bytes = gcmALIGN(Bytes + gcmSIZEOF(gcskNODE), 8);
+
+	/* Acquire the mutex. */
+	gcmkONERROR(
+		gckOS_AcquireMutex(Heap->os, Heap->mutex, gcvINFINITE));
+
+	acquired = gcvTRUE;
+
+	/* Check if this allocation is bigger than the default allocation size. */
+	if (bytes > Heap->allocationSize - gcmSIZEOF(gcskHEAP))
+	{
+		/* Adjust allocation size. */
+		Heap->allocationSize = bytes * 2;
+	}
+
+	else if (Heap->heap != gcvNULL)
+	{
+		gctINT i;
+
+		/* 2 retries, since we might need to compact. */
+		for (i = 0; i < 2; ++i)
+		{
+			/* Walk all the heaps. */
+			for (heap = Heap->heap; heap != gcvNULL; heap = heap->next)
+			{
+				/* Check if this heap has enough bytes to hold the request. */
+				if (bytes < heap->size)
+				{
+					prevFree = gcvNULL;
+
+					/* Walk the chain of free nodes. */
+					for (node = heap->freeList;
+						 node != gcvNULL;
+						 node = node->next
+					)
+					{
+						gcmkASSERT(node->next != gcdIN_USE);
+
+						/* Check if this free node has enough bytes. */
+						if (node->bytes >= bytes)
+						{
+							/* Use the node. */
+							goto UseNode;
+						}
+
+						/* Save current free node for linked list management. */
+						prevFree = node;
+					}
+				}
+			}
+
+			if (i == 0)
+			{
+				/* Compact the heap. */
+				gcmkVERIFY_OK(_CompactKernelHeap(Heap));
+
+#if gcdDEBUG
+				gcmkTRACE_ZONE(gcvLEVEL_VERBOSE, gcvZONE_HEAP,
+							   "===== KERNEL HEAP =====");
+				gcmkTRACE_ZONE(gcvLEVEL_VERBOSE, gcvZONE_HEAP,
+							   "Number of allocations           : %12u",
+							   Heap->allocCount);
+				gcmkTRACE_ZONE(gcvLEVEL_VERBOSE, gcvZONE_HEAP,
+							   "Number of bytes allocated       : %12llu",
+							   Heap->allocBytes);
+				gcmkTRACE_ZONE(gcvLEVEL_VERBOSE, gcvZONE_HEAP,
+							   "Maximum allocation size         : %12llu",
+							   Heap->allocBytesMax);
+				gcmkTRACE_ZONE(gcvLEVEL_VERBOSE, gcvZONE_HEAP,
+							   "Total number of bytes allocated : %12llu",
+							   Heap->allocBytesTotal);
+				gcmkTRACE_ZONE(gcvLEVEL_VERBOSE, gcvZONE_HEAP,
+							   "Number of heaps                 : %12u",
+							   Heap->heapCount);
+				gcmkTRACE_ZONE(gcvLEVEL_VERBOSE, gcvZONE_HEAP,
+							   "Heap memory in bytes            : %12llu",
+							   Heap->heapMemory);
+				gcmkTRACE_ZONE(gcvLEVEL_VERBOSE, gcvZONE_HEAP,
+							   "Maximum number of heaps         : %12u",
+							   Heap->heapCountMax);
+				gcmkTRACE_ZONE(gcvLEVEL_VERBOSE, gcvZONE_HEAP,
+							   "Maximum heap memory in bytes    : %12llu",
+							   Heap->heapMemoryMax);
+#endif
+			}
+		}
+	}
+
+	/* Release the mutex. */
+	gcmkONERROR(
+		gckOS_ReleaseMutex(Heap->os, Heap->mutex));
+
+	acquired = gcvFALSE;
+
+	/* Allocate a new heap. */
+	gcmkONERROR(
+		gckOS_AllocateMemory(Heap->os,
+							 Heap->allocationSize,
+							 &memory));
+
+	gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HEAP,
+				   "Allocated heap 0x%x (%lu bytes)",
+				   memory, Heap->allocationSize);
+
+	/* Acquire the mutex. */
+	gcmkONERROR(
+		gckOS_AcquireMutex(Heap->os, Heap->mutex, gcvINFINITE));
+
+	acquired = gcvTRUE;
+
+	/* Use the allocated memory as the heap. */
+	heap = (gcskHEAP_PTR) memory;
+
+	/* Insert this heap to the head of the chain. */
+	heap->next = Heap->heap;
+	heap->prev = gcvNULL;
+	heap->size = Heap->allocationSize - gcmSIZEOF(gcskHEAP);
+
+	if (heap->next != gcvNULL)
+	{
+		heap->next->prev = heap;
+	}
+	Heap->heap = heap;
+
+	/* Mark the end of the heap. */
+	node = (gcskNODE_PTR) ( (gctUINT8_PTR) heap
+						  + Heap->allocationSize
+						  - gcmSIZEOF(gcskNODE)
+						  );
+	node->bytes = 0;
+	node->next  = gcvNULL;
+
+	/* Create a free list. */
+	node           = (gcskNODE_PTR) (heap + 1);
+	heap->freeList = node;
+
+	/* Initialize the free list. */
+	node->bytes = heap->size - gcmSIZEOF(gcskNODE);
+	node->next  = gcvNULL;
+
+	/* No previous free. */
+	prevFree = gcvNULL;
+
+#if VIVANTE_PROFILER || gcdDEBUG
+	/* Update profiling. */
+	Heap->heapCount  += 1;
+	Heap->heapMemory += Heap->allocationSize;
+
+	if (Heap->heapCount > Heap->heapCountMax)
+	{
+		Heap->heapCountMax = Heap->heapCount;
+	}
+	if (Heap->heapMemory > Heap->heapMemoryMax)
+	{
+		Heap->heapMemoryMax = Heap->heapMemory;
+	}
+#endif
+
+UseNode:
+	/* Verify some stuff. */
+	gcmkASSERT(heap != gcvNULL);
+	gcmkASSERT(node != gcvNULL);
+	gcmkASSERT(node->bytes >= bytes);
+
+	if (heap->prev != gcvNULL)
+	{
+		/* Unlink the heap from the linked list. */
+		heap->prev->next = heap->next;
+		if (heap->next != gcvNULL)
+		{
+			heap->next->prev = heap->prev;
+		}
+
+		/* Move the heap to the front of the list. */
+		heap->next 		 = Heap->heap;
+		heap->prev 		 = gcvNULL;
+		Heap->heap 		 = heap;
+		heap->next->prev = heap;
+	}
+
+	/* Check if there is enough free space left after usage for another free
+	** node. */
+	if (node->bytes - bytes >= gcmSIZEOF(gcskNODE))
+	{
+		/* Allocated used space from the back of the free list. */
+		used = (gcskNODE_PTR) ((gctUINT8_PTR) node + node->bytes - bytes);
+
+		/* Adjust the number of free bytes. */
+		node->bytes -= bytes;
+		gcmkASSERT(node->bytes >= gcmSIZEOF(gcskNODE));
+	}
+	else
+	{
+		/* Remove this free list from the chain. */
+		if (prevFree == gcvNULL)
+		{
+			heap->freeList = node->next;
+		}
+		else
+		{
+			prevFree->next = node->next;
+		}
+
+		/* Consume the entire free node. */
+		used  = (gcskNODE_PTR) node;
+		bytes = node->bytes;
+	}
+
+	/* Mark node as used. */
+	used->bytes     = bytes;
+	used->next      = gcdIN_USE;
+#if gcdDEBUG
+	used->timeStamp = ++Heap->timeStamp;
+#endif
+
+#if VIVANTE_PROFILER || gcdDEBUG
+	/* Update profile counters. */
+	Heap->allocCount      += 1;
+	Heap->allocBytes      += bytes;
+	Heap->allocBytesMax    = gcmMAX(Heap->allocBytes, Heap->allocBytesMax);
+	Heap->allocBytesTotal += bytes;
+#endif
+
+	/* Release the mutex. */
+	gcmkVERIFY_OK(
+		gckOS_ReleaseMutex(Heap->os, Heap->mutex));
+
+	/* Return pointer to memory. */
+	*Memory = used + 1;
+
+	/* Success. */
+	gcmkFOOTER_ARG("*Memory=0x%x", *Memory);
+	return gcvSTATUS_OK;
+
+OnError:
+	if (acquired)
+	{
+		/* Release the mutex. */
+		gcmkVERIFY_OK(
+			gckOS_ReleaseMutex(Heap->os, Heap->mutex));
+	}
+
+	if (memory != gcvNULL)
+	{
+		/* Free the heap memory. */
+		gckOS_FreeMemory(Heap->os, memory);
+	}
+
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckHEAP_Free
+**
+**	Free allocated memory from the heap.
+**
+**	INPUT:
+**
+**		gckHEAP Heap
+**			Pointer to a gckHEAP object.
+**
+**		IN gctPOINTER Memory
+**			Pointer to memory to free.
+**
+**	OUTPUT:
+**
+**		NOTHING.
+*/
+gceSTATUS
+gckHEAP_Free(
+	IN gckHEAP Heap,
+	IN gctPOINTER Memory
+	)
+{
+	gcskNODE_PTR node;
+	gceSTATUS status;
+
+	gcmkHEADER_ARG("Heap=0x%x Memory=0x%x", Heap, Memory);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Heap, gcvOBJ_HEAP);
+	gcmkVERIFY_ARGUMENT(Memory != gcvNULL);
+
+	/* Acquire the mutex. */
+	gcmkONERROR(
+		gckOS_AcquireMutex(Heap->os, Heap->mutex, gcvINFINITE));
+
+	/* Pointer to structure. */
+	node = (gcskNODE_PTR) Memory - 1;
+
+	/* Mark the node as freed. */
+	node->next = gcvNULL;
+
+#if VIVANTE_PROFILER || gcdDEBUG
+	/* Update profile counters. */
+	Heap->allocBytes -= node->bytes;
+#endif
+
+	/* Release the mutex. */
+	gcmkVERIFY_OK(
+		gckOS_ReleaseMutex(Heap->os, Heap->mutex));
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+#if VIVANTE_PROFILER
+gceSTATUS
+gckHEAP_ProfileStart(
+	IN gckHEAP Heap
+	)
+{
+	gcmkHEADER_ARG("Heap=0x%x", Heap);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Heap, gcvOBJ_HEAP);
+
+	/* Zero the counters. */
+	Heap->allocCount      = 0;
+	Heap->allocBytes      = 0;
+	Heap->allocBytesMax   = 0;
+	Heap->allocBytesTotal = 0;
+	Heap->heapCount       = 0;
+	Heap->heapCountMax    = 0;
+	Heap->heapMemory      = 0;
+	Heap->heapMemoryMax   = 0;
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+}
+
+gceSTATUS
+gckHEAP_ProfileEnd(
+	IN gckHEAP Heap,
+	IN gctCONST_STRING Title
+	)
+{
+	gcmkHEADER_ARG("Heap=0x%x Title=0x%x", Heap, Title);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Heap, gcvOBJ_HEAP);
+	gcmkVERIFY_ARGUMENT(Title != gcvNULL);
+
+	gcmkPRINT("");
+	gcmkPRINT("=====[ HEAP - %s ]=====", Title);
+	gcmkPRINT("Number of allocations           : %12u",   Heap->allocCount);
+	gcmkPRINT("Number of bytes allocated       : %12llu", Heap->allocBytes);
+	gcmkPRINT("Maximum allocation size         : %12llu", Heap->allocBytesMax);
+	gcmkPRINT("Total number of bytes allocated : %12llu", Heap->allocBytesTotal);
+	gcmkPRINT("Number of heaps                 : %12u",   Heap->heapCount);
+	gcmkPRINT("Heap memory in bytes            : %12llu", Heap->heapMemory);
+	gcmkPRINT("Maximum number of heaps         : %12u",   Heap->heapCountMax);
+	gcmkPRINT("Maximum heap memory in bytes    : %12llu", Heap->heapMemoryMax);
+	gcmkPRINT("==============================================");
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+}
+#endif /* VIVANTE_PROFILER */
+
+/*******************************************************************************
+***** Test Code ****************************************************************
+*******************************************************************************/
+
+#if defined gcdHAL_TEST
+
+#include <stdlib.h>
+#define gcmRANDOM(n) (rand() % n)
+
+typedef struct
+{
+	gctSIZE_T	bytes;
+	gctPOINTER	memory;
+}
+gcskHEAP_TEST;
+
+gceSTATUS
+gckHEAP_Test(
+	IN gckHEAP Heap,
+	IN gctSIZE_T Vectors,
+	IN gctSIZE_T MaxSize
+	)
+{
+	gctSIZE_T nodeCount = MaxSize / 4;
+	gcskHEAP_TEST * nodes = gcvNULL;
+	gctSIZE_T bytes, index, i;
+	gceSTATUS status, failure = gcvSTATUS_OK;
+	gctUINT8_PTR memory;
+	gcskHEAP_PTR heap, current;
+
+	/* Allocate the node array. */
+	gcmkONERROR(
+		gckOS_AllocateMemory(Heap->os,
+							 nodeCount * gcmSIZEOF(gcskHEAP_TEST),
+							 (gctPOINTER *) &nodes));
+
+	/* Mark all nodes as free. */
+	gcmkONERROR(
+		gckOS_ZeroMemory(nodes, nodeCount * gcmSIZEOF(gcskHEAP_TEST)));
+
+	gcmkONERROR(gckHEAP_ProfileStart(Heap));
+
+	/* Loop through all vectors. */
+	while (Vectors-- > 0)
+	{
+		/* Get a random index. */
+		index = gcmRANDOM(nodeCount);
+
+		/* Test if we need to allocate pages. */
+		if (nodes[index].bytes == 0)
+		{
+			/* Generate a random byte size. */
+			do
+			{
+				bytes = gcmALIGN(gcmRANDOM(MaxSize), gcmSIZEOF(gctSIZE_T));
+			}
+			while (bytes == 0);
+
+			/* Allocate pages. */
+			status = gckHEAP_Allocate(Heap, bytes, (gctPOINTER *) &memory);
+
+			if (gcmIS_SUCCESS(status))
+			{
+				/* Mark node as allocated. */
+				nodes[index].bytes  = bytes;
+				nodes[index].memory = memory;
+
+				/* Put signature in the memory. */
+				for (i = 0; i < bytes; i += gcmSIZEOF(gctSIZE_T))
+				{
+					*(gctSIZE_T_PTR) (memory + i) = index;
+				}
+			}
+			else
+			{
+				gcmkTRACE(gcvLEVEL_WARNING,
+						  "%s(%d): Failed to allocate %lu bytes",
+						  __FUNCTION__, __LINE__, bytes);
+			}
+		}
+		else
+		{
+			/* Verify the memory. */
+			memory = nodes[index].memory;
+			for (i = 0; i < nodes[index].bytes; i += gcmSIZEOF(gctSIZE_T))
+			{
+				if (*(gctSIZE_T_PTR) (memory + i) != index)
+				{
+					gcmkFATAL("%s(%d): Corruption detected at index %lu",
+							  __FUNCTION__, __LINE__, index);
+
+					failure = gcvSTATUS_HEAP_CORRUPTED;
+				}
+			}
+
+			/* Free the memory. */
+			status = gckHEAP_Free(Heap, memory);
+
+			if (gcmIS_ERROR(status))
+			{
+				gcmkFATAL("%s(%d): Cannot free %lu bytes at 0x%x (index=%lu)",
+						  __FUNCTION__, __LINE__,
+						  nodes[index].bytes, memory, index);
+
+				failure = status;
+			}
+
+			/* Mark the node as free. */
+			nodes[index].bytes = 0;
+		}
+
+		/* Verify the heap chain. */
+		i = 0;
+		for (current = Heap->heap; current != gcvNULL; current = current->next)
+		{
+			gctSIZE_T j;
+			for (heap = Heap->heap, j = 0; j < i; heap = heap->next, ++j)
+			{
+				if (heap == current)
+				{
+					gcmkFATAL("%s(%d): Linked list corrupted for heap 0x%x",
+							  __FUNCTION__, __LINE__, current);
+
+					failure = gcvSTATUS_HEAP_CORRUPTED;
+				}
+			}
+
+			if (heap != current)
+			{
+				gcmkFATAL("%s(%d): Linked list corrupted for heap 0x%x",
+						  __FUNCTION__, __LINE__, current);
+
+				failure = gcvSTATUS_HEAP_CORRUPTED;
+			}
+
+			++i;
+		}
+	}
+
+	/* Walk the entire array of nodes. */
+	for (index = 0; index < nodeCount; ++index)
+	{
+		/* Test if we need to free pages. */
+		if (nodes[index].bytes != 0)
+		{
+			/* Verify the memory. */
+			memory = nodes[index].memory;
+			for (i = 0; i < nodes[index].bytes; i += gcmSIZEOF(gctSIZE_T))
+			{
+				if (*(gctSIZE_T_PTR) (memory + i) != index)
+				{
+					gcmkFATAL("%s(%d): Corruption detected at page %lu",
+							  __FUNCTION__, __LINE__, index);
+
+					failure = gcvSTATUS_HEAP_CORRUPTED;
+				}
+			}
+
+			/* Free the memory. */
+			status = gckHEAP_Free(Heap, memory);
+
+			if (gcmIS_ERROR(status))
+			{
+				gcmkFATAL("%s(%d): Cannot free %u bytes at 0x%x (index=%lu)",
+						  __FUNCTION__, __LINE__,
+						  nodes[index].bytes, memory, index);
+
+				failure = status;
+			}
+		}
+	}
+
+	/* Perform garbage collection. */
+	gcmkONERROR(_CompactKernelHeap(Heap));
+
+	/* Show profiling. */
+	gcmkONERROR(gckHEAP_ProfileEnd(Heap, "Profile"));
+
+	/* Verify we did not loose any nodes. */
+	if (Heap->heap != gcvNULL)
+	{
+		gcmkFATAL("%s(%d): Detected leaking in the heap.",
+				  __FUNCTION__, __LINE__);
+
+		failure = gcvSTATUS_HEAP_CORRUPTED;
+	}
+
+OnError:
+	/* Roll back. */
+	if (nodes != gcvNULL)
+	{
+		gcmkVERIFY_OK(
+			gckOS_FreeMemory(Heap->os, nodes));
+	}
+
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+#endif
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/gc_hal_kernel.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/gc_hal_kernel.c
@@ -0,0 +1,1162 @@
+/****************************************************************************
+*
+*    Copyright (C) 2005 - 2010 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public License as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+#include "gc_hal_kernel_precomp.h"
+
+#define _GC_OBJ_ZONE	gcvZONE_KERNEL
+
+
+/******************************************************************************\
+******************************* gckKERNEL API Code ******************************
+\******************************************************************************/
+
+/*******************************************************************************
+**
+**	gckKERNEL_Construct
+**
+**	Construct a new gckKERNEL object.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		IN gctPOINTER Context
+**			Pointer to a driver defined context.
+**
+**	OUTPUT:
+**
+**		gckKERNEL * Kernel
+**			Pointer to a variable that will hold the pointer to the gckKERNEL
+**			object.
+*/
+
+#ifdef ANDROID
+#define DEFAULT_PROFILE_FILE_NAME	"/sdcard/vprofiler.xml"
+#else
+#define DEFAULT_PROFILE_FILE_NAME	"vprofiler.xml"
+#endif
+
+gceSTATUS
+gckKERNEL_Construct(
+	IN gckOS Os,
+	IN gctPOINTER Context,
+	OUT gckKERNEL * Kernel
+	)
+{
+	gckKERNEL kernel = gcvNULL;
+	gceSTATUS status;
+
+	gcmkHEADER_ARG("Os=0x%x Context=0x%x", Os, Context);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmkVERIFY_ARGUMENT(Kernel != gcvNULL);
+
+	/* Allocate the gckKERNEL object. */
+	gcmkONERROR(
+		gckOS_Allocate(Os,
+					   gcmSIZEOF(struct _gckKERNEL),
+					   (gctPOINTER *) &kernel));
+#if MRVL_LOW_POWER_MODE_DEBUG
+    gcmERR_RETURN(
+		gckOS_Allocate(Os, 0x1000000, (gctPOINTER *) &kernel->kernelMSG));
+
+    kernel->msgLen = 0;
+#endif
+
+	/* Zero the object pointers. */
+	kernel->hardware = gcvNULL;
+	kernel->command  = gcvNULL;
+	kernel->event    = gcvNULL;
+	kernel->mmu      = gcvNULL;
+
+	/* Initialize the gckKERNEL object. */
+	kernel->object.type = gcvOBJ_KERNEL;
+	kernel->os          = Os;
+
+	/* Save context. */
+	kernel->context = Context;
+
+	/* No clients attached. */
+	kernel->clients = 0;
+#if gcdSECURE_USER
+    kernel->cacheSlots     = 0;
+    kernel->cacheTimeStamp = 0;
+#endif
+
+	/* Construct the gckHARDWARE object. */
+	gcmkONERROR(
+		gckHARDWARE_Construct(Os, &kernel->hardware));
+
+	/* Set pointer to gckKERNEL object in gckHARDWARE object. */
+	kernel->hardware->kernel = kernel;
+
+	/* Initialize the hardware. */
+	gcmkONERROR(
+		gckHARDWARE_InitializeHardware(kernel->hardware));
+
+	/* Construct the gckCOMMAND object. */
+	gcmkONERROR(
+		gckCOMMAND_Construct(kernel, &kernel->command));
+
+	/* Construct the gckEVENT object. */
+	gcmkONERROR(
+		gckEVENT_Construct(kernel, &kernel->event));
+
+	/* Construct the gckMMU object. */
+	gcmkONERROR(
+		gckMMU_Construct(kernel, gcdMMU_SIZE, &kernel->mmu));
+	kernel->notifyIdle = gcvTRUE; /* gcvFALSE; */
+
+#if VIVANTE_PROFILER
+	/* Initialize profile setting */
+#if defined ANDROID
+	kernel->profileEnable = gcvFALSE;
+#else
+	kernel->profileEnable = gcvTRUE;
+#endif
+
+	gcmkVERIFY_OK(
+		gckOS_MemCopy(kernel->profileFileName,
+					  DEFAULT_PROFILE_FILE_NAME,
+					  gcmSIZEOF(DEFAULT_PROFILE_FILE_NAME) + 1));
+#endif
+
+	/* Return pointer to the gckKERNEL object. */
+	*Kernel = kernel;
+
+	/* Success. */
+	gcmkFOOTER_ARG("*Kernel=0x%x", *Kernel);
+	return gcvSTATUS_OK;
+
+OnError:
+	if (kernel->event != gcvNULL)
+	{
+		gcmkVERIFY_OK(gckEVENT_Destroy(kernel->event));
+	}
+
+	if (kernel->command != gcvNULL)
+	{
+		gcmkVERIFY_OK(gckCOMMAND_Destroy(kernel->command));
+	}
+
+	if (kernel->hardware != gcvNULL)
+	{
+		gcmkVERIFY_OK(gckHARDWARE_Destroy(kernel->hardware));
+	}
+
+    kernel->version = _GAL_VERSION_STRING_;
+
+#if MRVL_LOW_POWER_MODE_DEBUG
+	gcmkVERIFY_OK(
+		gckOS_Free(Os, kernel->kernelMSG));
+#endif
+	gcmkVERIFY_OK(gckOS_Free(Os, kernel));
+
+	/* Return the error. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckKERNEL_Destroy
+**
+**	Destroy an gckKERNEL object.
+**
+**	INPUT:
+**
+**		gckKERNEL Kernel
+**			Pointer to an gckKERNEL object to destroy.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckKERNEL_Destroy(
+	IN gckKERNEL Kernel
+	)
+{
+	gcmkHEADER_ARG("Kernel=0x%x", Kernel);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Kernel, gcvOBJ_KERNEL);
+
+
+
+	/* Destroy the gckMMU object. */
+	gcmkVERIFY_OK(gckMMU_Destroy(Kernel->mmu));
+
+	/* Destroy the gckEVENT object. */
+	gcmkVERIFY_OK(gckEVENT_Destroy(Kernel->event));
+
+	/* Destroy the gckCOMMNAND object. */
+	gcmkVERIFY_OK(gckCOMMAND_Destroy(Kernel->command));
+
+	/* Destroy the gckHARDWARE object. */
+	gcmkVERIFY_OK(gckHARDWARE_Destroy(Kernel->hardware));
+
+	/* Mark the gckKERNEL object as unknown. */
+	Kernel->object.type = gcvOBJ_UNKNOWN;
+
+#if MRVL_LOW_POWER_MODE_DEBUG
+    gcmkVERIFY_OK(
+		gckOS_Free(Kernel->os, Kernel->kernelMSG));
+#endif
+	/* Free the gckKERNEL object. */
+	gcmkVERIFY_OK(gckOS_Free(Kernel->os, Kernel));
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	_AllocateMemory
+**
+**	Private function to walk all required memory pools to allocate the requested
+**	amount of video memory.
+**
+**	INPUT:
+**
+**		gckKERNEL Kernel
+**			Pointer to an gckKERNEL object.
+**
+**		gcsHAL_INTERFACE * Interface
+**			Pointer to a gcsHAL_INTERFACE structure that defines the command to
+**			be dispatched.
+**
+**	OUTPUT:
+**
+**		gcsHAL_INTERFACE * Interface
+**			Pointer to a gcsHAL_INTERFACE structure that receives any data to be
+**			returned.
+*/
+static gceSTATUS
+_AllocateMemory(
+	IN gckKERNEL Kernel,
+	IN OUT gcePOOL * Pool,
+	IN gctSIZE_T Bytes,
+	IN gctSIZE_T Alignment,
+	IN gceSURF_TYPE Type,
+#ifdef __QNXNTO__
+	IN gctHANDLE Handle,
+#endif
+	OUT gcuVIDMEM_NODE_PTR * Node
+	)
+{
+	gcePOOL pool;
+	gceSTATUS status;
+	gckVIDMEM videoMemory;
+
+	gcmkVERIFY_ARGUMENT(Pool != gcvNULL);
+
+	/* Get initial pool. */
+	switch (pool = *Pool)
+	{
+	case gcvPOOL_DEFAULT:
+	case gcvPOOL_LOCAL:
+		pool = gcvPOOL_LOCAL_INTERNAL;
+		break;
+
+	case gcvPOOL_UNIFIED:
+		pool = gcvPOOL_SYSTEM;
+		break;
+
+	default:
+		break;
+	}
+
+	do
+	{
+		/* Verify the number of bytes to allocate. */
+		if (Bytes == 0)
+		{
+			gcmkERR_BREAK(gcvSTATUS_INVALID_ARGUMENT);
+		}
+
+		if (pool == gcvPOOL_VIRTUAL)
+		{
+			/* Create a gcuVIDMEM_NODE for virtual memory. */
+#ifdef __QNXNTO__
+			gcmkERR_BREAK(
+				gckVIDMEM_ConstructVirtual(Kernel, gcvFALSE, Bytes, Handle, Node));
+#else
+			gcmkERR_BREAK(
+				gckVIDMEM_ConstructVirtual(Kernel, gcvFALSE, Bytes, Node));
+#endif
+
+			/* Success. */
+			break;
+		}
+		else if (pool == gcvPOOL_CONTIGUOUS)
+		{
+			/* Create a gcuVIDMEM_NODE for contiguous memory. */
+#ifdef __QNXNTO__
+			status = gckVIDMEM_ConstructVirtual(Kernel, gcvTRUE, Bytes, Handle, Node);
+#else
+			status = gckVIDMEM_ConstructVirtual(Kernel, gcvTRUE, Bytes, Node);
+#endif
+			if (gcmIS_SUCCESS(status))
+			{
+				/* Memory allocated. */
+				break;
+			}
+		}
+		else
+		{
+			/* Get pointer to gckVIDMEM object for pool. */
+			status = gckKERNEL_GetVideoMemoryPool(Kernel, pool, &videoMemory);
+
+			if (gcmIS_SUCCESS(status))
+			{
+				/* Allocate memory. */
+				status = gckVIDMEM_AllocateLinear(videoMemory,
+												  Bytes,
+												  Alignment,
+												  Type,
+#ifdef __QNXNTO__
+												  Handle,
+#endif
+												  Node);
+
+				if (gcmIS_SUCCESS(status))
+				{
+					/* Memory allocated. */
+					(*Node)->VidMem.pool = pool;
+					break;
+				}
+			}
+		}
+
+		if (pool == gcvPOOL_LOCAL_INTERNAL)
+		{
+			/* Advance to external memory. */
+			pool = gcvPOOL_LOCAL_EXTERNAL;
+		}
+		else
+		if (pool == gcvPOOL_LOCAL_EXTERNAL)
+		{
+			/* Advance to contiguous system memory. */
+			pool = gcvPOOL_SYSTEM;
+		}
+		else
+		if (pool == gcvPOOL_SYSTEM)
+		{
+			/* Advance to contiguous memory. */
+			pool = gcvPOOL_CONTIGUOUS;
+		}
+		else
+		if ((pool == gcvPOOL_CONTIGUOUS)
+		&&  (Type != gcvSURF_TILE_STATUS)
+		)
+		{
+            static int count= 1;
+			/* Advance to virtual memory. */
+            if (count == 1)
+            {
+				gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_KERNEL,
+					"Try to allocate virtual memory!\n");
+                count = 0;
+            }
+			pool = gcvPOOL_VIRTUAL;
+		}
+		else
+		{
+			/* Out of pools. */
+			break;
+		}
+	}
+	/* Loop only for multiple selection pools. */
+	while ((*Pool == gcvPOOL_DEFAULT)
+	||     (*Pool == gcvPOOL_LOCAL)
+	||     (*Pool == gcvPOOL_UNIFIED)
+	);
+
+	if (gcmIS_SUCCESS(status))
+	{
+		/* Return pool used for allocation. */
+		*Pool = pool;
+	}
+
+	/* Return status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckKERNEL_Dispatch
+**
+**	Dispatch a command received from the user HAL layer.
+**
+**	INPUT:
+**
+**		gckKERNEL Kernel
+**			Pointer to an gckKERNEL object.
+**
+**		gctBOOL FromUser
+**			whether the call is from the user space.
+**
+**		gcsHAL_INTERFACE * Interface
+**			Pointer to a gcsHAL_INTERFACE structure that defines the command to
+**			be dispatched.
+**
+**	OUTPUT:
+**
+**		gcsHAL_INTERFACE * Interface
+**			Pointer to a gcsHAL_INTERFACE structure that receives any data to be
+**			returned.
+*/
+gceSTATUS
+gckKERNEL_Dispatch(
+	IN gckKERNEL Kernel,
+	IN gctBOOL FromUser,
+	IN OUT gcsHAL_INTERFACE * Interface
+	)
+{
+	gceSTATUS status;
+	gctUINT32 bitsPerPixel;
+	gctSIZE_T bytes;
+	gcuVIDMEM_NODE_PTR node;
+	gctBOOL locked = gcvFALSE;
+	gctPHYS_ADDR physical;
+	gctUINT32 address;
+
+	gcmkHEADER_ARG("Kernel=0x%x FromUser=%d Interface=0x%x",
+				   Kernel, FromUser, Interface);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Kernel, gcvOBJ_KERNEL);
+	gcmkVERIFY_ARGUMENT(Interface != gcvNULL);
+
+	gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_KERNEL,
+				   "Dispatching command %d", Interface->command);
+
+	/* Dispatch on command. */
+	switch (Interface->command)
+	{
+	case gcvHAL_GET_BASE_ADDRESS:
+		/* Get base address. */
+		gcmkONERROR(
+			gckOS_GetBaseAddress(Kernel->os,
+								 &Interface->u.GetBaseAddress.baseAddress));
+		break;
+
+    case gcvHAL_QUERY_VIDEO_MEMORY:
+        /* Query video memory size. */
+        gcmkONERROR(gckKERNEL_QueryVideoMemory(Kernel, Interface));
+		break;
+
+	case gcvHAL_QUERY_CHIP_IDENTITY:
+		/* Query chip identity. */
+		gcmkONERROR(
+			gckHARDWARE_QueryChipIdentity(
+				Kernel->hardware,
+				&Interface->u.QueryChipIdentity.chipModel,
+				&Interface->u.QueryChipIdentity.chipRevision,
+				&Interface->u.QueryChipIdentity.chipFeatures,
+				&Interface->u.QueryChipIdentity.chipMinorFeatures,
+				&Interface->u.QueryChipIdentity.chipMinorFeatures1));
+
+		/* Query chip specifications. */
+		gcmkONERROR(
+			gckHARDWARE_QueryChipSpecs(
+				Kernel->hardware,
+				&Interface->u.QueryChipIdentity.streamCount,
+				&Interface->u.QueryChipIdentity.registerMax,
+				&Interface->u.QueryChipIdentity.threadCount,
+				&Interface->u.QueryChipIdentity.shaderCoreCount,
+				&Interface->u.QueryChipIdentity.vertexCacheSize,
+				&Interface->u.QueryChipIdentity.vertexOutputBufferSize));
+		break;
+
+	case gcvHAL_MAP_MEMORY:
+		physical = Interface->u.MapMemory.physical;
+
+		/* Map memory. */
+		gcmkONERROR(
+			gckKERNEL_MapMemory(Kernel,
+								physical,
+								Interface->u.MapMemory.bytes,
+								&Interface->u.MapMemory.logical));
+		break;
+
+	case gcvHAL_UNMAP_MEMORY:
+		physical = Interface->u.UnmapMemory.physical;
+
+		/* Unmap memory. */
+		gcmkONERROR(
+			gckKERNEL_UnmapMemory(Kernel,
+								  physical,
+								  Interface->u.UnmapMemory.bytes,
+								  Interface->u.UnmapMemory.logical));
+		break;
+
+	case gcvHAL_ALLOCATE_NON_PAGED_MEMORY:
+		/* Allocate non-paged memory. */
+#ifdef __QNXNTO__
+		if (FromUser)
+		{
+			gcmkONERROR(
+				gckOS_AllocateNonPagedMemoryShmPool(
+				Kernel->os,
+				FromUser,
+				Interface->pid,
+				Interface->handle,
+				&Interface->u.AllocateNonPagedMemory.bytes,
+				&Interface->u.AllocateNonPagedMemory.physical,
+				&Interface->u.AllocateNonPagedMemory.logical));
+			break;
+		}
+#endif
+		gcmkONERROR(
+			gckOS_AllocateNonPagedMemory(
+				Kernel->os,
+				FromUser,
+				&Interface->u.AllocateNonPagedMemory.bytes,
+				&Interface->u.AllocateNonPagedMemory.physical,
+				&Interface->u.AllocateNonPagedMemory.logical));
+		break;
+
+	case gcvHAL_FREE_NON_PAGED_MEMORY:
+		physical = Interface->u.FreeNonPagedMemory.physical;
+
+		/* Free non-paged memory. */
+		gcmkONERROR(
+			gckOS_FreeNonPagedMemory(Kernel->os,
+									 Interface->u.FreeNonPagedMemory.bytes,
+									 physical,
+									 Interface->u.FreeNonPagedMemory.logical));
+		break;
+
+	case gcvHAL_ALLOCATE_CONTIGUOUS_MEMORY:
+		/* Allocate contiguous memory. */
+#ifdef __QNXNTO__
+		if (FromUser)
+		{
+			gcmkONERROR(
+				gckOS_AllocateNonPagedMemoryShmPool(
+				Kernel->os,
+				FromUser,
+				Interface->pid,
+				Interface->handle,
+				&Interface->u.AllocateNonPagedMemory.bytes,
+				&Interface->u.AllocateNonPagedMemory.physical,
+				&Interface->u.AllocateNonPagedMemory.logical));
+			break;
+		}
+#endif
+		gcmkONERROR(
+			gckOS_AllocateContiguous(
+				Kernel->os,
+				FromUser,
+				&Interface->u.AllocateContiguousMemory.bytes,
+				&Interface->u.AllocateContiguousMemory.physical,
+				&Interface->u.AllocateContiguousMemory.logical));
+
+		break;
+
+	case gcvHAL_FREE_CONTIGUOUS_MEMORY:
+		physical = Interface->u.FreeContiguousMemory.physical;
+
+       /* Free contiguous memory. */
+        gcmkONERROR(
+            gckOS_FreeContiguous(Kernel->os,
+                                 physical,
+                                 Interface->u.FreeContiguousMemory.logical,
+                                 Interface->u.FreeContiguousMemory.bytes));
+        break;
+
+	case gcvHAL_ALLOCATE_VIDEO_MEMORY:
+		/* Align width and height to tiles. */
+		gcmkONERROR(
+			gckHARDWARE_AlignToTile(Kernel->hardware,
+									Interface->u.AllocateVideoMemory.type,
+									&Interface->u.AllocateVideoMemory.width,
+									&Interface->u.AllocateVideoMemory.height,
+									gcvNULL));
+
+		/* Convert format into bytes per pixel and bytes per tile. */
+		gcmkONERROR(
+			gckHARDWARE_ConvertFormat(Kernel->hardware,
+									  Interface->u.AllocateVideoMemory.format,
+									  &bitsPerPixel,
+									  gcvNULL));
+
+		/* Compute number of bytes for the allocation. */
+		bytes = Interface->u.AllocateVideoMemory.width * bitsPerPixel
+			  * Interface->u.AllocateVideoMemory.height
+			  * Interface->u.AllocateVideoMemory.depth / 8;
+
+		/* Allocate memory. */
+#ifdef __QNXNTO__
+		gcmkONERROR(
+			_AllocateMemory(Kernel,
+							&Interface->u.AllocateVideoMemory.pool,
+							bytes,
+							64,
+							Interface->u.AllocateVideoMemory.type,
+							Interface->handle,
+							&Interface->u.AllocateVideoMemory.node));
+#else
+		gcmkONERROR(
+			_AllocateMemory(Kernel,
+							&Interface->u.AllocateVideoMemory.pool,
+							bytes,
+							64,
+							Interface->u.AllocateVideoMemory.type,
+							&Interface->u.AllocateVideoMemory.node));
+#endif
+		break;
+
+	case gcvHAL_ALLOCATE_LINEAR_VIDEO_MEMORY:
+		/* Allocate memory. */
+#ifdef __QNXNTO__
+		gcmkONERROR(
+			_AllocateMemory(Kernel,
+							&Interface->u.AllocateLinearVideoMemory.pool,
+							Interface->u.AllocateLinearVideoMemory.bytes,
+							Interface->u.AllocateLinearVideoMemory.alignment,
+							Interface->u.AllocateLinearVideoMemory.type,
+							Interface->handle,
+							&Interface->u.AllocateLinearVideoMemory.node));
+
+		/* Set the current user pid in the node,
+		 * which is used while locking memory. */
+		gcmkVERIFY_OK(gckVIDMEM_SetPID(
+				Interface->u.AllocateLinearVideoMemory.node,
+				Interface->pid));
+#else
+		gcmkONERROR(
+			_AllocateMemory(Kernel,
+							&Interface->u.AllocateLinearVideoMemory.pool,
+							Interface->u.AllocateLinearVideoMemory.bytes,
+							Interface->u.AllocateLinearVideoMemory.alignment,
+							Interface->u.AllocateLinearVideoMemory.type,
+							&Interface->u.AllocateLinearVideoMemory.node));
+#endif
+		break;
+
+    case gcvHAL_FREE_VIDEO_MEMORY:
+#ifdef __QNXNTO__
+        node = Interface->u.FreeVideoMemory.node;
+        if (node->VidMem.memory->object.type == gcvOBJ_VIDMEM
+         && node->VidMem.logical != gcvNULL)
+        {
+            gcmkONERROR(
+                    gckKERNEL_UnmapVideoMemory(Kernel,
+                                               node->VidMem.logical,
+                                               Interface->pid,
+                                               node->VidMem.bytes));
+            node->VidMem.logical = gcvNULL;
+        }
+#endif
+        /* Free video memory. */
+        gcmkONERROR(
+            gckVIDMEM_Free(Interface->u.FreeVideoMemory.node));
+        break;
+
+	case gcvHAL_LOCK_VIDEO_MEMORY:
+		/* Lock video memory. */
+		gcmkONERROR(
+			gckVIDMEM_Lock(Interface->u.LockVideoMemory.node,
+						   &Interface->u.LockVideoMemory.address));
+
+		locked = gcvTRUE;
+
+		node = Interface->u.LockVideoMemory.node;
+		if (node->VidMem.memory->object.type == gcvOBJ_VIDMEM)
+		{
+			/* Map video memory address into user space. */
+#ifdef __QNXNTO__
+        if (node->VidMem.logical == gcvNULL)
+        {
+			gcmkONERROR(
+				gckKERNEL_MapVideoMemory(Kernel,
+										 FromUser,
+										 Interface->u.LockVideoMemory.address,
+										 Interface->pid,
+										 node->VidMem.bytes,
+										 &node->VidMem.logical));
+        }
+		Interface->u.LockVideoMemory.memory = node->VidMem.logical;
+#else
+			gcmkONERROR(
+				gckKERNEL_MapVideoMemory(Kernel,
+										 FromUser,
+										 Interface->u.LockVideoMemory.address,
+										 &Interface->u.LockVideoMemory.memory));
+#endif
+
+#ifdef __QNXNTO__
+			/* Add more information to node, which is used while unmapping. */
+			gcmkVERIFY_OK(gckVIDMEM_SetPID(
+					Interface->u.LockVideoMemory.node,
+					Interface->pid));
+#endif
+		}
+
+		else
+		{
+			/* Copy logical memory for virtual memory. */
+			Interface->u.LockVideoMemory.memory = node->Virtual.logical;
+
+            /* Success. */
+            status = gcvSTATUS_OK;
+        }
+
+#if gcdSECURE_USER
+        /* Return logical address as physical address. */
+        Interface->u.LockVideoMemory.address =
+            gcmPTR2INT(Interface->u.LockVideoMemory.memory);
+#endif
+        break;
+
+	case gcvHAL_UNLOCK_VIDEO_MEMORY:
+		/* Unlock video memory. */
+		node = Interface->u.UnlockVideoMemory.node;
+
+        /* Unlock video memory. */
+        gcmkONERROR(
+            gckVIDMEM_Unlock(node,
+                             Interface->u.UnlockVideoMemory.type,
+                             &Interface->u.UnlockVideoMemory.asynchroneous));
+        break;
+
+	case gcvHAL_EVENT_COMMIT:
+		/* Commit an event queue. */
+		gcmkONERROR(
+			gckEVENT_Commit(Kernel->event,
+						    Interface->u.Event.queue));
+        break;
+
+    case gcvHAL_COMMIT:
+        /* Commit a command and context buffer. */
+        gcmkONERROR(
+            gckCOMMAND_Commit(Kernel->command,
+                              Interface->u.Commit.commandBuffer,
+                              Interface->u.Commit.contextBuffer,
+                              Interface->u.Commit.process));
+        break;
+
+    case gcvHAL_STALL:
+        /* Stall the command queue. */
+        gcmkONERROR(gckCOMMAND_Stall(Kernel->command));
+        break;
+
+	case gcvHAL_MAP_USER_MEMORY:
+		/* Map user memory to DMA. */
+		gcmkONERROR(
+			gckOS_MapUserMemory(Kernel->os,
+								Interface->u.MapUserMemory.memory,
+								Interface->u.MapUserMemory.size,
+								&Interface->u.MapUserMemory.info,
+								&Interface->u.MapUserMemory.address));
+		break;
+
+	case gcvHAL_UNMAP_USER_MEMORY:
+		address = Interface->u.MapUserMemory.address;
+
+		/* Unmap user memory. */
+		gcmkONERROR(
+			gckOS_UnmapUserMemory(Kernel->os,
+								  Interface->u.UnmapUserMemory.memory,
+								  Interface->u.UnmapUserMemory.size,
+								  Interface->u.UnmapUserMemory.info,
+								  address));
+		break;
+
+#if !USE_NEW_LINUX_SIGNAL
+	case gcvHAL_USER_SIGNAL:
+		/* Dispatch depends on the user signal subcommands. */
+		switch(Interface->u.UserSignal.command)
+		{
+		case gcvUSER_SIGNAL_CREATE:
+			/* Create a signal used in the user space. */
+			gcmkONERROR(
+				gckOS_CreateUserSignal(Kernel->os,
+									   Interface->u.UserSignal.manualReset,
+									   &Interface->u.UserSignal.id));
+			break;
+
+		case gcvUSER_SIGNAL_DESTROY:
+			/* Destroy the signal. */
+			gcmkONERROR(
+				gckOS_DestroyUserSignal(Kernel->os,
+										Interface->u.UserSignal.id));
+			break;
+
+		case gcvUSER_SIGNAL_SIGNAL:
+			/* Signal the signal. */
+			gcmkONERROR(
+				gckOS_SignalUserSignal(Kernel->os,
+									   Interface->u.UserSignal.id,
+									   Interface->u.UserSignal.state));
+			break;
+
+		case gcvUSER_SIGNAL_WAIT:
+			/* Wait on the signal. */
+			status = gckOS_WaitUserSignal(Kernel->os,
+										  Interface->u.UserSignal.id,
+										  Interface->u.UserSignal.wait);
+			break;
+
+		default:
+			/* Invalid user signal command. */
+			gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
+		}
+        break;
+#endif
+
+    case gcvHAL_SET_POWER_MANAGEMENT_STATE:
+		/* Set the power management state. */
+		gcmkONERROR(
+			gckHARDWARE_SetPowerManagementState(
+				Kernel->hardware,
+				Interface->u.SetPowerManagement.state));
+		break;
+
+    case gcvHAL_QUERY_POWER_MANAGEMENT_STATE:
+		/* Query the power management state. */
+		gcmkONERROR(
+			gckHARDWARE_QueryPowerManagementState(
+				Kernel->hardware,
+				&Interface->u.QueryPowerManagement.state));
+        break;
+
+    case gcvHAL_READ_REGISTER:
+#if gcdREGISTER_ACCESS_FROM_USER
+        /* Read a register. */
+        gcmkONERROR(
+            gckOS_ReadRegister(Kernel->os,
+                               Interface->u.ReadRegisterData.address,
+                               &Interface->u.ReadRegisterData.data));
+#else
+		/* No access from user land to read registers. */
+		Interface->u.ReadRegisterData.data = 0;
+		status = gcvSTATUS_NOT_SUPPORTED;
+#endif
+        break;
+
+    case gcvHAL_WRITE_REGISTER:
+#if gcdREGISTER_ACCESS_FROM_USER
+        /* Write a register. */
+        gcmkONERROR(
+            gckOS_WriteRegister(Kernel->os,
+                                Interface->u.WriteRegisterData.address,
+                                Interface->u.WriteRegisterData.data));
+#else
+		/* No access from user land to write registers. */
+		status = gcvSTATUS_NOT_SUPPORTED;
+#endif
+        break;
+
+    case gcvHAL_READ_ALL_PROFILE_REGISTERS:
+#if VIVANTE_PROFILER
+		/* Read all 3D profile registers. */
+		gcmkONERROR(
+			gckHARDWARE_QueryProfileRegisters(
+				Kernel->hardware,
+				&Interface->u.RegisterProfileData.counters));
+#else
+        status = gcvSTATUS_OK;
+#endif
+        break;
+
+    case gcvHAL_PROFILE_REGISTERS_2D:
+#if VIVANTE_PROFILER
+		/* Read all 2D profile registers. */
+		gcmkONERROR(
+			gckHARDWARE_ProfileEngine2D(
+				Kernel->hardware,
+				Interface->u.RegisterProfileData2D.hwProfile2D));
+#else
+        status = gcvSTATUS_OK;
+#endif
+        break;
+
+	case gcvHAL_GET_PROFILE_SETTING:
+#if VIVANTE_PROFILER
+		/* Get profile setting */
+		Interface->u.GetProfileSetting.enable = Kernel->profileEnable;
+
+		gcmkVERIFY_OK(
+			gckOS_MemCopy(Interface->u.GetProfileSetting.fileName,
+						  Kernel->profileFileName,
+						  gcdMAX_PROFILE_FILE_NAME));
+#endif
+
+		status = gcvSTATUS_OK;
+        break;
+
+	case gcvHAL_SET_PROFILE_SETTING:
+#if VIVANTE_PROFILER
+		/* Set profile setting */
+		Kernel->profileEnable = Interface->u.SetProfileSetting.enable;
+
+		gcmkVERIFY_OK(
+			gckOS_MemCopy(Kernel->profileFileName,
+						  Interface->u.SetProfileSetting.fileName,
+						  gcdMAX_PROFILE_FILE_NAME));
+#endif
+
+        status = gcvSTATUS_OK;
+		break;
+
+	case gcvHAL_QUERY_KERNEL_SETTINGS:
+		/* Get kernel settings. */
+		gcmkONERROR(
+			gckKERNEL_QuerySettings(Kernel,
+									&Interface->u.QueryKernelSettings.settings));
+		break;
+
+	case gcvHAL_RESET:
+		/* Reset the hardware. */
+		gcmkONERROR(
+			gckHARDWARE_Reset(Kernel->hardware));
+		break;
+
+    case gcvHAL_DEBUG:
+        /* Set debug level and zones. */
+        if (Interface->u.Debug.set)
+        {
+            gckOS_SetDebugLevel(Interface->u.Debug.level);
+            gckOS_SetDebugZones(Interface->u.Debug.zones,
+                                Interface->u.Debug.enable);
+        }
+
+        if (Interface->u.Debug.message[0] != '\0')
+        {
+            /* Print a message to the debugger. */
+            gcmkPRINT(Interface->u.Debug.message);
+        }
+        status = gcvSTATUS_OK;
+        break;
+
+    case gcvHAL_CACHE:
+        if (Interface->u.Cache.invalidate)
+        {
+            /* Flush and invalidate the cache. */
+            status = gckOS_CacheInvalidate(Kernel->os,
+                                           Interface->u.Cache.process,
+                                           Interface->u.Cache.logical,
+                                           Interface->u.Cache.bytes);
+        }
+        else
+        {
+            /* Flush the cache. */
+            status = gckOS_CacheFlush(Kernel->os,
+                                      Interface->u.Cache.process,
+                                      Interface->u.Cache.logical,
+                                      Interface->u.Cache.bytes);
+        }
+		break;
+
+	default:
+		/* Invalid command. */
+		gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
+	}
+
+OnError:
+	/* Save status. */
+	Interface->status = status;
+
+    if (gcmIS_ERROR(status))
+    {
+        if (locked)
+        {
+            /* Roll back the lock. */
+            gcmkVERIFY_OK(
+                gckVIDMEM_Unlock(Interface->u.LockVideoMemory.node,
+                                 gcvSURF_TYPE_UNKNOWN,
+                                 gcvNULL));
+        }
+    }
+
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+gceSTATUS
+gckKERNEL_AttachProcess(
+	IN gckKERNEL Kernel,
+	IN gctBOOL Attach
+	)
+{
+	gceSTATUS status;
+
+	gcmkHEADER_ARG("Kernel=0x%x Attach=%d", Kernel, Attach);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Kernel, gcvOBJ_KERNEL);
+
+	if (Attach)
+	{
+		if (Kernel->clients == 0)
+		{
+			/* First client attached, switch to ON power state. */
+			gcmkONERROR(
+				gckHARDWARE_SetPowerManagementState(Kernel->hardware,
+													gcvPOWER_ON));
+		}
+
+		/* Increment the number of clients attached. */
+		Kernel->clients += 1;
+	}
+
+	else
+	{
+		/* Decrement the number of clients attached. */
+		Kernel->clients -= 1;
+
+		if (Kernel->clients == 0)
+		{
+			/* Last client detached, switch to SUSPEND power state. */
+			gcmkONERROR(
+				gckHARDWARE_SetPowerManagementState(Kernel->hardware,
+													gcvPOWER_SUSPEND));
+
+            /* Flush the debug cache. */
+            gcmkPRINT("$$FLUSH$$");
+		}
+	}
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+#if gcdSECURE_USER
+gceSTATUS
+gckKERNEL_MapLogicalToPhysical(
+    IN gckKERNEL Kernel,
+    IN gctHANDLE Process,
+    IN OUT gctPOINTER * Data
+    )
+{
+    gctUINT i, oldest;
+    gceSTATUS status;
+    gctUINT32 baseAddress;
+
+    gcmkHEADER_ARG("Kernel=0x%x Process=0x%x *Data=0x%x",
+                   Kernel, Process, gcmOPT_POINTER(Data));
+
+    /* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Kernel, gcvOBJ_KERNEL);
+    gcmkVERIFY_ARGUMENT(Data != gcvNULL);
+
+    /* Get base address. */
+    gcmkONERROR(gckHARDWARE_GetBaseAddress(Kernel->hardware, &baseAddress));
+
+    /* Walk all used cache slots. */
+    for (i = oldest = 0; i < Kernel->cacheSlots; ++i)
+    {
+        if ((Kernel->cache[i].logical == *Data)
+        &&  (Kernel->cache[i].process == Process)
+        )
+        {
+            /* Bail out. */
+            break;
+        }
+
+        if (i == 0)
+        {
+            /* First slot. */
+            oldest = i;
+        }
+
+        /* Test if this cache slot is older. */
+        else if (Kernel->cache[i].stamp < Kernel->cache[oldest].stamp)
+        {
+            oldest = i;
+        }
+    }
+
+    /* See if we had a match. */
+    if (i == Kernel->cacheSlots)
+    {
+        /* See if there is room in the cache. */
+        if (i < gcmCOUNTOF(Kernel->cache))
+        {
+            /* Just append to the cache. */
+            i = Kernel->cacheSlots++;
+        }
+
+        else
+        {
+            /* Evict the oldest cache line. */
+            i = oldest;
+        }
+
+        /* Initialize the cache line. */
+        Kernel->cache[i].logical = *Data;
+        Kernel->cache[i].process = Process;
+
+        /* Map the logical address to a DMA address. */
+        gcmkONERROR(gckOS_GetPhysicalAddress(Kernel->os,
+                                             *Data,
+                                             &Kernel->cache[i].dma));
+
+        if (baseAddress != 0)
+        {
+            gctBOOL needBase;
+
+            /* Does this state load need a base address? */
+            gcmkONERROR(gckHARDWARE_NeedBaseAddress(Kernel->hardware,
+                                                    ((gctUINT32_PTR) Data)[-1],
+                                                    &needBase));
+
+            if (needBase)
+            {
+                /* Add the base address. */
+                Kernel->cache[i].dma += baseAddress;
+            }
+        }
+    }
+
+    /* Increment time stamp of the cache slot. */
+    Kernel->cache[i].stamp = Kernel->cacheTimeStamp++;
+
+    /* Return DMA address. */
+    *Data = gcmINT2PTR(Kernel->cache[i].dma);
+
+    /* Success. */
+    gcmkFOOTER_ARG("*Data=0x%08x", *Data);
+    return gcvSTATUS_OK;
+
+OnError:
+    /* Return the status. */
+    gcmkFOOTER();
+    return status;
+}
+#endif
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/Event.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/Event.c
@@ -0,0 +1,2187 @@
+/****************************************************************************
+*
+*    Copyright (C) 2002 - 2008 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public Lisence as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+
+
+#include "PreComp.h"
+#include "Context.h"
+
+/******************************************************************************\
+********************************* Support Code *********************************
+\******************************************************************************/
+
+/*******************************************************************************
+**
+**	_GetEvent
+**
+**	Get an empty event ID.
+**
+**	INPUT:
+**
+**		gcoEVENT Event
+**			Pointer to an gcoEVENT object.
+**
+**		gctBOOL Wait
+**			Wait for events in case they are exhausted.
+**
+**		gctBOOL ReduceCount
+**          Reduce the number of available events for user command buffers.
+**
+**	OUTPUT:
+**
+**		gctUINT8 * EventID
+**			Pointer to a variable that receives an empty event ID.
+*/
+static gceSTATUS
+_GetEvent(
+    IN gcoEVENT Event,
+    IN gctBOOL Wait,
+#if USE_EVENT_QUEUE
+    IN gctCONST_STRING Title,
+#else
+    IN gctBOOL ReduceCount,
+#endif
+    OUT gctUINT8 * EventID
+    )
+{
+    gctINT i;
+#if USE_EVENT_QUEUE
+	gceSTATUS status;
+#else
+    gctUINT8 id;
+    gctINT count = ReduceCount ? 4 : 0;
+#endif
+
+#if USE_EVENT_QUEUE
+	/* Grab the queue mutex. */
+	status = gcoOS_AcquireMutex(Event->os,
+								Event->mutexQueue,
+								gcvINFINITE);
+
+	if (gcmIS_ERROR(status))
+	{
+		return status;
+	}
+
+	/* Suspend interrupt */
+	gcmVERIFY_OK(gcoOS_SuspendInterrupt(Event->os));
+#endif
+
+    do
+    {
+	/* Walk through all events. */
+#if USE_EVENT_QUEUE
+	for (i = 0; i < gcmCOUNTOF(Event->queues); ++i)
+#else
+	for (id = Event->lastID, i = 0; i < 32; id = (id + 1) & 31, i++)
+#endif
+	{
+#if USE_EVENT_QUEUE
+		if (Event->queues[i].head == gcvNULL)
+		{
+			*EventID = (gctUINT8) i;
+
+			/* Save time stamp of event. */
+			Event->queues[i].stamp = ++(Event->stamp);
+
+			/* Resume interrupt */
+			gcmVERIFY_OK(gcoOS_ResumeInterrupt(Event->os));
+
+			/* Release the queue mutex. */
+			gcmVERIFY_OK(gcoOS_ReleaseMutex(Event->os, Event->mutexQueue));
+
+			return gcvSTATUS_OK;
+		}
+	}
+
+	/* Resume interrupt */
+	gcmVERIFY_OK(gcoOS_ResumeInterrupt(Event->os));
+
+	/* Release the queue mutex. */
+	gcmVERIFY_OK(gcoOS_ReleaseMutex(Event->os, Event->mutexQueue));
+
+	if (Wait)
+	{
+	    gcmVERIFY_OK(gcoOS_Delay(Event->os, 1));
+	}
+
+	/* Grab the queue mutex. */
+	status = gcoOS_AcquireMutex(Event->os,
+								Event->mutexQueue,
+								gcvINFINITE);
+
+	if (gcmIS_ERROR(status))
+	{
+		return status;
+	}
+
+	/* Suspend interrupt */
+	gcmVERIFY_OK(gcoOS_SuspendInterrupt(Event->os));
+#else
+	    /* Check if event is available. */
+	    if (Event->schedule[id].stamp == 0)
+	    {
+		/* Check if we need to keep a number of free events. */
+		if (count-- == 0)
+		{
+		    /* Mark event as used. */
+		    Event->schedule[id].stamp = ++(Event->stamp);
+
+		    /* Return event ID. */
+		    *EventID = Event->lastID = id;
+
+		    /* Success. */
+		    return gcvSTATUS_OK;
+	    	}
+	    }
+	}
+
+	if (ReduceCount)
+	{
+	    /* Bail out if no free slots. */
+	    break;
+	}
+
+	if (Wait)
+	{
+	    gcmVERIFY_OK(gcoOS_Delay(Event->os, 1));
+	}
+#endif
+    }
+    while (Wait);
+
+#if USE_EVENT_QUEUE
+	/* Resume interrupt */
+	gcmVERIFY_OK(gcoOS_ResumeInterrupt(Event->os));
+
+	/* Release the queue mutex. */
+	gcmVERIFY_OK(gcoOS_ReleaseMutex(Event->os, Event->mutexQueue));
+#endif
+
+    /* Out of resources. */
+    return gcvSTATUS_OUT_OF_RESOURCES;
+}
+
+/******************************************************************************\
+******************************* gcoEVENT API Code *******************************
+\******************************************************************************/
+
+/*******************************************************************************
+**
+**	gcoEVENT_Construct
+**
+**	Construct a new gcoEVENT object.
+**
+**	INPUT:
+**
+**		gcoKERNEL Kernel
+**			Pointer to an gcoKERNEL object.
+**
+**	OUTPUT:
+**
+**		gcoEVENT * Event
+**			Pointer to a variable that receives the gcoEVENT object pointer.
+*/
+gceSTATUS
+gcoEVENT_Construct(
+	IN gcoKERNEL Kernel,
+	OUT gcoEVENT * Event
+	)
+{
+	gcoOS os;
+	gceSTATUS status;
+	gcoEVENT event;
+	int i;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Kernel, gcvOBJ_KERNEL);
+	gcmVERIFY_ARGUMENT(Event != gcvNULL);
+
+	do
+	{
+		/* Extract the pointer to the gcoOS object. */
+		os = Kernel->os;
+		gcmVERIFY_OBJECT(os, gcvOBJ_OS);
+
+		/* Allocate the gcoEVENT object. */
+		gcmERR_BREAK(gcoOS_Allocate(os,
+									gcmSIZEOF(struct _gcoEVENT),
+									(gctPOINTER *) &event));
+
+		/* Initialize the gcoEVENT object. */
+		event->object.type = gcvOBJ_EVENT;
+		event->kernel      = Kernel;
+		event->os          = os;
+
+#if USE_EVENT_QUEUE
+		/* Create the queue mutex. */
+		status = gcoOS_CreateMutex(os, &event->mutexQueue);
+
+		if (gcmIS_ERROR(status))
+		{
+			/* Roll back. */
+			gcmVERIFY_OK(gcoOS_Free(os, event));
+
+			break;
+		}
+
+		/* Zero out the entire event queue. */
+		for (i = 0; i < gcmCOUNTOF(event->queues); ++i)
+		{
+			event->queues[i].head = gcvNULL;
+		}
+
+		/* Zero out the time stamp. */
+		event->stamp = 0;
+
+		/* No events to handle. */
+		event->head  = gcvNULL;
+#else
+		/* Zero out the entire schedule. */
+		for (i = 0; i < gcmCOUNTOF(event->schedule); i++)
+		{
+			event->schedule[i].stamp = 0;
+		}
+
+		/* Start at first event ID. */
+		event->stamp  = 0;
+		event->lastID = 0;
+#endif
+
+		/* Return pointer to the gcoEVENT object. */
+		*Event = event;
+
+		/* Success. */
+		return gcvSTATUS_OK;
+	}
+	while (gcvFALSE);
+
+	/* Return the status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gcoEVENT_Destroy
+**
+**	Destroy an gcoEVENT object.
+**
+**	INPUT:
+**
+**		gcoEVENT Event
+**			Pointer to an gcoEVENT object.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gcoEVENT_Destroy(
+	IN gcoEVENT Event
+	)
+{
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Event, gcvOBJ_EVENT);
+
+#if USE_EVENT_QUEUE
+    /* Delete the queue mutex. */
+    gcmVERIFY_OK(gcoOS_DeleteMutex(Event->os, Event->mutexQueue));
+#endif
+
+	/* Mark the gcoEVENT object as unknown. */
+	Event->object.type = gcvOBJ_UNKNOWN;
+
+	/* Free the gcoEVENT object. */
+	gcmVERIFY_OK(gcoOS_Free(Event->os, Event));
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+#if !USE_EVENT_QUEUE
+/*******************************************************************************
+**
+**	gcoEVENT_Schedule
+**
+**	Schedule an event.
+**
+**	INPUT:
+**
+**		gcoEVENT Event
+**			Pointer to an gcoEVENT object.
+**
+**      gceEVENT_TYPE Type
+**          Type of event to schedule.
+**
+**      gcuEVENT_DATA * Data
+**          Pointer to event data to schedule.
+**
+**		gctPOINTER CommandBuffer,
+**			Pointer to user-level command buffer.
+**
+**		gctSIZE_T * CommandBufferSize
+**			Pointer to the number of bytes in the user-level command buffer or
+**			gcvNULL to use kernel queue for event.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * CommandBuffer
+**			Pointer to a variable receiving the number of bytes copied into the
+**			command buffer.
+*/
+gceSTATUS
+gcoEVENT_Schedule(
+	IN gcoEVENT Event,
+	IN gceEVENT_TYPE Type,
+	IN gcuEVENT_DATA * Data,
+	IN gctPOINTER CommandBuffer,
+	IN OUT gctSIZE_T * CommandBufferSize
+	)
+{
+	gcoOS os;
+	gcoHARDWARE hardware;
+	gcoCOMMAND command;
+	gceSTATUS status;
+	gctPOINTER buffer;
+	gctSIZE_T required, bytes;
+	gctPOINTER address;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Event, gcvOBJ_EVENT);
+	gcmVERIFY_ARGUMENT(Data != gcvNULL);
+
+	/* Extract the required objects. */
+	os = Event->os;
+	hardware = Event->kernel->hardware;
+	gcmVERIFY_OBJECT(hardware, gcvOBJ_HARDWARE);
+	command = Event->kernel->command;
+	gcmVERIFY_OBJECT(command, gcvOBJ_COMMAND);
+
+	if (CommandBufferSize == gcvNULL)
+	{
+		/* Compute size of EVENT. */
+		status = gcoHARDWARE_Event(hardware,
+    							  gcvNULL,
+    							  0,
+    							  gcvKERNEL_COMMAND,
+    							  &required);
+
+		if (gcmIS_ERROR(status))
+		{
+			/* Error. */
+			return status;
+		}
+
+		/* Reserve space in the command buffer. */
+		status = gcoCOMMAND_Reserve(command, required, &buffer, &bytes);
+
+		if (gcmIS_ERROR(status))
+		{
+			/* Error. */
+			return status;
+		}
+	}
+	else
+	{
+		/* Use user-level command buffer. */
+		buffer = CommandBuffer;
+		bytes =	*CommandBufferSize;
+	}
+
+	/* Dispatch on event type. */
+	switch (Type)
+	{
+	case gcvEVENT_SIGNAL:
+		/* Signal. */
+		status = gcoEVENT_Signal(Event,
+								buffer,
+								&bytes,
+								Data->Signal.fromWhere,
+								Data->Signal.signal,
+								Data->Signal.auxSignal,
+								Data->Signal.process,
+								(CommandBufferSize == gcvNULL));
+		break;
+
+	case gcvEVENT_UNLOCK:
+		/* Unlock. */
+		status = gcoEVENT_Unlock(Event,
+								 buffer,
+								 &bytes,
+								 gcvKERNEL_PIXEL,
+								 Data->Unlock.node,
+								 Data->Unlock.type,
+								 (CommandBufferSize == gcvNULL));
+		break;
+
+	case gcvEVENT_UNMAP_MEMORY:
+		/* Unmap memory. */
+		status = gcoEVENT_UnmapMemory(Event,
+									  buffer,
+									  &bytes,
+									  gcvKERNEL_PIXEL,
+									  Data->UnmapMemory.bytes,
+									  Data->UnmapMemory.physical,
+									  Data->UnmapMemory.logical,
+									  (CommandBufferSize == gcvNULL));
+		break;
+
+	case gcvEVENT_UNMAP_USER_MEMORY:
+		/* Unmap user memory. */
+		status = gcoEVENT_UnmapUserMemory(Event,
+										  buffer,
+										  &bytes,
+										  gcvKERNEL_PIXEL,
+										  Data->UnmapUserMemory.memory,
+										  Data->UnmapUserMemory.size,
+										  Data->UnmapUserMemory.info,
+										  Data->UnmapUserMemory.address,
+										  (CommandBufferSize == gcvNULL));
+		break;
+
+	case gcvEVENT_FREE_NON_PAGED_MEMORY:
+		/* Free non-paged memory. */
+		status = gcoEVENT_FreeNonPagedMemory(Event,
+    										buffer,
+    										&bytes,
+											Data->FreeNonPagedMemory.bytes,
+											Data->FreeNonPagedMemory.physical,
+											Data->FreeNonPagedMemory.logical,
+											gcvKERNEL_PIXEL,
+											(CommandBufferSize == gcvNULL));
+		break;
+
+	case gcvEVENT_FREE_CONTIGUOUS_MEMORY:
+		/* Free contiguous memory. */
+		status = gcoEVENT_FreeContiguousMemory(Event,
+    										   buffer,
+    										   &bytes,
+											   Data->FreeContiguousMemory.bytes,
+											   Data->FreeContiguousMemory.physical,
+											   Data->FreeContiguousMemory.logical,
+											   gcvKERNEL_PIXEL,
+											   (CommandBufferSize == gcvNULL));
+		break;
+
+	case gcvEVENT_FREE_VIDEO_MEMORY:
+		/* Free video memory. */
+		status = gcoEVENT_FreeVideoMemory(Event,
+    									 buffer,
+    									 &bytes,
+										 Data->FreeVideoMemory.node,
+										 gcvKERNEL_PIXEL,
+										 (CommandBufferSize == gcvNULL));
+		break;
+
+	case gcvEVENT_WRITE_DATA:
+		/* Map user pointer to kernel space. */
+		status = gcoOS_MapUserPointer(Event->os,
+									  Data->WriteData.address,
+									  sizeof(gctUINT32),
+									  &address);
+
+		if (gcmIS_SUCCESS(status))
+		{
+			/* Write data. */
+			status = gcoEVENT_WriteData(Event,
+									    buffer,
+    								    &bytes,
+									    address,
+									    Data->WriteData.data,
+									    gcvKERNEL_COMMAND,
+									    (CommandBufferSize == gcvNULL));
+
+			if (gcmIS_SUCCESS(status))
+			{
+				/* Unmap the write back address. */
+				gcmVERIFY_OK(gcoOS_UnmapUserPointer(Event->os,
+													Data->WriteData.address,
+													sizeof(gctUINT32),
+													address));
+			}
+		}
+		break;
+
+	default:
+		if (CommandBufferSize == gcvNULL)
+		{
+			/* Release command buffer. */
+			gcmVERIFY_OK(gcoCOMMAND_Release(command));
+		}
+
+		/* Invalid argument. */
+		return gcvSTATUS_INVALID_ARGUMENT;
+	}
+
+	if (CommandBufferSize == gcvNULL)
+	{
+		/* Execute EVENT command. */
+		status = gcoCOMMAND_Execute(command, required);
+	}
+	else
+	{
+		/* Return number of bytes copied to user-level command buffer. */
+		*CommandBufferSize = bytes;
+	}
+
+	/* Return the status. */
+	return status;
+}
+#endif
+
+/*******************************************************************************
+**
+**	gcoEVENT_FreeNonPagedMemory
+**
+**	Schedule an event to free non-paged memory.
+**
+**	INPUT:
+**
+**		gcoEVENT Event
+**			Pointer to an gcoEVENT object.
+**
+**      gctPOINTER CommandBuffer
+**          Pointer to the command buffer to append the event.
+**
+**      gctSIZE_T * CommandSize
+**          Pointer to the number of bytes available in the command buffer.
+**
+**      gctSIZE_T Bytes
+**          Number of bytes of non-paged memory to free.
+**
+**      gctPHYS_ADDR Physical
+**          Physical address of non-paged memory to free.
+**
+**      gctPOINTER Logical
+**          Logical address of non-paged memory to free.
+**
+**      gceKERNEL_WHERE FromWhere
+**          Place in the pipe where the event needs to be generated.
+**
+**		gctBOOL Wait
+**			Wait flag.  Should be set to gcvFALSE for any event that needs to be
+**			copied into a command buffer since we might exhaust the number of
+**			events.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * CommandSize
+**          Number of bytes used for the event.
+*/
+gceSTATUS
+gcoEVENT_FreeNonPagedMemory(
+	IN gcoEVENT Event,
+	IN gctPOINTER CommandBuffer,
+	IN OUT gctSIZE_T * CommandSize,
+	IN gctSIZE_T Bytes,
+	IN gctPHYS_ADDR Physical,
+	IN gctPOINTER Logical,
+	IN gceKERNEL_WHERE FromWhere,
+	IN gctBOOL Wait
+	)
+{
+	gctUINT8 id;
+	gceSTATUS status;
+#if USE_EVENT_QUEUE
+	gcsHAL_INTERFACE interface;
+#endif
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Event, gcvOBJ_EVENT);
+	gcmVERIFY_ARGUMENT(CommandSize != gcvNULL);
+
+	do
+	{
+		/* Get an available event ID. */
+#if USE_EVENT_QUEUE
+		gcmERR_BREAK(_GetEvent(Event, Wait, "FreeNonPagedMemory", &id));
+#else
+		gcmERR_BREAK(_GetEvent(Event, Wait, !Wait, &id));
+#endif
+
+#if USE_EVENT_QUEUE
+		/* Create an event. */
+		interface.command = gcvHAL_FREE_NON_PAGED_MEMORY;
+		interface.u.FreeNonPagedMemory.bytes    = Bytes;
+		interface.u.FreeNonPagedMemory.physical = Physical;
+		interface.u.FreeNonPagedMemory.logical  = Logical;
+
+		/* Append it to the queue. */
+		gcmERR_BREAK(gcoEVENT_Append(Event, id, &interface));
+#else
+		/* Mark the event as non-paged memory free. */
+		Event->schedule[id].type = gcvEVENT_FREE_NON_PAGED_MEMORY;
+		Event->schedule[id].data.FreeNonPagedMemory.bytes = Bytes;
+		Event->schedule[id].data.FreeNonPagedMemory.physical = Physical;
+		Event->schedule[id].data.FreeNonPagedMemory.logical = Logical;
+#endif
+
+		/* Program the hardware event. */
+		status = gcoHARDWARE_Event(Event->kernel->hardware,
+								   CommandBuffer,
+								   id,
+								   FromWhere,
+								   CommandSize);
+
+		if (gcmIS_ERROR(status))
+		{
+#if USE_EVENT_QUEUE
+			/* Roll back the event append. */
+			gcmVERIFY_OK(gcoEVENT_Clear(Event, id));
+#else
+			/* Error, mark event as available. */
+			Event->schedule[id].stamp = 0;
+#endif
+		}
+	}
+	while (gcvFALSE);
+
+	/* Return the status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gcoEVENT_FreeContigiuousMemory
+**
+**	Schedule an event to free contiguous memory.
+**
+**	INPUT:
+**
+**		gcoEVENT Event
+**			Pointer to an gcoEVENT object.
+**
+**      gctPOINTER CommandBuffer
+**          Pointer to the command buffer to append the event.
+**
+**      gctSIZE_T * CommandSize
+**          Pointer to the number of bytes available in the command buffer.
+**
+**      gctSIZE_T Bytes
+**          Number of bytes of contiguous memory to free.
+**
+**      gctPHYS_ADDR Physical
+**          Physical address of contiguous memory to free.
+**
+**      gctPOINTER Logical
+**          Logical address of contiguous memory to free.
+**
+**      gceKERNEL_WHERE FromWhere
+**          Place in the pipe where the event needs to be generated.
+**
+**		gctBOOL Wait
+**			Wait flag.  Should be set to gcvFALSE for any event that needs to be
+**			copied into a command buffer since we might exhaust the number of
+**			events.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * CommandSize
+**          Number of bytes used for the event.
+*/
+gceSTATUS
+gcoEVENT_FreeContiguousMemory(
+	IN gcoEVENT Event,
+	IN gctPOINTER CommandBuffer,
+	IN OUT gctSIZE_T * CommandSize,
+	IN gctSIZE_T Bytes,
+	IN gctPHYS_ADDR Physical,
+	IN gctPOINTER Logical,
+	IN gceKERNEL_WHERE FromWhere,
+	IN gctBOOL Wait
+	)
+{
+	gctUINT8 id;
+	gceSTATUS status;
+#if USE_EVENT_QUEUE
+	gcsHAL_INTERFACE interface;
+#endif
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Event, gcvOBJ_EVENT);
+	gcmVERIFY_ARGUMENT(CommandSize != gcvNULL);
+
+	do
+	{
+		/* Get an available event ID. */
+#if USE_EVENT_QUEUE
+		gcmERR_BREAK(_GetEvent(Event, Wait, "FreeContiguousMemory", &id));
+#else
+		gcmERR_BREAK(_GetEvent(Event, Wait, !Wait, &id));
+#endif
+
+#if USE_EVENT_QUEUE
+		/* Create an event. */
+		interface.command = gcvHAL_FREE_CONTIGUOUS_MEMORY;
+		interface.u.FreeContiguousMemory.bytes    = Bytes;
+		interface.u.FreeContiguousMemory.physical = Physical;
+		interface.u.FreeContiguousMemory.logical  = Logical;
+
+		/* Append it to the queue. */
+		gcmERR_BREAK(gcoEVENT_Append(Event, id, &interface));
+#else
+		/* Mark the event as non-paged memory free. */
+		Event->schedule[id].type = gcvEVENT_FREE_CONTIGUOUS_MEMORY;
+		Event->schedule[id].data.FreeContiguousMemory.bytes    = Bytes;
+		Event->schedule[id].data.FreeContiguousMemory.physical = Physical;
+		Event->schedule[id].data.FreeContiguousMemory.logical  = Logical;
+#endif
+
+		/* Program the hardware event. */
+		status = gcoHARDWARE_Event(Event->kernel->hardware,
+								   CommandBuffer,
+								   id,
+								   FromWhere,
+								   CommandSize);
+
+		if (gcmIS_ERROR(status))
+		{
+#if USE_EVENT_QUEUE
+			/* Roll back the event append. */
+			gcmVERIFY_OK(gcoEVENT_Clear(Event, id));
+#else
+			/* Error, mark event as available. */
+			Event->schedule[id].stamp = 0;
+#endif
+		}
+	}
+	while (gcvFALSE);
+
+	/* Return the status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gcoEVENT_FreeVideoMemory
+**
+**	Schedule an event to free video memory.
+**
+**	INPUT:
+**
+**		gcoEVENT Event
+**			Pointer to an gcoEVENT object.
+**
+**      gctPOINTER CommandBuffer
+**          Pointer to the command buffer to append the event.
+**
+**      gctSIZE_T * CommandSize
+**          Pointer to the number of bytes available in the command buffer.
+**
+**      gcuVIDMEM_NODE_PTR VideoMemory
+**          Pointer to a gcuVIDMEM_NODE object to free.
+**
+**      gceKERNEL_WHERE FromWhere
+**          Place in the pipe where the event needs to be generated.
+**
+**		gctBOOL Wait
+**			Wait flag.  Should be set to gcvFALSE for any event that needs to be
+**			copied into a command buffer since we might exhaust the number of
+**			events.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * CommandSize
+**          Number of bytes used for the event.
+*/
+gceSTATUS
+gcoEVENT_FreeVideoMemory(
+	IN gcoEVENT Event,
+	IN gctPOINTER CommandBuffer,
+	IN OUT gctSIZE_T * CommandSize,
+	IN gcuVIDMEM_NODE_PTR VideoMemory,
+	IN gceKERNEL_WHERE FromWhere,
+	IN gctBOOL Wait
+	)
+{
+	gctUINT8 id;
+	gceSTATUS status;
+#if USE_EVENT_QUEUE
+	gcsHAL_INTERFACE interface;
+#endif
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Event, gcvOBJ_EVENT);
+	gcmVERIFY_ARGUMENT(CommandSize != gcvNULL);
+
+	/* Get an available event ID. */
+#if USE_EVENT_QUEUE
+	status = _GetEvent(Event, Wait, "FreeVideoMemory", &id);
+#else
+	status = _GetEvent(Event, Wait, !Wait, &id);
+#endif
+
+	if (gcmIS_ERROR(status))
+	{
+		/* Error. */
+		return status;
+	}
+
+#if USE_EVENT_QUEUE
+	/* Create an event. */
+	interface.command = gcvHAL_FREE_VIDEO_MEMORY;
+	interface.u.FreeVideoMemory.node = VideoMemory;
+
+		/* Append it to the queue. */
+	status = gcoEVENT_Append(Event, id, &interface);
+
+	if (gcmIS_ERROR(status))
+	{
+		/* Error. */
+		return status;
+	}
+#else
+	/* Mark the event as video memory free. */
+	Event->schedule[id].type = gcvEVENT_FREE_VIDEO_MEMORY;
+	Event->schedule[id].data.FreeVideoMemory.node = VideoMemory;
+#endif
+
+	/* Program the hardware event. */
+	status = gcoHARDWARE_Event(Event->kernel->hardware,
+							   CommandBuffer,
+							   id,
+							   FromWhere,
+							   CommandSize);
+
+	if (gcmIS_ERROR(status))
+	{
+#if USE_EVENT_QUEUE
+			/* Roll back the event append. */
+			gcmVERIFY_OK(gcoEVENT_Clear(Event, id));
+#else
+		/* Error, mark event as available. */
+		Event->schedule[id].stamp = 0;
+#endif
+	}
+
+	/* Return status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gcoEVENT_WriteData
+**
+**	Schedule an event to write data.
+**
+**	INPUT:
+**
+**		gcoEVENT Event
+**			Pointer to an gcoEVENT object.
+**
+**      gctPOINTER CommandBuffer
+**          Pointer to the command buffer to append the event.
+**
+**      gctSIZE_T * CommandSize
+**          Pointer to the number of bytes available in the command buffer.
+**
+**      gctPOINTER Address
+**          Pointer to the memory location to write data to.
+**
+**      gctUINT32 Data
+**          Data to write.
+**
+**      gceKERNEL_WHERE FromWhere
+**          Place in the pipe where the event needs to be generated.
+**
+**		gctBOOL Wait
+**			Wait flag.  Should be set to gcvFALSE for any event that needs to be
+**			copied into a command buffer since we might exhaust the number of
+**			events.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * CommandSize
+**          Number of bytes used for the event.
+*/
+gceSTATUS
+gcoEVENT_WriteData(
+	IN gcoEVENT Event,
+	IN gctPOINTER CommandBuffer,
+	IN OUT gctSIZE_T * CommandSize,
+	IN gctPOINTER Address,
+	IN gctUINT32 Data,
+	IN gceKERNEL_WHERE FromWhere,
+	IN gctBOOL Wait
+	)
+{
+	gcoOS os;
+	gctUINT8 id;
+	gceSTATUS status;
+	gctUINT32 address;
+#if USE_EVENT_QUEUE
+	gcsHAL_INTERFACE interface;
+#endif
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Event, gcvOBJ_EVENT);
+	gcmVERIFY_ARGUMENT(CommandSize != gcvNULL);
+
+	do
+	{
+		/* Extract the gcoOS object pointer. */
+		os = Event->os;
+		gcmVERIFY_OBJECT(os, gcvOBJ_OS);
+
+		/* Convert address into physical address. */
+		gcmERR_BREAK(gcoOS_GetPhysicalAddress(os, Address, &address));
+
+		/* Get an available event ID. */
+#if USE_EVENT_QUEUE
+		gcmERR_BREAK(_GetEvent(Event, Wait, "WriteData", &id));
+#else
+		gcmERR_BREAK(_GetEvent(Event, Wait, !Wait, &id));
+#endif
+
+		/* Mark the event as a data write. */
+#if USE_EVENT_QUEUE
+		interface.command = gcvHAL_WRITE_DATA;
+		interface.u.WriteData.address = address;
+		interface.u.WriteData.data    = Data;
+	       interface.u.WriteData.kernelAddress = Address;
+		
+		/* Append it to the queue. */
+		gcmERR_BREAK(gcoEVENT_Append(Event, id, &interface));
+#else
+		Event->schedule[id].type = gcvEVENT_WRITE_DATA;
+		Event->schedule[id].data.WriteData.address = gcmINT2PTR(address);
+		Event->schedule[id].data.WriteData.data = Data;
+		Event->schedule[id].data.WriteData.kernelAddress = Address;     
+#endif
+
+		/* Program the hardware event. */
+		status = gcoHARDWARE_Event(Event->kernel->hardware,
+								   CommandBuffer,
+								   id,
+								   FromWhere,
+								   CommandSize);
+
+		if (gcmIS_ERROR(status))
+		{
+#if USE_EVENT_QUEUE
+			/* Roll back the event append. */
+			gcmVERIFY_OK(gcoEVENT_Clear(Event, id));
+#else
+			/* Error, mark event as available. */
+			Event->schedule[id].stamp = 0;
+#endif
+		}
+	}
+	while (gcvFALSE);
+
+	/* Return the status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gcoEVENT_SetIdle
+**
+**	Schedule an event to set idle status.
+**
+**	INPUT:
+**
+**		gcoEVENT Event
+**			Pointer to an gcoEVENT object.
+**
+**      gctPOINTER CommandBuffer
+**          Pointer to the command buffer to append the event.
+**
+**      gctSIZE_T * CommandSize
+**          Pointer to the number of bytes available in the command buffer.
+**
+**      gceKERNEL_WHERE FromWhere
+**          Place in the pipe where the event needs to be generated.
+**
+**		gctBOOL Wait
+**			Wait flag.  Should be set to gcvFALSE for any event that needs to be
+**			copied into a command buffer since we might exhaust the number of
+**			events.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * CommandSize
+**          Number of bytes used for the event.
+*/
+gceSTATUS
+gcoEVENT_SetIdle(
+	IN gcoEVENT Event,
+	IN gctPOINTER CommandBuffer,
+	IN OUT gctSIZE_T * CommandSize,
+	IN gceKERNEL_WHERE FromWhere,
+	IN gctBOOL Wait
+	)
+{
+	gcoOS os;
+	gctUINT8 id;
+	gceSTATUS status;
+#if USE_EVENT_QUEUE
+	gcsHAL_INTERFACE interface;
+#endif
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Event, gcvOBJ_EVENT);
+	gcmVERIFY_ARGUMENT(CommandSize != gcvNULL);
+
+	do
+	{
+		/* Extract the gcoOS object pointer. */
+		os = Event->os;
+		gcmVERIFY_OBJECT(os, gcvOBJ_OS);
+
+		/* Get an available event ID. */
+#if USE_EVENT_QUEUE
+		gcmERR_BREAK(_GetEvent(Event, Wait, "SetIdle", &id));
+#else
+		gcmERR_BREAK(_GetEvent(Event, Wait, !Wait, &id));
+#endif
+
+		/* Mark the event as a data write. */
+#if USE_EVENT_QUEUE
+		interface.command = gcvHAL_SET_IDLE;
+
+		/* Append it to the queue. */
+		gcmERR_BREAK(gcoEVENT_Append(Event, id, &interface));
+#else
+		Event->schedule[id].type = gcvEVENT_SET_IDLE;
+#endif
+
+		/* Program the hardware event. */
+		status = gcoHARDWARE_Event(Event->kernel->hardware,
+								   CommandBuffer,
+								   id,
+								   FromWhere,
+								   CommandSize);
+
+		if (gcmIS_ERROR(status))
+		{
+#if USE_EVENT_QUEUE
+			/* Roll back the event append. */
+			gcmVERIFY_OK(gcoEVENT_Clear(Event, id));
+#else
+			/* Error, mark event as available. */
+			Event->schedule[id].stamp = 0;
+#endif
+		}
+	}
+	while (gcvFALSE);
+
+	/* Return the status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gcoEVENT_Unlock
+**
+**	Schedule an event to unlock virtual memory.
+**
+**	INPUT:
+**
+**		gcoEVENT Event
+**			Pointer to an gcoEVENT object.
+**
+**      gctPOINTER CommandBuffer
+**          Pointer to the command buffer to append the event.
+**
+**      gctSIZE_T * CommandSize
+**          Pointer to the number of bytes available in the command buffer.
+**
+**      gceKERNEL_WHERE FromWhere
+**          Place in the pipe where the event needs to be generated.
+**
+**      gcuVIDMEM_NODE_PTR Node
+**          Pointer to a gcuVIDMEM_NODE union that specifies the virtual memory
+**			to unlock.
+**
+**		gceSURF_TYPE Type
+**			Type of surface to unlock.
+**
+**		gctBOOL Wait
+**			Wait flag.  Should be set to gcvFALSE for any event that needs to be
+**			copied into a command buffer since we might exhaust the number of
+**			events.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * CommandSize
+**          Number of bytes used for the event.
+*/
+gceSTATUS
+gcoEVENT_Unlock(
+	IN gcoEVENT Event,
+	IN gctPOINTER CommandBuffer,
+	IN OUT gctSIZE_T * CommandSize,
+	IN gceKERNEL_WHERE FromWhere,
+	IN gcuVIDMEM_NODE_PTR Node,
+	IN gceSURF_TYPE Type,
+	IN gctBOOL Wait
+	)
+{
+	gctUINT8 id;
+	gceSTATUS status;
+#if USE_EVENT_QUEUE
+	gcsHAL_INTERFACE interface;
+#endif
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Event, gcvOBJ_EVENT);
+	gcmVERIFY_ARGUMENT(CommandSize != gcvNULL);
+
+	do
+	{
+#if USE_EVENT_QUEUE
+		/* Get an available event ID. */
+		gcmERR_BREAK(_GetEvent(Event, Wait, "Unlock", &id));
+#else
+		gcmERR_BREAK(_GetEvent(Event, Wait, !Wait, &id));
+#endif
+
+#if USE_EVENT_QUEUE
+		/* Mark the event as an unlock. */
+		interface.command = gcvHAL_UNLOCK_VIDEO_MEMORY;
+		interface.u.UnlockVideoMemory.node = Node;
+		interface.u.UnlockVideoMemory.type = Type;
+
+		/* Append it to the queue. */
+		gcmERR_BREAK(gcoEVENT_Append(Event, id, &interface));
+#else
+		Event->schedule[id].type = gcvEVENT_UNLOCK;
+		Event->schedule[id].data.Unlock.node = Node;
+		Event->schedule[id].data.Unlock.type = Type;
+#endif
+
+		/* Program the hardware event. */
+		status = gcoHARDWARE_Event(Event->kernel->hardware,
+								   CommandBuffer,
+								   id,
+								   FromWhere,
+								   CommandSize);
+
+		if (gcmIS_ERROR(status))
+		{
+#if USE_EVENT_QUEUE
+			/* Roll back the event append. */
+			gcmVERIFY_OK(gcoEVENT_Clear(Event, id));
+#else
+			/* Error, mark event as available. */
+			Event->schedule[id].stamp = 0;
+#endif
+		}
+	}
+	while (gcvFALSE);
+
+	/* Return the status. */
+	return status;
+}
+
+#if !USE_EVENT_QUEUE
+/*******************************************************************************
+**
+**	gcoEVENT_Signal
+**
+**	Schedule an event to signal a signal.
+**
+**	INPUT:
+**
+**		gcoEVENT Event
+**			Pointer to an gcoEVENT object.
+**
+**      gctPOINTER CommandBuffer
+**          Pointer to the command buffer to append the event.
+**
+**      gctSIZE_T * CommandSize
+**          Pointer to the number of bytes available in the command buffer.
+**
+**      gceKERNEL_WHERE FromWhere
+**          Place in the pipe where the event needs to be generated.
+**
+**      gctSIGNAL Signal
+**          Handle of the signal to signal.
+**
+**      gctHANDLE Process
+**          Handle of the process owning the signal.
+**
+**		gctBOOL Wait
+**			Wait flag.  Should be set to gcvFALSE for any event that needs to be
+**			copied into a command buffer since we might exhaust the number of
+**			events.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * CommandSize
+**          Number of bytes used for the event.
+*/
+gceSTATUS
+gcoEVENT_Signal(
+	IN gcoEVENT Event,
+	IN gctPOINTER CommandBuffer,
+	IN OUT gctSIZE_T * CommandSize,
+	IN gceKERNEL_WHERE FromWhere,
+	IN gctSIGNAL Signal,
+	IN gctSIGNAL AuxSignal,
+	IN gctHANDLE Process,
+	IN gctBOOL Wait
+	)
+{
+	gctUINT8 id;
+	gceSTATUS status;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Event, gcvOBJ_EVENT);
+	gcmVERIFY_ARGUMENT(CommandSize != gcvNULL);
+
+	/* Get an available event ID. */
+	status = _GetEvent(Event, Wait, !Wait, &id);
+
+	if (gcmIS_ERROR(status))
+	{
+		/* Error. */
+		return status;
+	}
+
+	/* Mark the event as a signal. */
+	Event->schedule[id].type = gcvEVENT_SIGNAL;
+	Event->schedule[id].data.Signal.signal = Signal;
+	Event->schedule[id].data.Signal.auxSignal = AuxSignal;
+	Event->schedule[id].data.Signal.process = Process;
+
+	/* Program the hardware event. */
+	status = gcoHARDWARE_Event(Event->kernel->hardware,
+							   CommandBuffer,
+							   id,
+							   FromWhere,
+							   CommandSize);
+
+	if (gcmIS_ERROR(status))
+	{
+		/* Error, mark event as available. */
+		Event->schedule[id].stamp = 0;
+	}
+
+
+	/* Return status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gcoEVENT_UnmapMemory
+**
+**	Schedule an event to unmap a buffer mapped through its physical address.
+**
+**	INPUT:
+**
+**		gcoEVENT Event
+**			Pointer to an gcoEVENT object.
+**
+**      gctPOINTER CommandBuffer
+**          Pointer to the command buffer to append the event.
+**
+**      gctSIZE_T * CommandSize
+**          Pointer to the number of bytes available in the command buffer.
+**
+**      gceKERNEL_WHERE FromWhere
+**          Place in the pipe where the event needs to be generated.
+**
+**      gctSIZE_T Size
+**			Memory size to be unmapped.
+**
+**      gctUINT32 Address
+**			Physical address to be unmapped.
+**
+**      gctPOINTER Memory
+**			Virtual address to be unmapped.
+**
+**		gctBOOL Wait
+**			Wait flag.  Should be set to gcvFALSE for any event that needs to be
+**			copied into a command buffer since we might exhaust the number of
+**			events.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * CommandSize
+**          Number of bytes used for the event.
+*/
+gceSTATUS
+gcoEVENT_UnmapMemory(
+	IN gcoEVENT Event,
+	IN gctPOINTER CommandBuffer,
+	IN OUT gctSIZE_T * CommandSize,
+	IN gceKERNEL_WHERE FromWhere,
+	IN gctSIZE_T Size,
+	IN gctPHYS_ADDR Address,
+	IN gctPOINTER Memory,
+	IN gctBOOL Wait
+	)
+{
+	gctUINT8 id;
+	gceSTATUS status;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Event, gcvOBJ_EVENT);
+	gcmVERIFY_ARGUMENT(CommandSize != gcvNULL);
+
+	/* Get an available event ID. */
+	status = _GetEvent(Event, Wait, !Wait, &id);
+
+	if (gcmIS_ERROR(status))
+	{
+		/* Error. */
+		return status;
+	}
+
+	/* Mark the event as a signal. */
+	Event->schedule[id].type = gcvEVENT_UNMAP_MEMORY;
+	Event->schedule[id].data.UnmapMemory.bytes    = Size;
+	Event->schedule[id].data.UnmapMemory.physical = Address;
+	Event->schedule[id].data.UnmapMemory.logical  = Memory;
+
+	/* Program the hardware event. */
+	status = gcoHARDWARE_Event(Event->kernel->hardware,
+							   CommandBuffer,
+							   id,
+							   FromWhere,
+							   CommandSize);
+
+	if (gcmIS_ERROR(status))
+	{
+		/* Error, mark event as available. */
+		Event->schedule[id].stamp = 0;
+	}
+
+	/* Return status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gcoEVENT_UnmapUserMemory
+**
+**	Schedule an event to unmap the user memory.
+**
+**	INPUT:
+**
+**		gcoEVENT Event
+**			Pointer to an gcoEVENT object.
+**
+**      gctPOINTER CommandBuffer
+**          Pointer to the command buffer to append the event.
+**
+**      gctSIZE_T * CommandSize
+**          Pointer to the number of bytes available in the command buffer.
+**
+**      gceKERNEL_WHERE FromWhere
+**          Place in the pipe where the event needs to be generated.
+**
+**      gctPOINTER Memory
+**			Virtual address to be unmapped.
+**
+**      gctSIZE_T Size
+**			Memory size to be unmapped.
+**
+**      gctPOINTER Info
+**			Private data for user memory mapping.
+**
+**      gctUINT32 Address
+**			Physical address to be unmapped.
+**
+**		gctBOOL Wait
+**			Wait flag.  Should be set to gcvFALSE for any event that needs to be
+**			copied into a command buffer since we might exhaust the number of
+**			events.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * CommandSize
+**          Number of bytes used for the event.
+*/
+gceSTATUS
+gcoEVENT_UnmapUserMemory(
+	IN gcoEVENT Event,
+	IN gctPOINTER CommandBuffer,
+	IN OUT gctSIZE_T * CommandSize,
+	IN gceKERNEL_WHERE FromWhere,
+	IN gctPOINTER Memory,
+	IN gctSIZE_T Size,
+	IN gctPOINTER Info,
+	IN gctUINT32 Address,
+	IN gctBOOL Wait
+	)
+{
+	gctUINT8 id;
+	gceSTATUS status;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Event, gcvOBJ_EVENT);
+	gcmVERIFY_ARGUMENT(CommandSize != gcvNULL);
+
+	/* Get an available event ID. */
+	status = _GetEvent(Event, Wait, !Wait, &id);
+
+	if (gcmIS_ERROR(status))
+	{
+		/* Error. */
+		return status;
+	}
+
+	/* Mark the event as a signal. */
+	Event->schedule[id].type = gcvEVENT_UNMAP_USER_MEMORY;
+	Event->schedule[id].data.UnmapUserMemory.memory = Memory;
+	Event->schedule[id].data.UnmapUserMemory.size = Size;
+	Event->schedule[id].data.UnmapUserMemory.info = Info;
+	Event->schedule[id].data.UnmapUserMemory.address = Address;
+
+	/* Program the hardware event. */
+	status = gcoHARDWARE_Event(Event->kernel->hardware,
+							   CommandBuffer,
+							   id,
+							   FromWhere,
+							   CommandSize);
+
+	if (gcmIS_ERROR(status))
+	{
+		/* Error, mark event as available. */
+		Event->schedule[id].stamp = 0;
+	}
+
+	/* Return status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gcoEVENT_Notify
+**
+**	Callback function to notify the gcoEVENT object an event has occured.
+**
+**	INPUT:
+**
+**		gcoEVENT Event
+**			Pointer to an gcoEVENT object.
+**
+**      gctUINT32 IDs
+**          Bit mask of event IDs that occured.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcoEVENT_Notify(
+	IN gcoEVENT Event,
+	IN gctUINT32 IDs
+	)
+{
+	gceSTATUS status = gcvSTATUS_OK;
+	gctPOINTER logical;
+	gctSIGNAL signal;
+	gctINT id;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Event, gcvOBJ_EVENT);
+
+	while (IDs != 0)
+	{
+		gctINT current;
+		struct _gcsEVENT_SCHEDULE * event = gcvNULL;
+
+		for (id = 0; id < 32; ++id)
+		{
+			if (IDs & (1 << id))
+			{
+				if (Event->schedule[id].stamp == 0)
+				{
+					gcmTRACE_ZONE(gcvZONE_EVENT, gcvLEVEL_ERROR,
+								  "gcoEVENT_Notify: Triggered ID=%d is not set!",
+								  id);
+
+					IDs &= ~(1 << id);
+				}
+				else if ((event == gcvNULL)
+				||       (Event->schedule[id].stamp < event->stamp)
+				)
+				{
+					event   = &Event->schedule[id];
+					current = id;
+				}
+			}
+		}
+
+		if (event == gcvNULL)
+		{
+			continue;
+		}
+
+		/* Dispatch on event type. */
+		switch (event->type)
+		{
+		case gcvEVENT_SIGNAL:
+			/* Set signal. */
+			gcmERR_BREAK(
+				gcoOS_UserSignal(Event->os,
+								 event->data.Signal.signal,
+								 event->data.Signal.process));
+
+			gcmASSERT(event->data.Signal.auxSignal == gcvNULL);
+
+			/* Success. */
+			status = gcvSTATUS_OK;
+			break;
+
+		case gcvEVENT_UNLOCK:
+			/* Unlock. */
+			gcmVERIFY_OK(gcoVIDMEM_Unlock(event->data.Unlock.node,
+										  event->data.Unlock.type,
+										  gcvNULL,
+										  gcvNULL));
+
+			/* Success. */
+			status = gcvSTATUS_OK;
+			break;
+
+		case gcvEVENT_UNMAP_MEMORY:
+			/* Unmap user memory mapped through physical address. */
+			status = gcoOS_UnmapMemory(Event->os,
+									   event->data.UnmapMemory.physical,
+									   event->data.UnmapMemory.bytes,
+									   event->data.UnmapMemory.logical);
+			break;
+
+		case gcvEVENT_UNMAP_USER_MEMORY:
+			/* Unmap user memory mapped through logical address. */
+			status = gcoOS_UnmapUserMemory(Event->os,
+										   event->data.UnmapUserMemory.memory,
+										   event->data.UnmapUserMemory.size,
+										   event->data.UnmapUserMemory.info,
+										   event->data.UnmapUserMemory.address);
+			break;
+
+		case gcvEVENT_FREE_NON_PAGED_MEMORY:
+			/* Free non-paged memory. */
+			status = gcoOS_FreeNonPagedMemory(
+						 Event->os,
+						 event->data.FreeNonPagedMemory.bytes,
+						 event->data.FreeNonPagedMemory.physical,
+						 event->data.FreeNonPagedMemory.logical);
+			break;
+
+		case gcvEVENT_FREE_CONTIGUOUS_MEMORY:
+			/* Free contiguous memory. */
+			status = gcoOS_FreeContiguous(
+						 Event->os,
+						 event->data.FreeNonPagedMemory.physical,
+						 event->data.FreeNonPagedMemory.logical,
+						 event->data.FreeNonPagedMemory.bytes);
+			break;
+
+		case gcvEVENT_FREE_VIDEO_MEMORY:
+			/* Free video memory. */
+			status = gcoVIDMEM_Free(event->data.FreeVideoMemory.node);
+			break;
+
+		case gcvEVENT_WRITE_DATA:
+			/* Convert physical into logical address. */
+			gcmVERIFY_OK(
+				gcoOS_MapPhysical(Event->os,
+								  gcmPTR2INT(event->data.WriteData.address),
+								  gcmPTR2INT(event->data.WriteData.kernelAddress),
+								  sizeof(gctUINT32),
+								  &logical));
+
+			/* Write data. */
+			gcmVERIFY_OK(gcoOS_WriteMemory(Event->os,
+										   logical,
+										   event->data.WriteData.data));
+
+			/* Unmap the physical memory. */
+			gcmVERIFY_OK(gcoOS_UnmapPhysical(Event->os,
+	    									 logical,
+											 sizeof(gctUINT32)));
+
+			/* Success. */
+			status = gcvSTATUS_OK;
+			break;
+
+		default:
+			/* Invalid argument. */
+			gcmFATAL("gcoEVENT_Notify: Unknown event type: %d", event->type);
+			return gcvSTATUS_INVALID_ARGUMENT;
+		}
+
+		/* Mark event is available. */
+		IDs &= ~(1 << current);
+		event->stamp = 0;
+	}
+
+	/* Return the status. */
+	return status;
+}
+#else
+gceSTATUS
+gcoEVENT_Append(
+	IN gcoEVENT Event,
+	IN gctUINT8 Id,
+	IN gcsHAL_INTERFACE_PTR Interface
+	)
+{
+	gceSTATUS status;
+	gcsEVENT_PTR event = gcvNULL;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Event, gcvOBJ_EVENT);
+	gcmVERIFY_ARGUMENT(Id < gcmCOUNTOF(Event->queues));
+
+	do
+	{
+		/* Allocate a new event record. */
+		gcmERR_BREAK(gcoOS_Allocate(Event->os,
+									gcmSIZEOF(gcsEVENT),
+									(gctPOINTER *) &event));
+
+		/* Grab the queue mutex. */
+		gcmERR_BREAK(gcoOS_AcquireMutex(Event->os,
+										Event->mutexQueue,
+										gcvINFINITE));
+
+		/* Suspend interrupt */
+		gcmVERIFY_OK(gcoOS_SuspendInterrupt(Event->os));
+
+		/* Initiailze the event record. */
+		event->next  = gcvNULL;
+		event->event = *Interface;
+
+		if (Event->queues[Id].head == gcvNULL)
+		{
+			/* Mark haead of new queue. */
+			Event->queues[Id].head = event;
+		}
+		else
+		{
+			/* Link in event record at tail of queue. */
+			Event->queues[Id].tail->next = event;
+		}
+
+		/* Mark new tail of queue. */
+		Event->queues[Id].tail = event;
+
+		/* Resume interrupt */
+		gcmVERIFY_OK(gcoOS_ResumeInterrupt(Event->os));
+
+		/* Release the queue mutex. */
+		gcmVERIFY_OK(gcoOS_ReleaseMutex(Event->os, Event->mutexQueue));
+
+		/* Success. */
+		return gcvSTATUS_OK;
+	}
+	while (gcvFALSE);
+
+	if (event != gcvNULL)
+	{
+		/* Roll back. */
+		gcmVERIFY_OK(gcoOS_Free(Event->os, event));
+	}
+
+	/* Return the status. */
+	return status;
+}
+
+gceSTATUS
+gcoEVENT_Clear(
+	IN gcoEVENT Event,
+	IN gctUINT8 Id
+	)
+{
+	gceSTATUS status = gcvSTATUS_OK;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Event, gcvOBJ_EVENT);
+	gcmVERIFY_ARGUMENT(Id < gcmCOUNTOF(Event->queues));
+
+	/* Grab the queue mutex. */
+	status = gcoOS_AcquireMutex(Event->os,
+								Event->mutexQueue,
+								gcvINFINITE);
+
+	if (gcmIS_ERROR(status))
+	{
+		return status;
+	}
+
+	/* Suspend interrupt */
+	gcmVERIFY_OK(gcoOS_SuspendInterrupt(Event->os));
+
+	/* Look while we have event records in the queue. */
+	while (Event->queues[Id].head != gcvNULL)
+	{
+		/* Unlink the event record from the queue. */
+		gcsEVENT_PTR event = Event->queues[Id].head;
+		Event->queues[Id].head = event->next;
+
+		/* Free the event record. */
+		gcmERR_BREAK(gcoOS_Free(Event->os, event));
+	}
+
+	if (gcmIS_SUCCESS(status))
+	{
+		/* Mark queue as empty. */
+		Event->queues[Id].tail = gcvNULL;
+	}
+
+	/* Resume interrupt */
+	gcmVERIFY_OK(gcoOS_ResumeInterrupt(Event->os));
+
+	/* Release the queue mutex. */
+	gcmVERIFY_OK(gcoOS_ReleaseMutex(Event->os, Event->mutexQueue));
+
+	/* Return the status. */
+	return status;
+}
+
+gceSTATUS
+gcoEVENT_TryToSetIdle(
+	IN gcoEVENT Event
+	);
+
+gceSTATUS
+gcoEVENT_Commit(
+	IN gcoEVENT Event,
+	IN gcsQUEUE_PTR Queue
+	)
+{
+	gctUINT8 id = ~0;
+	gceSTATUS status;
+	gctSIZE_T bytes;
+	gctPOINTER buffer = gcvNULL;
+    gctBOOL newCommand;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Event, gcvOBJ_EVENT);
+
+	/* Don't do antyhing if there is nothing to commit. */
+	if (Queue == gcvNULL)
+	{
+		/* Try to set idle */
+		gcmVERIFY_OK(gcoEVENT_TryToSetIdle(Event));
+
+		return gcvSTATUS_OK;
+	}
+
+	do
+	{
+		/* Get event ID. */
+		gcmERR_BREAK(_GetEvent(Event, gcvTRUE, "Commit", &id));
+
+		/* Loop while there are records in the queue. */
+        newCommand = gcvFALSE;
+
+		while (Queue != gcvNULL && !newCommand)
+		{
+			gcsQUEUE_PTR record, next;
+
+			/* Map record into kernel memory. */
+			gcmERR_BREAK(gcoOS_MapUserPointer(Event->os,
+											  Queue,
+											  gcmSIZEOF(gcsQUEUE),
+											  (gctPOINTER *) &record));
+
+			/* Append event record to event queue. */
+			gcmERR_BREAK(gcoEVENT_Append(Event, id, &record->interface));
+
+            if (record->next != gcvNULL)
+            {
+                switch (record->interface.command)
+                {
+                case gcvHAL_UNLOCK_VIDEO_MEMORY:
+                    if (record->interface.u.UnlockVideoMemory.node->VidMem.memory->object.type != gcvOBJ_VIDMEM)
+                    {
+                        newCommand = gcvTRUE;
+                    }
+                    break;
+
+                case gcvHAL_FREE_VIDEO_MEMORY:
+                    if (record->interface.u.FreeVideoMemory.node->VidMem.memory->object.type != gcvOBJ_VIDMEM)
+                    {
+                        newCommand = gcvTRUE;
+                    }
+                    break;
+
+				default:
+					break;
+                }
+            }
+
+			/* Next record in the queue. */
+			next = record->next;
+
+			/* Unmap record from kernel memory. */
+			gcmERR_BREAK(gcoOS_UnmapUserPointer(Event->os,
+												Queue,
+												gcmSIZEOF(gcsQUEUE),
+												(gctPOINTER *) record));
+			Queue = next;
+		}
+
+        if (gcmIS_ERROR(status)) break;
+
+#if gcdNULL_DRIVER == 2
+		/* Call gcoEVENT_Interrupt and gcoEVENT_Notify directly if gcdNULL_DRIVER == 2 */
+		gcmERR_BREAK(gcoEVENT_Interrupt(Event, 1 << id));
+
+		gcmERR_BREAK(gcoEVENT_Notify(Event, 0));
+#else
+		/* Get the size of the hardware event. */
+		gcmERR_BREAK(gcoHARDWARE_Event(Event->kernel->hardware,
+									   gcvNULL,
+									   id,
+									   gcvKERNEL_PIXEL,
+									   &bytes));
+
+		/* Reserve space in the command queue. */
+		gcmERR_BREAK(gcoCOMMAND_Reserve(Event->kernel->command,
+										bytes,
+										&buffer,
+										&bytes));
+
+		/* Set the hardware event in the command queue. */
+		gcmERR_BREAK(gcoHARDWARE_Event(Event->kernel->hardware,
+									   buffer,
+									   id,
+									   gcvKERNEL_PIXEL,
+									   &bytes));
+
+		/* Execute the hardware event. */
+		gcmERR_BREAK(gcoCOMMAND_Execute(Event->kernel->command, bytes));
+#endif
+	}
+	while (Queue != gcvNULL);
+
+	if (gcmIS_ERROR(status) && (id != 0xFF))
+	{
+		/* Roll back. */
+		gcmVERIFY_OK(gcoEVENT_Clear(Event, id));
+
+		if (buffer != gcvNULL)
+		{
+			/* Release the command buffer. */
+			gcmVERIFY_OK(gcoCOMMAND_Release(Event->kernel->command));
+		}
+	}
+
+	/* Return the status. */
+	return status;
+}
+
+gceSTATUS
+gcoEVENT_Interrupt(
+	IN gcoEVENT Event,
+	IN gctUINT32 Data
+	)
+{
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Event, gcvOBJ_EVENT);
+
+	/* Loop while there are interrupts to handle. */
+	while (Data != 0)
+	{
+		gctINT i;
+		gctUINT32 mask, savedMask = 0;
+		gcsEVENT_QUEUE * queue = gcvNULL;
+
+		/* Find the interrupt with the smallest time stamp. */
+		for (i = 0, mask = 0x1; i < 32; ++i, mask <<= 1)
+		{
+			if ((Data & ~(mask - 1)) == 0)
+			{
+				break;
+			}
+
+			if ((Data & mask)
+			&&  (  (queue == gcvNULL)
+				|| (Event->queues[i].stamp < queue->stamp)
+				)
+			)
+			{
+				queue     = &Event->queues[i];
+				savedMask = mask;
+			}
+		}
+
+		/* Make sure we have a valid interrupt. */
+		gcmASSERT((queue != gcvNULL) && (queue->head != gcvNULL));
+
+		if (queue->head != gcvNULL)
+		{
+			if (Event->head == gcvNULL)
+			{
+				/* Chain empty - set it to the interrupted event chain. */
+				Event->head = queue->head;
+				Event->tail = queue->tail;
+			}
+			else
+			{
+				/* Chain used - append interrupted chain. */
+				gcmASSERT(Event->tail != gcvNULL);
+				Event->tail->next = queue->head;
+				Event->tail = queue->tail;
+			}
+		}
+
+		/* Remove event from interrupts. */
+		queue->head = gcvNULL;
+		Data       &= ~savedMask;
+	}
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+gceSTATUS
+gcoEVENT_Notify(
+	IN gcoEVENT Event,
+	IN gctUINT32 IDs
+	)
+{
+	gceSTATUS status = gcvSTATUS_OK;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Event, gcvOBJ_EVENT);
+
+	/* Suspend interrupt */
+	gcmVERIFY_OK(gcoOS_SuspendInterrupt(Event->os));
+
+	/* Loop while there are events to be handled. */
+	while (Event->head != gcvNULL)
+	{
+		gcsEVENT_PTR event;
+		gctPOINTER logical;
+
+		/* Unlink head from chain. */
+		event = Event->head;
+		Event->head = Event->head->next;
+		if (Event->head == gcvNULL) Event->tail = gcvNULL;
+
+		/* Resume interrupt */
+		gcmVERIFY_OK(gcoOS_ResumeInterrupt(Event->os));
+
+		/* Dispatch on event type. */
+		switch (event->event.command)
+		{
+		case gcvHAL_FREE_NON_PAGED_MEMORY:
+			/* Free non-paged memory. */
+			gcmERR_BREAK(gcoOS_FreeNonPagedMemory(
+				Event->os,
+				event->event.u.FreeNonPagedMemory.bytes,
+				event->event.u.FreeNonPagedMemory.physical,
+				event->event.u.FreeNonPagedMemory.logical));
+			break;
+
+		case gcvHAL_FREE_CONTIGUOUS_MEMORY:
+			/* Unmap the user memory. */
+			gcmERR_BREAK(gcoOS_FreeContiguous(
+				Event->os,
+				event->event.u.FreeContiguousMemory.physical,
+				event->event.u.FreeContiguousMemory.logical,
+				event->event.u.FreeContiguousMemory.bytes));
+			break;
+
+		case gcvHAL_FREE_VIDEO_MEMORY:
+			/* Free video memory. */
+			gcmERR_BREAK(gcoVIDMEM_Free(event->event.u.FreeVideoMemory.node));
+			break;
+
+		case gcvHAL_WRITE_DATA:
+			/* Convert physical into logical address. */
+			gcmERR_BREAK(gcoOS_MapPhysical(Event->os,
+										   gcmPTR2INT(event->event.u.WriteData.address),
+										   gcmPTR2INT(event->event.u.WriteData.kernelAddress),
+										   gcmSIZEOF(gctUINT32),
+										   &logical));
+
+			/* Write data. */
+			gcmERR_BREAK(gcoOS_WriteMemory(Event->os,
+										   logical,
+										   event->event.u.WriteData.data));
+
+			/* Unmap the physical memory. */
+			gcmERR_BREAK(gcoOS_UnmapPhysical(Event->os,
+    										 logical,
+											 gcmSIZEOF(gctUINT32)));
+			break;
+
+		case gcvHAL_UNLOCK_VIDEO_MEMORY:
+			/* Unlock. */
+			gcmERR_BREAK(gcoVIDMEM_Unlock(event->event.u.UnlockVideoMemory.node,
+										  event->event.u.UnlockVideoMemory.type,
+										  gcvNULL));
+			break;
+
+		case gcvHAL_SIGNAL:
+			/* Set signal. */
+			gcmERR_BREAK(
+				gcoOS_UserSignal(Event->os,
+								 event->event.u.Signal.signal,
+								 event->event.u.Signal.process));
+
+			gcmASSERT(event->event.u.Signal.auxSignal == gcvNULL);
+			break;
+
+		case gcvHAL_UNMAP_USER_MEMORY:
+			/* Unmap the user memory. */
+			status = gcoOS_UnmapUserMemory(Event->os,
+										   event->event.u.UnmapUserMemory.memory,
+										   event->event.u.UnmapUserMemory.size,
+										   event->event.u.UnmapUserMemory.info,
+										   event->event.u.UnmapUserMemory.address);
+			break;
+
+		case gcvHAL_SET_IDLE:
+			/* Grab the conmmand queue mutex. */
+			gcmVERIFY_OK(gcoOS_AcquireMutex(Event->os,
+											Event->kernel->command->mutexQueue,
+											gcvINFINITE));
+
+			/* Set idle if no new commitments */
+			if (Event->lastCommitStamp == Event->kernel->command->commitStamp)
+			{
+                if(Event->kernel->command->idle == gcvFALSE)
+                {
+    				Event->kernel->command->idle = gcvTRUE;
+    				gcmVERIFY_OK(gcoOS_NotifyIdle(Event->os, gcvTRUE));
+                }
+			}
+
+			/* Release the command queue mutex. */
+			gcmVERIFY_OK(gcoOS_ReleaseMutex(Event->os, Event->kernel->command->mutexQueue));
+
+			break;
+
+		default:
+			/* Invalid argument. */
+			gcmFATAL("gcoEVENT_Notify: Unknown event type: %d", event->event.command);
+			return gcvSTATUS_INVALID_ARGUMENT;
+		}
+
+		/* Make sure there are no errors generated. */
+		gcmASSERT(gcmNO_ERROR(status));
+
+		/* Free the event. */
+		gcmVERIFY_OK(gcoOS_Free(Event->os, event));
+
+		/* Suspend interrupt */
+		gcmVERIFY_OK(gcoOS_SuspendInterrupt(Event->os));
+	}
+
+	/* Resume interrupt */
+	gcmVERIFY_OK(gcoOS_ResumeInterrupt(Event->os));
+
+	/* Try to set idle */
+	gcmVERIFY_OK(gcoEVENT_TryToSetIdle(Event));
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+gceSTATUS
+gcoEVENT_TryToSetIdle(
+	IN gcoEVENT Event
+	)
+{
+	gctINT i;
+	gctBOOL setIdle;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Event, gcvOBJ_EVENT);
+
+	if (!Event->kernel->notifyIdle) return gcvSTATUS_OK;
+
+	/* Initialize the flag */
+	setIdle = gcvFALSE;
+
+	/* Grab the queue mutex. */
+	gcmVERIFY_OK(gcoOS_AcquireMutex(Event->os,
+									Event->mutexQueue,
+									gcvINFINITE));
+
+	/* Suspend interrupt */
+	gcmVERIFY_OK(gcoOS_SuspendInterrupt(Event->os));
+
+	if (Event->lastCommitStamp != Event->kernel->command->commitStamp)
+	{
+		setIdle = gcvTRUE;
+
+		/* Check if no pending events */
+		for (i = 0; i < gcmCOUNTOF(Event->queues); ++i)
+		{
+			if (Event->queues[i].head != gcvNULL)
+			{
+				setIdle = gcvFALSE;
+				break;
+			}
+		}
+	}
+
+	/* Resume interrupt */
+	gcmVERIFY_OK(gcoOS_ResumeInterrupt(Event->os));
+
+	/* Release the queue mutex. */
+	gcmVERIFY_OK(gcoOS_ReleaseMutex(Event->os, Event->mutexQueue));
+
+	/* Issue an event to set idle if necessary */
+	if (setIdle)
+	{
+		gctSIZE_T requested, bytes;
+		gctUINT8 * buffer;
+		gctSIZE_T bufferSize;
+
+		/* Get the size of the EVENT command. */
+		gcmVERIFY_OK(gcoHARDWARE_Event(Event->kernel->hardware,
+					   gcvNULL,
+					   0,
+					   gcvKERNEL_PIXEL,
+					   &requested));
+
+		/* Reserve space in the command queue. */
+		gcmVERIFY_OK(gcoCOMMAND_Reserve(Event->kernel->command,
+						requested,
+						(gctPOINTER *) &buffer,
+						&bufferSize));
+
+		/* Append the EVENT command to write data into the boolean. */
+		bytes = bufferSize;
+		gcmVERIFY_OK(gcoEVENT_SetIdle(Event,
+									buffer,
+									&bytes,
+									gcvKERNEL_PIXEL,
+									gcvTRUE));
+
+		Event->lastCommitStamp = Event->kernel->command->commitStamp + 1;
+
+		/* Append the reserved commands to the command queue. */
+		gcmVERIFY_OK(gcoCOMMAND_Execute(Event->kernel->command, requested));
+	}
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+#endif /* USE_EVENT_QUEUE */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/VidMem.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/VidMem.c
@@ -0,0 +1,1585 @@
+/****************************************************************************
+*
+*    Copyright (C) 2002 - 2008 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public Lisence as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+
+
+#include "PreComp.h"
+
+/******************************************************************************\
+******************************* Private Functions ******************************
+\******************************************************************************/
+
+/*******************************************************************************
+**
+**	_Split
+**
+**	Split a node on the required byte boundary.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gcuVIDMEM_NODE_PTR Node
+**			Pointer to the node to split.
+**
+**		gctSIZE_T Bytes
+**			Number of bytes to keep in the node.
+**
+**	OUTPUT:
+**
+**		Nothing.
+**
+**	RETURNS:
+**
+**		gctBOOL
+**			gcvTRUE if the node was split successfully, or gcvFALSE if there is an
+**			error.
+**
+*/
+static gctBOOL
+_Split(
+	IN gcoOS Os,
+	IN gcuVIDMEM_NODE_PTR Node,
+	IN gctSIZE_T Bytes
+	)
+{
+	gcuVIDMEM_NODE_PTR node;
+	gceSTATUS status;
+
+	/* Make sure the byte boundary makes sense. */
+	if ((Bytes <= 0) || (Bytes > Node->VidMem.bytes))
+	{
+		return gcvFALSE;
+	}
+
+	/* Allocate a new gcuVIDMEM_NODE object. */
+	status = gcoOS_Allocate(Os,
+							gcmSIZEOF(gcuVIDMEM_NODE),
+							(gctPOINTER *) &node);
+
+	if (gcmIS_ERROR(status))
+	{
+		/* Error. */
+		return gcvFALSE;
+	}
+
+	/* Initialize gcuVIDMEM_NODE structure. */
+	node->VidMem.address   = Node->VidMem.address + Bytes;
+	node->VidMem.bytes     = Node->VidMem.bytes   - Bytes;
+	node->VidMem.alignment = 0;
+	node->VidMem.locked    = 0;
+
+	/* Insert node behind specified node. */
+	node->VidMem.next = Node->VidMem.next;
+	node->VidMem.prev = Node;
+	Node->VidMem.next = node->VidMem.next->VidMem.prev = node;
+
+	/* Insert free node behind specified node. */
+	node->VidMem.nextFree = Node->VidMem.nextFree;
+	node->VidMem.prevFree = Node;
+	Node->VidMem.nextFree = node->VidMem.nextFree->VidMem.prevFree = node;
+
+	/* Adjust size of specified node. */
+	Node->VidMem.bytes = Bytes;
+
+	/* Success. */
+	return gcvTRUE;
+}
+
+/*******************************************************************************
+**
+**	_Merge
+**
+**	Merge two adjacent nodes together.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gcuVIDMEM_NODE_PTR Node
+**			Pointer to the first of the two nodes to merge.
+**
+**	OUTPUT:
+**
+**		Nothing.
+**
+*/
+static gceSTATUS
+_Merge(
+	IN gcoOS Os,
+	IN gcuVIDMEM_NODE_PTR Node
+	)
+{
+	gcuVIDMEM_NODE_PTR node;
+
+	/* Save pointer to next node. */
+	node = Node->VidMem.next;
+
+	/* This is a good time to make sure the heap is not corrupted. */
+	if (Node->VidMem.address + Node->VidMem.bytes != node->VidMem.address)
+	{
+		/* Corrupted heap. */
+		gcmASSERT(
+			Node->VidMem.address + Node->VidMem.bytes == node->VidMem.address);
+		return gcvSTATUS_HEAP_CORRUPTED;
+	}
+
+	/* Adjust byte count. */
+	Node->VidMem.bytes += node->VidMem.bytes;
+
+	/* Unlink next node from linked list. */
+	Node->VidMem.next     = node->VidMem.next;
+	Node->VidMem.nextFree = node->VidMem.nextFree;
+
+	Node->VidMem.next->VidMem.prev         =
+	Node->VidMem.nextFree->VidMem.prevFree = Node;
+
+	/* Free next node. */
+	return gcoOS_Free(Os, node);
+}
+
+/******************************************************************************\
+******************************* gcoVIDMEM API Code ******************************
+\******************************************************************************/
+
+/*******************************************************************************
+**
+**	gcoVIDMEM_ConstructVirtual
+**
+**	Construct a new gcuVIDMEM_NODE union for virtual memory.
+**
+**	INPUT:
+**
+**		gcoKERNEL Kernel
+**			Pointer to an gcoKERNEL object.
+**
+**		gctSIZE_T Bytes
+**			Number of byte to allocate.
+**
+**	OUTPUT:
+**
+**		gcuVIDMEM_NODE_PTR * Node
+**			Pointer to a variable that receives the gcuVIDMEM_NODE union pointer.
+*/
+gceSTATUS
+gcoVIDMEM_ConstructVirtual(
+	IN gcoKERNEL Kernel,
+	IN gctSIZE_T Bytes,
+	OUT gcuVIDMEM_NODE_PTR * Node
+	)
+{
+	gcoOS os;
+	gceSTATUS status;
+	gcuVIDMEM_NODE_PTR node;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Kernel, gcvOBJ_KERNEL);
+	gcmVERIFY_ARGUMENT(Bytes > 0);
+	gcmVERIFY_ARGUMENT(Node != gcvNULL);
+
+	/* Extract the gcoOS object pointer. */
+	os = Kernel->os;
+	gcmVERIFY_OBJECT(os, gcvOBJ_OS);
+
+	/* Allocate an gcuVIDMEM_NODE union. */
+	status = gcoOS_Allocate(os,
+							gcmSIZEOF(gcuVIDMEM_NODE),
+							(gctPOINTER *) &node);
+
+	if (gcmIS_ERROR(status))
+	{
+		/* Error. */
+		return status;
+	}
+
+	/* Initialize gcuVIDMEM_NODE union for virtual memory. */
+	node->Virtual.kernel    = Kernel;
+	node->Virtual.locked    = 0;
+	node->Virtual.logical   = gcvNULL;
+	node->Virtual.pageTable = gcvNULL;
+	node->Virtual.pending   = gcvFALSE;
+
+	/* Create the mutex. */
+	status = gcoOS_CreateMutex(os, &node->Virtual.mutex);
+
+	if (gcmIS_ERROR(status))
+	{
+		/* Roll back. */
+		gcmVERIFY_OK(gcoOS_Free(os, node));
+
+		/* Error. */
+		return status;
+	}
+
+	/* Allocate the virtual memory. */
+	status = gcoOS_AllocatePagedMemory(os,
+									  node->Virtual.bytes = Bytes,
+									  &node->Virtual.physical);
+
+	if (gcmIS_ERROR(status))
+	{
+		/* Roll back. */
+		gcmVERIFY_OK(gcoOS_DeleteMutex(os, node->Virtual.mutex));
+		gcmVERIFY_OK(gcoOS_Free(os, node));
+
+		/* Error. */
+		return status;
+	}
+
+	/* Return pointer to the gcuVIDMEM_NODE union. */
+	*Node = node;
+
+	gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_VIDMEM,
+				  "Created virtual node %p for %u bytes @ %p",
+				  node,
+				  Bytes,
+				  node->Virtual.physical);
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoVIDMEM_DestroyVirtual
+**
+**	Destroy an gcuVIDMEM_NODE union for virtual memory.
+**
+**	INPUT:
+**
+**		gcuVIDMEM_NODE_PTR Node
+**			Pointer to a gcuVIDMEM_NODE union.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcoVIDMEM_DestroyVirtual(
+	IN gcuVIDMEM_NODE_PTR Node
+	)
+{
+	gcoOS os;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Node->Virtual.kernel, gcvOBJ_KERNEL);
+
+	/* Extact the gcoOS object pointer. */
+	os = Node->Virtual.kernel->os;
+	gcmVERIFY_OBJECT(os, gcvOBJ_OS);
+
+	gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_VIDMEM,
+				  "Destroying virtual node: %p",
+				  Node);
+
+	/* Delete the mutex. */
+	gcmVERIFY_OK(gcoOS_DeleteMutex(os, Node->Virtual.mutex));
+
+	if (Node->Virtual.pageTable != gcvNULL)
+	{
+		/* Free the pages. */
+		gcmVERIFY_OK(gcoMMU_FreePages(Node->Virtual.kernel->mmu,
+									  Node->Virtual.pageTable,
+									  Node->Virtual.pageCount));
+
+		gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_VIDMEM,
+					  "Unmapped virtual memory 0x%08X",
+					  Node->Virtual.address);
+	}
+
+	/* Delete the gcuVIDMEM_NODE union. */
+	gcmVERIFY_OK(gcoOS_Free(os, Node));
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoVIDMEM_Construct
+**
+**	Construct a new gcoVIDMEM object.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctUINT32 BaseAddress
+**			Base address for te video memory heap.
+**
+**		gctSIZE_T Bytes
+**			Number of bytes ni the video memory heap.
+**
+**		gctSIZE_T Threshold
+**			Minimum number of bytes beyond am allocation before the node is
+**			split.  Can be used as a minimum alignment requirement.
+**
+**		gctSIZE_T BankSize
+**			Number of bytes per physical memory bank.  Used by bank
+**			optimization.
+**
+**	OUTPUT:
+**
+**		gcoVIDMEM * Memory
+**			Pointer to a variable that will hold the pointer to the gcoVIDMEM
+**			object.
+*/
+gceSTATUS
+gcoVIDMEM_Construct(
+	IN gcoOS Os,
+	IN gctUINT32 BaseAddress,
+	IN gctSIZE_T Bytes,
+	IN gctSIZE_T Threshold,
+	IN gctSIZE_T BankSize,
+	OUT gcoVIDMEM * Memory
+	)
+{
+	gcoVIDMEM memory = gcvNULL;
+	gceSTATUS status;
+	gcuVIDMEM_NODE_PTR node;
+	gctINT i, banks = 0;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmVERIFY_ARGUMENT(Bytes > 0);
+	gcmVERIFY_ARGUMENT(Memory != gcvNULL);
+
+	do
+	{
+		/* Allocate the gcoVIDMEM object. */
+		gcmERR_BREAK(gcoOS_Allocate(Os,
+									gcmSIZEOF(struct _gcoVIDMEM),
+									(gctPOINTER *) &memory));
+
+		/* Initialize the gcoVIDMEM object. */
+		memory->object.type = gcvOBJ_VIDMEM;
+		memory->os          = Os;
+
+#if MRVL_TAVOR_PV2_PATCH
+        BaseAddress = BaseAddress & 0x7fffffff;
+#endif 
+
+		/* Set video memory heap information. */
+		memory->baseAddress = BaseAddress;
+		memory->bytes       = memory->freeBytes = Bytes;
+		memory->threshold   = Threshold;
+		memory->mutex       = gcvNULL;
+
+		/* Walk all possible banks. */
+		for (i = 0; i < gcmCOUNTOF(memory->sentinel); ++i)
+		{
+			gctSIZE_T bytes;
+
+			if (BankSize == 0)
+			{
+				/* Use all bytes for the first bank. */
+				bytes = Bytes;
+			}
+			else
+			{
+				/* Compute number of bytes for this bank. */
+				bytes = gcmALIGN(BaseAddress + 1, BankSize) - BaseAddress;
+
+				if (bytes > Bytes)
+				{
+					/* Make sure we don't exceed the total number of bytes. */
+					bytes = Bytes;
+				}
+			}
+
+			if (bytes == 0)
+			{
+				/* Mark heap is not used. */
+				memory->sentinel[i].VidMem.next     =
+				memory->sentinel[i].VidMem.prev     =
+				memory->sentinel[i].VidMem.nextFree =
+				memory->sentinel[i].VidMem.prevFree = gcvNULL;
+				continue;
+			}
+
+			/* Allocate one gcuVIDMEM_NODE union. */
+			gcmERR_BREAK(gcoOS_Allocate(Os,
+										gcmSIZEOF(gcuVIDMEM_NODE),
+										(gctPOINTER *) &node));
+
+			/* Initialize gcuVIDMEM_NODE union. */
+			node->VidMem.memory    = memory;
+
+			node->VidMem.next      =
+			node->VidMem.prev      =
+			node->VidMem.nextFree  =
+			node->VidMem.prevFree  = &memory->sentinel[i];
+
+			node->VidMem.address   = BaseAddress;
+			node->VidMem.bytes     = bytes;
+			node->VidMem.alignment = 0;
+
+			node->VidMem.locked    = 0;
+
+			/* Initialize the linked list of nodes. */
+			memory->sentinel[i].VidMem.next     =
+			memory->sentinel[i].VidMem.prev     =
+			memory->sentinel[i].VidMem.nextFree =
+			memory->sentinel[i].VidMem.prevFree = node;
+
+			/* Mark sentinel. */
+			memory->sentinel[i].VidMem.bytes = 0;
+
+			/* Adjust address for next bank. */
+			BaseAddress += bytes;
+			Bytes       -= bytes;
+			banks       ++;
+		}
+
+		/* Break on error.  */
+		gcmERR_BREAK(status);
+
+		/* Assign all the bank mappings. */
+		memory->mapping[gcvSURF_RENDER_TARGET] = banks - 1;
+		memory->mapping[gcvSURF_BITMAP] = banks - 1;
+		if (banks > 1) --banks;
+		memory->mapping[gcvSURF_DEPTH] = banks - 1;
+		memory->mapping[gcvSURF_HIERARCHICAL_DEPTH] = banks - 1;
+		if (banks > 1) --banks;
+		memory->mapping[gcvSURF_TEXTURE] = banks - 1;
+		if (banks > 1) --banks;
+		memory->mapping[gcvSURF_VERTEX] = banks - 1;
+		if (banks > 1) --banks;
+		memory->mapping[gcvSURF_INDEX] = banks - 1;
+		if (banks > 1) --banks;
+		memory->mapping[gcvSURF_TILE_STATUS] = banks - 1;
+		if (banks > 1) --banks;
+		memory->mapping[gcvSURF_TYPE_UNKNOWN] = 0;
+
+		gcmTRACE_ZONE(gcvZONE_DRIVER, gcvLEVEL_INFO,
+		    	      "[GALCORE] INDEX:         bank %d\n",
+			      memory->mapping[gcvSURF_INDEX]);
+		gcmTRACE_ZONE(gcvZONE_DRIVER, gcvLEVEL_INFO,
+		    	      "[GALCORE] VERTEX:        bank %d\n",
+			      memory->mapping[gcvSURF_VERTEX]);
+		gcmTRACE_ZONE(gcvZONE_DRIVER, gcvLEVEL_INFO,
+		    	      "[GALCORE] TEXTURE:       bank %d\n",
+			      memory->mapping[gcvSURF_TEXTURE]);
+		gcmTRACE_ZONE(gcvZONE_DRIVER, gcvLEVEL_INFO,
+		    	      "[GALCORE] RENDER_TARGET: bank %d\n",
+			      memory->mapping[gcvSURF_RENDER_TARGET]);
+		gcmTRACE_ZONE(gcvZONE_DRIVER, gcvLEVEL_INFO,
+		    	      "[GALCORE] DEPTH:         bank %d\n",
+			      memory->mapping[gcvSURF_DEPTH]);
+		gcmTRACE_ZONE(gcvZONE_DRIVER, gcvLEVEL_INFO,
+		    	      "[GALCORE] TILE_STATUS:   bank %d\n",
+			      memory->mapping[gcvSURF_TILE_STATUS]);
+
+	    /* Allocate the mutex. */
+		gcmERR_BREAK(gcoOS_CreateMutex(Os, &memory->mutex));
+
+		/* Return pointer to the gcoVIDMEM object. */
+		*Memory = memory;
+
+		/* Success. */
+		return gcvSTATUS_OK;
+	}
+	while (gcvFALSE);
+
+	/* Error - roll back everything we just did. */
+	if (memory != gcvNULL)
+	{
+		if (memory->mutex != gcvNULL)
+		{
+			/* Delete the mutex. */
+			gcmVERIFY_OK(gcoOS_DeleteMutex(Os, memory->mutex));
+		}
+
+		for (i = 0; i < banks; ++i)
+		{
+			/* Free the heap. */
+			gcmASSERT(memory->sentinel[i].VidMem.next != gcvNULL);
+			gcmVERIFY_OK(gcoOS_Free(Os, memory->sentinel[i].VidMem.next));
+		}
+
+		/* Free the object. */
+		gcoOS_Free(Os, memory);
+	}
+
+	/* Return the status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gcoVIDMEM_Destroy
+**
+**	Destroy an gcoVIDMEM object.
+**
+**	INPUT:
+**
+**		gcoVIDMEM Memory
+**			Pointer to an gcoVIDMEM object to destroy.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gcoVIDMEM_Destroy(
+	IN gcoVIDMEM Memory
+	)
+{
+	gcuVIDMEM_NODE_PTR node, next;
+	gceSTATUS status;
+	gctINT i;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Memory, gcvOBJ_VIDMEM);
+
+	/* Walk all sentinels. */
+	for (i = 0; i < gcmCOUNTOF(Memory->sentinel); ++i)
+	{
+		/* Bail out of the heap is not used. */
+		if (Memory->sentinel[i].VidMem.next == gcvNULL)
+		{
+			break;
+		}
+
+		/* Walk all the nodes until we reach the sentinel. */
+		for (node = Memory->sentinel[i].VidMem.next;
+			 node->VidMem.bytes != 0;
+			 node = next)
+		{
+			/* Save pointer to the next node. */
+			next = node->VidMem.next;
+
+			/* Free the node. */
+			gcmVERIFY_OK(gcoOS_Free(Memory->os, node));
+		}
+	}
+
+    /* Free the mutex. */
+    gcmVERIFY_OK(gcoOS_DeleteMutex(Memory->os, Memory->mutex));
+
+	/* Mark the object as unknown. */
+	Memory->object.type = gcvOBJ_UNKNOWN;
+
+	/* Free the gcoVIDMEM object. */
+	status = gcoOS_Free(Memory->os, Memory);
+
+	/* Return status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gcoVIDMEM_Allocate
+**
+**	Allocate rectangular memory from the gcoVIDMEM object.
+**
+**	INPUT:
+**
+**		gcoVIDMEM Memory
+**			Pointer to an gcoVIDMEM object.
+**
+**		gctUINT Width
+**			Width of rectangle to allocate.  Make sure the width is properly
+**			aligned.
+**
+**		gctUINT Height
+**			Height of rectangle to allocate.  Make sure the height is properly
+**			aligned.
+**
+**		gctUINT Depth
+**			Depth of rectangle to allocate.  This equals to the number of
+**			rectangles to allocate contiguously (i.e., for cubic maps and volume
+**			textures).
+**
+**		gctUINT BytesPerPixel
+**			Number of bytes per pixel.
+**
+**		gctUINT32 Alignment
+**			Byte alignment for allocation.
+**
+**		gceSURF_TYPE Type
+**			Type of surface to allocate (use by bank optimization).
+**
+**	OUTPUT:
+**
+**		gcuVIDMEM_NODE_PTR * Node
+**			Pointer to a variable that will hold the allocated memory node.
+*/
+gceSTATUS
+gcoVIDMEM_Allocate(
+	IN gcoVIDMEM Memory,
+	IN gctUINT Width,
+	IN gctUINT Height,
+	IN gctUINT Depth,
+	IN gctUINT BytesPerPixel,
+	IN gctUINT32 Alignment,
+	IN gceSURF_TYPE Type,
+	OUT gcuVIDMEM_NODE_PTR * Node
+	)
+{
+	gctSIZE_T bytes;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Memory, gcvOBJ_VIDMEM);
+	gcmVERIFY_ARGUMENT(Width > 0);
+	gcmVERIFY_ARGUMENT(Height > 0);
+	gcmVERIFY_ARGUMENT(Depth > 0);
+	gcmVERIFY_ARGUMENT(BytesPerPixel > 0);
+	gcmVERIFY_ARGUMENT(Node != gcvNULL);
+
+	/* Compute linear size. */
+	bytes = Width * Height * Depth * BytesPerPixel;
+
+	/* Allocate through linear function. */
+	return gcoVIDMEM_AllocateLinear(Memory, bytes, Alignment, Type, Node);
+}
+
+static gcuVIDMEM_NODE_PTR
+_FindNode(
+	IN gcoVIDMEM Memory,
+	IN gctINT Bank,
+	IN gctSIZE_T Bytes,
+	IN OUT gctUINT32_PTR Alignment
+	)
+{
+	gcuVIDMEM_NODE_PTR node;
+	gctUINT32 alignment;
+
+	/* Walk all free nodes until we have one that is big enough or we have
+	   reached the sentinel. */
+	for (node = Memory->sentinel[Bank].VidMem.nextFree;
+		 node->VidMem.bytes != 0;
+		 node = node->VidMem.nextFree)
+	{
+		/* Compute number of bytes to skip for alignment. */
+		alignment = (*Alignment == 0)
+				  ? 0
+				  : (*Alignment - (node->VidMem.address % *Alignment));
+
+		if (alignment == *Alignment)
+		{
+			/* Node is already aligned. */
+			alignment = 0;
+		}
+
+		if (node->VidMem.bytes >= Bytes + alignment)
+		{
+			/* This node is big enough. */
+			*Alignment = alignment;
+			return node;
+		}
+	}
+
+	/* Not enough memory. */
+	return gcvNULL;
+}
+
+/*******************************************************************************
+**
+**	gcoVIDMEM_AllocateLinear
+**
+**	Allocate linear memory from the gcoVIDMEM object.
+**
+**	INPUT:
+**
+**		gcoVIDMEM Memory
+**			Pointer to an gcoVIDMEM object.
+**
+**		gctSIZE_T Bytes
+**			Number of bytes to allocate.
+**
+**		gctUINT32 Alignment
+**			Byte alignment for allocation.
+**
+**		gceSURF_TYPE Type
+**			Type of surface to allocate (use by bank optimization).
+**
+**	OUTPUT:
+**
+**		gcuVIDMEM_NODE_PTR * Node
+**			Pointer to a variable that will hold the allocated memory node.
+*/
+gceSTATUS
+gcoVIDMEM_AllocateLinear(
+	IN gcoVIDMEM Memory,
+	IN gctSIZE_T Bytes,
+	IN gctUINT32 Alignment,
+	IN gceSURF_TYPE Type,
+	OUT gcuVIDMEM_NODE_PTR * Node
+	)
+{
+    gceSTATUS status;
+	gcuVIDMEM_NODE_PTR node;
+	gctUINT32 alignment;
+	gctINT bank, i;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Memory, gcvOBJ_VIDMEM);
+	gcmVERIFY_ARGUMENT(Bytes > 0);
+	gcmVERIFY_ARGUMENT(Node != gcvNULL);
+
+	gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_VIDMEM,
+				  "gcoVIDMEM_AllocateLinear: Allocating %u bytes",
+				  Bytes);
+
+    /* Acquire the mutex. */
+    status = gcoOS_AcquireMutex(Memory->os, Memory->mutex, gcvINFINITE);
+
+    if (gcmIS_ERROR(status))
+    {
+        /* Error. */
+        return status;
+    }
+
+    do
+    {
+    	if (Bytes > Memory->freeBytes)
+	    {
+		    /* Not enough memory. */
+		    status = gcvSTATUS_OUT_OF_MEMORY;
+            break;
+    	}
+
+		/* Find the default bank for this surface type. */
+		gcmASSERT((gctINT) Type < gcmCOUNTOF(Memory->mapping));
+		bank      = Memory->mapping[Type];
+		alignment = Alignment;
+
+		/* Find a free node in the default bank. */
+		node = _FindNode(Memory, bank, Bytes, &alignment);
+
+		/* Out of memory? */
+		if (node == gcvNULL)
+		{
+			/* Walk all lower banks. */
+			for (i = bank - 1; i >= 0; --i)
+			{
+				/* Find a free node inside the current bank. */
+				node = _FindNode(Memory, i, Bytes, &alignment);
+				if (node != gcvNULL)
+				{
+					break;
+				}
+			}
+		}
+
+		if (node == gcvNULL)
+		{
+			/* Walk all upper banks. */
+			for (i = bank + 1; i < gcmCOUNTOF(Memory->sentinel); ++i)
+			{
+				if (Memory->sentinel[i].VidMem.nextFree == gcvNULL)
+				{
+					/* Abort when we reach unused banks. */
+					break;
+				}
+
+				/* Find a free node inside the current bank. */
+				node = _FindNode(Memory, i, Bytes, &alignment);
+				if (node != gcvNULL)
+				{
+					break;
+				}
+			}
+		}
+
+		if (node == gcvNULL)
+		{
+			/* Out of memory. */
+			status = gcvSTATUS_OUT_OF_MEMORY;
+			break;
+		}
+
+	    /* Do we have an alignment? */
+	    if (alignment > 0)
+	    {
+		    /* Split the node so it is aligned. */
+		    if (_Split(Memory->os, node, alignment))
+		    {
+			    /* Successful split, move to aligned node. */
+			    node = node->VidMem.next;
+
+				/* Remove alignment. */
+				alignment = 0;
+		    }
+	    }
+
+	    /* Do we have enough memory after the allocation to split it? */
+	    if (node->VidMem.bytes - Bytes > Memory->threshold)
+	    {
+		    /* Adjust the node size. */
+		    _Split(Memory->os, node, Bytes);
+	    }
+
+	    /* Remove the node from the free list. */
+	    node->VidMem.prevFree->VidMem.nextFree = node->VidMem.nextFree;
+	    node->VidMem.nextFree->VidMem.prevFree = node->VidMem.prevFree;
+	    node->VidMem.nextFree                  =
+		node->VidMem.prevFree                  = gcvNULL;
+
+	    /* Fill in the information. */
+	    node->VidMem.alignment = alignment;
+	    node->VidMem.memory    = Memory;
+
+	    /* Adjust the number of free bytes. */
+	    Memory->freeBytes -= node->VidMem.bytes;
+
+	    /* Return the pointer to the node. */
+    	*Node = node;
+
+    	/* Success. */
+	    status = gcvSTATUS_OK;
+
+		gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_VIDMEM,
+					  "gcoVIDMEM_AllocateLinear: Allocated %u bytes @ %p [0x%08X]",
+					  node->VidMem.bytes,
+					  node,
+					  node->VidMem.address);
+	}
+    while (gcvFALSE);
+
+	if (gcmIS_ERROR(status))
+	{
+		gcmTRACE_ZONE(gcvLEVEL_WARNING, gcvZONE_VIDMEM,
+					  "gcoVIDMEM_AllocateLinear: "
+					  "Heap %p has not enough bytse (%u) for %u bytes",
+					  Memory,
+					  Memory->freeBytes,
+					  Bytes);
+	}
+
+    /* Release the mutex. */
+    gcmVERIFY_OK(gcoOS_ReleaseMutex(Memory->os, Memory->mutex));
+
+    /* Return the status. */
+    return status;
+}
+
+/*******************************************************************************
+**
+**	gcoVIDMEM_Free
+**
+**	Free an allocated video memory node.
+**
+**	INPUT:
+**
+**		gcuVIDMEM_NODE_PTR Node
+**			Pointer to a gcuVIDMEM_NODE object.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcoVIDMEM_Free(
+	IN gcuVIDMEM_NODE_PTR Node
+	)
+{
+	gcoVIDMEM memory;
+	gcuVIDMEM_NODE_PTR node;
+	gceSTATUS status = gcvSTATUS_OK;
+
+	/* Verify the arguments. */
+	if ((Node == gcvNULL)
+	||  (Node->VidMem.memory == gcvNULL)
+	)
+	{
+		/* Invalid object. */
+		return gcvSTATUS_INVALID_OBJECT;
+	}
+
+	/**************************** Video Memory ********************************/
+
+	if (Node->VidMem.memory->object.type == gcvOBJ_VIDMEM)
+	{
+		gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_VIDMEM,
+					  "gcoVIDMEM_Free: Freeing node %p",
+					  Node);
+
+		if (Node->VidMem.locked > 0)
+		{
+			gcmTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_VIDMEM,
+						  "gcoVIDMEM_Free: Node %p is locked (%d)",
+						  Node,
+						  Node->VidMem.locked);
+
+			/* Node is locked. */
+			return gcvSTATUS_MEMORY_LOCKED;
+		}
+
+		/* Extract pointer to gcoVIDMEM object owning the node. */
+		memory = Node->VidMem.memory;
+
+		/* Acquire the mutex. */
+		status = gcoOS_AcquireMutex(memory->os, memory->mutex, gcvINFINITE);
+
+		if (gcmIS_ERROR(status))
+		{
+		    /* Error. */
+		    return status;
+		}
+
+		do
+		{
+		    /* Update the number of free bytes. */
+		    memory->freeBytes += Node->VidMem.bytes;
+
+		    /* Find the next free node. */
+		    for (node = Node->VidMem.next;
+				 node->VidMem.nextFree == gcvNULL;
+		    	 node = node->VidMem.next) ;
+
+		    /* Insert this node in the free list. */
+		    Node->VidMem.nextFree = node;
+		    Node->VidMem.prevFree = node->VidMem.prevFree;
+
+		    Node->VidMem.prevFree->VidMem.nextFree =
+		    node->VidMem.prevFree                  = Node;
+
+		    /* Is the next node a free node and not the sentinel? */
+		    if ((Node->VidMem.next == Node->VidMem.nextFree)
+			&&  (Node->VidMem.next->VidMem.bytes != 0)
+			)
+		    {
+		        /* Merge this node with the next node. */
+		        status = _Merge(memory->os, node = Node);
+		        gcmASSERT(node->VidMem.nextFree != node);
+		        gcmASSERT(node->VidMem.prevFree != node);
+
+		        if (status != gcvSTATUS_OK)
+		        {
+			        /* Error. */
+			        break;
+		        }
+		    }
+
+		    /* Is the previous node a free node and not the sentinel? */
+		    if ((Node->VidMem.prev == Node->VidMem.prevFree)
+			&&  (Node->VidMem.prev->VidMem.bytes != 0)
+			)
+		    {
+		        /* Merge this node with the previous node. */
+		        status = _Merge(memory->os, node = Node->VidMem.prev);
+		        gcmASSERT(node->VidMem.nextFree != node);
+		        gcmASSERT(node->VidMem.prevFree != node);
+
+		        if (status != gcvSTATUS_OK)
+		        {
+			        /* Error. */
+			        break;
+		        }
+		    }
+
+		    /* Success. */
+		    status = gcvSTATUS_OK;
+		}
+		while (gcvFALSE);
+
+		/* Release the mutex. */
+		gcmVERIFY_OK(gcoOS_ReleaseMutex(memory->os, memory->mutex));
+	}
+
+	/*************************** Virtual Memory *******************************/
+
+	else
+	{
+		gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_VIDMEM,
+					  "gcoVIDMEM_Free: Freeing virtual node %p",
+					  Node);
+
+		/* Verify the gcoKERNEL object pointer. */
+		gcmVERIFY_OBJECT(Node->Virtual.kernel, gcvOBJ_KERNEL);
+
+		if (!Node->Virtual.pending && Node->Virtual.locked > 0)
+		{
+			gcmTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_VIDMEM,
+						  "gcoVIDMEM_Free: Virtual node %p is locked (%d)",
+						  Node,
+						  Node->Virtual.locked);
+
+			/* Node is locked. */
+			return gcvSTATUS_MEMORY_LOCKED;
+		}
+
+		if (Node->Virtual.pending)
+		{
+			gctBOOL acquired;
+
+			gcmASSERT(Node->Virtual.locked == 1);
+
+			gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_VIDMEM,
+						  "gcoVIDMEM_Free: Scheduling node %p to be freed later",
+						  Node);
+
+			/* Schedule the node to be freed. */
+			do
+			{
+				gctSIZE_T bufferSize, requested;
+				gctPOINTER buffer;
+
+				/* Command queue not yet acquired. */
+				acquired = gcvFALSE;
+
+				/* Get size of event.  */
+				gcmERR_BREAK(gcoHARDWARE_Event(Node->Virtual.kernel->hardware,
+											   gcvNULL,
+											   0,
+											   gcvKERNEL_PIXEL,
+											   &requested));
+
+				/* Reserve space in the command queue. */
+				gcmERR_BREAK(gcoCOMMAND_Reserve(Node->Virtual.kernel->command,
+												requested,
+												&buffer,
+												&bufferSize));
+
+				/* Command queue is acquired. */
+				acquired = gcvTRUE;
+
+				/* Schedule the video memory to be freed again. */
+				gcmERR_BREAK(
+					gcoEVENT_FreeVideoMemory(Node->Virtual.kernel->event,
+											 buffer,
+											 &bufferSize,
+											 Node,
+											 gcvKERNEL_PIXEL,
+											 gcvTRUE));
+
+				/* Execute the command queue. */
+				gcmERR_BREAK(gcoCOMMAND_Execute(Node->Virtual.kernel->command,
+												requested));
+			}
+			while (gcvFALSE);
+
+			if (gcmIS_ERROR(status) && acquired)
+			{
+				/* Release the command queue if acquired and there was an     *\
+				\* error.                                                     */
+				gcmVERIFY_OK(gcoCOMMAND_Release(Node->Virtual.kernel->command));
+			}
+		}
+		else
+		{
+			/* Free the virtual memory. */
+			gcmVERIFY_OK(gcoOS_FreePagedMemory(Node->Virtual.kernel->os,
+											   Node->Virtual.physical,
+											   Node->Virtual.bytes));
+
+			/* Destroy the gcuVIDMEM_NODE union. */
+			gcmVERIFY_OK(gcoVIDMEM_DestroyVirtual(Node));
+		}
+	}
+
+	/* Return the status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gcoVIDMEM_Lock
+**
+**	Lock a video memory node and return it's hardware specific address.
+**
+**	INPUT:
+**
+**		gcuVIDMEM_NODE_PTR Node
+**			Pointer to a gcuVIDMEM_NODE union.
+**
+**	OUTPUT:
+**
+**		gctUINT32 * Address
+**			Pointer to avraibale that will hold the hardware spefific address.
+*/
+gceSTATUS
+gcoVIDMEM_Lock(
+	IN gcuVIDMEM_NODE_PTR Node,
+	OUT gctUINT32 * Address
+	)
+{
+	gceSTATUS status;
+
+	/* Verify the arguments. */
+	gcmVERIFY_ARGUMENT(Address != gcvNULL);
+
+	if ((Node == gcvNULL)
+	||  (Node->VidMem.memory == gcvNULL)
+	)
+	{
+		/* Invalid object. */
+		return gcvSTATUS_INVALID_OBJECT;
+	}
+
+	/**************************** Video Memory ********************************/
+
+	if (Node->VidMem.memory->object.type == gcvOBJ_VIDMEM)
+	{
+		/* Increment the lock count. */
+		Node->VidMem.locked ++;
+
+		/* Return the address of the node. */
+		*Address = Node->VidMem.address + Node->VidMem.alignment;
+
+		gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_VIDMEM,
+					  "gcoVIDMEM_Lock: Locked node %p (%d) @ 0x%08X",
+					  Node,
+					  Node->VidMem.locked,
+					  *Address);
+	}
+
+	/*************************** Virtual Memory *******************************/
+
+	else
+	{
+		gcoOS os;
+
+		/* Verify the gcoKERNEL object pointer. */
+		gcmVERIFY_OBJECT(Node->Virtual.kernel, gcvOBJ_KERNEL);
+
+		/* Extract the gcoOS object pointer. */
+		os = Node->Virtual.kernel->os;
+		gcmVERIFY_OBJECT(os, gcvOBJ_OS);
+
+		/* Grab the mutex. */
+		status = gcoOS_AcquireMutex(os, Node->Virtual.mutex, gcvINFINITE);
+
+		if (gcmIS_ERROR(status))
+		{
+			/* Error. */
+			return status;
+		}
+
+		do
+		{
+			gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_VIDMEM,
+						  "gcoVIDMEM_Lock: Locking virtual node %p (%d) @ 0x%08X",
+						  Node,
+						  Node->Virtual.locked);
+
+			/* Increment the lock count. */
+			if (Node->Virtual.locked ++ == 0)
+			{
+				/* Is this node pending for a final unlock? */
+				if (Node->Virtual.pending)
+				{
+					/* Make sure we have a page table. */
+					gcmASSERT(Node->Virtual.pageTable != gcvNULL);
+
+					/* Remove pending unlock. */
+					Node->Virtual.pending = gcvFALSE;
+
+					/* Success. */
+					status = gcvSTATUS_OK;
+					break;
+				}
+
+				/* First lock - create a page table. */
+				gcmASSERT(Node->Virtual.pageTable == gcvNULL);
+
+				/* Make sure we mark our node as not flushed. */
+				Node->Virtual.pending = gcvFALSE;
+
+				/* Lock the allocated pages. */
+				status = gcoOS_LockPages(os,
+									     Node->Virtual.physical,
+									     Node->Virtual.bytes,
+									     &Node->Virtual.logical,
+									     &Node->Virtual.pageCount);
+
+				if (gcmIS_ERROR(status))
+				{
+					/* Error. */
+					break;
+				}
+
+				/* Allocate pages inside the MMU. */
+				status = gcoMMU_AllocatePages(Node->Virtual.kernel->mmu,
+											  Node->Virtual.pageCount,
+											  &Node->Virtual.pageTable,
+											  &Node->Virtual.address);
+
+				if (gcmIS_ERROR(status))
+				{
+					/* Roll back. */
+					gcmVERIFY_OK(gcoOS_UnlockPages(os,
+												   Node->Virtual.physical,
+												   Node->Virtual.bytes,
+												   Node->Virtual.logical));
+
+					/* Error. */
+					break;
+				}
+
+				/* Map the pages. */
+				status = gcoOS_MapPages(os,
+										Node->Virtual.physical,
+									    Node->Virtual.pageCount,
+									    Node->Virtual.pageTable);
+
+				if (gcmIS_ERROR(status))
+				{
+					/* Roll back. */
+					gcmVERIFY_OK(gcoMMU_FreePages(Node->Virtual.kernel->mmu,
+												  Node->Virtual.pageTable,
+												  Node->Virtual.pageCount));
+
+					Node->Virtual.pageTable = gcvNULL;
+
+					gcmVERIFY_OK(gcoOS_UnlockPages(os,
+												   Node->Virtual.physical,
+												   Node->Virtual.bytes,
+												   Node->Virtual.logical));
+
+					/* Error. */
+					break;
+				}
+
+				gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_VIDMEM,
+							  "gcoVIDMEM_Lock: Mapped virtual node %p to 0x%08X",
+							  Node,
+							  Node->Virtual.address);
+			}
+
+			/* Return hardware address. */
+			*Address = Node->Virtual.address;
+		}
+		while (gcvFALSE);
+
+		/* Release the mutex. */
+		gcmVERIFY_OK(gcoOS_ReleaseMutex(os, Node->Virtual.mutex));
+
+		if (gcmIS_ERROR(status))
+		{
+			/* Error. */
+			return status;
+		}
+	}
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoVIDMEM_Unlock
+**
+**	Unlock a video memory node.
+**
+**	INPUT:
+**
+**		gcuVIDMEM_NODE_PTR Node
+**			Pointer to a locked gcuVIDMEM_NODE union.
+**
+**		gceSURF_TYPE Type
+**			Type of surface to unlock.
+**
+**		gctSIZE_T * CommandSize
+**			Pointer to a variable specifiying the number of bytes in the command
+**			buffer specified by 'Commands'.  If gcvNULL, there is no command buffer
+**			and the video memory shoud be unlocked synchronously.
+**
+**		gctBOOL * Asynchroneous
+**			Pointer to a variable specifiying whether the surface should be
+**			unlocked asynchroneously or not.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * CommandSize
+**			Pointer to a variable receiving the number of byets used in the
+**			command buffer specified by 'Commands'.  If gcvNULL, there is no
+**			command buffer.
+**
+**		gctPOINTER Commands
+**			Pointer to a command buffer that will be filled with any
+**			asynchronous commands required to unlock the video memory.
+**
+**		gctBOOL * Asynchroneous
+**			Pointer to a variable receiving the number of bytes used in the
+**			command buffer specified by 'Commands'.  If gcvNULL, there is no
+**			command buffer.
+*/
+gceSTATUS
+gcoVIDMEM_Unlock(
+	IN gcuVIDMEM_NODE_PTR Node,
+	IN gceSURF_TYPE Type,
+#if USE_EVENT_QUEUE
+	IN OUT gctBOOL * Asynchroneous
+#else
+	IN OUT gctSIZE_T * CommandSize,
+	OUT gctPOINTER Commands
+#endif
+	)
+{
+	gceSTATUS status;
+	gcoKERNEL kernel;
+	gcoHARDWARE hardware;
+	gctPOINTER buffer;
+	gctSIZE_T requested, bufferSize, size;
+	gcoCOMMAND command;
+	gceKERNEL_FLUSH flush;
+
+	/* Verify the arguments. */
+	if ( (Node == gcvNULL) || (Node->VidMem.memory == gcvNULL) )
+	{
+		/* Invalid object. */
+		return gcvSTATUS_INVALID_OBJECT;
+	}
+
+	/**************************** Video Memory ********************************/
+
+	if (Node->VidMem.memory->object.type == gcvOBJ_VIDMEM)
+	{
+		gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_VIDMEM,
+					  "gcoVIDMEM_Unlock: Unlocking node %p (%d)",
+					  Node,
+					  Node->VidMem.locked);
+
+		if (Node->VidMem.locked <= 0)
+		{
+			/* The surface was not locked. */
+			return gcvSTATUS_MEMORY_UNLOCKED;
+		}
+
+		/* Decrement the lock count. */
+		Node->VidMem.locked --;
+
+#if USE_EVENT_QUEUE
+		if (Asynchroneous != gcvNULL)
+		{
+			/* No need for any events. */
+			*Asynchroneous = gcvFALSE;
+		}
+#else
+		if (CommandSize != gcvNULL)
+		{
+			/* No need for any commands. */
+			*CommandSize = 0;
+		}
+#endif
+	}
+
+	/*************************** Virtual Memory *******************************/
+
+	else
+	{
+		/* Verify the gcoKERNEL object pointer. */
+		kernel = Node->Virtual.kernel;
+		gcmVERIFY_OBJECT(kernel, gcvOBJ_KERNEL);
+
+		/* Verify the gcoHARDWARE object pointer. */
+		hardware = Node->Virtual.kernel->hardware;
+		gcmVERIFY_OBJECT(hardware, gcvOBJ_HARDWARE);
+
+		/* Verify the gcoCOMMAND object pointer. */
+		command = Node->Virtual.kernel->command;
+		gcmVERIFY_OBJECT(command, gcvOBJ_COMMAND);
+
+#if USE_EVENT_QUEUE
+		if (Asynchroneous == gcvNULL)
+#else
+		if (CommandSize == gcvNULL)
+#endif
+		{
+			gcoOS os;
+
+			gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_VIDMEM,
+						   "gcoVIDMEM_Unlock: Unlocking virtual node %p (%d)",
+						   Node,
+						   Node->Virtual.locked);
+
+			/* Get the gcoOS object pointer. */
+			os = Node->Virtual.kernel->os;
+			gcmVERIFY_OBJECT(os, gcvOBJ_OS);
+
+			/* Grab the mutex. */
+			status = gcoOS_AcquireMutex(os, Node->Virtual.mutex, gcvINFINITE);
+
+			if (gcmIS_ERROR(status))
+			{
+				/* Error. */
+				return status;
+			}
+
+			do
+			{
+				/* If we need to unlock a node from virtual memory we have to be
+				   very carefull.  If the node is still inside the caches we
+				   might get a bus error later if the cache line needs to be
+				   replaced.  So - we have to flush the caches before we do
+				   anything.  We also need to stall to make sure the flush has
+				   happened.  However - when we get to this point we are inside
+				   the interrupt handler and we cannot just gcoCOMMAND_Wait
+				   because it will wait forever.  So - what we do here is we
+				   verify the type of the surface, flush the appropriate cache,
+				   mark the node as flushed, and issue another unlock to unmap
+				   the MMU. */
+				if ((Node->Virtual.locked == 1) && !Node->Virtual.pending)
+				{
+					if (Type == gcvSURF_BITMAP)
+					{
+						/* Flush 2D cache. */
+						flush = gcvFLUSH_2D;
+					}
+					else if (Type == gcvSURF_RENDER_TARGET)
+					{
+						/* Flush color cache. */
+						flush = gcvFLUSH_COLOR;
+					}
+					else if (Type == gcvSURF_DEPTH)
+					{
+						/* Flush depth cache. */
+						flush = gcvFLUSH_DEPTH;
+					}
+					else
+					{
+						/* No flush required. */
+						flush = 0;
+					}
+
+					gcmERR_BREAK(gcoHARDWARE_Flush(hardware,
+												   flush,
+												   gcvNULL,
+												   &requested));
+
+					if (requested != 0)
+					{
+						gcmERR_BREAK(gcoHARDWARE_Event(hardware,
+													   gcvNULL,
+													   0,
+													   gcvKERNEL_PIXEL,
+													   &bufferSize));
+
+						requested += bufferSize;
+
+						gcmERR_BREAK(gcoCOMMAND_Reserve(command,
+														requested,
+														&buffer,
+														&bufferSize));
+
+						size = bufferSize;
+
+						gcmERR_BREAK(gcoHARDWARE_Flush(hardware,
+													   flush,
+													   buffer,
+													   &size));
+
+						bufferSize -= size;
+
+						gcmERR_BREAK(
+							gcoEVENT_Unlock(Node->Virtual.kernel->event,
+											(gctUINT8_PTR) buffer + size,
+											&bufferSize,
+											gcvKERNEL_PIXEL,
+											Node,
+											Type,
+											gcvTRUE));
+
+						/* Mark node as pending. */
+						Node->Virtual.pending = gcvTRUE;
+
+						gcmERR_BREAK(gcoCOMMAND_Execute(command, requested));
+
+						break;
+					}
+				}
+
+				/* Decrement lock count. */
+				-- Node->Virtual.locked;
+
+				/* See if we can unlock the resources. */
+				if (Node->Virtual.locked == 0)
+				{
+					/* Unlock the pages. */
+					gcmERR_BREAK(gcoOS_UnlockPages(os,
+												   Node->Virtual.physical,
+												   Node->Virtual.bytes,
+												   Node->Virtual.logical));
+
+					/* Free the page table. */
+					if (Node->Virtual.pageTable != gcvNULL)
+					{
+						gcmERR_BREAK(gcoMMU_FreePages(Node->Virtual.kernel->mmu,
+													  Node->Virtual.pageTable,
+													  Node->Virtual.pageCount));
+
+						/* Mark page table as freed. */
+ 						Node->Virtual.pageTable = gcvNULL;
+					}
+
+					/* Mark node as unlocked. */
+					Node->Virtual.pending = gcvFALSE;
+
+					gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_VIDMEM,
+								  "gcoVIDMEM_Unlock: "
+								  "Unmapped virtual node %p from 0x%08X",
+								  Node,
+								  Node->Virtual.address);
+				}
+			}
+			while (gcvFALSE);
+
+			/* Release the mutex. */
+			gcmVERIFY_OK(gcoOS_ReleaseMutex(os, Node->Virtual.mutex));
+
+			if (gcmIS_ERROR(status))
+			{
+				/* Error. */
+				return status;
+			}
+		}
+
+		else
+		{
+			gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_VIDMEM,
+						  "gcoVIDMEM_Unlock: Scheduled unlock for virtual node %p",
+						  Node);
+
+#if USE_EVENT_QUEUE
+			/* Schedule the surface to be unlocked. */
+			*Asynchroneous = gcvTRUE;
+#else
+			/* Verify the arguments. */
+			gcmVERIFY_ARGUMENT(Commands != gcvNULL);
+
+			/* Schedule the surface to be unlocked. */
+			status = gcoEVENT_Unlock(Node->Virtual.kernel->event,
+									 Commands,
+									 CommandSize,
+									 gcvKERNEL_PIXEL,
+									 Node,
+									 Type,
+									 gcvFALSE);
+
+			if (gcmIS_ERROR(status))
+			{
+				/* Error. */
+				return status;
+			}
+#endif
+		}
+	}
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/gc_hal_kernel_command.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/gc_hal_kernel_command.c
@@ -0,0 +1,2045 @@
+/****************************************************************************
+*
+*    Copyright (C) 2005 - 2010 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public License as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+#include "gc_hal_kernel_precomp.h"
+#include "gc_hal_user_context.h"
+
+#if defined(__QNXNTO__)
+#include <sys/slog.h>
+#endif
+
+#if MRVL_LOW_POWER_MODE_DEBUG
+#include <linux/module.h>
+#endif
+
+#define _GC_OBJ_ZONE    gcvZONE_COMMAND
+
+/******************************************************************************\
+********************************* Support Code *********************************
+\******************************************************************************/
+
+#if MRVL_PRINT_CMD_BUFFER
+
+typedef struct _gcsRECORD_INFO * gcsRECORD_INFO_PTR;
+typedef struct _gcsRECORD_INFO
+{
+	gctUINT		count;
+	gctUINT		index;
+	gctUINT		tail;
+}
+gcsRECORD_INFO;
+
+typedef struct _gcsCMDBUF_RECORD * gcsCMDBUF_RECORD_PTR;
+typedef struct _gcsCMDBUF_RECORD
+{
+	gctUINT32_PTR	logical;
+	gctUINT		address;
+	gctUINT		size;
+	gctBOOL		context;
+	gctBOOL		queue;
+}
+gcsCMDBUF_RECORD;
+
+typedef struct _gcsLINK_RECORD * gcsLINK_RECORD_PTR;
+typedef struct _gcsLINK_RECORD
+{
+	gctUINT32_PTR	fromLogical;
+	gctUINT32	fromAddress;
+	gctUINT32_PTR	toLogical;
+	gctUINT32	toAddress;
+}
+gcsLINK_RECORD;
+
+#define gcdRECORD_COUNT 1000
+
+static gctUINT _cmdQueueCount;
+
+static gcsRECORD_INFO _cmdInfo = { 0, ~0, 0 };
+static gcsRECORD_INFO _lnkInfo = { 0, ~0, 0 };
+
+static gcsCMDBUF_RECORD _cmdRecord[gcdRECORD_COUNT];
+static gcsLINK_RECORD   _lnkRecord[gcdRECORD_COUNT];
+
+static void _AdvanceRecord(
+	gcsRECORD_INFO_PTR Record
+	)
+{
+	Record->index = (Record->index + 1) % gcdRECORD_COUNT;
+
+	if (Record->count < gcdRECORD_COUNT)
+	{
+		Record->count += 1;
+	}
+	else
+	{
+		Record->tail = (Record->tail + 1) % gcdRECORD_COUNT;
+	}
+}
+
+static void _AddCmdBuffer(
+	gckCOMMAND Command,
+	gctUINT32_PTR Logical,
+	gctSIZE_T Size,
+	gctBOOL Context,
+	gctBOOL Queue
+	)
+{
+	gctUINT address;
+	gcsCMDBUF_RECORD_PTR record;
+
+	_AdvanceRecord(&_cmdInfo);
+
+	if (Queue)
+	{
+		_cmdQueueCount += 1;
+	}
+
+	gckHARDWARE_ConvertLogical(
+		Command->kernel->hardware, Logical, &address
+		);
+
+	record = &_cmdRecord[_cmdInfo.index];
+
+	record->logical = Logical;
+	record->address = address;
+	record->size    = Size;
+	record->context = Context;
+	record->queue   = Queue;
+}
+
+static void _AddLink(
+	gckCOMMAND Command,
+	gctUINT32_PTR From,
+	gctUINT32_PTR To
+	)
+{
+	gctUINT from, to;
+	gcsLINK_RECORD_PTR record;
+
+	_AdvanceRecord(&_lnkInfo);
+
+	gckHARDWARE_ConvertLogical(
+		Command->kernel->hardware, From, &from
+		);
+
+	gckHARDWARE_ConvertLogical(
+		Command->kernel->hardware, To, &to
+		);
+
+	record = &_lnkRecord[_lnkInfo.index];
+
+	record->fromLogical = From;
+	record->fromAddress = from;
+	record->toLogical   = To;
+	record->toAddress   = to;
+}
+
+static gcsCMDBUF_RECORD_PTR _FindCmdBuffer(
+	gctUINT Address
+	)
+{
+	gctUINT i, j, first, last;
+
+	i = _cmdInfo.tail;
+
+	for (j = 0; j < _cmdInfo.count; j += 1)
+	{
+		first = _cmdRecord[i].address;
+		last  = first + _cmdRecord[i].size;
+
+		if ((Address >= first) && (Address < last))
+		{
+			return &_cmdRecord[i];
+		}
+
+		i = (i + 1) % gcdRECORD_COUNT;
+	}
+
+	return gcvNULL;
+}
+
+static void _PrintBuffer(
+	gctUINT32_PTR Logical,
+	gctUINT Address,
+	gctUINT Size
+	)
+{
+	gctUINT i;
+	gctUINT value;
+
+	for (i = 0; i < Size; i += 4)
+	{
+		value = * Logical;
+		Logical += 1;
+
+		if ((i % 16) == 0)
+		{
+			gcmTRACE(0, "0x%08X: ", Address + i);
+		}
+
+		if (i + 4 < Size)
+		{
+			if (((i + 4) % 16) == 0)
+			{
+				gcmTRACE(0, "0x%08X,\n", value);
+			}
+			else
+			{
+				gcmTRACE(0, "0x%08X, ", value);
+			}
+		}
+		else
+		{
+			gcmTRACE(0, "0x%08X\n", value);
+		}
+	}
+}
+
+static void _PrintCmdBuffer(
+	gckCOMMAND Command,
+	gctUINT Address
+	)
+{
+	gctUINT i, j, first, last;
+	gcsCMDBUF_RECORD_PTR buffer;
+	gctUINT address;
+
+	gcmTRACE(0,
+		"\n%s(%d):\n"
+		"  number of buffers stored %d;\n"
+		"  buffer list:\n\n",
+		__FUNCTION__, __LINE__, _cmdInfo.count
+		);
+
+	i = _cmdInfo.tail;
+
+	for (j = 0; j < _cmdInfo.count; j += 1)
+	{
+		first = _cmdRecord[i].address;
+		last  = first + _cmdRecord[i].size;
+
+		gcmTRACE(0,
+			"  0x%08X-0x%08X%s%s\n",
+			first,
+			last,
+			_cmdRecord[i].context ? " context" : "",
+			_cmdRecord[i].queue   ? " queue"   : ""
+			);
+
+		i = (i + 1) % gcdRECORD_COUNT;
+	}
+
+	buffer = _FindCmdBuffer(Address);
+
+	if (buffer == gcvNULL)
+	{
+		gcmTRACE(0,
+			"\n*** buffer not found for the specified location ***\n"
+			);
+	}
+	else
+	{
+		first = buffer->address;
+		last  = first + buffer->size;
+
+		gcmTRACE(0,
+			"\n%s(%d): buffer found 0x%08X-0x%08X%s%s:\n\n",
+			__FUNCTION__, __LINE__,
+			first,
+			last,
+			buffer->context ? " context" : "",
+			buffer->context ? " queue"   : ""
+			);
+
+		_PrintBuffer(buffer->logical, buffer->address, buffer->size);
+	}
+
+	gckHARDWARE_ConvertLogical(
+		Command->kernel->hardware, Command->logical, &address
+		);
+
+	first = address;
+	last  = first + Command->pageSize;
+
+	gcmTRACE(0,
+		"\nCommand queue N%d: 0x%08X-0x%08X:\n\n",
+		_cmdQueueCount,
+		first,
+		last
+		);
+
+	_PrintBuffer(Command->logical, address, Command->pageSize);
+}
+
+static void _PrintLinkChain(
+	void
+	)
+{
+	gctUINT i, j;
+
+	gcmTRACE(0, "\nLink chain:\n\n");
+
+	i = _lnkInfo.tail;
+
+	for (j = 0; j < _lnkInfo.count; j += 1)
+	{
+		gcmTRACE(0,
+			"  LINK 0x%08X --> 0x%08X\n",
+			_lnkRecord[i].fromAddress,
+			_lnkRecord[i].toAddress
+			);
+
+		i = (i + 1) % gcdRECORD_COUNT;
+	}
+}
+#endif
+
+#if gcdDUMP_COMMAND
+static void
+_DumpCommand(
+    IN gckCOMMAND Command,
+    IN gctPOINTER Pointer,
+    IN gctSIZE_T Bytes
+    )
+{
+    gctUINT32_PTR data = (gctUINT32_PTR) Pointer;
+    gctUINT32 address;
+
+    gckOS_GetPhysicalAddress(Command->os, Pointer, &address);
+
+    gcmkPRINT("@[kernel.command %08X %08X", address, Bytes);
+    while (Bytes >= 8*4)
+    {
+        gcmkPRINT("  %08X %08X %08X %08X %08X %08X %08X %08X",
+                  data[0], data[1], data[2], data[3], data[4], data[5], data[6],
+                  data[7]);
+        data  += 8;
+        Bytes -= 32;
+    }
+
+    switch (Bytes)
+    {
+    case 7*4:
+        gcmkPRINT("  %08X %08X %08X %08X %08X %08X %08X",
+                  data[0], data[1], data[2], data[3], data[4], data[5],
+                  data[6]);
+        break;
+
+    case 6*4:
+        gcmkPRINT("  %08X %08X %08X %08X %08X %08X",
+                  data[0], data[1], data[2], data[3], data[4], data[5]);
+        break;
+
+    case 5*4:
+        gcmkPRINT("  %08X %08X %08X %08X %08X",
+                  data[0], data[1], data[2], data[3], data[4]);
+        break;
+
+    case 4*4:
+        gcmkPRINT("  %08X %08X %08X %08X", data[0], data[1], data[2], data[3]);
+        break;
+
+    case 3*4:
+        gcmkPRINT("  %08X %08X %08X", data[0], data[1], data[2]);
+        break;
+
+    case 2*4:
+        gcmkPRINT("  %08X %08X", data[0], data[1]);
+        break;
+
+    case 1*4:
+        gcmkPRINT("  %08X", data[0]);
+        break;
+    }
+
+    gcmkPRINT("] -- command");
+}
+#endif
+
+/*******************************************************************************
+**
+**	_NewQueue
+**
+**	Allocate a new command queue.
+**
+**	INPUT:
+**
+**		gckCOMMAND Command
+**			Pointer to an gckCOMMAND object.
+**
+**	OUTPUT:
+**
+**		gckCOMMAND Command
+**			gckCOMMAND object has been updated with a new command queue.
+*/
+static gceSTATUS
+_NewQueue(
+    IN OUT gckCOMMAND Command,
+	IN gctBOOL Locking
+    )
+{
+    gceSTATUS status;
+	gctINT currentIndex, newIndex;
+
+	gcmkHEADER_ARG("Command=0x%x Locking=%d", Command, Locking);
+
+	/* Switch to the next command buffer. */
+	currentIndex = Command->index;
+	newIndex     = (currentIndex + 1) % gcdCOMMAND_QUEUES;
+
+
+	/* Wait for availability. */
+#if gcdDUMP_COMMAND
+    gcmkPRINT("@[kernel.waitsignal]");
+#endif
+
+	gcmkONERROR(
+		gckOS_WaitSignal(Command->os,
+						 Command->queues[newIndex].signal,
+						 gcvINFINITE));
+
+    if (currentIndex >= 0)
+    {
+        /* Mark the command queue as available. */
+        gcmkONERROR(gckEVENT_Signal(Command->kernel->event,
+                                    Command->queues[currentIndex].signal,
+                                    gcvKERNEL_PIXEL,
+									Locking));
+    }
+
+    /* Update gckCOMMAND object with new command queue. */
+	Command->index    = newIndex;
+    Command->newQueue = gcvTRUE;
+	Command->physical = Command->queues[newIndex].physical;
+	Command->logical  = Command->queues[newIndex].logical;
+    Command->offset   = 0;
+
+    if (currentIndex >= 0)
+    {
+        /* Submit the event queue. */
+        Command->submit = gcvTRUE;
+    }
+
+    /* Success. */
+    gcmkFOOTER_ARG("Command->index=%d", Command->index);
+    return gcvSTATUS_OK;
+
+OnError:
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/******************************************************************************\
+****************************** gckCOMMAND API Code ******************************
+\******************************************************************************/
+
+/*******************************************************************************
+**
+**	gckCOMMAND_Construct
+**
+**	Construct a new gckCOMMAND object.
+**
+**	INPUT:
+**
+**		gckKERNEL Kernel
+**			Pointer to an gckKERNEL object.
+**
+**	OUTPUT:
+**
+**		gckCOMMAND * Command
+**			Pointer to a variable that will hold the pointer to the gckCOMMAND
+**			object.
+*/
+gceSTATUS
+gckCOMMAND_Construct(
+	IN gckKERNEL Kernel,
+	OUT gckCOMMAND * Command
+	)
+{
+    gckOS os;
+	gckCOMMAND command = gcvNULL;
+	gceSTATUS status;
+	gctINT i;
+
+	gcmkHEADER_ARG("Kernel=0x%x", Kernel);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Kernel, gcvOBJ_KERNEL);
+	gcmkVERIFY_ARGUMENT(Command != gcvNULL);
+
+    /* Extract the gckOS object. */
+    os = Kernel->os;
+
+	/* Allocate the gckCOMMAND structure. */
+	gcmkONERROR(
+		gckOS_Allocate(os,
+					   gcmSIZEOF(struct _gckCOMMAND),
+					   (gctPOINTER *) &command));
+
+	/* Initialize the gckCOMMAND object.*/
+	command->object.type  = gcvOBJ_COMMAND;
+	command->kernel       = Kernel;
+	command->os           = os;
+	command->mutexQueue   = gcvNULL;
+	command->mutexContext = gcvNULL;
+
+    /* No command queues created yet. */
+	command->index = 0;
+	for (i = 0; i < gcdCOMMAND_QUEUES; ++i)
+	{
+		command->queues[i].signal  = gcvNULL;
+		command->queues[i].logical = gcvNULL;
+	}
+
+    /* Get the command buffer requirements. */
+    gcmkONERROR(
+	gckHARDWARE_QueryCommandBuffer(Kernel->hardware,
+                                       &command->alignment,
+                                       &command->reservedHead,
+                                       &command->reservedTail));
+
+    /* No contexts available yet. */
+    command->contextCounter = command->currentContext = 0;
+
+    /* Create the command queue mutex. */
+    gcmkONERROR(
+	gckOS_CreateMutex(os, &command->mutexQueue));
+
+	/* Create the context switching mutex. */
+	gcmkONERROR(
+		gckOS_CreateMutex(os, &command->mutexContext));
+
+	/* Get the page size from teh OS. */
+	gcmkONERROR(
+		gckOS_GetPageSize(os, &command->pageSize));
+
+	/* Set hardware to pipe 0. */
+	command->pipeSelect = 0;
+
+    /* Pre-allocate the command queues. */
+    for (i = 0; i < gcdCOMMAND_QUEUES; ++i)
+    {
+        gcmkONERROR(
+            gckOS_AllocateNonPagedMemory(os,
+                                         gcvFALSE,
+                                         &command->pageSize,
+                                         &command->queues[i].physical,
+                                         &command->queues[i].logical));
+        gcmkONERROR(
+            gckOS_CreateSignal(os, gcvFALSE, &command->queues[i].signal));
+
+		gcmkONERROR(
+			gckOS_Signal(os, command->queues[i].signal, gcvTRUE));
+	}
+
+	/* No command queue in use yet. */
+	command->index    = -1;
+	command->logical  = gcvNULL;
+	command->newQueue = gcvFALSE;
+    command->submit   = gcvFALSE;
+
+	/* Command is not yet running. */
+	command->running = gcvFALSE;
+
+	/* Command queue is idle. */
+	command->idle = gcvTRUE;
+
+	/* Commit stamp is zero. */
+	command->commitStamp = 0;
+
+    /* Return pointer to the gckCOMMAND object. */
+	*Command = command;
+
+	/* Success. */
+	gcmkFOOTER_ARG("*Command=0x%x", *Command);
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Roll back. */
+	if (command != gcvNULL)
+	{
+		if (command->mutexContext != gcvNULL)
+		{
+			gcmkVERIFY_OK(gckOS_DeleteMutex(os, command->mutexContext));
+		}
+
+		if (command->mutexQueue != gcvNULL)
+		{
+			gcmkVERIFY_OK(gckOS_DeleteMutex(os, command->mutexQueue));
+		}
+
+		for (i = 0; i < gcdCOMMAND_QUEUES; ++i)
+		{
+			if (command->queues[i].signal != gcvNULL)
+			{
+				gcmkVERIFY_OK(
+					gckOS_DestroySignal(os, command->queues[i].signal));
+			}
+
+			if (command->queues[i].logical != gcvNULL)
+			{
+				gcmkVERIFY_OK(
+					gckOS_FreeNonPagedMemory(os,
+											 command->pageSize,
+											 command->queues[i].physical,
+											 command->queues[i].logical));
+			}
+		}
+
+		gcmkVERIFY_OK(gckOS_Free(os, command));
+	}
+
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckCOMMAND_Destroy
+**
+**	Destroy an gckCOMMAND object.
+**
+**	INPUT:
+**
+**		gckCOMMAND Command
+**			Pointer to an gckCOMMAND object to destroy.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckCOMMAND_Destroy(
+	IN gckCOMMAND Command
+	)
+{
+	gctINT i;
+
+	gcmkHEADER_ARG("Command=0x%x", Command);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Command, gcvOBJ_COMMAND);
+
+	/* Stop the command queue. */
+	gcmkVERIFY_OK(gckCOMMAND_Stop(Command));
+
+	for (i = 0; i < gcdCOMMAND_QUEUES; ++i)
+	{
+		gcmkASSERT(Command->queues[i].signal != gcvNULL);
+		gcmkVERIFY_OK(
+			gckOS_DestroySignal(Command->os, Command->queues[i].signal));
+
+		gcmkASSERT(Command->queues[i].logical != gcvNULL);
+		gcmkVERIFY_OK(
+			gckOS_FreeNonPagedMemory(Command->os,
+									 Command->pageSize,
+									 Command->queues[i].physical,
+									 Command->queues[i].logical));
+	}
+
+    /* Delete the context switching mutex. */
+    gcmkVERIFY_OK(gckOS_DeleteMutex(Command->os, Command->mutexContext));
+
+    /* Delete the command queue mutex. */
+    gcmkVERIFY_OK(gckOS_DeleteMutex(Command->os, Command->mutexQueue));
+
+	/* Mark object as unknown. */
+	Command->object.type = gcvOBJ_UNKNOWN;
+
+	/* Free the gckCOMMAND object. */
+	gcmkVERIFY_OK(gckOS_Free(Command->os, Command));
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckCOMMAND_Start
+**
+**	Start up the command queue.
+**
+**	INPUT:
+**
+**		gckCOMMAND Command
+**			Pointer to an gckCOMMAND object to start.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckCOMMAND_Start(
+	IN gckCOMMAND Command
+	)
+{
+    gckHARDWARE hardware;
+	gceSTATUS status;
+    gctSIZE_T bytes;
+
+    gcmkHEADER_ARG("Command=0x%x", Command);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Command, gcvOBJ_COMMAND);
+
+	if (Command->running)
+	{
+		/* Command queue already running. */
+		gcmkFOOTER_NO();
+		return gcvSTATUS_OK;
+	}
+
+	/* Extract the gckHARDWARE object. */
+	hardware = Command->kernel->hardware;
+	gcmkVERIFY_OBJECT(hardware, gcvOBJ_HARDWARE);
+
+	if (Command->logical == gcvNULL)
+	{
+		/* Start at beginning of a new queue. */
+		gcmkONERROR(_NewQueue(Command, gcvFALSE));
+
+#if MRVL_PRINT_CMD_BUFFER
+        _AddCmdBuffer(
+            Command, Command->logical, Command->pageSize, gcvFALSE, gcvTRUE
+            );
+#endif
+	}
+
+	/* Start at beginning of page. */
+	Command->offset = 0;
+
+	/* Append WAIT/LINK. */
+    bytes = Command->pageSize;
+	gcmkONERROR(
+		gckHARDWARE_WaitLink(hardware,
+							 Command->logical,
+							 0,
+							 &bytes,
+							 &Command->wait,
+							 &Command->waitSize));
+
+    /* Adjust offset. */
+    Command->offset   = bytes;
+	Command->newQueue = gcvFALSE;
+
+	/* Enable command processor. */
+#ifdef __QNXNTO__
+	gcmkONERROR(
+		gckHARDWARE_Execute(hardware,
+							Command->logical,
+							Command->physical,
+							gcvTRUE,
+							bytes));
+#else
+	gcmkONERROR(
+		gckHARDWARE_Execute(hardware,
+							Command->logical,
+							bytes));
+#endif
+	/* Command queue is running. */
+	Command->running = gcvTRUE;
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckCOMMAND_Stop
+**
+**	Stop the command queue.
+**
+**	INPUT:
+**
+**		gckCOMMAND Command
+**			Pointer to an gckCOMMAND object to stop.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckCOMMAND_Stop(
+	IN gckCOMMAND Command
+	)
+{
+    gckHARDWARE hardware;
+	gceSTATUS status;
+	gctUINT32 idle;
+
+	gcmkHEADER_ARG("Command=0x%x", Command);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Command, gcvOBJ_COMMAND);
+
+	if (!Command->running)
+	{
+		/* Command queue is not running. */
+		gcmkFOOTER_NO();
+		return gcvSTATUS_OK;
+	}
+
+    /* Extract the gckHARDWARE object. */
+    hardware = Command->kernel->hardware;
+    gcmkVERIFY_OBJECT(hardware, gcvOBJ_HARDWARE);
+
+    /* Replace last WAIT with END. */
+    gcmkONERROR(
+		gckHARDWARE_End(hardware,
+						Command->wait,
+						&Command->waitSize));
+
+	/* Wait for idle. */
+	gcmkONERROR(
+		gckHARDWARE_GetIdle(hardware, gcvTRUE, &idle));
+
+	/* Command queue is no longer running. */
+	Command->running = gcvFALSE;
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+typedef struct _gcsMAPPED * gcsMAPPED_PTR;
+struct _gcsMAPPED
+{
+	gcsMAPPED_PTR next;
+	gctPOINTER pointer;
+	gctPOINTER kernelPointer;
+	gctSIZE_T bytes;
+};
+
+static gceSTATUS
+_AddMap(
+	IN gckOS Os,
+	IN gctPOINTER Source,
+	IN gctSIZE_T Bytes,
+	OUT gctPOINTER * Destination,
+	IN OUT gcsMAPPED_PTR * Stack
+	)
+{
+	gcsMAPPED_PTR map = gcvNULL;
+	gceSTATUS status;
+
+	/* Don't try to map NULL pointers. */
+	if (Source == gcvNULL)
+	{
+		*Destination = gcvNULL;
+		return gcvSTATUS_OK;
+	}
+
+	/* Allocate the gcsMAPPED structure. */
+	gcmkONERROR(
+		gckOS_Allocate(Os, gcmSIZEOF(*map), (gctPOINTER *) &map));
+
+	/* Map the user pointer into kernel addressing space. */
+	gcmkONERROR(
+		gckOS_MapUserPointer(Os, Source, Bytes, Destination));
+
+	/* Save mapping. */
+	map->pointer       = Source;
+	map->kernelPointer = *Destination;
+	map->bytes         = Bytes;
+
+	/* Push structure on top of the stack. */
+	map->next = *Stack;
+	*Stack    = map;
+
+	/* Success. */
+	return gcvSTATUS_OK;
+
+OnError:
+	if (gcmIS_ERROR(status) && (map != gcvNULL))
+	{
+		/* Roll back on error. */
+		gcmkVERIFY_OK(gckOS_Free(Os, map));
+	}
+
+	/* Return the status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckCOMMAND_Commit
+**
+**	Commit a command buffer to the command queue.
+**
+**	INPUT:
+**
+**		gckCOMMAND Command
+**			Pointer to an gckCOMMAND object.
+**
+**		gcoCMDBUF CommandBuffer
+**			Pointer to an gcoCMDBUF object.
+**
+**		gcoCONTEXT Context
+**			Pointer to an gcoCONTEXT object.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckCOMMAND_Commit(
+    IN gckCOMMAND Command,
+    IN gcoCMDBUF CommandBuffer,
+    IN gcoCONTEXT Context,
+    IN gctHANDLE Process
+    )
+{
+    gcoCMDBUF commandBuffer;
+    gcoCONTEXT context;
+	gckHARDWARE hardware;
+	gceSTATUS status;
+	gctPOINTER initialLink, link;
+	gctSIZE_T bytes, initialSize, lastRun;
+	gcoCMDBUF buffer;
+	gctPOINTER wait;
+	gctSIZE_T waitSize;
+	gctUINT32 offset;
+	gctPOINTER fetchAddress;
+	gctSIZE_T fetchSize;
+	gctUINT8_PTR logical;
+	gcsMAPPED_PTR stack = gcvNULL;
+	gctINT acquired = 0;
+#if gcdSECURE_USER
+	gctUINT32_PTR hint;
+#endif
+#if gcdDUMP_COMMAND
+    gctPOINTER dataPointer;
+    gctSIZE_T dataBytes;
+#endif
+    gctPOINTER flushPointer;
+    gctSIZE_T flushSize;
+
+	gcmkHEADER_ARG("Command=0x%x CommandBuffer=0x%x Context=0x%x",
+				   Command, CommandBuffer, Context);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Command, gcvOBJ_COMMAND);
+
+#if gcdNULL_DRIVER == 2
+	/* Do nothing with infinite hardware. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+#endif
+
+	gcmkONERROR(
+		_AddMap(Command->os,
+				CommandBuffer,
+				gcmSIZEOF(struct _gcoCMDBUF),
+				(gctPOINTER *) &commandBuffer,
+				&stack));
+	gcmkVERIFY_OBJECT(commandBuffer, gcvOBJ_COMMANDBUFFER);
+	gcmkONERROR(
+		_AddMap(Command->os,
+				Context,
+				gcmSIZEOF(struct _gcoCONTEXT),
+				(gctPOINTER *) &context,
+				&stack));
+	gcmkVERIFY_OBJECT(context, gcvOBJ_CONTEXT);
+
+	/* Extract the gckHARDWARE and gckEVENT objects. */
+	hardware = Command->kernel->hardware;
+	gcmkVERIFY_OBJECT(hardware, gcvOBJ_HARDWARE);
+
+	/* Acquire the context switching mutex. */
+	gcmkONERROR(
+		gckOS_AcquireMutex(Command->os,
+						   Command->mutexContext,
+						   gcvINFINITE));
+
+	++acquired;
+
+	/* Reserved slot in the context or command buffer. */
+	gcmkONERROR(
+		gckHARDWARE_PipeSelect(hardware, gcvNULL, 0, &bytes));
+
+	/* Test if we need to switch to this context. */
+	if ((context->id != 0)
+	&&  (context->id != Command->currentContext)
+	)
+	{
+		/* Map the context buffer.*/
+		gcmkONERROR(
+			_AddMap(Command->os,
+					context->logical,
+					context->bufferSize,
+					(gctPOINTER *) &logical,
+					&stack));
+
+#if gcdSECURE_USER
+		/* Map the hint array.*/
+		gcmkONERROR(
+			_AddMap(Command->os,
+					context->hintArray,
+					context->hintCount * gcmSIZEOF(gctUINT32),
+					(gctPOINTER *) &hint,
+					&stack));
+
+        /* Loop while we have valid hints. */
+        while (*hint != 0)
+        {
+            /* Map handle into physical address. */
+            gcmkONERROR(
+                gckKERNEL_MapLogicalToPhysical(
+                    Command->kernel,
+                    Process,
+                    (gctPOINTER *) (logical + *hint)));
+
+			/* Next hint. */
+			++hint;
+		}
+#endif
+
+		/* See if we have to check pipes. */
+		if (context->pipe2DIndex != 0)
+		{
+			/* See if we are in the correct pipe. */
+			if (context->initialPipe == Command->pipeSelect)
+			{
+				gctUINT32 reserved = bytes;
+				gctUINT8_PTR nop   = logical;
+
+				/* Already in the correct pipe, fill context buffer with NOP. */
+				while (reserved > 0)
+				{
+					bytes = reserved;
+					gcmkONERROR(
+						gckHARDWARE_Nop(hardware, nop, &bytes));
+
+					gcmkASSERT(reserved >= bytes);
+					reserved -= bytes;
+					nop      += bytes;
+				}
+			}
+			else
+			{
+				/* Switch to the correct pipe. */
+				gcmkONERROR(
+					gckHARDWARE_PipeSelect(hardware,
+										   logical,
+										   context->initialPipe,
+										   &bytes));
+			}
+		}
+
+		/* Save initial link pointer. */
+        initialLink = logical;
+		initialSize = context->bufferSize;
+
+#if MRVL_PRINT_CMD_BUFFER
+		_AddCmdBuffer(
+			Command, initialLink, initialSize, gcvTRUE, gcvFALSE
+			);
+#endif
+
+        /* Save initial buffer to flush. */
+        flushPointer = initialLink;
+        flushSize    = initialSize;
+
+        /* Save pointer to next link. */
+        gcmkONERROR(
+            _AddMap(Command->os,
+                    context->link,
+                    8,
+                    &link,
+                    &stack));
+
+		/* Start parsing CommandBuffer. */
+		buffer = commandBuffer;
+
+		/* Mark context buffer as used. */
+		if (context->inUse != gcvNULL)
+		{
+			gctBOOL_PTR inUse;
+
+			gcmkONERROR(
+				_AddMap(Command->os,
+						(gctPOINTER) context->inUse,
+						gcmSIZEOF(gctBOOL),
+						(gctPOINTER *) &inUse,
+						&stack));
+
+			*inUse = gcvTRUE;
+		}
+	}
+
+	else
+	{
+		/* Test if this is a new context. */
+		if (context->id == 0)
+		{
+			/* Generate unique ID for the context buffer. */
+			context->id = ++ Command->contextCounter;
+
+			if (context->id == 0)
+			{
+				/* Context counter overflow (wow!) */
+				gcmkONERROR(gcvSTATUS_TOO_COMPLEX);
+			}
+		}
+
+		/* Map the command buffer. */
+		gcmkONERROR(
+			_AddMap(Command->os,
+					commandBuffer->logical,
+					commandBuffer->offset,
+					(gctPOINTER *) &logical,
+					&stack));
+
+#if gcdSECURE_USER
+		/* Map the hint table. */
+		gcmkONERROR(
+			_AddMap(Command->os,
+					commandBuffer->hintCommit,
+					commandBuffer->offset - commandBuffer->startOffset,
+					(gctPOINTER *) &hint,
+					&stack));
+
+        /* Walk while we have valid hints. */
+        while (*hint != 0)
+        {
+            /* Map the handle to a physical address. */
+            gcmkONERROR(
+                gckKERNEL_MapLogicalToPhysical(
+                    Command->kernel,
+                    Process,
+                    (gctPOINTER *) (logical + *hint)));
+
+			/* Next hint. */
+			++hint;
+		}
+#endif
+
+		if (context->entryPipe == Command->pipeSelect)
+		{
+			gctUINT32 reserved = Command->reservedHead;
+			gctUINT8_PTR nop   = logical + commandBuffer->startOffset;
+
+			/* Already in the correct pipe, fill context buffer with NOP. */
+			while (reserved > 0)
+			{
+				bytes = reserved;
+				gcmkONERROR(
+					gckHARDWARE_Nop(hardware, nop, &bytes));
+
+				gcmkASSERT(reserved >= bytes);
+				reserved -= bytes;
+				nop      += bytes;
+			}
+		}
+		else
+		{
+			/* Switch to the correct pipe. */
+			gcmkONERROR(
+				gckHARDWARE_PipeSelect(hardware,
+									   logical + commandBuffer->startOffset,
+									   context->entryPipe,
+									   &bytes));
+		}
+
+		/* Save initial link pointer. */
+        initialLink = logical + commandBuffer->startOffset;
+		initialSize = commandBuffer->offset
+					- commandBuffer->startOffset
+					+ Command->reservedTail;
+
+#if MRVL_PRINT_CMD_BUFFER
+		_AddCmdBuffer(
+			Command, initialLink, initialSize, gcvFALSE, gcvFALSE
+			);
+#endif
+
+        /* Save initial buffer to flush. */
+        flushPointer = initialLink;
+        flushSize    = initialSize;
+
+        /* Save pointer to next link. */
+        link = logical + commandBuffer->offset;
+
+		/* No more data. */
+		buffer = gcvNULL;
+	}
+
+#if MRVL_PRINT_CMD_BUFFER
+	_AddLink(Command, Command->wait, initialLink);
+#endif
+
+#if gcdDUMP_COMMAND
+    dataPointer = initialLink;
+    dataBytes   = initialSize;
+#endif
+
+	/* Loop through all remaining command buffers. */
+	if (buffer != gcvNULL)
+	{
+		/* Map the command buffer. */
+		gcmkONERROR(
+			_AddMap(Command->os,
+					buffer->logical,
+					buffer->offset + Command->reservedTail,
+					(gctPOINTER *) &logical,
+					&stack));
+#if MRVL_PRINT_CMD_BUFFER
+		_AddCmdBuffer(
+			Command, (gctUINT32_PTR)logical, buffer->offset + Command->reservedTail, gcvFALSE, gcvFALSE
+			);
+#endif
+
+#if gcdSECURE_USER
+		/* Map the hint table. */
+		gcmkONERROR(
+			_AddMap(Command->os,
+					buffer->hintCommit,
+					buffer->offset - buffer->startOffset,
+					(gctPOINTER *) &hint,
+					&stack));
+
+        /* Walk while we have valid hints. */
+        while (*hint != 0)
+        {
+            /* Map the handle to a physical address. */
+            gcmkONERROR(
+                gckKERNEL_MapLogicalToPhysical(
+                    Command->kernel,
+                    Process,
+                    (gctPOINTER *) (logical + *hint)));
+
+			/* Next hint. */
+			++hint;
+		}
+#endif
+
+		/* First slot becomes a NOP. */
+		{
+			gctUINT32 reserved = Command->reservedHead;
+			gctUINT8_PTR nop   = logical + buffer->startOffset;
+
+			/* Already in the correct pipe, fill context buffer with NOP. */
+			while (reserved > 0)
+			{
+				bytes = reserved;
+				gcmkONERROR(
+					gckHARDWARE_Nop(hardware, nop, &bytes));
+
+				gcmkASSERT(reserved >= bytes);
+				reserved -= bytes;
+				nop      += bytes;
+			}
+		}
+
+		/* Generate the LINK to this command buffer. */
+		gcmkONERROR(
+			gckHARDWARE_Link(hardware,
+							 link,
+                             logical + buffer->startOffset,
+							 buffer->offset
+							 - buffer->startOffset
+							 + Command->reservedTail,
+							 &bytes));
+#if MRVL_PRINT_CMD_BUFFER
+	_AddLink(Command, link, (gctUINT32_PTR)logical);
+#endif
+
+        /* Flush the initial buffer. */
+        gcmkONERROR(gckOS_CacheFlush(Command->os,
+                                     Process,
+                                     flushPointer,
+                                     flushSize));
+
+        /* Save new flush pointer. */
+        flushPointer = logical + buffer->startOffset;
+        flushSize    = buffer->offset
+                     - buffer->startOffset
+                     + Command->reservedTail;
+
+#if gcdDUMP_COMMAND
+        _DumpCommand(Command, dataPointer, dataBytes);
+        dataPointer = logical + buffer->startOffset;
+        dataBytes   = buffer->offset - buffer->startOffset
+                    + Command->reservedTail;
+#endif
+
+		/* Save pointer to next link. */
+        link = logical + buffer->offset;
+	}
+
+	/* Compute number of bytes required for WAIT/LINK. */
+	gcmkONERROR(
+		gckHARDWARE_WaitLink(hardware,
+							 gcvNULL,
+							 Command->offset,
+							 &bytes,
+							 gcvNULL,
+							 gcvNULL));
+
+	lastRun = bytes;
+
+	/* Grab the command queue mutex. */
+	gcmkONERROR(
+		gckOS_AcquireMutex(Command->os,
+						   Command->mutexQueue,
+						   gcvINFINITE));
+
+	++acquired;
+
+	if (Command->kernel->notifyIdle)
+	{
+		/* Increase the commit stamp */
+		Command->commitStamp++;
+
+		/* Set busy if idle */
+		if (Command->idle)
+		{
+			Command->idle = gcvFALSE;
+
+			gcmkVERIFY_OK(gckOS_NotifyIdle(Command->os, gcvFALSE));
+		}
+	}
+
+	/* Compute number of bytes left in current command queue. */
+	bytes = Command->pageSize - Command->offset;
+
+	if (bytes < lastRun)
+	{
+        /* Create a new command queue. */
+		gcmkONERROR(_NewQueue(Command, gcvTRUE));
+
+		/* Adjust run size with any extra commands inserted. */
+		lastRun += Command->offset;
+	}
+
+	/* Get current offset. */
+	offset = Command->offset;
+
+	/* Append WAIT/LINK in command queue. */
+	bytes = Command->pageSize - offset;
+
+	gcmkONERROR(
+		gckHARDWARE_WaitLink(hardware,
+							 (gctUINT8 *) Command->logical + offset,
+							 offset,
+							 &bytes,
+							 &wait,
+							 &waitSize));
+
+    /* Flush the cache for the wait/link. */
+    gcmkONERROR(gckOS_CacheFlush(Command->os,
+                                 gcvNULL,
+                                 (gctUINT8 *) Command->logical + offset,
+                                 bytes));
+
+#if gcdDUMP_COMMAND
+    _DumpCommand(Command, (gctUINT8 *) Command->logical + offset, bytes);
+#endif
+
+	/* Adjust offset. */
+	offset += bytes;
+
+	if (Command->newQueue)
+	{
+		/* Compute fetch location and size for a new command queue. */
+		fetchAddress = Command->logical;
+		fetchSize    = offset;
+	}
+	else
+	{
+		/* Compute fetch location and size for an existing command queue. */
+		fetchAddress = (gctUINT8 *) Command->logical + Command->offset;
+		fetchSize    = offset - Command->offset;
+	}
+
+	bytes = 8;
+
+	/* Link in WAIT/LINK. */
+	gcmkONERROR(
+		gckHARDWARE_Link(hardware,
+						 link,
+						 fetchAddress,
+						 fetchSize,
+						 &bytes));
+#if MRVL_PRINT_CMD_BUFFER
+	_AddLink(Command, link, fetchAddress);
+#endif
+
+    /* Flush the cache for the command buffer. */
+    gcmkONERROR(gckOS_CacheFlush(Command->os,
+                                 Process,
+                                 flushPointer,
+                                 flushSize));
+
+#if gcdDUMP_COMMAND
+    _DumpCommand(Command, dataPointer, dataBytes);
+#endif
+
+	/* Execute the entire sequence. */
+	gcmkONERROR(
+		gckHARDWARE_Link(hardware,
+						 Command->wait,
+						 initialLink,
+						 initialSize,
+						 &Command->waitSize));
+
+    /* Flush the cache for the link. */
+    gcmkONERROR(gckOS_CacheFlush(Command->os,
+                                 gcvNULL,
+                                 Command->wait,
+                                 Command->waitSize));
+
+#if gcdDUMP_COMMAND
+    _DumpCommand(Command, Command->wait, Command->waitSize);
+#endif
+
+	/* Update command queue offset. */
+	Command->offset   = offset;
+	Command->newQueue = gcvFALSE;
+
+	/* Update address of last WAIT. */
+	Command->wait     = wait;
+	Command->waitSize = waitSize;
+
+	/* Update context and pipe select. */
+	Command->currentContext = context->id;
+	Command->pipeSelect     = context->currentPipe;
+
+	/* Update queue tail pointer. */
+	gcmkONERROR(
+		gckHARDWARE_UpdateQueueTail(hardware,
+									Command->logical,
+									Command->offset));
+
+#if gcdDUMP_COMMAND
+    gcmkPRINT("@[kernel.commit]");
+#endif
+
+    /* Release the command queue mutex. */
+    gcmkONERROR(gckOS_ReleaseMutex(Command->os, Command->mutexQueue));
+    --acquired;
+
+    /* Release the context switching mutex. */
+    gcmkONERROR(gckOS_ReleaseMutex(Command->os, Command->mutexContext));
+    --acquired;
+
+    /* Submit events if asked for. */
+    if (Command->submit)
+    {
+        /* Submit events. */
+        status = gckEVENT_Submit(Command->kernel->event, gcvFALSE, gcvFALSE);
+
+        if (gcmIS_SUCCESS(status))
+        {
+            /* Success. */
+            Command->submit = gcvFALSE;
+        }
+        else
+        {
+            gcmkTRACE_ZONE(gcvLEVEL_WARNING, gcvZONE_COMMAND,
+                           "gckEVENT_Submit returned %d",
+                           status);
+        }
+    }
+
+    /* Success. */
+    status = gcvSTATUS_OK;
+
+OnError:
+	if (acquired > 1)
+	{
+		/* Release the command queue mutex. */
+		gcmkVERIFY_OK(
+			gckOS_ReleaseMutex(Command->os, Command->mutexQueue));
+	}
+
+	if (acquired > 0)
+	{
+		/* Release the context switching mutex. */
+		gcmkVERIFY_OK(
+			gckOS_ReleaseMutex(Command->os, Command->mutexContext));
+	}
+
+	/* Unmap all mapped pointers. */
+	while (stack != gcvNULL)
+	{
+		gcsMAPPED_PTR map = stack;
+		stack             = map->next;
+
+		gcmkVERIFY_OK(
+			gckOS_UnmapUserPointer(Command->os,
+								   map->pointer,
+								   map->bytes,
+								   map->kernelPointer));
+
+		gcmkVERIFY_OK(
+			gckOS_Free(Command->os, map));
+	}
+
+	/* Return status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckCOMMAND_Reserve
+**
+**	Reserve space in the command queue.  Also acquire the command queue mutex.
+**
+**	INPUT:
+**
+**		gckCOMMAND Command
+**			Pointer to an gckCOMMAND object.
+**
+**		gctSIZE_T RequestedBytes
+**			Number of bytes previously reserved.
+**
+**	OUTPUT:
+**
+**		gctPOINTER * Buffer
+**          Pointer to a variable that will receive the address of the reserved
+**          space.
+**
+**      gctSIZE_T * BufferSize
+**          Pointer to a variable that will receive the number of bytes
+**          available in the command queue.
+*/
+gceSTATUS
+gckCOMMAND_Reserve(
+    IN gckCOMMAND Command,
+    IN gctSIZE_T RequestedBytes,
+	IN gctBOOL Locking,
+    OUT gctPOINTER * Buffer,
+    OUT gctSIZE_T * BufferSize
+    )
+{
+    gceSTATUS status;
+    gctSIZE_T requiredBytes, bytes;
+    gctBOOL acquired = gcvFALSE;
+
+    gcmkHEADER_ARG("Command=0x%x RequestedBytes=%lu Locking=%d",
+					Command, RequestedBytes, Locking);
+
+    /* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Command, gcvOBJ_COMMAND);
+
+	if (!Locking)
+	{
+	    /* Grab the conmmand queue mutex. */
+	gcmkONERROR(
+		gckOS_AcquireMutex(Command->os,
+		               Command->mutexQueue,
+			           gcvINFINITE));
+	    acquired = gcvTRUE;
+	}
+
+	/* Compute number of bytes required for WAIT/LINK. */
+	gcmkONERROR(
+		gckHARDWARE_WaitLink(Command->kernel->hardware,
+							 gcvNULL,
+							 Command->offset + gcmALIGN(RequestedBytes,
+														Command->alignment),
+							 &requiredBytes,
+							 gcvNULL,
+							 gcvNULL));
+
+	/* Compute total number of bytes required. */
+	requiredBytes += gcmALIGN(RequestedBytes, Command->alignment);
+
+	/* Compute number of bytes available in command queue. */
+	bytes = Command->pageSize - Command->offset;
+
+	if (bytes < requiredBytes)
+	{
+        /* Create a new command queue. */
+        gcmkONERROR(_NewQueue(Command, gcvTRUE));
+
+		/* Recompute number of bytes available in command queue. */
+		bytes = Command->pageSize - Command->offset;
+
+		if (bytes < requiredBytes)
+		{
+			/* Rare case, not enough room in command queue. */
+			gcmkONERROR(gcvSTATUS_BUFFER_TOO_SMALL);
+		}
+	}
+
+	/* Return pointer to empty slot command queue. */
+	*Buffer = (gctUINT8 *) Command->logical + Command->offset;
+
+	/* Return number of bytes left in command queue. */
+	*BufferSize = bytes;
+
+	/* Success. */
+	gcmkFOOTER_ARG("*Buffer=0x%x *BufferSize=%lu", *Buffer, *BufferSize);
+	return gcvSTATUS_OK;
+
+OnError:
+    if (acquired)
+    {
+        /* Release command queue mutex on error. */
+        gcmkVERIFY_OK(
+		gckOS_ReleaseMutex(Command->os, Command->mutexQueue));
+    }
+
+    /* Return status. */
+    gcmkFOOTER();
+    return status;
+}
+
+/*******************************************************************************
+**
+**	gckCOMMAND_Release
+**
+**	Release a previously reserved command queue.  The command FIFO mutex will be
+**  released.
+**
+**	INPUT:
+**
+**		gckCOMMAND Command
+**			Pointer to an gckCOMMAND object.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckCOMMAND_Release(
+    IN gckCOMMAND Command
+    )
+{
+	gceSTATUS status;
+
+	gcmkHEADER_ARG("Command=0x%x", Command);
+
+    /* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Command, gcvOBJ_COMMAND);
+
+    /* Release the command queue mutex. */
+    status = gckOS_ReleaseMutex(Command->os, Command->mutexQueue);
+
+    /* Return the status. */
+    gcmkFOOTER();
+    return status;
+}
+
+/*******************************************************************************
+**
+**	gckCOMMAND_Execute
+**
+**	Execute a previously reserved command queue by appending a WAIT/LINK command
+**  sequence after it and modifying the last WAIT into a LINK command.  The
+**  command FIFO mutex will be released whether this function succeeds or not.
+**
+**	INPUT:
+**
+**		gckCOMMAND Command
+**			Pointer to an gckCOMMAND object.
+**
+**		gctSIZE_T RequestedBytes
+**			Number of bytes previously reserved.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckCOMMAND_Execute(
+    IN gckCOMMAND Command,
+    IN gctSIZE_T RequestedBytes,
+	IN gctBOOL Locking
+    )
+{
+    gctUINT32 offset;
+    gctPOINTER address;
+    gctSIZE_T bytes;
+    gceSTATUS status;
+    gctPOINTER wait;
+    gctSIZE_T waitBytes;
+
+    gcmkHEADER_ARG("Command=0x%x RequestedBytes=%lu Locking=%d",
+					Command, RequestedBytes, Locking);
+
+    /* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Command, gcvOBJ_COMMAND);
+
+	if (Command->kernel->notifyIdle)
+	{
+		/* Increase the commit stamp */
+		Command->commitStamp++;
+
+		/* Set busy if idle */
+		if (Command->idle)
+		{
+			Command->idle = gcvFALSE;
+
+			gcmkVERIFY_OK(gckOS_NotifyIdle(Command->os, gcvFALSE));
+		}
+	}
+
+	/* Compute offset for WAIT/LINK. */
+	offset = Command->offset + RequestedBytes;
+
+	/* Compute number of byts left in command queue. */
+	bytes = Command->pageSize - offset;
+
+	/* Append WAIT/LINK in command queue. */
+	gcmkONERROR(
+		gckHARDWARE_WaitLink(Command->kernel->hardware,
+							 (gctUINT8 *) Command->logical + offset,
+							 offset,
+							 &bytes,
+							 &wait,
+							 &waitBytes));
+
+	if (Command->newQueue)
+	{
+		/* For a new command queue, point to the start of the command
+		** queue and include both the commands inserted at the head of it
+		** and the WAIT/LINK. */
+		address = Command->logical;
+		bytes  += offset;
+	}
+	else
+	{
+		/* For an existing command queue, point to the current offset and
+		** include the WAIT/LINK. */
+		address = (gctUINT8 *) Command->logical + Command->offset;
+		bytes  += RequestedBytes;
+	}
+
+    /* Flush the cache. */
+    gcmkONERROR(gckOS_CacheFlush(Command->os, gcvNULL, address, bytes));
+
+#if gcdDUMP_COMMAND
+    _DumpCommand(Command, address, bytes);
+#endif
+
+    /* Convert the last WAIT into a LINK. */
+    gcmkONERROR(gckHARDWARE_Link(Command->kernel->hardware,
+                                 Command->wait,
+                                 address,
+                                 bytes,
+                                 &Command->waitSize));
+#if MRVL_PRINT_CMD_BUFFER
+	_AddLink(Command, Command->wait, address);
+#endif
+
+    /* Flush the cache. */
+    gcmkONERROR(gckOS_CacheFlush(Command->os,
+                                 gcvNULL,
+                                 Command->wait,
+                                 Command->waitSize));
+
+#if gcdDUMP_COMMAND
+    _DumpCommand(Command, Command->wait, 8);
+#endif
+
+	/* Update the pointer to the last WAIT. */
+	Command->wait     = wait;
+	Command->waitSize = waitBytes;
+
+	/* Update the command queue. */
+	Command->offset  += bytes;
+	Command->newQueue = gcvFALSE;
+
+	/* Update queue tail pointer. */
+	gcmkONERROR(
+		gckHARDWARE_UpdateQueueTail(Command->kernel->hardware,
+									Command->logical,
+									Command->offset));
+
+#if gcdDUMP_COMMAND
+    gcmkPRINT("@[kernel.execute]");
+#endif
+
+	if (!Locking)
+	{
+	    /* Release the command queue mutex. */
+	gcmkONERROR(
+		gckOS_ReleaseMutex(Command->os, Command->mutexQueue));
+	}
+
+    /* Submit events if asked for. */
+    if (Command->submit)
+    {
+        /* Submit events. */
+        status = gckEVENT_Submit(Command->kernel->event, gcvFALSE, gcvFALSE);
+
+        if (gcmIS_SUCCESS(status))
+        {
+            /* Success. */
+            Command->submit = gcvFALSE;
+        }
+        else
+        {
+            gcmkTRACE_ZONE(gcvLEVEL_WARNING, gcvZONE_COMMAND,
+                           "gckEVENT_Submit returned %d",
+                           status);
+        }
+    }
+
+    /* Success. */
+    gcmkFOOTER_NO();
+    return gcvSTATUS_OK;
+
+OnError:
+	/* Release the command queue mutex. */
+	gcmkVERIFY_OK(
+	gckOS_ReleaseMutex(Command->os, Command->mutexQueue));
+
+    /* Return the status. */
+    gcmkFOOTER();
+    return status;
+}
+
+/*******************************************************************************
+**
+**	gckCOMMAND_Stall
+**
+**	The calling thread will be suspended until the command queue has been
+**  completed.
+**
+**	INPUT:
+**
+**		gckCOMMAND Command
+**			Pointer to an gckCOMMAND object.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckCOMMAND_Stall(
+    IN gckCOMMAND Command
+    )
+{
+    gckOS os;
+    gckHARDWARE hardware;
+    gckEVENT event;
+    gceSTATUS status;
+	gctSIGNAL signal = gcvNULL;
+
+	gcmkHEADER_ARG("Command=0x%x", Command);
+
+    /* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Command, gcvOBJ_COMMAND);
+
+#if gcdNULL_DRIVER == 2
+	/* Do nothing with infinite hardware. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+#endif
+
+    /* Extract the gckOS object pointer. */
+    os = Command->os;
+    gcmkVERIFY_OBJECT(os, gcvOBJ_OS);
+
+    /* Extract the gckHARDWARE object pointer. */
+    hardware = Command->kernel->hardware;
+    gcmkVERIFY_OBJECT(hardware, gcvOBJ_HARDWARE);
+
+    /* Extract the gckEVENT object pointer. */
+    event = Command->kernel->event;
+    gcmkVERIFY_OBJECT(event, gcvOBJ_EVENT);
+
+    /* Allocate the signal. */
+	gcmkONERROR(
+		gckOS_CreateSignal(os, gcvTRUE, &signal));
+
+    /* Append the EVENT command to trigger the signal. */
+    gcmkONERROR(gckEVENT_Signal(event,
+                                signal,
+                                gcvKERNEL_PIXEL,
+								gcvFALSE));
+
+    /* Submit the event queue. */
+	gcmkONERROR(gckEVENT_Submit(event, gcvTRUE, gcvFALSE));
+
+#if gcdDUMP_COMMAND
+    gcmkPRINT("@[kernel.stall]");
+#endif
+
+    if (status == gcvSTATUS_CHIP_NOT_READY)
+    {
+        /* Error. */
+        goto OnError;
+    }
+
+	do
+	{
+		/* Wait for the signal. */
+		status = gckOS_WaitSignal(os, signal, gcvINFINITE);
+
+		if (status == gcvSTATUS_TIMEOUT)
+		{
+#if gcdDEBUG
+			gctUINT32 idle;
+
+			/* IDLE */
+			gckOS_ReadRegister(Command->os, 0x0004, &idle);
+
+			gcmkTRACE(gcvLEVEL_ERROR,
+					  "%s(%d): idle=%08x",
+					  __FUNCTION__, __LINE__, idle);
+			gckOS_Log(_GFX_LOG_WARNING_, "%s : %d : idle register = 0x%08x \n",
+                            __FUNCTION__, __LINE__, idle);
+#endif
+
+#if MRVL_PRINT_CMD_BUFFER
+            {
+			gctUINT i;
+                gctUINT32 idle;
+			gctUINT32 intAck;
+			gctUINT32 prevAddr = 0;
+			gctUINT32 currAddr;
+			gctBOOL changeDetected;
+
+			changeDetected = gcvFALSE;
+
+                /* IDLE */
+			    gckOS_ReadRegister(Command->os, 0x0004, &idle);
+
+				/* INT ACK */
+				gckOS_ReadRegister(Command->os, 0x0010, &intAck);
+
+				/* DMA POS */
+				for (i = 0; i < 300; i += 1)
+				{
+					gckOS_ReadRegister(Command->os, 0x0664, &currAddr);
+
+					if ((i > 0) && (prevAddr != currAddr))
+					{
+						changeDetected = gcvTRUE;
+					}
+
+					prevAddr = currAddr;
+				}
+
+				gcmTRACE(0,
+					"\n%s(%d):\n"
+					"  idle = 0x%08X\n"
+					"  int  = 0x%08X\n"
+					"  dma  = 0x%08X (change=%d)\n",
+					__FUNCTION__, __LINE__,
+					idle,
+					intAck,
+					currAddr,
+					changeDetected
+					);
+
+				_PrintCmdBuffer(Command, currAddr);
+				_PrintLinkChain();
+            }
+#endif
+
+
+#if MRVL_LOW_POWER_MODE_DEBUG
+		{
+			int i = 0;
+
+			printk(">>>>>>>>>>>>galDevice->kernel->kernelMSG\n");
+			printk("galDevice->kernel->msgLen=%d\n",Command->kernel->msgLen);
+
+			for(i=0;i<Command->kernel->msgLen;i+=1024)
+			{
+				Command->kernel->kernelMSG[i+1023] = '\0';
+				printk("%s\n",(char*)Command->kernel->kernelMSG + i);
+			}
+		}
+#endif
+#ifdef __QNXNTO__
+            gctUINT32 reg_cmdbuf_fetch;
+            gctUINT32 reg_intr;
+
+            gcmkVERIFY_OK(
+                    gckOS_ReadRegister(Command->kernel->hardware->os, 0x0664, &reg_cmdbuf_fetch));
+
+            if (idle == 0x7FFFFFFE)
+            {
+                /*
+                 * GPU is idle so there should not be pending interrupts.
+                 * Just double check.
+                 *
+                 * Note that reading interrupt register clears it.
+                 * That's why we don't read it in all cases.
+                 */
+                gcmkVERIFY_OK(
+                        gckOS_ReadRegister(Command->kernel->hardware->os, 0x10, &reg_intr));
+
+                slogf(
+                    _SLOG_SETCODE(1, 0),
+                    _SLOG_CRITICAL,
+                    "GALcore: Stall timeout (idle = 0x%X, command buffer fetch = 0x%X, interrupt = 0x%X)",
+                    idle, reg_cmdbuf_fetch, reg_intr);
+            }
+            else
+            {
+                slogf(
+                    _SLOG_SETCODE(1, 0),
+                    _SLOG_CRITICAL,
+                    "GALcore: Stall timeout (idle = 0x%X, command buffer fetch = 0x%X)",
+                    idle, reg_cmdbuf_fetch);
+            }
+#endif
+			gcmkVERIFY_OK(
+				gckOS_MemoryBarrier(os, gcvNULL));
+		}
+
+	}
+	while (gcmIS_ERROR(status));
+
+	/* Delete the signal. */
+	gcmkVERIFY_OK(gckOS_DestroySignal(os, signal));
+
+    /* Success. */
+    gcmkFOOTER_NO();
+    return gcvSTATUS_OK;
+
+OnError:
+    /* Free the signal. */
+    if (signal != gcvNULL)
+    {
+	gcmkVERIFY_OK(gckOS_DestroySignal(os, signal));
+    }
+
+    /* Return the status. */
+    gcmkFOOTER();
+    return status;
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/gc_hal_kernel_mmu.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/gc_hal_kernel_mmu.c
@@ -0,0 +1,928 @@
+/****************************************************************************
+*
+*    Copyright (C) 2005 - 2010 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public License as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+#include "gc_hal_kernel_precomp.h"
+
+#define _GC_OBJ_ZONE	gcvZONE_MMU
+
+typedef enum _gceMMU_TYPE
+{
+	gcvMMU_USED = 0,
+	gcvMMU_SINGLE,
+	gcvMMU_FREE,
+}
+gceMMU_TYPE;
+
+static gceSTATUS
+_Link(
+	IN gckMMU Mmu,
+	IN gctUINT32 Index,
+	IN gctUINT32 Next
+	)
+{
+	if (Index >= Mmu->pageTableEntries)
+	{
+		/* Just move heap pointer. */
+		Mmu->heapList = Next;
+	}
+	else
+	{
+		/* Address page table. */
+		gctUINT32_PTR pageTable = Mmu->pageTableLogical;
+
+		/* Dispatch on node type. */
+		switch (pageTable[Index] & 0xFF)
+		{
+		case gcvMMU_SINGLE:
+			/* Set single index. */
+			pageTable[Index] = (Next << 8) | gcvMMU_SINGLE;
+			break;
+
+		case gcvMMU_FREE:
+			/* Set index. */
+			pageTable[Index + 1] = Next;
+			break;
+
+		default:
+			gcmkFATAL("MMU table correcupted at index %u!", Index);
+			return gcvSTATUS_HEAP_CORRUPTED;
+		}
+	}
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+static gceSTATUS
+_AddFree(
+	IN gckMMU Mmu,
+	IN gctUINT32 Index,
+	IN gctUINT32 Node,
+	IN gctUINT32 Count
+	)
+{
+	gctUINT32_PTR pageTable = Mmu->pageTableLogical;
+
+	if (Count == 1)
+	{
+		/* Initialize a single page node. */
+		pageTable[Node] = (~0U << 8) | gcvMMU_SINGLE;
+	}
+	else
+	{
+		/* Initialize the node. */
+		pageTable[Node + 0] = (Count << 8) | gcvMMU_FREE;
+		pageTable[Node + 1] = ~0U;
+	}
+
+	/* Append the node. */
+	return _Link(Mmu, Index, Node);
+}
+
+static gceSTATUS
+_Collect(
+	IN gckMMU Mmu
+	)
+{
+	gctUINT32_PTR pageTable = Mmu->pageTableLogical;
+	gceSTATUS status;
+	gctUINT32 i, previous, start = 0, count = 0;
+
+	/* Flush the MMU cache. */
+	gcmkONERROR(
+		gckHARDWARE_FlushMMU(Mmu->hardware));
+
+	previous = Mmu->heapList = ~0U;
+	Mmu->freeNodes = gcvFALSE;
+
+	/* Walk the entire page table. */
+	for (i = 0; i < Mmu->pageTableEntries; ++i)
+	{
+		/* Dispatch based on type of page. */
+		switch (pageTable[i] & 0xFF)
+		{
+		case gcvMMU_USED:
+			/* Used page, so close any open node. */
+			if (count > 0)
+			{
+				/* Add the node. */
+				gcmkONERROR(_AddFree(Mmu, previous, start, count));
+
+				/* Reset the node. */
+				previous = start;
+				count    = 0;
+			}
+			break;
+
+		case gcvMMU_SINGLE:
+			/* Single free node. */
+			if (count++ == 0)
+			{
+				/* Start a new node. */
+				start = i;
+			}
+			break;
+
+		case gcvMMU_FREE:
+			/* A free node. */
+			if (count == 0)
+			{
+				/* Start a new node. */
+				start = i;
+			}
+
+			/* Advance the count. */
+			count += pageTable[i] >> 8;
+
+			/* Advance the index into the page table. */
+			i     += (pageTable[i] >> 8) - 1;
+			break;
+
+		default:
+			gcmkFATAL("MMU page table correcupted at index %u!", i);
+			return gcvSTATUS_HEAP_CORRUPTED;
+		}
+	}
+
+	/* See if we have an open node left. */
+	if (count > 0)
+	{
+		/* Add the node to the list. */
+		gcmkONERROR(_AddFree(Mmu, previous, start, count));
+	}
+
+	gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_MMU,
+				   "Performed a garbage collection of the MMU heap.");
+
+	/* Success. */
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Return the staus. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckMMU_Construct
+**
+**	Construct a new gckMMU object.
+**
+**	INPUT:
+**
+**		gckKERNEL Kernel
+**			Pointer to an gckKERNEL object.
+**
+**		gctSIZE_T MmuSize
+**			Number of bytes for the page table.
+**
+**	OUTPUT:
+**
+**		gckMMU * Mmu
+**			Pointer to a variable that receives the gckMMU object pointer.
+*/
+gceSTATUS
+gckMMU_Construct(
+	IN gckKERNEL Kernel,
+	IN gctSIZE_T MmuSize,
+	OUT gckMMU * Mmu
+	)
+{
+	gckOS os;
+	gckHARDWARE hardware;
+	gceSTATUS status;
+	gckMMU mmu = gcvNULL;
+	gctUINT32_PTR pageTable;
+
+	gcmkHEADER_ARG("Kernel=0x%x MmuSize=%lu", Kernel, MmuSize);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Kernel, gcvOBJ_KERNEL);
+	gcmkVERIFY_ARGUMENT(MmuSize > 0);
+	gcmkVERIFY_ARGUMENT(Mmu != gcvNULL);
+
+	/* Extract the gckOS object pointer. */
+	os = Kernel->os;
+	gcmkVERIFY_OBJECT(os, gcvOBJ_OS);
+
+	/* Extract the gckHARDWARE object pointer. */
+	hardware = Kernel->hardware;
+	gcmkVERIFY_OBJECT(hardware, gcvOBJ_HARDWARE);
+
+	/* Allocate memory for the gckMMU object. */
+	gcmkONERROR(
+		gckOS_Allocate(os, sizeof(struct _gckMMU), (gctPOINTER *) &mmu));
+
+	/* Initialize the gckMMU object. */
+	mmu->object.type      = gcvOBJ_MMU;
+	mmu->os               = os;
+	mmu->hardware         = hardware;
+	mmu->pageTableMutex   = gcvNULL;
+	mmu->pageTableLogical = gcvNULL;
+#ifdef __QNXNTO__
+	mmu->nodeList         = gcvNULL;
+	mmu->nodeMutex		  = gcvNULL;
+#endif
+
+	/* Create the page table mutex. */
+	gcmkONERROR(gckOS_CreateMutex(os, &mmu->pageTableMutex));
+
+#ifdef __QNXNTO__
+	/* Create the node list mutex. */
+	gcmkONERROR(gckOS_CreateMutex(os, &mmu->nodeMutex));
+#endif
+
+	/* Allocate the page table (not more than 256 kB). */
+	mmu->pageTableSize = gcmMIN(MmuSize, 256 << 10);
+	gcmkONERROR(
+		gckOS_AllocateContiguous(os,
+								 gcvFALSE,
+								 &mmu->pageTableSize,
+								 &mmu->pageTablePhysical,
+								 (gctPOINTER *) &mmu->pageTableLogical));
+
+	/* Compute number of entries in page table. */
+	mmu->pageTableEntries = mmu->pageTableSize / sizeof(gctUINT32);
+
+	/* Mark all pages as free. */
+	pageTable      = mmu->pageTableLogical;
+	pageTable[0]   = (mmu->pageTableEntries << 8) | gcvMMU_FREE;
+	pageTable[1]   = ~0U;
+	mmu->heapList  = 0;
+	mmu->freeNodes = gcvFALSE;
+
+	/* Set page table address. */
+	gcmkONERROR(
+		gckHARDWARE_SetMMU(hardware, (gctPOINTER) mmu->pageTableLogical));
+
+	/* Return the gckMMU object pointer. */
+	*Mmu = mmu;
+
+	/* Success. */
+	gcmkFOOTER_ARG("*Mmu=0x%x", *Mmu);
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Roll back. */
+	if (mmu != gcvNULL)
+	{
+		if (mmu->pageTableLogical != gcvNULL)
+		{
+			/* Free the page table. */
+			gcmkVERIFY_OK(
+				gckOS_FreeContiguous(os,
+									 mmu->pageTablePhysical,
+									 (gctPOINTER) mmu->pageTableLogical,
+									 mmu->pageTableSize));
+		}
+
+		if (mmu->pageTableMutex != gcvNULL)
+		{
+			/* Delete the mutex. */
+			gcmkVERIFY_OK(
+				gckOS_DeleteMutex(os, mmu->pageTableMutex));
+		}
+
+#ifdef __QNXNTO__
+		if (mmu->nodeMutex != gcvNULL)
+		{
+			/* Delete the mutex. */
+			gcmkVERIFY_OK(
+				gckOS_DeleteMutex(os, mmu->nodeMutex));
+		}
+#endif
+
+		/* Mark the gckMMU object as unknown. */
+		mmu->object.type = gcvOBJ_UNKNOWN;
+
+		/* Free the allocates memory. */
+		gcmkVERIFY_OK(gckOS_Free(os, mmu));
+	}
+
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckMMU_Destroy
+**
+**	Destroy a gckMMU object.
+**
+**	INPUT:
+**
+**		gckMMU Mmu
+**			Pointer to an gckMMU object.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckMMU_Destroy(
+	IN gckMMU Mmu
+	)
+{
+#ifdef __QNXNTO__
+    gcuVIDMEM_NODE_PTR node, next;
+#endif
+
+	gcmkHEADER_ARG("Mmu=0x%x", Mmu);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Mmu, gcvOBJ_MMU);
+
+#ifdef __QNXNTO__
+	/* Free all associated virtual memory. */
+	for (node = Mmu->nodeList; node != gcvNULL; node = next)
+	{
+		next = node->Virtual.next;
+	    gcmkVERIFY_OK(gckVIDMEM_Free(node, gcvNULL));
+	}
+#endif
+
+	/* Free the page table. */
+	gcmkVERIFY_OK(
+		gckOS_FreeContiguous(Mmu->os,
+							 Mmu->pageTablePhysical,
+							 (gctPOINTER) Mmu->pageTableLogical,
+							 Mmu->pageTableSize));
+
+#ifdef __QNXNTO__
+	/* Delete the node list mutex. */
+	gcmkVERIFY_OK(gckOS_DeleteMutex(Mmu->os, Mmu->nodeMutex));
+#endif
+
+	/* Delete the page table mutex. */
+	gcmkVERIFY_OK(gckOS_DeleteMutex(Mmu->os, Mmu->pageTableMutex));
+
+	/* Mark the gckMMU object as unknown. */
+	Mmu->object.type = gcvOBJ_UNKNOWN;
+
+	/* Free the gckMMU object. */
+	gcmkVERIFY_OK(gckOS_Free(Mmu->os, Mmu));
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckMMU_AllocatePages
+**
+**	Allocate pages inside the page table.
+**
+**	INPUT:
+**
+**		gckMMU Mmu
+**			Pointer to an gckMMU object.
+**
+**		gctSIZE_T PageCount
+**			Number of pages to allocate.
+**
+**	OUTPUT:
+**
+**		gctPOINTER * PageTable
+**			Pointer to a variable that receives the	base address of the page
+**			table.
+**
+**		gctUINT32 * Address
+**			Pointer to a variable that receives the hardware specific address.
+*/
+gceSTATUS
+gckMMU_AllocatePages(
+	IN gckMMU Mmu,
+	IN gctSIZE_T PageCount,
+	OUT gctPOINTER * PageTable,
+	OUT gctUINT32 * Address
+	)
+{
+	gceSTATUS status;
+	gctBOOL mutex = gcvFALSE;
+	gctUINT32 index = 0, previous = ~0U, left;
+	gctUINT32_PTR pageTable;
+	gctBOOL gotIt;
+	gctUINT32 address;
+
+	gcmkHEADER_ARG("Mmu=0x%x PageCount=%lu", Mmu, PageCount);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Mmu, gcvOBJ_MMU);
+	gcmkVERIFY_ARGUMENT(PageCount > 0);
+	gcmkVERIFY_ARGUMENT(PageTable != gcvNULL);
+
+	if (PageCount > Mmu->pageTableEntries)
+	{
+		/* Not enough pages avaiable. */
+		gcmkONERROR(gcvSTATUS_OUT_OF_RESOURCES);
+	}
+
+	/* Grab the mutex. */
+	gcmkONERROR(gckOS_AcquireMutex(Mmu->os, Mmu->pageTableMutex, gcvINFINITE));
+	mutex = gcvTRUE;
+
+	/* Cast pointer to page table. */
+	for (pageTable = Mmu->pageTableLogical, gotIt = gcvFALSE; !gotIt;)
+	{
+		/* Walk the heap list. */
+		for (index = Mmu->heapList; !gotIt && (index < Mmu->pageTableEntries);)
+		{
+			/* Check the node type. */
+			switch (pageTable[index] & 0xFF)
+			{
+			case gcvMMU_SINGLE:
+				/* Single odes are valid if we only need 1 page. */
+				if (PageCount == 1)
+				{
+					gotIt = gcvTRUE;
+				}
+				else
+				{
+					/* Move to next node. */
+					previous = index;
+					index    = pageTable[index] >> 8;
+				}
+				break;
+
+			case gcvMMU_FREE:
+				/* Test if the node has enough space. */
+				if (PageCount <= (pageTable[index] >> 8))
+				{
+					gotIt = gcvTRUE;
+				}
+				else
+				{
+					/* Move to next node. */
+					previous = index;
+					index    = pageTable[index + 1];
+				}
+				break;
+
+			default:
+				gcmkFATAL("MMU table correcupted at index %u!", index);
+				gcmkONERROR(gcvSTATUS_OUT_OF_RESOURCES);
+			}
+		}
+
+		/* Test if we are out of memory. */
+		if (index >= Mmu->pageTableEntries)
+		{
+			if (Mmu->freeNodes)
+			{
+				/* Time to move out the trash! */
+				gcmkONERROR(_Collect(Mmu));
+			}
+			else
+			{
+				/* Out of resources. */
+				gcmkONERROR(gcvSTATUS_OUT_OF_RESOURCES);
+			}
+		}
+	}
+
+	switch (pageTable[index] & 0xFF)
+	{
+	case gcvMMU_SINGLE:
+		/* Unlink single node from free list. */
+		gcmkONERROR(
+			_Link(Mmu, previous, pageTable[index] >> 8));
+		break;
+
+	case gcvMMU_FREE:
+		/* Check how many pages will be left. */
+		left = (pageTable[index] >> 8) - PageCount;
+		switch (left)
+		{
+		case 0:
+			/* The entire node is consumed, just unlink it. */
+			gcmkONERROR(
+				_Link(Mmu, previous, pageTable[index + 1]));
+			break;
+
+		case 1:
+			/* One page will remain.  Convert the node to a single node and
+			** advance the index. */
+			pageTable[index] = (pageTable[index + 1] << 8) | gcvMMU_SINGLE;
+			index ++;
+			break;
+
+		default:
+			/* Enough pages remain for a new node.  However, we will just adjust
+			** the size of the current node and advance the index. */
+			pageTable[index] = (left << 8) | gcvMMU_FREE;
+			index += left;
+			break;
+		}
+		break;
+	}
+
+	/* Mark node as used. */
+	pageTable[index] = gcvMMU_USED;
+
+	/* Return pointer to page table. */
+	*PageTable = &pageTable[index];
+
+	/* Build virtual address. */
+	gcmkONERROR(
+		gckHARDWARE_BuildVirtualAddress(Mmu->hardware, index, 0, &address));
+
+	if (Address != gcvNULL)
+	{
+		*Address = address;
+	}
+
+	/* Release the mutex. */
+	gcmkVERIFY_OK(gckOS_ReleaseMutex(Mmu->os, Mmu->pageTableMutex));
+
+	/* Success. */
+	gcmkFOOTER_ARG("*PageTable=0x%x *Address=%08x",
+				   *PageTable, gcmOPT_VALUE(Address));
+	return gcvSTATUS_OK;
+
+OnError:
+	if (mutex)
+	{
+		/* Release the mutex. */
+		gcmkVERIFY_OK(gckOS_ReleaseMutex(Mmu->os, Mmu->pageTableMutex));
+	}
+
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckMMU_FreePages
+**
+**	Free pages inside the page table.
+**
+**	INPUT:
+**
+**		gckMMU Mmu
+**			Pointer to an gckMMU object.
+**
+**		gctPOINTER PageTable
+**			Base address of the page table to free.
+**
+**		gctSIZE_T PageCount
+**			Number of pages to free.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckMMU_FreePages(
+	IN gckMMU Mmu,
+	IN gctPOINTER PageTable,
+	IN gctSIZE_T PageCount
+	)
+{
+	gctUINT32_PTR pageTable;
+
+	gcmkHEADER_ARG("Mmu=0x%x PageTable=0x%x PageCount=%lu",
+				   Mmu, PageTable, PageCount);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Mmu, gcvOBJ_MMU);
+	gcmkVERIFY_ARGUMENT(PageTable != gcvNULL);
+	gcmkVERIFY_ARGUMENT(PageCount > 0);
+
+	/* Convert the pointer. */
+	pageTable = (gctUINT32_PTR) PageTable;
+
+	if (PageCount == 1)
+	{
+		/* Single page node. */
+		pageTable[0] = (~0U << 8) | gcvMMU_SINGLE;
+	}
+	else
+	{
+		/* Mark the node as free. */
+		pageTable[0] = (PageCount << 8) | gcvMMU_FREE;
+		pageTable[1] = ~0U;
+	}
+
+	/* We have free nodes. */
+	Mmu->freeNodes = gcvTRUE;
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+}
+
+#ifdef __QNXNTO__
+gceSTATUS
+gckMMU_InsertNode(
+    IN gckMMU Mmu,
+    IN gcuVIDMEM_NODE_PTR Node)
+{
+    gceSTATUS status;
+    gctBOOL mutex = gcvFALSE;
+
+    gcmkHEADER_ARG("Mmu=0x%x Node=0x%x", Mmu, Node);
+
+    gcmkVERIFY_OBJECT(Mmu, gcvOBJ_MMU);
+
+    gcmkONERROR(gckOS_AcquireMutex(Mmu->os, Mmu->nodeMutex, gcvINFINITE));
+    mutex = gcvTRUE;
+
+    Node->Virtual.next = Mmu->nodeList;
+    Mmu->nodeList = Node;
+
+    gcmkVERIFY_OK(gckOS_ReleaseMutex(Mmu->os, Mmu->nodeMutex));
+
+    gcmkFOOTER();
+    return gcvSTATUS_OK;
+
+OnError:
+    if (mutex)
+    {
+        gcmkVERIFY_OK(gckOS_ReleaseMutex(Mmu->os, Mmu->nodeMutex));
+    }
+
+    gcmkFOOTER();
+    return status;
+}
+
+gceSTATUS
+gckMMU_RemoveNode(
+    IN gckMMU Mmu,
+    IN gcuVIDMEM_NODE_PTR Node)
+{
+    gceSTATUS status;
+    gctBOOL mutex = gcvFALSE;
+    gcuVIDMEM_NODE_PTR *iter;
+
+    gcmkHEADER_ARG("Mmu=0x%x Node=0x%x", Mmu, Node);
+
+    gcmkVERIFY_OBJECT(Mmu, gcvOBJ_MMU);
+
+    gcmkONERROR(gckOS_AcquireMutex(Mmu->os, Mmu->nodeMutex, gcvINFINITE));
+    mutex = gcvTRUE;
+
+	for (iter = &Mmu->nodeList; *iter; iter = &(*iter)->Virtual.next)
+	{
+		if (*iter == Node)
+		{
+			*iter = Node->Virtual.next;
+			break;
+		}
+	}
+
+    gcmkVERIFY_OK(gckOS_ReleaseMutex(Mmu->os, Mmu->nodeMutex));
+
+    gcmkFOOTER();
+    return gcvSTATUS_OK;
+
+OnError:
+    if (mutex)
+    {
+        gcmkVERIFY_OK(gckOS_ReleaseMutex(Mmu->os, Mmu->nodeMutex));
+    }
+
+    gcmkFOOTER();
+    return status;
+}
+
+gceSTATUS
+gckMMU_FreeHandleMemory(
+    IN gckMMU Mmu,
+    IN gctHANDLE Handle
+    )
+{
+    gceSTATUS status;
+    gctBOOL acquired = gcvFALSE;
+    gcuVIDMEM_NODE_PTR curr, next;
+
+    gcmkHEADER_ARG("Mmu=0x%x Handle=0x%x", Mmu, Handle);
+
+    gcmkVERIFY_OBJECT(Mmu, gcvOBJ_MMU);
+
+    gcmkONERROR(gckOS_AcquireMutex(Mmu->os, Mmu->nodeMutex, gcvINFINITE));
+    acquired = gcvTRUE;
+
+    for (curr = Mmu->nodeList; curr != gcvNULL; curr = next)
+    {
+        next = curr->Virtual.next;
+
+        if (curr->Virtual.handle == Handle)
+        {
+            while (curr->Virtual.locked > 0 || curr->Virtual.unlockPending)
+            {
+                gcmkONERROR(gckVIDMEM_Unlock(curr, gcvSURF_TYPE_UNKNOWN, gcvNULL, gcvNULL));
+            }
+
+            gcmkVERIFY_OK(gckVIDMEM_Free(curr, gcvNULL));
+        }
+    }
+
+    gcmkVERIFY_OK(gckOS_ReleaseMutex(Mmu->os, Mmu->nodeMutex));
+
+    gcmkFOOTER();
+    return gcvSTATUS_OK;
+
+OnError:
+    if (acquired)
+    {
+        gcmkVERIFY_OK(gckOS_ReleaseMutex(Mmu->os, Mmu->nodeMutex));
+    }
+
+    gcmkFOOTER();
+    return status;
+}
+#endif
+
+/******************************************************************************
+****************************** T E S T   C O D E ******************************
+******************************************************************************/
+
+#if defined gcdHAL_TEST
+
+#include <stdlib.h>
+#define gcmRANDOM(n) (rand() % n)
+
+typedef struct
+{
+	gctSIZE_T pageCount;
+	gctUINT32_PTR pageTable;
+}
+gcsMMU_TEST;
+
+gceSTATUS
+gckMMU_Test(
+	IN gckMMU Mmu,
+	IN gctSIZE_T Vectors,
+	IN gctINT MaxSize
+	)
+{
+	const gctINT nodeCount = MaxSize / 4;
+	gcsMMU_TEST * nodes = gcvNULL;
+	gceSTATUS status, failure = gcvSTATUS_OK;
+	gctSIZE_T i, count;
+	gctUINT32_PTR pageTable;
+	gctINT index;
+
+	/* Allocate the node array. */
+	gcmkONERROR(
+		gckOS_Allocate(Mmu->os,
+					   nodeCount * gcmSIZEOF(gcsMMU_TEST),
+					   (gctPOINTER *) &nodes));
+
+	/* Mark all nodes as free. */
+	gcmkONERROR(
+		gckOS_ZeroMemory(nodes, nodeCount * gcmSIZEOF(gcsMMU_TEST)));
+
+	/* Loop through all vectors. */
+	while (Vectors-- > 0)
+	{
+		/* Get a random index. */
+		index = gcmRANDOM(nodeCount);
+
+		/* Test if we need to allocate pages. */
+		if (nodes[index].pageCount == 0)
+		{
+			/* Generate a random page count. */
+			do
+			{
+				count = gcmRANDOM(MaxSize);
+			}
+			while (count == 0);
+
+			/* Allocate pages. */
+			status = gckMMU_AllocatePages(Mmu,
+										  count,
+										  (gctPOINTER *) &pageTable,
+										  gcvNULL);
+
+			if (gcmIS_SUCCESS(status))
+			{
+				/* Mark node as allocated. */
+				nodes[index].pageCount = count;
+				nodes[index].pageTable = pageTable;
+
+				/* Put signature in the page table. */
+				for (i = 0; i < count; ++i)
+				{
+					pageTable[i] = (index << 8) | gcvMMU_USED;
+				}
+			}
+			else
+			{
+				gcmkTRACE(gcvLEVEL_WARNING,
+						 "gckMMU_Test: Failed to allocate %u pages",
+						 count);
+			}
+		}
+		else
+		{
+			/* Verify the page table. */
+			pageTable = nodes[index].pageTable;
+			for (i = 0; i < nodes[index].pageCount; ++i)
+			{
+				if (pageTable[i] != ((index << 8) | gcvMMU_USED))
+				{
+					gcmkFATAL("gckMMU_Test: Corruption detected at page %u",
+							 index);
+
+					failure = gcvSTATUS_HEAP_CORRUPTED;
+				}
+			}
+
+			/* Free the pages. */
+			status = gckMMU_FreePages(Mmu, pageTable, nodes[index].pageCount);
+
+			if (gcmIS_ERROR(status))
+			{
+				gcmkFATAL("gckMMU_Test: Cannot free %u pages at 0x%x (index=%u)",
+						 nodes[index].pageCount, pageTable, index);
+
+				failure = status;
+			}
+
+			/* Mark the node as free. */
+			nodes[index].pageCount = 0;
+		}
+	}
+
+	/* Walk the entire array of nodes. */
+	for (index = 0; index < nodeCount; ++index)
+	{
+		/* Test if we need to free pages. */
+		if (nodes[index].pageCount != 0)
+		{
+			/* Verify the page table. */
+			pageTable = nodes[index].pageTable;
+			for (i = 0; i < nodes[index].pageCount; ++i)
+			{
+				if (pageTable[i] != ((index << 8) | gcvMMU_USED))
+				{
+					gcmkFATAL("gckMMU_Test: Corruption detected at page %u",
+							 index);
+
+					failure = gcvSTATUS_HEAP_CORRUPTED;
+				}
+			}
+
+			/* Free the pages. */
+			status = gckMMU_FreePages(Mmu, pageTable, nodes[index].pageCount);
+
+			if (gcmIS_ERROR(status))
+			{
+				gcmkFATAL("gckMMU_Test: Cannot free %u pages at 0x%x (index=%u)",
+						 nodes[index].pageCount, pageTable, index);
+
+				failure = status;
+			}
+		}
+	}
+
+	/* Perform garbage collection. */
+	gcmkONERROR(_Collect(Mmu));
+
+	/* Verify we did not loose any nodes. */
+	if ((Mmu->heapList != 0)
+	||  ((Mmu->pageTableLogical[0] & 0xFF) != gcvMMU_FREE)
+	||  (Mmu->pageTableEntries != (Mmu->pageTableLogical[0] >> 8))
+	)
+	{
+		gcmkFATAL("gckMMU_Test: Detected leaking in the page table.");
+
+		failure = gcvSTATUS_HEAP_CORRUPTED;
+	}
+
+OnError:
+	/* Free the array of nodes. */
+	if (nodes != gcvNULL)
+	{
+		gcmkVERIFY_OK(gckOS_Free(Mmu->os, nodes));
+	}
+
+	/* Return test status. */
+	return failure;
+}
+#endif
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/makefile.linux
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/makefile.linux
@@ -0,0 +1,59 @@
+##############################################################################
+#
+#    Copyright (C) 2005 - 2010 by Vivante Corp.
+#
+#    This program is free software; you can redistribute it and/or modify
+#    it under the terms of the GNU General Public License as published by
+#    the Free Software Foundation; either version 2 of the license, or
+#    (at your option) any later version.
+#
+#    This program is distributed in the hope that it will be useful,
+#    but WITHOUT ANY WARRANTY; without even the implied warranty of
+#    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+#    GNU General Public Lisence for more details.
+#
+#    You should have received a copy of the GNU General Public License
+#    along with this program; if not write to the Free Software
+#    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+#
+##############################################################################
+
+
+
+#
+# Linux build file for architecture dependent kernel HAL layer.
+#
+#
+
+
+################################################################################
+# Include common definitions.
+
+include $(AQROOT)/makefile.linux.def
+
+################################################################################
+# Define a shortcut for the main target.
+
+STATIC = 1
+TARGET_NAME = libhalkernel.a
+
+################################################################################
+# Supply additional include directories.
+
+INCLUDE += -I$(AQROOT)/hal/inc
+INCLUDE += -I$(AQROOT)/hal/user
+INCLUDE += -I$(AQARCH)/hal/kernel
+
+CFLAGS += $(INCLUDE) -Werror -ansi
+
+################################################################################
+# Describe object files.
+
+OBJECTS = $(OBJ_DIR)/gc_hal_kernel_command.o \
+          $(OBJ_DIR)/gc_hal_kernel_event.o \
+          $(OBJ_DIR)/gc_hal_kernel_heap.o \
+          $(OBJ_DIR)/gc_hal_kernel.o \
+          $(OBJ_DIR)/gc_hal_kernel_mmu.o \
+          $(OBJ_DIR)/gc_hal_kernel_video_memory.o
+
+include $(AQROOT)/common.target
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/Heap.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/Heap.c
@@ -0,0 +1,783 @@
+/****************************************************************************
+*  
+*    Copyright (C) 2002 - 2008 by Vivante Corp.
+*  
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public Lisence as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*  
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*  
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*  
+*****************************************************************************/
+
+
+
+
+
+
+#include "PreComp.h"
+
+#ifdef _DEBUG
+#	define VALIDATE_HEAP
+#endif
+
+/******************************************************************************\
+********************************** Structures **********************************
+\******************************************************************************/
+
+typedef struct _gcsHEAPARENA *	gcsHEAPARENA_PTR;
+typedef union _gcsHEAPNODE *	gcsHEAPNODE_PTR;
+
+union _gcsHEAPNODE
+{
+	/* Pointer to next free node. */
+	gcsHEAPNODE_PTR				nextFree;
+
+	/* Owner of a used node. */
+	gcsHEAPARENA_PTR			owner;
+};
+
+struct _gcsHEAPARENA
+{
+	/* Linked list pointers. */
+	gcsHEAPARENA_PTR			next;
+	gcsHEAPARENA_PTR			prev;
+
+	/* Physical allocation. */
+	gctPHYS_ADDR				physical;
+	gctSIZE_T					allocationSize;
+
+	/* Allocation range. */
+	gctSIZE_T					minAllocationSize;
+	gctSIZE_T					maxAllocationSize;
+
+	/* Allocation data. */
+	gctSIZE_T					nodeSize;
+	gcsHEAPNODE_PTR				firstNode;
+	gcsHEAPNODE_PTR				lastNode;
+
+	/* Pointer to the first free node. */
+	gcsHEAPNODE_PTR				freeNode;
+};
+
+struct _gcoHEAP
+{
+	/* Object. */
+	gcsOBJECT					object;
+
+	/* Pointer to a gcoOS object. */
+	gcoOS						os;
+
+	/* Locking mutex. */
+	gctPOINTER					mutex;
+
+	/* Allocation parameters. */
+	gctSIZE_T					allocationSize;
+	gctSIZE_T					wasteThreshold;
+
+	/* Total number of bytes allocated. */
+	gctSIZE_T					allocated;
+
+	/* Sentinel of linked list of arenas. */
+	struct _gcsHEAPARENA		sentinel;
+};
+
+static gceSTATUS
+_ValidateHeap(
+	IN gcoHEAP Heap
+	)
+{
+	gcsHEAPARENA_PTR arena;
+	gcsHEAPNODE_PTR node, freeNode;
+	gctSIZE_T allocated = 0;
+
+	/* Walk all arenas. */
+	for (arena = Heap->sentinel.next;
+		 arena != &Heap->sentinel;
+		 arena = arena->next)
+	{
+		gctSIZE_T bytes;
+
+		allocated += arena->allocationSize;
+
+		if (arena->freeNode != gcvNULL)
+		{
+			if ((arena->freeNode <  arena->firstNode)
+			||  (arena->freeNode >= arena->lastNode)
+			)
+			{
+				gcmFATAL("Arena %p corrupted free list",
+						 arena);
+
+				return gcvSTATUS_HEAP_CORRUPTED;
+			}
+
+			for (node = arena->freeNode; node != gcvNULL; node = node->nextFree)
+			{
+				if (node->nextFree != gcvNULL)
+				{
+					if ((node->nextFree <  arena->firstNode)
+					||  (node->nextFree >= arena->lastNode)
+					)
+					{
+						gcmFATAL("Arena %p corrupted free list at %p",
+								 arena,
+								 node);
+
+						return gcvSTATUS_HEAP_CORRUPTED;
+					}
+				}
+			}
+		}
+
+		bytes = arena->nodeSize;
+
+		for (node = arena->firstNode;
+			 node < arena->lastNode;
+			 node = (gcsHEAPNODE_PTR) ((gctUINT8 *) node + bytes))
+		{
+			for (freeNode = arena->freeNode;
+				 freeNode != gcvNULL;
+				 freeNode = freeNode->nextFree)
+			{
+				if (freeNode == node)
+				{
+					break;
+				}
+			}
+
+			if (node->owner == arena)
+			{
+				if (freeNode != gcvNULL)
+				{
+					gcmFATAL("Arena %p expected used node at %p, but it is "
+							 "part of the free list %p",
+							 arena,
+							 node,
+							 freeNode);
+
+					return gcvSTATUS_HEAP_CORRUPTED;
+				}
+			}
+			else
+			{
+				if (freeNode == gcvNULL)
+				{
+					gcmFATAL("Arena %p expected free node at %p",
+							 arena,
+							 node);
+
+					return gcvSTATUS_HEAP_CORRUPTED;
+				}
+			}
+		}
+	}
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+/******************************************************************************\
+******************************** gcoHEAP API Code *******************************
+\******************************************************************************/
+
+/*******************************************************************************
+**
+**	gcoHEAP_Construct
+**
+**	Construct a new gcoHEAP object.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to a gcoOS object.
+**
+**		gctSIZE_T AllocationSize
+**			Minimum size per arena.
+**
+**		gctSIZE_T WasteThreshold
+**			Number of bytes per allocation that can be wasted before moving to a
+**			next arena.
+**
+**	OUTPUT:
+**
+**		gcoHEAP * Heap
+**			Pointer to a variable that will hold the pointer to the gcoHEAP
+**			object.
+*/
+gceSTATUS
+gcoHEAP_Construct(
+	IN gcoOS Os,
+	IN gctSIZE_T AllocationSize,
+	IN gctSIZE_T WasteThreshold,
+	OUT gcoHEAP * Heap
+	)
+{
+	gceSTATUS status;
+	gcoHEAP heap = gcvNULL;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmVERIFY_ARGUMENT(Heap != gcvNULL);
+
+	gcmTRACE_ZONE(gcvLEVEL_VERBOSE, gcvZONE_HEAP,
+				  "gcoHEAP_Construct: AllocationSize=%u WasteThreshold=%u",
+				  AllocationSize, WasteThreshold);
+
+	do
+	{
+		/* Allocate the gcoHEAP object. */
+		gcmERR_BREAK(gcoOS_Allocate(Os,
+									gcmSIZEOF(struct _gcoHEAP),
+									(gctPOINTER *) &heap));
+
+		/* Initialize the gcoHEAP object. */
+		heap->object.type = gcvOBJ_HEAP;
+		heap->os = Os;
+
+		/* Create the mutex. */
+		gcmERR_BREAK(gcoOS_CreateMutex(Os, &heap->mutex));
+
+		/* Set heap parameters. */
+		heap->allocationSize = AllocationSize;
+		heap->wasteThreshold = WasteThreshold;
+		heap->allocated = 0;
+
+		/* Initialize the linked list of arenas. */
+		heap->sentinel.next = heap->sentinel.prev = &heap->sentinel;
+
+		/* Initialize the sentinel. */
+		heap->sentinel.minAllocationSize = heap->sentinel.maxAllocationSize = 0;
+		heap->sentinel.firstNode = heap->sentinel.lastNode = gcvNULL;
+
+		/* Return the pointer to the gcoHEAP object. */
+		*Heap = heap;
+
+		gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HEAP,
+					  "gcoHEAP_Construct: Heap=%p",
+					  heap);
+
+		/* Success. */
+		return gcvSTATUS_OK;
+	}
+	while (gcvFALSE);
+
+	gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HEAP,
+				  "gcoHEAP_Construct: ERROR: Got status %d",
+				  status);
+
+	if (heap != gcvNULL)
+	{
+		/* Roll back. */
+		gcmVERIFY_OK(gcoOS_Free(Os, heap));
+	}
+
+	/* Return the status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gcoHEAP_Destroy
+**
+**	Destroy a gcoHEAP object.
+**
+**	INPUT:
+**
+**		gcoHEAP Heap
+**			Pointer to a gcoHEAP object to destroy.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcoHEAP_Destroy(
+	IN gcoHEAP Heap
+	)
+{
+	gcsHEAPARENA_PTR arena, next;
+	gceSTATUS status = gcvSTATUS_OK;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Heap, gcvOBJ_HEAP);
+
+	gcmTRACE_ZONE(gcvLEVEL_VERBOSE, gcvZONE_HEAP,
+				  "gcoHEAP_Destroy: Heap=%p",
+				  Heap);
+
+	do
+	{
+		/* Walk all arenas until we reach the sentinel. */
+		for (arena = Heap->sentinel.next;
+			 arena->maxAllocationSize > 0;
+			 arena = next)
+		{
+			/* Save pointer to next arena. */
+			next = arena->next;
+
+			gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HEAP,
+						  "gcoHEAP_Destroy: Freeing arena %p",
+						  arena);
+
+			/* Free the arena. */
+			gcmERR_BREAK(gcoOS_FreeNonPagedMemory(Heap->os,
+												  arena->allocationSize,
+												  arena->physical, 
+												  arena));
+		}
+
+		if (gcmIS_ERROR(status))
+		{
+			break;
+		}
+
+		/* Free the mutex. */
+		gcmERR_BREAK(gcoOS_DeleteMutex(Heap->os, Heap->mutex));
+
+		/* Mark object as unknown. */
+		Heap->object.type = gcvOBJ_UNKNOWN;
+
+		/* Free the gcoHEAP object. */
+		gcmERR_BREAK(gcoOS_Free(Heap->os, Heap));
+
+		/* Success. */
+		return gcvSTATUS_OK;
+	}
+	while (gcvFALSE);
+
+	gcmTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_HEAP,
+				  "gcoHEAP_Destroy: ERROR: Got status %d",
+				  status);
+
+	/* Return the status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gcoHEAP_Allocate
+**
+**	Allocate data from the heap.
+**
+**	INPUT:
+**
+**		gcoHEAP Heap
+**			Pointer to a gcoHEAP object.
+**
+**		IN gctSIZE_T Bytes
+**			Number of byte to allocate.
+**
+**	OUTPUT:
+**
+**		gctPOINTER * Node
+**			Pointer to a variable that will hold the address of the allocated
+**			memory.
+*/
+gceSTATUS
+gcoHEAP_Allocate(
+	IN gcoHEAP Heap,
+	IN gctSIZE_T Bytes,
+	OUT gctPOINTER * Node
+	)
+{
+	gctSIZE_T bytes;
+	gcsHEAPARENA_PTR arena;
+	gcsHEAPNODE_PTR node;
+	gctSIZE_T allocationSize, nodeCount;
+	gceSTATUS status;
+	gctPHYS_ADDR physical;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Heap, gcvOBJ_HEAP);
+	gcmVERIFY_ARGUMENT(Bytes > 0);
+	gcmVERIFY_ARGUMENT(Node != gcvNULL);
+
+	gcmTRACE_ZONE(gcvLEVEL_VERBOSE, gcvZONE_HEAP,
+				  "gcoHEAP_Allocate: %u bytes",
+				  Bytes);
+
+	/* Acquire te mutex to the heap. */
+	status = gcoOS_AcquireMutex(Heap->os, Heap->mutex, gcvINFINITE);
+
+	if (gcmIS_ERROR(status))
+	{
+		gcmTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_HEAP,
+					  "gcoHEAP_Allocate: ERROR: Got status %d",
+					  status);
+
+		return status;
+	}
+
+	do
+	{
+#ifdef VALIDATE_HEAP
+		/* Validate the heap. */
+		gcmERR_BREAK(_ValidateHeap(Heap));
+#endif
+
+		/* Align byte count to 4-byte integrals. */
+		bytes = gcmALIGN(Bytes, 4);
+
+		/* Find an arena that fits the requested allocation. */
+		for (arena = Heap->sentinel.next;
+			 arena->firstNode != gcvNULL;
+			 arena = arena->next)
+		{
+			/* Does the current arena fits the allocation? */
+			if ((Bytes >= arena->minAllocationSize)
+			&&  (Bytes <= arena->maxAllocationSize)
+			/* And is there any space available?. */
+			&&  (arena->freeNode != gcvNULL)
+			)
+			{
+				goto MoveToFront;
+			}
+		}
+
+		/* Start with the default allocation size.*/
+		allocationSize = Heap->allocationSize;
+
+		do
+		{
+			/* Compute the number of nodes that fit in the arena. */
+			nodeCount = (allocationSize - gcmSIZEOF(struct _gcsHEAPARENA))
+					  / (bytes + gcmSIZEOF(union _gcsHEAPNODE));
+
+			if (nodeCount == 0)
+			{
+				/* If the arena is too small, add another chunk of memory. */
+				allocationSize += Heap->allocationSize;
+			}
+		}
+		while (nodeCount == 0);
+
+		gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HEAP,
+					  "gcoHEAP_Allocate: Creating a new %u-byte arena",
+					  allocationSize);
+
+		/* Allocate a new arena. */
+		gcmERR_BREAK(gcoOS_AllocateNonPagedMemory(Heap->os, 
+												  gcvFALSE, 
+												  &allocationSize,
+												  &physical, 
+												  (gctPOINTER *) &arena));
+
+		/* Compute the number of nodes that fit in the allocated arena. */
+		nodeCount = (allocationSize - gcmSIZEOF(struct _gcsHEAPARENA))
+				  / (bytes + gcmSIZEOF(union _gcsHEAPNODE));
+
+		/* Adjust heap allocation size. */
+		Heap->allocated += allocationSize;
+
+		if (nodeCount == 1)
+		{
+			/* Insert arena at the tail of the linked list. */
+			arena->next = &Heap->sentinel;
+			arena->prev = Heap->sentinel.prev;
+		}
+		else
+		{
+			/* Insert arena at the head of the linked list. */
+			arena->next = Heap->sentinel.next;
+			arena->prev = &Heap->sentinel;
+		}
+
+		arena->prev->next = arena->next->prev = arena;
+
+		/* Initialize arena. */
+		arena->allocationSize = allocationSize;
+		arena->physical = physical;
+
+		/* Compute range of allocation requests for this arena. */
+		arena->minAllocationSize = (bytes > Heap->wasteThreshold)
+			? bytes - Heap->wasteThreshold
+			: 0;
+		arena->maxAllocationSize = bytes;
+
+		/* Initialize node pointers. */
+		arena->nodeSize = sizeof(union _gcsHEAPNODE) + bytes;
+		arena->firstNode = (gcsHEAPNODE_PTR) (arena + 1);
+		arena->lastNode = (gcsHEAPNODE_PTR)
+			((gctUINT8*) arena->firstNode + nodeCount * arena->nodeSize);
+
+		/* Add all nodes to the free list. */
+		arena->freeNode = arena->firstNode;
+		for (node = arena->firstNode; node != gcvNULL; node = node->nextFree)
+		{
+			/* Save pointer to next free node. */
+			node->nextFree = (gcsHEAPNODE_PTR) ((gctUINT8*) node + arena->nodeSize);
+
+			if (node->nextFree == arena->lastNode)
+			{
+				/* At end of list. */
+				node->nextFree = gcvNULL;
+			}
+		}
+
+		goto UseNode;
+
+MoveToFront:
+		/* Move arena to head of linked list. */
+		if (arena->prev->firstNode != gcvNULL)
+		{
+			/* Unlink the arena from the linked list. */
+			arena->prev->next = arena->next;
+			arena->next->prev = arena->prev;
+
+			/* Insert the arena at the head of the linked list. */
+			arena->next = Heap->sentinel.next;
+			arena->prev = &Heap->sentinel;
+
+			arena->prev->next = arena->next->prev = arena;
+		}
+
+UseNode:
+		/* Use first node in the free list and remove it from the free list. */
+		node = arena->freeNode;
+		arena->freeNode = node->nextFree;
+
+		/* Save owner of node. */
+		node->owner = arena;
+
+		/* Return pointer to memory. */
+		*Node = (gctPOINTER) (node + 1);
+
+		gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HEAP,
+					  "gcoHEAP_Allocate: Using arena %p, node %p -> address %p",
+					  arena,
+					  node,
+					  *Node);
+
+#ifdef VALIDATE_HEAP
+		/* Validate the heap. */
+		gcmERR_BREAK(_ValidateHeap(Heap));
+#endif
+	}
+	while (gcvFALSE);
+
+	/* Release the heap mutex. */
+	gcmVERIFY_OK(gcoOS_ReleaseMutex(Heap->os, Heap->mutex));
+
+	if (gcmIS_ERROR(status))
+	{
+		gcmTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_HEAP,
+					  "gcoHEAP_Allocate: ERROR: Got error %d",
+					  status);
+	}
+
+	/* Return the status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gcoHEAP_Free
+**
+**	Free allocated memory from the heap.
+**
+**	INPUT:
+**
+**		gcoHEAP Heap
+**			Pointer to a gcoHEAP object.
+**
+**		IN gctPOINTER Node
+**			Number of byte to allocate.
+**
+**	OUTPUT:
+**
+**		gctPOINTER * Node
+**			Pointer to a variable that will hold the address of the allocated
+**			memory.
+*/
+gceSTATUS
+gcoHEAP_Free(
+	IN gcoHEAP Heap,
+	IN gctPOINTER Node
+	)
+{
+	gcsHEAPNODE_PTR node;
+	gcsHEAPARENA_PTR arena;
+	gceSTATUS status;
+
+	/* Verify arguments. */
+	gcmVERIFY_OBJECT(Heap, gcvOBJ_HEAP);
+	gcmVERIFY_ARGUMENT(Node != gcvNULL);
+
+	gcmTRACE_ZONE(gcvLEVEL_VERBOSE, gcvZONE_HEAP,
+				  "gcoHEAP_Free: Node=%p",
+				  Node);
+
+	/* Acquire te mutex to the heap. */
+	status = gcoOS_AcquireMutex(Heap->os, Heap->mutex, gcvINFINITE);
+
+	if (gcmIS_ERROR(status))
+	{
+		gcmTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_HEAP,
+					  "gcoHEAP_Free: ERROR: Got status %d",
+					  status);
+
+		return status;
+	}
+
+	do
+	{
+#ifdef VALIDATE_HEAP
+		/* Validate the heap. */
+		gcmERR_BREAK(_ValidateHeap(Heap));
+#endif
+
+		/* Get pointer to gcsHEAPNODE_PTR. */
+		node = (gcsHEAPNODE_PTR) Node - 1;
+
+		/* Get pointer to gcsHEAPARENA_PTR. */
+		arena = node->owner;
+
+		/* Verify the node is still vald. */
+		if ((node < arena->firstNode) || (node >= arena->lastNode))
+		{
+			gcmASSERT((node >= arena->firstNode) && (node < arena->lastNode));
+
+			/* Corrupted heap. */
+			status = gcvSTATUS_HEAP_CORRUPTED;
+		}
+		else
+		{
+			/* Insert node at head of free list. */
+			node->nextFree = arena->freeNode;
+			arena->freeNode = node;
+
+			/* Success. */
+			status = gcvSTATUS_OK;
+		}
+	}
+	while (gcvFALSE);
+
+	/* Release the heap mutex. */
+	gcmVERIFY_OK(gcoOS_ReleaseMutex(Heap->os, Heap->mutex));
+
+	if (gcmIS_ERROR(status))
+	{
+		gcmTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_HEAP,
+					  "gcoHEAP_Free: ERROR: Got error %d",
+					  status);
+	}
+
+	/* Return the status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gcoHEAP_Compact
+**
+**	Compact the entire heap by freeing up any empty arenas.
+**
+**	INPUT:
+**
+**		gcoHEAP Heap
+**			Pointer to a gcoHEAP object to compact.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcoHEAP_Compact(
+	IN gcoHEAP Heap
+	)
+{
+	gcsHEAPARENA_PTR arena, next;
+	gctBOOL freeArena;
+	gcsHEAPNODE_PTR node;
+	gceSTATUS status;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Heap, gcvOBJ_HEAP);
+
+	gcmTRACE_ZONE(gcvLEVEL_VERBOSE, gcvZONE_HEAP,
+				  "gcoHEAP_Compact");
+
+	/* Acquire te mutex to the heap. */
+	status = gcoOS_AcquireMutex(Heap->os, Heap->mutex, gcvINFINITE);
+
+	if (gcmIS_ERROR(status))
+	{
+		gcmTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_HEAP,
+					  "gcoHEAP_Free: ERROR: Got status %d",
+					  status);
+
+		return status;
+	}
+
+	do
+	{
+		/* Validate the heap. */
+		gcmERR_BREAK(_ValidateHeap(Heap));
+
+		/* Walk all arenas until we reached the sentinel. */
+		for (arena = Heap->sentinel.next;
+			 arena->firstNode != gcvNULL;
+			 arena = next)
+		{
+			/* Save pointer to next arena. */
+			next = arena->next;
+
+			/* Assume arena is completely free. */
+			freeArena = gcvTRUE;
+
+			/* Walk all nodes in arena. */
+			for (node = arena->firstNode;
+				 node < arena->lastNode;
+				 node = (gcsHEAPNODE_PTR) ((gctUINT8 *) node + arena->nodeSize))
+			{
+				/* If the node points to the arena, it is in use. */
+				if (node->owner == arena)
+				{
+					/* The arena has used nodes. */
+					freeArena = gcvFALSE;
+					break;
+				}
+			}
+
+			/* Destroy arena if completely free. */
+			if (freeArena)
+			{
+				/* Remove arena from linked list.*/
+				arena->prev->next = arena->next;
+				arena->next->prev = arena->prev;
+
+				/* Adjust allocated heap memory. */
+				Heap->allocated -= arena->allocationSize;
+
+				/* Free arena. */
+				gcmERR_BREAK(gcoOS_FreeNonPagedMemory(Heap->os,
+													  arena->allocationSize,
+													  arena->physical,
+													  arena));
+			}
+		}
+	}
+	while (gcvFALSE);
+
+	/* Release the heap mutex. */
+	gcmVERIFY_OK(gcoOS_ReleaseMutex(Heap->os, Heap->mutex));
+
+	if (gcmIS_ERROR(status))
+	{
+		gcmTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_HEAP,
+					  "gcoHEAP_Compact: ERROR: Got error %d",
+					  status);
+	}
+
+	/* Return the status. */
+	return status;
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/gc_hal_kernel_event.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/gc_hal_kernel_event.c
@@ -0,0 +1,1545 @@
+/****************************************************************************
+*
+*    Copyright (C) 2005 - 2010 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public License as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+#include "gc_hal_kernel_precomp.h"
+#include "gc_hal_user_context.h"
+
+#define _GC_OBJ_ZONE	gcvZONE_EVENT
+
+#define gcdEVENT_ALLOCATION_COUNT		(4096 / gcmSIZEOF(gcsHAL_INTERFACE))
+#define gcdEVENT_MIN_THRESHOLD			4
+
+/******************************************************************************\
+********************************* Support Code *********************************
+\******************************************************************************/
+
+/*******************************************************************************
+**
+**	_GetEvent
+**
+**	Get an empty event ID.
+**
+**	INPUT:
+**
+**		gckEVENT Event
+**			Pointer to an gckEVENT object.
+**
+**	OUTPUT:
+**
+**		gctUINT8 * EventID
+**			Pointer to a variable that receives an empty event ID.
+*/
+static gceSTATUS
+_GetEvent(
+    IN gckEVENT Event,
+    OUT gctUINT8 * EventID,
+    IN gceKERNEL_WHERE Source
+    )
+{
+    gctINT i, id;
+	gceSTATUS status;
+	gctBOOL acquired = gcvFALSE;
+
+	gcmkHEADER_ARG("Event=0x%x Source=%d", Event, Source);
+
+	/* Grab the queue mutex. */
+	gcmkONERROR(gckOS_AcquireMutex(Event->os,
+							   Event->mutexQueue,
+						   gcvINFINITE));
+	acquired = gcvTRUE;
+
+	/* Walk through all events. */
+    id = Event->lastID;
+    for (i = 0; i < gcmCOUNTOF(Event->queues); ++i)
+    {
+        if (Event->queues[id].head == gcvNULL)
+        {
+            *EventID = (gctUINT8) id;
+
+            Event->lastID = (id + 1) % gcmCOUNTOF(Event->queues);
+
+            /* Save time stamp of event. */
+            Event->queues[id].stamp  = ++(Event->stamp);
+            Event->queues[id].source = Source;
+
+            /* Release the queue mutex. */
+            gcmkVERIFY_OK(gckOS_ReleaseMutex(Event->os, Event->mutexQueue));
+
+            /* Success. */
+            gcmkFOOTER_ARG("*EventID=%u", *EventID);
+            return gcvSTATUS_OK;
+        }
+
+        id = (id + 1) % gcmCOUNTOF(Event->queues);
+    }
+
+    /* Release the queue mutex. */
+    gcmkVERIFY_OK(gckOS_ReleaseMutex(Event->os, Event->mutexQueue));
+    acquired = gcvFALSE;
+
+    /* Out of resources. */
+    gcmkONERROR(gcvSTATUS_OUT_OF_RESOURCES);
+
+OnError:
+	if (acquired)
+	{
+		/* Release the queue mutex. */
+		gcmkVERIFY_OK(gckOS_ReleaseMutex(Event->os, Event->mutexQueue));
+	}
+
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/******************************************************************************\
+******************************* gckEVENT API Code *******************************
+\******************************************************************************/
+
+/*******************************************************************************
+**
+**	gckEVENT_Construct
+**
+**	Construct a new gckEVENT object.
+**
+**	INPUT:
+**
+**		gckKERNEL Kernel
+**			Pointer to an gckKERNEL object.
+**
+**	OUTPUT:
+**
+**		gckEVENT * Event
+**			Pointer to a variable that receives the gckEVENT object pointer.
+*/
+gceSTATUS
+gckEVENT_Construct(
+	IN gckKERNEL Kernel,
+	OUT gckEVENT * Event
+	)
+{
+	gckOS os;
+	gceSTATUS status;
+	gckEVENT event = gcvNULL;
+	int i;
+	gcsEVENT_PTR record;
+
+	gcmkHEADER_ARG("Kernel=0x%x", Kernel);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Kernel, gcvOBJ_KERNEL);
+	gcmkVERIFY_ARGUMENT(Event != gcvNULL);
+
+	/* Extract the pointer to the gckOS object. */
+	os = Kernel->os;
+	gcmkVERIFY_OBJECT(os, gcvOBJ_OS);
+
+	/* Allocate the gckEVENT object. */
+	gcmkONERROR(
+		gckOS_Allocate(os,
+					   gcmSIZEOF(struct _gckEVENT),
+					   (gctPOINTER *) &event));
+
+	/* Initialize the gckEVENT object. */
+	event->object.type = gcvOBJ_EVENT;
+	event->kernel      = Kernel;
+	event->os          = os;
+	event->mutexQueue  = gcvNULL;
+	event->freeList    = gcvNULL;
+	event->freeCount   = 0;
+	event->freeMutex   = gcvNULL;
+	event->list.head   = gcvNULL;
+	event->list.tail   = gcvNULL;
+	event->listMutex   = gcvNULL;
+	event->lastID      = 0;
+
+	/* Create the mutexes. */
+	gcmkONERROR(
+		gckOS_CreateMutex(os, &event->mutexQueue));
+
+	gcmkONERROR(
+		gckOS_CreateMutex(os, &event->freeMutex));
+
+	gcmkONERROR(
+		gckOS_CreateMutex(os, &event->listMutex));
+
+	/* Create a bunch of event reccords. */
+	for (i = 0; i < gcdEVENT_ALLOCATION_COUNT; ++i)
+	{
+		/* Allocate an event record. */
+		gcmkONERROR(
+			gckOS_Allocate(os, gcmSIZEOF(gcsEVENT), (gctPOINTER *) &record));
+
+		/* Push it on the free list. */
+		record->next      = event->freeList;
+		event->freeList   = record;
+		event->freeCount += 1;
+	}
+
+	/* Zero out the entire event queue. */
+	for (i = 0; i < gcmCOUNTOF(event->queues); ++i)
+	{
+		event->queues[i].head = gcvNULL;
+	}
+
+	/* Zero out the time stamp. */
+	event->stamp = 0;
+
+	/* No events to handle. */
+	event->pending = 0;
+
+	/* Return pointer to the gckEVENT object. */
+	*Event = event;
+
+	/* Success. */
+	gcmkFOOTER_ARG("*Event=0x%x", *Event);
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Roll back. */
+	if (event != gcvNULL)
+	{
+		if (event->mutexQueue != gcvNULL)
+		{
+			gcmkVERIFY_OK(gckOS_DeleteMutex(os, event->mutexQueue));
+		}
+
+		if (event->freeMutex != gcvNULL)
+		{
+			gcmkVERIFY_OK(gckOS_DeleteMutex(os, event->freeMutex));
+		}
+
+		if (event->listMutex != gcvNULL)
+		{
+			gcmkVERIFY_OK(gckOS_DeleteMutex(os, event->listMutex));
+		}
+
+		while (event->freeList != gcvNULL)
+		{
+			record          = event->freeList;
+			event->freeList = record->next;
+
+			gcmkVERIFY_OK(gckOS_Free(os, record));
+		}
+
+		gcmkVERIFY_OK(gckOS_Free(os, event));
+	}
+
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckEVENT_Destroy
+**
+**	Destroy an gckEVENT object.
+**
+**	INPUT:
+**
+**		gckEVENT Event
+**			Pointer to an gckEVENT object.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckEVENT_Destroy(
+	IN gckEVENT Event
+	)
+{
+	gcsEVENT_PTR record;
+
+	gcmkHEADER_ARG("Event=0x%x", Event);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Event, gcvOBJ_EVENT);
+
+    /* Delete the queue mutex. */
+    gcmkVERIFY_OK(gckOS_DeleteMutex(Event->os, Event->mutexQueue));
+
+	/* Free all free events. */
+	while (Event->freeList != gcvNULL)
+	{
+		record          = Event->freeList;
+		Event->freeList = record->next;
+
+		gcmkVERIFY_OK(gckOS_Free(Event->os, record));
+	}
+
+	/* Delete the free mutex. */
+	gcmkVERIFY_OK(gckOS_DeleteMutex(Event->os, Event->freeMutex));
+
+	/* Free all pending events. */
+	while (Event->list.head != gcvNULL)
+	{
+		record           = Event->list.head;
+		Event->list.head = record->next;
+
+		gcmkTRACE_ZONE(gcvLEVEL_WARNING, gcvZONE_EVENT,
+					   "Event record 0x%x is still pending for %d.",
+					   record, Event->list.source);
+		gcmkVERIFY_OK(gckOS_Free(Event->os, record));
+	}
+
+	/* Delete the list mutex. */
+	gcmkVERIFY_OK(gckOS_DeleteMutex(Event->os, Event->listMutex));
+
+	/* Mark the gckEVENT object as unknown. */
+	Event->object.type = gcvOBJ_UNKNOWN;
+
+	/* Free the gckEVENT object. */
+	gcmkVERIFY_OK(gckOS_Free(Event->os, Event));
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+}
+
+static gceSTATUS
+gckEVENT_AllocateRecord(
+	IN gckEVENT Event,
+	OUT gcsEVENT_PTR * Record
+	)
+{
+	gceSTATUS status;
+	gctBOOL acquired = gcvFALSE;
+	gctINT i;
+	gcsEVENT_PTR record;
+
+	gcmkHEADER_ARG("Event=0x%x", Event);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Event, gcvOBJ_EVENT);
+	gcmkVERIFY_ARGUMENT(Record != gcvNULL);
+
+	/* Test if we are below the allocation threshold. */
+	if (Event->freeCount < gcdEVENT_MIN_THRESHOLD)
+	{
+		/* Allocate a bunch of records. */
+		for (i = 0; i < gcdEVENT_ALLOCATION_COUNT; ++i)
+		{
+			/* Allocate an event record. */
+			status = gckOS_Allocate(Event->os,
+									gcmSIZEOF(gcsEVENT),
+									(gctPOINTER *) &record);
+
+			if (gcmIS_ERROR(status))
+			{
+				gcmkTRACE_ZONE(gcvLEVEL_WARNING, gcvZONE_EVENT,
+							   "Out of memory allocating event records.");
+				break;
+			}
+
+			/* Acquire the mutex. */
+			gcmkONERROR(gckOS_AcquireMutex(Event->os,
+										   Event->freeMutex,
+										   gcvINFINITE));
+			acquired = gcvTRUE;
+
+			/* Push it on the free list. */
+			record->next      = Event->freeList;
+			Event->freeList   = record;
+			Event->freeCount += 1;
+
+			/* Release the mutex. */
+			gcmkONERROR(gckOS_ReleaseMutex(Event->os, Event->freeMutex));
+		}
+	}
+
+	/* Acquire the mutex. */
+	gcmkONERROR(gckOS_AcquireMutex(Event->os, Event->freeMutex, gcvINFINITE));
+	acquired = gcvTRUE;
+
+	*Record           = Event->freeList;
+	Event->freeList   = Event->freeList->next;
+	Event->freeCount -= 1;
+
+	/* Release the mutex. */
+	gcmkONERROR(gckOS_ReleaseMutex(Event->os, Event->freeMutex));
+
+	/* Success. */
+	gcmkFOOTER_ARG("*Record=0x%x", gcmOPT_POINTER(Record));
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Roll back. */
+	if (acquired)
+	{
+		gcmkVERIFY_OK(gckOS_ReleaseMutex(Event->os, Event->freeMutex));
+	}
+
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+static gceSTATUS
+gckEVENT_FreeRecord(
+	IN gckEVENT Event,
+	IN gcsEVENT_PTR Record
+	)
+{
+	gceSTATUS status;
+	gctBOOL acquired = gcvFALSE;
+
+	gcmkHEADER_ARG("Event=0x%x Record=0x%x", Event, Record);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Event, gcvOBJ_EVENT);
+	gcmkVERIFY_ARGUMENT(Record != gcvNULL);
+
+	/* Acquire the mutex. */
+	gcmkONERROR(gckOS_AcquireMutex(Event->os, Event->freeMutex, gcvINFINITE));
+	acquired = gcvTRUE;
+
+	/* Push the record on the free list. */
+	Record->next      = Event->freeList;
+	Event->freeList   = Record;
+	Event->freeCount += 1;
+
+	/* Release the mutex. */
+	gcmkONERROR(gckOS_ReleaseMutex(Event->os, Event->freeMutex));
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Roll back. */
+	if (acquired)
+	{
+		gcmkVERIFY_OK(gckOS_ReleaseMutex(Event->os, Event->freeMutex));
+	}
+
+	/* Return the status. */
+	gcmkFOOTER();
+	return gcvSTATUS_OK;
+}
+
+static gceSTATUS
+gckEVENT_AddList(
+	IN gckEVENT Event,
+	IN gcsHAL_INTERFACE_PTR Interface,
+	IN gceKERNEL_WHERE FromWhere,
+	IN gctBOOL Locking
+	)
+{
+	gceSTATUS status;
+	gctBOOL acquired = gcvFALSE;
+	gcsEVENT_PTR record = gcvNULL;
+
+	gcmkHEADER_ARG("Event=0x%x Interface=0x%x FromWhere=%d Locking=%d",
+                   Event, Interface, FromWhere, Locking);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Event, gcvOBJ_EVENT);
+	gcmkVERIFY_ARGUMENT(Interface != gcvNULL);
+
+	switch (FromWhere)
+	{
+	case gcvKERNEL_COMMAND:
+	case gcvKERNEL_PIXEL:
+		/* Check if the requested source matches the list. */
+		if ((Event->list.head   != gcvNULL)
+		&&  (Event->list.source != FromWhere)
+		)
+		{
+			/* No match - auto-submit the list. */
+			status = gckEVENT_Submit(Event, gcvFALSE, Locking);
+
+			if (status == gcvSTATUS_OUT_OF_RESOURCES)
+			{
+				/* When we are out of resources, just convert to submit from
+				** PIXEL. */
+				Event->list.source = FromWhere = gcvKERNEL_PIXEL;
+			}
+
+			else
+			{
+				/* Check for error. */
+				gcmkONERROR(status);
+			}
+		}
+		break;
+
+	default:
+		/* Invalid argument. */
+		gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
+	}
+
+	/* Allocate a free record. */
+	gcmkONERROR(gckEVENT_AllocateRecord(Event, &record));
+
+	/* Copy the event interface into the record. */
+	gcmkONERROR(gckOS_MemCopy(&record->event,
+							  Interface,
+							  gcmSIZEOF(record->event)));
+
+#if 0
+	gcmkASSERT
+		(  (Interface->command == gcvHAL_FREE_NON_PAGED_MEMORY)
+		|| (Interface->command == gcvHAL_FREE_CONTIGUOUS_MEMORY)
+		|| (Interface->command == gcvHAL_FREE_VIDEO_MEMORY)
+		|| (Interface->command == gcvHAL_WRITE_DATA)
+		|| (Interface->command == gcvHAL_UNLOCK_VIDEO_MEMORY)
+		|| (Interface->command == gcvHAL_SIGNAL)
+		|| (Interface->command == gcvHAL_UNMAP_USER_MEMORY)
+		);
+#endif
+
+	record->next = gcvNULL;
+
+	/* Acquire the mutex. */
+	gcmkONERROR(gckOS_AcquireMutex(Event->os, Event->listMutex, gcvINFINITE));
+	acquired = gcvTRUE;
+
+	if (Event->list.head == gcvNULL)
+	{
+		/* List doesn't exist yet. */
+		Event->list.head = record;
+		Event->list.tail = record;
+	}
+	else
+	{
+		/* Append to the current list. */
+		Event->list.tail->next = record;
+		Event->list.tail       = record;
+	}
+
+	/* Mark the source of this event. */
+	Event->list.source = FromWhere;
+
+	/* Release the mutex. */
+	gcmkONERROR(gckOS_ReleaseMutex(Event->os, Event->listMutex));
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Roll back. */
+	if (acquired)
+	{
+		gcmkVERIFY_OK(gckOS_ReleaseMutex(Event->os, Event->listMutex));
+	}
+
+	if (record != gcvNULL)
+	{
+		gcmkVERIFY_OK(gckEVENT_FreeRecord(Event, record));
+	}
+
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckEVENT_FreeNonPagedMemory
+**
+**	Schedule an event to free non-paged memory.
+**
+**	INPUT:
+**
+**		gckEVENT Event
+**			Pointer to an gckEVENT object.
+**
+**      gctSIZE_T Bytes
+**          Number of bytes of non-paged memory to free.
+**
+**      gctPHYS_ADDR Physical
+**          Physical address of non-paged memory to free.
+**
+**      gctPOINTER Logical
+**          Logical address of non-paged memory to free.
+**
+**      gceKERNEL_WHERE FromWhere
+**          Place in the pipe where the event needs to be generated.
+*/
+gceSTATUS
+gckEVENT_FreeNonPagedMemory(
+	IN gckEVENT Event,
+	IN gctSIZE_T Bytes,
+	IN gctPHYS_ADDR Physical,
+	IN gctPOINTER Logical,
+	IN gceKERNEL_WHERE FromWhere
+	)
+{
+	gceSTATUS status;
+	gcsHAL_INTERFACE iface;
+
+	gcmkHEADER_ARG("Event=0x%x Bytes=%lu Physical=0x%x Logical=0x%x "
+				   "FromWhere=%d",
+				   Event, Bytes, Physical, Logical, FromWhere);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Event, gcvOBJ_EVENT);
+	gcmkVERIFY_ARGUMENT(Physical != gcvNULL);
+	gcmkVERIFY_ARGUMENT(Logical != gcvNULL);
+	gcmkVERIFY_ARGUMENT(Bytes > 0);
+
+	/* Create an event. */
+	iface.command = gcvHAL_FREE_NON_PAGED_MEMORY;
+	iface.u.FreeNonPagedMemory.bytes    = Bytes;
+	iface.u.FreeNonPagedMemory.physical = Physical;
+	iface.u.FreeNonPagedMemory.logical  = Logical;
+
+	/* Append it to the queue. */
+	gcmkONERROR(gckEVENT_AddList(Event, &iface, FromWhere, gcvFALSE));
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckEVENT_FreeContigiuousMemory
+**
+**	Schedule an event to free contiguous memory.
+**
+**	INPUT:
+**
+**		gckEVENT Event
+**			Pointer to an gckEVENT object.
+**
+**      gctSIZE_T Bytes
+**          Number of bytes of contiguous memory to free.
+**
+**      gctPHYS_ADDR Physical
+**          Physical address of contiguous memory to free.
+**
+**      gctPOINTER Logical
+**          Logical address of contiguous memory to free.
+**
+**      gceKERNEL_WHERE FromWhere
+**          Place in the pipe where the event needs to be generated.
+*/
+gceSTATUS
+gckEVENT_FreeContiguousMemory(
+	IN gckEVENT Event,
+	IN gctSIZE_T Bytes,
+	IN gctPHYS_ADDR Physical,
+	IN gctPOINTER Logical,
+	IN gceKERNEL_WHERE FromWhere
+	)
+{
+	gceSTATUS status;
+	gcsHAL_INTERFACE iface;
+
+	gcmkHEADER_ARG("Event=0x%x Bytes=%lu Physical=0x%x Logical=0x%x "
+				   "FromWhere=%d",
+				   Event, Bytes, Physical, Logical, FromWhere);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Event, gcvOBJ_EVENT);
+	gcmkVERIFY_ARGUMENT(Physical != gcvNULL);
+	gcmkVERIFY_ARGUMENT(Logical != gcvNULL);
+	gcmkVERIFY_ARGUMENT(Bytes > 0);
+
+	/* Create an event. */
+	iface.command = gcvHAL_FREE_CONTIGUOUS_MEMORY;
+	iface.u.FreeContiguousMemory.bytes    = Bytes;
+	iface.u.FreeContiguousMemory.physical = Physical;
+	iface.u.FreeContiguousMemory.logical  = Logical;
+
+	/* Append it to the queue. */
+	gcmkONERROR(gckEVENT_AddList(Event, &iface, FromWhere, gcvFALSE));
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckEVENT_FreeVideoMemory
+**
+**	Schedule an event to free video memory.
+**
+**	INPUT:
+**
+**		gckEVENT Event
+**			Pointer to an gckEVENT object.
+**
+**      gcuVIDMEM_NODE_PTR VideoMemory
+**          Pointer to a gcuVIDMEM_NODE object to free.
+**
+**      gceKERNEL_WHERE FromWhere
+**          Place in the pipe where the event needs to be generated.
+*/
+gceSTATUS
+gckEVENT_FreeVideoMemory(
+	IN gckEVENT Event,
+	IN gcuVIDMEM_NODE_PTR VideoMemory,
+	IN gceKERNEL_WHERE FromWhere
+	)
+{
+	gceSTATUS status;
+	gcsHAL_INTERFACE iface;
+
+	gcmkHEADER_ARG("Event=0x%x VideoMemory=0x%x FromWhere=%d",
+				   Event, VideoMemory, FromWhere);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Event, gcvOBJ_EVENT);
+	gcmkVERIFY_ARGUMENT(VideoMemory != gcvNULL);
+
+	/* Create an event. */
+	iface.command = gcvHAL_FREE_VIDEO_MEMORY;
+	iface.u.FreeVideoMemory.node = VideoMemory;
+
+	/* Append it to the queue. */
+	gcmkONERROR(gckEVENT_AddList(Event, &iface, FromWhere, gcvFALSE));
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckEVENT_Signal
+**
+**	Schedule an event to trigger a signal.
+**
+**	INPUT:
+**
+**		gckEVENT Event
+**			Pointer to an gckEVENT object.
+**
+**      gctSIGNAL Signal
+**          Pointer to the signal to trigger.
+**
+**      gceKERNEL_WHERE FromWhere
+**          Place in the pipe where the event needs to be generated.
+*/
+gceSTATUS
+gckEVENT_Signal(
+	IN gckEVENT Event,
+	IN gctSIGNAL Signal,
+	IN gceKERNEL_WHERE FromWhere,
+	IN gctBOOL Locking
+	)
+{
+	gceSTATUS status;
+	gcsHAL_INTERFACE iface;
+
+	gcmkHEADER_ARG("Event=0x%x Signal=0x%x FromWhere=%d Locking=%d",
+                   Event, Signal, FromWhere, Locking);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Event, gcvOBJ_EVENT);
+	gcmkVERIFY_ARGUMENT(Signal != gcvNULL);
+
+	/* Mark the event as a signal. */
+	iface.command            = gcvHAL_SIGNAL;
+	iface.u.Signal.signal    = Signal;
+#ifdef __QNXNTO__
+    iface.u.Signal.coid      = 0;
+    iface.u.Signal.rcvid     = 0;
+#else
+	iface.u.Signal.auxSignal = gcvNULL;
+	iface.u.Signal.process   = gcvNULL;
+#endif
+
+	/* Append it to the queue. */
+	gcmkONERROR(gckEVENT_AddList(Event, &iface, FromWhere, Locking));
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckEVENT_Unlock
+**
+**	Schedule an event to unlock virtual memory.
+**
+**	INPUT:
+**
+**		gckEVENT Event
+**			Pointer to an gckEVENT object.
+**
+**      gceKERNEL_WHERE FromWhere
+**          Place in the pipe where the event needs to be generated.
+**
+**      gcuVIDMEM_NODE_PTR Node
+**          Pointer to a gcuVIDMEM_NODE union that specifies the virtual memory
+**			to unlock.
+**
+**		gceSURF_TYPE Type
+**			Type of surface to unlock.
+*/
+gceSTATUS
+gckEVENT_Unlock(
+	IN gckEVENT Event,
+	IN gceKERNEL_WHERE FromWhere,
+	IN gcuVIDMEM_NODE_PTR Node,
+	IN gceSURF_TYPE Type
+	)
+{
+	gceSTATUS status;
+	gcsHAL_INTERFACE iface;
+
+	gcmkHEADER_ARG("Event=0x%x FromWhere=%d Node=0x%x Type=%d",
+				   Event, FromWhere, Node, Type);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Event, gcvOBJ_EVENT);
+	gcmkVERIFY_ARGUMENT(Node != gcvNULL);
+
+	/* Mark the event as an unlock. */
+	iface.command                           = gcvHAL_UNLOCK_VIDEO_MEMORY;
+	iface.u.UnlockVideoMemory.node          = Node;
+	iface.u.UnlockVideoMemory.type          = Type;
+	iface.u.UnlockVideoMemory.asynchroneous = 0;
+
+	/* Append it to the queue. */
+	gcmkONERROR(gckEVENT_AddList(Event, &iface, FromWhere, gcvFALSE));
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+#define ENABLE_GC_IDLE_EVENT 1
+gceSTATUS
+gckEVENT_Commit(
+	IN gckEVENT Event,
+	IN gcsQUEUE_PTR Queue
+	)
+{
+	gceSTATUS status;
+	gcsQUEUE_PTR record = gcvNULL, next;
+
+    gcmkHEADER_ARG("Event=0x%x Queue=0x%x", Event, Queue);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Event, gcvOBJ_EVENT);
+
+    if(Queue == gcvNULL)
+    {
+#if ENABLE_GC_IDLE_EVENT
+	/* Try to set idle */
+	gcmkVERIFY_OK(gckEVENT_TryToSetIdle(Event));
+    return gcvSTATUS_OK;
+#endif
+    }
+
+	/* Loop while there are records in the queue. */
+	while (Queue != gcvNULL)
+	{
+		/* Map record into kernel memory. */
+		gcmkONERROR(gckOS_MapUserPointer(Event->os,
+										 Queue,
+										 gcmSIZEOF(gcsQUEUE),
+										 (gctPOINTER *) &record));
+
+		/* Append event record to event queue. */
+		gcmkONERROR(gckEVENT_AddList(Event, &record->iface, gcvKERNEL_PIXEL, gcvFALSE));
+
+		/* Next record in the queue. */
+		next = record->next;
+
+		/* Unmap record from kernel memory. */
+		gcmkONERROR(
+			gckOS_UnmapUserPointer(Event->os,
+								   Queue,
+								   gcmSIZEOF(gcsQUEUE),
+								   (gctPOINTER *) record));
+		record = gcvNULL;
+
+		Queue = next;
+	}
+
+	/* Submit the event list. */
+	gcmkONERROR(gckEVENT_Submit(Event, gcvTRUE, gcvFALSE));
+
+	/* Success */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Roll back. */
+	if (record == gcvNULL)
+	{
+		gcmkVERIFY_OK(gckOS_UnmapUserPointer(Event->os,
+											 Queue,
+											 gcmSIZEOF(gcsQUEUE),
+											 (gctPOINTER *) record));
+	}
+
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+gceSTATUS
+gckEVENT_Interrupt(
+	IN gckEVENT Event,
+	IN gctUINT32 Data
+	)
+{
+	gcmkHEADER_ARG("Event=0x%x Data=%08x", Event, Data);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Event, gcvOBJ_EVENT);
+
+	/* Combine current interrupt status with pending flags. */
+	Event->pending |= Data;
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+}
+
+gceSTATUS
+gckEVENT_Notify(
+	IN gckEVENT Event,
+	IN gctBOOL IsReset
+	)
+{
+	gceSTATUS status = gcvSTATUS_OK;
+	gctINT i;
+	gcsEVENT_QUEUE * queue;
+	gctUINT mask = 0;
+	gctBOOL acquired = gcvFALSE;
+#ifdef __QNXNTO__
+	gcuVIDMEM_NODE_PTR node;
+#endif
+    gctUINT pending;
+    gctBOOL suspended = gcvFALSE;
+
+	gcmkHEADER_ARG("Event=0x%x", Event);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Event, gcvOBJ_EVENT);
+
+    for (;;)
+    {
+        /* Suspend interrupts. */
+        gcmkONERROR(gckOS_SuspendInterrupt(Event->os));
+        suspended = gcvTRUE;
+
+		/* Get current interrupts. */
+        pending = Event->pending;
+
+        /* Resume interrupts. */
+        gcmkONERROR(gckOS_ResumeInterrupt(Event->os));
+        suspended = gcvFALSE;
+
+        if (pending == 0)
+        {
+            /* No more pending interrupts - done. */
+            break;
+        }
+
+		gcmkTRACE_ZONE(gcvLEVEL_VERBOSE, gcvZONE_EVENT,
+					   "Pending interrupts 0x%08x", pending);
+
+		queue = gcvNULL;
+
+#if gcdDEBUG
+		for (i = 0; i < gcmCOUNTOF(Event->queues); ++i)
+		{
+			if (Event->queues[i].head != gcvNULL)
+			{
+				gcmkTRACE_ZONE(gcvLEVEL_VERBOSE, gcvZONE_EVENT,
+							   "Queue(%d): stamp=%llu source=%d",
+							   i,
+							   Event->queues[i].stamp,
+							   Event->queues[i].source);
+			}
+		}
+#endif
+
+		/* Find the oldest pending interrupt. */
+		for (i = 0; i < gcmCOUNTOF(Event->queues); ++i)
+		{
+			if ((Event->queues[i].head != gcvNULL)
+			&&  (pending & (1 << i))
+			)
+			{
+				if ((queue == gcvNULL)
+				||  (Event->queues[i].stamp < queue->stamp)
+				)
+				{
+					queue = &Event->queues[i];
+					mask  = 1 << i;
+				}
+			}
+		}
+
+		if (queue == gcvNULL)
+		{
+			gcmkTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_EVENT,
+						   "Interrupts 0x08x are not pending.", pending);
+
+			break;
+		}
+
+		/* Check whether there is a missed interrupt. */
+		for (i = 0; i < gcmCOUNTOF(Event->queues); ++i)
+		{
+			if ((Event->queues[i].head != gcvNULL)
+			&&  (Event->queues[i].stamp < queue->stamp)
+			&&  (Event->queues[i].source == queue->source)
+			)
+			{
+				gcmkTRACE(gcvLEVEL_ERROR,
+						  "Event %d lost (stamp %llu)",
+						  i, Event->queues[i].stamp);
+
+				/* Use this event instead. */
+				queue = &Event->queues[i];
+				mask  = 0;
+			}
+		}
+
+		/* Walk all events for this interrupt. */
+		while (queue->head != gcvNULL)
+		{
+			gcsEVENT_PTR event;
+#ifndef __QNXNTO__
+			gctPOINTER logical;
+#endif
+
+			event       = queue->head;
+
+			/* Dispatch on event type. */
+			switch (event->event.command)
+			{
+			case gcvHAL_FREE_NON_PAGED_MEMORY:
+				/* Free non-paged memory. */
+				status = gckOS_FreeNonPagedMemory(
+							Event->os,
+							event->event.u.FreeNonPagedMemory.bytes,
+							event->event.u.FreeNonPagedMemory.physical,
+							event->event.u.FreeNonPagedMemory.logical);
+				break;
+
+			case gcvHAL_FREE_CONTIGUOUS_MEMORY:
+				/* Unmap the user memory. */
+				status = gckOS_FreeContiguous(
+							Event->os,
+							event->event.u.FreeContiguousMemory.physical,
+							event->event.u.FreeContiguousMemory.logical,
+							event->event.u.FreeContiguousMemory.bytes);
+				break;
+
+			case gcvHAL_FREE_VIDEO_MEMORY:
+#ifdef __QNXNTO__
+	            node = event->event.u.FreeVideoMemory.node;
+	            if ((node->VidMem.memory->object.type == gcvOBJ_VIDMEM)
+	            &&  (node->VidMem.logical != gcvNULL)
+	            )
+	            {
+	                gcmkERR_BREAK(
+	                    gckKERNEL_UnmapVideoMemory(event->kernel,
+                                                   node->VidMem.logical,
+                                                   event->event.pid,
+                                                   node->VidMem.bytes));
+	                node->VidMem.logical = gcvNULL;
+	            }
+#endif
+
+				/* Free video memory. */
+				status = gckVIDMEM_Free(event->event.u.FreeVideoMemory.node);
+				break;
+
+			case gcvHAL_WRITE_DATA:
+#ifndef __QNXNTO__
+				/* Convert physical into logical address. */
+				gcmkERR_BREAK(
+					gckOS_MapPhysical(Event->os,
+									  event->event.u.WriteData.address,
+									  gcmPTR2INT(event->event.u.WriteData.kernelAddress),
+									  gcmSIZEOF(gctUINT32),
+									  &logical));
+
+				/* Write data. */
+				gcmkERR_BREAK(
+					gckOS_WriteMemory(Event->os,
+									  logical,
+									  event->event.u.WriteData.data));
+
+				/* Unmap the physical memory. */
+				gcmkERR_BREAK(
+					gckOS_UnmapPhysical(Event->os,
+									logical,
+										gcmSIZEOF(gctUINT32)));
+#else
+				/* Write data. */
+				gcmkERR_BREAK(
+					gckOS_WriteMemory(Event->os,
+									  (gctPOINTER)
+										  event->event.u.WriteData.address,
+									  event->event.u.WriteData.data));
+#endif
+				break;
+
+			case gcvHAL_UNLOCK_VIDEO_MEMORY:
+				/* Unlock. */
+				status = gckVIDMEM_Unlock(event->event.u.UnlockVideoMemory.node,
+										  event->event.u.UnlockVideoMemory.type,
+										  gcvNULL);
+				break;
+
+			case gcvHAL_SIGNAL:
+#ifdef __QNXNTO__
+				if ((event->event.u.Signal.coid == 0)
+				&&  (event->event.u.Signal.rcvid == 0)
+				)
+				{
+					/* Kernel signal. */
+					gcmkERR_BREAK(
+						gckOS_Signal(Event->os,
+									 event->event.u.Signal.signal,
+									 gcvTRUE));
+				}
+				else
+				{
+					/* User signal. */
+					gcmkERR_BREAK(
+						gckOS_UserSignal(Event->os,
+										 event->event.u.Signal.signal,
+										 event->event.u.Signal.rcvid,
+										 event->event.u.Signal.coid));
+				}
+#else
+				/* Set signal. */
+				if (event->event.u.Signal.process == gcvNULL)
+				{
+					/* Kernel signal. */
+					gcmkERR_BREAK(
+						gckOS_Signal(Event->os,
+									 event->event.u.Signal.signal,
+									 gcvTRUE));
+				}
+				else
+				{
+					/* User signal. */
+					gcmkERR_BREAK(
+						gckOS_UserSignal(Event->os,
+										 event->event.u.Signal.signal,
+										 event->event.u.Signal.process));
+				}
+
+				gcmkASSERT(event->event.u.Signal.auxSignal == gcvNULL);
+#endif
+                break;
+
+			case gcvHAL_UNMAP_USER_MEMORY:
+				/* Unmap the user memory. */
+				status =
+					gckOS_UnmapUserMemory(Event->os,
+										  event->event.u.UnmapUserMemory.memory,
+										  event->event.u.UnmapUserMemory.size,
+										  event->event.u.UnmapUserMemory.info,
+										  event->event.u.UnmapUserMemory.address);
+				break;
+
+		case gcvHAL_SET_IDLE:
+				if(!IsReset)
+				{
+				/* Grab the conmmand queue mutex. */
+				gcmkVERIFY_OK(gckOS_AcquireMutex(Event->os,
+												Event->kernel->command->mutexQueue,
+												gcvINFINITE));
+
+				/* Set idle if no new commitments */
+				if (Event->lastCommitStamp == Event->kernel->command->commitStamp)
+				{
+                        if(Event->kernel->command->idle == gcvFALSE)
+                        {
+					Event->kernel->command->idle = gcvTRUE;
+					gcmkVERIFY_OK(gckOS_NotifyIdle(Event->os, gcvTRUE));
+                        }
+				}
+
+				/* Release the command queue mutex. */
+				gcmkVERIFY_OK(gckOS_ReleaseMutex(Event->os, Event->kernel->command->mutexQueue));
+				}
+                break;
+
+			default:
+				/* Invalid argument. */
+				gcmkFATAL("Unknown event type: %d", event->event.command);
+				status = gcvSTATUS_INVALID_ARGUMENT;
+				break;
+			}
+
+			/* Make sure there are no errors generated. */
+			gcmkASSERT(gcmNO_ERROR(status));
+
+			/* Pop the event from the event queue. */
+			gcmkONERROR(
+				gckOS_AcquireMutex(Event->os, Event->mutexQueue, gcvINFINITE));
+			acquired = gcvTRUE;
+
+			/* Unlink head from chain. */
+			queue->head = event->next;
+
+			gcmkONERROR(gckOS_ReleaseMutex(Event->os, Event->mutexQueue));
+			acquired = gcvFALSE;
+
+			/* Free the event. */
+			gcmkVERIFY_OK(gckOS_Free(Event->os, event));
+		}
+
+		gcmkTRACE_ZONE(gcvLEVEL_VERBOSE, gcvZONE_EVENT,
+					   "Handled interrupt 0x%08x", mask);
+
+        /* Suspend interrupts. */
+        gcmkONERROR(gckOS_SuspendInterrupt(Event->os));
+        suspended = gcvTRUE;
+
+		/* Mark pending interrupt as handled. */
+		Event->pending &= ~mask;
+
+        /* Resume interrupts. */
+        gcmkONERROR(gckOS_ResumeInterrupt(Event->os));
+        suspended = gcvFALSE;
+	}
+
+#if ENABLE_GC_IDLE_EVENT
+    if(!IsReset)
+    {
+	/* Try to set idle */
+	gcmkVERIFY_OK(gckEVENT_TryToSetIdle(Event));
+    }
+#endif
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+
+OnError:
+	if (acquired)
+	{
+		/* Release mutex. */
+		gcmkVERIFY_OK(gckOS_ReleaseMutex(Event->os, Event->mutexQueue));
+	}
+
+    if (suspended)
+    {
+        /* Resume interrupts. */
+        gcmkVERIFY_OK(gckOS_ResumeInterrupt(Event->os));
+    }
+
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+gceSTATUS
+gckEVENT_Submit(
+	IN gckEVENT Event,
+	IN gctBOOL Wait,
+	IN gctBOOL Locking
+	)
+{
+	gctUINT8 id = 0xFF;
+	gctSIZE_T bytes;
+	gctPOINTER buffer;
+	gceSTATUS status;
+	gctBOOL acquired = gcvTRUE;
+	gctBOOL reserved = gcvFALSE;
+
+	gcmkHEADER_ARG("Event=0x%x Wait=%d Locking=%d", Event, Wait, Locking);
+
+	/* Only process if we have events queued. */
+	if (Event->list.head != gcvNULL)
+	{
+	    for (;;)
+	    {
+		    /* Allocate an event ID. */
+		status = _GetEvent(Event, &id, Event->list.source);
+
+		if (gcmIS_ERROR(status))
+		{
+				/* Out of resources? */
+                if (Wait && (status == gcvSTATUS_OUT_OF_RESOURCES))
+                {
+					/* Delay a while. */
+                    gcmkONERROR(gckOS_Delay(Event->os, 1));
+                }
+                else
+                {
+                    gcmkONERROR(status);
+                }
+		}
+		else
+		{
+				/* Got en event ID. */
+			break;
+		}
+        }
+
+		gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_EVENT, "Using id=%d", id);
+
+		/* Acquire the list mutex. */
+		gcmkONERROR(gckOS_AcquireMutex(Event->os,
+									   Event->listMutex,
+									   gcvINFINITE));
+		acquired = gcvTRUE;
+
+		/* Copy event list to event ID queue. */
+		Event->queues[id].source = Event->list.source;
+		Event->queues[id].head   = Event->list.head;
+
+		/* Mark event list as empty. */
+		Event->list.head = gcvNULL;
+
+		/* Release the list mutex. */
+		gcmkONERROR(gckOS_ReleaseMutex(Event->os, Event->listMutex));
+		acquired = gcvFALSE;
+
+#if gcdNULL_DRIVER == 2
+		/* Notify immediately on infinite hardware. */
+		gcmkONERROR(gckEVENT_Interrupt(Event, 1 << id));
+
+		gcmkONERROR(gckEVENT_Notify(Event, 0));
+#else
+		/* Get the size of the hardware event. */
+		gcmkONERROR(gckHARDWARE_Event(Event->kernel->hardware,
+									  gcvNULL,
+									  id,
+									  gcvKERNEL_PIXEL,
+									  &bytes));
+
+		/* Reserve space in the command queue. */
+		gcmkONERROR(gckCOMMAND_Reserve(Event->kernel->command,
+									   bytes,
+									   Locking,
+									   &buffer,
+									   &bytes));
+		reserved = gcvTRUE;
+
+		/* Set the hardware event in the command queue. */
+		gcmkONERROR(gckHARDWARE_Event(Event->kernel->hardware,
+									  buffer,
+									  id,
+									  Event->queues[id].source,
+									  &bytes));
+
+		/* Execute the hardware event. */
+		gcmkONERROR(gckCOMMAND_Execute(Event->kernel->command, bytes, Locking));
+		reserved = gcvFALSE;
+#endif
+	}
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+
+OnError:
+	if (acquired)
+	{
+		/* Need to unroll the mutex acquire. */
+		gcmkVERIFY_OK(gckOS_ReleaseMutex(Event->os, Event->listMutex));
+	}
+
+	if (!Locking && reserved)
+	{
+		/* Need to release the command buffer. */
+		gcmkVERIFY_OK(gckCOMMAND_Release(Event->kernel->command));
+	}
+
+	if (id != 0xFF)
+	{
+		/* Need to unroll the event allocation. */
+		Event->queues[id].head = gcvNULL;
+	}
+
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckEVENT_SetIdle
+**
+**	Schedule an event to set idle status.
+**
+**	INPUT:
+**
+**		gcoEVENT Event
+**			Pointer to an gcoEVENT object.
+**
+**      gctPOINTER CommandBuffer
+**          Pointer to the command buffer to append the event.
+**
+**      gctSIZE_T * CommandSize
+**          Pointer to the number of bytes available in the command buffer.
+**
+**      gceKERNEL_WHERE FromWhere
+**          Place in the pipe where the event needs to be generated.
+**
+**		gctBOOL Wait
+**			Wait flag.  Should be set to gcvFALSE for any event that needs to be
+**			copied into a command buffer since we might exhaust the number of
+**			events.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * CommandSize
+**          Number of bytes used for the event.
+*/
+gceSTATUS
+gckEVENT_SetIdle(
+	IN gckEVENT Event,
+	IN gctPOINTER CommandBuffer,
+	IN OUT gctSIZE_T * CommandSize,
+	IN gceKERNEL_WHERE FromWhere,
+	IN gctBOOL Wait
+	)
+{
+    gceSTATUS status;
+	gcsHAL_INTERFACE iface;
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Event, gcvOBJ_EVENT);
+
+	/* Create an event. */
+	iface.command = gcvHAL_SET_IDLE;
+
+	/* Append it to the queue. */
+	gcmkONERROR(gckEVENT_AddList(Event, &iface, FromWhere, gcvFALSE));
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+
+gceSTATUS
+gckEVENT_TryToSetIdle(
+	IN gckEVENT Event
+	)
+{
+	gctINT i;
+	gctBOOL setIdle;
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Event, gcvOBJ_EVENT);
+
+	if (!Event->kernel->notifyIdle) return gcvSTATUS_OK;
+
+	/* Initialize the flag */
+	setIdle = gcvFALSE;
+
+	/* Grab the queue mutex. */
+	gcmkVERIFY_OK(gckOS_AcquireMutex(Event->os,
+									 Event->mutexQueue,
+									 gcvINFINITE));
+
+	/* Suspend interrupt */
+	gcmkVERIFY_OK(gckOS_SuspendInterrupt(Event->os));
+
+	if (Event->lastCommitStamp != Event->kernel->command->commitStamp)
+	{
+		setIdle = gcvTRUE;
+
+		/* Check if no pending events */
+		for (i = 0; i < gcmCOUNTOF(Event->queues); ++i)
+		{
+			if (Event->queues[i].head != gcvNULL)
+			{
+				setIdle = gcvFALSE;
+				break;
+			}
+		}
+	}
+
+	/* Resume interrupt */
+	gcmkVERIFY_OK(gckOS_ResumeInterrupt(Event->os));
+
+	/* Release the queue mutex. */
+	gcmkVERIFY_OK(gckOS_ReleaseMutex(Event->os, Event->mutexQueue));
+
+	/* Issue an event to set idle if necessary */
+	if (setIdle)
+	{
+
+		/* Append the EVENT command to write data into the boolean. */
+		gcmkVERIFY_OK(gckEVENT_SetIdle(Event,
+									gcvNULL,
+									0,
+									gcvKERNEL_PIXEL,
+									gcvTRUE));
+
+        /* Grab the conmmand queue mutex. */
+        gcmkVERIFY_OK(
+		gckOS_AcquireMutex(Event->kernel->command->os,
+						   Event->kernel->command->mutexQueue,
+						   gcvINFINITE));
+
+		Event->lastCommitStamp = Event->kernel->command->commitStamp + 1;
+
+        /* Release the command queue mutex. */
+        gcmkVERIFY_OK(
+		gckOS_ReleaseMutex(Event->kernel->command->os, Event->kernel->command->mutexQueue));
+
+	}
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/gc_hal_kernel.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/gc_hal_kernel.h
@@ -0,0 +1,411 @@
+/****************************************************************************
+*
+*    Copyright (C) 2005 - 2010 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public License as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+#ifndef __gc_hal_kernel_h_
+#define __gc_hal_kernel_h_
+
+#include "gc_hal.h"
+#include "gc_hal_kernel_hardware.h"
+#include "gc_hal_driver.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/******************************************************************************\
+********************************** Structures **********************************
+\******************************************************************************/
+
+#if gcdSECURE_USER
+typedef struct _gckLOGICAL_CACHE
+{
+    gctHANDLE       process;
+    gctPOINTER      logical;
+    gctUINT32       dma;
+    gctUINT64       stamp;
+}
+gckLOGICAL_CACHE;
+#endif
+
+/* gckKERNEL object. */
+struct _gckKERNEL
+{
+	/* Object. */
+	gcsOBJECT					object;
+
+	/* Pointer to gckOS object. */
+	gckOS						os;
+
+	/* Pointer to gckHARDWARE object. */
+	gckHARDWARE					hardware;
+
+	/* Pointer to gckCOMMAND object. */
+	gckCOMMAND					command;
+
+	/* Pointer to gckEVENT object. */
+	gckEVENT					event;
+
+	/* Pointer to context. */
+	gctPOINTER					context;
+
+	/* Pointer to gckMMU object. */
+	gckMMU						mmu;
+
+	/* Number of attached clients. */
+	gctUINT						clients;
+
+	/* Require to notify idle status */
+	gctBOOL						notifyIdle;
+
+#if VIVANTE_PROFILER
+	/* Enable profiling */
+	gctBOOL						profileEnable;
+
+	/* The profile file name */
+	gctCHAR						profileFileName[gcdMAX_PROFILE_FILE_NAME];
+#endif
+
+#if gcdSECURE_USER
+	gckLOGICAL_CACHE			cache[gcdSECURE_CACHE_SLOTS];
+    gctUINT                     cacheSlots;
+    gctUINT64                   cacheTimeStamp;
+#endif
+    /* Pointer to reversion string */
+    gctCONST_STRING             version;
+
+#if MRVL_LOW_POWER_MODE_DEBUG
+    /* The buffer to pool the output message before entering D2
+    ** these message can be output after exiting D2
+    */
+    char*                       kernelMSG;
+    /* The length of kernelMSG */
+    gctINT32                    msgLen;
+#endif
+};
+
+#define gcdCOMMAND_QUEUES		2
+
+/* gckCOMMAND object. */
+struct _gckCOMMAND
+{
+	/* Object. */
+	gcsOBJECT					object;
+
+	/* Pointer to required object. */
+	gckKERNEL					kernel;
+	gckOS						os;
+
+	/* Number of bytes per page. */
+	gctSIZE_T					pageSize;
+
+	/* Current pipe select. */
+	gctUINT32					pipeSelect;
+
+	/* Command queue running flag. */
+	gctBOOL						running;
+
+	/* Idle flag and commit stamp. */
+	gctBOOL						idle;
+	gctUINT64					commitStamp;
+
+	/* Command queue mutex. */
+	gctPOINTER					mutexQueue;
+
+	/* Context switching mutex. */
+	gctPOINTER					mutexContext;
+
+	/* Current command queue. */
+	struct _gcskCOMMAND_QUEUE
+	{
+		gctSIGNAL				signal;
+		gctPHYS_ADDR			physical;
+		gctPOINTER				logical;
+	}
+	queues[gcdCOMMAND_QUEUES];
+
+	gctPHYS_ADDR				physical;
+	gctPOINTER					logical;
+	gctINT						index;
+	gctUINT32					offset;
+
+	/* The command queue is new. */
+	gctBOOL						newQueue;
+	gctBOOL						submit;
+
+	/* Context counter used for unique ID. */
+	gctUINT64					contextCounter;
+
+	/* Current context ID. */
+	gctUINT64					currentContext;
+
+	/* Pointer to last WAIT command. */
+	gctPOINTER					wait;
+	gctSIZE_T					waitSize;
+
+	/* Command buffer alignment. */
+	gctSIZE_T					alignment;
+	gctSIZE_T					reservedHead;
+	gctSIZE_T					reservedTail;
+};
+
+typedef struct _gcsEVENT *		gcsEVENT_PTR;
+
+/* Structure holding one event to be processed. */
+typedef struct _gcsEVENT
+{
+	/* Pointer to next event in queue. */
+	gcsEVENT_PTR				next;
+
+	/* Event information. */
+	gcsHAL_INTERFACE			event;
+
+#ifdef __QNXNTO__
+	/* Kernel. */
+	gckKERNEL                   kernel;
+#endif
+}
+gcsEVENT;
+
+/* Structure holding a list of events to be processed by an interrupt. */
+typedef struct _gcsEVENT_QUEUE
+{
+	/* Time stamp. */
+	gctUINT64					stamp;
+
+	/* Source of the event. */
+	gceKERNEL_WHERE				source;
+
+	/* Pointer to head of event queue. */
+	gcsEVENT_PTR				head;
+
+	/* Pointer to tail of event queue. */
+	gcsEVENT_PTR				tail;
+}
+gcsEVENT_QUEUE;
+
+/* gckEVENT object. */
+struct _gckEVENT
+{
+	/* The object. */
+	gcsOBJECT					object;
+
+	/* Pointer to required objects. */
+	gckOS						os;
+	gckKERNEL					kernel;
+
+	/* Time stamp. */
+	gctUINT64					stamp;
+	gctUINT64					lastCommitStamp;
+
+	/* Queue mutex. */
+	gctPOINTER					mutexQueue;
+
+	/* Array of event queues. */
+	gcsEVENT_QUEUE				queues[31];
+	gctUINT8                    lastID;
+
+	/* Pending events. */
+	volatile gctUINT			pending;
+
+	/* List of free event structures and its mutex. */
+	gcsEVENT_PTR				freeList;
+	gctSIZE_T					freeCount;
+	gctPOINTER					freeMutex;
+
+	/* Events queued to be added to an event queue and its mutex. */
+	gcsEVENT_QUEUE				list;
+	gctPOINTER					listMutex;
+};
+
+/* gcuVIDMEM_NODE structure. */
+typedef union _gcuVIDMEM_NODE
+{
+	/* Allocated from gckVIDMEM. */
+	struct _gcsVIDMEM_NODE_VIDMEM
+	{
+		/* Owner of this node. */
+		gckVIDMEM				memory;
+
+		/* Dual-linked list of nodes. */
+		gcuVIDMEM_NODE_PTR		next;
+		gcuVIDMEM_NODE_PTR		prev;
+
+		/* Dual linked list of free nodes. */
+		gcuVIDMEM_NODE_PTR		nextFree;
+		gcuVIDMEM_NODE_PTR		prevFree;
+
+		/* Information for this node. */
+		gctUINT32				offset;
+		gctSIZE_T				bytes;
+		gctUINT32				alignment;
+
+#ifdef __QNXNTO__
+		/* Client/server vaddr (mapped using mmap_join). */
+		gctPOINTER				logical;
+
+		/* Unique handle of the caller process channel. */
+		gctHANDLE				handle;
+#endif
+
+		/* Locked counter. */
+		gctINT32				locked;
+
+		/* Memory pool. */
+		gcePOOL					pool;
+		gctUINT32				physical;
+	}
+	VidMem;
+
+	/* Allocated from gckOS. */
+	struct _gcsVIDMEM_NODE_VIRTUAL
+	{
+		/* Pointer to gckKERNEL object. */
+		gckKERNEL				kernel;
+
+		/* Information for this node. */
+		gctBOOL					contiguous;
+		gctPHYS_ADDR			physical;
+		gctSIZE_T				bytes;
+		gctPOINTER				logical;
+
+		/* Page table information. */
+		gctSIZE_T				pageCount;
+		gctPOINTER				pageTable;
+		gctUINT32				address;
+
+		/* Mutex. */
+		gctPOINTER				mutex;
+
+		/* Locked counter. */
+		gctINT32				locked;
+
+#ifdef __QNXNTO__
+		/* Single linked list of nodes. */
+		gcuVIDMEM_NODE_PTR      next;
+
+		/* PID of the caller process channel. */
+		gctUINT32				userPID;
+
+		/* Unique handle of the caller process channel. */
+		gctHANDLE				handle;
+
+		/* Unlock pending flag. */
+		gctBOOL					unlockPending;
+
+		/* Free pending flag. */
+		gctBOOL                 freePending;
+#else
+		/* Pending flag. */
+		gctBOOL					pending;
+#endif
+	}
+	Virtual;
+}
+gcuVIDMEM_NODE;
+
+/* gckVIDMEM object. */
+struct _gckVIDMEM
+{
+	/* Object. */
+	gcsOBJECT					object;
+
+	/* Pointer to gckOS object. */
+	gckOS						os;
+
+	/* Information for this video memory heap. */
+	gctUINT32					baseAddress;
+	gctSIZE_T					bytes;
+	gctSIZE_T					freeBytes;
+
+	/* Mapping for each type of surface. */
+	gctINT						mapping[gcvSURF_NUM_TYPES];
+
+	/* Sentinel nodes for up to 8 banks. */
+	gcuVIDMEM_NODE				sentinel[8];
+
+	/* Allocation threshold. */
+	gctSIZE_T					threshold;
+
+    /* The heap mutex. */
+    gctPOINTER					mutex;
+};
+
+/* gckMMU object. */
+struct _gckMMU
+{
+	/* The object. */
+	gcsOBJECT					object;
+
+	/* Pointer to gckOS object. */
+	gckOS						os;
+
+	/* Pointer to gckHARDWARE object. */
+	gckHARDWARE					hardware;
+
+	/* The page table mutex. */
+	gctPOINTER					pageTableMutex;
+
+	/* Page table information. */
+	gctSIZE_T					pageTableSize;
+	gctPHYS_ADDR				pageTablePhysical;
+	gctUINT32_PTR				pageTableLogical;
+	gctUINT32					pageTableEntries;
+
+	/* Free entries. */
+	gctUINT32					heapList;
+	gctBOOL						freeNodes;
+
+#ifdef __QNXNTO__
+	/* Single linked list of all allocated nodes. */
+	gctPOINTER                  nodeMutex;
+	gcuVIDMEM_NODE_PTR          nodeList;
+#endif
+};
+
+gceSTATUS
+gckKERNEL_AttachProcess(
+	IN gckKERNEL Kernel,
+	IN gctBOOL Attach
+	);
+
+#if gcdSECURE_USER
+gceSTATUS
+gckKERNEL_MapLogicalToPhysical(
+    IN gckKERNEL Kernel,
+    IN gctHANDLE Process,
+    IN OUT gctPOINTER * Data
+    );
+#endif
+
+gceSTATUS
+gckHARDWARE_QueryIdle(
+    IN gckHARDWARE Hardware,
+    OUT gctBOOL_PTR IsIdle
+    );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __gc_hal_kernel_h_ */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/gc_hal_kernel_precomp.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/kernel/gc_hal_kernel_precomp.h
@@ -0,0 +1,32 @@
+/****************************************************************************
+*
+*    Copyright (C) 2005 - 2010 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public License as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+#ifndef __gc_hal_kernel_precomp_h_
+#define __gc_hal_kernel_precomp_h_
+
+#include "gc_hal.h"
+#include "gc_hal_driver.h"
+#include "gc_hal_kernel.h"
+
+#endif /* __gc_hal_kernel_precomp_h_ */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/Device.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/Device.h
@@ -0,0 +1,159 @@
+/****************************************************************************
+*
+*    Copyright (C) 2002 - 2008 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public Lisence as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+
+
+#ifndef __DEVICE_H
+#define __DEVICE_H
+
+/******************************************************************************\
+******************************* gcoGALDEVICE Structure *******************************
+\******************************************************************************/
+
+typedef struct _gcoGALDEVICE
+{
+	/* Objects. */
+	gcoOS				os;
+	gcoKERNEL			kernel;
+
+	/* Attributes. */
+	gctSIZE_T			internalSize;
+	gctPHYS_ADDR		internalPhysical;
+	gctPOINTER			internalLogical;
+	gcoVIDMEM			internalVidMem;
+	gctSIZE_T			externalSize;
+	gctPHYS_ADDR		externalPhysical;
+	gctPOINTER			externalLogical;
+	gcoVIDMEM			externalVidMem;
+	gcoVIDMEM			contiguousVidMem;
+	gctPOINTER			contiguousBase;
+	gctPHYS_ADDR		contiguousPhysical;
+	gctSIZE_T			contiguousSize;
+	gctBOOL				contiguousMapped;
+	gctPOINTER			contiguousMappedUser;
+	gctSIZE_T			systemMemorySize;
+	gctUINT32			systemMemoryBaseAddress;
+	gctPOINTER			registerBase;
+	gctSIZE_T			registerSize;
+	gctUINT32			baseAddress;
+
+	/* IRQ management. */
+	gctINT				irqLine;
+	gctBOOL				isrInitialized;
+	gctBOOL				dataReady;
+
+	/* Thread management. */
+	struct task_struct	*threadCtxt;
+	struct semaphore	sema;
+	gctBOOL				threadInitialized;
+	gctBOOL				killThread;
+
+	/* Signal management. */
+	gctINT				signal;
+
+#ifdef CONFIG_PXA_DVFM    
+    /* dvfm device index */
+    gctINT              dvfm_dev_index;
+
+    /* dvfm notifier */
+    struct notifier_block *dvfm_notifier;
+
+    /* GC register state can't be retained 
+       after existing form D2 on PV2 board.
+       So we must reset GC on this case.
+    */
+    gctBOOL             needResetAfterD2;
+    gctBOOL             needD2DebugInfo;
+#endif
+
+    gctBOOL             enableDVFM;
+    gctBOOL             enableLowPowerMode;
+
+}
+* gcoGALDEVICE;
+
+#ifdef ANDROID
+typedef struct MEMORY_RECORD
+{
+	gcuVIDMEM_NODE_PTR		node;
+
+	struct MEMORY_RECORD *	prev;
+	struct MEMORY_RECORD *	next;
+}
+MEMORY_RECORD, * MEMORY_RECORD_PTR;
+#endif
+
+typedef struct _gcsHAL_PRIVATE_DATA
+{
+    gcoGALDEVICE		device;
+    gctPOINTER			mappedMemory;
+	gctPOINTER			contiguousLogical;
+#ifdef ANDROID
+	MEMORY_RECORD		memoryRecordList;
+#endif
+}
+gcsHAL_PRIVATE_DATA, * gcsHAL_PRIVATE_DATA_PTR;
+
+gceSTATUS gcoGALDEVICE_Setup_ISR(
+	IN gcoGALDEVICE Device
+	);
+
+gceSTATUS gcoGALDEVICE_Release_ISR(
+	IN gcoGALDEVICE Device
+	);
+
+gceSTATUS gcoGALDEVICE_Start_Thread(
+	IN gcoGALDEVICE Device
+	);
+
+gceSTATUS gcoGALDEVICE_Stop_Thread(
+	gcoGALDEVICE Device
+	);
+
+gceSTATUS gcoGALDEVICE_Start(
+	IN gcoGALDEVICE Device
+	);
+
+gceSTATUS gcoGALDEVICE_Stop(
+	gcoGALDEVICE Device
+	);
+
+gceSTATUS gcoGALDEVICE_Construct(
+	IN gctINT IrqLine,
+	IN gctUINT32 RegisterMemBase,
+	IN gctSIZE_T RegisterMemSize,
+	IN gctUINT32 ContiguousBase,
+	IN gctSIZE_T ContiguousSize,
+	IN gctSIZE_T BankSize,
+	IN gctINT FastClear,
+	IN gctINT Compression,
+	IN gctUINT32 BaseAddress,
+	IN gctINT Signal,
+	OUT gcoGALDEVICE *Device
+	);
+
+gceSTATUS gcoGALDEVICE_Destroy(
+	IN gcoGALDEVICE Device
+	);
+
+#endif // __DEVICE_H
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/Kernel.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/Kernel.c
@@ -0,0 +1,404 @@
+/****************************************************************************
+*
+*    Copyright (C) 2002 - 2008 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public Lisence as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+
+
+#include "PreComp.h"
+
+/******************************************************************************\
+******************************* gcoKERNEL API Code ******************************
+\******************************************************************************/
+
+/*******************************************************************************
+**
+**	gcoKERNEL_QueryVideoMemory
+**
+**	Query the amount of video memory.
+**
+**	INPUT:
+**
+**		gcoKERNEL Kernel
+**			Pointer to an gcoKERNEL object.
+**
+**	OUTPUT:
+**
+**		gcsHAL_INTERFACE * Interface
+**			Pointer to an gcsHAL_INTERFACE structure that will be filled in with
+**			the memory information.
+*/
+gceSTATUS gcoKERNEL_QueryVideoMemory(
+	IN gcoKERNEL Kernel,
+	OUT gcsHAL_INTERFACE * Interface
+	)
+{
+	gcoGALDEVICE device;
+
+	gcmTRACE(gcvLEVEL_VERBOSE,
+			"[ENTER] gcoKERNEL_QueryVideoMemory(%p,%p)\n",
+		  	Kernel,
+			Interface);
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Kernel, gcvOBJ_KERNEL);
+	gcmVERIFY_ARGUMENT(Interface != NULL);
+
+	/* Extract the pointer to the gcoGALDEVICE class. */
+	device = (gcoGALDEVICE) Kernel->context;
+
+	/* Get internal memory size and physical address. */
+	Interface->u.QueryVideoMemory.internalSize = device->internalSize;
+	Interface->u.QueryVideoMemory.internalPhysical = device->internalPhysical;
+
+	/* Get external memory size and physical address. */
+	Interface->u.QueryVideoMemory.externalSize = device->externalSize;
+	Interface->u.QueryVideoMemory.externalPhysical = device->externalPhysical;
+
+	/* Get contiguous memory size and physical address. */
+	Interface->u.QueryVideoMemory.contiguousSize = device->contiguousSize;
+	Interface->u.QueryVideoMemory.contiguousPhysical = device->contiguousPhysical;
+
+	gcmTRACE(gcvLEVEL_VERBOSE,
+			"[LEAVE] gcoKERNEL_QueryVideoMemory\n");
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoKERNEL_GetVideoMemoryPool
+**
+**	Get the gcoVIDMEM object belonging to the specified pool.
+**
+**	INPUT:
+**
+**		gcoKERNEL Kernel
+**			Pointer to an gcoKERNEL object.
+**
+**		gcePOOL Pool
+**			Pool to query gcoVIDMEM object for.
+**
+**	OUTPUT:
+**
+**		gcoVIDMEM * VideoMemory
+**			Pointer to a variable that will hold the pointer to the gcoVIDMEM
+**			object belonging to the requested pool.
+*/
+gceSTATUS gcoKERNEL_GetVideoMemoryPool(
+	IN gcoKERNEL Kernel,
+	IN gcePOOL Pool,
+	OUT gcoVIDMEM * VideoMemory
+	)
+{
+	gcoGALDEVICE device;
+	gcoVIDMEM videoMemory;
+
+	gcmTRACE(gcvLEVEL_VERBOSE, "[ENTER] gcoKERNEL_GetVideoMemoryPool(%p,%u,%p)\n",
+		  	Kernel,	Pool, VideoMemory);
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Kernel, gcvOBJ_KERNEL);
+	gcmVERIFY_ARGUMENT(VideoMemory != NULL);
+
+    /* Extract the pointer to the gcoGALDEVICE class. */
+    device = (gcoGALDEVICE) Kernel->context;
+
+	/* Dispatch on pool. */
+	switch (Pool)
+	{
+	case gcvPOOL_LOCAL_INTERNAL:
+		/* Internal memory. */
+		videoMemory = device->internalVidMem;
+		break;
+
+	case gcvPOOL_LOCAL_EXTERNAL:
+		/* External memory. */
+		videoMemory = device->externalVidMem;
+		break;
+
+	case gcvPOOL_SYSTEM:
+		/* System memory. */
+		videoMemory = device->contiguousVidMem;
+		break;
+
+	default:
+		/* Unknown pool. */
+		videoMemory = NULL;
+	}
+
+	/* Return pointer to the AQVIDMEM object. */
+	*VideoMemory = videoMemory;
+
+	gcmTRACE(gcvLEVEL_VERBOSE, "[LEAVE] gcoKERNEL_GetVideoMemoryPool\n");
+
+	/* Return status. */
+	return (videoMemory == NULL) ? gcvSTATUS_OUT_OF_MEMORY : gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoKERNEL_MapMemory
+**
+**	Map video memory into the current process space.
+**
+**	INPUT:
+**
+**		gcoKERNEL Kernel
+**			Pointer to an gcoKERNEL object.
+**
+**		gctPHYS_ADDR Physical
+**			Physical address of video memory to map.
+**
+**		gctSIZE_T Bytes
+**			Number of bytes to map.
+**
+**	OUTPUT:
+**
+**		gctPOINTER * Logical
+**			Pointer to a variable that will hold the base address of the mapped
+**			memory region.
+*/
+gceSTATUS gcoKERNEL_MapMemory(
+	IN gcoKERNEL Kernel,
+	IN gctPHYS_ADDR Physical,
+	IN gctSIZE_T Bytes,
+	OUT gctPOINTER * Logical
+	)
+{
+  return gcoOS_MapMemory(Kernel->os, Physical, Bytes, Logical);
+}
+
+/*******************************************************************************
+**
+**	gcoKERNEL_UnmapMemory
+**
+**	Unmap video memory from the current process space.
+**
+**	INPUT:
+**
+**		gcoKERNEL Kernel
+**			Pointer to an gcoKERNEL object.
+**
+**		gctPHYS_ADDR Physical
+**			Physical address of video memory to map.
+**
+**		gctSIZE_T Bytes
+**			Number of bytes to map.
+**
+**		gctPOINTER Logical
+**			Base address of the mapped memory region.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gcoKERNEL_UnmapMemory(
+	IN gcoKERNEL Kernel,
+	IN gctPHYS_ADDR Physical,
+	IN gctSIZE_T Bytes,
+	IN gctPOINTER Logical
+	)
+{
+  return gcoOS_UnmapMemory(Kernel->os, Physical, Bytes, Logical);
+}
+
+/*******************************************************************************
+**
+**	gcoKERNEL_MapVideoMemory
+**
+**	Get the logical address for a hardware specific memory address for the
+**	current process.
+**
+**	INPUT:
+**
+**		gcoKERNEL Kernel
+**			Pointer to an gcoKERNEL object.
+**
+**      gctBOOL InUserSpace
+**          gcvTRUE to map the memory into the user space.
+**
+**		gctUINT32 Address
+**			Hardware specific memory address.
+**
+**	OUTPUT:
+**
+**		gctPOINTER * Logical
+**			Pointer to a variable that will hold the logical address of the
+**			specified memory address.
+*/
+gceSTATUS gcoKERNEL_MapVideoMemory(
+	IN gcoKERNEL Kernel,
+	IN gctBOOL InUserSpace,
+	IN gctUINT32 Address,
+	OUT gctPOINTER * Logical
+	)
+{
+    gcoGALDEVICE	device;
+    PLINUX_MDL  	mdl;
+	PLINUX_MDL_MAP	mdlMap;
+    gcePOOL 		pool;
+    gctUINT32 		offset, base;
+    gceSTATUS 		status;
+    gctPOINTER 		logical;
+
+    /* Verify the arguments. */
+    gcmVERIFY_OBJECT(Kernel, gcvOBJ_KERNEL);
+    gcmVERIFY_ARGUMENT(Logical != NULL);
+
+    /* Extract the pointer to the gcoGALDEVICE class. */
+    device = (gcoGALDEVICE) Kernel->context;
+
+    /* Split the memory address into a pool type and offset. */
+    status = gcoHARDWARE_SplitMemory(Kernel->hardware,
+    	    	    	    	     Address,
+				     &pool,
+				     &offset);
+
+    if (gcmIS_ERROR(status))
+    {
+    	/* Error. */
+    	return status;
+    }
+
+    /* Dispatch on pool. */
+    switch (pool)
+    {
+    case gcvPOOL_LOCAL_INTERNAL:
+    	/* Internal memory. */
+    	logical = device->internalLogical;
+    	break;
+
+    case gcvPOOL_LOCAL_EXTERNAL:
+    	/* External memory. */
+    	logical = device->externalLogical;
+    	break;
+
+    case gcvPOOL_SYSTEM:
+		/* System memory. */
+		if (device->contiguousMapped)
+		{
+			logical = device->contiguousBase;
+		}
+		else
+		{
+			mdl = (PLINUX_MDL) device->contiguousPhysical;
+
+			mdlMap = FindMdlMap(mdl, current->tgid);
+			gcmASSERT(mdlMap);
+
+			logical = (gctPOINTER) mdlMap->vmaAddr;
+		}
+
+		gcmVERIFY_OK(gcoHARDWARE_SplitMemory(
+			Kernel->hardware,
+			device->contiguousVidMem->baseAddress,
+			&pool, &base
+			));
+
+		offset -= base;
+		break;
+
+    default:
+    	/* Invalid memory pool. */
+    	return gcvSTATUS_INVALID_ARGUMENT;
+    }
+
+    /* Build logical address of specified address. */
+    *Logical = (gctPOINTER) ((gctUINT8 *) logical + offset);
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoKERNEL_Notify
+**
+**	This function iscalled by clients to notify the gcoKERNRL object of an event.
+**
+**	INPUT:
+**
+**		gcoKERNEL Kernel
+**			Pointer to an gcoKERNEL object.
+**
+**		gceNOTIFY Notification
+**			Notification event.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gcoKERNEL_Notify(
+	IN gcoKERNEL Kernel,
+	IN gceNOTIFY Notification,
+	IN gctBOOL Data
+	)
+{
+	gceSTATUS status;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Kernel, gcvOBJ_KERNEL);
+
+	/* Dispatch on notifcation. */
+	switch (Notification)
+	{
+	case gcvNOTIFY_INTERRUPT:
+		/* Process the interrupt. */
+#if COMMAND_PROCESSOR_VERSION > 1
+		status = gcoINTERRUPT_Notify(Kernel->interrupt, Data);
+#else
+		status = gcoHARDWARE_Interrupt(Kernel->hardware, Data);
+#endif
+		break;
+
+	default:
+		status = gcvSTATUS_OK;
+		break;
+	}
+
+	/* Success. */
+	return status;
+}
+
+gceSTATUS
+gcoKERNEL_QuerySettings(
+	IN gcoKERNEL Kernel,
+	OUT gcsKERNEL_SETTINGS * Settings
+	)
+{
+	gcoGALDEVICE device;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Kernel, gcvOBJ_KERNEL);
+	gcmVERIFY_ARGUMENT(Settings != gcvNULL);
+
+	/* Extract the pointer to the gcoGALDEVICE class. */
+    device = (gcoGALDEVICE) Kernel->context;
+
+	/* Fill in signal. */
+	Settings->signal = device->signal;
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/gc_hal_kernel_device.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/gc_hal_kernel_device.h
@@ -0,0 +1,209 @@
+/****************************************************************************
+*
+*    Copyright (C) 2005 - 2010 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public License as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+#ifndef __gc_hal_kernel_device_h_
+#define __gc_hal_kernel_device_h_
+
+#define gcdkUSE_MEMORY_RECORD		1
+
+#ifdef ANDROID
+#define gcdkREPORT_VIDMEM_LEAK		0
+#else
+#define gcdkREPORT_VIDMEM_LEAK		1
+#endif
+
+/******************************************************************************\
+******************************* gckGALDEVICE Structure *******************************
+\******************************************************************************/
+#if defined CONFIG_CPU_PXA910
+#if POWER_OFF_GC_WHEN_IDLE
+typedef enum _gcePOWRE_MODE
+{
+    gcvPM_NORMAL,
+    gcvPM_EARLY_SUSPEND,
+    gcvPM_LATE_RESUME,
+    gcvPM_SUSPEND,
+    gcvPM_RESUME
+}
+gcePOWER_MODE;
+#endif
+#endif
+
+typedef struct _gckProfNode
+{
+    gctBOOL idle;
+    gctUINT tick;
+}
+*gckProfNode;
+
+typedef struct _gckGALDEVICE
+{
+	/* Objects. */
+	gckOS				os;
+	gckKERNEL			kernel;
+
+	/* Attributes. */
+	gctSIZE_T			internalSize;
+	gctPHYS_ADDR		internalPhysical;
+	gctPOINTER			internalLogical;
+	gckVIDMEM			internalVidMem;
+	gctSIZE_T			externalSize;
+	gctPHYS_ADDR		externalPhysical;
+	gctPOINTER			externalLogical;
+	gckVIDMEM			externalVidMem;
+	gckVIDMEM			contiguousVidMem;
+	gctPOINTER			contiguousBase;
+	gctPHYS_ADDR		contiguousPhysical;
+	gctSIZE_T			contiguousSize;
+	gctBOOL				contiguousMapped;
+	gctPOINTER			contiguousMappedUser;
+	gctSIZE_T			systemMemorySize;
+	gctUINT32			systemMemoryBaseAddress;
+	gctPOINTER			registerBase;
+	gctSIZE_T			registerSize;
+	gctUINT32			baseAddress;
+
+	/* IRQ management. */
+	gctINT				irqLine;
+	gctBOOL				isrInitialized;
+	gctBOOL				dataReady;
+
+	/* Thread management. */
+	struct task_struct	*threadCtxt;
+	struct semaphore	sema;
+	gctBOOL				threadInitialized;
+	gctBOOL				killThread;
+
+	/* Signal management. */
+	gctINT				signal;
+#if defined CONFIG_PXA_DVFM || defined CONFIG_CPU_MMP2
+    /* dvfm device index */
+    gctINT              dvfm_dev_index;
+
+    /* dvfm notifier */
+    struct notifier_block *dvfm_notifier;
+
+    /* GC register state can't be retained
+       after existing form D2 on PV2 board.
+       So we must reset GC on this case.
+    */
+    gctBOOL             needResetAfterD2;
+    gctBOOL             needD2DebugInfo;
+    gctBOOL             enableMdelay;
+    gctBOOL             enableD0CS;
+    gctBOOL             enableD1;
+    gctBOOL             enableD2;
+    gctBOOL             enableCG;
+
+#elif defined CONFIG_CPU_PXA910
+#if POWER_OFF_GC_WHEN_IDLE
+    gcePOWER_MODE       currentPMode;
+    gctPOINTER          mutexGCDevice;
+#endif
+
+#endif
+    /* do silent reset */
+    gctBOOL             reset;
+    gctBOOL             printPID;
+    gctBOOL             enableDVFM;
+    gctBOOL             enableLowPowerMode;
+
+    /* profiling data */
+    struct _gckProfNode profNode[100];
+    gctUINT32           lastNodeIndex;
+
+#if MRVL_TIMER
+    struct timer_list   timer;
+    struct semaphore	timersema;
+    struct task_struct	*timerthread;
+#endif
+}
+* gckGALDEVICE;
+
+#if gcdkUSE_MEMORY_RECORD
+typedef struct MEMORY_RECORD
+{
+	gcuVIDMEM_NODE_PTR		node;
+
+	struct MEMORY_RECORD *	prev;
+	struct MEMORY_RECORD *	next;
+}
+MEMORY_RECORD, * MEMORY_RECORD_PTR;
+#endif
+
+typedef struct _gcsHAL_PRIVATE_DATA
+{
+    gckGALDEVICE		device;
+    gctPOINTER			mappedMemory;
+	gctPOINTER			contiguousLogical;
+
+#if gcdkUSE_MEMORY_RECORD
+	MEMORY_RECORD		memoryRecordList;
+#endif
+}
+gcsHAL_PRIVATE_DATA, * gcsHAL_PRIVATE_DATA_PTR;
+
+gceSTATUS gckGALDEVICE_Setup_ISR(
+	IN gckGALDEVICE Device
+	);
+
+gceSTATUS gckGALDEVICE_Release_ISR(
+	IN gckGALDEVICE Device
+	);
+
+gceSTATUS gckGALDEVICE_Start_Thread(
+	IN gckGALDEVICE Device
+	);
+
+gceSTATUS gckGALDEVICE_Stop_Thread(
+	gckGALDEVICE Device
+	);
+
+gceSTATUS gckGALDEVICE_Start(
+	IN gckGALDEVICE Device
+	);
+
+gceSTATUS gckGALDEVICE_Stop(
+	gckGALDEVICE Device
+	);
+
+gceSTATUS gckGALDEVICE_Construct(
+	IN gctINT IrqLine,
+	IN gctUINT32 RegisterMemBase,
+	IN gctSIZE_T RegisterMemSize,
+	IN gctUINT32 ContiguousBase,
+	IN gctSIZE_T ContiguousSize,
+	IN gctSIZE_T BankSize,
+	IN gctINT FastClear,
+	IN gctINT Compression,
+	IN gctUINT32 BaseAddress,
+	IN gctINT Signal,
+	OUT gckGALDEVICE *Device
+	);
+
+gceSTATUS gckGALDEVICE_Destroy(
+	IN gckGALDEVICE Device
+	);
+
+#endif /* __gc_hal_kernel_device_h_ */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/gc_hal_kernel_os.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/gc_hal_kernel_os.h
@@ -0,0 +1,106 @@
+/****************************************************************************
+*
+*    Copyright (C) 2005 - 2010 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public License as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+#ifndef __gc_hal_kernel_os_h_
+#define __gc_hal_kernel_os_h_
+
+typedef struct _LINUX_MDL_MAP
+{
+	gctINT					pid;
+	gctPOINTER				vmaAddr;
+	struct vm_area_struct *	vma;
+	struct _LINUX_MDL_MAP *	next;
+}
+LINUX_MDL_MAP, *PLINUX_MDL_MAP;
+
+typedef struct _LINUX_MDL
+{
+	gctINT					pid;
+	char *					addr;
+
+#ifdef NO_DMA_COHERENT
+	gctPOINTER				kaddr;
+#endif /* NO_DMA_COHERENT */
+
+	gctINT					numPages;
+	gctINT					pagedMem;
+	gctBOOL					contiguous;
+	dma_addr_t				dmaHandle;
+	PLINUX_MDL_MAP			maps;
+	struct _LINUX_MDL *		prev;
+	struct _LINUX_MDL *		next;
+}
+LINUX_MDL, *PLINUX_MDL;
+
+extern PLINUX_MDL_MAP
+FindMdlMap(
+	IN PLINUX_MDL Mdl,
+	IN gctINT PID
+	);
+
+typedef struct _DRIVER_ARGS
+{
+	gctPOINTER 				InputBuffer;
+	gctUINT32  				InputBufferSize;
+	gctPOINTER 				OutputBuffer;
+	gctUINT32				OutputBufferSize;
+}
+DRIVER_ARGS;
+
+/* Cleanup the signal table. */
+gceSTATUS
+gckOS_CleanProcessSignal(
+	gckOS Os,
+	gctHANDLE Process
+	);
+
+#ifdef gcdkUSE_MEMORY_RECORD
+MEMORY_RECORD_PTR
+CreateMemoryRecord(
+	gckOS Os,
+	MEMORY_RECORD_PTR List,
+	gcuVIDMEM_NODE_PTR Node
+	);
+
+void
+DestoryMemoryRecord(
+	gckOS Os,
+	MEMORY_RECORD_PTR Mr
+	);
+
+MEMORY_RECORD_PTR
+FindMemoryRecord(
+	gckOS Os,
+	MEMORY_RECORD_PTR List,
+	gcuVIDMEM_NODE_PTR Node
+	);
+
+void
+FreeAllMemoryRecord(
+	gckOS Os,
+	MEMORY_RECORD_PTR List
+	);
+#endif
+
+#endif /* __gc_hal_kernel_os_h_ */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/PreComp.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/PreComp.h
@@ -0,0 +1,90 @@
+/****************************************************************************
+*  
+*    Copyright (C) 2002 - 2008 by Vivante Corp.
+*  
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public Lisence as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*  
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*  
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*  
+*****************************************************************************/
+
+
+
+
+
+
+
+#include <linux/version.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/fs.h>
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/signal.h>
+#ifdef FLAREON
+#   include <asm/arch-realview/dove_gpio_irq.h>
+#endif
+#include <linux/interrupt.h>
+#include <linux/vmalloc.h>
+#include <linux/dma-mapping.h>
+#include <linux/kthread.h>
+
+#ifdef ANDROID
+#include <linux/earlysuspend.h>
+#endif
+
+#ifdef MODVERSIONS
+#  include <linux/modversions.h>
+#endif
+#include <asm/io.h>
+#include <asm/uaccess.h>
+
+#include <linux/clk.h>
+
+#define NTSTRSAFE_NO_CCH_FUNCTIONS
+#include "aqHal.h"
+#include "aqHalDriver.h"
+#include "aqHalInt.h"
+#include "Device.h"
+#include "Os.h"
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,31)
+#define FIND_TASK_BY_PID(x) pid_task(find_vpid(x), PIDTYPE_PID)
+#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28)
+#define FIND_TASK_BY_PID(x) find_task_by_vpid(x)
+#else
+#define FIND_TASK_BY_PID(x) find_task_by_pid(x)
+#endif
+
+#define _WIDE(string)				L##string
+#define WIDE(string)				_WIDE(string)
+
+#define countof(a)					(sizeof(a) / sizeof(a[0]))
+
+#define DRV_NAME          			"galcore"
+
+#define GetPageCount(size, offset) 	((((size) + ((offset) & ~PAGE_CACHE_MASK)) + PAGE_CACHE_SIZE - 1) >> PAGE_CACHE_SHIFT)
+
+static inline gctINT
+GetOrder(
+	IN gctINT numPages
+	)
+{
+    gctINT order = 0;
+    
+	while ((1 << order) <  numPages) order++;
+    
+	return order;
+}
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/Os.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/Os.c
@@ -0,0 +1,5022 @@
+/****************************************************************************
+*
+*    Copyright (C) 2002 - 2008 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public Lisence as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+#include "PreComp.h"
+
+#include <linux/pagemap.h>
+#include <linux/seq_file.h>
+#include <linux/mm.h>
+#include <linux/mman.h>
+#include <linux/sched.h>
+#include <asm/atomic.h>
+#include <stdarg.h>
+#ifdef NO_DMA_COHERENT
+#include <linux/dma-mapping.h>
+#endif /* NO_DMA_COHERENT */
+
+#ifdef CONFIG_PXA_DVFM
+#include <mach/dvfm.h>
+#include <mach/hardware.h>
+#endif
+
+#define USE_VMALLOC 0
+
+#if !USE_NEW_LINUX_SIGNAL
+#define USER_SIGNAL_TABLE_LEN_INIT 	64
+#endif
+
+#define MEMORY_LOCK(os) \
+	gcmVERIFY_OK(gcoOS_AcquireMutex( \
+								(os), \
+								(os)->memoryLock, \
+								gcvINFINITE))
+
+#define MEMORY_UNLOCK(os) \
+	gcmVERIFY_OK(gcoOS_ReleaseMutex((os), (os)->memoryLock))
+
+#define MEMORY_MAP_LOCK(os) \
+	gcmVERIFY_OK(gcoOS_AcquireMutex( \
+								(os), \
+								(os)->memoryMapLock, \
+								gcvINFINITE))
+
+#define MEMORY_MAP_UNLOCK(os) \
+	gcmVERIFY_OK(gcoOS_ReleaseMutex((os), (os)->memoryMapLock))
+
+
+
+
+static void _Print(
+	char *Message,
+	va_list Arguments
+	)
+{
+	char buffer[1000];
+	int n;
+	
+	/* Print message to buffer. */
+	n = vsnprintf(buffer, sizeof(buffer), Message, Arguments);
+	if ((n <= 0) || (buffer[n - 1] != '\n'))
+	{
+		/* Append new-line. */
+		strncat(buffer, "\n", sizeof(buffer));
+	}
+
+	/* Output to debugger. */	
+	printk(buffer);
+}
+
+/******************************************************************************\
+********************************* Debug Macros *********************************
+\******************************************************************************/
+
+#define _DEBUGPRINT(Message) \
+{ \
+	va_list arguments; \
+	\
+	va_start(arguments, Message); \
+	_Print(Message, arguments); \
+	va_end(arguments); \
+}
+
+
+#if MRVL_ENABLE_API_LOG
+static gctUINT32 g_logFilter = _GFX_LOG_ALL_;
+#else
+static gctUINT32 g_logFilter = _GFX_LOG_ERROR_ | _GFX_LOG_WARNING_;
+#endif
+
+void gcoOS_Log(IN unsigned int filter, IN char* msg,
+			...
+			)
+{
+    if(filter & g_logFilter)
+    {
+	    _DEBUGPRINT(msg);
+    }
+}
+
+void gcoOS_SetLogFilter(IN unsigned int filter)
+{
+    g_logFilter = filter;    
+}
+
+
+/******************************************************************************\
+********************************** Structures **********************************
+\******************************************************************************/
+
+struct _gcoOS
+{
+	/* Object. */
+	gcsOBJECT					object;
+
+	/* Heap. */
+	gcoHEAP						heap;
+
+	/* Pointer to device */
+	gcoGALDEVICE 				device;
+
+	/* Memory management */
+	gctPOINTER					memoryLock;
+	gctPOINTER					memoryMapLock;
+
+	struct _LINUX_MDL   		*mdlHead;
+	struct _LINUX_MDL   		*mdlTail;
+
+	gctUINT32					baseAddress;
+
+#if !USE_NEW_LINUX_SIGNAL
+	/* Signal management. */
+	struct _signal {
+		/* Unused signal ID number. */
+		gctINT unused;
+
+		/* The pointer to the table. */
+		gctPOINTER * table;
+
+		/* Signal table length. */
+		gctINT tableLen;
+
+		/* The current unused signal ID. */
+		gctINT currentID;
+
+		/* Lock. */
+		gctPOINTER lock;
+	} signal;
+#endif
+};
+
+#if !USE_NEW_LINUX_SIGNAL
+typedef struct _gcsSIGNAL
+{
+	/* Kernel sync primitive. */
+	struct completion event;
+
+	/* Manual reset flag. */
+	gctBOOL manualReset;
+
+	/* The reference counter. */
+	atomic_t ref;
+
+	/* The owner of the signal. */
+	gctHANDLE process;
+}
+gcsSIGNAL;
+
+typedef struct _gcsSIGNAL *	gcsSIGNAL_PTR;
+#endif
+
+typedef struct _gcsPageInfo * gcsPageInfo_PTR;
+
+typedef struct _gcsPageInfo
+{
+	struct page **pages;
+	gctUINT32_PTR pageTable;
+}
+gcsPageInfo;
+
+static PLINUX_MDL
+_CreateMdl(
+	IN gctINT PID
+	)
+{
+	PLINUX_MDL	mdl;
+
+    mdl = (PLINUX_MDL)kmalloc(sizeof(struct _LINUX_MDL), GFP_ATOMIC);
+	if (mdl == gcvNULL) return gcvNULL;
+
+	mdl->pid	= PID;
+	mdl->maps	= gcvNULL;
+	mdl->prev	= gcvNULL;
+	mdl->next	= gcvNULL;
+
+	return mdl;
+}
+
+static gceSTATUS
+_DestroyMdlMap(
+	IN PLINUX_MDL Mdl,
+	IN PLINUX_MDL_MAP MdlMap
+	);
+
+static gceSTATUS
+_DestroyMdl(
+	IN PLINUX_MDL Mdl
+	)
+{
+	PLINUX_MDL_MAP mdlMap;
+
+	/* Verify the arguments. */
+	gcmVERIFY_ARGUMENT(Mdl != gcvNULL);
+
+	mdlMap = Mdl->maps;
+
+	while (mdlMap != gcvNULL)
+	{
+		gcmVERIFY_OK(_DestroyMdlMap(Mdl, mdlMap));
+
+		mdlMap = Mdl->maps;
+	}
+
+	kfree(Mdl);
+
+	return gcvSTATUS_OK;
+}
+
+static PLINUX_MDL_MAP
+_CreateMdlMap(
+	IN PLINUX_MDL Mdl,
+	IN gctINT PID
+	)
+{
+	PLINUX_MDL_MAP	mdlMap;
+
+    mdlMap = (PLINUX_MDL_MAP)kmalloc(sizeof(struct _LINUX_MDL_MAP), GFP_ATOMIC);
+	if (mdlMap == gcvNULL) return gcvNULL;
+
+	mdlMap->pid		= PID;
+	mdlMap->vmaAddr	= gcvNULL;
+	mdlMap->vma		= gcvNULL;
+
+	mdlMap->next	= Mdl->maps;
+	Mdl->maps		= mdlMap;
+
+	return mdlMap;
+}
+
+static gceSTATUS
+_DestroyMdlMap(
+	IN PLINUX_MDL Mdl,
+	IN PLINUX_MDL_MAP MdlMap
+	)
+{
+	PLINUX_MDL_MAP	prevMdlMap;
+
+	/* Verify the arguments. */
+	gcmVERIFY_ARGUMENT(MdlMap != gcvNULL);
+	gcmASSERT(Mdl->maps != gcvNULL);
+
+	if (Mdl->maps == MdlMap)
+	{
+		Mdl->maps = MdlMap->next;
+	}
+	else
+	{
+		prevMdlMap = Mdl->maps;
+
+		while (prevMdlMap->next != MdlMap)
+		{
+			prevMdlMap = prevMdlMap->next;
+
+			gcmASSERT(prevMdlMap != gcvNULL);
+		}
+
+		prevMdlMap->next = MdlMap->next;
+	}
+
+	kfree(MdlMap);
+
+	return gcvSTATUS_OK;
+}
+
+extern PLINUX_MDL_MAP
+FindMdlMap(
+	IN PLINUX_MDL Mdl,
+	IN gctINT PID
+	)
+{
+	PLINUX_MDL_MAP	mdlMap;
+
+	mdlMap = Mdl->maps;
+
+	while (mdlMap != gcvNULL)
+	{
+		if (mdlMap->pid == PID) return mdlMap;
+
+		mdlMap = mdlMap->next;
+	}
+
+	return gcvNULL;
+}
+
+void
+FreeProcessMemoryOnExit(
+	IN gcoOS Os,
+	IN gcoKERNEL Kernel
+	)
+{
+	PLINUX_MDL      mdl, nextMdl;
+	PLINUX_MDL_MAP	mdlMap;
+
+	MEMORY_LOCK(Os);
+
+	mdl = Os->mdlHead;
+
+	while (mdl != gcvNULL)
+	{
+		if (mdl != Os->mdlTail)
+		{
+			nextMdl = mdl->next;
+		}
+		else
+		{
+			nextMdl = gcvNULL;
+		}
+
+		if (mdl->pagedMem)
+		{
+			mdlMap = mdl->maps;
+
+			if (mdlMap != gcvNULL
+				&& mdlMap->pid == current->tgid
+				&& mdlMap->next == gcvNULL)
+			{
+				MEMORY_UNLOCK(Os);
+
+				gcmVERIFY_OK(gcoOS_FreePagedMemory(Os, mdl, mdl->numPages * PAGE_SIZE));
+
+				MEMORY_LOCK(Os);
+
+				nextMdl = Os->mdlHead;
+			}
+		}
+
+		mdl = nextMdl;
+    }
+
+	MEMORY_UNLOCK(Os);
+}
+
+void
+PrintInfoOnExit(
+	IN gcoOS Os,
+	IN gcoKERNEL Kernel
+	)
+{
+	PLINUX_MDL      mdl, nextMdl;
+	PLINUX_MDL_MAP	mdlMap;
+
+#if COMMAND_PROCESSOR_VERSION == 1
+#if !USE_EVENT_QUEUE
+	{
+		gctUINT i, c = 0;
+
+		for (i = 0; i < 32; i++)
+		{
+			if (Kernel->event->schedule[i].stamp != 0)
+			{
+				printk("#Unfreed event[%d]: type: %d, stamp: %d\n",
+						i, Kernel->event->schedule[i].type,
+						(gctUINT32)Kernel->event->schedule[i].stamp);
+				c++;
+
+				if (Kernel->event->schedule[i].type == gcvEVENT_FREE_VIDEO_MEMORY)
+				{
+					gcuVIDMEM_NODE_PTR node =
+							Kernel->event->schedule[i].data.FreeVideoMemory.node;
+
+					printk("\tnode: 0x%x, address: 0x%x, bytes: 0x%x\n",
+							node,
+							node->VidMem.address,
+							node->VidMem.bytes);
+				}
+			}
+		}
+
+		printk("#Total unfreed events: %d\n", c);
+	}
+#endif
+#endif
+
+	{
+		/* Mark the entire page table as available. */
+		gcoMMU mmu;
+		gctUINT32 *pageTable;
+		int i;
+
+		mmu = Kernel->mmu;
+		pageTable = (gctUINT32 *) mmu->pageTableLogical;
+
+		for (i = 0; i < mmu->entryCount; i++)
+		{
+			if (pageTable[i] != ~0)
+			{
+				printk("#Occupied mmu entry[%d] -> 0x%x\n", i, pageTable[i]);
+				pageTable[i] = ~0;
+			}
+		}
+	}
+
+	MEMORY_LOCK(Os);
+
+	mdl = Os->mdlHead;
+
+	while (mdl != gcvNULL)
+	{
+		if (mdl != Os->mdlTail)
+		{
+			nextMdl = mdl->next;
+		}
+		else
+		{
+			nextMdl = gcvNULL;
+		}
+
+		printk("Unfreed mdl: %p, pid: %d -> pagedMem: %s, addr: %p, dmaHandle: 0x%x, pages: %d\n",
+			mdl,
+			mdl->pid,
+			mdl->pagedMem? "true" : "false",
+			mdl->addr,
+			mdl->dmaHandle,
+			mdl->numPages);
+
+		mdlMap = mdl->maps;
+
+		while (mdlMap != gcvNULL)
+		{
+			printk("\tmap: %p, pid: %d -> vmaAddr: %p, vma: %p\n",
+					mdlMap,
+					mdlMap->pid,
+					mdlMap->vmaAddr,
+					mdlMap->vma);
+
+			mdlMap = mdlMap->next;
+		}
+
+		mdl = nextMdl;
+	}
+
+	MEMORY_UNLOCK(Os);
+}
+
+void
+OnProcessExit(
+	IN gcoOS Os,
+	IN gcoKERNEL Kernel
+	)
+{
+	/* PrintInfoOnExit(Os, Kernel); */
+
+#ifdef ANDROID
+	FreeProcessMemoryOnExit(Os, Kernel);
+#endif
+}
+
+/*******************************************************************************
+**
+**	gcoOS_Construct
+**
+**	Construct a new gcoOS object.
+**
+**	INPUT:
+**
+**		gctPOINTER Context
+**			Pointer to the gcoGALDEVICE class.
+**
+**	OUTPUT:
+**
+**		gcoOS * Os
+**			Pointer to a variable that will hold the pointer to the gcoOS object.
+*/
+gceSTATUS gcoOS_Construct(
+	IN gctPOINTER Context,
+	OUT gcoOS * Os
+	)
+{
+    gcoOS os;
+	gceSTATUS status;
+
+	/* Verify the arguments. */
+	gcmVERIFY_ARGUMENT(Os != gcvNULL);
+
+	/* Allocate the gcoOS object. */
+    os = (gcoOS) kmalloc(gcmSIZEOF(struct _gcoOS), GFP_ATOMIC);
+
+	if (os == gcvNULL)
+	{
+		/* Out of memory. */
+		return gcvSTATUS_OUT_OF_MEMORY;
+	}
+
+	/* Zero the memory. */
+	memset(os, 0, gcmSIZEOF(struct _gcoOS));
+
+	/* Initialize the gcoOS object. */
+	os->object.type = gcvOBJ_OS;
+
+	/* Set device device. */
+	os->device = Context;
+
+	/* IMPORTANT! No heap yet. */
+	os->heap = gcvNULL;
+
+	/* Initialize the memory lock. */
+	gcmONERROR(
+		gcoOS_CreateMutex(os, &os->memoryLock));
+
+	gcmONERROR(
+		gcoOS_CreateMutex(os, &os->memoryMapLock));
+
+	/* Create the gcoHEAP object. */
+    gcmONERROR(
+		gcoHEAP_Construct(os, PAGE_SIZE, 32, &os->heap));
+
+	os->mdlHead = os->mdlTail = gcvNULL;
+
+	/* Find the base address of the physical memory. */
+	os->baseAddress = os->device->baseAddress;
+
+	gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_OS,
+				  "Physical base address set to 0x%08X.\n",
+				  os->baseAddress);
+
+#if !USE_NEW_LINUX_SIGNAL
+	/*
+	 * Initialize the signal manager.
+	 * It creates the signals to be used in
+	 * the user space.
+	 */
+
+	/* Initialize mutex. */
+	gcmONERROR(
+		gcoOS_CreateMutex(os, &os->signal.lock));
+
+	/* Initialize the signal table. */
+	os->signal.table =
+		kmalloc(gcmSIZEOF(gctPOINTER) * USER_SIGNAL_TABLE_LEN_INIT, GFP_KERNEL);
+
+	if (os->signal.table == gcvNULL)
+	{
+		/* Out of memory. */
+		status = gcvSTATUS_OUT_OF_MEMORY;
+		goto OnError;
+	}
+
+	memset(os->signal.table,
+		   0,
+		   gcmSIZEOF(gctPOINTER) * USER_SIGNAL_TABLE_LEN_INIT);
+
+	/* Set the signal table length. */
+	os->signal.tableLen = USER_SIGNAL_TABLE_LEN_INIT;
+
+	/* The table is empty. */
+	os->signal.unused = os->signal.tableLen;
+
+	/* Initial signal ID. */
+	os->signal.currentID = 0;
+#endif
+
+	/* Return pointer to the gcoOS object. */
+	*Os = os;
+
+	/* Success. */
+	return gcvSTATUS_OK;
+
+OnError:
+#if !USE_NEW_LINUX_SIGNAL
+	/* Roll back any allocation. */
+	if (os->signal.table != gcvNULL)
+	{
+		kfree(os->signal.table);
+	}
+
+	if (os->signal.lock != gcvNULL)
+	{
+		gcmVERIFY_OK(
+			gcoOS_DeleteMutex(os, os->signal.lock));
+	}
+#endif
+
+	if (os->heap != gcvNULL)
+	{
+		gcmVERIFY_OK(
+			gcoHEAP_Destroy(os->heap));
+	}
+
+	if (os->memoryMapLock != gcvNULL)
+	{
+		gcmVERIFY_OK(
+			gcoOS_DeleteMutex(os, os->memoryMapLock));
+	}
+
+	if (os->memoryLock != gcvNULL)
+	{
+		gcmVERIFY_OK(
+			gcoOS_DeleteMutex(os, os->memoryLock));
+	}
+
+	kfree(os);
+
+	/* Return the error. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_Destroy
+**
+**	Destroy an gcoOS object.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object that needs to be destroyed.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcoOS_Destroy(
+	IN gcoOS Os
+	)
+{
+	gcoHEAP heap;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+
+#if !USE_NEW_LINUX_SIGNAL
+	/*
+	 * Destroy the signal manager.
+	 */
+
+	/* Destroy the mutex. */
+	gcmVERIFY_OK(
+		gcoOS_DeleteMutex(Os, Os->signal.lock));
+
+	/* Free the signal table. */
+	kfree(Os->signal.table);
+#endif
+
+	if (Os->heap != NULL)
+	{
+		/* Mark gcoHEAP as gone. */
+		heap     = Os->heap;
+		Os->heap = NULL;
+
+		/* Destroy the gcoHEAP object. */
+		gcmVERIFY_OK(
+			gcoHEAP_Destroy(heap));
+	}
+
+	/* Destroy the memory lock. */
+	gcmVERIFY_OK(
+		gcoOS_DeleteMutex(Os, Os->memoryMapLock));
+
+	gcmVERIFY_OK(
+		gcoOS_DeleteMutex(Os, Os->memoryLock));
+
+	/* Mark the gcoOS object as unknown. */
+	Os->object.type = gcvOBJ_UNKNOWN;
+
+	/* Free the gcoOS object. */
+	kfree(Os);
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_Allocate
+**
+**	Allocate memory.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctSIZE_T Bytes
+**			Number of bytes to allocate.
+**
+**	OUTPUT:
+**
+**		gctPOINTER * Memory
+**			Pointer to a variable that will hold the allocated memory location.
+*/
+gceSTATUS
+gcoOS_Allocate(
+	IN gcoOS Os,
+	IN gctSIZE_T Bytes,
+	OUT gctPOINTER * Memory
+	)
+{
+    gctPOINTER memory;
+
+    /* Verify the arguments. */
+    gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+    gcmVERIFY_ARGUMENT(Bytes > 0);
+    gcmVERIFY_ARGUMENT(Memory != NULL);
+
+	gcmTRACE_ZONE(gcvLEVEL_VERBOSE, gcvZONE_OS,
+				  "Enter gcoOS_Allocate.\n");
+
+    /* Do we have a heap? */
+    if (Os->heap != NULL)
+    {
+        /* Allocate from the heap. */
+        return gcoHEAP_Allocate(Os->heap, Bytes, Memory);
+    }
+
+    memory = (gctPOINTER) kmalloc(Bytes, GFP_ATOMIC);
+
+    if (memory == NULL)
+    {
+        /* Out of memory. */
+        return gcvSTATUS_OUT_OF_MEMORY;
+    }
+
+    /* Return pointer to the memory allocation. */
+    *Memory = memory;
+
+	gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_OS,
+    			  "gcoOS_Allocate: Memory Allocated->0x%x\n",
+				  (gctUINT32) memory);
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_Free
+**
+**	Free allocated memory.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctPOINTER Memory
+**			Pointer to memory allocation to free.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcoOS_Free(
+	IN gcoOS Os,
+	IN gctPOINTER Memory
+	)
+{
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmVERIFY_ARGUMENT(Memory != NULL);
+
+	/* Do we have a heap? */
+	if (Os->heap != NULL)
+	{
+		/* Free from the heap. */
+		return gcoHEAP_Free(Os->heap, Memory);
+	}
+
+	gcmTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+    			"gcoOS_Free: Memory Freed->0x%x\n",
+				(gctUINT32)Memory);
+
+	/* Free the memory from the OS pool. */
+	kfree(Memory);
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_MapMemory
+**
+**	Map physical memory into the current process.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctPHYS_ADDR Physical
+**			Start of physical address memory.
+**
+**		gctSIZE_T Bytes
+**			Number of bytes to map.
+**
+**	OUTPUT:
+**
+**		gctPOINTER * Memory
+**			Pointer to a variable that will hold the logical address of the
+**			mapped memory.
+*/
+gceSTATUS gcoOS_MapMemory(
+	IN gcoOS Os,
+	IN gctPHYS_ADDR Physical,
+	IN gctSIZE_T Bytes,
+	OUT gctPOINTER * Logical
+	)
+{
+	PLINUX_MDL_MAP	mdlMap;
+    PLINUX_MDL		mdl = (PLINUX_MDL)Physical;
+
+	/* Verify the arguments. */
+    gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+    gcmVERIFY_ARGUMENT(Physical != 0);
+    gcmVERIFY_ARGUMENT(Bytes > 0);
+    gcmVERIFY_ARGUMENT(Logical != NULL);
+
+	gcmTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+				"Enter gcoOS_MapMemory\n");
+
+	MEMORY_LOCK(Os);
+
+	mdlMap = FindMdlMap(mdl, current->tgid);
+
+	if (mdlMap == gcvNULL)
+	{
+		mdlMap = _CreateMdlMap(mdl, current->tgid);
+
+		if (mdlMap == gcvNULL)
+		{
+			MEMORY_UNLOCK(Os);
+
+			return gcvSTATUS_OUT_OF_MEMORY;
+		}
+	}
+
+	if (mdlMap->vmaAddr == gcvNULL)
+	{
+		down_write(&current->mm->mmap_sem);
+
+		mdlMap->vmaAddr = (char *)do_mmap_pgoff(NULL,
+					0L,
+					mdl->numPages * PAGE_SIZE,
+					PROT_READ | PROT_WRITE,
+					MAP_SHARED,
+					0);
+
+		if (mdlMap->vmaAddr == gcvNULL)
+		{
+			gcmTRACE_ZONE(gcvLEVEL_ERROR,
+				gcvZONE_OS,
+				"gcoOS_MapMemory: do_mmap_pgoff error\n");
+
+			gcmTRACE_ZONE(gcvLEVEL_ERROR,
+				gcvZONE_OS,
+				"[gcoOS_MapMemory] mdl->numPages: %d\n",
+				"[gcoOS_MapMemory] mdl->vmaAddr: 0x%x\n",
+				mdl->numPages,
+				mdlMap->vmaAddr
+				);
+
+			up_write(&current->mm->mmap_sem);
+
+			MEMORY_UNLOCK(Os);
+
+			return gcvSTATUS_OUT_OF_MEMORY;
+		}
+
+		mdlMap->vma = find_vma(current->mm, (unsigned long)mdlMap->vmaAddr);
+
+		if (!mdlMap->vma)
+		{
+			gcmTRACE_ZONE(gcvLEVEL_ERROR,
+					gcvZONE_OS,
+					"gcoOS_MapMemory: find_vma error.\n");
+
+			mdlMap->vmaAddr = gcvNULL;
+
+			up_write(&current->mm->mmap_sem);
+
+			MEMORY_UNLOCK(Os);
+
+			return gcvSTATUS_OUT_OF_RESOURCES;
+		}
+
+#ifndef NO_DMA_COHERENT
+		if (dma_mmap_coherent(NULL,
+					mdlMap->vma,
+					mdl->addr,
+					mdl->dmaHandle,
+					mdl->numPages * PAGE_SIZE) < 0)
+		{
+			up_write(&current->mm->mmap_sem);
+
+			gcmTRACE_ZONE(gcvLEVEL_ERROR,
+					gcvZONE_OS,
+					"gcoOS_MapMemory: dma_mmap_coherent error.\n");
+
+			mdlMap->vmaAddr = gcvNULL;
+
+			MEMORY_UNLOCK(Os);
+
+			return gcvSTATUS_OUT_OF_RESOURCES;
+		}
+#else
+		mdlMap->vma->vm_page_prot = pgprot_noncached(mdlMap->vma->vm_page_prot);
+		mdlMap->vma->vm_flags |= VM_IO | VM_DONTCOPY | VM_DONTEXPAND | VM_RESERVED;
+		mdlMap->vma->vm_pgoff = 0;
+
+		if (remap_pfn_range(mdlMap->vma,
+							mdlMap->vma->vm_start,
+							mdl->dmaHandle >> PAGE_SHIFT,
+                	        mdl->numPages*PAGE_SIZE,
+                    	    mdlMap->vma->vm_page_prot) < 0)
+		{
+    	    up_write(&current->mm->mmap_sem);
+
+			gcmTRACE_ZONE(gcvLEVEL_ERROR,
+					gcvZONE_OS,
+					"gcoOS_MapMemory: remap_pfn_range error.\n");
+
+			mdlMap->vmaAddr = gcvNULL;
+
+			MEMORY_UNLOCK(Os);
+
+			return gcvSTATUS_OUT_OF_RESOURCES;
+		}
+#endif
+
+		up_write(&current->mm->mmap_sem);
+	}
+
+	MEMORY_UNLOCK(Os);
+
+    *Logical = mdlMap->vmaAddr;
+
+	gcmTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_OS,
+    			"gcoOS_MapMemory: User Mapped address for 0x%x is 0x%x pid->%d\n",
+           		(gctUINT32)mdl->addr,
+				(gctUINT32)*Logical,
+				mdlMap->pid);
+
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_UnmapMemory
+**
+**	Unmap physical memory out of the current process.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctPHYS_ADDR Physical
+**			Start of physical address memory.
+**
+**		gctSIZE_T Bytes
+**			Number of bytes to unmap.
+**
+**		gctPOINTER Memory
+**			Pointer to a previously mapped memory region.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gcoOS_UnmapMemory(
+	IN gcoOS Os,
+	IN gctPHYS_ADDR Physical,
+	IN gctSIZE_T Bytes,
+	IN gctPOINTER Logical
+	)
+{
+	PLINUX_MDL_MAP			mdlMap;
+    PLINUX_MDL				mdl = (PLINUX_MDL)Physical;
+    struct task_struct *	task;
+
+    /* Verify the arguments. */
+	gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmVERIFY_ARGUMENT(Physical != 0);
+	gcmVERIFY_ARGUMENT(Bytes > 0);
+	gcmVERIFY_ARGUMENT(Logical != NULL);
+
+	gcmTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+				"in gcoOS_UnmapMemory\n");
+
+	gcmTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+				"gcoOS_UnmapMemory Will be unmapping 0x%x mdl->0x%x\n",
+				(gctUINT32)Logical,
+				(gctUINT32)mdl);
+
+	MEMORY_LOCK(Os);
+
+    if (Logical)
+    {
+		gcmTRACE_ZONE(gcvLEVEL_VERBOSE,
+			gcvZONE_OS,
+			"[gcoOS_UnmapMemory] Logical: 0x%x\n",
+			Logical
+			);
+
+		mdlMap = FindMdlMap(mdl, current->tgid);
+
+		if (mdlMap == gcvNULL || mdlMap->vmaAddr == gcvNULL)
+		{
+			MEMORY_UNLOCK(Os);
+
+			return gcvSTATUS_INVALID_ARGUMENT;
+		}
+
+        /* Get the current pointer for the task with stored pid. */
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28)
+{
+	    extern rwlock_t tasklist_lock;
+
+    	read_lock(&tasklist_lock);
+
+        task = FIND_TASK_BY_PID(mdlMap->pid);
+
+	    read_unlock(&tasklist_lock);
+}
+#else
+		rcu_read_lock();
+
+        task = FIND_TASK_BY_PID(mdlMap->pid);
+#endif
+
+        if (task != gcvNULL && task->mm != gcvNULL)
+		{
+			down_write(&task->mm->mmap_sem);
+			do_munmap(task->mm, (unsigned long)Logical, mdl->numPages*PAGE_SIZE);
+			up_write(&task->mm->mmap_sem);
+        }
+        else
+		{
+			gcmTRACE_ZONE(gcvLEVEL_INFO,
+						gcvZONE_OS,
+            			"Can't find the task with pid->%d. No unmapping\n",
+						mdlMap->pid);
+        }
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28)
+		/* Do Nothing */
+#else
+		rcu_read_unlock();
+#endif
+		gcmVERIFY_OK(_DestroyMdlMap(mdl, mdlMap));
+    }
+
+	MEMORY_UNLOCK(Os);
+
+	/* Success. */
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_AllocateNonPagedMemory
+**
+**	Allocate a number of pages from non-paged memory.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctBOOL InUserSpace
+**			gcvTRUE if the pages need to be mapped into user space.
+**
+**		gctSIZE_T * Bytes
+**			Pointer to a variable that holds the number of bytes to allocate.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * Bytes
+**			Pointer to a variable that hold the number of bytes allocated.
+**
+**		gctPHYS_ADDR * Physical
+**			Pointer to a variable that will hold the physical address of the
+**			allocation.
+**
+**		gctPOINTER * Logical
+**			Pointer to a variable that will hold the logical address of the
+**			allocation.
+*/
+gceSTATUS gcoOS_AllocateNonPagedMemory(
+	IN gcoOS Os,
+	IN gctBOOL InUserSpace,
+	IN OUT gctSIZE_T * Bytes,
+	OUT gctPHYS_ADDR * Physical,
+	OUT gctPOINTER * Logical
+	)
+{
+    gctSIZE_T		bytes;
+    gctINT			numPages;
+    PLINUX_MDL		mdl;
+	PLINUX_MDL_MAP	mdlMap = 0;
+	gctSTRING		addr;
+
+#ifdef NO_DMA_COHERENT
+	struct page *	page;
+    long			size, order;
+	gctPOINTER		vaddr;
+#endif
+
+    /* Verify the arguments. */
+    gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+    gcmVERIFY_ARGUMENT((Bytes != NULL) && (*Bytes > 0));
+    gcmVERIFY_ARGUMENT(Physical != NULL);
+    gcmVERIFY_ARGUMENT(Logical != NULL);
+
+	gcmTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+				"in gcoOS_AllocateNonPagedMemory\n");
+
+    /* Align number of bytes to page size. */
+    bytes = gcmALIGN(*Bytes, PAGE_SIZE);
+
+    /* Get total number of pages.. */
+    numPages = GetPageCount(bytes, 0);
+
+    /* Allocate mdl+vector structure */
+    mdl = _CreateMdl(current->tgid);
+
+	if (mdl == gcvNULL)
+	{
+		return gcvSTATUS_OUT_OF_MEMORY;
+	}
+
+	mdl->pagedMem = 0;
+    mdl->numPages = numPages;
+
+	MEMORY_LOCK(Os);
+
+#ifndef NO_DMA_COHERENT
+    addr = dma_alloc_coherent(NULL,
+				mdl->numPages * PAGE_SIZE,
+				&mdl->dmaHandle,
+				GFP_ATOMIC);
+#else
+	size	= mdl->numPages * PAGE_SIZE;
+	order	= get_order(size);
+	page	= alloc_pages(GFP_KERNEL | GFP_DMA, order);
+
+	if (page == gcvNULL)
+	{
+		MEMORY_UNLOCK(Os);
+
+		return gcvSTATUS_OUT_OF_MEMORY;
+	}
+
+	vaddr			= (gctPOINTER)page_address(page);
+	addr			= ioremap_nocache(virt_to_phys(vaddr), size);
+	mdl->dmaHandle	= virt_to_phys(vaddr);
+	mdl->kaddr		= vaddr;
+
+#if ENABLE_ARM_L2_CACHE
+	dma_cache_maint(vaddr, size, DMA_FROM_DEVICE);
+#endif
+
+	while (size > 0)
+	{
+		SetPageReserved(virt_to_page(vaddr));
+
+		vaddr	+= PAGE_SIZE;
+		size	-= PAGE_SIZE;
+	}
+#endif
+
+    if (addr == gcvNULL)
+	{
+		gcmTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+       			"galcore: Can't allocate memorry for size->0x%x\n",
+				(gctUINT32)bytes);
+
+        gcmVERIFY_OK(_DestroyMdl(mdl));
+
+		MEMORY_UNLOCK(Os);
+
+        return gcvSTATUS_OUT_OF_MEMORY;
+    }
+
+	if ((Os->baseAddress & 0x80000000) != (mdl->dmaHandle & 0x80000000))
+	{
+		mdl->dmaHandle = (mdl->dmaHandle & ~0x80000000)
+					   | (Os->baseAddress & 0x80000000);
+	}
+
+    mdl->addr = addr;
+
+    /*
+	 * We will not do any mapping from here.
+	 * Mapping will happen from mmap method.
+	 * mdl structure will be used.
+	 */
+
+    /* Return allocated memory. */
+    *Bytes = bytes;
+    *Physical = (gctPHYS_ADDR) mdl;
+
+    if (InUserSpace)
+    {
+		mdlMap = _CreateMdlMap(mdl, current->tgid);
+
+		if (mdlMap == gcvNULL)
+		{
+			gcmVERIFY_OK(_DestroyMdl(mdl));
+
+			MEMORY_UNLOCK(Os);
+
+			return gcvSTATUS_OUT_OF_MEMORY;
+		}
+
+        /* Only after mmap this will be valid. */
+
+        /* We need to map this to user space. */
+        down_write(&current->mm->mmap_sem);
+
+        mdlMap->vmaAddr = (gctSTRING)do_mmap_pgoff(gcvNULL,
+				0L,
+				mdl->numPages * PAGE_SIZE,
+				PROT_READ | PROT_WRITE,
+				MAP_SHARED,
+				0);
+
+        if (mdlMap->vmaAddr == gcvNULL)
+        {
+			gcmTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+				"galcore: do_mmap_pgoff error\n");
+
+			up_write(&current->mm->mmap_sem);
+
+			gcmVERIFY_OK(_DestroyMdlMap(mdl, mdlMap));
+			gcmVERIFY_OK(_DestroyMdl(mdl));
+
+			MEMORY_UNLOCK(Os);
+
+			return gcvSTATUS_OUT_OF_MEMORY;
+        }
+
+        mdlMap->vma = find_vma(current->mm, (unsigned long)mdlMap->vmaAddr);
+
+		if (mdlMap->vma == gcvNULL)
+		{
+			gcmTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+				"find_vma error\n");
+
+			up_write(&current->mm->mmap_sem);
+
+			gcmVERIFY_OK(_DestroyMdlMap(mdl, mdlMap));
+			gcmVERIFY_OK(_DestroyMdl(mdl));
+
+			MEMORY_UNLOCK(Os);
+
+			up_write(&current->mm->mmap_sem);
+
+			return gcvSTATUS_OUT_OF_RESOURCES;
+		}
+
+#ifndef NO_DMA_COHERENT
+        if (dma_mmap_coherent(NULL,
+				mdlMap->vma,
+				mdl->addr,
+				mdl->dmaHandle,
+				mdl->numPages * PAGE_SIZE) < 0)
+		{
+			up_write(&current->mm->mmap_sem);
+
+			gcmTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+				"dma_mmap_coherent error\n");
+
+			gcmVERIFY_OK(_DestroyMdlMap(mdl, mdlMap));
+			gcmVERIFY_OK(_DestroyMdl(mdl));
+
+			MEMORY_UNLOCK(Os);
+
+			return gcvSTATUS_OUT_OF_RESOURCES;
+		}
+#else
+		mdlMap->vma->vm_page_prot = pgprot_noncached(mdlMap->vma->vm_page_prot);
+		mdlMap->vma->vm_flags |= VM_IO | VM_DONTCOPY | VM_DONTEXPAND | VM_RESERVED;
+		mdlMap->vma->vm_pgoff = 0;
+
+		if (remap_pfn_range(mdlMap->vma,
+							mdlMap->vma->vm_start,
+							mdl->dmaHandle >> PAGE_SHIFT,
+							mdl->numPages * PAGE_SIZE,
+							mdlMap->vma->vm_page_prot))
+		{
+			up_write(&current->mm->mmap_sem);
+
+			gcmTRACE_ZONE(gcvLEVEL_INFO,
+					gcvZONE_OS,
+					"remap_pfn_range error\n");
+
+			gcmVERIFY_OK(_DestroyMdlMap(mdl, mdlMap));
+			gcmVERIFY_OK(_DestroyMdl(mdl));
+
+			MEMORY_UNLOCK(Os);
+
+			return gcvSTATUS_OUT_OF_RESOURCES;
+		}
+#endif /* NO_DMA_COHERENT */
+
+        up_write(&current->mm->mmap_sem);
+
+        *Logical = mdlMap->vmaAddr;
+    }
+    else
+    {
+        *Logical = (gctPOINTER)mdl->addr;
+    }
+
+    /*
+	 * Add this to a global list.
+	 * Will be used by get physical address
+	 * and mapuser pointer functions.
+	 */
+
+    if (!Os->mdlHead)
+    {
+        /* Initialize the queue. */
+        Os->mdlHead = Os->mdlTail = mdl;
+    }
+    else
+    {
+        /* Add to the tail. */
+        mdl->prev = Os->mdlTail;
+        Os->mdlTail->next = mdl;
+        Os->mdlTail = mdl;
+    }
+
+	MEMORY_UNLOCK(Os);
+
+	gcmTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+    			"gcoOS_AllocateNonPagedMemory: "
+				"Bytes->0x%x, Mdl->%p, Logical->0x%x dmaHandle->0x%x\n",
+           		(gctUINT32)bytes,
+				mdl,
+				(gctUINT32)mdl->addr,
+				mdl->dmaHandle);
+
+	if (InUserSpace)
+	{
+		gcmTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+				"vmaAddr->0x%x pid->%d\n",
+				(gctUINT32)mdlMap->vmaAddr,
+ 				mdlMap->pid);
+	}
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_FreeNonPagedMemory
+**
+**	Free previously allocated and mapped pages from non-paged memory.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctSIZE_T Bytes
+**			Number of bytes allocated.
+**
+**		gctPHYS_ADDR Physical
+**			Physical address of the allocated memory.
+**
+**		gctPOINTER Logical
+**			Logical address of the allocated memory.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gcoOS_FreeNonPagedMemory(
+	IN gcoOS Os,
+	IN gctSIZE_T Bytes,
+	IN gctPHYS_ADDR Physical,
+	IN gctPOINTER Logical
+	)
+{
+    PLINUX_MDL				mdl;
+	PLINUX_MDL_MAP			mdlMap;
+    struct task_struct *	task;
+
+#ifdef NO_DMA_COHERENT
+	unsigned				size;
+	gctPOINTER				vaddr;
+#endif /* NO_DMA_COHERENT */
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmVERIFY_ARGUMENT(Bytes > 0);
+	gcmVERIFY_ARGUMENT(Physical != 0);
+	gcmVERIFY_ARGUMENT(Logical != NULL);
+
+	gcmTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+				"in gcoOS_FreeNonPagedMemory\n");
+
+	/* Convert physical address into a pointer to a MDL. */
+    mdl = (PLINUX_MDL) Physical;
+
+	MEMORY_LOCK(Os);
+
+#ifndef NO_DMA_COHERENT
+    dma_free_coherent(gcvNULL,
+					mdl->numPages * PAGE_SIZE,
+					mdl->addr,
+					mdl->dmaHandle);
+#else
+	size	= mdl->numPages * PAGE_SIZE;
+	vaddr	= mdl->kaddr;
+
+	while (size > 0)
+	{
+		ClearPageReserved(virt_to_page(vaddr));
+
+		vaddr	+= PAGE_SIZE;
+		size	-= PAGE_SIZE;
+	}
+
+	free_pages((unsigned long)mdl->kaddr, get_order(mdl->numPages * PAGE_SIZE));
+
+	iounmap(mdl->addr);
+#endif /* NO_DMA_COHERENT */
+
+	mdlMap = mdl->maps;
+
+	while (mdlMap != gcvNULL)
+	{
+		if (mdlMap->vmaAddr != gcvNULL)
+		{
+			/* Get the current pointer for the task with stored pid. */
+			task = FIND_TASK_BY_PID(mdlMap->pid);
+
+			if (task != gcvNULL && task->mm != gcvNULL)
+			{
+				down_write(&task->mm->mmap_sem);
+
+				if (do_munmap(task->mm,
+							(unsigned long)mdlMap->vmaAddr,
+							mdl->numPages * PAGE_SIZE) < 0)
+				{
+					gcmTRACE_ZONE(gcvLEVEL_INFO,
+								gcvZONE_OS,
+                				"gcoOS_FreeNonPagedMemory: "
+								"Unmap Failed ->Mdl->0x%x Logical->0x%x vmaAddr->0x%x\n",
+                        		(gctUINT32)mdl,
+								(gctUINT32)mdl->addr,
+								(gctUINT32)mdlMap->vmaAddr);
+				}
+
+				up_write(&task->mm->mmap_sem);
+			}
+
+			mdlMap->vmaAddr = gcvNULL;
+		}
+
+		mdlMap = mdlMap->next;
+	}
+
+    // Remove the node from global list..
+    if (mdl == Os->mdlHead)
+    {
+        if ((Os->mdlHead = mdl->next) == gcvNULL)
+        {
+            Os->mdlTail = gcvNULL;
+        }
+    }
+    else
+    {
+        mdl->prev->next = mdl->next;
+        if (mdl == Os->mdlTail)
+        {
+            Os->mdlTail = mdl->prev;
+        }
+        else
+        {
+            mdl->next->prev = mdl->prev;
+        }
+    }
+
+	MEMORY_UNLOCK(Os);
+
+	gcmTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+    			"gcoOS_FreeNonPagedMemory: "
+				"Mdl->0x%x Logical->0x%x\n",
+          		(gctUINT32)mdl,
+				(gctUINT32)mdl->addr);
+
+	gcmVERIFY_OK(_DestroyMdl(mdl));
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_ReadRegister
+**
+**	Read data from a register.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctUINT32 Address
+**			Address of register.
+**
+**	OUTPUT:
+**
+**		gctUINT32 * Data
+**			Pointer to a variable that receives the data read from the register.
+*/
+gceSTATUS gcoOS_ReadRegister(
+	IN gcoOS Os,
+	IN gctUINT32 Address,
+	OUT gctUINT32 * Data
+	)
+{
+    /* Verify the arguments. */
+    gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+    gcmVERIFY_ARGUMENT(Data != NULL);
+
+    *Data = readl((gctUINT8 *)Os->device->registerBase + Address);
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_WriteRegister
+**
+**	Write data to a register.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctUINT32 Address
+**			Address of register.
+**
+**		gctUINT32 Data
+**			Data for register.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gcoOS_WriteRegister(
+	IN gcoOS Os,
+	IN gctUINT32 Address,
+	IN gctUINT32 Data
+	)
+{
+    writel(Data, (gctUINT8 *)Os->device->registerBase + Address);
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_GetPageSize
+**
+**	Get the system's page size.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * PageSize
+**			Pointer to a variable that will receive the system's page size.
+*/
+gceSTATUS gcoOS_GetPageSize(
+	IN gcoOS Os,
+	OUT gctSIZE_T * PageSize
+	)
+{
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmVERIFY_ARGUMENT(PageSize != NULL);
+
+	/* Return the page size. */
+	*PageSize = (gctSIZE_T) PAGE_SIZE;
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_GetPhysicalAddress
+**
+**	Get the physical system address of a corresponding virtual address.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctPOINTER Logical
+**			Logical address.
+**
+**	OUTPUT:
+**
+**		gctUINT32 * Address
+**			Poinetr to a variable that receives the	32-bit physical adress.
+*/
+gceSTATUS gcoOS_GetPhysicalAddress(
+	IN gcoOS Os,
+	IN gctPOINTER Logical,
+	OUT gctUINT32 * Address
+	)
+{
+    PLINUX_MDL		mdl;
+	PLINUX_MDL_MAP	mdlMap;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+    gcmVERIFY_ARGUMENT(Address != gcvNULL);
+
+    /*
+	 * Try to search the address in our list.
+     * This could be an mmaped memory.
+	  * Search in our list.
+	  */
+
+	MEMORY_LOCK(Os);
+
+    mdl = Os->mdlHead;
+
+    while (mdl != gcvNULL)
+    {
+        /* Check for the logical address match. */
+        if (mdl->addr
+			&& (gctUINT32)Logical >= (gctUINT32)mdl->addr
+			&& (gctUINT32)Logical < ((gctUINT32)mdl->addr + mdl->numPages*PAGE_SIZE))
+        {
+            if (mdl->dmaHandle)
+            {
+                /* The memory was from coherent area. */
+                *Address = (gctUINT32)mdl->dmaHandle
+							+ (gctUINT32)((gctUINT32)Logical - (gctUINT32)mdl->addr);
+            }
+            else if (mdl->pagedMem)
+            {
+#if USE_VMALLOC
+                *Address = page_to_phys(vmalloc_to_page((gctSTRING)mdl->addr
+							+ ((gctUINT32)Logical - (gctUINT32)mdl->addr)));
+#else
+                *Address = (gctUINT32)virt_to_phys(mdl->addr)
+							+ ((gctUINT32)Logical - (gctUINT32)mdl->addr);
+#endif
+            }
+            else
+            {
+                *Address = (gctUINT32)virt_to_phys(mdl->addr)
+							+ ((gctUINT32)Logical - (gctUINT32)mdl->addr);
+            }
+            break;
+        }
+
+		mdlMap = FindMdlMap(mdl, current->tgid);
+
+        /* Is the given address within that range. */
+        if (mdlMap != gcvNULL
+			&& mdlMap->vmaAddr != gcvNULL
+			&& Logical >= mdlMap->vmaAddr
+			&& Logical < (mdlMap->vmaAddr + mdl->numPages * PAGE_SIZE))
+        {
+            if (mdl->dmaHandle)
+            {
+                /* The memory was from coherent area. */
+                *Address = (gctUINT32)mdl->dmaHandle
+							+ (gctUINT32)((gctUINT32)Logical
+							- (gctUINT32)mdlMap->vmaAddr);
+            }
+            else if (mdl->pagedMem)
+            {
+#if USE_VMALLOC
+                *Address = page_to_phys(vmalloc_to_page((gctSTRING)mdl->addr
+							+ ((gctUINT32)Logical - (gctUINT32)mdlMap->vmaAddr)));
+#else
+                *Address = (gctUINT32)virt_to_phys(mdl->addr)
+							+ (gctUINT32)(Logical - mdlMap->vmaAddr);
+#endif
+            }
+            else
+            {
+                /* Return the kernel virtual pointer based on this. */
+                *Address = (gctUINT32)virt_to_phys(mdl->addr)
+							+ (gctUINT32)(Logical - mdlMap->vmaAddr);
+            }
+            break;
+        }
+
+        mdl = mdl->next;
+    }
+
+	/* Subtract base address to get a GPU physical address. */
+	gcmASSERT(*Address >= Os->baseAddress);
+	*Address -= Os->baseAddress;
+
+	MEMORY_UNLOCK(Os);
+
+    if (mdl == gcvNULL)
+    {
+		gcmTRACE_ZONE(gcvLEVEL_INFO,
+					gcvZONE_OS,
+        			"gcoOS_GetPhysicalAddress: "
+					"Unable to get physical address for 0x%x\n",
+					(gctUINT32)Logical);
+
+        return gcvSTATUS_INVALID_ARGUMENT;
+    }
+
+	gcmTRACE_ZONE(gcvLEVEL_INFO,
+					gcvZONE_OS,
+    				"gcoOS_GetPhysicalAddress: Logical->0x%x Physical->0x%x\n",
+           			(gctUINT32)Logical,
+					(gctUINT32)*Address);
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_MapPhysical
+**
+**	Map a physical address into kernel space.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctUINT32 Physical
+**			Physical address of the memory to map.
+**
+**		gctSIZE_T Bytes
+**			Number of bytes to map.
+**
+**	OUTPUT:
+**
+**		gctPOINTER * Logical
+**			Pointer to a variable that receives the	base address of the mapped
+**			memory.
+*/
+gceSTATUS gcoOS_MapPhysical(
+	IN gcoOS Os,
+	IN gctUINT32 Physical,
+	IN gctUINT32 OriginalLogical,	
+	IN gctSIZE_T Bytes,
+	OUT gctPOINTER * Logical
+	)
+{
+	gctPOINTER logical;
+    PLINUX_MDL mdl;
+	gctUINT32 physical;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmVERIFY_ARGUMENT(Bytes > 0);
+    gcmVERIFY_ARGUMENT(Logical != gcvNULL);
+
+	MEMORY_LOCK(Os);
+
+	/* Compute true physical address (before subtraction of the baseAddress). */
+	physical = Physical + Os->baseAddress;
+
+    /* Go through our mapping to see if we know this physical address already. */
+    mdl = Os->mdlHead;
+
+    while (mdl != gcvNULL)
+    {
+        if (mdl->dmaHandle != 0)
+        {
+            if ((physical >= mdl->dmaHandle)
+			&&  (physical < mdl->dmaHandle + mdl->numPages * PAGE_SIZE)
+			)
+            {
+                *Logical = mdl->addr + (physical - mdl->dmaHandle);
+                break;
+            }
+        }
+
+        mdl = mdl->next;
+    }
+
+    if (mdl == gcvNULL)
+    {
+        /* Map memory as cached memory. */
+        request_mem_region(physical, Bytes, "MapRegion");
+        logical = (gctPOINTER) ioremap_nocache(physical, Bytes);
+
+	    if (logical == NULL)
+	    {
+			gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_OS,
+            			  "gcoOS_MapMemory: Failed to ioremap\n");
+
+			MEMORY_UNLOCK(Os);
+
+			/* Out of resources. */
+		    return gcvSTATUS_OUT_OF_RESOURCES;
+	    }
+
+	    /* Return pointer to mapped memory. */
+	    *Logical = logical;
+    }
+
+	MEMORY_UNLOCK(Os);
+
+	gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_OS,
+    			  "gcoOS_MapPhysical: "
+				  "Physical->0x%X Bytes->0x%X Logical->0x%X MappingFound->%d\n",
+				  (gctUINT32) Physical,
+				  (gctUINT32) Bytes,
+				  (gctUINT32) *Logical,
+				   mdl ? 1 : 0);
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_UnmapPhysical
+**
+**	Unmap a previously mapped memory region from kernel memory.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctPOINTER Logical
+**			Pointer to the base address of the memory to unmap.
+**
+**		gctSIZE_T Bytes
+**			Number of bytes to unmap.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gcoOS_UnmapPhysical(
+	IN gcoOS Os,
+	IN gctPOINTER Logical,
+	IN gctSIZE_T Bytes
+	)
+{
+    PLINUX_MDL  mdl;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmVERIFY_ARGUMENT(Logical != NULL);
+	gcmVERIFY_ARGUMENT(Bytes > 0);
+
+	MEMORY_LOCK(Os);
+
+    mdl = Os->mdlHead;
+
+    while (mdl != gcvNULL)
+    {
+        if (mdl->addr != gcvNULL)
+        {
+            if (Logical >= (gctPOINTER)mdl->addr
+					&& Logical < (gctPOINTER)((gctSTRING)mdl->addr + mdl->numPages * PAGE_SIZE))
+            {
+                break;
+            }
+        }
+
+        mdl = mdl->next;
+    }
+
+    if (mdl == gcvNULL)
+    {
+	    /* Unmap the memory. */
+	    iounmap(Logical);
+    }
+
+	MEMORY_UNLOCK(Os);
+
+	gcmTRACE_ZONE(gcvLEVEL_INFO,
+					gcvZONE_OS,
+    				"gcoOS_UnmapPhysical: "
+					"Logical->0x%x Bytes->0x%x MappingFound(?)->%d\n",
+           			(gctUINT32)Logical,
+					(gctUINT32)Bytes,
+					mdl ? 1 : 0);
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_CreateMutex
+**
+**	Create a new mutex.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**	OUTPUT:
+**
+**		gctPOINTER * Mutex
+**			Pointer to a variable that will hold a pointer to the mutex.
+*/
+gceSTATUS gcoOS_CreateMutex(
+	IN gcoOS Os,
+	OUT gctPOINTER * Mutex
+	)
+{
+	/* Validate the arguments. */
+	gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmVERIFY_ARGUMENT(Mutex != NULL);
+
+	/* Allocate a FAST_MUTEX structure. */
+	*Mutex = (gctPOINTER)kmalloc(sizeof(struct semaphore), GFP_KERNEL);
+
+	if (*Mutex == gcvNULL)
+	{
+		return gcvSTATUS_OUT_OF_MEMORY;
+	}
+
+    /* Initialize the semaphore.. Come up in unlocked state. */
+    init_MUTEX(*Mutex);
+
+	/* Return status. */
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_DeleteMutex
+**
+**	Delete a mutex.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctPOINTER Mutex
+**			Pointer to the mute to be deleted.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gcoOS_DeleteMutex(
+	IN gcoOS Os,
+	IN gctPOINTER Mutex
+	)
+{
+	/* Validate the arguments. */
+	gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmVERIFY_ARGUMENT(Mutex != NULL);
+
+	/* Delete the fast mutex. */
+	kfree(Mutex);
+
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_AcquireMutex
+**
+**	Acquire a mutex.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctPOINTER Mutex
+**			Pointer to the mutex to be acquired.
+**
+**		gctUINT32 Timeout
+**			Timeout value specified in milliseconds.
+**			Specify the value of gcvINFINITE to keep the thread suspended
+**			until the mutex has been acquired.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcoOS_AcquireMutex(
+	IN gcoOS Os,
+	IN gctPOINTER Mutex,
+	IN gctUINT32 Timeout
+	)
+{
+	/* Validate the arguments. */
+	gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmVERIFY_ARGUMENT(Mutex != NULL);
+
+	if (Timeout == gcvINFINITE)
+	{
+		down((struct semaphore *) Mutex);
+
+		/* Success. */
+		return gcvSTATUS_OK;
+	}
+
+	while (Timeout-- > 0)
+	{
+		/* Try to acquire the fast mutex. */
+		if (!down_trylock((struct semaphore *) Mutex))
+		{
+			/* Success. */
+			return gcvSTATUS_OK;
+		}
+
+		/* Wait for 1 millisecond. */
+		gcmVERIFY_OK(gcoOS_Delay(Os, 1));
+	}
+
+	/* Timeout. */
+	return gcvSTATUS_TIMEOUT;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_ReleaseMutex
+**
+**	Release an acquired mutex.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctPOINTER Mutex
+**			Pointer to the mutex to be released.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gcoOS_ReleaseMutex(
+	IN gcoOS Os,
+	IN gctPOINTER Mutex
+	)
+{
+	/* Validate the arguments. */
+	gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmVERIFY_ARGUMENT(Mutex != NULL);
+
+	/* Release the fast mutex. */
+	up((struct semaphore *) Mutex);
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_AtomicExchange
+**
+**	Atomically exchange a pair of 32-bit values.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**      IN OUT gctINT32_PTR Target
+**          Pointer to the 32-bit value to exchange.
+**
+**		IN gctINT32 NewValue
+**			Specifies a new value for the 32-bit value pointed to by Target.
+**
+**      OUT gctINT32_PTR OldValue
+**          The old value of the 32-bit value pointed to by Target.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcoOS_AtomicExchange(
+	IN gcoOS Os,
+    IN OUT gctUINT32_PTR Target,
+	IN gctUINT32 NewValue,
+    OUT gctUINT32_PTR OldValue
+	)
+{
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+
+	/* Exchange the pair of 32-bit values. */
+	*OldValue = (gctUINT32) atomic_xchg((atomic_t *) Target, (int) NewValue);
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+
+/*******************************************************************************
+**
+**	gcoOS_AtomicExchangePtr
+**
+**	Atomically exchange a pair of pointers.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**      IN OUT gctPOINTER * Target
+**          Pointer to the 32-bit value to exchange.
+**
+**		IN gctPOINTER NewValue
+**			Specifies a new value for the pointer pointed to by Target.
+**
+**      OUT gctPOINTER * OldValue
+**          The old value of the pointer pointed to by Target.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcoOS_AtomicExchangePtr(
+	IN gcoOS Os,
+    IN OUT gctPOINTER * Target,
+	IN gctPOINTER NewValue,
+    OUT gctPOINTER * OldValue
+	)
+{
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+
+	/* Exchange the pair of pointers. */
+	*OldValue = (gctPOINTER) atomic_xchg((atomic_t *) Target, (int) NewValue);
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+
+/*******************************************************************************
+**
+**	gcoOS_Delay
+**
+**	Delay execution of the current thread for a number of milliseconds.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctUINT32 Delay
+**			Delay to sleep, specified in milliseconds.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gcoOS_Delay(
+	IN gcoOS Os,
+	IN gctUINT32 Delay
+	)
+{
+	struct timeval now;
+	unsigned long ticks;
+
+	if (Delay == 0)
+	{
+		/* Smallest delay possible. */
+		ticks = 1;
+	}
+	else
+	{
+		/* Convert milliseconds into seconds and microseconds. */
+		now.tv_sec  = Delay / 1000;
+		now.tv_usec = (Delay % 1000) * 1000;
+
+	/* Convert Delay to jiffies. */
+	ticks = timeval_to_jiffies(&now);
+	}
+
+	/* Schedule timeout. */
+	schedule_timeout_interruptible(ticks);
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_MemoryBarrier
+**
+**	Make sure the CPU has executed everything up to this point and the data got
+**	written to the specified pointer.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctPOINTER Address
+**			Address of memory that needs to be barriered.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gcoOS_MemoryBarrier(
+	IN gcoOS Os,
+	IN gctPOINTER Address
+	)
+{
+	/* Verify thearguments. */
+	gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+
+	mb();
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_AllocatePagedMemory
+**
+**	Allocate memory from the paged pool.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctSIZE_T Bytes
+**			Number of bytes to allocate.
+**
+**	OUTPUT:
+**
+**		gctPHYS_ADDR * Physical
+**			Pointer to a variable that receives	the	physical address of the
+**			memory allocation.
+*/
+gceSTATUS gcoOS_AllocatePagedMemory(
+	IN gcoOS Os,
+	IN gctSIZE_T Bytes,
+	OUT gctPHYS_ADDR * Physical
+	)
+{
+    gctINT		numPages;
+    gctINT		i;
+    PLINUX_MDL  mdl;
+    gctSTRING	addr;
+    gctSIZE_T   bytes;
+
+    /* Verify the arguments. */
+    gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+    gcmVERIFY_ARGUMENT(Bytes > 0);
+    gcmVERIFY_ARGUMENT(Physical != NULL);
+
+	gcmTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+				"in gcoOS_AllocatePagedMemory\n");
+
+    bytes = gcmALIGN(Bytes, PAGE_SIZE);
+
+    numPages = GetPageCount(bytes, 0);
+
+	MEMORY_LOCK(Os);
+
+#if USE_VMALLOC
+    addr = vmalloc(bytes);
+#else
+    addr = (char *)__get_free_pages(GFP_ATOMIC | GFP_DMA, GetOrder(numPages));
+#endif
+
+    if (!addr)
+    {
+		gcmTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+       			"gcoOS_AllocatePagedMemory: "
+				"Can't allocate memorry for size->0x%x\n",
+				(gctUINT32)bytes);
+
+		MEMORY_UNLOCK(Os);
+
+        return gcvSTATUS_OUT_OF_MEMORY;
+    }
+
+    mdl = _CreateMdl(current->tgid);
+
+	if (mdl == gcvNULL)
+	{
+		MEMORY_UNLOCK(Os);
+
+		return gcvSTATUS_OUT_OF_MEMORY;
+	}
+
+    mdl->addr		= addr;
+    mdl->numPages	= numPages;
+    mdl->pagedMem	= 1;
+
+	for (i = 0; i < mdl->numPages; i++)
+    {
+#if USE_VMALLOC
+        SetPageReserved(vmalloc_to_page((void *)(((unsigned long)addr) + i * PAGE_SIZE)));
+#else
+        SetPageReserved(virt_to_page((void *)(((unsigned long)addr) + i * PAGE_SIZE)));
+#endif
+    }
+
+    /* Return physical address. */
+    *Physical = (gctPHYS_ADDR) mdl;
+
+    /*
+	 * Add this to a global list.
+	 * Will be used by get physical address
+	 * and mapuser pointer functions.
+	 */
+    if (!Os->mdlHead)
+    {
+        /* Initialize the queue. */
+        Os->mdlHead = Os->mdlTail = mdl;
+    }
+    else
+    {
+        /* Add to tail. */
+        mdl->prev			= Os->mdlTail;
+        Os->mdlTail->next	= mdl;
+        Os->mdlTail			= mdl;
+    }
+
+	MEMORY_UNLOCK(Os);
+
+	gcmTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+    			"gcoOS_AllocatePagedMemory: "
+				"Bytes->0x%x, Mdl->%p, Logical->%p\n",
+           		(gctUINT32)bytes,
+				mdl,
+				mdl->addr);
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_FreePagedMemory
+**
+**	Free memory allocated from the paged pool.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctPHYS_ADDR Physical
+**			Physical address of the allocation.
+**
+**		gctSIZE_T Bytes
+**			Number of bytes of the allocation.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gcoOS_FreePagedMemory(
+	IN gcoOS Os,
+	IN gctPHYS_ADDR Physical,
+	IN gctSIZE_T Bytes
+	)
+{
+    PLINUX_MDL  mdl = (PLINUX_MDL)Physical;
+    gctSTRING	addr;
+    gctINT		i;
+
+    /* Verify the arguments. */
+    gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+    gcmVERIFY_ARGUMENT(Physical != NULL);
+
+	gcmTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+				"in gcoOS_FreePagedMemory\n");
+
+    addr = mdl->addr;
+
+	MEMORY_LOCK(Os);
+
+    for (i = 0; i < mdl->numPages; i++)
+	{
+#if USE_VMALLOC
+        ClearPageReserved(vmalloc_to_page((gctPOINTER)(((unsigned long)addr) + i * PAGE_SIZE)));
+#else
+        ClearPageReserved(virt_to_page((gctPOINTER)(((unsigned long)addr) + i * PAGE_SIZE)));
+#endif
+    }
+
+#if USE_VMALLOC
+    vfree(mdl->addr);
+#else
+    free_pages((unsigned long)mdl->addr, GetOrder(mdl->numPages));
+#endif
+
+    /* Remove the node from global list. */
+    if (mdl == Os->mdlHead)
+    {
+        if ((Os->mdlHead = mdl->next) == gcvNULL)
+        {
+            Os->mdlTail = gcvNULL;
+        }
+    }
+    else
+    {
+        mdl->prev->next = mdl->next;
+
+        if (mdl == Os->mdlTail)
+        {
+            Os->mdlTail = mdl->prev;
+        }
+        else
+        {
+            mdl->next->prev = mdl->prev;
+        }
+    }
+
+	MEMORY_UNLOCK(Os);
+
+    /* Free the structure... */
+    gcmVERIFY_OK(_DestroyMdl(mdl));
+
+	gcmTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+    			"gcoOS_FreePagedMemory: Bytes->0x%x, Mdl->0x%x\n",
+				(gctUINT32)Bytes,
+				(gctUINT32)mdl);
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_LockPages
+**
+**	Lock memory allocated from the paged pool.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctPHYS_ADDR Physical
+**			Physical address of the allocation.
+**
+**		gctSIZE_T Bytes
+**			Number of bytes of the allocation.
+**
+**	OUTPUT:
+**
+**		gctPOINTER * Logical
+**			Pointer to a variable that receives the	address of the mapped
+**			memory.
+**
+**		gctSIZE_T * PageCount
+**			Pointer to a variable that receives the	number of pages required for
+**			the page table according to the GPU page size.
+*/
+gceSTATUS gcoOS_LockPages(
+	IN gcoOS Os,
+	IN gctPHYS_ADDR Physical,
+	IN gctSIZE_T Bytes,
+	OUT gctPOINTER * Logical,
+	OUT gctSIZE_T * PageCount
+	)
+{
+    PLINUX_MDL		mdl;
+	PLINUX_MDL_MAP	mdlMap;
+    gctSTRING		addr;
+
+#if USE_VMALLOC
+    unsigned long	start;
+    unsigned long	pfn;
+    gctINT			i;
+#endif
+
+    /* Verify the arguments. */
+    gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+    gcmVERIFY_ARGUMENT(Physical != NULL);
+    gcmVERIFY_ARGUMENT(Logical != NULL);
+    gcmVERIFY_ARGUMENT(PageCount != NULL);
+
+	gcmTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+				"in gcoOS_LockPages\n");
+
+    mdl = (PLINUX_MDL) Physical;
+
+	MEMORY_LOCK(Os);
+
+	mdlMap = FindMdlMap(mdl, current->tgid);
+
+	if (mdlMap == gcvNULL)
+	{
+		mdlMap = _CreateMdlMap(mdl, current->tgid);
+
+		if (mdlMap == gcvNULL)
+		{
+			MEMORY_UNLOCK(Os);
+
+			return gcvSTATUS_OUT_OF_MEMORY;
+		}
+	}
+
+	if (mdlMap->vmaAddr == gcvNULL)
+	{
+		down_write(&current->mm->mmap_sem);
+
+		mdlMap->vmaAddr = (gctSTRING)do_mmap_pgoff(NULL,
+						0L,
+						mdl->numPages * PAGE_SIZE,
+						PROT_READ | PROT_WRITE,
+						MAP_SHARED,
+						0);
+
+		up_write(&current->mm->mmap_sem);
+
+		gcmTRACE_ZONE(gcvLEVEL_INFO,
+						gcvZONE_OS,
+						"gcoOS_LockPages: "
+						"vmaAddr->0x%x for phys_addr->0x%x\n",
+						(gctUINT32)mdlMap->vmaAddr,
+						(gctUINT32)mdl);
+
+		if (mdlMap->vmaAddr == gcvNULL)
+		{
+			gcmTRACE_ZONE(gcvLEVEL_INFO,
+						gcvZONE_OS,
+						"gcoOS_LockPages: do_mmap_pgoff error\n");
+
+			MEMORY_UNLOCK(Os);
+
+			return gcvSTATUS_OUT_OF_MEMORY;
+		}
+
+		mdlMap->vma = find_vma(current->mm, (unsigned long)mdlMap->vmaAddr);
+
+		if (mdlMap->vma == gcvNULL)
+		{
+			gcmTRACE_ZONE(gcvLEVEL_INFO,
+						gcvZONE_OS,
+						"find_vma error\n");
+
+			mdlMap->vmaAddr = gcvNULL;
+
+			MEMORY_UNLOCK(Os);
+
+			return gcvSTATUS_OUT_OF_RESOURCES;
+		}
+
+		mdlMap->vma->vm_flags |= VM_RESERVED;
+		/* Make this mapping non-cached. */
+		mdlMap->vma->vm_page_prot = pgprot_noncached(mdlMap->vma->vm_page_prot);
+
+		addr = mdl->addr;
+
+		/* Now map all the vmalloc pages to this user address. */
+		down_write(&current->mm->mmap_sem);
+
+#if USE_VMALLOC
+		start = mdl->vma->vm_start;
+
+		for (i = 0; i < mdl->numPages; i++)
+		{
+			pfn = vmalloc_to_pfn(addr);
+
+			if (remap_pfn_range(mdlMap->vma,
+								start,
+								pfn,
+								PAGE_SIZE,
+								mdlMap->vma->vm_page_prot) < 0)
+			{
+				up_write(&current->mm->mmap_sem);
+
+				gcmTRACE_ZONE(gcvLEVEL_INFO,
+							gcvZONE_OS,
+            				"gcoOS_LockPages: "
+							"gctPHYS_ADDR->0x%x Logical->0x%x Unable to map addr->0x%x to start->0x%x\n",
+                   			(gctUINT32)Physical,
+							(gctUINT32)*Logical,
+							(gctUINT32)addr,
+							(gctUINT32)start);
+
+				mdlMap->vmaAddr = gcvNULL;
+
+				MEMORY_UNLOCK(Os);
+
+				return gcvSTATUS_OUT_OF_MEMORY;
+			}
+
+			start += PAGE_SIZE;
+			addr += PAGE_SIZE;
+		}
+#else
+		// map kernel memory to user space..
+		if (remap_pfn_range(mdlMap->vma,
+							mdlMap->vma->vm_start,
+							virt_to_phys((gctPOINTER)mdl->addr) >> PAGE_SHIFT,
+							mdlMap->vma->vm_end - mdlMap->vma->vm_start,
+							mdlMap->vma->vm_page_prot) < 0)
+		{
+			up_write(&current->mm->mmap_sem);
+
+			gcmTRACE_ZONE(gcvLEVEL_INFO,
+						gcvZONE_OS,
+        				"gcoOS_LockPages: unable to mmap ret\n");
+
+			mdlMap->vmaAddr = gcvNULL;
+
+			MEMORY_UNLOCK(Os);
+
+			return gcvSTATUS_OUT_OF_MEMORY;
+		}
+#endif
+
+		up_write(&current->mm->mmap_sem);
+	}
+
+    /* Convert pointer to MDL. */
+    *Logical = mdlMap->vmaAddr;
+
+	/* Return the page number according to the GPU page size. */
+	gcmASSERT((PAGE_SIZE % 4096) == 0);
+	gcmASSERT((PAGE_SIZE / 4096) >= 1);
+
+    *PageCount = mdl->numPages * (PAGE_SIZE / 4096);
+
+	MEMORY_UNLOCK(Os);
+
+	gcmTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+    			"gcoOS_LockPages: "
+				"gctPHYS_ADDR->0x%x Bytes->0x%x Logical->0x%x pid->%d\n",
+           		(gctUINT32)Physical,
+				(gctUINT32)Bytes,
+				(gctUINT32)*Logical,
+				mdlMap->pid);
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_MapPages
+**
+**	Map paged memory into a page table.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctPHYS_ADDR Physical
+**			Physical address of the allocation.
+**
+**		gctSIZE_T PageCount
+**			Number of pages required for the physical address.
+**
+**		gctPOINTER PageTable
+**			Pointer to the page table to fill in.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcoOS_MapPages(
+	IN gcoOS Os,
+	IN gctPHYS_ADDR Physical,
+	IN gctSIZE_T PageCount,
+	IN gctPOINTER PageTable
+	)
+{
+    PLINUX_MDL  mdl;
+    gctUINT32*	table;
+    gctSTRING	addr;
+    gctINT		i = 0;
+
+    /* Verify the arguments. */
+    gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+    gcmVERIFY_ARGUMENT(Physical != NULL);
+    gcmVERIFY_ARGUMENT(PageCount > 0);
+    gcmVERIFY_ARGUMENT(PageTable != NULL);
+
+	gcmTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+				"in gcoOS_MapPages\n");
+
+    /* Convert pointer to MDL. */
+    mdl = (PLINUX_MDL)Physical;
+
+	gcmTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+    			"gcoOS_MapPages: "
+				"Physical->0x%x PageCount->0x%x PagedMemory->?%d\n",
+           		(gctUINT32)Physical,
+				(gctUINT32)PageCount,
+				mdl->pagedMem);
+
+	MEMORY_LOCK(Os);
+
+    table = (gctUINT32 *)PageTable;
+
+	 /* Get all the physical addresses and store them in the page table. */
+
+	addr = mdl->addr;
+
+    if (mdl->pagedMem)
+    {
+        /* Try to get the user pages so DMA can happen. */
+        while (PageCount-- > 0)
+        {
+#if USE_VMALLOC
+            *table++ = page_to_phys(vmalloc_to_page(addr));
+#else
+            *table++ = virt_to_phys(addr);
+#endif
+            addr += 4096;
+            i++;
+        }
+    }
+    else
+    {
+		gcmTRACE_ZONE(gcvLEVEL_INFO,
+					gcvZONE_OS,
+        			"We should not get this call for Non Paged Memory!\n");
+
+		while (PageCount-- > 0)
+        {
+            *table++ = (gctUINT32)virt_to_phys(addr);
+            addr += 4096;
+        }
+    }
+
+	MEMORY_UNLOCK(Os);
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_UnlockPages
+**
+**	Unlock memory allocated from the paged pool.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctPHYS_ADDR Physical
+**			Physical address of the allocation.
+**
+**		gctSIZE_T Bytes
+**			Number of bytes of the allocation.
+**
+**		gctPOINTER Logical
+**			Address of the mapped memory.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gcoOS_UnlockPages(
+	IN gcoOS Os,
+	IN gctPHYS_ADDR Physical,
+	IN gctSIZE_T Bytes,
+	IN gctPOINTER Logical
+	)
+{
+	PLINUX_MDL_MAP			mdlMap;
+    PLINUX_MDL				mdl = (PLINUX_MDL)Physical;
+    struct task_struct *	task;
+
+    /* Verify the arguments. */
+    gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+    gcmVERIFY_ARGUMENT(Physical != NULL);
+    gcmVERIFY_ARGUMENT(Logical != NULL);
+
+	/* Make sure there is already a mapping...*/
+    gcmVERIFY_ARGUMENT(mdl->addr != NULL);
+
+	gcmTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+				"in gcoOS_UnlockPages\n");
+
+	MEMORY_LOCK(Os);
+
+	mdlMap = mdl->maps;
+
+	while (mdlMap != gcvNULL)
+	{
+		if (mdlMap->vmaAddr != gcvNULL)
+		{
+			/* Get the current pointer for the task with stored pid. */
+			task = FIND_TASK_BY_PID(mdlMap->pid);
+
+			if (task != gcvNULL && task->mm != gcvNULL)
+			{
+				down_write(&task->mm->mmap_sem);
+				do_munmap(task->mm, (unsigned long)Logical, mdl->numPages * PAGE_SIZE);
+				up_write(&task->mm->mmap_sem);
+			}
+
+			mdlMap->vmaAddr = gcvNULL;
+		}
+
+		mdlMap = mdlMap->next;
+	}
+
+	MEMORY_UNLOCK(Os);
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+
+/*******************************************************************************
+**
+**	gcoOS_AllocateContiguous
+**
+**	Allocate memory from the contiguous pool.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+** 		gctBOOL InUserSpace
+**			gcvTRUE if the pages need to be mapped into user space.
+**
+**		gctSIZE_T * Bytes
+**			Pointer to the number of bytes to allocate.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * Bytes
+**			Pointer to a variable that receives	the	number of bytes allocated.
+**
+**		gctPHYS_ADDR * Physical
+**			Pointer to a variable that receives	the	physical address of the
+**			memory allocation.
+**
+**		gctPOINTER * Logical
+**			Pointer to a variable that receives	the	logical address of the
+**			memory allocation.
+*/
+gceSTATUS gcoOS_AllocateContiguous(
+	IN gcoOS Os,
+	IN gctBOOL InUserSpace,
+	IN OUT gctSIZE_T * Bytes,
+	OUT gctPHYS_ADDR * Physical,
+	OUT gctPOINTER * Logical
+	)
+{
+    /* Same as non-paged memory for now. */
+    return gcoOS_AllocateNonPagedMemory(Os,
+				InUserSpace,
+				Bytes,
+				Physical,
+				Logical
+				);
+}
+
+/*******************************************************************************
+**
+**	gcoOS_FreeContiguous
+**
+**	Free memory allocated from the contiguous pool.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctPHYS_ADDR Physical
+**			Physical address of the allocation.
+**
+**		gctPOINTER Logical
+**			Logicval address of the allocation.
+**
+**		gctSIZE_T Bytes
+**			Number of bytes of the allocation.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gcoOS_FreeContiguous(
+	IN gcoOS Os,
+	IN gctPHYS_ADDR Physical,
+	IN gctPOINTER Logical,
+	IN gctSIZE_T Bytes
+	)
+{
+    /* Same of non-paged memory for now. */
+    return gcoOS_FreeNonPagedMemory(Os, Bytes, Physical, Logical);
+}
+
+/******************************************************************************
+**
+**	gcoOS_GetKernelLogical
+**
+**	Return the kernel logical pointer that corresponods to the specified
+**	hardware address.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctUINT32 Address
+**			Hardware physical address.
+**
+**	OUTPUT:
+**
+**		gctPOINTER * KernelPointer
+**			Pointer to a variable receiving the pointer in kernel address space.
+*/
+gceSTATUS
+gcoOS_GetKernelLogical(
+	IN gcoOS Os,
+	IN gctUINT32 Address,
+	OUT gctPOINTER * KernelPointer
+	)
+{
+	gceSTATUS status;
+
+	do
+	{
+		gcoGALDEVICE device;
+		gcoKERNEL kernel;
+		gcePOOL pool;
+		gctUINT32 offset;
+		gctPOINTER logical;
+
+		/* Extract the pointer to the gcoGALDEVICE class. */
+		device = (gcoGALDEVICE) Os->device;
+
+		/* Kernel shortcut. */
+		kernel = device->kernel;
+
+		/* Split the memory address into a pool type and offset. */
+		gcmERR_BREAK(gcoHARDWARE_SplitMemory(
+			kernel->hardware, Address, &pool, &offset
+			));
+
+		/* Dispatch on pool. */
+		switch (pool)
+		{
+		case gcvPOOL_LOCAL_INTERNAL:
+			/* Internal memory. */
+			logical = device->internalLogical;
+			break;
+
+		case gcvPOOL_LOCAL_EXTERNAL:
+			/* External memory. */
+			logical = device->externalLogical;
+			break;
+
+		case gcvPOOL_SYSTEM:
+			/* System memory. */
+			logical = device->contiguousBase;
+			break;
+
+		default:
+			/* Invalid memory pool. */
+			return gcvSTATUS_INVALID_ARGUMENT;
+		}
+
+		/* Build logical address of specified address. */
+		* KernelPointer = ((gctUINT8_PTR) logical) + offset;
+
+		/* Success. */
+		return gcvSTATUS_OK;
+	}
+	while (gcvFALSE);
+
+	/* Return status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_MapUserPointer
+**
+**	Map a pointer from the user process into the kernel address space.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctPOINTER Pointer
+**			Pointer in user process space that needs to be mapped.
+**
+**		gctSIZE_T Size
+**			Number of bytes that need to be mapped.
+**
+**	OUTPUT:
+**
+**		gctPOINTER * KernelPointer
+**			Pointer to a variable receiving the mapped pointer in kernel address
+**			space.
+*/
+gceSTATUS
+gcoOS_MapUserPointer(
+	IN gcoOS Os,
+	IN gctPOINTER Pointer,
+	IN gctSIZE_T Size,
+	OUT gctPOINTER * KernelPointer
+	)
+{
+	*KernelPointer = Pointer;
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_UnmapUserPointer
+**
+**	Unmap a user process pointer from the kernel address space.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctPOINTER Pointer
+**			Pointer in user process space that needs to be unmapped.
+**
+**		gctSIZE_T Size
+**			Number of bytes that need to be unmapped.
+**
+**		gctPOINTER KernelPointer
+**			Pointer in kernel address space that needs to be unmapped.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcoOS_UnmapUserPointer(
+	IN gcoOS Os,
+	IN gctPOINTER Pointer,
+	IN gctSIZE_T Size,
+	IN gctPOINTER KernelPointer
+	)
+{
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_WriteMemory
+**
+**	Write data to a memory.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctPOINTER Address
+**			Address of the memory to write to.
+**
+**		gctUINT32 Data
+**			Data for register.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcoOS_WriteMemory(
+	IN gcoOS Os,
+	IN gctPOINTER Address,
+	IN gctUINT32 Data
+	)
+{
+	/* Verify the arguments. */
+	gcmVERIFY_ARGUMENT(Address != NULL);
+
+	/* Write memory. */
+    writel(Data, (gctUINT8 *)Address);
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_CreateSignal
+**
+**	Create a new signal.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctBOOL ManualReset
+**			If set to gcvTRUE, gcoOS_Signal with gcvFALSE must be called in
+**			order to set the signal to nonsignaled state.
+**			If set to gcvFALSE, the signal will automatically be set to
+**			nonsignaled state by gcoOS_WaitSignal function.
+**
+**	OUTPUT:
+**
+**		gctSIGNAL * Signal
+**			Pointer to a variable receiving the created gctSIGNAL.
+*/
+gceSTATUS
+gcoOS_CreateSignal(
+	IN gcoOS Os,
+	IN gctBOOL ManualReset,
+	OUT gctSIGNAL * Signal
+	)
+{
+#if USE_NEW_LINUX_SIGNAL
+	return gcvSTATUS_NOT_SUPPORTED;
+#else
+	gcsSIGNAL_PTR signal;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmVERIFY_ARGUMENT(Signal != NULL);
+
+	/* Create an event structure. */
+	signal = (gcsSIGNAL_PTR)kmalloc(sizeof(gcsSIGNAL), GFP_KERNEL);
+
+	if (signal == gcvNULL)
+	{
+		return gcvSTATUS_OUT_OF_MEMORY;
+	}
+
+	signal->manualReset = ManualReset;
+
+	init_completion(&signal->event);
+
+	atomic_set(&signal->ref, 1);
+
+	*Signal = (gctSIGNAL) signal;
+
+	return gcvSTATUS_OK;
+#endif
+}
+
+/*******************************************************************************
+**
+**	gcoOS_DestroySignal
+**
+**	Destroy a signal.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctSIGNAL Signal
+**			Pointer to the gctSIGNAL.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcoOS_DestroySignal(
+	IN gcoOS Os,
+	IN gctSIGNAL Signal
+	)
+{
+#if USE_NEW_LINUX_SIGNAL
+	return gcvSTATUS_NOT_SUPPORTED;
+#else
+	gcsSIGNAL_PTR signal;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmVERIFY_ARGUMENT(Signal != NULL);
+
+	signal = (gcsSIGNAL_PTR) Signal;
+
+	if (atomic_dec_and_test(&signal->ref))
+	{
+		 /* Free the sgianl. */
+		kfree(Signal);
+	}
+
+	/* Success. */
+	return gcvSTATUS_OK;
+#endif
+}
+
+/*******************************************************************************
+**
+**	gcoOS_Signal
+**
+**	Set a state of the specified signal.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctSIGNAL Signal
+**			Pointer to the gctSIGNAL.
+**
+**		gctBOOL State
+**			If gcvTRUE, the signal will be set to signaled state.
+**			If gcvFALSE, the signal will be set to nonsignaled state.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcoOS_Signal(
+	IN gcoOS Os,
+	IN gctSIGNAL Signal,
+	IN gctBOOL State
+	)
+{
+#if USE_NEW_LINUX_SIGNAL
+	return gcvSTATUS_NOT_SUPPORTED;
+#else
+	gcsSIGNAL_PTR signal;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmVERIFY_ARGUMENT(Signal != gcvNULL);
+
+	signal = (gcsSIGNAL_PTR) Signal;
+
+	/* Set the new state of the event. */
+	if (signal->manualReset)
+	{
+		if (State)
+		{
+			/* Set the event to a signaled state. */
+			complete_all(&signal->event);
+		}
+		else
+		{
+			/* Set the event to an unsignaled state. */
+			INIT_COMPLETION(signal->event);
+		}
+	}
+	else
+	{
+		if (State)
+		{
+			/* Set the event to a signaled state. */
+			complete(&signal->event);
+
+		}
+	}
+
+	/* Success. */
+	return gcvSTATUS_OK;
+#endif
+}
+
+#if USE_NEW_LINUX_SIGNAL
+/*******************************************************************************
+**
+**	gcoOS_UserSignal
+**
+**	Set the specified signal which is owned by a process to signaled state.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctSIGNAL Signal
+**			Pointer to the gctSIGNAL.
+**
+**		gctHANDLE Process
+**			Handle of process owning the signal.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcoOS_UserSignal(
+	IN gcoOS Os,
+	IN gctSIGNAL Signal,
+	IN gctHANDLE Process
+	)
+{
+	gceSTATUS status;
+	gctINT result;
+	struct task_struct * task;
+	struct siginfo info;
+
+	task = FIND_TASK_BY_PID((pid_t) Process);
+
+	if (task != gcvNULL)
+	{
+		/* Fill in the siginfo structure. */
+		info.si_signo = Os->device->signal;
+		info.si_errno = 0;
+		info.si_code  = __SI_CODE(__SI_RT, SI_KERNEL);
+		info.si_ptr   = Signal;
+
+		/* Send the signal. */
+		if ((result = send_sig_info(Os->device->signal, &info, task)) < 0)
+		{
+			status = gcvSTATUS_GENERIC_IO;
+
+			gcmTRACE(gcvLEVEL_ERROR,
+					 "%s(%d): send_sig_info failed.",
+					 __FUNCTION__, __LINE__);
+		}
+		else
+		{
+			/* Success. */
+			status = gcvSTATUS_OK;
+		}
+	}
+	else
+	{
+		status = gcvSTATUS_GENERIC_IO;
+
+		gcmTRACE(gcvLEVEL_ERROR,
+				 "%s(%d): find_task_by_pid failed.",
+				 __FUNCTION__, __LINE__);
+	}
+
+	/* Return status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_WaitSignal
+**
+**	Wait for a signal to become signaled.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctSIGNAL Signal
+**			Pointer to the gctSIGNAL.
+**
+**		gctUINT32 Wait
+**			Number of milliseconds to wait.
+**			Pass the value of gcvINFINITE for an infinite wait.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcoOS_WaitSignal(
+	IN gcoOS Os,
+	IN gctSIGNAL Signal,
+	IN gctUINT32 Wait
+	)
+{
+	return gcvSTATUS_NOT_SUPPORTED;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_MapSignal
+**
+**	Map a signal in to the current process space.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctSIGNAL Signal
+**			Pointer to tha gctSIGNAL to map.
+**
+**		gctHANDLE Process
+**			Handle of process owning the signal.
+**
+**	OUTPUT:
+**
+**		gctSIGNAL * MappedSignal
+**			Pointer to a variable receiving the mapped gctSIGNAL.
+*/
+gceSTATUS
+gcoOS_MapSignal(
+	IN gcoOS Os,
+	IN gctSIGNAL Signal,
+	IN gctHANDLE Process,
+	OUT gctSIGNAL * MappedSignal
+	)
+{
+	return gcvSTATUS_NOT_SUPPORTED;
+}
+
+#else
+
+/*******************************************************************************
+**
+**	gcoOS_UserSignal
+**
+**	Set the specified signal which is owned by a process to signaled state.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctSIGNAL Signal
+**			Pointer to the gctSIGNAL.
+**
+**		gctHANDLE Process
+**			Handle of process owning the signal.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcoOS_UserSignal(
+	IN gcoOS Os,
+	IN gctSIGNAL Signal,
+	IN gctHANDLE Process
+	)
+{
+	gceSTATUS status;
+	gctSIGNAL signal;
+
+	/* Map the signal into kernel space. */
+	status = gcoOS_MapSignal(Os, Signal, Process, &signal);
+
+	if (gcmIS_ERROR(status)) return status;
+
+	if (signal == gcvNULL)
+	{
+		/* Signal. */
+		status = gcoOS_Signal(Os, signal, gcvTRUE);
+	}
+	else
+	{
+		/* Signal. */
+		status = gcoOS_Signal(Os, signal, gcvTRUE);
+
+		/* Destroy the mapped signal. */
+		gcmVERIFY_OK(gcoOS_DestroySignal(Os, signal));
+	}
+
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_WaitSignal
+**
+**	Wait for a signal to become signaled.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctSIGNAL Signal
+**			Pointer to the gctSIGNAL.
+**
+**		gctUINT32 Wait
+**			Number of milliseconds to wait.
+**			Pass the value of gcvINFINITE for an infinite wait.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcoOS_WaitSignal(
+	IN gcoOS Os,
+	IN gctSIGNAL Signal,
+	IN gctUINT32 Wait
+	)
+{
+	gceSTATUS status;
+	gcsSIGNAL_PTR signal;
+	gctUINT timeout;
+	gctUINT rc;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmVERIFY_ARGUMENT(Signal != gcvNULL);
+
+	signal = (gcsSIGNAL_PTR) Signal;
+
+	/* Convert wait to milliseconds. */
+	timeout = (Wait == gcvINFINITE) ? MAX_SCHEDULE_TIMEOUT : Wait*HZ/1000;
+
+	/* Linux bug ? */
+	if (!signal->manualReset && timeout == 0) timeout = 1;
+
+	rc = wait_for_completion_interruptible_timeout(&signal->event, timeout);
+
+	status = ((rc == 0) && !signal->event.done) ? gcvSTATUS_TIMEOUT : gcvSTATUS_OK;
+
+	/* Return status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_MapSignal
+**
+**	Map a signal in to the current process space.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctSIGNAL Signal
+**			Pointer to tha gctSIGNAL to map.
+**
+**		gctHANDLE Process
+**			Handle of process owning the signal.
+**
+**	OUTPUT:
+**
+**		gctSIGNAL * MappedSignal
+**			Pointer to a variable receiving the mapped gctSIGNAL.
+*/
+gceSTATUS
+gcoOS_MapSignal(
+	IN gcoOS Os,
+	IN gctSIGNAL Signal,
+	IN gctHANDLE Process,
+	OUT gctSIGNAL * MappedSignal
+	)
+{
+	gctINT signalID;
+	gcsSIGNAL_PTR signal;
+
+	gcmVERIFY_ARGUMENT(Signal != gcvNULL);
+	gcmVERIFY_ARGUMENT(MappedSignal != gcvNULL);
+
+	signalID = (gctINT) Signal - 1;
+
+	gcmVERIFY_OK(gcoOS_AcquireMutex(Os,
+		Os->signal.lock,
+		gcvINFINITE
+		));
+
+	if (signalID >= 0 && signalID < Os->signal.tableLen)
+	{
+		/* It is a user space signal. */
+		signal = Os->signal.table[signalID];
+
+		gcmVERIFY_OK(gcoOS_ReleaseMutex(Os,
+			Os->signal.lock
+			));
+
+		if (signal == gcvNULL)
+		{
+			return gcvSTATUS_OUT_OF_RESOURCES;
+		}
+	}
+	else
+	{
+		gcmVERIFY_OK(gcoOS_ReleaseMutex(Os,
+			Os->signal.lock
+			));
+
+		/* It is a kernel space signal structure. */
+		signal = (gcsSIGNAL_PTR) Signal;
+	}
+
+	if (atomic_inc_return(&signal->ref) <= 1)
+	{
+		/* The previous value is 0, it has been deleted. */
+		return gcvSTATUS_OUT_OF_RESOURCES;
+	}
+
+	/* Success. */
+	*MappedSignal = (gctSIGNAL) signal;
+
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_CreateUserSignal
+**
+**	Create a new signal to be used in the user space.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctBOOL ManualReset
+**			If set to gcvTRUE, gcoOS_Signal with gcvFALSE must be called in
+**			order to set the signal to nonsignaled state.
+**			If set to gcvFALSE, the signal will automatically be set to
+**			nonsignaled state by gcoOS_WaitSignal function.
+**
+**	OUTPUT:
+**
+**		gctINT * SignalID
+**			Pointer to a variable receiving the created signal's ID.
+*/
+gceSTATUS
+gcoOS_CreateUserSignal(
+	IN gcoOS Os,
+	IN gctBOOL ManualReset,
+	OUT gctINT * SignalID
+	)
+{
+	gcsSIGNAL_PTR signal;
+	gctINT unused, currentID, tableLen;
+	gctPOINTER * table;
+	gctINT i;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmVERIFY_ARGUMENT(SignalID != gcvNULL);
+
+	/* Lock the table. */
+	gcmVERIFY_OK(gcoOS_AcquireMutex(Os,
+		Os->signal.lock,
+		gcvINFINITE
+		));
+
+	if (Os->signal.unused < 1)
+	{
+		/* Enlarge the table. */
+		table = (gctPOINTER *)kmalloc(
+					sizeof(gctPOINTER) * (Os->signal.tableLen + USER_SIGNAL_TABLE_LEN_INIT),
+					GFP_KERNEL);
+
+		if (table == gcvNULL)
+		{
+			/* Out of memory. */
+			return gcvSTATUS_OUT_OF_MEMORY;
+		}
+
+		memset(table + Os->signal.tableLen, 0, sizeof(gctPOINTER) * USER_SIGNAL_TABLE_LEN_INIT);
+		memcpy(table, Os->signal.table, sizeof(gctPOINTER) * Os->signal.tableLen);
+
+		/* Release the old table. */
+		kfree(Os->signal.table);
+
+		/* Update the table. */
+		Os->signal.table = table;
+		Os->signal.currentID = Os->signal.tableLen;
+		Os->signal.tableLen += USER_SIGNAL_TABLE_LEN_INIT;
+		Os->signal.unused += USER_SIGNAL_TABLE_LEN_INIT;
+	}
+
+	table = Os->signal.table;
+	currentID = Os->signal.currentID;
+	tableLen = Os->signal.tableLen;
+	unused = Os->signal.unused;
+
+	/* Create a new signal. */
+	gcmVERIFY_OK(gcoOS_CreateSignal(Os,
+		ManualReset,
+		(gctSIGNAL *)&signal
+		));
+
+	/* Save the process ID. */
+	signal->process = (gctHANDLE) current->tgid;
+
+	table[currentID] = signal;
+
+	/* Plus 1 to avoid NULL claims. */
+	*SignalID = currentID + 1;
+
+	/* Update the currenID. */
+	if (--unused > 0)
+	{
+		for (i = 0; i < tableLen; i++)
+		{
+			if (++currentID >= tableLen)
+			{
+				/* Wrap to the begin. */
+				currentID = 0;
+			}
+
+			if (table[currentID] == gcvNULL)
+			{
+				break;
+			}
+		}
+	}
+
+	Os->signal.table = table;
+	Os->signal.currentID = currentID;
+	Os->signal.tableLen = tableLen;
+	Os->signal.unused = unused;
+
+	gcmVERIFY_OK(gcoOS_ReleaseMutex(Os,
+		Os->signal.lock
+		));
+
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_DestroyUserSignal
+**
+**	Destroy a signal to be used in the user space.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctINT SignalID
+**			The signal's ID.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcoOS_DestroyUserSignal(
+	IN gcoOS Os,
+	IN gctINT SignalID
+	)
+{
+	gceSTATUS status;
+	gcsSIGNAL_PTR signal;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+
+	gcmVERIFY_OK(gcoOS_AcquireMutex(Os,
+		Os->signal.lock,
+		gcvINFINITE
+		));
+
+	if (SignalID < 1 || SignalID > Os->signal.tableLen)
+	{
+		gcmTRACE_ZONE(gcvLEVEL_ERROR,
+			gcvZONE_OS,
+			"gcoOS_DestroyUserSignal: invalid signal->%d.\n",
+			(gctINT) SignalID
+			);
+
+		gcmVERIFY_OK(gcoOS_ReleaseMutex(Os,
+			Os->signal.lock
+			));
+
+		return gcvSTATUS_INVALID_ARGUMENT;
+	}
+
+	SignalID -= 1;
+
+	signal = Os->signal.table[SignalID];
+
+	if (signal == gcvNULL)
+	{
+		gcmVERIFY_OK(gcoOS_ReleaseMutex(Os,
+			Os->signal.lock
+			));
+
+		gcmTRACE_ZONE(gcvLEVEL_ERROR,
+			gcvZONE_OS,
+			"gcoOS_DestroyUserSignal: signal is NULL.\n"
+			);
+
+		return gcvSTATUS_OUT_OF_RESOURCES;
+	}
+
+	/* Check to see if the process is the owner of the signal. */
+	if (signal->process != (gctHANDLE) current->tgid)
+	{
+		gcmVERIFY_OK(gcoOS_ReleaseMutex(Os,
+			Os->signal.lock
+			));
+
+		gcmTRACE_ZONE(gcvLEVEL_ERROR,
+			gcvZONE_OS,
+			"gcoOS_DestroyUserSignal: process id doesn't match. ",
+			"signal->process: %d, current->tgid: %d\n",
+			signal->process,
+			current->tgid);
+
+		return gcvSTATUS_INVALID_ARGUMENT;
+	}
+
+	status = gcoOS_DestroySignal(Os,
+		signal
+		);
+
+	/* Update the table. */
+	Os->signal.table[SignalID] = gcvNULL;
+	if (Os->signal.unused++ == 0)
+	{
+		Os->signal.currentID = SignalID;
+	}
+
+	gcmVERIFY_OK(gcoOS_ReleaseMutex(Os,
+		Os->signal.lock
+		));
+
+	/* Success. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_WaitUserSignal
+**
+**	Wait for a signal used in the user mode to become signaled.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctINT SignalID
+**			Signal ID.
+**
+**		gctUINT32 Wait
+**			Number of milliseconds to wait.
+**			Pass the value of gcvINFINITE for an infinite wait.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcoOS_WaitUserSignal(
+	IN gcoOS Os,
+	IN gctINT SignalID,
+	IN gctUINT32 Wait
+	)
+{
+	gceSTATUS status;
+	gcsSIGNAL_PTR signal;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+
+	gcmTRACE_ZONE(gcvLEVEL_VERBOSE,
+		gcvZONE_OS,
+		"gcoOS_WaitSignal: signal->%d, wait->%d.\n",
+		SignalID,
+		Wait
+		);
+
+	gcmVERIFY_OK(gcoOS_AcquireMutex(Os,
+		Os->signal.lock,
+		gcvINFINITE
+		));
+
+	if (SignalID < 1 || SignalID > Os->signal.tableLen)
+	{
+		gcmTRACE_ZONE(gcvLEVEL_ERROR,
+			gcvZONE_OS,
+			"gcoOS_WaitSignal: invalid signal.\n",
+			SignalID
+			);
+
+		return gcvSTATUS_INVALID_ARGUMENT;
+	}
+
+	SignalID -= 1;
+
+	signal = Os->signal.table[SignalID];
+
+	gcmVERIFY_OK(gcoOS_ReleaseMutex(Os,
+		Os->signal.lock
+		));
+
+	if (signal == gcvNULL)
+	{
+		gcmTRACE_ZONE(gcvLEVEL_ERROR,
+			gcvZONE_OS,
+			"gcoOS_WaitSignal: signal is NULL.\n"
+			);
+
+		return gcvSTATUS_OUT_OF_RESOURCES;
+	}
+
+	if (signal->process != (gctHANDLE) current->tgid)
+	{
+		gcmTRACE_ZONE(gcvLEVEL_ERROR,
+			gcvZONE_OS,
+			"gcoOS_WaitUserSignal: process id doesn't match. "
+			"signal->process: %d, current->tgid: %d\n",
+			signal->process,
+			current->tgid);
+
+		return gcvSTATUS_INVALID_ARGUMENT;
+	}
+
+
+	status = gcoOS_WaitSignal(Os,
+		signal,
+		Wait
+		);
+
+	/* Return status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_SignalUserSignal
+**
+**	Set a state of the specified signal to be used in the user space.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to an gcoOS object.
+**
+**		gctINT SignalID
+**			SignalID.
+**
+**		gctBOOL State
+**			If gcvTRUE, the signal will be set to signaled state.
+**			If gcvFALSE, the signal will be set to nonsignaled state.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcoOS_SignalUserSignal(
+	IN gcoOS Os,
+	IN gctINT SignalID,
+	IN gctBOOL State
+	)
+{
+	gceSTATUS status;
+	gcsSIGNAL_PTR signal;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+
+	gcmVERIFY_OK(gcoOS_AcquireMutex(Os,
+		Os->signal.lock,
+		gcvINFINITE
+		));
+
+	if (SignalID < 1 || SignalID > Os->signal.tableLen)
+	{
+		gcmTRACE_ZONE(gcvLEVEL_ERROR,
+			gcvZONE_OS,
+			"gcoOS_WaitSignal: invalid signal->%d.\n",
+			SignalID
+			);
+
+		return gcvSTATUS_INVALID_ARGUMENT;
+	}
+
+	SignalID -= 1;
+
+	signal = Os->signal.table[SignalID];
+
+	gcmVERIFY_OK(gcoOS_ReleaseMutex(Os,
+		Os->signal.lock
+		));
+
+	if (signal == gcvNULL)
+	{
+		gcmTRACE_ZONE(gcvLEVEL_ERROR,
+			gcvZONE_OS,
+			"gcoOS_WaitSignal: signal is NULL.\n"
+			);
+
+		return gcvSTATUS_OUT_OF_RESOURCES;
+	}
+
+	if (signal->process != (gctHANDLE) current->tgid)
+	{
+		gcmTRACE_ZONE(gcvLEVEL_ERROR,
+			gcvZONE_OS,
+			"gcoOS_DestroyUserSignal: process id doesn't match. ",
+			"signal->process: %d, current->tgid: %d\n",
+			signal->process,
+			current->tgid);
+
+		return gcvSTATUS_INVALID_ARGUMENT;
+	}
+
+
+	status = gcoOS_Signal(Os,
+		signal,
+		State
+		);
+
+	/* Success. */
+	return status;
+}
+
+gceSTATUS
+gcoOS_CleanProcessSignal(
+	gcoOS Os,
+	gctHANDLE Process
+	)
+{
+	gctINT signal;
+
+	gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+
+	gcmVERIFY_OK(gcoOS_AcquireMutex(Os,
+		Os->signal.lock,
+		gcvINFINITE
+		));
+
+	if (Os->signal.unused == Os->signal.tableLen)
+	{
+		gcmVERIFY_OK(gcoOS_ReleaseMutex(Os,
+			Os->signal.lock
+			));
+
+		return gcvSTATUS_OK;
+	}
+
+	for (signal = 0; signal < Os->signal.tableLen; signal++)
+	{
+		if (Os->signal.table[signal] != gcvNULL &&
+			((gcsSIGNAL_PTR)Os->signal.table[signal])->process == Process)
+		{
+			gcoOS_DestroySignal(Os,	Os->signal.table[signal]);
+
+			/* Update the signal table. */
+			Os->signal.table[signal] = gcvNULL;
+			if (Os->signal.unused++ == 0)
+			{
+				Os->signal.currentID = signal;
+			}
+		}
+	}
+
+	gcmVERIFY_OK(gcoOS_ReleaseMutex(Os,
+		Os->signal.lock
+		));
+
+	return gcvSTATUS_OK;
+}
+
+#endif /* USE_NEW_LINUX_SIGNAL */
+
+/*******************************************************************************
+**
+**	gcoOS_MapUserMemory
+**
+**	Lock down a user buffer and return an DMA'able address to be used by the
+**	hardware to access it.
+**
+**	INPUT:
+**
+**		gctPOINTER Memory
+**			Pointer to memory to lock down.
+**
+**		gctSIZE_T Size
+**			Size in bytes of the memory to lock down.
+**
+**	OUTPUT:
+**
+**		gctPOINTER * Info
+**			Pointer to variable receiving the information record required by
+**			gcoOS_UnmapUserMemory.
+**
+**		gctUINT32_PTR Address
+**			Pointer to a variable that will receive the address DMA'able by the
+**			hardware.
+*/
+gceSTATUS
+gcoOS_MapUserMemory(
+	IN gcoOS Os,
+	IN gctPOINTER Memory,
+	IN gctSIZE_T Size,
+	OUT gctPOINTER * Info,
+	OUT gctUINT32_PTR Address
+	)
+{
+	gceSTATUS status;
+	gctSIZE_T pageCount, i, j;
+	gctUINT32_PTR pageTable;
+	gctUINT32 address;
+	gctUINT32 start, end, memory;
+	gctINT result = 0;
+
+	gcsPageInfo_PTR info = gcvNULL;
+	struct page **pages = gcvNULL;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmVERIFY_ARGUMENT(Memory != gcvNULL);
+	gcmVERIFY_ARGUMENT(Size > 0);
+	gcmVERIFY_ARGUMENT(Info != gcvNULL);
+	gcmVERIFY_ARGUMENT(Address != gcvNULL);
+
+	gcmTRACE_ZONE(gcvLEVEL_VERBOSE,
+		gcvZONE_OS,
+		"[gcoOS_MapUserMemory] enter.\n"
+		);
+
+	do
+	{
+		memory = (gctUINT32) Memory;
+
+		/* Get the number of required pages. */
+	 	end = (memory + Size + PAGE_SIZE - 1) >> PAGE_SHIFT;
+		start = memory >> PAGE_SHIFT;
+		pageCount = end - start;
+
+		gcmTRACE_ZONE(gcvLEVEL_INFO,
+			gcvZONE_OS,
+			"[gcoOS_MapUserMemory] pageCount: %d.\n",
+			pageCount
+			);
+
+		/* Invalid argument. */
+		if (pageCount == 0)
+		{
+			return gcvSTATUS_INVALID_ARGUMENT;
+		}
+
+		/* Overflow. */
+		if ((memory + Size) < memory)
+		{
+			return gcvSTATUS_INVALID_ARGUMENT;
+		}
+
+		MEMORY_MAP_LOCK(Os);
+
+		/* Allocate the Info struct. */
+		info = (gcsPageInfo_PTR)kmalloc(sizeof(gcsPageInfo), GFP_KERNEL);
+
+		if (info == gcvNULL)
+		{
+			status = gcvSTATUS_OUT_OF_MEMORY;
+			break;
+		}
+
+		/* Allocate the array of page addresses. */
+		pages = (struct page **)kmalloc(pageCount * sizeof(struct page *), GFP_KERNEL);
+
+		if (pages == gcvNULL)
+		{
+			status = gcvSTATUS_OUT_OF_MEMORY;
+			break;
+		}
+
+		/* Get the user pages. */
+		down_read(&current->mm->mmap_sem);
+		result = get_user_pages(current,
+					current->mm,
+					memory & PAGE_MASK,
+					pageCount,
+					1,
+					0,
+					pages,
+					NULL
+					);
+		up_read(&current->mm->mmap_sem);
+
+		if (result <=0 || result < pageCount)
+		{
+			struct vm_area_struct *vma;
+
+			vma = find_vma(current->mm, memory);
+
+			if (vma && (vma->vm_flags & VM_PFNMAP) )
+			{
+				do
+				{
+					pte_t		* pte;
+					spinlock_t 	* ptl;
+					unsigned long pfn;
+
+		    		pgd_t * pgd = pgd_offset(current->mm, memory);
+	   				pud_t * pud = pud_alloc(current->mm, pgd, memory);
+					if (pud)
+					{
+						pmd_t * pmd = pmd_alloc(current->mm, pud, memory);
+						if (pmd)
+						{
+							pte = pte_offset_map_lock(current->mm, pmd, memory, &ptl);
+							if (!pte)
+							{
+								break;
+							}
+						}
+						else
+						{
+							break;
+						}
+					}
+					else
+					{
+						break;
+					}
+
+					pfn 	 = pte_pfn(*pte);
+					*Address = ((pfn << PAGE_SHIFT) | (((unsigned long)Memory) & ~PAGE_MASK))
+								- Os->baseAddress;
+					*Info 	 = gcvNULL;
+
+
+#if MRVL_TAVOR_PV2_PATCH
+                    {
+                        gctUINT32 patch_address = *Address;
+                        *Address = patch_address & 0x7fffffff;
+                    }
+#endif 
+
+					pte_unmap_unlock(pte, ptl);
+
+					/* Release page info struct. */
+					if (info != gcvNULL)
+					{
+						/* Free the page info struct. */
+						kfree(info);
+					}
+
+					if (pages != gcvNULL)
+					{
+						/* Free the page table. */
+						kfree(pages);
+					}
+
+					MEMORY_MAP_UNLOCK(Os);
+
+                    
+
+					return gcvSTATUS_OK;
+				}
+				while (gcvFALSE);
+
+				*Address = ~0;
+				*Info = gcvNULL;
+
+				status = gcvSTATUS_OUT_OF_RESOURCES;
+				break;
+			}
+			else
+			{
+				status = gcvSTATUS_OUT_OF_RESOURCES;
+				break;
+			}
+		}
+
+		for (i = 0; i < pageCount; i++)
+		{
+			/* Flush the data cache. */
+#ifdef ANDROID
+			dma_sync_single_for_device(
+						gcvNULL,
+						page_to_phys(pages[i]),
+						PAGE_SIZE,
+						DMA_TO_DEVICE);
+#else
+			flush_dcache_page(pages[i]);
+#endif
+		}
+
+		/* Allocate pages inside the page table. */
+		gcmERR_BREAK(gcoMMU_AllocatePages(Os->device->kernel->mmu,
+										  pageCount * (PAGE_SIZE/4096),
+										  (gctPOINTER *) &pageTable,
+										  &address));
+
+		/* Fill the page table. */
+		for (i = 0; i < pageCount; i++)
+		{
+			/* Get the physical address from page struct. */
+			pageTable[i * (PAGE_SIZE/4096)] = page_to_phys(pages[i]);
+
+			for (j = 1; j < (PAGE_SIZE/4096); j++)
+			{
+				pageTable[i * (PAGE_SIZE/4096) + j] = pageTable[i * (PAGE_SIZE/4096)] + 4096 * j;
+			}
+
+			gcmTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+				"[gcoOS_MapUserMemory] pages[%d]: 0x%x, pageTable[%d]: 0x%x.\n",
+				i, pages[i],
+				i, pageTable[i]);
+		}
+
+		/* Save pointer to page table. */
+		info->pageTable = pageTable;
+		info->pages = pages;
+
+		*Info = (gctPOINTER) info;
+
+		gcmTRACE_ZONE(gcvLEVEL_INFO,
+			gcvZONE_OS,
+			"[gcoOS_MapUserMemory] info->pages: 0x%x, info->pageTable: 0x%x, info: 0x%x.\n",
+			info->pages,
+			info->pageTable,
+			info
+			);
+
+		/* Return address. */
+		*Address = address + (memory & ~PAGE_MASK);
+
+		gcmTRACE_ZONE(gcvLEVEL_INFO,
+			gcvZONE_OS,
+			"[gcoOS_MapUserMemory] Address: 0x%x.\n",
+			*Address
+			);
+
+		/* Success. */
+		status = gcvSTATUS_OK;
+	}
+	while (gcvFALSE);
+
+	if (gcmIS_ERROR(status))
+	{
+		gcmTRACE_ZONE(gcvLEVEL_ERROR,
+			gcvZONE_OS,
+			"[gcoOS_MapUserMemory] error occured: %d.\n",
+			status
+			);
+
+		/* Release page array. */
+		if (result > 0 && pages != gcvNULL)
+		{
+			gcmTRACE_ZONE(gcvLEVEL_ERROR,
+				gcvZONE_OS,
+				"[gcoOS_MapUserMemory] error: page table is freed.\n"
+				);
+
+			for (i = 0; i < result; i++)
+			{
+				if (pages[i] == gcvNULL)
+				{
+					break;
+				}
+#ifdef ANDROID
+				dma_sync_single_for_device(
+							gcvNULL,
+							page_to_phys(pages[i]),
+							PAGE_SIZE,
+							DMA_FROM_DEVICE);
+#endif
+				page_cache_release(pages[i]);
+			}
+		}
+
+		if (pages != gcvNULL)
+		{
+			gcmTRACE_ZONE(gcvLEVEL_ERROR,
+				gcvZONE_OS,
+				"[gcoOS_MapUserMemory] error: pages is freed.\n"
+				);
+
+			/* Free the page table. */
+			kfree(pages);
+			info->pages = gcvNULL;
+		}
+
+		/* Release page info struct. */
+		if (info != gcvNULL)
+		{
+			gcmTRACE_ZONE(gcvLEVEL_ERROR,
+				gcvZONE_OS,
+				"[gcoOS_MapUserMemory] error: info is freed.\n"
+				);
+
+			/* Free the page info struct. */
+			kfree(info);
+			*Info = gcvNULL;
+		}
+	}
+
+	MEMORY_MAP_UNLOCK(Os);
+
+	gcmTRACE_ZONE(gcvLEVEL_VERBOSE,
+		gcvZONE_OS,
+		"[gcoOS_MapUserMemory] leave.\n"
+		);
+
+	/* Return the status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_UnmapUserMemory
+**
+**	Unlock a user buffer and that was previously locked down by
+**	gcoOS_MapUserMemory.
+**
+**	INPUT:
+**
+**		gctPOINTER Memory
+**			Pointer to memory to unlock.
+**
+**		gctSIZE_T Size
+**			Size in bytes of the memory to unlock.
+**
+**		gctPOINTER Info
+**			Information record returned by gcoOS_MapUserMemory.
+**
+**		gctUINT32_PTR Address
+**			The address returned by gcoOS_MapUserMemory.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcoOS_UnmapUserMemory(
+	IN gcoOS Os,
+	IN gctPOINTER Memory,
+	IN gctSIZE_T Size,
+	IN gctPOINTER Info,
+	IN gctUINT32 Address
+	)
+{
+	gceSTATUS status;
+	gctUINT32 memory, start, end;
+	gcsPageInfo_PTR info;
+	gctSIZE_T pageCount, i;
+	struct page **pages;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmVERIFY_ARGUMENT(Memory != gcvNULL);
+	gcmVERIFY_ARGUMENT(Size > 0);
+	gcmVERIFY_ARGUMENT(Info != gcvNULL);
+
+	gcmTRACE_ZONE(gcvLEVEL_VERBOSE,
+		gcvZONE_OS,
+		"[gcoOS_UnmapUserMemory] enter.\n"
+		);
+
+	do
+	{
+		info = (gcsPageInfo_PTR) Info;
+
+		if (info == gcvNULL)
+		{
+			return gcvSTATUS_OK;
+		}
+
+		pages = info->pages;
+
+		gcmTRACE_ZONE(gcvLEVEL_INFO,
+			gcvZONE_OS,
+			"[gcoOS_UnmapUserMemory] info: 0x%x, pages: 0x%x.\n",
+			info,
+			pages
+			);
+
+		/* Invalid page array. */
+		if (pages == gcvNULL)
+		{
+			return gcvSTATUS_INVALID_ARGUMENT;
+		}
+
+		memory = (gctUINT32) Memory;
+		end = (memory + Size + PAGE_SIZE - 1) >> PAGE_SHIFT;
+		start = memory >> PAGE_SHIFT;
+		pageCount = end - start;
+
+		/* Overflow. */
+		if ((memory + Size) < memory)
+		{
+			return gcvSTATUS_INVALID_ARGUMENT;
+		}
+
+		/* Invalid argument. */
+		if (pageCount == 0)
+		{
+			return gcvSTATUS_INVALID_ARGUMENT;
+		}
+
+		gcmTRACE_ZONE(gcvLEVEL_INFO,
+			gcvZONE_OS,
+			"[gcoOS_UnmapUserMemory] memory: 0x%x, pageCount: %d, pageTable: 0x%x.\n",
+			memory,
+			pageCount,
+			info->pageTable
+			);
+
+		MEMORY_MAP_LOCK(Os);
+
+		/* Free the pages from the MMU. */
+		gcmERR_BREAK(gcoMMU_FreePages(Os->device->kernel->mmu,
+									  info->pageTable,
+									  pageCount * (PAGE_SIZE/4096)
+									  ));
+
+		/* Release the page cache. */
+		for (i = 0; i < pageCount; i++)
+		{
+			gcmTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+				"[gcoOS_UnmapUserMemory] pages[%d]: 0x%x.\n",
+				i,
+				pages[i]
+				);
+
+			if (!PageReserved(pages[i]))
+			{
+				SetPageDirty(pages[i]);
+			}
+
+#ifdef ANDROID
+			dma_sync_single_for_device(
+						gcvNULL,
+						page_to_phys(pages[i]),
+						PAGE_SIZE,
+						DMA_FROM_DEVICE);
+#endif
+			page_cache_release(pages[i]);
+		}
+
+		/* Success. */
+		status = gcvSTATUS_OK;
+	}
+	while (gcvFALSE);
+
+	if (info != gcvNULL)
+	{
+		/* Free the page array. */
+		if (info->pages != gcvNULL)
+		{
+			kfree(info->pages);
+		}
+
+		kfree(info);
+	}
+
+	MEMORY_MAP_UNLOCK(Os);
+
+	/* Return the status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_GetBaseAddress
+**
+**	Get the base address for the physical memory.
+**
+**	INPUT:
+**
+**		gcoOS Os
+**			Pointer to the gcoOS object.
+**
+**	OUTPUT:
+**
+**		gctUINT32_PTR BaseAddress
+**			Pointer to a variable that will receive the base address.
+*/
+gceSTATUS
+gcoOS_GetBaseAddress(
+	IN gcoOS Os,
+	OUT gctUINT32_PTR BaseAddress
+	)
+{
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmVERIFY_ARGUMENT(BaseAddress != gcvNULL);
+
+	/* Return base address. */
+	*BaseAddress = Os->baseAddress;
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+#if USE_EVENT_QUEUE
+gceSTATUS
+gcoOS_SuspendInterrupt(
+	IN gcoOS Os
+	)
+{
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+
+	disable_irq(Os->device->irqLine);
+
+	return gcvSTATUS_OK;
+}
+
+gceSTATUS
+gcoOS_ResumeInterrupt(
+	IN gcoOS Os
+	)
+{
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+
+	enable_irq(Os->device->irqLine);
+
+	return gcvSTATUS_OK;
+}
+#endif
+
+#if MRVL_LOW_POWER_MODE_DEBUG
+static unsigned int _getTickCount(void)
+{
+    struct timeval tv;
+    unsigned int tickcount = 0;
+    do_gettimeofday(&tv);
+    tickcount = (tv.tv_sec*1000 + tv.tv_usec/1000);
+    return tickcount;
+}
+#endif
+
+gceSTATUS
+gcoOS_NotifyIdle(
+	IN gcoOS Os,
+	IN gctBOOL Idle
+	)
+{
+#if MRVL_LOW_POWER_MODE_DEBUG
+	static int 				base_tick = 0;
+	static unsigned int		last_tick = 0;
+	static unsigned int		current_tick = 0;
+	static int 				count	= 0;
+	static int				print_count = 0;
+	static int				idle_time = 0;
+	static int				running_time = 0;
+	int					    time_step = 10000;  // get statistics data very 10000 ms
+	int					    print_times = 10;   // get statistics data 10 times
+	int                     strlen = 0;
+	int                     i = 0;
+
+    // print  10 time_steps
+    if(print_count < print_times)
+    {
+    	if(count == 0)
+    	{
+    		last_tick = base_tick = _getTickCount();
+    		running_time = 0;
+    		idle_time = 0;
+
+    		// time_step head
+    		strlen = sprintf(Os->device->kernel->kernelMSG + Os->device->kernel->msgLen,
+    					"@@@@@@@print_count = %d\n", 
+    					print_count); 
+    		Os->device->kernel->msgLen += strlen;
+    	}
+    	count++;
+
+    	current_tick=_getTickCount();
+
+    	// detail log
+    	strlen = sprintf(Os->device->kernel->kernelMSG + Os->device->kernel->msgLen,
+    					"%s\t= %d\n", 
+    					Idle?"running":"idle", 
+    					current_tick - last_tick); 
+    	Os->device->kernel->msgLen += strlen;
+    	
+    	if(Idle)
+    	{
+    		running_time += current_tick - last_tick;
+    	}
+    	else
+    	{
+    		idle_time += current_tick - last_tick;
+    	}
+    	last_tick = current_tick;
+
+    	
+    	// time_step tail
+    	if(current_tick - base_tick >= time_step)
+    	{
+    		strlen = sprintf(Os->device->kernel->kernelMSG + Os->device->kernel->msgLen,
+    				"state switch times=%d\n", 
+    				count); 
+    		Os->device->kernel->msgLen += strlen;
+    		
+    		strlen = sprintf(Os->device->kernel->kernelMSG + Os->device->kernel->msgLen,
+    				"[TOTAL\tRUNNIG\tIDLE] = [%d\t%d\t%d] ms\n\n\n\n\n\n",
+    				current_tick - base_tick, 
+    				running_time, 
+    				idle_time);
+    		Os->device->kernel->msgLen += strlen;		
+
+    		print_count++;
+    		
+    		count = 0;
+    	}
+    }
+    else if(print_count == print_times)
+    {
+    	// print to minicom
+    	for(i=0;i<Os->device->kernel->msgLen;i+=1024)
+    	{
+    		Os->device->kernel->kernelMSG[i+1023] = '\0';
+    		printk("%s\n",(char*)Os->device->kernel->kernelMSG + i);
+    	}
+    	print_count++;
+    }
+#endif
+
+#if 1
+    //printk("[galcore] %s:\n",Idle?"Idle,freq scale to 1/64":"Running");
+	        
+	if(Idle)
+	{
+        /* frequence change to 1/64 */
+        gcmVERIFY_OK(gcoOS_WriteRegister(Os,0x00000,0x204));
+        /* Loading the frequency scaler. */
+    	gcmVERIFY_OK(gcoOS_WriteRegister(Os,0x00000,0x004));
+
+        gcoOS_UnSetConstraint(Os, 
+            Os->device->enableDVFM,
+            Os->device->enableLowPowerMode);
+	}
+	else
+	{
+        /* Write the clock control register. */
+    	gcmVERIFY_OK(gcoOS_WriteRegister(Os, 0x00000, 0x300));
+    	/* Done loading the frequency scaler. */
+     	gcmVERIFY_OK(gcoOS_WriteRegister(Os, 0x00000, 0x100));
+
+        gcoOS_SetConstraint(Os, 
+            Os->device->enableDVFM,
+            Os->device->enableLowPowerMode);
+	}
+#endif
+
+
+	return gcvSTATUS_OK;
+}
+
+gceSTATUS
+gcoOS_SetConstraint(
+	IN gcoOS Os,
+	IN gctBOOL enableDVFM,
+	IN gctBOOL enableLPM
+        )
+{
+#ifdef CONFIG_PXA_DVFM
+
+#if 0
+    if(enableDVFM)
+    {
+        /* disable LPM and OP1 - OP5 on PV2 evb */
+        dvfm_disable(Os->device->dvfm_dev_index);
+    }
+#else
+    if(enableLPM)
+    {
+        //printk("\n Idle = false, disable low power mode\n");
+        /* Disable D0CS */
+        dvfm_disable_op_name("D0CS", Os->device->dvfm_dev_index);
+        /* Disable Low power mode */
+        dvfm_disable_op_name("D1", Os->device->dvfm_dev_index);
+        dvfm_disable_op_name("D2", Os->device->dvfm_dev_index);
+        /* Disable CG */
+        if(cpu_is_pxa935() || cpu_is_pxa950())
+            dvfm_disable_op_name("CG", Os->device->dvfm_dev_index);
+    }
+
+    if(enableDVFM)
+    {
+
+        /* Disable OP1 - OP7  on PV2 evb */
+        dvfm_disable_op_name("156M", Os->device->dvfm_dev_index);
+        dvfm_disable_op_name("208M", Os->device->dvfm_dev_index);
+        dvfm_disable_op_name("156M_HF", Os->device->dvfm_dev_index);
+        dvfm_disable_op_name("208M_HF", Os->device->dvfm_dev_index);
+        dvfm_disable_op_name("416M", Os->device->dvfm_dev_index);
+        //dvfm_disable_op_name("624M", Os->device->dvfm_dev_index);
+        //dvfm_disable_op_name("832M", Os->device->dvfm_dev_index);
+        //dvfm_disable(Os->device->dvfm_dev_index);
+    }
+#endif
+
+#endif
+        return gcvSTATUS_OK;
+}
+
+#ifdef ANDROID
+MEMORY_RECORD_PTR
+CreateMemoryRecord(
+	gcoOS Os,
+	MEMORY_RECORD_PTR List,
+	gcuVIDMEM_NODE_PTR Node
+	)
+{
+	MEMORY_RECORD_PTR	mr;
+
+	mr = (MEMORY_RECORD_PTR)kmalloc(sizeof(struct MEMORY_RECORD), GFP_ATOMIC);
+	if (mr == gcvNULL) return gcvNULL;
+
+	MEMORY_LOCK(Os);
+
+	mr->node			= Node;
+
+	mr->prev			= List->prev;
+	mr->next			= List;
+	List->prev->next	= mr;
+	List->prev			= mr;
+
+	MEMORY_UNLOCK(Os);
+
+	return mr;
+}
+
+void
+DestoryMemoryRecord(
+	gcoOS Os,
+	MEMORY_RECORD_PTR Mr
+	)
+{
+	MEMORY_LOCK(Os);
+
+	Mr->prev->next		= Mr->next;
+	Mr->next->prev		= Mr->prev;
+
+	MEMORY_UNLOCK(Os);
+
+	kfree(Mr);
+}
+
+MEMORY_RECORD_PTR
+FindMemoryRecord(
+	gcoOS Os,
+	MEMORY_RECORD_PTR List,
+	gcuVIDMEM_NODE_PTR Node
+	)
+{
+	MEMORY_RECORD_PTR mr;
+
+	MEMORY_LOCK(Os);
+
+	mr = List->next;
+
+	while (mr != List)
+	{
+		if (mr->node == Node)
+		{
+			MEMORY_UNLOCK(Os);
+
+			return mr;
+		}
+
+		mr = mr->next;
+	}
+
+	MEMORY_UNLOCK(Os);
+
+	return gcvNULL;
+}
+
+void
+FreeAllMemoryRecord(
+	gcoOS Os,
+	MEMORY_RECORD_PTR List
+	)
+{
+	MEMORY_RECORD_PTR mr;
+
+	MEMORY_LOCK(Os);
+
+	while (List->next != List)
+	{
+		mr = List->next;
+
+		mr->prev->next		= mr->next;
+		mr->next->prev		= mr->prev;
+
+		MEMORY_UNLOCK(Os);
+
+		while (gcvTRUE)
+		{
+			if (mr->node->VidMem.memory->object.type == gcvOBJ_VIDMEM)
+			{
+				if (mr->node->VidMem.locked == 0) break;
+			}
+			else
+			{
+				if (mr->node->Virtual.locked == 0) break;
+			}
+
+			gcoVIDMEM_Unlock(mr->node, gcvSURF_TYPE_UNKNOWN, gcvNULL);
+		}
+
+		gcoVIDMEM_Free(mr->node);
+
+		kfree(mr);
+
+		MEMORY_LOCK(Os);
+	}
+    
+    MEMORY_UNLOCK(Os);
+}
+#endif
+
+
+gceSTATUS
+gcoOS_UnSetConstraint(
+	IN gcoOS Os,
+	IN gctBOOL enableDVFM,
+	IN gctBOOL enableLPM
+	)
+{
+#ifdef CONFIG_PXA_DVFM
+
+#if 0
+    if(enableDVFM)
+    {
+        /* enable LPM and OP1 - OP5 on PV2 evb  */
+        dvfm_enable(Os->device->dvfm_dev_index);
+    }
+#else
+    if(enableLPM)
+    {
+        //printk("\n Idle = true, enable low power mode\n");
+        /* Enable D0CS */
+        dvfm_enable_op_name("D0CS", Os->device->dvfm_dev_index);
+        /* Enable Low power mode */
+        dvfm_enable_op_name("D1", Os->device->dvfm_dev_index);
+        dvfm_enable_op_name("D2", Os->device->dvfm_dev_index);
+        /* Enable CG */
+        if(cpu_is_pxa935() || cpu_is_pxa950())
+            dvfm_enable_op_name("CG", Os->device->dvfm_dev_index);
+    }
+
+    if(enableDVFM)
+    {
+
+        /* Enable OP1 - OP7 on PV2 evb */
+        dvfm_enable_op_name("156M", Os->device->dvfm_dev_index);
+        dvfm_enable_op_name("208M", Os->device->dvfm_dev_index);
+        dvfm_enable_op_name("156M_HF", Os->device->dvfm_dev_index);
+        dvfm_enable_op_name("208M_HF", Os->device->dvfm_dev_index);
+        dvfm_enable_op_name("416M", Os->device->dvfm_dev_index);
+        //dvfm_enable_op_name("624M", Os->device->dvfm_dev_index);
+        //dvfm_enable_op_name("832M", Os->device->dvfm_dev_index);
+        //dvfm_enable(Os->device->dvfm_dev_index);
+    }
+#endif
+
+#endif
+    return gcvSTATUS_OK;
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/Device.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/Device.c
@@ -0,0 +1,844 @@
+/****************************************************************************
+*
+*    Copyright (C) 2002 - 2008 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public Lisence as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+#include "PreComp.h"
+#include <linux/pagemap.h>
+#include <linux/seq_file.h>
+#include <linux/mm.h>
+#include <linux/mman.h>
+
+#ifdef FLAREON
+static struct dove_gpio_irq_handler gc500_handle;
+#endif
+
+/******************************************************************************\
+******************************** gcoGALDEVICE Code *******************************
+\******************************************************************************/
+
+gceSTATUS
+gcoGALDEVICE_AllocateMemory(
+	IN gcoGALDEVICE Device,
+	IN gctSIZE_T Bytes,
+    OUT gctPOINTER *Logical,
+    OUT gctPHYS_ADDR *Physical,
+    OUT gctUINT32 *PhysAddr
+	)
+{
+	gceSTATUS status;
+
+	gcmVERIFY_ARGUMENT(Device != NULL);
+	gcmVERIFY_ARGUMENT(Logical != NULL);
+	gcmVERIFY_ARGUMENT(Physical != NULL);
+	gcmVERIFY_ARGUMENT(PhysAddr != NULL);
+
+	status = gcoOS_AllocateContiguous(Device->os,
+					  gcvFALSE,
+					  &Bytes,
+					  Physical,
+					  Logical);
+
+	if (gcmIS_ERROR(status))
+	{
+		gcmTRACE_ZONE(gcvLEVEL_ERROR,
+				gcvZONE_DRIVER,
+    			"[galcore] gcoGALDEVICE_AllocateMemory: error status->0x%x\n",
+			   status);
+
+		return status;
+	}
+
+	*PhysAddr = ((PLINUX_MDL)*Physical)->dmaHandle - Device->baseAddress;
+	gcmTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_DRIVER,
+    			"[galcore] gcoGALDEVICE_AllocateMemory: phys_addr->0x%x phsical->0x%x Logical->0x%x\n",
+               (gctUINT32)*Physical,
+			   (gctUINT32)*PhysAddr,
+			   (gctUINT32)*Logical);
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+gceSTATUS
+gcoGALDEVICE_FreeMemory(
+	IN gcoGALDEVICE Device,
+	IN gctPOINTER Logical,
+	IN gctPHYS_ADDR Physical)
+{
+	gcmVERIFY_ARGUMENT(Device != NULL);
+
+    return gcoOS_FreeContiguous(Device->os,
+					Physical,
+					Logical,
+					((PLINUX_MDL)Physical)->numPages*PAGE_SIZE);
+}
+
+irqreturn_t isrRoutine(int irq, void *ctxt)
+{
+    gcoGALDEVICE device = (gcoGALDEVICE)ctxt;
+    int handled = 0;
+
+    /* Call kernel interrupt notification. */
+    if (gcoKERNEL_Notify(device->kernel,
+						gcvNOTIFY_INTERRUPT,
+						gcvTRUE) == gcvSTATUS_OK)
+    {
+		device->dataReady = gcvTRUE;
+
+		up(&device->sema);
+
+		handled = 1;
+    }
+
+    return IRQ_RETVAL(handled);
+}
+
+int threadRoutine(void *ctxt)
+{
+    gcoGALDEVICE device = (gcoGALDEVICE)ctxt;
+
+	gcmTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_DRIVER,
+				"Starting isr Thread with extension->0x%x\n",
+				(gctUINT32)device);
+
+	while (1)
+	{
+
+		if(down_interruptible(&device->sema) == 0)
+		{
+		device->dataReady = gcvFALSE;
+
+		if (device->killThread == gcvTRUE)
+		{
+			return 0;
+		}
+
+        /* Wait for the interrupt. */
+		if (kthread_should_stop())
+		{
+			return 0;
+		}
+
+		gcoKERNEL_Notify(device->kernel, gcvNOTIFY_INTERRUPT, gcvFALSE);
+    }
+    }
+
+    return 0;
+}
+
+/*******************************************************************************
+**
+**	gcoGALDEVICE_Setup_ISR
+**
+**	Start the ISR routine.
+**
+**	INPUT:
+**
+**		gcoGALDEVICE Device
+**			Pointer to an gcoGALDEVICE object.
+**
+**	OUTPUT:
+**
+**		Nothing.
+**
+**	RETURNS:
+**
+**		gcvSTATUS_OK
+**			Setup successfully.
+**		gcvSTATUS_GENERIC_IO
+**			Setup failed.
+*/
+gceSTATUS
+gcoGALDEVICE_Setup_ISR(
+	IN gcoGALDEVICE Device
+	)
+{
+	gctINT ret;
+
+	gcmVERIFY_ARGUMENT(Device != NULL);
+
+	if (Device->irqLine == 0)
+	{
+		return gcvSTATUS_GENERIC_IO;
+	}
+
+	/* Hook up the isr based on the irq line. */
+#ifdef FLAREON
+	gc500_handle.dev_name = "galcore interrupt service";
+	gc500_handle.dev_id = Device;
+	gc500_handle.handler = isrRoutine;
+	gc500_handle.intr_gen = GPIO_INTR_LEVEL_TRIGGER;
+	gc500_handle.intr_trig = GPIO_TRIG_HIGH_LEVEL;
+	ret = dove_gpio_request (DOVE_GPIO0_7, &gc500_handle);
+#else
+	ret = request_irq(Device->irqLine,
+				isrRoutine,
+				IRQF_DISABLED,
+				"galcore interrupt service",
+				Device);
+#endif
+
+
+	if (ret != 0) {
+		gcmTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_DRIVER,
+            	"[galcore] gcoGALDEVICE_Setup_ISR: "
+				"Could not register irq line->%d\n",
+				Device->irqLine);
+
+		Device->isrInitialized = gcvFALSE;
+
+		return gcvSTATUS_GENERIC_IO;
+	}
+
+	Device->isrInitialized = gcvTRUE;
+
+	gcmTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_DRIVER,
+            	"[galcore] gcoGALDEVICE_Setup_ISR: "
+				"Setup the irq line->%d\n",
+				Device->irqLine);
+
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoGALDEVICE_Release_ISR
+**
+**	Release the irq line.
+**
+**	INPUT:
+**
+**		gcoGALDEVICE Device
+**			Pointer to an gcoGALDEVICE object.
+**
+**	OUTPUT:
+**
+**		Nothing.
+**
+**	RETURNS:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcoGALDEVICE_Release_ISR(
+	IN gcoGALDEVICE Device
+	)
+{
+	gcmVERIFY_ARGUMENT(Device != NULL);
+
+	/* release the irq */
+	if (Device->isrInitialized)
+	{
+#ifdef FLAREON
+		dove_gpio_free (DOVE_GPIO0_7, "galcore interrupt service");
+#else
+		free_irq(Device->irqLine, Device);
+#endif
+	}
+
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoGALDEVICE_Start_Thread
+**
+**	Start the daemon thread.
+**
+**	INPUT:
+**
+**		gcoGALDEVICE Device
+**			Pointer to an gcoGALDEVICE object.
+**
+**	OUTPUT:
+**
+**		Nothing.
+**
+**	RETURNS:
+**
+**		gcvSTATUS_OK
+**			Start successfully.
+**		gcvSTATUS_GENERIC_IO
+**			Start failed.
+*/
+gceSTATUS
+gcoGALDEVICE_Start_Thread(
+	IN gcoGALDEVICE Device
+	)
+{
+	gcmVERIFY_ARGUMENT(Device != NULL);
+
+	/* start the kernel thread */
+    Device->threadCtxt = kthread_run(threadRoutine,
+					Device,
+					"galcore daemon thread");
+
+	Device->threadInitialized = gcvTRUE;
+	gcmTRACE_ZONE(gcvLEVEL_INFO,
+					gcvZONE_DRIVER,
+					"[galcore] gcoGALDEVICE_Start_Thread: "
+					"Stat the daemon thread.\n");
+
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoGALDEVICE_Stop_Thread
+**
+**	Stop the gal device, including the following actions: stop the daemon
+**	thread, release the irq.
+**
+**	INPUT:
+**
+**		gcoGALDEVICE Device
+**			Pointer to an gcoGALDEVICE object.
+**
+**	OUTPUT:
+**
+**		Nothing.
+**
+**	RETURNS:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcoGALDEVICE_Stop_Thread(
+	gcoGALDEVICE Device
+	)
+{
+	gcmVERIFY_ARGUMENT(Device != NULL);
+
+	/* stop the thread */
+	if (Device->threadInitialized)
+	{
+		Device->killThread = gcvTRUE;
+		up(&Device->sema);
+
+		kthread_stop(Device->threadCtxt);
+	}
+
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoGALDEVICE_Start
+**
+**	Start the gal device, including the following actions: setup the isr routine
+**  and start the daemoni thread.
+**
+**	INPUT:
+**
+**		gcoGALDEVICE Device
+**			Pointer to an gcoGALDEVICE object.
+**
+**	OUTPUT:
+**
+**		Nothing.
+**
+**	RETURNS:
+**
+**		gcvSTATUS_OK
+**			Start successfully.
+*/
+gceSTATUS
+gcoGALDEVICE_Start(
+	IN gcoGALDEVICE Device
+	)
+{
+	/* start the daemon thread */
+	gcmVERIFY_OK(gcoGALDEVICE_Start_Thread(Device));
+
+	/* setup the isr routine */
+	gcmVERIFY_OK(gcoGALDEVICE_Setup_ISR(Device));
+
+    /*
+       gcvPOWER_SUSPEND will stop GC and disable 2D/3D clk.
+       Since frequency scaling is enabled, disable 2D/3D clk will gain little
+       but lead to potential issue. I prefer not change power state here.
+    */
+#if 0
+	/* Switch to SUSPEND power state. */
+	gcmVERIFY_OK(
+		gcoHARDWARE_SetPowerManagementState(Device->kernel->hardware,
+											gcvPOWER_SUSPEND));
+#endif
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoGALDEVICE_Stop
+**
+**	Stop the gal device, including the following actions: stop the daemon
+**	thread, release the irq.
+**
+**	INPUT:
+**
+**		gcoGALDEVICE Device
+**			Pointer to an gcoGALDEVICE object.
+**
+**	OUTPUT:
+**
+**		Nothing.
+**
+**	RETURNS:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcoGALDEVICE_Stop(
+    gcoGALDEVICE Device
+    )
+{
+    gcmVERIFY_ARGUMENT(Device != NULL);
+
+    /*
+       There is not need to change power state here
+    */
+#if 0
+	/* Switch to ON power state. */
+	gcmVERIFY_OK(
+		gcoHARDWARE_SetPowerManagementState(Device->kernel->hardware,
+											gcvPOWER_ON));
+#endif
+    if (Device->isrInitialized)
+    {
+    	gcoGALDEVICE_Release_ISR(Device);
+    }
+
+    if (Device->threadInitialized)
+    {
+    	gcoGALDEVICE_Stop_Thread(Device);
+    }
+
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**  gcoGALDEVICE_Construct
+**
+**  Constructor.
+**
+**  INPUT:
+**
+**  OUTPUT:
+**
+**  	gcoGALDEVICE * Device
+**  	    Pointer to a variable receiving the gcoGALDEVICE object pointer on
+**  	    success.
+*/
+gceSTATUS
+gcoGALDEVICE_Construct(
+    IN gctINT IrqLine,
+    IN gctUINT32 RegisterMemBase,
+    IN gctSIZE_T RegisterMemSize,
+    IN gctUINT32 ContiguousBase,
+    IN gctSIZE_T ContiguousSize,
+    IN gctSIZE_T BankSize,
+    IN gctINT FastClear,
+	IN gctINT Compression,
+	IN gctUINT32 BaseAddress,
+	IN gctINT Signal,
+    OUT gcoGALDEVICE *Device
+    )
+{
+    gctUINT32 internalBaseAddress, internalAlignment;
+    gctUINT32 externalBaseAddress, externalAlignment;
+    gctUINT32 horizontalTileSize, verticalTileSize;
+    gctUINT32 physAddr;
+    gctUINT32 physical;
+    gcoGALDEVICE device;
+    gceSTATUS status;
+
+    gcmTRACE(gcvLEVEL_VERBOSE, "[galcore] Enter gcoGALDEVICE_Construct\n");
+
+    printk("\n[galcore] registerBase =0x%08x, registerMemSize = 0x%08x, contiguousBase= 0x%08x, contiguousSize = 0x%08x\n", 
+              (gctUINT32)RegisterMemBase, (gctUINT32)RegisterMemSize, (gctUINT32)ContiguousBase, (gctUINT32)ContiguousSize);
+
+    /* Allocate device structure. */
+    device = kmalloc(sizeof(struct _gcoGALDEVICE), GFP_KERNEL);
+    if (!device)
+    {
+    	gcmTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_DRIVER,
+    	    	      "[galcore] gcoGALDEVICE_Construct: Can't allocate memory.\n");
+
+    	return gcvSTATUS_OUT_OF_MEMORY;
+    }
+    memset(device, 0, sizeof(struct _gcoGALDEVICE));
+
+    physical = RegisterMemBase;
+
+    /* Set up register memory region */
+    if (physical != 0)
+    {
+    	/* Request a region. */
+    	request_mem_region(RegisterMemBase, RegisterMemSize, "galcore register region");
+        device->registerBase = (gctPOINTER) ioremap_nocache(RegisterMemBase,
+	    	    	    	    	    	    	    RegisterMemSize);
+        if (!device->registerBase)
+	{
+    	    gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_DRIVER,
+	    	    	  "[galcore] gcoGALDEVICE_Construct: Unable to map location->0x%lX for size->%ld\n",
+			  RegisterMemBase,
+			  RegisterMemSize);
+
+    	    return gcvSTATUS_OUT_OF_RESOURCES;
+        }
+
+    	physical += RegisterMemSize;
+
+		gcmTRACE_ZONE(gcvLEVEL_INFO,
+					gcvZONE_DRIVER,
+        			"[galcore] gcoGALDEVICE_Construct: "
+					"RegisterBase after mapping Address->0x%x is 0x%x\n",
+               		(gctUINT32)RegisterMemBase,
+					(gctUINT32)device->registerBase);
+    }
+
+	/* construct the gcoOS object */
+	device->baseAddress = BaseAddress;
+    gcmVERIFY_OK(gcoOS_Construct(device, &device->os));
+
+    /* construct the gcoKERNEL object. */
+    gcmVERIFY_OK(gcoKERNEL_Construct(device->os, device, &device->kernel));
+
+    gcmVERIFY_OK(gcoHARDWARE_SetFastClear(device->kernel->hardware,
+    					  				  FastClear,
+										  Compression));
+
+    /* query the ceiling of the system memory */
+    gcmVERIFY_OK(gcoHARDWARE_QuerySystemMemory(device->kernel->hardware,
+					&device->systemMemorySize,
+                    &device->systemMemoryBaseAddress));
+
+	gcmTRACE_ZONE(gcvLEVEL_INFO,
+					gcvZONE_DRIVER,
+					"[galcore] gcoGALDEVICE_Construct: "
+    				"Will be trying to allocate contiguous memory of 0x%x bytes\n",
+           			(gctUINT32)device->systemMemoryBaseAddress);
+
+#if COMMAND_PROCESSOR_VERSION == 1
+    /* start the command queue */
+    gcmVERIFY_OK(gcoCOMMAND_Start(device->kernel->command));
+#endif
+
+    /* initialize the thread daemon */
+	sema_init(&device->sema, 0);
+	device->threadInitialized = gcvFALSE;
+	device->killThread = gcvFALSE;
+
+	/* initialize the isr */
+	device->isrInitialized = gcvFALSE;
+	device->dataReady = gcvFALSE;
+	device->irqLine = IrqLine;
+
+	device->signal = Signal;
+
+	/* query the amount of video memory */
+    gcmVERIFY_OK(gcoHARDWARE_QueryMemory(device->kernel->hardware,
+                    &device->internalSize,
+                    &internalBaseAddress,
+                    &internalAlignment,
+                    &device->externalSize,
+                    &externalBaseAddress,
+                    &externalAlignment,
+                    &horizontalTileSize,
+                    &verticalTileSize));
+
+	/* set up the internal memory region */
+    if (device->internalSize > 0)
+    {
+        gceSTATUS status = gcoVIDMEM_Construct(device->os,
+                    internalBaseAddress,
+                    device->internalSize,
+                    internalAlignment,
+                    0,
+                    &device->internalVidMem);
+
+        if (gcmIS_ERROR(status))
+        {
+            /* error, remove internal heap */
+            device->internalSize = 0;
+        }
+        else
+        {
+            /* map internal memory */
+            device->internalPhysical  = (gctPHYS_ADDR)physical;
+            device->internalLogical   = (gctPOINTER)ioremap_nocache(
+					physical, device->internalSize);
+
+            gcmASSERT(device->internalLogical != NULL);
+
+			physical += device->internalSize;
+        }
+    }
+
+    if (device->externalSize > 0)
+    {
+        /* create the external memory heap */
+        gceSTATUS status = gcoVIDMEM_Construct(device->os,
+					externalBaseAddress,
+					device->externalSize,
+					externalAlignment,
+					0,
+					&device->externalVidMem);
+
+        if (gcmIS_ERROR(status))
+        {
+            /* error, remove internal heap */
+            device->externalSize = 0;
+        }
+        else
+        {
+            /* map internal memory */
+            device->externalPhysical = (gctPHYS_ADDR)physical;
+            device->externalLogical = (gctPOINTER)ioremap_nocache(
+					physical, device->externalSize);
+
+			gcmASSERT(device->externalLogical != NULL);
+
+			physical += device->externalSize;
+        }
+    }
+
+	/* set up the contiguous memory */
+    device->contiguousSize = ContiguousSize;
+
+	if (ContiguousBase == 0)
+	{
+		status = gcvSTATUS_OUT_OF_MEMORY;
+
+		while (device->contiguousSize > 0)
+		{
+			gcmTRACE_ZONE(
+				gcvLEVEL_INFO, gcvZONE_DRIVER,
+				"[galcore] gcoGALDEVICE_Construct: Will be trying to allocate contiguous memory of %ld bytes\n",
+				device->contiguousSize
+				);
+
+			/* allocate contiguous memory */
+			status = gcoGALDEVICE_AllocateMemory(
+				device,
+				device->contiguousSize,
+				&device->contiguousBase,
+				&device->contiguousPhysical,
+				&physAddr
+				);
+
+			if (gcmIS_SUCCESS(status))
+			{
+	    		gcmTRACE_ZONE(
+					gcvLEVEL_INFO, gcvZONE_DRIVER,
+					"[galcore] gcoGALDEVICE_Construct: Contiguous allocated size->0x%08X Virt->0x%08lX physAddr->0x%08X\n",
+					device->contiguousSize,
+					device->contiguousBase,
+					physAddr
+					);
+
+				status = gcoVIDMEM_Construct(
+					device->os,
+					physAddr | device->systemMemoryBaseAddress,
+					device->contiguousSize,
+					64,
+					BankSize,
+					&device->contiguousVidMem
+					);
+
+				if (gcmIS_SUCCESS(status))
+				{
+					device->contiguousMapped = gcvFALSE;
+
+					/* success, abort loop */
+					gcmTRACE_ZONE(
+						gcvLEVEL_INFO, gcvZONE_DRIVER,
+						"Using %u bytes of contiguous memory.\n",
+						device->contiguousSize
+						);
+
+					break;
+				}
+
+				gcmVERIFY_OK(gcoGALDEVICE_FreeMemory(
+					device,
+					device->contiguousBase,
+					device->contiguousPhysical
+					));
+
+				device->contiguousBase = NULL;
+			}
+
+			device->contiguousSize -= (4 << 20);
+		}
+	}
+	else
+	{
+		/* Create the contiguous memory heap. */
+		status = gcoVIDMEM_Construct(
+			device->os,
+			(ContiguousBase - device->baseAddress) | device->systemMemoryBaseAddress,
+			ContiguousSize,
+			64,
+			BankSize,
+			&device->contiguousVidMem
+			);
+
+		if (gcmIS_ERROR(status))
+		{
+			/* Error, roll back. */
+			device->contiguousVidMem = gcvNULL;
+			device->contiguousSize   = 0;
+		}
+		else
+		{
+			/* Map the contiguous memory. */
+			request_mem_region(
+				ContiguousBase,
+				ContiguousSize,
+				"galcore managed memory"
+				);
+
+			device->contiguousPhysical = (gctPHYS_ADDR) ContiguousBase;
+			device->contiguousSize     = ContiguousSize;
+			device->contiguousBase     = (gctPOINTER) ioremap_nocache(ContiguousBase, ContiguousSize);
+			device->contiguousMapped   = gcvTRUE;
+
+			if (device->contiguousBase == gcvNULL)
+			{
+    			/* Error, roll back. */
+				gcmVERIFY_OK(gcoVIDMEM_Destroy(device->contiguousVidMem));
+				device->contiguousVidMem = gcvNULL;
+				device->contiguousSize   = 0;
+
+				status = gcvSTATUS_OUT_OF_RESOURCES;
+			}
+		}
+	}
+
+    *Device = device;
+    
+    printk("\n[galcore] real contiguouSize = 0x%08x \n",  (gctUINT32)(device->contiguousSize));
+    
+    gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_DRIVER,
+    	    	  "[galcore] gcoGALDEVICE_Construct: Initialized device->%p contiguous->%lu @ %p (0x%08X)\n",
+		  device,
+		  device->contiguousSize,
+		  device->contiguousBase,
+		  device->contiguousPhysical);
+
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoGALDEVICE_Destroy
+**
+**	Class destructor.
+**
+**	INPUT:
+**
+**		Nothing.
+**
+**	OUTPUT:
+**
+**		Nothing.
+**
+**	RETURNS:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcoGALDEVICE_Destroy(
+	gcoGALDEVICE Device)
+{
+	gcmVERIFY_ARGUMENT(Device != NULL);
+
+    gcmTRACE(gcvLEVEL_VERBOSE, "[ENTER] gcoGALDEVICE_Destroy\n");
+
+    /* Destroy the gcoKERNEL object. */
+    gcmVERIFY_OK(gcoKERNEL_Destroy(Device->kernel));
+
+    if (Device->internalVidMem != gcvNULL)
+    {
+        /* destroy the internal heap */
+        gcmVERIFY_OK(gcoVIDMEM_Destroy(Device->internalVidMem));
+
+		/* unmap the internal memory */
+		iounmap(Device->internalLogical);
+    }
+
+    if (Device->externalVidMem != gcvNULL)
+    {
+        /* destroy the internal heap */
+        gcmVERIFY_OK(gcoVIDMEM_Destroy(Device->externalVidMem));
+
+        /* unmap the external memory */
+		iounmap(Device->externalLogical);
+    }
+
+    if (Device->contiguousVidMem != gcvNULL)
+    {
+        /* Destroy the contiguous heap */
+        gcmVERIFY_OK(gcoVIDMEM_Destroy(Device->contiguousVidMem));
+
+	if (Device->contiguousMapped)
+	{
+    	    gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_DRIVER,
+	        	  "[galcore] gcoGALDEVICE_Destroy: "
+			  "Unmapping contiguous memory->0x%08lX\n",
+			  Device->contiguousBase);
+
+	    iounmap(Device->contiguousBase);
+	}
+	else
+	{
+    	    gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_DRIVER,
+	        	  "[galcore] gcoGALDEVICE_Destroy: "
+			  "Freeing contiguous memory->0x%08lX\n",
+			  Device->contiguousBase);
+
+    	    gcmVERIFY_OK(gcoGALDEVICE_FreeMemory(Device,
+						 Device->contiguousBase,
+						 Device->contiguousPhysical));
+    	}
+    }
+
+    if (Device->registerBase)
+    {
+        iounmap(Device->registerBase);
+    }
+
+    /* Destroy the gcoOS object. */
+    gcmVERIFY_OK(gcoOS_Destroy(Device->os));
+
+    kfree(Device);
+
+    gcmTRACE(gcvLEVEL_VERBOSE, "[galcore] Leave gcoGALDEVICE_Destroy\n");
+
+    return gcvSTATUS_OK;
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/GNUmakefile
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/GNUmakefile
@@ -0,0 +1,63 @@
+##############################################################################
+#  
+#    Copyright (C) 2002 - 2008 by Vivante Corp.
+#  
+#    This program is free software; you can redistribute it and/or modify
+#    it under the terms of the GNU General Public Lisence as published by
+#    the Free Software Foundation; either version 2 of the license, or
+#    (at your option) any later version.
+#  
+#    This program is distributed in the hope that it will be useful,
+#    but WITHOUT ANY WARRANTY; without even the implied warranty of
+#    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+#    GNU General Public Lisence for more details.
+#  
+#    You should have received a copy of the GNU General Public License
+#    along with this program; if not write to the Free Software
+#    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+#  
+##############################################################################
+
+
+
+#
+# This file is a part of Vivante software stack build environment for Linux.
+# It defines the rules necessary to build Linux kernel HAL driver.
+#
+
+
+################################################################################
+# Include common definitions.
+
+include $(AQROOT)/GNUmakefile.common
+
+
+################################################################################
+# Define a shortcut for the main target.
+
+TARGET_OUTPUT = $(OBJ_DIR)/GALCore.ko
+
+
+################################################################################
+# Specify targets.
+
+all:	$(OBJ_DIR)
+	@make ARCH=$(ARCH_TYPE) -C $(KERNEL_DIR) SUBDIRS=`pwd`
+
+install:
+	@-mkdir -p $(DRIVERS_COPY_DIR)
+	@cp $(TARGET_OUTPUT) $(DRIVERS_COPY_DIR)
+
+clean:
+	@make V=$(V) -C $(KERNEL_DIR) SUBDIRS=`pwd` clean
+	@rm -f  build.log
+	@rm -f  PreComp.h.gch
+	@rm -f  Module.symvers
+	@rm -rf $(OBJ_DIR)
+
+
+################################################################################
+# Describe dependencies.
+
+$(OBJ_DIR):
+	@-mkdir -p $(OBJ_DIR)
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/gc_hal_kernel_debug.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/gc_hal_kernel_debug.c
@@ -0,0 +1,449 @@
+/****************************************************************************
+*
+*    Copyright (C) 2005 - 2010 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public License as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+#include "gc_hal_kernel_linux.h"
+#include "linux/spinlock.h"
+#include <stdarg.h>
+
+/*
+    gcdBUFFERED_OUTPUT
+
+    When set to non-zero, all output is collected into a buffer with the
+    specified size.  Once the buffer gets full, or the token "$$FLUSH$$" has
+    been received, the debug buffer will be printed to the console.
+*/
+#define gcdBUFFERED_OUTPUT  0
+
+/******************************************************************************\
+******************************** Debug Variables *******************************
+\******************************************************************************/
+
+static gceSTATUS  _lastError  = gcvSTATUS_OK;
+static gctUINT32  _debugLevel = gcvLEVEL_ERROR;
+static gctUINT32  _debugZones = gcvZONE_NONE;
+static gctINT     _indent     = 0;
+static spinlock_t _lock       = SPIN_LOCK_UNLOCKED;
+
+static void
+OutputDebugString(
+    IN gctCONST_STRING String
+    )
+{
+#if gcdBUFFERED_OUTPUT
+    static gctCHAR outputBuffer[gcdBUFFERED_OUTPUT];
+    static gctINT outputBufferIndex = 0;
+    gctINT n, i;
+
+    n = (String != gcvNULL) ? strlen(String) + 1 : 0;
+
+    if ((n == 0) || (outputBufferIndex + n > gcmSIZEOF(outputBuffer)))
+    {
+        for (i = 0; i < outputBufferIndex; i += strlen(outputBuffer + i) + 1)
+        {
+            printk(outputBuffer + i);
+        }
+
+        outputBufferIndex = 0;
+    }
+
+    if (n > 0)
+    {
+        memcpy(outputBuffer + outputBufferIndex, String, n);
+        outputBufferIndex += n;
+    }
+#else
+    if (String != gcvNULL)
+    {
+        printk(String);
+    }
+#endif
+}
+
+static void
+_Print(
+    IN gctCONST_STRING Message,
+    IN va_list Arguments
+    )
+{
+    char buffer[1024];
+    int i, n;
+
+    if (strcmp(Message, "$$FLUSH$$") == 0)
+    {
+	spin_lock(&_lock);
+	{
+		OutputDebugString(gcvNULL);
+        }
+        spin_unlock(&_lock);
+        return;
+    }
+
+    if (strncmp(Message, "--", 2) == 0)
+    {
+        if (_indent == 0)
+        {
+            printk("ERROR: _indent=0\n");
+        }
+
+        _indent -= 2;
+    }
+
+    for (i = 0; i < _indent; ++i)
+    {
+        buffer[i] = ' ';
+    }
+
+    /* Print message to buffer. */
+    n = vsnprintf(buffer + i, sizeof(buffer) - i, Message, Arguments);
+    if ((n <= 0) || (buffer[i + n - 1] != '\n'))
+    {
+        /* Append new-line. */
+        strncat(buffer, "\n", sizeof(buffer));
+    }
+
+    /* Output to debugger. */
+	spin_lock(&_lock);
+	{
+	OutputDebugString(buffer);
+    }
+    spin_unlock(&_lock);
+
+    if (strncmp(Message, "++", 2) == 0)
+    {
+        _indent += 2;
+    }
+}
+
+/******************************************************************************\
+********************************* Debug Macros *********************************
+\******************************************************************************/
+
+#define _DEBUGPRINT(Message) \
+{ \
+    va_list arguments; \
+    \
+    va_start(arguments, Message); \
+    _Print(Message, arguments); \
+    va_end(arguments); \
+}
+
+/******************************************************************************\
+********************************** Debug Code **********************************
+\******************************************************************************/
+
+/*******************************************************************************
+**
+**  gckOS_Print
+**
+**  Send a message to the debugger.
+**
+**  INPUT:
+**
+**      gctCONST_STRING Message
+**          Pointer to message.
+**
+**      ...
+**          Optional arguments.
+**
+**  OUTPUT:
+**
+**      Nothing.
+*/
+
+void
+gckOS_Print(
+    IN gctCONST_STRING Message,
+    ...
+    )
+{
+    _DEBUGPRINT(Message);
+}
+
+/*******************************************************************************
+**
+**  gckOS_DebugTrace
+**
+**  Send a leveled message to the debugger.
+**
+**  INPUT:
+**
+**      gctUINT32 Level
+**          Debug level of message.
+**
+**      gctCONST_STRING Message
+**          Pointer to message.
+**
+**      ...
+**          Optional arguments.
+**
+**  OUTPUT:
+**
+**      Nothing.
+*/
+
+void
+gckOS_DebugTrace(
+    IN gctUINT32 Level,
+    IN gctCONST_STRING Message,
+    ...
+    )
+{
+    if (Level > _debugLevel)
+    {
+        return;
+    }
+
+    _DEBUGPRINT(Message);
+}
+
+/*******************************************************************************
+**
+**  gckOS_DebugTraceZone
+**
+**  Send a leveled and zoned message to the debugger.
+**
+**  INPUT:
+**
+**      gctUINT32 Level
+**          Debug level for message.
+**
+**      gctUINT32 Zone
+**          Debug zone for message.
+**
+**      gctCONST_STRING Message
+**          Pointer to message.
+**
+**      ...
+**          Optional arguments.
+**
+**  OUTPUT:
+**
+**      Nothing.
+*/
+
+void
+gckOS_DebugTraceZone(
+    IN gctUINT32 Level,
+    IN gctUINT32 Zone,
+    IN gctCONST_STRING Message,
+    ...
+    )
+{
+    if ((Level > _debugLevel) || !(Zone & _debugZones))
+    {
+        return;
+    }
+
+    _DEBUGPRINT(Message);
+}
+
+/*******************************************************************************
+**
+**  gckOS_DebugBreak
+**
+**  Break into the debugger.
+**
+**  INPUT:
+**
+**      Nothing.
+**
+**  OUTPUT:
+**
+**      Nothing.
+*/
+void
+gckOS_DebugBreak(
+    void
+    )
+{
+    gckOS_DebugTrace(gcvLEVEL_ERROR, "gckOS_DebugBreak");
+}
+
+/*******************************************************************************
+**
+**  gckOS_DebugFatal
+**
+**  Send a message to the debugger and break into the debugger.
+**
+**  INPUT:
+**
+**      gctCONST_STRING Message
+**          Pointer to message.
+**
+**      ...
+**          Optional arguments.
+**
+**  OUTPUT:
+**
+**      Nothing.
+*/
+void
+gckOS_DebugFatal(
+    IN gctCONST_STRING Message,
+    ...
+    )
+{
+    _DEBUGPRINT(Message);
+
+    /* Break into the debugger. */
+    gckOS_DebugBreak();
+}
+
+/*******************************************************************************
+**
+**  gckOS_SetDebugLevel
+**
+**  Set the debug level.
+**
+**  INPUT:
+**
+**      gctUINT32 Level
+**          New debug level.
+**
+**  OUTPUT:
+**
+**      Nothing.
+*/
+
+void
+gckOS_SetDebugLevel(
+    IN gctUINT32 Level
+    )
+{
+    _debugLevel = Level;
+}
+
+/*******************************************************************************
+**
+**  gckOS_SetDebugZone
+**
+**  Set the debug zone.
+**
+**  INPUT:
+**
+**      gctUINT32 Zone
+**          New debug zone.
+**
+**  OUTPUT:
+**
+**      Nothing.
+*/
+void
+gckOS_SetDebugZone(
+    IN gctUINT32 Zone
+    )
+{
+    _debugZones = Zone;
+}
+
+/*******************************************************************************
+**
+**  gckOS_SetDebugLevelZone
+**
+**  Set the debug level and zone.
+**
+**  INPUT:
+**
+**      gctUINT32 Level
+**          New debug level.
+**
+**      gctUINT32 Zone
+**          New debug zone.
+**
+**  OUTPUT:
+**
+**      Nothing.
+*/
+
+void
+gckOS_SetDebugLevelZone(
+    IN gctUINT32 Level,
+    IN gctUINT32 Zone
+    )
+{
+    _debugLevel = Level;
+    _debugZones = Zone;
+}
+
+/*******************************************************************************
+**
+**  gckOS_SetDebugZones
+**
+**  Enable or disable debug zones.
+**
+**  INPUT:
+**
+**      gctUINT32 Zones
+**          Debug zones to enable or disable.
+**
+**      gctBOOL Enable
+**          Set to gcvTRUE to enable the zones (or the Zones with the current
+**          zones) or gcvFALSE to disable the specified Zones.
+**
+**  OUTPUT:
+**
+**      Nothing.
+*/
+
+void
+gckOS_SetDebugZones(
+    IN gctUINT32 Zones,
+    IN gctBOOL Enable
+    )
+{
+    if (Enable)
+    {
+        /* Enable the zones. */
+        _debugZones |= Zones;
+    }
+    else
+    {
+        /* Disable the zones. */
+        _debugZones &= ~Zones;
+    }
+}
+
+/*******************************************************************************
+**
+**  gckOS_Verify
+**
+**  Called to verify the result of a function call.
+**
+**  INPUT:
+**
+**      gceSTATUS Status
+**          Function call result.
+**
+**  OUTPUT:
+**
+**      Nothing.
+*/
+
+void
+gckOS_Verify(
+    IN gceSTATUS Status
+    )
+{
+    _lastError = Status;
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/Makefile
@@ -0,0 +1,90 @@
+##############################################################################
+#  
+#    Copyright (C) 2002 - 2008 by Vivante Corp.
+#  
+#    This program is free software; you can redistribute it and/or modify
+#    it under the terms of the GNU General Public Lisence as published by
+#    the Free Software Foundation; either version 2 of the license, or
+#    (at your option) any later version.
+#  
+#    This program is distributed in the hope that it will be useful,
+#    but WITHOUT ANY WARRANTY; without even the implied warranty of
+#    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+#    GNU General Public Lisence for more details.
+#  
+#    You should have received a copy of the GNU General Public License
+#    along with this program; if not write to the Free Software
+#    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+#  
+##############################################################################
+
+
+
+# Makefile for building the kernel driver of HAL
+
+STRIP=$(CROSS_COMPILE)-strip
+
+ifeq ($(FLAREON),)
+else
+  CFLAGS += -DFLAREON
+endif
+
+ifneq ($(KERNELRELEASE), )
+
+# build hal_kernel
+#export CC=arm-none-linux-gnueabi-gcc
+#export LD=arm-none-linux-gnueabi-ld
+#export AS=arm-none-linux-gnueabi-as
+
+HAL_OS_KERNEL_DIR   := .
+HAL_KERNEL_DIR      := ../../../../hal/kernel
+HAL_ARCH_KERNEL_DIR := ../../../../arch/$(notdir $(AQARCH))/hal/kernel
+
+HAL_OS_KERNEL_OBJS := $(HAL_OS_KERNEL_DIR)/Driver.o \
+		      $(HAL_OS_KERNEL_DIR)/Device.o \
+		      $(HAL_OS_KERNEL_DIR)/Debug.o \
+		      $(HAL_OS_KERNEL_DIR)/Kernel.o \
+		      $(HAL_OS_KERNEL_DIR)/Os.o
+
+HAL_KERNEL_OBJS := $(HAL_KERNEL_DIR)/Command.o \
+		   $(HAL_KERNEL_DIR)/Event.o \
+		   $(HAL_KERNEL_DIR)/Heap.o \
+		   $(HAL_KERNEL_DIR)/Kernel.o \
+		   $(HAL_KERNEL_DIR)/Mmu.o \
+		   $(HAL_KERNEL_DIR)/VidMem.o
+
+HAL_ARCH_KERNEL_OBJS := $(HAL_ARCH_KERNEL_DIR)/Hardware.o
+
+HAL_KERNEL_INCLUDE_DIR = -I$(AQROOT)/hal/inc \
+                         -I$(AQROOT)/hal/os/linux/kernel \
+			 -I$(AQROOT)/hal/kernel \
+			 -I$(AQARCH)/hal/kernel \
+			 -I$(AQARCH)/cmodel/inc \
+			 -I$(AQROOT)/hal/user
+			 
+ifeq ($(DEBUG), )
+	CFLAGS+=-O2
+else
+	CFLAGS+=-g -D_DEBUG
+endif
+
+EXTRA_CFLAGS += -DLINUX -DDRIVER $(HAL_KERNEL_INCLUDE_DIR) -DDBG=0
+
+obj-m := aqhal.o
+aqhal-objs := $(HAL_OS_KERNEL_OBJS) $(HAL_KERNEL_OBJS) $(HAL_ARCH_KERNEL_OBJS)
+
+else 
+	KERNEL_BUILD_DIR ?= /lib/modules/$(shell uname -r)/build
+	ARCH_TYPE ?= arm
+	PWD := $(shell pwd)
+
+default:
+	$(MAKE) ARCH=$(ARCH_TYPE) -C $(KERNEL_BUILD_DIR) M=$(PWD) CROSS_COMPILE=$(CROSS_COMPILE)- modules || exit 1
+
+clean:
+	$(MAKE) V=$(V) -C $(KERNEL_BUILD_DIR) M=$(PWD) clean
+	@rm -rf partial
+	@rm -rf *.o *.obj
+
+endif
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/gc_hal_kernel_linux.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/gc_hal_kernel_linux.c
@@ -0,0 +1,411 @@
+/****************************************************************************
+*
+*    Copyright (C) 2005 - 2010 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public License as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+#include "gc_hal_kernel_linux.h"
+
+#define _GC_OBJ_ZONE	gcvZONE_KERNEL
+
+/******************************************************************************\
+******************************* gckKERNEL API Code ******************************
+\******************************************************************************/
+
+/*******************************************************************************
+**
+**	gckKERNEL_QueryVideoMemory
+**
+**	Query the amount of video memory.
+**
+**	INPUT:
+**
+**		gckKERNEL Kernel
+**			Pointer to an gckKERNEL object.
+**
+**	OUTPUT:
+**
+**		gcsHAL_INTERFACE * Interface
+**			Pointer to an gcsHAL_INTERFACE structure that will be filled in with
+**			the memory information.
+*/
+gceSTATUS
+gckKERNEL_QueryVideoMemory(
+	IN gckKERNEL Kernel,
+	OUT gcsHAL_INTERFACE * Interface
+	)
+{
+	gckGALDEVICE device;
+
+	gcmkHEADER_ARG("Kernel=0x%p", Kernel);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Kernel, gcvOBJ_KERNEL);
+	gcmkVERIFY_ARGUMENT(Interface != NULL);
+
+	/* Extract the pointer to the gckGALDEVICE class. */
+	device = (gckGALDEVICE) Kernel->context;
+
+	/* Get internal memory size and physical address. */
+	Interface->u.QueryVideoMemory.internalSize = device->internalSize;
+	Interface->u.QueryVideoMemory.internalPhysical = device->internalPhysical;
+
+	/* Get external memory size and physical address. */
+	Interface->u.QueryVideoMemory.externalSize = device->externalSize;
+	Interface->u.QueryVideoMemory.externalPhysical = device->externalPhysical;
+
+	/* Get contiguous memory size and physical address. */
+	Interface->u.QueryVideoMemory.contiguousSize = device->contiguousSize;
+	Interface->u.QueryVideoMemory.contiguousPhysical = device->contiguousPhysical;
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckKERNEL_GetVideoMemoryPool
+**
+**	Get the gckVIDMEM object belonging to the specified pool.
+**
+**	INPUT:
+**
+**		gckKERNEL Kernel
+**			Pointer to an gckKERNEL object.
+**
+**		gcePOOL Pool
+**			Pool to query gckVIDMEM object for.
+**
+**	OUTPUT:
+**
+**		gckVIDMEM * VideoMemory
+**			Pointer to a variable that will hold the pointer to the gckVIDMEM
+**			object belonging to the requested pool.
+*/
+gceSTATUS
+gckKERNEL_GetVideoMemoryPool(
+	IN gckKERNEL Kernel,
+	IN gcePOOL Pool,
+	OUT gckVIDMEM * VideoMemory
+	)
+{
+	gckGALDEVICE device;
+	gckVIDMEM videoMemory;
+
+	gcmkHEADER_ARG("Kernel=0x%p Pool=%d", Kernel, Pool);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Kernel, gcvOBJ_KERNEL);
+	gcmkVERIFY_ARGUMENT(VideoMemory != NULL);
+
+    /* Extract the pointer to the gckGALDEVICE class. */
+    device = (gckGALDEVICE) Kernel->context;
+
+	/* Dispatch on pool. */
+	switch (Pool)
+	{
+	case gcvPOOL_LOCAL_INTERNAL:
+		/* Internal memory. */
+		videoMemory = device->internalVidMem;
+		break;
+
+	case gcvPOOL_LOCAL_EXTERNAL:
+		/* External memory. */
+		videoMemory = device->externalVidMem;
+		break;
+
+	case gcvPOOL_SYSTEM:
+		/* System memory. */
+		videoMemory = device->contiguousVidMem;
+		break;
+
+	default:
+		/* Unknown pool. */
+		videoMemory = NULL;
+	}
+
+	/* Return pointer to the gckVIDMEM object. */
+	*VideoMemory = videoMemory;
+
+	/* Return status. */
+	gcmkFOOTER_ARG("*VideoMemory=0x%p", *VideoMemory);
+	return (videoMemory == NULL) ? gcvSTATUS_OUT_OF_MEMORY : gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckKERNEL_MapMemory
+**
+**	Map video memory into the current process space.
+**
+**	INPUT:
+**
+**		gckKERNEL Kernel
+**			Pointer to an gckKERNEL object.
+**
+**		gctPHYS_ADDR Physical
+**			Physical address of video memory to map.
+**
+**		gctSIZE_T Bytes
+**			Number of bytes to map.
+**
+**	OUTPUT:
+**
+**		gctPOINTER * Logical
+**			Pointer to a variable that will hold the base address of the mapped
+**			memory region.
+*/
+gceSTATUS
+gckKERNEL_MapMemory(
+	IN gckKERNEL Kernel,
+	IN gctPHYS_ADDR Physical,
+	IN gctSIZE_T Bytes,
+	OUT gctPOINTER * Logical
+	)
+{
+	return gckOS_MapMemory(Kernel->os, Physical, Bytes, Logical);
+}
+
+/*******************************************************************************
+**
+**	gckKERNEL_UnmapMemory
+**
+**	Unmap video memory from the current process space.
+**
+**	INPUT:
+**
+**		gckKERNEL Kernel
+**			Pointer to an gckKERNEL object.
+**
+**		gctPHYS_ADDR Physical
+**			Physical address of video memory to map.
+**
+**		gctSIZE_T Bytes
+**			Number of bytes to map.
+**
+**		gctPOINTER Logical
+**			Base address of the mapped memory region.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckKERNEL_UnmapMemory(
+	IN gckKERNEL Kernel,
+	IN gctPHYS_ADDR Physical,
+	IN gctSIZE_T Bytes,
+	IN gctPOINTER Logical
+	)
+{
+	return gckOS_UnmapMemory(Kernel->os, Physical, Bytes, Logical);
+}
+
+/*******************************************************************************
+**
+**	gckKERNEL_MapVideoMemory
+**
+**	Get the logical address for a hardware specific memory address for the
+**	current process.
+**
+**	INPUT:
+**
+**		gckKERNEL Kernel
+**			Pointer to an gckKERNEL object.
+**
+**      gctBOOL InUserSpace
+**          gcvTRUE to map the memory into the user space.
+**
+**		gctUINT32 Address
+**			Hardware specific memory address.
+**
+**	OUTPUT:
+**
+**		gctPOINTER * Logical
+**			Pointer to a variable that will hold the logical address of the
+**			specified memory address.
+*/
+gceSTATUS
+gckKERNEL_MapVideoMemory(
+	IN gckKERNEL Kernel,
+	IN gctBOOL InUserSpace,
+	IN gctUINT32 Address,
+	OUT gctPOINTER * Logical
+	)
+{
+    gckGALDEVICE device;
+    PLINUX_MDL mdl;
+	PLINUX_MDL_MAP mdlMap;
+    gcePOOL pool;
+    gctUINT32 offset, base;
+    gceSTATUS status;
+    gctPOINTER logical;
+
+    gcmkHEADER_ARG("Kernel=0x%p InUserSpace=%d Address=%08x",
+			   Kernel, InUserSpace, Address);
+
+    /* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Kernel, gcvOBJ_KERNEL);
+    gcmkVERIFY_ARGUMENT(Logical != NULL);
+
+    /* Extract the pointer to the gckGALDEVICE class. */
+    device = (gckGALDEVICE) Kernel->context;
+
+    /* Split the memory address into a pool type and offset. */
+    gcmkONERROR(
+	gckHARDWARE_SplitMemory(Kernel->hardware, Address, &pool, &offset));
+
+    /* Dispatch on pool. */
+    switch (pool)
+    {
+    case gcvPOOL_LOCAL_INTERNAL:
+	/* Internal memory. */
+	logical = device->internalLogical;
+	break;
+
+    case gcvPOOL_LOCAL_EXTERNAL:
+	/* External memory. */
+	logical = device->externalLogical;
+	break;
+
+    case gcvPOOL_SYSTEM:
+		/* System memory. */
+		if (device->contiguousMapped)
+		{
+			logical = device->contiguousBase;
+		}
+		else
+		{
+			mdl = (PLINUX_MDL) device->contiguousPhysical;
+
+			mdlMap = FindMdlMap(mdl, current->tgid);
+			gcmkASSERT(mdlMap);
+
+			logical = (gctPOINTER) mdlMap->vmaAddr;
+		}
+
+		gcmkVERIFY_OK(
+			gckHARDWARE_SplitMemory(Kernel->hardware,
+									device->contiguousVidMem->baseAddress,
+									&pool,
+									&base));
+
+		offset -= base;
+		break;
+
+    default:
+	/* Invalid memory pool. */
+	gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
+    }
+
+    /* Build logical address of specified address. */
+    *Logical = (gctPOINTER) ((gctUINT8_PTR) logical + offset);
+
+    /* Success. */
+    gcmkFOOTER_ARG("*Logical=0x%p", *Logical);
+    return gcvSTATUS_OK;
+
+OnError:
+	/* Retunn the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckKERNEL_Notify
+**
+**	This function iscalled by clients to notify the gckKERNRL object of an event.
+**
+**	INPUT:
+**
+**		gckKERNEL Kernel
+**			Pointer to an gckKERNEL object.
+**
+**		gceNOTIFY Notification
+**			Notification event.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckKERNEL_Notify(
+	IN gckKERNEL Kernel,
+	IN gceNOTIFY Notification,
+	IN gctBOOL Data
+	)
+{
+	gceSTATUS status;
+
+	gcmkHEADER_ARG("Kernel=0x%p Notification=%d Data=%d",
+				   Kernel, Notification, Data);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Kernel, gcvOBJ_KERNEL);
+
+	/* Dispatch on notifcation. */
+	switch (Notification)
+	{
+	case gcvNOTIFY_INTERRUPT:
+		/* Process the interrupt. */
+#if COMMAND_PROCESSOR_VERSION > 1
+		status = gckINTERRUPT_Notify(Kernel->interrupt, Data);
+#else
+		status = gckHARDWARE_Interrupt(Kernel->hardware, Data);
+#endif
+		break;
+
+	default:
+		status = gcvSTATUS_OK;
+		break;
+	}
+
+	/* Success. */
+	gcmkFOOTER();
+	return status;
+}
+
+gceSTATUS
+gckKERNEL_QuerySettings(
+	IN gckKERNEL Kernel,
+	OUT gcsKERNEL_SETTINGS * Settings
+	)
+{
+	gckGALDEVICE device;
+
+	gcmkHEADER_ARG("Kernel=0x%p", Kernel);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Kernel, gcvOBJ_KERNEL);
+	gcmkVERIFY_ARGUMENT(Settings != gcvNULL);
+
+	/* Extract the pointer to the gckGALDEVICE class. */
+    device = (gckGALDEVICE) Kernel->context;
+
+	/* Fill in signal. */
+	Settings->signal = device->signal;
+
+	/* Success. */
+	gcmkFOOTER_ARG("Settings->signal=%d", Settings->signal);
+	return gcvSTATUS_OK;
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/gc_hal_kernel_os.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/gc_hal_kernel_os.c
@@ -0,0 +1,5722 @@
+/****************************************************************************
+*
+*    Copyright (C) 2005 - 2010 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public License as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+#include "gc_hal_kernel_linux.h"
+
+#include <linux/pagemap.h>
+#include <linux/seq_file.h>
+#include <linux/mm.h>
+#include <linux/mman.h>
+#include <linux/sched.h>
+#include <asm/atomic.h>
+#include <stdarg.h>
+#ifdef NO_DMA_COHERENT
+#include <linux/dma-mapping.h>
+#endif /* NO_DMA_COHERENT */
+
+#if defined CONFIG_PXA_DVFM || defined CONFIG_CPU_MMP2
+#include <mach/dvfm.h>
+#include <mach/hardware.h>
+#include <linux/delay.h>
+#ifdef CONFIG_PXA_DVFM
+#include <mach/pxa3xx_dvfm.h>
+#endif
+#endif
+
+#if defined CONFIG_CPU_PXA910
+#if POWER_OFF_GC_WHEN_IDLE
+extern gckGALDEVICE galDevice;
+extern gceSTATUS _power_on_gc(gckGALDEVICE device);
+extern gceSTATUS _power_off_gc(gckGALDEVICE device, gctBOOL early_suspend);
+#endif
+#endif
+
+#if !USE_NEW_LINUX_SIGNAL
+#define USER_SIGNAL_TABLE_LEN_INIT 	64
+#endif
+
+#define _GC_OBJ_ZONE	gcvZONE_OS
+
+#define MEMORY_LOCK(os) \
+	gcmkVERIFY_OK(gckOS_AcquireMutex( \
+								(os), \
+								(os)->memoryLock, \
+								gcvINFINITE))
+
+#define MEMORY_UNLOCK(os) \
+	gcmkVERIFY_OK(gckOS_ReleaseMutex((os), (os)->memoryLock))
+
+#define MEMORY_MAP_LOCK(os) \
+	gcmkVERIFY_OK(gckOS_AcquireMutex( \
+								(os), \
+								(os)->memoryMapLock, \
+								gcvINFINITE))
+
+#define MEMORY_MAP_UNLOCK(os) \
+	gcmkVERIFY_OK(gckOS_ReleaseMutex((os), (os)->memoryMapLock))
+
+#define CLOCK_VERIFY(clock) \
+    if (IS_ERR(clock)) \
+    { \
+        int retval = PTR_ERR(clock); \
+        printk("clk get error: %d\t@LINE:%d\n", retval, __LINE__); \
+        return retval; \
+    }
+
+
+static void _Print(
+	char *Message,
+	va_list Arguments
+	)
+{
+	char buffer[1000];
+	int n;
+
+	/* Print message to buffer. */
+	n = vsnprintf(buffer, sizeof(buffer), Message, Arguments);
+	if ((n <= 0) || (buffer[n - 1] != '\n'))
+	{
+		/* Append new-line. */
+		strncat(buffer, "\n", sizeof(buffer));
+	}
+
+	/* Output to debugger. */
+	printk(buffer);
+}
+
+/******************************************************************************\
+********************************* Debug Macros *********************************
+\******************************************************************************/
+
+#define _DEBUGPRINT(Message) \
+{ \
+	va_list arguments; \
+	\
+	va_start(arguments, Message); \
+	_Print(Message, arguments); \
+	va_end(arguments); \
+}
+
+
+#if MRVL_ENABLE_API_LOG
+static gctUINT32 g_logFilter = _GFX_LOG_ALL_;
+#else
+static gctUINT32 g_logFilter = _GFX_LOG_ERROR_ | _GFX_LOG_WARNING_ | _GFX_LOG_NOTIFY_;
+#endif
+
+void gckOS_Log(IN unsigned int filter, IN char* msg,
+			...
+			)
+{
+    if(filter & g_logFilter)
+    {
+	    _DEBUGPRINT(msg);
+    }
+}
+
+void gckOS_SetLogFilter(IN unsigned int filter)
+{
+    g_logFilter = filter;
+}
+
+/********************************** Structures **********************************
+\******************************************************************************/
+
+struct _gckOS
+{
+	/* Object. */
+	gcsOBJECT					object;
+
+	/* Heap. */
+	gckHEAP						heap;
+
+	/* Pointer to device */
+	gckGALDEVICE 				device;
+
+	/* Memory management */
+	gctPOINTER					memoryLock;
+	gctPOINTER					memoryMapLock;
+
+	struct _LINUX_MDL   		*mdlHead;
+	struct _LINUX_MDL   		*mdlTail;
+
+	gctUINT32					baseAddress;
+
+#if !USE_NEW_LINUX_SIGNAL
+	/* Signal management. */
+	struct _signal {
+		/* Unused signal ID number. */
+		gctINT unused;
+
+		/* The pointer to the table. */
+		gctPOINTER * table;
+
+		/* Signal table length. */
+		gctINT tableLen;
+
+		/* The current unused signal ID. */
+		gctINT currentID;
+
+		/* Lock. */
+		gctPOINTER lock;
+	} signal;
+#endif
+};
+
+#if !USE_NEW_LINUX_SIGNAL
+typedef struct _gcsSIGNAL
+{
+	/* Kernel sync primitive. */
+	struct completion event;
+
+	/* Manual reset flag. */
+	gctBOOL manualReset;
+
+	/* The reference counter. */
+	atomic_t ref;
+
+	/* The owner of the signal. */
+	gctHANDLE process;
+}
+gcsSIGNAL;
+
+typedef struct _gcsSIGNAL *	gcsSIGNAL_PTR;
+#endif
+
+typedef struct _gcsPageInfo * gcsPageInfo_PTR;
+
+typedef struct _gcsPageInfo
+{
+	struct page **pages;
+	gctUINT32_PTR pageTable;
+}
+gcsPageInfo;
+
+static PLINUX_MDL
+_CreateMdl(
+	IN gctINT PID
+	)
+{
+	PLINUX_MDL	mdl;
+
+    mdl = (PLINUX_MDL)kmalloc(sizeof(struct _LINUX_MDL), GFP_ATOMIC);
+	if (mdl == gcvNULL) return gcvNULL;
+
+	mdl->pid	= PID;
+	mdl->maps	= gcvNULL;
+	mdl->prev	= gcvNULL;
+	mdl->next	= gcvNULL;
+
+	return mdl;
+}
+
+static gceSTATUS
+_DestroyMdlMap(
+	IN PLINUX_MDL Mdl,
+	IN PLINUX_MDL_MAP MdlMap
+	);
+
+static gceSTATUS
+_DestroyMdl(
+	IN PLINUX_MDL Mdl
+	)
+{
+	PLINUX_MDL_MAP mdlMap;
+
+	/* Verify the arguments. */
+	gcmkVERIFY_ARGUMENT(Mdl != gcvNULL);
+
+	mdlMap = Mdl->maps;
+
+	while (mdlMap != gcvNULL)
+	{
+		gcmkVERIFY_OK(_DestroyMdlMap(Mdl, mdlMap));
+
+		mdlMap = Mdl->maps;
+	}
+
+	kfree(Mdl);
+
+	return gcvSTATUS_OK;
+}
+
+static PLINUX_MDL_MAP
+_CreateMdlMap(
+	IN PLINUX_MDL Mdl,
+	IN gctINT PID
+	)
+{
+	PLINUX_MDL_MAP	mdlMap;
+
+    mdlMap = (PLINUX_MDL_MAP)kmalloc(sizeof(struct _LINUX_MDL_MAP), GFP_ATOMIC);
+	if (mdlMap == gcvNULL) return gcvNULL;
+
+	mdlMap->pid		= PID;
+	mdlMap->vmaAddr	= gcvNULL;
+	mdlMap->vma		= gcvNULL;
+
+	mdlMap->next	= Mdl->maps;
+	Mdl->maps		= mdlMap;
+
+	return mdlMap;
+}
+
+static gceSTATUS
+_DestroyMdlMap(
+	IN PLINUX_MDL Mdl,
+	IN PLINUX_MDL_MAP MdlMap
+	)
+{
+	PLINUX_MDL_MAP	prevMdlMap;
+
+	/* Verify the arguments. */
+	gcmkVERIFY_ARGUMENT(MdlMap != gcvNULL);
+	gcmkASSERT(Mdl->maps != gcvNULL);
+
+	if (Mdl->maps == MdlMap)
+	{
+		Mdl->maps = MdlMap->next;
+	}
+	else
+	{
+		prevMdlMap = Mdl->maps;
+
+		while (prevMdlMap->next != MdlMap)
+		{
+			prevMdlMap = prevMdlMap->next;
+
+			gcmkASSERT(prevMdlMap != gcvNULL);
+		}
+
+		prevMdlMap->next = MdlMap->next;
+	}
+
+	kfree(MdlMap);
+
+	return gcvSTATUS_OK;
+}
+
+extern PLINUX_MDL_MAP
+FindMdlMap(
+	IN PLINUX_MDL Mdl,
+	IN gctINT PID
+	)
+{
+	PLINUX_MDL_MAP	mdlMap;
+
+	mdlMap = Mdl->maps;
+
+	while (mdlMap != gcvNULL)
+	{
+		if (mdlMap->pid == PID) return mdlMap;
+
+		mdlMap = mdlMap->next;
+	}
+
+	return gcvNULL;
+}
+
+void
+FreeProcessMemoryOnExit(
+	IN gckOS Os,
+	IN gckKERNEL Kernel
+	)
+{
+	PLINUX_MDL      mdl, nextMdl;
+	PLINUX_MDL_MAP	mdlMap;
+
+	MEMORY_LOCK(Os);
+
+	mdl = Os->mdlHead;
+
+	while (mdl != gcvNULL)
+	{
+		if (mdl != Os->mdlTail)
+		{
+			nextMdl = mdl->next;
+		}
+		else
+		{
+			nextMdl = gcvNULL;
+		}
+
+		if (mdl->pagedMem)
+		{
+			mdlMap = mdl->maps;
+
+			if (mdlMap != gcvNULL
+				&& mdlMap->pid == current->tgid
+				&& mdlMap->next == gcvNULL)
+			{
+				MEMORY_UNLOCK(Os);
+
+				gcmkVERIFY_OK(gckOS_FreePagedMemory(Os, mdl, mdl->numPages * PAGE_SIZE));
+
+				MEMORY_LOCK(Os);
+
+				nextMdl = Os->mdlHead;
+			}
+		}
+
+		mdl = nextMdl;
+    }
+
+	MEMORY_UNLOCK(Os);
+}
+
+void
+PrintInfoOnExit(
+	IN gckOS Os,
+	IN gckKERNEL Kernel
+	)
+{
+	PLINUX_MDL      mdl, nextMdl;
+	PLINUX_MDL_MAP	mdlMap;
+
+	MEMORY_LOCK(Os);
+
+	mdl = Os->mdlHead;
+
+	while (mdl != gcvNULL)
+	{
+		if (mdl != Os->mdlTail)
+		{
+			nextMdl = mdl->next;
+		}
+		else
+		{
+			nextMdl = gcvNULL;
+		}
+
+		printk("Unfreed mdl: %p, pid: %d -> pagedMem: %s, addr: %p, dmaHandle: 0x%x, pages: %d",
+			mdl,
+			mdl->pid,
+			mdl->pagedMem? "true" : "false",
+			mdl->addr,
+			mdl->dmaHandle,
+			mdl->numPages);
+
+		mdlMap = mdl->maps;
+
+		while (mdlMap != gcvNULL)
+		{
+			printk("\tmap: %p, pid: %d -> vmaAddr: %p, vma: %p",
+					mdlMap,
+					mdlMap->pid,
+					mdlMap->vmaAddr,
+					mdlMap->vma);
+
+			mdlMap = mdlMap->next;
+		}
+
+		mdl = nextMdl;
+	}
+
+	MEMORY_UNLOCK(Os);
+}
+
+void
+OnProcessExit(
+	IN gckOS Os,
+	IN gckKERNEL Kernel
+	)
+{
+	/* PrintInfoOnExit(Os, Kernel); */
+
+#ifdef ANDROID
+	FreeProcessMemoryOnExit(Os, Kernel);
+#endif
+}
+
+/*******************************************************************************
+**
+**	gckOS_Construct
+**
+**	Construct a new gckOS object.
+**
+**	INPUT:
+**
+**		gctPOINTER Context
+**			Pointer to the gckGALDEVICE class.
+**
+**	OUTPUT:
+**
+**		gckOS * Os
+**			Pointer to a variable that will hold the pointer to the gckOS object.
+*/
+gceSTATUS gckOS_Construct(
+	IN gctPOINTER Context,
+	OUT gckOS * Os
+	)
+{
+    gckOS os;
+	gceSTATUS status;
+
+	/* Verify the arguments. */
+	gcmkVERIFY_ARGUMENT(Os != gcvNULL);
+
+	/* Allocate the gckOS object. */
+    os = (gckOS) kmalloc(gcmSIZEOF(struct _gckOS), GFP_ATOMIC);
+
+	if (os == gcvNULL)
+	{
+		/* Out of memory. */
+		return gcvSTATUS_OUT_OF_MEMORY;
+	}
+
+	/* Zero the memory. */
+	memset(os, 0, gcmSIZEOF(struct _gckOS));
+
+	/* Initialize the gckOS object. */
+	os->object.type = gcvOBJ_OS;
+
+	/* Set device device. */
+	os->device = Context;
+
+	/* IMPORTANT! No heap yet. */
+	os->heap = gcvNULL;
+
+	/* Initialize the memory lock. */
+	gcmkONERROR(
+		gckOS_CreateMutex(os, &os->memoryLock));
+
+	gcmkONERROR(
+		gckOS_CreateMutex(os, &os->memoryMapLock));
+
+	/* Create the gckHEAP object. */
+    gcmkONERROR(
+		gckHEAP_Construct(os, gcdHEAP_SIZE, &os->heap));
+
+	os->mdlHead = os->mdlTail = gcvNULL;
+
+	/* Find the base address of the physical memory. */
+	os->baseAddress = os->device->baseAddress;
+
+	gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_OS,
+				  "Physical base address set to 0x%08X.",
+				  os->baseAddress);
+
+#if !USE_NEW_LINUX_SIGNAL
+	/*
+	 * Initialize the signal manager.
+	 * It creates the signals to be used in
+	 * the user space.
+	 */
+
+	/* Initialize mutex. */
+	gcmkONERROR(
+		gckOS_CreateMutex(os, &os->signal.lock));
+
+	/* Initialize the signal table. */
+	os->signal.table =
+		kmalloc(gcmSIZEOF(gctPOINTER) * USER_SIGNAL_TABLE_LEN_INIT, GFP_KERNEL);
+
+	if (os->signal.table == gcvNULL)
+	{
+		/* Out of memory. */
+		status = gcvSTATUS_OUT_OF_MEMORY;
+		goto OnError;
+	}
+
+	memset(os->signal.table,
+		   0,
+		   gcmSIZEOF(gctPOINTER) * USER_SIGNAL_TABLE_LEN_INIT);
+
+	/* Set the signal table length. */
+	os->signal.tableLen = USER_SIGNAL_TABLE_LEN_INIT;
+
+	/* The table is empty. */
+	os->signal.unused = os->signal.tableLen;
+
+	/* Initial signal ID. */
+	os->signal.currentID = 0;
+#endif
+
+	/* Return pointer to the gckOS object. */
+	*Os = os;
+
+	/* Success. */
+	return gcvSTATUS_OK;
+
+OnError:
+#if !USE_NEW_LINUX_SIGNAL
+	/* Roll back any allocation. */
+	if (os->signal.table != gcvNULL)
+	{
+		kfree(os->signal.table);
+	}
+
+	if (os->signal.lock != gcvNULL)
+	{
+		gcmkVERIFY_OK(
+			gckOS_DeleteMutex(os, os->signal.lock));
+	}
+#endif
+
+	if (os->heap != gcvNULL)
+	{
+		gcmkVERIFY_OK(
+			gckHEAP_Destroy(os->heap));
+	}
+
+	if (os->memoryMapLock != gcvNULL)
+	{
+		gcmkVERIFY_OK(
+			gckOS_DeleteMutex(os, os->memoryMapLock));
+	}
+
+	if (os->memoryLock != gcvNULL)
+	{
+		gcmkVERIFY_OK(
+			gckOS_DeleteMutex(os, os->memoryLock));
+	}
+
+	kfree(os);
+
+	/* Return the error. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckOS_Destroy
+**
+**	Destroy an gckOS object.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object that needs to be destroyed.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckOS_Destroy(
+	IN gckOS Os
+	)
+{
+	gckHEAP heap;
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+
+#if !USE_NEW_LINUX_SIGNAL
+	/*
+	 * Destroy the signal manager.
+	 */
+
+	/* Destroy the mutex. */
+	gcmkVERIFY_OK(
+		gckOS_DeleteMutex(Os, Os->signal.lock));
+
+	/* Free the signal table. */
+	kfree(Os->signal.table);
+#endif
+
+	if (Os->heap != NULL)
+	{
+		/* Mark gckHEAP as gone. */
+		heap     = Os->heap;
+		Os->heap = NULL;
+
+		/* Destroy the gckHEAP object. */
+		gcmkVERIFY_OK(
+			gckHEAP_Destroy(heap));
+	}
+
+	/* Destroy the memory lock. */
+	gcmkVERIFY_OK(
+		gckOS_DeleteMutex(Os, Os->memoryMapLock));
+
+	gcmkVERIFY_OK(
+		gckOS_DeleteMutex(Os, Os->memoryLock));
+
+	gcmkPRINT("$$FLUSH$$");
+
+	/* Mark the gckOS object as unknown. */
+	Os->object.type = gcvOBJ_UNKNOWN;
+
+	/* Free the gckOS object. */
+	kfree(Os);
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckOS_Allocate
+**
+**	Allocate memory.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctSIZE_T Bytes
+**			Number of bytes to allocate.
+**
+**	OUTPUT:
+**
+**		gctPOINTER * Memory
+**			Pointer to a variable that will hold the allocated memory location.
+*/
+gceSTATUS
+gckOS_Allocate(
+	IN gckOS Os,
+	IN gctSIZE_T Bytes,
+	OUT gctPOINTER * Memory
+	)
+{
+	gceSTATUS status;
+
+     /* gcmkHEADER_ARG("Os=0x%x Bytes=%lu", Os, Bytes); */
+
+    /* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+    gcmkVERIFY_ARGUMENT(Bytes > 0);
+    gcmkVERIFY_ARGUMENT(Memory != NULL);
+
+    /* Do we have a heap? */
+    if (Os->heap != NULL)
+    {
+        /* Allocate from the heap. */
+        gcmkONERROR(gckHEAP_Allocate(Os->heap, Bytes, Memory));
+    }
+    else
+    {
+	gcmkONERROR(gckOS_AllocateMemory(Os, Bytes, Memory));
+    }
+
+    /* Success. */
+     /* gcmkFOOTER_ARG("*memory=0x%x", *Memory); */
+    return gcvSTATUS_OK;
+
+OnError:
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckOS_Free
+**
+**	Free allocated memory.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctPOINTER Memory
+**			Pointer to memory allocation to free.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckOS_Free(
+	IN gckOS Os,
+	IN gctPOINTER Memory
+	)
+{
+	gceSTATUS status;
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmkVERIFY_ARGUMENT(Memory != NULL);
+
+	 /* gcmkHEADER_ARG("Os=0x%x Memory=0x%x", Os, memory); */
+
+	/* Do we have a heap? */
+	if (Os->heap != NULL)
+	{
+		/* Free from the heap. */
+		gcmkONERROR(gckHEAP_Free(Os->heap, Memory));
+	}
+	else
+	{
+		gcmkONERROR(gckOS_FreeMemory(Os, Memory));
+	}
+
+	/* Success. */
+	 /* gcmkFOOTER_NO(); */
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckOS_AllocateMemory
+**
+**	Allocate memory wrapper.
+**
+**	INPUT:
+**
+**		gctSIZE_T Bytes
+**			Number of bytes to allocate.
+**
+**	OUTPUT:
+**
+**		gctPOINTER * Memory
+**			Pointer to a variable that will hold the allocated memory location.
+*/
+gceSTATUS
+gckOS_AllocateMemory(
+	IN gckOS Os,
+	IN gctSIZE_T Bytes,
+	OUT gctPOINTER * Memory
+	)
+{
+    gctPOINTER memory;
+    gceSTATUS status;
+
+    gcmkHEADER_ARG("Os=0x%x Bytes=%lu", Os, Bytes);
+
+    /* Verify the arguments. */
+    gcmkVERIFY_ARGUMENT(Bytes > 0);
+    gcmkVERIFY_ARGUMENT(Memory != NULL);
+
+    memory = (gctPOINTER) kmalloc(Bytes, GFP_ATOMIC);
+
+    if (memory == NULL)
+    {
+        /* Out of memory. */
+        gcmkONERROR(gcvSTATUS_OUT_OF_MEMORY);
+    }
+
+    /* Return pointer to the memory allocation. */
+    *Memory = memory;
+
+    /* Success. */
+    gcmkFOOTER_ARG("*Memory=0x%p", *Memory);
+    return gcvSTATUS_OK;
+
+OnError:
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckOS_FreeMemory
+**
+**	Free allocated memory wrapper.
+**
+**	INPUT:
+**
+**		gctPOINTER Memory
+**			Pointer to memory allocation to free.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckOS_FreeMemory(
+	IN gckOS Os,
+	IN gctPOINTER Memory
+	)
+{
+	gcmkHEADER_ARG("Memory=0x%p", Memory);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_ARGUMENT(Memory != NULL);
+
+	/* Free the memory from the OS pool. */
+	kfree(Memory);
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckOS_MapMemory
+**
+**	Map physical memory into the current process.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctPHYS_ADDR Physical
+**			Start of physical address memory.
+**
+**		gctSIZE_T Bytes
+**			Number of bytes to map.
+**
+**	OUTPUT:
+**
+**		gctPOINTER * Memory
+**			Pointer to a variable that will hold the logical address of the
+**			mapped memory.
+*/
+gceSTATUS gckOS_MapMemory(
+	IN gckOS Os,
+	IN gctPHYS_ADDR Physical,
+	IN gctSIZE_T Bytes,
+	OUT gctPOINTER * Logical
+	)
+{
+	PLINUX_MDL_MAP	mdlMap;
+    PLINUX_MDL		mdl = (PLINUX_MDL)Physical;
+
+	/* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+    gcmkVERIFY_ARGUMENT(Physical != 0);
+    gcmkVERIFY_ARGUMENT(Bytes > 0);
+    gcmkVERIFY_ARGUMENT(Logical != NULL);
+
+	MEMORY_LOCK(Os);
+
+	mdlMap = FindMdlMap(mdl, current->tgid);
+
+	if (mdlMap == gcvNULL)
+	{
+		mdlMap = _CreateMdlMap(mdl, current->tgid);
+
+		if (mdlMap == gcvNULL)
+		{
+			MEMORY_UNLOCK(Os);
+
+			return gcvSTATUS_OUT_OF_MEMORY;
+		}
+	}
+
+	if (mdlMap->vmaAddr == gcvNULL)
+	{
+		down_write(&current->mm->mmap_sem);
+
+		mdlMap->vmaAddr = (char *)do_mmap_pgoff(NULL,
+					0L,
+					mdl->numPages * PAGE_SIZE,
+					PROT_READ | PROT_WRITE,
+					MAP_SHARED,
+					0);
+
+		if (mdlMap->vmaAddr == gcvNULL)
+		{
+			gcmkTRACE_ZONE(gcvLEVEL_ERROR,
+				gcvZONE_OS,
+				"gckOS_MapMemory: do_mmap_pgoff error");
+
+			gcmkTRACE_ZONE(gcvLEVEL_ERROR,
+				gcvZONE_OS,
+				"[gckOS_MapMemory] mdl->numPages: %d",
+				"[gckOS_MapMemory] mdl->vmaAddr: 0x%x",
+				mdl->numPages,
+				mdlMap->vmaAddr
+				);
+
+			up_write(&current->mm->mmap_sem);
+
+			MEMORY_UNLOCK(Os);
+
+			return gcvSTATUS_OUT_OF_MEMORY;
+		}
+
+		mdlMap->vma = find_vma(current->mm, (unsigned long)mdlMap->vmaAddr);
+
+		if (!mdlMap->vma)
+		{
+			gcmkTRACE_ZONE(gcvLEVEL_ERROR,
+					gcvZONE_OS,
+					"gckOS_MapMemory: find_vma error.");
+
+			mdlMap->vmaAddr = gcvNULL;
+
+			up_write(&current->mm->mmap_sem);
+
+			MEMORY_UNLOCK(Os);
+
+			return gcvSTATUS_OUT_OF_RESOURCES;
+		}
+
+#ifndef NO_DMA_COHERENT
+		if (dma_mmap_coherent(NULL,
+					mdlMap->vma,
+					mdl->addr,
+					mdl->dmaHandle,
+					mdl->numPages * PAGE_SIZE) < 0)
+		{
+			up_write(&current->mm->mmap_sem);
+
+			gcmkTRACE_ZONE(gcvLEVEL_ERROR,
+					gcvZONE_OS,
+					"gckOS_MapMemory: dma_mmap_coherent error.");
+
+			mdlMap->vmaAddr = gcvNULL;
+
+			MEMORY_UNLOCK(Os);
+
+			return gcvSTATUS_OUT_OF_RESOURCES;
+		}
+#else
+		mdlMap->vma->vm_page_prot = pgprot_noncached(mdlMap->vma->vm_page_prot);
+		mdlMap->vma->vm_flags |= VM_IO | VM_DONTCOPY | VM_DONTEXPAND | VM_RESERVED;
+		mdlMap->vma->vm_pgoff = 0;
+
+		if (remap_pfn_range(mdlMap->vma,
+							mdlMap->vma->vm_start,
+							mdl->dmaHandle >> PAGE_SHIFT,
+			        mdl->numPages*PAGE_SIZE,
+			    mdlMap->vma->vm_page_prot) < 0)
+		{
+	    up_write(&current->mm->mmap_sem);
+
+			gcmkTRACE_ZONE(gcvLEVEL_ERROR,
+					gcvZONE_OS,
+					"gckOS_MapMemory: remap_pfn_range error.");
+
+			mdlMap->vmaAddr = gcvNULL;
+
+			MEMORY_UNLOCK(Os);
+
+			return gcvSTATUS_OUT_OF_RESOURCES;
+		}
+#endif
+
+		up_write(&current->mm->mmap_sem);
+	}
+
+	MEMORY_UNLOCK(Os);
+
+    *Logical = mdlMap->vmaAddr;
+
+	gcmkTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_OS,
+			"gckOS_MapMemory: User Mapped address for 0x%x is 0x%x pid->%d",
+			(gctUINT32)mdl->addr,
+				(gctUINT32)*Logical,
+				mdlMap->pid);
+
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckOS_UnmapMemory
+**
+**	Unmap physical memory out of the current process.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctPHYS_ADDR Physical
+**			Start of physical address memory.
+**
+**		gctSIZE_T Bytes
+**			Number of bytes to unmap.
+**
+**		gctPOINTER Memory
+**			Pointer to a previously mapped memory region.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gckOS_UnmapMemory(
+	IN gckOS Os,
+	IN gctPHYS_ADDR Physical,
+	IN gctSIZE_T Bytes,
+	IN gctPOINTER Logical
+	)
+{
+	PLINUX_MDL_MAP			mdlMap;
+    PLINUX_MDL				mdl = (PLINUX_MDL)Physical;
+    struct task_struct *	task;
+
+    /* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmkVERIFY_ARGUMENT(Physical != 0);
+	gcmkVERIFY_ARGUMENT(Bytes > 0);
+	gcmkVERIFY_ARGUMENT(Logical != NULL);
+
+	gcmkTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+				"in gckOS_UnmapMemory");
+
+	gcmkTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+				"gckOS_UnmapMemory Will be unmapping 0x%x mdl->0x%x",
+				(gctUINT32)Logical,
+				(gctUINT32)mdl);
+
+	MEMORY_LOCK(Os);
+
+    if (Logical)
+    {
+		gcmkTRACE_ZONE(gcvLEVEL_VERBOSE,
+			gcvZONE_OS,
+			"[gckOS_UnmapMemory] Logical: 0x%x",
+			Logical
+			);
+
+		mdlMap = FindMdlMap(mdl, current->tgid);
+
+		if (mdlMap == gcvNULL || mdlMap->vmaAddr == gcvNULL)
+		{
+			MEMORY_UNLOCK(Os);
+
+			return gcvSTATUS_INVALID_ARGUMENT;
+		}
+
+        /* Get the current pointer for the task with stored pid. */
+        task = FIND_TASK_BY_PID(mdlMap->pid);
+
+        if (task != gcvNULL && task->mm != gcvNULL)
+		{
+			down_write(&task->mm->mmap_sem);
+			do_munmap(task->mm, (unsigned long)Logical, mdl->numPages*PAGE_SIZE);
+			up_write(&task->mm->mmap_sem);
+        }
+        else
+		{
+			gcmkTRACE_ZONE(gcvLEVEL_INFO,
+						gcvZONE_OS,
+				"Can't find the task with pid->%d. No unmapping",
+						mdlMap->pid);
+        }
+
+		gcmkVERIFY_OK(_DestroyMdlMap(mdl, mdlMap));
+    }
+
+	MEMORY_UNLOCK(Os);
+
+	/* Success. */
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckOS_AllocateNonPagedMemory
+**
+**	Allocate a number of pages from non-paged memory.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctBOOL InUserSpace
+**			gcvTRUE if the pages need to be mapped into user space.
+**
+**		gctSIZE_T * Bytes
+**			Pointer to a variable that holds the number of bytes to allocate.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * Bytes
+**			Pointer to a variable that hold the number of bytes allocated.
+**
+**		gctPHYS_ADDR * Physical
+**			Pointer to a variable that will hold the physical address of the
+**			allocation.
+**
+**		gctPOINTER * Logical
+**			Pointer to a variable that will hold the logical address of the
+**			allocation.
+*/
+gceSTATUS gckOS_AllocateNonPagedMemory(
+	IN gckOS Os,
+	IN gctBOOL InUserSpace,
+	IN OUT gctSIZE_T * Bytes,
+	OUT gctPHYS_ADDR * Physical,
+	OUT gctPOINTER * Logical
+	)
+{
+    gctSIZE_T		bytes;
+    gctINT			numPages;
+    PLINUX_MDL		mdl;
+	PLINUX_MDL_MAP	mdlMap = 0;
+	gctSTRING		addr;
+
+#ifdef NO_DMA_COHERENT
+	struct page *	page;
+    long			size, order;
+	gctPOINTER		vaddr;
+#endif
+
+    /* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+    gcmkVERIFY_ARGUMENT((Bytes != NULL) && (*Bytes > 0));
+    gcmkVERIFY_ARGUMENT(Physical != NULL);
+    gcmkVERIFY_ARGUMENT(Logical != NULL);
+
+	gcmkTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+				"in gckOS_AllocateNonPagedMemory");
+
+    /* Align number of bytes to page size. */
+    bytes = gcmALIGN(*Bytes, PAGE_SIZE);
+
+    /* Get total number of pages.. */
+    numPages = GetPageCount(bytes, 0);
+
+    /* Allocate mdl+vector structure */
+    mdl = _CreateMdl(current->tgid);
+
+	if (mdl == gcvNULL)
+	{
+		return gcvSTATUS_OUT_OF_MEMORY;
+	}
+
+	mdl->pagedMem = 0;
+    mdl->numPages = numPages;
+
+	MEMORY_LOCK(Os);
+
+#ifndef NO_DMA_COHERENT
+    addr = dma_alloc_coherent(NULL,
+				mdl->numPages * PAGE_SIZE,
+				&mdl->dmaHandle,
+				GFP_ATOMIC);
+#else
+	size	= mdl->numPages * PAGE_SIZE;
+	order	= get_order(size);
+	page	= alloc_pages(GFP_KERNEL | GFP_DMA, order);
+
+	if (page == gcvNULL)
+	{
+		MEMORY_UNLOCK(Os);
+
+		return gcvSTATUS_OUT_OF_MEMORY;
+	}
+
+	vaddr			= (gctPOINTER)page_address(page);
+	addr			= ioremap_nocache(virt_to_phys(vaddr), size);
+	mdl->dmaHandle	= virt_to_phys(vaddr);
+	mdl->kaddr		= vaddr;
+
+#if ENABLE_ARM_L2_CACHE
+	dma_cache_maint(vaddr, size, DMA_FROM_DEVICE);
+#endif
+
+	while (size > 0)
+	{
+		SetPageReserved(virt_to_page(vaddr));
+
+		vaddr	+= PAGE_SIZE;
+		size	-= PAGE_SIZE;
+	}
+#endif
+
+    if (addr == gcvNULL)
+	{
+		gcmkTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+			"galcore: Can't allocate memorry for size->0x%x",
+				(gctUINT32)bytes);
+
+        gcmkVERIFY_OK(_DestroyMdl(mdl));
+
+		MEMORY_UNLOCK(Os);
+
+        return gcvSTATUS_OUT_OF_MEMORY;
+    }
+
+	if ((Os->baseAddress & 0x80000000) != (mdl->dmaHandle & 0x80000000))
+	{
+		mdl->dmaHandle = (mdl->dmaHandle & ~0x80000000)
+					   | (Os->baseAddress & 0x80000000);
+	}
+
+    mdl->addr = addr;
+
+    /*
+	 * We will not do any mapping from here.
+	 * Mapping will happen from mmap method.
+	 * mdl structure will be used.
+	 */
+
+    /* Return allocated memory. */
+    *Bytes = bytes;
+    *Physical = (gctPHYS_ADDR) mdl;
+
+    if (InUserSpace)
+    {
+		mdlMap = _CreateMdlMap(mdl, current->tgid);
+
+		if (mdlMap == gcvNULL)
+		{
+			gcmkVERIFY_OK(_DestroyMdl(mdl));
+
+			MEMORY_UNLOCK(Os);
+
+			return gcvSTATUS_OUT_OF_MEMORY;
+		}
+
+        /* Only after mmap this will be valid. */
+
+        /* We need to map this to user space. */
+        down_write(&current->mm->mmap_sem);
+
+        mdlMap->vmaAddr = (gctSTRING)do_mmap_pgoff(gcvNULL,
+				0L,
+				mdl->numPages * PAGE_SIZE,
+				PROT_READ | PROT_WRITE,
+				MAP_SHARED,
+				0);
+
+        if (mdlMap->vmaAddr == gcvNULL)
+        {
+			gcmkTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+				"galcore: do_mmap_pgoff error");
+
+			up_write(&current->mm->mmap_sem);
+
+			gcmkVERIFY_OK(_DestroyMdlMap(mdl, mdlMap));
+			gcmkVERIFY_OK(_DestroyMdl(mdl));
+
+			MEMORY_UNLOCK(Os);
+
+			return gcvSTATUS_OUT_OF_MEMORY;
+        }
+
+        mdlMap->vma = find_vma(current->mm, (unsigned long)mdlMap->vmaAddr);
+
+		if (mdlMap->vma == gcvNULL)
+		{
+			gcmkTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+				"find_vma error");
+
+			up_write(&current->mm->mmap_sem);
+
+			gcmkVERIFY_OK(_DestroyMdlMap(mdl, mdlMap));
+			gcmkVERIFY_OK(_DestroyMdl(mdl));
+
+			MEMORY_UNLOCK(Os);
+
+			return gcvSTATUS_OUT_OF_RESOURCES;
+		}
+
+#ifndef NO_DMA_COHERENT
+        if (dma_mmap_coherent(NULL,
+				mdlMap->vma,
+				mdl->addr,
+				mdl->dmaHandle,
+				mdl->numPages * PAGE_SIZE) < 0)
+		{
+			up_write(&current->mm->mmap_sem);
+
+			gcmkTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+				"dma_mmap_coherent error");
+
+			gcmkVERIFY_OK(_DestroyMdlMap(mdl, mdlMap));
+			gcmkVERIFY_OK(_DestroyMdl(mdl));
+
+			MEMORY_UNLOCK(Os);
+
+			return gcvSTATUS_OUT_OF_RESOURCES;
+		}
+#else
+		mdlMap->vma->vm_page_prot = pgprot_noncached(mdlMap->vma->vm_page_prot);
+		mdlMap->vma->vm_flags |= VM_IO | VM_DONTCOPY | VM_DONTEXPAND | VM_RESERVED;
+		mdlMap->vma->vm_pgoff = 0;
+
+		if (remap_pfn_range(mdlMap->vma,
+							mdlMap->vma->vm_start,
+							mdl->dmaHandle >> PAGE_SHIFT,
+							mdl->numPages * PAGE_SIZE,
+							mdlMap->vma->vm_page_prot))
+		{
+			up_write(&current->mm->mmap_sem);
+
+			gcmkTRACE_ZONE(gcvLEVEL_INFO,
+					gcvZONE_OS,
+					"remap_pfn_range error");
+
+			gcmkVERIFY_OK(_DestroyMdlMap(mdl, mdlMap));
+			gcmkVERIFY_OK(_DestroyMdl(mdl));
+
+			MEMORY_UNLOCK(Os);
+
+			return gcvSTATUS_OUT_OF_RESOURCES;
+		}
+#endif /* NO_DMA_COHERENT */
+
+        up_write(&current->mm->mmap_sem);
+
+        *Logical = mdlMap->vmaAddr;
+    }
+    else
+    {
+        *Logical = (gctPOINTER)mdl->addr;
+    }
+
+    /*
+	 * Add this to a global list.
+	 * Will be used by get physical address
+	 * and mapuser pointer functions.
+	 */
+
+    if (!Os->mdlHead)
+    {
+        /* Initialize the queue. */
+        Os->mdlHead = Os->mdlTail = mdl;
+    }
+    else
+    {
+        /* Add to the tail. */
+        mdl->prev = Os->mdlTail;
+        Os->mdlTail->next = mdl;
+        Os->mdlTail = mdl;
+    }
+
+	MEMORY_UNLOCK(Os);
+
+	gcmkTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+			"gckOS_AllocateNonPagedMemory: "
+				"Bytes->0x%x, Mdl->%p, Logical->0x%x dmaHandle->0x%x",
+			(gctUINT32)bytes,
+				mdl,
+				(gctUINT32)mdl->addr,
+				mdl->dmaHandle);
+
+	if (InUserSpace)
+	{
+		gcmkTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+				"vmaAddr->0x%x pid->%d",
+				(gctUINT32)mdlMap->vmaAddr,
+				mdlMap->pid);
+	}
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckOS_FreeNonPagedMemory
+**
+**	Free previously allocated and mapped pages from non-paged memory.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctSIZE_T Bytes
+**			Number of bytes allocated.
+**
+**		gctPHYS_ADDR Physical
+**			Physical address of the allocated memory.
+**
+**		gctPOINTER Logical
+**			Logical address of the allocated memory.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gckOS_FreeNonPagedMemory(
+	IN gckOS Os,
+	IN gctSIZE_T Bytes,
+	IN gctPHYS_ADDR Physical,
+	IN gctPOINTER Logical
+	)
+{
+    PLINUX_MDL				mdl;
+	PLINUX_MDL_MAP			mdlMap;
+    struct task_struct *	task;
+
+#ifdef NO_DMA_COHERENT
+	unsigned				size;
+	gctPOINTER				vaddr;
+#endif /* NO_DMA_COHERENT */
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmkVERIFY_ARGUMENT(Bytes > 0);
+	gcmkVERIFY_ARGUMENT(Physical != 0);
+	gcmkVERIFY_ARGUMENT(Logical != NULL);
+
+	gcmkTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+				"in gckOS_FreeNonPagedMemory");
+
+	/* Convert physical address into a pointer to a MDL. */
+    mdl = (PLINUX_MDL) Physical;
+
+	MEMORY_LOCK(Os);
+
+#ifndef NO_DMA_COHERENT
+    dma_free_coherent(gcvNULL,
+					mdl->numPages * PAGE_SIZE,
+					mdl->addr,
+					mdl->dmaHandle);
+#else
+	size	= mdl->numPages * PAGE_SIZE;
+	vaddr	= mdl->kaddr;
+
+	while (size > 0)
+	{
+		ClearPageReserved(virt_to_page(vaddr));
+
+		vaddr	+= PAGE_SIZE;
+		size	-= PAGE_SIZE;
+	}
+
+	free_pages((unsigned long)mdl->kaddr, get_order(mdl->numPages * PAGE_SIZE));
+
+	iounmap(mdl->addr);
+#endif /* NO_DMA_COHERENT */
+
+	mdlMap = mdl->maps;
+
+	while (mdlMap != gcvNULL)
+	{
+		if (mdlMap->vmaAddr != gcvNULL)
+		{
+			/* Get the current pointer for the task with stored pid. */
+			task = FIND_TASK_BY_PID(mdlMap->pid);
+
+			if (task != gcvNULL && task->mm != gcvNULL)
+			{
+				down_write(&task->mm->mmap_sem);
+
+				if (do_munmap(task->mm,
+							(unsigned long)mdlMap->vmaAddr,
+							mdl->numPages * PAGE_SIZE) < 0)
+				{
+					gcmkTRACE_ZONE(gcvLEVEL_INFO,
+								gcvZONE_OS,
+						"gckOS_FreeNonPagedMemory: "
+								"Unmap Failed ->Mdl->0x%x Logical->0x%x vmaAddr->0x%x",
+					(gctUINT32)mdl,
+								(gctUINT32)mdl->addr,
+								(gctUINT32)mdlMap->vmaAddr);
+				}
+
+				up_write(&task->mm->mmap_sem);
+			}
+
+			mdlMap->vmaAddr = gcvNULL;
+		}
+
+		mdlMap = mdlMap->next;
+	}
+
+    /* Remove the node from global list.. */
+    if (mdl == Os->mdlHead)
+    {
+        if ((Os->mdlHead = mdl->next) == gcvNULL)
+        {
+            Os->mdlTail = gcvNULL;
+        }
+    }
+    else
+    {
+        mdl->prev->next = mdl->next;
+        if (mdl == Os->mdlTail)
+        {
+            Os->mdlTail = mdl->prev;
+        }
+        else
+        {
+            mdl->next->prev = mdl->prev;
+        }
+    }
+
+	MEMORY_UNLOCK(Os);
+
+	gcmkTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+			"gckOS_FreeNonPagedMemory: "
+				"Mdl->0x%x Logical->0x%x",
+			(gctUINT32)mdl,
+				(gctUINT32)mdl->addr);
+
+	gcmkVERIFY_OK(_DestroyMdl(mdl));
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckOS_ReadRegister
+**
+**	Read data from a register.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctUINT32 Address
+**			Address of register.
+**
+**	OUTPUT:
+**
+**		gctUINT32 * Data
+**			Pointer to a variable that receives the data read from the register.
+*/
+gceSTATUS gckOS_ReadRegister(
+	IN gckOS Os,
+	IN gctUINT32 Address,
+	OUT gctUINT32 * Data
+	)
+{
+    /* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+    gcmkVERIFY_ARGUMENT(Data != NULL);
+
+    *Data = readl((gctUINT8 *)Os->device->registerBase + Address);
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckOS_WriteRegister
+**
+**	Write data to a register.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctUINT32 Address
+**			Address of register.
+**
+**		gctUINT32 Data
+**			Data for register.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gckOS_WriteRegister(
+	IN gckOS Os,
+	IN gctUINT32 Address,
+	IN gctUINT32 Data
+	)
+{
+    writel(Data, (gctUINT8 *)Os->device->registerBase + Address);
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckOS_GetPageSize
+**
+**	Get the system's page size.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * PageSize
+**			Pointer to a variable that will receive the system's page size.
+*/
+gceSTATUS gckOS_GetPageSize(
+	IN gckOS Os,
+	OUT gctSIZE_T * PageSize
+	)
+{
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmkVERIFY_ARGUMENT(PageSize != NULL);
+
+	/* Return the page size. */
+	*PageSize = (gctSIZE_T) PAGE_SIZE;
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckOS_GetPhysicalAddressProcess
+**
+**	Get the physical system address of a corresponding virtual address for a
+**  given process.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctPOINTER Logical
+**			Logical address.
+**
+**      gctUINT ProcessID
+**          Procedd ID.
+**
+**	OUTPUT:
+**
+**		gctUINT32 * Address
+**			Poinetr to a variable that receives the	32-bit physical adress.
+*/
+gceSTATUS
+gckOS_GetPhysicalAddressProcess(
+	IN gckOS Os,
+	IN gctPOINTER Logical,
+	IN gctUINT ProcessID,
+	OUT gctUINT32 * Address
+	)
+{
+    return gckOS_GetPhysicalAddress(Os, Logical, Address);
+}
+
+/*******************************************************************************
+**
+**	gckOS_GetPhysicalAddress
+**
+**	Get the physical system address of a corresponding virtual address.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctPOINTER Logical
+**			Logical address.
+**
+**	OUTPUT:
+**
+**		gctUINT32 * Address
+**			Poinetr to a variable that receives the	32-bit physical adress.
+*/
+gceSTATUS gckOS_GetPhysicalAddress(
+	IN gckOS Os,
+	IN gctPOINTER Logical,
+	OUT gctUINT32 * Address
+	)
+{
+    PLINUX_MDL		mdl;
+	PLINUX_MDL_MAP	mdlMap;
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+    gcmkVERIFY_ARGUMENT(Address != gcvNULL);
+
+    /*
+	 * Try to search the address in our list.
+     * This could be an mmaped memory.
+	  * Search in our list.
+	  */
+
+	MEMORY_LOCK(Os);
+
+    mdl = Os->mdlHead;
+
+    while (mdl != gcvNULL)
+    {
+        /* Check for the logical address match. */
+        if (mdl->addr
+			&& (gctUINT32)Logical >= (gctUINT32)mdl->addr
+			&& (gctUINT32)Logical < ((gctUINT32)mdl->addr + mdl->numPages*PAGE_SIZE))
+        {
+            if (mdl->dmaHandle)
+            {
+                /* The memory was from coherent area. */
+                *Address = (gctUINT32)mdl->dmaHandle
+							+ (gctUINT32)((gctUINT32)Logical - (gctUINT32)mdl->addr);
+            }
+            else if (mdl->pagedMem)
+            {
+				if (mdl->contiguous)
+				{
+					*Address = (gctUINT32)virt_to_phys(mdl->addr)
+								+ ((gctUINT32)Logical - (gctUINT32)mdl->addr);
+				}
+				else
+				{
+					*Address = page_to_phys(vmalloc_to_page((gctSTRING)mdl->addr
+								+ ((gctUINT32)Logical - (gctUINT32)mdl->addr)));
+				}
+            }
+            else
+            {
+                *Address = (gctUINT32)virt_to_phys(mdl->addr)
+							+ ((gctUINT32)Logical - (gctUINT32)mdl->addr);
+            }
+            break;
+        }
+
+		mdlMap = FindMdlMap(mdl, current->tgid);
+
+        /* Is the given address within that range. */
+        if (mdlMap != gcvNULL
+			&& mdlMap->vmaAddr != gcvNULL
+			&& Logical >= mdlMap->vmaAddr
+			&& Logical < (mdlMap->vmaAddr + mdl->numPages * PAGE_SIZE))
+        {
+            if (mdl->dmaHandle)
+            {
+                /* The memory was from coherent area. */
+                *Address = (gctUINT32)mdl->dmaHandle
+							+ (gctUINT32)((gctUINT32)Logical
+							- (gctUINT32)mdlMap->vmaAddr);
+            }
+            else if (mdl->pagedMem)
+            {
+				if (mdl->contiguous)
+				{
+					*Address = (gctUINT32)virt_to_phys(mdl->addr)
+								+ (gctUINT32)(Logical - mdlMap->vmaAddr);
+				}
+				else
+				{
+					*Address = page_to_phys(vmalloc_to_page((gctSTRING)mdl->addr
+								+ ((gctUINT32)Logical - (gctUINT32)mdlMap->vmaAddr)));
+				}
+            }
+            else
+            {
+                /* Return the kernel virtual pointer based on this. */
+                *Address = (gctUINT32)virt_to_phys(mdl->addr)
+							+ (gctUINT32)(Logical - mdlMap->vmaAddr);
+            }
+            break;
+        }
+
+        mdl = mdl->next;
+    }
+
+	/* Subtract base address to get a GPU physical address. */
+	gcmkASSERT(*Address >= Os->baseAddress);
+	*Address -= Os->baseAddress;
+
+	MEMORY_UNLOCK(Os);
+
+    if (mdl == gcvNULL)
+    {
+        return gcvSTATUS_INVALID_ARGUMENT;
+    }
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckOS_MapPhysical
+**
+**	Map a physical address into kernel space.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctUINT32 Physical
+**			Physical address of the memory to map.
+**
+**		gctSIZE_T Bytes
+**			Number of bytes to map.
+**
+**	OUTPUT:
+**
+**		gctPOINTER * Logical
+**			Pointer to a variable that receives the	base address of the mapped
+**			memory.
+*/
+gceSTATUS gckOS_MapPhysical(
+	IN gckOS Os,
+	IN gctUINT32 Physical,
+	IN gctUINT32 OriginalLogical,
+	IN gctSIZE_T Bytes,
+	OUT gctPOINTER * Logical
+	)
+{
+	gctPOINTER logical;
+    PLINUX_MDL mdl;
+	gctUINT32 physical;
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmkVERIFY_ARGUMENT(Bytes > 0);
+    gcmkVERIFY_ARGUMENT(Logical != gcvNULL);
+
+	MEMORY_LOCK(Os);
+
+	/* Compute true physical address (before subtraction of the baseAddress). */
+	physical = Physical + Os->baseAddress;
+
+    /* Go through our mapping to see if we know this physical address already. */
+    mdl = Os->mdlHead;
+
+    while (mdl != gcvNULL)
+    {
+        if (mdl->dmaHandle != 0)
+        {
+            if ((physical >= mdl->dmaHandle)
+			&&  (physical < mdl->dmaHandle + mdl->numPages * PAGE_SIZE)
+			)
+            {
+                *Logical = mdl->addr + (physical - mdl->dmaHandle);
+                break;
+            }
+        }
+
+        mdl = mdl->next;
+    }
+
+    if (mdl == gcvNULL)
+    {
+        /* Map memory as cached memory. */
+        request_mem_region(physical, Bytes, "MapRegion");
+        logical = (gctPOINTER) ioremap_nocache(physical, Bytes);
+
+	    if (logical == NULL)
+	    {
+			gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_OS,
+				  "gckOS_MapMemory: Failed to ioremap");
+
+			MEMORY_UNLOCK(Os);
+
+			/* Out of resources. */
+		    return gcvSTATUS_OUT_OF_RESOURCES;
+	    }
+
+	    /* Return pointer to mapped memory. */
+	    *Logical = logical;
+    }
+
+	MEMORY_UNLOCK(Os);
+
+	gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_OS,
+			  "gckOS_MapPhysical: "
+				  "Physical->0x%X Bytes->0x%X Logical->0x%X MappingFound->%d",
+				  (gctUINT32) Physical,
+				  (gctUINT32) Bytes,
+				  (gctUINT32) *Logical,
+				   mdl ? 1 : 0);
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckOS_UnmapPhysical
+**
+**	Unmap a previously mapped memory region from kernel memory.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctPOINTER Logical
+**			Pointer to the base address of the memory to unmap.
+**
+**		gctSIZE_T Bytes
+**			Number of bytes to unmap.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gckOS_UnmapPhysical(
+	IN gckOS Os,
+	IN gctPOINTER Logical,
+	IN gctSIZE_T Bytes
+	)
+{
+    PLINUX_MDL  mdl;
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmkVERIFY_ARGUMENT(Logical != NULL);
+	gcmkVERIFY_ARGUMENT(Bytes > 0);
+
+	MEMORY_LOCK(Os);
+
+    mdl = Os->mdlHead;
+
+    while (mdl != gcvNULL)
+    {
+        if (mdl->addr != gcvNULL)
+        {
+            if (Logical >= (gctPOINTER)mdl->addr
+					&& Logical < (gctPOINTER)((gctSTRING)mdl->addr + mdl->numPages * PAGE_SIZE))
+            {
+                break;
+            }
+        }
+
+        mdl = mdl->next;
+    }
+
+    if (mdl == gcvNULL)
+    {
+	    /* Unmap the memory. */
+	    iounmap(Logical);
+    }
+
+	MEMORY_UNLOCK(Os);
+
+	gcmkTRACE_ZONE(gcvLEVEL_INFO,
+					gcvZONE_OS,
+				"gckOS_UnmapPhysical: "
+					"Logical->0x%x Bytes->0x%x MappingFound(?)->%d",
+				(gctUINT32)Logical,
+					(gctUINT32)Bytes,
+					mdl ? 1 : 0);
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckOS_CreateMutex
+**
+**	Create a new mutex.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**	OUTPUT:
+**
+**		gctPOINTER * Mutex
+**			Pointer to a variable that will hold a pointer to the mutex.
+*/
+gceSTATUS gckOS_CreateMutex(
+	IN gckOS Os,
+	OUT gctPOINTER * Mutex
+	)
+{
+	/* Validate the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmkVERIFY_ARGUMENT(Mutex != NULL);
+
+	/* Allocate a FAST_MUTEX structure. */
+	*Mutex = (gctPOINTER)kmalloc(sizeof(struct semaphore), GFP_KERNEL);
+
+	if (*Mutex == gcvNULL)
+	{
+		return gcvSTATUS_OUT_OF_MEMORY;
+	}
+
+    /* Initialize the semaphore.. Come up in unlocked state. */
+    init_MUTEX(*Mutex);
+
+	/* Return status. */
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckOS_DeleteMutex
+**
+**	Delete a mutex.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctPOINTER Mutex
+**			Pointer to the mute to be deleted.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gckOS_DeleteMutex(
+	IN gckOS Os,
+	IN gctPOINTER Mutex
+	)
+{
+	/* Validate the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmkVERIFY_ARGUMENT(Mutex != NULL);
+
+	/* Delete the fast mutex. */
+	kfree(Mutex);
+
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckOS_AcquireMutex
+**
+**	Acquire a mutex.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctPOINTER Mutex
+**			Pointer to the mutex to be acquired.
+**
+**		gctUINT32 Timeout
+**			Timeout value specified in milliseconds.
+**			Specify the value of gcvINFINITE to keep the thread suspended
+**			until the mutex has been acquired.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckOS_AcquireMutex(
+	IN gckOS Os,
+	IN gctPOINTER Mutex,
+	IN gctUINT32 Timeout
+	)
+{
+	/* Validate the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmkVERIFY_ARGUMENT(Mutex != NULL);
+
+	if (Timeout == gcvINFINITE)
+	{
+		down((struct semaphore *) Mutex);
+
+		/* Success. */
+		return gcvSTATUS_OK;
+	}
+
+	while (Timeout-- > 0)
+	{
+		/* Try to acquire the fast mutex. */
+		if (!down_trylock((struct semaphore *) Mutex))
+		{
+			/* Success. */
+			return gcvSTATUS_OK;
+		}
+
+		/* Wait for 1 millisecond. */
+		gcmkVERIFY_OK(gckOS_Delay(Os, 1));
+	}
+
+	/* Timeout. */
+	return gcvSTATUS_TIMEOUT;
+}
+
+/*******************************************************************************
+**
+**	gckOS_ReleaseMutex
+**
+**	Release an acquired mutex.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctPOINTER Mutex
+**			Pointer to the mutex to be released.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gckOS_ReleaseMutex(
+	IN gckOS Os,
+	IN gctPOINTER Mutex
+	)
+{
+	/* Validate the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmkVERIFY_ARGUMENT(Mutex != NULL);
+
+	/* Release the fast mutex. */
+	up((struct semaphore *) Mutex);
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckOS_AtomicExchange
+**
+**	Atomically exchange a pair of 32-bit values.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**      IN OUT gctINT32_PTR Target
+**          Pointer to the 32-bit value to exchange.
+**
+**		IN gctINT32 NewValue
+**			Specifies a new value for the 32-bit value pointed to by Target.
+**
+**      OUT gctINT32_PTR OldValue
+**          The old value of the 32-bit value pointed to by Target.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckOS_AtomicExchange(
+	IN gckOS Os,
+    IN OUT gctUINT32_PTR Target,
+	IN gctUINT32 NewValue,
+    OUT gctUINT32_PTR OldValue
+	)
+{
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+
+	/* Exchange the pair of 32-bit values. */
+	*OldValue = (gctUINT32) atomic_xchg((atomic_t *) Target, (int) NewValue);
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+
+/*******************************************************************************
+**
+**	gckOS_AtomicExchangePtr
+**
+**	Atomically exchange a pair of pointers.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**      IN OUT gctPOINTER * Target
+**          Pointer to the 32-bit value to exchange.
+**
+**		IN gctPOINTER NewValue
+**			Specifies a new value for the pointer pointed to by Target.
+**
+**      OUT gctPOINTER * OldValue
+**          The old value of the pointer pointed to by Target.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckOS_AtomicExchangePtr(
+	IN gckOS Os,
+    IN OUT gctPOINTER * Target,
+	IN gctPOINTER NewValue,
+    OUT gctPOINTER * OldValue
+	)
+{
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+
+	/* Exchange the pair of pointers. */
+	*OldValue = (gctPOINTER) atomic_xchg((atomic_t *) Target, (int) NewValue);
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+
+/*******************************************************************************
+**
+**	gckOS_Delay
+**
+**	Delay execution of the current thread for a number of milliseconds.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctUINT32 Delay
+**			Delay to sleep, specified in milliseconds.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gckOS_Delay(
+	IN gckOS Os,
+	IN gctUINT32 Delay
+	)
+{
+#ifdef CONFIG_PXA_DVFM
+    if(Os->device->enableMdelay)
+    {
+        mdelay(1);
+    }
+    else
+#endif
+    {
+	struct timeval now;
+	unsigned long ticks;
+
+	if (Delay == 0)
+	{
+		/* Smallest delay possible. */
+		ticks = 1;
+	}
+	else
+	{
+		/* Convert milliseconds into seconds and microseconds. */
+		now.tv_sec  = Delay / 1000;
+		now.tv_usec = (Delay % 1000) * 1000;
+
+		/* Convert Delay to jiffies. */
+		ticks = timeval_to_jiffies(&now);
+	}
+
+	/* Schedule timeout. */
+	schedule_timeout_interruptible(ticks);
+    }
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckOS_MemoryBarrier
+**
+**	Make sure the CPU has executed everything up to this point and the data got
+**	written to the specified pointer.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctPOINTER Address
+**			Address of memory that needs to be barriered.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gckOS_MemoryBarrier(
+	IN gckOS Os,
+	IN gctPOINTER Address
+	)
+{
+	/* Verify thearguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+
+	mb();
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckOS_AllocatePagedMemory
+**
+**	Allocate memory from the paged pool.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctSIZE_T Bytes
+**			Number of bytes to allocate.
+**
+**	OUTPUT:
+**
+**		gctPHYS_ADDR * Physical
+**			Pointer to a variable that receives the physical address of the
+**			memory allocation.
+*/
+gceSTATUS
+gckOS_AllocatePagedMemory(
+	IN gckOS Os,
+	IN gctSIZE_T Bytes,
+	OUT gctPHYS_ADDR * Physical
+	)
+{
+	return gckOS_AllocatePagedMemoryEx(Os, gcvFALSE, Bytes, Physical);
+}
+
+/*******************************************************************************
+**
+**	gckOS_AllocatePagedMemoryEx
+**
+**	Allocate memory from the paged pool.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctBOOL Contiguous
+**			Need contiguous memory or not.
+**
+**		gctSIZE_T Bytes
+**			Number of bytes to allocate.
+**
+**	OUTPUT:
+**
+**		gctPHYS_ADDR * Physical
+**			Pointer to a variable that receives	the	physical address of the
+**			memory allocation.
+*/
+gceSTATUS gckOS_AllocatePagedMemoryEx(
+	IN gckOS Os,
+	IN gctBOOL Contiguous,
+	IN gctSIZE_T Bytes,
+	OUT gctPHYS_ADDR * Physical
+	)
+{
+    gctINT		numPages;
+    gctINT		i;
+    PLINUX_MDL  mdl;
+    gctSTRING	addr;
+    gctSIZE_T   bytes;
+
+    /* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+    gcmkVERIFY_ARGUMENT(Bytes > 0);
+    gcmkVERIFY_ARGUMENT(Physical != NULL);
+
+	gcmkTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+				"in gckOS_AllocatePagedMemoryEx");
+
+    bytes = gcmALIGN(Bytes, PAGE_SIZE);
+
+    numPages = GetPageCount(bytes, 0);
+
+	MEMORY_LOCK(Os);
+
+	/* Bugbug: for some specific linux systems, vmalloc can't work correctly. Disable the non-contiguous support by default */
+	Contiguous = gcvTRUE;
+
+	if (Contiguous)
+	{
+		addr = (char *)__get_free_pages(GFP_ATOMIC | GFP_DMA, GetOrder(numPages));
+	}
+	else
+	{
+	    addr = vmalloc(bytes);
+	}
+
+    if (!addr)
+    {
+		gcmkTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+			"gckOS_AllocatePagedMemoryEx: "
+				"Can't allocate memorry for size->0x%x",
+				(gctUINT32)bytes);
+
+		MEMORY_UNLOCK(Os);
+
+        return gcvSTATUS_OUT_OF_MEMORY;
+    }
+
+    mdl = _CreateMdl(current->tgid);
+
+	if (mdl == gcvNULL)
+	{
+		MEMORY_UNLOCK(Os);
+
+		return gcvSTATUS_OUT_OF_MEMORY;
+	}
+
+	mdl->dmaHandle	= 0;
+    mdl->addr		= addr;
+    mdl->numPages	= numPages;
+    mdl->pagedMem	= 1;
+	mdl->contiguous = Contiguous;
+
+	for (i = 0; i < mdl->numPages; i++)
+    {
+		if (mdl->contiguous)
+		{
+			SetPageReserved(virt_to_page((void *)(((unsigned long)addr) + i * PAGE_SIZE)));
+		}
+		else
+		{
+			SetPageReserved(vmalloc_to_page((void *)(((unsigned long)addr) + i * PAGE_SIZE)));
+		}
+    }
+
+    /* Return physical address. */
+    *Physical = (gctPHYS_ADDR) mdl;
+
+    /*
+	 * Add this to a global list.
+	 * Will be used by get physical address
+	 * and mapuser pointer functions.
+	 */
+    if (!Os->mdlHead)
+    {
+        /* Initialize the queue. */
+        Os->mdlHead = Os->mdlTail = mdl;
+    }
+    else
+    {
+        /* Add to tail. */
+        mdl->prev			= Os->mdlTail;
+        Os->mdlTail->next	= mdl;
+        Os->mdlTail			= mdl;
+    }
+
+	MEMORY_UNLOCK(Os);
+
+	gcmkTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+			"gckOS_AllocatePagedMemoryEx: "
+				"Bytes->0x%x, Mdl->%p, Logical->%p",
+			(gctUINT32)bytes,
+				mdl,
+				mdl->addr);
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckOS_FreePagedMemory
+**
+**	Free memory allocated from the paged pool.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctPHYS_ADDR Physical
+**			Physical address of the allocation.
+**
+**		gctSIZE_T Bytes
+**			Number of bytes of the allocation.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gckOS_FreePagedMemory(
+	IN gckOS Os,
+	IN gctPHYS_ADDR Physical,
+	IN gctSIZE_T Bytes
+	)
+{
+    PLINUX_MDL  mdl = (PLINUX_MDL)Physical;
+    gctSTRING	addr;
+    gctINT		i;
+
+    /* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+    gcmkVERIFY_ARGUMENT(Physical != NULL);
+
+	gcmkTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+				"in gckOS_FreePagedMemory");
+
+    addr = mdl->addr;
+
+	MEMORY_LOCK(Os);
+
+    for (i = 0; i < mdl->numPages; i++)
+	{
+		if (mdl->contiguous)
+		{
+	        ClearPageReserved(virt_to_page((gctPOINTER)(((unsigned long)addr) + i * PAGE_SIZE)));
+		}
+		else
+		{
+			ClearPageReserved(vmalloc_to_page((gctPOINTER)(((unsigned long)addr) + i * PAGE_SIZE)));
+		}
+    }
+
+	if (mdl->contiguous)
+	{
+		free_pages((unsigned long)mdl->addr, GetOrder(mdl->numPages));
+	}
+	else
+	{
+		vfree(mdl->addr);
+	}
+
+    /* Remove the node from global list. */
+    if (mdl == Os->mdlHead)
+    {
+        if ((Os->mdlHead = mdl->next) == gcvNULL)
+        {
+            Os->mdlTail = gcvNULL;
+        }
+    }
+    else
+    {
+        mdl->prev->next = mdl->next;
+
+        if (mdl == Os->mdlTail)
+        {
+            Os->mdlTail = mdl->prev;
+        }
+        else
+        {
+            mdl->next->prev = mdl->prev;
+        }
+    }
+
+	MEMORY_UNLOCK(Os);
+
+    /* Free the structure... */
+    gcmkVERIFY_OK(_DestroyMdl(mdl));
+
+	gcmkTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+			"gckOS_FreePagedMemory: Bytes->0x%x, Mdl->0x%x",
+				(gctUINT32)Bytes,
+				(gctUINT32)mdl);
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckOS_LockPages
+**
+**	Lock memory allocated from the paged pool.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctPHYS_ADDR Physical
+**			Physical address of the allocation.
+**
+**		gctSIZE_T Bytes
+**			Number of bytes of the allocation.
+**
+**	OUTPUT:
+**
+**		gctPOINTER * Logical
+**			Pointer to a variable that receives the	address of the mapped
+**			memory.
+**
+**		gctSIZE_T * PageCount
+**			Pointer to a variable that receives the	number of pages required for
+**			the page table according to the GPU page size.
+*/
+gceSTATUS gckOS_LockPages(
+	IN gckOS Os,
+	IN gctPHYS_ADDR Physical,
+	IN gctSIZE_T Bytes,
+	OUT gctPOINTER * Logical,
+	OUT gctSIZE_T * PageCount
+	)
+{
+    PLINUX_MDL		mdl;
+	PLINUX_MDL_MAP	mdlMap;
+    gctSTRING		addr;
+    unsigned long	start;
+    unsigned long	pfn;
+    gctINT			i;
+
+    /* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+    gcmkVERIFY_ARGUMENT(Physical != NULL);
+    gcmkVERIFY_ARGUMENT(Logical != NULL);
+    gcmkVERIFY_ARGUMENT(PageCount != NULL);
+
+	gcmkTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+				"in gckOS_LockPages");
+
+    mdl = (PLINUX_MDL) Physical;
+
+	MEMORY_LOCK(Os);
+
+	mdlMap = FindMdlMap(mdl, current->tgid);
+
+	if (mdlMap == gcvNULL)
+	{
+		mdlMap = _CreateMdlMap(mdl, current->tgid);
+
+		if (mdlMap == gcvNULL)
+		{
+			MEMORY_UNLOCK(Os);
+
+			return gcvSTATUS_OUT_OF_MEMORY;
+		}
+	}
+
+	if (mdlMap->vmaAddr == gcvNULL)
+	{
+		down_write(&current->mm->mmap_sem);
+
+		mdlMap->vmaAddr = (gctSTRING)do_mmap_pgoff(NULL,
+						0L,
+						mdl->numPages * PAGE_SIZE,
+						PROT_READ | PROT_WRITE,
+						MAP_SHARED,
+						0);
+
+		up_write(&current->mm->mmap_sem);
+
+		gcmkTRACE_ZONE(gcvLEVEL_INFO,
+						gcvZONE_OS,
+						"gckOS_LockPages: "
+						"vmaAddr->0x%x for phys_addr->0x%x",
+						(gctUINT32)mdlMap->vmaAddr,
+						(gctUINT32)mdl);
+
+		if (mdlMap->vmaAddr == gcvNULL)
+		{
+			gcmkTRACE_ZONE(gcvLEVEL_INFO,
+						gcvZONE_OS,
+						"gckOS_LockPages: do_mmap_pgoff error");
+
+			MEMORY_UNLOCK(Os);
+
+			return gcvSTATUS_OUT_OF_MEMORY;
+		}
+
+		mdlMap->vma = find_vma(current->mm, (unsigned long)mdlMap->vmaAddr);
+
+		if (mdlMap->vma == gcvNULL)
+		{
+			gcmkTRACE_ZONE(gcvLEVEL_INFO,
+						gcvZONE_OS,
+						"find_vma error");
+
+			mdlMap->vmaAddr = gcvNULL;
+
+			MEMORY_UNLOCK(Os);
+
+			return gcvSTATUS_OUT_OF_RESOURCES;
+		}
+
+		mdlMap->vma->vm_flags |= VM_RESERVED;
+		/* Make this mapping non-cached. */
+		mdlMap->vma->vm_page_prot = pgprot_noncached(mdlMap->vma->vm_page_prot);
+
+		addr = mdl->addr;
+
+		/* Now map all the vmalloc pages to this user address. */
+		down_write(&current->mm->mmap_sem);
+
+		if (mdl->contiguous)
+		{
+			/* map kernel memory to user space.. */
+			if (remap_pfn_range(mdlMap->vma,
+								mdlMap->vma->vm_start,
+								virt_to_phys((gctPOINTER)mdl->addr) >> PAGE_SHIFT,
+								mdlMap->vma->vm_end - mdlMap->vma->vm_start,
+								mdlMap->vma->vm_page_prot) < 0)
+			{
+				up_write(&current->mm->mmap_sem);
+
+				gcmkTRACE_ZONE(gcvLEVEL_INFO,
+							gcvZONE_OS,
+						"gckOS_LockPages: unable to mmap ret");
+
+				mdlMap->vmaAddr = gcvNULL;
+
+				MEMORY_UNLOCK(Os);
+
+				return gcvSTATUS_OUT_OF_MEMORY;
+			}
+		}
+		else
+		{
+			start = mdlMap->vma->vm_start;
+
+			for (i = 0; i < mdl->numPages; i++)
+			{
+				pfn = vmalloc_to_pfn(addr);
+
+				if (remap_pfn_range(mdlMap->vma,
+									start,
+									pfn,
+									PAGE_SIZE,
+									mdlMap->vma->vm_page_prot) < 0)
+				{
+					up_write(&current->mm->mmap_sem);
+
+					gcmkTRACE_ZONE(gcvLEVEL_INFO,
+								gcvZONE_OS,
+						"gckOS_LockPages: "
+								"gctPHYS_ADDR->0x%x Logical->0x%x Unable to map addr->0x%x to start->0x%x",
+						(gctUINT32)Physical,
+								(gctUINT32)*Logical,
+								(gctUINT32)addr,
+								(gctUINT32)start);
+
+					mdlMap->vmaAddr = gcvNULL;
+
+					MEMORY_UNLOCK(Os);
+
+					return gcvSTATUS_OUT_OF_MEMORY;
+				}
+
+				start += PAGE_SIZE;
+				addr += PAGE_SIZE;
+			}
+		}
+
+		up_write(&current->mm->mmap_sem);
+	}
+
+    /* Convert pointer to MDL. */
+    *Logical = mdlMap->vmaAddr;
+
+	/* Return the page number according to the GPU page size. */
+	gcmkASSERT((PAGE_SIZE % 4096) == 0);
+	gcmkASSERT((PAGE_SIZE / 4096) >= 1);
+
+    *PageCount = mdl->numPages * (PAGE_SIZE / 4096);
+
+	MEMORY_UNLOCK(Os);
+
+	gcmkTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+			"gckOS_LockPages: "
+				"gctPHYS_ADDR->0x%x Bytes->0x%x Logical->0x%x pid->%d",
+			(gctUINT32)Physical,
+				(gctUINT32)Bytes,
+				(gctUINT32)*Logical,
+				mdlMap->pid);
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckOS_MapPages
+**
+**	Map paged memory into a page table.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctPHYS_ADDR Physical
+**			Physical address of the allocation.
+**
+**		gctSIZE_T PageCount
+**			Number of pages required for the physical address.
+**
+**		gctPOINTER PageTable
+**			Pointer to the page table to fill in.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckOS_MapPages(
+	IN gckOS Os,
+	IN gctPHYS_ADDR Physical,
+	IN gctSIZE_T PageCount,
+	IN gctPOINTER PageTable
+	)
+{
+    PLINUX_MDL  mdl;
+    gctUINT32*	table;
+    gctSTRING	addr;
+    gctINT		i = 0;
+
+    /* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+    gcmkVERIFY_ARGUMENT(Physical != NULL);
+    gcmkVERIFY_ARGUMENT(PageCount > 0);
+    gcmkVERIFY_ARGUMENT(PageTable != NULL);
+
+	gcmkTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+				"in gckOS_MapPages");
+
+    /* Convert pointer to MDL. */
+    mdl = (PLINUX_MDL)Physical;
+
+	gcmkTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+			"gckOS_MapPages: "
+				"Physical->0x%x PageCount->0x%x PagedMemory->?%d",
+			(gctUINT32)Physical,
+				(gctUINT32)PageCount,
+				mdl->pagedMem);
+
+	MEMORY_LOCK(Os);
+
+    table = (gctUINT32 *)PageTable;
+
+	 /* Get all the physical addresses and store them in the page table. */
+
+	addr = mdl->addr;
+
+    if (mdl->pagedMem)
+    {
+        /* Try to get the user pages so DMA can happen. */
+        while (PageCount-- > 0)
+        {
+			if (mdl->contiguous)
+			{
+				*table++ = virt_to_phys(addr);
+			}
+			else
+			{
+				*table++ = page_to_phys(vmalloc_to_page(addr));
+			}
+
+            addr += 4096;
+            i++;
+        }
+    }
+    else
+    {
+		gcmkTRACE_ZONE(gcvLEVEL_INFO,
+					gcvZONE_OS,
+				"We should not get this call for Non Paged Memory!");
+
+		while (PageCount-- > 0)
+        {
+            *table++ = (gctUINT32)virt_to_phys(addr);
+            addr += 4096;
+        }
+    }
+
+	MEMORY_UNLOCK(Os);
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckOS_UnlockPages
+**
+**	Unlock memory allocated from the paged pool.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctPHYS_ADDR Physical
+**			Physical address of the allocation.
+**
+**		gctSIZE_T Bytes
+**			Number of bytes of the allocation.
+**
+**		gctPOINTER Logical
+**			Address of the mapped memory.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gckOS_UnlockPages(
+	IN gckOS Os,
+	IN gctPHYS_ADDR Physical,
+	IN gctSIZE_T Bytes,
+	IN gctPOINTER Logical
+	)
+{
+	PLINUX_MDL_MAP			mdlMap;
+    PLINUX_MDL				mdl = (PLINUX_MDL)Physical;
+    struct task_struct *	task;
+
+    /* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+    gcmkVERIFY_ARGUMENT(Physical != NULL);
+    gcmkVERIFY_ARGUMENT(Logical != NULL);
+
+	/* Make sure there is already a mapping...*/
+    gcmkVERIFY_ARGUMENT(mdl->addr != NULL);
+
+	gcmkTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+				"in gckOS_UnlockPages");
+
+	MEMORY_LOCK(Os);
+
+	mdlMap = mdl->maps;
+
+	while (mdlMap != gcvNULL)
+	{
+		if (mdlMap->vmaAddr != gcvNULL)
+		{
+			/* Get the current pointer for the task with stored pid. */
+			task = FIND_TASK_BY_PID(mdlMap->pid);
+
+			if (task != gcvNULL && task->mm != gcvNULL)
+			{
+				down_write(&task->mm->mmap_sem);
+				do_munmap(task->mm, (unsigned long)Logical, mdl->numPages * PAGE_SIZE);
+				up_write(&task->mm->mmap_sem);
+			}
+
+			mdlMap->vmaAddr = gcvNULL;
+		}
+
+		mdlMap = mdlMap->next;
+	}
+
+	MEMORY_UNLOCK(Os);
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+
+/*******************************************************************************
+**
+**	gckOS_AllocateContiguous
+**
+**	Allocate memory from the contiguous pool.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+** 		gctBOOL InUserSpace
+**			gcvTRUE if the pages need to be mapped into user space.
+**
+**		gctSIZE_T * Bytes
+**			Pointer to the number of bytes to allocate.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * Bytes
+**			Pointer to a variable that receives	the	number of bytes allocated.
+**
+**		gctPHYS_ADDR * Physical
+**			Pointer to a variable that receives	the	physical address of the
+**			memory allocation.
+**
+**		gctPOINTER * Logical
+**			Pointer to a variable that receives	the	logical address of the
+**			memory allocation.
+*/
+gceSTATUS gckOS_AllocateContiguous(
+	IN gckOS Os,
+	IN gctBOOL InUserSpace,
+	IN OUT gctSIZE_T * Bytes,
+	OUT gctPHYS_ADDR * Physical,
+	OUT gctPOINTER * Logical
+	)
+{
+    /* Same as non-paged memory for now. */
+    return gckOS_AllocateNonPagedMemory(Os,
+				InUserSpace,
+				Bytes,
+				Physical,
+				Logical
+				);
+}
+
+/*******************************************************************************
+**
+**	gckOS_FreeContiguous
+**
+**	Free memory allocated from the contiguous pool.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctPHYS_ADDR Physical
+**			Physical address of the allocation.
+**
+**		gctPOINTER Logical
+**			Logicval address of the allocation.
+**
+**		gctSIZE_T Bytes
+**			Number of bytes of the allocation.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gckOS_FreeContiguous(
+	IN gckOS Os,
+	IN gctPHYS_ADDR Physical,
+	IN gctPOINTER Logical,
+	IN gctSIZE_T Bytes
+	)
+{
+    /* Same of non-paged memory for now. */
+    return gckOS_FreeNonPagedMemory(Os, Bytes, Physical, Logical);
+}
+
+/******************************************************************************
+**
+**	gckOS_GetKernelLogical
+**
+**	Return the kernel logical pointer that corresponods to the specified
+**	hardware address.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctUINT32 Address
+**			Hardware physical address.
+**
+**	OUTPUT:
+**
+**		gctPOINTER * KernelPointer
+**			Pointer to a variable receiving the pointer in kernel address space.
+*/
+gceSTATUS
+gckOS_GetKernelLogical(
+	IN gckOS Os,
+	IN gctUINT32 Address,
+	OUT gctPOINTER * KernelPointer
+	)
+{
+	gceSTATUS status;
+
+	do
+	{
+		gckGALDEVICE device;
+		gckKERNEL kernel;
+		gcePOOL pool;
+		gctUINT32 offset;
+		gctPOINTER logical;
+
+		/* Extract the pointer to the gckGALDEVICE class. */
+		device = (gckGALDEVICE) Os->device;
+
+		/* Kernel shortcut. */
+		kernel = device->kernel;
+
+		/* Split the memory address into a pool type and offset. */
+		gcmkERR_BREAK(gckHARDWARE_SplitMemory(
+			kernel->hardware, Address, &pool, &offset
+			));
+
+		/* Dispatch on pool. */
+		switch (pool)
+		{
+		case gcvPOOL_LOCAL_INTERNAL:
+			/* Internal memory. */
+			logical = device->internalLogical;
+			break;
+
+		case gcvPOOL_LOCAL_EXTERNAL:
+			/* External memory. */
+			logical = device->externalLogical;
+			break;
+
+		case gcvPOOL_SYSTEM:
+			/* System memory. */
+			logical = device->contiguousBase;
+			break;
+
+		default:
+			/* Invalid memory pool. */
+			return gcvSTATUS_INVALID_ARGUMENT;
+		}
+
+		/* Build logical address of specified address. */
+		* KernelPointer = ((gctUINT8_PTR) logical) + offset;
+
+		/* Success. */
+		return gcvSTATUS_OK;
+	}
+	while (gcvFALSE);
+
+	/* Return status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckOS_MapUserPointer
+**
+**	Map a pointer from the user process into the kernel address space.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctPOINTER Pointer
+**			Pointer in user process space that needs to be mapped.
+**
+**		gctSIZE_T Size
+**			Number of bytes that need to be mapped.
+**
+**	OUTPUT:
+**
+**		gctPOINTER * KernelPointer
+**			Pointer to a variable receiving the mapped pointer in kernel address
+**			space.
+*/
+gceSTATUS
+gckOS_MapUserPointer(
+	IN gckOS Os,
+	IN gctPOINTER Pointer,
+	IN gctSIZE_T Size,
+	OUT gctPOINTER * KernelPointer
+	)
+{
+#if NO_USER_DIRECT_ACCESS_FROM_KERNEL
+	gctPOINTER buf = gcvNULL;
+	gctUINT32 len;
+
+    /* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+    gcmkVERIFY_ARGUMENT(Pointer != gcvNULL);
+    gcmkVERIFY_ARGUMENT(Size > 0);
+    gcmkVERIFY_ARGUMENT(KernelPointer != gcvNULL);
+
+	buf = kmalloc(Size, GFP_KERNEL);
+	if (buf == gcvNULL)
+	{
+		gcmkTRACE_ZONE(gcvLEVEL_ERROR,
+			gcvZONE_OS,
+			"Failed to allocate memory at line %d in %s.",
+			__LINE__, __FILE__
+			);
+
+		return gcvSTATUS_OUT_OF_MEMORY;
+	}
+
+	len = copy_from_user(buf, Pointer, Size);
+	if (len != 0)
+	{
+		gcmkTRACE_ZONE(gcvLEVEL_ERROR,
+			gcvZONE_OS,
+			"Failed to copy data from user at line %d in %s.",
+			__LINE__, __FILE__
+			);
+
+		if (buf != gcvNULL)
+		{
+			kfree(buf);
+		}
+
+		return gcvSTATUS_GENERIC_IO;
+	}
+
+	*KernelPointer = buf;
+#else
+	*KernelPointer = Pointer;
+#endif /* NO_USER_DIRECT_ACCESS_FROM_KERNEL */
+
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckOS_UnmapUserPointer
+**
+**	Unmap a user process pointer from the kernel address space.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctPOINTER Pointer
+**			Pointer in user process space that needs to be unmapped.
+**
+**		gctSIZE_T Size
+**			Number of bytes that need to be unmapped.
+**
+**		gctPOINTER KernelPointer
+**			Pointer in kernel address space that needs to be unmapped.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckOS_UnmapUserPointer(
+	IN gckOS Os,
+	IN gctPOINTER Pointer,
+	IN gctSIZE_T Size,
+	IN gctPOINTER KernelPointer
+	)
+{
+#if NO_USER_DIRECT_ACCESS_FROM_KERNEL
+	gctUINT32 len;
+
+    /* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+    gcmkVERIFY_ARGUMENT(Pointer != gcvNULL);
+    gcmkVERIFY_ARGUMENT(Size > 0);
+    gcmkVERIFY_ARGUMENT(KernelPointer != gcvNULL);
+
+	len = copy_to_user(Pointer, KernelPointer, Size);
+
+	kfree(KernelPointer);
+
+	if (len != 0)
+	{
+		gcmkTRACE_ZONE(gcvLEVEL_ERROR,
+			gcvZONE_OS,
+			"Failed to copy data to user at line %d in %s.",
+			__LINE__, __FILE__
+			);
+		return gcvSTATUS_GENERIC_IO;
+	}
+#endif /* NO_USER_DIRECT_ACCESS_FROM_KERNEL */
+
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckOS_WriteMemory
+**
+**	Write data to a memory.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctPOINTER Address
+**			Address of the memory to write to.
+**
+**		gctUINT32 Data
+**			Data for register.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckOS_WriteMemory(
+	IN gckOS Os,
+	IN gctPOINTER Address,
+	IN gctUINT32 Data
+	)
+{
+	/* Verify the arguments. */
+	gcmkVERIFY_ARGUMENT(Address != NULL);
+
+	/* Write memory. */
+    writel(Data, (gctUINT8 *)Address);
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckOS_CreateSignal
+**
+**	Create a new signal.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctBOOL ManualReset
+**			If set to gcvTRUE, gckOS_Signal with gcvFALSE must be called in
+**			order to set the signal to nonsignaled state.
+**			If set to gcvFALSE, the signal will automatically be set to
+**			nonsignaled state by gckOS_WaitSignal function.
+**
+**	OUTPUT:
+**
+**		gctSIGNAL * Signal
+**			Pointer to a variable receiving the created gctSIGNAL.
+*/
+gceSTATUS
+gckOS_CreateSignal(
+	IN gckOS Os,
+	IN gctBOOL ManualReset,
+	OUT gctSIGNAL * Signal
+	)
+{
+#if USE_NEW_LINUX_SIGNAL
+	return gcvSTATUS_NOT_SUPPORTED;
+#else
+	gcsSIGNAL_PTR signal;
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmkVERIFY_ARGUMENT(Signal != NULL);
+
+	/* Create an event structure. */
+	signal = (gcsSIGNAL_PTR)kmalloc(sizeof(gcsSIGNAL), GFP_KERNEL);
+
+	if (signal == gcvNULL)
+	{
+		return gcvSTATUS_OUT_OF_MEMORY;
+	}
+
+	signal->manualReset = ManualReset;
+
+	init_completion(&signal->event);
+
+	atomic_set(&signal->ref, 1);
+
+	*Signal = (gctSIGNAL) signal;
+
+	return gcvSTATUS_OK;
+#endif
+}
+
+/*******************************************************************************
+**
+**	gckOS_DestroySignal
+**
+**	Destroy a signal.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctSIGNAL Signal
+**			Pointer to the gctSIGNAL.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckOS_DestroySignal(
+	IN gckOS Os,
+	IN gctSIGNAL Signal
+	)
+{
+#if USE_NEW_LINUX_SIGNAL
+	return gcvSTATUS_NOT_SUPPORTED;
+#else
+	gcsSIGNAL_PTR signal;
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmkVERIFY_ARGUMENT(Signal != NULL);
+
+	signal = (gcsSIGNAL_PTR) Signal;
+
+	if (atomic_dec_and_test(&signal->ref))
+	{
+		 /* Free the sgianl. */
+		kfree(Signal);
+	}
+
+	/* Success. */
+	return gcvSTATUS_OK;
+#endif
+}
+
+/*******************************************************************************
+**
+**	gckOS_Signal
+**
+**	Set a state of the specified signal.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctSIGNAL Signal
+**			Pointer to the gctSIGNAL.
+**
+**		gctBOOL State
+**			If gcvTRUE, the signal will be set to signaled state.
+**			If gcvFALSE, the signal will be set to nonsignaled state.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckOS_Signal(
+	IN gckOS Os,
+	IN gctSIGNAL Signal,
+	IN gctBOOL State
+	)
+{
+#if USE_NEW_LINUX_SIGNAL
+	return gcvSTATUS_NOT_SUPPORTED;
+#else
+	gcsSIGNAL_PTR signal;
+
+	gcmkHEADER_ARG("Os=0x%x Signal=0x%x State=%d", Os, Signal, State);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmkVERIFY_ARGUMENT(Signal != gcvNULL);
+
+	signal = (gcsSIGNAL_PTR) Signal;
+
+	/* Set the new state of the event. */
+	if (signal->manualReset)
+	{
+		if (State)
+		{
+			/* Set the event to a signaled state. */
+			complete_all(&signal->event);
+		}
+		else
+		{
+			/* Set the event to an unsignaled state. */
+			INIT_COMPLETION(signal->event);
+		}
+	}
+	else
+	{
+		if (State)
+		{
+			/* Set the event to a signaled state. */
+			complete(&signal->event);
+
+		}
+	}
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+#endif
+}
+
+#if USE_NEW_LINUX_SIGNAL
+/*******************************************************************************
+**
+**	gckOS_UserSignal
+**
+**	Set the specified signal which is owned by a process to signaled state.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctSIGNAL Signal
+**			Pointer to the gctSIGNAL.
+**
+**		gctHANDLE Process
+**			Handle of process owning the signal.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckOS_UserSignal(
+	IN gckOS Os,
+	IN gctSIGNAL Signal,
+	IN gctHANDLE Process
+	)
+{
+	gceSTATUS status;
+	gctINT result;
+	struct task_struct * task;
+	struct siginfo info;
+
+	task = FIND_TASK_BY_PID((pid_t) Process);
+
+	if (task != gcvNULL)
+	{
+		/* Fill in the siginfo structure. */
+		info.si_signo = Os->device->signal;
+		info.si_errno = 0;
+		info.si_code  = __SI_CODE(__SI_RT, SI_KERNEL);
+		info.si_ptr   = Signal;
+
+		/* Send the signal. */
+		if ((result = send_sig_info(Os->device->signal, &info, task)) < 0)
+		{
+			status = gcvSTATUS_GENERIC_IO;
+
+			gcmkTRACE(gcvLEVEL_ERROR,
+					 "%s(%d): send_sig_info failed.",
+					 __FUNCTION__, __LINE__);
+		}
+		else
+		{
+			/* Success. */
+			status = gcvSTATUS_OK;
+		}
+	}
+	else
+	{
+		status = gcvSTATUS_GENERIC_IO;
+
+		gcmkTRACE(gcvLEVEL_ERROR,
+				 "%s(%d): find_task_by_pid failed.",
+				 __FUNCTION__, __LINE__);
+	}
+
+	/* Return status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckOS_WaitSignal
+**
+**	Wait for a signal to become signaled.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctSIGNAL Signal
+**			Pointer to the gctSIGNAL.
+**
+**		gctUINT32 Wait
+**			Number of milliseconds to wait.
+**			Pass the value of gcvINFINITE for an infinite wait.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckOS_WaitSignal(
+	IN gckOS Os,
+	IN gctSIGNAL Signal,
+	IN gctUINT32 Wait
+	)
+{
+	return gcvSTATUS_NOT_SUPPORTED;
+}
+
+/*******************************************************************************
+**
+**	gckOS_MapSignal
+**
+**	Map a signal in to the current process space.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctSIGNAL Signal
+**			Pointer to tha gctSIGNAL to map.
+**
+**		gctHANDLE Process
+**			Handle of process owning the signal.
+**
+**	OUTPUT:
+**
+**		gctSIGNAL * MappedSignal
+**			Pointer to a variable receiving the mapped gctSIGNAL.
+*/
+gceSTATUS
+gckOS_MapSignal(
+	IN gckOS Os,
+	IN gctSIGNAL Signal,
+	IN gctHANDLE Process,
+	OUT gctSIGNAL * MappedSignal
+	)
+{
+	return gcvSTATUS_NOT_SUPPORTED;
+}
+
+#else
+
+/*******************************************************************************
+**
+**	gckOS_UserSignal
+**
+**	Set the specified signal which is owned by a process to signaled state.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctSIGNAL Signal
+**			Pointer to the gctSIGNAL.
+**
+**		gctHANDLE Process
+**			Handle of process owning the signal.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckOS_UserSignal(
+	IN gckOS Os,
+	IN gctSIGNAL Signal,
+	IN gctHANDLE Process
+	)
+{
+	gceSTATUS status;
+	gctSIGNAL signal;
+
+	gcmkHEADER_ARG("Os=0x%x Signal=%d Process=0x%x",
+				   Os, (gctINT) Signal, Process);
+
+	/* Map the signal into kernel space. */
+	gcmkONERROR(gckOS_MapSignal(Os, Signal, Process, &signal));
+
+	/* Signal. */
+	status = gckOS_Signal(Os, signal, gcvTRUE);
+	gcmkFOOTER();
+	return status;
+
+OnError:
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckOS_WaitSignal
+**
+**	Wait for a signal to become signaled.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctSIGNAL Signal
+**			Pointer to the gctSIGNAL.
+**
+**		gctUINT32 Wait
+**			Number of milliseconds to wait.
+**			Pass the value of gcvINFINITE for an infinite wait.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckOS_WaitSignal(
+	IN gckOS Os,
+	IN gctSIGNAL Signal,
+	IN gctUINT32 Wait
+	)
+{
+	gceSTATUS status;
+	gcsSIGNAL_PTR signal;
+	gctUINT timeout;
+	gctUINT rc;
+#if MRVL_SILENT_RESET
+	gctUINT wait;
+#endif
+
+	gcmkHEADER_ARG("Os=0x%x Signal=0x%x Wait=%u", Os, Signal, Wait);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmkVERIFY_ARGUMENT(Signal != gcvNULL);
+
+	signal = (gcsSIGNAL_PTR) Signal;
+
+#if MRVL_SILENT_RESET
+	wait = (Wait==gcvINFINITE)?1000:Wait;
+
+	/* Convert wait to milliseconds. */
+	timeout = wait*HZ/1000;
+#else
+	/* Convert wait to milliseconds. */
+	timeout = (Wait == gcvINFINITE) ? MAX_SCHEDULE_TIMEOUT : Wait*HZ/1000;
+#endif
+
+	/* Linux bug ? */
+	if (!signal->manualReset && timeout == 0) timeout = 1;
+
+	rc = wait_for_completion_interruptible_timeout(&signal->event, timeout);
+	status = ((rc == 0) && !signal->event.done) ? gcvSTATUS_TIMEOUT
+												: gcvSTATUS_OK;
+
+#if MRVL_SILENT_RESET
+    if (status==gcvSTATUS_TIMEOUT && Wait==gcvINFINITE)
+    {
+        gctBOOL isIdle;
+        gckHARDWARE_QueryIdle(Os->device->kernel->hardware, &isIdle);
+        /* printk("[galcore], timeout, isIdle=%d\n",isIdle); */
+
+        if(isIdle == gcvFALSE)
+        {
+            printk("[galcore] %s : %d timeout, need to reset\n", __func__, __LINE__);
+            status = gckOS_Reset(Os);
+        }
+    }
+#endif
+
+	/* Return status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckOS_MapSignal
+**
+**	Map a signal in to the current process space.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctSIGNAL Signal
+**			Pointer to tha gctSIGNAL to map.
+**
+**		gctHANDLE Process
+**			Handle of process owning the signal.
+**
+**	OUTPUT:
+**
+**		gctSIGNAL * MappedSignal
+**			Pointer to a variable receiving the mapped gctSIGNAL.
+*/
+gceSTATUS
+gckOS_MapSignal(
+	IN gckOS Os,
+	IN gctSIGNAL Signal,
+	IN gctHANDLE Process,
+	OUT gctSIGNAL * MappedSignal
+	)
+{
+	gctINT signalID;
+	gcsSIGNAL_PTR signal;
+	gceSTATUS status;
+	gctBOOL acquired = gcvFALSE;
+
+	gcmkHEADER_ARG("Os=0x%x Signal=0x%x Process=0x%x", Os, Signal, Process);
+
+	gcmkVERIFY_ARGUMENT(Signal != gcvNULL);
+	gcmkVERIFY_ARGUMENT(MappedSignal != gcvNULL);
+
+	signalID = (gctINT) Signal - 1;
+
+	gcmkONERROR(gckOS_AcquireMutex(Os, Os->signal.lock, gcvINFINITE));
+	acquired = gcvTRUE;
+
+	if (signalID >= 0 && signalID < Os->signal.tableLen)
+	{
+		/* It is a user space signal. */
+		signal = Os->signal.table[signalID];
+
+		if (signal == gcvNULL)
+		{
+			gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
+		}
+	}
+	else
+	{
+		/* It is a kernel space signal structure. */
+		signal = (gcsSIGNAL_PTR) Signal;
+	}
+
+	if (atomic_inc_return(&signal->ref) <= 1)
+	{
+		/* The previous value is 0, it has been deleted. */
+		gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
+	}
+
+	/* Release the mutex. */
+	gcmkONERROR(gckOS_ReleaseMutex(Os, Os->signal.lock));
+
+	*MappedSignal = (gctSIGNAL) signal;
+
+	/* Success. */
+	gcmkFOOTER_ARG("*MappedSignal=0x%x", *MappedSignal);
+	return gcvSTATUS_OK;
+
+OnError:
+	if (acquired)
+	{
+		/* Release the mutex. */
+		gcmkVERIFY_OK(gckOS_ReleaseMutex(Os, Os->signal.lock));
+	}
+
+	/* Return the staus. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckOS_CreateUserSignal
+**
+**	Create a new signal to be used in the user space.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctBOOL ManualReset
+**			If set to gcvTRUE, gckOS_Signal with gcvFALSE must be called in
+**			order to set the signal to nonsignaled state.
+**			If set to gcvFALSE, the signal will automatically be set to
+**			nonsignaled state by gckOS_WaitSignal function.
+**
+**	OUTPUT:
+**
+**		gctINT * SignalID
+**			Pointer to a variable receiving the created signal's ID.
+*/
+gceSTATUS
+gckOS_CreateUserSignal(
+	IN gckOS Os,
+	IN gctBOOL ManualReset,
+	OUT gctINT * SignalID
+	)
+{
+	gcsSIGNAL_PTR signal;
+	gctINT unused, currentID, tableLen;
+	gctPOINTER * table;
+	gctINT i;
+	gceSTATUS status;
+	gctBOOL acquired = gcvFALSE;
+
+	gcmkHEADER_ARG("Os=0x%0x ManualReset=%d", Os, ManualReset);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmkVERIFY_ARGUMENT(SignalID != gcvNULL);
+
+	/* Lock the table. */
+	gcmkONERROR(
+		gckOS_AcquireMutex(Os, Os->signal.lock, gcvINFINITE));
+
+	acquired = gcvTRUE;
+
+	if (Os->signal.unused < 1)
+	{
+		/* Enlarge the table. */
+		table = (gctPOINTER *) kmalloc(
+					sizeof(gctPOINTER) * (Os->signal.tableLen + USER_SIGNAL_TABLE_LEN_INIT),
+					GFP_KERNEL);
+
+		if (table == gcvNULL)
+		{
+			/* Out of memory. */
+			gcmkONERROR(gcvSTATUS_OUT_OF_MEMORY);
+		}
+
+		memset(table + Os->signal.tableLen, 0, sizeof(gctPOINTER) * USER_SIGNAL_TABLE_LEN_INIT);
+		memcpy(table, Os->signal.table, sizeof(gctPOINTER) * Os->signal.tableLen);
+
+		/* Release the old table. */
+		kfree(Os->signal.table);
+
+		/* Update the table. */
+		Os->signal.table = table;
+		Os->signal.currentID = Os->signal.tableLen;
+		Os->signal.tableLen += USER_SIGNAL_TABLE_LEN_INIT;
+		Os->signal.unused += USER_SIGNAL_TABLE_LEN_INIT;
+	}
+
+	table = Os->signal.table;
+	currentID = Os->signal.currentID;
+	tableLen = Os->signal.tableLen;
+	unused = Os->signal.unused;
+
+	/* Create a new signal. */
+	gcmkONERROR(
+		gckOS_CreateSignal(Os, ManualReset, (gctSIGNAL *) &signal));
+
+	/* Save the process ID. */
+	signal->process = (gctHANDLE) current->tgid;
+
+	table[currentID] = signal;
+
+	/* Plus 1 to avoid NULL claims. */
+	*SignalID = currentID + 1;
+
+	/* Update the currentID. */
+	if (--unused > 0)
+	{
+		for (i = 0; i < tableLen; i++)
+		{
+			if (++currentID >= tableLen)
+			{
+				/* Wrap to the begin. */
+				currentID = 0;
+			}
+
+			if (table[currentID] == gcvNULL)
+			{
+				break;
+			}
+		}
+	}
+
+	Os->signal.table = table;
+	Os->signal.currentID = currentID;
+	Os->signal.tableLen = tableLen;
+	Os->signal.unused = unused;
+
+	gcmkONERROR(
+		gckOS_ReleaseMutex(Os, Os->signal.lock));
+
+	gcmkFOOTER_ARG("*SignalID=%d", gcmOPT_VALUE(SignalID));
+	return gcvSTATUS_OK;
+
+OnError:
+	if (acquired)
+	{
+		/* Release the mutex. */
+		gcmkONERROR(
+			gckOS_ReleaseMutex(Os, Os->signal.lock));
+	}
+
+	/* Return the staus. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckOS_DestroyUserSignal
+**
+**	Destroy a signal to be used in the user space.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctINT SignalID
+**			The signal's ID.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckOS_DestroyUserSignal(
+	IN gckOS Os,
+	IN gctINT SignalID
+	)
+{
+	gceSTATUS status;
+	gcsSIGNAL_PTR signal;
+	gctBOOL acquired = gcvFALSE;
+
+	gcmkHEADER_ARG("Os=0x%x SignalID=%d", Os, SignalID);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+
+	gcmkONERROR(
+		gckOS_AcquireMutex(Os, Os->signal.lock, gcvINFINITE));
+
+	acquired = gcvTRUE;
+
+	if (SignalID < 1 || SignalID > Os->signal.tableLen)
+	{
+		gcmkTRACE_ZONE(gcvLEVEL_ERROR,
+			gcvZONE_OS,
+			"gckOS_DestroyUserSignal: invalid signal->%d.",
+			(gctINT) SignalID
+			);
+
+		gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
+	}
+
+	SignalID -= 1;
+
+	signal = Os->signal.table[SignalID];
+
+	if (signal == gcvNULL)
+	{
+		gcmkTRACE_ZONE(gcvLEVEL_ERROR,
+			gcvZONE_OS,
+			"gckOS_DestroyUserSignal: signal is NULL."
+			);
+
+		gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
+	}
+
+	/* Check to see if the process is the owner of the signal. */
+	if (signal->process != (gctHANDLE) current->tgid)
+	{
+		gcmkTRACE_ZONE(gcvLEVEL_ERROR,
+			gcvZONE_OS,
+			"gckOS_DestroyUserSignal: process id doesn't match. ",
+			"signal->process: %d, current->tgid: %d",
+			signal->process,
+			current->tgid);
+
+		gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
+	}
+
+	gcmkONERROR(
+		gckOS_DestroySignal(Os, signal));
+
+	/* Update the table. */
+	Os->signal.table[SignalID] = gcvNULL;
+	if (Os->signal.unused++ == 0)
+	{
+		Os->signal.currentID = SignalID;
+	}
+
+	gcmkVERIFY_OK(
+		gckOS_ReleaseMutex(Os, Os->signal.lock));
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+
+OnError:
+	if (acquired)
+	{
+		/* Release the mutex. */
+		gcmkONERROR(
+			gckOS_ReleaseMutex(Os, Os->signal.lock));
+	}
+
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckOS_WaitUserSignal
+**
+**	Wait for a signal used in the user mode to become signaled.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctINT SignalID
+**			Signal ID.
+**
+**		gctUINT32 Wait
+**			Number of milliseconds to wait.
+**			Pass the value of gcvINFINITE for an infinite wait.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckOS_WaitUserSignal(
+	IN gckOS Os,
+	IN gctINT SignalID,
+	IN gctUINT32 Wait
+	)
+{
+	gceSTATUS status;
+	gcsSIGNAL_PTR signal;
+	gctBOOL acquired = gcvFALSE;
+
+	gcmkHEADER_ARG("Os=0x%x SignalID=%d Wait=%u", Os, SignalID, Wait);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+
+	gcmkONERROR(gckOS_AcquireMutex(Os, Os->signal.lock, gcvINFINITE));
+	acquired = gcvTRUE;
+
+	if (SignalID < 1 || SignalID > Os->signal.tableLen)
+	{
+		gcmkTRACE_ZONE(gcvLEVEL_ERROR,
+			gcvZONE_OS,
+			"gckOS_WaitSignal: invalid signal.",
+			SignalID
+			);
+
+		gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
+	}
+
+	SignalID -= 1;
+
+	signal = Os->signal.table[SignalID];
+
+	gcmkONERROR(gckOS_ReleaseMutex(Os, Os->signal.lock));
+	acquired = gcvFALSE;
+
+	if (signal == gcvNULL)
+	{
+		gcmkTRACE_ZONE(gcvLEVEL_ERROR,
+			gcvZONE_OS,
+			"gckOS_WaitSignal: signal is NULL."
+			);
+
+		gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
+	}
+
+	if (signal->process != (gctHANDLE) current->tgid)
+	{
+		gcmkTRACE_ZONE(gcvLEVEL_ERROR,
+			gcvZONE_OS,
+			"gckOS_WaitUserSignal: process id doesn't match. "
+			"signal->process: %d, current->tgid: %d",
+			signal->process,
+			current->tgid);
+
+		gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
+	}
+
+    status = gckOS_WaitSignal(Os, signal, Wait);
+
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+
+OnError:
+	if (acquired)
+	{
+		/* Release the mutex. */
+		gcmkONERROR(
+			gckOS_ReleaseMutex(Os, Os->signal.lock));
+	}
+
+	/* Return the staus. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckOS_SignalUserSignal
+**
+**	Set a state of the specified signal to be used in the user space.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to an gckOS object.
+**
+**		gctINT SignalID
+**			SignalID.
+**
+**		gctBOOL State
+**			If gcvTRUE, the signal will be set to signaled state.
+**			If gcvFALSE, the signal will be set to nonsignaled state.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckOS_SignalUserSignal(
+	IN gckOS Os,
+	IN gctINT SignalID,
+	IN gctBOOL State
+	)
+{
+	gceSTATUS status;
+	gcsSIGNAL_PTR signal;
+	gctBOOL acquired = gcvFALSE;
+
+	gcmkHEADER_ARG("Os=0x%x SignalID=%d State=%d", Os, SignalID, State);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+
+	gcmkONERROR(gckOS_AcquireMutex(Os, Os->signal.lock, gcvINFINITE));
+	acquired = gcvTRUE;
+
+	if ((SignalID < 1)
+	||  (SignalID > Os->signal.tableLen)
+	)
+	{
+		gcmkTRACE_ZONE(gcvLEVEL_ERROR,  gcvZONE_OS,
+					   "gckOS_WaitSignal: invalid signal->%d.", SignalID);
+
+		gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
+	}
+
+	SignalID -= 1;
+
+	signal = Os->signal.table[SignalID];
+
+	gcmkONERROR(gckOS_ReleaseMutex(Os, Os->signal.lock));
+	acquired = gcvFALSE;
+
+	if (signal == gcvNULL)
+	{
+		gcmkTRACE_ZONE(gcvLEVEL_ERROR,
+			gcvZONE_OS,
+			"gckOS_WaitSignal: signal is NULL."
+			);
+
+		gcmkONERROR(gcvSTATUS_INVALID_REQUEST);
+	}
+
+	if (signal->process != (gctHANDLE) current->tgid)
+	{
+		gcmkTRACE_ZONE(gcvLEVEL_ERROR,
+			gcvZONE_OS,
+			"gckOS_DestroyUserSignal: process id doesn't match. ",
+			"signal->process: %d, current->tgid: %d",
+			signal->process,
+			current->tgid);
+
+		gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
+	}
+
+	status = gckOS_Signal(Os, signal, State);
+
+	/* Success. */
+	gcmkFOOTER();
+	return status;
+
+OnError:
+	if (acquired)
+	{
+		/* Release the mutex. */
+		gcmkONERROR(
+			gckOS_ReleaseMutex(Os, Os->signal.lock));
+	}
+
+	/* Return the staus. */
+	gcmkFOOTER();
+	return status;
+}
+
+gceSTATUS
+gckOS_CleanProcessSignal(
+	gckOS Os,
+	gctHANDLE Process
+	)
+{
+	gctINT signal;
+
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+
+	gcmkVERIFY_OK(gckOS_AcquireMutex(Os,
+		Os->signal.lock,
+		gcvINFINITE
+		));
+
+	if (Os->signal.unused == Os->signal.tableLen)
+	{
+		gcmkVERIFY_OK(gckOS_ReleaseMutex(Os,
+			Os->signal.lock
+			));
+
+		return gcvSTATUS_OK;
+	}
+
+	for (signal = 0; signal < Os->signal.tableLen; signal++)
+	{
+		if (Os->signal.table[signal] != gcvNULL &&
+			((gcsSIGNAL_PTR)Os->signal.table[signal])->process == Process)
+		{
+			gckOS_DestroySignal(Os,	Os->signal.table[signal]);
+
+			/* Update the signal table. */
+			Os->signal.table[signal] = gcvNULL;
+			if (Os->signal.unused++ == 0)
+			{
+				Os->signal.currentID = signal;
+			}
+		}
+	}
+
+	gcmkVERIFY_OK(gckOS_ReleaseMutex(Os,
+		Os->signal.lock
+		));
+
+	return gcvSTATUS_OK;
+}
+
+#endif /* USE_NEW_LINUX_SIGNAL */
+
+/*******************************************************************************
+**
+**	gckOS_MapUserMemory
+**
+**	Lock down a user buffer and return an DMA'able address to be used by the
+**	hardware to access it.
+**
+**	INPUT:
+**
+**		gctPOINTER Memory
+**			Pointer to memory to lock down.
+**
+**		gctSIZE_T Size
+**			Size in bytes of the memory to lock down.
+**
+**	OUTPUT:
+**
+**		gctPOINTER * Info
+**			Pointer to variable receiving the information record required by
+**			gckOS_UnmapUserMemory.
+**
+**		gctUINT32_PTR Address
+**			Pointer to a variable that will receive the address DMA'able by the
+**			hardware.
+*/
+gceSTATUS
+gckOS_MapUserMemory(
+	IN gckOS Os,
+	IN gctPOINTER Memory,
+	IN gctSIZE_T Size,
+	OUT gctPOINTER * Info,
+	OUT gctUINT32_PTR Address
+	)
+{
+	gceSTATUS status;
+	gctSIZE_T pageCount, i, j;
+	gctUINT32_PTR pageTable;
+	gctUINT32 address;
+	gctUINT32 start, end, memory;
+	gctINT result = 0;
+
+	gcsPageInfo_PTR info = gcvNULL;
+	struct page **pages = gcvNULL;
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmkVERIFY_ARGUMENT(Memory != gcvNULL);
+	gcmkVERIFY_ARGUMENT(Size > 0);
+	gcmkVERIFY_ARGUMENT(Info != gcvNULL);
+	gcmkVERIFY_ARGUMENT(Address != gcvNULL);
+
+	gcmkTRACE_ZONE(gcvLEVEL_VERBOSE,
+		gcvZONE_OS,
+		"[gckOS_MapUserMemory] enter."
+		);
+
+	do
+	{
+		memory = (gctUINT32) Memory;
+
+		/* Get the number of required pages. */
+		end = (memory + Size + PAGE_SIZE - 1) >> PAGE_SHIFT;
+		start = memory >> PAGE_SHIFT;
+		pageCount = end - start;
+
+		gcmkTRACE_ZONE(gcvLEVEL_INFO,
+			gcvZONE_OS,
+			"[gckOS_MapUserMemory] pageCount: %d.",
+			pageCount
+			);
+
+		/* Invalid argument. */
+		if (pageCount == 0)
+		{
+			return gcvSTATUS_INVALID_ARGUMENT;
+		}
+
+		/* Overflow. */
+		if ((memory + Size) < memory)
+		{
+			return gcvSTATUS_INVALID_ARGUMENT;
+		}
+
+		MEMORY_MAP_LOCK(Os);
+
+		/* Allocate the Info struct. */
+		info = (gcsPageInfo_PTR)kmalloc(sizeof(gcsPageInfo), GFP_KERNEL);
+
+		if (info == gcvNULL)
+		{
+			status = gcvSTATUS_OUT_OF_MEMORY;
+			break;
+		}
+
+		/* Allocate the array of page addresses. */
+		pages = (struct page **)kmalloc(pageCount * sizeof(struct page *), GFP_KERNEL);
+
+		if (pages == gcvNULL)
+		{
+			status = gcvSTATUS_OUT_OF_MEMORY;
+			break;
+		}
+
+		/* Get the user pages. */
+		down_read(&current->mm->mmap_sem);
+		result = get_user_pages(current,
+					current->mm,
+					memory & PAGE_MASK,
+					pageCount,
+					1,
+					0,
+					pages,
+					NULL
+					);
+		up_read(&current->mm->mmap_sem);
+
+		if (result <=0 || result < pageCount)
+		{
+			struct vm_area_struct *vma;
+
+			vma = find_vma(current->mm, memory);
+
+			if (vma && (vma->vm_flags & VM_PFNMAP) )
+			{
+				do
+				{
+					pte_t		* pte;
+					spinlock_t 	* ptl;
+					unsigned long pfn;
+
+				pgd_t * pgd = pgd_offset(current->mm, memory);
+					pud_t * pud = pud_alloc(current->mm, pgd, memory);
+					if (pud)
+					{
+						pmd_t * pmd = pmd_alloc(current->mm, pud, memory);
+						if (pmd)
+						{
+							pte = pte_offset_map_lock(current->mm, pmd, memory, &ptl);
+							if (!pte)
+							{
+								break;
+							}
+						}
+						else
+						{
+							break;
+						}
+					}
+					else
+					{
+						break;
+					}
+
+					pfn 	 = pte_pfn(*pte);
+					*Address = ((pfn << PAGE_SHIFT) | (((unsigned long)Memory) & ~PAGE_MASK))
+								- Os->baseAddress;
+					*Info 	 = gcvNULL;
+
+					pte_unmap_unlock(pte, ptl);
+
+					/* Release page info struct. */
+					if (info != gcvNULL)
+					{
+						/* Free the page info struct. */
+						kfree(info);
+					}
+
+					if (pages != gcvNULL)
+					{
+						/* Free the page table. */
+						kfree(pages);
+					}
+
+					MEMORY_MAP_UNLOCK(Os);
+
+					return gcvSTATUS_OK;
+				}
+				while (gcvFALSE);
+
+				*Address = ~0;
+				*Info = gcvNULL;
+
+				status = gcvSTATUS_OUT_OF_RESOURCES;
+				break;
+			}
+			else
+			{
+				status = gcvSTATUS_OUT_OF_RESOURCES;
+				break;
+			}
+		}
+
+		for (i = 0; i < pageCount; i++)
+		{
+			/* Flush the data cache. */
+#ifdef ANDROID
+			dma_sync_single_for_device(
+						gcvNULL,
+						page_to_phys(pages[i]),
+						PAGE_SIZE,
+						DMA_TO_DEVICE);
+#else
+			flush_dcache_page(pages[i]);
+#endif
+		}
+
+		/* Allocate pages inside the page table. */
+		gcmkERR_BREAK(gckMMU_AllocatePages(Os->device->kernel->mmu,
+										  pageCount * (PAGE_SIZE/4096),
+										  (gctPOINTER *) &pageTable,
+										  &address));
+
+		/* Fill the page table. */
+		for (i = 0; i < pageCount; i++)
+		{
+			/* Get the physical address from page struct. */
+			pageTable[i * (PAGE_SIZE/4096)] = page_to_phys(pages[i]);
+
+			for (j = 1; j < (PAGE_SIZE/4096); j++)
+			{
+				pageTable[i * (PAGE_SIZE/4096) + j] = pageTable[i * (PAGE_SIZE/4096)] + 4096 * j;
+			}
+
+			gcmkTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+				"[gckOS_MapUserMemory] pages[%d]: 0x%x, pageTable[%d]: 0x%x.",
+				i, pages[i],
+				i, pageTable[i]);
+		}
+
+		/* Save pointer to page table. */
+		info->pageTable = pageTable;
+		info->pages = pages;
+
+		*Info = (gctPOINTER) info;
+
+		gcmkTRACE_ZONE(gcvLEVEL_INFO,
+			gcvZONE_OS,
+			"[gckOS_MapUserMemory] info->pages: 0x%x, info->pageTable: 0x%x, info: 0x%x.",
+			info->pages,
+			info->pageTable,
+			info
+			);
+
+		/* Return address. */
+		*Address = address + (memory & ~PAGE_MASK);
+
+		gcmkTRACE_ZONE(gcvLEVEL_INFO,
+			gcvZONE_OS,
+			"[gckOS_MapUserMemory] Address: 0x%x.",
+			*Address
+			);
+
+		/* Success. */
+		status = gcvSTATUS_OK;
+	}
+	while (gcvFALSE);
+
+	if (gcmIS_ERROR(status))
+	{
+		gcmkTRACE_ZONE(gcvLEVEL_ERROR,
+			gcvZONE_OS,
+			"[gckOS_MapUserMemory] error occured: %d.",
+			status
+			);
+
+		/* Release page array. */
+		if (result > 0 && pages != gcvNULL)
+		{
+			gcmkTRACE_ZONE(gcvLEVEL_ERROR,
+				gcvZONE_OS,
+				"[gckOS_MapUserMemory] error: page table is freed."
+				);
+
+			for (i = 0; i < result; i++)
+			{
+				if (pages[i] == gcvNULL)
+				{
+					break;
+				}
+#ifdef ANDROID
+				dma_sync_single_for_device(
+							gcvNULL,
+							page_to_phys(pages[i]),
+							PAGE_SIZE,
+							DMA_FROM_DEVICE);
+#endif
+				page_cache_release(pages[i]);
+			}
+		}
+
+		if (pages != gcvNULL)
+		{
+			gcmkTRACE_ZONE(gcvLEVEL_ERROR,
+				gcvZONE_OS,
+				"[gckOS_MapUserMemory] error: pages is freed."
+				);
+
+			/* Free the page table. */
+			kfree(pages);
+			info->pages = gcvNULL;
+		}
+
+		/* Release page info struct. */
+		if (info != gcvNULL)
+		{
+			gcmkTRACE_ZONE(gcvLEVEL_ERROR,
+				gcvZONE_OS,
+				"[gckOS_MapUserMemory] error: info is freed."
+				);
+
+			/* Free the page info struct. */
+			kfree(info);
+			*Info = gcvNULL;
+		}
+	}
+
+	MEMORY_MAP_UNLOCK(Os);
+
+	gcmkTRACE_ZONE(gcvLEVEL_VERBOSE,
+		gcvZONE_OS,
+		"[gckOS_MapUserMemory] leave."
+		);
+
+	/* Return the status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckOS_UnmapUserMemory
+**
+**	Unlock a user buffer and that was previously locked down by
+**	gckOS_MapUserMemory.
+**
+**	INPUT:
+**
+**		gctPOINTER Memory
+**			Pointer to memory to unlock.
+**
+**		gctSIZE_T Size
+**			Size in bytes of the memory to unlock.
+**
+**		gctPOINTER Info
+**			Information record returned by gckOS_MapUserMemory.
+**
+**		gctUINT32_PTR Address
+**			The address returned by gckOS_MapUserMemory.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckOS_UnmapUserMemory(
+	IN gckOS Os,
+	IN gctPOINTER Memory,
+	IN gctSIZE_T Size,
+	IN gctPOINTER Info,
+	IN gctUINT32 Address
+	)
+{
+	gceSTATUS status;
+	gctUINT32 memory, start, end;
+	gcsPageInfo_PTR info;
+	gctSIZE_T pageCount, i;
+	struct page **pages;
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmkVERIFY_ARGUMENT(Memory != gcvNULL);
+	gcmkVERIFY_ARGUMENT(Size > 0);
+	gcmkVERIFY_ARGUMENT(Info != gcvNULL);
+
+	gcmkTRACE_ZONE(gcvLEVEL_VERBOSE,
+		gcvZONE_OS,
+		"[gckOS_UnmapUserMemory] enter."
+		);
+
+	do
+	{
+		info = (gcsPageInfo_PTR) Info;
+
+		if (info == gcvNULL)
+		{
+			return gcvSTATUS_OK;
+		}
+
+		pages = info->pages;
+
+		gcmkTRACE_ZONE(gcvLEVEL_INFO,
+			gcvZONE_OS,
+			"[gckOS_UnmapUserMemory] info: 0x%x, pages: 0x%x.",
+			info,
+			pages
+			);
+
+		/* Invalid page array. */
+		if (pages == gcvNULL)
+		{
+			return gcvSTATUS_INVALID_ARGUMENT;
+		}
+
+		memory = (gctUINT32) Memory;
+		end = (memory + Size + PAGE_SIZE - 1) >> PAGE_SHIFT;
+		start = memory >> PAGE_SHIFT;
+		pageCount = end - start;
+
+		/* Overflow. */
+		if ((memory + Size) < memory)
+		{
+			return gcvSTATUS_INVALID_ARGUMENT;
+		}
+
+		/* Invalid argument. */
+		if (pageCount == 0)
+		{
+			return gcvSTATUS_INVALID_ARGUMENT;
+		}
+
+		gcmkTRACE_ZONE(gcvLEVEL_INFO,
+			gcvZONE_OS,
+			"[gckOS_UnmapUserMemory] memory: 0x%x, pageCount: %d, pageTable: 0x%x.",
+			memory,
+			pageCount,
+			info->pageTable
+			);
+
+		MEMORY_MAP_LOCK(Os);
+
+		/* Free the pages from the MMU. */
+		gcmkERR_BREAK(gckMMU_FreePages(Os->device->kernel->mmu,
+									  info->pageTable,
+									  pageCount * (PAGE_SIZE/4096)
+									  ));
+
+		/* Release the page cache. */
+		for (i = 0; i < pageCount; i++)
+		{
+			gcmkTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_OS,
+				"[gckOS_UnmapUserMemory] pages[%d]: 0x%x.",
+				i,
+				pages[i]
+				);
+
+			if (!PageReserved(pages[i]))
+			{
+				SetPageDirty(pages[i]);
+			}
+
+#ifdef ANDROID
+			dma_sync_single_for_device(
+						gcvNULL,
+						page_to_phys(pages[i]),
+						PAGE_SIZE,
+						DMA_FROM_DEVICE);
+#endif
+			page_cache_release(pages[i]);
+		}
+
+		/* Success. */
+		status = gcvSTATUS_OK;
+	}
+	while (gcvFALSE);
+
+	if (info != gcvNULL)
+	{
+		/* Free the page array. */
+		if (info->pages != gcvNULL)
+		{
+			kfree(info->pages);
+		}
+
+		kfree(info);
+	}
+
+	MEMORY_MAP_UNLOCK(Os);
+
+	/* Return the status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckOS_GetBaseAddress
+**
+**	Get the base address for the physical memory.
+**
+**	INPUT:
+**
+**		gckOS Os
+**			Pointer to the gckOS object.
+**
+**	OUTPUT:
+**
+**		gctUINT32_PTR BaseAddress
+**			Pointer to a variable that will receive the base address.
+*/
+gceSTATUS
+gckOS_GetBaseAddress(
+	IN gckOS Os,
+	OUT gctUINT32_PTR BaseAddress
+	)
+{
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmkVERIFY_ARGUMENT(BaseAddress != gcvNULL);
+
+	/* Return base address. */
+	*BaseAddress = Os->baseAddress;
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+gceSTATUS
+gckOS_SuspendInterrupt(
+	IN gckOS Os
+	)
+{
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+
+	disable_irq(Os->device->irqLine);
+
+	return gcvSTATUS_OK;
+}
+
+gceSTATUS
+gckOS_ResumeInterrupt(
+	IN gckOS Os
+	)
+{
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+
+	enable_irq(Os->device->irqLine);
+
+	return gcvSTATUS_OK;
+}
+
+gceSTATUS
+gckOS_ClockOff(
+    void
+	)
+{
+    struct clk * clk = NULL;
+
+#ifdef CONFIG_PXA_DVFM
+    gc_pwr(0);
+#endif
+
+    clk = clk_get(NULL, "GCCLK");
+    CLOCK_VERIFY(clk);
+    clk_disable(clk);
+
+#ifdef CONFIG_PXA_DVFM
+	/* decrease AXICLK count in kernel */
+    clk = NULL;
+    clk = clk_get(NULL, "AXICLK");
+    CLOCK_VERIFY(clk);
+    clk_disable(clk);
+#endif
+
+	return gcvSTATUS_OK;
+}
+
+gceSTATUS
+gckOS_ClockOn(
+	IN gctUINT64 Frequency
+	)
+{
+    struct clk * clk = NULL;
+
+#ifdef CONFIG_PXA_DVFM
+	/* increase AXICLK count in kernel */
+    clk = clk_get(NULL, "AXICLK");
+    CLOCK_VERIFY(clk);
+	clk_enable(clk);
+    clk = NULL;
+#endif
+
+    clk = clk_get(NULL, "GCCLK");
+    CLOCK_VERIFY(clk);
+
+    if(Frequency != 0)
+    {
+        /* APMU_GC_156M, APMU_GC_624M, APMU_GC_PLL2, APMU_GC_PLL2_DIV2 currently */
+        printk("\n[galcore] clk input = %dM Hz; running on %dM Hz\n",(int)Frequency, (int)Frequency/2);
+        if (clk_set_rate(clk, Frequency*1000*1000))
+        {
+		gcmkTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_DRIVER,
+			      "[galcore] Can't set core clock.");
+            return -EAGAIN;
+        }
+    }
+
+    clk_enable(clk);
+
+#ifdef CONFIG_PXA_DVFM
+    gc_pwr(1);
+#endif
+
+	return gcvSTATUS_OK;
+}
+
+gceSTATUS
+gckOS_Reset(
+	IN gckOS Os
+	)
+{
+    gceSTATUS status;
+    gckHARDWARE hardware = Os->device->kernel->hardware;
+    gckEVENT event = Os->device->kernel->event;
+    gckCOMMAND command = Os->device->kernel->command;
+    gctUINT32 data = 0;
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+
+    if(Os->device->reset)
+	{
+         /*  Stall */
+	{
+            /* Acquire the context switching mutex so nothing else can be
+		** committed. */
+		gcmkONERROR(
+			gckOS_AcquireMutex(Os,
+							   command->mutexContext,
+							   gcvINFINITE));
+
+             /*  mdelay(); */
+	}
+	 /*  Stop */
+	{
+		/* Stop the command parser. */
+		gcmkONERROR(
+			gckCOMMAND_Stop(command));
+
+		/* Grab the command queue mutex so nothing can get access to the
+		** command queue. */
+		gcmkONERROR(
+			gckOS_AcquireMutex(Os,
+							   command->mutexQueue,
+							   gcvINFINITE));
+	}
+
+        gckOS_SuspendInterrupt(Os);
+        gckOS_ClockOff();
+
+		/* Read AQIntrAcknowledge register. */
+		gcmkVERIFY_OK(gckOS_ReadRegister(Os,
+										0x00010,
+									    &data));
+
+        /* trigger any commited event */
+	gcmkVERIFY_OK(gckEVENT_Interrupt(event, data));
+        gcmkVERIFY_OK(gckEVENT_Notify(event, 1));
+
+        gckOS_ClockOn(0);
+        gckOS_ResumeInterrupt(Os);
+
+         /*  Initialize */
+	{
+		/* Initialize hardware. */
+		gcmkONERROR(
+			gckHARDWARE_InitializeHardware(hardware));
+
+		gcmkONERROR(
+			gckHARDWARE_SetFastClear(hardware,
+									 hardware->allowFastClear,
+									 hardware->allowCompression));
+
+		/* Force the command queue to reload the next context. */
+		command->currentContext = 0;
+	}
+
+	/* Sleep for 1ms, to make sure everything is powered on. */
+	gcmkVERIFY_OK(gckOS_Delay(Os, 1));
+
+	 /*  start */
+	{
+            /* Release the command mutex queue. */
+		gcmkONERROR(
+			gckOS_ReleaseMutex(Os,
+							   command->mutexQueue));
+		/* Start the command processor. */
+		gcmkONERROR(
+			gckCOMMAND_Start(command));
+	}
+	 /*  release context mutex */
+	{
+		/* Release the context switching mutex. */
+		gcmkONERROR(
+			gckOS_ReleaseMutex(Os,
+							   command->mutexContext));
+	}
+
+        hardware->chipPowerState = gcvPOWER_ON;
+
+        printk("[galcore] %s : %d \n", __func__, __LINE__);
+
+        return status;
+    }
+
+    return gcvSTATUS_SKIP;
+
+OnError:
+    printk("ERROR: %s has error \n",__func__);
+    return status;
+
+}
+
+gceSTATUS
+gckOS_SetConstraint(
+	IN gckOS Os,
+	IN gctBOOL enableDVFM,
+	IN gctBOOL enableLPM
+        )
+{
+    /* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+
+#ifdef CONFIG_CPU_MMP2
+    if(enableDVFM)
+    {
+        /* disable LPM and OP1 - OP5 on mmp2 */
+        dvfm_disable(Os->device->dvfm_dev_index);
+    }
+#endif
+
+#ifdef CONFIG_PXA_DVFM
+
+#if 0
+    if(enableDVFM)
+    {
+        /* disable LPM and OP1 - OP5 on PV2 evb */
+        dvfm_disable(Os->device->dvfm_dev_index);
+    }
+#else
+    if(enableLPM)
+    {
+         /* printk("\n Idle = false, disable low power mode\n"); */
+        /* Disable D0CS */
+        dvfm_disable_op_name("D0CS", Os->device->dvfm_dev_index);
+        /* Disable Low power mode */
+        dvfm_disable_op_name("D1", Os->device->dvfm_dev_index);
+        dvfm_disable_op_name("D2", Os->device->dvfm_dev_index);
+        /* Disable CG */
+        if(cpu_is_pxa935() || cpu_is_pxa950() || cpu_is_pxa955())
+            dvfm_disable_op_name("CG", Os->device->dvfm_dev_index);
+    }
+
+    if(Os->device->enableD1)
+    {
+        dvfm_disable_op_name("D1", Os->device->dvfm_dev_index);
+    }
+
+    if(Os->device->enableD2)
+    {
+        dvfm_disable_op_name("D2", Os->device->dvfm_dev_index);
+    }
+
+    if(Os->device->enableD0CS)
+    {
+        dvfm_disable_op_name("D0CS", Os->device->dvfm_dev_index);
+    }
+
+    if(Os->device->enableCG)
+    {
+        if(cpu_is_pxa935() || cpu_is_pxa950() || cpu_is_pxa955())
+            dvfm_disable_op_name("CG", Os->device->dvfm_dev_index);
+    }
+
+    if(enableDVFM)
+    {
+
+        /* Disable OP1 - OP7  on PV2 evb */
+        dvfm_disable_op_name("156M", Os->device->dvfm_dev_index);
+        dvfm_disable_op_name("208M", Os->device->dvfm_dev_index);
+        dvfm_disable_op_name("156M_HF", Os->device->dvfm_dev_index);
+        dvfm_disable_op_name("208M_HF", Os->device->dvfm_dev_index);
+        dvfm_disable_op_name("416M", Os->device->dvfm_dev_index);
+         /* dvfm_disable_op_name("624M", Os->device->dvfm_dev_index); */
+         /* dvfm_disable_op_name("832M", Os->device->dvfm_dev_index); */
+         /* dvfm_disable(Os->device->dvfm_dev_index); */
+    }
+#endif
+
+#endif
+        return gcvSTATUS_OK;
+}
+
+gceSTATUS
+gckOS_UnSetConstraint(
+	IN gckOS Os,
+	IN gctBOOL enableDVFM,
+	IN gctBOOL enableLPM
+	)
+{
+    /* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+
+#ifdef CONFIG_CPU_MMP2
+    if(enableDVFM)
+    {
+        /* enable LPM and OP1 - OP5 on mmp2 */
+        dvfm_enable(Os->device->dvfm_dev_index);
+    }
+#endif
+
+#ifdef CONFIG_PXA_DVFM
+
+#if 0
+    if(enableDVFM)
+    {
+        /* enable LPM and OP1 - OP5 on PV2 evb  */
+        dvfm_enable(Os->device->dvfm_dev_index);
+    }
+#else
+    if(enableLPM)
+    {
+         /* printk("\n Idle = true, enable low power mode\n"); */
+        /* Enable D0CS */
+        dvfm_enable_op_name("D0CS", Os->device->dvfm_dev_index);
+        /* Enable Low power mode */
+        dvfm_enable_op_name("D1", Os->device->dvfm_dev_index);
+        dvfm_enable_op_name("D2", Os->device->dvfm_dev_index);
+        /* Enable CG */
+        if(cpu_is_pxa935() || cpu_is_pxa950() || cpu_is_pxa955())
+            dvfm_enable_op_name("CG", Os->device->dvfm_dev_index);
+    }
+
+    if(Os->device->enableD1)
+    {
+        dvfm_enable_op_name("D1", Os->device->dvfm_dev_index);
+    }
+
+    if(Os->device->enableD2)
+    {
+        dvfm_enable_op_name("D2", Os->device->dvfm_dev_index);
+    }
+
+    if(Os->device->enableD0CS)
+    {
+        dvfm_enable_op_name("D0CS", Os->device->dvfm_dev_index);
+    }
+
+    if(Os->device->enableCG)
+    {
+       if(cpu_is_pxa935() || cpu_is_pxa950() || cpu_is_pxa955())
+           dvfm_enable_op_name("CG", Os->device->dvfm_dev_index);
+    }
+
+    if(enableDVFM)
+    {
+
+        /* Enable OP1 - OP7 on PV2 evb */
+        dvfm_enable_op_name("156M", Os->device->dvfm_dev_index);
+        dvfm_enable_op_name("208M", Os->device->dvfm_dev_index);
+        dvfm_enable_op_name("156M_HF", Os->device->dvfm_dev_index);
+        dvfm_enable_op_name("208M_HF", Os->device->dvfm_dev_index);
+        dvfm_enable_op_name("416M", Os->device->dvfm_dev_index);
+         /* dvfm_enable_op_name("624M", Os->device->dvfm_dev_index); */
+         /* dvfm_enable_op_name("832M", Os->device->dvfm_dev_index); */
+         /* dvfm_enable(Os->device->dvfm_dev_index); */
+    }
+#endif
+
+#endif
+    return gcvSTATUS_OK;
+}
+
+gceSTATUS
+gckOS_FrequencyScaling(
+	IN gckOS Os,
+	IN gctBOOL Idle
+    )
+{
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+
+    /* printk("[galcore] %s:\n",Idle?"Idle,freq scale to 1/64":"Running"); */
+    if(Idle)
+    {
+        /* frequence change to 1/64 */
+        gcmkVERIFY_OK(gckOS_WriteRegister(Os,0x00000,0x204));
+        /* Loading the frequency scaler. */
+        gcmkVERIFY_OK(gckOS_WriteRegister(Os,0x00000,0x004));
+
+        gckOS_UnSetConstraint(Os,
+            Os->device->enableDVFM,
+            Os->device->enableLowPowerMode);
+    }
+    else
+    {
+        /* Write the clock control register. */
+        gcmkVERIFY_OK(gckOS_WriteRegister(Os, 0x00000, 0x300));
+        /* Done loading the frequency scaler. */
+        gcmkVERIFY_OK(gckOS_WriteRegister(Os, 0x00000, 0x100));
+
+        gckOS_SetConstraint(Os,
+            Os->device->enableDVFM,
+            Os->device->enableLowPowerMode);
+    }
+
+    return gcvSTATUS_OK;
+}
+
+gceSTATUS
+gckOS_NotifyIdle(
+	IN gckOS Os,
+	IN gctBOOL Idle
+	)
+{
+
+#if defined CONFIG_CPU_PXA910
+#if POWER_OFF_GC_WHEN_IDLE
+    static int  count = 0;
+    gceSTATUS   status;
+#endif
+#endif
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+
+	Os->device->lastNodeIndex = (Os->device->lastNodeIndex + 1) %100;
+    Os->device->profNode[Os->device->lastNodeIndex].idle = Idle;
+    Os->device->profNode[Os->device->lastNodeIndex].tick = gckOS_GetTicks();
+
+#if defined CONFIG_CPU_PXA910
+#if POWER_OFF_GC_WHEN_IDLE
+    switch (galDevice->currentPMode)
+    {
+    case gcvPM_NORMAL:
+        {
+            gckOS_FrequencyScaling(Os,Idle);
+        }
+        break;
+
+    case gcvPM_EARLY_SUSPEND:
+        {
+            printk(">>>[%s]\t@%d\tN:0x%x\tIDLE:%d\n", __func__, __LINE__, count, Idle);
+            /* return if not idle */
+            if (gcvFALSE == Idle) {
+                printk("<<<<<busy, gcvPM_EARLY_SUSPEND return.\n");
+                break;
+            }
+
+            /* Acquire the mutex. */
+            if (galDevice->printPID) {
+                printk("|-|-|- Acquiring gcdevice mutex...\t%s@%d\n",__FUNCTION__,__LINE__);
+            }
+
+            gcmkONERROR(
+                gckOS_AcquireMutex(galDevice->os, galDevice->mutexGCDevice, gcvINFINITE));
+
+            _power_off_gc(galDevice, gcvFALSE);
+
+            /* Release the mutex. */
+            gcmkVERIFY_OK(
+                gckOS_ReleaseMutex(galDevice->os, galDevice->mutexGCDevice));
+
+            if (galDevice->printPID) {
+                printk("|-|-|- Released gcdevice mutex...\t%s@%d\n",__FUNCTION__,__LINE__);
+            }
+
+
+            printk("<<<[%s]\t@%d\tN:0x%x\n", __func__, __LINE__, count);
+        }
+        break;
+    default:
+        break;
+    }
+    return gcvSTATUS_OK;
+
+OnError:
+    /* Return the status. */
+    printk("---->ERROR:%s @ %d\n", __func__, __LINE__);
+    return status;
+#else
+    /* POWER_OFF_GC_WHEN_IDLE not true, just go to normal path*/
+    gckOS_FrequencyScaling(Os, Idle);
+#endif
+
+#else
+    /* other platform */
+    gckOS_FrequencyScaling(Os, Idle);
+#endif
+
+	return gcvSTATUS_OK;
+}
+
+gctUINT32
+gckOS_GetTicks(
+    void
+    )
+{
+    struct timeval tv;
+    unsigned int tickcount = 0;
+    do_gettimeofday(&tv);
+    tickcount = (tv.tv_sec*1000 + tv.tv_usec/1000);
+    return tickcount;
+}
+
+gceSTATUS
+gckOS_IdleProfile(
+    IN gckOS Os,
+    IN OUT gctUINT32* Timeslice,
+    OUT gctUINT32* IdleTime
+    )
+{
+    int i;
+    gctUINT currentTick;
+    gckProfNode firstNode;
+    gckProfNode lastNode;
+    gckProfNode iterNode; /* first node in the time slice */
+    gckProfNode nextNode; /* the next node of iterNode */
+    gctUINT firstIndex, lastIndex, iterIndex;
+    gctUINT idleTime = 0;
+
+    /* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmkVERIFY_ARGUMENT(Timeslice != gcvNULL);
+
+    /* Grab the conmmand queue mutex. */
+	gcmkVERIFY_OK(gckOS_AcquireMutex(Os,
+									Os->device->kernel->command->mutexQueue,
+									gcvINFINITE));
+
+
+    currentTick = gckOS_GetTicks();
+    lastIndex = Os->device->lastNodeIndex;
+    iterIndex = lastIndex;
+    firstIndex = (Os->device->lastNodeIndex + 1) % 100;
+    firstNode = &Os->device->profNode[firstIndex];
+    lastNode = &Os->device->profNode[lastIndex];
+
+    /* printk("@@@@@@[first last] [%d, %d]\n",firstIndex,lastIndex); */
+
+    /* no node in the time slice */
+    if(currentTick - lastNode->tick >= *Timeslice)
+    {
+        if(lastNode->idle)
+        {
+            idleTime += *Timeslice;
+            /* printk("line %d, idletime : %d",__LINE__, idleTime); */
+        }
+    }
+    else
+    {
+        /* find first node in the time slice */
+        if(currentTick - firstNode->tick < *Timeslice)
+        {
+            /* */
+            *Timeslice = currentTick - firstNode->tick;
+
+            iterIndex = firstIndex;
+            iterNode = &Os->device->profNode[iterIndex];
+        }
+        else
+        {
+            for(i=0;i<100;i++)
+            {
+                iterIndex = (firstIndex + i)%100;
+                iterNode = &Os->device->profNode[iterIndex];
+                if(currentTick - iterNode->tick < *Timeslice)
+                {
+                    break;
+                }
+            }
+        }
+        /* printk("line %d, iterIndex : %d\n",__LINE__, iterIndex); */
+
+        /* startTick to first node time */
+        if(!iterNode->idle)
+        {
+            idleTime += iterNode->tick - (currentTick - *Timeslice);
+            /* printk("line %d, idletime : %d\n",__LINE__, idleTime); */
+        }
+
+        /* last node to currentTick time */
+        if(lastNode->idle)
+        {
+            idleTime += currentTick - lastNode->tick;
+            /* printk("line %d, idletime : %d\n",__LINE__, idleTime); */
+        }
+
+        /* first node to last node time */
+        for(i = 0; i < 100; i++ )
+        {
+            if(iterIndex == lastIndex)
+                break;
+
+            if(iterNode->idle)
+            {
+                nextNode = &Os->device->profNode[(iterIndex + 1)%100];
+                idleTime += nextNode->tick - iterNode->tick;
+                /* printk("line %d, idletime : %d\n",__LINE__, idleTime); */
+            }
+            iterIndex = (iterIndex + 1)%100;
+            iterNode = &Os->device->profNode[iterIndex];
+        }
+
+    }
+
+    *IdleTime = idleTime;
+
+    /* Release the command queue mutex. */
+    gcmkVERIFY_OK(gckOS_ReleaseMutex(Os, Os->device->kernel->command->mutexQueue));
+
+    return gcvSTATUS_OK;
+}
+
+gceSTATUS
+gckOS_MemCopy(
+        IN gctPOINTER Destination,
+        IN gctCONST_POINTER Source,
+        IN gctSIZE_T Bytes
+        )
+{
+        gcmkVERIFY_ARGUMENT(Destination != NULL);
+        gcmkVERIFY_ARGUMENT(Source != NULL);
+        gcmkVERIFY_ARGUMENT(Bytes > 0);
+
+        memcpy(Destination, Source, Bytes);
+
+        return gcvSTATUS_OK;
+}
+
+gceSTATUS
+gckOS_ZeroMemory(
+	IN gctPOINTER Memory,
+	IN gctSIZE_T Bytes
+	)
+{
+	gcmkHEADER_ARG("Memory=0x%x Bytes=%lu", Memory, Bytes);
+
+	gcmkVERIFY_ARGUMENT(Memory != gcvNULL);
+	gcmkVERIFY_ARGUMENT(Bytes > 0);
+
+	memset(Memory, 0, Bytes);
+
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+}
+
+#if gcdkUSE_MEMORY_RECORD
+MEMORY_RECORD_PTR
+CreateMemoryRecord(
+	gckOS Os,
+	MEMORY_RECORD_PTR List,
+	gcuVIDMEM_NODE_PTR Node
+	)
+{
+	MEMORY_RECORD_PTR	mr;
+
+	mr = (MEMORY_RECORD_PTR)kmalloc(sizeof(struct MEMORY_RECORD), GFP_ATOMIC);
+	if (mr == gcvNULL) return gcvNULL;
+
+	MEMORY_LOCK(Os);
+
+	mr->node			= Node;
+
+	mr->prev			= List->prev;
+	mr->next			= List;
+	List->prev->next	= mr;
+	List->prev			= mr;
+
+	MEMORY_UNLOCK(Os);
+
+	return mr;
+}
+
+void
+DestoryMemoryRecord(
+	gckOS Os,
+	MEMORY_RECORD_PTR Mr
+	)
+{
+	MEMORY_LOCK(Os);
+
+	Mr->prev->next		= Mr->next;
+	Mr->next->prev		= Mr->prev;
+
+	MEMORY_UNLOCK(Os);
+
+	kfree(Mr);
+}
+
+MEMORY_RECORD_PTR
+FindMemoryRecord(
+	gckOS Os,
+	MEMORY_RECORD_PTR List,
+	gcuVIDMEM_NODE_PTR Node
+	)
+{
+	MEMORY_RECORD_PTR mr;
+
+	MEMORY_LOCK(Os);
+
+	mr = List->next;
+
+	while (mr != List)
+	{
+		if (mr->node == Node)
+		{
+			MEMORY_UNLOCK(Os);
+
+			return mr;
+		}
+
+		mr = mr->next;
+	}
+
+	MEMORY_UNLOCK(Os);
+
+	return gcvNULL;
+}
+
+void
+FreeAllMemoryRecord(
+	gckOS Os,
+	MEMORY_RECORD_PTR List
+	)
+{
+	MEMORY_RECORD_PTR mr;
+	gctUINT i = 0;
+
+	MEMORY_LOCK(Os);
+
+	while (List->next != List)
+	{
+		mr = List->next;
+
+		mr->prev->next		= mr->next;
+		mr->next->prev		= mr->prev;
+
+		i++;
+
+		MEMORY_UNLOCK(Os);
+
+		gcmkTRACE_ZONE(gcvLEVEL_ERROR,
+				gcvZONE_OS,
+				"Unfreed %s memory: node: %p",
+				(mr->node->VidMem.memory->object.type == gcvOBJ_VIDMEM)?
+					"video" : (mr->node->Virtual.contiguous)?
+						"contiguous" : "virtual",
+				mr->node);
+
+		while (gcvTRUE)
+		{
+			if (mr->node->VidMem.memory->object.type == gcvOBJ_VIDMEM)
+			{
+				if (mr->node->VidMem.locked == 0) break;
+			}
+			else
+			{
+				if (mr->node->Virtual.locked == 0) break;
+			}
+
+			gckVIDMEM_Unlock(mr->node, gcvSURF_TYPE_UNKNOWN, gcvNULL);
+		}
+
+		gckVIDMEM_Free(mr->node);
+
+		kfree(mr);
+
+		MEMORY_LOCK(Os);
+	}
+
+	MEMORY_UNLOCK(Os);
+
+	if (i > 0)
+	{
+		gcmkTRACE_ZONE(gcvLEVEL_ERROR,
+				gcvZONE_OS,
+				"======== Total %d unfreed video/contiguous/virtual memory ========", i);
+	}
+}
+#endif
+
+/*******************************************************************************
+**  gckOS_CacheFlush
+**
+**  Flush the cache for the specified addresses.  The GPU is going to need the
+**  data.  If the system is allocating memory as non-cachable, this function can
+**  be ignored.
+**
+**  ARGUMENTS:
+**
+**      gckOS Os
+**          Pointer to gckOS object.
+**
+**      gctHANDLE Process
+**          Process handle Logical belongs to or gcvNULL if Logical belongs to
+**          the kernel.
+**
+**      gctPOINTER Logical
+**          Logical address to flush.
+**
+**      gctSIZE_T Bytes
+**          Size of the address range in bytes to flush.
+*/
+gceSTATUS
+gckOS_CacheFlush(
+    IN gckOS Os,
+    IN gctHANDLE Process,
+    IN gctPOINTER Logical,
+    IN gctSIZE_T Bytes
+    )
+{
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**  gckOS_CacheInvalidate
+**
+**  Flush the cache for the specified addresses and invalidate the lines as
+**  well.  The GPU is going to need and modify the data.  If the system is
+**  allocating memory as non-cachable, this function can be ignored.
+**
+**  ARGUMENTS:
+**
+**      gckOS Os
+**          Pointer to gckOS object.
+**
+**      gctHANDLE Process
+**          Process handle Logical belongs to or gcvNULL if Logical belongs to
+**          the kernel.
+**
+**      gctPOINTER Logical
+**          Logical address to flush.
+**
+**      gctSIZE_T Bytes
+**          Size of the address range in bytes to flush.
+*/
+gceSTATUS
+gckOS_CacheInvalidate(
+    IN gckOS Os,
+    IN gctHANDLE Process,
+    IN gctPOINTER Logical,
+    IN gctSIZE_T Bytes
+    )
+{
+    return gcvSTATUS_OK;
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/Debug.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/Debug.c
@@ -0,0 +1,282 @@
+/****************************************************************************
+*  
+*    Copyright (C) 2002 - 2008 by Vivante Corp.
+*  
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public Lisence as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*  
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*  
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*  
+*****************************************************************************/
+
+
+
+
+
+
+#include "PreComp.h"
+#include <stdarg.h>
+
+/******************************************************************************\
+******************************** Debug Variables *******************************
+\******************************************************************************/
+
+static gceSTATUS gk_LastError  = gcvSTATUS_OK;
+static gctUINT32 gk_DebugLevel = 0;
+static gctUINT32 gk_DebugZone  = 0;
+
+static void _Print(
+	char *Message,
+	va_list Arguments
+	)
+{
+	char buffer[1024];
+	int n;
+	
+	/* Print message to buffer. */
+	n = vsnprintf(buffer, sizeof(buffer), Message, Arguments);
+	if ((n <= 0) || (buffer[n - 1] != '\n'))
+	{
+		/* Append new-line. */
+		strncat(buffer, "\n", sizeof(buffer));
+	}
+
+	/* Output to debugger. */	
+	printk(buffer);
+}
+
+/******************************************************************************\
+********************************* Debug Macros *********************************
+\******************************************************************************/
+
+#define _DEBUGPRINT(Message) \
+{ \
+	va_list arguments; \
+	\
+	va_start(arguments, Message); \
+	_Print(Message, arguments); \
+	va_end(arguments); \
+}
+
+/******************************************************************************\
+********************************** Debug Code **********************************
+\******************************************************************************/
+
+/*******************************************************************************
+**
+**	gcoOS_DebugTrace
+**
+**	Send a leveled message to the debugger.
+**
+**	INPUT:
+**
+**		gctUINT32 Level
+**			Debug level of message.
+**
+**		char * Message
+**			Pointer to message.
+**
+**		...
+**			Optional arguments.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+
+void gcoOS_DebugTrace(
+	IN gctUINT32 Level,
+	IN char *Message,
+	...
+	)
+{
+
+	if (Level > gk_DebugLevel)
+	{
+		return;
+	}
+
+	_DEBUGPRINT(Message);
+}
+
+
+/*******************************************************************************
+**
+**	gcoOS_DebugTraceZone
+**
+**	Send a leveled and zoned message to the debugger.
+**
+**	INPUT:
+**
+**		gctUINT32 Level
+**			Debug level for message.
+**
+**		gctUINT32 Zone
+**			Debug zone for message.
+**
+**		char * Message
+**			Pointer to message.
+**
+**		...
+**			Optional arguments.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+
+void gcoOS_DebugTraceZone(
+	IN gctUINT32 Level,
+	IN gctUINT32 Zone,
+	IN char * Message,
+	...
+	)
+{
+
+	if ((Level > gk_DebugLevel) || !(Zone & gk_DebugZone))
+	{
+		return;
+	}
+
+	_DEBUGPRINT(Message);
+}
+
+
+/*******************************************************************************
+**
+**	gcoOS_DebugBreak
+**
+**	Break into the debugger.
+**
+**	INPUT:
+**
+**		Nothing.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+void gcoOS_DebugBreak(
+	void
+	)
+{
+	gcoOS_DebugTrace(
+		gcvLEVEL_INFO,
+		"%s(%d)\n",
+		__FUNCTION__,
+		__LINE__
+		);
+}
+
+/*******************************************************************************
+**
+**	gcoOS_DebugFatal
+**
+**	Send a message to the debugger and break into the debugger.
+**
+**	INPUT:
+**
+**		char * Message
+**			Pointer to message.
+**
+**		...
+**			Optional arguments.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+void
+gcoOS_DebugFatal(
+	IN char* Message,
+	...
+	)
+{
+	_DEBUGPRINT(Message);
+
+	/* Break into the debugger. */
+	gcoOS_DebugBreak();
+}
+
+/*******************************************************************************
+**
+**	gcoOS_SetDebugLevel
+**
+**	Set the debug level.
+**
+**	INPUT:
+**
+**		gctUINT32 Level
+**			New debug level.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+
+void gcoOS_SetDebugLevel(
+	gctUINT32 Level
+	)
+{
+	gk_DebugLevel = Level;
+}
+
+
+/*******************************************************************************
+**
+**	gcoOS_SetDebugZone
+**
+**	Set the debug zone.
+**
+**	INPUT:
+**
+**		gctUINT32 Zone
+**			New debug zone.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+void gcoOS_SetDebugZone(
+	gctUINT32 Zone
+	)
+{
+	gk_DebugZone = Zone;
+}
+
+/*******************************************************************************
+**
+**	gcoOS_Verify
+**
+**	Called to verify the result of a function call.
+**
+**	INPUT:
+**
+**		gceSTATUS Status
+**			Function call result.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+
+void
+gcoOS_Verify(
+	IN gceSTATUS Status
+	)
+{
+	gk_LastError = Status;
+	//gcmASSERT(Status == gcvSTATUS_OK);
+}
+
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/Kbuild
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/Kbuild
@@ -0,0 +1,84 @@
+##############################################################################
+#  
+#    Copyright (C) 2005 - 2010 by Vivante Corp.
+#  
+#    This program is free software; you can redistribute it and/or modify
+#    it under the terms of the GNU General Public Lisence as published by
+#    the Free Software Foundation; either version 2 of the license, or
+#    (at your option) any later version.
+#  
+#    This program is distributed in the hope that it will be useful,
+#    but WITHOUT ANY WARRANTY; without even the implied warranty of
+#    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+#    GNU General Public Lisence for more details.
+#  
+#    You should have received a copy of the GNU General Public License
+#    along with this program; if not write to the Free Software
+#    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+#  
+##############################################################################
+
+
+
+#
+# This file is a part of Vivante software stack build environment for Linux.
+# It defines the rules necessary to build Linux kernel HAL driver. This file
+# is included from within the system makefile; here we need to define what
+# needs to be build for our driver.
+#
+
+
+################################################################################
+# Set the kernel driver flag.
+
+VIVANTE_KERNEL = 1
+
+
+################################################################################
+# Include common definitions.
+
+include $(AQROOT)/GNUmakefile.common
+
+
+################################################################################
+# Define Vivante library directories.
+
+ARCH_LIB_DIR = ../../../../arch/$(notdir $(AQARCH))/hal/kernel/$(OBJ_DIR)
+ROOT_LIB_DIR = ../../../kernel/$(OBJ_DIR)
+
+
+################################################################################
+# Describe object files.
+
+OBJECTS = ./Driver.o \
+          ./Device.o \
+          ./Debug.o \
+          ./Kernel.o \
+          ./Os.o
+
+
+################################################################################
+# Add extra flags for object files.
+
+EXTRA_CFLAGS += -DLINUX -DDRIVER
+
+ifeq ($(DEBUG), 1)
+	EXTRA_CFLAGS += -DDBG=1 -DDEBUG -D_DEBUG
+else
+	EXTRA_CFLAGS += -DDBG=0
+endif
+
+EXTRA_CFLAGS += -I$(AQROOT)/hal/inc
+EXTRA_CFLAGS += -I$(AQROOT)/hal/kernel
+EXTRA_CFLAGS += -I$(AQARCH)/hal/kernel
+EXTRA_CFLAGS += -I$(AQARCH)/cmodel/inc
+
+
+################################################################################
+# Define the target output.
+
+obj-m = $(OBJ_DIR)/GALCore.o
+
+$(OBJ_DIR)/GALCore-objs  = $(OBJECTS)
+$(OBJ_DIR)/GALCore-objs += $(ARCH_LIB_DIR)/libHALArchKernel.a
+$(OBJ_DIR)/GALCore-objs += $(ROOT_LIB_DIR)/libHALKernel.a
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/Driver.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/Driver.c
@@ -0,0 +1,1296 @@
+/****************************************************************************
+*
+*    Copyright (C) 2002 - 2008 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public Lisence as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+#ifdef ENABLE_GPU_CLOCK_BY_DRIVER
+#undef ENABLE_GPU_CLOCK_BY_DRIVER
+#endif
+
+#if defined(CONFIG_DOVE_GPU)
+#define ENABLE_GPU_CLOCK_BY_DRIVER	0
+#else
+#define ENABLE_GPU_CLOCK_BY_DRIVER	1
+#endif 
+
+/* You can comment below line to use legacy driver model */
+#define USE_PLATFORM_DRIVER 1
+
+
+#include <linux/device.h>
+
+#include "PreComp.h"
+#include "aqHalDriver.h"
+#include "Context.h"
+
+#if USE_PLATFORM_DRIVER
+#include <linux/platform_device.h>
+#endif
+
+MODULE_DESCRIPTION("Vivante Graphics Driver");
+MODULE_LICENSE("GPL");
+
+struct class *gpuClass;
+
+static gcoGALDEVICE galDevice;
+
+static int major = 199;
+module_param(major, int, 0644);
+
+int irqLine = IRQ_DOVE_GPU;
+module_param(irqLine, int, 0644);
+
+long registerMemBase = DOVE_GPU_PHYS_BASE;
+module_param(registerMemBase, long, 0644);
+
+ulong registerMemSize = 256 << 10;
+module_param(registerMemSize, ulong, 0644);
+
+long contiguousSize = 32 << 20;
+module_param(contiguousSize, long, 0644);
+
+ulong contiguousBase = 0x8000000;
+module_param(contiguousBase, ulong, 0644);
+
+long bankSize = 32 << 20;
+module_param(bankSize, long, 0644);
+
+int fastClear = -1;
+module_param(fastClear, int, 0644);
+
+int compression = -1;
+module_param(compression, int, 0644);
+
+int signal = 48;
+module_param(signal, int, 0644);
+
+ulong baseAddress = 0;
+module_param(baseAddress, ulong, 0644);
+
+int showArgs = 0;
+module_param(showArgs, int, 0644);
+ulong gpu_frequency = 312;
+module_param(gpu_frequency, ulong, 0644);
+
+
+#ifdef CONFIG_PXA_DVFM
+#include <mach/dvfm.h>
+#include <mach/pxa3xx_dvfm.h>
+#include <linux/delay.h>
+
+#define MRVL_CONFIG_PROC
+
+static int galcore_dvfm_notifier(struct notifier_block *nb,
+				unsigned long val, void *data);
+
+static struct notifier_block galcore_notifier_block = {
+	.notifier_call = galcore_dvfm_notifier,
+};
+#endif
+
+#ifdef MRVL_CONFIG_PROC
+#include <linux/proc_fs.h>
+#define GC_PROC_FILE    "driver/gc"
+static struct proc_dir_entry * gc_proc_file;
+
+/* cat /proc/driver/gc will print gc related msg */
+static ssize_t gc_proc_read(struct file *file,
+    char __user *buffer, size_t count, loff_t *offset)
+{
+	ssize_t len = 0;
+	char buf[1000];
+    gctUINT32 idle;
+    gctUINT32 clockControl;
+    
+    gcmVERIFY_OK(gcoHARDWARE_GetIdle(galDevice->kernel->hardware, gcvFALSE, &idle));
+	len += sprintf(buf+len, "idle register: 0x%02x\n", idle);
+    
+    gcoOS_ReadRegister(galDevice->os, 0x00000, &clockControl);
+    len += sprintf(buf+len, "clockControl register: 0x%02x\n", clockControl);
+
+	return simple_read_from_buffer(buffer, count, offset, buf, len);
+
+    return 0;
+}
+
+/* echo xx > /proc/driver/gc set ... */
+static ssize_t gc_proc_write(struct file *file,
+		const char *buff, size_t len, loff_t *off)
+{
+    char messages[256];
+
+	if(len > 256)
+		len = 256;
+
+	if(copy_from_user(messages, buff, len))
+		return -EFAULT;
+
+    printk("\n");
+    if(strncmp(messages, "d2debug", 7) == 0)
+    {
+        galDevice->needD2DebugInfo = galDevice->needD2DebugInfo ? gcvFALSE : gcvTRUE;
+    }
+    else if(strncmp(messages, "16", 2) == 0)
+    {
+		printk("frequency change to 1/16\n");
+        /* frequency change to 1/16 */
+        gcmVERIFY_OK(gcoOS_WriteRegister(galDevice->os,0x00000,0x210));
+        /* Loading the frequency scaler. */
+    	gcmVERIFY_OK(gcoOS_WriteRegister(galDevice->os,0x00000,0x010));
+        
+    }
+    else if(strncmp(messages, "32", 2) == 0)
+    {
+		printk("frequency change to 1/32\n");
+        /* frequency change to 1/32*/
+        gcmVERIFY_OK(gcoOS_WriteRegister(galDevice->os,0x00000,0x208));
+        /* Loading the frequency scaler. */
+    	gcmVERIFY_OK(gcoOS_WriteRegister(galDevice->os,0x00000,0x008));
+        
+    }
+	else if(strncmp(messages, "64", 2) == 0)
+    {
+		printk("frequency change to 1/64\n");
+        /* frequency change to 1/64 */
+        gcmVERIFY_OK(gcoOS_WriteRegister(galDevice->os,0x00000,0x204));
+        /* Loading the frequency scaler. */
+    	gcmVERIFY_OK(gcoOS_WriteRegister(galDevice->os,0x00000,0x004));
+        
+    }
+    else if('1' == messages[0])
+    {
+        printk("frequency change to full speed\n");
+        /* frequency change to full speed */
+        gcmVERIFY_OK(gcoOS_WriteRegister(galDevice->os,0x00000,0x300));
+        /* Loading the frequency scaler. */
+    	gcmVERIFY_OK(gcoOS_WriteRegister(galDevice->os,0x00000,0x100));
+        
+    }
+    else if('2' == messages[0])
+    {
+        printk("frequency change to 1/2\n");
+        /* frequency change to 1/2 */
+        gcmVERIFY_OK(gcoOS_WriteRegister(galDevice->os,0x00000,0x280));
+        /* Loading the frequency scaler. */
+    	gcmVERIFY_OK(gcoOS_WriteRegister(galDevice->os,0x00000,0x080));
+        
+    }
+    else if('4' == messages[0])
+    {
+        printk("frequency change to 1/4\n");
+        /* frequency change to 1/4 */
+        gcmVERIFY_OK(gcoOS_WriteRegister(galDevice->os,0x00000,0x240));
+        /* Loading the frequency scaler. */
+    	gcmVERIFY_OK(gcoOS_WriteRegister(galDevice->os,0x00000,0x040));
+        
+    }
+    else if('8' == messages[0])
+    {
+        printk("frequency change to 1/8\n");
+        /* frequency change to 1/8 */
+        gcmVERIFY_OK(gcoOS_WriteRegister(galDevice->os,0x00000,0x220));
+        /* Loading the frequency scaler. */
+    	gcmVERIFY_OK(gcoOS_WriteRegister(galDevice->os,0x00000,0x020));
+        
+    }
+    else
+    {
+        printk("unknown echo\n");
+    }
+
+    return len;
+}
+
+static struct file_operations gc_proc_ops = {
+	.read = gc_proc_read,
+	.write = gc_proc_write,
+};
+
+static void create_gc_proc_file(void)
+{
+	gc_proc_file = create_proc_entry(GC_PROC_FILE, 0644, NULL);
+	if (gc_proc_file) {
+		gc_proc_file->owner = THIS_MODULE;
+		gc_proc_file->proc_fops = &gc_proc_ops;
+	} else
+		printk("[galcore] proc file create failed!\n");
+}
+
+static void remove_gc_proc_file(void)
+{
+	remove_proc_entry(GC_PROC_FILE, NULL);
+}
+
+#endif
+
+static int drv_open(struct inode *inode, struct file *filp);
+static int drv_release(struct inode *inode, struct file *filp);
+static int drv_ioctl(struct inode *inode, struct file *filp,
+                     unsigned int ioctlCode, unsigned long arg);
+static int drv_mmap(struct file * filp, struct vm_area_struct * vma);
+
+struct file_operations driver_fops =
+{
+    .open   	= drv_open,
+    .release	= drv_release,
+    .ioctl  		= drv_ioctl,
+    .mmap   	= drv_mmap,
+};
+
+int drv_open(struct inode *inode, struct file* filp)
+{
+    gcsHAL_PRIVATE_DATA_PTR	private;
+
+    gcmTRACE_ZONE(gcvLEVEL_VERBOSE, gcvZONE_DRIVER,
+    	    	  "Entering drv_open\n");
+
+    private = kmalloc(sizeof(gcsHAL_PRIVATE_DATA), GFP_KERNEL);
+
+    if (private == gcvNULL)
+    {
+    	return -ENOTTY;
+    }
+
+    private->device				= galDevice;
+	private->mappedMemory		= gcvNULL;
+	private->contiguousLogical	= gcvNULL;
+#ifdef ANDROID
+	private->memoryRecordList.prev = &private->memoryRecordList;
+	private->memoryRecordList.next = &private->memoryRecordList;
+#endif
+
+	/* A process gets attached. */
+	gcmVERIFY_OK(
+		gcoKERNEL_AttachProcess(galDevice->kernel, gcvTRUE));
+
+    if (!galDevice->contiguousMapped)
+    {
+    	gcmVERIFY_OK(gcoOS_MapMemory(galDevice->os,
+									galDevice->contiguousPhysical,
+									galDevice->contiguousSize,
+									&private->contiguousLogical));
+    }
+
+    filp->private_data = private;
+
+    return 0;
+}
+
+extern void
+OnProcessExit(
+	IN gcoOS Os,
+	IN gcoKERNEL Kernel
+	);
+
+int drv_release(struct inode* inode, struct file* filp)
+{
+    gcsHAL_PRIVATE_DATA_PTR	private;
+    gcoGALDEVICE			device;
+
+    gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_DRIVER,
+    	    	  "Entering drv_close\n");
+
+    private = filp->private_data;
+    gcmASSERT(private != gcvNULL);
+
+    device = private->device;
+
+#ifdef ANDROID
+	gcmVERIFY_OK(gcoCOMMAND_Stall(device->kernel->command));
+
+	FreeAllMemoryRecord(galDevice->os, &private->memoryRecordList);
+
+	gcmVERIFY_OK(gcoCOMMAND_Stall(device->kernel->command));
+#else
+	OnProcessExit(galDevice->os, galDevice->kernel);
+#endif
+
+    if (private->contiguousLogical != gcvNULL)
+    {
+			gcmVERIFY_OK(gcoOS_UnmapMemory(galDevice->os,
+											galDevice->contiguousPhysical,
+											galDevice->contiguousSize,
+											private->contiguousLogical));
+     }
+
+
+	/* A process gets detached. */
+	gcmVERIFY_OK(
+		gcoKERNEL_AttachProcess(galDevice->kernel, gcvFALSE));
+
+    kfree(private);
+    filp->private_data = NULL;
+
+    return 0;
+}
+
+int drv_ioctl(struct inode *inode,
+    	      struct file *filp,
+    	      unsigned int ioctlCode,
+	      unsigned long arg)
+{
+    gcsHAL_INTERFACE interface;
+    gctUINT32 copyLen;
+    DRIVER_ARGS drvArgs;
+    gcoGALDEVICE device;
+    gceSTATUS status;
+    gcsHAL_PRIVATE_DATA_PTR private;
+
+    private = filp->private_data;
+
+    if (private == gcvNULL)
+    {
+    	gcmTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_DRIVER,
+    	    	      "[galcore] drv_ioctl: private_data is NULL\n");
+
+    	return -ENOTTY;
+    }
+
+    device = private->device;
+
+    if (device == gcvNULL)
+    {
+    	gcmTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_DRIVER,
+    	    	      "[galcore] drv_ioctl: device is NULL\n");
+
+    	return -ENOTTY;
+    }
+
+    if (ioctlCode != IOCTL_GCHAL_INTERFACE
+		&& ioctlCode != IOCTL_GCHAL_KERNEL_INTERFACE)
+    {
+        /* Unknown command. Fail the I/O. */
+        return -ENOTTY;
+    }
+
+    /* Get the drvArgs to begin with. */
+    copyLen = copy_from_user(&drvArgs,
+    	    	    	     (void *) arg,
+			     sizeof(DRIVER_ARGS));
+
+    if (copyLen != 0)
+    {
+    	/* The input buffer is not big enough. So fail the I/O. */
+        return -ENOTTY;
+    }
+
+    /* Now bring in the AQHAL_INTERFACE structure. */
+    if ((drvArgs.InputBufferSize  != sizeof(gcsHAL_INTERFACE))
+    ||  (drvArgs.OutputBufferSize != sizeof(gcsHAL_INTERFACE))
+    )
+    {
+        printk("\n [galcore] data structure size in kernel and user do not match !\n");
+    	return -ENOTTY;
+    }
+
+    copyLen = copy_from_user(&interface,
+    	    	    	     drvArgs.InputBuffer,
+			     sizeof(gcsHAL_INTERFACE));
+
+    if (copyLen != 0)
+    {
+        /* The input buffer is not big enough. So fail the I/O. */
+        return -ENOTTY;
+    }
+
+#ifdef ANDROID
+#if USE_EVENT_QUEUE
+	if (interface.command == gcvHAL_EVENT_COMMIT)
+	{
+		MEMORY_RECORD_PTR mr;
+		gcsQUEUE_PTR queue = interface.u.Event.queue;
+
+		while (queue != gcvNULL)
+		{
+			gcsQUEUE_PTR record, next;
+
+			/* Map record into kernel memory. */
+			gcmERR_BREAK(gcoOS_MapUserPointer(device->os,
+											  queue,
+											  gcmSIZEOF(gcsQUEUE),
+											  (gctPOINTER *) &record));
+
+			switch (record->interface.command)
+			{
+			case gcvHAL_FREE_VIDEO_MEMORY:
+				mr = FindMemoryRecord(device->os,
+									&private->memoryRecordList,
+									record->interface.u.FreeVideoMemory.node);
+
+				if (mr != gcvNULL)
+				{
+					DestoryMemoryRecord(device->os, mr);
+				}
+				else
+				{
+					printk("*ERROR* Invalid video memory (%p) for free\n",
+						record->interface.u.FreeVideoMemory.node);
+				}
+                break;
+
+			default:
+				break;
+			}
+
+			/* Next record in the queue. */
+			next = record->next;
+
+			/* Unmap record from kernel memory. */
+			gcmERR_BREAK(gcoOS_UnmapUserPointer(device->os,
+												queue,
+												gcmSIZEOF(gcsQUEUE),
+												(gctPOINTER *) record));
+			queue = next;
+		}
+	}
+#endif
+#endif
+
+    status = gcoKERNEL_Dispatch(device->kernel,
+		(ioctlCode == IOCTL_GCHAL_INTERFACE) , &interface);
+
+    if (gcmIS_ERROR(status))
+    {
+    	gcmTRACE_ZONE(gcvLEVEL_WARNING, gcvZONE_DRIVER,
+	    	      "[galcore] gcoKERNEL_Dispatch returned %d.\n",
+		      status);
+    }
+
+    else if (gcmIS_ERROR(interface.status))
+    {
+    	gcmTRACE_ZONE(gcvLEVEL_WARNING, gcvZONE_DRIVER,
+	    	      "[galcore] IOCTL %d returned %d.\n",
+		      interface.command,
+		      interface.status);
+    }
+
+    /* See if this was a LOCK_VIDEO_MEMORY command. */
+    else if (interface.command == gcvHAL_LOCK_VIDEO_MEMORY)
+    {
+    	/* Special case for mapped memory. */
+    	if (private->mappedMemory != gcvNULL
+		&& interface.u.LockVideoMemory.node->VidMem.memory->object.type
+			== gcvOBJ_VIDMEM)
+	{
+	    /* Compute offset into mapped memory. */
+	    gctUINT32 offset = (gctUINT8 *) interface.u.LockVideoMemory.memory
+	    	    	     - (gctUINT8 *) device->contiguousBase;
+
+    	    /* Compute offset into user-mapped region. */
+    	    interface.u.LockVideoMemory.memory =
+	    	(gctUINT8 *)  private->mappedMemory + offset;
+	}
+    }
+#ifdef ANDROID
+	else if (interface.command == gcvHAL_ALLOCATE_VIDEO_MEMORY)
+	{
+		CreateMemoryRecord(device->os,
+							&private->memoryRecordList,
+							interface.u.AllocateVideoMemory.node);
+	}
+	else if (interface.command == gcvHAL_ALLOCATE_LINEAR_VIDEO_MEMORY)
+	{
+		CreateMemoryRecord(device->os,
+							&private->memoryRecordList,
+							interface.u.AllocateLinearVideoMemory.node);
+	}
+	else if (interface.command == gcvHAL_FREE_VIDEO_MEMORY)
+	{
+		MEMORY_RECORD_PTR mr;
+
+		mr = FindMemoryRecord(device->os,
+							&private->memoryRecordList,
+							interface.u.FreeVideoMemory.node);
+
+		if (mr != gcvNULL)
+		{
+			DestoryMemoryRecord(device->os, mr);
+		}
+		else
+		{
+			printk("*ERROR* Invalid video memory for free\n");
+		}
+	}
+#endif
+
+    /* Copy data back to the user. */
+    copyLen = copy_to_user(drvArgs.OutputBuffer,
+    	    	    	   &interface,
+			   sizeof(gcsHAL_INTERFACE));
+
+    if (copyLen != 0)
+    {
+    	/* The output buffer is not big enough. So fail the I/O. */
+        return -ENOTTY;
+    }
+
+    return 0;
+}
+
+static int drv_mmap(struct file * filp, struct vm_area_struct * vma)
+{
+    gcsHAL_PRIVATE_DATA_PTR private = filp->private_data;
+    gcoGALDEVICE device;
+    int ret;
+    unsigned long size = vma->vm_end - vma->vm_start;
+
+    if (private == gcvNULL)
+    {
+    	return -ENOTTY;
+    }
+
+    device = private->device;
+
+    if (device == gcvNULL)
+    {
+        return -ENOTTY;
+    }
+
+    vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
+    vma->vm_flags    |= VM_IO | VM_DONTCOPY | VM_DONTEXPAND;
+    vma->vm_pgoff     = 0;
+
+    if (device->contiguousMapped)
+    {
+    	ret = io_remap_pfn_range(vma,
+	    	    	    	 vma->vm_start,
+    	    	    	    	 (gctUINT32) device->contiguousPhysical >> PAGE_SHIFT,
+				 size,
+				 vma->vm_page_prot);
+
+    	private->mappedMemory = (ret == 0) ? (gctPOINTER) vma->vm_start : gcvNULL;
+
+    	return ret;
+    }
+    else
+    {
+    	return -ENOTTY;
+    }
+}
+
+
+#if !USE_PLATFORM_DRIVER
+static int __init drv_init(void)
+#else
+static int drv_init(void)
+#endif
+{
+    int ret;
+    gcoGALDEVICE device;
+
+#if ENABLE_GPU_CLOCK_BY_DRIVER && LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28)
+    struct clk * clk = NULL;
+#endif
+
+    gcmTRACE_ZONE(gcvLEVEL_VERBOSE, gcvZONE_DRIVER,
+    	    	  "Entering drv_init\n");
+
+#if ENABLE_GPU_CLOCK_BY_DRIVER && LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28)
+    clk = clk_get(NULL, "GCCLK");
+    if (IS_ERR(clk))
+    {
+        int retval = PTR_ERR(clk);
+        printk("clk get error: %d\n", retval);
+        return retval;
+    }
+	printk("\n[galcore] clk input = %dM Hz; running on %dM Hz\n",(int)gpu_frequency, (int)gpu_frequency/2);
+    if (clk_set_rate(clk, gpu_frequency*1000*1000)) 
+    {
+       	gcmTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_DRIVER,
+    	    	      "[galcore] Can't set core clock to %d.",(int)gpu_frequency); 
+        return -EAGAIN;
+    }
+    clk_enable(clk);
+#endif
+
+	if (showArgs)
+	{
+		printk("galcore options:\n");
+		printk("  irqLine         = %d\n",      irqLine);
+		printk("  registerMemBase = 0x%08lX\n", registerMemBase);
+		printk("  contiguousSize  = %ld\n",     contiguousSize);
+		printk("  contiguousBase  = 0x%08lX\n", contiguousBase);
+		printk("  bankSize        = 0x%08lX\n", bankSize);
+		printk("  fastClear       = %d\n",      fastClear);
+		printk("  compression     = %d\n",      compression);
+		printk("  signal          = %d\n",      signal);
+		printk("  baseAddress     = 0x%08lX\n", baseAddress);
+	}
+
+    /* Create the GAL device. */
+    gcmVERIFY_OK(gcoGALDEVICE_Construct(irqLine,
+    	    	    	    	    	registerMemBase,
+					registerMemSize,
+					contiguousBase,
+					contiguousSize,
+					bankSize,
+					fastClear,
+					compression,
+					baseAddress,
+					signal,
+					&device));
+    printk("\n[galcore] chipModel=0x%x,chipRevision=0x%x,chipFeatures=0x%x,chipMinorFeatures=0x%x\n",
+        device->kernel->hardware->chipModel, device->kernel->hardware->chipRevision,
+        device->kernel->hardware->chipFeatures, device->kernel->hardware->chipMinorFeatures0);
+
+#ifdef CONFIG_PXA_DVFM
+    /* register galcore as a dvfm device*/
+    if(dvfm_register("Galcore", &device->dvfm_dev_index))
+    {
+        printk("\n[galcore] fail to do dvfm_register\n");
+    }
+
+    if(dvfm_register_notifier(&galcore_notifier_block,
+				DVFM_FREQUENCY_NOTIFIER))
+    {
+        printk("\n[galcore] fail to do dvfm_register_notifier\n");
+    }
+
+    device->dvfm_notifier = &galcore_notifier_block;
+
+    device->needResetAfterD2 = gcvTRUE;
+    device->needD2DebugInfo = gcvFALSE;
+
+    gcoOS_SetConstraint(device->os, gcvTRUE, gcvTRUE);
+#endif
+
+    device->enableLowPowerMode = gcvTRUE;
+    device->enableDVFM = gcvTRUE;
+
+    /* Start the GAL device. */
+    if (gcmIS_ERROR(gcoGALDEVICE_Start(device)))
+    {
+    	gcmTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_DRIVER,
+    	    	      "[galcore] Can't start the gal device.\n");
+
+    	/* Roll back. */
+    	gcoGALDEVICE_Stop(device);
+    	gcoGALDEVICE_Destroy(device);
+
+    	return -1;
+    }
+
+    /* Register the character device. */
+    ret = register_chrdev(major, DRV_NAME, &driver_fops);
+    if (ret < 0)
+    {
+    	gcmTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_DRIVER,
+    	    	      "[galcore] Could not allocate major number for mmap.\n");
+
+    	/* Roll back. */
+    	gcoGALDEVICE_Stop(device);
+    	gcoGALDEVICE_Destroy(device);
+
+    	return -1;
+    }
+    else
+    {
+    	if (major == 0)
+    	{
+    	    major = ret;
+    	}
+    }
+
+    galDevice = device;
+
+	gpuClass = class_create(THIS_MODULE, "v_graphics_class");
+	if (IS_ERR(gpuClass)) {
+    	gcmTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_DRIVER,
+					  "Failed to create the class.\n");
+		return -1;
+	}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28)
+	device_create(gpuClass, NULL, MKDEV(major, 0), NULL, "galcore");
+#else
+	device_create(gpuClass, NULL, MKDEV(major, 0), "galcore");
+#endif
+
+    gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_DRIVER,
+    	    	  "[galcore] irqLine->%ld, contiguousSize->%lu, memBase->0x%lX\n",
+		  irqLine,
+		  contiguousSize,
+		  registerMemBase);
+
+    gcmTRACE_ZONE(gcvLEVEL_VERBOSE, gcvZONE_DRIVER,
+    	    	  "[galcore] driver registered successfully.\n");
+
+    /* device should be idle because it is just initialized */
+    gcoOS_NotifyIdle(device->os, gcvTRUE);
+    return 0;
+}
+
+#if !USE_PLATFORM_DRIVER
+static void __exit drv_exit(void)
+#else
+static void drv_exit(void)
+#endif
+{
+#if ENABLE_GPU_CLOCK_BY_DRIVER && LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28)
+    struct clk * clk = NULL;
+#endif
+    gcmTRACE_ZONE(gcvLEVEL_VERBOSE, gcvZONE_DRIVER,
+    	    	  "[galcore] Entering drv_exit\n");
+
+	device_destroy(gpuClass, MKDEV(major, 0));
+	class_destroy(gpuClass);
+
+    unregister_chrdev(major, DRV_NAME);
+
+    gcoGALDEVICE_Stop(galDevice);
+
+#ifdef CONFIG_PXA_DVFM
+    gcoOS_UnSetConstraint(galDevice->os, gcvTRUE, gcvTRUE);
+
+    if(dvfm_unregister_notifier(&galcore_notifier_block,
+				DVFM_FREQUENCY_NOTIFIER))
+    {
+        printk("\n[galcore] fail to do dvfm_unregister_notifier\n");
+    }
+		
+    if(dvfm_unregister("Galcore", &galDevice->dvfm_dev_index))
+    {
+        printk("\n[galcore] fail to do dvfm_unregister\n");
+    }
+#endif
+
+    gcoGALDEVICE_Destroy(galDevice);
+
+#if ENABLE_GPU_CLOCK_BY_DRIVER && LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28)
+    clk = clk_get(NULL, "GCCLK");
+    clk_disable(clk);
+#endif
+    
+}
+
+#if !USE_PLATFORM_DRIVER
+module_init(drv_init);
+module_exit(drv_exit);
+#else
+
+#ifdef CONFIG_DOVE_GPU
+#ifndef ANDROID
+#define DEVICE_NAME "galcore"
+#else
+#define DEVICE_NAME "galcore"
+#endif
+#else
+#define DEVICE_NAME "galcore"
+#endif
+
+#ifdef ANDROID
+static void gpu_early_suspend(struct early_suspend *h)
+{
+    printk("[galcore]: %s\n",__func__);
+	/*pm_message_t t;
+	if (gpu_suspend != NULL)
+		gpu_suspend(NULL, t);*/
+}
+static void gpu_late_resume(struct early_suspend *h)
+{
+    printk("[galcore]: %s\n",__func__);
+	/*if (gpu_resume != NULL)
+		gpu_resume(NULL);*/
+}
+static struct early_suspend gpu_early_suspend_desc = {
+	.suspend = gpu_early_suspend,
+	.resume = gpu_late_resume,
+};
+#endif
+static int __devinit gpu_probe(struct platform_device *pdev)
+{
+	int ret = -ENODEV;
+	struct resource *res;
+	res = platform_get_resource_byname(pdev, IORESOURCE_IRQ,"gpu_irq");
+	if (!res) {
+		printk(KERN_ERR "%s: No irq line supplied.\n",__FUNCTION__);
+		goto gpu_probe_fail;
+	}
+	irqLine = res->start;
+
+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM,"gpu_base");
+	if (!res) {
+		printk(KERN_ERR "%s: No register base supplied.\n",__FUNCTION__);
+		goto gpu_probe_fail;
+	}
+	registerMemBase = res->start;
+	registerMemSize = res->end - res->start;
+
+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM,"gpu_mem");
+	if (!res) {
+		printk(KERN_ERR "%s: No memory base supplied.\n",__FUNCTION__);
+		goto gpu_probe_fail;
+	}
+	contiguousBase  = res->start;
+	contiguousSize  = res->end-res->start;
+
+	ret = drv_init();
+
+    if (ret < 0)
+    {
+     	printk(KERN_ERR "%s: gpu_probe failed.\n",__FUNCTION__);
+		goto gpu_probe_fail;
+    }
+
+    platform_set_drvdata(pdev, galDevice);
+    
+#ifdef MRVL_CONFIG_PROC
+    create_gc_proc_file();
+#endif
+
+#ifdef ANDROID
+    register_early_suspend(&gpu_early_suspend_desc);
+#endif
+
+    return ret;
+
+gpu_probe_fail:
+	printk(KERN_INFO "Failed to register gpu driver.\n");
+	return ret;
+}
+
+static int __devinit gpu_remove(struct platform_device *pdev)
+{
+	drv_exit();
+
+#ifdef MRVL_CONFIG_PROC
+    remove_gc_proc_file();
+#endif
+
+#ifdef ANDROID
+    unregister_early_suspend(&gpu_early_suspend_desc);
+#endif
+
+	return 0;
+}
+
+static int __devinit gpu_suspend(struct platform_device *dev, pm_message_t state)
+{
+	gceSTATUS status;
+	gcoGALDEVICE device;
+    struct clk * clk = NULL;    
+
+    printk("[galcore]: %s\n",__func__);
+    
+	device = platform_get_drvdata(dev);
+
+#if 1
+    if(device->kernel->hardware->chipPowerState != gcvPOWER_OFF)
+    {
+        status = gcoHARDWARE_SetPowerManagementState(device->kernel->hardware, gcvPOWER_OFF);
+    	if (gcmIS_ERROR(status))
+    	{
+    		return -1;
+    	}
+        
+        disable_irq(galDevice->irqLine);
+
+        clk = clk_get(NULL, "GCCLK");
+        clk_disable(clk);
+    }
+#ifdef CONFIG_PXA_DVFM
+    galDevice->needResetAfterD2 = gcvFALSE;
+#endif
+#else
+
+	status = gcoHARDWARE_SetPowerManagementState(device->kernel->hardware, gcvPOWER_OFF);
+
+	if (gcmIS_ERROR(status))
+	{
+		return -1;
+	}
+#endif
+
+    gcoOS_UnSetConstraint(galDevice->os, gcvTRUE, gcvTRUE);
+
+	return 0;
+}
+
+static int __devinit gpu_resume(struct platform_device *dev)
+{
+	gceSTATUS status;
+	gcoGALDEVICE device;
+    struct clk * clk = NULL;
+
+    printk("[galcore]: %s\n",__func__);
+
+	device = platform_get_drvdata(dev);
+
+    gcoOS_SetConstraint(galDevice->os, gcvTRUE, gcvTRUE);
+	
+#if 1
+    if(device->kernel->hardware->chipPowerState != gcvPOWER_ON)
+    {
+        clk = clk_get(NULL, "GCCLK");
+        if (IS_ERR(clk)) 
+        {
+            int retval = PTR_ERR(clk);
+            printk("clk get error\n");
+            return retval;
+        }    	    	  
+
+        if (clk_set_rate(clk, gpu_frequency*1000*1000)) 
+        { 
+           	gcmTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_DRIVER,
+        	    	      "[galcore] Can't set core clock."); 
+            return -EAGAIN;
+        }
+        clk_enable(clk);
+
+        enable_irq(device->irqLine);
+
+        status = gcoHARDWARE_SetPowerManagementState(device->kernel->hardware, gcvPOWER_ON);
+    	if (gcmIS_ERROR(status))
+    	{
+    		return -1;
+    	}
+    }
+#ifdef CONFIG_PXA_DVFM
+    galDevice->needResetAfterD2 = gcvTRUE;
+#endif    
+#else     
+
+	status = gcoHARDWARE_SetPowerManagementState(device->kernel->hardware, gcvPOWER_ON);
+	if (gcmIS_ERROR(status))
+	{
+		return -1;
+	}
+
+#endif     
+
+	return 0;
+}
+
+static struct platform_driver gpu_driver = {
+	.probe		= gpu_probe,
+	.remove		= gpu_remove,
+
+	.suspend	= gpu_suspend,
+	.resume		= gpu_resume,
+
+	.driver		= {
+		.name	= DEVICE_NAME,
+	}
+};
+
+#ifndef CONFIG_DOVE_GPU
+
+static struct resource gpu_resources[] = {
+    {
+        .name   = "gpu_irq",
+        .flags  = IORESOURCE_IRQ,
+    },
+    {
+        .name   = "gpu_base",
+        .flags  = IORESOURCE_MEM,
+    },
+    {
+        .name   = "gpu_mem",
+        .flags  = IORESOURCE_MEM,
+    },
+};
+
+static struct platform_device * gpu_device;
+
+#endif
+
+static int __init gpu_init(void)
+{
+	int ret = 0;
+
+#ifndef CONFIG_DOVE_GPU
+	gpu_resources[0].start = gpu_resources[0].end = irqLine;
+
+	gpu_resources[1].start = registerMemBase;
+	gpu_resources[1].end   = registerMemBase + registerMemSize;
+
+	gpu_resources[2].start = contiguousBase;
+	gpu_resources[2].end   = contiguousBase + contiguousSize;
+
+	/* Allocate device */
+	gpu_device = platform_device_alloc(DEVICE_NAME, -1);
+	if (!gpu_device)
+	{
+		printk(KERN_ERR "galcore: platform_device_alloc failed.\n");
+		ret = -ENOMEM;
+		goto out;
+	}
+
+	/* Insert resource */
+	ret = platform_device_add_resources(gpu_device, gpu_resources, 3);
+	if (ret)
+	{
+		printk(KERN_ERR "galcore: platform_device_add_resources failed.\n");
+		goto put_dev;
+	}
+
+	/* Add device */
+	ret = platform_device_add(gpu_device);
+	if (ret)
+	{
+		printk(KERN_ERR "galcore: platform_device_add failed.\n");
+		goto del_dev;
+	}
+#endif
+
+	ret = platform_driver_register(&gpu_driver);
+	if (!ret)
+	{
+		goto out;
+	}
+
+#ifndef CONFIG_DOVE_GPU
+del_dev:
+	platform_device_del(gpu_device);
+put_dev:
+	platform_device_put(gpu_device);
+#endif
+
+out:
+	return ret;
+
+}
+
+static void __exit gpu_exit(void)
+{
+	platform_driver_unregister(&gpu_driver);
+#ifndef CONFIG_DOVE_GPU
+	platform_device_unregister(gpu_device);
+#endif
+}
+
+module_init(gpu_init);
+module_exit(gpu_exit);
+
+#endif
+
+#ifdef CONFIG_PXA_DVFM
+//#define TRACE printk("%s,%d\n",__func__,__LINE__);
+static int galcore_dvfm_notifier(struct notifier_block *nb,
+				unsigned long val, void *data)
+{
+    struct dvfm_freqs *freqs = (struct dvfm_freqs *)data;
+	struct op_info *new = NULL;
+	struct dvfm_md_opt *md;
+
+    gctUINT32 idle;
+    
+#if MRVL_LOW_POWER_MODE_DEBUG 
+    int strlen = 0;
+#endif
+
+	if (freqs)
+		new = &freqs->new_info;
+	else
+		return 0;
+	md = (struct dvfm_md_opt *)new->op;
+
+#if MRVL_LOW_POWER_MODE_DEBUG 
+/*    strlen = sprintf(galDevice->kernel->kernelMSG + galDevice->kernel->msgLen,"md->power_mode=%d\n",md->power_mode); \
+     galDevice->kernel->msgLen += strlen;
+*/
+#endif
+
+	switch (val) {
+	case DVFM_FREQ_PRECHANGE:
+		if ((md->power_mode == POWER_MODE_D1) ||
+			(md->power_mode == POWER_MODE_D2) ||
+			(md->power_mode == POWER_MODE_CG)) {
+#if MRVL_LOW_POWER_MODE_DEBUG           			
+            {
+    			strlen = sprintf(galDevice->kernel->kernelMSG + galDevice->kernel->msgLen,"[galcore] enter D2\n"); \
+                galDevice->kernel->msgLen += strlen;
+
+    			gcmVERIFY_OK(gcoHARDWARE_GetIdle(galDevice->kernel->hardware, gcvFALSE, &idle));
+                strlen = sprintf(galDevice->kernel->kernelMSG + galDevice->kernel->msgLen,"Idle register = 0x%08X\n",idle); \
+                galDevice->kernel->msgLen += strlen;
+            }
+#endif
+            if(galDevice->needResetAfterD2)
+            {
+                if(galDevice->kernel->hardware->chipPowerState != gcvPOWER_OFF)
+                {
+                    gceSTATUS  status;
+                	gcoCOMMAND command;
+                	gctPOINTER buffer;
+                	gctSIZE_T  bytes, requested;
+
+                    command = galDevice->kernel->command;
+                    
+                    // stall
+                	{
+                		/* Acquire the context switching mutex so nothing else can be
+                		** committed. */
+                		gcmONERROR(
+                			gcoOS_AcquireMutex(galDevice->kernel->hardware->os,
+                							   command->mutexContext,
+                							   gcvINFINITE));
+    
+                		/* Get the size of the flush command. */
+                		gcmONERROR(
+                			gcoHARDWARE_Flush(galDevice->kernel->hardware,
+                							  ~0,
+                							  gcvNULL,
+                							  &requested));
+    
+                		/* Reserve space in the command queue. */
+                		gcmONERROR(
+                			gcoCOMMAND_Reserve(command,
+                							   requested,
+                							   &buffer,
+                							   &bytes));
+    
+                		/* Append a flush. */
+                		gcmONERROR(
+                			gcoHARDWARE_Flush(galDevice->kernel->hardware,
+                							  ~0,
+                							  buffer,
+                							  &bytes));
+    
+                		/* Execute the command queue. */
+                		gcmONERROR(
+                			gcoCOMMAND_Execute(command,
+                							   requested));
+    
+                		/* Wait to finish all commands. */
+                		//gcmONERROR(gcoCOMMAND_Stall2(command));
+                	}
+    
+                	// stop
+                	{
+                		/* Stop the command parser. */
+                		gcmONERROR(
+                			gcoCOMMAND_Stop(command));
+    
+                		/* Grab the command queue mutex so nothing can get access to the
+                		** command queue. */
+                		gcmONERROR(
+                			gcoOS_AcquireMutex(galDevice->kernel->hardware->os,
+                							   command->mutexQueue,
+                							   gcvINFINITE));
+                	}
+    
+            		
+                    disable_irq(galDevice->irqLine);
+                    clk_disable(clk_get(NULL, "GCCLK"));
+
+                    galDevice->kernel->hardware->chipPowerState = gcvPOWER_OFF;
+                }
+            }
+		}
+		break;
+	case DVFM_FREQ_POSTCHANGE:
+		/* It's existing from D1/D2.
+		 * And new op_info won't be changed.
+		 */
+		if ((md->power_mode == POWER_MODE_D1) ||
+			(md->power_mode == POWER_MODE_D2) ||
+			(md->power_mode == POWER_MODE_CG)) {
+			
+            static int count = 0;
+            if(galDevice->needResetAfterD2)
+            {
+                if(galDevice->kernel->hardware->chipPowerState != gcvPOWER_ON)
+                {
+                    gceSTATUS  status;
+                    
+                    clk_enable(clk_get(NULL, "AXICLK"));
+                    clk_enable(clk_get(NULL, "GCCLK"));
+                    enable_irq(galDevice->irqLine);
+    
+                    // INITIALIZE
+                	{
+                		/* Initialize hardware. */
+                		gcmONERROR(
+                			gcoHARDWARE_InitializeHardware(galDevice->kernel->hardware));
+    
+                		gcmONERROR(
+                			gcoHARDWARE_SetFastClear(galDevice->kernel->hardware,
+                									 galDevice->kernel->hardware->allowFastClear,
+                									 galDevice->kernel->hardware->allowCompression));
+    
+                		/* Force the command queue to reload the next context. */
+                		galDevice->kernel->command->currentContext = 0;
+                	}
+
+                	/* Sleep for 1ms, to make sure everything is powered on. */
+                	mdelay(1);//gcmVERIFY_OK(gcoOS_Delay(galDevice->os, 1));
+    
+                	// start
+                	{
+                		/* Release the command mutex queue. */
+                		gcmONERROR(
+                			gcoOS_ReleaseMutex(galDevice->kernel->hardware->os,
+                							   galDevice->kernel->command->mutexQueue));
+    
+                		/* Start the command processor. */
+                		gcmONERROR(
+                			gcoCOMMAND_Start(galDevice->kernel->command));
+                	}
+    
+                	// RELEASE_CONTEXT
+                	{
+                		/* Release the context switching mutex. */
+                		gcmVERIFY_OK(
+                			gcoOS_ReleaseMutex(galDevice->kernel->hardware->os,
+                							   galDevice->kernel->command->mutexContext));
+                	}
+    
+                    galDevice->kernel->hardware->chipPowerState = gcvPOWER_ON;
+                }
+                
+                /* Read idle register. */
+            	gcmVERIFY_OK(gcoHARDWARE_GetIdle(galDevice->kernel->hardware, gcvFALSE, &idle));
+
+                if(galDevice->needD2DebugInfo)
+                    printk("%d: reset after power mode %d: 0x%08X\n",count++,md->power_mode,idle);
+            }
+            else
+            {
+                if(galDevice->needD2DebugInfo)
+                    printk("%d: no reset after power mode %d: 0x%08X\n",count++,md->power_mode,idle);
+            }
+#if MRVL_LOW_POWER_MODE_DEBUG
+            {
+                int i = 0;
+                
+                printk(">>>>>>>>>>>>galDevice->kernel->kernelMSG\n");
+                printk("galDevice->kernel->msgLen=%d\n",galDevice->kernel->msgLen);
+                
+                for(i=0;i<galDevice->kernel->msgLen;i+=1024)
+                {
+                    galDevice->kernel->kernelMSG[i+1023] = '\0';
+            	    printk("%s\n",(char*)galDevice->kernel->kernelMSG + i);
+                }
+            }
+#endif
+
+		}
+		break;
+	}
+	return 0;
+
+OnError:
+	printk("ERROR: %s has error \n",__func__);
+    
+    return 0;
+}
+
+#endif
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/gc_hal_kernel_linux.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/gc_hal_kernel_linux.h
@@ -0,0 +1,90 @@
+/****************************************************************************
+*
+*    Copyright (C) 2005 - 2010 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public License as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+#ifndef __gc_hal_kernel_linux_h_
+#define __gc_hal_kernel_linux_h_
+
+#include <linux/version.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/fs.h>
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/signal.h>
+#ifdef FLAREON
+#   include <asm/arch-realview/dove_gpio_irq.h>
+#endif
+#include <linux/interrupt.h>
+#include <linux/vmalloc.h>
+#include <linux/dma-mapping.h>
+#include <linux/kthread.h>
+
+#ifdef ANDROID
+#include <linux/earlysuspend.h>
+#endif
+#ifdef MODVERSIONS
+#  include <linux/modversions.h>
+#endif
+#include <asm/io.h>
+#include <asm/uaccess.h>
+
+#include <linux/clk.h>
+
+#define NTSTRSAFE_NO_CCH_FUNCTIONS
+#include "gc_hal.h"
+#include "gc_hal_driver.h"
+#include "gc_hal_kernel.h"
+#include "gc_hal_kernel_device.h"
+#include "gc_hal_kernel_os.h"
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,31)
+#define FIND_TASK_BY_PID(x) pid_task(find_vpid(x), PIDTYPE_PID)
+#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)
+#define FIND_TASK_BY_PID(x) find_task_by_vpid(x)
+#else
+#define FIND_TASK_BY_PID(x) find_task_by_pid(x)
+#endif
+
+#define _WIDE(string)				L##string
+#define WIDE(string)				_WIDE(string)
+
+#define countof(a)					(sizeof(a) / sizeof(a[0]))
+
+#define DRV_NAME          			"galcore"
+
+#define GetPageCount(size, offset) 	((((size) + ((offset) & ~PAGE_CACHE_MASK)) + PAGE_CACHE_SIZE - 1) >> PAGE_CACHE_SHIFT)
+
+static inline gctINT
+GetOrder(
+	IN gctINT numPages
+	)
+{
+    gctINT order = 0;
+
+	while ((1 << order) <  numPages) order++;
+
+	return order;
+}
+
+#endif /* __gc_hal_kernel_linux_h_ */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/gc_hal_kernel_device.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/gc_hal_kernel_device.c
@@ -0,0 +1,919 @@
+/****************************************************************************
+*
+*    Copyright (C) 2005 - 2010 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public License as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+#include "gc_hal_kernel_linux.h"
+#include <linux/pagemap.h>
+#include <linux/seq_file.h>
+#include <linux/mm.h>
+#include <linux/mman.h>
+
+#define _GC_OBJ_ZONE	gcvZONE_DEVICE
+
+#ifdef FLAREON
+static struct dove_gpio_irq_handler gc500_handle;
+#endif
+
+/******************************************************************************\
+******************************** gckGALDEVICE Code *******************************
+\******************************************************************************/
+
+gceSTATUS
+gckGALDEVICE_AllocateMemory(
+	IN gckGALDEVICE Device,
+	IN gctSIZE_T Bytes,
+    OUT gctPOINTER *Logical,
+    OUT gctPHYS_ADDR *Physical,
+    OUT gctUINT32 *PhysAddr
+	)
+{
+	gceSTATUS status;
+
+	gcmkVERIFY_ARGUMENT(Device != NULL);
+	gcmkVERIFY_ARGUMENT(Logical != NULL);
+	gcmkVERIFY_ARGUMENT(Physical != NULL);
+	gcmkVERIFY_ARGUMENT(PhysAddr != NULL);
+
+	status = gckOS_AllocateContiguous(Device->os,
+					  gcvFALSE,
+					  &Bytes,
+					  Physical,
+					  Logical);
+
+	if (gcmIS_ERROR(status))
+	{
+		gcmkTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_DRIVER,
+				   "gckGALDEVICE_AllocateMemory: error status->0x%x",
+				   status);
+
+		return status;
+	}
+
+	*PhysAddr = ((PLINUX_MDL)*Physical)->dmaHandle - Device->baseAddress;
+	gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_DRIVER,
+			   "gckGALDEVICE_AllocateMemory: phys_addr->0x%x phsical->0x%x Logical->0x%x",
+		   (gctUINT32)*Physical,
+				   (gctUINT32)*PhysAddr,
+				   (gctUINT32)*Logical);
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+gceSTATUS
+gckGALDEVICE_FreeMemory(
+	IN gckGALDEVICE Device,
+	IN gctPOINTER Logical,
+	IN gctPHYS_ADDR Physical)
+{
+	gcmkVERIFY_ARGUMENT(Device != NULL);
+
+    return gckOS_FreeContiguous(Device->os,
+					Physical,
+					Logical,
+					((PLINUX_MDL)Physical)->numPages*PAGE_SIZE);
+}
+
+irqreturn_t isrRoutine(int irq, void *ctxt)
+{
+    gckGALDEVICE device = (gckGALDEVICE) ctxt;
+    int handled = 0;
+
+    /* Call kernel interrupt notification. */
+    if (gckKERNEL_Notify(device->kernel,
+						gcvNOTIFY_INTERRUPT,
+						gcvTRUE) == gcvSTATUS_OK)
+    {
+		device->dataReady = gcvTRUE;
+
+		up(&device->sema);
+
+		handled = 1;
+    }
+
+    return IRQ_RETVAL(handled);
+}
+
+int threadRoutine(void *ctxt)
+{
+    gckGALDEVICE device = (gckGALDEVICE) ctxt;
+
+	gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_DRIVER,
+				   "Starting isr Thread with extension->0x%p\n",
+				   device);
+
+	while (1)
+	{
+
+		if(down_interruptible(&device->sema) == 0)
+		{
+		device->dataReady = gcvFALSE;
+
+		if (device->killThread == gcvTRUE)
+		{
+			return 0;
+		}
+
+        /* Wait for the interrupt. */
+		if (kthread_should_stop())
+		{
+			return 0;
+		}
+
+		gckKERNEL_Notify(device->kernel, gcvNOTIFY_INTERRUPT, gcvFALSE);
+    }
+    }
+
+    return 0;
+}
+
+
+#if MRVL_TIMER
+
+int timer_thread(void *ctxt)
+{
+    gckGALDEVICE device = (gckGALDEVICE) ctxt;
+    int idle;
+
+	while (1)
+	{
+		if(down_interruptible(&device->timersema) == 0)
+		{
+            gckHARDWARE_GetIdle(device->kernel->hardware,
+										gcvFALSE,
+										&idle);
+
+            printk("idle = %x\n", idle);
+        }
+    }
+
+    return 0;
+}
+
+void timer_fn(unsigned long arg)
+{
+    gckGALDEVICE device = (gckGALDEVICE) arg;
+
+    up(&device->timersema);
+
+    /* triggle per second */
+    mod_timer(&device->timer, jiffies + HZ);
+}
+#endif
+
+/*******************************************************************************
+**
+**	gckGALDEVICE_Setup_ISR
+**
+**	Start the ISR routine.
+**
+**	INPUT:
+**
+**		gckGALDEVICE Device
+**			Pointer to an gckGALDEVICE object.
+**
+**	OUTPUT:
+**
+**		Nothing.
+**
+**	RETURNS:
+**
+**		gcvSTATUS_OK
+**			Setup successfully.
+**		gcvSTATUS_GENERIC_IO
+**			Setup failed.
+*/
+gceSTATUS
+gckGALDEVICE_Setup_ISR(
+	IN gckGALDEVICE Device
+	)
+{
+	gctINT ret;
+
+	gcmkVERIFY_ARGUMENT(Device != NULL);
+
+	if (Device->irqLine == 0)
+	{
+		return gcvSTATUS_GENERIC_IO;
+	}
+
+	/* Hook up the isr based on the irq line. */
+#ifdef FLAREON
+	gc500_handle.dev_name = "galcore interrupt service";
+	gc500_handle.dev_id = Device;
+	gc500_handle.handler = isrRoutine;
+	gc500_handle.intr_gen = GPIO_INTR_LEVEL_TRIGGER;
+	gc500_handle.intr_trig = GPIO_TRIG_HIGH_LEVEL;
+	ret = dove_gpio_request (DOVE_GPIO0_7, &gc500_handle);
+#else
+	ret = request_irq(Device->irqLine,
+				isrRoutine,
+				IRQF_DISABLED,
+				"galcore interrupt service",
+				Device);
+#endif
+
+
+	if (ret != 0) {
+		gcmkTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_DRIVER,
+		"[galcore] gckGALDEVICE_Setup_ISR: "
+				"Could not register irq line->%d\n",
+				Device->irqLine);
+
+		Device->isrInitialized = gcvFALSE;
+
+		return gcvSTATUS_GENERIC_IO;
+	}
+
+	Device->isrInitialized = gcvTRUE;
+
+	gcmkTRACE_ZONE(gcvLEVEL_INFO,
+				gcvZONE_DRIVER,
+		"[galcore] gckGALDEVICE_Setup_ISR: "
+				"Setup the irq line->%d\n",
+				Device->irqLine);
+
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckGALDEVICE_Release_ISR
+**
+**	Release the irq line.
+**
+**	INPUT:
+**
+**		gckGALDEVICE Device
+**			Pointer to an gckGALDEVICE object.
+**
+**	OUTPUT:
+**
+**		Nothing.
+**
+**	RETURNS:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckGALDEVICE_Release_ISR(
+	IN gckGALDEVICE Device
+	)
+{
+	gcmkVERIFY_ARGUMENT(Device != NULL);
+
+	/* release the irq */
+	if (Device->isrInitialized)
+	{
+#ifdef FLAREON
+		dove_gpio_free (DOVE_GPIO0_7, "galcore interrupt service");
+#else
+		free_irq(Device->irqLine, Device);
+#endif
+	}
+
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckGALDEVICE_Start_Thread
+**
+**	Start the daemon thread.
+**
+**	INPUT:
+**
+**		gckGALDEVICE Device
+**			Pointer to an gckGALDEVICE object.
+**
+**	OUTPUT:
+**
+**		Nothing.
+**
+**	RETURNS:
+**
+**		gcvSTATUS_OK
+**			Start successfully.
+**		gcvSTATUS_GENERIC_IO
+**			Start failed.
+*/
+gceSTATUS
+gckGALDEVICE_Start_Thread(
+	IN gckGALDEVICE Device
+	)
+{
+	gcmkVERIFY_ARGUMENT(Device != NULL);
+
+	/* start the kernel thread */
+    Device->threadCtxt = kthread_run(threadRoutine,
+					Device,
+					"galcore daemon thread");
+
+	Device->threadInitialized = gcvTRUE;
+	gcmkTRACE_ZONE(gcvLEVEL_INFO,
+					gcvZONE_DRIVER,
+					"[galcore] gckGALDEVICE_Start_Thread: "
+					"Stat the daemon thread.\n");
+
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckGALDEVICE_Stop_Thread
+**
+**	Stop the gal device, including the following actions: stop the daemon
+**	thread, release the irq.
+**
+**	INPUT:
+**
+**		gckGALDEVICE Device
+**			Pointer to an gckGALDEVICE object.
+**
+**	OUTPUT:
+**
+**		Nothing.
+**
+**	RETURNS:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckGALDEVICE_Stop_Thread(
+	gckGALDEVICE Device
+	)
+{
+	gcmkVERIFY_ARGUMENT(Device != NULL);
+
+	/* stop the thread */
+	if (Device->threadInitialized)
+	{
+		Device->killThread = gcvTRUE;
+		up(&Device->sema);
+
+		kthread_stop(Device->threadCtxt);
+	}
+
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckGALDEVICE_Start
+**
+**	Start the gal device, including the following actions: setup the isr routine
+**  and start the daemoni thread.
+**
+**	INPUT:
+**
+**		gckGALDEVICE Device
+**			Pointer to an gckGALDEVICE object.
+**
+**	OUTPUT:
+**
+**		Nothing.
+**
+**	RETURNS:
+**
+**		gcvSTATUS_OK
+**			Start successfully.
+*/
+gceSTATUS
+gckGALDEVICE_Start(
+	IN gckGALDEVICE Device
+	)
+{
+	/* start the daemon thread */
+	gcmkVERIFY_OK(gckGALDEVICE_Start_Thread(Device));
+
+	/* setup the isr routine */
+	gcmkVERIFY_OK(gckGALDEVICE_Setup_ISR(Device));
+
+    /*
+       gcvPOWER_SUSPEND will stop GC and disable 2D/3D clk.
+       Since frequency scaling is enabled, disable 2D/3D clk will gain little
+       but lead to potential issue. I prefer not change power state here.
+    */
+#if 0
+	/* Switch to SUSPEND power state. */
+	gcmkVERIFY_OK(
+		gckHARDWARE_SetPowerManagementState(Device->kernel->hardware,
+											gcvPOWER_SUSPEND));
+#endif
+
+#if MRVL_TIMER
+    sema_init(&Device->timersema, 0);
+    init_timer(&Device->timer);
+
+    Device->timerthread = kthread_run(timer_thread,
+					Device,
+					"timer thread");
+
+    Device->timer.data = (unsigned long)Device;
+    Device->timer.function = timer_fn;
+    /* triggle per second */
+    Device->timer.expires = jiffies + HZ;
+    add_timer(&Device->timer);
+#endif
+
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckGALDEVICE_Stop
+**
+**	Stop the gal device, including the following actions: stop the daemon
+**	thread, release the irq.
+**
+**	INPUT:
+**
+**		gckGALDEVICE Device
+**			Pointer to an gckGALDEVICE object.
+**
+**	OUTPUT:
+**
+**		Nothing.
+**
+**	RETURNS:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckGALDEVICE_Stop(
+    gckGALDEVICE Device
+    )
+{
+    gcmkVERIFY_ARGUMENT(Device != NULL);
+
+    /*
+       There is not need to change power state here
+    */
+#if 0
+	/* Switch to ON power state. */
+	gcmkVERIFY_OK(
+		gckHARDWARE_SetPowerManagementState(Device->kernel->hardware,
+											gcvPOWER_ON));
+#endif
+    if (Device->isrInitialized)
+    {
+	gckGALDEVICE_Release_ISR(Device);
+    }
+
+    if (Device->threadInitialized)
+    {
+	gckGALDEVICE_Stop_Thread(Device);
+    }
+
+#if MRVL_TIMER
+    del_timer(&Device->timer);
+    kthread_stop(Device->timerthread);
+#endif
+
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**  gckGALDEVICE_Construct
+**
+**  Constructor.
+**
+**  INPUT:
+**
+**  OUTPUT:
+**
+**  	gckGALDEVICE * Device
+**  	    Pointer to a variable receiving the gckGALDEVICE object pointer on
+**  	    success.
+*/
+gceSTATUS
+gckGALDEVICE_Construct(
+    IN gctINT IrqLine,
+    IN gctUINT32 RegisterMemBase,
+    IN gctSIZE_T RegisterMemSize,
+    IN gctUINT32 ContiguousBase,
+    IN gctSIZE_T ContiguousSize,
+    IN gctSIZE_T BankSize,
+    IN gctINT FastClear,
+	IN gctINT Compression,
+	IN gctUINT32 BaseAddress,
+	IN gctINT Signal,
+    OUT gckGALDEVICE *Device
+    )
+{
+    gctUINT32 internalBaseAddress, internalAlignment;
+    gctUINT32 externalBaseAddress, externalAlignment;
+    gctUINT32 horizontalTileSize, verticalTileSize;
+    gctUINT32 physAddr;
+    gctUINT32 physical;
+    gckGALDEVICE device;
+    gceSTATUS status;
+
+    gcmkTRACE(gcvLEVEL_VERBOSE, "[galcore] Enter gckGALDEVICE_Construct\n");
+
+    printk("\n[galcore] registerBase =0x%08x, registerMemSize = 0x%08x, contiguousBase= 0x%08x, contiguousSize = 0x%08x\n",
+              (gctUINT32)RegisterMemBase, (gctUINT32)RegisterMemSize, (gctUINT32)ContiguousBase, (gctUINT32)ContiguousSize);
+    /* Allocate device structure. */
+    device = kmalloc(sizeof(struct _gckGALDEVICE), GFP_KERNEL);
+    if (!device)
+    {
+	gcmkTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_DRIVER,
+		      "[galcore] gckGALDEVICE_Construct: Can't allocate memory.\n");
+
+	return gcvSTATUS_OUT_OF_MEMORY;
+    }
+    memset(device, 0, sizeof(struct _gckGALDEVICE));
+
+    physical = RegisterMemBase;
+
+    /* Set up register memory region */
+    if (physical != 0)
+    {
+	/* Request a region. */
+	request_mem_region(RegisterMemBase, RegisterMemSize, "galcore register region");
+        device->registerBase = (gctPOINTER) ioremap_nocache(RegisterMemBase,
+							    RegisterMemSize);
+        if (!device->registerBase)
+	{
+	    gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_DRIVER,
+			  "[galcore] gckGALDEVICE_Construct: Unable to map location->0x%lX for size->%ld\n",
+			  RegisterMemBase,
+			  RegisterMemSize);
+
+	    return gcvSTATUS_OUT_OF_RESOURCES;
+        }
+
+	physical += RegisterMemSize;
+
+		gcmkTRACE_ZONE(gcvLEVEL_INFO,
+					gcvZONE_DRIVER,
+				"[galcore] gckGALDEVICE_Construct: "
+					"RegisterBase after mapping Address->0x%x is 0x%x\n",
+			(gctUINT32)RegisterMemBase,
+					(gctUINT32)device->registerBase);
+    }
+
+	/* construct the gckOS object */
+	device->baseAddress = BaseAddress;
+    gcmkVERIFY_OK(gckOS_Construct(device, &device->os));
+
+    /* construct the gckKERNEL object. */
+    gcmkVERIFY_OK(gckKERNEL_Construct(device->os, device, &device->kernel));
+
+    gcmkVERIFY_OK(gckHARDWARE_SetFastClear(device->kernel->hardware,
+									  FastClear,
+										  Compression));
+
+    /* query the ceiling of the system memory */
+    gcmkVERIFY_OK(gckHARDWARE_QuerySystemMemory(device->kernel->hardware,
+					&device->systemMemorySize,
+                    &device->systemMemoryBaseAddress));
+
+	gcmkTRACE_ZONE(gcvLEVEL_INFO,
+					gcvZONE_DRIVER,
+					"[galcore] gckGALDEVICE_Construct: "
+				"Will be trying to allocate contiguous memory of 0x%x bytes\n",
+				(gctUINT32)device->systemMemoryBaseAddress);
+
+#if COMMAND_PROCESSOR_VERSION == 1
+    /* start the command queue */
+    gcmkVERIFY_OK(gckCOMMAND_Start(device->kernel->command));
+#endif
+
+    /* initialize the thread daemon */
+	sema_init(&device->sema, 0);
+	device->threadInitialized = gcvFALSE;
+	device->killThread = gcvFALSE;
+
+	/* initialize the isr */
+	device->isrInitialized = gcvFALSE;
+	device->dataReady = gcvFALSE;
+	device->irqLine = IrqLine;
+
+	device->signal = Signal;
+
+#if defined CONFIG_CPU_PXA910
+#if POWER_OFF_GC_WHEN_IDLE
+    /* create mutex for GALDevice */
+    device->mutexGCDevice = gcvNULL;
+    gcmkVERIFY_OK(
+        gckOS_CreateMutex(device->os, &device->mutexGCDevice));
+#endif
+#endif
+
+	/* query the amount of video memory */
+    gcmkVERIFY_OK(gckHARDWARE_QueryMemory(device->kernel->hardware,
+                    &device->internalSize,
+                    &internalBaseAddress,
+                    &internalAlignment,
+                    &device->externalSize,
+                    &externalBaseAddress,
+                    &externalAlignment,
+                    &horizontalTileSize,
+                    &verticalTileSize));
+
+	/* set up the internal memory region */
+    if (device->internalSize > 0)
+    {
+        gceSTATUS status = gckVIDMEM_Construct(device->os,
+                    internalBaseAddress,
+                    device->internalSize,
+                    internalAlignment,
+                    0,
+                    &device->internalVidMem);
+
+        if (gcmIS_ERROR(status))
+        {
+            /* error, remove internal heap */
+            device->internalSize = 0;
+        }
+        else
+        {
+            /* map internal memory */
+            device->internalPhysical  = (gctPHYS_ADDR)physical;
+            device->internalLogical   = (gctPOINTER)ioremap_nocache(
+					physical, device->internalSize);
+
+            gcmkASSERT(device->internalLogical != NULL);
+
+			physical += device->internalSize;
+        }
+    }
+
+    if (device->externalSize > 0)
+    {
+        /* create the external memory heap */
+        gceSTATUS status = gckVIDMEM_Construct(device->os,
+					externalBaseAddress,
+					device->externalSize,
+					externalAlignment,
+					0,
+					&device->externalVidMem);
+
+        if (gcmIS_ERROR(status))
+        {
+            /* error, remove internal heap */
+            device->externalSize = 0;
+        }
+        else
+        {
+            /* map internal memory */
+            device->externalPhysical = (gctPHYS_ADDR)physical;
+            device->externalLogical = (gctPOINTER)ioremap_nocache(
+					physical, device->externalSize);
+
+			gcmkASSERT(device->externalLogical != NULL);
+
+			physical += device->externalSize;
+        }
+    }
+
+	/* set up the contiguous memory */
+    device->contiguousSize = ContiguousSize;
+
+	if (ContiguousBase == 0)
+	{
+		status = gcvSTATUS_OUT_OF_MEMORY;
+
+		while (device->contiguousSize > 0)
+		{
+			gcmkTRACE_ZONE(
+				gcvLEVEL_INFO, gcvZONE_DRIVER,
+				"[galcore] gckGALDEVICE_Construct: Will be trying to allocate contiguous memory of %ld bytes\n",
+				device->contiguousSize
+				);
+
+			/* allocate contiguous memory */
+			status = gckGALDEVICE_AllocateMemory(
+				device,
+				device->contiguousSize,
+				&device->contiguousBase,
+				&device->contiguousPhysical,
+				&physAddr
+				);
+
+			if (gcmIS_SUCCESS(status))
+			{
+			gcmkTRACE_ZONE(
+					gcvLEVEL_INFO, gcvZONE_DRIVER,
+					"[galcore] gckGALDEVICE_Construct: Contiguous allocated size->0x%08X Virt->0x%08lX physAddr->0x%08X\n",
+					device->contiguousSize,
+					device->contiguousBase,
+					physAddr
+					);
+
+				status = gckVIDMEM_Construct(
+					device->os,
+					physAddr | device->systemMemoryBaseAddress,
+					device->contiguousSize,
+					64,
+					BankSize,
+					&device->contiguousVidMem
+					);
+
+				if (gcmIS_SUCCESS(status))
+				{
+					device->contiguousMapped = gcvFALSE;
+
+					/* success, abort loop */
+					gcmkTRACE_ZONE(
+						gcvLEVEL_INFO, gcvZONE_DRIVER,
+						"Using %u bytes of contiguous memory.\n",
+						device->contiguousSize
+						);
+
+					break;
+				}
+
+				gcmkVERIFY_OK(gckGALDEVICE_FreeMemory(
+					device,
+					device->contiguousBase,
+					device->contiguousPhysical
+					));
+
+				device->contiguousBase = NULL;
+			}
+
+			if (device->contiguousSize <= (4 << 20))
+			{
+				device->contiguousSize = 0;
+			}
+			else
+			{
+				device->contiguousSize -= (4 << 20);
+			}
+		}
+	}
+	else
+	{
+		/* Create the contiguous memory heap. */
+		status = gckVIDMEM_Construct(
+			device->os,
+			(ContiguousBase - device->baseAddress) | device->systemMemoryBaseAddress,
+			ContiguousSize,
+			64,
+			BankSize,
+			&device->contiguousVidMem
+			);
+
+		if (gcmIS_ERROR(status))
+		{
+			/* Error, roll back. */
+			device->contiguousVidMem = gcvNULL;
+			device->contiguousSize   = 0;
+		}
+		else
+		{
+			/* Map the contiguous memory. */
+			request_mem_region(
+				ContiguousBase,
+				ContiguousSize,
+				"galcore managed memory"
+				);
+
+			device->contiguousPhysical = (gctPHYS_ADDR) ContiguousBase;
+			device->contiguousSize     = ContiguousSize;
+			device->contiguousBase     = (gctPOINTER) ioremap_nocache(ContiguousBase, ContiguousSize);
+			device->contiguousMapped   = gcvTRUE;
+
+			if (device->contiguousBase == gcvNULL)
+			{
+			/* Error, roll back. */
+				gcmkVERIFY_OK(gckVIDMEM_Destroy(device->contiguousVidMem));
+				device->contiguousVidMem = gcvNULL;
+				device->contiguousSize   = 0;
+
+				status = gcvSTATUS_OUT_OF_RESOURCES;
+			}
+		}
+	}
+
+    *Device = device;
+
+    printk("\n[galcore] real contiguouSize = 0x%08x \n",  (gctUINT32)(device->contiguousSize));
+    gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_DRIVER,
+		  "[galcore] gckGALDEVICE_Construct: Initialized device->0x%p contiguous->%lu @ 0x%p (0x%08X)\n",
+		  device,
+		  device->contiguousSize,
+		  device->contiguousBase,
+		  device->contiguousPhysical);
+
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckGALDEVICE_Destroy
+**
+**	Class destructor.
+**
+**	INPUT:
+**
+**		Nothing.
+**
+**	OUTPUT:
+**
+**		Nothing.
+**
+**	RETURNS:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckGALDEVICE_Destroy(
+	gckGALDEVICE Device)
+{
+	gcmkVERIFY_ARGUMENT(Device != NULL);
+
+    gcmkTRACE(gcvLEVEL_VERBOSE, "[ENTER] gckGALDEVICE_Destroy\n");
+
+    /* Destroy the gckKERNEL object. */
+    gcmkVERIFY_OK(gckKERNEL_Destroy(Device->kernel));
+
+    if (Device->internalVidMem != gcvNULL)
+    {
+        /* destroy the internal heap */
+        gcmkVERIFY_OK(gckVIDMEM_Destroy(Device->internalVidMem));
+
+		/* unmap the internal memory */
+		iounmap(Device->internalLogical);
+    }
+
+    if (Device->externalVidMem != gcvNULL)
+    {
+        /* destroy the internal heap */
+        gcmkVERIFY_OK(gckVIDMEM_Destroy(Device->externalVidMem));
+
+        /* unmap the external memory */
+		iounmap(Device->externalLogical);
+    }
+
+    if (Device->contiguousVidMem != gcvNULL)
+    {
+        /* Destroy the contiguous heap */
+        gcmkVERIFY_OK(gckVIDMEM_Destroy(Device->contiguousVidMem));
+
+	if (Device->contiguousMapped)
+	{
+	    gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_DRIVER,
+			  "[galcore] gckGALDEVICE_Destroy: "
+			  "Unmapping contiguous memory->0x%08lX\n",
+			  Device->contiguousBase);
+
+	    iounmap(Device->contiguousBase);
+	}
+	else
+	{
+	    gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_DRIVER,
+			  "[galcore] gckGALDEVICE_Destroy: "
+			  "Freeing contiguous memory->0x%08lX\n",
+			  Device->contiguousBase);
+
+	    gcmkVERIFY_OK(gckGALDEVICE_FreeMemory(Device,
+						 Device->contiguousBase,
+						 Device->contiguousPhysical));
+	}
+    }
+
+    if (Device->registerBase)
+    {
+        iounmap(Device->registerBase);
+    }
+
+#if defined CONFIG_CPU_PXA910
+#if POWER_OFF_GC_WHEN_IDLE
+    gcmkVERIFY_OK(gckOS_DeleteMutex(Device->os, Device->mutexGCDevice));
+#endif
+#endif
+
+    /* Destroy the gckOS object. */
+    gcmkVERIFY_OK(gckOS_Destroy(Device->os));
+
+    kfree(Device);
+
+    gcmkTRACE(gcvLEVEL_VERBOSE, "[galcore] Leave gckGALDEVICE_Destroy\n");
+
+    return gcvSTATUS_OK;
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/Os.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/Os.h
@@ -0,0 +1,104 @@
+/****************************************************************************
+*
+*    Copyright (C) 2002 - 2008 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public Lisence as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+#ifndef _OS_H
+#define _OS_H
+
+typedef struct _LINUX_MDL_MAP
+{
+	gctINT					pid;
+	gctPOINTER				vmaAddr;
+	struct vm_area_struct *	vma;
+	struct _LINUX_MDL_MAP *	next;
+}
+LINUX_MDL_MAP, *PLINUX_MDL_MAP;
+
+typedef struct _LINUX_MDL
+{
+	gctINT					pid;
+	char *					addr;
+
+#ifdef NO_DMA_COHERENT
+	gctPOINTER				kaddr;
+#endif /* NO_DMA_COHERENT */
+
+	gctINT					numPages;
+	gctINT					pagedMem;
+	dma_addr_t				dmaHandle;
+	PLINUX_MDL_MAP			maps;
+	struct _LINUX_MDL *		prev;
+	struct _LINUX_MDL *		next;
+}
+LINUX_MDL, *PLINUX_MDL;
+
+extern PLINUX_MDL_MAP
+FindMdlMap(
+	IN PLINUX_MDL Mdl,
+	IN gctINT PID
+	);
+
+typedef struct _DRIVER_ARGS
+{
+	gctPOINTER 				InputBuffer;
+	gctUINT32  				InputBufferSize;
+	gctPOINTER 				OutputBuffer;
+	gctUINT32				OutputBufferSize;
+}
+DRIVER_ARGS;
+
+/* Cleanup the signal table. */
+gceSTATUS
+gcoOS_CleanProcessSignal(
+	gcoOS Os,
+	gctHANDLE Process
+	);
+
+#ifdef ANDROID
+MEMORY_RECORD_PTR
+CreateMemoryRecord(
+	gcoOS Os,
+	MEMORY_RECORD_PTR List,
+	gcuVIDMEM_NODE_PTR Node
+	);
+
+void
+DestoryMemoryRecord(
+	gcoOS Os,
+	MEMORY_RECORD_PTR Mr
+	);
+
+MEMORY_RECORD_PTR
+FindMemoryRecord(
+	gcoOS Os,
+	MEMORY_RECORD_PTR List,
+	gcuVIDMEM_NODE_PTR Node
+	);
+
+void
+FreeAllMemoryRecord(
+	gcoOS Os,
+	MEMORY_RECORD_PTR List
+	);
+#endif
+
+#endif /* _OS_H */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/gc_hal_kernel_driver.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/hal/os/linux/kernel/gc_hal_kernel_driver.c
@@ -0,0 +1,1752 @@
+/****************************************************************************
+*
+*    Copyright (C) 2005 - 2010 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public License as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+#ifdef ENABLE_GPU_CLOCK_BY_DRIVER
+#undef ENABLE_GPU_CLOCK_BY_DRIVER
+#endif
+
+#if defined(CONFIG_DOVE_GPU)
+#define ENABLE_GPU_CLOCK_BY_DRIVER	0
+#else
+#define ENABLE_GPU_CLOCK_BY_DRIVER	1
+#endif
+
+/* You can comment below line to use legacy driver model */
+#define USE_PLATFORM_DRIVER 1
+#include <linux/device.h>
+
+#include "gc_hal_kernel_linux.h"
+#include "gc_hal_driver.h"
+#include "gc_hal_user_context.h"
+
+#if USE_PLATFORM_DRIVER
+#include <linux/platform_device.h>
+#endif
+
+MODULE_DESCRIPTION("Vivante Graphics Driver");
+MODULE_LICENSE("GPL");
+
+struct class *gpuClass;
+
+#if defined CONFIG_CPU_PXA910
+    #if POWER_OFF_GC_WHEN_IDLE
+        gckGALDEVICE galDevice;
+    #else
+        static gckGALDEVICE galDevice;
+    #endif
+#else
+    static gckGALDEVICE galDevice;
+#endif
+
+static int major = 199;
+module_param(major, int, 0644);
+
+int irqLine = 8;
+module_param(irqLine, int, 0644);
+
+long registerMemBase = 0xc0400000;
+module_param(registerMemBase, long, 0644);
+
+ulong registerMemSize = 256 << 10;
+module_param(registerMemSize, ulong, 0644);
+
+long contiguousSize = 32 << 20;
+module_param(contiguousSize, long, 0644);
+
+ulong contiguousBase = 0;
+module_param(contiguousBase, ulong, 0644);
+
+long bankSize = 32 << 20;
+module_param(bankSize, long, 0644);
+
+int fastClear = -1;
+module_param(fastClear, int, 0644);
+
+int compression = -1;
+module_param(compression, int, 0644);
+
+int signal = 48;
+module_param(signal, int, 0644);
+
+ulong baseAddress = 0;
+module_param(baseAddress, ulong, 0644);
+
+int showArgs = 0;
+module_param(showArgs, int, 0644);
+
+ulong gpu_frequency = 312;
+module_param(gpu_frequency, ulong, 0644);
+#ifdef CONFIG_PXA_DVFM
+#include <mach/dvfm.h>
+#include <mach/pxa3xx_dvfm.h>
+#include <linux/delay.h>
+
+static int galcore_dvfm_notifier(struct notifier_block *nb,
+				unsigned long val, void *data);
+
+static struct notifier_block galcore_notifier_block = {
+	.notifier_call = galcore_dvfm_notifier,
+};
+#endif
+
+#define MRVL_CONFIG_PROC
+#ifdef MRVL_CONFIG_PROC
+#include <linux/proc_fs.h>
+#define GC_PROC_FILE    "driver/gc"
+static struct proc_dir_entry * gc_proc_file;
+
+#if defined CONFIG_CPU_PXA910
+#if POWER_OFF_GC_WHEN_IDLE
+#define MUTEX_CONTEXT 0
+#define MUTEX_QUEUE 0
+
+gceSTATUS _power_off_gc(gckGALDEVICE device, gctBOOL early_suspend)
+{
+    /* turn off gc */
+    if (device->kernel->hardware->chipPowerState != gcvPOWER_OFF)
+    {
+        gceSTATUS status;
+        gckCOMMAND command;
+
+        command = device->kernel->command;
+        printk("[%s]\t@%d\tC:0x%p\tQ:0x%p\n", __func__, __LINE__, command->mutexContext, command->mutexQueue);
+
+        // stall
+        {
+            /* Acquire the context switching mutex so nothing else can be committed. */
+#if MUTEX_CONTEXT
+            gcmkONERROR(
+                gckOS_AcquireMutex(device->kernel->hardware->os,
+                                   command->mutexContext,
+                                   gcvINFINITE));
+#endif
+            if (gcvTRUE == early_suspend)
+            {
+                gcmkONERROR(
+                    gckCOMMAND_Stall(command));
+            }
+        }
+
+        // stop
+        {
+
+            /* Stop the command parser. */
+            gcmkONERROR(
+                    gckCOMMAND_Stop(command));
+
+#if MUTEX_QUEUE
+            /* Grab the command queue mutex so nothing can get access to the command queue. */
+            gcmkONERROR(
+                    gckOS_AcquireMutex(device->kernel->hardware->os,
+                                       command->mutexQueue,
+                                       gcvINFINITE));
+#endif
+        }
+
+        // disable irq and clock
+        {
+            gckOS_SuspendInterrupt(device->os);
+            gckOS_ClockOff();
+        }
+
+        galDevice->kernel->hardware->chipPowerState = gcvPOWER_OFF;
+
+    }
+
+    return gcvSTATUS_OK;
+
+OnError:
+    printk("ERROR: %s has error \n",__func__);
+    return gcvSTATUS_OK;
+}
+
+
+gceSTATUS _power_on_gc(gckGALDEVICE device)
+{
+    /* turn on gc */
+    if(device->kernel->hardware->chipPowerState != gcvPOWER_ON)
+    {
+        gceSTATUS status;
+
+        // enable clock and irq
+        {
+            gckOS_ClockOn(0);
+            gckOS_ResumeInterrupt(device->os);
+        }
+        // INITIALIZE
+        {
+            /* Initialize hardware. */
+            gcmkONERROR(
+                gckHARDWARE_InitializeHardware(device->kernel->hardware));
+
+            gcmkONERROR(
+                gckHARDWARE_SetFastClear(device->kernel->hardware,
+                                         device->kernel->hardware->allowFastClear,
+                                         device->kernel->hardware->allowCompression));
+
+            /* Force the command queue to reload the next context. */
+            device->kernel->command->currentContext = 0;
+        }
+
+        /* Sleep for 1ms, to make sure everything is powered on. */
+//        mdelay(1);//gcmVERIFY_OK(gcoOS_Delay(galDevice->os, 1));
+
+        // start
+        {
+#if MUTEX_QUEUE
+            /* Release the command mutex queue. */
+            gcmkONERROR(
+                gckOS_ReleaseMutex(device->kernel->hardware->os,
+                                   device->kernel->command->mutexQueue));
+#endif
+            /* Start the command processor. */
+            gcmkONERROR(
+                gckCOMMAND_Start(device->kernel->command));
+        }
+
+        // release_context
+        {
+#if MUTEX_CONTEXT
+            /* Release the context switching mutex. */
+            gcmkVERIFY_OK(
+                gckOS_ReleaseMutex(device->kernel->hardware->os,
+                                   device->kernel->command->mutexContext));
+#endif
+        }
+
+        printk("[%s]\t@%d\tC:0x%p\tQ:0x%p\n", __func__, __LINE__, device->kernel->command->mutexContext, device->kernel->command->mutexQueue);
+        device->kernel->hardware->chipPowerState = gcvPOWER_ON;
+        //galDevice->kernel->notifyIdle = gcvTRUE;
+    }
+
+    return gcvSTATUS_TRUE;
+OnError:
+    printk("ERROR: %s has error \n",__func__);
+
+    return gcvSTATUS_FALSE;
+}
+
+static gceSTATUS _wake_up_gc(gckGALDEVICE device)
+{
+    static gctINT count = 0;
+//    if(gcvPM_EARLY_SUSPEND == device->currentPMode)
+    {
+        ++count;
+        if (device->printPID)
+            printk(">>>[%s]\t@%d\tN:0x%x\n", __func__, __LINE__, count);
+
+        _power_on_gc(device);
+
+        if (device->printPID)
+            printk("<<<[%s]\t@%d\tN:0x%x\n", __func__, __LINE__, count);
+    }
+
+    return gcvSTATUS_TRUE;
+}
+#endif
+#endif
+
+/* cat /proc/driver/gc will print gc related msg */
+static ssize_t gc_proc_read(struct file *file,
+    char __user *buffer, size_t count, loff_t *offset)
+{
+	ssize_t len = 0;
+	char buf[1000];
+    gctUINT32 idle;
+    gctUINT32 clockControl;
+
+    gcmkVERIFY_OK(gckHARDWARE_GetIdle(galDevice->kernel->hardware, gcvFALSE, &idle));
+	len += sprintf(buf+len, "idle register: 0x%02x\n", idle);
+
+    gckOS_ReadRegister(galDevice->os, 0x00000, &clockControl);
+    len += sprintf(buf+len, "clockControl register: 0x%02x\n", clockControl);
+
+#ifdef CONFIG_PXA_DVFM
+	len += sprintf(buf+len, "mode:\tDOCS(%d)D1(%d)D2(%d)CG(%d)\n\tDebug(%d)Pid(%d)Reset(%d)\n",
+		           galDevice->enableD0CS,
+		           galDevice->enableD1,
+		           galDevice->enableD2,
+		           galDevice->enableCG,
+		           galDevice->needD2DebugInfo,
+		           galDevice->printPID,
+		           galDevice->needResetAfterD2);
+#endif
+
+	return simple_read_from_buffer(buffer, count, offset, buf, len);
+
+    return 0;
+}
+
+/* echo xx > /proc/driver/gc set ... */
+static ssize_t gc_proc_write(struct file *file,
+		const char *buff, size_t len, loff_t *off)
+{
+    char messages[256];
+
+	if(len > 256)
+		len = 256;
+
+	if(copy_from_user(messages, buff, len))
+		return -EFAULT;
+
+    printk("\n");
+    if(strncmp(messages, "printPID", 8) == 0)
+    {
+        galDevice->printPID = galDevice->printPID ? gcvFALSE : gcvTRUE;
+        printk("==>Change printPID to %s\n", galDevice->printPID ? "gcvTRUE" : "gcvFALSE");
+    }
+    else if(strncmp(messages, "profile", 7) == 0)
+    {
+        gctUINT32 idleTime, timeSlice;
+        gctUINT32 start,end;
+        timeSlice = 10000;
+        start = gckOS_GetTicks();
+        gckOS_IdleProfile(galDevice->os, &timeSlice, &idleTime);
+        end = gckOS_GetTicks();
+
+        printk("idle:total [%d, %d]\n", idleTime, timeSlice);
+        printk("profile cost %d\n", end - start);
+    }
+    else if(strncmp(messages, "hang", 4) == 0)
+    {
+		galDevice->kernel->hardware->hang = galDevice->kernel->hardware->hang ? gcvFALSE : gcvTRUE;
+    }
+    else if(strncmp(messages, "reset", 5) == 0)
+    {
+        galDevice->reset = galDevice->reset ? gcvFALSE : gcvTRUE;
+    }
+#ifdef CONFIG_PXA_DVFM
+    else if(strncmp(messages, "d2debug", 7) == 0)
+    {
+        galDevice->needD2DebugInfo = galDevice->needD2DebugInfo ? gcvFALSE : gcvTRUE;
+    }
+    else if(strncmp(messages, "D1", 2) == 0)
+    {
+        galDevice->enableD1 = galDevice->enableD1 ? gcvFALSE : gcvTRUE;
+        gckOS_SetConstraint(galDevice->os, gcvTRUE, gcvTRUE);
+    }
+    else if(strncmp(messages, "D2", 2) == 0)
+    {
+        galDevice->enableD2 = galDevice->enableD2 ? gcvFALSE : gcvTRUE;
+        gckOS_SetConstraint(galDevice->os, gcvTRUE, gcvTRUE);
+    }
+    else if(strncmp(messages, "D0", 2) == 0)
+    {
+        galDevice->enableD0CS= galDevice->enableD0CS ? gcvFALSE : gcvTRUE;
+        gckOS_SetConstraint(galDevice->os, gcvTRUE, gcvTRUE);
+    }
+    else if(strncmp(messages, "CG", 2) == 0)
+    {
+        galDevice->enableCG= galDevice->enableCG ? gcvFALSE : gcvTRUE;
+        gckOS_SetConstraint(galDevice->os, gcvTRUE, gcvTRUE);
+    }
+    else if(strncmp(messages, "needreset", 9) == 0)
+    {
+        galDevice->needResetAfterD2 = galDevice->needResetAfterD2 ? gcvFALSE : gcvTRUE;
+    }
+#endif
+    else if(strncmp(messages, "su", 2) == 0)
+    {
+        gceSTATUS status;
+
+        if(galDevice->kernel->hardware->chipPowerState != gcvPOWER_OFF)
+        {
+            status = gckHARDWARE_SetPowerManagementState(galDevice->kernel->hardware, gcvPOWER_OFF);
+            if (gcmIS_ERROR(status))
+            {
+                return -1;
+            }
+
+            gckOS_SuspendInterrupt(galDevice->os);
+            gckOS_ClockOff();
+        }
+    }
+    else if(strncmp(messages, "re", 2) == 0)
+    {
+        gceSTATUS status;
+
+        if(galDevice->kernel->hardware->chipPowerState != gcvPOWER_ON)
+        {
+            gckOS_ClockOn(0);
+            gckOS_ResumeInterrupt(galDevice->os);
+
+            status = gckHARDWARE_SetPowerManagementState(galDevice->kernel->hardware, gcvPOWER_ON);
+		if (gcmIS_ERROR(status))
+		{
+			return -1;
+		}
+        }
+    }
+    else if(strncmp(messages, "stress", 6) == 0)
+    {
+        int i;
+         /* struct vmalloc_info vmi; */
+
+     /* {get_vmalloc_info(&vmi);printk("%s,%d,VmallocUsed: %8lu kB\n",__func__,__LINE__,vmi.used >> 10); } */
+
+#ifdef _DEBUG
+	gckOS_SetDebugLevel(gcvLEVEL_VERBOSE);
+	gckOS_SetDebugZone(1023);
+#endif
+
+        for(i=0;i<20000;i++)
+        {
+            gceSTATUS status;
+            static int count = 0;
+
+            printk("count:%d\n",count++);
+            printk("!!!\t");
+            if(galDevice->kernel->hardware->chipPowerState != gcvPOWER_OFF)
+            {
+                status = gckHARDWARE_SetPowerManagementState(galDevice->kernel->hardware, gcvPOWER_OFF);
+		if (gcmIS_ERROR(status))
+		{
+			return -1;
+		}
+
+                gckOS_SuspendInterrupt(galDevice->os);
+                gckOS_ClockOff();
+
+            }
+            printk("@@@\t");
+            if(galDevice->kernel->hardware->chipPowerState != gcvPOWER_ON)
+            {
+                gckOS_ClockOn(0);
+                gckOS_ResumeInterrupt(galDevice->os);
+
+                status = gckHARDWARE_SetPowerManagementState(galDevice->kernel->hardware, gcvPOWER_ON);
+		if (gcmIS_ERROR(status))
+		{
+			return -1;
+		}
+            }
+            printk("###\n");
+        }
+
+    }
+    else if(strncmp(messages, "debug", 5) == 0)
+    {
+#ifdef _DEBUG
+        static int count = 0;
+
+        if(count%2 == 0)
+        {
+		gckOS_SetDebugLevel(gcvLEVEL_VERBOSE);
+		gckOS_SetDebugZone(1023);
+        }
+        else
+        {
+            gckOS_SetDebugLevel(gcvLEVEL_NONE);
+		gckOS_SetDebugZone(0);
+        }
+        count++;
+#endif
+    }
+    else if(strncmp(messages, "16", 2) == 0)
+    {
+		printk("frequency change to 1/16\n");
+        /* frequency change to 1/16 */
+        gcmkVERIFY_OK(gckOS_WriteRegister(galDevice->os,0x00000,0x210));
+        /* Loading the frequency scaler. */
+	gcmkVERIFY_OK(gckOS_WriteRegister(galDevice->os,0x00000,0x010));
+
+    }
+    else if(strncmp(messages, "32", 2) == 0)
+    {
+		printk("frequency change to 1/32\n");
+        /* frequency change to 1/32*/
+        gcmkVERIFY_OK(gckOS_WriteRegister(galDevice->os,0x00000,0x208));
+        /* Loading the frequency scaler. */
+	gcmkVERIFY_OK(gckOS_WriteRegister(galDevice->os,0x00000,0x008));
+
+    }
+	else if(strncmp(messages, "64", 2) == 0)
+    {
+		printk("frequency change to 1/64\n");
+        /* frequency change to 1/64 */
+        gcmkVERIFY_OK(gckOS_WriteRegister(galDevice->os,0x00000,0x204));
+        /* Loading the frequency scaler. */
+	gcmkVERIFY_OK(gckOS_WriteRegister(galDevice->os,0x00000,0x004));
+
+    }
+    else if('1' == messages[0])
+    {
+        printk("frequency change to full speed\n");
+        /* frequency change to full speed */
+        gcmkVERIFY_OK(gckOS_WriteRegister(galDevice->os,0x00000,0x300));
+        /* Loading the frequency scaler. */
+	gcmkVERIFY_OK(gckOS_WriteRegister(galDevice->os,0x00000,0x100));
+
+    }
+    else if('2' == messages[0])
+    {
+        printk("frequency change to 1/2\n");
+        /* frequency change to 1/2 */
+        gcmkVERIFY_OK(gckOS_WriteRegister(galDevice->os,0x00000,0x280));
+        /* Loading the frequency scaler. */
+	gcmkVERIFY_OK(gckOS_WriteRegister(galDevice->os,0x00000,0x080));
+
+    }
+    else if('4' == messages[0])
+    {
+        printk("frequency change to 1/4\n");
+        /* frequency change to 1/4 */
+        gcmkVERIFY_OK(gckOS_WriteRegister(galDevice->os,0x00000,0x240));
+        /* Loading the frequency scaler. */
+	gcmkVERIFY_OK(gckOS_WriteRegister(galDevice->os,0x00000,0x040));
+
+    }
+    else if('8' == messages[0])
+    {
+        printk("frequency change to 1/8\n");
+        /* frequency change to 1/8 */
+        gcmkVERIFY_OK(gckOS_WriteRegister(galDevice->os,0x00000,0x220));
+        /* Loading the frequency scaler. */
+	gcmkVERIFY_OK(gckOS_WriteRegister(galDevice->os,0x00000,0x020));
+
+    }
+    else
+    {
+        printk("unknown echo\n");
+    }
+
+    return len;
+}
+
+static struct file_operations gc_proc_ops = {
+	.read = gc_proc_read,
+	.write = gc_proc_write,
+};
+
+static void create_gc_proc_file(void)
+{
+	gc_proc_file = create_proc_entry(GC_PROC_FILE, 0644, NULL);
+	if (gc_proc_file) {
+		gc_proc_file->proc_fops = &gc_proc_ops;
+	} else
+		printk("[galcore] proc file create failed!\n");
+}
+
+static void remove_gc_proc_file(void)
+{
+	remove_proc_entry(GC_PROC_FILE, NULL);
+}
+
+#endif
+
+static int drv_open(struct inode *inode, struct file *filp);
+static int drv_release(struct inode *inode, struct file *filp);
+static int drv_ioctl(struct inode *inode, struct file *filp,
+                     unsigned int ioctlCode, unsigned long arg);
+static int drv_mmap(struct file * filp, struct vm_area_struct * vma);
+
+struct file_operations driver_fops =
+{
+    .open   	= drv_open,
+    .release	= drv_release,
+    .ioctl  	= drv_ioctl,
+    .mmap   	= drv_mmap,
+};
+
+int drv_open(struct inode *inode, struct file* filp)
+{
+    gcsHAL_PRIVATE_DATA_PTR	private;
+
+    gcmkTRACE_ZONE(gcvLEVEL_VERBOSE, gcvZONE_DRIVER,
+		  "Entering drv_open\n");
+
+    private = kmalloc(sizeof(gcsHAL_PRIVATE_DATA), GFP_KERNEL);
+
+    if (private == gcvNULL)
+    {
+	return -ENOTTY;
+    }
+
+    private->device				= galDevice;
+    private->mappedMemory		= gcvNULL;
+	private->contiguousLogical	= gcvNULL;
+
+#if gcdkUSE_MEMORY_RECORD
+	private->memoryRecordList.prev = &private->memoryRecordList;
+	private->memoryRecordList.next = &private->memoryRecordList;
+#endif
+
+	/* A process gets attached. */
+	gcmkVERIFY_OK(
+		gckKERNEL_AttachProcess(galDevice->kernel, gcvTRUE));
+
+    if (!galDevice->contiguousMapped)
+    {
+	gcmkVERIFY_OK(gckOS_MapMemory(galDevice->os,
+									galDevice->contiguousPhysical,
+									galDevice->contiguousSize,
+									&private->contiguousLogical));
+    }
+
+    filp->private_data = private;
+
+    return 0;
+}
+
+extern void
+OnProcessExit(
+	IN gckOS Os,
+	IN gckKERNEL Kernel
+	);
+
+int drv_release(struct inode* inode, struct file* filp)
+{
+    gcsHAL_PRIVATE_DATA_PTR	private;
+    gckGALDEVICE			device;
+
+    gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_DRIVER,
+		  "Entering drv_close\n");
+
+    private = filp->private_data;
+    gcmkASSERT(private != gcvNULL);
+
+    device = private->device;
+
+#if gcdkUSE_MEMORY_RECORD
+	FreeAllMemoryRecord(galDevice->os, &private->memoryRecordList);
+
+#ifdef ANDROID
+	gcmkVERIFY_OK(gckOS_Delay(galDevice->os, 1000));
+#else
+	gcmkVERIFY_OK(gckCOMMAND_Stall(device->kernel->command));
+#endif
+#endif
+
+		if (private->contiguousLogical != gcvNULL)
+		{
+			gcmkVERIFY_OK(gckOS_UnmapMemory(galDevice->os,
+											galDevice->contiguousPhysical,
+											galDevice->contiguousSize,
+											private->contiguousLogical));
+		}
+
+	/* A process gets detached. */
+	gcmkVERIFY_OK(
+		gckKERNEL_AttachProcess(galDevice->kernel, gcvFALSE));
+
+    kfree(private);
+    filp->private_data = NULL;
+
+    return 0;
+}
+
+int drv_ioctl(struct inode *inode,
+	      struct file *filp,
+	      unsigned int ioctlCode,
+	      unsigned long arg)
+{
+    gcsHAL_INTERFACE iface;
+    gctUINT32 copyLen;
+    DRIVER_ARGS drvArgs;
+    gckGALDEVICE device;
+    gceSTATUS status;
+    gcsHAL_PRIVATE_DATA_PTR private;
+
+    private = filp->private_data;
+
+    if (private == gcvNULL)
+    {
+	gcmkTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_DRIVER,
+		      "[galcore] drv_ioctl: private_data is NULL\n");
+
+	return -ENOTTY;
+    }
+
+    device = private->device;
+
+    if (device == gcvNULL)
+    {
+	gcmkTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_DRIVER,
+		      "[galcore] drv_ioctl: device is NULL\n");
+
+	return -ENOTTY;
+    }
+
+    if (ioctlCode != IOCTL_GCHAL_INTERFACE
+		&& ioctlCode != IOCTL_GCHAL_KERNEL_INTERFACE)
+    {
+        /* Unknown command. Fail the I/O. */
+        return -ENOTTY;
+    }
+
+    /* Get the drvArgs to begin with. */
+    copyLen = copy_from_user(&drvArgs,
+			     (void *) arg,
+			     sizeof(DRIVER_ARGS));
+
+    if (copyLen != 0)
+    {
+	/* The input buffer is not big enough. So fail the I/O. */
+        return -ENOTTY;
+    }
+
+    /* Now bring in the gcsHAL_INTERFACE structure. */
+    if ((drvArgs.InputBufferSize  != sizeof(gcsHAL_INTERFACE))
+    ||  (drvArgs.OutputBufferSize != sizeof(gcsHAL_INTERFACE))
+    )
+    {
+        printk("\n [galcore] data structure size in kernel and user do not match !\n");
+	return -ENOTTY;
+    }
+
+    copyLen = copy_from_user(&iface,
+			     drvArgs.InputBuffer,
+			     sizeof(gcsHAL_INTERFACE));
+
+    if (copyLen != 0)
+    {
+        /* The input buffer is not big enough. So fail the I/O. */
+        return -ENOTTY;
+    }
+
+    if(galDevice->printPID)
+    {
+        printk("--->pid=%d\tname=%s\tiface.command=%d.\n", current->pid, current->comm, iface.command);
+    }
+#if gcdkUSE_MEMORY_RECORD
+	if (iface.command == gcvHAL_EVENT_COMMIT)
+	{
+		MEMORY_RECORD_PTR mr;
+		gcsQUEUE_PTR queue = iface.u.Event.queue;
+
+		while (queue != gcvNULL)
+		{
+			gcsQUEUE_PTR record, next;
+
+			/* Map record into kernel memory. */
+			gcmkERR_BREAK(gckOS_MapUserPointer(device->os,
+											  queue,
+											  gcmSIZEOF(gcsQUEUE),
+											  (gctPOINTER *) &record));
+
+			switch (record->iface.command)
+			{
+			case gcvHAL_FREE_VIDEO_MEMORY:
+				mr = FindMemoryRecord(device->os,
+									&private->memoryRecordList,
+									record->iface.u.FreeVideoMemory.node);
+
+				if (mr != gcvNULL)
+				{
+					DestoryMemoryRecord(device->os, mr);
+				}
+				else
+				{
+					printk("*ERROR* Invalid video memory (0x%p) for free\n",
+						record->iface.u.FreeVideoMemory.node);
+				}
+                break;
+
+			default:
+				break;
+			}
+
+			/* Next record in the queue. */
+			next = record->next;
+
+			/* Unmap record from kernel memory. */
+			gcmkERR_BREAK(gckOS_UnmapUserPointer(device->os,
+												queue,
+												gcmSIZEOF(gcsQUEUE),
+												(gctPOINTER *) record));
+			queue = next;
+		}
+	}
+#endif
+
+#if defined CONFIG_CPU_PXA910
+#if POWER_OFF_GC_WHEN_IDLE
+    gcmkVERIFY_OK(
+        gckOS_AcquireMutex(galDevice->os, galDevice->mutexGCDevice, gcvINFINITE));
+
+    if(galDevice->printPID) {
+        printk("|-|-|- Acquired gcdevice mutex...\t%s@%d\tCommand:%d\t0x%p\n",__FUNCTION__,__LINE__,iface.command,galDevice->mutexGCDevice);
+    }
+
+    if (/*galDevice->enableIdleOff &&*/ iface.command == gcvHAL_COMMIT && gcvPM_EARLY_SUSPEND == galDevice->currentPMode)
+    {
+        if (1) {
+            /* turn on gc when gc is power off and in early-suspend mode */
+            _wake_up_gc(galDevice);
+        }
+    }
+
+    gcmkVERIFY_OK(
+        gckOS_ReleaseMutex(galDevice->os, galDevice->mutexGCDevice));
+
+    if(galDevice->printPID) {
+        printk("|-|-|- Released gcdevice mutex...\t%s@%d\n",__FUNCTION__,__LINE__);
+    }
+
+#endif
+#endif
+
+    status = gckKERNEL_Dispatch(device->kernel,
+		(ioctlCode == IOCTL_GCHAL_INTERFACE) , &iface);
+
+    if (gcmIS_ERROR(status))
+    {
+	gcmkTRACE_ZONE(gcvLEVEL_WARNING, gcvZONE_DRIVER,
+		      "[galcore] gckKERNEL_Dispatch returned %d.\n",
+		      status);
+    }
+
+    else if (gcmIS_ERROR(iface.status))
+    {
+	gcmkTRACE_ZONE(gcvLEVEL_WARNING, gcvZONE_DRIVER,
+		      "[galcore] IOCTL %d returned %d.\n",
+		      iface.command,
+		      iface.status);
+    }
+
+    /* See if this was a LOCK_VIDEO_MEMORY command. */
+    else if (iface.command == gcvHAL_LOCK_VIDEO_MEMORY)
+    {
+	/* Special case for mapped memory. */
+	if (private->mappedMemory != gcvNULL
+			&& iface.u.LockVideoMemory.node->VidMem.memory->object.type
+				== gcvOBJ_VIDMEM)
+		{
+			/* Compute offset into mapped memory. */
+		gctUINT32 offset = (gctUINT8 *) iface.u.LockVideoMemory.memory
+				- (gctUINT8 *) device->contiguousBase;
+
+	    /* Compute offset into user-mapped region. */
+	    iface.u.LockVideoMemory.memory =
+		(gctUINT8 *)  private->mappedMemory + offset;
+		}
+    }
+#if gcdkUSE_MEMORY_RECORD
+	else if (iface.command == gcvHAL_ALLOCATE_VIDEO_MEMORY)
+	{
+		CreateMemoryRecord(device->os,
+							&private->memoryRecordList,
+							iface.u.AllocateVideoMemory.node);
+	}
+	else if (iface.command == gcvHAL_ALLOCATE_LINEAR_VIDEO_MEMORY)
+	{
+		CreateMemoryRecord(device->os,
+							&private->memoryRecordList,
+							iface.u.AllocateLinearVideoMemory.node);
+	}
+	else if (iface.command == gcvHAL_FREE_VIDEO_MEMORY)
+	{
+		MEMORY_RECORD_PTR mr;
+
+		mr = FindMemoryRecord(device->os,
+							&private->memoryRecordList,
+							iface.u.FreeVideoMemory.node);
+
+		if (mr != gcvNULL)
+		{
+			DestoryMemoryRecord(device->os, mr);
+		}
+		else
+		{
+			printk("*ERROR* Invalid video memory for free\n");
+		}
+	}
+#endif
+
+    /* Copy data back to the user. */
+    copyLen = copy_to_user(drvArgs.OutputBuffer,
+			   &iface,
+			   sizeof(gcsHAL_INTERFACE));
+
+    if (copyLen != 0)
+    {
+	/* The output buffer is not big enough. So fail the I/O. */
+        return -ENOTTY;
+    }
+
+    return 0;
+}
+
+static int drv_mmap(struct file * filp, struct vm_area_struct * vma)
+{
+    gcsHAL_PRIVATE_DATA_PTR private = filp->private_data;
+    gckGALDEVICE device;
+    int ret;
+    unsigned long size = vma->vm_end - vma->vm_start;
+
+    if (private == gcvNULL)
+    {
+	return -ENOTTY;
+    }
+
+    device = private->device;
+
+    if (device == gcvNULL)
+    {
+        return -ENOTTY;
+    }
+
+    vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
+    vma->vm_flags    |= VM_IO | VM_DONTCOPY | VM_DONTEXPAND;
+    vma->vm_pgoff     = 0;
+
+    if (device->contiguousMapped)
+    {
+	ret = io_remap_pfn_range(vma,
+				 vma->vm_start,
+				 (gctUINT32) device->contiguousPhysical >> PAGE_SHIFT,
+				 size,
+				 vma->vm_page_prot);
+
+	private->mappedMemory = (ret == 0) ? (gctPOINTER) vma->vm_start : gcvNULL;
+
+	return ret;
+    }
+    else
+    {
+	return -ENOTTY;
+    }
+}
+
+
+#if !USE_PLATFORM_DRIVER
+static int __init drv_init(void)
+#else
+static int drv_init(void)
+#endif
+{
+    int ret;
+    gckGALDEVICE device;
+
+    gcmkTRACE_ZONE(gcvLEVEL_VERBOSE, gcvZONE_DRIVER,
+		  "Entering drv_init\n");
+
+#if ENABLE_GPU_CLOCK_BY_DRIVER && LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28)
+    gckOS_ClockOn(gpu_frequency);
+#endif
+
+	if (showArgs)
+	{
+		printk("galcore options:\n");
+		printk("  irqLine         = %d\n",      irqLine);
+		printk("  registerMemBase = 0x%08lX\n", registerMemBase);
+		printk("  contiguousSize  = %ld\n",     contiguousSize);
+		printk("  contiguousBase  = 0x%08lX\n", contiguousBase);
+		printk("  bankSize        = 0x%08lX\n", bankSize);
+		printk("  fastClear       = %d\n",      fastClear);
+		printk("  compression     = %d\n",      compression);
+		printk("  signal          = %d\n",      signal);
+		printk("  baseAddress     = 0x%08lX\n", baseAddress);
+	}
+
+    /* Create the GAL device. */
+    gcmkVERIFY_OK(gckGALDEVICE_Construct(irqLine,
+					registerMemBase,
+					registerMemSize,
+					contiguousBase,
+					contiguousSize,
+					bankSize,
+					fastClear,
+					compression,
+					baseAddress,
+					signal,
+					&device));
+    printk("\n[galcore] chipModel=0x%x,chipRevision=0x%x,chipFeatures=0x%x,chipMinorFeatures=0x%x\n",
+        device->kernel->hardware->chipModel, device->kernel->hardware->chipRevision,
+        device->kernel->hardware->chipFeatures, device->kernel->hardware->chipMinorFeatures0);
+
+#ifdef CONFIG_PXA_DVFM
+    /* register galcore as a dvfm device*/
+    if(dvfm_register("Galcore", &device->dvfm_dev_index))
+    {
+        printk("\n[galcore] fail to do dvfm_register\n");
+    }
+
+    if(dvfm_register_notifier(&galcore_notifier_block,
+				DVFM_FREQUENCY_NOTIFIER))
+    {
+        printk("\n[galcore] fail to do dvfm_register_notifier\n");
+    }
+
+    device->dvfm_notifier = &galcore_notifier_block;
+
+    device->needResetAfterD2 = gcvTRUE;
+    device->needD2DebugInfo = gcvFALSE;
+    device->enableMdelay = gcvFALSE;
+
+    device->enableD0CS = gcvTRUE;
+    device->enableD1 = gcvTRUE;
+    device->enableD2 = gcvTRUE;
+    device->enableCG = gcvTRUE;
+
+    gckOS_SetConstraint(device->os, gcvTRUE, gcvTRUE);
+#endif
+
+    device->printPID = gcvFALSE;
+    device->reset = gcvTRUE;
+
+#if defined CONFIG_CPU_PXA910
+#if POWER_OFF_GC_WHEN_IDLE
+    device->currentPMode = gcvPM_NORMAL;
+#endif
+#endif
+
+    device->enableLowPowerMode = gcvFALSE;
+    device->enableDVFM = gcvTRUE;
+
+    memset(device->profNode, 0, 100*sizeof(struct _gckProfNode));
+    device->lastNodeIndex = 0;
+
+    /* Start the GAL device. */
+    if (gcmIS_ERROR(gckGALDEVICE_Start(device)))
+    {
+	gcmkTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_DRIVER,
+		      "[galcore] Can't start the gal device.\n");
+
+	/* Roll back. */
+	gckGALDEVICE_Stop(device);
+	gckGALDEVICE_Destroy(device);
+
+	return -1;
+    }
+
+    /* Register the character device. */
+    ret = register_chrdev(major, DRV_NAME, &driver_fops);
+    if (ret < 0)
+    {
+	gcmkTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_DRIVER,
+		      "[galcore] Could not allocate major number for mmap.\n");
+
+	/* Roll back. */
+	gckGALDEVICE_Stop(device);
+	gckGALDEVICE_Destroy(device);
+
+	return -1;
+    }
+    else
+    {
+	if (major == 0)
+	{
+	    major = ret;
+	}
+    }
+
+    galDevice = device;
+
+	gpuClass = class_create(THIS_MODULE, "v_graphics_class");
+	if (IS_ERR(gpuClass)) {
+	gcmkTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_DRIVER,
+					  "Failed to create the class.\n");
+		return -1;
+	}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)
+	device_create(gpuClass, NULL, MKDEV(major, 0), NULL, "galcore");
+#else
+	device_create(gpuClass, NULL, MKDEV(major, 0), "galcore");
+#endif
+
+    gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_DRIVER,
+		  "[galcore] irqLine->%ld, contiguousSize->%lu, memBase->0x%lX\n",
+		  irqLine,
+		  contiguousSize,
+		  registerMemBase);
+
+    gcmkTRACE_ZONE(gcvLEVEL_VERBOSE, gcvZONE_DRIVER,
+		  "[galcore] driver registered successfully.\n");
+
+    /* device should be idle because it is just initialized */
+    gckOS_NotifyIdle(device->os, gcvTRUE);
+    return 0;
+}
+
+#if !USE_PLATFORM_DRIVER
+static void __exit drv_exit(void)
+#else
+static void drv_exit(void)
+#endif
+{
+    gcmkTRACE_ZONE(gcvLEVEL_VERBOSE, gcvZONE_DRIVER,
+		  "[galcore] Entering drv_exit\n");
+
+	device_destroy(gpuClass, MKDEV(major, 0));
+	class_destroy(gpuClass);
+
+    unregister_chrdev(major, DRV_NAME);
+
+    gckGALDEVICE_Stop(galDevice);
+#ifdef CONFIG_PXA_DVFM
+    gckOS_UnSetConstraint(galDevice->os, gcvTRUE, gcvTRUE);
+
+    if(dvfm_unregister_notifier(&galcore_notifier_block,
+				DVFM_FREQUENCY_NOTIFIER))
+    {
+        printk("\n[galcore] fail to do dvfm_unregister_notifier\n");
+    }
+
+    if(dvfm_unregister("Galcore", &galDevice->dvfm_dev_index))
+    {
+        printk("\n[galcore] fail to do dvfm_unregister\n");
+    }
+#endif
+    gckGALDEVICE_Destroy(galDevice);
+
+#if ENABLE_GPU_CLOCK_BY_DRIVER && LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28)
+    gckOS_ClockOff();
+#endif
+}
+
+#if !USE_PLATFORM_DRIVER
+module_init(drv_init);
+module_exit(drv_exit);
+#else
+
+#define DEVICE_NAME "galcore"
+
+static int _gpu_off(gckGALDEVICE device)
+{
+	gceSTATUS status;
+
+    printk(">>>>>>[%s]@%d\n",__func__, __LINE__);
+
+#ifdef CONFIG_PXA_DVFM
+    device->needResetAfterD2 = gcvFALSE;
+#endif
+    if(device->kernel->hardware->chipPowerState != gcvPOWER_OFF)
+    {
+        status = gckHARDWARE_SetPowerManagementState(device->kernel->hardware, gcvPOWER_OFF);
+	if (gcmIS_ERROR(status))
+	{
+		return -1;
+	}
+
+        gckOS_SuspendInterrupt(device->os);
+        gckOS_ClockOff();
+    }
+
+    gckOS_UnSetConstraint(device->os, gcvTRUE, gcvTRUE);
+    printk("<<<<<<[%s]@%d\n",__func__, __LINE__);
+	return 0;
+}
+
+static int _gpu_on(gckGALDEVICE device)
+{
+	gceSTATUS status;
+
+    printk(">>>>>>[%s]@%d\n",__func__, __LINE__);
+
+    gckOS_SetConstraint(device->os, gcvTRUE, gcvTRUE);
+
+    if(device->kernel->hardware->chipPowerState != gcvPOWER_ON)
+    {
+        gckOS_ClockOn(0);
+        gckOS_ResumeInterrupt(device->os);
+
+        status = gckHARDWARE_SetPowerManagementState(device->kernel->hardware, gcvPOWER_ON);
+	if (gcmIS_ERROR(status))
+	{
+		return -1;
+	}
+    }
+
+#ifdef CONFIG_PXA_DVFM
+    device->needResetAfterD2 = gcvTRUE;
+#endif
+
+    printk("<<<<<<[%s]@%d\n",__func__, __LINE__);
+	return 0;
+}
+
+#ifdef ANDROID
+static void gpu_early_suspend(struct early_suspend *h)
+{
+#if defined CONFIG_CPU_PXA910
+    gceSTATUS   status;
+#endif
+//    printk(">>>>>>>[%s]@%d\n",__func__,__LINE__);
+#if defined CONFIG_PXA_DVFM || defined CONFIG_CPU_MMP2
+    if(galDevice->printPID)
+    {
+    }
+    else
+    {
+        _gpu_off(galDevice);
+    }
+#elif defined CONFIG_CPU_PXA910
+#if POWER_OFF_GC_WHEN_IDLE
+    {
+        static gctINT count = 0;
+        ++count;
+        printk(">>>[%s]\t@%d\tN:0x%x\n", __func__, __LINE__, count);
+
+        /* Acquire the mutex. */
+        gcmkONERROR(
+            gckOS_AcquireMutex(galDevice->os, galDevice->mutexGCDevice, gcvINFINITE));
+
+        if (galDevice->printPID) {
+            printk("|-|-|- Acquired gcdevice mutex...\t%s@%d\n",__func__,__LINE__);
+        }
+
+        _power_off_gc(galDevice, gcvTRUE);
+        galDevice->currentPMode = gcvPM_EARLY_SUSPEND;
+
+        /* Release the mutex. */
+        gcmkVERIFY_OK(
+            gckOS_ReleaseMutex(galDevice->os, galDevice->mutexGCDevice));
+
+        if (galDevice->printPID) {
+            printk("|-|-|- Released gcdevice mutex...\t%s@%d\n",__func__,__LINE__);
+        }
+
+        printk("<<<[%s]\t@%d\tN:0x%x\n", __func__, __LINE__, count);
+
+        // useless
+        if(0) _gpu_off(galDevice);
+    }
+#endif
+#endif
+//    printk("<<<<<<<[%s]@%d\n",__func__,__LINE__);
+    return;
+
+#if defined CONFIG_CPU_PXA910
+OnError:
+    /* Return the status. */
+    printk("---->ERROR:%s @ %d\n", __func__, __LINE__);
+#endif
+}
+static void gpu_late_resume(struct early_suspend *h)
+{
+#if defined CONFIG_CPU_PXA910
+#if POWER_OFF_GC_WHEN_IDLE
+    gceSTATUS   status;
+    static gctINT count = 0;
+#endif
+#endif
+//    printk(">>>>>>>[%s]@%d\n",__func__,__LINE__);
+
+#if defined CONFIG_PXA_DVFM || defined CONFIG_CPU_MMP2
+    if(galDevice->printPID)
+    {
+    }
+    else
+    {
+	    _gpu_on(galDevice);
+    }
+
+#elif defined CONFIG_CPU_PXA910
+#if POWER_OFF_GC_WHEN_IDLE
+    ++count;
+    printk("#@@##@@##@@@#\n");
+    printk(">>>[%s]\t@%d\tN:0x%x\n", __func__, __LINE__, count);
+
+    gcmkONERROR(
+        gckOS_AcquireMutex(galDevice->os, galDevice->mutexGCDevice, gcvINFINITE));
+
+    if(galDevice->printPID) {
+        printk("|-|-|- Acquired gcdevice mutex...\t%s@%d\t0x%p\n",__func__,__LINE__,galDevice->mutexGCDevice);
+    }
+
+    galDevice->currentPMode = gcvPM_LATE_RESUME;
+    _power_on_gc(galDevice);
+    galDevice->currentPMode = gcvPM_NORMAL;
+    gcmkVERIFY_OK(
+        gckOS_ReleaseMutex(galDevice->os, galDevice->mutexGCDevice));
+
+    if(galDevice->printPID) {
+        printk("|-|-|- Released gcdevice mutex...\t%s@%d\n",__func__,__LINE__);
+    }
+    printk("<<<[%s]\t@%d\tN:0x%x\n", __func__, __LINE__, count);
+
+    if (0) _gpu_on(galDevice);
+#endif
+
+#endif
+
+    return;
+#if defined CONFIG_CPU_PXA910
+OnError:
+    /* Return the status. */
+    printk("---->ERROR:%s @ %d\n", __func__, __LINE__);
+#endif
+}
+static struct early_suspend gpu_early_suspend_desc = {
+    .level = EARLY_SUSPEND_LEVEL_STOP_DRAWING + 200,  /*  make sure GC early_suspend after surfaceflinger stop drawing */
+	.suspend = gpu_early_suspend,
+	.resume = gpu_late_resume,
+};
+#endif
+static int __devinit gpu_probe(struct platform_device *pdev)
+{
+	int ret = -ENODEV;
+	struct resource *res;
+	res = platform_get_resource_byname(pdev, IORESOURCE_IRQ,"gpu_irq");
+	if (!res) {
+		printk(KERN_ERR "%s: No irq line supplied.\n",__FUNCTION__);
+		goto gpu_probe_fail;
+	}
+	irqLine = res->start;
+
+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM,"gpu_base");
+	if (!res) {
+		printk(KERN_ERR "%s: No register base supplied.\n",__FUNCTION__);
+		goto gpu_probe_fail;
+	}
+	registerMemBase = res->start;
+	registerMemSize = res->end - res->start;
+
+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM,"gpu_mem");
+	if (!res) {
+		printk(KERN_ERR "%s: No memory base supplied.\n",__FUNCTION__);
+		goto gpu_probe_fail;
+	}
+	contiguousBase  = res->start;
+	contiguousSize  = res->end-res->start;
+
+	ret = drv_init();
+	if(!ret) {
+		platform_set_drvdata(pdev,galDevice);
+#ifdef MRVL_CONFIG_PROC
+    create_gc_proc_file();
+#endif
+
+#ifdef ANDROID
+    register_early_suspend(&gpu_early_suspend_desc);
+#endif
+		return ret;
+	}
+
+gpu_probe_fail:
+	printk(KERN_INFO "Failed to register gpu driver.\n");
+	return ret;
+}
+
+static int __devinit gpu_remove(struct platform_device *pdev)
+{
+	drv_exit();
+
+#ifdef MRVL_CONFIG_PROC
+    remove_gc_proc_file();
+#endif
+
+#ifdef ANDROID
+    unregister_early_suspend(&gpu_early_suspend_desc);
+#endif
+	return 0;
+}
+
+static int __devinit gpu_suspend(struct platform_device *dev, pm_message_t state)
+{
+
+    printk("[galcore]: %s, %d\n",__func__, __LINE__);
+
+#if (defined CONFIG_PXA_DVFM) || (defined CONFIG_CPU_PXA910)
+    return 0;
+#endif
+
+    return _gpu_off(galDevice);
+}
+
+static int __devinit gpu_resume(struct platform_device *dev)
+{
+    printk("[galcore]: %s, %d\n",__func__, __LINE__);
+
+#if (defined CONFIG_PXA_DVFM) || (defined CONFIG_CPU_PXA910)
+	return 0;
+#endif
+
+    return _gpu_on(galDevice);
+}
+
+static struct platform_driver gpu_driver = {
+	.probe		= gpu_probe,
+	.remove		= gpu_remove,
+
+	.suspend	= gpu_suspend,
+	.resume		= gpu_resume,
+
+	.driver		= {
+		.name	= DEVICE_NAME,
+	}
+};
+
+#ifndef CONFIG_DOVE_GPU
+static struct resource gpu_resources[] = {
+    {
+        .name   = "gpu_irq",
+        .flags  = IORESOURCE_IRQ,
+    },
+    {
+        .name   = "gpu_base",
+        .flags  = IORESOURCE_MEM,
+    },
+    {
+        .name   = "gpu_mem",
+        .flags  = IORESOURCE_MEM,
+    },
+};
+
+static struct platform_device * gpu_device;
+#endif
+
+static int __init gpu_init(void)
+{
+	int ret = 0;
+
+#ifndef CONFIG_DOVE_GPU
+	gpu_resources[0].start = gpu_resources[0].end = irqLine;
+
+	gpu_resources[1].start = registerMemBase;
+	gpu_resources[1].end   = registerMemBase + registerMemSize;
+
+	gpu_resources[2].start = contiguousBase;
+	gpu_resources[2].end   = contiguousBase + contiguousSize;
+
+	/* Allocate device */
+	gpu_device = platform_device_alloc(DEVICE_NAME, -1);
+	if (!gpu_device)
+	{
+		printk(KERN_ERR "galcore: platform_device_alloc failed.\n");
+		ret = -ENOMEM;
+		goto out;
+	}
+
+	/* Insert resource */
+	ret = platform_device_add_resources(gpu_device, gpu_resources, 3);
+	if (ret)
+	{
+		printk(KERN_ERR "galcore: platform_device_add_resources failed.\n");
+		goto put_dev;
+	}
+
+	/* Add device */
+	ret = platform_device_add(gpu_device);
+	if (ret)
+	{
+		printk(KERN_ERR "galcore: platform_device_add failed.\n");
+		goto del_dev;
+	}
+#endif
+
+	ret = platform_driver_register(&gpu_driver);
+	if (!ret)
+	{
+		goto out;
+	}
+
+#ifndef CONFIG_DOVE_GPU
+del_dev:
+	platform_device_del(gpu_device);
+put_dev:
+	platform_device_put(gpu_device);
+#endif
+
+out:
+	return ret;
+
+}
+
+static void __exit gpu_exit(void)
+{
+	platform_driver_unregister(&gpu_driver);
+#ifndef CONFIG_DOVE_GPU
+	platform_device_unregister(gpu_device);
+#endif
+}
+
+module_init(gpu_init);
+module_exit(gpu_exit);
+
+#endif
+
+#ifdef CONFIG_PXA_DVFM
+#define TRACE   if(galDevice->needD2DebugInfo) \
+                { \
+                    printk("%s,%d\n",__func__,__LINE__); \
+                }
+
+static void gc_off(void)
+{
+    if(galDevice->kernel->hardware->chipPowerState != gcvPOWER_OFF)
+    {
+        gceSTATUS  status;
+	gckCOMMAND command;
+	 /* gctPOINTER buffer; */
+	 /* gctSIZE_T  bytes, requested; */
+
+        command = galDevice->kernel->command;
+         /* galDevice->kernel->notifyIdle = gcvFALSE; */
+
+         /*  stall */
+	{
+            /* Acquire the context switching mutex so nothing else can be
+		** committed. */
+		gcmkONERROR(
+			gckOS_AcquireMutex(galDevice->kernel->hardware->os,
+							   command->mutexContext,
+							   gcvINFINITE));
+
+             /* mdelay(20); */
+	}
+	 /*  stop */
+	{
+
+		/* Stop the command parser. */
+		gcmkONERROR(
+			gckCOMMAND_Stop(command));
+
+		/* Grab the command queue mutex so nothing can get access to the
+		** command queue. */
+		gcmkONERROR(
+			gckOS_AcquireMutex(galDevice->kernel->hardware->os,
+							   command->mutexQueue,
+							   gcvINFINITE));
+	}
+
+        {
+            gckOS_SuspendInterrupt(galDevice->os);
+            gckOS_ClockOff();
+        }
+
+        galDevice->kernel->hardware->chipPowerState = gcvPOWER_OFF;
+
+    }
+    return;
+
+OnError:
+	printk("ERROR: %s has error \n",__func__);
+}
+
+static void gc_on(void)
+{
+    gctUINT32 idle = 0;
+
+    if(galDevice->kernel->hardware->chipPowerState != gcvPOWER_ON)
+    {
+        gceSTATUS  status;
+
+        gckOS_ClockOn(0);
+        gckOS_ResumeInterrupt(galDevice->os);
+
+         /*  INITIALIZE */
+	{
+		/* Initialize hardware. */
+		gcmkONERROR(
+			gckHARDWARE_InitializeHardware(galDevice->kernel->hardware));
+
+		gcmkONERROR(
+			gckHARDWARE_SetFastClear(galDevice->kernel->hardware,
+									 galDevice->kernel->hardware->allowFastClear,
+									 galDevice->kernel->hardware->allowCompression));
+
+		/* Force the command queue to reload the next context. */
+		galDevice->kernel->command->currentContext = 0;
+	}
+
+	/* Sleep for 1ms, to make sure everything is powered on. */
+	mdelay(1); /* gcmkVERIFY_OK(gcoOS_Delay(galDevice->os, 1)); */
+
+	 /*  start */
+	{
+            /* Release the command mutex queue. */
+		gcmkONERROR(
+			gckOS_ReleaseMutex(galDevice->kernel->hardware->os,
+							   galDevice->kernel->command->mutexQueue));
+		/* Start the command processor. */
+		gcmkONERROR(
+			gckCOMMAND_Start(galDevice->kernel->command));
+	}
+	 /*  RELEASE_CONTEXT */
+	{
+		/* Release the context switching mutex. */
+		gcmkVERIFY_OK(
+			gckOS_ReleaseMutex(galDevice->kernel->hardware->os,
+							   galDevice->kernel->command->mutexContext));
+	}
+
+        galDevice->kernel->hardware->chipPowerState = gcvPOWER_ON;
+         /* galDevice->kernel->notifyIdle = gcvTRUE; */
+
+        /* Read idle register. */
+        gcmkVERIFY_OK(gckHARDWARE_GetIdle(galDevice->kernel->hardware, gcvFALSE, &idle));
+
+#if MRVL_LOW_POWER_MODE_DEBUG
+        {
+            int strlen = 0;
+            strlen = sprintf(galDevice->kernel->kernelMSG + galDevice->kernel->msgLen,
+					"after reset, idle register:0x%08X\n",idle);
+            galDevice->kernel->msgLen += strlen;
+        }
+#endif
+        if(galDevice->needD2DebugInfo)
+            printk("after reset, idle register:0x%08X\n",idle);
+    }
+    else
+    {
+#if MRVL_LOW_POWER_MODE_DEBUG
+        {
+            int strlen = 0;
+            strlen = sprintf(galDevice->kernel->kernelMSG + galDevice->kernel->msgLen,
+					"no reset, idle register:0x%08X\n",idle);
+            galDevice->kernel->msgLen += strlen;
+        }
+#endif
+        if(galDevice->needD2DebugInfo)
+            printk("no reset, idle register:0x%08X\n",idle);
+    }
+    return;
+
+OnError:
+	printk("ERROR: %s has error \n",__func__);
+}
+
+static int galcore_dvfm_notifier(struct notifier_block *nb,
+				unsigned long val, void *data)
+{
+    struct dvfm_freqs *freqs = (struct dvfm_freqs *)data;
+	struct op_info *new = NULL;
+    struct op_info *old = NULL;
+	struct dvfm_md_opt *md_old;
+    struct dvfm_md_opt *md_new;
+    int newMode, oldMode;
+
+    static int count = 0;
+    static int countD0CS = 0;
+
+	if (freqs)
+	{
+		new = &freqs->new_info;
+        old = &freqs->old_info;
+	}
+	else
+		return 0;
+
+	md_old = (struct dvfm_md_opt *)old->op;
+    md_new = (struct dvfm_md_opt *)new->op;
+    oldMode = md_old->power_mode;
+    newMode = md_new->power_mode;
+
+    if(galDevice->needResetAfterD2)
+    {
+        /*
+        Any run mode -> D0CS
+        Pre:    Turn off GC clock
+        Post:   Do nothing
+
+        D0CS -> any run mode
+        Pre:    Do nothing
+        Post:   Turn on GC clock and restore state
+
+        D0CS mode -> D1/D2/CG
+        Pre:    Do nothing
+        Post:   Do nothing
+
+        Any run mode (except D0CS) -> D1/D2/CG
+        Pre:    Turn off GC clock
+        Post:   Turn on GC clock and restore state
+        */
+
+        if((oldMode == POWER_MODE_D0) && (newMode == POWER_MODE_D0CS))
+        { /*  Any run mode -> D0CS */
+            if(val == DVFM_FREQ_PRECHANGE)
+            {
+                gc_off();
+            }
+            else if(val == DVFM_FREQ_POSTCHANGE)
+            {
+            }
+        }
+        else if((oldMode == POWER_MODE_D0CS) && (newMode == POWER_MODE_D0))
+        { /*  D0CS -> any run mode */
+            if(val == DVFM_FREQ_PRECHANGE)
+            {
+            }
+            else if(val == DVFM_FREQ_POSTCHANGE)
+            {
+                gc_on();
+                countD0CS++;
+            }
+        }
+        else if((oldMode == POWER_MODE_D0CS)
+            && ((newMode == POWER_MODE_D1)
+                || (newMode == POWER_MODE_D2)
+                || (newMode == POWER_MODE_CG)))
+        { /*  D0CS mode -> D1/D2/CG */
+            if(val == DVFM_FREQ_PRECHANGE)
+            {
+            }
+            else if(val == DVFM_FREQ_POSTCHANGE)
+            {
+            }
+        }
+        else if((oldMode == POWER_MODE_D0)
+            && ((newMode == POWER_MODE_D1)
+                || (newMode == POWER_MODE_D2)
+                || (newMode == POWER_MODE_CG)))
+        { /*  Any run mode (except D0CS) -> D1/D2/CG */
+            if(val == DVFM_FREQ_PRECHANGE)
+            {
+                galDevice->enableMdelay = gcvTRUE;
+                gc_off();
+            }
+            else if(val == DVFM_FREQ_POSTCHANGE)
+            {
+                gc_on();
+                count++;
+                galDevice->enableMdelay = gcvFALSE;
+            }
+        }
+
+        if((oldMode != newMode)&&(val == DVFM_FREQ_POSTCHANGE))
+        {
+#if MRVL_LOW_POWER_MODE_DEBUG
+            {
+                int strlen = 0;
+                strlen = sprintf(galDevice->kernel->kernelMSG + galDevice->kernel->msgLen,
+						"count:%d,countD0CS:%d,power mode %d->%d\n",count,countD0CS,oldMode,newMode);
+                galDevice->kernel->msgLen += strlen;
+            }
+#endif
+            if(galDevice->needD2DebugInfo)
+                printk("[%s@%d]count:%d,countD0CS:%d,power mode %d->%d\n",__func__,__LINE__,count,countD0CS,oldMode,newMode);
+        }
+
+    }
+    else
+    {
+        if((oldMode != newMode)&&(val == DVFM_FREQ_POSTCHANGE))
+        {
+#if 0 /* AXI bus may be off at this point. Remove gckHARDWARE_GetIdle in case of this case */
+            gctUINT32 idle;
+
+            /* Read idle register. */
+		gcmkVERIFY_OK(gckHARDWARE_GetIdle(galDevice->kernel->hardware, gcvFALSE, &idle));
+
+            if(galDevice->needD2DebugInfo)
+                printk("[%s@%d]count:%d,countD0CS:%d,power mode %d->%d\n",__func__, __LINE__,count,countD0CS,oldMode,newMode);
+#endif
+        }
+    }
+	return 0;
+
+}
+
+#endif
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/arch/unified/hal/kernel/gc_hal_kernel_hardware.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/arch/unified/hal/kernel/gc_hal_kernel_hardware.c
@@ -0,0 +1,3559 @@
+/****************************************************************************
+*
+*    Copyright (C) 2005 - 2010 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public License as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+#include "gc_hal.h"
+#include "gc_hal_kernel.h"
+
+#define _GC_OBJ_ZONE	gcvZONE_HARDWARE
+
+/******************************************************************************\
+********************************* Support Code *********************************
+\******************************************************************************/
+
+static gceSTATUS
+_IdentifyHardware(
+	IN gckOS Os,
+	OUT gceCHIPMODEL * ChipModel,
+	OUT gctUINT32_PTR ChipRevision,
+	OUT gctUINT32_PTR ChipFeatures,
+	OUT gctUINT32_PTR ChipMinorFeatures0,
+	OUT gctUINT32_PTR ChipMinorFeatures1
+	)
+{
+	gceSTATUS status;
+	gctUINT32 chipIdentity;
+
+	gcmkHEADER_ARG("Os=0x%x", Os);
+
+	/* Read chip identity register. */
+	gcmkONERROR(
+		gckOS_ReadRegister(Os, 0x00018, &chipIdentity));
+
+	/* Special case for older graphic cores. */
+	if (((((gctUINT32) (chipIdentity)) >> (0 ? 31:24) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1)))))) == (0x01 & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))))
+	{
+		*ChipModel    = gcv500;
+		*ChipRevision = ( ((((gctUINT32) (chipIdentity)) >> (0 ? 15:12)) & ((gctUINT32) ((((1 ? 15:12) - (0 ? 15:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:12) - (0 ? 15:12) + 1)))))) );
+	}
+
+	else
+	{
+		/* Read chip identity register. */
+		gcmkONERROR(
+			gckOS_ReadRegister(Os,
+							   0x00020,
+							   (gctUINT32_PTR) ChipModel));
+
+		/* !!!! HACK ALERT !!!! */
+		/* Because people change device IDs without letting software know
+		** about it - here is the hack to make it all look the same.  Only
+		** for GC400 family.  Next time - TELL ME!!! */
+		if ((*ChipModel & 0xFF00) == 0x0400)
+		{
+			*ChipModel &= 0x0400;
+		}
+
+		/* Read CHIP_REV register. */
+		gcmkONERROR(
+			gckOS_ReadRegister(Os, 0x00024, ChipRevision));
+
+		if ((*ChipModel    == gcv300)
+		&&  (*ChipRevision == 0x2201)
+		)
+		{
+			gctUINT32 date, time;
+
+			/* Read date and time registers. */
+			gcmkONERROR(
+				gckOS_ReadRegister(Os, 0x00028, &date));
+
+			gcmkONERROR(
+				gckOS_ReadRegister(Os, 0x0002C, &time));
+
+			if ((date == 0x20080814) && (time == 0x12051100))
+			{
+				/* This IP has an ECO; put the correct revision in it. */
+				*ChipRevision = 0x1051;
+			}
+		}
+	}
+
+	/* Read chip feature register. */
+	gcmkONERROR(
+		gckOS_ReadRegister(Os, 0x0001C, ChipFeatures));
+
+	/* Disable fast clear on GC700. */
+	if (*ChipModel == gcv700)
+	{
+		*ChipFeatures = ((((gctUINT32) (*ChipFeatures)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)));
+	}
+
+	if (((*ChipModel == gcv500) && (*ChipRevision < 2))
+	||  ((*ChipModel == gcv300) && (*ChipRevision < 0x2000))
+	)
+	{
+		/* GC500 rev 1.x and GC300 rev < 2.0 doesn't have these registers. */
+		*ChipMinorFeatures0 = 0;
+		*ChipMinorFeatures1 = 0;
+	}
+	else
+	{
+		/* Read chip minor feature register #0. */
+		gcmkONERROR(
+			gckOS_ReadRegister(Os,
+							   0x00034,
+							   ChipMinorFeatures0));
+
+		if (((((gctUINT32) (*ChipMinorFeatures0)) >> (0 ? 21:21) & ((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1)))))))
+		)
+		{
+			/* Read chip minor featuress register #1. */
+			gcmkONERROR(
+				gckOS_ReadRegister(Os,
+								   0x00074,
+								   ChipMinorFeatures1));
+		}
+		else
+		{
+			/* Chip doesn't has minor features register #1. */
+			*ChipMinorFeatures1 = 0;
+		}
+	}
+
+#if MRVL_DISABLE_FASTCLEAR
+		*ChipFeatures = *ChipFeatures &  ~0x00000001;
+#endif
+
+	/* Success. */
+	gcmkFOOTER_ARG("*ChipModel=%x *ChipRevision=%x *ChipFeatures=%08x "
+				   "*ChipMinorFeatures0=%08X *ChipMinorFeatures1=%08x",
+				   *ChipModel, *ChipRevision, *ChipFeatures,
+				   *ChipMinorFeatures0, *ChipMinorFeatures1);
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+static gceSTATUS
+_GetChipSpecs(
+	IN gckHARDWARE Hardware
+	)
+{
+	gctUINT32 streamCount = 0;
+	gctUINT32 registerMax = 0;
+	gctUINT32 threadCount = 0;
+	gctUINT32 shaderCoreCount = 0;
+	gctUINT32 vertexCacheSize = 0;
+	gctUINT32 vertexOutputBufferSize = 0;
+	gceSTATUS status;
+
+	gcmkHEADER_ARG("Hardware=0x%x", Hardware);
+
+	if (((((gctUINT32) (Hardware->chipMinorFeatures0)) >> (0 ? 21:21) & ((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1))))))))
+	{
+		gctUINT32 specs;
+
+		/* Read gcChipSpecs register. */
+		gcmkONERROR(
+			gckOS_ReadRegister(Hardware->os, 0x00048, &specs));
+
+		/* Handy macro to improve reading. */
+#define gcmSPEC_FIELD(field) \
+		( ((((gctUINT32) (specs)) >> (0 ? GC_CHIP_SPECS_field)) & ((gctUINT32) ((((1 ? GC_CHIP_SPECS_field) - (0 ? GC_CHIP_SPECS_field) + 1) == 32) ? ~0 : (~(~0 << ((1 ? GC_CHIP_SPECS_field) - (0 ? GC_CHIP_SPECS_field) + 1)))))) )
+
+		/* Extract the fields. */
+		streamCount            = ( ((((gctUINT32) (specs)) >> (0 ? 3:0)) & ((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1)))))) );
+		registerMax            = ( ((((gctUINT32) (specs)) >> (0 ? 7:4)) & ((gctUINT32) ((((1 ? 7:4) - (0 ? 7:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:4) - (0 ? 7:4) + 1)))))) );
+		threadCount            = ( ((((gctUINT32) (specs)) >> (0 ? 11:8)) & ((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1)))))) );
+		shaderCoreCount        = ( ((((gctUINT32) (specs)) >> (0 ? 24:20)) & ((gctUINT32) ((((1 ? 24:20) - (0 ? 24:20) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 24:20) - (0 ? 24:20) + 1)))))) );
+		vertexCacheSize        = ( ((((gctUINT32) (specs)) >> (0 ? 16:12)) & ((gctUINT32) ((((1 ? 16:12) - (0 ? 16:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:12) - (0 ? 16:12) + 1)))))) );
+		vertexOutputBufferSize = ( ((((gctUINT32) (specs)) >> (0 ? 31:28)) & ((gctUINT32) ((((1 ? 31:28) - (0 ? 31:28) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:28) - (0 ? 31:28) + 1)))))) );
+	}
+
+	/* Get the stream count. */
+	Hardware->streamCount = (streamCount != 0)
+						  ? streamCount
+						  : (Hardware->chipModel >= gcv1000) ? 4 : 1;
+
+	gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
+				   "Specs: streamCount=%u%s\n",
+				   Hardware->streamCount,
+				   (streamCount == 0) ? " (default)" : "");
+
+	/* Get the vertex output buffer size. */
+	Hardware->vertexOutputBufferSize = (vertexOutputBufferSize != 0)
+									 ? 1 << vertexOutputBufferSize
+									 : (Hardware->chipModel == gcv400)
+									   ? (Hardware->chipRevision < 0x4000) ? 512
+									   : (Hardware->chipRevision < 0x4200) ? 256
+									   : 128
+								     : (Hardware->chipModel == gcv530)
+								       ? (Hardware->chipRevision < 0x4200) ? 512
+									   : 128
+								     : 512;
+
+	gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
+				   "Specs: vertexOutputBufferSize=%u%s\n",
+				   Hardware->vertexOutputBufferSize,
+				   (vertexOutputBufferSize == 0) ? " (default)" : "");
+
+	/* Get the maximum number of threads. */
+	Hardware->threadCount = (threadCount != 0)
+						  ? 1 << threadCount
+						  : (Hardware->chipModel == gcv400) ? 64
+						  : (Hardware->chipModel == gcv500) ? 128
+						  : (Hardware->chipModel == gcv530) ? 128
+						  : 256;
+
+	gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
+				   "Specs: threadCount=%u%s\n",
+				   Hardware->threadCount,
+				   (threadCount == 0) ? " (default)" : "");
+
+	/* Get the number of shader cores. */
+	Hardware->shaderCoreCount = (shaderCoreCount != 0)
+							  ? shaderCoreCount
+							  : (Hardware->chipModel >= gcv1000) ? 2
+							  : 1;
+	gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
+				   "Specs: shaderCoreCount=%u%s\n",
+				   Hardware->shaderCoreCount,
+				   (shaderCoreCount == 0) ? " (default)" : "");
+
+	/* Get the vertex cache size. */
+	Hardware->vertexCacheSize = (vertexCacheSize != 0)
+							  ? vertexCacheSize
+							  : 8;
+	gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
+				   "Specs: vertexCacheSize=%u%s\n",
+				   Hardware->vertexCacheSize,
+				   (vertexCacheSize == 0) ? " (default)" : "");
+
+	/* Get the maximum number of temporary registers. */
+	Hardware->registerMax = (registerMax != 0)
+						  ? 1 << registerMax
+						  : (Hardware->chipModel == gcv400) ? 32
+						  : 64;
+	gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
+				   "Specs: registerMax=%u%s\n",
+				   Hardware->registerMax,
+				   (registerMax == 0) ? " (default)" : "");
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/******************************************************************************\
+****************************** gckHARDWARE API code *****************************
+\******************************************************************************/
+
+/*******************************************************************************
+**
+**  gckHARDWARE_Construct
+**
+**  Construct a new gckHARDWARE object.
+**
+**  INPUT:
+**
+**      gckOS Os
+**          Pointer to an initialized gckOS object.
+**
+**  OUTPUT:
+**
+**      gckHARDWARE * Hardware
+**          Pointer to a variable that will hold the pointer to the gckHARDWARE
+**          object.
+*/
+gceSTATUS
+gckHARDWARE_Construct(
+	IN gckOS Os,
+	OUT gckHARDWARE * Hardware
+	)
+{
+	gckHARDWARE hardware = gcvNULL;
+	gceSTATUS status;
+	gceCHIPMODEL chipModel;
+	gctUINT32 chipRevision;
+	gctUINT32 chipFeatures;
+	gctUINT32 chipMinorFeatures0;
+	gctUINT32 chipMinorFeatures1;
+	gctUINT16 data = 0xff00;
+
+	gcmkHEADER_ARG("Os=0x%x", Os);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmkVERIFY_ARGUMENT(Hardware != gcvNULL);
+
+	/* Identify the hardware. */
+	gcmkONERROR(
+		_IdentifyHardware(Os,
+						  &chipModel,
+						  &chipRevision,
+						  &chipFeatures,
+						  &chipMinorFeatures0,
+						  &chipMinorFeatures1));
+
+	/* Allocate the gckHARDWARE object. */
+	gcmkONERROR(
+		gckOS_Allocate(Os,
+					   gcmSIZEOF(struct _gckHARDWARE),
+					   (gctPOINTER *) &hardware));
+
+	/* Initialize the gckHARDWARE object. */
+	hardware->object.type = gcvOBJ_HARDWARE;
+	hardware->os          = Os;
+
+	/* Set chip identity. */
+	hardware->chipModel          = chipModel;
+	hardware->chipRevision       = chipRevision;
+	hardware->chipFeatures       = chipFeatures;
+	hardware->chipMinorFeatures0 = chipMinorFeatures0;
+	hardware->chipMinorFeatures1 = chipMinorFeatures1;
+	hardware->powerBaseAddress   = (  (chipModel == gcv300)
+								   && (chipRevision < 0x2000)
+								   ) ? 0x100 : 0x00;
+
+	/* Get chip specs. */
+	gcmkONERROR(
+		_GetChipSpecs(hardware));
+
+	/* Determine whether bug fixes #1 are present. */
+	hardware->extraEventStates = ((((gctUINT32) (chipMinorFeatures1)) >> (0 ? 3:3) & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1)))))) == (0x0 & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1)))))));
+
+	/* Check if big endian */
+	hardware->bigEndian = (*(gctUINT8 *)&data == 0xff);
+
+	/* Initialize the fast clear. */
+	gcmkONERROR(
+		gckHARDWARE_SetFastClear(hardware, -1, -1));
+
+	/* Set power state to ON. */
+	hardware->chipPowerState = gcvPOWER_ON;
+    hardware->lastWaitLink   = ~0U;
+	hardware->hang = gcvFALSE;
+
+	/* Return pointer to the gckHARDWARE object. */
+	*Hardware = hardware;
+
+	/* Success. */
+	gcmkFOOTER_ARG("*Hardware=0x%x", *Hardware);
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Roll back. */
+	if (hardware != gcvNULL)
+	{
+		gcmkVERIFY_OK(gckOS_Free(Os, hardware));
+	}
+
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**  gckHARDWARE_Destroy
+**
+**  Destroy an gckHARDWARE object.
+**
+**  INPUT:
+**
+**      gckHARDWARE Hardware
+**          Pointer to the gckHARDWARE object that needs to be destroyed.
+**
+**  OUTPUT:
+**
+**      Nothing.
+*/
+gceSTATUS
+gckHARDWARE_Destroy(
+    IN gckHARDWARE Hardware
+    )
+{
+    /* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+
+	gcmkTRACE(gcvLEVEL_VERBOSE,
+			 "gckHARDWARE_Destroy: Hardware=0x%x",
+			 Hardware);
+
+    /* Mark the object as unknown. */
+	Hardware->object.type = gcvOBJ_UNKNOWN;
+
+    /* Free the object. */
+	return gckOS_Free(Hardware->os, Hardware);
+}
+
+/*******************************************************************************
+**
+**  gckHARDWARE_InitializeHardware
+**
+**  Initialize the hardware.
+**
+**  INPUT:
+**
+**      gckHARDWARE Hardware
+**          Pointer to the gckHARDWARE object.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckHARDWARE_InitializeHardware(
+    IN gckHARDWARE Hardware
+	)
+{
+	gceSTATUS status;
+	gctUINT32 baseAddress;
+
+	gcmkHEADER_ARG("Hardware=0x%x", Hardware);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+
+	/* Disable isolate GPU bit. */
+	gcmkONERROR(
+		gckOS_WriteRegister(Hardware->os,
+							0x00000,
+							((((gctUINT32) (0x00000100)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:19) - (0 ? 19:19) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:19) - (0 ? 19:19) + 1))))))) << (0 ? 19:19))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 19:19) - (0 ? 19:19) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:19) - (0 ? 19:19) + 1))))))) << (0 ? 19:19)))));
+
+	/* Reset memory counters. */
+	gcmkONERROR(
+		gckOS_WriteRegister(Hardware->os,
+							0x0003C,
+							~0U));
+
+	gcmkONERROR(
+		gckOS_WriteRegister(Hardware->os,
+							0x0003C,
+							0));
+
+	/* Get the system's physical base address. */
+	gcmkONERROR(
+		gckOS_GetBaseAddress(Hardware->os, &baseAddress));
+
+	/* Program the base addesses. */
+	gcmkONERROR(
+		gckOS_WriteRegister(Hardware->os,
+							0x0041C,
+							baseAddress));
+
+	gcmkONERROR(
+		gckOS_WriteRegister(Hardware->os,
+							0x00418,
+							baseAddress));
+
+	gcmkONERROR(
+		gckOS_WriteRegister(Hardware->os,
+							0x00420,
+							baseAddress));
+
+	gcmkONERROR(
+		gckOS_WriteRegister(Hardware->os,
+							0x00428,
+							baseAddress));
+
+	gcmkONERROR(
+		gckOS_WriteRegister(Hardware->os,
+							0x00424,
+							baseAddress));
+
+#if !VIVANTE_PROFILER
+	{
+		gctUINT32 data;
+
+		gcmkONERROR(
+			gckOS_ReadRegister(Hardware->os,
+							   Hardware->powerBaseAddress +
+							   0x00100,
+							   &data));
+
+		/* Enable clock gating. */
+		data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)));
+
+		if ((Hardware->chipRevision == 0x4301)
+		||  (Hardware->chipRevision == 0x4302)
+		)
+		{
+			/* Disable stall module level clock gating for 4.3.0.1 and 4.3.0.2
+			** revisions. */
+			data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1)));
+		}
+
+		gcmkONERROR(
+			gckOS_WriteRegister(Hardware->os,
+								Hardware->powerBaseAddress +
+								0x00100,
+								data));
+
+		/* Disable PE clock gating on revs 4.6 and up when HZ is present. */
+		if ((Hardware->chipRevision >= 0x4600)
+		&&  (Hardware->chipRevision <  0x5000)
+		&&  ((((gctUINT32) (Hardware->chipMinorFeatures0)) >> (0 ? 27:27) & ((gctUINT32) ((((1 ? 27:27) - (0 ? 27:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:27) - (0 ? 27:27) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 27:27) - (0 ? 27:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:27) - (0 ? 27:27) + 1)))))))
+		)
+		{
+			gcmkONERROR(
+				gckOS_ReadRegister(Hardware->os,
+								   Hardware->powerBaseAddress +
+								   0x00104,
+								   &data));
+
+			/* Disable PE clock gating. */
+			data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2)));
+
+			gcmkONERROR(
+				gckOS_WriteRegister(Hardware->os,
+									Hardware->powerBaseAddress +
+									0x00104,
+									data));
+	}
+	}
+#endif
+
+	/* Test if MMU is initialized. */
+	if ((Hardware->kernel      != gcvNULL)
+	&&  (Hardware->kernel->mmu != gcvNULL)
+	)
+	{
+		/* Reset MMU. */
+		gcmkONERROR(
+			gckHARDWARE_SetMMU(Hardware,
+							   Hardware->kernel->mmu->pageTableLogical));
+	}
+
+	/* Success. */
+	gcmkFOOTER_NO();
+    return gcvSTATUS_OK;
+
+OnError:
+	/* Return the error. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**  gckHARDWARE_QueryMemory
+**
+**  Query the amount of memory available on the hardware.
+**
+**  INPUT:
+**
+**      gckHARDWARE Hardware
+**          Pointer to the gckHARDWARE object.
+**
+**  OUTPUT:
+**
+**      gctSIZE_T * InternalSize
+**          Pointer to a variable that will hold the size of the internal video
+**          memory in bytes.  If 'InternalSize' is gcvNULL, no information of the
+**          internal memory will be returned.
+**
+**      gctUINT32 * InternalBaseAddress
+**          Pointer to a variable that will hold the hardware's base address for
+**          the internal video memory.  This pointer cannot be gcvNULL if
+**          'InternalSize' is also non-gcvNULL.
+**
+**      gctUINT32 * InternalAlignment
+**          Pointer to a variable that will hold the hardware's base address for
+**          the internal video memory.  This pointer cannot be gcvNULL if
+**          'InternalSize' is also non-gcvNULL.
+**
+**      gctSIZE_T * ExternalSize
+**          Pointer to a variable that will hold the size of the external video
+**          memory in bytes.  If 'ExternalSize' is gcvNULL, no information of the
+**          external memory will be returned.
+**
+**      gctUINT32 * ExternalBaseAddress
+**          Pointer to a variable that will hold the hardware's base address for
+**          the external video memory.  This pointer cannot be gcvNULL if
+**          'ExternalSize' is also non-gcvNULL.
+**
+**      gctUINT32 * ExternalAlignment
+**          Pointer to a variable that will hold the hardware's base address for
+**          the external video memory.  This pointer cannot be gcvNULL if
+**          'ExternalSize' is also non-gcvNULL.
+**
+**      gctUINT32 * HorizontalTileSize
+**          Number of horizontal pixels per tile.  If 'HorizontalTileSize' is
+**          gcvNULL, no horizontal pixel per tile will be returned.
+**
+**      gctUINT32 * VerticalTileSize
+**          Number of vertical pixels per tile.  If 'VerticalTileSize' is
+**          gcvNULL, no vertical pixel per tile will be returned.
+*/
+gceSTATUS
+gckHARDWARE_QueryMemory(
+    IN gckHARDWARE Hardware,
+    OUT gctSIZE_T * InternalSize,
+    OUT gctUINT32 * InternalBaseAddress,
+    OUT gctUINT32 * InternalAlignment,
+    OUT gctSIZE_T * ExternalSize,
+    OUT gctUINT32 * ExternalBaseAddress,
+    OUT gctUINT32 * ExternalAlignment,
+    OUT gctUINT32 * HorizontalTileSize,
+    OUT gctUINT32 * VerticalTileSize
+    )
+{
+	gcmkHEADER_ARG("Hardware=0x%x", Hardware);
+
+    /* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+
+    if (InternalSize != gcvNULL)
+    {
+        /* No internal memory. */
+        *InternalSize = 0;
+    }
+
+    if (ExternalSize != gcvNULL)
+    {
+        /* No external memory. */
+        *ExternalSize = 0;
+    }
+
+    if (HorizontalTileSize != gcvNULL)
+    {
+		/* 4x4 tiles. */
+        *HorizontalTileSize = 4;
+    }
+
+    if (VerticalTileSize != gcvNULL)
+    {
+		/* 4x4 tiles. */
+        *VerticalTileSize = 4;
+    }
+
+    /* Success. */
+    gcmkFOOTER_ARG("*InternalSize=%lu *InternalBaseAddress=%08x "
+			   "*InternalAlignment=%08x *ExternalSize=%lu "
+			   "*ExternalBaseAddress=%08x *ExtenalAlignment=%08x "
+			   "*HorizontalTileSize=%u *VerticalTileSize=%u",
+			   gcmOPT_VALUE(InternalSize),
+			   gcmOPT_VALUE(InternalBaseAddress),
+			   gcmOPT_VALUE(InternalAlignment),
+			   gcmOPT_VALUE(ExternalSize),
+			   gcmOPT_VALUE(ExternalBaseAddress),
+			   gcmOPT_VALUE(ExternalAlignment),
+			   gcmOPT_VALUE(HorizontalTileSize),
+			   gcmOPT_VALUE(VerticalTileSize));
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**  gckHARDWARE_QueryChipIdentity
+**
+**  Query the identity of the hardware.
+**
+**  INPUT:
+**
+**      gckHARDWARE Hardware
+**          Pointer to the gckHARDWARE object.
+**
+**  OUTPUT:
+**
+**      gceCHIPMODEL * ChipModel
+**          If 'ChipModel' is not gcvNULL, the variable it points to will
+**			receive the model of the chip.
+**
+**      gctUINT32 * ChipRevision
+**          If 'ChipRevision' is not gcvNULL, the variable it points to will
+**			receive the revision of the chip.
+**
+**      gctUINT32 * ChipFeatures
+**          If 'ChipFeatures' is not gcvNULL, the variable it points to will
+**			receive the feature set of the chip.
+**
+**      gctUINT32 * ChipMinorFeatures
+**          If 'ChipMinorFeatures' is not gcvNULL, the variable it points to
+**			will receive the minor feature set of the chip.
+**
+**      gctUINT32 * ChipMinorFeatures1
+**          If 'ChipMinorFeatures1' is not gcvNULL, the variable it points to
+**			will receive the minor feature set 1 of the chip.
+**
+*/
+gceSTATUS
+gckHARDWARE_QueryChipIdentity(
+    IN gckHARDWARE Hardware,
+    OUT gceCHIPMODEL * ChipModel,
+    OUT gctUINT32 * ChipRevision,
+	OUT gctUINT32* ChipFeatures,
+	OUT gctUINT32* ChipMinorFeatures,
+	OUT gctUINT32* ChipMinorFeatures1
+    )
+{
+	gcmkHEADER_ARG("Hardware=0x%x", Hardware);
+
+    /* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+
+    /* Return chip model. */
+    if (ChipModel != gcvNULL)
+    {
+	*ChipModel = Hardware->chipModel;
+    }
+
+    /* Return revision number. */
+    if (ChipRevision != gcvNULL)
+    {
+		*ChipRevision = Hardware->chipRevision;
+    }
+
+    /* Return feature set. */
+    if (ChipFeatures != gcvNULL)
+    {
+	gctUINT32 features = Hardware->chipFeatures;
+
+		if (( ((((gctUINT32) (features)) >> (0 ? 0:0)) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1)))))) ))
+		{
+			/* Override fast clear by command line. */
+			features = ((((gctUINT32) (features)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (Hardware->allowFastClear) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)));
+		}
+
+		if (( ((((gctUINT32) (features)) >> (0 ? 5:5)) & ((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1)))))) ))
+		{
+			/* Override compression by command line. */
+			features = ((((gctUINT32) (features)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1))))))) << (0 ? 5:5))) | (((gctUINT32) ((gctUINT32) (Hardware->allowCompression) & ((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1))))))) << (0 ? 5:5)));
+		}
+
+		/* Mark 2D pipe as available for GC500.0 through GC500.2 and GC300,
+		** since they did not have this bit. */
+		if ((  (Hardware->chipModel == gcv500)
+			&& (Hardware->chipRevision <= 2)
+			)
+		||  (Hardware->chipModel == gcv300)
+		)
+		{
+			features = ((((gctUINT32) (features)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9)));
+		}
+
+		*ChipFeatures = features;
+    }
+
+    /* Return minor feature set. */
+    if (ChipMinorFeatures != gcvNULL)
+    {
+		*ChipMinorFeatures = Hardware->chipMinorFeatures0;
+	}
+
+    /* Return minor feature set 1. */
+    if (ChipMinorFeatures1 != gcvNULL)
+    {
+		*ChipMinorFeatures1 = Hardware->chipMinorFeatures1;
+	}
+
+    /* Success. */
+    gcmkFOOTER_ARG("*ChipModel=%x *ChipRevision=%x *ChipFeatures=%08x "
+			   "*ChipMinorFeatures=%08x *ChipMinorFeatures1=%08x",
+			   gcmOPT_VALUE(ChipModel), gcmOPT_VALUE(ChipRevision),
+			   gcmOPT_VALUE(ChipFeatures), gcmOPT_VALUE(ChipMinorFeatures),
+			   gcmOPT_VALUE(ChipMinorFeatures1));
+    return gcvSTATUS_OK;
+}
+
+gceSTATUS
+gckHARDWARE_QueryChipSpecs(
+	IN gckHARDWARE Hardware,
+	OUT gctUINT32_PTR StreamCount,
+	OUT gctUINT32_PTR RegisterMax,
+	OUT gctUINT32_PTR ThreadCount,
+	OUT gctUINT32_PTR ShaderCoreCount,
+	OUT gctUINT32_PTR VertexCacheSize,
+	OUT gctUINT32_PTR VertexOutputBufferSize
+	)
+{
+	gcmkHEADER_ARG("Hardware=0x%x", Hardware);
+
+	/* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+
+    /* Return the number of streams. */
+	if (StreamCount != gcvNULL)
+	{
+		*StreamCount = Hardware->streamCount;
+	}
+
+	/* Return the number of temporary registers. */
+	if (RegisterMax != gcvNULL)
+	{
+		*RegisterMax = Hardware->registerMax;
+	}
+
+	/* Return the maximum number of thrteads. */
+	if (ThreadCount != gcvNULL)
+	{
+		*ThreadCount = Hardware->threadCount;
+	}
+
+	/* Return the number of shader cores. */
+	if (ShaderCoreCount != gcvNULL)
+	{
+		*ShaderCoreCount = Hardware->shaderCoreCount;
+	}
+
+	/* Return the number of entries in the vertex cache. */
+	if (VertexCacheSize != gcvNULL)
+	{
+		*VertexCacheSize = Hardware->vertexCacheSize;
+	}
+
+	/* Return the number of entries in the vertex output buffer. */
+	if (VertexOutputBufferSize != gcvNULL)
+	{
+		*VertexOutputBufferSize = Hardware->vertexOutputBufferSize;
+	}
+
+	/* Success. */
+	gcmkFOOTER_ARG("*StreamCount=%u *RegisterMax=%u *ThreadCount=%u "
+				   "*ShaderCoreCount=%u *VertexCacheSize=%u "
+				   "*VertexOutputBufferSize=%u",
+				   gcmOPT_VALUE(StreamCount), gcmOPT_VALUE(RegisterMax),
+				   gcmOPT_VALUE(ThreadCount), gcmOPT_VALUE(ShaderCoreCount),
+				   gcmOPT_VALUE(VertexCacheSize),
+				   gcmOPT_VALUE(VertexOutputBufferSize));
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**  gckHARDWARE_ConvertFormat
+**
+**  Convert an API format to hardware parameters.
+**
+**  INPUT:
+**
+**      gckHARDWARE Hardware
+**          Pointer to the gckHARDWARE object.
+**
+**      gceSURF_FORMAT Format
+**          API format to convert.
+**
+**  OUTPUT:
+**
+**      gctUINT32 * BitsPerPixel
+**          Pointer to a variable that will hold the number of bits per pixel.
+**
+**      gctUINT32 * BytesPerTile
+**          Pointer to a variable that will hold the number of bytes per tile.
+*/
+gceSTATUS
+gckHARDWARE_ConvertFormat(
+    IN gckHARDWARE Hardware,
+    IN gceSURF_FORMAT Format,
+    OUT gctUINT32 * BitsPerPixel,
+    OUT gctUINT32 * BytesPerTile
+    )
+{
+	gctUINT32 bitsPerPixel;
+	gctUINT32 bytesPerTile;
+
+	gcmkHEADER_ARG("Hardware=0x%x Format=%d", Hardware, Format);
+
+    /* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+
+    /* Dispatch on format. */
+	switch (Format)
+	{
+	case gcvSURF_INDEX8:
+	case gcvSURF_A8:
+	case gcvSURF_L8:
+		/* 8-bpp format. */
+		bitsPerPixel  = 8;
+		bytesPerTile  = (8 * 4 * 4) / 8;
+		break;
+
+	case gcvSURF_YV12:
+	case gcvSURF_I420:
+	case gcvSURF_NV12:
+	case gcvSURF_NV21:
+		/* 12-bpp planar YUV formats. */
+		bitsPerPixel  = 12;
+		bytesPerTile  = (12 * 4 * 4) / 8;
+		break;
+
+	case gcvSURF_A8L8:
+	case gcvSURF_X4R4G4B4:
+	case gcvSURF_A4R4G4B4:
+	case gcvSURF_X1R5G5B5:
+	case gcvSURF_A1R5G5B5:
+	case gcvSURF_R5G5B5X1:
+	case gcvSURF_R4G4B4X4:
+	case gcvSURF_X4B4G4R4:
+	case gcvSURF_X1B5G5R5:
+	case gcvSURF_B4G4R4X4:
+	case gcvSURF_R5G6B5:
+	case gcvSURF_B5G5R5X1:
+	case gcvSURF_YUY2:
+	case gcvSURF_UYVY:
+	case gcvSURF_YVYU:
+	case gcvSURF_VYUY:
+	case gcvSURF_NV16:
+	case gcvSURF_NV61:
+	case gcvSURF_D16:
+		/* 16-bpp format. */
+		bitsPerPixel  = 16;
+		bytesPerTile  = (16 * 4 * 4) / 8;
+		break;
+
+	case gcvSURF_X8R8G8B8:
+	case gcvSURF_A8R8G8B8:
+	case gcvSURF_X8B8G8R8:
+	case gcvSURF_A8B8G8R8:
+	case gcvSURF_R8G8B8X8:
+	case gcvSURF_D32:
+		/* 32-bpp format. */
+		bitsPerPixel  = 32;
+		bytesPerTile  = (32 * 4 * 4) / 8;
+		break;
+
+	case gcvSURF_D24S8:
+	case gcvSURF_D24X8:
+		/* 24-bpp format. */
+		bitsPerPixel  = 32;
+		bytesPerTile  = (32 * 4 * 4) / 8;
+		break;
+
+	case gcvSURF_DXT1:
+	case gcvSURF_ETC1:
+		bitsPerPixel  = 4;
+		bytesPerTile  = (4 * 4 * 4) / 8;
+		break;
+
+	case gcvSURF_DXT2:
+	case gcvSURF_DXT3:
+	case gcvSURF_DXT4:
+	case gcvSURF_DXT5:
+		bitsPerPixel  = 8;
+		bytesPerTile  = (8 * 4 * 4) / 8;
+		break;
+
+	default:
+		/* Invalid format. */
+		gcmkFOOTER_ARG("status=%d", gcvSTATUS_INVALID_ARGUMENT);
+		return gcvSTATUS_INVALID_ARGUMENT;
+	}
+
+	/* Set the result. */
+	if (BitsPerPixel != gcvNULL)
+	{
+		* BitsPerPixel = bitsPerPixel;
+	}
+
+	if (BytesPerTile != gcvNULL)
+	{
+		* BytesPerTile = bytesPerTile;
+	}
+
+    /* Success. */
+    gcmkFOOTER_ARG("*BitsPerPixel=%u *BytesPerTile=%u",
+			   gcmOPT_VALUE(BitsPerPixel), gcmOPT_VALUE(BytesPerTile));
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**  gckHARDWARE_SplitMemory
+**
+**  Split a hardware specific memory address into a pool and offset.
+**
+**  INPUT:
+**
+**      gckHARDWARE Hardware
+**          Pointer to the gckHARDWARE object.
+**
+**      gctUINT32 Address
+**          Address in hardware specific format.
+**
+**  OUTPUT:
+**
+**      gcePOOL * Pool
+**          Pointer to a variable that will hold the pool type for the address.
+**
+**      gctUINT32 * Offset
+**          Pointer to a variable that will hold the offset for the address.
+*/
+gceSTATUS
+gckHARDWARE_SplitMemory(
+    IN gckHARDWARE Hardware,
+    IN gctUINT32 Address,
+    OUT gcePOOL * Pool,
+    OUT gctUINT32 * Offset
+    )
+{
+	gcmkHEADER_ARG("Hardware=0x%x Addres=%08x", Hardware, Address);
+
+    /* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+    gcmkVERIFY_ARGUMENT(Pool != gcvNULL);
+    gcmkVERIFY_ARGUMENT(Offset != gcvNULL);
+
+    /* Dispatch on memory type. */
+    switch (( ((((gctUINT32) (Address)) >> (0 ? 31:31)) & ((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1)))))) ))
+    {
+    case 0x0:
+        /* System memory. */
+        *Pool = gcvPOOL_SYSTEM;
+        break;
+
+    case 0x1:
+        /* Virtual memory. */
+        *Pool = gcvPOOL_VIRTUAL;
+        break;
+
+    default:
+        /* Invalid memory type. */
+        gcmkFOOTER_ARG("status=%d", gcvSTATUS_INVALID_ARGUMENT);
+        return gcvSTATUS_INVALID_ARGUMENT;
+    }
+
+    /* Return offset of address. */
+    *Offset = ( ((((gctUINT32) (Address)) >> (0 ? 30:0)) & ((gctUINT32) ((((1 ? 30:0) - (0 ? 30:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 30:0) - (0 ? 30:0) + 1)))))) );
+
+    /* Success. */
+    gcmkFOOTER_ARG("*Pool=%d *Offset=%08x", *Pool, *Offset);
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**  gckHARDWARE_Execute
+**
+**  Kickstart the hardware's command processor with an initialized command
+**  buffer.
+**
+**  INPUT:
+**
+**      gckHARDWARE Hardware
+**          Pointer to the gckHARDWARE object.
+**
+**      gctPOINTER Logical
+**          Logical address of command buffer.
+**
+**      gctSIZE_T Bytes
+**          Number of bytes for the prefetch unit (until after the first LINK).
+**
+**  OUTPUT:
+**
+**      Nothing.
+*/
+gceSTATUS
+gckHARDWARE_Execute(
+    IN gckHARDWARE Hardware,
+    IN gctPOINTER Logical,
+#ifdef __QNXNTO__
+    IN gctPOINTER Physical,
+	IN gctBOOL PhysicalAddresses,
+#endif
+    IN gctSIZE_T Bytes
+    )
+{
+    gceSTATUS status;
+    gctUINT32 address = 0, control;
+
+    gcmkHEADER_ARG("Hardware=0x%x Logical=0x%x Bytes=%lu",
+			   Hardware, Logical, Bytes);
+
+    /* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+    gcmkVERIFY_ARGUMENT(Logical != gcvNULL);
+
+#ifdef __QNXNTO__
+	if (PhysicalAddresses)
+	{
+		/* Convert physical into hardware specific address. */
+		gcmkONERROR(
+			gckHARDWARE_ConvertPhysical(Hardware, Physical, &address));
+	}
+	else
+	{
+#endif
+	/* Convert logical into hardware specific address. */
+	gcmkONERROR(
+		gckHARDWARE_ConvertLogical(Hardware, Logical, &address));
+#ifdef __QNXNTO__
+	}
+#endif
+
+	/* Enable all events. */
+	gcmkONERROR(
+		gckOS_WriteRegister(Hardware->os, 0x00014, ~0U));
+
+	/* Write address register. */
+	gcmkONERROR(
+		gckOS_WriteRegister(Hardware->os, 0x00654, address));
+
+	/* Build control register. */
+	control = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1))))))) << (0 ? 16:16))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1))))))) << (0 ? 16:16)))
+			| ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) ((Bytes+7)>>3) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
+
+	/* Set big endian */
+	if (Hardware->bigEndian)
+	{
+		control |= ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 21:20) - (0 ? 21:20) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:20) - (0 ? 21:20) + 1))))))) << (0 ? 21:20))) | (((gctUINT32) (0x2 & ((gctUINT32) ((((1 ? 21:20) - (0 ? 21:20) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:20) - (0 ? 21:20) + 1))))))) << (0 ? 21:20)));
+	}
+
+	/* Write control register. */
+	gcmkONERROR(
+		gckOS_WriteRegister(Hardware->os, 0x00658, control));
+
+	gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
+				  "Started command buffer @ %08x",
+				  address);
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+
+OnError:
+    /* Return the status. */
+    gcmkFOOTER();
+    return status;
+}
+
+/*******************************************************************************
+**
+**  gckHARDWARE_WaitLink
+**
+**  Append a WAIT/LINK command sequence at the specified location in the command
+**  queue.
+**
+**  INPUT:
+**
+**      gckHARDWARE Hardware
+**          Pointer to an gckHARDWARE object.
+**
+**      gctPOINTER Logical
+**          Pointer to the current location inside the command queue to append
+**          WAIT/LINK command sequence at or gcvNULL just to query the size of the
+**          WAIT/LINK command sequence.
+**
+**		gctUINT32 Offset
+**			Offset into command buffer required for alignment.
+**
+**      gctSIZE_T * Bytes
+**          Pointer to the number of bytes available for the WAIT/LINK command
+**          sequence.  If 'Logical' is gcvNULL, this argument will be ignored.
+**
+**  OUTPUT:
+**
+**      gctSIZE_T * Bytes
+**          Pointer to a variable that will receive the number of bytes required
+**          by the WAIT/LINK command sequence.  If 'Bytes' is gcvNULL, nothing will
+**          be returned.
+**
+**      gctPOINTER * Wait
+**          Pointer to a variable that will receive the pointer to the WAIT
+**          command.  If 'Wait' is gcvNULL nothing will be returned.
+**
+**      gctSIZE_T * WaitSize
+**          Pointer to a variable that will receive the number of bytes used by
+**          the WAIT command.  If 'LinkSize' is gcvNULL nothing will be returned.
+*/
+gceSTATUS
+gckHARDWARE_WaitLink(
+    IN gckHARDWARE Hardware,
+    IN gctPOINTER Logical,
+	IN gctUINT32 Offset,
+    IN OUT gctSIZE_T * Bytes,
+    OUT gctPOINTER * Wait,
+    OUT gctSIZE_T * WaitSize
+    )
+{
+    gceSTATUS status;
+    gctUINT32 address;
+	gctUINT32_PTR logical = (gctUINT32_PTR) Logical;
+	gctSIZE_T bytes;
+
+	gcmkHEADER_ARG("Hardware=0x%x Logical=0x%x Offset=%08x *Bytes=%lu",
+				   Hardware, Logical, Offset, gcmOPT_VALUE(Bytes));
+
+    /* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+    gcmkVERIFY_ARGUMENT((Logical == gcvNULL) || (Bytes != gcvNULL));
+
+	/* Compute number of bytes required. */
+	bytes = gcmALIGN(Offset + 16, 8) - Offset;
+
+	if (Logical != gcvNULL)
+	{
+		/* Convert logical into hardware specific address. */
+		gcmkONERROR(
+			gckHARDWARE_ConvertLogical(Hardware,
+									   Logical,
+									   &address));
+
+		if (*Bytes < bytes)
+		{
+			/* Command queue too small. */
+			gcmkONERROR(gcvSTATUS_BUFFER_TOO_SMALL);
+		}
+
+		/* Append WAIT(200). */
+		logical[0] = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
+				   | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (200) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
+
+		gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
+					   "0x%08x: WAIT", address);
+
+		/* Append LINK(2, address). */
+		logical[2] = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x08 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
+				   | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (bytes>>3) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
+
+		logical[3] = address;
+
+        Hardware->lastWaitLink = address;
+
+		gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
+					   "0x%08x: LINK %08x, #%lu",
+					   address + 8, address, bytes);
+
+		if (Wait != gcvNULL)
+		{
+			/* Return pointer to WAIT command. */
+			*Wait = Logical;
+		}
+
+		if (WaitSize != gcvNULL)
+		{
+			/* Return number of bytes used by the WAIT command. */
+			*WaitSize = 8;
+		}
+	}
+
+	if (Bytes != gcvNULL)
+	{
+		/* Return number of bytes required by the WAIT/LINK command
+		** sequence. */
+		*Bytes = bytes;
+	}
+
+	/* Success. */
+	gcmkFOOTER_ARG("*Bytes=%lu *Wait=0x%x *WaitSize=%lu",
+				   gcmOPT_VALUE(Bytes), gcmOPT_POINTER(Wait),
+				   gcmOPT_VALUE(WaitSize));
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**  gckHARDWARE_End
+**
+**  Append an END command at the specified location in the command queue.
+**
+**  INPUT:
+**
+**      gckHARDWARE Hardware
+**          Pointer to an gckHARDWARE object.
+**
+**      gctPOINTER Logical
+**          Pointer to the current location inside the command queue to append
+**          END command at or gcvNULL just to query the size of the END command.
+**
+**      gctSIZE_T * Bytes
+**          Pointer to the number of bytes available for the END command.  If
+**          'Logical' is gcvNULL, this argument will be ignored.
+**
+**  OUTPUT:
+**
+**      gctSIZE_T * Bytes
+**          Pointer to a variable that will receive the number of bytes required
+**          for the END command.  If 'Bytes' is gcvNULL, nothing will be returned.
+*/
+gceSTATUS
+gckHARDWARE_End(
+    IN gckHARDWARE Hardware,
+    IN gctPOINTER Logical,
+    IN OUT gctSIZE_T * Bytes
+    )
+{
+	gctUINT32_PTR logical = (gctUINT32_PTR) Logical;
+	gceSTATUS status;
+
+	gcmkHEADER_ARG("Hardware=0x%x Logical=0x%x *Bytes=%lu",
+				   Hardware, Logical, gcmOPT_VALUE(Bytes));
+
+    /* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+    gcmkVERIFY_ARGUMENT((Logical == gcvNULL) || (Bytes != gcvNULL));
+
+    if (Logical != gcvNULL)
+    {
+        if (*Bytes < 8)
+        {
+            /* Command queue too small. */
+            gcmkONERROR(gcvSTATUS_BUFFER_TOO_SMALL);
+        }
+
+        /* Append END. */
+       logical[0] =
+            ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x02 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)));
+
+		gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE, "0x%x: END", Logical);
+
+		/* Make sure the CPU writes out the data to memory. */
+		gcmkVERIFY_OK(
+			gckOS_MemoryBarrier(Hardware->os, Logical));
+    }
+
+    if (Bytes != gcvNULL)
+    {
+        /* Return number of bytes required by the END command. */
+        *Bytes = 8;
+    }
+
+    /* Success. */
+    gcmkFOOTER_ARG("*Bytes=%lu", gcmOPT_VALUE(Bytes));
+    return gcvSTATUS_OK;
+
+OnError:
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**  gckHARDWARE_Nop
+**
+**  Append a NOP command at the specified location in the command queue.
+**
+**  INPUT:
+**
+**      gckHARDWARE Hardware
+**          Pointer to an gckHARDWARE object.
+**
+**      gctPOINTER Logical
+**          Pointer to the current location inside the command queue to append
+**          NOP command at or gcvNULL just to query the size of the NOP command.
+**
+**      gctSIZE_T * Bytes
+**          Pointer to the number of bytes available for the NOP command.  If
+**          'Logical' is gcvNULL, this argument will be ignored.
+**
+**  OUTPUT:
+**
+**      gctSIZE_T * Bytes
+**          Pointer to a variable that will receive the number of bytes required
+**          for the NOP command.  If 'Bytes' is gcvNULL, nothing will be returned.
+*/
+gceSTATUS
+gckHARDWARE_Nop(
+    IN gckHARDWARE Hardware,
+    IN gctPOINTER Logical,
+    IN OUT gctSIZE_T * Bytes
+    )
+{
+	gctUINT32_PTR logical = (gctUINT32_PTR) Logical;
+	gceSTATUS status;
+
+	gcmkHEADER_ARG("Hardware=0x%x Logical=0x%x *Bytes=%lu",
+				   Hardware, Logical, gcmOPT_VALUE(Bytes));
+
+    /* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+    gcmkVERIFY_ARGUMENT((Logical == gcvNULL) || (Bytes != gcvNULL));
+
+    if (Logical != gcvNULL)
+    {
+        if (*Bytes < 8)
+        {
+            /* Command queue too small. */
+            gcmkONERROR(gcvSTATUS_BUFFER_TOO_SMALL);
+        }
+
+        /* Append NOP. */
+        logical[0] = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x03 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)));
+
+        gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE, "0x%x: NOP", Logical);
+	}
+
+    if (Bytes != gcvNULL)
+    {
+        /* Return number of bytes required by the NOP command. */
+        *Bytes = 8;
+    }
+
+    /* Success. */
+    gcmkFOOTER_ARG("*Bytes=%lu", gcmOPT_VALUE(Bytes));
+    return gcvSTATUS_OK;
+
+OnError:
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**  gckHARDWARE_Wait
+**
+**  Append a WAIT command at the specified location in the command queue.
+**
+**  INPUT:
+**
+**      gckHARDWARE Hardware
+**          Pointer to an gckHARDWARE object.
+**
+**      gctPOINTER Logical
+**          Pointer to the current location inside the command queue to append
+**          WAIT command at or gcvNULL just to query the size of the WAIT command.
+**
+**		gctUINT32 Count
+**			Number of cycles to wait.
+**
+**      gctSIZE_T * Bytes
+**          Pointer to the number of bytes available for the WAIT command.  If
+**          'Logical' is gcvNULL, this argument will be ignored.
+**
+**  OUTPUT:
+**
+**      gctSIZE_T * Bytes
+**          Pointer to a variable that will receive the number of bytes required
+**          for the NOP command.  If 'Bytes' is gcvNULL, nothing will be returned.
+*/
+gceSTATUS
+gckHARDWARE_Wait(
+    IN gckHARDWARE Hardware,
+    IN gctPOINTER Logical,
+	IN gctUINT32 Count,
+    IN OUT gctSIZE_T * Bytes
+    )
+{
+    gctUINT32_PTR logical = (gctUINT32_PTR) Logical;
+	gceSTATUS status;
+
+	gcmkHEADER_ARG("Hardware=0x%x Logical=0x%x Count=%u *Bytes=%lu",
+				   Hardware, Logical, Count, gcmOPT_VALUE(Bytes));
+
+	/* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+    gcmkVERIFY_ARGUMENT((Logical == gcvNULL) || (Bytes != gcvNULL));
+
+    if (Logical != gcvNULL)
+    {
+        if (*Bytes < 8)
+        {
+            /* Command queue too small. */
+            gcmkONERROR(gcvSTATUS_BUFFER_TOO_SMALL);
+        }
+
+        /* Append WAIT. */
+        logical[0] = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
+				   | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (Count) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
+
+		gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
+					   "0x%x: WAIT %u", Logical, Count);
+    }
+
+    if (Bytes != gcvNULL)
+    {
+        /* Return number of bytes required by the WAIT command. */
+        *Bytes = 8;
+    }
+
+    /* Success. */
+    gcmkFOOTER_ARG("*Bytes=%lu", gcmOPT_VALUE(Bytes));
+    return gcvSTATUS_OK;
+
+OnError:
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**  gckHARDWARE_Event
+**
+**  Append an EVENT command at the specified location in the command queue.
+**
+**  INPUT:
+**
+**      gckHARDWARE Hardware
+**          Pointer to an gckHARDWARE object.
+**
+**      gctPOINTER Logical
+**          Pointer to the current location inside the command queue to append
+**          the EVENT command at or gcvNULL just to query the size of the EVENT
+**          command.
+**
+**      gctUINT8 Event
+**          Event ID to program.
+**
+**      gceKERNEL_WHERE FromWhere
+**          Location of the pipe to send the event.
+**
+**      gctSIZE_T * Bytes
+**          Pointer to the number of bytes available for the EVENT command.  If
+**          'Logical' is gcvNULL, this argument will be ignored.
+**
+**  OUTPUT:
+**
+**      gctSIZE_T * Bytes
+**          Pointer to a variable that will receive the number of bytes required
+**          for the EVENT command.  If 'Bytes' is gcvNULL, nothing will be
+**          returned.
+*/
+gceSTATUS
+gckHARDWARE_Event(
+    IN gckHARDWARE Hardware,
+    IN gctPOINTER Logical,
+    IN gctUINT8 Event,
+    IN gceKERNEL_WHERE FromWhere,
+    IN OUT gctSIZE_T * Bytes
+    )
+{
+	gctUINT size;
+    gctUINT32 destination = 0;
+	gctUINT32_PTR logical = (gctUINT32_PTR) Logical;
+	gceSTATUS status;
+
+	gcmkHEADER_ARG("Hardware=0x%x Logical=0x%x Event=%u FromWhere=%d *Bytes=%lu",
+				   Hardware, Logical, Event, FromWhere, gcmOPT_VALUE(Bytes));
+
+    /* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+    gcmkVERIFY_ARGUMENT((Logical == gcvNULL) || (Bytes != gcvNULL));
+    gcmkVERIFY_ARGUMENT(Event < 32);
+
+	/* Determine the size of the command. */
+	size = (Hardware->extraEventStates && (FromWhere == gcvKERNEL_PIXEL))
+		 ? gcmALIGN(8 + (1 + 5) * 4, 8)	/* EVENT + 5 STATES */
+		 : 8;
+
+    if (Logical != gcvNULL)
+    {
+        if (*Bytes < size)
+        {
+            /* Command queue too small. */
+            gcmkONERROR(gcvSTATUS_BUFFER_TOO_SMALL);
+        }
+
+		switch (FromWhere)
+		{
+		case gcvKERNEL_COMMAND:
+			/* From command processor. */
+			destination = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1))))))) << (0 ? 5:5))) | (((gctUINT32) (0x1&((gctUINT32)((((1?5:5)-(0?5:5)+1)==32)?~0:(~(~0<<((1?5:5)-(0?5:5)+1)))))))<<(0?5:5)));
+			break;
+
+		case gcvKERNEL_PIXEL:
+			/* From pixel engine. */
+			destination = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 6:6) - (0 ? 6:6) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 6:6) - (0 ? 6:6) + 1))))))) << (0 ? 6:6))) | (((gctUINT32) (0x1&((gctUINT32)((((1?6:6)-(0?6:6)+1)==32)?~0:(~(~0<<((1?6:6)-(0?6:6)+1)))))))<<(0?6:6)));
+			break;
+
+		default:
+			gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
+		}
+
+		/* Append EVENT(Event, destiantion). */
+        logical[0] = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
+			   | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E01) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
+			   | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
+
+        logical[1] = ((((gctUINT32) (destination)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) ((gctUINT32) (Event) & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)));
+
+        /* Make sure the event ID gets written out before GPU can access it. */
+        gcmkONERROR(
+			gckOS_MemoryBarrier(Hardware->os, logical + 1));
+
+#if gcdDEBUG
+		{
+			gctUINT32 phys;
+			gckOS_GetPhysicalAddress(Hardware->os, Logical, &phys);
+			gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
+						   "0x%08x: EVENT %d", phys, Event);
+		}
+#endif
+
+		/* Append the extra states. These are needed for the chips that do not
+		** support back-to-back events due to the async interface. The extra
+		** states add the necessary delay to ensure that event IDs do not
+		** collide. */
+		if (size > 8)
+		{
+			logical[2] = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
+					   | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0100) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
+					   | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (5) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
+			logical[3] = 0;
+			logical[4] = 0;
+			logical[5] = 0;
+			logical[6] = 0;
+			logical[7] = 0;
+		}
+    }
+
+    if (Bytes != gcvNULL)
+    {
+        /* Return number of bytes required by the EVENT command. */
+        *Bytes = size;
+    }
+
+    /* Success. */
+    gcmkFOOTER_ARG("*Bytes=%lu", gcmOPT_VALUE(Bytes));
+    return gcvSTATUS_OK;
+
+OnError:
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**  gckHARDWARE_PipeSelect
+**
+**  Append a PIPESELECT command at the specified location in the command queue.
+**
+**  INPUT:
+**
+**      gckHARDWARE Hardware
+**          Pointer to an gckHARDWARE object.
+**
+**      gctPOINTER Logical
+**          Pointer to the current location inside the command queue to append
+**          the PIPESELECT command at or gcvNULL just to query the size of the
+**          PIPESELECT command.
+**
+**      gctUINT32 Pipe
+**          Pipe value to select.
+**
+**      gctSIZE_T * Bytes
+**          Pointer to the number of bytes available for the PIPESELECT command.
+**          If 'Logical' is gcvNULL, this argument will be ignored.
+**
+**  OUTPUT:
+**
+**      gctSIZE_T * Bytes
+**          Pointer to a variable that will receive the number of bytes required
+**          for the PIPESELECT command.  If 'Bytes' is gcvNULL, nothing will be
+**          returned.
+*/
+gceSTATUS
+gckHARDWARE_PipeSelect(
+    IN gckHARDWARE Hardware,
+    IN gctPOINTER Logical,
+    IN gctUINT32 Pipe,
+    IN OUT gctSIZE_T * Bytes
+    )
+{
+	gctUINT32_PTR logical = (gctUINT32_PTR) Logical;
+	gceSTATUS status;
+
+	gcmkHEADER_ARG("Hardware=0x%x Logical=0x%x Pipe=%u *Bytes=%lu",
+				   Hardware, Logical, Pipe, gcmOPT_VALUE(Bytes));
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+	gcmkVERIFY_ARGUMENT((Logical == gcvNULL) || (Bytes != gcvNULL));
+
+	/* Append a PipeSelect. */
+	if (Logical != gcvNULL)
+	{
+		gctUINT32 flush, stall;
+
+	    if (*Bytes < 32)
+	    {
+	        /* Command queue too small. */
+	        gcmkONERROR(gcvSTATUS_BUFFER_TOO_SMALL);
+	    }
+
+		flush = (Pipe == 0x1)
+			  ? ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) (0x1&((gctUINT32)((((1?1:1)-(0?1:1)+1)==32)?~0:(~(~0<<((1?1:1)-(0?1:1)+1)))))))<<(0?1:1)))
+			  | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) (0x1&((gctUINT32)((((1?0:0)-(0?0:0)+1)==32)?~0:(~(~0<<((1?0:0)-(0?0:0)+1)))))))<<(0?0:0)))
+			  : ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3))) | (((gctUINT32) (0x1&((gctUINT32)((((1?3:3)-(0?3:3)+1)==32)?~0:(~(~0<<((1?3:3)-(0?3:3)+1)))))))<<(0?3:3)));
+
+		stall = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
+			  | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));
+
+		/* LoadState(AQFlush, 1), flush. */
+		logical[0] = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
+				   | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E03) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
+				   | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
+
+		logical[1] = flush;
+
+		gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
+					   "0x%x: FLUSH %x", logical, flush);
+
+		/* LoadState(AQSempahore, 1), stall. */
+		logical[2] = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
+				   | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E02) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
+				   | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
+
+		logical[3] = stall;
+
+		gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
+					   "0x%x: SEMAPHORE %x", logical + 2, stall);
+
+		/* Stall, stall. */
+		logical[4] = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x09 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)));
+
+		logical[5] = stall;
+
+		gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
+					   "0x%x: STALL %x", logical + 4, stall);
+
+		/* LoadState(AQPipeSelect, 1), pipe. */
+		logical[6] = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
+				   | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E00) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
+				   | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
+
+		logical[7] = Pipe;
+
+		gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
+					   "0x%x: PIPE %u", logical + 6, Pipe);
+	}
+
+	if (Bytes != gcvNULL)
+	{
+		/* Return number of bytes required by the PIPESELECT command. */
+		*Bytes = 32;
+	}
+
+	/* Success. */
+	gcmkFOOTER_ARG("*Bytes=%lu", gcmOPT_VALUE(Bytes));
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**  gckHARDWARE_Link
+**
+**  Append a LINK command at the specified location in the command queue.
+**
+**  INPUT:
+**
+**      gckHARDWARE Hardware
+**          Pointer to an gckHARDWARE object.
+**
+**      gctPOINTER Logical
+**          Pointer to the current location inside the command queue to append
+**          the LINK command at or gcvNULL just to query the size of the LINK
+**          command.
+**
+**      gctPOINTER FetchAddress
+**          Logical address of destination of LINK.
+**
+**      gctSIZE_T FetchSize
+**          Number of bytes in destination of LINK.
+**
+**      gctSIZE_T * Bytes
+**          Pointer to the number of bytes available for the LINK command.  If
+**          'Logical' is gcvNULL, this argument will be ignored.
+**
+**  OUTPUT:
+**
+**      gctSIZE_T * Bytes
+**          Pointer to a variable that will receive the number of bytes required
+**          for the LINK command.  If 'Bytes' is gcvNULL, nothing will be returned.
+*/
+gceSTATUS
+gckHARDWARE_Link(
+    IN gckHARDWARE Hardware,
+    IN gctPOINTER Logical,
+    IN gctPOINTER FetchAddress,
+    IN gctSIZE_T FetchSize,
+    IN OUT gctSIZE_T * Bytes
+    )
+{
+    gceSTATUS status;
+	gctSIZE_T bytes;
+	gctUINT32 address;
+	gctUINT32_PTR logical = (gctUINT32_PTR) Logical;
+
+	gcmkHEADER_ARG("Hardware=0x%x Logical=0x%x FetchAddress=0x%x FetchSize=%lu "
+				   "*Bytes=%lu",
+				   Hardware, Logical, FetchAddress, FetchSize,
+				   gcmOPT_VALUE(Bytes));
+
+    /* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+    gcmkVERIFY_ARGUMENT((Logical == gcvNULL) || (Bytes != gcvNULL));
+
+    if (Logical != gcvNULL)
+    {
+        if (*Bytes < 8)
+        {
+            /* Command queue too small. */
+            gcmkONERROR(gcvSTATUS_BUFFER_TOO_SMALL);
+        }
+
+        /* Convert logical address to hardware address. */
+		gcmkONERROR(
+			gckHARDWARE_ConvertLogical(Hardware, FetchAddress, &address));
+
+        if(Hardware->hang)
+        {
+            /* simulate GPU hangs only once */
+            logical[1] = address & 0xffffff00;
+            Hardware->hang = gcvFALSE;
+        }
+        else
+        {
+            logical[1] = address;
+        }
+
+        /* Make sure the address got written before the LINK command. */
+        gcmkONERROR(
+			gckOS_MemoryBarrier(Hardware->os, logical + 1));
+
+		/* Compute number of 64-byte aligned bytes to fetch. */
+		bytes = gcmALIGN(address + FetchSize, 64) - address;
+
+        /* Append LINK(bytes / 8), FetchAddress. */
+        logical[0] = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x08 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
+				   | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (bytes>>3) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
+
+#if gcdDEBUG
+		{
+			gctUINT32 phys;
+			gckHARDWARE_ConvertLogical(Hardware, Logical, &phys);
+			gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
+						   "0x%08x: LINK %08x, #%lu", phys, address, bytes);
+		}
+#endif
+
+        /* Memory barrier. */
+        gcmkONERROR(
+			gckOS_MemoryBarrier(Hardware->os, logical));
+    }
+
+    if (Bytes != gcvNULL)
+    {
+        /* Return number of bytes required by the LINK command. */
+        *Bytes = 8;
+    }
+
+    /* Success. */
+    gcmkFOOTER_ARG("*Bytes=%lu", gcmOPT_VALUE(Bytes));
+    return gcvSTATUS_OK;
+
+OnError:
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**  gckHARDWARE_AlignToTile
+**
+**  Align the specified width and height to tile boundaries.
+**
+**  INPUT:
+**
+**      gckHARDWARE Hardware
+**          Pointer to an gckHARDWARE object.
+**
+**		gceSURF_TYPE Type
+**			Type of alignment.
+**
+**      gctUINT32 * Width
+**          Pointer to the width to be aligned.  If 'Width' is gcvNULL, no width
+**          will be aligned.
+**
+**      gctUINT32 * Height
+**          Pointer to the height to be aligned.  If 'Height' is gcvNULL, no height
+**          will be aligned.
+**
+**  OUTPUT:
+**
+**      gctUINT32 * Width
+**          Pointer to a variable that will receive the aligned width.
+**
+**      gctUINT32 * Height
+**          Pointer to a variable that will receive the aligned height.
+**
+**		gctBOOL_PTR SuperTiled
+**			Pointer to a variable that receives the super-tiling flag for the
+**			surface.
+*/
+gceSTATUS
+gckHARDWARE_AlignToTile(
+    IN gckHARDWARE Hardware,
+	IN gceSURF_TYPE Type,
+    IN OUT gctUINT32_PTR Width,
+    IN OUT gctUINT32_PTR Height,
+	OUT gctBOOL_PTR SuperTiled
+    )
+{
+	gctBOOL superTiled = gcvFALSE;
+	gctUINT32 xAlignment, yAlignment;
+
+	gcmkHEADER_ARG("Hardware=0x%x Type=%d *Width=%u *Height=%u",
+				   Hardware, Type, gcmOPT_VALUE(Width), gcmOPT_VALUE(Height));
+
+    /* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+
+	/* Super tiling can be enabled for render targets and depth buffers. */
+	superTiled =
+		(  (Type == gcvSURF_RENDER_TARGET)
+		|| (Type == gcvSURF_DEPTH)
+		)
+		&&
+		/* Of course, hardware needs to support super tiles. */
+		((((gctUINT32) (Hardware->chipMinorFeatures0)) >> (0 ? 12:12) & ((gctUINT32) ((((1 ? 12:12) - (0 ? 12:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:12) - (0 ? 12:12) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 12:12) - (0 ? 12:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:12) - (0 ? 12:12) + 1)))))));
+
+	/* Compute alignment factors. */
+	xAlignment = superTiled ? 64
+			   : (Type == gcvSURF_TEXTURE) ? 4
+			   : 16;
+	yAlignment = superTiled ? 64 : 4;
+
+    if (Width != gcvNULL)
+    {
+		/* Align the width. */
+		*Width = gcmALIGN(*Width, xAlignment);
+    }
+
+    if (Height != gcvNULL)
+    {
+		/* Align the height. */
+		*Height = gcmALIGN(*Height, yAlignment);
+    }
+
+	if (SuperTiled != gcvNULL)
+	{
+		/* Copy the super tiling. */
+		*SuperTiled = superTiled;
+	}
+
+    /* Success. */
+    gcmkFOOTER_ARG("*Width=%u *Height=%u *SuperTiled=%d",
+			   gcmOPT_VALUE(Width), gcmOPT_VALUE(Height),
+			   gcmOPT_VALUE(SuperTiled));
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**  gckHARDWARE_UpdateQueueTail
+**
+**  Update the tail of the command queue.
+**
+**  INPUT:
+**
+**      gckHARDWARE Hardware
+**          Pointer to an gckHARDWARE object.
+**
+**      gctPOINTER Logical
+**          Logical address of the start of the command queue.
+**
+**      gctUINT32 Offset
+**          Offset into the command queue of the tail (last command).
+**
+**  OUTPUT:
+**
+**      Nothing.
+*/
+gceSTATUS
+gckHARDWARE_UpdateQueueTail(
+    IN gckHARDWARE Hardware,
+    IN gctPOINTER Logical,
+    IN gctUINT32 Offset
+    )
+{
+	gceSTATUS status;
+
+	gcmkHEADER_ARG("Hardware=0x%x Logical=0x%x Offset=%08x",
+				   Hardware, Logical, Offset);
+
+    /* Verify the hardware. */
+    gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+
+	/* Force a barrier. */
+	gcmkONERROR(
+		gckOS_MemoryBarrier(Hardware->os, Logical));
+
+    /* Notify gckKERNEL object of change. */
+    gcmkONERROR(
+	gckKERNEL_Notify(Hardware->kernel,
+						 gcvNOTIFY_COMMAND_QUEUE,
+						 gcvFALSE));
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**  gckHARDWARE_ConvertLogical
+**
+**  Convert a logical system address into a hardware specific address.
+**
+**  INPUT:
+**
+**      gckHARDWARE Hardware
+**          Pointer to an gckHARDWARE object.
+**
+**      gctPOINTER Logical
+**          Logical address to convert.
+**
+**      gctUINT32* Address
+**          Return hardware specific address.
+**
+**  OUTPUT:
+**
+**      Nothing.
+*/
+gceSTATUS
+gckHARDWARE_ConvertLogical(
+    IN gckHARDWARE Hardware,
+    IN gctPOINTER Logical,
+    OUT gctUINT32 * Address
+    )
+{
+    gctUINT32 address;
+    gceSTATUS status;
+
+    gcmkHEADER_ARG("Hardware=0x%x Logical=0x%x", Hardware, Logical);
+
+    /* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+    gcmkVERIFY_ARGUMENT(Logical != gcvNULL);
+    gcmkVERIFY_ARGUMENT(Address != gcvNULL);
+
+	/* Convert logical address into a physical address. */
+	gcmkONERROR(
+		gckOS_GetPhysicalAddress(Hardware->os, Logical, &address));
+
+	/* Return hardware specific address. */
+	*Address = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1))))))) << (0 ? 31:31))) | (((gctUINT32) (0x0 & ((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1))))))) << (0 ? 31:31)))
+			 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 30:0) - (0 ? 30:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 30:0) - (0 ? 30:0) + 1))))))) << (0 ? 30:0))) | (((gctUINT32) ((gctUINT32) (address) & ((gctUINT32) ((((1 ? 30:0) - (0 ? 30:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 30:0) - (0 ? 30:0) + 1))))))) << (0 ? 30:0)));
+
+	/* Success. */
+	gcmkFOOTER_ARG("*Address=%08x", *Address);
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**  gckHARDWARE_ConvertPhysical
+**
+**  Convert a physical address into a hardware specific address.
+**
+**  INPUT:
+**
+**      gckHARDWARE Hardware
+**          Pointer to an gckHARDWARE object.
+**
+**      gctPHYS_ADDR Physical
+**          Physical address to convert.
+**
+**      gctUINT32* Address
+**          Return hardware specific address.
+**
+**  OUTPUT:
+**
+**      Nothing.
+*/
+gceSTATUS
+gckHARDWARE_ConvertPhysical(
+    IN gckHARDWARE Hardware,
+    IN gctPHYS_ADDR Physical,
+    OUT gctUINT32 * Address
+    )
+{
+    gctUINT32 address;
+
+    /* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+    gcmkVERIFY_ARGUMENT(Physical != gcvNULL);
+    gcmkVERIFY_ARGUMENT(Address != gcvNULL);
+
+	address = (gctUINT32)Physical;
+
+    /* Return hardware specific address. */
+	*Address = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1))))))) << (0 ? 31:31))) | (((gctUINT32) (0x0 & ((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1))))))) << (0 ? 31:31)))
+			 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 30:0) - (0 ? 30:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 30:0) - (0 ? 30:0) + 1))))))) << (0 ? 30:0))) | (((gctUINT32) ((gctUINT32) (address) & ((gctUINT32) ((((1 ? 30:0) - (0 ? 30:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 30:0) - (0 ? 30:0) + 1))))))) << (0 ? 30:0)));
+
+	/* Return the status. */
+	gcmkFOOTER_ARG("*Address=%08x", *Address);
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**  gckHARDWARE_Interrupt
+**
+**  Process an interrupt.
+**
+**  INPUT:
+**
+**      gckHARDWARE Hardware
+**          Pointer to an gckHARDWARE object.
+**
+**		gctBOOL InterruptValid
+**			If gcvTRUE, this function will read the interrupt acknowledge
+**			register, stores the data, and return whether or not the interrupt
+**			is ours or not.  If gcvFALSE, this functions will read the interrupt
+**			acknowledge register and combine it with any stored value to handle
+**			the event notifications.
+**
+**  OUTPUT:
+**
+**      Nothing.
+*/
+gceSTATUS
+gckHARDWARE_Interrupt(
+    IN gckHARDWARE Hardware,
+	IN gctBOOL InterruptValid
+    )
+{
+    gckEVENT event;
+	gctUINT32 data;
+    gceSTATUS status;
+
+    gcmkHEADER_ARG("Hardware=0x%x InterruptValid=%d", Hardware, InterruptValid);
+
+    /* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+
+    /* Extract gckEVENT object. */
+    event = Hardware->kernel->event;
+    gcmkVERIFY_OBJECT(event, gcvOBJ_EVENT);
+
+	if (InterruptValid)
+	{
+		/* Read AQIntrAcknowledge register. */
+		gcmkVERIFY_OK(
+			gckOS_ReadRegister(Hardware->os,
+							   0x00010,
+							   &data));
+
+		if (data & 0x80000000)
+		{
+			gcmkTRACE(gcvLEVEL_ERROR, "AXI Bus Error detected!");
+		}
+
+		if (data == 0)
+		{
+			/* Not our interrupt. */
+			status = gcvSTATUS_NOT_OUR_INTERRUPT;
+		}
+		else
+		{
+			/* Inform gckEVENT of the interrupt. */
+			status = gckEVENT_Interrupt(event, data & 0x7FFFFFFF);
+		}
+	}
+	else
+	{
+		/* Handle events. */
+		status = gckEVENT_Notify(event, 0);
+	}
+
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckHARDWARE_QueryCommandBuffer
+**
+**	Query the command buffer alignment and number of reserved bytes.
+**
+**	INPUT:
+**
+**		gckHARDWARE Harwdare
+**			Pointer to an gckHARDWARE object.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * Alignment
+**			Pointer to a variable receiving the alignment for each command.
+**
+**		gctSIZE_T * ReservedHead
+**			Pointer to a variable receiving the number of reserved bytes at the
+**          head of each command buffer.
+**
+**		gctSIZE_T * ReservedTail
+**			Pointer to a variable receiving the number of bytes reserved at the
+**          tail of each command buffer.
+*/
+gceSTATUS
+gckHARDWARE_QueryCommandBuffer(
+    IN gckHARDWARE Hardware,
+    OUT gctSIZE_T * Alignment,
+    OUT gctSIZE_T * ReservedHead,
+    OUT gctSIZE_T * ReservedTail
+    )
+{
+	gcmkHEADER_ARG("Hardware=0x%x", Hardware);
+
+    /* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+
+    if (Alignment != gcvNULL)
+    {
+        /* Align every 8 bytes. */
+        *Alignment = 8;
+    }
+
+    if (ReservedHead != gcvNULL)
+    {
+        /* Reserve space for SelectPipe(). */
+        *ReservedHead = 32;
+    }
+
+    if (ReservedTail != gcvNULL)
+    {
+        /* Reserve space for Link(). */
+        *ReservedTail = 8;
+    }
+
+    /* Success. */
+    gcmkFOOTER_ARG("*Alignment=%lu *ReservedHead=%lu *ReservedTail=%lu",
+			   gcmOPT_VALUE(Alignment), gcmOPT_VALUE(ReservedHead),
+			   gcmOPT_VALUE(ReservedTail));
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckHARDWARE_QuerySystemMemory
+**
+**	Query the command buffer alignment and number of reserved bytes.
+**
+**	INPUT:
+**
+**		gckHARDWARE Harwdare
+**			Pointer to an gckHARDWARE object.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * SystemSize
+**			Pointer to a variable that receives the maximum size of the system
+**          memory.
+**
+**		gctUINT32 * SystemBaseAddress
+**			Poinetr to a variable that receives the base address for system
+**			memory.
+*/
+gceSTATUS
+gckHARDWARE_QuerySystemMemory(
+    IN gckHARDWARE Hardware,
+    OUT gctSIZE_T * SystemSize,
+	OUT gctUINT32 * SystemBaseAddress
+    )
+{
+	gcmkHEADER_ARG("Hardware=0x%x", Hardware);
+
+    /* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+
+    if (SystemSize != gcvNULL)
+    {
+        /* Maximum system memory can be 2GB. */
+        *SystemSize = 1U << 31;
+    }
+
+	if (SystemBaseAddress != gcvNULL)
+	{
+		/* Set system memory base address. */
+		*SystemBaseAddress = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1))))))) << (0 ? 31:31))) | (((gctUINT32) (0x0 & ((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1))))))) << (0 ? 31:31)));
+	}
+
+    /* Success. */
+    gcmkFOOTER_ARG("*SystemSize=%lu *SystemBaseAddress=%lu",
+			   gcmOPT_VALUE(SystemSize), gcmOPT_VALUE(SystemBaseAddress));
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gckHARDWARE_SetMMU
+**
+**	Set the page table base address.
+**
+**	INPUT:
+**
+**		gckHARDWARE Harwdare
+**			Pointer to an gckHARDWARE object.
+**
+**		gctPOINTER Logical
+**			Logical address of the page table.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckHARDWARE_SetMMU(
+	IN gckHARDWARE Hardware,
+	IN gctPOINTER Logical
+	)
+{
+	gceSTATUS status;
+	gctUINT32 address = 0;
+	gctUINT32 baseAddress;
+
+	gcmkHEADER_ARG("Hardware=0x%x Logical=0x%x", Hardware, Logical);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+	gcmkVERIFY_ARGUMENT(Logical != gcvNULL);
+
+	/* Convert the logical address into an hardware address. */
+	gcmkONERROR(
+		gckHARDWARE_ConvertLogical(Hardware, Logical, &address));
+
+	/* Also get the base address - we need a real physical address. */
+	gcmkONERROR(
+		gckOS_GetBaseAddress(Hardware->os, &baseAddress));
+
+	gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
+				   "Setting page table to 0x%08X",
+				   address + baseAddress);
+
+	/* Write the AQMemoryFePageTable register. */
+	gcmkONERROR(
+		gckOS_WriteRegister(Hardware->os,
+							0x00400,
+							address + baseAddress));
+
+	/* Write the AQMemoryRaPageTable register. */
+	gcmkONERROR(
+		gckOS_WriteRegister(Hardware->os,
+							0x00410,
+							address + baseAddress));
+
+	/* Write the AQMemoryTxPageTable register. */
+	gcmkONERROR(
+		gckOS_WriteRegister(Hardware->os,
+							0x00404,
+							address + baseAddress));
+
+	/* Write the AQMemoryPePageTable register. */
+	gcmkONERROR(
+		gckOS_WriteRegister(Hardware->os,
+							0x00408,
+							address + baseAddress));
+
+	/* Write the AQMemoryPezPageTable register. */
+	gcmkONERROR(
+		gckOS_WriteRegister(Hardware->os,
+							0x0040C,
+							address + baseAddress));
+
+	/* Return the status. */
+	gcmkFOOTER_NO();
+	return status;
+
+OnError:
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckHARDWARE_FlushMMU
+**
+**	Flush the page table.
+**
+**	INPUT:
+**
+**		gckHARDWARE Harwdare
+**			Pointer to an gckHARDWARE object.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckHARDWARE_FlushMMU(
+	IN gckHARDWARE Hardware
+	)
+{
+	gceSTATUS status;
+	gctUINT32 flush;
+	gctUINT32_PTR buffer;
+	gctSIZE_T bufferSize;
+
+	gcmkHEADER_ARG("Hardware=0x%x", Hardware);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+
+	/* Flush the memory controller. */
+	flush = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) (0x1&((gctUINT32)((((1?0:0)-(0?0:0)+1)==32)?~0:(~(~0<<((1?0:0)-(0?0:0)+1)))))))<<(0?0:0)))
+		  | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) (0x1&((gctUINT32)((((1?1:1)-(0?1:1)+1)==32)?~0:(~(~0<<((1?1:1)-(0?1:1)+1)))))))<<(0?1:1)))
+		  | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2))) | (((gctUINT32) (0x1&((gctUINT32)((((1?2:2)-(0?2:2)+1)==32)?~0:(~(~0<<((1?2:2)-(0?2:2)+1)))))))<<(0?2:2)))
+		  | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3))) | (((gctUINT32) (0x1&((gctUINT32)((((1?3:3)-(0?3:3)+1)==32)?~0:(~(~0<<((1?3:3)-(0?3:3)+1)))))))<<(0?3:3)))
+		  | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4))) | (((gctUINT32) (0x1&((gctUINT32)((((1?4:4)-(0?4:4)+1)==32)?~0:(~(~0<<((1?4:4)-(0?4:4)+1)))))))<<(0?4:4)));
+
+	gcmkONERROR(
+		gckCOMMAND_Reserve(Hardware->kernel->command,
+						   8,
+						   gcvFALSE,
+						   (gctPOINTER *) &buffer,
+						   &bufferSize));
+
+	buffer[0] = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
+			  | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E04) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
+			  | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
+
+	buffer[1] = flush;
+
+	gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
+				   "0x%x: FLUSH MMU", buffer);
+
+	gcmkONERROR(
+		gckCOMMAND_Execute(Hardware->kernel->command, 8, gcvFALSE));
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckHARDWARE_BuildVirtualAddress
+**
+**	Build a virtual address.
+**
+**	INPUT:
+**
+**		gckHARDWARE Harwdare
+**			Pointer to an gckHARDWARE object.
+**
+**		gctUINT32 Index
+**			Index into page table.
+**
+**		gctUINT32 Offset
+**			Offset into page.
+**
+**	OUTPUT:
+**
+**		gctUINT32 * Address
+**			Pointer to a variable receiving te hardware address.
+*/
+gceSTATUS
+gckHARDWARE_BuildVirtualAddress(
+	IN gckHARDWARE Hardware,
+	IN gctUINT32 Index,
+	IN gctUINT32 Offset,
+	OUT gctUINT32 * Address
+	)
+{
+	gcmkHEADER_ARG("Hardware=0x%x Index=%u Offset=%u", Hardware, Index, Offset);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+	gcmkVERIFY_ARGUMENT(Address != gcvNULL);
+
+	/* Build virtual address. */
+	*Address = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1))))))) << (0 ? 31:31))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1))))))) << (0 ? 31:31)))
+			 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 30:0) - (0 ? 30:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 30:0) - (0 ? 30:0) + 1))))))) << (0 ? 30:0))) | (((gctUINT32) ((gctUINT32) (Offset|(Index<<12)) & ((gctUINT32) ((((1 ? 30:0) - (0 ? 30:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 30:0) - (0 ? 30:0) + 1))))))) << (0 ? 30:0)));
+
+	/* Success. */
+	gcmkFOOTER_ARG("*Address=%08x", *Address);
+	return gcvSTATUS_OK;
+}
+
+gceSTATUS
+gckHARDWARE_GetIdle(
+	IN gckHARDWARE Hardware,
+	IN gctBOOL Wait,
+	OUT gctUINT32 * Data
+	)
+{
+	gceSTATUS status;
+	gctUINT32 idle = 0;
+	gctINT retry;
+
+	gcmkHEADER_ARG("Hardware=0x%x Wait=%d", Hardware, Wait);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+	gcmkVERIFY_ARGUMENT(Data != gcvNULL);
+
+	/* At most, try for 1 second. */
+	for (retry = 0; retry < 1000; ++retry)
+	{
+		/* Read register. */
+		gcmkONERROR(
+			gckOS_ReadRegister(Hardware->os, 0x00004, &idle));
+
+		/* See if we have to wait for FE idle. */
+		if (!Wait
+		||  ( ((((gctUINT32) (idle)) >> (0 ? 0:0)) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1)))))) )
+		)
+		{
+			/* FE is not idle yet. */
+			break;
+		}
+
+		/* Wait a little. */
+		gcmkVERIFY_OK(gckOS_Delay(Hardware->os, 1));
+	}
+
+	/* Return idle to caller. */
+	*Data = idle;
+
+	/* Success. */
+	gcmkFOOTER_ARG("*Data=%08x", *Data);
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/* Flush the caches. */
+gceSTATUS
+gckHARDWARE_Flush(
+	IN gckHARDWARE Hardware,
+	IN gceKERNEL_FLUSH Flush,
+    IN gctPOINTER Logical,
+    IN OUT gctSIZE_T * Bytes
+	)
+{
+	gctUINT32 pipe;
+	gctUINT32 flush = 0;
+	gctUINT32_PTR logical = (gctUINT32_PTR) Logical;
+	gceSTATUS status;
+
+	gcmkHEADER_ARG("Hardware=0x%x Flush=%x Logical=0x%x *Bytes=%lu",
+				   Hardware, Flush, Logical, gcmOPT_VALUE(Bytes));
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+
+	/* Get current pipe. */
+	pipe = Hardware->kernel->command->pipeSelect;
+
+	/* Flush 3D color cache. */
+	if ((Flush & gcvFLUSH_COLOR) && (pipe == 0x0))
+	{
+		flush |= ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) (0x1&((gctUINT32)((((1?1:1)-(0?1:1)+1)==32)?~0:(~(~0<<((1?1:1)-(0?1:1)+1)))))))<<(0?1:1)));
+	}
+
+	/* Flush 3D depth cache. */
+	if ((Flush & gcvFLUSH_DEPTH) && (pipe == 0x0))
+	{
+		flush |= ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) (0x1&((gctUINT32)((((1?0:0)-(0?0:0)+1)==32)?~0:(~(~0<<((1?0:0)-(0?0:0)+1)))))))<<(0?0:0)));
+	}
+
+	/* Flush 3D texture cache. */
+	if ((Flush & gcvFLUSH_TEXTURE) && (pipe == 0x0))
+	{
+		flush |= ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2))) | (((gctUINT32) (0x1&((gctUINT32)((((1?2:2)-(0?2:2)+1)==32)?~0:(~(~0<<((1?2:2)-(0?2:2)+1)))))))<<(0?2:2)));
+	}
+
+	/* Flush 2D cache. */
+	if ((Flush & gcvFLUSH_2D) && (pipe == 0x1))
+	{
+		flush |= ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3))) | (((gctUINT32) (0x1&((gctUINT32)((((1?3:3)-(0?3:3)+1)==32)?~0:(~(~0<<((1?3:3)-(0?3:3)+1)))))))<<(0?3:3)));
+	}
+
+	/* See if there is a valid flush. */
+	if (flush == 0)
+	{
+		if (Bytes != gcvNULL)
+		{
+			/* No bytes required. */
+			*Bytes = 0;
+		}
+	}
+
+	else
+	{
+		/* Copy to command queue. */
+		if (Logical != gcvNULL)
+		{
+			if (*Bytes < 8)
+			{
+				/* Command queue too small. */
+				gcmkONERROR(gcvSTATUS_BUFFER_TOO_SMALL);
+			}
+
+			/* Append LOAD_STATE to AQFlush. */
+			logical[0] = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
+					   | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E03) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
+					   | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
+
+			logical[1] = flush;
+
+			gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
+						   "0x%x: FLUSH %x", logical, flush);
+		}
+
+		if (Bytes != gcvNULL)
+		{
+			/* 8 bytes required. */
+			*Bytes = 8;
+		}
+	}
+
+	/* Success. */
+	gcmkFOOTER_ARG("*Bytes=%lu", gcmOPT_VALUE(Bytes));
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+gceSTATUS
+gckHARDWARE_SetFastClear(
+    IN gckHARDWARE Hardware,
+    IN gctINT Enable,
+	IN gctINT Compression
+    )
+{
+    gctUINT32 debug;
+    gceSTATUS status;
+
+    gcmkHEADER_ARG("Hardware=0x%x Enable=%d Compression=%d",
+			   Hardware, Enable, Compression);
+
+	/* Only process if fast clear is available. */
+    if (( ((((gctUINT32) (Hardware->chipFeatures)) >> (0 ? 0:0)) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1)))))) ))
+    {
+	if (Enable == -1)
+	{
+		/* Determine automatic value for fast clear. */
+	    Enable = (Hardware->chipModel != gcv500)
+				   | (Hardware->chipRevision >= 3);
+	}
+
+#if MRVL_DISABLE_FASTCLEAR
+		Enable = 0;
+#endif
+
+		if (Compression == -1)
+		{
+			/* Determine automatic value for compression. */
+			Compression = Enable
+						& ( ((((gctUINT32) (Hardware->chipFeatures)) >> (0 ? 5:5)) & ((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1)))))) );
+		}
+
+		/* Read AQMemoryDebug register. */
+        gcmkONERROR(
+		gckOS_ReadRegister(Hardware->os, 0x00414, &debug));
+
+		/* Set fast clear bypass. */
+	debug = ((((gctUINT32) (debug)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 20:20) - (0 ? 20:20) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 20:20) - (0 ? 20:20) + 1))))))) << (0 ? 20:20))) | (((gctUINT32) ((gctUINT32) (Enable==0) & ((gctUINT32) ((((1 ? 20:20) - (0 ? 20:20) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 20:20) - (0 ? 20:20) + 1))))))) << (0 ? 20:20)));
+
+		/* Set copression bypass. */
+	debug = ((((gctUINT32) (debug)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1))))))) << (0 ? 21:21))) | (((gctUINT32) ((gctUINT32) (Compression==0) & ((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1))))))) << (0 ? 21:21)));
+
+		/* Write back AQMemoryDebug register. */
+	gcmkONERROR(
+			gckOS_WriteRegister(Hardware->os,
+						0x00414,
+								debug));
+
+		/* Store fast clear and comprersison flags. */
+        Hardware->allowFastClear   = Enable;
+		Hardware->allowCompression = Compression;
+
+		gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
+					   "FastClear=%d Compression=%d", Enable, Compression);
+    }
+
+	/* Success. */
+	gcmkFOOTER_NO();
+    return gcvSTATUS_OK;
+
+OnError:
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+typedef enum
+{
+	gcvPOWER_FLAG_INITIALIZE      = 1 << 0,
+	gcvPOWER_FLAG_STALL           = 1 << 1,
+	gcvPOWER_FLAG_STOP            = 1 << 2,
+	gcvPOWER_FLAG_START           = 1 << 3,
+	gcvPOWER_FLAG_RELEASE_CONTEXT = 1 << 4,
+	gcvPOWER_FLAG_DELAY           = 1 << 5,
+}
+gcePOWER_FLAGS;
+
+/*******************************************************************************
+**
+**	gckHARDWARE_SetPowerManagementState
+**
+**	Set GPU to a specified power state.
+**
+**	INPUT:
+**
+**		gckHARDWARE Harwdare
+**			Pointer to an gckHARDWARE object.
+**
+**		gceCHIPPOWERSTATE State
+**			Power State.
+**
+*/
+gceSTATUS
+gckHARDWARE_SetPowerManagementState(
+    IN gckHARDWARE Hardware,
+    IN gceCHIPPOWERSTATE State
+    )
+{
+	gceSTATUS status;
+	gckCOMMAND command;
+	gctUINT flag, clock;
+	gctPOINTER buffer;
+	gctSIZE_T bytes, requested;
+	gctBOOL acquired = gcvFALSE;
+
+	/* State transition flags. */
+	static const gctUINT flags[4][4] =
+	{
+		/* gcvPOWER_ON		*/
+		{	/* ON      */ 0,
+			/* OFF     */ gcvPOWER_FLAG_STALL |
+						  gcvPOWER_FLAG_STOP,
+			/* IDLE    */ gcvPOWER_FLAG_STALL,
+			/* SUSPEND */ gcvPOWER_FLAG_STALL |
+						  gcvPOWER_FLAG_STOP,
+		},
+
+		/* gcvPOWER_OFF		*/
+		{	/* ON      */ gcvPOWER_FLAG_INITIALIZE      |
+						  gcvPOWER_FLAG_START           |
+						  gcvPOWER_FLAG_RELEASE_CONTEXT |
+						  gcvPOWER_FLAG_DELAY,
+			/* OFF     */ 0,
+			/* IDLE    */ gcvPOWER_FLAG_INITIALIZE |
+						  gcvPOWER_FLAG_START      |
+						  gcvPOWER_FLAG_DELAY,
+			/* SUSPEND */ gcvPOWER_FLAG_INITIALIZE,
+		},
+
+		/* gcvPOWER_IDLE	*/
+		{	/* ON      */ gcvPOWER_FLAG_RELEASE_CONTEXT,
+			/* OFF     */ gcvPOWER_FLAG_STOP,
+			/* IDLE    */ 0,
+			/* SUSPEND */ gcvPOWER_FLAG_STOP,
+		},
+
+		/* gcvPOWER_SUSPEND */
+		{	/* ON      */ gcvPOWER_FLAG_START           |
+						  gcvPOWER_FLAG_RELEASE_CONTEXT |
+						  gcvPOWER_FLAG_DELAY,
+			/* OFF     */ 0,
+			/* IDLE    */ gcvPOWER_FLAG_START |
+						  gcvPOWER_FLAG_DELAY,
+			/* SUSPEND */ 0,
+		},
+	};
+
+	/* Clocks. */
+	static const gctUINT clocks[4] =
+	{
+		/* gcvPOWER_ON      */
+		((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)))|
+		((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1)))|
+		((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2))) | (((gctUINT32) ((gctUINT32) (64) & ((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2)))|
+		((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) ,
+		/* gcvPOWER_OFF     */
+		((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)))|
+		((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1)))|
+		((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2)))|
+		((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) ,
+		/* gcvPOWER_IDLE    */
+		((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)))|
+		((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1)))|
+		((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2)))|
+		((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) ,
+		/* gcvPOWER_SUSPEND */
+		((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)))|
+		((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1)))|
+		((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2)))|
+		((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))), };
+
+	gcmkHEADER_ARG("Hardware=0x%x State=%d", Hardware, State);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+
+	/* Grab control flags and clock. */
+	flag  = flags[Hardware->chipPowerState][State];
+	clock = clocks[State];
+
+	if (flag == 0)
+	{
+	/* Save new power state. */
+	Hardware->chipPowerState = State;
+
+		/* No need to do anything. */
+		gcmkFOOTER_NO();
+		return gcvSTATUS_OK;
+	}
+
+	gcmkASSERT(Hardware->kernel          != gcvNULL);
+	gcmkASSERT(Hardware->kernel->command != gcvNULL);
+	command = Hardware->kernel->command;
+
+	if (flag & gcvPOWER_FLAG_INITIALIZE)
+	{
+		/* Initialize hardware. */
+		gcmkONERROR(
+			gckHARDWARE_InitializeHardware(Hardware));
+
+		gcmkONERROR(
+			gckHARDWARE_SetFastClear(Hardware,
+									 Hardware->allowFastClear,
+									 Hardware->allowCompression));
+
+		/* Force the command queue to reload the next context. */
+		command->currentContext = 0;
+	}
+
+	if (flag & gcvPOWER_FLAG_STALL)
+	{
+		/* Acquire the context switching mutex so nothing else can be
+		** committed. */
+		gcmkONERROR(
+			gckOS_AcquireMutex(Hardware->os,
+							   command->mutexContext,
+							   gcvINFINITE));
+
+		acquired = gcvTRUE;
+
+		/* Get the size of the flush command. */
+		gcmkONERROR(
+			gckHARDWARE_Flush(Hardware,
+							  (gceKERNEL_FLUSH) ~0,
+							  gcvNULL,
+							  &requested));
+
+		/* Reserve space in the command queue. */
+		gcmkONERROR(
+			gckCOMMAND_Reserve(command, requested, gcvFALSE, &buffer, &bytes));
+
+		/* Append a flush. */
+		gcmkONERROR(
+			gckHARDWARE_Flush(Hardware,
+							  (gceKERNEL_FLUSH) ~0,
+							  buffer,
+							  &bytes));
+
+		/* Execute the command queue. */
+		acquired = gcvFALSE;
+		gcmkONERROR(
+			gckCOMMAND_Execute(command, requested, gcvFALSE));
+
+		/* Wait to finish all commands. */
+		gcmkONERROR(
+			gckCOMMAND_Stall(command));
+	}
+
+	if (flag & gcvPOWER_FLAG_STOP)
+	{
+		/* Stop the command parser. */
+		gcmkONERROR(
+			gckCOMMAND_Stop(command));
+
+		/* Grab the command queue mutex so nothing can get access to the
+		** command queue. */
+		gcmkONERROR(
+			gckOS_AcquireMutex(Hardware->os,
+							   command->mutexQueue,
+							   gcvINFINITE));
+	}
+
+	/* Write the clock control register. */
+	gcmkONERROR(
+		gckOS_WriteRegister(Hardware->os,
+							0x00000,
+							clock));
+
+	/* Done loading the frequency scaler. */
+	gcmkONERROR(
+		gckOS_WriteRegister(Hardware->os,
+							0x00000,
+							((((gctUINT32) (clock)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9)))));
+
+	if (flag & gcvPOWER_FLAG_DELAY)
+	{
+		/* Wait for the specified amount of time to settle coming back from
+		** power-off or suspend state. */
+		gcmkONERROR(
+			gckOS_Delay(Hardware->os, gcdPOWER_CONTROL_DELAY));
+	}
+	else
+	{
+		/* Wait for the smallest amount of time to settle the clock divider. */
+		gcmkONERROR(
+			gckOS_Delay(Hardware->os, 0));
+	}
+
+	if (flag & gcvPOWER_FLAG_START)
+	{
+		/* Release the command mutex queue. */
+		gcmkONERROR(
+			gckOS_ReleaseMutex(Hardware->os, command->mutexQueue));
+
+		/* Start the command processor. */
+		gcmkONERROR(
+			gckCOMMAND_Start(command));
+	}
+
+	if (flag & gcvPOWER_FLAG_RELEASE_CONTEXT)
+	{
+		/* Release the context switching mutex. */
+		gcmkONERROR(
+			gckOS_ReleaseMutex(Hardware->os, command->mutexContext));
+	}
+
+	/* Save new power state. */
+	Hardware->chipPowerState = State;
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+
+OnError:
+	if (acquired)
+	{
+		/* Release command queue. */
+		gcmkVERIFY_OK(gckCOMMAND_Release(command));
+	}
+
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gckHARDWARE_QueryPowerManagementState
+**
+**	Get GPU power state.
+**
+**	INPUT:
+**
+**		gckHARDWARE Harwdare
+**			Pointer to an gckHARDWARE object.
+**
+**		gceCHIPPOWERSTATE* State
+**			Power State.
+**
+*/
+gceSTATUS
+gckHARDWARE_QueryPowerManagementState(
+    IN gckHARDWARE Hardware,
+    OUT gceCHIPPOWERSTATE* State
+    )
+{
+	gcmkHEADER_ARG("Hardware=0x%x", Hardware);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+	gcmkVERIFY_ARGUMENT(State != gcvNULL);
+
+	/* Return the statue. */
+    *State = Hardware->chipPowerState;
+
+	/* Success. */
+	gcmkFOOTER_ARG("*State=%d", *State);
+    return gcvSTATUS_OK;
+}
+
+gceSTATUS
+gckHARDWARE_QueryIdle(
+    IN gckHARDWARE Hardware,
+    OUT gctBOOL_PTR IsIdle
+    )
+{
+    gceSTATUS status;
+    gctUINT32 idle, address;
+
+    gcmkHEADER_ARG("Hardware=0x%x", Hardware);
+
+    /* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+    gcmkVERIFY_ARGUMENT(IsIdle != gcvNULL);
+
+    /* Read idle register. */
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x00004, &idle));
+
+    /* Pipe must be idle. */
+    if ((( ((((gctUINT32) (idle)) >> (0 ? 1:1)) & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1)))))) )!=1)
+    ||  (( ((((gctUINT32) (idle)) >> (0 ? 3:3)) & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1)))))) )!=1)
+    ||  (( ((((gctUINT32) (idle)) >> (0 ? 4:4)) & ((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1)))))) )!=1)
+    ||  (( ((((gctUINT32) (idle)) >> (0 ? 5:5)) & ((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1)))))) )!=1)
+    ||  (( ((((gctUINT32) (idle)) >> (0 ? 6:6)) & ((gctUINT32) ((((1 ? 6:6) - (0 ? 6:6) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 6:6) - (0 ? 6:6) + 1)))))) )!=1)
+    ||  (( ((((gctUINT32) (idle)) >> (0 ? 7:7)) & ((gctUINT32) ((((1 ? 7:7) - (0 ? 7:7) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:7) - (0 ? 7:7) + 1)))))) )!=1)
+    ||  (( ((((gctUINT32) (idle)) >> (0 ? 2:2)) & ((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1)))))) )!=1)
+    )
+    {
+        /* Something is busy. */
+        *IsIdle = gcvFALSE;
+    }
+
+    else
+    {
+        /* Read the current FE address. */
+        gcmkONERROR(gckOS_ReadRegister(Hardware->os,
+                                       0x00664,
+                                       &address));
+
+        /* Test if address is inside the last WAIT/LINK sequence. */
+        if ((address >= Hardware->lastWaitLink)
+        &&  (address <  Hardware->lastWaitLink + 16)
+        )
+        {
+            /* FE is in last WAIT/LINK and the pipe is idle. */
+            *IsIdle = gcvTRUE;
+        }
+        else
+        {
+            /* FE is not in WAIT/LINK yet. */
+            *IsIdle = gcvFALSE;
+        }
+    }
+
+    /* Success. */
+    gcmkFOOTER_NO();
+    return gcvSTATUS_OK;
+
+OnError:
+    /* Return the status. */
+    gcmkFOOTER();
+    return status;
+}
+
+/*******************************************************************************
+** Handy macros that will help in reading those debug registers.
+*/
+
+#define gcmkREAD_DEBUG_REGISTER(control, block, index, data) \
+	gcmkONERROR( \
+		gckOS_WriteRegister(Hardware->os, \
+							GC_DEBUG_CONTROL##control##_Address, \
+							gcmSETFIELD(0, \
+										GC_DEBUG_CONTROL##control, \
+										block, \
+										index))); \
+	gcmkONERROR( \
+		gckOS_ReadRegister(Hardware->os, \
+						   GC_DEBUG_SIGNALS_##block##_Address, \
+						   &profiler->data))
+
+#define gcmkRESET_DEBUG_REGISTER(control, block) \
+	gcmkONERROR( \
+		gckOS_WriteRegister(Hardware->os, \
+							GC_DEBUG_CONTROL##control##_Address, \
+							gcmSETFIELD(0, \
+										GC_DEBUG_CONTROL##control, \
+										block, \
+										15))); \
+	gcmkONERROR( \
+		gckOS_WriteRegister(Hardware->os, \
+							GC_DEBUG_CONTROL##control##_Address, \
+							gcmSETFIELD(0, \
+										GC_DEBUG_CONTROL##control, \
+										block, \
+										0)))
+
+/*******************************************************************************
+**
+**	gckHARDWARE_ProfileEngine2D
+**
+**	Read the profile registers available in the 2D engine and sets them in the
+**	profile.  The function will also reset the pixelsRendered counter every time.
+**
+**	INPUT:
+**
+**		gckHARDWARE Hardware
+**			Pointer to an gckHARDWARE object.
+**
+**		OPTIONAL gcs2D_PROFILE_PTR Profile
+**			Pointer to a gcs2D_Profile structure.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gckHARDWARE_ProfileEngine2D(
+	IN gckHARDWARE Hardware,
+	OPTIONAL gcs2D_PROFILE_PTR Profile
+	)
+{
+	gceSTATUS status;
+	gcs2D_PROFILE_PTR profiler = Profile;
+
+	gcmkHEADER_ARG("Hardware=0x%x", Hardware);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+
+	if (Profile != gcvNULL)
+	{
+		/* Read the cycle count. */
+		gcmkONERROR(
+			gckOS_ReadRegister(Hardware->os,
+							   0x00438,
+							   &Profile->cycleCount));
+
+		/* Read pixels rendered by 2D engine. */
+		gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00470, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) | (((gctUINT32) ((gctUINT32) (11) & ((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) )));
+		gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x00454, &profiler->pixelsRendered));
+
+		/* Reset counter. */
+		gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00470, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) | (((gctUINT32) ((gctUINT32) (15) & ((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) )));
+		gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00470, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16)))
+)));
+	}
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+
+#if VIVANTE_PROFILER
+gceSTATUS
+gckHARDWARE_QueryProfileRegisters(
+	IN gckHARDWARE Hardware,
+    OUT gcsPROFILER_COUNTERS * Counters
+	)
+{
+	gceSTATUS status;
+	gcsPROFILER_COUNTERS * profiler = Counters;
+
+    gcmkHEADER_ARG("Hardware=0x%x Counters=0x%x", Hardware, Counters);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+
+    /* Read the counters. */
+    gcmkONERROR(
+	gckOS_ReadRegister(Hardware->os,
+					   0x00040,
+					   &profiler->gpuTotalRead64BytesPerFrame));
+    gcmkONERROR(
+	gckOS_ReadRegister(Hardware->os,
+					   0x00044,
+					   &profiler->gpuTotalWrite64BytesPerFrame));
+    gcmkONERROR(
+	gckOS_ReadRegister(Hardware->os,
+					   0x00438,
+					   &profiler->gpuCyclesCounter));
+
+    /* Reset counters. */
+    gcmkONERROR(
+	gckOS_WriteRegister(Hardware->os, 0x0003C, 1));
+    gcmkONERROR(
+	gckOS_WriteRegister(Hardware->os, 0x0003C, 0));
+    gcmkONERROR(
+	gckOS_WriteRegister(Hardware->os, 0x00438, 0));
+
+    /* PE */
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00470, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x00454, &profiler->pe_pixel_count_killed_by_color_pipe));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00470, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x00454, &profiler->pe_pixel_count_killed_by_depth_pipe));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00470, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) | (((gctUINT32) ((gctUINT32) (2) & ((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x00454, &profiler->pe_pixel_count_drawn_by_color_pipe));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00470, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) | (((gctUINT32) ((gctUINT32) (3) & ((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x00454, &profiler->pe_pixel_count_drawn_by_depth_pipe));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00470, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) | (((gctUINT32) ((gctUINT32) (15) & ((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) )));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00470, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16)))
+)));
+
+    /* SH */
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00470, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (7) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x0045C, &profiler->ps_inst_counter));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00470, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (8) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x0045C, &profiler->rendered_pixel_counter));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00470, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (9) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x0045C, &profiler->vs_inst_counter));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00470, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (10) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x0045C, &profiler->rendered_vertice_counter));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00470, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (11) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x0045C, &profiler->vtx_branch_inst_counter));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00470, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (12) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x0045C, &profiler->vtx_texld_inst_counter));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00470, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (13) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x0045C, &profiler->pxl_branch_inst_counter));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00470, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (14) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x0045C, &profiler->pxl_texld_inst_counter));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00470, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (15) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00470, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24)))
+)));
+
+    /* PA */
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00474, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) | (((gctUINT32) ((gctUINT32) (3) & ((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x00460, &profiler->pa_input_vtx_counter));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00474, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) | (((gctUINT32) ((gctUINT32) (4) & ((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x00460, &profiler->pa_input_prim_counter));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00474, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) | (((gctUINT32) ((gctUINT32) (5) & ((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x00460, &profiler->pa_output_prim_counter));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00474, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) | (((gctUINT32) ((gctUINT32) (6) & ((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x00460, &profiler->pa_depth_clipped_counter));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00474, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) | (((gctUINT32) ((gctUINT32) (7) & ((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x00460, &profiler->pa_trivial_rejected_counter));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00474, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) | (((gctUINT32) ((gctUINT32) (8) & ((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x00460, &profiler->pa_culled_counter));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00474, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) | (((gctUINT32) ((gctUINT32) (15) & ((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) )));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00474, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0)))
+)));
+
+    /* SE */
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00474, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1))))))) << (0 ? 11:8))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1))))))) << (0 ? 11:8))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x00464, &profiler->se_culled_triangle_count));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00474, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1))))))) << (0 ? 11:8))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1))))))) << (0 ? 11:8))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x00464, &profiler->se_culled_lines_count));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00474, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1))))))) << (0 ? 11:8))) | (((gctUINT32) ((gctUINT32) (15) & ((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1))))))) << (0 ? 11:8))) )));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00474, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1))))))) << (0 ? 11:8))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1))))))) << (0 ? 11:8)))
+)));
+
+    /* RA */
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00474, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x00448, &profiler->ra_valid_pixel_count));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00474, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x00448, &profiler->ra_total_quad_count));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00474, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) | (((gctUINT32) ((gctUINT32) (2) & ((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x00448, &profiler->ra_valid_quad_count_after_early_z));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00474, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) | (((gctUINT32) ((gctUINT32) (3) & ((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x00448, &profiler->ra_total_primitive_count));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00474, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) | (((gctUINT32) ((gctUINT32) (9) & ((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x00448, &profiler->ra_pipe_cache_miss_counter));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00474, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) | (((gctUINT32) ((gctUINT32) (10) & ((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x00448, &profiler->ra_prefetch_cache_miss_counter));
+	gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00474, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) | (((gctUINT32) ((gctUINT32) (15) & ((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) )));
+	gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00474, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 19:16) - (0 ? 19:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:16) - (0 ? 19:16) + 1))))))) << (0 ? 19:16)))
+)));
+
+    /* TX */
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00474, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x0044C, &profiler->tx_total_bilinear_requests));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00474, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x0044C, &profiler->tx_total_trilinear_requests));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00474, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (2) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x0044C, &profiler->tx_total_discarded_texture_requests));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00474, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (3) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x0044C, &profiler->tx_total_texture_requests));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00474, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (5) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x0044C, &profiler->tx_mem_read_count));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00474, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (6) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x0044C, &profiler->tx_mem_read_in_8B_count));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00474, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (7) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x0044C, &profiler->tx_cache_miss_count));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00474, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (8) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x0044C, &profiler->tx_cache_hit_texel_count));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00474, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (9) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x0044C, &profiler->tx_cache_miss_texel_count));
+	gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00474, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (15) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) )));
+	gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00474, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 27:24) - (0 ? 27:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:24) - (0 ? 27:24) + 1))))))) << (0 ? 27:24)))
+)));
+
+    /* MC */
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00478, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x00468, &profiler->mc_total_read_req_8B_from_pipeline));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00478, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) | (((gctUINT32) ((gctUINT32) (2) & ((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x00468, &profiler->mc_total_read_req_8B_from_IP));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00478, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) | (((gctUINT32) ((gctUINT32) (3) & ((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x00468, &profiler->mc_total_write_req_8B_from_pipeline));
+	gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00478, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) | (((gctUINT32) ((gctUINT32) (15) & ((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) )));
+	gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00478, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1))))))) << (0 ? 3:0)))
+)));
+
+    /* HI */
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00478, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1))))))) << (0 ? 11:8))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1))))))) << (0 ? 11:8))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x0046C, &profiler->hi_axi_cycles_read_request_stalled));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00478, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1))))))) << (0 ? 11:8))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1))))))) << (0 ? 11:8))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x0046C, &profiler->hi_axi_cycles_write_request_stalled));
+    gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00478, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1))))))) << (0 ? 11:8))) | (((gctUINT32) ((gctUINT32) (2) & ((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1))))))) << (0 ? 11:8))) )));
+    gcmkONERROR(gckOS_ReadRegister(Hardware->os, 0x0046C, &profiler->hi_axi_cycles_write_data_stalled));
+	gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00478, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1))))))) << (0 ? 11:8))) | (((gctUINT32) ((gctUINT32) (15) & ((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1))))))) << (0 ? 11:8))) )));
+	gcmkONERROR(gckOS_WriteRegister(Hardware->os, 0x00478, (  ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1))))))) << (0 ? 11:8))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1))))))) << (0 ? 11:8)))
+)));
+
+    /* Success. */
+    gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Return the status. */
+	gcmkFOOTER();
+	return status;
+}
+#endif
+
+gceSTATUS
+gckHARDWARE_Reset(
+	IN gckHARDWARE Hardware
+	)
+{
+	gceSTATUS status;
+	gctUINT32 control, idle;
+	gckCOMMAND command;
+
+	gcmkHEADER_ARG("Hardware=0x%x", Hardware);
+
+	/* Verify the arguments. */
+	gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+	gcmkASSERT(Hardware->kernel != gcvNULL);
+	command = Hardware->kernel->command;
+	gcmkASSERT(command != gcvNULL);
+
+	if (Hardware->chipRevision < 0x4600)
+	{
+		/* Not supported - we need the isolation bit. */
+		gcmkONERROR(gcvSTATUS_NOT_SUPPORTED);
+	}
+
+	if (Hardware->chipPowerState == gcvPOWER_ON)
+	{
+		/* Grab the context mutex. */
+		gcmkONERROR(
+			gckOS_AcquireMutex(Hardware->os,
+							   command->mutexContext,
+							   gcvINFINITE));
+	}
+
+	if ((Hardware->chipPowerState == gcvPOWER_ON)
+	||  (Hardware->chipPowerState == gcvPOWER_IDLE)
+	)
+	{
+		/* Stop the command processor. */
+		gcmkONERROR(
+			gckCOMMAND_Stop(command));
+
+		/* Grab the queue mutex. */
+		gcmkONERROR(
+			gckOS_AcquireMutex(Hardware->os,
+							   command->mutexQueue,
+							   gcvINFINITE));
+	}
+
+	/* Read register. */
+	gcmkONERROR(
+		gckOS_ReadRegister(Hardware->os,
+						   0x00000,
+						   &control));
+
+	for (;;)
+	{
+		/* Isolate the GPU. */
+		control = ((((gctUINT32) (control)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:19) - (0 ? 19:19) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:19) - (0 ? 19:19) + 1))))))) << (0 ? 19:19))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 19:19) - (0 ? 19:19) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:19) - (0 ? 19:19) + 1))))))) << (0 ? 19:19)));
+
+		gcmkONERROR(
+			gckOS_WriteRegister(Hardware->os,
+								0x00000,
+								control));
+
+		/* Set soft reset. */
+		gcmkONERROR(
+			gckOS_WriteRegister(Hardware->os,
+								0x00000,
+								((((gctUINT32) (control)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:12) - (0 ? 12:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:12) - (0 ? 12:12) + 1))))))) << (0 ? 12:12))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 12:12) - (0 ? 12:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:12) - (0 ? 12:12) + 1))))))) << (0 ? 12:12)))));
+
+		/* Wait for reset. */
+		gcmkONERROR(
+			gckOS_Delay(Hardware->os, 1));
+
+		/* Reset soft reset bit. */
+		gcmkONERROR(
+			gckOS_WriteRegister(Hardware->os,
+								0x00000,
+								((((gctUINT32) (control)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:12) - (0 ? 12:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:12) - (0 ? 12:12) + 1))))))) << (0 ? 12:12))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 12:12) - (0 ? 12:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:12) - (0 ? 12:12) + 1))))))) << (0 ? 12:12)))));
+
+		/* Reset GPU isolation. */
+		control = ((((gctUINT32) (control)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:19) - (0 ? 19:19) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:19) - (0 ? 19:19) + 1))))))) << (0 ? 19:19))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 19:19) - (0 ? 19:19) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:19) - (0 ? 19:19) + 1))))))) << (0 ? 19:19)));
+
+		gcmkONERROR(
+			gckOS_WriteRegister(Hardware->os,
+								0x00000,
+								control));
+
+		/* Read idle register. */
+		gcmkONERROR(
+			gckOS_ReadRegister(Hardware->os,
+							   0x00004,
+							   &idle));
+
+		if (( ((((gctUINT32) (idle)) >> (0 ? 0:0)) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1)))))) )==0)
+		{
+			continue;
+		}
+
+		/* Read reset register. */
+		gcmkONERROR(
+			gckOS_ReadRegister(Hardware->os,
+							   0x00000,
+							   &control));
+
+		if ((( ((((gctUINT32) (control)) >> (0 ? 16:16)) & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1)))))) )==0)
+		||  (( ((((gctUINT32) (control)) >> (0 ? 17:17)) & ((gctUINT32) ((((1 ? 17:17) - (0 ? 17:17) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 17:17) - (0 ? 17:17) + 1)))))) )==0)
+		)
+		{
+			continue;
+		}
+
+		/* GPU is idle. */
+		break;
+	}
+
+	/* Force an OFF to ON power switch. */
+	Hardware->chipPowerState = gcvPOWER_OFF;
+	gcmkONERROR(
+		gckHARDWARE_SetPowerManagementState(Hardware, gcvPOWER_ON));
+
+	/* Success. */
+	gcmkFOOTER_NO();
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Return the error. */
+	gcmkFOOTER();
+	return status;
+}
+
+gceSTATUS
+gckHARDWARE_GetBaseAddress(
+    IN gckHARDWARE Hardware,
+    OUT gctUINT32_PTR BaseAddress
+    )
+{
+    gceSTATUS status;
+
+    gcmkHEADER_ARG("Hardware=0x%x", Hardware);
+
+    /* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+    gcmkVERIFY_ARGUMENT(BaseAddress != gcvNULL);
+
+    /* Test if we have a new Memory Controller. */
+    if (((((gctUINT32) (Hardware->chipMinorFeatures0)) >> (0 ? 22:22) & ((gctUINT32) ((((1 ? 22:22) - (0 ? 22:22) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 22:22) - (0 ? 22:22) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 22:22) - (0 ? 22:22) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 22:22) - (0 ? 22:22) + 1))))))))
+    {
+        /* No base address required. */
+        *BaseAddress = 0;
+    }
+    else
+    {
+        /* Get the base address from the OS. */
+        gcmkONERROR(gckOS_GetBaseAddress(Hardware->os, BaseAddress));
+    }
+
+    /* Success. */
+    gcmkFOOTER_ARG("*BaseAddress=0x%08x", *BaseAddress);
+    return gcvSTATUS_OK;
+
+OnError:
+    /* Return the status. */
+    gcmkFOOTER();
+    return status;
+}
+
+gceSTATUS
+gckHARDWARE_NeedBaseAddress(
+    IN gckHARDWARE Hardware,
+    IN gctUINT32 State,
+    OUT gctBOOL_PTR NeedBase
+    )
+{
+    gctBOOL need = gcvFALSE;
+
+    gcmkHEADER_ARG("Hardware=0x%x State=0x%08x", Hardware, State);
+
+    /* Verify the arguments. */
+    gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+    gcmkVERIFY_ARGUMENT(NeedBase != gcvNULL);
+
+    /* Make sure this is a load state. */
+    if (((((gctUINT32) (State)) >> (0 ? 31:27) & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1)))))) == (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27)+1))))))))
+    {
+        /* Get the state address. */
+        switch (( ((((gctUINT32) (State)) >> (0 ? 15:0)) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0)+1))))))))
+        {
+        case 0x0596:
+        case 0x0597:
+        case 0x0599:
+        case 0x059A:
+        case 0x05A9:
+            /* These states need a TRUE physical address. */
+            need = gcvTRUE;
+            break;
+        }
+    }
+
+    /* Return the flag. */
+    *NeedBase = need;
+
+    /* Success. */
+    gcmkFOOTER_ARG("*NeedBase=%d", *NeedBase);
+    return gcvSTATUS_OK;
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/arch/unified/hal/kernel/makefile.linux
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/arch/unified/hal/kernel/makefile.linux
@@ -0,0 +1,55 @@
+##############################################################################
+#
+#    Copyright (C) 2005 - 2010 by Vivante Corp.
+#
+#    This program is free software; you can redistribute it and/or modify
+#    it under the terms of the GNU General Public License as published by
+#    the Free Software Foundation; either version 2 of the license, or
+#    (at your option) any later version.
+#
+#    This program is distributed in the hope that it will be useful,
+#    but WITHOUT ANY WARRANTY; without even the implied warranty of
+#    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+#    GNU General Public Lisence for more details.
+#
+#    You should have received a copy of the GNU General Public License
+#    along with this program; if not write to the Free Software
+#    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+#
+##############################################################################
+
+
+
+#
+# Linux build file for architecture dependent kernel HAL layer.
+#
+#
+
+
+################################################################################
+# Include common definitions.
+
+include $(AQROOT)/makefile.linux.def
+
+################################################################################
+# Define a shortcut for the main target.
+
+STATIC = 1
+TARGET_NAME = libhalarchkernel.a
+
+################################################################################
+# Supply additional include directories.
+
+INCLUDE += -I$(AQROOT)/hal/inc
+INCLUDE += -I$(AQROOT)/hal/kernel
+INCLUDE += -I$(AQARCH)/hal/kernel
+INCLUDE += -I$(AQARCH)/cmodel/inc
+
+CFLAGS += $(INCLUDE) -Werror -ansi
+
+################################################################################
+# Describe object files.
+
+OBJECTS = $(OBJ_DIR)/gc_hal_kernel_hardware.o
+
+include $(AQROOT)/common.target
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/arch/unified/hal/kernel/gc_hal_kernel_hardware.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/arch/unified/hal/kernel/gc_hal_kernel_hardware.h
@@ -0,0 +1,90 @@
+/****************************************************************************
+*
+*    Copyright (C) 2005 - 2010 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public License as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+#ifndef __gc_hal_kernel_hardware_h_
+#define __gc_hal_kernel_hardware_h_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* gckHARDWARE object. */
+struct _gckHARDWARE
+{
+    /* Object. */
+    gcsOBJECT	    	    	object;
+
+    /* Pointer to gctKERNEL object. */
+    gckKERNEL	    	    	kernel;
+
+    /* Pointer to gctOS object. */
+    gckOS   	    	    	os;
+
+    /* Chip characteristics. */
+    gceCHIPMODEL    	    	chipModel;
+    gctUINT32	    	    	chipRevision;
+    gctUINT32	    	    	chipFeatures;
+	gctUINT32	    	    	chipMinorFeatures0;
+	gctUINT32	    	    	chipMinorFeatures1;
+    gctBOOL 	    	    	allowFastClear;
+	gctBOOL						allowCompression;
+	gctUINT32					powerBaseAddress;
+	gctBOOL						extraEventStates;
+
+	gctUINT32					streamCount;
+	gctUINT32					registerMax;
+	gctUINT32					threadCount;
+	gctUINT32					shaderCoreCount;
+	gctUINT32					vertexCacheSize;
+	gctUINT32					vertexOutputBufferSize;
+
+	/* Big endian */
+	gctBOOL						bigEndian;
+
+    /* Chip status */
+    gceCHIPPOWERSTATE			chipPowerState;
+    gctUINT32                   lastWaitLink;
+
+    /* force GC to hang once */
+	gctBOOL						hang;
+};
+
+gceSTATUS
+gckHARDWARE_GetBaseAddress(
+    IN gckHARDWARE Hardware,
+    OUT gctUINT32_PTR BaseAddress
+    );
+
+gceSTATUS
+gckHARDWARE_NeedBaseAddress(
+    IN gckHARDWARE Hardware,
+    IN gctUINT32 State,
+    OUT gctBOOL_PTR NeedBase
+    );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __gc_hal_kernel_hardware_h_ */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/arch/Unified/hal/kernel/PreComp.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/arch/Unified/hal/kernel/PreComp.h
@@ -0,0 +1,27 @@
+/****************************************************************************
+*
+*    Copyright (C) 2002 - 2008 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public Lisence as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+
+
+#include "aqHal.h"
+#include "aqHalInt.h"
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/arch/Unified/hal/kernel/Makefile.linux
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/arch/Unified/hal/kernel/Makefile.linux
@@ -0,0 +1,55 @@
+##############################################################################
+#  
+#    Copyright (C) 2002 - 2008 by Vivante Corp.
+#  
+#    This program is free software; you can redistribute it and/or modify
+#    it under the terms of the GNU General Public Lisence as published by
+#    the Free Software Foundation; either version 2 of the license, or
+#    (at your option) any later version.
+#  
+#    This program is distributed in the hope that it will be useful,
+#    but WITHOUT ANY WARRANTY; without even the implied warranty of
+#    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+#    GNU General Public Lisence for more details.
+#  
+#    You should have received a copy of the GNU General Public License
+#    along with this program; if not write to the Free Software
+#    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+#  
+##############################################################################
+
+
+
+#
+# Linux build file for architecture dependent kernel HAL layer.
+#
+#
+
+
+################################################################################
+# Include common definitions.
+
+include $(AQROOT)/Makefile.linux.def
+
+################################################################################
+# Define a shortcut for the main target.
+
+STATIC = 1
+TARGET_NAME = libhalarchkernel.a
+
+################################################################################
+# Supply additional include directories.
+
+INCLUDE += -I$(AQROOT)/hal/inc
+INCLUDE += -I$(AQROOT)/hal/kernel
+INCLUDE += -I$(AQARCH)/hal/kernel
+INCLUDE += -I$(AQARCH)/cmodel/inc
+
+CFLAGS += $(INCLUDE) -Werror
+
+################################################################################
+# Describe object files.
+
+OBJECTS = $(OBJ_DIR)/Hardware.o
+
+include $(AQROOT)/common.target
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/arch/Unified/hal/kernel/GNUmakefile
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/arch/Unified/hal/kernel/GNUmakefile
@@ -0,0 +1,70 @@
+##############################################################################
+#  
+#    Copyright (C) 2002 - 2008 by Vivante Corp.
+#  
+#    This program is free software; you can redistribute it and/or modify
+#    it under the terms of the GNU General Public Lisence as published by
+#    the Free Software Foundation; either version 2 of the license, or
+#    (at your option) any later version.
+#  
+#    This program is distributed in the hope that it will be useful,
+#    but WITHOUT ANY WARRANTY; without even the implied warranty of
+#    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+#    GNU General Public Lisence for more details.
+#  
+#    You should have received a copy of the GNU General Public License
+#    along with this program; if not write to the Free Software
+#    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+#  
+##############################################################################
+
+
+
+#
+# This file is a part of Vivante software stack build environment for Linux.
+# It defines the rules necessary to build architecture dependent part
+# of the kernel HAL driver.
+#
+
+
+################################################################################
+# Include common definitions.
+
+include $(AQROOT)/GNUmakefile.common
+
+
+################################################################################
+# Define a shortcut for the main target.
+
+TARGET_OUTPUT = $(OBJ_DIR)/libHALArchKernel.a
+
+
+################################################################################
+# Include common targets.
+
+include $(AQROOT)/GNUmakefile.source
+
+
+################################################################################
+# Supply additional include directories.
+
+INCLUDE += -I$(AQROOT)/hal/inc
+INCLUDE += -I$(AQROOT)/hal/kernel
+INCLUDE += -I$(AQARCH)/hal/kernel
+INCLUDE += -I$(AQARCH)/cmodel/inc
+
+CFLAGS += $(INCLUDE)
+
+
+################################################################################
+# Describe object files.
+
+OBJECTS = $(OBJ_DIR)/Hardware.o
+
+
+################################################################################
+# Describe dependencies.
+
+$(TARGET_OUTPUT): $(OBJ_DIR) $(PRE_COMPILED) $(OBJECTS)
+	$(AR) -r $(TARGET_OUTPUT) $(OBJECTS)
+	$(RANLIB) $(TARGET_OUTPUT)
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/arch/Unified/hal/kernel/Hardware.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/arch/Unified/hal/kernel/Hardware.c
@@ -0,0 +1,3303 @@
+/****************************************************************************
+*
+*    Copyright (C) 2002 - 2008 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public Lisence as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+
+
+#include "PreComp.h"
+#include "aqHalUser.h"
+#ifdef LINUX
+#include <linux/init.h>
+#include <linux/module.h>
+#endif
+
+/******************************************************************************\
+********************************* Support Code *********************************
+\******************************************************************************/
+
+static gceSTATUS
+_IdentifyHardware(
+	IN gcoOS Os,
+	OUT gceCHIPMODEL * ChipModel,
+	OUT gctUINT32_PTR ChipRevision,
+	OUT gctUINT32_PTR ChipFeatures,
+	OUT gctUINT32_PTR ChipMinorFeatures0,
+	OUT gctUINT32_PTR ChipMinorFeatures1
+	)
+{
+	gceSTATUS status;
+	gctUINT32 chipIdentity;
+
+	do
+	{
+		/* Read chip identity register. */
+		gcmERR_BREAK(gcoOS_ReadRegister(Os, 0x00018, &chipIdentity));
+
+		/* Special case for older graphic cores. */
+		if (((((gctUINT32) (chipIdentity)) >> (0 ? 31:24) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1)))))) == (0x01 & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))))
+		{
+			*ChipModel    = gcv500;
+			*ChipRevision = ( ((((gctUINT32) (chipIdentity)) >> (0 ? 15:12)) & ((gctUINT32) ((((1 ? 15:12) - (0 ? 15:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:12) - (0 ? 15:12) + 1)))))) );
+		}
+
+		else
+		{
+
+			/* Read chip identity register. */
+			gcmERR_BREAK(gcoOS_ReadRegister(Os,
+											0x00020,
+											(gctUINT32 *) ChipModel));
+
+			/* !!!! HACK ALERT !!!! */
+			/* Because people change device IDs without letting software know
+			** about it - here is the hack to make it all look the same.  Only
+			** for GC400 family.  Next time - TELL ME!!! */
+			if ((*ChipModel & 0xFF00) == 0x0400)
+			{
+				*ChipModel &= 0x0400;
+			}
+
+
+
+
+
+			/* Read CHIP_REV register. */
+			gcmERR_BREAK(gcoOS_ReadRegister(Os,
+											0x00024,
+											ChipRevision));
+
+			if ((*ChipModel == gcv300)
+			&&  (*ChipRevision == 0x2201)
+			)
+			{
+				gctUINT32 date, time;
+
+				/* Read date and time registers. */
+				gcmERR_BREAK(
+					gcoOS_ReadRegister(Os, 0x00028, &date));
+
+				gcmERR_BREAK(
+					gcoOS_ReadRegister(Os, 0x0002C, &time));
+
+				if ((date == 0x20080814) && (time == 0x12051100))
+				{
+					/* This IP has an ECO; put the correct revision in it. */
+					*ChipRevision = 0x1051;
+				}
+			}
+
+
+
+		}
+
+		/* Read chip feature register. */
+		gcmERR_BREAK(
+			gcoOS_ReadRegister(Os, 0x0001C, ChipFeatures));
+
+		/* Disable fast clear on GC700. */
+		if (*ChipModel == gcv700)
+		{
+			*ChipFeatures = ((((gctUINT32) (*ChipFeatures)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)));
+		}
+
+		if (((*ChipModel == gcv500) && (*ChipRevision < 2))
+		||  ((*ChipModel == gcv300) && (*ChipRevision < 0x2000))
+		)
+		{
+			/* GC500 rev 1.x and GC300 rev < 2.0 doesn't have these registers. */
+			*ChipMinorFeatures0 = 0;
+			*ChipMinorFeatures1 = 0;
+		}
+		else
+		{
+			/* Read chip minor feature register #0. */
+			gcmERR_BREAK(
+				gcoOS_ReadRegister(Os,
+								   0x00034,
+								   ChipMinorFeatures0));
+
+
+			if (((((gctUINT32) (*ChipMinorFeatures0)) >> (0 ? 21:21) & ((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1)))))))
+			)
+			{
+				/* Read chip minor feature register #1. */
+				gcmERR_BREAK(
+					gcoOS_ReadRegister(Os,
+									   0x00074,
+									   ChipMinorFeatures1));
+			}
+			else
+
+			{
+				*ChipMinorFeatures1 = 0;
+			}
+		}
+
+
+#if MRVL_TAVOR_PV2_DISABLE_YFLIP
+		if( (*ChipModel == 0x530) && (*ChipRevision == 4) )
+		{
+			*ChipMinorFeatures = *ChipMinorFeatures & ~0x00000001;				
+		}
+
+		if( (*ChipModel == 0x800) && (*ChipRevision == 0x4301) )
+		{
+			*ChipMinorFeatures = *ChipMinorFeatures & ~0x00000001;
+		}
+#endif 
+
+
+#if MRVL_DISABLE_FASTCLEAR
+		*ChipFeatures = *ChipFeatures &  ~0x00000001;	
+#endif 
+
+
+		gcmTRACE(gcvLEVEL_VERBOSE,
+				 "ChipModel=0x%08X\n"
+				 "ChipRevision=0x%08X\n"
+				 "ChipFeatures=0x%08X\n"
+				 "ChipMinorFeatures0=0x%08X\n"
+				 "ChipMinorFeatures1=0x%08X\n",
+				 *ChipModel,
+				 *ChipRevision,
+				 *ChipFeatures,
+				 *ChipMinorFeatures0,
+				 *ChipMinorFeatures1);
+
+		/* Success. */
+		return gcvSTATUS_OK;
+	}
+	while (gcvFALSE);
+
+	/* Return the status. */
+	return status;
+}
+
+static gceSTATUS
+_GetChipSpecs(
+	IN gcoHARDWARE Hardware
+	)
+{
+	gctUINT32 streamCount            = 0;
+	gctUINT32 registerMax            = 0;
+	gctUINT32 threadCount            = 0;
+	gctUINT32 shaderCoreCount        = 0;
+	gctUINT32 vertexCacheSize        = 0;
+	gctUINT32 vertexOutputBufferSize = 0;
+
+
+	if (((((gctUINT32) (Hardware->chipMinorFeatures0)) >> (0 ? 21:21) & ((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1))))))))
+	{
+		gctUINT32 specs;
+		gceSTATUS status;
+
+		/* Read gcChipSpecs register. */
+		gcmERR_RETURN(
+			gcoOS_ReadRegister(Hardware->os, 0x00048, &specs));
+
+		/* Handy macro to improve reading. */
+#define gcmSPEC_FIELD(field) \
+		( ((((gctUINT32) (specs)) >> (0 ? GC_CHIP_SPECS_field)) & ((gctUINT32) ((((1 ? GC_CHIP_SPECS_field) - (0 ? GC_CHIP_SPECS_field) + 1) == 32) ? ~0 : (~(~0 << ((1 ? GC_CHIP_SPECS_field) - (0 ? GC_CHIP_SPECS_field) + 1)))))) )
+
+		/* Extract the fields. */
+		streamCount            = ( ((((gctUINT32) (specs)) >> (0 ? 3:0)) & ((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1)))))) );
+		registerMax            = ( ((((gctUINT32) (specs)) >> (0 ? 7:4)) & ((gctUINT32) ((((1 ? 7:4) - (0 ? 7:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:4) - (0 ? 7:4) + 1)))))) );
+		threadCount            = ( ((((gctUINT32) (specs)) >> (0 ? 11:8)) & ((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1)))))) );
+		shaderCoreCount        = ( ((((gctUINT32) (specs)) >> (0 ? 24:20)) & ((gctUINT32) ((((1 ? 24:20) - (0 ? 24:20) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 24:20) - (0 ? 24:20) + 1)))))) );
+		vertexCacheSize        = ( ((((gctUINT32) (specs)) >> (0 ? 16:12)) & ((gctUINT32) ((((1 ? 16:12) - (0 ? 16:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:12) - (0 ? 16:12) + 1)))))) );
+		vertexOutputBufferSize = ( ((((gctUINT32) (specs)) >> (0 ? 31:28)) & ((gctUINT32) ((((1 ? 31:28) - (0 ? 31:28) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:28) - (0 ? 31:28) + 1)))))) );
+	}
+
+
+	/* Get the stream count. */
+	Hardware->streamCount = (streamCount != 0)
+						  ? streamCount
+						  : (Hardware->chipModel >= gcv1000) ? 4 : 1;
+	gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
+				  "Specs: streamCount=%u%s\n",
+				  Hardware->streamCount,
+				  (streamCount == 0) ? " (default)" : "");
+
+	/* Get the vertex output buffer size. */
+	Hardware->vertexOutputBufferSize = (vertexOutputBufferSize != 0)
+									 ? 1 << vertexOutputBufferSize
+									 : (Hardware->chipModel == gcv400)
+									   ? (Hardware->chipRevision < 0x4000) ? 512
+									   : (Hardware->chipRevision < 0x4200) ? 256
+									   : 128
+								     : (Hardware->chipModel == gcv530)
+								       ? (Hardware->chipRevision < 0x4200) ? 512
+									   : 128
+								     : 512;
+	gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
+				  "Specs: vertexOutputBufferSize=%u%s\n",
+				  Hardware->vertexOutputBufferSize,
+				  (vertexOutputBufferSize == 0) ? " (default)" : "");
+
+	/* Get the maximum number of threads. */
+	Hardware->threadCount = (threadCount != 0)
+						  ? 1 << threadCount
+						  : (Hardware->chipModel == gcv400) ? 64
+						  : (Hardware->chipModel == gcv500) ? 128
+						  : (Hardware->chipModel == gcv530) ? 128
+						  : 256;
+	gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
+				  "Specs: threadCount=%u%s\n",
+				  Hardware->threadCount,
+				  (threadCount == 0) ? " (default)" : "");
+
+	/* Get the number of shader cores. */
+	Hardware->shaderCoreCount = (shaderCoreCount != 0)
+							  ? shaderCoreCount
+							  : (Hardware->chipModel >= gcv1000) ? 2
+							  : 1;
+	gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
+				  "Specs: shaderCoreCount=%u%s\n",
+				  Hardware->shaderCoreCount,
+				  (shaderCoreCount == 0) ? " (default)" : "");
+
+	/* Get the vertex cache size. */
+	Hardware->vertexCacheSize = (vertexCacheSize != 0)
+							  ? vertexCacheSize
+							  : 8;
+	gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
+				  "Specs: vertexCacheSize=%u%s\n",
+				  Hardware->vertexCacheSize,
+				  (vertexCacheSize == 0) ? " (default)" : "");
+
+	/* Get the maximum number of temporary registers. */
+	Hardware->registerMax = (registerMax != 0)
+						  ? 1 << registerMax
+						  : (Hardware->chipModel == gcv400) ? 32
+						  : 64;
+	gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
+				  "Specs: registerMax=%u%s\n",
+				  Hardware->registerMax,
+				  (registerMax == 0) ? " (default)" : "");
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+/******************************************************************************\
+****************************** gcoHARDWARE API code *****************************
+\******************************************************************************/
+
+/*******************************************************************************
+**
+**  gcoHARDWARE_Construct
+**
+**  Construct a new gcoHARDWARE object.
+**
+**  INPUT:
+**
+**      gcoOS Os
+**          Pointer to an initialized gcoOS object.
+**
+**  OUTPUT:
+**
+**      gcoHARDWARE * Hardware
+**          Pointer to a variable that will hold the pointer to the gcoHARDWARE
+**          object.
+*/
+gceSTATUS
+gcoHARDWARE_Construct(
+	IN gcoOS Os,
+	OUT gcoHARDWARE * Hardware
+	)
+{
+	gcoHARDWARE hardware = gcvNULL;
+	gceSTATUS status;
+	gceCHIPMODEL chipModel;
+	gctUINT32 chipRevision;
+	gctUINT32 chipFeatures;
+	gctUINT32 chipMinorFeatures0;
+	gctUINT32 chipMinorFeatures1;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Os, gcvOBJ_OS);
+	gcmVERIFY_ARGUMENT(Hardware != gcvNULL);
+
+	/* Identify the hardware. */
+	gcmONERROR(
+		_IdentifyHardware(Os,
+						  &chipModel,
+						  &chipRevision,
+						  &chipFeatures,
+						  &chipMinorFeatures0,
+						  &chipMinorFeatures1));
+
+	/* Allocate the gcoHARDWARE object. */
+	gcmONERROR(
+		gcoOS_Allocate(Os,
+					   gcmSIZEOF(struct _gcoHARDWARE),
+					   (gctPOINTER *) &hardware));
+
+	/* Initialize the gcoHARDWARE object. */
+	hardware->object.type = gcvOBJ_HARDWARE;
+	hardware->os          = Os;
+
+	/* Reset last read interrupt status register. */
+#if !USE_EVENT_QUEUE
+	hardware->data = 0;
+#endif
+
+	/* Set chip identity. */
+	hardware->chipModel         = chipModel;
+	hardware->chipRevision      = chipRevision;
+	hardware->chipFeatures      = chipFeatures;
+	hardware->chipMinorFeatures0 = chipMinorFeatures0;
+	hardware->chipMinorFeatures1 = chipMinorFeatures1;
+	hardware->powerBaseAddress  = (  (chipModel == gcv300)
+								  && (chipRevision < 0x2000)
+								  ) ? 0x100 : 0x00;
+
+	/* Get chip specs. */
+	gcmONERROR(
+		_GetChipSpecs(hardware));
+
+	/* Determine whether bug fixes #1 are present. */
+
+	hardware->extraEventStates = ((((gctUINT32) (chipMinorFeatures1)) >> (0 ? 3:3) & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1)))))) == (0x0 & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1)))))));
+
+
+
+
+	/* Determine whether extra dummy states are needed after each event. */
+
+	/* Initialize the fast clear. */
+	gcmONERROR(
+		gcoHARDWARE_SetFastClear(hardware, -1, -1));
+
+	/* Set power state to ON. */
+	hardware->chipPowerState = gcvPOWER_ON;
+
+	/* Return pointer to the gcoHARDWARE object. */
+	*Hardware = hardware;
+
+	/* Success. */
+	return gcvSTATUS_OK;
+
+OnError:
+	/* Destroy gcoHARDWARE structure if it was allocated. */
+	if (hardware != gcvNULL)
+	{
+		gcmVERIFY_OK(
+			gcoOS_Free(Os, hardware));
+	}
+
+	/* Return the status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**  gcoHARDWARE_Destroy
+**
+**  Destroy an gcoHARDWARE object.
+**
+**  INPUT:
+**
+**      gcoHARDWARE Hardware
+**          Pointer to the gcoHARDWARE object that needs to be destroyed.
+**
+**  OUTPUT:
+**
+**      Nothing.
+*/
+gceSTATUS
+gcoHARDWARE_Destroy(
+    IN gcoHARDWARE Hardware
+    )
+{
+    /* Verify the arguments. */
+    gcmVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+
+    /* Mark the object as unknown. */
+	Hardware->object.type = gcvOBJ_UNKNOWN;
+
+    /* Free the object. */
+	return gcoOS_Free(Hardware->os, Hardware);
+}
+
+/*******************************************************************************
+**
+**  gcoHARDWARE_InitializeHardware
+**
+**  Initialize the hardware.
+**
+**  INPUT:
+**
+**      gcoHARDWARE Hardware
+**          Pointer to the gcoHARDWARE object.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS
+gcoHARDWARE_InitializeHardware(
+    IN gcoHARDWARE Hardware
+	)
+{
+	gceSTATUS status;
+	gctUINT32 baseAddress;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+
+
+	/* Disable isolate GPU bit. */
+	gcmONERROR(
+		gcoOS_WriteRegister(Hardware->os,
+							0x00000,
+							((((gctUINT32) (0x00000100)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:19) - (0 ? 19:19) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:19) - (0 ? 19:19) + 1))))))) << (0 ? 19:19))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 19:19) - (0 ? 19:19) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:19) - (0 ? 19:19) + 1))))))) << (0 ? 19:19)))));
+
+
+
+	/* Reset memory counters. */
+	gcmONERROR(
+		gcoOS_WriteRegister(Hardware->os,
+							0x0003C,
+							~0));
+	gcmONERROR(
+		gcoOS_WriteRegister(Hardware->os,
+							0x0003C,
+							0));
+
+
+	/* Get the system's physical base address. */
+	gcmONERROR(
+		gcoOS_GetBaseAddress(Hardware->os, &baseAddress));
+
+	/* Program the base addesses. */
+	gcmONERROR(
+		gcoOS_WriteRegister(Hardware->os,
+							0x0041C,
+							baseAddress));
+
+	gcmONERROR(
+		gcoOS_WriteRegister(Hardware->os,
+							0x00418,
+							baseAddress));
+
+	gcmONERROR(
+		gcoOS_WriteRegister(Hardware->os,
+							0x00420,
+							baseAddress));
+
+	gcmONERROR(
+		gcoOS_WriteRegister(Hardware->os,
+							0x00428,
+							baseAddress));
+
+	gcmONERROR(
+		gcoOS_WriteRegister(Hardware->os,
+							0x00424,
+							baseAddress));
+
+#if !VIVANTE_PROFILER
+    {
+		gctUINT32 data;
+
+		gcmONERROR(
+			gcoOS_ReadRegister(Hardware->os,
+							   Hardware->powerBaseAddress +
+							   0x00100,
+							   &data));
+
+	/* Enable clock gating. */
+		data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)));
+
+		if ((Hardware->chipRevision == 0x4301)
+		||  (Hardware->chipRevision == 0x4302)
+		)
+		{
+			/* Disable stall module level clock gating for 4.3.0.1 and 4.3.0.2
+			** revisions. */
+			data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1)));
+		}
+
+	    gcmONERROR(
+		    gcoOS_WriteRegister(Hardware->os,
+							Hardware->powerBaseAddress +
+							0x00100,
+							data));
+	    gcmONERROR(
+		    gcoOS_Delay(Hardware->os, 1));
+    }
+		
+#endif
+
+	/* Test if MMU is initialized. */
+	if ((Hardware->kernel != gcvNULL)
+	&&  (Hardware->kernel->mmu != gcvNULL)
+	)
+	{
+		/* Reset MMU. */
+		gcmONERROR(
+			gcoHARDWARE_SetMMU(Hardware,
+							   Hardware->kernel->mmu->pageTableLogical));
+	}
+
+	/* Success. */
+    return gcvSTATUS_OK;
+
+OnError:
+	gcmTRACE(gcvLEVEL_ERROR,
+			 "ERROR: gcoHARDWARE_InitializeHardware has status %d.",
+			 status);
+
+	/* Return the error. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**  gcoHARDWARE_QueryMemory
+**
+**  Query the amount of memory available on the hardware.
+**
+**  INPUT:
+**
+**      gcoHARDWARE Hardware
+**          Pointer to the gcoHARDWARE object.
+**
+**  OUTPUT:
+**
+**      gctSIZE_T * InternalSize
+**          Pointer to a variable that will hold the size of the internal video
+**          memory in bytes.  If 'InternalSize' is gcvNULL, no information of the
+**          internal memory will be returned.
+**
+**      gctUINT32 * InternalBaseAddress
+**          Pointer to a variable that will hold the hardware's base address for
+**          the internal video memory.  This pointer cannot be gcvNULL if
+**          'InternalSize' is also non-gcvNULL.
+**
+**      gctUINT32 * InternalAlignment
+**          Pointer to a variable that will hold the hardware's base address for
+**          the internal video memory.  This pointer cannot be gcvNULL if
+**          'InternalSize' is also non-gcvNULL.
+**
+**      gctSIZE_T * ExternalSize
+**          Pointer to a variable that will hold the size of the external video
+**          memory in bytes.  If 'ExternalSize' is gcvNULL, no information of the
+**          external memory will be returned.
+**
+**      gctUINT32 * ExternalBaseAddress
+**          Pointer to a variable that will hold the hardware's base address for
+**          the external video memory.  This pointer cannot be gcvNULL if
+**          'ExternalSize' is also non-gcvNULL.
+**
+**      gctUINT32 * ExternalAlignment
+**          Pointer to a variable that will hold the hardware's base address for
+**          the external video memory.  This pointer cannot be gcvNULL if
+**          'ExternalSize' is also non-gcvNULL.
+**
+**      gctUINT32 * HorizontalTileSize
+**          Number of horizontal pixels per tile.  If 'HorizontalTileSize' is
+**          gcvNULL, no horizontal pixel per tile will be returned.
+**
+**      gctUINT32 * VerticalTileSize
+**          Number of vertical pixels per tile.  If 'VerticalTileSize' is
+**          gcvNULL, no vertical pixel per tile will be returned.
+*/
+gceSTATUS
+gcoHARDWARE_QueryMemory(
+    IN gcoHARDWARE Hardware,
+    OUT gctSIZE_T * InternalSize,
+    OUT gctUINT32 * InternalBaseAddress,
+    OUT gctUINT32 * InternalAlignment,
+    OUT gctSIZE_T * ExternalSize,
+    OUT gctUINT32 * ExternalBaseAddress,
+    OUT gctUINT32 * ExternalAlignment,
+    OUT gctUINT32 * HorizontalTileSize,
+    OUT gctUINT32 * VerticalTileSize
+    )
+{
+    /* Verify the arguments. */
+    gcmVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+
+    if (InternalSize != gcvNULL)
+    {
+        /* No internal memory. */
+        *InternalSize = 0;
+    }
+
+    if (ExternalSize != gcvNULL)
+    {
+        /* No external memory. */
+        *ExternalSize = 0;
+    }
+
+    if (HorizontalTileSize != gcvNULL)
+    {
+		/* 4x4 tiles. */
+        *HorizontalTileSize = 4;
+    }
+
+    if (VerticalTileSize != gcvNULL)
+    {
+		/* 4x4 tiles. */
+        *VerticalTileSize = 4;
+    }
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**  gcoHARDWARE_QueryChipIdentity
+**
+**  Query the identity of the hardware.
+**
+**  INPUT:
+**
+**      gcoHARDWARE Hardware
+**          Pointer to the gcoHARDWARE object.
+**
+**  OUTPUT:
+**
+**      gceCHIPMODEL * ChipModel
+**          If 'ChipModel' is not gcvNULL, the variable it points to will
+**			receive the model of the chip.
+**
+**      gctUINT32 * ChipRevision
+**          If 'ChipRevision' is not gcvNULL, the variable it points to will
+**			receive the revision of the chip.
+**
+**      gctUINT32 * ChipFeatures
+**          If 'ChipFeatures' is not gcvNULL, the variable it points to will
+**			receive the feature set of the chip.
+**
+**      gctUINT32 * ChipMinorFeatures
+**          If 'ChipMinorFeatures' is not gcvNULL, the variable it points to
+**			will receive the minor feature set of the chip.
+**
+*/
+gceSTATUS
+gcoHARDWARE_QueryChipIdentity(
+    IN gcoHARDWARE Hardware,
+    OUT gceCHIPMODEL * ChipModel,
+    OUT gctUINT32 * ChipRevision,
+	OUT gctUINT32* ChipFeatures,
+	OUT gctUINT32* ChipMinorFeatures
+    )
+{
+    /* Verify the arguments. */
+    gcmVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+
+    /* Return chip model. */
+    if (ChipModel != gcvNULL)
+    {
+    	*ChipModel = Hardware->chipModel;
+    }
+
+    /* Return revision number. */
+    if (ChipRevision != gcvNULL)
+    {
+		*ChipRevision = Hardware->chipRevision;
+    }
+
+    /* Return feature set. */
+    if (ChipFeatures != gcvNULL)
+    {
+    	gctUINT32 features = Hardware->chipFeatures;
+
+		if (( ((((gctUINT32) (features)) >> (0 ? 0:0)) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1)))))) ))
+		{
+			features = ((((gctUINT32) (features)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (Hardware->allowFastClear) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)));
+   		}
+
+
+		if (( ((((gctUINT32) (features)) >> (0 ? 5:5)) & ((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1)))))) ))
+		{
+			features = ((((gctUINT32) (features)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1))))))) << (0 ? 5:5))) | (((gctUINT32) ((gctUINT32) (Hardware->allowCompression) & ((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1))))))) << (0 ? 5:5)));
+		}
+
+
+
+		/* Mark 2D pipe as available for GC500.0 through GC500.2 and GC300,
+		** since they did not have this bit. */
+		if ((  (Hardware->chipModel == gcv500)
+			&& (Hardware->chipRevision <= 2)
+			)
+		|| (Hardware->chipModel == gcv300)
+		)
+		{
+			features = ((((gctUINT32) (features)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9)));
+		}
+
+
+   		*ChipFeatures = features;
+    }
+
+    /* Return minor feature set. */
+    if (ChipMinorFeatures != gcvNULL)
+    {
+		*ChipMinorFeatures = Hardware->chipMinorFeatures0;
+	}
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+gceSTATUS
+gcoHARDWARE_QueryChipSpecs(
+	IN gcoHARDWARE Hardware,
+	OUT gctUINT32_PTR StreamCount,
+	OUT gctUINT32_PTR RegisterMax,
+	OUT gctUINT32_PTR ThreadCount,
+	OUT gctUINT32_PTR ShaderCoreCount,
+	OUT gctUINT32_PTR VertexCacheSize,
+	OUT gctUINT32_PTR VertexOutputBufferSize
+	)
+{
+	/* Verify the arguments. */
+    gcmVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+
+	/* Return the number of streams. */
+	if (StreamCount != gcvNULL)
+	{
+		*StreamCount = Hardware->streamCount;
+	}
+
+	/* Return the number of temporary registers. */
+	if (RegisterMax != gcvNULL)
+	{
+		*RegisterMax = Hardware->registerMax;
+	}
+
+	/* Return the maximum number of thrteads. */
+	if (ThreadCount != gcvNULL)
+	{
+		*ThreadCount = Hardware->threadCount;
+	}
+
+	/* Return the number of shader cores. */
+	if (ShaderCoreCount != gcvNULL)
+	{
+		*ShaderCoreCount = Hardware->shaderCoreCount;
+	}
+
+	/* Return the number of entries in the vertex cache. */
+	if (VertexCacheSize != gcvNULL)
+	{
+		*VertexCacheSize = Hardware->vertexCacheSize;
+	}
+
+	/* Return the number of entries in the vertex output buffer. */
+	if (VertexOutputBufferSize != gcvNULL)
+	{
+		*VertexOutputBufferSize = Hardware->vertexOutputBufferSize;
+	}
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**  gcoHARDWARE_ConvertFormat
+**
+**  Convert an API format to hardware parameters.
+**
+**  INPUT:
+**
+**      gcoHARDWARE Hardware
+**          Pointer to the gcoHARDWARE object.
+**
+**      gceSURF_FORMAT Format
+**          API format to convert.
+**
+**  OUTPUT:
+**
+**      gctUINT32 * BitsPerPixel
+**          Pointer to a variable that will hold the number of bits per pixel.
+**
+**      gctUINT32 * BytesPerTile
+**          Pointer to a variable that will hold the number of bytes per tile.
+*/
+gceSTATUS
+gcoHARDWARE_ConvertFormat(
+    IN gcoHARDWARE Hardware,
+    IN gceSURF_FORMAT Format,
+    OUT gctUINT32 * BitsPerPixel,
+    OUT gctUINT32 * BytesPerTile
+    )
+{
+	gctUINT32 bitsPerPixel;
+	gctUINT32 bytesPerTile;
+
+    /* Verify the arguments. */
+    gcmVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+
+	/* Dispatch on format. */
+	switch (Format)
+	{
+	case gcvSURF_INDEX8:
+	case gcvSURF_A8:
+	case gcvSURF_L8:
+		/* 8-bpp format. */
+		bitsPerPixel  = 8;
+		bytesPerTile  = (8 * 4 * 4) / 8;
+		break;
+
+	case gcvSURF_YV12:
+	case gcvSURF_I420:
+	case gcvSURF_NV12:
+	case gcvSURF_NV21:
+		/* 12-bpp planar YUV formats. */
+		bitsPerPixel  = 12;
+		bytesPerTile  = (12 * 4 * 4) / 8;
+		break;
+
+	case gcvSURF_A8L8:
+	case gcvSURF_X4R4G4B4:
+	case gcvSURF_A4R4G4B4:
+	case gcvSURF_X1R5G5B5:
+	case gcvSURF_A1R5G5B5:
+	case gcvSURF_R5G5B5X1:
+	case gcvSURF_R4G4B4X4:
+	case gcvSURF_X4B4G4R4:
+	case gcvSURF_X1B5G5R5:
+	case gcvSURF_B4G4R4X4:
+	case gcvSURF_R5G6B5:
+	case gcvSURF_B5G5R5X1:
+	case gcvSURF_YUY2:
+	case gcvSURF_UYVY:
+	case gcvSURF_YVYU:
+	case gcvSURF_VYUY:
+	case gcvSURF_NV16:
+	case gcvSURF_NV61:
+	case gcvSURF_D16:
+		/* 16-bpp format. */
+		bitsPerPixel  = 16;
+		bytesPerTile  = (16 * 4 * 4) / 8;
+		break;
+
+	case gcvSURF_X8R8G8B8:
+	case gcvSURF_A8R8G8B8:
+	case gcvSURF_X8B8G8R8:
+	case gcvSURF_A8B8G8R8:
+	case gcvSURF_R8G8B8X8:
+	case gcvSURF_D32:
+		/* 32-bpp format. */
+		bitsPerPixel  = 32;
+		bytesPerTile  = (32 * 4 * 4) / 8;
+		break;
+
+	case gcvSURF_D24S8:
+	case gcvSURF_D24X8:
+		/* 24-bpp format. */
+		bitsPerPixel  = 32;
+		bytesPerTile  = (32 * 4 * 4) / 8;
+		break;
+
+	case gcvSURF_DXT1:
+	case gcvSURF_ETC1:
+		bitsPerPixel  = 4;
+		bytesPerTile  = (4 * 4 * 4) / 8;
+		break;
+
+	case gcvSURF_DXT2:
+	case gcvSURF_DXT3:
+	case gcvSURF_DXT4:
+	case gcvSURF_DXT5:
+		bitsPerPixel  = 8;
+		bytesPerTile  = (8 * 4 * 4) / 8;
+		break;
+
+	default:
+		/* Invalid format. */
+		return gcvSTATUS_INVALID_ARGUMENT;
+	}
+
+	/* Set the result. */
+	if (BitsPerPixel != gcvNULL)
+	{
+		* BitsPerPixel = bitsPerPixel;
+	}
+
+	if (BytesPerTile != gcvNULL)
+	{
+		* BytesPerTile = bytesPerTile;
+	}
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**  gcoHARDWARE_SplitMemory
+**
+**  Split a hardware specific memory address into a pool and offset.
+**
+**  INPUT:
+**
+**      gcoHARDWARE Hardware
+**          Pointer to the gcoHARDWARE object.
+**
+**      gctUINT32 Address
+**          Address in hardware specific format.
+**
+**  OUTPUT:
+**
+**      gcePOOL * Pool
+**          Pointer to a variable that will hold the pool type for the address.
+**
+**      gctUINT32 * Offset
+**          Pointer to a variable that will hold the offset for the address.
+*/
+gceSTATUS
+gcoHARDWARE_SplitMemory(
+    IN gcoHARDWARE Hardware,
+    IN gctUINT32 Address,
+    OUT gcePOOL * Pool,
+    OUT gctUINT32 * Offset
+    )
+{
+    /* Verify the arguments. */
+    gcmVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+    gcmVERIFY_ARGUMENT(Pool != gcvNULL);
+    gcmVERIFY_ARGUMENT(Offset != gcvNULL);
+
+    /* Dispatch on memory type. */
+    switch (( ((((gctUINT32) (Address)) >> (0 ? 31:31)) & ((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1)))))) ))
+    {
+    case 0x0:
+        /* System memory. */
+        *Pool = gcvPOOL_SYSTEM;
+        break;
+
+    case 0x1:
+        /* Virtual memory. */
+        *Pool = gcvPOOL_VIRTUAL;
+        break;
+
+    default:
+        /* Invalid memory type. */
+        return gcvSTATUS_INVALID_ARGUMENT;
+    }
+
+    /* Return offset of address. */
+    *Offset = ( ((((gctUINT32) (Address)) >> (0 ? 30:0)) & ((gctUINT32) ((((1 ? 30:0) - (0 ? 30:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 30:0) - (0 ? 30:0) + 1)))))) );
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**  gcoHARDWARE_Execute
+**
+**  Kickstart the hardware's command processor with an initialized command
+**  buffer.
+**
+**  INPUT:
+**
+**      gcoHARDWARE Hardware
+**          Pointer to the gcoHARDWARE object.
+**
+**      gctPOINTER Logical
+**          Logical address of command buffer.
+**
+**      gctSIZE_T Bytes
+**          Number of bytes for the prefetch unit (until after the first LINK).
+**
+**  OUTPUT:
+**
+**      Nothing.
+*/
+gceSTATUS
+gcoHARDWARE_Execute(
+    IN gcoHARDWARE Hardware,
+    IN gctPOINTER Logical,
+    IN gctSIZE_T Bytes
+    )
+{
+    gceSTATUS status;
+    gctUINT32 address = 0, control;
+
+    /* Verify the arguments. */
+    gcmVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+    gcmVERIFY_ARGUMENT(Logical != gcvNULL);
+
+	do
+	{
+	    /* Convert logical into hardware specific address. */
+		gcmERR_BREAK(gcoHARDWARE_ConvertLogical(Hardware, Logical, &address));
+
+	   	/* Enable all events. */
+   		gcmERR_BREAK(gcoOS_WriteRegister(Hardware->os,
+										 0x00014,
+										 ~0));
+
+	    /* Write address register. */
+		gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
+					  "Writing 0x%08X to AQ_CMD_BUFFER_ADDR\n", address);
+
+		gcmERR_BREAK(gcoOS_WriteRegister(Hardware->os,
+										 0x00654,
+										 address));
+
+        /* Build control register. */
+        control = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1))))))) << (0 ? 16:16))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1))))))) << (0 ? 16:16)))
+                | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) ((Bytes+7)>>3) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
+
+        /* Write control register. */
+		gcmERR_BREAK(gcoOS_WriteRegister(Hardware->os,
+										 0x00658,
+										 control));
+
+		/* Success. */
+		return gcvSTATUS_OK;
+    }
+	while (gcvFALSE);
+
+    /* Return the status. */
+    return status;
+}
+
+/*******************************************************************************
+**
+**  gcoHARDWARE_WaitLink
+**
+**  Append a WAIT/LINK command sequence at the specified location in the command
+**  queue.
+**
+**  INPUT:
+**
+**      gcoHARDWARE Hardware
+**          Pointer to an gcoHARDWARE object.
+**
+**      gctPOINTER Logical
+**          Pointer to the current location inside the command queue to append
+**          WAIT/LINK command sequence at or gcvNULL just to query the size of the
+**          WAIT/LINK command sequence.
+**
+**		gctUINT32 Offset
+**			Offset into command buffer required for alignment.
+**
+**      gctSIZE_T * Bytes
+**          Pointer to the number of bytes available for the WAIT/LINK command
+**          sequence.  If 'Logical' is gcvNULL, this argument will be ignored.
+**
+**  OUTPUT:
+**
+**      gctSIZE_T * Bytes
+**          Pointer to a variable that will receive the number of bytes required
+**          by the WAIT/LINK command sequence.  If 'Bytes' is gcvNULL, nothing will
+**          be returned.
+**
+**      gctPOINTER * Wait
+**          Pointer to a variable that will receive the pointer to the WAIT
+**          command.  If 'Wait' is gcvNULL nothing will be returned.
+**
+**      gctSIZE_T * WaitSize
+**          Pointer to a variable that will receive the number of bytes used by
+**          the WAIT command.  If 'LinkSize' is gcvNULL nothing will be returned.
+*/
+gceSTATUS
+gcoHARDWARE_WaitLink(
+    IN gcoHARDWARE Hardware,
+    IN gctPOINTER Logical,
+	IN gctUINT32 Offset,
+    IN OUT gctSIZE_T * Bytes,
+    OUT gctPOINTER * Wait,
+    OUT gctSIZE_T * WaitSize
+    )
+{
+    gceSTATUS status;
+    gctUINT32 address;
+	gctUINT32_PTR logical = (gctUINT32_PTR) Logical;
+	gctSIZE_T bytes;
+
+    /* Verify the arguments. */
+    gcmVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+    gcmVERIFY_ARGUMENT((Logical == gcvNULL) || (Bytes != gcvNULL));
+
+	/* Compute number of bytes required. */
+	bytes = gcmALIGN(Offset + 16, 64) - Offset;
+
+	do
+	{
+	    if (Logical != gcvNULL)
+		{
+			/* Convert logical into hardware specific address. */
+			gcmERR_BREAK(
+				gcoHARDWARE_ConvertLogical(Hardware,
+										   Logical,
+										   &address));
+
+
+	        if (*Bytes < bytes)
+		    {
+			    /* Command queue too small. */
+				status = gcvSTATUS_BUFFER_TOO_SMALL;
+				break;
+		    }
+
+	        /* Append WAIT(200). */
+		    logical[0]
+			    = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
+				| ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (200) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
+
+	        /* Append LINK(2, address). */
+			gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
+						  "Adding wait/link 0x%08X\n", address);
+		    logical[2]
+				= ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x08 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
+				| ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (bytes>>3) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
+
+	        logical[3] = address;
+
+			if (Wait != gcvNULL)
+			{
+				/* Return pointer to WAIT command. */
+				*Wait = Logical;
+			}
+
+			if (WaitSize != gcvNULL)
+			{
+				/* Return number of bytes used by the WAIT command. */
+				*WaitSize = 8;
+			}
+		}
+
+		if (Bytes != gcvNULL)
+		{
+			/* Return number of bytes required by the WAIT/LINK command
+			** sequence. */
+			*Bytes = bytes;
+		}
+
+	    /* Success. */
+		return gcvSTATUS_OK;
+	}
+	while (gcvFALSE);
+
+	/* Return the status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**  gcoHARDWARE_End
+**
+**  Append an END command at the specified location in the command queue.
+**
+**  INPUT:
+**
+**      gcoHARDWARE Hardware
+**          Pointer to an gcoHARDWARE object.
+**
+**      gctPOINTER Logical
+**          Pointer to the current location inside the command queue to append
+**          END command at or gcvNULL just to query the size of the END command.
+**
+**      gctSIZE_T * Bytes
+**          Pointer to the number of bytes available for the END command.  If
+**          'Logical' is gcvNULL, this argument will be ignored.
+**
+**  OUTPUT:
+**
+**      gctSIZE_T * Bytes
+**          Pointer to a variable that will receive the number of bytes required
+**          for the END command.  If 'Bytes' is gcvNULL, nothing will be returned.
+*/
+gceSTATUS
+gcoHARDWARE_End(
+    IN gcoHARDWARE Hardware,
+    IN gctPOINTER Logical,
+    IN OUT gctSIZE_T * Bytes
+    )
+{
+	gctUINT32_PTR logical = (gctUINT32_PTR) Logical;
+
+    /* Verify the arguments. */
+    gcmVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+    gcmVERIFY_ARGUMENT((Logical == gcvNULL) || (Bytes != gcvNULL));
+
+    if (Logical != gcvNULL)
+    {
+        if (*Bytes < 8)
+        {
+            /* Command queue too small. */
+            return gcvSTATUS_BUFFER_TOO_SMALL;
+        }
+
+        /* Append END. */
+       logical[0] =
+            ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x02 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)));
+
+		gcmVERIFY_OK(
+			gcoOS_MemoryBarrier(Hardware->os, Logical));
+    }
+
+    if (Bytes != gcvNULL)
+    {
+        /* Return number of bytes required by the END command. */
+        *Bytes = 8;
+    }
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**  gcoHARDWARE_Nop
+**
+**  Append a NOP command at the specified location in the command queue.
+**
+**  INPUT:
+**
+**      gcoHARDWARE Hardware
+**          Pointer to an gcoHARDWARE object.
+**
+**      gctPOINTER Logical
+**          Pointer to the current location inside the command queue to append
+**          NOP command at or gcvNULL just to query the size of the NOP command.
+**
+**      gctSIZE_T * Bytes
+**          Pointer to the number of bytes available for the NOP command.  If
+**          'Logical' is gcvNULL, this argument will be ignored.
+**
+**  OUTPUT:
+**
+**      gctSIZE_T * Bytes
+**          Pointer to a variable that will receive the number of bytes required
+**          for the NOP command.  If 'Bytes' is gcvNULL, nothing will be returned.
+*/
+gceSTATUS
+gcoHARDWARE_Nop(
+    IN gcoHARDWARE Hardware,
+    IN gctPOINTER Logical,
+    IN OUT gctSIZE_T * Bytes
+    )
+{
+    /* Verify the arguments. */
+    gcmVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+    gcmVERIFY_ARGUMENT((Logical == gcvNULL) || (Bytes != gcvNULL));
+
+    if (Logical != gcvNULL)
+    {
+        if (*Bytes < 8)
+        {
+            /* Command queue too small. */
+            return gcvSTATUS_BUFFER_TOO_SMALL;
+        }
+
+        /* Append NOP. */
+        ((gctUINT32_PTR) Logical)[0] = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x03 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)));
+    }
+
+    if (Bytes != gcvNULL)
+    {
+        /* Return number of bytes required by the NOP command. */
+        *Bytes = 8;
+    }
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**  gcoHARDWARE_Wait
+**
+**  Append a WAIT command at the specified location in the command queue.
+**
+**  INPUT:
+**
+**      gcoHARDWARE Hardware
+**          Pointer to an gcoHARDWARE object.
+**
+**      gctPOINTER Logical
+**          Pointer to the current location inside the command queue to append
+**          WAIT command at or gcvNULL just to query the size of the WAIT command.
+**
+**		gctUINT32 Count
+**			Number of cycles to wait.
+**
+**      gctSIZE_T * Bytes
+**          Pointer to the number of bytes available for the WAIT command.  If
+**          'Logical' is gcvNULL, this argument will be ignored.
+**
+**  OUTPUT:
+**
+**      gctSIZE_T * Bytes
+**          Pointer to a variable that will receive the number of bytes required
+**          for the NOP command.  If 'Bytes' is gcvNULL, nothing will be returned.
+*/
+gceSTATUS
+gcoHARDWARE_Wait(
+    IN gcoHARDWARE Hardware,
+    IN gctPOINTER Logical,
+	IN gctUINT32 Count,
+    IN OUT gctSIZE_T * Bytes
+    )
+{
+    /* Verify the arguments. */
+    gcmVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+    gcmVERIFY_ARGUMENT((Logical == gcvNULL) || (Bytes != gcvNULL));
+
+    if (Logical != gcvNULL)
+    {
+        if (*Bytes < 8)
+        {
+            /* Command queue too small. */
+            return gcvSTATUS_BUFFER_TOO_SMALL;
+        }
+
+        /* Append WAIT. */
+        *(gctUINT32 *) Logical = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
+							   | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (Count) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
+    }
+
+    if (Bytes != gcvNULL)
+    {
+        /* Return number of bytes required by the WAIT command. */
+        *Bytes = 8;
+    }
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**  gcoHARDWARE_Event
+**
+**  Append an EVENT command at the specified location in the command queue.
+**
+**  INPUT:
+**
+**      gcoHARDWARE Hardware
+**          Pointer to an gcoHARDWARE object.
+**
+**      gctPOINTER Logical
+**          Pointer to the current location inside the command queue to append
+**          the EVENT command at or gcvNULL just to query the size of the EVENT
+**          command.
+**
+**      gctUINT8 Event
+**          Event ID to program.
+**
+**      gceKERNEL_WHERE FromWhere
+**          Location of the pipe to send the event.
+**
+**      gctSIZE_T * Bytes
+**          Pointer to the number of bytes available for the EVENT command.  If
+**          'Logical' is gcvNULL, this argument will be ignored.
+**
+**  OUTPUT:
+**
+**      gctSIZE_T * Bytes
+**          Pointer to a variable that will receive the number of bytes required
+**          for the EVENT command.  If 'Bytes' is gcvNULL, nothing will be
+**          returned.
+*/
+gceSTATUS
+gcoHARDWARE_Event(
+    IN gcoHARDWARE Hardware,
+    IN gctPOINTER Logical,
+    IN gctUINT8 Event,
+    IN gceKERNEL_WHERE FromWhere,
+    IN OUT gctSIZE_T * Bytes
+    )
+{
+	gctUINT size;
+    gctUINT32 destination;
+	gctUINT32_PTR logical = (gctUINT32_PTR) Logical;
+
+    /* Verify the arguments. */
+    gcmVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+    gcmVERIFY_ARGUMENT((Logical == gcvNULL) || (Bytes != gcvNULL));
+    gcmVERIFY_ARGUMENT(Event < 32);
+
+	/* Determine the size of the command. */
+	size = Hardware->extraEventStates
+		 ? gcmALIGN(8 + (1 + 5) * 4, 8)	/* EVENT + 5 STATES */
+		 : 8;
+
+    if (Logical != gcvNULL)
+    {
+        if (*Bytes < size)
+        {
+            /* Command queue too small. */
+            return gcvSTATUS_BUFFER_TOO_SMALL;
+        }
+
+		switch (FromWhere)
+		{
+		case gcvKERNEL_COMMAND:
+			/* From command processor. */
+			destination = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1))))))) << (0 ? 5:5))) | (((gctUINT32) (0x1&((gctUINT32)((((1?5:5)-(0?5:5)+1)==32)?~0:(~(~0<<((1?5:5)-(0?5:5)+1)))))))<<(0?5:5)));
+			break;
+
+		case gcvKERNEL_PIXEL:
+			/* From pixel engine. */
+			destination = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 6:6) - (0 ? 6:6) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 6:6) - (0 ? 6:6) + 1))))))) << (0 ? 6:6))) | (((gctUINT32) (0x1&((gctUINT32)((((1?6:6)-(0?6:6)+1)==32)?~0:(~(~0<<((1?6:6)-(0?6:6)+1)))))))<<(0?6:6)));
+			break;
+
+		default:
+			return gcvSTATUS_INVALID_ARGUMENT;
+		}
+
+		/* Append EVENT(Event, destiantion). */
+        logical[0] =
+            ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))|
+            ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E01) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))|
+            ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
+
+        logical[1] = ((((gctUINT32) (destination)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) ((gctUINT32) (Event) & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)));
+
+		/* Append the extra states. These are needed for the chips that do not
+		   support back-to-back events due to the async interface. The extra
+		   states add the necessary delay to ensure that event IDs do not
+		   collide. */
+		if (Hardware->extraEventStates)
+		{
+			logical[2] = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
+					   | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0100) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
+					   | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (5) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
+
+			logical[3] = 0;
+			logical[4] = 0;
+			logical[5] = 0;
+			logical[6] = 0;
+			logical[7] = 0;
+    }
+    }
+
+    if (Bytes != gcvNULL)
+    {
+        /* Return number of bytes required by the EVENT command. */
+        *Bytes = size;
+    }
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**  gcoHARDWARE_PipeSelect
+**
+**  Append a PIPESELECT command at the specified location in the command queue.
+**
+**  INPUT:
+**
+**      gcoHARDWARE Hardware
+**          Pointer to an gcoHARDWARE object.
+**
+**      gctPOINTER Logical
+**          Pointer to the current location inside the command queue to append
+**          the PIPESELECT command at or gcvNULL just to query the size of the
+**          PIPESELECT command.
+**
+**      gctUINT32 Pipe
+**          Pipe value to select.
+**
+**      gctSIZE_T * Bytes
+**          Pointer to the number of bytes available for the PIPESELECT command.
+**          If 'Logical' is gcvNULL, this argument will be ignored.
+**
+**  OUTPUT:
+**
+**      gctSIZE_T * Bytes
+**          Pointer to a variable that will receive the number of bytes required
+**          for the PIPESELECT command.  If 'Bytes' is gcvNULL, nothing will be
+**          returned.
+*/
+gceSTATUS
+gcoHARDWARE_PipeSelect(
+    IN gcoHARDWARE Hardware,
+    IN gctPOINTER Logical,
+    IN gctUINT32 Pipe,
+    IN OUT gctSIZE_T * Bytes
+    )
+{
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+	gcmVERIFY_ARGUMENT((Logical == gcvNULL) || (Bytes != gcvNULL));
+
+	/* Append a PipeSelect. */
+	if (Logical != gcvNULL)
+	{
+		gctUINT32 flush, stall;
+
+	    if (*Bytes < 32)
+	    {
+	        /* Command queue too small. */
+	        return gcvSTATUS_BUFFER_TOO_SMALL;
+	    }
+
+		flush = (Pipe == 0x1)
+			  ? ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) (0x1&((gctUINT32)((((1?1:1)-(0?1:1)+1)==32)?~0:(~(~0<<((1?1:1)-(0?1:1)+1)))))))<<(0?1:1)))
+			  | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) (0x1&((gctUINT32)((((1?0:0)-(0?0:0)+1)==32)?~0:(~(~0<<((1?0:0)-(0?0:0)+1)))))))<<(0?0:0)))
+			  : ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3))) | (((gctUINT32) (0x1&((gctUINT32)((((1?3:3)-(0?3:3)+1)==32)?~0:(~(~0<<((1?3:3)-(0?3:3)+1)))))))<<(0?3:3)));
+
+		stall = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
+			  | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));
+
+		/* LoadState(AQFlush, 1), flush. */
+		((gctUINT32_PTR) Logical)[0]
+			= ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
+			| ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E03) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
+			| ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
+		((gctUINT32_PTR) Logical)[1] = flush;
+
+		/* LoadState(AQSempahore, 1), stall. */
+		((gctUINT32_PTR) Logical)[2]
+			= ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
+			| ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E02) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
+			| ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
+		((gctUINT32_PTR) Logical)[3] = stall;
+
+		/* Stall, stall. */
+		((gctUINT32_PTR) Logical)[4] = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x09 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)));
+		((gctUINT32_PTR) Logical)[5] = stall;
+
+		/* LoadState(AQPipeSelect, 1), pipe. */
+		((gctUINT32_PTR) Logical)[6]
+			= ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
+			| ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E00) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
+			| ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
+		((gctUINT32_PTR) Logical)[7] = Pipe;
+	}
+
+	if (Bytes != gcvNULL)
+	{
+		/* Return number of bytes required by the PIPESELECT command. */
+		*Bytes = 32;
+	}
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**  gcoHARDWARE_Link
+**
+**  Append a LINK command at the specified location in the command queue.
+**
+**  INPUT:
+**
+**      gcoHARDWARE Hardware
+**          Pointer to an gcoHARDWARE object.
+**
+**      gctPOINTER Logical
+**          Pointer to the current location inside the command queue to append
+**          the LINK command at or gcvNULL just to query the size of the LINK
+**          command.
+**
+**      gctPOINTER FetchAddress
+**          Logical address of destination of LINK.
+**
+**      gctSIZE_T FetchSize
+**          Number of bytes in destination of LINK.
+**
+**      gctSIZE_T * Bytes
+**          Pointer to the number of bytes available for the LINK command.  If
+**          'Logical' is gcvNULL, this argument will be ignored.
+**
+**  OUTPUT:
+**
+**      gctSIZE_T * Bytes
+**          Pointer to a variable that will receive the number of bytes required
+**          for the LINK command.  If 'Bytes' is gcvNULL, nothing will be returned.
+*/
+gceSTATUS
+gcoHARDWARE_Link(
+    IN gcoHARDWARE Hardware,
+    IN gctPOINTER Logical,
+    IN gctPOINTER FetchAddress,
+    IN gctSIZE_T FetchSize,
+    IN OUT gctSIZE_T * Bytes
+    )
+{
+    gceSTATUS status;
+	gctSIZE_T bytes;
+	gctUINT32 address;
+	gctUINT32_PTR logical = (gctUINT32_PTR) Logical;
+
+    /* Verify the arguments. */
+    gcmVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+    gcmVERIFY_ARGUMENT((Logical == gcvNULL) || (Bytes != gcvNULL));
+
+    if (Logical != gcvNULL)
+    {
+        if (*Bytes < 8)
+        {
+            /* Command queue too small. */
+            return gcvSTATUS_BUFFER_TOO_SMALL;
+        }
+
+        /* Convert logical address to hardware address. */
+		gcmERR_RETURN(
+			gcoHARDWARE_ConvertLogical(Hardware,
+									   FetchAddress,
+									   &address));
+
+		logical[1] = address;
+
+		gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
+					  "Adding link 0x%08X\n",
+					  address);
+
+        /* Make sure the address got written before the LINK command. */
+        gcmVERIFY_OK(
+			gcoOS_MemoryBarrier(Hardware->os,
+								&logical[1]));
+
+		/* Compute number of 64-byte aligned bytes to fetch. */
+		bytes = gcmALIGN(address + FetchSize, 64) - address;
+
+        /* Append LINK(bytes / 8), FetchAddress. */
+        logical[0] = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x08 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
+							   | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (bytes>>3) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
+
+        /* Memory barrier. */
+        gcmVERIFY_OK(
+			gcoOS_MemoryBarrier(Hardware->os,
+								logical));
+    }
+
+    if (Bytes != gcvNULL)
+    {
+        /* Return number of bytes required by the LINK command. */
+        *Bytes = 8;
+    }
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**  gcoHARDWARE_AlignToTile
+**
+**  Align the specified width and height to tile boundaries.
+**
+**  INPUT:
+**
+**      gcoHARDWARE Hardware
+**          Pointer to an gcoHARDWARE object.
+**
+**		gceSURF_TYPE Type
+**			Type of alignment.
+**
+**      gctUINT32 * Width
+**          Pointer to the width to be aligned.  If 'Width' is gcvNULL, no width
+**          will be aligned.
+**
+**      gctUINT32 * Height
+**          Pointer to the height to be aligned.  If 'Height' is gcvNULL, no height
+**          will be aligned.
+**
+**  OUTPUT:
+**
+**      gctUINT32 * Width
+**          Pointer to a variable that will receive the aligned width.
+**
+**      gctUINT32 * Height
+**          Pointer to a variable that will receive the aligned height.
+**
+**		gctBOOL_PTR SuperTiled
+**			Pointer to a variable that receives the super-tiling flag for the
+**			surface.
+*/
+gceSTATUS
+gcoHARDWARE_AlignToTile(
+    IN gcoHARDWARE Hardware,
+	IN gceSURF_TYPE Type,
+    IN OUT gctUINT32_PTR Width,
+    IN OUT gctUINT32_PTR Height,
+	OUT gctBOOL_PTR SuperTiled
+    )
+{
+	gctBOOL superTiled = gcvFALSE;
+	gctUINT32 xAlignment, yAlignment;
+
+    /* Verify the arguments. */
+    gcmVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+
+
+	/* Super tiling can be enabled for render targets and depth buffers. */
+	superTiled =
+		(  (Type == gcvSURF_RENDER_TARGET)
+		|| (Type == gcvSURF_DEPTH)
+		)
+		&&
+		/* Of course, hardware needs to support super tiles. */
+		((((gctUINT32) (Hardware->chipMinorFeatures0)) >> (0 ? 12:12) & ((gctUINT32) ((((1 ? 12:12) - (0 ? 12:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:12) - (0 ? 12:12) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 12:12) - (0 ? 12:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:12) - (0 ? 12:12) + 1)))))));
+
+
+	/* Compute alignment factors. */
+	xAlignment = superTiled ? 64
+			   : (Type == gcvSURF_TEXTURE) ? 4
+			   : 16;
+	yAlignment = superTiled ? 64 : 4;
+
+    if (Width != gcvNULL)
+    {
+		/* Align the width. */
+		*Width = gcmALIGN(*Width, xAlignment);
+    }
+
+    if (Height != gcvNULL)
+    {
+		/* Align the height. */
+		*Height = gcmALIGN(*Height, yAlignment);
+    }
+
+	if (SuperTiled != gcvNULL)
+	{
+		/* Copy the super tiling. */
+		*SuperTiled = superTiled;
+	}
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**  gcoHARWDARE_UpdateQueueTail
+**
+**  Update the tail of the command queue.
+**
+**  INPUT:
+**
+**      gcoHARDWARE Hardware
+**          Pointer to an gcoHARDWARE object.
+**
+**      gctPOINTER Logical
+**          Logical address of the start of the command queue.
+**
+**      gctUINT32 Offset
+**          Offset into the command queue of the tail (last command).
+**
+**  OUTPUT:
+**
+**      Nothing.
+*/
+gceSTATUS
+gcoHARWDARE_UpdateQueueTail(
+    IN gcoHARDWARE Hardware,
+    IN gctPOINTER Logical,
+    IN gctUINT32 Offset
+    )
+{
+    /* Verify the hardware. */
+    gcmVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+
+	/* Force a barrier. */
+	gcmVERIFY_OK(
+		gcoOS_MemoryBarrier(Hardware->os, Logical));
+
+    /* Notify gcoKERNEL object of change. */
+    return gcoKERNEL_Notify(Hardware->kernel,
+							gcvNOTIFY_COMMAND_QUEUE,
+							gcvFALSE);
+}
+
+/*******************************************************************************
+**
+**  gcoHARDWARE_ConvertLogical
+**
+**  Convert a logical system address into a hardware specific address.
+**
+**  INPUT:
+**
+**      gcoHARDWARE Hardware
+**          Pointer to an gcoHARDWARE object.
+**
+**      gctPOINTER Logical
+**          Logical address to convert.
+**
+**      gctUINT32* Address
+**          Return hardware specific address.
+**
+**  OUTPUT:
+**
+**      Nothing.
+*/
+gceSTATUS
+gcoHARDWARE_ConvertLogical(
+    IN gcoHARDWARE Hardware,
+    IN gctPOINTER Logical,
+    OUT gctUINT32 * Address
+    )
+{
+    gctUINT32 address;
+    gceSTATUS status;
+
+    /* Verify the arguments. */
+    gcmVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+    gcmVERIFY_ARGUMENT(Logical != gcvNULL);
+    gcmVERIFY_ARGUMENT(Address != gcvNULL);
+
+	do
+	{
+	    /* Convert logical address into a physical address. */
+		gcmERR_BREAK(gcoOS_GetPhysicalAddress(Hardware->os,
+											  Logical,
+											  &address));
+
+                                              
+#if MRVL_TAVOR_PV2_PATCH                                              
+        address = address & 0x7fffffff;
+        /* In fact, below code will clear the highest bit too. */
+#endif
+
+	    /* Return hardware specific address. */
+		*Address = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1))))))) << (0 ? 31:31))) | (((gctUINT32) (0x0 & ((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1))))))) << (0 ? 31:31)))
+			     | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 30:0) - (0 ? 30:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 30:0) - (0 ? 30:0) + 1))))))) << (0 ? 30:0))) | (((gctUINT32) ((gctUINT32) (address) & ((gctUINT32) ((((1 ? 30:0) - (0 ? 30:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 30:0) - (0 ? 30:0) + 1))))))) << (0 ? 30:0)));
+
+	    /* Success. */
+		return gcvSTATUS_OK;
+	}
+	while (gcvFALSE);
+
+	/* Return the status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**  gcoHARDWARE_Interrupt
+**
+**  Process an interrupt.
+**
+**  INPUT:
+**
+**      gcoHARDWARE Hardware
+**          Pointer to an gcoHARDWARE object.
+**
+**		gctBOOL InterruptValid
+**			If gcvTRUE, this function will read the interrupt acknowledge register,
+**			stores the data, and return whether or not the interrupt is ours or
+**			not.  If gcvFALSE, this functions will read the interrupt acknowledge
+**			register and combine it with any stored value to handle the event
+**			notifications.
+**
+**  OUTPUT:
+**
+**      Nothing.
+*/
+gceSTATUS
+gcoHARDWARE_Interrupt(
+    IN gcoHARDWARE Hardware,
+	IN gctBOOL InterruptValid
+    )
+{
+    gcoEVENT event;
+	gctUINT32 data;
+    gceSTATUS status;
+
+    /* Verify the arguments. */
+    gcmVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+
+    /* Extract gcoEVENT object. */
+    event = Hardware->kernel->event;
+    gcmVERIFY_OBJECT(event, gcvOBJ_EVENT);
+
+#if USE_EVENT_QUEUE
+	if (InterruptValid)
+	{
+		/* Read AQIntrAcknowledge register. */
+		gcmVERIFY_OK(gcoOS_ReadRegister(Hardware->os,
+										0x00010,
+									    &data));
+
+		if (data == 0)
+		{
+			/* Not our interrupt. */
+			status = gcvSTATUS_NOT_OUR_INTERRUPT;
+		}
+		else
+		{
+			/* Inform gcoEVENT of the interrupt. */
+			status = gcoEVENT_Interrupt(event, data);
+		}
+	}
+	else
+	{
+		/* Handle events. */
+		status = gcoEVENT_Notify(event, 0);
+	}
+
+	/* Return the status. */
+	return status;
+#else
+	/* Read AQIntrAcknowledge register. */
+	gcmVERIFY_OK(gcoOS_ReadRegister(Hardware->os,
+									0x00010,
+								    &data));
+
+	if (InterruptValid)
+	{
+		/* Store data. */
+		Hardware->data |= data;
+
+		/* Return interrupt status. */
+		return (data == 0) ? gcvSTATUS_NOT_OUR_INTERRUPT : gcvSTATUS_OK;
+	}
+
+	{
+		gctUINT32 storedData;
+
+		/* Combine with stored interrupt acknowledge register. */
+		gcmVERIFY_OK(gcoOS_AtomicExchange(Hardware->os,
+										  &Hardware->data,
+										  0,
+										  &storedData));
+		data |= storedData;
+	}
+
+	/* Check all bits. */
+	status = gcoEVENT_Notify(event, data);
+
+    /* Success. */
+    return gcvSTATUS_OK;
+#endif
+}
+
+/*******************************************************************************
+**
+**	gcoHARDWARE_QueryCommandBuffer
+**
+**	Query the command buffer alignment and number of reserved bytes.
+**
+**	INPUT:
+**
+**		gcoHARDWARE Harwdare
+**			Pointer to an gcoHARDWARE object.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * Alignment
+**			Pointer to a variable receiving the alignment for each command.
+**
+**		gctSIZE_T * ReservedHead
+**			Pointer to a variable receiving the number of reserved bytes at the
+**          head of each command buffer.
+**
+**		gctSIZE_T * ReservedTail
+**			Pointer to a variable receiving the number of bytes reserved at the
+**          tail of each command buffer.
+*/
+gceSTATUS gcoHARDWARE_QueryCommandBuffer(
+    IN gcoHARDWARE Hardware,
+    OUT gctSIZE_T * Alignment,
+    OUT gctSIZE_T * ReservedHead,
+    OUT gctSIZE_T * ReservedTail
+    )
+{
+    /* Verify the arguments. */
+    gcmVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+
+    if (Alignment != gcvNULL)
+    {
+        /* Align every 8 bytes. */
+        *Alignment = 8;
+    }
+
+    if (ReservedHead != gcvNULL)
+    {
+        /* Reserve space for SelectPipe(). */
+        *ReservedHead = 32;
+    }
+
+    if (ReservedTail != gcvNULL)
+    {
+        /* Reserve space for Link(). */
+        *ReservedTail = 8;
+    }
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoHARDWARE_QuerySystemMemory
+**
+**	Query the command buffer alignment and number of reserved bytes.
+**
+**	INPUT:
+**
+**		gcoHARDWARE Harwdare
+**			Pointer to an gcoHARDWARE object.
+**
+**	OUTPUT:
+**
+**		gctSIZE_T * SystemSize
+**			Pointer to a variable that receives the maximum size of the system
+**          memory.
+**
+**		gctUINT32 * SystemBaseAddress
+**			Poinetr to a variable that receives the base address for system
+**			memory.
+*/
+gceSTATUS gcoHARDWARE_QuerySystemMemory(
+    IN gcoHARDWARE Hardware,
+    OUT gctSIZE_T * SystemSize,
+	OUT gctUINT32 * SystemBaseAddress
+    )
+{
+    /* Verify the arguments. */
+    gcmVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+
+    if (SystemSize != gcvNULL)
+    {
+        /* Maximum system memory can be 2GB. */
+        *SystemSize = 1 << 31;
+    }
+
+	if (SystemBaseAddress != gcvNULL)
+	{
+		/* Set system memory base address. */
+		*SystemBaseAddress = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1))))))) << (0 ? 31:31))) | (((gctUINT32) (0x0 & ((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1))))))) << (0 ? 31:31)));
+	}
+
+    /* Success. */
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoHARDWARE_SetMMU
+**
+**	Set the page table base address.
+**
+**	INPUT:
+**
+**		gcoHARDWARE Harwdare
+**			Pointer to an gcoHARDWARE object.
+**
+**		gctPOINTER Logical
+**			Logical address of the page table.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gcoHARDWARE_SetMMU(
+	IN gcoHARDWARE Hardware,
+	IN gctPOINTER Logical
+	)
+{
+	gceSTATUS status;
+	gctUINT32 address = 0;
+	gctUINT32 baseAddress;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+	gcmVERIFY_ARGUMENT(Logical != gcvNULL);
+
+	do
+	{
+		/* Convert the logical address into an hardware address. */
+		gcmERR_BREAK(
+			gcoHARDWARE_ConvertLogical(Hardware, Logical, &address));
+
+		/* Also get the base address - we need a real physical address. */
+		gcmERR_BREAK(
+			gcoOS_GetBaseAddress(Hardware->os, &baseAddress));
+
+		gcmTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
+					  "Setting page table to 0x%08X\n",
+					  address + baseAddress);
+
+		/* Write the AQMemoryFePageTable register. */
+		gcmERR_BREAK(
+			gcoOS_WriteRegister(Hardware->os,
+								0x00400,
+								address + baseAddress));
+
+		/* Write the AQMemoryRaPageTable register. */
+		gcmERR_BREAK(
+			gcoOS_WriteRegister(Hardware->os,
+								0x00410,
+								address + baseAddress));
+
+		/* Write the AQMemoryTxPageTable register. */
+		gcmERR_BREAK(
+			gcoOS_WriteRegister(Hardware->os,
+								0x00404,
+								address + baseAddress));
+
+		/* Write the AQMemoryPePageTable register. */
+		gcmERR_BREAK(
+			gcoOS_WriteRegister(Hardware->os,
+								0x00408,
+								address + baseAddress));
+
+		/* Write the AQMemoryPezPageTable register. */
+		gcmERR_BREAK(
+			gcoOS_WriteRegister(Hardware->os,
+								0x0040C,
+								address + baseAddress));
+	}
+	while (gcvFALSE);
+
+	/* Return the status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gcoHARDWARE_FlushMMU
+**
+**	Flush the page table.
+**
+**	INPUT:
+**
+**		gcoHARDWARE Harwdare
+**			Pointer to an gcoHARDWARE object.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gcoHARDWARE_FlushMMU(
+	IN gcoHARDWARE Hardware
+	)
+{
+	gceSTATUS status;
+	gctUINT32 flush;
+	gctPOINTER buffer;
+	gctSIZE_T bufferSize;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+
+	do
+	{
+		/* Flush the memory controller. */
+		flush = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) (0x1&((gctUINT32)((((1?0:0)-(0?0:0)+1)==32)?~0:(~(~0<<((1?0:0)-(0?0:0)+1)))))))<<(0?0:0)))
+			  | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) (0x1&((gctUINT32)((((1?1:1)-(0?1:1)+1)==32)?~0:(~(~0<<((1?1:1)-(0?1:1)+1)))))))<<(0?1:1)))
+			  | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2))) | (((gctUINT32) (0x1&((gctUINT32)((((1?2:2)-(0?2:2)+1)==32)?~0:(~(~0<<((1?2:2)-(0?2:2)+1)))))))<<(0?2:2)))
+			  | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3))) | (((gctUINT32) (0x1&((gctUINT32)((((1?3:3)-(0?3:3)+1)==32)?~0:(~(~0<<((1?3:3)-(0?3:3)+1)))))))<<(0?3:3)))
+			  | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4))) | (((gctUINT32) (0x1&((gctUINT32)((((1?4:4)-(0?4:4)+1)==32)?~0:(~(~0<<((1?4:4)-(0?4:4)+1)))))))<<(0?4:4)));
+
+		gcmERR_BREAK(gcoCOMMAND_Reserve(Hardware->kernel->command,
+										8,
+										&buffer,
+										&bufferSize));
+
+		((gctUINT32 *) buffer)[0] =
+			((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))|
+			((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E04) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))|
+			((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
+
+		((gctUINT32 *) buffer)[1] = flush;
+
+		gcmERR_BREAK(gcoCOMMAND_Execute(Hardware->kernel->command,
+										8));
+	}
+	while(gcvFALSE);
+
+	/* Return the status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gcoHARDWARE_BuildVirtualAddress
+**
+**	Build a virtual address.
+**
+**	INPUT:
+**
+**		gcoHARDWARE Harwdare
+**			Pointer to an gcoHARDWARE object.
+**
+**		gctUINT32 Index
+**			Index into page table.
+**
+**		gctUINT32 Offset
+**			Offset into page.
+**
+**	OUTPUT:
+**
+**		gctUINT32 * Address
+**			Pointer to a variable receiving te hardware address.
+*/
+gceSTATUS gcoHARDWARE_BuildVirtualAddress(
+	IN gcoHARDWARE Hardware,
+	IN gctUINT32 Index,
+	IN gctUINT32 Offset,
+	OUT gctUINT32 * Address
+	)
+{
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+	gcmVERIFY_ARGUMENT(Address != gcvNULL);
+
+	/* Build virtual address. */
+	*Address = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1))))))) << (0 ? 31:31))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1))))))) << (0 ? 31:31)))|
+			   ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 30:0) - (0 ? 30:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 30:0) - (0 ? 30:0) + 1))))))) << (0 ? 30:0))) | (((gctUINT32) ((gctUINT32) (Offset|(Index<<12)) & ((gctUINT32) ((((1 ? 30:0) - (0 ? 30:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 30:0) - (0 ? 30:0) + 1))))))) << (0 ? 30:0)));
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+gceSTATUS
+gcoHARDWARE_GetIdle(
+	IN gcoHARDWARE Hardware,
+	IN gctBOOL Wait,
+	OUT gctUINT32 * Data
+	)
+{
+	gceSTATUS status;
+	gctUINT32 idle;
+	gctINT retry;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+	gcmVERIFY_ARGUMENT(Data != gcvNULL);
+
+	/* At most, try for 1 second. */
+	for (retry = 0; retry < 1000; ++retry)
+	{
+		/* Read register. */
+		gcmERR_RETURN(
+			gcoOS_ReadRegister(Hardware->os,
+							   0x00004,
+							   &idle));
+
+		/* See if we have to wait for FE idle. */
+		if (!Wait
+		||  ( ((((gctUINT32) (idle)) >> (0 ? 0:0)) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1)))))) )
+		)
+		{
+			/* FE is idle yet. */
+			break;
+}
+
+		/* Wait a little. */
+		gcoOS_Delay(Hardware->os, 1);
+	}
+
+	/* Return idle to caller. */
+	*Data = idle;
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+/* Flush the caches. */
+gceSTATUS
+gcoHARDWARE_Flush(
+	IN gcoHARDWARE Hardware,
+	IN gceKERNEL_FLUSH Flush,
+    IN gctPOINTER Logical,
+    IN OUT gctSIZE_T * Bytes
+	)
+{
+	gctUINT32 pipe;
+	gctUINT32 flush = 0;
+	gctUINT32_PTR logical = (gctUINT32_PTR) Logical;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+
+	/* Get current pipe. */
+	pipe = Hardware->kernel->command->pipeSelect;
+
+	/* Flush 3D color cache. */
+	if ((Flush & gcvFLUSH_COLOR) && (pipe == 0x0))
+	{
+		flush |= ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) (0x1&((gctUINT32)((((1?1:1)-(0?1:1)+1)==32)?~0:(~(~0<<((1?1:1)-(0?1:1)+1)))))))<<(0?1:1)));
+	}
+
+	/* Flush 3D depth cache. */
+	if ((Flush & gcvFLUSH_DEPTH) && (pipe == 0x0))
+	{
+		flush |= ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) (0x1&((gctUINT32)((((1?0:0)-(0?0:0)+1)==32)?~0:(~(~0<<((1?0:0)-(0?0:0)+1)))))))<<(0?0:0)));
+	}
+
+	/* Flush 3D texture cache. */
+	if ((Flush & gcvFLUSH_TEXTURE) && (pipe == 0x0))
+	{
+		flush |= ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2))) | (((gctUINT32) (0x1&((gctUINT32)((((1?2:2)-(0?2:2)+1)==32)?~0:(~(~0<<((1?2:2)-(0?2:2)+1)))))))<<(0?2:2)));
+	}
+
+	/* Flush 2D cache. */
+	if ((Flush & gcvFLUSH_2D) && (pipe == 0x1))
+	{
+		flush |= ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3))) | (((gctUINT32) (0x1&((gctUINT32)((((1?3:3)-(0?3:3)+1)==32)?~0:(~(~0<<((1?3:3)-(0?3:3)+1)))))))<<(0?3:3)));
+	}
+
+	/* See if there is a valid flush. */
+	if (flush == 0)
+	{
+		if (Bytes != gcvNULL)
+		{
+			/* No bytes required. */
+			*Bytes = 0;
+		}
+
+		/* Success. */
+		return gcvSTATUS_OK;
+	}
+
+	/* Copy to command queue. */
+	if (Logical != gcvNULL)
+	{
+        if (*Bytes < 8)
+        {
+            /* Command queue too small. */
+            return gcvSTATUS_BUFFER_TOO_SMALL;
+        }
+
+        /* Append LOAD_STATE to AQFlush. */
+        logical[0]
+			= ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
+			| ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E03) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
+			| ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
+
+        logical[1] = flush;
+	}
+
+	if (Bytes != gcvNULL)
+	{
+		/* 8 bytes required. */
+		*Bytes = 8;
+	}
+
+	/* Success. */
+	return gcvSTATUS_OK;
+}
+
+gceSTATUS
+gcoHARDWARE_SetFastClear(
+    IN gcoHARDWARE Hardware,
+    IN gctINT Enable,
+	IN gctINT Compression
+    )
+{
+    gctUINT32 debug;
+    gceSTATUS status;
+
+    if (!( ((((gctUINT32) (Hardware->chipFeatures)) >> (0 ? 0:0)) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1)))))) ))
+    {
+    	return gcvSTATUS_OK;
+    }
+
+    do
+    {
+    	if (Enable == -1)
+    	{
+    	    Enable = (Hardware->chipModel != gcv500)
+				   | (Hardware->chipRevision >= 3);
+    	}
+
+#if MRVL_DISABLE_FASTCLEAR
+		Enable = 0;
+#endif 
+		if (Compression == -1)
+		{
+			Compression = Enable
+						& ( ((((gctUINT32) (Hardware->chipFeatures)) >> (0 ? 5:5)) & ((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1)))))) );
+		}
+
+
+
+        gcmERR_BREAK(gcoOS_ReadRegister(Hardware->os,
+    	    	    	    	    	0x00414,
+										&debug));
+
+    	debug = ((((gctUINT32) (debug)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 20:20) - (0 ? 20:20) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 20:20) - (0 ? 20:20) + 1))))))) << (0 ? 20:20))) | (((gctUINT32) ((gctUINT32) (Enable==0) & ((gctUINT32) ((((1 ? 20:20) - (0 ? 20:20) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 20:20) - (0 ? 20:20) + 1))))))) << (0 ? 20:20)));
+
+
+    	debug = ((((gctUINT32) (debug)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1))))))) << (0 ? 21:21))) | (((gctUINT32) ((gctUINT32) (Compression==0) & ((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1))))))) << (0 ? 21:21)));
+
+
+    	gcmERR_BREAK(
+			gcoOS_WriteRegister(Hardware->os,
+				    	    	0x00414,
+								debug));
+
+        Hardware->allowFastClear   = Enable;
+		Hardware->allowCompression = Compression;
+
+    	status = gcvFALSE;
+    }
+    while (gcvFALSE);
+
+    return status;
+}
+
+#define gcmREAD_REGISTER(addr, data) \
+	gcoOS_ReadRegister(Hardware->os, (addr), (data))
+
+#define gcmWRITE_REGISTER(addr, _register) \
+	gcoOS_WriteRegister(Hardware->os, (addr), (_register))
+
+
+typedef enum
+{
+	gcvPOWER_FLAG_INITIALIZE      = 1 << 0,
+	gcvPOWER_FLAG_STALL           = 1 << 1,
+	gcvPOWER_FLAG_STOP            = 1 << 2,
+	gcvPOWER_FLAG_START           = 1 << 3,
+	gcvPOWER_FLAG_RELEASE_CONTEXT = 1 << 4,
+}
+gcePOWER_FLAGS;
+
+/*******************************************************************************
+**
+**	gcoHARDWARE_SetPowerManagementState
+**
+**	Set GPU to a specified power state.
+**
+**	INPUT:
+**
+**		gcoHARDWARE Harwdare
+**			Pointer to an gcoHARDWARE object.
+**
+**		gceCHIPPOWERSTATE State
+**			Power State.
+**
+*/
+gceSTATUS
+gcoHARDWARE_SetPowerManagementState(
+    IN gcoHARDWARE Hardware,
+    IN gceCHIPPOWERSTATE State
+    )
+{
+	gceSTATUS  status;
+	gcoCOMMAND command;
+	gctUINT    flag, clock;
+	gctPOINTER buffer;
+	gctSIZE_T  bytes, requested;
+
+	/* State transition flags. */
+	static const gctUINT flags[4][4] =
+	{
+		/* gcvPOWER_ON		*/
+		{	/* ON      */ 0,
+			/* OFF     */ gcvPOWER_FLAG_STALL |
+						  gcvPOWER_FLAG_STOP,
+			/* IDLE    */ gcvPOWER_FLAG_STALL,
+			/* SUSPEND */ gcvPOWER_FLAG_STALL |
+						  gcvPOWER_FLAG_STOP,
+		},
+
+		/* gcvPOWER_OFF		*/
+		{	/* ON      */ gcvPOWER_FLAG_INITIALIZE    |
+						  gcvPOWER_FLAG_START         |
+						  gcvPOWER_FLAG_RELEASE_CONTEXT,
+			/* OFF     */ 0,
+			/* IDLE    */ gcvPOWER_FLAG_INITIALIZE    |
+						  gcvPOWER_FLAG_START,
+			/* SUSPEND */ gcvPOWER_FLAG_INITIALIZE,
+		},
+
+		/* gcvPOWER_IDLE	*/
+		{	/* ON      */ gcvPOWER_FLAG_RELEASE_CONTEXT,
+			/* OFF     */ gcvPOWER_FLAG_STOP,
+			/* IDLE    */ 0,
+			/* SUSPEND */ gcvPOWER_FLAG_STOP,
+		},
+
+		/* gcvPOWER_SUSPEND */
+		{	/* ON      */ gcvPOWER_FLAG_START |
+						  gcvPOWER_FLAG_RELEASE_CONTEXT,
+			/* OFF     */ 0,
+			/* IDLE    */ gcvPOWER_FLAG_START,
+			/* SUSPEND */ 0,
+		},
+	};
+
+	/* Clocks. */
+	static const gctUINT clocks[4] =
+	{
+		/* gcvPOWER_ON      */
+		((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)))|
+		((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1)))|
+		((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2))) | (((gctUINT32) ((gctUINT32) (64) & ((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2)))|
+		((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) ,
+		/* gcvPOWER_OFF     */
+		((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)))|
+		((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1)))|
+		((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2)))|
+		((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) ,
+		/* gcvPOWER_IDLE    */
+		((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)))|
+		((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1)))|
+		((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2)))|
+		((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) ,
+		/* gcvPOWER_SUSPEND */
+		((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)))|
+		((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1)))|
+		((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2)))|
+		((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))), };
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+
+	/* Grab control flags and clock. */
+	flag  = flags[Hardware->chipPowerState][State];
+	clock = clocks[State];
+
+	if (flag == 0)
+	{
+		/* No need to do anything. */
+		return gcvSTATUS_OK;
+	}
+
+	gcmASSERT(Hardware->kernel          != gcvNULL);
+	gcmASSERT(Hardware->kernel->command != gcvNULL);
+	command = Hardware->kernel->command;
+
+	if (flag & gcvPOWER_FLAG_INITIALIZE)
+	{
+		/* Initialize hardware. */
+		gcmONERROR(
+			gcoHARDWARE_InitializeHardware(Hardware));
+
+		gcmONERROR(
+			gcoHARDWARE_SetFastClear(Hardware,
+									 Hardware->allowFastClear,
+									 Hardware->allowCompression));
+
+		/* Force the command queue to reload the next context. */
+		command->currentContext = 0;
+	}
+
+	if (flag & gcvPOWER_FLAG_STALL)
+	{
+		/* Acquire the context switching mutex so nothing else can be
+		** committed. */
+		gcmONERROR(
+			gcoOS_AcquireMutex(Hardware->os,
+							   command->mutexContext,
+							   gcvINFINITE));
+
+		/* Get the size of the flush command. */
+		gcmONERROR(
+			gcoHARDWARE_Flush(Hardware,
+							  ~0,
+							  gcvNULL,
+							  &requested));
+
+		/* Reserve space in the command queue. */
+		gcmONERROR(
+			gcoCOMMAND_Reserve(command,
+							   requested,
+							   &buffer,
+							   &bytes));
+
+		/* Append a flush. */
+		gcmONERROR(
+			gcoHARDWARE_Flush(Hardware,
+							  ~0,
+							  buffer,
+							  &bytes));
+
+		/* Execute the command queue. */
+		gcmONERROR(
+			gcoCOMMAND_Execute(command,
+							   requested));
+
+		/* Wait to finish all commands. */
+		gcmONERROR(
+			gcoCOMMAND_Stall(command));
+	}
+
+	if (flag & gcvPOWER_FLAG_STOP)
+	{
+		/* Stop the command parser. */
+		gcmONERROR(
+			gcoCOMMAND_Stop(command));
+
+		/* Grab the command queue mutex so nothing can get access to the
+		** command queue. */
+		gcmONERROR(
+			gcoOS_AcquireMutex(Hardware->os,
+							   command->mutexQueue,
+							   gcvINFINITE));
+	}
+
+	/* Write the clock control register. */
+	gcmONERROR(
+		gcoOS_WriteRegister(Hardware->os,
+							0x00000,
+							clock));
+
+	/* Done loading the frequency scaler. */
+	gcmONERROR(
+		gcoOS_WriteRegister(Hardware->os,
+							0x00000,
+							((((gctUINT32) (clock)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9)))));
+
+	/* Sleep for 1ms, to make sure everything is powered on. */
+	gcmONERROR(
+		gcoOS_Delay(Hardware->os, 1));
+
+	if (flag & gcvPOWER_FLAG_START)
+	{
+		/* Release the command mutex queue. */
+		gcmONERROR(
+			gcoOS_ReleaseMutex(Hardware->os,
+							   command->mutexQueue));
+
+		/* Start the command processor. */
+		gcmONERROR(
+			gcoCOMMAND_Start(command));
+	}
+
+	if (flag & gcvPOWER_FLAG_RELEASE_CONTEXT)
+	{
+		/* Release the context switching mutex. */
+		gcmVERIFY_OK(
+			gcoOS_ReleaseMutex(Hardware->os,
+							   command->mutexContext));
+	}
+
+	/* Save new power state. */
+	Hardware->chipPowerState = State;
+
+	/* Success. */
+	return gcvSTATUS_OK;
+
+OnError:
+
+	/* Save new power state. */
+	Hardware->chipPowerState = State;
+
+	gcmTRACE(gcvLEVEL_ERROR,
+			 "ERROR: gcoHARDWARE_SetPowerManagementState has error %d.",
+			 status);
+
+	/* Return the status. */
+	return status;
+}
+
+/*******************************************************************************
+**
+**	gcoHARDWARE_QueryPowerManagementState
+**
+**	Get GPU power state.
+**
+**	INPUT:
+**
+**		gcoHARDWARE Harwdare
+**			Pointer to an gcoHARDWARE object.
+**
+**		gceCHIPPOWERSTATE* State
+**			Power State.
+**
+*/
+gceSTATUS
+gcoHARDWARE_QueryPowerManagementState(
+    IN gcoHARDWARE Hardware,
+    OUT gceCHIPPOWERSTATE* State
+    )
+{
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+	gcmVERIFY_ARGUMENT(State != gcvNULL);
+
+	/* Return the statue. */
+    *State = Hardware->chipPowerState;
+
+	/* Success. */
+    return gcvSTATUS_OK;
+}
+
+/*******************************************************************************
+**
+**	gcoHARDWARE_ProfileEngine2D
+**
+**	Read the profile registers available in the 2D engine and sets them in the profile.
+**	The function will also reset the pixelsRendered counter every time.
+**
+**
+**	INPUT:
+**
+**		gcoHARDWARE Hardware
+**			Pointer to an gcoHARDWARE object.
+**
+**		OPTIONAL gco2D_PROFILE_PTR Profile
+**			Pointer to a gco2D_Profile structure.
+**
+**	OUTPUT:
+**
+**		Nothing.
+*/
+gceSTATUS gcoHARDWARE_ProfileEngine2D(
+	IN gcoHARDWARE Hardware,
+	OPTIONAL gco2D_PROFILE_PTR Profile
+	)
+{
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+
+	if (Profile != gcvNULL)
+	{
+		/* Read the cycle count. */
+		gcmREAD_REGISTER(0x00438, &Profile->cycleCount);
+
+		/* Read the pixels rendered. */
+		gcmREAD_REGISTER(0x00454, &Profile->pixelsRendered);
+	}
+
+	/* Reset pixelsRendered counter. */
+	gcmWRITE_REGISTER(0x00470, 0xF0000);
+
+	/* Select pixelsRendered counter to be read. */
+	gcmWRITE_REGISTER(0x00470, 0xB0000);
+
+	/* Return status. */
+	return gcvSTATUS_OK;
+
+
+
+}
+
+#if VIVANTE_PROFILER
+
+gceSTATUS
+gcoHARDWARE_QueryProfileRegisters(
+	IN gcoHARDWARE Hardware,
+    OUT gctINT32_PTR HWProfile
+	)
+{
+    gcoHWProfile hwProfile = (gcoHWProfile)HWProfile;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+
+    /* Read the counters */
+    gcmREAD_REGISTER(0x00040, &hwProfile->gpuTotalRead64BytesPerFrame);
+    gcmREAD_REGISTER(0x00044, &hwProfile->gpuTotalWrite64BytesPerFrame);
+
+    gcmREAD_REGISTER(0x00438, &hwProfile->gpuCyclesCounter);
+
+    /* Reset counters and stop counting */
+    gcmWRITE_REGISTER(0x0003C, 0x00000001);
+    /* start counting again. */
+    gcmWRITE_REGISTER(0x0003C, 0x00000000);
+
+    /* Counters not described in AQMemory.r have been disabled for now. */
+
+    /* FE */
+    /*gcmWRITE_REGISTER(0x00470, 0x00000000);
+    gcmREAD_REGISTER(0x00450, &hwProfile->fe_counter_0);
+    gcmWRITE_REGISTER(0x00470, 0x00000001);
+    gcmREAD_REGISTER(0x00450, &hwProfile->fe_counter_1);
+    gcmWRITE_REGISTER(0x00470, 0x00000002);
+    gcmREAD_REGISTER(0x00450, &hwProfile->fe_counter_2);
+    gcmWRITE_REGISTER(0x00470, 0x00000003);
+    gcmREAD_REGISTER(0x00450, &hwProfile->fe_counter_3);
+    gcmWRITE_REGISTER(0x00470, 0x00000004);
+    gcmREAD_REGISTER(0x00450, &hwProfile->fe_counter_4);
+    gcmWRITE_REGISTER(0x00470, 0x00000005);
+    gcmREAD_REGISTER(0x00450, &hwProfile->fe_counter_5);
+    gcmWRITE_REGISTER(0x00470, 0x00000006);
+    gcmREAD_REGISTER(0x00450, &hwProfile->fe_counter_6);
+    gcmWRITE_REGISTER(0x00470, 0x00000007);
+    gcmREAD_REGISTER(0x00450, &hwProfile->fe_counter_7);
+    gcmWRITE_REGISTER(0x00470, 0x00000008);
+    gcmREAD_REGISTER(0x00450, &hwProfile->fe_counter_8);
+    gcmWRITE_REGISTER(0x00470, 0x00000009);
+    gcmREAD_REGISTER(0x00450, &hwProfile->fe_counter_9);
+    gcmWRITE_REGISTER(0x00470, 0x0000000A);
+    gcmREAD_REGISTER(0x00450, &hwProfile->fe_counter_10);
+    gcmWRITE_REGISTER(0x00470, 0x0000000B);
+    gcmREAD_REGISTER(0x00450, &hwProfile->fe_counter_11);
+    gcmWRITE_REGISTER(0x00470, 0x0000000C);
+    gcmREAD_REGISTER(0x00450, &hwProfile->fe_counter_12);
+    gcmWRITE_REGISTER(0x00470, 0x0000000D);
+    gcmREAD_REGISTER(0x00450, &hwProfile->fe_counter_13);
+    gcmWRITE_REGISTER(0x00470, 0x0000000E);
+    gcmREAD_REGISTER(0x00450, &hwProfile->fe_counter_14);*/
+
+    /* DE */
+    /*gcmWRITE_REGISTER(0x00470, 0x00000000);
+    gcmREAD_REGISTER(0x00458, &hwProfile->de_counter_0);
+    gcmWRITE_REGISTER(0x00470, 0x00000100);
+    gcmREAD_REGISTER(0x00458, &hwProfile->de_counter_1);
+    gcmWRITE_REGISTER(0x00470, 0x00000200);
+    gcmREAD_REGISTER(0x00458, &hwProfile->de_counter_2);
+    gcmWRITE_REGISTER(0x00470, 0x00000300);
+    gcmREAD_REGISTER(0x00458, &hwProfile->de_counter_3);
+    gcmWRITE_REGISTER(0x00470, 0x00000400);
+    gcmREAD_REGISTER(0x00458, &hwProfile->de_counter_4);
+    gcmWRITE_REGISTER(0x00470, 0x00000500);
+    gcmREAD_REGISTER(0x00458, &hwProfile->de_counter_5);
+    gcmWRITE_REGISTER(0x00470, 0x00000600);
+    gcmREAD_REGISTER(0x00458, &hwProfile->de_counter_6);
+    gcmWRITE_REGISTER(0x00470, 0x00000700);
+    gcmREAD_REGISTER(0x00458, &hwProfile->de_counter_7);
+    gcmWRITE_REGISTER(0x00470, 0x00000800);
+    gcmREAD_REGISTER(0x00458, &hwProfile->de_counter_8);
+    gcmWRITE_REGISTER(0x00470, 0x00000900);
+    gcmREAD_REGISTER(0x00458, &hwProfile->de_counter_9);
+    gcmWRITE_REGISTER(0x00470, 0x00000A00);
+    gcmREAD_REGISTER(0x00458, &hwProfile->de_counter_10);
+    gcmWRITE_REGISTER(0x00470, 0x00000B00);
+    gcmREAD_REGISTER(0x00458, &hwProfile->de_counter_11);
+    gcmWRITE_REGISTER(0x00470, 0x00000C00);
+    gcmREAD_REGISTER(0x00458, &hwProfile->de_counter_12);
+    gcmWRITE_REGISTER(0x00470, 0x00000D00);
+    gcmREAD_REGISTER(0x00458, &hwProfile->de_counter_13);
+    gcmWRITE_REGISTER(0x00470, 0x00000E00);
+    gcmREAD_REGISTER(0x00458, &hwProfile->de_counter_14);*/
+
+    /* PE */
+    gcmWRITE_REGISTER(0x00470, 0x00000000);
+    gcmREAD_REGISTER(0x00454, &hwProfile->pe_pixel_count_killed_by_color_pipe);
+    gcmREAD_REGISTER(0x00454, &hwProfile->pe_pixel_count_killed_by_color_pipe);
+    gcmREAD_REGISTER(0x00454, &hwProfile->pe_pixel_count_killed_by_color_pipe);
+    gcmREAD_REGISTER(0x00454, &hwProfile->pe_pixel_count_killed_by_color_pipe);
+    gcmWRITE_REGISTER(0x00470, 0x00010000);
+    gcmREAD_REGISTER(0x00454, &hwProfile->pe_pixel_count_killed_by_depth_pipe);
+    gcmREAD_REGISTER(0x00454, &hwProfile->pe_pixel_count_killed_by_depth_pipe);
+    gcmREAD_REGISTER(0x00454, &hwProfile->pe_pixel_count_killed_by_depth_pipe);
+    gcmREAD_REGISTER(0x00454, &hwProfile->pe_pixel_count_killed_by_depth_pipe);
+    gcmWRITE_REGISTER(0x00470, 0x00020000);
+    gcmREAD_REGISTER(0x00454, &hwProfile->pe_pixel_count_drawn_by_color_pipe);
+    gcmREAD_REGISTER(0x00454, &hwProfile->pe_pixel_count_drawn_by_color_pipe);
+    gcmREAD_REGISTER(0x00454, &hwProfile->pe_pixel_count_drawn_by_color_pipe);
+    gcmREAD_REGISTER(0x00454, &hwProfile->pe_pixel_count_drawn_by_color_pipe);
+    gcmWRITE_REGISTER(0x00470, 0x00030000);
+    gcmREAD_REGISTER(0x00454, &hwProfile->pe_pixel_count_drawn_by_depth_pipe);
+    gcmREAD_REGISTER(0x00454, &hwProfile->pe_pixel_count_drawn_by_depth_pipe);
+    gcmREAD_REGISTER(0x00454, &hwProfile->pe_pixel_count_drawn_by_depth_pipe);
+    gcmREAD_REGISTER(0x00454, &hwProfile->pe_pixel_count_drawn_by_depth_pipe);
+    /*gcmWRITE_REGISTER(0x00470, 0x00040000);
+    gcmREAD_REGISTER(0x00454, &hwProfile->pe_counter_4);
+    gcmWRITE_REGISTER(0x00470, 0x00050000);
+    gcmREAD_REGISTER(0x00454, &hwProfile->pe_counter_5);
+    gcmWRITE_REGISTER(0x00470, 0x00060000);
+    gcmREAD_REGISTER(0x00454, &hwProfile->pe_counter_6);
+    gcmWRITE_REGISTER(0x00470, 0x00070000);
+    gcmREAD_REGISTER(0x00454, &hwProfile->pe_counter_7);
+    gcmWRITE_REGISTER(0x00470, 0x00080000);
+    gcmREAD_REGISTER(0x00454, &hwProfile->pe_counter_8);
+    gcmWRITE_REGISTER(0x00470, 0x00090000);
+    gcmREAD_REGISTER(0x00454, &hwProfile->pe_counter_9);
+    gcmWRITE_REGISTER(0x00470, 0x000A0000);
+    gcmREAD_REGISTER(0x00454, &hwProfile->pe_counter_10);
+    gcmWRITE_REGISTER(0x00470, 0x000B0000);
+    gcmREAD_REGISTER(0x00454, &hwProfile->pe_counter_11);
+    gcmWRITE_REGISTER(0x00470, 0x000C0000);
+    gcmREAD_REGISTER(0x00454, &hwProfile->pe_counter_12);
+    gcmWRITE_REGISTER(0x00470, 0x000D0000);
+    gcmREAD_REGISTER(0x00454, &hwProfile->pe_counter_13);
+    gcmWRITE_REGISTER(0x00470, 0x000E0000);
+    gcmREAD_REGISTER(0x00454, &hwProfile->pe_counter_14);*/
+
+    /* SH */
+    /*gcmWRITE_REGISTER(0x00470, 0x00000000);
+    gcmREAD_REGISTER(0x0045C, &hwProfile->sh_counter_0);
+    gcmWRITE_REGISTER(0x00470, 0x01000000);
+    gcmREAD_REGISTER(0x0045C, &hwProfile->sh_counter_1);
+    gcmWRITE_REGISTER(0x00470, 0x02000000);
+    gcmREAD_REGISTER(0x0045C, &hwProfile->sh_counter_2);
+    gcmWRITE_REGISTER(0x00470, 0x03000000);
+    gcmREAD_REGISTER(0x0045C, &hwProfile->sh_counter_3);
+    gcmWRITE_REGISTER(0x00470, 0x04000000);
+    gcmREAD_REGISTER(0x0045C, &hwProfile->sh_counter_4);
+    gcmWRITE_REGISTER(0x00470, 0x05000000);
+    gcmREAD_REGISTER(0x0045C, &hwProfile->sh_counter_5);
+    gcmWRITE_REGISTER(0x00470, 0x06000000);
+    gcmREAD_REGISTER(0x0045C, &hwProfile->sh_counter_6);
+	*/
+    gcmWRITE_REGISTER(0x00470, 0x07000000);
+    gcmREAD_REGISTER(0x0045C, &hwProfile->ps_inst_counter);
+    gcmWRITE_REGISTER(0x00470, 0x08000000);
+    gcmREAD_REGISTER(0x0045C, &hwProfile->rendered_pixel_counter);
+    gcmWRITE_REGISTER(0x00470, 0x09000000);
+    gcmREAD_REGISTER(0x0045C, &hwProfile->vs_inst_counter);
+    gcmWRITE_REGISTER(0x00470, 0x0A000000);
+    gcmREAD_REGISTER(0x0045C, &hwProfile->rendered_vertice_counter);
+    gcmWRITE_REGISTER(0x00470, 0x0B000000);
+    gcmREAD_REGISTER(0x0045C, &hwProfile->vtx_branch_inst_counter);
+    gcmWRITE_REGISTER(0x00470, 0x0C000000);
+    gcmREAD_REGISTER(0x0045C, &hwProfile->vtx_texld_inst_counter);
+    gcmWRITE_REGISTER(0x00470, 0x0D000000);
+    gcmREAD_REGISTER(0x0045C, &hwProfile->pxl_branch_inst_counter);
+    gcmWRITE_REGISTER(0x00470, 0x0E000000);
+    gcmREAD_REGISTER(0x0045C, &hwProfile->pxl_texld_inst_counter);
+
+    /* PA */
+	/*
+    gcmWRITE_REGISTER(0x00474, 0x00000000);
+    gcmREAD_REGISTER(0x00460, &hwProfile->pa_pixel_count_killed_by_color_pipe);
+    gcmWRITE_REGISTER(0x00474, 0x00000001);
+    gcmREAD_REGISTER(0x00460, &hwProfile->pa_pixel_count_killed_by_depth_pipe);
+    gcmWRITE_REGISTER(0x00474, 0x00000002);
+    gcmREAD_REGISTER(0x00460, &hwProfile->pa_pixel_count_drawn_by_color_pipe);
+	*/
+    gcmWRITE_REGISTER(0x00474, 0x00000003);
+    gcmREAD_REGISTER(0x00460, &hwProfile->pa_input_vtx_counter);
+    gcmWRITE_REGISTER(0x00474, 0x00000004);
+    gcmREAD_REGISTER(0x00460, &hwProfile->pa_input_prim_counter);
+    gcmWRITE_REGISTER(0x00474, 0x00000005);
+    gcmREAD_REGISTER(0x00460, &hwProfile->pa_output_prim_counter);
+    gcmWRITE_REGISTER(0x00474, 0x00000006);
+    gcmREAD_REGISTER(0x00460, &hwProfile->pa_depth_clipped_counter);
+    gcmWRITE_REGISTER(0x00474, 0x00000007);
+    gcmREAD_REGISTER(0x00460, &hwProfile->pa_trivial_rejected_counter);
+    gcmWRITE_REGISTER(0x00474, 0x00000008);
+    gcmREAD_REGISTER(0x00460, &hwProfile->pa_culled_counter);
+	/*
+    gcmWRITE_REGISTER(0x00474, 0x00000009);
+    gcmREAD_REGISTER(0x00460, &hwProfile->pa_counter_9);
+    gcmWRITE_REGISTER(0x00474, 0x0000000A);
+    gcmREAD_REGISTER(0x00460, &hwProfile->pa_counter_10);
+    gcmWRITE_REGISTER(0x00474, 0x0000000B);
+    gcmREAD_REGISTER(0x00460, &hwProfile->pa_counter_11);
+    gcmWRITE_REGISTER(0x00474, 0x0000000C);
+    gcmREAD_REGISTER(0x00460, &hwProfile->pa_counter_12);
+    gcmWRITE_REGISTER(0x00474, 0x0000000D);
+    gcmREAD_REGISTER(0x00460, &hwProfile->pa_counter_13);
+    gcmWRITE_REGISTER(0x00474, 0x0000000E);
+    gcmREAD_REGISTER(0x00460, &hwProfile->pa_counter_14);*/
+
+    /* Select SE.*/
+
+    gcmWRITE_REGISTER(0x00474, 0x00000000);
+    gcmREAD_REGISTER(0x00464, &hwProfile->se_culled_triangle_count);
+    gcmWRITE_REGISTER(0x00474, 0x00000100);
+    gcmREAD_REGISTER(0x00464, &hwProfile->se_culled_lines_count);
+	/*
+    gcmWRITE_REGISTER(0x00474, 0x00000200);
+    gcmREAD_REGISTER(0x00464, &hwProfile->se_counter_2);
+    gcmWRITE_REGISTER(0x00474, 0x00000300);
+    gcmREAD_REGISTER(0x00464, &hwProfile->se_counter_3);
+    gcmWRITE_REGISTER(0x00474, 0x00000400);
+    gcmREAD_REGISTER(0x00464, &hwProfile->se_counter_4);
+    gcmWRITE_REGISTER(0x00474, 0x00000500);
+    gcmREAD_REGISTER(0x00464, &hwProfile->se_counter_5);
+    gcmWRITE_REGISTER(0x00474, 0x00000600);
+    gcmREAD_REGISTER(0x00464, &hwProfile->se_counter_6);
+    gcmWRITE_REGISTER(0x00474, 0x00000700);
+    gcmREAD_REGISTER(0x00464, &hwProfile->se_counter_7);
+    gcmWRITE_REGISTER(0x00474, 0x00000800);
+    gcmREAD_REGISTER(0x00464, &hwProfile->se_counter_8);
+    gcmWRITE_REGISTER(0x00474, 0x00000900);
+    gcmREAD_REGISTER(0x00464, &hwProfile->se_counter_9);
+    gcmWRITE_REGISTER(0x00474, 0x00000A00);
+    gcmREAD_REGISTER(0x00464, &hwProfile->se_counter_10);
+    gcmWRITE_REGISTER(0x00474, 0x00000B00);
+    gcmREAD_REGISTER(0x00464, &hwProfile->se_counter_11);
+    gcmWRITE_REGISTER(0x00474, 0x00000C00);
+    gcmREAD_REGISTER(0x00464, &hwProfile->se_counter_12);
+    gcmWRITE_REGISTER(0x00474, 0x00000D00);
+    gcmREAD_REGISTER(0x00464, &hwProfile->se_counter_13);
+    gcmWRITE_REGISTER(0x00474, 0x00000E00);
+    gcmREAD_REGISTER(0x00464, &hwProfile->se_counter_14);*/
+
+    /* Select RA.*/
+    gcmWRITE_REGISTER(0x00474, 0x00000000);
+    gcmREAD_REGISTER(0x00448, &hwProfile->ra_valid_pixel_count);
+    gcmWRITE_REGISTER(0x00474, 0x00010000);
+    gcmREAD_REGISTER(0x00448, &hwProfile->ra_total_quad_count);
+    gcmWRITE_REGISTER(0x00474, 0x00020000);
+    gcmREAD_REGISTER(0x00448, &hwProfile->ra_valid_quad_count_after_early_z);
+    gcmWRITE_REGISTER(0x00474, 0x00030000);
+    gcmREAD_REGISTER(0x00448, &hwProfile->ra_total_primitive_count);
+    /*gcmWRITE_REGISTER(0x00474, 0x00040000);
+    gcmREAD_REGISTER(0x00448, &hwProfile->ra_counter_4);
+    gcmWRITE_REGISTER(0x00474, 0x00050000);
+    gcmREAD_REGISTER(0x00448, &hwProfile->ra_counter_5);
+    gcmWRITE_REGISTER(0x00474, 0x00060000);
+    gcmREAD_REGISTER(0x00448, &hwProfile->ra_counter_6);
+    gcmWRITE_REGISTER(0x00474, 0x00070000);
+    gcmREAD_REGISTER(0x00448, &hwProfile->ra_counter_7);
+    gcmWRITE_REGISTER(0x00474, 0x00080000);
+    gcmREAD_REGISTER(0x00448, &hwProfile->ra_counter_8);
+	*/
+    gcmWRITE_REGISTER(0x00474, 0x00090000);
+    gcmREAD_REGISTER(0x00448, &hwProfile->ra_pipe_cache_miss_counter);
+    gcmWRITE_REGISTER(0x00474, 0x000A0000);
+    gcmREAD_REGISTER(0x00448, &hwProfile->ra_prefetch_cache_miss_counter);
+	/*
+    gcmWRITE_REGISTER(0x00474, 0x000B0000);
+    gcmREAD_REGISTER(0x00448, &hwProfile->ra_counter_11);
+    gcmWRITE_REGISTER(0x00474, 0x000C0000);
+    gcmREAD_REGISTER(0x00448, &hwProfile->ra_counter_12);
+    gcmWRITE_REGISTER(0x00474, 0x000D0000);
+    gcmREAD_REGISTER(0x00448, &hwProfile->ra_counter_13);
+    gcmWRITE_REGISTER(0x00474, 0x000E0000);
+    gcmREAD_REGISTER(0x00448, &hwProfile->ra_counter_14);*/
+
+    /* Select TX.*/
+    gcmWRITE_REGISTER(0x00474, 0x00000000);
+    gcmREAD_REGISTER(0x0044C, &hwProfile->tx_total_bilinear_requests);
+    gcmWRITE_REGISTER(0x00474, 0x01000000);
+    gcmREAD_REGISTER(0x0044C, &hwProfile->tx_total_trilinear_requests);
+    gcmWRITE_REGISTER(0x00474, 0x02000000);
+    gcmREAD_REGISTER(0x0044C, &hwProfile->tx_total_discarded_texture_requests);
+    gcmWRITE_REGISTER(0x00474, 0x03000000);
+    gcmREAD_REGISTER(0x0044C, &hwProfile->tx_total_texture_requests);
+    /*gcmWRITE_REGISTER(0x00474, 0x04000000);
+    gcmREAD_REGISTER(0x0044C, &hwProfile->tx_counter_4);*/
+    gcmWRITE_REGISTER(0x00474, 0x05000000);
+
+    gcmREAD_REGISTER(0x0044C, &hwProfile->tx_mem_read_count);
+    gcmWRITE_REGISTER(0x00474, 0x06000000);
+    gcmREAD_REGISTER(0x0044C, &hwProfile->tx_mem_read_in_8B_count);
+    gcmWRITE_REGISTER(0x00474, 0x07000000);
+    gcmREAD_REGISTER(0x0044C, &hwProfile->tx_cache_miss_count);
+    gcmWRITE_REGISTER(0x00474, 0x08000000);
+    gcmREAD_REGISTER(0x0044C, &hwProfile->tx_cache_hit_texel_count);
+    gcmWRITE_REGISTER(0x00474, 0x09000000);
+    gcmREAD_REGISTER(0x0044C, &hwProfile->tx_cache_miss_texel_count);
+	/*
+    gcmWRITE_REGISTER(0x00474, 0x0A000000);
+    gcmREAD_REGISTER(0x0044C, &hwProfile->tx_counter_10);
+    gcmWRITE_REGISTER(0x00474, 0x0B000000);
+    gcmREAD_REGISTER(0x0044C, &hwProfile->tx_counter_11);
+    gcmWRITE_REGISTER(0x00474, 0x0C000000);
+    gcmREAD_REGISTER(0x0044C, &hwProfile->tx_counter_12);
+    gcmWRITE_REGISTER(0x00474, 0x0D000000);
+    gcmREAD_REGISTER(0x0044C, &hwProfile->tx_counter_13);
+    gcmWRITE_REGISTER(0x00474, 0x0E000000);
+    gcmREAD_REGISTER(0x0044C, &hwProfile->tx_counter_14);*/
+
+    /* Select MC.*/
+    /*gcmWRITE_REGISTER(0x00478, 0x00000000);
+    gcmREAD_REGISTER(0x00468, &hwProfile->mc_counter_0);*/
+    gcmWRITE_REGISTER(0x00478, 0x00000001);
+    gcmREAD_REGISTER(0x00468, &hwProfile->mc_total_read_req_8B_from_pipeline);
+    gcmWRITE_REGISTER(0x00478, 0x00000002);
+    gcmREAD_REGISTER(0x00468, &hwProfile->mc_total_read_req_8B_from_IP);
+    gcmWRITE_REGISTER(0x00478, 0x00000003);
+    gcmREAD_REGISTER(0x00468, &hwProfile->mc_total_write_req_8B_from_pipeline);
+    /*gcmWRITE_REGISTER(0x00478, 0x00000004);
+    gcmREAD_REGISTER(0x00468, &hwProfile->mc_counter_4);
+    gcmWRITE_REGISTER(0x00478, 0x00000005);
+    gcmREAD_REGISTER(0x00468, &hwProfile->mc_counter_5);
+    gcmWRITE_REGISTER(0x00478, 0x00000006);
+    gcmREAD_REGISTER(0x00468, &hwProfile->mc_counter_6);
+    gcmWRITE_REGISTER(0x00478, 0x00000007);
+    gcmREAD_REGISTER(0x00468, &hwProfile->mc_counter_7);
+    gcmWRITE_REGISTER(0x00478, 0x00000008);
+    gcmREAD_REGISTER(0x00468, &hwProfile->mc_counter_8);
+    gcmWRITE_REGISTER(0x00478, 0x00000009);
+    gcmREAD_REGISTER(0x00468, &hwProfile->mc_counter_9);
+    gcmWRITE_REGISTER(0x00478, 0x0000000A);
+    gcmREAD_REGISTER(0x00468, &hwProfile->mc_counter_10);
+    gcmWRITE_REGISTER(0x00478, 0x0000000B);
+    gcmREAD_REGISTER(0x00468, &hwProfile->mc_counter_11);
+    gcmWRITE_REGISTER(0x00478, 0x0000000C);
+    gcmREAD_REGISTER(0x00468, &hwProfile->mc_counter_12);
+    gcmWRITE_REGISTER(0x00478, 0x0000000D);
+    gcmREAD_REGISTER(0x00468, &hwProfile->mc_counter_13);
+    gcmWRITE_REGISTER(0x00478, 0x0000000E);
+    gcmREAD_REGISTER(0x00468, &hwProfile->mc_counter_14);*/
+
+    /* Select HI.*/
+    gcmWRITE_REGISTER(0x00478, 0x00000000);
+    gcmREAD_REGISTER(0x0046C, &hwProfile->hi_axi_cycles_read_request_stalled);
+    gcmWRITE_REGISTER(0x00478, 0x00000100);
+    gcmREAD_REGISTER(0x0046C, &hwProfile->hi_axi_cycles_write_request_stalled);
+    gcmWRITE_REGISTER(0x00478, 0x00000200);
+    gcmREAD_REGISTER(0x0046C, &hwProfile->hi_axi_cycles_write_data_stalled);
+    /*gcmWRITE_REGISTER(0x00478, 0x00000400);
+    gcmREAD_REGISTER(0x0046C, &hwProfile->hi_counter_4);
+    gcmWRITE_REGISTER(0x00478, 0x00000500);
+    gcmREAD_REGISTER(0x0046C, &hwProfile->hi_counter_5);
+    gcmWRITE_REGISTER(0x00478, 0x00000600);
+    gcmREAD_REGISTER(0x0046C, &hwProfile->hi_counter_6);
+    gcmWRITE_REGISTER(0x00478, 0x00000700);
+    gcmREAD_REGISTER(0x0046C, &hwProfile->hi_counter_7);
+    gcmWRITE_REGISTER(0x00478, 0x00000800);
+    gcmREAD_REGISTER(0x0046C, &hwProfile->hi_counter_8);
+    gcmWRITE_REGISTER(0x00478, 0x00000900);
+    gcmREAD_REGISTER(0x0046C, &hwProfile->hi_counter_9);
+    gcmWRITE_REGISTER(0x00478, 0x00000A00);
+    gcmREAD_REGISTER(0x0046C, &hwProfile->hi_counter_10);
+    gcmWRITE_REGISTER(0x00478, 0x00000B00);
+    gcmREAD_REGISTER(0x0046C, &hwProfile->hi_counter_11);
+    gcmWRITE_REGISTER(0x00478, 0x00000C00);
+    gcmREAD_REGISTER(0x0046C, &hwProfile->hi_counter_12);
+    gcmWRITE_REGISTER(0x00478, 0x00000D00);
+    gcmREAD_REGISTER(0x0046C, &hwProfile->hi_counter_13);
+    gcmWRITE_REGISTER(0x00478, 0x00000E00);
+    gcmREAD_REGISTER(0x0046C, &hwProfile->hi_counter_14);*/
+	/* reset counter */
+	gcmWRITE_REGISTER(0x00478,0xFFFFFFFF);
+	gcmWRITE_REGISTER(0x00474,0xFFFFFFFF);
+	gcmWRITE_REGISTER(0x00470,0xFFFFFFFF);
+	gcmWRITE_REGISTER(0x00478,0x0);
+	gcmWRITE_REGISTER(0x00474,0x0);
+	gcmWRITE_REGISTER(0x00470,0x0);
+	gcmWRITE_REGISTER(0x00438,0);
+
+    /* Success. */
+	return gcvSTATUS_OK;
+}
+#endif
+
+gceSTATUS
+gcoHARDWARE_Reset(
+	IN gcoHARDWARE Hardware
+	)
+{
+
+	gceSTATUS status;
+	gctUINT32 control, idle;
+	gcoCOMMAND command;
+
+	/* Verify the arguments. */
+	gcmVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
+	gcmASSERT(Hardware->kernel != gcvNULL);
+	command = Hardware->kernel->command;
+	gcmASSERT(command != gcvNULL);
+
+	if (Hardware->chipRevision < 0x4600)
+	{
+		/* Not supported - we need the isolation bit. */
+		return gcvSTATUS_NOT_SUPPORTED;
+	}
+
+	if (Hardware->chipPowerState == gcvPOWER_ON)
+	{
+		/* Grab the context mutex. */
+		gcmONERROR(
+			gcoOS_AcquireMutex(Hardware->os,
+							   command->mutexContext,
+							   gcvINFINITE));
+	}
+
+	if ((Hardware->chipPowerState == gcvPOWER_ON)
+	||  (Hardware->chipPowerState == gcvPOWER_IDLE)
+	)
+	{
+		/* Stop the command processor. */
+		gcmONERROR(
+			gcoCOMMAND_Stop(command));
+
+		/* Grab the queue mutex. */
+		gcmONERROR(
+			gcoOS_AcquireMutex(Hardware->os,
+							   command->mutexQueue,
+							   gcvINFINITE));
+	}
+
+	/* Read register. */
+	gcmONERROR(
+		gcoOS_ReadRegister(Hardware->os,
+						   0x00000,
+						   &control));
+
+	for (;;)
+	{
+		/* Isolate the GPU. */
+		control = ((((gctUINT32) (control)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:19) - (0 ? 19:19) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:19) - (0 ? 19:19) + 1))))))) << (0 ? 19:19))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 19:19) - (0 ? 19:19) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:19) - (0 ? 19:19) + 1))))))) << (0 ? 19:19)));
+
+		gcmONERROR(
+			gcoOS_WriteRegister(Hardware->os,
+								0x00000,
+								control));
+
+		/* Set soft reset. */
+		gcmONERROR(
+			gcoOS_WriteRegister(Hardware->os,
+								0x00000,
+								((((gctUINT32) (control)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:12) - (0 ? 12:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:12) - (0 ? 12:12) + 1))))))) << (0 ? 12:12))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 12:12) - (0 ? 12:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:12) - (0 ? 12:12) + 1))))))) << (0 ? 12:12)))));
+
+		/* Wait for reset. */
+		gcmONERROR(
+			gcoOS_Delay(Hardware->os, 1));
+
+		/* Reset soft reset bit. */
+		gcmONERROR(
+			gcoOS_WriteRegister(Hardware->os,
+								0x00000,
+								((((gctUINT32) (control)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:12) - (0 ? 12:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:12) - (0 ? 12:12) + 1))))))) << (0 ? 12:12))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 12:12) - (0 ? 12:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:12) - (0 ? 12:12) + 1))))))) << (0 ? 12:12)))));
+
+		/* Reset GPU isolation. */
+		control = ((((gctUINT32) (control)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:19) - (0 ? 19:19) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:19) - (0 ? 19:19) + 1))))))) << (0 ? 19:19))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 19:19) - (0 ? 19:19) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:19) - (0 ? 19:19) + 1))))))) << (0 ? 19:19)));
+
+		gcmONERROR(
+			gcoOS_WriteRegister(Hardware->os,
+								0x00000,
+								control));
+
+		/* Read idle register. */
+		gcmONERROR(
+			gcoOS_ReadRegister(Hardware->os,
+							   0x00004,
+							   &idle));
+
+		if (( ((((gctUINT32) (idle)) >> (0 ? 0:0)) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1)))))) )==0)
+		{
+			continue;
+		}
+
+		/* Read reset register. */
+		gcmONERROR(
+			gcoOS_ReadRegister(Hardware->os,
+							   0x00000,
+							   &control));
+
+		if ((( ((((gctUINT32) (control)) >> (0 ? 16:16)) & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1)))))) )==0)
+		||  (( ((((gctUINT32) (control)) >> (0 ? 17:17)) & ((gctUINT32) ((((1 ? 17:17) - (0 ? 17:17) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 17:17) - (0 ? 17:17) + 1)))))) )==0)
+		)
+		{
+			continue;
+		}
+
+		/* GPU is idle. */
+		break;
+	}
+
+	/* Force an OFF to ON power switch. */
+	Hardware->chipPowerState = gcvPOWER_OFF;
+	gcmONERROR(
+		gcoHARDWARE_SetPowerManagementState(Hardware, gcvPOWER_ON));
+
+	/* Success. */
+	return gcvSTATUS_OK;
+
+OnError:
+	gcmTRACE(gcvLEVEL_ERROR,
+			 "ERROR: gcoHARDWARE_Reset has status %d.",
+			 status);
+
+	/* Return the error. */
+	return status;
+
+	/* Not supported. */
+
+
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/arch/Unified/hal/kernel/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/arch/Unified/hal/kernel/Makefile
@@ -0,0 +1,28 @@
+##############################################################################
+#  
+#    Copyright (C) 2002 - 2008 by Vivante Corp.
+#  
+#    This program is free software; you can redistribute it and/or modify
+#    it under the terms of the GNU General Public Lisence as published by
+#    the Free Software Foundation; either version 2 of the license, or
+#    (at your option) any later version.
+#  
+#    This program is distributed in the hope that it will be useful,
+#    but WITHOUT ANY WARRANTY; without even the implied warranty of
+#    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+#    GNU General Public Lisence for more details.
+#  
+#    You should have received a copy of the GNU General Public License
+#    along with this program; if not write to the Free Software
+#    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+#  
+##############################################################################
+
+
+#
+# DO NOT EDIT THIS FILE!!!  Edit .\sources. if you want to add a new source
+# file to this component.  This file merely indirects to the real make file
+# that is shared by all the driver components of the Windows NT DDK
+#
+
+!INCLUDE $(NTMAKEENV)\makefile.def
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/arch/Unified/hal/kernel/aqHardware.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/gc600_driver_dove/galcore_ko_src/arch/Unified/hal/kernel/aqHardware.h
@@ -0,0 +1,68 @@
+/****************************************************************************
+*
+*    Copyright (C) 2002 - 2008 by Vivante Corp.
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public Lisence as published by
+*    the Free Software Foundation; either version 2 of the license, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+*    GNU General Public Lisence for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*****************************************************************************/
+
+
+
+
+
+
+#ifndef __aqhardware_h_
+#define __aqhardware_h_
+
+/* gcoHARDWARE object. */
+struct _gcoHARDWARE
+{
+    /* Object. */
+    gcsOBJECT	    	    	object;
+
+    /* Pointer to gcoKERNEL object. */
+    gcoKERNEL	    	    	kernel;
+
+    /* Pointer to gcoOS object. */
+    gcoOS   	    	    	os;
+
+#if !USE_EVENT_QUEUE
+    /* Last read interrupt status register. */
+    gctUINT32	    	    	data;
+#endif
+
+    /* Chip characteristics. */
+    gceCHIPMODEL    	    	chipModel;
+    gctUINT32	    	    	chipRevision;
+    gctUINT32	    	    	chipFeatures;
+	gctUINT32	    	    	chipMinorFeatures0;
+	gctUINT32	    	    	chipMinorFeatures1;
+    gctBOOL 	    	    	allowFastClear;
+	gctBOOL						allowCompression;
+	gctUINT32					powerBaseAddress;
+	gctBOOL						extraEventStates;
+
+	gctUINT32					streamCount;
+	gctUINT32					registerMax;
+	gctUINT32					threadCount;
+	gctUINT32					shaderCoreCount;
+	gctUINT32					vertexCacheSize;
+	gctUINT32					vertexOutputBufferSize;
+
+    /* Chip status */
+    gceCHIPPOWERSTATE			chipPowerState;
+};
+
+#endif /* __aqhardware_h_ */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/mvKW_HAL_glue.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/mvKW_HAL_glue.c
@@ -0,0 +1,534 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+*******************************************************************************/
+/*******************************************************************************
+* mvKW_HAL_glue - 
+*
+* DESCRIPTION:
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+#include "mvOs.h"
+#include "mvCommon.h"
+#include "ctrlEnv/mvCtrlEnvRegs.h"
+#include "mvSysHwConfig.h"
+#ifdef CONFIG_MV_INCLUDE_GIG_ETH
+#include "eth/mvEth.h"
+#endif
+
+/*******************************************************************************
+* mvCtrlEthMaxPortGet - Get Marvell controller number of etherent ports.
+*
+* DESCRIPTION:
+*       This function returns Marvell controller number of etherent port.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       Marvell controller number of etherent port.
+*
+*******************************************************************************/
+#if 1
+MV_U32 mvCtrlEthMaxPortGet(MV_VOID)
+{
+     return 1;
+}
+
+/*******************************************************************************
+* mvCtrlModelGet - Get Marvell controller device model (Id)
+*
+* DESCRIPTION:
+*       This function returns 16bit describing the device model (ID) as defined
+*       in PCI Device and Vendor ID configuration register offset 0x0.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       16bit desscribing Marvell controller ID 
+*
+*******************************************************************************/
+MV_U16 mvCtrlModelGet(MV_VOID)
+{
+     return	MV_6781_DEV_ID;
+}
+MV_U8 mvCtrlRevGet(MV_VOID)
+{
+#ifdef CONFIG_DOVE_REV_Y0
+	return 2;
+#endif
+}
+//EXPORT_SYMBOL(mvCtrlEthMaxPortGet);
+#endif
+
+
+/*******************************************************************************
+* mvBoardTclkGet - Get the board Tclk (Controller clock)
+*
+* DESCRIPTION:
+*       This routine extract the controller core clock.
+*       This function uses the controller counters to make identification.
+*		Note: In order to avoid interference, make sure task context switch
+*		and interrupts will not occure during this function operation
+*
+* INPUT:
+*       countNum - Counter number.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       32bit clock cycles in Hertz.
+*
+*******************************************************************************/
+MV_U32 mvBoardTclkGet(MV_VOID)
+{
+#if defined(TCLK_AUTO_DETECT)
+	MV_U32 tmpTClkRate = 166666667;
+
+        tmpTClkRate = MV_REG_READ(MPP_SAMPLE_AT_RESET_REG0);
+        tmpTClkRate &= MSAR_TCLCK_MASK;
+
+        switch (tmpTClkRate)
+        {
+        case MSAR_TCLCK_166:
+                tmpTClkRate = MV_BOARD_TCLK_166MHZ;
+                break;
+        }
+	return tmpTClkRate;
+#else
+	return MV_BOARD_DEFAULT_TCLK;
+#endif
+
+}
+#include <asm/mach-types.h>
+#ifdef CONFIG_MV_INCLUDE_GIG_ETH
+/*******************************************************************************
+* mvBoardPhyAddrGet - Get the phy address
+*
+* DESCRIPTION:
+*       This routine returns the Phy address of a given ethernet port.
+*
+* INPUT:
+*       ethPortNum - Ethernet port number.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       32bit describing Phy address, -1 if the port number is wrong.
+*
+*******************************************************************************/
+MV_32 mvBoardPhyAddrGet(MV_U32 ethPortNum)
+{
+#if 0
+	MV_U32 boardId= mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("mvBoardPhyAddrGet: Board unknown.\n");
+		return MV_ERROR;
+	}
+
+	return BOARD_INFO(boardId)->pBoardMacInfo[ethPortNum].boardEthSmiAddr;
+#else
+#if 0
+	MV_U32 ret = 0;
+ 	if(machine_is_rd88f6281())
+	     ret = 0;
+	else if (machine_is_db88f6281_bp())
+	     ret = 8;
+	else if (machine_is_rd88f6192_nas())
+	     ret = 8;
+	else
+	     printk("error in %s: unknown board\n", __func__);
+#endif
+	MV_U32 ret = 8;
+//	if (machine_is_dove_db_b())
+		ret = 1;
+//	printk("%s: PhyAddr: %x\n", __func__, ret);
+	return ret;
+#endif
+}
+
+/*******************************************************************************
+* mvBoardMacSpeedGet - Get the Mac speed
+*
+* DESCRIPTION:
+*       This routine returns the Mac speed if pre define of a given ethernet port.
+*
+* INPUT:
+*       ethPortNum - Ethernet port number.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_BOARD_MAC_SPEED, -1 if the port number is wrong.
+*
+*******************************************************************************/
+MV_ETH_MAC_SPEED      mvBoardMacSpeedGet(MV_U32 ethPortNum)
+{
+#if 0
+	MV_U32 boardId= mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("mvBoardMacSpeedGet: Board unknown.\n");
+		return MV_ERROR;
+	}
+
+	return BOARD_INFO(boardId)->pBoardMacInfo[ethPortNum].boardMacSpeed;
+#else
+#if 0
+ 	if(machine_is_rd88f6281())
+	     return BOARD_MAC_SPEED_1000M;
+	else if (machine_is_db88f6281_bp())
+	     return BOARD_MAC_SPEED_AUTO;
+	else if (machine_is_rd88f6192_nas())
+	     return BOARD_MAC_SPEED_AUTO;
+	else
+	     printk("error in %s: unknown board", __func__);
+#endif
+	return ETH_MAC_SPEED_AUTO;
+#endif
+}
+
+MV_BOOL mvBoardIsPortInSgmii(MV_U32 ethPortNum)
+{
+     return MV_TRUE;
+}
+
+u32 overEthAddr = 0;
+//u8     mvMacAddr[6] = {0, };
+u8 mvMacAddr[CONFIG_MV_ETH_PORTS_NUM][6];
+u16 mvMtu[CONFIG_MV_ETH_PORTS_NUM] = {0};
+
+#endif
+/*******************************************************************************
+* mvBoardSpecInitGet -
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN: Return MV_TRUE and parameters in case board need spesific phy init, 
+* 	  otherwise return MV_FALSE. 
+*
+*
+*******************************************************************************/
+
+MV_BOOL mvBoardSpecInitGet(MV_U32* regOff, MV_U32* data)
+{
+	return MV_FALSE;
+}
+
+MV_U32 mvCpuPclkGet(MV_VOID)
+{
+#if defined(PCLCK_AUTO_DETECT)
+     MV_U32  tmpPClkRate=0;
+     MV_U32 cpuCLK[] = MV_CPU_CLCK_TBL;
+     
+     tmpPClkRate = MV_REG_READ(MPP_SAMPLE_AT_RESET_REG0);
+     tmpPClkRate = tmpPClkRate & MSAR_CPUCLCK_MASK;
+     tmpPClkRate = tmpPClkRate >> MSAR_CPUCLCK_OFFS;
+     
+     tmpPClkRate = cpuCLK[tmpPClkRate];
+	  
+     return tmpPClkRate;
+#else
+     return MV_DEFAULT_PCLK
+#endif
+}
+/*******************************************************************************
+ * mvCpuL2ClkGet - Get the CPU L2 (CPU bus clock)
+ *
+ * DESCRIPTION:
+ *       This routine extract the CPU L2 clock.
+ *
+ * RETURN:
+ *       32bit clock cycles in Hertz.
+ *
+ *******************************************************************************/
+MV_U32  mvCpuL2ClkGet(MV_VOID)
+{
+#ifdef L2CLK_AUTO_DETECT
+     MV_U32 L2ClkRate, tmp, pClkRate, indexL2Rtio;
+     MV_U32 cpuCLK[] = MV_CPU_CLCK_TBL;
+     MV_U32 L2Rtio[][2] = MV_L2_CLCK_RTIO_TBL;
+
+     pClkRate = mvCpuPclkGet();
+
+     tmp = MV_REG_READ(MPP_SAMPLE_AT_RESET_REG0);
+     indexL2Rtio = tmp & MSAR_L2CLCK_RTIO_MASK;
+     indexL2Rtio = indexL2Rtio >> MSAR_L2CLCK_RTIO_OFFS;
+
+     L2ClkRate = ((pClkRate * L2Rtio[indexL2Rtio][1]) / L2Rtio[indexL2Rtio][0]);
+
+     return L2ClkRate;
+#else
+     return MV_BOARD_DEFAULT_L2CLK;
+#endif
+}
+/*******************************************************************************
+* mvCtrlPwrClckGet - Get Power State of specific Unit
+*
+* DESCRIPTION:		
+*
+* INPUT:
+*
+* OUTPUT:
+*
+* RETURN:
+******************************************************************************/
+MV_BOOL	mvCtrlPwrClckGet(MV_UNIT_ID unitId, MV_U32 index)
+{
+	MV_U32 reg = MV_REG_READ(CLOCK_GATING_CTRL_REG);
+	MV_BOOL state = MV_TRUE;
+
+	switch (unitId)
+	{
+#if defined(MV_INCLUDE_USB)
+	case USB_UNIT_ID:
+		if ((reg & CGC_USBENCLOCK_MASK(index)) == CGC_USBENCLOCK_DIS(index))
+			state = MV_FALSE;
+		else 
+			state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_GIG_ETH)
+	case ETH_GIG_UNIT_ID:
+		if ((reg & CGC_GEENCLOCK_MASK) == CGC_GEENCLOCK_DIS)
+			state = MV_FALSE;
+		else 
+			state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_SATA)
+	case SATA_UNIT_ID:
+		if ((reg & CGC_SATAENCLOCK_MASK) == CGC_SATAENCLOCK_DIS)
+			state = MV_FALSE;
+		else 
+			state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_PEX)
+	case PEX_UNIT_ID:
+		if ((reg & CGC_PEXENCLOCK_MASK(index)) == CGC_PEXENCLOCK_DIS(index))
+			state = MV_FALSE;
+		else 
+			state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_SDIO)
+	case SDIO_UNIT_ID:
+		if ((reg & CGC_SDIOENCLOCK_MASK(index))== CGC_SDIOENCLOCK_DIS(index))
+			state = MV_FALSE;
+		else 
+			state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_NAND)
+	case NAND_UNIT_ID:
+		if ((reg & CGC_NANDENCLOCK_MASK) == CGC_NANDENCLOCK_DIS)
+			state = MV_FALSE;
+		else 
+			state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_CAMERA)
+	case CAMERA_UNIT_ID:
+		if ((reg & CGC_CAMENCLOCK_MASK) == CGC_CAMENCLOCK_DIS)
+			state = MV_FALSE;
+		else 
+			state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_AUDIO)
+	case AUDIO_UNIT_ID:
+		if ((reg & CGC_ADENCLOCK_MASK(index)) == CGC_ADENCLOCK_DIS(index))
+			state = MV_FALSE;
+		else 
+			state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_GPU)
+	case GPU_UNIT_ID:
+		if ((reg & CGC_GPUENCLOCK_MASK) == CGC_GPUENCLOCK_DIS)
+			state = MV_FALSE;
+		else 
+			state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_AC97)
+	case AC97_UNIT_ID:
+		if ((reg & CGC_AC97ENCLOCK_MASK) == CGC_AC97ENCLOCK_DIS)
+			state = MV_FALSE;
+		else 
+			state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_PDAM)
+	case PDMA_UNIT_ID:
+		if ((reg & CGC_PDMAENCLOCK_MASK) == CGC_PDMAENCLOCK_DIS)
+			state = MV_FALSE;
+		else 
+			state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_XOR)
+	case XOR_UNIT_ID:
+		if ((reg & CGC_XORENCLOCK_MASK(index))== CGC_XORENCLOCK_DIS(index))
+			state = MV_FALSE;
+		else 
+			state = MV_TRUE;
+		break;
+#endif
+	default:
+		state = MV_TRUE;
+		break;
+	}
+
+	return state;	
+}
+#ifdef CONFIG_MV_INCLUDE_AUDIO
+MV_VOID mvAudioHalInit(MV_U8 unit);
+MV_STATUS mvAudioInit(MV_U8 unit)
+{
+    mvAudioHalInit(unit);
+    
+    return MV_OK;
+}
+#endif
+#ifdef CONFIG_MV_INCLUDE_XOR
+MV_VOID mvXorHalInit (MV_U32 xorChanNum);
+
+MV_STATUS mvXorInit (MV_VOID)
+{
+     MV_U32         i;
+#if 0
+     /* Initiate XOR address decode */
+     for(i = 0; i < MV_XOR_MAX_UNIT; i++)
+	  mvXorInitWinsUnit(i);
+#endif
+     mvXorHalInit(MV_XOR_MAX_CHAN);
+
+     return MV_OK;
+}
+#endif
+#if 0
+#include "twsi/mvTwsi.h"
+MV_U8 mvBoardA2DTwsiChanNumGet(MV_U8 unit)
+{
+     return 0;
+}
+
+MV_U8 mvBoardA2DTwsiAddrTypeGet(MV_U8 unit)
+{
+	return ADDR7_BIT;
+}
+
+
+MV_U8 mvBoardA2DTwsiAddrGet(MV_U8 port)
+{
+     return 0x4A;
+}
+#endif
+MV_U32 mvCtrlUsbMaxGet(void)
+{
+	return 2;
+}
+
+MV_U32 mv_crypto_base_get(void)
+{
+	return (DOVE_CESA_VIRT_BASE); 
+}
+
+MV_U32 mv_crypto_phys_base_get(void)
+{
+	return (DOVE_CESA_PHYS_BASE + 0x10000); 
+}
+
+MV_U32 mv_crypto_irq_get(void)
+{
+	return IRQ_DOVE_CRYPTO; 
+}
+/*******************************************************************************
+* mvBoardUSBVbusGpioPinGet - return Vbus input GPP
+*
+* DESCRIPTION:
+*
+* INPUT:
+*		int  devNo.
+*
+* OUTPUT:
+*		None.
+*
+* RETURN:
+*       GPIO pin number. The function return -1 for bad parameters.
+*
+*******************************************************************************/
+MV_32 mvBoardUSBVbusGpioPinGet(int devId)
+{
+	if (machine_is_dove_db() || machine_is_dove_db_b())
+		return 9;
+	return N_A;
+}
+
+/*******************************************************************************
+* mvBoardUSBVbusEnGpioPinGet - return Vbus Enable output GPP
+*
+* DESCRIPTION:
+*
+* INPUT:
+*		int  devNo.
+*
+* OUTPUT:
+*		None.
+*
+* RETURN:
+*       GPIO pin number. The function return -1 for bad parameters.
+*
+*******************************************************************************/
+MV_32 mvBoardUSBVbusEnGpioPinGet(int devId)
+{
+	return  N_A;
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/dbg-trace.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/dbg-trace.c
@@ -0,0 +1,110 @@
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/time.h>
+#include "dbg-trace.h"
+
+#define TRACE_ARR_LEN   800
+#define STR_LEN         128
+struct trace {
+    struct timeval tv;
+        char str[STR_LEN];
+    unsigned int callback_val1;
+    unsigned int callback_val2;
+        char valid;
+};
+static unsigned int (*trc_callback1) (unsigned char) = NULL;
+static unsigned int (*trc_callback2) (unsigned char) = NULL;
+static unsigned char trc_param1 = 0;
+static unsigned char trc_param2 = 0;
+struct trace *trc_arr;
+static int trc_index;
+static int trc_active = 0;
+
+void TRC_START()
+{
+    trc_active = 1;
+}
+
+void TRC_STOP()
+{
+    trc_active = 0;
+}
+
+void TRC_INIT(void *callback1, void *callback2, unsigned char callback1_param, unsigned char callback2_param)
+{
+    printk("Marvell debug tracing is on\n");
+        trc_arr = (struct trace *)kmalloc(TRACE_ARR_LEN*sizeof(struct trace),GFP_KERNEL);
+    if(trc_arr == NULL)
+    {
+        printk("Can't allocate Debug Trace buffer\n");
+        return;
+    }
+        memset(trc_arr,0,TRACE_ARR_LEN*sizeof(struct trace));
+        trc_index = 0;
+    trc_callback1 = callback1;
+    trc_callback2 = callback2;
+    trc_param1 = callback1_param;
+    trc_param2 = callback2_param;
+}
+void TRC_REC(char *fmt,...)
+{
+    va_list args;
+        struct trace *trc = &trc_arr[trc_index];
+
+    if(trc_active == 0)
+        return;
+
+    do_gettimeofday(&trc->tv);
+    if(trc_callback1)
+        trc->callback_val1 = trc_callback1(trc_param1);
+    if(trc_callback2)
+        trc->callback_val2 = trc_callback2(trc_param2);
+    va_start(args, fmt);
+    vsprintf(trc->str,fmt,args);
+    va_end(args);
+        trc->valid = 1;
+        if((++trc_index) == TRACE_ARR_LEN) {
+                trc_index = 0;
+    }
+}
+void TRC_OUTPUT(void)
+{
+        int i,j;
+        struct trace *p;
+        printk("\n\nTrace %d items\n",TRACE_ARR_LEN);
+        for(i=0,j=trc_index; i<TRACE_ARR_LEN; i++,j++) {
+                if(j == TRACE_ARR_LEN)
+                        j = 0;
+                p = &trc_arr[j];
+                if(p->valid) {
+            unsigned long uoffs;
+            struct trace *plast;
+            if(p == &trc_arr[0])
+                plast = &trc_arr[TRACE_ARR_LEN-1];
+            else
+                plast = p-1;
+            if(p->tv.tv_sec == ((plast)->tv.tv_sec))
+                uoffs = (p->tv.tv_usec - ((plast)->tv.tv_usec));
+            else
+                uoffs = (1000000 - ((plast)->tv.tv_usec)) +
+                    ((p->tv.tv_sec - ((plast)->tv.tv_sec) - 1) * 1000000) + 
+                    p->tv.tv_usec;
+                        printk("%03d: [+%ld usec]", j, (unsigned long)uoffs);
+            if(trc_callback1)
+                printk("[%u]",p->callback_val1);
+            if(trc_callback2)
+                printk("[%u]",p->callback_val2);
+            printk(": %s",p->str);
+        }
+                p->valid = 0;
+        }
+        memset(trc_arr,0,TRACE_ARR_LEN*sizeof(struct trace));
+        trc_index = 0;
+}
+void TRC_RELEASE(void)
+{
+        kfree(trc_arr);
+        trc_index = 0;
+}
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/dbg-trace.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/dbg-trace.h
@@ -0,0 +1,24 @@
+
+#ifndef _MV_DBG_TRCE_H_
+#define _MV_DBG_TRCE_H_
+
+#ifdef CONFIG_MV_DBG_TRACE
+void TRC_INIT(void *callback1, void *callback2, 
+    unsigned char callback1_param, unsigned char callback2_param);
+void TRC_REC(char *fmt,...);
+void TRC_OUTPUT(void);
+void TRC_RELEASE(void);
+void TRC_START(void);
+void TRC_STOP(void);
+
+#else
+#define TRC_INIT(x1,x2,x3,x4)
+#define TRC_REC(X...)
+#define TRC_OUTPUT()
+#define TRC_RELEASE()
+#define TRC_START()
+#define TRC_STOP()
+#endif
+
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/Makefile
@@ -0,0 +1,23 @@
+#*******************************************************************************
+# Marvell GPL License Option
+#
+# If you received this File from Marvell, you may opt to use, redistribute and/or 
+# modify this File in accordance with the terms and conditions of the General 
+# Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+# available along with the File in the license.txt file or by writing to the Free 
+# Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+# on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+#
+# THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+# WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+# DISCLAIMED.  The GPL License provides additional details about this warranty 
+# disclaimer.
+#*******************************************************************************/
+include $(srctree)/$(subst ",,$(CONFIG_MV_HAL_RULES_PATH))
+
+# Objects list
+
+obj-$(CONFIG_MV_HAL_DRIVERS_SUPPORT)	+= mvKW_HAL_glue.o export.o 
+
+obj-$(CONFIG_MV_DBG_TRACE)	+= dbg-trace.o
+obj-y    	+= mv_hal_sys/
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/export.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/export.c
@@ -0,0 +1,270 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/types.h>
+#include <linux/kernel.h>
+
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "mvKW_HAL_glue.h"
+#include "mvDebug.h"
+#include "mvSysHwConfig.h"
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "mvOs.h"
+
+
+/*************************************************************************************************************
+ * Environment 
+ *************************************************************************************************************/
+extern u32 mvTclk;
+extern u32 mvSysclk;
+//extern u32* mvUncachedParam;
+
+//EXPORT_SYMBOL(mv_early_printk);
+//EXPORT_SYMBOL(arm926_dma_inv_range);
+//EXPORT_SYMBOL(arm926_dma_flush_range);
+EXPORT_SYMBOL(mvCtrlPwrClckGet);
+//EXPORT_SYMBOL(mvCtrlModelRevGet);
+//EXPORT_SYMBOL(mvTclk);
+//EXPORT_SYMBOL(mvSysclk);
+EXPORT_SYMBOL(mvCtrlModelGet);
+EXPORT_SYMBOL(mvOsIoUncachedMalloc);
+EXPORT_SYMBOL(mvOsIoUncachedFree);
+EXPORT_SYMBOL(mvOsIoCachedMalloc);
+EXPORT_SYMBOL(mvOsIoCachedFree);
+EXPORT_SYMBOL(mvDebugMemDump);
+EXPORT_SYMBOL(mvHexToBin);
+EXPORT_SYMBOL(mvBinToHex);
+EXPORT_SYMBOL(mvSizePrint);
+#ifdef CONFIG_MV_INCLUDE_GIG_ETH
+EXPORT_SYMBOL(mvDebugPrintMacAddr);
+EXPORT_SYMBOL(mvCtrlEthMaxPortGet);
+//EXPORT_SYMBOL(mvCtrlTargetNameGet);
+//EXPORT_SYMBOL(mvBoardIdGet);
+EXPORT_SYMBOL(mvBoardPhyAddrGet);
+//EXPORT_SYMBOL(mvCpuIfTargetWinGet);
+EXPORT_SYMBOL(mvBoardMacSpeedGet);
+#endif
+EXPORT_SYMBOL(mvMacStrToHex);
+EXPORT_SYMBOL(mvBoardTclkGet);
+
+
+/*************************************************************************************************************
+ * Audio
+ *************************************************************************************************************/
+#ifdef CONFIG_MV_INCLUDE_AUDIO
+#include "audio/mvAudio.h"
+#include "mvSysAudioApi.h"
+EXPORT_SYMBOL(mvSPDIFRecordTclockSet);
+EXPORT_SYMBOL(mvSPDIFPlaybackCtrlSet);
+EXPORT_SYMBOL(mvI2SPlaybackCtrlSet);
+EXPORT_SYMBOL(mvAudioPlaybackControlSet);
+EXPORT_SYMBOL(mvAudioDCOCtrlSet);
+EXPORT_SYMBOL(mvI2SRecordCntrlSet);
+EXPORT_SYMBOL(mvAudioRecordControlSet);
+EXPORT_SYMBOL(mvSysAudioInit);
+EXPORT_SYMBOL(mvAudioHalInit);
+#endif
+
+/*************************************************************************************************************
+ * USB
+ *************************************************************************************************************/
+#ifdef CONFIG_MV_INCLUDE_USB
+
+#include "usb/mvUsb.h"
+EXPORT_SYMBOL(mvCtrlUsbMaxGet);
+EXPORT_SYMBOL(mvUsbGetCapRegAddr);
+#ifdef MV_USB_VOLTAGE_FIX
+EXPORT_SYMBOL(mvUsbGppInit);
+EXPORT_SYMBOL(mvUsbBackVoltageUpdate);
+#endif
+#endif /* CONFIG_MV_INCLUDE_USB */
+
+/*************************************************************************************************************
+ * CESA
+ *************************************************************************************************************/
+#ifdef CONFIG_MV_INCLUDE_CESA
+#include "mvSysCesaApi.h"
+#include "cesa/mvCesa.h"
+#include "cesa/mvMD5.h"
+#include "cesa/mvSHA1.h"
+//extern unsigned char*  mv_sram_usage_get(int* sram_size_ptr);
+EXPORT_SYMBOL(mvSysCesaInit);
+EXPORT_SYMBOL(mvCesaHalInit);
+EXPORT_SYMBOL(mvCesaSessionOpen);
+EXPORT_SYMBOL(mvCesaSessionClose);
+EXPORT_SYMBOL(mvCesaAction);
+EXPORT_SYMBOL(mvCesaReadyGet);
+EXPORT_SYMBOL(mvCesaCopyFromMbuf);
+EXPORT_SYMBOL(mvCesaCopyToMbuf);
+EXPORT_SYMBOL(mvCesaMbufCopy);
+EXPORT_SYMBOL(mvCesaCryptoIvSet);
+EXPORT_SYMBOL(mvMD5);
+EXPORT_SYMBOL(mvSHA1);
+
+EXPORT_SYMBOL(mvCesaDebugQueue);
+EXPORT_SYMBOL(mvCesaDebugSram);
+EXPORT_SYMBOL(mvCesaDebugSAD);
+EXPORT_SYMBOL(mvCesaDebugStatus);
+EXPORT_SYMBOL(mvCesaDebugMbuf);
+EXPORT_SYMBOL(mvCesaDebugSA);
+//EXPORT_SYMBOL(mv_sram_usage_get);
+#endif
+
+/*************************************************************************************************************
+ * Flashes
+ *************************************************************************************************************/
+#if defined (CONFIG_MV_INCLUDE_SPI)
+#include <sflash/mvSFlash.h>
+#include <sflash/mvSFlashSpec.h>
+EXPORT_SYMBOL(mvSFlashInit);
+EXPORT_SYMBOL(mvSFlashSectorErase);
+EXPORT_SYMBOL(mvSFlashChipErase);
+EXPORT_SYMBOL(mvSFlashBlockRd);
+EXPORT_SYMBOL(mvSFlashBlockWr);
+EXPORT_SYMBOL(mvSFlashIdGet);
+EXPORT_SYMBOL(mvSFlashWpRegionSet);
+EXPORT_SYMBOL(mvSFlashWpRegionGet);
+EXPORT_SYMBOL(mvSFlashStatRegLock);
+EXPORT_SYMBOL(mvSFlashSizeGet);
+EXPORT_SYMBOL(mvSFlashPowerSaveEnter);
+EXPORT_SYMBOL(mvSFlashPowerSaveExit);
+EXPORT_SYMBOL(mvSFlashModelGet);
+#endif
+
+
+/*************************************************************************************************************
+ * SATA
+ *************************************************************************************************************/
+#ifdef CONFIG_MV_INCLUDE_INTEG_SATA
+#include "mvSysSataApi.h"
+//EXPORT_SYMBOL(mvSataWinInit);
+#endif
+
+/*************************************************************************************************************
+ * DMA/XOR
+ *************************************************************************************************************/
+
+#if defined (CONFIG_MV_XORMEMCOPY)
+EXPORT_SYMBOL(asm_memcpy);
+EXPORT_SYMBOL(asm_memmove);
+#endif
+#if defined (CONFIG_MV_XORMEMZERO)
+EXPORT_SYMBOL(asm_memzero);
+#endif
+
+/*************************************************************************************************************
+ * Networking
+ *************************************************************************************************************/
+#ifdef CONFIG_MV_INCLUDE_GIG_ETH
+#include "eth/mvEth.h"
+#include "mvSysEthApi.h"
+#include "eth-phy/mvEthPhy.h"
+EXPORT_SYMBOL(mvSysEthInit);
+EXPORT_SYMBOL(mvEthHalInit);
+EXPORT_SYMBOL(mvEthPhyRegRead);
+EXPORT_SYMBOL(mvEthPhyRegWrite);
+
+#if defined (CONFIG_MV_GATEWAY)
+extern u32 overEthAddr;
+EXPORT_SYMBOL(overEthAddr);
+
+EXPORT_SYMBOL(mvEthPortTxDone);
+EXPORT_SYMBOL(mvEthPortDisable); 
+EXPORT_SYMBOL(ethResetTxDescRing); 
+EXPORT_SYMBOL(mvEthPortInit); 
+EXPORT_SYMBOL(mvEthPortEnable); 
+EXPORT_SYMBOL(ethResetRxDescRing); 
+EXPORT_SYMBOL(mvEthPortForceRx); 
+EXPORT_SYMBOL(mvEthPortRxDone); 
+EXPORT_SYMBOL(mvEthTxCoalSet); 
+EXPORT_SYMBOL(mvEthPortForceTxDone); 
+EXPORT_SYMBOL(mvEthTxResourceGet); 
+EXPORT_SYMBOL(mvEthRxResourceGet); 
+EXPORT_SYMBOL(mvEthPortFinish); 
+EXPORT_SYMBOL(mvEthMacAddrGet); 
+EXPORT_SYMBOL(mvEthPortTx); 
+EXPORT_SYMBOL(mvEthMaxRxSizeSet); 
+EXPORT_SYMBOL(mvEthPortRx); 
+EXPORT_SYMBOL(mvEthRxCoalSet); 
+EXPORT_SYMBOL(mvEthVlanPrioRxQueue); 
+EXPORT_SYMBOL(mvEthRxFilterModeSet);
+EXPORT_SYMBOL(mvEthMacAddrSet); 
+
+
+#include "msApiDefs.h"
+#include "msApiPrototype.h"
+EXPORT_SYMBOL(gcosSetPortDefaultTc);
+EXPORT_SYMBOL(gvlnSetPortVlanDBNum);
+EXPORT_SYMBOL(eventSetActive);
+EXPORT_SYMBOL(gprtSetPhyReg);
+EXPORT_SYMBOL(gprtSetPagedPhyReg);
+EXPORT_SYMBOL(gstpSetPortState);
+EXPORT_SYMBOL(gqosUserPrioMapEn);
+EXPORT_SYMBOL(gfdbFlushInDB);
+EXPORT_SYMBOL(gsysSetUseDoubleTagData);
+EXPORT_SYMBOL(gfdbAddMacEntry);
+EXPORT_SYMBOL(gfdbFindAtuMacEntry);
+EXPORT_SYMBOL(gqosSetPrioMapRule);
+EXPORT_SYMBOL(gprtSetCtrMode);
+EXPORT_SYMBOL(gsysSetPPUEn);
+EXPORT_SYMBOL(gvlnSetPortVid);
+EXPORT_SYMBOL(gprtClearAllCtr);
+EXPORT_SYMBOL(gprtSetDoubleTag);
+EXPORT_SYMBOL(gfdbDelAtuEntry);
+EXPORT_SYMBOL(gprtSetVlanTunnel);
+EXPORT_SYMBOL(gqosIpPrioMapEn);
+EXPORT_SYMBOL(gprtSetProviderTag);
+EXPORT_SYMBOL(gsysSetCPUPort);
+EXPORT_SYMBOL(gstatsFlushAll);
+EXPORT_SYMBOL(gprtSetForceFc);
+EXPORT_SYMBOL(gfdbFlush);
+EXPORT_SYMBOL(qdLoadDriver);
+EXPORT_SYMBOL(gprtSetEgressMode);
+EXPORT_SYMBOL(gprtPhyIntEnable);
+EXPORT_SYMBOL(gvlnSetPortVlanDot1qMode);
+EXPORT_SYMBOL(eventGetIntStatus);
+EXPORT_SYMBOL(gstatsGetPortAllCounters3);
+EXPORT_SYMBOL(gprtGetDuplex);
+EXPORT_SYMBOL(gvlnSetPortVlanPorts);
+EXPORT_SYMBOL(gprtGetLinkState);
+EXPORT_SYMBOL(gprtGetPhyIntStatus);
+EXPORT_SYMBOL(gfdbGetAtuEntryNext);
+EXPORT_SYMBOL(gvtuAddEntry);
+EXPORT_SYMBOL(gprtGetPhyIntPortSummary);
+EXPORT_SYMBOL(gprtGetSpeedMode);
+EXPORT_SYMBOL(gsysSetJumboMode);
+EXPORT_SYMBOL(gprtSetHeaderMode);
+#ifdef CONFIG_MV_GTW_IGMP
+EXPORT_SYMBOL(gprtSetIGMPSnoop);
+#endif 
+
+#ifdef CONFIG_ETH_MULTI_Q
+#include "ethfp/mvEthPolicy.h"
+extern int MAX_SOFTIRQ_RESTART;
+extern int netdev_max_backlog;
+EXPORT_SYMBOL(MAX_SOFTIRQ_RESTART);
+EXPORT_SYMBOL(netdev_max_backlog);
+EXPORT_SYMBOL(mvMacHexToStr); 
+EXPORT_SYMBOL(mvAsciiToHex);
+EXPORT_SYMBOL(gcosSetDscp2Tc);
+EXPORT_SYMBOL(mvEthRxPolicyInit); 
+EXPORT_SYMBOL(mvEthRxPolicyGet); 
+#endif 
+
+#endif /* CONFIG_MV_GATEWAY */
+#endif
+#ifdef CONFIG_MV88F6281
+//EXPORT_SYMBOL(mvUncachedParam);
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/mvKW_HAL_glue.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/mvKW_HAL_glue.h
@@ -0,0 +1,85 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+*******************************************************************************/
+/*******************************************************************************
+* mvKW_HAL_glue - 
+*
+* DESCRIPTION:
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+#include "mvOs.h"
+#include "mvCommon.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+
+#if 1
+MV_U32 mvCtrlEthMaxPortGet(MV_VOID);
+MV_U16 mvCtrlModelGet(MV_VOID);
+MV_U8 mvCtrlRevGet(MV_VOID);
+#endif
+
+
+MV_U32 mvBoardTclkGet(MV_VOID);
+
+#ifdef CONFIG_MV_INCLUDE_GIG_ETH
+MV_32 mvBoardPhyAddrGet(MV_U32 ethPortNum);
+MV_ETH_MAC_SPEED      mvBoardMacSpeedGet(MV_U32 ethPortNum);
+
+MV_BOOL mvBoardIsPortInSgmii(MV_U32 ethPortNum);
+void    mvEthInit(void);
+#endif
+
+MV_BOOL mvBoardSpecInitGet(MV_U32* regOff, MV_U32* data);
+
+MV_U32 mvCpuPclkGet(MV_VOID);
+
+MV_U32  mvCpuL2ClkGet(MV_VOID);
+MV_BOOL	mvCtrlPwrClckGet(MV_UNIT_ID unitId, MV_U32 index);
+#ifdef CONFIG_MV_INCLUDE_AUDIO
+MV_STATUS mvAudioInit(MV_U8 unit);
+#endif
+#ifdef CONFIG_MV_INCLUDE_XOR
+MV_STATUS mvXorInit (MV_VOID);
+#endif
+MV_U8 mvBoardA2DTwsiChanNumGet(MV_U8 unit);
+MV_U8 mvBoardA2DTwsiAddrTypeGet(MV_U8 unit);
+MV_U8 mvBoardA2DTwsiAddrGet(MV_U8 port);
+
+#ifdef CONFIG_MV_INCLUDE_CESA
+
+MV_STATUS mvCesaInit (int numOfSession, int queueDepth, char* pSramBase, void *osHandle);
+#endif
+
+MV_U32 mvCtrlUsbMaxGet(void);
+MV_32 mvBoardUSBVbusGpioPinGet(int devId);
+MV_32 mvBoardUSBVbusEnGpioPinGet(int devId);
+MV_U32 mv_crypto_base_get(void);
+MV_U32 mv_crypto_phys_base_get(void);
+MV_U32 mv_crypto_irq_get(void);
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/mvRules.mk
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/mvRules.mk
@@ -0,0 +1,157 @@
+# This flags will be used only by the Marvell arch files compilation.
+
+###################################################################################################
+# General definitions
+##################################################################################################
+CPU_ARCH    = ARM
+CHIP        = 88F6781
+VENDOR      = Marvell
+ifeq ($(CONFIG_CPU_BIG_ENDIAN),y)
+ENDIAN      = BE
+else
+ENDIAN      = LE
+endif
+
+###################################################################################################
+# directory structure
+###################################################################################################
+# Main directory structure
+SRC_PATH          = $(srctree)/arch/arm/mach-dove
+PLAT_PATH	  = $(srctree)/arch/arm/plat-orion/mv_hal_drivers
+PLAT_DRIVERS	  = $(PLAT_PATH)/mv_drivers_lsp
+HAL_DIR           = $(PLAT_PATH)/mv_hal
+COMMON_DIR        = $(PLAT_PATH)/common
+OSSERV_DIR        = $(PLAT_PATH)/linux_oss
+LSP_DIR           = $(SRC_PATH)/mv_hal_support
+CONFIG_DIR        = $(LSP_DIR)/config
+HAL_SYS_DIR	  = $(LSP_DIR)/mv_hal_sys
+
+# HALs
+HAL_ETHPHY_DIR    = $(HAL_DIR)/eth-phy
+HAL_FLASH_DIR     = $(HAL_DIR)/flash
+HAL_RTC_DIR       = $(HAL_DIR)/rtc/integ_rtc
+HAL_VOICEBAND     = $(HAL_DIR)/voiceband
+HAL_SLIC_DIR      = $(HAL_VOICEBAND)/slic
+HAL_DAA_DIR       = $(HAL_VOICEBAND)/daa
+HAL_SATA_DIR      = $(HAL_DIR)/sata/CoreDriver/
+HAL_QD_DIR        = $(HAL_DIR)/qd-dsdt
+HAL_SFLASH_DIR    = $(HAL_DIR)/sflash
+HAL_CNTMR_DIR     = $(HAL_DIR)/cntmr
+HAL_DRAM_DIR      = $(HAL_DIR)/ddr2
+HAL_DRAM_SPD_DIR  = $(HAL_DRAM_DIR)/spd
+HAL_DRAM_ARCH_DIR = $(HAL_DRAM_DIR)/Arch$(CPU_ARCH)
+HAL_GPP_DIR       = $(HAL_DIR)/gpp
+HAL_PDMA_DIR      = $(HAL_DIR)/pdma
+HAL_TWSI_DIR      = $(HAL_DIR)/twsi
+HAL_TWSI_ARCH_DIR = $(SOC_TWSI_DIR)/Arch$(CPU_ARCH)
+HAL_UART_DIR      = $(HAL_DIR)/uart
+HAL_ETH_DIR       = $(HAL_DIR)/eth/gbe
+HAL_ETH_NFP_DIR	  = $(HAL_DIR)/eth/nfp
+HAL_DDRMC_DIR	  = $(HAL_DIR)/ddr/ddrmc
+
+ifeq ($(CONFIG_MV_INCLUDE_PEX),y)
+HAL_PEX_DIR       = $(HAL_DIR)/pex
+endif
+ifeq ($(CONFIG_MV_INCLUDE_TDM),y)
+HAL_TDM_DIR       = $(HAL_DIR)/voiceband/tdm
+endif
+ifeq ($(CONFIG_MV_INCLUDE_USB),y)
+HAL_USB_DIR       = $(HAL_DIR)/usb
+endif
+ifeq ($(CONFIG_MV_INCLUDE_CESA),y)
+HAL_CESA_DIR	  = $(HAL_DIR)/cesa
+HAL_CESA_AES_DIR  = $(HAL_DIR)/cesa/AES
+endif
+ifeq ($(CONFIG_MV_INCLUDE_XOR),y)
+HAL_XOR_DIR       = $(HAL_DIR)/xor
+endif
+ifeq ($(CONFIG_MV_INCLUDE_SPI),y)
+HAL_SPI_DIR       = $(HAL_DIR)/spi
+endif
+ifeq ($(CONFIG_MV_INCLUDE_AUDIO),y)
+HAL_AUDIO_DIR     = $(HAL_DIR)/audio
+endif
+ifeq ($(CONFIG_MV_INCLUDE_TS),y)
+HAL_TS_DIR      = $(HAL_DIR)/ts
+endif
+HAL_PMU_DIR      = $(HAL_DIR)/pmu
+ifeq ($(CONFIG_MV_INCLUDE_NFC),y)
+HAL_NFC_DIR      = $(HAL_DIR)/nfc
+endif
+
+# Environment components
+DOVE_FAM_DIR	    = $(LSP_DIR)/dove_family
+SOC_DEVICE_DIR      = $(DOVE_FAM_DIR)/device
+SOC_CPU_DIR         = $(DOVE_FAM_DIR)/cpu
+BOARD_ENV_DIR       = $(DOVE_FAM_DIR)/boardEnv
+SOC_ENV_DIR         = $(DOVE_FAM_DIR)/ctrlEnv
+SOC_SYS_DIR	    = $(OSSERV_DIR)/ctrlEnv/sys
+
+#####################################################################################################
+# Include path
+###################################################################################################
+
+LSP_PATH_I      = $(srctree)/arch/arm/mach-dove
+PLAT_PATH_I	= $(srctree)/arch/arm/plat-orion/mv_hal_drivers
+
+##HAL_PATH        = -I$(HAL_DIR) -I$(PLAT_PATH_I)/$(HAL_DIR) -I$(PLAT_PATH_I)/$(HAL_SATA_DIR)
+HAL_PATH        = -I$(HAL_DIR) -I$(HAL_SATA_DIR)
+
+##DOVE_FAM_PATH  =  -I$(LSP_PATH_I)/$(DOVE_FAM_DIR)
+DOVE_FAM_PATH  =  -I$(DOVE_FAM_DIR)
+##QD_PATH         = -I$(PLAT_PATH_I)/$(HAL_QD_DIR)/Include  -I$(PLAT_PATH_I)/$(HAL_QD_DIR)/Include/h/msApi 	\
+##                  -I$(PLAT_PATH_I)/$(HAL_QD_DIR)/Include/h/driver -I$(PLAT_PATH_I)/$(HAL_QD_DIR)/Include/h/platform
+QD_PATH         = -I$(HAL_QD_DIR)/Include  -I$(HAL_QD_DIR)/Include/h/msApi 	\
+                  -I$(HAL_QD_DIR)/Include/h/driver -I$(HAL_QD_DIR)/Include/h/platform
+                    
+##COMMON_PATH   	= -I$(PLAT_PATH_I)/$(COMMON_DIR)
+COMMON_PATH   	= -I$(COMMON_DIR)
+
+##OSSERV_PATH     = -I$(PLAT_PATH_I)/$(OSSERV_DIR)
+OSSERV_PATH     = -I$(OSSERV_DIR)
+
+##LSP_PATH        = -I$(LSP_PATH_I)/$(LSP_DIR)
+LSP_PATH        = -I$(LSP_DIR)
+
+##CONFIG_PATH     = -I$(LSP_PATH_I)/$(CONFIG_DIR)
+CONFIG_PATH     = -I$(CONFIG_DIR)
+
+##HAL_SYS_PATH    = -I$(LSP_PATH_I)/$(HAL_SYS_DIR)
+HAL_SYS_PATH    = -I$(HAL_SYS_DIR)
+
+EXTRA_INCLUDE  	= $(OSSERV_PATH) $(COMMON_PATH) $(HAL_PATH)  $(DOVE_FAM_PATH) \
+                  $(LSP_PATH) $(CONFIG_PATH) $(HAL_SYS_PATH)
+
+###################################################################################################
+# defines
+###################################################################################################
+MV_DEFINE = -DMV_LINUX -DMV_CPU_$(ENDIAN) -DMV_$(CPU_ARCH) -DLINUX
+
+EXTRA_CFLAGS 	+= $(EXTRA_INCLUDE) $(MV_DEFINE)
+
+ifeq ($(CONFIG_MV_GATEWAY),y)
+EXTRA_CFLAGS   += $(QD_PATH)
+EXTRA_CFLAGS    += -DLINUX
+endif
+
+ifeq ($(CONFIG_MV_CESA_TEST),y)
+EXTRA_CFLAGS 	+= -DCONFIG_MV_CESA_TEST
+endif
+
+ifeq ($(CONFIG_SATA_DEBUG_ON_ERROR),y)
+EXTRA_CFLAGS    += -DMV_LOG_ERROR
+endif
+
+ifeq ($(CONFIG_SATA_FULL_DEBUG),y)
+EXTRA_CFLAGS    += -DMV_LOG_DEBUG
+endif
+
+ifeq ($(CONFIG_MV_SATA_SUPPORT_ATAPI),y)
+EXTRA_CFLAGS    += -DMV_SUPPORT_ATAPI
+endif
+
+ifeq ($(CONFIG_MV_SATA_ENABLE_1MB_IOS),y)
+EXTRA_CFLAGS    += -DMV_SUPPORT_1MBYTE_IOS
+endif
+
+EXTRA_CFLAGS    += -DMV88F6781
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysSpi.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysSpi.c
@@ -0,0 +1,93 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "boardEnv/mvBoardEnvLib.h"
+#include "spi/mvSpi.h"
+
+/*******************************************************************************
+* mvSysSpiInit - Initialize the SPI subsystem
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       None
+* OUTPUT:
+*		None
+* RETURN:
+*       None
+*
+*******************************************************************************/
+MV_STATUS   mvSysSpiInit(MV_U8 spiId, MV_U32 serialBaudRate)
+{
+	MV_SPI_HAL_DATA halData;
+
+	halData.ctrlModel = mvCtrlModelGet();
+	halData.tclk = mvBoardTclkGet();
+
+	return mvSpiInit(spiId, serialBaudRate, &halData);
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysPciIfApi.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysPciIfApi.h
@@ -0,0 +1,77 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __MV_SYS_PCIIF_API_H__
+#define __MV_SYS_PCIIF_API_H__
+
+
+MV_STATUS mvSysPciIfInit(MV_U32 pciIf, PCI_IF_MODE pciIfmode);
+
+
+
+
+
+
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysEthApi.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysEthApi.h
@@ -0,0 +1,78 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __MV_SYS_ETH_API_H__
+#define __MV_SYS_ETH_API_H__
+
+
+MV_VOID mvSysEthInit(void);
+MV_VOID     mvEthAddrDecShow(MV_VOID);
+
+
+
+
+
+
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysUsb.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysUsb.c
@@ -0,0 +1,104 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+//#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "mvKW_HAL_glue.h"
+#include "usb/mvUsb.h"
+#include "ctrlEnv/mvCtrlEnvAddrDec.h"
+#include "usb/mvUsbRegs.h"
+
+/*******************************************************************************
+* mvSysUsbHalInit - Initialize the USB subsystem
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       None
+* OUTPUT:
+*		None
+* RETURN:
+*       None
+*
+*******************************************************************************/
+MV_STATUS   mvSysUsbInit(MV_U32 dev, MV_BOOL isHost)
+{
+	MV_USB_HAL_DATA halData;
+	MV_UNIT_WIN_INFO addrWinMap[MAX_TARGETS + 1];
+	MV_STATUS status = MV_OK;
+#if 0
+	status = mvCtrlAddrWinMapBuild(addrWinMap, MAX_TARGETS + 1);
+	if(status == MV_OK)
+		status = mvUsbWinInit(dev, addrWinMap);
+#endif
+	if(status == MV_OK) {
+		halData.ctrlModel = mvCtrlModelGet();
+		halData.ctrlRev = mvCtrlRevGet();
+		status = mvUsbHalInit(dev, isHost, &halData);
+	}
+
+	return status;
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysPdmaApi.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysPdmaApi.h
@@ -0,0 +1,73 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __MV_SYS_PDMA_API_H__
+#define __MV_SYS_PDMA_API_H__
+
+
+MV_STATUS mvSysPdmaInit (MV_VOID);
+MV_VOID mvPdmaAddrDecShow(MV_VOID);
+
+#endif
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysSata.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysSata.c
@@ -0,0 +1,85 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "sata/CoreDriver/mvSata.h"
+#include "ctrlEnv/mvCtrlEnvAddrDec.h"
+
+MV_STATUS mvSysSataWinInit(MV_VOID)
+{
+	MV_UNIT_WIN_INFO addrWinMap[MAX_TARGETS + 1];
+	MV_STATUS status;
+
+	status = mvCtrlAddrWinMapBuild(addrWinMap, MAX_TARGETS + 1);
+	if(status == MV_OK)
+		status = mvSataWinInit(addrWinMap);
+
+	return status;
+}
+
+
+MV_VOID   mvSataAddrDecShow(MV_VOID);
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysCesaApi.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysCesaApi.h
@@ -0,0 +1,73 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __MV_SYS_CESA_API_H__
+#define __MV_SYS_CESA_API_H__
+
+
+
+MV_STATUS mvSysCesaInit (int numOfSession, int queueDepth, char* pSramBase, MV_U32 cryptEngBase,
+		void *osHandle);
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysPdma.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysPdma.c
@@ -0,0 +1,133 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "pdma/mvPdma.h"
+#include "ctrlEnv/mvCtrlEnvAddrDec.h"
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "pdma/mvPdmaRegs.h"
+
+MV_STATUS mvSysPdmaInit (MV_VOID)
+{
+	MV_UNIT_WIN_INFO addrWinMap[MAX_TARGETS + 1];
+	MV_STATUS status;
+
+	status = mvCtrlAddrWinMapBuild(addrWinMap, MAX_TARGETS + 1);
+	if(status == MV_OK)
+		status = mvPdmaWinInit(addrWinMap);
+
+	if(status == MV_OK)
+		status = mvPdmaHalInit(MV_PDMA_MAX_CHANNELS_NUM);
+
+	return status;
+}
+
+/*******************************************************************************
+* mvPdmaAddrDecShow - Print the PDMA address decode map.
+*
+* DESCRIPTION:
+*		This function print the PDMA address decode map.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_VOID mvPdmaAddrDecShow(MV_VOID)
+{
+	MV_UNIT_WIN_INFO win;
+	int i;
+
+	mvOsOutput("\n");
+	mvOsOutput("PDMA:\n");
+	mvOsOutput("-----\n");
+
+	for (i = 0; i < PDMA_MAX_ADDR_DEC_WIN; i++) {
+		memset(&win, 0, sizeof(MV_UNIT_WIN_INFO));
+
+		mvOsOutput("win%d - ", i);
+
+		if (mvPdmaWinRead(i, &win) == MV_OK) {
+			if (win.enable) {
+                		mvOsOutput("%s base %08x, ",
+						mvCtrlTargetNameGet(mvCtrlTargetByWinInfoGet(&win)), win.addrWin.baseLow);
+                		mvOsOutput("....");
+
+                		mvSizePrint(win.addrWin.size);
+
+				mvOsOutput("\n");
+			}
+			else
+				mvOsOutput("disable\n");
+		}
+	}
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysUsbApi.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysUsbApi.h
@@ -0,0 +1,71 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __MV_SYS_USB_API_H__
+#define __MV_SYS_USB_API_H__
+
+
+MV_STATUS   mvSysUsbInit(MV_U32 dev, MV_BOOL isHost);
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysPexApi.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysPexApi.h
@@ -0,0 +1,78 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __MV_SYS_PEX_API_H__
+#define __MV_SYS_PEX_API_H__
+
+
+MV_STATUS mvSysPexHalInit(MV_U32 pexIf, MV_PEX_TYPE pexType);
+
+/* mvPexAddrDecShow - Display address decode windows attributes */
+MV_VOID mvPexAddrDecShow(MV_VOID);
+
+
+
+
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysEthPhy.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysEthPhy.c
@@ -0,0 +1,96 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "boardEnv/mvBoardEnvLib.h"
+#include "eth-phy/mvEthPhy.h"
+
+
+/*******************************************************************************
+* mvSysEthPhyInit - Initialize the EthPhy subsystem
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       None
+* OUTPUT:
+*		None
+* RETURN:
+*       None
+*
+*******************************************************************************/
+MV_STATUS mvSysEthPhyInit(void)
+{
+	MV_ETHPHY_HAL_DATA halData;
+	MV_U32 port;
+
+	for (port=0; port < mvCtrlEthMaxPortGet(); port++) {
+		halData.phyAddr[port] = mvBoardPhyAddrGet(port);
+		halData.boardSpecInit = MV_FALSE;
+	}
+
+	return mvEthPhyHalInit(&halData);
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/Makefile
@@ -0,0 +1,24 @@
+#*******************************************************************************
+# Marvell GPL License Option
+#
+# If you received this File from Marvell, you may opt to use, redistribute and/or 
+# modify this File in accordance with the terms and conditions of the General 
+# Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+# available along with the File in the license.txt file or by writing to the Free 
+# Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+# on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+#
+# THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+# WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+# DISCLAIMED.  The GPL License provides additional details about this warranty 
+# disclaimer.
+#*******************************************************************************/
+include $(srctree)/$(subst ",,$(CONFIG_MV_HAL_RULES_PATH))
+
+# Objects list
+
+obj-$(CONFIG_MV_INCLUDE_CESA)		+= mvSysCesa.o
+obj-$(CONFIG_MV_INCLUDE_GIG_ETH)	+= mvSysEth.o
+obj-$(CONFIG_MV_INCLUDE_AUDIO)		+= mvSysAudio.o
+obj-$(CONFIG_MV_INCLUDE_USB)		+= mvSysUsb.o
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysAudioApi.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysAudioApi.h
@@ -0,0 +1,76 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __MV_SYS_AUDIO_API_H__
+#define __MV_SYS_AUDIO_API_H__
+
+
+
+MV_VOID mvSysAudioInit(MV_U8 unit);
+
+MV_VOID   mvAudioAddrDecShow(MV_VOID);
+
+
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysSpiApi.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysSpiApi.h
@@ -0,0 +1,77 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __MV_SYS_SPI_API_H__
+#define __MV_SYS_SPI_API_H__
+
+
+
+MV_STATUS   mvSysSpiInit(MV_U8 spi_id, MV_U32 serialBaudRate);
+
+
+
+
+
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysCesa.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysCesa.c
@@ -0,0 +1,105 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvLib.h"
+//#include "boardEnv/mvBoardEnvLib.h"
+#include "mvKW_HAL_glue.h"
+#include "cesa/mvCesa.h"
+
+/*******************************************************************************
+* mvSysCesaInit - Initialize the Cesa subsystem
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       None
+* OUTPUT:
+*		None
+* RETURN:
+*       None
+*
+*******************************************************************************/
+MV_STATUS mvSysCesaInit(int numOfSession, int queueDepth, char* pSramBase, MV_U32 cryptEngBase,
+		void *osHandle)
+{
+	MV_CESA_HAL_DATA halData;
+	MV_UNIT_WIN_INFO addrWinMap[MAX_TARGETS + 1];
+	MV_STATUS status = MV_OK;
+#if 0
+	status = mvCtrlAddrWinMapBuild(addrWinMap, MAX_TARGETS + 1);
+	if(status == MV_OK)
+		status = mvCesaTdmaWinInit(addrWinMap);
+#endif
+	if(status == MV_OK) {
+		halData.ctrlModel = mvCtrlModelGet();
+		halData.ctrlRev = mvCtrlRevGet();
+		status = mvCesaHalInit (numOfSession, queueDepth, pSramBase,
+				cryptEngBase, osHandle, &halData);
+	}
+
+	return status;
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysEth.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysEth.c
@@ -0,0 +1,125 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+//#include "ctrlEnv/mvCtrlEnvLib.h"
+//#include "boardEnv/mvBoardEnvLib.h"
+#include "eth/mvEth.h"
+//#include "cpu/mvCpu.h"
+#include "mvKW_HAL_glue.h"
+
+/*******************************************************************************
+* mvSysEthInit - Initialize the Eth subsystem
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       None
+* OUTPUT:
+*		None
+* RETURN:
+*       None
+*
+*******************************************************************************/
+MV_VOID mvSysEthInit(MV_VOID)
+{
+	MV_ETH_HAL_DATA halData;
+	MV_U32 port;
+	MV_UNIT_WIN_INFO addrWinMap[MAX_TARGETS + 1];
+	MV_STATUS status = MV_OK;
+
+#if 0
+	status = mvCtrlAddrWinMapBuild(addrWinMap, MAX_TARGETS + 1);
+	if(status != MV_OK)
+		return;
+#endif
+	halData.maxPortNum = mvCtrlEthMaxPortGet();
+	halData.cpuPclk = mvCpuPclkGet();
+	halData.tclk = mvBoardTclkGet();
+#ifdef ETH_DESCR_IN_SRAM
+	halData.sramSize = mvCtrlSramSizeGet();
+#endif
+
+	for (port=0;port < halData.maxPortNum;port++) {
+		if(mvCtrlPwrClckGet(ETH_GIG_UNIT_ID, port) == MV_FALSE) {
+			halData.portData[port].powerOn = MV_FALSE;
+			continue;
+		}
+#if 0
+		status = mvEthWinInit(port, addrWinMap);
+#endif
+		if(status == MV_OK) {
+			halData.portData[port].powerOn = MV_TRUE;
+			halData.portData[port].phyAddr = mvBoardPhyAddrGet(port);
+			halData.portData[port].isSgmii = mvBoardIsPortInSgmii(port);
+			halData.portData[port].macSpeed = mvBoardMacSpeedGet(port);
+		}
+	}
+
+	mvEthHalInit(&halData);
+
+	return;
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysSataApi.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysSataApi.h
@@ -0,0 +1,72 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __MV_SYS_SATA_API_H__
+#define __MV_SYS_SATA_API_H__
+
+MV_STATUS mvSysSataWinInit(MV_VOID);
+MV_VOID   mvSataAddrDecShow(MV_VOID);
+
+#endif 
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysPciIf.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysPciIf.c
@@ -0,0 +1,316 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "boardEnv/mvBoardEnvLib.h"
+#include "pci-if/mvPciIf.h"
+#include "pci-if/pex/mvPex.h"
+#include "pci-if/pex/mvPexRegs.h"
+
+MV_STATUS mvPexTargetWinGet(MV_U32 pexIf, MV_U32 winNum, MV_PEX_DEC_WIN *pAddrDecWin);
+
+
+/*******************************************************************************
+* mvSysPciIfInit - Initialize the PCI subsystem
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       None
+* OUTPUT:
+*		None
+* RETURN:
+*       None
+*
+*******************************************************************************/
+MV_STATUS mvSysPciIfInit(MV_U32 pciIf, PCI_IF_MODE pciIfmode)
+{
+	MV_PCIIF_HAL_DATA halData;
+	MV_UNIT_WIN_INFO addrWinMap[MAX_TARGETS + 1];
+	MV_STATUS status;
+
+	status = mvCtrlAddrWinMapBuild(addrWinMap, MAX_TARGETS + 1);
+	if(status == MV_OK)
+		status = mvPciIfWinInit(pciIf, pciIfmode, addrWinMap);
+
+	if(status == MV_OK) {
+		halData.ctrlModel = mvCtrlModelGet();
+		halData.maxPexIf = mvCtrlPexMaxIfGet();
+		status = mvPciIfInit(pciIf, pciIfmode, &halData);
+	}
+
+	return status;
+}
+
+/*******************************************************************************
+* mvPexAddrDecShow - Print the PEX address decode map (BARs and windows).
+*
+* DESCRIPTION:
+*		This function print the PEX address decode map (BARs and windows).
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_VOID mvPexAddrDecShow(MV_VOID)
+{
+	MV_PEX_BAR pexBar;
+	MV_PEX_DEC_WIN win;
+	MV_U32 pexIf;
+	MV_U32 bar,winNum;
+
+	for( pexIf = 0; pexIf < mvCtrlPexMaxIfGet(); pexIf++ )
+	{
+		if (MV_FALSE == mvCtrlPwrClckGet(PEX_UNIT_ID, pexIf)) continue;
+		mvOsOutput( "\n" );
+		mvOsOutput( "PEX%d:\n", pexIf );
+		mvOsOutput( "-----\n" );
+
+		mvOsOutput( "\nPex Bars \n\n");
+
+		for( bar = 0; bar < PEX_MAX_BARS; bar++ ) 
+		{
+			memset( &pexBar, 0, sizeof(MV_PEX_BAR) );
+
+			mvOsOutput( "%s ", pexBarNameGet(bar) );
+
+			if( mvPexBarGet( pexIf, bar, &pexBar ) == MV_OK )
+			{
+				if( pexBar.enable )
+				{
+                    			mvOsOutput( "base %08x, ", pexBar.addrWin.baseLow );
+                    			mvSizePrint( pexBar.addrWin.size );
+                    			mvOsOutput( "\n" );
+				}
+				else
+					mvOsOutput( "disable\n" );
+			}
+		}
+		mvOsOutput( "\nPex Decode Windows\n\n");
+
+		for( winNum = 0; winNum < PEX_MAX_TARGET_WIN - 2; winNum++)
+		{
+			memset( &win, 0,sizeof(MV_PEX_DEC_WIN) );
+
+			mvOsOutput( "win%d - ", winNum );
+
+			if ( mvPexTargetWinGet(pexIf,winNum,&win) == MV_OK)
+			{
+				if (win.winInfo.enable)
+				{
+					mvOsOutput( "%s base %08x, ",
+					mvCtrlTargetNameGet(win.target), win.winInfo.addrWin.baseLow );
+					mvOsOutput( "...." );
+					mvSizePrint( win.winInfo.addrWin.size );
+
+					mvOsOutput( "\n" );
+				}
+				else
+					mvOsOutput( "disable\n" );
+			}
+		}
+	
+		memset( &win, 0,sizeof(MV_PEX_DEC_WIN) );
+
+		mvOsOutput( "default win - " );
+
+		if ( mvPexTargetWinGet(pexIf, MV_PEX_WIN_DEFAULT, &win) == MV_OK)
+		{
+			mvOsOutput( "%s ",
+			mvCtrlTargetNameGet(win.target) );
+			mvOsOutput( "\n" );
+		}
+		memset( &win, 0,sizeof(MV_PEX_DEC_WIN) );
+
+		mvOsOutput( "Expansion ROM - " );
+
+		if ( mvPexTargetWinGet(pexIf, MV_PEX_WIN_EXP_ROM, &win) == MV_OK)
+		{
+			mvOsOutput( "%s ",
+			mvCtrlTargetNameGet(win.target) );
+			mvOsOutput( "\n" );
+		}
+	}
+}
+
+/*******************************************************************************
+* mvPexTargetWinGet - Get PEX to peripheral target address window
+*
+* DESCRIPTION:
+*		Get the PEX to peripheral target address window BAR.
+*
+* INPUT:
+*       pexIf - PEX interface number.
+*       bar   - BAR to be accessed by slave.
+*
+* OUTPUT:
+*       pAddrBarWin - PEX target window information data structure.
+*
+* RETURN:
+*       MV_BAD_PARAM for bad parameters ,MV_ERROR on error ! otherwise MV_OK
+*
+*******************************************************************************/
+MV_STATUS mvPexTargetWinGet(MV_U32 pexIf, MV_U32 winNum, 
+                            MV_PEX_DEC_WIN *pAddrDecWin)
+{
+	MV_TARGET_ATTRIB targetAttrib;
+	MV_DEC_REGS decRegs;
+
+	PEX_WIN_REG_INFO winRegInfo;
+
+	/* Parameter checking   */
+	if(pexIf >= mvCtrlPexMaxIfGet())
+	{
+		mvOsPrintf("mvPexTargetWinGet: ERR. Invalid PEX interface %d\n", pexIf);
+		return MV_BAD_PARAM;
+	}
+
+	if (winNum >= PEX_MAX_TARGET_WIN)
+	{
+		mvOsPrintf("mvPexTargetWinGet: ERR. Invalid PEX winNum %d\n", winNum);
+		return MV_BAD_PARAM;
+
+	}
+
+	/* get the pex Window registers offsets */
+	pexWinRegInfoGet(pexIf,winNum,&winRegInfo);
+
+	/* read base register*/
+	if (winRegInfo.baseLowRegOffs)
+	{
+		decRegs.baseReg = MV_REG_READ(winRegInfo.baseLowRegOffs);
+	}
+	else
+	{
+		decRegs.baseReg = 0;
+	}
+
+	/* read size reg */
+	if (winRegInfo.sizeRegOffs)
+	{
+		decRegs.sizeReg = MV_REG_READ(winRegInfo.sizeRegOffs);
+	}
+	else
+	{
+		decRegs.sizeReg =0;
+	}
+
+	if (MV_OK != mvCtrlRegToAddrDec(&decRegs,&(pAddrDecWin->winInfo.addrWin)))
+	{
+		mvOsPrintf("mvPexTargetWinGet: mvCtrlRegToAddrDec Failed \n");
+		return MV_ERROR;
+
+	}
+
+	if (decRegs.sizeReg & PXWCR_WIN_EN)
+	{
+		pAddrDecWin->winInfo.enable = MV_TRUE;
+	}
+	else
+	{
+		pAddrDecWin->winInfo.enable = MV_FALSE;	  
+
+	}
+
+
+	#if 0
+    	if (-1 == pAddrDecWin->addrWin.size)
+	{
+		return MV_ERROR;
+	}
+	#endif
+
+
+	/* get target bar */
+	if ((decRegs.sizeReg & PXWCR_WIN_BAR_MAP_MASK) == PXWCR_WIN_BAR_MAP_BAR1 )
+	{
+		pAddrDecWin->targetBar = 1;
+	} 
+	else if ((decRegs.sizeReg & PXWCR_WIN_BAR_MAP_MASK) == 
+			 PXWCR_WIN_BAR_MAP_BAR2 )
+	{
+		pAddrDecWin->targetBar = 2;
+	}
+
+	/* attrib and targetId */
+	pAddrDecWin->winInfo.attrib = (decRegs.sizeReg & PXWCR_ATTRIB_MASK) >> PXWCR_ATTRIB_OFFS;
+	pAddrDecWin->winInfo.targetId = (decRegs.sizeReg & PXWCR_TARGET_MASK) >> PXWCR_TARGET_OFFS;
+
+	targetAttrib.attrib = pAddrDecWin->winInfo.attrib;
+	targetAttrib.targetId = pAddrDecWin->winInfo.targetId;
+
+	pAddrDecWin->target = mvCtrlTargetGet(&targetAttrib);
+
+	return MV_OK;
+}
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysAudio.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysAudio.c
@@ -0,0 +1,175 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvTypes.h"
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvLib.h"
+//#include "boardEnv/mvBoardEnvLib.h"
+#include "mvKW_HAL_glue.h"
+#include "audio/mvAudio.h"
+//#include "twsi/mvTwsi.h"
+#include "audio/mvAudioRegs.h"
+
+
+/*******************************************************************************
+* mvSysAudioInit - Initialize the Audio subsystem
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       None
+* OUTPUT:
+*		None
+* RETURN:
+*       None
+*
+*******************************************************************************/
+MV_VOID mvSysAudioInit(MV_U8 unit)
+{
+	MV_AUDIO_HAL_DATA halData;
+	MV_UNIT_WIN_INFO addrWinMap[MAX_TARGETS + 1];
+	MV_STATUS status = MV_OK;
+#if 0
+	status = mvCtrlAddrWinMapBuild(addrWinMap, MAX_TARGETS + 1);
+	if(status == MV_OK)
+		status = mvAudioWinInit(unit, addrWinMap);
+#endif
+	if(status == MV_OK) {
+		halData.tclk = mvBoardTclkGet();
+		mvAudioHalInit(unit,&halData);
+	}
+
+	return;
+}
+
+#if 0
+/*******************************************************************************
+* mvSysAudioCodecRegRead
+*
+* DESCRIPTION:
+*	System interface for reading an Audio codec register.
+*
+* INPUT:
+*       codecHandle: Handle passed by OS glue by which an audio codec is
+*		     identified.
+*       regOffset:   Offset of codec register to be read.
+*
+* OUTPUT:
+*       regData:     Register data
+*
+* RETURN:
+*	MV_OK on success,
+*	MV_ERROR otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvSysAudioCodecRegRead(MV_VOID *codecHandle, MV_U32  regOffset, MV_U32 *regData)
+{
+	MV_TWSI_SLAVE slave;
+
+	slave.slaveAddr.address = mvBoardA2DTwsiAddrGet(0);
+	slave.slaveAddr.type = mvBoardA2DTwsiAddrTypeGet(0);
+    	slave.validOffset = MV_TRUE;
+    	slave.offset = regOffset;
+    	slave.moreThen256 = MV_FALSE;	
+
+	return mvTwsiRead(mvBoardA2DTwsiChanNumGet(0), &slave, (MV_U8*)regData, 1);
+}
+
+
+/*******************************************************************************
+* mvSysAudioCodecRegWrite
+*
+* DESCRIPTION:
+*	System interface for writing an Audio codec register.
+*
+* INPUT:
+*       codecHandle: Handle passed by OS glue by which an audio codec is
+*		     identified.
+*       regOffset:   Offset of codec register to be written. 
+*       regData:     Register data to write.
+*
+* OUTPUT:
+*	None.
+*
+* RETURN:
+*	MV_OK on success,
+*	MV_ERROR otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvSysAudioCodecRegWrite(MV_VOID *codecHandle, MV_U32  regOffset, MV_U32 regData)
+{
+	MV_TWSI_SLAVE slave;
+
+	slave.slaveAddr.address = mvBoardA2DTwsiAddrGet(0);
+	slave.slaveAddr.type = mvBoardA2DTwsiAddrTypeGet(0);
+    	slave.validOffset = MV_TRUE;
+    	slave.offset = regOffset;
+    	slave.moreThen256 = MV_FALSE;	
+
+	return	mvTwsiWrite(mvBoardA2DTwsiChanNumGet(0), &slave, (MV_U8*)&regData, 1);
+}
+
+#endif
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysSFlash.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysSFlash.c
@@ -0,0 +1,222 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "spi/mvSpi.h"
+#include "spi/mvSpiCmnd.h"
+#include "sflash/mvSysSFlash.h"
+
+#define MV_SYS_SFLASH_MAX_CMD_LEN 4
+
+static struct {
+	MV_U8 buf[MV_SYS_SFLASH_MAX_CMD_LEN];
+	MV_U32 bufLen;
+	MV_U8  transType;
+} mvSysSflashCmd;
+
+/*******************************************************************************
+* mvSysSflashCommandSet
+*
+* DESCRIPTION:
+*	System interface for sending a command to the SPI flash.
+*
+* INPUT:
+*       flashHandle: Handle passed by OS glue by which an SPI flash is
+*		     identified.
+*      	cmdBuff:     Command data to be written.
+*	cmdLen:	     Command length in bytes.
+*	transType:   Bitmask describing the transaction type, see 
+*		     SYS_SFLASH_TRANS_XX for details.
+*
+* OUTPUT:
+*	None.
+*
+* RETURN:
+*	MV_OK on success,
+*	MV_ERROR otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvSysSflashCommandSet(MV_VOID *flashHandle, MV_U8* cmdBuff, MV_U32 cmdLen,
+		MV_U8 transType)
+{
+	if (cmdLen > MV_SYS_SFLASH_MAX_CMD_LEN)
+		return MV_ERROR;
+
+	if (!(transType & SYS_SFLASH_TRANS_START) || (mvSysSflashCmd.transType != 0))
+		return MV_ERROR;	
+
+	memcpy(mvSysSflashCmd.buf,cmdBuff,cmdLen);	
+	mvSysSflashCmd.bufLen = cmdLen;
+	mvSysSflashCmd.transType = transType;
+
+	if (transType & SYS_SFLASH_TRANS_END)
+		return mvSysSflashDataWrite(flashHandle, NULL, 0, transType);
+
+	return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvSysSflashDataRead
+*
+* DESCRIPTION:
+*	System interface for reading SPI flash data.
+*
+* INPUT:
+*       flashHandle: Handle passed by OS glue by which an SPI flash is
+*		     identified.
+*	dataBuff:    Buffer to read the data into.
+*	dataLen:     Number of bytes to read.
+*	dummyBytes:  Number of dummy bytes to read before reading the real
+*		     data.
+*	transType:   Bitmask describing the transaction type, see 
+*		     SYS_SFLASH_TRANS_XX for details.
+*
+* OUTPUT:
+*	dataBuff: The data as read from flash.
+*
+* RETURN:
+*	MV_OK on success,
+*	MV_ERROR otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvSysSflashDataRead(MV_VOID *flashHandle, MV_U8* dataBuff, MV_U32 dataLen,
+		MV_U32 dummyBytes, MV_U8 transType)
+{
+	MV_STATUS  ret;	
+
+	if (!(mvSysSflashCmd.transType & SYS_SFLASH_TRANS_START))
+		return MV_ERROR;
+
+	ret = mvSpiWriteThenRead (0, mvSysSflashCmd.buf, mvSysSflashCmd.bufLen,
+			dataBuff, dataLen, dummyBytes);
+	if (transType & SYS_SFLASH_TRANS_END)
+		memset(&mvSysSflashCmd,0,sizeof(mvSysSflashCmd));
+	return ret;
+}
+
+
+/*******************************************************************************
+* mvSysSflashDataWrite
+*
+* DESCRIPTION:
+*	System interface for writing SPI flash data.
+*
+* INPUT:
+*       flashHandle: Handle passed by OS glue by which an SPI flash is
+*		     identified.
+*	dataBuff:    Buffer holding the data to be written.
+*	dataLen:     Number of bytes to write.
+*	transType:   Bitmask describing the transaction type, see 
+*		     SYS_SFLASH_TRANS_XX for details.
+*
+* OUTPUT:
+*	None.
+*
+* RETURN:
+*	MV_OK on success,
+*	MV_ERROR otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvSysSflashDataWrite(MV_VOID *flashHandle, MV_U8* dataBuff, MV_U32 dataLen,
+		MV_U8 transType)
+{
+	MV_STATUS ret;
+
+	if (!(mvSysSflashCmd.transType & SYS_SFLASH_TRANS_START))
+		return MV_ERROR;
+
+	ret = mvSpiWriteThenWrite (0, mvSysSflashCmd.buf, mvSysSflashCmd.bufLen, dataBuff, dataLen);
+	if (transType & SYS_SFLASH_TRANS_END)
+		memset(&mvSysSflashCmd,0,sizeof(mvSysSflashCmd));
+	return ret;
+}
+
+
+/*******************************************************************************
+* mvSysSflashFreqSet
+*
+* DESCRIPTION:
+*	System interface for controlling the SPI interface frequency.
+*
+* INPUT:
+*       flashHandle: Handle passed by OS glue by which an SPI flash is
+*		     identified.
+*	freq:	     The new frequency to be configured for the SPI IF.
+*
+* OUTPUT:
+*	None.
+*
+* RETURN:
+*	MV_OK on success,
+*	MV_ERROR otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvSysSflashFreqSet(MV_VOID *flashHandle, MV_U32 freq)
+{
+    return mvSpiBaudRateSet(0, freq);
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysDdr.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysDdr.c
@@ -0,0 +1,134 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "boardEnv/mvBoardEnvSpec.h"
+#include "twsi/mvTwsi.h"
+
+
+/*******************************************************************************
+* mvSysDdrSpdRead
+*
+* DESCRIPTION:
+*	System interface for reading DDR SPD contents.
+*
+* INPUT:
+*       data:	Buffer to read data into.
+*       size:	Number of bytes to read.
+*
+* OUTPUT:
+*       data:	SPD data.
+*
+* RETURN:
+*	MV_OK on success,
+*	MV_ERROR otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvSysDdrSpdRead(MV_U8 *data, MV_U32 size)
+{
+	MV_TWSI_SLAVE slave;
+
+	slave.slaveAddr.address = MV_BOARD_DIMM0_I2C_ADDR;
+	slave.slaveAddr.type = ADDR7_BIT;
+	slave.validOffset = MV_TRUE;
+	slave.offset = 0;
+	slave.moreThen256 = MV_FALSE;
+
+	return mvTwsiRead(MV_BOARD_DIMM_I2C_CHANNEL, &slave, data, size);
+}
+
+
+/*******************************************************************************
+* mvSysDdrSpdWrite
+*
+* DESCRIPTION:
+*	System interface for writing DDR SPD contents.
+*
+* INPUT:
+*       data:	Buffer holding the data to be written.
+*       size:	Number of bytes to write.
+*
+* OUTPUT:
+*	None.
+*
+* RETURN:
+*	MV_OK on success,
+*	MV_ERROR otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvSysDdrSpdWrite(MV_U8 *data, MV_U32 size)
+{
+	MV_TWSI_SLAVE slave;
+
+	slave.slaveAddr.address = MV_BOARD_DIMM0_I2C_ADDR;
+	slave.slaveAddr.type = ADDR7_BIT;
+	slave.validOffset = MV_TRUE;
+	slave.offset = 0;
+	slave.moreThen256 = MV_FALSE;
+
+	return	mvTwsiWrite(MV_BOARD_DIMM_I2C_CHANNEL, &slave, data, size);
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysEthPhyApi.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/mv_hal_sys/mvSysEthPhyApi.h
@@ -0,0 +1,76 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __MV_SYS_ETHPHY_API_H__
+#define __MV_SYS_ETHPHY_API_H__
+
+
+MV_STATUS mvSysEthPhyInit(void);
+
+
+
+
+
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/dove_family/mvCompVer.txt
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/dove_family/mvCompVer.txt
@@ -0,0 +1,4 @@
+Global HAL Version: DOVE_HAL_3_1_2
+Unit HAL Version: 1.0.2
+Description: This component includes an implementation of the unit HAL drivers
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/dove_family/device/mvDevice.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/dove_family/device/mvDevice.c
@@ -0,0 +1,75 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "device/mvDevice.h"
+
+/* defines  */       
+#ifdef MV_DEBUG         
+	#define DB(x)	x
+#else                
+	#define DB(x)    
+#endif	             
+
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/dove_family/device/mvDevice.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/dove_family/device/mvDevice.h
@@ -0,0 +1,74 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCmvDeviceH
+#define __INCmvDeviceH
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "device/mvDeviceRegs.h"
+
+
+#endif /* #ifndef __INCmvDeviceH */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/dove_family/device/mvDeviceRegs.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/dove_family/device/mvDeviceRegs.h
@@ -0,0 +1,80 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCmvDeviceRegsH
+#define __INCmvDeviceRegsH
+
+#ifndef MV_ASMLANGUAGE
+#include "ctrlEnv/mvCtrlEnvLib.h"
+
+ 
+#endif /* MV_ASMLANGUAGE */
+
+
+#define NAND_CTRL_REG		0x10470
+
+#define NAND_ACTCEBOOT_BIT	BIT1
+
+
+#endif /* #ifndef __INCmvDeviceRegsH */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/dove_family/cpu/mvCpu.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/dove_family/cpu/mvCpu.c
@@ -0,0 +1,294 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#include "cpu/mvCpu.h"
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "ctrlEnv/mvCtrlEnvRegs.h"
+#include "ctrlEnv/sys/mvCpuIfRegs.h"
+
+/* defines  */
+#ifdef MV_DEBUG
+	#define DB(x)	x
+#else
+	#define DB(x)
+#endif	
+
+/* locals */
+
+/*******************************************************************************
+* mvCpuPclkGet - Get the CPU pClk (pipe clock)
+*
+* DESCRIPTION:
+*       This routine extract the CPU core clock.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       32bit clock cycles in MHertz.
+*
+*******************************************************************************/
+MV_U32 mvCpuPclkGet(MV_VOID)
+{
+#if defined(PCLCK_AUTO_DETECT)
+	MV_U32 	tmpPClkRate=0;
+	MV_U32 cpuCLK[] = MV_CPU_CLCK_TBL;
+
+	tmpPClkRate = MV_REG_READ(MPP_SAMPLE_AT_RESET_REG0);
+	tmpPClkRate = tmpPClkRate & MSAR_CPUCLCK_MASK;
+	tmpPClkRate = tmpPClkRate >> MSAR_CPUCLCK_OFFS;
+		
+	tmpPClkRate = cpuCLK[tmpPClkRate];
+
+	return tmpPClkRate;
+#else
+	return MV_DEFAULT_PCLK
+#endif
+}
+
+/*******************************************************************************
+* mvCpuL2ClkGet - Get the CPU L2 (CPU bus clock)
+*
+* DESCRIPTION:
+*       This routine extract the CPU L2 clock.
+*
+* RETURN:
+*       32bit clock cycles in Hertz.
+*
+*******************************************************************************/
+MV_U32  mvCpuL2ClkGet(MV_VOID)
+{
+#ifdef L2CLK_AUTO_DETECT
+	MV_U32 L2ClkRate, tmp, pClkRate, indexL2Rtio;
+	MV_U32 L2Rtio[][2] = MV_L2_CLCK_RTIO_TBL;
+
+	pClkRate = mvCpuPclkGet();
+
+	tmp = MV_REG_READ(MPP_SAMPLE_AT_RESET_REG0);
+	indexL2Rtio = tmp & MSAR_L2CLCK_RTIO_MASK;
+	indexL2Rtio = indexL2Rtio >> MSAR_L2CLCK_RTIO_OFFS;
+
+	L2ClkRate = ((pClkRate * L2Rtio[indexL2Rtio][1]) / L2Rtio[indexL2Rtio][0]);
+
+	return L2ClkRate;
+#else
+	return MV_BOARD_DEFAULT_L2CLK;
+#endif
+}
+
+
+/*******************************************************************************
+* mvCpuNameGet - Get CPU name
+*
+* DESCRIPTION:
+*       This function returns a string describing the CPU model and revision.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       pNameBuff - Buffer to contain board name string. Minimum size 32 chars.
+*
+* RETURN:
+*       None.
+*******************************************************************************/
+MV_VOID mvCpuNameGet(char *pNameBuff)
+{
+    MV_U32 cpuModel;
+    
+    cpuModel = mvOsCpuPartGet();
+
+    /* The CPU module is indicated in the Processor Version Register (PVR) */
+    switch(cpuModel)
+    {
+        case CPU_PART_MRVL131:
+            mvOsSPrintf(pNameBuff, "%s (Rev %d)", "Marvell Feroceon",mvOsCpuRevGet());
+            break;
+        case CPU_PART_ARM926:
+            mvOsSPrintf(pNameBuff, "%s (Rev %d)", "ARM926",mvOsCpuRevGet());
+            break;
+	case CPU_PART_ARM946:
+		mvOsSPrintf(pNameBuff, "%s (Rev %d)", "ARM946",mvOsCpuRevGet());
+		break;
+	case CPU_PART_MRVL581:
+		mvOsSPrintf(pNameBuff, "%s (Rev %d)", "Marvell Sheeva",mvOsCpuRevGet());
+		break;
+        default:
+            mvOsSPrintf(pNameBuff,"??? (0x%04x) (Rev %d)",cpuModel,mvOsCpuRevGet());
+            break;
+    }  /* switch  */
+
+    return;
+}
+
+/*******************************************************************************
+* whoAmI - Get CPU name
+*
+* DESCRIPTION:
+*       This function returns a string describing the CPU model and revision.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       pNameBuff - Buffer to contain board name string. Minimum size 32 chars.
+*
+* RETURN:
+*       None.
+*******************************************************************************/
+unsigned int whoAmI(void)
+{
+	return MASTER_CPU;
+}
+
+
+#define MV_PROC_STR_SIZE 50
+
+void mvCpuIfGetL2EccMode(MV_8 *buf)
+{
+    MV_U32 regVal = MV_REG_READ(CPU_CONFIG_REG);
+    if (regVal & BIT22)
+	mvOsSPrintf(buf, "L2 ECC Enabled");
+    else
+	mvOsSPrintf(buf, "L2 ECC Disabled");
+}
+
+void mvCpuIfGetL2Mode(MV_8 *buf)
+{
+    MV_U32 regVal = 0;
+
+    MV_ASM_READ_EXTRA_FEATURES(regVal);
+
+    if (regVal & BIT22)
+	mvOsSPrintf(buf, "L2 Enabled");
+    else
+	mvOsSPrintf(buf, "L2 Disabled");
+}
+
+void mvCpuIfGetL2PrefetchMode(MV_8 *buf)
+{
+    MV_U32 regVal = 0;
+
+    MV_ASM_READ_EXTRA_FEATURES(regVal);
+
+    if (regVal & BIT24)
+	mvOsSPrintf(buf, "L2 Prefetch Disabled");
+    else
+	mvOsSPrintf(buf, "L2 Prefetch Enabled");
+}
+
+void mvCpuIfGetWriteAllocMode(MV_8 *buf)
+{
+    MV_U32 regVal = 0;
+
+    MV_ASM_READ_EXTRA_FEATURES(regVal);
+
+    if (regVal & BIT28)
+	mvOsSPrintf(buf, "Write Allocate Enabled");
+    else
+	mvOsSPrintf(buf, "Write Allocate Disabled");
+}
+
+void mvCpuIfGetCpuStreamMode(MV_8 *buf)
+{
+    MV_U32 regVal = 0;
+
+    MV_ASM_READ_EXTRA_FEATURES(regVal);
+
+    if (regVal & BIT29)
+	mvOsSPrintf(buf, "CPU Streaming Enabled");
+    else
+	mvOsSPrintf(buf, "CPU Streaming Disabled");
+}
+
+
+MV_U32 mvCpuIfPrintSystemConfig(MV_8 *buffer, MV_U32 index)
+{
+  MV_U32 count = 0;
+  
+  MV_8 L2_ECC_str[MV_PROC_STR_SIZE];
+  MV_8 L2_En_str[MV_PROC_STR_SIZE];
+  MV_8 L2_Prefetch_str[MV_PROC_STR_SIZE];
+  MV_8 Write_Alloc_str[MV_PROC_STR_SIZE];
+  MV_8 Cpu_Stream_str[MV_PROC_STR_SIZE];
+  
+  mvCpuIfGetL2Mode(L2_En_str);
+  mvCpuIfGetL2EccMode(L2_ECC_str); 
+  mvCpuIfGetL2PrefetchMode(L2_Prefetch_str);
+  mvCpuIfGetWriteAllocMode(Write_Alloc_str);
+  mvCpuIfGetCpuStreamMode(Cpu_Stream_str);
+  
+  count += mvOsSPrintf(buffer + count + index, "%s\n", L2_En_str);
+  count += mvOsSPrintf(buffer + count + index, "%s\n", L2_ECC_str);
+  count += mvOsSPrintf(buffer + count + index, "%s\n", L2_Prefetch_str);
+  count += mvOsSPrintf(buffer + count + index, "%s\n", Write_Alloc_str);
+  count += mvOsSPrintf(buffer + count + index, "%s\n", Cpu_Stream_str);
+  return count;
+}
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/dove_family/cpu/mvCpu.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/dove_family/cpu/mvCpu.h
@@ -0,0 +1,103 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#ifndef __INCmvCpuh
+#define __INCmvCpuh
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+
+/* defines */
+#define MASTER_CPU	0
+
+#define CPU_PART_MRVL131	0x131
+#define CPU_PART_ARM926		0x926
+#define CPU_PART_ARM946		0x946
+#define CPU_PART_MRVL581	0x581
+#define MV_CPU_ARM_CLK_ELM_SIZE	    12
+#define MV_CPU_ARM_CLK_RATIO_OFF    8
+#define MV_CPU_ARM_CLK_DDR_OFF	    4
+
+#ifndef MV_ASMLANGUAGE
+typedef struct _mvCpuArmClk 
+{
+	MV_U32	      cpuClk;	  /* CPU clock in MHz */
+	MV_U32	      ddrClk;	  /* DDR clock in MHz */
+	MV_U32	      l2Clk;	  /* CPU DDR clock ratio */
+
+}MV_CPU_ARM_CLK;
+
+MV_U32    mvCpuPclkGet(MV_VOID);
+MV_VOID   mvCpuNameGet(char *pNameBuff);
+
+#if defined(MV88F6281)
+MV_U32 mvCpuIfPrintSystemConfig(MV_8 *buffer, MV_U32 index);
+#endif
+
+#endif
+
+
+#endif /* __INCmvCpuh */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/dove_family/ctrlEnv/mvCtrlEnvAsm.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/dove_family/ctrlEnv/mvCtrlEnvAsm.h
@@ -0,0 +1,96 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#ifndef __INCmvCtrlEnvAsmh
+#define __INCmvCtrlEnvAsmh
+#include "pci-if/pex/mvPexRegs.h"
+
+#define PXDAVI_DEV_ID_OFFS_AS           #PXDAVI_DEV_ID_OFFS
+#define PXCCARI_REVID_MASK_AS           #PXCCARI_REVID_MASK
+
+/* Read device ID into toReg bits 15:0 from 0xd0000000 */
+/* defines  */
+#define MV_DV_CTRL_MODEL_GET_ASM(toReg, tmpReg) \
+        MV_DV_REG_READ_ASM(toReg, tmpReg, PEX_CFG_DIRECT_ACCESS(0,PEX_DEVICE_AND_VENDOR_ID));\
+        mov     toReg, toReg, LSR PXDAVI_DEV_ID_OFFS_AS         /* toReg = toReg >> 16 */
+
+#define MV_CTRL_MODEL_GET_ASM(toReg, tmpReg) \
+        MV_REG_READ_ASM(toReg, tmpReg, PEX_CFG_DIRECT_ACCESS(0,PEX_DEVICE_AND_VENDOR_ID));\
+        mov     toReg, toReg, LSR PXDAVI_DEV_ID_OFFS_AS         /* toReg = toReg >> 16 */
+
+/* Read Revision into toReg bits 7:0 0xd0000000*/
+#define MV_DV_CTRL_REV_GET_ASM(toReg, tmpReg)	\
+        /* Read device revision */			\
+        MV_DV_REG_READ_ASM(toReg, tmpReg, PEX_CFG_DIRECT_ACCESS(0,PEX_CLASS_CODE_AND_REVISION_ID));\
+        and     toReg, toReg, PXCCARI_REVID_MASK_AS                  /* Mask for class ID */
+
+/* Read Revision into toReg bits 7:0 0xf1000000*/
+#define MV_CTRL_REV_GET_ASM(toReg, tmpReg)	\
+        /* Read device revision */			\
+        MV_REG_READ_ASM(toReg, tmpReg, PEX_CFG_DIRECT_ACCESS(0,PEX_CLASS_CODE_AND_REVISION_ID));\
+        and     toReg, toReg, PXCCARI_REVID_MASK_AS                  /* Mask for class ID */
+
+
+#endif /* __INCmvCtrlEnvAsmh */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/dove_family/ctrlEnv/mvCtrlEnvAddrDec.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/dove_family/ctrlEnv/mvCtrlEnvAddrDec.c
@@ -0,0 +1,375 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+/*******************************************************************************
+* mvCtrlEnvAddrDec.h - Marvell controller address decode library
+*
+* DESCRIPTION:
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+/* includes */
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "ctrlEnv/mvCtrlEnvAddrDec.h"
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "mvCpuIf.h"
+
+#define MV_DEBUG
+
+/* defines  */
+#ifdef MV_DEBUG
+	#define DB(x)	x
+#else
+	#define DB(x)
+#endif
+	
+/* Default Attributes array */
+MV_TARGET_ATTRIB	mvTargetDefaultsArray[] = TARGETS_DEF_ARRAY;
+extern MV_TARGET 	sampleAtResetTargetArray[];
+/* Dram\AHBToMbus\PEX share regsiter */
+
+#define CTRL_DEC_BASE_OFFS		16
+#define CTRL_DEC_BASE_MASK		(0xffff << CTRL_DEC_BASE_OFFS)
+#define CTRL_DEC_BASE_ALIGNMENT		0x10000
+
+#define CTRL_DEC_SIZE_OFFS		16
+#define CTRL_DEC_SIZE_MASK		(0xffff << CTRL_DEC_SIZE_OFFS)
+#define CTRL_DEC_SIZE_ALIGNMENT		0x10000
+
+#define CTRL_DEC_WIN_EN			BIT0
+
+
+
+/*******************************************************************************
+* mvCtrlAddrDecToReg - Get address decode register format values
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*
+* RETURN:
+*
+*******************************************************************************/
+MV_STATUS mvCtrlAddrDecToReg(MV_ADDR_WIN *pAddrDecWin, MV_DEC_REGS *pAddrDecRegs)
+{
+
+	MV_U32 baseToReg=0 , sizeToReg=0;
+    
+	/* BaseLow[31:16] => base register [31:16]		*/
+	baseToReg = pAddrDecWin->baseLow & CTRL_DEC_BASE_MASK;
+
+	/* Write to address decode Base Address Register	*/
+	pAddrDecRegs->baseReg &= ~CTRL_DEC_BASE_MASK;
+	pAddrDecRegs->baseReg |= baseToReg;
+
+	/* Get size register value according to window size	*/
+	sizeToReg = ctrlSizeToReg(pAddrDecWin->size, CTRL_DEC_SIZE_ALIGNMENT);
+	
+	/* Size parameter validity check.			*/
+	if (-1 == sizeToReg)
+	{
+		return MV_BAD_PARAM;
+	}
+
+	/* set size */
+	pAddrDecRegs->sizeReg &= ~CTRL_DEC_SIZE_MASK;
+	pAddrDecRegs->sizeReg |= (sizeToReg << CTRL_DEC_SIZE_OFFS);
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvCtrlRegToAddrDec - Extract address decode struct from registers.
+*
+* DESCRIPTION:
+*       This function extract address decode struct from address decode 
+*       registers given as parameters.
+*
+* INPUT:
+*       pAddrDecRegs - Address decode register struct.
+*
+* OUTPUT:
+*       pAddrDecWin - Target window data structure.
+*
+* RETURN:
+*		MV_BAD_PARAM if address decode registers data is invalid.
+*
+*******************************************************************************/
+MV_STATUS mvCtrlRegToAddrDec(MV_DEC_REGS *pAddrDecRegs, MV_ADDR_WIN *pAddrDecWin)
+{
+	MV_U32 sizeRegVal;
+	
+	sizeRegVal = (pAddrDecRegs->sizeReg & CTRL_DEC_SIZE_MASK) >> 
+					CTRL_DEC_SIZE_OFFS;
+
+	pAddrDecWin->size = ctrlRegToSize(sizeRegVal, CTRL_DEC_SIZE_ALIGNMENT);
+
+	/* Extract base address					*/
+	/* Base register [31:16] ==> baseLow[31:16] 		*/
+	pAddrDecWin->baseLow = pAddrDecRegs->baseReg & CTRL_DEC_BASE_MASK;
+
+	pAddrDecWin->baseHigh =  0;
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvCtrlAttribGet - 
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*
+* RETURN:
+*
+*******************************************************************************/
+
+MV_STATUS mvCtrlAttribGet(MV_TARGET target, MV_TARGET_ATTRIB *targetAttrib)
+{
+	targetAttrib->attrib = mvTargetDefaultsArray[MV_CHANGE_BOOT_CS(target)].attrib;
+	targetAttrib->targetId = mvTargetDefaultsArray[MV_CHANGE_BOOT_CS(target)].targetId;
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvCtrlGetAttrib - 
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*
+* RETURN:
+*
+*******************************************************************************/
+MV_TARGET mvCtrlTargetGet(MV_TARGET_ATTRIB *targetAttrib)
+{
+	MV_TARGET target;
+	MV_TARGET x;
+	for (target = SDRAM_CS0; target < MAX_TARGETS ; target ++)
+	{
+		x = MV_CHANGE_BOOT_CS(target);
+		if ((mvTargetDefaultsArray[x].attrib == targetAttrib->attrib) &&
+			(mvTargetDefaultsArray[MV_CHANGE_BOOT_CS(target)].targetId == targetAttrib->targetId))
+		{
+			/* found it */
+			break;
+		}
+	}
+
+	return target;
+}
+
+MV_TARGET mvCtrlTargetByWinInfoGet(MV_UNIT_WIN_INFO *unitWinInfo)
+{
+	MV_TARGET target;
+	MV_TARGET x;
+	for (target = SDRAM_CS0; target < MAX_TARGETS ; target ++)
+	{
+		x = MV_CHANGE_BOOT_CS(target);
+		if ((mvTargetDefaultsArray[x].attrib == unitWinInfo->attrib) &&
+			(mvTargetDefaultsArray[MV_CHANGE_BOOT_CS(target)].targetId == unitWinInfo->targetId))
+		{
+			/* found it */
+			break;
+		}
+	}
+
+	return target;
+}
+
+MV_STATUS mvCtrlAddrDecToParams(MV_DEC_WIN *pAddrDecWin, 
+                                MV_DEC_WIN_PARAMS *pWinParam)
+{
+	MV_U32 baseToReg=0, sizeToReg=0;
+    
+	/* BaseLow[31:16] => base register [31:16]		*/
+	baseToReg = pAddrDecWin->addrWin.baseLow & CTRL_DEC_BASE_MASK;
+
+	/* Write to address decode Base Address Register	*/
+	pWinParam->baseAddr &= ~CTRL_DEC_BASE_MASK;
+	pWinParam->baseAddr |= baseToReg;
+
+	/* Get size register value according to window size	*/
+	sizeToReg = ctrlSizeToReg(pAddrDecWin->addrWin.size, CTRL_DEC_SIZE_ALIGNMENT);
+	
+	/* Size parameter validity check.			*/
+	if (-1 == sizeToReg)
+	{
+        	mvOsPrintf("mvCtrlAddrDecToParams: ERR. ctrlSizeToReg failed.\n");
+		return MV_BAD_PARAM;
+	}
+    	pWinParam->size = sizeToReg;
+
+    	pWinParam->attrib   = mvTargetDefaultsArray[MV_CHANGE_BOOT_CS(pAddrDecWin->target)].attrib;
+    	pWinParam->targetId = mvTargetDefaultsArray[MV_CHANGE_BOOT_CS(pAddrDecWin->target)].targetId;
+
+    	return MV_OK;
+}
+
+MV_STATUS mvCtrlParamsToAddrDec(MV_DEC_WIN_PARAMS *pWinParam, 
+                                MV_DEC_WIN *pAddrDecWin)
+{
+    	MV_TARGET_ATTRIB    targetAttrib;
+
+    	pAddrDecWin->addrWin.baseLow = pWinParam->baseAddr;
+	
+	/* Upper 32bit address base is supported under PCI High Address remap */
+	pAddrDecWin->addrWin.baseHigh = 0;
+
+	/* Prepare sizeReg to ctrlRegToSize function */
+    	pAddrDecWin->addrWin.size = ctrlRegToSize(pWinParam->size, CTRL_DEC_SIZE_ALIGNMENT);
+
+	if (-1 == pAddrDecWin->addrWin.size)
+	{
+		DB(mvOsPrintf("mvCtrlParamsToAddrDec: ERR. ctrlRegToSize failed.\n"));
+		return MV_BAD_PARAM;
+	}
+    	targetAttrib.targetId = pWinParam->targetId;
+    	targetAttrib.attrib = pWinParam->attrib;
+
+    	pAddrDecWin->target = mvCtrlTargetGet(&targetAttrib);
+
+    	return MV_OK;
+}
+
+/*******************************************************************************
+* mvCtrlAddrWinMapBuild
+*
+* DESCRIPTION:
+*	Build the windows address decoding table, to be used for initializing
+*	the unit's address decoding windows.
+*
+* INPUT:
+*	pAddrWinMap: An array to hold the address decoding windows parameters.
+*	len: Number of entries in pAddrWinMap.
+*
+* OUTPUT:
+*	pAddrWinMap: Address window information.
+*
+* RETURN:
+*	MV_BAD_PARAM: input array is smaller that needed to store all window
+*	addresses.
+*	MV_ERROR: Otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvCtrlAddrWinMapBuild(MV_UNIT_WIN_INFO *pAddrWinMap, MV_U32 len)
+{
+	MV_CPU_DEC_WIN cpuAddrDecWin;
+	MV_U32	i;
+	MV_TARGET_ATTRIB targetAttrib;
+	MV_STATUS status;
+
+	/* Check size of CPU address win table */
+	if(len <= MAX_TARGETS) {
+		mvOsPrintf("mvCtrlAddrWinMapBuild() - Table size too small.\n");
+		return MV_BAD_PARAM;
+	}
+
+	/* Fill in the pAddrWinMap fields	*/
+	for(i = 0; i < MAX_TARGETS; i++) {
+        	status = mvCpuIfTargetWinGet(i, &cpuAddrDecWin);
+		if(status != MV_OK) {
+			if(status == MV_NO_SUCH) {
+				pAddrWinMap[i].enable = MV_FALSE;
+				continue;
+			} else {
+				mvOsPrintf("mvCtrlAddrWinMapBuild() - mvCpuIfTargetWinGet() failed.\n");
+				return MV_ERROR;
+			}
+		}
+
+		pAddrWinMap[i].addrWin.baseLow = cpuAddrDecWin.addrWin.baseLow;
+		pAddrWinMap[i].addrWin.baseHigh = cpuAddrDecWin.addrWin.baseHigh;
+		pAddrWinMap[i].addrWin.size = cpuAddrDecWin.addrWin.size;
+		pAddrWinMap[i].enable = cpuAddrDecWin.enable;
+
+		if(mvCtrlAttribGet(i, &targetAttrib) != MV_OK) {
+			mvOsPrintf("mvCtrlAddrWinMapBuild() - mvCtrlAttribGet() failed.\n");
+			return MV_ERROR;
+		}
+		pAddrWinMap[i].attrib = targetAttrib.attrib;
+		pAddrWinMap[i].targetId = targetAttrib.targetId;
+	}
+	pAddrWinMap[i].addrWin.baseLow = TBL_TERM;
+	pAddrWinMap[i].addrWin.baseHigh = TBL_TERM;
+	pAddrWinMap[i].addrWin.size = TBL_TERM;
+	pAddrWinMap[i].enable = TBL_TERM;
+	pAddrWinMap[i].attrib = TBL_TERM;
+	pAddrWinMap[i].targetId = TBL_TERM;
+
+	return MV_OK;
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/dove_family/ctrlEnv/mvCtrlEnvRegs.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/dove_family/ctrlEnv/mvCtrlEnvRegs.h
@@ -0,0 +1,316 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+        this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCmvCtrlEnvRegsh
+#define __INCmvCtrlEnvRegsh
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+
+/* CV Support */
+#define PEX0_MEM0 	PEX0_MEM
+#define PEX1_MEM1 	PEX1_MEM
+#define PCI0_MEM0	PEX0_MEM
+#define PCI1_MEM1	PEX1_MEM
+
+/* Controller revision info */
+#define PCI_CLASS_CODE_AND_REVISION_ID			    0x008
+#define PCCRIR_REVID_OFFS				    0		/* Revision ID */
+#define PCCRIR_REVID_MASK				    (0xff << PCCRIR_REVID_OFFS)
+
+/* Controler environment registers offsets */
+
+/* Power Managment Control */ 
+
+#define POWER_MNG_CTRL_REG			(MV_CPUIF_REGS_BASE + 0x11C)
+
+/* Software Reset Control Register */
+#define SW_RESET_CTRL_REG			(MV_MISC_REGS_BASE + 0x030)
+
+#define SRC_GBE_SW_RESET_BIT			2
+
+/* Clock Gating Control Register */
+#define CLOCK_GATING_CTRL_REG			(MV_MISC_REGS_BASE + 0x038)
+
+#define CGC_USBENCLOCK_OFFS(port)		(0 + (port))
+#define CGC_USBENCLOCK_MASK(port)		(1 << CGC_USBENCLOCK_OFFS(port))
+#define CGC_USBENCLOCK_EN(port)			(1 << CGC_USBENCLOCK_OFFS(port))
+#define CGC_USBENCLOCK_DIS(port)		(0 << CGC_USBENCLOCK_OFFS(port))
+
+#define CGC_GEENCLOCK_OFFS			2
+#define CGC_GEENCLOCK_MASK			(1 << CGC_GEENCLOCK_OFFS)
+#define CGC_GEENCLOCK_EN			(1 << CGC_GEENCLOCK_OFFS)
+#define CGC_GEENCLOCK_DIS			(0 << CGC_GEENCLOCK_OFFS)
+
+#define CGC_SATAENCLOCK_OFFS			3
+#define CGC_SATAENCLOCK_MASK			(1 << CGC_SATAENCLOCK_OFFS)
+#define CGC_SATAENCLOCK_EN			(1 << CGC_SATAENCLOCK_OFFS)
+#define CGC_SATAENCLOCK_DIS			(0 << CGC_SATAENCLOCK_OFFS)
+
+#define CGC_PEXENCLOCK_OFFS(port)		(4 + (port))
+#define CGC_PEXENCLOCK_MASK(port)		(1 << CGC_PEXENCLOCK_OFFS(port))
+#define CGC_PEXENCLOCK_EN(port)			(1 << CGC_PEXENCLOCK_OFFS(port))
+#define CGC_PEXENCLOCK_DIS(port)		(0 << CGC_PEXENCLOCK_OFFS(port))
+
+#define CGC_SDIOENCLOCK_OFFS(port)		(8 + (port))
+#define CGC_SDIOENCLOCK_MASK(port)		(1 << CGC_SDIOENCLOCK_OFFS(port))
+#define CGC_SDIOENCLOCK_EN(port)		(1 << CGC_SDIOENCLOCK_OFFS(port))
+#define CGC_SDIOENCLOCK_DIS(port)		(0 << CGC_SDIOENCLOCK_OFFS(port))
+
+#define CGC_NANDENCLOCK_OFFS			10
+#define CGC_NANDENCLOCK_MASK			(1 << CGC_NANDENCLOCK_OFFS)
+#define CGC_NANDENCLOCK_EN			(1 << CGC_NANDENCLOCK_OFFS)
+#define CGC_NANDENCLOCK_DIS			(0 << CGC_NANDENCLOCK_OFFS)
+
+#define CGC_CAMENCLOCK_OFFS			11
+#define CGC_CAMENCLOCK_MASK			(1 << CGC_CAMENCLOCK_OFFS)
+#define CGC_CAMENCLOCK_EN			(1 << CGC_CAMENCLOCK_OFFS)
+#define CGC_CAMENCLOCK_DIS			(0 << CGC_CAMENCLOCK_OFFS)
+
+#define CGC_ADENCLOCK_OFFS(port)		(12 + (port))
+#define CGC_ADENCLOCK_MASK(port)		(1 << CGC_ADENCLOCK_OFFS(port))
+#define CGC_ADENCLOCK_EN(port)			(1 << CGC_ADENCLOCK_OFFS(port))
+#define CGC_ADENCLOCK_DIS(port)			(0 << CGC_ADENCLOCK_OFFS(port))
+
+#define CGC_GPUENCLOCK_OFFS			17
+#define CGC_GPUENCLOCK_MASK			(1 << CGC_GPUENCLOCK_OFFS)
+#define CGC_GPUENCLOCK_EN			(1 << CGC_GPUENCLOCK_OFFS)
+#define CGC_GPUENCLOCK_DIS			(0 << CGC_GPUENCLOCK_OFFS)
+
+#define CGC_AC97ENCLOCK_OFFS			21
+#define CGC_AC97ENCLOCK_MASK			(1 << CGC_AC97ENCLOCK_OFFS)
+#define CGC_AC97ENCLOCK_EN			(1 << CGC_AC97ENCLOCK_OFFS)
+#define CGC_AC97ENCLOCK_DIS			(0 << CGC_AC97ENCLOCK_OFFS)
+
+#define CGC_PDMAENCLOCK_OFFS			22
+#define CGC_PDMAENCLOCK_MASK			(1 << CGC_PDMAENCLOCK_OFFS)
+#define CGC_PDMAENCLOCK_EN			(1 << CGC_PDMAENCLOCK_OFFS)
+#define CGC_PDMAENCLOCK_DIS			(0 << CGC_PDMAENCLOCK_OFFS)
+
+#define CGC_XORENCLOCK_OFFS(port)		(23 + (port))
+#define CGC_XORENCLOCK_MASK(port)		(1 << CGC_XORENCLOCK_OFFS(port))
+#define CGC_XORENCLOCK_EN(port)			(1 << CGC_XORENCLOCK_OFFS(port))
+#define CGC_XORENCLOCK_DIS(port)		(0 << CGC_XORENCLOCK_OFFS(port))
+
+/* Controler environment registers offsets */
+#define MPP_CONTROL_REG0			(MV_MISC_REGS_BASE + 0x200)
+#define MPP_CONTROL_REG1			(MV_MISC_REGS_BASE + 0x204)
+#define MPP_CONTROL_REG2			(MV_MISC_REGS_BASE + 0x208)
+#define MPP_CONTROL_REG3			(MV_MISC_REGS_BASE + 0x20C)
+#define MPP_GENERAL_CONTROL_REG			(MV_MISC_REGS_BASE + 0x210)
+#define MPP_SAMPLE_AT_RESET_REG0		(MV_MISC_REGS_BASE + 0x214)
+#define MPP_SAMPLE_AT_RESET_DDR_TYPE_OFFS	28
+#define MPP_SAMPLE_AT_RESET_DDR_TYPE_MASK	(0x1 << MPP_SAMPLE_AT_RESET_DDR_TYPE_OFFS)
+#define MPP_SAMPLE_AT_RESET_DDR_TYPE_DDR2	(0x0 << MPP_SAMPLE_AT_RESET_DDR_TYPE_OFFS)
+#define MPP_SAMPLE_AT_RESET_DDR_TYPE_DDR3	(0x1 << MPP_SAMPLE_AT_RESET_DDR_TYPE_OFFS)
+#define MPP_SAMPLE_AT_RESET_REG1		(MV_MISC_REGS_BASE + 0x218)
+#define MPP_AUDIO_UNIT_CONTROL_REG		(MV_MISC_REGS_BASE + 0x230)
+#define MPP_SSCG_CONFIG_REG			(MV_MISC_REGS_BASE + 0x2B4)
+#define MPP_PEX_CONTROL_REG			(MV_MISC_REGS_BASE + 0x2E0)
+#define MPP_GENERAL_CONFIG_REG			(MV_MISC_REGS_BASE + 0x1803C)
+
+#define MSAR_BOOT_MODE_OFFS                     0
+#define MSAR_BOOT_MODE_MASK                     (0x1F << MSAR_BOOT_MODE_OFFS)
+#define MSAR_BOOT_SPI_NO_BOOTROM		(0x0 << MSAR_BOOT_MODE_OFFS)
+#define MSAR_BOOT_SPI_3_CYCLES			(0x1 << MSAR_BOOT_MODE_OFFS)
+#define MSAR_BOOT_SPI_4_CYCLES			(0x2 << MSAR_BOOT_MODE_OFFS)
+#define MSAR_BOOT_SATA				(0x3 << MSAR_BOOT_MODE_OFFS)
+#define MSAR_BOOT_PEX_END_POINT			(0x4 << MSAR_BOOT_MODE_OFFS)
+#define MSAR_BOOT_NAND_1			(0x5 << MSAR_BOOT_MODE_OFFS)
+#define MSAR_BOOT_NAND_2			(0x6 << MSAR_BOOT_MODE_OFFS)
+#define MSAR_BOOT_NAND_3			(0x7 << MSAR_BOOT_MODE_OFFS)
+#define MSAR_BOOT_NAND_4			(0x8 << MSAR_BOOT_MODE_OFFS)
+#define MSAR_BOOT_NAND_5			(0x9 << MSAR_BOOT_MODE_OFFS)
+#define MSAR_BOOT_NAND_6			(0xA << MSAR_BOOT_MODE_OFFS)
+#define MSAR_BOOT_NAND_7			(0xB << MSAR_BOOT_MODE_OFFS)
+#define MSAR_BOOT_NAND_8			(0xC << MSAR_BOOT_MODE_OFFS)
+#define MSAR_BOOT_NAND_9			(0xD << MSAR_BOOT_MODE_OFFS)
+#define MSAR_BOOT_UART0				(0xE << MSAR_BOOT_MODE_OFFS)
+#define MSAR_BOOT_UART1				(0xF << MSAR_BOOT_MODE_OFFS)
+#define MSAR_BOOT_DEBUG_UART0			(0x10 << MSAR_BOOT_MODE_OFFS)
+#define MSAR_BOOT_DEBUG_UART1			(0x11 << MSAR_BOOT_MODE_OFFS)
+/* 0x12 till 0x13 are reserved */
+#define MSAR_BOOT_NAND_10			(0x14 << MSAR_BOOT_MODE_OFFS)
+#define MSAR_BOOT_NAND_11			(0x15 << MSAR_BOOT_MODE_OFFS)
+#define MSAR_BOOT_NAND_12			(0x16 << MSAR_BOOT_MODE_OFFS)
+#define MSAR_BOOT_NAND_13			(0x17 << MSAR_BOOT_MODE_OFFS)
+#define MSAR_BOOT_NAND_14			(0x18 << MSAR_BOOT_MODE_OFFS)
+#define MSAR_BOOT_NAND_15			(0x19 << MSAR_BOOT_MODE_OFFS)
+#define MSAR_BOOT_NAND_16			(0x1A << MSAR_BOOT_MODE_OFFS)
+#define MSAR_BOOT_NAND_17			(0x1B << MSAR_BOOT_MODE_OFFS)
+#define MSAR_BOOT_NAND_18			(0x1C << MSAR_BOOT_MODE_OFFS)
+#define MSAR_BOOT_NAND_19			(0x1D << MSAR_BOOT_MODE_OFFS)
+#define MSAR_BOOT_NAND_20			(0x1E << MSAR_BOOT_MODE_OFFS)
+#define MSAR_BOOT_NAND_21			(0x1F << MSAR_BOOT_MODE_OFFS)
+
+#define MSAR_TCLCK_OFFS				23
+#define MSAR_TCLCK_MASK				(0x3 << MSAR_TCLCK_OFFS)
+#define MSAR_TCLCK_166				(0x0 << MSAR_TCLCK_OFFS)
+#define MSAR_TCLCK_125				(0x1 << MSAR_TCLCK_OFFS)
+
+#define MSAR_CPUCLCK_OFFS			5
+#define MSAR_CPUCLCK_MASK			(0xF << MSAR_CPUCLCK_OFFS)
+
+#define MSAR_DDRCLCK_RTIO_OFFS			12
+#define MSAR_DDRCLCK_RTIO_MASK			(0xF << MSAR_DDRCLCK_RTIO_OFFS)
+
+#define MSAR_L2CLCK_RTIO_OFFS			9
+#define MSAR_L2CLCK_RTIO_MASK			(0x7 << MSAR_L2CLCK_RTIO_OFFS)
+
+#ifndef MV_ASMLANGUAGE
+
+/* CPU clock for 6781Y0. 0->Resereved */
+#define MV_CPU_CLCK_TBL { 	0,		0, 		0, 		0,		\
+			     	0,		1000000000, 	933000000,	933000000,	\
+				800000000,     	800000000, 	800000000,	1067000000,	\
+				667000000,	533000000,	400000000,	333000000	}
+
+/* DDR clock RATIO for 6781Y0. {0,0}->Reserved */
+#define MV_DDR_CLCK_RTIO_TBL	{\
+	{1, 1}, {0, 0}, {2, 1}, {0, 0}, \
+	{3, 1}, {0, 0}, {4, 1}, {0, 0}, \
+	{5, 1}, {0, 0}, {6, 1}, {0, 0}, \
+	{7, 1}, {0, 0}, {8, 1}, {10, 1} \
+}
+
+/* L2 clock RATIO for 6781Y0. {0,0}->Reserved */
+#define MV_L2_CLCK_RTIO_TBL	{\
+	{1, 1}, {0, 0}, {2, 1}, {0, 0}, \
+	{3, 1}, {0, 0}, {4, 1}, {0, 0} \
+}
+
+/* These macros help units to identify a target Mbus Arbiter group */
+#define MV_PCI_DRAM_BAR_TO_DRAM_TARGET(bar)   0
+
+#define	MV_TARGET_IS_AS_BOOT(target) ((target) == (sampleAtResetTargetArray[((MV_REG_READ(MPP_SAMPLE_AT_RESET_REG0)\
+						 & MSAR_BOOT_MODE_MASK) >> MSAR_BOOT_MODE_OFFS)]))
+
+
+#define MV_CHANGE_BOOT_CS(target)	((target) == DEV_BOOCS)?\
+					sampleAtResetTargetArray[((MV_REG_READ(MPP_SAMPLE_AT_RESET_REG0)\
+						 & MSAR_BOOT_MODE_MASK) >> MSAR_BOOT_MODE_OFFS)]\
+					:(target)
+					
+#define TCLK_TO_COUNTER_RATIO   1   /* counters running in Tclk */
+
+#define BOOT_TARGETS_NAME_ARRAY {       \
+    SPI0,          	\
+    BOOT_ROM_CS, 	\
+    BOOT_ROM_CS, 	\
+    BOOT_ROM_CS, 	\
+    BOOT_ROM_CS, 	\
+    BOOT_ROM_CS, 	\
+    BOOT_ROM_CS, 	\
+    BOOT_ROM_CS, 	\
+    BOOT_ROM_CS, 	\
+    BOOT_ROM_CS, 	\
+    BOOT_ROM_CS, 	\
+    BOOT_ROM_CS, 	\
+    BOOT_ROM_CS, 	\
+    BOOT_ROM_CS, 	\
+    BOOT_ROM_CS, 	\
+    BOOT_ROM_CS, 	\
+    BOOT_ROM_CS, 	\
+    BOOT_ROM_CS, 	\
+    BOOT_ROM_CS, 	\
+    BOOT_ROM_CS, 	\
+    BOOT_ROM_CS, 	\
+    BOOT_ROM_CS, 	\
+    BOOT_ROM_CS, 	\
+    BOOT_ROM_CS, 	\
+    BOOT_ROM_CS, 	\
+    BOOT_ROM_CS, 	\
+    BOOT_ROM_CS, 	\
+    BOOT_ROM_CS, 	\
+    BOOT_ROM_CS, 	\
+    BOOT_ROM_CS, 	\
+    BOOT_ROM_CS, 	\
+    BOOT_ROM_CS, 	\
+    TBL_TERM,         	\
+}
+
+
+/* For old competability */
+#define MV_BOOTDEVICE_INDEX   	0
+
+
+#define PCI_IF0_MEM0		PEX0_MEM
+#define PCI_IF0_IO		PEX0_IO
+#define PCI_IF1_MEM0		PEX1_MEM
+#define PCI_IF1_IO		PEX1_IO
+
+#define PCI_IO(pciIf)		(PEX0_IO + 2*(pciIf))	
+#define PCI_MEM(pciIf, memNum)	(PEX0_MEM + 2*(pciIf))
+
+
+#endif /* MV_ASMLANGUAGE */
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* __INCmvCtrlEnvRegsh */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/dove_family/ctrlEnv/mvCtrlEnvLib.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/dove_family/ctrlEnv/mvCtrlEnvLib.h
@@ -0,0 +1,146 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#ifndef __INCmvCtrlEnvLibh
+#define __INCmvCtrlEnvLibh
+
+/* includes */
+#include "mvSysHwConfig.h"
+#include "mvCommon.h"
+#include "mvTypes.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "ctrlEnv/mvCtrlEnvRegs.h"
+#include "ctrlEnv/mvCtrlEnvAddrDec.h"
+
+/* typedefs */
+
+/* This enumerator describes the possible HW cache coherency policies the   */
+/* controllers supports.                                                    */
+typedef enum _mvCachePolicy
+{
+    NO_COHERENCY,   /* No HW cache coherency support                        */
+    WT_COHERENCY,   /* HW cache coherency supported in Write Through policy */
+    WB_COHERENCY    /* HW cache coherency supported in Write Back policy    */   
+}MV_CACHE_POLICY;
+
+
+/* The swapping is referred to a 64-bit words (as this is the controller    */
+/* internal data path width). This enumerator describes the possible        */
+/* data swap types. Below is an example of the data 0x0011223344556677      */
+typedef enum _mvSwapType
+{
+    MV_BYTE_SWAP,       /* Byte Swap                77 66 55 44 33 22 11 00 */             
+    MV_NO_SWAP,         /* No swapping              00 11 22 33 44 55 66 77 */
+    MV_BYTE_WORD_SWAP,  /* Both byte and word swap  33 22 11 00 77 66 55 44 */
+    MV_WORD_SWAP,       /* Word swap                44 55 66 77 00 11 22 33 */
+    SWAP_TYPE_MAX	/* Delimiter for this enumerator					*/
+}MV_SWAP_TYPE;
+
+
+
+/* mcspLib.h API list */
+
+MV_STATUS mvCtrlEnvInit(MV_VOID);
+MV_U32    mvCtrlMppRegGet(MV_U32 mppGroup);
+
+#if defined(MV_INCLUDE_PEX)
+MV_U32	  mvCtrlPexMaxIfGet(MV_VOID);
+#else
+#define   mvCtrlPexMaxIfGet()	(0)
+#endif
+
+#define   mvCtrlPciIfMaxIfGet()	(mvCtrlPexMaxIfGet())
+
+#if defined(MV_INCLUDE_GIG_ETH)
+MV_U32    mvCtrlEthMaxPortGet(MV_VOID);
+#endif
+#if defined(MV_INCLUDE_USB)
+MV_U32 	  mvCtrlUsbMaxGet(MV_VOID);
+#endif
+#if defined(MV_INCLUDE_NAND)
+MV_U32	  mvCtrlNandSupport(MV_VOID);
+#endif
+MV_U16    mvCtrlModelGet(MV_VOID);
+MV_U8     mvCtrlRevGet(MV_VOID);
+MV_STATUS mvCtrlNameGet(char *pNameBuff);
+MV_U32    mvCtrlModelRevGet(MV_VOID);
+MV_STATUS mvCtrlModelRevNameGet(char *pNameBuff);
+MV_VOID   mvCtrlAddrDecShow(MV_VOID);
+const MV_8* mvCtrlTargetNameGet(MV_TARGET target);
+MV_U32	  ctrlSizeToReg(MV_U32 size, MV_U32 alignment);
+MV_U32	  ctrlRegToSize(MV_U32 regSize, MV_U32 alignment);
+MV_U32	  ctrlSizeRegRoundUp(MV_U32 size, MV_U32 alignment);
+MV_STATUS ctrlWinOverlapTest(MV_ADDR_WIN *pAddrWin1, MV_ADDR_WIN *pAddrWin2);
+MV_STATUS ctrlWinWithinWinTest(MV_ADDR_WIN *pAddrWin1, MV_ADDR_WIN *pAddrWin2);
+
+MV_VOID   mvCtrlPwrClckSet(MV_UNIT_ID unitId, MV_U32 index, MV_BOOL enable);
+MV_BOOL	  mvCtrlPwrClckGet(MV_UNIT_ID unitId, MV_U32 index);
+MV_VOID   mvCtrlPwrMemSet(MV_UNIT_ID unitId, MV_U32 index, MV_BOOL enable);
+MV_BOOL	  mvCtrlIsBootFromSPI(MV_VOID);
+MV_BOOL	  mvCtrlIsBootFromNAND(MV_VOID);
+
+
+#endif /* __INCmvCtrlEnvLibh */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/dove_family/ctrlEnv/mvCtrlEnvLib.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/dove_family/ctrlEnv/mvCtrlEnvLib.c
@@ -0,0 +1,1154 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+/* includes */
+#include "mvCommon.h"
+#include "mvCtrlEnvLib.h"
+#include "ctrlEnv/sys/mvCpuIf.h"
+#include "gpp/mvGpp.h"
+
+#if defined(MV_INCLUDE_PEX)
+#include "pci-if/mvPciIf.h"
+#include "pci-if/pex/mvPex.h"
+#include "pci-if/pex/mvPexRegs.h"
+#include "mvSysPexApi.h"
+#endif
+
+#if defined(MV_INCLUDE_GIG_ETH)
+#include "mvSysEthApi.h"
+#endif
+
+#if defined(MV_INCLUDE_XOR)
+#include "mvSysXorApi.h"
+#endif
+
+#if defined(MV_INCLUDE_SATA)
+#include "mvSysSataApi.h"
+#endif
+
+#if defined(MV_INCLUDE_USB)
+#include "mvSysUsbApi.h"
+#endif
+
+#if defined(MV_INCLUDE_AUDIO)
+#include "mvSysAudioApi.h"
+#endif
+
+#if defined(MV_INCLUDE_PDMA)
+#include "mvSysPdmaApi.h"
+#endif
+
+
+/* defines  */
+#ifdef MV_DEBUG
+	#define DB(x)	x
+#else
+	#define DB(x)
+#endif	
+
+
+/*******************************************************************************
+* mvCtrlEnvInit - Initialize Marvell controller environment.
+*
+* DESCRIPTION:
+*       This function get environment information and initialize controller
+*       internal/external environment. For example
+*       1) MPP settings according to board MPP macros.
+*		NOTE: It is the user responsibility to shut down all DMA channels
+*		in device and disable controller sub units interrupts during 
+*		boot process.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_STATUS mvCtrlEnvInit(MV_VOID)
+{
+    	MV_U32 mppGroup;
+	MV_U32 reg = 0;
+
+	/* Read MPP group from board level and assign to MPP register */
+	for (mppGroup = 0; mppGroup <= MV_6781_MPP_MAX_GROUP; mppGroup++)
+	{
+		MV_REG_WRITE(mvCtrlMppRegGet(mppGroup), mvBoardMppGet(mppGroup));
+	}
+	/* Initialize MPPs from High GPIO */
+#if defined(RD_88F6781_AVNG)
+	mvGppFunctionSelectSet(0x18);
+#elif defined(DB_88F6781Y0)
+	mvGppFunctionSelectSet(0x10); /* Note: See also Table 6 in Spec if we want to set SSP */
+	reg = MV_REG_READ(MPP_GENERAL_CONFIG_REG);
+	reg &= ~(BIT0 | BIT1); /* NF_IO[15:8] dedicated for NAND */
+	MV_REG_WRITE(MPP_GENERAL_CONFIG_REG, reg); 
+#else
+	mvGppFunctionSelectSet(0);
+#endif
+	/* Identify MPPs group */
+	mvBoardMppGroupIdUpdate();
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvCtrlMppRegGet - return reg address of mpp group
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       mppGroup - MPP group.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_U32 - Register address.
+*
+*******************************************************************************/
+MV_U32 mvCtrlMppRegGet(MV_U32 mppGroup)
+{
+        MV_U32 ret;
+
+        switch(mppGroup){
+                case (0):       ret = MPP_CONTROL_REG0;
+                                break;
+                case (1):       ret = MPP_CONTROL_REG1;
+                                break;
+                case (2):       ret = MPP_CONTROL_REG2;
+                                break;
+                case (3):       ret = MPP_CONTROL_REG3;
+                                break;
+                default:        ret = MPP_CONTROL_REG0;
+                                break;
+        }
+        return ret;
+}
+#if defined(MV_INCLUDE_PEX) 
+/*******************************************************************************
+* mvCtrlPexMaxIfGet - Get Marvell controller number of PEX interfaces.
+*
+* DESCRIPTION:
+*       This function returns Marvell controller number of PEX interfaces.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       Marvell controller number of PEX interfaces. If controller 
+*		ID is undefined the function returns '0'.
+*
+*******************************************************************************/
+MV_U32 mvCtrlPexMaxIfGet(MV_VOID)
+{
+	return MV_PEX_MAX_IF;
+}
+#endif
+
+#if defined(MV_INCLUDE_GIG_ETH)
+/*******************************************************************************
+* mvCtrlEthMaxPortGet - Get Marvell controller number of etherent ports.
+*
+* DESCRIPTION:
+*       This function returns Marvell controller number of etherent port.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       Marvell controller number of etherent port.
+*
+*******************************************************************************/
+MV_U32 mvCtrlEthMaxPortGet(MV_VOID)
+{
+	return MV_ETH_MAX_PORTS;
+}
+#endif
+
+#if defined(MV_INCLUDE_XOR)
+/*******************************************************************************
+* mvCtrlXorMaxChanGet - Get Marvell controller number of XOR channels.
+*
+* DESCRIPTION:
+*       This function returns Marvell controller number of XOR channels.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       Marvell controller number of XOR channels.
+*
+*******************************************************************************/
+MV_U32 mvCtrlXorMaxChanGet(MV_VOID)
+{
+	return MV_XOR_MAX_CHAN; 
+}
+#endif
+
+#if defined(MV_INCLUDE_USB)
+/*******************************************************************************
+* mvCtrlUsbHostMaxGet - Get number of Marvell Usb  controllers
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       returns number of Marvell USB  controllers.
+*
+*******************************************************************************/
+MV_U32 mvCtrlUsbMaxGet(void)
+{
+	return MV_USB_MAX_PORTS;
+}
+#endif
+
+#if defined(MV_INCLUDE_NAND)
+/*******************************************************************************
+* mvCtrlNandSupport - Return if this controller has integrated NAND flash support
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE if NAND is supported and MV_FALSE otherwise
+*
+*******************************************************************************/
+MV_U32	  mvCtrlNandSupport(MV_VOID)
+{
+	return MV_6781_NAND;
+}
+#endif
+
+#if defined(MV_INCLUDE_SDIO)
+/*******************************************************************************
+* mvCtrlSdioSupport - Return if this controller has integrated SDIO flash support
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE if SDIO is supported and MV_FALSE otherwise
+*
+*******************************************************************************/
+MV_U32	  mvCtrlSdioSupport(MV_VOID)
+{
+	return MV_6781_SDIO;
+}
+#endif
+
+#if defined(MV_INCLUDE_AUDIO)
+/*******************************************************************************
+* mvCtrlAudioSupport - Return if this controller has integrated AUDIO flash support
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE if AUDIO is supported and MV_FALSE otherwise
+*
+*******************************************************************************/
+MV_U32	  mvCtrlAudioSupport(MV_VOID)
+{
+	return MV_6781_AUDIO;
+}
+#endif
+
+#if defined(MV_INCLUDE_AUDIO)
+/*******************************************************************************
+* mvCtrlTdmSupport - Return if this controller has integrated TDM flash support
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE if TDM is supported and MV_FALSE otherwise
+*
+*******************************************************************************/
+MV_U32	  mvCtrlTdmSupport(MV_VOID)
+{
+	return MV_6781_TDM;
+}
+#endif
+
+/*******************************************************************************
+* mvCtrlModelGet - Get Marvell controller device model (ID)
+*
+* DESCRIPTION:
+*       This function returns 16bit describing the device model (ID) as defined
+*       in PCI Device and Vendor ID configuration register offset 0x0.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       16bit desscribing Marvell controller ID 
+*
+*******************************************************************************/
+MV_U16 mvCtrlModelGet(MV_VOID)
+{
+	MV_U32 devId = 0;
+#if defined(MV_INCLUDE_CLK_PWR_CNTRL)
+	/* Check pex power state */
+	MV_U32 pexPower;
+	pexPower = mvCtrlPwrClckGet(PEX_UNIT_ID,0);
+	if (pexPower == MV_FALSE)
+		mvCtrlPwrClckSet(PEX_UNIT_ID, 0, MV_TRUE);
+#endif
+	devId = MV_REG_READ(PEX_CFG_DIRECT_ACCESS(0, PEX_DEVICE_AND_VENDOR_ID));
+#if defined(MV_INCLUDE_CLK_PWR_CNTRL)
+	/* Return to power off state */
+	if (pexPower == MV_FALSE)
+		mvCtrlPwrClckSet(PEX_UNIT_ID, 0, MV_FALSE);
+#endif
+	return ((devId & PXDAVI_DEV_ID_MASK) >> PXDAVI_DEV_ID_OFFS);
+}
+/*******************************************************************************
+* mvCtrlRevGet - Get Marvell controller device revision number
+*
+* DESCRIPTION:
+*       This function returns 8bit describing the device revision as defined
+*       in PCI Express Class Code and Revision ID Register.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       8bit desscribing Marvell controller revision number 
+*
+*******************************************************************************/
+MV_U8 mvCtrlRevGet(MV_VOID)
+{
+	MV_U8 revNum;
+#if defined(MV_INCLUDE_CLK_PWR_CNTRL)
+	/* Check pex power state */
+	MV_U32 pexPower;
+	pexPower = mvCtrlPwrClckGet(PEX_UNIT_ID,0);
+	if (pexPower == MV_FALSE)
+		mvCtrlPwrClckSet(PEX_UNIT_ID, 0, MV_TRUE);
+#endif
+	revNum = (MV_U8)MV_REG_READ(PEX_CFG_DIRECT_ACCESS(0, PCI_CLASS_CODE_AND_REVISION_ID));
+#if defined(MV_INCLUDE_CLK_PWR_CNTRL)
+	/* Return to power off state */
+	if (pexPower == MV_FALSE)
+		mvCtrlPwrClckSet(PEX_UNIT_ID, 0, MV_FALSE);
+#endif
+	return ((revNum & PCCRIR_REVID_MASK) >> PCCRIR_REVID_OFFS);
+}
+
+/*******************************************************************************
+* mvCtrlNameGet - Get Marvell controller name
+*
+* DESCRIPTION:
+*       This function returns a string describing the device model and revision.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       pNameBuff - Buffer to contain device name string. Minimum size 30 chars.
+*
+* RETURN:
+*       
+*       MV_ERROR if informantion can not be read.
+*******************************************************************************/
+MV_STATUS mvCtrlNameGet(char *pNameBuff)
+{
+	mvOsSPrintf (pNameBuff, "%s%x Rev %d", SOC_NAME_PREFIX, 
+				mvCtrlModelGet(), mvCtrlRevGet()); 
+	
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvCtrlModelRevGet - Get Controller Model (Device ID) and Revision
+*
+* DESCRIPTION:
+*       This function returns 32bit value describing both Device ID and Revision
+*       as defined in PCI Express Device and Vendor ID Register and device revision
+*	    as defined in PCI Express Class Code and Revision ID Register.
+     
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       32bit describing both controller device ID and revision number
+*
+*******************************************************************************/
+MV_U32	mvCtrlModelRevGet(MV_VOID)
+{
+	return ((mvCtrlModelGet() << 16) | mvCtrlRevGet());
+}
+
+/*******************************************************************************
+* mvCtrlModelRevNameGet - Get Marvell controller name
+*
+* DESCRIPTION:
+*       This function returns a string describing the device model and revision.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       pNameBuff - Buffer to contain device name string. Minimum size 30 chars.
+*
+* RETURN:
+*       
+*       MV_ERROR if informantion can not be read.
+*******************************************************************************/
+
+MV_STATUS mvCtrlModelRevNameGet(char *pNameBuff)
+{
+        switch (mvCtrlModelRevGet())
+        {
+        case MV_6781_Z0_ID:
+                mvOsSPrintf (pNameBuff, "%s",MV_6781_Z0_NAME); 
+                break;
+        case MV_6781_Z1_ID:
+                mvOsSPrintf (pNameBuff, "%s",MV_6781_Z1_NAME); 
+                break;
+        case MV_6781_Y0_ID:
+                mvOsSPrintf (pNameBuff, "%s",MV_6781_Y0_NAME); 
+                break;
+        default:
+                mvCtrlNameGet(pNameBuff);
+                break;
+        }
+        return MV_OK;
+}
+
+
+/*******************************************************************************
+* ctrlWinOverlapTest - Test address windows for overlaping.
+*
+* DESCRIPTION:
+*       This function checks the given two address windows for overlaping.
+*
+* INPUT:
+*       pAddrWin1 - Address window 1.
+*       pAddrWin2 - Address window 2.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       
+*       MV_TRUE if address window overlaps, MV_FALSE otherwise.
+*******************************************************************************/
+MV_STATUS ctrlWinOverlapTest(MV_ADDR_WIN *pAddrWin1, MV_ADDR_WIN *pAddrWin2)
+{
+    MV_U32 winBase1, winBase2;
+    MV_U32 winTop1, winTop2;
+    
+    /* check if we have overflow than 4G*/
+    if (((0xffffffff - pAddrWin1->baseLow) < pAddrWin1->size-1)||
+       ((0xffffffff - pAddrWin2->baseLow) < pAddrWin2->size-1))
+    {
+	return MV_TRUE;
+    }
+
+    winBase1 = pAddrWin1->baseLow;
+    winBase2 = pAddrWin2->baseLow;
+    winTop1  = winBase1 + pAddrWin1->size-1;
+    winTop2  = winBase2 + pAddrWin2->size-1;
+
+    
+    if (((winBase1 <= winTop2 ) && ( winTop2 <= winTop1)) ||
+        ((winBase1 <= winBase2) && (winBase2 <= winTop1)))
+    {
+        return MV_TRUE;
+    }
+    else
+    {
+        return MV_FALSE;
+    }
+}
+
+/*******************************************************************************
+* ctrlWinWithinWinTest - Test address windows for overlaping.
+*
+* DESCRIPTION:
+*       This function checks the given win1 boundries is within
+*		win2 boundries.
+*
+* INPUT:
+*       pAddrWin1 - Address window 1.
+*       pAddrWin2 - Address window 2.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       
+*       MV_TRUE if found win1 inside win2, MV_FALSE otherwise.
+*******************************************************************************/
+MV_STATUS ctrlWinWithinWinTest(MV_ADDR_WIN *pAddrWin1, MV_ADDR_WIN *pAddrWin2)
+{
+    MV_U32 winBase1, winBase2;
+    MV_U32 winTop1, winTop2;
+    
+    winBase1 = pAddrWin1->baseLow;
+    winBase2 = pAddrWin2->baseLow;
+    winTop1  = winBase1 + pAddrWin1->size -1;
+    winTop2  = winBase2 + pAddrWin2->size -1;
+    
+    if (((winBase1 >= winBase2 ) && ( winBase1 <= winTop2)) ||
+        ((winTop1  >= winBase2) && (winTop1 <= winTop2)))
+    {
+        return MV_TRUE;
+    }
+    else
+    {
+        return MV_FALSE;
+    }
+}
+
+static const char* cntrlName[] = TARGETS_NAME_ARRAY;
+
+/*******************************************************************************
+* mvCtrlTargetNameGet - Get Marvell controller target name
+*
+* DESCRIPTION:
+*       This function convert the trget enumeration to string.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       Target name (const MV_8 *)
+*******************************************************************************/
+const MV_8* mvCtrlTargetNameGet( MV_TARGET target )
+{
+
+	if (target >= MAX_TARGETS)
+	{
+		return "target unknown";
+	}
+
+	return cntrlName[target];
+}
+
+/*******************************************************************************
+* mvCtrlAddrDecShow - Print the Controller units address decode map.
+*
+* DESCRIPTION:
+*		This function the Controller units address decode map.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_VOID mvCtrlAddrDecShow(MV_VOID)
+{
+    	mvCpuIfAddDecShow();
+    	mvAhbToMbusAddDecShow();
+#if defined(MV_INCLUDE_PEX)
+	mvPexAddrDecShow();
+#endif
+#if defined(MV_INCLUDE_USB)
+    	mvUsbAddrDecShow();
+#endif
+#if defined(MV_INCLUDE_GIG_ETH)
+	mvEthAddrDecShow();
+#endif
+#if defined(MV_INCLUDE_XOR)
+	mvXorAddrDecShow();
+#endif
+#if defined(MV_INCLUDE_SATA)
+    	mvSataAddrDecShow();
+#endif
+#if defined(MV_INCLUDE_AUDIO)
+    	mvAudioAddrDecShow();
+#endif
+#if defined(MV_INCLUDE_PDMA)
+    	mvPdmaAddrDecShow();
+#endif
+
+}
+
+/*******************************************************************************
+* ctrlSizeToReg - Extract size value for register assignment.
+*
+* DESCRIPTION:		
+*       Address decode size parameter must be programed from LSB to MSB as
+*       sequence of 1's followed by sequence of 0's. The number of 1's 
+*       specifies the size of the window in 64 KB granularity (e.g. a 
+*       value of 0x00ff specifies 256x64k = 16 MB).
+*       This function extract the size value from the size parameter according 
+*	to given aligment paramter. For example for size 0x1000000 (16MB) and 
+*	aligment 0x10000 (64KB) the function will return 0x00FF.
+*
+* INPUT:
+*       size - Size.
+*		alignment - Size alignment. Note that alignment must be power of 2!
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       32bit describing size register value correspond to size parameter. 
+*		If value is '-1' size parameter or aligment are invalid.
+*******************************************************************************/
+MV_U32	ctrlSizeToReg(MV_U32 size, MV_U32 alignment)
+{
+	MV_U32 retVal;
+
+	/* Check size parameter alignment		*/
+	if ((0 == size) || (MV_IS_NOT_ALIGN(size, alignment)))
+	{
+		DB(mvOsPrintf("ctrlSizeToReg: ERR. Size is zero or not aligned.\n"));
+		return -1;
+	}
+	
+	/* Take out the "alignment" portion out of the size parameter */
+	alignment--;	/* Now the alignmet is a sequance of '1' (e.g. 0xffff) 		*/
+			/* and size is 0x1000000 (16MB) for example	*/
+	while(alignment & 1)	/* Check that alignmet LSB is set	*/
+	{
+		size = (size >> 1); /* If LSB is set, move 'size' one bit to right	*/	
+		alignment = (alignment >> 1);
+	}
+	
+	/* If after the alignment first '0' was met we still have '1' in 		*/
+	/* it then aligment is invalid (not power of 2) 				*/
+	if (alignment)
+	{
+		DB(mvOsPrintf("ctrlSizeToReg: ERR. Alignment parameter 0x%x invalid.\n", 
+			(MV_U32)alignment));
+		return -1;
+	}
+
+	/* Now the size is shifted right according to aligment: 0x0100			*/
+	size--;         /* Now the size is a sequance of '1': 0x00ff 			*/
+    
+	retVal = size ;
+	
+	/* Check that LSB to MSB is sequence of 1's followed by sequence of 0's		*/
+	while(size & 1)	/* Check that LSB is set	*/
+	{
+		size = (size >> 1); /* If LSB is set, move one bit to the right		*/	
+	}
+
+    	if (size) /* Sequance of 1's is over. Check that we have no other 1's		*/
+	{
+		DB(mvOsPrintf("ctrlSizeToReg: ERR. Size parameter 0x%x invalid.\n", 
+                                                                        size));
+		return -1;
+	}
+	
+    	return retVal;
+}
+
+/*******************************************************************************
+* ctrlRegToSize - Extract size value from register value.
+*
+* DESCRIPTION:		
+*       This function extract a size value from the register size parameter 
+*	according to given aligment paramter. For example for register size 
+*	value 0xff and aligment 0x10000 the function will return 0x01000000.
+*
+* INPUT:
+*       regSize   - Size as in register format.	See ctrlSizeToReg.
+*	alignment - Size alignment. Note that alignment must be power of 2!
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       32bit describing size. 
+*		If value is '-1' size parameter or aligment are invalid.
+*******************************************************************************/
+MV_U32	ctrlRegToSize(MV_U32 regSize, MV_U32 alignment)
+{
+   	MV_U32 temp;
+
+	/* Check that LSB to MSB is sequence of 1's followed by sequence of 0's		*/ 
+	temp = regSize;		/* Now the size is a sequance of '1': 0x00ff		*/
+	
+	while(temp & 1)	/* Check that LSB is set					*/
+	{
+		temp = (temp >> 1); /* If LSB is set, move one bit to the right		*/	
+	}
+
+    	if (temp) /* Sequance of 1's is over. Check that we have no other 1's		*/
+	{
+		DB(mvOsPrintf("ctrlRegToSize: ERR. Size parameter 0x%x invalid.\n", 
+					regSize));
+	   	return -1;
+	}
+	
+
+	/* Check that aligment is a power of two					*/
+	temp = alignment - 1;/* Now the alignmet is a sequance of '1' (0xffff) 		*/
+					
+	while(temp & 1)	/* Check that alignmet LSB is set				*/
+	{
+		temp = (temp >> 1); /* If LSB is set, move 'size' one bit to right	*/	
+	}
+	
+	/* If after the 'temp' first '0' was met we still have '1' in 'temp'		*/
+	/* then 'temp' is invalid (not power of 2) 					*/
+	if (temp)
+	{
+		DB(mvOsPrintf("ctrlSizeToReg: ERR. Alignment parameter 0x%x invalid.\n", 
+					alignment));
+		return -1;
+	}
+
+	regSize++;      /* Now the size is 0x0100					*/
+
+	/* Add in the "alignment" portion to the register size parameter 		*/
+	alignment--;	/* Now the alignmet is a sequance of '1' (e.g. 0xffff) 		*/
+
+	while(alignment & 1)	/* Check that alignmet LSB is set			*/
+	{
+		regSize   = (regSize << 1); /* LSB is set, move 'size' one bit left	*/	
+		alignment = (alignment >> 1);
+	}
+		
+    	return regSize;	
+}
+
+
+/*******************************************************************************
+* ctrlSizeRegRoundUp - Round up given size 
+*
+* DESCRIPTION:		
+*       This function rounds up a given size to a size that fits the 
+*       restrictions of size format given an aligment parameter.
+*	For example for size parameter 0xa1000 and aligment 0x1000 
+* 	the function will return 0xFF000.
+*
+* INPUT:
+*       size - Size.
+*	alignment - Size alignment. Note that alignment must be power of 2!
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       32bit describing size value correspond to size in register.  
+*******************************************************************************/
+MV_U32	ctrlSizeRegRoundUp(MV_U32 size, MV_U32 alignment)
+{
+	MV_U32 msbBit = 0;
+	MV_U32 retSize;
+	
+	/* Check if size parameter is already comply with restriction */
+	if (!(-1 == ctrlSizeToReg(size, alignment)))
+	{
+		return size;
+	}
+    
+    	while(size)
+	{
+		size = (size >> 1);
+        	msbBit++;
+	}
+
+    	retSize = (1 << msbBit);
+    
+    	if (retSize < alignment)
+    	{
+        	return alignment;
+    	}
+    	else
+    	{
+        	return retSize;
+    	}
+}
+
+MV_BOOL	  mvCtrlIsBootFromSPI(MV_VOID)
+{
+    MV_U32 satr = 0;
+    satr = MV_REG_READ(MPP_SAMPLE_AT_RESET_REG0);
+    satr = satr & MSAR_BOOT_MODE_MASK;
+    
+    if ((satr == MSAR_BOOT_SPI_NO_BOOTROM) || 
+	(satr == MSAR_BOOT_SPI_3_CYCLES)   ||
+	(satr == MSAR_BOOT_SPI_4_CYCLES))
+	return MV_TRUE;
+    else
+	return MV_FALSE;
+}
+
+MV_BOOL	  mvCtrlIsBootFromNAND(MV_VOID)
+{
+    MV_U32 satr = 0;
+    satr = MV_REG_READ(MPP_SAMPLE_AT_RESET_REG0);
+    satr = satr & MSAR_BOOT_MODE_MASK;
+    
+    if (((satr >= MSAR_BOOT_NAND_1) && (satr <= MSAR_BOOT_NAND_9)) || 
+	((satr >= MSAR_BOOT_NAND_10) && (satr <= MSAR_BOOT_NAND_21)))
+	return MV_TRUE;
+    else
+	return MV_FALSE;
+}
+
+#if defined(MV_INCLUDE_CLK_PWR_CNTRL)
+/*******************************************************************************
+* mvCtrlPwrClckSet - Set Power State for specific Unit
+*
+* DESCRIPTION:		
+*
+* INPUT:
+*
+* OUTPUT:
+*
+* RETURN:
+*******************************************************************************/
+MV_VOID	mvCtrlPwrClckSet(MV_UNIT_ID unitId, MV_U32 index, MV_BOOL enable)
+{
+	/* Note: '0' in bit means enable clock, '1' means disable clock */
+	switch (unitId)
+	{
+#if defined(MV_INCLUDE_USB)
+	case USB_UNIT_ID:
+		if (enable == MV_TRUE)
+			MV_REG_BIT_SET(CLOCK_GATING_CTRL_REG, CGC_USBENCLOCK_MASK(index));
+		else
+			MV_REG_BIT_RESET(CLOCK_GATING_CTRL_REG, CGC_USBENCLOCK_MASK(index));
+		break;
+#endif
+#if defined(MV_INCLUDE_GIG_ETH)
+	case ETH_GIG_UNIT_ID:
+		if (enable == MV_TRUE)
+			MV_REG_BIT_SET(CLOCK_GATING_CTRL_REG, CGC_GEENCLOCK_MASK);
+		else
+			MV_REG_BIT_RESET(CLOCK_GATING_CTRL_REG, CGC_GEENCLOCK_MASK);
+		break;
+#endif
+#if defined(MV_INCLUDE_INTEG_SATA)
+	case SATA_UNIT_ID:
+		if (enable == MV_TRUE)
+			MV_REG_BIT_SET(CLOCK_GATING_CTRL_REG, CGC_SATAENCLOCK_MASK);
+		else
+			MV_REG_BIT_RESET(CLOCK_GATING_CTRL_REG, CGC_SATAENCLOCK_MASK);
+		break;
+#endif
+#if defined(MV_INCLUDE_PEX)
+	case PEX_UNIT_ID:
+		if (enable == MV_TRUE)
+			MV_REG_BIT_SET(CLOCK_GATING_CTRL_REG, CGC_PEXENCLOCK_MASK(index));
+		else
+			MV_REG_BIT_RESET(CLOCK_GATING_CTRL_REG, CGC_PEXENCLOCK_MASK(index));
+		break;
+#endif
+#if defined(MV_INCLUDE_SDIO)
+	case SDIO_UNIT_ID:
+		if (enable == MV_TRUE)
+			MV_REG_BIT_SET(CLOCK_GATING_CTRL_REG, CGC_SDIOENCLOCK_MASK(index));
+		else
+			MV_REG_BIT_RESET(CLOCK_GATING_CTRL_REG, CGC_SDIOENCLOCK_MASK(index));
+		break;
+#endif
+#if defined(MV_INCLUDE_NAND)
+	case NAND_UNIT_ID:
+		if (enable == MV_TRUE)
+			MV_REG_BIT_SET(CLOCK_GATING_CTRL_REG, CGC_NANDENCLOCK_MASK);
+		else
+			MV_REG_BIT_RESET(CLOCK_GATING_CTRL_REG, CGC_NANDENCLOCK_MASK);
+		break;
+#endif
+#if defined(MV_INCLUDE_CAMERA)
+	case CAMERA_UNIT_ID:
+		if (enable == MV_TRUE)
+			MV_REG_BIT_SET(CLOCK_GATING_CTRL_REG, CGC_CAMENCLOCK_MASK);
+		else
+			MV_REG_BIT_RESET(CLOCK_GATING_CTRL_REG, CGC_CAMENCLOCK_MASK);
+		break;
+#endif
+#if defined(MV_INCLUDE_AUDIO)
+	case AUDIO_UNIT_ID:
+		if (enable == MV_TRUE)
+			MV_REG_BIT_SET(CLOCK_GATING_CTRL_REG, CGC_ADENCLOCK_MASK(index));
+		else
+			MV_REG_BIT_RESET(CLOCK_GATING_CTRL_REG, CGC_ADENCLOCK_MASK(index));
+		break;
+#endif
+
+#if defined(MV_INCLUDE_GPU)
+	case GPU_UNIT_ID:
+		if (enable == MV_TRUE)
+			MV_REG_BIT_SET(CLOCK_GATING_CTRL_REG, CGC_GPUENCLOCK_MASK);
+		else
+			MV_REG_BIT_RESET(CLOCK_GATING_CTRL_REG, CGC_GPUENCLOCK_MASK);
+		break;
+#endif
+
+#if defined(MV_INCLUDE_AC97)
+	case AC97_UNIT_ID:
+		if (enable == MV_TRUE)
+			MV_REG_BIT_SET(CLOCK_GATING_CTRL_REG, CGC_AC97ENCLOCK_MASK);
+		else
+			MV_REG_BIT_RESET(CLOCK_GATING_CTRL_REG, CGC_AC97ENCLOCK_MASK);
+		break;
+#endif
+
+#if defined(MV_INCLUDE_PDMA)
+	case PDMA_UNIT_ID:
+		if (enable == MV_TRUE)
+			MV_REG_BIT_SET(CLOCK_GATING_CTRL_REG, CGC_PDMAENCLOCK_MASK);
+		else
+			MV_REG_BIT_RESET(CLOCK_GATING_CTRL_REG, CGC_PDMAENCLOCK_MASK);
+		break;
+#endif
+
+#if defined(MV_INCLUDE_XOR)
+	case XOR_UNIT_ID:
+		if (enable == MV_TRUE)
+			MV_REG_BIT_SET(CLOCK_GATING_CTRL_REG, CGC_XORENCLOCK_MASK(index));
+		else
+			MV_REG_BIT_RESET(CLOCK_GATING_CTRL_REG, CGC_XORENCLOCK_MASK(index));
+		break;
+#endif
+	default:
+		break;
+	}
+}
+
+/*******************************************************************************
+* mvCtrlPwrClckGet - Get Power State of specific Unit
+*
+* DESCRIPTION:		
+*
+* INPUT:
+*
+* OUTPUT:
+*
+* RETURN:
+******************************************************************************/
+MV_BOOL	mvCtrlPwrClckGet(MV_UNIT_ID unitId, MV_U32 index)
+{
+	MV_U32 reg = MV_REG_READ(CLOCK_GATING_CTRL_REG);
+	MV_BOOL state = MV_TRUE;
+
+	switch (unitId)
+	{
+#if defined(MV_INCLUDE_USB)
+	case USB_UNIT_ID:
+		if ((reg & CGC_USBENCLOCK_MASK(index)) == CGC_USBENCLOCK_DIS(index))
+			state = MV_FALSE;
+		else 
+			state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_GIG_ETH)
+	case ETH_GIG_UNIT_ID:
+		if ((reg & CGC_GEENCLOCK_MASK) == CGC_GEENCLOCK_DIS)
+			state = MV_FALSE;
+		else 
+			state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_SATA)
+	case SATA_UNIT_ID:
+		if ((reg & CGC_SATAENCLOCK_MASK) == CGC_SATAENCLOCK_DIS)
+			state = MV_FALSE;
+		else 
+			state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_PEX)
+	case PEX_UNIT_ID:
+		if ((reg & CGC_PEXENCLOCK_MASK(index)) == CGC_PEXENCLOCK_DIS(index))
+			state = MV_FALSE;
+		else 
+			state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_SDIO)
+	case SDIO_UNIT_ID:
+		if ((reg & CGC_SDIOENCLOCK_MASK(index))== CGC_SDIOENCLOCK_DIS(index))
+			state = MV_FALSE;
+		else 
+			state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_NAND)
+	case NAND_UNIT_ID:
+		if ((reg & CGC_NANDENCLOCK_MASK) == CGC_NANDENCLOCK_DIS)
+			state = MV_FALSE;
+		else 
+			state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_CAMERA)
+	case CAMERA_UNIT_ID:
+		if ((reg & CGC_CAMENCLOCK_MASK) == CGC_CAMENCLOCK_DIS)
+			state = MV_FALSE;
+		else 
+			state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_AUDIO)
+	case AUDIO_UNIT_ID:
+		if ((reg & CGC_ADENCLOCK_MASK(index)) == CGC_ADENCLOCK_DIS(index))
+			state = MV_FALSE;
+		else 
+			state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_GPU)
+	case GPU_UNIT_ID:
+		if ((reg & CGC_GPUENCLOCK_MASK) == CGC_GPUENCLOCK_DIS)
+			state = MV_FALSE;
+		else 
+			state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_AC97)
+	case AC97_UNIT_ID:
+		if ((reg & CGC_AC97ENCLOCK_MASK) == CGC_AC97ENCLOCK_DIS)
+			state = MV_FALSE;
+		else 
+			state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_PDAM)
+	case PDMA_UNIT_ID:
+		if ((reg & CGC_PDMAENCLOCK_MASK) == CGC_PDMAENCLOCK_DIS)
+			state = MV_FALSE;
+		else 
+			state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_XOR)
+	case XOR_UNIT_ID:
+		if ((reg & CGC_XORENCLOCK_MASK(index))== CGC_XORENCLOCK_DIS(index))
+			state = MV_FALSE;
+		else 
+			state = MV_TRUE;
+		break;
+#endif
+	default:
+		state = MV_TRUE;
+		break;
+	}
+
+	return state;	
+}
+#else
+MV_VOID   mvCtrlPwrClckSet(MV_UNIT_ID unitId, MV_U32 index, MV_BOOL enable) {return;}
+MV_BOOL	  mvCtrlPwrClckGet(MV_UNIT_ID unitId, MV_u32 index) {return MV_TRUE;}
+#endif /* #if defined(MV_INCLUDE_CLK_PWR_CNTRL) */
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/dove_family/ctrlEnv/mvCtrlEnvSpec.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/dove_family/ctrlEnv/mvCtrlEnvSpec.h
@@ -0,0 +1,360 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+        this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCmvCtrlEnvSpech
+#define __INCmvCtrlEnvSpech
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+#define MV_ARM_SOC
+#define SOC_NAME_PREFIX			"MV88F"
+
+/* used for sync write reordering in bridge*/ 
+/*#define MV_BRIDGE_SYNC_REORDER*/
+#define MV_DDR_INCLUDE_DDRMC
+
+/* units base and port numbers */
+/* Only one actual TWSI unit - always return the same base address regardless of chanNum */
+#define MV_SPI_REGS_OFFSET(unit)		(0x10600 | (unit << 14))
+#define MV_TWSI_SLAVE_REGS_OFFSET(chanNum)	(0x11000)
+#define MV_UART_CHAN_OFFSET(chanNum)		(0x12000 + (chanNum * 0x100))
+#define MV_CPUIF_REGS_OFFSET			(0x20000)
+#define MV_CNTMR_REGS_OFFSET			(0x20300)
+#define MV_CESA_TDMA_REGS_OFFSET		(0x30000)
+#define MV_CESA_REGS_OFFSET			(0x3D000)
+#define MV_PEX_IF_REGS_OFFSET(pexIf)		(0x40000 + (pexIf * 0x40000))
+#define MV_USB_REGS_OFFSET(dev)       		((dev) ? 0x51000:0x50000)
+#define MV_XOR_REGS_OFFSET(unit)           	((unit) ? 0x60900:0x60800)
+#define MV_ETH_REGS_OFFSET(port)		(((port) == 0) ? 0x72000 : 0x72000)
+#define MV_SDIO_REGS_OFFSET(dev)		((dev) ? 0x90000:0x92000)
+#define MV_CAM_SDIO_REGS_OFFSET			(0x90000)
+#define MV_CAFE_REGS_OFFSET			(0x94000)
+#define MV_SATA_REGS_OFFSET           		(0xA0000)
+#define MV_AUDIO_REGS_OFFSET(unit)		((unit) ? 0xB4000:0xB0000)
+#define MV_NFC_REGS_OFFSET			(0xC0000)
+#define MV_PMU_REGS_OFFSET			(0xD0000)
+#define MV_MISC_REGS_OFFSET			(0xD0000)
+#define MV_GPP_REGS_OFFSET(grp)			((grp) ? 0xD0420:0xD0400)
+#define MV_GPP_REGS_OFFSET_0			0xD0400
+#define MV_RTC_REGS_OFFSET			(0xD8500)
+#define MV_AC97_REGS_OFFSET			(0xE0000)
+#define MV_PDMA_REGS_OFFSET			(0xE4000)
+#define MV_DDR_REGS_OFFSET			(0x800000)
+
+#define INTER_REGS_SIZE	 	 	_16M
+
+/* This define describes the TWSI interrupt bit and location */
+#define TWSI_CPU_MAIN_INT_CAUSE_REG		0x20200
+#define TWSI0_CPU_MAIN_INT_BIT			(1<<11)
+
+/* This define describes the TWSI Baud Rate */
+#define TWSI_SPEED				100000
+
+#define MV_GPP_MAX_GROUP    		2
+#define MV_CNTMR_MAX_COUNTER 		2
+#define MV_UART_MAX_CHAN		4
+#define MV_XOR_MAX_UNIT         	2
+#define MV_XOR_MAX_CHAN         	4 /* total channels for all units together */
+#define MV_XOR_MAX_CHAN_PER_UNIT       	2 /* channels for units */
+#define MV_SATA_MAX_CHAN	 	1
+#define MV_TWSI_MAX_CHAN		3
+
+/* channel ranges for twsi units */
+#define MV_TWSI_UNIT_SOC_MIN_CHANNEL		0
+#define MV_TWSI_UNIT_SOC_MAX_CHANNEL            2
+#define MV_TWSI_UNIT_CAM_MIN_CHANNEL         MV_TWSI_UNIT_SOC_MAX_CHANNEL+1
+#define MV_TWSI_UNIT_CAM_MAX_CHANNEL	     MV_TWSI_UNIT_CAM_MIN_CHANNEL 
+/* which twsi units are included */
+#define MV_TWSI_UNIT_INCLUDE_SOC        1
+#define MV_TWSI_UNIT_INCLUDE_CAM	1
+/* channel definitions */
+#define MV_TWSI_CHAN_CAM	MV_TWSI_UNIT_CAM_MAX_CHANNEL
+
+#define MV_6781_MPP_MAX_GROUP		2
+#define MV_6781_MPP_MAX_MODULE		2
+
+#define MV_DRAM_MAX_CS      		2
+
+/* This define describes the maximum number of supported PCI\PCIX Interfaces*/
+#define MV_PCI_MAX_IF		0
+#define MV_PCI_START_IF		0
+
+/* This define describes the maximum number of supported PEX Interfaces 	*/
+#define MV_INCLUDE_PEX0
+#define MV_DISABLE_PEX_DEVICE_BAR 
+#define MV_PEX_MAX_IF		2
+#define MV_PEX_START_IF		MV_PCI_MAX_IF
+
+/* This define describes the maximum number of supported PCI Interfaces 	*/
+#define MV_PCI_IF_MAX_IF   	(MV_PEX_MAX_IF+MV_PCI_MAX_IF)
+
+#define MV_ETH_MAX_PORTS		1
+
+#define MV_IDMA_MAX_CHAN    		0
+
+#define MV_USB_MAX_PORTS		2
+
+#define MV_6781_NAND			1
+
+#define MV_6781_SDIO			1
+
+#define MV_6781_AUDIO			1
+
+#define MV_AUDIO_MAX_UNITS		2
+
+#define MV_6781_TDM			0
+
+#define MV_DEVICE_MAX_CS      		4
+
+/* Others */
+#define PEX_HOST_BUS_NUM(pciIf)		(pciIf)
+#define PEX_HOST_DEV_NUM(pciIf)		0
+/* CESA version #2: One channel, 2KB SRAM, TDMA */
+#define MV_CESA_VERSION		 	2
+#define MV_CESA_SRAM_SIZE               2*1024
+
+#define MV_ETH_VERSION 			4
+#define MV_ETH_PORT_SGMII          	{ MV_FALSE }
+#define MV_ETH_MAX_RXQ                 8
+#define MV_ETH_MAX_TXQ                 8
+
+/* This define describes the the support of USB 	*/
+#define MV_USB_VERSION  		1
+
+#define MV_INCLUDE_SDRAM_CS0
+#define MV_INCLUDE_SDRAM_CS1
+#define MV_INCLUDE_SDRAM_CS2
+
+#define MV_INCLUDE_DEVICE_CS0
+#define MV_INCLUDE_DEVICE_CS1
+#define MV_INCLUDE_DEVICE_CS2
+#define MV_INCLUDE_DEVICE_CS3
+
+
+#define MV_TARGET_IS_DRAM(target)   \
+                            ((target >= SDRAM_CS0) && (target <= SDRAM_CS3))
+
+#define MV_TARGET_IS_PEX0(target)   \
+                            ((target >= PEX0_MEM) && (target <= PEX0_IO))
+
+#define MV_TARGET_IS_PEX1(target)   \
+                            ((target >= PEX1_MEM) && (target <= PEX1_IO))
+
+#define MV_TARGET_IS_PEX(target) (MV_TARGET_IS_PEX0(target) || MV_TARGET_IS_PEX1(target))
+
+#define MV_TARGET_IS_DEVICE(target) \
+                            ((target >= DEVICE_CS0) && (target <= DEVICE_CS3))
+
+
+#ifndef MV_ASMLANGUAGE
+
+/* This enumerator defines the Marvell Units ID      */ 
+typedef enum _mvUnitId
+{
+    DRAM_UNIT_ID,
+    PEX_UNIT_ID,
+    ETH_GIG_UNIT_ID,
+    USB_UNIT_ID,
+    XOR_UNIT_ID,
+    SATA_UNIT_ID,
+    UART_UNIT_ID,
+    NAND_UNIT_ID,
+    SPI_UNIT_ID,
+    CAMERA_UNIT_ID,
+    GPU_UNIT_ID,
+    AUDIO_UNIT_ID,
+    AC97_UNIT_ID,
+    SDIO_UNIT_ID,
+    PDMA_UNIT_ID,
+    MAX_UNITS_ID
+
+}MV_UNIT_ID;
+
+/* This enumerator defines the Marvell controller target ID      */ 
+typedef enum _mvTargetId
+{
+    DRAM_TARGET_ID  = 0,    /* Port 0 -> DRAM interface         */
+    DEV_TARGET_ID   = 1,    /* Port 1 -> SPI	 		*/
+    CRYPT_TARGET_ID = 3,    /* Port 3 -> Crypto Engine		*/
+    PEX0_TARGET_ID  = 4,    /* Port 4 -> PCI Express0 		*/
+    PEX1_TARGET_ID  = 8,    /* Port 8 -> PCI Express1 		*/
+    NAND_FLASH_ID   = 0xC, 
+    PMU_SRAM_ID     = 0xD, 
+    MAX_TARGETS_ID
+} MV_TARGET_ID;
+
+/* This enumerator describes the Marvell controller possible devices that   */
+/* can be connected to its device interface.                                */
+typedef enum _mvDevice
+{
+#if defined(MV_INCLUDE_DEVICE_CS0)
+	DEV_CS0 = 0,    /* Device connected to dev CS[0]    */
+#endif
+#if defined(MV_INCLUDE_DEVICE_CS1)
+	DEV_CS1 = 1,        /* Device connected to dev CS[1]    */
+#endif
+#if defined(MV_INCLUDE_DEVICE_CS2)
+	DEV_CS2 = 2,        /* Device connected to dev CS[2]    */
+#endif
+#if defined(MV_INCLUDE_DEVICE_CS3)
+	DEV_CS3 = 3,        /* Device connected to dev CS[2]    */
+#endif
+#if defined(MV_INCLUDE_DEVICE_CS4)
+	DEV_CS4 = 4,        /* Device connected to BOOT dev    */
+#endif
+	MV_DEV_MAX_CS = MV_DEVICE_MAX_CS
+}MV_DEVICE;
+
+
+/* This enumerator described the possible Controller paripheral targets.    */
+/* Controller peripherals are designated memory/IO address spaces that the  */
+/* controller can access. They are also referred to as "targets".           */
+typedef enum _mvTarget
+{
+    TBL_TERM = -1, 	/* non valid target, used as targets list terminator	*/
+    SDRAM_CS0,     	/* DDR SDRAM Chip Select 0			*/  
+    SDRAM_CS1,     	/* DDR SDRAM Chip Select 1			*/  
+    SDRAM_CS2,     	/* DDR SDRAM Chip Select 2			*/
+    SDRAM_CS3,     	/* DDR SDRAM Chip Select 3			*/
+    PEX0_MEM,		/* PCI Express 0 Memory				*/
+    PEX0_IO,		/* PCI Express 0 IO				*/
+    PEX1_MEM,		/* PCI Express 1 Memory				*/
+    PEX1_IO,		/* PCI Express 1 IO				*/
+    INTER_REGS,     	/* Internal registers                           */  
+    SPI0,	     	/* SPI0						*/  
+    SPI1,	      	/* SPI1						*/  
+    BOOT_ROM_CS,	/* BOOT_ROM_CS					*/
+    DEV_BOOCS,     	/* DEV_BOOCS					*/
+    CRYPT_ENG,      	/* Crypto Engine				*/
+    MAX_TARGETS
+
+} MV_TARGET;
+
+#define TARGETS_DEF_ARRAY	{			\
+    {0x00,DRAM_TARGET_ID}, /* DDR_SDRAM */		\
+    {0x00,DRAM_TARGET_ID}, /* DDR_SDRAM */		\
+    {0x00,DRAM_TARGET_ID}, /* DDR_SDRAM */		\
+    {0x00,DRAM_TARGET_ID}, /* DDR_SDRAM */		\
+    {0xE8,PEX0_TARGET_ID}, /* PEX0_MEM */		\
+    {0xE0,PEX0_TARGET_ID}, /* PEX0_IO */		\
+    {0xE8,PEX1_TARGET_ID}, /* PEX1_MEM */		\
+    {0xE0,PEX1_TARGET_ID}, /* PEX1_IO */		\
+    {0xFF,	    0xFF}, /* INTER_REGS */		\
+    {0xFE,DEV_TARGET_ID},  /* SPI0 */			\
+    {0xFB,DEV_TARGET_ID},  /* SPI1 */			\
+    {0xFD,DEV_TARGET_ID},  /* BOOT_ROM_CS */		\
+    {0xFE,DEV_TARGET_ID},  /* DEV_BOOCS */		\
+    {0x00,CRYPT_TARGET_ID} /* CRYPT_ENG */		\
+}
+
+
+#define TARGETS_NAME_ARRAY	{	\
+    "SDRAM_CS0",    /* DDR_SDRAM CS0 */	\
+    "SDRAM_CS1",    /* DDR_SDRAM CS1 */	\
+    "SDRAM_CS2",    /* DDR_SDRAM CS2 */	\
+    "SDRAM_CS3",    /* DDR_SDRAM CS3 */	\
+    "PEX0_MEM",	    /* PEX0_MEM */	\
+    "PEX0_IO",	    /* PEX0_IO */	\
+    "PEX1_MEM",	    /* PEX1_MEM */	\
+    "PEX1_IO",	    /* PEX1_IO */	\
+    "INTER_REGS",   /* INTER_REGS */	\
+    "SPI0",	    /* SPI0 */		\
+    "SPI1",	    /* SPI1 */		\
+    "BOOT_ROM_CS",  /* BOOT_ROM_CS */	\
+    "DEV_BOOTCS",   /* DEV_BOOCS */	\
+    "CRYPT_ENG"	    /* CRYPT_ENG */	\
+}
+
+/* For old competability */
+#define SPI_CS			SPI0
+#define DEVICE_CS0		SPI0  
+#define DEVICE_CS1  		SPI1 
+#define DEVICE_CS2  		CRYPT_ENG 
+#define DEVICE_CS3  		DEV_BOOCS
+
+#define START_DEV_CS   		DEV_CS0
+#define DEV_TO_TARGET(dev)	((dev) + DEVICE_CS0)
+
+#endif
+
+/* We use the following registers to store DRAM interface pre configuration   */
+/* auto-detection results						      */
+/* IMPORTANT: We are using mask register for that purpose. Before writing     */
+/* to units mask register, make sure main maks register is set to disable     */
+/* all interrupts.                                                            */
+#define DRAM_BUF_REG0	(MV_MISC_REGS_BASE + 0x100)	/* sdram bank 0 size 	*/
+#define DRAM_BUF_REG1	(MV_MISC_REGS_BASE + 0x104)	/* sdram timing 1 	*/
+#define DRAM_BUF_REG2   (MV_MISC_REGS_BASE + 0x108)	/* sdram timing 2 	*/
+#define DRAM_BUF_REG3	(MV_MISC_REGS_BASE + 0x10C)	/* sdram timing 3 	*/          
+#define DRAM_BUF_REG4	(MV_MISC_REGS_BASE + 0x110)	/* sdram timing 4	*/
+#define DRAM_BUF_REG5	(MV_MISC_REGS_BASE + 0x114)	/* sdram timing 5	*/
+#define DRAM_BUF_REG6	(MV_MISC_REGS_BASE + 0x118)	/* sdram timing 6	*/
+#define DRAM_BUF_REG7	(MV_MISC_REGS_BASE + 0x11C)	/* sdram ctrl 6		*/
+#define DRAM_BUF_REG8	(MV_MISC_REGS_BASE + 0x120)	/* sdram ctrl 7       	*/
+#define DRAM_BUF_REG9	(MV_MISC_REGS_BASE + 0x124)	/* sdram config 0	*/
+#define DRAM_BUF_REG10	(MV_MISC_REGS_BASE + 0x128)	/* sdram ctrl 4		*/
+
+#endif /* __INCmvCtrlEnvSpech */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/dove_family/ctrlEnv/mvCtrlEnvAddrDec.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/dove_family/ctrlEnv/mvCtrlEnvAddrDec.h
@@ -0,0 +1,120 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#ifndef __INCmvCtrlEnvAddrDech
+#define __INCmvCtrlEnvAddrDech
+
+/* includes */
+
+/* typedefs */
+
+/* Unsupported attributes for address decode:                               */
+/* 2) PCI0/1_REQ64n control                                                 */
+
+typedef struct _mvTargetAttrib
+{
+    MV_U8		attrib;		/* chip select attributes	*/
+    MV_TARGET_ID	targetId;	/* Target Id of this MV_TARGET	*/
+
+} MV_TARGET_ATTRIB;
+
+
+/* This structure describes address decode window				*/
+typedef struct _mvDecWin 
+{
+    MV_TARGET		target;         /* Target for addr decode window        */
+    MV_ADDR_WIN		addrWin;        /* Address window of target             */
+    MV_BOOL		enable;         /* Window enable/disable                */
+} MV_DEC_WIN;
+
+typedef struct _mvDecWinParams
+{
+    MV_TARGET_ID	targetId;	/* Target ID field */
+    MV_U8		attrib;		/* Attribute field */
+    MV_U32		baseAddr;	/* Base address in register format */
+    MV_U32		size;		/* Size in register format */
+} MV_DEC_WIN_PARAMS;
+
+
+/* mvCtrlEnvAddrDec API list */
+
+MV_STATUS mvCtrlAddrDecToReg(MV_ADDR_WIN *pAddrDecWin, MV_DEC_REGS *pAddrDecRegs);
+
+MV_STATUS mvCtrlRegToAddrDec(MV_DEC_REGS *pAddrDecRegs, MV_ADDR_WIN *pAddrDecWin);
+
+MV_STATUS mvCtrlAttribGet(MV_TARGET target, MV_TARGET_ATTRIB *targetAttrib);
+
+MV_TARGET mvCtrlTargetGet(MV_TARGET_ATTRIB *targetAttrib);
+MV_TARGET mvCtrlTargetByWinInfoGet(MV_UNIT_WIN_INFO *unitWinInfo);
+
+MV_STATUS mvCtrlAddrDecToParams(MV_DEC_WIN *pAddrDecWin, 
+                                MV_DEC_WIN_PARAMS *pWinParam);
+
+MV_STATUS mvCtrlParamsToAddrDec(MV_DEC_WIN_PARAMS *pWinParam, 
+                                MV_DEC_WIN *pAddrDecWin);
+
+MV_STATUS mvCtrlAddrWinMapBuild(MV_UNIT_WIN_INFO *pAddrWinMap, MV_U32 len);
+
+#endif /* __INCmvCtrlEnvAddrDech */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/dove_family/ctrlEnv/sys/mvCpuIfRegs.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/dove_family/ctrlEnv/sys/mvCpuIfRegs.h
@@ -0,0 +1,377 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#ifndef __INCmvCpuIfRegsh
+#define __INCmvCpuIfRegsh
+
+/****************************************/
+/* ARM Control and Status Registers Map */
+/****************************************/
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "ctrlEnv/mvCtrlEnvRegs.h"
+
+#define CPU_CONFIG_REG				(MV_CPUIF_REGS_BASE + 0x100)
+#define CPU_CTRL_STAT_REG			(MV_CPUIF_REGS_BASE + 0x104)
+#define CPU_RSTOUTN_MASK_REG			(MV_CPUIF_REGS_BASE + 0x108)
+#define CPU_SYS_SOFT_RST_REG			(MV_CPUIF_REGS_BASE + 0x10C)
+#define CPU_AHB_MBUS_CAUSE_INT_REG		(MV_CPUIF_REGS_BASE + 0x110)
+#define CPU_AHB_MBUS_MASK_INT_REG		(MV_CPUIF_REGS_BASE + 0x114)
+#define CPU_FTDLL_CONFIG_REG			(MV_CPUIF_REGS_BASE + 0x120)
+
+#define UPSTRM_AXI_P_D_CTRL_REG			(MV_MISC_REGS_BASE + 0x224)
+#define UPSTRM_D2X_ARB_LO_REG			(MV_MISC_REGS_BASE + 0x2A8)
+#define UPSTRM_D2X_ARB_HI_REG			(MV_MISC_REGS_BASE + 0x2AC)
+#define CPU_CONTROL_REG				(MV_MISC_REGS_BASE + 0x25C)
+#define CPU_CTRL_PMU_CPU_RST_EN_OFFS		1
+#define CPU_CTRL_PMU_CPU_RST_EN_MASK		(0x1 << CPU_CTRL_PMU_CPU_RST_EN_OFFS)
+
+/* Debug Register */
+
+/***************************/
+/* BOOTROM_ROUTINE_ERR_REG */
+/***************************/
+#define BOOTROM_ROUTINE_ERR_REG			(MV_MISC_REGS_BASE + 0x2D8)
+
+/* Error Code , 0 - Pass, Non-Zero - Fail*/
+#define BRE_ERR_CODE_OFFS				0
+#define BRE_ERR_CODE_MASK				(0xFF << BRE_ERR_CODE_OFFS)
+#define NO_ERR              				(0x00 << BRE_ERR_CODE_OFFS)
+#define ERROR_INVALID_HEADER_ID				(0x11 << BRE_ERR_CODE_OFFS)
+#define ERROR_INVALID_HDR_CHKSUM			(0x12 << BRE_ERR_CODE_OFFS)
+#define ERROR_INVALID_IMG_CHKSUM			(0x13 << BRE_ERR_CODE_OFFS)
+#define ERROR_UNSUPPORTED_EXT_HDR			(0x14 << BRE_ERR_CODE_OFFS)
+#define ERROR_INVALID_EXT_HDR_CHKSUM			(0x15 << BRE_ERR_CODE_OFFS)
+#define ERROR_BUSY			   		(0x17 << BRE_ERR_CODE_OFFS)
+#define ERROR_LINK			   		(0x18 << BRE_ERR_CODE_OFFS)
+#define ERROR_DMA			   		(0x19 << BRE_ERR_CODE_OFFS)
+#define ERROR_PIO			   		(0x1a << BRE_ERR_CODE_OFFS)
+#define ERROR_TIMEOUT					(0x1b << BRE_ERR_CODE_OFFS)
+#define ERROR_UNSUPPORTED_BOOT 				(0x1d << BRE_ERR_CODE_OFFS)
+#define ERROR_ALIGN_SIZE				(0x21 << BRE_ERR_CODE_OFFS)
+#define ERROR_ALIGN_SRC					(0x22 << BRE_ERR_CODE_OFFS)
+#define ERROR_ALIGN_DEST				(0x23 << BRE_ERR_CODE_OFFS)
+#define ERROR_INVALID_BOOTROM_CHKSUM			(0x26 << BRE_ERR_CODE_OFFS)
+#define ERROR_NAND_READ_FAIL				(0x30 << BRE_ERR_CODE_OFFS)
+#define ERROR_NAND_NOT_READY				(0x31 << BRE_ERR_CODE_OFFS)
+#define ERROR_NAND_IMAGE_NOT_ALIGN_256			(0x32 << BRE_ERR_CODE_OFFS)
+#define ERROR_NAND_ECC_ERROR				(0x33 << BRE_ERR_CODE_OFFS)
+#define ERROR_NAND_TIMEOUT				(0x34 << BRE_ERR_CODE_OFFS)
+#define ERROR_NAND_INVALID_OPTION			(0x35 << BRE_ERR_CODE_OFFS)
+#define ERROR_NAND_EXCESS_BAD_BLKS			(0x36 << BRE_ERR_CODE_OFFS)
+#define ERROR_NAND_BAD_BLK				(0x37 << BRE_ERR_CODE_OFFS)
+#define ERROR_I2C_READ_ERROR				(0x40 << BRE_ERR_CODE_OFFS)
+#define ERROR_I2C_WRITE_ERROR				(0x41 << BRE_ERR_CODE_OFFS)
+#define ERROR_I2C_START_ERROR				(0x42 << BRE_ERR_CODE_OFFS)
+#define ERROR_I2C_STOP_ERROR				(0x43 << BRE_ERR_CODE_OFFS)
+#define ERROR_I2C_NO_HDR_FOUND_ERROR			(0x44 << BRE_ERR_CODE_OFFS)
+/* Routine Number */
+#define BRE_RTN_NUM_OFFS				8
+#define BRE_RTN_NUM_MASK				(0xF << BRE_RTN_NUM_OFFS)
+#define BRE_RTN_UART_BOOT				(0x1 << BRE_RTN_NUM_OFFS)
+#define BRE_RTN_SATA_BOOT				(0x4 << BRE_RTN_NUM_OFFS)
+#define BRE_RTN_SPI_BOOT				(0x7 << BRE_RTN_NUM_OFFS)
+#define BRE_RTN_NAND_BOOT				(0x9 << BRE_RTN_NUM_OFFS)
+#define BRE_RTN_EXCEP					(0xb << BRE_RTN_NUM_OFFS)
+#define BRE_RTN_EXEC					(0xc << BRE_RTN_NUM_OFFS)
+#define BRE_RTN_I2C					(0xd << BRE_RTN_NUM_OFFS)
+#define BRE_RTN_PEX_BOOT				(0xe << BRE_RTN_NUM_OFFS)
+#define BRE_RTN_PM_RESUME				(0xf << BRE_RTN_NUM_OFFS)
+/* Bit that says the DRAM is initiated */
+#define BRE_DRAM_INIT_OFFS				12
+#define BRE_DRAM_INIT_MASK				(0x1 << BRE_DRAM_INIT_OFFS)
+/* Bit that says the redundant image was tried */
+#define BRE_REDUNDANT_IMG_OFFS				13
+#define BRE_REDUNDANT_IMG_MASK				(0x1 << BRE_REDUNDANT_IMG_OFFS)
+/* Retry */
+#define BRE_RTN_RETRY_OFFS				16
+#define BRE_RTN_RETRY_MASK				(0xF << BRE_RTN_RETRY_OFFS)
+#define BRE_MAX_RETRY					(0xF << BRE_RTN_RETRY_OFFS)
+#define BRE_RTN_TRACE_OFFS				20
+#define BRE_RTN_TRACE_MASK				(0xFFFU << BRE_RTN_TRACE_OFFS)
+#define TRACE_INIT					0x100
+#define TRACE_MAIN					0x200
+#define TRACE_EXEC					0x300
+#define TRACE_DRAM					0x400
+#define TRACE_EXTENTION					0x500
+#define TRACE_UART					0x600
+#define TRACE_I2C					0x700
+#define TRACE_PEX					0x800
+#define TRACE_SPI					0x900
+#define TRACE_NAND					0xa00
+#define TRACE_SATA					0xb00
+#define TRACE_RDRW_RWG					0xc00
+#define TRACE_NAND_ECC					0xd00
+#define TRACE_PM_RESUME					0xe00
+
+
+/* ARM Configuration register */
+/* CPU_CONFIG_REG (CCR) */
+
+/* Reset vector location */
+#define CCR_VEC_INIT_LOC_OFFS			1
+#define CCR_VEC_INIT_LOC_MASK			BIT1
+/* reset at 0x00000000 */
+#define CCR_VEC_INIT_LOC_0000			(0 << CCR_VEC_INIT_LOC_OFFS)
+/* reset at 0xFFFF0000 */
+#define CCR_VEC_INIT_LOC_FF00			(1 << CCR_VEC_INIT_LOC_OFFS)
+
+
+#define CCR_AHB_ERROR_PROP_OFFS			2
+#define CCR_AHB_ERROR_PROP_MASK			BIT2
+/* Erros are not propogated to AHB */
+#define CCR_AHB_ERROR_PROP_NO_INDICATE		(0 << CCR_AHB_ERROR_PROP_OFFS)
+/* Erros are propogated to AHB */
+#define CCR_AHB_ERROR_PROP_INDICATE		(1 << CCR_AHB_ERROR_PROP_OFFS)
+
+
+#define CCR_ENDIAN_INIT_OFFS			3
+#define CCR_ENDIAN_INIT_MASK			BIT3
+#define CCR_ENDIAN_INIT_LITTLE			(0 << CCR_ENDIAN_INIT_OFFS)
+#define CCR_ENDIAN_INIT_BIG			(1 << CCR_ENDIAN_INIT_OFFS)
+
+
+#define CCR_INCR_EN_OFFS			4
+#define CCR_INCR_EN_MASK			BIT4
+#define CCR_INCR_EN				BIT4
+
+
+#define CCR_NCB_BLOCKING_OFFS			5			
+#define CCR_NCB_BLOCKING_MASK			(1 << CCR_NCB_BLOCKING_OFFS)
+#define CCR_NCB_BLOCKING_NON			(0 << CCR_NCB_BLOCKING_OFFS)
+#define CCR_NCB_BLOCKING_EN			(1 << CCR_NCB_BLOCKING_OFFS)
+
+#define CCR_CPU_2_MBUSL_TICK_DRV_OFFS		8
+#define CCR_CPU_2_MBUSL_TICK_DRV_MASK		(0xF << CCR_CPU_2_MBUSL_TICK_DRV_OFFS)
+#define CCR_CPU_2_MBUSL_TICK_SMPL_OFFS		12
+#define CCR_CPU_2_MBUSL_TICK_SMPL_MASK		(0xF << CCR_CPU_2_MBUSL_TICK_SMPL_OFFS)
+#define CCR_ICACH_PREF_BUF_ENABLE		BIT16
+#define CCR_DCACH_PREF_BUF_ENABLE		BIT17
+
+/* Ratio options for CPU to DDR for 6281/6192/6180 */
+#define CPU_2_DDR_CLK_1x3	    4
+#define CPU_2_DDR_CLK_1x4	    6
+
+/* Ratio options for CPU to DDR for 6281 only */
+#define CPU_2_DDR_CLK_2x5	    3
+
+/* Ratio options for CPU to DDR for 6192/6180 */
+#define CPU_2_DDR_CLK_1x2	    2
+
+/* Ratio options for CPU to DDR for 6180 only */
+#define CPU_2_DDR_CLK_1x3_1	    0xB
+#define CPU_2_DDR_CLK_1x4_1	    0xD
+
+/* Default values for CPU to Mbus-L DDR Interface Tick Driver and 	*/
+/* CPU to Mbus-L Tick Sample fields in CPU config register		*/
+
+#define TICK_DRV_1x1	0
+#define TICK_DRV_1x2	0
+#define TICK_DRV_1x3	1
+#define TICK_DRV_1x4	2
+#define TICK_SMPL_1x1	0
+#define TICK_SMPL_1x2	1
+#define TICK_SMPL_1x3	2
+#define TICK_SMPL_1x4	3
+
+#define CPU_2_MBUSL_DDR_CLK_1x2						\
+		 ((TICK_DRV_1x2  << CCR_CPU_2_MBUSL_TICK_DRV_OFFS) | 	\
+		  (TICK_SMPL_1x2 << CCR_CPU_2_MBUSL_TICK_SMPL_OFFS))
+#define CPU_2_MBUSL_DDR_CLK_1x3						\
+		 ((TICK_DRV_1x3  << CCR_CPU_2_MBUSL_TICK_DRV_OFFS) | 	\
+		  (TICK_SMPL_1x3 << CCR_CPU_2_MBUSL_TICK_SMPL_OFFS))
+#define CPU_2_MBUSL_DDR_CLK_1x4						\
+		 ((TICK_DRV_1x4  << CCR_CPU_2_MBUSL_TICK_DRV_OFFS) | 	\
+		  (TICK_SMPL_1x4 << CCR_CPU_2_MBUSL_TICK_SMPL_OFFS))
+
+/* ARM Control and Status register */
+/* CPU_CTRL_STAT_REG (CCSR) */
+
+
+/*
+This is used to block PCI express\PCI from access Socrates/Feroceon GP
+while ARM boot is still in progress
+*/
+
+#define CCSR_PCI_ACCESS_OFFS			0
+#define CCSR_PCI_ACCESS_MASK			BIT0
+#define CCSR_PCI_ACCESS_ENABLE			(0 << CCSR_PCI_ACCESS_OFFS)
+#define CCSR_PCI_ACCESS_DISBALE			(1 << CCSR_PCI_ACCESS_OFFS)
+
+#define CCSR_ARM_RESET				BIT1
+#define CCSR_SELF_INT				BIT2
+#define CCSR_BIG_ENDIAN				BIT3
+
+
+/* RSTOUTn Mask Register */
+/* CPU_RSTOUTN_MASK_REG (CRMR) */
+
+#define CRMR_PEX_RST_OUT_OFFS			0
+#define CRMR_PEX_RST_OUT_MASK			BIT0
+#define CRMR_PEX_RST_OUT_ENABLE			(1 << CRMR_PEX_RST_OUT_OFFS)
+#define CRMR_PEX_RST_OUT_DISABLE		(0 << CRMR_PEX_RST_OUT_OFFS)
+
+#define CRMR_WD_RST_OUT_OFFS			1
+#define CRMR_WD_RST_OUT_MASK			BIT1
+#define CRMR_WD_RST_OUT_ENABLE			(1 << CRMR_WD_RST_OUT_OFFS)
+#define CRMR_WD_RST_OUT_DISBALE			(0 << CRMR_WD_RST_OUT_OFFS)			
+
+#define CRMR_SOFT_RST_OUT_OFFS			2
+#define CRMR_SOFT_RST_OUT_MASK			BIT2
+#define CRMR_SOFT_RST_OUT_ENABLE		(1 << CRMR_SOFT_RST_OUT_OFFS)
+#define CRMR_SOFT_RST_OUT_DISBALE		(0 << CRMR_SOFT_RST_OUT_OFFS)
+
+/* System Software Reset Register */
+/* CPU_SYS_SOFT_RST_REG (CSSRR) */
+
+#define CSSRR_SYSTEM_SOFT_RST			BIT0
+
+/* AHB to Mbus Bridge Interrupt Cause Register*/
+/* CPU_AHB_MBUS_CAUSE_INT_REG (CAMCIR) */
+
+#define CAMCIR_ARM_SELF_INT			BIT0
+#define CAMCIR_ARM_TIMER0_INT_REQ		BIT1
+#define CAMCIR_ARM_TIMER1_INT_REQ		BIT2
+#define CAMCIR_ARM_WD_TIMER_INT_REQ		BIT3
+
+
+/* AHB to Mbus Bridge Interrupt Mask Register*/
+/* CPU_AHB_MBUS_MASK_INT_REG (CAMMIR) */
+
+#define CAMCIR_ARM_SELF_INT_OFFS		0
+#define CAMCIR_ARM_SELF_INT_MASK		BIT0
+#define CAMCIR_ARM_SELF_INT_EN			(1 << CAMCIR_ARM_SELF_INT_OFFS)
+#define CAMCIR_ARM_SELF_INT_DIS			(0 << CAMCIR_ARM_SELF_INT_OFFS)
+
+
+#define CAMCIR_ARM_TIMER0_INT_REQ_OFFS		1
+#define CAMCIR_ARM_TIMER0_INT_REQ_MASK		BIT1
+#define CAMCIR_ARM_TIMER0_INT_REQ_EN		(1 << CAMCIR_ARM_TIMER0_INT_REQ_OFFS) 
+#define CAMCIR_ARM_TIMER0_INT_REQ_DIS		(0 << CAMCIR_ARM_TIMER0_INT_REQ_OFFS)
+
+#define CAMCIR_ARM_TIMER1_INT_REQ_OFFS		2
+#define CAMCIR_ARM_TIMER1_INT_REQ_MASK		BIT2
+#define CAMCIR_ARM_TIMER1_INT_REQ_EN		(1 << CAMCIR_ARM_TIMER1_INT_REQ_OFFS) 
+#define CAMCIR_ARM_TIMER1_INT_REQ_DIS		(0 << CAMCIR_ARM_TIMER1_INT_REQ_OFFS) 
+
+#define CAMCIR_ARM_WD_TIMER_INT_REQ_OFFS 	3
+#define CAMCIR_ARM_WD_TIMER_INT_REQ_MASK 	BIT3
+#define CAMCIR_ARM_WD_TIMER_INT_REQ_EN	 	(1 << CAMCIR_ARM_WD_TIMER_INT_REQ_OFFS) 
+#define CAMCIR_ARM_WD_TIMER_INT_REQ_DIS	 	(0 << CAMCIR_ARM_WD_TIMER_INT_REQ_OFFS) 
+
+/* CPU FTDLL Config register (CFCR) fields */
+#define CFCR_FTDLL_ICACHE_TAG_OFFS		0
+#define CFCR_FTDLL_ICACHE_TAG_MASK		(0x7F << CFCR_FTDLL_ICACHE_TAG_OFFS)
+#define CFCR_FTDLL_DCACHE_TAG_OFFS		8
+#define CFCR_FTDLL_DCACHE_TAG_MASK		(0x7F << CFCR_FTDLL_DCACHE_TAG_OFFS)
+#define CFCR_FTDLL_OVERWRITE_ENABLE		(1 << 15)
+/* For Orion 2 D2 only */
+#define CFCR_MRVL_CPU_ID_OFFS			16
+#define CFCR_MRVL_CPU_ID_MASK			(0x1 << CFCR_MRVL_CPU_ID_OFFS)
+#define CFCR_ARM_CPU_ID				(0x0 << CFCR_MRVL_CPU_ID_OFFS)
+#define CFCR_MRVL_CPU_ID			(0x1 << CFCR_MRVL_CPU_ID_OFFS)
+#define CFCR_VFP_SUB_ARC_NUM_OFFS		7
+#define CFCR_VFP_SUB_ARC_NUM_MASK		(0x1 << CFCR_VFP_SUB_ARC_NUM_OFFS)
+#define CFCR_VFP_SUB_ARC_NUM_1			(0x0 << CFCR_VFP_SUB_ARC_NUM_OFFS)
+#define CFCR_VFP_SUB_ARC_NUM_2			(0x1 << CFCR_VFP_SUB_ARC_NUM_OFFS)
+
+
+/*******************************************/
+/* Main Interrupt Controller Registers Map */
+/*******************************************/
+
+#define CPU_MAIN_INT_CAUSE_REG			(MV_CPUIF_REGS_BASE + 0x200)
+#define CPU_MAIN_IRQ_MASK_REG			(MV_CPUIF_REGS_BASE + 0x204)
+#define CPU_MAIN_FIQ_MASK_REG			(MV_CPUIF_REGS_BASE + 0x208)
+#define CPU_ENPOINT_MASK_REG			(MV_CPUIF_REGS_BASE + 0x20C)
+#define CPU_MAIN_INT_CAUSE_HIGH_REG		(MV_CPUIF_REGS_BASE + 0x210)
+#define CPU_MAIN_IRQ_MASK_HIGH_REG		(MV_CPUIF_REGS_BASE + 0x214)
+#define CPU_MAIN_FIQ_MASK_HIGH_REG		(MV_CPUIF_REGS_BASE + 0x218)
+#define CPU_ENPOINT_MASK_HIGH_REG		(MV_CPUIF_REGS_BASE + 0x21C)
+
+
+/*******************************************/
+/* ARM Doorbell Registers Map		   */
+/*******************************************/
+
+#define CPU_HOST_TO_ARM_DRBL_REG		(MV_CPUIF_REGS_BASE + 0x400)
+#define CPU_HOST_TO_ARM_MASK_REG		(MV_CPUIF_REGS_BASE + 0x404)
+#define CPU_ARM_TO_HOST_DRBL_REG		(MV_CPUIF_REGS_BASE + 0x408)
+#define CPU_ARM_TO_HOST_MASK_REG		(MV_CPUIF_REGS_BASE + 0x40C)
+
+
+/* CPU control register map */
+/* Set bits means value is about to change according to new value */
+#define CPU_CONFIG_DEFAULT_MASK         	(CCR_VEC_INIT_LOC_MASK  | CCR_AHB_ERROR_PROP_MASK)      
+
+#define CPU_CONFIG_DEFAULT                      (CCR_VEC_INIT_LOC_FF00  )
+                 
+/* CPU Control and status defaults */
+#define CPU_CTRL_STAT_DEFAULT_MASK              (CCSR_PCI_ACCESS_MASK)
+                                                                        
+
+#define CPU_CTRL_STAT_DEFAULT                   (CCSR_PCI_ACCESS_ENABLE)
+
+#endif /* __INCmvCpuIfRegsh */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/dove_family/ctrlEnv/sys/mvAhbToMbusRegs.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/dove_family/ctrlEnv/sys/mvAhbToMbusRegs.h
@@ -0,0 +1,143 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#ifndef __INCmvAhbToMbusRegsh
+#define __INCmvAhbToMbusRegsh
+
+/******************************/
+/* ARM Address Map Registers  */
+/******************************/
+
+#define MAX_AHB_TO_MBUS_WINS		9
+#define MV_AHB_TO_MBUS_INTREG_WIN	8
+
+
+#define AHB_TO_MBUS_WIN_CTRL_REG(winNum)		(MV_CPUIF_REGS_BASE + 0x0 + (winNum)*0x10)
+#define AHB_TO_MBUS_WIN_BASE_REG(winNum)		(MV_CPUIF_REGS_BASE + 0x04 + (winNum)*0x10)
+#define AHB_TO_MBUS_WIN_REMAP_LOW_REG(winNum)		(MV_CPUIF_REGS_BASE + 0x08 + (winNum)*0x10)
+#define AHB_TO_MBUS_WIN_REMAP_HIGH_REG(winNum)		(MV_CPUIF_REGS_BASE + 0x0C + (winNum)*0x10)
+#define AHB_TO_MBUS_WIN_INTEREG_REG			(MV_CPUIF_REGS_BASE + 0x80)
+
+/* Window Control Register      */
+/* AHB_TO_MBUS_WIN_CTRL_REG (ATMWCR)*/
+#define ATMWCR_WIN_ENABLE				BIT0	/* Window Enable */
+
+#define ATMWCR_WIN_TARGET_OFFS				4 /* The target interface associated 
+								 with this window*/
+#define ATMWCR_WIN_TARGET_MASK				(0xf << ATMWCR_WIN_TARGET_OFFS)
+
+#define ATMWCR_WIN_ATTR_OFFS				8 /* The target interface attributes
+								 Associated with this window */
+#define ATMWCR_WIN_ATTR_MASK				(0xff << ATMWCR_WIN_ATTR_OFFS)
+
+											 
+/*
+Used with the Base register to set the address window size and location
+Must be programed from LSB to MSB as sequence of 1’s followed
+by sequence of 0’s. The number of 1’s specifies the size of the window
+in 64 KB granularity (e.g. a value of 0x00FF specifies 256 = 16 MB).
+
+NOTE: A value of 0x0 specifies 64KB size.
+*/
+#define ATMWCR_WIN_SIZE_OFFS				16 /* Window Size */
+#define ATMWCR_WIN_SIZE_MASK				(0xffff << ATMWCR_WIN_SIZE_OFFS)
+#define ATMWCR_WIN_SIZE_ALIGNMENT			0x10000
+
+/*  Window Base Register     */
+/* AHB_TO_MBUS_WIN_BASE_REG (ATMWBR) */
+
+/*
+Used with the size field to set the address window size and location.
+Corresponds to transaction address[31:16]
+*/
+#define ATMWBR_BASE_OFFS				16 /* Base Address */
+#define ATMWBR_BASE_MASK				(0xffff << ATMWBR_BASE_OFFS)
+#define ATMWBR_BASE_ALIGNMENT				0x10000
+
+/*  Window Remap Low Register   */
+/* AHB_TO_MBUS_WIN_REMAP_LOW_REG (ATMWRLR) */
+
+/*
+Used with the size field to specifies address bits[31:0] to be driven to
+the target interface.:
+target_addr[31:16] = (addr[31:16] & size[15:0]) | (remap[31:16] & ~size[15:0])
+*/
+#define ATMWRLR_REMAP_LOW_OFFS			16 /* Remap Address */
+#define ATMWRLR_REMAP_LOW_MASK			(0xffff << ATMWRLR_REMAP_LOW_OFFS)
+#define ATMWRLR_REMAP_LOW_ALIGNMENT		0x10000
+
+/* Window Remap High Register   */
+/* AHB_TO_MBUS_WIN_REMAP_HIGH_REG (ATMWRHR) */
+
+/*
+Specifies address bits[63:32] to be driven to the target interface.
+target_addr[63:32] = (RemapHigh[31:0]
+*/
+#define ATMWRHR_REMAP_HIGH_OFFS			0 /* Remap Address */
+#define ATMWRHR_REMAP_HIGH_MASK			(0xffffffff << ATMWRHR_REMAP_HIGH_OFFS)
+
+
+#endif /* __INCmvAhbToMbusRegsh */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/dove_family/ctrlEnv/sys/mvCpuIf.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/dove_family/ctrlEnv/sys/mvCpuIf.c
@@ -0,0 +1,1059 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+/* includes */
+#include "ctrlEnv/sys/mvCpuIf.h"
+#include "ctrlEnv/sys/mvAhbToMbusRegs.h"
+#include "cpu/mvCpu.h"
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "mvSysHwConfig.h"
+#include "ddr/mvDramIf.h"
+#include "pci-if/pex/mvPexRegs.h"
+
+/*#define MV_DEBUG*/
+/* defines  */
+
+#ifdef MV_DEBUG
+	#define DB(x)	x
+#else
+	#define DB(x)
+#endif
+
+#if defined(MV_BRIDGE_SYNC_REORDER) /* used for sync write reordering in bridge */ 
+MV_U32 *mvUncachedParam = NULL;
+#endif
+
+
+/* locals   */
+/* static functions */
+static MV_BOOL cpuTargetWinOverlap(MV_TARGET target, MV_ADDR_WIN *pAddrWin);
+
+MV_TARGET sampleAtResetTargetArray[] = BOOT_TARGETS_NAME_ARRAY;
+/*******************************************************************************
+* mvCpuIfInit - Initialize Controller CPU interface
+*
+* DESCRIPTION:
+*       This function initialize Controller CPU interface:
+*       1. Set CPU interface configuration registers.
+*       2. Set CPU master Pizza arbiter control according to static
+*          configuration described in configuration file.
+*       3. Opens CPU address decode windows. DRAM windows are assumed to be
+*		   already set (auto detection).
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_STATUS mvCpuIfInit(MV_CPU_DEC_WIN *cpuAddrWinMap)
+{
+	MV_U32 regVal;
+	MV_TARGET target;
+	MV_ADDR_WIN addrWin;
+	int ii;
+
+	if (cpuAddrWinMap == NULL)
+	{
+		DB(mvOsPrintf("mvCpuIfInit:ERR. cpuAddrWinMap == NULL\n"));
+		return MV_ERROR;
+	}
+
+	/* Set ARM Configuration register */
+	regVal  = MV_REG_READ(CPU_CONFIG_REG);
+	regVal &= ~CPU_CONFIG_DEFAULT_MASK;
+	/* regVal |= CPU_CONFIG_DEFAULT; Note: not needed */
+	MV_REG_WRITE(CPU_CONFIG_REG,regVal);
+
+
+	/* First disable all CPU target windows  */
+	for (target = 0; cpuAddrWinMap[target].enable != TBL_TERM; target++)
+    	{
+		if ((MV_TARGET_IS_DRAM(target))||(target == INTER_REGS))
+		{
+			continue;
+		}
+
+#if defined(MV_MEM_OVER_PCI_WA) || defined(MV_UART_OVER_PCI_WA)
+		/* If the target PEX or PCI and memory is over PEX or PCI we don't touch this CPU windows */
+		if (MV_TARGET_IS_PCI(target))
+		{
+			continue;
+		}
+#endif
+
+#if defined(MV_MEM_OVER_PEX_WA) || defined(MV_UART_OVER_PEX_WA)
+		/* If the target PEX or PCI and memory is over PEX or PCI we don't touch this CPU windows */
+		if (MV_TARGET_IS_PEX(target))
+		{
+			continue;
+		}
+#endif
+#if defined(MV_RUN_FROM_FLASH)
+        	/* Don't disable the boot device.                               */
+		if (target == DEV_BOOCS)
+		{
+			continue;
+		}
+#endif /* MV_RUN_FROM_FLASH */
+		mvCpuIfTargetWinEnable(MV_CHANGE_BOOT_CS(target),MV_FALSE);		
+	}
+
+	/* TODO */
+	for (ii = 0; ii < 8; ii++)
+		MV_REG_WRITE(AHB_TO_MBUS_WIN_CTRL_REG(ii), 0);
+
+#if defined(MV_RUN_FROM_FLASH)
+    	/* Resize the bootcs windows before other windows, because this     */
+    	/* window is enabled and will cause an overlap if not resized.      */
+	target = DEV_BOOCS;
+
+	if (MV_OK != mvCpuIfTargetWinSet(target, &cpuAddrWinMap[target]))
+	{
+		DB(mvOsPrintf("mvCpuIfInit:ERR. mvCpuIfTargetWinSet fail\n"));
+		return MV_ERROR;
+	}
+
+	addrWin.baseLow = cpuAddrWinMap[target].addrWin.baseLow;
+	addrWin.baseHigh = cpuAddrWinMap[target].addrWin.baseHigh;
+	if (0xffffffff == mvAhbToMbusWinRemap(cpuAddrWinMap[target].winNum ,&addrWin))
+	{
+		DB(mvOsPrintf("mvCpuIfInit:WARN. mvAhbToMbusWinRemap can't remap winNum=%d\n",
+					  cpuAddrWinMap[target].winNum));
+	}
+
+#endif /* MV_RUN_FROM_FLASH */
+
+	/* Go through all targets in user table until table terminator			*/
+	for (target = 0; cpuAddrWinMap[target].enable != TBL_TERM; target++)
+    	{
+
+#if defined(MV_RUN_FROM_FLASH)
+	if (target == DEV_BOOCS)
+	{
+		continue;
+	}
+#endif /* MV_RUN_FROM_FLASH */
+
+	/* if DRAM auto sizing is used do not initialized DRAM target windows, 	*/
+	/* assuming this already has been done earlier.							*/
+#ifdef	MV_DRAM_AUTO_SIZE
+		if (MV_TARGET_IS_DRAM(target))
+		{
+			continue;
+		}
+#endif
+
+#if defined(MV_MEM_OVER_PCI_WA) || defined(MV_UART_OVER_PCI_WA)
+		/* If the target PEX or PCI and memory is over PEX or PCI we don't touch this CPU windows */
+		if (MV_TARGET_IS_PCI(target))
+		{
+			continue;
+		}
+#endif
+
+#if defined(MV_MEM_OVER_PEX_WA) || defined(MV_UART_OVER_PEX_WA)
+		/* If the target PEX or PCI and memory is over PEX or PCI we don't touch this CPU windows */
+		if (MV_TARGET_IS_PEX(target))
+		{
+			continue;
+		}
+#endif
+	/* If the target attribute is the same as the boot device attribute */
+	/* then it's stays disable */
+		if (MV_TARGET_IS_AS_BOOT(target))
+		{
+			continue;
+		}
+
+		if((0 == cpuAddrWinMap[target].addrWin.size) ||
+		   (DIS == cpuAddrWinMap[target].enable))
+
+		{
+			if (MV_OK != mvCpuIfTargetWinEnable(target, MV_FALSE))
+			{
+				DB(mvOsPrintf("mvCpuIfInit:ERR. mvCpuIfTargetWinEnable fail\n"));
+				return MV_ERROR;
+			}
+
+		}
+		else
+		{
+			if (MV_OK != mvCpuIfTargetWinSet(target, &cpuAddrWinMap[target]))
+			{
+				DB(mvOsPrintf("mvCpuIfInit:ERR. mvCpuIfTargetWinSet fail\n"));
+				return MV_ERROR;
+			}
+
+			addrWin.baseLow = cpuAddrWinMap[target].addrWin.baseLow;
+			addrWin.baseHigh = cpuAddrWinMap[target].addrWin.baseHigh;
+			if (0xffffffff == mvAhbToMbusWinRemap(cpuAddrWinMap[target].winNum ,&addrWin))
+			{
+				DB(mvOsPrintf("mvCpuIfInit:WARN. mvAhbToMbusWinRemap can't remap winNum=%d\n",
+							  cpuAddrWinMap[target].winNum));
+			}
+
+
+		}
+    }
+
+#ifdef MV_INCLUDE_PEX
+	mvCpuIfEnablePex();
+#endif
+
+#ifdef MV_INCLUDE_PMU
+	mvCpuIfEnablePmu();
+#endif
+	return MV_OK;
+
+
+}
+
+#if defined(MV_BRIDGE_SYNC_REORDER)
+MV_STATUS mvCpuIfBridgeReorderWAInit(void)
+{
+    MV_ULONG tmpPhysAddress;
+    mvUncachedParam = mvOsIoUncachedMalloc(NULL, 4, &tmpPhysAddress, NULL);
+    if (mvUncachedParam == NULL) {
+	mvOsPrintf("Uncached memory allocation failed\n"); 
+	return MV_ERROR;
+    }
+    return MV_OK;
+}
+#endif
+
+
+/*******************************************************************************
+* mvCpuIfTargetWinSet - Set CPU-to-peripheral target address window
+*
+* DESCRIPTION:
+*       This function sets a peripheral target (e.g. SDRAM bank0, PCI0_MEM0)
+*       address window, also known as address decode window.
+*       A new address decode window is set for specified target address window.
+*       If address decode window parameter structure enables the window,
+*       the routine will also enable the target window, allowing CPU to access
+*       the target window.
+*
+* INPUT:
+*       target      - Peripheral target enumerator.
+*       pAddrDecWin - CPU target window data structure.
+*
+* OUTPUT:
+*       N/A
+*
+* RETURN:
+*       MV_OK if CPU target window was set correctly, MV_ERROR in case of
+*       address window overlapps with other active CPU target window or
+*		trying to assign 36bit base address while CPU does not support that.
+*       The function returns MV_NOT_SUPPORTED, if the target is unsupported.
+*
+*******************************************************************************/
+MV_STATUS mvCpuIfTargetWinSet(MV_TARGET target, MV_CPU_DEC_WIN *pAddrDecWin)
+{
+	MV_AHB_TO_MBUS_DEC_WIN decWin;
+	MV_U32 existingWinNum;
+	MV_DRAM_DEC_WIN addrDecWin;
+
+	target = MV_CHANGE_BOOT_CS(target);
+
+	/* Check parameters */
+	if (target >= MAX_TARGETS)
+	{
+		mvOsPrintf("mvCpuIfTargetWinSet: target %d is illegal\n", target);
+		return MV_ERROR;
+	}
+
+    	/* 2) Check if the requested window overlaps with current windows		*/
+    	if (MV_TRUE == cpuTargetWinOverlap(target, &pAddrDecWin->addrWin))
+	{
+        	mvOsPrintf("mvCpuIfTargetWinSet: ERR. Target %d overlap\n", target);
+		return MV_BAD_PARAM;
+	}
+
+	if (MV_TARGET_IS_DRAM(target))
+	{
+		/* copy relevant data to MV_DRAM_DEC_WIN structure */
+		addrDecWin.addrWin.baseHigh = pAddrDecWin->addrWin.baseHigh;
+		addrDecWin.addrWin.baseLow = pAddrDecWin->addrWin.baseLow;
+		addrDecWin.addrWin.size = pAddrDecWin->addrWin.size;
+		addrDecWin.enable = pAddrDecWin->enable;
+
+
+		if (mvDramIfWinSet(target,&addrDecWin) != MV_OK);
+		{
+			mvOsPrintf("mvCpuIfTargetWinSet: mvDramIfWinSet Failed\n");
+			return MV_ERROR;
+		}
+
+	}
+	else
+	{
+		/* copy relevant data to MV_AHB_TO_MBUS_DEC_WIN structure */
+		decWin.addrWin.baseLow = pAddrDecWin->addrWin.baseLow;
+		decWin.addrWin.baseHigh = pAddrDecWin->addrWin.baseHigh;
+		decWin.addrWin.size = pAddrDecWin->addrWin.size;
+		decWin.enable = pAddrDecWin->enable;
+		decWin.target = target;
+
+		existingWinNum = mvAhbToMbusWinTargetGet(target);
+
+		/* check if there is already another Window configured
+		for this target */
+		if ((existingWinNum < MAX_AHB_TO_MBUS_WINS )&&
+			(existingWinNum != pAddrDecWin->winNum))
+		{
+			/* if we want to enable the new winow number
+			passed by the user , then the old one should
+			be disabled */
+			if (MV_TRUE == pAddrDecWin->enable)
+			{
+				/* be sure it is disabled */
+				mvAhbToMbusWinEnable(existingWinNum , MV_FALSE);
+			}
+		}
+
+        if (mvAhbToMbusWinSet(pAddrDecWin->winNum,&decWin) != MV_OK)
+		{
+			mvOsPrintf("mvCpuIfTargetWinSet: mvAhbToMbusWinSet Failed\n");
+			return MV_ERROR;
+		}
+
+	}
+
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvCpuIfTargetWinGet - Get CPU-to-peripheral target address window
+*
+* DESCRIPTION:
+*		Get the CPU peripheral target address window.
+*
+* INPUT:
+*       target - Peripheral target enumerator
+*
+* OUTPUT:
+*       pAddrDecWin - CPU target window information data structure.
+*
+* RETURN:
+*       MV_OK if target exist, MV_ERROR otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvCpuIfTargetWinGet(MV_TARGET target, MV_CPU_DEC_WIN *pAddrDecWin)
+{
+
+	MV_U32 winNum=0xffffffff;
+	MV_AHB_TO_MBUS_DEC_WIN decWin;
+	MV_DRAM_DEC_WIN addrDecWin;
+
+	target = MV_CHANGE_BOOT_CS(target);
+
+	/* Check parameters */
+	if (target >= MAX_TARGETS)
+	{
+		mvOsPrintf("mvCpuIfTargetWinGet: target %d is illegal\n", target);
+		return MV_ERROR;
+	}
+
+	if (MV_TARGET_IS_DRAM(target))
+	{
+		if (mvDramIfWinGet(target,&addrDecWin) != MV_OK)
+		{
+			mvOsPrintf("mvCpuIfTargetWinGet: Failed to get window target %d\n",
+					   target);
+			return MV_ERROR;
+		}
+
+		/* copy relevant data to MV_CPU_DEC_WIN structure */
+		pAddrDecWin->addrWin.baseLow = addrDecWin.addrWin.baseLow;
+		pAddrDecWin->addrWin.baseHigh = addrDecWin.addrWin.baseHigh;
+		pAddrDecWin->addrWin.size = addrDecWin.addrWin.size;
+		pAddrDecWin->enable = addrDecWin.enable;
+		pAddrDecWin->winNum = 0xffffffff;
+	}
+	else
+	{
+		/* get the Window number associated with this target */
+
+		winNum = mvAhbToMbusWinTargetGet(target);
+		if (winNum >= MAX_AHB_TO_MBUS_WINS)
+		{
+			return MV_NO_SUCH;
+		}
+
+		if (mvAhbToMbusWinGet(winNum , &decWin) != MV_OK)
+		{
+			mvOsPrintf("%s: mvAhbToMbusWinGet Failed at winNum = %d\n",
+					   __FUNCTION__, winNum);
+			return MV_ERROR;
+		}
+
+		/* copy relevant data to MV_CPU_DEC_WIN structure */
+		pAddrDecWin->addrWin.baseLow = decWin.addrWin.baseLow;
+		pAddrDecWin->addrWin.baseHigh = decWin.addrWin.baseHigh;
+		pAddrDecWin->addrWin.size = decWin.addrWin.size;
+		pAddrDecWin->enable = decWin.enable;
+		pAddrDecWin->winNum = winNum;
+
+	}
+
+	return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvCpuIfTargetWinEnable - Enable/disable a CPU address decode window
+*
+* DESCRIPTION:
+*       This function enable/disable a CPU address decode window.
+*       if parameter 'enable' == MV_TRUE the routine will enable the
+*       window, thus enabling CPU accesses (before enabling the window it is
+*       tested for overlapping). Otherwise, the window will be disabled.
+*
+* INPUT:
+*       target - Peripheral target enumerator.
+*       enable - Enable/disable parameter.
+*
+* OUTPUT:
+*       N/A
+*
+* RETURN:
+*       MV_ERROR if protection window number was wrong, or the window
+*       overlapps other target window.
+*
+*******************************************************************************/
+MV_STATUS mvCpuIfTargetWinEnable(MV_TARGET target,MV_BOOL enable)
+{
+	MV_U32 winNum, temp;
+	MV_CPU_DEC_WIN addrDecWin;
+
+	target = MV_CHANGE_BOOT_CS(target);
+	
+	/* Check parameters */
+	if (target >= MAX_TARGETS)
+	{
+		mvOsPrintf("mvCpuIfTargetWinEnable: target %d is illegal\n", target);
+		return MV_ERROR;
+	}
+
+	/* get the window and check if it exist */
+	temp = mvCpuIfTargetWinGet(target, &addrDecWin);
+	if (MV_NO_SUCH == temp)
+	{
+		return (enable? MV_ERROR: MV_OK);
+	}
+	else if( MV_OK != temp)
+	{
+		mvOsPrintf("%s: ERR. Getting target %d failed.\n",__FUNCTION__, target);
+		return MV_ERROR;
+	}
+
+
+	/* check overlap */
+
+	if (MV_TRUE == enable)
+	{
+		if (MV_TRUE == cpuTargetWinOverlap(target, &addrDecWin.addrWin))
+		{
+			DB(mvOsPrintf("%s: ERR. Target %d overlap\n",__FUNCTION__, target));
+			return MV_ERROR;
+		}
+	}
+
+
+	if (MV_TARGET_IS_DRAM(target))
+	{
+		if (mvDramIfWinEnable(target , enable) != MV_OK)
+		{
+			mvOsPrintf("mvCpuIfTargetWinGet: mvDramIfWinEnable Failed at \n");
+			return MV_ERROR;
+		}
+
+	}
+	else
+	{
+		/* get the Window number associated with this target */
+
+		winNum = mvAhbToMbusWinTargetGet(target);
+
+		if (winNum >= MAX_AHB_TO_MBUS_WINS)
+		{
+			return (enable? MV_ERROR: MV_OK);
+		}
+
+		if (mvAhbToMbusWinEnable(winNum , enable) != MV_OK)
+		{
+			mvOsPrintf("mvCpuIfTargetWinGet: Failed to enable window = %d\n",
+					   winNum);
+			return MV_ERROR;
+		}
+	}
+
+	return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvCpuIfTargetWinSizeGet - Get CPU target address window size
+*
+* DESCRIPTION:
+*		Get the size of CPU-to-peripheral target window.
+*
+* INPUT:
+*       target - Peripheral target enumerator
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       32bit size. Function also returns '0' if window is closed.
+*		Function returns 0xFFFFFFFF in case of an error.
+*
+*******************************************************************************/
+MV_U32    mvCpuIfTargetWinSizeGet(MV_TARGET target)
+{
+	MV_CPU_DEC_WIN addrDecWin;
+
+	target = MV_CHANGE_BOOT_CS(target);
+
+	/* Check parameters */
+	if (target >= MAX_TARGETS)
+	{
+		mvOsPrintf("mvCpuIfTargetWinSizeGet: target %d is illegal\n", target);
+		return 0;
+	}
+
+	/* Get the winNum window */
+	if (MV_OK != mvCpuIfTargetWinGet(target, &addrDecWin))
+	{
+		mvOsPrintf("mvCpuIfTargetWinSizeGet:ERR. Getting target %d failed.\n",
+                                                                        target);
+		return 0;
+	}
+
+	/* Check if window is enabled   */
+	if (addrDecWin.enable == MV_TRUE)
+	{
+		return (addrDecWin.addrWin.size);
+	}
+	else
+	{
+        	return 0;		/* Window disabled. return 0 */
+	}
+}
+
+/*******************************************************************************
+* mvCpuIfTargetWinBaseLowGet - Get CPU target address window base low
+*
+* DESCRIPTION:
+*       CPU-to-peripheral target address window base is constructed of
+*       two parts: Low and high.
+*		This function gets the CPU peripheral target low base address.
+*
+* INPUT:
+*       target - Peripheral target enumerator
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       32bit low base address.
+*
+*******************************************************************************/
+MV_U32   mvCpuIfTargetWinBaseLowGet(MV_TARGET target)
+{
+	MV_CPU_DEC_WIN addrDecWin;
+
+	target = MV_CHANGE_BOOT_CS(target);
+
+	/* Check parameters */
+	if (target >= MAX_TARGETS)
+	{
+		mvOsPrintf("mvCpuIfTargetWinBaseLowGet: target %d is illegal\n", target);
+		return 0xffffffff;
+	}
+
+	/* Get the target window */
+	if (MV_OK != mvCpuIfTargetWinGet(target, &addrDecWin))
+	{
+		mvOsPrintf("mvCpuIfTargetWinBaseLowGet:ERR. Getting target %d failed.\n",
+                                                                        target);
+		return 0xffffffff;
+	}
+
+	if (MV_FALSE == addrDecWin.enable)
+	{
+		return 0xffffffff;
+	}
+	return (addrDecWin.addrWin.baseLow);
+}
+
+/*******************************************************************************
+* mvCpuIfTargetWinBaseHighGet - Get CPU target address window base high
+*
+* DESCRIPTION:
+*       CPU-to-peripheral target address window base is constructed of
+*       two parts: Low and high.
+*		This function gets the CPU peripheral target high base address.
+*
+* INPUT:
+*       target - Peripheral target enumerator
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       32bit high base address.
+*
+*******************************************************************************/
+MV_U32    mvCpuIfTargetWinBaseHighGet(MV_TARGET target)
+{
+	MV_CPU_DEC_WIN addrDecWin;
+
+	target = MV_CHANGE_BOOT_CS(target);
+
+	/* Check parameters */
+	if (target >= MAX_TARGETS)
+	{
+		mvOsPrintf("mvCpuIfTargetWinBaseLowGet: target %d is illegal\n", target);
+		return 0xffffffff;
+	}
+
+    /* Get the target window */
+	if (MV_OK != mvCpuIfTargetWinGet(target, &addrDecWin))
+	{
+		mvOsPrintf("mvCpuIfTargetWinBaseHighGet:ERR. Getting target %d failed.\n",
+                                                                        target);
+		return 0xffffffff;
+	}
+
+	if (MV_FALSE == addrDecWin.enable)
+	{
+		return 0;
+	}
+
+	return (addrDecWin.addrWin.baseHigh);
+}
+
+#if defined(MV_INCLUDE_PEX)
+/*******************************************************************************
+* mvCpuIfPexRemap - Set CPU remap register for address windows.
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       pexTarget   - Peripheral target enumerator. Must be a PEX target.
+*       pAddrDecWin - CPU target window information data structure.
+*                     Note that caller has to fill in the base field only. The
+*                     size field is ignored.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_ERROR if target is not a PEX one, MV_OK otherwise.
+*
+*******************************************************************************/
+MV_U32 mvCpuIfPexRemap(MV_TARGET pexTarget, MV_ADDR_WIN *pAddrDecWin)
+{
+	MV_U32 winNum;
+
+	/* Check parameters */
+
+	if (mvCtrlPexMaxIfGet() > 1)
+	{
+		if ((!MV_TARGET_IS_PEX1(pexTarget))&&(!MV_TARGET_IS_PEX0(pexTarget)))
+		{
+			mvOsPrintf("mvCpuIfPexRemap: target %d is illegal\n",pexTarget);
+			return 0xffffffff;
+		}
+	}
+	else
+	{
+		if (!MV_TARGET_IS_PEX0(pexTarget))
+		{
+			mvOsPrintf("mvCpuIfPexRemap: target %d is illegal\n",pexTarget);
+			return 0xffffffff;
+		}
+	}
+
+	/* get the Window number associated with this target */
+	winNum = mvAhbToMbusWinTargetGet(pexTarget);
+
+	if (winNum >= MAX_AHB_TO_MBUS_WINS)
+	{
+		mvOsPrintf("mvCpuIfPexRemap: mvAhbToMbusWinTargetGet Failed\n");
+		return 0xffffffff;
+	}
+
+	return mvAhbToMbusWinRemap(winNum , pAddrDecWin);
+}
+
+#endif
+
+#if defined(MV_INCLUDE_PCI)
+/*******************************************************************************
+* mvCpuIfPciRemap - Set CPU remap register for address windows.
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       pciTarget   - Peripheral target enumerator. Must be a PCI target.
+*       pAddrDecWin - CPU target window information data structure.
+*                     Note that caller has to fill in the base field only. The
+*                     size field is ignored.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_ERROR if target is not a PCI one, MV_OK otherwise.
+*
+*******************************************************************************/
+MV_U32 mvCpuIfPciRemap(MV_TARGET pciTarget, MV_ADDR_WIN *pAddrDecWin)
+{
+	MV_U32 winNum;
+
+	/* Check parameters */
+	if (!MV_TARGET_IS_PCI(pciTarget))
+	{
+		mvOsPrintf("mvCpuIfPciRemap: target %d is illegal\n",pciTarget);
+		return 0xffffffff;
+	}
+
+	/* get the Window number associated with this target */
+	winNum = mvAhbToMbusWinTargetGet(pciTarget);
+
+	if (winNum >= MAX_AHB_TO_MBUS_WINS)
+	{
+		mvOsPrintf("mvCpuIfPciRemap: mvAhbToMbusWinTargetGet Failed\n");
+		return 0xffffffff;
+	}
+
+	return mvAhbToMbusWinRemap(winNum , pAddrDecWin);
+}
+#endif /* MV_INCLUDE_PCI */
+
+
+/*******************************************************************************
+* mvCpuIfPciIfRemap - Set CPU remap register for address windows.
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       pciTarget   - Peripheral target enumerator. Must be a PCI target.
+*       pAddrDecWin - CPU target window information data structure.
+*                     Note that caller has to fill in the base field only. The
+*                     size field is ignored.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_ERROR if target is not a PCI one, MV_OK otherwise.
+*
+*******************************************************************************/
+MV_U32 mvCpuIfPciIfRemap(MV_TARGET pciIfTarget, MV_ADDR_WIN *pAddrDecWin)
+{
+#if defined(MV_INCLUDE_PEX)
+	if (MV_TARGET_IS_PEX(pciIfTarget))
+	{
+		return mvCpuIfPexRemap(pciIfTarget,pAddrDecWin);
+	}
+#endif
+#if defined(MV_INCLUDE_PCI)
+
+	if (MV_TARGET_IS_PCI(pciIfTarget))
+	{
+		return mvCpuIfPciRemap(pciIfTarget,pAddrDecWin);
+	}
+#endif
+	return 0;
+}
+
+
+
+/*******************************************************************************
+* mvCpuIfTargetOfBaseAddressGet - Get the target according to base address
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       baseAddress -  base address to be checked
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       the target number that baseAddress belongs to or MAX_TARGETS is not
+*       found
+*
+*******************************************************************************/
+
+MV_TARGET mvCpuIfTargetOfBaseAddressGet(MV_U32 baseAddress)
+{
+	MV_CPU_DEC_WIN win;
+	MV_U32 target;
+
+	for( target = 0; target < MAX_TARGETS; target++ )
+	{
+		if( mvCpuIfTargetWinGet( target, &win ) == MV_OK )
+		{
+			if( win.enable )
+			{
+				if ((baseAddress >= win.addrWin.baseLow) &&
+					(baseAddress < win.addrWin.baseLow + win.addrWin.size)) break;
+			}
+		}
+		else return MAX_TARGETS;
+	}
+
+	return target;
+}
+/*******************************************************************************
+* cpuTargetWinOverlap - Detect CPU address decode windows overlapping
+*
+* DESCRIPTION:
+*       An unpredicted behaviur is expected in case CPU address decode
+*       windows overlapps.
+*       This function detects CPU address decode windows overlapping of a
+*       specified target. The function does not check the target itself for
+*       overlapping. The function also skipps disabled address decode windows.
+*
+* INPUT:
+*       target      - Peripheral target enumerator.
+*       pAddrDecWin - An address decode window struct.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE if the given address window overlaps current address
+*       decode map, MV_FALSE otherwise.
+*
+*******************************************************************************/
+static MV_BOOL cpuTargetWinOverlap(MV_TARGET target, MV_ADDR_WIN *pAddrWin)
+{
+	MV_U32		targetNum;
+	MV_CPU_DEC_WIN 	addrDecWin;
+	MV_STATUS	status;
+
+
+	for(targetNum = 0; targetNum < MAX_TARGETS; targetNum++)
+	{
+#if defined(MV_RUN_FROM_FLASH)
+		if(MV_TARGET_IS_AS_BOOT(target))
+		{
+			if (MV_CHANGE_BOOT_CS(targetNum) == target)
+				continue;
+		}
+#endif /* MV_RUN_FROM_FLASH */
+
+		/* don't check our target or illegal targets */
+        	if (targetNum == target)
+        	{
+            		continue;
+        	}
+
+		/* Get window parameters 	*/
+		status = mvCpuIfTargetWinGet(targetNum, &addrDecWin);
+        	if(MV_NO_SUCH == status)
+        	{
+            		continue;
+        	}
+		if(MV_OK != status)
+		{
+			DB(mvOsPrintf("cpuTargetWinOverlap: ERR. TargetWinGet failed\n"));
+            		return MV_TRUE;
+		}
+
+		/* Do not check disabled windows	*/
+		if (MV_FALSE == addrDecWin.enable)
+		{
+			continue;
+		}
+
+        	if(MV_TRUE == ctrlWinOverlapTest(pAddrWin, &addrDecWin.addrWin))
+		{
+			DB(mvOsPrintf(
+			"cpuTargetWinOverlap: Required target %d overlap current %d\n",
+								target, targetNum));
+			return MV_TRUE;
+		}
+    	}
+
+	return MV_FALSE;
+
+}
+
+/*******************************************************************************
+* mvCpuIfAddDecShow - Print the CPU address decode map.
+*
+* DESCRIPTION:
+*		This function print the CPU address decode map.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_VOID mvCpuIfAddDecShow(MV_VOID)
+{
+	MV_CPU_DEC_WIN win;
+	MV_U32 target;
+	mvOsOutput( "\n" );
+	mvOsOutput( "CPU Interface\n" );
+	mvOsOutput( "-------------\n" );
+
+	for( target = 0; target < MAX_TARGETS; target++ )
+	{
+
+		memset( &win, 0, sizeof(MV_CPU_DEC_WIN) );
+
+		mvOsOutput( "%s ",mvCtrlTargetNameGet(target));
+		mvOsOutput( "...." );
+
+		if( mvCpuIfTargetWinGet( target, &win ) == MV_OK )
+		{
+			if( win.enable )
+			{
+				mvOsOutput( "base %08x, ", win.addrWin.baseLow );
+				mvSizePrint( win.addrWin.size );
+				mvOsOutput( "\n" );
+
+            }
+			else
+				mvOsOutput( "disable\n" );
+		}
+		else if( mvCpuIfTargetWinGet( target, &win ) == MV_NO_SUCH )
+		{
+				mvOsOutput( "no such\n" );
+		}
+	}
+}
+
+#if defined(MV_INCLUDE_PEX)
+/*******************************************************************************
+* mvCpuIfEnablePex - Enable PCI Express.
+*
+* DESCRIPTION:
+*	This function enables PCI Express access to the device address
+*	space.
+*
+* INPUT:
+*	None.
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_VOID mvCpuIfEnablePex(void)
+{
+	/* CPU config register Pex enable */
+	MV_REG_BIT_RESET(CPU_CTRL_STAT_REG,CCSR_PCI_ACCESS_MASK);
+}
+#endif
+
+#if defined(MV_INCLUDE_PMU)
+/*******************************************************************************
+* mvCpuIfEnablePmu
+*
+* DESCRIPTION:
+*	Enable the PMU Control over the CPU reset.
+*
+* INPUT:
+*	None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_VOID mvCpuIfEnablePmu(void)
+{
+	MV_U32 reg;
+
+	reg = MV_REG_READ(CPU_CONTROL_REG);
+	reg |= CPU_CTRL_PMU_CPU_RST_EN_MASK;
+	MV_REG_WRITE(CPU_CONTROL_REG, reg);
+
+	return;
+}
+#endif
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/dove_family/ctrlEnv/sys/mvCpuIf.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/dove_family/ctrlEnv/sys/mvCpuIf.h
@@ -0,0 +1,124 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#ifndef __INCmvCpuIfh
+#define __INCmvCpuIfh
+
+/* includes */
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "ctrlEnv/sys/mvCpuIfRegs.h"
+#include "ctrlEnv/sys/mvAhbToMbus.h"
+#include "ddr/mvDramIf.h"
+#if defined(MV_INCLUDE_PEX)
+#include "pci-if/mvPciIf.h"
+#include "pci-if/pex/mvPex.h"
+#endif
+
+/* defines  */
+
+/* typedefs */
+/* This structure describes CPU interface address decode window               */
+typedef struct _mvCpuIfDecWin 
+{
+	MV_ADDR_WIN   addrWin;    /* An address window*/
+	MV_U32		  winNum;	  /* Window Number in the AHB To Mbus bridge */
+	MV_BOOL       enable;     /* Address decode window is enabled/disabled    */
+
+}MV_CPU_DEC_WIN;
+
+
+
+/* mvCpuIfLib.h API list */
+
+/* mvCpuIfLib.h API list */
+
+MV_STATUS mvCpuIfInit(MV_CPU_DEC_WIN *cpuAddrWinMap);
+MV_STATUS mvCpuIfTargetWinSet(MV_TARGET target, MV_CPU_DEC_WIN *pAddrDecWin);
+MV_STATUS mvCpuIfTargetWinGet(MV_TARGET target, MV_CPU_DEC_WIN *pAddrDecWin);
+MV_STATUS mvCpuIfTargetWinEnable(MV_TARGET target,MV_BOOL enable);
+MV_U32    mvCpuIfTargetWinSizeGet(MV_TARGET target);
+MV_U32    mvCpuIfTargetWinBaseLowGet(MV_TARGET target);
+MV_U32    mvCpuIfTargetWinBaseHighGet(MV_TARGET target);
+MV_TARGET mvCpuIfTargetOfBaseAddressGet(MV_U32 baseAddress);
+#if defined(MV_INCLUDE_PEX)
+MV_U32    mvCpuIfPexRemap(MV_TARGET pexTarget, MV_ADDR_WIN *pAddrDecWin);
+MV_VOID	  mvCpuIfEnablePex(MV_VOID);
+#endif
+#if defined(MV_INCLUDE_PCI)
+MV_U32    mvCpuIfPciRemap(MV_TARGET pciTarget, MV_ADDR_WIN *pAddrDecWin);
+#endif                                               
+MV_U32 	  mvCpuIfPciIfRemap(MV_TARGET pciTarget, MV_ADDR_WIN *pAddrDecWin);
+
+#ifdef MV_INCLUDE_PMU
+MV_VOID mvCpuIfEnablePmu(void);
+#endif
+
+MV_VOID   mvCpuIfAddDecShow(MV_VOID);
+
+#if defined(MV88F6281)
+MV_STATUS mvCpuIfBridgeReorderWAInit(void);
+#endif
+
+#endif /* __INCmvCpuIfh */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/dove_family/ctrlEnv/sys/mvAhbToMbus.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/dove_family/ctrlEnv/sys/mvAhbToMbus.c
@@ -0,0 +1,793 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+/* includes */
+#include "ctrlEnv/sys/mvAhbToMbus.h"
+#include "ctrlEnv/mvCtrlEnvAddrDec.h"
+
+#undef MV_DEBUG
+/* defines  */
+#ifdef MV_DEBUG
+	#define DB(x)	x
+#else
+	#define DB(x)
+#endif
+
+/* typedefs */
+
+/* CPU address remap registers offsets are inconsecutive. This struct 		*/
+/* describes address remap register offsets									*/
+typedef struct _ahbToMbusRemapRegOffs
+{
+    MV_U32 lowRegOffs;		/* Low 32-bit remap register offset			*/
+    MV_U32 highRegOffs;		/* High 32 bit remap register offset		*/
+}AHB_TO_MBUS_REMAP_REG_OFFS;
+
+/* locals   */
+static MV_STATUS ahbToMbusRemapRegOffsGet (MV_U32 winNum, AHB_TO_MBUS_REMAP_REG_OFFS *pRemapRegs);
+
+/*******************************************************************************
+* mvAhbToMbusInit - Initialize Ahb To Mbus Address Map !
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_OK laways.
+*
+*******************************************************************************/
+MV_STATUS mvAhbToMbusInit(void)
+{
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvAhbToMbusWinSet - Set CPU-to-peripheral winNum address window
+*
+* DESCRIPTION:
+*       This function sets
+*       address window, also known as address decode window.
+*       A new address decode window is set for specified winNum address window.
+*       If address decode window parameter structure enables the window,
+*       the routine will also enable the winNum window, allowing CPU to access
+*       the winNum window.
+*
+* INPUT:
+*       winNum      - Windows number.
+*       pAddrDecWin - CPU winNum window data structure.
+*
+* OUTPUT:
+*       N/A
+*
+* RETURN:
+*       MV_OK if CPU winNum window was set correctly, MV_ERROR in case of
+*       address window overlapps with other active CPU winNum window or
+*		trying to assign 36bit base address while CPU does not support that.
+*       The function returns MV_NOT_SUPPORTED, if the winNum is unsupported.
+*
+*******************************************************************************/
+MV_STATUS mvAhbToMbusWinSet(MV_U32 winNum, MV_AHB_TO_MBUS_DEC_WIN *pAddrDecWin)
+{
+	MV_TARGET_ATTRIB targetAttribs;
+	MV_DEC_REGS decRegs;
+
+	/* Parameter checking   */
+	if (winNum >= MAX_AHB_TO_MBUS_WINS)
+	{
+		mvOsPrintf("mvAhbToMbusWinSet: ERR. Invalid winNum %d\n", winNum);
+		return MV_NOT_SUPPORTED;
+	}
+
+	/* read base register*/
+	if (winNum != MV_AHB_TO_MBUS_INTREG_WIN)
+	{
+		decRegs.baseReg = MV_REG_READ(AHB_TO_MBUS_WIN_BASE_REG(winNum));
+	}
+	else
+	{
+		decRegs.baseReg = MV_REG_READ(AHB_TO_MBUS_WIN_INTEREG_REG);
+	}
+
+	/* check if address is aligned to the size */
+	if(MV_IS_NOT_ALIGN(pAddrDecWin->addrWin.baseLow, pAddrDecWin->addrWin.size))
+	{
+		mvOsPrintf("mvAhbToMbusWinSet:Error setting AHB to MBUS window %d to "\
+				   "target %s.\nAddress 0x%08x is unaligned to size 0x%x.\n",
+				   winNum,
+				   mvCtrlTargetNameGet(pAddrDecWin->target),
+				   pAddrDecWin->addrWin.baseLow,
+				   pAddrDecWin->addrWin.size);
+		return MV_ERROR;
+	}
+
+	/* read control register*/
+	if (winNum != MV_AHB_TO_MBUS_INTREG_WIN)
+	{
+		decRegs.sizeReg = MV_REG_READ(AHB_TO_MBUS_WIN_CTRL_REG(winNum));
+	}
+
+	if (MV_OK != mvCtrlAddrDecToReg(&(pAddrDecWin->addrWin),&decRegs))
+	{
+		mvOsPrintf("mvAhbToMbusWinSet:mvCtrlAddrDecToReg Failed\n");
+		return MV_ERROR;
+	}
+
+	/* enable\Disable */
+	if (MV_TRUE == pAddrDecWin->enable)
+	{
+		decRegs.sizeReg |= ATMWCR_WIN_ENABLE;
+	}
+	else
+	{
+		decRegs.sizeReg &= ~ATMWCR_WIN_ENABLE;
+	}
+
+	mvCtrlAttribGet(pAddrDecWin->target,&targetAttribs);
+
+	/* set attributes */
+	decRegs.sizeReg &= ~ATMWCR_WIN_ATTR_MASK;
+	decRegs.sizeReg |= targetAttribs.attrib << ATMWCR_WIN_ATTR_OFFS;
+	/* set target ID */
+	decRegs.sizeReg &= ~ATMWCR_WIN_TARGET_MASK;
+	decRegs.sizeReg |= targetAttribs.targetId << ATMWCR_WIN_TARGET_OFFS;
+
+#if !defined(MV_RUN_FROM_FLASH)
+    	/* To be on the safe side we disable the window before writing the  */
+    	/* new values.                                                      */
+	if (winNum != MV_AHB_TO_MBUS_INTREG_WIN)
+	{
+		mvAhbToMbusWinEnable(winNum,MV_FALSE);
+	}
+#endif
+
+	/* 3) Write to address decode Base Address Register                   */
+	if (winNum != MV_AHB_TO_MBUS_INTREG_WIN)
+	{
+		MV_REG_WRITE(AHB_TO_MBUS_WIN_BASE_REG(winNum), decRegs.baseReg);
+	}
+	else
+	{
+		MV_REG_WRITE(AHB_TO_MBUS_WIN_INTEREG_REG, decRegs.baseReg);
+	}
+
+	/* Internal register space have no size	*/
+	/* register. Do not perform size register assigment for those targets 	*/
+	if (winNum != MV_AHB_TO_MBUS_INTREG_WIN)
+	{
+		/* Write to address decode Size Register                        	*/
+		MV_REG_WRITE(AHB_TO_MBUS_WIN_CTRL_REG(winNum), decRegs.sizeReg);
+	}
+
+    	return MV_OK;
+}
+
+/*******************************************************************************
+* mvAhbToMbusWinGet - Get CPU-to-peripheral winNum address window
+*
+* DESCRIPTION:
+*		Get the CPU peripheral winNum address window.
+*
+* INPUT:
+*       winNum - Peripheral winNum enumerator
+*
+* OUTPUT:
+*       pAddrDecWin - CPU winNum window information data structure.
+*
+* RETURN:
+*       MV_OK if winNum exist, MV_ERROR otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvAhbToMbusWinGet(MV_U32 winNum, MV_AHB_TO_MBUS_DEC_WIN *pAddrDecWin)
+{
+	MV_DEC_REGS decRegs;
+	MV_TARGET_ATTRIB targetAttrib;
+
+	/* Parameter checking   */
+	if (winNum >= MAX_AHB_TO_MBUS_WINS)
+	{
+		mvOsPrintf("mvAhbToMbusWinGet: ERR. Invalid winNum %d\n", winNum);
+		return MV_NOT_SUPPORTED;
+	}
+
+	/* Internal register space size have no size register*/
+	if (winNum != MV_AHB_TO_MBUS_INTREG_WIN)
+	{
+		decRegs.sizeReg =  MV_REG_READ(AHB_TO_MBUS_WIN_CTRL_REG(winNum));
+	}
+	else
+	{
+		decRegs.sizeReg = 0;
+	}
+
+	/* Read base and size	*/
+	if (winNum != MV_AHB_TO_MBUS_INTREG_WIN)
+	{
+		decRegs.baseReg = MV_REG_READ(AHB_TO_MBUS_WIN_BASE_REG(winNum));
+	}
+	else
+	{
+		decRegs.baseReg = MV_REG_READ(AHB_TO_MBUS_WIN_INTEREG_REG);
+	}
+
+	if (MV_OK != mvCtrlRegToAddrDec(&decRegs,&(pAddrDecWin->addrWin)))
+	{
+		mvOsPrintf("mvAhbToMbusWinGet: mvCtrlRegToAddrDec Failed \n");
+		return MV_ERROR;
+	}
+
+	if (winNum == MV_AHB_TO_MBUS_INTREG_WIN)
+	{
+	        pAddrDecWin->addrWin.size = INTER_REGS_SIZE;
+		pAddrDecWin->target = INTER_REGS;
+		pAddrDecWin->enable = MV_TRUE;
+
+		return MV_OK;
+	}
+
+	if (decRegs.sizeReg & ATMWCR_WIN_ENABLE)
+	{
+		pAddrDecWin->enable = MV_TRUE;
+	}
+	else
+	{
+		pAddrDecWin->enable = MV_FALSE;
+
+	}
+
+	if (-1 == pAddrDecWin->addrWin.size)
+	{
+		return MV_ERROR;
+	}
+
+	/* attrib and targetId */
+	targetAttrib.attrib = (decRegs.sizeReg & ATMWCR_WIN_ATTR_MASK) >> ATMWCR_WIN_ATTR_OFFS;
+	targetAttrib.targetId = (decRegs.sizeReg & ATMWCR_WIN_TARGET_MASK) >> ATMWCR_WIN_TARGET_OFFS;
+
+	pAddrDecWin->target = mvCtrlTargetGet(&targetAttrib);
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvAhbToMbusWinTargetGet - Get Window number associated with target
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*
+* RETURN:
+*
+*******************************************************************************/
+MV_U32	  mvAhbToMbusWinTargetGet(MV_TARGET target)
+{
+	MV_AHB_TO_MBUS_DEC_WIN decWin;
+	MV_U32 winNum;
+
+	/* Check parameters */
+	if (target >= MAX_TARGETS)
+	{
+		mvOsPrintf("mvAhbToMbusWinTargetGet: target %d is illegal\n", target);
+		return 0xffffffff;
+	}
+
+	if (INTER_REGS == target)
+	{
+		return MV_AHB_TO_MBUS_INTREG_WIN;
+	}
+
+	for (winNum = 0; winNum < MAX_AHB_TO_MBUS_WINS; winNum++)
+	{
+		if (winNum == MV_AHB_TO_MBUS_INTREG_WIN)
+			continue;
+
+		if (mvAhbToMbusWinGet(winNum,&decWin) != MV_OK)
+		{
+			mvOsPrintf("mvAhbToMbusWinTargetGet: mvAhbToMbusWinGet fail\n");
+			return 0xffffffff;
+
+		}
+
+		if (decWin.enable == MV_TRUE)
+		{
+			if (decWin.target == target)
+			{
+				return winNum;
+			}
+		}
+	}
+
+	return 0xFFFFFFFF;
+}
+
+/*******************************************************************************
+* mvAhbToMbusWinAvailGet - Get First Available window number.
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*
+* RETURN:
+*
+*******************************************************************************/
+MV_U32    mvAhbToMbusWinAvailGet(MV_VOID)
+{
+        MV_AHB_TO_MBUS_DEC_WIN decWin;
+        MV_U32 winNum;
+
+        for (winNum = 0; winNum < MAX_AHB_TO_MBUS_WINS; winNum++)
+        {
+                if (winNum == MV_AHB_TO_MBUS_INTREG_WIN)
+                        continue;
+
+                if (mvAhbToMbusWinGet(winNum,&decWin) != MV_OK)
+                {
+                        mvOsPrintf("mvAhbToMbusWinTargetGet: mvAhbToMbusWinGet fail\n");
+                        return 0xffffffff;
+                }
+
+                if (decWin.enable == MV_FALSE)
+                {
+			return winNum;
+                }
+        }
+
+        return 0xFFFFFFFF;
+}
+
+/*******************************************************************************
+* mvAhbToMbusWinEnable - Enable/disable a CPU address decode window
+*
+* DESCRIPTION:
+*       This function enable/disable a CPU address decode window.
+*       if parameter 'enable' == MV_TRUE the routine will enable the
+*       window, thus enabling CPU accesses (before enabling the window it is
+*       tested for overlapping). Otherwise, the window will be disabled.
+*
+* INPUT:
+*       winNum - Peripheral winNum enumerator.
+*       enable - Enable/disable parameter.
+*
+* OUTPUT:
+*       N/A
+*
+* RETURN:
+*       MV_ERROR if protection window number was wrong, or the window
+*       overlapps other winNum window.
+*
+*******************************************************************************/
+MV_STATUS mvAhbToMbusWinEnable(MV_U32 winNum, MV_BOOL enable)
+{
+	/* Parameter checking   */
+	if (winNum >= MAX_AHB_TO_MBUS_WINS)
+	{
+		mvOsPrintf("mvAhbToMbusWinEnable: ERR. Invalid winNum %d\n", winNum);
+		return MV_NOT_SUPPORTED;
+	}
+
+	/* Internal registers bar can't be disable or enabled */
+	if (winNum == MV_AHB_TO_MBUS_INTREG_WIN)
+	{
+		return (enable ? MV_OK : MV_ERROR);
+	}
+
+    	if (enable == MV_TRUE)
+    	{
+		/* enable the window */
+		MV_REG_BIT_SET(AHB_TO_MBUS_WIN_CTRL_REG(winNum), ATMWCR_WIN_ENABLE);
+    	}
+    	else
+    	{   	/* Disable address decode winNum window                             */
+		MV_REG_BIT_RESET(AHB_TO_MBUS_WIN_CTRL_REG(winNum), ATMWCR_WIN_ENABLE);
+    	}
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvAhbToMbusWinRemap - Set CPU remap register for address windows.
+*
+* DESCRIPTION:
+*       After a CPU address hits one of PCI address decode windows there is an
+*       option to remap the address to a different one. For example, CPU
+*       executes a read from PCI winNum window address 0x1200.0000. This
+*       can be modified so the address on the PCI bus would be 0x1400.0000
+*       Using the PCI address remap mechanism.
+*
+* INPUT:
+*       winNum      - Peripheral winNum enumerator. Must be a PCI winNum.
+*       pAddrDecWin - CPU winNum window information data structure.
+*                     Note that caller has to fill in the base field only. The
+*                     size field is ignored.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_ERROR if winNum is not a PCI one, MV_OK otherwise.
+*
+*******************************************************************************/
+MV_U32 mvAhbToMbusWinRemap(MV_U32 winNum, MV_ADDR_WIN *pAddrWin)
+{
+    	MV_U32 baseAddr;
+	AHB_TO_MBUS_REMAP_REG_OFFS remapRegOffs;
+
+    	MV_U32 effectiveBaseAddress=0, baseAddrValue=0, windowSizeValue=0;
+
+	/* Get registers offsets of given winNum 		*/
+	if (MV_NO_SUCH == ahbToMbusRemapRegOffsGet(winNum, &remapRegOffs))
+	{
+		return 0xffffffff;
+	}
+
+	/* 1) Set address remap low */
+    	baseAddr = pAddrWin->baseLow;
+
+    	/* Check base address aligment 					*/
+	/*
+	if (MV_IS_NOT_ALIGN(baseAddr, ATMWRLR_REMAP_LOW_ALIGNMENT))
+	{
+        	mvOsPrintf("mvAhbToMbusPciRemap: Warning. Target base 0x%x unaligned\n", baseAddr);
+        	return MV_ERROR;
+	}
+	*/
+
+	/* BaseLow[31:16] => base register [31:16] 		*/
+	baseAddr = baseAddr & ATMWRLR_REMAP_LOW_MASK;
+
+    	MV_REG_WRITE(remapRegOffs.lowRegOffs, baseAddr);
+
+	MV_REG_WRITE(remapRegOffs.highRegOffs, pAddrWin->baseHigh);
+
+	baseAddrValue = MV_REG_READ(AHB_TO_MBUS_WIN_BASE_REG(winNum));
+	windowSizeValue = MV_REG_READ(AHB_TO_MBUS_WIN_CTRL_REG(winNum));
+
+	baseAddrValue &= ATMWBR_BASE_MASK;
+	windowSizeValue &=ATMWCR_WIN_SIZE_MASK;
+
+   	/* Start calculating the effective Base Address */
+   	effectiveBaseAddress = baseAddrValue;
+
+   	/* The effective base address will be combined from the chopped (if any)
+	  remap value (according to the size value and remap mechanism) and the
+	  window's base address */
+   	effectiveBaseAddress |= (((windowSizeValue) | 0xffff) & pAddrWin->baseLow);
+   	/* If the effectiveBaseAddress exceed the window boundaries return an
+	  invalid value. */
+
+   	if (effectiveBaseAddress > (baseAddrValue + (windowSizeValue | 0xffff)))
+   	{
+		mvOsPrintf("mvAhbToMbusPciRemap: Error\n");
+		return 0xffffffff;
+   	}
+
+	return effectiveBaseAddress;
+}
+
+/*******************************************************************************
+* mvAhbToMbusWinTargetSwap - Swap AhbToMbus windows between targets
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       target1      - CPU Interface target 1
+*       target2      - CPU Interface target 2
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_ERROR if targets are illigal, or if one of the targets is not
+*	    associated to a valid window .
+*       MV_OK otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvAhbToMbusWinTargetSwap(MV_TARGET target1,MV_TARGET target2)
+{
+	MV_U32 winNum1,winNum2;
+	MV_AHB_TO_MBUS_DEC_WIN winDec1,winDec2,winDecTemp;
+	AHB_TO_MBUS_REMAP_REG_OFFS remapRegs1,remapRegs2;
+	MV_U32 remapBaseLow1=0,remapBaseLow2=0;
+	MV_U32 remapBaseHigh1=0,remapBaseHigh2=0;
+
+	/* Check parameters */
+	if (target1 >= MAX_TARGETS)
+	{
+		mvOsPrintf("mvAhbToMbusWinTargetSwap: target %d is illegal\n", target1);
+		return MV_ERROR;
+	}
+
+	if (target2 >= MAX_TARGETS)
+	{
+		mvOsPrintf("mvAhbToMbusWinTargetSwap: target %d is illegal\n", target1);
+		return MV_ERROR;
+	}
+
+
+    	/* get window associated with this target */
+	winNum1 = mvAhbToMbusWinTargetGet(target1);
+
+	if (winNum1 == 0xffffffff)
+	{
+		mvOsPrintf("mvAhbToMbusWinTargetSwap: target %d has illigal win %d\n",
+					target1,winNum1);
+		return MV_ERROR;
+	}
+
+    	/* get window associated with this target */
+	winNum2 = mvAhbToMbusWinTargetGet(target2);
+
+	if (winNum2 == 0xffffffff)
+	{
+		mvOsPrintf("mvAhbToMbusWinTargetSwap: target %d has illigal win %d\n",
+					target2,winNum2);
+		return MV_ERROR;
+	}
+
+	/* now Get original values of both Windows */
+	if (MV_OK != mvAhbToMbusWinGet(winNum1,&winDec1))
+	{
+		mvOsPrintf("mvAhbToMbusWinTargetSwap: mvAhbToMbusWinGet failed win %d\n",
+					winNum1);
+		return MV_ERROR;
+	}
+	if (MV_OK != mvAhbToMbusWinGet(winNum2,&winDec2))
+	{
+		mvOsPrintf("mvAhbToMbusWinTargetSwap: mvAhbToMbusWinGet failed win %d\n",
+					winNum2);
+		return MV_ERROR;
+	}
+
+	/* disable both windows */
+	if (MV_OK != mvAhbToMbusWinEnable(winNum1,MV_FALSE))
+	{
+		mvOsPrintf("mvAhbToMbusWinTargetSwap: failed to enable window %d\n",
+					winNum1);
+		return MV_ERROR;
+	}
+	if (MV_OK != mvAhbToMbusWinEnable(winNum2,MV_FALSE))
+	{
+		mvOsPrintf("mvAhbToMbusWinTargetSwap: failed to enable windo %d\n",
+					winNum2);
+		return MV_ERROR;
+	}
+
+	/* now swap targets */
+
+	/* first save winDec2 values */
+	winDecTemp.addrWin.baseHigh = winDec2.addrWin.baseHigh;
+	winDecTemp.addrWin.baseLow = winDec2.addrWin.baseLow;
+	winDecTemp.addrWin.size = winDec2.addrWin.size;
+	winDecTemp.enable = winDec2.enable;
+	winDecTemp.target = winDec2.target;
+
+	/* winDec2 = winDec1 */
+	winDec2.addrWin.baseHigh = winDec1.addrWin.baseHigh;
+	winDec2.addrWin.baseLow = winDec1.addrWin.baseLow;
+	winDec2.addrWin.size = winDec1.addrWin.size;
+	winDec2.enable = winDec1.enable;
+	winDec2.target = winDec1.target;
+
+	/* winDec1 = winDecTemp */
+	winDec1.addrWin.baseHigh = winDecTemp.addrWin.baseHigh;
+	winDec1.addrWin.baseLow = winDecTemp.addrWin.baseLow;
+	winDec1.addrWin.size = winDecTemp.addrWin.size;
+	winDec1.enable = winDecTemp.enable;
+	winDec1.target = winDecTemp.target;
+
+	/* now set the new values */
+
+    	mvAhbToMbusWinSet(winNum1,&winDec1);
+	mvAhbToMbusWinSet(winNum2,&winDec2);
+
+	/* now we will treat the remap windows if exist */
+
+	/* now check if one or both windows has a remap window
+	as well after the swap ! */
+
+	/* if a window had a remap value differnt than the base value
+	before the swap , then after the swap the remap value will be
+	equal to the base value unless both windows has a remap windows*/
+
+	/* first get old values */
+	if (MV_NO_SUCH != ahbToMbusRemapRegOffsGet(winNum1,&remapRegs1))
+	{
+		remapBaseLow1 = MV_REG_READ(remapRegs1.lowRegOffs);
+	    	remapBaseHigh1 = MV_REG_READ(remapRegs1.highRegOffs);
+	}
+	if (MV_NO_SUCH != ahbToMbusRemapRegOffsGet(winNum2,&remapRegs2))
+	{
+		remapBaseLow2 = MV_REG_READ(remapRegs2.lowRegOffs);
+	    	remapBaseHigh2 = MV_REG_READ(remapRegs2.highRegOffs);
+	}
+
+	/* now do the swap */
+	if (MV_NO_SUCH != ahbToMbusRemapRegOffsGet(winNum1,&remapRegs1))
+	{
+		if (MV_NO_SUCH != ahbToMbusRemapRegOffsGet(winNum2,&remapRegs2))
+		{
+			/* Two windows has a remap !!! so swap */
+
+			MV_REG_WRITE(remapRegs2.highRegOffs,remapBaseHigh1);
+			MV_REG_WRITE(remapRegs2.lowRegOffs,remapBaseLow1);
+
+			MV_REG_WRITE(remapRegs1.highRegOffs,remapBaseHigh2);
+			MV_REG_WRITE(remapRegs1.lowRegOffs,remapBaseLow2);
+		}
+		else
+		{
+			/* remap == base */
+			MV_REG_WRITE(remapRegs1.highRegOffs,winDec1.addrWin.baseHigh);
+			MV_REG_WRITE(remapRegs1.lowRegOffs,winDec1.addrWin.baseLow);
+		}
+	}
+	else if (MV_NO_SUCH != ahbToMbusRemapRegOffsGet(winNum2,&remapRegs2))
+	{
+		/* remap == base */
+		MV_REG_WRITE(remapRegs2.highRegOffs,winDec2.addrWin.baseHigh);
+		MV_REG_WRITE(remapRegs2.lowRegOffs,winDec2.addrWin.baseLow);
+	}
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* ahbToMbusRemapRegOffsGet - Get CPU address remap register offsets
+*
+* DESCRIPTION:
+* 		CPU to PCI address remap registers offsets are inconsecutive.
+*		This function returns PCI address remap registers offsets.
+*
+* INPUT:
+*       winNum - Address decode window number. See MV_U32 enumerator.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*		MV_ERROR if winNum is not a PCI one.
+*
+*******************************************************************************/
+static MV_STATUS ahbToMbusRemapRegOffsGet(MV_U32 winNum, AHB_TO_MBUS_REMAP_REG_OFFS *pRemapRegs)
+{
+	switch (winNum)
+	{
+		case 0:
+        	case 1:
+		case 2:
+		case 3:
+			pRemapRegs->lowRegOffs  = AHB_TO_MBUS_WIN_REMAP_LOW_REG(winNum);
+			pRemapRegs->highRegOffs = AHB_TO_MBUS_WIN_REMAP_HIGH_REG(winNum);
+			break;
+		default:
+		{
+			pRemapRegs->lowRegOffs  = 0;
+			pRemapRegs->highRegOffs = 0;
+
+			DB(mvOsPrintf("ahbToMbusRemapRegOffsGet: ERR. Invalid winNum %d\n",
+						winNum));
+		   	return MV_NO_SUCH;
+		}
+	}
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvAhbToMbusAddDecShow - Print the AHB to MBus bridge address decode map.
+*
+* DESCRIPTION:
+*		This function print the CPU address decode map.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_VOID mvAhbToMbusAddDecShow(MV_VOID)
+{
+	MV_AHB_TO_MBUS_DEC_WIN win;
+	MV_U32 winNum;
+	mvOsOutput( "\n" );
+	mvOsOutput( "AHB To MBUS Bridge:\n" );
+	mvOsOutput( "-------------------\n" );
+
+	for( winNum = 0; winNum < MAX_AHB_TO_MBUS_WINS; winNum++ )
+	{
+		memset( &win, 0, sizeof(MV_AHB_TO_MBUS_DEC_WIN) );
+
+		mvOsOutput( "win%d - ", winNum );
+
+		if( mvAhbToMbusWinGet( winNum, &win ) == MV_OK )
+		{
+			if( win.enable )
+			{
+				mvOsOutput( "%s base %08x, ",
+				mvCtrlTargetNameGet(win.target), win.addrWin.baseLow );
+                		mvOsOutput( "...." );
+				mvSizePrint( win.addrWin.size );
+
+				mvOsOutput( "\n" );
+
+            		}
+			else
+				mvOsOutput( "disable\n" );
+		}
+	}
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/dove_family/ctrlEnv/sys/mvAhbToMbus.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/dove_family/ctrlEnv/sys/mvAhbToMbus.h
@@ -0,0 +1,97 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#ifndef __INCmvAhbToMbush
+#define __INCmvAhbToMbush
+
+/* includes */
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "ctrlEnv/sys/mvAhbToMbusRegs.h"
+#include "ctrlEnv/mvCtrlEnvAddrDec.h"
+
+/* defines  */
+
+typedef struct _mvAhbtoMbusDecWin
+{
+	MV_TARGET	target;
+	MV_ADDR_WIN	addrWin;    /* An address window*/
+	MV_BOOL		enable;     /* Address decode window is enabled/disabled    */
+
+}MV_AHB_TO_MBUS_DEC_WIN;
+
+/* mvAhbToMbus.h API list */
+
+MV_STATUS mvAhbToMbusInit(MV_VOID);
+MV_STATUS mvAhbToMbusWinSet(MV_U32 winNum, MV_AHB_TO_MBUS_DEC_WIN *pAddrDecWin);
+MV_STATUS mvAhbToMbusWinGet(MV_U32 winNum, MV_AHB_TO_MBUS_DEC_WIN *pAddrDecWin);
+MV_STATUS mvAhbToMbusWinEnable(MV_U32 winNum,MV_BOOL enable);
+MV_U32    mvAhbToMbusWinRemap(MV_U32 winNum, MV_ADDR_WIN *pAddrDecWin);
+MV_U32	  mvAhbToMbusWinTargetGet(MV_TARGET target);
+MV_U32    mvAhbToMbusWinAvailGet(MV_VOID);
+MV_STATUS mvAhbToMbusWinTargetSwap(MV_TARGET target1,MV_TARGET target2);
+MV_VOID   mvAhbToMbusAddDecShow(MV_VOID);
+
+
+#endif /* __INCmvAhbToMbush */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/dove_family/ctrlEnv/sys/mvCpuIfInit.S
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/dove_family/ctrlEnv/sys/mvCpuIfInit.S
@@ -0,0 +1,177 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#define MV_ASMLANGUAGE
+#include "mvCommon.h"
+#include "mvOsAsm.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "mvDeviceId.h"
+#include "mvCtrlEnvRegs.h"
+#include "mvCpuIfRegs.h"
+#include "mvCtrlEnvAsm.h"
+
+
+/*******************************************************************************
+* mvCpuIfPreInit - Make early initialization of CPU interface.
+*
+* DESCRIPTION:
+*       The function will initialize the CPU interface parameters that must
+*       be initialize before any BUS activity towards the DDR interface,
+*       which means it must be executed from ROM. Because of that, the function
+*       is implemented in assembly code.
+*       The function configure the following CPU config register parameters:
+*       1) CPU2MbusLTickDrv
+*       2) CPU2MbusLTickSample.
+*       NOTE: This function must be called AFTER the internal register
+*       base is modified to INTER_REGS_BASE.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*       r11 holds return function address.
+*******************************************************************************/
+#define MV88F6281_PCKG_OPT	2
+#define MV88F6192_PCKG_OPT	1
+#define MV88F6180_PCKG_OPT	0
+
+	.globl _mvCpuIfPreInit
+_mvCpuIfPreInit:
+
+        mov     r11, LR     		/* Save link register */
+
+	/* Read device ID  */
+	MV_CTRL_MODEL_GET_ASM(r4, r5);
+
+        /* goto calcConfigReg if device is 6281 */
+        ldr     r5, =MV88F6281_PCKG_OPT
+        cmp     r4, r5
+        beq     calcConfigReg
+
+        /* goto calcConfigReg if device is 6192 */
+        ldr     r5, =MV88F6192_PCKG_OPT
+        cmp     r4, r5
+        beq     calcConfigReg
+
+        /* Else 6180 */
+        /* Get the "sample on reset" register */
+	MV_REG_READ_ASM (r4, r5, MPP_SAMPLE_AT_RESET)
+        ldr    r5, =MSAR_CPUCLCK_MASK
+        and    r5, r4, r5
+	mov    r5, r5, lsr #MSAR_CPUCLCK_OFFS
+
+        ldr    r4, =CPU_2_MBUSL_DDR_CLK_1x2
+        cmp    r5, #CPU_2_DDR_CLK_1x2
+        beq    setConfigReg
+
+        ldr    r4, =CPU_2_MBUSL_DDR_CLK_1x3
+        cmp    r5, #CPU_2_DDR_CLK_1x3
+        beq    setConfigReg
+
+        ldr    r4, =CPU_2_MBUSL_DDR_CLK_1x3
+        cmp    r5, #CPU_2_DDR_CLK_1x3_1
+        beq    setConfigReg
+
+        ldr    r4, =CPU_2_MBUSL_DDR_CLK_1x4
+        cmp    r5, #CPU_2_DDR_CLK_1x4_1
+        beq    setConfigReg
+        b    setConfigReg
+
+calcConfigReg:
+        /* Get the "sample on reset" register */
+	MV_REG_READ_ASM (r4, r5, MPP_SAMPLE_AT_RESET)
+        ldr    r5, =MSAR_DDRCLCK_RTIO_MASK
+        and    r5, r4, r5
+	mov    r5, r5, lsr #MSAR_DDRCLCK_RTIO_OFFS
+
+        ldr    r4, =CPU_2_MBUSL_DDR_CLK_1x2
+        cmp    r5, #CPU_2_DDR_CLK_1x2
+        beq    setConfigReg
+
+        ldr    r4, =CPU_2_MBUSL_DDR_CLK_1x3
+        cmp    r5, #CPU_2_DDR_CLK_1x3
+        beq    setConfigReg
+
+        ldr    r4, =CPU_2_MBUSL_DDR_CLK_1x4
+        cmp    r5, #CPU_2_DDR_CLK_1x4
+        beq    setConfigReg
+
+        /* Else */
+        ldr    r4, =0
+
+setConfigReg:
+        /* Read CPU Config register */
+        MV_REG_READ_ASM (r7, r5, CPU_CONFIG_REG)
+        ldr    r5, =~(CCR_CPU_2_MBUSL_TICK_DRV_MASK | CCR_CPU_2_MBUSL_TICK_SMPL_MASK)
+        and    r7, r7, r5       /* Clear register fields */
+        orr    r7, r7, r4       /* Set the values according to the findings */
+        MV_REG_WRITE_ASM (r7, r5, CPU_CONFIG_REG)
+
+done:
+        mov     PC, r11         /* r11 is saved link register */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/dove_family/boardEnv/mvBoardEnvSpec.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/dove_family/boardEnv/mvBoardEnvSpec.h
@@ -0,0 +1,182 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#ifndef __INCmvBoardEnvSpech
+#define __INCmvBoardEnvSpech
+
+#include "mvSysHwConfig.h"
+
+
+/* For future use */
+#define BD_ID_DATA_START_OFFS		0x0
+#define BD_DETECT_SEQ_OFFS		0x0
+#define BD_SYS_NUM_OFFS			0x4
+#define BD_NAME_OFFS			0x8
+
+/* I2C bus addresses */
+#define MV_BOARD_CTRL_I2C_ADDR			0x0     /* Controller slave addr */
+#define MV_BOARD_CTRL_I2C_ADDR_TYPE 		ADDR7_BIT
+#define MV_BOARD_DIMM0_I2C_ADDR			0x56
+#define MV_BOARD_DIMM0_I2C_ADDR_TYPE 		ADDR7_BIT
+#define MV_BOARD_DIMM1_I2C_ADDR			0x54
+#define MV_BOARD_DIMM1_I2C_ADDR_TYPE 		ADDR7_BIT
+#define MV_BOARD_EEPROM_I2C_ADDR	    	0x51
+#define MV_BOARD_EEPROM_I2C_ADDR_TYPE 		ADDR7_BIT
+#define MV_BOARD_MAIN_EEPROM_I2C_ADDR	   	0x50
+#define MV_BOARD_MAIN_EEPROM_I2C_ADDR_TYPE 	ADDR7_BIT
+#define MV_BOARD_MUX_I2C_ADDR_ENTRY		0x2
+#define MV_BOARD_DIMM_I2C_CHANNEL		0x0
+
+#define BOOT_FLASH_INDEX			0
+#define MAIN_FLASH_INDEX			1
+
+
+
+
+#define MV_BOARD_SYSCLK_100MHZ	100000000   
+#define MV_BOARD_SYSCLK_125MHZ	125000000  
+#define MV_BOARD_SYSCLK_133MHZ	133333333   
+#define MV_BOARD_SYSCLK_150MHZ	150000000  
+#define MV_BOARD_SYSCLK_166MHZ	166666667   
+#define MV_BOARD_SYSCLK_200MHZ	200000000   
+#define MV_BOARD_SYSCLK_233MHZ	233333333   
+#define MV_BOARD_SYSCLK_250MHZ	250000000   
+#define MV_BOARD_SYSCLK_266MHZ	266666667
+
+
+/* Board specific */
+/* =============================== */
+
+/* boards ID numbers */
+
+#define BOARD_ID_BASE           		0x0
+
+/* New board ID numbers */
+#define DB_88F6781_BP_ID			(BOARD_ID_BASE+0x0)
+#define DB_88F6781_BP_MLL_ID			1788
+#define RD_88F6781_ID				(BOARD_ID_BASE+0x1)
+#define RD_88F6781_MLL_ID			1789
+#define RD_88F6781_AVNG_ID			(BOARD_ID_BASE+0x2)
+#define RD_88F6781_AVNG_MLL_ID			1790
+#define DB_88F6781Y0_BP_ID			(BOARD_ID_BASE+0x3)
+/* reusing the board ID pased to Linux - same as DB-Z0 board */
+#define DB_88F6781Y0_BP_MLL_ID			1788
+#define BOARD_ID_88F6781_MAX			(BOARD_ID_BASE+0x4)
+#define MV_MAX_BOARD_ID 			BOARD_ID_88F6781_MAX
+
+/* DB-88F6781-BP Z0 */
+#define DB_88F6781_MPP0_7                   	0x00000000
+#define DB_88F6781_MPP8_15                   	0x00442000
+#define DB_88F6781_MPP16_23                   	0x22220033
+#define DB_88F6781_MPP24_31                   	0x00000000
+#define DB_88F6781_MPP32_39                   	0x00000000
+#define DB_88F6781_MPP40_47                   	0x00000000
+#define DB_88F6781_MPP48_55                   	0x00000000
+#define DB_88F6781_OE_LOW                       (~((BIT0)|(BIT8)|(BIT14)|(BIT15)|(BIT18)|(BIT19)))
+#define DB_88F6781_OE_HIGH                      0xFFFFFFFF
+#define DB_88F6781_OE_VAL_LOW                   0x1
+#define DB_88F6781_OE_VAL_HIGH                  0x0
+
+/* DB-88F6781-BP Y0 */
+#define DB_88F6781Y0_MPP0_7			0x00000033
+#define DB_88F6781Y0_MPP8_15			0x00442000
+#define DB_88F6781Y0_MPP16_23			0x66664040
+#define DB_88F6781Y0_MPP24_31			0x11111111
+#define DB_88F6781Y0_MPP32_39			0x11111111
+#define DB_88F6781Y0_MPP40_47			0x11111111
+#define DB_88F6781Y0_MPP48_55			0x11111111
+#define DB_88F6781Y0_MPP56_63			0x00111111
+#define DB_88F6781Y0_OE_LOW		(~((BIT2)|(BIT5)|(BIT7)|(BIT8)|(BIT10)|(BIT14)|(BIT15)|(BIT16)|(BIT18)|(BIT19)))
+#define DB_88F6781Y0_OE_HIGH		(~((BIT30)|(BIT31)))
+#define DB_88F6781Y0_OE_VAL_LOW			0x000509A4
+#define DB_88F6781Y0_OE_VAL_HIGH		0x0
+
+/* RD-88F6781 */
+#define RD_88F6781_MPP0_7                   	0x00000000
+#define RD_88F6781_MPP8_15                   	0x00002000
+#define RD_88F6781_MPP16_23                   	0x22220033
+#define RD_88F6781_MPP24_31                   	0x00000000
+#define RD_88F6781_MPP32_39                   	0x00000000
+#define RD_88F6781_MPP40_47                   	0x00000000
+#define RD_88F6781_MPP48_55                   	0x00000000
+#define RD_88F6781_OE_LOW                       (~(BIT8))
+#define RD_88F6781_OE_HIGH                      0xFFFFFFFF
+#define RD_88F6781_OE_VAL_LOW                   0x0
+#define RD_88F6781_OE_VAL_HIGH                  0x0
+
+/* RD-88F6781_AVNG */
+#define RD_88F6781_AVNG_MPP0_7                  0x00000000
+#define RD_88F6781_AVNG_MPP8_15                 0x00000000
+#define RD_88F6781_AVNG_MPP16_23                0x22220033
+#define RD_88F6781_AVNG_MPP24_31                0x00000000
+#define RD_88F6781_AVNG_MPP32_39                0x00000000
+#define RD_88F6781_AVNG_MPP40_47                0x00000000
+#define RD_88F6781_AVNG_MPP48_55                0x00000000
+#define RD_88F6781_AVNG_OE_LOW                  (~((BIT2)|(BIT5)|(BIT6)|(BIT18)))
+#define RD_88F6781_AVNG_OE_HIGH                 (~((BIT20)|(BIT23)|(BIT25)|(BIT30)|(BIT31)))
+#define RD_88F6781_AVNG_OE_VAL_LOW              0x00040004
+#define RD_88F6781_AVNG_OE_VAL_HIGH             0xC2900000
+
+#endif /* __INCmvBoardEnvSpech */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/dove_family/boardEnv/mvBoardEnvLib.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/dove_family/boardEnv/mvBoardEnvLib.h
@@ -0,0 +1,367 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+#ifndef __INCmvBoardEnvLibh
+#define __INCmvBoardEnvLibh
+
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "mvSysHwConfig.h"
+//#include "boardEnv/mvBoardEnvSpec.h"
+
+
+/* DUART stuff for Tclk detection only */
+#define DUART_BAUD_RATE			115200
+
+#define BOARD_ETH_PORT_NUM		MV_ETH_MAX_PORTS
+#define BOARD_ETH_SWITCH_PORT_NUM	5
+
+#define	MV_BOARD_MAX_USB_IF		1
+#define MV_BOARD_MAX_MPP		7
+#define MV_BOARD_NAME_LEN  		0x20
+
+typedef struct _boardData
+{
+   MV_U32 magic;
+   MV_U16 boardId;
+   MV_U8 boardVer;
+   MV_U8 boardRev;
+   MV_U32 reserved1;
+   MV_U32 reserved2;
+
+}BOARD_DATA;
+
+typedef enum _devBoardMppGroupClass
+{
+	MV_BOARD_MPP_GROUP_1,
+	MV_BOARD_MPP_GROUP_2,
+	MV_BOARD_MAX_MPP_GROUP
+}MV_BOARD_MPP_GROUP_CLASS;
+
+typedef enum _devBoardMppTypeClass
+{
+	MV_BOARD_AUTO,
+	MV_BOARD_TDM,
+	MV_BOARD_AUDIO,
+	MV_BOARD_RGMII,
+	MV_BOARD_GMII,
+	MV_BOARD_TS,
+	MV_BOARD_OTHER
+}MV_BOARD_MPP_TYPE_CLASS;
+
+typedef enum _devBoardModuleIdClass
+{
+	MV_BOARD_MODULE_TDM_ID = 1,
+	MV_BOARD_MODULE_AUDIO_ID,
+	MV_BOARD_MODULE_RGMII_ID,
+	MV_BOARD_MODULE_GMII_ID,
+	MV_BOARD_MODULE_TS_ID,
+	MV_BOARD_MODULE_OTHER_ID
+}MV_BOARD_MODULE_ID_CLASS;
+
+typedef struct _boardMppTypeInfo
+{
+	MV_BOARD_MPP_TYPE_CLASS	boardMppGroup1;
+	MV_BOARD_MPP_TYPE_CLASS	boardMppGroup2;
+
+}MV_BOARD_MPP_TYPE_INFO;
+
+
+typedef enum _devBoardClass
+{
+	BOARD_DEV_NOR_FLASH,
+	BOARD_DEV_NAND_FLASH,
+	BOARD_DEV_SEVEN_SEG,
+	BOARD_DEV_FPGA,
+	BOARD_DEV_SRAM,
+	BOARD_DEV_SPI_FLASH,
+	BOARD_DEV_GPS,
+	BOARD_DEV_OTHER,
+}MV_BOARD_DEV_CLASS;
+
+typedef enum _devTwsiBoardClass
+{
+	BOARD_TWSI_RTC,
+	BOARD_DEV_TWSI_EXP,
+	BOARD_DEV_TWSI_SATR,
+	BOARD_TWSI_AUDIO_DEC,
+	BOARD_TWSI_BATT_CHARGER,
+	BOARD_TWSI_CAM,
+	BOARD_TWSI_OTHER
+}MV_BOARD_TWSI_CLASS;
+	
+typedef enum _devGppBoardClass
+{
+	BOARD_GPP_RTC,
+	BOARD_GPP_MV_SWITCH,
+	BOARD_GPP_USB_VBUS,
+	BOARD_GPP_USB_VBUS_EN,
+	BOARD_GPP_USB_OC,
+	BOARD_GPP_USB_HOST_DEVICE,
+	BOARD_GPP_REF_CLCK,
+	BOARD_GPP_VOIP_SLIC,
+	BOARD_GPP_LIFELINE,
+	BOARD_GPP_BUTTON,
+	BOARD_GPP_TS_BUTTON_C,
+	BOARD_GPP_TS_BUTTON_U,
+	BOARD_GPP_TS_BUTTON_D,
+	BOARD_GPP_TS_BUTTON_L,
+	BOARD_GPP_TS_BUTTON_R,
+	BOARD_GPP_TS1_BUTTON_C,
+	BOARD_GPP_TS1_BUTTON_U,
+	BOARD_GPP_TS1_BUTTON_D,
+	BOARD_GPP_TS1_BUTTON_L,
+	BOARD_GPP_TS1_BUTTON_R,
+	BOARD_GPP_POWER_BUTTON,
+	BOARD_GPP_RESTOR_BUTTON,
+	BOARD_GPP_WPS_BUTTON,
+	BOARD_GPP_HDD0_POWER,
+	BOARD_GPP_HDD1_POWER,
+	BOARD_GPP_FAN_POWER,
+	BOARD_GPP_RESET,
+	BOARD_GPP_POWER_ON_LED,
+	BOARD_GPP_HDD_POWER,
+        BOARD_GPP_SDIO_POWER,
+        BOARD_GPP_SDIO_DETECT,
+	BOARD_GPP_SWITCH_PHY_INT,
+	BOARD_GPP_TSU_DIRCTION,
+	BOARD_GPP_OTHER
+}MV_BOARD_GPP_CLASS;
+
+
+typedef struct _devCsInfo
+{
+    MV_U8		deviceCS;
+    MV_U32		params;
+    MV_U32		devClass;	/* MV_BOARD_DEV_CLASS */
+    MV_U8		devWidth;
+
+}MV_DEV_CS_INFO;
+
+
+#define MV_BOARD_PHY_FORCE_10MB		0x0
+#define MV_BOARD_PHY_FORCE_100MB	0x1
+#define MV_BOARD_PHY_FORCE_1000MB	0x2
+#define MV_BOARD_PHY_SPEED_AUTO		0x3
+
+typedef struct _boardSwitchInfo
+{
+	MV_32	linkStatusIrq;
+	MV_32	qdPort[BOARD_ETH_SWITCH_PORT_NUM];
+	MV_32	qdCpuPort;
+	MV_32	smiScanMode; /* 1 for SMI_MANUAL_MODE, 0 otherwise */
+
+}MV_BOARD_SWITCH_INFO;
+
+typedef struct _boardLedInfo
+{
+	MV_U8	activeLedsNumber;
+	MV_U8	ledsPolarity;	/* '0' or '1' to turn on led */
+	MV_U8*	gppPinNum; 	/* Pointer to GPP values */
+
+}MV_BOARD_LED_INFO;
+
+typedef struct _boardGppInfo
+{
+	MV_BOARD_GPP_CLASS	devClass;
+	MV_U8	gppPinNum;
+
+}MV_BOARD_GPP_INFO;
+
+
+typedef struct _boardTwsiInfo
+{
+	MV_BOARD_TWSI_CLASS	devClass;
+	MV_U8	twsiDevAddr;
+	MV_U8	twsiDevAddrType;
+
+}MV_BOARD_TWSI_INFO;
+
+
+typedef enum _boardMacSpeed
+{
+	BOARD_MAC_SPEED_10M,
+	BOARD_MAC_SPEED_100M,
+	BOARD_MAC_SPEED_1000M,
+	BOARD_MAC_SPEED_AUTO,
+
+}MV_BOARD_MAC_SPEED;
+
+typedef struct _boardMacInfo
+{
+	MV_BOARD_MAC_SPEED	boardMacSpeed;
+	MV_U8	boardEthSmiAddr;
+
+}MV_BOARD_MAC_INFO;
+
+typedef struct _boardMppInfo
+{
+	MV_U32		mppGroup[MV_BOARD_MAX_MPP];
+
+}MV_BOARD_MPP_INFO;
+
+typedef struct _boardInfo
+{
+	char 			   	boardName[MV_BOARD_NAME_LEN];
+	MV_U8				numBoardMppTypeValue;
+	MV_BOARD_MPP_TYPE_INFO*		pBoardMppTypeValue;
+	MV_U8				numBoardMppConfigValue;
+	MV_BOARD_MPP_INFO*		pBoardMppConfigValue;
+    	MV_U32				intsGppMaskLow;
+	MV_U32				intsGppMaskHigh;
+	MV_U8				numBoardDeviceIf;
+    	MV_DEV_CS_INFO*			pDevCsInfo;
+	MV_U8				numBoardTwsiDev;
+	MV_BOARD_TWSI_INFO*		pBoardTwsiDev;
+	MV_U8				numBoardMacInfo;
+	MV_BOARD_MAC_INFO*		pBoardMacInfo;
+	MV_U8				numBoardGppInfo;
+	MV_BOARD_GPP_INFO*		pBoardGppInfo;
+    	MV_U8				activeLedsNumber;
+	MV_U8*				pLedGppPin;
+	MV_U8				ledsPolarity;	/* '0' or '1' to turn on led */
+	/* GPP values */
+	MV_U32				gppOutEnValLow;
+	MV_U32				gppOutEnValHigh;
+	MV_U32				gppOutValLow;
+	MV_U32				gppOutValHigh;
+	MV_U32				gppPolarityValLow;
+	MV_U32				gppPolarityValHigh;
+	/* Switch Configuration */
+	MV_BOARD_SWITCH_INFO*		pSwitchInfo;
+}MV_BOARD_INFO;
+
+
+MV_VOID 	mvBoardEnvInit(MV_VOID);
+MV_U32      	mvBoardIdGet(MV_VOID);
+MV_U16      	mvBoardModelGet(MV_VOID);
+MV_U16      	mvBoardRevGet(MV_VOID);
+MV_STATUS	mvBoardNameGet(char *pNameBuff);
+MV_32      	mvBoardPhyAddrGet(MV_U32 ethPortNum);
+MV_BOARD_MAC_SPEED      mvBoardMacSpeedGet(MV_U32 ethPortNum);
+MV_32		mvBoardLinkStatusIrqGet(MV_U32 ethPortNum);
+MV_32		mvBoardSwitchPortGet(MV_U32 ethPortNum, MV_U8 boardPortNum);
+MV_32		mvBoardSwitchCpuPortGet(MV_U32 ethPortNum);
+MV_32		mvBoardSmiScanModeGet(MV_U32 ethPortNum);
+MV_BOOL     	mvBoardIsPortInSgmii(MV_U32 ethPortNum);
+MV_U32 		mvBoardTclkGet(MV_VOID);
+MV_U32      	mvBoardSysClkGet(MV_VOID);
+MV_U32 		mvBoardDebugLedNumGet(MV_U32 boardId);
+MV_VOID     	mvBoardDebugLed(MV_U32 hexNum);
+MV_32      	mvBoardMppGet(MV_U32 mppGroupNum);
+
+
+MV_U8		mvBoardTwsiChanNumGet(MV_U8 unit, MV_BOARD_TWSI_CLASS twsiClass);
+MV_U8		mvBoardTwsiAddrTypeGet(MV_U8 unit, MV_BOARD_TWSI_CLASS twsiClass);
+MV_U8		mvBoardTwsiAddrGet(MV_U8 unit, MV_BOARD_TWSI_CLASS twsiClass);
+
+
+MV_U8		mvBoardRtcTwsiAddrTypeGet(MV_VOID);
+MV_U8		mvBoardRtcTwsiAddrGet(MV_VOID);
+
+MV_U8		mvBoardA2DTwsiChanNumGet(MV_U8 unit);
+MV_U8		mvBoardA2DTwsiAddrTypeGet(MV_U8 unit);
+MV_U8		mvBoardA2DTwsiAddrGet(MV_U8 unit);
+
+MV_U8		mvBoardCamTwsiChanNumGet(MV_U8 unit);
+MV_U8		mvBoardCamTwsiAddrTypeGet(MV_U8 unit);
+MV_U8		mvBoardCamTwsiAddrGet(MV_U8 unit);
+
+
+
+MV_U8 		mvBoardTwsiExpAddrGet(MV_U32 index);
+MV_U8 		mvBoardTwsiExpAddrTypeGet(MV_U32 index);
+MV_BOARD_MODULE_ID_CLASS 	mvBoarModuleTypeGet(MV_BOARD_MPP_GROUP_CLASS devClass);
+MV_BOARD_MPP_TYPE_CLASS 	mvBoardMppGroupTypeGet(MV_BOARD_MPP_GROUP_CLASS mppGroupClass);
+MV_VOID 	mvBoardMppGroupTypeSet(MV_BOARD_MPP_GROUP_CLASS mppGroupClass,
+					MV_BOARD_MPP_TYPE_CLASS mppGroupType);
+MV_VOID 	mvBoardMppGroupIdUpdate(MV_VOID);
+MV_VOID 	mvBoardMppModuleTypePrint(MV_VOID);
+MV_VOID	    	mvBoardReset(MV_VOID);
+MV_U8 		mvBoarTwsiSatRGet(MV_U8 devNum, MV_U8 regNum);
+MV_STATUS 	mvBoarTwsiSatRSet(MV_U8 devNum, MV_U8 regNum, MV_U8 regVal);
+MV_BOOL 	mvBoardSpecInitGet(MV_U32* regOff, MV_U32* data);
+/* Board devices API managments */
+MV_32  	    mvBoardGetDevicesNumber(MV_BOARD_DEV_CLASS devClass);
+MV_32  	    mvBoardGetDeviceBaseAddr(MV_32 devNum, MV_BOARD_DEV_CLASS devClass);
+MV_32	    mvBoardGetDeviceBusWidth(MV_32 devNum, MV_BOARD_DEV_CLASS devClass);
+MV_32  	    mvBoardGetDeviceWidth(MV_32 devNum, MV_BOARD_DEV_CLASS devClass);
+MV_32  	    mvBoardGetDeviceWinSize(MV_32 devNum, MV_BOARD_DEV_CLASS devClass);
+
+/* Gpio Pin Connections API */
+MV_32 	    mvBoardUSBVbusGpioPinGet(int devId);
+MV_32 	    mvBoardUSBVbusEnGpioPinGet(int devId);
+MV_U32      mvBoardPexBridgeIntPinGet(MV_U32 devNum, MV_U32 intPin);
+
+MV_32	    mvBoardResetGpioPinGet(MV_VOID);
+MV_32 	    mvBoardRTCGpioPinGet(MV_VOID);
+MV_32 	    mvBoardGpioIntMaskLowGet(MV_VOID);
+MV_32 	    mvBoardGpioIntMaskHighGet(MV_VOID);
+MV_32 	    mvBoardSlicGpioPinGet(MV_U32 slicNum);
+
+MV_32	    mvBoardSDIOGpioPinGet(MV_VOID);
+MV_32	    mvBoarGpioPinNumGet(MV_BOARD_GPP_CLASS class, MV_U32 index);
+
+MV_32 	    mvBoardNandWidthGet(void);
+
+MV_32       mvBoardDdrTypeGet(void);
+#endif /* __INCmvBoardEnvLibh */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/dove_family/boardEnv/mvBoardEnvSpec.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/dove_family/boardEnv/mvBoardEnvSpec.c
@@ -0,0 +1,433 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+#include "mvCommon.h"
+#include "mvBoardEnvLib.h"
+#include "mvBoardEnvSpec.h"
+#include "twsi/mvTwsi.h"
+
+#define DB_88F6781_BOARD_PCI_IF_NUM		0x0
+#define DB_88F6781_BOARD_TWSI_DEF_NUM		0x5
+#define DB_88F6781_BOARD_MAC_INFO_NUM		0x1
+#define DB_88F6781_BOARD_GPP_INFO_NUM		0xA
+#define DB_88F6781_BOARD_MPP_CONFIG_NUM		0x1
+#define DB_88F6781_BOARD_MPP_GROUP_TYPE_NUM	0x1
+#define DB_88F6781_BOARD_DEVICE_CONFIG_NUM	0x1
+#define DB_88F6781_BOARD_DEBUG_LED_NUM		0x4
+
+MV_U8	db88f6781InfoBoardDebugLedIf[] =
+	{14,15,18,19};
+
+MV_BOARD_TWSI_INFO	db88f6781InfoBoardTwsiDev[] =
+	/* {{MV_BOARD_DEV_CLASS	devClass, MV_U8	twsiDevAddr, MV_U8 twsiDevAddrType}} */
+	{
+	{BOARD_DEV_TWSI_EXP, 0x20, ADDR7_BIT},
+	{BOARD_DEV_TWSI_EXP, 0x21, ADDR7_BIT},
+	{BOARD_DEV_TWSI_EXP, 0x27, ADDR7_BIT},
+	{BOARD_TWSI_AUDIO_DEC, 0x4A, ADDR7_BIT}, 
+	{BOARD_TWSI_BATT_CHARGER, 0x09, ADDR7_BIT}, 
+	};
+
+MV_BOARD_MAC_INFO db88f6781InfoBoardMacInfo[] = 
+	/* {{MV_BOARD_MAC_SPEED	boardMacSpeed, MV_U8 boardEthSmiAddr}} */
+	{
+	{BOARD_MAC_SPEED_AUTO, 0x8}
+	}; 
+
+MV_BOARD_MPP_TYPE_INFO db88f6781InfoBoardMppTypeInfo[] = 
+	/* {{MV_BOARD_MPP_TYPE_CLASS	boardMppGroup1,
+ 		MV_BOARD_MPP_TYPE_CLASS	boardMppGroup2}} */
+	{{MV_BOARD_AUTO, MV_BOARD_AUTO}
+	}; 
+
+MV_BOARD_GPP_INFO db88f6781InfoBoardGppInfo[] = 
+	/* {{MV_BOARD_GPP_CLASS	devClass, MV_U8	gppPinNum}} */
+	{
+	/* TODO check which is L...*/
+	{BOARD_GPP_TS_BUTTON_C, 14},
+	{BOARD_GPP_TS_BUTTON_U, 15},
+	{BOARD_GPP_TS_BUTTON_R, 18},
+	{BOARD_GPP_TS_BUTTON_L, 19},
+	{BOARD_GPP_TS_BUTTON_D, 52},
+
+	{BOARD_GPP_TS1_BUTTON_C, 53},
+	{BOARD_GPP_TS1_BUTTON_U, 54},
+	{BOARD_GPP_TS1_BUTTON_R, 55},
+	{BOARD_GPP_TS1_BUTTON_L, 56},
+	{BOARD_GPP_TS1_BUTTON_D, 57}
+	};
+
+MV_BOARD_MPP_INFO	db88f6781InfoBoardMppConfigValue[] = 
+	{{{
+	DB_88F6781_MPP0_7,		
+	DB_88F6781_MPP8_15,		
+	DB_88F6781_MPP16_23	
+	}}};
+
+MV_DEV_CS_INFO db88f6781InfoBoardDevCsInfo[] = 
+		/*{deviceCS, params, devType, devWidth}*/			   
+		{
+		 {0, N_A, BOARD_DEV_SPI_FLASH, 8}
+		};
+
+
+MV_BOARD_INFO db88f6781Info = {
+	"DB-88F6781-BP",				/* boardName[MAX_BOARD_NAME_LEN] */
+	DB_88F6781_BOARD_MPP_GROUP_TYPE_NUM,		/* numBoardMppGroupType */
+	db88f6781InfoBoardMppTypeInfo,
+	DB_88F6781_BOARD_MPP_CONFIG_NUM,		/* numBoardMppConfig */
+	db88f6781InfoBoardMppConfigValue,
+	0,						/* intsGppMaskLow */
+	0,						/* intsGppMaskHigh */
+	DB_88F6781_BOARD_DEVICE_CONFIG_NUM,		/* numBoardDevIf */
+	db88f6781InfoBoardDevCsInfo,
+	DB_88F6781_BOARD_TWSI_DEF_NUM,			/* numBoardTwsiDev */
+	db88f6781InfoBoardTwsiDev,					
+	DB_88F6781_BOARD_MAC_INFO_NUM,			/* numBoardMacInfo */
+	db88f6781InfoBoardMacInfo,
+	DB_88F6781_BOARD_GPP_INFO_NUM,			/* numBoardGppInfo */
+	db88f6781InfoBoardGppInfo,
+	DB_88F6781_BOARD_DEBUG_LED_NUM,			/* activeLedsNumber */              
+	db88f6781InfoBoardDebugLedIf,
+	1,						/* ledsPolarity */		
+	DB_88F6781_OE_LOW,				/* gppOutEnLow */
+	DB_88F6781_OE_HIGH,				/* gppOutEnHigh */
+	DB_88F6781_OE_VAL_LOW,				/* gppOutValLow */
+	DB_88F6781_OE_VAL_HIGH,				/* gppOutValHigh */
+	0,						/* gppPolarityValLow */
+	0, 						/* gppPolarityValHigh */
+	NULL						/* pSwitchInfo */
+};
+
+
+#define DB_88F6781Y0_BOARD_PCI_IF_NUM		0x0
+#define DB_88F6781Y0_BOARD_TWSI_DEF_NUM		0x7
+#define DB_88F6781Y0_BOARD_MAC_INFO_NUM		0x1
+#define DB_88F6781Y0_BOARD_GPP_INFO_NUM		0x0
+#define DB_88F6781Y0_BOARD_MPP_CONFIG_NUM	0x1
+#define DB_88F6781Y0_BOARD_MPP_GROUP_TYPE_NUM	0x1
+#define DB_88F6781Y0_BOARD_DEVICE_CONFIG_NUM	0x1
+#define DB_88F6781Y0_BOARD_DEBUG_LED_NUM	0x4
+
+MV_U8	db88f6781Y0InfoBoardDebugLedIf[] =
+	{14,15,62,63};
+
+/* TODO, see if need to add more */
+MV_BOARD_TWSI_INFO	db88f6781Y0InfoBoardTwsiDev[] =
+	/* {{MV_BOARD_DEV_CLASS	devClass, MV_U8	twsiDevAddr, MV_U8 twsiDevAddrType}} */
+	{
+	{BOARD_DEV_TWSI_EXP, 0x20, ADDR7_BIT},
+	{BOARD_DEV_TWSI_EXP, 0x21, ADDR7_BIT},
+	{BOARD_DEV_TWSI_EXP, 0x27, ADDR7_BIT},
+	{BOARD_DEV_TWSI_SATR, 0x4C, ADDR7_BIT}, 
+	{BOARD_DEV_TWSI_SATR, 0x4D, ADDR7_BIT},
+	{BOARD_DEV_TWSI_SATR, 0x4E, ADDR7_BIT},
+	{BOARD_TWSI_BATT_CHARGER, 0x09, ADDR7_BIT}, 
+	};
+
+MV_BOARD_MAC_INFO db88f6781Y0InfoBoardMacInfo[] = 
+	/* {{MV_BOARD_MAC_SPEED	boardMacSpeed, MV_U8 boardEthSmiAddr}} */
+	{
+	{BOARD_MAC_SPEED_AUTO, 0x8}
+	}; 
+
+MV_BOARD_MPP_TYPE_INFO db88f6781Y0InfoBoardMppTypeInfo[] = 
+	/* {{MV_BOARD_MPP_TYPE_CLASS	boardMppGroup1,
+ 		MV_BOARD_MPP_TYPE_CLASS	boardMppGroup2}} */
+	{{MV_BOARD_AUTO, MV_BOARD_AUTO}
+	}; 
+
+MV_BOARD_GPP_INFO db88f6781Y0InfoBoardGppInfo[] = 
+	/* {{MV_BOARD_GPP_CLASS	devClass, MV_U8	gppPinNum}} */
+	{
+	/* TODO */
+	};
+
+MV_BOARD_MPP_INFO	db88f6781Y0InfoBoardMppConfigValue[] = 
+	{{{
+	DB_88F6781Y0_MPP0_7,		
+	DB_88F6781Y0_MPP8_15,		
+	DB_88F6781Y0_MPP16_23	
+	}}};
+
+MV_DEV_CS_INFO db88f6781Y0InfoBoardDevCsInfo[] = 
+		/*{deviceCS, params, devType, devWidth}*/			   
+		{
+		 {0, N_A, BOARD_DEV_SPI_FLASH, 8} 
+		 /* TODO {1, N_A, BOARD_DEV_GPS, 8} */
+		};
+
+
+MV_BOARD_INFO db88f6781Y0Info = {
+	"DB-88F6781Y0-BP",				/* boardName[MAX_BOARD_NAME_LEN] */
+	DB_88F6781Y0_BOARD_MPP_GROUP_TYPE_NUM,		/* numBoardMppGroupType */
+	db88f6781Y0InfoBoardMppTypeInfo,
+	DB_88F6781Y0_BOARD_MPP_CONFIG_NUM,		/* numBoardMppConfig */
+	db88f6781Y0InfoBoardMppConfigValue,
+	0,						/* intsGppMaskLow */
+	0,						/* intsGppMaskHigh */
+	DB_88F6781Y0_BOARD_DEVICE_CONFIG_NUM,		/* numBoardDevIf */
+	db88f6781Y0InfoBoardDevCsInfo,
+	DB_88F6781Y0_BOARD_TWSI_DEF_NUM,		/* numBoardTwsiDev */
+	db88f6781Y0InfoBoardTwsiDev,					
+	DB_88F6781Y0_BOARD_MAC_INFO_NUM,		/* numBoardMacInfo */
+	db88f6781Y0InfoBoardMacInfo,
+	DB_88F6781Y0_BOARD_GPP_INFO_NUM,		/* numBoardGppInfo */
+	db88f6781Y0InfoBoardGppInfo,
+	DB_88F6781Y0_BOARD_DEBUG_LED_NUM,		/* activeLedsNumber */              
+	db88f6781Y0InfoBoardDebugLedIf,
+	1,						/* ledsPolarity */		
+	DB_88F6781Y0_OE_LOW,				/* gppOutEnLow */
+	DB_88F6781Y0_OE_HIGH,				/* gppOutEnHigh */
+	DB_88F6781Y0_OE_VAL_LOW,			/* gppOutValLow */
+	DB_88F6781Y0_OE_VAL_HIGH,			/* gppOutValHigh */
+	0,						/* gppPolarityValLow */
+	0, 						/* gppPolarityValHigh */
+	NULL						/* pSwitchInfo */
+};
+
+
+
+#define RD_88F6781_BOARD_PCI_IF_NUM		0x0
+#define RD_88F6781_BOARD_TWSI_DEF_NUM		0x2
+#define RD_88F6781_BOARD_MAC_INFO_NUM		0x1
+#define RD_88F6781_BOARD_GPP_INFO_NUM		0xA
+#define RD_88F6781_BOARD_MPP_GROUP_TYPE_NUM	0x1
+#define RD_88F6781_BOARD_MPP_CONFIG_NUM		0x1
+#define RD_88F6781_BOARD_DEVICE_CONFIG_NUM	0x1
+#define RD_88F6781_BOARD_DEBUG_LED_NUM		0x1
+
+MV_U8	rd88f6781InfoBoardDebugLedIf[] =
+	{8};
+
+MV_BOARD_MAC_INFO rd88f6781InfoBoardMacInfo[] = 
+	/* {{MV_BOARD_MAC_SPEED	boardMacSpeed, MV_U8 boardEthSmiAddr}} */
+	{
+		{BOARD_MAC_SPEED_AUTO, 0x8}
+	}; 
+
+MV_BOARD_GPP_INFO rd88f6781InfoBoardGppInfo[] = 
+	/* {{MV_BOARD_GPP_CLASS	devClass, MV_U8	gppPinNum}} */
+	{
+	/* TODO check which is L...*/
+	{BOARD_GPP_TS_BUTTON_C, 12},
+	{BOARD_GPP_TS_BUTTON_U, 13},
+	{BOARD_GPP_TS_BUTTON_R, 14},
+	{BOARD_GPP_TS_BUTTON_L, 15},
+	{BOARD_GPP_TS_BUTTON_D, 18},
+
+	{BOARD_GPP_TS1_BUTTON_C, 19},
+	{BOARD_GPP_TS1_BUTTON_U, 52},
+	{BOARD_GPP_TS1_BUTTON_R, 53},
+	{BOARD_GPP_TS1_BUTTON_L, 54},
+	{BOARD_GPP_TS1_BUTTON_D, 55}
+	};
+
+MV_BOARD_TWSI_INFO	rd88f6781InfoBoardTwsiDev[] =
+	/* {{MV_BOARD_DEV_CLASS	devClass, MV_U8	twsiDevAddr, MV_U8 twsiDevAddrType}} */
+	{
+	{BOARD_TWSI_AUDIO_DEC, 0x4A, ADDR7_BIT}, 
+	{BOARD_TWSI_BATT_CHARGER, 0x09, ADDR7_BIT}, 
+	};
+
+MV_BOARD_MPP_TYPE_INFO rd88f6781InfoBoardMppTypeInfo[] = 
+	/* {{MV_BOARD_MPP_TYPE_CLASS	boardMppGroup1,
+ 		MV_BOARD_MPP_TYPE_CLASS	boardMppGroup2}} */
+	{
+	{MV_BOARD_OTHER, MV_BOARD_OTHER} /* TODO */
+	}; 
+
+MV_BOARD_MPP_INFO	rd88f6781InfoBoardMppConfigValue[] = 
+	{{{
+	RD_88F6781_MPP0_7,		
+	RD_88F6781_MPP8_15,		
+	RD_88F6781_MPP16_23	
+	}}};
+
+MV_DEV_CS_INFO rd88f6781InfoBoardDevCsInfo[] = 
+		/*{deviceCS, params, devType, devWidth}*/
+		{
+		 /*{0, N_A, BOARD_DEV_NAND_FLASH, 8},
+		 {1, N_A, BOARD_DEV_NAND_FLASH, 8},
+		 {2, N_A, BOARD_DEV_NAND_FLASH, 8},
+		 {3, N_A, BOARD_DEV_NAND_FLASH, 8},*/
+		 {0, N_A, BOARD_DEV_SPI_FLASH, 8}
+		};
+
+
+MV_BOARD_INFO rd88f6781Info = {
+	"RD-88F6781",					/* boardName[MAX_BOARD_NAME_LEN] */
+	RD_88F6781_BOARD_MPP_GROUP_TYPE_NUM,		/* numBoardMppGroupType */
+	rd88f6781InfoBoardMppTypeInfo,
+	RD_88F6781_BOARD_MPP_CONFIG_NUM,		/* numBoardMppConfig */
+	rd88f6781InfoBoardMppConfigValue,
+	0,						/* intsGppMaskLow */
+	0,						/* intsGppMaskHigh */
+	RD_88F6781_BOARD_DEVICE_CONFIG_NUM,		/* numBoardDevIf */
+	rd88f6781InfoBoardDevCsInfo,
+	RD_88F6781_BOARD_TWSI_DEF_NUM,			/* numBoardTwsiDev */
+	rd88f6781InfoBoardTwsiDev,					
+	RD_88F6781_BOARD_MAC_INFO_NUM,			/* numBoardMacInfo */
+	rd88f6781InfoBoardMacInfo,
+	RD_88F6781_BOARD_GPP_INFO_NUM,			/* numBoardGppInfo */
+	rd88f6781InfoBoardGppInfo,
+	RD_88F6781_BOARD_DEBUG_LED_NUM,			/* activeLedsNumber */              
+	rd88f6781InfoBoardDebugLedIf,
+	1,						/* ledsPolarity */		
+	RD_88F6781_OE_LOW,				/* gppOutEnLow */
+	RD_88F6781_OE_HIGH,				/* gppOutEnHigh */
+	RD_88F6781_OE_VAL_LOW,				/* gppOutValLow */
+	RD_88F6781_OE_VAL_HIGH,				/* gppOutValHigh */
+	0,						/* gppPolarityValLow */
+	0, 						/* gppPolarityValHigh */
+	NULL						/* pSwitchInfo */
+};
+
+#define RD_88F6781_AVNG_BOARD_PCI_IF_NUM		0x0
+#define RD_88F6781_AVNG_BOARD_TWSI_DEF_NUM		0x2
+#define RD_88F6781_AVNG_BOARD_MAC_INFO_NUM		0x1
+#define RD_88F6781_AVNG_BOARD_GPP_INFO_NUM		0x0
+#define RD_88F6781_AVNG_BOARD_MPP_GROUP_TYPE_NUM	0x1
+#define RD_88F6781_AVNG_BOARD_MPP_CONFIG_NUM		0x1
+#define RD_88F6781_AVNG_BOARD_DEVICE_CONFIG_NUM		0x1
+#define RD_88F6781_AVNG_BOARD_DEBUG_LED_NUM		0x0
+
+MV_U8	rd88f6781AvngInfoBoardDebugLedIf[] =
+	{};
+
+MV_BOARD_MAC_INFO rd88f6781AvngInfoBoardMacInfo[] = 
+	/* {{MV_BOARD_MAC_SPEED	boardMacSpeed, MV_U8 boardEthSmiAddr}} */
+	{
+		{BOARD_MAC_SPEED_AUTO, 0x8}
+	}; 
+
+MV_BOARD_GPP_INFO rd88f6781AvngInfoBoardGppInfo[] = 
+	/* {{MV_BOARD_GPP_CLASS	devClass, MV_U8	gppPinNum}} */
+	{
+	};
+
+MV_BOARD_TWSI_INFO	rd88f6781AvngInfoBoardTwsiDev[] =
+	/* {{MV_BOARD_DEV_CLASS	devClass, MV_U8	twsiDevAddr, MV_U8 twsiDevAddrType}} */
+	{
+	{BOARD_TWSI_AUDIO_DEC, 0x4A, ADDR7_BIT}, 
+	{BOARD_TWSI_BATT_CHARGER, 0x09, ADDR7_BIT}, 
+	};
+
+MV_BOARD_MPP_TYPE_INFO rd88f6781AvngInfoBoardMppTypeInfo[] = 
+	/* {{MV_BOARD_MPP_TYPE_CLASS	boardMppGroup1,
+ 		MV_BOARD_MPP_TYPE_CLASS	boardMppGroup2}} */
+	{
+	{MV_BOARD_OTHER, MV_BOARD_OTHER} /* TODO */
+	}; 
+
+MV_BOARD_MPP_INFO	rd88f6781AvngInfoBoardMppConfigValue[] = 
+	{{{
+	RD_88F6781_AVNG_MPP0_7,		
+	RD_88F6781_AVNG_MPP8_15,		
+	RD_88F6781_AVNG_MPP16_23	
+	}}};
+
+MV_DEV_CS_INFO rd88f6781AvngInfoBoardDevCsInfo[] = 
+	/*{deviceCS, params, devType, devWidth}*/
+	{
+		{0, N_A, BOARD_DEV_SPI_FLASH, 8}
+	};
+
+
+MV_BOARD_INFO rd88f6781AvngInfo = {
+	"RD-88F6781-Avengers",				/* boardName[MAX_BOARD_NAME_LEN] */
+	RD_88F6781_AVNG_BOARD_MPP_GROUP_TYPE_NUM,	/* numBoardMppGroupType */
+	rd88f6781AvngInfoBoardMppTypeInfo,
+	RD_88F6781_AVNG_BOARD_MPP_CONFIG_NUM,		/* numBoardMppConfig */
+	rd88f6781AvngInfoBoardMppConfigValue,
+	0,						/* intsGppMaskLow */
+	0,						/* intsGppMaskHigh */
+	RD_88F6781_AVNG_BOARD_DEVICE_CONFIG_NUM,	/* numBoardDevIf */
+	rd88f6781AvngInfoBoardDevCsInfo,
+	RD_88F6781_AVNG_BOARD_TWSI_DEF_NUM,		/* numBoardTwsiDev */
+	rd88f6781AvngInfoBoardTwsiDev,
+	RD_88F6781_AVNG_BOARD_MAC_INFO_NUM,		/* numBoardMacInfo */
+	rd88f6781AvngInfoBoardMacInfo,
+	RD_88F6781_AVNG_BOARD_GPP_INFO_NUM,		/* numBoardGppInfo */
+	rd88f6781AvngInfoBoardGppInfo,
+	RD_88F6781_AVNG_BOARD_DEBUG_LED_NUM,		/* activeLedsNumber */              
+	rd88f6781AvngInfoBoardDebugLedIf,
+	1,						/* ledsPolarity */		
+	RD_88F6781_AVNG_OE_LOW,				/* gppOutEnLow */
+	RD_88F6781_AVNG_OE_HIGH,			/* gppOutEnHigh */
+	RD_88F6781_AVNG_OE_VAL_LOW,			/* gppOutValLow */
+	RD_88F6781_AVNG_OE_VAL_HIGH,			/* gppOutValHigh */
+	0,						/* gppPolarityValLow */
+	0, 						/* gppPolarityValHigh */
+	NULL						/* pSwitchInfo */
+};
+
+
+MV_BOARD_INFO*	boardInfoTbl[] = 	{
+					 &db88f6781Info,
+					 &rd88f6781Info,
+					 &rd88f6781AvngInfo,
+					 &db88f6781Y0Info,
+					};
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/dove_family/boardEnv/mvBoardEnvLib.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/dove_family/boardEnv/mvBoardEnvLib.c
@@ -0,0 +1,1859 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "boardEnv/mvBoardEnvLib.h"
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "cpu/mvCpu.h"
+#include "cntmr/mvCntmr.h"
+#include "gpp/mvGpp.h"
+#include "gpp/mvGppRegs.h"
+#include "twsi/mvTwsi.h"
+#include "pci-if/mvPciIf.h"
+#include "pci-if/pex/mvPex.h"
+#include "device/mvDevice.h"
+#include "ctrlEnv/sys/mvCpuIf.h"
+#include "mvSysHwConfig.h"
+
+/* defines  */
+/* #define MV_DEBUG */
+#ifdef MV_DEBUG
+	#define DB(x)	x
+#else
+	#define DB(x)
+#endif
+
+extern MV_CPU_ARM_CLK _cpuARMDDRCLK[];
+
+#define CODE_IN_ROM		MV_FALSE
+#define CODE_IN_RAM		MV_TRUE
+
+extern	MV_BOARD_INFO*	boardInfoTbl[];
+#define BOARD_INFO(boardId)	boardInfoTbl[boardId - BOARD_ID_BASE]
+
+/* Locals */
+static MV_DEV_CS_INFO*  boardGetDevEntry(MV_32 devNum, MV_BOARD_DEV_CLASS devClass);
+
+MV_U32 tClkRate   = -1;
+
+
+/*******************************************************************************
+* mvBoardEnvInit - Init board
+*
+* DESCRIPTION:
+*		In this function the board environment take care of device bank
+*		initialization.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_VOID mvBoardEnvInit(MV_VOID)
+{
+	MV_U32 boardId = mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("mvBoardEnvInit:Board unknown.\n");
+		return;
+
+	}
+
+	/* Set GPP Out value */
+	MV_REG_WRITE(GPP_DATA_OUT_REG(0), BOARD_INFO(boardId)->gppOutValLow);
+	MV_REG_WRITE(GPP_DATA_OUT_REG(1), BOARD_INFO(boardId)->gppOutValHigh);
+
+	/* set GPP polarity */
+	mvGppPolaritySet(0, 0xFFFFFFFF, BOARD_INFO(boardId)->gppPolarityValLow);
+	mvGppPolaritySet(1, 0xFFFFFFFF, BOARD_INFO(boardId)->gppPolarityValHigh);
+
+	/* Set GPP Out Enable*/
+	mvGppTypeSet(0, 0xFFFFFFFF, BOARD_INFO(boardId)->gppOutEnValLow);
+	mvGppTypeSet(1, 0xFFFFFFFF, BOARD_INFO(boardId)->gppOutEnValHigh);
+}
+
+/*******************************************************************************
+* mvBoardModelGet - Get Board model
+*
+* DESCRIPTION:
+*       This function returns 16bit describing board model.
+*       Board model is constructed of one byte major and minor numbers in the
+*       following manner:
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       String describing board model.
+*
+*******************************************************************************/
+MV_U16 mvBoardModelGet(MV_VOID)
+{
+	return (mvBoardIdGet() >> 16);
+}
+
+/*******************************************************************************
+* mbBoardRevlGet - Get Board revision
+*
+* DESCRIPTION:
+*       This function returns a 32bit describing the board revision.
+*       Board revision is constructed of 4bytes. 2bytes describes major number
+*       and the other 2bytes describes minor munber.
+*       For example for board revision 3.4 the function will return
+*       0x00030004.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       String describing board model.
+*
+*******************************************************************************/
+MV_U16 mvBoardRevGet(MV_VOID)
+{
+	return (mvBoardIdGet() & 0xFFFF);
+}
+
+/*******************************************************************************
+* mvBoardNameGet - Get Board name
+*
+* DESCRIPTION:
+*       This function returns a string describing the board model and revision.
+*       String is extracted from board I2C EEPROM.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       pNameBuff - Buffer to contain board name string. Minimum size 32 chars.
+*
+* RETURN:
+*
+*       MV_ERROR if informantion can not be read.
+*******************************************************************************/
+MV_STATUS mvBoardNameGet(char *pNameBuff)
+{
+	MV_U32 boardId= mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsSPrintf (pNameBuff, "Board unknown.\n");
+		return MV_ERROR;
+
+	}
+
+	mvOsSPrintf (pNameBuff, "%s",BOARD_INFO(boardId)->boardName);
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvBoardIsPortInSgmii -
+*
+* DESCRIPTION:
+*       This routine returns MV_TRUE for port number works in SGMII or MV_FALSE
+*	For all other options.
+*
+* INPUT:
+*       ethPortNum - Ethernet port number.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE - port in SGMII.
+*       MV_FALSE - other.
+*
+*******************************************************************************/
+MV_BOOL mvBoardIsPortInSgmii(MV_U32 ethPortNum)
+{
+    MV_BOOL ethPortSgmiiSupport[BOARD_ETH_PORT_NUM] = MV_ETH_PORT_SGMII;
+
+    if(ethPortNum >= BOARD_ETH_PORT_NUM)
+    {
+	    mvOsPrintf ("Invalid portNo=%d\n", ethPortNum);
+		return MV_FALSE;
+    }
+    return ethPortSgmiiSupport[ethPortNum];
+}
+
+/*******************************************************************************
+* mvBoardPhyAddrGet - Get the phy address
+*
+* DESCRIPTION:
+*       This routine returns the Phy address of a given ethernet port.
+*
+* INPUT:
+*       ethPortNum - Ethernet port number.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       32bit describing Phy address, -1 if the port number is wrong.
+*
+*******************************************************************************/
+MV_32 mvBoardPhyAddrGet(MV_U32 ethPortNum)
+{
+	MV_U32 boardId= mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("mvBoardPhyAddrGet: Board unknown.\n");
+		return MV_ERROR;
+	}
+
+	return BOARD_INFO(boardId)->pBoardMacInfo[ethPortNum].boardEthSmiAddr;
+}
+#if 0
+/*******************************************************************************
+* mvBoardMacSpeedGet - Get the Mac speed
+*
+* DESCRIPTION:
+*       This routine returns the Mac speed if pre define of a given ethernet port.
+*
+* INPUT:
+*       ethPortNum - Ethernet port number.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_BOARD_MAC_SPEED, -1 if the port number is wrong.
+*
+*******************************************************************************/
+MV_BOARD_MAC_SPEED      mvBoardMacSpeedGet(MV_U32 ethPortNum)
+{
+	MV_U32 boardId = mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("mvBoardMacSpeedGet: Board unknown.\n");
+		return MV_ERROR;
+	}
+
+	return BOARD_INFO(boardId)->pBoardMacInfo[ethPortNum].boardMacSpeed;
+}
+#endif
+/*******************************************************************************
+* mvBoardLinkStatusIrqGet - Get the IRQ number for the link status indication
+*
+* DESCRIPTION:
+*       This routine returns the IRQ number for the link status indication.
+*
+* INPUT:
+*       ethPortNum - Ethernet port number.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       the number of the IRQ for the link status indication, -1 if the port 
+*	number is wrong or if not relevant.
+*
+*******************************************************************************/
+MV_32	mvBoardLinkStatusIrqGet(MV_U32 ethPortNum)
+{
+	MV_U32 boardId = mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("mvBoardLinkStatusIrqGet: Board unknown.\n");
+		return MV_ERROR;
+	}
+
+	return BOARD_INFO(boardId)->pSwitchInfo[ethPortNum].linkStatusIrq;
+}
+
+/*******************************************************************************
+* mvBoardSwitchPortGet - Get the mapping between the board connector and the 
+* Ethernet Switch port
+*
+* DESCRIPTION:
+*       This routine returns the matching Switch port.
+*
+* INPUT:
+*       ethPortNum - Ethernet port number.
+*	boardPortNum - logical number of the connector on the board
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       the matching Switch port, -1 if the port number is wrong or if not relevant.
+*
+*******************************************************************************/
+MV_32	mvBoardSwitchPortGet(MV_U32 ethPortNum, MV_U8 boardPortNum)
+{
+	MV_U32 boardId = mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("mvBoardSwitchPortGet: Board unknown.\n");
+		return MV_ERROR;
+	}
+	if (boardPortNum >= BOARD_ETH_SWITCH_PORT_NUM)
+	{
+		mvOsPrintf("mvBoardSwitchPortGet: Illegal board port number.\n");
+		return MV_ERROR;
+	}
+
+	return BOARD_INFO(boardId)->pSwitchInfo[ethPortNum].qdPort[boardPortNum];
+}
+
+/*******************************************************************************
+* mvBoardSwitchCpuPortGet - Get the the Ethernet Switch CPU port
+*
+* DESCRIPTION:
+*       This routine returns the Switch CPU port.
+*
+* INPUT:
+*       ethPortNum - Ethernet port number.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       the Switch CPU port, -1 if the port number is wrong or if not relevant.
+*
+*******************************************************************************/
+MV_32	mvBoardSwitchCpuPortGet(MV_U32 ethPortNum)
+{
+	MV_U32 boardId = mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("mvBoardSwitchCpuPortGet: Board unknown.\n");
+		return MV_ERROR;
+	}
+
+	return BOARD_INFO(boardId)->pSwitchInfo[ethPortNum].qdCpuPort;
+}
+
+/*******************************************************************************
+* mvBoardSmiScanModeGet - Get Switch SMI scan mode
+*
+* DESCRIPTION:
+*       This routine returns Switch SMI scan mode.
+*
+* INPUT:
+*       ethPortNum - Ethernet port number.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       1 for SMI_MANUAL_MODE, -1 if the port number is wrong or if not relevant.
+*
+*******************************************************************************/
+MV_32	mvBoardSmiScanModeGet(MV_U32 ethPortNum)
+{
+	MV_U32 boardId = mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("mvBoardSmiScanModeGet: Board unknown.\n");
+		return MV_ERROR;
+	}
+
+	return BOARD_INFO(boardId)->pSwitchInfo[ethPortNum].smiScanMode;
+}
+/*******************************************************************************
+* mvBoardSpecInitGet -
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN: Return MV_TRUE and parameters in case board need spesific phy init, 
+* 	  otherwise return MV_FALSE. 
+*
+*
+*******************************************************************************/
+
+MV_BOOL mvBoardSpecInitGet(MV_U32* regOff, MV_U32* data)
+{
+	return MV_FALSE;
+}
+
+/*******************************************************************************
+* mvBoardTclkGet - Get the board Tclk (Controller clock)
+*
+* DESCRIPTION:
+*       This routine extract the controller core clock.
+*       This function uses the controller counters to make identification.
+*		Note: In order to avoid interference, make sure task context switch
+*		and interrupts will not occure during this function operation
+*
+* INPUT:
+*       countNum - Counter number.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       32bit clock cycles in Hertz.
+*
+*******************************************************************************/
+MV_U32 mvBoardTclkGet(MV_VOID)
+{
+#if defined(TCLK_AUTO_DETECT)
+	MV_U32 tmpTClkRate = MV_BOARD_TCLK_166MHZ;
+
+        tmpTClkRate = MV_REG_READ(MPP_SAMPLE_AT_RESET_REG0);
+        tmpTClkRate &= MSAR_TCLCK_MASK;
+
+        switch (tmpTClkRate)
+        {
+        case MSAR_TCLCK_166:
+                tmpTClkRate = MV_BOARD_TCLK_166MHZ;
+                break;
+	case MSAR_TCLCK_125:
+                tmpTClkRate = MV_BOARD_TCLK_125MHZ;
+                break;
+        }
+	return tmpTClkRate;
+#else
+	return MV_BOARD_DEFAULT_TCLK;
+#endif
+
+}
+/*******************************************************************************
+* mvBoardSysClkGet - Get the board SysClk (CPU bus clock)
+*
+* DESCRIPTION:
+*       This routine extract the CPU bus clock.
+*
+* INPUT:
+*       countNum - Counter number.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       32bit clock cycles in Hertz.
+*
+*******************************************************************************/
+MV_U32  mvBoardSysClkGet(MV_VOID)
+{
+#ifdef SYSCLK_AUTO_DETECT
+	MV_U32 sysClkRate, tmp, pClkRate, indexDdrRtio;
+	MV_U32 cpuCLK[] = MV_CPU_CLCK_TBL;
+	MV_U32 ddrRtio[][2] = MV_DDR_CLCK_RTIO_TBL;
+
+	tmp = MV_REG_READ(MPP_SAMPLE_AT_RESET_REG0);
+	pClkRate = tmp & MSAR_CPUCLCK_MASK;
+	pClkRate = pClkRate >> MSAR_CPUCLCK_OFFS;
+	pClkRate = cpuCLK[pClkRate];
+
+	indexDdrRtio = tmp & MSAR_DDRCLCK_RTIO_MASK;
+	indexDdrRtio = indexDdrRtio >> MSAR_DDRCLCK_RTIO_OFFS;
+
+	sysClkRate = ((pClkRate * ddrRtio[indexDdrRtio][1]) / ddrRtio[indexDdrRtio][0]);
+
+	return sysClkRate;
+#else
+	return MV_BOARD_DEFAULT_SYSCLK;
+#endif
+}
+
+
+/*******************************************************************************
+* mvBoardPexBridgeIntPinGet - Get PEX to PCI bridge interrupt pin number
+*
+* DESCRIPTION:
+*		Multi-ported PCI Express bridges that is implemented on the board
+*		collapse interrupts across multiple conventional PCI/PCI-X buses.
+*		A dual-headed PCI Express bridge would map (or "swizzle") the
+*		interrupts per the following table (in accordance with the respective
+*		logical PCI/PCI-X bridge's Device Number), collapse the INTA#-INTD#
+*		signals from its two logical PCI/PCI-X bridges, collapse the
+*		INTA#-INTD# signals from any internal sources, and convert the
+*		signals to in-band PCI Express messages. 10
+*		This function returns the upstream interrupt as it was converted by
+*		the bridge, according to board configuration and the following table:
+*					  		PCI dev num
+*			Interrupt pin 	7, 	8, 	9
+*		   			A  ->	A	D	C
+*		   			B  -> 	B	A	D
+*		   			C  -> 	C	B	A
+*		  			D  ->	D	C	B
+*
+*
+* INPUT:
+*       devNum - PCI/PCIX device number.
+*       intPin - PCI Int pin
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       Int pin connected to the Interrupt controller
+*
+*******************************************************************************/
+MV_U32 mvBoardPexBridgeIntPinGet(MV_U32 devNum, MV_U32 intPin)
+{
+	MV_U32 realIntPin = ((intPin + (3 - (devNum % 4))) %4 );
+
+	if (realIntPin == 0) return 4;
+		else return realIntPin;
+
+}
+
+/*******************************************************************************
+* mvBoardDebugLedNumGet - Get number of debug Leds
+*
+* DESCRIPTION:
+* INPUT:
+*       boardId
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_U32 mvBoardDebugLedNumGet(MV_U32 boardId)
+{
+	return BOARD_INFO(boardId)->activeLedsNumber;
+}
+
+/*******************************************************************************
+* mvBoardDebugLed - Set the board debug Leds
+*
+* DESCRIPTION: turn on/off status leds.
+*
+* INPUT:
+*       hexNum - Number to be displied in hex by Leds.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_VOID mvBoardDebugLed(MV_U32 hexNum)
+{
+    MV_U32 valLow = 0, valHigh = 0, totalMaskLow = 0, totalMaskHigh = 0, currentBitMask = 1, i = 0;
+    MV_U32 boardId = mvBoardIdGet();
+
+    hexNum &= (1 << BOARD_INFO(boardId)->activeLedsNumber) - 1;
+
+    for (i = 0 ; i < BOARD_INFO(boardId)->activeLedsNumber ; i++)
+    {
+	if (BOARD_INFO(boardId)->pLedGppPin[i] <= 31)
+	{
+	    if (hexNum & currentBitMask)
+	    {
+	    	valLow |= (1 << BOARD_INFO(boardId)->pLedGppPin[i]);
+	    }
+
+	    totalMaskLow |= (1 << BOARD_INFO(boardId)->pLedGppPin[i]);
+
+	    currentBitMask = (currentBitMask << 1);
+	}
+        else
+        {
+            if (hexNum & currentBitMask)
+            {
+       	        valHigh |= (1 << (BOARD_INFO(boardId)->pLedGppPin[i] - 32));
+	    }
+
+	    totalMaskHigh |= (1 << (BOARD_INFO(boardId)->pLedGppPin[i] - 32));
+
+	    currentBitMask = (currentBitMask << 1);
+        }
+    }
+
+    if (BOARD_INFO(boardId)->ledsPolarity)
+    {
+	mvGppValueSet(0, totalMaskLow, valLow);
+	mvGppValueSet(1, totalMaskHigh, valHigh);
+    }
+    else
+    {
+	mvGppValueSet(0, totalMaskLow, ~valLow);
+	mvGppValueSet(1, totalMaskHigh, ~valHigh);
+    }
+}
+
+
+/*******************************************************************************
+* mvBoarGpioPinGet - mvBoarGpioPinGet
+*
+* DESCRIPTION:
+*
+* INPUT:
+*		class - MV_BOARD_GPP_CLASS enum.
+*
+* OUTPUT:
+*		None.
+*
+* RETURN:
+*       GPIO pin number. The function return -1 for bad parameters.
+*
+*******************************************************************************/
+MV_32 mvBoarGpioPinNumGet(MV_BOARD_GPP_CLASS class, MV_U32 index)
+{
+	MV_U32 boardId, i;
+	MV_U32 indexFound = 0;
+
+	boardId = mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("mvBoardRTCGpioPinGet:Board unknown.\n");
+		return MV_ERROR;
+
+	}
+
+        for (i = 0; i < BOARD_INFO(boardId)->numBoardGppInfo; i++)
+		if (BOARD_INFO(boardId)->pBoardGppInfo[i].devClass == class) {
+			if (indexFound == index)
+        			return (MV_U32)BOARD_INFO(boardId)->pBoardGppInfo[i].gppPinNum;
+			else
+				indexFound++;
+
+		}
+
+	return MV_ERROR;
+}
+
+
+/*******************************************************************************
+* mvBoardRTCGpioPinGet - mvBoardRTCGpioPinGet
+*
+* DESCRIPTION:
+*
+* INPUT:
+*		None.
+*
+* OUTPUT:
+*		None.
+*
+* RETURN:
+*       GPIO pin number. The function return -1 for bad parameters.
+*
+*******************************************************************************/
+MV_32 mvBoardRTCGpioPinGet(MV_VOID)
+{
+	return mvBoarGpioPinNumGet(BOARD_GPP_RTC, 0);
+}
+
+
+/*******************************************************************************
+* mvBoardReset - mvBoardReset
+*
+* DESCRIPTION:
+*			Reset the board
+* INPUT:
+*		None.
+*
+* OUTPUT:
+*		None.
+*
+* RETURN:
+*       None
+*
+*******************************************************************************/
+MV_VOID	mvBoardReset(MV_VOID)
+{
+	MV_32 resetPin;
+
+	/* Get gpp reset pin if define */
+	resetPin = mvBoardResetGpioPinGet();
+	if (resetPin != MV_ERROR)
+	{
+        	MV_REG_BIT_RESET( GPP_DATA_OUT_REG(0) ,(1 << resetPin));
+		MV_REG_BIT_RESET( GPP_DATA_OUT_EN_REG(0) ,(1 << resetPin));
+
+	}
+	else
+	{
+	    /* No gpp reset pin was found, try to reset ussing
+	    system reset out */
+	    MV_REG_BIT_SET( CPU_RSTOUTN_MASK_REG , BIT2);
+	    MV_REG_BIT_SET( CPU_SYS_SOFT_RST_REG , BIT0);
+	}
+	
+	while(1);
+}
+
+/*******************************************************************************
+* mvBoardResetGpioPinGet - mvBoardResetGpioPinGet
+*
+* DESCRIPTION:
+*
+* INPUT:
+*		None.
+*
+* OUTPUT:
+*		None.
+*
+* RETURN:
+*       GPIO pin number. The function return -1 for bad parameters.
+*
+*******************************************************************************/
+MV_32 mvBoardResetGpioPinGet(MV_VOID)
+{
+	return mvBoarGpioPinNumGet(BOARD_GPP_RESET, 0);
+}
+/*******************************************************************************
+* mvBoardSDIOGpioPinGet - mvBoardSDIOGpioPinGet
+*
+* DESCRIPTION:
+*	used for hotswap detection
+* INPUT:
+*		None.
+*
+* OUTPUT:
+*		None.
+*
+* RETURN:
+*       GPIO pin number. The function return -1 for bad parameters.
+*
+*******************************************************************************/
+MV_32  mvBoardSDIOGpioPinGet(MV_VOID)
+{
+	return mvBoarGpioPinNumGet(BOARD_GPP_SDIO_DETECT, 0);
+}
+
+/*******************************************************************************
+* mvBoardUSBVbusGpioPinGet - return Vbus input GPP
+*
+* DESCRIPTION:
+*
+* INPUT:
+*		int  devNo.
+*
+* OUTPUT:
+*		None.
+*
+* RETURN:
+*       GPIO pin number. The function return -1 for bad parameters.
+*
+*******************************************************************************/
+MV_32 mvBoardUSBVbusGpioPinGet(int devId)
+{
+	return mvBoarGpioPinNumGet(BOARD_GPP_USB_VBUS, devId);
+}
+
+/*******************************************************************************
+* mvBoardUSBVbusEnGpioPinGet - return Vbus Enable output GPP
+*
+* DESCRIPTION:
+*
+* INPUT:
+*		int  devNo.
+*
+* OUTPUT:
+*		None.
+*
+* RETURN:
+*       GPIO pin number. The function return -1 for bad parameters.
+*
+*******************************************************************************/
+MV_32 mvBoardUSBVbusEnGpioPinGet(int devId)
+{
+	return mvBoarGpioPinNumGet(BOARD_GPP_USB_VBUS_EN, devId);
+}
+
+
+/*******************************************************************************
+* mvBoardGpioIntMaskGet - Get GPIO mask for interrupt pins
+*
+* DESCRIPTION:
+*		This function returns a 32-bit mask of GPP pins that connected to
+*		interrupt generating sources on board.
+*		For example if UART channel A is hardwired to GPP pin 8 and
+*		UART channel B is hardwired to GPP pin 4 the fuinction will return
+*		the value 0x000000110
+*
+* INPUT:
+*		None.
+*
+* OUTPUT:
+*		None.
+*
+* RETURN:
+*		See description. The function return -1 if board is not identified.
+*
+*******************************************************************************/
+MV_32 mvBoardGpioIntMaskLowGet(MV_VOID)
+{
+	MV_U32 boardId;
+
+	boardId = mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("mvBoardGpioIntMaskGet:Board unknown.\n");
+		return MV_ERROR;
+	}
+
+	return BOARD_INFO(boardId)->intsGppMaskLow;
+}
+
+MV_32 mvBoardGpioIntMaskHighGet(MV_VOID)
+{
+	MV_U32 boardId;
+
+	boardId = mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("mvBoardGpioIntMaskGet:Board unknown.\n");
+		return MV_ERROR;
+	}
+
+	return BOARD_INFO(boardId)->intsGppMaskHigh;
+}
+
+
+/*******************************************************************************
+* mvBoardMppGet - Get board dependent MPP register value
+*
+* DESCRIPTION:
+*		MPP settings are derived from board design.
+*		MPP group consist of 8 MPPs. An MPP group represent MPP
+*		control register.
+*       This function retrieves board dependend MPP register value.
+*
+* INPUT:
+*       mppGroupNum - MPP group number.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       32bit value describing MPP control register value.
+*
+*******************************************************************************/
+MV_32 mvBoardMppGet(MV_U32 mppGroupNum)
+{
+	MV_U32 boardId;
+
+	boardId = mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("mvBoardMppGet:Board unknown.\n");
+		return MV_ERROR;
+	}
+
+	return BOARD_INFO(boardId)->pBoardMppConfigValue[0].mppGroup[mppGroupNum];
+}
+
+
+/*******************************************************************************
+* mvBoardMppGroupId - If MPP group type is AUTO then identify it using twsi
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*
+*******************************************************************************/
+MV_VOID mvBoardMppGroupIdUpdate(MV_VOID)
+{
+
+	MV_BOARD_MPP_GROUP_CLASS devClass;
+	MV_BOARD_MODULE_ID_CLASS devClassId;
+	MV_BOARD_MPP_TYPE_CLASS mppGroupType;
+	MV_U32 devId;
+	MV_U32 maxMppGrp = 1;
+	
+	devId = mvCtrlModelGet();
+
+	switch(devId){
+		case MV_6781_DEV_ID:
+			maxMppGrp = MV_6781_MPP_MAX_GROUP;
+			break;
+	}
+
+	for (devClass = 0; devClass < maxMppGrp; devClass++)
+	{
+		/* If MPP group can be defined by the module connected to it */
+		if (mvBoardMppGroupTypeGet(devClass) == MV_BOARD_AUTO)
+		{
+			/* Get MPP module ID */
+			devClassId = mvBoarModuleTypeGet(devClass);
+			if (MV_ERROR != devClassId)
+			{
+				switch(devClassId)
+				{
+				case MV_BOARD_MODULE_TDM_ID:
+					mppGroupType = MV_BOARD_TDM;
+					break;
+				case MV_BOARD_MODULE_AUDIO_ID:
+					mppGroupType = MV_BOARD_AUDIO;
+					break;
+				case MV_BOARD_MODULE_RGMII_ID:
+					mppGroupType = MV_BOARD_RGMII;
+					break;
+				case MV_BOARD_MODULE_GMII_ID:
+					mppGroupType = MV_BOARD_GMII;
+					break;
+				case MV_BOARD_MODULE_TS_ID:
+					mppGroupType = MV_BOARD_TS;
+					break;
+				default:
+					mppGroupType = MV_BOARD_OTHER;
+					break;
+				}
+			}
+			else
+				/* The module bay is empty */
+				mppGroupType = MV_BOARD_OTHER;
+		
+			/* Update MPP group type */
+			mvBoardMppGroupTypeSet(devClass, mppGroupType);
+		}
+	}
+}
+
+/*******************************************************************************
+* mvBoardMppGroupTypeGet 
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       mppGroupClass - MPP group number 0  for MPP[35:20] or 1 for MPP[49:36].
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*
+*******************************************************************************/
+MV_BOARD_MPP_TYPE_CLASS mvBoardMppGroupTypeGet(MV_BOARD_MPP_GROUP_CLASS mppGroupClass)
+{
+	MV_U32 boardId;
+
+	boardId = mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("mvBoardMppGet:Board unknown.\n");
+		return MV_ERROR;
+	}
+	
+	if (mppGroupClass == MV_BOARD_MPP_GROUP_1)
+		return BOARD_INFO(boardId)->pBoardMppTypeValue[0].boardMppGroup1;
+	else
+		return BOARD_INFO(boardId)->pBoardMppTypeValue[0].boardMppGroup2;
+}
+
+/*******************************************************************************
+* mvBoardMppGroupTypeSet 
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       mppGroupClass - MPP group number 0  for MPP[35:20] or 1 for MPP[49:36].
+*       mppGroupType - MPP group type for MPP[35:20] or for MPP[49:36].
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*
+*******************************************************************************/
+MV_VOID mvBoardMppGroupTypeSet(MV_BOARD_MPP_GROUP_CLASS mppGroupClass,
+						MV_BOARD_MPP_TYPE_CLASS mppGroupType)
+{
+	MV_U32 boardId;
+
+	boardId = mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("mvBoardMppGet:Board unknown.\n");
+	}
+
+	if (mppGroupClass == MV_BOARD_MPP_GROUP_1)
+		BOARD_INFO(boardId)->pBoardMppTypeValue[0].boardMppGroup1 = mppGroupType;
+	else
+		BOARD_INFO(boardId)->pBoardMppTypeValue[0].boardMppGroup2 = mppGroupType;
+}
+
+
+/* Board devices API managments */
+
+/*******************************************************************************
+* mvBoardGetDeviceNumber - Get number of device of some type on the board
+*
+* DESCRIPTION:
+*
+* INPUT:
+*		devType - The device type ( Flash,RTC , etc .. )
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       If the device is found on the board the then the functions returns the
+*		number of those devices else the function returns 0
+*
+*
+*******************************************************************************/
+MV_32 mvBoardGetDevicesNumber(MV_BOARD_DEV_CLASS devClass)
+{
+	MV_U32	foundIndex=0,devNum;
+	MV_U32 boardId= mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("mvBoardGetDeviceNumber:Board unknown.\n");
+		return 0xFFFFFFFF;
+	}
+
+	for (devNum = START_DEV_CS; devNum < BOARD_INFO(boardId)->numBoardDeviceIf; devNum++)
+	{
+		if (BOARD_INFO(boardId)->pDevCsInfo[devNum].devClass == devClass)
+		{
+			foundIndex++;
+		}
+	}
+
+    return foundIndex;
+
+}
+
+/*******************************************************************************
+* mvBoardGetDeviceBaseAddr - Get base address of a device existing on the board
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       devIndex - The device sequential number on the board
+*		devType - The device type ( Flash,RTC , etc .. )
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       If the device is found on the board the then the functions returns the
+*		Base address else the function returns 0xffffffff
+*
+*
+*******************************************************************************/
+MV_32 mvBoardGetDeviceBaseAddr(MV_32 devNum, MV_BOARD_DEV_CLASS devClass)
+{
+	MV_DEV_CS_INFO* devEntry;
+	devEntry = boardGetDevEntry(devNum,devClass);
+	if (devEntry != NULL)
+	{
+		return mvCpuIfTargetWinBaseLowGet(DEV_TO_TARGET(devEntry->deviceCS));
+
+	}
+
+	return 0xFFFFFFFF;
+}
+
+/*******************************************************************************
+* mvBoardGetDeviceBusWidth - Get Bus width of a device existing on the board
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       devIndex - The device sequential number on the board
+*		devType - The device type ( Flash,RTC , etc .. )
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       If the device is found on the board the then the functions returns the
+*		Bus width else the function returns 0xffffffff
+*
+*
+*******************************************************************************/
+MV_32 mvBoardGetDeviceBusWidth(MV_32 devNum, MV_BOARD_DEV_CLASS devClass)
+{
+	MV_DEV_CS_INFO* devEntry;
+
+	devEntry = boardGetDevEntry(devNum,devClass);
+	if (devEntry != NULL)
+	{
+		return 8; 
+	}
+
+	return 0xFFFFFFFF;
+
+}
+
+/*******************************************************************************
+* mvBoardGetDeviceWidth - Get dev width of a device existing on the board
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       devIndex - The device sequential number on the board
+*		devType - The device type ( Flash,RTC , etc .. )
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       If the device is found on the board the then the functions returns the
+*		dev width else the function returns 0xffffffff
+*
+*
+*******************************************************************************/
+MV_32 mvBoardGetDeviceWidth(MV_32 devNum, MV_BOARD_DEV_CLASS devClass)
+{
+	MV_DEV_CS_INFO* devEntry;
+	MV_U32 boardId = mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("Board unknown.\n");
+		return 0xFFFFFFFF;
+	}
+
+	devEntry = boardGetDevEntry(devNum,devClass);
+	if (devEntry != NULL)
+		return devEntry->devWidth;
+
+	return MV_ERROR;
+}
+
+/*******************************************************************************
+* mvBoardGetDeviceWinSize - Get the window size of a device existing on the board
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       devIndex - The device sequential number on the board
+*		devType - The device type ( Flash,RTC , etc .. )
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       If the device is found on the board the then the functions returns the
+*		window size else the function returns 0xffffffff
+*
+*
+*******************************************************************************/
+MV_32 mvBoardGetDeviceWinSize(MV_32 devNum, MV_BOARD_DEV_CLASS devClass)
+{
+	MV_DEV_CS_INFO* devEntry;
+	MV_U32 boardId = mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("Board unknown.\n");
+		return 0xFFFFFFFF;
+	}
+
+	devEntry = boardGetDevEntry(devNum,devClass);
+	if (devEntry != NULL)
+	{
+		return mvCpuIfTargetWinSizeGet(DEV_TO_TARGET(devEntry->deviceCS));
+	}
+
+	return 0xFFFFFFFF;
+}
+
+
+/*******************************************************************************
+* boardGetDevEntry - returns the entry pointer of a device on the board
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       devIndex - The device sequential number on the board
+*		devType - The device type ( Flash,RTC , etc .. )
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       If the device is found on the board the then the functions returns the
+*		dev number else the function returns 0x0
+*
+*
+*******************************************************************************/
+static MV_DEV_CS_INFO*  boardGetDevEntry(MV_32 devNum, MV_BOARD_DEV_CLASS devClass)
+{
+	MV_U32	foundIndex = 0, devIndex;
+	MV_U32	boardId = mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("boardGetDevEntry: Board unknown.\n");
+		return NULL;
+
+	}
+
+	for (devIndex = START_DEV_CS; devIndex < BOARD_INFO(boardId)->numBoardDeviceIf; devIndex++)
+	{
+		/* TBR */
+		/*if (BOARD_INFO(boardId)->pDevCsInfo[devIndex].deviceCS == MV_BOOTDEVICE_INDEX)
+		     continue;*/
+
+		if (BOARD_INFO(boardId)->pDevCsInfo[devIndex].devClass == devClass)
+		{
+            		if (foundIndex == devNum)
+			{
+				return &(BOARD_INFO(boardId)->pDevCsInfo[devIndex]);
+			}
+			foundIndex++;
+		}
+	}
+
+	/* device not found */
+	return NULL;
+}
+
+/* Get device CS number */
+
+MV_U32 boardGetDevCSNum(MV_32 devNum, MV_BOARD_DEV_CLASS devClass)
+{
+	MV_DEV_CS_INFO* devEntry;
+	MV_U32 boardId = mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("Board unknown.\n");
+		return 0xFFFFFFFF;
+
+	}
+
+	devEntry = boardGetDevEntry(devNum,devClass);
+	if (devEntry != NULL)
+		return devEntry->deviceCS;
+
+	return 0xFFFFFFFF;
+
+}
+
+
+
+/*******************************************************************************
+* mvBoardChanNumGet -
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*
+*
+*******************************************************************************/
+MV_U8		mvBoardTwsiChanNumGet(MV_U8 unit, MV_BOARD_TWSI_CLASS twsiClass)
+{
+#warning "not yet implemented"
+	return -1;
+}
+
+
+/*******************************************************************************
+* mvBoardTwsiAddrTypeGet -
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*
+*
+*******************************************************************************/
+MV_U8		mvBoardTwsiAddrTypeGet(MV_U8 unit, MV_BOARD_TWSI_CLASS twsiClass)
+{
+	int i;
+	MV_U32 boardId = mvBoardIdGet();
+
+	for (i = 0; i < BOARD_INFO(boardId)->numBoardTwsiDev; i++)
+		if (BOARD_INFO(boardId)->pBoardTwsiDev[i].devClass == twsiClass)
+			return BOARD_INFO(boardId)->pBoardTwsiDev[i].twsiDevAddrType;
+	return (MV_ERROR);
+}
+
+
+/*******************************************************************************
+* mvBoardTwsiAddrGet -
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*
+*
+*******************************************************************************/
+MV_U8		mvBoardTwsiAddrGet(MV_U8 unit, MV_BOARD_TWSI_CLASS twsiClass)
+{
+	int i;
+	MV_U32 boardId = mvBoardIdGet();
+
+	for (i = 0; i < BOARD_INFO(boardId)->numBoardTwsiDev; i++)
+		if (BOARD_INFO(boardId)->pBoardTwsiDev[i].devClass == twsiClass)
+			return BOARD_INFO(boardId)->pBoardTwsiDev[i].twsiDevAddr;
+	return (0xFF);
+}
+
+
+
+/*******************************************************************************
+* mvBoardRtcTwsiAddrTypeGet -
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*
+*
+*******************************************************************************/
+MV_U8 mvBoardRtcTwsiAddrTypeGet(void)
+{
+	return mvBoardTwsiAddrTypeGet(0, BOARD_TWSI_RTC);
+}
+
+/*******************************************************************************
+* mvBoardRtcTwsiAddrGet -
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*
+*
+*******************************************************************************/
+MV_U8 mvBoardRtcTwsiAddrGet(void)
+{
+	return mvBoardTwsiAddrGet(0, BOARD_TWSI_RTC);
+}
+
+
+/*******************************************************************************
+* mvBoardA2DTwsiChanNumGet -
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*
+*
+*******************************************************************************/
+MV_U8		mvBoardA2DTwsiChanNumGet(MV_U8 unit)
+{
+	return mvBoardTwsiChanNumGet(unit, BOARD_TWSI_AUDIO_DEC);
+}
+
+/*******************************************************************************
+* mvBoardA2DTwsiAddrTypeGet -
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*
+*
+*******************************************************************************/
+MV_U8 mvBoardA2DTwsiAddrTypeGet(MV_U8 unit)
+{
+	return mvBoardTwsiAddrTypeGet(unit, BOARD_TWSI_AUDIO_DEC);
+}
+
+/*******************************************************************************
+* mvBoardA2DTwsiAddrGet -
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*
+*
+*******************************************************************************/
+MV_U8 mvBoardA2DTwsiAddrGet(MV_U8 unit)
+{
+	return mvBoardTwsiAddrGet(unit, BOARD_TWSI_AUDIO_DEC);
+}
+
+
+
+/*******************************************************************************
+* mvBoardCamTwsiChanNumGet -
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*
+*
+*******************************************************************************/
+MV_U8		mvBoardCamTwsiChanNumGet(MV_U8 unit)
+{
+	return mvBoardTwsiChanNumGet(unit, BOARD_TWSI_CAM);
+}
+
+
+
+/*******************************************************************************
+* mvBoardCamTwsiAddrTypeGet -
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*
+*
+*******************************************************************************/
+MV_U8 mvBoardCamTwsiAddrTypeGet(MV_U8 unit)
+{
+	return mvBoardTwsiAddrTypeGet(unit, BOARD_TWSI_CAM);
+}
+
+/*******************************************************************************
+* mvBoardCamTwsiAddrGet -
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*
+*
+*******************************************************************************/
+MV_U8 mvBoardCamTwsiAddrGet(MV_U8 unit)
+{
+	return mvBoardTwsiAddrGet(unit, BOARD_TWSI_CAM);
+}
+
+
+
+
+
+
+/*******************************************************************************
+* mvBoardTwsiExpAddrTypeGet -
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*
+*
+*******************************************************************************/
+MV_U8 mvBoardTwsiExpAddrTypeGet(MV_U32 index)
+{
+	int i;
+	MV_U32 indexFound = 0;
+	MV_U32 boardId = mvBoardIdGet();
+
+	for (i = 0; i < BOARD_INFO(boardId)->numBoardTwsiDev; i++)
+		if (BOARD_INFO(boardId)->pBoardTwsiDev[i].devClass == BOARD_DEV_TWSI_EXP)
+		{
+			if (indexFound == index)
+				return BOARD_INFO(boardId)->pBoardTwsiDev[i].twsiDevAddrType;
+			else
+				indexFound++;
+		}
+
+	return (MV_ERROR);
+}
+
+/*******************************************************************************
+* mvBoardTwsiExpAddrGet -
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*
+*
+*******************************************************************************/
+MV_U8 mvBoardTwsiExpAddrGet(MV_U32 index)
+{
+	int i;
+	MV_U32 indexFound = 0;
+	MV_U32 boardId = mvBoardIdGet();
+
+	for (i = 0; i < BOARD_INFO(boardId)->numBoardTwsiDev; i++)
+		if (BOARD_INFO(boardId)->pBoardTwsiDev[i].devClass == BOARD_DEV_TWSI_EXP)
+		{
+			if (indexFound == index)
+				return BOARD_INFO(boardId)->pBoardTwsiDev[i].twsiDevAddr;
+			else
+				indexFound++;
+		}
+
+	return (0xFF);
+}
+
+
+/*******************************************************************************
+* mvBoardTwsiSatRAddrTypeGet -
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*
+*
+*******************************************************************************/
+MV_U8 mvBoardTwsiSatRAddrTypeGet(MV_U32 index)
+{
+	int i;
+	MV_U32 indexFound = 0;
+	MV_U32 boardId = mvBoardIdGet();
+
+	for (i = 0; i < BOARD_INFO(boardId)->numBoardTwsiDev; i++)
+		if (BOARD_INFO(boardId)->pBoardTwsiDev[i].devClass == BOARD_DEV_TWSI_SATR)
+		{
+			if (indexFound == index)
+				return BOARD_INFO(boardId)->pBoardTwsiDev[i].twsiDevAddrType;
+			else
+				indexFound++;
+		}
+
+	return (MV_ERROR);
+}
+
+/*******************************************************************************
+* mvBoardTwsiSatRAddrGet -
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*
+*
+*******************************************************************************/
+MV_U8 mvBoardTwsiSatRAddrGet(MV_U32 index)
+{
+	int i;
+	MV_U32 indexFound = 0;
+	MV_U32 boardId = mvBoardIdGet();
+
+	for (i = 0; i < BOARD_INFO(boardId)->numBoardTwsiDev; i++)
+		if (BOARD_INFO(boardId)->pBoardTwsiDev[i].devClass == BOARD_DEV_TWSI_SATR)
+		{
+			if (indexFound == index)
+				return BOARD_INFO(boardId)->pBoardTwsiDev[i].twsiDevAddr;
+			else
+				indexFound++;
+		}
+
+	return (0xFF);
+}
+
+/*******************************************************************************
+* mvBoardNandWidthGet -
+*
+* DESCRIPTION: Get the width of the first NAND device in byte.
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN: 1, 2, 4 or MV_ERROR
+*
+*
+*******************************************************************************/
+MV_32 mvBoardNandWidthGet(void)
+{
+	MV_U32 devNum;
+	MV_U32 devWidth;
+	MV_U32 boardId = mvBoardIdGet();
+
+	for (devNum = START_DEV_CS; devNum < BOARD_INFO(boardId)->numBoardDeviceIf; devNum++)
+	{
+		devWidth = mvBoardGetDeviceWidth(devNum, BOARD_DEV_NAND_FLASH);
+		if (devWidth != MV_ERROR)
+			return (devWidth / 8);
+	}
+		
+	/* NAND wasn't found */
+	return MV_ERROR;
+}
+
+MV_U32 gBoardId = -1;
+
+/*******************************************************************************
+* mvBoardIdGet - Get Board model
+*
+* DESCRIPTION:
+*       This function returns board ID.
+*       Board ID is 32bit word constructed of board model (16bit) and
+*       board revision (16bit) in the following way: 0xMMMMRRRR.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       32bit board ID number, '-1' if board is undefined.
+*
+*******************************************************************************/
+MV_U32 mvBoardIdGet(MV_VOID)
+{
+	MV_U32 tmpBoardId = -1;
+
+	if(gBoardId == -1)
+        {
+		#if defined(DB_88F6781Z0)
+		tmpBoardId = DB_88F6781_BP_ID;
+		#elif defined(RD_88F6781)
+		tmpBoardId = RD_88F6781_ID;
+		#elif defined(RD_88F6781_AVNG)
+		tmpBoardId = RD_88F6781_AVNG_ID;
+		#elif defined(DB_88F6781Y0)
+		tmpBoardId =  DB_88F6781Y0_BP_ID;
+		#endif
+		gBoardId = tmpBoardId;
+	}
+
+	return gBoardId;
+}
+
+
+/*******************************************************************************
+* mvBoarModuleTypeGet - mvBoarModuleTypeGet
+*
+* DESCRIPTION:
+*
+* INPUT:
+*		group num - MV_BOARD_MPP_GROUP_CLASS enum
+*
+* OUTPUT:
+*		None.
+*
+* RETURN:
+*		module num - MV_BOARD_MODULE_CLASS enum
+*
+*******************************************************************************/
+MV_BOARD_MODULE_ID_CLASS mvBoarModuleTypeGet(MV_BOARD_MPP_GROUP_CLASS devClass)
+{
+    	MV_TWSI_SLAVE twsiSlave;
+	MV_TWSI_ADDR slave;
+    	MV_U8 data;
+	
+	/* TWSI init */    	
+	slave.type = ADDR7_BIT;
+	slave.address = 0;
+	mvTwsiInit(MV_BOARD_DIMM_I2C_CHANNEL, TWSI_SPEED, mvBoardTclkGet(), &slave, 0);
+
+	/* Read MPP module ID */
+    	DB(mvOsPrintf("Board: Read MPP module ID\n"));
+    	twsiSlave.slaveAddr.address = mvBoardTwsiExpAddrGet(devClass);
+    	twsiSlave.slaveAddr.type = mvBoardTwsiExpAddrTypeGet(devClass);
+    	twsiSlave.validOffset = MV_TRUE;
+	/* Offset is the first command after the address which indicate the register number to be read 
+	   in next operation */
+    	twsiSlave.offset = 0;
+    	twsiSlave.moreThen256 = MV_FALSE;
+
+    	if( MV_OK != mvTwsiRead (MV_BOARD_DIMM_I2C_CHANNEL, &twsiSlave, &data, 1) )
+    	{
+    		DB(mvOsPrintf("Board: Read MPP module ID fail\n"));
+        	return MV_ERROR;
+    	}
+    	DB(mvOsPrintf("Board: Read MPP module ID succeded\n"));
+	
+	return data;
+}
+
+/*******************************************************************************
+* mvBoardSlicGpioPinGet -
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*
+*
+*******************************************************************************/
+MV_32 mvBoardSlicGpioPinGet(MV_U32 slicNum)
+{
+	MV_U32 boardId;
+	boardId = mvBoardIdGet();
+
+	switch (boardId)
+	{
+	case DB_88F6781_BP_ID:
+	case RD_88F6781_ID:
+	case RD_88F6781_AVNG_ID:
+	case DB_88F6781Y0_BP_ID:
+	default:
+		return MV_ERROR;
+		break;
+
+	}
+}
+
+
+/*******************************************************************************
+* mvBoardDdrTypeGet -
+*
+* DESCRIPTION: identify DDR DIMM type (DDR2/DDR3) based on sample at reset.
+*
+* INPUT: none.
+*
+* OUTPUT:
+*       1 - DDR3, 0 - DDR2.
+*
+* RETURN:
+*
+*
+*******************************************************************************/
+MV_32 mvBoardDdrTypeGet(void)
+{
+	MV_U32 reg = MV_REG_READ(MPP_SAMPLE_AT_RESET_REG0);
+	if (reg & BIT28)	/* bit 28 determines DDR type: 1 is DDR3, 0 is DDR2 */
+		return 1;
+
+	return 0;
+}
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/config/mvSysEthPhyConfig.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/config/mvSysEthPhyConfig.h
@@ -0,0 +1,32 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+*******************************************************************************/
+/*******************************************************************************
+* mvSysEthPhyConfig.h - Marvell Ethernet-PHY specific configurations
+*
+* DESCRIPTION:
+*       None.
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+#include "mvSysHwConfig.h"
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/config/mvSysUsbConfig.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/config/mvSysUsbConfig.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+*******************************************************************************/
+/*******************************************************************************
+* mvSysUsbConfig.h - Marvell USB unit specific configurations
+*
+* DESCRIPTION:
+*       None.
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+#include "mvSysHwConfig.h"
+
+/*
+** Base address for USB registers.
+*/
+#define MV_USB_REGS_BASE(unit) 		(MV_USB_REGS_OFFSET(unit))
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/config/mvSysSpiConfig.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/config/mvSysSpiConfig.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+*******************************************************************************/
+/*******************************************************************************
+* mvSysSpiConfig.h - Marvell SPI unit specific configurations
+*
+* DESCRIPTION:
+*       None.
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+#include "mvSysHwConfig.h"
+
+/*
+** Base address for SPI registers.
+*/
+#define MV_SPI_REGS_BASE(unit)		(MV_SPI_REGS_OFFSET(unit))
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/config/mvSysPmuConfig.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/config/mvSysPmuConfig.h
@@ -0,0 +1,37 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+*******************************************************************************/
+/*******************************************************************************
+* mvSysPmuConfig.h - Marvell Power-Management unit specific configurations
+*
+* DESCRIPTION:
+*       None.
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+#include "mvSysHwConfig.h"
+
+/*
+** Base address for Power-Management unit registers.
+*/
+#define MV_PMU_REGS_BASE		(MV_PMU_REGS_OFFSET)
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/config/mvSysRtcConfig.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/config/mvSysRtcConfig.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+*******************************************************************************/
+/*******************************************************************************
+* mvSysRtcConfig.h - Marvell Real-Time clock unit specific configurations
+*
+* DESCRIPTION:
+*       None.
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+#include "mvSysHwConfig.h"
+
+/*
+** Base address for RTC registers.
+*/
+#define MV_RTC_REGS_BASE		(MV_RTC_REGS_OFFSET)
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/config/mvSysXorConfig.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/config/mvSysXorConfig.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+*******************************************************************************/
+/*******************************************************************************
+* mvSysXorConfig.h - Marvell XOR unit specific configurations
+*
+* DESCRIPTION:
+*       None.
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+#include "mvSysHwConfig.h"
+
+/*
+** Base address for XOR registers.
+*/
+#define MV_XOR_REGS_BASE(unit)		(MV_XOR_REGS_OFFSET(unit))
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/config/mvSysAudioConfig.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/config/mvSysAudioConfig.h
@@ -0,0 +1,43 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+*******************************************************************************/
+/*******************************************************************************
+* mvSysAudioConfig.h - Marvell Audio unit specific configurations
+*
+* DESCRIPTION:
+*       None.
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+#include "mvSysHwConfig.h"
+
+/*
+** Base address for audio registers.
+*/
+#define MV_AUDIO_REGS_BASE(unit) 	(MV_AUDIO_REGS_OFFSET(unit))
+
+
+/*
+** Don't perform decoding / playback address decoding fix in the HAL, as it
+** will be done in the Audio driver.
+*/
+#define MV_AUDIO_SKIP_WIN_DECODING
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/config/mvSysCesaConfig.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/config/mvSysCesaConfig.h
@@ -0,0 +1,39 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+*******************************************************************************/
+/*******************************************************************************
+* mvSysCesaConfig.h - Marvell Cesa unit specific configurations
+*
+* DESCRIPTION:
+*       None.
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+#include "mvSysHwConfig.h"
+
+/*
+** Base address for cesa registers.
+*/
+#define MV_CESA_REGS_BASE 	(MV_CESA_REGS_OFFSET)
+
+#define MV_CESA_TDMA_REGS_BASE	(MV_CESA_TDMA_REGS_OFFSET)
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/config/mvSysTwsiConfig.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/config/mvSysTwsiConfig.h
@@ -0,0 +1,42 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+*******************************************************************************/
+/*******************************************************************************
+* mvSysTwsiConfig.h - Marvell TWSI unit specific configurations
+*
+* DESCRIPTION:
+*       None.
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+#include "mvSysHwConfig.h"
+
+/*
+** Base address for TWSI registers.
+*/
+#define MV_TWSI_SLAVE_REGS_BASE(unit) 	(MV_TWSI_SLAVE_REGS_OFFSET(unit))
+
+/*
+** Specific definition for Main CPU interrupt cause register.
+** Needed for TWSI operation completion monitoring.
+*/
+#define MV_TWSI_CPU_MAIN_INT_CASUE	(TWSI_CPU_MAIN_INT_CAUSE_REG)
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/config/mvSysSataConfig.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/config/mvSysSataConfig.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+*******************************************************************************/
+/*******************************************************************************
+* mvSysSataConfig.h - Marvell Sata unit specific configurations
+*
+* DESCRIPTION:
+*       None.
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+#include "mvSysHwConfig.h"
+
+/*
+** Base address for SPI registers.
+*/
+#define MV_SATA_REGS_BASE		(MV_SATA_REGS_OFFSET)
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/config/mvSysDdrConfig.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/config/mvSysDdrConfig.h
@@ -0,0 +1,41 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+*******************************************************************************/
+/*******************************************************************************
+* mvSysDdrConfig.h - Marvell DRAM controller unit specific configurations
+*
+* DESCRIPTION:
+*       None.
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+#include "mvSysHwConfig.h"
+
+/*
+** Base address for DDR registers.
+*/
+#define MV_DDR_REGS_BASE		(MV_DDR_REGS_OFFSET)
+
+#ifndef MV_BOOTROM
+#define MV_STATIC_DRAM_ON_BOARD
+#endif
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/config/mvSysEthConfig.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/config/mvSysEthConfig.h
@@ -0,0 +1,127 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+*******************************************************************************/
+/*******************************************************************************
+* mvSysEthConfig.h - Marvell Ethernet unit specific configurations
+*
+* DESCRIPTION:
+*       None.
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+#include "mvSysHwConfig.h"
+
+/*
+** Base address for ethernet registers.
+*/
+#define MV_ETH_REGS_BASE(unit)		(MV_ETH_REGS_OFFSET(unit))
+
+
+#if defined(CONFIG_MV_INCLUDE_GIG_ETH)
+
+#ifdef CONFIG_MV_NFP_STATS
+#define MV_FP_STATISTICS
+#else
+#undef MV_FP_STATISTICS
+#endif
+
+/* Default configuration for SKB_REUSE: 0 - Disabled, 1 - Enabled */
+#define MV_ETH_SKB_REUSE_DEFAULT    0
+/* Default configuration for TX_EN workaround: 0 - Disabled, 1 - Enabled */
+#define MV_ETH_TX_EN_DEFAULT        1
+
+/* un-comment if you want to perform tx_done from within the poll function */
+/* #define ETH_TX_DONE_ISR */
+
+/* put descriptors in uncached memory */
+/* #define ETH_DESCR_UNCACHED */
+
+/* Descriptors location: DRAM/internal-SRAM */
+#define ETH_DESCR_IN_SDRAM
+#undef  ETH_DESCR_IN_SRAM    /* No integrated SRAM in 88Fxx81 devices */
+
+#if defined(ETH_DESCR_IN_SRAM)
+#if defined(ETH_DESCR_UNCACHED)
+ #define ETH_DESCR_CONFIG_STR    "Uncached descriptors in integrated SRAM"
+#else
+ #define ETH_DESCR_CONFIG_STR    "Cached descriptors in integrated SRAM"
+#endif
+#elif defined(ETH_DESCR_IN_SDRAM)
+#if defined(ETH_DESCR_UNCACHED)
+ #define ETH_DESCR_CONFIG_STR    "Uncached descriptors in DRAM"
+#else
+ #define ETH_DESCR_CONFIG_STR    "Cached descriptors in DRAM"
+#endif
+#else 
+ #error "Ethernet descriptors location undefined"
+#endif /* ETH_DESCR_IN_SRAM or ETH_DESCR_IN_SDRAM*/
+
+
+#define ETHER_DRAM_COHER    MV_CACHE_COHER_SW   /* No HW coherency in 88Fxx81 devices */
+
+#if (ETHER_DRAM_COHER == MV_CACHE_COHER_HW_WB)
+ #define ETH_SDRAM_CONFIG_STR    "DRAM HW cache coherency (write-back)"
+#elif (ETHER_DRAM_COHER == MV_CACHE_COHER_HW_WT)
+ #define ETH_SDRAM_CONFIG_STR    "DRAM HW cache coherency (write-through)"
+#elif (ETHER_DRAM_COHER == MV_CACHE_COHER_SW)
+ #define ETH_SDRAM_CONFIG_STR    "DRAM SW cache-coherency"
+#elif (ETHER_DRAM_COHER == MV_UNCACHED)
+#   define ETH_SDRAM_CONFIG_STR  "DRAM uncached"
+#else
+ #error "Ethernet-DRAM undefined"
+#endif /* ETHER_DRAM_COHER */
+
+
+/****************************************************************/
+/************* Ethernet driver configuration ********************/
+/****************************************************************/
+
+/* port's default queueus */
+#define ETH_DEF_TXQ         0
+#define ETH_DEF_RXQ         0 
+
+#define MV_ETH_RX_Q_NUM     CONFIG_MV_ETH_RX_Q_NUM
+#define MV_ETH_TX_Q_NUM     CONFIG_MV_ETH_TX_Q_NUM
+
+/* interrupt coalescing setting */
+#define ETH_TX_COAL    		    200
+#define ETH_RX_COAL    		    200
+
+/* Checksum offloading */
+#define TX_CSUM_OFFLOAD
+#define RX_CSUM_OFFLOAD
+
+/* a few extra Tx descriptors, because we stop the interface for Tx in advance */
+#define MV_ETH_EXTRA_TX_DESCR	    20 
+
+#if (MV_ETH_RX_Q_NUM > 1)
+#define ETH_NUM_OF_RX_DESCR         64
+#define ETH_RX_QUEUE_QUOTA	    32   /* quota per Rx Q */
+#else
+#define ETH_NUM_OF_RX_DESCR         128
+#endif
+
+#define ETH_NUM_OF_TX_DESCR         (ETH_NUM_OF_RX_DESCR*4 + MV_ETH_EXTRA_TX_DESCR)
+
+#endif /* CONFIG_MV_INCLUDE_GIG_ETH */
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/config/mvSysNfcConfig.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/config/mvSysNfcConfig.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+*******************************************************************************/
+/*******************************************************************************
+* mvSysNfcConfig.h - Marvell NAND flash conroller unit specific configurations
+*
+* DESCRIPTION:
+*       None.
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+#include "mvSysHwConfig.h"
+
+/*
+** Base address for Nand Controller registers.
+*/
+#define MV_NFC_REGS_BASE		(MV_NFC_REGS_OFFSET)
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/config/mvSysPdmaConfig.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/config/mvSysPdmaConfig.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+*******************************************************************************/
+/*******************************************************************************
+* mvSysPdmaConfig.h - Marvell PDMA unit specific configurations
+*
+* DESCRIPTION:
+*       None.
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+#include "mvSysHwConfig.h"
+
+/*
+** Base address for PDMA registers.
+*/
+#define MV_PDMA_REGS_BASE	(MV_PDMA_REGS_OFFSET)
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/config/mvSysAc97Config.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/config/mvSysAc97Config.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+*******************************************************************************/
+/*******************************************************************************
+* mvSysAc97Config.h - Marvell AC97 unit specific configurations
+*
+* DESCRIPTION:
+*       None.
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+#include "mvSysHwConfig.h"
+
+/*
+** Base address for AC'97 registers.
+*/
+#define MV_AC97_REGS_BASE 	(MV_AC97_REGS_OFFSET)
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/config/mvSysHwConfig.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/config/mvSysHwConfig.h
@@ -0,0 +1,271 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+*******************************************************************************/
+/*******************************************************************************
+* mvSysHwCfg.h - Marvell system HW configuration file
+*
+* DESCRIPTION:
+*       None.
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+#ifndef __INCmvSysHwConfigh
+#define __INCmvSysHwConfigh
+
+//#include "../../../../include/linux/autoconf.h"
+
+#define CONFIG_MARVELL	1
+
+/* includes */
+#define _1K         0x00000400
+#define _4K         0x00001000
+#define _8K         0x00002000
+#define _16K        0x00004000
+#define _32K        0x00008000
+#define _64K        0x00010000
+#define _128K       0x00020000
+#define _256K       0x00040000
+#define _512K       0x00080000
+
+#define _1M         0x00100000
+#define _2M         0x00200000
+#define _4M         0x00400000
+#define _8M         0x00800000
+#define _16M        0x01000000
+#define _32M        0x02000000
+#define _64M        0x04000000
+#define _128M       0x08000000
+#define _256M       0x10000000
+#define _512M       0x20000000
+
+#define _1G         0x40000000
+#define _2G         0x80000000
+
+/****************************************/
+/* Soc supporeted Units definitions	*/
+/****************************************/
+
+#ifdef CONFIG_MV_INCLUDE_PEX
+#define MV_INCLUDE_PEX
+#endif
+#ifdef CONFIG_MV_INCLUDE_TWSI
+#define MV_INCLUDE_TWSI
+#endif
+#ifdef CONFIG_MV_INCLUDE_CESA
+#define MV_INCLUDE_CESA
+#endif
+#ifdef CONFIG_MV_INCLUDE_GIG_ETH
+#define MV_INCLUDE_GIG_ETH
+#endif
+#ifdef CONFIG_MV_INCLUDE_INTEG_SATA
+#define MV_INCLUDE_INTEG_SATA
+#define MV_INCLUDE_SATA
+#define SATA_IRQ_NUM           62
+#endif
+#ifdef CONFIG_MV_INCLUDE_USB
+#define MV_INCLUDE_USB
+#define IRQ_USB_CTRL(dev_no)	(IRQ_DOVE_USB0 + (dev_no))
+#define MV_USB_VOLTAGE_FIX
+#endif
+#ifdef CONFIG_MV_INCLUDE_NAND
+#define MV_INCLUDE_NAND
+#endif
+#ifdef CONFIG_MV_INCLUDE_TDM
+#define MV_INCLUDE_TDM
+#endif
+#ifdef CONFIG_MV_INCLUDE_XOR
+#define MV_INCLUDE_XOR
+#endif
+#ifdef CONFIG_MV_INCLUDE_TWSI
+#define MV_INCLUDE_TWSI
+#endif
+#ifdef CONFIG_MV_INCLUDE_UART
+#define MV_INCLUDE_UART
+#endif
+#ifdef CONFIG_MV_INCLUDE_SPI
+#define MV_INCLUDE_SPI
+#endif
+#ifdef CONFIG_MV_INCLUDE_SFLASH_MTD
+#define MV_INCLUDE_SFLASH_MTD
+#endif
+#ifdef CONFIG_MV_INCLUDE_AUDIO
+#define MV_INCLUDE_AUDIO
+#endif
+#ifdef CONFIG_MV_INCLUDE_TS
+#define MV_INCLUDE_TS
+#endif
+#ifdef CONFIG_MV_INCLUDE_SDIO
+#define MV_INCLUDE_SDIO
+#endif
+
+
+/* NAND flash stuff */
+#ifdef CONFIG_MV_NAND_BOOT
+#define MV_NAND_BOOT
+#endif
+#ifdef CONFIG_MV_NAND
+#define MV_NAND
+#endif
+
+/* SW Sync-Barrier: not relevant for 88fxx81*/
+/* Reasnable to define this macro when descriptors in SRAM and buffers in DRAM */
+/* In RX the CPU theoretically might see himself as the descriptor owner,      */
+/* although the buffer hadn't been written to DRAM yet. Performance cost.      */
+/* #define INCLUDE_SYNC_BARR */
+
+/* Buffers cache coherency method (buffers in DRAM) */
+#ifndef MV_CACHE_COHER_SW
+/* Taken from mvCommon.h */
+/* Memory uncached, HW or SW cache coherency is not needed */
+#define MV_UNCACHED             0   
+/* Memory cached, HW cache coherency supported in WriteThrough mode */
+#define MV_CACHE_COHER_HW_WT    1
+/* Memory cached, HW cache coherency supported in WriteBack mode */
+#define MV_CACHE_COHER_HW_WB    2
+/* Memory cached, No HW cache coherency, Cache coherency must be in SW */
+#define MV_CACHE_COHER_SW       3
+
+#endif
+
+/* DRAM cache coherency configuration */
+#define MV_CACHE_COHERENCY  MV_CACHE_COHER_SW
+
+
+
+/****************************************************************/
+/************* General    configuration ********************/
+/****************************************************************/
+
+/* Enable Clock Power Control */
+#define MV_INCLUDE_CLK_PWR_CNTRL
+
+/* Disable the DEVICE BAR in the PEX */
+#define MV_DISABLE_PEX_DEVICE_BAR
+
+/* Allow the usage of early printings during initialization */
+#define MV_INCLUDE_EARLY_PRINTK
+
+/****************************************************************/
+/************* CESA configuration ********************/
+/****************************************************************/
+
+#ifdef MV_INCLUDE_CESA
+
+#define MV_CESA_MAX_CHAN               4
+
+/* Use 2K of SRAM */
+#define MV_CESA_MAX_BUF_SIZE           1600
+
+#endif /* MV_INCLUDE_CESA */
+
+#define IRQ_GPP_START IRQ_DOVE_GPIO_START
+
+/****************************************************************/
+/*************** Telephony configuration ************************/
+/****************************************************************/
+#if defined(CONFIG_MV_TDM_LINEAR_MODE)
+ #define MV_TDM_LINEAR_MODE
+#elif defined(CONFIG_MV_TDM_ULAW_MODE)
+ #define MV_TDM_ULAW_MODE
+#endif
+
+
+
+/* Following the pre-configuration registers default values restored after    */
+/* auto-detection is done                                                     */
+#define DRAM_BUF_REG_DV 0
+
+/* System Mapping */
+#define SDRAM_CS0_BASE  0x00000000
+#define SDRAM_CS0_SIZE  _256M
+
+#define SDRAM_CS1_BASE  0x10000000
+#define SDRAM_CS1_SIZE  _256M
+
+#define SDRAM_CS2_BASE  0x20000000
+#define SDRAM_CS2_SIZE  _256M
+
+#define SDRAM_CS3_BASE  0x30000000
+#define SDRAM_CS3_SIZE  _256M
+
+/* PEX */
+#define PEX0_MEM_BASE 0xe8000000
+#define PEX0_MEM_SIZE _128M
+
+#define PEX0_IO_BASE 0xf2000000
+#define PEX0_IO_SIZE _1M
+
+/* Device Chip Selects */
+#define NFLASH_CS_BASE 0xfa000000
+#define NFLASH_CS_SIZE _2M
+
+#define SPI_CS_BASE 0xf4000000
+#define SPI_CS_SIZE _16M
+
+#define CRYPT_ENG_BASE	0xf0000000
+#define CRYPT_ENG_SIZE	_2M
+
+#define BOOTDEV_CS_BASE	0xff800000
+#define BOOTDEV_CS_SIZE _8M
+
+/* CS2 - BOOTROM */
+#define DEVICE_CS2_BASE 0xff900000
+#define DEVICE_CS2_SIZE _1M
+
+/* PEX Work arround */
+/* the target we will use for the workarround */
+#define PEX_CONFIG_RW_WA_TARGET PEX0_MEM
+/*a flag that indicates if we are going to use the 
+size and base of the target we using for the workarround
+window */
+#define PEX_CONFIG_RW_WA_USE_ORIGINAL_WIN_VALUES 1
+/* if the above flag is 0 then the following values
+will be used for the workarround window base and size,
+otherwise the following defines will be ignored */
+#define PEX_CONFIG_RW_WA_BASE 0xF3000000
+#define PEX_CONFIG_RW_WA_SIZE _16M
+
+/* Internal registers: size is defined in Controllerenvironment */
+//#define INTER_REGS_BASE	0xF1000000
+#define INTER_REGS_BASE 	DOVE_SB_REGS_VIRT_BASE
+#define MV_CPUIF_REGS_BASE	(MV_CPUIF_REGS_OFFSET)
+#define MV_MISC_REGS_BASE	(MV_MISC_REGS_OFFSET)
+
+/* DRAM detection stuff */
+#define MV_DRAM_AUTO_SIZE
+
+/* Board clock detection */
+#define TCLK_AUTO_DETECT    	/* Use Tclk auto detection   */
+#define SYSCLK_AUTO_DETECT	/* Use SysClk auto detection */
+#define PCLCK_AUTO_DETECT  	/* Use PClk auto detection   */
+#define L2CLK_AUTO_DETECT 	/* Use L2Clk auto detection   */
+
+/* PEX-PCI\PCI-PCI Bridge*/
+#define PCI0_IF_PTP		0		/* Bridge exist on pciIf0*/
+
+/* PMU Address definitions */
+#define PMU_SCRATCHPAD_EXT_BASE	(DOVE_SCRATCHPAD_VIRT_BASE + 0xC000)
+#define PMU_SCRATCHPAD_INT_BASE	(DOVE_SB_REGS_VIRT_BASE + MV_PMU_REGS_OFFSET + 0xC000)					 
+#define PMU_SCRATCHPAD_INT_BASE_PHYS	(DOVE_SB_REGS_PHYS_BASE + MV_PMU_REGS_OFFSET + 0xC000)
+
+#endif /* __INCmvSysHwConfigh */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/config/mvSysCamConfig.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/config/mvSysCamConfig.h
@@ -0,0 +1,37 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+*******************************************************************************/
+/*******************************************************************************
+* mvSysCamConfig.h - Marvell Camera Contoller unit specific configurations
+*
+* DESCRIPTION:
+*       None.
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+#include "mvSysHwConfig.h"
+
+/*
+** Base address for audio registers.
+*/
+#define MV_CAMERA_REGS_BASE(unit) 	(MV_CAMERA_REGS_OFFSET(unit))
+#define MV_CAFE_REGS_BASE		(MV_CAFE_REGS_OFFSET)
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/config/mvSysPciIfConfig.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/config/mvSysPciIfConfig.h
@@ -0,0 +1,71 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+*******************************************************************************/
+/*******************************************************************************
+* mvSysPciIfConfig.h - Marvell PCI / Pex units specific configurations
+*
+* DESCRIPTION:
+*       None.
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+#include "mvSysHwConfig.h"
+
+/*
+** Base address for Pex registers.
+*/
+#define MV_PEX_IF_REGS_BASE(unit) 		(MV_PEX_IF_REGS_OFFSET(unit))
+
+/* PEX-PCI\PCI-PCI Bridge*/
+#define PCI0_IF_PTP		0		/* no Bridge on pciIf0*/
+#define PCI1_IF_PTP		0		/* no Bridge on pciIf1*/
+
+
+#if defined (MV_INCLUDE_PEX)
+#define PCI_IF0_MEM0_BASE 	PEX0_MEM_BASE
+#define PCI_IF0_MEM0_SIZE 	PEX0_MEM_SIZE
+#define PCI_IF0_IO_BASE 	PEX0_IO_BASE
+#define PCI_IF0_IO_SIZE 	PEX0_IO_SIZE
+
+#define PCI_IF1_MEM0_BASE 	PEX1_MEM_BASE
+#define PCI_IF1_MEM0_SIZE 	PEX1_MEM_SIZE
+#define PCI_IF1_IO_BASE 	PEX1_IO_BASE
+#define PCI_IF1_IO_SIZE 	PEX1_IO_SIZE
+#endif
+
+
+
+/* PEX Work arround */
+/* the target we will use for the workarround */
+#define PEX_CONFIG_RW_WA_TARGET PEX0_MEM
+/*a flag that indicates if we are going to use the 
+size and base of the target we using for the workarround
+window */
+#define PEX_CONFIG_RW_WA_USE_ORIGINAL_WIN_VALUES 1
+/* if the above flag is 0 then the following values
+will be used for the workarround window base and size,
+otherwise the following defines will be ignored */
+#define PEX_CONFIG_RW_WA_BASE 0x50000000
+#define PEX_CONFIG_RW_WA_SIZE _16M
+
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/config/mvSysCntmrConfig.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/config/mvSysCntmrConfig.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+*******************************************************************************/
+/*******************************************************************************
+* mvSysCntmrConfig.h - Marvell Counter Manager unit specific configurations
+*
+* DESCRIPTION:
+*       None.
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+#include "mvSysHwConfig.h"
+
+/*
+** Base address for counter manager registers.
+*/
+#define MV_CNTMR_REGS_BASE		(MV_CNTMR_REGS_OFFSET)
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-dove/mv_hal_support/config/mvSysGppConfig.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-dove/mv_hal_support/config/mvSysGppConfig.h
@@ -0,0 +1,37 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+*******************************************************************************/
+/*******************************************************************************
+* mvSysGppConfig.h - Marvell GPP unit specific configurations
+*
+* DESCRIPTION:
+*       None.
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+#include "mvSysHwConfig.h"
+
+/*
+** Base address for GPP registers.
+*/
+#define MV_GPP_REGS_BASE(unit)		(MV_GPP_REGS_OFFSET(unit))
+#define MV_GPP_REGS_BASE_0		(MV_GPP_REGS_OFFSET_0)
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-davinci/dm646x.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-davinci/dm646x.c
@@ -789,7 +789,14 @@
 		.part_no	= 0xb770,
 		.manufacturer	= 0x017,
 		.cpu_id		= DAVINCI_CPU_ID_DM6467,
-		.name		= "dm6467",
+		.name		= "dm6467_rev1.x",
+	},
+	{
+		.variant	= 0x1,
+		.part_no	= 0xb770,
+		.manufacturer	= 0x017,
+		.cpu_id		= DAVINCI_CPU_ID_DM6467,
+		.name		= "dm6467_rev3.x",
 	},
 };
 
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-davinci/board-dm365-evm.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-davinci/board-dm365-evm.c
@@ -413,7 +413,7 @@
 	 */
 	if (have_imager()) {
 		label = "HD imager";
-		mux |= 1;
+		mux |= 2;
 
 		/* externally mux MMC1/ENET/AIC33 to imager */
 		mux |= BIT(6) | BIT(5) | BIT(3);
@@ -434,7 +434,7 @@
 		resets &= ~BIT(1);
 
 		if (have_tvp7002()) {
-			mux |= 2;
+			mux |= 1;
 			resets &= ~BIT(2);
 			label = "tvp7002 HD";
 		} else {
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-at91/at91sam9g45_devices.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -46,7 +46,7 @@
 		.end	= AT91_BASE_SYS + AT91_DMA + SZ_512 - 1,
 		.flags	= IORESOURCE_MEM,
 	},
-	[2] = {
+	[1] = {
 		.start	= AT91SAM9G45_ID_DMA,
 		.end	= AT91SAM9G45_ID_DMA,
 		.flags	= IORESOURCE_IRQ,
--- linux-mvl-dove-2.6.32.orig/arch/arm/tools/mach-types
+++ linux-mvl-dove-2.6.32/arch/arm/tools/mach-types
@@ -1776,10 +1776,15 @@
 wdg002			MACH_WDG002		WDG002			1785
 sg560adsl		MACH_SG560ADSL		SG560ADSL		1786
 nextio_n2800_ica	MACH_NEXTIO_N2800_ICA	NEXTIO_N2800_ICA	1787
-marvell_newdb		MACH_MARVELL_NEWDB	MARVELL_NEWDB		1789
+dove_db                 MACH_DOVE_DB            DOVE_DB                 1788
+dove_db_z0              MACH_DOVE_DB_Z0         DOVE_DB_Z0              1788
+dove_rd                 MACH_DOVE_RD            DOVE_RD                 1789
+dove_rd_avng		MACH_DOVE_RD_AVNG	DOVE_RD_AVNG		1789
+dove_rd_avng_z0		MACH_DOVE_RD_AVNG_Z0	DOVE_RD_AVNG_Z0		1789
 vandihud		MACH_VANDIHUD		VANDIHUD		1790
+dove_rd_avng_nb_z0	MACH_DOVE_RD_AVNG_NB_Z0	DOVE_RD_AVNG_NB_Z0	1791
 magx_e8			MACH_MAGX_E8		MAGX_E8			1791
-magx_z6			MACH_MAGX_Z6		MAGX_Z6			1792
+dove_db_b		MACH_DOVE_DB_B		DOVE_DB_B		1792
 magx_v8			MACH_MAGX_V8		MAGX_V8			1793
 magx_u9			MACH_MAGX_U9		MAGX_U9			1794
 toughcf08		MACH_TOUGHCF08		TOUGHCF08		1795
@@ -2535,4 +2540,5 @@
 c3ax03			MACH_C3AX03		C3AX03			2549
 mxt_td60		MACH_MXT_TD60		MXT_TD60		2550
 esyx			MACH_ESYX		ESYX			2551
+videoplug		MACH_DOVE_VIDEOPLUG	DOVE_VIDEOPLUG		2552
 bulldog			MACH_BULLDOG		BULLDOG			2553
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/Kconfig
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/Kconfig
@@ -1,5 +1,20 @@
 if ARCH_KIRKWOOD
 
+config  MV88F6281
+	bool
+	default y
+
+config  MV_HAL_DRIVERS
+	bool "Use the Marvell HAL drivers"
+	default n
+
+config  MV_HAL_RULES_PATH
+        string "path of the mvRules.mk file for HAL drivers"
+	depends on MV_HAL_DRIVERS
+        default "arch/arm/mach-kirkwood/mv_hal_support/mvRules.mk"
+        ---help---
+	
+
 menu "Marvell Kirkwood Implementations"
 
 config MACH_DB88F6281_BP
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c
@@ -16,6 +16,7 @@
 #include <linux/spi/flash.h>
 #include <linux/spi/spi.h>
 #include <linux/spi/orion_spi.h>
+#include <mach/gpio.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <mach/kirkwood.h>
@@ -53,8 +54,16 @@
 	 */
 	kirkwood_init();
 
+	orion_gpio_set_valid(RD88F6192_GPIO_USB_VBUS, 1);
+	if (gpio_request(RD88F6192_GPIO_USB_VBUS, "USB VBUS") != 0 ||
+	    gpio_direction_output(RD88F6192_GPIO_USB_VBUS, 1) != 0)
+		pr_err("RD-88F6192-NAS: failed to setup USB VBUS GPIO\n");
+
 	kirkwood_ehci_init();
 	kirkwood_ge00_init(&rd88f6192_ge00_data);
+#ifdef CONFIG_MV_ETHERNET
+	kirkwood_eth0_init();
+#endif
 	kirkwood_sata_init(&rd88f6192_sata_data);
 	spi_register_board_info(rd88F6192_spi_slave_info,
 				ARRAY_SIZE(rd88F6192_spi_slave_info));
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
@@ -11,6 +11,11 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
+#include <linux/pci.h>
+#include <linux/irq.h>
+#include <linux/i2c.h>
+#include <linux/mtd/physmap.h>
+#include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
 #include <linux/ata_platform.h>
 #include <linux/mv643xx_eth.h>
@@ -18,6 +23,7 @@
 #include <asm/mach/arch.h>
 #include <mach/kirkwood.h>
 #include <plat/mvsdio.h>
+#include <plat/orion_nand.h>
 #include "common.h"
 #include "mpp.h"
 
@@ -37,6 +43,34 @@
 	},
 };
 
+static struct resource db88f6281_nand_resource = {
+	.flags		= IORESOURCE_MEM,
+	.start		= KIRKWOOD_NAND_MEM_PHYS_BASE,
+	.end		= KIRKWOOD_NAND_MEM_PHYS_BASE +
+			  KIRKWOOD_NAND_MEM_SIZE - 1,
+};
+
+static struct orion_nand_data db88f6281_nand_data = {
+	.parts		= db88f6281_nand_parts,
+	.nr_parts	= ARRAY_SIZE(db88f6281_nand_parts),
+	.cle		= 0,
+	.ale		= 1,
+	.width		= 8,
+	.chip_delay	= 25,
+};
+
+static struct platform_device db88f6281_nand_flash = {
+	.name		= "orion_nand",
+	.id		= -1,
+	.dev		= {
+		.platform_data	= &db88f6281_nand_data,
+	},
+	.resource	= &db88f6281_nand_resource,
+	.num_resources	= 1,
+};
+#ifdef CONFIG_MV_ETHERNET
+#include "../plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_network/mv_ethernet/mv_netdev.h"
+#endif
 static struct mv643xx_eth_platform_data db88f6281_ge00_data = {
 	.phy_addr	= MV643XX_ETH_PHY_ADDR(8),
 };
@@ -56,6 +90,10 @@
 	0
 };
 
+static struct i2c_board_info __initdata i2c_a2d = {
+	I2C_BOARD_INFO("cs42l51", 0x4A),
+};
+
 static void __init db88f6281_init(void)
 {
 	/*
@@ -67,9 +105,17 @@
 	kirkwood_nand_init(ARRAY_AND_SIZE(db88f6281_nand_parts), 25);
 	kirkwood_ehci_init();
 	kirkwood_ge00_init(&db88f6281_ge00_data);
+#ifdef CONFIG_MV_ETHERNET
+	kirkwood_eth0_init();
+#endif
 	kirkwood_sata_init(&db88f6281_sata_data);
 	kirkwood_uart0_init();
 	kirkwood_sdio_init(&db88f6281_mvsdio_data);
+	
+	kirkwood_i2c_init();
+	kirkwood_i2s_init();
+	platform_device_register(&db88f6281_nand_flash);
+	i2c_register_board_info(0, &i2c_a2d, 1);
 }
 
 static int __init db88f6281_pci_init(void)
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/rd88f6281-setup.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/rd88f6281-setup.c
@@ -14,6 +14,7 @@
 #include <linux/irq.h>
 #include <linux/mtd/partitions.h>
 #include <linux/ata_platform.h>
+#include <linux/i2c.h>
 #include <linux/mv643xx_eth.h>
 #include <linux/ethtool.h>
 #include <net/dsa.h>
@@ -21,6 +22,9 @@
 #include <asm/mach/arch.h>
 #include <mach/kirkwood.h>
 #include <plat/mvsdio.h>
+#include <plat/orion_nand.h>
+#include <asm/gpio.h>
+#include <plat/gpio.h>
 #include "common.h"
 #include "mpp.h"
 
@@ -76,6 +80,13 @@
 	0
 };
 
+/*****************************************************************************
+ * A2D on I2C bus
+ ****************************************************************************/
+static struct i2c_board_info __initdata i2c_a2d = {
+	I2C_BOARD_INFO("cs42l51", 0x4A),
+};
+
 static void __init rd88f6281_init(void)
 {
 	u32 dev, rev;
@@ -102,6 +113,10 @@
 	kirkwood_sata_init(&rd88f6281_sata_data);
 	kirkwood_sdio_init(&rd88f6281_mvsdio_data);
 	kirkwood_uart0_init();
+	kirkwood_uart1_init();
+	kirkwood_i2c_init();
+	i2c_register_board_info(0, &i2c_a2d, 1);
+	kirkwood_i2s_init();
 }
 
 static int __init rd88f6281_pci_init(void)
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/Makefile
@@ -9,3 +9,8 @@
 obj-$(CONFIG_MACH_OPENRD_BASE)		+= openrd_base-setup.o
 
 obj-$(CONFIG_CPU_IDLE)			+= cpuidle.o
+ifeq ($(CONFIG_MV_HAL_DRIVERS),y)
+include $(srctree)/$(subst ",,$(CONFIG_MV_HAL_RULES_PATH))
+endif
+
+obj-$(CONFIG_MV_HAL_DRIVERS)		+= mv_hal_support/
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/common.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/common.c
@@ -29,9 +29,12 @@
 #include <plat/ehci-orion.h>
 #include <plat/mvsdio.h>
 #include <plat/mv_xor.h>
+#include <plat/i2s-orion.h>
 #include <plat/orion_nand.h>
 #include <plat/orion_wdt.h>
 #include <plat/time.h>
+#include <plat/mv_eth.h>
+#include <asm/mach-types.h>
 #include "common.h"
 
 /*****************************************************************************
@@ -63,7 +66,6 @@
  */
 unsigned int kirkwood_clk_ctrl = CGC_DUNIT | CGC_RESERVED;
 	
-
 /*****************************************************************************
  * EHCI
  ****************************************************************************/
@@ -107,8 +109,38 @@
 	kirkwood_clk_ctrl |= CGC_USB0;
 	platform_device_register(&kirkwood_ehci);
 }
+#ifdef CONFIG_MV_ETHERNET
+#include "../plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_network/mv_ethernet/mv_netdev.h"
 
+/*****************************************************************************
+ * Ethernet
+ ****************************************************************************/
+static struct mv_netdev_platform_data kirkwood_eth0_data = {
+	.port_number = 0
+};
 
+static struct resource kirkwood_eth0_resources[] = {
+	{
+		.name	= "eth irq",
+		.start	= IRQ_KIRKWOOD_GE00_SUM,
+		.end	= IRQ_KIRKWOOD_GE00_SUM,
+		.flags	= IORESOURCE_IRQ,
+	}
+};
+
+static struct platform_device kirkwood_eth0 = {
+	.name		= MV_NETDEV_ETH_NAME,
+	.id		= 0,
+	.num_resources	= 1,
+	.resource	= kirkwood_eth0_resources,
+};
+
+void __init kirkwood_eth0_init(void)
+{
+	kirkwood_eth0.dev.platform_data = &kirkwood_eth0_data;
+	platform_device_register(&kirkwood_eth0);
+}
+#endif
 /*****************************************************************************
  * GE00
  ****************************************************************************/
@@ -159,6 +191,20 @@
 	},
 };
 
+struct mv_eth_addr_dec_platform_data kirkwood_eth_addr_dec_data = {
+	.dram		= &kirkwood_mbus_dram_info,
+};
+
+static struct platform_device kirkwood_eth_addr_dec = {
+	.name		= MV_ETH_ADDR_DEC_NAME,
+	.id		= 0,
+	.dev		= {
+		.platform_data	= &kirkwood_eth_addr_dec_data,
+	},
+	.num_resources	= 0,
+};
+
+
 void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
 {
 	kirkwood_clk_ctrl |= CGC_GE0;
@@ -167,6 +213,7 @@
 
 	platform_device_register(&kirkwood_ge00_shared);
 	platform_device_register(&kirkwood_ge00);
+	platform_device_register(&kirkwood_eth_addr_dec);
 }
 
 
@@ -804,6 +851,54 @@
 	platform_device_register(&kirkwood_xor11_channel);
 }
 
+/*****************************************************************************
+ * I2S
+ ****************************************************************************/
+static struct resource kirkwood_i2s_resources[] = {
+	[0] = {
+		.start  = I2S_PHYS_BASE,
+		.end    = I2S_PHYS_BASE + SZ_16K -1,
+		.flags  = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start  = IRQ_KIRKWOOD_I2S,
+		.end    = IRQ_KIRKWOOD_I2S,
+		.flags  = IORESOURCE_IRQ,
+	}
+};
+
+static u64 kirkwood_i2s_dmamask = 0xFFFFFFFFUL;
+
+static struct orion_i2s_platform_data i2s_data = {
+	.i2s_play	= 1,
+	.i2s_rec	= 1,
+	.spdif_play	= 1,
+};
+
+ 
+static struct platform_device kirkwood_i2s = {
+	.name           = "mv88fx_snd",
+	.id             = -1,
+	.dev            = {
+		.dma_mask = &kirkwood_i2s_dmamask,
+		.coherent_dma_mask = 0xFFFFFFFF,
+	},
+	.num_resources  = ARRAY_SIZE(kirkwood_i2s_resources),
+	.resource       = kirkwood_i2s_resources,
+};
+
+static struct platform_device kirkwood_mv88fx_i2s = {
+	.name           = "mv88fx-i2s",
+	.id             = -1,
+};
+
+void __init kirkwood_i2s_init(void)
+{
+	platform_device_register(&kirkwood_mv88fx_i2s);
+	i2s_data.dram = &kirkwood_mbus_dram_info;
+	kirkwood_i2s.dev.platform_data = &i2s_data;
+	platform_device_register(&kirkwood_i2s);
+}
 
 /*****************************************************************************
  * Watchdog
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/common.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/common.h
@@ -29,6 +29,9 @@
 
 void kirkwood_pcie_id(u32 *dev, u32 *rev);
 
+
+void kirkwood_pcie_id(u32 *dev, u32 *rev);
+
 void kirkwood_ehci_init(void);
 void kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data);
 void kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data);
@@ -43,6 +46,8 @@
 void kirkwood_nand_init(struct mtd_partition *parts, int nr_parts, int delay);
 
 extern int kirkwood_tclk;
+void kirkwood_i2s_init(void);
+void kirkwood_eth0_init(void);
 extern struct sys_timer kirkwood_timer;
 
 #define ARRAY_AND_SIZE(x)	(x), ARRAY_SIZE(x)
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/include/mach/kirkwood.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/include/mach/kirkwood.h
@@ -96,6 +96,7 @@
 
 #define SDIO_PHYS_BASE		(KIRKWOOD_REGS_PHYS_BASE | 0x90000)
 
+#define I2S_PHYS_BASE		(KIRKWOOD_REGS_PHYS_BASE | 0xA0000)
 /*
  * Supported devices and revisions.
  */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/include/mach/gpio.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/include/mach/gpio.h
@@ -1,5 +1,5 @@
 /*
- * arch/asm-arm/mach-kirkwood/include/mach/gpio.h
+ * include/asm-arm/arch-kirkwood/gpio.h
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2.  This program is licensed "as is" without any
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/mvKW_HAL_glue.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/mvKW_HAL_glue.c
@@ -0,0 +1,571 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+*******************************************************************************/
+/*******************************************************************************
+* mvKW_HAL_glue - 
+*
+* DESCRIPTION:
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+#include "mvOs.h"
+#include "mvCommon.h"
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "cpu/mvCpu.h"
+#ifdef CONFIG_MV_ETHERNET
+#include "eth/mvEth.h"
+#endif
+//#include "ctrlEnv/sys/mvCpuIf.h"
+
+/*******************************************************************************
+* mvCtrlEthMaxPortGet - Get Marvell controller number of etherent ports.
+*
+* DESCRIPTION:
+*       This function returns Marvell controller number of etherent port.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       Marvell controller number of etherent port.
+*
+*******************************************************************************/
+#if 1
+MV_U32 mvCtrlEthMaxPortGet(MV_VOID)
+{
+#if 0	
+	MV_U32 devId;
+
+	devId = mvCtrlModelGet();
+
+	switch(devId){
+		case MV_6281_DEV_ID:
+			return MV_6281_ETH_MAX_PORTS;
+			break;
+		case MV_6192_DEV_ID:
+			return MV_6192_ETH_MAX_PORTS;
+			break;
+		case MV_6180_DEV_ID:
+			return MV_6180_ETH_MAX_PORTS;
+			break;		
+	}
+	return 0;
+#else
+	return 1;
+#endif
+}
+
+/*******************************************************************************
+* mvCtrlModelGet - Get Marvell controller device model (Id)
+*
+* DESCRIPTION:
+*       This function returns 16bit describing the device model (ID) as defined
+*       in PCI Device and Vendor ID configuration register offset 0x0.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       16bit desscribing Marvell controller ID 
+*
+*******************************************************************************/
+MV_U16 mvCtrlModelGet(MV_VOID)
+{
+	MV_U32 devId;
+	
+	devId = MV_REG_READ(CHIP_BOND_REG);
+	devId &= PCKG_OPT_MASK;
+
+	switch(devId){
+		case 2:
+			return	MV_6281_DEV_ID;
+			break;
+		case 1:
+			return	MV_6192_DEV_ID;
+			break;
+		case 0:
+			return	MV_6180_DEV_ID;
+			break;
+	}
+
+	return 0;
+}
+MV_U8 mvCtrlRevGet(MV_VOID)
+{
+     return 0;
+}
+//EXPORT_SYMBOL(mvCtrlEthMaxPortGet);
+#endif
+/*******************************************************************************
+* mvBoardTclkGet - Get the board Tclk (Controller clock)
+*
+* DESCRIPTION:
+*       This routine extract the controller core clock.
+*       This function uses the controller counters to make identification.
+*		Note: In order to avoid interference, make sure task context switch
+*		and interrupts will not occure during this function operation
+*
+* INPUT:
+*       countNum - Counter number.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       32bit clock cycles in Hertz.
+*
+*******************************************************************************/
+MV_U32 mvBoardTclkGet(MV_VOID)
+{
+#if defined(TCLK_AUTO_DETECT)
+	MV_U32 tmpTClkRate = 166666667;
+
+        tmpTClkRate = MV_REG_READ(MPP_SAMPLE_AT_RESET);
+        tmpTClkRate &= MSAR_TCLCK_MASK;
+
+        switch (tmpTClkRate)
+        {
+        case MSAR_TCLCK_166:
+                tmpTClkRate = MV_BOARD_TCLK_166MHZ;
+                break;
+        case MSAR_TCLCK_200:
+                tmpTClkRate = MV_BOARD_TCLK_200MHZ;
+                break;
+        }
+	return tmpTClkRate;
+#else
+	if(mvCtrlModelGet()==MV_6281_DEV_ID)
+	     return MV_BOARD_TCLK_200MHZ;
+	else
+	     return MV_BOARD_TCLK_166MHZ;
+#endif
+
+}
+
+#include <asm/mach-types.h>
+#ifdef CONFIG_MV_ETHERNET
+/*******************************************************************************
+* mvBoardPhyAddrGet - Get the phy address
+*
+* DESCRIPTION:
+*       This routine returns the Phy address of a given ethernet port.
+*
+* INPUT:
+*       ethPortNum - Ethernet port number.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       32bit describing Phy address, -1 if the port number is wrong.
+*
+*******************************************************************************/
+MV_32 mvBoardPhyAddrGet(MV_U32 ethPortNum)
+{
+#if 0
+	MV_U32 boardId= mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("mvBoardPhyAddrGet: Board unknown.\n");
+		return MV_ERROR;
+	}
+
+	return BOARD_INFO(boardId)->pBoardMacInfo[ethPortNum].boardEthSmiAddr;
+#else
+	MV_U32 ret = 0;
+ 	if(machine_is_rd88f6281())
+	     ret = 0;
+	else if (machine_is_db88f6281_bp())
+	     ret = 8;
+	else if (machine_is_rd88f6192_nas())
+	     ret = 8;
+	else
+	     printk("error in %s: unknown board\n", __func__);
+
+	printk("%s: PhyAddr: %x\n", __func__, ret);
+	return ret;
+#endif
+}
+
+/*******************************************************************************
+* mvBoardMacSpeedGet - Get the Mac speed
+*
+* DESCRIPTION:
+*       This routine returns the Mac speed if pre define of a given ethernet port.
+*
+* INPUT:
+*       ethPortNum - Ethernet port number.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_BOARD_MAC_SPEED, -1 if the port number is wrong.
+*
+*******************************************************************************/
+MV_BOARD_MAC_SPEED      mvBoardMacSpeedGet(MV_U32 ethPortNum)
+{
+#if 0
+	MV_U32 boardId= mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("mvBoardMacSpeedGet: Board unknown.\n");
+		return MV_ERROR;
+	}
+
+	return BOARD_INFO(boardId)->pBoardMacInfo[ethPortNum].boardMacSpeed;
+#else
+ 	if(machine_is_rd88f6281())
+	     return BOARD_MAC_SPEED_1000M;
+	else if (machine_is_db88f6281_bp())
+	     return BOARD_MAC_SPEED_AUTO;
+	else if (machine_is_rd88f6192_nas())
+	     return BOARD_MAC_SPEED_AUTO;
+	else
+	     printk("error in %s: unknown board", __func__);
+
+	return BOARD_MAC_SPEED_AUTO;
+#endif
+}
+
+MV_U8 mvBoardIsSwitchConnected(MV_U32 port)
+{
+     if(machine_is_rd88f6281())
+	  return 1;
+     return 0;
+}
+
+MV_BOOL mvBoardIsPortInSgmii(MV_U32 ethPortNum)
+{
+     return MV_TRUE;
+}
+#if 0
+	/* MV_32 linkStatusIrq, {MV_32 qdPort0, MV_32 qdPort1, MV_32 qdPort2, MV_32 qdPort3, MV_32 qdPort4}, 
+		MV_32 qdCpuPort, MV_32 smiScanMode} */
+	{{35, {4, 0, 1, 2, 3}, 5, 1}};
+#endif
+MV_32	mvBoardLinkStatusIrqGet(MV_U32 ethPortNum)
+{
+     return 35;
+}
+MV_32	mvBoardSwitchPortGet(MV_U32 ethPortNum, MV_U8 boardPortNum)
+{
+     int map[] = {4, 0, 1, 2, 3};
+
+     return map[boardPortNum];
+}
+MV_32	mvBoardSwitchCpuPortGet(MV_U32 ethPortNum)
+{
+     return 5;
+}
+
+MV_32	mvBoardSmiScanModeGet(MV_U32 ethPortNum)
+{
+     return 1;
+}
+
+u32 overEthAddr = 0;
+//u8     mvMacAddr[6] = {0, };
+u8 mvMacAddr[CONFIG_MV_ETH_PORTS_NUM][6]; 
+u16 mvMtu[CONFIG_MV_ETH_PORTS_NUM] = {0};
+
+
+
+void    mvEthInit(void)
+{
+     MV_U32 port;
+
+     /* Power down all existing ports */
+     for(port=0; port<mvCtrlEthMaxPortGet(); port++)
+     {
+
+//	  mvEthWinInit(port);
+#warning "giga unit address decoding not implemented"
+
+     }
+     mvEthHalInit();
+}
+
+#endif
+/*******************************************************************************
+* mvBoardSpecInitGet -
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN: Return MV_TRUE and parameters in case board need spesific phy init, 
+* 	  otherwise return MV_FALSE. 
+*
+*
+*******************************************************************************/
+
+MV_BOOL mvBoardSpecInitGet(MV_U32* regOff, MV_U32* data)
+{
+	return MV_FALSE;
+}
+
+MV_U32 mvCpu6180PclkGet(MV_VOID)
+{
+	MV_U32 	tmpPClkRate=0;
+	MV_CPU_ARM_CLK cpu6180_ddr_l2_CLK[] = MV_CPU6180_DDR_L2_CLCK_TBL;
+
+	tmpPClkRate = MV_REG_READ(MPP_SAMPLE_AT_RESET);
+	tmpPClkRate = tmpPClkRate & MSAR_CPUCLCK_MASK;
+	tmpPClkRate = tmpPClkRate >> MSAR_CPUCLCK_OFFS;
+			
+	tmpPClkRate = cpu6180_ddr_l2_CLK[tmpPClkRate].cpuClk;
+
+	return tmpPClkRate;
+}
+
+MV_U32 mvCpuPclkGet(MV_VOID)
+{
+#if defined(PCLCK_AUTO_DETECT)
+	MV_U32 	tmpPClkRate=0;
+	MV_U32 cpuCLK[] = MV_CPU_CLCK_TBL;
+
+	if(mvCtrlModelGet() == MV_6180_DEV_ID)
+		return mvCpu6180PclkGet();
+
+	tmpPClkRate = MV_REG_READ(MPP_SAMPLE_AT_RESET);
+	tmpPClkRate = tmpPClkRate & MSAR_CPUCLCK_MASK;
+	tmpPClkRate = tmpPClkRate >> MSAR_CPUCLCK_OFFS;
+		
+	tmpPClkRate = cpuCLK[tmpPClkRate];
+
+	return tmpPClkRate;
+#else
+	return MV_DEFAULT_PCLK
+#endif
+}
+/*******************************************************************************
+* mvCtrlPwrClckGet - Get Power State of specific Unit
+*
+* DESCRIPTION:		
+*
+* INPUT:
+*
+* OUTPUT:
+*
+* RETURN:
+******************************************************************************/
+MV_BOOL		mvCtrlPwrClckGet(MV_UNIT_ID unitId, MV_U32 index)
+{
+	MV_U32 reg = MV_REG_READ(POWER_MNG_CTRL_REG);
+	MV_BOOL state = MV_TRUE;
+
+	switch (unitId)
+    {
+#if defined(MV_INCLUDE_PEX)
+	case PEX_UNIT_ID:
+		if ((reg & PMC_PEXSTOPCLOCK_MASK) == PMC_PEXSTOPCLOCK_STOP)
+		{
+			state = MV_FALSE;
+		}
+		else state = MV_TRUE;
+
+		break;
+#endif
+#if defined(MV_INCLUDE_GIG_ETH)
+	case ETH_GIG_UNIT_ID:
+		if ((reg & PMC_GESTOPCLOCK_MASK(index)) == PMC_GESTOPCLOCK_STOP(index))
+		{
+			state = MV_FALSE;
+		}
+		else state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_SATA)
+	case SATA_UNIT_ID:
+		if ((reg & PMC_SATASTOPCLOCK_MASK(index)) == PMC_SATASTOPCLOCK_STOP(index))
+		{
+			state = MV_FALSE;
+		}
+		else state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_CESA)
+	case CESA_UNIT_ID:
+		if ((reg & PMC_SESTOPCLOCK_MASK) == PMC_SESTOPCLOCK_STOP)
+		{
+			state = MV_FALSE;
+		}
+		else state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_USB)
+	case USB_UNIT_ID:
+		if ((reg & PMC_USBSTOPCLOCK_MASK) == PMC_USBSTOPCLOCK_STOP)
+		{
+			state = MV_FALSE;
+		}
+		else state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_AUDIO)
+	case AUDIO_UNIT_ID:
+		if ((reg & PMC_AUDIOSTOPCLOCK_MASK) == PMC_AUDIOSTOPCLOCK_STOP)
+		{
+			state = MV_FALSE;
+		}
+		else state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_TS)
+	case TS_UNIT_ID:
+		if ((reg & PMC_TSSTOPCLOCK_MASK) == PMC_TSSTOPCLOCK_STOP)
+		{
+			state = MV_FALSE;
+		}
+		else state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_SDIO)
+	case SDIO_UNIT_ID:
+		if ((reg & PMC_SDIOSTOPCLOCK_MASK)== PMC_SDIOSTOPCLOCK_STOP)
+		{
+			state = MV_FALSE;
+		}
+		else state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_TDM)
+	case TDM_UNIT_ID:
+		if ((reg & PMC_TDMSTOPCLOCK_MASK) == PMC_TDMSTOPCLOCK_STOP)
+		{
+			state = MV_FALSE;
+		}
+		else state = MV_TRUE;
+		break;
+#endif
+
+	default:
+		state = MV_TRUE;
+		break;
+	}
+
+
+	return state;	
+}
+#ifdef CONFIG_MV_INCLUDE_AUDIO
+MV_VOID mvAudioHalInit(MV_U8 unit);
+MV_STATUS mvAudioInit(MV_U8 unit)
+{
+    mvAudioHalInit(unit);
+    
+    return MV_OK;
+}
+#endif
+#ifdef CONFIG_MV_INCLUDE_XOR
+MV_VOID mvXorHalInit (MV_U32 xorChanNum);
+
+MV_STATUS mvXorInit (MV_VOID)
+{
+     MV_U32         i;
+#if 0
+     /* Initiate XOR address decode */
+     for(i = 0; i < MV_XOR_MAX_UNIT; i++)
+	  mvXorInitWinsUnit(i);
+#endif
+     mvXorHalInit(MV_XOR_MAX_CHAN);
+
+     return MV_OK;
+}
+#endif
+#include "twsi/mvTwsi.h"
+MV_U8 mvBoardA2DTwsiChanNumGet(MV_U8 unit)
+{
+     return 0;
+}
+
+MV_U8 mvBoardA2DTwsiAddrTypeGet(MV_U8 unit)
+{
+	return ADDR7_BIT;
+}
+
+
+MV_U8 mvBoardA2DTwsiAddrGet(MV_U8 unit)
+{
+     return 0x4A;
+}
+
+#ifdef CONFIG_MV_INCLUDE_CESA
+#include "cesa/mvCesa.h"
+
+MV_STATUS mvCesaHalInit (int numOfSession, int queueDepth, char* pSramBase,
+			 MV_U32 cryptEngBase, void *osHandle);
+
+MV_STATUS mvCesaInit (int numOfSession, int queueDepth, char* pSramBase, void *osHandle)
+{
+    MV_U32 cesaCryptEngBase;
+#if 0
+    MV_CPU_DEC_WIN addrDecWin;
+#endif
+    if(sizeof(MV_CESA_SRAM_MAP) > MV_CESA_SRAM_SIZE)
+    {
+        mvOsPrintf("mvCesaInit: Wrong SRAM map - %d > %d\n",
+                sizeof(MV_CESA_SRAM_MAP), MV_CESA_SRAM_SIZE);
+        return MV_FAIL;
+    }
+#if 0
+    if (mvCpuIfTargetWinGet(CRYPT_ENG, &addrDecWin) == MV_OK)
+        cesaCryptEngBase = addrDecWin.addrWin.baseLow;
+    else
+    {
+        mvOsPrintf("mvCesaInit: ERR. mvCpuIfTargetWinGet failed\n");
+        return MV_ERROR;
+    }
+
+#if (MV_CESA_VERSION >= 2)
+    mvCesaTdmaAddrDecInit();
+#endif /* MV_CESA_VERSION >= 2 */
+#endif
+	return mvCesaHalInit(numOfSession, queueDepth, pSramBase, cesaCryptEngBase, 
+			     osHandle);
+
+}
+#endif
+MV_U32 mvCtrlUsbMaxGet(void)
+{
+	return 1;
+}
+u32 mvIsUsbHost = 1;
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/Kconfig
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/Kconfig
@@ -0,0 +1,15 @@
+if ARCH_FEROCEON_KW
+
+choice
+	prompt "Feroceon-KW SoC type"
+	default MV88F6281
+
+config  MV88F6281
+	bool "88F6281/88F6192/88F6180 SoC"
+	---help---
+	Choosing this option will generate a linux kernel for the 88F6281/88F6192/88F6180 SoC
+
+endchoice
+
+endif
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/dbg-trace.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/dbg-trace.h
@@ -0,0 +1,24 @@
+
+#ifndef _MV_DBG_TRCE_H_
+#define _MV_DBG_TRCE_H_
+
+#ifdef CONFIG_MV_DBG_TRACE
+void TRC_INIT(void *callback1, void *callback2, 
+    unsigned char callback1_param, unsigned char callback2_param);
+void TRC_REC(char *fmt,...);
+void TRC_OUTPUT(void);
+void TRC_RELEASE(void);
+void TRC_START(void);
+void TRC_STOP(void);
+
+#else
+#define TRC_INIT(x1,x2,x3,x4)
+#define TRC_REC(X...)
+#define TRC_OUTPUT()
+#define TRC_RELEASE()
+#define TRC_START()
+#define TRC_STOP()
+#endif
+
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/Makefile
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/Makefile
@@ -0,0 +1,20 @@
+#*******************************************************************************
+# Marvell GPL License Option
+#
+# If you received this File from Marvell, you may opt to use, redistribute and/or 
+# modify this File in accordance with the terms and conditions of the General 
+# Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+# available along with the File in the license.txt file or by writing to the Free 
+# Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+# on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+#
+# THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+# WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+# DISCLAIMED.  The GPL License provides additional details about this warranty 
+# disclaimer.
+#*******************************************************************************/
+include $(srctree)/$(subst ",,$(CONFIG_MV_HAL_RULES_PATH))
+
+# Objects list
+
+obj-y	+= mvKW_HAL_glue.o export.o 
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/export.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/export.c
@@ -0,0 +1,279 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/types.h>
+#include <linux/kernel.h>
+
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "ctrlEnv/sys/mvCpuIf.h"
+#include "boardEnv/mvBoardEnvLib.h"
+#include "mvDebug.h"
+#include "mvSysHwConfig.h"
+//#include "pex/mvPexRegs.h"
+//#include "cntmr/mvCntmr.h"
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "mvOs.h"
+
+
+/*************************************************************************************************************
+ * Environment 
+ *************************************************************************************************************/
+extern u32 mvTclk;
+extern u32 mvSysclk;
+//extern u32* mvUncachedParam;
+
+//EXPORT_SYMBOL(mv_early_printk);
+//EXPORT_SYMBOL(arm926_dma_inv_range);
+//EXPORT_SYMBOL(arm926_dma_flush_range);
+EXPORT_SYMBOL(mvCtrlPwrClckGet);
+//EXPORT_SYMBOL(mvCtrlModelRevGet);
+//EXPORT_SYMBOL(mvTclk);
+//EXPORT_SYMBOL(mvSysclk);
+EXPORT_SYMBOL(mvCtrlModelGet);
+EXPORT_SYMBOL(mvOsIoUncachedMalloc);
+EXPORT_SYMBOL(mvOsIoUncachedFree);
+EXPORT_SYMBOL(mvOsIoCachedMalloc);
+EXPORT_SYMBOL(mvOsIoCachedFree);
+EXPORT_SYMBOL(mvDebugMemDump);
+EXPORT_SYMBOL(mvHexToBin);
+EXPORT_SYMBOL(mvBinToHex);
+EXPORT_SYMBOL(mvSizePrint);
+#ifdef CONFIG_MV_INCLUDE_GIG_ETH
+EXPORT_SYMBOL(mvDebugPrintMacAddr);
+EXPORT_SYMBOL(mvCtrlEthMaxPortGet);
+//EXPORT_SYMBOL(mvCtrlTargetNameGet);
+//EXPORT_SYMBOL(mvBoardIdGet);
+EXPORT_SYMBOL(mvBoardPhyAddrGet);
+//EXPORT_SYMBOL(mvCpuIfTargetWinGet);
+EXPORT_SYMBOL(mvBoardMacSpeedGet);
+#endif
+EXPORT_SYMBOL(mvMacStrToHex);
+EXPORT_SYMBOL(mvBoardTclkGet);
+
+
+/*************************************************************************************************************
+ * Audio
+ *************************************************************************************************************/
+#ifdef CONFIG_MV_INCLUDE_AUDIO
+#include "audio/mvAudio.h"
+#include "ctrlEnv/sys/mvSysAudio.h"
+#include "audio/dac/mvCLAudioCodec.h"
+EXPORT_SYMBOL(mvSPDIFRecordTclockSet);
+EXPORT_SYMBOL(mvSPDIFPlaybackCtrlSet);
+EXPORT_SYMBOL(mvI2SPlaybackCtrlSet);
+EXPORT_SYMBOL(mvAudioPlaybackControlSet);
+EXPORT_SYMBOL(mvAudioDCOCtrlSet);
+EXPORT_SYMBOL(mvI2SRecordCntrlSet);
+EXPORT_SYMBOL(mvAudioRecordControlSet);
+EXPORT_SYMBOL(mvAudioInit);
+EXPORT_SYMBOL(mvCLAudioCodecInit);
+EXPORT_SYMBOL(mvBoardA2DTwsiAddrGet);
+EXPORT_SYMBOL(mvBoardA2DTwsiAddrTypeGet);
+EXPORT_SYMBOL(mvCLAudioCodecRegGet);
+EXPORT_SYMBOL(mvCLAudioCodecRegSet);
+EXPORT_SYMBOL(mvCLAudioCodecRegBitsReset);
+#endif
+
+/*************************************************************************************************************
+ * USB
+ *************************************************************************************************************/
+#ifdef CONFIG_MV_INCLUDE_USB
+extern u32 mvIsUsbHost;
+
+#include "usb/mvUsb.h"
+EXPORT_SYMBOL(mvIsUsbHost);
+EXPORT_SYMBOL(mvCtrlUsbMaxGet);
+EXPORT_SYMBOL(mvUsbGetCapRegAddr);
+#ifdef MV_USB_VOLTAGE_FIX
+EXPORT_SYMBOL(mvUsbGppInit);
+EXPORT_SYMBOL(mvUsbBackVoltageUpdate);
+#endif
+#endif /* CONFIG_MV_INCLUDE_USB */
+
+/*************************************************************************************************************
+ * CESA
+ *************************************************************************************************************/
+#ifdef CONFIG_MV_INCLUDE_CESA
+#include "ctrlEnv/sys/mvSysCesa.h"
+#include "cesa/mvCesa.h"
+#include "cesa/mvMD5.h"
+#include "cesa/mvSHA1.h"
+//extern unsigned char*  mv_sram_usage_get(int* sram_size_ptr);
+EXPORT_SYMBOL(mvCesaInit);
+EXPORT_SYMBOL(mvCesaSessionOpen);
+EXPORT_SYMBOL(mvCesaSessionClose);
+EXPORT_SYMBOL(mvCesaAction);
+EXPORT_SYMBOL(mvCesaReadyGet);
+EXPORT_SYMBOL(mvCesaCopyFromMbuf);
+EXPORT_SYMBOL(mvCesaCopyToMbuf);
+EXPORT_SYMBOL(mvCesaMbufCopy);
+EXPORT_SYMBOL(mvCesaCryptoIvSet);
+EXPORT_SYMBOL(mvMD5);
+EXPORT_SYMBOL(mvSHA1);
+
+EXPORT_SYMBOL(mvCesaDebugQueue);
+EXPORT_SYMBOL(mvCesaDebugSram);
+EXPORT_SYMBOL(mvCesaDebugSAD);
+EXPORT_SYMBOL(mvCesaDebugStatus);
+EXPORT_SYMBOL(mvCesaDebugMbuf);
+EXPORT_SYMBOL(mvCesaDebugSA);
+//EXPORT_SYMBOL(mv_sram_usage_get);
+#endif
+
+/*************************************************************************************************************
+ * Flashes
+ *************************************************************************************************************/
+#if defined (CONFIG_MV_INCLUDE_SPI)
+#include <sflash/mvSFlash.h>
+#include <sflash/mvSFlashSpec.h>
+EXPORT_SYMBOL(mvSFlashInit);
+EXPORT_SYMBOL(mvSFlashSectorErase);
+EXPORT_SYMBOL(mvSFlashChipErase);
+EXPORT_SYMBOL(mvSFlashBlockRd);
+EXPORT_SYMBOL(mvSFlashBlockWr);
+EXPORT_SYMBOL(mvSFlashIdGet);
+EXPORT_SYMBOL(mvSFlashWpRegionSet);
+EXPORT_SYMBOL(mvSFlashWpRegionGet);
+EXPORT_SYMBOL(mvSFlashStatRegLock);
+EXPORT_SYMBOL(mvSFlashSizeGet);
+EXPORT_SYMBOL(mvSFlashPowerSaveEnter);
+EXPORT_SYMBOL(mvSFlashPowerSaveExit);
+EXPORT_SYMBOL(mvSFlashModelGet);
+#endif
+
+
+/*************************************************************************************************************
+ * SATA
+ *************************************************************************************************************/
+#ifdef CONFIG_MV_INCLUDE_INTEG_SATA
+#include <ctrlEnv/sys/mvSysSata.h>
+//EXPORT_SYMBOL(mvSataWinInit);
+#endif
+
+/*************************************************************************************************************
+ * DMA/XOR
+ *************************************************************************************************************/
+
+#if defined (CONFIG_MV_XORMEMCOPY)
+EXPORT_SYMBOL(asm_memcpy);
+EXPORT_SYMBOL(asm_memmove);
+#endif
+#if defined (CONFIG_MV_XORMEMZERO)
+EXPORT_SYMBOL(asm_memzero);
+#endif
+
+/*************************************************************************************************************
+ * Networking
+ *************************************************************************************************************/
+#ifdef CONFIG_MV_ETHERNET
+#include "eth/mvEth.h"
+#include "ctrlEnv/sys/mvSysGbe.h"
+#include "eth-phy/mvEthPhy.h"
+EXPORT_SYMBOL(mvEthInit);
+EXPORT_SYMBOL(mvEthPhyRegRead);
+EXPORT_SYMBOL(mvEthPhyRegWrite);
+
+#if defined (CONFIG_MV_GATEWAY)
+extern u32 overEthAddr;
+EXPORT_SYMBOL(overEthAddr);
+
+EXPORT_SYMBOL(mvEthPortTxDone);
+EXPORT_SYMBOL(mvEthPortDisable); 
+EXPORT_SYMBOL(ethResetTxDescRing); 
+EXPORT_SYMBOL(mvEthPortInit); 
+EXPORT_SYMBOL(mvEthPortEnable); 
+EXPORT_SYMBOL(ethResetRxDescRing); 
+EXPORT_SYMBOL(mvEthPortForceRx); 
+EXPORT_SYMBOL(mvEthPortRxDone); 
+EXPORT_SYMBOL(mvEthTxCoalSet); 
+EXPORT_SYMBOL(mvEthPortForceTxDone); 
+EXPORT_SYMBOL(mvEthTxResourceGet); 
+EXPORT_SYMBOL(mvEthRxResourceGet); 
+EXPORT_SYMBOL(mvEthPortFinish); 
+EXPORT_SYMBOL(mvEthMacAddrGet); 
+EXPORT_SYMBOL(mvEthPortTx); 
+EXPORT_SYMBOL(mvEthMaxRxSizeSet); 
+EXPORT_SYMBOL(mvEthPortRx); 
+EXPORT_SYMBOL(mvEthRxCoalSet); 
+EXPORT_SYMBOL(mvEthVlanPrioRxQueue); 
+EXPORT_SYMBOL(mvEthRxFilterModeSet);
+EXPORT_SYMBOL(mvEthMacAddrSet); 
+
+
+#include "msApiDefs.h"
+#include "msApiPrototype.h"
+EXPORT_SYMBOL(gcosSetPortDefaultTc);
+EXPORT_SYMBOL(gvlnSetPortVlanDBNum);
+EXPORT_SYMBOL(eventSetActive);
+EXPORT_SYMBOL(gprtSetPhyReg);
+EXPORT_SYMBOL(gprtSetPagedPhyReg);
+EXPORT_SYMBOL(gstpSetPortState);
+EXPORT_SYMBOL(gqosUserPrioMapEn);
+EXPORT_SYMBOL(gfdbFlushInDB);
+EXPORT_SYMBOL(gsysSetUseDoubleTagData);
+EXPORT_SYMBOL(gfdbAddMacEntry);
+EXPORT_SYMBOL(gfdbFindAtuMacEntry);
+EXPORT_SYMBOL(gqosSetPrioMapRule);
+EXPORT_SYMBOL(gprtSetCtrMode);
+EXPORT_SYMBOL(gsysSetPPUEn);
+EXPORT_SYMBOL(gvlnSetPortVid);
+EXPORT_SYMBOL(gprtClearAllCtr);
+EXPORT_SYMBOL(gprtSetDoubleTag);
+EXPORT_SYMBOL(gfdbDelAtuEntry);
+EXPORT_SYMBOL(gprtSetVlanTunnel);
+EXPORT_SYMBOL(gqosIpPrioMapEn);
+EXPORT_SYMBOL(gprtSetProviderTag);
+EXPORT_SYMBOL(gsysSetCPUPort);
+EXPORT_SYMBOL(gstatsFlushAll);
+EXPORT_SYMBOL(gprtSetForceFc);
+EXPORT_SYMBOL(gfdbFlush);
+EXPORT_SYMBOL(qdLoadDriver);
+EXPORT_SYMBOL(gprtSetEgressMode);
+EXPORT_SYMBOL(gprtPhyIntEnable);
+EXPORT_SYMBOL(gvlnSetPortVlanDot1qMode);
+EXPORT_SYMBOL(eventGetIntStatus);
+EXPORT_SYMBOL(gstatsGetPortAllCounters3);
+EXPORT_SYMBOL(gprtGetDuplex);
+EXPORT_SYMBOL(gvlnSetPortVlanPorts);
+EXPORT_SYMBOL(gprtGetLinkState);
+EXPORT_SYMBOL(gprtGetPhyIntStatus);
+EXPORT_SYMBOL(gfdbGetAtuEntryNext);
+EXPORT_SYMBOL(gvtuAddEntry);
+EXPORT_SYMBOL(gprtGetPhyIntPortSummary);
+EXPORT_SYMBOL(gprtGetSpeedMode);
+EXPORT_SYMBOL(gsysSetJumboMode);
+EXPORT_SYMBOL(gprtSetHeaderMode);
+#ifdef CONFIG_MV_GTW_IGMP
+EXPORT_SYMBOL(gprtSetIGMPSnoop);
+#endif 
+
+#ifdef CONFIG_ETH_MULTI_Q
+#include "ethfp/mvEthPolicy.h"
+extern int MAX_SOFTIRQ_RESTART;
+extern int netdev_max_backlog;
+EXPORT_SYMBOL(MAX_SOFTIRQ_RESTART);
+EXPORT_SYMBOL(netdev_max_backlog);
+EXPORT_SYMBOL(mvMacHexToStr); 
+EXPORT_SYMBOL(mvAsciiToHex);
+EXPORT_SYMBOL(gcosSetDscp2Tc);
+EXPORT_SYMBOL(mvEthRxPolicyInit); 
+EXPORT_SYMBOL(mvEthRxPolicyGet); 
+#endif 
+
+#endif /* CONFIG_MV_GATEWAY */
+#endif
+#ifdef CONFIG_MV88F6281
+//EXPORT_SYMBOL(mvUncachedParam);
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/mvSysHwConfig.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/mvSysHwConfig.h
@@ -0,0 +1,392 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+
+*******************************************************************************/
+/*******************************************************************************
+* mvSysHwCfg.h - Marvell system HW configuration file
+*
+* DESCRIPTION:
+*       None.
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+#ifndef __INCmvSysHwConfigh
+#define __INCmvSysHwConfigh
+
+//#include "../../../../include/linux/autoconf.h"
+
+#define CONFIG_MARVELL	1
+
+/* used for sync write reordering in bridge*/ 
+//#define MV_BRIDGE_SYNC_REORDER
+
+/* includes */
+#define _1K         0x00000400
+#define _4K         0x00001000
+#define _8K         0x00002000
+#define _16K        0x00004000
+#define _32K        0x00008000
+#define _64K        0x00010000
+#define _128K       0x00020000
+#define _256K       0x00040000
+#define _512K       0x00080000
+
+#define _1M         0x00100000
+#define _2M         0x00200000
+#define _4M         0x00400000
+#define _8M         0x00800000
+#define _16M        0x01000000
+#define _32M        0x02000000
+#define _64M        0x04000000
+#define _128M       0x08000000
+#define _256M       0x10000000
+#define _512M       0x20000000
+
+#define _1G         0x40000000
+#define _2G         0x80000000
+
+/****************************************/
+/* Soc supporeted Units definitions	*/
+/****************************************/
+
+#ifdef CONFIG_MV_INCLUDE_PEX
+#define MV_INCLUDE_PEX
+#endif
+#ifdef CONFIG_MV_INCLUDE_TWSI
+#define MV_INCLUDE_TWSI
+#endif
+#ifdef CONFIG_MV_INCLUDE_CESA
+#define MV_INCLUDE_CESA
+#endif
+#ifdef CONFIG_MV_INCLUDE_GIG_ETH
+#define MV_INCLUDE_GIG_ETH
+#endif
+#ifdef CONFIG_MV_INCLUDE_INTEG_SATA
+#define MV_INCLUDE_INTEG_SATA
+#define MV_INCLUDE_SATA
+#define SATA_IRQ_NUM           21
+#endif
+#ifdef CONFIG_MV_INCLUDE_USB
+#define MV_INCLUDE_USB
+//#define MV_USB_VOLTAGE_FIX
+#endif
+#ifdef CONFIG_MV_INCLUDE_NAND
+#define MV_INCLUDE_NAND
+#endif
+#ifdef CONFIG_MV_INCLUDE_TDM
+#define MV_INCLUDE_TDM
+#endif
+#ifdef CONFIG_MV_INCLUDE_XOR
+#define MV_INCLUDE_XOR
+#endif
+#ifdef CONFIG_MV_INCLUDE_TWSI
+#define MV_INCLUDE_TWSI
+#endif
+#ifdef CONFIG_MV_INCLUDE_UART
+#define MV_INCLUDE_UART
+#endif
+#ifdef CONFIG_MV_INCLUDE_SPI
+#define MV_INCLUDE_SPI
+#endif
+#ifdef CONFIG_MV_INCLUDE_SFLASH_MTD
+#define MV_INCLUDE_SFLASH_MTD
+#endif
+#ifdef CONFIG_MV_INCLUDE_AUDIO
+#define MV_INCLUDE_AUDIO
+#endif
+#ifdef CONFIG_MV_INCLUDE_TS
+#define MV_INCLUDE_TS
+#endif
+#ifdef CONFIG_MV_INCLUDE_SDIO
+#define MV_INCLUDE_SDIO
+#endif
+
+
+/* NAND flash stuff */
+#ifdef CONFIG_MV_NAND_BOOT
+#define MV_NAND_BOOT
+#endif
+#ifdef CONFIG_MV_NAND
+#define MV_NAND
+#endif
+
+
+/****************************************************************/
+/************* General    configuration ********************/
+/****************************************************************/
+
+/* Enable Clock Power Control */
+#define MV_INCLUDE_CLK_PWR_CNTRL
+
+/* Disable the DEVICE BAR in the PEX */
+#define MV_DISABLE_PEX_DEVICE_BAR
+
+/* Allow the usage of early printings during initialization */
+#define MV_INCLUDE_EARLY_PRINTK
+
+/****************************************************************/
+/************* CESA configuration ********************/
+/****************************************************************/
+
+#ifdef MV_INCLUDE_CESA
+
+#define MV_CESA_MAX_CHAN               4
+
+/* Use 2K of SRAM */
+#define MV_CESA_MAX_BUF_SIZE           1600
+
+#endif /* MV_INCLUDE_CESA */
+
+#if defined(CONFIG_MV_INCLUDE_GIG_ETH)
+#define IRQ_GPP_START IRQ_KIRKWOOD_GPIO_START
+#ifndef ETH_PORT0_IRQ_NUM
+ #define ETH_PORT0_IRQ_NUM 	11
+#endif
+#define ETH_PORT_IRQ_NUM(x)             ((x == 0) ? 11 : 15)
+/* MTU */
+#ifndef CONFIG_ETH_0_MTU
+# define CONFIG_ETH_0_MTU	1500
+#endif
+
+#ifdef CONFIG_MV_ETH_STATS
+#define ETH_STATISTICS
+#else
+#undef ETH_STATISTICS
+#endif
+
+#ifdef CONFIG_MV_NFP_STATS
+#define MV_FP_STATISTICS
+#else
+#undef MV_FP_STATISTICS
+#endif
+
+/* Default configuration for SKB_REUSE: 0 - Disabled, 1 - Enabled */
+#define MV_ETH_SKB_REUSE_DEFAULT    0
+/* Default configuration for TX_EN workaround: 0 - Disabled, 1 - Enabled */
+#define MV_ETH_TX_EN_DEFAULT        1
+
+/* un-comment if you want to perform tx_done from within the poll function */
+/* #define ETH_TX_DONE_ISR */
+
+/* put descriptors in uncached memory */
+/* #define ETH_DESCR_UNCACHED */
+
+/* Descriptors location: DRAM/internal-SRAM */
+#define ETH_DESCR_IN_SDRAM
+#undef  ETH_DESCR_IN_SRAM    /* No integrated SRAM in 88Fxx81 devices */
+
+#if defined(ETH_DESCR_IN_SRAM)
+#if defined(ETH_DESCR_UNCACHED)
+ #define ETH_DESCR_CONFIG_STR    "Uncached descriptors in integrated SRAM"
+#else
+ #define ETH_DESCR_CONFIG_STR    "Cached descriptors in integrated SRAM"
+#endif
+#elif defined(ETH_DESCR_IN_SDRAM)
+#if defined(ETH_DESCR_UNCACHED)
+ #define ETH_DESCR_CONFIG_STR    "Uncached descriptors in DRAM"
+#else
+ #define ETH_DESCR_CONFIG_STR    "Cached descriptors in DRAM"
+#endif
+#else 
+ #error "Ethernet descriptors location undefined"
+#endif /* ETH_DESCR_IN_SRAM or ETH_DESCR_IN_SDRAM*/
+
+/* SW Sync-Barrier: not relevant for 88fxx81*/
+/* Reasnable to define this macro when descriptors in SRAM and buffers in DRAM */
+/* In RX the CPU theoretically might see himself as the descriptor owner,      */
+/* although the buffer hadn't been written to DRAM yet. Performance cost.      */
+/* #define INCLUDE_SYNC_BARR */
+
+/* Buffers cache coherency method (buffers in DRAM) */
+#ifndef MV_CACHE_COHER_SW
+/* Taken from mvCommon.h */
+/* Memory uncached, HW or SW cache coherency is not needed */
+#define MV_UNCACHED             0   
+/* Memory cached, HW cache coherency supported in WriteThrough mode */
+#define MV_CACHE_COHER_HW_WT    1
+/* Memory cached, HW cache coherency supported in WriteBack mode */
+#define MV_CACHE_COHER_HW_WB    2
+/* Memory cached, No HW cache coherency, Cache coherency must be in SW */
+#define MV_CACHE_COHER_SW       3
+
+#endif
+
+/* DRAM cache coherency configuration */
+#define MV_CACHE_COHERENCY  MV_CACHE_COHER_SW
+
+
+#define ETHER_DRAM_COHER    MV_CACHE_COHER_SW   /* No HW coherency in 88Fxx81 devices */
+
+#if (ETHER_DRAM_COHER == MV_CACHE_COHER_HW_WB)
+ #define ETH_SDRAM_CONFIG_STR    "DRAM HW cache coherency (write-back)"
+#elif (ETHER_DRAM_COHER == MV_CACHE_COHER_HW_WT)
+ #define ETH_SDRAM_CONFIG_STR    "DRAM HW cache coherency (write-through)"
+#elif (ETHER_DRAM_COHER == MV_CACHE_COHER_SW)
+ #define ETH_SDRAM_CONFIG_STR    "DRAM SW cache-coherency"
+#elif (ETHER_DRAM_COHER == MV_UNCACHED)
+#   define ETH_SDRAM_CONFIG_STR  "DRAM uncached"
+#else
+ #error "Ethernet-DRAM undefined"
+#endif /* ETHER_DRAM_COHER */
+
+
+/****************************************************************/
+/************* Ethernet driver configuration ********************/
+/****************************************************************/
+
+/* port's default queueus */
+#define ETH_DEF_TXQ         0
+#define ETH_DEF_RXQ         0 
+
+#ifndef CONFIG_MV_ETH_RX_Q_NUM 
+#define CONFIG_MV_ETH_RX_Q_NUM 1
+#endif
+
+#define MV_ETH_RX_Q_NUM     CONFIG_MV_ETH_RX_Q_NUM
+#define MV_ETH_TX_Q_NUM     CONFIG_MV_ETH_TX_Q_NUM
+
+/* interrupt coalescing setting */
+#define ETH_TX_COAL    		    200
+#define ETH_RX_COAL    		    200
+
+/* Checksum offloading */
+#define TX_CSUM_OFFLOAD
+#define RX_CSUM_OFFLOAD
+
+/* a few extra Tx descriptors, because we stop the interface for Tx in advance */
+#define MV_ETH_EXTRA_TX_DESCR	    20 
+
+#if (MV_ETH_RX_Q_NUM > 1)
+#define ETH_NUM_OF_RX_DESCR         64
+#define ETH_RX_QUEUE_QUOTA	    32   /* quota per Rx Q */
+#else
+#define ETH_NUM_OF_RX_DESCR         128
+#endif
+
+#define ETH_NUM_OF_TX_DESCR         (ETH_NUM_OF_RX_DESCR*4 + MV_ETH_EXTRA_TX_DESCR)
+
+#endif /* CONFIG_MV_INCLUDE_GIG_ETH */
+
+/****************************************************************/
+/*************** Telephony configuration ************************/
+/****************************************************************/
+#if defined(CONFIG_MV_TDM_LINEAR_MODE)
+ #define MV_TDM_LINEAR_MODE
+#elif defined(CONFIG_MV_TDM_ULAW_MODE)
+ #define MV_TDM_ULAW_MODE
+#endif
+
+
+
+/* We use the following registers to store DRAM interface pre configuration   */
+/* auto-detection results													  */
+/* IMPORTANT: We are using mask register for that purpose. Before writing     */
+/* to units mask register, make sure main maks register is set to disable     */
+/* all interrupts.                                                            */
+#define DRAM_BUF_REG0   0x30810 /* sdram bank 0 size            */  
+#define DRAM_BUF_REG1   0x30820 /* sdram config                 */
+#define DRAM_BUF_REG2   0x30830 /* sdram mode                   */
+#define DRAM_BUF_REG3   0x308c4 /* dunit control low            */          
+#define DRAM_BUF_REG4   0x60a90 /* sdram address control        */
+#define DRAM_BUF_REG5   0x60a94 /* sdram timing control low     */
+#define DRAM_BUF_REG6   0x60a98 /* sdram timing control high    */
+#define DRAM_BUF_REG7   0x60a9c /* sdram ODT control low        */
+#define DRAM_BUF_REG8   0x60b90 /* sdram ODT control high       */
+#define DRAM_BUF_REG9   0x60b94 /* sdram Dunit ODT control      */
+#define DRAM_BUF_REG10  0x60b98 /* sdram Extended Mode          */
+#define DRAM_BUF_REG11  0x60b9c /* sdram Ddr2 Time Low Reg      */
+#define DRAM_BUF_REG12  0x60a00 /* sdram Ddr2 Time High Reg     */
+#define DRAM_BUF_REG13  0x60a04 /* dunit Ctrl High              */
+#define DRAM_BUF_REG14  0x60b00 /* sdram second DIMM exist      */
+
+/* Following the pre-configuration registers default values restored after    */
+/* auto-detection is done                                                     */
+#define DRAM_BUF_REG_DV 0
+
+/* System Mapping */
+#define SDRAM_CS0_BASE  0x00000000
+#define SDRAM_CS0_SIZE  _256M
+
+#define SDRAM_CS1_BASE  0x10000000
+#define SDRAM_CS1_SIZE  _256M
+
+#define SDRAM_CS2_BASE  0x20000000
+#define SDRAM_CS2_SIZE  _256M
+
+#define SDRAM_CS3_BASE  0x30000000
+#define SDRAM_CS3_SIZE  _256M
+
+/* PEX */
+#define PEX0_MEM_BASE 0xe8000000
+#define PEX0_MEM_SIZE _128M
+
+#define PEX0_IO_BASE 0xf2000000
+#define PEX0_IO_SIZE _1M
+
+/* Device Chip Selects */
+#define NFLASH_CS_BASE 0xfa000000
+#define NFLASH_CS_SIZE _2M
+
+#define SPI_CS_BASE 0xf4000000
+#define SPI_CS_SIZE _16M
+
+#define CRYPT_ENG_BASE	0xf0000000
+#define CRYPT_ENG_SIZE	_2M
+
+#define BOOTDEV_CS_BASE	0xff800000
+#define BOOTDEV_CS_SIZE _8M
+
+/* CS2 - BOOTROM */
+#define DEVICE_CS2_BASE 0xff900000
+#define DEVICE_CS2_SIZE _1M
+
+/* PEX Work arround */
+/* the target we will use for the workarround */
+#define PEX_CONFIG_RW_WA_TARGET PEX0_MEM
+/*a flag that indicates if we are going to use the 
+size and base of the target we using for the workarround
+window */
+#define PEX_CONFIG_RW_WA_USE_ORIGINAL_WIN_VALUES 1
+/* if the above flag is 0 then the following values
+will be used for the workarround window base and size,
+otherwise the following defines will be ignored */
+#define PEX_CONFIG_RW_WA_BASE 0xF3000000
+#define PEX_CONFIG_RW_WA_SIZE _16M
+
+/* Internal registers: size is defined in Controllerenvironment */
+//#define INTER_REGS_BASE	0xF1000000
+#define INTER_REGS_BASE KIRKWOOD_REGS_VIRT_BASE
+/* DRAM detection stuff */
+#define MV_DRAM_AUTO_SIZE
+
+/* Board clock detection */
+#undef TCLK_AUTO_DETECT    	/* Use Tclk auto detection   */
+#define SYSCLK_AUTO_DETECT	/* Use SysClk auto detection */
+#define PCLCK_AUTO_DETECT  	/* Use PClk auto detection   */
+#define L2CLK_AUTO_DETECT 	/* Use L2Clk auto detection   */
+
+/* PEX-PCI\PCI-PCI Bridge*/
+#define PCI0_IF_PTP		0		/* Bridge exist on pciIf0*/
+
+ 
+
+#endif /* __INCmvSysHwConfigh */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/mvRules.mk
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/mvRules.mk
@@ -0,0 +1,141 @@
+# This flags will be used only by the Marvell arch files compilation.
+
+###################################################################################################
+# General definitions
+###################################################################################################
+CPU_ARCH    = ARM
+CHIP        = 88F6281
+VENDOR      = Marvell
+ifeq ($(CONFIG_CPU_BIG_ENDIAN),y)
+ENDIAN      = BE
+else
+ENDIAN      = LE
+endif
+
+###################################################################################################
+# directory structure
+###################################################################################################
+# Main directory structure
+SRC_PATH          = .
+PLAT_PATH	  = ../../plat-orion/mv_hal_drivers
+PLAT_DRIVERS	  = $(PLAT_PATH)/mv_drivers_lsp
+HAL_DIR           = $(PLAT_PATH)/mv_hal
+COMMON_DIR        = $(PLAT_PATH)/common
+OSSERV_DIR        = $(PLAT_PATH)/linux_oss
+LSP_DIR           = $(SRC_PATH)/mv_hal_support/
+CONFIG_DIR        = $(LSP_DIR)/config
+
+# HALs
+HAL_ETHPHY_DIR    = $(HAL_DIR)/eth-phy
+HAL_FLASH_DIR     = $(HAL_DIR)/flash
+HAL_RTC_DIR       = $(HAL_DIR)/rtc/integ_rtc
+HAL_VOICEBAND     = $(HAL_DIR)/voiceband
+HAL_SLIC_DIR      = $(HAL_VOICEBAND)/slic
+HAL_DAA_DIR       = $(HAL_VOICEBAND)/daa
+HAL_SATA_DIR      = $(HAL_DIR)/sata/CoreDriver/
+HAL_QD_DIR        = $(HAL_DIR)/qd-dsdt
+HAL_SFLASH_DIR    = $(HAL_DIR)/sflash
+HAL_CNTMR_DIR     = $(HAL_DIR)/cntmr
+HAL_DRAM_DIR      = $(HAL_DIR)/ddr2
+HAL_DRAM_SPD_DIR  = $(HAL_DIR)/spd
+HAL_DRAM_ARCH_DIR = $(HAL_DRAM_DIR)/Arch$(CPU_ARCH)
+HAL_GPP_DIR       = $(HAL_DIR)/gpp
+HAL_TWSI_DIR      = $(HAL_DIR)/twsi
+HAL_TWSI_ARCH_DIR = $(SOC_TWSI_DIR)/Arch$(CPU_ARCH)
+HAL_UART_DIR      = $(HAL_DIR)/uart
+HAL_ETH_DIR       = $(HAL_DIR)/eth/gbe
+HAL_DDRMC_DIR	  = $(HAL_DIR)/ddrmc
+
+ifeq ($(CONFIG_MV_INCLUDE_PEX),y)
+HAL_PEX_DIR       = $(HAL_DIR)/pex
+endif
+ifeq ($(CONFIG_MV_INCLUDE_TDM),y)
+HAL_TDM_DIR       = $(HAL_DIR)/voiceband/tdm
+endif
+ifeq ($(CONFIG_MV_FAST_PATH_ETHERNET),y)
+HAL_ETH_FP_DIR	  = $(HAL_DIR)/ethfp/fast_path
+endif
+ifeq ($(CONFIG_MV_INCLUDE_USB),y)
+HAL_USB_DIR       = $(HAL_DIR)/usb
+endif
+ifeq ($(CONFIG_MV_INCLUDE_CESA),y)
+HAL_CESA_DIR	  = $(HAL_DIR)/cesa
+HAL_CESA_AES_DIR  = $(HAL_DIR)/cesa/AES
+endif
+ifeq ($(CONFIG_MV_INCLUDE_XOR),y)
+HAL_XOR_DIR       = $(HAL_DIR)/xor
+endif
+ifeq ($(CONFIG_MV_INCLUDE_SPI),y)
+HAL_SPI_DIR       = $(HAL_DIR)/spi
+endif
+ifeq ($(CONFIG_MV_INCLUDE_AUDIO),y)
+HAL_AUDIO_DIR     = $(HAL_DIR)/audio
+endif
+ifeq ($(CONFIG_MV_INCLUDE_TS),y)
+HAL_TS_DIR      = $(HAL_DIR)/ts
+endif
+
+# Environment components
+KW_FAM_DIR	    = $(LSP_DIR)/kw_family
+SOC_DEVICE_DIR      = $(KW_FAM_DIR)/device
+SOC_CPU_DIR         = $(KW_FAM_DIR)/cpu
+BOARD_ENV_DIR       = $(KW_FAM_DIR)/boardEnv
+SOC_ENV_DIR         = $(KW_FAM_DIR)/ctrlEnv
+SOC_SYS_DIR	    = $(OSSERV_DIR)/ctrlEnv/sys
+
+#####################################################################################################
+# Include path
+###################################################################################################
+
+LSP_PATH_I      = $(srctree)/arch/arm/mach-kirkwood
+PLAT_PATH_I	= $(srctree)/arch/arm/plat-orion/mv_hal_drivers
+
+HAL_PATH        = -I$(PLAT_PATH_I)/$(HAL_DIR) -I$(PLAT_PATH_I)/$(HAL_SATA_DIR)
+KW_FAM_PATH  = 	  -I$(LSP_PATH_I)/$(KW_FAM_DIR)
+QD_PATH         = -I$(PLAT_PATH_I)/$(HAL_QD_DIR)/Include  -I$(PLAT_PATH_I)/$(HAL_QD_DIR)/Include/h/msApi 	\
+                  -I$(PLAT_PATH_I)/$(HAL_QD_DIR)/Include/h/driver -I$(PLAT_PATH_I)/$(HAL_QD_DIR)/Include/h/platform
+                     
+COMMON_PATH   	= -I$(PLAT_PATH_I)/$(COMMON_DIR)
+ 
+OSSERV_PATH     = -I$(PLAT_PATH_I)/$(OSSERV_DIR)
+LSP_PATH        = -I$(LSP_PATH_I)/$(LSP_DIR)
+CONFIG_PATH     = -I$(LSP_PATH_I)/$(CONFIG_DIR)
+
+EXTRA_INCLUDE  	= $(OSSERV_PATH) $(COMMON_PATH) $(HAL_PATH)  $(KW_FAM_PATH) \
+                  $(LSP_PATH) $(CONFIG_PATH)
+
+###################################################################################################
+# defines
+###################################################################################################
+MV_DEFINE = -DMV_LINUX -DMV_CPU_$(ENDIAN) -DMV_$(CPU_ARCH) -DMV_AUDIO_SKIP_WIN_DECODING
+
+EXTRA_CFLAGS 	+= $(EXTRA_INCLUDE) $(MV_DEFINE)
+
+
+ifeq ($(CONFIG_MV_GATEWAY),y)
+EXTRA_CFLAGS   += $(QD_PATH)
+EXTRA_CFLAGS    += -DLINUX 
+endif
+
+ifeq ($(CONFIG_MV_CESA_TEST),y)
+EXTRA_CFLAGS 	+= -DCONFIG_MV_CESA_TEST
+endif
+
+ifeq ($(CONFIG_SATA_DEBUG_ON_ERROR),y)
+EXTRA_CFLAGS    += -DMV_LOG_ERROR
+endif
+
+ifeq ($(CONFIG_SATA_FULL_DEBUG),y)
+EXTRA_CFLAGS    += -DMV_LOG_DEBUG
+endif
+
+ifeq ($(CONFIG_MV_SATA_SUPPORT_ATAPI),y)
+EXTRA_CFLAGS    += -DMV_SUPPORT_ATAPI
+endif
+
+ifeq ($(CONFIG_MV_SATA_ENABLE_1MB_IOS),y)
+EXTRA_CFLAGS    += -DMV_SUPPORT_1MBYTE_IOS
+endif
+
+EXTRA_CFLAGS    += -DMV88F6281
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/mvCompVer.txt
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/mvCompVer.txt
@@ -0,0 +1,4 @@
+Global HAL Version: DOVE_HAL_3_1_2
+Unit HAL Version: 1.0.2
+Description: This component includes an implementation of the unit HAL drivers
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/device/mvDevice.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/device/mvDevice.c
@@ -0,0 +1,75 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "device/mvDevice.h"
+
+/* defines  */       
+#ifdef MV_DEBUG         
+	#define DB(x)	x
+#else                
+	#define DB(x)    
+#endif	             
+
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/device/mvDevice.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/device/mvDevice.h
@@ -0,0 +1,74 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCmvDeviceH
+#define __INCmvDeviceH
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "device/mvDeviceRegs.h"
+
+
+#endif /* #ifndef __INCmvDeviceH */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/device/mvDeviceRegs.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/device/mvDeviceRegs.h
@@ -0,0 +1,101 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCmvDeviceRegsH
+#define __INCmvDeviceRegsH
+
+#ifndef MV_ASMLANGUAGE
+#include "ctrlEnv/mvCtrlEnvLib.h"
+/* This enumerator describes the Marvell controller possible devices that   */
+/* can be connected to its device interface.                                */
+typedef enum _mvDevice
+{
+#if defined(MV_INCLUDE_DEVICE_CS0)
+	DEV_CS0 = 0,    /* Device connected to dev CS[0]    */
+#endif
+#if defined(MV_INCLUDE_DEVICE_CS1)
+	DEV_CS1 = 1,        /* Device connected to dev CS[1]    */
+#endif
+#if defined(MV_INCLUDE_DEVICE_CS2)
+	DEV_CS2 = 2,        /* Device connected to dev CS[2]    */
+#endif
+#if defined(MV_INCLUDE_DEVICE_CS3)
+	DEV_CS3 = 3,        /* Device connected to dev CS[2]    */
+#endif
+#if defined(MV_INCLUDE_DEVICE_CS4)
+	DEV_CS4 = 4,        /* Device connected to BOOT dev    */
+#endif
+	MV_DEV_MAX_CS = MV_DEVICE_MAX_CS
+}MV_DEVICE;
+
+ 
+#endif /* MV_ASMLANGUAGE */
+
+
+#define NAND_CTRL_REG		0x10470
+
+#define NAND_ACTCEBOOT_BIT	BIT1
+
+
+#endif /* #ifndef __INCmvDeviceRegsH */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/cpu/mvCpu.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/cpu/mvCpu.c
@@ -0,0 +1,304 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#include "cpu/mvCpu.h"
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "ctrlEnv/mvCtrlEnvRegs.h"
+#include "ctrlEnv/sys/mvCpuIfRegs.h"
+
+/* defines  */
+#ifdef MV_DEBUG
+	#define DB(x)	x
+#else
+	#define DB(x)
+#endif	
+
+/* locals */
+
+/*******************************************************************************
+* mvCpuPclkGet - Get the CPU pClk (pipe clock)
+*
+* DESCRIPTION:
+*       This routine extract the CPU core clock.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       32bit clock cycles in MHertz.
+*
+*******************************************************************************/
+/* 6180 have different clk reset sampling */
+
+static MV_U32 mvCpu6180PclkGet(MV_VOID)
+{
+	MV_U32 	tmpPClkRate=0;
+	MV_CPU_ARM_CLK cpu6180_ddr_l2_CLK[] = MV_CPU6180_DDR_L2_CLCK_TBL;
+
+	tmpPClkRate = MV_REG_READ(MPP_SAMPLE_AT_RESET);
+	tmpPClkRate = tmpPClkRate & MSAR_CPUCLCK_MASK;
+	tmpPClkRate = tmpPClkRate >> MSAR_CPUCLCK_OFFS;
+			
+	tmpPClkRate = cpu6180_ddr_l2_CLK[tmpPClkRate].cpuClk;
+
+	return tmpPClkRate;
+}
+
+
+MV_U32 mvCpuPclkGet(MV_VOID)
+{
+#if defined(PCLCK_AUTO_DETECT)
+	MV_U32 	tmpPClkRate=0;
+	MV_U32 cpuCLK[] = MV_CPU_CLCK_TBL;
+
+	if(mvCtrlModelGet() == MV_6180_DEV_ID)
+		return mvCpu6180PclkGet();
+
+	tmpPClkRate = MV_REG_READ(MPP_SAMPLE_AT_RESET);
+	tmpPClkRate = tmpPClkRate & MSAR_CPUCLCK_MASK;
+	tmpPClkRate = tmpPClkRate >> MSAR_CPUCLCK_OFFS;
+		
+	tmpPClkRate = cpuCLK[tmpPClkRate];
+
+	return tmpPClkRate;
+#else
+	return MV_DEFAULT_PCLK
+#endif
+}
+
+/*******************************************************************************
+* mvCpuL2ClkGet - Get the CPU L2 (CPU bus clock)
+*
+* DESCRIPTION:
+*       This routine extract the CPU L2 clock.
+*
+* RETURN:
+*       32bit clock cycles in Hertz.
+*
+*******************************************************************************/
+static MV_U32  mvCpu6180L2ClkGet(MV_VOID)
+{
+	MV_U32 	L2ClkRate=0;
+	MV_CPU_ARM_CLK _cpu6180_ddr_l2_CLK[] = MV_CPU6180_DDR_L2_CLCK_TBL;
+
+	L2ClkRate = MV_REG_READ(MPP_SAMPLE_AT_RESET);
+	L2ClkRate = L2ClkRate & MSAR_CPUCLCK_MASK;
+	L2ClkRate = L2ClkRate >> MSAR_CPUCLCK_OFFS;
+			
+	L2ClkRate = _cpu6180_ddr_l2_CLK[L2ClkRate].l2Clk;
+
+	return L2ClkRate;
+
+}
+
+MV_U32  mvCpuL2ClkGet(MV_VOID)
+{
+#ifdef L2CLK_AUTO_DETECT
+	MV_U32 L2ClkRate, tmp, pClkRate, indexL2Rtio;
+	MV_U32 L2Rtio[][2] = MV_L2_CLCK_RTIO_TBL;
+
+	if(mvCtrlModelGet() == MV_6180_DEV_ID)
+		return mvCpu6180L2ClkGet();
+
+	pClkRate = mvCpuPclkGet();
+
+	tmp = MV_REG_READ(MPP_SAMPLE_AT_RESET);
+	indexL2Rtio = tmp & MSAR_L2CLCK_RTIO_MASK;
+	indexL2Rtio = indexL2Rtio >> MSAR_L2CLCK_RTIO_OFFS;
+
+	L2ClkRate = ((pClkRate * L2Rtio[indexL2Rtio][1]) / L2Rtio[indexL2Rtio][0]);
+
+	return L2ClkRate;
+#else
+	return MV_BOARD_DEFAULT_L2CLK;
+#endif
+}
+
+
+/*******************************************************************************
+* mvCpuNameGet - Get CPU name
+*
+* DESCRIPTION:
+*       This function returns a string describing the CPU model and revision.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       pNameBuff - Buffer to contain board name string. Minimum size 32 chars.
+*
+* RETURN:
+*       None.
+*******************************************************************************/
+MV_VOID mvCpuNameGet(char *pNameBuff)
+{
+    MV_U32 cpuModel;
+    
+    cpuModel = mvOsCpuPartGet();
+
+    /* The CPU module is indicated in the Processor Version Register (PVR) */
+    switch(cpuModel)
+    {
+        case CPU_PART_MRVL131:
+            mvOsSPrintf(pNameBuff, "%s (Rev %d)", "Marvell Feroceon",mvOsCpuRevGet());
+            break;
+        case CPU_PART_ARM926:
+            mvOsSPrintf(pNameBuff, "%s (Rev %d)", "ARM926",mvOsCpuRevGet());
+            break;
+	case CPU_PART_ARM946:
+		mvOsSPrintf(pNameBuff, "%s (Rev %d)", "ARM946",mvOsCpuRevGet());
+		break;
+        default:
+            mvOsSPrintf(pNameBuff,"??? (0x%04x) (Rev %d)",cpuModel,mvOsCpuRevGet());
+            break;
+    }  /* switch  */
+
+    return;
+}
+
+#if defined(MV88F6281)
+
+#define MV_PROC_STR_SIZE 50
+
+static void mvCpuIfGetL2EccMode(MV_8 *buf)
+{
+    MV_U32 regVal = MV_REG_READ(CPU_CONFIG_REG);
+    if (regVal & BIT22)
+	mvOsSPrintf(buf, "L2 ECC Enabled");
+    else
+	mvOsSPrintf(buf, "L2 ECC Disabled");
+}
+
+static void mvCpuIfGetL2Mode(MV_8 *buf)
+{
+    MV_U32 regVal = 0;
+    __asm volatile ("mrc	p15, 1, %0, c15, c1, 0" : "=r" (regVal)); /* Read Marvell extra features register */
+    if (regVal & BIT22)
+	mvOsSPrintf(buf, "L2 Enabled");
+    else
+	mvOsSPrintf(buf, "L2 Disabled");
+}
+
+static void mvCpuIfGetL2PrefetchMode(MV_8 *buf)
+{
+    MV_U32 regVal = 0;
+    __asm volatile ("mrc	p15, 1, %0, c15, c1, 0" : "=r" (regVal)); /* Read Marvell extra features register */
+    if (regVal & BIT24)
+	mvOsSPrintf(buf, "L2 Prefetch Disabled");
+    else
+	mvOsSPrintf(buf, "L2 Prefetch Enabled");
+}
+
+static void mvCpuIfGetWriteAllocMode(MV_8 *buf)
+{
+    MV_U32 regVal = 0;
+    __asm volatile ("mrc	p15, 1, %0, c15, c1, 0" : "=r" (regVal)); /* Read Marvell extra features register */
+    if (regVal & BIT28)
+	mvOsSPrintf(buf, "Write Allocate Enabled");
+    else
+	mvOsSPrintf(buf, "Write Allocate Disabled");
+}
+
+static void mvCpuIfGetCpuStreamMode(MV_8 *buf)
+{
+    MV_U32 regVal = 0;
+    __asm volatile ("mrc	p15, 1, %0, c15, c1, 0" : "=r" (regVal)); /* Read Marvell extra features register */
+    if (regVal & BIT29)
+	mvOsSPrintf(buf, "CPU Streaming Enabled");
+    else
+	mvOsSPrintf(buf, "CPU Streaming Disabled");
+}
+
+
+MV_U32 mvCpuIfPrintSystemConfig(MV_8 *buffer, MV_U32 index)
+{
+  MV_U32 count = 0;
+  
+  MV_8 L2_ECC_str[MV_PROC_STR_SIZE];
+  MV_8 L2_En_str[MV_PROC_STR_SIZE];
+  MV_8 L2_Prefetch_str[MV_PROC_STR_SIZE];
+  MV_8 Write_Alloc_str[MV_PROC_STR_SIZE];
+  MV_8 Cpu_Stream_str[MV_PROC_STR_SIZE];
+  
+  mvCpuIfGetL2Mode(L2_En_str);
+  mvCpuIfGetL2EccMode(L2_ECC_str); 
+  mvCpuIfGetL2PrefetchMode(L2_Prefetch_str);
+  mvCpuIfGetWriteAllocMode(Write_Alloc_str);
+  mvCpuIfGetCpuStreamMode(Cpu_Stream_str);
+  
+  count += mvOsSPrintf(buffer + count + index, "%s\n", L2_En_str);
+  count += mvOsSPrintf(buffer + count + index, "%s\n", L2_ECC_str);
+  count += mvOsSPrintf(buffer + count + index, "%s\n", L2_Prefetch_str);
+  count += mvOsSPrintf(buffer + count + index, "%s\n", Write_Alloc_str);
+  count += mvOsSPrintf(buffer + count + index, "%s\n", Cpu_Stream_str);
+  return count;
+}
+
+#endif
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/cpu/mvCpu.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/cpu/mvCpu.h
@@ -0,0 +1,103 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#ifndef __INCmvCpuh
+#define __INCmvCpuh
+
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+
+/* defines */
+
+#define CPU_PART_MRVL131      0x131
+#define CPU_PART_ARM926       0x926
+#define CPU_PART_ARM946       0x946
+#define MV_CPU_ARM_CLK_ELM_SIZE	    12
+#define MV_CPU_ARM_CLK_RATIO_OFF    8
+#define MV_CPU_ARM_CLK_DDR_OFF	    4
+
+#ifndef MV_ASMLANGUAGE
+typedef struct _mvCpuArmClk 
+{
+	MV_U32	      cpuClk;	  /* CPU clock in MHz */
+	MV_U32	      ddrClk;	  /* DDR clock in MHz */
+	MV_U32	      l2Clk;	  /* CPU DDR clock ratio */
+
+}MV_CPU_ARM_CLK;
+
+MV_U32    mvCpuPclkGet(MV_VOID);
+MV_VOID   mvCpuNameGet(char *pNameBuff);
+
+MV_U32  mvCpuL2ClkGet(MV_VOID);
+
+#if defined(MV88F6281)
+MV_U32 mvCpuIfPrintSystemConfig(MV_8 *buffer, MV_U32 index);
+#endif
+
+#endif
+
+
+#endif /* __INCmvCpuh */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/mvCtrlEnvAsm.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/mvCtrlEnvAsm.h
@@ -0,0 +1,98 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#ifndef __INCmvCtrlEnvAsmh
+#define __INCmvCtrlEnvAsmh
+#include "pex/mvPexRegs.h"
+
+#define CHIP_BOND_REG					0x10034
+#define PCKG_OPT_MASK_AS 		#3
+#define PXCCARI_REVID_MASK_AS           #PXCCARI_REVID_MASK
+
+/* Read device ID into toReg bits 15:0 from 0xd0000000 */
+/* defines  */
+#define MV_DV_CTRL_MODEL_GET_ASM(toReg, tmpReg) \
+        MV_DV_REG_READ_ASM(toReg, tmpReg, CHIP_BOND_REG);\
+        and     toReg, toReg, PCKG_OPT_MASK_AS                 /* Mask for package ID */
+
+/* Read device ID into toReg bits 15:0 from 0xf1000000*/
+#define MV_CTRL_MODEL_GET_ASM(toReg, tmpReg) \
+        MV_REG_READ_ASM(toReg, tmpReg, CHIP_BOND_REG);\
+        and     toReg, toReg, PCKG_OPT_MASK_AS                  /* Mask for package ID */
+
+/* Read Revision into toReg bits 7:0 0xd0000000*/
+#define MV_DV_CTRL_REV_GET_ASM(toReg, tmpReg)	\
+        /* Read device revision */			\
+        MV_DV_REG_READ_ASM(toReg, tmpReg, PEX_CFG_DIRECT_ACCESS(0,PEX_CLASS_CODE_AND_REVISION_ID));\
+        and     toReg, toReg, PXCCARI_REVID_MASK_AS                  /* Mask for calss ID */
+
+/* Read Revision into toReg bits 7:0 0xf1000000*/
+#define MV_CTRL_REV_GET_ASM(toReg, tmpReg)	\
+        /* Read device revision */			\
+        MV_REG_READ_ASM(toReg, tmpReg, PEX_CFG_DIRECT_ACCESS(0,PEX_CLASS_CODE_AND_REVISION_ID));\
+        and     toReg, toReg, PXCCARI_REVID_MASK_AS                  /* Mask for calss ID */
+
+
+#endif /* __INCmvCtrlEnvAsmh */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/mvCtrlEnvAddrDec.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/mvCtrlEnvAddrDec.c
@@ -0,0 +1,296 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+/*******************************************************************************
+* mvCtrlEnvAddrDec.h - Marvell controller address decode library
+*
+* DESCRIPTION:
+*
+* DEPENDENCIES:
+*       None.
+*
+*******************************************************************************/
+
+/* includes */
+#include "ctrlEnv/mvCtrlEnvAddrDec.h"
+#include "ctrlEnv/sys/mvAhbToMbusRegs.h"
+#include "ddr2/mvDramIfRegs.h"
+#include "pex/mvPexRegs.h"
+
+#define MV_DEBUG
+
+/* defines  */
+#ifdef MV_DEBUG
+	#define DB(x)	x
+#else
+	#define DB(x)
+#endif
+	
+/* Default Attributes array */
+MV_TARGET_ATTRIB	mvTargetDefaultsArray[] = TARGETS_DEF_ARRAY;
+extern MV_TARGET sampleAtResetTargetArray[];
+/* Dram\AHBToMbus\PEX share regsiter */
+
+#define CTRL_DEC_BASE_OFFS		16
+#define CTRL_DEC_BASE_MASK		(0xffff << CTRL_DEC_BASE_OFFS)
+#define CTRL_DEC_BASE_ALIGNMENT	0x10000
+
+#define CTRL_DEC_SIZE_OFFS		16
+#define CTRL_DEC_SIZE_MASK		(0xffff << CTRL_DEC_SIZE_OFFS)
+#define CTRL_DEC_SIZE_ALIGNMENT	0x10000
+
+#define CTRL_DEC_WIN_EN			BIT0
+
+
+
+/*******************************************************************************
+* mvCtrlAddrDecToReg - Get address decode register format values
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*
+* RETURN:
+*
+*******************************************************************************/
+MV_STATUS mvCtrlAddrDecToReg(MV_ADDR_WIN *pAddrDecWin, MV_DEC_REGS *pAddrDecRegs)
+{
+
+	MV_U32 baseToReg=0 , sizeToReg=0;
+    
+	/* BaseLow[31:16] => base register [31:16]		*/
+	baseToReg = pAddrDecWin->baseLow & CTRL_DEC_BASE_MASK;
+
+	/* Write to address decode Base Address Register                  */
+	pAddrDecRegs->baseReg &= ~CTRL_DEC_BASE_MASK;
+	pAddrDecRegs->baseReg |= baseToReg;
+
+	/* Get size register value according to window size						*/
+	sizeToReg = ctrlSizeToReg(pAddrDecWin->size, CTRL_DEC_SIZE_ALIGNMENT);
+	
+	/* Size parameter validity check.                                   */
+	if (-1 == sizeToReg)
+	{
+		return MV_BAD_PARAM;
+	}
+
+	/* set size */
+	pAddrDecRegs->sizeReg &= ~CTRL_DEC_SIZE_MASK;
+	pAddrDecRegs->sizeReg |= (sizeToReg << CTRL_DEC_SIZE_OFFS);
+	
+
+	return MV_OK;
+
+}
+
+/*******************************************************************************
+* mvCtrlRegToAddrDec - Extract address decode struct from registers.
+*
+* DESCRIPTION:
+*       This function extract address decode struct from address decode 
+*       registers given as parameters.
+*
+* INPUT:
+*       pAddrDecRegs - Address decode register struct.
+*
+* OUTPUT:
+*       pAddrDecWin - Target window data structure.
+*
+* RETURN:
+*		MV_BAD_PARAM if address decode registers data is invalid.
+*
+*******************************************************************************/
+MV_STATUS mvCtrlRegToAddrDec(MV_DEC_REGS *pAddrDecRegs, MV_ADDR_WIN *pAddrDecWin)
+{
+	MV_U32 sizeRegVal;
+	
+	sizeRegVal = (pAddrDecRegs->sizeReg & CTRL_DEC_SIZE_MASK) >> 
+					CTRL_DEC_SIZE_OFFS;
+
+	pAddrDecWin->size = ctrlRegToSize(sizeRegVal, CTRL_DEC_SIZE_ALIGNMENT);
+
+
+	/* Extract base address						*/
+	/* Base register [31:16] ==> baseLow[31:16] 		*/
+	pAddrDecWin->baseLow = pAddrDecRegs->baseReg & CTRL_DEC_BASE_MASK;
+
+	pAddrDecWin->baseHigh =  0;
+
+	return MV_OK;
+    
+}
+
+/*******************************************************************************
+* mvCtrlAttribGet - 
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*
+* RETURN:
+*
+*******************************************************************************/
+
+MV_STATUS mvCtrlAttribGet(MV_TARGET target,
+						  MV_TARGET_ATTRIB *targetAttrib)
+{
+
+	targetAttrib->attrib = mvTargetDefaultsArray[MV_CHANGE_BOOT_CS(target)].attrib;
+	targetAttrib->targetId = mvTargetDefaultsArray[MV_CHANGE_BOOT_CS(target)].targetId;
+
+	return MV_OK;
+
+}
+
+/*******************************************************************************
+* mvCtrlGetAttrib - 
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*
+* RETURN:
+*
+*******************************************************************************/
+MV_TARGET mvCtrlTargetGet(MV_TARGET_ATTRIB *targetAttrib)
+{
+	MV_TARGET target;
+	MV_TARGET x;
+	for (target = SDRAM_CS0; target < MAX_TARGETS ; target ++)
+	{
+		x = MV_CHANGE_BOOT_CS(target);
+		if ((mvTargetDefaultsArray[x].attrib == targetAttrib->attrib) &&
+			(mvTargetDefaultsArray[MV_CHANGE_BOOT_CS(target)].targetId == targetAttrib->targetId))
+		{
+			/* found it */
+			break;
+		}
+	}
+
+	return target;
+}
+
+MV_STATUS mvCtrlAddrDecToParams(MV_DEC_WIN *pAddrDecWin, 
+                                MV_DEC_WIN_PARAMS *pWinParam)
+{
+	MV_U32 baseToReg=0, sizeToReg=0;
+    
+	/* BaseLow[31:16] => base register [31:16]		*/
+	baseToReg = pAddrDecWin->addrWin.baseLow & CTRL_DEC_BASE_MASK;
+
+	/* Write to address decode Base Address Register                  */
+	pWinParam->baseAddr &= ~CTRL_DEC_BASE_MASK;
+	pWinParam->baseAddr |= baseToReg;
+
+	/* Get size register value according to window size						*/
+	sizeToReg = ctrlSizeToReg(pAddrDecWin->addrWin.size, CTRL_DEC_SIZE_ALIGNMENT);
+	
+	/* Size parameter validity check.                                   */
+	if (-1 == sizeToReg)
+	{
+        mvOsPrintf("mvCtrlAddrDecToParams: ERR. ctrlSizeToReg failed.\n");
+		return MV_BAD_PARAM;
+	}
+    pWinParam->size = sizeToReg;
+
+    pWinParam->attrib   = mvTargetDefaultsArray[MV_CHANGE_BOOT_CS(pAddrDecWin->target)].attrib;
+    pWinParam->targetId = mvTargetDefaultsArray[MV_CHANGE_BOOT_CS(pAddrDecWin->target)].targetId;
+
+    return MV_OK;
+}
+
+MV_STATUS mvCtrlParamsToAddrDec(MV_DEC_WIN_PARAMS *pWinParam, 
+                                MV_DEC_WIN *pAddrDecWin)
+{
+    MV_TARGET_ATTRIB    targetAttrib;
+
+    pAddrDecWin->addrWin.baseLow = pWinParam->baseAddr;
+	
+	/* Upper 32bit address base is supported under PCI High Address remap */
+	pAddrDecWin->addrWin.baseHigh = 0;	
+
+	/* Prepare sizeReg to ctrlRegToSize function */
+    pAddrDecWin->addrWin.size = ctrlRegToSize(pWinParam->size, CTRL_DEC_SIZE_ALIGNMENT);
+
+	if (-1 == pAddrDecWin->addrWin.size)
+	{
+		DB(mvOsPrintf("mvCtrlParamsToAddrDec: ERR. ctrlRegToSize failed.\n"));
+		return MV_BAD_PARAM;
+	}
+    targetAttrib.targetId = pWinParam->targetId;
+    targetAttrib.attrib = pWinParam->attrib;
+
+    pAddrDecWin->target = mvCtrlTargetGet(&targetAttrib);
+
+    return MV_OK;
+}
+
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/mvCtrlEnvRegs.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/mvCtrlEnvRegs.h
@@ -0,0 +1,392 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+        this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCmvCtrlEnvRegsh
+#define __INCmvCtrlEnvRegsh
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/* CV Support */
+#define PEX0_MEM0 	PEX0_MEM
+#define PCI0_MEM0	PEX0_MEM
+
+/* Controller revision info */
+#define PCI_CLASS_CODE_AND_REVISION_ID			    0x008
+#define PCCRIR_REVID_OFFS				    0		/* Revision ID */
+#define PCCRIR_REVID_MASK				    (0xff << PCCRIR_REVID_OFFS)
+
+/* Controler environment registers offsets */
+
+/* Power Managment Control */
+#define POWER_MNG_MEM_CTRL_REG			0x20118
+
+#define PMC_GESTOPMEM_OFFS(port)		((port)? 13 : 0)
+#define PMC_GESTOPMEM_MASK(port)		(1 << PMC_GESTOPMEM_OFFS(port))
+#define PMC_GESTOPMEM_EN(port)			(0 << PMC_GESTOPMEM_OFFS(port))
+#define PMC_GESTOPMEM_STOP(port)		(1 << PMC_GESTOPMEM_OFFS(port))
+
+#define PMC_PEXSTOPMEM_OFFS			1
+#define PMC_PEXSTOPMEM_MASK			(1 << PMC_PEXSTOPMEM_OFFS)
+#define PMC_PEXSTOPMEM_EN			(0 << PMC_PEXSTOPMEM_OFFS)
+#define PMC_PEXSTOPMEM_STOP			(1 << PMC_PEXSTOPMEM_OFFS)
+
+#define PMC_USBSTOPMEM_OFFS			2
+#define PMC_USBSTOPMEM_MASK			(1 << PMC_USBSTOPMEM_OFFS)
+#define PMC_USBSTOPMEM_EN			(0 << PMC_USBSTOPMEM_OFFS)
+#define PMC_USBSTOPMEM_STOP			(1 << PMC_USBSTOPMEM_OFFS)
+
+#define PMC_DUNITSTOPMEM_OFFS			3
+#define PMC_DUNITSTOPMEM_MASK			(1 << PMC_DUNITSTOPMEM_OFFS)
+#define PMC_DUNITSTOPMEM_EN			(0 << PMC_DUNITSTOPMEM_OFFS)
+#define PMC_DUNITSTOPMEM_STOP			(1 << PMC_DUNITSTOPMEM_OFFS)
+
+#define PMC_RUNITSTOPMEM_OFFS			4
+#define PMC_RUNITSTOPMEM_MASK			(1 << PMC_RUNITSTOPMEM_OFFS)
+#define PMC_RUNITSTOPMEM_EN			(0 << PMC_RUNITSTOPMEM_OFFS)
+#define PMC_RUNITSTOPMEM_STOP			(1 << PMC_RUNITSTOPMEM_OFFS)
+
+#define PMC_XORSTOPMEM_OFFS(port)		(5+(port*2))
+#define PMC_XORSTOPMEM_MASK(port)		(1 << PMC_XORSTOPMEM_OFFS(port))
+#define PMC_XORSTOPMEM_EN(port)			(0 << PMC_XORSTOPMEM_OFFS(port))
+#define PMC_XORSTOPMEM_STOP(port)		(1 << PMC_XORSTOPMEM_OFFS(port))
+
+#define PMC_SATASTOPMEM_OFFS(port)		(6+(port*5))
+#define PMC_SATASTOPMEM_MASK(port)		(1 << PMC_SATASTOPMEM_OFFS(port))
+#define PMC_SATASTOPMEM_EN(port)		(0 << PMC_SATASTOPMEM_OFFS(port))
+#define PMC_SATASTOPMEM_STOP(port)		(1 << PMC_SATASTOPMEM_OFFS(port))
+
+#define PMC_SESTOPMEM_OFFS			8
+#define PMC_SESTOPMEM_MASK			(1 << PMC_SESTOPMEM_OFFS)
+#define PMC_SESTOPMEM_EN			(0 << PMC_SESTOPMEM_OFFS)
+#define PMC_SESTOPMEM_STOP			(1 << PMC_SESTOPMEM_OFFS)
+
+#define PMC_AUDIOSTOPMEM_OFFS			9
+#define PMC_AUDIOSTOPMEM_MASK			(1 << PMC_AUDIOSTOPMEM_OFFS)
+#define PMC_AUDIOSTOPMEM_EN			(0 << PMC_AUDIOSTOPMEM_OFFS)
+#define PMC_AUDIOSTOPMEM_STOP			(1 << PMC_AUDIOSTOPMEM_OFFS)
+
+#define POWER_MNG_CTRL_REG			0x2011C
+
+#define PMC_GESTOPCLOCK_OFFS(port)		((port)? 19 : 0)
+#define PMC_GESTOPCLOCK_MASK(port)		(1 << PMC_GESTOPCLOCK_OFFS(port))
+#define PMC_GESTOPCLOCK_EN(port)		(1 << PMC_GESTOPCLOCK_OFFS(port))
+#define PMC_GESTOPCLOCK_STOP(port)		(0 << PMC_GESTOPCLOCK_OFFS(port))
+
+#define PMC_PEXPHYSTOPCLOCK_OFFS		1
+#define PMC_PEXPHYSTOPCLOCK_MASK		(1 << PMC_PEXPHYSTOPCLOCK_OFFS)
+#define PMC_PEXPHYSTOPCLOCK_EN			(1 << PMC_PEXPHYSTOPCLOCK_OFFS)
+#define PMC_PEXPHYSTOPCLOCK_STOP		(0 << PMC_PEXPHYSTOPCLOCK_OFFS)
+
+#define PMC_PEXSTOPCLOCK_OFFS			2
+#define PMC_PEXSTOPCLOCK_MASK			(1 << PMC_PEXSTOPCLOCK_OFFS)
+#define PMC_PEXSTOPCLOCK_EN			(1 << PMC_PEXSTOPCLOCK_OFFS)
+#define PMC_PEXSTOPCLOCK_STOP			(0 << PMC_PEXSTOPCLOCK_OFFS)
+
+#define PMC_USBSTOPCLOCK_OFFS			3
+#define PMC_USBSTOPCLOCK_MASK			(1 << PMC_USBSTOPCLOCK_OFFS)
+#define PMC_USBSTOPCLOCK_EN			(1 << PMC_USBSTOPCLOCK_OFFS)
+#define PMC_USBSTOPCLOCK_STOP			(0 << PMC_USBSTOPCLOCK_OFFS)
+
+#define PMC_SDIOSTOPCLOCK_OFFS			4
+#define PMC_SDIOSTOPCLOCK_MASK			(1 << PMC_SDIOSTOPCLOCK_OFFS)
+#define PMC_SDIOSTOPCLOCK_EN			(1 << PMC_SDIOSTOPCLOCK_OFFS)
+#define PMC_SDIOSTOPCLOCK_STOP			(0 << PMC_SDIOSTOPCLOCK_OFFS)
+
+#define PMC_TSSTOPCLOCK_OFFS			5
+#define PMC_TSSTOPCLOCK_MASK			(1 << PMC_TSSTOPCLOCK_OFFS)
+#define PMC_TSSTOPCLOCK_EN			(1 << PMC_TSSTOPCLOCK_OFFS)
+#define PMC_TSSTOPCLOCK_STOP			(0 << PMC_TSSTOPCLOCK_OFFS)
+
+#define PMC_AUDIOSTOPCLOCK_OFFS			9
+#define PMC_AUDIOSTOPCLOCK_MASK			(1 << PMC_AUDIOSTOPCLOCK_OFFS)
+#define PMC_AUDIOSTOPCLOCK_EN			(1 << PMC_AUDIOSTOPCLOCK_OFFS)
+#define PMC_AUDIOSTOPCLOCK_STOP			(0 << PMC_AUDIOSTOPCLOCK_OFFS)
+
+#define PMC_SATASTOPCLOCK_OFFS(port)		(14+(port))
+#define PMC_SATASTOPCLOCK_MASK(port)		(1 << PMC_SATASTOPCLOCK_OFFS(port))
+#define PMC_SATASTOPCLOCK_EN(port)		(1 << PMC_SATASTOPCLOCK_OFFS(port))
+#define PMC_SATASTOPCLOCK_STOP(port)		(0 << PMC_SATASTOPCLOCK_OFFS(port))
+
+#define PMC_SESTOPCLOCK_OFFS			17
+#define PMC_SESTOPCLOCK_MASK			(1 << PMC_SESTOPCLOCK_OFFS)
+#define PMC_SESTOPCLOCK_EN			(1 << PMC_SESTOPCLOCK_OFFS)
+#define PMC_SESTOPCLOCK_STOP			(0 << PMC_SESTOPCLOCK_OFFS)
+
+#define PMC_TDMSTOPCLOCK_OFFS			20
+#define PMC_TDMSTOPCLOCK_MASK			(1 << PMC_TDMSTOPCLOCK_OFFS)
+#define PMC_TDMSTOPCLOCK_EN			(1 << PMC_TDMSTOPCLOCK_OFFS)
+#define PMC_TDMSTOPCLOCK_STOP			(0 << PMC_TDMSTOPCLOCK_OFFS)
+
+
+/* Controler environment registers offsets */
+#define MPP_CONTROL_REG0			0x10000
+#define MPP_CONTROL_REG1			0x10004
+#define MPP_CONTROL_REG2			0x10008
+#define MPP_CONTROL_REG3			0x1000C
+#define MPP_CONTROL_REG4			0x10010
+#define MPP_CONTROL_REG5			0x10014
+#define MPP_CONTROL_REG6			0x10018
+#define MPP_SAMPLE_AT_RESET			0x10030
+#define CHIP_BOND_REG				0x10034
+#define PCKG_OPT_MASK				0x3
+#define MPP_OUTPUT_DRIVE_REG			0x100E0
+#define MPP_RGMII0_OUTPUT_DRIVE_OFFS            7
+#define MPP_3_3_RGMII0_OUTPUT_DRIVE		(0x0 << MPP_RGMII0_OUTPUT_DRIVE_OFFS)
+#define MPP_1_8_RGMII0_OUTPUT_DRIVE		(0x1 << MPP_RGMII0_OUTPUT_DRIVE_OFFS)
+#define MPP_RGMII1_OUTPUT_DRIVE_OFFS            15
+#define MPP_3_3_RGMII1_OUTPUT_DRIVE		(0x0 << MPP_RGMII1_OUTPUT_DRIVE_OFFS)
+#define MPP_1_8_RGMII1_OUTPUT_DRIVE		(0x1 << MPP_RGMII1_OUTPUT_DRIVE_OFFS)
+
+#define MSAR_BOOT_MODE_OFFS                     12
+#define MSAR_BOOT_MODE_MASK                     (0x7 << MSAR_BOOT_MODE_OFFS)
+#define MSAR_BOOT_NAND				(0x1 << MSAR_BOOT_MODE_OFFS)
+#define MSAR_BOOT_NAND_WITH_BOOTROM		(0x5 << MSAR_BOOT_MODE_OFFS)
+#define MSAR_BOOT_SPI				(0x0 << MSAR_BOOT_MODE_OFFS)
+#define MSAR_BOOT_SPI_WITH_BOOTROM		(0x4 << MSAR_BOOT_MODE_OFFS)
+
+#define MSAR_TCLCK_OFFS				16
+#define MSAR_TCLCK_MASK				(0x3 << MSAR_TCLCK_OFFS)
+#define MSAR_TCLCK_166				(0x1 << MSAR_TCLCK_OFFS)
+#define MSAR_TCLCK_200                         	(0x2 << MSAR_TCLCK_OFFS)
+
+#define MSAR_CPUCLCK_OFFS		1
+#define MSAR_CPUCLCK_MASK		(0xF << MSAR_CPUCLCK_OFFS)
+
+#define MSAR_DDRCLCK_RTIO_OFFS		5
+#define MSAR_DDRCLCK_RTIO_MASK		(0xF << MSAR_DDRCLCK_RTIO_OFFS)
+
+#define MSAR_L2CLCK_RTIO_OFFS		9
+#define MSAR_L2CLCK_RTIO_MASK		(0x7 << MSAR_L2CLCK_RTIO_OFFS)
+
+#ifndef MV_ASMLANGUAGE
+/* CPU clock for 6281,6192  0->Resereved */
+#define MV_CPU_CLCK_TBL { 	0,		0, 		0, 		0,		\
+			     	600000000, 	0,		800000000,	1000000000,	\
+			     	0,	 	1200000000,	0,		0,		\
+			     	1500000000,	0,		0,		0}
+/* DDR clock RATIO for 6281,6192 {0,0}->Reserved */
+#define MV_DDR_CLCK_RTIO_TBL	{\
+	{0, 0}, {0, 0}, {0, 0}, {5, 2}, \
+	{3, 1}, {0, 0}, {4, 1}, {0, 0}, \
+	{0, 0}, {0, 0}, {0, 0}, {0, 0}, \
+	{0, 0}, {0, 0}, {0, 0}, {0, 0} \
+}
+
+/* L2 clock RATIO for 6281,6192 {1,1}->Reserved */
+#define MV_L2_CLCK_RTIO_TBL	{\
+	{0, 0}, {2, 1}, {5, 2}, {3, 1}, \
+	{0, 0}, {0, 0}, {0, 0}, {0, 0} \
+}
+
+/* 6180 have different clk reset sampling 		*/
+/* ARM CPU, DDR, L2 clock for 6180 {0,0,0}->Reserved 	*/
+#define MV_CPU6180_DDR_L2_CLCK_TBL    { \
+	{0,   		0,   		0		},\
+	{0,   		0,   		0		},\
+	{333333333, 	166666667, 	333333333	},\
+	{0,   		0,   		0		},\
+	{500000000, 	166666667, 	250000000	},\
+	{0,   		0,   		0		},\
+	{0,   		0,   		0		},\
+	{0,   		0,   		0		},\
+	{0,   		0,   		0		},\
+	{0,   		0,   		0		},\
+	{0,   		0,   		0		},\
+	{600000000, 	200000000, 	300000000	},\
+	{0,   		0,   		0		},\
+	{800000000, 	200000000, 	400000000	},\
+	{0,   		0,   		0		},\
+	{0,   		0,   		0		}\
+}
+
+
+/* These macros help units to identify a target Mbus Arbiter group */
+#define MV_TARGET_IS_DRAM(target)   \
+                            ((target >= SDRAM_CS0) && (target <= SDRAM_CS3))
+
+#define MV_TARGET_IS_PEX0(target)   \
+                            ((target >= PEX0_MEM) && (target <= PEX0_IO))
+
+#define MV_TARGET_IS_PEX1(target)   0
+
+#define MV_TARGET_IS_PEX(target) (MV_TARGET_IS_PEX0(target) || MV_TARGET_IS_PEX1(target))
+
+#define MV_TARGET_IS_DEVICE(target) \
+                            ((target >= DEVICE_CS0) && (target <= DEVICE_CS3))
+
+#define MV_PCI_DRAM_BAR_TO_DRAM_TARGET(bar)   0
+
+#define	MV_TARGET_IS_AS_BOOT(target) ((target) == (sampleAtResetTargetArray[((MV_REG_READ(MPP_SAMPLE_AT_RESET)\
+						 & MSAR_BOOT_MODE_MASK) >> MSAR_BOOT_MODE_OFFS)]))
+
+
+#define MV_CHANGE_BOOT_CS(target)	((target) == DEV_BOOCS)?\
+					sampleAtResetTargetArray[((MV_REG_READ(MPP_SAMPLE_AT_RESET)\
+						 & MSAR_BOOT_MODE_MASK) >> MSAR_BOOT_MODE_OFFS)]\
+					:(target)
+					
+#define TCLK_TO_COUNTER_RATIO   1   /* counters running in Tclk */
+
+#define BOOT_TARGETS_NAME_ARRAY {       \
+    SPI_CS,          	\
+    NFLASH_CS,          \
+    TBL_TERM,         	\
+    TBL_TERM,           \
+    BOOT_ROM_CS,        \
+    BOOT_ROM_CS,        \
+    BOOT_ROM_CS,        \
+    BOOT_ROM_CS,        \
+    BOOT_ROM_CS,        \
+}
+
+
+/* For old competability */
+#define DEVICE_CS0		NFLASH_CS  
+#define DEVICE_CS1  		SPI_CS 
+#define DEVICE_CS2  		BOOT_ROM_CS 
+#define DEVICE_CS3  		DEV_BOOCS
+#define MV_BOOTDEVICE_INDEX   	0
+
+#define START_DEV_CS   		DEV_CS0
+#define DEV_TO_TARGET(dev)	((dev) + DEVICE_CS0)
+
+#define PCI_IF0_MEM0		PEX0_MEM
+#define PCI_IF0_IO		PEX0_IO
+
+
+/* This enumerator defines the Marvell controller target ID      */ 
+typedef enum _mvTargetId
+{
+    DRAM_TARGET_ID  = 0 ,    /* Port 0 -> DRAM interface         */
+    DEV_TARGET_ID   = 1,     /* Port 1 -> Nand/SPI 		*/
+    PEX0_TARGET_ID  = 4 ,    /* Port 4 -> PCI Express0 		*/
+    CRYPT_TARGET_ID = 3 ,    /* Port 3 --> Crypto Engine 	*/
+    SAGE_TARGET_ID = 12 ,    /* Port 12 -> SAGE Unit 	*/
+    MAX_TARGETS_ID
+}MV_TARGET_ID;
+
+
+/* This enumerator described the possible Controller paripheral targets.    */
+/* Controller peripherals are designated memory/IO address spaces that the  */
+/* controller can access. They are also refered as "targets"                */
+typedef enum _mvTarget
+{
+    TBL_TERM = -1, 	/* none valid target, used as targets list terminator*/
+    SDRAM_CS0,      	/* SDRAM chip select 0                          */  
+    SDRAM_CS1,      	/* SDRAM chip select 1                          */  
+    SDRAM_CS2,      	/* SDRAM chip select 2                          */  
+    SDRAM_CS3,      	/* SDRAM chip select 3                          */  
+    PEX0_MEM,		/* PCI Express 0 Memory				*/
+    PEX0_IO,		/* PCI Express 0 IO				*/
+    INTER_REGS,     	/* Internal registers                           */  
+    NFLASH_CS,     	/* NFLASH_CS					*/  
+    SPI_CS,     	/* SPI_CS					*/  
+    BOOT_ROM_CS,        /* BOOT_ROM_CS                                  */  
+    DEV_BOOCS,     	/* DEV_BOOCS					*/  
+    CRYPT_ENG,      	/* Crypto Engine				*/  
+#ifdef MV_INCLUDE_SAGE
+    SAGE_UNIT,      	/* SAGE Unit					*/  
+#endif
+    MAX_TARGETS
+
+}MV_TARGET;
+
+#define TARGETS_DEF_ARRAY	{			\
+    {0x0E, DRAM_TARGET_ID }, /* SDRAM_CS0 */		\
+    {0x0D, DRAM_TARGET_ID }, /* SDRAM_CS1 */		\
+    {0x0B, DRAM_TARGET_ID }, /* SDRAM_CS0 */		\
+    {0x07, DRAM_TARGET_ID }, /* SDRAM_CS1 */		\
+    {0xE8, PEX0_TARGET_ID }, /* PEX0_MEM */			\
+    {0xE0, PEX0_TARGET_ID }, /* PEX0_IO */			\
+    {0xFF, 0xFF           }, /* INTER_REGS */		\
+    {0x2F, DEV_TARGET_ID  },  /* NFLASH_CS */		\
+    {0x1E, DEV_TARGET_ID  },  /* SPI_CS */		 	\
+    {0x1D, DEV_TARGET_ID  },  /* BOOT_ROM_CS */     \
+    {0x1E, DEV_TARGET_ID  },  /* DEV_BOOCS */		\
+    {0x01, CRYPT_TARGET_ID}, /* CRYPT_ENG */        \
+    {0x00, SAGE_TARGET_ID }  						\
+}
+
+
+#define TARGETS_NAME_ARRAY	{	\
+    "SDRAM_CS0",    /* SDRAM_CS0 */	\
+    "SDRAM_CS1",    /* SDRAM_CS1 */	\
+    "SDRAM_CS2",    /* SDRAM_CS2 */	\
+    "SDRAM_CS3",    /* SDRAM_CS3 */	\
+    "PEX0_MEM",	    /* PEX0_MEM */	\
+    "PEX0_IO",	    /* PEX0_IO */	\
+    "INTER_REGS",   /* INTER_REGS */	\
+    "NFLASH_CS",    /* NFLASH_CS */	\
+    "SPI_CS",	    /* SPI_CS */	\
+    "BOOT_ROM_CS",  /* BOOT_ROM_CS */ \
+    "DEV_BOOTCS",   /* DEV_BOOCS */	\
+    "CRYPT_ENG",    /* CRYPT_ENG */  \
+    "SAGE_UNIT"	   /* SAGE_UNIT */	\
+}
+#endif /* MV_ASMLANGUAGE */
+
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/mvCtrlEnvLib.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/mvCtrlEnvLib.h
@@ -0,0 +1,181 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#ifndef __INCmvCtrlEnvLibh
+#define __INCmvCtrlEnvLibh
+
+/* includes */
+#include "mvSysHwConfig.h"
+#include "mvCommon.h"
+#include "mvTypes.h"
+#include "mvOs.h"
+#include "boardEnv/mvBoardEnvLib.h"			
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "ctrlEnv/mvCtrlEnvRegs.h"
+#include "ctrlEnv/mvCtrlEnvAddrDec.h"
+
+
+/* typedefs */
+
+/* This enumerator describes the possible HW cache coherency policies the   */
+/* controllers supports.                                                    */
+typedef enum _mvCachePolicy
+{
+    NO_COHERENCY,   /* No HW cache coherency support                        */
+    WT_COHERENCY,   /* HW cache coherency supported in Write Through policy */
+    WB_COHERENCY    /* HW cache coherency supported in Write Back policy    */   
+}MV_CACHE_POLICY;
+
+
+/* The swapping is referred to a 64-bit words (as this is the controller    */
+/* internal data path width). This enumerator describes the possible        */
+/* data swap types. Below is an example of the data 0x0011223344556677      */
+typedef enum _mvSwapType
+{
+    MV_BYTE_SWAP,       /* Byte Swap                77 66 55 44 33 22 11 00 */             
+    MV_NO_SWAP,         /* No swapping              00 11 22 33 44 55 66 77 */
+    MV_BYTE_WORD_SWAP,  /* Both byte and word swap  33 22 11 00 77 66 55 44 */
+    MV_WORD_SWAP,       /* Word swap                44 55 66 77 00 11 22 33 */
+    SWAP_TYPE_MAX	/* Delimiter for this enumerator					*/
+}MV_SWAP_TYPE;
+
+/* This structure describes access rights for Access protection windows     */
+/* that can be found in IDMA, XOR, Ethernet and MPSC units.                 */
+/* Note that the permission enumerator coresponds to its register format.   */
+/* For example, Read only premission is presented as "1" in register field. */
+typedef enum _mvAccessRights
+{
+    	NO_ACCESS_ALLOWED = 0,  /* No access allowed            */
+    	READ_ONLY         = 1,  /* Read only permission         */
+	ACC_RESERVED	  = 2,	/* Reserved access right		*/
+    	FULL_ACCESS       = 3,  /* Read and Write permission    */
+	MAX_ACC_RIGHTS
+}MV_ACCESS_RIGHTS;
+
+
+/* mcspLib.h API list */
+
+MV_STATUS mvCtrlEnvInit(MV_VOID);
+MV_U32    mvCtrlMppRegGet(MV_U32 mppGroup);
+
+#if defined(MV_INCLUDE_PEX)
+MV_U32	  mvCtrlPexMaxIfGet(MV_VOID);
+#else
+#define   mvCtrlPexMaxIfGet()	(0)
+#endif
+
+#define   mvCtrlPciIfMaxIfGet()	(mvCtrlPexMaxIfGet())
+
+#if defined(MV_INCLUDE_GIG_ETH) 
+MV_U32	  mvCtrlEthMaxPortGet(MV_VOID);
+#endif
+#if defined(MV_INCLUDE_XOR)
+MV_U32 mvCtrlXorMaxChanGet(MV_VOID);
+#endif
+#if defined(MV_INCLUDE_USB)
+MV_U32 	  mvCtrlUsbMaxGet(MV_VOID);
+#endif
+#if defined(MV_INCLUDE_NAND)
+MV_U32	  mvCtrlNandSupport(MV_VOID);
+#endif
+#if defined(MV_INCLUDE_SDIO)
+MV_U32	  mvCtrlSdioSupport(MV_VOID);
+#endif
+#if defined(MV_INCLUDE_TS)
+MV_U32	  mvCtrlTsSupport(MV_VOID);
+#endif
+#if defined(MV_INCLUDE_AUDIO)
+MV_U32	  mvCtrlAudioSupport(MV_VOID);
+#endif
+#if defined(MV_INCLUDE_TDM)
+MV_U32	  mvCtrlTdmSupport(MV_VOID);
+#endif
+
+MV_U16    mvCtrlModelGet(MV_VOID);
+MV_U8     mvCtrlRevGet(MV_VOID);
+MV_STATUS mvCtrlNameGet(char *pNameBuff);
+MV_U32    mvCtrlModelRevGet(MV_VOID);
+MV_STATUS mvCtrlModelRevNameGet(char *pNameBuff);
+MV_VOID   mvCtrlAddrDecShow(MV_VOID);
+const MV_8* mvCtrlTargetNameGet(MV_TARGET target);
+MV_U32	  ctrlSizeToReg(MV_U32 size, MV_U32 alignment);
+MV_U32	  ctrlRegToSize(MV_U32 regSize, MV_U32 alignment);
+MV_U32	  ctrlSizeRegRoundUp(MV_U32 size, MV_U32 alignment);
+MV_STATUS ctrlWinOverlapTest(MV_ADDR_WIN *pAddrWin1, MV_ADDR_WIN *pAddrWin2);
+MV_STATUS ctrlWinWithinWinTest(MV_ADDR_WIN *pAddrWin1, MV_ADDR_WIN *pAddrWin2);
+
+MV_VOID   mvCtrlPwrClckSet(MV_UNIT_ID unitId, MV_U32 index, MV_BOOL enable);
+MV_BOOL	  mvCtrlPwrClckGet(MV_UNIT_ID unitId, MV_U32 index);
+MV_VOID   mvCtrlPwrMemSet(MV_UNIT_ID unitId, MV_U32 index, MV_BOOL enable);
+MV_BOOL	  mvCtrlIsBootFromSPI(MV_VOID);
+MV_BOOL	  mvCtrlIsBootFromNAND(MV_VOID);
+#if defined(MV_INCLUDE_CLK_PWR_CNTRL)
+MV_VOID   mvCtrlPwrSaveOn(MV_VOID);
+MV_VOID   mvCtrlPwrSaveOff(MV_VOID);
+#endif
+MV_BOOL	  mvCtrlPwrMemGet(MV_UNIT_ID unitId, MV_U32 index);
+
+
+#endif /* __INCmvCtrlEnvLibh */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/mvCtrlEnvLib.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/mvCtrlEnvLib.c
@@ -0,0 +1,1664 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+/* includes */
+#include "mvCommon.h"
+#include "mvCtrlEnvLib.h"
+#include "ctrlEnv/sys/mvCpuIf.h"
+
+#if defined(MV_INCLUDE_PEX)
+#include "pex/mvPex.h"
+#include "ctrlEnv/sys/mvSysPex.h"
+#endif
+
+#if defined(MV_INCLUDE_GIG_ETH)
+#include "ctrlEnv/sys/mvSysGbe.h"
+#endif
+
+#if defined(MV_INCLUDE_XOR)
+#include "ctrlEnv/sys/mvSysXor.h"
+#endif
+
+#if defined(MV_INCLUDE_SATA)
+#include "ctrlEnv/sys/mvSysSata.h"
+#endif
+
+#if defined(MV_INCLUDE_USB)
+#include "ctrlEnv/sys/mvSysUsb.h"
+#endif
+
+#if defined(MV_INCLUDE_AUDIO)
+#include "ctrlEnv/sys/mvSysAudio.h"
+#endif
+
+#if defined(MV_INCLUDE_CESA)
+#include "ctrlEnv/sys/mvSysCesa.h"
+#endif
+
+#if defined(MV_INCLUDE_TS)
+#include "ctrlEnv/sys/mvSysTs.h"
+#endif
+
+/* defines  */
+#ifdef MV_DEBUG
+	#define DB(x)	x
+#else
+	#define DB(x)
+#endif	
+
+
+/*******************************************************************************
+* mvCtrlEnvInit - Initialize Marvell controller environment.
+*
+* DESCRIPTION:
+*       This function get environment information and initialize controller
+*       internal/external environment. For example
+*       1) MPP settings according to board MPP macros.
+*		NOTE: It is the user responsibility to shut down all DMA channels
+*		in device and disable controller sub units interrupts during 
+*		boot process.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_STATUS mvCtrlEnvInit(MV_VOID)
+{
+    	MV_U32 mppGroup;
+	MV_U32 devId;
+	MV_U32 boardId;
+	MV_U32 i;
+	MV_U32 maxMppGrp = 1;
+	MV_U32 mppVal = 0;
+	MV_U32 bootVal = 0;
+	MV_U32 mppGroupType = 0;
+	MV_U32 mppGroup1[][3] = MPP_GROUP_1_TYPE;
+	MV_U32 mppGroup2[][3] = MPP_GROUP_2_TYPE;
+	
+	devId = mvCtrlModelGet();
+	boardId= mvBoardIdGet();
+
+	switch(devId){
+		case MV_6281_DEV_ID:
+			maxMppGrp = MV_6281_MPP_MAX_GROUP;
+			break;
+		case MV_6192_DEV_ID:
+			maxMppGrp = MV_6192_MPP_MAX_GROUP;
+			break;
+		case MV_6180_DEV_ID:
+			maxMppGrp = MV_6180_MPP_MAX_GROUP;
+			break;		
+	}
+	
+	/* MPP Init */
+	/* We split mpp init to 3 phases:
+	 * 1. We init mpp[19:0] from the board info. mpp[23:20] will be over write 
+	 * in phase 2.
+	 * 2. We detect the mpp group type and according the mpp values [35:20].
+	 * 3. We detect the mpp group type and according the mpp values [49:36].
+	 */
+	/* Mpp phase 1 mpp[19:0] */
+	/* Read MPP group from board level and assign to MPP register */
+	for (mppGroup = 0; mppGroup < 3; mppGroup++)
+	{
+		mppVal = mvBoardMppGet(mppGroup);
+		if (mppGroup == 0)
+		{
+		    bootVal = MV_REG_READ(mvCtrlMppRegGet(mppGroup));
+		    if (mvCtrlIsBootFromSPI())
+		    {
+			mppVal &= ~0xffff;
+			bootVal &= 0xffff;
+			mppVal |= bootVal;
+		    }
+		    else if (mvCtrlIsBootFromNAND())
+		    {
+			mppVal &= ~0xffffff;
+			bootVal &= 0xffffff;
+			mppVal |= bootVal;
+		    }
+		}
+		
+		if (mppGroup == 2)
+		{
+		    bootVal = MV_REG_READ(mvCtrlMppRegGet(mppGroup));
+		    if (mvCtrlIsBootFromNAND())
+		    {
+			mppVal &= ~0xff00;
+			bootVal &= 0xff00;
+			mppVal |= bootVal;
+		    }
+		}
+
+		MV_REG_WRITE(mvCtrlMppRegGet(mppGroup), mppVal);
+	}
+ 	
+	if (devId == MV_6180_DEV_ID)
+		return MV_OK;
+
+	/* Identify MPPs group */
+	mvBoardMppGroupIdUpdate();
+
+	/* Update MPPs mux relevent only on Marvell DB */
+	if ((boardId == DB_88F6281_BP_ID) ||
+		(boardId == DB_88F6192_BP_ID))
+	mvBoardMppMuxSet();
+
+	mppGroupType = mvBoardMppGroupTypeGet(MV_BOARD_MPP_GROUP_1);
+
+	/* Mpp phase 2 */
+	/* Read MPP group from board level and assign to MPP register */
+	i = 0;
+	for (mppGroup = 2; mppGroup < 5; mppGroup++)
+	{
+		if ((mppGroupType == MV_BOARD_OTHER) ||
+			(boardId == RD_88F6281_ID) ||
+			(boardId == RD_88F6192_ID) ||
+			(boardId == RD_88F6180_ID))
+			mppVal = mvBoardMppGet(mppGroup);
+		else
+		{
+			mppVal = mppGroup1[mppGroupType][i];
+			i++;
+		}
+
+		/* Group 2 is sherd mpp[23:16] */
+		if (mppGroup == 2)
+		{
+		    	bootVal = MV_REG_READ(mvCtrlMppRegGet(mppGroup));
+			mppVal &= ~0xffff;
+			bootVal &= 0xffff;
+			mppVal |= bootVal;
+		}
+
+		MV_REG_WRITE(mvCtrlMppRegGet(mppGroup), mppVal);
+	}
+
+	if (devId == MV_6192_DEV_ID)
+		return MV_OK;
+ 	
+	/* Mpp phase 3 */
+	mppGroupType = mvBoardMppGroupTypeGet(MV_BOARD_MPP_GROUP_2);
+
+	/* Read MPP group from board level and assign to MPP register */
+	i = 0;
+	for (mppGroup = 4; mppGroup < 7; mppGroup++)
+	{
+		if ((mppGroupType == MV_BOARD_OTHER) ||
+			(boardId == RD_88F6281_ID))
+			mppVal = mvBoardMppGet(mppGroup);
+		else
+		{
+			mppVal = mppGroup2[mppGroupType][i];
+			i++;
+		}
+
+		/* Group 4 is sherd mpp[35:32] */
+		if (mppGroup == 4)
+		{
+		    	bootVal = MV_REG_READ(mvCtrlMppRegGet(mppGroup));
+			mppVal &= ~0xffff;
+			bootVal &= 0xffff;
+			mppVal |= bootVal;
+		}
+
+		MV_REG_WRITE(mvCtrlMppRegGet(mppGroup), mppVal);
+	}
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvCtrlMppRegGet - return reg address of mpp group
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       mppGroup - MPP group.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_U32 - Register address.
+*
+*******************************************************************************/
+MV_U32 mvCtrlMppRegGet(MV_U32 mppGroup)
+{
+        MV_U32 ret;
+
+        switch(mppGroup){
+                case (0):       ret = MPP_CONTROL_REG0;
+                                break;
+                case (1):       ret = MPP_CONTROL_REG1;
+                                break;
+                case (2):       ret = MPP_CONTROL_REG2;
+                                break;
+                case (3):       ret = MPP_CONTROL_REG3;
+                                break;
+                case (4):       ret = MPP_CONTROL_REG4;
+                                break;
+                case (5):       ret = MPP_CONTROL_REG5;
+                                break;
+                case (6):       ret = MPP_CONTROL_REG6;
+                                break;
+                default:        ret = MPP_CONTROL_REG0;
+                                break;
+        }
+        return ret;
+}
+#if defined(MV_INCLUDE_PEX) 
+/*******************************************************************************
+* mvCtrlPexMaxIfGet - Get Marvell controller number of PEX interfaces.
+*
+* DESCRIPTION:
+*       This function returns Marvell controller number of PEX interfaces.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       Marvell controller number of PEX interfaces. If controller 
+*		ID is undefined the function returns '0'.
+*
+*******************************************************************************/
+MV_U32 mvCtrlPexMaxIfGet(MV_VOID)
+{
+
+	return MV_PEX_MAX_IF;
+}
+#endif
+
+#if defined(MV_INCLUDE_GIG_ETH)
+/*******************************************************************************
+* mvCtrlEthMaxPortGet - Get Marvell controller number of etherent ports.
+*
+* DESCRIPTION:
+*       This function returns Marvell controller number of etherent port.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       Marvell controller number of etherent port.
+*
+*******************************************************************************/
+MV_U32 mvCtrlEthMaxPortGet(MV_VOID)
+{
+	MV_U32 devId;
+	
+	devId = mvCtrlModelGet();
+
+	switch(devId){
+		case MV_6281_DEV_ID:
+			return MV_6281_ETH_MAX_PORTS;
+			break;
+		case MV_6192_DEV_ID:
+			return MV_6192_ETH_MAX_PORTS;
+			break;
+		case MV_6180_DEV_ID:
+			return MV_6180_ETH_MAX_PORTS;
+			break;		
+	}
+	return 0;
+
+}
+#endif
+
+#if defined(MV_INCLUDE_XOR)
+/*******************************************************************************
+* mvCtrlXorMaxChanGet - Get Marvell controller number of XOR channels.
+*
+* DESCRIPTION:
+*       This function returns Marvell controller number of XOR channels.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       Marvell controller number of XOR channels.
+*
+*******************************************************************************/
+MV_U32 mvCtrlXorMaxChanGet(MV_VOID)
+{
+	return MV_XOR_MAX_CHAN; 
+}
+#endif
+
+#if defined(MV_INCLUDE_USB)
+/*******************************************************************************
+* mvCtrlUsbHostMaxGet - Get number of Marvell Usb  controllers
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       returns number of Marvell USB  controllers.
+*
+*******************************************************************************/
+MV_U32 mvCtrlUsbMaxGet(void)
+{
+	return MV_USB_MAX_PORTS;
+}
+#endif
+
+
+#if defined(MV_INCLUDE_NAND)
+/*******************************************************************************
+* mvCtrlNandSupport - Return if this controller has integrated NAND flash support
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE if NAND is supported and MV_FALSE otherwise
+*
+*******************************************************************************/
+MV_U32	  mvCtrlNandSupport(MV_VOID)
+{
+	MV_U32 devId;
+	
+	devId = mvCtrlModelGet();
+
+	switch(devId){
+		case MV_6281_DEV_ID:
+			return MV_6281_NAND;
+			break;
+		case MV_6192_DEV_ID:
+			return MV_6192_NAND;
+			break;
+		case MV_6180_DEV_ID:
+			return MV_6180_NAND;
+			break;		
+	}
+	return 0;
+
+}
+#endif
+
+#if defined(MV_INCLUDE_SDIO)
+/*******************************************************************************
+* mvCtrlSdioSupport - Return if this controller has integrated SDIO flash support
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE if SDIO is supported and MV_FALSE otherwise
+*
+*******************************************************************************/
+MV_U32	  mvCtrlSdioSupport(MV_VOID)
+{
+	MV_U32 devId;
+	
+	devId = mvCtrlModelGet();
+
+	switch(devId){
+		case MV_6281_DEV_ID:
+			return MV_6281_SDIO;
+			break;
+		case MV_6192_DEV_ID:
+			return MV_6192_SDIO;
+			break;
+		case MV_6180_DEV_ID:
+			return MV_6180_SDIO;
+			break;		
+	}
+	return 0;
+
+}
+#endif
+
+#if defined(MV_INCLUDE_TS)
+/*******************************************************************************
+* mvCtrlTsSupport - Return if this controller has integrated TS flash support
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE if TS is supported and MV_FALSE otherwise
+*
+*******************************************************************************/
+MV_U32	  mvCtrlTsSupport(MV_VOID)
+{
+	MV_U32 devId;
+	
+	devId = mvCtrlModelGet();
+
+	switch(devId){
+		case MV_6281_DEV_ID:
+			return MV_6281_TS;
+			break;
+		case MV_6192_DEV_ID:
+			return MV_6192_TS;
+			break;
+		case MV_6180_DEV_ID:
+			return MV_6180_TS;
+			break;		
+	}
+	return 0;
+}
+#endif
+
+#if defined(MV_INCLUDE_AUDIO)
+/*******************************************************************************
+* mvCtrlAudioSupport - Return if this controller has integrated AUDIO flash support
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE if AUDIO is supported and MV_FALSE otherwise
+*
+*******************************************************************************/
+MV_U32	  mvCtrlAudioSupport(MV_VOID)
+{
+	MV_U32 devId;
+	
+	devId = mvCtrlModelGet();
+
+	switch(devId){
+		case MV_6281_DEV_ID:
+			return MV_6281_AUDIO;
+			break;
+		case MV_6192_DEV_ID:
+			return MV_6192_AUDIO;
+			break;
+		case MV_6180_DEV_ID:
+			return MV_6180_AUDIO;
+			break;		
+	}
+	return 0;
+
+}
+#endif
+
+#if defined(MV_INCLUDE_TDM)
+/*******************************************************************************
+* mvCtrlTdmSupport - Return if this controller has integrated TDM flash support
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE if TDM is supported and MV_FALSE otherwise
+*
+*******************************************************************************/
+MV_U32	  mvCtrlTdmSupport(MV_VOID)
+{
+	MV_U32 devId;
+	
+	devId = mvCtrlModelGet();
+
+	switch(devId){
+		case MV_6281_DEV_ID:
+			return MV_6281_TDM;
+			break;
+		case MV_6192_DEV_ID:
+			return MV_6192_TDM;
+			break;
+		case MV_6180_DEV_ID:
+			return MV_6180_TDM;
+			break;		
+	}
+	return 0;
+
+}
+#endif
+
+/*******************************************************************************
+* mvCtrlModelGet - Get Marvell controller device model (Id)
+*
+* DESCRIPTION:
+*       This function returns 16bit describing the device model (ID) as defined
+*       in PCI Device and Vendor ID configuration register offset 0x0.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       16bit desscribing Marvell controller ID 
+*
+*******************************************************************************/
+MV_U16 mvCtrlModelGet(MV_VOID)
+{
+	MV_U32 devId;
+	
+	devId = MV_REG_READ(CHIP_BOND_REG);
+	devId &= PCKG_OPT_MASK;
+
+	switch(devId){
+		case 2:
+			return	MV_6281_DEV_ID;
+			break;
+		case 1:
+			return	MV_6192_DEV_ID;
+			break;
+		case 0:
+			return	MV_6180_DEV_ID;
+			break;
+	}
+
+	return 0;
+}
+/*******************************************************************************
+* mvCtrlRevGet - Get Marvell controller device revision number
+*
+* DESCRIPTION:
+*       This function returns 8bit describing the device revision as defined
+*       in PCI Express Class Code and Revision ID Register.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       8bit desscribing Marvell controller revision number 
+*
+*******************************************************************************/
+MV_U8 mvCtrlRevGet(MV_VOID)
+{
+	MV_U8 revNum;
+#if defined(MV_INCLUDE_CLK_PWR_CNTRL)
+	/* Check pex power state */
+	MV_U32 pexPower;
+	pexPower = mvCtrlPwrClckGet(PEX_UNIT_ID,0);
+	if (pexPower == MV_FALSE)
+		mvCtrlPwrClckSet(PEX_UNIT_ID, 0, MV_TRUE);
+#endif
+	revNum = (MV_U8)MV_REG_READ(PEX_CFG_DIRECT_ACCESS(0,PCI_CLASS_CODE_AND_REVISION_ID));
+#if defined(MV_INCLUDE_CLK_PWR_CNTRL)
+	/* Return to power off state */
+	if (pexPower == MV_FALSE)
+		mvCtrlPwrClckSet(PEX_UNIT_ID, 0, MV_FALSE);
+#endif
+	return ((revNum & PCCRIR_REVID_MASK) >> PCCRIR_REVID_OFFS);
+}
+
+/*******************************************************************************
+* mvCtrlNameGet - Get Marvell controller name
+*
+* DESCRIPTION:
+*       This function returns a string describing the device model and revision.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       pNameBuff - Buffer to contain device name string. Minimum size 30 chars.
+*
+* RETURN:
+*       
+*       MV_ERROR if informantion can not be read.
+*******************************************************************************/
+MV_STATUS mvCtrlNameGet(char *pNameBuff)
+{
+	mvOsSPrintf (pNameBuff, "%s%x Rev %d", SOC_NAME_PREFIX, 
+				mvCtrlModelGet(), mvCtrlRevGet()); 
+	
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvCtrlModelRevGet - Get Controller Model (Device ID) and Revision
+*
+* DESCRIPTION:
+*       This function returns 32bit value describing both Device ID and Revision
+*       as defined in PCI Express Device and Vendor ID Register and device revision
+*	    as defined in PCI Express Class Code and Revision ID Register.
+     
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       32bit describing both controller device ID and revision number
+*
+*******************************************************************************/
+MV_U32	mvCtrlModelRevGet(MV_VOID)
+{
+	return ((mvCtrlModelGet() << 16) | mvCtrlRevGet());
+}
+
+/*******************************************************************************
+* mvCtrlModelRevNameGet - Get Marvell controller name
+*
+* DESCRIPTION:
+*       This function returns a string describing the device model and revision.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       pNameBuff - Buffer to contain device name string. Minimum size 30 chars.
+*
+* RETURN:
+*       
+*       MV_ERROR if informantion can not be read.
+*******************************************************************************/
+
+MV_STATUS mvCtrlModelRevNameGet(char *pNameBuff)
+{
+
+        switch (mvCtrlModelRevGet())
+        {
+        case MV_6281_Z0_ID:
+                mvOsSPrintf (pNameBuff, "%s",MV_6281_Z0_NAME); 
+                break;
+        case MV_6192_Z0_ID:
+                mvOsSPrintf (pNameBuff, "%s",MV_6192_Z0_NAME); 
+                break;
+        case MV_6180_Z0_ID:
+                mvOsSPrintf (pNameBuff, "%s",MV_6180_Z0_NAME); 
+                break;
+        default:
+                mvCtrlNameGet(pNameBuff);
+                break;
+        }
+
+
+        return MV_OK;
+}
+
+
+/*******************************************************************************
+* ctrlWinOverlapTest - Test address windows for overlaping.
+*
+* DESCRIPTION:
+*       This function checks the given two address windows for overlaping.
+*
+* INPUT:
+*       pAddrWin1 - Address window 1.
+*       pAddrWin2 - Address window 2.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       
+*       MV_TRUE if address window overlaps, MV_FALSE otherwise.
+*******************************************************************************/
+MV_STATUS ctrlWinOverlapTest(MV_ADDR_WIN *pAddrWin1, MV_ADDR_WIN *pAddrWin2)
+{
+    MV_U32 winBase1, winBase2;
+    MV_U32 winTop1, winTop2;
+    
+	/* check if we have overflow than 4G*/
+	if (((0xffffffff - pAddrWin1->baseLow) < pAddrWin1->size-1)||
+	   ((0xffffffff - pAddrWin2->baseLow) < pAddrWin2->size-1))
+	{
+		return MV_TRUE;
+	}
+
+    winBase1 = pAddrWin1->baseLow;
+    winBase2 = pAddrWin2->baseLow;
+    winTop1  = winBase1 + pAddrWin1->size-1;
+    winTop2  = winBase2 + pAddrWin2->size-1;
+
+    
+    if (((winBase1 <= winTop2 ) && ( winTop2 <= winTop1)) ||
+        ((winBase1 <= winBase2) && (winBase2 <= winTop1)))
+    {
+        return MV_TRUE;
+    }
+    else
+    {
+        return MV_FALSE;
+    }
+}
+
+/*******************************************************************************
+* ctrlWinWithinWinTest - Test address windows for overlaping.
+*
+* DESCRIPTION:
+*       This function checks the given win1 boundries is within
+*		win2 boundries.
+*
+* INPUT:
+*       pAddrWin1 - Address window 1.
+*       pAddrWin2 - Address window 2.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       
+*       MV_TRUE if found win1 inside win2, MV_FALSE otherwise.
+*******************************************************************************/
+MV_STATUS ctrlWinWithinWinTest(MV_ADDR_WIN *pAddrWin1, MV_ADDR_WIN *pAddrWin2)
+{
+    MV_U32 winBase1, winBase2;
+    MV_U32 winTop1, winTop2;
+    
+    winBase1 = pAddrWin1->baseLow;
+    winBase2 = pAddrWin2->baseLow;
+    winTop1  = winBase1 + pAddrWin1->size -1;
+    winTop2  = winBase2 + pAddrWin2->size -1;
+    
+    if (((winBase1 >= winBase2 ) && ( winBase1 <= winTop2)) ||
+        ((winTop1  >= winBase2) && (winTop1 <= winTop2)))
+    {
+        return MV_TRUE;
+    }
+    else
+    {
+        return MV_FALSE;
+    }
+}
+
+static const char* cntrlName[] = TARGETS_NAME_ARRAY;
+
+/*******************************************************************************
+* mvCtrlTargetNameGet - Get Marvell controller target name
+*
+* DESCRIPTION:
+*       This function convert the trget enumeration to string.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       Target name (const MV_8 *)
+*******************************************************************************/
+const MV_8* mvCtrlTargetNameGet( MV_TARGET target )
+{
+
+	if (target >= MAX_TARGETS)
+	{
+		return "target unknown";
+	}
+
+	return cntrlName[target];
+}
+
+/*******************************************************************************
+* mvCtrlAddrDecShow - Print the Controller units address decode map.
+*
+* DESCRIPTION:
+*		This function the Controller units address decode map.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_VOID mvCtrlAddrDecShow(MV_VOID)
+{
+    mvCpuIfAddDecShow();
+    mvAhbToMbusAddDecShow();
+#if defined(MV_INCLUDE_PEX)
+	mvPexAddrDecShow();
+#endif
+#if defined(MV_INCLUDE_USB)
+    	mvUsbAddrDecShow();
+#endif
+#if defined(MV_INCLUDE_GIG_ETH)
+	mvEthAddrDecShow();
+#endif
+#if defined(MV_INCLUDE_XOR)
+	mvXorAddrDecShow();
+#endif
+#if defined(MV_INCLUDE_SATA)
+    mvSataAddrDecShow();
+#endif
+#if defined(MV_INCLUDE_AUDIO)
+    mvAudioAddrDecShow();
+#endif
+#if defined(MV_INCLUDE_TS)
+    mvTsuAddrDecShow();
+#endif
+}
+
+/*******************************************************************************
+* ctrlSizeToReg - Extract size value for register assignment.
+*
+* DESCRIPTION:		
+*       Address decode size parameter must be programed from LSB to MSB as
+*       sequence of 1's followed by sequence of 0's. The number of 1's 
+*       specifies the size of the window in 64 KB granularity (e.g. a 
+*       value of 0x00ff specifies 256x64k = 16 MB).
+*       This function extract the size value from the size parameter according 
+*		to given aligment paramter. For example for size 0x1000000 (16MB) and 
+*		aligment 0x10000 (64KB) the function will return 0x00FF.
+*
+* INPUT:
+*       size - Size.
+*		alignment - Size alignment.	Note that alignment must be power of 2!
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       32bit describing size register value correspond to size parameter. 
+*		If value is '-1' size parameter or aligment are invalid.
+*******************************************************************************/
+MV_U32	ctrlSizeToReg(MV_U32 size, MV_U32 alignment)
+{
+	MV_U32 retVal;
+
+	/* Check size parameter alignment		*/
+	if ((0 == size) || (MV_IS_NOT_ALIGN(size, alignment)))
+	{
+		DB(mvOsPrintf("ctrlSizeToReg: ERR. Size is zero or not aligned.\n"));
+		return -1;
+	}
+	
+	/* Take out the "alignment" portion out of the size parameter */
+	alignment--;	/* Now the alignmet is a sequance of '1' (e.g. 0xffff) 		*/
+					/* and size is 0x1000000 (16MB) for example	*/
+	while(alignment & 1)	/* Check that alignmet LSB is set	*/
+	{
+		size = (size >> 1); /* If LSB is set, move 'size' one bit to right	*/	
+		alignment = (alignment >> 1);
+	}
+	
+	/* If after the alignment first '0' was met we still have '1' in 		*/
+	/* it then aligment is invalid (not power of 2) 				*/
+	if (alignment)
+	{
+		DB(mvOsPrintf("ctrlSizeToReg: ERR. Alignment parameter 0x%x invalid.\n", 
+			(MV_U32)alignment));
+		return -1;
+	}
+
+	/* Now the size is shifted right according to aligment: 0x0100			*/
+	size--;         /* Now the size is a sequance of '1': 0x00ff 			*/
+    
+	retVal = size ;
+	
+	/* Check that LSB to MSB is sequence of 1's followed by sequence of 0's		*/
+	while(size & 1)	/* Check that LSB is set	*/
+	{
+		size = (size >> 1); /* If LSB is set, move one bit to the right		*/	
+	}
+
+    if (size) /* Sequance of 1's is over. Check that we have no other 1's		*/
+	{
+		DB(mvOsPrintf("ctrlSizeToReg: ERR. Size parameter 0x%x invalid.\n", 
+                                                                        size));
+		return -1;
+	}
+	
+    return retVal;
+	
+}
+
+/*******************************************************************************
+* ctrlRegToSize - Extract size value from register value.
+*
+* DESCRIPTION:		
+*       This function extract a size value from the register size parameter 
+*		according to given aligment paramter. For example for register size 
+*		value 0xff and aligment 0x10000 the function will return 0x01000000.
+*
+* INPUT:
+*       regSize   - Size as in register format.	See ctrlSizeToReg.
+*		alignment - Size alignment.	Note that alignment must be power of 2!
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       32bit describing size. 
+*		If value is '-1' size parameter or aligment are invalid.
+*******************************************************************************/
+MV_U32	ctrlRegToSize(MV_U32 regSize, MV_U32 alignment)
+{
+   	MV_U32 temp;
+
+	/* Check that LSB to MSB is sequence of 1's followed by sequence of 0's		*/ 
+	temp = regSize;		/* Now the size is a sequance of '1': 0x00ff		*/
+	
+	while(temp & 1)	/* Check that LSB is set					*/
+	{
+		temp = (temp >> 1); /* If LSB is set, move one bit to the right		*/	
+	}
+
+    if (temp) /* Sequance of 1's is over. Check that we have no other 1's		*/
+	{
+		DB(mvOsPrintf("ctrlRegToSize: ERR. Size parameter 0x%x invalid.\n", 
+					regSize));
+	   	return -1;
+	}
+	
+
+	/* Check that aligment is a power of two					*/
+	temp = alignment - 1;/* Now the alignmet is a sequance of '1' (0xffff) 		*/
+					
+	while(temp & 1)	/* Check that alignmet LSB is set				*/
+	{
+		temp = (temp >> 1); /* If LSB is set, move 'size' one bit to right	*/	
+	}
+	
+	/* If after the 'temp' first '0' was met we still have '1' in 'temp'		*/
+	/* then 'temp' is invalid (not power of 2) 					*/
+	if (temp)
+	{
+		DB(mvOsPrintf("ctrlSizeToReg: ERR. Alignment parameter 0x%x invalid.\n", 
+					alignment));
+		return -1;
+	}
+
+	regSize++;      /* Now the size is 0x0100					*/
+
+	/* Add in the "alignment" portion to the register size parameter 		*/
+	alignment--;	/* Now the alignmet is a sequance of '1' (e.g. 0xffff) 		*/
+
+	while(alignment & 1)	/* Check that alignmet LSB is set			*/
+	{
+		regSize   = (regSize << 1); /* LSB is set, move 'size' one bit left	*/	
+		alignment = (alignment >> 1);
+	}
+		
+    return regSize;	
+}
+
+
+/*******************************************************************************
+* ctrlSizeRegRoundUp - Round up given size 
+*
+* DESCRIPTION:		
+*       This function round up a given size to a size that fits the 
+*       restrictions of size format given an aligment parameter.
+*		to given aligment paramter. For example for size parameter 0xa1000 and 
+*		aligment 0x1000 the function will return 0xFF000.
+*
+* INPUT:
+*       size - Size.
+*		alignment - Size alignment.	Note that alignment must be power of 2!
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       32bit describing size value correspond to size in register.  
+*******************************************************************************/
+MV_U32	ctrlSizeRegRoundUp(MV_U32 size, MV_U32 alignment)
+{
+	MV_U32 msbBit = 0;
+    MV_U32 retSize;
+	
+    /* Check if size parameter is already comply with restriction		*/
+	if (!(-1 == ctrlSizeToReg(size, alignment)))
+	{
+		return size;
+	}
+    
+    while(size)
+	{
+		size = (size >> 1);
+        msbBit++;
+	}
+
+    retSize = (1 << msbBit);
+    
+    if (retSize < alignment)
+    {
+        return alignment;
+    }
+    else
+    {
+        return retSize;
+    }
+}
+
+MV_BOOL	  mvCtrlIsBootFromSPI(MV_VOID)
+{
+    MV_U32 satr = 0;
+    satr = MV_REG_READ(MPP_SAMPLE_AT_RESET);
+    satr = satr & MSAR_BOOT_MODE_MASK;
+    
+    if ((satr == MSAR_BOOT_SPI) || (satr == MSAR_BOOT_SPI_WITH_BOOTROM))
+	return MV_TRUE;
+    else
+	return MV_FALSE;
+}
+
+MV_BOOL	  mvCtrlIsBootFromNAND(MV_VOID)
+{
+    MV_U32 satr = 0;
+    satr = MV_REG_READ(MPP_SAMPLE_AT_RESET);
+    satr = satr & MSAR_BOOT_MODE_MASK;
+    
+    if ((satr == MSAR_BOOT_NAND) || (satr == MSAR_BOOT_NAND_WITH_BOOTROM))
+	return MV_TRUE;
+    else
+	return MV_FALSE;
+}
+
+#if defined(MV_INCLUDE_CLK_PWR_CNTRL)
+/*******************************************************************************
+* mvCtrlPwrSaveOn - Set Power save mode
+*
+* DESCRIPTION:		
+*
+* INPUT:
+*
+* OUTPUT:
+*
+* RETURN:
+*******************************************************************************/
+MV_VOID   mvCtrlPwrSaveOn(MV_VOID)
+{
+	unsigned long old,temp;
+	/* Disable int */
+	__asm__ __volatile__("mrs %0, cpsr\n"
+			     "orr %1, %0, #0xc0\n"
+			     "msr cpsr_c, %1"
+			     : "=r" (old), "=r" (temp)
+			     :
+			     : "memory");
+
+	/* Set SoC in power save */
+	MV_REG_BIT_SET(POWER_MNG_CTRL_REG, BIT11);
+	/* Wait for int */
+	__asm__ __volatile__("mcr    p15, 0, r0, c7, c0, 4");
+
+	/* Enabled int */
+	__asm__ __volatile__("msr cpsr_c, %0"
+			     : "=r" (old)
+			     :
+			     : "memory");
+}
+
+/*******************************************************************************
+* mvCtrlPwrSaveOff - Go out of power save mode
+*
+* DESCRIPTION:		
+*
+* INPUT:
+*
+* OUTPUT:
+*
+* RETURN:
+*******************************************************************************/
+MV_VOID   mvCtrlPwrSaveOff(MV_VOID)
+{
+	unsigned long old,temp;
+	/* Disable int */
+	__asm__ __volatile__("mrs %0, cpsr\n"
+			     "orr %1, %0, #0xc0\n"
+			     "msr cpsr_c, %1"
+			     : "=r" (old), "=r" (temp)
+			     :
+			     : "memory");
+
+	/* Set SoC in power save */
+	MV_REG_BIT_RESET(POWER_MNG_CTRL_REG, BIT11);
+	/* Wait for int */
+	__asm__ __volatile__("mcr    p15, 0, r0, c7, c0, 4");
+
+	/* Enabled int */
+	__asm__ __volatile__("msr cpsr_c, %0"
+			     : "=r" (old)
+			     :
+			     : "memory");
+}
+
+/*******************************************************************************
+* mvCtrlPwrClckSet - Set Power State for specific Unit
+*
+* DESCRIPTION:		
+*
+* INPUT:
+*
+* OUTPUT:
+*
+* RETURN:
+*******************************************************************************/
+MV_VOID   mvCtrlPwrClckSet(MV_UNIT_ID unitId, MV_U32 index, MV_BOOL enable)
+{
+	switch (unitId)
+    {
+#if defined(MV_INCLUDE_PEX)
+	case PEX_UNIT_ID:
+		if (enable == MV_FALSE)
+		{
+			MV_REG_BIT_RESET(POWER_MNG_CTRL_REG, PMC_PEXSTOPCLOCK_MASK);
+		}
+		else
+		{
+			MV_REG_BIT_SET(POWER_MNG_CTRL_REG, PMC_PEXSTOPCLOCK_MASK);
+		}
+		break;
+#endif
+#if defined(MV_INCLUDE_GIG_ETH)
+	case ETH_GIG_UNIT_ID:
+		if (enable == MV_FALSE)
+		{
+			MV_REG_BIT_RESET(POWER_MNG_CTRL_REG, PMC_GESTOPCLOCK_MASK(index));
+		}
+		else
+		{
+			MV_REG_BIT_SET(POWER_MNG_CTRL_REG, PMC_GESTOPCLOCK_MASK(index));
+		}
+		break;
+#endif
+#if defined(MV_INCLUDE_INTEG_SATA)
+	case SATA_UNIT_ID:
+		if (enable == MV_FALSE)
+		{
+			MV_REG_BIT_RESET(POWER_MNG_CTRL_REG, PMC_SATASTOPCLOCK_MASK(index));
+		}
+		else
+		{
+			MV_REG_BIT_SET(POWER_MNG_CTRL_REG, PMC_SATASTOPCLOCK_MASK(index));
+		}
+		break;
+#endif
+#if defined(MV_INCLUDE_CESA)
+	case CESA_UNIT_ID:
+		if (enable == MV_FALSE)
+		{
+			MV_REG_BIT_RESET(POWER_MNG_CTRL_REG, PMC_SESTOPCLOCK_MASK);
+		}
+		else
+		{
+			MV_REG_BIT_SET(POWER_MNG_CTRL_REG, PMC_SESTOPCLOCK_MASK);
+		}
+		break;
+#endif
+#if defined(MV_INCLUDE_USB)
+	case USB_UNIT_ID:
+		if (enable == MV_FALSE)
+		{
+			MV_REG_BIT_RESET(POWER_MNG_CTRL_REG, PMC_USBSTOPCLOCK_MASK);
+		}
+		else
+		{
+			MV_REG_BIT_SET(POWER_MNG_CTRL_REG, PMC_USBSTOPCLOCK_MASK);
+		}
+		break;
+#endif
+#if defined(MV_INCLUDE_AUDIO)
+	case AUDIO_UNIT_ID:
+		if (enable == MV_FALSE)
+		{
+			MV_REG_BIT_RESET(POWER_MNG_CTRL_REG, PMC_AUDIOSTOPCLOCK_MASK);
+		}
+		else
+		{
+			MV_REG_BIT_SET(POWER_MNG_CTRL_REG, PMC_AUDIOSTOPCLOCK_MASK);
+		}
+		break;
+#endif
+#if defined(MV_INCLUDE_TS)
+	case TS_UNIT_ID:
+		if (enable == MV_FALSE)
+		{
+			MV_REG_BIT_RESET(POWER_MNG_CTRL_REG, PMC_TSSTOPCLOCK_MASK);
+		}
+		else
+		{
+			MV_REG_BIT_SET(POWER_MNG_CTRL_REG, PMC_TSSTOPCLOCK_MASK);
+		}
+		break;
+#endif
+#if defined(MV_INCLUDE_SDIO)
+	case SDIO_UNIT_ID:
+		if (enable == MV_FALSE)
+		{
+			MV_REG_BIT_RESET(POWER_MNG_CTRL_REG, PMC_SDIOSTOPCLOCK_MASK);
+		}
+		else
+		{
+			MV_REG_BIT_SET(POWER_MNG_CTRL_REG, PMC_SDIOSTOPCLOCK_MASK);
+		}
+		break;
+#endif
+#if defined(MV_INCLUDE_TDM)
+	case TDM_UNIT_ID:
+		if (enable == MV_FALSE)
+		{
+			MV_REG_BIT_RESET(POWER_MNG_CTRL_REG, PMC_TDMSTOPCLOCK_MASK);
+		}
+		else
+		{
+			MV_REG_BIT_SET(POWER_MNG_CTRL_REG, PMC_TDMSTOPCLOCK_MASK);
+		}
+		break;
+#endif
+
+	default:
+
+		break;
+
+	}
+}
+
+/*******************************************************************************
+* mvCtrlPwrClckGet - Get Power State of specific Unit
+*
+* DESCRIPTION:		
+*
+* INPUT:
+*
+* OUTPUT:
+*
+* RETURN:
+******************************************************************************/
+MV_BOOL		mvCtrlPwrClckGet(MV_UNIT_ID unitId, MV_U32 index)
+{
+	MV_U32 reg = MV_REG_READ(POWER_MNG_CTRL_REG);
+	MV_BOOL state = MV_TRUE;
+
+	switch (unitId)
+    {
+#if defined(MV_INCLUDE_PEX)
+	case PEX_UNIT_ID:
+		if ((reg & PMC_PEXSTOPCLOCK_MASK) == PMC_PEXSTOPCLOCK_STOP)
+		{
+			state = MV_FALSE;
+		}
+		else state = MV_TRUE;
+
+		break;
+#endif
+#if defined(MV_INCLUDE_GIG_ETH)
+	case ETH_GIG_UNIT_ID:
+		if ((reg & PMC_GESTOPCLOCK_MASK(index)) == PMC_GESTOPCLOCK_STOP(index))
+		{
+			state = MV_FALSE;
+		}
+		else state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_SATA)
+	case SATA_UNIT_ID:
+		if ((reg & PMC_SATASTOPCLOCK_MASK(index)) == PMC_SATASTOPCLOCK_STOP(index))
+		{
+			state = MV_FALSE;
+		}
+		else state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_CESA)
+	case CESA_UNIT_ID:
+		if ((reg & PMC_SESTOPCLOCK_MASK) == PMC_SESTOPCLOCK_STOP)
+		{
+			state = MV_FALSE;
+		}
+		else state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_USB)
+	case USB_UNIT_ID:
+		if ((reg & PMC_USBSTOPCLOCK_MASK) == PMC_USBSTOPCLOCK_STOP)
+		{
+			state = MV_FALSE;
+		}
+		else state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_AUDIO)
+	case AUDIO_UNIT_ID:
+		if ((reg & PMC_AUDIOSTOPCLOCK_MASK) == PMC_AUDIOSTOPCLOCK_STOP)
+		{
+			state = MV_FALSE;
+		}
+		else state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_TS)
+	case TS_UNIT_ID:
+		if ((reg & PMC_TSSTOPCLOCK_MASK) == PMC_TSSTOPCLOCK_STOP)
+		{
+			state = MV_FALSE;
+		}
+		else state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_SDIO)
+	case SDIO_UNIT_ID:
+		if ((reg & PMC_SDIOSTOPCLOCK_MASK)== PMC_SDIOSTOPCLOCK_STOP)
+		{
+			state = MV_FALSE;
+		}
+		else state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_TDM)
+	case TDM_UNIT_ID:
+		if ((reg & PMC_TDMSTOPCLOCK_MASK) == PMC_TDMSTOPCLOCK_STOP)
+		{
+			state = MV_FALSE;
+		}
+		else state = MV_TRUE;
+		break;
+#endif
+
+	default:
+		state = MV_TRUE;
+		break;
+	}
+
+
+	return state;	
+}
+/*******************************************************************************
+* mvCtrlPwrMemSet - Set Power State for memory on specific Unit
+*
+* DESCRIPTION:		
+*
+* INPUT:
+*
+* OUTPUT:
+*
+* RETURN:
+*******************************************************************************/
+MV_VOID   mvCtrlPwrMemSet(MV_UNIT_ID unitId, MV_U32 index, MV_BOOL enable)
+{
+	switch (unitId)
+    {
+#if defined(MV_INCLUDE_PEX)
+	case PEX_UNIT_ID:
+		if (enable == MV_FALSE)
+		{
+			MV_REG_BIT_SET(POWER_MNG_MEM_CTRL_REG, PMC_PEXSTOPMEM_MASK);
+		}
+		else
+		{
+			MV_REG_BIT_RESET(POWER_MNG_MEM_CTRL_REG, PMC_PEXSTOPMEM_MASK);
+		}
+		break;
+#endif
+#if defined(MV_INCLUDE_GIG_ETH)
+	case ETH_GIG_UNIT_ID:
+		if (enable == MV_FALSE)
+		{
+			MV_REG_BIT_SET(POWER_MNG_MEM_CTRL_REG, PMC_GESTOPMEM_MASK(index));
+		}
+		else
+		{
+			MV_REG_BIT_RESET(POWER_MNG_MEM_CTRL_REG, PMC_GESTOPMEM_MASK(index));
+		}
+		break;
+#endif
+#if defined(MV_INCLUDE_INTEG_SATA)
+	case SATA_UNIT_ID:
+		if (enable == MV_FALSE)
+		{
+			MV_REG_BIT_SET(POWER_MNG_MEM_CTRL_REG, PMC_SATASTOPMEM_MASK(index));
+		}
+		else
+		{
+			MV_REG_BIT_RESET(POWER_MNG_MEM_CTRL_REG, PMC_SATASTOPMEM_MASK(index));
+		}
+		break;
+#endif
+#if defined(MV_INCLUDE_CESA)
+	case CESA_UNIT_ID:
+		if (enable == MV_FALSE)
+		{
+			MV_REG_BIT_SET(POWER_MNG_MEM_CTRL_REG, PMC_SESTOPMEM_MASK);
+		}
+		else
+		{
+			MV_REG_BIT_RESET(POWER_MNG_MEM_CTRL_REG, PMC_SESTOPMEM_MASK);
+		}
+		break;
+#endif
+#if defined(MV_INCLUDE_USB)
+	case USB_UNIT_ID:
+		if (enable == MV_FALSE)
+		{
+			MV_REG_BIT_SET(POWER_MNG_MEM_CTRL_REG, PMC_USBSTOPMEM_MASK);
+		}
+		else
+		{
+			MV_REG_BIT_RESET(POWER_MNG_MEM_CTRL_REG, PMC_USBSTOPMEM_MASK);
+		}
+		break;
+#endif
+#if defined(MV_INCLUDE_AUDIO)
+	case AUDIO_UNIT_ID:
+		if (enable == MV_FALSE)
+		{
+			MV_REG_BIT_SET(POWER_MNG_MEM_CTRL_REG, PMC_AUDIOSTOPMEM_MASK);
+		}
+		else
+		{
+			MV_REG_BIT_RESET(POWER_MNG_MEM_CTRL_REG, PMC_AUDIOSTOPMEM_MASK);
+		}
+		break;
+#endif
+#if defined(MV_INCLUDE_XOR)
+	case XOR_UNIT_ID:
+		if (enable == MV_FALSE)
+		{
+			MV_REG_BIT_SET(POWER_MNG_MEM_CTRL_REG, PMC_XORSTOPMEM_MASK(index));
+		}
+		else
+		{
+			MV_REG_BIT_RESET(POWER_MNG_MEM_CTRL_REG, PMC_XORSTOPMEM_MASK(index));
+		}
+		break;
+#endif
+	default:
+
+		break;
+
+	}
+}
+
+/*******************************************************************************
+* mvCtrlPwrMemGet - Get Power State of memory on specific Unit
+*
+* DESCRIPTION:		
+*
+* INPUT:
+*
+* OUTPUT:
+*
+* RETURN:
+******************************************************************************/
+MV_BOOL		mvCtrlPwrMemGet(MV_UNIT_ID unitId, MV_U32 index)
+{
+	MV_U32 reg = MV_REG_READ(POWER_MNG_MEM_CTRL_REG);
+	MV_BOOL state = MV_TRUE;
+
+	switch (unitId)
+    {
+#if defined(MV_INCLUDE_PEX)
+	case PEX_UNIT_ID:
+		if ((reg & PMC_PEXSTOPMEM_MASK) == PMC_PEXSTOPMEM_STOP)
+		{
+			state = MV_FALSE;
+		}
+		else state = MV_TRUE;
+
+		break;
+#endif
+#if defined(MV_INCLUDE_GIG_ETH)
+	case ETH_GIG_UNIT_ID:
+		if ((reg & PMC_GESTOPMEM_MASK(index)) == PMC_GESTOPMEM_STOP(index))
+		{
+			state = MV_FALSE;
+		}
+		else state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_SATA)
+	case SATA_UNIT_ID:
+		if ((reg & PMC_SATASTOPMEM_MASK(index)) == PMC_SATASTOPMEM_STOP(index))
+		{
+			state = MV_FALSE;
+		}
+		else state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_CESA)
+	case CESA_UNIT_ID:
+		if ((reg & PMC_SESTOPMEM_MASK) == PMC_SESTOPMEM_STOP)
+		{
+			state = MV_FALSE;
+		}
+		else state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_USB)
+	case USB_UNIT_ID:
+		if ((reg & PMC_USBSTOPMEM_MASK) == PMC_USBSTOPMEM_STOP)
+		{
+			state = MV_FALSE;
+		}
+		else state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_AUDIO)
+	case AUDIO_UNIT_ID:
+		if ((reg & PMC_AUDIOSTOPMEM_MASK) == PMC_AUDIOSTOPMEM_STOP)
+		{
+			state = MV_FALSE;
+		}
+		else state = MV_TRUE;
+		break;
+#endif
+#if defined(MV_INCLUDE_XOR)
+	case XOR_UNIT_ID:
+		if ((reg & PMC_XORSTOPMEM_MASK(index)) == PMC_XORSTOPMEM_STOP(index))
+		{
+			state = MV_FALSE;
+		}
+		else state = MV_TRUE;
+		break;
+#endif
+
+	default:
+		state = MV_TRUE;
+		break;
+	}
+
+
+	return state;	
+}
+#else
+MV_VOID   mvCtrlPwrClckSet(MV_UNIT_ID unitId, MV_U32 index, MV_BOOL enable) {return;}
+MV_BOOL	  mvCtrlPwrClckGet(MV_UNIT_ID unitId, MV_U32 index) {return MV_TRUE;}
+#endif /* #if defined(MV_INCLUDE_CLK_PWR_CNTRL) */
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/mvCtrlEnvSpec.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/mvCtrlEnvSpec.h
@@ -0,0 +1,235 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+        this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCmvCtrlEnvSpech
+#define __INCmvCtrlEnvSpech
+
+#include "mvDeviceId.h"
+#include "mvSysHwConfig.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+#define MV_ARM_SOC
+#define SOC_NAME_PREFIX			"MV88F"
+
+
+/* units base and port numbers */
+#define XOR_UNIT_BASE(unit)           	((unit)? 0x60900:0x60800)
+
+#define TDM_REG_BASE			0xD0000
+#define USB_REG_BASE(dev)       	0x50000
+#define AUDIO_REG_BASE(unit)  		0xA0000
+#define SATA_REG_BASE           	0x80000
+#define MV_CESA_REG_BASE                0x3D000
+#define MV_CESA_TDMA_REG_BASE		0x30000
+#define MV_SDIO_REG_BASE		0x90000
+#define MV_ETH_REG_BASE(port)      	(((port) == 0) ? 0x72000 : 0x76000)
+#define MV_UART_CHAN_BASE(chanNum)	(0x12000 + (chanNum * 0x100))
+#define DRAM_BASE			0x0
+#define CNTMR_BASE                  	0x20300
+#define TWSI_SLAVE_BASE(chanNum)    	0x11000
+#define PEX_IF_BASE(pexIf)      	0x40000
+#define RTC_REG_BASE			0x10300
+
+/* dummy decleration, IDMA should not be used in KW */
+#define IDMA_UNIT_BASE			0x60800
+
+#define INTER_REGS_SIZE	 	 	_1M
+/* This define describes the TWSI interrupt bit and location */
+#define TWSI_CPU_MAIN_INT_CAUSE_REG		0x20200
+#define TWSI0_CPU_MAIN_INT_BIT			(1<<29)
+#define TWSI_SPEED				100000
+
+#define MV_GPP_MAX_GROUP    		2
+#define MV_CNTMR_MAX_COUNTER 		2
+#define MV_UART_MAX_CHAN		2
+#define MV_XOR_MAX_UNIT         	2
+#define MV_XOR_MAX_CHAN         	4 /* total channels for all units together*/
+#define MV_XOR_MAX_CHAN_PER_UNIT       	2 /* channels for units */
+#define MV_SATA_MAX_CHAN	 	2
+#define MV_TWSI_MAX_CHAN		1
+#define MV_6281_MPP_MAX_MODULE    	2
+#define MV_6192_MPP_MAX_MODULE    	1
+#define MV_6180_MPP_MAX_MODULE    	1
+#define MV_6281_MPP_MAX_GROUP    	7
+#define MV_6192_MPP_MAX_GROUP    	4
+#define MV_6180_MPP_MAX_GROUP    	3
+
+#define MV_DRAM_MAX_CS      		4
+
+/* This define describes the maximum number of supported PCI\PCIX Interfaces*/
+#define MV_PCI_MAX_IF		0
+#define MV_PCI_START_IF		0
+
+/* This define describes the maximum number of supported PEX Interfaces 	*/
+#define MV_INCLUDE_PEX0
+#define MV_DISABLE_PEX_DEVICE_BAR 
+#define MV_PEX_MAX_IF			1
+#define MV_PEX_START_IF		MV_PCI_MAX_IF
+
+/* This define describes the maximum number of supported PCI Interfaces 	*/
+#define MV_PCI_IF_MAX_IF   	(MV_PEX_MAX_IF+MV_PCI_MAX_IF)
+
+#define MV_ETH_MAX_PORTS		2
+#define MV_6281_ETH_MAX_PORTS	   	2
+#define MV_6192_ETH_MAX_PORTS	   	2
+#define MV_6180_ETH_MAX_PORTS	   	1
+
+#define MV_IDMA_MAX_CHAN    		0
+
+#define MV_USB_MAX_PORTS		1
+
+#define MV_6281_NAND			1
+#define MV_6192_NAND			1
+#define MV_6180_NAND			0
+
+#define MV_6281_SDIO			1
+#define MV_6192_SDIO			1
+#define MV_6180_SDIO			0
+
+#define MV_6281_TS			1
+#define MV_6192_TS			1
+#define MV_6180_TS			0
+
+#define MV_6281_AUDIO			1
+#define MV_6192_AUDIO			1
+#define MV_6180_AUDIO			0
+#define MV_AUDIO_MAX_UNITS		1
+
+#define MV_6281_TDM			1
+#define MV_6192_TDM			1
+#define MV_6180_TDM			0
+
+#define MV_DEVICE_MAX_CS      		4
+
+/* Others */
+#define PEX_HOST_BUS_NUM(pciIf)		(pciIf)
+#define PEX_HOST_DEV_NUM(pciIf)		0
+/* CESA version #2: One channel, 2KB SRAM, TDMA */
+#define MV_CESA_VERSION		 	2
+#define MV_CESA_SRAM_SIZE               2*1024
+/* This define describes the maximum number of supported Ethernet ports 	*/
+#define MV_ETH_VERSION 			4
+#define MV_ETH_MAX_RXQ              	8
+#define MV_ETH_MAX_TXQ              	8
+#define MV_ETH_PORT_SGMII          	{ MV_FALSE, MV_FALSE }
+/* This define describes the the support of USB 	*/
+#define MV_USB_VERSION  		1
+
+#define MV_INCLUDE_SDRAM_CS0
+#define MV_INCLUDE_SDRAM_CS1
+#define MV_INCLUDE_SDRAM_CS2
+#define MV_INCLUDE_SDRAM_CS3
+
+#define MV_INCLUDE_DEVICE_CS0
+#define MV_INCLUDE_DEVICE_CS1
+#define MV_INCLUDE_DEVICE_CS2
+#define MV_INCLUDE_DEVICE_CS3
+
+#define MPP_GROUP_1_TYPE {\
+	{0, 0, 0}, /* Reserved for AUTO */ \
+	{0x22220000, 0x22222222, 0x2222}, /* TDM */ \
+	{0x44440000, 0x44444444, 0x0000}, /* AUDIO */ \
+	{0x33330000, 0x33003333, 0x0033}, /* RGMII */ \
+	{0x33330000, 0x03333333, 0x0033}, /* GMII */ \
+	{0x11110000, 0x11111111, 0x0001}  /* TS */ \
+}
+
+#define MPP_GROUP_2_TYPE {\
+	{0, 0, 0}, /* Reserved for AUTO */ \
+	{0x22220000, 0x22222222, 0x22}, /* TDM */ \
+	{0x44440000, 0x00044444, 0x0}, /* AUDIO */ \
+	{0, 0, 0}, /* N_A */ \
+	{0, 0, 0}, /* N_A */ \
+	{0x11110000, 0x1111111, 0x01}  /* TS */ \
+}
+
+#ifndef MV_ASMLANGUAGE
+
+/* This enumerator defines the Marvell Units ID      */ 
+typedef enum _mvUnitId
+{
+    DRAM_UNIT_ID,
+    PEX_UNIT_ID,
+    ETH_GIG_UNIT_ID,
+    USB_UNIT_ID,
+    IDMA_UNIT_ID,
+    XOR_UNIT_ID,
+    SATA_UNIT_ID,
+    TDM_UNIT_ID,
+    UART_UNIT_ID,
+    CESA_UNIT_ID,
+    SPI_UNIT_ID,
+    AUDIO_UNIT_ID,
+    SDIO_UNIT_ID,
+    TS_UNIT_ID,
+    MAX_UNITS_ID
+
+}MV_UNIT_ID;
+
+#endif
+
+#endif /* __INCmvCtrlEnvSpech */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/mvCtrlEnvAddrDec.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/mvCtrlEnvAddrDec.h
@@ -0,0 +1,203 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#ifndef __INCmvCtrlEnvAddrDech
+#define __INCmvCtrlEnvAddrDech
+
+/* includes */
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "ctrlEnv/mvCtrlEnvRegs.h"
+
+
+/* defines  */
+/* DUnit attributes */
+#define ATMWCR_WIN_DUNIT_CS0_OFFS			0
+#define ATMWCR_WIN_DUNIT_CS0_MASK			BIT0
+#define ATMWCR_WIN_DUNIT_CS0_REQ			(0 << ATMWCR_WIN_DUNIT_CS0_OFFS)
+
+#define ATMWCR_WIN_DUNIT_CS1_OFFS			1
+#define ATMWCR_WIN_DUNIT_CS1_MASK			BIT1
+#define ATMWCR_WIN_DUNIT_CS1_REQ 			(0 << ATMWCR_WIN_DUNIT_CS1_OFFS)
+
+#define ATMWCR_WIN_DUNIT_CS2_OFFS			2
+#define ATMWCR_WIN_DUNIT_CS2_MASK			BIT2
+#define ATMWCR_WIN_DUNIT_CS2_REQ 			(0 << ATMWCR_WIN_DUNIT_CS2_OFFS)
+
+#define ATMWCR_WIN_DUNIT_CS3_OFFS			3
+#define ATMWCR_WIN_DUNIT_CS3_MASK			BIT3
+#define ATMWCR_WIN_DUNIT_CS3_REQ 			(0 << ATMWCR_WIN_DUNIT_CS3_OFFS)
+
+/* RUnit (Device)  attributes */
+#define ATMWCR_WIN_RUNIT_DEVCS0_OFFS		0
+#define ATMWCR_WIN_RUNIT_DEVCS0_MASK		BIT0
+#define ATMWCR_WIN_RUNIT_DEVCS0_REQ			(0 << ATMWCR_WIN_RUNIT_DEVCS0_OFFS)
+
+#define ATMWCR_WIN_RUNIT_DEVCS1_OFFS		1
+#define ATMWCR_WIN_RUNIT_DEVCS1_MASK		BIT1
+#define ATMWCR_WIN_RUNIT_DEVCS1_REQ 		(0 << ATMWCR_WIN_RUNIT_DEVCS1_OFFS)
+
+#define ATMWCR_WIN_RUNIT_DEVCS2_OFFS		2
+#define ATMWCR_WIN_RUNIT_DEVCS2_MASK		BIT2
+#define ATMWCR_WIN_RUNIT_DEVCS2_REQ 		(0 << ATMWCR_WIN_RUNIT_DEVCS2_OFFS)
+
+#define ATMWCR_WIN_RUNIT_BOOTCS_OFFS		4
+#define ATMWCR_WIN_RUNIT_BOOTCS_MASK		BIT4
+#define ATMWCR_WIN_RUNIT_BOOTCS_REQ 		(0 << ATMWCR_WIN_RUNIT_BOOTCS_OFFS)
+
+/* LMaster (PCI)  attributes */
+#define ATMWCR_WIN_LUNIT_BYTE_SWP_OFFS		0
+#define ATMWCR_WIN_LUNIT_BYTE_SWP_MASK		BIT0
+#define ATMWCR_WIN_LUNIT_BYTE_SWP			(0 << ATMWCR_WIN_LUNIT_BYTE_SWP_OFFS)
+#define ATMWCR_WIN_LUNIT_BYTE_NO_SWP		(1 << ATMWCR_WIN_LUNIT_BYTE_SWP_OFFS)
+
+
+#define ATMWCR_WIN_LUNIT_WORD_SWP_OFFS		1
+#define ATMWCR_WIN_LUNIT_WORD_SWP_MASK		BIT1
+#define ATMWCR_WIN_LUNIT_WORD_SWP			(0 << ATMWCR_WIN_LUNIT_WORD_SWP_OFFS)
+#define ATMWCR_WIN_LUNIT_WORD_NO_SWP		(1 << ATMWCR_WIN_LUNIT_WORD_SWP_OFFS)
+
+#define ATMWCR_WIN_LUNIT_NO_SNOOP			BIT2
+
+#define ATMWCR_WIN_LUNIT_TYPE_OFFS			3
+#define ATMWCR_WIN_LUNIT_TYPE_MASK			BIT3
+#define ATMWCR_WIN_LUNIT_TYPE_IO			(0 << ATMWCR_WIN_LUNIT_TYPE_OFFS)
+#define ATMWCR_WIN_LUNIT_TYPE_MEM			(1 << ATMWCR_WIN_LUNIT_TYPE_OFFS)
+
+#define ATMWCR_WIN_LUNIT_FORCE64_OFFS		4
+#define ATMWCR_WIN_LUNIT_FORCE64_MASK		BIT4
+#define ATMWCR_WIN_LUNIT_FORCE64			(0 << ATMWCR_WIN_LUNIT_FORCE64_OFFS)
+
+#define ATMWCR_WIN_LUNIT_ORDERING_OFFS		6
+#define ATMWCR_WIN_LUNIT_ORDERING_MASK		BIT6
+#define ATMWCR_WIN_LUNIT_ORDERING			(1 << ATMWCR_WIN_LUNIT_FORCE64_OFFS)
+
+/* PEX Attributes */
+#define ATMWCR_WIN_PEX_TYPE_OFFS			3
+#define ATMWCR_WIN_PEX_TYPE_MASK			BIT3
+#define ATMWCR_WIN_PEX_TYPE_IO				(0 << ATMWCR_WIN_PEX_TYPE_OFFS)
+#define ATMWCR_WIN_PEX_TYPE_MEM				(1 << ATMWCR_WIN_PEX_TYPE_OFFS)
+
+/* typedefs */
+
+/* Unsupported attributes for address decode:                               */
+/* 2) PCI0/1_REQ64n control                                                 */
+
+typedef struct _mvDecRegs
+{
+	MV_U32 baseReg;
+    MV_U32 baseRegHigh;
+    MV_U32 sizeReg;
+
+}MV_DEC_REGS;
+
+typedef struct _mvTargetAttrib
+{
+	MV_U8			attrib;			/* chip select attributes */
+	MV_TARGET_ID 		targetId; 		/* Target Id of this MV_TARGET */
+
+}MV_TARGET_ATTRIB;
+
+
+/* This structure describes address decode window                           */
+typedef struct _mvDecWin 
+{
+    MV_TARGET       target;         /* Target for addr decode window        */
+    MV_ADDR_WIN     addrWin;        /* Address window of target             */
+    MV_BOOL     	enable;         /* Window enable/disable                */
+}MV_DEC_WIN;
+
+typedef struct _mvDecWinParams
+{
+    MV_TARGET_ID    targetId;   /* Target ID field */
+    MV_U8           attrib;     /* Attribute field */
+    MV_U32          baseAddr;   /* Base address in register format */
+    MV_U32          size;       /* Size in register format */
+}MV_DEC_WIN_PARAMS;
+
+
+/* mvCtrlEnvAddrDec API list */
+
+MV_STATUS mvCtrlAddrDecToReg(MV_ADDR_WIN *pAddrDecWin,
+							 MV_DEC_REGS *pAddrDecRegs);
+
+MV_STATUS mvCtrlRegToAddrDec(MV_DEC_REGS *pAddrDecRegs,
+							 MV_ADDR_WIN *pAddrDecWin);
+
+MV_STATUS mvCtrlAttribGet(MV_TARGET target,
+						  MV_TARGET_ATTRIB *targetAttrib);
+
+MV_TARGET mvCtrlTargetGet(MV_TARGET_ATTRIB *targetAttrib);
+
+
+MV_STATUS mvCtrlAddrDecToParams(MV_DEC_WIN *pAddrDecWin, 
+                                MV_DEC_WIN_PARAMS *pWinParam);
+
+MV_STATUS mvCtrlParamsToAddrDec(MV_DEC_WIN_PARAMS *pWinParam, 
+                                MV_DEC_WIN *pAddrDecWin);
+
+
+
+
+#endif /* __INCmvCtrlEnvAddrDech */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvCpuIfRegs.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvCpuIfRegs.h
@@ -0,0 +1,297 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#ifndef __INCmvCpuIfRegsh
+#define __INCmvCpuIfRegsh
+
+/****************************************/
+/* ARM Control and Status Registers Map */
+/****************************************/
+
+#define CPU_CONFIG_REG				0x20100
+#define CPU_CTRL_STAT_REG			0x20104
+#define CPU_RSTOUTN_MASK_REG			0x20108
+#define CPU_SYS_SOFT_RST_REG			0x2010C
+#define CPU_AHB_MBUS_CAUSE_INT_REG		0x20110
+#define CPU_AHB_MBUS_MASK_INT_REG		0x20114
+#define CPU_FTDLL_CONFIG_REG			0x20120
+#define CPU_L2_CONFIG_REG			0x20128
+
+
+
+/* ARM Configuration register */
+/* CPU_CONFIG_REG (CCR) */
+
+
+/* Reset vector location */
+#define CCR_VEC_INIT_LOC_OFFS			1
+#define CCR_VEC_INIT_LOC_MASK			BIT1
+/* reset at 0x00000000 */
+#define CCR_VEC_INIT_LOC_0000			(0 << CCR_VEC_INIT_LOC_OFFS)
+/* reset at 0xFFFF0000 */
+#define CCR_VEC_INIT_LOC_FF00			(1 << CCR_VEC_INIT_LOC_OFFS)
+
+
+#define CCR_AHB_ERROR_PROP_OFFS			2
+#define CCR_AHB_ERROR_PROP_MASK			BIT2
+/* Erros are not propogated to AHB */
+#define CCR_AHB_ERROR_PROP_NO_INDICATE		(0 << CCR_AHB_ERROR_PROP_OFFS)
+/* Erros are propogated to AHB */
+#define CCR_AHB_ERROR_PROP_INDICATE		(1 << CCR_AHB_ERROR_PROP_OFFS)
+
+
+#define CCR_ENDIAN_INIT_OFFS			3
+#define CCR_ENDIAN_INIT_MASK			BIT3
+#define CCR_ENDIAN_INIT_LITTLE			(0 << CCR_ENDIAN_INIT_OFFS)
+#define CCR_ENDIAN_INIT_BIG			(1 << CCR_ENDIAN_INIT_OFFS)
+
+
+#define CCR_INCR_EN_OFFS			4
+#define CCR_INCR_EN_MASK			BIT4
+#define CCR_INCR_EN				BIT4
+
+
+#define CCR_NCB_BLOCKING_OFFS			5			
+#define CCR_NCB_BLOCKING_MASK			(1 << CCR_NCB_BLOCKING_OFFS)
+#define CCR_NCB_BLOCKING_NON			(0 << CCR_NCB_BLOCKING_OFFS)
+#define CCR_NCB_BLOCKING_EN			(1 << CCR_NCB_BLOCKING_OFFS)
+
+#define CCR_CPU_2_MBUSL_TICK_DRV_OFFS		8
+#define CCR_CPU_2_MBUSL_TICK_DRV_MASK		(0xF << CCR_CPU_2_MBUSL_TICK_DRV_OFFS)
+#define CCR_CPU_2_MBUSL_TICK_SMPL_OFFS		12
+#define CCR_CPU_2_MBUSL_TICK_SMPL_MASK		(0xF << CCR_CPU_2_MBUSL_TICK_SMPL_OFFS)
+#define CCR_ICACH_PREF_BUF_ENABLE		BIT16
+#define CCR_DCACH_PREF_BUF_ENABLE		BIT17
+
+/* Ratio options for CPU to DDR for 6281/6192/6180 */
+#define CPU_2_DDR_CLK_1x3	    4
+#define CPU_2_DDR_CLK_1x4	    6
+
+/* Ratio options for CPU to DDR for 6281 only */
+#define CPU_2_DDR_CLK_2x5	    3
+
+/* Ratio options for CPU to DDR for 6192/6180 */
+#define CPU_2_DDR_CLK_1x2	    2
+
+/* Ratio options for CPU to DDR for 6180 only */
+#define CPU_2_DDR_CLK_1x3_1	    0xB
+#define CPU_2_DDR_CLK_1x4_1	    0xD
+
+/* Default values for CPU to Mbus-L DDR Interface Tick Driver and 	*/
+/* CPU to Mbus-L Tick Sample fields in CPU config register		*/
+
+#define TICK_DRV_1x1	0
+#define TICK_DRV_1x2	0
+#define TICK_DRV_1x3	1
+#define TICK_DRV_1x4	2
+#define TICK_SMPL_1x1	0
+#define TICK_SMPL_1x2	1
+#define TICK_SMPL_1x3	2
+#define TICK_SMPL_1x4	3
+
+#define CPU_2_MBUSL_DDR_CLK_1x2						\
+		 ((TICK_DRV_1x2  << CCR_CPU_2_MBUSL_TICK_DRV_OFFS) | 	\
+		  (TICK_SMPL_1x2 << CCR_CPU_2_MBUSL_TICK_SMPL_OFFS))
+#define CPU_2_MBUSL_DDR_CLK_1x3						\
+		 ((TICK_DRV_1x3  << CCR_CPU_2_MBUSL_TICK_DRV_OFFS) | 	\
+		  (TICK_SMPL_1x3 << CCR_CPU_2_MBUSL_TICK_SMPL_OFFS))
+#define CPU_2_MBUSL_DDR_CLK_1x4						\
+		 ((TICK_DRV_1x4  << CCR_CPU_2_MBUSL_TICK_DRV_OFFS) | 	\
+		  (TICK_SMPL_1x4 << CCR_CPU_2_MBUSL_TICK_SMPL_OFFS))
+
+/* ARM Control and Status register */
+/* CPU_CTRL_STAT_REG (CCSR) */
+
+
+/*
+This is used to block PCI express\PCI from access Socrates/Feroceon GP
+while ARM boot is still in progress
+*/
+
+#define CCSR_PCI_ACCESS_OFFS			0
+#define CCSR_PCI_ACCESS_MASK			BIT0
+#define CCSR_PCI_ACCESS_ENABLE			(0 << CCSR_PCI_ACCESS_OFFS)
+#define CCSR_PCI_ACCESS_DISBALE			(1 << CCSR_PCI_ACCESS_OFFS)
+
+#define CCSR_ARM_RESET				BIT1
+#define CCSR_SELF_INT				BIT2
+#define CCSR_BIG_ENDIAN				BIT3
+
+
+/* RSTOUTn Mask Register */
+/* CPU_RSTOUTN_MASK_REG (CRMR) */
+
+#define CRMR_PEX_RST_OUT_OFFS			0
+#define CRMR_PEX_RST_OUT_MASK			BIT0
+#define CRMR_PEX_RST_OUT_ENABLE			(1 << CRMR_PEX_RST_OUT_OFFS)
+#define CRMR_PEX_RST_OUT_DISABLE		(0 << CRMR_PEX_RST_OUT_OFFS)
+
+#define CRMR_WD_RST_OUT_OFFS			1
+#define CRMR_WD_RST_OUT_MASK			BIT1
+#define CRMR_WD_RST_OUT_ENABLE			(1 << CRMR_WD_RST_OUT_OFFS)
+#define CRMR_WD_RST_OUT_DISBALE			(0 << CRMR_WD_RST_OUT_OFFS)			
+
+#define CRMR_SOFT_RST_OUT_OFFS			2
+#define CRMR_SOFT_RST_OUT_MASK			BIT2
+#define CRMR_SOFT_RST_OUT_ENABLE		(1 << CRMR_SOFT_RST_OUT_OFFS)
+#define CRMR_SOFT_RST_OUT_DISBALE		(0 << CRMR_SOFT_RST_OUT_OFFS)
+
+/* System Software Reset Register */
+/* CPU_SYS_SOFT_RST_REG (CSSRR) */
+
+#define CSSRR_SYSTEM_SOFT_RST			BIT0
+
+/* AHB to Mbus Bridge Interrupt Cause Register*/
+/* CPU_AHB_MBUS_CAUSE_INT_REG (CAMCIR) */
+
+#define CAMCIR_ARM_SELF_INT			BIT0
+#define CAMCIR_ARM_TIMER0_INT_REQ		BIT1
+#define CAMCIR_ARM_TIMER1_INT_REQ		BIT2
+#define CAMCIR_ARM_WD_TIMER_INT_REQ		BIT3
+
+
+/* AHB to Mbus Bridge Interrupt Mask Register*/
+/* CPU_AHB_MBUS_MASK_INT_REG (CAMMIR) */
+
+#define CAMCIR_ARM_SELF_INT_OFFS		0
+#define CAMCIR_ARM_SELF_INT_MASK		BIT0
+#define CAMCIR_ARM_SELF_INT_EN			(1 << CAMCIR_ARM_SELF_INT_OFFS)
+#define CAMCIR_ARM_SELF_INT_DIS			(0 << CAMCIR_ARM_SELF_INT_OFFS)
+
+
+#define CAMCIR_ARM_TIMER0_INT_REQ_OFFS		1
+#define CAMCIR_ARM_TIMER0_INT_REQ_MASK		BIT1
+#define CAMCIR_ARM_TIMER0_INT_REQ_EN		(1 << CAMCIR_ARM_TIMER0_INT_REQ_OFFS) 
+#define CAMCIR_ARM_TIMER0_INT_REQ_DIS		(0 << CAMCIR_ARM_TIMER0_INT_REQ_OFFS)
+
+#define CAMCIR_ARM_TIMER1_INT_REQ_OFFS		2
+#define CAMCIR_ARM_TIMER1_INT_REQ_MASK		BIT2
+#define CAMCIR_ARM_TIMER1_INT_REQ_EN		(1 << CAMCIR_ARM_TIMER1_INT_REQ_OFFS) 
+#define CAMCIR_ARM_TIMER1_INT_REQ_DIS		(0 << CAMCIR_ARM_TIMER1_INT_REQ_OFFS) 
+
+#define CAMCIR_ARM_WD_TIMER_INT_REQ_OFFS 	3
+#define CAMCIR_ARM_WD_TIMER_INT_REQ_MASK 	BIT3
+#define CAMCIR_ARM_WD_TIMER_INT_REQ_EN	 	(1 << CAMCIR_ARM_WD_TIMER_INT_REQ_OFFS) 
+#define CAMCIR_ARM_WD_TIMER_INT_REQ_DIS	 	(0 << CAMCIR_ARM_WD_TIMER_INT_REQ_OFFS) 
+
+/* CPU FTDLL Config register (CFCR) fields */
+#define CFCR_FTDLL_ICACHE_TAG_OFFS		0
+#define CFCR_FTDLL_ICACHE_TAG_MASK		(0x7F << CFCR_FTDLL_ICACHE_TAG_OFFS)
+#define CFCR_FTDLL_DCACHE_TAG_OFFS		8
+#define CFCR_FTDLL_DCACHE_TAG_MASK		(0x7F << CFCR_FTDLL_DCACHE_TAG_OFFS)
+#define CFCR_FTDLL_OVERWRITE_ENABLE		(1 << 15)
+/* For Orion 2 D2 only */
+#define CFCR_MRVL_CPU_ID_OFFS			16
+#define CFCR_MRVL_CPU_ID_MASK			(0x1 << CFCR_MRVL_CPU_ID_OFFS)
+#define CFCR_ARM_CPU_ID				(0x0 << CFCR_MRVL_CPU_ID_OFFS)
+#define CFCR_MRVL_CPU_ID			(0x1 << CFCR_MRVL_CPU_ID_OFFS)
+#define CFCR_VFP_SUB_ARC_NUM_OFFS		7
+#define CFCR_VFP_SUB_ARC_NUM_MASK		(0x1 << CFCR_VFP_SUB_ARC_NUM_OFFS)
+#define CFCR_VFP_SUB_ARC_NUM_1			(0x0 << CFCR_VFP_SUB_ARC_NUM_OFFS)
+#define CFCR_VFP_SUB_ARC_NUM_2			(0x1 << CFCR_VFP_SUB_ARC_NUM_OFFS)
+
+/* CPU_L2_CONFIG_REG fields */
+#define CL2CR_L2_WT_MODE_OFFS			4
+#define CL2CR_L2_WT_MODE_MASK			(1 << CL2CR_L2_WT_MODE_OFFS)
+
+/*******************************************/
+/* Main Interrupt Controller Registers Map */
+/*******************************************/
+
+#define CPU_MAIN_INT_CAUSE_REG			0x20200
+#define CPU_MAIN_IRQ_MASK_REG			0x20204
+#define CPU_MAIN_FIQ_MASK_REG			0x20208
+#define CPU_ENPOINT_MASK_REG			0x2020C
+#define CPU_MAIN_INT_CAUSE_HIGH_REG		0x20210
+#define CPU_MAIN_IRQ_MASK_HIGH_REG		0x20214
+#define CPU_MAIN_FIQ_MASK_HIGH_REG		0x20218
+#define CPU_ENPOINT_MASK_HIGH_REG		0x2021C
+
+
+/*******************************************/
+/* ARM Doorbell Registers Map		   */
+/*******************************************/
+
+#define CPU_HOST_TO_ARM_DRBL_REG		0x20400
+#define CPU_HOST_TO_ARM_MASK_REG		0x20404
+#define CPU_ARM_TO_HOST_DRBL_REG		0x20408
+#define CPU_ARM_TO_HOST_MASK_REG		0x2040C
+
+
+
+/* CPU control register map */
+/* Set bits means value is about to change according to new value */
+#define CPU_CONFIG_DEFAULT_MASK         	(CCR_VEC_INIT_LOC_MASK  | CCR_AHB_ERROR_PROP_MASK)      
+
+#define CPU_CONFIG_DEFAULT                      (CCR_VEC_INIT_LOC_FF00)
+                 
+/* CPU Control and status defaults */
+#define CPU_CTRL_STAT_DEFAULT_MASK              (CCSR_PCI_ACCESS_MASK)
+                                                                        
+
+#define CPU_CTRL_STAT_DEFAULT                   (CCSR_PCI_ACCESS_ENABLE)
+
+#endif /* __INCmvCpuIfRegsh */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysDram.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysDram.c
@@ -0,0 +1,348 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+/* includes */
+
+#include "ddr2/mvDramIf.h"
+#include "ctrlEnv/sys/mvCpuIf.h"
+#include "ctrlEnv/sys/mvSysDram.h"
+
+/* #define MV_DEBUG */
+#ifdef MV_DEBUG
+#define DB(x) x
+#else
+#define DB(x)
+#endif
+
+static MV_BOOL sdramIfWinOverlap(MV_TARGET target, MV_ADDR_WIN *pAddrWin);
+
+/*******************************************************************************
+* mvDramIfWinSet - Set DRAM interface address decode window
+*
+* DESCRIPTION: 
+*       This function sets DRAM interface address decode window.
+*
+* INPUT:
+*	    target      - System target. Use only SDRAM targets.
+*       pAddrDecWin - SDRAM address window structure.
+*
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       MV_BAD_PARAM if parameters are invalid or window is invalid, MV_OK
+*       otherwise.
+*******************************************************************************/
+MV_STATUS mvDramIfWinSet(MV_TARGET target, MV_DRAM_DEC_WIN *pAddrDecWin)
+{
+	MV_U32 baseReg=0,sizeReg=0;
+	MV_U32 baseToReg=0 , sizeToReg=0;
+
+    /* Check parameters */
+	if (!MV_TARGET_IS_DRAM(target))
+	{
+		mvOsPrintf("mvDramIfWinSet: target %d is not SDRAM\n", target);
+		return MV_BAD_PARAM;
+	}
+
+    /* Check if the requested window overlaps with current enabled windows	*/
+    if (MV_TRUE == sdramIfWinOverlap(target, &pAddrDecWin->addrWin))
+	{
+        mvOsPrintf("mvDramIfWinSet: ERR. Target %d overlaps\n", target);
+		return MV_BAD_PARAM;
+	}
+
+	/* check if address is aligned to the size */
+	if(MV_IS_NOT_ALIGN(pAddrDecWin->addrWin.baseLow, pAddrDecWin->addrWin.size))
+	{
+		mvOsPrintf("mvDramIfWinSet:Error setting DRAM interface window %d."\
+				   "\nAddress 0x%08x is unaligned to size 0x%x.\n",
+                   target, 
+				   pAddrDecWin->addrWin.baseLow,
+				   pAddrDecWin->addrWin.size);
+		return MV_ERROR;
+	}
+
+	/* read base register*/
+	baseReg = MV_REG_READ(SDRAM_BASE_ADDR_REG(0,target));
+
+	/* read size register */
+	sizeReg = MV_REG_READ(SDRAM_SIZE_REG(0,target));
+
+	/* BaseLow[31:16] => base register [31:16]		*/
+	baseToReg = pAddrDecWin->addrWin.baseLow & SCBAR_BASE_MASK;
+
+	/* Write to address decode Base Address Register                  */
+	baseReg &= ~SCBAR_BASE_MASK;
+	baseReg |= baseToReg;
+
+	/* Translate the given window size to register format			*/
+	sizeToReg = ctrlSizeToReg(pAddrDecWin->addrWin.size, SCSR_SIZE_ALIGNMENT);
+
+	/* Size parameter validity check.                                   */
+	if (-1 == sizeToReg)
+	{
+		mvOsPrintf("mvCtrlAddrDecToReg: ERR. Win %d size invalid.\n",target);
+		return MV_BAD_PARAM;
+	}
+
+	/* set size */
+	sizeReg &= ~SCSR_SIZE_MASK;
+	/* Size is located at upper 16 bits */
+	sizeReg |= (sizeToReg << SCSR_SIZE_OFFS);
+
+	/* enable/Disable */
+	if (MV_TRUE == pAddrDecWin->enable)
+	{
+		sizeReg |= SCSR_WIN_EN;
+	}
+	else
+	{
+		sizeReg &= ~SCSR_WIN_EN;
+	}
+
+	/* 3) Write to address decode Base Address Register                   */
+	MV_REG_WRITE(SDRAM_BASE_ADDR_REG(0,target), baseReg);
+
+	/* Write to address decode Size Register                        	*/
+	MV_REG_WRITE(SDRAM_SIZE_REG(0,target), sizeReg);
+	
+	return MV_OK;
+}
+/*******************************************************************************
+* mvDramIfWinGet - Get DRAM interface address decode window
+*
+* DESCRIPTION: 
+*       This function gets DRAM interface address decode window.
+*
+* INPUT:
+*	    target - System target. Use only SDRAM targets.
+*
+* OUTPUT:
+*       pAddrDecWin - SDRAM address window structure.
+*
+* RETURN:
+*       MV_BAD_PARAM if parameters are invalid or window is invalid, MV_OK
+*       otherwise.
+*******************************************************************************/
+MV_STATUS mvDramIfWinGet(MV_TARGET target, MV_DRAM_DEC_WIN *pAddrDecWin)
+{
+	MV_U32 baseReg,sizeReg;
+	MV_U32 sizeRegVal;
+	/* Check parameters */
+	if (!MV_TARGET_IS_DRAM(target))
+	{
+		mvOsPrintf("mvDramIfWinGet: target %d is Illigal\n", target);
+		return MV_ERROR;
+	}
+
+	/* Read base and size registers */
+	sizeReg = MV_REG_READ(SDRAM_SIZE_REG(0,target));
+	baseReg = MV_REG_READ(SDRAM_BASE_ADDR_REG(0,target));
+
+	sizeRegVal = (sizeReg & SCSR_SIZE_MASK) >> SCSR_SIZE_OFFS;
+
+	pAddrDecWin->addrWin.size = ctrlRegToSize(sizeRegVal,
+							SCSR_SIZE_ALIGNMENT);
+
+    	/* Check if ctrlRegToSize returned OK */
+	if (-1 == pAddrDecWin->addrWin.size)
+	{
+		mvOsPrintf("mvDramIfWinGet: size of target %d is Illigal\n", target);
+		return MV_ERROR;
+	}
+
+	/* Extract base address						*/
+	/* Base register [31:16] ==> baseLow[31:16] 		*/
+	pAddrDecWin->addrWin.baseLow = baseReg & SCBAR_BASE_MASK;
+
+	pAddrDecWin->addrWin.baseHigh =  0;
+
+
+	if (sizeReg & SCSR_WIN_EN)
+	{
+		pAddrDecWin->enable = MV_TRUE;
+	}
+	else
+	{
+		pAddrDecWin->enable = MV_FALSE;			
+	}
+
+	return MV_OK;
+}
+/*******************************************************************************
+* mvDramIfWinEnable - Enable/Disable SDRAM address decode window
+*
+* DESCRIPTION: 
+*		This function enable/Disable SDRAM address decode window.
+*
+* INPUT:
+*	    target - System target. Use only SDRAM targets.
+*
+* OUTPUT:
+*		None.
+*
+* RETURN:
+*		MV_ERROR in case function parameter are invalid, MV_OK otherewise.
+*
+*******************************************************************************/
+MV_STATUS mvDramIfWinEnable(MV_TARGET target, MV_BOOL enable)
+{
+	MV_DRAM_DEC_WIN 	addrDecWin;
+
+	/* Check parameters */
+	if (!MV_TARGET_IS_DRAM(target))
+	{
+		mvOsPrintf("mvDramIfWinEnable: target %d is Illigal\n", target);
+		return MV_ERROR;
+	}
+
+	if (enable == MV_TRUE) 
+	{   /* First check for overlap with other enabled windows				*/
+		if (MV_OK != mvDramIfWinGet(target, &addrDecWin))
+		{
+			mvOsPrintf("mvDramIfWinEnable:ERR. Getting target %d failed.\n", 
+                                                                        target);
+			return MV_ERROR;
+		}
+		/* Check for overlapping */
+		if (MV_FALSE == sdramIfWinOverlap(target, &(addrDecWin.addrWin)))
+		{
+			/* No Overlap. Enable address decode winNum window              */
+			MV_REG_BIT_SET(SDRAM_SIZE_REG(0,target), SCSR_WIN_EN);
+		}
+		else
+		{   /* Overlap detected	*/
+			mvOsPrintf("mvDramIfWinEnable: ERR. Target %d overlap detect\n",
+                                                                        target);
+			return MV_ERROR;
+		}
+	}
+	else
+	{   /* Disable address decode winNum window                             */
+		MV_REG_BIT_RESET(SDRAM_SIZE_REG(0, target), SCSR_WIN_EN);
+	}
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* sdramIfWinOverlap - Check if an address window overlap an SDRAM address window
+*
+* DESCRIPTION:
+*		This function scan each SDRAM address decode window to test if it 
+*		overlapps the given address windoow 
+*
+* INPUT:
+*       target      - SDRAM target where the function skips checking.
+*       pAddrDecWin - The tested address window for overlapping with 
+*					  SDRAM windows.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE if the given address window overlaps any enabled address
+*       decode map, MV_FALSE otherwise.
+*
+*******************************************************************************/
+static MV_BOOL sdramIfWinOverlap(MV_TARGET target, MV_ADDR_WIN *pAddrWin)
+{
+	MV_TARGET	targetNum;
+	MV_DRAM_DEC_WIN 	addrDecWin;
+	
+	for(targetNum = SDRAM_CS0; targetNum < MV_DRAM_MAX_CS ; targetNum++)
+	{
+		/* don't check our winNum or illegal targets */
+		if (targetNum == target)
+		{
+			continue;
+		}
+		
+		/* Get window parameters 	*/
+		if (MV_OK != mvDramIfWinGet(targetNum, &addrDecWin))
+		{
+			mvOsPrintf("sdramIfWinOverlap: ERR. TargetWinGet failed\n");
+			return MV_ERROR;
+		}
+	
+		/* Do not check disabled windows	*/
+		if (MV_FALSE == addrDecWin.enable)
+		{
+			continue;
+		}
+	
+		if(MV_TRUE == ctrlWinOverlapTest(pAddrWin, &addrDecWin.addrWin))
+		{                    
+			mvOsPrintf(
+			"sdramIfWinOverlap: Required target %d overlap winNum %d\n", 
+			target, targetNum);
+			return MV_TRUE;           
+		}
+	}
+	
+	return MV_FALSE;
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvAhbToMbusRegs.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvAhbToMbusRegs.h
@@ -0,0 +1,143 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#ifndef __INCmvAhbToMbusRegsh
+#define __INCmvAhbToMbusRegsh
+
+/******************************/
+/* ARM Address Map Registers  */
+/******************************/
+
+#define MAX_AHB_TO_MBUS_WINS	9
+#define MV_AHB_TO_MBUS_INTREG_WIN	8
+
+
+#define AHB_TO_MBUS_WIN_CTRL_REG(winNum)		(0x20000 + (winNum)*0x10)
+#define AHB_TO_MBUS_WIN_BASE_REG(winNum)		(0x20004 + (winNum)*0x10)
+#define AHB_TO_MBUS_WIN_REMAP_LOW_REG(winNum)	(0x20008 + (winNum)*0x10)
+#define AHB_TO_MBUS_WIN_REMAP_HIGH_REG(winNum)	(0x2000C + (winNum)*0x10)
+#define AHB_TO_MBUS_WIN_INTEREG_REG				 0x20080
+
+/* Window Control Register      */
+/* AHB_TO_MBUS_WIN_CTRL_REG (ATMWCR)*/
+#define ATMWCR_WIN_ENABLE					BIT0	/* Window Enable */
+
+#define ATMWCR_WIN_TARGET_OFFS			4 /* The target interface associated 
+											 with this window*/
+#define ATMWCR_WIN_TARGET_MASK			(0xf << ATMWCR_WIN_TARGET_OFFS)
+
+#define ATMWCR_WIN_ATTR_OFFS				8 /* The target interface attributes
+											 Associated with this window */
+#define ATMWCR_WIN_ATTR_MASK				(0xff << ATMWCR_WIN_ATTR_OFFS)
+
+											 
+/*
+Used with the Base register to set the address window size and location
+Must be programed from LSB to MSB as sequence of 1’s followed
+by sequence of 0’s. The number of 1’s specifies the size of the window
+in 64 KB granularity (e.g. a value of 0x00FF specifies 256 = 16 MB).
+
+NOTE: A value of 0x0 specifies 64KB size.
+*/
+#define ATMWCR_WIN_SIZE_OFFS				16 /* Window Size */
+#define ATMWCR_WIN_SIZE_MASK				(0xffff << ATMWCR_WIN_SIZE_OFFS)
+#define ATMWCR_WIN_SIZE_ALIGNMENT			0x10000
+
+/*  Window Base Register     */
+/* AHB_TO_MBUS_WIN_BASE_REG (ATMWBR) */
+
+/*
+Used with the size field to set the address window size and location.
+Corresponds to transaction address[31:16]
+*/
+#define ATMWBR_BASE_OFFS					16 /* Base Address */
+#define ATMWBR_BASE_MASK					(0xffff << 	ATMWBR_BASE_OFFS)
+#define ATMWBR_BASE_ALIGNMENT				0x10000
+
+/*  Window Remap Low Register   */
+/* AHB_TO_MBUS_WIN_REMAP_LOW_REG (ATMWRLR) */
+
+/*
+Used with the size field to specifies address bits[31:0] to be driven to
+the target interface.:
+target_addr[31:16] = (addr[31:16] & size[15:0]) | (remap[31:16] & ~size[15:0])
+*/
+#define ATMWRLR_REMAP_LOW_OFFS			16 /* Remap Address */
+#define ATMWRLR_REMAP_LOW_MASK			(0xffff << ATMWRLR_REMAP_LOW_OFFS)
+#define ATMWRLR_REMAP_LOW_ALIGNMENT		0x10000
+
+/* Window Remap High Register   */
+/* AHB_TO_MBUS_WIN_REMAP_HIGH_REG (ATMWRHR) */
+
+/*
+Specifies address bits[63:32] to be driven to the target interface.
+target_addr[63:32] = (RemapHigh[31:0]
+*/
+#define ATMWRHR_REMAP_HIGH_OFFS			0 /* Remap Address */
+#define ATMWRHR_REMAP_HIGH_MASK			(0xffffffff << ATMWRHR_REMAP_HIGH_OFFS)
+
+
+#endif /* __INCmvAhbToMbusRegsh */
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysTs.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysTs.c
@@ -0,0 +1,591 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+	notice, this list of conditions and the following disclaimer in the
+	documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+	used to endorse or promote products derived from this software without
+	specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#include "ctrlEnv/sys/mvSysTs.h"
+
+
+typedef struct _mvTsuDecWin
+{
+        MV_TARGET     target;
+        MV_ADDR_WIN   addrWin; /* An address window*/
+        MV_BOOL       enable;  /* Address decode window is enabled/disabled */
+ 
+}MV_TSU_DEC_WIN;
+
+
+MV_TARGET tsuAddrDecPrioTap[] =
+{
+#if defined(MV_INCLUDE_PEX)
+        PEX0_MEM,
+#endif
+#if defined(MV_INCLUDE_PCI)
+        PCI0_MEM,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS0)
+        SDRAM_CS0,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS1)
+        SDRAM_CS1,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS2)
+        SDRAM_CS2,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS3)
+        SDRAM_CS3,
+#endif
+#if defined(MV_INCLUDE_DEVICE_CS0)
+        DEVICE_CS0,
+#endif
+#if defined(MV_INCLUDE_DEVICE_CS1)
+        DEVICE_CS1,
+#endif
+#if defined(MV_INCLUDE_DEVICE_CS2)
+        DEVICE_CS2,
+#endif
+#if defined(MV_INCLUDE_DEVICE_CS3)
+        DEVICE_CS3,
+#endif
+#if defined(MV_INCLUDE_PEX)
+        PEX0_IO,
+#endif
+#if defined(MV_INCLUDE_PCI)
+        PCI0_IO,
+#endif
+        TBL_TERM
+};
+
+static MV_STATUS tsuWinOverlapDetect(MV_U32 winNum, MV_ADDR_WIN *pAddrWin);
+static MV_STATUS mvTsuWinSet(MV_U32 winNum, MV_TSU_DEC_WIN *pAddrDecWin);
+static MV_STATUS mvTsuWinGet(MV_U32 winNum, MV_TSU_DEC_WIN *pAddrDecWin);
+MV_STATUS mvTsuWinEnable(MV_U32 winNum,MV_BOOL enable);
+
+/*******************************************************************************
+* mvTsuWinInit
+*
+* DESCRIPTION:
+* 	Initialize the TSU unit address decode windows.
+*
+* INPUT:
+*       None.
+* OUTPUT:
+*	None.
+* RETURN:
+*       MV_OK	- on success,
+*
+*******************************************************************************/
+MV_STATUS mvTsuWinInit(void)
+{
+	MV_U32          winNum, status, winPrioIndex=0;
+	MV_TSU_DEC_WIN  tsuWin;
+	MV_CPU_DEC_WIN  cpuAddrDecWin;
+
+	/* First disable all address decode windows */
+	for(winNum = 0; winNum < TSU_MAX_DECODE_WIN; winNum++)
+	{
+		MV_REG_BIT_RESET(MV_TSU_WIN_CTRL_REG(winNum),
+				 TSU_WIN_CTRL_EN_MASK);
+	}
+
+	/* Go through all windows in user table until table terminator      */
+	for(winNum = 0; ((tsuAddrDecPrioTap[winPrioIndex] != TBL_TERM) &&
+			 (winNum < TSU_MAX_DECODE_WIN));)
+	{
+		/* first get attributes from CPU If */
+		status = mvCpuIfTargetWinGet(tsuAddrDecPrioTap[winPrioIndex],
+					     &cpuAddrDecWin);
+
+		if(MV_NO_SUCH == status)
+		{
+			winPrioIndex++;
+			continue;
+		}
+		if(MV_OK != status)
+		{
+			mvOsPrintf("mvTsuWinInit: ERR. mvCpuIfTargetWinGet failed\n");
+			return MV_ERROR;
+		}
+
+		if (cpuAddrDecWin.enable == MV_TRUE)
+		{
+			tsuWin.addrWin.baseHigh = cpuAddrDecWin.addrWin.baseHigh;
+			tsuWin.addrWin.baseLow = cpuAddrDecWin.addrWin.baseLow;
+			tsuWin.addrWin.size = cpuAddrDecWin.addrWin.size;
+			tsuWin.enable = MV_TRUE;
+			tsuWin.target = tsuAddrDecPrioTap[winPrioIndex];
+
+			if(MV_OK != mvTsuWinSet(winNum, &tsuWin))
+			{
+				mvOsPrintf("mvTsuWinInit: ERR. mvTsuWinSet failed winNum=%d\n",
+					   winNum);
+				return MV_ERROR;
+			}
+			winNum++;
+		}
+		winPrioIndex ++;
+	}
+
+	return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvTsuWinSet
+*
+* DESCRIPTION:
+*       This function sets a peripheral target (e.g. SDRAM bank0, PCI_MEM0)
+*       address window, also known as address decode window.
+*       After setting this target window, the TSU will be able to access the
+*       target within the address window.
+*
+* INPUT:
+*       winNum      - TSU to target address decode window number.
+*       pAddrDecWin - TSU target window data structure.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_ERROR	- if address window overlapps with other address decode 
+*			windows.
+*       MV_BAD_PARAM	- if base address is invalid parameter or target is
+*       		unknown.
+*
+*******************************************************************************/
+MV_STATUS mvTsuWinSet(MV_U32 winNum, MV_TSU_DEC_WIN *pAddrDecWin)
+{
+	MV_TARGET_ATTRIB    targetAttribs;
+	MV_DEC_REGS         decRegs;
+
+	/* Parameter checking   */
+	if(winNum >= TSU_MAX_DECODE_WIN)
+	{
+		mvOsPrintf("mvTsuWinSet: ERR. Invalid win num %d\n",winNum);
+		return MV_BAD_PARAM;
+	}    
+
+	/* Check if the requested window overlapps with current windows     */
+	if(MV_TRUE == tsuWinOverlapDetect(winNum, &pAddrDecWin->addrWin))
+	{
+		mvOsPrintf("mvTsuWinSet: ERR. Window %d overlap\n", winNum);
+		return MV_ERROR;
+	}
+
+	/* check if address is aligned to the size */
+	if(MV_IS_NOT_ALIGN(pAddrDecWin->addrWin.baseLow,pAddrDecWin->addrWin.size))
+	{
+		mvOsPrintf("mvTsuWinSet: Error setting TSU window %d to target "
+			   "%s.\nAddress 0x%08x is unaligned to size 0x%x.\n",
+			   winNum, mvCtrlTargetNameGet(pAddrDecWin->target),
+			   pAddrDecWin->addrWin.baseLow,
+			   pAddrDecWin->addrWin.size);
+		return MV_ERROR;
+	}
+
+	decRegs.baseReg = MV_REG_READ(MV_TSU_WIN_BASE_REG(winNum));
+	decRegs.sizeReg = MV_REG_READ(MV_TSU_WIN_CTRL_REG(winNum));
+    
+	if(MV_OK != mvCtrlAddrDecToReg(&(pAddrDecWin->addrWin),&decRegs))
+	{
+		mvOsPrintf("mvTsuWinSet: mvCtrlAddrDecToReg Failed\n");
+		return MV_ERROR;
+	}
+    
+	mvCtrlAttribGet(pAddrDecWin->target,&targetAttribs);
+    
+	/* set attributes */
+	decRegs.sizeReg &= ~TSU_WIN_CTRL_ATTR_MASK;
+	decRegs.sizeReg |= targetAttribs.attrib << TSU_WIN_CTRL_ATTR_OFFS;
+	/* set target ID */
+	decRegs.sizeReg &= ~TSU_WIN_CTRL_TARGET_MASK;
+	decRegs.sizeReg |= targetAttribs.targetId << TSU_WIN_CTRL_TARGET_OFFS;
+
+	/* for the safe side we disable the window before writing the new */
+	/* values */
+	mvTsuWinEnable(winNum, MV_FALSE);
+	MV_REG_WRITE(MV_TSU_WIN_CTRL_REG(winNum),decRegs.sizeReg);
+
+	/* Write to address decode Size Register                            */
+	MV_REG_WRITE(MV_TSU_WIN_BASE_REG(winNum), decRegs.baseReg);
+
+	/* Enable address decode target window                              */
+	if(pAddrDecWin->enable == MV_TRUE)
+	{
+		mvTsuWinEnable(winNum,MV_TRUE);
+	}
+
+	return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvTsuWinGet
+*
+* DESCRIPTION:
+*	Get TSU peripheral target address window.
+*
+* INPUT:
+*	winNum - TSU to target address decode window number.
+*
+* OUTPUT:
+*       pAddrDecWin - TSU target window data structure.
+*
+* RETURN:
+*       MV_ERROR if register parameters are invalid.
+*
+*******************************************************************************/
+MV_STATUS mvTsuWinGet(MV_U32 winNum, MV_TSU_DEC_WIN *pAddrDecWin)
+{
+	MV_DEC_REGS decRegs;
+	MV_TARGET_ATTRIB targetAttrib;
+
+	/* Parameter checking   */
+	if(winNum >= TSU_MAX_DECODE_WIN)
+	{
+		mvOsPrintf("mvTsuWinGet: ERR. Invalid winNum %d\n", winNum);
+		return MV_NOT_SUPPORTED;
+	}
+
+	decRegs.baseReg = MV_REG_READ(MV_TSU_WIN_BASE_REG(winNum));                                                                           
+	decRegs.sizeReg = MV_REG_READ(MV_TSU_WIN_CTRL_REG(winNum));
+ 
+	if(MV_OK != mvCtrlRegToAddrDec(&decRegs,&(pAddrDecWin->addrWin)))
+	{
+		mvOsPrintf("mvTsuWinGet: mvCtrlRegToAddrDec Failed \n");
+		return MV_ERROR;
+	}
+
+	/* attrib and targetId */
+	targetAttrib.attrib = 
+		(decRegs.sizeReg & TSU_WIN_CTRL_ATTR_MASK) >> TSU_WIN_CTRL_ATTR_OFFS;
+	targetAttrib.targetId = 
+		(decRegs.sizeReg & TSU_WIN_CTRL_TARGET_MASK) >> TSU_WIN_CTRL_TARGET_OFFS;
+
+	pAddrDecWin->target = mvCtrlTargetGet(&targetAttrib);
+
+	/* Check if window is enabled   */
+	if((MV_REG_READ(MV_TSU_WIN_CTRL_REG(winNum)) & TSU_WIN_CTRL_EN_MASK))
+	{
+		pAddrDecWin->enable = MV_TRUE;
+	}
+	else
+	{
+		pAddrDecWin->enable = MV_FALSE;
+	}
+	
+	return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvTsuWinEnable
+*
+* DESCRIPTION:
+*       This function enable/disable a TSU to target address window.
+*       According to parameter 'enable' the routine will enable the
+*       window, thus enabling TSU accesses (before enabling the window it is
+*       tested for overlapping). Otherwise, the window will be disabled.
+*
+* INPUT:
+*       winNum - TSU to target address decode window number.
+*       enable - Enable / disable parameter.
+*
+* OUTPUT:
+*       N/A
+*
+* RETURN:
+*       MV_ERROR if decode window number was wrong or enabled window overlapps.
+*
+*******************************************************************************/
+MV_STATUS mvTsuWinEnable(MV_U32 winNum,MV_BOOL enable)
+{
+	MV_TSU_DEC_WIN addrDecWin;
+
+	/* Parameter checking   */
+	if(winNum >= TSU_MAX_DECODE_WIN)
+	{
+		mvOsPrintf("mvTsuWinEnable: ERR. Invalid winNum%d\n",winNum);
+		return MV_ERROR;
+	}
+
+	if(enable == MV_TRUE)
+	{
+		/* First check for overlap with other enabled windows   */
+		/* Get current window.					*/
+		if(MV_OK != mvTsuWinGet(winNum,&addrDecWin))
+		{
+			mvOsPrintf("mvTsuWinEnable: ERR. targetWinGet fail\n");
+			return MV_ERROR;
+		}
+		/* Check for overlapping.	*/
+		if(MV_FALSE == tsuWinOverlapDetect(winNum,&(addrDecWin.addrWin)))
+		{
+			/* No Overlap. Enable address decode target window   */
+			MV_REG_BIT_SET(MV_TSU_WIN_CTRL_REG(winNum),
+				       TSU_WIN_CTRL_EN_MASK);
+		}
+		else
+		{
+			/* Overlap detected */
+			mvOsPrintf("mvTsuWinEnable: ERR. Overlap detected\n");
+			return MV_ERROR;
+		}
+	}
+	else
+	{
+		/* Disable address decode target window */
+		MV_REG_BIT_RESET(MV_TSU_WIN_CTRL_REG(winNum),
+				 TSU_WIN_CTRL_EN_MASK);
+	}
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvTsuWinTargetGet
+*
+* DESCRIPTION:
+*	Get Window number associated with target
+*
+* INPUT:
+*	target	- Target ID to get the window number for.
+* OUTPUT:
+*
+* RETURN:
+*       window number or 0xFFFFFFFF on error.
+*
+*******************************************************************************/
+MV_U32  mvTsuWinTargetGet(MV_TARGET target)
+{
+	MV_TSU_DEC_WIN decWin;
+	MV_U32 winNum;
+
+	/* Check parameters */
+	if(target >= MAX_TARGETS)
+	{
+		mvOsPrintf("mvTsuWinTargetGet: target %d is Illigal\n", target);
+		return 0xffffffff;
+	}
+
+	for(winNum = 0; winNum < TSU_MAX_DECODE_WIN; winNum++)
+	{
+		if(mvTsuWinGet(winNum,&decWin) != MV_OK)
+		{
+			mvOsPrintf("mvTsuWinGet: window returned error\n");
+			return 0xffffffff;
+		}
+
+		if (decWin.enable == MV_TRUE)
+		{
+			if(decWin.target == target)
+			{
+				return winNum;
+			}
+		}
+	}
+	return 0xFFFFFFFF;
+}
+
+
+/*******************************************************************************
+* tsuWinOverlapDetect
+*
+* DESCRIPTION:
+*	Detect TSU address windows overlapping
+*	An unpredicted behaviur is expected in case TSU address decode
+*	windows overlapps.
+*	This function detects TSU address decode windows overlapping of a
+*	specified window. The function does not check the window itself for
+*	overlapping. The function also skipps disabled address decode windows.
+*
+* INPUT:
+*       winNum      - address decode window number.
+*       pAddrDecWin - An address decode window struct.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE if the given address window overlap current address
+*       decode map, MV_FALSE otherwise, MV_ERROR if reading invalid data
+*       from registers.
+*
+*******************************************************************************/
+static MV_STATUS tsuWinOverlapDetect(MV_U32 winNum, MV_ADDR_WIN *pAddrWin)
+{
+	MV_U32              ctrlReg;
+	MV_U32              winNumIndex;
+	MV_TSU_DEC_WIN      addrDecWin;
+
+	for(winNumIndex = 0; winNumIndex < TSU_MAX_DECODE_WIN; winNumIndex++)
+	{
+		/* Do not check window itself           */
+		if(winNumIndex == winNum)
+		{
+			continue;
+		}
+
+		/* Do not check disabled windows        */
+		ctrlReg = MV_REG_READ(MV_TSU_WIN_CTRL_REG(winNumIndex));
+		if((ctrlReg & TSU_WIN_CTRL_EN_MASK) == 0)
+		{
+			continue;
+		}
+
+		/* Get window parameters        */
+		if (MV_OK != mvTsuWinGet(winNumIndex, &addrDecWin))
+		{
+			mvOsPrintf("tsuWinOverlapDetect: ERR. mvTsuWinGet failed\n");
+			return MV_ERROR;
+		}
+
+		if (MV_TRUE == ctrlWinOverlapTest(pAddrWin, &(addrDecWin.addrWin)))
+		{
+			return MV_TRUE;
+		}
+	}
+	return MV_FALSE;
+}
+
+
+/*******************************************************************************
+* mvTsuAddrDecShow
+*
+* DESCRIPTION:
+*	Print the TSU address decode map.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+void mvTsuAddrDecShow(void)
+{
+	MV_TSU_DEC_WIN  win;
+	int             i;
+
+	if (MV_FALSE == mvCtrlPwrClckGet(TS_UNIT_ID, 0)) 
+		return;
+
+	mvOsOutput( "\n" );
+	mvOsOutput( "TSU:\n");
+	mvOsOutput( "----\n" );
+
+	for(i = 0; i < TSU_MAX_DECODE_WIN; i++)
+	{
+		memset(&win, 0, sizeof(TSU_MAX_DECODE_WIN));
+		mvOsOutput( "win%d - ", i );
+
+		if(mvTsuWinGet(i, &win ) == MV_OK )
+		{
+			if(win.enable == MV_TRUE)
+			{
+				mvOsOutput("%s base %08x, ",
+					   mvCtrlTargetNameGet(win.target),
+					   win.addrWin.baseLow);
+				mvOsOutput( "...." );
+				mvSizePrint(win.addrWin.size );
+				mvOsOutput( "\n" );
+			}
+			else
+			{
+				mvOsOutput( "disable\n" );
+			}
+		}
+	}
+	return;
+}
+
+
+/*******************************************************************************
+* mvTsuInit
+*
+* DESCRIPTION:
+* 	Initialize the TSU unit, and get unit out of reset.
+*
+* INPUT:
+*       coreClock	- The core clock at which the TSU should operate.
+*       mode		- The mode on configure the unit into (serial/parallel).
+* 	memHandle	- Memory handle used for memory allocations.
+* OUTPUT:
+*	None.
+* RETURN:
+*       MV_OK	- on success,
+*
+*******************************************************************************/
+MV_STATUS mvTsuInit(MV_TSU_CORE_CLOCK coreClock, MV_TSU_PORTS_MODE mode,
+	            void *osHandle)
+{
+	MV_STATUS status;
+
+	status = mvTsuWinInit();
+	if(status == MV_OK)
+		status = mvTsuHalInit(coreClock,mode,osHandle);
+
+	return status;
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysGbe.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysGbe.h
@@ -0,0 +1,113 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+        this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCmvSysGbeh
+#define __INCmvSysGbeh
+
+#include "mvCommon.h"
+#include "eth/mvEth.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "ctrlEnv/sys/mvCpuIf.h"
+
+#define ETH_WIN_BASE_REG(port, win)         (MV_ETH_REG_BASE(port) + 0x200 + ((win)<<3))
+#define ETH_WIN_SIZE_REG(port, win)         (MV_ETH_REG_BASE(port) + 0x204 + ((win)<<3))
+#define ETH_WIN_REMAP_REG(port, win)        (MV_ETH_REG_BASE(port) + 0x280 + ((win)<<2))
+#define ETH_BASE_ADDR_ENABLE_REG(port)      (MV_ETH_REG_BASE(port) + 0x290)
+#define ETH_ACCESS_PROTECT_REG(port)        (MV_ETH_REG_BASE(port) + 0x294)
+
+/**** Address decode parameters ****/
+
+/* Ethernet Base Address Register bits */
+#define ETH_MAX_DECODE_WIN              6
+#define ETH_MAX_HIGH_ADDR_REMAP_WIN     4
+
+/* Ethernet Port Access Protect (EPAP) register */
+
+/* The target associated with this window*/
+#define ETH_WIN_TARGET_OFFS             0 
+#define ETH_WIN_TARGET_MASK             (0xf << ETH_WIN_TARGET_OFFS)
+/* The target attributes Associated with window */
+#define ETH_WIN_ATTR_OFFS               8 
+#define ETH_WIN_ATTR_MASK               (0xff << ETH_WIN_ATTR_OFFS)
+
+/* Ethernet Port Access Protect Register (EPAPR) */
+#define ETH_PROT_NO_ACCESS              NO_ACCESS_ALLOWED
+#define ETH_PROT_READ_ONLY              READ_ONLY
+#define ETH_PROT_FULL_ACCESS            FULL_ACCESS
+#define ETH_PROT_WIN_OFFS(winNum)       (2 * (winNum))
+#define ETH_PROT_WIN_MASK(winNum)       (0x3 << ETH_PROT_WIN_OFFS(winNum))
+
+MV_STATUS   mvEthWinInit (int port);
+MV_STATUS   mvEthWinEnable(int port, MV_U32 winNum, MV_BOOL enable);
+MV_U32      mvEthWinTargetGet(int port, MV_TARGET target);
+MV_STATUS mvEthProtWinSet(MV_U32 portNo, MV_U32 winNum, MV_ACCESS_RIGHTS
+		access);
+
+void        mvEthPortAddrDecShow(int port);
+
+MV_VOID     mvEthAddrDecShow(MV_VOID);
+
+void        mvEthInit(void);
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvCpuIf.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvCpuIf.c
@@ -0,0 +1,1046 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+/* includes */
+#include "ctrlEnv/sys/mvCpuIf.h"
+#include "ctrlEnv/sys/mvAhbToMbusRegs.h"
+#include "cpu/mvCpu.h"
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "mvSysHwConfig.h"
+
+/*#define MV_DEBUG*/
+/* defines  */
+
+#ifdef MV_DEBUG
+	#define DB(x)	x
+#else
+	#define DB(x)
+#endif
+
+#if defined(MV_BRIDGE_SYNC_REORDER) /* used for sync write reordering in bridge */ 
+MV_U32 *mvUncachedParam = NULL;
+#endif
+
+
+/* locals   */
+/* static functions */
+static MV_BOOL cpuTargetWinOverlap(MV_TARGET target, MV_ADDR_WIN *pAddrWin);
+
+MV_TARGET sampleAtResetTargetArray[] = BOOT_TARGETS_NAME_ARRAY;
+/*******************************************************************************
+* mvCpuIfInit - Initialize Controller CPU interface
+*
+* DESCRIPTION:
+*       This function initialize Controller CPU interface:
+*       1. Set CPU interface configuration registers.
+*       2. Set CPU master Pizza arbiter control according to static
+*          configuration described in configuration file.
+*       3. Opens CPU address decode windows. DRAM windows are assumed to be
+*		   already set (auto detection).
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_STATUS mvCpuIfInit(MV_CPU_DEC_WIN *cpuAddrWinMap)
+{
+	MV_U32 regVal;
+	MV_TARGET target;
+	MV_ADDR_WIN addrWin;
+
+	if (cpuAddrWinMap == NULL)
+	{
+		DB(mvOsPrintf("mvCpuIfInit:ERR. cpuAddrWinMap == NULL\n"));
+		return MV_ERROR;
+	}
+
+	/* Set ARM Configuration register */
+	regVal  = MV_REG_READ(CPU_CONFIG_REG);
+	regVal &= ~CPU_CONFIG_DEFAULT_MASK;
+	regVal |= CPU_CONFIG_DEFAULT;
+	MV_REG_WRITE(CPU_CONFIG_REG,regVal);
+
+
+	/* First disable all CPU target windows  */
+	for (target = 0; cpuAddrWinMap[target].enable != TBL_TERM; target++)
+    	{
+		if ((MV_TARGET_IS_DRAM(target))||(target == INTER_REGS))
+		{
+			continue;
+		}
+
+#if defined(MV_MEM_OVER_PCI_WA) || defined(MV_UART_OVER_PCI_WA)
+		/* If the target PEX or PCI and memory is over PEX or PCI we don't touch this CPU windows */
+		if (MV_TARGET_IS_PCI(target))
+		{
+			continue;
+		}
+#endif
+
+#if defined(MV_MEM_OVER_PEX_WA) || defined(MV_UART_OVER_PEX_WA)
+		/* If the target PEX or PCI and memory is over PEX or PCI we don't touch this CPU windows */
+		if (MV_TARGET_IS_PEX(target))
+		{
+			continue;
+		}
+#endif
+#if defined(MV_RUN_FROM_FLASH)
+        	/* Don't disable the boot device.                               */
+		if (target == DEV_BOOCS)
+		{
+			continue;
+		}
+#endif /* MV_RUN_FROM_FLASH */
+		mvCpuIfTargetWinEnable(MV_CHANGE_BOOT_CS(target),MV_FALSE);
+	}
+
+#if defined(MV_RUN_FROM_FLASH)
+    	/* Resize the bootcs windows before other windows, because this     */
+    	/* window is enabled and will cause an overlap if not resized.      */
+	target = DEV_BOOCS;
+
+	if (MV_OK != mvCpuIfTargetWinSet(target, &cpuAddrWinMap[target]))
+	{
+		DB(mvOsPrintf("mvCpuIfInit:ERR. mvCpuIfTargetWinSet fail\n"));
+		return MV_ERROR;
+	}
+
+	addrWin.baseLow = cpuAddrWinMap[target].addrWin.baseLow;
+	addrWin.baseHigh = cpuAddrWinMap[target].addrWin.baseHigh;
+	if (0xffffffff == mvAhbToMbusWinRemap(cpuAddrWinMap[target].winNum ,&addrWin))
+	{
+		DB(mvOsPrintf("mvCpuIfInit:WARN. mvAhbToMbusWinRemap can't remap winNum=%d\n",
+					  cpuAddrWinMap[target].winNum));
+	}
+
+#endif /* MV_RUN_FROM_FLASH */
+
+	/* Go through all targets in user table until table terminator			*/
+	for (target = 0; cpuAddrWinMap[target].enable != TBL_TERM; target++)
+    	{
+
+#if defined(MV_RUN_FROM_FLASH)
+	if (target == DEV_BOOCS)
+	{
+		continue;
+	}
+#endif /* MV_RUN_FROM_FLASH */
+
+	/* if DRAM auto sizing is used do not initialized DRAM target windows, 	*/
+	/* assuming this already has been done earlier.							*/
+#ifdef	MV_DRAM_AUTO_SIZE
+		if (MV_TARGET_IS_DRAM(target))
+		{
+			continue;
+		}
+#endif
+
+#if defined(MV_MEM_OVER_PCI_WA) || defined(MV_UART_OVER_PCI_WA)
+		/* If the target PEX or PCI and memory is over PEX or PCI we don't touch this CPU windows */
+		if (MV_TARGET_IS_PCI(target))
+		{
+			continue;
+		}
+#endif
+
+#if defined(MV_MEM_OVER_PEX_WA) || defined(MV_UART_OVER_PEX_WA)
+		/* If the target PEX or PCI and memory is over PEX or PCI we don't touch this CPU windows */
+		if (MV_TARGET_IS_PEX(target))
+		{
+			continue;
+		}
+#endif
+	/* If the target attribute is the same as the boot device attribute */
+	/* then it's stays disable */
+		if (MV_TARGET_IS_AS_BOOT(target))
+		{
+			continue;
+		}
+
+		if((0 == cpuAddrWinMap[target].addrWin.size) ||
+		   (DIS == cpuAddrWinMap[target].enable))
+
+		{
+			if (MV_OK != mvCpuIfTargetWinEnable(target, MV_FALSE))
+			{
+				DB(mvOsPrintf("mvCpuIfInit:ERR. mvCpuIfTargetWinEnable fail\n"));
+				return MV_ERROR;
+			}
+
+		}
+		else
+		{
+			if (MV_OK != mvCpuIfTargetWinSet(target, &cpuAddrWinMap[target]))
+			{
+				DB(mvOsPrintf("mvCpuIfInit:ERR. mvCpuIfTargetWinSet fail\n"));
+				return MV_ERROR;
+			}
+
+			addrWin.baseLow = cpuAddrWinMap[target].addrWin.baseLow;
+			addrWin.baseHigh = cpuAddrWinMap[target].addrWin.baseHigh;
+			if (0xffffffff == mvAhbToMbusWinRemap(cpuAddrWinMap[target].winNum ,&addrWin))
+			{
+				DB(mvOsPrintf("mvCpuIfInit:WARN. mvAhbToMbusWinRemap can't remap winNum=%d\n",
+							  cpuAddrWinMap[target].winNum));
+			}
+
+
+		}
+    }
+
+	return MV_OK;
+
+
+}
+
+#if defined(MV_BRIDGE_SYNC_REORDER)
+MV_STATUS mvCpuIfBridgeReorderWAInit(void)
+{
+    MV_ULONG tmpPhysAddress;
+    mvUncachedParam = mvOsIoUncachedMalloc(NULL, 4, &tmpPhysAddress, NULL);
+    if (mvUncachedParam == NULL) {
+	mvOsPrintf("Uncached memory allocation failed\n"); 
+	return MV_ERROR;
+    }
+    return MV_OK;
+}
+#endif
+
+
+/*******************************************************************************
+* mvCpuIfTargetWinSet - Set CPU-to-peripheral target address window
+*
+* DESCRIPTION:
+*       This function sets a peripheral target (e.g. SDRAM bank0, PCI0_MEM0)
+*       address window, also known as address decode window.
+*       A new address decode window is set for specified target address window.
+*       If address decode window parameter structure enables the window,
+*       the routine will also enable the target window, allowing CPU to access
+*       the target window.
+*
+* INPUT:
+*       target      - Peripheral target enumerator.
+*       pAddrDecWin - CPU target window data structure.
+*
+* OUTPUT:
+*       N/A
+*
+* RETURN:
+*       MV_OK if CPU target window was set correctly, MV_ERROR in case of
+*       address window overlapps with other active CPU target window or
+*		trying to assign 36bit base address while CPU does not support that.
+*       The function returns MV_NOT_SUPPORTED, if the target is unsupported.
+*
+*******************************************************************************/
+MV_STATUS mvCpuIfTargetWinSet(MV_TARGET target, MV_CPU_DEC_WIN *pAddrDecWin)
+{
+	MV_AHB_TO_MBUS_DEC_WIN decWin;
+	MV_U32 existingWinNum;
+	MV_DRAM_DEC_WIN addrDecWin;
+
+	target = MV_CHANGE_BOOT_CS(target);
+
+	/* Check parameters */
+	if (target >= MAX_TARGETS)
+	{
+		mvOsPrintf("mvCpuIfTargetWinSet: target %d is Illigal\n", target);
+		return MV_ERROR;
+	}
+
+    	/* 2) Check if the requested window overlaps with current windows		*/
+    	if (MV_TRUE == cpuTargetWinOverlap(target, &pAddrDecWin->addrWin))
+	{
+        	mvOsPrintf("mvCpuIfTargetWinSet: ERR. Target %d overlap\n", target);
+		return MV_BAD_PARAM;
+	}
+
+	if (MV_TARGET_IS_DRAM(target))
+	{
+		/* copy relevant data to MV_DRAM_DEC_WIN structure */
+		addrDecWin.addrWin.baseHigh = pAddrDecWin->addrWin.baseHigh;
+		addrDecWin.addrWin.baseLow = pAddrDecWin->addrWin.baseLow;
+		addrDecWin.addrWin.size = pAddrDecWin->addrWin.size;
+		addrDecWin.enable = pAddrDecWin->enable;
+
+
+		if (mvDramIfWinSet(target,&addrDecWin) != MV_OK);
+		{
+			mvOsPrintf("mvCpuIfTargetWinSet: mvDramIfWinSet Failed\n");
+			return MV_ERROR;
+		}
+
+	}
+	else
+	{
+		/* copy relevant data to MV_AHB_TO_MBUS_DEC_WIN structure */
+		decWin.addrWin.baseLow = pAddrDecWin->addrWin.baseLow;
+		decWin.addrWin.baseHigh = pAddrDecWin->addrWin.baseHigh;
+		decWin.addrWin.size = pAddrDecWin->addrWin.size;
+		decWin.enable = pAddrDecWin->enable;
+		decWin.target = target;
+
+		existingWinNum = mvAhbToMbusWinTargetGet(target);
+
+		/* check if there is already another Window configured
+		for this target */
+		if ((existingWinNum < MAX_AHB_TO_MBUS_WINS )&&
+			(existingWinNum != pAddrDecWin->winNum))
+		{
+			/* if we want to enable the new winow number
+			passed by the user , then the old one should
+			be disabled */
+			if (MV_TRUE == pAddrDecWin->enable)
+			{
+				/* be sure it is disabled */
+				mvAhbToMbusWinEnable(existingWinNum , MV_FALSE);
+			}
+		}
+
+        if (mvAhbToMbusWinSet(pAddrDecWin->winNum,&decWin) != MV_OK)
+		{
+			mvOsPrintf("mvCpuIfTargetWinSet: mvAhbToMbusWinSet Failed\n");
+			return MV_ERROR;
+		}
+
+	}
+
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvCpuIfTargetWinGet - Get CPU-to-peripheral target address window
+*
+* DESCRIPTION:
+*		Get the CPU peripheral target address window.
+*
+* INPUT:
+*       target - Peripheral target enumerator
+*
+* OUTPUT:
+*       pAddrDecWin - CPU target window information data structure.
+*
+* RETURN:
+*       MV_OK if target exist, MV_ERROR otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvCpuIfTargetWinGet(MV_TARGET target, MV_CPU_DEC_WIN *pAddrDecWin)
+{
+
+	MV_U32 winNum=0xffffffff;
+	MV_AHB_TO_MBUS_DEC_WIN decWin;
+	MV_DRAM_DEC_WIN addrDecWin;
+
+	target = MV_CHANGE_BOOT_CS(target);
+
+	/* Check parameters */
+	if (target >= MAX_TARGETS)
+	{
+		mvOsPrintf("mvCpuIfTargetWinGet: target %d is Illigal\n", target);
+		return MV_ERROR;
+	}
+
+	if (MV_TARGET_IS_DRAM(target))
+	{
+		if (mvDramIfWinGet(target,&addrDecWin) != MV_OK)
+		{
+			mvOsPrintf("mvCpuIfTargetWinGet: Failed to get window target %d\n",
+					   target);
+			return MV_ERROR;
+		}
+
+		/* copy relevant data to MV_CPU_DEC_WIN structure */
+		pAddrDecWin->addrWin.baseLow = addrDecWin.addrWin.baseLow;
+		pAddrDecWin->addrWin.baseHigh = addrDecWin.addrWin.baseHigh;
+		pAddrDecWin->addrWin.size = addrDecWin.addrWin.size;
+		pAddrDecWin->enable = addrDecWin.enable;
+		pAddrDecWin->winNum = 0xffffffff;
+
+	}
+	else
+	{
+		/* get the Window number associated with this target */
+
+		winNum = mvAhbToMbusWinTargetGet(target);
+		if (winNum >= MAX_AHB_TO_MBUS_WINS)
+		{
+			return MV_NO_SUCH;
+
+		}
+
+		if (mvAhbToMbusWinGet(winNum , &decWin) != MV_OK)
+		{
+			mvOsPrintf("%s: mvAhbToMbusWinGet Failed at winNum = %d\n",
+					   __FUNCTION__, winNum);
+			return MV_ERROR;
+
+		}
+
+		/* copy relevant data to MV_CPU_DEC_WIN structure */
+		pAddrDecWin->addrWin.baseLow = decWin.addrWin.baseLow;
+		pAddrDecWin->addrWin.baseHigh = decWin.addrWin.baseHigh;
+		pAddrDecWin->addrWin.size = decWin.addrWin.size;
+		pAddrDecWin->enable = decWin.enable;
+		pAddrDecWin->winNum = winNum;
+
+	}
+
+
+
+
+	return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvCpuIfTargetWinEnable - Enable/disable a CPU address decode window
+*
+* DESCRIPTION:
+*       This function enable/disable a CPU address decode window.
+*       if parameter 'enable' == MV_TRUE the routine will enable the
+*       window, thus enabling CPU accesses (before enabling the window it is
+*       tested for overlapping). Otherwise, the window will be disabled.
+*
+* INPUT:
+*       target - Peripheral target enumerator.
+*       enable - Enable/disable parameter.
+*
+* OUTPUT:
+*       N/A
+*
+* RETURN:
+*       MV_ERROR if protection window number was wrong, or the window
+*       overlapps other target window.
+*
+*******************************************************************************/
+MV_STATUS mvCpuIfTargetWinEnable(MV_TARGET target,MV_BOOL enable)
+{
+	MV_U32 winNum, temp;
+	MV_CPU_DEC_WIN addrDecWin;
+
+	target = MV_CHANGE_BOOT_CS(target);
+
+	/* Check parameters */
+	if (target >= MAX_TARGETS)
+	{
+		mvOsPrintf("mvCpuIfTargetWinEnable: target %d is Illigal\n", target);
+		return MV_ERROR;
+	}
+
+	/* get the window and check if it exist */
+	temp = mvCpuIfTargetWinGet(target, &addrDecWin);
+	if (MV_NO_SUCH == temp)
+	{
+		return (enable? MV_ERROR: MV_OK);
+	}
+	else if( MV_OK != temp)
+	{
+		mvOsPrintf("%s: ERR. Getting target %d failed.\n",__FUNCTION__, target);
+		return MV_ERROR;
+	}
+
+
+	/* check overlap */
+
+	if (MV_TRUE == enable)
+	{
+		if (MV_TRUE == cpuTargetWinOverlap(target, &addrDecWin.addrWin))
+		{
+			DB(mvOsPrintf("%s: ERR. Target %d overlap\n",__FUNCTION__, target));
+			return MV_ERROR;
+		}
+
+	}
+
+
+	if (MV_TARGET_IS_DRAM(target))
+	{
+		if (mvDramIfWinEnable(target , enable) != MV_OK)
+		{
+			mvOsPrintf("mvCpuIfTargetWinGet: mvDramIfWinEnable Failed at \n");
+			return MV_ERROR;
+
+		}
+
+	}
+	else
+	{
+		/* get the Window number associated with this target */
+
+		winNum = mvAhbToMbusWinTargetGet(target);
+
+		if (winNum >= MAX_AHB_TO_MBUS_WINS)
+		{
+			return (enable? MV_ERROR: MV_OK);
+		}
+
+		if (mvAhbToMbusWinEnable(winNum , enable) != MV_OK)
+		{
+			mvOsPrintf("mvCpuIfTargetWinGet: Failed to enable window = %d\n",
+					   winNum);
+			return MV_ERROR;
+
+		}
+
+	}
+
+	return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvCpuIfTargetWinSizeGet - Get CPU target address window size
+*
+* DESCRIPTION:
+*		Get the size of CPU-to-peripheral target window.
+*
+* INPUT:
+*       target - Peripheral target enumerator
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       32bit size. Function also returns '0' if window is closed.
+*		Function returns 0xFFFFFFFF in case of an error.
+*
+*******************************************************************************/
+MV_U32    mvCpuIfTargetWinSizeGet(MV_TARGET target)
+{
+	MV_CPU_DEC_WIN addrDecWin;
+
+	target = MV_CHANGE_BOOT_CS(target);
+
+	/* Check parameters */
+	if (target >= MAX_TARGETS)
+	{
+		mvOsPrintf("mvCpuIfTargetWinSizeGet: target %d is Illigal\n", target);
+		return 0;
+	}
+
+    /* Get the winNum window */
+	if (MV_OK != mvCpuIfTargetWinGet(target, &addrDecWin))
+	{
+		mvOsPrintf("mvCpuIfTargetWinSizeGet:ERR. Getting target %d failed.\n",
+                                                                        target);
+		return 0;
+	}
+
+	/* Check if window is enabled   */
+	if (addrDecWin.enable == MV_TRUE)
+    {
+		return (addrDecWin.addrWin.size);
+    }
+    else
+    {
+        return 0;		/* Window disabled. return 0 */
+    }
+}
+
+/*******************************************************************************
+* mvCpuIfTargetWinBaseLowGet - Get CPU target address window base low
+*
+* DESCRIPTION:
+*       CPU-to-peripheral target address window base is constructed of
+*       two parts: Low and high.
+*		This function gets the CPU peripheral target low base address.
+*
+* INPUT:
+*       target - Peripheral target enumerator
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       32bit low base address.
+*
+*******************************************************************************/
+MV_U32   mvCpuIfTargetWinBaseLowGet(MV_TARGET target)
+{
+	MV_CPU_DEC_WIN addrDecWin;
+
+	target = MV_CHANGE_BOOT_CS(target);
+
+	/* Check parameters */
+	if (target >= MAX_TARGETS)
+	{
+		mvOsPrintf("mvCpuIfTargetWinBaseLowGet: target %d is Illigal\n", target);
+		return 0xffffffff;
+	}
+
+    /* Get the target window */
+	if (MV_OK != mvCpuIfTargetWinGet(target, &addrDecWin))
+	{
+		mvOsPrintf("mvCpuIfTargetWinBaseLowGet:ERR. Getting target %d failed.\n",
+                                                                        target);
+		return 0xffffffff;
+	}
+
+	if (MV_FALSE == addrDecWin.enable)
+	{
+		return 0xffffffff;
+	}
+	return (addrDecWin.addrWin.baseLow);
+}
+
+/*******************************************************************************
+* mvCpuIfTargetWinBaseHighGet - Get CPU target address window base high
+*
+* DESCRIPTION:
+*       CPU-to-peripheral target address window base is constructed of
+*       two parts: Low and high.
+*		This function gets the CPU peripheral target high base address.
+*
+* INPUT:
+*       target - Peripheral target enumerator
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       32bit high base address.
+*
+*******************************************************************************/
+MV_U32    mvCpuIfTargetWinBaseHighGet(MV_TARGET target)
+{
+	MV_CPU_DEC_WIN addrDecWin;
+
+	target = MV_CHANGE_BOOT_CS(target);
+
+	/* Check parameters */
+	if (target >= MAX_TARGETS)
+	{
+		mvOsPrintf("mvCpuIfTargetWinBaseLowGet: target %d is Illigal\n", target);
+		return 0xffffffff;
+	}
+
+    /* Get the target window */
+	if (MV_OK != mvCpuIfTargetWinGet(target, &addrDecWin))
+	{
+		mvOsPrintf("mvCpuIfTargetWinBaseHighGet:ERR. Getting target %d failed.\n",
+                                                                        target);
+		return 0xffffffff;
+	}
+
+	if (MV_FALSE == addrDecWin.enable)
+	{
+		return 0;
+	}
+
+	return (addrDecWin.addrWin.baseHigh);
+}
+
+#if defined(MV_INCLUDE_PEX)
+/*******************************************************************************
+* mvCpuIfPexRemap - Set CPU remap register for address windows.
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       pexTarget   - Peripheral target enumerator. Must be a PEX target.
+*       pAddrDecWin - CPU target window information data structure.
+*                     Note that caller has to fill in the base field only. The
+*                     size field is ignored.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_ERROR if target is not a PEX one, MV_OK otherwise.
+*
+*******************************************************************************/
+MV_U32 mvCpuIfPexRemap(MV_TARGET pexTarget, MV_ADDR_WIN *pAddrDecWin)
+{
+	MV_U32 winNum;
+
+	/* Check parameters */
+
+	if (mvCtrlPexMaxIfGet() > 1)
+	{
+		if ((!MV_TARGET_IS_PEX1(pexTarget))&&(!MV_TARGET_IS_PEX0(pexTarget)))
+		{
+			mvOsPrintf("mvCpuIfPexRemap: target %d is Illigal\n",pexTarget);
+			return 0xffffffff;
+		}
+
+	}
+	else
+	{
+		if (!MV_TARGET_IS_PEX0(pexTarget))
+		{
+			mvOsPrintf("mvCpuIfPexRemap: target %d is Illigal\n",pexTarget);
+			return 0xffffffff;
+		}
+
+	}
+
+	/* get the Window number associated with this target */
+	winNum = mvAhbToMbusWinTargetGet(pexTarget);
+
+	if (winNum >= MAX_AHB_TO_MBUS_WINS)
+	{
+		mvOsPrintf("mvCpuIfPexRemap: mvAhbToMbusWinTargetGet Failed\n");
+		return 0xffffffff;
+
+	}
+
+	return mvAhbToMbusWinRemap(winNum , pAddrDecWin);
+}
+
+#endif
+
+#if defined(MV_INCLUDE_PCI)
+/*******************************************************************************
+* mvCpuIfPciRemap - Set CPU remap register for address windows.
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       pciTarget   - Peripheral target enumerator. Must be a PCI target.
+*       pAddrDecWin - CPU target window information data structure.
+*                     Note that caller has to fill in the base field only. The
+*                     size field is ignored.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_ERROR if target is not a PCI one, MV_OK otherwise.
+*
+*******************************************************************************/
+MV_U32 mvCpuIfPciRemap(MV_TARGET pciTarget, MV_ADDR_WIN *pAddrDecWin)
+{
+	MV_U32 winNum;
+
+	/* Check parameters */
+	if (!MV_TARGET_IS_PCI(pciTarget))
+	{
+		mvOsPrintf("mvCpuIfPciRemap: target %d is Illigal\n",pciTarget);
+		return 0xffffffff;
+	}
+
+	/* get the Window number associated with this target */
+	winNum = mvAhbToMbusWinTargetGet(pciTarget);
+
+	if (winNum >= MAX_AHB_TO_MBUS_WINS)
+	{
+		mvOsPrintf("mvCpuIfPciRemap: mvAhbToMbusWinTargetGet Failed\n");
+		return 0xffffffff;
+
+	}
+
+	return mvAhbToMbusWinRemap(winNum , pAddrDecWin);
+}
+#endif /* MV_INCLUDE_PCI */
+
+
+/*******************************************************************************
+* mvCpuIfPciIfRemap - Set CPU remap register for address windows.
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       pciTarget   - Peripheral target enumerator. Must be a PCI target.
+*       pAddrDecWin - CPU target window information data structure.
+*                     Note that caller has to fill in the base field only. The
+*                     size field is ignored.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_ERROR if target is not a PCI one, MV_OK otherwise.
+*
+*******************************************************************************/
+MV_U32 mvCpuIfPciIfRemap(MV_TARGET pciIfTarget, MV_ADDR_WIN *pAddrDecWin)
+{
+#if defined(MV_INCLUDE_PEX)
+	if (MV_TARGET_IS_PEX(pciIfTarget))
+	{
+		return mvCpuIfPexRemap(pciIfTarget,pAddrDecWin);
+	}
+#endif
+#if defined(MV_INCLUDE_PCI)
+
+	if (MV_TARGET_IS_PCI(pciIfTarget))
+	{
+		return mvCpuIfPciRemap(pciIfTarget,pAddrDecWin);
+	}
+#endif
+	return 0;
+}
+
+
+
+/*******************************************************************************
+* mvCpuIfTargetOfBaseAddressGet - Get the target according to base address
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       baseAddress -  base address to be checked
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       the target number that baseAddress belongs to or MAX_TARGETS is not
+*       found
+*
+*******************************************************************************/
+
+MV_TARGET mvCpuIfTargetOfBaseAddressGet(MV_U32 baseAddress)
+{
+	MV_CPU_DEC_WIN win;
+	MV_U32 target;
+
+	for( target = 0; target < MAX_TARGETS; target++ )
+	{
+		if( mvCpuIfTargetWinGet( target, &win ) == MV_OK )
+		{
+			if( win.enable )
+			{
+				if ((baseAddress >= win.addrWin.baseLow) &&
+					(baseAddress < win.addrWin.baseLow + win.addrWin.size)) break;
+            }
+		}
+		else return MAX_TARGETS;
+
+	}
+
+	return target;
+}
+/*******************************************************************************
+* cpuTargetWinOverlap - Detect CPU address decode windows overlapping
+*
+* DESCRIPTION:
+*       An unpredicted behaviur is expected in case CPU address decode
+*       windows overlapps.
+*       This function detects CPU address decode windows overlapping of a
+*       specified target. The function does not check the target itself for
+*       overlapping. The function also skipps disabled address decode windows.
+*
+* INPUT:
+*       target      - Peripheral target enumerator.
+*       pAddrDecWin - An address decode window struct.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE if the given address window overlaps current address
+*       decode map, MV_FALSE otherwise.
+*
+*******************************************************************************/
+static MV_BOOL cpuTargetWinOverlap(MV_TARGET target, MV_ADDR_WIN *pAddrWin)
+{
+    MV_U32 			targetNum;
+    MV_CPU_DEC_WIN 	addrDecWin;
+	MV_STATUS		status;
+
+
+	for(targetNum = 0; targetNum < MAX_TARGETS; targetNum++)
+    {
+#if defined(MV_RUN_FROM_FLASH)
+		if(MV_TARGET_IS_AS_BOOT(target))
+		{
+			if (MV_CHANGE_BOOT_CS(targetNum) == target)
+				continue;
+		}
+#endif /* MV_RUN_FROM_FLASH */
+
+		/* don't check our target or illegal targets */
+        if (targetNum == target)
+        {
+            continue;
+        }
+
+		/* Get window parameters 	*/
+		status = mvCpuIfTargetWinGet(targetNum, &addrDecWin);
+        if(MV_NO_SUCH == status)
+        {
+            continue;
+        }
+		if(MV_OK != status)
+		{
+			DB(mvOsPrintf("cpuTargetWinOverlap: ERR. TargetWinGet failed\n"));
+            return MV_TRUE;
+		}
+
+		/* Do not check disabled windows	*/
+		if (MV_FALSE == addrDecWin.enable)
+		{
+			continue;
+		}
+
+        if(MV_TRUE == ctrlWinOverlapTest(pAddrWin, &addrDecWin.addrWin))
+		{
+			DB(mvOsPrintf(
+			"cpuTargetWinOverlap: Required target %d overlap current %d\n",
+								target, targetNum));
+			return MV_TRUE;
+		}
+    }
+
+	return MV_FALSE;
+
+}
+
+/*******************************************************************************
+* mvCpuIfAddDecShow - Print the CPU address decode map.
+*
+* DESCRIPTION:
+*		This function print the CPU address decode map.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_VOID mvCpuIfAddDecShow(MV_VOID)
+{
+	MV_CPU_DEC_WIN win;
+	MV_U32 target;
+	mvOsOutput( "\n" );
+	mvOsOutput( "CPU Interface\n" );
+	mvOsOutput( "-------------\n" );
+
+	for( target = 0; target < MAX_TARGETS; target++ )
+	{
+
+		memset( &win, 0, sizeof(MV_CPU_DEC_WIN) );
+
+		mvOsOutput( "%s ",mvCtrlTargetNameGet(target));
+		mvOsOutput( "...." );
+
+		if( mvCpuIfTargetWinGet( target, &win ) == MV_OK )
+		{
+			if( win.enable )
+			{
+				mvOsOutput( "base %08x, ", win.addrWin.baseLow );
+				mvSizePrint( win.addrWin.size );
+				mvOsOutput( "\n" );
+
+            }
+			else
+				mvOsOutput( "disable\n" );
+		}
+		else if( mvCpuIfTargetWinGet( target, &win ) == MV_NO_SUCH )
+		{
+				mvOsOutput( "no such\n" );
+		}
+	}
+}
+
+/*******************************************************************************
+* mvCpuIfEnablePex - Enable PCI Express.
+*
+* DESCRIPTION:
+*		This function Enable PCI Express.
+*
+* INPUT:
+*       pexIf   -  PEX interface number.
+*       pexType -  MV_PEX_ROOT_COMPLEX - root complex device
+*		   MV_PEX_END_POINT - end point device
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+#if defined(MV_INCLUDE_PEX)
+MV_VOID mvCpuIfEnablePex(MV_U32 pexIf, MV_PEX_TYPE pexType)
+{
+	/* Set pex mode incase S@R not exist */
+	if( pexType == MV_PEX_END_POINT)
+	{
+		MV_REG_BIT_RESET(PEX_CTRL_REG(pexIf),PXCR_DEV_TYPE_CTRL_MASK);
+		/* Change pex mode in capability reg */
+		MV_REG_BIT_RESET(PEX_CFG_DIRECT_ACCESS(pexIf,PEX_CAPABILITY_REG), BIT22);
+		MV_REG_BIT_SET(PEX_CFG_DIRECT_ACCESS(pexIf,PEX_CAPABILITY_REG), BIT20);
+
+	}
+	else
+	{	
+		MV_REG_BIT_SET(PEX_CTRL_REG(pexIf),PXCR_DEV_TYPE_CTRL_MASK);
+	}
+
+	/* CPU config register Pex enable */
+	MV_REG_BIT_RESET(CPU_CTRL_STAT_REG,CCSR_PCI_ACCESS_MASK);
+}
+#endif
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysAudio.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysAudio.h
@@ -0,0 +1,123 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+#ifndef __INCMVSysAudioH
+#define __INCMVSysAudioH
+
+#include "mvCommon.h"
+#include "audio/mvAudio.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "ctrlEnv/sys/mvCpuIf.h"
+
+/***********************************/
+/* Audio Address Decoding registers*/
+/***********************************/
+
+#define MV_AUDIO_MAX_ADDR_DECODE_WIN 		2
+#define MV_AUDIO_RECORD_WIN_NUM			0
+#define MV_AUDIO_PLAYBACK_WIN_NUM		1
+
+#define MV_AUDIO_WIN_CTRL_REG(unit, win)	(AUDIO_REG_BASE(unit) + 0xA04 + ((win)<<3))
+#define MV_AUDIO_WIN_BASE_REG(unit, win)	(AUDIO_REG_BASE(unit) + 0xA00 + ((win)<<3))
+
+#define MV_AUDIO_RECORD_WIN_CTRL_REG(unit)	MV_AUDIO_WIN_CTRL_REG(unit, MV_AUDIO_RECORD_WIN_NUM)
+#define MV_AUDIO_RECORD_WIN_BASE_REG(unit)	MV_AUDIO_WIN_BASE_REG(unit, MV_AUDIO_RECORD_WIN_NUM)
+#define MV_AUDIO_PLAYBACK_WIN_CTRL_REG(unit)	MV_AUDIO_WIN_CTRL_REG(unit, MV_AUDIO_PLAYBACK_WIN_NUM)
+#define MV_AUDIO_PLAYBACK_WIN_BASE_REG(unit)	MV_AUDIO_WIN_BASE_REG(unit, MV_AUDIO_PLAYBACK_WIN_NUM)
+
+
+/* BITs in Windows 0-3 Control and Base Registers */
+#define MV_AUDIO_WIN_ENABLE_BIT               0
+#define MV_AUDIO_WIN_ENABLE_MASK              (1<<MV_AUDIO_WIN_ENABLE_BIT)
+
+#define MV_AUDIO_WIN_TARGET_OFFSET            4
+#define MV_AUDIO_WIN_TARGET_MASK              (0xF<<MV_AUDIO_WIN_TARGET_OFFSET)
+
+#define MV_AUDIO_WIN_ATTR_OFFSET              8
+#define MV_AUDIO_WIN_ATTR_MASK                (0xFF<<MV_AUDIO_WIN_ATTR_OFFSET)
+
+#define MV_AUDIO_WIN_SIZE_OFFSET              16
+#define MV_AUDIO_WIN_SIZE_MASK                (0xFFFF<<MV_AUDIO_WIN_SIZE_OFFSET)
+
+#define MV_AUDIO_WIN_BASE_OFFSET              16
+#define MV_AUDIO_WIN_BASE_MASK                (0xFFFF<<MV_AUDIO_WIN_BASE_OFFSET)
+
+
+typedef struct _mvAudioDecWin
+{
+    MV_TARGET     target;
+    MV_ADDR_WIN   addrWin;    /* An address window*/
+    MV_BOOL       enable;     /* Address decode window is enabled/disabled    */
+ 
+} MV_AUDIO_DEC_WIN;
+
+
+MV_STATUS mvAudioInit(MV_U8 unit);
+MV_STATUS mvAudioWinGet(int unit, MV_U32 winNum, MV_AUDIO_DEC_WIN *pAddrDecWin);
+MV_STATUS mvAudioWinSet(int unit, MV_U32 winNum, MV_AUDIO_DEC_WIN *pAddrDecWin);
+MV_STATUS mvAudioWinInit(int unit);
+MV_VOID   mvAudioAddrDecShow(MV_VOID);
+
+
+#endif
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysUsb.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysUsb.c
@@ -0,0 +1,497 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+        this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "ctrlEnv/sys/mvSysUsb.h"
+
+MV_TARGET usbAddrDecPrioTab[] =
+{
+#if defined(MV_INCLUDE_SDRAM_CS0)
+    SDRAM_CS0,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS1)
+    SDRAM_CS1,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS2)
+    SDRAM_CS2,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS3)
+    SDRAM_CS3,
+#endif
+#if defined(MV_INCLUDE_CESA) && defined(USB_UNDERRUN_WA)
+    CRYPT_ENG,
+#endif
+#if defined(MV_INCLUDE_PEX)
+    PEX0_MEM,
+#endif
+    TBL_TERM
+};
+
+
+
+MV_STATUS   mvUsbInit(int dev, MV_BOOL isHost)
+{
+    MV_STATUS       status;
+
+    status = mvUsbWinInit(dev);
+    if(status != MV_OK)
+        return status;
+
+    return mvUsbHalInit(dev, isHost);
+}
+
+
+/*******************************************************************************
+* usbWinOverlapDetect - Detect USB address windows overlapping
+*
+* DESCRIPTION:
+*       An unpredicted behaviur is expected in case USB address decode
+*       windows overlapps.
+*       This function detects USB address decode windows overlapping of a
+*       specified window. The function does not check the window itself for
+*       overlapping. The function also skipps disabled address decode windows.
+*
+* INPUT:
+*       winNum      - address decode window number.
+*       pAddrDecWin - An address decode window struct.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE if the given address window overlap current address
+*       decode map, MV_FALSE otherwise, MV_ERROR if reading invalid data
+*       from registers.
+*
+*******************************************************************************/
+static MV_STATUS usbWinOverlapDetect(int dev, MV_U32 winNum,
+                                     MV_ADDR_WIN *pAddrWin)
+{
+    MV_U32          winNumIndex;
+    MV_DEC_WIN      addrDecWin;
+
+    for(winNumIndex=0; winNumIndex<MV_USB_MAX_ADDR_DECODE_WIN; winNumIndex++)
+    {
+        /* Do not check window itself       */
+        if (winNumIndex == winNum)
+        {
+            continue;
+        }
+
+        /* Get window parameters    */
+        if (MV_OK != mvUsbWinGet(dev, winNumIndex, &addrDecWin))
+        {
+            mvOsPrintf("%s: ERR. TargetWinGet failed\n", __FUNCTION__);
+            return MV_ERROR;
+        }
+
+        /* Do not check disabled windows    */
+        if(addrDecWin.enable == MV_FALSE)
+        {
+            continue;
+        }
+
+        if (MV_TRUE == ctrlWinOverlapTest(pAddrWin, &(addrDecWin.addrWin)))
+        {
+            return MV_TRUE;
+        }
+    }
+    return MV_FALSE;
+}
+
+/*******************************************************************************
+* mvUsbWinSet - Set USB target address window
+*
+* DESCRIPTION:
+*       This function sets a peripheral target (e.g. SDRAM bank0, PCI_MEM0)
+*       address window, also known as address decode window.
+*       After setting this target window, the USB will be able to access the
+*       target within the address window.
+*
+* INPUT:
+*       winNum      - USB target address decode window number.
+*       pAddrDecWin - USB target window data structure.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_ERROR if address window overlapps with other address decode windows.
+*       MV_BAD_PARAM if base address is invalid parameter or target is
+*       unknown.
+*
+*******************************************************************************/
+MV_STATUS mvUsbWinSet(int dev, MV_U32 winNum, MV_DEC_WIN *pDecWin)
+{
+    MV_DEC_WIN_PARAMS   winParams;
+    MV_U32              sizeReg, baseReg;
+
+    /* Parameter checking   */
+    if (winNum >= MV_USB_MAX_ADDR_DECODE_WIN)
+    {
+        mvOsPrintf("%s: ERR. Invalid win num %d\n",__FUNCTION__, winNum);
+        return MV_BAD_PARAM;
+    }
+
+    /* Check if the requested window overlapps with current windows         */
+    if (MV_TRUE == usbWinOverlapDetect(dev, winNum, &pDecWin->addrWin))
+    {
+        mvOsPrintf("%s: ERR. Window %d overlap\n", __FUNCTION__, winNum);
+        return MV_ERROR;
+    }
+
+    /* check if address is aligned to the size */
+    if(MV_IS_NOT_ALIGN(pDecWin->addrWin.baseLow, pDecWin->addrWin.size))
+    {
+        mvOsPrintf("mvUsbWinSet:Error setting USB window %d to "\
+                   "target %s.\nAddress 0x%08x is unaligned to size 0x%x.\n",
+                   winNum,
+                   mvCtrlTargetNameGet(pDecWin->target),
+                   pDecWin->addrWin.baseLow,
+                   pDecWin->addrWin.size);
+        return MV_ERROR;
+    }
+
+    if(MV_OK != mvCtrlAddrDecToParams(pDecWin, &winParams))
+    {
+        mvOsPrintf("%s: mvCtrlAddrDecToParams Failed\n", __FUNCTION__);
+        return MV_ERROR;
+    }
+
+    /* set Size, Attributes and TargetID */
+    sizeReg = (((winParams.targetId << MV_USB_WIN_TARGET_OFFSET) & MV_USB_WIN_TARGET_MASK) |
+               ((winParams.attrib   << MV_USB_WIN_ATTR_OFFSET)   & MV_USB_WIN_ATTR_MASK)   |
+               ((winParams.size << MV_USB_WIN_SIZE_OFFSET) & MV_USB_WIN_SIZE_MASK));
+
+#if defined(MV645xx) || defined(MV646xx)
+    /* If window is DRAM with HW cache coherency, make sure bit2 is set */
+    sizeReg &= ~MV_USB_WIN_BURST_WR_LIMIT_MASK;
+
+    if((MV_TARGET_IS_DRAM(pDecWin->target)) &&
+       (pDecWin->addrWinAttr.cachePolicy != NO_COHERENCY))
+    {
+        sizeReg |= MV_USB_WIN_BURST_WR_32BIT_LIMIT;
+    }
+    else
+    {
+        sizeReg |= MV_USB_WIN_BURST_WR_NO_LIMIT;
+    }
+#endif /* MV645xx || MV646xx */
+
+    if (pDecWin->enable == MV_TRUE)
+    {
+        sizeReg |= MV_USB_WIN_ENABLE_MASK;
+    }
+    else
+    {
+        sizeReg &= ~MV_USB_WIN_ENABLE_MASK;
+    }
+
+    /* Update Base value  */
+    baseReg = (winParams.baseAddr & MV_USB_WIN_BASE_MASK);
+
+    MV_REG_WRITE( MV_USB_WIN_CTRL_REG(dev, winNum), sizeReg);
+    MV_REG_WRITE( MV_USB_WIN_BASE_REG(dev, winNum), baseReg);
+
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvUsbWinGet - Get USB peripheral target address window.
+*
+* DESCRIPTION:
+*       Get USB peripheral target address window.
+*
+* INPUT:
+*       winNum - USB target address decode window number.
+*
+* OUTPUT:
+*       pDecWin - USB target window data structure.
+*
+* RETURN:
+*       MV_ERROR if register parameters are invalid.
+*
+*******************************************************************************/
+MV_STATUS mvUsbWinGet(int dev, MV_U32 winNum, MV_DEC_WIN *pDecWin)
+{
+    MV_DEC_WIN_PARAMS   winParam;
+    MV_U32              sizeReg, baseReg;
+
+    /* Parameter checking   */
+    if (winNum >= MV_USB_MAX_ADDR_DECODE_WIN)
+    {
+        mvOsPrintf("%s (dev=%d): ERR. Invalid winNum %d\n",
+                    __FUNCTION__, dev, winNum);
+        return MV_NOT_SUPPORTED;
+    }
+
+    baseReg = MV_REG_READ( MV_USB_WIN_BASE_REG(dev, winNum) );
+    sizeReg = MV_REG_READ( MV_USB_WIN_CTRL_REG(dev, winNum) );
+
+   /* Check if window is enabled   */
+    if(sizeReg & MV_USB_WIN_ENABLE_MASK)
+    {
+        pDecWin->enable = MV_TRUE;
+
+        /* Extract window parameters from registers */
+        winParam.targetId = (sizeReg & MV_USB_WIN_TARGET_MASK) >> MV_USB_WIN_TARGET_OFFSET;
+        winParam.attrib   = (sizeReg & MV_USB_WIN_ATTR_MASK) >> MV_USB_WIN_ATTR_OFFSET;
+        winParam.size     = (sizeReg & MV_USB_WIN_SIZE_MASK) >> MV_USB_WIN_SIZE_OFFSET;
+        winParam.baseAddr = (baseReg & MV_USB_WIN_BASE_MASK);
+
+        /* Translate the decode window parameters to address decode struct */
+        if (MV_OK != mvCtrlParamsToAddrDec(&winParam, pDecWin))
+        {
+            mvOsPrintf("Failed to translate register parameters to USB address" \
+                       " decode window structure\n");
+            return MV_ERROR;
+        }
+    }
+    else
+    {
+        pDecWin->enable = MV_FALSE;
+    }
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvUsbWinInit -
+*
+* INPUT:
+*
+* OUTPUT:
+*
+* RETURN:
+*       MV_ERROR if register parameters are invalid.
+*
+*******************************************************************************/
+MV_STATUS   mvUsbWinInit(int dev)
+{
+    MV_STATUS       status;
+    MV_DEC_WIN      usbWin;
+    MV_CPU_DEC_WIN  cpuAddrDecWin;
+    int             winNum;
+    MV_U32          winPrioIndex = 0;
+
+    /* First disable all address decode windows */
+    for(winNum = 0; winNum < MV_USB_MAX_ADDR_DECODE_WIN; winNum++)
+    {
+        MV_REG_BIT_RESET(MV_USB_WIN_CTRL_REG(dev, winNum), MV_USB_WIN_ENABLE_MASK);
+    }
+
+    /* Go through all windows in user table until table terminator          */
+    winNum = 0;
+    while( (usbAddrDecPrioTab[winPrioIndex] != TBL_TERM) &&
+           (winNum < MV_USB_MAX_ADDR_DECODE_WIN) )
+    {
+        /* first get attributes from CPU If */
+        status = mvCpuIfTargetWinGet(usbAddrDecPrioTab[winPrioIndex],
+                                     &cpuAddrDecWin);
+
+        if(MV_NO_SUCH == status)
+        {
+            winPrioIndex++;
+            continue;
+        }
+        if (MV_OK != status)
+        {
+            mvOsPrintf("%s: ERR. mvCpuIfTargetWinGet failed\n", __FUNCTION__);
+            return MV_ERROR;
+        }
+
+        if (cpuAddrDecWin.enable == MV_TRUE)
+        {
+            usbWin.addrWin.baseHigh = cpuAddrDecWin.addrWin.baseHigh;
+            usbWin.addrWin.baseLow  = cpuAddrDecWin.addrWin.baseLow;
+            usbWin.addrWin.size     = cpuAddrDecWin.addrWin.size;
+            usbWin.enable           = MV_TRUE;
+            usbWin.target           = usbAddrDecPrioTab[winPrioIndex];
+
+#if defined(MV645xx) || defined(MV646xx)
+            /* Get the default attributes for that target window */
+            mvCtrlDefAttribGet(usbWin.target, &usbWin.addrWinAttr);
+#endif /* MV645xx || MV646xx */
+
+            if(MV_OK != mvUsbWinSet(dev, winNum, &usbWin))
+            {
+                return MV_ERROR;
+            }
+            winNum++;
+        }
+        winPrioIndex++;
+    }
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvUsbAddrDecShow - Print the USB address decode map.
+*
+* DESCRIPTION:
+*       This function print the USB address decode map.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_VOID mvUsbAddrDecShow(MV_VOID)
+{
+    MV_DEC_WIN  addrDecWin;
+    int         i, winNum;
+
+    mvOsOutput( "\n" );
+    mvOsOutput( "USB:\n" );
+    mvOsOutput( "----\n" );
+
+    for(i=0; i<mvCtrlUsbMaxGet(); i++)
+    {
+        mvOsOutput( "Device %d:\n", i);
+
+        for(winNum = 0; winNum < MV_USB_MAX_ADDR_DECODE_WIN; winNum++)
+        {
+            memset(&addrDecWin, 0, sizeof(MV_DEC_WIN) );
+
+            mvOsOutput( "win%d - ", winNum );
+
+            if( mvUsbWinGet(i, winNum, &addrDecWin ) == MV_OK )
+            {
+                if( addrDecWin.enable )
+                {
+                    mvOsOutput( "%s base %08x, ",
+                        mvCtrlTargetNameGet(addrDecWin.target), addrDecWin.addrWin.baseLow );
+
+                    mvSizePrint( addrDecWin.addrWin.size );
+
+#if defined(MV645xx) || defined(MV646xx)
+                    switch( addrDecWin.addrWinAttr.swapType)
+                    {
+                        case MV_BYTE_SWAP:
+                            mvOsOutput( "BYTE_SWAP, " );
+                            break;
+                        case MV_NO_SWAP:
+                            mvOsOutput( "NO_SWAP  , " );
+                            break;
+                        case MV_BYTE_WORD_SWAP:
+                            mvOsOutput( "BYTE_WORD_SWAP, " );
+                            break;
+                        case MV_WORD_SWAP:
+                            mvOsOutput( "WORD_SWAP, " );
+                            break;
+                        default:
+                            mvOsOutput( "SWAP N/A , " );
+                    }
+
+                    switch( addrDecWin.addrWinAttr.cachePolicy )
+                    {
+                        case NO_COHERENCY:
+                            mvOsOutput( "NO_COHERENCY , " );
+                            break;
+                        case WT_COHERENCY:
+                            mvOsOutput( "WT_COHERENCY , " );
+                            break;
+                        case WB_COHERENCY:
+                            mvOsOutput( "WB_COHERENCY , " );
+                            break;
+                        default:
+                            mvOsOutput( "COHERENCY N/A, " );
+                    }
+
+                    switch( addrDecWin.addrWinAttr.pcixNoSnoop )
+                    {
+                        case 0:
+                            mvOsOutput( "PCI-X NS inactive, " );
+                            break;
+                        case 1:
+                            mvOsOutput( "PCI-X NS active  , " );
+                            break;
+                        default:
+                            mvOsOutput( "PCI-X NS N/A     , " );
+                    }
+
+                    switch( addrDecWin.addrWinAttr.p2pReq64 )
+                    {
+                        case 0:
+                            mvOsOutput( "REQ64 force" );
+                            break;
+                        case 1:
+                            mvOsOutput( "REQ64 detect" );
+                            break;
+                        default:
+                            mvOsOutput( "REQ64 N/A" );
+                    }
+#endif /* MV645xx || MV646xx */
+                    mvOsOutput( "\n" );
+                }
+                else
+                    mvOsOutput( "disable\n" );
+            }
+        }
+    }
+}
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvCpuIf.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvCpuIf.h
@@ -0,0 +1,120 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#ifndef __INCmvCpuIfh
+#define __INCmvCpuIfh
+
+/* includes */
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "ctrlEnv/sys/mvCpuIfRegs.h"
+#include "ctrlEnv/sys/mvAhbToMbus.h"
+#include "ddrmc/mvDramIf.h"
+#include "ctrlEnv/sys/mvSysDram.h"
+#if defined(MV_INCLUDE_PEX)
+#include "pex/mvPex.h"
+#endif
+
+/* defines  */
+
+/* typedefs */
+/* This structure describes CPU interface address decode window               */
+typedef struct _mvCpuIfDecWin 
+{
+	MV_ADDR_WIN   addrWin;    /* An address window*/
+	MV_U32		  winNum;	  /* Window Number in the AHB To Mbus bridge */
+	MV_BOOL       enable;     /* Address decode window is enabled/disabled    */
+
+}MV_CPU_DEC_WIN;
+
+
+
+/* mvCpuIfLib.h API list */
+
+/* mvCpuIfLib.h API list */
+
+MV_STATUS mvCpuIfInit(MV_CPU_DEC_WIN *cpuAddrWinMap);
+MV_STATUS mvCpuIfTargetWinSet(MV_TARGET target, MV_CPU_DEC_WIN *pAddrDecWin);
+MV_STATUS mvCpuIfTargetWinGet(MV_TARGET target, MV_CPU_DEC_WIN *pAddrDecWin);
+MV_STATUS mvCpuIfTargetWinEnable(MV_TARGET target,MV_BOOL enable);
+MV_U32    mvCpuIfTargetWinSizeGet(MV_TARGET target);
+MV_U32    mvCpuIfTargetWinBaseLowGet(MV_TARGET target);
+MV_U32    mvCpuIfTargetWinBaseHighGet(MV_TARGET target);
+MV_TARGET mvCpuIfTargetOfBaseAddressGet(MV_U32 baseAddress);
+#if defined(MV_INCLUDE_PEX)
+MV_U32    mvCpuIfPexRemap(MV_TARGET pexTarget, MV_ADDR_WIN *pAddrDecWin);
+MV_VOID   mvCpuIfEnablePex(MV_U32 pexIf, MV_PEX_TYPE pexType);
+#endif
+#if defined(MV_INCLUDE_PCI)
+MV_U32    mvCpuIfPciRemap(MV_TARGET pciTarget, MV_ADDR_WIN *pAddrDecWin);
+#endif                                               
+MV_U32 	  mvCpuIfPciIfRemap(MV_TARGET pciTarget, MV_ADDR_WIN *pAddrDecWin);
+
+MV_VOID   mvCpuIfAddDecShow(MV_VOID);
+
+#if defined(MV88F6281)
+MV_STATUS mvCpuIfBridgeReorderWAInit(void);
+#endif
+
+#endif /* __INCmvCpuIfh */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysTdm.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysTdm.c
@@ -0,0 +1,464 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "voiceband/tdm/mvTdm.h"
+#include "mvSysTdm.h"
+
+
+/* defines  */
+#ifdef MV_DEBUG
+	#define DB(x)	x
+#else
+	#define DB(x)
+#endif	
+
+static MV_TARGET tdmAddrDecPrioTap[] =
+{
+        PEX0_MEM,
+        SDRAM_CS0,
+        SDRAM_CS1,
+        SDRAM_CS2,
+        SDRAM_CS3,
+        DEVICE_CS0,
+        DEVICE_CS1,
+        DEVICE_CS2,
+        DEV_BOOCS,
+        PEX0_IO,
+        TBL_TERM
+};

+
+
+static MV_STATUS tdmWinOverlapDetect(MV_U32 winNum, MV_ADDR_WIN *pAddrWin);
+
+/*******************************************************************************
+* mvTdmWinInit - Initialize TDM address decode windows 
+*
+* DESCRIPTION:
+*               This function initialize TDM window decode unit. It set the 
+*               default address decode
+*               windows of the unit.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_ERROR if setting fail.
+*******************************************************************************/
+
+MV_STATUS mvTdmWinInit(void)
+{
+	MV_U32 		winNum;
+	MV_U32		winPrioIndex = 0;
+	MV_CPU_DEC_WIN cpuAddrDecWin;
+	MV_TDM_DEC_WIN tdmWin;
+	MV_STATUS status;
+
+	/*Disable all windows*/	
+	for (winNum = 0; winNum < TDM_MBUS_MAX_WIN; winNum++)
+	{
+		mvTdmWinEnable(winNum, MV_FALSE);
+	}
+
+	for (winNum = 0; ((tdmAddrDecPrioTap[winPrioIndex] != TBL_TERM) && 
+					  (winNum < TDM_MBUS_MAX_WIN)); )
+	{	
+		status = mvCpuIfTargetWinGet(tdmAddrDecPrioTap[winPrioIndex], 
+									 &cpuAddrDecWin);
+        if (MV_NO_SUCH == status)
+        {
+            winPrioIndex++;
+            continue;
+        }
+		if (MV_OK != status)
+		{
+			mvOsPrintf("mvTdmInit: ERR. mvCpuIfTargetWinGet failed\n");
+			return MV_ERROR;
+		}
+
+        if (cpuAddrDecWin.enable == MV_TRUE)
+		{
+			tdmWin.addrWin.baseHigh = cpuAddrDecWin.addrWin.baseHigh;
+			tdmWin.addrWin.baseLow = cpuAddrDecWin.addrWin.baseLow;
+			tdmWin.addrWin.size = cpuAddrDecWin.addrWin.size;
+			tdmWin.enable = MV_TRUE;
+		    tdmWin.target = tdmAddrDecPrioTap[winPrioIndex];
+		    if (MV_OK != mvTdmWinSet(winNum, &tdmWin))
+		    {
+			    return MV_ERROR;
+		    }
+		    winNum++;
+		}
+		winPrioIndex++;			
+    }
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvTdmWinSet - Set TDM target address window
+*
+* DESCRIPTION:
+*       This function sets a peripheral target (e.g. SDRAM bank0, PCI_MEM0)
+*       address window, also known as address decode window.
+*       After setting this target window, the TDM will be able to access the
+*       target within the address window.
+*
+* INPUT:
+*       winNum      - TDM to target address decode window number.
+*       pAddrDecWin - TDM target window data structure.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_ERROR if address window overlapps with other address decode windows.
+*       MV_BAD_PARAM if base address is invalid parameter or target is
+*       unknown.
+*
+*******************************************************************************/
+
+MV_STATUS mvTdmWinSet(MV_U32 winNum, MV_TDM_DEC_WIN *pAddrDecWin)
+{
+	MV_TARGET_ATTRIB targetAttribs;
+	MV_DEC_REGS decRegs;
+	MV_U32 ctrlReg = 0;
+
+    /* Parameter checking   */
+    if (winNum >= TDM_MBUS_MAX_WIN)
+    {
+		mvOsPrintf("mvTdmWinSet: ERR. Invalid win num %d\n",winNum);
+        return MV_BAD_PARAM;
+    }
+    
+    /* Check if the requested window overlapps with current windows         */
+    if (MV_TRUE == tdmWinOverlapDetect(winNum, &pAddrDecWin->addrWin))
+   	{
+       	mvOsPrintf("mvTdmWinSet: ERR. Window %d overlap\n", winNum);
+		return MV_ERROR;
+	}
+
+	/* check if address is aligned to the size */
+	if (MV_IS_NOT_ALIGN(pAddrDecWin->addrWin.baseLow, pAddrDecWin->addrWin.size))
+	{
+		mvOsPrintf("mvTdmWinSet: Error setting TDM window %d to "\
+				   "target %s.\nAddress 0x%08x is unaligned to size 0x%x.\n",
+				   winNum,
+				   mvCtrlTargetNameGet(pAddrDecWin->target), 
+				   pAddrDecWin->addrWin.baseLow,
+				   pAddrDecWin->addrWin.size);
+		return MV_ERROR;
+	}
+
+	decRegs.baseReg = MV_REG_READ(TDM_WIN_BASE_REG(winNum));
+	decRegs.sizeReg = (MV_REG_READ(TDM_WIN_CTRL_REG(winNum)) & TDM_WIN_SIZE_MASK) >>  TDM_WIN_SIZE_OFFS;
+
+	if (MV_OK != mvCtrlAddrDecToReg(&(pAddrDecWin->addrWin),&decRegs))
+	{
+			mvOsPrintf("mvTdmWinSet: mvCtrlAddrDecToReg Failed\n");
+			return MV_ERROR;
+	}
+	
+	mvCtrlAttribGet(pAddrDecWin->target, &targetAttribs);
+	
+	/* for the safe side we disable the window before writing the new
+	values */
+	mvTdmWinEnable(winNum, MV_FALSE);
+
+	ctrlReg |= (targetAttribs.attrib << TDM_WIN_ATTRIB_OFFS);
+	ctrlReg |= (targetAttribs.targetId << TDM_WIN_TARGET_OFFS);
+	ctrlReg |= (decRegs.sizeReg << TDM_WIN_SIZE_OFFS);
+
+	/* Write to address base and control registers  */
+	MV_REG_WRITE(TDM_WIN_BASE_REG(winNum), decRegs.baseReg);
+	MV_REG_WRITE(TDM_WIN_CTRL_REG(winNum), ctrlReg);  
+	/* Enable address decode target window  */
+	if (pAddrDecWin->enable == MV_TRUE)
+	{
+		mvTdmWinEnable(winNum, MV_TRUE);
+	}    
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvTdmWinGet - Get peripheral target address window.
+*
+* DESCRIPTION:
+*               Get TDM peripheral target address window.
+*
+* INPUT:
+*       winNum - TDM to target address decode window number.
+*
+* OUTPUT:
+*       pAddrDecWin - TDM target window data structure.
+*
+* RETURN:
+*       MV_ERROR if register parameters are invalid.
+*
+*******************************************************************************/
+
+MV_STATUS mvTdmWinGet(MV_U32 winNum, MV_TDM_DEC_WIN *pAddrDecWin)
+{
+
+	MV_DEC_REGS decRegs;
+	MV_TARGET_ATTRIB targetAttrib;
+
+	/* Parameter checking   */
+	if (winNum >= TDM_MBUS_MAX_WIN)
+	{
+		mvOsPrintf("mvTdmWinGet: ERR. Invalid winNum %d\n", winNum);
+		return MV_NOT_SUPPORTED;
+	}
+	
+	decRegs.baseReg =  MV_REG_READ(TDM_WIN_BASE_REG(winNum));                                                                           
+	decRegs.sizeReg = (MV_REG_READ(TDM_WIN_CTRL_REG(winNum)) & TDM_WIN_SIZE_MASK) >>  TDM_WIN_SIZE_OFFS;
+ 
+	if (MV_OK != mvCtrlRegToAddrDec(&decRegs,&(pAddrDecWin->addrWin)))
+	{
+		mvOsPrintf("mvTdmWinGet: mvCtrlRegToAddrDec Failed \n");
+		return MV_ERROR;
+	}
+	 
+	/* attrib and targetId */
+	targetAttrib.attrib = 
+		(MV_REG_READ(TDM_WIN_CTRL_REG(winNum)) & TDM_WIN_ATTRIB_MASK) >>  TDM_WIN_ATTRIB_OFFS;
+	targetAttrib.targetId = 
+		(MV_REG_READ(TDM_WIN_CTRL_REG(winNum)) & TDM_WIN_TARGET_MASK) >>  TDM_WIN_TARGET_OFFS;
+	 
+	pAddrDecWin->target = mvCtrlTargetGet(&targetAttrib);
+
+	/* Check if window is enabled   */
+	if (MV_REG_READ(TDM_WIN_CTRL_REG(winNum)) & TDM_WIN_ENABLE_MASK)
+	{
+		pAddrDecWin->enable = MV_TRUE;
+	}
+	else
+	{
+		pAddrDecWin->enable = MV_FALSE;
+	}
+	
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvTdmWinEnable - Enable/disable a TDM to target address window
+*
+* DESCRIPTION:
+*       This function enable/disable a TDM to target address window.
+*       According to parameter 'enable' the routine will enable the
+*       window, thus enabling TDM accesses (before enabling the window it is
+*       tested for overlapping). Otherwise, the window will be disabled.
+*
+* INPUT:
+*       winNum - TDM to target address decode window number.
+*       enable - Enable/disable parameter.
+*
+* OUTPUT:
+*       N/A
+*
+* RETURN:
+*       MV_ERROR if decode window number was wrong or enabled window overlapps.
+*
+*******************************************************************************/
+MV_STATUS mvTdmWinEnable(int winNum, MV_BOOL enable)
+{
+	MV_TDM_DEC_WIN addrDecWin;
+
+	if (MV_TRUE == enable)
+	{
+		if (winNum >= TDM_MBUS_MAX_WIN)
+		{
+			mvOsPrintf("mvTdmWinEnable:ERR. Invalid winNum%d\n",winNum);
+			return MV_ERROR;
+		}	
+		
+		/* First check for overlap with other enabled windows				*/
+		/* Get current window */
+		if (MV_OK != mvTdmWinGet(winNum, &addrDecWin))
+		{
+			mvOsPrintf("mvTdmWinEnable:ERR. targetWinGet fail\n");
+			return MV_ERROR;
+		}
+		/* Check for overlapping */
+		if (MV_FALSE == tdmWinOverlapDetect(winNum, &(addrDecWin.addrWin)))
+		{
+			/* No Overlap. Enable address decode target window */
+			MV_REG_BIT_SET(TDM_WIN_CTRL_REG(winNum), TDM_WIN_ENABLE_MASK);
+		}
+		else
+		{   /* Overlap detected	*/
+			mvOsPrintf("mvTdmWinEnable:ERR. Overlap detected\n");
+			return MV_ERROR;
+		}
+	}
+	else
+	{
+		MV_REG_BIT_RESET(TDM_WIN_CTRL_REG(winNum), TDM_WIN_ENABLE_MASK);	
+	}
+	return MV_OK;
+}
+
+
+/*******************************************************************************
+* tdmWinOverlapDetect - Detect TDM address windows overlapping
+*
+* DESCRIPTION:
+*       An unpredicted behaviour is expected in case TDM address decode 
+*       windows overlapps.
+*       This function detects TDM address decode windows overlapping of a 
+*       specified window. The function does not check the window itself for 
+*       overlapping. The function also skipps disabled address decode windows.
+*
+* INPUT:
+*       winNum      - address decode window number.
+*       pAddrDecWin - An address decode window struct.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE if the given address window overlap current address
+*       decode map, MV_FALSE otherwise, MV_ERROR if reading invalid data 
+*       from registers.
+*
+*******************************************************************************/
+static MV_STATUS tdmWinOverlapDetect(MV_U32 winNum, MV_ADDR_WIN *pAddrWin)
+{
+    MV_U32      	winNumIndex;
+    MV_TDM_DEC_WIN  	addrDecWin;
+
+    for (winNumIndex = 0; winNumIndex < TDM_MBUS_MAX_WIN; winNumIndex++)
+    {
+		/* Do not check window itself		*/
+        if (winNumIndex == winNum)
+		{
+			continue;
+		}
+		/* Do not check disabled windows	*/
+		if (MV_REG_READ(TDM_WIN_CTRL_REG(winNum)) & TDM_WIN_ENABLE_MASK)
+		{
+			/* Get window parameters 	*/
+			if (MV_OK != mvTdmWinGet(winNumIndex, &addrDecWin))
+			{
+				DB(mvOsPrintf("dmaWinOverlapDetect: ERR. TargetWinGet failed\n"));
+            		return MV_ERROR;
+			}
+
+			if (MV_TRUE == ctrlWinOverlapTest(pAddrWin, &(addrDecWin.addrWin)))
+			{
+				return MV_TRUE;
+			}        
+		}
+    }
+	return MV_FALSE;
+}
+
+/*******************************************************************************
+* mvTdmAddrDecShow - Print the TDM address decode map.
+*
+* DESCRIPTION:
+*       This function print the TDM address decode map.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_VOID mvTdmAddrDecShow(MV_VOID)
+{
+	MV_TDM_DEC_WIN win;
+	int i;
+
+	mvOsOutput( "\n" );
+	mvOsOutput( "TDM:\n" );
+	mvOsOutput( "----\n" );
+
+	for( i = 0; i < TDM_MBUS_MAX_WIN; i++ )
+	{
+		memset( &win, 0, sizeof(MV_TDM_DEC_WIN) );
+
+		mvOsOutput( "win%d - ", i );
+
+		if (mvTdmWinGet(i, &win ) == MV_OK )
+		{
+			if( win.enable )
+			{
+                mvOsOutput( "%s base %08x, ",
+                mvCtrlTargetNameGet(win.target), win.addrWin.baseLow);
+                mvOsOutput( "...." );
+                mvSizePrint( win.addrWin.size );
+				mvOsOutput( "\n" );
+			}
+			else
+				mvOsOutput( "disable\n" );
+		}
+	}
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysSata.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysSata.c
@@ -0,0 +1,430 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#include "mvTypes.h"
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "cpu/mvCpu.h"
+#include "ctrlEnv/sys/mvCpuIf.h"
+#include "mvRegs.h"
+#include "ctrlEnv/sys/mvSysSata.h"
+
+MV_TARGET sataAddrDecPrioTab[] =
+{
+#if defined(MV_INCLUDE_SDRAM_CS0)
+    SDRAM_CS0,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS1)
+    SDRAM_CS1,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS2)
+    SDRAM_CS2,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS3)
+    SDRAM_CS3,
+#endif
+#if defined(MV_INCLUDE_PEX)
+	PEX0_MEM,
+#endif
+	TBL_TERM
+};
+
+
+/*******************************************************************************
+* sataWinOverlapDetect - Detect SATA address windows overlapping
+*
+* DESCRIPTION:
+*       An unpredicted behaviur is expected in case SATA address decode 
+*       windows overlapps.
+*       This function detects SATA address decode windows overlapping of a 
+*       specified window. The function does not check the window itself for 
+*       overlapping. The function also skipps disabled address decode windows.
+*
+* INPUT:
+*       winNum      - address decode window number.
+*       pAddrDecWin - An address decode window struct.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE if the given address window overlap current address
+*       decode map, MV_FALSE otherwise, MV_ERROR if reading invalid data 
+*       from registers.
+*
+*******************************************************************************/
+static MV_STATUS sataWinOverlapDetect(int dev, MV_U32 winNum, 
+				      MV_ADDR_WIN *pAddrWin)
+{
+    MV_U32          winNumIndex;
+    MV_SATA_DEC_WIN  addrDecWin;
+
+    for(winNumIndex=0; winNumIndex<MV_SATA_MAX_ADDR_DECODE_WIN; winNumIndex++)
+    {
+        /* Do not check window itself       */
+        if (winNumIndex == winNum)
+        {
+            continue;
+        }
+
+        /* Get window parameters    */
+        if (MV_OK != mvSataWinGet(dev, winNumIndex, &addrDecWin))
+        {
+            mvOsPrintf("%s: ERR. TargetWinGet failed\n", __FUNCTION__);
+            return MV_ERROR;
+        }
+
+        /* Do not check disabled windows    */
+        if(addrDecWin.enable == MV_FALSE)
+        {
+            continue;
+        }
+
+        if (MV_TRUE == ctrlWinOverlapTest(pAddrWin, &(addrDecWin.addrWin)))
+        {
+            return MV_TRUE;
+        }        
+    }
+    return MV_FALSE;
+}
+
+
+/*******************************************************************************
+* mvSataWinSet - Set SATA target address window
+*
+* DESCRIPTION:
+*       This function sets a peripheral target (e.g. SDRAM bank0, PCI_MEM0) 
+*       address window, also known as address decode window. 
+*       After setting this target window, the SATA will be able to access the 
+*       target within the address window. 
+*
+* INPUT:
+*       winNum      - SATA target address decode window number.
+*       pAddrDecWin - SATA target window data structure.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_ERROR if address window overlapps with other address decode windows.
+*       MV_BAD_PARAM if base address is invalid parameter or target is 
+*       unknown.
+*
+*******************************************************************************/
+MV_STATUS mvSataWinSet(int dev, MV_U32 winNum, MV_SATA_DEC_WIN *pAddrDecWin)
+{
+    MV_TARGET_ATTRIB    targetAttribs;
+    MV_DEC_REGS         decRegs;
+
+    /* Parameter checking   */
+    if (winNum >= MV_SATA_MAX_ADDR_DECODE_WIN)
+    {
+        mvOsPrintf("%s: ERR. Invalid win num %d\n",__FUNCTION__, winNum);
+        return MV_BAD_PARAM;
+    }
+    
+    /* Check if the requested window overlapps with current windows         */
+    if (MV_TRUE == sataWinOverlapDetect(dev, winNum, &pAddrDecWin->addrWin))
+    {
+        mvOsPrintf("%s: ERR. Window %d overlap\n", __FUNCTION__, winNum);
+        return MV_ERROR;
+    }
+
+    /* check if address is aligned to the size */
+    if(MV_IS_NOT_ALIGN(pAddrDecWin->addrWin.baseLow, pAddrDecWin->addrWin.size))
+    {
+	mvOsPrintf("mvSataWinSet:Error setting SATA window %d to "\
+		   "target %s.\nAddress 0x%08x is unaligned to size 0x%x.\n",
+		   winNum,
+		   mvCtrlTargetNameGet(pAddrDecWin->target), 
+		   pAddrDecWin->addrWin.baseLow,
+		   pAddrDecWin->addrWin.size);
+	return MV_ERROR;
+    }
+
+    decRegs.baseReg = 0;
+    decRegs.sizeReg = 0;
+
+    if (MV_OK != mvCtrlAddrDecToReg(&(pAddrDecWin->addrWin),&decRegs))
+    {
+        mvOsPrintf("%s: mvCtrlAddrDecToReg Failed\n", __FUNCTION__);
+        return MV_ERROR;
+    }
+
+    mvCtrlAttribGet(pAddrDecWin->target, &targetAttribs);
+                                                                                                                         
+    /* set attributes */
+    decRegs.sizeReg &= ~MV_SATA_WIN_ATTR_MASK;
+    decRegs.sizeReg |= (targetAttribs.attrib << MV_SATA_WIN_ATTR_OFFSET);
+
+    /* set target ID */
+    decRegs.sizeReg &= ~MV_SATA_WIN_TARGET_MASK;
+    decRegs.sizeReg |= (targetAttribs.targetId << MV_SATA_WIN_TARGET_OFFSET);
+
+    if (pAddrDecWin->enable == MV_TRUE)
+    {
+        decRegs.sizeReg |= MV_SATA_WIN_ENABLE_MASK;
+    }
+    else
+    {
+        decRegs.sizeReg &= ~MV_SATA_WIN_ENABLE_MASK;
+    }
+
+    MV_REG_WRITE( MV_SATA_WIN_CTRL_REG(dev, winNum), decRegs.sizeReg);
+    MV_REG_WRITE( MV_SATA_WIN_BASE_REG(dev, winNum), decRegs.baseReg);
+    
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvSataWinGet - Get SATA peripheral target address window.
+*
+* DESCRIPTION:
+*       Get SATA peripheral target address window.
+*
+* INPUT:
+*       winNum - SATA target address decode window number.
+*
+* OUTPUT:
+*       pAddrDecWin - SATA target window data structure.
+*
+* RETURN:
+*       MV_ERROR if register parameters are invalid.
+*
+*******************************************************************************/
+MV_STATUS mvSataWinGet(int dev, MV_U32 winNum, MV_SATA_DEC_WIN *pAddrDecWin)
+{
+    MV_DEC_REGS         decRegs;
+    MV_TARGET_ATTRIB    targetAttrib;
+                                                                                                                         
+    /* Parameter checking   */
+    if (winNum >= MV_SATA_MAX_ADDR_DECODE_WIN)
+    {
+        mvOsPrintf("%s (dev=%d): ERR. Invalid winNum %d\n", 
+                    __FUNCTION__, dev, winNum);
+        return MV_NOT_SUPPORTED;
+    }
+
+    decRegs.baseReg = MV_REG_READ( MV_SATA_WIN_BASE_REG(dev, winNum) );
+    decRegs.sizeReg = MV_REG_READ( MV_SATA_WIN_CTRL_REG(dev, winNum) );
+ 
+    if (MV_OK != mvCtrlRegToAddrDec(&decRegs, &pAddrDecWin->addrWin) )
+    {
+        mvOsPrintf("%s: mvCtrlRegToAddrDec Failed\n", __FUNCTION__);
+        return MV_ERROR; 
+    }
+       
+    /* attrib and targetId */
+    targetAttrib.attrib = (decRegs.sizeReg & MV_SATA_WIN_ATTR_MASK) >> 
+		MV_SATA_WIN_ATTR_OFFSET;
+    targetAttrib.targetId = (decRegs.sizeReg & MV_SATA_WIN_TARGET_MASK) >> 
+		MV_SATA_WIN_TARGET_OFFSET;
+ 
+    pAddrDecWin->target = mvCtrlTargetGet(&targetAttrib);
+
+    /* Check if window is enabled   */
+    if(decRegs.sizeReg & MV_SATA_WIN_ENABLE_MASK) 
+    {
+        pAddrDecWin->enable = MV_TRUE;
+    }
+    else
+    {
+        pAddrDecWin->enable = MV_FALSE;
+    }
+    return MV_OK;
+}
+/*******************************************************************************
+* mvSataAddrDecShow - Print the SATA address decode map.
+*
+* DESCRIPTION:
+*		This function print the SATA address decode map.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_VOID mvSataAddrDecShow(MV_VOID)
+{
+
+	MV_SATA_DEC_WIN win;
+	int i,j;
+
+
+
+    for( j = 0; j < MV_SATA_MAX_CHAN; j++ )
+    {
+	if (MV_FALSE == mvCtrlPwrClckGet(SATA_UNIT_ID, j)) 
+		return;
+
+	mvOsOutput( "\n" );
+	mvOsOutput( "SATA %d:\n", j );
+	mvOsOutput( "----\n" );
+
+	for( i = 0; i < MV_SATA_MAX_ADDR_DECODE_WIN; i++ )
+	{
+            memset( &win, 0, sizeof(MV_SATA_DEC_WIN) );
+
+	    mvOsOutput( "win%d - ", i );
+
+	    if( mvSataWinGet(j, i, &win ) == MV_OK )
+	    {
+	        if( win.enable )
+	        {
+                    mvOsOutput( "%s base %08x, ",
+                    mvCtrlTargetNameGet(win.target), win.addrWin.baseLow );
+                    mvOsOutput( "...." );
+
+                    mvSizePrint( win.addrWin.size );
+    
+		    mvOsOutput( "\n" );
+                }
+		else
+		mvOsOutput( "disable\n" );
+	    }
+	}
+    }
+}
+
+
+/*******************************************************************************
+* mvSataWinInit - Initialize the integrated SATA target address window.
+*
+* DESCRIPTION:
+*       Initialize the SATA peripheral target address window.
+*
+* INPUT:
+*
+*
+* OUTPUT:
+*     
+*
+* RETURN:
+*       MV_ERROR if register parameters are invalid.
+*
+*******************************************************************************/
+MV_STATUS mvSataWinInit(MV_VOID)
+{
+    int             winNum;
+    MV_SATA_DEC_WIN  sataWin;
+    MV_CPU_DEC_WIN  cpuAddrDecWin;
+    MV_U32          status, winPrioIndex = 0;
+
+    /* Initiate Sata address decode */
+
+    /* First disable all address decode windows */
+    for(winNum = 0; winNum < MV_SATA_MAX_ADDR_DECODE_WIN; winNum++)
+    {
+        MV_U32  regVal = MV_REG_READ(MV_SATA_WIN_CTRL_REG(0, winNum));
+        regVal &= ~MV_SATA_WIN_ENABLE_MASK;
+        MV_REG_WRITE(MV_SATA_WIN_CTRL_REG(0, winNum), regVal);
+    }
+    
+    winNum = 0;
+    while( (sataAddrDecPrioTab[winPrioIndex] != TBL_TERM) &&
+           (winNum < MV_SATA_MAX_ADDR_DECODE_WIN) )
+    {
+        /* first get attributes from CPU If */
+        status = mvCpuIfTargetWinGet(sataAddrDecPrioTab[winPrioIndex],
+                                     &cpuAddrDecWin);
+
+        if(MV_NO_SUCH == status)
+        {
+            winPrioIndex++;
+            continue;
+        }
+	if (MV_OK != status)
+	{
+            mvOsPrintf("%s: ERR. mvCpuIfTargetWinGet failed\n", __FUNCTION__);
+	    return MV_ERROR;
+	}
+
+        if (cpuAddrDecWin.enable == MV_TRUE)
+        {
+            sataWin.addrWin.baseHigh = cpuAddrDecWin.addrWin.baseHigh;
+            sataWin.addrWin.baseLow  = cpuAddrDecWin.addrWin.baseLow;
+            sataWin.addrWin.size     = cpuAddrDecWin.addrWin.size;
+            sataWin.enable           = MV_TRUE;
+            sataWin.target           = sataAddrDecPrioTab[winPrioIndex];
+            
+            if(MV_OK != mvSataWinSet(0/*dev*/, winNum, &sataWin))
+            {
+                return MV_ERROR;
+            }
+            winNum++;
+        }
+        winPrioIndex++;
+    }
+    return MV_OK;
+}
+
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysTdm.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysTdm.h
@@ -0,0 +1,92 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCmvSysTdmh
+#define __INCmvSysTdmh
+
+#include "ctrlEnv/sys/mvCpuIf.h"
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "ctrlEnv/mvCtrlEnvAddrDec.h"
+
+#define TDM_MBUS_MAX_WIN	4
+#define TDM_WIN_CTRL_REG(win)	((TDM_REG_BASE + 0x4030) + (win<<4))
+#define TDM_WIN_BASE_REG(win)	((TDM_REG_BASE +0x4034) + (win<<4))
+
+/* TDM_WIN_CTRL_REG bits */
+#define TDM_WIN_ENABLE_OFFS	0
+#define TDM_WIN_ENABLE_MASK	(1<<TDM_WIN_ENABLE_OFFS)
+#define TDM_WIN_ENABLE		1
+#define TDM_WIN_TARGET_OFFS	4
+#define TDM_WIN_TARGET_MASK	(0xf<<TDM_WIN_TARGET_OFFS)
+#define TDM_WIN_ATTRIB_OFFS	8
+#define TDM_WIN_ATTRIB_MASK	(0xff<<TDM_WIN_ATTRIB_OFFS)
+#define TDM_WIN_SIZE_OFFS	16
+#define TDM_WIN_SIZE_MASK	(0xffff<<TDM_WIN_SIZE_OFFS)
+
+/* TDM_WIN_BASE_REG bits */
+#define TDM_BASE_OFFS		16
+#define TDM_BASE_MASK		(0xffff<<TDM_BASE_OFFS)
+
+#endif /*__INCmvSysTdmh*/
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysXor.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysXor.c
@@ -0,0 +1,662 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "xor/mvXor.h"
+#include "mvSysXor.h"
+
+/* defines  */
+#ifdef MV_DEBUG
+	#define DB(x)	x
+#else
+	#define DB(x)
+#endif	
+
+
+static MV_STATUS xorWinOverlapDetect(MV_U32 unit,MV_U32 winNum, MV_ADDR_WIN *pAddrWin);
+
+MV_TARGET xorAddrDecPrioTap[] = 
+{
+#if defined(MV_INCLUDE_DEVICE_CS0)
+    DEVICE_CS0,
+#endif
+#if defined(MV_INCLUDE_PEX)
+	PEX0_MEM,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS0)
+    SDRAM_CS0,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS1)
+    SDRAM_CS1,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS2)
+    SDRAM_CS2,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS3)
+    SDRAM_CS3,
+#endif
+#if defined(MV_INCLUDE_DEVICE_CS1)
+    DEVICE_CS1,
+#endif
+#if defined(MV_INCLUDE_CESA)
+   CRYPT_ENG,
+#endif 
+	TBL_TERM
+};
+static MV_STATUS mvXorInitWinsUnit (MV_U32 unit)
+{
+	MV_U32         winNum;
+	MV_XOR_DEC_WIN addrDecWin;
+	MV_CPU_DEC_WIN cpuAddrDecWin;
+	MV_U32          status;
+	MV_U32			winPrioIndex=0;
+
+	/* Initiate XOR address decode */
+
+	/* First disable all address decode windows */
+	for(winNum = 0; winNum < XOR_MAX_ADDR_DEC_WIN; winNum++)
+	{
+	    mvXorTargetWinEnable(unit,winNum, MV_FALSE);
+	}
+	
+	/* Go through all windows in user table until table terminator			*/
+	for (winNum = 0; ((xorAddrDecPrioTap[winPrioIndex] != TBL_TERM) &&
+					(winNum < XOR_MAX_ADDR_DEC_WIN));)
+	{
+		/* first get attributes from CPU If */
+		status = mvCpuIfTargetWinGet(xorAddrDecPrioTap[winPrioIndex], 
+									 &cpuAddrDecWin);
+
+        if(MV_NO_SUCH == status)
+        {
+            winPrioIndex++;
+            continue;
+        }
+		if (MV_OK != status)
+		{
+            mvOsPrintf("%s: ERR. mvCpuIfTargetWinGet failed\n", __FUNCTION__);
+			return MV_ERROR;
+		}
+
+	
+        if (cpuAddrDecWin.enable == MV_TRUE)
+		{
+
+			addrDecWin.target           = xorAddrDecPrioTap[winPrioIndex];
+			addrDecWin.addrWin.baseLow  = cpuAddrDecWin.addrWin.baseLow; 
+			addrDecWin.addrWin.baseHigh = cpuAddrDecWin.addrWin.baseHigh; 
+			addrDecWin.addrWin.size     = cpuAddrDecWin.addrWin.size;    
+			addrDecWin.enable           = MV_TRUE;
+	
+			if (MV_OK != mvXorTargetWinSet(unit,winNum, &addrDecWin))
+			{
+				DB(mvOsPrintf("mvXorInit: ERR. mvDmaTargetWinSet failed\n"));
+				return MV_ERROR;
+			}
+			winNum++;
+		}
+		winPrioIndex++;	
+        
+	}
+    
+	return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvXorInit - Initialize XOR engine
+*
+* DESCRIPTION:
+*		This function initialize XOR unit. It set the default address decode
+*		windows of the unit.
+*		Note that if the address window is disabled in xorAddrDecMap, the
+*		window parameters will be set but the window will remain disabled.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_BAD_PARAM if parameters to function invalid, MV_OK otherwise.
+*******************************************************************************/
+MV_STATUS mvXorInit (MV_VOID)
+{
+	MV_U32         i;
+
+	/* Initiate XOR address decode */
+	for(i = 0; i < MV_XOR_MAX_UNIT; i++)
+	    mvXorInitWinsUnit(i);
+
+	mvXorHalInit(MV_XOR_MAX_CHAN);	
+    
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvXorTargetWinSet - Set XOR target address window
+*
+* DESCRIPTION:
+*       This function sets a peripheral target (e.g. SDRAM bank0, PCI_MEM0) 
+*       address window. After setting this target window, the XOR will be 
+*       able to access the target within the address window. 
+*
+* INPUT:
+*	    winNum - One of the possible XOR memory decode windows.
+*       target - Peripheral target enumerator.
+*       base   - Window base address.
+*       size   - Window size.
+*       enable - Window enable/disable.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_BAD_PARAM if parameters to function invalid, MV_OK otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvXorTargetWinSet(MV_U32 unit, MV_U32 winNum, MV_XOR_DEC_WIN *pAddrDecWin)
+{
+    MV_DEC_REGS xorDecRegs;
+	MV_TARGET_ATTRIB targetAttribs;
+    MV_U32      chan;
+    
+    /* Parameter checking */
+    if (winNum >= XOR_MAX_ADDR_DEC_WIN)
+    {
+		DB(mvOsPrintf("%s: ERR. Invalid win num %d\n",__FUNCTION__, winNum));
+        return MV_BAD_PARAM;
+    }
+    if (pAddrDecWin == NULL)
+    {
+        DB(mvOsPrintf("%s: ERR. pAddrDecWin is NULL pointer\n", __FUNCTION__ ));
+        return MV_BAD_PTR;
+    }                                         
+    /* Check if the requested window overlaps with current windows */
+    if (MV_TRUE == xorWinOverlapDetect(unit, winNum, &pAddrDecWin->addrWin))
+    {
+	DB(mvOsPrintf("%s: ERR. Window %d overlap\n",__FUNCTION__,winNum));
+	return MV_ERROR;
+    }                              
+
+    xorDecRegs.baseReg = MV_REG_READ(XOR_BASE_ADDR_REG(unit,winNum));
+    xorDecRegs.sizeReg = MV_REG_READ(XOR_SIZE_MASK_REG(unit,winNum));
+
+    /* Get Base Address and size registers values */
+    if(MV_OK != mvCtrlAddrDecToReg(&pAddrDecWin->addrWin, &xorDecRegs))
+    {
+		DB(mvOsPrintf("%s: ERR. Invalid addr dec window\n",__FUNCTION__));
+        return MV_BAD_PARAM;
+	}
+    
+
+	mvCtrlAttribGet(pAddrDecWin->target,&targetAttribs);
+
+	/* set attributes */
+	xorDecRegs.baseReg &= ~XEBARX_ATTR_MASK;
+	xorDecRegs.baseReg |= targetAttribs.attrib << XEBARX_ATTR_OFFS;
+	/* set target ID */
+	xorDecRegs.baseReg &= ~XEBARX_TARGET_MASK;
+	xorDecRegs.baseReg |= targetAttribs.targetId << XEBARX_TARGET_OFFS;
+
+
+    /* Write to address decode Base Address Register */
+	MV_REG_WRITE(XOR_BASE_ADDR_REG(unit,winNum), xorDecRegs.baseReg);
+    
+    /* Write to Size Register */
+	MV_REG_WRITE(XOR_SIZE_MASK_REG(unit,winNum), xorDecRegs.sizeReg);
+    
+    for (chan = 0; chan < MV_XOR_MAX_CHAN_PER_UNIT; chan++)
+    {
+        if (pAddrDecWin->enable)
+        {
+            MV_REG_BIT_SET(XOR_WINDOW_CTRL_REG(unit,chan),
+                           XEXWCR_WIN_EN_MASK(winNum));
+        }
+        else
+        {
+            MV_REG_BIT_RESET(XOR_WINDOW_CTRL_REG(unit,chan),
+                             XEXWCR_WIN_EN_MASK(winNum));
+        }
+    }
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvXorTargetWinGet - Get xor peripheral target address window.
+*
+* DESCRIPTION:
+*		Get xor peripheral target address window.
+*
+* INPUT:
+*	  winNum - One of the possible XOR memory decode windows.
+*
+* OUTPUT:
+*       base   - Window base address.
+*       size   - Window size.
+*       enable - window enable/disable.
+*
+* RETURN:
+*       MV_BAD_PARAM if parameters to function invalid, MV_OK otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvXorTargetWinGet(MV_U32 unit,MV_U32 winNum, MV_XOR_DEC_WIN *pAddrDecWin)
+{
+    MV_DEC_REGS xorDecRegs;
+	MV_TARGET_ATTRIB targetAttrib;
+    MV_U32      chan=0,chanWinEn;
+    
+    /* Parameter checking */
+    if (winNum >= XOR_MAX_ADDR_DEC_WIN)
+    {
+		DB(mvOsPrintf("%s: ERR. Invalid win num %d\n",__FUNCTION__ , winNum));
+        return MV_ERROR;
+    }
+
+    if (NULL == pAddrDecWin)
+    {
+        DB(mvOsPrintf("%s: ERR. pAddrDecWin is NULL pointer\n", __FUNCTION__ ));
+        return MV_BAD_PTR;
+    }
+
+    chanWinEn = MV_REG_READ(XOR_WINDOW_CTRL_REG(unit,0)) & XEXWCR_WIN_EN_MASK(winNum);
+    
+    for (chan = 0; chan < MV_XOR_MAX_CHAN_PER_UNIT; chan++) /* we should scan here all channels per unit */
+    {
+    	/* Check if enable bit is equal for all channels */
+        if ((MV_REG_READ(XOR_WINDOW_CTRL_REG(unit,chan)) & 
+             XEXWCR_WIN_EN_MASK(winNum)) != chanWinEn)
+        {
+            mvOsPrintf("%s: ERR. Window enable field must be equal in "
+                              "all channels(chan=%d)\n",__FUNCTION__, chan);
+            return MV_ERROR;
+        }
+    }
+
+
+
+	xorDecRegs.baseReg  = MV_REG_READ(XOR_BASE_ADDR_REG(unit,winNum));
+	xorDecRegs.sizeReg  = MV_REG_READ(XOR_SIZE_MASK_REG(unit,winNum));
+
+	if (MV_OK != mvCtrlRegToAddrDec(&xorDecRegs, &pAddrDecWin->addrWin))
+	{
+		mvOsPrintf("%s: ERR. mvCtrlRegToAddrDec failed\n", __FUNCTION__);
+		return MV_ERROR;
+	}
+
+	/* attrib and targetId */
+	targetAttrib.attrib = 
+		(xorDecRegs.baseReg & XEBARX_ATTR_MASK) >> XEBARX_ATTR_OFFS;
+	targetAttrib.targetId = 
+		(xorDecRegs.baseReg & XEBARX_TARGET_MASK) >> XEBARX_TARGET_OFFS;
+
+
+	pAddrDecWin->target = mvCtrlTargetGet(&targetAttrib);
+
+	if(chanWinEn)
+	{
+		pAddrDecWin->enable = MV_TRUE;
+	}
+	else pAddrDecWin->enable = MV_FALSE;
+	
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvXorTargetWinEnable - Enable/disable a Xor address decode window
+*
+* DESCRIPTION:
+*       This function enable/disable a XOR address decode window.
+*       if parameter 'enable' == MV_TRUE the routine will enable the 
+*       window, thus enabling XOR accesses (before enabling the window it is 
+*       tested for overlapping). Otherwise, the window will be disabled.
+*
+* INPUT:
+*       winNum - Decode window number.
+*       enable - Enable/disable parameter.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_BAD_PARAM if parameters to function invalid, MV_OK otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvXorTargetWinEnable(MV_U32 unit,MV_U32 winNum, MV_BOOL enable)
+{
+	MV_XOR_DEC_WIN  addrDecWin;
+    MV_U32          chan;
+    
+	/* Parameter checking   */               
+    if (winNum >= XOR_MAX_ADDR_DEC_WIN)
+    {
+        DB(mvOsPrintf("%s: ERR. Invalid winNum%d\n", __FUNCTION__, winNum));
+        return MV_ERROR;
+    }
+
+	if (enable == MV_TRUE) 
+	{
+		/* Get current window */
+	    if (MV_OK != mvXorTargetWinGet(unit,winNum, &addrDecWin))
+		{
+			DB(mvOsPrintf("%s: ERR. targetWinGet fail\n", __FUNCTION__));
+			return MV_ERROR;
+		}
+
+		/* Check for overlapping */
+	    if (MV_TRUE == xorWinOverlapDetect(unit,winNum, &(addrDecWin.addrWin)))
+		{
+			/* Overlap detected	*/
+			DB(mvOsPrintf("%s: ERR. Overlap detected\n", __FUNCTION__));
+			return MV_ERROR;
+		}
+
+		/* No Overlap. Enable address decode target window */
+		for (chan = 0; chan < MV_XOR_MAX_CHAN_PER_UNIT; chan++)
+		{
+		    MV_REG_BIT_SET(XOR_WINDOW_CTRL_REG(unit,chan),
+						   XEXWCR_WIN_EN_MASK(winNum));
+		}
+
+	}
+	else
+	{
+		/* Disable address decode target window */
+
+		for (chan = 0; chan < MV_XOR_MAX_CHAN_PER_UNIT; chan++)
+		{
+		    MV_REG_BIT_RESET(XOR_WINDOW_CTRL_REG(unit,chan),
+							 XEXWCR_WIN_EN_MASK(winNum));
+		}
+
+	}
+
+	return MV_OK;                  
+}
+
+/*******************************************************************************
+* mvXorSetProtWinSet - Configure access attributes of a XOR engine
+*                               to one of the XOR memory windows.
+*
+* DESCRIPTION:
+*       Each engine can be configured with access attributes for each of the
+*       memory spaces. This function sets access attributes 
+*       to a given window for the given engine
+*
+* INPUTS:
+*       chan    - One of the possible engines.
+*       winNum  - One of the possible XOR memory spaces.
+*       access  - Protection access rights.
+*       write   - Write rights.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_BAD_PARAM if parameters to function invalid, MV_OK otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvXorProtWinSet (MV_U32 unit,MV_U32 chan, MV_U32 winNum, MV_BOOL access, 
+                           MV_BOOL write)
+{
+    MV_U32 temp;
+    
+    /* Parameter checking   */
+    if (chan >= MV_XOR_MAX_CHAN_PER_UNIT)
+    {
+		DB(mvOsPrintf("%s: ERR. Invalid chan num %d\n", __FUNCTION__ , chan));
+        return MV_BAD_PARAM;
+    }
+    if (winNum >= XOR_MAX_ADDR_DEC_WIN)
+    {
+		DB(mvOsPrintf("%s: ERR. Invalid win num %d\n", __FUNCTION__, winNum));
+        return MV_BAD_PARAM;
+    }
+
+    temp = MV_REG_READ(XOR_WINDOW_CTRL_REG(unit,chan)) & 
+        (~XEXWCR_WIN_ACC_MASK(winNum));
+
+    /* if access is disable */
+    if (!access)
+    {
+        /* disable access */
+        temp |= XEXWCR_WIN_ACC_NO_ACC(winNum);
+    }
+    /* if access is enable */
+    else
+    {
+        /* if write is enable */
+        if (write)
+        {
+            /* enable write */
+            temp |= XEXWCR_WIN_ACC_RW(winNum);
+        }
+        /* if write is disable */
+        else
+        {
+            /* disable write */
+            temp |= XEXWCR_WIN_ACC_RO(winNum);
+        }
+    }
+    MV_REG_WRITE(XOR_WINDOW_CTRL_REG(unit,chan),temp);
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvXorPciRemap - Set XOR remap register for PCI address windows.
+*
+* DESCRIPTION:
+*       only Windows 0-3 can be remapped.
+*
+* INPUT:
+*       winNum      - window number
+*       pAddrDecWin  - pointer to address space window structure
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_BAD_PARAM if parameters to function invalid, MV_OK otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvXorPciRemap(MV_U32 unit,MV_U32 winNum, MV_U32 addrHigh)
+{
+    /* Parameter checking   */
+    if (winNum >= XOR_MAX_REMAP_WIN)
+    {
+		DB(mvOsPrintf("%s: ERR. Invalid win num %d\n", __FUNCTION__, winNum));
+        return MV_BAD_PARAM;
+    }
+
+    MV_REG_WRITE(XOR_HIGH_ADDR_REMAP_REG(unit,winNum), addrHigh);
+    
+	return MV_OK;
+}
+
+/*******************************************************************************
+* xorWinOverlapDetect - Detect XOR address windows overlaping
+*
+* DESCRIPTION:
+*       An unpredicted behaviour is expected in case XOR address decode 
+*       windows overlaps.
+*       This function detects XOR address decode windows overlaping of a 
+*       specified window. The function does not check the window itself for 
+*       overlaping. The function also skipps disabled address decode windows.
+*
+* INPUT:
+*       winNum      - address decode window number.
+*       pAddrDecWin - An address decode window struct.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE if the given address window overlap current address
+*       decode map, MV_FALSE otherwise, MV_ERROR if reading invalid data 
+*       from registers.
+*
+*******************************************************************************/
+static MV_STATUS xorWinOverlapDetect(MV_U32 unit,MV_U32 winNum, MV_ADDR_WIN *pAddrWin)
+{
+	MV_U32 	        baseAddrEnableReg;
+	MV_U32          winNumIndex,chan;
+	MV_XOR_DEC_WIN  addrDecWin;
+
+	if (pAddrWin == NULL)
+	{
+		DB(mvOsPrintf("%s: ERR. pAddrWin is NULL pointer\n", __FUNCTION__ ));
+		return MV_BAD_PTR;
+	}
+    
+	for (chan = 0; chan < MV_XOR_MAX_CHAN_PER_UNIT; chan++)
+	{
+		/* Read base address enable register. Do not check disabled windows	*/
+	    baseAddrEnableReg = MV_REG_READ(XOR_WINDOW_CTRL_REG(unit,chan));
+
+		for (winNumIndex = 0; winNumIndex < XOR_MAX_ADDR_DEC_WIN; winNumIndex++)
+		{
+			/* Do not check window itself */
+			if (winNumIndex == winNum)
+			{
+				continue;
+			}
+    
+			/* Do not check disabled windows */
+			if ((baseAddrEnableReg & XEXWCR_WIN_EN_MASK(winNumIndex)) == 0)
+			{
+				continue;
+			}
+    
+			/* Get window parameters */
+			if (MV_OK != mvXorTargetWinGet(unit,winNumIndex, &addrDecWin))
+			{
+				DB(mvOsPrintf("%s: ERR. TargetWinGet failed\n", __FUNCTION__ ));
+				return MV_ERROR;
+			}
+            
+			if (MV_TRUE == ctrlWinOverlapTest(pAddrWin, &(addrDecWin.addrWin)))
+			{
+				return MV_TRUE;
+			}
+		}
+	}
+	
+	return MV_FALSE;
+}
+
+static MV_VOID mvXorAddrDecShowUnit(MV_U32 unit)
+{
+	MV_XOR_DEC_WIN win;
+	int            i;
+
+	mvOsOutput( "\n" );
+	mvOsOutput( "XOR %d:\n", unit );
+	mvOsOutput( "----\n" );
+
+	for( i = 0; i < XOR_MAX_ADDR_DEC_WIN; i++ )
+	{
+		memset( &win, 0, sizeof(MV_XOR_DEC_WIN) );
+
+		mvOsOutput( "win%d - ", i );
+
+		if( mvXorTargetWinGet(unit, i, &win ) == MV_OK )
+		{
+			if( win.enable )
+			{
+				mvOsOutput( "%s base %x, ",
+				mvCtrlTargetNameGet(win.target), win.addrWin.baseLow );
+
+				mvSizePrint( win.addrWin.size );
+				
+                mvOsOutput( "\n" );
+			}
+			else
+				mvOsOutput( "disable\n" );
+		}
+	}
+}
+
+/*******************************************************************************
+* mvXorAddrDecShow - Print the XOR address decode map.
+*
+* DESCRIPTION:
+*		This function print the XOR address decode map.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_VOID mvXorAddrDecShow(MV_VOID)
+{
+	int            i;
+
+	for( i = 0; i < MV_XOR_MAX_UNIT; i++ )
+	    mvXorAddrDecShowUnit(i);
+	
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysGbe.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysGbe.c
@@ -0,0 +1,656 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#include "ctrlEnv/sys/mvSysGbe.h"
+
+
+
+typedef struct _mvEthDecWin
+{
+    MV_TARGET     target;
+    MV_ADDR_WIN   addrWin;  /* An address window*/
+    MV_BOOL       enable;   /* Address decode window is enabled/disabled */
+  
+}MV_ETH_DEC_WIN;
+
+MV_TARGET ethAddrDecPrioTap[] =
+{
+#if defined(MV_INCLUDE_SDRAM_CS0)
+        SDRAM_CS0,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS1)
+        SDRAM_CS1,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS2)
+        SDRAM_CS2,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS3)
+        SDRAM_CS3,
+#endif
+#if defined(MV_INCLUDE_DEVICE_CS0)
+        DEVICE_CS0,
+#endif
+#if defined(MV_INCLUDE_DEVICE_CS1)
+        DEVICE_CS1,
+#endif
+#if defined(MV_INCLUDE_DEVICE_CS2)
+        DEVICE_CS2,
+#endif
+#if defined(MV_INCLUDE_DEVICE_CS3)
+        DEVICE_CS3,
+#endif
+#if defined(MV_INCLUDE_PEX)
+        PEX0_IO,
+#endif
+        TBL_TERM
+};
+
+static MV_STATUS   ethWinOverlapDetect(int port, MV_U32 winNum, MV_ADDR_WIN *pAddrWin);
+static MV_STATUS   mvEthWinSet(int port, MV_U32 winNum, MV_ETH_DEC_WIN *pAddrDecWin);
+static MV_STATUS   mvEthWinGet(int port, MV_U32 winNum, MV_ETH_DEC_WIN *pAddrDecWin);
+
+                                                                                                                             
+/*******************************************************************************
+* mvEthWinInit - Initialize ETH address decode windows 
+*
+* DESCRIPTION:
+*               This function initialize ETH window decode unit. It set the 
+*               default address decode windows of the unit.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_ERROR if setting fail.
+*******************************************************************************/
+/* Configure EthDrv memory map registes. */
+MV_STATUS 	mvEthWinInit (int port)
+{
+    MV_U32          winNum, status, winPrioIndex=0, i, regVal=0;
+    MV_ETH_DEC_WIN  ethWin;
+    MV_CPU_DEC_WIN  cpuAddrDecWin;
+    static MV_U32   accessProtReg = 0;
+
+#if (MV_ETH_VERSION <= 1)
+    static MV_BOOL  isFirst = MV_TRUE;
+
+    if(isFirst == MV_FALSE)
+    {
+        MV_REG_WRITE(ETH_ACCESS_PROTECT_REG(port), accessProtReg);
+        return MV_OK;
+    }
+    isFirst = MV_FALSE;
+#endif /* MV_GIGA_ETH_VERSION */
+
+    /* Initiate Ethernet address decode */
+
+    /* First disable all address decode windows */
+    for(winNum=0; winNum<ETH_MAX_DECODE_WIN; winNum++)
+    {
+        regVal |= MV_BIT_MASK(winNum);
+    }
+    MV_REG_WRITE(ETH_BASE_ADDR_ENABLE_REG(port), regVal);
+
+   /* Go through all windows in user table until table terminator      */
+    for (winNum=0; ((ethAddrDecPrioTap[winPrioIndex] != TBL_TERM) && 
+                    (winNum < ETH_MAX_DECODE_WIN)); )
+    {
+        /* first get attributes from CPU If */
+        status = mvCpuIfTargetWinGet(ethAddrDecPrioTap[winPrioIndex], 
+                                     &cpuAddrDecWin);
+
+        if(MV_NO_SUCH == status)
+        {
+            winPrioIndex++;
+            continue;
+        }
+		if (MV_OK != status)
+		{
+			mvOsPrintf("mvEthWinInit: ERR. mvCpuIfTargetWinGet failed\n");
+			return MV_ERROR;
+		}
+
+        if (cpuAddrDecWin.enable == MV_TRUE)
+        {
+            ethWin.addrWin.baseHigh = cpuAddrDecWin.addrWin.baseHigh;
+            ethWin.addrWin.baseLow = cpuAddrDecWin.addrWin.baseLow;
+            ethWin.addrWin.size = cpuAddrDecWin.addrWin.size;
+            ethWin.enable = MV_TRUE;
+            ethWin.target = ethAddrDecPrioTap[winPrioIndex];
+
+            if(MV_OK != mvEthWinSet(port, winNum, &ethWin))
+            {
+                mvOsPrintf("mvEthWinInit: ERR. mvEthWinSet failed winNum=%d\n",
+                           winNum);
+                return MV_ERROR;
+            }
+            winNum++;
+        }
+        winPrioIndex ++;
+    }
+
+    /* set full access to all windows. */
+    for(i=0; i<winNum; i++)
+    {
+        accessProtReg |= (FULL_ACCESS << (i*2));
+    }
+    MV_REG_WRITE(ETH_ACCESS_PROTECT_REG(port), accessProtReg);
+
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvEthWinSet - Set ETH target address window
+*
+* DESCRIPTION:
+*       This function sets a peripheral target (e.g. SDRAM bank0, PCI_MEM0)
+*       address window, also known as address decode window.
+*       After setting this target window, the ETH will be able to access the
+*       target within the address window.
+*
+* INPUT:
+*       winNum      - ETH to target address decode window number.
+*       pAddrDecWin - ETH target window data structure.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_ERROR if address window overlapps with other address decode windows.
+*       MV_BAD_PARAM if base address is invalid parameter or target is
+*       unknown.
+*
+*******************************************************************************/
+MV_STATUS mvEthWinSet(int port, MV_U32 winNum, MV_ETH_DEC_WIN *pAddrDecWin)
+{
+    MV_TARGET_ATTRIB    targetAttribs;
+    MV_DEC_REGS         decRegs;
+    
+    /* Parameter checking   */
+    if (winNum >= ETH_MAX_DECODE_WIN)
+    {
+        mvOsPrintf("mvEthWinSet: ERR. Invalid win num %d\n",winNum);
+        return MV_BAD_PARAM;
+    }    
+    
+    /* Check if the requested window overlapps with current windows     */
+    if (MV_TRUE == ethWinOverlapDetect(port, winNum, &pAddrDecWin->addrWin))
+    {
+        mvOsPrintf("mvEthWinSet: ERR. Window %d overlap\n", winNum);
+        return MV_ERROR;
+    }
+
+	/* check if address is aligned to the size */
+	if(MV_IS_NOT_ALIGN(pAddrDecWin->addrWin.baseLow, pAddrDecWin->addrWin.size))
+	{
+		mvOsPrintf("mvEthWinSet: Error setting Ethernet window %d to "\
+				   "target %s.\nAddress 0x%08x is unaligned to size 0x%x.\n",
+				   winNum,
+				   mvCtrlTargetNameGet(pAddrDecWin->target), 
+				   pAddrDecWin->addrWin.baseLow,
+				   pAddrDecWin->addrWin.size);
+		return MV_ERROR;
+	}
+
+    
+    decRegs.baseReg = MV_REG_READ(ETH_WIN_BASE_REG(port, winNum));
+    decRegs.sizeReg = MV_REG_READ(ETH_WIN_SIZE_REG(port, winNum));
+    
+    if (MV_OK != mvCtrlAddrDecToReg(&(pAddrDecWin->addrWin),&decRegs))
+    {
+        mvOsPrintf("mvEthWinSet:mvCtrlAddrDecToReg Failed\n");
+        return MV_ERROR;
+    }
+    
+    mvCtrlAttribGet(pAddrDecWin->target,&targetAttribs);
+    
+    /* set attributes */
+    decRegs.baseReg &= ~ETH_WIN_ATTR_MASK;
+    decRegs.baseReg |= targetAttribs.attrib << ETH_WIN_ATTR_OFFS;
+    /* set target ID */
+    decRegs.baseReg &= ~ETH_WIN_TARGET_MASK;
+    decRegs.baseReg |= targetAttribs.targetId << ETH_WIN_TARGET_OFFS;
+    
+    /* for the safe side we disable the window before writing the new
+    values */
+    mvEthWinEnable(port, winNum, MV_FALSE);
+    MV_REG_WRITE(ETH_WIN_BASE_REG(port, winNum), decRegs.baseReg);
+    
+    /* Write to address decode Size Register                            */
+    MV_REG_WRITE(ETH_WIN_SIZE_REG(port, winNum), decRegs.sizeReg);
+    
+    /* Enable address decode target window                              */
+    if (pAddrDecWin->enable == MV_TRUE)
+    {
+            mvEthWinEnable(port, winNum, MV_TRUE);
+    }
+    
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvETHWinGet - Get dma peripheral target address window.
+*
+* DESCRIPTION:
+*               Get ETH peripheral target address window.
+*
+* INPUT:
+*       winNum - ETH to target address decode window number.
+*
+* OUTPUT:
+*       pAddrDecWin - ETH target window data structure.
+*
+* RETURN:
+*       MV_ERROR if register parameters are invalid.
+*
+*******************************************************************************/
+MV_STATUS mvEthWinGet(int port, MV_U32 winNum, MV_ETH_DEC_WIN *pAddrDecWin)
+{
+    MV_DEC_REGS decRegs;
+    MV_TARGET_ATTRIB targetAttrib;
+    
+    /* Parameter checking   */
+    if (winNum >= ETH_MAX_DECODE_WIN)
+    {
+        mvOsPrintf("mvEthWinGet: ERR. Invalid winNum %d\n", winNum);
+        return MV_NOT_SUPPORTED;
+    }
+    
+    decRegs.baseReg =  MV_REG_READ(ETH_WIN_BASE_REG(port, winNum));
+    decRegs.sizeReg = MV_REG_READ(ETH_WIN_SIZE_REG(port, winNum));
+    
+    if (MV_OK != mvCtrlRegToAddrDec(&decRegs,&(pAddrDecWin->addrWin)))
+    {
+        mvOsPrintf("mvAhbToMbusWinGet: mvCtrlRegToAddrDec Failed \n");
+        return MV_ERROR;
+    }
+    
+    /* attrib and targetId */
+    targetAttrib.attrib = 
+     (decRegs.baseReg & ETH_WIN_ATTR_MASK) >> ETH_WIN_ATTR_OFFS;
+    targetAttrib.targetId = 
+     (decRegs.baseReg & ETH_WIN_TARGET_MASK) >> ETH_WIN_TARGET_OFFS;
+    
+    pAddrDecWin->target = mvCtrlTargetGet(&targetAttrib);
+    
+    /* Check if window is enabled   */
+    if (~(MV_REG_READ(ETH_BASE_ADDR_ENABLE_REG(port))) & (1 << winNum) )
+    {
+        pAddrDecWin->enable = MV_TRUE;
+    }
+    else
+    {
+        pAddrDecWin->enable = MV_FALSE;
+    }
+    
+        return MV_OK;
+}
+
+/*******************************************************************************
+* mvEthWinEnable - Enable/disable a ETH to target address window
+*
+* DESCRIPTION:
+*       This function enable/disable a ETH to target address window.
+*       According to parameter 'enable' the routine will enable the
+*       window, thus enabling ETH accesses (before enabling the window it is
+*       tested for overlapping). Otherwise, the window will be disabled.
+*
+* INPUT:
+*       winNum - ETH to target address decode window number.
+*       enable - Enable/disable parameter.
+*
+* OUTPUT:
+*       N/A
+*
+* RETURN:
+*       MV_ERROR if decode window number was wrong or enabled window overlapps.
+*
+*******************************************************************************/
+MV_STATUS mvEthWinEnable(int port, MV_U32 winNum,MV_BOOL enable)
+{
+    MV_ETH_DEC_WIN addrDecWin;
+
+    /* Parameter checking   */
+    if (winNum >= ETH_MAX_DECODE_WIN)
+    {
+        mvOsPrintf("mvEthTargetWinEnable:ERR. Invalid winNum%d\n",winNum);
+        return MV_ERROR;
+    }
+
+    if (enable == MV_TRUE)
+    {   /* First check for overlap with other enabled windows               */
+        /* Get current window */
+        if (MV_OK != mvEthWinGet(port, winNum, &addrDecWin))
+        {
+            mvOsPrintf("mvEthTargetWinEnable:ERR. targetWinGet fail\n");
+            return MV_ERROR;
+        }
+        /* Check for overlapping */
+        if (MV_FALSE == ethWinOverlapDetect(port, winNum, &(addrDecWin.addrWin)))
+        {
+            /* No Overlap. Enable address decode target window              */
+            MV_REG_BIT_RESET(ETH_BASE_ADDR_ENABLE_REG(port), (1 << winNum));
+        }
+        else
+        {   /* Overlap detected */
+            mvOsPrintf("mvEthTargetWinEnable:ERR. Overlap detected\n");
+            return MV_ERROR;
+        }
+    }
+    else
+    {   /* Disable address decode target window                             */
+        MV_REG_BIT_SET(ETH_BASE_ADDR_ENABLE_REG(port), (1 << winNum));
+    }
+    return MV_OK;
+}
+ 
+/*******************************************************************************
+* mvEthWinTargetGet - Get Window number associated with target
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*
+* RETURN:
+*       window number
+*
+*******************************************************************************/
+MV_U32  mvEthWinTargetGet(int port, MV_TARGET target)
+{
+    MV_ETH_DEC_WIN decWin;
+    MV_U32 winNum;
+
+    /* Check parameters */
+    if (target >= MAX_TARGETS)
+    {
+        mvOsPrintf("mvAhbToMbusWinTargetGet: target %d is Illigal\n", target);
+        return 0xffffffff;
+    }
+
+    for (winNum=0; winNum<ETH_MAX_DECODE_WIN; winNum++)
+    {
+        if (mvEthWinGet(port, winNum,&decWin) != MV_OK)
+        {
+            mvOsPrintf("mvAhbToMbusWinTargetGet: window returned error\n");
+            return 0xffffffff;
+        }
+
+        if (decWin.enable == MV_TRUE)
+        {
+            if (decWin.target == target)
+            {
+                return winNum;
+            }  
+        }
+    }
+    return 0xFFFFFFFF;
+}
+ 
+/*******************************************************************************
+* mvEthProtWinSet - Set access protection of Ethernet to target window.
+*
+* DESCRIPTION:
+*       Each Ethernet port can be configured with access attributes for each 
+*       of the Ethenret to target windows (address decode windows). This
+*       function sets access attributes to a given window for the given channel.
+*
+* INPUTS:
+*       ethPort   - ETH channel number. See MV_ETH_CHANNEL enumerator.
+*       winNum - IETH to target address decode window number.
+*       access - IETH access rights. See MV_ACCESS_RIGHTS enumerator.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_ERROR in case window number is invalid or access right reserved.
+*
+*******************************************************************************/
+MV_STATUS mvEthProtWinSet(MV_U32 portNo, MV_U32 winNum, MV_ACCESS_RIGHTS access)
+{    
+    MV_U32 protReg;
+
+    /* Parameter checking   */
+    if(portNo >= mvCtrlEthMaxPortGet())
+    {
+        mvOsPrintf("mvEthProtWinSet:ERR. Invalid port number %d\n", portNo);
+        return MV_ERROR;
+    }
+    
+    if (winNum >= ETH_MAX_DECODE_WIN)
+    {
+            mvOsPrintf("mvEthProtWinSet:ERR. Invalid winNum%d\n",winNum);
+            return MV_ERROR;
+    }
+
+    if((access == ACC_RESERVED) || (access >= MAX_ACC_RIGHTS))
+    {
+        mvOsPrintf("mvEthProtWinSet:ERR. Inv access param %d\n", access);
+        return MV_ERROR;
+    }
+    /* Read current protection register */
+    protReg = MV_REG_READ(ETH_ACCESS_PROTECT_REG(portNo));
+                          
+    /* Clear protection window field */
+    protReg &= ~(ETH_PROT_WIN_MASK(winNum));
+
+    /* Set new protection field value */
+    protReg |= (access << (ETH_PROT_WIN_OFFS(winNum)));
+    
+    /* Write protection register back   */
+    MV_REG_WRITE(ETH_ACCESS_PROTECT_REG(portNo), protReg);
+
+    return MV_OK;
+}               
+
+/*******************************************************************************
+* ethWinOverlapDetect - Detect ETH address windows overlapping
+*
+* DESCRIPTION:
+*       An unpredicted behaviur is expected in case ETH address decode
+*       windows overlapps.
+*       This function detects ETH address decode windows overlapping of a
+*       specified window. The function does not check the window itself for
+*       overlapping. The function also skipps disabled address decode windows.
+*
+* INPUT:
+*       winNum      - address decode window number.
+*       pAddrDecWin - An address decode window struct.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE if the given address window overlap current address
+*       decode map, MV_FALSE otherwise, MV_ERROR if reading invalid data
+*       from registers.
+*
+*******************************************************************************/
+static MV_STATUS ethWinOverlapDetect(int port, MV_U32 winNum, MV_ADDR_WIN *pAddrWin)
+{
+    MV_U32              baseAddrEnableReg;
+    MV_U32              winNumIndex;
+    MV_ETH_DEC_WIN      addrDecWin;
+                                                                                                                             
+    /* Read base address enable register. Do not check disabled windows     */
+    baseAddrEnableReg = MV_REG_READ(ETH_BASE_ADDR_ENABLE_REG(port));
+                                                                                                                             
+    for (winNumIndex=0; winNumIndex<ETH_MAX_DECODE_WIN; winNumIndex++)
+    {
+        /* Do not check window itself           */
+        if (winNumIndex == winNum)
+        {
+            continue;
+        }
+    
+        /* Do not check disabled windows        */
+        if (baseAddrEnableReg & (1 << winNumIndex))
+        {
+            continue;
+        }
+    
+        /* Get window parameters        */
+        if (MV_OK != mvEthWinGet(port, winNumIndex, &addrDecWin))
+        {
+            mvOsPrintf("ethWinOverlapDetect: ERR. TargetWinGet failed\n");
+            return MV_ERROR;
+        }
+/*    
+        mvOsPrintf("ethWinOverlapDetect:\n
+            winNumIndex =%d baseHigh =0x%x baseLow=0x%x size=0x%x enable=0x%x\n",
+            winNumIndex,
+            addrDecWin.addrWin.baseHigh,
+            addrDecWin.addrWin.baseLow,
+            addrDecWin.addrWin.size,
+            addrDecWin.enable);
+*/
+        if (MV_TRUE == ctrlWinOverlapTest(pAddrWin, &(addrDecWin.addrWin)))
+        {
+            return MV_TRUE;
+        }
+    }
+    return MV_FALSE;
+}
+
+/*******************************************************************************
+* mvEthAddrDecShow - Print the Etherent address decode map.
+*
+* DESCRIPTION:
+*       This function print the Etherent address decode map.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+void    mvEthPortAddrDecShow(int port)
+{
+    MV_ETH_DEC_WIN  win;
+    int             i;
+
+    mvOsOutput( "\n" );
+    mvOsOutput( "ETH %d:\n", port );
+    mvOsOutput( "----\n" );
+
+    for( i = 0; i < ETH_MAX_DECODE_WIN; i++ )
+    {
+        memset( &win, 0, sizeof(ETH_MAX_DECODE_WIN) );
+
+        mvOsOutput( "win%d - ", i );
+
+        if( mvEthWinGet(port, i, &win ) == MV_OK )
+        {
+            if( win.enable )
+            {
+                mvOsOutput( "%s base %08x, ",
+                mvCtrlTargetNameGet(win.target), win.addrWin.baseLow );
+                mvOsOutput( "...." );
+                mvSizePrint( win.addrWin.size );
+
+                mvOsOutput( "\n" );
+            }
+            else
+                mvOsOutput( "disable\n" );
+        }
+    }
+    return;
+}
+
+void    mvEthAddrDecShow(void)
+{
+    int port;
+
+    for(port=0; port<mvCtrlEthMaxPortGet(); port++)
+    {
+	if (MV_FALSE == mvCtrlPwrClckGet(ETH_GIG_UNIT_ID, port)) continue;
+    
+        mvEthPortAddrDecShow(port);
+    }
+}
+
+
+void    mvEthInit(void)
+{
+    MV_U32 port;
+
+    /* Power down all existing ports */
+    for(port=0; port<mvCtrlEthMaxPortGet(); port++)
+    {
+	if (MV_FALSE == mvCtrlPwrClckGet(ETH_GIG_UNIT_ID, port)) continue;
+
+	mvEthWinInit(port);
+    }
+    mvEthHalInit();
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysSata.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysSata.h
@@ -0,0 +1,128 @@
+
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+#ifndef __INCMVSysSataAddrDech
+#define __INCMVSysSataAddrDech
+
+#include "mvCommon.h"
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "ctrlEnv/sys/mvCpuIf.h"
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct _mvSataDecWin
+{
+    MV_TARGET     target;
+    MV_ADDR_WIN   addrWin;    /* An address window*/
+    MV_BOOL       enable;     /* Address decode window is enabled/disabled    */
+ 
+} MV_SATA_DEC_WIN;
+
+
+#define MV_SATA_MAX_ADDR_DECODE_WIN 4
+
+#define MV_SATA_WIN_CTRL_REG(dev, win)        (SATA_REG_BASE + 0x30 + ((win)<<4))
+#define MV_SATA_WIN_BASE_REG(dev, win)        (SATA_REG_BASE + 0x34 + ((win)<<4))
+
+/* BITs in Bridge Interrupt Cause and Mask registers */
+#define MV_SATA_ADDR_DECODE_ERROR_BIT        0
+#define MV_SATA_ADDR_DECODE_ERROR_MASK       (1<<MV_SATA_ADDR_DECODE_ERROR_BIT)
+
+/* BITs in Windows 0-3 Control and Base Registers */
+#define MV_SATA_WIN_ENABLE_BIT               0
+#define MV_SATA_WIN_ENABLE_MASK              (1<<MV_SATA_WIN_ENABLE_BIT)
+
+#define MV_SATA_WIN_TARGET_OFFSET            4
+#define MV_SATA_WIN_TARGET_MASK              (0xF<<MV_SATA_WIN_TARGET_OFFSET)
+
+#define MV_SATA_WIN_ATTR_OFFSET              8
+#define MV_SATA_WIN_ATTR_MASK                (0xFF<<MV_SATA_WIN_ATTR_OFFSET)
+
+#define MV_SATA_WIN_SIZE_OFFSET              16
+#define MV_SATA_WIN_SIZE_MASK                (0xFFFF<<MV_SATA_WIN_SIZE_OFFSET)
+
+#define MV_SATA_WIN_BASE_OFFSET              16
+#define MV_SATA_WIN_BASE_MASK                (0xFFFF<<MV_SATA_WIN_BASE_OFFSET)
+
+MV_STATUS mvSataWinGet(int dev, MV_U32 winNum, MV_SATA_DEC_WIN *pAddrDecWin);
+MV_STATUS mvSataWinSet(int dev, MV_U32 winNum, MV_SATA_DEC_WIN *pAddrDecWin);
+MV_STATUS mvSataWinByTargetGet(MV_TARGET target, MV_SATA_DEC_WIN *pAddrDecWin);
+MV_STATUS mvSataWinInit(MV_VOID);
+MV_VOID   mvSataAddrDecShow(MV_VOID);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif
+
+
+
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvAhbToMbus.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvAhbToMbus.c
@@ -0,0 +1,1032 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+/* includes */
+#include "ctrlEnv/sys/mvAhbToMbus.h"
+#include "ctrlEnv/mvCtrlEnvAddrDec.h"
+
+#undef MV_DEBUG
+/* defines  */
+#ifdef MV_DEBUG
+	#define DB(x)	x
+#else
+	#define DB(x)
+#endif
+
+/* typedefs */
+
+
+/* CPU address remap registers offsets are inconsecutive. This struct 		*/
+/* describes address remap register offsets									*/
+typedef struct _ahbToMbusRemapRegOffs
+{
+    MV_U32 lowRegOffs;		/* Low 32-bit remap register offset			*/
+    MV_U32 highRegOffs;		/* High 32 bit remap register offset		*/
+}AHB_TO_MBUS_REMAP_REG_OFFS;
+
+/* locals   */
+static MV_STATUS ahbToMbusRemapRegOffsGet	(MV_U32 winNum,
+										AHB_TO_MBUS_REMAP_REG_OFFS *pRemapRegs);
+
+/*******************************************************************************
+* mvAhbToMbusInit - Initialize Ahb To Mbus Address Map !
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_OK laways.
+*
+*******************************************************************************/
+MV_STATUS mvAhbToMbusInit(void)
+{
+	return MV_OK;
+
+}
+
+/*******************************************************************************
+* mvAhbToMbusWinSet - Set CPU-to-peripheral winNum address window
+*
+* DESCRIPTION:
+*       This function sets
+*       address window, also known as address decode window.
+*       A new address decode window is set for specified winNum address window.
+*       If address decode window parameter structure enables the window,
+*       the routine will also enable the winNum window, allowing CPU to access
+*       the winNum window.
+*
+* INPUT:
+*       winNum      - Windows number.
+*       pAddrDecWin - CPU winNum window data structure.
+*
+* OUTPUT:
+*       N/A
+*
+* RETURN:
+*       MV_OK if CPU winNum window was set correctly, MV_ERROR in case of
+*       address window overlapps with other active CPU winNum window or
+*		trying to assign 36bit base address while CPU does not support that.
+*       The function returns MV_NOT_SUPPORTED, if the winNum is unsupported.
+*
+*******************************************************************************/
+MV_STATUS mvAhbToMbusWinSet(MV_U32 winNum, MV_AHB_TO_MBUS_DEC_WIN *pAddrDecWin)
+{
+	MV_TARGET_ATTRIB targetAttribs;
+	MV_DEC_REGS decRegs;
+
+	/* Parameter checking   */
+	if (winNum >= MAX_AHB_TO_MBUS_WINS)
+	{
+		mvOsPrintf("mvAhbToMbusWinSet: ERR. Invalid winNum %d\n", winNum);
+		return MV_NOT_SUPPORTED;
+	}
+
+
+	/* read base register*/
+	if (winNum != MV_AHB_TO_MBUS_INTREG_WIN)
+	{
+		decRegs.baseReg = MV_REG_READ(AHB_TO_MBUS_WIN_BASE_REG(winNum));
+	}
+	else
+	{
+		decRegs.baseReg = MV_REG_READ(AHB_TO_MBUS_WIN_INTEREG_REG);
+	}
+
+	/* check if address is aligned to the size */
+	if(MV_IS_NOT_ALIGN(pAddrDecWin->addrWin.baseLow, pAddrDecWin->addrWin.size))
+	{
+		mvOsPrintf("mvAhbToMbusWinSet:Error setting AHB to MBUS window %d to "\
+				   "target %s.\nAddress 0x%08x is unaligned to size 0x%x.\n",
+				   winNum,
+				   mvCtrlTargetNameGet(pAddrDecWin->target),
+				   pAddrDecWin->addrWin.baseLow,
+				   pAddrDecWin->addrWin.size);
+		return MV_ERROR;
+	}
+
+	/* read control register*/
+	if (winNum != MV_AHB_TO_MBUS_INTREG_WIN)
+	{
+		decRegs.sizeReg = MV_REG_READ(AHB_TO_MBUS_WIN_CTRL_REG(winNum));
+	}
+
+	if (MV_OK != mvCtrlAddrDecToReg(&(pAddrDecWin->addrWin),&decRegs))
+	{
+		mvOsPrintf("mvAhbToMbusWinSet:mvCtrlAddrDecToReg Failed\n");
+		return MV_ERROR;
+	}
+
+	/* enable\Disable */
+	if (MV_TRUE == pAddrDecWin->enable)
+	{
+		decRegs.sizeReg |= ATMWCR_WIN_ENABLE;
+	}
+	else
+	{
+		decRegs.sizeReg &= ~ATMWCR_WIN_ENABLE;
+	}
+
+	mvCtrlAttribGet(pAddrDecWin->target,&targetAttribs);
+
+	/* set attributes */
+	decRegs.sizeReg &= ~ATMWCR_WIN_ATTR_MASK;
+	decRegs.sizeReg |= targetAttribs.attrib << ATMWCR_WIN_ATTR_OFFS;
+	/* set target ID */
+	decRegs.sizeReg &= ~ATMWCR_WIN_TARGET_MASK;
+	decRegs.sizeReg |= targetAttribs.targetId << ATMWCR_WIN_TARGET_OFFS;
+
+#if !defined(MV_RUN_FROM_FLASH)
+    /* To be on the safe side we disable the window before writing the  */
+    /* new values.                                                      */
+	if (winNum != MV_AHB_TO_MBUS_INTREG_WIN)
+	{
+		mvAhbToMbusWinEnable(winNum,MV_FALSE);
+	}
+#endif
+
+	/* 3) Write to address decode Base Address Register                   */
+	if (winNum != MV_AHB_TO_MBUS_INTREG_WIN)
+	{
+		MV_REG_WRITE(AHB_TO_MBUS_WIN_BASE_REG(winNum), decRegs.baseReg);
+	}
+	else
+	{
+		MV_REG_WRITE(AHB_TO_MBUS_WIN_INTEREG_REG, decRegs.baseReg);
+	}
+
+
+	/* Internal register space have no size	*/
+	/* register. Do not perform size register assigment for those targets 	*/
+	if (winNum != MV_AHB_TO_MBUS_INTREG_WIN)
+	{
+		/* Write to address decode Size Register                        	*/
+		MV_REG_WRITE(AHB_TO_MBUS_WIN_CTRL_REG(winNum), decRegs.sizeReg);
+	}
+
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvAhbToMbusWinGet - Get CPU-to-peripheral winNum address window
+*
+* DESCRIPTION:
+*		Get the CPU peripheral winNum address window.
+*
+* INPUT:
+*       winNum - Peripheral winNum enumerator
+*
+* OUTPUT:
+*       pAddrDecWin - CPU winNum window information data structure.
+*
+* RETURN:
+*       MV_OK if winNum exist, MV_ERROR otherwise.
+*
+*******************************************************************************/
+MV_STATUS mvAhbToMbusWinGet(MV_U32 winNum, MV_AHB_TO_MBUS_DEC_WIN *pAddrDecWin)
+{
+	MV_DEC_REGS decRegs;
+	MV_TARGET_ATTRIB targetAttrib;
+
+
+	/* Parameter checking   */
+	if (winNum >= MAX_AHB_TO_MBUS_WINS)
+	{
+		mvOsPrintf("mvAhbToMbusWinGet: ERR. Invalid winNum %d\n", winNum);
+		return MV_NOT_SUPPORTED;
+	}
+
+
+	/* Internal register space size have no size register*/
+	if (winNum != MV_AHB_TO_MBUS_INTREG_WIN)
+	{
+		decRegs.sizeReg =  MV_REG_READ(AHB_TO_MBUS_WIN_CTRL_REG(winNum));
+	}
+	else
+	{
+		decRegs.sizeReg = 0;
+	}
+
+
+	/* Read base and size	*/
+	if (winNum != MV_AHB_TO_MBUS_INTREG_WIN)
+	{
+		decRegs.baseReg = MV_REG_READ(AHB_TO_MBUS_WIN_BASE_REG(winNum));
+	}
+	else
+	{
+		decRegs.baseReg = MV_REG_READ(AHB_TO_MBUS_WIN_INTEREG_REG);
+	}
+
+
+
+	if (MV_OK != mvCtrlRegToAddrDec(&decRegs,&(pAddrDecWin->addrWin)))
+	{
+		mvOsPrintf("mvAhbToMbusWinGet: mvCtrlRegToAddrDec Failed \n");
+		return MV_ERROR;
+	}
+
+	if (winNum == MV_AHB_TO_MBUS_INTREG_WIN)
+	{
+        pAddrDecWin->addrWin.size = INTER_REGS_SIZE;
+		pAddrDecWin->target = INTER_REGS;
+		pAddrDecWin->enable = MV_TRUE;
+
+		return MV_OK;
+	}
+
+
+	if (decRegs.sizeReg & ATMWCR_WIN_ENABLE)
+	{
+		pAddrDecWin->enable = MV_TRUE;
+	}
+	else
+	{
+		pAddrDecWin->enable = MV_FALSE;
+
+	}
+
+
+
+	if (-1 == pAddrDecWin->addrWin.size)
+	{
+		return MV_ERROR;
+	}
+
+
+	/* attrib and targetId */
+	targetAttrib.attrib = (decRegs.sizeReg & ATMWCR_WIN_ATTR_MASK) >>
+													ATMWCR_WIN_ATTR_OFFS;
+	targetAttrib.targetId = (decRegs.sizeReg & ATMWCR_WIN_TARGET_MASK) >>
+													ATMWCR_WIN_TARGET_OFFS;
+
+	pAddrDecWin->target = mvCtrlTargetGet(&targetAttrib);
+
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvAhbToMbusWinTargetGet - Get Window number associated with target
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*
+* RETURN:
+*
+*******************************************************************************/
+MV_U32	  mvAhbToMbusWinTargetGet(MV_TARGET target)
+{
+	MV_AHB_TO_MBUS_DEC_WIN decWin;
+	MV_U32 winNum;
+
+	/* Check parameters */
+	if (target >= MAX_TARGETS)
+	{
+		mvOsPrintf("mvAhbToMbusWinTargetGet: target %d is Illigal\n", target);
+		return 0xffffffff;
+	}
+
+	if (INTER_REGS == target)
+	{
+		return MV_AHB_TO_MBUS_INTREG_WIN;
+	}
+
+	for (winNum = 0; winNum < MAX_AHB_TO_MBUS_WINS ; winNum++)
+	{
+		if (winNum == MV_AHB_TO_MBUS_INTREG_WIN)
+			continue;
+
+		if (mvAhbToMbusWinGet(winNum,&decWin) != MV_OK)
+		{
+			mvOsPrintf("mvAhbToMbusWinTargetGet: mvAhbToMbusWinGet fail\n");
+			return 0xffffffff;
+
+		}
+
+		if (decWin.enable == MV_TRUE)
+		{
+			if (decWin.target == target)
+			{
+				return winNum;
+			}
+
+		}
+
+	}
+
+	return 0xFFFFFFFF;
+
+
+}
+
+/*******************************************************************************
+* mvAhbToMbusWinAvailGet - Get First Available window number.
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*
+* RETURN:
+*
+*******************************************************************************/
+MV_U32    mvAhbToMbusWinAvailGet(MV_VOID)
+{
+        MV_AHB_TO_MBUS_DEC_WIN decWin;
+        MV_U32 winNum;
+
+        for (winNum = 0; winNum < MAX_AHB_TO_MBUS_WINS ; winNum++)
+        {
+                if (winNum == MV_AHB_TO_MBUS_INTREG_WIN)
+                        continue;
+
+                if (mvAhbToMbusWinGet(winNum,&decWin) != MV_OK)
+                {
+                        mvOsPrintf("mvAhbToMbusWinTargetGet: mvAhbToMbusWinGet fail\n");
+                        return 0xffffffff;
+
+                }
+
+                if (decWin.enable == MV_FALSE)
+                {
+			return winNum;
+                }
+
+        }
+
+        return 0xFFFFFFFF;
+}
+
+
+/*******************************************************************************
+* mvAhbToMbusWinEnable - Enable/disable a CPU address decode window
+*
+* DESCRIPTION:
+*       This function enable/disable a CPU address decode window.
+*       if parameter 'enable' == MV_TRUE the routine will enable the
+*       window, thus enabling CPU accesses (before enabling the window it is
+*       tested for overlapping). Otherwise, the window will be disabled.
+*
+* INPUT:
+*       winNum - Peripheral winNum enumerator.
+*       enable - Enable/disable parameter.
+*
+* OUTPUT:
+*       N/A
+*
+* RETURN:
+*       MV_ERROR if protection window number was wrong, or the window
+*       overlapps other winNum window.
+*
+*******************************************************************************/
+MV_STATUS mvAhbToMbusWinEnable(MV_U32 winNum, MV_BOOL enable)
+{
+
+	/* Parameter checking   */
+	if (winNum >= MAX_AHB_TO_MBUS_WINS)
+	{
+		mvOsPrintf("mvAhbToMbusWinEnable: ERR. Invalid winNum %d\n", winNum);
+		return MV_NOT_SUPPORTED;
+	}
+
+	/* Internal registers bar can't be disable or enabled */
+	if (winNum == MV_AHB_TO_MBUS_INTREG_WIN)
+	{
+		return (enable ? MV_OK : MV_ERROR);
+	}
+
+    if (enable == MV_TRUE)
+    {
+		/* enable the window */
+		MV_REG_BIT_SET(AHB_TO_MBUS_WIN_CTRL_REG(winNum), ATMWCR_WIN_ENABLE);
+    }
+    else
+    {   /* Disable address decode winNum window                             */
+		MV_REG_BIT_RESET(AHB_TO_MBUS_WIN_CTRL_REG(winNum), ATMWCR_WIN_ENABLE);
+    }
+
+	return MV_OK;
+}
+
+
+/*******************************************************************************
+* mvAhbToMbusWinRemap - Set CPU remap register for address windows.
+*
+* DESCRIPTION:
+*       After a CPU address hits one of PCI address decode windows there is an
+*       option to remap the address to a different one. For example, CPU
+*       executes a read from PCI winNum window address 0x1200.0000. This
+*       can be modified so the address on the PCI bus would be 0x1400.0000
+*       Using the PCI address remap mechanism.
+*
+* INPUT:
+*       winNum      - Peripheral winNum enumerator. Must be a PCI winNum.
+*       pAddrDecWin - CPU winNum window information data structure.
+*                     Note that caller has to fill in the base field only. The
+*                     size field is ignored.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_ERROR if winNum is not a PCI one, MV_OK otherwise.
+*
+*******************************************************************************/
+MV_U32 mvAhbToMbusWinRemap(MV_U32 winNum, MV_ADDR_WIN *pAddrWin)
+{
+    MV_U32 baseAddr;
+	AHB_TO_MBUS_REMAP_REG_OFFS remapRegOffs;
+
+    MV_U32 effectiveBaseAddress=0,
+		   baseAddrValue=0,windowSizeValue=0;
+
+
+	/* Get registers offsets of given winNum 		*/
+	if (MV_NO_SUCH == ahbToMbusRemapRegOffsGet(winNum, &remapRegOffs))
+	{
+		return 0xffffffff;
+	}
+
+	/* 1) Set address remap low */
+    baseAddr = pAddrWin->baseLow;
+
+    /* Check base address aligment 					*/
+	/*
+	if (MV_IS_NOT_ALIGN(baseAddr, ATMWRLR_REMAP_LOW_ALIGNMENT))
+	{
+        mvOsPrintf("mvAhbToMbusPciRemap: Warning. Target base 0x%x unaligned\n",
+																baseAddr);
+        return MV_ERROR;
+	}
+	*/
+
+	/* BaseLow[31:16] => base register [31:16] 		*/
+	baseAddr = baseAddr & ATMWRLR_REMAP_LOW_MASK;
+
+    MV_REG_WRITE(remapRegOffs.lowRegOffs, baseAddr);
+
+	MV_REG_WRITE(remapRegOffs.highRegOffs, pAddrWin->baseHigh);
+
+
+	baseAddrValue = MV_REG_READ(AHB_TO_MBUS_WIN_BASE_REG(winNum));
+	windowSizeValue = MV_REG_READ(AHB_TO_MBUS_WIN_CTRL_REG(winNum));
+
+	baseAddrValue &= ATMWBR_BASE_MASK;
+	windowSizeValue &=ATMWCR_WIN_SIZE_MASK;
+
+   /* Start calculating the effective Base Address */
+   effectiveBaseAddress = baseAddrValue ;
+
+   /* The effective base address will be combined from the chopped (if any)
+	  remap value (according to the size value and remap mechanism) and the
+	  window's base address */
+   effectiveBaseAddress |= (((windowSizeValue) | 0xffff) & pAddrWin->baseLow);
+   /* If the effectiveBaseAddress exceed the window boundaries return an
+	  invalid value. */
+
+   if (effectiveBaseAddress > (baseAddrValue + (windowSizeValue | 0xffff)))
+   {
+		mvOsPrintf("mvAhbToMbusPciRemap: Error\n");
+		return 0xffffffff;
+   }
+
+	return effectiveBaseAddress;
+
+
+}
+/*******************************************************************************
+* mvAhbToMbusWinTargetSwap - Swap AhbToMbus windows between targets
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       target1      - CPU Interface target 1
+*       target2      - CPU Interface target 2
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_ERROR if targets are illigal, or if one of the targets is not
+*	    associated to a valid window .
+*       MV_OK otherwise.
+*
+*******************************************************************************/
+
+
+MV_STATUS mvAhbToMbusWinTargetSwap(MV_TARGET target1,MV_TARGET target2)
+{
+	MV_U32 winNum1,winNum2;
+	MV_AHB_TO_MBUS_DEC_WIN winDec1,winDec2,winDecTemp;
+	AHB_TO_MBUS_REMAP_REG_OFFS remapRegs1,remapRegs2;
+	MV_U32 remapBaseLow1=0,remapBaseLow2=0;
+	MV_U32 remapBaseHigh1=0,remapBaseHigh2=0;
+
+
+	/* Check parameters */
+	if (target1 >= MAX_TARGETS)
+	{
+		mvOsPrintf("mvAhbToMbusWinTargetSwap: target %d is Illigal\n", target1);
+		return MV_ERROR;
+	}
+
+	if (target2 >= MAX_TARGETS)
+	{
+		mvOsPrintf("mvAhbToMbusWinTargetSwap: target %d is Illigal\n", target1);
+		return MV_ERROR;
+	}
+
+
+    /* get window associated with this target */
+	winNum1 = mvAhbToMbusWinTargetGet(target1);
+
+	if (winNum1 == 0xffffffff)
+	{
+		mvOsPrintf("mvAhbToMbusWinTargetSwap: target %d has illigal win %d\n",
+					target1,winNum1);
+		return MV_ERROR;
+
+	}
+
+    /* get window associated with this target */
+	winNum2 = mvAhbToMbusWinTargetGet(target2);
+
+	if (winNum2 == 0xffffffff)
+	{
+		mvOsPrintf("mvAhbToMbusWinTargetSwap: target %d has illigal win %d\n",
+					target2,winNum2);
+		return MV_ERROR;
+
+	}
+
+	/* now Get original values of both Windows */
+	if (MV_OK != mvAhbToMbusWinGet(winNum1,&winDec1))
+	{
+		mvOsPrintf("mvAhbToMbusWinTargetSwap: mvAhbToMbusWinGet failed win %d\n",
+					winNum1);
+		return MV_ERROR;
+
+	}
+	if (MV_OK != mvAhbToMbusWinGet(winNum2,&winDec2))
+	{
+		mvOsPrintf("mvAhbToMbusWinTargetSwap: mvAhbToMbusWinGet failed win %d\n",
+					winNum2);
+		return MV_ERROR;
+
+	}
+
+
+	/* disable both windows */
+	if (MV_OK != mvAhbToMbusWinEnable(winNum1,MV_FALSE))
+	{
+		mvOsPrintf("mvAhbToMbusWinTargetSwap: failed to enable window %d\n",
+					winNum1);
+		return MV_ERROR;
+
+	}
+	if (MV_OK != mvAhbToMbusWinEnable(winNum2,MV_FALSE))
+	{
+		mvOsPrintf("mvAhbToMbusWinTargetSwap: failed to enable windo %d\n",
+					winNum2);
+		return MV_ERROR;
+
+	}
+
+
+	/* now swap targets */
+
+	/* first save winDec2 values */
+	winDecTemp.addrWin.baseHigh = winDec2.addrWin.baseHigh;
+	winDecTemp.addrWin.baseLow = winDec2.addrWin.baseLow;
+	winDecTemp.addrWin.size = winDec2.addrWin.size;
+	winDecTemp.enable = winDec2.enable;
+	winDecTemp.target = winDec2.target;
+
+	/* winDec2 = winDec1 */
+	winDec2.addrWin.baseHigh = winDec1.addrWin.baseHigh;
+	winDec2.addrWin.baseLow = winDec1.addrWin.baseLow;
+	winDec2.addrWin.size = winDec1.addrWin.size;
+	winDec2.enable = winDec1.enable;
+	winDec2.target = winDec1.target;
+
+
+	/* winDec1 = winDecTemp */
+	winDec1.addrWin.baseHigh = winDecTemp.addrWin.baseHigh;
+	winDec1.addrWin.baseLow = winDecTemp.addrWin.baseLow;
+	winDec1.addrWin.size = winDecTemp.addrWin.size;
+	winDec1.enable = winDecTemp.enable;
+	winDec1.target = winDecTemp.target;
+
+
+	/* now set the new values */
+
+
+    mvAhbToMbusWinSet(winNum1,&winDec1);
+	mvAhbToMbusWinSet(winNum2,&winDec2);
+
+
+
+
+
+	/* now we will treat the remap windows if exist */
+
+
+	/* now check if one or both windows has a remap window
+	as well after the swap ! */
+
+	/* if a window had a remap value differnt than the base value
+	before the swap , then after the swap the remap value will be
+	equal to the base value unless both windows has a remap windows*/
+
+	/* first get old values */
+	if (MV_NO_SUCH != ahbToMbusRemapRegOffsGet(winNum1,&remapRegs1))
+	{
+		remapBaseLow1 = MV_REG_READ(remapRegs1.lowRegOffs);
+	    remapBaseHigh1 = MV_REG_READ(remapRegs1.highRegOffs);
+
+	}
+	if (MV_NO_SUCH != ahbToMbusRemapRegOffsGet(winNum2,&remapRegs2))
+	{
+		remapBaseLow2 = MV_REG_READ(remapRegs2.lowRegOffs);
+	    remapBaseHigh2 = MV_REG_READ(remapRegs2.highRegOffs);
+
+
+	}
+
+	/* now do the swap */
+	if (MV_NO_SUCH != ahbToMbusRemapRegOffsGet(winNum1,&remapRegs1))
+	{
+		if (MV_NO_SUCH != ahbToMbusRemapRegOffsGet(winNum2,&remapRegs2))
+		{
+			/* Two windows has a remap !!! so swap */
+
+			MV_REG_WRITE(remapRegs2.highRegOffs,remapBaseHigh1);
+			MV_REG_WRITE(remapRegs2.lowRegOffs,remapBaseLow1);
+
+			MV_REG_WRITE(remapRegs1.highRegOffs,remapBaseHigh2);
+			MV_REG_WRITE(remapRegs1.lowRegOffs,remapBaseLow2);
+
+
+
+		}
+		else
+		{
+			/* remap == base */
+			MV_REG_WRITE(remapRegs1.highRegOffs,winDec1.addrWin.baseHigh);
+			MV_REG_WRITE(remapRegs1.lowRegOffs,winDec1.addrWin.baseLow);
+
+		}
+
+	}
+	else if (MV_NO_SUCH != ahbToMbusRemapRegOffsGet(winNum2,&remapRegs2))
+	{
+		/* remap == base */
+		MV_REG_WRITE(remapRegs2.highRegOffs,winDec2.addrWin.baseHigh);
+		MV_REG_WRITE(remapRegs2.lowRegOffs,winDec2.addrWin.baseLow);
+
+	}
+
+
+
+	return MV_OK;
+
+
+}
+
+
+
+#if defined(MV_88F1181)
+
+/*******************************************************************************
+* mvAhbToMbusXbarCtrlSet - Set The CPU master Xbar arbitration.
+*
+* DESCRIPTION:
+*       This function sets CPU Mbus Arbiter
+*
+* INPUT:
+*       pPizzaArbArray - A priority Structure describing 16 "pizza slices". At
+*                    each clock cycle, the crossbar arbiter samples all
+*                    requests and gives the bus to the next agent according
+*                    to the "pizza".
+*
+* OUTPUT:
+*       N/A
+*
+* RETURN:
+*       MV_ERROR if paramers to function invalid.
+*
+*******************************************************************************/
+MV_STATUS  mvMbusArbSet(MV_MBUS_ARB_TARGET *pPizzaArbArray)
+{
+	MV_U32 sliceNum;
+	MV_U32 xbarCtrl = 0;
+	MV_MBUS_ARB_TARGET xbarTarget;
+
+	/* 1) Set crossbar control low register */
+	for (sliceNum = 0; sliceNum < MRLR_SLICE_NUM; sliceNum++)
+	{
+		xbarTarget = pPizzaArbArray[sliceNum];
+
+		/* sliceNum parameter check */
+		if (xbarTarget > MAX_MBUS_ARB_TARGETS)
+		{
+			mvOsPrintf("mvAhbToMbusXbarCtrlSet: ERR. Can't set Target %d\n",
+																  xbarTarget);
+			return MV_ERROR;
+		}
+		xbarCtrl |= (xbarTarget << MRLR_LOW_ARB_OFFS(sliceNum));
+	}
+	/* Write to crossbar control low register */
+    MV_REG_WRITE(MBUS_ARBITER_LOW_REG, xbarCtrl);
+
+	xbarCtrl = 0;
+
+	/* 2) Set crossbar control high register */
+	for (sliceNum = MRLR_SLICE_NUM;
+		 sliceNum < MRLR_SLICE_NUM+MRHR_SLICE_NUM;
+		 sliceNum++)
+	{
+
+		xbarTarget = pPizzaArbArray[sliceNum];
+
+		/* sliceNum parameter check */
+		if (xbarTarget > MAX_MBUS_ARB_TARGETS)
+		{
+			mvOsPrintf("mvAhbToMbusXbarCtrlSet: ERR. Can't set Target %d\n",
+																  xbarTarget);
+			return MV_ERROR;
+		}
+		xbarCtrl |= (xbarTarget << MRHR_HIGH_ARB_OFFS(sliceNum));
+	}
+	/* Write to crossbar control high register */
+    MV_REG_WRITE(MBUS_ARBITER_HIGH_REG, xbarCtrl);
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvMbusArbCtrlSet - Set MBus Arbiter control register
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       ctrl  - pointer to MV_MBUS_ARB_CTRL register
+*
+* OUTPUT:
+*       N/A
+*
+* RETURN:
+*       MV_ERROR if paramers to function invalid.
+*
+*******************************************************************************/
+MV_STATUS mvMbusArbCtrlSet(MV_MBUS_ARB_CTRL *ctrl)
+{
+
+	if (ctrl->highPrio == MV_FALSE)
+	{
+		MV_REG_BIT_RESET(MBUS_ARBITER_CTRL_REG, MACR_ARB_ARM_TOP);
+	}
+	else
+	{
+		MV_REG_BIT_SET(MBUS_ARBITER_CTRL_REG, MACR_ARB_ARM_TOP);
+	}
+
+	if (ctrl->fixedRoundRobin == MV_FALSE)
+	{
+		MV_REG_BIT_RESET(MBUS_ARBITER_CTRL_REG, MACR_ARB_TARGET_FIXED);
+	}
+	else
+	{
+		MV_REG_BIT_SET(MBUS_ARBITER_CTRL_REG, MACR_ARB_TARGET_FIXED);
+	}
+
+	if (ctrl->starvEn == MV_FALSE)
+	{
+		MV_REG_BIT_RESET(MBUS_ARBITER_CTRL_REG, MACR_ARB_REQ_CTRL_EN);
+	}
+	else
+	{
+		MV_REG_BIT_SET(MBUS_ARBITER_CTRL_REG, MACR_ARB_REQ_CTRL_EN);
+	}
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvMbusArbCtrlGet - Get MBus Arbiter control register
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       ctrl  - pointer to MV_MBUS_ARB_CTRL register
+*
+* OUTPUT:
+*       ctrl  - pointer to MV_MBUS_ARB_CTRL register
+*
+* RETURN:
+*       MV_ERROR if paramers to function invalid.
+*
+*******************************************************************************/
+MV_STATUS mvMbusArbCtrlGet(MV_MBUS_ARB_CTRL *ctrl)
+{
+
+	MV_U32 ctrlReg = MV_REG_READ(MBUS_ARBITER_CTRL_REG);
+
+	if (ctrlReg & MACR_ARB_ARM_TOP)
+	{
+		ctrl->highPrio = MV_TRUE;
+	}
+	else
+	{
+		ctrl->highPrio = MV_FALSE;
+	}
+
+	if (ctrlReg & MACR_ARB_TARGET_FIXED)
+	{
+		ctrl->fixedRoundRobin = MV_TRUE;
+	}
+	else
+	{
+		ctrl->fixedRoundRobin = MV_FALSE;
+	}
+
+	if (ctrlReg & MACR_ARB_REQ_CTRL_EN)
+	{
+		ctrl->starvEn = MV_TRUE;
+	}
+	else
+	{
+		ctrl->starvEn = MV_FALSE;
+	}
+
+
+	return MV_OK;
+}
+
+#endif  /* #if defined(MV_88F1181) */
+
+
+
+/*******************************************************************************
+* ahbToMbusRemapRegOffsGet - Get CPU address remap register offsets
+*
+* DESCRIPTION:
+* 		CPU to PCI address remap registers offsets are inconsecutive.
+*		This function returns PCI address remap registers offsets.
+*
+* INPUT:
+*       winNum - Address decode window number. See MV_U32 enumerator.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*		MV_ERROR if winNum is not a PCI one.
+*
+*******************************************************************************/
+static MV_STATUS ahbToMbusRemapRegOffsGet(MV_U32 winNum,
+									AHB_TO_MBUS_REMAP_REG_OFFS *pRemapRegs)
+{
+	switch (winNum)
+	{
+		case 0:
+        	case 1:
+		case 2:
+		case 3:
+			pRemapRegs->lowRegOffs  = AHB_TO_MBUS_WIN_REMAP_LOW_REG(winNum);
+			pRemapRegs->highRegOffs = AHB_TO_MBUS_WIN_REMAP_HIGH_REG(winNum);
+			break;
+		default:
+		{
+			pRemapRegs->lowRegOffs  = 0;
+			pRemapRegs->highRegOffs = 0;
+
+			DB(mvOsPrintf("ahbToMbusRemapRegOffsGet: ERR. Invalid winNum %d\n",
+						winNum));
+		   	return MV_NO_SUCH;
+		}
+	}
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvAhbToMbusAddDecShow - Print the AHB to MBus bridge address decode map.
+*
+* DESCRIPTION:
+*		This function print the CPU address decode map.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_VOID mvAhbToMbusAddDecShow(MV_VOID)
+{
+	MV_AHB_TO_MBUS_DEC_WIN win;
+	MV_U32 winNum;
+	mvOsOutput( "\n" );
+	mvOsOutput( "AHB To MBUS Bridge:\n" );
+	mvOsOutput( "-------------------\n" );
+
+	for( winNum = 0; winNum < MAX_AHB_TO_MBUS_WINS; winNum++ )
+	{
+		memset( &win, 0, sizeof(MV_AHB_TO_MBUS_DEC_WIN) );
+
+		mvOsOutput( "win%d - ", winNum );
+
+		if( mvAhbToMbusWinGet( winNum, &win ) == MV_OK )
+		{
+			if( win.enable )
+			{
+				mvOsOutput( "%s base %08x, ",
+				mvCtrlTargetNameGet(win.target), win.addrWin.baseLow );
+                		mvOsOutput( "...." );
+				mvSizePrint( win.addrWin.size );
+
+				mvOsOutput( "\n" );
+
+            }
+			else
+				mvOsOutput( "disable\n" );
+		}
+	}
+
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysDram.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysDram.h
@@ -0,0 +1,74 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#ifndef __sysDram
+#define __sysDram
+
+
+MV_STATUS mvDramIfWinSet(MV_TARGET target, MV_DRAM_DEC_WIN *pAddrDecWin);
+MV_STATUS mvDramIfWinGet(MV_TARGET target, MV_DRAM_DEC_WIN *pAddrDecWin);
+MV_STATUS mvDramIfWinEnable(MV_TARGET target, MV_BOOL enable);
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvAhbToMbus.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvAhbToMbus.h
@@ -0,0 +1,130 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#ifndef __INCmvAhbToMbush
+#define __INCmvAhbToMbush
+
+/* includes */
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "ctrlEnv/sys/mvAhbToMbusRegs.h"
+#include "ctrlEnv/mvCtrlEnvAddrDec.h"
+
+/* defines  */
+
+#if defined(MV_88F1181)
+/* This enumerator defines the Marvell controller possible MBUS arbiter     */
+/* target ports. It is used to define crossbar priority scheame (pizza)     */ 
+typedef enum _mvMBusArbTargetId
+{
+    DRAM_MBUS_ARB_TARGET = 0,    /* Port 0 -> DRAM interface         */
+    TWSI_MBUS_ARB_TARGET  = 1,     /* Port 1 -> TWSI 		    */
+    ARM_MBUS_ARB_TARGET   = 2,     /* Port 2 -> ARM		    */
+	PEX1_MBUS_ARB_TARGET  = 3,    /* Port 3 -> PCI Express 1		    */
+    PEX0_MBUS_ARB_TARGET  = 4,    /* Port 4 -> PCI Express0 		    */
+	MAX_MBUS_ARB_TARGETS
+}MV_MBUS_ARB_TARGET;
+
+typedef struct _mvMBusArbCtrl
+{
+	MV_BOOL starvEn;
+	MV_BOOL highPrio;
+	MV_BOOL fixedRoundRobin;
+
+}MV_MBUS_ARB_CTRL;
+
+#endif /* #if defined(MV_88F1181) */
+
+typedef struct _mvAhbtoMbusDecWin
+{
+	MV_TARGET	  target;
+	MV_ADDR_WIN   addrWin;    /* An address window*/
+	MV_BOOL       enable;     /* Address decode window is enabled/disabled    */
+
+}MV_AHB_TO_MBUS_DEC_WIN;
+
+/* mvAhbToMbus.h API list */
+
+MV_STATUS mvAhbToMbusInit(MV_VOID);
+MV_STATUS mvAhbToMbusWinSet(MV_U32 winNum, MV_AHB_TO_MBUS_DEC_WIN *pAddrDecWin);
+MV_STATUS mvAhbToMbusWinGet(MV_U32 winNum, MV_AHB_TO_MBUS_DEC_WIN *pAddrDecWin);
+MV_STATUS mvAhbToMbusWinEnable(MV_U32 winNum,MV_BOOL enable);
+MV_U32    mvAhbToMbusWinRemap(MV_U32 winNum, MV_ADDR_WIN *pAddrDecWin);
+MV_U32	  mvAhbToMbusWinTargetGet(MV_TARGET target);
+MV_U32    mvAhbToMbusWinAvailGet(MV_VOID);
+MV_STATUS mvAhbToMbusWinTargetSwap(MV_TARGET target1,MV_TARGET target2);
+
+#if defined(MV_88F1181)
+
+MV_STATUS mvMbusArbSet(MV_MBUS_ARB_TARGET *pPizzaArbArray);
+MV_STATUS mvMbusArbCtrlSet(MV_MBUS_ARB_CTRL *ctrl);
+MV_STATUS mvMbusArbCtrlGet(MV_MBUS_ARB_CTRL *ctrl);
+
+#endif /* #if defined(MV_88F1181) */
+
+
+MV_VOID   mvAhbToMbusAddDecShow(MV_VOID);
+
+
+#endif /* __INCmvAhbToMbush */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysSdmmc.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysSdmmc.c
@@ -0,0 +1,427 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#include "mvTypes.h"
+#include "mvCommon.h"
+#include "mvOs.h"
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "cpu/mvCpu.h"
+#include "ctrlEnv/sys/mvCpuIf.h"
+#include "mvRegs.h"
+#include "ctrlEnv/sys/mvSysSdmmc.h"
+
+MV_TARGET sdmmcAddrDecPrioTab[] =
+{
+#if defined(MV_INCLUDE_SDRAM_CS0)
+    SDRAM_CS0,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS1)
+    SDRAM_CS1,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS2)
+    SDRAM_CS2,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS3)
+    SDRAM_CS3,
+#endif
+#if defined(MV_INCLUDE_PEX)
+	PEX0_MEM,
+#endif
+	TBL_TERM
+};
+
+
+/*******************************************************************************
+* sdmmcWinOverlapDetect - Detect SDMMC address windows overlapping
+*
+* DESCRIPTION:
+*       An unpredicted behaviur is expected in case SDMMC address decode 
+*       windows overlapps.
+*       This function detects SDMMC address decode windows overlapping of a 
+*       specified window. The function does not check the window itself for 
+*       overlapping. The function also skipps disabled address decode windows.
+*
+* INPUT:
+*       winNum      - address decode window number.
+*       pAddrDecWin - An address decode window struct.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE if the given address window overlap current address
+*       decode map, MV_FALSE otherwise, MV_ERROR if reading invalid data 
+*       from registers.
+*
+*******************************************************************************/
+static MV_STATUS sdmmcWinOverlapDetect(int dev, MV_U32 winNum, 
+				      MV_ADDR_WIN *pAddrWin)
+{
+    MV_U32          winNumIndex;
+    MV_SDMMC_DEC_WIN  addrDecWin;
+
+    for(winNumIndex=0; winNumIndex<MV_SDMMC_MAX_ADDR_DECODE_WIN; winNumIndex++)
+    {
+        /* Do not check window itself       */
+        if (winNumIndex == winNum)
+        {
+            continue;
+        }
+
+        /* Get window parameters    */
+        if (MV_OK != mvSdmmcWinGet(dev, winNumIndex, &addrDecWin))
+        {
+            mvOsPrintf("%s: ERR. TargetWinGet failed\n", __FUNCTION__);
+            return MV_ERROR;
+        }
+
+        /* Do not check disabled windows    */
+        if(addrDecWin.enable == MV_FALSE)
+        {
+            continue;
+        }
+
+        if (MV_TRUE == ctrlWinOverlapTest(pAddrWin, &(addrDecWin.addrWin)))
+        {
+            return MV_TRUE;
+        }        
+    }
+    return MV_FALSE;
+}
+
+
+/*******************************************************************************
+* mvSdmmcWinSet - Set SDMMC target address window
+*
+* DESCRIPTION:
+*       This function sets a peripheral target (e.g. SDRAM bank0, PCI_MEM0) 
+*       address window, also known as address decode window. 
+*       After setting this target window, the SDMMC will be able to access the 
+*       target within the address window. 
+*
+* INPUT:
+*       winNum      - SDMMC target address decode window number.
+*       pAddrDecWin - SDMMC target window data structure.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_ERROR if address window overlapps with other address decode windows.
+*       MV_BAD_PARAM if base address is invalid parameter or target is 
+*       unknown.
+*
+*******************************************************************************/
+MV_STATUS mvSdmmcWinSet(int dev, MV_U32 winNum, MV_SDMMC_DEC_WIN *pAddrDecWin)
+{
+    MV_TARGET_ATTRIB    targetAttribs;
+    MV_DEC_REGS         decRegs;
+
+    /* Parameter checking   */
+    if (winNum >= MV_SDMMC_MAX_ADDR_DECODE_WIN)
+    {
+        mvOsPrintf("%s: ERR. Invalid win num %d\n",__FUNCTION__, winNum);
+        return MV_BAD_PARAM;
+    }
+    
+    /* Check if the requested window overlapps with current windows         */
+    if (MV_TRUE == sdmmcWinOverlapDetect(dev, winNum, &pAddrDecWin->addrWin))
+    {
+        mvOsPrintf("%s: ERR. Window %d overlap\n", __FUNCTION__, winNum);
+        return MV_ERROR;
+    }
+
+    /* check if address is aligned to the size */
+    if(MV_IS_NOT_ALIGN(pAddrDecWin->addrWin.baseLow, pAddrDecWin->addrWin.size))
+    {
+	mvOsPrintf("mvSdmmcWinSet:Error setting SDMMC window %d to "\
+		   "target %s.\nAddress 0x%08x is unaligned to size 0x%x.\n",
+		   winNum,
+		   mvCtrlTargetNameGet(pAddrDecWin->target), 
+		   pAddrDecWin->addrWin.baseLow,
+		   pAddrDecWin->addrWin.size);
+	return MV_ERROR;
+    }
+
+    decRegs.baseReg = 0;
+    decRegs.sizeReg = 0;
+
+    if (MV_OK != mvCtrlAddrDecToReg(&(pAddrDecWin->addrWin),&decRegs))
+    {
+        mvOsPrintf("%s: mvCtrlAddrDecToReg Failed\n", __FUNCTION__);
+        return MV_ERROR;
+    }
+
+    mvCtrlAttribGet(pAddrDecWin->target, &targetAttribs);
+                                                                                                                         
+    /* set attributes */
+    decRegs.sizeReg &= ~MV_SDMMC_WIN_ATTR_MASK;
+    decRegs.sizeReg |= (targetAttribs.attrib << MV_SDMMC_WIN_ATTR_OFFSET);
+
+    /* set target ID */
+    decRegs.sizeReg &= ~MV_SDMMC_WIN_TARGET_MASK;
+    decRegs.sizeReg |= (targetAttribs.targetId << MV_SDMMC_WIN_TARGET_OFFSET);
+
+    if (pAddrDecWin->enable == MV_TRUE)
+    {
+        decRegs.sizeReg |= MV_SDMMC_WIN_ENABLE_MASK;
+    }
+    else
+    {
+        decRegs.sizeReg &= ~MV_SDMMC_WIN_ENABLE_MASK;
+    }
+
+    MV_REG_WRITE( MV_SDMMC_WIN_CTRL_REG(dev, winNum), decRegs.sizeReg);
+    MV_REG_WRITE( MV_SDMMC_WIN_BASE_REG(dev, winNum), decRegs.baseReg);
+    
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvSdmmcWinGet - Get SDMMC peripheral target address window.
+*
+* DESCRIPTION:
+*       Get SDMMC peripheral target address window.
+*
+* INPUT:
+*       winNum - SDMMC target address decode window number.
+*d
+* OUTPUT:
+*       pAddrDecWin - SDMMC target window data structure.
+*
+* RETURN:
+*       MV_ERROR if register parameters are invalid.
+*
+*******************************************************************************/
+MV_STATUS mvSdmmcWinGet(int dev, MV_U32 winNum, MV_SDMMC_DEC_WIN *pAddrDecWin)
+{
+    MV_DEC_REGS         decRegs;
+    MV_TARGET_ATTRIB    targetAttrib;
+                                                                                                                         
+    /* Parameter checking   */
+    if (winNum >= MV_SDMMC_MAX_ADDR_DECODE_WIN)
+    {
+        mvOsPrintf("%s (dev=%d): ERR. Invalid winNum %d\n", 
+                    __FUNCTION__, dev, winNum);
+        return MV_NOT_SUPPORTED;
+    }
+
+    decRegs.baseReg = MV_REG_READ( MV_SDMMC_WIN_BASE_REG(dev, winNum) );
+    decRegs.sizeReg = MV_REG_READ( MV_SDMMC_WIN_CTRL_REG(dev, winNum) );
+ 
+    if (MV_OK != mvCtrlRegToAddrDec(&decRegs, &pAddrDecWin->addrWin) )
+    {
+        mvOsPrintf("%s: mvCtrlRegToAddrDec Failed\n", __FUNCTION__);
+        return MV_ERROR; 
+    }
+       
+    /* attrib and targetId */
+    targetAttrib.attrib = (decRegs.sizeReg & MV_SDMMC_WIN_ATTR_MASK) >> 
+		MV_SDMMC_WIN_ATTR_OFFSET;
+    targetAttrib.targetId = (decRegs.sizeReg & MV_SDMMC_WIN_TARGET_MASK) >> 
+		MV_SDMMC_WIN_TARGET_OFFSET;
+ 
+    pAddrDecWin->target = mvCtrlTargetGet(&targetAttrib);
+
+    /* Check if window is enabled   */
+    if(decRegs.sizeReg & MV_SDMMC_WIN_ENABLE_MASK) 
+    {
+        pAddrDecWin->enable = MV_TRUE;
+    }
+    else
+    {
+        pAddrDecWin->enable = MV_FALSE;
+    }
+    return MV_OK;
+}
+/*******************************************************************************
+* mvSdmmcAddrDecShow - Print the SDMMC address decode map.
+*
+* DESCRIPTION:
+*		This function print the SDMMC address decode map.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_VOID mvSdmmcAddrDecShow(MV_VOID)
+{
+
+	MV_SDMMC_DEC_WIN win;
+	int i,j=0;
+
+
+
+	if (MV_FALSE == mvCtrlPwrClckGet(SDIO_UNIT_ID, 0)) 
+		return;
+
+	mvOsOutput( "\n" );
+	mvOsOutput( "SDMMC %d:\n", j );
+	mvOsOutput( "----\n" );
+
+	for( i = 0; i < MV_SDMMC_MAX_ADDR_DECODE_WIN; i++ )
+	{
+            memset( &win, 0, sizeof(MV_SDMMC_DEC_WIN) );
+
+	    mvOsOutput( "win%d - ", i );
+
+	    if( mvSdmmcWinGet(j, i, &win ) == MV_OK )
+	    {
+	        if( win.enable )
+	        {
+                    mvOsOutput( "%s base %08x, ",
+                    mvCtrlTargetNameGet(win.target), win.addrWin.baseLow );
+                    mvOsOutput( "...." );
+
+                    mvSizePrint( win.addrWin.size );
+    
+		    mvOsOutput( "\n" );
+                }
+		else
+		mvOsOutput( "disable\n" );
+	    }
+	}
+}
+
+
+/*******************************************************************************
+* mvSdmmcWinInit - Initialize the integrated SDMMC target address window.
+*
+* DESCRIPTION:
+*       Initialize the SDMMC peripheral target address window.
+*
+* INPUT:
+*
+*
+* OUTPUT:
+*     
+*
+* RETURN:
+*       MV_ERROR if register parameters are invalid.
+*
+*******************************************************************************/
+MV_STATUS mvSdmmcWinInit(MV_VOID)
+{
+    int             winNum;
+    MV_SDMMC_DEC_WIN  sdmmcWin;
+    MV_CPU_DEC_WIN  cpuAddrDecWin;
+    MV_U32          status, winPrioIndex = 0;
+
+    /* Initiate Sdmmc address decode */
+
+    /* First disable all address decode windows */
+    for(winNum = 0; winNum < MV_SDMMC_MAX_ADDR_DECODE_WIN; winNum++)
+    {
+        MV_U32  regVal = MV_REG_READ(MV_SDMMC_WIN_CTRL_REG(0, winNum));
+        regVal &= ~MV_SDMMC_WIN_ENABLE_MASK;
+        MV_REG_WRITE(MV_SDMMC_WIN_CTRL_REG(0, winNum), regVal);
+    }
+    
+    winNum = 0;
+    while( (sdmmcAddrDecPrioTab[winPrioIndex] != TBL_TERM) &&
+           (winNum < MV_SDMMC_MAX_ADDR_DECODE_WIN) )
+    {
+        /* first get attributes from CPU If */
+        status = mvCpuIfTargetWinGet(sdmmcAddrDecPrioTab[winPrioIndex],
+                                     &cpuAddrDecWin);
+
+        if(MV_NO_SUCH == status)
+        {
+            winPrioIndex++;
+            continue;
+        }
+	if (MV_OK != status)
+	{
+            mvOsPrintf("%s: ERR. mvCpuIfTargetWinGet failed\n", __FUNCTION__);
+	    return MV_ERROR;
+	}
+
+        if (cpuAddrDecWin.enable == MV_TRUE)
+        {
+            sdmmcWin.addrWin.baseHigh = cpuAddrDecWin.addrWin.baseHigh;
+            sdmmcWin.addrWin.baseLow  = cpuAddrDecWin.addrWin.baseLow;
+            sdmmcWin.addrWin.size     = cpuAddrDecWin.addrWin.size;
+            sdmmcWin.enable           = MV_TRUE;
+            sdmmcWin.target           = sdmmcAddrDecPrioTab[winPrioIndex];
+            
+            if(MV_OK != mvSdmmcWinSet(0/*dev*/, winNum, &sdmmcWin))
+            {
+                return MV_ERROR;
+            }
+            winNum++;
+        }
+        winPrioIndex++;
+    }
+    return MV_OK;
+}
+
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysPex.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysPex.h
@@ -0,0 +1,348 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCSysPEXH
+#define __INCSysPEXH
+
+#include "mvCommon.h"
+#include "ctrlEnv/sys/mvCpuIf.h"
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "ctrlEnv/mvCtrlEnvAddrDec.h"
+
+/* 4KB granularity */
+#define MINIMUM_WINDOW_SIZE     0x1000
+#define MINIMUM_BAR_SIZE        0x1000
+#define MINIMUM_BAR_SIZE_MASK	0xFFFFF000
+#define BAR_SIZE_OFFS			12
+#define BAR_SIZE_MASK			(0xFFFFF << BAR_SIZE_OFFS)
+
+
+
+#define MV_PEX_WIN_DEFAULT		6
+#define MV_PEX_WIN_EXP_ROM		7
+#define PEX_MAX_TARGET_WIN		8
+
+
+#define PEX_MAX_BARS			3
+#define PEX_INTER_REGS_BAR		0
+#define PEX_DRAM_BAR			1
+#define PEX_DEVICE_BAR			2
+
+/*************************************/
+/* PCI Express BAR Control Registers */
+/*************************************/
+#define PEX_BAR_CTRL_REG(pexIf,bar)		(0x41804 + (bar-1)*4- (pexIf)*0x10000)
+#define PEX_EXP_ROM_BAR_CTRL_REG(pexIf)	(0x4180C - (pexIf)*0x10000)
+
+
+/* PCI Express BAR Control Register */
+/* PEX_BAR_CTRL_REG (PXBCR) */
+
+#define PXBCR_BAR_EN				BIT0
+#define PXBCR_BAR_SIZE_OFFS			16
+#define PXBCR_BAR_SIZE_MASK			(0xffff << PXBCR_BAR_SIZE_OFFS)
+#define PXBCR_BAR_SIZE_ALIGNMENT	0x10000
+
+
+
+/* PCI Express Expansion ROM BAR Control Register */
+/* PEX_EXP_ROM_BAR_CTRL_REG (PXERBCR) */
+
+#define PXERBCR_EXPROM_EN			BIT0
+#define PXERBCR_EXPROMSZ_OFFS		19
+#define PXERBCR_EXPROMSZ_MASK		(0xf << PXERBCR_EXPROMSZ_OFFS)
+#define PXERBCR_EXPROMSZ_512KB		(0x0 << PXERBCR_EXPROMSZ_OFFS)
+#define PXERBCR_EXPROMSZ_1024KB		(0x1 << PXERBCR_EXPROMSZ_OFFS)
+#define PXERBCR_EXPROMSZ_2048KB		(0x3 << PXERBCR_EXPROMSZ_OFFS)
+#define PXERBCR_EXPROMSZ_4096KB		(0x7 << PXERBCR_EXPROMSZ_OFFS)
+
+/************************************************/
+/* PCI Express Address Window Control Registers */
+/************************************************/
+#define PEX_WIN0_3_CTRL_REG(pexIf,winNum)       \
+                                (0x41820 + (winNum) * 0x10 - (pexIf) * 0x10000)
+#define PEX_WIN0_3_BASE_REG(pexIf,winNum)       \
+                                (0x41824 + (winNum) * 0x10 - (pexIf) * 0x10000)
+#define PEX_WIN0_3_REMAP_REG(pexIf,winNum)      \
+                                (0x4182C + (winNum) * 0x10 - (pexIf) * 0x10000)
+#define PEX_WIN4_5_CTRL_REG(pexIf,winNum)       \
+                            (0x41860 + (winNum - 4) * 0x20 - (pexIf) * 0x10000)
+#define PEX_WIN4_5_BASE_REG(pexIf,winNum)       \
+                            (0x41864 + (winNum - 4) * 0x20 - (pexIf) * 0x10000)
+#define PEX_WIN4_5_REMAP_REG(pexIf,winNum)      \
+                            (0x4186C + (winNum - 4) * 0x20 - (pexIf) * 0x10000)
+#define PEX_WIN4_5_REMAP_HIGH_REG(pexIf,winNum) \
+                            (0x41870 + (winNum - 4) * 0x20 - (pexIf) * 0x10000)
+
+#define PEX_WIN_DEFAULT_CTRL_REG(pexIf)         (0x418B0 - (pexIf) * 0x10000)
+#define PEX_WIN_EXP_ROM_CTRL_REG(pexIf)         (0x418C0 - (pexIf) * 0x10000)
+#define PEX_WIN_EXP_ROM_REMAP_REG(pexIf)        (0x418C4 - (pexIf) * 0x10000)
+
+/* PCI Express Window Control Register */
+/* PEX_WIN_CTRL_REG (PXWCR) */
+
+#define	PXWCR_WIN_EN					BIT0 /* Window Enable.*/
+
+#define	PXWCR_WIN_BAR_MAP_OFFS			1    /* Mapping to BAR.*/
+#define	PXWCR_WIN_BAR_MAP_MASK			BIT1
+#define	PXWCR_WIN_BAR_MAP_BAR1			(0 << PXWCR_WIN_BAR_MAP_OFFS)
+#define	PXWCR_WIN_BAR_MAP_BAR2			(1 << PXWCR_WIN_BAR_MAP_OFFS)
+
+#define	PXWCR_TARGET_OFFS				4  /*Unit ID */
+#define	PXWCR_TARGET_MASK				(0xf << PXWCR_TARGET_OFFS)
+
+#define	PXWCR_ATTRIB_OFFS				8  /* target attributes */
+#define	PXWCR_ATTRIB_MASK				(0xff << PXWCR_ATTRIB_OFFS)
+
+#define	PXWCR_SIZE_OFFS					16 /* size */
+#define	PXWCR_SIZE_MASK					(0xffff << PXWCR_SIZE_OFFS)
+#define	PXWCR_SIZE_ALIGNMENT			0x10000
+
+/* PCI Express Window Base Register */
+/* PEX_WIN_BASE_REG (PXWBR)*/
+
+#define PXWBR_BASE_OFFS					16 /* address[31:16] */
+#define PXWBR_BASE_MASK					(0xffff << PXWBR_BASE_OFFS)
+#define PXWBR_BASE_ALIGNMENT			0x10000
+
+/* PCI Express Window Remap Register */
+/* PEX_WIN_REMAP_REG (PXWRR)*/
+
+#define PXWRR_REMAP_EN					BIT0
+#define PXWRR_REMAP_OFFS				16
+#define PXWRR_REMAP_MASK				(0xffff << PXWRR_REMAP_OFFS)
+#define PXWRR_REMAP_ALIGNMENT			0x10000
+
+/* PCI Express Window Remap (High) Register */
+/* PEX_WIN_REMAP_HIGH_REG (PXWRHR)*/
+
+#define PXWRHR_REMAP_HIGH_OFFS			0
+#define PXWRHR_REMAP_HIGH_MASK			(0xffffffff << PXWRHR_REMAP_HIGH_OFFS)
+
+/* PCI Express Default Window Control Register */
+/* PEX_WIN_DEFAULT_CTRL_REG (PXWDCR) */
+
+#define	PXWDCR_TARGET_OFFS				4  /*Unit ID */
+#define	PXWDCR_TARGET_MASK				(0xf << PXWDCR_TARGET_OFFS)
+#define	PXWDCR_ATTRIB_OFFS				8  /* target attributes */
+#define	PXWDCR_ATTRIB_MASK				(0xff << PXWDCR_ATTRIB_OFFS)
+
+/* PCI Express Expansion ROM Window Control Register */
+/* PEX_WIN_EXP_ROM_CTRL_REG (PXWERCR)*/
+
+#define	PXWERCR_TARGET_OFFS				4  /*Unit ID */
+#define	PXWERCR_TARGET_MASK				(0xf << PXWERCR_TARGET_OFFS)
+#define	PXWERCR_ATTRIB_OFFS				8  /* target attributes */
+#define	PXWERCR_ATTRIB_MASK				(0xff << PXWERCR_ATTRIB_OFFS)
+
+/* PCI Express Expansion ROM Window Remap Register */
+/* PEX_WIN_EXP_ROM_REMAP_REG (PXWERRR)*/
+
+#define PXWERRR_REMAP_EN				BIT0
+#define PXWERRR_REMAP_OFFS				16
+#define PXWERRR_REMAP_MASK				(0xffff << PXWERRR_REMAP_OFFS)
+#define PXWERRR_REMAP_ALIGNMENT			0x10000
+
+
+
+/*PEX_MEMORY_BAR_BASE_ADDR(barNum) (PXMBBA)*/ 
+/* PCI Express BAR0 Internal Register*/
+/*PEX BAR0_INTER_REG (PXBIR)*/
+
+#define PXBIR_IOSPACE			BIT0	/* Memory Space Indicator */
+
+#define PXBIR_TYPE_OFFS			1	   /* BAR Type/Init Val. */ 
+#define PXBIR_TYPE_MASK			(0x3 << PXBIR_TYPE_OFFS)
+#define PXBIR_TYPE_32BIT_ADDR	(0x0 << PXBIR_TYPE_OFFS)
+#define PXBIR_TYPE_64BIT_ADDR	(0x2 << PXBIR_TYPE_OFFS)
+
+#define PXBIR_PREFETCH_EN		BIT3 	/* Prefetch Enable */
+
+#define PXBIR_BASE_OFFS		20		/* Base address. Address bits [31:20] */
+#define PXBIR_BASE_MASK		(0xfff << PXBIR_BASE_OFFS)
+#define PXBIR_BASE_ALIGNMET	(1 << PXBIR_BASE_OFFS)
+
+
+/* PCI Express BAR0 Internal (High) Register*/
+/*PEX BAR0_INTER_REG_HIGH (PXBIRH)*/      
+
+#define PXBIRH_BASE_OFFS			0		/* Base address. Bits [63:32] */
+#define PXBIRH_BASE_MASK			(0xffffffff << PBBHR_BASE_OFFS)
+
+
+#define PEX_BAR_DEFAULT_ATTRIB		0xc /* Memory - Prefetch - 64 bit address */
+#define PEX_BAR0_DEFAULT_ATTRIB	    PEX_BAR_DEFAULT_ATTRIB  
+#define PEX_BAR1_DEFAULT_ATTRIB		PEX_BAR_DEFAULT_ATTRIB
+#define PEX_BAR2_DEFAULT_ATTRIB		PEX_BAR_DEFAULT_ATTRIB
+
+
+/* PCI Express BAR1 Register */
+/*  PCI Express BAR2 Register*/
+/*PEX BAR1_REG (PXBR)*/
+/*PEX BAR2_REG (PXBR)*/
+
+#define PXBR_IOSPACE			BIT0	/* Memory Space Indicator */
+
+#define PXBR_TYPE_OFFS			1	   /* BAR Type/Init Val. */ 
+#define PXBR_TYPE_MASK			(0x3 << PXBR_TYPE_OFFS)
+#define PXBR_TYPE_32BIT_ADDR	(0x0 << PXBR_TYPE_OFFS)
+#define PXBR_TYPE_64BIT_ADDR	(0x2 << PXBR_TYPE_OFFS)
+
+#define PXBR_PREFETCH_EN		BIT3 	/* Prefetch Enable */
+
+#define PXBR_BASE_OFFS		16		/* Base address. Address bits [31:16] */
+#define PXBR_BASE_MASK		(0xffff << PXBR_BASE_OFFS)
+#define PXBR_BASE_ALIGNMET	(1 << PXBR_BASE_OFFS)
+
+
+/* PCI Express BAR1 (High) Register*/
+/* PCI Express BAR2 (High) Register*/
+/*PEX BAR1_REG_HIGH (PXBRH)*/
+/*PEX BAR2_REG_HIGH (PXBRH)*/
+
+#define PXBRH_BASE_OFFS			0		/* Base address. Address bits [63:32] */
+#define PXBRH_BASE_MASK			(0xffffffff << PXBRH_BASE_OFFS)
+
+/* PCI Express Expansion ROM BAR Register*/
+/*PEX_EXPANSION_ROM_BASE_ADDR_REG (PXERBAR)*/
+
+#define PXERBAR_EXPROMEN		BIT0	/* Expansion ROM Enable */
+
+#define PXERBAR_BASE_512K_OFFS		19		/* Expansion ROM Base Address */
+#define PXERBAR_BASE_512K_MASK		(0x1fff << PXERBAR_BASE_512K_OFFS) 	
+
+#define PXERBAR_BASE_1MB_OFFS		20		/* Expansion ROM Base Address */
+#define PXERBAR_BASE_1MB_MASK		(0xfff << PXERBAR_BASE_1MB_OFFS) 	
+
+#define PXERBAR_BASE_2MB_OFFS		21		/* Expansion ROM Base Address */
+#define PXERBAR_BASE_2MB_MASK		(0x7ff << PXERBAR_BASE_2MB_OFFS) 	
+
+#define PXERBAR_BASE_4MB_OFFS		22		/* Expansion ROM Base Address */
+#define PXERBAR_BASE_4MB_MASK		(0x3ff << PXERBAR_BASE_4MB_OFFS) 	
+
+/* PEX Bar attributes */
+typedef struct _mvPexBar
+{
+	MV_ADDR_WIN   addrWin;    /* An address window*/
+	MV_BOOL       enable;     /* Address decode window is enabled/disabled    */
+
+}MV_PEX_BAR;
+
+/* PEX Remap Window attributes */
+typedef struct _mvPexRemapWin
+{
+	MV_ADDR_WIN   addrWin;    /* An address window*/
+	MV_BOOL       enable;     /* Address decode window is enabled/disabled    */
+
+}MV_PEX_REMAP_WIN;
+
+/* PEX Remap Window attributes */
+typedef struct _mvPexDecWin
+{
+	MV_TARGET	  target;
+	MV_ADDR_WIN   addrWin;    /* An address window*/
+	MV_U32		  targetBar;
+	MV_U8			attrib;			/* chip select attributes */
+	MV_TARGET_ID 	targetId; 		/* Target Id of this MV_TARGET */
+	MV_BOOL       enable;     /* Address decode window is enabled/disabled    */
+
+}MV_PEX_DEC_WIN;
+
+/* Global Functions prototypes */
+/* mvPexHalInit - Initialize PEX interfaces*/
+MV_STATUS mvPexInit(MV_U32 pexIf, MV_PEX_TYPE pexType);
+
+
+/* mvPexTargetWinSet - Set PEX to peripheral target address window BAR*/
+MV_STATUS mvPexTargetWinSet(MV_U32 pexIf, MV_U32 winNum, 
+                            MV_PEX_DEC_WIN *pAddrDecWin);
+
+/* mvPexTargetWinGet - Get PEX to peripheral target address window*/
+MV_STATUS mvPexTargetWinGet(MV_U32 pexIf, MV_U32 winNum, 
+                            MV_PEX_DEC_WIN *pAddrDecWin);
+
+/* mvPexTargetWinEnable - Enable/disable a PEX BAR window*/
+MV_STATUS mvPexTargetWinEnable(MV_U32 pexIf,MV_U32 winNum, MV_BOOL enable);
+
+/* mvPexTargetWinRemap - Set PEX to target address window remap.*/
+MV_STATUS mvPexTargetWinRemap(MV_U32 pexIf, MV_U32 winNum, 
+                           MV_PEX_REMAP_WIN *pAddrWin);
+
+/* mvPexTargetWinRemapEnable -enable\disable a PEX Window remap.*/
+MV_STATUS mvPexTargetWinRemapEnable(MV_U32 pexIf, MV_U32 winNum, 
+                           MV_BOOL enable);
+
+/* mvPexBarSet - Set PEX bar address and size */
+MV_STATUS mvPexBarSet(MV_U32 pexIf, MV_U32 barNum, MV_PEX_BAR *addrWin);
+
+/* mvPexBarGet - Get PEX bar address and size */
+MV_STATUS mvPexBarGet(MV_U32 pexIf, MV_U32 barNum, MV_PEX_BAR *addrWin);
+
+/* mvPexBarEnable - enable\disable a PEX bar*/
+MV_STATUS mvPexBarEnable(MV_U32 pexIf, MV_U32 barNum, MV_BOOL enable);
+
+/* mvPexAddrDecShow - Display address decode windows attributes */
+MV_VOID mvPexAddrDecShow(MV_VOID);
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvCpuIfInit.S
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvCpuIfInit.S
@@ -0,0 +1,175 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#define MV_ASMLANGUAGE
+#include "mvOsAsm.h"
+#include "mvDeviceId.h"
+#include "mvCtrlEnvRegs.h"
+#include "mvCpuIfRegs.h"
+#include "mvCtrlEnvAsm.h"
+
+
+/*******************************************************************************
+* mvCpuIfPreInit - Make early initialization of CPU interface.
+*
+* DESCRIPTION:
+*       The function will initialize the CPU interface parameters that must
+*       be initialize before any BUS activity towards the DDR interface,
+*       which means it must be executed from ROM. Because of that, the function
+*       is implemented in assembly code.
+*       The function configure the following CPU config register parameters:
+*       1) CPU2MbusLTickDrv
+*       2) CPU2MbusLTickSample.
+*       NOTE: This function must be called AFTER the internal register
+*       base is modified to INTER_REGS_BASE.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*       r11 holds return function address.
+*******************************************************************************/
+#define MV88F6281_PCKG_OPT	2
+#define MV88F6192_PCKG_OPT	1
+#define MV88F6180_PCKG_OPT	0
+
+	.globl _mvCpuIfPreInit
+_mvCpuIfPreInit:
+
+        mov     r11, LR     		/* Save link register */
+
+	/* Read device ID  */
+	MV_CTRL_MODEL_GET_ASM(r4, r5);
+
+        /* goto calcConfigReg if device is 6281 */
+        ldr     r5, =MV88F6281_PCKG_OPT
+        cmp     r4, r5
+        beq     calcConfigReg
+
+        /* goto calcConfigReg if device is 6192 */
+        ldr     r5, =MV88F6192_PCKG_OPT
+        cmp     r4, r5
+        beq     calcConfigReg
+
+        /* Else 6180 */
+        /* Get the "sample on reset" register */
+	MV_REG_READ_ASM (r4, r5, MPP_SAMPLE_AT_RESET)
+        ldr    r5, =MSAR_CPUCLCK_MASK
+        and    r5, r4, r5
+	mov    r5, r5, lsr #MSAR_CPUCLCK_OFFS
+
+        ldr    r4, =CPU_2_MBUSL_DDR_CLK_1x2
+        cmp    r5, #CPU_2_DDR_CLK_1x2
+        beq    setConfigReg
+
+        ldr    r4, =CPU_2_MBUSL_DDR_CLK_1x3
+        cmp    r5, #CPU_2_DDR_CLK_1x3
+        beq    setConfigReg
+
+        ldr    r4, =CPU_2_MBUSL_DDR_CLK_1x3
+        cmp    r5, #CPU_2_DDR_CLK_1x3_1
+        beq    setConfigReg
+
+        ldr    r4, =CPU_2_MBUSL_DDR_CLK_1x4
+        cmp    r5, #CPU_2_DDR_CLK_1x4_1
+        beq    setConfigReg
+        b    setConfigReg
+
+calcConfigReg:
+        /* Get the "sample on reset" register */
+	MV_REG_READ_ASM (r4, r5, MPP_SAMPLE_AT_RESET)
+        ldr    r5, =MSAR_DDRCLCK_RTIO_MASK
+        and    r5, r4, r5
+	mov    r5, r5, lsr #MSAR_DDRCLCK_RTIO_OFFS
+
+        ldr    r4, =CPU_2_MBUSL_DDR_CLK_1x2
+        cmp    r5, #CPU_2_DDR_CLK_1x2
+        beq    setConfigReg
+
+        ldr    r4, =CPU_2_MBUSL_DDR_CLK_1x3
+        cmp    r5, #CPU_2_DDR_CLK_1x3
+        beq    setConfigReg
+
+        ldr    r4, =CPU_2_MBUSL_DDR_CLK_1x4
+        cmp    r5, #CPU_2_DDR_CLK_1x4
+        beq    setConfigReg
+
+        /* Else */
+        ldr    r4, =0
+
+setConfigReg:
+        /* Read CPU Config register */
+        MV_REG_READ_ASM (r7, r5, CPU_CONFIG_REG)
+        ldr    r5, =~(CCR_CPU_2_MBUSL_TICK_DRV_MASK | CCR_CPU_2_MBUSL_TICK_SMPL_MASK)
+        and    r7, r7, r5       /* Clear register fields */
+        orr    r7, r7, r4       /* Set the values according to the findings */
+        MV_REG_WRITE_ASM (r7, r5, CPU_CONFIG_REG)
+
+done:
+        mov     PC, r11         /* r11 is saved link register */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysCesa.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysCesa.c
@@ -0,0 +1,378 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+        this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "mvSysCesa.h"
+
+#if (MV_CESA_VERSION >= 2)
+MV_TARGET tdmaAddrDecPrioTable[] =
+{
+#if defined(MV_INCLUDE_SDRAM_CS0)
+    SDRAM_CS0,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS1)
+    SDRAM_CS1,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS2)
+    SDRAM_CS2,
+#endif
+#if defined(MV_INCLUDE_SDRAM_CS3)
+    SDRAM_CS3,
+#endif
+#if defined(MV_INCLUDE_PEX)
+    PEX0_MEM,
+#endif
+
+    TBL_TERM
+};
+
+/*******************************************************************************
+* mvCesaWinGet - Get TDMA target address window.
+*
+* DESCRIPTION:
+*       Get TDMA target address window.
+*
+* INPUT:
+*       winNum - TDMA target address decode window number.
+*
+* OUTPUT:
+*       pDecWin - TDMA target window data structure.
+*
+* RETURN:
+*       MV_ERROR if register parameters are invalid.
+*
+*******************************************************************************/
+static MV_STATUS mvCesaWinGet(MV_U32 winNum, MV_DEC_WIN *pDecWin)
+{                                                                                                                         
+    MV_DEC_WIN_PARAMS   winParam;
+    MV_U32              sizeReg, baseReg;
+
+    /* Parameter checking   */
+    if (winNum >= MV_CESA_TDMA_ADDR_DEC_WIN)
+    {
+        mvOsPrintf("%s : ERR. Invalid winNum %d\n", 
+                    __FUNCTION__, winNum);
+        return MV_NOT_SUPPORTED;
+    }
+
+    baseReg = MV_REG_READ( MV_CESA_TDMA_BASE_ADDR_REG(winNum) );
+    sizeReg = MV_REG_READ( MV_CESA_TDMA_WIN_CTRL_REG(winNum) );
+ 
+   /* Check if window is enabled   */
+    if(sizeReg & MV_CESA_TDMA_WIN_ENABLE_MASK) 
+    {
+        pDecWin->enable = MV_TRUE;
+
+        /* Extract window parameters from registers */
+        winParam.targetId = (sizeReg & MV_CESA_TDMA_WIN_TARGET_MASK) >> MV_CESA_TDMA_WIN_TARGET_OFFSET; 
+        winParam.attrib   = (sizeReg & MV_CESA_TDMA_WIN_ATTR_MASK) >> MV_CESA_TDMA_WIN_ATTR_OFFSET;
+        winParam.size     = (sizeReg & MV_CESA_TDMA_WIN_SIZE_MASK) >> MV_CESA_TDMA_WIN_SIZE_OFFSET;
+        winParam.baseAddr = (baseReg & MV_CESA_TDMA_WIN_BASE_MASK);
+
+        /* Translate the decode window parameters to address decode struct */
+        if (MV_OK != mvCtrlParamsToAddrDec(&winParam, pDecWin))
+        {
+            mvOsPrintf("Failed to translate register parameters to CESA address" \
+                       " decode window structure\n");
+            return MV_ERROR;        
+        }
+    }
+    else
+    {
+        pDecWin->enable = MV_FALSE;
+    }
+    return MV_OK;
+}
+
+/*******************************************************************************
+* cesaWinOverlapDetect - Detect CESA TDMA address windows overlapping
+*
+* DESCRIPTION:
+*       An unpredicted behaviur is expected in case TDMA address decode 
+*       windows overlapps.
+*       This function detects TDMA address decode windows overlapping of a 
+*       specified window. The function does not check the window itself for 
+*       overlapping. The function also skipps disabled address decode windows.
+*
+* INPUT:
+*       winNum      - address decode window number.
+*       pAddrDecWin - An address decode window struct.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE     - if the given address window overlap current address
+*                   decode map, 
+*       MV_FALSE    - otherwise, MV_ERROR if reading invalid data 
+*                   from registers.
+*
+*******************************************************************************/
+static MV_STATUS cesaWinOverlapDetect(MV_U32 winNum, MV_ADDR_WIN *pAddrWin)
+{
+    MV_U32          winNumIndex;
+    MV_DEC_WIN      addrDecWin;
+    
+    for(winNumIndex=0; winNumIndex<MV_CESA_TDMA_ADDR_DEC_WIN; winNumIndex++)
+    {
+        /* Do not check window itself       */
+        if (winNumIndex == winNum)
+        {
+            continue;
+        }
+
+        /* Get window parameters    */
+        if (MV_OK != mvCesaWinGet(winNumIndex, &addrDecWin))
+        {
+            mvOsPrintf("%s: ERR. TargetWinGet failed\n", __FUNCTION__);
+            return MV_ERROR;
+        }
+
+        /* Do not check disabled windows    */
+        if(addrDecWin.enable == MV_FALSE)
+        {
+            continue;
+        }
+
+        if (MV_TRUE == ctrlWinOverlapTest(pAddrWin, &(addrDecWin.addrWin)))
+        {
+            return MV_TRUE;
+        }        
+    }
+    return MV_FALSE;
+}
+
+/*******************************************************************************
+* mvCesaTdmaWinSet - Set CESA TDMA target address window
+*
+* DESCRIPTION:
+*       This function sets a peripheral target (e.g. SDRAM bank0, PCI_MEM0) 
+*       address window, also known as address decode window. 
+*       After setting this target window, the CESA TDMA will be able to access the 
+*       target within the address window. 
+*
+* INPUT:
+*       winNum      - CESA TDMA target address decode window number.
+*       pAddrDecWin - CESA TDMA target window data structure.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_ERROR        - if address window overlapps with other address decode windows.
+*       MV_BAD_PARAM    - if base address is invalid parameter or target is 
+*                       unknown.
+*
+*******************************************************************************/
+static MV_STATUS mvCesaTdmaWinSet(MV_U32 winNum, MV_DEC_WIN *pDecWin)
+{
+    MV_DEC_WIN_PARAMS   winParams;
+    MV_U32              sizeReg, baseReg;
+    
+    /* Parameter checking   */
+    if (winNum >= MV_CESA_TDMA_ADDR_DEC_WIN)
+    {
+        mvOsPrintf("mvCesaTdmaWinSet: ERR. Invalid win num %d\n",winNum);
+        return MV_BAD_PARAM;
+    }
+
+    /* Check if the requested window overlapps with current windows     */
+    if (MV_TRUE == cesaWinOverlapDetect(winNum, &pDecWin->addrWin))
+    {
+        mvOsPrintf("%s: ERR. Window %d overlap\n", __FUNCTION__, winNum);
+        return MV_ERROR;
+    }
+
+    /* check if address is aligned to the size */
+    if(MV_IS_NOT_ALIGN(pDecWin->addrWin.baseLow, pDecWin->addrWin.size))
+    {
+        mvOsPrintf("mvCesaTdmaWinSet: Error setting CESA TDMA window %d to "\
+                   "target %s.\nAddress 0x%08x is unaligned to size 0x%x.\n",
+                   winNum,
+                   mvCtrlTargetNameGet(pDecWin->target), 
+                   pDecWin->addrWin.baseLow,
+                   pDecWin->addrWin.size);
+        return MV_ERROR;
+    }
+
+    if(MV_OK != mvCtrlAddrDecToParams(pDecWin, &winParams))
+    {
+        mvOsPrintf("%s: mvCtrlAddrDecToParams Failed\n", __FUNCTION__);
+        return MV_ERROR;
+    }
+
+    /* set Size, Attributes and TargetID */
+    sizeReg = (((winParams.targetId << MV_CESA_TDMA_WIN_TARGET_OFFSET) & MV_CESA_TDMA_WIN_TARGET_MASK) |
+               ((winParams.attrib   << MV_CESA_TDMA_WIN_ATTR_OFFSET)   & MV_CESA_TDMA_WIN_ATTR_MASK)   |
+               ((winParams.size << MV_CESA_TDMA_WIN_SIZE_OFFSET) & MV_CESA_TDMA_WIN_SIZE_MASK));
+
+    if (pDecWin->enable == MV_TRUE)
+    {
+        sizeReg |= MV_CESA_TDMA_WIN_ENABLE_MASK;
+    }
+    else
+    {
+        sizeReg &= ~MV_CESA_TDMA_WIN_ENABLE_MASK;
+    }
+
+    /* Update Base value  */
+    baseReg = (winParams.baseAddr & MV_CESA_TDMA_WIN_BASE_MASK);     
+
+    MV_REG_WRITE( MV_CESA_TDMA_WIN_CTRL_REG(winNum), sizeReg);
+    MV_REG_WRITE( MV_CESA_TDMA_BASE_ADDR_REG(winNum), baseReg);
+        
+    return MV_OK;
+}
+
+
+static MV_STATUS   mvCesaTdmaAddrDecInit (void)
+{
+    MV_U32          winNum;
+    MV_STATUS       status;
+    MV_CPU_DEC_WIN  cpuAddrDecWin;
+    MV_DEC_WIN      cesaWin;
+    MV_U32          winPrioIndex = 0;
+
+    /* First disable all address decode windows */
+    for(winNum=0; winNum<MV_CESA_TDMA_ADDR_DEC_WIN; winNum++)
+    {
+        MV_REG_BIT_RESET(MV_CESA_TDMA_WIN_CTRL_REG(winNum), MV_CESA_TDMA_WIN_ENABLE_MASK);
+    }
+
+    /* Go through all windows in user table until table terminator      */
+    winNum = 0;
+    while( (tdmaAddrDecPrioTable[winPrioIndex] != TBL_TERM) && 
+           (winNum < MV_CESA_TDMA_ADDR_DEC_WIN) )    {
+
+        /* first get attributes from CPU If */
+        status = mvCpuIfTargetWinGet(tdmaAddrDecPrioTable[winPrioIndex], 
+                                     &cpuAddrDecWin);
+        if(MV_NO_SUCH == status){
+	    winPrioIndex++;
+            continue;
+	}
+
+        if (MV_OK != status)
+        {
+            mvOsPrintf("cesaInit: TargetWinGet failed. winNum=%d, winIdx=%d, target=%d, status=0x%x\n",
+                        winNum, winPrioIndex, tdmaAddrDecPrioTable[winPrioIndex], status);
+            return MV_ERROR;
+        }
+        if (cpuAddrDecWin.enable == MV_TRUE)
+        {
+            cesaWin.addrWin.baseHigh = cpuAddrDecWin.addrWin.baseHigh;
+            cesaWin.addrWin.baseLow  = cpuAddrDecWin.addrWin.baseLow;
+            cesaWin.addrWin.size     = cpuAddrDecWin.addrWin.size;
+            cesaWin.enable           = MV_TRUE;
+            cesaWin.target           = tdmaAddrDecPrioTable[winPrioIndex];
+
+#if defined(MV646xx) 
+            /* Get the default attributes for that target window */
+            mvCtrlDefAttribGet(cesaWin.target, &cesaWin.addrWinAttr);
+#endif /* MV646xx */ 
+
+            if(MV_OK != mvCesaTdmaWinSet(winNum, &cesaWin))
+            {
+                mvOsPrintf("mvCesaTdmaWinSet FAILED: winNum=%d\n",
+                           winNum);
+                return MV_ERROR;
+            }
+            winNum++;
+        }
+        winPrioIndex++;
+    }
+    return MV_OK;
+}
+#endif /* MV_CESA_VERSION >= 2 */
+
+
+
+
+MV_STATUS mvCesaInit (int numOfSession, int queueDepth, char* pSramBase, void *osHandle)
+{
+    MV_U32 cesaCryptEngBase;
+    MV_CPU_DEC_WIN addrDecWin;
+
+    if(sizeof(MV_CESA_SRAM_MAP) > MV_CESA_SRAM_SIZE)
+    {
+        mvOsPrintf("mvCesaInit: Wrong SRAM map - %u > %d\n",
+                sizeof(MV_CESA_SRAM_MAP), MV_CESA_SRAM_SIZE);
+        return MV_FAIL;
+    }
+
+    if (mvCpuIfTargetWinGet(CRYPT_ENG, &addrDecWin) == MV_OK)
+        cesaCryptEngBase = addrDecWin.addrWin.baseLow;
+    else
+    {
+        mvOsPrintf("mvCesaInit: ERR. mvCpuIfTargetWinGet failed\n");
+        return MV_ERROR;
+    }
+
+#if (MV_CESA_VERSION >= 2)
+    mvCesaTdmaAddrDecInit();
+#endif /* MV_CESA_VERSION >= 2 */
+
+	return mvCesaHalInit(numOfSession, queueDepth, pSramBase, cesaCryptEngBase, 
+			     osHandle);
+
+}
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysSdmmc.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysSdmmc.h
@@ -0,0 +1,125 @@
+
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+#ifndef __INCMVSysSdmmcAddrDech
+#define __INCMVSysSdmmcAddrDech
+
+#include "mvCommon.h"
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "ctrlEnv/sys/mvCpuIf.h"
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct _mvSdmmcDecWin
+{
+    MV_TARGET     target;
+    MV_ADDR_WIN   addrWin;    /* An address window*/
+    MV_BOOL       enable;     /* Address decode window is enabled/disabled    */
+ 
+} MV_SDMMC_DEC_WIN;
+
+
+#define MV_SDMMC_MAX_ADDR_DECODE_WIN 4
+
+#define MV_SDMMC_WIN_CTRL_REG(dev, win)        (MV_SDIO_REG_BASE + 0x108 + ((win)<<3))
+#define MV_SDMMC_WIN_BASE_REG(dev, win)        (MV_SDIO_REG_BASE + 0x10c + ((win)<<3))
+
+
+/* BITs in Windows 0-3 Control and Base Registers */
+#define MV_SDMMC_WIN_ENABLE_BIT               0
+#define MV_SDMMC_WIN_ENABLE_MASK              (1<<MV_SDMMC_WIN_ENABLE_BIT)
+
+#define MV_SDMMC_WIN_TARGET_OFFSET            4
+#define MV_SDMMC_WIN_TARGET_MASK              (0xF<<MV_SDMMC_WIN_TARGET_OFFSET)
+
+#define MV_SDMMC_WIN_ATTR_OFFSET              8
+#define MV_SDMMC_WIN_ATTR_MASK                (0xFF<<MV_SDMMC_WIN_ATTR_OFFSET)
+
+#define MV_SDMMC_WIN_SIZE_OFFSET              16
+#define MV_SDMMC_WIN_SIZE_MASK                (0xFFFF<<MV_SDMMC_WIN_SIZE_OFFSET)
+
+#define MV_SDMMC_WIN_BASE_OFFSET              16
+#define MV_SDMMC_WIN_BASE_MASK                (0xFFFF<<MV_SDMMC_WIN_BASE_OFFSET)
+
+MV_STATUS mvSdmmcWinGet(int dev, MV_U32 winNum, MV_SDMMC_DEC_WIN *pAddrDecWin);
+MV_STATUS mvSdmmcWinSet(int dev, MV_U32 winNum, MV_SDMMC_DEC_WIN *pAddrDecWin);
+MV_STATUS mvSdmmcWinByTargetGet(MV_TARGET target, MV_SDMMC_DEC_WIN *pAddrDecWin);
+MV_STATUS mvSdmmcWinInit(MV_VOID);
+MV_VOID   mvSdmmcAddrDecShow(MV_VOID);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif
+
+
+
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysPex.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysPex.c
@@ -0,0 +1,1697 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "ctrlEnv/sys/mvSysPex.h"
+
+/* this structure describes the mapping between a Pex Window and a CPU target*/
+typedef struct _pexWinToTarget
+{
+	MV_TARGET target;
+	MV_BOOL	  enable;
+
+}PEX_WIN_TO_TARGET;
+
+/* this array is a priority array that define How Pex windows should be 
+configured , We have only 6 Pex Windows that can be configured , but we
+have maximum of 9 CPU target windows ! the following array is a priority
+array where the lowest index has the highest priotiy and the highest 
+index has the lowest priority of being cnfigured */
+
+MV_U32	pexDevBarPrioTable[] =
+{
+#if defined(MV_INCLUDE_DEVICE_CS0)
+    DEVICE_CS0,
+#endif
+#if defined(MV_INCLUDE_DEVICE_CS1)
+    DEVICE_CS1,
+#endif
+#if defined(MV_INCLUDE_DEVICE_CS2)
+    DEVICE_CS2,
+#endif                                               
+#if defined(MV_INCLUDE_DEVICE_CS3)
+    DEVICE_CS3,
+#endif
+/*
+#if defined(MV_INCLUDE_DEVICE_CS4)
+    DEVICE_CS4,
+#endif
+*/
+    TBL_TERM
+};
+
+
+/* PEX Wins registers offsets are inconsecutive. This struct describes WIN	*/
+/* register offsets	and its function where its is located.					*/
+/* Also, PEX address remap registers offsets are inconsecutive. This struct	*/
+/* describes address remap register offsets									*/
+typedef struct _pexWinRegInfo
+{
+    MV_U32 baseLowRegOffs;
+	MV_U32 baseHighRegOffs;
+	MV_U32 sizeRegOffs;
+	MV_U32 remapLowRegOffs;
+	MV_U32 remapHighRegOffs;
+
+}PEX_WIN_REG_INFO;
+
+static MV_STATUS pexWinOverlapDetect(MV_U32 pexIf, MV_U32 winNum,
+									 MV_ADDR_WIN *pAddrWin);
+static MV_STATUS pexWinRegInfoGet(MV_U32 pexIf, MV_U32 winNum,
+								  PEX_WIN_REG_INFO *pWinRegInfo);
+
+static MV_STATUS pexBarIsValid(MV_U32 baseLow, MV_U32 size);
+
+static MV_BOOL pexIsWinWithinBar(MV_U32 pexIf,MV_ADDR_WIN *pAddrWin);
+static MV_BOOL pexBarOverlapDetect(MV_U32 pexIf,MV_U32 barNum,
+								   MV_ADDR_WIN *pAddrWin);
+const MV_8* pexBarNameGet( MV_U32 bar );
+
+
+/*******************************************************************************
+* mvPexInit - Initialize PEX interfaces
+*
+* DESCRIPTION:
+*
+* This function is responsible of intialization of the Pex Interface , It 
+* configure the Pex Bars and Windows in the following manner:
+*
+*  Assumptions : 
+*				Bar0 is always internal registers bar
+*			    Bar1 is always the DRAM bar
+*				Bar2 is always the Device bar
+*
+*  1) Sets the Internal registers bar base by obtaining the base from
+*	  the CPU Interface
+*  2) Sets the DRAM bar base and size by getting the base and size from
+*     the CPU Interface when the size is the sum of all enabled DRAM 
+*	  chip selects and the base is the base of CS0 .
+*  3) Sets the Device bar base and size by getting these values from the 
+*     CPU Interface when the base is the base of the lowest base of the
+*     Device chip selects, and the 
+*
+*
+* INPUT:
+*
+*       pexIf   -  PEX interface number.
+*
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_OK if function success otherwise MV_ERROR or MV_BAD_PARAM
+*
+*******************************************************************************/
+MV_STATUS mvPexInit(MV_U32 pexIf, MV_PEX_TYPE pexType)
+{
+	MV_U32 	       		bar;
+	MV_U32		   	winNum;
+	MV_PEX_BAR	  	pexBar;
+	MV_PEX_DEC_WIN 		pexWin;
+	MV_CPU_DEC_WIN 		addrDecWin;
+	MV_TARGET 		target;
+	MV_U32			pexCurrWin=0;
+	MV_U32			status;
+	/* default and exapntion rom 
+	are always configured */
+
+#ifndef MV_DISABLE_PEX_DEVICE_BAR
+	MV_U32		   	winIndex;
+	MV_U32 		    	maxBase=0, sizeOfMaxBase=0;
+	MV_U32			pexStartWindow;
+#endif
+
+	/* Parameter checking   */
+	if(pexIf >= mvCtrlPexMaxIfGet())
+	{
+		mvOsPrintf("mvPexInit: ERR. Invalid PEX interface %d\n", pexIf);
+		return MV_BAD_PARAM;
+	}
+	
+	/* Enabled CPU access to PCI-Express */
+	mvCpuIfEnablePex(pexIf, pexType);
+
+    /* Start with bars */
+	/* First disable all PEX bars*/
+	for (bar = 0; bar < PEX_MAX_BARS; bar++)
+    {
+		if (PEX_INTER_REGS_BAR != bar)
+		{
+			if (MV_OK != mvPexBarEnable(pexIf, bar, MV_FALSE))
+			{
+				mvOsPrintf("mvPexInit:mvPexBarEnable bar =%d failed \n",bar);
+				return MV_ERROR;
+			}
+			
+		}
+
+	}
+
+	/* and disable all PEX target windows  */
+	for (winNum = 0; winNum < PEX_MAX_TARGET_WIN - 2; winNum++)
+    {
+		if (MV_OK != mvPexTargetWinEnable(pexIf, winNum, MV_FALSE))
+		{
+			mvOsPrintf("mvPexInit:mvPexTargetWinEnable winNum =%d failed \n",
+					   winNum);
+			return MV_ERROR;
+
+		}
+	}
+
+	/* Now, go through all bars*/
+
+
+
+/******************************************************************************/
+/*                       Internal registers bar                               */
+/******************************************************************************/
+	bar = PEX_INTER_REGS_BAR;
+
+	/* we only open the bar , no need to open windows for this bar */
+
+	/* first get the CS attribute from the CPU Interface */
+	if (MV_OK !=mvCpuIfTargetWinGet(INTER_REGS,&addrDecWin))
+	{
+		mvOsPrintf("mvPexInit: ERR. mvCpuIfTargetWinGet failed target =%d\n",INTER_REGS);
+		return MV_ERROR;
+	}
+
+	pexBar.addrWin.baseHigh = addrDecWin.addrWin.baseHigh;
+	pexBar.addrWin.baseLow = addrDecWin.addrWin.baseLow;
+	pexBar.addrWin.size = addrDecWin.addrWin.size;
+	pexBar.enable = MV_TRUE;
+
+	if (MV_OK != mvPexBarSet(pexIf, bar, &pexBar))
+	{
+		mvOsPrintf("mvPexInit: ERR. mvPexBarSet %d failed\n", bar);
+		return MV_ERROR;
+	}
+	
+/******************************************************************************/
+/*                                DRAM bar                                    */
+/******************************************************************************/
+
+	bar = PEX_DRAM_BAR;
+
+	pexBar.addrWin.size = 0;
+	
+	for (target = SDRAM_CS0;target < MV_DRAM_MAX_CS; target++ )
+	{
+
+		status = mvCpuIfTargetWinGet(target,&addrDecWin);
+
+		if((MV_NO_SUCH == status)&&(target != SDRAM_CS0))
+		{
+			continue;
+		}
+
+		/* first get attributes from CPU If */
+		if (MV_OK != status)
+		{
+			mvOsPrintf("mvPexInit: ERR. mvCpuIfTargetWinGet failed target =%d\n",target);
+			return MV_ERROR;
+		}
+		if (addrDecWin.enable == MV_TRUE)
+		{				
+			/* the base is the base of DRAM CS0 always */
+			if (SDRAM_CS0 == target )
+			{
+				pexBar.addrWin.baseHigh = addrDecWin.addrWin.baseHigh;
+				pexBar.addrWin.baseLow = addrDecWin.addrWin.baseLow;
+
+			}
+
+			/* increment the bar size to be the sum of the size of all
+			DRAM chips selecs */
+			pexBar.addrWin.size += addrDecWin.addrWin.size;
+
+			/* set a Pex window for this target ! 
+			DRAM CS always will have a Pex Window , and is not a 
+			part of the priority table */
+			pexWin.addrWin.baseHigh = addrDecWin.addrWin.baseHigh;
+			pexWin.addrWin.baseLow = addrDecWin.addrWin.baseLow;
+			pexWin.addrWin.size = addrDecWin.addrWin.size;
+			
+			/* we disable the windows at first because we are not
+			sure that it is witihin bar boundries */
+			pexWin.enable =MV_FALSE;
+			pexWin.target = target;
+			pexWin.targetBar = bar;
+
+			if (MV_OK != mvPexTargetWinSet(pexIf,pexCurrWin++,&pexWin))
+			{
+				mvOsPrintf("mvPexInit: ERR. mvPexTargetWinSet failed\n");
+				return MV_ERROR;
+			}
+		}
+	}
+
+	/* check if the size of the bar is illeggal */
+	if (-1 == ctrlSizeToReg(pexBar.addrWin.size, PXBCR_BAR_SIZE_ALIGNMENT))
+	{
+		/* try to get a good size */
+		pexBar.addrWin.size = ctrlSizeRegRoundUp(pexBar.addrWin.size,
+												 PXBCR_BAR_SIZE_ALIGNMENT);
+	}
+    
+	/* check if the size and base are valid */
+	if (MV_TRUE == pexBarOverlapDetect(pexIf,bar,&pexBar.addrWin))
+	{
+		mvOsPrintf("mvPexInit:Warning :Bar %d size is illigal\n",bar);
+		mvOsPrintf("it will be disabled\n");
+		mvOsPrintf("please check Pex and CPU windows configuration\n");
+	}
+	else
+	{
+		pexBar.enable = MV_TRUE;
+        
+		/* configure the bar */
+		if (MV_OK != mvPexBarSet(pexIf, bar, &pexBar))
+		{
+			mvOsPrintf("mvPexInit: ERR. mvPexBarSet %d failed\n", bar);
+			return MV_ERROR;
+		}
+	
+		/* after the bar was configured then we enable the Pex windows*/
+		for (winNum = 0;winNum < pexCurrWin ;winNum++)
+		{
+			if (MV_OK != mvPexTargetWinEnable(pexIf, winNum, MV_TRUE))
+			{
+				mvOsPrintf("mvPexInit: Can't enable window =%d\n",winNum);
+				return MV_ERROR;
+			}
+	
+		}
+	}
+
+/******************************************************************************/
+/*                              DEVICE bar                                    */
+/******************************************************************************/
+
+/* Open the Device BAR for non linux only */
+#ifndef MV_DISABLE_PEX_DEVICE_BAR 
+
+	/* then device  bar*/
+	bar = PEX_DEVICE_BAR;
+
+	/* save the starting window */
+	pexStartWindow = pexCurrWin;
+	pexBar.addrWin.size = 0;
+	pexBar.addrWin.baseLow = 0xffffffff;
+	pexBar.addrWin.baseHigh = 0;
+	maxBase = 0;
+
+	for (target = DEV_TO_TARGET(START_DEV_CS);target < DEV_TO_TARGET(MV_DEV_MAX_CS); target++ )
+	{
+		status = mvCpuIfTargetWinGet(target,&addrDecWin);
+
+		if (MV_NO_SUCH == status)
+		{
+			continue;
+		}
+
+		if (MV_OK != status)
+		{
+			mvOsPrintf("mvPexInit: ERR. mvCpuIfTargetWinGet failed target =%d\n",target);
+			return MV_ERROR;
+		}
+
+		if (addrDecWin.enable == MV_TRUE)
+		{				
+			/* get the minimum base */
+			if (addrDecWin.addrWin.baseLow < pexBar.addrWin.baseLow)
+			{
+				pexBar.addrWin.baseLow = addrDecWin.addrWin.baseLow;
+			}
+
+			/* get the maximum base */
+			if (addrDecWin.addrWin.baseLow > maxBase)
+			{
+				maxBase = addrDecWin.addrWin.baseLow;
+				sizeOfMaxBase = addrDecWin.addrWin.size;
+			}
+
+			/* search in the priority table for this target */
+			for (winIndex = 0; pexDevBarPrioTable[winIndex] != TBL_TERM;
+				 winIndex++)
+			{
+				if (pexDevBarPrioTable[winIndex] != target)
+				{
+					continue;
+				}
+				else if (pexDevBarPrioTable[winIndex] == target)
+				{
+					/*found it */
+
+					/* if the index of this target in the prio table is valid 
+					then we set the Pex window for this target, a valid index is 
+					an index that is lower than the number of the windows that
+					was not configured yet */
+
+					/* we subtract 2 always because the default and expantion
+					rom windows are always configured */
+					if ( pexCurrWin  < PEX_MAX_TARGET_WIN - 2)
+					{
+						/* set a Pex window for this target !  */
+						pexWin.addrWin.baseHigh = addrDecWin.addrWin.baseHigh;
+						pexWin.addrWin.baseLow = addrDecWin.addrWin.baseLow;
+						pexWin.addrWin.size = addrDecWin.addrWin.size;
+						
+						/* we disable the windows at first because we are not
+						sure that it is witihin bar boundries */
+						pexWin.enable = MV_FALSE;
+						pexWin.target = target;
+						pexWin.targetBar = bar;
+
+						if (MV_OK != mvPexTargetWinSet(pexIf,pexCurrWin++,
+													   &pexWin))
+						{
+							mvOsPrintf("mvPexInit: ERR. Window Set failed\n");
+							return MV_ERROR;
+						}
+					}
+				}
+			}
+		}
+	}
+
+	pexBar.addrWin.size = maxBase - pexBar.addrWin.baseLow + sizeOfMaxBase;
+	pexBar.enable = MV_TRUE;
+
+	/* check if the size of the bar is illegal */
+	if (-1 == ctrlSizeToReg(pexBar.addrWin.size, PXBCR_BAR_SIZE_ALIGNMENT))
+	{
+		/* try to get a good size */
+		pexBar.addrWin.size = ctrlSizeRegRoundUp(pexBar.addrWin.size,
+												 PXBCR_BAR_SIZE_ALIGNMENT);
+	}
+
+	/* check if the size and base are valid */
+	if (MV_TRUE == pexBarOverlapDetect(pexIf,bar,&pexBar.addrWin))
+	{
+		mvOsPrintf("mvPexInit:Warning :Bar %d size is illigal\n",bar);
+		mvOsPrintf("it will be disabled\n");
+		mvOsPrintf("please check Pex and CPU windows configuration\n");
+	}
+	else
+	{
+		if (MV_OK != mvPexBarSet(pexIf, bar, &pexBar))
+		{
+			mvOsPrintf("mvPexInit: ERR. mvPexBarSet %d failed\n", bar);
+			return MV_ERROR;
+		}
+
+		/* now enable the windows */
+		for (winNum = pexStartWindow; winNum < pexCurrWin ; winNum++)
+		{
+			if (MV_OK != mvPexTargetWinEnable(pexIf, winNum, MV_TRUE))
+			{
+				mvOsPrintf("mvPexInit:mvPexTargetWinEnable winNum =%d failed \n",
+						   winNum);
+				return MV_ERROR;
+			}
+		}
+	}
+
+#endif
+
+	return mvPexHalInit(pexIf, pexType);
+
+}
+
+/*******************************************************************************
+* mvPexTargetWinSet - Set PEX to peripheral target address window BAR
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       N/A
+*
+* RETURN:
+*       MV_OK if PEX BAR target window was set correctly, 
+*		MV_BAD_PARAM on bad params 
+*       MV_ERROR otherwise 
+*       (e.g. address window overlapps with other active PEX target window).
+*
+*******************************************************************************/
+MV_STATUS mvPexTargetWinSet(MV_U32 pexIf, MV_U32 winNum, 
+                            MV_PEX_DEC_WIN *pAddrDecWin)
+{
+
+	MV_DEC_REGS decRegs;
+	PEX_WIN_REG_INFO winRegInfo;
+	MV_TARGET_ATTRIB targetAttribs;
+
+	/* Parameter checking   */
+	if(pexIf >= mvCtrlPexMaxIfGet())
+	{
+		mvOsPrintf("mvPexTargetWinSet: ERR. Invalid PEX interface %d\n", pexIf);
+		return MV_BAD_PARAM;
+	}
+
+	if (winNum >= PEX_MAX_TARGET_WIN)
+	{
+		mvOsPrintf("mvPexTargetWinSet: ERR. Invalid PEX winNum %d\n", winNum);
+		return MV_BAD_PARAM;
+
+	}
+
+	/* get the pex Window registers offsets */
+	pexWinRegInfoGet(pexIf,winNum,&winRegInfo);
+
+
+	if (MV_TRUE == pAddrDecWin->enable)
+	{
+
+		/* 2) Check if the requested window overlaps with current windows  */
+		if (MV_TRUE == pexWinOverlapDetect(pexIf,winNum, &pAddrDecWin->addrWin))
+		{
+			mvOsPrintf("mvPexTargetWinSet: ERR. Target %d overlap\n", winNum);
+			return MV_BAD_PARAM;
+		}
+	
+		/* 2) Check if the requested window overlaps with current windows  */
+		if (MV_FALSE == pexIsWinWithinBar(pexIf,&pAddrDecWin->addrWin))
+		{
+			mvOsPrintf("mvPexTargetWinSet: Win %d should be in bar boundries\n",
+					   winNum);
+			return MV_BAD_PARAM;
+		}
+
+	}
+
+
+
+	/* read base register*/
+	
+	if (winRegInfo.baseLowRegOffs)
+	{
+		decRegs.baseReg = MV_REG_READ(winRegInfo.baseLowRegOffs);
+	}
+	else
+	{
+		decRegs.baseReg = 0;
+	}
+
+	if (winRegInfo.sizeRegOffs)
+	{
+		decRegs.sizeReg = MV_REG_READ(winRegInfo.sizeRegOffs);
+	}
+	else
+	{
+		decRegs.sizeReg =0;
+	}
+	
+	if (MV_OK != mvCtrlAddrDecToReg(&(pAddrDecWin->addrWin),&decRegs))
+	{
+		mvOsPrintf("mvPexTargetWinSet:mvCtrlAddrDecToReg Failed\n");
+		return MV_ERROR;		
+	}
+
+	/* enable\Disable */
+	if (MV_TRUE == pAddrDecWin->enable)
+	{
+		decRegs.sizeReg |= PXWCR_WIN_EN;
+	}
+	else
+	{
+		decRegs.sizeReg &= ~PXWCR_WIN_EN;
+	}
+
+
+	/* clear bit location */
+	decRegs.sizeReg &= ~PXWCR_WIN_BAR_MAP_MASK;
+
+	/* set bar Mapping */
+	if (pAddrDecWin->targetBar == 1)
+	{
+		decRegs.sizeReg |= PXWCR_WIN_BAR_MAP_BAR1;
+	}
+	else if (pAddrDecWin->targetBar == 2)
+	{
+		decRegs.sizeReg |= PXWCR_WIN_BAR_MAP_BAR2;
+	}
+
+	mvCtrlAttribGet(pAddrDecWin->target,&targetAttribs);
+
+	/* set attributes */
+	decRegs.sizeReg &= ~PXWCR_ATTRIB_MASK;
+	decRegs.sizeReg |= targetAttribs.attrib << PXWCR_ATTRIB_OFFS;
+	/* set target ID */
+	decRegs.sizeReg &= ~PXWCR_TARGET_MASK;
+	decRegs.sizeReg |= targetAttribs.targetId << PXWCR_TARGET_OFFS;
+
+
+	/* 3) Write to address decode Base Address Register                   */
+
+	if (winRegInfo.baseLowRegOffs)
+	{
+		MV_REG_WRITE(winRegInfo.baseLowRegOffs, decRegs.baseReg);
+	}
+
+	/* write size reg */
+	if (winRegInfo.sizeRegOffs)
+	{
+		if ((MV_PEX_WIN_DEFAULT == winNum)||
+			(MV_PEX_WIN_EXP_ROM == winNum))
+		{
+			/* clear size because there is no size field*/
+			decRegs.sizeReg &= ~PXWCR_SIZE_MASK;
+
+			/* clear enable because there is no enable field*/
+			decRegs.sizeReg &= ~PXWCR_WIN_EN;
+
+		}
+
+		MV_REG_WRITE(winRegInfo.sizeRegOffs, decRegs.sizeReg);
+	}
+
+
+    return MV_OK;
+
+}
+
+/*******************************************************************************
+* mvPexTargetWinGet - Get PEX to peripheral target address window
+*
+* DESCRIPTION:
+*		Get the PEX to peripheral target address window BAR.
+*
+* INPUT:
+*       pexIf - PEX interface number.
+*       bar   - BAR to be accessed by slave.
+*
+* OUTPUT:
+*       pAddrBarWin - PEX target window information data structure.
+*
+* RETURN:
+*       MV_BAD_PARAM for bad parameters ,MV_ERROR on error ! otherwise MV_OK
+*
+*******************************************************************************/
+MV_STATUS mvPexTargetWinGet(MV_U32 pexIf, MV_U32 winNum, 
+                            MV_PEX_DEC_WIN *pAddrDecWin)
+{
+	MV_TARGET_ATTRIB targetAttrib;
+	MV_DEC_REGS decRegs;
+
+	PEX_WIN_REG_INFO winRegInfo;
+
+	/* Parameter checking   */
+	if(pexIf >= mvCtrlPexMaxIfGet())
+	{
+		mvOsPrintf("mvPexTargetWinGet: ERR. Invalid PEX interface %d\n", pexIf);
+		return MV_BAD_PARAM;
+	}
+
+	if (winNum >= PEX_MAX_TARGET_WIN)
+	{
+		mvOsPrintf("mvPexTargetWinGet: ERR. Invalid PEX winNum %d\n", winNum);
+		return MV_BAD_PARAM;
+
+	}
+
+	/* get the pex Window registers offsets */
+	pexWinRegInfoGet(pexIf,winNum,&winRegInfo);
+
+	/* read base register*/
+	if (winRegInfo.baseLowRegOffs)
+	{
+		decRegs.baseReg = MV_REG_READ(winRegInfo.baseLowRegOffs);
+	}
+	else
+	{
+		decRegs.baseReg = 0;
+	}
+
+	/* read size reg */
+	if (winRegInfo.sizeRegOffs)
+	{
+		decRegs.sizeReg = MV_REG_READ(winRegInfo.sizeRegOffs);
+	}
+	else
+	{
+		decRegs.sizeReg =0;
+	}
+
+	if (MV_OK != mvCtrlRegToAddrDec(&decRegs,&(pAddrDecWin->addrWin)))
+	{
+		mvOsPrintf("mvPexTargetWinGet: mvCtrlRegToAddrDec Failed \n");
+		return MV_ERROR;
+
+	}
+
+	if (decRegs.sizeReg & PXWCR_WIN_EN)
+	{
+		pAddrDecWin->enable = MV_TRUE;
+	}
+	else
+	{
+		pAddrDecWin->enable = MV_FALSE;	  
+
+	}
+
+
+	#if 0
+    if (-1 == pAddrDecWin->addrWin.size)
+	{
+		return MV_ERROR;
+	}
+	#endif
+
+
+	/* get target bar */
+	if ((decRegs.sizeReg & PXWCR_WIN_BAR_MAP_MASK) == PXWCR_WIN_BAR_MAP_BAR1 )
+	{
+		pAddrDecWin->targetBar = 1;
+	} 
+	else if ((decRegs.sizeReg & PXWCR_WIN_BAR_MAP_MASK) == 
+			 PXWCR_WIN_BAR_MAP_BAR2 )
+	{
+		pAddrDecWin->targetBar = 2;
+	}
+
+	/* attrib and targetId */
+	pAddrDecWin->attrib = (decRegs.sizeReg & PXWCR_ATTRIB_MASK) >> 
+													PXWCR_ATTRIB_OFFS;
+	pAddrDecWin->targetId = (decRegs.sizeReg & PXWCR_TARGET_MASK) >> 
+													PXWCR_TARGET_OFFS;
+
+	targetAttrib.attrib = pAddrDecWin->attrib;
+	targetAttrib.targetId = pAddrDecWin->targetId;
+
+	pAddrDecWin->target = mvCtrlTargetGet(&targetAttrib);
+
+	return MV_OK;
+
+}
+
+
+/*******************************************************************************
+* mvPexTargetWinEnable - Enable/disable a PEX BAR window
+*
+* DESCRIPTION:
+*       This function enable/disable a PEX BAR window.
+*       if parameter 'enable' == MV_TRUE the routine will enable the 
+*       window, thus enabling PEX accesses for that BAR (before enabling the 
+*       window it is tested for overlapping). Otherwise, the window will 
+*       be disabled.
+*
+* INPUT:
+*       pexIf  - PEX interface number.
+*       bar    - BAR to be accessed by slave.
+*       enable - Enable/disable parameter.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_BAD_PARAM for bad parameters ,MV_ERROR on error ! otherwise MV_OK
+*
+*******************************************************************************/
+MV_STATUS mvPexTargetWinEnable(MV_U32 pexIf,MV_U32 winNum, MV_BOOL enable)
+{
+	PEX_WIN_REG_INFO winRegInfo;
+	MV_PEX_DEC_WIN addrDecWin;
+
+	/* Parameter checking   */
+	if(pexIf >= mvCtrlPexMaxIfGet())
+	{
+		mvOsPrintf("mvPexTargetWinEnable: ERR. Invalid PEX If %d\n", pexIf);
+		return MV_BAD_PARAM;
+	}
+
+	if (winNum >= PEX_MAX_TARGET_WIN)
+	{
+		mvOsPrintf("mvPexTargetWinEnable ERR. Invalid PEX winNum %d\n", winNum);
+		return MV_BAD_PARAM;
+
+	}
+
+
+	/* get the pex Window registers offsets */
+	pexWinRegInfoGet(pexIf,winNum,&winRegInfo);
+
+
+	/* if the address windows is disabled , we only disable the appropriare
+	pex window and ignore other settings */
+
+	if (MV_FALSE == enable)
+	{
+
+		/* this is not relevant to default and expantion rom
+		windows */
+		if (winRegInfo.sizeRegOffs)
+		{
+			if ((MV_PEX_WIN_DEFAULT != winNum)&&
+				(MV_PEX_WIN_EXP_ROM != winNum))
+			{
+				MV_REG_BIT_RESET(winRegInfo.sizeRegOffs, PXWCR_WIN_EN);
+			}
+		}
+
+	}
+	else
+	{
+		if (MV_OK != mvPexTargetWinGet(pexIf,winNum, &addrDecWin))
+		{
+			mvOsPrintf("mvPexTargetWinEnable: mvPexTargetWinGet Failed\n");
+			return MV_ERROR;
+		}
+
+		/* Check if the requested window overlaps with current windows	*/
+		if (MV_TRUE == pexWinOverlapDetect(pexIf,winNum, &addrDecWin.addrWin))
+		{
+			mvOsPrintf("mvPexTargetWinEnable: ERR. Target %d overlap\n", winNum);
+			return MV_BAD_PARAM;
+		}
+
+		if (MV_FALSE == pexIsWinWithinBar(pexIf,&addrDecWin.addrWin))
+		{
+			mvOsPrintf("mvPexTargetWinEnable: Win %d should be in bar boundries\n",
+					   winNum);
+			return MV_BAD_PARAM;
+		}
+
+
+		/* this is not relevant to default and expantion rom
+		windows */
+		if (winRegInfo.sizeRegOffs)
+		{
+			if ((MV_PEX_WIN_DEFAULT != winNum)&&
+				(MV_PEX_WIN_EXP_ROM != winNum))
+			{
+				MV_REG_BIT_SET(winRegInfo.sizeRegOffs, PXWCR_WIN_EN);
+			}
+		}
+
+
+	}
+
+	return MV_OK;
+
+}
+
+
+
+/*******************************************************************************
+* mvPexTargetWinRemap - Set PEX to target address window remap.
+*
+* DESCRIPTION:
+*       The PEX interface supports remap of the BAR original address window.
+*       For each BAR it is possible to define a remap address. For example
+*       an address 0x12345678 that hits BAR 0x10 (SDRAM CS[0]) will be modified
+*       according to remap register but will also be targeted to the 
+*       SDRAM CS[0].
+*
+* INPUT:
+*       pexIf    - PEX interface number.
+*       bar      - Peripheral target enumerator accessed by slave.
+*       pAddrWin - Address window to be checked.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_BAD_PARAM for bad parameters ,MV_ERROR on error ! otherwise MV_OK
+*
+*******************************************************************************/
+MV_STATUS mvPexTargetWinRemap(MV_U32 pexIf, MV_U32 winNum, 
+                           MV_PEX_REMAP_WIN *pAddrWin)
+{
+
+	PEX_WIN_REG_INFO winRegInfo;
+	
+	/* Parameter checking   */
+	if (pexIf >= mvCtrlPexMaxIfGet())
+	{
+		mvOsPrintf("mvPexTargetWinRemap: ERR. Invalid PEX interface num %d\n", 
+																		pexIf);
+		return MV_BAD_PARAM;
+	}
+	if (MV_PEX_WIN_DEFAULT == winNum)
+	{
+		mvOsPrintf("mvPexTargetWinRemap: ERR. Invalid PEX win num %d\n", 
+																		winNum);
+		return MV_BAD_PARAM;
+
+	}
+
+	if (MV_IS_NOT_ALIGN(pAddrWin->addrWin.baseLow, PXWRR_REMAP_ALIGNMENT))
+	{
+		mvOsPrintf("mvPexTargetWinRemap: Error remap PEX interface %d win %d."\
+				   "\nAddress 0x%08x is unaligned to size 0x%x.\n",
+				   pexIf,
+				   winNum,
+                   pAddrWin->addrWin.baseLow,
+				   pAddrWin->addrWin.size);
+		
+		return MV_ERROR;
+	}
+
+	pexWinRegInfoGet(pexIf, winNum, &winRegInfo);
+
+	/* Set remap low register value */
+	MV_REG_WRITE(winRegInfo.remapLowRegOffs, pAddrWin->addrWin.baseLow);
+	
+	/* Skip base high settings if the BAR has only base low (32-bit)		*/
+	if (0 != winRegInfo.remapHighRegOffs)
+	{
+		MV_REG_WRITE(winRegInfo.remapHighRegOffs, pAddrWin->addrWin.baseHigh);
+	}
+
+
+	if (pAddrWin->enable == MV_TRUE)
+	{
+		MV_REG_BIT_SET(winRegInfo.remapLowRegOffs,PXWRR_REMAP_EN);
+	}
+	else
+	{
+		MV_REG_BIT_RESET(winRegInfo.remapLowRegOffs,PXWRR_REMAP_EN);
+	}
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvPexTargetWinRemapEnable - 
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*
+* RETURN:
+*       MV_BAD_PARAM for bad parameters ,MV_ERROR on error ! otherwise MV_OK
+*
+*******************************************************************************/
+
+MV_STATUS mvPexTargetWinRemapEnable(MV_U32 pexIf, MV_U32 winNum, 
+                           MV_BOOL enable)
+{
+	PEX_WIN_REG_INFO winRegInfo;
+	
+	/* Parameter checking   */
+	if (pexIf >= mvCtrlPexMaxIfGet())
+	{
+		mvOsPrintf("mvPexTargetWinRemap: ERR. Invalid PEX interface num %d\n", 
+																		pexIf);
+		return MV_BAD_PARAM;
+	}
+	if (MV_PEX_WIN_DEFAULT == winNum)
+	{
+		mvOsPrintf("mvPexTargetWinRemap: ERR. Invalid PEX win num %d\n", 
+																		winNum);
+		return MV_BAD_PARAM;
+
+	}
+
+
+	pexWinRegInfoGet(pexIf, winNum, &winRegInfo);
+
+	if (enable == MV_TRUE)
+	{
+		MV_REG_BIT_SET(winRegInfo.remapLowRegOffs,PXWRR_REMAP_EN);
+	}
+	else
+	{
+		MV_REG_BIT_RESET(winRegInfo.remapLowRegOffs,PXWRR_REMAP_EN);
+	}
+
+	return MV_OK;
+
+}
+
+/*******************************************************************************
+*  mvPexBarSet - Set PEX bar address and size 
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_BAD_PARAM for bad parameters ,MV_ERROR on error ! otherwise MV_OK
+*
+*******************************************************************************/
+MV_STATUS mvPexBarSet(MV_U32 pexIf,
+						MV_U32 barNum,
+						MV_PEX_BAR *pAddrWin)
+{
+	MV_U32 regBaseLow;
+	MV_U32 regSize,sizeToReg;
+
+
+	/* check parameters */
+	if(pexIf >= mvCtrlPexMaxIfGet())
+	{
+		mvOsPrintf("mvPexBarSet: ERR. Invalid PEX interface %d\n", pexIf);
+		return MV_BAD_PARAM;
+	}
+
+	if(barNum >= PEX_MAX_BARS)
+	{
+		mvOsPrintf("mvPexBarSet: ERR. Invalid bar number %d\n", barNum);
+		return MV_BAD_PARAM;
+	}
+	
+
+	if (pAddrWin->addrWin.size == 0)
+	{
+		mvOsPrintf("mvPexBarSet: Size zero is Illigal\n" );
+		return MV_BAD_PARAM;
+	}
+
+
+	/* Check if the window complies with PEX spec							*/
+	if (MV_TRUE != pexBarIsValid(pAddrWin->addrWin.baseLow,
+								 pAddrWin->addrWin.size))
+	{
+        mvOsPrintf("mvPexBarSet: ERR. Target %d window invalid\n", barNum);
+		return MV_BAD_PARAM;
+	}
+
+    /* 2) Check if the requested bar overlaps with current bars		*/
+    if (MV_TRUE == pexBarOverlapDetect(pexIf,barNum, &pAddrWin->addrWin))
+	{
+        mvOsPrintf("mvPexBarSet: ERR. Target %d overlap\n", barNum);
+		return MV_BAD_PARAM;
+	}
+
+	/* Get size register value according to window size						*/
+	sizeToReg = ctrlSizeToReg(pAddrWin->addrWin.size, PXBCR_BAR_SIZE_ALIGNMENT);
+	
+	/* Read bar size */
+	if (PEX_INTER_REGS_BAR != barNum) /* internal registers have no size */
+	{
+		regSize = MV_REG_READ(PEX_BAR_CTRL_REG(pexIf,barNum));
+
+		/* Size parameter validity check.                                   */
+		if (-1 == sizeToReg)
+		{
+			mvOsPrintf("mvPexBarSet: ERR. Target BAR %d size invalid.\n",barNum);
+			return MV_BAD_PARAM;
+		}
+	
+		regSize &= ~PXBCR_BAR_SIZE_MASK;
+		regSize |= (sizeToReg << PXBCR_BAR_SIZE_OFFS) ;
+	
+		MV_REG_WRITE(PEX_BAR_CTRL_REG(pexIf,barNum),regSize);
+
+	}
+
+	/* set size */
+
+
+
+	/* Read base address low */
+	regBaseLow = MV_REG_READ(PEX_CFG_DIRECT_ACCESS(pexIf,
+												   PEX_MV_BAR_BASE(barNum)));
+
+	/* clear current base */
+	if (PEX_INTER_REGS_BAR == barNum)
+	{
+		regBaseLow &= ~PXBIR_BASE_MASK;
+        regBaseLow |= (pAddrWin->addrWin.baseLow & PXBIR_BASE_MASK);
+	}
+	else
+	{
+		regBaseLow &= ~PXBR_BASE_MASK;
+		regBaseLow |= (pAddrWin->addrWin.baseLow & PXBR_BASE_MASK);
+	}
+
+	/* if we had a previous value that contain the bar type (MeM\IO), we want to
+	restore it */
+	regBaseLow |= PEX_BAR_DEFAULT_ATTRIB;
+
+
+
+	/* write base low */
+    MV_REG_WRITE(PEX_CFG_DIRECT_ACCESS(pexIf,PEX_MV_BAR_BASE(barNum)),
+				regBaseLow);
+
+	if (pAddrWin->addrWin.baseHigh != 0)
+	{
+		/* Read base address high */
+		MV_REG_WRITE(PEX_CFG_DIRECT_ACCESS(pexIf,PEX_MV_BAR_BASE_HIGH(barNum)),
+								 pAddrWin->addrWin.baseHigh);
+
+	}
+
+	/* lastly enable the Bar */
+	if (pAddrWin->enable == MV_TRUE)
+	{
+		if (PEX_INTER_REGS_BAR != barNum) /* internal registers 
+												are enabled always */
+		{
+			MV_REG_BIT_SET(PEX_BAR_CTRL_REG(pexIf,barNum),PXBCR_BAR_EN);
+		}
+	}
+	else if (MV_FALSE == pAddrWin->enable)
+	{
+		if (PEX_INTER_REGS_BAR != barNum) /* internal registers 
+												are enabled always */
+		{
+			MV_REG_BIT_RESET(PEX_BAR_CTRL_REG(pexIf,barNum),PXBCR_BAR_EN);
+		}
+
+	}
+
+
+
+	return MV_OK;
+}
+
+
+/*******************************************************************************
+*  mvPexBarGet - Get PEX bar address and size
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_BAD_PARAM for bad parameters ,MV_ERROR on error ! otherwise MV_OK
+*
+*******************************************************************************/
+
+MV_STATUS mvPexBarGet(MV_U32 pexIf,
+								MV_U32 barNum,
+								MV_PEX_BAR *pAddrWin)
+{
+	/* check parameters */
+	if(pexIf >= mvCtrlPexMaxIfGet())
+	{
+		mvOsPrintf("mvPexBarGet: ERR. Invalid PEX interface %d\n", pexIf);
+		return MV_BAD_PARAM;
+	}
+
+	if(barNum >= PEX_MAX_BARS)
+	{
+		mvOsPrintf("mvPexBarGet: ERR. Invalid bar number %d\n", barNum);
+		return MV_BAD_PARAM;
+	}
+
+	/* read base low */
+	pAddrWin->addrWin.baseLow = 
+		MV_REG_READ(PEX_CFG_DIRECT_ACCESS(pexIf,PEX_MV_BAR_BASE(barNum)));
+
+
+	if (PEX_INTER_REGS_BAR == barNum)
+	{
+		pAddrWin->addrWin.baseLow &= PXBIR_BASE_MASK;
+	}
+	else
+	{
+		pAddrWin->addrWin.baseLow &= PXBR_BASE_MASK;
+	}
+
+
+	/* read base high */
+	pAddrWin->addrWin.baseHigh = 
+		MV_REG_READ(PEX_CFG_DIRECT_ACCESS(pexIf,PEX_MV_BAR_BASE_HIGH(barNum)));
+
+
+	/* Read bar size */
+	if (PEX_INTER_REGS_BAR != barNum) /* internal registers have no size */
+	{
+		pAddrWin->addrWin.size = MV_REG_READ(PEX_BAR_CTRL_REG(pexIf,barNum));
+
+		/* check if enable or not */
+		if (pAddrWin->addrWin.size & PXBCR_BAR_EN)
+		{
+			pAddrWin->enable = MV_TRUE;
+		}
+		else
+		{
+			pAddrWin->enable = MV_FALSE;
+		}
+			
+		/* now get the size */
+		pAddrWin->addrWin.size &= PXBCR_BAR_SIZE_MASK;
+		pAddrWin->addrWin.size >>= PXBCR_BAR_SIZE_OFFS;
+
+		pAddrWin->addrWin.size = ctrlRegToSize(pAddrWin->addrWin.size,
+											   PXBCR_BAR_SIZE_ALIGNMENT);
+
+	}
+	else /* PEX_INTER_REGS_BAR */
+	{
+		pAddrWin->addrWin.size = INTER_REGS_SIZE;
+		pAddrWin->enable = MV_TRUE;
+	}
+
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+*  mvPexBarEnable - 
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_BAD_PARAM for bad parameters ,MV_ERROR on error ! otherwise MV_OK
+*
+*******************************************************************************/
+
+
+MV_STATUS mvPexBarEnable(MV_U32 pexIf, MV_U32 barNum, MV_BOOL enable)
+{
+
+	MV_PEX_BAR pexBar;
+
+	/* check parameters */
+	if(pexIf >= mvCtrlPexMaxIfGet())
+	{
+		mvOsPrintf("mvPexBarEnable: ERR. Invalid PEX interface %d\n", pexIf);
+		return MV_BAD_PARAM;
+	}
+
+
+	if(barNum >= PEX_MAX_BARS)
+	{
+		mvOsPrintf("mvPexBarEnable: ERR. Invalid bar number %d\n", barNum);
+		return MV_BAD_PARAM;
+	}
+
+    if (PEX_INTER_REGS_BAR == barNum)
+	{
+		if (MV_TRUE == enable)
+		{
+			return MV_OK;
+		}
+		else
+		{
+			return MV_ERROR;
+		}
+	}
+
+
+	if (MV_FALSE == enable)
+	{
+			/* disable bar and quit */
+			MV_REG_BIT_RESET(PEX_BAR_CTRL_REG(pexIf,barNum),PXBCR_BAR_EN);
+			return MV_OK;
+	}
+
+	/* else */
+
+	if (mvPexBarGet(pexIf,barNum,&pexBar) != MV_OK)
+	{
+		mvOsPrintf("mvPexBarEnable: mvPexBarGet Failed\n");
+		return MV_ERROR;
+
+	}
+
+	if (MV_TRUE == pexBar.enable)
+	{
+		/* it is already enabled !!! */
+		return MV_OK;
+	}
+
+	/* else enable the bar*/
+
+	pexBar.enable = MV_TRUE;
+
+	if (mvPexBarSet(pexIf,barNum,&pexBar) != MV_OK)
+	{
+		mvOsPrintf("mvPexBarEnable: mvPexBarSet Failed\n");
+		return MV_ERROR;
+
+	}
+
+	return MV_OK;
+}
+
+
+/*******************************************************************************
+* pexWinOverlapDetect - Detect address windows overlapping
+*
+* DESCRIPTION:
+*       This function detects address window overlapping of a given address 
+*       window in PEX BARs.
+*
+* INPUT:
+*       pAddrWin - Address window to be checked.
+*       bar      - BAR to be accessed by slave.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE if the given address window overlap current address
+*       decode map, MV_FALSE otherwise.
+*
+*******************************************************************************/
+static MV_BOOL pexWinOverlapDetect(MV_U32 pexIf,
+									 MV_U32 winNum,
+									 MV_ADDR_WIN *pAddrWin)
+{
+    MV_U32 		   win;
+	MV_PEX_DEC_WIN addrDecWin;
+
+	
+	for(win = 0; win < PEX_MAX_TARGET_WIN -2 ; win++)
+    {
+        /* don't check our target or illegal targets */
+        if (winNum == win)
+        {
+            continue;
+        }
+        
+		/* Get window parameters 	*/
+		if (MV_OK != mvPexTargetWinGet(pexIf, win, &addrDecWin))
+		{
+			mvOsPrintf("pexWinOverlapDetect: ERR. TargetWinGet failed win=%x\n",
+					   win);
+            return MV_ERROR;
+		}
+
+		/* Do not check disabled windows	*/
+		if (MV_FALSE == addrDecWin.enable)
+		{
+			continue;
+		}
+
+        
+        if(MV_TRUE == ctrlWinOverlapTest(pAddrWin, &addrDecWin.addrWin))
+		{                    
+			mvOsPrintf("pexWinOverlapDetect: winNum %d overlap current %d\n", 
+															winNum, win);
+			return MV_TRUE;           
+		}
+    }
+    
+	return MV_FALSE;
+}
+
+/*******************************************************************************
+* pexIsWinWithinBar - Detect if address is within PEX bar boundries
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE if the given address window overlap current address
+*       decode map, MV_FALSE otherwise.
+*
+*******************************************************************************/
+static MV_BOOL pexIsWinWithinBar(MV_U32 pexIf,
+								   MV_ADDR_WIN *pAddrWin)
+{
+    MV_U32 		   bar;
+	MV_PEX_BAR addrDecWin;
+
+	for(bar = 0; bar < PEX_MAX_BARS; bar++)
+    {
+        
+		/* Get window parameters 	*/
+		if (MV_OK != mvPexBarGet(pexIf, bar, &addrDecWin))
+		{
+			mvOsPrintf("pexIsWinWithinBar: ERR. mvPexBarGet failed\n");
+            return MV_ERROR;
+		}
+		
+		/* Do not check disabled bars	*/
+		if (MV_FALSE == addrDecWin.enable)
+		{
+			continue;
+		}
+
+        
+        if(MV_TRUE == ctrlWinWithinWinTest(pAddrWin, &addrDecWin.addrWin))
+		{                    
+			return MV_TRUE;
+		}
+    }
+    
+	return MV_FALSE;
+
+}
+
+/*******************************************************************************
+* pexBarOverlapDetect - Detect address windows overlapping
+*
+* DESCRIPTION:
+*       This function detects address window overlapping of a given address 
+*       window in PEX BARs.
+*
+* INPUT:
+*       pAddrWin - Address window to be checked.
+*       bar      - BAR to be accessed by slave.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE if the given address window overlap current address
+*       decode map, MV_FALSE otherwise.
+*
+*******************************************************************************/
+static MV_BOOL pexBarOverlapDetect(MV_U32 pexIf,
+									 MV_U32 barNum,
+									 MV_ADDR_WIN *pAddrWin)
+{
+    MV_U32 		   bar;
+	MV_PEX_BAR barDecWin;
+
+	
+	for(bar = 0; bar < PEX_MAX_BARS; bar++)
+    {
+        /* don't check our target or illegal targets */
+        if (barNum == bar)
+        {
+            continue;
+        }
+        
+		/* Get window parameters 	*/
+		if (MV_OK != mvPexBarGet(pexIf, bar, &barDecWin))
+		{
+			mvOsPrintf("pexBarOverlapDetect: ERR. TargetWinGet failed\n");
+            return MV_ERROR;
+		}
+
+		/* don'nt check disabled bars */
+        if (barDecWin.enable == MV_FALSE)
+		{
+			continue;
+		}
+
+
+        if(MV_TRUE == ctrlWinOverlapTest(pAddrWin, &barDecWin.addrWin))
+		{                    
+			mvOsPrintf("pexBarOverlapDetect: winNum %d overlap current %d\n", 
+															barNum, bar);
+			return MV_TRUE;           
+		}
+    }
+    
+	return MV_FALSE;
+}
+
+/*******************************************************************************
+* pexBarIsValid - Check if the given address window is valid
+*
+* DESCRIPTION:
+*		PEX spec restrict BAR base to be aligned to BAR size.
+*		This function checks if the given address window is valid.
+*
+* INPUT:
+*       baseLow - 32bit low base address.
+*       size    - Window size.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE if the address window is valid, MV_FALSE otherwise.
+*
+*******************************************************************************/
+static MV_STATUS pexBarIsValid(MV_U32 baseLow, MV_U32 size)
+{
+
+	/* PCI spec restrict BAR base to be aligned to BAR size					*/
+	if(MV_IS_NOT_ALIGN(baseLow, size))
+	{
+		return MV_ERROR;
+	}
+	else
+	{
+		return MV_TRUE;
+	}
+	
+	return MV_TRUE;
+}
+
+/*******************************************************************************
+* pexBarRegInfoGet - Get BAR register information
+*
+* DESCRIPTION:
+* 		PEX BARs registers offsets are inconsecutive. 
+*		This function gets a PEX BAR register information like register offsets
+*		and function location of the BAR.
+*
+* INPUT:
+*       pexIf - PEX interface number.
+*		bar	  - The PEX BAR in question.	
+*
+* OUTPUT:
+*       pBarRegInfo - BAR register info struct.
+*
+* RETURN:
+*		MV_BAD_PARAM when bad parameters ,MV_ERROR on error ,othewise MV_OK
+*
+*******************************************************************************/
+static MV_STATUS pexWinRegInfoGet(MV_U32 pexIf, 
+								  MV_U32 winNum,
+								  PEX_WIN_REG_INFO *pWinRegInfo)
+{
+
+	if ((winNum >= 0)&&(winNum <=3))
+	{
+		pWinRegInfo->baseLowRegOffs   = PEX_WIN0_3_BASE_REG(pexIf,winNum);
+		pWinRegInfo->baseHighRegOffs  = 0;
+		pWinRegInfo->sizeRegOffs      = PEX_WIN0_3_CTRL_REG(pexIf,winNum);
+		pWinRegInfo->remapLowRegOffs  = PEX_WIN0_3_REMAP_REG(pexIf,winNum);
+		pWinRegInfo->remapHighRegOffs = 0;
+	}
+	else if ((winNum >= 4)&&(winNum <=5))
+	{
+		pWinRegInfo->baseLowRegOffs   = PEX_WIN4_5_BASE_REG(pexIf,winNum);
+		pWinRegInfo->baseHighRegOffs  = 0;
+		pWinRegInfo->sizeRegOffs      = PEX_WIN4_5_CTRL_REG(pexIf,winNum);
+		pWinRegInfo->remapLowRegOffs  = PEX_WIN4_5_REMAP_REG(pexIf,winNum);
+		pWinRegInfo->remapHighRegOffs = PEX_WIN4_5_REMAP_HIGH_REG(pexIf,winNum);
+
+	}
+	else if (MV_PEX_WIN_DEFAULT == winNum)
+	{
+		pWinRegInfo->baseLowRegOffs   = 0;
+		pWinRegInfo->baseHighRegOffs  = 0;
+		pWinRegInfo->sizeRegOffs      = PEX_WIN_DEFAULT_CTRL_REG(pexIf);
+		pWinRegInfo->remapLowRegOffs  = 0;
+		pWinRegInfo->remapHighRegOffs = 0;
+	}
+	else if (MV_PEX_WIN_EXP_ROM == winNum)
+	{
+		pWinRegInfo->baseLowRegOffs   = 0;
+		pWinRegInfo->baseHighRegOffs  = 0;
+		pWinRegInfo->sizeRegOffs      = PEX_WIN_EXP_ROM_CTRL_REG(pexIf);
+		pWinRegInfo->remapLowRegOffs  = PEX_WIN_EXP_ROM_REMAP_REG(pexIf);
+		pWinRegInfo->remapHighRegOffs = 0;
+
+	}
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* pexBarNameGet - Get the string name of PEX BAR.
+*
+* DESCRIPTION:
+*		This function get the string name of PEX BAR.
+*
+* INPUT:
+*       bar - PEX bar number.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       pointer to the string name of PEX BAR.
+*
+*******************************************************************************/
+const MV_8* pexBarNameGet( MV_U32 bar )
+{
+	switch( bar ) 
+	{
+		case PEX_INTER_REGS_BAR: 
+			return "Internal Regs Bar0....";
+		case PEX_DRAM_BAR: 
+			return "DRAM Bar1.............";
+		case PEX_DEVICE_BAR: 
+			return "Devices Bar2..........";
+		default:
+			 return "Bar unknown";
+	}
+}
+/*******************************************************************************
+* mvPexAddrDecShow - Print the PEX address decode map (BARs and windows).
+*
+* DESCRIPTION:
+*		This function print the PEX address decode map (BARs and windows).
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_VOID mvPexAddrDecShow(MV_VOID)
+{
+	MV_PEX_BAR pexBar;
+	MV_PEX_DEC_WIN win;
+	MV_U32 pexIf;
+	MV_U32 bar,winNum;
+
+	for( pexIf = 0; pexIf < mvCtrlPexMaxIfGet(); pexIf++ )
+	{
+		if (MV_FALSE == mvCtrlPwrClckGet(PEX_UNIT_ID, pexIf)) continue;
+		mvOsOutput( "\n" );
+		mvOsOutput( "PEX%d:\n", pexIf );
+		mvOsOutput( "-----\n" );
+
+		mvOsOutput( "\nPex Bars \n\n");
+
+		for( bar = 0; bar < PEX_MAX_BARS; bar++ ) 
+		{
+			memset( &pexBar, 0, sizeof(MV_PEX_BAR) );
+
+			mvOsOutput( "%s ", pexBarNameGet(bar) );
+
+			if( mvPexBarGet( pexIf, bar, &pexBar ) == MV_OK )
+			{
+				if( pexBar.enable )
+				{
+                    mvOsOutput( "base %08x, ", pexBar.addrWin.baseLow );
+                    mvSizePrint( pexBar.addrWin.size );
+                    mvOsOutput( "\n" );
+				}
+				else
+					mvOsOutput( "disable\n" );
+			}
+		}
+		mvOsOutput( "\nPex Decode Windows\n\n");
+
+		for( winNum = 0; winNum < PEX_MAX_TARGET_WIN - 2; winNum++)
+		{
+			memset( &win, 0,sizeof(MV_PEX_DEC_WIN) );
+
+			mvOsOutput( "win%d - ", winNum );
+
+			if ( mvPexTargetWinGet(pexIf,winNum,&win) == MV_OK)
+			{
+				if (win.enable)
+				{
+					mvOsOutput( "%s base %08x, ",
+					mvCtrlTargetNameGet(win.target), win.addrWin.baseLow );
+					mvOsOutput( "...." );
+					mvSizePrint( win.addrWin.size );
+
+					mvOsOutput( "\n" );
+				}
+				else
+					mvOsOutput( "disable\n" );
+
+
+			}
+		}
+	
+		memset( &win, 0,sizeof(MV_PEX_DEC_WIN) );
+
+		mvOsOutput( "default win - " );
+
+		if ( mvPexTargetWinGet(pexIf, MV_PEX_WIN_DEFAULT, &win) == MV_OK)
+		{
+			mvOsOutput( "%s ",
+			mvCtrlTargetNameGet(win.target) );
+			mvOsOutput( "\n" );
+		}
+		memset( &win, 0,sizeof(MV_PEX_DEC_WIN) );
+
+		mvOsOutput( "Expansion ROM - " );
+
+		if ( mvPexTargetWinGet(pexIf, MV_PEX_WIN_EXP_ROM, &win) == MV_OK)
+		{
+			mvOsOutput( "%s ",
+			mvCtrlTargetNameGet(win.target) );
+			mvOsOutput( "\n" );
+		}
+
+	}
+}
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysCesa.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysCesa.h
@@ -0,0 +1,100 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __mvSysCesa_h__
+#define __mvSysCesa_h__
+
+
+#include "mvCommon.h"
+#include "cesa/mvCesa.h"
+#include "ctrlEnv/mvCtrlEnvSpec.h"
+#include "ctrlEnv/sys/mvCpuIf.h"
+
+/***************************** TDMA Registers *************************************/
+
+#define MV_CESA_TDMA_ADDR_DEC_WIN           4
+
+#define MV_CESA_TDMA_BASE_ADDR_REG(win)     (MV_CESA_TDMA_REG_BASE + 0xa00 + (win<<3))
+
+#define MV_CESA_TDMA_WIN_CTRL_REG(win)      (MV_CESA_TDMA_REG_BASE + 0xa04 + (win<<3))
+
+#define MV_CESA_TDMA_WIN_ENABLE_BIT         0
+#define MV_CESA_TDMA_WIN_ENABLE_MASK        (1 << MV_CESA_TDMA_WIN_ENABLE_BIT)
+
+#define MV_CESA_TDMA_WIN_TARGET_OFFSET      4 
+#define MV_CESA_TDMA_WIN_TARGET_MASK        (0xf << MV_CESA_TDMA_WIN_TARGET_OFFSET)
+
+#define MV_CESA_TDMA_WIN_ATTR_OFFSET        8 
+#define MV_CESA_TDMA_WIN_ATTR_MASK          (0xff << MV_CESA_TDMA_WIN_ATTR_OFFSET)
+
+#define MV_CESA_TDMA_WIN_SIZE_OFFSET        16
+#define MV_CESA_TDMA_WIN_SIZE_MASK          (0xFFFF << MV_CESA_TDMA_WIN_SIZE_OFFSET)
+
+#define MV_CESA_TDMA_WIN_BASE_OFFSET        16
+#define MV_CESA_TDMA_WIN_BASE_MASK          (0xFFFF << MV_CESA_TDMA_WIN_BASE_OFFSET)
+
+
+MV_STATUS   mvCesaInit (int numOfSession, int queueDepth, char* pSramBase, void *osHandle);
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysAudio.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysAudio.c
@@ -0,0 +1,337 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+#include "mvSysAudio.h"
+
+/*******************************************************************************
+* mvAudioWinSet - Set AUDIO target address window
+*
+* DESCRIPTION:
+*       This function sets a peripheral target (e.g. SDRAM bank0, PCI_MEM0) 
+*       address window, also known as address decode window. 
+*       After setting this target window, the AUDIO will be able to access the 
+*       target within the address window. 
+*
+* INPUT:
+*       winNum      - AUDIO target address decode window number.
+*       pAddrDecWin - AUDIO target window data structure.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_ERROR if address window overlapps with other address decode windows.
+*       MV_BAD_PARAM if base address is invalid parameter or target is 
+*       unknown.
+*
+*******************************************************************************/
+MV_STATUS mvAudioWinSet(int unit, MV_U32 winNum, MV_AUDIO_DEC_WIN *pAddrDecWin)
+{
+    MV_TARGET_ATTRIB    targetAttribs;
+    MV_DEC_REGS         decRegs;
+
+    /* Parameter checking   */
+    if (winNum >= MV_AUDIO_MAX_ADDR_DECODE_WIN)
+    {
+        mvOsPrintf("%s: ERR. Invalid win num %d\n",__FUNCTION__, winNum);
+        return MV_BAD_PARAM;
+    }
+    
+    /* check if address is aligned to the size */
+    if(MV_IS_NOT_ALIGN(pAddrDecWin->addrWin.baseLow, pAddrDecWin->addrWin.size))
+    {
+		mvOsPrintf("mvAudioWinSet:Error setting AUDIO window %d to "\
+			   "target %s.\nAddress 0x%08x is unaligned to size 0x%x.\n",
+			   winNum,
+			   mvCtrlTargetNameGet(pAddrDecWin->target), 
+			   pAddrDecWin->addrWin.baseLow,
+			   pAddrDecWin->addrWin.size);
+		return MV_ERROR;
+    }
+
+    decRegs.baseReg = 0;
+    decRegs.sizeReg = 0;
+
+    if (MV_OK != mvCtrlAddrDecToReg(&(pAddrDecWin->addrWin),&decRegs))
+    {
+        mvOsPrintf("%s: mvCtrlAddrDecToReg Failed\n", __FUNCTION__);
+        return MV_ERROR;
+    }
+
+    mvCtrlAttribGet(pAddrDecWin->target, &targetAttribs);
+                                                                                                                         
+    /* set attributes */
+    decRegs.sizeReg &= ~MV_AUDIO_WIN_ATTR_MASK;
+    decRegs.sizeReg |= (targetAttribs.attrib << MV_AUDIO_WIN_ATTR_OFFSET);
+
+    /* set target ID */
+    decRegs.sizeReg &= ~MV_AUDIO_WIN_TARGET_MASK;
+    decRegs.sizeReg |= (targetAttribs.targetId << MV_AUDIO_WIN_TARGET_OFFSET);
+
+    if (pAddrDecWin->enable == MV_TRUE)
+    {
+        decRegs.sizeReg |= MV_AUDIO_WIN_ENABLE_MASK;
+    }
+    else
+    {
+        decRegs.sizeReg &= ~MV_AUDIO_WIN_ENABLE_MASK;
+    }
+
+    MV_REG_WRITE( MV_AUDIO_WIN_CTRL_REG(unit, winNum), decRegs.sizeReg);
+    MV_REG_WRITE( MV_AUDIO_WIN_BASE_REG(unit, winNum), decRegs.baseReg);
+    
+    return MV_OK;
+}
+
+/*******************************************************************************
+* mvAudioWinGet - Get AUDIO peripheral target address window.
+*
+* DESCRIPTION:
+*       Get AUDIO peripheral target address window.
+*
+* INPUT:
+*       winNum - AUDIO target address decode window number.
+*
+* OUTPUT:
+*       pAddrDecWin - AUDIO target window data structure.
+*
+* RETURN:
+*       MV_ERROR if register parameters are invalid.
+*
+*******************************************************************************/
+MV_STATUS mvAudioWinGet(int unit, MV_U32 winNum, MV_AUDIO_DEC_WIN *pAddrDecWin)
+{
+    MV_DEC_REGS         decRegs;
+    MV_TARGET_ATTRIB    targetAttrib;
+                                                                                                                         
+    /* Parameter checking   */
+    if (winNum >= MV_AUDIO_MAX_ADDR_DECODE_WIN)
+    {
+        mvOsPrintf("%s : ERR. Invalid winNum %d\n", 
+                    __FUNCTION__,  winNum);
+        return MV_NOT_SUPPORTED;
+    }
+
+    decRegs.baseReg = MV_REG_READ( MV_AUDIO_WIN_BASE_REG(unit, winNum) );
+    decRegs.sizeReg = MV_REG_READ( MV_AUDIO_WIN_CTRL_REG(unit, winNum) );
+ 
+    if (MV_OK != mvCtrlRegToAddrDec(&decRegs, &pAddrDecWin->addrWin) )
+    {
+        mvOsPrintf("%s: mvCtrlRegToAddrDec Failed\n", __FUNCTION__);
+        return MV_ERROR; 
+    }
+       
+    /* attrib and targetId */
+    targetAttrib.attrib = (decRegs.sizeReg & MV_AUDIO_WIN_ATTR_MASK) >> 
+		MV_AUDIO_WIN_ATTR_OFFSET;
+    targetAttrib.targetId = (decRegs.sizeReg & MV_AUDIO_WIN_TARGET_MASK) >> 
+		MV_AUDIO_WIN_TARGET_OFFSET;
+ 
+    pAddrDecWin->target = mvCtrlTargetGet(&targetAttrib);
+
+    /* Check if window is enabled   */
+    if(decRegs.sizeReg & MV_AUDIO_WIN_ENABLE_MASK) 
+    {
+        pAddrDecWin->enable = MV_TRUE;
+    }
+    else
+    {
+        pAddrDecWin->enable = MV_FALSE;
+    }
+    return MV_OK;
+}
+/*******************************************************************************
+* mvAudioAddrDecShow - Print the AUDIO address decode map.
+*
+* DESCRIPTION:
+*		This function print the AUDIO address decode map.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_VOID mvAudioUnitAddrDecShow(int unit)
+{
+	MV_AUDIO_DEC_WIN win;
+	int i;
+
+	mvOsOutput( "\n" );
+	mvOsOutput( "AUDIO:\n" );
+	mvOsOutput( "----\n" );
+
+	for( i = 0; i < MV_AUDIO_MAX_ADDR_DECODE_WIN; i++ )
+	{
+            memset( &win, 0, sizeof(MV_AUDIO_DEC_WIN) );
+
+	    mvOsOutput( "win%d - ", i );
+
+	    if( mvAudioWinGet(unit, i, &win) == MV_OK )
+	    {
+	        if( win.enable )
+	        {
+                    mvOsOutput( "%s base %08x, ",
+                    mvCtrlTargetNameGet(win.target), win.addrWin.baseLow );
+                    mvOsOutput( "...." );
+
+                    mvSizePrint( win.addrWin.size );
+    
+		    mvOsOutput( "\n" );
+                }
+		else
+		mvOsOutput( "disable\n" );
+	    }
+	}
+}
+
+MV_VOID mvAudioAddrDecShow(MV_VOID)
+{
+	int unit;
+
+	for (unit = 0; unit < MV_AUDIO_MAX_UNITS; unit++)
+	{
+		if (MV_FALSE == mvCtrlPwrClckGet(AUDIO_UNIT_ID, unit)) continue;
+
+		mvAudioUnitAddrDecShow(unit);
+	} 
+}
+
+
+/*******************************************************************************
+* mvAudioWinInit - Initialize the integrated AUDIO target address window.
+*
+* DESCRIPTION:
+*       Initialize the AUDIO peripheral target address window.
+*
+* INPUT:
+*
+*
+* OUTPUT:
+*     
+*
+* RETURN:
+*       MV_ERROR if register parameters are invalid.
+*
+*******************************************************************************/
+MV_STATUS mvAudioWinInit(int unit)
+{
+    int             winNum;
+    MV_AUDIO_DEC_WIN  audioWin;
+    MV_CPU_DEC_WIN  cpuAddrDecWin;
+    MV_U32          status;
+
+    /* Initiate Audio address decode */
+
+    /* First disable all address decode windows */
+    for(winNum = 0; winNum < MV_AUDIO_MAX_ADDR_DECODE_WIN; winNum++)
+    {
+        MV_U32  regVal = MV_REG_READ(MV_AUDIO_WIN_CTRL_REG(unit, winNum));
+        regVal &= ~MV_AUDIO_WIN_ENABLE_MASK;
+        MV_REG_WRITE(MV_AUDIO_WIN_CTRL_REG(unit, winNum), regVal);
+    }
+
+    for(winNum = 0; winNum < MV_AUDIO_MAX_ADDR_DECODE_WIN; winNum++)
+    {
+	/* We will set the Window to DRAM_CS0 in default */
+	/* first get attributes from CPU If */
+	status = mvCpuIfTargetWinGet(SDRAM_CS0,	&cpuAddrDecWin);
+	
+	if (MV_OK != status)
+	{
+		mvOsPrintf("%s: ERR. mvCpuIfTargetWinGet failed\n", __FUNCTION__);
+		return MV_ERROR;
+	}
+	
+	if (cpuAddrDecWin.enable == MV_TRUE)
+	{
+		audioWin.addrWin.baseHigh = cpuAddrDecWin.addrWin.baseHigh;
+		audioWin.addrWin.baseLow  = cpuAddrDecWin.addrWin.baseLow;
+		audioWin.addrWin.size     = cpuAddrDecWin.addrWin.size;
+		audioWin.enable           = MV_TRUE;
+		audioWin.target           = SDRAM_CS0;
+	
+		if(MV_OK != mvAudioWinSet(unit, winNum, &audioWin))
+		{
+			return MV_ERROR;
+		}
+	}
+    }
+
+    return MV_OK;
+}
+
+
+
+MV_STATUS mvAudioInit(MV_U8 unit)
+{
+	mvAudioWinInit(unit);
+	mvAudioHalInit(unit);
+    	return MV_OK;
+}
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysUsb.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysUsb.h
@@ -0,0 +1,125 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+        this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCmvSysUsbh
+#define __INCmvSysUsbh
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/* includes */
+#include "usb/mvUsb.h"
+#include "ctrlEnv/sys/mvCpuIf.h"
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "ctrlEnv/mvCtrlEnvAddrDec.h"
+
+#define MV_USB_MAX_ADDR_DECODE_WIN  4
+
+/*******************************************/
+/* USB Bridge Registers                    */
+/*******************************************/
+#define MV_USB_BRIDGE_CTRL_REG(dev)              (USB_REG_BASE(dev) + 0x300)
+
+#define MV_USB_WIN_CTRL_REG(dev, win)        (USB_REG_BASE(dev) + 0x320 + ((win)<<4)) 
+#define MV_USB_WIN_BASE_REG(dev, win)        (USB_REG_BASE(dev) + 0x324 + ((win)<<4))
+
+/* BITs in Windows 0-3 Control and Base Registers */
+#define MV_USB_WIN_ENABLE_BIT               0
+#define MV_USB_WIN_ENABLE_MASK              (1 << MV_USB_WIN_ENABLE_BIT)
+
+#define MV_USB_WIN_BURST_WR_LIMIT_BIT       1
+#define MV_USB_WIN_BURST_WR_LIMIT_MASK      (1 << MV_USB_WIN_BURST_WR_LIMIT_BIT)
+#define MV_USB_WIN_BURST_WR_NO_LIMIT        (0 << MV_USB_WIN_BURST_WR_LIMIT_BIT)
+#define MV_USB_WIN_BURST_WR_32BIT_LIMIT     (1 << MV_USB_WIN_BURST_WR_LIMIT_BIT)
+
+#define MV_USB_WIN_TARGET_OFFSET            4
+#define MV_USB_WIN_TARGET_MASK              (0xF << MV_USB_WIN_TARGET_OFFSET)
+
+#define MV_USB_WIN_ATTR_OFFSET              8
+#define MV_USB_WIN_ATTR_MASK                (0xFF << MV_USB_WIN_ATTR_OFFSET)
+
+#define MV_USB_WIN_SIZE_OFFSET              16
+#define MV_USB_WIN_SIZE_MASK                (0xFFFF << MV_USB_WIN_SIZE_OFFSET)
+
+#define MV_USB_WIN_BASE_OFFSET              16
+#define MV_USB_WIN_BASE_MASK                (0xFFFF << MV_USB_WIN_BASE_OFFSET)
+
+
+#define MV_USB_BRIDGE_IPG_REG(dev)          (USB_REG_BASE(dev) + 0x360)
+
+
+MV_STATUS   mvUsbInit(int dev, MV_BOOL isHost);
+
+MV_STATUS   mvUsbWinInit(int dev);
+MV_STATUS   mvUsbWinSet(int dev, MV_U32 winNum, MV_DEC_WIN *pAddrWin);
+MV_STATUS   mvUsbWinGet(int dev, MV_U32 winNum, MV_DEC_WIN *pAddrWin);
+
+void        mvUsbAddrDecShow(void);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* __INCmvUsbh */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysTs.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysTs.h
@@ -0,0 +1,110 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+        this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCmvSysTsh
+#define __INCmvSysTsh
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/* includes */
+#include "ts/mvTsu.h"
+#include "ctrlEnv/sys/mvCpuIf.h"
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "ctrlEnv/mvCtrlEnvAddrDec.h"
+
+#define TSU_MAX_DECODE_WIN	4
+
+
+/*******************************************/
+/* TSU Windows Registers                   */
+/*******************************************/
+#define MV_TSU_WIN_CTRL_REG(win)	(TSU_GLOBAL_REG_BASE +0x30 + 0x10 * win)
+#define MV_TSU_WIN_BASE_REG(win)	(TSU_GLOBAL_REG_BASE +0x34 + 0x10 * win)
+
+/* TSU windows control register.		*/
+#define TSU_WIN_CTRL_EN_MASK		(0x1 << 0)
+#define TSU_WIN_CTRL_TARGET_OFFS	4
+#define TSU_WIN_CTRL_TARGET_MASK	(0xF << TSU_WIN_CTRL_TARGET_OFFS)
+#define TSU_WIN_CTRL_ATTR_OFFS		8
+#define TSU_WIN_CTRL_ATTR_MASK		(0xFF << TSU_WIN_CTRL_ATTR_OFFS)
+#define TSU_WIN_CTRL_SIZE_OFFS		16
+#define TSU_WIN_CTRL_SIZE_MASK		(0xFFFF << TSU_WIN_CTRL_SIZE_OFFS)
+
+/* TSU windows base register.			*/
+#define TSU_WIN_BASE_OFFS		16
+#define TSU_WIN_BASE_MASK		(0xFFFF << TSU_WIN_BASE_OFFS)
+
+MV_STATUS mvTsuWinInit(void);
+
+void mvTsuAddrDecShow(void);
+MV_STATUS mvTsuInit(MV_TSU_CORE_CLOCK coreClock, MV_TSU_PORTS_MODE mode,
+	            void *osHandle);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* __INCmvTsh */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysXor.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/ctrlEnv/sys/mvSysXor.h
@@ -0,0 +1,140 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#ifndef __INCMVSysXorh
+#define __INCMVSysXorh
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "ctrlEnv/sys/mvCpuIf.h"
+
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "ctrlEnv/mvCtrlEnvAddrDec.h"
+
+#define XOR_MAX_ADDR_DEC_WIN	8	/* Maximum address decode windows		*/
+#define XOR_MAX_REMAP_WIN       4	/* Maximum address arbiter windows		*/
+
+/* XOR Engine Address Decoding Register Map */                  
+#define XOR_WINDOW_CTRL_REG(unit,chan)     (XOR_UNIT_BASE(unit)+(0x240 + ((chan) * 4)))
+#define XOR_BASE_ADDR_REG(unit,winNum)     (XOR_UNIT_BASE(unit)+(0x250 + ((winNum) * 4)))
+#define XOR_SIZE_MASK_REG(unit,winNum)     (XOR_UNIT_BASE(unit)+(0x270 + ((winNum) * 4)))
+#define XOR_HIGH_ADDR_REMAP_REG(unit,winNum) (XOR_UNIT_BASE(unit)+(0x290 + ((winNum) * 4)))
+
+/* XOR Engine [0..1] Window Control Registers (XExWCR) */
+#define XEXWCR_WIN_EN_OFFS(winNum)          (winNum)
+#define XEXWCR_WIN_EN_MASK(winNum)          (1 << (XEXWCR_WIN_EN_OFFS(winNum)))
+#define XEXWCR_WIN_EN_ENABLE(winNum)        (1 << (XEXWCR_WIN_EN_OFFS(winNum)))
+#define XEXWCR_WIN_EN_DISABLE(winNum)       (0 << (XEXWCR_WIN_EN_OFFS(winNum)))
+
+#define XEXWCR_WIN_ACC_OFFS(winNum)         ((2 * winNum) + 16)
+#define XEXWCR_WIN_ACC_MASK(winNum)         (3 << (XEXWCR_WIN_ACC_OFFS(winNum)))
+#define XEXWCR_WIN_ACC_NO_ACC(winNum)       (0 << (XEXWCR_WIN_ACC_OFFS(winNum)))
+#define XEXWCR_WIN_ACC_RO(winNum)           (1 << (XEXWCR_WIN_ACC_OFFS(winNum)))
+#define XEXWCR_WIN_ACC_RW(winNum)           (3 << (XEXWCR_WIN_ACC_OFFS(winNum)))
+
+/* XOR Engine Base Address Registers (XEBARx) */
+#define XEBARX_TARGET_OFFS                  (0)
+#define XEBARX_TARGET_MASK                  (0xF << XEBARX_TARGET_OFFS)
+#define XEBARX_ATTR_OFFS                    (8)
+#define XEBARX_ATTR_MASK                    (0xFF << XEBARX_ATTR_OFFS)
+#define XEBARX_BASE_OFFS                    (16)
+#define XEBARX_BASE_MASK                    (0xFFFF << XEBARX_BASE_OFFS)
+
+/* XOR Engine Size Mask Registers (XESMRx) */
+#define XESMRX_SIZE_MASK_OFFS               (16)
+#define XESMRX_SIZE_MASK_MASK               (0xFFFF << XESMRX_SIZE_MASK_OFFS)
+
+/* XOR Engine High Address Remap Register (XEHARRx1) */
+#define XEHARRX_REMAP_OFFS                  (0)
+#define XEHARRX_REMAP_MASK                  (0xFFFFFFFF << XEHARRX_REMAP_OFFS)
+
+typedef struct _mvXorDecWin
+{
+    MV_TARGET     target;
+    MV_ADDR_WIN   addrWin; /* An address window*/
+    MV_BOOL       enable;  /* Address decode window is enabled/disabled */
+ 
+}MV_XOR_DEC_WIN;
+
+MV_STATUS   mvXorInit (MV_VOID);
+MV_STATUS   mvXorTargetWinSet(MV_U32 unit, MV_U32 winNum,
+			      MV_XOR_DEC_WIN *pAddrDecWin);
+MV_STATUS   mvXorTargetWinGet(MV_U32 unit, MV_U32 winNum,
+			      MV_XOR_DEC_WIN *pAddrDecWin);
+MV_STATUS   mvXorTargetWinEnable(MV_U32 unit, 
+			      MV_U32 winNum, MV_BOOL enable);
+MV_STATUS   mvXorProtWinSet (MV_U32 unit,MV_U32 chan, MV_U32 winNum, MV_BOOL access, 
+                             MV_BOOL write);
+MV_STATUS   mvXorPciRemap(MV_U32 unit, MV_U32 winNum, MV_U32 addrHigh);
+
+MV_VOID     mvXorAddrDecShow(MV_VOID);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/boardEnv/mvBoardEnvSpec.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/boardEnv/mvBoardEnvSpec.h
@@ -0,0 +1,201 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+
+#ifndef __INCmvBoardEnvSpech
+#define __INCmvBoardEnvSpech
+
+#include "mvSysHwConfig.h"
+
+
+/* For future use */
+#define BD_ID_DATA_START_OFFS		0x0
+#define BD_DETECT_SEQ_OFFS		0x0
+#define BD_SYS_NUM_OFFS			0x4
+#define BD_NAME_OFFS			0x8
+
+/* I2C bus addresses */
+#define MV_BOARD_CTRL_I2C_ADDR			0x0     /* Controller slave addr */
+#define MV_BOARD_CTRL_I2C_ADDR_TYPE 		ADDR7_BIT
+#define MV_BOARD_DIMM0_I2C_ADDR			0x56
+#define MV_BOARD_DIMM0_I2C_ADDR_TYPE 		ADDR7_BIT
+#define MV_BOARD_DIMM1_I2C_ADDR			0x54
+#define MV_BOARD_DIMM1_I2C_ADDR_TYPE 		ADDR7_BIT
+#define MV_BOARD_EEPROM_I2C_ADDR	    	0x51
+#define MV_BOARD_EEPROM_I2C_ADDR_TYPE 		ADDR7_BIT
+#define MV_BOARD_MAIN_EEPROM_I2C_ADDR	   	0x50
+#define MV_BOARD_MAIN_EEPROM_I2C_ADDR_TYPE 	ADDR7_BIT
+#define MV_BOARD_MUX_I2C_ADDR_ENTRY		0x2
+#define MV_BOARD_DIMM_I2C_CHANNEL		0x0
+
+#define BOOT_FLASH_INDEX			0
+#define MAIN_FLASH_INDEX			1
+
+/* Supported clocks */
+#define MV_BOARD_TCLK_100MHZ	100000000   
+#define MV_BOARD_TCLK_125MHZ	125000000	
+#define MV_BOARD_TCLK_133MHZ	133333333   
+#define MV_BOARD_TCLK_150MHZ	150000000  
+#define MV_BOARD_TCLK_166MHZ	166666667   
+#define MV_BOARD_TCLK_200MHZ	200000000   
+
+#define MV_BOARD_SYSCLK_100MHZ	100000000   
+#define MV_BOARD_SYSCLK_125MHZ	125000000  
+#define MV_BOARD_SYSCLK_133MHZ	133333333   
+#define MV_BOARD_SYSCLK_150MHZ	150000000  
+#define MV_BOARD_SYSCLK_166MHZ	166666667   
+#define MV_BOARD_SYSCLK_200MHZ	200000000   
+#define MV_BOARD_SYSCLK_233MHZ	233333333   
+#define MV_BOARD_SYSCLK_250MHZ	250000000   
+#define MV_BOARD_SYSCLK_267MHZ	266666667 
+#define MV_BOARD_SYSCLK_300MHZ	300000000
+#define MV_BOARD_SYSCLK_333MHZ	333333334 
+#define MV_BOARD_SYSCLK_400MHZ	400000000   
+
+/* Board specific */
+/* =============================== */
+
+/* boards ID numbers */
+
+#define BOARD_ID_BASE           		0x0
+
+/* New board ID numbers */
+#define DB_88F6281_BP_ID			(BOARD_ID_BASE+0x0)
+#define DB_88F6281_BP_MLL_ID			1680
+#define RD_88F6281_ID				(BOARD_ID_BASE+0x1)
+#define RD_88F6281_MLL_ID			1682
+#define DB_88F6192_BP_ID			(BOARD_ID_BASE+0x2)
+#define RD_88F6192_ID				(BOARD_ID_BASE+0x3)
+#define RD_88F6192_MLL_ID			1681
+#define DB_88F6180_BP_ID			(BOARD_ID_BASE+0x4)
+#define RD_88F6180_ID				(BOARD_ID_BASE+0x5)
+#define BOARD_ID_88F6281_MAX                    (BOARD_ID_BASE+0x8)
+#define MV_MAX_BOARD_ID 			BOARD_ID_88F6281_MAX
+
+/* DB-88F6281-BP */
+#define DB_88F6281_MPP0_7                   	0x01111111
+#define DB_88F6281_MPP8_15                   	0x11113311
+#define DB_88F6281_MPP16_23                   	0x00551111
+#define DB_88F6281_MPP24_31                   	0x00000000
+#define DB_88F6281_MPP32_39                   	0x00000000
+#define DB_88F6281_MPP40_47                   	0x00000000
+#define DB_88F6281_MPP48_55                   	0x00000000
+#define DB_88F6281_OE_LOW                       (~(BIT7))
+#define DB_88F6281_OE_HIGH                      (~((BIT3)|(BIT13)|(BIT14)|(BIT15)))
+#define DB_88F6281_OE_VAL_LOW                   0x0
+#define DB_88F6281_OE_VAL_HIGH                  0x0
+
+/* RD-88F6281 */
+#define RD_88F6281_MPP0_7                   	0x01111111
+#define RD_88F6281_MPP8_15                   	0x11113311
+#define RD_88F6281_MPP16_23                   	0x00551111
+#define RD_88F6281_MPP24_31                   	0x22222222
+#define RD_88F6281_MPP32_39                   	0x40440222
+#define RD_88F6281_MPP40_47                   	0x00004444
+#define RD_88F6281_MPP48_55                   	0x00000000
+#define RD_88F6281_OE_LOW                       (~(BIT7))
+#define RD_88F6281_OE_HIGH                      (~((BIT4)|(BIT6)|(BIT7)|(BIT12)|(BIT13)|(BIT16)|(BIT17)))
+#define RD_88F6281_OE_VAL_LOW                   0x0
+#define RD_88F6281_OE_VAL_HIGH                  ((BIT6)|(BIT13)|(BIT16)|(BIT17))
+
+/* DB-88F6192-BP */
+#define DB_88F6192_MPP0_7                   	0x01111111
+#define DB_88F6192_MPP8_15                   	0x11113311
+#define DB_88F6192_MPP16_23                   	0x05551111
+#define DB_88F6192_MPP24_31                   	0x00000000
+#define DB_88F6192_MPP32_35                   	0x00000000
+#define DB_88F6192_OE_LOW                       (~(BIT7))
+#define DB_88F6192_OE_HIGH                      (~0x0)
+#define DB_88F6192_OE_VAL_LOW                   0x0
+#define DB_88F6192_OE_VAL_HIGH                  0x0
+
+/* RD-88F6192 */
+#define RD_88F6192_MPP0_7                   	0x01222222
+#define RD_88F6192_MPP8_15                   	0x00000011
+#define RD_88F6192_MPP16_23                   	0x05550000
+#define RD_88F6192_MPP24_31                   	0x0
+#define RD_88F6192_MPP32_35                   	0x0
+#define RD_88F6192_OE_LOW                       (~((BIT7)|(BIT10)|(BIT12)|(BIT13)|(BIT15)|(BIT16)|\
+						   (BIT17)|(BIT18)|(BIT19)|(BIT23)|(BIT28)|(BIT29)))
+#define RD_88F6192_OE_HIGH                      (~((BIT1)|(BIT3)|(BIT4)))
+#define RD_88F6192_OE_VAL_LOW                   0x10400
+#define RD_88F6192_OE_VAL_HIGH                  0x8
+
+/* DB-88F6180-BP */
+#define DB_88F6180_MPP0_7                   	0x01222222
+#define DB_88F6180_MPP8_10                   	0x00000011
+#define DB_88F6180_OE_LOW                       (~((BIT7)|(BIT10)))
+#define DB_88F6180_OE_HIGH                      (~0x0)
+#define DB_88F6180_OE_VAL_LOW                   0x0
+#define DB_88F6180_OE_VAL_HIGH                  0x0
+
+/* RD-88F6180 */
+#define RD_88F6180_MPP0_7                   	0x01222222
+#define RD_88F6180_MPP8_10                   	0x00000000
+#define RD_88F6180_OE_LOW                       (~((BIT7)|(BIT10)))
+#define RD_88F6180_OE_HIGH                      (~0x0)
+#define RD_88F6180_OE_VAL_LOW                   0x0
+#define RD_88F6180_OE_VAL_HIGH                  0x0
+
+#endif /* __INCmvBoardEnvSpech */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/boardEnv/mvBoardEnvLib.h
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/boardEnv/mvBoardEnvLib.h
@@ -0,0 +1,362 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+#ifndef __INCmvBoardEnvLibh
+#define __INCmvBoardEnvLibh
+
+/* defines */
+/* The below constant macros defines the board I2C EEPROM data offsets */
+
+
+
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "mvSysHwConfig.h"
+#include "boardEnv/mvBoardEnvSpec.h"
+
+
+/* DUART stuff for Tclk detection only */
+#define DUART_BAUD_RATE			115200
+#define MAX_CLOCK_MARGINE		5000000	/* Maximum detected clock margine */
+
+
+#define BOARD_ETH_PORT_NUM  MV_ETH_MAX_PORTS
+#define BOARD_ETH_SWITCH_PORT_NUM	5
+
+#define	MV_BOARD_MAX_USB_IF		1
+#define MV_BOARD_MAX_MPP		7
+#define MV_BOARD_NAME_LEN  		0x20
+
+typedef struct _boardData
+{
+   MV_U32 magic;
+   MV_U16 boardId;
+   MV_U8 boardVer;
+   MV_U8 boardRev;
+   MV_U32 reserved1;
+   MV_U32 reserved2;
+
+}BOARD_DATA;
+
+typedef enum _devBoardMppGroupClass
+{
+	MV_BOARD_MPP_GROUP_1,
+	MV_BOARD_MPP_GROUP_2,
+	MV_BOARD_MAX_MPP_GROUP
+}MV_BOARD_MPP_GROUP_CLASS;
+
+typedef enum _devBoardMppTypeClass
+{
+	MV_BOARD_AUTO,
+	MV_BOARD_TDM,
+	MV_BOARD_AUDIO,
+	MV_BOARD_RGMII,
+	MV_BOARD_GMII,
+	MV_BOARD_TS,
+	MV_BOARD_OTHER
+}MV_BOARD_MPP_TYPE_CLASS;
+
+typedef enum _devBoardModuleIdClass
+{
+	MV_BOARD_MODULE_TDM_ID = 1,
+	MV_BOARD_MODULE_AUDIO_ID,
+	MV_BOARD_MODULE_RGMII_ID,
+	MV_BOARD_MODULE_GMII_ID,
+	MV_BOARD_MODULE_TS_ID,
+	MV_BOARD_MODULE_OTHER_ID
+}MV_BOARD_MODULE_ID_CLASS;
+
+typedef struct _boardMppTypeInfo
+{
+	MV_BOARD_MPP_TYPE_CLASS	boardMppGroup1;
+	MV_BOARD_MPP_TYPE_CLASS	boardMppGroup2;
+
+}MV_BOARD_MPP_TYPE_INFO;
+
+
+typedef enum _devBoardClass
+{
+	BOARD_DEV_NOR_FLASH,
+	BOARD_DEV_NAND_FLASH,
+	BOARD_DEV_SEVEN_SEG,
+	BOARD_DEV_FPGA,
+	BOARD_DEV_SRAM,
+	BOARD_DEV_SPI_FLASH,
+	BOARD_DEV_OTHER,
+}MV_BOARD_DEV_CLASS;
+
+typedef enum _devTwsiBoardClass
+{
+	BOARD_TWSI_RTC,
+	BOARD_DEV_TWSI_EXP,
+	BOARD_DEV_TWSI_SATR,
+	BOARD_TWSI_AUDIO_DEC,
+	BOARD_TWSI_OTHER
+}MV_BOARD_TWSI_CLASS;
+	
+typedef enum _devGppBoardClass
+{
+	BOARD_GPP_RTC,
+	BOARD_GPP_MV_SWITCH,
+	BOARD_GPP_USB_VBUS,
+	BOARD_GPP_USB_VBUS_EN,
+	BOARD_GPP_USB_OC,
+	BOARD_GPP_USB_HOST_DEVICE,
+	BOARD_GPP_REF_CLCK,
+	BOARD_GPP_VOIP_SLIC,
+	BOARD_GPP_LIFELINE,
+	BOARD_GPP_BUTTON,
+	BOARD_GPP_TS_BUTTON_C,
+	BOARD_GPP_TS_BUTTON_U,
+	BOARD_GPP_TS_BUTTON_D,
+	BOARD_GPP_TS_BUTTON_L,
+	BOARD_GPP_TS_BUTTON_R,
+	BOARD_GPP_POWER_BUTTON,
+	BOARD_GPP_RESTOR_BUTTON,
+	BOARD_GPP_WPS_BUTTON,
+	BOARD_GPP_HDD0_POWER,
+	BOARD_GPP_HDD1_POWER,
+	BOARD_GPP_FAN_POWER,
+	BOARD_GPP_RESET,
+	BOARD_GPP_POWER_ON_LED,
+	BOARD_GPP_HDD_POWER,
+        BOARD_GPP_SDIO_POWER,
+        BOARD_GPP_SDIO_DETECT,
+	BOARD_GPP_SWITCH_PHY_INT,
+	BOARD_GPP_TSU_DIRCTION,
+	BOARD_GPP_OTHER
+}MV_BOARD_GPP_CLASS;
+
+
+typedef struct _devCsInfo
+{
+    MV_U8		deviceCS;
+    MV_U32		params;
+    MV_U32		devClass;	/* MV_BOARD_DEV_CLASS */
+    MV_U8		devWidth;
+
+}MV_DEV_CS_INFO;
+
+
+#define MV_BOARD_PHY_FORCE_10MB		0x0
+#define MV_BOARD_PHY_FORCE_100MB	0x1
+#define MV_BOARD_PHY_FORCE_1000MB	0x2
+#define MV_BOARD_PHY_SPEED_AUTO		0x3
+
+typedef struct _boardSwitchInfo
+{
+	MV_32	linkStatusIrq;
+	MV_32	qdPort[BOARD_ETH_SWITCH_PORT_NUM];
+	MV_32	qdCpuPort;
+	MV_32	smiScanMode; /* 1 for SMI_MANUAL_MODE, 0 otherwise */
+
+}MV_BOARD_SWITCH_INFO;
+
+typedef struct _boardLedInfo
+{
+	MV_U8	activeLedsNumber;
+	MV_U8	ledsPolarity;	/* '0' or '1' to turn on led */
+	MV_U8*	gppPinNum; 	/* Pointer to GPP values */
+
+}MV_BOARD_LED_INFO;
+
+typedef struct _boardGppInfo
+{
+	MV_BOARD_GPP_CLASS	devClass;
+	MV_U8	gppPinNum;
+
+}MV_BOARD_GPP_INFO;
+
+
+typedef struct _boardTwsiInfo
+{
+	MV_BOARD_TWSI_CLASS	devClass;
+	MV_U8	twsiDevAddr;
+	MV_U8	twsiDevAddrType;
+
+}MV_BOARD_TWSI_INFO;
+
+
+typedef enum _boardMacSpeed
+{
+	BOARD_MAC_SPEED_10M,
+	BOARD_MAC_SPEED_100M,
+	BOARD_MAC_SPEED_1000M,
+	BOARD_MAC_SPEED_AUTO,
+
+}MV_BOARD_MAC_SPEED;
+
+typedef struct _boardMacInfo
+{
+	MV_BOARD_MAC_SPEED	boardMacSpeed;
+	MV_U8	boardEthSmiAddr;
+
+}MV_BOARD_MAC_INFO;
+
+typedef struct _boardMppInfo
+{
+	MV_U32		mppGroup[MV_BOARD_MAX_MPP];
+
+}MV_BOARD_MPP_INFO;
+
+typedef struct _boardInfo
+{
+	char 			   	boardName[MV_BOARD_NAME_LEN];
+	MV_U8				numBoardMppTypeValue;
+	MV_BOARD_MPP_TYPE_INFO*		pBoardMppTypeValue;
+	MV_U8				numBoardMppConfigValue;
+	MV_BOARD_MPP_INFO*		pBoardMppConfigValue;
+    	MV_U32				intsGppMaskLow;
+	MV_U32				intsGppMaskHigh;
+	MV_U8				numBoardDeviceIf;
+    	MV_DEV_CS_INFO*			pDevCsInfo;
+	MV_U8				numBoardTwsiDev;
+	MV_BOARD_TWSI_INFO*		pBoardTwsiDev;
+	MV_U8				numBoardMacInfo;
+	MV_BOARD_MAC_INFO*		pBoardMacInfo;
+	MV_U8				numBoardGppInfo;
+	MV_BOARD_GPP_INFO*		pBoardGppInfo;
+    	MV_U8				activeLedsNumber;
+	MV_U8*				pLedGppPin;
+	MV_U8				ledsPolarity;	/* '0' or '1' to turn on led */
+	/* GPP values */
+	MV_U32				gppOutEnValLow;
+	MV_U32				gppOutEnValHigh;
+	MV_U32				gppOutValLow;
+	MV_U32				gppOutValHigh;
+	MV_U32				gppPolarityValLow;
+	MV_U32				gppPolarityValHigh;
+
+	/* Switch Configuration */
+	MV_BOARD_SWITCH_INFO*		pSwitchInfo;
+}MV_BOARD_INFO;
+
+
+
+MV_VOID 	mvBoardEnvInit(MV_VOID);
+MV_U32      	mvBoardIdGet(MV_VOID);
+MV_U16      	mvBoardModelGet(MV_VOID);
+MV_U16      	mvBoardRevGet(MV_VOID);
+MV_STATUS	mvBoardNameGet(char *pNameBuff);
+MV_32      	mvBoardPhyAddrGet(MV_U32 ethPortNum);
+MV_BOARD_MAC_SPEED      mvBoardMacSpeedGet(MV_U32 ethPortNum);
+MV_U8		mvBoardIsSwitchConnected(MV_U32 ethPortNum);
+MV_32		mvBoardLinkStatusIrqGet(MV_U32 ethPortNum);
+MV_32		mvBoardSwitchPortGet(MV_U32 ethPortNum, MV_U8 boardPortNum);
+MV_32		mvBoardSwitchCpuPortGet(MV_U32 ethPortNum);
+MV_32		mvBoardSmiScanModeGet(MV_U32 ethPortNum);
+MV_BOOL     	mvBoardIsPortInSgmii(MV_U32 ethPortNum);
+MV_BOOL 	mvBoardIsPortInGmii(MV_VOID);
+MV_U32 		mvBoardTclkGet(MV_VOID);
+MV_U32      	mvBoardSysClkGet(MV_VOID);
+MV_U32 		mvBoardDebugLedNumGet(MV_U32 boardId);
+MV_VOID     	mvBoardDebugLed(MV_U32 hexNum);
+MV_32      	mvBoardMppGet(MV_U32 mppGroupNum);
+
+MV_U8		mvBoardRtcTwsiAddrTypeGet(MV_VOID);
+MV_U8		mvBoardRtcTwsiAddrGet(MV_VOID);
+
+MV_U8		mvBoardA2DTwsiChanNumGet(MV_U8 unit);
+MV_U8		mvBoardA2DTwsiAddrTypeGet(MV_U8 unit);
+MV_U8		mvBoardA2DTwsiAddrGet(MV_U8 unit);
+
+MV_U8 		mvBoardTwsiExpAddrGet(MV_U32 index);
+MV_U8 		mvBoardTwsiSatRAddrTypeGet(MV_U32 index);
+MV_U8 		mvBoardTwsiSatRAddrGet(MV_U32 index);
+MV_U8 		mvBoardTwsiExpAddrTypeGet(MV_U32 index);
+MV_BOARD_MODULE_ID_CLASS 	mvBoarModuleTypeGet(MV_BOARD_MPP_GROUP_CLASS devClass);
+MV_BOARD_MPP_TYPE_CLASS 	mvBoardMppGroupTypeGet(MV_BOARD_MPP_GROUP_CLASS mppGroupClass);
+MV_VOID 	mvBoardMppGroupTypeSet(MV_BOARD_MPP_GROUP_CLASS mppGroupClass,
+						MV_BOARD_MPP_TYPE_CLASS mppGroupType);
+MV_VOID 	mvBoardMppGroupIdUpdate(MV_VOID);
+MV_VOID 	mvBoardMppMuxSet(MV_VOID);
+MV_VOID 	mvBoardTdmLifeLineSet(MV_VOID);
+
+MV_VOID 	mvBoardMppModuleTypePrint(MV_VOID);
+MV_VOID	    	mvBoardReset(MV_VOID);
+MV_U8 		mvBoarTwsiSatRGet(MV_U8 devNum, MV_U8 regNum);
+MV_STATUS 		mvBoarTwsiSatRSet(MV_U8 devNum, MV_U8 regNum, MV_U8 regVal);
+MV_BOOL 	mvBoardSpecInitGet(MV_U32* regOff, MV_U32* data);
+/* Board devices API managments */
+MV_32  	    mvBoardGetDevicesNumber(MV_BOARD_DEV_CLASS devClass);
+MV_32  	    mvBoardGetDeviceBaseAddr(MV_32 devNum, MV_BOARD_DEV_CLASS devClass);
+MV_32	    mvBoardGetDeviceBusWidth(MV_32 devNum, MV_BOARD_DEV_CLASS devClass);
+MV_32  	    mvBoardGetDeviceWidth(MV_32 devNum, MV_BOARD_DEV_CLASS devClass);
+MV_32  	    mvBoardGetDeviceWinSize(MV_32 devNum, MV_BOARD_DEV_CLASS devClass);
+MV_U32 	    boardGetDevCSNum(MV_32 devNum, MV_BOARD_DEV_CLASS devClass);
+
+/* Gpio Pin Connections API */
+MV_32 	    mvBoardUSBVbusGpioPinGet(int devId);
+MV_32 	    mvBoardUSBVbusEnGpioPinGet(int devId);
+MV_U32      mvBoardPexBridgeIntPinGet(MV_U32 devNum, MV_U32 intPin);
+
+MV_32	    mvBoardResetGpioPinGet(MV_VOID);
+MV_32 	    mvBoardRTCGpioPinGet(MV_VOID);
+MV_32 	    mvBoardGpioIntMaskLowGet(MV_VOID);
+MV_32 	    mvBoardGpioIntMaskHighGet(MV_VOID);
+MV_32 	    mvBoardSlicGpioPinGet(MV_U32 slicNum);
+
+MV_32	    mvBoardSDIOGpioPinGet(MV_VOID);
+MV_32	    mvBoarGpioPinNumGet(MV_BOARD_GPP_CLASS class, MV_U32 index);
+
+MV_32 	    mvBoardNandWidthGet(void);
+#endif /* __INCmvBoardEnvLibh */
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/boardEnv/mvBoardEnvSpec.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/boardEnv/mvBoardEnvSpec.c
@@ -0,0 +1,572 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell 
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File in accordance with the terms and conditions of the General 
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is 
+available along with the File in the license.txt file or by writing to the Free 
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 
+DISCLAIMED.  The GPL License provides additional details about this warranty 
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or 
+modify this File under the following licensing terms. 
+Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer. 
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution. 
+
+    *   Neither the name of Marvell nor the names of its contributors may be 
+        used to endorse or promote products derived from this software without 
+        specific prior written permission. 
+    
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+#include "mvCommon.h"
+#include "mvBoardEnvLib.h"
+#include "mvBoardEnvSpec.h"
+#include "twsi/mvTwsi.h"
+
+#define DB_88F6281_BOARD_PCI_IF_NUM		0x0
+#define DB_88F6281_BOARD_TWSI_DEF_NUM		0x7
+#define DB_88F6281_BOARD_MAC_INFO_NUM		0x2
+#define DB_88F6281_BOARD_GPP_INFO_NUM		0x2
+#define DB_88F6281_BOARD_MPP_CONFIG_NUM		0x1
+#define DB_88F6281_BOARD_MPP_GROUP_TYPE_NUM	0x1
+#define DB_88F6281_BOARD_DEVICE_CONFIG_NUM	0x1
+#define DB_88F6281_BOARD_DEBUG_LED_NUM		0x1
+
+MV_U8	db88f6281InfoBoardDebugLedIf[] =
+	{7};
+
+MV_BOARD_TWSI_INFO	db88f6281InfoBoardTwsiDev[] =
+	/* {{MV_BOARD_DEV_CLASS	devClass, MV_U8	twsiDevAddr, MV_U8 twsiDevAddrType}} */
+	{
+	{BOARD_DEV_TWSI_EXP, 0x20, ADDR7_BIT},
+	{BOARD_DEV_TWSI_EXP, 0x21, ADDR7_BIT},
+	{BOARD_DEV_TWSI_EXP, 0x27, ADDR7_BIT},
+	{BOARD_DEV_TWSI_SATR, 0x4C, ADDR7_BIT},
+	{BOARD_DEV_TWSI_SATR, 0x4D, ADDR7_BIT},
+	{BOARD_DEV_TWSI_SATR, 0x4E, ADDR7_BIT},
+	{BOARD_TWSI_AUDIO_DEC, 0x4A, ADDR7_BIT}
+	};
+
+MV_BOARD_MAC_INFO db88f6281InfoBoardMacInfo[] = 
+	/* {{MV_BOARD_MAC_SPEED	boardMacSpeed, MV_U8 boardEthSmiAddr}} */
+	{
+	{BOARD_MAC_SPEED_AUTO, 0x8},
+	{BOARD_MAC_SPEED_AUTO, 0x9}
+	}; 
+
+MV_BOARD_MPP_TYPE_INFO db88f6281InfoBoardMppTypeInfo[] = 
+	/* {{MV_BOARD_MPP_TYPE_CLASS	boardMppGroup1,
+ 		MV_BOARD_MPP_TYPE_CLASS	boardMppGroup2}} */
+	{{MV_BOARD_AUTO, MV_BOARD_AUTO}
+	}; 
+
+MV_BOARD_GPP_INFO db88f6281InfoBoardGppInfo[] = 
+	/* {{MV_BOARD_GPP_CLASS	devClass, MV_U8	gppPinNum}} */
+	{
+	{BOARD_GPP_TSU_DIRCTION, 33},
+	{BOARD_GPP_USB_VBUS, 49}
+	};
+
+MV_BOARD_MPP_INFO	db88f6281InfoBoardMppConfigValue[] = 
+	{{{
+	DB_88F6281_MPP0_7,		
+	DB_88F6281_MPP8_15,		
+	DB_88F6281_MPP16_23,		
+	DB_88F6281_MPP24_31,		
+	DB_88F6281_MPP32_39,		
+	DB_88F6281_MPP40_47,		
+	DB_88F6281_MPP48_55		
+	}}};
+
+MV_DEV_CS_INFO db88f6281InfoBoardDeCsInfo[] = 
+		/*{deviceCS, params, devType, devWidth}*/			   
+#if defined(MV_NAND) || defined(MV_NAND_BOOT)
+		 {{0, N_A, BOARD_DEV_NAND_FLASH, 8}};	   /* NAND DEV */
+#else
+		 {{2, N_A, BOARD_DEV_SPI_FLASH, 8}};	   /* NAND DEV */
+#endif
+
+MV_BOARD_INFO db88f6281Info = {
+	"DB-88F6281-BP",				/* boardName[MAX_BOARD_NAME_LEN] */
+	DB_88F6281_BOARD_MPP_GROUP_TYPE_NUM,		/* numBoardMppGroupType */
+	db88f6281InfoBoardMppTypeInfo,
+	DB_88F6281_BOARD_MPP_CONFIG_NUM,		/* numBoardMppConfig */
+	db88f6281InfoBoardMppConfigValue,
+	0,						/* intsGppMaskLow */
+	0,						/* intsGppMaskHigh */
+	DB_88F6281_BOARD_DEVICE_CONFIG_NUM,		/* numBoardDevIf */
+	db88f6281InfoBoardDeCsInfo,
+	DB_88F6281_BOARD_TWSI_DEF_NUM,			/* numBoardTwsiDev */
+	db88f6281InfoBoardTwsiDev,					
+	DB_88F6281_BOARD_MAC_INFO_NUM,			/* numBoardMacInfo */
+	db88f6281InfoBoardMacInfo,
+	DB_88F6281_BOARD_GPP_INFO_NUM,			/* numBoardGppInfo */
+	db88f6281InfoBoardGppInfo,
+	DB_88F6281_BOARD_DEBUG_LED_NUM,			/* activeLedsNumber */              
+	db88f6281InfoBoardDebugLedIf,
+	N_A,						/* ledsPolarity */		
+	DB_88F6281_OE_LOW,				/* gppOutEnLow */
+	DB_88F6281_OE_HIGH,				/* gppOutEnHigh */
+	DB_88F6281_OE_VAL_LOW,				/* gppOutValLow */
+	DB_88F6281_OE_VAL_HIGH,				/* gppOutValHigh */
+	0,						/* gppPolarityValLow */
+	0, 						/* gppPolarityValHigh */
+	NULL						/* pSwitchInfo */
+};
+
+#define RD_88F6281_BOARD_PCI_IF_NUM		0x0
+#define RD_88F6281_BOARD_TWSI_DEF_NUM		0x1
+#define RD_88F6281_BOARD_MAC_INFO_NUM		0x1
+#define RD_88F6281_BOARD_GPP_INFO_NUM		0x9
+#define RD_88F6281_BOARD_MPP_GROUP_TYPE_NUM	0x1
+#define RD_88F6281_BOARD_MPP_CONFIG_NUM		0x1
+#define RD_88F6281_BOARD_DEVICE_CONFIG_NUM	0x1
+#define RD_88F6281_BOARD_DEBUG_LED_NUM		0x0
+
+MV_BOARD_MAC_INFO rd88f6281InfoBoardMacInfo[] = 
+	/* {{MV_BOARD_MAC_SPEED	boardMacSpeed, MV_U8 boardEthSmiAddr}} */
+	{{BOARD_MAC_SPEED_1000M, 0x0}
+	}; 
+
+MV_BOARD_SWITCH_INFO rd88f6281InfoBoardSwitchInfo[] = 
+	/* MV_32 linkStatusIrq, {MV_32 qdPort0, MV_32 qdPort1, MV_32 qdPort2, MV_32 qdPort3, MV_32 qdPort4}, 
+		MV_32 qdCpuPort, MV_32 smiScanMode} */
+	{{35, {4, 0, 1, 2, 3}, 5, 1}};
+
+MV_BOARD_GPP_INFO rd88f6281InfoBoardGppInfo[] = 
+	/* {{MV_BOARD_GPP_CLASS	devClass, MV_U8	gppPinNum}} */
+	{{BOARD_GPP_USB_VBUS, 22},
+	{BOARD_GPP_SDIO_DETECT, 23},
+	{BOARD_GPP_SWITCH_PHY_INT, 35},
+	{BOARD_GPP_LIFELINE, 38},
+	{BOARD_GPP_SDIO_POWER, 45},
+	{BOARD_GPP_WPS_BUTTON, 46},
+	{BOARD_GPP_RESTOR_BUTTON, 47},
+	{BOARD_GPP_HDD_POWER, 48},
+	{BOARD_GPP_FAN_POWER, 49}
+	};
+MV_BOARD_TWSI_INFO	rd88f6281InfoBoardTwsiDev[] =
+	/* {{MV_BOARD_DEV_CLASS	devClass, MV_U8	twsiDevAddr, MV_U8 twsiDevAddrType}} */
+	{
+	{BOARD_TWSI_AUDIO_DEC, 0x4A, ADDR7_BIT}
+	};
+
+MV_BOARD_MPP_TYPE_INFO rd88f6281InfoBoardMppTypeInfo[] = 
+	/* {{MV_BOARD_MPP_TYPE_CLASS	boardMppGroup1,
+ 		MV_BOARD_MPP_TYPE_CLASS	boardMppGroup2}} */
+	{{MV_BOARD_TDM, MV_BOARD_AUDIO}
+	}; 
+
+MV_BOARD_MPP_INFO	rd88f6281InfoBoardMppConfigValue[] = 
+	{{{
+	RD_88F6281_MPP0_7,		
+	RD_88F6281_MPP8_15,		
+	RD_88F6281_MPP16_23,		
+	RD_88F6281_MPP24_31,		
+	RD_88F6281_MPP32_39,		
+	RD_88F6281_MPP40_47,		
+	RD_88F6281_MPP48_55		
+	}}};
+
+MV_DEV_CS_INFO rd88f6281InfoBoardDeCsInfo[] = 
+		/*{deviceCS, params, devType, devWidth}*/			   
+#if defined(MV_NAND) || defined(MV_NAND_BOOT)
+		 {{0, N_A, BOARD_DEV_NAND_FLASH, 8}};	   /* NAND DEV */
+#else
+		 {{2, N_A, BOARD_DEV_SPI_FLASH, 8}};	   /* NAND DEV */
+#endif
+
+MV_BOARD_INFO rd88f6281Info = {
+	"RD-88F6281",				/* boardName[MAX_BOARD_NAME_LEN] */
+	RD_88F6281_BOARD_MPP_GROUP_TYPE_NUM,		/* numBoardMppGroupType */
+	rd88f6281InfoBoardMppTypeInfo,
+	RD_88F6281_BOARD_MPP_CONFIG_NUM,		/* numBoardMppConfig */
+	rd88f6281InfoBoardMppConfigValue,
+	0,						/* intsGppMaskLow */
+	(1 << 3),					/* intsGppMaskHigh */
+	RD_88F6281_BOARD_DEVICE_CONFIG_NUM,		/* numBoardDevIf */
+	rd88f6281InfoBoardDeCsInfo,
+	RD_88F6281_BOARD_TWSI_DEF_NUM,			/* numBoardTwsiDev */
+	rd88f6281InfoBoardTwsiDev,					
+	RD_88F6281_BOARD_MAC_INFO_NUM,			/* numBoardMacInfo */
+	rd88f6281InfoBoardMacInfo,
+	RD_88F6281_BOARD_GPP_INFO_NUM,			/* numBoardGppInfo */
+	rd88f6281InfoBoardGppInfo,
+	RD_88F6281_BOARD_DEBUG_LED_NUM,			/* activeLedsNumber */              
+	NULL,
+	N_A,						/* ledsPolarity */		
+	RD_88F6281_OE_LOW,				/* gppOutEnLow */
+	RD_88F6281_OE_HIGH,				/* gppOutEnHigh */
+	RD_88F6281_OE_VAL_LOW,				/* gppOutValLow */
+	RD_88F6281_OE_VAL_HIGH,				/* gppOutValHigh */
+	0,						/* gppPolarityValLow */
+	BIT3, 						/* gppPolarityValHigh */
+	rd88f6281InfoBoardSwitchInfo			/* pSwitchInfo */
+};
+
+#define DB_88F6192_BOARD_PCI_IF_NUM		0x0
+#define DB_88F6192_BOARD_TWSI_DEF_NUM		0x7
+#define DB_88F6192_BOARD_MAC_INFO_NUM		0x2
+#define DB_88F6192_BOARD_GPP_INFO_NUM		0x2
+#define DB_88F6192_BOARD_MPP_GROUP_TYPE_NUM	0x1
+#define DB_88F6192_BOARD_MPP_CONFIG_NUM		0x1
+#define DB_88F6192_BOARD_DEVICE_CONFIG_NUM	0x1
+#define DB_88F6192_BOARD_DEBUG_LED_NUM		0x1
+
+MV_U8	db88f6192InfoBoardDebugLedIf[] =
+	{7};
+
+MV_BOARD_TWSI_INFO	db88f6192InfoBoardTwsiDev[] =
+	/* {{MV_BOARD_DEV_CLASS	devClass, MV_U8	twsiDevAddr, MV_U8 twsiDevAddrType}} */
+	{
+	{BOARD_DEV_TWSI_EXP, 0x20, ADDR7_BIT},
+	{BOARD_DEV_TWSI_EXP, 0x21, ADDR7_BIT},
+	{BOARD_DEV_TWSI_EXP, 0x27, ADDR7_BIT},
+	{BOARD_DEV_TWSI_SATR, 0x4C, ADDR7_BIT},
+	{BOARD_DEV_TWSI_SATR, 0x4D, ADDR7_BIT},
+	{BOARD_DEV_TWSI_SATR, 0x4E, ADDR7_BIT},
+	{BOARD_TWSI_AUDIO_DEC, 0x4A, ADDR7_BIT}
+	};
+
+MV_BOARD_MAC_INFO db88f6192InfoBoardMacInfo[] = 
+	/* {{MV_BOARD_MAC_SPEED	boardMacSpeed, MV_U8 boardEthSmiAddr}} */
+	{
+	{BOARD_MAC_SPEED_AUTO, 0x8},
+	{BOARD_MAC_SPEED_AUTO, 0x9}
+	}; 
+
+MV_BOARD_GPP_INFO db88f6192InfoBoardGppInfo[] = 
+	/* {{MV_BOARD_GPP_CLASS	devClass, MV_U8	gppPinNum}} */
+	{
+	{BOARD_GPP_USB_VBUS, 22},
+	{BOARD_GPP_SDIO_DETECT, 23},
+	};
+
+MV_BOARD_MPP_TYPE_INFO db88f6192InfoBoardMppTypeInfo[] = 
+	/* {{MV_BOARD_MPP_TYPE_CLASS	boardMppGroup1,
+ 		MV_BOARD_MPP_TYPE_CLASS	boardMppGroup2}} */
+	{{MV_BOARD_AUTO, MV_BOARD_OTHER}
+	}; 
+
+MV_BOARD_MPP_INFO	db88f6192InfoBoardMppConfigValue[] = 
+	{{{
+	DB_88F6192_MPP0_7,		
+	DB_88F6192_MPP8_15,		
+	DB_88F6192_MPP16_23,		
+	DB_88F6192_MPP24_31,		
+	DB_88F6192_MPP32_35
+	}}};
+
+MV_DEV_CS_INFO db88f6192InfoBoardDeCsInfo[] = 
+		/*{deviceCS, params, devType, devWidth}*/			   
+#if defined(MV_NAND) || defined(MV_NAND_BOOT)
+		 {{0, N_A, BOARD_DEV_NAND_FLASH, 8}};	   /* NAND DEV */
+#else
+		 {{2, N_A, BOARD_DEV_SPI_FLASH, 8}};	   /* NAND DEV */
+#endif
+
+MV_BOARD_INFO db88f6192Info = {
+	"DB-88F6192-BP",				/* boardName[MAX_BOARD_NAME_LEN] */
+	DB_88F6192_BOARD_MPP_GROUP_TYPE_NUM,		/* numBoardMppGroupType */
+	db88f6192InfoBoardMppTypeInfo,
+	DB_88F6192_BOARD_MPP_CONFIG_NUM,		/* numBoardMppConfig */
+	db88f6192InfoBoardMppConfigValue,
+	0,						/* intsGppMaskLow */
+	(1 << 3),					/* intsGppMaskHigh */
+	DB_88F6192_BOARD_DEVICE_CONFIG_NUM,		/* numBoardDevIf */
+	db88f6192InfoBoardDeCsInfo,
+	DB_88F6192_BOARD_TWSI_DEF_NUM,			/* numBoardTwsiDev */
+	db88f6192InfoBoardTwsiDev,					
+	DB_88F6192_BOARD_MAC_INFO_NUM,			/* numBoardMacInfo */
+	db88f6192InfoBoardMacInfo,
+	DB_88F6192_BOARD_GPP_INFO_NUM,			/* numBoardGppInfo */
+	db88f6192InfoBoardGppInfo,
+	DB_88F6192_BOARD_DEBUG_LED_NUM,			/* activeLedsNumber */              
+	db88f6192InfoBoardDebugLedIf,
+	N_A,						/* ledsPolarity */		
+	DB_88F6192_OE_LOW,				/* gppOutEnLow */
+	DB_88F6192_OE_HIGH,				/* gppOutEnHigh */
+	DB_88F6192_OE_VAL_LOW,				/* gppOutValLow */
+	DB_88F6192_OE_VAL_HIGH,				/* gppOutValHigh */
+	0,						/* gppPolarityValLow */
+	0						/* gppPolarityValHigh */
+};
+
+#define RD_88F6192_BOARD_PCI_IF_NUM		0x0
+#define RD_88F6192_BOARD_TWSI_DEF_NUM		0x0
+#define RD_88F6192_BOARD_MAC_INFO_NUM		0x1
+#define RD_88F6192_BOARD_GPP_INFO_NUM		0xE
+#define RD_88F6192_BOARD_MPP_GROUP_TYPE_NUM	0x1
+#define RD_88F6192_BOARD_MPP_CONFIG_NUM		0x1
+#define RD_88F6192_BOARD_DEVICE_CONFIG_NUM	0x1
+#define RD_88F6192_BOARD_DEBUG_LED_NUM		0x3
+
+MV_U8	rd88f6192InfoBoardDebugLedIf[] =
+	{17, 28, 29};
+
+MV_BOARD_MAC_INFO rd88f6192InfoBoardMacInfo[] = 
+	/* {{MV_BOARD_MAC_SPEED	boardMacSpeed, MV_U8 boardEthSmiAddr}} */
+	{{BOARD_MAC_SPEED_AUTO, 0x8}
+	}; 
+
+MV_BOARD_GPP_INFO rd88f6192InfoBoardGppInfo[] = 
+	/* {{MV_BOARD_GPP_CLASS	devClass, MV_U8	gppPinNum}} */
+	{
+	{BOARD_GPP_USB_VBUS_EN, 10},
+	{BOARD_GPP_USB_HOST_DEVICE, 11},
+	{BOARD_GPP_SWITCH_PHY_INT, 14},
+	{BOARD_GPP_HDD_POWER, 16},
+	{BOARD_GPP_POWER_ON_LED, 19},
+	{BOARD_GPP_USB_VBUS, 26},
+	{BOARD_GPP_WPS_BUTTON, 24},
+	{BOARD_GPP_TS_BUTTON_C, 25},
+	{BOARD_GPP_USB_OC, 27},
+	{BOARD_GPP_TS_BUTTON_U, 30},
+	{BOARD_GPP_TS_BUTTON_R, 31},
+	{BOARD_GPP_TS_BUTTON_L, 32},
+	{BOARD_GPP_TS_BUTTON_D, 34},
+	{BOARD_GPP_FAN_POWER, 35}
+	};
+
+MV_BOARD_MPP_TYPE_INFO rd88f6192InfoBoardMppTypeInfo[] = 
+	/* {{MV_BOARD_MPP_TYPE_CLASS	boardMppGroup1,
+ 		MV_BOARD_MPP_TYPE_CLASS	boardMppGroup2}} */
+	{{MV_BOARD_OTHER, MV_BOARD_OTHER}
+	}; 
+
+MV_BOARD_MPP_INFO	rd88f6192InfoBoardMppConfigValue[] = 
+	{{{
+	RD_88F6192_MPP0_7,		
+	RD_88F6192_MPP8_15,		
+	RD_88F6192_MPP16_23,		
+	RD_88F6192_MPP24_31,		
+	RD_88F6192_MPP32_35
+	}}};
+
+MV_DEV_CS_INFO rd88f6192InfoBoardDeCsInfo[] = 
+		/*{deviceCS, params, devType, devWidth}*/			   
+		 {{1, N_A, BOARD_DEV_SPI_FLASH, 8}};	   /* SPI DEV */
+
+MV_BOARD_INFO rd88f6192Info = {
+	"RD-88F6192-NAS",				/* boardName[MAX_BOARD_NAME_LEN] */
+	RD_88F6192_BOARD_MPP_GROUP_TYPE_NUM,		/* numBoardMppGroupType */
+	rd88f6192InfoBoardMppTypeInfo,
+	RD_88F6192_BOARD_MPP_CONFIG_NUM,		/* numBoardMppConfig */
+	rd88f6192InfoBoardMppConfigValue,
+	0,						/* intsGppMaskLow */
+	(1 << 3),					/* intsGppMaskHigh */
+	RD_88F6192_BOARD_DEVICE_CONFIG_NUM,		/* numBoardDevIf */
+	rd88f6192InfoBoardDeCsInfo,
+	RD_88F6192_BOARD_TWSI_DEF_NUM,			/* numBoardTwsiDev */
+	NULL,					
+	RD_88F6192_BOARD_MAC_INFO_NUM,			/* numBoardMacInfo */
+	rd88f6192InfoBoardMacInfo,
+	RD_88F6192_BOARD_GPP_INFO_NUM,			/* numBoardGppInfo */
+	rd88f6192InfoBoardGppInfo,
+	RD_88F6192_BOARD_DEBUG_LED_NUM,			/* activeLedsNumber */              
+	rd88f6192InfoBoardDebugLedIf,
+	N_A,						/* ledsPolarity */		
+	RD_88F6192_OE_LOW,				/* gppOutEnLow */
+	RD_88F6192_OE_HIGH,				/* gppOutEnHigh */
+	RD_88F6192_OE_VAL_LOW,				/* gppOutValLow */
+	RD_88F6192_OE_VAL_HIGH,				/* gppOutValHigh */
+	0,						/* gppPolarityValLow */
+	0						/* gppPolarityValHigh */
+};
+
+#define DB_88F6180_BOARD_PCI_IF_NUM		0x0
+#define DB_88F6180_BOARD_TWSI_DEF_NUM		0x2
+#define DB_88F6180_BOARD_MAC_INFO_NUM		0x1
+#define DB_88F6180_BOARD_GPP_INFO_NUM		0x0
+#define DB_88F6180_BOARD_MPP_GROUP_TYPE_NUM	0x1
+#define DB_88F6180_BOARD_MPP_CONFIG_NUM		0x1
+#define DB_88F6180_BOARD_DEVICE_CONFIG_NUM	0x1
+#define DB_88F6180_BOARD_DEBUG_LED_NUM		0x2
+
+MV_U8	db88f6180InfoBoardDebugLedIf[] =
+	{7, 10};
+
+MV_BOARD_TWSI_INFO	db88f6180InfoBoardTwsiDev[] =
+	/* {{MV_BOARD_DEV_CLASS	devClass, MV_U8	twsiDevAddr, MV_U8 twsiDevAddrType}} */
+	{
+	{BOARD_DEV_TWSI_SATR, 0x4C, ADDR7_BIT},
+	{BOARD_DEV_TWSI_SATR, 0x4E, ADDR7_BIT}
+	};
+
+MV_BOARD_MAC_INFO db88f6180InfoBoardMacInfo[] = 
+	/* {{MV_BOARD_MAC_SPEED	boardMacSpeed, MV_U8 boardEthSmiAddr}} */
+	{{BOARD_MAC_SPEED_AUTO, 0x8}
+	}; 
+
+MV_BOARD_GPP_INFO db88f6180InfoBoardGppInfo[] = 
+	/* {{MV_BOARD_GPP_CLASS	devClass, MV_U8	gppPinNum}} */
+	{
+	{BOARD_GPP_USB_VBUS, 6}
+	};
+
+MV_BOARD_MPP_TYPE_INFO db88f6180InfoBoardMppTypeInfo[] = 
+	/* {{MV_BOARD_MPP_TYPE_CLASS	boardMppGroup1,
+ 		MV_BOARD_MPP_TYPE_CLASS	boardMppGroup2}} */
+	{{MV_BOARD_OTHER, MV_BOARD_OTHER}
+	}; 
+
+MV_BOARD_MPP_INFO	db88f6180InfoBoardMppConfigValue[] = 
+	{{{
+	DB_88F6180_MPP0_7,		
+	DB_88F6180_MPP8_10,		
+	}}};
+
+MV_DEV_CS_INFO db88f6180InfoBoardDeCsInfo[] = 
+		/*{deviceCS, params, devType, devWidth}*/			   
+		 {{2, N_A, BOARD_DEV_SPI_FLASH, 8}};	   /* NAND DEV */
+
+MV_BOARD_INFO db88f6180Info = {
+	"DB-88F6180-BP",				/* boardName[MAX_BOARD_NAME_LEN] */
+	DB_88F6180_BOARD_MPP_GROUP_TYPE_NUM,		/* numBoardMppGroupType */
+	db88f6180InfoBoardMppTypeInfo,
+	DB_88F6180_BOARD_MPP_CONFIG_NUM,		/* numBoardMppConfig */
+	db88f6180InfoBoardMppConfigValue,
+	0,						/* intsGppMaskLow */
+	0,					/* intsGppMaskHigh */
+	DB_88F6180_BOARD_DEVICE_CONFIG_NUM,		/* numBoardDevIf */
+	db88f6180InfoBoardDeCsInfo,
+	DB_88F6180_BOARD_TWSI_DEF_NUM,			/* numBoardTwsiDev */
+	db88f6180InfoBoardTwsiDev,					
+	DB_88F6180_BOARD_MAC_INFO_NUM,			/* numBoardMacInfo */
+	db88f6180InfoBoardMacInfo,
+	DB_88F6180_BOARD_GPP_INFO_NUM,			/* numBoardGppInfo */
+	NULL,
+	DB_88F6180_BOARD_DEBUG_LED_NUM,			/* activeLedsNumber */              
+	db88f6180InfoBoardDebugLedIf,
+	N_A,						/* ledsPolarity */		
+	DB_88F6180_OE_LOW,				/* gppOutEnLow */
+	DB_88F6180_OE_HIGH,				/* gppOutEnHigh */
+	DB_88F6180_OE_VAL_LOW,				/* gppOutValLow */
+	DB_88F6180_OE_VAL_HIGH,				/* gppOutValHigh */
+	0,						/* gppPolarityValLow */
+	0						/* gppPolarityValHigh */
+};
+
+#define RD_88F6180_BOARD_PCI_IF_NUM		0x0
+#define RD_88F6180_BOARD_TWSI_DEF_NUM		0x0
+#define RD_88F6180_BOARD_MAC_INFO_NUM		0x1
+#define RD_88F6180_BOARD_GPP_INFO_NUM		0x2
+#define RD_88F6180_BOARD_MPP_GROUP_TYPE_NUM	0x1
+#define RD_88F6180_BOARD_MPP_CONFIG_NUM		0x1
+#define RD_88F6180_BOARD_DEVICE_CONFIG_NUM	0x1
+#define RD_88F6180_BOARD_DEBUG_LED_NUM		0x0
+
+MV_BOARD_MAC_INFO rd88f6180InfoBoardMacInfo[] = 
+	/* {{MV_BOARD_MAC_SPEED	boardMacSpeed, MV_U8 boardEthSmiAddr}} */
+	{{BOARD_MAC_SPEED_1000M, 0x0}
+	}; 
+
+MV_BOARD_SWITCH_INFO rd88f6180InfoBoardSwitchInfo[] = 
+	/* MV_32 linkStatusIrq, {MV_32 qdPort0, MV_32 qdPort1, MV_32 qdPort2, MV_32 qdPort3, MV_32 qdPort4}, 
+		MV_32 qdCpuPort, MV_32 smiScanMode} */
+	{{-1, {4, 0, 1, 2, 3}, 5, 1}};
+
+MV_BOARD_GPP_INFO rd88f6180InfoBoardGppInfo[] = 
+	/* {{MV_BOARD_GPP_CLASS	devClass, MV_U8	gppPinNum}} */
+	{
+	{BOARD_GPP_SWITCH_PHY_INT, 8},
+	{BOARD_GPP_WPS_BUTTON, 9}
+	};
+
+MV_BOARD_MPP_TYPE_INFO rd88f6180InfoBoardMppTypeInfo[] = 
+	/* {{MV_BOARD_MPP_TYPE_CLASS	boardMppGroup1,
+ 		MV_BOARD_MPP_TYPE_CLASS	boardMppGroup2}} */
+	{{MV_BOARD_OTHER, MV_BOARD_OTHER}
+	}; 
+
+MV_BOARD_MPP_INFO	rd88f6180InfoBoardMppConfigValue[] = 
+	{{{
+	RD_88F6180_MPP0_7,		
+	RD_88F6180_MPP8_10		
+	}}};
+
+MV_DEV_CS_INFO rd88f6180InfoBoardDeCsInfo[] = 
+		/*{deviceCS, params, devType, devWidth}*/			   
+		 {{2, N_A, BOARD_DEV_SPI_FLASH, 8}};	   /* NAND DEV */
+
+MV_BOARD_INFO rd88f6180Info = {
+	"RD-88F6180-AP",				/* boardName[MAX_BOARD_NAME_LEN] */
+	RD_88F6180_BOARD_MPP_GROUP_TYPE_NUM,		/* numBoardMppGroupType */
+	rd88f6180InfoBoardMppTypeInfo,
+	RD_88F6180_BOARD_MPP_CONFIG_NUM,		/* numBoardMppConfig */
+	rd88f6180InfoBoardMppConfigValue,
+	(1<<8),						/* intsGppMaskLow */
+	0,						/* intsGppMaskHigh */
+	RD_88F6180_BOARD_DEVICE_CONFIG_NUM,		/* numBoardDevIf */
+	rd88f6180InfoBoardDeCsInfo,
+	RD_88F6180_BOARD_TWSI_DEF_NUM,			/* numBoardTwsiDev */
+	NULL,					
+	RD_88F6180_BOARD_MAC_INFO_NUM,			/* numBoardMacInfo */
+	rd88f6180InfoBoardMacInfo,
+	RD_88F6180_BOARD_GPP_INFO_NUM,			/* numBoardGppInfo */
+	rd88f6180InfoBoardGppInfo,
+	RD_88F6180_BOARD_DEBUG_LED_NUM,			/* activeLedsNumber */              
+	NULL,
+	N_A,						/* ledsPolarity */		
+	RD_88F6180_OE_LOW,				/* gppOutEnLow */
+	RD_88F6180_OE_HIGH,				/* gppOutEnHigh */
+	RD_88F6180_OE_VAL_LOW,				/* gppOutValLow */
+	RD_88F6180_OE_VAL_HIGH,				/* gppOutValHigh */
+	0,						/* gppPolarityValLow */
+	0,						/* gppPolarityValHigh */
+	rd88f6180InfoBoardSwitchInfo			/* pSwitchInfo */
+};
+
+MV_BOARD_INFO*	boardInfoTbl[] = 	{
+					 &db88f6281Info,
+					 &rd88f6281Info,
+					 &db88f6192Info,
+					 &rd88f6192Info,
+					 &db88f6180Info,
+					 &rd88f6180Info
+					};
+
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/mach-kirkwood/mv_hal_support/kw_family/boardEnv/mvBoardEnvLib.c
+++ linux-mvl-dove-2.6.32/arch/arm/mach-kirkwood/mv_hal_support/kw_family/boardEnv/mvBoardEnvLib.c
@@ -0,0 +1,2092 @@
+/*******************************************************************************
+Copyright (C) Marvell International Ltd. and its affiliates
+
+This software file (the "File") is owned and distributed by Marvell
+International Ltd. and/or its affiliates ("Marvell") under the following
+alternative licensing terms.  Once you have made an election to distribute the
+File under one of the following license alternatives, please (i) delete this
+introductory statement regarding license alternatives, (ii) delete the two
+license alternatives that you have not elected to use and (iii) preserve the
+Marvell copyright notice above.
+
+********************************************************************************
+Marvell Commercial License Option
+
+If you received this File from Marvell and you have entered into a commercial
+license agreement (a "Commercial License") with Marvell, the File is licensed
+to you under the terms of the applicable Commercial License.
+
+********************************************************************************
+Marvell GPL License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File in accordance with the terms and conditions of the General
+Public License Version 2, June 1991 (the "GPL License"), a copy of which is
+available along with the File in the license.txt file or by writing to the Free
+Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
+on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
+
+THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
+WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
+DISCLAIMED.  The GPL License provides additional details about this warranty
+disclaimer.
+********************************************************************************
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+    *   Redistributions of source code must retain the above copyright notice,
+	    this list of conditions and the following disclaimer.
+
+    *   Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+
+    *   Neither the name of Marvell nor the names of its contributors may be
+        used to endorse or promote products derived from this software without
+        specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+
+#include "boardEnv/mvBoardEnvLib.h"
+#include "ctrlEnv/mvCtrlEnvLib.h"
+#include "ctrlEnv/sys/mvCpuIf.h"
+#include "cpu/mvCpu.h"
+#include "cntmr/mvCntmr.h"
+#include "gpp/mvGpp.h"
+#include "twsi/mvTwsi.h"
+#include "pex/mvPex.h"
+#include "device/mvDevice.h"
+
+
+/* defines  */
+/* #define MV_DEBUG */
+#ifdef MV_DEBUG
+	#define DB(x)	x
+#else
+	#define DB(x)
+#endif
+
+extern MV_CPU_ARM_CLK _cpuARMDDRCLK[];
+
+#define CODE_IN_ROM		MV_FALSE
+#define CODE_IN_RAM		MV_TRUE
+
+extern	MV_BOARD_INFO*	boardInfoTbl[];
+#define BOARD_INFO(boardId)	boardInfoTbl[boardId - BOARD_ID_BASE]
+
+/* Locals */
+static MV_DEV_CS_INFO*  boardGetDevEntry(MV_32 devNum, MV_BOARD_DEV_CLASS devClass);
+
+MV_U32 tClkRate   = -1;
+
+
+/*******************************************************************************
+* mvBoardEnvInit - Init board
+*
+* DESCRIPTION:
+*		In this function the board environment take care of device bank
+*		initialization.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_VOID mvBoardEnvInit(MV_VOID)
+{
+	MV_U32 boardId= mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("mvBoardEnvInit:Board unknown.\n");
+		return;
+
+	}
+
+	/* Set GPP Out value */
+	MV_REG_WRITE(GPP_DATA_OUT_REG(0), BOARD_INFO(boardId)->gppOutValLow);
+	MV_REG_WRITE(GPP_DATA_OUT_REG(1), BOARD_INFO(boardId)->gppOutValHigh);
+
+	/* set GPP polarity */
+	mvGppPolaritySet(0, 0xFFFFFFFF, BOARD_INFO(boardId)->gppPolarityValLow);
+	mvGppPolaritySet(1, 0xFFFFFFFF, BOARD_INFO(boardId)->gppPolarityValHigh);
+
+	/* Set GPP Out Enable*/
+	mvGppTypeSet(0, 0xFFFFFFFF, BOARD_INFO(boardId)->gppOutEnValLow);
+	mvGppTypeSet(1, 0xFFFFFFFF, BOARD_INFO(boardId)->gppOutEnValHigh);
+
+	/* Nand CE */
+	MV_REG_BIT_SET(NAND_CTRL_REG, NAND_ACTCEBOOT_BIT);
+}
+
+/*******************************************************************************
+* mvBoardModelGet - Get Board model
+*
+* DESCRIPTION:
+*       This function returns 16bit describing board model.
+*       Board model is constructed of one byte major and minor numbers in the
+*       following manner:
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       String describing board model.
+*
+*******************************************************************************/
+MV_U16 mvBoardModelGet(MV_VOID)
+{
+	return (mvBoardIdGet() >> 16);
+}
+
+/*******************************************************************************
+* mbBoardRevlGet - Get Board revision
+*
+* DESCRIPTION:
+*       This function returns a 32bit describing the board revision.
+*       Board revision is constructed of 4bytes. 2bytes describes major number
+*       and the other 2bytes describes minor munber.
+*       For example for board revision 3.4 the function will return
+*       0x00030004.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       String describing board model.
+*
+*******************************************************************************/
+MV_U16 mvBoardRevGet(MV_VOID)
+{
+	return (mvBoardIdGet() & 0xFFFF);
+}
+
+/*******************************************************************************
+* mvBoardNameGet - Get Board name
+*
+* DESCRIPTION:
+*       This function returns a string describing the board model and revision.
+*       String is extracted from board I2C EEPROM.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       pNameBuff - Buffer to contain board name string. Minimum size 32 chars.
+*
+* RETURN:
+*
+*       MV_ERROR if informantion can not be read.
+*******************************************************************************/
+MV_STATUS mvBoardNameGet(char *pNameBuff)
+{
+	MV_U32 boardId= mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsSPrintf (pNameBuff, "Board unknown.\n");
+		return MV_ERROR;
+
+	}
+
+	mvOsSPrintf (pNameBuff, "%s",BOARD_INFO(boardId)->boardName);
+
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvBoardIsPortInSgmii -
+*
+* DESCRIPTION:
+*       This routine returns MV_TRUE for port number works in SGMII or MV_FALSE
+*	For all other options.
+*
+* INPUT:
+*       ethPortNum - Ethernet port number.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE - port in SGMII.
+*       MV_FALSE - other.
+*
+*******************************************************************************/
+MV_BOOL mvBoardIsPortInSgmii(MV_U32 ethPortNum)
+{
+    MV_BOOL ethPortSgmiiSupport[BOARD_ETH_PORT_NUM] = MV_ETH_PORT_SGMII;
+
+    if(ethPortNum >= BOARD_ETH_PORT_NUM)
+    {
+	    mvOsPrintf ("Invalid portNo=%d\n", ethPortNum);
+		return MV_FALSE;
+    }
+    return ethPortSgmiiSupport[ethPortNum];
+}
+
+/*******************************************************************************
+* mvBoardIsPortInGmii -
+*
+* DESCRIPTION:
+*       This routine returns MV_TRUE for port number works in GMII or MV_FALSE
+*	For all other options.
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_TRUE - port in GMII.
+*       MV_FALSE - other.
+*
+*******************************************************************************/
+MV_BOOL mvBoardIsPortInGmii(MV_VOID)
+{
+	MV_U32 devClassId, devClass = 0;
+	if (mvBoardMppGroupTypeGet(devClass) == MV_BOARD_AUTO)
+	{
+		/* Get MPP module ID */
+		devClassId = mvBoarModuleTypeGet(devClass);
+		if (MV_BOARD_MODULE_GMII_ID == devClassId)
+			return MV_TRUE;
+	}
+	else if (mvBoardMppGroupTypeGet(devClass) == MV_BOARD_GMII)
+		return MV_TRUE;
+
+    return MV_FALSE;
+}
+/*******************************************************************************
+* mvBoardPhyAddrGet - Get the phy address
+*
+* DESCRIPTION:
+*       This routine returns the Phy address of a given ethernet port.
+*
+* INPUT:
+*       ethPortNum - Ethernet port number.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       32bit describing Phy address, -1 if the port number is wrong.
+*
+*******************************************************************************/
+MV_32 mvBoardPhyAddrGet(MV_U32 ethPortNum)
+{
+	MV_U32 boardId= mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("mvBoardPhyAddrGet: Board unknown.\n");
+		return MV_ERROR;
+	}
+
+	return BOARD_INFO(boardId)->pBoardMacInfo[ethPortNum].boardEthSmiAddr;
+}
+
+/*******************************************************************************
+* mvBoardMacSpeedGet - Get the Mac speed
+*
+* DESCRIPTION:
+*       This routine returns the Mac speed if pre define of a given ethernet port.
+*
+* INPUT:
+*       ethPortNum - Ethernet port number.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       MV_BOARD_MAC_SPEED, -1 if the port number is wrong.
+*
+*******************************************************************************/
+MV_BOARD_MAC_SPEED      mvBoardMacSpeedGet(MV_U32 ethPortNum)
+{
+	MV_U32 boardId= mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("mvBoardMacSpeedGet: Board unknown.\n");
+		return MV_ERROR;
+	}
+
+	return BOARD_INFO(boardId)->pBoardMacInfo[ethPortNum].boardMacSpeed;
+}
+
+/*******************************************************************************
+* mvBoardLinkStatusIrqGet - Get the IRQ number for the link status indication
+*
+* DESCRIPTION:
+*       This routine returns the IRQ number for the link status indication.
+*
+* INPUT:
+*       ethPortNum - Ethernet port number.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       the number of the IRQ for the link status indication, -1 if the port 
+*	number is wrong or if not relevant.
+*
+*******************************************************************************/
+MV_32	mvBoardLinkStatusIrqGet(MV_U32 ethPortNum)
+{
+	MV_U32 boardId = mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("mvBoardLinkStatusIrqGet: Board unknown.\n");
+		return MV_ERROR;
+	}
+
+	return BOARD_INFO(boardId)->pSwitchInfo[ethPortNum].linkStatusIrq;
+}
+
+/*******************************************************************************
+* mvBoardSwitchPortGet - Get the mapping between the board connector and the 
+* Ethernet Switch port
+*
+* DESCRIPTION:
+*       This routine returns the matching Switch port.
+*
+* INPUT:
+*       ethPortNum - Ethernet port number.
+*	boardPortNum - logical number of the connector on the board
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       the matching Switch port, -1 if the port number is wrong or if not relevant.
+*
+*******************************************************************************/
+MV_32	mvBoardSwitchPortGet(MV_U32 ethPortNum, MV_U8 boardPortNum)
+{
+	MV_U32 boardId = mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("mvBoardSwitchPortGet: Board unknown.\n");
+		return MV_ERROR;
+	}
+	if (boardPortNum >= BOARD_ETH_SWITCH_PORT_NUM)
+	{
+		mvOsPrintf("mvBoardSwitchPortGet: Illegal board port number.\n");
+		return MV_ERROR;
+	}
+
+	return BOARD_INFO(boardId)->pSwitchInfo[ethPortNum].qdPort[boardPortNum];
+}
+
+/*******************************************************************************
+* mvBoardSwitchCpuPortGet - Get the the Ethernet Switch CPU port
+*
+* DESCRIPTION:
+*       This routine returns the Switch CPU port.
+*
+* INPUT:
+*       ethPortNum - Ethernet port number.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       the Switch CPU port, -1 if the port number is wrong or if not relevant.
+*
+*******************************************************************************/
+MV_32	mvBoardSwitchCpuPortGet(MV_U32 ethPortNum)
+{
+	MV_U32 boardId = mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("mvBoardSwitchCpuPortGet: Board unknown.\n");
+		return MV_ERROR;
+	}
+
+	return BOARD_INFO(boardId)->pSwitchInfo[ethPortNum].qdCpuPort;
+}
+
+/*******************************************************************************
+* mvBoardSmiScanModeGet - Get Switch SMI scan mode
+*
+* DESCRIPTION:
+*       This routine returns Switch SMI scan mode.
+*
+* INPUT:
+*       ethPortNum - Ethernet port number.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       1 for SMI_MANUAL_MODE, -1 if the port number is wrong or if not relevant.
+*
+*******************************************************************************/
+MV_32	mvBoardSmiScanModeGet(MV_U32 ethPortNum)
+{
+	MV_U32 boardId = mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("mvBoardSmiScanModeGet: Board unknown.\n");
+		return MV_ERROR;
+	}
+
+	return BOARD_INFO(boardId)->pSwitchInfo[ethPortNum].smiScanMode;
+}
+/*******************************************************************************
+* mvBoardSpecInitGet -
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN: Return MV_TRUE and parameters in case board need spesific phy init, 
+* 	  otherwise return MV_FALSE. 
+*
+*
+*******************************************************************************/
+
+MV_BOOL mvBoardSpecInitGet(MV_U32* regOff, MV_U32* data)
+{
+	return MV_FALSE;
+}
+
+/*******************************************************************************
+* mvBoardTclkGet - Get the board Tclk (Controller clock)
+*
+* DESCRIPTION:
+*       This routine extract the controller core clock.
+*       This function uses the controller counters to make identification.
+*		Note: In order to avoid interference, make sure task context switch
+*		and interrupts will not occure during this function operation
+*
+* INPUT:
+*       countNum - Counter number.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       32bit clock cycles in Hertz.
+*
+*******************************************************************************/
+MV_U32 mvBoardTclkGet(MV_VOID)
+{
+#if defined(TCLK_AUTO_DETECT)
+	MV_U32 tmpTClkRate = MV_BOARD_TCLK_166MHZ;
+
+        tmpTClkRate = MV_REG_READ(MPP_SAMPLE_AT_RESET);
+        tmpTClkRate &= MSAR_TCLCK_MASK;
+
+        switch (tmpTClkRate)
+        {
+        case MSAR_TCLCK_166:
+                tmpTClkRate = MV_BOARD_TCLK_166MHZ;
+                break;
+	case MSAR_TCLCK_200:
+                tmpTClkRate = MV_BOARD_TCLK_200MHZ;
+                break;
+
+        }
+	return tmpTClkRate;
+#else
+	return MV_BOARD_DEFAULT_TCLK;
+#endif
+
+}
+/*******************************************************************************
+* mvBoardSysClkGet - Get the board SysClk (CPU bus clock)
+*
+* DESCRIPTION:
+*       This routine extract the CPU bus clock.
+*
+* INPUT:
+*       countNum - Counter number.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       32bit clock cycles in Hertz.
+*
+*******************************************************************************/
+static MV_U32  mvBoard6180SysClkGet(MV_VOID)
+{
+	MV_U32 	sysClkRate=0;
+	MV_CPU_ARM_CLK _cpu6180_ddr_l2_CLK[] = MV_CPU6180_DDR_L2_CLCK_TBL;
+
+	sysClkRate = MV_REG_READ(MPP_SAMPLE_AT_RESET);
+	sysClkRate = sysClkRate & MSAR_CPUCLCK_MASK;
+	sysClkRate = sysClkRate >> MSAR_CPUCLCK_OFFS;
+			
+	sysClkRate = _cpu6180_ddr_l2_CLK[sysClkRate].ddrClk;
+
+	return sysClkRate;
+
+}
+
+MV_U32  mvBoardSysClkGet(MV_VOID)
+{
+#ifdef SYSCLK_AUTO_DETECT
+	MV_U32 sysClkRate, tmp, pClkRate, indexDdrRtio;
+	MV_U32 cpuCLK[] = MV_CPU_CLCK_TBL;
+	MV_U32 ddrRtio[][2] = MV_DDR_CLCK_RTIO_TBL;
+
+	if(mvCtrlModelGet() == MV_6180_DEV_ID)
+		return mvBoard6180SysClkGet();
+
+	tmp = MV_REG_READ(MPP_SAMPLE_AT_RESET);
+	pClkRate = tmp & MSAR_CPUCLCK_MASK;
+	pClkRate = pClkRate >> MSAR_CPUCLCK_OFFS;
+	pClkRate = cpuCLK[pClkRate];
+
+	indexDdrRtio = tmp & MSAR_DDRCLCK_RTIO_MASK;
+	indexDdrRtio = indexDdrRtio >> MSAR_DDRCLCK_RTIO_OFFS;
+
+	sysClkRate = ((pClkRate * ddrRtio[indexDdrRtio][1]) / ddrRtio[indexDdrRtio][0]);
+
+	return sysClkRate;
+#else
+	return MV_BOARD_DEFAULT_SYSCLK;
+#endif
+}
+
+
+/*******************************************************************************
+* mvBoardPexBridgeIntPinGet - Get PEX to PCI bridge interrupt pin number
+*
+* DESCRIPTION:
+*		Multi-ported PCI Express bridges that is implemented on the board
+*		collapse interrupts across multiple conventional PCI/PCI-X buses.
+*		A dual-headed PCI Express bridge would map (or "swizzle") the
+*		interrupts per the following table (in accordance with the respective
+*		logical PCI/PCI-X bridge's Device Number), collapse the INTA#-INTD#
+*		signals from its two logical PCI/PCI-X bridges, collapse the
+*		INTA#-INTD# signals from any internal sources, and convert the
+*		signals to in-band PCI Express messages. 10
+*		This function returns the upstream interrupt as it was converted by
+*		the bridge, according to board configuration and the following table:
+*					  		PCI dev num
+*			Interrupt pin 	7, 	8, 	9
+*		   			A  ->	A	D	C
+*		   			B  -> 	B	A	D
+*		   			C  -> 	C	B	A
+*		  			D  ->	D	C	B
+*
+*
+* INPUT:
+*       devNum - PCI/PCIX device number.
+*       intPin - PCI Int pin
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       Int pin connected to the Interrupt controller
+*
+*******************************************************************************/
+MV_U32 mvBoardPexBridgeIntPinGet(MV_U32 devNum, MV_U32 intPin)
+{
+	MV_U32 realIntPin = ((intPin + (3 - (devNum % 4))) %4 );
+
+	if (realIntPin == 0) return 4;
+		else return realIntPin;
+
+}
+
+/*******************************************************************************
+* mvBoardDebugLedNumGet - Get number of debug Leds
+*
+* DESCRIPTION:
+* INPUT:
+*       boardId
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_U32 mvBoardDebugLedNumGet(MV_U32 boardId)
+{
+	return BOARD_INFO(boardId)->activeLedsNumber;
+}
+
+/*******************************************************************************
+* mvBoardDebugLeg - Set the board debug Leds
+*
+* DESCRIPTION: turn on/off status leds.
+* 	       Note: assume MPP leds are part of group 0 only.
+*
+* INPUT:
+*       hexNum - Number to be displied in hex by Leds.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       None.
+*
+*******************************************************************************/
+MV_VOID mvBoardDebugLed(MV_U32 hexNum)
+{
+    MV_U32 val = 0,totalMask, currentBitMask = 1,i;
+    MV_U32 boardId= mvBoardIdGet();
+
+    totalMask = (1 << BOARD_INFO(boardId)->activeLedsNumber) -1;
+    hexNum &= totalMask;
+    totalMask = 0;
+
+    for (i = 0 ; i < BOARD_INFO(boardId)->activeLedsNumber ; i++)
+    {
+	if (hexNum & currentBitMask)
+	{
+	    val |= (1 << BOARD_INFO(boardId)->pLedGppPin[i]);
+	}
+
+	totalMask |= (1 << BOARD_INFO(boardId)->pLedGppPin[i]);
+
+	currentBitMask = (currentBitMask << 1);
+    }
+
+    if (BOARD_INFO(boardId)->ledsPolarity)
+    {
+	mvGppValueSet(0, totalMask, val);
+    }
+    else
+    {
+	mvGppValueSet(0, totalMask, ~val);
+    }
+}
+
+
+/*******************************************************************************
+* mvBoarGpioPinGet - mvBoarGpioPinGet
+*
+* DESCRIPTION:
+*
+* INPUT:
+*		class - MV_BOARD_GPP_CLASS enum.
+*
+* OUTPUT:
+*		None.
+*
+* RETURN:
+*       GPIO pin number. The function return -1 for bad parameters.
+*
+*******************************************************************************/
+MV_32 mvBoarGpioPinNumGet(MV_BOARD_GPP_CLASS class, MV_U32 index)
+{
+	MV_U32 boardId, i;
+	MV_U32 indexFound = 0;
+
+	boardId = mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("mvBoardRTCGpioPinGet:Board unknown.\n");
+		return MV_ERROR;
+
+	}
+
+        for (i = 0; i < BOARD_INFO(boardId)->numBoardGppInfo; i++)
+		if (BOARD_INFO(boardId)->pBoardGppInfo[i].devClass == class) {
+			if (indexFound == index)
+        			return (MV_U32)BOARD_INFO(boardId)->pBoardGppInfo[i].gppPinNum;
+			else
+				indexFound++;
+
+		}
+
+	return MV_ERROR;
+}
+
+
+/*******************************************************************************
+* mvBoardRTCGpioPinGet - mvBoardRTCGpioPinGet
+*
+* DESCRIPTION:
+*
+* INPUT:
+*		None.
+*
+* OUTPUT:
+*		None.
+*
+* RETURN:
+*       GPIO pin number. The function return -1 for bad parameters.
+*
+*******************************************************************************/
+MV_32 mvBoardRTCGpioPinGet(MV_VOID)
+{
+	return mvBoarGpioPinNumGet(BOARD_GPP_RTC, 0);
+}
+
+
+/*******************************************************************************
+* mvBoardReset - mvBoardReset
+*
+* DESCRIPTION:
+*			Reset the board
+* INPUT:
+*		None.
+*
+* OUTPUT:
+*		None.
+*
+* RETURN:
+*       None
+*
+*******************************************************************************/
+MV_VOID	mvBoardReset(MV_VOID)
+{
+	MV_32 resetPin;
+
+	/* Get gpp reset pin if define */
+	resetPin = mvBoardResetGpioPinGet();
+	if (resetPin != MV_ERROR)
+	{
+        	MV_REG_BIT_RESET( GPP_DATA_OUT_REG(0) ,(1 << resetPin));
+		MV_REG_BIT_RESET( GPP_DATA_OUT_EN_REG(0) ,(1 << resetPin));
+
+	}
+	else
+	{
+	    /* No gpp reset pin was found, try to reset ussing
+	    system reset out */
+	    MV_REG_BIT_SET( CPU_RSTOUTN_MASK_REG , BIT2);
+	    MV_REG_BIT_SET( CPU_SYS_SOFT_RST_REG , BIT0);
+	}
+	
+	while(1);
+}
+
+/*******************************************************************************
+* mvBoardResetGpioPinGet - mvBoardResetGpioPinGet
+*
+* DESCRIPTION:
+*
+* INPUT:
+*		None.
+*
+* OUTPUT:
+*		None.
+*
+* RETURN:
+*       GPIO pin number. The function return -1 for bad parameters.
+*
+*******************************************************************************/
+MV_32 mvBoardResetGpioPinGet(MV_VOID)
+{
+	return mvBoarGpioPinNumGet(BOARD_GPP_RESET, 0);
+}
+/*******************************************************************************
+* mvBoardSDIOGpioPinGet - mvBoardSDIOGpioPinGet
+*
+* DESCRIPTION:
+*	used for hotswap detection
+* INPUT:
+*		None.
+*
+* OUTPUT:
+*		None.
+*
+* RETURN:
+*       GPIO pin number. The function return -1 for bad parameters.
+*
+*******************************************************************************/
+MV_32  mvBoardSDIOGpioPinGet(MV_VOID)
+{
+	return mvBoarGpioPinNumGet(BOARD_GPP_SDIO_DETECT, 0);
+}
+
+/*******************************************************************************
+* mvBoardUSBVbusGpioPinGet - return Vbus input GPP
+*
+* DESCRIPTION:
+*
+* INPUT:
+*		int  devNo.
+*
+* OUTPUT:
+*		None.
+*
+* RETURN:
+*       GPIO pin number. The function return -1 for bad parameters.
+*
+*******************************************************************************/
+MV_32 mvBoardUSBVbusGpioPinGet(int devId)
+{
+	return mvBoarGpioPinNumGet(BOARD_GPP_USB_VBUS, devId);
+}
+
+/*******************************************************************************
+* mvBoardUSBVbusEnGpioPinGet - return Vbus Enable output GPP
+*
+* DESCRIPTION:
+*
+* INPUT:
+*		int  devNo.
+*
+* OUTPUT:
+*		None.
+*
+* RETURN:
+*       GPIO pin number. The function return -1 for bad parameters.
+*
+*******************************************************************************/
+MV_32 mvBoardUSBVbusEnGpioPinGet(int devId)
+{
+	return mvBoarGpioPinNumGet(BOARD_GPP_USB_VBUS_EN, devId);
+}
+
+
+/*******************************************************************************
+* mvBoardGpioIntMaskGet - Get GPIO mask for interrupt pins
+*
+* DESCRIPTION:
+*		This function returns a 32-bit mask of GPP pins that connected to
+*		interrupt generating sources on board.
+*		For example if UART channel A is hardwired to GPP pin 8 and
+*		UART channel B is hardwired to GPP pin 4 the fuinction will return
+*		the value 0x000000110
+*
+* INPUT:
+*		None.
+*
+* OUTPUT:
+*		None.
+*
+* RETURN:
+*		See description. The function return -1 if board is not identified.
+*
+*******************************************************************************/
+MV_32 mvBoardGpioIntMaskLowGet(MV_VOID)
+{
+	MV_U32 boardId;
+
+	boardId = mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("mvBoardGpioIntMaskGet:Board unknown.\n");
+		return MV_ERROR;
+
+	}
+
+	return BOARD_INFO(boardId)->intsGppMaskLow;
+}
+MV_32 mvBoardGpioIntMaskHighGet(MV_VOID)
+{
+	MV_U32 boardId;
+
+	boardId = mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("mvBoardGpioIntMaskGet:Board unknown.\n");
+		return MV_ERROR;
+
+	}
+
+	return BOARD_INFO(boardId)->intsGppMaskHigh;
+}
+
+
+/*******************************************************************************
+* mvBoardMppGet - Get board dependent MPP register value
+*
+* DESCRIPTION:
+*		MPP settings are derived from board design.
+*		MPP group consist of 8 MPPs. An MPP group represent MPP
+*		control register.
+*       This function retrieves board dependend MPP register value.
+*
+* INPUT:
+*       mppGroupNum - MPP group number.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       32bit value describing MPP control register value.
+*
+*******************************************************************************/
+MV_32 mvBoardMppGet(MV_U32 mppGroupNum)
+{
+	MV_U32 boardId;
+
+	boardId = mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("mvBoardMppGet:Board unknown.\n");
+		return MV_ERROR;
+
+	}
+
+	return BOARD_INFO(boardId)->pBoardMppConfigValue[0].mppGroup[mppGroupNum];
+}
+
+
+/*******************************************************************************
+* mvBoardMppGroupId - If MPP group type is AUTO then identify it using twsi
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*
+*******************************************************************************/
+MV_VOID mvBoardMppGroupIdUpdate(MV_VOID)
+{
+
+	MV_BOARD_MPP_GROUP_CLASS devClass;
+	MV_BOARD_MODULE_ID_CLASS devClassId;
+	MV_BOARD_MPP_TYPE_CLASS mppGroupType;
+	MV_U32 devId;
+	MV_U32 maxMppGrp = 1;
+	
+	devId = mvCtrlModelGet();
+
+	switch(devId){
+		case MV_6281_DEV_ID:
+			maxMppGrp = MV_6281_MPP_MAX_MODULE;
+			break;
+		case MV_6192_DEV_ID:
+			maxMppGrp = MV_6192_MPP_MAX_MODULE;
+			break;
+		case MV_6180_DEV_ID:
+			maxMppGrp = MV_6180_MPP_MAX_MODULE;
+			break;		
+	}
+
+	for (devClass = 0; devClass < maxMppGrp; devClass++)
+	{
+		/* If MPP group can be defined by the module connected to it */
+		if (mvBoardMppGroupTypeGet(devClass) == MV_BOARD_AUTO)
+		{
+			/* Get MPP module ID */
+			devClassId = mvBoarModuleTypeGet(devClass);
+			if (MV_ERROR != devClassId)
+			{
+				switch(devClassId)
+				{
+				case MV_BOARD_MODULE_TDM_ID:
+					mppGroupType = MV_BOARD_TDM;
+					break;
+				case MV_BOARD_MODULE_AUDIO_ID:
+					mppGroupType = MV_BOARD_AUDIO;
+					break;
+				case MV_BOARD_MODULE_RGMII_ID:
+					mppGroupType = MV_BOARD_RGMII;
+					break;
+				case MV_BOARD_MODULE_GMII_ID:
+					mppGroupType = MV_BOARD_GMII;
+					break;
+				case MV_BOARD_MODULE_TS_ID:
+					mppGroupType = MV_BOARD_TS;
+					break;
+				default:
+					mppGroupType = MV_BOARD_OTHER;
+					break;
+				}
+			}
+			else
+				/* The module bay is empty */
+				mppGroupType = MV_BOARD_OTHER;
+			
+			/* Update MPP group type */
+			mvBoardMppGroupTypeSet(devClass, mppGroupType);
+		}
+
+		/* Update MPP output voltage for RGMII 1.8V */
+		MV_REG_BIT_SET(MPP_OUTPUT_DRIVE_REG,MPP_1_8_RGMII0_OUTPUT_DRIVE);
+		if ((mvBoardMppGroupTypeGet(devClass) == MV_BOARD_RGMII) || 
+			(mvBoardMppGroupTypeGet(devClass) == MV_BOARD_GMII))
+			MV_REG_BIT_SET(MPP_OUTPUT_DRIVE_REG,MPP_1_8_RGMII1_OUTPUT_DRIVE);
+	}
+}
+
+/*******************************************************************************
+* mvBoardMppGroupTypeGet 
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       mppGroupClass - MPP group number 0  for MPP[35:20] or 1 for MPP[49:36].
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*
+*******************************************************************************/
+MV_BOARD_MPP_TYPE_CLASS mvBoardMppGroupTypeGet(MV_BOARD_MPP_GROUP_CLASS mppGroupClass)
+{
+	MV_U32 boardId;
+
+	boardId = mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("mvBoardMppGet:Board unknown.\n");
+		return MV_ERROR;
+
+	}
+	
+	if (mppGroupClass == MV_BOARD_MPP_GROUP_1)
+		return BOARD_INFO(boardId)->pBoardMppTypeValue[0].boardMppGroup1;
+	else
+		return BOARD_INFO(boardId)->pBoardMppTypeValue[0].boardMppGroup2;
+}
+
+/*******************************************************************************
+* mvBoardMppGroupTypeSet 
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       mppGroupClass - MPP group number 0  for MPP[35:20] or 1 for MPP[49:36].
+*       mppGroupType - MPP group type for MPP[35:20] or for MPP[49:36].
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*
+*******************************************************************************/
+MV_VOID mvBoardMppGroupTypeSet(MV_BOARD_MPP_GROUP_CLASS mppGroupClass,
+						MV_BOARD_MPP_TYPE_CLASS mppGroupType)
+{
+	MV_U32 boardId;
+
+	boardId = mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("mvBoardMppGet:Board unknown.\n");
+	}
+
+	if (mppGroupClass == MV_BOARD_MPP_GROUP_1)
+		BOARD_INFO(boardId)->pBoardMppTypeValue[0].boardMppGroup1 = mppGroupType;
+	else
+		BOARD_INFO(boardId)->pBoardMppTypeValue[0].boardMppGroup2 = mppGroupType;
+
+}
+
+/*******************************************************************************
+* mvBoardMppMuxSet - Update MPP mux
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*
+*******************************************************************************/
+MV_VOID mvBoardMppMuxSet(MV_VOID)
+{
+
+	MV_BOARD_MPP_GROUP_CLASS devClass;
+	MV_BOARD_MPP_TYPE_CLASS mppGroupType;
+	MV_U32 devId;
+	MV_U8 muxVal = 0;
+	MV_U32 maxMppGrp = 1;
+    	MV_TWSI_SLAVE twsiSlave;
+	MV_TWSI_ADDR slave;
+	
+	devId = mvCtrlModelGet();
+
+	switch(devId){
+		case MV_6281_DEV_ID:
+			maxMppGrp = MV_6281_MPP_MAX_MODULE;
+			break;
+		case MV_6192_DEV_ID:
+			maxMppGrp = MV_6192_MPP_MAX_MODULE;
+			break;
+		case MV_6180_DEV_ID:
+			maxMppGrp = MV_6180_MPP_MAX_MODULE;
+			break;		
+	}
+
+	for (devClass = 0; devClass < maxMppGrp; devClass++)
+	{
+		mppGroupType = mvBoardMppGroupTypeGet(devClass);
+
+		switch(mppGroupType)
+		{
+			case MV_BOARD_TDM:
+				muxVal |= (0x3 << (devClass * 2));
+				break;
+			case MV_BOARD_AUDIO:
+				 muxVal |= (devClass ? (0x3 << (devClass * 2)): 0);
+				break;
+			case MV_BOARD_RGMII:
+			case MV_BOARD_GMII:
+				muxVal |= (devClass ? (0x3 << (devClass * 2)): 0);
+				break;
+			case MV_BOARD_TS:
+				 muxVal |= (devClass ? 0 :(0x2 << (devClass * 2)));
+				break;
+			default:
+				muxVal |= (0x3 << (devClass * 2));
+				break;
+		}
+	}
+
+	/* TWSI init */    	
+	slave.type = ADDR7_BIT;
+	slave.address = 0;
+	mvTwsiInit(MV_BOARD_DIMM_I2C_CHANNEL, TWSI_SPEED, mvBoardTclkGet(), &slave, 0);
+
+	/* Read MPP module ID */
+    	DB(mvOsPrintf("Board: twsi exp set\n"));
+    	twsiSlave.slaveAddr.address = mvBoardTwsiExpAddrGet(MV_BOARD_MUX_I2C_ADDR_ENTRY);
+    	twsiSlave.slaveAddr.type = mvBoardTwsiExpAddrTypeGet(MV_BOARD_MUX_I2C_ADDR_ENTRY);
+    	twsiSlave.validOffset = MV_TRUE;
+	/* Offset is the first command after the address which indicate the register number to be read 
+	   in next operation */
+    	twsiSlave.offset = 2;
+    	twsiSlave.moreThen256 = MV_FALSE;
+
+
+
+    	if( MV_OK != mvTwsiWrite (MV_BOARD_DIMM_I2C_CHANNEL, &twsiSlave, &muxVal, 1) )
+    	{
+    		DB(mvOsPrintf("Board: twsi exp out val fail\n"));
+        	return;
+    	}
+    	DB(mvOsPrintf("Board: twsi exp out val succeded\n"));
+    	
+	/* Change twsi exp to output */
+    	twsiSlave.offset = 6;
+	muxVal = 0;
+	if( MV_OK != mvTwsiWrite (MV_BOARD_DIMM_I2C_CHANNEL, &twsiSlave, &muxVal, 1) )
+    	{
+    		DB(mvOsPrintf("Board: twsi exp change to out fail\n"));
+        	return;
+    	}
+    	DB(mvOsPrintf("Board: twsi exp change to out succeded\n"));
+	
+}
+
+/*******************************************************************************
+* mvBoardTdmLifeLineSet - set life line control on TDM module
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*
+*******************************************************************************/
+MV_VOID mvBoardTdmLifeLineSet(MV_VOID)
+{
+
+	MV_BOARD_MPP_GROUP_CLASS devClass;
+	MV_BOARD_MPP_TYPE_CLASS mppGroupType;
+	MV_U32 devId;
+	MV_U8 muxVal = 1;
+	MV_U32 maxMppGrp = 1;
+    	MV_TWSI_SLAVE twsiSlave;
+	MV_TWSI_ADDR slave;
+	
+	devId = mvCtrlModelGet();
+
+	switch(devId){
+		case MV_6281_DEV_ID:
+			maxMppGrp = MV_6281_MPP_MAX_MODULE;
+			break;
+		case MV_6192_DEV_ID:
+			maxMppGrp = MV_6192_MPP_MAX_MODULE;
+			break;
+		case MV_6180_DEV_ID:
+			maxMppGrp = MV_6180_MPP_MAX_MODULE;
+			break;		
+	}
+
+	for (devClass = 0; devClass < maxMppGrp; devClass++)
+	{
+		mppGroupType = mvBoardMppGroupTypeGet(devClass);
+		if(mppGroupType == MV_BOARD_TDM)
+			break;
+	}
+
+	if(devClass == maxMppGrp)
+		return;		/* TDM module not found */
+
+	/* TWSI init */    	
+	slave.type = ADDR7_BIT;
+	slave.address = 0;
+	mvTwsiInit(MV_BOARD_DIMM_I2C_CHANNEL, TWSI_SPEED, mvBoardTclkGet(), &slave, 0);
+
+	/* Read MPP module ID */
+    	DB(mvOsPrintf("Board: twsi exp set\n"));
+    	twsiSlave.slaveAddr.address = mvBoardTwsiExpAddrGet(devClass);
+    	twsiSlave.slaveAddr.type = ADDR7_BIT;
+    	twsiSlave.validOffset = MV_TRUE;
+	/* Offset is the first command after the address which indicate the register number to be read 
+	   in next operation */
+    	twsiSlave.offset = 3;
+    	twsiSlave.moreThen256 = MV_FALSE;
+
+    	if( MV_OK != mvTwsiWrite (MV_BOARD_DIMM_I2C_CHANNEL, &twsiSlave, &muxVal, 1) )
+    	{
+    		DB(mvOsPrintf("Board: twsi exp out val fail\n"));
+        	return;
+    	}
+    	DB(mvOsPrintf("Board: twsi exp out val succeded\n"));
+    	
+	/* Change twsi exp to output */
+    	twsiSlave.offset = 7;
+	muxVal = 0xfe;
+	if( MV_OK != mvTwsiWrite (MV_BOARD_DIMM_I2C_CHANNEL, &twsiSlave, &muxVal, 1) )
+    	{
+    		DB(mvOsPrintf("Board: twsi exp change to out fail\n"));
+        	return;
+    	}
+    	DB(mvOsPrintf("Board: twsi exp change to out succeded\n"));
+	
+}
+
+
+/*******************************************************************************
+* mvBoardMppModuleTypePrint - print module detect
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*
+*******************************************************************************/
+MV_VOID mvBoardMppModuleTypePrint(MV_VOID)
+{
+
+	MV_BOARD_MPP_GROUP_CLASS devClass;
+	MV_BOARD_MPP_TYPE_CLASS mppGroupType;
+	MV_U32 devId;
+	MV_U32 maxMppGrp = 1;
+	
+	devId = mvCtrlModelGet();
+
+	switch(devId){
+		case MV_6281_DEV_ID:
+			maxMppGrp = MV_6281_MPP_MAX_MODULE;
+			break;
+		case MV_6192_DEV_ID:
+			maxMppGrp = MV_6192_MPP_MAX_MODULE;
+			break;
+		case MV_6180_DEV_ID:
+			maxMppGrp = MV_6180_MPP_MAX_MODULE;
+			break;		
+	}
+
+	for (devClass = 0; devClass < maxMppGrp; devClass++)
+	{
+		mppGroupType = mvBoardMppGroupTypeGet(devClass);
+
+		switch(mppGroupType)
+		{
+			case MV_BOARD_TDM:
+				mvOsPrintf("Module %d is TDM\n", devClass);
+				break;
+			case MV_BOARD_AUDIO:
+				mvOsPrintf("Module %d is AUDIO\n", devClass);
+				break;
+			case MV_BOARD_RGMII:
+				mvOsPrintf("Module %d is RGMII\n", devClass);
+				break;
+			case MV_BOARD_GMII:
+				mvOsPrintf("Module %d is GMII\n", devClass);
+				break;
+			case MV_BOARD_TS:
+				mvOsPrintf("Module %d is TS\n", devClass);
+				break;
+			default:
+				break;
+		}
+	}
+}
+
+/* Board devices API managments */
+
+/*******************************************************************************
+* mvBoardGetDeviceNumber - Get number of device of some type on the board
+*
+* DESCRIPTION:
+*
+* INPUT:
+*		devType - The device type ( Flash,RTC , etc .. )
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       If the device is found on the board the then the functions returns the
+*		number of those devices else the function returns 0
+*
+*
+*******************************************************************************/
+MV_32 mvBoardGetDevicesNumber(MV_BOARD_DEV_CLASS devClass)
+{
+	MV_U32	foundIndex=0,devNum;
+	MV_U32 boardId= mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("mvBoardGetDeviceNumber:Board unknown.\n");
+		return 0xFFFFFFFF;
+
+	}
+
+	for (devNum = START_DEV_CS; devNum < BOARD_INFO(boardId)->numBoardDeviceIf; devNum++)
+	{
+		if (BOARD_INFO(boardId)->pDevCsInfo[devNum].devClass == devClass)
+		{
+			foundIndex++;
+		}
+	}
+
+    return foundIndex;
+
+}
+
+/*******************************************************************************
+* mvBoardGetDeviceBaseAddr - Get base address of a device existing on the board
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       devIndex - The device sequential number on the board
+*		devType - The device type ( Flash,RTC , etc .. )
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       If the device is found on the board the then the functions returns the
+*		Base address else the function returns 0xffffffff
+*
+*
+*******************************************************************************/
+MV_32 mvBoardGetDeviceBaseAddr(MV_32 devNum, MV_BOARD_DEV_CLASS devClass)
+{
+	MV_DEV_CS_INFO* devEntry;
+	devEntry = boardGetDevEntry(devNum,devClass);
+	if (devEntry != NULL)
+	{
+		return mvCpuIfTargetWinBaseLowGet(DEV_TO_TARGET(devEntry->deviceCS));
+
+	}
+
+	return 0xFFFFFFFF;
+}
+
+/*******************************************************************************
+* mvBoardGetDeviceBusWidth - Get Bus width of a device existing on the board
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       devIndex - The device sequential number on the board
+*		devType - The device type ( Flash,RTC , etc .. )
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       If the device is found on the board the then the functions returns the
+*		Bus width else the function returns 0xffffffff
+*
+*
+*******************************************************************************/
+MV_32 mvBoardGetDeviceBusWidth(MV_32 devNum, MV_BOARD_DEV_CLASS devClass)
+{
+	MV_DEV_CS_INFO* devEntry;
+
+	devEntry = boardGetDevEntry(devNum,devClass);
+	if (devEntry != NULL)
+	{
+		return 8; 
+	}
+
+	return 0xFFFFFFFF;
+
+}
+
+/*******************************************************************************
+* mvBoardGetDeviceWidth - Get dev width of a device existing on the board
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       devIndex - The device sequential number on the board
+*		devType - The device type ( Flash,RTC , etc .. )
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       If the device is found on the board the then the functions returns the
+*		dev width else the function returns 0xffffffff
+*
+*
+*******************************************************************************/
+MV_32 mvBoardGetDeviceWidth(MV_32 devNum, MV_BOARD_DEV_CLASS devClass)
+{
+	MV_DEV_CS_INFO* devEntry;
+	MV_U32 boardId= mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("Board unknown.\n");
+		return 0xFFFFFFFF;
+	}
+
+	devEntry = boardGetDevEntry(devNum,devClass);
+	if (devEntry != NULL)
+		return devEntry->devWidth;
+
+	return MV_ERROR;
+
+}
+
+/*******************************************************************************
+* mvBoardGetDeviceWinSize - Get the window size of a device existing on the board
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       devIndex - The device sequential number on the board
+*		devType - The device type ( Flash,RTC , etc .. )
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       If the device is found on the board the then the functions returns the
+*		window size else the function returns 0xffffffff
+*
+*
+*******************************************************************************/
+MV_32 mvBoardGetDeviceWinSize(MV_32 devNum, MV_BOARD_DEV_CLASS devClass)
+{
+	MV_DEV_CS_INFO* devEntry;
+	MV_U32 boardId = mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("Board unknown.\n");
+		return 0xFFFFFFFF;
+	}
+
+	devEntry = boardGetDevEntry(devNum,devClass);
+	if (devEntry != NULL)
+	{
+		return mvCpuIfTargetWinSizeGet(DEV_TO_TARGET(devEntry->deviceCS));
+	}
+
+	return 0xFFFFFFFF;
+}
+
+
+/*******************************************************************************
+* boardGetDevEntry - returns the entry pointer of a device on the board
+*
+* DESCRIPTION:
+*
+* INPUT:
+*       devIndex - The device sequential number on the board
+*		devType - The device type ( Flash,RTC , etc .. )
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       If the device is found on the board the then the functions returns the
+*		dev number else the function returns 0x0
+*
+*
+*******************************************************************************/
+static MV_DEV_CS_INFO*  boardGetDevEntry(MV_32 devNum, MV_BOARD_DEV_CLASS devClass)
+{
+	MV_U32	foundIndex=0,devIndex;
+	MV_U32 boardId= mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("boardGetDevEntry: Board unknown.\n");
+		return NULL;
+
+	}
+
+	for (devIndex = START_DEV_CS; devIndex < BOARD_INFO(boardId)->numBoardDeviceIf; devIndex++)
+	{
+		/* TBR */
+		/*if (BOARD_INFO(boardId)->pDevCsInfo[devIndex].deviceCS == MV_BOOTDEVICE_INDEX)
+		     continue;*/
+
+		if (BOARD_INFO(boardId)->pDevCsInfo[devIndex].devClass == devClass)
+		{
+            		if (foundIndex == devNum)
+			{
+				return &(BOARD_INFO(boardId)->pDevCsInfo[devIndex]);
+			}
+			foundIndex++;
+		}
+	}
+
+	/* device not found */
+	return NULL;
+}
+
+/* Get device CS number */
+
+MV_U32 boardGetDevCSNum(MV_32 devNum, MV_BOARD_DEV_CLASS devClass)
+{
+	MV_DEV_CS_INFO* devEntry;
+	MV_U32 boardId= mvBoardIdGet();
+
+	if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID)))
+	{
+		mvOsPrintf("Board unknown.\n");
+		return 0xFFFFFFFF;
+
+	}
+
+
+	devEntry = boardGetDevEntry(devNum,devClass);
+	if (devEntry != NULL)
+		return devEntry->deviceCS;
+
+	return 0xFFFFFFFF;
+
+}
+
+/*******************************************************************************
+* mvBoardRtcTwsiAddrTypeGet -
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*
+*
+*******************************************************************************/
+MV_U8 mvBoardRtcTwsiAddrTypeGet()
+{
+	int i;
+	MV_U32 boardId= mvBoardIdGet();
+
+	for (i = 0; i < BOARD_INFO(boardId)->numBoardTwsiDev; i++)
+		if (BOARD_INFO(boardId)->pBoardTwsiDev[i].devClass == BOARD_TWSI_RTC)
+			return BOARD_INFO(boardId)->pBoardTwsiDev[i].twsiDevAddrType;
+	return (MV_ERROR);
+}
+
+/*******************************************************************************
+* mvBoardRtcTwsiAddrGet -
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*
+*
+*******************************************************************************/
+MV_U8 mvBoardRtcTwsiAddrGet()
+{
+	int i;
+	MV_U32 boardId= mvBoardIdGet();
+
+	for (i = 0; i < BOARD_INFO(boardId)->numBoardTwsiDev; i++)
+		if (BOARD_INFO(boardId)->pBoardTwsiDev[i].devClass == BOARD_TWSI_RTC)
+			return BOARD_INFO(boardId)->pBoardTwsiDev[i].twsiDevAddr;
+	return (0xFF);
+}
+
+/*******************************************************************************
+* mvBoardA2DTwsiAddrTypeGet -
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*
+*
+*******************************************************************************/
+MV_U8 mvBoardA2DTwsiAddrTypeGet(MV_U8 unit)
+{
+	int i;
+	MV_U32 boardId= mvBoardIdGet();
+
+	for (i = 0; i < BOARD_INFO(boardId)->numBoardTwsiDev; i++)
+		if (BOARD_INFO(boardId)->pBoardTwsiDev[i].devClass == BOARD_TWSI_AUDIO_DEC)
+			return BOARD_INFO(boardId)->pBoardTwsiDev[i].twsiDevAddrType;
+	return (MV_ERROR);
+}
+
+/*******************************************************************************
+* mvBoardA2DTwsiAddrGet -
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*
+*
+*******************************************************************************/
+MV_U8 mvBoardA2DTwsiAddrGet(MV_U8 port)
+{
+	int i;
+	MV_U32 boardId= mvBoardIdGet();
+
+	for (i = 0; i < BOARD_INFO(boardId)->numBoardTwsiDev; i++)
+		if (BOARD_INFO(boardId)->pBoardTwsiDev[i].devClass == BOARD_TWSI_AUDIO_DEC)
+			return BOARD_INFO(boardId)->pBoardTwsiDev[i].twsiDevAddr;
+	return (0xFF);
+}
+
+/*******************************************************************************
+* mvBoardTwsiExpAddrTypeGet -
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*
+*
+*******************************************************************************/
+MV_U8 mvBoardTwsiExpAddrTypeGet(MV_U32 index)
+{
+	int i;
+	MV_U32 indexFound = 0;
+	MV_U32 boardId= mvBoardIdGet();
+
+	for (i = 0; i < BOARD_INFO(boardId)->numBoardTwsiDev; i++)
+		if (BOARD_INFO(boardId)->pBoardTwsiDev[i].devClass == BOARD_DEV_TWSI_EXP)
+		{
+			if (indexFound == index)
+				return BOARD_INFO(boardId)->pBoardTwsiDev[i].twsiDevAddrType;
+			else
+				indexFound++;
+		}
+
+	return (MV_ERROR);
+}
+
+/*******************************************************************************
+* mvBoardTwsiExpAddrGet -
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*
+*
+*******************************************************************************/
+MV_U8 mvBoardTwsiExpAddrGet(MV_U32 index)
+{
+	int i;
+	MV_U32 indexFound = 0;
+	MV_U32 boardId= mvBoardIdGet();
+
+	for (i = 0; i < BOARD_INFO(boardId)->numBoardTwsiDev; i++)
+		if (BOARD_INFO(boardId)->pBoardTwsiDev[i].devClass == BOARD_DEV_TWSI_EXP)
+		{
+			if (indexFound == index)
+				return BOARD_INFO(boardId)->pBoardTwsiDev[i].twsiDevAddr;
+			else
+				indexFound++;
+		}
+
+	return (0xFF);
+}
+
+
+/*******************************************************************************
+* mvBoardTwsiSatRAddrTypeGet -
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*
+*
+*******************************************************************************/
+MV_U8 mvBoardTwsiSatRAddrTypeGet(MV_U32 index)
+{
+	int i;
+	MV_U32 indexFound = 0;
+	MV_U32 boardId= mvBoardIdGet();
+
+	for (i = 0; i < BOARD_INFO(boardId)->numBoardTwsiDev; i++)
+		if (BOARD_INFO(boardId)->pBoardTwsiDev[i].devClass == BOARD_DEV_TWSI_SATR)
+		{
+			if (indexFound == index)
+				return BOARD_INFO(boardId)->pBoardTwsiDev[i].twsiDevAddrType;
+			else
+				indexFound++;
+		}
+
+	return (MV_ERROR);
+}
+
+/*******************************************************************************
+* mvBoardTwsiSatRAddrGet -
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*
+*
+*******************************************************************************/
+MV_U8 mvBoardTwsiSatRAddrGet(MV_U32 index)
+{
+	int i;
+	MV_U32 indexFound = 0;
+	MV_U32 boardId= mvBoardIdGet();
+
+	for (i = 0; i < BOARD_INFO(boardId)->numBoardTwsiDev; i++)
+		if (BOARD_INFO(boardId)->pBoardTwsiDev[i].devClass == BOARD_DEV_TWSI_SATR)
+		{
+			if (indexFound == index)
+				return BOARD_INFO(boardId)->pBoardTwsiDev[i].twsiDevAddr;
+			else
+				indexFound++;
+		}
+
+	return (0xFF);
+}
+
+/*******************************************************************************
+* mvBoardNandWidthGet -
+*
+* DESCRIPTION: Get the width of the first NAND device in byte.
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN: 1, 2, 4 or MV_ERROR
+*
+*
+*******************************************************************************/
+/*  */
+MV_32 mvBoardNandWidthGet(void)
+{
+	MV_U32 devNum;
+	MV_U32 devWidth;
+	MV_U32 boardId= mvBoardIdGet();
+
+	for (devNum = START_DEV_CS; devNum < BOARD_INFO(boardId)->numBoardDeviceIf; devNum++)
+	{
+		devWidth = mvBoardGetDeviceWidth(devNum, BOARD_DEV_NAND_FLASH);
+		if (devWidth != MV_ERROR)
+			return (devWidth / 8);
+	}
+		
+	/* NAND wasn't found */
+	return MV_ERROR;
+}
+
+MV_U32 gBoardId = -1;
+
+/*******************************************************************************
+* mvBoardIdGet - Get Board model
+*
+* DESCRIPTION:
+*       This function returns board ID.
+*       Board ID is 32bit word constructed of board model (16bit) and
+*       board revision (16bit) in the following way: 0xMMMMRRRR.
+*
+* INPUT:
+*       None.
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*       32bit board ID number, '-1' if board is undefined.
+*
+*******************************************************************************/
+MV_U32 mvBoardIdGet(MV_VOID)
+{
+	MV_U32 tmpBoardId = -1;
+
+	if(gBoardId == -1)
+        {
+		#if defined(DB_88F6281)
+		tmpBoardId = DB_88F6281_BP_ID;
+		#elif defined(RD_88F6281)
+		tmpBoardId = RD_88F6281_ID;
+		#elif defined(DB_88F6192)
+		tmpBoardId = DB_88F6192_BP_ID;
+		#elif defined(RD_88F6192)
+		tmpBoardId = RD_88F6192_ID;
+		#elif defined(DB_88F6180)
+		tmpBoardId = DB_88F6180_BP_ID;
+		#elif defined(RD_88F6180)
+		tmpBoardId = RD_88F6180_ID;
+		#endif
+		gBoardId = tmpBoardId;
+	}
+
+	return gBoardId;
+}
+
+
+/*******************************************************************************
+* mvBoarModuleTypeGet - mvBoarModuleTypeGet
+*
+* DESCRIPTION:
+*
+* INPUT:
+*		group num - MV_BOARD_MPP_GROUP_CLASS enum
+*
+* OUTPUT:
+*		None.
+*
+* RETURN:
+*		module num - MV_BOARD_MODULE_CLASS enum
+*
+*******************************************************************************/
+MV_BOARD_MODULE_ID_CLASS mvBoarModuleTypeGet(MV_BOARD_MPP_GROUP_CLASS devClass)
+{
+    	MV_TWSI_SLAVE twsiSlave;
+	MV_TWSI_ADDR slave;
+    	MV_U8 data;
+
+	/* TWSI init */    	
+	slave.type = ADDR7_BIT;
+	slave.address = 0;
+	mvTwsiInit(MV_BOARD_DIMM_I2C_CHANNEL, TWSI_SPEED, mvBoardTclkGet(), &slave, 0);
+
+    	/* Read MPP module ID */
+    	DB(mvOsPrintf("Board: Read MPP module ID\n"));
+    	twsiSlave.slaveAddr.address = mvBoardTwsiExpAddrGet(devClass);
+    	twsiSlave.slaveAddr.type = mvBoardTwsiExpAddrTypeGet(devClass);
+    	twsiSlave.validOffset = MV_TRUE;
+	/* Offset is the first command after the address which indicate the register number to be read 
+	   in next operation */
+    	twsiSlave.offset = 0;
+    	twsiSlave.moreThen256 = MV_FALSE;
+
+
+
+    	if( MV_OK != mvTwsiRead (MV_BOARD_DIMM_I2C_CHANNEL, &twsiSlave, &data, 1) )
+    	{
+    		DB(mvOsPrintf("Board: Read MPP module ID fail\n"));
+        	return MV_ERROR;
+    	}
+    	DB(mvOsPrintf("Board: Read MPP module ID succeded\n"));
+	
+	return data;
+}
+
+/*******************************************************************************
+* mvBoarTwsiSatRGet - 
+*
+* DESCRIPTION:
+*
+* INPUT:
+*		device num - one of three devices
+*		reg num - 0 or 1
+*
+* OUTPUT:
+*		None.
+*
+* RETURN:
+*		reg value
+*
+*******************************************************************************/
+MV_U8 mvBoarTwsiSatRGet(MV_U8 devNum, MV_U8 regNum)
+{
+    	MV_TWSI_SLAVE twsiSlave;
+	MV_TWSI_ADDR slave;
+    	MV_U8 data;
+
+	/* TWSI init */    	
+	slave.type = ADDR7_BIT;
+	slave.address = 0;
+	mvTwsiInit(MV_BOARD_DIMM_I2C_CHANNEL, TWSI_SPEED, mvBoardTclkGet(), &slave, 0);
+
+    	/* Read MPP module ID */
+    	DB(mvOsPrintf("Board: Read S@R device read\n"));
+    	twsiSlave.slaveAddr.address = mvBoardTwsiSatRAddrGet(devNum);
+    	twsiSlave.slaveAddr.type = mvBoardTwsiSatRAddrTypeGet(devNum);
+    	twsiSlave.validOffset = MV_TRUE;
+	/* Use offset as command */
+    	twsiSlave.offset = regNum;
+    	twsiSlave.moreThen256 = MV_FALSE;
+
+    	if( MV_OK != mvTwsiRead (MV_BOARD_DIMM_I2C_CHANNEL, &twsiSlave, &data, 1) )
+    	{
+    		DB(mvOsPrintf("Board: Read S@R fail\n"));
+        	return MV_ERROR;
+    	}
+    	DB(mvOsPrintf("Board: Read S@R succeded\n"));
+	
+	return data;
+}
+
+/*******************************************************************************
+* mvBoarTwsiSatRSet - 
+*
+* DESCRIPTION:
+*
+* INPUT:
+*		devNum - one of three devices
+*		regNum - 0 or 1
+*		regVal - value
+*
+*
+* OUTPUT:
+*		None.
+*
+* RETURN:
+*		reg value
+*
+*******************************************************************************/
+MV_STATUS mvBoarTwsiSatRSet(MV_U8 devNum, MV_U8 regNum, MV_U8 regVal)
+{
+    	MV_TWSI_SLAVE twsiSlave;
+	MV_TWSI_ADDR slave;
+	
+	/* TWSI init */    	
+	slave.type = ADDR7_BIT;
+	slave.address = 0;
+	mvTwsiInit(MV_BOARD_DIMM_I2C_CHANNEL, TWSI_SPEED, mvBoardTclkGet(), &slave, 0);
+
+    	/* Read MPP module ID */
+    	twsiSlave.slaveAddr.address = mvBoardTwsiSatRAddrGet(devNum);
+    	twsiSlave.slaveAddr.type = mvBoardTwsiSatRAddrTypeGet(devNum);
+    	twsiSlave.validOffset = MV_TRUE;
+    	DB(mvOsPrintf("Board: Write S@R device addr %x, type %x, data %x\n", twsiSlave.slaveAddr.address,\
+								twsiSlave.slaveAddr.type, regVal));
+	/* Use offset as command */
+    	twsiSlave.offset = regNum;
+    	twsiSlave.moreThen256 = MV_FALSE;
+    	if( MV_OK != mvTwsiWrite (MV_BOARD_DIMM_I2C_CHANNEL, &twsiSlave, &regVal, 1) )
+    	{
+    		DB(mvOsPrintf("Board: Write S@R fail\n"));
+        	return MV_ERROR;
+    	}
+    	DB(mvOsPrintf("Board: Write S@R succeded\n"));
+	
+	return MV_OK;
+}
+
+/*******************************************************************************
+* mvBoardSlicGpioPinGet -
+*
+* DESCRIPTION:
+*
+* INPUT:
+*
+* OUTPUT:
+*       None.
+*
+* RETURN:
+*
+*
+*******************************************************************************/
+MV_32 mvBoardSlicGpioPinGet(MV_U32 slicNum)
+{
+	MV_U32 boardId;
+	boardId = mvBoardIdGet();
+
+	switch (boardId)
+	{
+	case DB_88F6281_BP_ID:
+	case RD_88F6281_ID:
+	default:
+		return MV_ERROR;
+		break;
+
+	}
+}
+
--- linux-mvl-dove-2.6.32.orig/arch/arm/configs/dove_defconfig
+++ linux-mvl-dove-2.6.32/arch/arm/configs/dove_defconfig
@@ -0,0 +1,2691 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.32.9-dove-5.3.4
+# Tue Aug 31 10:11:55 2010
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_ARCH_HAS_CPUFREQ=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_OPROFILE_MRVL_PJ4=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_TASKSTATS=y
+CONFIG_TASK_DELAY_ACCT=y
+CONFIG_TASK_XACCT=y
+CONFIG_TASK_IO_ACCOUNTING=y
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_PANIC_TIMEOUT=0
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+
+#
+# Kernel Performance Events And Counters
+#
+# CONFIG_ASHMEM is not set
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_PCI_QUIRKS=y
+CONFIG_COMPAT_BRK=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+CONFIG_PROFILING=y
+CONFIG_TRACEPOINTS=y
+CONFIG_OPROFILE=y
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+CONFIG_LBDAF=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+CONFIG_FREEZER=y
+
+#
+# System Type
+#
+CONFIG_MMU=y
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+CONFIG_ARCH_DOVE=y
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5PC1XX is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_BCMRING is not set
+CONFIG_MV_HAL_RULES_PATH="arch/arm/mach-dove/mv_hal_support/mvRules.mk"
+
+#
+# Marvell Dove Implementations
+#
+CONFIG_DOVE_MRVL_BMM=m
+CONFIG_DOVE_VPU_USE_BMM=y
+CONFIG_DOVE_REV_Y0=y
+CONFIG_MACH_DOVE_RD_AVNG=y
+CONFIG_MV_INCLUDE_MPP_SYSFS=y
+# CONFIG_MACH_DOVE_RD is not set
+CONFIG_MACH_DOVE_DB=y
+CONFIG_MACH_DOVE_DB_B=y
+# CONFIG_DOVE_DB_USE_GPIO_I2C is not set
+CONFIG_MACH_DOVE_VIDEOPLUG=y
+CONFIG_MV_HAL_DRIVERS_SUPPORT=y
+CONFIG_DOVE_PM_SUPPORT=y
+CONFIG_MV_EXT_VGA_CLOCK=y
+
+#
+# Orion SoC options
+#
+# CONFIG_MV_INCLUDE_IDMA is not set
+CONFIG_MV_INCLUDE_USB=y
+# CONFIG_MV_INCLUDE_XOR is not set
+CONFIG_MV_INCLUDE_CESA=y
+CONFIG_MV_INCLUDE_GIG_ETH=y
+CONFIG_MV_INCLUDE_AUDIO=y
+CONFIG_MV_INCLUDE_INTEG_SATA=y
+CONFIG_MV_INCLUDE_PMU=y
+CONFIG_MV_INCLUDE_NFC=y
+CONFIG_MV_DDRMMC=y
+
+#
+# Soc DMA accelerations
+#
+
+#
+# SoC Networking support
+#
+CONFIG_MV_ETHERNET=y
+CONFIG_MV_ETH_PORTS_NUM=1
+
+#
+# Network Interface Configuration
+#
+CONFIG_MV_ETH_0_MTU=1500
+CONFIG_MV_ETH_0_MACADDR=""
+
+#
+# Rx/Tx Queue Configuration
+#
+CONFIG_MV_ETH_RX_Q_NUM=1
+CONFIG_MV_ETH_TX_Q_NUM=1
+CONFIG_MV_ETH_NUM_OF_RX_DESCR=128
+CONFIG_MV_ETH_NUM_OF_TX_DESCR=532
+
+#
+# TCP/UDP Offloading
+#
+CONFIG_MV_ETH_TSO=y
+# CONFIG_MV_ETH_UFO is not set
+# CONFIG_MV_ETH_INET_LRO is not set
+
+#
+# Control and Statistics
+#
+CONFIG_MV_ETH_PROC=y
+CONFIG_MV_ETH_STATS_ERROR=y
+CONFIG_MV_ETH_STATS_INFO=y
+# CONFIG_MV_ETH_STATS_DEBUG is not set
+# CONFIG_MV_LINUX_COUNTERS_DISABLE is not set
+
+#
+# Advanced Features
+#
+CONFIG_MV_ETH_TIMER_PERIOD=1000
+CONFIG_MV_SKB_HEADROOM=32
+CONFIG_MV_SKB_REUSE=y
+# CONFIG_MV_ETH_NFP is not set
+# CONFIG_MV_GATEWAY is not set
+
+#
+# cesa options
+#
+CONFIG_MV_CESA=y
+CONFIG_MV_CESA_OCF=y
+CONFIG_MV_CESA_TOOL=y
+CONFIG_SCSI_MVSATA=y
+
+#
+# Sata options
+#
+CONFIG_MV_SATA_SUPPORT_ATAPI=y
+CONFIG_MV_SATA_ENABLE_1MB_IOS=y
+# CONFIG_SATA_NO_DEBUG is not set
+CONFIG_SATA_DEBUG_ON_ERROR=y
+# CONFIG_SATA_FULL_DEBUG is not set
+
+#
+# Marvell Key driver
+#
+# CONFIG_MV_GPIO_KEY is not set
+# CONFIG_MV_TOUCH_KEY is not set
+# CONFIG_MV_TOUCH_SLIDER is not set
+CONFIG_MV_EC_KEY=y
+# CONFIG_MV_DBG_TRACE is not set
+CONFIG_PLAT_ORION=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+# CONFIG_CPU_V6 is not set
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_V7=y
+CONFIG_CPU_32v7=y
+CONFIG_CPU_PJ4=y
+CONFIG_CPU_ABRT_EV7=y
+CONFIG_CPU_PABRT_V7=y
+CONFIG_CPU_CACHE_V7=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V7=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+CONFIG_ARM_THUMBEE=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_HAS_TLS_REG=y
+CONFIG_OUTER_CACHE=y
+CONFIG_ARM_L1_CACHE_SHIFT=5
+CONFIG_CACHE_TAUROS2=y
+CONFIG_MRV_PTE_IN_L2=y
+# CONFIG_MV_L2_WA_ON is not set
+CONFIG_MV_L2_PREFETCH_OFF=y
+CONFIG_CPU_PJ4_PMC_ACCESS_IN_USERMODE=y
+# CONFIG_DOVE_DEBUGGER_MODE_V6 is not set
+# CONFIG_CPU_ENABLE_WRITECO is not set
+CONFIG_CPU_PJ4_ERRATA_4574_4731=y
+CONFIG_CPU_PJ4_ERRATA_4315=y
+CONFIG_IWMMXT=y
+CONFIG_MRVL_ERRATA_THUMB_VLDR=y
+# CONFIG_ARM_ERRATA_430973 is not set
+# CONFIG_ARM_ERRATA_458693 is not set
+# CONFIG_ARM_ERRATA_460075 is not set
+CONFIG_COMMON_CLKDEV=y
+CONFIG_FORCE_MAX_ZONEORDER=19
+
+#
+# Bus support
+#
+CONFIG_PCI=y
+CONFIG_PCI_SYSCALL=y
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_PCI_LEGACY=y
+# CONFIG_PCI_DEBUG is not set
+# CONFIG_PCI_STUB is not set
+# CONFIG_PCI_IOV is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=100
+# CONFIG_THUMB2_KERNEL is not set
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+CONFIG_HIGHMEM=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_HAVE_MLOCK=y
+CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE=""
+# CONFIG_XIP_KERNEL is not set
+CONFIG_KEXEC=y
+CONFIG_ATAGS_PROC=y
+
+#
+# CPU Power Management
+#
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_TABLE=y
+# CONFIG_CPU_FREQ_DEBUG is not set
+CONFIG_CPU_FREQ_STAT=y
+CONFIG_CPU_FREQ_STAT_DETAILS=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+CONFIG_CPU_FREQ_DOVE=y
+CONFIG_CPU_IDLE=y
+CONFIG_CPU_IDLE_GOV_LADDER=y
+CONFIG_CPU_IDLE_GOV_MENU=y
+CONFIG_CPU_IDLE_GOV_USER=y
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+# CONFIG_FPE_NWFPE is not set
+# CONFIG_FPE_FASTFPE is not set
+CONFIG_VFP=y
+CONFIG_VFPv3=y
+# CONFIG_NEON is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+CONFIG_HIBERNATION_NVS=y
+# CONFIG_WAKELOCK is not set
+CONFIG_HIBERNATION=y
+CONFIG_PM_STD_PARTITION=""
+CONFIG_APM_EMULATION=y
+# CONFIG_PM_RUNTIME is not set
+CONFIG_APM_EMU_DS2782=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+CONFIG_INET_LRO=y
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+CONFIG_IPV6=y
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+# CONFIG_INET6_AH is not set
+# CONFIG_INET6_ESP is not set
+# CONFIG_INET6_IPCOMP is not set
+# CONFIG_IPV6_MIP6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET6_XFRM_MODE_BEET is not set
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+# CONFIG_IPV6_SIT is not set
+# CONFIG_IPV6_TUNNEL is not set
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_IPV6_MROUTE is not set
+# CONFIG_ANDROID_PARANOID_NETWORK is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+CONFIG_NET_PKTGEN=m
+# CONFIG_NET_DROP_MONITOR is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+CONFIG_BT=m
+CONFIG_BT_L2CAP=m
+CONFIG_BT_SCO=m
+CONFIG_BT_RFCOMM=m
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=m
+# CONFIG_BT_BNEP_MC_FILTER is not set
+# CONFIG_BT_BNEP_PROTO_FILTER is not set
+CONFIG_BT_HIDP=m
+
+#
+# Bluetooth device drivers
+#
+# CONFIG_BT_HCIBTUSB is not set
+# CONFIG_BT_HCIBTSDIO is not set
+# CONFIG_BT_HCIUART is not set
+# CONFIG_BT_HCIBCM203X is not set
+# CONFIG_BT_HCIBPA10X is not set
+# CONFIG_BT_HCIBFUSB is not set
+# CONFIG_BT_HCIVHCI is not set
+# CONFIG_BT_MRVL is not set
+# CONFIG_AF_RXRPC is not set
+CONFIG_WIRELESS=y
+# CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
+CONFIG_WIRELESS_OLD_REGULATORY=y
+CONFIG_WIRELESS_EXT=y
+CONFIG_WIRELESS_EXT_SYSFS=y
+CONFIG_LIB80211=y
+# CONFIG_LIB80211_DEBUG is not set
+
+#
+# CFG80211 needs to be enabled for MAC80211
+#
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH=""
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_TESTS=m
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+CONFIG_MTD_CFI_GEOMETRY=y
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_OTP is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+CONFIG_MTD_CFI_STAA=y
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_IMPA7 is not set
+# CONFIG_MTD_INTEL_VR_NOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_DATAFLASH is not set
+CONFIG_MTD_M25P80=y
+CONFIG_M25PXX_USE_FAST_READ=y
+# CONFIG_MTD_SST25L is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+# CONFIG_MTD_NAND_GPIO is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_CAFE is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
+# CONFIG_MTD_NAND_ORION is not set
+# CONFIG_MTD_NFC_ORION is not set
+CONFIG_MTD_NFC_HAL_ORION=y
+CONFIG_MV_MTD_GANG_SUPPORT=y
+CONFIG_MV_MTD_MLC_NAND_SUPPORT=y
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_MTD_UBI_BEB_RESERVE=1
+# CONFIG_MTD_UBI_GLUEBI is not set
+
+#
+# UBI debugging options
+#
+# CONFIG_MTD_UBI_DEBUG is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=1
+CONFIG_BLK_DEV_RAM_SIZE=4096
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MG_DISK is not set
+CONFIG_MISC_DEVICES=y
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_SCSI_PROC_FS is not set
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+CONFIG_BLK_DEV_SR=m
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+CONFIG_CHR_DEV_SG=m
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_SCSI_BNX2_ISCSI is not set
+# CONFIG_BE2ISCSI is not set
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_AIC94XX is not set
+# CONFIG_SCSI_MVSAS is not set
+# CONFIG_MVUMI_SAS is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_SCSI_ARCMSR is not set
+# CONFIG_MEGARAID_NEWGEN is not set
+# CONFIG_MEGARAID_LEGACY is not set
+# CONFIG_MEGARAID_SAS is not set
+# CONFIG_SCSI_MPT2SAS is not set
+# CONFIG_SCSI_HPTIOP is not set
+# CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
+# CONFIG_FCOE is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_STEX is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
+# CONFIG_SCSI_IPR is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_QLA_FC is not set
+# CONFIG_SCSI_QLA_ISCSI is not set
+# CONFIG_SCSI_LPFC is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_NSP32 is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_PMCRAID is not set
+# CONFIG_SCSI_SRP is not set
+# CONFIG_SCSI_BFA_FC is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+CONFIG_ATA=y
+# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_ATA_VERBOSE_ERROR=y
+CONFIG_SATA_PMP=y
+CONFIG_SATA_AHCI=m
+# CONFIG_SATA_SIL24 is not set
+CONFIG_ATA_SFF=y
+# CONFIG_SATA_SVW is not set
+# CONFIG_ATA_PIIX is not set
+CONFIG_SATA_MV=y
+# CONFIG_SATA_NV is not set
+# CONFIG_PDC_ADMA is not set
+# CONFIG_SATA_QSTOR is not set
+# CONFIG_SATA_PROMISE is not set
+# CONFIG_SATA_SX4 is not set
+# CONFIG_SATA_SIL is not set
+# CONFIG_SATA_SIS is not set
+# CONFIG_SATA_ULI is not set
+# CONFIG_SATA_VIA is not set
+# CONFIG_SATA_VITESSE is not set
+# CONFIG_SATA_INIC162X is not set
+# CONFIG_PATA_ALI is not set
+# CONFIG_PATA_AMD is not set
+# CONFIG_PATA_ARTOP is not set
+# CONFIG_PATA_ATP867X is not set
+# CONFIG_PATA_ATIIXP is not set
+# CONFIG_PATA_CMD640_PCI is not set
+# CONFIG_PATA_CMD64X is not set
+# CONFIG_PATA_CS5520 is not set
+# CONFIG_PATA_CS5530 is not set
+# CONFIG_PATA_CYPRESS is not set
+# CONFIG_PATA_EFAR is not set
+# CONFIG_ATA_GENERIC is not set
+# CONFIG_PATA_HPT366 is not set
+# CONFIG_PATA_HPT37X is not set
+# CONFIG_PATA_HPT3X2N is not set
+# CONFIG_PATA_HPT3X3 is not set
+# CONFIG_PATA_IT821X is not set
+# CONFIG_PATA_IT8213 is not set
+# CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_TRIFLEX is not set
+# CONFIG_PATA_MARVELL is not set
+# CONFIG_PATA_MPIIX is not set
+# CONFIG_PATA_OLDPIIX is not set
+# CONFIG_PATA_NETCELL is not set
+# CONFIG_PATA_NINJA32 is not set
+# CONFIG_PATA_NS87410 is not set
+# CONFIG_PATA_NS87415 is not set
+# CONFIG_PATA_OPTI is not set
+# CONFIG_PATA_OPTIDMA is not set
+# CONFIG_PATA_PDC_OLD is not set
+# CONFIG_PATA_RADISYS is not set
+# CONFIG_PATA_RDC is not set
+# CONFIG_PATA_RZ1000 is not set
+# CONFIG_PATA_SC1200 is not set
+# CONFIG_PATA_SERVERWORKS is not set
+# CONFIG_PATA_PDC2027X is not set
+# CONFIG_PATA_SIL680 is not set
+# CONFIG_PATA_SIS is not set
+# CONFIG_PATA_VIA is not set
+# CONFIG_PATA_WINBOND is not set
+# CONFIG_PATA_PLATFORM is not set
+# CONFIG_PATA_SCH is not set
+CONFIG_MD=y
+CONFIG_BLK_DEV_MD=m
+CONFIG_MD_LINEAR=m
+CONFIG_MD_RAID0=m
+CONFIG_MD_RAID1=m
+# CONFIG_MD_RAID10 is not set
+CONFIG_MD_RAID456=m
+CONFIG_MD_RAID6_PQ=m
+# CONFIG_ASYNC_RAID6_TEST is not set
+# CONFIG_MD_MULTIPATH is not set
+# CONFIG_MD_FAULTY is not set
+CONFIG_BLK_DEV_DM=y
+# CONFIG_DM_DEBUG is not set
+CONFIG_DM_CRYPT=y
+CONFIG_DM_SNAPSHOT=m
+CONFIG_DM_MIRROR=m
+# CONFIG_DM_LOG_USERSPACE is not set
+CONFIG_DM_ZERO=m
+# CONFIG_DM_MULTIPATH is not set
+# CONFIG_DM_DELAY is not set
+# CONFIG_DM_UEVENT is not set
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+
+#
+# You can enable one or both FireWire driver stacks.
+#
+
+#
+# See the help texts for more information.
+#
+# CONFIG_FIREWIRE is not set
+# CONFIG_IEEE1394 is not set
+# CONFIG_I2O is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_ARCNET is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_AX88796 is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_CASSINI is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMC911X is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+CONFIG_NET_PCI=y
+# CONFIG_PCNET32 is not set
+# CONFIG_AMD8111_ETH is not set
+# CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_B44 is not set
+# CONFIG_FORCEDETH is not set
+CONFIG_E100=y
+# CONFIG_FEALNX is not set
+# CONFIG_NATSEMI is not set
+# CONFIG_NE2K_PCI is not set
+# CONFIG_8139CP is not set
+# CONFIG_8139TOO is not set
+# CONFIG_R6040 is not set
+# CONFIG_SIS900 is not set
+# CONFIG_EPIC100 is not set
+# CONFIG_SMSC9420 is not set
+# CONFIG_SUNDANCE is not set
+# CONFIG_TLAN is not set
+# CONFIG_KS8842 is not set
+# CONFIG_KS8851 is not set
+# CONFIG_KS8851_MLL is not set
+# CONFIG_VIA_RHINE is not set
+# CONFIG_SC92031 is not set
+# CONFIG_ATL2 is not set
+CONFIG_NETDEV_1000=y
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+CONFIG_E1000=y
+CONFIG_E1000E=y
+# CONFIG_IP1000 is not set
+# CONFIG_IGB is not set
+# CONFIG_IGBVF is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+CONFIG_SKY2=y
+# CONFIG_SKY2_DEBUG is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+# CONFIG_CNIC is not set
+CONFIG_MV643XX_ETH=y
+# CONFIG_QLA3XXX is not set
+# CONFIG_ATL1 is not set
+# CONFIG_ATL1E is not set
+# CONFIG_ATL1C is not set
+# CONFIG_JME is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_TR is not set
+CONFIG_WLAN=y
+# CONFIG_WLAN_PRE80211 is not set
+CONFIG_WLAN_80211=y
+# CONFIG_LIBERTAS is not set
+# CONFIG_ATMEL is not set
+# CONFIG_PRISM54 is not set
+# CONFIG_USB_ZD1201 is not set
+# CONFIG_HOSTAP is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NET_FC is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+CONFIG_INPUT_FF_MEMLESS=m
+CONFIG_INPUT_POLLDEV=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+# CONFIG_INPUT_APMPOWER is not set
+# CONFIG_INPUT_KEYRESET is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ADP5588 is not set
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_QT2160 is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+CONFIG_INPUT_MOUSE=y
+# CONFIG_MOUSE_PS2 is not set
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_APPLETOUCH is not set
+# CONFIG_MOUSE_BCM5974 is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+CONFIG_MOUSE_GPIO=y
+# CONFIG_MOUSE_SYNAPTICS_I2C is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_ADS7846=y
+# CONFIG_TOUCHSCREEN_AD7877 is not set
+# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
+# CONFIG_TOUCHSCREEN_AD7879_SPI is not set
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+# CONFIG_TOUCHSCREEN_EETI is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MCS5000 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_WM97XX is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+CONFIG_TOUCHSCREEN_TSC2005=y
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
+# CONFIG_TOUCHSCREEN_W90X900 is not set
+CONFIG_TOUCHSCREEN_RT5611=y
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+# CONFIG_DEVKMEM is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_NOZOMI is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+# CONFIG_SERIAL_8250_PCI is not set
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=2
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_MAX3100 is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=16
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_DEVPORT=y
+# CONFIG_DCC_TTY is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_HELPER_AUTO=y
+CONFIG_I2C_ALGOBIT=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# PC SMBus host controller drivers
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_ISCH is not set
+# CONFIG_I2C_PIIX4 is not set
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_DESIGNWARE is not set
+# CONFIG_I2C_GPIO is not set
+CONFIG_I2C_MV64XXX=y
+CONFIG_I2C_MV64XXX_PORT_EXPANDER=y
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Graphics adapter I2C/DDC channel drivers
+#
+# CONFIG_I2C_VOODOO3 is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+CONFIG_MAX1535=y
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
+CONFIG_SPI_ORION=y
+CONFIG_SPI_MV=y
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+CONFIG_GPIO_PCA953X=y
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+# CONFIG_GPIO_LANGWELL is not set
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_GPIO_MC33880 is not set
+
+#
+# AC97 GPIO expanders:
+#
+CONFIG_W1=y
+
+#
+# 1-wire Bus Masters
+#
+# CONFIG_W1_MASTER_MATROX is not set
+# CONFIG_W1_MASTER_DS2490 is not set
+# CONFIG_W1_MASTER_DS2482 is not set
+# CONFIG_W1_MASTER_DS1WM is not set
+# CONFIG_W1_MASTER_GPIO is not set
+
+#
+# 1-wire Slaves
+#
+# CONFIG_W1_SLAVE_THERM is not set
+# CONFIG_W1_SLAVE_SMEM is not set
+# CONFIG_W1_SLAVE_DS2431 is not set
+# CONFIG_W1_SLAVE_DS2433 is not set
+CONFIG_W1_SLAVE_DS2760=y
+# CONFIG_W1_SLAVE_BQ27000 is not set
+CONFIG_POWER_SUPPLY=y
+# CONFIG_POWER_SUPPLY_DEBUG is not set
+# CONFIG_PDA_POWER is not set
+CONFIG_APM_POWER=y
+CONFIG_BATTERY_DS2760=y
+# CONFIG_BATTERY_DS2782 is not set
+CONFIG_BATTERY_BQ2084=y
+# CONFIG_BATTERY_BQ27x00 is not set
+# CONFIG_BATTERY_MAX17040 is not set
+# CONFIG_BATTERY_MCU is not set
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Native drivers
+#
+CONFIG_BMA020=y
+# CONFIG_SENSORS_AD7414 is not set
+# CONFIG_SENSORS_AD7418 is not set
+# CONFIG_SENSORS_ADCXX is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1029 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7462 is not set
+# CONFIG_SENSORS_ADT7470 is not set
+# CONFIG_SENSORS_ADT7473 is not set
+# CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ATXP1 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_I5K_AMB is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_G760A is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM70 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_LTC4215 is not set
+# CONFIG_SENSORS_LTC4245 is not set
+# CONFIG_SENSORS_LM95241 is not set
+# CONFIG_SENSORS_MAX1111 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_MAX6650 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_SHT15 is not set
+# CONFIG_SENSORS_SIS5595 is not set
+# CONFIG_SENSORS_DME1737 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47M192 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_TMP401 is not set
+# CONFIG_SENSORS_TMP421 is not set
+# CONFIG_SENSORS_VIA686A is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_VT8231 is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83791D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83793 is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83L786NG is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_SENSORS_LIS3_SPI is not set
+CONFIG_SENSORS_DOVE=y
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_UCB1400_CORE is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_MFD_MC13783 is not set
+# CONFIG_AB3100_CORE is not set
+# CONFIG_EZX_PCAP is not set
+# CONFIG_REGULATOR is not set
+CONFIG_MEDIA_SUPPORT=y
+
+#
+# Multimedia core support
+#
+CONFIG_VIDEO_DEV=y
+CONFIG_VIDEO_V4L2_COMMON=y
+CONFIG_VIDEO_ALLOW_V4L1=y
+CONFIG_VIDEO_V4L1_COMPAT=y
+# CONFIG_DVB_CORE is not set
+CONFIG_VIDEO_MEDIA=y
+
+#
+# Multimedia drivers
+#
+CONFIG_VIDEO_SAA7146=m
+CONFIG_VIDEO_SAA7146_VV=m
+# CONFIG_MEDIA_ATTACH is not set
+CONFIG_MEDIA_TUNER=y
+# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
+CONFIG_MEDIA_TUNER_SIMPLE=y
+CONFIG_MEDIA_TUNER_TDA8290=y
+CONFIG_MEDIA_TUNER_TDA9887=y
+CONFIG_MEDIA_TUNER_TEA5761=y
+CONFIG_MEDIA_TUNER_TEA5767=y
+CONFIG_MEDIA_TUNER_MT20XX=y
+CONFIG_MEDIA_TUNER_XC2028=y
+CONFIG_MEDIA_TUNER_XC5000=y
+CONFIG_MEDIA_TUNER_MC44S803=y
+CONFIG_VIDEO_V4L2=y
+CONFIG_VIDEO_V4L1=y
+CONFIG_VIDEOBUF_GEN=m
+CONFIG_VIDEOBUF_DMA_SG=m
+CONFIG_VIDEOBUF_VMALLOC=m
+CONFIG_VIDEOBUF_DMA_CONTIG=m
+CONFIG_VIDEO_BTCX=m
+CONFIG_VIDEO_IR=m
+CONFIG_VIDEO_TVEEPROM=m
+CONFIG_VIDEO_TUNER=m
+CONFIG_VIDEO_CAPTURE_DRIVERS=y
+# CONFIG_VIDEO_ADV_DEBUG is not set
+# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
+CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
+CONFIG_VIDEO_IR_I2C=m
+CONFIG_VIDEO_TVAUDIO=m
+CONFIG_VIDEO_TDA7432=m
+CONFIG_VIDEO_TDA9840=m
+CONFIG_VIDEO_TEA6415C=m
+CONFIG_VIDEO_TEA6420=m
+CONFIG_VIDEO_MSP3400=m
+CONFIG_VIDEO_CS53L32A=m
+CONFIG_VIDEO_M52790=m
+CONFIG_VIDEO_WM8775=m
+CONFIG_VIDEO_WM8739=m
+CONFIG_VIDEO_VP27SMPX=m
+CONFIG_VIDEO_SAA6588=m
+CONFIG_VIDEO_BT819=m
+CONFIG_VIDEO_BT856=m
+CONFIG_VIDEO_BT866=m
+CONFIG_VIDEO_KS0127=m
+CONFIG_VIDEO_OV7670=y
+CONFIG_VIDEO_OV7680=y
+CONFIG_VIDEO_MT9V011=m
+CONFIG_VIDEO_SAA7110=m
+CONFIG_VIDEO_SAA711X=m
+CONFIG_VIDEO_SAA717X=m
+CONFIG_VIDEO_TVP5150=m
+CONFIG_VIDEO_VPX3220=m
+CONFIG_VIDEO_CX25840=m
+CONFIG_VIDEO_CX2341X=m
+CONFIG_VIDEO_SAA7127=m
+CONFIG_VIDEO_SAA7185=m
+CONFIG_VIDEO_ADV7170=m
+CONFIG_VIDEO_ADV7175=m
+CONFIG_VIDEO_UPD64031A=m
+CONFIG_VIDEO_UPD64083=m
+# CONFIG_VIDEO_VIVI is not set
+CONFIG_VIDEO_BT848=m
+CONFIG_VIDEO_CPIA=m
+CONFIG_VIDEO_CPIA_USB=m
+CONFIG_VIDEO_CPIA2=m
+CONFIG_VIDEO_SAA5246A=m
+CONFIG_VIDEO_SAA5249=m
+CONFIG_VIDEO_STRADIS=m
+CONFIG_VIDEO_ZORAN=m
+CONFIG_VIDEO_ZORAN_DC30=m
+CONFIG_VIDEO_ZORAN_ZR36060=m
+CONFIG_VIDEO_ZORAN_BUZ=m
+CONFIG_VIDEO_ZORAN_DC10=m
+CONFIG_VIDEO_ZORAN_LML33=m
+CONFIG_VIDEO_ZORAN_LML33R10=m
+CONFIG_VIDEO_ZORAN_AVS6EYES=m
+CONFIG_VIDEO_SAA7134=m
+CONFIG_VIDEO_SAA7134_ALSA=m
+CONFIG_VIDEO_MXB=m
+CONFIG_VIDEO_HEXIUM_ORION=m
+CONFIG_VIDEO_HEXIUM_GEMINI=m
+CONFIG_VIDEO_CX88=m
+CONFIG_VIDEO_CX88_ALSA=m
+CONFIG_VIDEO_CX88_BLACKBIRD=m
+CONFIG_VIDEO_CX88_MPEG=m
+CONFIG_VIDEO_IVTV=m
+CONFIG_VIDEO_FB_IVTV=m
+CONFIG_VIDEO_CAFE_CCIC=y
+CONFIG_SOC_CAMERA=m
+CONFIG_SOC_CAMERA_MT9M001=m
+CONFIG_SOC_CAMERA_MT9M111=m
+CONFIG_SOC_CAMERA_MT9T031=m
+CONFIG_SOC_CAMERA_MT9V022=m
+CONFIG_SOC_CAMERA_TW9910=m
+CONFIG_SOC_CAMERA_PLATFORM=m
+CONFIG_SOC_CAMERA_OV772X=m
+CONFIG_VIDEO_SH_MOBILE_CEU=m
+CONFIG_V4L_USB_DRIVERS=y
+CONFIG_USB_VIDEO_CLASS=m
+CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
+CONFIG_USB_GSPCA=m
+CONFIG_USB_M5602=m
+CONFIG_USB_STV06XX=m
+# CONFIG_USB_GL860 is not set
+CONFIG_USB_GSPCA_CONEX=m
+CONFIG_USB_GSPCA_ETOMS=m
+CONFIG_USB_GSPCA_FINEPIX=m
+# CONFIG_USB_GSPCA_JEILINJ is not set
+CONFIG_USB_GSPCA_MARS=m
+CONFIG_USB_GSPCA_MR97310A=m
+CONFIG_USB_GSPCA_OV519=m
+CONFIG_USB_GSPCA_OV534=m
+CONFIG_USB_GSPCA_PAC207=m
+CONFIG_USB_GSPCA_PAC7311=m
+CONFIG_USB_GSPCA_SN9C20X=m
+CONFIG_USB_GSPCA_SN9C20X_EVDEV=y
+CONFIG_USB_GSPCA_SONIXB=m
+CONFIG_USB_GSPCA_SONIXJ=m
+CONFIG_USB_GSPCA_SPCA500=m
+CONFIG_USB_GSPCA_SPCA501=m
+CONFIG_USB_GSPCA_SPCA505=m
+CONFIG_USB_GSPCA_SPCA506=m
+CONFIG_USB_GSPCA_SPCA508=m
+CONFIG_USB_GSPCA_SPCA561=m
+CONFIG_USB_GSPCA_SQ905=m
+CONFIG_USB_GSPCA_SQ905C=m
+CONFIG_USB_GSPCA_STK014=m
+CONFIG_USB_GSPCA_SUNPLUS=m
+CONFIG_USB_GSPCA_T613=m
+CONFIG_USB_GSPCA_TV8532=m
+CONFIG_USB_GSPCA_VC032X=m
+CONFIG_USB_GSPCA_ZC3XX=m
+CONFIG_VIDEO_PVRUSB2=m
+CONFIG_VIDEO_PVRUSB2_SYSFS=y
+# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set
+CONFIG_VIDEO_HDPVR=m
+CONFIG_VIDEO_EM28XX=m
+CONFIG_VIDEO_EM28XX_ALSA=m
+CONFIG_VIDEO_CX231XX=m
+CONFIG_VIDEO_CX231XX_ALSA=m
+CONFIG_VIDEO_USBVISION=m
+CONFIG_VIDEO_USBVIDEO=m
+CONFIG_USB_VICAM=m
+CONFIG_USB_IBMCAM=m
+CONFIG_USB_KONICAWC=m
+CONFIG_USB_QUICKCAM_MESSENGER=m
+CONFIG_USB_ET61X251=m
+CONFIG_VIDEO_OVCAMCHIP=m
+CONFIG_USB_W9968CF=m
+CONFIG_USB_OV511=m
+CONFIG_USB_SE401=m
+CONFIG_USB_SN9C102=m
+CONFIG_USB_STV680=m
+CONFIG_USB_ZC0301=m
+CONFIG_USB_PWC=m
+# CONFIG_USB_PWC_DEBUG is not set
+CONFIG_USB_PWC_INPUT_EVDEV=y
+CONFIG_USB_ZR364XX=m
+CONFIG_USB_STKWEBCAM=m
+CONFIG_USB_S2255=m
+CONFIG_RADIO_ADAPTERS=y
+# CONFIG_RADIO_GEMTEK_PCI is not set
+# CONFIG_RADIO_MAXIRADIO is not set
+# CONFIG_RADIO_MAESTRO is not set
+# CONFIG_I2C_SI4713 is not set
+# CONFIG_RADIO_SI4713 is not set
+# CONFIG_USB_DSBR is not set
+# CONFIG_RADIO_SI470X is not set
+# CONFIG_USB_MR800 is not set
+# CONFIG_RADIO_TEA5764 is not set
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+CONFIG_VGA_ARB=y
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_DOVE_GPU=y
+CONFIG_DOVE_GPU_MEM_SIZE=128
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+CONFIG_FB_DDC=y
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+CONFIG_FB_MODE_HELPERS=y
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_CIRRUS is not set
+# CONFIG_FB_PM2 is not set
+# CONFIG_FB_CYBER2000 is not set
+# CONFIG_FB_ASILIANT is not set
+# CONFIG_FB_IMSTT is not set
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_NVIDIA is not set
+# CONFIG_FB_RIVA is not set
+# CONFIG_FB_MATROX is not set
+# CONFIG_FB_RADEON is not set
+# CONFIG_FB_ATY128 is not set
+# CONFIG_FB_ATY is not set
+# CONFIG_FB_S3 is not set
+# CONFIG_FB_SAVAGE is not set
+# CONFIG_FB_SIS is not set
+# CONFIG_FB_VIA is not set
+# CONFIG_FB_NEOMAGIC is not set
+# CONFIG_FB_KYRO is not set
+# CONFIG_FB_3DFX is not set
+# CONFIG_FB_VOODOO1 is not set
+# CONFIG_FB_VT8623 is not set
+# CONFIG_FB_TRIDENT is not set
+# CONFIG_FB_ARK is not set
+# CONFIG_FB_PM3 is not set
+# CONFIG_FB_CARMINE is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+# CONFIG_FB_BROADSHEET is not set
+CONFIG_FB_DOVE=y
+CONFIG_FB_DOVE_CONSISTENT_DMA_SIZE=14
+CONFIG_FB_DOVE_CLCD=y
+
+#
+# LCD0 I2C setting
+#
+CONFIG_FB_DOVE_CLCD0_I2C_DEFAULT_SETTING=y
+CONFIG_FB_DOVE_CLCD1=y
+
+#
+# LCD1 I2C setting
+#
+CONFIG_FB_DOVE_CLCD1_I2C_DEFAULT_SETTING=y
+CONFIG_FB_DOVE_CLCD_EDID=y
+CONFIG_FB_DOVE_DCON=y
+CONFIG_FB_DOVE_CLCD_DCONA_BYPASS=y
+# CONFIG_FB_DOVE_CLCD_DCONA_OLPC is not set
+# CONFIG_FB_DOVE_CLCD_DCONA_DUALVIEW is not set
+# CONFIG_FB_DOVE_CLCD_DCONA_MODE is not set
+CONFIG_FB_DOVE_CLCD_DCONB_BYPASS1=y
+# CONFIG_FB_DOVE_CLCD_DCONB_BYPASS0 is not set
+
+#
+# PLL clock speed when under inaccurate mode
+#
+CONFIG_FB_DOVE_CLCD_SCLK_VALUE=1000
+CONFIG_FB_DOVE_CLCD_DEFAULT_OPTION="lcd0:1280x768-24@60,lcd1:1024x768-16@60"
+CONFIG_DOVEFB_DISPLAY_MODE=y
+# CONFIG_FB_DOVE_CLCD_FLAREON_GV is not set
+# CONFIG_FB_MUSTANG_CLCD is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_LCD_CLASS_DEVICE=y
+# CONFIG_LCD_LMS283GF05 is not set
+# CONFIG_LCD_LTV350QV is not set
+# CONFIG_LCD_ILI9320 is not set
+# CONFIG_LCD_TDO24M is not set
+# CONFIG_LCD_VGG2432A4 is not set
+# CONFIG_LCD_PLATFORM is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_GENERIC=y
+CONFIG_BACKLIGHT_DOVE=y
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+# CONFIG_CH7025_COMPOSITE is not set
+# CONFIG_KG2_ANX7150 is not set
+CONFIG_ADI9889=y
+CONFIG_THS8200=y
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_LOGO_LINUX_CLUT224=y
+CONFIG_SOUND=y
+CONFIG_SOUND_OSS_CORE=y
+CONFIG_SOUND_OSS_CORE_PRECLAIM=y
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+CONFIG_SND_HWDEP=m
+CONFIG_SND_RAWMIDI=m
+CONFIG_SND_JACK=y
+# CONFIG_SND_SEQUENCER is not set
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=m
+CONFIG_SND_PCM_OSS=m
+CONFIG_SND_PCM_OSS_PLUGINS=y
+# CONFIG_SND_HRTIMER is not set
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+CONFIG_SND_VMASTER=y
+# CONFIG_SND_RAWMIDI_SEQ is not set
+# CONFIG_SND_OPL3_LIB_SEQ is not set
+# CONFIG_SND_OPL4_LIB_SEQ is not set
+# CONFIG_SND_SBAWE_SEQ is not set
+# CONFIG_SND_EMU10K1_SEQ is not set
+CONFIG_SND_AC97_CODEC=y
+CONFIG_SND_DRIVERS=y
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+# CONFIG_SND_AC97_POWER_SAVE is not set
+CONFIG_SND_PCI=y
+# CONFIG_SND_AD1889 is not set
+# CONFIG_SND_ALS300 is not set
+# CONFIG_SND_ALI5451 is not set
+# CONFIG_SND_ATIIXP is not set
+# CONFIG_SND_ATIIXP_MODEM is not set
+# CONFIG_SND_AU8810 is not set
+# CONFIG_SND_AU8820 is not set
+# CONFIG_SND_AU8830 is not set
+# CONFIG_SND_AW2 is not set
+# CONFIG_SND_AZT3328 is not set
+# CONFIG_SND_BT87X is not set
+# CONFIG_SND_CA0106 is not set
+# CONFIG_SND_CMIPCI is not set
+# CONFIG_SND_OXYGEN is not set
+# CONFIG_SND_CS4281 is not set
+# CONFIG_SND_CS46XX is not set
+# CONFIG_SND_CS5535AUDIO is not set
+# CONFIG_SND_CTXFI is not set
+# CONFIG_SND_DARLA20 is not set
+# CONFIG_SND_GINA20 is not set
+# CONFIG_SND_LAYLA20 is not set
+# CONFIG_SND_DARLA24 is not set
+# CONFIG_SND_GINA24 is not set
+# CONFIG_SND_LAYLA24 is not set
+# CONFIG_SND_MONA is not set
+# CONFIG_SND_MIA is not set
+# CONFIG_SND_ECHO3G is not set
+# CONFIG_SND_INDIGO is not set
+# CONFIG_SND_INDIGOIO is not set
+# CONFIG_SND_INDIGODJ is not set
+# CONFIG_SND_INDIGOIOX is not set
+# CONFIG_SND_INDIGODJX is not set
+# CONFIG_SND_EMU10K1 is not set
+# CONFIG_SND_EMU10K1X is not set
+# CONFIG_SND_ENS1370 is not set
+# CONFIG_SND_ENS1371 is not set
+# CONFIG_SND_ES1938 is not set
+# CONFIG_SND_ES1968 is not set
+# CONFIG_SND_FM801 is not set
+# CONFIG_SND_HDA_INTEL is not set
+# CONFIG_SND_HDSP is not set
+# CONFIG_SND_HDSPM is not set
+# CONFIG_SND_HIFIER is not set
+# CONFIG_SND_ICE1712 is not set
+# CONFIG_SND_ICE1724 is not set
+# CONFIG_SND_INTEL8X0 is not set
+# CONFIG_SND_INTEL8X0M is not set
+# CONFIG_SND_KORG1212 is not set
+# CONFIG_SND_LX6464ES is not set
+# CONFIG_SND_MAESTRO3 is not set
+# CONFIG_SND_MIXART is not set
+# CONFIG_SND_NM256 is not set
+# CONFIG_SND_PCXHR is not set
+# CONFIG_SND_RIPTIDE is not set
+# CONFIG_SND_RME32 is not set
+# CONFIG_SND_RME96 is not set
+# CONFIG_SND_RME9652 is not set
+# CONFIG_SND_SONICVIBES is not set
+# CONFIG_SND_TRIDENT is not set
+# CONFIG_SND_VIA82XX is not set
+# CONFIG_SND_VIA82XX_MODEM is not set
+# CONFIG_SND_VIRTUOSO is not set
+# CONFIG_SND_VX222 is not set
+# CONFIG_SND_YMFPCI is not set
+CONFIG_SND_ARM=y
+CONFIG_SND_PXA2XX_LIB=y
+CONFIG_SND_PXA2XX_LIB_AC97=y
+CONFIG_SND_SPI=y
+CONFIG_SND_USB=y
+CONFIG_SND_USB_AUDIO=m
+CONFIG_SND_USB_CAIAQ=m
+CONFIG_SND_USB_CAIAQ_INPUT=y
+CONFIG_SND_SOC=y
+CONFIG_SND_SOC_AC97_BUS=y
+CONFIG_SND_PXA2XX_SOC=y
+CONFIG_SND_PXA2XX_SOC_AC97=y
+CONFIG_SND_PXA2XX_SOC_AC97_SURROUND=y
+
+#
+# SoC Audio for the Marvell SoC's
+#
+CONFIG_SND_DOVE_AC97=y
+CONFIG_SND_DOVE_SOC_DB=y
+CONFIG_SND_DOVE_SOC_DB_B=y
+CONFIG_SND_DOVE_SOC_AC97_AVD1=y
+CONFIG_SND_DOVE_SOC_MRVL_AUDIO=y
+
+#
+# Select Codecs for the mv88fx i2s
+#
+CONFIG_CODEC_CS42L51=y
+# CONFIG_CODEC_RT5623 is not set
+CONFIG_CODEC_RT5630=y
+CONFIG_SND_SOC_I2C_AND_SPI=y
+# CONFIG_SND_SOC_ALL_CODECS is not set
+CONFIG_SND_SOC_AC97_CODEC=y
+CONFIG_SND_SOC_AD1980=y
+CONFIG_SND_SOC_CS42L51=y
+CONFIG_SND_SOC_RT5610=y
+CONFIG_SND_SOC_RT5630=y
+CONFIG_SOUND_PRIME=y
+CONFIG_AC97_BUS=y
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+# CONFIG_HID_PID is not set
+# CONFIG_USB_HIDDEV is not set
+
+#
+# Special HID drivers
+#
+# CONFIG_HID_A4TECH is not set
+# CONFIG_HID_APPLE is not set
+# CONFIG_HID_BELKIN is not set
+# CONFIG_HID_CHERRY is not set
+# CONFIG_HID_CHICONY is not set
+# CONFIG_HID_CYPRESS is not set
+# CONFIG_HID_DRAGONRISE is not set
+# CONFIG_HID_EZKEY is not set
+# CONFIG_HID_KYE is not set
+# CONFIG_HID_GYRATION is not set
+# CONFIG_HID_TWINHAN is not set
+# CONFIG_HID_KENSINGTON is not set
+CONFIG_HID_LOGITECH=m
+CONFIG_LOGITECH_FF=y
+CONFIG_LOGIRUMBLEPAD2_FF=y
+# CONFIG_HID_MICROSOFT is not set
+# CONFIG_HID_MONTEREY is not set
+# CONFIG_HID_NTRIG is not set
+# CONFIG_HID_PANTHERLORD is not set
+# CONFIG_HID_PETALYNX is not set
+# CONFIG_HID_SAMSUNG is not set
+# CONFIG_HID_SONY is not set
+# CONFIG_HID_SUNPLUS is not set
+# CONFIG_HID_GREENASIA is not set
+# CONFIG_HID_SMARTJOYPLUS is not set
+# CONFIG_HID_TOPSEED is not set
+# CONFIG_HID_THRUSTMASTER is not set
+# CONFIG_HID_WACOM is not set
+# CONFIG_HID_ZEROPLUS is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+CONFIG_USB_SUSPEND=y
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_MON is not set
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_XHCI_HCD is not set
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+CONFIG_USB_EHCI_TT_NEWSCHED=y
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
+# CONFIG_USB_OHCI_HCD is not set
+# CONFIG_USB_UHCI_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_WHCI_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+# CONFIG_USB_MUSB_HDRC is not set
+# CONFIG_USB_GADGET_MUSB_HDRC is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+CONFIG_USB_PRINTER=y
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+CONFIG_USB_STORAGE_DATAFAB=y
+CONFIG_USB_STORAGE_FREECOM=y
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+CONFIG_USB_STORAGE_SDDR09=y
+CONFIG_USB_STORAGE_SDDR55=y
+CONFIG_USB_STORAGE_JUMPSHOT=y
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+CONFIG_USB_TEST=m
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+# CONFIG_USB_GADGET_DEBUG_FS is not set
+CONFIG_USB_GADGET_VBUS_DRAW=0
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_PXA25X is not set
+# CONFIG_USB_GADGET_R8A66597 is not set
+# CONFIG_USB_GADGET_PXA27X is not set
+# CONFIG_USB_GADGET_S3C_HSOTG is not set
+# CONFIG_USB_GADGET_IMX is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_FSL_QE is not set
+# CONFIG_USB_GADGET_CI13XXX is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LANGWELL is not set
+CONFIG_USB_GADGET_MRVL=y
+CONFIG_USB_MRVL=y
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+# CONFIG_USB_ZERO is not set
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_ETH is not set
+# CONFIG_USB_GADGETFS is not set
+CONFIG_USB_FILE_STORAGE=m
+CONFIG_USB_FILE_STORAGE_TEST=y
+# CONFIG_USB_G_SERIAL is not set
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+# CONFIG_USB_ANDROID is not set
+# CONFIG_USB_CDC_COMPOSITE is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_NOP_USB_XCEIV is not set
+# CONFIG_UWB is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+# CONFIG_MMC_EMBEDDED_SDIO is not set
+# CONFIG_MMC_PARANOID_SD_INIT is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_MMC_BLOCK_PARANOID_RESUME is not set
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+CONFIG_MMC_SDHCI=y
+# CONFIG_MMC_SDHCI_PCI is not set
+CONFIG_MMC_SDHCI_MV=y
+# CONFIG_MMC_SDHCI_PLTFM is not set
+# CONFIG_MMC_AT91 is not set
+# CONFIG_MMC_ATMELMCI is not set
+# CONFIG_MMC_TIFM_SD is not set
+# CONFIG_MMC_MVSDIO is not set
+# CONFIG_MMC_CB710 is not set
+# CONFIG_MMC_VIA_SDMMC is not set
+# CONFIG_MEMSTICK is not set
+CONFIG_NEW_LEDS=y
+# CONFIG_LEDS_CLASS is not set
+
+#
+# LED drivers
+#
+
+#
+# LED Triggers
+#
+# CONFIG_LEDS_TRIGGERS is not set
+# CONFIG_SWITCH is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_INFINIBAND is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_INTF_ALARM is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_MV=y
+CONFIG_DMADEVICES=y
+
+#
+# DMA Devices
+#
+CONFIG_MV_XOR=y
+CONFIG_DMA_ENGINE=y
+
+#
+# DMA Clients
+#
+# CONFIG_NET_DMA is not set
+# CONFIG_ASYNC_TX_DMA is not set
+CONFIG_DMATEST=m
+# CONFIG_AUXDISPLAY is not set
+CONFIG_UIO=y
+# CONFIG_UIO_CIF is not set
+CONFIG_UIO_PDRV=y
+# CONFIG_UIO_PDRV_GENIRQ is not set
+# CONFIG_UIO_SMX is not set
+# CONFIG_UIO_AEC is not set
+# CONFIG_UIO_SERCOS3 is not set
+# CONFIG_UIO_PCI_GENERIC is not set
+CONFIG_UIO_VMETA=y
+# CONFIG_UIO_VMETA_POLLING_MODE is not set
+CONFIG_UIO_DOVE_VMETA_MEM_SIZE=96
+
+#
+# TI VLYNQ
+#
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+# CONFIG_EXT2_FS_SECURITY is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+# CONFIG_EXT3_FS_SECURITY is not set
+CONFIG_EXT4_FS=y
+CONFIG_EXT4_FS_XATTR=y
+CONFIG_EXT4_FS_POSIX_ACL=y
+# CONFIG_EXT4_FS_SECURITY is not set
+# CONFIG_EXT4_DEBUG is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_JBD2=y
+# CONFIG_JBD2_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_XFS_FS=m
+# CONFIG_XFS_QUOTA is not set
+# CONFIG_XFS_POSIX_ACL is not set
+# CONFIG_XFS_RT is not set
+# CONFIG_XFS_DEBUG is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+CONFIG_GENERIC_ACL=y
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=y
+CONFIG_JOLIET=y
+# CONFIG_ZISOFS is not set
+CONFIG_UDF_FS=m
+CONFIG_UDF_NLS=y
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+CONFIG_UBIFS_FS=y
+CONFIG_UBIFS_FS_XATTR=y
+CONFIG_UBIFS_FS_ADVANCED_COMPR=y
+CONFIG_UBIFS_FS_LZO=y
+CONFIG_UBIFS_FS_ZLIB=y
+# CONFIG_UBIFS_FS_DEBUG is not set
+CONFIG_CRAMFS=y
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+# CONFIG_NFS_V4 is not set
+CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=m
+CONFIG_NFS_ACL_SUPPORT=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+CONFIG_NLS_CODEPAGE_850=y
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_ISO8859_2=y
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=y
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_PRINTK_TIME=y
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_SCHEDSTATS is not set
+CONFIG_TIMER_STATS=y
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+CONFIG_STACKTRACE=y
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_HIGHMEM is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_NOP_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_RING_BUFFER=y
+CONFIG_EVENT_TRACING=y
+CONFIG_CONTEXT_SWITCH_TRACER=y
+CONFIG_RING_BUFFER_ALLOW_SWAP=y
+CONFIG_TRACING=y
+CONFIG_TRACING_SUPPORT=y
+CONFIG_FTRACE=y
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_ENABLE_DEFAULT_TRACERS is not set
+# CONFIG_BOOT_TRACER is not set
+CONFIG_BRANCH_PROFILE_NONE=y
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_RING_BUFFER_BENCHMARK is not set
+# CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_ARM_UNWIND=y
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_STACK_USAGE is not set
+CONFIG_DEBUG_LL=y
+# CONFIG_DEBUG_ICEDCC is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+CONFIG_SECURITY_FILE_CAPABILITIES=y
+CONFIG_XOR_BLOCKS=m
+CONFIG_ASYNC_CORE=m
+CONFIG_ASYNC_MEMCPY=m
+CONFIG_ASYNC_XOR=m
+CONFIG_ASYNC_PQ=m
+CONFIG_ASYNC_RAID6_RECOV=m
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_GF128MUL is not set
+CONFIG_CRYPTO_NULL=y
+CONFIG_CRYPTO_WORKQUEUE=y
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=m
+# CONFIG_CRYPTO_LRW is not set
+CONFIG_CRYPTO_PCBC=m
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+CONFIG_CRYPTO_HMAC=y
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+CONFIG_CRYPTO_CRC32C=y
+# CONFIG_CRYPTO_GHASH is not set
+CONFIG_CRYPTO_MD4=y
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+CONFIG_CRYPTO_SHA1=y
+CONFIG_CRYPTO_SHA256=y
+CONFIG_CRYPTO_SHA512=y
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+CONFIG_CRYPTO_BLOWFISH=y
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+CONFIG_CRYPTO_TEA=y
+CONFIG_CRYPTO_TWOFISH=y
+CONFIG_CRYPTO_TWOFISH_COMMON=y
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_ZLIB is not set
+CONFIG_CRYPTO_LZO=y
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_HW=y
+CONFIG_CRYPTO_DEV_MV_CESA=y
+# CONFIG_CRYPTO_DEV_HIFN_795X is not set
+
+#
+# OCF Configuration
+#
+CONFIG_OCF_OCF=y
+# CONFIG_OCF_RANDOMHARVEST is not set
+CONFIG_OCF_CRYPTODEV=y
+# CONFIG_OCF_CRYPTOSOFT is not set
+# CONFIG_OCF_SAFE is not set
+# CONFIG_OCF_IXP4XX is not set
+# CONFIG_OCF_HIFN is not set
+# CONFIG_OCF_HIFNHIPP is not set
+# CONFIG_OCF_TALITOS is not set
+# CONFIG_OCF_EP80579 is not set
+# CONFIG_OCF_CRYPTOCTEON is not set
+# CONFIG_OCF_OCFNULL is not set
+# CONFIG_OCF_BENCH is not set
+CONFIG_BINARY_PRINTF=y
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=y
+CONFIG_CRC16=y
+# CONFIG_CRC_T10DIF is not set
+CONFIG_CRC_ITU_T=m
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+CONFIG_LIBCRC32C=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
--- linux-mvl-dove-2.6.32.orig/arch/arm/configs/dovenb_tahoe_defconfig
+++ linux-mvl-dove-2.6.32/arch/arm/configs/dovenb_tahoe_defconfig
@@ -0,0 +1,1201 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.26.5-dove-0.2.0
+# Thu Nov 20 03:49:48 2008
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+# CONFIG_GENERIC_GPIO is not set
+# CONFIG_GENERIC_TIME is not set
+# CONFIG_GENERIC_CLOCKEVENTS is not set
+CONFIG_MMU=y
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ARCH_SUPPORTS_AOUT=y
+CONFIG_ZONE_DMA=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+# CONFIG_EXPERIMENTAL is not set
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+# CONFIG_HAVE_DMA_ATTRS is not set
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+# CONFIG_KMOD is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_DEFAULT_AS is not set
+CONFIG_DEFAULT_DEADLINE=y
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="deadline"
+CONFIG_CLASSIC_RCU=y
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+CONFIG_ARCH_INTEGRATOR=y
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_CO285 is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_DOVE is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_MSM7X00A is not set
+
+#
+# Marvell Tahoe Options
+#
+# CONFIG_ARCH_TAHOE_AXI is not set
+# CONFIG_ARCH_TAHOE_AHB is not set
+CONFIG_ARCH_DOVENB_ON_TAHOE_AXI=y
+
+#
+# Integrator Options
+#
+CONFIG_ARCH_INTEGRATOR_AP=y
+# CONFIG_ARCH_INTEGRATOR_CP is not set
+# CONFIG_INTEGRATOR_IMPD1 is not set
+
+#
+# Boot options
+#
+
+#
+# Power management
+#
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+# CONFIG_CPU_ARM720T is not set
+# CONFIG_CPU_ARM920T is not set
+# CONFIG_CPU_ARM922T is not set
+# CONFIG_CPU_ARM926T is not set
+# CONFIG_CPU_ARM1020 is not set
+# CONFIG_CPU_ARM1022 is not set
+# CONFIG_CPU_ARM1026 is not set
+CONFIG_CPU_V6=y
+CONFIG_CPU_32v6K=y
+# CONFIG_CPU_V7 is not set
+CONFIG_CPU_32v6=y
+CONFIG_CPU_ABRT_EV6=y
+CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_CACHE_V6=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V6=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_OUTER_CACHE=y
+CONFIG_CACHE_TAUROS2=y
+CONFIG_MRV_PTE_IN_L2=y
+CONFIG_ICST525=y
+
+#
+# Bus support
+#
+CONFIG_ARM_AMBA=y
+CONFIG_PCI=y
+CONFIG_PCI_SYSCALL=y
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_PCI_LEGACY=y
+# CONFIG_PCI_DEBUG is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+# CONFIG_TICK_ONESHOT is not set
+# CONFIG_NO_IDLE_HZ is not set
+CONFIG_HZ=100
+CONFIG_AEABI=y
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_LEDS is not set
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="root=/dev/nfs nfsroot=10.1.69.3:/work/nfsroot ip=dhcp console=ttyAMA0 mem=128M"
+# CONFIG_XIP_KERNEL is not set
+
+#
+# CPU Frequency scaling
+#
+# CONFIG_CPU_FREQ is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_VFP=y
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_ARM_INTEGRATOR=y
+# CONFIG_MTD_INTEL_VR_NOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=2
+CONFIG_BLK_DEV_RAM_SIZE=65536
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_PHANTOM is not set
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_SGI_IOC4 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+
+#
+# A new alternative FireWire stack is available with EXPERIMENTAL=y
+#
+# CONFIG_IEEE1394 is not set
+# CONFIG_I2O is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_ARCNET is not set
+# CONFIG_PHYLIB is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_AX88796 is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_CASSINI is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+CONFIG_NET_PCI=y
+# CONFIG_PCNET32 is not set
+# CONFIG_AMD8111_ETH is not set
+# CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_B44 is not set
+# CONFIG_FORCEDETH is not set
+CONFIG_EEPRO100=y
+# CONFIG_E100 is not set
+# CONFIG_FEALNX is not set
+# CONFIG_NATSEMI is not set
+CONFIG_NE2K_PCI=y
+CONFIG_8139TOO=y
+CONFIG_8139TOO_PIO=y
+# CONFIG_8139TOO_TUNE_TWISTER is not set
+# CONFIG_8139TOO_8129 is not set
+# CONFIG_8139_OLD_RX_RESET is not set
+# CONFIG_R6040 is not set
+# CONFIG_SIS900 is not set
+# CONFIG_EPIC100 is not set
+# CONFIG_SUNDANCE is not set
+# CONFIG_TLAN is not set
+# CONFIG_VIA_RHINE is not set
+CONFIG_NETDEV_1000=y
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_E1000E is not set
+# CONFIG_E1000E_ENABLED is not set
+# CONFIG_IGB is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SKY2 is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+# CONFIG_QLA3XXX is not set
+CONFIG_NETDEV_10000=y
+# CONFIG_CHELSIO_T1 is not set
+# CONFIG_CHELSIO_T3 is not set
+# CONFIG_IXGBE is not set
+# CONFIG_IXGB is not set
+# CONFIG_S2IO is not set
+# CONFIG_MYRI10GE is not set
+# CONFIG_NETXEN_NIC is not set
+# CONFIG_NIU is not set
+# CONFIG_MLX4_CORE is not set
+# CONFIG_TEHUTI is not set
+# CONFIG_BNX2X is not set
+# CONFIG_SFC is not set
+# CONFIG_TR is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=y
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+CONFIG_MOUSE_PS2_LIFEBOOK=y
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+# CONFIG_SERIO_SERPORT is not set
+CONFIG_SERIO_AMBAKMI=y
+# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_AMBA_PL010=y
+CONFIG_SERIAL_AMBA_PL010_CONSOLE=y
+CONFIG_SERIAL_AMBA_PL011=y
+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=16
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=m
+# CONFIG_NVRAM is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_RAW_DRIVER is not set
+CONFIG_DEVPORT=y
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_WATCHDOG is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_PASIC3 is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+CONFIG_FB_DOVE_CONSISTENT_DMA_SIZE=46
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_CIRRUS is not set
+# CONFIG_FB_PM2 is not set
+CONFIG_FB_DOVE_CLCD=y
+# CONFIG_FB_DOVE_QVGA_LCD_PANEL is not set
+# CONFIG_FB_DOVE_VGA_LCD_PANEL is not set
+CONFIG_FB_DOVE_DB_VGA_SCREEN=y
+# CONFIG_FB_DOVE_DB_LCD_PANEL is not set
+CONFIG_FB_DOVE_CLCD_FLAREON_GV=y
+CONFIG_FB_DOVE_CLCD_SCLK_DIV=10
+# CONFIG_FB_DOVE_CLCD_PORTB is not set
+CONFIG_FB_DOVE_DCON=y
+CONFIG_FB_DOVE_CLCD_DCONA_NONE=y
+# CONFIG_FB_DOVE_CLCD_DCONA_BYPASS is not set
+# CONFIG_FB_DOVE_CLCD_DCONA_OLPC is not set
+# CONFIG_FB_DOVE_CLCD_DCONA_DUALVIEW is not set
+# CONFIG_FB_DOVE_CLCD_DCONA_MODE is not set
+CONFIG_FB_DOVE_CLCD_DCONB_NONE=y
+# CONFIG_FB_DOVE_CLCD_DCONB_BYPASS1 is not set
+# CONFIG_FB_DOVE_CLCD_DCONB_BYPASS0 is not set
+# CONFIG_FB_ARMCLCD is not set
+# CONFIG_FB_CYBER2000 is not set
+# CONFIG_FB_ASILIANT is not set
+# CONFIG_FB_IMSTT is not set
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_NVIDIA is not set
+# CONFIG_FB_RIVA is not set
+# CONFIG_FB_MATROX is not set
+# CONFIG_FB_RADEON is not set
+# CONFIG_FB_ATY128 is not set
+# CONFIG_FB_ATY is not set
+# CONFIG_FB_S3 is not set
+# CONFIG_FB_SIS is not set
+# CONFIG_FB_NEOMAGIC is not set
+# CONFIG_FB_KYRO is not set
+# CONFIG_FB_3DFX is not set
+# CONFIG_FB_VOODOO1 is not set
+# CONFIG_FB_VT8623 is not set
+# CONFIG_FB_TRIDENT is not set
+# CONFIG_FB_ARK is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+CONFIG_FONTS=y
+CONFIG_FONT_8x8=y
+# CONFIG_FONT_8x16 is not set
+# CONFIG_FONT_6x11 is not set
+# CONFIG_FONT_7x14 is not set
+# CONFIG_FONT_PEARL_8x8 is not set
+# CONFIG_FONT_ACORN_8x8 is not set
+# CONFIG_FONT_MINI_4x6 is not set
+# CONFIG_FONT_SUN8x16 is not set
+# CONFIG_FONT_SUN12x22 is not set
+# CONFIG_FONT_10x18 is not set
+CONFIG_LOGO=y
+CONFIG_LOGO_LINUX_MONO=y
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LOGO_LINUX_CLUT224=y
+
+#
+# Sound
+#
+CONFIG_SOUND=y
+
+#
+# Advanced Linux Sound Architecture
+#
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+CONFIG_SND_HWDEP=y
+CONFIG_SND_RAWMIDI=y
+# CONFIG_SND_SEQUENCER is not set
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=y
+CONFIG_SND_PCM_OSS=y
+CONFIG_SND_PCM_OSS_PLUGINS=y
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+
+#
+# Generic devices
+#
+CONFIG_SND_MPU401_UART=y
+CONFIG_SND_OPL3_LIB=y
+CONFIG_SND_DUMMY=y
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+
+#
+# PCI devices
+#
+# CONFIG_SND_AD1889 is not set
+# CONFIG_SND_ALS300 is not set
+# CONFIG_SND_ALI5451 is not set
+# CONFIG_SND_ATIIXP is not set
+# CONFIG_SND_ATIIXP_MODEM is not set
+# CONFIG_SND_AU8810 is not set
+# CONFIG_SND_AU8820 is not set
+# CONFIG_SND_AU8830 is not set
+# CONFIG_SND_AW2 is not set
+# CONFIG_SND_BT87X is not set
+# CONFIG_SND_CA0106 is not set
+CONFIG_SND_CMIPCI=y
+# CONFIG_SND_OXYGEN is not set
+# CONFIG_SND_CS4281 is not set
+# CONFIG_SND_CS46XX is not set
+# CONFIG_SND_DARLA20 is not set
+# CONFIG_SND_GINA20 is not set
+# CONFIG_SND_LAYLA20 is not set
+# CONFIG_SND_DARLA24 is not set
+# CONFIG_SND_GINA24 is not set
+# CONFIG_SND_LAYLA24 is not set
+# CONFIG_SND_MONA is not set
+# CONFIG_SND_MIA is not set
+# CONFIG_SND_ECHO3G is not set
+# CONFIG_SND_INDIGO is not set
+# CONFIG_SND_INDIGOIO is not set
+# CONFIG_SND_INDIGODJ is not set
+# CONFIG_SND_EMU10K1 is not set
+# CONFIG_SND_EMU10K1X is not set
+# CONFIG_SND_ENS1370 is not set
+# CONFIG_SND_ENS1371 is not set
+# CONFIG_SND_ES1938 is not set
+# CONFIG_SND_ES1968 is not set
+# CONFIG_SND_FM801 is not set
+# CONFIG_SND_HDA_INTEL is not set
+# CONFIG_SND_HDSP is not set
+# CONFIG_SND_HDSPM is not set
+# CONFIG_SND_HIFIER is not set
+# CONFIG_SND_ICE1712 is not set
+# CONFIG_SND_ICE1724 is not set
+# CONFIG_SND_INTEL8X0 is not set
+# CONFIG_SND_INTEL8X0M is not set
+# CONFIG_SND_KORG1212 is not set
+# CONFIG_SND_MAESTRO3 is not set
+# CONFIG_SND_MIXART is not set
+# CONFIG_SND_NM256 is not set
+# CONFIG_SND_PCXHR is not set
+# CONFIG_SND_RIPTIDE is not set
+# CONFIG_SND_RME32 is not set
+# CONFIG_SND_RME96 is not set
+# CONFIG_SND_RME9652 is not set
+# CONFIG_SND_SONICVIBES is not set
+# CONFIG_SND_TRIDENT is not set
+# CONFIG_SND_VIA82XX is not set
+# CONFIG_SND_VIA82XX_MODEM is not set
+# CONFIG_SND_VIRTUOSO is not set
+# CONFIG_SND_VX222 is not set
+# CONFIG_SND_YMFPCI is not set
+
+#
+# ALSA ARM devices
+#
+# CONFIG_SND_ARMAACI is not set
+
+#
+# System on Chip audio support
+#
+# CONFIG_SND_SOC is not set
+
+#
+# ALSA SoC audio for Freescale SOCs
+#
+
+#
+# SoC Audio for the Texas Instruments OMAP
+#
+
+#
+# SoC Audio for the Marvell SoC's
+#
+
+#
+# Open Sound System
+#
+# CONFIG_SOUND_PRIME is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+CONFIG_HID_DEBUG=y
+# CONFIG_HIDRAW is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_NEW_LEDS is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+CONFIG_UIO=y
+# CONFIG_UIO_CIF is not set
+# CONFIG_UIO_SMX is not set
+CONFIG_UIO_DOVE_VMETA=y
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+# CONFIG_MSDOS_FS is not set
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_JFFS2_FS is not set
+CONFIG_CRAMFS=y
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SAMPLES is not set
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_LL is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_MANAGER is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_PCBC is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_CRYPTO_DEV_HIFN_795X is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
+# CONFIG_GENERIC_FIND_NEXT_BIT is not set
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
--- linux-mvl-dove-2.6.32.orig/arch/arm/configs/dove_hal_defconfig
+++ linux-mvl-dove-2.6.32/arch/arm/configs/dove_hal_defconfig
@@ -0,0 +1,2466 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.30-dove-3.1.0-rc1
+# Thu Jul 30 13:08:43 2009
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_MMU=y
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_OPROFILE_MRVL_PJ4=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_PCI_QUIRKS=y
+CONFIG_COMPAT_BRK=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+CONFIG_PROFILING=y
+CONFIG_TRACEPOINTS=y
+# CONFIG_MARKERS is not set
+CONFIG_OPROFILE=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_KPROBES=y
+CONFIG_KRETPROBES=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+CONFIG_FREEZER=y
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+CONFIG_ARCH_DOVE=y
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_W90X900 is not set
+CONFIG_MV_HAL_RULES_PATH="arch/arm/mach-dove/mv_hal_support/mvRules.mk"
+
+#
+# Marvell Dove Implementations
+#
+# CONFIG_DOVE_REV_Z0 is not set
+CONFIG_DOVE_REV_Y0=y
+# CONFIG_MACH_DOVE_RD_AVNG is not set
+# CONFIG_MACH_DOVE_RD is not set
+CONFIG_MACH_DOVE_DB=y
+CONFIG_MV_HAL_DRIVERS_SUPPORT=y
+CONFIG_DOVE_PM_SUPPORT=y
+
+#
+# Orion SoC options
+#
+# CONFIG_MV_INCLUDE_IDMA is not set
+CONFIG_MV_INCLUDE_USB=y
+CONFIG_MV_INCLUDE_XOR=y
+CONFIG_MV_INCLUDE_CESA=y
+CONFIG_MV_INCLUDE_GIG_ETH=y
+CONFIG_MV_INCLUDE_AUDIO=y
+CONFIG_MV_INCLUDE_INTEG_SATA=y
+CONFIG_MV_INCLUDE_PMU=y
+CONFIG_MV_INCLUDE_NFC=y
+CONFIG_MV_DDRMMC=y
+
+#
+# Soc DMA accelerations
+#
+CONFIG_MV_USE_XOR_ENGINE=y
+CONFIG_MV_RAID5_XOR_OFFLOAD=y
+# CONFIG_MV_XORMEMCOPY is not set
+# CONFIG_MV_XORMEMZERO is not set
+# CONFIG_MV_USE_XOR_FOR_COPY_USER_BUFFERS is not set
+CONFIG_USE_TWO_ENGINES=y
+# CONFIG_USE_FOUR_ENGINES is not set
+
+#
+# SoC Networking support
+#
+CONFIG_MV_ETHERNET=y
+CONFIG_MV_ETH_PORTS_NUM=1
+
+#
+# Network Interface Configuration
+#
+CONFIG_MV_ETH_0_MTU=1500
+CONFIG_MV_ETH_0_MACADDR=""
+
+#
+# Rx/Tx Queue Configuration
+#
+CONFIG_MV_ETH_RX_Q_NUM=1
+CONFIG_MV_ETH_TX_Q_NUM=1
+CONFIG_MV_ETH_NUM_OF_RX_DESCR=128
+CONFIG_MV_ETH_NUM_OF_TX_DESCR=532
+
+#
+# TCP/UDP Offloading
+#
+CONFIG_MV_ETH_TSO=y
+# CONFIG_MV_ETH_UFO is not set
+# CONFIG_MV_ETH_INET_LRO is not set
+
+#
+# Control and Statistics
+#
+CONFIG_MV_ETH_PROC=y
+CONFIG_MV_ETH_STATS_ERROR=y
+CONFIG_MV_ETH_STATS_INFO=y
+# CONFIG_MV_ETH_STATS_DEBUG is not set
+# CONFIG_MV_LINUX_COUNTERS_DISABLE is not set
+
+#
+# Advanced Features
+#
+CONFIG_MV_ETH_TIMER_PERIOD=1000
+CONFIG_MV_SKB_HEADROOM=16
+CONFIG_MV_SKB_REUSE=y
+# CONFIG_MV_ETH_NFP is not set
+# CONFIG_MV_GATEWAY is not set
+
+#
+# cesa options
+#
+CONFIG_MV_CESA=y
+CONFIG_MV_CESA_OCF=y
+CONFIG_MV_CESA_TOOL=y
+CONFIG_SCSI_MVSATA=y
+
+#
+# Sata options
+#
+# CONFIG_MV_SATA_SUPPORT_ATAPI is not set
+# CONFIG_MV_SATA_ENABLE_1MB_IOS is not set
+# CONFIG_SATA_NO_DEBUG is not set
+CONFIG_SATA_DEBUG_ON_ERROR=y
+# CONFIG_SATA_FULL_DEBUG is not set
+
+#
+# Marvell Key driver
+#
+CONFIG_MV_GPIO_KEY=y
+CONFIG_MV_TOUCH_KEY=y
+CONFIG_MV_TOUCH_SLIDER=y
+# CONFIG_MV_DBG_TRACE is not set
+CONFIG_PLAT_ORION=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+# CONFIG_CPU_V6 is not set
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_V7=y
+CONFIG_CPU_32v7=y
+CONFIG_CPU_PJ4=y
+CONFIG_CPU_ABRT_EV7=y
+CONFIG_CPU_PABRT_IFAR=y
+CONFIG_CPU_CACHE_V7=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V7=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_ARM_THUMBEE is not set
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_HAS_TLS_REG=y
+CONFIG_OUTER_CACHE=y
+CONFIG_CACHE_TAUROS2=y
+# CONFIG_MRV_PTE_IN_L2 is not set
+CONFIG_CACHE_L2LINEFILL_BURST8_ENABLE=y
+CONFIG_MV_L2_WA_ON=y
+CONFIG_MV_L2_PREFETCH_OFF=y
+# CONFIG_CPU_PJ4_PMC_ACCESS_IN_USERMODE is not set
+CONFIG_DOVE_DEBUGGER_MODE_V6=y
+CONFIG_CPU_ENABLE_WRITECO=y
+CONFIG_CPU_WRITECO_CYCLE=3
+# CONFIG_CPU_WA_DISABLE is not set
+CONFIG_CPU_WA_ENABLE=y
+# CONFIG_CPU_L1WAONLY_ENABLE is not set
+CONFIG_IWMMXT=y
+# CONFIG_ARM_ERRATA_430973 is not set
+# CONFIG_ARM_ERRATA_458693 is not set
+# CONFIG_ARM_ERRATA_460075 is not set
+CONFIG_COMMON_CLKDEV=y
+CONFIG_FORCE_MAX_ZONEORDER=12
+
+#
+# Bus support
+#
+CONFIG_PCI=y
+CONFIG_PCI_SYSCALL=y
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_PCI_LEGACY=y
+# CONFIG_PCI_DEBUG is not set
+# CONFIG_PCI_STUB is not set
+# CONFIG_PCI_IOV is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=100
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+# CONFIG_ARCH_HAS_HOLES_MEMORYMODEL is not set
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
+CONFIG_HAVE_MLOCK=y
+CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE=""
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_FREQ is not set
+CONFIG_CPU_IDLE=y
+CONFIG_CPU_IDLE_GOV_LADDER=y
+CONFIG_CPU_IDLE_GOV_MENU=y
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+# CONFIG_FPE_NWFPE is not set
+# CONFIG_FPE_FASTFPE is not set
+CONFIG_VFP=y
+CONFIG_VFPv3=y
+# CONFIG_NEON is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+CONFIG_APM_EMULATION=y
+CONFIG_APM_EMU_DS2782=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+CONFIG_INET_LRO=y
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+CONFIG_NET_PKTGEN=m
+# CONFIG_NET_TCPPROBE is not set
+# CONFIG_NET_DROP_MONITOR is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+CONFIG_BT=m
+CONFIG_BT_L2CAP=m
+# CONFIG_BT_SCO is not set
+# CONFIG_BT_RFCOMM is not set
+CONFIG_BT_BNEP=m
+# CONFIG_BT_BNEP_MC_FILTER is not set
+# CONFIG_BT_BNEP_PROTO_FILTER is not set
+CONFIG_BT_HIDP=m
+
+#
+# Bluetooth device drivers
+#
+# CONFIG_BT_HCIBTUSB is not set
+# CONFIG_BT_HCIBTSDIO is not set
+# CONFIG_BT_HCIUART is not set
+# CONFIG_BT_HCIBCM203X is not set
+# CONFIG_BT_HCIBPA10X is not set
+# CONFIG_BT_HCIBFUSB is not set
+# CONFIG_BT_HCIVHCI is not set
+# CONFIG_AF_RXRPC is not set
+CONFIG_WIRELESS=y
+# CONFIG_CFG80211 is not set
+CONFIG_WIRELESS_OLD_REGULATORY=y
+CONFIG_WIRELESS_EXT=y
+CONFIG_WIRELESS_EXT_SYSFS=y
+CONFIG_LIB80211=y
+# CONFIG_LIB80211_DEBUG is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+CONFIG_MTD_CFI_GEOMETRY=y
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_OTP is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+CONFIG_MTD_CFI_STAA=y
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_IMPA7 is not set
+# CONFIG_MTD_INTEL_VR_NOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_DATAFLASH is not set
+CONFIG_MTD_M25P80=y
+CONFIG_M25PXX_USE_FAST_READ=y
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_VERIFY_WRITE=y
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+# CONFIG_MTD_NAND_GPIO is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_CAFE is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
+# CONFIG_MTD_NAND_ORION is not set
+CONFIG_MTD_NAND_DOVE=y
+CONFIG_MTD_NAND_HAL_DOVE=y
+# CONFIG_MV_MTD_GANG_MODE is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_MTD_UBI_BEB_RESERVE=1
+# CONFIG_MTD_UBI_GLUEBI is not set
+
+#
+# UBI debugging options
+#
+# CONFIG_MTD_UBI_DEBUG is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=1
+CONFIG_BLK_DEV_RAM_SIZE=4096
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MG_DISK is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_SCSI_PROC_FS is not set
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+CONFIG_BLK_DEV_SR=m
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+CONFIG_CHR_DEV_SG=m
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_AIC94XX is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_SCSI_ARCMSR is not set
+# CONFIG_MEGARAID_NEWGEN is not set
+# CONFIG_MEGARAID_LEGACY is not set
+# CONFIG_MEGARAID_SAS is not set
+# CONFIG_SCSI_MPT2SAS is not set
+# CONFIG_SCSI_HPTIOP is not set
+# CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
+# CONFIG_FCOE is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_MVSAS is not set
+# CONFIG_SCSI_STEX is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
+# CONFIG_SCSI_IPR is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_QLA_FC is not set
+# CONFIG_SCSI_QLA_ISCSI is not set
+# CONFIG_SCSI_LPFC is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_NSP32 is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_SRP is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+CONFIG_ATA=y
+# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_SATA_PMP=y
+# CONFIG_SATA_AHCI is not set
+# CONFIG_SATA_SIL24 is not set
+CONFIG_ATA_SFF=y
+# CONFIG_SATA_SVW is not set
+# CONFIG_ATA_PIIX is not set
+CONFIG_SATA_MV=y
+# CONFIG_SATA_NV is not set
+# CONFIG_PDC_ADMA is not set
+# CONFIG_SATA_QSTOR is not set
+# CONFIG_SATA_PROMISE is not set
+# CONFIG_SATA_SX4 is not set
+# CONFIG_SATA_SIL is not set
+# CONFIG_SATA_SIS is not set
+# CONFIG_SATA_ULI is not set
+# CONFIG_SATA_VIA is not set
+# CONFIG_SATA_VITESSE is not set
+# CONFIG_SATA_INIC162X is not set
+# CONFIG_PATA_ALI is not set
+# CONFIG_PATA_AMD is not set
+# CONFIG_PATA_ARTOP is not set
+# CONFIG_PATA_ATIIXP is not set
+# CONFIG_PATA_CMD640_PCI is not set
+# CONFIG_PATA_CMD64X is not set
+# CONFIG_PATA_CS5520 is not set
+# CONFIG_PATA_CS5530 is not set
+# CONFIG_PATA_CYPRESS is not set
+# CONFIG_PATA_EFAR is not set
+# CONFIG_ATA_GENERIC is not set
+# CONFIG_PATA_HPT366 is not set
+# CONFIG_PATA_HPT37X is not set
+# CONFIG_PATA_HPT3X2N is not set
+# CONFIG_PATA_HPT3X3 is not set
+# CONFIG_PATA_IT821X is not set
+# CONFIG_PATA_IT8213 is not set
+# CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_TRIFLEX is not set
+# CONFIG_PATA_MARVELL is not set
+# CONFIG_PATA_MPIIX is not set
+# CONFIG_PATA_OLDPIIX is not set
+# CONFIG_PATA_NETCELL is not set
+# CONFIG_PATA_NINJA32 is not set
+# CONFIG_PATA_NS87410 is not set
+# CONFIG_PATA_NS87415 is not set
+# CONFIG_PATA_OPTI is not set
+# CONFIG_PATA_OPTIDMA is not set
+# CONFIG_PATA_PDC_OLD is not set
+# CONFIG_PATA_RADISYS is not set
+# CONFIG_PATA_RZ1000 is not set
+# CONFIG_PATA_SC1200 is not set
+# CONFIG_PATA_SERVERWORKS is not set
+# CONFIG_PATA_PDC2027X is not set
+# CONFIG_PATA_SIL680 is not set
+# CONFIG_PATA_SIS is not set
+# CONFIG_PATA_VIA is not set
+# CONFIG_PATA_WINBOND is not set
+# CONFIG_PATA_PLATFORM is not set
+# CONFIG_PATA_SCH is not set
+# CONFIG_MD is not set
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+
+#
+# Enable only one of the two stacks, unless you know what you are doing
+#
+# CONFIG_FIREWIRE is not set
+# CONFIG_IEEE1394 is not set
+# CONFIG_I2O is not set
+CONFIG_NETDEVICES=y
+CONFIG_COMPAT_NET_DEV_OPS=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_ARCNET is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_AX88796 is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_CASSINI is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMC911X is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+CONFIG_NET_PCI=y
+# CONFIG_PCNET32 is not set
+# CONFIG_AMD8111_ETH is not set
+# CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_B44 is not set
+# CONFIG_FORCEDETH is not set
+CONFIG_E100=y
+# CONFIG_FEALNX is not set
+# CONFIG_NATSEMI is not set
+# CONFIG_NE2K_PCI is not set
+# CONFIG_8139CP is not set
+# CONFIG_8139TOO is not set
+# CONFIG_R6040 is not set
+# CONFIG_SIS900 is not set
+# CONFIG_EPIC100 is not set
+# CONFIG_SMSC9420 is not set
+# CONFIG_SUNDANCE is not set
+# CONFIG_TLAN is not set
+# CONFIG_VIA_RHINE is not set
+# CONFIG_SC92031 is not set
+# CONFIG_ATL2 is not set
+CONFIG_NETDEV_1000=y
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+CONFIG_E1000=y
+CONFIG_E1000E=y
+# CONFIG_IP1000 is not set
+# CONFIG_IGB is not set
+# CONFIG_IGBVF is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+CONFIG_SKY2=y
+# CONFIG_SKY2_DEBUG is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+CONFIG_MV643XX_ETH=y
+# CONFIG_QLA3XXX is not set
+# CONFIG_ATL1 is not set
+# CONFIG_ATL1E is not set
+# CONFIG_ATL1C is not set
+# CONFIG_JME is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_TR is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+CONFIG_WLAN_80211=y
+# CONFIG_LIBERTAS is not set
+# CONFIG_ATMEL is not set
+# CONFIG_PRISM54 is not set
+# CONFIG_USB_ZD1201 is not set
+# CONFIG_USB_NET_RNDIS_WLAN is not set
+# CONFIG_IPW2100 is not set
+# CONFIG_IPW2200 is not set
+# CONFIG_HOSTAP is not set
+# CONFIG_HERMES is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NET_FC is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+CONFIG_INPUT_POLLDEV=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+# CONFIG_INPUT_APMPOWER is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+CONFIG_KEYBOARD_GPIO=y
+CONFIG_INPUT_MOUSE=y
+# CONFIG_MOUSE_PS2 is not set
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_APPLETOUCH is not set
+# CONFIG_MOUSE_BCM5974 is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+CONFIG_MOUSE_GPIO=y
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_ADS7846=y
+# CONFIG_TOUCHSCREEN_AD7877 is not set
+# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
+# CONFIG_TOUCHSCREEN_AD7879_SPI is not set
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_WM97XX is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+CONFIG_TOUCHSCREEN_TSC2005=y
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
+# CONFIG_TOUCHSCREEN_RT5611 is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+# CONFIG_DEVKMEM is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_NOZOMI is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+# CONFIG_SERIAL_8250_PCI is not set
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=2
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_MAX3100 is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=16
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_DEVPORT=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_HELPER_AUTO=y
+CONFIG_I2C_ALGOBIT=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# PC SMBus host controller drivers
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_ISCH is not set
+# CONFIG_I2C_PIIX4 is not set
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_GPIO is not set
+CONFIG_I2C_MV64XXX=y
+CONFIG_I2C_MV64XXX_PORT_EXPANDER=y
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Graphics adapter I2C/DDC channel drivers
+#
+# CONFIG_I2C_VOODOO3 is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+CONFIG_MAX1535=y
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
+CONFIG_SPI_ORION=y
+CONFIG_SPI_MV=y
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+CONFIG_GPIO_PCA953X=y
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+# CONFIG_GPIO_BT8XX is not set
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
+CONFIG_W1=y
+
+#
+# 1-wire Bus Masters
+#
+# CONFIG_W1_MASTER_MATROX is not set
+# CONFIG_W1_MASTER_DS2490 is not set
+# CONFIG_W1_MASTER_DS2482 is not set
+# CONFIG_W1_MASTER_DS1WM is not set
+# CONFIG_W1_MASTER_GPIO is not set
+
+#
+# 1-wire Slaves
+#
+# CONFIG_W1_SLAVE_THERM is not set
+# CONFIG_W1_SLAVE_SMEM is not set
+# CONFIG_W1_SLAVE_DS2431 is not set
+# CONFIG_W1_SLAVE_DS2433 is not set
+CONFIG_W1_SLAVE_DS2760=y
+# CONFIG_W1_SLAVE_BQ27000 is not set
+CONFIG_POWER_SUPPLY=y
+# CONFIG_POWER_SUPPLY_DEBUG is not set
+# CONFIG_PDA_POWER is not set
+CONFIG_APM_POWER=y
+CONFIG_BATTERY_DS2760=y
+CONFIG_BATTERY_BQ2084=y
+# CONFIG_BATTERY_BQ27x00 is not set
+# CONFIG_BATTERY_DS2782 is not set
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+# CONFIG_SENSORS_AD7414 is not set
+# CONFIG_SENSORS_AD7418 is not set
+# CONFIG_SENSORS_ADCXX is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1029 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7462 is not set
+# CONFIG_SENSORS_ADT7470 is not set
+# CONFIG_SENSORS_ADT7473 is not set
+# CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ATXP1 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_I5K_AMB is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_G760A is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM70 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_LTC4215 is not set
+# CONFIG_SENSORS_LTC4245 is not set
+# CONFIG_SENSORS_LM95241 is not set
+# CONFIG_SENSORS_MAX1111 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_MAX6650 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_SHT15 is not set
+# CONFIG_SENSORS_SIS5595 is not set
+# CONFIG_SENSORS_DME1737 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47M192 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_VIA686A is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_VT8231 is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83791D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83793 is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83L786NG is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_SENSORS_LIS3_SPI is not set
+CONFIG_SENSORS_DOVE=y
+# CONFIG_HWMON_DEBUG_CHIP is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_UCB1400_CORE is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+CONFIG_VIDEO_DEV=y
+CONFIG_VIDEO_V4L2_COMMON=y
+CONFIG_VIDEO_ALLOW_V4L1=y
+CONFIG_VIDEO_V4L1_COMPAT=y
+# CONFIG_DVB_CORE is not set
+CONFIG_VIDEO_MEDIA=y
+
+#
+# Multimedia drivers
+#
+# CONFIG_MEDIA_ATTACH is not set
+CONFIG_MEDIA_TUNER=y
+# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
+CONFIG_MEDIA_TUNER_SIMPLE=y
+CONFIG_MEDIA_TUNER_TDA8290=y
+CONFIG_MEDIA_TUNER_TDA9887=y
+CONFIG_MEDIA_TUNER_TEA5761=y
+CONFIG_MEDIA_TUNER_TEA5767=y
+CONFIG_MEDIA_TUNER_MT20XX=y
+CONFIG_MEDIA_TUNER_XC2028=y
+CONFIG_MEDIA_TUNER_XC5000=y
+CONFIG_MEDIA_TUNER_MC44S803=y
+CONFIG_VIDEO_V4L2=y
+CONFIG_VIDEO_V4L1=y
+CONFIG_VIDEOBUF_GEN=m
+CONFIG_VIDEOBUF_VMALLOC=m
+CONFIG_VIDEO_IR=m
+CONFIG_VIDEO_TVEEPROM=m
+CONFIG_VIDEO_TUNER=m
+CONFIG_VIDEO_CAPTURE_DRIVERS=y
+# CONFIG_VIDEO_ADV_DEBUG is not set
+# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
+# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set
+CONFIG_VIDEO_IR_I2C=m
+
+#
+# Encoders/decoders and other helper chips
+#
+
+#
+# Audio decoders
+#
+# CONFIG_VIDEO_TVAUDIO is not set
+# CONFIG_VIDEO_TDA7432 is not set
+# CONFIG_VIDEO_TDA9840 is not set
+# CONFIG_VIDEO_TDA9875 is not set
+# CONFIG_VIDEO_TEA6415C is not set
+# CONFIG_VIDEO_TEA6420 is not set
+CONFIG_VIDEO_MSP3400=m
+# CONFIG_VIDEO_CS5345 is not set
+CONFIG_VIDEO_CS53L32A=m
+# CONFIG_VIDEO_M52790 is not set
+# CONFIG_VIDEO_TLV320AIC23B is not set
+CONFIG_VIDEO_WM8775=m
+# CONFIG_VIDEO_WM8739 is not set
+# CONFIG_VIDEO_VP27SMPX is not set
+
+#
+# RDS decoders
+#
+# CONFIG_VIDEO_SAA6588 is not set
+
+#
+# Video decoders
+#
+# CONFIG_VIDEO_BT819 is not set
+# CONFIG_VIDEO_BT856 is not set
+# CONFIG_VIDEO_BT866 is not set
+# CONFIG_VIDEO_KS0127 is not set
+CONFIG_VIDEO_OV7670=y
+CONFIG_VIDEO_OV7680=y
+# CONFIG_VIDEO_TCM825X is not set
+# CONFIG_VIDEO_SAA7110 is not set
+CONFIG_VIDEO_SAA711X=m
+# CONFIG_VIDEO_SAA717X is not set
+# CONFIG_VIDEO_SAA7191 is not set
+# CONFIG_VIDEO_TVP514X is not set
+# CONFIG_VIDEO_TVP5150 is not set
+# CONFIG_VIDEO_VPX3220 is not set
+
+#
+# Video and audio decoders
+#
+CONFIG_VIDEO_CX25840=m
+
+#
+# MPEG video encoders
+#
+CONFIG_VIDEO_CX2341X=m
+
+#
+# Video encoders
+#
+# CONFIG_VIDEO_SAA7127 is not set
+# CONFIG_VIDEO_SAA7185 is not set
+# CONFIG_VIDEO_ADV7170 is not set
+# CONFIG_VIDEO_ADV7175 is not set
+
+#
+# Video improvement chips
+#
+# CONFIG_VIDEO_UPD64031A is not set
+# CONFIG_VIDEO_UPD64083 is not set
+# CONFIG_VIDEO_VIVI is not set
+# CONFIG_VIDEO_BT848 is not set
+# CONFIG_VIDEO_CPIA is not set
+# CONFIG_VIDEO_CPIA2 is not set
+# CONFIG_VIDEO_SAA5246A is not set
+# CONFIG_VIDEO_SAA5249 is not set
+# CONFIG_VIDEO_STRADIS is not set
+# CONFIG_VIDEO_ZORAN is not set
+# CONFIG_VIDEO_SAA7134 is not set
+# CONFIG_VIDEO_MXB is not set
+# CONFIG_VIDEO_HEXIUM_ORION is not set
+# CONFIG_VIDEO_HEXIUM_GEMINI is not set
+# CONFIG_VIDEO_CX88 is not set
+# CONFIG_VIDEO_IVTV is not set
+CONFIG_VIDEO_CAFE_CCIC=y
+# CONFIG_SOC_CAMERA is not set
+CONFIG_V4L_USB_DRIVERS=y
+CONFIG_USB_VIDEO_CLASS=m
+CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
+CONFIG_USB_GSPCA=m
+# CONFIG_USB_M5602 is not set
+# CONFIG_USB_STV06XX is not set
+# CONFIG_USB_GSPCA_CONEX is not set
+# CONFIG_USB_GSPCA_ETOMS is not set
+# CONFIG_USB_GSPCA_FINEPIX is not set
+# CONFIG_USB_GSPCA_MARS is not set
+# CONFIG_USB_GSPCA_MR97310A is not set
+# CONFIG_USB_GSPCA_OV519 is not set
+# CONFIG_USB_GSPCA_OV534 is not set
+# CONFIG_USB_GSPCA_PAC207 is not set
+# CONFIG_USB_GSPCA_PAC7311 is not set
+# CONFIG_USB_GSPCA_SONIXB is not set
+# CONFIG_USB_GSPCA_SONIXJ is not set
+# CONFIG_USB_GSPCA_SPCA500 is not set
+# CONFIG_USB_GSPCA_SPCA501 is not set
+# CONFIG_USB_GSPCA_SPCA505 is not set
+# CONFIG_USB_GSPCA_SPCA506 is not set
+# CONFIG_USB_GSPCA_SPCA508 is not set
+# CONFIG_USB_GSPCA_SPCA561 is not set
+# CONFIG_USB_GSPCA_SQ905 is not set
+# CONFIG_USB_GSPCA_SQ905C is not set
+# CONFIG_USB_GSPCA_STK014 is not set
+# CONFIG_USB_GSPCA_SUNPLUS is not set
+# CONFIG_USB_GSPCA_T613 is not set
+# CONFIG_USB_GSPCA_TV8532 is not set
+# CONFIG_USB_GSPCA_VC032X is not set
+# CONFIG_USB_GSPCA_ZC3XX is not set
+CONFIG_VIDEO_PVRUSB2=m
+CONFIG_VIDEO_PVRUSB2_SYSFS=y
+# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set
+CONFIG_VIDEO_HDPVR=m
+CONFIG_VIDEO_EM28XX=m
+CONFIG_VIDEO_EM28XX_ALSA=m
+CONFIG_VIDEO_CX231XX=m
+CONFIG_VIDEO_CX231XX_ALSA=m
+CONFIG_VIDEO_USBVISION=m
+CONFIG_VIDEO_USBVIDEO=m
+CONFIG_USB_VICAM=m
+CONFIG_USB_IBMCAM=m
+CONFIG_USB_KONICAWC=m
+CONFIG_USB_QUICKCAM_MESSENGER=m
+CONFIG_USB_ET61X251=m
+CONFIG_VIDEO_OVCAMCHIP=m
+CONFIG_USB_W9968CF=m
+CONFIG_USB_OV511=m
+CONFIG_USB_SE401=m
+CONFIG_USB_SN9C102=m
+CONFIG_USB_STV680=m
+CONFIG_USB_ZC0301=m
+CONFIG_USB_PWC=m
+# CONFIG_USB_PWC_DEBUG is not set
+CONFIG_USB_PWC_INPUT_EVDEV=y
+CONFIG_USB_ZR364XX=m
+CONFIG_USB_STKWEBCAM=m
+CONFIG_USB_S2255=m
+# CONFIG_RADIO_ADAPTERS is not set
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_DOVE_GPU=y
+CONFIG_DOVE_GPU_MEM_SIZE=128
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+CONFIG_FB_DDC=y
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+CONFIG_FB_MODE_HELPERS=y
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_CIRRUS is not set
+# CONFIG_FB_PM2 is not set
+# CONFIG_FB_CYBER2000 is not set
+# CONFIG_FB_ASILIANT is not set
+# CONFIG_FB_IMSTT is not set
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_NVIDIA is not set
+# CONFIG_FB_RIVA is not set
+# CONFIG_FB_MATROX is not set
+# CONFIG_FB_RADEON is not set
+# CONFIG_FB_ATY128 is not set
+# CONFIG_FB_ATY is not set
+# CONFIG_FB_S3 is not set
+# CONFIG_FB_SAVAGE is not set
+# CONFIG_FB_SIS is not set
+# CONFIG_FB_VIA is not set
+# CONFIG_FB_NEOMAGIC is not set
+# CONFIG_FB_KYRO is not set
+# CONFIG_FB_3DFX is not set
+# CONFIG_FB_VOODOO1 is not set
+# CONFIG_FB_VT8623 is not set
+# CONFIG_FB_TRIDENT is not set
+# CONFIG_FB_ARK is not set
+# CONFIG_FB_PM3 is not set
+# CONFIG_FB_CARMINE is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+# CONFIG_FB_BROADSHEET is not set
+CONFIG_FB_DOVE=y
+CONFIG_FB_DOVE_CONSISTENT_DMA_SIZE=14
+CONFIG_FB_DOVE_CLCD=y
+CONFIG_FB_DOVE_CLCD1=y
+CONFIG_FB_DOVE_CLCD_EDID=y
+CONFIG_FB_DOVE_DCON=y
+CONFIG_FB_DOVE_CLCD_DCONA_BYPASS=y
+# CONFIG_FB_DOVE_CLCD_DCONA_OLPC is not set
+# CONFIG_FB_DOVE_CLCD_DCONA_DUALVIEW is not set
+# CONFIG_FB_DOVE_CLCD_DCONA_MODE is not set
+CONFIG_FB_DOVE_CLCD_DCONB_BYPASS1=y
+# CONFIG_FB_DOVE_CLCD_DCONB_BYPASS0 is not set
+
+#
+# DOVE LCD clock source
+#
+CONFIG_FB_DOVE_CLCD_USE_PLL_CLK=y
+CONFIG_FB_DOVE_CLCD_SCLK_VALUE=400
+CONFIG_FB_DOVE_CLCD_DEFAULT_OPTION="lcd0:1280x768-24@60,lcd1:1024x768-16@60"
+# CONFIG_FB_DOVE_CLCD_FLAREON_GV is not set
+# CONFIG_FB_MUSTANG_CLCD is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_LCD_CLASS_DEVICE=y
+# CONFIG_LCD_LTV350QV is not set
+# CONFIG_LCD_ILI9320 is not set
+# CONFIG_LCD_TDO24M is not set
+# CONFIG_LCD_VGG2432A4 is not set
+# CONFIG_LCD_PLATFORM is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_GENERIC=y
+CONFIG_BACKLIGHT_DOVE=y
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_LOGO_LINUX_CLUT224=y
+CONFIG_SOUND=y
+CONFIG_SOUND_OSS_CORE=y
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+CONFIG_SND_HWDEP=m
+CONFIG_SND_RAWMIDI=m
+CONFIG_SND_JACK=y
+# CONFIG_SND_SEQUENCER is not set
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=m
+CONFIG_SND_PCM_OSS=m
+CONFIG_SND_PCM_OSS_PLUGINS=y
+# CONFIG_SND_HRTIMER is not set
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+CONFIG_SND_VMASTER=y
+CONFIG_SND_AC97_CODEC=y
+CONFIG_SND_DRIVERS=y
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+# CONFIG_SND_AC97_POWER_SAVE is not set
+CONFIG_SND_PCI=y
+# CONFIG_SND_AD1889 is not set
+# CONFIG_SND_ALS300 is not set
+# CONFIG_SND_ALI5451 is not set
+# CONFIG_SND_ATIIXP is not set
+# CONFIG_SND_ATIIXP_MODEM is not set
+# CONFIG_SND_AU8810 is not set
+# CONFIG_SND_AU8820 is not set
+# CONFIG_SND_AU8830 is not set
+# CONFIG_SND_AW2 is not set
+# CONFIG_SND_AZT3328 is not set
+# CONFIG_SND_BT87X is not set
+# CONFIG_SND_CA0106 is not set
+# CONFIG_SND_CMIPCI is not set
+# CONFIG_SND_OXYGEN is not set
+# CONFIG_SND_CS4281 is not set
+# CONFIG_SND_CS46XX is not set
+# CONFIG_SND_DARLA20 is not set
+# CONFIG_SND_GINA20 is not set
+# CONFIG_SND_LAYLA20 is not set
+# CONFIG_SND_DARLA24 is not set
+# CONFIG_SND_GINA24 is not set
+# CONFIG_SND_LAYLA24 is not set
+# CONFIG_SND_MONA is not set
+# CONFIG_SND_MIA is not set
+# CONFIG_SND_ECHO3G is not set
+# CONFIG_SND_INDIGO is not set
+# CONFIG_SND_INDIGOIO is not set
+# CONFIG_SND_INDIGODJ is not set
+# CONFIG_SND_INDIGOIOX is not set
+# CONFIG_SND_INDIGODJX is not set
+# CONFIG_SND_EMU10K1 is not set
+# CONFIG_SND_EMU10K1X is not set
+# CONFIG_SND_ENS1370 is not set
+# CONFIG_SND_ENS1371 is not set
+# CONFIG_SND_ES1938 is not set
+# CONFIG_SND_ES1968 is not set
+# CONFIG_SND_FM801 is not set
+# CONFIG_SND_HDA_INTEL is not set
+# CONFIG_SND_HDSP is not set
+# CONFIG_SND_HDSPM is not set
+# CONFIG_SND_HIFIER is not set
+# CONFIG_SND_ICE1712 is not set
+# CONFIG_SND_ICE1724 is not set
+# CONFIG_SND_INTEL8X0 is not set
+# CONFIG_SND_INTEL8X0M is not set
+# CONFIG_SND_KORG1212 is not set
+# CONFIG_SND_MAESTRO3 is not set
+# CONFIG_SND_MIXART is not set
+# CONFIG_SND_NM256 is not set
+# CONFIG_SND_PCXHR is not set
+# CONFIG_SND_RIPTIDE is not set
+# CONFIG_SND_RME32 is not set
+# CONFIG_SND_RME96 is not set
+# CONFIG_SND_RME9652 is not set
+# CONFIG_SND_SONICVIBES is not set
+# CONFIG_SND_TRIDENT is not set
+# CONFIG_SND_VIA82XX is not set
+# CONFIG_SND_VIA82XX_MODEM is not set
+# CONFIG_SND_VIRTUOSO is not set
+# CONFIG_SND_VX222 is not set
+# CONFIG_SND_YMFPCI is not set
+CONFIG_SND_ARM=y
+CONFIG_SND_PXA2XX_LIB=y
+CONFIG_SND_PXA2XX_LIB_AC97=y
+# CONFIG_SND_MRVL_AUDIO is not set
+CONFIG_SND_SPI=y
+CONFIG_SND_USB=y
+CONFIG_SND_USB_AUDIO=m
+CONFIG_SND_USB_CAIAQ=m
+CONFIG_SND_USB_CAIAQ_INPUT=y
+CONFIG_SND_SOC=y
+CONFIG_SND_SOC_AC97_BUS=y
+CONFIG_SND_PXA2XX_SOC=y
+CONFIG_SND_PXA2XX_SOC_AC97=y
+CONFIG_SND_PXA2XX_SOC_AC97_SURROUND=y
+
+#
+# SoC Audio for the Marvell SoC's
+#
+CONFIG_SND_DOVE_AC97=y
+CONFIG_SND_DOVE_SOC_DB=y
+# CONFIG_SND_DOVE_SOC_AC97_AVD1 is not set
+CONFIG_SND_DOVE_SOC_MRVL_AUDIO=y
+# CONFIG_CODEC_CS42L51 is not set
+CONFIG_CODEC_RT5623=y
+CONFIG_SND_SOC_I2C_AND_SPI=y
+# CONFIG_SND_SOC_ALL_CODECS is not set
+CONFIG_SND_SOC_AD1980=y
+CONFIG_SND_SOC_RT5623=y
+CONFIG_SOUND_PRIME=y
+CONFIG_AC97_BUS=y
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+# CONFIG_HID_PID is not set
+# CONFIG_USB_HIDDEV is not set
+
+#
+# Special HID drivers
+#
+# CONFIG_HID_A4TECH is not set
+# CONFIG_HID_APPLE is not set
+# CONFIG_HID_BELKIN is not set
+# CONFIG_HID_CHERRY is not set
+# CONFIG_HID_CHICONY is not set
+# CONFIG_HID_CYPRESS is not set
+# CONFIG_DRAGONRISE_FF is not set
+# CONFIG_HID_EZKEY is not set
+# CONFIG_HID_KYE is not set
+# CONFIG_HID_GYRATION is not set
+# CONFIG_HID_KENSINGTON is not set
+# CONFIG_HID_LOGITECH is not set
+# CONFIG_HID_MICROSOFT is not set
+# CONFIG_HID_MONTEREY is not set
+# CONFIG_HID_NTRIG is not set
+# CONFIG_HID_PANTHERLORD is not set
+# CONFIG_HID_PETALYNX is not set
+# CONFIG_HID_SAMSUNG is not set
+# CONFIG_HID_SONY is not set
+# CONFIG_HID_SUNPLUS is not set
+# CONFIG_GREENASIA_FF is not set
+# CONFIG_HID_TOPSEED is not set
+# CONFIG_THRUSTMASTER_FF is not set
+# CONFIG_ZEROPLUS_FF is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_SUSPEND is not set
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_MON is not set
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+CONFIG_USB_EHCI_TT_NEWSCHED=y
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_OHCI_HCD is not set
+# CONFIG_USB_UHCI_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_WHCI_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+# CONFIG_USB_MUSB_HDRC is not set
+# CONFIG_USB_GADGET_MUSB_HDRC is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+CONFIG_USB_PRINTER=y
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+CONFIG_USB_STORAGE_DATAFAB=y
+CONFIG_USB_STORAGE_FREECOM=y
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+CONFIG_USB_STORAGE_SDDR09=y
+CONFIG_USB_STORAGE_SDDR55=y
+CONFIG_USB_STORAGE_JUMPSHOT=y
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+CONFIG_USB_TEST=m
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+# CONFIG_USB_GADGET_DEBUG_FS is not set
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_PXA25X is not set
+# CONFIG_USB_GADGET_PXA27X is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_IMX is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_FSL_QE is not set
+# CONFIG_USB_GADGET_CI13XXX is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+CONFIG_USB_GADGET_MRVL=y
+CONFIG_USB_MRVL=y
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+# CONFIG_USB_ZERO is not set
+# CONFIG_USB_ETH is not set
+# CONFIG_USB_GADGETFS is not set
+CONFIG_USB_FILE_STORAGE=m
+# CONFIG_USB_FILE_STORAGE_TEST is not set
+# CONFIG_USB_G_SERIAL is not set
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+# CONFIG_USB_CDC_COMPOSITE is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_NOP_USB_XCEIV is not set
+# CONFIG_UWB is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+CONFIG_MMC_SDHCI=y
+# CONFIG_MMC_SDHCI_PCI is not set
+CONFIG_MMC_SDHCI_MV=y
+# CONFIG_MMC_TIFM_SD is not set
+# CONFIG_MMC_MVSDIO is not set
+# CONFIG_MMC_SPI is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_NEW_LEDS=y
+# CONFIG_LEDS_CLASS is not set
+
+#
+# LED drivers
+#
+
+#
+# LED Triggers
+#
+# CONFIG_LEDS_TRIGGERS is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_MV=y
+CONFIG_DMADEVICES=y
+
+#
+# DMA Devices
+#
+CONFIG_MV_XOR=y
+CONFIG_DMA_ENGINE=y
+
+#
+# DMA Clients
+#
+# CONFIG_NET_DMA is not set
+# CONFIG_ASYNC_TX_DMA is not set
+# CONFIG_DMATEST is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_REGULATOR is not set
+CONFIG_UIO=y
+# CONFIG_UIO_CIF is not set
+CONFIG_UIO_PDRV=y
+# CONFIG_UIO_PDRV_GENIRQ is not set
+# CONFIG_UIO_SMX is not set
+# CONFIG_UIO_AEC is not set
+# CONFIG_UIO_SERCOS3 is not set
+CONFIG_UIO_DOVE_VMETA=y
+CONFIG_UIO_DOVE_VMETA_MEM_SIZE=96
+CONFIG_VMETA_NEW=y
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+# CONFIG_EXT3_FS_XATTR is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_XFS_FS=m
+# CONFIG_XFS_QUOTA is not set
+# CONFIG_XFS_POSIX_ACL is not set
+# CONFIG_XFS_RT is not set
+# CONFIG_XFS_DEBUG is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=y
+CONFIG_JOLIET=y
+# CONFIG_ZISOFS is not set
+CONFIG_UDF_FS=m
+CONFIG_UDF_NLS=y
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+CONFIG_UBIFS_FS=y
+# CONFIG_UBIFS_FS_XATTR is not set
+# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
+CONFIG_UBIFS_FS_LZO=y
+CONFIG_UBIFS_FS_ZLIB=y
+# CONFIG_UBIFS_FS_DEBUG is not set
+CONFIG_CRAMFS=y
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=m
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+CONFIG_NLS_CODEPAGE_850=y
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_ISO8859_2=y
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=y
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_SCHEDSTATS is not set
+CONFIG_TIMER_STATS=y
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+CONFIG_STACKTRACE=y
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_KPROBES_SANITY_TEST is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_LKDTM is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+# CONFIG_PAGE_POISONING is not set
+CONFIG_NOP_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_RING_BUFFER=y
+CONFIG_TRACING=y
+CONFIG_TRACING_SUPPORT=y
+
+#
+# Tracers
+#
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_FTRACE_STARTUP_TEST is not set
+# CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_ARM_UNWIND=y
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_LL is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_GF128MUL is not set
+CONFIG_CRYPTO_NULL=y
+CONFIG_CRYPTO_WORKQUEUE=y
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=m
+# CONFIG_CRYPTO_LRW is not set
+CONFIG_CRYPTO_PCBC=m
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+CONFIG_CRYPTO_HMAC=y
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+CONFIG_CRYPTO_CRC32C=y
+CONFIG_CRYPTO_MD4=y
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+CONFIG_CRYPTO_SHA1=y
+CONFIG_CRYPTO_SHA256=y
+CONFIG_CRYPTO_SHA512=y
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+CONFIG_CRYPTO_BLOWFISH=y
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+CONFIG_CRYPTO_TEA=y
+CONFIG_CRYPTO_TWOFISH=y
+CONFIG_CRYPTO_TWOFISH_COMMON=y
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_ZLIB is not set
+CONFIG_CRYPTO_LZO=y
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_CRYPTO_DEV_HIFN_795X is not set
+
+#
+# OCF Configuration
+#
+CONFIG_OCF_OCF=y
+# CONFIG_OCF_RANDOMHARVEST is not set
+CONFIG_OCF_CRYPTODEV=y
+CONFIG_OCF_CRYPTOSOFT=y
+# CONFIG_OCF_SAFE is not set
+# CONFIG_OCF_IXP4XX is not set
+# CONFIG_OCF_HIFN is not set
+# CONFIG_OCF_HIFNHIPP is not set
+# CONFIG_OCF_TALITOS is not set
+# CONFIG_OCF_EP80579 is not set
+# CONFIG_OCF_OCFNULL is not set
+# CONFIG_OCF_BENCH is not set
+CONFIG_BINARY_PRINTF=y
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=y
+CONFIG_CRC16=y
+# CONFIG_CRC_T10DIF is not set
+CONFIG_CRC_ITU_T=m
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+CONFIG_LIBCRC32C=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
--- linux-mvl-dove-2.6.32.orig/arch/arm/configs/kirkwood_defconfig
+++ linux-mvl-dove-2.6.32/arch/arm/configs/kirkwood_defconfig
@@ -185,6 +185,8 @@
 # CONFIG_ARCH_DAVINCI is not set
 # CONFIG_ARCH_OMAP is not set
 # CONFIG_ARCH_BCMRING is not set
+CONFIG_MV88F6281=y
+# CONFIG_MV_HAL_DRIVERS is not set
 
 #
 # Marvell Kirkwood Implementations
@@ -196,6 +198,43 @@
 CONFIG_MACH_SHEEVAPLUG=y
 CONFIG_MACH_TS219=y
 CONFIG_MACH_OPENRD_BASE=y
+
+#
+# Orion SoC options
+#
+CONFIG_MV_INCLUDE_IDMA=y
+CONFIG_MV_INCLUDE_USB=y
+CONFIG_MV_INCLUDE_XOR=y
+CONFIG_MV_INCLUDE_CESA=y
+CONFIG_MV_INCLUDE_GIG_ETH=y
+CONFIG_MV_INCLUDE_AUDIO=y
+CONFIG_MV_INCLUDE_INTEG_SATA=y
+
+#
+# Soc DMA accelerations
+#
+# CONFIG_MV_USE_XOR_ENGINE is not set
+
+#
+# SoC Networking support
+#
+# CONFIG_MV_ETHERNET is not set
+
+#
+# cesa options
+#
+CONFIG_MV_CESA=y
+# CONFIG_MV_CESA_TOOL is not set
+# CONFIG_SCSI_MVSATA is not set
+
+#
+# Marvell Key driver
+#
+# CONFIG_MV_GPIO_KEY is not set
+# CONFIG_MV_TOUCH_KEY is not set
+# CONFIG_MV_TOUCH_SLIDER is not set
+# CONFIG_MV_DBG_TRACE is not set
+>>>>>>> kirkwood: add kconfig flag for building Marvell HAL drivers:arch/arm/configs/kirkwood_defconfig
 CONFIG_PLAT_ORION=y
 
 #
@@ -537,6 +576,7 @@
 # CONFIG_MTD_NAND_PLATFORM is not set
 # CONFIG_MTD_ALAUDA is not set
 CONFIG_MTD_NAND_ORION=y
+# CONFIG_MTD_NAND_DOVE is not set
 # CONFIG_MTD_ONENAND is not set
 
 #
@@ -931,6 +971,7 @@
 #
 CONFIG_SERIO=y
 CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_KB3310 is not set
 # CONFIG_SERIO_PCIPS2 is not set
 CONFIG_SERIO_LIBPS2=y
 # CONFIG_SERIO_RAW is not set
@@ -1009,6 +1050,7 @@
 #
 # CONFIG_I2C_GPIO is not set
 CONFIG_I2C_MV64XXX=y
+# CONFIG_I2C_MV64XXX_PORT_EXPANDER is not set
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
 
@@ -1035,6 +1077,7 @@
 #
 # CONFIG_DS1682 is not set
 # CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_MAX1535 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
@@ -1049,6 +1092,7 @@
 # CONFIG_SPI_BITBANG is not set
 # CONFIG_SPI_GPIO is not set
 CONFIG_SPI_ORION=y
+# CONFIG_SPI_MV is not set
 
 #
 # SPI Protocol Masters
@@ -1080,7 +1124,6 @@
 # PCI GPIO expanders:
 #
 # CONFIG_GPIO_BT8XX is not set
-# CONFIG_GPIO_LANGWELL is not set
 
 #
 # SPI GPIO expanders:
@@ -1684,8 +1727,7 @@
 CONFIG_DEBUG_USER=y
 CONFIG_DEBUG_ERRORS=y
 # CONFIG_DEBUG_STACK_USAGE is not set
-CONFIG_DEBUG_LL=y
-# CONFIG_DEBUG_ICEDCC is not set
+# CONFIG_DEBUG_LL is not set
 
 #
 # Security options
@@ -1793,6 +1835,11 @@
 CONFIG_CRYPTO_HW=y
 CONFIG_CRYPTO_DEV_MV_CESA=y
 # CONFIG_CRYPTO_DEV_HIFN_795X is not set
+
+#
+# OCF Configuration
+#
+# CONFIG_OCF_OCF is not set
 CONFIG_BINARY_PRINTF=y
 
 #
--- linux-mvl-dove-2.6.32.orig/arch/arm/configs/dove_avng_defconfig
+++ linux-mvl-dove-2.6.32/arch/arm/configs/dove_avng_defconfig
@@ -0,0 +1,2225 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.30-dove-3.0.4
+# Tue Jul  7 10:27:09 2009
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_MMU=y
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_OPROFILE_ARMV6=y
+CONFIG_OPROFILE_ARM11_CORE=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_PCI_QUIRKS=y
+CONFIG_COMPAT_BRK=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+CONFIG_PROFILING=y
+CONFIG_TRACEPOINTS=y
+# CONFIG_MARKERS is not set
+CONFIG_OPROFILE=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_KPROBES=y
+CONFIG_KRETPROBES=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+CONFIG_FREEZER=y
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+CONFIG_ARCH_DOVE=y
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_W90X900 is not set
+CONFIG_MV_HAL_RULES_PATH="arch/arm/mach-dove/mv_hal_support/mvRules.mk"
+
+#
+# Marvell Dove Implementations
+#
+CONFIG_DOVE_REV_Z0=y
+# CONFIG_DOVE_REV_Y0 is not set
+CONFIG_MACH_DOVE_RD_AVNG_Z0=y
+# CONFIG_MACH_DOVE_RD_AVNG_NB_Z0 is not set
+CONFIG_MV_INCLUDE_MPP_SYSFS=y
+# CONFIG_MACH_DOVE_RD is not set
+# CONFIG_MACH_DOVE_DB_Z0 is not set
+CONFIG_DOVE_PM_SUPPORT=y
+
+#
+# Orion SoC options
+#
+# CONFIG_MV_INCLUDE_IDMA is not set
+CONFIG_MV_INCLUDE_USB=y
+# CONFIG_MV_INCLUDE_XOR is not set
+CONFIG_MV_INCLUDE_CESA=y
+CONFIG_MV_INCLUDE_GIG_ETH=y
+CONFIG_MV_INCLUDE_AUDIO=y
+# CONFIG_MV_INCLUDE_INTEG_SATA is not set
+CONFIG_MV_INCLUDE_PMU=y
+CONFIG_MV_INCLUDE_NFC=y
+CONFIG_MV_DDRMMC=y
+
+#
+# SoC Networking support
+#
+CONFIG_MV_ETHERNET=y
+CONFIG_MV_ETH_PORTS_NUM=1
+
+#
+# Network Interface Configuration
+#
+CONFIG_MV_ETH_0_MTU=1500
+CONFIG_MV_ETH_0_MACADDR=""
+
+#
+# Rx/Tx Queue Configuration
+#
+CONFIG_MV_ETH_RX_Q_NUM=1
+CONFIG_MV_ETH_TX_Q_NUM=1
+CONFIG_MV_ETH_NUM_OF_RX_DESCR=128
+CONFIG_MV_ETH_NUM_OF_TX_DESCR=532
+
+#
+# TCP/UDP Offloading
+#
+CONFIG_MV_ETH_TSO=y
+# CONFIG_MV_ETH_UFO is not set
+# CONFIG_MV_ETH_INET_LRO is not set
+
+#
+# Control and Statistics
+#
+CONFIG_MV_ETH_PROC=y
+CONFIG_MV_ETH_STATS_ERROR=y
+CONFIG_MV_ETH_STATS_INFO=y
+# CONFIG_MV_ETH_STATS_DEBUG is not set
+# CONFIG_MV_LINUX_COUNTERS_DISABLE is not set
+
+#
+# Advanced Features
+#
+CONFIG_MV_ETH_TIMER_PERIOD=1000
+CONFIG_MV_SKB_HEADROOM=16
+CONFIG_MV_SKB_REUSE=y
+# CONFIG_MV_ETH_NFP is not set
+# CONFIG_MV_GATEWAY is not set
+
+#
+# cesa options
+#
+CONFIG_MV_CESA=y
+CONFIG_MV_CESA_OCF=y
+CONFIG_MV_CESA_TOOL=y
+# CONFIG_SCSI_MVSATA is not set
+
+#
+# Marvell Key driver
+#
+# CONFIG_MV_GPIO_KEY is not set
+# CONFIG_MV_TOUCH_KEY is not set
+# CONFIG_MV_TOUCH_SLIDER is not set
+# CONFIG_MV_DBG_TRACE is not set
+CONFIG_PLAT_ORION=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_V6=y
+# CONFIG_CPU_32v6K is not set
+# CONFIG_CPU_V7 is not set
+CONFIG_CPU_32v6=y
+CONFIG_CPU_ABRT_EV6=y
+CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_CACHE_V6=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V6=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_OUTER_CACHE=y
+CONFIG_CACHE_TAUROS2=y
+CONFIG_MRV_PTE_IN_L2=y
+# CONFIG_CACHE_L2LINEFILL_BURST8_ENABLE is not set
+# CONFIG_MV_L2_WA_ON is not set
+CONFIG_MV_L2_PREFETCH_OFF=y
+CONFIG_CPU_WA_DISABLE=y
+# CONFIG_CPU_WA_ENABLE is not set
+# CONFIG_CPU_L1WAONLY_ENABLE is not set
+# CONFIG_ARM_ERRATA_411920 is not set
+CONFIG_COMMON_CLKDEV=y
+CONFIG_FORCE_MAX_ZONEORDER=12
+
+#
+# Bus support
+#
+CONFIG_PCI=y
+CONFIG_PCI_SYSCALL=y
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_PCI_LEGACY=y
+# CONFIG_PCI_DEBUG is not set
+# CONFIG_PCI_STUB is not set
+# CONFIG_PCI_IOV is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=100
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+# CONFIG_ARCH_HAS_HOLES_MEMORYMODEL is not set
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
+CONFIG_HAVE_MLOCK=y
+CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE=""
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_FREQ is not set
+# CONFIG_CPU_IDLE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+# CONFIG_FPE_NWFPE is not set
+# CONFIG_FPE_FASTFPE is not set
+CONFIG_VFP=y
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+CONFIG_APM_EMULATION=y
+CONFIG_APM_EMU_DS2782=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+CONFIG_INET_LRO=y
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+CONFIG_NET_PKTGEN=m
+# CONFIG_NET_TCPPROBE is not set
+# CONFIG_NET_DROP_MONITOR is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+CONFIG_BT=m
+CONFIG_BT_L2CAP=m
+# CONFIG_BT_SCO is not set
+# CONFIG_BT_RFCOMM is not set
+CONFIG_BT_BNEP=m
+# CONFIG_BT_BNEP_MC_FILTER is not set
+# CONFIG_BT_BNEP_PROTO_FILTER is not set
+CONFIG_BT_HIDP=m
+
+#
+# Bluetooth device drivers
+#
+# CONFIG_BT_HCIBTUSB is not set
+# CONFIG_BT_HCIBTSDIO is not set
+# CONFIG_BT_HCIUART is not set
+# CONFIG_BT_HCIBCM203X is not set
+# CONFIG_BT_HCIBPA10X is not set
+# CONFIG_BT_HCIBFUSB is not set
+# CONFIG_BT_HCIVHCI is not set
+# CONFIG_AF_RXRPC is not set
+CONFIG_WIRELESS=y
+# CONFIG_CFG80211 is not set
+CONFIG_WIRELESS_OLD_REGULATORY=y
+CONFIG_WIRELESS_EXT=y
+CONFIG_WIRELESS_EXT_SYSFS=y
+CONFIG_LIB80211=y
+# CONFIG_LIB80211_DEBUG is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+CONFIG_MTD_CFI_GEOMETRY=y
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_OTP is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+CONFIG_MTD_CFI_STAA=y
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_IMPA7 is not set
+# CONFIG_MTD_INTEL_VR_NOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_DATAFLASH is not set
+CONFIG_MTD_M25P80=y
+CONFIG_M25PXX_USE_FAST_READ=y
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_VERIFY_WRITE=y
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+# CONFIG_MTD_NAND_GPIO is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_CAFE is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
+# CONFIG_MTD_NAND_ORION is not set
+CONFIG_MTD_NAND_DOVE=y
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_MTD_UBI_BEB_RESERVE=1
+# CONFIG_MTD_UBI_GLUEBI is not set
+
+#
+# UBI debugging options
+#
+# CONFIG_MTD_UBI_DEBUG is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=1
+CONFIG_BLK_DEV_RAM_SIZE=4096
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MG_DISK is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_SCSI_PROC_FS is not set
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+CONFIG_BLK_DEV_SR=m
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+CONFIG_CHR_DEV_SG=m
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_AIC94XX is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_SCSI_ARCMSR is not set
+# CONFIG_MEGARAID_NEWGEN is not set
+# CONFIG_MEGARAID_LEGACY is not set
+# CONFIG_MEGARAID_SAS is not set
+# CONFIG_SCSI_MPT2SAS is not set
+# CONFIG_SCSI_HPTIOP is not set
+# CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
+# CONFIG_FCOE is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_MVSAS is not set
+# CONFIG_SCSI_STEX is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
+# CONFIG_SCSI_IPR is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_QLA_FC is not set
+# CONFIG_SCSI_QLA_ISCSI is not set
+# CONFIG_SCSI_LPFC is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_NSP32 is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_SRP is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+CONFIG_ATA=y
+# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_SATA_PMP=y
+# CONFIG_SATA_AHCI is not set
+# CONFIG_SATA_SIL24 is not set
+CONFIG_ATA_SFF=y
+# CONFIG_SATA_SVW is not set
+# CONFIG_ATA_PIIX is not set
+CONFIG_SATA_MV=y
+# CONFIG_SATA_NV is not set
+# CONFIG_PDC_ADMA is not set
+# CONFIG_SATA_QSTOR is not set
+# CONFIG_SATA_PROMISE is not set
+# CONFIG_SATA_SX4 is not set
+# CONFIG_SATA_SIL is not set
+# CONFIG_SATA_SIS is not set
+# CONFIG_SATA_ULI is not set
+# CONFIG_SATA_VIA is not set
+# CONFIG_SATA_VITESSE is not set
+# CONFIG_SATA_INIC162X is not set
+# CONFIG_PATA_ALI is not set
+# CONFIG_PATA_AMD is not set
+# CONFIG_PATA_ARTOP is not set
+# CONFIG_PATA_ATIIXP is not set
+# CONFIG_PATA_CMD640_PCI is not set
+# CONFIG_PATA_CMD64X is not set
+# CONFIG_PATA_CS5520 is not set
+# CONFIG_PATA_CS5530 is not set
+# CONFIG_PATA_CYPRESS is not set
+# CONFIG_PATA_EFAR is not set
+# CONFIG_ATA_GENERIC is not set
+# CONFIG_PATA_HPT366 is not set
+# CONFIG_PATA_HPT37X is not set
+# CONFIG_PATA_HPT3X2N is not set
+# CONFIG_PATA_HPT3X3 is not set
+# CONFIG_PATA_IT821X is not set
+# CONFIG_PATA_IT8213 is not set
+# CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_TRIFLEX is not set
+# CONFIG_PATA_MARVELL is not set
+# CONFIG_PATA_MPIIX is not set
+# CONFIG_PATA_OLDPIIX is not set
+# CONFIG_PATA_NETCELL is not set
+# CONFIG_PATA_NINJA32 is not set
+# CONFIG_PATA_NS87410 is not set
+# CONFIG_PATA_NS87415 is not set
+# CONFIG_PATA_OPTI is not set
+# CONFIG_PATA_OPTIDMA is not set
+# CONFIG_PATA_PDC_OLD is not set
+# CONFIG_PATA_RADISYS is not set
+# CONFIG_PATA_RZ1000 is not set
+# CONFIG_PATA_SC1200 is not set
+# CONFIG_PATA_SERVERWORKS is not set
+# CONFIG_PATA_PDC2027X is not set
+# CONFIG_PATA_SIL680 is not set
+# CONFIG_PATA_SIS is not set
+# CONFIG_PATA_VIA is not set
+# CONFIG_PATA_WINBOND is not set
+# CONFIG_PATA_PLATFORM is not set
+# CONFIG_PATA_SCH is not set
+# CONFIG_MD is not set
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+
+#
+# Enable only one of the two stacks, unless you know what you are doing
+#
+# CONFIG_FIREWIRE is not set
+# CONFIG_IEEE1394 is not set
+# CONFIG_I2O is not set
+CONFIG_NETDEVICES=y
+CONFIG_COMPAT_NET_DEV_OPS=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_ARCNET is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_AX88796 is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_CASSINI is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMC911X is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+CONFIG_NET_PCI=y
+# CONFIG_PCNET32 is not set
+# CONFIG_AMD8111_ETH is not set
+# CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_B44 is not set
+# CONFIG_FORCEDETH is not set
+CONFIG_E100=y
+# CONFIG_FEALNX is not set
+# CONFIG_NATSEMI is not set
+# CONFIG_NE2K_PCI is not set
+# CONFIG_8139CP is not set
+# CONFIG_8139TOO is not set
+# CONFIG_R6040 is not set
+# CONFIG_SIS900 is not set
+# CONFIG_EPIC100 is not set
+# CONFIG_SMSC9420 is not set
+# CONFIG_SUNDANCE is not set
+# CONFIG_TLAN is not set
+# CONFIG_VIA_RHINE is not set
+# CONFIG_SC92031 is not set
+# CONFIG_ATL2 is not set
+CONFIG_NETDEV_1000=y
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_E1000E is not set
+# CONFIG_IP1000 is not set
+# CONFIG_IGB is not set
+# CONFIG_IGBVF is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SKY2 is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+CONFIG_MV643XX_ETH=y
+# CONFIG_QLA3XXX is not set
+# CONFIG_ATL1 is not set
+# CONFIG_ATL1E is not set
+# CONFIG_ATL1C is not set
+# CONFIG_JME is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_TR is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+CONFIG_WLAN_80211=y
+CONFIG_LIBERTAS=m
+# CONFIG_LIBERTAS_USB is not set
+CONFIG_LIBERTAS_SDIO=m
+# CONFIG_LIBERTAS_SPI is not set
+CONFIG_LIBERTAS_DEBUG=y
+# CONFIG_ATMEL is not set
+# CONFIG_PRISM54 is not set
+# CONFIG_USB_ZD1201 is not set
+# CONFIG_USB_NET_RNDIS_WLAN is not set
+# CONFIG_IPW2100 is not set
+# CONFIG_IPW2200 is not set
+# CONFIG_HOSTAP is not set
+# CONFIG_HERMES is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NET_FC is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+CONFIG_INPUT_POLLDEV=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+# CONFIG_INPUT_APMPOWER is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_GPIO is not set
+CONFIG_INPUT_MOUSE=y
+# CONFIG_MOUSE_PS2 is not set
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_APPLETOUCH is not set
+# CONFIG_MOUSE_BCM5974 is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_MOUSE_GPIO is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_ADS7846 is not set
+# CONFIG_TOUCHSCREEN_AD7877 is not set
+# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
+# CONFIG_TOUCHSCREEN_AD7879_SPI is not set
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_WM97XX is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+CONFIG_TOUCHSCREEN_TSC2005=y
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
+# CONFIG_TOUCHSCREEN_RT5611 is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+# CONFIG_DEVKMEM is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_NOZOMI is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+# CONFIG_SERIAL_8250_PCI is not set
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=2
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_MAX3100 is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=16
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_DEVPORT=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_HELPER_AUTO=y
+CONFIG_I2C_ALGOBIT=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# PC SMBus host controller drivers
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_ISCH is not set
+# CONFIG_I2C_PIIX4 is not set
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_GPIO is not set
+CONFIG_I2C_MV64XXX=y
+CONFIG_I2C_MV64XXX_PORT_EXPANDER=y
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Graphics adapter I2C/DDC channel drivers
+#
+# CONFIG_I2C_VOODOO3 is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+CONFIG_MAX1535=y
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
+CONFIG_SPI_ORION=y
+CONFIG_SPI_MV=y
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+# CONFIG_GPIO_BT8XX is not set
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
+CONFIG_W1=y
+
+#
+# 1-wire Bus Masters
+#
+# CONFIG_W1_MASTER_MATROX is not set
+# CONFIG_W1_MASTER_DS2490 is not set
+# CONFIG_W1_MASTER_DS2482 is not set
+# CONFIG_W1_MASTER_DS1WM is not set
+# CONFIG_W1_MASTER_GPIO is not set
+
+#
+# 1-wire Slaves
+#
+# CONFIG_W1_SLAVE_THERM is not set
+# CONFIG_W1_SLAVE_SMEM is not set
+# CONFIG_W1_SLAVE_DS2431 is not set
+# CONFIG_W1_SLAVE_DS2433 is not set
+CONFIG_W1_SLAVE_DS2760=y
+# CONFIG_W1_SLAVE_BQ27000 is not set
+CONFIG_POWER_SUPPLY=y
+# CONFIG_POWER_SUPPLY_DEBUG is not set
+# CONFIG_PDA_POWER is not set
+# CONFIG_APM_POWER is not set
+# CONFIG_BATTERY_DS2760 is not set
+# CONFIG_BATTERY_BQ2084 is not set
+# CONFIG_BATTERY_BQ27x00 is not set
+CONFIG_BATTERY_DS2782=y
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_UCB1400_CORE is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+CONFIG_VIDEO_DEV=y
+CONFIG_VIDEO_V4L2_COMMON=y
+CONFIG_VIDEO_ALLOW_V4L1=y
+CONFIG_VIDEO_V4L1_COMPAT=y
+# CONFIG_DVB_CORE is not set
+CONFIG_VIDEO_MEDIA=y
+
+#
+# Multimedia drivers
+#
+# CONFIG_MEDIA_ATTACH is not set
+CONFIG_MEDIA_TUNER=y
+# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
+CONFIG_MEDIA_TUNER_SIMPLE=y
+CONFIG_MEDIA_TUNER_TDA8290=y
+CONFIG_MEDIA_TUNER_TDA9887=y
+CONFIG_MEDIA_TUNER_TEA5761=y
+CONFIG_MEDIA_TUNER_TEA5767=y
+CONFIG_MEDIA_TUNER_MT20XX=y
+CONFIG_MEDIA_TUNER_XC2028=y
+CONFIG_MEDIA_TUNER_XC5000=y
+CONFIG_MEDIA_TUNER_MC44S803=y
+CONFIG_VIDEO_V4L2=y
+CONFIG_VIDEO_V4L1=y
+CONFIG_VIDEO_CAPTURE_DRIVERS=y
+# CONFIG_VIDEO_ADV_DEBUG is not set
+# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
+CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
+CONFIG_VIDEO_OV7670=y
+CONFIG_VIDEO_OV7680=y
+# CONFIG_VIDEO_VIVI is not set
+# CONFIG_VIDEO_BT848 is not set
+# CONFIG_VIDEO_CPIA is not set
+# CONFIG_VIDEO_CPIA2 is not set
+# CONFIG_VIDEO_SAA5246A is not set
+# CONFIG_VIDEO_SAA5249 is not set
+# CONFIG_VIDEO_STRADIS is not set
+# CONFIG_VIDEO_ZORAN is not set
+# CONFIG_VIDEO_SAA7134 is not set
+# CONFIG_VIDEO_MXB is not set
+# CONFIG_VIDEO_HEXIUM_ORION is not set
+# CONFIG_VIDEO_HEXIUM_GEMINI is not set
+# CONFIG_VIDEO_CX88 is not set
+# CONFIG_VIDEO_IVTV is not set
+CONFIG_VIDEO_CAFE_CCIC=y
+# CONFIG_SOC_CAMERA is not set
+# CONFIG_V4L_USB_DRIVERS is not set
+# CONFIG_RADIO_ADAPTERS is not set
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_DOVE_GPU=y
+CONFIG_DOVE_GPU_MEM_SIZE=128
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+CONFIG_FB_DDC=y
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+CONFIG_FB_MODE_HELPERS=y
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_CIRRUS is not set
+# CONFIG_FB_PM2 is not set
+# CONFIG_FB_CYBER2000 is not set
+# CONFIG_FB_ASILIANT is not set
+# CONFIG_FB_IMSTT is not set
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_NVIDIA is not set
+# CONFIG_FB_RIVA is not set
+# CONFIG_FB_MATROX is not set
+# CONFIG_FB_RADEON is not set
+# CONFIG_FB_ATY128 is not set
+# CONFIG_FB_ATY is not set
+# CONFIG_FB_S3 is not set
+# CONFIG_FB_SAVAGE is not set
+# CONFIG_FB_SIS is not set
+# CONFIG_FB_VIA is not set
+# CONFIG_FB_NEOMAGIC is not set
+# CONFIG_FB_KYRO is not set
+# CONFIG_FB_3DFX is not set
+# CONFIG_FB_VOODOO1 is not set
+# CONFIG_FB_VT8623 is not set
+# CONFIG_FB_TRIDENT is not set
+# CONFIG_FB_ARK is not set
+# CONFIG_FB_PM3 is not set
+# CONFIG_FB_CARMINE is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+# CONFIG_FB_BROADSHEET is not set
+CONFIG_FB_DOVE=y
+CONFIG_FB_DOVE_CONSISTENT_DMA_SIZE=14
+CONFIG_FB_DOVE_CLCD=y
+CONFIG_FB_DOVE_CLCD1=y
+CONFIG_FB_DOVE_CLCD_EDID=y
+CONFIG_FB_DOVE_DCON=y
+CONFIG_FB_DOVE_CLCD_DCONA_BYPASS=y
+# CONFIG_FB_DOVE_CLCD_DCONA_OLPC is not set
+# CONFIG_FB_DOVE_CLCD_DCONA_DUALVIEW is not set
+# CONFIG_FB_DOVE_CLCD_DCONA_MODE is not set
+CONFIG_FB_DOVE_CLCD_DCONB_BYPASS1=y
+# CONFIG_FB_DOVE_CLCD_DCONB_BYPASS0 is not set
+
+#
+# DOVE LCD clock source
+#
+CONFIG_FB_DOVE_CLCD_USE_PLL_CLK=y
+CONFIG_FB_DOVE_CLCD_SCLK_VALUE=400
+CONFIG_FB_DOVE_CLCD_DEFAULT_OPTION="lcd0:1280x768-24@60,lcd1:1024x768-16@60"
+# CONFIG_FB_DOVE_CLCD_FLAREON_GV is not set
+# CONFIG_FB_MUSTANG_CLCD is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_LCD_CLASS_DEVICE=y
+# CONFIG_LCD_LTV350QV is not set
+# CONFIG_LCD_ILI9320 is not set
+# CONFIG_LCD_TDO24M is not set
+# CONFIG_LCD_VGG2432A4 is not set
+# CONFIG_LCD_PLATFORM is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_GENERIC=y
+CONFIG_BACKLIGHT_DOVE=y
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_LOGO_LINUX_CLUT224=y
+CONFIG_SOUND=y
+# CONFIG_SOUND_OSS_CORE is not set
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+CONFIG_SND_JACK=y
+# CONFIG_SND_SEQUENCER is not set
+# CONFIG_SND_MIXER_OSS is not set
+# CONFIG_SND_PCM_OSS is not set
+# CONFIG_SND_HRTIMER is not set
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+CONFIG_SND_VMASTER=y
+CONFIG_SND_AC97_CODEC=y
+CONFIG_SND_DRIVERS=y
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+# CONFIG_SND_AC97_POWER_SAVE is not set
+CONFIG_SND_PCI=y
+# CONFIG_SND_AD1889 is not set
+# CONFIG_SND_ALS300 is not set
+# CONFIG_SND_ALI5451 is not set
+# CONFIG_SND_ATIIXP is not set
+# CONFIG_SND_ATIIXP_MODEM is not set
+# CONFIG_SND_AU8810 is not set
+# CONFIG_SND_AU8820 is not set
+# CONFIG_SND_AU8830 is not set
+# CONFIG_SND_AW2 is not set
+# CONFIG_SND_AZT3328 is not set
+# CONFIG_SND_BT87X is not set
+# CONFIG_SND_CA0106 is not set
+# CONFIG_SND_CMIPCI is not set
+# CONFIG_SND_OXYGEN is not set
+# CONFIG_SND_CS4281 is not set
+# CONFIG_SND_CS46XX is not set
+# CONFIG_SND_DARLA20 is not set
+# CONFIG_SND_GINA20 is not set
+# CONFIG_SND_LAYLA20 is not set
+# CONFIG_SND_DARLA24 is not set
+# CONFIG_SND_GINA24 is not set
+# CONFIG_SND_LAYLA24 is not set
+# CONFIG_SND_MONA is not set
+# CONFIG_SND_MIA is not set
+# CONFIG_SND_ECHO3G is not set
+# CONFIG_SND_INDIGO is not set
+# CONFIG_SND_INDIGOIO is not set
+# CONFIG_SND_INDIGODJ is not set
+# CONFIG_SND_INDIGOIOX is not set
+# CONFIG_SND_INDIGODJX is not set
+# CONFIG_SND_EMU10K1 is not set
+# CONFIG_SND_EMU10K1X is not set
+# CONFIG_SND_ENS1370 is not set
+# CONFIG_SND_ENS1371 is not set
+# CONFIG_SND_ES1938 is not set
+# CONFIG_SND_ES1968 is not set
+# CONFIG_SND_FM801 is not set
+# CONFIG_SND_HDA_INTEL is not set
+# CONFIG_SND_HDSP is not set
+# CONFIG_SND_HDSPM is not set
+# CONFIG_SND_HIFIER is not set
+# CONFIG_SND_ICE1712 is not set
+# CONFIG_SND_ICE1724 is not set
+# CONFIG_SND_INTEL8X0 is not set
+# CONFIG_SND_INTEL8X0M is not set
+# CONFIG_SND_KORG1212 is not set
+# CONFIG_SND_MAESTRO3 is not set
+# CONFIG_SND_MIXART is not set
+# CONFIG_SND_NM256 is not set
+# CONFIG_SND_PCXHR is not set
+# CONFIG_SND_RIPTIDE is not set
+# CONFIG_SND_RME32 is not set
+# CONFIG_SND_RME96 is not set
+# CONFIG_SND_RME9652 is not set
+# CONFIG_SND_SONICVIBES is not set
+# CONFIG_SND_TRIDENT is not set
+# CONFIG_SND_VIA82XX is not set
+# CONFIG_SND_VIA82XX_MODEM is not set
+# CONFIG_SND_VIRTUOSO is not set
+# CONFIG_SND_VX222 is not set
+# CONFIG_SND_YMFPCI is not set
+CONFIG_SND_ARM=y
+# CONFIG_SND_MRVL_AUDIO is not set
+CONFIG_SND_SPI=y
+CONFIG_SND_USB=y
+# CONFIG_SND_USB_AUDIO is not set
+# CONFIG_SND_USB_CAIAQ is not set
+CONFIG_SND_SOC=y
+
+#
+# SoC Audio for the Marvell SoC's
+#
+CONFIG_SND_DOVE_AC97=y
+# CONFIG_SND_DOVE_SOC_AC97_AVD1 is not set
+CONFIG_SND_DOVE_SOC_MRVL_AUDIO=y
+CONFIG_CODEC_CS42L51=y
+# CONFIG_CODEC_RT5623 is not set
+CONFIG_SND_SOC_I2C_AND_SPI=y
+# CONFIG_SND_SOC_ALL_CODECS is not set
+CONFIG_SND_SOC_CS42L51=y
+# CONFIG_SOUND_PRIME is not set
+CONFIG_AC97_BUS=y
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+# CONFIG_HID_PID is not set
+# CONFIG_USB_HIDDEV is not set
+
+#
+# Special HID drivers
+#
+# CONFIG_HID_A4TECH is not set
+# CONFIG_HID_APPLE is not set
+# CONFIG_HID_BELKIN is not set
+# CONFIG_HID_CHERRY is not set
+# CONFIG_HID_CHICONY is not set
+# CONFIG_HID_CYPRESS is not set
+# CONFIG_DRAGONRISE_FF is not set
+# CONFIG_HID_EZKEY is not set
+# CONFIG_HID_KYE is not set
+# CONFIG_HID_GYRATION is not set
+# CONFIG_HID_KENSINGTON is not set
+# CONFIG_HID_LOGITECH is not set
+# CONFIG_HID_MICROSOFT is not set
+# CONFIG_HID_MONTEREY is not set
+# CONFIG_HID_NTRIG is not set
+# CONFIG_HID_PANTHERLORD is not set
+# CONFIG_HID_PETALYNX is not set
+# CONFIG_HID_SAMSUNG is not set
+# CONFIG_HID_SONY is not set
+# CONFIG_HID_SUNPLUS is not set
+# CONFIG_GREENASIA_FF is not set
+# CONFIG_HID_TOPSEED is not set
+# CONFIG_THRUSTMASTER_FF is not set
+# CONFIG_ZEROPLUS_FF is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_SUSPEND is not set
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_MON is not set
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+CONFIG_USB_EHCI_TT_NEWSCHED=y
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_OHCI_HCD is not set
+# CONFIG_USB_UHCI_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_WHCI_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+# CONFIG_USB_MUSB_HDRC is not set
+# CONFIG_USB_GADGET_MUSB_HDRC is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+CONFIG_USB_PRINTER=y
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+CONFIG_USB_STORAGE_DATAFAB=y
+CONFIG_USB_STORAGE_FREECOM=y
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+CONFIG_USB_STORAGE_SDDR09=y
+CONFIG_USB_STORAGE_SDDR55=y
+CONFIG_USB_STORAGE_JUMPSHOT=y
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+CONFIG_USB_TEST=m
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+# CONFIG_USB_GADGET_DEBUG_FS is not set
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_PXA25X is not set
+# CONFIG_USB_GADGET_PXA27X is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_IMX is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_FSL_QE is not set
+# CONFIG_USB_GADGET_CI13XXX is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+CONFIG_USB_GADGET_MRVL=y
+CONFIG_USB_MRVL=y
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+# CONFIG_USB_ZERO is not set
+# CONFIG_USB_ETH is not set
+# CONFIG_USB_GADGETFS is not set
+CONFIG_USB_FILE_STORAGE=m
+# CONFIG_USB_FILE_STORAGE_TEST is not set
+# CONFIG_USB_G_SERIAL is not set
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+# CONFIG_USB_CDC_COMPOSITE is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_NOP_USB_XCEIV is not set
+# CONFIG_UWB is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+CONFIG_MMC_SDHCI=y
+# CONFIG_MMC_SDHCI_PCI is not set
+CONFIG_MMC_SDHCI_MV=y
+# CONFIG_MMC_TIFM_SD is not set
+# CONFIG_MMC_MVSDIO is not set
+# CONFIG_MMC_SPI is not set
+# CONFIG_MMC_MVSDMMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_NEW_LEDS=y
+# CONFIG_LEDS_CLASS is not set
+
+#
+# LED drivers
+#
+
+#
+# LED Triggers
+#
+# CONFIG_LEDS_TRIGGERS is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_MV=y
+CONFIG_DMADEVICES=y
+
+#
+# DMA Devices
+#
+CONFIG_MV_XOR=y
+CONFIG_DMA_ENGINE=y
+
+#
+# DMA Clients
+#
+# CONFIG_NET_DMA is not set
+# CONFIG_ASYNC_TX_DMA is not set
+# CONFIG_DMATEST is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_REGULATOR is not set
+CONFIG_UIO=y
+# CONFIG_UIO_CIF is not set
+CONFIG_UIO_PDRV=y
+# CONFIG_UIO_PDRV_GENIRQ is not set
+# CONFIG_UIO_SMX is not set
+# CONFIG_UIO_AEC is not set
+# CONFIG_UIO_SERCOS3 is not set
+CONFIG_UIO_DOVE_VMETA=y
+CONFIG_UIO_DOVE_VMETA_MEM_SIZE=96
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+# CONFIG_EXT3_FS_XATTR is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_XFS_FS=m
+# CONFIG_XFS_QUOTA is not set
+# CONFIG_XFS_POSIX_ACL is not set
+# CONFIG_XFS_RT is not set
+# CONFIG_XFS_DEBUG is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=y
+CONFIG_JOLIET=y
+# CONFIG_ZISOFS is not set
+CONFIG_UDF_FS=m
+CONFIG_UDF_NLS=y
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+CONFIG_UBIFS_FS=y
+# CONFIG_UBIFS_FS_XATTR is not set
+# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
+CONFIG_UBIFS_FS_LZO=y
+CONFIG_UBIFS_FS_ZLIB=y
+# CONFIG_UBIFS_FS_DEBUG is not set
+CONFIG_CRAMFS=y
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=m
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+CONFIG_NLS_CODEPAGE_850=y
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_ISO8859_2=y
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=y
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+CONFIG_STACKTRACE=y
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_KPROBES_SANITY_TEST is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_LKDTM is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+# CONFIG_PAGE_POISONING is not set
+CONFIG_NOP_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_RING_BUFFER=y
+CONFIG_TRACING=y
+CONFIG_TRACING_SUPPORT=y
+
+#
+# Tracers
+#
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_FTRACE_STARTUP_TEST is not set
+# CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_ARM_UNWIND=y
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_LL is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_GF128MUL is not set
+CONFIG_CRYPTO_NULL=y
+CONFIG_CRYPTO_WORKQUEUE=y
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=m
+# CONFIG_CRYPTO_LRW is not set
+CONFIG_CRYPTO_PCBC=m
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+CONFIG_CRYPTO_HMAC=y
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+CONFIG_CRYPTO_CRC32C=y
+CONFIG_CRYPTO_MD4=y
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+CONFIG_CRYPTO_SHA1=y
+CONFIG_CRYPTO_SHA256=y
+CONFIG_CRYPTO_SHA512=y
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+CONFIG_CRYPTO_BLOWFISH=y
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+CONFIG_CRYPTO_TEA=y
+CONFIG_CRYPTO_TWOFISH=y
+CONFIG_CRYPTO_TWOFISH_COMMON=y
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_ZLIB is not set
+CONFIG_CRYPTO_LZO=y
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_CRYPTO_DEV_HIFN_795X is not set
+
+#
+# OCF Configuration
+#
+CONFIG_OCF_OCF=y
+# CONFIG_OCF_RANDOMHARVEST is not set
+CONFIG_OCF_CRYPTODEV=y
+CONFIG_OCF_CRYPTOSOFT=y
+# CONFIG_OCF_SAFE is not set
+# CONFIG_OCF_IXP4XX is not set
+# CONFIG_OCF_HIFN is not set
+# CONFIG_OCF_HIFNHIPP is not set
+# CONFIG_OCF_TALITOS is not set
+# CONFIG_OCF_EP80579 is not set
+# CONFIG_OCF_OCFNULL is not set
+# CONFIG_OCF_BENCH is not set
+CONFIG_BINARY_PRINTF=y
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=y
+CONFIG_CRC16=y
+# CONFIG_CRC_T10DIF is not set
+CONFIG_CRC_ITU_T=m
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+CONFIG_LIBCRC32C=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
--- linux-mvl-dove-2.6.32.orig/arch/arm/configs/msm_defconfig
+++ linux-mvl-dove-2.6.32/arch/arm/configs/msm_defconfig
@@ -69,6 +69,7 @@
 CONFIG_SIGNALFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
+CONFIG_ASHMEM=y
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
@@ -256,6 +257,7 @@
 CONFIG_UNIX=y
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
+CONFIG_ANDROID_PARANOID_NETWORK=y
 # CONFIG_IP_MULTICAST is not set
 # CONFIG_IP_ADVANCED_ROUTER is not set
 CONFIG_IP_FIB_HASH=y
--- linux-mvl-dove-2.6.32.orig/arch/arm/configs/dovenb_eb_vmeta_lcd_gpio.config
+++ linux-mvl-dove-2.6.32/arch/arm/configs/dovenb_eb_vmeta_lcd_gpio.config
@@ -0,0 +1,1004 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.26
+# Wed Aug 13 16:36:57 2008
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+# CONFIG_GENERIC_GPIO is not set
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_MMU=y
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ARCH_SUPPORTS_AOUT=y
+CONFIG_ZONE_DMA=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+# CONFIG_EXPERIMENTAL is not set
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+# CONFIG_HAVE_DMA_ATTRS is not set
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+# CONFIG_KMOD is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_DEFAULT_AS is not set
+CONFIG_DEFAULT_DEADLINE=y
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="deadline"
+CONFIG_CLASSIC_RCU=y
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+CONFIG_ARCH_REALVIEW=y
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_CO285 is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_MSM7X00A is not set
+
+#
+# Boot options
+#
+
+#
+# Power management
+#
+
+#
+# RealView platform type
+#
+CONFIG_MACH_REALVIEW_EB=y
+# CONFIG_REALVIEW_EB_ARM11MP is not set
+# CONFIG_MACH_REALVIEW_PB11MP is not set
+# CONFIG_MACH_REALVIEW_PB1176 is not set
+# CONFIG_REALVIEW_DOVE_GPIO_IRQ is not set
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+# CONFIG_CPU_ARM926T is not set
+CONFIG_CPU_V6=y
+CONFIG_CPU_32v6K=y
+# CONFIG_CPU_V7 is not set
+CONFIG_CPU_32v6=y
+CONFIG_CPU_ABRT_EV6=y
+CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_CACHE_V6=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V6=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_OUTER_CACHE=y
+CONFIG_CACHE_TAUROS2=y
+CONFIG_MRV_PTE_IN_L2=y
+CONFIG_ARM_GIC=y
+CONFIG_ICST307=y
+
+#
+# Bus support
+#
+CONFIG_ARM_AMBA=y
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+# CONFIG_TICK_ONESHOT is not set
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_HZ=100
+CONFIG_AEABI=y
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="root=/dev/nfs nfsroot=10.1.69.3:/work/nfsroot ip=dhcp console=ttyAMA0 mem=128M"
+# CONFIG_XIP_KERNEL is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_VFP=y
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_ARM_INTEGRATOR=y
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_PHYLIB is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_AX88796 is not set
+CONFIG_SMC91X=y
+# CONFIG_DM9000 is not set
+CONFIG_SMC911X=y
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_B44 is not set
+CONFIG_NETDEV_1000=y
+# CONFIG_E1000E_ENABLED is not set
+CONFIG_NETDEV_10000=y
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=y
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+CONFIG_MOUSE_PS2_LIFEBOOK=y
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_APPLETOUCH is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+# CONFIG_SERIO_SERPORT is not set
+CONFIG_SERIO_AMBAKMI=y
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_AMBA_PL010 is not set
+CONFIG_SERIAL_AMBA_PL011=y
+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=16
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=m
+# CONFIG_NVRAM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_WATCHDOG is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_PASIC3 is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+CONFIG_FB_DOVE_CLCD=y
+# CONFIG_FB_DOVE_QVGA_LCD_PANEL is not set
+CONFIG_FB_DOVE_VGA_LCD_PANEL=y
+CONFIG_FB_DOVE_CLCD_FLAREON_GV=y
+# CONFIG_FB_DOVE_CLCD_QVGA is not set
+CONFIG_FB_DOVE_CLCD_SCLK_DIV=8
+# CONFIG_FB_DOVE_CLCD_PORTB is not set
+CONFIG_FB_DOVE_DCON=y
+CONFIG_FB_DOVE_CLCD_DCONA_NONE=y
+# CONFIG_FB_DOVE_CLCD_DCONA_BYPASS is not set
+# CONFIG_FB_DOVE_CLCD_DCONA_OLPC is not set
+# CONFIG_FB_DOVE_CLCD_DCONA_DUALVIEW is not set
+# CONFIG_FB_DOVE_CLCD_DCONA_MODE is not set
+CONFIG_FB_DOVE_CLCD_DCONB_NONE=y
+# CONFIG_FB_DOVE_CLCD_DCONB_BYPASS1 is not set
+# CONFIG_FB_DOVE_CLCD_DCONB_BYPASS0 is not set
+# CONFIG_FB_ARMCLCD is not set
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_LOGO_LINUX_CLUT224=y
+
+#
+# Sound
+#
+CONFIG_SOUND=y
+
+#
+# Advanced Linux Sound Architecture
+#
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+# CONFIG_SND_SEQUENCER is not set
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=y
+CONFIG_SND_PCM_OSS=y
+CONFIG_SND_PCM_OSS_PLUGINS=y
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+
+#
+# Generic devices
+#
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+
+#
+# ALSA ARM devices
+#
+# CONFIG_SND_ARMAACI is not set
+
+#
+# System on Chip audio support
+#
+# CONFIG_SND_SOC is not set
+
+#
+# ALSA SoC audio for Freescale SOCs
+#
+
+#
+# SoC Audio for the Texas Instruments OMAP
+#
+
+#
+# Open Sound System
+#
+# CONFIG_SOUND_PRIME is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+CONFIG_HID_DEBUG=y
+# CONFIG_HIDRAW is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+# CONFIG_USB is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+# CONFIG_USB_GADGET is not set
+# CONFIG_MMC is not set
+# CONFIG_NEW_LEDS is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+CONFIG_UIO=y
+# CONFIG_UIO_SMX is not set
+CONFIG_UIO_DOVE_VMETA=y
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+# CONFIG_MSDOS_FS is not set
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_JFFS2_FS is not set
+CONFIG_CRAMFS=y
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_SAMPLES is not set
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_LL is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_MANAGER is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_PCBC is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
+CONFIG_CRYPTO_HW=y
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
+# CONFIG_GENERIC_FIND_NEXT_BIT is not set
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
--- linux-mvl-dove-2.6.32.orig/arch/arm/configs/kirkwood_hal_defconfig
+++ linux-mvl-dove-2.6.32/arch/arm/configs/kirkwood_hal_defconfig
@@ -0,0 +1,1705 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.29.1-dove-2.0.0-dev
+# Tue May  5 13:35:21 2009
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_MMU=y
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_PCI_QUIRKS=y
+CONFIG_COMPAT_BRK=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+CONFIG_PROFILING=y
+CONFIG_TRACEPOINTS=y
+# CONFIG_MARKERS is not set
+CONFIG_OPROFILE=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_KPROBES=y
+CONFIG_KRETPROBES=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_FREEZER is not set
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+CONFIG_ARCH_KIRKWOOD=y
+# CONFIG_ARCH_DOVE is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_W90X900 is not set
+CONFIG_MV88F6281=y
+CONFIG_MV_HAL_RULES_PATH="arch/arm/mach-kirkwood/mv_hal_support/mvRules.mk"
+
+#
+# Marvell Kirkwood Implementations
+#
+CONFIG_MACH_DB88F6281_BP=y
+CONFIG_MACH_RD88F6192_NAS=y
+CONFIG_MACH_RD88F6281=y
+
+#
+# Orion SoC options
+#
+# CONFIG_MV_INCLUDE_IDMA is not set
+CONFIG_MV_INCLUDE_USB=y
+# CONFIG_MV_INCLUDE_XOR is not set
+# CONFIG_MV_INCLUDE_CESA is not set
+# CONFIG_MV_INCLUDE_GIG_ETH is not set
+CONFIG_MV_INCLUDE_AUDIO=y
+CONFIG_MV_INCLUDE_INTEG_SATA=y
+# CONFIG_SCSI_MVSATA is not set
+
+#
+# Marvell Key driver
+#
+# CONFIG_MV_GPIO_KEY is not set
+# CONFIG_MV_TOUCH_KEY is not set
+# CONFIG_MV_TOUCH_SLIDER is not set
+# CONFIG_MV_DBG_TRACE is not set
+CONFIG_PLAT_ORION=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_FEROCEON=y
+# CONFIG_CPU_FEROCEON_OLD_ID is not set
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5T=y
+CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_COPY_FEROCEON=y
+CONFIG_CPU_TLB_FEROCEON=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+CONFIG_OUTER_CACHE=y
+CONFIG_CACHE_FEROCEON_L2=y
+# CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH is not set
+
+#
+# Bus support
+#
+CONFIG_PCI=y
+CONFIG_PCI_SYSCALL=y
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_PCI_LEGACY=y
+# CONFIG_PCI_DEBUG is not set
+# CONFIG_PCI_STUB is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_TICK_ONESHOT=y
+# CONFIG_NO_HZ is not set
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=100
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+CONFIG_ARCH_FLATMEM_HAS_HOLES=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4096
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE=""
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_IDLE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+# CONFIG_FPE_NWFPE is not set
+# CONFIG_FPE_FASTFPE is not set
+# CONFIG_VFP is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_COMPAT_NET_DEV_OPS=y
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+CONFIG_NET_PKTGEN=m
+# CONFIG_NET_TCPPROBE is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_PHONET is not set
+CONFIG_WIRELESS=y
+# CONFIG_CFG80211 is not set
+CONFIG_WIRELESS_OLD_REGULATORY=y
+CONFIG_WIRELESS_EXT=y
+CONFIG_WIRELESS_EXT_SYSFS=y
+# CONFIG_LIB80211 is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+CONFIG_MTD_CFI_GEOMETRY=y
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_OTP is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+CONFIG_MTD_CFI_STAA=y
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_IMPA7 is not set
+# CONFIG_MTD_INTEL_VR_NOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_DATAFLASH is not set
+CONFIG_MTD_M25P80=y
+CONFIG_M25PXX_USE_FAST_READ=y
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_VERIFY_WRITE=y
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+# CONFIG_MTD_NAND_GPIO is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_CAFE is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
+CONFIG_MTD_NAND_ORION=y
+# CONFIG_MTD_NAND_DOVE is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+# CONFIG_BLK_DEV_UB is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_SCSI_PROC_FS is not set
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+CONFIG_BLK_DEV_SR=m
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+CONFIG_CHR_DEV_SG=m
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_AIC94XX is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_SCSI_ARCMSR is not set
+# CONFIG_MEGARAID_NEWGEN is not set
+# CONFIG_MEGARAID_LEGACY is not set
+# CONFIG_MEGARAID_SAS is not set
+# CONFIG_SCSI_HPTIOP is not set
+# CONFIG_LIBFC is not set
+# CONFIG_FCOE is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_MVSAS is not set
+# CONFIG_SCSI_STEX is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
+# CONFIG_SCSI_IPR is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_QLA_FC is not set
+# CONFIG_SCSI_QLA_ISCSI is not set
+# CONFIG_SCSI_LPFC is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_NSP32 is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_SRP is not set
+# CONFIG_SCSI_DH is not set
+CONFIG_ATA=y
+# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_SATA_PMP=y
+CONFIG_SATA_AHCI=y
+# CONFIG_SATA_SIL24 is not set
+CONFIG_ATA_SFF=y
+# CONFIG_SATA_SVW is not set
+# CONFIG_ATA_PIIX is not set
+CONFIG_SATA_MV=y
+# CONFIG_SATA_NV is not set
+# CONFIG_PDC_ADMA is not set
+# CONFIG_SATA_QSTOR is not set
+# CONFIG_SATA_PROMISE is not set
+# CONFIG_SATA_SX4 is not set
+# CONFIG_SATA_SIL is not set
+# CONFIG_SATA_SIS is not set
+# CONFIG_SATA_ULI is not set
+# CONFIG_SATA_VIA is not set
+# CONFIG_SATA_VITESSE is not set
+# CONFIG_SATA_INIC162X is not set
+# CONFIG_PATA_ALI is not set
+# CONFIG_PATA_AMD is not set
+# CONFIG_PATA_ARTOP is not set
+# CONFIG_PATA_ATIIXP is not set
+# CONFIG_PATA_CMD640_PCI is not set
+# CONFIG_PATA_CMD64X is not set
+# CONFIG_PATA_CS5520 is not set
+# CONFIG_PATA_CS5530 is not set
+# CONFIG_PATA_CYPRESS is not set
+# CONFIG_PATA_EFAR is not set
+# CONFIG_ATA_GENERIC is not set
+# CONFIG_PATA_HPT366 is not set
+# CONFIG_PATA_HPT37X is not set
+# CONFIG_PATA_HPT3X2N is not set
+# CONFIG_PATA_HPT3X3 is not set
+# CONFIG_PATA_IT821X is not set
+# CONFIG_PATA_IT8213 is not set
+# CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_TRIFLEX is not set
+# CONFIG_PATA_MARVELL is not set
+# CONFIG_PATA_MPIIX is not set
+# CONFIG_PATA_OLDPIIX is not set
+# CONFIG_PATA_NETCELL is not set
+# CONFIG_PATA_NINJA32 is not set
+# CONFIG_PATA_NS87410 is not set
+# CONFIG_PATA_NS87415 is not set
+# CONFIG_PATA_OPTI is not set
+# CONFIG_PATA_OPTIDMA is not set
+# CONFIG_PATA_PDC_OLD is not set
+# CONFIG_PATA_RADISYS is not set
+# CONFIG_PATA_RZ1000 is not set
+# CONFIG_PATA_SC1200 is not set
+# CONFIG_PATA_SERVERWORKS is not set
+# CONFIG_PATA_PDC2027X is not set
+# CONFIG_PATA_SIL680 is not set
+# CONFIG_PATA_SIS is not set
+# CONFIG_PATA_VIA is not set
+# CONFIG_PATA_WINBOND is not set
+# CONFIG_PATA_PLATFORM is not set
+# CONFIG_PATA_SCH is not set
+# CONFIG_MD is not set
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+
+#
+# Enable only one of the two stacks, unless you know what you are doing
+#
+# CONFIG_FIREWIRE is not set
+# CONFIG_IEEE1394 is not set
+# CONFIG_I2O is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_ARCNET is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+# CONFIG_NET_ETHERNET is not set
+CONFIG_NETDEV_1000=y
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+CONFIG_E1000=y
+# CONFIG_E1000E is not set
+# CONFIG_IP1000 is not set
+# CONFIG_IGB is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SKY2 is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+CONFIG_MV643XX_ETH=y
+# CONFIG_QLA3XXX is not set
+# CONFIG_ATL1 is not set
+# CONFIG_ATL1E is not set
+# CONFIG_ATL1C is not set
+# CONFIG_JME is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_TR is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NET_FC is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_DEVKMEM is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_NOZOMI is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+# CONFIG_SERIAL_8250_PCI is not set
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=2
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=16
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_DEVPORT=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# PC SMBus host controller drivers
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_ISCH is not set
+# CONFIG_I2C_PIIX4 is not set
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_GPIO is not set
+CONFIG_I2C_MV64XXX=y
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Graphics adapter I2C/DDC channel drivers
+#
+# CONFIG_I2C_VOODOO3 is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_MAX1535 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
+CONFIG_SPI_ORION=y
+# CONFIG_SPI_MV is not set
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+CONFIG_SOUND=y
+# CONFIG_SOUND_OSS_CORE is not set
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+# CONFIG_SND_SEQUENCER is not set
+# CONFIG_SND_MIXER_OSS is not set
+# CONFIG_SND_PCM_OSS is not set
+# CONFIG_SND_HRTIMER is not set
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+CONFIG_SND_DRIVERS=y
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+CONFIG_SND_PCI=y
+# CONFIG_SND_AD1889 is not set
+# CONFIG_SND_ALS300 is not set
+# CONFIG_SND_ALI5451 is not set
+# CONFIG_SND_ATIIXP is not set
+# CONFIG_SND_ATIIXP_MODEM is not set
+# CONFIG_SND_AU8810 is not set
+# CONFIG_SND_AU8820 is not set
+# CONFIG_SND_AU8830 is not set
+# CONFIG_SND_AW2 is not set
+# CONFIG_SND_AZT3328 is not set
+# CONFIG_SND_BT87X is not set
+# CONFIG_SND_CA0106 is not set
+# CONFIG_SND_CMIPCI is not set
+# CONFIG_SND_OXYGEN is not set
+# CONFIG_SND_CS4281 is not set
+# CONFIG_SND_CS46XX is not set
+# CONFIG_SND_DARLA20 is not set
+# CONFIG_SND_GINA20 is not set
+# CONFIG_SND_LAYLA20 is not set
+# CONFIG_SND_DARLA24 is not set
+# CONFIG_SND_GINA24 is not set
+# CONFIG_SND_LAYLA24 is not set
+# CONFIG_SND_MONA is not set
+# CONFIG_SND_MIA is not set
+# CONFIG_SND_ECHO3G is not set
+# CONFIG_SND_INDIGO is not set
+# CONFIG_SND_INDIGOIO is not set
+# CONFIG_SND_INDIGODJ is not set
+# CONFIG_SND_EMU10K1 is not set
+# CONFIG_SND_EMU10K1X is not set
+# CONFIG_SND_ENS1370 is not set
+# CONFIG_SND_ENS1371 is not set
+# CONFIG_SND_ES1938 is not set
+# CONFIG_SND_ES1968 is not set
+# CONFIG_SND_FM801 is not set
+# CONFIG_SND_HDA_INTEL is not set
+# CONFIG_SND_HDSP is not set
+# CONFIG_SND_HDSPM is not set
+# CONFIG_SND_HIFIER is not set
+# CONFIG_SND_ICE1712 is not set
+# CONFIG_SND_ICE1724 is not set
+# CONFIG_SND_INTEL8X0 is not set
+# CONFIG_SND_INTEL8X0M is not set
+# CONFIG_SND_KORG1212 is not set
+# CONFIG_SND_MAESTRO3 is not set
+# CONFIG_SND_MIXART is not set
+# CONFIG_SND_NM256 is not set
+# CONFIG_SND_PCXHR is not set
+# CONFIG_SND_RIPTIDE is not set
+# CONFIG_SND_RME32 is not set
+# CONFIG_SND_RME96 is not set
+# CONFIG_SND_RME9652 is not set
+# CONFIG_SND_SONICVIBES is not set
+# CONFIG_SND_TRIDENT is not set
+# CONFIG_SND_VIA82XX is not set
+# CONFIG_SND_VIA82XX_MODEM is not set
+# CONFIG_SND_VIRTUOSO is not set
+# CONFIG_SND_VX222 is not set
+# CONFIG_SND_YMFPCI is not set
+CONFIG_SND_ARM=y
+# CONFIG_SND_MRVL_AUDIO is not set
+CONFIG_SND_SPI=y
+CONFIG_SND_USB=y
+# CONFIG_SND_USB_AUDIO is not set
+# CONFIG_SND_USB_CAIAQ is not set
+CONFIG_SND_SOC=y
+
+#
+# SoC Audio for the Marvell SoC's
+#
+CONFIG_SND_DOVE_SOC_MRVL_AUDIO=y
+CONFIG_SND_SOC_I2C_AND_SPI=y
+# CONFIG_SND_SOC_ALL_CODECS is not set
+CONFIG_SND_SOC_CS42L51=y
+# CONFIG_SOUND_PRIME is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+# CONFIG_HID_PID is not set
+# CONFIG_USB_HIDDEV is not set
+
+#
+# Special HID drivers
+#
+CONFIG_HID_COMPAT=y
+# CONFIG_HID_A4TECH is not set
+# CONFIG_HID_APPLE is not set
+# CONFIG_HID_BELKIN is not set
+# CONFIG_HID_CHERRY is not set
+# CONFIG_HID_CHICONY is not set
+# CONFIG_HID_CYPRESS is not set
+# CONFIG_HID_EZKEY is not set
+# CONFIG_HID_GYRATION is not set
+# CONFIG_HID_LOGITECH is not set
+# CONFIG_HID_MICROSOFT is not set
+# CONFIG_HID_MONTEREY is not set
+# CONFIG_HID_NTRIG is not set
+# CONFIG_HID_PANTHERLORD is not set
+# CONFIG_HID_PETALYNX is not set
+# CONFIG_HID_SAMSUNG is not set
+# CONFIG_HID_SONY is not set
+# CONFIG_HID_SUNPLUS is not set
+# CONFIG_GREENASIA_FF is not set
+# CONFIG_HID_TOPSEED is not set
+# CONFIG_THRUSTMASTER_FF is not set
+# CONFIG_ZEROPLUS_FF is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_MON is not set
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+CONFIG_USB_EHCI_TT_NEWSCHED=y
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_OHCI_HCD is not set
+# CONFIG_USB_UHCI_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_WHCI_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+CONFIG_USB_PRINTER=y
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
+#
+
+#
+# see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+CONFIG_USB_STORAGE_DATAFAB=y
+CONFIG_USB_STORAGE_FREECOM=y
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+CONFIG_USB_STORAGE_SDDR09=y
+CONFIG_USB_STORAGE_SDDR55=y
+CONFIG_USB_STORAGE_JUMPSHOT=y
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+# CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_UWB is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+# CONFIG_MMC_SDHCI is not set
+# CONFIG_MMC_TIFM_SD is not set
+# CONFIG_MMC_SPI is not set
+CONFIG_MMC_MVSDMMC=y
+# CONFIG_MEMSTICK is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_NEW_LEDS=y
+# CONFIG_LEDS_CLASS is not set
+
+#
+# LED drivers
+#
+
+#
+# LED Triggers
+#
+# CONFIG_LEDS_TRIGGERS is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_MV=y
+CONFIG_DMADEVICES=y
+
+#
+# DMA Devices
+#
+CONFIG_MV_XOR=y
+CONFIG_DMA_ENGINE=y
+
+#
+# DMA Clients
+#
+# CONFIG_NET_DMA is not set
+# CONFIG_DMATEST is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_FS_XATTR is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_XFS_FS=y
+# CONFIG_XFS_QUOTA is not set
+# CONFIG_XFS_POSIX_ACL is not set
+# CONFIG_XFS_RT is not set
+# CONFIG_XFS_DEBUG is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=y
+CONFIG_JOLIET=y
+# CONFIG_ZISOFS is not set
+CONFIG_UDF_FS=m
+CONFIG_UDF_NLS=y
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+CONFIG_CRAMFS=y
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_REGISTER_V4 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+CONFIG_NLS_CODEPAGE_850=y
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_ISO8859_2=y
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=y
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+CONFIG_STACKTRACE=y
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_KPROBES_SANITY_TEST is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_LKDTM is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_NOP_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_RING_BUFFER=y
+CONFIG_TRACING=y
+
+#
+# Tracers
+#
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_FTRACE_STARTUP_TEST is not set
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_LL is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=m
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_MANAGER=m
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=m
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=m
+# CONFIG_CRYPTO_LRW is not set
+CONFIG_CRYPTO_PCBC=m
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+CONFIG_CRYPTO_CRC32C=y
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_CRYPTO_DEV_HIFN_795X is not set
+
+#
+# OCF Configuration
+#
+# CONFIG_OCF_OCF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=y
+CONFIG_CRC16=y
+# CONFIG_CRC_T10DIF is not set
+CONFIG_CRC_ITU_T=m
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+CONFIG_LIBCRC32C=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
--- linux-mvl-dove-2.6.32.orig/arch/arm/configs/dove_android_defconfig
+++ linux-mvl-dove-2.6.32/arch/arm/configs/dove_android_defconfig
@@ -0,0 +1,2776 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.32.9-dove-5.3.2.1
+# Mon Jul 26 17:24:57 2010
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_ARCH_HAS_CPUFREQ=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_OPROFILE_MRVL_PJ4=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_TASKSTATS=y
+CONFIG_TASK_DELAY_ACCT=y
+CONFIG_TASK_XACCT=y
+CONFIG_TASK_IO_ACCOUNTING=y
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_PANIC_TIMEOUT=0
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_ASHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_PCI_QUIRKS=y
+CONFIG_COMPAT_BRK=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+CONFIG_PROFILING=y
+CONFIG_TRACEPOINTS=y
+CONFIG_OPROFILE=y
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+CONFIG_LBDAF=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+CONFIG_FREEZER=y
+
+#
+# System Type
+#
+CONFIG_MMU=y
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+CONFIG_ARCH_DOVE=y
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5PC1XX is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_BCMRING is not set
+CONFIG_MV_HAL_RULES_PATH="arch/arm/mach-dove/mv_hal_support/mvRules.mk"
+
+#
+# Marvell Dove Implementations
+#
+CONFIG_DOVE_REV_Y0=y
+CONFIG_MACH_DOVE_RD_AVNG=y
+CONFIG_MV_INCLUDE_MPP_SYSFS=y
+# CONFIG_MACH_DOVE_RD is not set
+CONFIG_MACH_DOVE_DB=y
+CONFIG_MACH_DOVE_DB_B=y
+CONFIG_MACH_DOVE_VIDEOPLUG=y
+CONFIG_MV_HAL_DRIVERS_SUPPORT=y
+CONFIG_DOVE_PM_SUPPORT=y
+CONFIG_MV_EXT_VGA_CLOCK=y
+
+#
+# Orion SoC options
+#
+# CONFIG_MV_INCLUDE_IDMA is not set
+CONFIG_MV_INCLUDE_USB=y
+# CONFIG_MV_INCLUDE_XOR is not set
+CONFIG_MV_INCLUDE_CESA=y
+CONFIG_MV_INCLUDE_GIG_ETH=y
+CONFIG_MV_INCLUDE_AUDIO=y
+CONFIG_MV_INCLUDE_INTEG_SATA=y
+CONFIG_MV_INCLUDE_PMU=y
+CONFIG_MV_INCLUDE_NFC=y
+CONFIG_MV_DDRMMC=y
+
+#
+# Soc DMA accelerations
+#
+
+#
+# SoC Networking support
+#
+CONFIG_MV_ETHERNET=y
+CONFIG_MV_ETH_PORTS_NUM=1
+
+#
+# Network Interface Configuration
+#
+CONFIG_MV_ETH_0_MTU=1500
+CONFIG_MV_ETH_0_MACADDR=""
+
+#
+# Rx/Tx Queue Configuration
+#
+CONFIG_MV_ETH_RX_Q_NUM=1
+CONFIG_MV_ETH_TX_Q_NUM=1
+CONFIG_MV_ETH_NUM_OF_RX_DESCR=128
+CONFIG_MV_ETH_NUM_OF_TX_DESCR=532
+
+#
+# TCP/UDP Offloading
+#
+CONFIG_MV_ETH_TSO=y
+# CONFIG_MV_ETH_UFO is not set
+# CONFIG_MV_ETH_INET_LRO is not set
+
+#
+# Control and Statistics
+#
+CONFIG_MV_ETH_PROC=y
+CONFIG_MV_ETH_STATS_ERROR=y
+CONFIG_MV_ETH_STATS_INFO=y
+# CONFIG_MV_ETH_STATS_DEBUG is not set
+# CONFIG_MV_LINUX_COUNTERS_DISABLE is not set
+
+#
+# Advanced Features
+#
+CONFIG_MV_ETH_TIMER_PERIOD=1000
+CONFIG_MV_SKB_HEADROOM=32
+CONFIG_MV_SKB_REUSE=y
+# CONFIG_MV_ETH_NFP is not set
+# CONFIG_MV_GATEWAY is not set
+
+#
+# cesa options
+#
+CONFIG_MV_CESA=y
+CONFIG_MV_CESA_OCF=y
+CONFIG_MV_CESA_TOOL=y
+CONFIG_SCSI_MVSATA=y
+
+#
+# Sata options
+#
+CONFIG_MV_SATA_SUPPORT_ATAPI=y
+CONFIG_MV_SATA_ENABLE_1MB_IOS=y
+# CONFIG_SATA_NO_DEBUG is not set
+CONFIG_SATA_DEBUG_ON_ERROR=y
+# CONFIG_SATA_FULL_DEBUG is not set
+
+#
+# Marvell Key driver
+#
+# CONFIG_MV_GPIO_KEY is not set
+# CONFIG_MV_TOUCH_KEY is not set
+# CONFIG_MV_TOUCH_SLIDER is not set
+CONFIG_MV_EC_KEY=y
+# CONFIG_MV_DBG_TRACE is not set
+CONFIG_PLAT_ORION=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+# CONFIG_CPU_V6 is not set
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_V7=y
+CONFIG_CPU_32v7=y
+CONFIG_CPU_PJ4=y
+CONFIG_CPU_ABRT_EV7=y
+CONFIG_CPU_PABRT_V7=y
+CONFIG_CPU_CACHE_V7=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V7=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+CONFIG_ARM_THUMBEE=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_OUTER_CACHE=y
+CONFIG_ARM_L1_CACHE_SHIFT=5
+CONFIG_CACHE_TAUROS2=y
+CONFIG_MRV_PTE_IN_L2=y
+# CONFIG_MV_L2_WA_ON is not set
+CONFIG_MV_L2_PREFETCH_OFF=y
+CONFIG_CPU_PJ4_PMC_ACCESS_IN_USERMODE=y
+# CONFIG_DOVE_DEBUGGER_MODE_V6 is not set
+CONFIG_CPU_ENABLE_WRITECO=y
+CONFIG_CPU_WRITECO_CYCLE=3
+CONFIG_CPU_WA_DISABLE=y
+# CONFIG_CPU_WA_ENABLE is not set
+# CONFIG_CPU_L1WAONLY_ENABLE is not set
+CONFIG_IWMMXT=y
+CONFIG_MRVL_ERRATA_THUMB_VLDR=y
+# CONFIG_ARM_ERRATA_430973 is not set
+# CONFIG_ARM_ERRATA_458693 is not set
+# CONFIG_ARM_ERRATA_460075 is not set
+CONFIG_COMMON_CLKDEV=y
+CONFIG_FORCE_MAX_ZONEORDER=19
+
+#
+# Bus support
+#
+CONFIG_PCI=y
+CONFIG_PCI_SYSCALL=y
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_PCI_LEGACY=y
+# CONFIG_PCI_DEBUG is not set
+# CONFIG_PCI_STUB is not set
+# CONFIG_PCI_IOV is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=100
+# CONFIG_THUMB2_KERNEL is not set
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+CONFIG_HIGHMEM=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_HAVE_MLOCK=y
+CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE=""
+# CONFIG_XIP_KERNEL is not set
+CONFIG_KEXEC=y
+CONFIG_ATAGS_PROC=y
+
+#
+# CPU Power Management
+#
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_TABLE=y
+# CONFIG_CPU_FREQ_DEBUG is not set
+CONFIG_CPU_FREQ_STAT=y
+CONFIG_CPU_FREQ_STAT_DETAILS=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+CONFIG_CPU_FREQ_DOVE=y
+CONFIG_CPU_IDLE=y
+CONFIG_CPU_IDLE_GOV_LADDER=y
+CONFIG_CPU_IDLE_GOV_MENU=y
+CONFIG_CPU_IDLE_GOV_USER=y
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+# CONFIG_FPE_NWFPE is not set
+# CONFIG_FPE_FASTFPE is not set
+CONFIG_VFP=y
+CONFIG_VFPv3=y
+# CONFIG_NEON is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+CONFIG_HIBERNATION_NVS=y
+CONFIG_HAS_WAKELOCK=y
+CONFIG_HAS_EARLYSUSPEND=y
+CONFIG_WAKELOCK=y
+CONFIG_WAKELOCK_STAT=y
+CONFIG_USER_WAKELOCK=y
+CONFIG_EARLYSUSPEND=y
+# CONFIG_NO_USER_SPACE_SCREEN_ACCESS_CONTROL is not set
+CONFIG_CONSOLE_EARLYSUSPEND=y
+# CONFIG_FB_EARLYSUSPEND is not set
+CONFIG_HIBERNATION=y
+CONFIG_PM_STD_PARTITION=""
+CONFIG_APM_EMULATION=y
+# CONFIG_PM_RUNTIME is not set
+CONFIG_APM_EMU_DS2782=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+CONFIG_INET_LRO=y
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+CONFIG_IPV6=y
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+# CONFIG_INET6_AH is not set
+# CONFIG_INET6_ESP is not set
+# CONFIG_INET6_IPCOMP is not set
+# CONFIG_IPV6_MIP6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET6_XFRM_MODE_BEET is not set
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+# CONFIG_IPV6_SIT is not set
+# CONFIG_IPV6_TUNNEL is not set
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_IPV6_MROUTE is not set
+CONFIG_ANDROID_PARANOID_NETWORK=y
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+CONFIG_NET_PKTGEN=m
+# CONFIG_NET_DROP_MONITOR is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+CONFIG_BT=m
+CONFIG_BT_L2CAP=m
+CONFIG_BT_SCO=m
+CONFIG_BT_RFCOMM=m
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=m
+# CONFIG_BT_BNEP_MC_FILTER is not set
+# CONFIG_BT_BNEP_PROTO_FILTER is not set
+CONFIG_BT_HIDP=m
+
+#
+# Bluetooth device drivers
+#
+# CONFIG_BT_HCIBTUSB is not set
+# CONFIG_BT_HCIBTSDIO is not set
+# CONFIG_BT_HCIUART is not set
+# CONFIG_BT_HCIBCM203X is not set
+# CONFIG_BT_HCIBPA10X is not set
+# CONFIG_BT_HCIBFUSB is not set
+# CONFIG_BT_HCIVHCI is not set
+# CONFIG_BT_MRVL is not set
+# CONFIG_AF_RXRPC is not set
+CONFIG_WIRELESS=y
+# CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
+CONFIG_WIRELESS_OLD_REGULATORY=y
+CONFIG_WIRELESS_EXT=y
+CONFIG_WIRELESS_EXT_SYSFS=y
+CONFIG_LIB80211=y
+# CONFIG_LIB80211_DEBUG is not set
+
+#
+# CFG80211 needs to be enabled for MAC80211
+#
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH=""
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_TESTS=m
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+CONFIG_MTD_CFI_GEOMETRY=y
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_OTP is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+CONFIG_MTD_CFI_STAA=y
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_IMPA7 is not set
+# CONFIG_MTD_INTEL_VR_NOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_DATAFLASH is not set
+CONFIG_MTD_M25P80=y
+CONFIG_M25PXX_USE_FAST_READ=y
+# CONFIG_MTD_SST25L is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+# CONFIG_MTD_NAND_GPIO is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_CAFE is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
+# CONFIG_MTD_NAND_ORION is not set
+# CONFIG_MTD_NFC_ORION is not set
+CONFIG_MTD_NFC_HAL_ORION=y
+CONFIG_MV_MTD_GANG_SUPPORT=y
+CONFIG_MV_MTD_MLC_NAND_SUPPORT=y
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_MTD_UBI_BEB_RESERVE=1
+# CONFIG_MTD_UBI_GLUEBI is not set
+
+#
+# UBI debugging options
+#
+# CONFIG_MTD_UBI_DEBUG is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=1
+CONFIG_BLK_DEV_RAM_SIZE=4096
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MG_DISK is not set
+CONFIG_MISC_DEVICES=y
+CONFIG_ANDROID_PMEM=y
+# CONFIG_PHANTOM is not set
+# CONFIG_SGI_IOC4 is not set
+# CONFIG_TIFM_CORE is not set
+# CONFIG_ICS932S401 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_KERNEL_DEBUGGER_CORE is not set
+# CONFIG_HP_ILO is not set
+# CONFIG_UID_STAT is not set
+# CONFIG_ISL29003 is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_AT25 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_MAX6875 is not set
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_CB710_CORE is not set
+CONFIG_DOVE_MRVL_BMM=m
+CONFIG_DOVE_VPU_USE_BMM=y
+# CONFIG_DOVE_GPU_USE_BMM is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_SCSI_PROC_FS is not set
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+CONFIG_BLK_DEV_SR=m
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+CONFIG_CHR_DEV_SG=m
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_SCSI_BNX2_ISCSI is not set
+# CONFIG_BE2ISCSI is not set
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_AIC94XX is not set
+# CONFIG_SCSI_MVSAS is not set
+# CONFIG_MVUMI_SAS is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_SCSI_ARCMSR is not set
+# CONFIG_MEGARAID_NEWGEN is not set
+# CONFIG_MEGARAID_LEGACY is not set
+# CONFIG_MEGARAID_SAS is not set
+# CONFIG_SCSI_MPT2SAS is not set
+# CONFIG_SCSI_HPTIOP is not set
+# CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
+# CONFIG_FCOE is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_STEX is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
+# CONFIG_SCSI_IPR is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_QLA_FC is not set
+# CONFIG_SCSI_QLA_ISCSI is not set
+# CONFIG_SCSI_LPFC is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_NSP32 is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_PMCRAID is not set
+# CONFIG_SCSI_SRP is not set
+# CONFIG_SCSI_BFA_FC is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+CONFIG_ATA=y
+# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_ATA_VERBOSE_ERROR=y
+CONFIG_SATA_PMP=y
+CONFIG_SATA_AHCI=m
+# CONFIG_SATA_SIL24 is not set
+CONFIG_ATA_SFF=y
+# CONFIG_SATA_SVW is not set
+# CONFIG_ATA_PIIX is not set
+CONFIG_SATA_MV=y
+# CONFIG_SATA_NV is not set
+# CONFIG_PDC_ADMA is not set
+# CONFIG_SATA_QSTOR is not set
+# CONFIG_SATA_PROMISE is not set
+# CONFIG_SATA_SX4 is not set
+# CONFIG_SATA_SIL is not set
+# CONFIG_SATA_SIS is not set
+# CONFIG_SATA_ULI is not set
+# CONFIG_SATA_VIA is not set
+# CONFIG_SATA_VITESSE is not set
+# CONFIG_SATA_INIC162X is not set
+# CONFIG_PATA_ALI is not set
+# CONFIG_PATA_AMD is not set
+# CONFIG_PATA_ARTOP is not set
+# CONFIG_PATA_ATP867X is not set
+# CONFIG_PATA_ATIIXP is not set
+# CONFIG_PATA_CMD640_PCI is not set
+# CONFIG_PATA_CMD64X is not set
+# CONFIG_PATA_CS5520 is not set
+# CONFIG_PATA_CS5530 is not set
+# CONFIG_PATA_CYPRESS is not set
+# CONFIG_PATA_EFAR is not set
+# CONFIG_ATA_GENERIC is not set
+# CONFIG_PATA_HPT366 is not set
+# CONFIG_PATA_HPT37X is not set
+# CONFIG_PATA_HPT3X2N is not set
+# CONFIG_PATA_HPT3X3 is not set
+# CONFIG_PATA_IT821X is not set
+# CONFIG_PATA_IT8213 is not set
+# CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_TRIFLEX is not set
+# CONFIG_PATA_MARVELL is not set
+# CONFIG_PATA_MPIIX is not set
+# CONFIG_PATA_OLDPIIX is not set
+# CONFIG_PATA_NETCELL is not set
+# CONFIG_PATA_NINJA32 is not set
+# CONFIG_PATA_NS87410 is not set
+# CONFIG_PATA_NS87415 is not set
+# CONFIG_PATA_OPTI is not set
+# CONFIG_PATA_OPTIDMA is not set
+# CONFIG_PATA_PDC_OLD is not set
+# CONFIG_PATA_RADISYS is not set
+# CONFIG_PATA_RDC is not set
+# CONFIG_PATA_RZ1000 is not set
+# CONFIG_PATA_SC1200 is not set
+# CONFIG_PATA_SERVERWORKS is not set
+# CONFIG_PATA_PDC2027X is not set
+# CONFIG_PATA_SIL680 is not set
+# CONFIG_PATA_SIS is not set
+# CONFIG_PATA_VIA is not set
+# CONFIG_PATA_WINBOND is not set
+# CONFIG_PATA_PLATFORM is not set
+# CONFIG_PATA_SCH is not set
+CONFIG_MD=y
+CONFIG_BLK_DEV_MD=m
+CONFIG_MD_LINEAR=m
+CONFIG_MD_RAID0=m
+CONFIG_MD_RAID1=m
+# CONFIG_MD_RAID10 is not set
+CONFIG_MD_RAID456=m
+CONFIG_MD_RAID6_PQ=m
+# CONFIG_ASYNC_RAID6_TEST is not set
+# CONFIG_MD_MULTIPATH is not set
+# CONFIG_MD_FAULTY is not set
+CONFIG_BLK_DEV_DM=y
+# CONFIG_DM_DEBUG is not set
+CONFIG_DM_CRYPT=y
+CONFIG_DM_SNAPSHOT=m
+CONFIG_DM_MIRROR=m
+# CONFIG_DM_LOG_USERSPACE is not set
+CONFIG_DM_ZERO=m
+# CONFIG_DM_MULTIPATH is not set
+# CONFIG_DM_DELAY is not set
+# CONFIG_DM_UEVENT is not set
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+
+#
+# You can enable one or both FireWire driver stacks.
+#
+
+#
+# See the help texts for more information.
+#
+# CONFIG_FIREWIRE is not set
+# CONFIG_IEEE1394 is not set
+# CONFIG_I2O is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_ARCNET is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_AX88796 is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_CASSINI is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMC911X is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+CONFIG_NET_PCI=y
+# CONFIG_PCNET32 is not set
+# CONFIG_AMD8111_ETH is not set
+# CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_B44 is not set
+# CONFIG_FORCEDETH is not set
+CONFIG_E100=y
+# CONFIG_FEALNX is not set
+# CONFIG_NATSEMI is not set
+# CONFIG_NE2K_PCI is not set
+# CONFIG_8139CP is not set
+# CONFIG_8139TOO is not set
+# CONFIG_R6040 is not set
+# CONFIG_SIS900 is not set
+# CONFIG_EPIC100 is not set
+# CONFIG_SMSC9420 is not set
+# CONFIG_SUNDANCE is not set
+# CONFIG_TLAN is not set
+# CONFIG_KS8842 is not set
+# CONFIG_KS8851 is not set
+# CONFIG_KS8851_MLL is not set
+# CONFIG_VIA_RHINE is not set
+# CONFIG_SC92031 is not set
+# CONFIG_ATL2 is not set
+CONFIG_NETDEV_1000=y
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+CONFIG_E1000=y
+CONFIG_E1000E=y
+# CONFIG_IP1000 is not set
+# CONFIG_IGB is not set
+# CONFIG_IGBVF is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+CONFIG_SKY2=y
+# CONFIG_SKY2_DEBUG is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+# CONFIG_CNIC is not set
+CONFIG_MV643XX_ETH=y
+# CONFIG_QLA3XXX is not set
+# CONFIG_ATL1 is not set
+# CONFIG_ATL1E is not set
+# CONFIG_ATL1C is not set
+# CONFIG_JME is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_TR is not set
+CONFIG_WLAN=y
+# CONFIG_WLAN_PRE80211 is not set
+CONFIG_WLAN_80211=y
+# CONFIG_LIBERTAS is not set
+# CONFIG_ATMEL is not set
+# CONFIG_PRISM54 is not set
+# CONFIG_USB_ZD1201 is not set
+# CONFIG_HOSTAP is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NET_FC is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+CONFIG_INPUT_FF_MEMLESS=m
+CONFIG_INPUT_POLLDEV=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+# CONFIG_INPUT_APMPOWER is not set
+# CONFIG_INPUT_KEYRESET is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ADP5588 is not set
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_QT2160 is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+CONFIG_INPUT_MOUSE=y
+# CONFIG_MOUSE_PS2 is not set
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_APPLETOUCH is not set
+# CONFIG_MOUSE_BCM5974 is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+CONFIG_MOUSE_GPIO=y
+# CONFIG_MOUSE_SYNAPTICS_I2C is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_ADS7846=y
+# CONFIG_TOUCHSCREEN_AD7877 is not set
+# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
+# CONFIG_TOUCHSCREEN_AD7879_SPI is not set
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+# CONFIG_TOUCHSCREEN_EETI is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MCS5000 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_WM97XX is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+CONFIG_TOUCHSCREEN_TSC2005=y
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
+# CONFIG_TOUCHSCREEN_W90X900 is not set
+CONFIG_TOUCHSCREEN_RT5611=y
+# CONFIG_INPUT_MISC is not set
+# CONFIG_INPUT_GPIO is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+# CONFIG_DEVKMEM is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_NOZOMI is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+# CONFIG_SERIAL_8250_PCI is not set
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=2
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_MAX3100 is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=16
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_DEVPORT=y
+# CONFIG_DCC_TTY is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_HELPER_AUTO=y
+CONFIG_I2C_ALGOBIT=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# PC SMBus host controller drivers
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_ISCH is not set
+# CONFIG_I2C_PIIX4 is not set
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_DESIGNWARE is not set
+# CONFIG_I2C_GPIO is not set
+CONFIG_I2C_MV64XXX=y
+CONFIG_I2C_MV64XXX_PORT_EXPANDER=y
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Graphics adapter I2C/DDC channel drivers
+#
+# CONFIG_I2C_VOODOO3 is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+CONFIG_MAX1535=y
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
+CONFIG_SPI_ORION=y
+CONFIG_SPI_MV=y
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+CONFIG_GPIO_PCA953X=y
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+# CONFIG_GPIO_LANGWELL is not set
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_GPIO_MC33880 is not set
+
+#
+# AC97 GPIO expanders:
+#
+CONFIG_W1=y
+
+#
+# 1-wire Bus Masters
+#
+# CONFIG_W1_MASTER_MATROX is not set
+# CONFIG_W1_MASTER_DS2490 is not set
+# CONFIG_W1_MASTER_DS2482 is not set
+# CONFIG_W1_MASTER_DS1WM is not set
+# CONFIG_W1_MASTER_GPIO is not set
+
+#
+# 1-wire Slaves
+#
+# CONFIG_W1_SLAVE_THERM is not set
+# CONFIG_W1_SLAVE_SMEM is not set
+# CONFIG_W1_SLAVE_DS2431 is not set
+# CONFIG_W1_SLAVE_DS2433 is not set
+CONFIG_W1_SLAVE_DS2760=y
+# CONFIG_W1_SLAVE_BQ27000 is not set
+CONFIG_POWER_SUPPLY=y
+# CONFIG_POWER_SUPPLY_DEBUG is not set
+# CONFIG_PDA_POWER is not set
+CONFIG_APM_POWER=y
+CONFIG_BATTERY_DS2760=y
+# CONFIG_BATTERY_DS2782 is not set
+CONFIG_BATTERY_BQ2084=y
+# CONFIG_BATTERY_BQ27x00 is not set
+# CONFIG_BATTERY_MAX17040 is not set
+# CONFIG_BATTERY_MCU is not set
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Native drivers
+#
+CONFIG_BMA020=y
+# CONFIG_SENSORS_AD7414 is not set
+# CONFIG_SENSORS_AD7418 is not set
+# CONFIG_SENSORS_ADCXX is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1029 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7462 is not set
+# CONFIG_SENSORS_ADT7470 is not set
+# CONFIG_SENSORS_ADT7473 is not set
+# CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ATXP1 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_I5K_AMB is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_G760A is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM70 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_LTC4215 is not set
+# CONFIG_SENSORS_LTC4245 is not set
+# CONFIG_SENSORS_LM95241 is not set
+# CONFIG_SENSORS_MAX1111 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_MAX6650 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_SHT15 is not set
+# CONFIG_SENSORS_SIS5595 is not set
+# CONFIG_SENSORS_DME1737 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47M192 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_TMP401 is not set
+# CONFIG_SENSORS_TMP421 is not set
+# CONFIG_SENSORS_VIA686A is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_VT8231 is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83791D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83793 is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83L786NG is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_SENSORS_LIS3_SPI is not set
+CONFIG_SENSORS_DOVE=y
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_UCB1400_CORE is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_MFD_MC13783 is not set
+# CONFIG_AB3100_CORE is not set
+# CONFIG_EZX_PCAP is not set
+# CONFIG_REGULATOR is not set
+CONFIG_MEDIA_SUPPORT=y
+
+#
+# Multimedia core support
+#
+CONFIG_VIDEO_DEV=y
+CONFIG_VIDEO_V4L2_COMMON=y
+CONFIG_VIDEO_ALLOW_V4L1=y
+CONFIG_VIDEO_V4L1_COMPAT=y
+# CONFIG_DVB_CORE is not set
+CONFIG_VIDEO_MEDIA=y
+
+#
+# Multimedia drivers
+#
+CONFIG_VIDEO_SAA7146=m
+CONFIG_VIDEO_SAA7146_VV=m
+# CONFIG_MEDIA_ATTACH is not set
+CONFIG_MEDIA_TUNER=y
+# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
+CONFIG_MEDIA_TUNER_SIMPLE=y
+CONFIG_MEDIA_TUNER_TDA8290=y
+CONFIG_MEDIA_TUNER_TDA9887=y
+CONFIG_MEDIA_TUNER_TEA5761=y
+CONFIG_MEDIA_TUNER_TEA5767=y
+CONFIG_MEDIA_TUNER_MT20XX=y
+CONFIG_MEDIA_TUNER_XC2028=y
+CONFIG_MEDIA_TUNER_XC5000=y
+CONFIG_MEDIA_TUNER_MC44S803=y
+CONFIG_VIDEO_V4L2=y
+CONFIG_VIDEO_V4L1=y
+CONFIG_VIDEOBUF_GEN=m
+CONFIG_VIDEOBUF_DMA_SG=m
+CONFIG_VIDEOBUF_VMALLOC=m
+CONFIG_VIDEOBUF_DMA_CONTIG=m
+CONFIG_VIDEO_BTCX=m
+CONFIG_VIDEO_IR=m
+CONFIG_VIDEO_TVEEPROM=m
+CONFIG_VIDEO_TUNER=m
+CONFIG_VIDEO_CAPTURE_DRIVERS=y
+# CONFIG_VIDEO_ADV_DEBUG is not set
+# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
+CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
+CONFIG_VIDEO_IR_I2C=m
+CONFIG_VIDEO_TVAUDIO=m
+CONFIG_VIDEO_TDA7432=m
+CONFIG_VIDEO_TDA9840=m
+CONFIG_VIDEO_TEA6415C=m
+CONFIG_VIDEO_TEA6420=m
+CONFIG_VIDEO_MSP3400=m
+CONFIG_VIDEO_CS53L32A=m
+CONFIG_VIDEO_M52790=m
+CONFIG_VIDEO_WM8775=m
+CONFIG_VIDEO_WM8739=m
+CONFIG_VIDEO_VP27SMPX=m
+CONFIG_VIDEO_SAA6588=m
+CONFIG_VIDEO_BT819=m
+CONFIG_VIDEO_BT856=m
+CONFIG_VIDEO_BT866=m
+CONFIG_VIDEO_KS0127=m
+CONFIG_VIDEO_OV7670=y
+CONFIG_VIDEO_OV7680=y
+CONFIG_VIDEO_MT9V011=m
+CONFIG_VIDEO_SAA7110=m
+CONFIG_VIDEO_SAA711X=m
+CONFIG_VIDEO_SAA717X=m
+CONFIG_VIDEO_TVP5150=m
+CONFIG_VIDEO_VPX3220=m
+CONFIG_VIDEO_CX25840=m
+CONFIG_VIDEO_CX2341X=m
+CONFIG_VIDEO_SAA7127=m
+CONFIG_VIDEO_SAA7185=m
+CONFIG_VIDEO_ADV7170=m
+CONFIG_VIDEO_ADV7175=m
+CONFIG_VIDEO_UPD64031A=m
+CONFIG_VIDEO_UPD64083=m
+# CONFIG_VIDEO_VIVI is not set
+CONFIG_VIDEO_BT848=m
+CONFIG_VIDEO_CPIA=m
+CONFIG_VIDEO_CPIA_USB=m
+CONFIG_VIDEO_CPIA2=m
+CONFIG_VIDEO_SAA5246A=m
+CONFIG_VIDEO_SAA5249=m
+CONFIG_VIDEO_STRADIS=m
+CONFIG_VIDEO_ZORAN=m
+CONFIG_VIDEO_ZORAN_DC30=m
+CONFIG_VIDEO_ZORAN_ZR36060=m
+CONFIG_VIDEO_ZORAN_BUZ=m
+CONFIG_VIDEO_ZORAN_DC10=m
+CONFIG_VIDEO_ZORAN_LML33=m
+CONFIG_VIDEO_ZORAN_LML33R10=m
+CONFIG_VIDEO_ZORAN_AVS6EYES=m
+CONFIG_VIDEO_SAA7134=m
+CONFIG_VIDEO_SAA7134_ALSA=m
+CONFIG_VIDEO_MXB=m
+CONFIG_VIDEO_HEXIUM_ORION=m
+CONFIG_VIDEO_HEXIUM_GEMINI=m
+CONFIG_VIDEO_CX88=m
+CONFIG_VIDEO_CX88_ALSA=m
+CONFIG_VIDEO_CX88_BLACKBIRD=m
+CONFIG_VIDEO_CX88_MPEG=m
+CONFIG_VIDEO_IVTV=m
+CONFIG_VIDEO_FB_IVTV=m
+CONFIG_VIDEO_CAFE_CCIC=y
+CONFIG_SOC_CAMERA=m
+CONFIG_SOC_CAMERA_MT9M001=m
+CONFIG_SOC_CAMERA_MT9M111=m
+CONFIG_SOC_CAMERA_MT9T031=m
+CONFIG_SOC_CAMERA_MT9V022=m
+CONFIG_SOC_CAMERA_TW9910=m
+CONFIG_SOC_CAMERA_PLATFORM=m
+CONFIG_SOC_CAMERA_OV772X=m
+CONFIG_VIDEO_SH_MOBILE_CEU=m
+CONFIG_V4L_USB_DRIVERS=y
+CONFIG_USB_VIDEO_CLASS=m
+CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
+CONFIG_USB_GSPCA=m
+CONFIG_USB_M5602=m
+CONFIG_USB_STV06XX=m
+# CONFIG_USB_GL860 is not set
+CONFIG_USB_GSPCA_CONEX=m
+CONFIG_USB_GSPCA_ETOMS=m
+CONFIG_USB_GSPCA_FINEPIX=m
+# CONFIG_USB_GSPCA_JEILINJ is not set
+CONFIG_USB_GSPCA_MARS=m
+CONFIG_USB_GSPCA_MR97310A=m
+CONFIG_USB_GSPCA_OV519=m
+CONFIG_USB_GSPCA_OV534=m
+CONFIG_USB_GSPCA_PAC207=m
+CONFIG_USB_GSPCA_PAC7311=m
+CONFIG_USB_GSPCA_SN9C20X=m
+CONFIG_USB_GSPCA_SN9C20X_EVDEV=y
+CONFIG_USB_GSPCA_SONIXB=m
+CONFIG_USB_GSPCA_SONIXJ=m
+CONFIG_USB_GSPCA_SPCA500=m
+CONFIG_USB_GSPCA_SPCA501=m
+CONFIG_USB_GSPCA_SPCA505=m
+CONFIG_USB_GSPCA_SPCA506=m
+CONFIG_USB_GSPCA_SPCA508=m
+CONFIG_USB_GSPCA_SPCA561=m
+CONFIG_USB_GSPCA_SQ905=m
+CONFIG_USB_GSPCA_SQ905C=m
+CONFIG_USB_GSPCA_STK014=m
+CONFIG_USB_GSPCA_SUNPLUS=m
+CONFIG_USB_GSPCA_T613=m
+CONFIG_USB_GSPCA_TV8532=m
+CONFIG_USB_GSPCA_VC032X=m
+CONFIG_USB_GSPCA_ZC3XX=m
+CONFIG_VIDEO_PVRUSB2=m
+CONFIG_VIDEO_PVRUSB2_SYSFS=y
+# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set
+CONFIG_VIDEO_HDPVR=m
+CONFIG_VIDEO_EM28XX=m
+CONFIG_VIDEO_EM28XX_ALSA=m
+CONFIG_VIDEO_CX231XX=m
+CONFIG_VIDEO_CX231XX_ALSA=m
+CONFIG_VIDEO_USBVISION=m
+CONFIG_VIDEO_USBVIDEO=m
+CONFIG_USB_VICAM=m
+CONFIG_USB_IBMCAM=m
+CONFIG_USB_KONICAWC=m
+CONFIG_USB_QUICKCAM_MESSENGER=m
+CONFIG_USB_ET61X251=m
+CONFIG_VIDEO_OVCAMCHIP=m
+CONFIG_USB_W9968CF=m
+CONFIG_USB_OV511=m
+CONFIG_USB_SE401=m
+CONFIG_USB_SN9C102=m
+CONFIG_USB_STV680=m
+CONFIG_USB_ZC0301=m
+CONFIG_USB_PWC=m
+# CONFIG_USB_PWC_DEBUG is not set
+CONFIG_USB_PWC_INPUT_EVDEV=y
+CONFIG_USB_ZR364XX=m
+CONFIG_USB_STKWEBCAM=m
+CONFIG_USB_S2255=m
+CONFIG_RADIO_ADAPTERS=y
+# CONFIG_RADIO_GEMTEK_PCI is not set
+# CONFIG_RADIO_MAXIRADIO is not set
+# CONFIG_RADIO_MAESTRO is not set
+# CONFIG_I2C_SI4713 is not set
+# CONFIG_RADIO_SI4713 is not set
+# CONFIG_USB_DSBR is not set
+# CONFIG_RADIO_SI470X is not set
+# CONFIG_USB_MR800 is not set
+# CONFIG_RADIO_TEA5764 is not set
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+CONFIG_VGA_ARB=y
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_DOVE_GPU=y
+CONFIG_DOVE_GPU_MEM_SIZE=128
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+CONFIG_FB_DDC=y
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+CONFIG_FB_MODE_HELPERS=y
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_CIRRUS is not set
+# CONFIG_FB_PM2 is not set
+# CONFIG_FB_CYBER2000 is not set
+# CONFIG_FB_ASILIANT is not set
+# CONFIG_FB_IMSTT is not set
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_NVIDIA is not set
+# CONFIG_FB_RIVA is not set
+# CONFIG_FB_MATROX is not set
+# CONFIG_FB_RADEON is not set
+# CONFIG_FB_ATY128 is not set
+# CONFIG_FB_ATY is not set
+# CONFIG_FB_S3 is not set
+# CONFIG_FB_SAVAGE is not set
+# CONFIG_FB_SIS is not set
+# CONFIG_FB_VIA is not set
+# CONFIG_FB_NEOMAGIC is not set
+# CONFIG_FB_KYRO is not set
+# CONFIG_FB_3DFX is not set
+# CONFIG_FB_VOODOO1 is not set
+# CONFIG_FB_VT8623 is not set
+# CONFIG_FB_TRIDENT is not set
+# CONFIG_FB_ARK is not set
+# CONFIG_FB_PM3 is not set
+# CONFIG_FB_CARMINE is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+# CONFIG_FB_BROADSHEET is not set
+CONFIG_FB_DOVE=y
+CONFIG_FB_DOVE_CONSISTENT_DMA_SIZE=14
+CONFIG_FB_DOVE_CLCD=y
+
+#
+# LCD0 I2C setting
+#
+CONFIG_FB_DOVE_CLCD0_I2C_DEFAULT_SETTING=y
+CONFIG_FB_DOVE_CLCD1=y
+
+#
+# LCD1 I2C setting
+#
+CONFIG_FB_DOVE_CLCD1_I2C_DEFAULT_SETTING=y
+CONFIG_FB_DOVE_CLCD_EDID=y
+CONFIG_FB_DOVE_DCON=y
+CONFIG_FB_DOVE_CLCD_DCONA_BYPASS=y
+# CONFIG_FB_DOVE_CLCD_DCONA_OLPC is not set
+# CONFIG_FB_DOVE_CLCD_DCONA_DUALVIEW is not set
+# CONFIG_FB_DOVE_CLCD_DCONA_MODE is not set
+CONFIG_FB_DOVE_CLCD_DCONB_BYPASS1=y
+# CONFIG_FB_DOVE_CLCD_DCONB_BYPASS0 is not set
+
+#
+# DOVE LCD clock source
+#
+CONFIG_FB_DOVE_CLCD_USE_PLL_CLK=y
+CONFIG_FB_DOVE_CLCD_SCLK_VALUE=1000
+CONFIG_FB_DOVE_CLCD_DEFAULT_OPTION="lcd0:1280x768-24@60,lcd1:1024x768-16@60"
+CONFIG_DOVEFB_DISPLAY_MODE=y
+# CONFIG_FB_DOVE_CLCD_FLAREON_GV is not set
+# CONFIG_FB_MUSTANG_CLCD is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_LCD_CLASS_DEVICE=y
+# CONFIG_LCD_LMS283GF05 is not set
+# CONFIG_LCD_LTV350QV is not set
+# CONFIG_LCD_ILI9320 is not set
+# CONFIG_LCD_TDO24M is not set
+# CONFIG_LCD_VGG2432A4 is not set
+# CONFIG_LCD_PLATFORM is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_GENERIC=y
+CONFIG_BACKLIGHT_DOVE=y
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+# CONFIG_CH7025_COMPOSITE is not set
+# CONFIG_KG2_ANX7150 is not set
+CONFIG_ADI9889=y
+CONFIG_THS8200=y
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_LOGO_LINUX_CLUT224=y
+CONFIG_SOUND=y
+CONFIG_SOUND_OSS_CORE=y
+CONFIG_SOUND_OSS_CORE_PRECLAIM=y
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+CONFIG_SND_HWDEP=m
+CONFIG_SND_RAWMIDI=m
+CONFIG_SND_JACK=y
+# CONFIG_SND_SEQUENCER is not set
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=m
+CONFIG_SND_PCM_OSS=m
+CONFIG_SND_PCM_OSS_PLUGINS=y
+# CONFIG_SND_HRTIMER is not set
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+CONFIG_SND_VMASTER=y
+# CONFIG_SND_RAWMIDI_SEQ is not set
+# CONFIG_SND_OPL3_LIB_SEQ is not set
+# CONFIG_SND_OPL4_LIB_SEQ is not set
+# CONFIG_SND_SBAWE_SEQ is not set
+# CONFIG_SND_EMU10K1_SEQ is not set
+CONFIG_SND_AC97_CODEC=y
+CONFIG_SND_DRIVERS=y
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+# CONFIG_SND_AC97_POWER_SAVE is not set
+CONFIG_SND_PCI=y
+# CONFIG_SND_AD1889 is not set
+# CONFIG_SND_ALS300 is not set
+# CONFIG_SND_ALI5451 is not set
+# CONFIG_SND_ATIIXP is not set
+# CONFIG_SND_ATIIXP_MODEM is not set
+# CONFIG_SND_AU8810 is not set
+# CONFIG_SND_AU8820 is not set
+# CONFIG_SND_AU8830 is not set
+# CONFIG_SND_AW2 is not set
+# CONFIG_SND_AZT3328 is not set
+# CONFIG_SND_BT87X is not set
+# CONFIG_SND_CA0106 is not set
+# CONFIG_SND_CMIPCI is not set
+# CONFIG_SND_OXYGEN is not set
+# CONFIG_SND_CS4281 is not set
+# CONFIG_SND_CS46XX is not set
+# CONFIG_SND_CS5535AUDIO is not set
+# CONFIG_SND_CTXFI is not set
+# CONFIG_SND_DARLA20 is not set
+# CONFIG_SND_GINA20 is not set
+# CONFIG_SND_LAYLA20 is not set
+# CONFIG_SND_DARLA24 is not set
+# CONFIG_SND_GINA24 is not set
+# CONFIG_SND_LAYLA24 is not set
+# CONFIG_SND_MONA is not set
+# CONFIG_SND_MIA is not set
+# CONFIG_SND_ECHO3G is not set
+# CONFIG_SND_INDIGO is not set
+# CONFIG_SND_INDIGOIO is not set
+# CONFIG_SND_INDIGODJ is not set
+# CONFIG_SND_INDIGOIOX is not set
+# CONFIG_SND_INDIGODJX is not set
+# CONFIG_SND_EMU10K1 is not set
+# CONFIG_SND_EMU10K1X is not set
+# CONFIG_SND_ENS1370 is not set
+# CONFIG_SND_ENS1371 is not set
+# CONFIG_SND_ES1938 is not set
+# CONFIG_SND_ES1968 is not set
+# CONFIG_SND_FM801 is not set
+# CONFIG_SND_HDA_INTEL is not set
+# CONFIG_SND_HDSP is not set
+# CONFIG_SND_HDSPM is not set
+# CONFIG_SND_HIFIER is not set
+# CONFIG_SND_ICE1712 is not set
+# CONFIG_SND_ICE1724 is not set
+# CONFIG_SND_INTEL8X0 is not set
+# CONFIG_SND_INTEL8X0M is not set
+# CONFIG_SND_KORG1212 is not set
+# CONFIG_SND_LX6464ES is not set
+# CONFIG_SND_MAESTRO3 is not set
+# CONFIG_SND_MIXART is not set
+# CONFIG_SND_NM256 is not set
+# CONFIG_SND_PCXHR is not set
+# CONFIG_SND_RIPTIDE is not set
+# CONFIG_SND_RME32 is not set
+# CONFIG_SND_RME96 is not set
+# CONFIG_SND_RME9652 is not set
+# CONFIG_SND_SONICVIBES is not set
+# CONFIG_SND_TRIDENT is not set
+# CONFIG_SND_VIA82XX is not set
+# CONFIG_SND_VIA82XX_MODEM is not set
+# CONFIG_SND_VIRTUOSO is not set
+# CONFIG_SND_VX222 is not set
+# CONFIG_SND_YMFPCI is not set
+CONFIG_SND_ARM=y
+CONFIG_SND_PXA2XX_LIB=y
+CONFIG_SND_PXA2XX_LIB_AC97=y
+CONFIG_SND_SPI=y
+CONFIG_SND_USB=y
+CONFIG_SND_USB_AUDIO=m
+CONFIG_SND_USB_CAIAQ=m
+CONFIG_SND_USB_CAIAQ_INPUT=y
+CONFIG_SND_SOC=y
+CONFIG_SND_SOC_AC97_BUS=y
+CONFIG_SND_PXA2XX_SOC=y
+CONFIG_SND_PXA2XX_SOC_AC97=y
+CONFIG_SND_PXA2XX_SOC_AC97_SURROUND=y
+
+#
+# SoC Audio for the Marvell SoC's
+#
+CONFIG_SND_DOVE_AC97=y
+CONFIG_SND_DOVE_SOC_DB=y
+CONFIG_SND_DOVE_SOC_DB_B=y
+CONFIG_SND_DOVE_SOC_AC97_AVD1=y
+CONFIG_SND_DOVE_SOC_MRVL_AUDIO=y
+
+#
+# Select Codecs for the mv88fx i2s
+#
+CONFIG_CODEC_CS42L51=y
+# CONFIG_CODEC_RT5623 is not set
+CONFIG_CODEC_RT5630=y
+CONFIG_SND_SOC_I2C_AND_SPI=y
+# CONFIG_SND_SOC_ALL_CODECS is not set
+CONFIG_SND_SOC_AD1980=y
+CONFIG_SND_SOC_CS42L51=y
+CONFIG_SND_SOC_RT5610=y
+CONFIG_SND_SOC_RT5630=y
+CONFIG_SND_SOC_RT655=y
+CONFIG_SOUND_PRIME=y
+CONFIG_AC97_BUS=y
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+# CONFIG_HID_PID is not set
+# CONFIG_USB_HIDDEV is not set
+
+#
+# Special HID drivers
+#
+# CONFIG_HID_A4TECH is not set
+# CONFIG_HID_APPLE is not set
+# CONFIG_HID_BELKIN is not set
+# CONFIG_HID_CHERRY is not set
+# CONFIG_HID_CHICONY is not set
+# CONFIG_HID_CYPRESS is not set
+# CONFIG_HID_DRAGONRISE is not set
+# CONFIG_HID_EZKEY is not set
+# CONFIG_HID_KYE is not set
+# CONFIG_HID_GYRATION is not set
+# CONFIG_HID_TWINHAN is not set
+# CONFIG_HID_KENSINGTON is not set
+CONFIG_HID_LOGITECH=m
+CONFIG_LOGITECH_FF=y
+CONFIG_LOGIRUMBLEPAD2_FF=y
+# CONFIG_HID_MICROSOFT is not set
+# CONFIG_HID_MONTEREY is not set
+# CONFIG_HID_NTRIG is not set
+# CONFIG_HID_PANTHERLORD is not set
+# CONFIG_HID_PETALYNX is not set
+# CONFIG_HID_SAMSUNG is not set
+# CONFIG_HID_SONY is not set
+# CONFIG_HID_SUNPLUS is not set
+# CONFIG_HID_GREENASIA is not set
+# CONFIG_HID_SMARTJOYPLUS is not set
+# CONFIG_HID_TOPSEED is not set
+# CONFIG_HID_THRUSTMASTER is not set
+# CONFIG_HID_WACOM is not set
+# CONFIG_HID_ZEROPLUS is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+CONFIG_USB_SUSPEND=y
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_MON is not set
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_XHCI_HCD is not set
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+CONFIG_USB_EHCI_TT_NEWSCHED=y
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
+# CONFIG_USB_OHCI_HCD is not set
+# CONFIG_USB_UHCI_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_WHCI_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+# CONFIG_USB_MUSB_HDRC is not set
+# CONFIG_USB_GADGET_MUSB_HDRC is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+CONFIG_USB_PRINTER=y
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+CONFIG_USB_STORAGE_DATAFAB=y
+CONFIG_USB_STORAGE_FREECOM=y
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+CONFIG_USB_STORAGE_SDDR09=y
+CONFIG_USB_STORAGE_SDDR55=y
+CONFIG_USB_STORAGE_JUMPSHOT=y
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+CONFIG_USB_TEST=m
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+# CONFIG_USB_GADGET_DEBUG_FS is not set
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_PXA25X is not set
+# CONFIG_USB_GADGET_R8A66597 is not set
+# CONFIG_USB_GADGET_PXA27X is not set
+# CONFIG_USB_GADGET_S3C_HSOTG is not set
+# CONFIG_USB_GADGET_IMX is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_FSL_QE is not set
+# CONFIG_USB_GADGET_CI13XXX is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LANGWELL is not set
+CONFIG_USB_GADGET_MRVL=y
+CONFIG_USB_MRVL=y
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+# CONFIG_USB_ZERO is not set
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_ETH is not set
+# CONFIG_USB_GADGETFS is not set
+CONFIG_USB_FILE_STORAGE=m
+# CONFIG_USB_FILE_STORAGE_TEST is not set
+# CONFIG_USB_G_SERIAL is not set
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+# CONFIG_USB_ANDROID is not set
+# CONFIG_USB_CDC_COMPOSITE is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_NOP_USB_XCEIV is not set
+# CONFIG_UWB is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+# CONFIG_MMC_EMBEDDED_SDIO is not set
+# CONFIG_MMC_PARANOID_SD_INIT is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+CONFIG_MMC_BLOCK_PARANOID_RESUME=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+CONFIG_MMC_SDHCI=y
+# CONFIG_MMC_SDHCI_PCI is not set
+CONFIG_MMC_SDHCI_MV=y
+# CONFIG_MMC_SDHCI_PLTFM is not set
+# CONFIG_MMC_AT91 is not set
+# CONFIG_MMC_ATMELMCI is not set
+# CONFIG_MMC_TIFM_SD is not set
+# CONFIG_MMC_MVSDIO is not set
+# CONFIG_MMC_CB710 is not set
+# CONFIG_MMC_VIA_SDMMC is not set
+# CONFIG_MEMSTICK is not set
+CONFIG_NEW_LEDS=y
+# CONFIG_LEDS_CLASS is not set
+
+#
+# LED drivers
+#
+
+#
+# LED Triggers
+#
+# CONFIG_LEDS_TRIGGERS is not set
+# CONFIG_SWITCH is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_INFINIBAND is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+CONFIG_RTC_INTF_ALARM=y
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_MV=y
+CONFIG_DMADEVICES=y
+
+#
+# DMA Devices
+#
+CONFIG_MV_XOR=y
+CONFIG_DMA_ENGINE=y
+
+#
+# DMA Clients
+#
+# CONFIG_NET_DMA is not set
+# CONFIG_ASYNC_TX_DMA is not set
+CONFIG_DMATEST=m
+# CONFIG_AUXDISPLAY is not set
+CONFIG_UIO=y
+# CONFIG_UIO_CIF is not set
+CONFIG_UIO_PDRV=y
+# CONFIG_UIO_PDRV_GENIRQ is not set
+# CONFIG_UIO_SMX is not set
+# CONFIG_UIO_AEC is not set
+# CONFIG_UIO_SERCOS3 is not set
+# CONFIG_UIO_PCI_GENERIC is not set
+CONFIG_UIO_VMETA=y
+# CONFIG_UIO_VMETA_POLLING_MODE is not set
+CONFIG_UIO_DOVE_VMETA_MEM_SIZE=96
+
+#
+# TI VLYNQ
+#
+CONFIG_STAGING=y
+# CONFIG_STAGING_EXCLUDE_BUILD is not set
+# CONFIG_ET131X is not set
+# CONFIG_VIDEO_GO7007 is not set
+# CONFIG_USB_IP_COMMON is not set
+# CONFIG_PRISM2_USB is not set
+# CONFIG_ECHO is not set
+# CONFIG_POCH is not set
+# CONFIG_COMEDI is not set
+# CONFIG_ASUS_OLED is not set
+# CONFIG_ALTERA_PCIE_CHDMA is not set
+# CONFIG_RTL8187SE is not set
+# CONFIG_RTL8192SU is not set
+# CONFIG_RTL8192E is not set
+# CONFIG_INPUT_MIMIO is not set
+# CONFIG_TRANZPORT is not set
+
+#
+# Android
+#
+CONFIG_ANDROID=y
+CONFIG_ANDROID_BINDER_IPC=y
+CONFIG_ANDROID_LOGGER=y
+CONFIG_ANDROID_RAM_CONSOLE=y
+CONFIG_ANDROID_RAM_CONSOLE_ENABLE_VERBOSE=y
+# CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION is not set
+# CONFIG_ANDROID_RAM_CONSOLE_EARLY_INIT is not set
+CONFIG_ANDROID_TIMED_OUTPUT=y
+CONFIG_ANDROID_TIMED_GPIO=y
+CONFIG_ANDROID_LOW_MEMORY_KILLER=y
+
+#
+# Qualcomm MSM Camera And Video
+#
+
+#
+# Camera Sensor Selection
+#
+# CONFIG_DST is not set
+# CONFIG_POHMELFS is not set
+# CONFIG_B3DFG is not set
+# CONFIG_IDE_PHISON is not set
+# CONFIG_PLAN9AUTH is not set
+# CONFIG_LINE6_USB is not set
+# CONFIG_VT6655 is not set
+# CONFIG_VT6656 is not set
+# CONFIG_FB_UDL is not set
+# CONFIG_VME_BUS is not set
+
+#
+# RAR Register Driver
+#
+# CONFIG_RAR_REGISTER is not set
+# CONFIG_IIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+# CONFIG_EXT2_FS_SECURITY is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+# CONFIG_EXT3_FS_SECURITY is not set
+CONFIG_EXT4_FS=y
+CONFIG_EXT4_FS_XATTR=y
+CONFIG_EXT4_FS_POSIX_ACL=y
+# CONFIG_EXT4_FS_SECURITY is not set
+# CONFIG_EXT4_DEBUG is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_JBD2=y
+# CONFIG_JBD2_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_XFS_FS=m
+# CONFIG_XFS_QUOTA is not set
+# CONFIG_XFS_POSIX_ACL is not set
+# CONFIG_XFS_RT is not set
+# CONFIG_XFS_DEBUG is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+CONFIG_GENERIC_ACL=y
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=y
+CONFIG_JOLIET=y
+# CONFIG_ZISOFS is not set
+CONFIG_UDF_FS=m
+CONFIG_UDF_NLS=y
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+CONFIG_UBIFS_FS=y
+CONFIG_UBIFS_FS_XATTR=y
+CONFIG_UBIFS_FS_ADVANCED_COMPR=y
+CONFIG_UBIFS_FS_LZO=y
+CONFIG_UBIFS_FS_ZLIB=y
+# CONFIG_UBIFS_FS_DEBUG is not set
+CONFIG_CRAMFS=y
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+# CONFIG_NFS_V4 is not set
+CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=m
+CONFIG_NFS_ACL_SUPPORT=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+CONFIG_NLS_CODEPAGE_850=y
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_ISO8859_2=y
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=y
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_PRINTK_TIME=y
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_SCHEDSTATS is not set
+CONFIG_TIMER_STATS=y
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+CONFIG_STACKTRACE=y
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_HIGHMEM is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_NOP_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_RING_BUFFER=y
+CONFIG_EVENT_TRACING=y
+CONFIG_CONTEXT_SWITCH_TRACER=y
+CONFIG_RING_BUFFER_ALLOW_SWAP=y
+CONFIG_TRACING=y
+CONFIG_TRACING_SUPPORT=y
+CONFIG_FTRACE=y
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_ENABLE_DEFAULT_TRACERS is not set
+# CONFIG_BOOT_TRACER is not set
+CONFIG_BRANCH_PROFILE_NONE=y
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_RING_BUFFER_BENCHMARK is not set
+# CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_ARM_UNWIND=y
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_STACK_USAGE is not set
+CONFIG_DEBUG_LL=y
+# CONFIG_DEBUG_ICEDCC is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+CONFIG_SECURITY_FILE_CAPABILITIES=y
+CONFIG_XOR_BLOCKS=m
+CONFIG_ASYNC_CORE=m
+CONFIG_ASYNC_MEMCPY=m
+CONFIG_ASYNC_XOR=m
+CONFIG_ASYNC_PQ=m
+CONFIG_ASYNC_RAID6_RECOV=m
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_GF128MUL is not set
+CONFIG_CRYPTO_NULL=y
+CONFIG_CRYPTO_WORKQUEUE=y
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=m
+# CONFIG_CRYPTO_LRW is not set
+CONFIG_CRYPTO_PCBC=m
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+CONFIG_CRYPTO_HMAC=y
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+CONFIG_CRYPTO_CRC32C=y
+# CONFIG_CRYPTO_GHASH is not set
+CONFIG_CRYPTO_MD4=y
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+CONFIG_CRYPTO_SHA1=y
+CONFIG_CRYPTO_SHA256=y
+CONFIG_CRYPTO_SHA512=y
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+CONFIG_CRYPTO_BLOWFISH=y
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+CONFIG_CRYPTO_TEA=y
+CONFIG_CRYPTO_TWOFISH=y
+CONFIG_CRYPTO_TWOFISH_COMMON=y
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_ZLIB is not set
+CONFIG_CRYPTO_LZO=y
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_HW=y
+CONFIG_CRYPTO_DEV_MV_CESA=y
+# CONFIG_CRYPTO_DEV_HIFN_795X is not set
+
+#
+# OCF Configuration
+#
+CONFIG_OCF_OCF=y
+# CONFIG_OCF_RANDOMHARVEST is not set
+CONFIG_OCF_CRYPTODEV=y
+# CONFIG_OCF_CRYPTOSOFT is not set
+# CONFIG_OCF_SAFE is not set
+# CONFIG_OCF_IXP4XX is not set
+# CONFIG_OCF_HIFN is not set
+# CONFIG_OCF_HIFNHIPP is not set
+# CONFIG_OCF_TALITOS is not set
+# CONFIG_OCF_EP80579 is not set
+# CONFIG_OCF_CRYPTOCTEON is not set
+# CONFIG_OCF_OCFNULL is not set
+# CONFIG_OCF_BENCH is not set
+CONFIG_BINARY_PRINTF=y
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=y
+CONFIG_CRC16=y
+# CONFIG_CRC_T10DIF is not set
+CONFIG_CRC_ITU_T=m
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+CONFIG_LIBCRC32C=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
--- linux-mvl-dove-2.6.32.orig/arch/m68k/include/asm/cache.h
+++ linux-mvl-dove-2.6.32/arch/m68k/include/asm/cache.h
@@ -8,4 +8,6 @@
 #define        L1_CACHE_SHIFT  4
 #define        L1_CACHE_BYTES  (1<< L1_CACHE_SHIFT)
 
+#define ARCH_KMALLOC_MINALIGN	L1_CACHE_BYTES
+
 #endif
--- linux-mvl-dove-2.6.32.orig/arch/m68k/mm/motorola.c
+++ linux-mvl-dove-2.6.32/arch/m68k/mm/motorola.c
@@ -299,6 +299,8 @@
 		zones_size[ZONE_DMA] = m68k_memory[i].size >> PAGE_SHIFT;
 		free_area_init_node(i, zones_size,
 				    m68k_memory[i].addr >> PAGE_SHIFT, NULL);
+		if (node_present_pages(i))
+			node_set_state(i, N_NORMAL_MEMORY);
 	}
 }
 
--- linux-mvl-dove-2.6.32.orig/arch/m68k/kernel/sys_m68k.c
+++ linux-mvl-dove-2.6.32/arch/m68k/kernel/sys_m68k.c
@@ -29,37 +29,16 @@
 #include <asm/page.h>
 #include <asm/unistd.h>
 
-/* common code for old and new mmaps */
-static inline long do_mmap2(
-	unsigned long addr, unsigned long len,
-	unsigned long prot, unsigned long flags,
-	unsigned long fd, unsigned long pgoff)
-{
-	int error = -EBADF;
-	struct file * file = NULL;
-
-	flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-	if (!(flags & MAP_ANONYMOUS)) {
-		file = fget(fd);
-		if (!file)
-			goto out;
-	}
-
-	down_write(&current->mm->mmap_sem);
-	error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
-	up_write(&current->mm->mmap_sem);
-
-	if (file)
-		fput(file);
-out:
-	return error;
-}
-
 asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
 	unsigned long prot, unsigned long flags,
 	unsigned long fd, unsigned long pgoff)
 {
-	return do_mmap2(addr, len, prot, flags, fd, pgoff);
+	/*
+	 * This is wrong for sun3 - there PAGE_SIZE is 8Kb,
+	 * so we need to shift the argument down by 1; m68k mmap64(3)
+	 * (in libc) expects the last argument of mmap2 in 4Kb units.
+	 */
+	return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff);
 }
 
 /*
@@ -90,57 +69,11 @@
 	if (a.offset & ~PAGE_MASK)
 		goto out;
 
-	a.flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-
-	error = do_mmap2(a.addr, a.len, a.prot, a.flags, a.fd, a.offset >> PAGE_SHIFT);
-out:
-	return error;
-}
-
-#if 0
-struct mmap_arg_struct64 {
-	__u32 addr;
-	__u32 len;
-	__u32 prot;
-	__u32 flags;
-	__u64 offset; /* 64 bits */
-	__u32 fd;
-};
-
-asmlinkage long sys_mmap64(struct mmap_arg_struct64 *arg)
-{
-	int error = -EFAULT;
-	struct file * file = NULL;
-	struct mmap_arg_struct64 a;
-	unsigned long pgoff;
-
-	if (copy_from_user(&a, arg, sizeof(a)))
-		return -EFAULT;
-
-	if ((long)a.offset & ~PAGE_MASK)
-		return -EINVAL;
-
-	pgoff = a.offset >> PAGE_SHIFT;
-	if ((a.offset >> PAGE_SHIFT) != pgoff)
-		return -EINVAL;
-
-	if (!(a.flags & MAP_ANONYMOUS)) {
-		error = -EBADF;
-		file = fget(a.fd);
-		if (!file)
-			goto out;
-	}
-	a.flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-
-	down_write(&current->mm->mmap_sem);
-	error = do_mmap_pgoff(file, a.addr, a.len, a.prot, a.flags, pgoff);
-	up_write(&current->mm->mmap_sem);
-	if (file)
-		fput(file);
+	error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd,
+			       a.offset >> PAGE_SHIFT);
 out:
 	return error;
 }
-#endif
 
 struct sel_arg_struct {
 	unsigned long n;
--- linux-mvl-dove-2.6.32.orig/arch/microblaze/Makefile
+++ linux-mvl-dove-2.6.32/arch/microblaze/Makefile
@@ -69,12 +69,16 @@
 
 all: linux.bin
 
-BOOT_TARGETS = linux.bin linux.bin.gz simpleImage.%
+# With make 3.82 we cannot mix normal and wildcard targets
+BOOT_TARGETS1 = linux.bin linux.bin.gz
+BOOT_TARGETS2 = simpleImage.%
 
 archclean:
 	$(Q)$(MAKE) $(clean)=$(boot)
 
-$(BOOT_TARGETS): vmlinux
+$(BOOT_TARGETS1): vmlinux
+	$(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
+$(BOOT_TARGETS2): vmlinux
 	$(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
 
 define archhelp
--- linux-mvl-dove-2.6.32.orig/arch/microblaze/kernel/sys_microblaze.c
+++ linux-mvl-dove-2.6.32/arch/microblaze/kernel/sys_microblaze.c
@@ -62,46 +62,14 @@
 	return error;
 }
 
-asmlinkage long
-sys_mmap2(unsigned long addr, unsigned long len,
-	unsigned long prot, unsigned long flags,
-	unsigned long fd, unsigned long pgoff)
-{
-	struct file *file = NULL;
-	int ret = -EBADF;
-
-	flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-	if (!(flags & MAP_ANONYMOUS)) {
-		file = fget(fd);
-		if (!file) {
-			printk(KERN_INFO "no fd in mmap\r\n");
-			goto out;
-		}
-	}
-
-	down_write(&current->mm->mmap_sem);
-	ret = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
-	up_write(&current->mm->mmap_sem);
-	if (file)
-		fput(file);
-out:
-	return ret;
-}
-
 asmlinkage long sys_mmap(unsigned long addr, unsigned long len,
 			unsigned long prot, unsigned long flags,
 			unsigned long fd, off_t pgoff)
 {
-	int err = -EINVAL;
-
-	if (pgoff & ~PAGE_MASK) {
-		printk(KERN_INFO "no pagemask in mmap\r\n");
-		goto out;
-	}
+	if (pgoff & ~PAGE_MASK)
+		return -EINVAL;
 
-	err = sys_mmap2(addr, len, prot, flags, fd, pgoff >> PAGE_SHIFT);
-out:
-	return err;
+	return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff >> PAGE_SHIFT);
 }
 
 /*
--- linux-mvl-dove-2.6.32.orig/arch/microblaze/kernel/syscall_table.S
+++ linux-mvl-dove-2.6.32/arch/microblaze/kernel/syscall_table.S
@@ -196,7 +196,7 @@
 	.long sys_ni_syscall		/* reserved for streams2 */
 	.long sys_vfork		/* 190 */
 	.long sys_getrlimit
-	.long sys_mmap2			/* mmap2 */
+	.long sys_mmap_pgoff		/* mmap2 */
 	.long sys_truncate64
 	.long sys_ftruncate64
 	.long sys_stat64		/* 195 */
--- linux-mvl-dove-2.6.32.orig/arch/mn10300/include/asm/cache.h
+++ linux-mvl-dove-2.6.32/arch/mn10300/include/asm/cache.h
@@ -21,6 +21,8 @@
 #define L1_CACHE_DISPARITY	L1_CACHE_NENTRIES * L1_CACHE_BYTES
 #endif
 
+#define ARCH_KMALLOC_MINALIGN	L1_CACHE_BYTES
+
 /* data cache purge registers
  * - read from the register to unconditionally purge that cache line
  * - write address & 0xffffff00 to conditionally purge that cache line
--- linux-mvl-dove-2.6.32.orig/arch/mn10300/include/asm/mman.h
+++ linux-mvl-dove-2.6.32/arch/mn10300/include/asm/mman.h
@@ -1 +1,6 @@
 #include <asm-generic/mman.h>
+
+#define MIN_MAP_ADDR	PAGE_SIZE	/* minimum fixed mmap address */
+
+#define arch_mmap_check(addr, len, flags) \
+	(((flags) & MAP_FIXED && (addr) < MIN_MAP_ADDR) ? -EINVAL : 0)
--- linux-mvl-dove-2.6.32.orig/arch/mn10300/kernel/sys_mn10300.c
+++ linux-mvl-dove-2.6.32/arch/mn10300/kernel/sys_mn10300.c
@@ -23,47 +23,13 @@
 
 #include <asm/uaccess.h>
 
-#define MIN_MAP_ADDR	PAGE_SIZE	/* minimum fixed mmap address */
-
-/*
- * memory mapping syscall
- */
-asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
-			  unsigned long prot, unsigned long flags,
-			  unsigned long fd, unsigned long pgoff)
-{
-	struct file *file = NULL;
-	long error = -EINVAL;
-
-	flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-
-	if (flags & MAP_FIXED && addr < MIN_MAP_ADDR)
-		goto out;
-
-	error = -EBADF;
-	if (!(flags & MAP_ANONYMOUS)) {
-		file = fget(fd);
-		if (!file)
-			goto out;
-	}
-
-	down_write(&current->mm->mmap_sem);
-	error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
-	up_write(&current->mm->mmap_sem);
-
-	if (file)
-		fput(file);
-out:
-	return error;
-}
-
 asmlinkage long old_mmap(unsigned long addr, unsigned long len,
 			 unsigned long prot, unsigned long flags,
 			 unsigned long fd, unsigned long offset)
 {
 	if (offset & ~PAGE_MASK)
 		return -EINVAL;
-	return sys_mmap2(addr, len, prot, flags, fd, offset >> PAGE_SHIFT);
+	return sys_mmap_pgoff(addr, len, prot, flags, fd, offset >> PAGE_SHIFT);
 }
 
 struct sel_arg_struct {
--- linux-mvl-dove-2.6.32.orig/arch/mn10300/kernel/entry.S
+++ linux-mvl-dove-2.6.32/arch/mn10300/kernel/entry.S
@@ -578,7 +578,7 @@
 	.long sys_ni_syscall	/* reserved for streams2 */
 	.long sys_vfork		/* 190 */
 	.long sys_getrlimit
-	.long sys_mmap2
+	.long sys_mmap_pgoff
 	.long sys_truncate64
 	.long sys_ftruncate64
 	.long sys_stat64	/* 195 */
--- linux-mvl-dove-2.6.32.orig/arch/xtensa/include/asm/cache.h
+++ linux-mvl-dove-2.6.32/arch/xtensa/include/asm/cache.h
@@ -29,5 +29,6 @@
 # define CACHE_WAY_SIZE ICACHE_WAY_SIZE
 #endif
 
+#define ARCH_KMALLOC_MINALIGN	L1_CACHE_BYTES
 
 #endif	/* _XTENSA_CACHE_H */
--- linux-mvl-dove-2.6.32.orig/arch/xtensa/include/asm/unistd.h
+++ linux-mvl-dove-2.6.32/arch/xtensa/include/asm/unistd.h
@@ -189,7 +189,7 @@
 /* File Map / Shared Memory Operations */
 
 #define __NR_mmap2 				 80
-__SYSCALL( 80, xtensa_mmap2, 6)
+__SYSCALL( 80, sys_mmap_pgoff, 6)
 #define __NR_munmap 				 81
 __SYSCALL( 81, sys_munmap, 2)
 #define __NR_mprotect 				 82
--- linux-mvl-dove-2.6.32.orig/arch/xtensa/include/asm/syscall.h
+++ linux-mvl-dove-2.6.32/arch/xtensa/include/asm/syscall.h
@@ -13,8 +13,6 @@
 asmlinkage long xtensa_execve(char*, char**, char**, struct pt_regs*);
 asmlinkage long xtensa_clone(unsigned long, unsigned long, struct pt_regs*);
 asmlinkage long xtensa_pipe(int __user *);
-asmlinkage long xtensa_mmap2(unsigned long, unsigned long, unsigned long,
-    			     unsigned long, unsigned long, unsigned long);
 asmlinkage long xtensa_ptrace(long, long, long, long);
 asmlinkage long xtensa_sigreturn(struct pt_regs*);
 asmlinkage long xtensa_rt_sigreturn(struct pt_regs*);
--- linux-mvl-dove-2.6.32.orig/arch/xtensa/kernel/syscall.c
+++ linux-mvl-dove-2.6.32/arch/xtensa/kernel/syscall.c
@@ -57,31 +57,6 @@
 	return error;
 }
 
-
-asmlinkage long xtensa_mmap2(unsigned long addr, unsigned long len,
-   			     unsigned long prot, unsigned long flags,
-			     unsigned long fd, unsigned long pgoff)
-{
-	int error = -EBADF;
-	struct file * file = NULL;
-
-	flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-	if (!(flags & MAP_ANONYMOUS)) {
-		file = fget(fd);
-		if (!file)
-			goto out;
-	}
-
-	down_write(&current->mm->mmap_sem);
-	error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
-	up_write(&current->mm->mmap_sem);
-
-	if (file)
-		fput(file);
-out:
-	return error;
-}
-
 asmlinkage long xtensa_shmat(int shmid, char __user *shmaddr, int shmflg)
 {
 	unsigned long ret;
--- linux-mvl-dove-2.6.32.orig/arch/xtensa/kernel/ptrace.c
+++ linux-mvl-dove-2.6.32/arch/xtensa/kernel/ptrace.c
@@ -136,6 +136,9 @@
 	elf_xtregs_t *xtregs = uregs;
 	int ret = 0;
 
+	if (!access_ok(VERIFY_READ, uregs, sizeof(elf_xtregs_t)))
+		return -EFAULT;
+
 #if XTENSA_HAVE_COPROCESSORS
 	/* Flush all coprocessors before we overwrite them. */
 	coprocessor_flush_all(ti);
--- linux-mvl-dove-2.6.32.orig/arch/sh/boot/compressed/misc.c
+++ linux-mvl-dove-2.6.32/arch/sh/boot/compressed/misc.c
@@ -132,7 +132,7 @@
 	output_addr = (CONFIG_MEMORY_START + 0x2000);
 #else
 	output_addr = PHYSADDR((unsigned long)&_text+PAGE_SIZE);
-#ifdef CONFIG_29BIT
+#if defined(CONFIG_29BIT) || defined(CONFIG_PMB_FIXED)
 	output_addr |= P2SEG;
 #endif
 #endif
--- linux-mvl-dove-2.6.32.orig/arch/sh/include/asm/pgtable_32.h
+++ linux-mvl-dove-2.6.32/arch/sh/include/asm/pgtable_32.h
@@ -344,7 +344,8 @@
 #define pte_special(pte)	((pte).pte_low & _PAGE_SPECIAL)
 
 #ifdef CONFIG_X2TLB
-#define pte_write(pte)		((pte).pte_high & _PAGE_EXT_USER_WRITE)
+#define pte_write(pte) \
+	((pte).pte_high & (_PAGE_EXT_USER_WRITE | _PAGE_EXT_KERN_WRITE))
 #else
 #define pte_write(pte)		((pte).pte_low & _PAGE_RW)
 #endif
@@ -358,7 +359,7 @@
  * individually toggled (and user permissions are entirely decoupled from
  * kernel permissions), we attempt to couple them a bit more sanely here.
  */
-PTE_BIT_FUNC(high, wrprotect, &= ~_PAGE_EXT_USER_WRITE);
+PTE_BIT_FUNC(high, wrprotect, &= ~(_PAGE_EXT_USER_WRITE | _PAGE_EXT_KERN_WRITE));
 PTE_BIT_FUNC(high, mkwrite, |= _PAGE_EXT_USER_WRITE | _PAGE_EXT_KERN_WRITE);
 PTE_BIT_FUNC(high, mkhuge, |= _PAGE_SZHUGE);
 #else
--- linux-mvl-dove-2.6.32.orig/arch/sh/include/asm/elf.h
+++ linux-mvl-dove-2.6.32/arch/sh/include/asm/elf.h
@@ -212,7 +212,9 @@
 
 #define VSYSCALL_AUX_ENT					\
 	if (vdso_enabled)					\
-		NEW_AUX_ENT(AT_SYSINFO_EHDR, VDSO_BASE);
+		NEW_AUX_ENT(AT_SYSINFO_EHDR, VDSO_BASE);	\
+	else							\
+		NEW_AUX_ENT(AT_IGNORE, 0);
 #else
 #define VSYSCALL_AUX_ENT
 #endif /* CONFIG_VSYSCALL */
@@ -220,7 +222,7 @@
 #ifdef CONFIG_SH_FPU
 #define FPU_AUX_ENT	NEW_AUX_ENT(AT_FPUCW, FPSCR_INIT)
 #else
-#define FPU_AUX_ENT
+#define FPU_AUX_ENT	NEW_AUX_ENT(AT_IGNORE, 0)
 #endif
 
 extern int l1i_cache_shape, l1d_cache_shape, l2_cache_shape;
--- linux-mvl-dove-2.6.32.orig/arch/sh/mm/mmap.c
+++ linux-mvl-dove-2.6.32/arch/sh/mm/mmap.c
@@ -54,7 +54,8 @@
 		/* We do not accept a shared mapping if it would violate
 		 * cache aliasing constraints.
 		 */
-		if ((flags & MAP_SHARED) && (addr & shm_align_mask))
+		if ((flags & MAP_SHARED) &&
+		    ((addr - (pgoff << PAGE_SHIFT)) & shm_align_mask))
 			return -EINVAL;
 		return addr;
 	}
--- linux-mvl-dove-2.6.32.orig/arch/sh/kernel/process_64.c
+++ linux-mvl-dove-2.6.32/arch/sh/kernel/process_64.c
@@ -367,7 +367,7 @@
 void flush_thread(void)
 {
 
-	/* Called by fs/exec.c (flush_old_exec) to remove traces of a
+	/* Called by fs/exec.c (setup_new_exec) to remove traces of a
 	 * previously running executable. */
 #ifdef CONFIG_SH_FPU
 	if (last_task_used_math == current) {
--- linux-mvl-dove-2.6.32.orig/arch/sh/kernel/smp.c
+++ linux-mvl-dove-2.6.32/arch/sh/kernel/smp.c
@@ -69,6 +69,7 @@
 	unsigned int cpu;
 	struct mm_struct *mm = &init_mm;
 
+	enable_mmu();
 	atomic_inc(&mm->mm_count);
 	atomic_inc(&mm->mm_users);
 	current->active_mm = mm;
--- linux-mvl-dove-2.6.32.orig/arch/sh/kernel/sys_sh.c
+++ linux-mvl-dove-2.6.32/arch/sh/kernel/sys_sh.c
@@ -28,37 +28,13 @@
 #include <asm/cacheflush.h>
 #include <asm/cachectl.h>
 
-static inline long
-do_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
-	 unsigned long flags, int fd, unsigned long pgoff)
-{
-	int error = -EBADF;
-	struct file *file = NULL;
-
-	flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-	if (!(flags & MAP_ANONYMOUS)) {
-		file = fget(fd);
-		if (!file)
-			goto out;
-	}
-
-	down_write(&current->mm->mmap_sem);
-	error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
-	up_write(&current->mm->mmap_sem);
-
-	if (file)
-		fput(file);
-out:
-	return error;
-}
-
 asmlinkage int old_mmap(unsigned long addr, unsigned long len,
 	unsigned long prot, unsigned long flags,
 	int fd, unsigned long off)
 {
 	if (off & ~PAGE_MASK)
 		return -EINVAL;
-	return do_mmap2(addr, len, prot, flags, fd, off>>PAGE_SHIFT);
+	return sys_mmap_pgoff(addr, len, prot, flags, fd, off>>PAGE_SHIFT);
 }
 
 asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
@@ -74,7 +50,7 @@
 
 	pgoff >>= PAGE_SHIFT - 12;
 
-	return do_mmap2(addr, len, prot, flags, fd, pgoff);
+	return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff);
 }
 
 /*
--- linux-mvl-dove-2.6.32.orig/arch/blackfin/include/asm/cache.h
+++ linux-mvl-dove-2.6.32/arch/blackfin/include/asm/cache.h
@@ -15,6 +15,8 @@
 #define L1_CACHE_BYTES	(1 << L1_CACHE_SHIFT)
 #define SMP_CACHE_BYTES	L1_CACHE_BYTES
 
+#define ARCH_KMALLOC_MINALIGN	L1_CACHE_BYTES
+
 #ifdef CONFIG_SMP
 #define __cacheline_aligned
 #else
--- linux-mvl-dove-2.6.32.orig/arch/blackfin/include/asm/page.h
+++ linux-mvl-dove-2.6.32/arch/blackfin/include/asm/page.h
@@ -10,4 +10,9 @@
 #include <asm-generic/page.h>
 #define MAP_NR(addr) (((unsigned long)(addr)-PAGE_OFFSET) >> PAGE_SHIFT)
 
+#define VM_DATA_DEFAULT_FLAGS \
+	(VM_READ | VM_WRITE | \
+	((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0 ) | \
+		 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
+
 #endif
--- linux-mvl-dove-2.6.32.orig/arch/blackfin/mach-common/entry.S
+++ linux-mvl-dove-2.6.32/arch/blackfin/mach-common/entry.S
@@ -1422,7 +1422,7 @@
 	.long _sys_ni_syscall	/* streams2 */
 	.long _sys_vfork		/* 190 */
 	.long _sys_getrlimit
-	.long _sys_mmap2
+	.long _sys_mmap_pgoff
 	.long _sys_truncate64
 	.long _sys_ftruncate64
 	.long _sys_stat64	/* 195 */
--- linux-mvl-dove-2.6.32.orig/arch/blackfin/kernel/sys_bfin.c
+++ linux-mvl-dove-2.6.32/arch/blackfin/kernel/sys_bfin.c
@@ -22,39 +22,6 @@
 #include <asm/cacheflush.h>
 #include <asm/dma.h>
 
-/* common code for old and new mmaps */
-static inline long
-do_mmap2(unsigned long addr, unsigned long len,
-	 unsigned long prot, unsigned long flags,
-	 unsigned long fd, unsigned long pgoff)
-{
-	int error = -EBADF;
-	struct file *file = NULL;
-
-	flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-	if (!(flags & MAP_ANONYMOUS)) {
-		file = fget(fd);
-		if (!file)
-			goto out;
-	}
-
-	down_write(&current->mm->mmap_sem);
-	error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
-	up_write(&current->mm->mmap_sem);
-
-	if (file)
-		fput(file);
- out:
-	return error;
-}
-
-asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
-			  unsigned long prot, unsigned long flags,
-			  unsigned long fd, unsigned long pgoff)
-{
-	return do_mmap2(addr, len, prot, flags, fd, pgoff);
-}
-
 asmlinkage void *sys_sram_alloc(size_t size, unsigned long flags)
 {
 	return sram_alloc_with_lsl(size, flags);
--- linux-mvl-dove-2.6.32.orig/arch/s390/include/asm/kvm.h
+++ linux-mvl-dove-2.6.32/arch/s390/include/asm/kvm.h
@@ -1,6 +1,5 @@
 #ifndef __LINUX_KVM_S390_H
 #define __LINUX_KVM_S390_H
-
 /*
  * asm-s390/kvm.h - KVM s390 specific structures and definitions
  *
@@ -15,6 +14,8 @@
  */
 #include <linux/types.h>
 
+#define __KVM_S390
+
 /* for KVM_GET_REGS and KVM_SET_REGS */
 struct kvm_regs {
 	/* general purpose regs for s390 */
--- linux-mvl-dove-2.6.32.orig/arch/s390/include/asm/processor.h
+++ linux-mvl-dove-2.6.32/arch/s390/include/asm/processor.h
@@ -150,11 +150,6 @@
  */
 extern unsigned long thread_saved_pc(struct task_struct *t);
 
-/*
- * Print register of task into buffer. Used in fs/proc/array.c.
- */
-extern void task_show_regs(struct seq_file *m, struct task_struct *task);
-
 extern void show_code(struct pt_regs *regs);
 
 unsigned long get_wchan(struct task_struct *p);
--- linux-mvl-dove-2.6.32.orig/arch/s390/include/asm/system.h
+++ linux-mvl-dove-2.6.32/arch/s390/include/asm/system.h
@@ -97,7 +97,6 @@
 
 extern void account_vtime(struct task_struct *, struct task_struct *);
 extern void account_tick_vtime(struct task_struct *);
-extern void account_system_vtime(struct task_struct *);
 
 #ifdef CONFIG_PFAULT
 extern void pfault_irq_init(void);
--- linux-mvl-dove-2.6.32.orig/arch/s390/include/asm/compat.h
+++ linux-mvl-dove-2.6.32/arch/s390/include/asm/compat.h
@@ -180,7 +180,7 @@
 
 #endif
 
-static inline void __user *compat_alloc_user_space(long len)
+static inline void __user *arch_compat_alloc_user_space(long len)
 {
 	unsigned long stack;
 
--- linux-mvl-dove-2.6.32.orig/arch/s390/include/asm/vdso.h
+++ linux-mvl-dove-2.6.32/arch/s390/include/asm/vdso.h
@@ -7,7 +7,7 @@
 #define VDSO32_LBASE	0
 #define VDSO64_LBASE	0
 
-#define VDSO_VERSION_STRING	LINUX_2.6.26
+#define VDSO_VERSION_STRING	LINUX_2.6.29
 
 #ifndef __ASSEMBLY__
 
--- linux-mvl-dove-2.6.32.orig/arch/s390/include/asm/cputime.h
+++ linux-mvl-dove-2.6.32/arch/s390/include/asm/cputime.h
@@ -183,6 +183,7 @@
 	unsigned long long idle_count;
 	unsigned long long idle_enter;
 	unsigned long long idle_time;
+	int nohz_delay;
 };
 
 DECLARE_PER_CPU(struct s390_idle_data, s390_idle);
@@ -198,4 +199,11 @@
 		vtime_start_cpu();
 }
 
+static inline int s390_nohz_delay(int cpu)
+{
+	return per_cpu(s390_idle, cpu).nohz_delay != 0;
+}
+
+#define arch_needs_cpu(cpu) s390_nohz_delay(cpu)
+
 #endif /* _S390_CPUTIME_H */
--- linux-mvl-dove-2.6.32.orig/arch/s390/lib/delay.c
+++ linux-mvl-dove-2.6.32/arch/s390/lib/delay.c
@@ -29,17 +29,21 @@
 {
 	unsigned long mask, cr0, cr0_saved;
 	u64 clock_saved;
+	u64 end;
 
+	mask = psw_kernel_bits | PSW_MASK_WAIT | PSW_MASK_EXT;
+	end = get_clock() + (usecs << 12);
 	clock_saved = local_tick_disable();
-	set_clock_comparator(get_clock() + (usecs << 12));
 	__ctl_store(cr0_saved, 0, 0);
 	cr0 = (cr0_saved & 0xffff00e0) | 0x00000800;
 	__ctl_load(cr0 , 0, 0);
-	mask = psw_kernel_bits | PSW_MASK_WAIT | PSW_MASK_EXT;
 	lockdep_off();
-	trace_hardirqs_on();
-	__load_psw_mask(mask);
-	local_irq_disable();
+	do {
+		set_clock_comparator(end);
+		trace_hardirqs_on();
+		__load_psw_mask(mask);
+		local_irq_disable();
+	} while (get_clock() < end);
 	lockdep_on();
 	__ctl_load(cr0_saved, 0, 0);
 	local_tick_enable(clock_saved);
--- linux-mvl-dove-2.6.32.orig/arch/s390/kernel/vtime.c
+++ linux-mvl-dove-2.6.32/arch/s390/kernel/vtime.c
@@ -167,6 +167,8 @@
 	/* Wait for external, I/O or machine check interrupt. */
 	psw.mask = psw_kernel_bits | PSW_MASK_WAIT | PSW_MASK_IO | PSW_MASK_EXT;
 
+	idle->nohz_delay = 0;
+
 	/* Check if the CPU timer needs to be reprogrammed. */
 	if (vq->do_spt) {
 		__u64 vmax = VTIMER_MAX_SLICE;
--- linux-mvl-dove-2.6.32.orig/arch/s390/kernel/sys_s390.c
+++ linux-mvl-dove-2.6.32/arch/s390/kernel/sys_s390.c
@@ -32,32 +32,6 @@
 #include <asm/uaccess.h>
 #include "entry.h"
 
-/* common code for old and new mmaps */
-static inline long do_mmap2(
-	unsigned long addr, unsigned long len,
-	unsigned long prot, unsigned long flags,
-	unsigned long fd, unsigned long pgoff)
-{
-	long error = -EBADF;
-	struct file * file = NULL;
-
-	flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-	if (!(flags & MAP_ANONYMOUS)) {
-		file = fget(fd);
-		if (!file)
-			goto out;
-	}
-
-	down_write(&current->mm->mmap_sem);
-	error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
-	up_write(&current->mm->mmap_sem);
-
-	if (file)
-		fput(file);
-out:
-	return error;
-}
-
 /*
  * Perform the select(nd, in, out, ex, tv) and mmap() system
  * calls. Linux for S/390 isn't able to handle more than 5
@@ -81,7 +55,7 @@
 
 	if (copy_from_user(&a, arg, sizeof(a)))
 		goto out;
-	error = do_mmap2(a.addr, a.len, a.prot, a.flags, a.fd, a.offset);
+	error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd, a.offset);
 out:
 	return error;
 }
@@ -98,7 +72,7 @@
 	if (a.offset & ~PAGE_MASK)
 		goto out;
 
-	error = do_mmap2(a.addr, a.len, a.prot, a.flags, a.fd, a.offset >> PAGE_SHIFT);
+	error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd, a.offset >> PAGE_SHIFT);
 out:
 	return error;
 }
--- linux-mvl-dove-2.6.32.orig/arch/s390/kernel/nmi.c
+++ linux-mvl-dove-2.6.32/arch/s390/kernel/nmi.c
@@ -95,7 +95,6 @@
 static int notrace s390_revalidate_registers(struct mci *mci)
 {
 	int kill_task;
-	u64 tmpclock;
 	u64 zero;
 	void *fpt_save_area, *fpt_creg_save_area;
 
@@ -214,11 +213,10 @@
 			: "0", "cc");
 #endif
 	/* Revalidate clock comparator register */
-	asm volatile(
-		"	stck	0(%1)\n"
-		"	sckc	0(%1)"
-		: "=m" (tmpclock) : "a" (&(tmpclock)) : "cc", "memory");
-
+	if (S390_lowcore.clock_comparator == -1)
+		set_clock_comparator(get_clock());
+	else
+		set_clock_comparator(S390_lowcore.clock_comparator);
 	/* Check if old PSW is valid */
 	if (!mci->wp)
 		/*
--- linux-mvl-dove-2.6.32.orig/arch/s390/kernel/traps.c
+++ linux-mvl-dove-2.6.32/arch/s390/kernel/traps.c
@@ -243,43 +243,6 @@
 	show_last_breaking_event(regs);
 }
 
-/* This is called from fs/proc/array.c */
-void task_show_regs(struct seq_file *m, struct task_struct *task)
-{
-	struct pt_regs *regs;
-
-	regs = task_pt_regs(task);
-	seq_printf(m, "task: %p, ksp: %p\n",
-		       task, (void *)task->thread.ksp);
-	seq_printf(m, "User PSW : %p %p\n",
-		       (void *) regs->psw.mask, (void *)regs->psw.addr);
-
-	seq_printf(m, "User GPRS: " FOURLONG,
-			  regs->gprs[0], regs->gprs[1],
-			  regs->gprs[2], regs->gprs[3]);
-	seq_printf(m, "           " FOURLONG,
-			  regs->gprs[4], regs->gprs[5],
-			  regs->gprs[6], regs->gprs[7]);
-	seq_printf(m, "           " FOURLONG,
-			  regs->gprs[8], regs->gprs[9],
-			  regs->gprs[10], regs->gprs[11]);
-	seq_printf(m, "           " FOURLONG,
-			  regs->gprs[12], regs->gprs[13],
-			  regs->gprs[14], regs->gprs[15]);
-	seq_printf(m, "User ACRS: %08x %08x %08x %08x\n",
-			  task->thread.acrs[0], task->thread.acrs[1],
-			  task->thread.acrs[2], task->thread.acrs[3]);
-	seq_printf(m, "           %08x %08x %08x %08x\n",
-			  task->thread.acrs[4], task->thread.acrs[5],
-			  task->thread.acrs[6], task->thread.acrs[7]);
-	seq_printf(m, "           %08x %08x %08x %08x\n",
-			  task->thread.acrs[8], task->thread.acrs[9],
-			  task->thread.acrs[10], task->thread.acrs[11]);
-	seq_printf(m, "           %08x %08x %08x %08x\n",
-			  task->thread.acrs[12], task->thread.acrs[13],
-			  task->thread.acrs[14], task->thread.acrs[15]);
-}
-
 static DEFINE_SPINLOCK(die_lock);
 
 void die(const char * str, struct pt_regs * regs, long err)
--- linux-mvl-dove-2.6.32.orig/arch/s390/kernel/ptrace.c
+++ linux-mvl-dove-2.6.32/arch/s390/kernel/ptrace.c
@@ -632,7 +632,7 @@
 
 asmlinkage long do_syscall_trace_enter(struct pt_regs *regs)
 {
-	long ret;
+	long ret = 0;
 
 	/* Do the secure computing check first. */
 	secure_computing(regs->gprs[2]);
@@ -641,7 +641,6 @@
 	 * The sysc_tracesys code in entry.S stored the system
 	 * call number to gprs[2].
 	 */
-	ret = regs->gprs[2];
 	if (test_thread_flag(TIF_SYSCALL_TRACE) &&
 	    (tracehook_report_syscall_entry(regs) ||
 	     regs->gprs[2] >= NR_syscalls)) {
@@ -663,7 +662,7 @@
 				    regs->gprs[2], regs->orig_gpr2,
 				    regs->gprs[3], regs->gprs[4],
 				    regs->gprs[5]);
-	return ret;
+	return ret ?: regs->gprs[2];
 }
 
 asmlinkage void do_syscall_trace_exit(struct pt_regs *regs)
--- linux-mvl-dove-2.6.32.orig/arch/s390/kernel/s390_ext.c
+++ linux-mvl-dove-2.6.32/arch/s390/kernel/s390_ext.c
@@ -126,6 +126,8 @@
 		/* Serve timer interrupts first. */
 		clock_comparator_work();
 	kstat_cpu(smp_processor_id()).irqs[EXTERNAL_INTERRUPT]++;
+	if (code != 0x1004)
+		__get_cpu_var(s390_idle).nohz_delay = 1;
         index = ext_hash(code);
 	for (p = ext_int_hash[index]; p; p = p->next) {
 		if (likely(p->code == code))
--- linux-mvl-dove-2.6.32.orig/arch/s390/kernel/time.c
+++ linux-mvl-dove-2.6.32/arch/s390/kernel/time.c
@@ -214,7 +214,8 @@
 	return &clocksource_tod;
 }
 
-void update_vsyscall(struct timespec *wall_time, struct clocksource *clock)
+void update_vsyscall(struct timespec *wall_time, struct clocksource *clock,
+		     u32 mult)
 {
 	if (clock != &clocksource_tod)
 		return;
--- linux-mvl-dove-2.6.32.orig/arch/s390/kernel/compat_linux.c
+++ linux-mvl-dove-2.6.32/arch/s390/kernel/compat_linux.c
@@ -683,38 +683,6 @@
 	u32	offset;
 };
 
-/* common code for old and new mmaps */
-static inline long do_mmap2(
-	unsigned long addr, unsigned long len,
-	unsigned long prot, unsigned long flags,
-	unsigned long fd, unsigned long pgoff)
-{
-	struct file * file = NULL;
-	unsigned long error = -EBADF;
-
-	flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-	if (!(flags & MAP_ANONYMOUS)) {
-		file = fget(fd);
-		if (!file)
-			goto out;
-	}
-
-	down_write(&current->mm->mmap_sem);
-	error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
-	if (!IS_ERR((void *) error) && error + len >= 0x80000000ULL) {
-		/* Result is out of bounds.  */
-		do_munmap(current->mm, addr, len);
-		error = -ENOMEM;
-	}
-	up_write(&current->mm->mmap_sem);
-
-	if (file)
-		fput(file);
-out:    
-	return error;
-}
-
-
 asmlinkage unsigned long
 old32_mmap(struct mmap_arg_struct_emu31 __user *arg)
 {
@@ -728,7 +696,8 @@
 	if (a.offset & ~PAGE_MASK)
 		goto out;
 
-	error = do_mmap2(a.addr, a.len, a.prot, a.flags, a.fd, a.offset >> PAGE_SHIFT); 
+	error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd,
+			       a.offset >> PAGE_SHIFT);
 out:
 	return error;
 }
@@ -741,7 +710,7 @@
 
 	if (copy_from_user(&a, arg, sizeof(a)))
 		goto out;
-	error = do_mmap2(a.addr, a.len, a.prot, a.flags, a.fd, a.offset);
+	error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd, a.offset);
 out:
 	return error;
 }
--- linux-mvl-dove-2.6.32.orig/arch/s390/kernel/entry64.S
+++ linux-mvl-dove-2.6.32/arch/s390/kernel/entry64.S
@@ -549,6 +549,7 @@
 	mvc	__THREAD_per+__PER_access_id(1,%r8),__LC_PER_ACCESS_ID
 	oi	__TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
 	TRACE_IRQS_ON
+	lmg	%r2,%r6,SP_R2(%r15)	# load svc arguments
 	stosm	__SF_EMPTY(%r15),0x03	# reenable interrupts
 	j	sysc_do_svc
 
--- linux-mvl-dove-2.6.32.orig/arch/s390/kernel/head64.S
+++ linux-mvl-dove-2.6.32/arch/s390/kernel/head64.S
@@ -83,6 +83,8 @@
 	slr	%r0,%r0 		# set cpuid to zero
 	sigp	%r1,%r0,0x12		# switch to esame mode
 	sam64				# switch to 64 bit mode
+	llgfr	%r13,%r13		# clear high-order half of base reg
+	lmh	%r0,%r15,.Lzero64-.LPG1(%r13)	# clear high-order half
 	lctlg	%c0,%c15,.Lctl-.LPG1(%r13)	# load control registers
 	lg	%r12,.Lparmaddr-.LPG1(%r13)	# pointer to parameter area
 					# move IPL device to lowcore
@@ -127,6 +129,7 @@
 .L4malign:.quad 0xffffffffffc00000
 .Lscan2g:.quad	0x80000000 + 0x20000 - 8	# 2GB + 128K - 8
 .Lnop:	.long	0x07000700
+.Lzero64:.fill	16,4,0x0
 #ifdef CONFIG_ZFCPDUMP
 .Lcurrent_cpu:
 	.long 0x0
--- linux-mvl-dove-2.6.32.orig/arch/s390/kernel/entry.S
+++ linux-mvl-dove-2.6.32/arch/s390/kernel/entry.S
@@ -571,6 +571,7 @@
 	mvc	__THREAD_per+__PER_access_id(1,%r8),__LC_PER_ACCESS_ID
 	oi	__TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
 	TRACE_IRQS_ON
+	lm	%r2,%r6,SP_R2(%r15)	# load svc arguments
 	stosm	__SF_EMPTY(%r15),0x03	# reenable interrupts
 	b	BASED(sysc_do_svc)
 
--- linux-mvl-dove-2.6.32.orig/arch/s390/kvm/intercept.c
+++ linux-mvl-dove-2.6.32/arch/s390/kvm/intercept.c
@@ -213,7 +213,7 @@
 	return rc2;
 }
 
-static const intercept_handler_t intercept_funcs[0x48 >> 2] = {
+static const intercept_handler_t intercept_funcs[] = {
 	[0x00 >> 2] = handle_noop,
 	[0x04 >> 2] = handle_instruction,
 	[0x08 >> 2] = handle_prog,
@@ -230,7 +230,7 @@
 	intercept_handler_t func;
 	u8 code = vcpu->arch.sie_block->icptcode;
 
-	if (code & 3 || code > 0x48)
+	if (code & 3 || (code >> 2) >= ARRAY_SIZE(intercept_funcs))
 		return -ENOTSUPP;
 	func = intercept_funcs[code >> 2];
 	if (func)
--- linux-mvl-dove-2.6.32.orig/arch/s390/kvm/kvm-s390.c
+++ linux-mvl-dove-2.6.32/arch/s390/kvm/kvm-s390.c
@@ -116,10 +116,16 @@
 
 int kvm_dev_ioctl_check_extension(long ext)
 {
+	int r;
+
 	switch (ext) {
+	case KVM_CAP_S390_PSW:
+		r = 1;
+		break;
 	default:
-		return 0;
+		r = 0;
 	}
+	return r;
 }
 
 /* Section: vm related */
@@ -332,11 +338,13 @@
 
 	rc = kvm_vcpu_init(vcpu, kvm, id);
 	if (rc)
-		goto out_free_cpu;
+		goto out_free_sie_block;
 	VM_EVENT(kvm, 3, "create cpu %d at %p, sie block at %p", id, vcpu,
 		 vcpu->arch.sie_block);
 
 	return vcpu;
+out_free_sie_block:
+	free_page((unsigned long)(vcpu->arch.sie_block));
 out_free_cpu:
 	kfree(vcpu);
 out_nomem:
@@ -419,8 +427,10 @@
 	vcpu_load(vcpu);
 	if (atomic_read(&vcpu->arch.sie_block->cpuflags) & CPUSTAT_RUNNING)
 		rc = -EBUSY;
-	else
-		vcpu->arch.sie_block->gpsw = psw;
+	else {
+		vcpu->run->psw_mask = psw.mask;
+		vcpu->run->psw_addr = psw.addr;
+	}
 	vcpu_put(vcpu);
 	return rc;
 }
@@ -508,9 +518,6 @@
 
 	switch (kvm_run->exit_reason) {
 	case KVM_EXIT_S390_SIEIC:
-		vcpu->arch.sie_block->gpsw.mask = kvm_run->s390_sieic.mask;
-		vcpu->arch.sie_block->gpsw.addr = kvm_run->s390_sieic.addr;
-		break;
 	case KVM_EXIT_UNKNOWN:
 	case KVM_EXIT_INTR:
 	case KVM_EXIT_S390_RESET:
@@ -519,6 +526,9 @@
 		BUG();
 	}
 
+	vcpu->arch.sie_block->gpsw.mask = kvm_run->psw_mask;
+	vcpu->arch.sie_block->gpsw.addr = kvm_run->psw_addr;
+
 	might_fault();
 
 	do {
@@ -538,8 +548,6 @@
 		/* intercept cannot be handled in-kernel, prepare kvm-run */
 		kvm_run->exit_reason         = KVM_EXIT_S390_SIEIC;
 		kvm_run->s390_sieic.icptcode = vcpu->arch.sie_block->icptcode;
-		kvm_run->s390_sieic.mask     = vcpu->arch.sie_block->gpsw.mask;
-		kvm_run->s390_sieic.addr     = vcpu->arch.sie_block->gpsw.addr;
 		kvm_run->s390_sieic.ipa      = vcpu->arch.sie_block->ipa;
 		kvm_run->s390_sieic.ipb      = vcpu->arch.sie_block->ipb;
 		rc = 0;
@@ -551,6 +559,9 @@
 		rc = 0;
 	}
 
+	kvm_run->psw_mask     = vcpu->arch.sie_block->gpsw.mask;
+	kvm_run->psw_addr     = vcpu->arch.sie_block->gpsw.addr;
+
 	if (vcpu->sigset_active)
 		sigprocmask(SIG_SETMASK, &sigsaved, NULL);
 
--- linux-mvl-dove-2.6.32.orig/arch/s390/kvm/sigp.c
+++ linux-mvl-dove-2.6.32/arch/s390/kvm/sigp.c
@@ -188,9 +188,9 @@
 
 	/* make sure that the new value is valid memory */
 	address = address & 0x7fffe000u;
-	if ((copy_from_guest(vcpu, &tmp,
-		(u64) (address + vcpu->arch.sie_block->gmsor) , 1)) ||
-	   (copy_from_guest(vcpu, &tmp, (u64) (address +
+	if ((copy_from_user(&tmp, (void __user *)
+		(address + vcpu->arch.sie_block->gmsor) , 1)) ||
+	   (copy_from_user(&tmp, (void __user *)(address +
 			vcpu->arch.sie_block->gmsor + PAGE_SIZE), 1))) {
 		*reg |= SIGP_STAT_INVALID_PARAMETER;
 		return 1; /* invalid parameter */
--- linux-mvl-dove-2.6.32.orig/arch/m32r/kernel/syscall_table.S
+++ linux-mvl-dove-2.6.32/arch/m32r/kernel/syscall_table.S
@@ -191,7 +191,7 @@
 	.long sys_ni_syscall		/* streams2 */
 	.long sys_vfork			/* 190 */
 	.long sys_getrlimit
-	.long sys_mmap2
+	.long sys_mmap_pgoff
 	.long sys_truncate64
 	.long sys_ftruncate64
 	.long sys_stat64		/* 195 */
--- linux-mvl-dove-2.6.32.orig/arch/m32r/kernel/sys_m32r.c
+++ linux-mvl-dove-2.6.32/arch/m32r/kernel/sys_m32r.c
@@ -76,30 +76,6 @@
 	return oldval;
 }
 
-asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
-	unsigned long prot, unsigned long flags,
-	unsigned long fd, unsigned long pgoff)
-{
-	int error = -EBADF;
-	struct file *file = NULL;
-
-	flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-	if (!(flags & MAP_ANONYMOUS)) {
-		file = fget(fd);
-		if (!file)
-			goto out;
-	}
-
-	down_write(&current->mm->mmap_sem);
-	error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
-	up_write(&current->mm->mmap_sem);
-
-	if (file)
-		fput(file);
-out:
-	return error;
-}
-
 /*
  * sys_ipc() is the de-multiplexer for the SysV IPC calls..
  *
--- linux-mvl-dove-2.6.32.orig/arch/score/kernel/sys_score.c
+++ linux-mvl-dove-2.6.32/arch/score/kernel/sys_score.c
@@ -36,34 +36,16 @@
 sys_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
 	  unsigned long flags, unsigned long fd, unsigned long pgoff)
 {
-	int error = -EBADF;
-	struct file *file = NULL;
-
-	if (pgoff & (~PAGE_MASK >> 12))
-		return -EINVAL;
-
-	flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-	if (!(flags & MAP_ANONYMOUS)) {
-		file = fget(fd);
-		if (!file)
-			return error;
-	}
-
-	down_write(&current->mm->mmap_sem);
-	error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
-	up_write(&current->mm->mmap_sem);
-
-	if (file)
-		fput(file);
-
-	return error;
+	return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff);
 }
 
 asmlinkage long
 sys_mmap(unsigned long addr, unsigned long len, unsigned long prot,
-	unsigned long flags, unsigned long fd, off_t pgoff)
+	unsigned long flags, unsigned long fd, off_t offset)
 {
-	return sys_mmap2(addr, len, prot, flags, fd, pgoff >> PAGE_SHIFT);
+	if (unlikely(offset & ~PAGE_MASK))
+		return -EINVAL;
+	return sys_mmap_pgoff(addr, len, prot, flags, fd, offset >> PAGE_SHIFT);
 }
 
 asmlinkage long
--- linux-mvl-dove-2.6.32.orig/arch/x86/Kconfig
+++ linux-mvl-dove-2.6.32/arch/x86/Kconfig
@@ -227,6 +227,11 @@
 
 config KTIME_SCALAR
 	def_bool X86_32
+
+config ARCH_CPU_PROBE_RELEASE
+	def_bool y
+	depends on HOTPLUG_CPU
+
 source "init/Kconfig"
 source "kernel/Kconfig.freezer"
 
@@ -370,6 +375,12 @@
 # Following is an alphabetically sorted list of 32 bit extended platforms
 # Please maintain the alphabetic order if and when there are additions
 
+config X86_LPIA
+	bool "LPIA-compatible"
+	depends on X86_32 && X86_PC
+	help
+	  Choose this option if your computer is an LPIA platform.
+
 config X86_ELAN
 	bool "AMD Elan"
 	depends on X86_32
@@ -622,7 +633,7 @@
 	bool "GART IOMMU support" if EMBEDDED
 	default y
 	select SWIOTLB
-	depends on X86_64 && PCI
+	depends on X86_64 && PCI && K8_NB
 	---help---
 	  Support for full DMA access of devices with 32bit memory access only
 	  on systems with more than 3GB. This is usually needed for USB,
@@ -748,6 +759,17 @@
 	  making when dealing with multi-core CPU chips at a cost of slightly
 	  increased overhead in some places. If unsure say N here.
 
+config IRQ_TIME_ACCOUNTING
+	bool "Fine granularity task level IRQ time accounting"
+	default n
+	---help---
+	  Select this option to enable fine granularity task irq time
+	  accounting. This is done by reading a timestamp on each
+	  transitions between softirq and hardirq state, so there can be a
+	  small performance impact.
+
+	  If in doubt, say N here.
+
 source "kernel/Kconfig.preempt"
 
 config X86_UP_APIC
@@ -827,6 +849,14 @@
 	   Additional support for intel specific MCE features such as
 	   the thermal monitor.
 
+config X86_MCE_XEON75XX
+	tristate "Intel Xeon 7500 series corrected memory error driver"
+	depends on X86_MCE_INTEL && PCI
+	---help---
+	   Add support for a Intel Xeon 7500 series specific memory error driver.
+	   This allows to report the DIMM and physical address on a corrected
+	   memory error machine check event.
+
 config X86_MCE_AMD
 	def_bool y
 	prompt "AMD MCE features"
@@ -984,12 +1014,6 @@
 	  with major 203 and minors 0 to 31 for /dev/cpu/0/cpuid to
 	  /dev/cpu/31/cpuid.
 
-config X86_CPU_DEBUG
-	tristate "/sys/kernel/debug/x86/cpu/* - CPU Debug support"
-	---help---
-	  If you select this option, this will provide various x86 CPUs
-	  information through debugfs.
-
 choice
 	prompt "High Memory Support"
 	default HIGHMEM4G if !X86_NUMAQ
@@ -1242,6 +1266,11 @@
 	def_bool X86_64
 	depends on MEMORY_HOTPLUG
 
+config ILLEGAL_POINTER_VALUE
+       hex
+       default 0 if X86_32
+       default 0xdead000000000000 if X86_64
+
 source "mm/Kconfig"
 
 config HIGHPTE
@@ -2028,7 +2057,7 @@
 
 config K8_NB
 	def_bool y
-	depends on AGP_AMD64 || (X86_64 && (GART_IOMMU || (PCI && NUMA)))
+	depends on CPU_SUP_AMD && PCI
 
 source "drivers/pcmcia/Kconfig"
 
@@ -2079,6 +2108,8 @@
 
 source "drivers/Kconfig"
 
+source "ubuntu/Kconfig"
+
 source "drivers/firmware/Kconfig"
 
 source "fs/Kconfig"
--- linux-mvl-dove-2.6.32.orig/arch/x86/Kconfig.cpu
+++ linux-mvl-dove-2.6.32/arch/x86/Kconfig.cpu
@@ -323,7 +323,7 @@
 
 config X86_XADD
 	def_bool y
-	depends on X86_32 && !M386
+	depends on X86_64 || !M386
 
 config X86_PPRO_FENCE
 	bool "PentiumPro memory ordering errata workaround"
@@ -400,7 +400,7 @@
 
 config X86_CMPXCHG64
 	def_bool y
-	depends on !M386 && !M486
+	depends on X86_PAE || X86_64 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MATOM
 
 # this should be set for all -march=.. options where the compiler
 # generates cmov.
--- linux-mvl-dove-2.6.32.orig/arch/x86/Makefile_32.cpu
+++ linux-mvl-dove-2.6.32/arch/x86/Makefile_32.cpu
@@ -46,6 +46,13 @@
 # cpu entries
 cflags-$(CONFIG_X86_GENERIC) 	+= $(call tune,generic,$(call tune,i686))
 
+# Work around the pentium-mmx code generator madness of gcc4.4.x which
+# does stack alignment by generating horrible code _before_ the mcount
+# prologue (push %ebp, mov %esp, %ebp) which breaks the function graph
+# tracer assumptions. For i686, generic, core2 this is set by the
+# compiler anyway
+cflags-$(CONFIG_FUNCTION_GRAPH_TRACER) += $(call cc-option,-maccumulate-outgoing-args)
+
 # Bug fix for binutils: this option is required in order to keep
 # binutils from generating NOPL instructions against our will.
 ifneq ($(CONFIG_X86_P6_NOP),y)
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/mmu.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/mmu.h
@@ -7,12 +7,19 @@
 /*
  * The x86 doesn't have a mmu context, but
  * we put the segment information here.
+ *
+ * exec_limit is used to track the range PROT_EXEC
+ * mappings span.
  */
 typedef struct {
 	void *ldt;
 	int size;
 	struct mutex lock;
 	void *vdso;
+#ifdef CONFIG_X86_32
+	struct desc_struct user_cs;
+	unsigned long exec_limit;
+#endif
 } mm_context_t;
 
 #ifdef CONFIG_SMP
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/pgtable_32.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/pgtable_32.h
@@ -27,6 +27,7 @@
 struct vm_area_struct;
 
 extern pgd_t swapper_pg_dir[1024];
+extern pgd_t trampoline_pg_dir[1024];
 
 static inline void pgtable_cache_init(void) { }
 static inline void check_pgt_cache(void) { }
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/paravirt_types.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/paravirt_types.h
@@ -118,6 +118,9 @@
 	void (*store_gdt)(struct desc_ptr *);
 	void (*store_idt)(struct desc_ptr *);
 	void (*set_ldt)(const void *desc, unsigned entries);
+#ifdef CONFIG_X86_32
+	void (*load_user_cs_desc)(int cpu, struct mm_struct *mm);
+#endif /*CONFIG_X86_32*/
 	unsigned long (*store_tr)(void);
 	void (*load_tls)(struct thread_struct *t, unsigned int cpu);
 #ifdef CONFIG_X86_64
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/suspend_32.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/suspend_32.h
@@ -15,6 +15,8 @@
 struct saved_context {
 	u16 es, fs, gs, ss;
 	unsigned long cr0, cr2, cr3, cr4;
+	u64 misc_enable;
+	bool misc_enable_saved;
 	struct desc_ptr gdt;
 	struct desc_ptr idt;
 	u16 ldt;
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/cmpxchg_32.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/cmpxchg_32.h
@@ -17,60 +17,33 @@
 #define __xg(x) ((struct __xchg_dummy *)(x))
 
 /*
- * The semantics of XCHGCMP8B are a bit strange, this is why
- * there is a loop and the loading of %%eax and %%edx has to
- * be inside. This inlines well in most cases, the cached
- * cost is around ~38 cycles. (in the future we might want
- * to do an SIMD/3DNOW!/MMX/FPU 64-bit store here, but that
- * might have an implicit FPU-save as a cost, so it's not
- * clear which path to go.)
+ * CMPXCHG8B only writes to the target if we had the previous
+ * value in registers, otherwise it acts as a read and gives us the
+ * "new previous" value.  That is why there is a loop.  Preloading
+ * EDX:EAX is a performance optimization: in the common case it means
+ * we need only one locked operation.
  *
- * cmpxchg8b must be used with the lock prefix here to allow
- * the instruction to be executed atomically, see page 3-102
- * of the instruction set reference 24319102.pdf. We need
- * the reader side to see the coherent 64bit value.
+ * A SIMD/3DNOW!/MMX/FPU 64-bit store here would require at the very
+ * least an FPU save and/or %cr0.ts manipulation.
+ *
+ * cmpxchg8b must be used with the lock prefix here to allow the
+ * instruction to be executed atomically.  We need to have the reader
+ * side to see the coherent 64bit value.
  */
-static inline void __set_64bit(unsigned long long *ptr,
-			       unsigned int low, unsigned int high)
+static inline void set_64bit(volatile u64 *ptr, u64 value)
 {
+	u32 low  = value;
+	u32 high = value >> 32;
+	u64 prev = *ptr;
+
 	asm volatile("\n1:\t"
-		     "movl (%0), %%eax\n\t"
-		     "movl 4(%0), %%edx\n\t"
-		     LOCK_PREFIX "cmpxchg8b (%0)\n\t"
+		     LOCK_PREFIX "cmpxchg8b %0\n\t"
 		     "jnz 1b"
-		     : /* no outputs */
-		     : "D"(ptr),
-		       "b"(low),
-		       "c"(high)
-		     : "ax", "dx", "memory");
-}
-
-static inline void __set_64bit_constant(unsigned long long *ptr,
-					unsigned long long value)
-{
-	__set_64bit(ptr, (unsigned int)value, (unsigned int)(value >> 32));
-}
-
-#define ll_low(x)	*(((unsigned int *)&(x)) + 0)
-#define ll_high(x)	*(((unsigned int *)&(x)) + 1)
-
-static inline void __set_64bit_var(unsigned long long *ptr,
-				   unsigned long long value)
-{
-	__set_64bit(ptr, ll_low(value), ll_high(value));
+		     : "=m" (*ptr), "+A" (prev)
+		     : "b" (low), "c" (high)
+		     : "memory");
 }
 
-#define set_64bit(ptr, value)			\
-	(__builtin_constant_p((value))		\
-	 ? __set_64bit_constant((ptr), (value))	\
-	 : __set_64bit_var((ptr), (value)))
-
-#define _set_64bit(ptr, value)						\
-	(__builtin_constant_p(value)					\
-	 ? __set_64bit(ptr, (unsigned int)(value),			\
-		       (unsigned int)((value) >> 32))			\
-	 : __set_64bit(ptr, ll_low((value)), ll_high((value))))
-
 /*
  * Note: no "lock" prefix even on SMP: xchg always implies lock anyway
  * Note 2: xchg has side effect, so that attribute volatile is necessary,
@@ -82,20 +55,20 @@
 	switch (size) {
 	case 1:
 		asm volatile("xchgb %b0,%1"
-			     : "=q" (x)
-			     : "m" (*__xg(ptr)), "0" (x)
+			     : "=q" (x), "+m" (*__xg(ptr))
+			     : "0" (x)
 			     : "memory");
 		break;
 	case 2:
 		asm volatile("xchgw %w0,%1"
-			     : "=r" (x)
-			     : "m" (*__xg(ptr)), "0" (x)
+			     : "=r" (x), "+m" (*__xg(ptr))
+			     : "0" (x)
 			     : "memory");
 		break;
 	case 4:
 		asm volatile("xchgl %0,%1"
-			     : "=r" (x)
-			     : "m" (*__xg(ptr)), "0" (x)
+			     : "=r" (x), "+m" (*__xg(ptr))
+			     : "0" (x)
 			     : "memory");
 		break;
 	}
@@ -139,21 +112,21 @@
 	unsigned long prev;
 	switch (size) {
 	case 1:
-		asm volatile(LOCK_PREFIX "cmpxchgb %b1,%2"
-			     : "=a"(prev)
-			     : "q"(new), "m"(*__xg(ptr)), "0"(old)
+		asm volatile(LOCK_PREFIX "cmpxchgb %b2,%1"
+			     : "=a"(prev), "+m"(*__xg(ptr))
+			     : "q"(new), "0"(old)
 			     : "memory");
 		return prev;
 	case 2:
-		asm volatile(LOCK_PREFIX "cmpxchgw %w1,%2"
-			     : "=a"(prev)
-			     : "r"(new), "m"(*__xg(ptr)), "0"(old)
+		asm volatile(LOCK_PREFIX "cmpxchgw %w2,%1"
+			     : "=a"(prev), "+m"(*__xg(ptr))
+			     : "r"(new), "0"(old)
 			     : "memory");
 		return prev;
 	case 4:
-		asm volatile(LOCK_PREFIX "cmpxchgl %1,%2"
-			     : "=a"(prev)
-			     : "r"(new), "m"(*__xg(ptr)), "0"(old)
+		asm volatile(LOCK_PREFIX "cmpxchgl %2,%1"
+			     : "=a"(prev), "+m"(*__xg(ptr))
+			     : "r"(new), "0"(old)
 			     : "memory");
 		return prev;
 	}
@@ -172,21 +145,21 @@
 	unsigned long prev;
 	switch (size) {
 	case 1:
-		asm volatile("lock; cmpxchgb %b1,%2"
-			     : "=a"(prev)
-			     : "q"(new), "m"(*__xg(ptr)), "0"(old)
+		asm volatile("lock; cmpxchgb %b2,%1"
+			     : "=a"(prev), "+m"(*__xg(ptr))
+			     : "q"(new), "0"(old)
 			     : "memory");
 		return prev;
 	case 2:
-		asm volatile("lock; cmpxchgw %w1,%2"
-			     : "=a"(prev)
-			     : "r"(new), "m"(*__xg(ptr)), "0"(old)
+		asm volatile("lock; cmpxchgw %w2,%1"
+			     : "=a"(prev), "+m"(*__xg(ptr))
+			     : "r"(new), "0"(old)
 			     : "memory");
 		return prev;
 	case 4:
-		asm volatile("lock; cmpxchgl %1,%2"
-			     : "=a"(prev)
-			     : "r"(new), "m"(*__xg(ptr)), "0"(old)
+		asm volatile("lock; cmpxchgl %2,%1"
+			     : "=a"(prev), "+m"(*__xg(ptr))
+			     : "r"(new), "0"(old)
 			     : "memory");
 		return prev;
 	}
@@ -200,21 +173,21 @@
 	unsigned long prev;
 	switch (size) {
 	case 1:
-		asm volatile("cmpxchgb %b1,%2"
-			     : "=a"(prev)
-			     : "q"(new), "m"(*__xg(ptr)), "0"(old)
+		asm volatile("cmpxchgb %b2,%1"
+			     : "=a"(prev), "+m"(*__xg(ptr))
+			     : "q"(new), "0"(old)
 			     : "memory");
 		return prev;
 	case 2:
-		asm volatile("cmpxchgw %w1,%2"
-			     : "=a"(prev)
-			     : "r"(new), "m"(*__xg(ptr)), "0"(old)
+		asm volatile("cmpxchgw %w2,%1"
+			     : "=a"(prev), "+m"(*__xg(ptr))
+			     : "r"(new), "0"(old)
 			     : "memory");
 		return prev;
 	case 4:
-		asm volatile("cmpxchgl %1,%2"
-			     : "=a"(prev)
-			     : "r"(new), "m"(*__xg(ptr)), "0"(old)
+		asm volatile("cmpxchgl %2,%1"
+			     : "=a"(prev), "+m"(*__xg(ptr))
+			     : "r"(new), "0"(old)
 			     : "memory");
 		return prev;
 	}
@@ -226,11 +199,10 @@
 					     unsigned long long new)
 {
 	unsigned long long prev;
-	asm volatile(LOCK_PREFIX "cmpxchg8b %3"
-		     : "=A"(prev)
+	asm volatile(LOCK_PREFIX "cmpxchg8b %1"
+		     : "=A"(prev), "+m" (*__xg(ptr))
 		     : "b"((unsigned long)new),
 		       "c"((unsigned long)(new >> 32)),
-		       "m"(*__xg(ptr)),
 		       "0"(old)
 		     : "memory");
 	return prev;
@@ -241,11 +213,10 @@
 						   unsigned long long new)
 {
 	unsigned long long prev;
-	asm volatile("cmpxchg8b %3"
-		     : "=A"(prev)
+	asm volatile("cmpxchg8b %1"
+		     : "=A"(prev), "+m"(*__xg(ptr))
 		     : "b"((unsigned long)new),
 		       "c"((unsigned long)(new >> 32)),
-		       "m"(*__xg(ptr)),
 		       "0"(old)
 		     : "memory");
 	return prev;
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/cmpxchg_64.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/cmpxchg_64.h
@@ -8,13 +8,11 @@
 
 #define __xg(x) ((volatile long *)(x))
 
-static inline void set_64bit(volatile unsigned long *ptr, unsigned long val)
+static inline void set_64bit(volatile u64 *ptr, u64 val)
 {
 	*ptr = val;
 }
 
-#define _set_64bit set_64bit
-
 /*
  * Note: no "lock" prefix even on SMP: xchg always implies lock anyway
  * Note 2: xchg has side effect, so that attribute volatile is necessary,
@@ -26,26 +24,26 @@
 	switch (size) {
 	case 1:
 		asm volatile("xchgb %b0,%1"
-			     : "=q" (x)
-			     : "m" (*__xg(ptr)), "0" (x)
+			     : "=q" (x), "+m" (*__xg(ptr))
+			     : "0" (x)
 			     : "memory");
 		break;
 	case 2:
 		asm volatile("xchgw %w0,%1"
-			     : "=r" (x)
-			     : "m" (*__xg(ptr)), "0" (x)
+			     : "=r" (x), "+m" (*__xg(ptr))
+			     : "0" (x)
 			     : "memory");
 		break;
 	case 4:
 		asm volatile("xchgl %k0,%1"
-			     : "=r" (x)
-			     : "m" (*__xg(ptr)), "0" (x)
+			     : "=r" (x), "+m" (*__xg(ptr))
+			     : "0" (x)
 			     : "memory");
 		break;
 	case 8:
 		asm volatile("xchgq %0,%1"
-			     : "=r" (x)
-			     : "m" (*__xg(ptr)), "0" (x)
+			     : "=r" (x), "+m" (*__xg(ptr))
+			     : "0" (x)
 			     : "memory");
 		break;
 	}
@@ -66,27 +64,27 @@
 	unsigned long prev;
 	switch (size) {
 	case 1:
-		asm volatile(LOCK_PREFIX "cmpxchgb %b1,%2"
-			     : "=a"(prev)
-			     : "q"(new), "m"(*__xg(ptr)), "0"(old)
+		asm volatile(LOCK_PREFIX "cmpxchgb %b2,%1"
+			     : "=a"(prev), "+m"(*__xg(ptr))
+			     : "q"(new), "0"(old)
 			     : "memory");
 		return prev;
 	case 2:
-		asm volatile(LOCK_PREFIX "cmpxchgw %w1,%2"
-			     : "=a"(prev)
-			     : "r"(new), "m"(*__xg(ptr)), "0"(old)
+		asm volatile(LOCK_PREFIX "cmpxchgw %w2,%1"
+			     : "=a"(prev), "+m"(*__xg(ptr))
+			     : "r"(new), "0"(old)
 			     : "memory");
 		return prev;
 	case 4:
-		asm volatile(LOCK_PREFIX "cmpxchgl %k1,%2"
-			     : "=a"(prev)
-			     : "r"(new), "m"(*__xg(ptr)), "0"(old)
+		asm volatile(LOCK_PREFIX "cmpxchgl %k2,%1"
+			     : "=a"(prev), "+m"(*__xg(ptr))
+			     : "r"(new), "0"(old)
 			     : "memory");
 		return prev;
 	case 8:
-		asm volatile(LOCK_PREFIX "cmpxchgq %1,%2"
-			     : "=a"(prev)
-			     : "r"(new), "m"(*__xg(ptr)), "0"(old)
+		asm volatile(LOCK_PREFIX "cmpxchgq %2,%1"
+			     : "=a"(prev), "+m"(*__xg(ptr))
+			     : "r"(new), "0"(old)
 			     : "memory");
 		return prev;
 	}
@@ -105,21 +103,27 @@
 	unsigned long prev;
 	switch (size) {
 	case 1:
-		asm volatile("lock; cmpxchgb %b1,%2"
-			     : "=a"(prev)
-			     : "q"(new), "m"(*__xg(ptr)), "0"(old)
+		asm volatile("lock; cmpxchgb %b2,%1"
+			     : "=a"(prev), "+m"(*__xg(ptr))
+			     : "q"(new), "0"(old)
 			     : "memory");
 		return prev;
 	case 2:
-		asm volatile("lock; cmpxchgw %w1,%2"
-			     : "=a"(prev)
-			     : "r"(new), "m"(*__xg(ptr)), "0"(old)
+		asm volatile("lock; cmpxchgw %w2,%1"
+			     : "=a"(prev), "+m"(*__xg(ptr))
+			     : "r"(new), "0"(old)
 			     : "memory");
 		return prev;
 	case 4:
-		asm volatile("lock; cmpxchgl %1,%2"
-			     : "=a"(prev)
-			     : "r"(new), "m"(*__xg(ptr)), "0"(old)
+		asm volatile("lock; cmpxchgl %k2,%1"
+			     : "=a"(prev), "+m"(*__xg(ptr))
+			     : "r"(new), "0"(old)
+			     : "memory");
+		return prev;
+	case 8:
+		asm volatile("lock; cmpxchgq %2,%1"
+			     : "=a"(prev), "+m"(*__xg(ptr))
+			     : "r"(new), "0"(old)
 			     : "memory");
 		return prev;
 	}
@@ -133,27 +137,27 @@
 	unsigned long prev;
 	switch (size) {
 	case 1:
-		asm volatile("cmpxchgb %b1,%2"
-			     : "=a"(prev)
-			     : "q"(new), "m"(*__xg(ptr)), "0"(old)
+		asm volatile("cmpxchgb %b2,%1"
+			     : "=a"(prev), "+m"(*__xg(ptr))
+			     : "q"(new), "0"(old)
 			     : "memory");
 		return prev;
 	case 2:
-		asm volatile("cmpxchgw %w1,%2"
-			     : "=a"(prev)
-			     : "r"(new), "m"(*__xg(ptr)), "0"(old)
+		asm volatile("cmpxchgw %w2,%1"
+			     : "=a"(prev), "+m"(*__xg(ptr))
+			     : "r"(new), "0"(old)
 			     : "memory");
 		return prev;
 	case 4:
-		asm volatile("cmpxchgl %k1,%2"
-			     : "=a"(prev)
-			     : "r"(new), "m"(*__xg(ptr)), "0"(old)
+		asm volatile("cmpxchgl %k2,%1"
+			     : "=a"(prev), "+m"(*__xg(ptr))
+			     : "r"(new), "0"(old)
 			     : "memory");
 		return prev;
 	case 8:
-		asm volatile("cmpxchgq %1,%2"
-			     : "=a"(prev)
-			     : "r"(new), "m"(*__xg(ptr)), "0"(old)
+		asm volatile("cmpxchgq %2,%1"
+			     : "=a"(prev), "+m"(*__xg(ptr))
+			     : "r"(new), "0"(old)
 			     : "memory");
 		return prev;
 	}
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/elf.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/elf.h
@@ -197,14 +197,8 @@
 	set_fs(USER_DS);				\
 } while (0)
 
-#define COMPAT_SET_PERSONALITY(ex)			\
-do {							\
-	if (test_thread_flag(TIF_IA32))			\
-		clear_thread_flag(TIF_ABI_PENDING);	\
-	else						\
-		set_thread_flag(TIF_ABI_PENDING);	\
-	current->personality |= force_personality32;	\
-} while (0)
+void set_personality_ia32(void);
+#define COMPAT_SET_PERSONALITY(ex) set_personality_ia32()
 
 #define COMPAT_ELF_PLATFORM			("i686")
 
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/mmu_context.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/mmu_context.h
@@ -36,8 +36,6 @@
 	unsigned cpu = smp_processor_id();
 
 	if (likely(prev != next)) {
-		/* stop flush ipis for the previous mm */
-		cpumask_clear_cpu(cpu, mm_cpumask(prev));
 #ifdef CONFIG_SMP
 		percpu_write(cpu_tlbstate.state, TLBSTATE_OK);
 		percpu_write(cpu_tlbstate.active_mm, next);
@@ -47,6 +45,9 @@
 		/* Re-load page tables */
 		load_cr3(next->pgd);
 
+		/* stop flush ipis for the previous mm */
+		cpumask_clear_cpu(cpu, mm_cpumask(prev));
+
 		/*
 		 * load the LDT, if the LDT is different:
 		 */
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/pgalloc.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/pgalloc.h
@@ -23,6 +23,11 @@
 #endif
 
 /*
+ * Flags to use when allocating a user page table page.
+ */
+extern gfp_t __userpte_alloc_gfp;
+
+/*
  * Allocate and free page tables.
  */
 extern pgd_t *pgd_alloc(struct mm_struct *);
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/desc.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/desc.h
@@ -5,6 +5,7 @@
 #include <asm/ldt.h>
 #include <asm/mmu.h>
 #include <linux/smp.h>
+#include <linux/mm_types.h>
 
 static inline void fill_ldt(struct desc_struct *desc,
 			    const struct user_desc *info)
@@ -93,6 +94,9 @@
 
 #define load_TLS(t, cpu) native_load_tls(t, cpu)
 #define set_ldt native_set_ldt
+#ifdef CONFIG_X86_32
+#define load_user_cs_desc native_load_user_cs_desc
+#endif /*CONFIG_X86_32*/
 
 #define write_ldt_entry(dt, entry, desc)	\
 	native_write_ldt_entry(dt, entry, desc)
@@ -392,4 +396,25 @@
 	_set_gate(n, GATE_INTERRUPT, addr, 0x3, ist, __KERNEL_CS);
 }
 
+#ifdef CONFIG_X86_32
+static inline void set_user_cs(struct desc_struct *desc, unsigned long limit)
+{
+	limit = (limit - 1) / PAGE_SIZE;
+	desc->a = limit & 0xffff;
+	desc->b = (limit & 0xf0000) | 0x00c0fb00;
+}
+
+static inline void native_load_user_cs_desc(int cpu, struct mm_struct *mm)
+{
+	get_cpu_gdt_table(cpu)[GDT_ENTRY_DEFAULT_USER_CS] = (mm)->context.user_cs;
+}
+
+#define arch_add_exec_range arch_add_exec_range
+#define arch_remove_exec_range arch_remove_exec_range
+#define arch_flush_exec_range arch_flush_exec_range
+extern void arch_add_exec_range(struct mm_struct *mm, unsigned long limit);
+extern void arch_remove_exec_range(struct mm_struct *mm, unsigned long limit);
+extern void arch_flush_exec_range(struct mm_struct *mm);
+#endif /* CONFIG_X86_32 */
+
 #endif /* _ASM_X86_DESC_H */
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/syscalls.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/syscalls.h
@@ -55,8 +55,6 @@
 struct oldold_utsname;
 struct old_utsname;
 
-asmlinkage long sys_mmap2(unsigned long, unsigned long, unsigned long,
-			  unsigned long, unsigned long, unsigned long);
 asmlinkage int old_mmap(struct mmap_arg_struct __user *);
 asmlinkage int old_select(struct sel_arg_struct __user *);
 asmlinkage int sys_ipc(uint, int, int, int, void __user *, long);
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/kvm_emulate.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/kvm_emulate.h
@@ -54,13 +54,23 @@
 struct x86_emulate_ops {
 	/*
 	 * read_std: Read bytes of standard (non-emulated/special) memory.
-	 *           Used for instruction fetch, stack operations, and others.
+	 *           Used for descriptor reading.
 	 *  @addr:  [IN ] Linear address from which to read.
 	 *  @val:   [OUT] Value read from memory, zero-extended to 'u_long'.
 	 *  @bytes: [IN ] Number of bytes to read from memory.
 	 */
 	int (*read_std)(unsigned long addr, void *val,
-			unsigned int bytes, struct kvm_vcpu *vcpu);
+			unsigned int bytes, struct kvm_vcpu *vcpu, u32 *error);
+
+	/*
+	 * fetch: Read bytes of standard (non-emulated/special) memory.
+	 *        Used for instruction fetch.
+	 *  @addr:  [IN ] Linear address from which to read.
+	 *  @val:   [OUT] Value read from memory, zero-extended to 'u_long'.
+	 *  @bytes: [IN ] Number of bytes to read from memory.
+	 */
+	int (*fetch)(unsigned long addr, void *val,
+			unsigned int bytes, struct kvm_vcpu *vcpu, u32 *error);
 
 	/*
 	 * read_emulated: Read bytes from emulated/special memory area.
@@ -129,7 +139,7 @@
 	u8 seg_override;
 	unsigned int d;
 	unsigned long regs[NR_VCPU_REGS];
-	unsigned long eip;
+	unsigned long eip, eip_orig;
 	/* modrm */
 	u8 modrm;
 	u8 modrm_mod;
@@ -168,6 +178,7 @@
 
 /* Execution mode, passed to the emulator. */
 #define X86EMUL_MODE_REAL     0	/* Real mode.             */
+#define X86EMUL_MODE_VM86     1	/* Virtual 8086 mode.     */
 #define X86EMUL_MODE_PROT16   2	/* 16-bit protected mode. */
 #define X86EMUL_MODE_PROT32   4	/* 32-bit protected mode. */
 #define X86EMUL_MODE_PROT64   8	/* 64-bit (long) mode.    */
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/hpet.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/hpet.h
@@ -66,6 +66,7 @@
 extern unsigned long hpet_address;
 extern unsigned long force_hpet_address;
 extern int hpet_force_user;
+extern u8 hpet_msi_disable;
 extern int is_hpet_enabled(void);
 extern int hpet_enable(void);
 extern void hpet_disable(void);
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/smpboot_hooks.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/smpboot_hooks.h
@@ -34,7 +34,7 @@
 	 */
 	CMOS_WRITE(0, 0xf);
 
-	*((volatile long *)phys_to_virt(apic->trampoline_phys_low)) = 0;
+	*((volatile u32 *)phys_to_virt(apic->trampoline_phys_low)) = 0;
 }
 
 static inline void __init smpboot_setup_io_apic(void)
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/thread_info.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/thread_info.h
@@ -86,7 +86,6 @@
 #define TIF_NOTSC		16	/* TSC is not accessible in userland */
 #define TIF_IA32		17	/* 32bit process */
 #define TIF_FORK		18	/* ret_from_fork */
-#define TIF_ABI_PENDING		19
 #define TIF_MEMDIE		20
 #define TIF_DEBUG		21	/* uses debug registers */
 #define TIF_IO_BITMAP		22	/* uses I/O bitmap */
@@ -110,7 +109,6 @@
 #define _TIF_NOTSC		(1 << TIF_NOTSC)
 #define _TIF_IA32		(1 << TIF_IA32)
 #define _TIF_FORK		(1 << TIF_FORK)
-#define _TIF_ABI_PENDING	(1 << TIF_ABI_PENDING)
 #define _TIF_DEBUG		(1 << TIF_DEBUG)
 #define _TIF_IO_BITMAP		(1 << TIF_IO_BITMAP)
 #define _TIF_FREEZE		(1 << TIF_FREEZE)
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/rwsem.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/rwsem.h
@@ -41,6 +41,7 @@
 #include <linux/list.h>
 #include <linux/spinlock.h>
 #include <linux/lockdep.h>
+#include <asm/asm.h>
 
 struct rwsem_waiter;
 
@@ -55,17 +56,28 @@
 
 /*
  * the semaphore definition
+ *
+ * The bias values and the counter type limits the number of
+ * potential readers/writers to 32767 for 32 bits and 2147483647
+ * for 64 bits.
  */
 
-#define RWSEM_UNLOCKED_VALUE		0x00000000
-#define RWSEM_ACTIVE_BIAS		0x00000001
-#define RWSEM_ACTIVE_MASK		0x0000ffff
-#define RWSEM_WAITING_BIAS		(-0x00010000)
+#ifdef CONFIG_X86_64
+# define RWSEM_ACTIVE_MASK		0xffffffffL
+#else
+# define RWSEM_ACTIVE_MASK		0x0000ffffL
+#endif
+
+#define RWSEM_UNLOCKED_VALUE		0x00000000L
+#define RWSEM_ACTIVE_BIAS		0x00000001L
+#define RWSEM_WAITING_BIAS		(-RWSEM_ACTIVE_MASK-1)
 #define RWSEM_ACTIVE_READ_BIAS		RWSEM_ACTIVE_BIAS
 #define RWSEM_ACTIVE_WRITE_BIAS		(RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
 
+typedef signed long rwsem_count_t;
+
 struct rw_semaphore {
-	signed long		count;
+	rwsem_count_t		count;
 	spinlock_t		wait_lock;
 	struct list_head	wait_list;
 #ifdef CONFIG_DEBUG_LOCK_ALLOC
@@ -105,7 +117,7 @@
 static inline void __down_read(struct rw_semaphore *sem)
 {
 	asm volatile("# beginning down_read\n\t"
-		     LOCK_PREFIX "  incl      (%%eax)\n\t"
+		     LOCK_PREFIX _ASM_INC "(%1)\n\t"
 		     /* adds 0x00000001, returns the old value */
 		     "  jns        1f\n"
 		     "  call call_rwsem_down_read_failed\n"
@@ -121,14 +133,14 @@
  */
 static inline int __down_read_trylock(struct rw_semaphore *sem)
 {
-	__s32 result, tmp;
+	rwsem_count_t result, tmp;
 	asm volatile("# beginning __down_read_trylock\n\t"
-		     "  movl      %0,%1\n\t"
+		     "  mov          %0,%1\n\t"
 		     "1:\n\t"
-		     "  movl	     %1,%2\n\t"
-		     "  addl      %3,%2\n\t"
+		     "  mov          %1,%2\n\t"
+		     "  add          %3,%2\n\t"
 		     "  jle	     2f\n\t"
-		     LOCK_PREFIX "  cmpxchgl  %2,%0\n\t"
+		     LOCK_PREFIX "  cmpxchg  %2,%0\n\t"
 		     "  jnz	     1b\n\t"
 		     "2:\n\t"
 		     "# ending __down_read_trylock\n\t"
@@ -143,13 +155,13 @@
  */
 static inline void __down_write_nested(struct rw_semaphore *sem, int subclass)
 {
-	int tmp;
+	rwsem_count_t tmp;
 
 	tmp = RWSEM_ACTIVE_WRITE_BIAS;
 	asm volatile("# beginning down_write\n\t"
-		     LOCK_PREFIX "  xadd      %%edx,(%%eax)\n\t"
+		     LOCK_PREFIX "  xadd      %1,(%2)\n\t"
 		     /* subtract 0x0000ffff, returns the old value */
-		     "  testl     %%edx,%%edx\n\t"
+		     "  test      %1,%1\n\t"
 		     /* was the count 0 before? */
 		     "  jz        1f\n"
 		     "  call call_rwsem_down_write_failed\n"
@@ -170,9 +182,9 @@
  */
 static inline int __down_write_trylock(struct rw_semaphore *sem)
 {
-	signed long ret = cmpxchg(&sem->count,
-				  RWSEM_UNLOCKED_VALUE,
-				  RWSEM_ACTIVE_WRITE_BIAS);
+	rwsem_count_t ret = cmpxchg(&sem->count,
+				    RWSEM_UNLOCKED_VALUE,
+				    RWSEM_ACTIVE_WRITE_BIAS);
 	if (ret == RWSEM_UNLOCKED_VALUE)
 		return 1;
 	return 0;
@@ -183,9 +195,9 @@
  */
 static inline void __up_read(struct rw_semaphore *sem)
 {
-	__s32 tmp = -RWSEM_ACTIVE_READ_BIAS;
+	rwsem_count_t tmp = -RWSEM_ACTIVE_READ_BIAS;
 	asm volatile("# beginning __up_read\n\t"
-		     LOCK_PREFIX "  xadd      %%edx,(%%eax)\n\t"
+		     LOCK_PREFIX "  xadd      %1,(%2)\n\t"
 		     /* subtracts 1, returns the old value */
 		     "  jns        1f\n\t"
 		     "  call call_rwsem_wake\n"
@@ -201,18 +213,18 @@
  */
 static inline void __up_write(struct rw_semaphore *sem)
 {
+	rwsem_count_t tmp;
 	asm volatile("# beginning __up_write\n\t"
-		     "  movl      %2,%%edx\n\t"
-		     LOCK_PREFIX "  xaddl     %%edx,(%%eax)\n\t"
+		     LOCK_PREFIX "  xadd      %1,(%2)\n\t"
 		     /* tries to transition
 			0xffff0001 -> 0x00000000 */
 		     "  jz       1f\n"
 		     "  call call_rwsem_wake\n"
 		     "1:\n\t"
 		     "# ending __up_write\n"
-		     : "+m" (sem->count)
-		     : "a" (sem), "i" (-RWSEM_ACTIVE_WRITE_BIAS)
-		     : "memory", "cc", "edx");
+		     : "+m" (sem->count), "=d" (tmp)
+		     : "a" (sem), "1" (-RWSEM_ACTIVE_WRITE_BIAS)
+		     : "memory", "cc");
 }
 
 /*
@@ -221,33 +233,38 @@
 static inline void __downgrade_write(struct rw_semaphore *sem)
 {
 	asm volatile("# beginning __downgrade_write\n\t"
-		     LOCK_PREFIX "  addl      %2,(%%eax)\n\t"
-		     /* transitions 0xZZZZ0001 -> 0xYYYY0001 */
+		     LOCK_PREFIX _ASM_ADD "%2,(%1)\n\t"
+		     /*
+		      * transitions 0xZZZZ0001 -> 0xYYYY0001 (i386)
+		      *     0xZZZZZZZZ00000001 -> 0xYYYYYYYY00000001 (x86_64)
+		      */
 		     "  jns       1f\n\t"
 		     "  call call_rwsem_downgrade_wake\n"
 		     "1:\n\t"
 		     "# ending __downgrade_write\n"
 		     : "+m" (sem->count)
-		     : "a" (sem), "i" (-RWSEM_WAITING_BIAS)
+		     : "a" (sem), "er" (-RWSEM_WAITING_BIAS)
 		     : "memory", "cc");
 }
 
 /*
  * implement atomic add functionality
  */
-static inline void rwsem_atomic_add(int delta, struct rw_semaphore *sem)
+static inline void rwsem_atomic_add(rwsem_count_t delta,
+				    struct rw_semaphore *sem)
 {
-	asm volatile(LOCK_PREFIX "addl %1,%0"
+	asm volatile(LOCK_PREFIX _ASM_ADD "%1,%0"
 		     : "+m" (sem->count)
-		     : "ir" (delta));
+		     : "er" (delta));
 }
 
 /*
  * implement exchange and add functionality
  */
-static inline int rwsem_atomic_update(int delta, struct rw_semaphore *sem)
+static inline rwsem_count_t rwsem_atomic_update(rwsem_count_t delta,
+						struct rw_semaphore *sem)
 {
-	int tmp = delta;
+	rwsem_count_t tmp = delta;
 
 	asm volatile(LOCK_PREFIX "xadd %0,%1"
 		     : "+r" (tmp), "+m" (sem->count)
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/msr.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/msr.h
@@ -27,6 +27,18 @@
 	};
 };
 
+struct msr_info {
+	u32 msr_no;
+	struct msr reg;
+	struct msr *msrs;
+	int err;
+};
+
+struct msr_regs_info {
+	u32 *regs;
+	int err;
+};
+
 static inline unsigned long long native_read_tscp(unsigned int *aux)
 {
 	unsigned long low, high;
@@ -244,11 +256,14 @@
 
 #define write_rdtscp_aux(val) wrmsr(0xc0000103, (val), 0)
 
+struct msr *msrs_alloc(void);
+void msrs_free(struct msr *msrs);
+
 #ifdef CONFIG_SMP
 int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
 int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
-void rdmsr_on_cpus(const cpumask_t *mask, u32 msr_no, struct msr *msrs);
-void wrmsr_on_cpus(const cpumask_t *mask, u32 msr_no, struct msr *msrs);
+void rdmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs);
+void wrmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs);
 int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
 int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
 int rdmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]);
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/sys_ia32.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/sys_ia32.h
@@ -62,9 +62,6 @@
 asmlinkage long sys32_personality(unsigned long);
 asmlinkage long sys32_sendfile(int, int, compat_off_t __user *, s32);
 
-asmlinkage long sys32_mmap2(unsigned long, unsigned long, unsigned long,
-			    unsigned long, unsigned long, unsigned long);
-
 struct oldold_utsname;
 struct old_utsname;
 asmlinkage long sys32_olduname(struct oldold_utsname __user *);
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/uaccess.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/uaccess.h
@@ -42,7 +42,7 @@
  * Returns 0 if the range is valid, nonzero otherwise.
  *
  * This is equivalent to the following test:
- * (u33)addr + (u33)size >= (u33)current->addr_limit.seg (u65 for x86_64)
+ * (u33)addr + (u33)size > (u33)current->addr_limit.seg (u65 for x86_64)
  *
  * This needs 33-bit (65-bit for x86_64) arithmetic. We have a carry...
  */
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/smp.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/smp.h
@@ -50,7 +50,7 @@
 	void (*smp_prepare_cpus)(unsigned max_cpus);
 	void (*smp_cpus_done)(unsigned max_cpus);
 
-	void (*smp_send_stop)(void);
+	void (*stop_other_cpus)(int wait);
 	void (*smp_send_reschedule)(int cpu);
 
 	int (*cpu_up)(unsigned cpu);
@@ -73,7 +73,12 @@
 
 static inline void smp_send_stop(void)
 {
-	smp_ops.smp_send_stop();
+	smp_ops.stop_other_cpus(0);
+}
+
+static inline void stop_other_cpus(void)
+{
+	smp_ops.stop_other_cpus(1);
 }
 
 static inline void smp_prepare_boot_cpu(void)
@@ -135,6 +140,8 @@
 void native_cpu_die(unsigned int cpu);
 void native_play_dead(void);
 void play_dead_common(void);
+void wbinvd_on_cpu(int cpu);
+int wbinvd_on_all_cpus(void);
 
 void native_send_call_func_ipi(const struct cpumask *mask);
 void native_send_call_func_single_ipi(int cpu);
@@ -147,6 +154,13 @@
 {
 	return cpumask_weight(cpu_callout_mask);
 }
+#else /* !CONFIG_SMP */
+#define wbinvd_on_cpu(cpu)     wbinvd()
+static inline int wbinvd_on_all_cpus(void)
+{
+	wbinvd();
+	return 0;
+}
 #endif /* CONFIG_SMP */
 
 extern unsigned disabled_cpus __cpuinitdata;
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/processor.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/processor.h
@@ -180,7 +180,7 @@
 				unsigned int *ecx, unsigned int *edx)
 {
 	/* ecx is often an input as well as an output. */
-	asm("cpuid"
+	asm volatile("cpuid"
 	    : "=a" (*eax),
 	      "=b" (*ebx),
 	      "=c" (*ecx),
@@ -765,29 +765,6 @@
 extern unsigned long		idle_halt;
 extern unsigned long		idle_nomwait;
 
-/*
- * on systems with caches, caches must be flashed as the absolute
- * last instruction before going into a suspended halt.  Otherwise,
- * dirty data can linger in the cache and become stale on resume,
- * leading to strange errors.
- *
- * perform a variety of operations to guarantee that the compiler
- * will not reorder instructions.  wbinvd itself is serializing
- * so the processor will not reorder.
- *
- * Systems without cache can just go into halt.
- */
-static inline void wbinvd_halt(void)
-{
-	mb();
-	/* check for clflush to determine if wbinvd is legal */
-	if (cpu_has_clflush)
-		asm volatile("cli; wbinvd; 1: hlt; jmp 1b" : : : "memory");
-	else
-		while (1)
-			halt();
-}
-
 extern void enable_sep_cpu(void);
 extern int sysenter_setup(void);
 
@@ -1052,4 +1029,23 @@
 	return ratio;
 }
 
+/*
+ * AMD errata checking
+ */
+#ifdef CONFIG_CPU_SUP_AMD
+extern const int amd_erratum_400[];
+extern bool cpu_has_amd_erratum(const int *);
+
+#define AMD_LEGACY_ERRATUM(...)		{ -1, __VA_ARGS__, 0 }
+#define AMD_OSVW_ERRATUM(osvw_id, ...)	{ osvw_id, __VA_ARGS__, 0 }
+#define AMD_MODEL_RANGE(f, m_start, s_start, m_end, s_end) \
+	((f << 24) | (m_start << 16) | (s_start << 12) | (m_end << 4) | (s_end))
+#define AMD_MODEL_RANGE_FAMILY(range)	(((range) >> 24) & 0xff)
+#define AMD_MODEL_RANGE_START(range)	(((range) >> 12) & 0xfff)
+#define AMD_MODEL_RANGE_END(range)	((range) & 0xfff)
+
+#else
+#define cpu_has_amd_erratum(x)	(false)
+#endif /* CONFIG_CPU_SUP_AMD */
+
 #endif /* _ASM_X86_PROCESSOR_H */
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/k8.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/k8.h
@@ -13,11 +13,16 @@
 extern int k8_scan_nodes(unsigned long start, unsigned long end);
 
 #ifdef CONFIG_K8_NB
+extern int num_k8_northbridges;
+
 static inline struct pci_dev *node_to_k8_nb_misc(int node)
 {
 	return (node < num_k8_northbridges) ? k8_northbridges[node] : NULL;
 }
+
 #else
+#define num_k8_northbridges 0
+
 static inline struct pci_dev *node_to_k8_nb_misc(int node)
 {
 	return NULL;
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/amd_iommu.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/amd_iommu.h
@@ -32,6 +32,7 @@
 extern void amd_iommu_flush_all_devices(void);
 extern void amd_iommu_shutdown(void);
 extern void amd_iommu_apply_erratum_63(u16 devid);
+extern void amd_iommu_init_api(void);
 #else
 static inline int amd_iommu_init(void) { return -ENODEV; }
 static inline void amd_iommu_detect(void) { }
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/system.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/system.h
@@ -449,7 +449,7 @@
  *
  * (Could use an alternative three way for this if there was one.)
  */
-static inline void rdtsc_barrier(void)
+static __always_inline void rdtsc_barrier(void)
 {
 	alternative(ASM_NOP3, "mfence", X86_FEATURE_MFENCE_RDTSC);
 	alternative(ASM_NOP3, "lfence", X86_FEATURE_LFENCE_RDTSC);
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/tsc.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/tsc.h
@@ -59,5 +59,7 @@
 extern void check_tsc_sync_target(void);
 
 extern int notsc_setup(char *);
+extern void save_sched_clock_state(void);
+extern void restore_sched_clock_state(void);
 
 #endif /* _ASM_X86_TSC_H */
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/paravirt.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/paravirt.h
@@ -289,6 +289,12 @@
 {
 	PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
 }
+#ifdef CONFIG_X86_32
+static inline void load_user_cs_desc(unsigned int cpu, struct mm_struct *mm)
+{
+	PVOP_VCALL2(pv_cpu_ops.load_user_cs_desc, cpu, mm);
+}
+#endif /*CONFIG_X86_32*/
 static inline void store_gdt(struct desc_ptr *dtr)
 {
 	PVOP_VCALL1(pv_cpu_ops.store_gdt, dtr);
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/mce.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/mce.h
@@ -67,6 +67,8 @@
 	__u32 socketid;	/* CPU socket ID */
 	__u32 apicid;	/* CPU initial apic ID */
 	__u64 mcgcap;	/* MCGCAP MSR: machine check capabilities of CPU */
+	__u64 aux0;	/* model specific */
+	__u64 aux1;	/* model specific */
 };
 
 /*
@@ -214,5 +216,11 @@
 
 void mce_log_therm_throt_event(__u64 status);
 
+#ifdef CONFIG_X86_THERMAL_VECTOR
+extern void mcheck_intel_therm_init(void);
+#else
+static inline void mcheck_intel_therm_init(void) { }
+#endif
+
 #endif /* __KERNEL__ */
 #endif /* _ASM_X86_MCE_H */
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/kvm_host.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/kvm_host.h
@@ -193,6 +193,7 @@
 		unsigned invalid:1;
 		unsigned cr4_pge:1;
 		unsigned nxe:1;
+		unsigned cr0_wp:1;
 	};
 };
 
@@ -256,7 +257,8 @@
 	void (*new_cr3)(struct kvm_vcpu *vcpu);
 	int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err);
 	void (*free)(struct kvm_vcpu *vcpu);
-	gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva);
+	gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access,
+			    u32 *error);
 	void (*prefetch_page)(struct kvm_vcpu *vcpu,
 			      struct kvm_mmu_page *page);
 	int (*sync_page)(struct kvm_vcpu *vcpu,
@@ -355,6 +357,9 @@
 	struct page *time_page;
 
 	bool singlestep; /* guest is single stepped by KVM */
+	u64 last_guest_tsc;
+	u64 last_kernel_ns;
+
 	bool nmi_pending;
 	bool nmi_injected;
 
@@ -412,6 +417,7 @@
 	unsigned long irq_sources_bitmap;
 	unsigned long irq_states[KVM_IOAPIC_NUM_PINS];
 	u64 vm_init_tsc;
+	s64 kvmclock_offset;
 };
 
 struct kvm_vm_stat {
@@ -600,8 +606,7 @@
 		    unsigned long value);
 
 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
-int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
-				int type_bits, int seg);
+int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
 
 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason);
 
@@ -644,6 +649,10 @@
 int kvm_mmu_load(struct kvm_vcpu *vcpu);
 void kvm_mmu_unload(struct kvm_vcpu *vcpu);
 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
+gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error);
+gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error);
+gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error);
+gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error);
 
 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
 
@@ -657,6 +666,7 @@
 
 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
 int complete_pio(struct kvm_vcpu *vcpu);
+bool kvm_check_iopl(struct kvm_vcpu *vcpu);
 
 struct kvm_memory_slot *gfn_to_memslot_unaliased(struct kvm *kvm, gfn_t gfn);
 
@@ -667,20 +677,6 @@
 	return (struct kvm_mmu_page *)page_private(page);
 }
 
-static inline u16 kvm_read_fs(void)
-{
-	u16 seg;
-	asm("mov %%fs, %0" : "=g"(seg));
-	return seg;
-}
-
-static inline u16 kvm_read_gs(void)
-{
-	u16 seg;
-	asm("mov %%gs, %0" : "=g"(seg));
-	return seg;
-}
-
 static inline u16 kvm_read_ldt(void)
 {
 	u16 ldt;
@@ -688,16 +684,6 @@
 	return ldt;
 }
 
-static inline void kvm_load_fs(u16 sel)
-{
-	asm("mov %0, %%fs" : : "rm"(sel));
-}
-
-static inline void kvm_load_gs(u16 sel)
-{
-	asm("mov %0, %%gs" : : "rm"(sel));
-}
-
 static inline void kvm_load_ldt(u16 sel)
 {
 	asm("lldt %0" : : "rm"(sel));
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/compat.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/compat.h
@@ -204,7 +204,7 @@
 	return (u32)(unsigned long)uptr;
 }
 
-static inline void __user *compat_alloc_user_space(long len)
+static inline void __user *arch_compat_alloc_user_space(long len)
 {
 	struct pt_regs *regs = task_pt_regs(current);
 	return (void __user *)regs->sp - len;
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/fixmap.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/fixmap.h
@@ -82,6 +82,9 @@
 #endif
 	FIX_DBGP_BASE,
 	FIX_EARLYCON_MEM_BASE,
+#ifdef CONFIG_PROVIDE_OHCI1394_DMA_INIT
+	FIX_OHCI1394_BASE,
+#endif
 #ifdef CONFIG_X86_LOCAL_APIC
 	FIX_APIC_BASE,	/* local (CPU) APIC) -- required for SMP or not */
 #endif
@@ -126,9 +129,6 @@
 	FIX_BTMAP_END = __end_of_permanent_fixed_addresses + 256 -
 			(__end_of_permanent_fixed_addresses & 255),
 	FIX_BTMAP_BEGIN = FIX_BTMAP_END + NR_FIX_BTMAPS*FIX_BTMAPS_SLOTS - 1,
-#ifdef CONFIG_PROVIDE_OHCI1394_DMA_INIT
-	FIX_OHCI1394_BASE,
-#endif
 #ifdef CONFIG_X86_32
 	FIX_WP_TEST,
 #endif
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/suspend_64.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/suspend_64.h
@@ -27,6 +27,8 @@
 	u16 ds, es, fs, gs, ss;
 	unsigned long gs_base, gs_kernel_base, fs_base;
 	unsigned long cr0, cr2, cr3, cr4, cr8;
+	u64 misc_enable;
+	bool misc_enable_saved;
 	unsigned long efer;
 	u16 gdt_pad;
 	u16 gdt_limit;
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/irq_vectors.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/irq_vectors.h
@@ -113,7 +113,7 @@
  */
 #define LOCAL_PENDING_VECTOR		0xec
 
-#define UV_BAU_MESSAGE			0xec
+#define UV_BAU_MESSAGE			0xea
 
 /*
  * Self IPI vector for machine checks
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/vmx.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/vmx.h
@@ -56,6 +56,7 @@
 #define SECONDARY_EXEC_ENABLE_VPID              0x00000020
 #define SECONDARY_EXEC_WBINVD_EXITING		0x00000040
 #define SECONDARY_EXEC_UNRESTRICTED_GUEST	0x00000080
+#define SECONDARY_EXEC_PAUSE_LOOP_EXITING	0x00000400
 
 
 #define PIN_BASED_EXT_INTR_MASK                 0x00000001
@@ -144,6 +145,8 @@
 	VM_ENTRY_INSTRUCTION_LEN        = 0x0000401a,
 	TPR_THRESHOLD                   = 0x0000401c,
 	SECONDARY_VM_EXEC_CONTROL       = 0x0000401e,
+	PLE_GAP                         = 0x00004020,
+	PLE_WINDOW                      = 0x00004022,
 	VM_INSTRUCTION_ERROR            = 0x00004400,
 	VM_EXIT_REASON                  = 0x00004402,
 	VM_EXIT_INTR_INFO               = 0x00004404,
@@ -248,6 +251,7 @@
 #define EXIT_REASON_MSR_READ            31
 #define EXIT_REASON_MSR_WRITE           32
 #define EXIT_REASON_MWAIT_INSTRUCTION   36
+#define EXIT_REASON_PAUSE_INSTRUCTION   40
 #define EXIT_REASON_MCE_DURING_VMENTRY	 41
 #define EXIT_REASON_TPR_BELOW_THRESHOLD 43
 #define EXIT_REASON_APIC_ACCESS         44
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/amd_iommu_types.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/amd_iommu_types.h
@@ -305,6 +305,9 @@
 	/* capabilities of that IOMMU read from ACPI */
 	u32 cap;
 
+	/* flags read from acpi table */
+	u8 acpi_flags;
+
 	/*
 	 * Capability pointer. There could be more than one IOMMU per PCI
 	 * device function if there are more than one AMD IOMMU capability
@@ -348,6 +351,15 @@
 
 	/* default dma_ops domain for that IOMMU */
 	struct dma_ops_domain *default_dom;
+
+	/*
+	 * This array is required to work around a potential BIOS bug.
+	 * The BIOS may miss to restore parts of the PCI configuration
+	 * space when the system resumes from S3. The result is that the
+	 * IOMMU does not execute commands anymore which leads to system
+	 * failure.
+	 */
+	u32 cache_cfg[4];
 };
 
 /*
@@ -469,4 +481,10 @@
 /* some function prototypes */
 extern void amd_iommu_reset_cmd_buffer(struct amd_iommu *iommu);
 
+static inline bool is_rd890_iommu(struct pci_dev *pdev)
+{
+	return (pdev->vendor == PCI_VENDOR_ID_ATI) &&
+	       (pdev->device == PCI_DEVICE_ID_RD890_IOMMU);
+}
+
 #endif /* _ASM_X86_AMD_IOMMU_TYPES_H */
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/msr-index.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/msr-index.h
@@ -81,11 +81,15 @@
 #define MSR_IA32_MC0_ADDR		0x00000402
 #define MSR_IA32_MC0_MISC		0x00000403
 
+#define MSR_AMD64_MC0_MASK		0xc0010044
+
 #define MSR_IA32_MCx_CTL(x)		(MSR_IA32_MC0_CTL + 4*(x))
 #define MSR_IA32_MCx_STATUS(x)		(MSR_IA32_MC0_STATUS + 4*(x))
 #define MSR_IA32_MCx_ADDR(x)		(MSR_IA32_MC0_ADDR + 4*(x))
 #define MSR_IA32_MCx_MISC(x)		(MSR_IA32_MC0_MISC + 4*(x))
 
+#define MSR_AMD64_MCx_MASK(x)		(MSR_AMD64_MC0_MASK + (x))
+
 /* These are consecutive and not in the normal 4er MCE bank block */
 #define MSR_IA32_MC0_CTL2		0x00000280
 #define MSR_IA32_MCx_CTL2(x)		(MSR_IA32_MC0_CTL2 + (x))
@@ -104,6 +108,9 @@
 #define MSR_AMD64_PATCH_LEVEL		0x0000008b
 #define MSR_AMD64_NB_CFG		0xc001001f
 #define MSR_AMD64_PATCH_LOADER		0xc0010020
+#define MSR_AMD64_OSVW_ID_LENGTH	0xc0010140
+#define MSR_AMD64_OSVW_STATUS		0xc0010141
+#define MSR_AMD64_DC_CFG		0xc0011022
 #define MSR_AMD64_IBSFETCHCTL		0xc0011030
 #define MSR_AMD64_IBSFETCHLINAD		0xc0011031
 #define MSR_AMD64_IBSFETCHPHYSAD	0xc0011032
@@ -123,6 +130,7 @@
 #define FAM10H_MMIO_CONF_BUSRANGE_SHIFT 2
 #define FAM10H_MMIO_CONF_BASE_MASK	0xfffffff
 #define FAM10H_MMIO_CONF_BASE_SHIFT	20
+#define MSR_FAM10H_NODE_ID		0xc001100c
 
 /* K8 MSRs */
 #define MSR_K8_TOP_MEM1			0xc001001a
@@ -195,8 +203,9 @@
 #define MSR_IA32_EBL_CR_POWERON		0x0000002a
 #define MSR_IA32_FEATURE_CONTROL        0x0000003a
 
-#define FEATURE_CONTROL_LOCKED		(1<<0)
-#define FEATURE_CONTROL_VMXON_ENABLED	(1<<2)
+#define FEATURE_CONTROL_LOCKED				(1<<0)
+#define FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX	(1<<1)
+#define FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX	(1<<2)
 
 #define MSR_IA32_APICBASE		0x0000001b
 #define MSR_IA32_APICBASE_BSP		(1<<8)
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/cpufeature.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/cpufeature.h
@@ -150,9 +150,10 @@
 #define X86_FEATURE_3DNOWPREFETCH (6*32+ 8) /* 3DNow prefetch instructions */
 #define X86_FEATURE_OSVW	(6*32+ 9) /* OS Visible Workaround */
 #define X86_FEATURE_IBS		(6*32+10) /* Instruction Based Sampling */
-#define X86_FEATURE_SSE5	(6*32+11) /* SSE-5 */
+#define X86_FEATURE_XOP		(6*32+11) /* extended AVX instructions */
 #define X86_FEATURE_SKINIT	(6*32+12) /* SKINIT/STGI instructions */
 #define X86_FEATURE_WDT		(6*32+13) /* Watchdog timer */
+#define X86_FEATURE_NODEID_MSR	(6*32+19) /* NodeId MSR */
 
 /*
  * Auxiliary flags: Linux defined - For features scattered in various
@@ -248,6 +249,7 @@
 #define cpu_has_x2apic		boot_cpu_has(X86_FEATURE_X2APIC)
 #define cpu_has_xsave		boot_cpu_has(X86_FEATURE_XSAVE)
 #define cpu_has_hypervisor	boot_cpu_has(X86_FEATURE_HYPERVISOR)
+#define cpu_has_pclmulqdq	boot_cpu_has(X86_FEATURE_PCLMULQDQ)
 
 #if defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_64)
 # define cpu_has_invlpg		1
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/pvclock.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/pvclock.h
@@ -10,5 +10,44 @@
 void pvclock_read_wallclock(struct pvclock_wall_clock *wall,
 			    struct pvclock_vcpu_time_info *vcpu,
 			    struct timespec *ts);
+void pvclock_resume(void);
+
+/*
+ * Scale a 64-bit delta by scaling and multiplying by a 32-bit fraction,
+ * yielding a 64-bit result.
+ */
+static inline u64 pvclock_scale_delta(u64 delta, u32 mul_frac, int shift)
+{
+	u64 product;
+#ifdef __i386__
+	u32 tmp1, tmp2;
+#endif
+
+	if (shift < 0)
+		delta >>= -shift;
+	else
+		delta <<= shift;
+
+#ifdef __i386__
+	__asm__ (
+		"mul  %5       ; "
+		"mov  %4,%%eax ; "
+		"mov  %%edx,%4 ; "
+		"mul  %5       ; "
+		"xor  %5,%5    ; "
+		"add  %4,%%eax ; "
+		"adc  %5,%%edx ; "
+		: "=A" (product), "=r" (tmp1), "=r" (tmp2)
+		: "a" ((u32)delta), "1" ((u32)(delta >> 32)), "2" (mul_frac) );
+#elif defined(__x86_64__)
+	__asm__ (
+		"mul %%rdx ; shrd $32,%%rdx,%%rax"
+		: "=a" (product) : "0" (delta), "d" ((u64)mul_frac) );
+#else
+#error implement me!
+#endif
+
+	return product;
+}
 
 #endif /* _ASM_X86_PVCLOCK_H */
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/acpi.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/acpi.h
@@ -89,6 +89,7 @@
 extern int acpi_pci_disabled;
 extern int acpi_skip_timer_override;
 extern int acpi_use_timer_override;
+extern int acpi_fix_pin2_polarity;
 
 extern u8 acpi_sci_flags;
 extern int acpi_sci_override_gsi;
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/dma-mapping.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/dma-mapping.h
@@ -151,8 +151,6 @@
 {
 	struct dma_map_ops *ops = get_dma_ops(dev);
 
-	WARN_ON(irqs_disabled());       /* for portability */
-
 	if (dma_release_from_coherent(dev, get_order(size), vaddr))
 		return;
 
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/io.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/io.h
@@ -172,6 +172,7 @@
 
 extern void iounmap(volatile void __iomem *addr);
 
+extern void set_iounmap_nonlazy(void);
 
 #ifdef CONFIG_X86_32
 # include "io_32.h"
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/apicdef.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/apicdef.h
@@ -72,6 +72,7 @@
 #define		APIC_DEST_LOGICAL	0x00800
 #define		APIC_DEST_PHYSICAL	0x00000
 #define		APIC_DM_FIXED		0x00000
+#define		APIC_DM_FIXED_MASK	0x00700
 #define		APIC_DM_LOWEST		0x00100
 #define		APIC_DM_SMI		0x00200
 #define		APIC_DM_REMRD		0x00300
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/trampoline.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/trampoline.h
@@ -13,15 +13,18 @@
 
 extern unsigned long init_rsp;
 extern unsigned long initial_code;
+extern unsigned long initial_page_table;
 extern unsigned long initial_gs;
 
 #define TRAMPOLINE_SIZE roundup(trampoline_end - trampoline_data, PAGE_SIZE)
 #define TRAMPOLINE_BASE 0x6000
 
 extern unsigned long setup_trampoline(void);
+extern void __init setup_trampoline_page_table(void);
 extern void __init reserve_trampoline_memory(void);
 #else
-static inline void reserve_trampoline_memory(void) {};
+static inline void setup_trampoline_page_table(void) {}
+static inline void reserve_trampoline_memory(void) {}
 #endif /* CONFIG_X86_TRAMPOLINE */
 
 #endif /* __ASSEMBLY__ */
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/io_apic.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/io_apic.h
@@ -160,6 +160,7 @@
 struct io_apic_irq_attr;
 extern int io_apic_set_pci_routing(struct device *dev, int irq,
 		 struct io_apic_irq_attr *irq_attr);
+void setup_IO_APIC_irq_extra(u32 gsi);
 extern int (*ioapic_renumber_irq)(int ioapic, int irq);
 extern void ioapic_init_mappings(void);
 extern void ioapic_insert_resources(void);
--- linux-mvl-dove-2.6.32.orig/arch/x86/include/asm/uv/uv_hub.h
+++ linux-mvl-dove-2.6.32/arch/x86/include/asm/uv/uv_hub.h
@@ -31,20 +31,20 @@
  *		  contiguous (although various IO spaces may punch holes in
  *		  it)..
  *
- * 	N	- Number of bits in the node portion of a socket physical
- * 		  address.
+ *	N	- Number of bits in the node portion of a socket physical
+ *		  address.
  *
- * 	NASID   - network ID of a router, Mbrick or Cbrick. Nasid values of
- * 	 	  routers always have low bit of 1, C/MBricks have low bit
- * 		  equal to 0. Most addressing macros that target UV hub chips
- * 		  right shift the NASID by 1 to exclude the always-zero bit.
- * 		  NASIDs contain up to 15 bits.
+ *	NASID   - network ID of a router, Mbrick or Cbrick. Nasid values of
+ *		  routers always have low bit of 1, C/MBricks have low bit
+ *		  equal to 0. Most addressing macros that target UV hub chips
+ *		  right shift the NASID by 1 to exclude the always-zero bit.
+ *		  NASIDs contain up to 15 bits.
  *
  *	GNODE   - NASID right shifted by 1 bit. Most mmrs contain gnodes instead
  *		  of nasids.
  *
- * 	PNODE   - the low N bits of the GNODE. The PNODE is the most useful variant
- * 		  of the nasid for socket usage.
+ *	PNODE   - the low N bits of the GNODE. The PNODE is the most useful variant
+ *		  of the nasid for socket usage.
  *
  *
  *  NumaLink Global Physical Address Format:
@@ -71,12 +71,12 @@
  *
  *
  * APICID format
- * 	NOTE!!!!!! This is the current format of the APICID. However, code
- * 	should assume that this will change in the future. Use functions
- * 	in this file for all APICID bit manipulations and conversion.
+ *	NOTE!!!!!! This is the current format of the APICID. However, code
+ *	should assume that this will change in the future. Use functions
+ *	in this file for all APICID bit manipulations and conversion.
  *
- * 		1111110000000000
- * 		5432109876543210
+ *		1111110000000000
+ *		5432109876543210
  *		pppppppppplc0cch
  *		sssssssssss
  *
@@ -89,9 +89,9 @@
  *	Note: Processor only supports 12 bits in the APICID register. The ACPI
  *	      tables hold all 16 bits. Software needs to be aware of this.
  *
- * 	      Unless otherwise specified, all references to APICID refer to
- * 	      the FULL value contained in ACPI tables, not the subset in the
- * 	      processor APICID register.
+ *	      Unless otherwise specified, all references to APICID refer to
+ *	      the FULL value contained in ACPI tables, not the subset in the
+ *	      processor APICID register.
  */
 
 
@@ -151,16 +151,16 @@
 };
 
 DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info);
-#define uv_hub_info 		(&__get_cpu_var(__uv_hub_info))
+#define uv_hub_info		(&__get_cpu_var(__uv_hub_info))
 #define uv_cpu_hub_info(cpu)	(&per_cpu(__uv_hub_info, cpu))
 
 /*
  * Local & Global MMR space macros.
- * 	Note: macros are intended to be used ONLY by inline functions
- * 	in this file - not by other kernel code.
- * 		n -  NASID (full 15-bit global nasid)
- * 		g -  GNODE (full 15-bit global nasid, right shifted 1)
- * 		p -  PNODE (local part of nsids, right shifted 1)
+ *	Note: macros are intended to be used ONLY by inline functions
+ *	in this file - not by other kernel code.
+ *		n -  NASID (full 15-bit global nasid)
+ *		g -  GNODE (full 15-bit global nasid, right shifted 1)
+ *		p -  PNODE (local part of nsids, right shifted 1)
  */
 #define UV_NASID_TO_PNODE(n)		(((n) >> 1) & uv_hub_info->pnode_mask)
 #define UV_PNODE_TO_GNODE(p)		((p) |uv_hub_info->gnode_extra)
@@ -213,8 +213,8 @@
 /*
  * Macros for converting between kernel virtual addresses, socket local physical
  * addresses, and UV global physical addresses.
- * 	Note: use the standard __pa() & __va() macros for converting
- * 	      between socket virtual and socket physical addresses.
+ *	Note: use the standard __pa() & __va() macros for converting
+ *	      between socket virtual and socket physical addresses.
  */
 
 /* socket phys RAM --> UV global physical address */
@@ -265,21 +265,18 @@
  * Access global MMRs using the low memory MMR32 space. This region supports
  * faster MMR access but not all MMRs are accessible in this space.
  */
-static inline unsigned long *uv_global_mmr32_address(int pnode,
-				unsigned long offset)
+static inline unsigned long *uv_global_mmr32_address(int pnode, unsigned long offset)
 {
 	return __va(UV_GLOBAL_MMR32_BASE |
 		       UV_GLOBAL_MMR32_PNODE_BITS(pnode) | offset);
 }
 
-static inline void uv_write_global_mmr32(int pnode, unsigned long offset,
-				 unsigned long val)
+static inline void uv_write_global_mmr32(int pnode, unsigned long offset, unsigned long val)
 {
 	writeq(val, uv_global_mmr32_address(pnode, offset));
 }
 
-static inline unsigned long uv_read_global_mmr32(int pnode,
-						 unsigned long offset)
+static inline unsigned long uv_read_global_mmr32(int pnode, unsigned long offset)
 {
 	return readq(uv_global_mmr32_address(pnode, offset));
 }
@@ -288,25 +285,32 @@
  * Access Global MMR space using the MMR space located at the top of physical
  * memory.
  */
-static inline unsigned long *uv_global_mmr64_address(int pnode,
-				unsigned long offset)
+static inline unsigned long *uv_global_mmr64_address(int pnode, unsigned long offset)
 {
 	return __va(UV_GLOBAL_MMR64_BASE |
 		    UV_GLOBAL_MMR64_PNODE_BITS(pnode) | offset);
 }
 
-static inline void uv_write_global_mmr64(int pnode, unsigned long offset,
-				unsigned long val)
+static inline void uv_write_global_mmr64(int pnode, unsigned long offset, unsigned long val)
 {
 	writeq(val, uv_global_mmr64_address(pnode, offset));
 }
 
-static inline unsigned long uv_read_global_mmr64(int pnode,
-						 unsigned long offset)
+static inline unsigned long uv_read_global_mmr64(int pnode, unsigned long offset)
 {
 	return readq(uv_global_mmr64_address(pnode, offset));
 }
 
+static inline void uv_write_global_mmr8(int pnode, unsigned long offset, unsigned char val)
+{
+	writeb(val, uv_global_mmr64_address(pnode, offset));
+}
+
+static inline unsigned char uv_read_global_mmr8(int pnode, unsigned long offset)
+{
+	return readb(uv_global_mmr64_address(pnode, offset));
+}
+
 /*
  * Access hub local MMRs. Faster than using global space but only local MMRs
  * are accessible.
@@ -426,11 +430,17 @@
 	}
 }
 
+static inline unsigned long uv_scir_offset(int apicid)
+{
+	return SCIR_LOCAL_MMR_BASE | (apicid & 0x3f);
+}
+
 static inline void uv_set_cpu_scir_bits(int cpu, unsigned char value)
 {
 	if (uv_cpu_hub_info(cpu)->scir.state != value) {
+		uv_write_global_mmr8(uv_cpu_to_pnode(cpu),
+				uv_cpu_hub_info(cpu)->scir.offset, value);
 		uv_cpu_hub_info(cpu)->scir.state = value;
-		uv_write_local_mmr8(uv_cpu_hub_info(cpu)->scir.offset, value);
 	}
 }
 
--- linux-mvl-dove-2.6.32.orig/arch/x86/crypto/Makefile
+++ linux-mvl-dove-2.6.32/arch/x86/crypto/Makefile
@@ -12,6 +12,7 @@
 obj-$(CONFIG_CRYPTO_TWOFISH_X86_64) += twofish-x86_64.o
 obj-$(CONFIG_CRYPTO_SALSA20_X86_64) += salsa20-x86_64.o
 obj-$(CONFIG_CRYPTO_AES_NI_INTEL) += aesni-intel.o
+obj-$(CONFIG_CRYPTO_GHASH_CLMUL_NI_INTEL) += ghash-clmulni-intel.o
 
 obj-$(CONFIG_CRYPTO_CRC32C_INTEL) += crc32c-intel.o
 
@@ -24,3 +25,5 @@
 salsa20-x86_64-y := salsa20-x86_64-asm_64.o salsa20_glue.o
 
 aesni-intel-y := aesni-intel_asm.o aesni-intel_glue.o
+
+ghash-clmulni-intel-y := ghash-clmulni-intel_asm.o ghash-clmulni-intel_glue.o
--- linux-mvl-dove-2.6.32.orig/arch/x86/crypto/ghash-clmulni-intel_asm.S
+++ linux-mvl-dove-2.6.32/arch/x86/crypto/ghash-clmulni-intel_asm.S
@@ -0,0 +1,157 @@
+/*
+ * Accelerated GHASH implementation with Intel PCLMULQDQ-NI
+ * instructions. This file contains accelerated part of ghash
+ * implementation. More information about PCLMULQDQ can be found at:
+ *
+ * http://software.intel.com/en-us/articles/carry-less-multiplication-and-its-usage-for-computing-the-gcm-mode/
+ *
+ * Copyright (c) 2009 Intel Corp.
+ *   Author: Huang Ying <ying.huang@intel.com>
+ *	     Vinodh Gopal
+ *	     Erdinc Ozturk
+ *	     Deniz Karakoyunlu
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <linux/linkage.h>
+
+.align 16
+.Lbswap_mask:
+	.octa 0x000102030405060708090a0b0c0d0e0f
+.Lpoly:
+	.octa 0xc2000000000000000000000000000001
+.Ltwo_one:
+	.octa 0x00000001000000000000000000000001
+
+#define DATA	%xmm0
+#define SHASH	%xmm1
+#define T1	%xmm2
+#define T2	%xmm3
+#define T3	%xmm4
+#define BSWAP	%xmm5
+#define IN1	%xmm6
+
+.text
+
+/*
+ * __clmul_gf128mul_ble:	internal ABI
+ * input:
+ *	DATA:			operand1
+ *	SHASH:			operand2, hash_key << 1 mod poly
+ * output:
+ *	DATA:			operand1 * operand2 mod poly
+ * changed:
+ *	T1
+ *	T2
+ *	T3
+ */
+__clmul_gf128mul_ble:
+	movaps DATA, T1
+	pshufd $0b01001110, DATA, T2
+	pshufd $0b01001110, SHASH, T3
+	pxor DATA, T2
+	pxor SHASH, T3
+
+	# pclmulqdq $0x00, SHASH, DATA	# DATA = a0 * b0
+	.byte 0x66, 0x0f, 0x3a, 0x44, 0xc1, 0x00
+	# pclmulqdq $0x11, SHASH, T1	# T1 = a1 * b1
+	.byte 0x66, 0x0f, 0x3a, 0x44, 0xd1, 0x11
+	# pclmulqdq $0x00, T3, T2	# T2 = (a1 + a0) * (b1 + b0)
+	.byte 0x66, 0x0f, 0x3a, 0x44, 0xdc, 0x00
+	pxor DATA, T2
+	pxor T1, T2			# T2 = a0 * b1 + a1 * b0
+
+	movaps T2, T3
+	pslldq $8, T3
+	psrldq $8, T2
+	pxor T3, DATA
+	pxor T2, T1			# <T1:DATA> is result of
+					# carry-less multiplication
+
+	# first phase of the reduction
+	movaps DATA, T3
+	psllq $1, T3
+	pxor DATA, T3
+	psllq $5, T3
+	pxor DATA, T3
+	psllq $57, T3
+	movaps T3, T2
+	pslldq $8, T2
+	psrldq $8, T3
+	pxor T2, DATA
+	pxor T3, T1
+
+	# second phase of the reduction
+	movaps DATA, T2
+	psrlq $5, T2
+	pxor DATA, T2
+	psrlq $1, T2
+	pxor DATA, T2
+	psrlq $1, T2
+	pxor T2, T1
+	pxor T1, DATA
+	ret
+
+/* void clmul_ghash_mul(char *dst, const be128 *shash) */
+ENTRY(clmul_ghash_mul)
+	movups (%rdi), DATA
+	movups (%rsi), SHASH
+	movaps .Lbswap_mask, BSWAP
+	pshufb BSWAP, DATA
+	call __clmul_gf128mul_ble
+	pshufb BSWAP, DATA
+	movups DATA, (%rdi)
+	ret
+
+/*
+ * void clmul_ghash_update(char *dst, const char *src, unsigned int srclen,
+ *			   const be128 *shash);
+ */
+ENTRY(clmul_ghash_update)
+	cmp $16, %rdx
+	jb .Lupdate_just_ret	# check length
+	movaps .Lbswap_mask, BSWAP
+	movups (%rdi), DATA
+	movups (%rcx), SHASH
+	pshufb BSWAP, DATA
+.align 4
+.Lupdate_loop:
+	movups (%rsi), IN1
+	pshufb BSWAP, IN1
+	pxor IN1, DATA
+	call __clmul_gf128mul_ble
+	sub $16, %rdx
+	add $16, %rsi
+	cmp $16, %rdx
+	jge .Lupdate_loop
+	pshufb BSWAP, DATA
+	movups DATA, (%rdi)
+.Lupdate_just_ret:
+	ret
+
+/*
+ * void clmul_ghash_setkey(be128 *shash, const u8 *key);
+ *
+ * Calculate hash_key << 1 mod poly
+ */
+ENTRY(clmul_ghash_setkey)
+	movaps .Lbswap_mask, BSWAP
+	movups (%rsi), %xmm0
+	pshufb BSWAP, %xmm0
+	movaps %xmm0, %xmm1
+	psllq $1, %xmm0
+	psrlq $63, %xmm1
+	movaps %xmm1, %xmm2
+	pslldq $8, %xmm1
+	psrldq $8, %xmm2
+	por %xmm1, %xmm0
+	# reduction
+	pshufd $0b00100100, %xmm2, %xmm1
+	pcmpeqd .Ltwo_one, %xmm1
+	pand .Lpoly, %xmm1
+	pxor %xmm1, %xmm0
+	movups %xmm0, (%rdi)
+	ret
--- linux-mvl-dove-2.6.32.orig/arch/x86/crypto/ghash-clmulni-intel_glue.c
+++ linux-mvl-dove-2.6.32/arch/x86/crypto/ghash-clmulni-intel_glue.c
@@ -0,0 +1,333 @@
+/*
+ * Accelerated GHASH implementation with Intel PCLMULQDQ-NI
+ * instructions. This file contains glue code.
+ *
+ * Copyright (c) 2009 Intel Corp.
+ *   Author: Huang Ying <ying.huang@intel.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/crypto.h>
+#include <crypto/algapi.h>
+#include <crypto/cryptd.h>
+#include <crypto/gf128mul.h>
+#include <crypto/internal/hash.h>
+#include <asm/i387.h>
+
+#define GHASH_BLOCK_SIZE	16
+#define GHASH_DIGEST_SIZE	16
+
+void clmul_ghash_mul(char *dst, const be128 *shash);
+
+void clmul_ghash_update(char *dst, const char *src, unsigned int srclen,
+			const be128 *shash);
+
+void clmul_ghash_setkey(be128 *shash, const u8 *key);
+
+struct ghash_async_ctx {
+	struct cryptd_ahash *cryptd_tfm;
+};
+
+struct ghash_ctx {
+	be128 shash;
+};
+
+struct ghash_desc_ctx {
+	u8 buffer[GHASH_BLOCK_SIZE];
+	u32 bytes;
+};
+
+static int ghash_init(struct shash_desc *desc)
+{
+	struct ghash_desc_ctx *dctx = shash_desc_ctx(desc);
+
+	memset(dctx, 0, sizeof(*dctx));
+
+	return 0;
+}
+
+static int ghash_setkey(struct crypto_shash *tfm,
+			const u8 *key, unsigned int keylen)
+{
+	struct ghash_ctx *ctx = crypto_shash_ctx(tfm);
+
+	if (keylen != GHASH_BLOCK_SIZE) {
+		crypto_shash_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
+		return -EINVAL;
+	}
+
+	clmul_ghash_setkey(&ctx->shash, key);
+
+	return 0;
+}
+
+static int ghash_update(struct shash_desc *desc,
+			 const u8 *src, unsigned int srclen)
+{
+	struct ghash_desc_ctx *dctx = shash_desc_ctx(desc);
+	struct ghash_ctx *ctx = crypto_shash_ctx(desc->tfm);
+	u8 *dst = dctx->buffer;
+
+	kernel_fpu_begin();
+	if (dctx->bytes) {
+		int n = min(srclen, dctx->bytes);
+		u8 *pos = dst + (GHASH_BLOCK_SIZE - dctx->bytes);
+
+		dctx->bytes -= n;
+		srclen -= n;
+
+		while (n--)
+			*pos++ ^= *src++;
+
+		if (!dctx->bytes)
+			clmul_ghash_mul(dst, &ctx->shash);
+	}
+
+	clmul_ghash_update(dst, src, srclen, &ctx->shash);
+	kernel_fpu_end();
+
+	if (srclen & 0xf) {
+		src += srclen - (srclen & 0xf);
+		srclen &= 0xf;
+		dctx->bytes = GHASH_BLOCK_SIZE - srclen;
+		while (srclen--)
+			*dst++ ^= *src++;
+	}
+
+	return 0;
+}
+
+static void ghash_flush(struct ghash_ctx *ctx, struct ghash_desc_ctx *dctx)
+{
+	u8 *dst = dctx->buffer;
+
+	if (dctx->bytes) {
+		u8 *tmp = dst + (GHASH_BLOCK_SIZE - dctx->bytes);
+
+		while (dctx->bytes--)
+			*tmp++ ^= 0;
+
+		kernel_fpu_begin();
+		clmul_ghash_mul(dst, &ctx->shash);
+		kernel_fpu_end();
+	}
+
+	dctx->bytes = 0;
+}
+
+static int ghash_final(struct shash_desc *desc, u8 *dst)
+{
+	struct ghash_desc_ctx *dctx = shash_desc_ctx(desc);
+	struct ghash_ctx *ctx = crypto_shash_ctx(desc->tfm);
+	u8 *buf = dctx->buffer;
+
+	ghash_flush(ctx, dctx);
+	memcpy(dst, buf, GHASH_BLOCK_SIZE);
+
+	return 0;
+}
+
+static struct shash_alg ghash_alg = {
+	.digestsize	= GHASH_DIGEST_SIZE,
+	.init		= ghash_init,
+	.update		= ghash_update,
+	.final		= ghash_final,
+	.setkey		= ghash_setkey,
+	.descsize	= sizeof(struct ghash_desc_ctx),
+	.base		= {
+		.cra_name		= "__ghash",
+		.cra_driver_name	= "__ghash-pclmulqdqni",
+		.cra_priority		= 0,
+		.cra_flags		= CRYPTO_ALG_TYPE_SHASH,
+		.cra_blocksize		= GHASH_BLOCK_SIZE,
+		.cra_ctxsize		= sizeof(struct ghash_ctx),
+		.cra_module		= THIS_MODULE,
+		.cra_list		= LIST_HEAD_INIT(ghash_alg.base.cra_list),
+	},
+};
+
+static int ghash_async_init(struct ahash_request *req)
+{
+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
+	struct ghash_async_ctx *ctx = crypto_ahash_ctx(tfm);
+	struct ahash_request *cryptd_req = ahash_request_ctx(req);
+	struct cryptd_ahash *cryptd_tfm = ctx->cryptd_tfm;
+
+	if (irq_fpu_usable()) {
+		memcpy(cryptd_req, req, sizeof(*req));
+		ahash_request_set_tfm(cryptd_req, &cryptd_tfm->base);
+		return crypto_ahash_init(cryptd_req);
+	} else {
+		struct shash_desc *desc = cryptd_shash_desc(cryptd_req);
+		struct crypto_shash *child = cryptd_ahash_child(cryptd_tfm);
+
+		desc->tfm = child;
+		desc->flags = req->base.flags;
+		return crypto_shash_init(desc);
+	}
+}
+
+static int ghash_async_update(struct ahash_request *req)
+{
+	struct ahash_request *cryptd_req = ahash_request_ctx(req);
+
+	if (irq_fpu_usable()) {
+		struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
+		struct ghash_async_ctx *ctx = crypto_ahash_ctx(tfm);
+		struct cryptd_ahash *cryptd_tfm = ctx->cryptd_tfm;
+
+		memcpy(cryptd_req, req, sizeof(*req));
+		ahash_request_set_tfm(cryptd_req, &cryptd_tfm->base);
+		return crypto_ahash_update(cryptd_req);
+	} else {
+		struct shash_desc *desc = cryptd_shash_desc(cryptd_req);
+		return shash_ahash_update(req, desc);
+	}
+}
+
+static int ghash_async_final(struct ahash_request *req)
+{
+	struct ahash_request *cryptd_req = ahash_request_ctx(req);
+
+	if (irq_fpu_usable()) {
+		struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
+		struct ghash_async_ctx *ctx = crypto_ahash_ctx(tfm);
+		struct cryptd_ahash *cryptd_tfm = ctx->cryptd_tfm;
+
+		memcpy(cryptd_req, req, sizeof(*req));
+		ahash_request_set_tfm(cryptd_req, &cryptd_tfm->base);
+		return crypto_ahash_final(cryptd_req);
+	} else {
+		struct shash_desc *desc = cryptd_shash_desc(cryptd_req);
+		return crypto_shash_final(desc, req->result);
+	}
+}
+
+static int ghash_async_digest(struct ahash_request *req)
+{
+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
+	struct ghash_async_ctx *ctx = crypto_ahash_ctx(tfm);
+	struct ahash_request *cryptd_req = ahash_request_ctx(req);
+	struct cryptd_ahash *cryptd_tfm = ctx->cryptd_tfm;
+
+	if (irq_fpu_usable()) {
+		memcpy(cryptd_req, req, sizeof(*req));
+		ahash_request_set_tfm(cryptd_req, &cryptd_tfm->base);
+		return crypto_ahash_digest(cryptd_req);
+	} else {
+		struct shash_desc *desc = cryptd_shash_desc(cryptd_req);
+		struct crypto_shash *child = cryptd_ahash_child(cryptd_tfm);
+
+		desc->tfm = child;
+		desc->flags = req->base.flags;
+		return shash_ahash_digest(req, desc);
+	}
+}
+
+static int ghash_async_setkey(struct crypto_ahash *tfm, const u8 *key,
+			      unsigned int keylen)
+{
+	struct ghash_async_ctx *ctx = crypto_ahash_ctx(tfm);
+	struct crypto_ahash *child = &ctx->cryptd_tfm->base;
+	int err;
+
+	crypto_ahash_clear_flags(child, CRYPTO_TFM_REQ_MASK);
+	crypto_ahash_set_flags(child, crypto_ahash_get_flags(tfm)
+			       & CRYPTO_TFM_REQ_MASK);
+	err = crypto_ahash_setkey(child, key, keylen);
+	crypto_ahash_set_flags(tfm, crypto_ahash_get_flags(child)
+			       & CRYPTO_TFM_RES_MASK);
+
+	return 0;
+}
+
+static int ghash_async_init_tfm(struct crypto_tfm *tfm)
+{
+	struct cryptd_ahash *cryptd_tfm;
+	struct ghash_async_ctx *ctx = crypto_tfm_ctx(tfm);
+
+	cryptd_tfm = cryptd_alloc_ahash("__ghash-pclmulqdqni", 0, 0);
+	if (IS_ERR(cryptd_tfm))
+		return PTR_ERR(cryptd_tfm);
+	ctx->cryptd_tfm = cryptd_tfm;
+	crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),
+				 sizeof(struct ahash_request) +
+				 crypto_ahash_reqsize(&cryptd_tfm->base));
+
+	return 0;
+}
+
+static void ghash_async_exit_tfm(struct crypto_tfm *tfm)
+{
+	struct ghash_async_ctx *ctx = crypto_tfm_ctx(tfm);
+
+	cryptd_free_ahash(ctx->cryptd_tfm);
+}
+
+static struct ahash_alg ghash_async_alg = {
+	.init		= ghash_async_init,
+	.update		= ghash_async_update,
+	.final		= ghash_async_final,
+	.setkey		= ghash_async_setkey,
+	.digest		= ghash_async_digest,
+	.halg = {
+		.digestsize	= GHASH_DIGEST_SIZE,
+		.base = {
+			.cra_name		= "ghash",
+			.cra_driver_name	= "ghash-clmulni",
+			.cra_priority		= 400,
+			.cra_flags		= CRYPTO_ALG_TYPE_AHASH | CRYPTO_ALG_ASYNC,
+			.cra_blocksize		= GHASH_BLOCK_SIZE,
+			.cra_type		= &crypto_ahash_type,
+			.cra_module		= THIS_MODULE,
+			.cra_list		= LIST_HEAD_INIT(ghash_async_alg.halg.base.cra_list),
+			.cra_init		= ghash_async_init_tfm,
+			.cra_exit		= ghash_async_exit_tfm,
+		},
+	},
+};
+
+static int __init ghash_pclmulqdqni_mod_init(void)
+{
+	int err;
+
+	if (!cpu_has_pclmulqdq) {
+		printk(KERN_INFO "Intel PCLMULQDQ-NI instructions are not"
+		       " detected.\n");
+		return -ENODEV;
+	}
+
+	err = crypto_register_shash(&ghash_alg);
+	if (err)
+		goto err_out;
+	err = crypto_register_ahash(&ghash_async_alg);
+	if (err)
+		goto err_shash;
+
+	return 0;
+
+err_shash:
+	crypto_unregister_shash(&ghash_alg);
+err_out:
+	return err;
+}
+
+static void __exit ghash_pclmulqdqni_mod_exit(void)
+{
+	crypto_unregister_ahash(&ghash_async_alg);
+	crypto_unregister_shash(&ghash_alg);
+}
+
+module_init(ghash_pclmulqdqni_mod_init);
+module_exit(ghash_pclmulqdqni_mod_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("GHASH Message Digest Algorithm, "
+		   "acclerated by PCLMULQDQ-NI");
+MODULE_ALIAS("ghash");
--- linux-mvl-dove-2.6.32.orig/arch/x86/oprofile/op_model_p4.c
+++ linux-mvl-dove-2.6.32/arch/x86/oprofile/op_model_p4.c
@@ -394,12 +394,6 @@
 	setup_num_counters();
 	stag = get_stagger();
 
-	/* initialize some registers */
-	for (i = 0; i < num_counters; ++i)
-		msrs->counters[i].addr = 0;
-	for (i = 0; i < num_controls; ++i)
-		msrs->controls[i].addr = 0;
-
 	/* the counter & cccr registers we pay attention to */
 	for (i = 0; i < num_counters; ++i) {
 		addr = p4_counters[VIRT_CTR(stag, i)].counter_address;
--- linux-mvl-dove-2.6.32.orig/arch/x86/oprofile/op_model_amd.c
+++ linux-mvl-dove-2.6.32/arch/x86/oprofile/op_model_amd.c
@@ -76,19 +76,6 @@
 
 #ifdef CONFIG_OPROFILE_EVENT_MULTIPLEX
 
-static void op_mux_fill_in_addresses(struct op_msrs * const msrs)
-{
-	int i;
-
-	for (i = 0; i < NUM_VIRT_COUNTERS; i++) {
-		int hw_counter = op_x86_virt_to_phys(i);
-		if (reserve_perfctr_nmi(MSR_K7_PERFCTR0 + i))
-			msrs->multiplex[i].addr = MSR_K7_PERFCTR0 + hw_counter;
-		else
-			msrs->multiplex[i].addr = 0;
-	}
-}
-
 static void op_mux_switch_ctrl(struct op_x86_model_spec const *model,
 			       struct op_msrs const * const msrs)
 {
@@ -98,7 +85,7 @@
 	/* enable active counters */
 	for (i = 0; i < NUM_COUNTERS; ++i) {
 		int virt = op_x86_phys_to_virt(i);
-		if (!counter_config[virt].enabled)
+		if (!reset_value[virt])
 			continue;
 		rdmsrl(msrs->controls[i].addr, val);
 		val &= model->reserved;
@@ -107,10 +94,6 @@
 	}
 }
 
-#else
-
-static inline void op_mux_fill_in_addresses(struct op_msrs * const msrs) { }
-
 #endif
 
 /* functions for op_amd_spec */
@@ -122,18 +105,12 @@
 	for (i = 0; i < NUM_COUNTERS; i++) {
 		if (reserve_perfctr_nmi(MSR_K7_PERFCTR0 + i))
 			msrs->counters[i].addr = MSR_K7_PERFCTR0 + i;
-		else
-			msrs->counters[i].addr = 0;
 	}
 
 	for (i = 0; i < NUM_CONTROLS; i++) {
 		if (reserve_evntsel_nmi(MSR_K7_EVNTSEL0 + i))
 			msrs->controls[i].addr = MSR_K7_EVNTSEL0 + i;
-		else
-			msrs->controls[i].addr = 0;
 	}
-
-	op_mux_fill_in_addresses(msrs);
 }
 
 static void op_amd_setup_ctrs(struct op_x86_model_spec const *model,
@@ -144,7 +121,8 @@
 
 	/* setup reset_value */
 	for (i = 0; i < NUM_VIRT_COUNTERS; ++i) {
-		if (counter_config[i].enabled)
+		if (counter_config[i].enabled
+		    && msrs->counters[op_x86_virt_to_phys(i)].addr)
 			reset_value[i] = counter_config[i].count;
 		else
 			reset_value[i] = 0;
@@ -169,9 +147,7 @@
 	/* enable active counters */
 	for (i = 0; i < NUM_COUNTERS; ++i) {
 		int virt = op_x86_phys_to_virt(i);
-		if (!counter_config[virt].enabled)
-			continue;
-		if (!msrs->counters[i].addr)
+		if (!reset_value[virt])
 			continue;
 
 		/* setup counter registers */
@@ -405,16 +381,6 @@
 		return 1;
 	}
 
-#ifdef CONFIG_NUMA
-	/* Sanity check */
-	/* Works only for 64bit with proper numa implementation. */
-	if (nodes != num_possible_nodes()) {
-		printk(KERN_DEBUG "Failed to setup CPU node(s) for IBS, "
-			"found: %d, expected %d",
-			nodes, num_possible_nodes());
-		return 1;
-	}
-#endif
 	return 0;
 }
 
--- linux-mvl-dove-2.6.32.orig/arch/x86/oprofile/nmi_int.c
+++ linux-mvl-dove-2.6.32/arch/x86/oprofile/nmi_int.c
@@ -95,7 +95,10 @@
 static void nmi_cpu_start(void *dummy)
 {
 	struct op_msrs const *msrs = &__get_cpu_var(cpu_msrs);
-	model->start(msrs);
+	if (!msrs->controls)
+		WARN_ON_ONCE(1);
+	else
+		model->start(msrs);
 }
 
 static int nmi_start(void)
@@ -107,7 +110,10 @@
 static void nmi_cpu_stop(void *dummy)
 {
 	struct op_msrs const *msrs = &__get_cpu_var(cpu_msrs);
-	model->stop(msrs);
+	if (!msrs->controls)
+		WARN_ON_ONCE(1);
+	else
+		model->stop(msrs);
 }
 
 static void nmi_stop(void)
@@ -159,7 +165,7 @@
 
 	for_each_possible_cpu(i) {
 		per_cpu(cpu_msrs, i).multiplex =
-			kmalloc(multiplex_size, GFP_KERNEL);
+			kzalloc(multiplex_size, GFP_KERNEL);
 		if (!per_cpu(cpu_msrs, i).multiplex)
 			return 0;
 	}
@@ -179,7 +185,6 @@
 		if (counter_config[i].enabled) {
 			multiplex[i].saved = -(u64)counter_config[i].count;
 		} else {
-			multiplex[i].addr  = 0;
 			multiplex[i].saved = 0;
 		}
 	}
@@ -189,25 +194,27 @@
 
 static void nmi_cpu_save_mpx_registers(struct op_msrs *msrs)
 {
+	struct op_msr *counters = msrs->counters;
 	struct op_msr *multiplex = msrs->multiplex;
 	int i;
 
 	for (i = 0; i < model->num_counters; ++i) {
 		int virt = op_x86_phys_to_virt(i);
-		if (multiplex[virt].addr)
-			rdmsrl(multiplex[virt].addr, multiplex[virt].saved);
+		if (counters[i].addr)
+			rdmsrl(counters[i].addr, multiplex[virt].saved);
 	}
 }
 
 static void nmi_cpu_restore_mpx_registers(struct op_msrs *msrs)
 {
+	struct op_msr *counters = msrs->counters;
 	struct op_msr *multiplex = msrs->multiplex;
 	int i;
 
 	for (i = 0; i < model->num_counters; ++i) {
 		int virt = op_x86_phys_to_virt(i);
-		if (multiplex[virt].addr)
-			wrmsrl(multiplex[virt].addr, multiplex[virt].saved);
+		if (counters[i].addr)
+			wrmsrl(counters[i].addr, multiplex[virt].saved);
 	}
 }
 
@@ -222,7 +229,7 @@
 
 	/* move to next set */
 	si += model->num_counters;
-	if ((si > model->num_virt_counters) || (counter_config[si].count == 0))
+	if ((si >= model->num_virt_counters) || (counter_config[si].count == 0))
 		per_cpu(switch_index, cpu) = 0;
 	else
 		per_cpu(switch_index, cpu) = si;
@@ -303,11 +310,11 @@
 
 	int i;
 	for_each_possible_cpu(i) {
-		per_cpu(cpu_msrs, i).counters = kmalloc(counters_size,
+		per_cpu(cpu_msrs, i).counters = kzalloc(counters_size,
 							GFP_KERNEL);
 		if (!per_cpu(cpu_msrs, i).counters)
 			return 0;
-		per_cpu(cpu_msrs, i).controls = kmalloc(controls_size,
+		per_cpu(cpu_msrs, i).controls = kzalloc(controls_size,
 							GFP_KERNEL);
 		if (!per_cpu(cpu_msrs, i).controls)
 			return 0;
@@ -511,8 +518,13 @@
 	int error;
 
 	error = sysdev_class_register(&oprofile_sysclass);
-	if (!error)
-		error = sysdev_register(&device_oprofile);
+	if (error)
+		return error;
+
+	error = sysdev_register(&device_oprofile);
+	if (error)
+		sysdev_class_unregister(&oprofile_sysclass);
+
 	return error;
 }
 
@@ -523,8 +535,10 @@
 }
 
 #else
-#define init_sysfs() do { } while (0)
-#define exit_sysfs() do { } while (0)
+
+static inline int  init_sysfs(void) { return 0; }
+static inline void exit_sysfs(void) { }
+
 #endif /* CONFIG_PM */
 
 static int __init p4_init(char **cpu_type)
@@ -577,6 +591,18 @@
 	if (force_arch_perfmon && cpu_has_arch_perfmon)
 		return 0;
 
+	/*
+	 * Documentation on identifying Intel processors by CPU family
+	 * and model can be found in the Intel Software Developer's
+	 * Manuals (SDM):
+	 *
+	 *  http://www.intel.com/products/processor/manuals/
+	 *
+	 * As of May 2010 the documentation for this was in the:
+	 * "Intel 64 and IA-32 Architectures Software Developer's
+	 * Manual Volume 3B: System Programming Guide", "Table B-1
+	 * CPUID Signature Values of DisplayFamily_DisplayModel".
+	 */
 	switch (cpu_model) {
 	case 0 ... 2:
 		*cpu_type = "i386/ppro";
@@ -595,14 +621,19 @@
 	case 14:
 		*cpu_type = "i386/core";
 		break;
-	case 15: case 23:
+	case 0x0f:
+	case 0x16:
+	case 0x17:
+	case 0x1d:
 		*cpu_type = "i386/core_2";
 		break;
-	case 26:
+	case 0x1a:
+	case 0x1e:
+	case 0x2e:
 		spec = &op_arch_perfmon_spec;
 		*cpu_type = "i386/core_i7";
 		break;
-	case 28:
+	case 0x1c:
 		*cpu_type = "i386/atom";
 		break;
 	default:
@@ -624,6 +655,8 @@
 	char *cpu_type = NULL;
 	int ret = 0;
 
+	using_nmi = 0;
+
 	if (!cpu_has_apic)
 		return -ENODEV;
 
@@ -706,7 +739,10 @@
 
 	mux_init(ops);
 
-	init_sysfs();
+	ret = init_sysfs();
+	if (ret)
+		return ret;
+
 	using_nmi = 1;
 	printk(KERN_INFO "oprofile: using NMI interrupt.\n");
 	return 0;
--- linux-mvl-dove-2.6.32.orig/arch/x86/oprofile/op_model_ppro.c
+++ linux-mvl-dove-2.6.32/arch/x86/oprofile/op_model_ppro.c
@@ -37,15 +37,11 @@
 	for (i = 0; i < num_counters; i++) {
 		if (reserve_perfctr_nmi(MSR_P6_PERFCTR0 + i))
 			msrs->counters[i].addr = MSR_P6_PERFCTR0 + i;
-		else
-			msrs->counters[i].addr = 0;
 	}
 
 	for (i = 0; i < num_counters; i++) {
 		if (reserve_evntsel_nmi(MSR_P6_EVNTSEL0 + i))
 			msrs->controls[i].addr = MSR_P6_EVNTSEL0 + i;
-		else
-			msrs->controls[i].addr = 0;
 	}
 }
 
@@ -57,7 +53,7 @@
 	int i;
 
 	if (!reset_value) {
-		reset_value = kmalloc(sizeof(reset_value[0]) * num_counters,
+		reset_value = kzalloc(sizeof(reset_value[0]) * num_counters,
 					GFP_ATOMIC);
 		if (!reset_value)
 			return;
--- linux-mvl-dove-2.6.32.orig/arch/x86/lib/semaphore_32.S
+++ linux-mvl-dove-2.6.32/arch/x86/lib/semaphore_32.S
@@ -36,7 +36,7 @@
  */
 #ifdef CONFIG_SMP
 ENTRY(__write_lock_failed)
-	CFI_STARTPROC simple
+	CFI_STARTPROC
 	FRAME
 2: 	LOCK_PREFIX
 	addl	$ RW_LOCK_BIAS,(%eax)
--- linux-mvl-dove-2.6.32.orig/arch/x86/lib/Makefile
+++ linux-mvl-dove-2.6.32/arch/x86/lib/Makefile
@@ -2,14 +2,14 @@
 # Makefile for x86 specific library files.
 #
 
-obj-$(CONFIG_SMP) := msr.o
+obj-$(CONFIG_SMP) += msr-smp.o cache-smp.o
 
 lib-y := delay.o
 lib-y += thunk_$(BITS).o
 lib-y += usercopy_$(BITS).o getuser.o putuser.o
 lib-y += memcpy_$(BITS).o
 
-obj-y += msr-reg.o msr-reg-export.o
+obj-y += msr.o msr-reg.o msr-reg-export.o
 
 ifeq ($(CONFIG_X86_32),y)
         obj-y += atomic64_32.o
@@ -26,4 +26,5 @@
         lib-y += thunk_64.o clear_page_64.o copy_page_64.o
         lib-y += memmove_64.o memset_64.o
         lib-y += copy_user_64.o rwlock_64.o copy_user_nocache_64.o
+	lib-$(CONFIG_RWSEM_XCHGADD_ALGORITHM) += rwsem_64.o
 endif
--- linux-mvl-dove-2.6.32.orig/arch/x86/lib/rwsem_64.S
+++ linux-mvl-dove-2.6.32/arch/x86/lib/rwsem_64.S
@@ -0,0 +1,81 @@
+/*
+ * x86-64 rwsem wrappers
+ *
+ * This interfaces the inline asm code to the slow-path
+ * C routines. We need to save the call-clobbered regs
+ * that the asm does not mark as clobbered, and move the
+ * argument from %rax to %rdi.
+ *
+ * NOTE! We don't need to save %rax, because the functions
+ * will always return the semaphore pointer in %rax (which
+ * is also the input argument to these helpers)
+ *
+ * The following can clobber %rdx because the asm clobbers it:
+ *   call_rwsem_down_write_failed
+ *   call_rwsem_wake
+ * but %rdi, %rsi, %rcx, %r8-r11 always need saving.
+ */
+
+#include <linux/linkage.h>
+#include <asm/rwlock.h>
+#include <asm/alternative-asm.h>
+#include <asm/frame.h>
+#include <asm/dwarf2.h>
+
+#define save_common_regs \
+	pushq %rdi; \
+	pushq %rsi; \
+	pushq %rcx; \
+	pushq %r8; \
+	pushq %r9; \
+	pushq %r10; \
+	pushq %r11
+
+#define restore_common_regs \
+	popq %r11; \
+	popq %r10; \
+	popq %r9; \
+	popq %r8; \
+	popq %rcx; \
+	popq %rsi; \
+	popq %rdi
+
+/* Fix up special calling conventions */
+ENTRY(call_rwsem_down_read_failed)
+	save_common_regs
+	pushq %rdx
+	movq %rax,%rdi
+	call rwsem_down_read_failed
+	popq %rdx
+	restore_common_regs
+	ret
+	ENDPROC(call_rwsem_down_read_failed)
+
+ENTRY(call_rwsem_down_write_failed)
+	save_common_regs
+	movq %rax,%rdi
+	call rwsem_down_write_failed
+	restore_common_regs
+	ret
+	ENDPROC(call_rwsem_down_write_failed)
+
+ENTRY(call_rwsem_wake)
+	decw %dx    /* do nothing if still outstanding active readers */
+	jnz 1f
+	save_common_regs
+	movq %rax,%rdi
+	call rwsem_wake
+	restore_common_regs
+1:	ret
+	ENDPROC(call_rwsem_wake)
+
+/* Fix up special calling conventions */
+ENTRY(call_rwsem_downgrade_wake)
+	save_common_regs
+	pushq %rdx
+	movq %rax,%rdi
+	call rwsem_downgrade_wake
+	popq %rdx
+	restore_common_regs
+	ret
+	ENDPROC(call_rwsem_downgrade_wake)
--- linux-mvl-dove-2.6.32.orig/arch/x86/lib/msr.c
+++ linux-mvl-dove-2.6.32/arch/x86/lib/msr.c
@@ -1,226 +1,23 @@
 #include <linux/module.h>
 #include <linux/preempt.h>
-#include <linux/smp.h>
 #include <asm/msr.h>
 
-struct msr_info {
-	u32 msr_no;
-	struct msr reg;
-	struct msr *msrs;
-	int off;
-	int err;
-};
-
-static void __rdmsr_on_cpu(void *info)
-{
-	struct msr_info *rv = info;
-	struct msr *reg;
-	int this_cpu = raw_smp_processor_id();
-
-	if (rv->msrs)
-		reg = &rv->msrs[this_cpu - rv->off];
-	else
-		reg = &rv->reg;
-
-	rdmsr(rv->msr_no, reg->l, reg->h);
-}
-
-static void __wrmsr_on_cpu(void *info)
-{
-	struct msr_info *rv = info;
-	struct msr *reg;
-	int this_cpu = raw_smp_processor_id();
-
-	if (rv->msrs)
-		reg = &rv->msrs[this_cpu - rv->off];
-	else
-		reg = &rv->reg;
-
-	wrmsr(rv->msr_no, reg->l, reg->h);
-}
-
-int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
-{
-	int err;
-	struct msr_info rv;
-
-	memset(&rv, 0, sizeof(rv));
-
-	rv.msr_no = msr_no;
-	err = smp_call_function_single(cpu, __rdmsr_on_cpu, &rv, 1);
-	*l = rv.reg.l;
-	*h = rv.reg.h;
-
-	return err;
-}
-EXPORT_SYMBOL(rdmsr_on_cpu);
-
-int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
-{
-	int err;
-	struct msr_info rv;
-
-	memset(&rv, 0, sizeof(rv));
-
-	rv.msr_no = msr_no;
-	rv.reg.l = l;
-	rv.reg.h = h;
-	err = smp_call_function_single(cpu, __wrmsr_on_cpu, &rv, 1);
-
-	return err;
-}
-EXPORT_SYMBOL(wrmsr_on_cpu);
-
-/* rdmsr on a bunch of CPUs
- *
- * @mask:       which CPUs
- * @msr_no:     which MSR
- * @msrs:       array of MSR values
- *
- */
-void rdmsr_on_cpus(const cpumask_t *mask, u32 msr_no, struct msr *msrs)
-{
-	struct msr_info rv;
-	int this_cpu;
-
-	memset(&rv, 0, sizeof(rv));
-
-	rv.off    = cpumask_first(mask);
-	rv.msrs	  = msrs;
-	rv.msr_no = msr_no;
-
-	this_cpu = get_cpu();
-
-	if (cpumask_test_cpu(this_cpu, mask))
-		__rdmsr_on_cpu(&rv);
-
-	smp_call_function_many(mask, __rdmsr_on_cpu, &rv, 1);
-	put_cpu();
-}
-EXPORT_SYMBOL(rdmsr_on_cpus);
-
-/*
- * wrmsr on a bunch of CPUs
- *
- * @mask:       which CPUs
- * @msr_no:     which MSR
- * @msrs:       array of MSR values
- *
- */
-void wrmsr_on_cpus(const cpumask_t *mask, u32 msr_no, struct msr *msrs)
-{
-	struct msr_info rv;
-	int this_cpu;
-
-	memset(&rv, 0, sizeof(rv));
-
-	rv.off    = cpumask_first(mask);
-	rv.msrs   = msrs;
-	rv.msr_no = msr_no;
-
-	this_cpu = get_cpu();
-
-	if (cpumask_test_cpu(this_cpu, mask))
-		__wrmsr_on_cpu(&rv);
-
-	smp_call_function_many(mask, __wrmsr_on_cpu, &rv, 1);
-	put_cpu();
-}
-EXPORT_SYMBOL(wrmsr_on_cpus);
-
-/* These "safe" variants are slower and should be used when the target MSR
-   may not actually exist. */
-static void __rdmsr_safe_on_cpu(void *info)
-{
-	struct msr_info *rv = info;
-
-	rv->err = rdmsr_safe(rv->msr_no, &rv->reg.l, &rv->reg.h);
-}
-
-static void __wrmsr_safe_on_cpu(void *info)
-{
-	struct msr_info *rv = info;
-
-	rv->err = wrmsr_safe(rv->msr_no, rv->reg.l, rv->reg.h);
-}
-
-int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
+struct msr *msrs_alloc(void)
 {
-	int err;
-	struct msr_info rv;
+	struct msr *msrs = NULL;
 
-	memset(&rv, 0, sizeof(rv));
+	msrs = alloc_percpu(struct msr);
+	if (!msrs) {
+		pr_warning("%s: error allocating msrs\n", __func__);
+		return NULL;
+	}
 
-	rv.msr_no = msr_no;
-	err = smp_call_function_single(cpu, __rdmsr_safe_on_cpu, &rv, 1);
-	*l = rv.reg.l;
-	*h = rv.reg.h;
-
-	return err ? err : rv.err;
+	return msrs;
 }
-EXPORT_SYMBOL(rdmsr_safe_on_cpu);
+EXPORT_SYMBOL(msrs_alloc);
 
-int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
+void msrs_free(struct msr *msrs)
 {
-	int err;
-	struct msr_info rv;
-
-	memset(&rv, 0, sizeof(rv));
-
-	rv.msr_no = msr_no;
-	rv.reg.l = l;
-	rv.reg.h = h;
-	err = smp_call_function_single(cpu, __wrmsr_safe_on_cpu, &rv, 1);
-
-	return err ? err : rv.err;
-}
-EXPORT_SYMBOL(wrmsr_safe_on_cpu);
-
-/*
- * These variants are significantly slower, but allows control over
- * the entire 32-bit GPR set.
- */
-struct msr_regs_info {
-	u32 *regs;
-	int err;
-};
-
-static void __rdmsr_safe_regs_on_cpu(void *info)
-{
-	struct msr_regs_info *rv = info;
-
-	rv->err = rdmsr_safe_regs(rv->regs);
-}
-
-static void __wrmsr_safe_regs_on_cpu(void *info)
-{
-	struct msr_regs_info *rv = info;
-
-	rv->err = wrmsr_safe_regs(rv->regs);
-}
-
-int rdmsr_safe_regs_on_cpu(unsigned int cpu, u32 *regs)
-{
-	int err;
-	struct msr_regs_info rv;
-
-	rv.regs   = regs;
-	rv.err    = -EIO;
-	err = smp_call_function_single(cpu, __rdmsr_safe_regs_on_cpu, &rv, 1);
-
-	return err ? err : rv.err;
-}
-EXPORT_SYMBOL(rdmsr_safe_regs_on_cpu);
-
-int wrmsr_safe_regs_on_cpu(unsigned int cpu, u32 *regs)
-{
-	int err;
-	struct msr_regs_info rv;
-
-	rv.regs = regs;
-	rv.err  = -EIO;
-	err = smp_call_function_single(cpu, __wrmsr_safe_regs_on_cpu, &rv, 1);
-
-	return err ? err : rv.err;
+	free_percpu(msrs);
 }
-EXPORT_SYMBOL(wrmsr_safe_regs_on_cpu);
+EXPORT_SYMBOL(msrs_free);
--- linux-mvl-dove-2.6.32.orig/arch/x86/lib/copy_user_64.S
+++ linux-mvl-dove-2.6.32/arch/x86/lib/copy_user_64.S
@@ -72,7 +72,7 @@
 	addq %rdx,%rcx
 	jc bad_to_user
 	cmpq TI_addr_limit(%rax),%rcx
-	jae bad_to_user
+	ja bad_to_user
 	ALTERNATIVE_JUMP X86_FEATURE_REP_GOOD,copy_user_generic_unrolled,copy_user_generic_string
 	CFI_ENDPROC
 ENDPROC(copy_to_user)
@@ -85,7 +85,7 @@
 	addq %rdx,%rcx
 	jc bad_from_user
 	cmpq TI_addr_limit(%rax),%rcx
-	jae bad_from_user
+	ja bad_from_user
 	ALTERNATIVE_JUMP X86_FEATURE_REP_GOOD,copy_user_generic_unrolled,copy_user_generic_string
 	CFI_ENDPROC
 ENDPROC(copy_from_user)
--- linux-mvl-dove-2.6.32.orig/arch/x86/lib/cache-smp.c
+++ linux-mvl-dove-2.6.32/arch/x86/lib/cache-smp.c
@@ -0,0 +1,19 @@
+#include <linux/smp.h>
+#include <linux/module.h>
+
+static void __wbinvd(void *dummy)
+{
+	wbinvd();
+}
+
+void wbinvd_on_cpu(int cpu)
+{
+	smp_call_function_single(cpu, __wbinvd, NULL, 1);
+}
+EXPORT_SYMBOL(wbinvd_on_cpu);
+
+int wbinvd_on_all_cpus(void)
+{
+	return on_each_cpu(__wbinvd, NULL, 1);
+}
+EXPORT_SYMBOL(wbinvd_on_all_cpus);
--- linux-mvl-dove-2.6.32.orig/arch/x86/lib/msr-smp.c
+++ linux-mvl-dove-2.6.32/arch/x86/lib/msr-smp.c
@@ -0,0 +1,204 @@
+#include <linux/module.h>
+#include <linux/preempt.h>
+#include <linux/smp.h>
+#include <asm/msr.h>
+
+static void __rdmsr_on_cpu(void *info)
+{
+	struct msr_info *rv = info;
+	struct msr *reg;
+	int this_cpu = raw_smp_processor_id();
+
+	if (rv->msrs)
+		reg = per_cpu_ptr(rv->msrs, this_cpu);
+	else
+		reg = &rv->reg;
+
+	rdmsr(rv->msr_no, reg->l, reg->h);
+}
+
+static void __wrmsr_on_cpu(void *info)
+{
+	struct msr_info *rv = info;
+	struct msr *reg;
+	int this_cpu = raw_smp_processor_id();
+
+	if (rv->msrs)
+		reg = per_cpu_ptr(rv->msrs, this_cpu);
+	else
+		reg = &rv->reg;
+
+	wrmsr(rv->msr_no, reg->l, reg->h);
+}
+
+int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
+{
+	int err;
+	struct msr_info rv;
+
+	memset(&rv, 0, sizeof(rv));
+
+	rv.msr_no = msr_no;
+	err = smp_call_function_single(cpu, __rdmsr_on_cpu, &rv, 1);
+	*l = rv.reg.l;
+	*h = rv.reg.h;
+
+	return err;
+}
+EXPORT_SYMBOL(rdmsr_on_cpu);
+
+int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
+{
+	int err;
+	struct msr_info rv;
+
+	memset(&rv, 0, sizeof(rv));
+
+	rv.msr_no = msr_no;
+	rv.reg.l = l;
+	rv.reg.h = h;
+	err = smp_call_function_single(cpu, __wrmsr_on_cpu, &rv, 1);
+
+	return err;
+}
+EXPORT_SYMBOL(wrmsr_on_cpu);
+
+static void __rwmsr_on_cpus(const struct cpumask *mask, u32 msr_no,
+			    struct msr *msrs,
+			    void (*msr_func) (void *info))
+{
+	struct msr_info rv;
+	int this_cpu;
+
+	memset(&rv, 0, sizeof(rv));
+
+	rv.msrs	  = msrs;
+	rv.msr_no = msr_no;
+
+	this_cpu = get_cpu();
+
+	if (cpumask_test_cpu(this_cpu, mask))
+		msr_func(&rv);
+
+	smp_call_function_many(mask, msr_func, &rv, 1);
+	put_cpu();
+}
+
+/* rdmsr on a bunch of CPUs
+ *
+ * @mask:       which CPUs
+ * @msr_no:     which MSR
+ * @msrs:       array of MSR values
+ *
+ */
+void rdmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs)
+{
+	__rwmsr_on_cpus(mask, msr_no, msrs, __rdmsr_on_cpu);
+}
+EXPORT_SYMBOL(rdmsr_on_cpus);
+
+/*
+ * wrmsr on a bunch of CPUs
+ *
+ * @mask:       which CPUs
+ * @msr_no:     which MSR
+ * @msrs:       array of MSR values
+ *
+ */
+void wrmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs)
+{
+	__rwmsr_on_cpus(mask, msr_no, msrs, __wrmsr_on_cpu);
+}
+EXPORT_SYMBOL(wrmsr_on_cpus);
+
+/* These "safe" variants are slower and should be used when the target MSR
+   may not actually exist. */
+static void __rdmsr_safe_on_cpu(void *info)
+{
+	struct msr_info *rv = info;
+
+	rv->err = rdmsr_safe(rv->msr_no, &rv->reg.l, &rv->reg.h);
+}
+
+static void __wrmsr_safe_on_cpu(void *info)
+{
+	struct msr_info *rv = info;
+
+	rv->err = wrmsr_safe(rv->msr_no, rv->reg.l, rv->reg.h);
+}
+
+int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
+{
+	int err;
+	struct msr_info rv;
+
+	memset(&rv, 0, sizeof(rv));
+
+	rv.msr_no = msr_no;
+	err = smp_call_function_single(cpu, __rdmsr_safe_on_cpu, &rv, 1);
+	*l = rv.reg.l;
+	*h = rv.reg.h;
+
+	return err ? err : rv.err;
+}
+EXPORT_SYMBOL(rdmsr_safe_on_cpu);
+
+int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
+{
+	int err;
+	struct msr_info rv;
+
+	memset(&rv, 0, sizeof(rv));
+
+	rv.msr_no = msr_no;
+	rv.reg.l = l;
+	rv.reg.h = h;
+	err = smp_call_function_single(cpu, __wrmsr_safe_on_cpu, &rv, 1);
+
+	return err ? err : rv.err;
+}
+EXPORT_SYMBOL(wrmsr_safe_on_cpu);
+
+/*
+ * These variants are significantly slower, but allows control over
+ * the entire 32-bit GPR set.
+ */
+static void __rdmsr_safe_regs_on_cpu(void *info)
+{
+	struct msr_regs_info *rv = info;
+
+	rv->err = rdmsr_safe_regs(rv->regs);
+}
+
+static void __wrmsr_safe_regs_on_cpu(void *info)
+{
+	struct msr_regs_info *rv = info;
+
+	rv->err = wrmsr_safe_regs(rv->regs);
+}
+
+int rdmsr_safe_regs_on_cpu(unsigned int cpu, u32 *regs)
+{
+	int err;
+	struct msr_regs_info rv;
+
+	rv.regs   = regs;
+	rv.err    = -EIO;
+	err = smp_call_function_single(cpu, __rdmsr_safe_regs_on_cpu, &rv, 1);
+
+	return err ? err : rv.err;
+}
+EXPORT_SYMBOL(rdmsr_safe_regs_on_cpu);
+
+int wrmsr_safe_regs_on_cpu(unsigned int cpu, u32 *regs)
+{
+	int err;
+	struct msr_regs_info rv;
+
+	rv.regs = regs;
+	rv.err  = -EIO;
+	err = smp_call_function_single(cpu, __wrmsr_safe_regs_on_cpu, &rv, 1);
+
+	return err ? err : rv.err;
+}
+EXPORT_SYMBOL(wrmsr_safe_regs_on_cpu);
--- linux-mvl-dove-2.6.32.orig/arch/x86/power/hibernate_asm_32.S
+++ linux-mvl-dove-2.6.32/arch/x86/power/hibernate_asm_32.S
@@ -27,10 +27,17 @@
 	ret
 
 ENTRY(restore_image)
+	movl	mmu_cr4_features, %ecx
 	movl	resume_pg_dir, %eax
 	subl	$__PAGE_OFFSET, %eax
 	movl	%eax, %cr3
 
+	jecxz	1f	# cr4 Pentium and higher, skip if zero
+	andl	$~(X86_CR4_PGE), %ecx
+	movl	%ecx, %cr4;  # turn off PGE
+	movl	%cr3, %eax;  # flush TLB
+	movl	%eax, %cr3
+1:
 	movl	restore_pblist, %edx
 	.p2align 4,,7
 
@@ -54,16 +61,8 @@
 	movl	$swapper_pg_dir, %eax
 	subl	$__PAGE_OFFSET, %eax
 	movl	%eax, %cr3
-	/* Flush TLB, including "global" things (vmalloc) */
 	movl	mmu_cr4_features, %ecx
 	jecxz	1f	# cr4 Pentium and higher, skip if zero
-	movl	%ecx, %edx
-	andl	$~(X86_CR4_PGE), %edx
-	movl	%edx, %cr4;  # turn off PGE
-1:
-	movl	%cr3, %eax;  # flush TLB
-	movl	%eax, %cr3
-	jecxz	1f	# cr4 Pentium and higher, skip if zero
 	movl	%ecx, %cr4;  # turn PGE back on
 1:
 
--- linux-mvl-dove-2.6.32.orig/arch/x86/power/cpu.c
+++ linux-mvl-dove-2.6.32/arch/x86/power/cpu.c
@@ -104,12 +104,15 @@
 	ctxt->cr4 = read_cr4();
 	ctxt->cr8 = read_cr8();
 #endif
+	ctxt->misc_enable_saved = !rdmsrl_safe(MSR_IA32_MISC_ENABLE,
+					       &ctxt->misc_enable);
 }
 
 /* Needed by apm.c */
 void save_processor_state(void)
 {
 	__save_processor_state(&saved_context);
+	save_sched_clock_state();
 }
 #ifdef CONFIG_X86_32
 EXPORT_SYMBOL(save_processor_state);
@@ -176,6 +179,8 @@
  */
 static void __restore_processor_state(struct saved_context *ctxt)
 {
+	if (ctxt->misc_enable_saved)
+		wrmsrl(MSR_IA32_MISC_ENABLE, ctxt->misc_enable);
 	/*
 	 * control registers
 	 */
@@ -249,6 +254,7 @@
 void restore_processor_state(void)
 {
 	__restore_processor_state(&saved_context);
+	restore_sched_clock_state();
 }
 #ifdef CONFIG_X86_32
 EXPORT_SYMBOL(restore_processor_state);
--- linux-mvl-dove-2.6.32.orig/arch/x86/mm/fault.c
+++ linux-mvl-dove-2.6.32/arch/x86/mm/fault.c
@@ -801,8 +801,10 @@
 	up_read(&mm->mmap_sem);
 
 	/* Kernel mode? Handle exceptions or die: */
-	if (!(error_code & PF_USER))
+	if (!(error_code & PF_USER)) {
 		no_context(regs, error_code, address);
+		return;
+	}
 
 	/* User-space => ok to do another page fault: */
 	if (is_prefetch(regs, error_code, address))
@@ -828,6 +830,13 @@
 	       unsigned long address, unsigned int fault)
 {
 	if (fault & VM_FAULT_OOM) {
+		/* Kernel mode? Handle exceptions or die: */
+		if (!(error_code & PF_USER)) {
+			up_read(&current->mm->mmap_sem);
+			no_context(regs, error_code, address);
+			return;
+		}
+
 		out_of_memory(regs, error_code, address);
 	} else {
 		if (fault & (VM_FAULT_SIGBUS|VM_FAULT_HWPOISON))
--- linux-mvl-dove-2.6.32.orig/arch/x86/mm/init.c
+++ linux-mvl-dove-2.6.32/arch/x86/mm/init.c
@@ -149,6 +149,14 @@
 	set_nx();
 	if (nx_enabled)
 		printk(KERN_INFO "NX (Execute Disable) protection: active\n");
+	else
+#ifdef CONFIG_X86_32
+		printk(KERN_INFO "Using x86 segment limits to approximate "
+			"NX protection\n");
+#else
+		printk(KERN_WARNING "Warning: NX (Execute Disable) protection "
+			"missing in CPU or disabled in BIOS!\n");
+#endif
 
 	/* Enable PSE if available */
 	if (cpu_has_pse)
--- linux-mvl-dove-2.6.32.orig/arch/x86/mm/init_64.c
+++ linux-mvl-dove-2.6.32/arch/x86/mm/init_64.c
@@ -49,6 +49,7 @@
 #include <asm/numa.h>
 #include <asm/cacheflush.h>
 #include <asm/init.h>
+#include <linux/bootmem.h>
 
 static unsigned long dma_reserve __initdata;
 
@@ -615,6 +616,21 @@
  */
 #ifdef CONFIG_MEMORY_HOTPLUG
 /*
+ * After memory hotplug the variables max_pfn, max_low_pfn and high_memory need
+ * updating.
+ */
+static void  update_end_of_memory_vars(u64 start, u64 size)
+{
+	unsigned long end_pfn = PFN_UP(start + size);
+
+	if (end_pfn > max_pfn) {
+		max_pfn = end_pfn;
+		max_low_pfn = end_pfn;
+		high_memory = (void *)__va(max_pfn * PAGE_SIZE - 1) + 1;
+	}
+}
+
+/*
  * Memory is added always to NORMAL zone. This means you will never get
  * additional DMA/DMA32 memory.
  */
@@ -633,6 +649,9 @@
 	ret = __add_pages(nid, zone, start_pfn, nr_pages);
 	WARN_ON_ONCE(ret);
 
+	/* update max_pfn, max_low_pfn and high_memory */
+	update_end_of_memory_vars(start, size);
+
 	return ret;
 }
 EXPORT_SYMBOL_GPL(arch_add_memory);
--- linux-mvl-dove-2.6.32.orig/arch/x86/mm/tlb.c
+++ linux-mvl-dove-2.6.32/arch/x86/mm/tlb.c
@@ -6,6 +6,7 @@
 #include <linux/interrupt.h>
 #include <linux/module.h>
 
+#include <asm/desc.h>
 #include <asm/tlbflush.h>
 #include <asm/mmu_context.h>
 #include <asm/apic.h>
@@ -130,6 +131,10 @@
 	union smp_flush_state *f;
 
 	cpu = smp_processor_id();
+#ifdef CONFIG_X86_32
+	if (current->active_mm)
+                load_user_cs_desc(cpu, current->active_mm);
+#endif
 	/*
 	 * orig_rax contains the negated interrupt vector.
 	 * Use that to determine where the sender put the data.
--- linux-mvl-dove-2.6.32.orig/arch/x86/mm/srat_64.c
+++ linux-mvl-dove-2.6.32/arch/x86/mm/srat_64.c
@@ -229,9 +229,11 @@
 			printk(KERN_ERR "SRAT: Hotplug zone not continuous. Partly ignored\n");
 	}
 
-	if (changed)
+	if (changed) {
+		node_set(node, cpu_nodes_parsed);
 		printk(KERN_INFO "SRAT: hot plug zone found %Lx - %Lx\n",
 				 nd->start, nd->end);
+	}
 }
 
 /* Callback for parsing of the Proximity Domain <-> Memory Area mappings */
--- linux-mvl-dove-2.6.32.orig/arch/x86/mm/setup_nx.c
+++ linux-mvl-dove-2.6.32/arch/x86/mm/setup_nx.c
@@ -53,6 +53,7 @@
 #else
 void set_nx(void)
 {
+	nx_enabled = _PAGE_NX && ((__supported_pte_mask & _PAGE_NX) == _PAGE_NX);
 }
 #endif
 
--- linux-mvl-dove-2.6.32.orig/arch/x86/mm/pgtable.c
+++ linux-mvl-dove-2.6.32/arch/x86/mm/pgtable.c
@@ -6,6 +6,14 @@
 
 #define PGALLOC_GFP GFP_KERNEL | __GFP_NOTRACK | __GFP_REPEAT | __GFP_ZERO
 
+#ifdef CONFIG_HIGHPTE
+#define PGALLOC_USER_GFP __GFP_HIGHMEM
+#else
+#define PGALLOC_USER_GFP 0
+#endif
+
+gfp_t __userpte_alloc_gfp = PGALLOC_GFP | PGALLOC_USER_GFP;
+
 pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)
 {
 	return (pte_t *)__get_free_page(PGALLOC_GFP);
@@ -15,16 +23,29 @@
 {
 	struct page *pte;
 
-#ifdef CONFIG_HIGHPTE
-	pte = alloc_pages(PGALLOC_GFP | __GFP_HIGHMEM, 0);
-#else
-	pte = alloc_pages(PGALLOC_GFP, 0);
-#endif
+	pte = alloc_pages(__userpte_alloc_gfp, 0);
 	if (pte)
 		pgtable_page_ctor(pte);
 	return pte;
 }
 
+static int __init setup_userpte(char *arg)
+{
+	if (!arg)
+		return -EINVAL;
+
+	/*
+	 * "userpte=nohigh" disables allocation of user pagetables in
+	 * high memory.
+	 */
+	if (strcmp(arg, "nohigh") == 0)
+		__userpte_alloc_gfp &= ~__GFP_HIGHMEM;
+	else
+		return -EINVAL;
+	return 0;
+}
+early_param("userpte", setup_userpte);
+
 void ___pte_free_tlb(struct mmu_gather *tlb, struct page *pte)
 {
 	pgtable_page_dtor(pte);
--- linux-mvl-dove-2.6.32.orig/arch/x86/mm/mmap.c
+++ linux-mvl-dove-2.6.32/arch/x86/mm/mmap.c
@@ -131,6 +131,11 @@
 	} else {
 		mm->mmap_base = mmap_base();
 		mm->get_unmapped_area = arch_get_unmapped_area_topdown;
+#ifdef CONFIG_X86_32
+		if (!nx_enabled && !(current->personality & READ_IMPLIES_EXEC)
+		    && mmap_is_ia32())
+			mm->get_unmapped_exec_area = arch_get_unmapped_exec_area;
+#endif
 		mm->unmap_area = arch_unmap_area_topdown;
 	}
 }
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/head_32.S
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/head_32.S
@@ -324,7 +324,7 @@
 /*
  * Enable paging
  */
-	movl $pa(swapper_pg_dir),%eax
+	movl pa(initial_page_table), %eax
 	movl %eax,%cr3		/* set the page table pointer.. */
 	movl %cr0,%eax
 	orl  $X86_CR0_PG,%eax
@@ -604,6 +604,8 @@
 .align 4
 ENTRY(initial_code)
 	.long i386_start_kernel
+ENTRY(initial_page_table)
+	.long pa(swapper_pg_dir)
 
 /*
  * BSS section
@@ -619,6 +621,10 @@
 #endif
 swapper_pg_fixmap:
 	.fill 1024,4,0
+#ifdef CONFIG_X86_TRAMPOLINE
+ENTRY(trampoline_pg_dir)
+	.fill 1024,4,0
+#endif
 ENTRY(empty_zero_page)
 	.fill 4096,1,0
 
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/process_64.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/process_64.c
@@ -295,11 +295,10 @@
 
 	set_tsk_thread_flag(p, TIF_FORK);
 
-	p->thread.fs = me->thread.fs;
-	p->thread.gs = me->thread.gs;
-
 	savesegment(gs, p->thread.gsindex);
+	p->thread.gs = p->thread.gsindex ? 0 : me->thread.gs;
 	savesegment(fs, p->thread.fsindex);
+	p->thread.fs = p->thread.fsindex ? 0 : me->thread.fs;
 	savesegment(es, p->thread.es);
 	savesegment(ds, p->thread.ds);
 
@@ -357,7 +356,6 @@
 	regs->cs		= __USER_CS;
 	regs->ss		= __USER_DS;
 	regs->flags		= 0x200;
-	set_fs(USER_DS);
 	/*
 	 * Free the old FP and other extended state
 	 */
@@ -540,6 +538,18 @@
 	return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid);
 }
 
+void set_personality_ia32(void)
+{
+	/* inherit personality from parent */
+
+	/* Make sure to be in 32bit mode */
+	set_thread_flag(TIF_IA32);
+	current->personality |= force_personality32;
+
+	/* Prepare the first "return" to user space */
+	current_thread_info()->status |= TS_COMPAT;
+}
+
 unsigned long get_wchan(struct task_struct *p)
 {
 	unsigned long stack;
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/early-quirks.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/early-quirks.c
@@ -145,15 +145,10 @@
 
 static u32 __init ati_sbx00_rev(int num, int slot, int func)
 {
-	u32 old, d;
+	u32 d;
 
-	d = read_pci_config(num, slot, func, 0x70);
-	old = d;
-	d &= ~(1<<8);
-	write_pci_config(num, slot, func, 0x70, d);
 	d = read_pci_config(num, slot, func, 0x8);
 	d &= 0xff;
-	write_pci_config(num, slot, func, 0x70, old);
 
 	return d;
 }
@@ -162,11 +157,19 @@
 {
 	u32 d, rev;
 
-	if (acpi_use_timer_override)
+	rev = ati_sbx00_rev(num, slot, func);
+	if (rev >= 0x40)
+		acpi_fix_pin2_polarity = 1;
+
+	/*
+	 * SB600: revisions 0x11, 0x12, 0x13, 0x14, ...
+	 * SB700: revisions 0x39, 0x3a, ...
+	 * SB800: revisions 0x40, 0x41, ...
+	 */
+	if (rev >= 0x39)
 		return;
 
-	rev = ati_sbx00_rev(num, slot, func);
-	if (rev > 0x13)
+	if (acpi_use_timer_override)
 		return;
 
 	/* check for IRQ0 interrupt swap */
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/reboot.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/reboot.c
@@ -203,6 +203,15 @@
 			DMI_MATCH(DMI_BOARD_NAME, "0T656F"),
 		},
 	},
+	{	/* Handle problems with rebooting on Dell OptiPlex 760 with 0G919G*/
+		.callback = set_bios_reboot,
+		.ident = "Dell OptiPlex 760",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
+			DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 760"),
+			DMI_MATCH(DMI_BOARD_NAME, "0G919G"),
+		},
+	},
 	{	/* Handle problems with rebooting on Dell 2400's */
 		.callback = set_bios_reboot,
 		.ident = "Dell PowerEdge 2400",
@@ -259,6 +268,14 @@
 			DMI_MATCH(DMI_PRODUCT_NAME, "SBC-FITPC2"),
 		},
 	},
+	{       /* Handle problems with rebooting on ASUS P4S800 */
+		.callback = set_bios_reboot,
+		.ident = "ASUS P4S800",
+		.matches = {
+			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
+			DMI_MATCH(DMI_BOARD_NAME, "P4S800"),
+		},
+	},
 	{ }
 };
 
@@ -444,6 +461,22 @@
 			DMI_MATCH(DMI_PRODUCT_NAME, "Macmini3,1"),
 		},
 	},
+	{	/* Handle problems with rebooting on the iMac9,1. */
+		.callback = set_pci_reboot,
+		.ident = "Apple iMac9,1",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
+			DMI_MATCH(DMI_PRODUCT_NAME, "iMac9,1"),
+		},
+	},
+	{	/* Handle problems with rebooting on the Latitude E5420. */
+		.callback = set_pci_reboot,
+		.ident = "Dell Latitude E5420",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Latitude E5420"),
+		},
+	},
 	{ }
 };
 
@@ -608,7 +641,7 @@
 	/* O.K Now that I'm on the appropriate processor,
 	 * stop all of the others.
 	 */
-	smp_send_stop();
+	stop_other_cpus();
 #endif
 
 	lapic_shutdown();
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/pci-calgary_64.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/pci-calgary_64.c
@@ -102,11 +102,16 @@
 #define PMR_SOFTSTOPFAULT	0x40000000
 #define PMR_HARDSTOP		0x20000000
 
-#define MAX_NUM_OF_PHBS		8 /* how many PHBs in total? */
-#define MAX_NUM_CHASSIS		8 /* max number of chassis */
-/* MAX_PHB_BUS_NUM is the maximal possible dev->bus->number */
-#define MAX_PHB_BUS_NUM		(MAX_NUM_OF_PHBS * MAX_NUM_CHASSIS * 2)
-#define PHBS_PER_CALGARY	4
+/*
+ * The maximum PHB bus number.
+ * x3950M2 (rare): 8 chassis, 48 PHBs per chassis = 384
+ * x3950M2: 4 chassis, 48 PHBs per chassis        = 192
+ * x3950 (PCIE): 8 chassis, 32 PHBs per chassis   = 256
+ * x3950 (PCIX): 8 chassis, 16 PHBs per chassis   = 128
+ */
+#define MAX_PHB_BUS_NUM		256
+
+#define PHBS_PER_CALGARY	  4
 
 /* register offsets in Calgary's internal register space */
 static const unsigned long tar_offsets[] = {
@@ -318,13 +323,15 @@
 
 	pdev = to_pci_dev(dev);
 
+	/* search up the device tree for an iommu */
 	pbus = pdev->bus;
-
-	/* is the device behind a bridge? Look for the root bus */
-	while (pbus->parent)
+	do {
+		tbl = pci_iommu(pbus);
+		if (tbl && tbl->it_busno == pbus->number)
+			break;
+		tbl = NULL;
 		pbus = pbus->parent;
-
-	tbl = pci_iommu(pbus);
+	} while (pbus);
 
 	BUG_ON(tbl && (tbl->it_busno != pbus->number));
 
@@ -1051,8 +1058,6 @@
 	struct iommu_table *tbl;
 	int ret;
 
-	BUG_ON(dev->bus->number >= MAX_PHB_BUS_NUM);
-
 	bbar = busno_to_bbar(dev->bus->number);
 	ret = calgary_setup_tar(dev, bbar);
 	if (ret)
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/mpparse.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/mpparse.c
@@ -359,13 +359,6 @@
 		x86_init.mpparse.mpc_record(1);
 	}
 
-#ifdef CONFIG_X86_BIGSMP
-	generic_bigsmp_probe();
-#endif
-
-	if (apic->setup_apic_routing)
-		apic->setup_apic_routing();
-
 	if (!num_processors)
 		printk(KERN_ERR "MPTABLE: no processors registered!\n");
 	return num_processors;
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/setup.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/setup.c
@@ -109,6 +109,8 @@
 #ifdef CONFIG_X86_64
 #include <asm/numa_64.h>
 #endif
+#include <asm/mce.h>
+#include <asm/trampoline.h>
 
 /*
  * end_pfn only includes RAM, while max_pfn_mapped includes all e820 entries.
@@ -666,19 +668,38 @@
 			DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix/MSC"),
 		},
 	},
-	{
 	/*
-	 * AMI BIOS with low memory corruption was found on Intel DG45ID board.
-	 * It hase different DMI_BIOS_VENDOR = "Intel Corp.", for now we will
+	 * AMI BIOS with low memory corruption was found on Intel DG45ID and
+	 * DG45FC boards.
+	 * It has a different DMI_BIOS_VENDOR = "Intel Corp.", for now we will
 	 * match only DMI_BOARD_NAME and see if there is more bad products
 	 * with this vendor.
 	 */
+	{
 		.callback = dmi_low_memory_corruption,
 		.ident = "AMI BIOS",
 		.matches = {
 			DMI_MATCH(DMI_BOARD_NAME, "DG45ID"),
 		},
 	},
+	{
+		.callback = dmi_low_memory_corruption,
+		.ident = "AMI BIOS",
+		.matches = {
+			DMI_MATCH(DMI_BOARD_NAME, "DG45FC"),
+		},
+	},
+	/*
+	 * The Dell Inspiron Mini 1012 has DMI_BIOS_VENDOR = "Dell Inc.", so
+	 * match on the product name.
+	 */
+	{
+		.callback = dmi_low_memory_corruption,
+		.ident = "Phoenix BIOS",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 1012"),
+		},
+	},
 #endif
 	{}
 };
@@ -978,6 +999,8 @@
 	paging_init();
 	x86_init.paging.pagetable_setup_done(swapper_pg_dir);
 
+	setup_trampoline_page_table();
+
 	tboot_probe();
 
 #ifdef CONFIG_X86_64
@@ -1031,6 +1054,8 @@
 #endif
 #endif
 	x86_init.oem.banner();
+
+	mcheck_intel_therm_init();
 }
 
 #ifdef CONFIG_X86_32
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/microcode_amd.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/microcode_amd.c
@@ -63,7 +63,6 @@
 	unsigned int			mpb[0];
 };
 
-#define UCODE_MAX_SIZE			2048
 #define UCODE_CONTAINER_SECTION_HDR	8
 #define UCODE_CONTAINER_HEADER_SIZE	12
 
@@ -109,12 +108,8 @@
 		return 0;
 	}
 
-	if (mc_header->processor_rev_id != equiv_cpu_id) {
-		printk(KERN_ERR	"microcode: CPU%d: patch mismatch "
-		       "(processor_rev_id: %x, equiv_cpu_id: %x)\n",
-		       cpu, mc_header->processor_rev_id, equiv_cpu_id);
+	if (mc_header->processor_rev_id != equiv_cpu_id)
 		return 0;
-	}
 
 	/* ucode might be chipset specific -- currently we don't support this */
 	if (mc_header->nb_dev_id || mc_header->sb_dev_id) {
@@ -129,6 +124,37 @@
 	return 1;
 }
 
+static unsigned int verify_ucode_size(int cpu, const u8 *buf, unsigned int size)
+{
+	struct cpuinfo_x86 *c = &cpu_data(cpu);
+	unsigned int max_size, actual_size;
+
+#define F1XH_MPB_MAX_SIZE 2048
+#define F14H_MPB_MAX_SIZE 1824
+#define F15H_MPB_MAX_SIZE 4096
+
+	switch (c->x86) {
+	case 0x14:
+		max_size = F14H_MPB_MAX_SIZE;
+		break;
+	case 0x15:
+		max_size = F15H_MPB_MAX_SIZE;
+		break;
+	default:
+		max_size = F1XH_MPB_MAX_SIZE;
+		break;
+	}
+
+	actual_size = buf[4] + (buf[5] << 8);
+
+	if (actual_size > size || actual_size > max_size) {
+		pr_err("section size mismatch\n");
+		return 0;
+	}
+
+	return actual_size;
+}
+
 static int apply_microcode_amd(int cpu)
 {
 	u32 rev, dummy;
@@ -168,11 +194,11 @@
 }
 
 static void *
-get_next_ucode(const u8 *buf, unsigned int size, unsigned int *mc_size)
+get_next_ucode(int cpu, const u8 *buf, unsigned int size, unsigned int *mc_size)
 {
-	unsigned int total_size;
+	unsigned int actual_size = 0;
 	u8 section_hdr[UCODE_CONTAINER_SECTION_HDR];
-	void *mc;
+	void *mc = NULL;
 
 	if (get_ucode_data(section_hdr, buf, UCODE_CONTAINER_SECTION_HDR))
 		return NULL;
@@ -183,26 +209,18 @@
 		return NULL;
 	}
 
-	total_size = (unsigned long) (section_hdr[4] + (section_hdr[5] << 8));
-
-	printk(KERN_DEBUG "microcode: size %u, total_size %u\n",
-	       size, total_size);
+	actual_size = verify_ucode_size(cpu, buf, size);
+	if (!actual_size)
+		return NULL;
 
-	if (total_size > size || total_size > UCODE_MAX_SIZE) {
-		printk(KERN_ERR "microcode: error: size mismatch\n");
+	mc = vmalloc(actual_size);
+	if (!mc)
 		return NULL;
-	}
 
-	mc = vmalloc(UCODE_MAX_SIZE);
-	if (mc) {
-		memset(mc, 0, UCODE_MAX_SIZE);
-		if (get_ucode_data(mc, buf + UCODE_CONTAINER_SECTION_HDR,
-				   total_size)) {
-			vfree(mc);
-			mc = NULL;
-		} else
-			*mc_size = total_size + UCODE_CONTAINER_SECTION_HDR;
-	}
+	memset(mc, 0, actual_size);
+	get_ucode_data(mc, buf + UCODE_CONTAINER_SECTION_HDR, actual_size);
+	*mc_size = actual_size + UCODE_CONTAINER_SECTION_HDR;
+
 	return mc;
 }
 
@@ -271,7 +289,7 @@
 		unsigned int uninitialized_var(mc_size);
 		struct microcode_header_amd *mc_header;
 
-		mc = get_next_ucode(ucode_ptr, leftover, &mc_size);
+		mc = get_next_ucode(cpu, ucode_ptr, leftover, &mc_size);
 		if (!mc)
 			break;
 
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/tsc.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/tsc.c
@@ -104,10 +104,14 @@
 
 __setup("notsc", notsc_setup);
 
+static int no_sched_irq_time;
+
 static int __init tsc_setup(char *str)
 {
 	if (!strcmp(str, "reliable"))
 		tsc_clocksource_reliable = 1;
+	if (!strncmp(str, "noirqtime", 9))
+		no_sched_irq_time = 1;
 	return 1;
 }
 
@@ -626,6 +630,44 @@
 	local_irq_restore(flags);
 }
 
+static unsigned long long cyc2ns_suspend;
+
+void save_sched_clock_state(void)
+{
+	if (!sched_clock_stable)
+		return;
+
+	cyc2ns_suspend = sched_clock();
+}
+
+/*
+ * Even on processors with invariant TSC, TSC gets reset in some the
+ * ACPI system sleep states. And in some systems BIOS seem to reinit TSC to
+ * arbitrary value (still sync'd across cpu's) during resume from such sleep
+ * states. To cope up with this, recompute the cyc2ns_offset for each cpu so
+ * that sched_clock() continues from the point where it was left off during
+ * suspend.
+ */
+void restore_sched_clock_state(void)
+{
+	unsigned long long offset;
+	unsigned long flags;
+	int cpu;
+
+	if (!sched_clock_stable)
+		return;
+
+	local_irq_save(flags);
+
+	__get_cpu_var(cyc2ns_offset) = 0;
+	offset = cyc2ns_suspend - sched_clock();
+
+	for_each_possible_cpu(cpu)
+		per_cpu(cyc2ns_offset, cpu) = offset;
+
+	local_irq_restore(flags);
+}
+
 #ifdef CONFIG_CPU_FREQ
 
 /* Frequency scaling support. Adjust the TSC based timer when the cpu frequency
@@ -763,6 +805,8 @@
 {
 	if (!tsc_unstable) {
 		tsc_unstable = 1;
+		sched_clock_stable = 0;
+		disable_sched_clock_irqtime();
 		printk(KERN_INFO "Marking TSC unstable due to %s\n", reason);
 		/* Change only the rating, when not registered */
 		if (clocksource_tsc.mult)
@@ -951,6 +995,9 @@
 	/* now allow native_sched_clock() to use rdtsc */
 	tsc_disabled = 0;
 
+	if (!no_sched_irq_time)
+		enable_sched_clock_irqtime();
+
 	lpj = ((u64)tsc_khz * 1000);
 	do_div(lpj, HZ);
 	lpj_fine = lpj;
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/trampoline.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/trampoline.c
@@ -1,6 +1,7 @@
 #include <linux/io.h>
 
 #include <asm/trampoline.h>
+#include <asm/pgtable.h>
 #include <asm/e820.h>
 
 #if defined(CONFIG_X86_64) && defined(CONFIG_ACPI_SLEEP)
@@ -39,3 +40,19 @@
 	memcpy(trampoline_base, trampoline_data, TRAMPOLINE_SIZE);
 	return virt_to_phys(trampoline_base);
 }
+
+void __init setup_trampoline_page_table(void)
+{
+#ifdef CONFIG_X86_32
+	/* Copy kernel address range */
+	clone_pgd_range(trampoline_pg_dir + KERNEL_PGD_BOUNDARY,
+			swapper_pg_dir + KERNEL_PGD_BOUNDARY,
+			KERNEL_PGD_PTRS);
+
+	/* Initialize low mappings */
+	clone_pgd_range(trampoline_pg_dir,
+			swapper_pg_dir + KERNEL_PGD_BOUNDARY,
+			min_t(unsigned long, KERNEL_PGD_PTRS,
+			      KERNEL_PGD_BOUNDARY));
+#endif
+}
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/sys_x86_64.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/sys_x86_64.c
@@ -23,26 +23,11 @@
 		unsigned long, fd, unsigned long, off)
 {
 	long error;
-	struct file *file;
-
 	error = -EINVAL;
 	if (off & ~PAGE_MASK)
 		goto out;
 
-	error = -EBADF;
-	file = NULL;
-	flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-	if (!(flags & MAP_ANONYMOUS)) {
-		file = fget(fd);
-		if (!file)
-			goto out;
-	}
-	down_write(&current->mm->mmap_sem);
-	error = do_mmap_pgoff(file, addr, len, prot, flags, off >> PAGE_SHIFT);
-	up_write(&current->mm->mmap_sem);
-
-	if (file)
-		fput(file);
+	error = sys_mmap_pgoff(addr, len, prot, flags, fd, off >> PAGE_SHIFT);
 out:
 	return error;
 }
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/paravirt.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/paravirt.c
@@ -345,6 +345,9 @@
 	.read_tscp = native_read_tscp,
 	.load_tr_desc = native_load_tr_desc,
 	.set_ldt = native_set_ldt,
+#ifdef CONFIG_X86_32
+	.load_user_cs_desc = native_load_user_cs_desc,
+#endif /*CONFIG_X86_32*/
 	.load_gdt = native_load_gdt,
 	.load_idt = native_load_idt,
 	.store_gdt = native_store_gdt,
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/hpet.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/hpet.c
@@ -27,12 +27,17 @@
 #define HPET_DEV_FSB_CAP		0x1000
 #define HPET_DEV_PERI_CAP		0x2000
 
+#define HPET_MIN_CYCLES			128
+#define HPET_MIN_PROG_DELTA		(HPET_MIN_CYCLES + (HPET_MIN_CYCLES >> 1))
+
 #define EVT_TO_HPET_DEV(evt) container_of(evt, struct hpet_dev, evt)
 
 /*
  * HPET address is set in acpi/boot.c, when an ACPI entry exists
  */
 unsigned long				hpet_address;
+u8					hpet_msi_disable;
+
 #ifdef CONFIG_PCI_MSI
 static unsigned long			hpet_num_timers;
 #endif
@@ -296,8 +301,9 @@
 	/* Calculate the min / max delta */
 	hpet_clockevent.max_delta_ns = clockevent_delta2ns(0x7FFFFFFF,
 							   &hpet_clockevent);
-	/* 5 usec minimum reprogramming delta. */
-	hpet_clockevent.min_delta_ns = 5000;
+	/* Setup minimum reprogramming delta. */
+	hpet_clockevent.min_delta_ns = clockevent_delta2ns(HPET_MIN_PROG_DELTA,
+							   &hpet_clockevent);
 
 	/*
 	 * Start hpet with the boot cpu mask and make it
@@ -377,19 +383,37 @@
 			   struct clock_event_device *evt, int timer)
 {
 	u32 cnt;
+	s32 res;
 
 	cnt = hpet_readl(HPET_COUNTER);
 	cnt += (u32) delta;
 	hpet_writel(cnt, HPET_Tn_CMP(timer));
 
 	/*
-	 * We need to read back the CMP register to make sure that
-	 * what we wrote hit the chip before we compare it to the
-	 * counter.
+	 * HPETs are a complete disaster. The compare register is
+	 * based on a equal comparison and neither provides a less
+	 * than or equal functionality (which would require to take
+	 * the wraparound into account) nor a simple count down event
+	 * mode. Further the write to the comparator register is
+	 * delayed internally up to two HPET clock cycles in certain
+	 * chipsets (ATI, ICH9,10). Some newer AMD chipsets have even
+	 * longer delays. We worked around that by reading back the
+	 * compare register, but that required another workaround for
+	 * ICH9,10 chips where the first readout after write can
+	 * return the old stale value. We already had a minimum
+	 * programming delta of 5us enforced, but a NMI or SMI hitting
+	 * between the counter readout and the comparator write can
+	 * move us behind that point easily. Now instead of reading
+	 * the compare register back several times, we make the ETIME
+	 * decision based on the following: Return ETIME if the
+	 * counter value after the write is less than HPET_MIN_CYCLES
+	 * away from the event or if the counter is already ahead of
+	 * the event. The minimum programming delta for the generic
+	 * clockevents code is set to 1.5 * HPET_MIN_CYCLES.
 	 */
-	WARN_ON_ONCE((u32)hpet_readl(HPET_Tn_CMP(timer)) != cnt);
+	res = (s32)(cnt - (u32)hpet_readl(HPET_COUNTER));
 
-	return (s32)((u32)hpet_readl(HPET_COUNTER) - cnt) >= 0 ? -ETIME : 0;
+	return res < HPET_MIN_CYCLES ? -ETIME : 0;
 }
 
 static void hpet_legacy_set_mode(enum clock_event_mode mode,
@@ -478,7 +502,7 @@
 {
 	unsigned int irq;
 
-	irq = create_irq();
+	irq = create_irq_nr(0, -1);
 	if (!irq)
 		return -EINVAL;
 
@@ -584,6 +608,11 @@
 	unsigned int num_timers_used = 0;
 	int i;
 
+	if (hpet_msi_disable)
+		return;
+
+	if (boot_cpu_has(X86_FEATURE_ARAT))
+		return;
 	id = hpet_readl(HPET_ID);
 
 	num_timers = ((id & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT);
@@ -872,10 +901,8 @@
 
 	if (id & HPET_ID_LEGSUP) {
 		hpet_legacy_clockevent_register();
-		hpet_msi_capability_lookup(2);
 		return 1;
 	}
-	hpet_msi_capability_lookup(0);
 	return 0;
 
 out_nohpet:
@@ -908,9 +935,20 @@
 	if (!hpet_virt_address)
 		return -ENODEV;
 
+	if (hpet_readl(HPET_ID) & HPET_ID_LEGSUP)
+		hpet_msi_capability_lookup(2);
+	else
+		hpet_msi_capability_lookup(0);
+
 	hpet_reserve_platform_timers(hpet_readl(HPET_ID));
 	hpet_print_config();
 
+	if (hpet_msi_disable)
+		return 0;
+
+	if (boot_cpu_has(X86_FEATURE_ARAT))
+		return 0;
+
 	for_each_online_cpu(cpu) {
 		hpet_cpuhp_notify(NULL, CPU_ONLINE, (void *)(long)cpu);
 	}
@@ -924,7 +962,7 @@
 
 void hpet_disable(void)
 {
-	if (is_hpet_capable()) {
+	if (is_hpet_capable() && hpet_virt_address) {
 		unsigned long cfg = hpet_readl(HPET_CFG);
 
 		if (hpet_legacy_int_enabled) {
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/tboot.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/tboot.c
@@ -46,6 +46,7 @@
 
 /* Global pointer to shared data; NULL means no measured launch. */
 struct tboot *tboot __read_mostly;
+EXPORT_SYMBOL(tboot);
 
 /* timeout for APs (in secs) to enter wait-for-SIPI state during shutdown */
 #define AP_WAIT_TIMEOUT		1
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/process_32.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/process_32.c
@@ -296,15 +296,21 @@
 void
 start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
 {
+	int cpu;
+
 	set_user_gs(regs, 0);
 	regs->fs		= 0;
-	set_fs(USER_DS);
 	regs->ds		= __USER_DS;
 	regs->es		= __USER_DS;
 	regs->ss		= __USER_DS;
 	regs->cs		= __USER_CS;
 	regs->ip		= new_ip;
 	regs->sp		= new_sp;
+
+	cpu = get_cpu();
+	load_user_cs_desc(cpu, current->mm);
+	put_cpu();
+
 	/*
 	 * Free the old FP and other extended state
 	 */
@@ -359,6 +365,8 @@
 	preload_fpu = tsk_used_math(next_p) && next_p->fpu_counter > 5;
 
 	__unlazy_fpu(prev_p);
+	if (next_p->mm)
+		load_user_cs_desc(cpu, next_p->mm);
 
 	/* we're going to use this soon, after a few expensive things */
 	if (preload_fpu)
@@ -497,3 +505,40 @@
 	return 0;
 }
 
+static void modify_cs(struct mm_struct *mm, unsigned long limit)
+{
+	mm->context.exec_limit = limit;
+	set_user_cs(&mm->context.user_cs, limit);
+	if (mm == current->mm) {
+		int cpu;
+
+		cpu = get_cpu();
+		load_user_cs_desc(cpu, mm);
+		put_cpu();
+	}
+}
+
+void arch_add_exec_range(struct mm_struct *mm, unsigned long limit)
+{
+	if (limit > mm->context.exec_limit)
+		modify_cs(mm, limit);
+}
+
+void arch_remove_exec_range(struct mm_struct *mm, unsigned long old_end)
+{
+	struct vm_area_struct *vma;
+	unsigned long limit = PAGE_SIZE;
+
+	if (old_end == mm->context.exec_limit) {
+		for (vma = mm->mmap; vma; vma = vma->vm_next)
+			if ((vma->vm_flags & VM_EXEC) && (vma->vm_end > limit))
+				limit = vma->vm_end;
+		modify_cs(mm, limit);
+	}
+}
+
+void arch_flush_exec_range(struct mm_struct *mm)
+{
+	mm->context.exec_limit = 0;
+	set_user_cs(&mm->context.user_cs, 0);
+}
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/smpboot.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/smpboot.c
@@ -70,7 +70,6 @@
 
 #ifdef CONFIG_X86_32
 u8 apicid_2_node[MAX_APICID];
-static int low_mappings;
 #endif
 
 /* State of each CPU */
@@ -88,6 +87,25 @@
 static DEFINE_PER_CPU(struct task_struct *, idle_thread_array);
 #define get_idle_for_cpu(x)      (per_cpu(idle_thread_array, x))
 #define set_idle_for_cpu(x, p)   (per_cpu(idle_thread_array, x) = (p))
+
+/*
+ * We need this for trampoline_base protection from concurrent accesses when
+ * off- and onlining cores wildly.
+ */
+static DEFINE_MUTEX(x86_cpu_hotplug_driver_mutex);
+
+void cpu_hotplug_driver_lock()
+{
+        mutex_lock(&x86_cpu_hotplug_driver_mutex);
+}
+
+void cpu_hotplug_driver_unlock()
+{
+        mutex_unlock(&x86_cpu_hotplug_driver_mutex);
+}
+
+ssize_t arch_cpu_probe(const char *buf, size_t count) { return -1; }
+ssize_t arch_cpu_release(const char *buf, size_t count) { return -1; }
 #else
 static struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ;
 #define get_idle_for_cpu(x)      (idle_thread_array[(x)])
@@ -273,6 +291,18 @@
 	 * fragile that we want to limit the things done here to the
 	 * most necessary things.
 	 */
+
+#ifdef CONFIG_X86_32
+	/*
+	 * Switch away from the trampoline page-table
+	 *
+	 * Do this before cpu_init() because it needs to access per-cpu
+	 * data which may not be mapped in the trampoline page-table.
+	 */
+	load_cr3(swapper_pg_dir);
+	__flush_tlb_all();
+#endif
+
 	vmi_bringup();
 	cpu_init();
 	preempt_disable();
@@ -291,12 +321,6 @@
 		enable_8259A_irq(0);
 	}
 
-#ifdef CONFIG_X86_32
-	while (low_mappings)
-		cpu_relax();
-	__flush_tlb_all();
-#endif
-
 	/* This must be done before setting cpu_online_mask */
 	set_cpu_sibling_map(raw_smp_processor_id());
 	wmb();
@@ -722,6 +746,7 @@
 #ifdef CONFIG_X86_32
 	/* Stack for startup_32 can be just as for start_secondary onwards */
 	irq_ctx_init(cpu);
+	initial_page_table = __pa(&trampoline_pg_dir);
 #else
 	clear_tsk_thread_flag(c_idle.idle, TIF_FORK);
 	initial_gs = per_cpu_offset(cpu);
@@ -866,20 +891,8 @@
 
 	per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
 
-#ifdef CONFIG_X86_32
-	/* init low mem mapping */
-	clone_pgd_range(swapper_pg_dir, swapper_pg_dir + KERNEL_PGD_BOUNDARY,
-		min_t(unsigned long, KERNEL_PGD_PTRS, KERNEL_PGD_BOUNDARY));
-	flush_tlb_all();
-	low_mappings = 1;
-
 	err = do_boot_cpu(apicid, cpu);
 
-	zap_low_mappings(false);
-	low_mappings = 0;
-#else
-	err = do_boot_cpu(apicid, cpu);
-#endif
 	if (err) {
 		pr_debug("do_boot_cpu failed %d\n", err);
 		return -EIO;
@@ -1066,9 +1079,7 @@
 	set_cpu_sibling_map(0);
 
 	enable_IR_x2apic();
-#ifdef CONFIG_X86_64
 	default_setup_apic_routing();
-#endif
 
 	if (smp_sanity_check(max_cpus) < 0) {
 		printk(KERN_INFO "SMP disabled\n");
@@ -1327,11 +1338,94 @@
 	local_irq_disable();
 }
 
+#define MWAIT_SUBSTATE_MASK		0xf
+#define MWAIT_SUBSTATE_SIZE		4
+
+#define CPUID_MWAIT_LEAF		5
+#define CPUID5_ECX_EXTENSIONS_SUPPORTED 0x1
+
+/*
+ * We need to flush the caches before going to sleep, lest we have
+ * dirty data in our caches when we come back up.
+ */
+static inline void mwait_play_dead(void)
+{
+	unsigned int eax, ebx, ecx, edx;
+	unsigned int highest_cstate = 0;
+	unsigned int highest_subcstate = 0;
+	int i;
+	void *mwait_ptr;
+
+	if (!cpu_has(&current_cpu_data, X86_FEATURE_MWAIT))
+		return;
+	if (!cpu_has(&current_cpu_data, X86_FEATURE_CLFLSH))
+		return;
+	if (current_cpu_data.cpuid_level < CPUID_MWAIT_LEAF)
+		return;
+
+	eax = CPUID_MWAIT_LEAF;
+	ecx = 0;
+	native_cpuid(&eax, &ebx, &ecx, &edx);
+
+	/*
+	 * eax will be 0 if EDX enumeration is not valid.
+	 * Initialized below to cstate, sub_cstate value when EDX is valid.
+	 */
+	if (!(ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED)) {
+		eax = 0;
+	} else {
+		edx >>= MWAIT_SUBSTATE_SIZE;
+		for (i = 0; i < 7 && edx; i++, edx >>= MWAIT_SUBSTATE_SIZE) {
+			if (edx & MWAIT_SUBSTATE_MASK) {
+				highest_cstate = i;
+				highest_subcstate = edx & MWAIT_SUBSTATE_MASK;
+			}
+		}
+		eax = (highest_cstate << MWAIT_SUBSTATE_SIZE) |
+			(highest_subcstate - 1);
+	}
+
+	/*
+	 * This should be a memory location in a cache line which is
+	 * unlikely to be touched by other processors.  The actual
+	 * content is immaterial as it is not actually modified in any way.
+	 */
+	mwait_ptr = &current_thread_info()->flags;
+
+	wbinvd();
+
+	while (1) {
+		/*
+		 * The CLFLUSH is a workaround for erratum AAI65 for
+		 * the Xeon 7400 series.  It's not clear it is actually
+		 * needed, but it should be harmless in either case.
+		 * The WBINVD is insufficient due to the spurious-wakeup
+		 * case where we return around the loop.
+		 */
+		clflush(mwait_ptr);
+		__monitor(mwait_ptr, 0, 0);
+		mb();
+		__mwait(eax, 0);
+	}
+}
+
+static inline void hlt_play_dead(void)
+{
+	if (current_cpu_data.x86 >= 4)
+		wbinvd();
+
+	while (1) {
+		native_halt();
+	}
+}
+
 void native_play_dead(void)
 {
 	play_dead_common();
 	tboot_shutdown(TB_SHUTDOWN_WFS);
-	wbinvd_halt();
+
+	mwait_play_dead();	/* Only returns on failure */
+	hlt_play_dead();
 }
 
 #else /* ... !CONFIG_HOTPLUG_CPU */
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/cpuid.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/cpuid.c
@@ -192,7 +192,8 @@
 	int i, err = 0;
 	i = 0;
 
-	if (register_chrdev(CPUID_MAJOR, "cpu/cpuid", &cpuid_fops)) {
+	if (__register_chrdev(CPUID_MAJOR, 0, NR_CPUS,
+			      "cpu/cpuid", &cpuid_fops)) {
 		printk(KERN_ERR "cpuid: unable to get major %d for cpuid\n",
 		       CPUID_MAJOR);
 		err = -EBUSY;
@@ -221,7 +222,7 @@
 	}
 	class_destroy(cpuid_class);
 out_chrdev:
-	unregister_chrdev(CPUID_MAJOR, "cpu/cpuid");
+	__unregister_chrdev(CPUID_MAJOR, 0, NR_CPUS, "cpu/cpuid");
 out:
 	return err;
 }
@@ -233,7 +234,7 @@
 	for_each_online_cpu(cpu)
 		cpuid_device_destroy(cpu);
 	class_destroy(cpuid_class);
-	unregister_chrdev(CPUID_MAJOR, "cpu/cpuid");
+	__unregister_chrdev(CPUID_MAJOR, 0, NR_CPUS, "cpu/cpuid");
 	unregister_hotcpu_notifier(&cpuid_class_cpu_notifier);
 }
 
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/relocate_kernel_32.S
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/relocate_kernel_32.S
@@ -97,6 +97,8 @@
 	ret
 
 identity_mapped:
+	/* set return address to 0 if not preserving context */
+	pushl	$0
 	/* store the start address on the stack */
 	pushl   %edx
 
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/Makefile
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/Makefile
@@ -11,6 +11,8 @@
 CFLAGS_REMOVE_tsc.o = -pg
 CFLAGS_REMOVE_rtc.o = -pg
 CFLAGS_REMOVE_paravirt-spinlocks.o = -pg
+CFLAGS_REMOVE_pvclock.o = -pg
+CFLAGS_REMOVE_kvmclock.o = -pg
 CFLAGS_REMOVE_ftrace.o = -pg
 CFLAGS_REMOVE_early_printk.o = -pg
 endif
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/tlb_uv.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/tlb_uv.c
@@ -817,10 +817,8 @@
 	 */
 	apicid = blade_to_first_apicid(blade);
 	pa = uv_read_global_mmr64(pnode, UVH_BAU_DATA_CONFIG);
-	if ((pa & 0xff) != UV_BAU_MESSAGE) {
-		uv_write_global_mmr64(pnode, UVH_BAU_DATA_CONFIG,
+	uv_write_global_mmr64(pnode, UVH_BAU_DATA_CONFIG,
 				      ((apicid << 32) | UV_BAU_MESSAGE));
-	}
 	return 0;
 }
 
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/aperture_64.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/aperture_64.c
@@ -389,6 +389,7 @@
 	for (i = 0; i < ARRAY_SIZE(bus_dev_ranges); i++) {
 		int bus;
 		int dev_base, dev_limit;
+		u32 ctl;
 
 		bus = bus_dev_ranges[i].bus;
 		dev_base = bus_dev_ranges[i].dev_base;
@@ -401,7 +402,19 @@
 			iommu_detected = 1;
 			gart_iommu_aperture = 1;
 
-			aper_order = (read_pci_config(bus, slot, 3, AMD64_GARTAPERTURECTL) >> 1) & 7;
+			ctl = read_pci_config(bus, slot, 3,
+					      AMD64_GARTAPERTURECTL);
+
+			/*
+			 * Before we do anything else disable the GART. It may
+			 * still be enabled if we boot into a crash-kernel here.
+			 * Reconfiguring the GART while it is enabled could have
+			 * unknown side-effects.
+			 */
+			ctl &= ~GARTEN;
+			write_pci_config(bus, slot, 3, AMD64_GARTAPERTURECTL, ctl);
+
+			aper_order = (ctl >> 1) & 7;
 			aper_size = (32 * 1024 * 1024) << aper_order;
 			aper_base = read_pci_config(bus, slot, 3, AMD64_GARTAPERTUREBASE) & 0x7fff;
 			aper_base <<= 25;
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/amd_iommu_init.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/amd_iommu_init.c
@@ -136,6 +136,11 @@
 					   system */
 
 /*
+ * Set to true if ACPI table parsing and hardware intialization went properly
+ */
+static bool amd_iommu_initialized;
+
+/*
  * Pointer to the device table which is shared by all AMD IOMMUs
  * it is indexed by the PCI device id or the HT unit id and contains
  * information about the domain the device belongs to as well as the
@@ -617,6 +622,13 @@
 	iommu->last_device = calc_devid(MMIO_GET_BUS(range),
 					MMIO_GET_LD(range));
 	iommu->evt_msi_num = MMIO_MSI_NUM(misc);
+
+	if (is_rd890_iommu(iommu->dev)) {
+		pci_read_config_dword(iommu->dev, 0xf0, &iommu->cache_cfg[0]);
+		pci_read_config_dword(iommu->dev, 0xf4, &iommu->cache_cfg[1]);
+		pci_read_config_dword(iommu->dev, 0xf8, &iommu->cache_cfg[2]);
+		pci_read_config_dword(iommu->dev, 0xfc, &iommu->cache_cfg[3]);
+	}
 }
 
 /*
@@ -628,35 +640,15 @@
 {
 	u8 *p = (u8 *)h;
 	u8 *end = p, flags = 0;
-	u16 dev_i, devid = 0, devid_start = 0, devid_to = 0;
-	u32 ext_flags = 0;
+	u16 devid = 0, devid_start = 0, devid_to = 0;
+	u32 dev_i, ext_flags = 0;
 	bool alias = false;
 	struct ivhd_entry *e;
 
 	/*
-	 * First set the recommended feature enable bits from ACPI
-	 * into the IOMMU control registers
+	 * First save the recommended feature enable bits from ACPI
 	 */
-	h->flags & IVHD_FLAG_HT_TUN_EN_MASK ?
-		iommu_feature_enable(iommu, CONTROL_HT_TUN_EN) :
-		iommu_feature_disable(iommu, CONTROL_HT_TUN_EN);
-
-	h->flags & IVHD_FLAG_PASSPW_EN_MASK ?
-		iommu_feature_enable(iommu, CONTROL_PASSPW_EN) :
-		iommu_feature_disable(iommu, CONTROL_PASSPW_EN);
-
-	h->flags & IVHD_FLAG_RESPASSPW_EN_MASK ?
-		iommu_feature_enable(iommu, CONTROL_RESPASSPW_EN) :
-		iommu_feature_disable(iommu, CONTROL_RESPASSPW_EN);
-
-	h->flags & IVHD_FLAG_ISOC_EN_MASK ?
-		iommu_feature_enable(iommu, CONTROL_ISOC_EN) :
-		iommu_feature_disable(iommu, CONTROL_ISOC_EN);
-
-	/*
-	 * make IOMMU memory accesses cache coherent
-	 */
-	iommu_feature_enable(iommu, CONTROL_COHERENT_EN);
+	iommu->acpi_flags = h->flags;
 
 	/*
 	 * Done. Now parse the device entries
@@ -804,7 +796,7 @@
 /* Initializes the device->iommu mapping for the driver */
 static int __init init_iommu_devices(struct amd_iommu *iommu)
 {
-	u16 i;
+	u32 i;
 
 	for (i = iommu->first_device; i <= iommu->last_device; ++i)
 		set_iommu_for_device(iommu, i);
@@ -913,6 +905,8 @@
 	}
 	WARN_ON(p != end);
 
+	amd_iommu_initialized = true;
+
 	return 0;
 }
 
@@ -925,7 +919,7 @@
  *
  ****************************************************************************/
 
-static int __init iommu_setup_msi(struct amd_iommu *iommu)
+static int iommu_setup_msi(struct amd_iommu *iommu)
 {
 	int r;
 
@@ -1074,7 +1068,7 @@
  */
 static void init_device_table(void)
 {
-	u16 devid;
+	u32 devid;
 
 	for (devid = 0; devid <= amd_iommu_last_bdf; ++devid) {
 		set_dev_entry_bit(devid, DEV_ENTRY_VALID);
@@ -1082,6 +1076,40 @@
 	}
 }
 
+static void iommu_init_flags(struct amd_iommu *iommu)
+{
+	iommu->acpi_flags & IVHD_FLAG_HT_TUN_EN_MASK ?
+		iommu_feature_enable(iommu, CONTROL_HT_TUN_EN) :
+		iommu_feature_disable(iommu, CONTROL_HT_TUN_EN);
+
+	iommu->acpi_flags & IVHD_FLAG_PASSPW_EN_MASK ?
+		iommu_feature_enable(iommu, CONTROL_PASSPW_EN) :
+		iommu_feature_disable(iommu, CONTROL_PASSPW_EN);
+
+	iommu->acpi_flags & IVHD_FLAG_RESPASSPW_EN_MASK ?
+		iommu_feature_enable(iommu, CONTROL_RESPASSPW_EN) :
+		iommu_feature_disable(iommu, CONTROL_RESPASSPW_EN);
+
+	iommu->acpi_flags & IVHD_FLAG_ISOC_EN_MASK ?
+		iommu_feature_enable(iommu, CONTROL_ISOC_EN) :
+		iommu_feature_disable(iommu, CONTROL_ISOC_EN);
+
+	/*
+	 * make IOMMU memory accesses cache coherent
+	 */
+	iommu_feature_enable(iommu, CONTROL_COHERENT_EN);
+}
+
+static void iommu_apply_quirks(struct amd_iommu *iommu)
+{
+	if (is_rd890_iommu(iommu->dev)) {
+		pci_write_config_dword(iommu->dev, 0xf0, iommu->cache_cfg[0]);
+		pci_write_config_dword(iommu->dev, 0xf4, iommu->cache_cfg[1]);
+		pci_write_config_dword(iommu->dev, 0xf8, iommu->cache_cfg[2]);
+		pci_write_config_dword(iommu->dev, 0xfc, iommu->cache_cfg[3]);
+	}
+}
+
 /*
  * This function finally enables all IOMMUs found in the system after
  * they have been initialized
@@ -1092,6 +1120,8 @@
 
 	for_each_iommu(iommu) {
 		iommu_disable(iommu);
+		iommu_apply_quirks(iommu);
+		iommu_init_flags(iommu);
 		iommu_set_device_table(iommu);
 		iommu_enable_command_buffer(iommu);
 		iommu_enable_event_buffer(iommu);
@@ -1263,6 +1293,9 @@
 	if (acpi_table_parse("IVRS", init_iommu_all) != 0)
 		goto free;
 
+	if (!amd_iommu_initialized)
+		goto free;
+
 	if (acpi_table_parse("IVRS", init_memory_definitions) != 0)
 		goto free;
 
@@ -1274,14 +1307,17 @@
 	if (ret)
 		goto free;
 
+	enable_iommus();
+
 	if (iommu_pass_through)
 		ret = amd_iommu_init_passthrough();
 	else
 		ret = amd_iommu_init_dma_ops();
+
 	if (ret)
 		goto free;
 
-	enable_iommus();
+	amd_iommu_init_api();
 
 	if (iommu_pass_through)
 		goto out;
@@ -1301,6 +1337,8 @@
 	return ret;
 
 free:
+	disable_iommus();
+
 	free_pages((unsigned long)amd_iommu_pd_alloc_bitmap,
 		   get_order(MAX_DOMAIN_ID/8));
 
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/traps.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/traps.c
@@ -115,6 +115,67 @@
 	if (!user_mode_vm(regs))
 		die(str, regs, err);
 }
+
+static inline int
+__compare_user_cs_desc(const struct desc_struct *desc1,
+	const struct desc_struct *desc2)
+{
+	return ((desc1->limit0 != desc2->limit0) ||
+		(desc1->limit != desc2->limit) ||
+		(desc1->base0 != desc2->base0) ||
+		(desc1->base1 != desc2->base1) ||
+		(desc1->base2 != desc2->base2));
+}
+
+/*
+ * lazy-check for CS validity on exec-shield binaries:
+ *
+ * the original non-exec stack patch was written by
+ * Solar Designer <solar at openwall.com>. Thanks!
+ */
+static int
+check_lazy_exec_limit(int cpu, struct pt_regs *regs, long error_code)
+{
+	struct desc_struct *desc1, *desc2;
+	struct vm_area_struct *vma;
+	unsigned long limit;
+
+	if (current->mm == NULL)
+		return 0;
+
+	limit = -1UL;
+	if (current->mm->context.exec_limit != -1UL) {
+		limit = PAGE_SIZE;
+		spin_lock(&current->mm->page_table_lock);
+		for (vma = current->mm->mmap; vma; vma = vma->vm_next)
+			if ((vma->vm_flags & VM_EXEC) && (vma->vm_end > limit))
+				limit = vma->vm_end;
+		vma = get_gate_vma(current);
+		if (vma && (vma->vm_flags & VM_EXEC) && (vma->vm_end > limit))
+			limit = vma->vm_end;
+		spin_unlock(&current->mm->page_table_lock);
+		if (limit >= TASK_SIZE)
+			limit = -1UL;
+		current->mm->context.exec_limit = limit;
+	}
+	set_user_cs(&current->mm->context.user_cs, limit);
+
+	desc1 = &current->mm->context.user_cs;
+	desc2 = get_cpu_gdt_table(cpu) + GDT_ENTRY_DEFAULT_USER_CS;
+
+	if (__compare_user_cs_desc(desc1, desc2)) {
+		/*
+		 * The CS was not in sync - reload it and retry the
+		 * instruction. If the instruction still faults then
+		 * we won't hit this branch next time around.
+		 */
+		load_user_cs_desc(cpu, current->mm);
+
+		return 1;
+	}
+
+	return 0;
+}
 #endif
 
 static void __kprobes
@@ -273,6 +334,20 @@
 	if (!user_mode(regs))
 		goto gp_in_kernel;
 
+#ifdef CONFIG_X86_32
+{
+	int cpu;
+	int ok;
+
+	cpu = get_cpu();
+	ok = check_lazy_exec_limit(cpu, regs, error_code);
+	put_cpu();
+
+	if (ok)
+		return;
+}
+#endif
+
 	tsk->thread.error_code = error_code;
 	tsk->thread.trap_no = 13;
 
@@ -881,11 +956,29 @@
 }
 
 #ifdef CONFIG_X86_32
+/*
+ * The fixup code for errors in iret jumps to here (iret_exc). It loses
+ * the original trap number and erorr code. The bogus trap 32 and error
+ * code 0 are what the vanilla kernel delivers via:
+ * DO_ERROR_INFO(32, SIGSEGV, "iret exception", iret_error, ILL_BADSTK, 0, 1)
+ *
+ * NOTE: Because of the final "1" in the macro we need to enable interrupts.
+ *
+ * In case of a general protection fault in the iret instruction, we
+ * need to check for a lazy CS update for exec-shield.
+ */
 dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code)
 {
 	siginfo_t info;
+	int ok;
+	int cpu;
 	local_irq_enable();
 
+	cpu = get_cpu();
+	ok = check_lazy_exec_limit(cpu, regs, error_code);
+	put_cpu();
+	if (ok) return;
+
 	info.si_signo = SIGILL;
 	info.si_errno = 0;
 	info.si_code = ILL_BADSTK;
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/msr.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/msr.c
@@ -251,7 +251,7 @@
 	int i, err = 0;
 	i = 0;
 
-	if (register_chrdev(MSR_MAJOR, "cpu/msr", &msr_fops)) {
+	if (__register_chrdev(MSR_MAJOR, 0, NR_CPUS, "cpu/msr", &msr_fops)) {
 		printk(KERN_ERR "msr: unable to get major %d for msr\n",
 		       MSR_MAJOR);
 		err = -EBUSY;
@@ -279,7 +279,7 @@
 		msr_device_destroy(i);
 	class_destroy(msr_class);
 out_chrdev:
-	unregister_chrdev(MSR_MAJOR, "cpu/msr");
+	__unregister_chrdev(MSR_MAJOR, 0, NR_CPUS, "cpu/msr");
 out:
 	return err;
 }
@@ -290,7 +290,7 @@
 	for_each_online_cpu(cpu)
 		msr_device_destroy(cpu);
 	class_destroy(msr_class);
-	unregister_chrdev(MSR_MAJOR, "cpu/msr");
+	__unregister_chrdev(MSR_MAJOR, 0, NR_CPUS, "cpu/msr");
 	unregister_hotcpu_notifier(&msr_class_cpu_notifier);
 }
 
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/smp.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/smp.c
@@ -158,10 +158,10 @@
 	irq_exit();
 }
 
-static void native_smp_send_stop(void)
+static void native_stop_other_cpus(int wait)
 {
 	unsigned long flags;
-	unsigned long wait;
+	unsigned long timeout;
 
 	if (reboot_force)
 		return;
@@ -178,9 +178,12 @@
 	if (num_online_cpus() > 1) {
 		apic->send_IPI_allbutself(REBOOT_VECTOR);
 
-		/* Don't wait longer than a second */
-		wait = USEC_PER_SEC;
-		while (num_online_cpus() > 1 && wait--)
+		/*
+		 * Don't wait longer than a second if the caller
+		 * didn't ask us to wait.
+		 */
+		timeout = USEC_PER_SEC;
+		while (num_online_cpus() > 1 && (wait || timeout--))
 			udelay(1);
 	}
 
@@ -226,7 +229,7 @@
 	.smp_prepare_cpus	= native_smp_prepare_cpus,
 	.smp_cpus_done		= native_smp_cpus_done,
 
-	.smp_send_stop		= native_smp_send_stop,
+	.stop_other_cpus	= native_stop_other_cpus,
 	.smp_send_reschedule	= native_smp_send_reschedule,
 
 	.cpu_up			= native_cpu_up,
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/olpc.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/olpc.c
@@ -115,6 +115,7 @@
 	unsigned long flags;
 	int ret = -EIO;
 	int i;
+	int restarts = 0;
 
 	spin_lock_irqsave(&ec_lock, flags);
 
@@ -171,7 +172,9 @@
 			if (wait_on_obf(0x6c, 1)) {
 				printk(KERN_ERR "olpc-ec:  timeout waiting for"
 						" EC to provide data!\n");
-				goto restart;
+				if (restarts++ < 10)
+					goto restart;
+				goto err;
 			}
 			outbuf[i] = inb(0x68);
 			printk(KERN_DEBUG "olpc-ec:  received 0x%x\n",
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/quirks.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/quirks.c
@@ -491,6 +491,19 @@
 		break;
 	}
 }
+
+/*
+ * HPET MSI on some boards (ATI SB700/SB800) has side effect on
+ * floppy DMA. Disable HPET MSI on such platforms.
+ */
+static void force_disable_hpet_msi(struct pci_dev *unused)
+{
+	hpet_msi_disable = 1;
+}
+
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS,
+			 force_disable_hpet_msi);
+
 #endif
 
 #if defined(CONFIG_PCI) && defined(CONFIG_NUMA)
@@ -499,6 +512,7 @@
 {
 	struct pci_dev *nb_ht;
 	unsigned int devfn;
+	u32 node;
 	u32 val;
 
 	devfn = PCI_DEVFN(PCI_SLOT(dev->devfn), 0);
@@ -507,7 +521,13 @@
 		return;
 
 	pci_read_config_dword(nb_ht, 0x60, &val);
-	set_dev_node(&dev->dev, val & 7);
+	node = val & 7;
+	/*
+	 * Some hardware may return an invalid node ID,
+	 * so check it first:
+	 */
+	if (node_online(node))
+		set_dev_node(&dev->dev, node);
 	pci_dev_put(nb_ht);
 }
 
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/ptrace.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/ptrace.c
@@ -408,14 +408,14 @@
 {
 	if (kbuf) {
 		unsigned long *k = kbuf;
-		while (count > 0) {
+		while (count >= sizeof(*k)) {
 			*k++ = getreg(target, pos);
 			count -= sizeof(*k);
 			pos += sizeof(*k);
 		}
 	} else {
 		unsigned long __user *u = ubuf;
-		while (count > 0) {
+		while (count >= sizeof(*u)) {
 			if (__put_user(getreg(target, pos), u++))
 				return -EFAULT;
 			count -= sizeof(*u);
@@ -434,14 +434,14 @@
 	int ret = 0;
 	if (kbuf) {
 		const unsigned long *k = kbuf;
-		while (count > 0 && !ret) {
+		while (count >= sizeof(*k) && !ret) {
 			ret = putreg(target, pos, *k++);
 			count -= sizeof(*k);
 			pos += sizeof(*k);
 		}
 	} else {
 		const unsigned long  __user *u = ubuf;
-		while (count > 0 && !ret) {
+		while (count >= sizeof(*u) && !ret) {
 			unsigned long word;
 			ret = __get_user(word, u++);
 			if (ret)
@@ -1219,14 +1219,14 @@
 {
 	if (kbuf) {
 		compat_ulong_t *k = kbuf;
-		while (count > 0) {
+		while (count >= sizeof(*k)) {
 			getreg32(target, pos, k++);
 			count -= sizeof(*k);
 			pos += sizeof(*k);
 		}
 	} else {
 		compat_ulong_t __user *u = ubuf;
-		while (count > 0) {
+		while (count >= sizeof(*u)) {
 			compat_ulong_t word;
 			getreg32(target, pos, &word);
 			if (__put_user(word, u++))
@@ -1247,14 +1247,14 @@
 	int ret = 0;
 	if (kbuf) {
 		const compat_ulong_t *k = kbuf;
-		while (count > 0 && !ret) {
+		while (count >= sizeof(*k) && !ret) {
 			ret = putreg32(target, pos, *k++);
 			count -= sizeof(*k);
 			pos += sizeof(*k);
 		}
 	} else {
 		const compat_ulong_t __user *u = ubuf;
-		while (count > 0 && !ret) {
+		while (count >= sizeof(*u) && !ret) {
 			compat_ulong_t word;
 			ret = __get_user(word, u++);
 			if (ret)
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/amd_iommu.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/amd_iommu.c
@@ -540,11 +540,11 @@
 static void flush_devices_by_domain(struct protection_domain *domain)
 {
 	struct amd_iommu *iommu;
-	int i;
+	unsigned long i;
 
 	for (i = 0; i <= amd_iommu_last_bdf; ++i) {
 		if ((domain == NULL && amd_iommu_pd_table[i] == NULL) ||
-		    (amd_iommu_pd_table[i] != domain))
+		    (domain != NULL && amd_iommu_pd_table[i] != domain))
 			continue;
 
 		iommu = amd_iommu_rlookup_table[i];
@@ -1230,9 +1230,10 @@
 
 	/*
 	 * If we run in passthrough mode the device must be assigned to the
-	 * passthrough domain if it is detached from any other domain
+	 * passthrough domain if it is detached from any other domain.
+	 * Make sure we can deassign from the pt_domain itself.
 	 */
-	if (iommu_pass_through) {
+	if (iommu_pass_through && domain != pt_domain) {
 		struct amd_iommu *iommu = amd_iommu_rlookup_table[devid];
 		__attach_device(iommu, pt_domain, devid);
 	}
@@ -1687,6 +1688,7 @@
 			   size_t size,
 			   int dir)
 {
+	dma_addr_t flush_addr;
 	dma_addr_t i, start;
 	unsigned int pages;
 
@@ -1694,6 +1696,7 @@
 	    (dma_addr + size > dma_dom->aperture_size))
 		return;
 
+	flush_addr = dma_addr;
 	pages = iommu_num_pages(dma_addr, size, PAGE_SIZE);
 	dma_addr &= PAGE_MASK;
 	start = dma_addr;
@@ -1708,7 +1711,7 @@
 	dma_ops_free_addresses(dma_dom, dma_addr, pages);
 
 	if (amd_iommu_unmap_flush || dma_dom->need_flush) {
-		iommu_flush_pages(iommu, dma_dom->domain.id, dma_addr, size);
+		iommu_flush_pages(iommu, dma_dom->domain.id, flush_addr, size);
 		dma_dom->need_flush = false;
 	}
 }
@@ -2047,10 +2050,10 @@
 	struct pci_dev *dev = NULL;
 	struct dma_ops_domain *dma_dom;
 	struct amd_iommu *iommu;
-	u16 devid;
+	u16 devid, __devid;
 
 	while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
-		devid = calc_devid(dev->bus->number, dev->devfn);
+		__devid = devid = calc_devid(dev->bus->number, dev->devfn);
 		if (devid > amd_iommu_last_bdf)
 			continue;
 		devid = amd_iommu_alias_table[devid];
@@ -2065,6 +2068,10 @@
 		init_unity_mappings_for_device(dma_dom, devid);
 		dma_dom->target_dev = devid;
 
+		attach_device(iommu, &dma_dom->domain, devid);
+		if (__devid != devid)
+			attach_device(iommu, &dma_dom->domain, __devid);
+
 		list_add_tail(&dma_dom->list, &iommu_pd_list);
 	}
 }
@@ -2079,6 +2086,11 @@
 	.dma_supported = amd_iommu_dma_supported,
 };
 
+void __init amd_iommu_init_api(void)
+{
+	register_iommu(&amd_iommu_ops);
+}
+
 /*
  * The function which clues the AMD IOMMU driver into dma_ops.
  */
@@ -2120,8 +2132,6 @@
 	/* Make the driver finally visible to the drivers */
 	dma_ops = &amd_iommu_dma_ops;
 
-	register_iommu(&amd_iommu_ops);
-
 	bus_register_notifier(&pci_bus_type, &device_nb);
 
 	amd_iommu_stats_init();
@@ -2231,9 +2241,7 @@
 
 	free_pagetable(domain);
 
-	domain_id_free(domain->id);
-
-	kfree(domain);
+	protection_domain_free(domain);
 
 	dom->priv = NULL;
 }
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/k8.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/k8.c
@@ -121,3 +121,17 @@
 }
 EXPORT_SYMBOL_GPL(k8_flush_garts);
 
+static __init int init_k8_nbs(void)
+{
+	int err = 0;
+
+	err = cache_k8_northbridges();
+
+	if (err < 0)
+		printk(KERN_NOTICE "K8 NB: Cannot enumerate AMD northbridges.\n");
+
+	return err;
+}
+
+/* This has to go after the PCI subsystem */
+fs_initcall(init_k8_nbs);
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/sys_i386_32.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/sys_i386_32.c
@@ -24,31 +24,6 @@
 
 #include <asm/syscalls.h>
 
-asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
-			  unsigned long prot, unsigned long flags,
-			  unsigned long fd, unsigned long pgoff)
-{
-	int error = -EBADF;
-	struct file *file = NULL;
-	struct mm_struct *mm = current->mm;
-
-	flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-	if (!(flags & MAP_ANONYMOUS)) {
-		file = fget(fd);
-		if (!file)
-			goto out;
-	}
-
-	down_write(&mm->mmap_sem);
-	error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
-	up_write(&mm->mmap_sem);
-
-	if (file)
-		fput(file);
-out:
-	return error;
-}
-
 /*
  * Perform the select(nd, in, out, ex, tv) and mmap() system
  * calls. Linux/i386 didn't use to be able to handle more than
@@ -77,7 +52,7 @@
 	if (a.offset & ~PAGE_MASK)
 		goto out;
 
-	err = sys_mmap2(a.addr, a.len, a.prot, a.flags,
+	err = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags,
 			a.fd, a.offset >> PAGE_SHIFT);
 out:
 	return err;
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/entry_64.S
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/entry_64.S
@@ -1303,7 +1303,7 @@
 	decl PER_CPU_VAR(irq_count)
 	jmp  error_exit
 	CFI_ENDPROC
-END(do_hypervisor_callback)
+END(xen_do_hypervisor_callback)
 
 /*
  * Hypervisor uses this for application faults while it executes.
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/pvclock.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/pvclock.c
@@ -74,7 +74,8 @@
 static u64 pvclock_get_nsec_offset(struct pvclock_shadow_time *shadow)
 {
 	u64 delta = native_read_tsc() - shadow->tsc_timestamp;
-	return scale_delta(delta, shadow->tsc_to_nsec_mul, shadow->tsc_shift);
+	return pvclock_scale_delta(delta, shadow->tsc_to_nsec_mul,
+				   shadow->tsc_shift);
 }
 
 /*
@@ -109,11 +110,19 @@
 	return pv_tsc_khz;
 }
 
+static atomic64_t last_value = ATOMIC64_INIT(0);
+
+void pvclock_resume(void)
+{
+	atomic64_set(&last_value, 0);
+}
+
 cycle_t pvclock_clocksource_read(struct pvclock_vcpu_time_info *src)
 {
 	struct pvclock_shadow_time shadow;
 	unsigned version;
 	cycle_t ret, offset;
+	u64 last;
 
 	do {
 		version = pvclock_get_time_values(&shadow, src);
@@ -123,6 +132,27 @@
 		barrier();
 	} while (version != src->version);
 
+	/*
+	 * Assumption here is that last_value, a global accumulator, always goes
+	 * forward. If we are less than that, we should not be much smaller.
+	 * We assume there is an error marging we're inside, and then the correction
+	 * does not sacrifice accuracy.
+	 *
+	 * For reads: global may have changed between test and return,
+	 * but this means someone else updated poked the clock at a later time.
+	 * We just need to make sure we are not seeing a backwards event.
+	 *
+	 * For updates: last_value = ret is not enough, since two vcpus could be
+	 * updating at the same time, and one of them could be slightly behind,
+	 * making the assumption that last_value always go forward fail to hold.
+	 */
+	last = atomic64_read(&last_value);
+	do {
+		if (ret < last)
+			return last;
+		last = atomic64_cmpxchg(&last_value, last, ret);
+	} while (unlikely(last != ret));
+
 	return ret;
 }
 
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/crash_dump_64.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/crash_dump_64.c
@@ -34,7 +34,7 @@
 	if (!csize)
 		return 0;
 
-	vaddr = ioremap(pfn << PAGE_SHIFT, PAGE_SIZE);
+	vaddr = ioremap_cache(pfn << PAGE_SHIFT, PAGE_SIZE);
 	if (!vaddr)
 		return -ENOMEM;
 
@@ -46,6 +46,7 @@
 	} else
 		memcpy(buf, vaddr + offset, csize);
 
+	set_iounmap_nonlazy();
 	iounmap(vaddr);
 	return csize;
 }
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/relocate_kernel_64.S
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/relocate_kernel_64.S
@@ -100,6 +100,8 @@
 	ret
 
 identity_mapped:
+	/* set return address to 0 if not preserving context */
+	pushq	$0
 	/* store the start address on the stack */
 	pushq   %rdx
 
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/syscall_table_32.S
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/syscall_table_32.S
@@ -191,7 +191,7 @@
 	.long sys_ni_syscall	/* reserved for streams2 */
 	.long ptregs_vfork	/* 190 */
 	.long sys_getrlimit
-	.long sys_mmap2
+	.long sys_mmap_pgoff
 	.long sys_truncate64
 	.long sys_ftruncate64
 	.long sys_stat64	/* 195 */
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/crash.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/crash.c
@@ -27,7 +27,6 @@
 #include <asm/cpu.h>
 #include <asm/reboot.h>
 #include <asm/virtext.h>
-#include <asm/iommu.h>
 
 
 #if defined(CONFIG_SMP) && defined(CONFIG_X86_LOCAL_APIC)
@@ -104,10 +103,5 @@
 #ifdef CONFIG_HPET_TIMER
 	hpet_disable();
 #endif
-
-#ifdef CONFIG_X86_64
-	pci_iommu_shutdown();
-#endif
-
 	crash_save_cpu(regs, safe_smp_processor_id());
 }
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/process.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/process.c
@@ -91,18 +91,6 @@
 {
 	struct task_struct *tsk = current;
 
-#ifdef CONFIG_X86_64
-	if (test_tsk_thread_flag(tsk, TIF_ABI_PENDING)) {
-		clear_tsk_thread_flag(tsk, TIF_ABI_PENDING);
-		if (test_tsk_thread_flag(tsk, TIF_IA32)) {
-			clear_tsk_thread_flag(tsk, TIF_IA32);
-		} else {
-			set_tsk_thread_flag(tsk, TIF_IA32);
-			current_thread_info()->status |= TS_COMPAT;
-		}
-	}
-#endif
-
 	clear_tsk_thread_flag(tsk, TIF_DEBUG);
 
 	tsk->thread.debugreg0 = 0;
@@ -450,24 +438,6 @@
 	return (edx & MWAIT_EDX_C1);
 }
 
-/*
- * Check for AMD CPUs, which have potentially C1E support
- */
-static int __cpuinit check_c1e_idle(const struct cpuinfo_x86 *c)
-{
-	if (c->x86_vendor != X86_VENDOR_AMD)
-		return 0;
-
-	if (c->x86 < 0x0F)
-		return 0;
-
-	/* Family 0x0f models < rev F do not have C1E */
-	if (c->x86 == 0x0f && c->x86_model < 0x40)
-		return 0;
-
-	return 1;
-}
-
 static cpumask_var_t c1e_mask;
 static int c1e_detected;
 
@@ -545,7 +515,8 @@
 		 */
 		printk(KERN_INFO "using mwait in idle threads.\n");
 		pm_idle = mwait_idle;
-	} else if (check_c1e_idle(c)) {
+	} else if (cpu_has_amd_erratum(amd_erratum_400)) {
+		/* E400: APIC timer interrupt does not wake up CPU from C1e */
 		printk(KERN_INFO "using C1E aware idle routine\n");
 		pm_idle = c1e_idle;
 	} else
@@ -607,6 +578,16 @@
 unsigned long arch_randomize_brk(struct mm_struct *mm)
 {
 	unsigned long range_end = mm->brk + 0x02000000;
-	return randomize_range(mm->brk, range_end, 0) ? : mm->brk;
+	unsigned long bump = 0;
+#ifdef CONFIG_X86_32
+	/* in the case of NX emulation, shove the brk segment way out of the
+           way of the exec randomization area, since it can collide with
+	   future allocations if not. */
+	if ( (mm->get_unmapped_exec_area == arch_get_unmapped_exec_area) &&
+	     (mm->brk < 0x08000000) ) {
+		bump = (TASK_SIZE/6);
+	}
+#endif
+	return bump + (randomize_range(mm->brk, range_end, 0) ? : mm->brk);
 }
 
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/e820.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/e820.c
@@ -79,7 +79,7 @@
  * Note: this function only works correct if the e820 table is sorted and
  * not-overlapping, which is the case
  */
-int __init e820_all_mapped(u64 start, u64 end, unsigned type)
+int e820_all_mapped(u64 start, u64 end, unsigned type)
 {
 	int i;
 
@@ -106,6 +106,7 @@
 	}
 	return 0;
 }
+EXPORT_SYMBOL_GPL(e820_all_mapped);
 
 /*
  * Add a memory region to the kernel e820 map.
@@ -1236,15 +1237,21 @@
 	if (!p)
 		return -EINVAL;
 
-#ifdef CONFIG_X86_32
 	if (!strcmp(p, "nopentium")) {
+#ifdef CONFIG_X86_32
 		setup_clear_cpu_cap(X86_FEATURE_PSE);
 		return 0;
-	}
+#else
+		printk(KERN_WARNING "mem=nopentium ignored! (only supported on x86_32)\n");
+		return -EINVAL;
 #endif
+	}
 
 	userdef = 1;
 	mem_size = memparse(p, &p);
+	/* don't remove all of memory when handling "mem={invalid}" param */
+	if (mem_size == 0)
+		return -EINVAL;
 	e820_remove_range(mem_size, ULLONG_MAX - mem_size, E820_RAM, 1);
 
 	return 0;
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/pci-gart_64.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/pci-gart_64.c
@@ -553,6 +553,9 @@
 
 		enable_gart_translation(dev, __pa(agp_gatt_table));
 	}
+
+	/* Flush the GART-TLB to remove stale entries */
+	k8_flush_garts();
 }
 
 /*
@@ -717,7 +720,7 @@
 	unsigned long scratch;
 	long i;
 
-	if (cache_k8_northbridges() < 0 || num_k8_northbridges == 0)
+	if (num_k8_northbridges == 0)
 		return;
 
 #ifndef CONFIG_AGP_AMD64
@@ -856,7 +859,7 @@
 #endif
 	if (isdigit(*p) && get_option(&p, &arg))
 		iommu_size = arg;
-	if (!strncmp(p, "fullflush", 8))
+	if (!strncmp(p, "fullflush", 9))
 		iommu_fullflush = 1;
 	if (!strncmp(p, "nofullflush", 11))
 		iommu_fullflush = 0;
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/vsyscall_64.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/vsyscall_64.c
@@ -73,7 +73,8 @@
 	write_sequnlock_irqrestore(&vsyscall_gtod_data.lock, flags);
 }
 
-void update_vsyscall(struct timespec *wall_time, struct clocksource *clock)
+void update_vsyscall(struct timespec *wall_time, struct clocksource *clock,
+		     u32 mult)
 {
 	unsigned long flags;
 
@@ -82,7 +83,7 @@
 	vsyscall_gtod_data.clock.vread = clock->vread;
 	vsyscall_gtod_data.clock.cycle_last = clock->cycle_last;
 	vsyscall_gtod_data.clock.mask = clock->mask;
-	vsyscall_gtod_data.clock.mult = clock->mult;
+	vsyscall_gtod_data.clock.mult = mult;
 	vsyscall_gtod_data.clock.shift = clock->shift;
 	vsyscall_gtod_data.wall_time_sec = wall_time->tv_sec;
 	vsyscall_gtod_data.wall_time_nsec = wall_time->tv_nsec;
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/pci-dma.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/pci-dma.c
@@ -214,7 +214,7 @@
 		if (!strncmp(p, "allowdac", 8))
 			forbid_dac = 0;
 		if (!strncmp(p, "nodac", 5))
-			forbid_dac = -1;
+			forbid_dac = 1;
 		if (!strncmp(p, "usedac", 6)) {
 			forbid_dac = -1;
 			return 1;
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/apic/probe_32.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/apic/probe_32.c
@@ -54,6 +54,31 @@
 
 void default_setup_apic_routing(void)
 {
+	int version = apic_version[boot_cpu_physical_apicid];
+
+	if (num_possible_cpus() > 8) {
+		switch (boot_cpu_data.x86_vendor) {
+		case X86_VENDOR_INTEL:
+			if (!APIC_XAPIC(version)) {
+				def_to_bigsmp = 0;
+				break;
+			}
+			/* If P4 and above fall through */
+		case X86_VENDOR_AMD:
+			def_to_bigsmp = 1;
+		}
+	}
+
+#ifdef CONFIG_X86_BIGSMP
+	generic_bigsmp_probe();
+#endif
+
+	if (apic->setup_apic_routing)
+		apic->setup_apic_routing();
+}
+
+void setup_apic_flat_routing(void)
+{
 #ifdef CONFIG_X86_IO_APIC
 	printk(KERN_INFO
 		"Enabling APIC mode:  Flat.  Using %d I/O APICs\n",
@@ -103,7 +128,7 @@
 	.init_apic_ldr			= default_init_apic_ldr,
 
 	.ioapic_phys_id_map		= default_ioapic_phys_id_map,
-	.setup_apic_routing		= default_setup_apic_routing,
+	.setup_apic_routing		= setup_apic_flat_routing,
 	.multi_timer_check		= NULL,
 	.apicid_to_node			= default_apicid_to_node,
 	.cpu_to_logical_apicid		= default_cpu_to_logical_apicid,
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/apic/apic.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/apic/apic.c
@@ -51,6 +51,7 @@
 #include <asm/smp.h>
 #include <asm/mce.h>
 #include <asm/kvm_para.h>
+#include <asm/tsc.h>
 
 unsigned int num_processors;
 
@@ -246,7 +247,7 @@
  */
 static void native_apic_write_dummy(u32 reg, u32 v)
 {
-	WARN_ON_ONCE((cpu_has_apic || !disable_apic));
+	WARN_ON_ONCE(cpu_has_apic && !disable_apic);
 }
 
 static u32 native_apic_read_dummy(u32 reg)
@@ -941,7 +942,7 @@
 	unsigned int value;
 
 	/* APIC hasn't been mapped yet */
-	if (!apic_phys)
+	if (!x2apic_mode && !apic_phys)
 		return;
 
 	clear_local_APIC();
@@ -1172,8 +1173,13 @@
  */
 void __cpuinit setup_local_APIC(void)
 {
-	unsigned int value;
-	int i, j;
+	unsigned int value, queued;
+	int i, j, acked = 0;
+	unsigned long long tsc = 0, ntsc;
+	long long max_loops = cpu_khz;
+
+	if (cpu_has_tsc)
+		rdtscll(tsc);
 
 	if (disable_apic) {
 		arch_disable_smp_support();
@@ -1225,13 +1231,32 @@
 	 * the interrupt. Hence a vector might get locked. It was noticed
 	 * for timer irq (vector 0x31). Issue an extra EOI to clear ISR.
 	 */
-	for (i = APIC_ISR_NR - 1; i >= 0; i--) {
-		value = apic_read(APIC_ISR + i*0x10);
-		for (j = 31; j >= 0; j--) {
-			if (value & (1<<j))
-				ack_APIC_irq();
+	do {
+		queued = 0;
+		for (i = APIC_ISR_NR - 1; i >= 0; i--)
+			queued |= apic_read(APIC_IRR + i*0x10);
+
+		for (i = APIC_ISR_NR - 1; i >= 0; i--) {
+			value = apic_read(APIC_ISR + i*0x10);
+			for (j = 31; j >= 0; j--) {
+				if (value & (1<<j)) {
+					ack_APIC_irq();
+					acked++;
+				}
+			}
 		}
-	}
+		if (acked > 256) {
+			printk(KERN_ERR "LAPIC pending interrupts after %d EOI\n",
+			       acked);
+			break;
+		}
+		if (cpu_has_tsc) {
+			rdtscll(ntsc);
+			max_loops = (cpu_khz << 10) - (ntsc - tsc);
+		} else
+			max_loops--;
+	} while (queued && max_loops > 0);
+	WARN_ON(max_loops <= 0);
 
 	/*
 	 * Now that we are all set up, enable the APIC
@@ -1336,6 +1361,14 @@
 
 	setup_apic_nmi_watchdog(NULL);
 	apic_pm_activate();
+
+	/*
+	 * Now that local APIC setup is completed for BP, configure the fault
+	 * handling for interrupt remapping.
+	 */
+	if (!smp_processor_id() && intr_remapping_enabled)
+		enable_drhd_fault_handling();
+
 }
 
 #ifdef CONFIG_X86_X2APIC
@@ -1664,8 +1697,8 @@
 	}
 #endif
 
+#ifndef CONFIG_SMP
 	enable_IR_x2apic();
-#ifdef CONFIG_X86_64
 	default_setup_apic_routing();
 #endif
 
@@ -1915,18 +1948,6 @@
 	if (apicid > max_physical_apicid)
 		max_physical_apicid = apicid;
 
-#ifdef CONFIG_X86_32
-	switch (boot_cpu_data.x86_vendor) {
-	case X86_VENDOR_INTEL:
-		if (num_processors > 8)
-			def_to_bigsmp = 1;
-		break;
-	case X86_VENDOR_AMD:
-		if (max_physical_apicid >= 8)
-			def_to_bigsmp = 1;
-	}
-#endif
-
 #if defined(CONFIG_SMP) || defined(CONFIG_X86_64)
 	early_per_cpu(x86_cpu_to_apicid, cpu) = apicid;
 	early_per_cpu(x86_bios_cpu_apicid, cpu) = apicid;
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/apic/io_apic.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/apic/io_apic.c
@@ -332,14 +332,19 @@
 
 	old_cfg = old_desc->chip_data;
 
-	memcpy(cfg, old_cfg, sizeof(struct irq_cfg));
+	cfg->vector = old_cfg->vector;
+	cfg->move_in_progress = old_cfg->move_in_progress;
+	cpumask_copy(cfg->domain, old_cfg->domain);
+	cpumask_copy(cfg->old_domain, old_cfg->old_domain);
 
 	init_copy_irq_2_pin(old_cfg, cfg, node);
 }
 
-static void free_irq_cfg(struct irq_cfg *old_cfg)
+static void free_irq_cfg(struct irq_cfg *cfg)
 {
-	kfree(old_cfg);
+	free_cpumask_var(cfg->domain);
+	free_cpumask_var(cfg->old_domain);
+	kfree(cfg);
 }
 
 void arch_free_chip_data(struct irq_desc *old_desc, struct irq_desc *desc)
@@ -1405,6 +1410,7 @@
 		irte.dlvry_mode = apic->irq_delivery_mode;
 		irte.vector = vector;
 		irte.dest_id = IRTE_DEST(destination);
+		irte.redir_hint = 1;
 
 		/* Set source-id of interrupt request */
 		set_ioapic_sid(&irte, apic_id);
@@ -1484,7 +1490,7 @@
 
 static void __init setup_IO_APIC_irqs(void)
 {
-	int apic_id = 0, pin, idx, irq;
+	int apic_id, pin, idx, irq;
 	int notcon = 0;
 	struct irq_desc *desc;
 	struct irq_cfg *cfg;
@@ -1492,14 +1498,7 @@
 
 	apic_printk(APIC_VERBOSE, KERN_DEBUG "init IO_APIC IRQs\n");
 
-#ifdef CONFIG_ACPI
-	if (!acpi_disabled && acpi_ioapic) {
-		apic_id = mp_find_ioapic(0);
-		if (apic_id < 0)
-			apic_id = 0;
-	}
-#endif
-
+	for (apic_id = 0; apic_id < nr_ioapics; apic_id++)
 	for (pin = 0; pin < nr_ioapic_registers[apic_id]; pin++) {
 		idx = find_irq_entry(apic_id, pin, mp_INT);
 		if (idx == -1) {
@@ -1521,6 +1520,9 @@
 
 		irq = pin_2_irq(idx, apic_id, pin);
 
+		if ((apic_id > 0) && (irq > 16))
+			continue;
+
 		/*
 		 * Skip the timer IRQ if there's a quirk handler
 		 * installed and if it returns 1:
@@ -1550,6 +1552,56 @@
 }
 
 /*
+ * for the gsit that is not in first ioapic
+ * but could not use acpi_register_gsi()
+ * like some special sci in IBM x3330
+ */
+void setup_IO_APIC_irq_extra(u32 gsi)
+{
+	int apic_id = 0, pin, idx, irq;
+	int node = cpu_to_node(boot_cpu_id);
+	struct irq_desc *desc;
+	struct irq_cfg *cfg;
+
+	/*
+	 * Convert 'gsi' to 'ioapic.pin'.
+	 */
+	apic_id = mp_find_ioapic(gsi);
+	if (apic_id < 0)
+		return;
+
+	pin = mp_find_ioapic_pin(apic_id, gsi);
+	idx = find_irq_entry(apic_id, pin, mp_INT);
+	if (idx == -1)
+		return;
+
+	irq = pin_2_irq(idx, apic_id, pin);
+#ifdef CONFIG_SPARSE_IRQ
+	desc = irq_to_desc(irq);
+	if (desc)
+		return;
+#endif
+	desc = irq_to_desc_alloc_node(irq, node);
+	if (!desc) {
+		printk(KERN_INFO "can not get irq_desc for %d\n", irq);
+		return;
+	}
+
+	cfg = desc->chip_data;
+	add_pin_to_irq_node(cfg, node, apic_id, pin);
+
+	if (test_bit(pin, mp_ioapic_routing[apic_id].pin_programmed)) {
+		pr_debug("Pin %d-%d already programmed\n",
+			 mp_ioapics[apic_id].apicid, pin);
+		return;
+	}
+	set_bit(pin, mp_ioapic_routing[apic_id].pin_programmed);
+
+	setup_IO_APIC_irq(apic_id, pin, irq, desc,
+			irq_trigger(idx), irq_polarity(idx));
+}
+
+/*
  * Set up the timer pin, possibly with the 8259A-master behind.
  */
 static void __init setup_timer_IRQ0_pin(unsigned int apic_id, unsigned int pin,
@@ -1690,6 +1742,8 @@
 		struct irq_pin_list *entry;
 
 		cfg = desc->chip_data;
+		if (!cfg)
+			continue;
 		entry = cfg->irq_2_pin;
 		if (!entry)
 			continue;
@@ -3157,6 +3211,7 @@
 			continue;
 
 		desc_new = move_irq_desc(desc_new, node);
+		cfg_new = desc_new->chip_data;
 
 		if (__assign_irq_vector(new, cfg_new, apic->target_cpus()) == 0)
 			irq = new;
@@ -3164,12 +3219,9 @@
 	}
 	spin_unlock_irqrestore(&vector_lock, flags);
 
-	if (irq > 0) {
-		dynamic_irq_init(irq);
-		/* restore it, in case dynamic_irq_init clear it */
-		if (desc_new)
-			desc_new->chip_data = cfg_new;
-	}
+	if (irq > 0)
+		dynamic_irq_init_keep_chip_data(irq);
+
 	return irq;
 }
 
@@ -3192,17 +3244,12 @@
 {
 	unsigned long flags;
 	struct irq_cfg *cfg;
-	struct irq_desc *desc;
 
-	/* store it, in case dynamic_irq_cleanup clear it */
-	desc = irq_to_desc(irq);
-	cfg = desc->chip_data;
-	dynamic_irq_cleanup(irq);
-	/* connect back irq_cfg */
-	desc->chip_data = cfg;
+	dynamic_irq_cleanup_keep_chip_data(irq);
 
 	free_irte(irq);
 	spin_lock_irqsave(&vector_lock, flags);
+	cfg = irq_to_desc(irq)->chip_data;
 	__clear_irq_vector(irq, cfg);
 	spin_unlock_irqrestore(&vector_lock, flags);
 }
@@ -3243,6 +3290,7 @@
 		irte.dlvry_mode = apic->irq_delivery_mode;
 		irte.vector = cfg->vector;
 		irte.dest_id = IRTE_DEST(dest);
+		irte.redir_hint = 1;
 
 		/* Set source-id of interrupt request */
 		set_msi_sid(&irte, pdev);
@@ -3297,7 +3345,7 @@
 
 	cfg = desc->chip_data;
 
-	read_msi_msg_desc(desc, &msg);
+	get_cached_msi_msg_desc(desc, &msg);
 
 	msg.data &= ~MSI_DATA_VECTOR_MASK;
 	msg.data |= MSI_DATA_VECTOR(cfg->vector);
@@ -3519,6 +3567,7 @@
 	msg.data |= MSI_DATA_VECTOR(cfg->vector);
 	msg.address_lo &= ~MSI_ADDR_DEST_ID_MASK;
 	msg.address_lo |= MSI_ADDR_DEST_ID(dest);
+	msg.address_hi = MSI_ADDR_BASE_HI | MSI_ADDR_EXT_DEST_ID(dest);
 
 	dmar_msi_write(irq, &msg);
 
@@ -4040,27 +4089,23 @@
 #ifdef CONFIG_SMP
 void __init setup_ioapic_dest(void)
 {
-	int pin, ioapic = 0, irq, irq_entry;
+	int pin, ioapic, irq, irq_entry;
 	struct irq_desc *desc;
 	const struct cpumask *mask;
 
 	if (skip_ioapic_setup == 1)
 		return;
 
-#ifdef CONFIG_ACPI
-	if (!acpi_disabled && acpi_ioapic) {
-		ioapic = mp_find_ioapic(0);
-		if (ioapic < 0)
-			ioapic = 0;
-	}
-#endif
-
+	for (ioapic = 0; ioapic < nr_ioapics; ioapic++)
 	for (pin = 0; pin < nr_ioapic_registers[ioapic]; pin++) {
 		irq_entry = find_irq_entry(ioapic, pin, mp_INT);
 		if (irq_entry == -1)
 			continue;
 		irq = pin_2_irq(irq_entry, ioapic, pin);
 
+		if ((ioapic > 0) && (irq > 16))
+			continue;
+
 		desc = irq_to_desc(irq);
 
 		/*
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/apic/x2apic_uv_x.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -364,13 +364,13 @@
 
 enum map_type {map_wb, map_uc};
 
-static __init void map_high(char *id, unsigned long base, int shift,
-			    int max_pnode, enum map_type map_type)
+static __init void map_high(char *id, unsigned long base, int pshift,
+			int bshift, int max_pnode, enum map_type map_type)
 {
 	unsigned long bytes, paddr;
 
-	paddr = base << shift;
-	bytes = (1UL << shift) * (max_pnode + 1);
+	paddr = base << pshift;
+	bytes = (1UL << bshift) * (max_pnode + 1);
 	printk(KERN_INFO "UV: Map %s_HI 0x%lx - 0x%lx\n", id, paddr,
 						paddr + bytes);
 	if (map_type == map_uc)
@@ -386,7 +386,7 @@
 
 	gru.v = uv_read_local_mmr(UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR);
 	if (gru.s.enable)
-		map_high("GRU", gru.s.base, shift, max_pnode, map_wb);
+		map_high("GRU", gru.s.base, shift, shift, max_pnode, map_wb);
 }
 
 static __init void map_mmr_high(int max_pnode)
@@ -396,7 +396,7 @@
 
 	mmr.v = uv_read_local_mmr(UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR);
 	if (mmr.s.enable)
-		map_high("MMR", mmr.s.base, shift, max_pnode, map_uc);
+		map_high("MMR", mmr.s.base, shift, shift, max_pnode, map_uc);
 }
 
 static __init void map_mmioh_high(int max_pnode)
@@ -406,7 +406,8 @@
 
 	mmioh.v = uv_read_local_mmr(UVH_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR);
 	if (mmioh.s.enable)
-		map_high("MMIOH", mmioh.s.base, shift, max_pnode, map_uc);
+		map_high("MMIOH", mmioh.s.base, shift, mmioh.s.m_io,
+			max_pnode, map_uc);
 }
 
 static __init void uv_rtc_init(void)
@@ -594,9 +595,11 @@
 		for (j = 0; j < 64; j++) {
 			if (!test_bit(j, &present))
 				continue;
-			uv_blade_info[blade].pnode = (i * 64 + j);
+			pnode = (i * 64 + j);
+			uv_blade_info[blade].pnode = pnode;
 			uv_blade_info[blade].nr_possible_cpus = 0;
 			uv_blade_info[blade].nr_online_cpus = 0;
+			max_pnode = max(pnode, max_pnode);
 			blade++;
 		}
 	}
@@ -607,8 +610,10 @@
 	uv_rtc_init();
 
 	for_each_present_cpu(cpu) {
+		int apicid = per_cpu(x86_cpu_to_apicid, cpu);
+
 		nid = cpu_to_node(cpu);
-		pnode = uv_apicid_to_pnode(per_cpu(x86_cpu_to_apicid, cpu));
+		pnode = uv_apicid_to_pnode(apicid);
 		blade = boot_pnode_to_blade(pnode);
 		lcpu = uv_blade_info[blade].nr_possible_cpus;
 		uv_blade_info[blade].nr_possible_cpus++;
@@ -629,15 +634,9 @@
 		uv_cpu_hub_info(cpu)->gnode_extra = gnode_extra;
 		uv_cpu_hub_info(cpu)->global_mmr_base = mmr_base;
 		uv_cpu_hub_info(cpu)->coherency_domain_number = sn_coherency_id;
-		uv_cpu_hub_info(cpu)->scir.offset = SCIR_LOCAL_MMR_BASE + lcpu;
+		uv_cpu_hub_info(cpu)->scir.offset = uv_scir_offset(apicid);
 		uv_node_to_blade[nid] = blade;
 		uv_cpu_to_blade[cpu] = blade;
-		max_pnode = max(pnode, max_pnode);
-
-		printk(KERN_DEBUG "UV: cpu %d, apicid 0x%x, pnode %d, nid %d, "
-			"lcpu %d, blade %d\n",
-			cpu, per_cpu(x86_cpu_to_apicid, cpu), pnode, nid,
-			lcpu, blade);
 	}
 
 	/* Add blade/pnode info for nodes without cpus */
@@ -649,7 +648,6 @@
 		pnode = (paddr >> m_val) & pnode_mask;
 		blade = boot_pnode_to_blade(pnode);
 		uv_node_to_blade[nid] = blade;
-		max_pnode = max(pnode, max_pnode);
 	}
 
 	map_gru_high(max_pnode);
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/apic/probe_64.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/apic/probe_64.c
@@ -67,17 +67,8 @@
 	}
 #endif
 
-	if (apic == &apic_flat) {
-		switch (boot_cpu_data.x86_vendor) {
-		case X86_VENDOR_INTEL:
-			if (num_processors > 8)
-				apic = &apic_physflat;
-			break;
-		case X86_VENDOR_AMD:
-			if (max_physical_apicid >= 8)
-				apic = &apic_physflat;
-		}
-	}
+	if (apic == &apic_flat && num_possible_cpus() > 8)
+		apic = &apic_physflat;
 
 	printk(KERN_INFO "Setting APIC routing to %s\n", apic->name);
 
@@ -85,13 +76,6 @@
 		/* need to update phys_pkg_id */
 		apic->phys_pkg_id = apicid_phys_pkg_id;
 	}
-
-	/*
-	 * Now that apic routing model is selected, configure the
-	 * fault handling for intr remapping.
-	 */
-	if (intr_remapping_enabled)
-		enable_drhd_fault_handling();
 }
 
 /* Same for both flat and physical. */
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/apic/apic_flat_64.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/apic/apic_flat_64.c
@@ -240,6 +240,11 @@
 		printk(KERN_DEBUG "system APIC only can use physical flat");
 		return 1;
 	}
+
+	if (!strncmp(oem_id, "IBM", 3) && !strncmp(oem_table_id, "EXA", 3)) {
+		printk(KERN_DEBUG "IBM Summit detected, will use apic physical");
+		return 1;
+	}
 #endif
 
 	return 0;
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/cpu/amd.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/cpu/amd.c
@@ -254,59 +254,36 @@
 
 /*
  * Fixup core topology information for AMD multi-node processors.
- * Assumption 1: Number of cores in each internal node is the same.
- * Assumption 2: Mixed systems with both single-node and dual-node
- *               processors are not supported.
+ * Assumption: Number of cores in each internal node is the same.
  */
 #ifdef CONFIG_X86_HT
 static void __cpuinit amd_fixup_dcm(struct cpuinfo_x86 *c)
 {
-#ifdef CONFIG_PCI
-	u32 t, cpn;
-	u8 n, n_id;
+	unsigned long long value;
+	u32 nodes, cores_per_node;
 	int cpu = smp_processor_id();
 
+	if (!cpu_has(c, X86_FEATURE_NODEID_MSR))
+		return;
+
 	/* fixup topology information only once for a core */
 	if (cpu_has(c, X86_FEATURE_AMD_DCM))
 		return;
 
-	/* check for multi-node processor on boot cpu */
-	t = read_pci_config(0, 24, 3, 0xe8);
-	if (!(t & (1 << 29)))
+	rdmsrl(MSR_FAM10H_NODE_ID, value);
+
+	nodes = ((value >> 3) & 7) + 1;
+	if (nodes == 1)
 		return;
 
 	set_cpu_cap(c, X86_FEATURE_AMD_DCM);
+	cores_per_node = c->x86_max_cores / nodes;
 
-	/* cores per node: each internal node has half the number of cores */
-	cpn = c->x86_max_cores >> 1;
-
-	/* even-numbered NB_id of this dual-node processor */
-	n = c->phys_proc_id << 1;
-
-	/*
-	 * determine internal node id and assign cores fifty-fifty to
-	 * each node of the dual-node processor
-	 */
-	t = read_pci_config(0, 24 + n, 3, 0xe8);
-	n = (t>>30) & 0x3;
-	if (n == 0) {
-		if (c->cpu_core_id < cpn)
-			n_id = 0;
-		else
-			n_id = 1;
-	} else {
-		if (c->cpu_core_id < cpn)
-			n_id = 1;
-		else
-			n_id = 0;
-	}
+	/* store NodeID, use llc_shared_map to store sibling info */
+	per_cpu(cpu_llc_id, cpu) = value & 7;
 
-	/* compute entire NodeID, use llc_shared_map to store sibling info */
-	per_cpu(cpu_llc_id, cpu) = (c->phys_proc_id << 1) + n_id;
-
-	/* fixup core id to be in range from 0 to cpn */
-	c->cpu_core_id = c->cpu_core_id % cpn;
-#endif
+	/* fixup core id to be in range from 0 to (cores_per_node - 1) */
+	c->cpu_core_id = c->cpu_core_id % cores_per_node;
 }
 #endif
 
@@ -328,8 +305,7 @@
 	/* use socket ID also for last level cache */
 	per_cpu(cpu_llc_id, cpu) = c->phys_proc_id;
 	/* fixup topology information on multi-node processors */
-	if ((c->x86 == 0x10) && (c->x86_model == 9))
-		amd_fixup_dcm(c);
+	amd_fixup_dcm(c);
 #endif
 }
 
@@ -590,6 +566,35 @@
 		}
 	}
 #endif
+
+	/*
+	 * Family 0x12 and above processors have APIC timer
+	 * running in deep C states.
+	 */
+	if (c->x86 > 0x11)
+		set_cpu_cap(c, X86_FEATURE_ARAT);
+
+	/*
+	 * Disable GART TLB Walk Errors on Fam10h. We do this here
+	 * because this is always needed when GART is enabled, even in a
+	 * kernel which has no MCE support built in.
+	 */
+	if (c->x86 == 0x10) {
+		/*
+		 * BIOS should disable GartTlbWlk Errors themself. If
+		 * it doesn't do it here as suggested by the BKDG.
+		 *
+		 * Fixes: https://bugzilla.kernel.org/show_bug.cgi?id=33012
+		 */
+		u64 mask;
+		int err;
+
+		err = rdmsrl_safe(MSR_AMD64_MCx_MASK(4), &mask);
+		if (err == 0) {
+			mask |= (1 << 10);
+			checking_wrmsrl(MSR_AMD64_MCx_MASK(4), mask);
+		}
+	}
 }
 
 #ifdef CONFIG_X86_32
@@ -634,3 +639,68 @@
 };
 
 cpu_dev_register(amd_cpu_dev);
+
+/*
+ * AMD errata checking
+ *
+ * Errata are defined as arrays of ints using the AMD_LEGACY_ERRATUM() or
+ * AMD_OSVW_ERRATUM() macros. The latter is intended for newer errata that
+ * have an OSVW id assigned, which it takes as first argument. Both take a
+ * variable number of family-specific model-stepping ranges created by
+ * AMD_MODEL_RANGE(). Each erratum also has to be declared as extern const
+ * int[] in arch/x86/include/asm/processor.h.
+ *
+ * Example:
+ *
+ * const int amd_erratum_319[] =
+ *	AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0x4, 0x2),
+ *			   AMD_MODEL_RANGE(0x10, 0x8, 0x0, 0x8, 0x0),
+ *			   AMD_MODEL_RANGE(0x10, 0x9, 0x0, 0x9, 0x0));
+ */
+
+const int amd_erratum_400[] =
+	AMD_OSVW_ERRATUM(1, AMD_MODEL_RANGE(0xf, 0x41, 0x2, 0xff, 0xf),
+			    AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0xff, 0xf));
+
+
+bool cpu_has_amd_erratum(const int *erratum)
+{
+	struct cpuinfo_x86 *cpu = &current_cpu_data;
+	int osvw_id = *erratum++;
+	u32 range;
+	u32 ms;
+
+	/*
+	 * If called early enough that current_cpu_data hasn't been initialized
+	 * yet, fall back to boot_cpu_data.
+	 */
+	if (cpu->x86 == 0)
+		cpu = &boot_cpu_data;
+
+	if (cpu->x86_vendor != X86_VENDOR_AMD)
+		return false;
+
+	if (osvw_id >= 0 && osvw_id < 65536 &&
+	    cpu_has(cpu, X86_FEATURE_OSVW)) {
+		u64 osvw_len;
+
+		rdmsrl(MSR_AMD64_OSVW_ID_LENGTH, osvw_len);
+		if (osvw_id < osvw_len) {
+			u64 osvw_bits;
+
+			rdmsrl(MSR_AMD64_OSVW_STATUS + (osvw_id >> 6),
+			    osvw_bits);
+			return osvw_bits & (1ULL << (osvw_id & 0x3f));
+		}
+	}
+
+	/* OSVW unavailable or ID unknown, match family-model-stepping range */
+	ms = (cpu->x86_model << 4) | cpu->x86_mask;
+	while ((range = *erratum++))
+		if ((cpu->x86 == AMD_MODEL_RANGE_FAMILY(range)) &&
+		    (ms >= AMD_MODEL_RANGE_START(range)) &&
+		    (ms <= AMD_MODEL_RANGE_END(range)))
+			return true;
+
+	return false;
+}
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -18,6 +18,7 @@
 #include <asm/processor.h>
 #include <linux/smp.h>
 #include <asm/k8.h>
+#include <asm/smp.h>
 
 #define LVL_1_INST	1
 #define LVL_1_DATA	2
@@ -94,7 +95,7 @@
 	{ 0xd1, LVL_3,    1024 },	/* 4-way set assoc, 64 byte line size */
 	{ 0xd2, LVL_3,    2048 },	/* 4-way set assoc, 64 byte line size */
 	{ 0xd6, LVL_3,    1024 },	/* 8-way set assoc, 64 byte line size */
-	{ 0xd7, LVL_3,    2038 },	/* 8-way set assoc, 64 byte line size */
+	{ 0xd7, LVL_3,    2048 },	/* 8-way set assoc, 64 byte line size */
 	{ 0xd8, LVL_3,    4096 },	/* 12-way set assoc, 64 byte line size */
 	{ 0xdc, LVL_3,    2048 },	/* 12-way set assoc, 64 byte line size */
 	{ 0xdd, LVL_3,    4096 },	/* 12-way set assoc, 64 byte line size */
@@ -102,6 +103,9 @@
 	{ 0xe2, LVL_3,    2048 },	/* 16-way set assoc, 64 byte line size */
 	{ 0xe3, LVL_3,    4096 },	/* 16-way set assoc, 64 byte line size */
 	{ 0xe4, LVL_3,    8192 },	/* 16-way set assoc, 64 byte line size */
+	{ 0xea, LVL_3,    12288 },	/* 24-way set assoc, 64 byte line size */
+	{ 0xeb, LVL_3,    18432 },	/* 24-way set assoc, 64 byte line size */
+	{ 0xec, LVL_3,    24576 },	/* 24-way set assoc, 64 byte line size */
 	{ 0x00, 0, 0}
 };
 
@@ -147,7 +151,8 @@
 	union _cpuid4_leaf_ebx ebx;
 	union _cpuid4_leaf_ecx ecx;
 	unsigned long size;
-	unsigned long can_disable;
+	bool can_disable;
+	unsigned int l3_indices;
 	DECLARE_BITMAP(shared_cpu_map, NR_CPUS);
 };
 
@@ -157,7 +162,8 @@
 	union _cpuid4_leaf_ebx ebx;
 	union _cpuid4_leaf_ecx ecx;
 	unsigned long size;
-	unsigned long can_disable;
+	bool can_disable;
+	unsigned int l3_indices;
 };
 
 unsigned short			num_cache_leaves;
@@ -287,6 +293,36 @@
 		(ebx->split.ways_of_associativity + 1) - 1;
 }
 
+struct _cache_attr {
+	struct attribute attr;
+	ssize_t (*show)(struct _cpuid4_info *, char *);
+	ssize_t (*store)(struct _cpuid4_info *, const char *, size_t count);
+};
+
+#ifdef CONFIG_CPU_SUP_AMD
+static unsigned int __cpuinit amd_calc_l3_indices(void)
+{
+	/*
+	 * We're called over smp_call_function_single() and therefore
+	 * are on the correct cpu.
+	 */
+	int cpu = smp_processor_id();
+	int node = cpu_to_node(cpu);
+	struct pci_dev *dev = node_to_k8_nb_misc(node);
+	unsigned int sc0, sc1, sc2, sc3;
+	u32 val = 0;
+
+	pci_read_config_dword(dev, 0x1C4, &val);
+
+	/* calculate subcache sizes */
+	sc0 = !(val & BIT(0));
+	sc1 = !(val & BIT(4));
+	sc2 = !(val & BIT(8))  + !(val & BIT(9));
+	sc3 = !(val & BIT(12)) + !(val & BIT(13));
+
+	return (max(max(max(sc0, sc1), sc2), sc3) << 10) - 1;
+}
+
 static void __cpuinit
 amd_check_l3_disable(int index, struct _cpuid4_info_regs *this_leaf)
 {
@@ -296,13 +332,108 @@
 	if (boot_cpu_data.x86 == 0x11)
 		return;
 
-	/* see erratum #382 */
-	if ((boot_cpu_data.x86 == 0x10) && (boot_cpu_data.x86_model < 0x8))
+	/* see errata #382 and #388 */
+	if ((boot_cpu_data.x86 == 0x10) &&
+	    ((boot_cpu_data.x86_model < 0x8) ||
+	     (boot_cpu_data.x86_mask  < 0x1)))
 		return;
 
-	this_leaf->can_disable = 1;
+	/* not in virtualized environments */
+	if (num_k8_northbridges == 0)
+		return;
+
+	this_leaf->can_disable = true;
+	this_leaf->l3_indices  = amd_calc_l3_indices();
+}
+
+static ssize_t show_cache_disable(struct _cpuid4_info *this_leaf, char *buf,
+				  unsigned int index)
+{
+	int cpu = cpumask_first(to_cpumask(this_leaf->shared_cpu_map));
+	int node = amd_get_nb_id(cpu);
+	struct pci_dev *dev = node_to_k8_nb_misc(node);
+	unsigned int reg = 0;
+
+	if (!this_leaf->can_disable)
+		return -EINVAL;
+
+	if (!dev)
+		return -EINVAL;
+
+	pci_read_config_dword(dev, 0x1BC + index * 4, &reg);
+	return sprintf(buf, "0x%08x\n", reg);
+}
+
+#define SHOW_CACHE_DISABLE(index)					\
+static ssize_t								\
+show_cache_disable_##index(struct _cpuid4_info *this_leaf, char *buf)	\
+{									\
+	return show_cache_disable(this_leaf, buf, index);		\
+}
+SHOW_CACHE_DISABLE(0)
+SHOW_CACHE_DISABLE(1)
+
+static ssize_t store_cache_disable(struct _cpuid4_info *this_leaf,
+	const char *buf, size_t count, unsigned int index)
+{
+	int cpu = cpumask_first(to_cpumask(this_leaf->shared_cpu_map));
+	int node = amd_get_nb_id(cpu);
+	struct pci_dev *dev = node_to_k8_nb_misc(node);
+	unsigned long val = 0;
+
+#define SUBCACHE_MASK	(3UL << 20)
+#define SUBCACHE_INDEX	0xfff
+
+	if (!this_leaf->can_disable)
+		return -EINVAL;
+
+	if (!capable(CAP_SYS_ADMIN))
+		return -EPERM;
+
+	if (!dev)
+		return -EINVAL;
+
+	if (strict_strtoul(buf, 10, &val) < 0)
+		return -EINVAL;
+
+	/* do not allow writes outside of allowed bits */
+	if ((val & ~(SUBCACHE_MASK | SUBCACHE_INDEX)) ||
+	    ((val & SUBCACHE_INDEX) > this_leaf->l3_indices))
+		return -EINVAL;
+
+	val |= BIT(30);
+	pci_write_config_dword(dev, 0x1BC + index * 4, val);
+	/*
+	 * We need to WBINVD on a core on the node containing the L3 cache which
+	 * indices we disable therefore a simple wbinvd() is not sufficient.
+	 */
+	wbinvd_on_cpu(cpu);
+	pci_write_config_dword(dev, 0x1BC + index * 4, val | BIT(31));
+	return count;
 }
 
+#define STORE_CACHE_DISABLE(index)					\
+static ssize_t								\
+store_cache_disable_##index(struct _cpuid4_info *this_leaf,		\
+			    const char *buf, size_t count)		\
+{									\
+	return store_cache_disable(this_leaf, buf, count, index);	\
+}
+STORE_CACHE_DISABLE(0)
+STORE_CACHE_DISABLE(1)
+
+static struct _cache_attr cache_disable_0 = __ATTR(cache_disable_0, 0644,
+		show_cache_disable_0, store_cache_disable_0);
+static struct _cache_attr cache_disable_1 = __ATTR(cache_disable_1, 0644,
+		show_cache_disable_1, store_cache_disable_1);
+
+#else	/* CONFIG_CPU_SUP_AMD */
+static void __cpuinit
+amd_check_l3_disable(int index, struct _cpuid4_info_regs *this_leaf)
+{
+};
+#endif /* CONFIG_CPU_SUP_AMD */
+
 static int
 __cpuinit cpuid4_cache_lookup_regs(int index,
 				   struct _cpuid4_info_regs *this_leaf)
@@ -520,18 +651,19 @@
 {
 	struct _cpuid4_info	*this_leaf, *sibling_leaf;
 	unsigned long num_threads_sharing;
-	int index_msb, i;
+	int index_msb, i, sibling;
 	struct cpuinfo_x86 *c = &cpu_data(cpu);
 
 	if ((index == 3) && (c->x86_vendor == X86_VENDOR_AMD)) {
-		struct cpuinfo_x86 *d;
-		for_each_online_cpu(i) {
+		for_each_cpu(i, c->llc_shared_map) {
 			if (!per_cpu(cpuid4_info, i))
 				continue;
-			d = &cpu_data(i);
 			this_leaf = CPUID4_INFO_IDX(i, index);
-			cpumask_copy(to_cpumask(this_leaf->shared_cpu_map),
-				     d->llc_shared_map);
+			for_each_cpu(sibling, c->llc_shared_map) {
+				if (!cpu_online(sibling))
+					continue;
+				set_bit(sibling, this_leaf->shared_cpu_map);
+			}
 		}
 		return;
 	}
@@ -723,82 +855,6 @@
 #define to_object(k)	container_of(k, struct _index_kobject, kobj)
 #define to_attr(a)	container_of(a, struct _cache_attr, attr)
 
-static ssize_t show_cache_disable(struct _cpuid4_info *this_leaf, char *buf,
-				  unsigned int index)
-{
-	int cpu = cpumask_first(to_cpumask(this_leaf->shared_cpu_map));
-	int node = cpu_to_node(cpu);
-	struct pci_dev *dev = node_to_k8_nb_misc(node);
-	unsigned int reg = 0;
-
-	if (!this_leaf->can_disable)
-		return -EINVAL;
-
-	if (!dev)
-		return -EINVAL;
-
-	pci_read_config_dword(dev, 0x1BC + index * 4, &reg);
-	return sprintf(buf, "%x\n", reg);
-}
-
-#define SHOW_CACHE_DISABLE(index)					\
-static ssize_t								\
-show_cache_disable_##index(struct _cpuid4_info *this_leaf, char *buf)  	\
-{									\
-	return show_cache_disable(this_leaf, buf, index);		\
-}
-SHOW_CACHE_DISABLE(0)
-SHOW_CACHE_DISABLE(1)
-
-static ssize_t store_cache_disable(struct _cpuid4_info *this_leaf,
-	const char *buf, size_t count, unsigned int index)
-{
-	int cpu = cpumask_first(to_cpumask(this_leaf->shared_cpu_map));
-	int node = cpu_to_node(cpu);
-	struct pci_dev *dev = node_to_k8_nb_misc(node);
-	unsigned long val = 0;
-	unsigned int scrubber = 0;
-
-	if (!this_leaf->can_disable)
-		return -EINVAL;
-
-	if (!capable(CAP_SYS_ADMIN))
-		return -EPERM;
-
-	if (!dev)
-		return -EINVAL;
-
-	if (strict_strtoul(buf, 10, &val) < 0)
-		return -EINVAL;
-
-	val |= 0xc0000000;
-
-	pci_read_config_dword(dev, 0x58, &scrubber);
-	scrubber &= ~0x1f000000;
-	pci_write_config_dword(dev, 0x58, scrubber);
-
-	pci_write_config_dword(dev, 0x1BC + index * 4, val & ~0x40000000);
-	wbinvd();
-	pci_write_config_dword(dev, 0x1BC + index * 4, val);
-	return count;
-}
-
-#define STORE_CACHE_DISABLE(index)					\
-static ssize_t								\
-store_cache_disable_##index(struct _cpuid4_info *this_leaf,	     	\
-			    const char *buf, size_t count)		\
-{									\
-	return store_cache_disable(this_leaf, buf, count, index);	\
-}
-STORE_CACHE_DISABLE(0)
-STORE_CACHE_DISABLE(1)
-
-struct _cache_attr {
-	struct attribute attr;
-	ssize_t (*show)(struct _cpuid4_info *, char *);
-	ssize_t (*store)(struct _cpuid4_info *, const char *, size_t count);
-};
-
 #define define_one_ro(_name) \
 static struct _cache_attr _name = \
 	__ATTR(_name, 0444, show_##_name, NULL)
@@ -813,23 +869,28 @@
 define_one_ro(shared_cpu_map);
 define_one_ro(shared_cpu_list);
 
-static struct _cache_attr cache_disable_0 = __ATTR(cache_disable_0, 0644,
-		show_cache_disable_0, store_cache_disable_0);
-static struct _cache_attr cache_disable_1 = __ATTR(cache_disable_1, 0644,
-		show_cache_disable_1, store_cache_disable_1);
+#define DEFAULT_SYSFS_CACHE_ATTRS	\
+	&type.attr,			\
+	&level.attr,			\
+	&coherency_line_size.attr,	\
+	&physical_line_partition.attr,	\
+	&ways_of_associativity.attr,	\
+	&number_of_sets.attr,		\
+	&size.attr,			\
+	&shared_cpu_map.attr,		\
+	&shared_cpu_list.attr
 
 static struct attribute *default_attrs[] = {
-	&type.attr,
-	&level.attr,
-	&coherency_line_size.attr,
-	&physical_line_partition.attr,
-	&ways_of_associativity.attr,
-	&number_of_sets.attr,
-	&size.attr,
-	&shared_cpu_map.attr,
-	&shared_cpu_list.attr,
+	DEFAULT_SYSFS_CACHE_ATTRS,
+	NULL
+};
+
+static struct attribute *default_l3_attrs[] = {
+	DEFAULT_SYSFS_CACHE_ATTRS,
+#ifdef CONFIG_CPU_SUP_AMD
 	&cache_disable_0.attr,
 	&cache_disable_1.attr,
+#endif
 	NULL
 };
 
@@ -920,6 +981,7 @@
 	unsigned int cpu = sys_dev->id;
 	unsigned long i, j;
 	struct _index_kobject *this_object;
+	struct _cpuid4_info   *this_leaf;
 	int retval;
 
 	retval = cpuid4_cache_sysfs_init(cpu);
@@ -938,6 +1000,14 @@
 		this_object = INDEX_KOBJECT_PTR(cpu, i);
 		this_object->cpu = cpu;
 		this_object->index = i;
+
+		this_leaf = CPUID4_INFO_IDX(cpu, i);
+
+		if (this_leaf->can_disable)
+			ktype_cache.default_attrs = default_l3_attrs;
+		else
+			ktype_cache.default_attrs = default_attrs;
+
 		retval = kobject_init_and_add(&(this_object->kobj),
 					      &ktype_cache,
 					      per_cpu(cache_kobject, cpu),
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/cpu/Makefile
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/cpu/Makefile
@@ -18,8 +18,6 @@
 obj-$(CONFIG_X86_32)	+= bugs.o cmpxchg.o
 obj-$(CONFIG_X86_64)	+= bugs_64.o
 
-obj-$(CONFIG_X86_CPU_DEBUG)		+= cpu_debug.o
-
 obj-$(CONFIG_CPU_SUP_INTEL)		+= intel.o
 obj-$(CONFIG_CPU_SUP_AMD)		+= amd.o
 obj-$(CONFIG_CPU_SUP_CYRIX_32)		+= cyrix.o
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/cpu/common.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/cpu/common.c
@@ -540,7 +540,7 @@
 	}
 }
 
-static void __cpuinit get_cpu_cap(struct cpuinfo_x86 *c)
+void __cpuinit get_cpu_cap(struct cpuinfo_x86 *c)
 {
 	u32 tfms, xlvl;
 	u32 ebx;
@@ -579,6 +579,7 @@
 	if (c->extended_cpuid_level >= 0x80000007)
 		c->x86_power = cpuid_edx(0x80000007);
 
+	init_scattered_cpuid_features(c);
 }
 
 static void __cpuinit identify_cpu_without_cpuid(struct cpuinfo_x86 *c)
@@ -727,7 +728,6 @@
 
 	get_model_name(c); /* Default name */
 
-	init_scattered_cpuid_features(c);
 	detect_nopl(c);
 }
 
@@ -798,6 +798,19 @@
 	/* Filter out anything that depends on CPUID levels we don't have */
 	filter_cpuid_features(c, true);
 
+#ifdef CONFIG_X86_32
+	/*
+	 *  emulation of NX with segment limits unfortunately means
+	 *  we have to disable the fast system calls, due to the way that
+	 *  sysexit clears the segment limits on return.
+	 *  If we have NX, then we don't need to do this.
+	 */
+#ifdef CONFIG_X86_PAE
+		if (!test_cpu_cap(c, X86_FEATURE_NX))
+#endif
+			clear_cpu_cap(c, X86_FEATURE_SEP);
+#endif /*CONFIG_X86_32*/
+
 	/* If the model name is still unset, do table lookup. */
 	if (!c->x86_model_id[0]) {
 		const char *p;
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/cpu/intel.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/cpu/intel.c
@@ -40,6 +40,7 @@
 			misc_enable &= ~MSR_IA32_MISC_ENABLE_LIMIT_CPUID;
 			wrmsrl(MSR_IA32_MISC_ENABLE, misc_enable);
 			c->cpuid_level = cpuid_eax(0);
+			get_cpu_cap(c);
 		}
 	}
 
@@ -47,6 +48,27 @@
 		(c->x86 == 0x6 && c->x86_model >= 0x0e))
 		set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
 
+	/*
+	 * Atom erratum AAE44/AAF40/AAG38/AAH41:
+	 *
+	 * A race condition between speculative fetches and invalidating
+	 * a large page.  This is worked around in microcode, but we
+	 * need the microcode to have already been loaded... so if it is
+	 * not, recommend a BIOS update and disable large pages.
+	 */
+	if (c->x86 == 6 && c->x86_model == 0x1c && c->x86_mask <= 2) {
+		u32 ucode, junk;
+
+		wrmsr(MSR_IA32_UCODE_REV, 0, 0);
+		sync_core();
+		rdmsr(MSR_IA32_UCODE_REV, junk, ucode);
+
+		if (ucode < 0x20e) {
+			printk(KERN_WARNING "Atom PSE erratum detected, BIOS microcode update recommended\n");
+			clear_cpu_cap(c, X86_FEATURE_PSE);
+		}
+	}
+
 #ifdef CONFIG_X86_64
 	set_cpu_cap(c, X86_FEATURE_SYSENTER32);
 #else
@@ -70,8 +92,8 @@
 	if (c->x86_power & (1 << 8)) {
 		set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
 		set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC);
-		set_cpu_cap(c, X86_FEATURE_TSC_RELIABLE);
-		sched_clock_stable = 1;
+		if (!check_tsc_unstable())
+			sched_clock_stable = 1;
 	}
 
 	/*
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/cpu/cpu.h
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/cpu/cpu.h
@@ -33,5 +33,6 @@
 			    *const __x86_cpu_dev_end[];
 
 extern void display_cacheinfo(struct cpuinfo_x86 *c);
+extern void get_cpu_cap(struct cpuinfo_x86 *c);
 
 #endif
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/cpu/bugs.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/cpu/bugs.c
@@ -151,6 +151,20 @@
 #endif
 }
 
+static void __init check_atom(void)
+{	
+
+	/* 
+	 *  Disable 4MB page tables to work around Intel errata AAE44 for
+	 *  Atom. We cannot guarantee stopping undefined processor behaviour
+	 *  when two pageing structure translations differ with respect to
+	 *  page frame sizes.  Hence, for Atoms we disable the PSE.
+	 */
+	if (boot_cpu_data.x86_model == 0x1c) {
+		clear_bit(X86_FEATURE_PSE, boot_cpu_data.x86_capability);
+		printk(KERN_INFO "Disabling 4MB page tables to avoid TLB bug\n");
+	}
+}
 
 void __init check_bugs(void)
 {
@@ -163,6 +177,7 @@
 	check_fpu();
 	check_hlt();
 	check_popad();
+	check_atom();
 	init_utsname()->machine[1] =
 		'0' + (boot_cpu_data.x86 > 6 ? 6 : boot_cpu_data.x86);
 	alternative_instructions();
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/cpu/perfctr-watchdog.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/cpu/perfctr-watchdog.c
@@ -712,7 +712,7 @@
 	switch (boot_cpu_data.x86_vendor) {
 	case X86_VENDOR_AMD:
 		if (boot_cpu_data.x86 != 6 && boot_cpu_data.x86 != 15 &&
-		    boot_cpu_data.x86 != 16)
+		    boot_cpu_data.x86 != 16 && boot_cpu_data.x86 != 17)
 			return;
 		wd_ops = &k7_wd_ops;
 		break;
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/cpu/vmware.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/cpu/vmware.c
@@ -22,6 +22,7 @@
  */
 
 #include <linux/dmi.h>
+#include <linux/jiffies.h>
 #include <asm/div64.h>
 #include <asm/vmware.h>
 #include <asm/x86_init.h>
@@ -50,7 +51,7 @@
 
 static unsigned long vmware_get_tsc_khz(void)
 {
-	uint64_t tsc_hz;
+	uint64_t tsc_hz, lpj;
 	uint32_t eax, ebx, ecx, edx;
 
 	VMWARE_PORT(GETHZ, eax, ebx, ecx, edx);
@@ -61,6 +62,13 @@
 	printk(KERN_INFO "TSC freq read from hypervisor : %lu.%03lu MHz\n",
 			 (unsigned long) tsc_hz / 1000,
 			 (unsigned long) tsc_hz % 1000);
+
+	if (!preset_lpj) {
+		lpj = ((u64)tsc_hz * 1000);
+		do_div(lpj, HZ);
+		preset_lpj = lpj;
+	}
+
 	return tsc_hz;
 }
 
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/cpu/perf_event.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/cpu/perf_event.c
@@ -190,6 +190,97 @@
 				[PERF_COUNT_HW_CACHE_OP_MAX]
 				[PERF_COUNT_HW_CACHE_RESULT_MAX];
 
+static const u64 westmere_hw_cache_event_ids
+				[PERF_COUNT_HW_CACHE_MAX]
+				[PERF_COUNT_HW_CACHE_OP_MAX]
+				[PERF_COUNT_HW_CACHE_RESULT_MAX] =
+{
+ [ C(L1D) ] = {
+	[ C(OP_READ) ] = {
+		[ C(RESULT_ACCESS) ] = 0x010b, /* MEM_INST_RETIRED.LOADS       */
+		[ C(RESULT_MISS)   ] = 0x0151, /* L1D.REPL                     */
+	},
+	[ C(OP_WRITE) ] = {
+		[ C(RESULT_ACCESS) ] = 0x020b, /* MEM_INST_RETURED.STORES      */
+		[ C(RESULT_MISS)   ] = 0x0251, /* L1D.M_REPL                   */
+	},
+	[ C(OP_PREFETCH) ] = {
+		[ C(RESULT_ACCESS) ] = 0x014e, /* L1D_PREFETCH.REQUESTS        */
+		[ C(RESULT_MISS)   ] = 0x024e, /* L1D_PREFETCH.MISS            */
+	},
+ },
+ [ C(L1I ) ] = {
+	[ C(OP_READ) ] = {
+		[ C(RESULT_ACCESS) ] = 0x0380, /* L1I.READS                    */
+		[ C(RESULT_MISS)   ] = 0x0280, /* L1I.MISSES                   */
+	},
+	[ C(OP_WRITE) ] = {
+		[ C(RESULT_ACCESS) ] = -1,
+		[ C(RESULT_MISS)   ] = -1,
+	},
+	[ C(OP_PREFETCH) ] = {
+		[ C(RESULT_ACCESS) ] = 0x0,
+		[ C(RESULT_MISS)   ] = 0x0,
+	},
+ },
+ [ C(LL  ) ] = {
+	[ C(OP_READ) ] = {
+		[ C(RESULT_ACCESS) ] = 0x0324, /* L2_RQSTS.LOADS               */
+		[ C(RESULT_MISS)   ] = 0x0224, /* L2_RQSTS.LD_MISS             */
+	},
+	[ C(OP_WRITE) ] = {
+		[ C(RESULT_ACCESS) ] = 0x0c24, /* L2_RQSTS.RFOS                */
+		[ C(RESULT_MISS)   ] = 0x0824, /* L2_RQSTS.RFO_MISS            */
+	},
+	[ C(OP_PREFETCH) ] = {
+		[ C(RESULT_ACCESS) ] = 0x4f2e, /* LLC Reference                */
+		[ C(RESULT_MISS)   ] = 0x412e, /* LLC Misses                   */
+	},
+ },
+ [ C(DTLB) ] = {
+	[ C(OP_READ) ] = {
+		[ C(RESULT_ACCESS) ] = 0x010b, /* MEM_INST_RETIRED.LOADS       */
+		[ C(RESULT_MISS)   ] = 0x0108, /* DTLB_LOAD_MISSES.ANY         */
+	},
+	[ C(OP_WRITE) ] = {
+		[ C(RESULT_ACCESS) ] = 0x020b, /* MEM_INST_RETURED.STORES      */
+		[ C(RESULT_MISS)   ] = 0x010c, /* MEM_STORE_RETIRED.DTLB_MISS  */
+	},
+	[ C(OP_PREFETCH) ] = {
+		[ C(RESULT_ACCESS) ] = 0x0,
+		[ C(RESULT_MISS)   ] = 0x0,
+	},
+ },
+ [ C(ITLB) ] = {
+	[ C(OP_READ) ] = {
+		[ C(RESULT_ACCESS) ] = 0x01c0, /* INST_RETIRED.ANY_P           */
+		[ C(RESULT_MISS)   ] = 0x0185, /* ITLB_MISSES.ANY              */
+	},
+	[ C(OP_WRITE) ] = {
+		[ C(RESULT_ACCESS) ] = -1,
+		[ C(RESULT_MISS)   ] = -1,
+	},
+	[ C(OP_PREFETCH) ] = {
+		[ C(RESULT_ACCESS) ] = -1,
+		[ C(RESULT_MISS)   ] = -1,
+	},
+ },
+ [ C(BPU ) ] = {
+	[ C(OP_READ) ] = {
+		[ C(RESULT_ACCESS) ] = 0x00c4, /* BR_INST_RETIRED.ALL_BRANCHES */
+		[ C(RESULT_MISS)   ] = 0x03e8, /* BPU_CLEARS.ANY               */
+	},
+	[ C(OP_WRITE) ] = {
+		[ C(RESULT_ACCESS) ] = -1,
+		[ C(RESULT_MISS)   ] = -1,
+	},
+	[ C(OP_PREFETCH) ] = {
+		[ C(RESULT_ACCESS) ] = -1,
+		[ C(RESULT_MISS)   ] = -1,
+	},
+ },
+};
+
 static const u64 nehalem_hw_cache_event_ids
 				[PERF_COUNT_HW_CACHE_MAX]
 				[PERF_COUNT_HW_CACHE_OP_MAX]
@@ -914,8 +1005,11 @@
 		if (atomic_read(&active_events) == 0) {
 			if (!reserve_pmc_hardware())
 				err = -EBUSY;
-			else
+			else {
 				err = reserve_bts_hardware();
+				if (err)
+					release_pmc_hardware();
+			}
 		}
 		if (!err)
 			atomic_inc(&active_events);
@@ -1999,6 +2093,7 @@
 	 * Install the hw-cache-events table:
 	 */
 	switch (boot_cpu_data.x86_model) {
+
 	case 15: /* original 65 nm celeron/pentium/core2/xeon, "Merom"/"Conroe" */
 	case 22: /* single-core 65 nm celeron/core2solo "Merom-L"/"Conroe-L" */
 	case 23: /* current 45 nm celeron/core2/xeon "Penryn"/"Wolfdale" */
@@ -2009,7 +2104,9 @@
 		pr_cont("Core2 events, ");
 		break;
 	default:
-	case 26:
+	case 26: /* 45 nm nehalem, "Bloomfield" */
+	case 30: /* 45 nm nehalem, "Lynnfield" */
+	case 46: /* 45 nm nehalem-ex, "Beckton" */
 		memcpy(hw_cache_event_ids, nehalem_hw_cache_event_ids,
 		       sizeof(hw_cache_event_ids));
 
@@ -2021,6 +2118,14 @@
 
 		pr_cont("Atom events, ");
 		break;
+
+	case 37: /* 32 nm nehalem, "Clarkdale" */
+	case 44: /* 32 nm nehalem, "Gulftown" */
+		memcpy(hw_cache_event_ids, westmere_hw_cache_event_ids,
+		       sizeof(hw_cache_event_ids));
+
+		pr_cont("Westmere events, ");
+		break;
 	}
 	return 0;
 }
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/cpu/mtrr/main.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/cpu/mtrr/main.c
@@ -262,14 +262,24 @@
 
 	/*
 	 * HACK!
-	 * We use this same function to initialize the mtrrs on boot.
-	 * The state of the boot cpu's mtrrs has been saved, and we want
-	 * to replicate across all the APs.
-	 * If we're doing that @reg is set to something special...
+	 *
+	 * We use this same function to initialize the mtrrs during boot,
+	 * resume, runtime cpu online and on an explicit request to set a
+	 * specific MTRR.
+	 *
+	 * During boot or suspend, the state of the boot cpu's mtrrs has been
+	 * saved, and we want to replicate that across all the cpus that come
+	 * online (either at the end of boot or resume or during a runtime cpu
+	 * online). If we're doing that, @reg is set to something special and on
+	 * this cpu we still do mtrr_if->set_all(). During boot/resume, this
+	 * is unnecessary if at this point we are still on the cpu that started
+	 * the boot/resume sequence. But there is no guarantee that we are still
+	 * on the same cpu. So we do mtrr_if->set_all() on this cpu aswell to be
+	 * sure that we are in sync with everyone else.
 	 */
 	if (reg != ~0U)
 		mtrr_if->set(reg, base, size, type);
-	else if (!mtrr_aps_delayed_init)
+	else
 		mtrr_if->set_all();
 
 	/* Wait for the others */
@@ -762,13 +772,21 @@
 }
 
 /*
- * MTRR initialization for all AP's
+ * Delayed MTRR initialization for all AP's
  */
 void mtrr_aps_init(void)
 {
 	if (!use_intel())
 		return;
 
+	/*
+	 * Check if someone has requested the delay of AP MTRR initialization,
+	 * by doing set_mtrr_aps_delayed_init(), prior to this point. If not,
+	 * then we are done.
+	 */
+	if (!mtrr_aps_delayed_init)
+		return;
+
 	set_mtrr(~0U, 0, 0, 0);
 	mtrr_aps_delayed_init = false;
 }
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/cpu/mtrr/cleanup.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/cpu/mtrr/cleanup.c
@@ -948,7 +948,7 @@
 
 	if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD)
 		return 0;
-	if (boot_cpu_data.x86 < 0xf || boot_cpu_data.x86 > 0x11)
+	if (boot_cpu_data.x86 < 0xf)
 		return 0;
 	/* In case some hypervisor doesn't pass SYSCFG through: */
 	if (rdmsr_safe(MSR_K8_SYSCFG, &l, &h) < 0)
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/cpu/mcheck/therm_throt.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/cpu/mcheck/therm_throt.c
@@ -49,6 +49,8 @@
 
 static atomic_t therm_throt_en	= ATOMIC_INIT(0);
 
+static u32 lvtthmr_init __read_mostly;
+
 #ifdef CONFIG_SYSFS
 #define define_therm_throt_sysdev_one_ro(_name)				\
 	static SYSDEV_ATTR(_name, 0444, therm_throt_sysdev_show_##_name, NULL)
@@ -254,14 +256,27 @@
 	ack_APIC_irq();
 }
 
+void __init mcheck_intel_therm_init(void)
+{
+	/*
+	 * This function is only called on boot CPU. Save the init thermal
+	 * LVT value on BSP and use that value to restore APs' thermal LVT
+	 * entry BIOS programmed later
+	 */
+	if (cpu_has(&boot_cpu_data, X86_FEATURE_ACPI) &&
+		cpu_has(&boot_cpu_data, X86_FEATURE_ACC))
+		lvtthmr_init = apic_read(APIC_LVTTHMR);
+}
+
 void intel_init_thermal(struct cpuinfo_x86 *c)
 {
 	unsigned int cpu = smp_processor_id();
 	int tm2 = 0;
 	u32 l, h;
 
-	/* Thermal monitoring depends on ACPI and clock modulation*/
-	if (!cpu_has(c, X86_FEATURE_ACPI) || !cpu_has(c, X86_FEATURE_ACC))
+	/* Thermal monitoring depends on APIC, ACPI and clock modulation */
+	if (!cpu_has_apic || !cpu_has(c, X86_FEATURE_ACPI) ||
+		!cpu_has(c, X86_FEATURE_ACC))
 		return;
 
 	/*
@@ -270,7 +285,22 @@
 	 * since it might be delivered via SMI already:
 	 */
 	rdmsr(MSR_IA32_MISC_ENABLE, l, h);
-	h = apic_read(APIC_LVTTHMR);
+
+	h = lvtthmr_init;
+	/*
+	 * The initial value of thermal LVT entries on all APs always reads
+	 * 0x10000 because APs are woken up by BSP issuing INIT-SIPI-SIPI
+	 * sequence to them and LVT registers are reset to 0s except for
+	 * the mask bits which are set to 1s when APs receive INIT IPI.
+	 * If BIOS takes over the thermal interrupt and sets its interrupt
+	 * delivery mode to SMI (not fixed), it restores the value that the
+	 * BIOS has programmed on AP based on BSP's info we saved since BIOS
+	 * is always setting the same value for all threads/cores.
+	 */
+	if ((h & APIC_DM_FIXED_MASK) != APIC_DM_FIXED)
+		apic_write(APIC_LVTTHMR, lvtthmr_init);
+
+
 	if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) {
 		printk(KERN_DEBUG
 		       "CPU%d: Thermal monitoring handled by SMI\n", cpu);
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/cpu/mcheck/mce.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/cpu/mcheck/mce.c
@@ -91,6 +91,9 @@
 	pr_emerg("Run the message through 'mcelog --ascii' to decode.\n");
 }
 
+void				(*mce_cpu_specific_poll)(struct mce *);
+EXPORT_SYMBOL_GPL(mce_cpu_specific_poll);
+
 /*
  * CPU/chipset specific EDAC code can register a callback here to print
  * MCE errors in a human-readable form:
@@ -350,6 +353,11 @@
 	wrmsrl(msr, v);
 }
 
+static int under_injection(void)
+{
+	return __get_cpu_var(injectm).finished;
+}
+
 /*
  * Simple lockless ring to communicate PFNs from the exception handler with the
  * process context work function. This is vastly simplified because there's
@@ -553,6 +561,10 @@
 
 		if (!(flags & MCP_TIMESTAMP))
 			m.tsc = 0;
+
+		if (mce_cpu_specific_poll && !under_injection() && !mce_dont_log_ce)
+			mce_cpu_specific_poll(&m);
+
 		/*
 		 * Don't get the IP here because it's unlikely to
 		 * have anything to do with the actual error location.
@@ -1374,13 +1386,14 @@
 	struct timer_list *t = &__get_cpu_var(mce_timer);
 	int *n = &__get_cpu_var(mce_next_interval);
 
+	setup_timer(t, mcheck_timer, smp_processor_id());
+
 	if (mce_ignore_ce)
 		return;
 
 	*n = check_interval * HZ;
 	if (!*n)
 		return;
-	setup_timer(t, mcheck_timer, smp_processor_id());
 	t->expires = round_jiffies(jiffies + *n);
 	add_timer_on(t, smp_processor_id());
 }
@@ -1991,9 +2004,11 @@
 		break;
 	case CPU_DOWN_FAILED:
 	case CPU_DOWN_FAILED_FROZEN:
-		t->expires = round_jiffies(jiffies +
+		if (!mce_ignore_ce && check_interval) {
+			t->expires = round_jiffies(jiffies +
 					   __get_cpu_var(mce_next_interval));
-		add_timer_on(t, cpu);
+			add_timer_on(t, cpu);
+		}
 		smp_call_function_single(cpu, mce_reenable_cpu, &action, 1);
 		break;
 	case CPU_POST_DEAD:
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/cpu/mcheck/mce-xeon75xx.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/cpu/mcheck/mce-xeon75xx.c
@@ -0,0 +1,427 @@
+/*
+ * Xeon 7500 series specific machine check support code.
+ * Copyright 2009, 2010 Intel Corporation
+ * Author: Andi Kleen
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2
+ * of the License.
+ *
+ * Implement Xeon 7500 series specific code to retrieve the physical address
+ * and DIMM information for corrected memory errors.
+ *
+ * Interface: mce->aux0/aux1 is mapped to a struct pfa_dimm with pad
+ * redefined to DIMM valid bits. Consumers check CPUID and bank and
+ * then interpret aux0/aux1
+ */
+
+/* #define DEBUG 1 */	/* disable for production */
+#define pr_fmt(x) "MCE: " x
+
+#include <linux/moduleparam.h>
+#include <linux/pci_ids.h>
+#include <linux/hrtimer.h>
+#include <linux/string.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/ktime.h>
+#include <linux/init.h>
+#include <linux/pci.h>
+#include <asm/processor.h>
+#include <asm/e820.h>
+#include <asm/mce.h>
+#include <asm/io.h>
+
+#include "mce-internal.h"
+
+#define PFA_SIG "$PFA"
+#define PFA_SIG_LEN 4
+
+/* DIMM description */
+struct aux_pfa_dimm {
+	u8  fbd_channel_id;
+	u8  ddr_channel_id;
+	u8  ddr_dimm_id;
+	u8  ddr_rank_id;
+	u8  ddr_dimm_bank_id;
+	u8  ddr_dimm_row_id;
+	u8  ddr_dimm_column_id;
+	u8  valid;
+} __attribute__((packed));
+
+struct pfa_dimm {
+	u8  fbd_channel_id;
+	u8  ddr_channel_id;
+	u8  ddr_dimm_id;
+	u8  ddr_rank_id;
+	u8  ddr_dimm_bank_id;
+	u32 ddr_dimm_row_id;
+	u32 ddr_dimm_column_id;
+} __attribute__((packed));
+
+/* Memory translation table in memory. */
+struct pfa_table {
+	u8  sig[PFA_SIG_LEN];	/* Signature: '$PFA' */
+	u16 len;		/* total length */
+	u16 revision;		/* 0x11 */
+	u8  checksum;		/* 8bit sum to zero */
+	u8  db_value;		/* mailbox port command value */
+	u8  db_port;		/* mailbox port */
+	/* end of header; end of checksum */
+	u8  command;		/* input command */
+	u32 valid;		/* valid input/output bits */
+	u16 status;		/* output status */
+	u8  socket_id;		/* input socket id*/
+	u8  bank_id;		/* input MCE bank id */
+	u32 pad1;
+	u64 mbox_address;
+	u64 physical_addr;	/* physical address */
+	struct pfa_dimm dimm[2];
+	/*
+	 * topology information follows: not used for now.
+	 */
+} __attribute__((packed));
+
+/* DIMM valid bits in valid: DIMM0: 8..12; DIMM1 16..20 */
+#define DIMM_VALID_BITS(val, num) (((val) >> (4 + (num) * 8)) & DIMM_VALID_ALL)
+#define DIMM_SET_VALID(val, num)  ((val) << (4 + (num) * 8))
+
+enum {
+	MCE_BANK_MBOX0		= 8,
+	MCE_BANK_MBOX1		= 9,
+
+	PFA_REVISION		= 0x11,		/* v1.1 */
+
+	/* Status bits for valid field */
+	PFA_VALID_MA            = (1 << 0),
+	PFA_VALID_SOCKETID      = (1 << 1),
+	PFA_VALID_BANKID        = (1 << 2),
+	PFA_VALID_PA            = (1 << 3),
+
+	/* DIMM valid bits in valid */
+	/* use with DIMM_VALID_BITS/DIMM_SET_VALID for pfa->valid */
+	DIMM_VALID_FBD_CHAN      = (1 << 0),
+	DIMM_VALID_DDR_CHAN      = (1 << 1),
+	DIMM_VALID_DDR_DIMM      = (1 << 2),
+	DIMM_VALID_DDR_RANK      = (1 << 3),
+	DIMM_VALID_DIMM_BANK     = (1 << 4),
+	DIMM_VALID_DIMM_ROW      = (1 << 5),
+	DIMM_VALID_DIMM_COLUMN   = (1 << 6),
+	DIMM_VALID_ALL		 = 0x7f,
+
+	PFA_DIMM_VALID_MASK	 = DIMM_SET_VALID(DIMM_VALID_ALL, 0)
+				 | DIMM_SET_VALID(DIMM_VALID_ALL, 1),
+
+	/* Values for status field */
+	PFA_STATUS_SUCCESS      = 0,
+	PFA_STATUS_SOCKET_INVALID  = (1 << 1),
+	PFA_STATUS_MBOX_INVALID = (1 << 2),
+	PFA_STATUS_MA_INVALID   = (1 << 3),
+	PFA_STATUS_PA_INVALID   = (1 << 4),
+
+	/* Values for command field */
+	PFA_CMD_GET_MEM_CORR_ERR_PA = 0,
+	PFA_CMD_PA_TO_DIMM_ADDR     = 1,
+	PFA_CMD_DIMM_TO_PA	    = 2,
+	PFA_CMD_GET_TOPOLOGY	    = 3,
+
+	/* PCI device IDs and the base register */
+	ICH_PFA_CFG             = 0x8c, /* SCRATCH4 */
+	PCI_DEVICE_ID_BXB_ICH_LEGACY0 = 0x3422,
+};
+
+static struct pfa_table *pfa_table __read_mostly;
+static int memerr_max_conv_rate __read_mostly = 100;
+static int memerr_min_interval __read_mostly = 500;
+static int pfa_lost;	/* for diagnosis */
+
+enum {
+	RATE_LIMIT_PERIOD = USEC_PER_SEC, /* in us; period of rate limit */
+};
+
+module_param(memerr_max_conv_rate, int, 0644);
+MODULE_PARM_DESC(memerr_max_conv_rate,
+	"Maximum number of memory error conversions each second; 0 to disable");
+module_param(memerr_min_interval, int, 0644);
+MODULE_PARM_DESC(memerr_min_interval,
+	"Minimum time delta between two memory conversions; in us; default 500");
+
+static int notest;
+static int nocsum;
+module_param(notest, int, 0);
+module_param(nocsum, int, 0);
+
+static u64 encode_dimm(struct pfa_dimm *d, u8 valid)
+{
+	union {
+		struct aux_pfa_dimm d;
+		u64 v;
+	} p;
+
+	BUILD_BUG_ON(sizeof(struct aux_pfa_dimm) != sizeof(u64));
+	p.d.fbd_channel_id = d->fbd_channel_id;
+	p.d.ddr_channel_id = d->ddr_channel_id;
+	p.d.ddr_dimm_id = d->ddr_dimm_id;
+	p.d.ddr_rank_id = d->ddr_rank_id;
+	p.d.ddr_dimm_bank_id = d->ddr_dimm_bank_id;
+	p.d.ddr_dimm_row_id = d->ddr_dimm_row_id;
+	if (p.d.ddr_dimm_row_id != d->ddr_dimm_row_id) /* truncated? */
+		valid &= ~DIMM_VALID_DIMM_ROW;
+	p.d.ddr_dimm_column_id = d->ddr_dimm_column_id;
+	if (p.d.ddr_dimm_column_id != d->ddr_dimm_column_id)
+		valid &= ~DIMM_VALID_DIMM_COLUMN;
+	p.d.valid = valid;
+	pr_debug("PFA fbd_ch %u ddr_ch %u dimm %u rank %u bank %u valid %x\n",
+		 d->fbd_channel_id,
+		 d->ddr_channel_id,
+		 d->ddr_dimm_id,
+		 d->ddr_rank_id,
+		 d->ddr_dimm_bank_id,
+		 valid);
+	return p.v;
+}
+
+static u8 csum(u8 *table, u16 len)
+{
+	u8 sum = 0;
+	int i;
+	for (i = 0; i < len; i++)
+		sum += *table++;
+	return sum;
+}
+
+/*
+ * Execute a command through the mailbox interface.
+ */
+static int
+pfa_command(unsigned bank, unsigned socketid, unsigned command, unsigned valid)
+{
+	pfa_table->bank_id = bank;
+	pfa_table->socket_id = socketid;
+	pfa_table->valid = valid | PFA_VALID_SOCKETID;
+	pfa_table->command = command;
+
+	outb(pfa_table->db_value, pfa_table->db_port);
+
+	mb();	/* Reread fields after they got changed */
+
+	if (pfa_table->status != PFA_STATUS_SUCCESS) {
+		pr_debug("Memory PFA command %d failed: socket:%d bank:%d status:%x\n",
+			command, socketid, bank, pfa_table->status);
+		return -pfa_table->status;
+	}
+	return 0;
+}
+
+/*
+ * Retrieve physical address and DIMMs.
+ */
+static int translate_memory_error(struct mce *m)
+{
+	struct pfa_table *pfa = pfa_table;
+	u64 status;
+	int ret;
+	u32 valid;
+	int cpu = smp_processor_id();
+
+	/* Make sure our structures match the specification */
+	BUILD_BUG_ON(offsetof(struct pfa_table, physical_addr) != 0x20);
+	BUILD_BUG_ON(offsetof(struct pfa_table, status) != 0x10);
+	BUILD_BUG_ON(offsetof(struct pfa_table, physical_addr) != 0x20);
+	BUILD_BUG_ON(offsetof(struct pfa_table, dimm[1].ddr_dimm_column_id) !=
+			0x3e);
+
+	/* Ask for PA/DIMMs of last error */
+	if (pfa_command(m->bank, m->socketid,
+			PFA_CMD_GET_MEM_CORR_ERR_PA, PFA_VALID_BANKID) < 0)
+		return -1;
+
+	/*
+	 * Recheck machine check bank. If the overflow bit was set
+	 * there was a race. Don't use the information in this case.
+	 */
+	rdmsrl(MSR_IA32_MCx_STATUS(m->bank), status);
+	if (status & MCI_STATUS_OVER) {
+		pr_debug("%d: overflow race on bank %d\n", cpu, m->bank);
+		return -1;
+	}
+
+	ret = -1;
+	valid = pfa->valid;
+	if (valid & PFA_VALID_PA) {
+		m->status |= MCI_STATUS_ADDRV;
+		m->addr = pfa_table->physical_addr;
+		pr_debug("%d: got physical address %llx valid %x\n",
+			cpu, m->addr, valid);
+		ret = 0;
+	}
+
+	/* When DIMM information was supplied pass it out */
+	if (valid & PFA_DIMM_VALID_MASK) {
+		m->aux0 = encode_dimm(&pfa->dimm[0], DIMM_VALID_BITS(valid, 0));
+		m->aux1 = encode_dimm(&pfa->dimm[1], DIMM_VALID_BITS(valid, 1));
+		ret = 0;
+	}
+
+	return ret;
+}
+
+/*
+ * Xeon 75xx specific mce poll method to retrieve the physical address
+ * and DIMM information.
+ */
+static void xeon75xx_mce_poll(struct mce *m)
+{
+	static DEFINE_SPINLOCK(convert_lock); /* Protect table and static */
+	static unsigned long cperm;
+	static ktime_t last, last_int;
+	unsigned long flags;
+	ktime_t now;
+	s64 delta;
+
+	/* Memory error? */
+	if (m->bank != MCE_BANK_MBOX0 && m->bank != MCE_BANK_MBOX1)
+		return;
+	if (m->status & MCI_STATUS_OVER)
+		return;
+	if (memerr_max_conv_rate == 0)
+		return;
+
+	spin_lock_irqsave(&convert_lock, flags);
+	/*
+	 * Rate limit conversions. The conversion takes some time,
+	 * but it's not good to use all the CPU time during a error
+	 * flood.
+	 * Enforce maximum number per second and minimum interval.
+	 * The ktime call should use TSC on this machine and be fast.
+	 */
+	now = ktime_get();
+	delta = ktime_us_delta(now, last);
+	if (delta >= RATE_LIMIT_PERIOD) {
+		cperm = 0;
+		last = now;
+	}
+	if (ktime_us_delta(now, last_int) >= memerr_min_interval &&
+	   ++cperm <= memerr_max_conv_rate) {
+		if (translate_memory_error(m) < 0) {
+			/* On error stop converting for the next second */
+			cperm = memerr_max_conv_rate;
+			pr_debug("PFA translation failed\n");
+		}
+	} else
+		pfa_lost++;
+	last_int = now;
+	spin_unlock_irqrestore(&convert_lock, flags);
+}
+
+static struct pci_device_id bxb_mce_pciids[] = {
+	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_BXB_ICH_LEGACY0) },
+	{}
+};
+
+static int __init xeon75xx_mce_init(void)
+{
+	u32 addr = 0;
+	struct pci_dev *dev;
+
+	if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL ||
+	    boot_cpu_data.x86 != 6 ||
+	    boot_cpu_data.x86_model != 0x2e)
+		return -ENODEV;
+
+	/*
+	 * Get table address from register in IOH.
+	 * This just looks up the device, because we don't want to "own" it.
+	 */
+	dev = NULL;
+	while ((dev = pci_get_device(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, dev))
+			!= NULL) {
+		if (!pci_match_id(bxb_mce_pciids, dev))
+			continue;
+		pci_read_config_dword(dev, ICH_PFA_CFG, &addr);
+		if (addr)
+			break;
+	}
+	pci_dev_put(dev);
+	if (!addr)
+		return -ENODEV;
+
+	if (!e820_all_mapped(addr, addr + PAGE_SIZE, E820_RESERVED)) {
+		pr_info("PFA table at %x not e820 reserved\n", addr);
+		return -ENODEV;
+	}
+
+	pfa_table = (__force struct pfa_table *)ioremap_cache(addr, PAGE_SIZE);
+	if (!pfa_table) {
+		pr_err("Cannot map PFA table at %x\n", addr);
+		return -EIO;
+	}
+
+	if (memcmp(&pfa_table->sig, PFA_SIG, PFA_SIG_LEN) ||
+	    pfa_table->len < sizeof(struct pfa_table) ||
+	    /* assume newer versions are compatible */
+	    pfa_table->revision < PFA_REVISION) {
+		pr_info("PFA table at %x invalid\n", addr);
+		goto error_unmap;
+	}
+
+	if (!nocsum && csum((u8 *)pfa_table,
+				offsetof(struct pfa_table, command))) {
+		pr_info("PFA table at %x length %u has invalid checksum\n",
+			addr, pfa_table->len);
+		goto error_unmap;
+	}
+
+	/* Not strictly needed today */
+	if (pfa_table->len > PAGE_SIZE) {
+		unsigned len = roundup(pfa_table->len, PAGE_SIZE);
+		iounmap(pfa_table);
+		pfa_table = (__force void *)ioremap_cache(addr, len);
+		if (!pfa_table) {
+			pr_err("Cannot remap %u bytes PFA table at %x\n",
+				len, addr);
+			return -EIO;
+		}
+	}
+
+	if (!notest) {
+		int status = pfa_command(0, 0, PFA_CMD_GET_TOPOLOGY, 0);
+		if (status < 0) {
+			pr_err("Test of PFA table failed: %x\n", -status);
+			goto error_unmap;
+		}
+	}
+
+	pr_info("Found Xeon75xx PFA memory error translation table at %x\n",
+		addr);
+	mb();
+	mce_cpu_specific_poll = xeon75xx_mce_poll;
+	return 0;
+
+error_unmap:
+	iounmap(pfa_table);
+	return -ENODEV;
+}
+
+MODULE_DEVICE_TABLE(pci, bxb_mce_pciids);
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR("Andi Kleen");
+MODULE_DESCRIPTION("Intel Xeon 75xx specific DIMM error reporting");
+
+#ifdef CONFIG_MODULE
+static void __exit xeon75xx_mce_exit(void)
+{
+	mce_cpu_specific_poll = NULL;
+	wmb();
+	/* Wait for all machine checks to finish before really unloading */
+	synchronize_rcu();
+	iounmap(pfa_table);
+}
+
+module_init(xeon75xx_mce_init);
+module_exit(xeon75xx_mce_exit);
+#else
+/* When built-in run as soon as the PCI subsystem is up */
+fs_initcall(xeon75xx_mce_init);
+#endif
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/cpu/mcheck/Makefile
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/cpu/mcheck/Makefile
@@ -2,6 +2,7 @@
 
 obj-$(CONFIG_X86_ANCIENT_MCE)	+= winchip.o p5.o
 obj-$(CONFIG_X86_MCE_INTEL)	+= mce_intel.o
+obj-$(CONFIG_X86_MCE_XEON75XX)	+= mce-xeon75xx.o
 obj-$(CONFIG_X86_MCE_AMD)	+= mce_amd.o
 obj-$(CONFIG_X86_MCE_THRESHOLD) += threshold.o
 obj-$(CONFIG_X86_MCE_INJECT)	+= mce-inject.o
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -140,6 +140,7 @@
 				address = (low & MASK_BLKPTR_LO) >> 21;
 				if (!address)
 					break;
+
 				address += MCG_XBLK_ADDR;
 			} else
 				++address;
@@ -147,12 +148,8 @@
 			if (rdmsr_safe(address, &low, &high))
 				break;
 
-			if (!(high & MASK_VALID_HI)) {
-				if (block)
-					continue;
-				else
-					break;
-			}
+			if (!(high & MASK_VALID_HI))
+				continue;
 
 			if (!(high & MASK_CNTP_HI)  ||
 			     (high & MASK_LOCKED_HI))
@@ -471,6 +468,7 @@
 out_free:
 	if (b) {
 		kobject_put(&b->kobj);
+		list_del(&b->miscj);
 		kfree(b);
 	}
 	return err;
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/cpu/mcheck/mce-internal.h
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/cpu/mcheck/mce-internal.h
@@ -28,3 +28,4 @@
 
 extern struct mce_bank *mce_banks;
 
+extern void (*mce_cpu_specific_poll)(struct mce *);
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c
@@ -45,6 +45,7 @@
 	CPU_DOTHAN_A1,
 	CPU_DOTHAN_A2,
 	CPU_DOTHAN_B0,
+	CPU_DOTHAN_C0,
 	CPU_MP4HT_D0,
 	CPU_MP4HT_E0,
 };
@@ -54,6 +55,7 @@
 	[CPU_DOTHAN_A1]	= { 6, 13, 1 },
 	[CPU_DOTHAN_A2]	= { 6, 13, 2 },
 	[CPU_DOTHAN_B0]	= { 6, 13, 6 },
+	[CPU_DOTHAN_C0]	= { 6, 13, 8 },
 	[CPU_MP4HT_D0]	= {15,  3, 4 },
 	[CPU_MP4HT_E0]	= {15,  4, 1 },
 };
@@ -196,6 +198,88 @@
 };
 #undef OP
 
+
+#define OPEX(mhz, base, mva, mvb, mvc, mvd)                     \
+{                                                               \
+        .frequency = (mhz) * 1000,                              \
+        .index = (((mhz)/(base)) << 8) | ((mva - 700) / 16)     \
+}
+
+/* Intel Pentium M processor 730 / 1.60 GHz (Sonoma) */
+static struct cpufreq_frequency_table sonoma_1596[] =
+{
+        OPEX( 798, 133,  988,  988,  988,  988),
+        OPEX(1064, 133, 1116, 1111, 1084, 1079),
+        OPEX(1330, 133, 1244, 1233, 1180, 1169),
+        OPEX(1596, 133, 1356, 1356, 1260, 1260),
+        { .frequency = CPUFREQ_TABLE_END }
+};
+
+/* Intel Pentium M processor 740 / 1.73 GHz (Sonoma) */
+static struct cpufreq_frequency_table sonoma_1729[] =
+{
+        OPEX( 798, 133,  988,  988,  988,  988),
+        OPEX(1064, 133, 1100, 1093, 1068, 1066),
+        OPEX(1330, 133, 1212, 1198, 1148, 1143),
+        OPEX(1729, 133, 1356, 1356, 1260, 1260),
+        { .frequency = CPUFREQ_TABLE_END }
+};
+
+/* Intel Pentium M processor 750 / 1.86 GHz (Sonoma) */
+static struct cpufreq_frequency_table sonoma_1862[] =
+{
+        OPEX( 798, 133,  988,  988,  988,  988),
+        OPEX(1064, 133, 1084, 1080, 1068, 1056),
+        OPEX(1330, 133, 1180, 1172, 1132, 1124),
+        OPEX(1596, 133, 1276, 1264, 1196, 1192),
+        OPEX(1862, 133, 1356, 1356, 1260, 1260),
+        { .frequency = CPUFREQ_TABLE_END }
+};
+
+/* Intel Pentium M processor 760 / 2.00 GHz (Sonoma) */
+static struct cpufreq_frequency_table sonoma_1995[] =
+{
+        OPEX( 798, 133, 988, 988, 988, 988),
+        OPEX(1064, 133, 1084, 1070, 1052, 1048),
+        OPEX(1330, 133, 1164, 1152, 1116, 1109),
+        OPEX(1596, 133, 1244, 1233, 1180, 1169),
+        OPEX(1995, 133, 1356, 1356, 1260, 1260),
+        { .frequency = CPUFREQ_TABLE_END }
+};
+/* Intel Pentium M processor 770 / 2.13 GHz (Sonoma) */
+static struct cpufreq_frequency_table sonoma_2128[] =
+{
+        OPEX( 798, 133, 988, 988, 988, 988),
+        OPEX(1064, 133, 1068, 1065, 1052, 1042),
+        OPEX(1330, 133, 1148, 1142, 1100, 1097),
+        OPEX(1596, 133, 1228, 1218, 1164, 1151),
+        OPEX(1862, 133, 1308, 1295, 1212, 1206),
+        OPEX(2128, 133, 1372, 1372, 1260, 1260),
+        { .frequency = CPUFREQ_TABLE_END }
+};
+
+/* Intel Pentium M processor 780 / 2.26 GHz (Sonoma) */
+static struct cpufreq_frequency_table sonoma_2261[] =
+{
+        OPEX( 798, 133, 988, 988, 988, 988),
+        OPEX(1064, 133, 1068, 1064, 1052, 1037),
+        OPEX(1330, 133, 1148, 1139, 1100, 1087),
+        OPEX(1596, 133, 1228, 1215, 1148, 1136),
+        OPEX(1862, 133, 1292, 1291, 1196, 1186),
+        OPEX(2261, 133, 1404, 1404, 1260, 1260),
+        { .frequency = CPUFREQ_TABLE_END }
+};
+
+#undef OPEX
+
+#define SONOMA(cpuid, max, base, name)  \
+{       .cpu_id         = cpuid,        \
+        .model_name     = "Intel(R) Pentium(R) M processor " name "GHz", \
+        .max_freq       = (max)*1000,   \
+        .op_points      = sonoma_##max, \
+}
+
+
 #define _BANIAS(cpuid, max, name)	\
 {	.cpu_id		= cpuid,	\
 	.model_name	= "Intel(R) Pentium(R) M processor " name "MHz", \
@@ -218,6 +302,15 @@
 	BANIAS(1600),
 	BANIAS(1700),
 
+        /* Builtin tables for Dothan C0 CPUs, a.k.a Sonoma */
+        SONOMA(&cpu_ids[CPU_DOTHAN_C0], 1596, 133, "1.60"),
+        SONOMA(&cpu_ids[CPU_DOTHAN_C0], 1729, 133, "1.73"),
+        SONOMA(&cpu_ids[CPU_DOTHAN_C0], 1862, 133, "1.86"),
+        SONOMA(&cpu_ids[CPU_DOTHAN_C0], 1995, 133, "2.00"),
+        SONOMA(&cpu_ids[CPU_DOTHAN_C0], 2128, 133, "2.13"),
+        SONOMA(&cpu_ids[CPU_DOTHAN_C0], 2261, 133, "2.26"),
+
+
 	/* NULL model_name is a wildcard */
 	{ &cpu_ids[CPU_DOTHAN_A1], NULL, 0, NULL },
 	{ &cpu_ids[CPU_DOTHAN_A2], NULL, 0, NULL },
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
@@ -929,7 +929,8 @@
 		powernow_table[i].index = index;
 
 		/* Frequency may be rounded for these */
-		if (boot_cpu_data.x86 == 0x10 || boot_cpu_data.x86 == 0x11) {
+		if ((boot_cpu_data.x86 == 0x10 && boot_cpu_data.x86_model < 10)
+				 || boot_cpu_data.x86 == 0x11) {
 			powernow_table[i].frequency =
 				freq_from_fid_did(lo & 0x3f, (lo >> 6) & 7);
 		} else
@@ -1351,6 +1352,7 @@
 
 	kfree(data->powernow_table);
 	kfree(data);
+	per_cpu(powernow_data, pol->cpu) = NULL;
 
 	return 0;
 }
@@ -1370,7 +1372,7 @@
 	int err;
 
 	if (!data)
-		return -EINVAL;
+		return 0;
 
 	smp_call_function_single(cpu, query_values_on_cpu, &err, true);
 	if (err)
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
@@ -741,6 +741,7 @@
 		per_cpu(drv_data, policy->cpu) = NULL;
 		acpi_processor_unregister_performance(data->acpi_data,
 						      policy->cpu);
+		kfree(data->freq_table);
 		kfree(data);
 	}
 
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/acpi/cstate.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/acpi/cstate.c
@@ -48,7 +48,7 @@
 	 * P4, Core and beyond CPUs
 	 */
 	if (c->x86_vendor == X86_VENDOR_INTEL &&
-	    (c->x86 > 0xf || (c->x86 == 6 && c->x86_model >= 14)))
+	    (c->x86 > 0xf || (c->x86 == 6 && c->x86_model >= 0x0f)))
 			flags->bm_control = 0;
 }
 EXPORT_SYMBOL(acpi_processor_power_init_bm_check);
@@ -145,6 +145,15 @@
 		percpu_entry->states[cx->index].eax = cx->address;
 		percpu_entry->states[cx->index].ecx = MWAIT_ECX_INTERRUPT_BREAK;
 	}
+
+	/*
+	 * For _CST FFH on Intel, if GAS.access_size bit 1 is cleared,
+	 * then we should skip checking BM_STS for this C-state.
+	 * ref: "Intel Processor Vendor-Specific ACPI Interface Specification"
+	 */
+	if ((c->x86_vendor == X86_VENDOR_INTEL) && !(reg->access_size & 0x2))
+		cx->bm_sts_skip = 1;
+
 	return retval;
 }
 EXPORT_SYMBOL_GPL(acpi_processor_ffh_cstate_probe);
--- linux-mvl-dove-2.6.32.orig/arch/x86/kernel/acpi/boot.c
+++ linux-mvl-dove-2.6.32/arch/x86/kernel/acpi/boot.c
@@ -70,6 +70,7 @@
 int acpi_sci_override_gsi __initdata;
 int acpi_skip_timer_override __initdata;
 int acpi_use_timer_override __initdata;
+int acpi_fix_pin2_polarity __initdata;
 
 #ifdef CONFIG_X86_LOCAL_APIC
 static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE;
@@ -360,10 +361,15 @@
 		return 0;
 	}
 
-	if (acpi_skip_timer_override &&
-	    intsrc->source_irq == 0 && intsrc->global_irq == 2) {
-		printk(PREFIX "BIOS IRQ0 pin2 override ignored.\n");
-		return 0;
+	if (intsrc->source_irq == 0 && intsrc->global_irq == 2) {
+		if (acpi_skip_timer_override) {
+			printk(PREFIX "BIOS IRQ0 pin2 override ignored.\n");
+			return 0;
+		}
+		if (acpi_fix_pin2_polarity && (intsrc->inti_flags & ACPI_MADT_POLARITY_MASK)) {
+			intsrc->inti_flags &= ~ACPI_MADT_POLARITY_MASK;
+			printk(PREFIX "BIOS IRQ0 pin2 override: forcing polarity to high active.\n");
+		}
 	}
 
 	mp_override_legacy_irq(intsrc->source_irq,
@@ -446,6 +452,12 @@
 int acpi_gsi_to_irq(u32 gsi, unsigned int *irq)
 {
 	*irq = gsi;
+
+#ifdef CONFIG_X86_IO_APIC
+	if (acpi_irq_model == ACPI_IRQ_MODEL_IOAPIC)
+		setup_IO_APIC_irq_extra(gsi);
+#endif
+
 	return 0;
 }
 
@@ -473,7 +485,8 @@
 		plat_gsi = mp_register_gsi(dev, gsi, trigger, polarity);
 	}
 #endif
-	acpi_gsi_to_irq(plat_gsi, &irq);
+	irq = plat_gsi;
+
 	return irq;
 }
 
@@ -1184,9 +1197,6 @@
 		if (!error) {
 			acpi_lapic = 1;
 
-#ifdef CONFIG_X86_BIGSMP
-			generic_bigsmp_probe();
-#endif
 			/*
 			 * Parse MADT IO-APIC entries
 			 */
@@ -1196,8 +1206,6 @@
 				acpi_ioapic = 1;
 
 				smp_found_config = 1;
-				if (apic->setup_apic_routing)
-					apic->setup_apic_routing();
 			}
 		}
 		if (error == -EINVAL) {
@@ -1348,14 +1356,6 @@
 	 },
 	{
 	 .callback = force_acpi_ht,
-	 .ident = "ASUS P2B-DS",
-	 .matches = {
-		     DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
-		     DMI_MATCH(DMI_BOARD_NAME, "P2B-DS"),
-		     },
-	 },
-	{
-	 .callback = force_acpi_ht,
 	 .ident = "ASUS CUR-DLS",
 	 .matches = {
 		     DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
--- linux-mvl-dove-2.6.32.orig/arch/x86/kvm/mmu.h
+++ linux-mvl-dove-2.6.32/arch/x86/kvm/mmu.h
@@ -37,6 +37,12 @@
 #define PT32_ROOT_LEVEL 2
 #define PT32E_ROOT_LEVEL 3
 
+#define PFERR_PRESENT_MASK (1U << 0)
+#define PFERR_WRITE_MASK (1U << 1)
+#define PFERR_USER_MASK (1U << 2)
+#define PFERR_RSVD_MASK (1U << 3)
+#define PFERR_FETCH_MASK (1U << 4)
+
 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4]);
 
 static inline void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
--- linux-mvl-dove-2.6.32.orig/arch/x86/kvm/lapic.c
+++ linux-mvl-dove-2.6.32/arch/x86/kvm/lapic.c
@@ -374,6 +374,12 @@
 		if (unlikely(!apic_enabled(apic)))
 			break;
 
+		if (trig_mode) {
+			apic_debug("level trig mode for vector %d", vector);
+			apic_set_vector(vector, apic->regs + APIC_TMR);
+		} else
+			apic_clear_vector(vector, apic->regs + APIC_TMR);
+
 		result = !apic_test_and_set_irr(vector, apic);
 		trace_kvm_apic_accept_irq(vcpu->vcpu_id, delivery_mode,
 					  trig_mode, vector, !result);
@@ -384,11 +390,6 @@
 			break;
 		}
 
-		if (trig_mode) {
-			apic_debug("level trig mode for vector %d", vector);
-			apic_set_vector(vector, apic->regs + APIC_TMR);
-		} else
-			apic_clear_vector(vector, apic->regs + APIC_TMR);
 		kvm_vcpu_kick(vcpu);
 		break;
 
@@ -1156,6 +1157,7 @@
 	hrtimer_cancel(&apic->lapic_timer.timer);
 	update_divide_count(apic);
 	start_apic_timer(apic);
+	apic->irr_pending = true;
 }
 
 void __kvm_migrate_apic_timer(struct kvm_vcpu *vcpu)
--- linux-mvl-dove-2.6.32.orig/arch/x86/kvm/mmu.c
+++ linux-mvl-dove-2.6.32/arch/x86/kvm/mmu.c
@@ -136,12 +136,6 @@
 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
 			| PT64_NX_MASK)
 
-#define PFERR_PRESENT_MASK (1U << 0)
-#define PFERR_WRITE_MASK (1U << 1)
-#define PFERR_USER_MASK (1U << 2)
-#define PFERR_RSVD_MASK (1U << 3)
-#define PFERR_FETCH_MASK (1U << 4)
-
 #define PT_PDPE_LEVEL 3
 #define PT_DIRECTORY_LEVEL 2
 #define PT_PAGE_TABLE_LEVEL 1
@@ -227,7 +221,7 @@
 }
 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
 
-static int is_write_protection(struct kvm_vcpu *vcpu)
+static bool is_write_protection(struct kvm_vcpu *vcpu)
 {
 	return vcpu->arch.cr0 & X86_CR0_WP;
 }
@@ -477,7 +471,7 @@
 
 	addr = gfn_to_hva(kvm, gfn);
 	if (kvm_is_error_hva(addr))
-		return page_size;
+		return PT_PAGE_TABLE_LEVEL;
 
 	down_read(&current->mm->mmap_sem);
 	vma = find_vma(current->mm, addr);
@@ -515,11 +509,9 @@
 	if (host_level == PT_PAGE_TABLE_LEVEL)
 		return host_level;
 
-	for (level = PT_DIRECTORY_LEVEL; level <= host_level; ++level) {
-
+	for (level = PT_DIRECTORY_LEVEL; level <= host_level; ++level)
 		if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
 			break;
-	}
 
 	return level - 1;
 }
@@ -1504,8 +1496,8 @@
 		for_each_sp(pages, sp, parents, i) {
 			kvm_mmu_zap_page(kvm, sp);
 			mmu_pages_clear_parents(&parents);
+			zapped++;
 		}
-		zapped += pages.nr;
 		kvm_mmu_pages_init(parent, &parents, &pages);
 	}
 
@@ -1556,14 +1548,16 @@
 	 */
 
 	if (used_pages > kvm_nr_mmu_pages) {
-		while (used_pages > kvm_nr_mmu_pages) {
+		while (used_pages > kvm_nr_mmu_pages &&
+			!list_empty(&kvm->arch.active_mmu_pages)) {
 			struct kvm_mmu_page *page;
 
 			page = container_of(kvm->arch.active_mmu_pages.prev,
 					    struct kvm_mmu_page, link);
-			kvm_mmu_zap_page(kvm, page);
+			used_pages -= kvm_mmu_zap_page(kvm, page);
 			used_pages--;
 		}
+		kvm_nr_mmu_pages = used_pages;
 		kvm->arch.n_free_mmu_pages = 0;
 	}
 	else
@@ -1610,7 +1604,8 @@
 		    && !sp->role.invalid) {
 			pgprintk("%s: zap %lx %x\n",
 				 __func__, gfn, sp->role.word);
-			kvm_mmu_zap_page(kvm, sp);
+			if (kvm_mmu_zap_page(kvm, sp))
+				nn = bucket->first;
 		}
 	}
 }
@@ -1641,7 +1636,7 @@
 {
 	struct page *page;
 
-	gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
+	gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
 
 	if (gpa == UNMAPPED_GVA)
 		return NULL;
@@ -1848,6 +1843,9 @@
 
 		spte |= PT_WRITABLE_MASK;
 
+		if (!tdp_enabled && !(pte_access & ACC_WRITE_MASK))
+			spte &= ~PT_USER_MASK;
+
 		/*
 		 * Optimization: for pte sync, if spte was writable the hash
 		 * lookup is unnecessary (and expensive). Write protection
@@ -1903,6 +1901,8 @@
 
 			child = page_header(pte & PT64_BASE_ADDR_MASK);
 			mmu_page_remove_parent_pte(child, sptep);
+			__set_spte(sptep, shadow_trap_nonpresent_pte);
+			kvm_flush_remote_tlbs(vcpu->kvm);
 		} else if (pfn != spte_to_pfn(*sptep)) {
 			pgprintk("hfn old %lx new %lx\n",
 				 spte_to_pfn(*sptep), pfn);
@@ -2096,11 +2096,13 @@
 			direct = 1;
 		if (mmu_check_root(vcpu, root_gfn))
 			return 1;
+		spin_lock(&vcpu->kvm->mmu_lock);
 		sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
 				      PT64_ROOT_LEVEL, direct,
 				      ACC_ALL, NULL);
 		root = __pa(sp->spt);
 		++sp->root_count;
+		spin_unlock(&vcpu->kvm->mmu_lock);
 		vcpu->arch.mmu.root_hpa = root;
 		return 0;
 	}
@@ -2122,11 +2124,14 @@
 			root_gfn = 0;
 		if (mmu_check_root(vcpu, root_gfn))
 			return 1;
+		spin_lock(&vcpu->kvm->mmu_lock);
 		sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
 				      PT32_ROOT_LEVEL, direct,
 				      ACC_ALL, NULL);
 		root = __pa(sp->spt);
 		++sp->root_count;
+		spin_unlock(&vcpu->kvm->mmu_lock);
+
 		vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
 	}
 	vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
@@ -2164,8 +2169,11 @@
 	spin_unlock(&vcpu->kvm->mmu_lock);
 }
 
-static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
+static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
+				  u32 access, u32 *error)
 {
+	if (error)
+		*error = 0;
 	return vaddr;
 }
 
@@ -2447,6 +2455,7 @@
 		r = paging32_init_context(vcpu);
 
 	vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
+	vcpu->arch.mmu.base_role.cr0_wp = is_write_protection(vcpu);
 
 	return r;
 }
@@ -2486,7 +2495,9 @@
 		goto out;
 	spin_lock(&vcpu->kvm->mmu_lock);
 	kvm_mmu_free_some_pages(vcpu);
+	spin_unlock(&vcpu->kvm->mmu_lock);
 	r = mmu_alloc_roots(vcpu);
+	spin_lock(&vcpu->kvm->mmu_lock);
 	mmu_sync_roots(vcpu);
 	spin_unlock(&vcpu->kvm->mmu_lock);
 	if (r)
@@ -2749,7 +2760,7 @@
 	if (tdp_enabled)
 		return 0;
 
-	gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
+	gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
 
 	spin_lock(&vcpu->kvm->mmu_lock);
 	r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
@@ -3247,7 +3258,7 @@
 		if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
 			audit_mappings_page(vcpu, ent, va, level - 1);
 		else {
-			gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
+			gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, va, NULL);
 			gfn_t gfn = gpa >> PAGE_SHIFT;
 			pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
 			hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
--- linux-mvl-dove-2.6.32.orig/arch/x86/kvm/emulate.c
+++ linux-mvl-dove-2.6.32/arch/x86/kvm/emulate.c
@@ -75,6 +75,7 @@
 #define Group       (1<<14)     /* Bits 3:5 of modrm byte extend opcode */
 #define GroupDual   (1<<15)     /* Alternate decoding of mod == 3 */
 #define GroupMask   0xff        /* Group number stored in bits 0:7 */
+#define Priv        (1<<27) /* instruction generates #GP if current CPL != 0 */
 /* Source 2 operand type */
 #define Src2None    (0<<29)
 #define Src2CL      (1<<29)
@@ -86,6 +87,7 @@
 enum {
 	Group1_80, Group1_81, Group1_82, Group1_83,
 	Group1A, Group3_Byte, Group3, Group4, Group5, Group7,
+	Group8, Group9,
 };
 
 static u32 opcode_table[256] = {
@@ -203,7 +205,7 @@
 	SrcNone | ByteOp | ImplicitOps, SrcNone | ImplicitOps,
 	/* 0xF0 - 0xF7 */
 	0, 0, 0, 0,
-	ImplicitOps, ImplicitOps, Group | Group3_Byte, Group | Group3,
+	ImplicitOps | Priv, ImplicitOps, Group | Group3_Byte, Group | Group3,
 	/* 0xF8 - 0xFF */
 	ImplicitOps, 0, ImplicitOps, ImplicitOps,
 	ImplicitOps, ImplicitOps, Group | Group4, Group | Group5,
@@ -211,16 +213,20 @@
 
 static u32 twobyte_table[256] = {
 	/* 0x00 - 0x0F */
-	0, Group | GroupDual | Group7, 0, 0, 0, ImplicitOps, ImplicitOps, 0,
-	ImplicitOps, ImplicitOps, 0, 0, 0, ImplicitOps | ModRM, 0, 0,
+	0, Group | GroupDual | Group7, 0, 0,
+	0, ImplicitOps, ImplicitOps | Priv, 0,
+	ImplicitOps | Priv, ImplicitOps | Priv, 0, 0,
+	0, ImplicitOps | ModRM, 0, 0,
 	/* 0x10 - 0x1F */
 	0, 0, 0, 0, 0, 0, 0, 0, ImplicitOps | ModRM, 0, 0, 0, 0, 0, 0, 0,
 	/* 0x20 - 0x2F */
-	ModRM | ImplicitOps, ModRM, ModRM | ImplicitOps, ModRM, 0, 0, 0, 0,
+	ModRM | ImplicitOps | Priv, ModRM | Priv,
+	ModRM | ImplicitOps | Priv, ModRM | Priv,
+	0, 0, 0, 0,
 	0, 0, 0, 0, 0, 0, 0, 0,
 	/* 0x30 - 0x3F */
-	ImplicitOps, 0, ImplicitOps, 0,
-	ImplicitOps, ImplicitOps, 0, 0,
+	ImplicitOps | Priv, 0, ImplicitOps | Priv, 0,
+	ImplicitOps, ImplicitOps | Priv, 0, 0,
 	0, 0, 0, 0, 0, 0, 0, 0,
 	/* 0x40 - 0x47 */
 	DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
@@ -258,11 +264,12 @@
 	0, 0, ByteOp | DstReg | SrcMem | ModRM | Mov,
 	    DstReg | SrcMem16 | ModRM | Mov,
 	/* 0xB8 - 0xBF */
-	0, 0, DstMem | SrcImmByte | ModRM, DstMem | SrcReg | ModRM | BitOp,
+	0, 0, Group | Group8, DstMem | SrcReg | ModRM | BitOp,
 	0, 0, ByteOp | DstReg | SrcMem | ModRM | Mov,
 	    DstReg | SrcMem16 | ModRM | Mov,
 	/* 0xC0 - 0xCF */
-	0, 0, 0, DstMem | SrcReg | ModRM | Mov, 0, 0, 0, ImplicitOps | ModRM,
+	0, 0, 0, DstMem | SrcReg | ModRM | Mov,
+	0, 0, 0, Group | GroupDual | Group9,
 	0, 0, 0, 0, 0, 0, 0, 0,
 	/* 0xD0 - 0xDF */
 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -311,24 +318,39 @@
 	SrcMem | ModRM | Stack, 0,
 	SrcMem | ModRM | Stack, 0, SrcMem | ModRM | Stack, 0,
 	[Group7*8] =
-	0, 0, ModRM | SrcMem, ModRM | SrcMem,
+	0, 0, ModRM | SrcMem | Priv, ModRM | SrcMem | Priv,
 	SrcNone | ModRM | DstMem | Mov, 0,
-	SrcMem16 | ModRM | Mov, SrcMem | ModRM | ByteOp,
+	SrcMem16 | ModRM | Mov | Priv, SrcMem | ModRM | ByteOp | Priv,
+	[Group8*8] =
+	0, 0, 0, 0,
+	DstMem | SrcImmByte | ModRM, DstMem | SrcImmByte | ModRM,
+	DstMem | SrcImmByte | ModRM, DstMem | SrcImmByte | ModRM,
+	[Group9*8] =
+	0, ImplicitOps | ModRM, 0, 0, 0, 0, 0, 0,
 };
 
 static u32 group2_table[] = {
 	[Group7*8] =
-	SrcNone | ModRM, 0, 0, SrcNone | ModRM,
+	SrcNone | ModRM | Priv, 0, 0, SrcNone | ModRM,
 	SrcNone | ModRM | DstMem | Mov, 0,
 	SrcMem16 | ModRM | Mov, 0,
+	[Group9*8] =
+	0, 0, 0, 0, 0, 0, 0, 0,
 };
 
 /* EFLAGS bit definitions. */
+#define EFLG_ID (1<<21)
+#define EFLG_VIP (1<<20)
+#define EFLG_VIF (1<<19)
+#define EFLG_AC (1<<18)
 #define EFLG_VM (1<<17)
 #define EFLG_RF (1<<16)
+#define EFLG_IOPL (3<<12)
+#define EFLG_NT (1<<14)
 #define EFLG_OF (1<<11)
 #define EFLG_DF (1<<10)
 #define EFLG_IF (1<<9)
+#define EFLG_TF (1<<8)
 #define EFLG_SF (1<<7)
 #define EFLG_ZF (1<<6)
 #define EFLG_AF (1<<4)
@@ -597,7 +619,7 @@
 
 	if (linear < fc->start || linear >= fc->end) {
 		size = min(15UL, PAGE_SIZE - offset_in_page(linear));
-		rc = ops->read_std(linear, fc->data, size, ctxt->vcpu);
+		rc = ops->fetch(linear, fc->data, size, ctxt->vcpu, NULL);
 		if (rc)
 			return rc;
 		fc->start = linear;
@@ -613,6 +635,9 @@
 {
 	int rc = 0;
 
+	/* x86 instructions are limited to 15 bytes. */
+	if (eip + size - ctxt->decode.eip_orig > 15)
+		return X86EMUL_UNHANDLEABLE;
 	eip += ctxt->cs_base;
 	while (size--) {
 		rc = do_fetch_insn_byte(ctxt, ops, eip++, dest++);
@@ -649,11 +674,11 @@
 		op_bytes = 3;
 	*address = 0;
 	rc = ops->read_std((unsigned long)ptr, (unsigned long *)size, 2,
-			   ctxt->vcpu);
+			   ctxt->vcpu, NULL);
 	if (rc)
 		return rc;
 	rc = ops->read_std((unsigned long)ptr + 2, address, op_bytes,
-			   ctxt->vcpu);
+			   ctxt->vcpu, NULL);
 	return rc;
 }
 
@@ -871,12 +896,13 @@
 	/* Shadow copy of register state. Committed on successful emulation. */
 
 	memset(c, 0, sizeof(struct decode_cache));
-	c->eip = kvm_rip_read(ctxt->vcpu);
+	c->eip = c->eip_orig = kvm_rip_read(ctxt->vcpu);
 	ctxt->cs_base = seg_base(ctxt, VCPU_SREG_CS);
 	memcpy(c->regs, ctxt->vcpu->arch.regs, sizeof c->regs);
 
 	switch (mode) {
 	case X86EMUL_MODE_REAL:
+	case X86EMUL_MODE_VM86:
 	case X86EMUL_MODE_PROT16:
 		def_op_bytes = def_ad_bytes = 2;
 		break;
@@ -1186,6 +1212,49 @@
 	return rc;
 }
 
+static int emulate_popf(struct x86_emulate_ctxt *ctxt,
+		       struct x86_emulate_ops *ops,
+		       void *dest, int len)
+{
+	int rc;
+	unsigned long val, change_mask;
+	int iopl = (ctxt->eflags & X86_EFLAGS_IOPL) >> IOPL_SHIFT;
+	int cpl = kvm_x86_ops->get_cpl(ctxt->vcpu);
+
+	rc = emulate_pop(ctxt, ops, &val, len);
+	if (rc != X86EMUL_CONTINUE)
+		return rc;
+
+	change_mask = EFLG_CF | EFLG_PF | EFLG_AF | EFLG_ZF | EFLG_SF | EFLG_OF
+		| EFLG_TF | EFLG_DF | EFLG_NT | EFLG_RF | EFLG_AC | EFLG_ID;
+
+	switch(ctxt->mode) {
+	case X86EMUL_MODE_PROT64:
+	case X86EMUL_MODE_PROT32:
+	case X86EMUL_MODE_PROT16:
+		if (cpl == 0)
+			change_mask |= EFLG_IOPL;
+		if (cpl <= iopl)
+			change_mask |= EFLG_IF;
+		break;
+	case X86EMUL_MODE_VM86:
+		if (iopl < 3) {
+			kvm_inject_gp(ctxt->vcpu, 0);
+			return X86EMUL_PROPAGATE_FAULT;
+		}
+		change_mask |= EFLG_IF;
+		break;
+	default: /* real mode */
+		change_mask |= (EFLG_IOPL | EFLG_IF);
+		break;
+	}
+
+	*(unsigned long *)dest =
+		(ctxt->eflags & ~change_mask) | (val & change_mask);
+
+	return rc;
+}
+
 static inline int emulate_grp1a(struct x86_emulate_ctxt *ctxt,
 				struct x86_emulate_ops *ops)
 {
@@ -1327,7 +1396,7 @@
 	rc = emulate_pop(ctxt, ops, &cs, c->op_bytes);
 	if (rc)
 		return rc;
-	rc = kvm_load_segment_descriptor(ctxt->vcpu, (u16)cs, 1, VCPU_SREG_CS);
+	rc = kvm_load_segment_descriptor(ctxt->vcpu, (u16)cs, VCPU_SREG_CS);
 	return rc;
 }
 
@@ -1435,7 +1504,7 @@
 
 	/* syscall is not available in real mode */
 	if (c->lock_prefix || ctxt->mode == X86EMUL_MODE_REAL
-		|| !(ctxt->vcpu->arch.cr0 & X86_CR0_PE))
+	    || ctxt->mode == X86EMUL_MODE_VM86)
 		return -1;
 
 	setup_syscalls_segments(ctxt, &cs, &ss);
@@ -1487,9 +1556,8 @@
 	if (c->lock_prefix)
 		return -1;
 
-	/* inject #GP if in real mode or paging is disabled */
-	if (ctxt->mode == X86EMUL_MODE_REAL ||
-		!(ctxt->vcpu->arch.cr0 & X86_CR0_PE)) {
+	/* inject #GP if in real mode */
+	if (ctxt->mode == X86EMUL_MODE_REAL) {
 		kvm_inject_gp(ctxt->vcpu, 0);
 		return -1;
 	}
@@ -1553,15 +1621,9 @@
 	if (c->lock_prefix)
 		return -1;
 
-	/* inject #GP if in real mode or paging is disabled */
-	if (ctxt->mode == X86EMUL_MODE_REAL
-		|| !(ctxt->vcpu->arch.cr0 & X86_CR0_PE)) {
-		kvm_inject_gp(ctxt->vcpu, 0);
-		return -1;
-	}
-
-	/* sysexit must be called from CPL 0 */
-	if (kvm_x86_ops->get_cpl(ctxt->vcpu) != 0) {
+	/* inject #GP if in real mode or Virtual 8086 mode */
+	if (ctxt->mode == X86EMUL_MODE_REAL ||
+	    ctxt->mode == X86EMUL_MODE_VM86) {
 		kvm_inject_gp(ctxt->vcpu, 0);
 		return -1;
 	}
@@ -1608,6 +1670,57 @@
 	return 0;
 }
 
+static bool emulator_bad_iopl(struct x86_emulate_ctxt *ctxt)
+{
+	int iopl;
+	if (ctxt->mode == X86EMUL_MODE_REAL)
+		return false;
+	if (ctxt->mode == X86EMUL_MODE_VM86)
+		return true;
+	iopl = (ctxt->eflags & X86_EFLAGS_IOPL) >> IOPL_SHIFT;
+	return kvm_x86_ops->get_cpl(ctxt->vcpu) > iopl;
+}
+
+static bool emulator_io_port_access_allowed(struct x86_emulate_ctxt *ctxt,
+					    struct x86_emulate_ops *ops,
+					    u16 port, u16 len)
+{
+	struct kvm_segment tr_seg;
+	int r;
+	u16 io_bitmap_ptr;
+	u8 perm, bit_idx = port & 0x7;
+	unsigned mask = (1 << len) - 1;
+
+	kvm_get_segment(ctxt->vcpu, &tr_seg, VCPU_SREG_TR);
+	if (tr_seg.unusable)
+		return false;
+	if (tr_seg.limit < 103)
+		return false;
+	r = ops->read_std(tr_seg.base + 102, &io_bitmap_ptr, 2, ctxt->vcpu,
+			  NULL);
+	if (r != X86EMUL_CONTINUE)
+		return false;
+	if (io_bitmap_ptr + port/8 > tr_seg.limit)
+		return false;
+	r = ops->read_std(tr_seg.base + io_bitmap_ptr + port/8, &perm, 1,
+			  ctxt->vcpu, NULL);
+	if (r != X86EMUL_CONTINUE)
+		return false;
+	if ((perm >> bit_idx) & mask)
+		return false;
+	return true;
+}
+
+static bool emulator_io_permited(struct x86_emulate_ctxt *ctxt,
+				 struct x86_emulate_ops *ops,
+				 u16 port, u16 len)
+{
+	if (emulator_bad_iopl(ctxt))
+		if (!emulator_io_port_access_allowed(ctxt, ops, port, len))
+			return false;
+	return true;
+}
+
 int
 x86_emulate_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
 {
@@ -1629,6 +1742,12 @@
 	memcpy(c->regs, ctxt->vcpu->arch.regs, sizeof c->regs);
 	saved_eip = c->eip;
 
+	/* Privileged instruction can be executed only in CPL=0 */
+	if ((c->d & Priv) && kvm_x86_ops->get_cpl(ctxt->vcpu)) {
+		kvm_inject_gp(ctxt->vcpu, 0);
+		goto done;
+	}
+
 	if (((c->d & ModRM) && (c->modrm_mod != 3)) || (c->d & MemAbs))
 		memop = c->modrm_ea;
 
@@ -1761,7 +1880,12 @@
 		break;
 	case 0x6c:		/* insb */
 	case 0x6d:		/* insw/insd */
-		 if (kvm_emulate_pio_string(ctxt->vcpu, NULL,
+		if (!emulator_io_permited(ctxt, ops, c->regs[VCPU_REGS_RDX],
+					  (c->d & ByteOp) ? 1 : c->op_bytes)) {
+			kvm_inject_gp(ctxt->vcpu, 0);
+			goto done;
+		}
+		if (kvm_emulate_pio_string(ctxt->vcpu, NULL,
 				1,
 				(c->d & ByteOp) ? 1 : c->op_bytes,
 				c->rep_prefix ?
@@ -1777,6 +1901,11 @@
 		return 0;
 	case 0x6e:		/* outsb */
 	case 0x6f:		/* outsw/outsd */
+		if (!emulator_io_permited(ctxt, ops, c->regs[VCPU_REGS_RDX],
+					  (c->d & ByteOp) ? 1 : c->op_bytes)) {
+			kvm_inject_gp(ctxt->vcpu, 0);
+			goto done;
+		}
 		if (kvm_emulate_pio_string(ctxt->vcpu, NULL,
 				0,
 				(c->d & ByteOp) ? 1 : c->op_bytes,
@@ -1863,25 +1992,19 @@
 		break;
 	case 0x8e: { /* mov seg, r/m16 */
 		uint16_t sel;
-		int type_bits;
-		int err;
 
 		sel = c->src.val;
-		if (c->modrm_reg == VCPU_SREG_SS)
-			toggle_interruptibility(ctxt, X86_SHADOW_INT_MOV_SS);
 
-		if (c->modrm_reg <= 5) {
-			type_bits = (c->modrm_reg == 1) ? 9 : 1;
-			err = kvm_load_segment_descriptor(ctxt->vcpu, sel,
-							  type_bits, c->modrm_reg);
-		} else {
-			printk(KERN_INFO "Invalid segreg in modrm byte 0x%02x\n",
-					c->modrm);
-			goto cannot_emulate;
+		if (c->modrm_reg == VCPU_SREG_CS ||
+		    c->modrm_reg > VCPU_SREG_GS) {
+			kvm_queue_exception(ctxt->vcpu, UD_VECTOR);
+			goto done;
 		}
 
-		if (err < 0)
-			goto cannot_emulate;
+		if (c->modrm_reg == VCPU_SREG_SS)
+			toggle_interruptibility(ctxt, X86_SHADOW_INT_MOV_SS);
+
+		rc = kvm_load_segment_descriptor(ctxt->vcpu, sel, c->modrm_reg);
 
 		c->dst.type = OP_NONE;  /* Disable writeback. */
 		break;
@@ -1910,7 +2033,10 @@
 		c->dst.type = OP_REG;
 		c->dst.ptr = (unsigned long *) &ctxt->eflags;
 		c->dst.bytes = c->op_bytes;
-		goto pop_instruction;
+		rc = emulate_popf(ctxt, ops, &c->dst.val, c->op_bytes);
+		if (rc != X86EMUL_CONTINUE)
+			goto done;
+		break;
 	case 0xa0 ... 0xa1:	/* mov */
 		c->dst.ptr = (unsigned long *)&c->regs[VCPU_REGS_RAX];
 		c->dst.val = c->src.val;
@@ -2048,11 +2174,9 @@
 	case 0xe9: /* jmp rel */
 		goto jmp;
 	case 0xea: /* jmp far */
-		if (kvm_load_segment_descriptor(ctxt->vcpu, c->src2.val, 9,
-					VCPU_SREG_CS) < 0) {
-			DPRINTF("jmp far: Failed to load CS descriptor\n");
-			goto cannot_emulate;
-		}
+		if (kvm_load_segment_descriptor(ctxt->vcpu, c->src2.val,
+						VCPU_SREG_CS))
+			goto done;
 
 		c->eip = c->src.val;
 		break;
@@ -2070,7 +2194,13 @@
 	case 0xef: /* out (e/r)ax,dx */
 		port = c->regs[VCPU_REGS_RDX];
 		io_dir_in = 0;
-	do_io:	if (kvm_emulate_pio(ctxt->vcpu, NULL, io_dir_in,
+	do_io:
+		if (!emulator_io_permited(ctxt, ops, port,
+					  (c->d & ByteOp) ? 1 : c->op_bytes)) {
+			kvm_inject_gp(ctxt->vcpu, 0);
+			goto done;
+		}
+		if (kvm_emulate_pio(ctxt->vcpu, NULL, io_dir_in,
 				   (c->d & ByteOp) ? 1 : c->op_bytes,
 				   port) != 0) {
 			c->eip = saved_eip;
@@ -2095,13 +2225,21 @@
 		c->dst.type = OP_NONE;	/* Disable writeback. */
 		break;
 	case 0xfa: /* cli */
-		ctxt->eflags &= ~X86_EFLAGS_IF;
-		c->dst.type = OP_NONE;	/* Disable writeback. */
+		if (emulator_bad_iopl(ctxt))
+			kvm_inject_gp(ctxt->vcpu, 0);
+		else {
+			ctxt->eflags &= ~X86_EFLAGS_IF;
+			c->dst.type = OP_NONE;	/* Disable writeback. */
+		}
 		break;
 	case 0xfb: /* sti */
-		toggle_interruptibility(ctxt, X86_SHADOW_INT_STI);
-		ctxt->eflags |= X86_EFLAGS_IF;
-		c->dst.type = OP_NONE;	/* Disable writeback. */
+		if (emulator_bad_iopl(ctxt))
+			kvm_inject_gp(ctxt->vcpu, 0);
+		else {
+			toggle_interruptibility(ctxt, X86_SHADOW_INT_STI);
+			ctxt->eflags |= X86_EFLAGS_IF;
+			c->dst.type = OP_NONE;	/* Disable writeback. */
+		}
 		break;
 	case 0xfc: /* cld */
 		ctxt->eflags &= ~EFLG_DF;
--- linux-mvl-dove-2.6.32.orig/arch/x86/kvm/vmx.c
+++ linux-mvl-dove-2.6.32/arch/x86/kvm/vmx.c
@@ -26,6 +26,7 @@
 #include <linux/sched.h>
 #include <linux/moduleparam.h>
 #include <linux/ftrace_event.h>
+#include <linux/tboot.h>
 #include "kvm_cache_regs.h"
 #include "x86.h"
 
@@ -61,6 +62,27 @@
 static int __read_mostly emulate_invalid_guest_state = 0;
 module_param(emulate_invalid_guest_state, bool, S_IRUGO);
 
+/*
+ * These 2 parameters are used to config the controls for Pause-Loop Exiting:
+ * ple_gap:    upper bound on the amount of time between two successive
+ *             executions of PAUSE in a loop. Also indicate if ple enabled.
+ *             According to test, this time is usually small than 41 cycles.
+ * ple_window: upper bound on the amount of time a guest is allowed to execute
+ *             in a PAUSE loop. Tests indicate that most spinlocks are held for
+ *             less than 2^12 cycles
+ * Time is measured based on a counter that runs at the same rate as the TSC,
+ * refer SDM volume 3b section 21.6.13 & 22.1.3.
+ */
+#define KVM_VMX_DEFAULT_PLE_GAP    41
+#define KVM_VMX_DEFAULT_PLE_WINDOW 4096
+static int ple_gap = KVM_VMX_DEFAULT_PLE_GAP;
+module_param(ple_gap, int, S_IRUGO);
+
+static int ple_window = KVM_VMX_DEFAULT_PLE_WINDOW;
+module_param(ple_window, int, S_IRUGO);
+
+#define RMODE_GUEST_OWNED_EFLAGS_BITS (~(X86_EFLAGS_IOPL | X86_EFLAGS_VM))
+
 struct vmcs {
 	u32 revision_id;
 	u32 abort;
@@ -92,7 +114,7 @@
 	} host_state;
 	struct {
 		int vm86_active;
-		u8 save_iopl;
+		ulong save_rflags;
 		struct kvm_save_segment {
 			u16 selector;
 			unsigned long base;
@@ -127,6 +149,7 @@
 static DEFINE_PER_CPU(struct vmcs *, vmxarea);
 static DEFINE_PER_CPU(struct vmcs *, current_vmcs);
 static DEFINE_PER_CPU(struct list_head, vcpus_on_cpu);
+static DEFINE_PER_CPU(struct desc_ptr, host_gdt);
 
 static unsigned long *vmx_io_bitmap_a;
 static unsigned long *vmx_io_bitmap_b;
@@ -320,6 +343,12 @@
 		SECONDARY_EXEC_UNRESTRICTED_GUEST;
 }
 
+static inline int cpu_has_vmx_ple(void)
+{
+	return vmcs_config.cpu_based_2nd_exec_ctrl &
+		SECONDARY_EXEC_PAUSE_LOOP_EXITING;
+}
+
 static inline int vm_need_virtualize_apic_accesses(struct kvm *kvm)
 {
 	return flexpriority_enabled &&
@@ -625,7 +654,7 @@
 	 */
 	vmx->host_state.ldt_sel = kvm_read_ldt();
 	vmx->host_state.gs_ldt_reload_needed = vmx->host_state.ldt_sel;
-	vmx->host_state.fs_sel = kvm_read_fs();
+	savesegment(fs, vmx->host_state.fs_sel);
 	if (!(vmx->host_state.fs_sel & 7)) {
 		vmcs_write16(HOST_FS_SELECTOR, vmx->host_state.fs_sel);
 		vmx->host_state.fs_reload_needed = 0;
@@ -633,7 +662,7 @@
 		vmcs_write16(HOST_FS_SELECTOR, 0);
 		vmx->host_state.fs_reload_needed = 1;
 	}
-	vmx->host_state.gs_sel = kvm_read_gs();
+	savesegment(gs, vmx->host_state.gs_sel);
 	if (!(vmx->host_state.gs_sel & 7))
 		vmcs_write16(HOST_GS_SELECTOR, vmx->host_state.gs_sel);
 	else {
@@ -650,10 +679,7 @@
 #endif
 
 #ifdef CONFIG_X86_64
-	if (is_long_mode(&vmx->vcpu))
-		save_msrs(vmx->host_msrs +
-			  vmx->msr_offset_kernel_gs_base, 1);
-
+	save_msrs(vmx->host_msrs + vmx->msr_offset_kernel_gs_base, 1);
 #endif
 	load_msrs(vmx->guest_msrs, vmx->save_nmsrs);
 	load_transition_efer(vmx);
@@ -661,32 +687,36 @@
 
 static void __vmx_load_host_state(struct vcpu_vmx *vmx)
 {
-	unsigned long flags;
-
 	if (!vmx->host_state.loaded)
 		return;
 
 	++vmx->vcpu.stat.host_state_reload;
 	vmx->host_state.loaded = 0;
-	if (vmx->host_state.fs_reload_needed)
-		kvm_load_fs(vmx->host_state.fs_sel);
+#ifdef CONFIG_X86_64
+	if (is_long_mode(&vmx->vcpu))
+		save_msrs(vmx->guest_msrs + vmx->msr_offset_kernel_gs_base, 1);
+#endif
 	if (vmx->host_state.gs_ldt_reload_needed) {
 		kvm_load_ldt(vmx->host_state.ldt_sel);
-		/*
-		 * If we have to reload gs, we must take care to
-		 * preserve our gs base.
-		 */
-		local_irq_save(flags);
-		kvm_load_gs(vmx->host_state.gs_sel);
 #ifdef CONFIG_X86_64
-		wrmsrl(MSR_GS_BASE, vmcs_readl(HOST_GS_BASE));
+		load_gs_index(vmx->host_state.gs_sel);
+#else
+		loadsegment(gs, vmx->host_state.gs_sel);
 #endif
-		local_irq_restore(flags);
 	}
+	if (vmx->host_state.fs_reload_needed)
+		loadsegment(fs, vmx->host_state.fs_sel);
 	reload_tss();
+#ifdef CONFIG_X86_64
+	save_msrs(vmx->guest_msrs, vmx->msr_offset_kernel_gs_base);
+	save_msrs(vmx->guest_msrs + vmx->msr_offset_kernel_gs_base + 1,
+		  vmx->save_nmsrs - vmx->msr_offset_kernel_gs_base - 1);
+#else
 	save_msrs(vmx->guest_msrs, vmx->save_nmsrs);
+#endif
 	load_msrs(vmx->host_msrs, vmx->save_nmsrs);
 	reload_host_efer(vmx);
+	load_gdt(&__get_cpu_var(host_gdt));
 }
 
 static void vmx_load_host_state(struct vcpu_vmx *vmx)
@@ -783,18 +813,23 @@
 
 static unsigned long vmx_get_rflags(struct kvm_vcpu *vcpu)
 {
-	unsigned long rflags;
+	unsigned long rflags, save_rflags;
 
 	rflags = vmcs_readl(GUEST_RFLAGS);
-	if (to_vmx(vcpu)->rmode.vm86_active)
-		rflags &= ~(unsigned long)(X86_EFLAGS_IOPL | X86_EFLAGS_VM);
+	if (to_vmx(vcpu)->rmode.vm86_active) {
+		rflags &= RMODE_GUEST_OWNED_EFLAGS_BITS;
+		save_rflags = to_vmx(vcpu)->rmode.save_rflags;
+		rflags |= save_rflags & ~RMODE_GUEST_OWNED_EFLAGS_BITS;
+	}
 	return rflags;
 }
 
 static void vmx_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
 {
-	if (to_vmx(vcpu)->rmode.vm86_active)
+	if (to_vmx(vcpu)->rmode.vm86_active) {
+		to_vmx(vcpu)->rmode.save_rflags = rflags;
 		rflags |= X86_EFLAGS_IOPL | X86_EFLAGS_VM;
+	}
 	vmcs_writel(GUEST_RFLAGS, rflags);
 }
 
@@ -1133,9 +1168,16 @@
 	u64 msr;
 
 	rdmsrl(MSR_IA32_FEATURE_CONTROL, msr);
-	return (msr & (FEATURE_CONTROL_LOCKED |
-		       FEATURE_CONTROL_VMXON_ENABLED))
-	    == FEATURE_CONTROL_LOCKED;
+	if (msr & FEATURE_CONTROL_LOCKED) {
+		if (!(msr & FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX)
+			&& tboot_enabled())
+			return 1;
+		if (!(msr & FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX)
+			&& !tboot_enabled())
+			return 1;
+	}
+
+	return 0;
 	/* locked but not enabled */
 }
 
@@ -1143,22 +1185,26 @@
 {
 	int cpu = raw_smp_processor_id();
 	u64 phys_addr = __pa(per_cpu(vmxarea, cpu));
-	u64 old;
+	u64 old, test_bits;
 
 	INIT_LIST_HEAD(&per_cpu(vcpus_on_cpu, cpu));
 	rdmsrl(MSR_IA32_FEATURE_CONTROL, old);
-	if ((old & (FEATURE_CONTROL_LOCKED |
-		    FEATURE_CONTROL_VMXON_ENABLED))
-	    != (FEATURE_CONTROL_LOCKED |
-		FEATURE_CONTROL_VMXON_ENABLED))
+
+	test_bits = FEATURE_CONTROL_LOCKED;
+	test_bits |= FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX;
+	if (tboot_enabled())
+		test_bits |= FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX;
+
+	if ((old & test_bits) != test_bits) {
 		/* enable and lock */
-		wrmsrl(MSR_IA32_FEATURE_CONTROL, old |
-		       FEATURE_CONTROL_LOCKED |
-		       FEATURE_CONTROL_VMXON_ENABLED);
+		wrmsrl(MSR_IA32_FEATURE_CONTROL, old | test_bits);
+	}
 	write_cr4(read_cr4() | X86_CR4_VMXE); /* FIXME: not cpu hotplug safe */
 	asm volatile (ASM_VMX_VMXON_RAX
 		      : : "a"(&phys_addr), "m"(phys_addr)
 		      : "memory", "cc");
+
+	store_gdt(&__get_cpu_var(host_gdt));
 }
 
 static void vmclear_local_vcpus(void)
@@ -1250,7 +1296,8 @@
 			SECONDARY_EXEC_WBINVD_EXITING |
 			SECONDARY_EXEC_ENABLE_VPID |
 			SECONDARY_EXEC_ENABLE_EPT |
-			SECONDARY_EXEC_UNRESTRICTED_GUEST;
+			SECONDARY_EXEC_UNRESTRICTED_GUEST |
+			SECONDARY_EXEC_PAUSE_LOOP_EXITING;
 		if (adjust_vmx_controls(min2, opt2,
 					MSR_IA32_VMX_PROCBASED_CTLS2,
 					&_cpu_based_2nd_exec_control) < 0)
@@ -1394,6 +1441,9 @@
 	if (enable_ept && !cpu_has_vmx_ept_2m_page())
 		kvm_disable_largepages();
 
+	if (!cpu_has_vmx_ple())
+		ple_gap = 0;
+
 	return alloc_kvm_area();
 }
 
@@ -1431,8 +1481,8 @@
 	vmcs_write32(GUEST_TR_AR_BYTES, vmx->rmode.tr.ar);
 
 	flags = vmcs_readl(GUEST_RFLAGS);
-	flags &= ~(X86_EFLAGS_IOPL | X86_EFLAGS_VM);
-	flags |= (vmx->rmode.save_iopl << IOPL_SHIFT);
+	flags &= RMODE_GUEST_OWNED_EFLAGS_BITS;
+	flags |= vmx->rmode.save_rflags & ~RMODE_GUEST_OWNED_EFLAGS_BITS;
 	vmcs_writel(GUEST_RFLAGS, flags);
 
 	vmcs_writel(GUEST_CR4, (vmcs_readl(GUEST_CR4) & ~X86_CR4_VME) |
@@ -1501,8 +1551,7 @@
 	vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
 
 	flags = vmcs_readl(GUEST_RFLAGS);
-	vmx->rmode.save_iopl
-		= (flags & X86_EFLAGS_IOPL) >> IOPL_SHIFT;
+	vmx->rmode.save_rflags = flags;
 
 	flags |= X86_EFLAGS_IOPL | X86_EFLAGS_VM;
 
@@ -2302,13 +2351,22 @@
 				~SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
 		if (vmx->vpid == 0)
 			exec_control &= ~SECONDARY_EXEC_ENABLE_VPID;
-		if (!enable_ept)
+		if (!enable_ept) {
 			exec_control &= ~SECONDARY_EXEC_ENABLE_EPT;
+			enable_unrestricted_guest = 0;
+		}
 		if (!enable_unrestricted_guest)
 			exec_control &= ~SECONDARY_EXEC_UNRESTRICTED_GUEST;
+		if (!ple_gap)
+			exec_control &= ~SECONDARY_EXEC_PAUSE_LOOP_EXITING;
 		vmcs_write32(SECONDARY_VM_EXEC_CONTROL, exec_control);
 	}
 
+	if (ple_gap) {
+		vmcs_write32(PLE_GAP, ple_gap);
+		vmcs_write32(PLE_WINDOW, ple_window);
+	}
+
 	vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK, !!bypass_guest_pf);
 	vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, !!bypass_guest_pf);
 	vmcs_write32(CR3_TARGET_COUNT, 0);           /* 22.2.1 */
@@ -2320,8 +2378,8 @@
 	vmcs_write16(HOST_CS_SELECTOR, __KERNEL_CS);  /* 22.2.4 */
 	vmcs_write16(HOST_DS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
 	vmcs_write16(HOST_ES_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
-	vmcs_write16(HOST_FS_SELECTOR, kvm_read_fs());    /* 22.2.4 */
-	vmcs_write16(HOST_GS_SELECTOR, kvm_read_gs());    /* 22.2.4 */
+	vmcs_write16(HOST_FS_SELECTOR, 0);            /* 22.2.4 */
+	vmcs_write16(HOST_GS_SELECTOR, 0);            /* 22.2.4 */
 	vmcs_write16(HOST_SS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
 #ifdef CONFIG_X86_64
 	rdmsrl(MSR_FS_BASE, a);
@@ -2510,7 +2568,7 @@
 	if (vmx->vpid != 0)
 		vmcs_write16(VIRTUAL_PROCESSOR_ID, vmx->vpid);
 
-	vmx->vcpu.arch.cr0 = 0x60000010;
+	vmx->vcpu.arch.cr0 = X86_CR0_NW | X86_CR0_CD | X86_CR0_ET;
 	vmx_set_cr0(&vmx->vcpu, vmx->vcpu.arch.cr0); /* enter rmode */
 	vmx_set_cr4(&vmx->vcpu, 0);
 	vmx_set_efer(&vmx->vcpu, 0);
@@ -2674,6 +2732,12 @@
 		kvm_queue_exception(vcpu, vec);
 		return 1;
 	case BP_VECTOR:
+		/*
+		 * Update instruction length as we may reinject the exception
+		 * from user space while in guest debugging mode.
+		 */
+		to_vmx(vcpu)->vcpu.arch.event_exit_inst_len =
+			vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
 		if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP)
 			return 0;
 		/* fall through */
@@ -2790,6 +2854,13 @@
 		kvm_run->debug.arch.dr7 = vmcs_readl(GUEST_DR7);
 		/* fall through */
 	case BP_VECTOR:
+		/*
+		 * Update instruction length as we may reinject #BP from
+		 * user space while in guest debugging mode. Reading it for
+		 * #DB as well causes no harm, it is not used in that case.
+		 */
+		vmx->vcpu.arch.event_exit_inst_len =
+			vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
 		kvm_run->exit_reason = KVM_EXIT_DEBUG;
 		kvm_run->debug.arch.pc = vmcs_readl(GUEST_CS_BASE) + rip;
 		kvm_run->debug.arch.exception = ex_no;
@@ -3358,6 +3429,18 @@
 }
 
 /*
+ * Indicate a busy-waiting vcpu in spinlock. We do not enable the PAUSE
+ * exiting, so only get here on cpu with PAUSE-Loop-Exiting.
+ */
+static int handle_pause(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
+{
+	skip_emulated_instruction(vcpu);
+	kvm_vcpu_on_spin(vcpu);
+
+	return 1;
+}
+
+/*
  * The exit handlers return 1 if the exit was handled fully and guest execution
  * may resume.  Otherwise they set the kvm_run parameter to indicate what needs
  * to be done to userspace and return 0.
@@ -3394,6 +3477,7 @@
 	[EXIT_REASON_MCE_DURING_VMENTRY]      = handle_machine_check,
 	[EXIT_REASON_EPT_VIOLATION]	      = handle_ept_violation,
 	[EXIT_REASON_EPT_MISCONFIG]           = handle_ept_misconfig,
+	[EXIT_REASON_PAUSE_INSTRUCTION]       = handle_pause,
 };
 
 static const int kvm_vmx_max_exit_handlers =
--- linux-mvl-dove-2.6.32.orig/arch/x86/kvm/i8254.c
+++ linux-mvl-dove-2.6.32/arch/x86/kvm/i8254.c
@@ -465,6 +465,9 @@
 		return -EOPNOTSUPP;
 
 	addr &= KVM_PIT_CHANNEL_MASK;
+	if (addr == 3)
+		return 0;
+
 	s = &pit_state->channels[addr];
 
 	mutex_lock(&pit_state->lock);
--- linux-mvl-dove-2.6.32.orig/arch/x86/kvm/svm.c
+++ linux-mvl-dove-2.6.32/arch/x86/kvm/svm.c
@@ -27,6 +27,7 @@
 #include <linux/sched.h>
 #include <linux/ftrace_event.h>
 
+#include <asm/tlbflush.h>
 #include <asm/desc.h>
 
 #include <asm/virtext.h>
@@ -62,6 +63,8 @@
 #define nsvm_printk(fmt, args...) do {} while(0)
 #endif
 
+static bool erratum_383_found __read_mostly;
+
 static const u32 host_save_user_msrs[] = {
 #ifdef CONFIG_X86_64
 	MSR_STAR, MSR_LSTAR, MSR_CSTAR, MSR_SYSCALL_MASK, MSR_KERNEL_GS_BASE,
@@ -299,6 +302,31 @@
 	svm_set_interrupt_shadow(vcpu, 0);
 }
 
+static void svm_init_erratum_383(void)
+{
+	u32 low, high;
+	int err;
+	u64 val;
+
+	/* Only Fam10h is affected */
+	if (boot_cpu_data.x86 != 0x10)
+		return;
+
+	/* Use _safe variants to not break nested virtualization */
+	val = native_read_msr_safe(MSR_AMD64_DC_CFG, &err);
+	if (err)
+		return;
+
+	val |= (1ULL << 47);
+
+	low  = lower_32_bits(val);
+	high = upper_32_bits(val);
+
+	native_write_msr_safe(MSR_AMD64_DC_CFG, low, high);
+
+	erratum_383_found = true;
+}
+
 static int has_svm(void)
 {
 	const char *msg;
@@ -318,7 +346,6 @@
 
 static void svm_hardware_enable(void *garbage)
 {
-
 	struct svm_cpu_data *svm_data;
 	uint64_t efer;
 	struct descriptor_table gdt_descr;
@@ -350,6 +377,10 @@
 
 	wrmsrl(MSR_VM_HSAVE_PA,
 	       page_to_pfn(svm_data->save_area) << PAGE_SHIFT);
+
+	svm_init_erratum_383();
+
+	return;
 }
 
 static void svm_cpu_uninit(int cpu)
@@ -590,7 +621,6 @@
 
 	control->iopm_base_pa = iopm_base;
 	control->msrpm_base_pa = __pa(svm->msrpm);
-	control->tsc_offset = 0;
 	control->int_ctl = V_INTR_MASKING_MASK;
 
 	init_seg(&save->es);
@@ -625,11 +655,12 @@
 	save->rip = 0x0000fff0;
 	svm->vcpu.arch.regs[VCPU_REGS_RIP] = save->rip;
 
-	/*
-	 * cr0 val on cpu init should be 0x60000010, we enable cpu
-	 * cache by default. the orderly way is to enable cache in bios.
+	/* This is the guest-visible cr0 value.
+	 * svm_set_cr0() sets PG and WP and clears NW and CD on save->cr0.
 	 */
-	save->cr0 = 0x00000010 | X86_CR0_PG | X86_CR0_WP;
+	svm->vcpu.arch.cr0 = X86_CR0_NW | X86_CR0_CD | X86_CR0_ET;
+	kvm_set_cr0(&svm->vcpu, svm->vcpu.arch.cr0);
+
 	save->cr4 = X86_CR4_PAE;
 	/* rdx = ?? */
 
@@ -693,29 +724,28 @@
 	if (err)
 		goto free_svm;
 
+	err = -ENOMEM;
 	page = alloc_page(GFP_KERNEL);
-	if (!page) {
-		err = -ENOMEM;
+	if (!page)
 		goto uninit;
-	}
 
-	err = -ENOMEM;
 	msrpm_pages = alloc_pages(GFP_KERNEL, MSRPM_ALLOC_ORDER);
 	if (!msrpm_pages)
-		goto uninit;
+		goto free_page1;
 
 	nested_msrpm_pages = alloc_pages(GFP_KERNEL, MSRPM_ALLOC_ORDER);
 	if (!nested_msrpm_pages)
-		goto uninit;
-
-	svm->msrpm = page_address(msrpm_pages);
-	svm_vcpu_init_msrpm(svm->msrpm);
+		goto free_page2;
 
 	hsave_page = alloc_page(GFP_KERNEL);
 	if (!hsave_page)
-		goto uninit;
+		goto free_page3;
+
 	svm->nested.hsave = page_address(hsave_page);
 
+	svm->msrpm = page_address(msrpm_pages);
+	svm_vcpu_init_msrpm(svm->msrpm);
+
 	svm->nested.msrpm = page_address(nested_msrpm_pages);
 
 	svm->vmcb = page_address(page);
@@ -723,6 +753,7 @@
 	svm->vmcb_pa = page_to_pfn(page) << PAGE_SHIFT;
 	svm->asid_generation = 0;
 	init_vmcb(svm);
+	svm->vmcb->control.tsc_offset = 0-native_read_tsc();
 
 	fx_init(&svm->vcpu);
 	svm->vcpu.fpu_active = 1;
@@ -732,6 +763,12 @@
 
 	return &svm->vcpu;
 
+free_page3:
+	__free_pages(nested_msrpm_pages, MSRPM_ALLOC_ORDER);
+free_page2:
+	__free_pages(msrpm_pages, MSRPM_ALLOC_ORDER);
+free_page1:
+	__free_page(page);
 uninit:
 	kvm_vcpu_uninit(&svm->vcpu);
 free_svm:
@@ -758,17 +795,18 @@
 	int i;
 
 	if (unlikely(cpu != vcpu->cpu)) {
-		u64 tsc_this, delta;
+		u64 delta;
 
-		/*
-		 * Make sure that the guest sees a monotonically
-		 * increasing TSC.
-		 */
-		rdtscll(tsc_this);
-		delta = vcpu->arch.host_tsc - tsc_this;
-		svm->vmcb->control.tsc_offset += delta;
-		if (is_nested(svm))
-			svm->nested.hsave->control.tsc_offset += delta;
+		if (check_tsc_unstable()) {
+			/*
+			 * Make sure that the guest sees a monotonically
+			 * increasing TSC.
+			 */
+			delta = vcpu->arch.host_tsc - native_read_tsc();
+			svm->vmcb->control.tsc_offset += delta;
+			if (is_nested(svm))
+				svm->nested.hsave->control.tsc_offset += delta;
+		}
 		vcpu->cpu = cpu;
 		kvm_migrate_timers(vcpu);
 		svm->asid_generation = 0;
@@ -1251,8 +1289,59 @@
 	return 1;
 }
 
-static int mc_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
+static bool is_erratum_383(void)
 {
+	int err, i;
+	u64 value;
+
+	if (!erratum_383_found)
+		return false;
+
+	value = native_read_msr_safe(MSR_IA32_MC0_STATUS, &err);
+	if (err)
+		return false;
+
+	/* Bit 62 may or may not be set for this mce */
+	value &= ~(1ULL << 62);
+
+	if (value != 0xb600000000010015ULL)
+		return false;
+
+	/* Clear MCi_STATUS registers */
+	for (i = 0; i < 6; ++i)
+		native_write_msr_safe(MSR_IA32_MCx_STATUS(i), 0, 0);
+
+	value = native_read_msr_safe(MSR_IA32_MCG_STATUS, &err);
+	if (!err) {
+		u32 low, high;
+
+		value &= ~(1ULL << 2);
+		low    = lower_32_bits(value);
+		high   = upper_32_bits(value);
+
+		native_write_msr_safe(MSR_IA32_MCG_STATUS, low, high);
+	}
+
+	/* Flush tlb to evict multi-match entries */
+	__flush_tlb_all();
+
+	return true;
+}
+
+static void svm_handle_mce(struct vcpu_svm *svm)
+{
+	if (is_erratum_383()) {
+		/*
+		 * Erratum 383 triggered. Guest state is corrupt so kill the
+		 * guest.
+		 */
+		pr_err("KVM: Guest triggered AMD Erratum 383\n");
+
+		set_bit(KVM_REQ_TRIPLE_FAULT, &svm->vcpu.requests);
+
+		return;
+	}
+
 	/*
 	 * On an #MC intercept the MCE handler is not called automatically in
 	 * the host. So do it by hand here.
@@ -1261,6 +1350,11 @@
 		"int $0x12\n");
 	/* not sure if we ever come back to this point */
 
+	return;
+}
+
+static int mc_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
+{
 	return 1;
 }
 
@@ -2018,7 +2112,7 @@
 static int iret_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
 {
 	++svm->vcpu.stat.nmi_window_exits;
-	svm->vmcb->control.intercept &= ~(1UL << INTERCEPT_IRET);
+	svm->vmcb->control.intercept &= ~(1ULL << INTERCEPT_IRET);
 	svm->vcpu.arch.hflags |= HF_IRET_MASK;
 	return 1;
 }
@@ -2413,7 +2507,7 @@
 
 	svm->vmcb->control.event_inj = SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_NMI;
 	vcpu->arch.hflags |= HF_NMI_MASK;
-	svm->vmcb->control.intercept |= (1UL << INTERCEPT_IRET);
+	svm->vmcb->control.intercept |= (1ULL << INTERCEPT_IRET);
 	++vcpu->stat.nmi_injections;
 }
 
@@ -2604,8 +2698,8 @@
 	sync_lapic_to_cr8(vcpu);
 
 	save_host_msrs(vcpu);
-	fs_selector = kvm_read_fs();
-	gs_selector = kvm_read_gs();
+	savesegment(fs, fs_selector);
+	savesegment(gs, gs_selector);
 	ldt_selector = kvm_read_ldt();
 	svm->vmcb->save.cr2 = vcpu->arch.cr2;
 	/* required for live migration with NPT */
@@ -2692,10 +2786,15 @@
 	vcpu->arch.regs[VCPU_REGS_RSP] = svm->vmcb->save.rsp;
 	vcpu->arch.regs[VCPU_REGS_RIP] = svm->vmcb->save.rip;
 
-	kvm_load_fs(fs_selector);
-	kvm_load_gs(gs_selector);
-	kvm_load_ldt(ldt_selector);
 	load_host_msrs(vcpu);
+	kvm_load_ldt(ldt_selector);
+	loadsegment(fs, fs_selector);
+#ifdef CONFIG_X86_64
+	load_gs_index(gs_selector);
+	wrmsrl(MSR_KERNEL_GS_BASE, current->thread.gs);
+#else
+	loadsegment(gs, gs_selector);
+#endif
 
 	reload_tss(vcpu);
 
@@ -2711,6 +2810,14 @@
 		vcpu->arch.regs_avail &= ~(1 << VCPU_EXREG_PDPTR);
 		vcpu->arch.regs_dirty &= ~(1 << VCPU_EXREG_PDPTR);
 	}
+
+	/*
+	 * We need to handle MC intercepts here before the vcpu has a chance to
+	 * change the physical cpu
+	 */
+	if (unlikely(svm->vmcb->control.exit_code ==
+		     SVM_EXIT_EXCP_BASE + MC_VECTOR))
+		svm_handle_mce(svm);
 }
 
 #undef R
--- linux-mvl-dove-2.6.32.orig/arch/x86/kvm/x86.c
+++ linux-mvl-dove-2.6.32/arch/x86/kvm/x86.c
@@ -47,6 +47,7 @@
 #include <asm/desc.h>
 #include <asm/mtrr.h>
 #include <asm/mce.h>
+#include <asm/pvclock.h>
 
 #define MAX_IO_MSRS 256
 #define CR0_RESERVED_BITS						\
@@ -297,21 +298,16 @@
 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 {
 	if (cr0 & CR0_RESERVED_BITS) {
-		printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
-		       cr0, vcpu->arch.cr0);
 		kvm_inject_gp(vcpu, 0);
 		return;
 	}
 
 	if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
-		printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
 		kvm_inject_gp(vcpu, 0);
 		return;
 	}
 
 	if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
-		printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
-		       "and a clear PE flag\n");
 		kvm_inject_gp(vcpu, 0);
 		return;
 	}
@@ -322,15 +318,11 @@
 			int cs_db, cs_l;
 
 			if (!is_pae(vcpu)) {
-				printk(KERN_DEBUG "set_cr0: #GP, start paging "
-				       "in long mode while PAE is disabled\n");
 				kvm_inject_gp(vcpu, 0);
 				return;
 			}
 			kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 			if (cs_l) {
-				printk(KERN_DEBUG "set_cr0: #GP, start paging "
-				       "in long mode while CS.L == 1\n");
 				kvm_inject_gp(vcpu, 0);
 				return;
 
@@ -338,8 +330,6 @@
 		} else
 #endif
 		if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
-			printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
-			       "reserved bits\n");
 			kvm_inject_gp(vcpu, 0);
 			return;
 		}
@@ -356,7 +346,7 @@
 
 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 {
-	kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
+	kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0eul) | (msw & 0x0f));
 }
 EXPORT_SYMBOL_GPL(kvm_lmsw);
 
@@ -366,28 +356,23 @@
 	unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
 
 	if (cr4 & CR4_RESERVED_BITS) {
-		printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
 		kvm_inject_gp(vcpu, 0);
 		return;
 	}
 
 	if (is_long_mode(vcpu)) {
 		if (!(cr4 & X86_CR4_PAE)) {
-			printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
-			       "in long mode\n");
 			kvm_inject_gp(vcpu, 0);
 			return;
 		}
 	} else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 		   && ((cr4 ^ old_cr4) & pdptr_bits)
 		   && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
-		printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
 		kvm_inject_gp(vcpu, 0);
 		return;
 	}
 
 	if (cr4 & X86_CR4_VMXE) {
-		printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
 		kvm_inject_gp(vcpu, 0);
 		return;
 	}
@@ -408,21 +393,16 @@
 
 	if (is_long_mode(vcpu)) {
 		if (cr3 & CR3_L_MODE_RESERVED_BITS) {
-			printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
 			kvm_inject_gp(vcpu, 0);
 			return;
 		}
 	} else {
 		if (is_pae(vcpu)) {
 			if (cr3 & CR3_PAE_RESERVED_BITS) {
-				printk(KERN_DEBUG
-				       "set_cr3: #GP, reserved bits\n");
 				kvm_inject_gp(vcpu, 0);
 				return;
 			}
 			if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
-				printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
-				       "reserved bits\n");
 				kvm_inject_gp(vcpu, 0);
 				return;
 			}
@@ -454,7 +434,6 @@
 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 {
 	if (cr8 & CR8_RESERVED_BITS) {
-		printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
 		kvm_inject_gp(vcpu, 0);
 		return;
 	}
@@ -484,16 +463,19 @@
  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
  *
  * This list is modified at module load time to reflect the
- * capabilities of the host cpu.
+ * capabilities of the host cpu. This capabilities test skips MSRs that are
+ * kvm-specific. Those are put in the beginning of the list.
  */
+
+#define KVM_SAVE_MSRS_BEGIN	2
 static u32 msrs_to_save[] = {
+	MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 	MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 	MSR_K6_STAR,
 #ifdef CONFIG_X86_64
 	MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 #endif
-	MSR_IA32_TSC, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
-	MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
+	MSR_IA32_TSC, MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 };
 
 static unsigned num_msrs_to_save;
@@ -502,53 +484,42 @@
 	MSR_IA32_MISC_ENABLE,
 };
 
-static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
+static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 {
-	if (efer & efer_reserved_bits) {
-		printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
-		       efer);
-		kvm_inject_gp(vcpu, 0);
-		return;
-	}
+	if (efer & efer_reserved_bits)
+		return 1;
 
 	if (is_paging(vcpu)
-	    && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
-		printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
-		kvm_inject_gp(vcpu, 0);
-		return;
-	}
+	    && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME))
+		return 1;
 
 	if (efer & EFER_FFXSR) {
 		struct kvm_cpuid_entry2 *feat;
 
 		feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
-		if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
-			printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n");
-			kvm_inject_gp(vcpu, 0);
-			return;
-		}
+		if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
+			return 1;
 	}
 
 	if (efer & EFER_SVME) {
 		struct kvm_cpuid_entry2 *feat;
 
 		feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
-		if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
-			printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
-			kvm_inject_gp(vcpu, 0);
-			return;
-		}
+		if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
+			return 1;
 	}
 
-	kvm_x86_ops->set_efer(vcpu, efer);
-
 	efer &= ~EFER_LMA;
 	efer |= vcpu->arch.shadow_efer & EFER_LMA;
 
+	kvm_x86_ops->set_efer(vcpu, efer);
+
 	vcpu->arch.shadow_efer = efer;
 
 	vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 	kvm_mmu_reset_context(vcpu);
+
+	return 0;
 }
 
 void kvm_enable_efer_bits(u64 mask)
@@ -578,14 +549,22 @@
 
 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 {
-	static int version;
+	int version;
+	int r;
 	struct pvclock_wall_clock wc;
-	struct timespec now, sys, boot;
+	struct timespec boot;
 
 	if (!wall_clock)
 		return;
 
-	version++;
+	r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
+	if (r)
+		return;
+
+	if (version & 1)
+		++version;  /* first time write, random junk */
+
+	++version;
 
 	kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 
@@ -595,9 +574,7 @@
 	 * wall clock specified here.  guest system time equals host
 	 * system time for us, thus we must fill in host boot time here.
 	 */
-	now = current_kernel_time();
-	ktime_get_ts(&sys);
-	boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
+	getboottime(&boot);
 
 	wc.sec = boot.tv_sec;
 	wc.nsec = boot.tv_nsec;
@@ -657,6 +634,8 @@
 	struct kvm_vcpu_arch *vcpu = &v->arch;
 	void *shared_kaddr;
 	unsigned long this_tsc_khz;
+	s64 kernel_ns, max_kernel_ns;
+	u64 tsc_timestamp;
 
 	if ((!vcpu->time_page))
 		return;
@@ -670,14 +649,53 @@
 
 	/* Keep irq disabled to prevent changes to the clock */
 	local_irq_save(flags);
-	kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
+	kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
 	ktime_get_ts(&ts);
+	monotonic_to_bootbased(&ts);
+	kernel_ns = timespec_to_ns(&ts);
 	local_irq_restore(flags);
 
+	/*
+	 * Time as measured by the TSC may go backwards when resetting the base
+	 * tsc_timestamp.  The reason for this is that the TSC resolution is
+	 * higher than the resolution of the other clock scales.  Thus, many
+	 * possible measurments of the TSC correspond to one measurement of any
+	 * other clock, and so a spread of values is possible.  This is not a
+	 * problem for the computation of the nanosecond clock; with TSC rates
+	 * around 1GHZ, there can only be a few cycles which correspond to one
+	 * nanosecond value, and any path through this code will inevitably
+	 * take longer than that.  However, with the kernel_ns value itself,
+	 * the precision may be much lower, down to HZ granularity.  If the
+	 * first sampling of TSC against kernel_ns ends in the low part of the
+	 * range, and the second in the high end of the range, we can get:
+	 *
+	 * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
+	 *
+	 * As the sampling errors potentially range in the thousands of cycles,
+	 * it is possible such a time value has already been observed by the
+	 * guest.  To protect against this, we must compute the system time as
+	 * observed by the guest and ensure the new system time is greater.
+	 */
+	max_kernel_ns = 0;
+	if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
+		max_kernel_ns = vcpu->last_guest_tsc -
+			vcpu->hv_clock.tsc_timestamp;
+		max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
+				vcpu->hv_clock.tsc_to_system_mul,
+				vcpu->hv_clock.tsc_shift);
+		max_kernel_ns += vcpu->last_kernel_ns;
+	}
+
+	if (max_kernel_ns > kernel_ns)
+		kernel_ns = max_kernel_ns;
+
 	/* With all the info we got, fill in the values */
 
-	vcpu->hv_clock.system_time = ts.tv_nsec +
-				     (NSEC_PER_SEC * (u64)ts.tv_sec);
+	vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
+	vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
+	vcpu->last_kernel_ns = kernel_ns;
+	vcpu->last_guest_tsc = tsc_timestamp;
+
 	/*
 	 * The interface expects us to write an even number signaling that the
 	 * update is finished. Since the guest won't see the intermediate
@@ -823,9 +841,13 @@
 		if (msr >= MSR_IA32_MC0_CTL &&
 		    msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
 			u32 offset = msr - MSR_IA32_MC0_CTL;
-			/* only 0 or all 1s can be written to IA32_MCi_CTL */
+			/* only 0 or all 1s can be written to IA32_MCi_CTL
+			 * some Linux kernels though clear bit 10 in bank 4 to
+			 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
+			 * this to avoid an uncatched #GP in the guest
+			 */
 			if ((offset & 0x3) == 0 &&
-			    data != 0 && data != ~(u64)0)
+			    data != 0 && (data | (1 << 10)) != ~(u64)0)
 				return -1;
 			vcpu->arch.mce_banks[offset] = data;
 			break;
@@ -839,8 +861,7 @@
 {
 	switch (msr) {
 	case MSR_EFER:
-		set_efer(vcpu, data);
-		break;
+		return set_efer(vcpu, data);
 	case MSR_K7_HWCR:
 		data &= ~(u64)0x40;	/* ignore flush filter disable */
 		if (data != 0) {
@@ -1224,6 +1245,7 @@
 	case KVM_CAP_PIT2:
 	case KVM_CAP_PIT_STATE2:
 	case KVM_CAP_SET_IDENTITY_MAP_ADDR:
+	case KVM_CAP_ADJUST_CLOCK:
 		r = 1;
 		break;
 	case KVM_CAP_COALESCED_MMIO:
@@ -1238,8 +1260,8 @@
 	case KVM_CAP_NR_MEMSLOTS:
 		r = KVM_MEMORY_SLOTS;
 		break;
-	case KVM_CAP_PV_MMU:
-		r = !tdp_enabled;
+	case KVM_CAP_PV_MMU:	/* obsolete */
+		r = 0;
 		break;
 	case KVM_CAP_IOMMU:
 		r = iommu_found();
@@ -1431,6 +1453,7 @@
 {
 	int r;
 
+	vcpu_load(vcpu);
 	r = -E2BIG;
 	if (cpuid->nent < vcpu->arch.cpuid_nent)
 		goto out;
@@ -1442,6 +1465,7 @@
 
 out:
 	cpuid->nent = vcpu->arch.cpuid_nent;
+	vcpu_put(vcpu);
 	return r;
 }
 
@@ -1501,7 +1525,7 @@
 	const u32 kvm_supported_word6_x86_features =
 		F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
 		F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
-		F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
+		F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
 		0 /* SKINIT */ | 0 /* WDT */;
 
 	/* all calls to cpuid_count() should be made on the same cpu */
@@ -1691,6 +1715,7 @@
 	int r;
 	unsigned bank_num = mcg_cap & 0xff, bank;
 
+	vcpu_load(vcpu);
 	r = -EINVAL;
 	if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
 		goto out;
@@ -1705,6 +1730,7 @@
 	for (bank = 0; bank < bank_num; bank++)
 		vcpu->arch.mce_banks[bank*4] = ~(u64)0;
 out:
+	vcpu_put(vcpu);
 	return r;
 }
 
@@ -1907,7 +1933,9 @@
 		r = -EFAULT;
 		if (copy_from_user(&mce, argp, sizeof mce))
 			goto out;
+		vcpu_load(vcpu);
 		r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
+		vcpu_put(vcpu);
 		break;
 	}
 	default:
@@ -2114,6 +2142,7 @@
 		sizeof(ps->channels));
 	ps->flags = kvm->arch.vpit->pit_state.flags;
 	mutex_unlock(&kvm->arch.vpit->pit_state.lock);
+	memset(&ps->reserved, 0, sizeof(ps->reserved));
 	return r;
 }
 
@@ -2152,7 +2181,7 @@
 				      struct kvm_dirty_log *log)
 {
 	int r;
-	int n;
+	unsigned long n;
 	struct kvm_memory_slot *memslot;
 	int is_dirty = 0;
 
@@ -2168,7 +2197,7 @@
 		kvm_mmu_slot_remove_write_access(kvm, log->slot);
 		spin_unlock(&kvm->mmu_lock);
 		memslot = &kvm->memslots[log->slot];
-		n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
+		n = kvm_dirty_bitmap_bytes(memslot);
 		memset(memslot->dirty_bitmap, 0, n);
 	}
 	r = 0;
@@ -2421,6 +2450,45 @@
 		r = 0;
 		break;
 	}
+	case KVM_SET_CLOCK: {
+		struct timespec now;
+		struct kvm_clock_data user_ns;
+		u64 now_ns;
+		s64 delta;
+
+		r = -EFAULT;
+		if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
+			goto out;
+
+		r = -EINVAL;
+		if (user_ns.flags)
+			goto out;
+
+		r = 0;
+		ktime_get_ts(&now);
+		now_ns = timespec_to_ns(&now);
+		delta = user_ns.clock - now_ns;
+		kvm->arch.kvmclock_offset = delta;
+		break;
+	}
+	case KVM_GET_CLOCK: {
+		struct timespec now;
+		struct kvm_clock_data user_ns;
+		u64 now_ns;
+
+		ktime_get_ts(&now);
+		now_ns = timespec_to_ns(&now);
+		user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
+		user_ns.flags = 0;
+		memset(&user_ns.pad, 0, sizeof(user_ns.pad));
+
+		r = -EFAULT;
+		if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
+			goto out;
+		r = 0;
+		break;
+	}
+
 	default:
 		;
 	}
@@ -2433,7 +2501,8 @@
 	u32 dummy[2];
 	unsigned i, j;
 
-	for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
+	/* skip the first msrs in the list. KVM-specific */
+	for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
 		if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
 			continue;
 		if (j < i)
@@ -2462,14 +2531,41 @@
 	return kvm_io_bus_read(&vcpu->kvm->mmio_bus, addr, len, v);
 }
 
-static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
-			       struct kvm_vcpu *vcpu)
+gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
+{
+	u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
+	return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
+}
+
+ gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
+{
+	u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
+	access |= PFERR_FETCH_MASK;
+	return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
+}
+
+gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
+{
+	u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
+	access |= PFERR_WRITE_MASK;
+	return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
+}
+
+/* uses this to access any guest's mapped memory without checking CPL */
+gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
+{
+	return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, 0, error);
+}
+
+static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
+				      struct kvm_vcpu *vcpu, u32 access,
+				      u32 *error)
 {
 	void *data = val;
 	int r = X86EMUL_CONTINUE;
 
 	while (bytes) {
-		gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
+		gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr, access, error);
 		unsigned offset = addr & (PAGE_SIZE-1);
 		unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
 		int ret;
@@ -2492,14 +2588,37 @@
 	return r;
 }
 
+/* used for instruction fetching */
+static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
+				struct kvm_vcpu *vcpu, u32 *error)
+{
+	u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
+	return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
+					  access | PFERR_FETCH_MASK, error);
+}
+
+static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
+			       struct kvm_vcpu *vcpu, u32 *error)
+{
+	u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
+	return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
+					  error);
+}
+
+static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
+			       struct kvm_vcpu *vcpu, u32 *error)
+{
+	return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, error);
+}
+
 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
-				struct kvm_vcpu *vcpu)
+				struct kvm_vcpu *vcpu, u32 *error)
 {
 	void *data = val;
 	int r = X86EMUL_CONTINUE;
 
 	while (bytes) {
-		gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
+		gpa_t gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, error);
 		unsigned offset = addr & (PAGE_SIZE-1);
 		unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
 		int ret;
@@ -2529,6 +2648,7 @@
 				  struct kvm_vcpu *vcpu)
 {
 	gpa_t                 gpa;
+	u32 error_code;
 
 	if (vcpu->mmio_read_completed) {
 		memcpy(val, vcpu->mmio_data, bytes);
@@ -2538,17 +2658,20 @@
 		return X86EMUL_CONTINUE;
 	}
 
-	gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
+	gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, &error_code);
+
+	if (gpa == UNMAPPED_GVA) {
+		kvm_inject_page_fault(vcpu, addr, error_code);
+		return X86EMUL_PROPAGATE_FAULT;
+	}
 
 	/* For APIC access vmexit */
 	if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
 		goto mmio;
 
-	if (kvm_read_guest_virt(addr, val, bytes, vcpu)
+	if (kvm_read_guest_virt(addr, val, bytes, vcpu, NULL)
 				== X86EMUL_CONTINUE)
 		return X86EMUL_CONTINUE;
-	if (gpa == UNMAPPED_GVA)
-		return X86EMUL_PROPAGATE_FAULT;
 
 mmio:
 	/*
@@ -2587,11 +2710,12 @@
 					   struct kvm_vcpu *vcpu)
 {
 	gpa_t                 gpa;
+	u32 error_code;
 
-	gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
+	gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, &error_code);
 
 	if (gpa == UNMAPPED_GVA) {
-		kvm_inject_page_fault(vcpu, addr, 2);
+		kvm_inject_page_fault(vcpu, addr, error_code);
 		return X86EMUL_PROPAGATE_FAULT;
 	}
 
@@ -2655,7 +2779,7 @@
 		char *kaddr;
 		u64 val;
 
-		gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
+		gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
 
 		if (gpa == UNMAPPED_GVA ||
 		   (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
@@ -2700,6 +2824,9 @@
 {
 	struct kvm_vcpu *vcpu = ctxt->vcpu;
 
+	if (!kvm_x86_ops->get_dr)
+		return X86EMUL_UNHANDLEABLE;
+
 	switch (dr) {
 	case 0 ... 3:
 		*dest = kvm_x86_ops->get_dr(vcpu, dr);
@@ -2715,6 +2842,9 @@
 	unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
 	int exception;
 
+	if (!kvm_x86_ops->set_dr)
+		return X86EMUL_UNHANDLEABLE;
+
 	kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
 	if (exception) {
 		/* FIXME: better handling */
@@ -2734,7 +2864,7 @@
 
 	rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
 
-	kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
+	kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu, NULL);
 
 	printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
 	       context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
@@ -2742,7 +2872,8 @@
 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
 
 static struct x86_emulate_ops emulate_ops = {
-	.read_std            = kvm_read_guest_virt,
+	.read_std            = kvm_read_guest_virt_system,
+	.fetch               = kvm_fetch_guest_virt,
 	.read_emulated       = emulator_read_emulated,
 	.write_emulated      = emulator_write_emulated,
 	.cmpxchg_emulated    = emulator_cmpxchg_emulated,
@@ -2785,8 +2916,9 @@
 		vcpu->arch.emulate_ctxt.vcpu = vcpu;
 		vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
 		vcpu->arch.emulate_ctxt.mode =
+			(!(vcpu->arch.cr0 & X86_CR0_PE)) ? X86EMUL_MODE_REAL :
 			(vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
-			? X86EMUL_MODE_REAL : cs_l
+			? X86EMUL_MODE_VM86 : cs_l
 			? X86EMUL_MODE_PROT64 :	cs_db
 			? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
 
@@ -2878,12 +3010,17 @@
 	gva_t q = vcpu->arch.pio.guest_gva;
 	unsigned bytes;
 	int ret;
+	u32 error_code;
 
 	bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
 	if (vcpu->arch.pio.in)
-		ret = kvm_write_guest_virt(q, p, bytes, vcpu);
+		ret = kvm_write_guest_virt(q, p, bytes, vcpu, &error_code);
 	else
-		ret = kvm_read_guest_virt(q, p, bytes, vcpu);
+		ret = kvm_read_guest_virt(q, p, bytes, vcpu, &error_code);
+
+	if (ret == X86EMUL_PROPAGATE_FAULT)
+		kvm_inject_page_fault(vcpu, q, error_code);
+
 	return ret;
 }
 
@@ -2904,7 +3041,7 @@
 		if (io->in) {
 			r = pio_copy_data(vcpu);
 			if (r)
-				return r;
+				goto out;
 		}
 
 		delta = 1;
@@ -2931,7 +3068,7 @@
 			kvm_register_write(vcpu, VCPU_REGS_RSI, val);
 		}
 	}
-
+out:
 	io->count -= io->cur_count;
 	io->cur_count = 0;
 
@@ -2974,6 +3111,8 @@
 {
 	unsigned long val;
 
+	trace_kvm_pio(!in, port, size, 1);
+
 	vcpu->run->exit_reason = KVM_EXIT_IO;
 	vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
 	vcpu->run->io.size = vcpu->arch.pio.size = size;
@@ -2985,9 +3124,6 @@
 	vcpu->arch.pio.down = 0;
 	vcpu->arch.pio.rep = 0;
 
-	trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
-		      size, 1);
-
 	val = kvm_register_read(vcpu, VCPU_REGS_RAX);
 	memcpy(vcpu->arch.pio_data, &val, 4);
 
@@ -3006,6 +3142,8 @@
 	unsigned now, in_page;
 	int ret = 0;
 
+	trace_kvm_pio(!in, port, size, count);
+
 	vcpu->run->exit_reason = KVM_EXIT_IO;
 	vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
 	vcpu->run->io.size = vcpu->arch.pio.size = size;
@@ -3017,9 +3155,6 @@
 	vcpu->arch.pio.down = down;
 	vcpu->arch.pio.rep = rep;
 
-	trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
-		      size, count);
-
 	if (!count) {
 		kvm_x86_ops->skip_emulated_instruction(vcpu);
 		return 1;
@@ -3051,10 +3186,8 @@
 	if (!vcpu->arch.pio.in) {
 		/* string PIO write */
 		ret = pio_copy_data(vcpu);
-		if (ret == X86EMUL_PROPAGATE_FAULT) {
-			kvm_inject_gp(vcpu, 0);
+		if (ret == X86EMUL_PROPAGATE_FAULT)
 			return 1;
-		}
 		if (ret == 0 && !pio_string_write(vcpu)) {
 			complete_pio(vcpu);
 			if (vcpu->arch.pio.count == 0)
@@ -3602,6 +3735,8 @@
 	kvm_x86_ops->prepare_guest_switch(vcpu);
 	kvm_load_guest_fpu(vcpu);
 
+	kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
+
 	local_irq_disable();
 
 	clear_bit(KVM_REQ_KICK, &vcpu->requests);
@@ -4034,7 +4169,9 @@
 		kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
 		return 1;
 	}
-	return kvm_read_guest_virt(dtable.base + index*8, seg_desc, sizeof(*seg_desc), vcpu);
+	return kvm_read_guest_virt_system(dtable.base + index*8,
+					  seg_desc, sizeof(*seg_desc),
+					  vcpu, NULL);
 }
 
 /* allowed just for 8 bytes segments */
@@ -4048,15 +4185,23 @@
 
 	if (dtable.limit < index * 8 + 7)
 		return 1;
-	return kvm_write_guest_virt(dtable.base + index*8, seg_desc, sizeof(*seg_desc), vcpu);
+	return kvm_write_guest_virt(dtable.base + index*8, seg_desc, sizeof(*seg_desc), vcpu, NULL);
+}
+
+static gpa_t get_tss_base_addr_write(struct kvm_vcpu *vcpu,
+			       struct desc_struct *seg_desc)
+{
+	u32 base_addr = get_desc_base(seg_desc);
+
+	return kvm_mmu_gva_to_gpa_write(vcpu, base_addr, NULL);
 }
 
-static gpa_t get_tss_base_addr(struct kvm_vcpu *vcpu,
+static gpa_t get_tss_base_addr_read(struct kvm_vcpu *vcpu,
 			     struct desc_struct *seg_desc)
 {
 	u32 base_addr = get_desc_base(seg_desc);
 
-	return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
+	return kvm_mmu_gva_to_gpa_read(vcpu, base_addr, NULL);
 }
 
 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
@@ -4067,18 +4212,6 @@
 	return kvm_seg.selector;
 }
 
-static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
-						u16 selector,
-						struct kvm_segment *kvm_seg)
-{
-	struct desc_struct seg_desc;
-
-	if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
-		return 1;
-	seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
-	return 0;
-}
-
 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
 {
 	struct kvm_segment segvar = {
@@ -4096,7 +4229,7 @@
 		.unusable = 0,
 	};
 	kvm_x86_ops->set_segment(vcpu, &segvar, seg);
-	return 0;
+	return X86EMUL_CONTINUE;
 }
 
 static int is_vm86_segment(struct kvm_vcpu *vcpu, int seg)
@@ -4106,24 +4239,113 @@
 		(kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_VM);
 }
 
-int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
-				int type_bits, int seg)
+int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg)
 {
 	struct kvm_segment kvm_seg;
+	struct desc_struct seg_desc;
+	u8 dpl, rpl, cpl;
+	unsigned err_vec = GP_VECTOR;
+	u32 err_code = 0;
+	bool null_selector = !(selector & ~0x3); /* 0000-0003 are null */
+	int ret;
 
 	if (is_vm86_segment(vcpu, seg) || !(vcpu->arch.cr0 & X86_CR0_PE))
 		return kvm_load_realmode_segment(vcpu, selector, seg);
-	if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
-		return 1;
-	kvm_seg.type |= type_bits;
 
-	if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
-	    seg != VCPU_SREG_LDTR)
-		if (!kvm_seg.s)
-			kvm_seg.unusable = 1;
 
+	/* NULL selector is not valid for TR, CS and SS */
+	if ((seg == VCPU_SREG_CS || seg == VCPU_SREG_SS || seg == VCPU_SREG_TR)
+	    && null_selector)
+		goto exception;
+
+	/* TR should be in GDT only */
+	if (seg == VCPU_SREG_TR && (selector & (1 << 2)))
+		goto exception;
+
+	ret = load_guest_segment_descriptor(vcpu, selector, &seg_desc);
+	if (ret)
+		return ret;
+
+	seg_desct_to_kvm_desct(&seg_desc, selector, &kvm_seg);
+
+	if (null_selector) { /* for NULL selector skip all following checks */
+		kvm_seg.unusable = 1;
+		goto load;
+	}
+
+	err_code = selector & 0xfffc;
+	err_vec = GP_VECTOR;
+
+	/* can't load system descriptor into segment selecor */
+	if (seg <= VCPU_SREG_GS && !kvm_seg.s)
+		goto exception;
+
+	if (!kvm_seg.present) {
+		err_vec = (seg == VCPU_SREG_SS) ? SS_VECTOR : NP_VECTOR;
+		goto exception;
+	}
+
+	rpl = selector & 3;
+	dpl = kvm_seg.dpl;
+	cpl = kvm_x86_ops->get_cpl(vcpu);
+
+	switch (seg) {
+	case VCPU_SREG_SS:
+		/*
+		 * segment is not a writable data segment or segment
+		 * selector's RPL != CPL or segment selector's RPL != CPL
+		 */
+		if (rpl != cpl || (kvm_seg.type & 0xa) != 0x2 || dpl != cpl)
+			goto exception;
+		break;
+	case VCPU_SREG_CS:
+		if (!(kvm_seg.type & 8))
+			goto exception;
+
+		if (kvm_seg.type & 4) {
+			/* conforming */
+			if (dpl > cpl)
+				goto exception;
+		} else {
+			/* nonconforming */
+			if (rpl > cpl || dpl != cpl)
+				goto exception;
+		}
+		/* CS(RPL) <- CPL */
+		selector = (selector & 0xfffc) | cpl;
+		break;
+	case VCPU_SREG_TR:
+		if (kvm_seg.s || (kvm_seg.type != 1 && kvm_seg.type != 9))
+			goto exception;
+		break;
+	case VCPU_SREG_LDTR:
+		if (kvm_seg.s || kvm_seg.type != 2)
+			goto exception;
+		break;
+	default: /*  DS, ES, FS, or GS */
+		/*
+		 * segment is not a data or readable code segment or
+		 * ((segment is a data or nonconforming code segment)
+		 * and (both RPL and CPL > DPL))
+		 */
+		if ((kvm_seg.type & 0xa) == 0x8 ||
+		    (((kvm_seg.type & 0xc) != 0xc) && (rpl > dpl && cpl > dpl)))
+			goto exception;
+		break;
+	}
+
+	if (!kvm_seg.unusable && kvm_seg.s) {
+		/* mark segment as accessed */
+		kvm_seg.type |= 1;
+		seg_desc.type |= 1;
+		save_guest_segment_descriptor(vcpu, selector, &seg_desc);
+	}
+load:
 	kvm_set_segment(vcpu, &kvm_seg, seg);
-	return 0;
+	return X86EMUL_CONTINUE;
+exception:
+	kvm_queue_exception_e(vcpu, err_vec, err_code);
+	return X86EMUL_PROPAGATE_FAULT;
 }
 
 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
@@ -4149,6 +4371,14 @@
 	tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
 }
 
+static void kvm_load_segment_selector(struct kvm_vcpu *vcpu, u16 sel, int seg)
+{
+	struct kvm_segment kvm_seg;
+	kvm_get_segment(vcpu, &kvm_seg, seg);
+	kvm_seg.selector = sel;
+	kvm_set_segment(vcpu, &kvm_seg, seg);
+}
+
 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
 				  struct tss_segment_32 *tss)
 {
@@ -4166,25 +4396,41 @@
 	kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
 	kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
 
-	if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
+	/*
+	 * SDM says that segment selectors are loaded before segment
+	 * descriptors
+	 */
+	kvm_load_segment_selector(vcpu, tss->ldt_selector, VCPU_SREG_LDTR);
+	kvm_load_segment_selector(vcpu, tss->es, VCPU_SREG_ES);
+	kvm_load_segment_selector(vcpu, tss->cs, VCPU_SREG_CS);
+	kvm_load_segment_selector(vcpu, tss->ss, VCPU_SREG_SS);
+	kvm_load_segment_selector(vcpu, tss->ds, VCPU_SREG_DS);
+	kvm_load_segment_selector(vcpu, tss->fs, VCPU_SREG_FS);
+	kvm_load_segment_selector(vcpu, tss->gs, VCPU_SREG_GS);
+
+	/*
+	 * Now load segment descriptors. If fault happenes at this stage
+	 * it is handled in a context of new task
+	 */
+	if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, VCPU_SREG_LDTR))
 		return 1;
 
-	if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
+	if (kvm_load_segment_descriptor(vcpu, tss->es, VCPU_SREG_ES))
 		return 1;
 
-	if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
+	if (kvm_load_segment_descriptor(vcpu, tss->cs, VCPU_SREG_CS))
 		return 1;
 
-	if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
+	if (kvm_load_segment_descriptor(vcpu, tss->ss, VCPU_SREG_SS))
 		return 1;
 
-	if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
+	if (kvm_load_segment_descriptor(vcpu, tss->ds, VCPU_SREG_DS))
 		return 1;
 
-	if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
+	if (kvm_load_segment_descriptor(vcpu, tss->fs, VCPU_SREG_FS))
 		return 1;
 
-	if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
+	if (kvm_load_segment_descriptor(vcpu, tss->gs, VCPU_SREG_GS))
 		return 1;
 	return 0;
 }
@@ -4225,19 +4471,33 @@
 	kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
 	kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
 
-	if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
+	/*
+	 * SDM says that segment selectors are loaded before segment
+	 * descriptors
+	 */
+	kvm_load_segment_selector(vcpu, tss->ldt, VCPU_SREG_LDTR);
+	kvm_load_segment_selector(vcpu, tss->es, VCPU_SREG_ES);
+	kvm_load_segment_selector(vcpu, tss->cs, VCPU_SREG_CS);
+	kvm_load_segment_selector(vcpu, tss->ss, VCPU_SREG_SS);
+	kvm_load_segment_selector(vcpu, tss->ds, VCPU_SREG_DS);
+
+	/*
+	 * Now load segment descriptors. If fault happenes at this stage
+	 * it is handled in a context of new task
+	 */
+	if (kvm_load_segment_descriptor(vcpu, tss->ldt, VCPU_SREG_LDTR))
 		return 1;
 
-	if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
+	if (kvm_load_segment_descriptor(vcpu, tss->es, VCPU_SREG_ES))
 		return 1;
 
-	if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
+	if (kvm_load_segment_descriptor(vcpu, tss->cs, VCPU_SREG_CS))
 		return 1;
 
-	if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
+	if (kvm_load_segment_descriptor(vcpu, tss->ss, VCPU_SREG_SS))
 		return 1;
 
-	if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
+	if (kvm_load_segment_descriptor(vcpu, tss->ds, VCPU_SREG_DS))
 		return 1;
 	return 0;
 }
@@ -4259,7 +4519,7 @@
 			    sizeof tss_segment_16))
 		goto out;
 
-	if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
+	if (kvm_read_guest(vcpu->kvm, get_tss_base_addr_read(vcpu, nseg_desc),
 			   &tss_segment_16, sizeof tss_segment_16))
 		goto out;
 
@@ -4267,7 +4527,7 @@
 		tss_segment_16.prev_task_link = old_tss_sel;
 
 		if (kvm_write_guest(vcpu->kvm,
-				    get_tss_base_addr(vcpu, nseg_desc),
+				    get_tss_base_addr_write(vcpu, nseg_desc),
 				    &tss_segment_16.prev_task_link,
 				    sizeof tss_segment_16.prev_task_link))
 			goto out;
@@ -4298,7 +4558,7 @@
 			    sizeof tss_segment_32))
 		goto out;
 
-	if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
+	if (kvm_read_guest(vcpu->kvm, get_tss_base_addr_read(vcpu, nseg_desc),
 			   &tss_segment_32, sizeof tss_segment_32))
 		goto out;
 
@@ -4306,7 +4566,7 @@
 		tss_segment_32.prev_task_link = old_tss_sel;
 
 		if (kvm_write_guest(vcpu->kvm,
-				    get_tss_base_addr(vcpu, nseg_desc),
+				    get_tss_base_addr_write(vcpu, nseg_desc),
 				    &tss_segment_32.prev_task_link,
 				    sizeof tss_segment_32.prev_task_link))
 			goto out;
@@ -4328,8 +4588,9 @@
 	int ret = 0;
 	u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
 	u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
+	u32 desc_limit;
 
-	old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
+	old_tss_base = kvm_mmu_gva_to_gpa_write(vcpu, old_tss_base, NULL);
 
 	/* FIXME: Handle errors. Failure to read either TSS or their
 	 * descriptors should generate a pagefault.
@@ -4350,7 +4611,10 @@
 		}
 	}
 
-	if (!nseg_desc.p || get_desc_limit(&nseg_desc) < 0x67) {
+	desc_limit = get_desc_limit(&nseg_desc);
+	if (!nseg_desc.p ||
+	    ((desc_limit < 0x67 && (nseg_desc.type & 8)) ||
+	     desc_limit < 0x2b)) {
 		kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
 		return 1;
 	}
@@ -4538,7 +4802,7 @@
 
 	vcpu_load(vcpu);
 	down_read(&vcpu->kvm->slots_lock);
-	gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
+	gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
 	up_read(&vcpu->kvm->slots_lock);
 	tr->physical_address = gpa;
 	tr->valid = gpa != UNMAPPED_GVA;
@@ -4762,12 +5026,13 @@
 				       GFP_KERNEL);
 	if (!vcpu->arch.mce_banks) {
 		r = -ENOMEM;
-		goto fail_mmu_destroy;
+		goto fail_free_lapic;
 	}
 	vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
 
 	return 0;
-
+fail_free_lapic:
+	kvm_free_lapic(vcpu);
 fail_mmu_destroy:
 	kvm_mmu_destroy(vcpu);
 fail_free_pio_data:
@@ -4778,6 +5043,7 @@
 
 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
 {
+	kfree(vcpu->arch.mce_banks);
 	kvm_free_lapic(vcpu);
 	down_read(&vcpu->kvm->slots_lock);
 	kvm_mmu_destroy(vcpu);
--- linux-mvl-dove-2.6.32.orig/arch/x86/kvm/paging_tmpl.h
+++ linux-mvl-dove-2.6.32/arch/x86/kvm/paging_tmpl.h
@@ -150,7 +150,9 @@
 		walker->table_gfn[walker->level - 1] = table_gfn;
 		walker->pte_gpa[walker->level - 1] = pte_gpa;
 
-		kvm_read_guest(vcpu->kvm, pte_gpa, &pte, sizeof(pte));
+		if (kvm_read_guest(vcpu->kvm, pte_gpa, &pte, sizeof(pte)))
+			goto not_present;
+
 		trace_kvm_mmu_paging_element(pte, walker->level);
 
 		if (!is_present_gpte(pte))
@@ -316,8 +318,32 @@
 			break;
 		}
 
-		if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep))
-			continue;
+		if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) {
+			struct kvm_mmu_page *child;
+			unsigned direct_access;
+
+			if (level != gw->level)
+				continue;
+
+			/*
+			 * For the direct sp, if the guest pte's dirty bit
+			 * changed form clean to dirty, it will corrupt the
+			 * sp's access: allow writable in the read-only sp,
+			 * so we should update the spte at this point to get
+			 * a new sp with the correct access.
+			 */
+			direct_access = gw->pt_access & gw->pte_access;
+			if (!is_dirty_gpte(gw->ptes[gw->level - 1]))
+				direct_access &= ~ACC_WRITE_MASK;
+
+			child = page_header(*sptep & PT64_BASE_ADDR_MASK);
+			if (child->role.access == direct_access)
+				continue;
+
+			mmu_page_remove_parent_pte(child, sptep);
+			__set_spte(sptep, shadow_trap_nonpresent_pte);
+			kvm_flush_remote_tlbs(vcpu->kvm);
+		}
 
 		if (is_large_pte(*sptep)) {
 			rmap_remove(vcpu->kvm, sptep);
@@ -334,6 +360,7 @@
 			/* advance table_gfn when emulating 1gb pages with 4k */
 			if (delta == 0)
 				table_gfn += PT_INDEX(addr, level);
+			access &= gw->pte_access;
 		} else {
 			direct = 0;
 			table_gfn = gw->table_gfn[level - 2];
@@ -455,8 +482,6 @@
 static void FNAME(invlpg)(struct kvm_vcpu *vcpu, gva_t gva)
 {
 	struct kvm_shadow_walk_iterator iterator;
-	pt_element_t gpte;
-	gpa_t pte_gpa = -1;
 	int level;
 	u64 *sptep;
 	int need_flush = 0;
@@ -471,10 +496,6 @@
 		if (level == PT_PAGE_TABLE_LEVEL  ||
 		    ((level == PT_DIRECTORY_LEVEL && is_large_pte(*sptep))) ||
 		    ((level == PT_PDPE_LEVEL && is_large_pte(*sptep)))) {
-			struct kvm_mmu_page *sp = page_header(__pa(sptep));
-
-			pte_gpa = (sp->gfn << PAGE_SHIFT);
-			pte_gpa += (sptep - sp->spt) * sizeof(pt_element_t);
 
 			if (is_shadow_present_pte(*sptep)) {
 				rmap_remove(vcpu->kvm, sptep);
@@ -493,32 +514,25 @@
 	if (need_flush)
 		kvm_flush_remote_tlbs(vcpu->kvm);
 	spin_unlock(&vcpu->kvm->mmu_lock);
-
-	if (pte_gpa == -1)
-		return;
-	if (kvm_read_guest_atomic(vcpu->kvm, pte_gpa, &gpte,
-				  sizeof(pt_element_t)))
-		return;
-	if (is_present_gpte(gpte) && (gpte & PT_ACCESSED_MASK)) {
-		if (mmu_topup_memory_caches(vcpu))
-			return;
-		kvm_mmu_pte_write(vcpu, pte_gpa, (const u8 *)&gpte,
-				  sizeof(pt_element_t), 0);
-	}
 }
 
-static gpa_t FNAME(gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t vaddr)
+static gpa_t FNAME(gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t vaddr, u32 access,
+			       u32 *error)
 {
 	struct guest_walker walker;
 	gpa_t gpa = UNMAPPED_GVA;
 	int r;
 
-	r = FNAME(walk_addr)(&walker, vcpu, vaddr, 0, 0, 0);
+	r = FNAME(walk_addr)(&walker, vcpu, vaddr,
+			     !!(access & PFERR_WRITE_MASK),
+			     !!(access & PFERR_USER_MASK),
+			     !!(access & PFERR_FETCH_MASK));
 
 	if (r) {
 		gpa = gfn_to_gpa(walker.gfn);
 		gpa |= vaddr & ~PAGE_MASK;
-	}
+	} else if (error)
+		*error = walker.error_code;
 
 	return gpa;
 }
--- linux-mvl-dove-2.6.32.orig/arch/x86/xen/xen-asm_64.S
+++ linux-mvl-dove-2.6.32/arch/x86/xen/xen-asm_64.S
@@ -96,7 +96,7 @@
 	pushq $__USER32_CS
 	pushq %rcx
 
-	pushq $VGCF_in_syscall
+	pushq $0
 1:	jmp hypercall_iret
 ENDPATCH(xen_sysret32)
 RELOC(xen_sysret32, 1b+1)
@@ -151,7 +151,7 @@
 ENTRY(xen_sysenter_target)
 	lea 16(%rsp), %rsp	/* strip %rcx, %r11 */
 	mov $-ENOSYS, %rax
-	pushq $VGCF_in_syscall
+	pushq $0
 	jmp hypercall_iret
 ENDPROC(xen_syscall32_target)
 ENDPROC(xen_sysenter_target)
--- linux-mvl-dove-2.6.32.orig/arch/x86/xen/multicalls.c
+++ linux-mvl-dove-2.6.32/arch/x86/xen/multicalls.c
@@ -189,10 +189,10 @@
 	unsigned argidx = roundup(b->argidx, sizeof(u64));
 
 	BUG_ON(preemptible());
-	BUG_ON(b->argidx > MC_ARGS);
+	BUG_ON(b->argidx >= MC_ARGS);
 
 	if (b->mcidx == MC_BATCH ||
-	    (argidx + args) > MC_ARGS) {
+	    (argidx + args) >= MC_ARGS) {
 		mc_stats_flush(b->mcidx == MC_BATCH ? FL_SLOTS : FL_ARGS);
 		xen_mc_flush();
 		argidx = roundup(b->argidx, sizeof(u64));
@@ -206,7 +206,7 @@
 	ret.args = &b->args[argidx];
 	b->argidx = argidx + args;
 
-	BUG_ON(b->argidx > MC_ARGS);
+	BUG_ON(b->argidx >= MC_ARGS);
 	return ret;
 }
 
@@ -216,7 +216,7 @@
 	struct multicall_space ret = { NULL, NULL };
 
 	BUG_ON(preemptible());
-	BUG_ON(b->argidx > MC_ARGS);
+	BUG_ON(b->argidx >= MC_ARGS);
 
 	if (b->mcidx == 0)
 		return ret;
@@ -224,14 +224,14 @@
 	if (b->entries[b->mcidx - 1].op != op)
 		return ret;
 
-	if ((b->argidx + size) > MC_ARGS)
+	if ((b->argidx + size) >= MC_ARGS)
 		return ret;
 
 	ret.mc = &b->entries[b->mcidx - 1];
 	ret.args = &b->args[b->argidx];
 	b->argidx += size;
 
-	BUG_ON(b->argidx > MC_ARGS);
+	BUG_ON(b->argidx >= MC_ARGS);
 	return ret;
 }
 
--- linux-mvl-dove-2.6.32.orig/arch/x86/xen/mmu.c
+++ linux-mvl-dove-2.6.32/arch/x86/xen/mmu.c
@@ -185,7 +185,7 @@
 }
 
 /* Build the parallel p2m_top_mfn structures */
-static void __init xen_build_mfn_list_list(void)
+void xen_build_mfn_list_list(void)
 {
 	unsigned pfn, idx;
 
@@ -1141,7 +1141,7 @@
 
 	active_mm = percpu_read(cpu_tlbstate.active_mm);
 
-	if (active_mm == mm)
+	if (active_mm == mm && percpu_read(cpu_tlbstate.state) != TLBSTATE_OK)
 		leave_mm(smp_processor_id());
 
 	/* If this cpu still has a stale cr3 reference, then make sure
@@ -1432,14 +1432,15 @@
 {
 	pgprot_t prot = PAGE_KERNEL;
 
+	/*
+	 * We disable highmem allocations for page tables so we should never
+	 * see any calls to kmap_atomic_pte on a highmem page.
+	 */
+	BUG_ON(PageHighMem(page));
+
 	if (PagePinned(page))
 		prot = PAGE_KERNEL_RO;
 
-	if (0 && PageHighMem(page))
-		printk("mapping highpte %lx type %d prot %s\n",
-		       page_to_pfn(page), type,
-		       (unsigned long)pgprot_val(prot) & _PAGE_RW ? "WRITE" : "READ");
-
 	return kmap_atomic_prot(page, type, prot);
 }
 #endif
@@ -1657,8 +1658,10 @@
 		for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
 			pte_t pte;
 
+#ifdef CONFIG_X86_32
 			if (pfn > max_pfn_mapped)
 				max_pfn_mapped = pfn;
+#endif
 
 			if (!pte_none(pte_page[pteidx]))
 				continue;
@@ -1703,6 +1706,12 @@
 	pud_t *l3;
 	pmd_t *l2;
 
+	/* max_pfn_mapped is the last pfn mapped in the initial memory
+	 * mappings. Considering that on Xen after the kernel mappings we
+	 * have the mappings of some pages that don't exist in pfn space, we
+	 * set max_pfn_mapped to the last real pfn mapped. */
+	max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->mfn_list));
+
 	/* Zap identity mapping */
 	init_level4_pgt[0] = __pgd(0);
 
--- linux-mvl-dove-2.6.32.orig/arch/x86/xen/xen-ops.h
+++ linux-mvl-dove-2.6.32/arch/x86/xen/xen-ops.h
@@ -25,6 +25,7 @@
 
 void xen_setup_mfn_list_list(void);
 void xen_setup_shared_info(void);
+void xen_build_mfn_list_list(void);
 void xen_setup_machphys_mapping(void);
 pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn);
 void xen_ident_map_ISA(void);
@@ -41,6 +42,7 @@
 
 void xen_init_irq_ops(void);
 void xen_setup_timer(int cpu);
+void xen_setup_runstate_info(int cpu);
 void xen_teardown_timer(int cpu);
 cycle_t xen_clocksource_read(void);
 void xen_setup_cpu_clockevents(void);
--- linux-mvl-dove-2.6.32.orig/arch/x86/xen/enlighten.c
+++ linux-mvl-dove-2.6.32/arch/x86/xen/enlighten.c
@@ -48,6 +48,7 @@
 #include <asm/traps.h>
 #include <asm/setup.h>
 #include <asm/desc.h>
+#include <asm/pgalloc.h>
 #include <asm/pgtable.h>
 #include <asm/tlbflush.h>
 #include <asm/reboot.h>
@@ -138,24 +139,23 @@
  */
 void xen_vcpu_restore(void)
 {
-	if (have_vcpu_info_placement) {
-		int cpu;
+	int cpu;
 
-		for_each_online_cpu(cpu) {
-			bool other_cpu = (cpu != smp_processor_id());
+	for_each_online_cpu(cpu) {
+		bool other_cpu = (cpu != smp_processor_id());
 
-			if (other_cpu &&
-			    HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL))
-				BUG();
+		if (other_cpu &&
+		    HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL))
+			BUG();
 
-			xen_vcpu_setup(cpu);
+		xen_setup_runstate_info(cpu);
 
-			if (other_cpu &&
-			    HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL))
-				BUG();
-		}
+		if (have_vcpu_info_placement)
+			xen_vcpu_setup(cpu);
 
-		BUG_ON(!have_vcpu_info_placement);
+		if (other_cpu &&
+		    HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL))
+			BUG();
 	}
 }
 
@@ -332,6 +332,24 @@
 	xen_mc_issue(PARAVIRT_LAZY_CPU);
 }
 
+#ifdef CONFIG_X86_32
+static void xen_load_user_cs_desc(int cpu, struct mm_struct *mm)
+{
+	void *gdt;
+	xmaddr_t mgdt;
+	u64 descriptor;
+	struct desc_struct user_cs;
+
+	gdt = &get_cpu_gdt_table(cpu)[GDT_ENTRY_DEFAULT_USER_CS];
+	mgdt = virt_to_machine(gdt);
+
+	user_cs = mm->context.user_cs;
+	descriptor = (u64) user_cs.a | ((u64) user_cs.b) << 32;
+
+	HYPERVISOR_update_descriptor(mgdt.maddr, descriptor);
+}
+#endif /*CONFIG_X86_32*/
+
 static void xen_load_gdt(const struct desc_ptr *dtr)
 {
 	unsigned long va = dtr->address;
@@ -924,7 +942,7 @@
 };
 
 static const struct pv_time_ops xen_time_ops __initdata = {
-	.sched_clock = xen_sched_clock,
+	.sched_clock = xen_clocksource_read,
 };
 
 static const struct pv_cpu_ops xen_cpu_ops __initdata = {
@@ -958,6 +976,9 @@
 
 	.load_tr_desc = paravirt_nop,
 	.set_ldt = xen_set_ldt,
+#ifdef CONFIG_X86_32
+	.load_user_cs_desc = xen_load_user_cs_desc,
+#endif /*CONFIG_X86_32*/
 	.load_gdt = xen_load_gdt,
 	.load_idt = xen_load_idt,
 	.load_tls = xen_load_tls,
@@ -997,10 +1018,6 @@
 {
 	struct sched_shutdown r = { .reason = reason };
 
-#ifdef CONFIG_SMP
-	smp_send_stop();
-#endif
-
 	if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r))
 		BUG();
 }
@@ -1093,6 +1110,12 @@
 
 	__supported_pte_mask |= _PAGE_IOMAP;
 
+	/*
+	 * Prevent page tables from being allocated in highmem, even
+	 * if CONFIG_HIGHPTE is enabled.
+	 */
+	__userpte_alloc_gfp &= ~__GFP_HIGHMEM;
+
 #ifdef CONFIG_X86_64
 	/* Work out if we support NX */
 	check_efer();
@@ -1182,6 +1205,8 @@
 
 	xen_raw_console_write("about to get started...\n");
 
+	xen_setup_runstate_info(0);
+
 	/* Start the world */
 #ifdef CONFIG_X86_32
 	i386_start_kernel();
--- linux-mvl-dove-2.6.32.orig/arch/x86/xen/suspend.c
+++ linux-mvl-dove-2.6.32/arch/x86/xen/suspend.c
@@ -1,4 +1,5 @@
 #include <linux/types.h>
+#include <linux/clockchips.h>
 
 #include <xen/interface/xen.h>
 #include <xen/grant_table.h>
@@ -27,6 +28,8 @@
 
 void xen_post_suspend(int suspend_cancelled)
 {
+	xen_build_mfn_list_list();
+
 	xen_setup_shared_info();
 
 	if (suspend_cancelled) {
@@ -44,7 +47,19 @@
 
 }
 
+static void xen_vcpu_notify_restore(void *data)
+{
+	unsigned long reason = (unsigned long)data;
+
+	/* Boot processor notified via generic timekeeping_resume() */
+	if ( smp_processor_id() == 0)
+		return;
+
+	clockevents_notify(reason, NULL);
+}
+
 void xen_arch_resume(void)
 {
-	/* nothing */
+	on_each_cpu(xen_vcpu_notify_restore,
+		    (void *)CLOCK_EVT_NOTIFY_RESUME, 1);
 }
--- linux-mvl-dove-2.6.32.orig/arch/x86/xen/smp.c
+++ linux-mvl-dove-2.6.32/arch/x86/xen/smp.c
@@ -295,6 +295,7 @@
 		(unsigned long)task_stack_page(idle) -
 		KERNEL_STACK_OFFSET + THREAD_SIZE;
 #endif
+	xen_setup_runstate_info(cpu);
 	xen_setup_timer(cpu);
 	xen_init_lock_cpu(cpu);
 
@@ -395,9 +396,9 @@
 	BUG();
 }
 
-static void xen_smp_send_stop(void)
+static void xen_stop_other_cpus(int wait)
 {
-	smp_call_function(stop_self, NULL, 0);
+	smp_call_function(stop_self, NULL, wait);
 }
 
 static void xen_smp_send_reschedule(int cpu)
@@ -465,7 +466,7 @@
 	.cpu_disable = xen_cpu_disable,
 	.play_dead = xen_play_dead,
 
-	.smp_send_stop = xen_smp_send_stop,
+	.stop_other_cpus = xen_stop_other_cpus,
 	.smp_send_reschedule = xen_smp_send_reschedule,
 
 	.send_call_func_ipi = xen_smp_send_call_function_ipi,
--- linux-mvl-dove-2.6.32.orig/arch/x86/xen/time.c
+++ linux-mvl-dove-2.6.32/arch/x86/xen/time.c
@@ -100,7 +100,7 @@
 	return per_cpu(runstate, vcpu).state == RUNSTATE_runnable;
 }
 
-static void setup_runstate_info(int cpu)
+void xen_setup_runstate_info(int cpu)
 {
 	struct vcpu_register_runstate_memory_area area;
 
@@ -154,45 +154,6 @@
 	account_idle_ticks(ticks);
 }
 
-/*
- * Xen sched_clock implementation.  Returns the number of unstolen
- * nanoseconds, which is nanoseconds the VCPU spent in RUNNING+BLOCKED
- * states.
- */
-unsigned long long xen_sched_clock(void)
-{
-	struct vcpu_runstate_info state;
-	cycle_t now;
-	u64 ret;
-	s64 offset;
-
-	/*
-	 * Ideally sched_clock should be called on a per-cpu basis
-	 * anyway, so preempt should already be disabled, but that's
-	 * not current practice at the moment.
-	 */
-	preempt_disable();
-
-	now = xen_clocksource_read();
-
-	get_runstate_snapshot(&state);
-
-	WARN_ON(state.state != RUNSTATE_running);
-
-	offset = now - state.state_entry_time;
-	if (offset < 0)
-		offset = 0;
-
-	ret = state.time[RUNSTATE_blocked] +
-		state.time[RUNSTATE_running] +
-		offset;
-
-	preempt_enable();
-
-	return ret;
-}
-
-
 /* Get the TSC speed from Xen */
 unsigned long xen_tsc_khz(void)
 {
@@ -434,7 +395,7 @@
 		name = "<timer kasprintf failed>";
 
 	irq = bind_virq_to_irqhandler(VIRQ_TIMER, cpu, xen_timer_interrupt,
-				      IRQF_DISABLED|IRQF_PERCPU|IRQF_NOBALANCING,
+				      IRQF_DISABLED|IRQF_PERCPU|IRQF_NOBALANCING|IRQF_TIMER,
 				      name, NULL);
 
 	evt = &per_cpu(xen_clock_events, cpu);
@@ -442,8 +403,6 @@
 
 	evt->cpumask = cpumask_of(cpu);
 	evt->irq = irq;
-
-	setup_runstate_info(cpu);
 }
 
 void xen_teardown_timer(int cpu)
@@ -465,6 +424,8 @@
 {
 	int cpu;
 
+	pvclock_resume();
+
 	if (xen_clockevent != &xen_vcpuop_clockevent)
 		return;
 
@@ -494,6 +455,7 @@
 
 	setup_force_cpu_cap(X86_FEATURE_TSC);
 
+	xen_setup_runstate_info(cpu);
 	xen_setup_timer(cpu);
 	xen_setup_cpu_clockevents();
 }
--- linux-mvl-dove-2.6.32.orig/arch/x86/pci/irq.c
+++ linux-mvl-dove-2.6.32/arch/x86/pci/irq.c
@@ -590,6 +590,8 @@
 	case PCI_DEVICE_ID_INTEL_ICH10_1:
 	case PCI_DEVICE_ID_INTEL_ICH10_2:
 	case PCI_DEVICE_ID_INTEL_ICH10_3:
+	case PCI_DEVICE_ID_INTEL_CPT_LPC1:
+	case PCI_DEVICE_ID_INTEL_CPT_LPC2:
 		r->name = "PIIX/ICH";
 		r->get = pirq_piix_get;
 		r->set = pirq_piix_set;
--- linux-mvl-dove-2.6.32.orig/arch/x86/pci/i386.c
+++ linux-mvl-dove-2.6.32/arch/x86/pci/i386.c
@@ -282,6 +282,15 @@
 		return -EINVAL;
 
 	prot = pgprot_val(vma->vm_page_prot);
+
+	/*
+ 	 * Return error if pat is not enabled and write_combine is requested.
+ 	 * Caller can followup with UC MINUS request and add a WC mtrr if there
+ 	 * is a free mtrr slot.
+ 	 */
+	if (!pat_enabled && write_combine)
+		return -EINVAL;
+
 	if (pat_enabled && write_combine)
 		prot |= _PAGE_CACHE_WC;
 	else if (pat_enabled || boot_cpu_data.x86 > 3)
--- linux-mvl-dove-2.6.32.orig/arch/x86/ia32/ia32entry.S
+++ linux-mvl-dove-2.6.32/arch/x86/ia32/ia32entry.S
@@ -50,7 +50,12 @@
 	/*
 	 * Reload arg registers from stack in case ptrace changed them.
 	 * We don't reload %eax because syscall_trace_enter() returned
-	 * the value it wants us to use in the table lookup.
+	 * the %rax value we should see.  Instead, we just truncate that
+	 * value to 32 bits again as we did on entry from user mode.
+	 * If it's a new value set by user_regset during entry tracing,
+	 * this matches the normal truncation of the user-mode value.
+	 * If it's -1 to make us punt the syscall, then (u32)-1 is still
+	 * an appropriately invalid value.
 	 */
 	.macro LOAD_ARGS32 offset, _r9=0
 	.if \_r9
@@ -60,6 +65,7 @@
 	movl \offset+48(%rsp),%edx
 	movl \offset+56(%rsp),%esi
 	movl \offset+64(%rsp),%edi
+	movl %eax,%eax			/* zero extension */
 	.endm
 	
 	.macro CFI_STARTPROC32 simple
@@ -153,7 +159,7 @@
 	testl  $_TIF_WORK_SYSCALL_ENTRY,TI_flags(%r10)
 	CFI_REMEMBER_STATE
 	jnz  sysenter_tracesys
-	cmpl	$(IA32_NR_syscalls-1),%eax
+	cmpq	$(IA32_NR_syscalls-1),%rax
 	ja	ia32_badsys
 sysenter_do_call:
 	IA32_ARG_FIXUP
@@ -195,7 +201,7 @@
 	movl $AUDIT_ARCH_I386,%edi	/* 1st arg: audit arch */
 	call audit_syscall_entry
 	movl RAX-ARGOFFSET(%rsp),%eax	/* reload syscall number */
-	cmpl $(IA32_NR_syscalls-1),%eax
+	cmpq $(IA32_NR_syscalls-1),%rax
 	ja ia32_badsys
 	movl %ebx,%edi			/* reload 1st syscall arg */
 	movl RCX-ARGOFFSET(%rsp),%esi	/* reload 2nd syscall arg */
@@ -248,7 +254,7 @@
 	call	syscall_trace_enter
 	LOAD_ARGS32 ARGOFFSET  /* reload args from stack in case ptrace changed it */
 	RESTORE_REST
-	cmpl	$(IA32_NR_syscalls-1),%eax
+	cmpq	$(IA32_NR_syscalls-1),%rax
 	ja	int_ret_from_sys_call /* sysenter_tracesys has set RAX(%rsp) */
 	jmp	sysenter_do_call
 	CFI_ENDPROC
@@ -314,7 +320,7 @@
 	testl $_TIF_WORK_SYSCALL_ENTRY,TI_flags(%r10)
 	CFI_REMEMBER_STATE
 	jnz   cstar_tracesys
-	cmpl $IA32_NR_syscalls-1,%eax
+	cmpq $IA32_NR_syscalls-1,%rax
 	ja  ia32_badsys
 cstar_do_call:
 	IA32_ARG_FIXUP 1
@@ -367,7 +373,7 @@
 	LOAD_ARGS32 ARGOFFSET, 1  /* reload args from stack in case ptrace changed it */
 	RESTORE_REST
 	xchgl %ebp,%r9d
-	cmpl $(IA32_NR_syscalls-1),%eax
+	cmpq $(IA32_NR_syscalls-1),%rax
 	ja int_ret_from_sys_call /* cstar_tracesys has set RAX(%rsp) */
 	jmp cstar_do_call
 END(ia32_cstar_target)
@@ -425,7 +431,7 @@
 	orl   $TS_COMPAT,TI_status(%r10)
 	testl $_TIF_WORK_SYSCALL_ENTRY,TI_flags(%r10)
 	jnz ia32_tracesys
-	cmpl $(IA32_NR_syscalls-1),%eax
+	cmpq $(IA32_NR_syscalls-1),%rax
 	ja ia32_badsys
 ia32_do_call:
 	IA32_ARG_FIXUP
@@ -444,7 +450,7 @@
 	call syscall_trace_enter
 	LOAD_ARGS32 ARGOFFSET  /* reload args from stack in case ptrace changed it */
 	RESTORE_REST
-	cmpl $(IA32_NR_syscalls-1),%eax
+	cmpq $(IA32_NR_syscalls-1),%rax
 	ja  int_ret_from_sys_call	/* ia32_tracesys has set RAX(%rsp) */
 	jmp ia32_do_call
 END(ia32_syscall)
@@ -696,7 +702,7 @@
 	.quad quiet_ni_syscall		/* streams2 */
 	.quad stub32_vfork            /* 190 */
 	.quad compat_sys_getrlimit
-	.quad sys32_mmap2
+	.quad sys_mmap_pgoff
 	.quad sys32_truncate64
 	.quad sys32_ftruncate64
 	.quad sys32_stat64		/* 195 */
--- linux-mvl-dove-2.6.32.orig/arch/x86/ia32/sys_ia32.c
+++ linux-mvl-dove-2.6.32/arch/x86/ia32/sys_ia32.c
@@ -155,9 +155,6 @@
 asmlinkage long sys32_mmap(struct mmap_arg_struct __user *arg)
 {
 	struct mmap_arg_struct a;
-	struct file *file = NULL;
-	unsigned long retval;
-	struct mm_struct *mm ;
 
 	if (copy_from_user(&a, arg, sizeof(a)))
 		return -EFAULT;
@@ -165,22 +162,8 @@
 	if (a.offset & ~PAGE_MASK)
 		return -EINVAL;
 
-	if (!(a.flags & MAP_ANONYMOUS)) {
-		file = fget(a.fd);
-		if (!file)
-			return -EBADF;
-	}
-
-	mm = current->mm;
-	down_write(&mm->mmap_sem);
-	retval = do_mmap_pgoff(file, a.addr, a.len, a.prot, a.flags,
+	return sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd,
 			       a.offset>>PAGE_SHIFT);
-	if (file)
-		fput(file);
-
-	up_write(&mm->mmap_sem);
-
-	return retval;
 }
 
 asmlinkage long sys32_mprotect(unsigned long start, size_t len,
@@ -539,30 +522,6 @@
 	return ret;
 }
 
-asmlinkage long sys32_mmap2(unsigned long addr, unsigned long len,
-			    unsigned long prot, unsigned long flags,
-			    unsigned long fd, unsigned long pgoff)
-{
-	struct mm_struct *mm = current->mm;
-	unsigned long error;
-	struct file *file = NULL;
-
-	flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-	if (!(flags & MAP_ANONYMOUS)) {
-		file = fget(fd);
-		if (!file)
-			return -EBADF;
-	}
-
-	down_write(&mm->mmap_sem);
-	error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
-	up_write(&mm->mmap_sem);
-
-	if (file)
-		fput(file);
-	return error;
-}
-
 asmlinkage long sys32_olduname(struct oldold_utsname __user *name)
 {
 	char *arch = "x86_64";
--- linux-mvl-dove-2.6.32.orig/arch/x86/ia32/ia32_aout.c
+++ linux-mvl-dove-2.6.32/arch/x86/ia32/ia32_aout.c
@@ -308,14 +308,15 @@
 	if (retval)
 		return retval;
 
-	regs->cs = __USER32_CS;
-	regs->r8 = regs->r9 = regs->r10 = regs->r11 = regs->r12 =
-		regs->r13 = regs->r14 = regs->r15 = 0;
-
 	/* OK, This is the point of no return */
 	set_personality(PER_LINUX);
 	set_thread_flag(TIF_IA32);
-	clear_thread_flag(TIF_ABI_PENDING);
+
+	setup_new_exec(bprm);
+
+	regs->cs = __USER32_CS;
+	regs->r8 = regs->r9 = regs->r10 = regs->r11 = regs->r12 =
+		regs->r13 = regs->r14 = regs->r15 = 0;
 
 	current->mm->end_code = ex.a_text +
 		(current->mm->start_code = N_TXTADDR(ex));
@@ -326,7 +327,6 @@
 	current->mm->free_area_cache = TASK_UNMAPPED_BASE;
 	current->mm->cached_hole_size = 0;
 
-	current->mm->mmap = NULL;
 	install_exec_creds(bprm);
 	current->flags &= ~PF_FORKNOEXEC;
 
--- linux-mvl-dove-2.6.32.orig/arch/x86/vdso/Makefile
+++ linux-mvl-dove-2.6.32/arch/x86/vdso/Makefile
@@ -25,7 +25,7 @@
 
 export CPPFLAGS_vdso.lds += -P -C
 
-VDSO_LDFLAGS_vdso.lds = -m elf_x86_64 -Wl,-soname=linux-vdso.so.1 \
+VDSO_LDFLAGS_vdso.lds = -m64 -Wl,-soname=linux-vdso.so.1 \
 		      	-Wl,-z,max-page-size=4096 -Wl,-z,common-page-size=4096
 
 $(obj)/vdso.o: $(src)/vdso.S $(obj)/vdso.so
@@ -69,7 +69,7 @@
 vdso32-images			= $(vdso32.so-y:%=vdso32-%.so)
 
 CPPFLAGS_vdso32.lds = $(CPPFLAGS_vdso.lds)
-VDSO_LDFLAGS_vdso32.lds = -m elf_i386 -Wl,-soname=linux-gate.so.1
+VDSO_LDFLAGS_vdso32.lds = -m32 -Wl,-soname=linux-gate.so.1
 
 # This makes sure the $(obj) subdirectory exists even though vdso32/
 # is not a kbuild sub-make subdirectory.
--- linux-mvl-dove-2.6.32.orig/arch/x86/vdso/vdso32-setup.c
+++ linux-mvl-dove-2.6.32/arch/x86/vdso/vdso32-setup.c
@@ -331,7 +331,7 @@
 	if (compat)
 		addr = VDSO_HIGH_BASE;
 	else {
-		addr = get_unmapped_area(NULL, 0, PAGE_SIZE, 0, 0);
+		addr = get_unmapped_area_prot(NULL, 0, PAGE_SIZE, 0, 0, 1);
 		if (IS_ERR_VALUE(addr)) {
 			ret = addr;
 			goto up_fail;
--- linux-mvl-dove-2.6.32.orig/arch/frv/include/asm/cache.h
+++ linux-mvl-dove-2.6.32/arch/frv/include/asm/cache.h
@@ -17,6 +17,8 @@
 #define L1_CACHE_SHIFT		(CONFIG_FRV_L1_CACHE_SHIFT)
 #define L1_CACHE_BYTES		(1 << L1_CACHE_SHIFT)
 
+#define ARCH_KMALLOC_MINALIGN	L1_CACHE_BYTES
+
 #define __cacheline_aligned	__attribute__((aligned(L1_CACHE_BYTES)))
 #define ____cacheline_aligned	__attribute__((aligned(L1_CACHE_BYTES)))
 
--- linux-mvl-dove-2.6.32.orig/arch/frv/include/asm/page.h
+++ linux-mvl-dove-2.6.32/arch/frv/include/asm/page.h
@@ -63,12 +63,10 @@
 #define virt_addr_valid(kaddr)	pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
 
 
-#ifdef CONFIG_MMU
 #define VM_DATA_DEFAULT_FLAGS \
 	(VM_READ | VM_WRITE | \
 	((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0 ) | \
 		 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
-#endif
 
 #endif /* __ASSEMBLY__ */
 
--- linux-mvl-dove-2.6.32.orig/arch/frv/kernel/sys_frv.c
+++ linux-mvl-dove-2.6.32/arch/frv/kernel/sys_frv.c
@@ -31,9 +31,6 @@
 			  unsigned long prot, unsigned long flags,
 			  unsigned long fd, unsigned long pgoff)
 {
-	int error = -EBADF;
-	struct file * file = NULL;
-
 	/* As with sparc32, make sure the shift for mmap2 is constant
 	   (12), no matter what PAGE_SIZE we have.... */
 
@@ -41,69 +38,10 @@
 	   trying to map something we can't */
 	if (pgoff & ((1 << (PAGE_SHIFT - 12)) - 1))
 		return -EINVAL;
-	pgoff >>= PAGE_SHIFT - 12;
-
-	flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-	if (!(flags & MAP_ANONYMOUS)) {
-		file = fget(fd);
-		if (!file)
-			goto out;
-	}
-
-	down_write(&current->mm->mmap_sem);
-	error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
-	up_write(&current->mm->mmap_sem);
-
-	if (file)
-		fput(file);
-out:
-	return error;
-}
-
-#if 0 /* DAVIDM - do we want this */
-struct mmap_arg_struct64 {
-	__u32 addr;
-	__u32 len;
-	__u32 prot;
-	__u32 flags;
-	__u64 offset; /* 64 bits */
-	__u32 fd;
-};
-
-asmlinkage long sys_mmap64(struct mmap_arg_struct64 *arg)
-{
-	int error = -EFAULT;
-	struct file * file = NULL;
-	struct mmap_arg_struct64 a;
-	unsigned long pgoff;
-
-	if (copy_from_user(&a, arg, sizeof(a)))
-		return -EFAULT;
-
-	if ((long)a.offset & ~PAGE_MASK)
-		return -EINVAL;
-
-	pgoff = a.offset >> PAGE_SHIFT;
-	if ((a.offset >> PAGE_SHIFT) != pgoff)
-		return -EINVAL;
-
-	if (!(a.flags & MAP_ANONYMOUS)) {
-		error = -EBADF;
-		file = fget(a.fd);
-		if (!file)
-			goto out;
-	}
-	a.flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
 
-	down_write(&current->mm->mmap_sem);
-	error = do_mmap_pgoff(file, a.addr, a.len, a.prot, a.flags, pgoff);
-	up_write(&current->mm->mmap_sem);
-	if (file)
-		fput(file);
-out:
-	return error;
+	return sys_mmap_pgoff(addr, len, prot, flags, fd,
+			      pgoff >> (PAGE_SHIFT - 12));
 }
-#endif
 
 /*
  * sys_ipc() is the de-multiplexer for the SysV IPC calls..
--- linux-mvl-dove-2.6.32.orig/arch/ia64/include/asm/system.h
+++ linux-mvl-dove-2.6.32/arch/ia64/include/asm/system.h
@@ -281,10 +281,6 @@
 
 void default_idle(void);
 
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
-extern void account_system_vtime(struct task_struct *);
-#endif
-
 #endif /* __KERNEL__ */
 
 #endif /* __ASSEMBLY__ */
--- linux-mvl-dove-2.6.32.orig/arch/ia64/include/asm/compat.h
+++ linux-mvl-dove-2.6.32/arch/ia64/include/asm/compat.h
@@ -198,7 +198,7 @@
 }
 
 static __inline__ void __user *
-compat_alloc_user_space (long len)
+arch_compat_alloc_user_space (long len)
 {
 	struct pt_regs *regs = task_pt_regs(current);
 	return (void __user *) (((regs->r12 & 0xffffffff) & -16) - len);
--- linux-mvl-dove-2.6.32.orig/arch/ia64/include/asm/acpi.h
+++ linux-mvl-dove-2.6.32/arch/ia64/include/asm/acpi.h
@@ -94,6 +94,7 @@
 #define acpi_noirq 0	/* ACPI always enabled on IA64 */
 #define acpi_pci_disabled 0 /* ACPI PCI always enabled on IA64 */
 #define acpi_strict 1	/* no ACPI spec workarounds on IA64 */
+#define acpi_ht 0	/* no HT-only mode on IA64 */
 #endif
 #define acpi_processor_cstate_check(x) (x) /* no idle limits on IA64 :) */
 static inline void disable_acpi(void) { }
--- linux-mvl-dove-2.6.32.orig/arch/ia64/include/asm/io.h
+++ linux-mvl-dove-2.6.32/arch/ia64/include/asm/io.h
@@ -424,6 +424,8 @@
 extern void __iomem * ioremap(unsigned long offset, unsigned long size);
 extern void __iomem * ioremap_nocache (unsigned long offset, unsigned long size);
 extern void iounmap (volatile void __iomem *addr);
+extern void __iomem * early_ioremap (unsigned long phys_addr, unsigned long size);
+extern void early_iounmap (volatile void __iomem *addr, unsigned long size);
 
 /*
  * String version of IO memory access ops:
--- linux-mvl-dove-2.6.32.orig/arch/ia64/sn/kernel/msi_sn.c
+++ linux-mvl-dove-2.6.32/arch/ia64/sn/kernel/msi_sn.c
@@ -174,7 +174,7 @@
 	 * Release XIO resources for the old MSI PCI address
 	 */
 
-	read_msi_msg(irq, &msg);
+	get_cached_msi_msg(irq, &msg);
         sn_pdev = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
 	pdev = sn_pdev->pdi_linux_pcidev;
 	provider = SN_PCIDEV_BUSPROVIDER(pdev);
--- linux-mvl-dove-2.6.32.orig/arch/ia64/sn/pci/tioca_provider.c
+++ linux-mvl-dove-2.6.32/arch/ia64/sn/pci/tioca_provider.c
@@ -517,7 +517,7 @@
  * use the GART mapped mode.
  */
 static u64
-tioca_dma_map(struct pci_dev *pdev, u64 paddr, size_t byte_count, int dma_flags)
+tioca_dma_map(struct pci_dev *pdev, unsigned long paddr, size_t byte_count, int dma_flags)
 {
 	u64 mapaddr;
 
--- linux-mvl-dove-2.6.32.orig/arch/ia64/hp/common/sba_iommu.c
+++ linux-mvl-dove-2.6.32/arch/ia64/hp/common/sba_iommu.c
@@ -677,12 +677,19 @@
 			spin_unlock_irqrestore(&ioc->saved_lock, flags);
 
 			pide = sba_search_bitmap(ioc, dev, pages_needed, 0);
-			if (unlikely(pide >= (ioc->res_size << 3)))
-				panic(__FILE__ ": I/O MMU @ %p is out of mapping resources\n",
-				      ioc->ioc_hpa);
+			if (unlikely(pide >= (ioc->res_size << 3))) {
+				printk(KERN_WARNING "%s: I/O MMU @ %p is"
+				       "out of mapping resources, %u %u %lx\n",
+				       __func__, ioc->ioc_hpa, ioc->res_size,
+				       pages_needed, dma_get_seg_boundary(dev));
+				return -1;
+			}
 #else
-			panic(__FILE__ ": I/O MMU @ %p is out of mapping resources\n",
-			      ioc->ioc_hpa);
+			printk(KERN_WARNING "%s: I/O MMU @ %p is"
+			       "out of mapping resources, %u %u %lx\n",
+			       __func__, ioc->ioc_hpa, ioc->res_size,
+			       pages_needed, dma_get_seg_boundary(dev));
+			return -1;
 #endif
 		}
 	}
@@ -965,6 +972,8 @@
 #endif
 
 	pide = sba_alloc_range(ioc, dev, size);
+	if (pide < 0)
+		return 0;
 
 	iovp = (dma_addr_t) pide << iovp_shift;
 
@@ -1320,6 +1329,7 @@
 	unsigned long dma_offset, dma_len; /* start/len of DMA stream */
 	int n_mappings = 0;
 	unsigned int max_seg_size = dma_get_max_seg_size(dev);
+	int idx;
 
 	while (nents > 0) {
 		unsigned long vaddr = (unsigned long) sba_sg_address(startsg);
@@ -1418,16 +1428,22 @@
 		vcontig_sg->dma_length = vcontig_len;
 		dma_len = (dma_len + dma_offset + ~iovp_mask) & iovp_mask;
 		ASSERT(dma_len <= DMA_CHUNK_SIZE);
-		dma_sg->dma_address = (dma_addr_t) (PIDE_FLAG
-			| (sba_alloc_range(ioc, dev, dma_len) << iovp_shift)
-			| dma_offset);
+		idx = sba_alloc_range(ioc, dev, dma_len);
+		if (idx < 0) {
+			dma_sg->dma_length = 0;
+			return -1;
+		}
+		dma_sg->dma_address = (dma_addr_t)(PIDE_FLAG | (idx << iovp_shift)
+						   | dma_offset);
 		n_mappings++;
 	}
 
 	return n_mappings;
 }
 
-
+static void sba_unmap_sg_attrs(struct device *dev, struct scatterlist *sglist,
+			       int nents, enum dma_data_direction dir,
+			       struct dma_attrs *attrs);
 /**
  * sba_map_sg - map Scatter/Gather list
  * @dev: instance of PCI owned by the driver that's asking.
@@ -1493,6 +1509,10 @@
 	** Access to the virtual address is what forces a two pass algorithm.
 	*/
 	coalesced = sba_coalesce_chunks(ioc, dev, sglist, nents);
+	if (coalesced < 0) {
+		sba_unmap_sg_attrs(dev, sglist, nents, dir, attrs);
+		return 0;
+	}
 
 	/*
 	** Program the I/O Pdir
--- linux-mvl-dove-2.6.32.orig/arch/ia64/hp/sim/simserial.c
+++ linux-mvl-dove-2.6.32/arch/ia64/hp/sim/simserial.c
@@ -395,7 +395,7 @@
 {
 	if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
 	    (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGSTRUCT) &&
-	    (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
+	    (cmd != TIOCMIWAIT)) {
 		if (tty->flags & (1 << TTY_IO_ERROR))
 		    return -EIO;
 	}
@@ -433,16 +433,6 @@
 		case TIOCMIWAIT:
 			printk(KERN_INFO "rs_ioctl: TIOCMIWAIT: called\n");
 			return 0;
-		/*
-		 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
-		 * Return: write counters to the user passed counter struct
-		 * NB: both 1->0 and 0->1 transitions are counted except for
-		 *     RI where only 0->1 is counted.
-		 */
-		case TIOCGICOUNT:
-			printk(KERN_INFO "rs_ioctl: TIOCGICOUNT called\n");
-			return 0;
-
 		case TIOCSERGWILD:
 		case TIOCSERSWILD:
 			/* "setserial -W" is called in Debian boot */
--- linux-mvl-dove-2.6.32.orig/arch/ia64/mm/ioremap.c
+++ linux-mvl-dove-2.6.32/arch/ia64/mm/ioremap.c
@@ -22,6 +22,12 @@
 }
 
 void __iomem *
+early_ioremap (unsigned long phys_addr, unsigned long size)
+{
+	return __ioremap(phys_addr);
+}
+
+void __iomem *
 ioremap (unsigned long phys_addr, unsigned long size)
 {
 	void __iomem *addr;
@@ -102,6 +108,11 @@
 EXPORT_SYMBOL(ioremap_nocache);
 
 void
+early_iounmap (volatile void __iomem *addr, unsigned long size)
+{
+}
+
+void
 iounmap (volatile void __iomem *addr)
 {
 	if (REGION_NUMBER(addr) == RGN_GATE)
--- linux-mvl-dove-2.6.32.orig/arch/ia64/mm/tlb.c
+++ linux-mvl-dove-2.6.32/arch/ia64/mm/tlb.c
@@ -120,7 +120,7 @@
 	ia64_invala();
 
 	for (;;) {
-		asm volatile ("ld4.c.nc %0=[%1]" : "=r"(serve) : "r"(&ss->serve) : "memory");
+		asm volatile ("ld8.c.nc %0=[%1]" : "=r"(serve) : "r"(&ss->serve) : "memory");
 		if (time_before(t, serve))
 			return;
 		cpu_relax();
--- linux-mvl-dove-2.6.32.orig/arch/ia64/kernel/mca.c
+++ linux-mvl-dove-2.6.32/arch/ia64/kernel/mca.c
@@ -1850,7 +1850,8 @@
 			data = mca_bootmem();
 			first_time = 0;
 		} else
-			data = __get_free_pages(GFP_KERNEL, get_order(sz));
+			data = (void *)__get_free_pages(GFP_KERNEL,
+							get_order(sz));
 		if (!data)
 			panic("Could not allocate MCA memory for cpu %d\n",
 					cpu);
--- linux-mvl-dove-2.6.32.orig/arch/ia64/kernel/msi_ia64.c
+++ linux-mvl-dove-2.6.32/arch/ia64/kernel/msi_ia64.c
@@ -25,7 +25,7 @@
 	if (irq_prepare_move(irq, cpu))
 		return -1;
 
-	read_msi_msg(irq, &msg);
+	get_cached_msi_msg(irq, &msg);
 
 	addr = msg.address_lo;
 	addr &= MSI_ADDR_DEST_ID_MASK;
--- linux-mvl-dove-2.6.32.orig/arch/ia64/kernel/sys_ia64.c
+++ linux-mvl-dove-2.6.32/arch/ia64/kernel/sys_ia64.c
@@ -100,51 +100,7 @@
 asmlinkage unsigned long
 ia64_brk (unsigned long brk)
 {
-	unsigned long rlim, retval, newbrk, oldbrk;
-	struct mm_struct *mm = current->mm;
-
-	/*
-	 * Most of this replicates the code in sys_brk() except for an additional safety
-	 * check and the clearing of r8.  However, we can't call sys_brk() because we need
-	 * to acquire the mmap_sem before we can do the test...
-	 */
-	down_write(&mm->mmap_sem);
-
-	if (brk < mm->end_code)
-		goto out;
-	newbrk = PAGE_ALIGN(brk);
-	oldbrk = PAGE_ALIGN(mm->brk);
-	if (oldbrk == newbrk)
-		goto set_brk;
-
-	/* Always allow shrinking brk. */
-	if (brk <= mm->brk) {
-		if (!do_munmap(mm, newbrk, oldbrk-newbrk))
-			goto set_brk;
-		goto out;
-	}
-
-	/* Check against unimplemented/unmapped addresses: */
-	if ((newbrk - oldbrk) > RGN_MAP_LIMIT || REGION_OFFSET(newbrk) > RGN_MAP_LIMIT)
-		goto out;
-
-	/* Check against rlimit.. */
-	rlim = current->signal->rlim[RLIMIT_DATA].rlim_cur;
-	if (rlim < RLIM_INFINITY && brk - mm->start_data > rlim)
-		goto out;
-
-	/* Check against existing mmap mappings. */
-	if (find_vma_intersection(mm, oldbrk, newbrk+PAGE_SIZE))
-		goto out;
-
-	/* Ok, looks good - let it rip. */
-	if (do_brk(oldbrk, newbrk-oldbrk) != oldbrk)
-		goto out;
-set_brk:
-	mm->brk = brk;
-out:
-	retval = mm->brk;
-	up_write(&mm->mmap_sem);
+	unsigned long retval = sys_brk(brk);
 	force_successful_syscall_return();
 	return retval;
 }
@@ -185,39 +141,6 @@
 	return 0;
 }
 
-static inline unsigned long
-do_mmap2 (unsigned long addr, unsigned long len, int prot, int flags, int fd, unsigned long pgoff)
-{
-	struct file *file = NULL;
-
-	flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-	if (!(flags & MAP_ANONYMOUS)) {
-		file = fget(fd);
-		if (!file)
-			return -EBADF;
-
-		if (!file->f_op || !file->f_op->mmap) {
-			addr = -ENODEV;
-			goto out;
-		}
-	}
-
-	/* Careful about overflows.. */
-	len = PAGE_ALIGN(len);
-	if (!len || len > TASK_SIZE) {
-		addr = -EINVAL;
-		goto out;
-	}
-
-	down_write(&current->mm->mmap_sem);
-	addr = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
-	up_write(&current->mm->mmap_sem);
-
-out:	if (file)
-		fput(file);
-	return addr;
-}
-
 /*
  * mmap2() is like mmap() except that the offset is expressed in units
  * of PAGE_SIZE (instead of bytes).  This allows to mmap2() (pieces
@@ -226,7 +149,7 @@
 asmlinkage unsigned long
 sys_mmap2 (unsigned long addr, unsigned long len, int prot, int flags, int fd, long pgoff)
 {
-	addr = do_mmap2(addr, len, prot, flags, fd, pgoff);
+	addr = sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff);
 	if (!IS_ERR((void *) addr))
 		force_successful_syscall_return();
 	return addr;
@@ -238,7 +161,7 @@
 	if (offset_in_page(off) != 0)
 		return -EINVAL;
 
-	addr = do_mmap2(addr, len, prot, flags, fd, off >> PAGE_SHIFT);
+	addr = sys_mmap_pgoff(addr, len, prot, flags, fd, off >> PAGE_SHIFT);
 	if (!IS_ERR((void *) addr))
 		force_successful_syscall_return();
 	return addr;
--- linux-mvl-dove-2.6.32.orig/arch/ia64/kernel/time.c
+++ linux-mvl-dove-2.6.32/arch/ia64/kernel/time.c
@@ -473,7 +473,7 @@
 {
 }
 
-void update_vsyscall(struct timespec *wall, struct clocksource *c)
+void update_vsyscall(struct timespec *wall, struct clocksource *c, u32 mult)
 {
         unsigned long flags;
 
@@ -481,7 +481,7 @@
 
         /* copy fsyscall clock data */
         fsyscall_gtod_data.clk_mask = c->mask;
-        fsyscall_gtod_data.clk_mult = c->mult;
+        fsyscall_gtod_data.clk_mult = mult;
         fsyscall_gtod_data.clk_shift = c->shift;
         fsyscall_gtod_data.clk_fsys_mmio = c->fsys_mmio;
         fsyscall_gtod_data.clk_cycle_last = c->cycle_last;
--- linux-mvl-dove-2.6.32.orig/arch/ia64/kernel/fsys.S
+++ linux-mvl-dove-2.6.32/arch/ia64/kernel/fsys.S
@@ -420,22 +420,31 @@
 	;;
 
 	RSM_PSR_I(p0, r18, r19)			// mask interrupt delivery
-	mov ar.ccv=0
 	andcm r14=r14,r17			// filter out SIGKILL & SIGSTOP
+	mov r8=EINVAL			// default to EINVAL
 
 #ifdef CONFIG_SMP
-	mov r17=1
-	;;
-	cmpxchg4.acq r18=[r31],r17,ar.ccv	// try to acquire the lock
-	mov r8=EINVAL			// default to EINVAL
+	// __ticket_spin_trylock(r31)
+	ld4 r17=[r31]
 	;;
+	mov.m ar.ccv=r17
+	extr.u r9=r17,17,15
+	adds r19=1,r17
+	extr.u r18=r17,0,15
+	;;
+	cmp.eq p6,p7=r9,r18
+	;;
+(p6)	cmpxchg4.acq r9=[r31],r19,ar.ccv
+(p6)	dep.z r20=r19,1,15		// next serving ticket for unlock
+(p7)	br.cond.spnt.many .lock_contention
+	;;
+	cmp4.eq p0,p7=r9,r17
+	adds r31=2,r31
+(p7)	br.cond.spnt.many .lock_contention
 	ld8 r3=[r2]			// re-read current->blocked now that we hold the lock
-	cmp4.ne p6,p0=r18,r0
-(p6)	br.cond.spnt.many .lock_contention
 	;;
 #else
 	ld8 r3=[r2]			// re-read current->blocked now that we hold the lock
-	mov r8=EINVAL			// default to EINVAL
 #endif
 	add r18=IA64_TASK_PENDING_OFFSET+IA64_SIGPENDING_SIGNAL_OFFSET,r16
 	add r19=IA64_TASK_SIGNAL_OFFSET,r16
@@ -490,7 +499,9 @@
 (p6)	br.cond.spnt.few 1b			// yes -> retry
 
 #ifdef CONFIG_SMP
-	st4.rel [r31]=r0			// release the lock
+	// __ticket_spin_unlock(r31)
+	st2.rel [r31]=r20
+	mov r20=0					// i must not leak kernel bits...
 #endif
 	SSM_PSR_I(p0, p9, r31)
 	;;
@@ -512,7 +523,8 @@
 
 .sig_pending:
 #ifdef CONFIG_SMP
-	st4.rel [r31]=r0			// release the lock
+	// __ticket_spin_unlock(r31)
+	st2.rel [r31]=r20			// release the lock
 #endif
 	SSM_PSR_I(p0, p9, r17)
 	;;
--- linux-mvl-dove-2.6.32.orig/arch/ia64/kvm/kvm-ia64.c
+++ linux-mvl-dove-2.6.32/arch/ia64/kvm/kvm-ia64.c
@@ -1797,7 +1797,8 @@
 {
 	struct kvm_memory_slot *memslot;
 	int r, i;
-	long n, base;
+	long base;
+	unsigned long n;
 	unsigned long *dirty_bitmap = (unsigned long *)(kvm->arch.vm_base +
 			offsetof(struct kvm_vm_data, kvm_mem_dirty_log));
 
@@ -1810,7 +1811,7 @@
 	if (!memslot->dirty_bitmap)
 		goto out;
 
-	n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
+	n = kvm_dirty_bitmap_bytes(memslot);
 	base = memslot->base_gfn / BITS_PER_LONG;
 
 	for (i = 0; i < n/sizeof(long); ++i) {
@@ -1826,7 +1827,7 @@
 		struct kvm_dirty_log *log)
 {
 	int r;
-	int n;
+	unsigned long n;
 	struct kvm_memory_slot *memslot;
 	int is_dirty = 0;
 
@@ -1844,7 +1845,7 @@
 	if (is_dirty) {
 		kvm_flush_remote_tlbs(kvm);
 		memslot = &kvm->memslots[log->slot];
-		n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
+		n = kvm_dirty_bitmap_bytes(memslot);
 		memset(memslot->dirty_bitmap, 0, n);
 	}
 	r = 0;
--- linux-mvl-dove-2.6.32.orig/arch/ia64/ia32/sys_ia32.c
+++ linux-mvl-dove-2.6.32/arch/ia64/ia32/sys_ia32.c
@@ -858,6 +858,9 @@
 
 	prot = get_prot32(prot);
 
+	if (flags & MAP_HUGETLB)
+		return -ENOMEM;
+
 #if PAGE_SHIFT > IA32_PAGE_SHIFT
 	mutex_lock(&ia32_mmap_mutex);
 	{
--- linux-mvl-dove-2.6.32.orig/block/blk-sysfs.c
+++ linux-mvl-dove-2.6.32/block/blk-sysfs.c
@@ -440,8 +440,10 @@
 		return ret;
 
 	ret = kobject_add(&q->kobj, kobject_get(&dev->kobj), "%s", "queue");
-	if (ret < 0)
+	if (ret < 0) {
+		blk_trace_remove_sysfs(dev);
 		return ret;
+	}
 
 	kobject_uevent(&q->kobj, KOBJ_ADD);
 
--- linux-mvl-dove-2.6.32.orig/block/bsg.c
+++ linux-mvl-dove-2.6.32/block/bsg.c
@@ -424,7 +424,7 @@
 	/*
 	 * fill in all the output members
 	 */
-	hdr->device_status = status_byte(rq->errors);
+	hdr->device_status = rq->errors & 0xff;
 	hdr->transport_status = host_byte(rq->errors);
 	hdr->driver_status = driver_byte(rq->errors);
 	hdr->info = 0;
--- linux-mvl-dove-2.6.32.orig/block/blk-map.c
+++ linux-mvl-dove-2.6.32/block/blk-map.c
@@ -201,6 +201,9 @@
 	for (i = 0; i < iov_count; i++) {
 		unsigned long uaddr = (unsigned long)iov[i].iov_base;
 
+		if (!iov[i].iov_len)
+			return -EINVAL;
+
 		if (uaddr & queue_dma_alignment(q)) {
 			unaligned = 1;
 			break;
--- linux-mvl-dove-2.6.32.orig/block/blk-merge.c
+++ linux-mvl-dove-2.6.32/block/blk-merge.c
@@ -22,7 +22,7 @@
 		return 0;
 
 	fbio = bio;
-	cluster = test_bit(QUEUE_FLAG_CLUSTER, &q->queue_flags);
+	cluster = blk_queue_cluster(q);
 	seg_size = 0;
 	phys_size = nr_phys_segs = 0;
 	for_each_bio(bio) {
@@ -88,7 +88,7 @@
 static int blk_phys_contig_segment(struct request_queue *q, struct bio *bio,
 				   struct bio *nxt)
 {
-	if (!test_bit(QUEUE_FLAG_CLUSTER, &q->queue_flags))
+	if (!blk_queue_cluster(q))
 		return 0;
 
 	if (bio->bi_seg_back_size + nxt->bi_seg_front_size >
@@ -124,7 +124,7 @@
 	int nsegs, cluster;
 
 	nsegs = 0;
-	cluster = test_bit(QUEUE_FLAG_CLUSTER, &q->queue_flags);
+	cluster = blk_queue_cluster(q);
 
 	/*
 	 * for each bio in rq
--- linux-mvl-dove-2.6.32.orig/block/blk-core.c
+++ linux-mvl-dove-2.6.32/block/blk-core.c
@@ -1569,11 +1569,12 @@
 
 		if (unlikely(block_dump)) {
 			char b[BDEVNAME_SIZE];
-			printk(KERN_DEBUG "%s(%d): %s block %Lu on %s\n",
+			printk(KERN_DEBUG "%s(%d): %s block %Lu on %s (%u sectors)\n",
 			current->comm, task_pid_nr(current),
 				(rw & WRITE) ? "WRITE" : "READ",
 				(unsigned long long)bio->bi_sector,
-				bdevname(bio->bi_bdev, b));
+				bdevname(bio->bi_bdev, b),
+				count);
 		}
 	}
 
--- linux-mvl-dove-2.6.32.orig/block/cfq-iosched.c
+++ linux-mvl-dove-2.6.32/block/cfq-iosched.c
@@ -1540,8 +1540,14 @@
 	cic->dead_key = (unsigned long) cic->key;
 	cic->key = NULL;
 
-	if (ioc->ioc_data == cic)
+	rcu_read_lock();
+	if (rcu_dereference(ioc->ioc_data) == cic) {
+		rcu_read_unlock();
+		spin_lock(&ioc->lock);
 		rcu_assign_pointer(ioc->ioc_data, NULL);
+		spin_unlock(&ioc->lock);
+	} else
+		rcu_read_unlock();
 
 	if (cic->cfqq[BLK_RW_ASYNC]) {
 		cfq_exit_cfqq(cfqd, cic->cfqq[BLK_RW_ASYNC]);
--- linux-mvl-dove-2.6.32.orig/block/scsi_ioctl.c
+++ linux-mvl-dove-2.6.32/block/scsi_ioctl.c
@@ -319,33 +319,47 @@
 	if (hdr->iovec_count) {
 		const int size = sizeof(struct sg_iovec) * hdr->iovec_count;
 		size_t iov_data_len;
-		struct sg_iovec *iov;
+		struct sg_iovec *sg_iov;
+		struct iovec *iov;
+		int i;
 
-		iov = kmalloc(size, GFP_KERNEL);
-		if (!iov) {
+		sg_iov = kmalloc(size, GFP_KERNEL);
+		if (!sg_iov) {
 			ret = -ENOMEM;
 			goto out;
 		}
 
-		if (copy_from_user(iov, hdr->dxferp, size)) {
-			kfree(iov);
+		if (copy_from_user(sg_iov, hdr->dxferp, size)) {
+			kfree(sg_iov);
 			ret = -EFAULT;
 			goto out;
 		}
 
+		/*
+		 * Sum up the vecs, making sure they don't overflow
+		 */
+		iov = (struct iovec *) sg_iov;
+		iov_data_len = 0;
+		for (i = 0; i < hdr->iovec_count; i++) {
+			if (iov_data_len + iov[i].iov_len < iov_data_len) {
+				kfree(sg_iov);
+				ret = -EINVAL;
+				goto out;
+			}
+			iov_data_len += iov[i].iov_len;
+		}
+
 		/* SG_IO howto says that the shorter of the two wins */
-		iov_data_len = iov_length((struct iovec *)iov,
-					  hdr->iovec_count);
 		if (hdr->dxfer_len < iov_data_len) {
-			hdr->iovec_count = iov_shorten((struct iovec *)iov,
+			hdr->iovec_count = iov_shorten(iov,
 						       hdr->iovec_count,
 						       hdr->dxfer_len);
 			iov_data_len = hdr->dxfer_len;
 		}
 
-		ret = blk_rq_map_user_iov(q, rq, NULL, iov, hdr->iovec_count,
+		ret = blk_rq_map_user_iov(q, rq, NULL, sg_iov, hdr->iovec_count,
 					  iov_data_len, GFP_KERNEL);
-		kfree(iov);
+		kfree(sg_iov);
 	} else if (hdr->dxfer_len)
 		ret = blk_rq_map_user(q, rq, NULL, hdr->dxferp, hdr->dxfer_len,
 				      GFP_KERNEL);
--- linux-mvl-dove-2.6.32.orig/block/blk-settings.c
+++ linux-mvl-dove-2.6.32/block/blk-settings.c
@@ -8,6 +8,7 @@
 #include <linux/blkdev.h>
 #include <linux/bootmem.h>	/* for max_pfn/max_low_pfn */
 #include <linux/gcd.h>
+#include <linux/lcm.h>
 
 #include "blk.h"
 
@@ -102,7 +103,7 @@
 	lim->alignment_offset = 0;
 	lim->io_opt = 0;
 	lim->misaligned = 0;
-	lim->no_cluster = 0;
+	lim->cluster = 1;
 }
 EXPORT_SYMBOL(blk_set_default_limits);
 
@@ -351,7 +352,7 @@
  *   hardware can operate on without reverting to read-modify-write
  *   operations.
  */
-void blk_queue_physical_block_size(struct request_queue *q, unsigned short size)
+void blk_queue_physical_block_size(struct request_queue *q, unsigned int size)
 {
 	q->limits.physical_block_size = size;
 
@@ -476,32 +477,36 @@
 void blk_queue_stack_limits(struct request_queue *t, struct request_queue *b)
 {
 	blk_stack_limits(&t->limits, &b->limits, 0);
-
-	if (!t->queue_lock)
-		WARN_ON_ONCE(1);
-	else if (!test_bit(QUEUE_FLAG_CLUSTER, &b->queue_flags)) {
-		unsigned long flags;
-		spin_lock_irqsave(t->queue_lock, flags);
-		queue_flag_clear(QUEUE_FLAG_CLUSTER, t);
-		spin_unlock_irqrestore(t->queue_lock, flags);
-	}
 }
 EXPORT_SYMBOL(blk_queue_stack_limits);
 
 /**
  * blk_stack_limits - adjust queue_limits for stacked devices
- * @t:	the stacking driver limits (top)
- * @b:  the underlying queue limits (bottom)
+ * @t:	the stacking driver limits (top device)
+ * @b:  the underlying queue limits (bottom, component device)
  * @offset:  offset to beginning of data within component device
  *
  * Description:
- *    Merges two queue_limit structs.  Returns 0 if alignment didn't
- *    change.  Returns -1 if adding the bottom device caused
- *    misalignment.
+ *    This function is used by stacking drivers like MD and DM to ensure
+ *    that all component devices have compatible block sizes and
+ *    alignments.  The stacking driver must provide a queue_limits
+ *    struct (top) and then iteratively call the stacking function for
+ *    all component (bottom) devices.  The stacking function will
+ *    attempt to combine the values and ensure proper alignment.
+ *
+ *    Returns 0 if the top and bottom queue_limits are compatible.  The
+ *    top device's block sizes and alignment offsets may be adjusted to
+ *    ensure alignment with the bottom device. If no compatible sizes
+ *    and alignments exist, -1 is returned and the resulting top
+ *    queue_limits will have the misaligned flag set to indicate that
+ *    the alignment_offset is undefined.
  */
 int blk_stack_limits(struct queue_limits *t, struct queue_limits *b,
 		     sector_t offset)
 {
+	sector_t alignment;
+	unsigned int top, bottom, ret = 0;
+
 	t->max_sectors = min_not_zero(t->max_sectors, b->max_sectors);
 	t->max_hw_sectors = min_not_zero(t->max_hw_sectors, b->max_hw_sectors);
 	t->bounce_pfn = min_not_zero(t->bounce_pfn, b->bounce_pfn);
@@ -518,6 +523,26 @@
 	t->max_segment_size = min_not_zero(t->max_segment_size,
 					   b->max_segment_size);
 
+	t->misaligned |= b->misaligned;
+
+	alignment = queue_limit_alignment_offset(b, offset);
+
+	/* Bottom device has different alignment.  Check that it is
+	 * compatible with the current top alignment.
+	 */
+	if (t->alignment_offset != alignment) {
+
+		top = max(t->physical_block_size, t->io_min)
+			+ t->alignment_offset;
+		bottom = max(b->physical_block_size, b->io_min) + alignment;
+
+		/* Verify that top and bottom intervals line up */
+		if (max(top, bottom) & (min(top, bottom) - 1)) {
+			t->misaligned = 1;
+			ret = -1;
+		}
+	}
+
 	t->logical_block_size = max(t->logical_block_size,
 				    b->logical_block_size);
 
@@ -525,41 +550,72 @@
 				     b->physical_block_size);
 
 	t->io_min = max(t->io_min, b->io_min);
-	t->no_cluster |= b->no_cluster;
+	t->io_opt = lcm(t->io_opt, b->io_opt);
 
-	/* Bottom device offset aligned? */
-	if (offset &&
-	    (offset & (b->physical_block_size - 1)) != b->alignment_offset) {
+	t->cluster &= b->cluster;
+
+	/* Physical block size a multiple of the logical block size? */
+	if (t->physical_block_size & (t->logical_block_size - 1)) {
+		t->physical_block_size = t->logical_block_size;
 		t->misaligned = 1;
-		return -1;
+		ret = -1;
 	}
 
-	/* If top has no alignment offset, inherit from bottom */
-	if (!t->alignment_offset)
-		t->alignment_offset =
-			b->alignment_offset & (b->physical_block_size - 1);
+	/* Minimum I/O a multiple of the physical block size? */
+	if (t->io_min & (t->physical_block_size - 1)) {
+		t->io_min = t->physical_block_size;
+		t->misaligned = 1;
+		ret = -1;
+	}
 
-	/* Top device aligned on logical block boundary? */
+	/* Optimal I/O a multiple of the physical block size? */
+	if (t->io_opt & (t->physical_block_size - 1)) {
+		t->io_opt = 0;
+		t->misaligned = 1;
+		ret = -1;
+	}
+
+	/* Find lowest common alignment_offset */
+	t->alignment_offset = lcm(t->alignment_offset, alignment)
+		& (max(t->physical_block_size, t->io_min) - 1);
+
+	/* Verify that new alignment_offset is on a logical block boundary */
 	if (t->alignment_offset & (t->logical_block_size - 1)) {
 		t->misaligned = 1;
-		return -1;
+		ret = -1;
 	}
 
-	/* Find lcm() of optimal I/O size */
-	if (t->io_opt && b->io_opt)
-		t->io_opt = (t->io_opt * b->io_opt) / gcd(t->io_opt, b->io_opt);
-	else if (b->io_opt)
-		t->io_opt = b->io_opt;
-
-	/* Verify that optimal I/O size is a multiple of io_min */
-	if (t->io_min && t->io_opt % t->io_min)
-		return -1;
+	/* Discard */
+	t->max_discard_sectors = min_not_zero(t->max_discard_sectors,
+					      b->max_discard_sectors);
 
-	return 0;
+	return ret;
 }
 EXPORT_SYMBOL(blk_stack_limits);
 
 /**
+ * bdev_stack_limits - adjust queue limits for stacked drivers
+ * @t:	the stacking driver limits (top device)
+ * @bdev:  the component block_device (bottom)
+ * @start:  first data sector within component device
+ *
+ * Description:
+ *    Merges queue limits for a top device and a block_device.  Returns
+ *    0 if alignment didn't change.  Returns -1 if adding the bottom
+ *    device caused misalignment.
+ */
+int bdev_stack_limits(struct queue_limits *t, struct block_device *bdev,
+		      sector_t start)
+{
+	struct request_queue *bq = bdev_get_queue(bdev);
+
+	start += get_start_sect(bdev);
+
+	return blk_stack_limits(t, &bq->limits, start << 9);
+}
+EXPORT_SYMBOL(bdev_stack_limits);
+
+/**
  * disk_stack_limits - adjust queue limits for stacked drivers
  * @disk:  MD/DM gendisk (top)
  * @bdev:  the underlying block device (bottom)
@@ -587,17 +643,6 @@
 		printk(KERN_NOTICE "%s: Warning: Device %s is misaligned\n",
 		       top, bottom);
 	}
-
-	if (!t->queue_lock)
-		WARN_ON_ONCE(1);
-	else if (!test_bit(QUEUE_FLAG_CLUSTER, &b->queue_flags)) {
-		unsigned long flags;
-
-		spin_lock_irqsave(t->queue_lock, flags);
-		if (!test_bit(QUEUE_FLAG_CLUSTER, &b->queue_flags))
-			queue_flag_clear(QUEUE_FLAG_CLUSTER, t);
-		spin_unlock_irqrestore(t->queue_lock, flags);
-	}
 }
 EXPORT_SYMBOL(disk_stack_limits);
 
--- linux-mvl-dove-2.6.32.orig/block/blk-timeout.c
+++ linux-mvl-dove-2.6.32/block/blk-timeout.c
@@ -109,6 +109,7 @@
 	struct request_queue *q = (struct request_queue *) data;
 	unsigned long flags, next = 0;
 	struct request *rq, *tmp;
+	int next_set = 0;
 
 	spin_lock_irqsave(q->queue_lock, flags);
 
@@ -122,16 +123,13 @@
 			if (blk_mark_rq_complete(rq))
 				continue;
 			blk_rq_timed_out(rq);
-		} else if (!next || time_after(next, rq->deadline))
+		} else if (!next_set || time_after(next, rq->deadline)) {
 			next = rq->deadline;
+			next_set = 1;
+		}
 	}
 
-	/*
-	 * next can never be 0 here with the list non-empty, since we always
-	 * bump ->deadline to 1 so we can detect if the timer was ever added
-	 * or not. See comment in blk_add_timer()
-	 */
-	if (next)
+	if (next_set)
 		mod_timer(&q->timeout, round_jiffies_up(next));
 
 	spin_unlock_irqrestore(q->queue_lock, flags);
--- linux-mvl-dove-2.6.32.orig/scripts/mkmakefile
+++ linux-mvl-dove-2.6.32/scripts/mkmakefile
@@ -44,7 +44,9 @@
 
 Makefile:;
 
-\$(all) %/: all
+\$(all): all
 	@:
 
+%/: all
+	@:
 EOF
--- linux-mvl-dove-2.6.32.orig/scripts/Kbuild.include
+++ linux-mvl-dove-2.6.32/scripts/Kbuild.include
@@ -149,6 +149,12 @@
 # $(Q)$(MAKE) $(build)=dir
 build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj
 
+###
+# Shorthand for $(Q)$(MAKE) -f scripts/Makefile.modbuiltin obj=
+# Usage:
+# $(Q)$(MAKE) $(modbuiltin)=dir
+modbuiltin := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.modbuiltin obj
+
 # Prefix -I with $(srctree) if it is not an absolute path.
 # skip if -I has no parameter
 addtree = $(if $(patsubst -I%,%,$(1)), \
--- linux-mvl-dove-2.6.32.orig/scripts/Makefile.modbuiltin
+++ linux-mvl-dove-2.6.32/scripts/Makefile.modbuiltin
@@ -0,0 +1,55 @@
+# ==========================================================================
+# Generating modules.builtin
+# ==========================================================================
+
+src := $(obj)
+
+PHONY := __modbuiltin
+__modbuiltin:
+
+-include include/config/auto.conf
+# tristate.conf sets tristate variables to uppercase 'Y' or 'M'
+# That way, we get the list of built-in modules in obj-Y
+-include include/config/tristate.conf
+
+include scripts/Kbuild.include
+
+# The filename Kbuild has precedence over Makefile
+kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
+kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
+-include $(kbuild-file)
+
+include scripts/Makefile.lib
+__subdir-Y     := $(patsubst %/,%,$(filter %/, $(obj-Y)))
+subdir-Y       += $(__subdir-Y)
+subdir-ym      := $(sort $(subdir-y) $(subdir-Y) $(subdir-m))
+subdir-ym      := $(addprefix $(obj)/,$(subdir-ym))
+obj-Y          := $(addprefix $(obj)/,$(obj-Y))
+
+modbuiltin-subdirs := $(patsubst %,%/modules.builtin, $(subdir-ym))
+modbuiltin-mods    := $(filter %.ko, $(obj-Y:.o=.ko))
+modbuiltin-target  := $(obj)/modules.builtin
+
+__modbuiltin: $(modbuiltin-target) $(subdir-ym)
+	@:
+
+$(modbuiltin-target): $(subdir-ym) FORCE
+	$(Q)(for m in $(modbuiltin-mods); do echo kernel/$$m; done;	\
+	cat /dev/null $(modbuiltin-subdirs)) > $@
+
+PHONY += FORCE
+
+FORCE:
+
+# Descending
+# ---------------------------------------------------------------------------
+
+PHONY += $(subdir-ym)
+$(subdir-ym):
+	$(Q)$(MAKE) $(modbuiltin)=$@
+
+
+# Declare the contents of the .PHONY variable as phony.  We keep that
+# information in a variable se we can use it in if_changed and friends.
+
+.PHONY: $(PHONY)
--- linux-mvl-dove-2.6.32.orig/scripts/mod/modpost.c
+++ linux-mvl-dove-2.6.32/scripts/mod/modpost.c
@@ -1311,7 +1311,7 @@
 	int section = sechdr->sh_info;
 
 	return (void *)elf->hdr + sechdrs[section].sh_offset +
-		(r->r_offset - sechdrs[section].sh_addr);
+		r->r_offset - sechdrs[section].sh_addr;
 }
 
 static int addend_386_rel(struct elf_info *elf, Elf_Shdr *sechdr, Elf_Rela *r)
--- linux-mvl-dove-2.6.32.orig/scripts/kconfig/confdata.c
+++ linux-mvl-dove-2.6.32/scripts/kconfig/confdata.c
@@ -677,7 +677,7 @@
 	struct symbol *sym;
 	const char *str;
 	const char *name;
-	FILE *out, *out_h;
+	FILE *out, *tristate, *out_h;
 	time_t now;
 	int i, l;
 
@@ -692,9 +692,16 @@
 	if (!out)
 		return 1;
 
+	tristate = fopen(".tmpconfig_tristate", "w");
+	if (!tristate) {
+		fclose(out);
+		return 1;
+	}
+
 	out_h = fopen(".tmpconfig.h", "w");
 	if (!out_h) {
 		fclose(out);
+		fclose(tristate);
 		return 1;
 	}
 
@@ -707,6 +714,9 @@
 		     "# %s"
 		     "#\n",
 		     sym_get_string_value(sym), ctime(&now));
+	fprintf(tristate, "#\n"
+			  "# Automatically generated - do not edit\n"
+			  "\n");
 	fprintf(out_h, "/*\n"
 		       " * Automatically generated C config: don't edit\n"
 		       " * Linux kernel version: %s\n"
@@ -727,10 +737,14 @@
 				break;
 			case mod:
 				fprintf(out, "CONFIG_%s=m\n", sym->name);
+				fprintf(tristate, "CONFIG_%s=M\n", sym->name);
 				fprintf(out_h, "#define CONFIG_%s_MODULE 1\n", sym->name);
 				break;
 			case yes:
 				fprintf(out, "CONFIG_%s=y\n", sym->name);
+				if (sym->type == S_TRISTATE)
+					fprintf(tristate, "CONFIG_%s=Y\n",
+							sym->name);
 				fprintf(out_h, "#define CONFIG_%s 1\n", sym->name);
 				break;
 			}
@@ -772,6 +786,7 @@
 		}
 	}
 	fclose(out);
+	fclose(tristate);
 	fclose(out_h);
 
 	name = getenv("KCONFIG_AUTOHEADER");
@@ -779,6 +794,11 @@
 		name = "include/linux/autoconf.h";
 	if (rename(".tmpconfig.h", name))
 		return 1;
+	name = getenv("KCONFIG_TRISTATE");
+	if (!name)
+		name = "include/config/tristate.conf";
+	if (rename(".tmpconfig_tristate", name))
+		return 1;
 	name = conf_get_autoconfig_name();
 	/*
 	 * This must be the last step, kbuild has a dependency on auto.conf
--- linux-mvl-dove-2.6.32.orig/scripts/kconfig/conf.c
+++ linux-mvl-dove-2.6.32/scripts/kconfig/conf.c
@@ -330,7 +330,7 @@
 		}
 		if (!child)
 			continue;
-		if (line[strlen(line) - 1] == '?') {
+		if (line[0] && line[strlen(line) - 1] == '?') {
 			print_help(child);
 			continue;
 		}
--- linux-mvl-dove-2.6.32.orig/mm/vmstat.c
+++ linux-mvl-dove-2.6.32/mm/vmstat.c
@@ -136,10 +136,23 @@
 	int threshold;
 
 	for_each_populated_zone(zone) {
+		unsigned long max_drift, tolerate_drift;
+
 		threshold = calculate_threshold(zone);
 
 		for_each_online_cpu(cpu)
 			zone_pcp(zone, cpu)->stat_threshold = threshold;
+
+		/*
+		 * Only set percpu_drift_mark if there is a danger that
+		 * NR_FREE_PAGES reports the low watermark is ok when in fact
+		 * the min watermark could be breached by an allocation
+		 */
+		tolerate_drift = low_wmark_pages(zone) - min_wmark_pages(zone);
+		max_drift = num_online_cpus() * threshold;
+		if (max_drift > tolerate_drift)
+			zone->percpu_drift_mark = high_wmark_pages(zone) +
+					max_drift;
 	}
 }
 
@@ -715,7 +728,7 @@
 		   "\n        scanned  %lu"
 		   "\n        spanned  %lu"
 		   "\n        present  %lu",
-		   zone_page_state(zone, NR_FREE_PAGES),
+		   zone_nr_free_pages(zone),
 		   min_wmark_pages(zone),
 		   low_wmark_pages(zone),
 		   high_wmark_pages(zone),
--- linux-mvl-dove-2.6.32.orig/mm/mempolicy.c
+++ linux-mvl-dove-2.6.32/mm/mempolicy.c
@@ -1482,7 +1482,7 @@
 		(void)first_zones_zonelist(zonelist, highest_zoneidx,
 							&policy->v.nodes,
 							&zone);
-		return zone->node;
+		return zone ? zone->node : numa_node_id();
 	}
 
 	default:
@@ -2122,8 +2122,8 @@
 			char *rest = nodelist;
 			while (isdigit(*rest))
 				rest++;
-			if (!*rest)
-				err = 0;
+			if (*rest)
+				goto out;
 		}
 		break;
 	case MPOL_INTERLEAVE:
@@ -2132,7 +2132,6 @@
 		 */
 		if (!nodelist)
 			nodes = node_states[N_HIGH_MEMORY];
-		err = 0;
 		break;
 	case MPOL_LOCAL:
 		/*
@@ -2142,11 +2141,19 @@
 			goto out;
 		mode = MPOL_PREFERRED;
 		break;
-
-	/*
-	 * case MPOL_BIND:    mpol_new() enforces non-empty nodemask.
-	 * case MPOL_DEFAULT: mpol_new() enforces empty nodemask, ignores flags.
-	 */
+	case MPOL_DEFAULT:
+		/*
+		 * Insist on a empty nodelist
+		 */
+		if (!nodelist)
+			err = 0;
+		goto out;
+	case MPOL_BIND:
+		/*
+		 * Insist on a nodelist
+		 */
+		if (!nodelist)
+			goto out;
 	}
 
 	mode_flags = 0;
@@ -2160,13 +2167,14 @@
 		else if (!strcmp(flags, "relative"))
 			mode_flags |= MPOL_F_RELATIVE_NODES;
 		else
-			err = 1;
+			goto out;
 	}
 
 	new = mpol_new(mode, mode_flags, &nodes);
 	if (IS_ERR(new))
-		err = 1;
-	else {
+		goto out;
+
+	{
 		int ret;
 		NODEMASK_SCRATCH(scratch);
 		if (scratch) {
@@ -2177,13 +2185,15 @@
 			ret = -ENOMEM;
 		NODEMASK_SCRATCH_FREE(scratch);
 		if (ret) {
-			err = 1;
 			mpol_put(new);
-		} else if (no_context) {
-			/* save for contextualization */
-			new->w.user_nodemask = nodes;
+			goto out;
 		}
 	}
+	err = 0;
+	if (no_context) {
+		/* save for contextualization */
+		new->w.user_nodemask = nodes;
+	}
 
 out:
 	/* Restore string for error message */
--- linux-mvl-dove-2.6.32.orig/mm/memory-failure.c
+++ linux-mvl-dove-2.6.32/mm/memory-failure.c
@@ -589,7 +589,6 @@
 
 	{ lru|dirty,	lru|dirty,	"LRU",		me_pagecache_dirty },
 	{ lru|dirty,	lru,		"clean LRU",	me_pagecache_clean },
-	{ swapbacked,	swapbacked,	"anonymous",	me_pagecache_clean },
 
 	/*
 	 * Catchall entry: must be at end.
@@ -638,7 +637,7 @@
  * Do all that is necessary to remove user space mappings. Unmap
  * the pages and send SIGBUS to the processes if the data was dirty.
  */
-static void hwpoison_user_mappings(struct page *p, unsigned long pfn,
+static int hwpoison_user_mappings(struct page *p, unsigned long pfn,
 				  int trapno)
 {
 	enum ttu_flags ttu = TTU_UNMAP | TTU_IGNORE_MLOCK | TTU_IGNORE_ACCESS;
@@ -648,15 +647,18 @@
 	int i;
 	int kill = 1;
 
-	if (PageReserved(p) || PageCompound(p) || PageSlab(p) || PageKsm(p))
-		return;
+	if (PageReserved(p) || PageSlab(p))
+		return SWAP_SUCCESS;
 
 	/*
 	 * This check implies we don't kill processes if their pages
 	 * are in the swap cache early. Those are always late kills.
 	 */
 	if (!page_mapped(p))
-		return;
+		return SWAP_SUCCESS;
+
+	if (PageCompound(p) || PageKsm(p))
+		return SWAP_FAIL;
 
 	if (PageSwapCache(p)) {
 		printk(KERN_ERR
@@ -718,6 +720,8 @@
 	 */
 	kill_procs_ao(&tokill, !!PageDirty(p), trapno,
 		      ret != SWAP_SUCCESS, pfn);
+
+	return ret;
 }
 
 int __memory_failure(unsigned long pfn, int trapno, int ref)
@@ -787,8 +791,13 @@
 
 	/*
 	 * Now take care of user space mappings.
+	 * Abort on fail: __remove_from_page_cache() assumes unmapped page.
 	 */
-	hwpoison_user_mappings(p, pfn, trapno);
+	if (hwpoison_user_mappings(p, pfn, trapno) != SWAP_SUCCESS) {
+		printk(KERN_ERR "MCE %#lx: cannot unmap page, give up\n", pfn);
+		res = -EBUSY;
+		goto out;
+	}
 
 	/*
 	 * Torn down by someone else?
--- linux-mvl-dove-2.6.32.orig/mm/pagewalk.c
+++ linux-mvl-dove-2.6.32/mm/pagewalk.c
@@ -1,6 +1,7 @@
 #include <linux/mm.h>
 #include <linux/highmem.h>
 #include <linux/sched.h>
+#include <linux/hugetlb.h>
 
 static int walk_pte_range(pmd_t *pmd, unsigned long addr, unsigned long end,
 			  struct mm_walk *walk)
@@ -107,6 +108,7 @@
 	pgd_t *pgd;
 	unsigned long next;
 	int err = 0;
+	struct vm_area_struct *vma;
 
 	if (addr >= end)
 		return err;
@@ -117,11 +119,22 @@
 	pgd = pgd_offset(walk->mm, addr);
 	do {
 		next = pgd_addr_end(addr, end);
+
+		/* skip hugetlb vma to avoid hugepage PMD being cleared
+		 * in pmd_none_or_clear_bad(). */
+		vma = find_vma(walk->mm, addr);
+		if (vma && is_vm_hugetlb_page(vma)) {
+			if (vma->vm_end < next)
+				next = vma->vm_end;
+			continue;
+		}
+
 		if (pgd_none_or_clear_bad(pgd)) {
 			if (walk->pte_hole)
 				err = walk->pte_hole(addr, next, walk);
 			if (err)
 				break;
+			pgd++;
 			continue;
 		}
 		if (walk->pgd_entry)
@@ -131,7 +144,8 @@
 			err = walk_pud_range(pgd, addr, next, walk);
 		if (err)
 			break;
-	} while (pgd++, addr = next, addr != end);
+		pgd++;
+	} while (addr = next, addr != end);
 
 	return err;
 }
--- linux-mvl-dove-2.6.32.orig/mm/readahead.c
+++ linux-mvl-dove-2.6.32/mm/readahead.c
@@ -501,6 +501,12 @@
 	if (!ra->ra_pages)
 		return;
 
+	/* be dumb */
+	if (filp && (filp->f_mode & FMODE_RANDOM)) {
+		force_page_cache_readahead(mapping, filp, offset, req_size);
+		return;
+	}
+
 	/* do read-ahead */
 	ondemand_readahead(mapping, ra, filp, false, offset, req_size);
 }
@@ -547,5 +553,17 @@
 
 	/* do read-ahead */
 	ondemand_readahead(mapping, ra, filp, true, offset, req_size);
+
+#ifdef CONFIG_BLOCK
+	/*
+	 * Normally the current page is !uptodate and lock_page() will be
+	 * immediately called to implicitly unplug the device. However this
+	 * is not always true for RAID conifgurations, where data arrives
+	 * not strictly in their submission order. In this case we need to
+	 * explicitly kick off the IO.
+	 */
+	if (PageUptodate(page))
+		blk_run_backing_dev(mapping->backing_dev_info, NULL);
+#endif
 }
 EXPORT_SYMBOL_GPL(page_cache_async_readahead);
--- linux-mvl-dove-2.6.32.orig/mm/fadvise.c
+++ linux-mvl-dove-2.6.32/mm/fadvise.c
@@ -77,12 +77,20 @@
 	switch (advice) {
 	case POSIX_FADV_NORMAL:
 		file->f_ra.ra_pages = bdi->ra_pages;
+		spin_lock(&file->f_lock);
+		file->f_mode &= ~FMODE_RANDOM;
+		spin_unlock(&file->f_lock);
 		break;
 	case POSIX_FADV_RANDOM:
-		file->f_ra.ra_pages = 0;
+		spin_lock(&file->f_lock);
+		file->f_mode |= FMODE_RANDOM;
+		spin_unlock(&file->f_lock);
 		break;
 	case POSIX_FADV_SEQUENTIAL:
 		file->f_ra.ra_pages = bdi->ra_pages * 2;
+		spin_lock(&file->f_lock);
+		file->f_mode &= ~FMODE_RANDOM;
+		spin_unlock(&file->f_lock);
 		break;
 	case POSIX_FADV_WILLNEED:
 		if (!mapping->a_ops->readpage) {
--- linux-mvl-dove-2.6.32.orig/mm/swapfile.c
+++ linux-mvl-dove-2.6.32/mm/swapfile.c
@@ -330,8 +330,10 @@
 	if (offset > si->highest_bit)
 		scan_base = offset = si->lowest_bit;
 
-	/* reuse swap entry of cache-only swap if not busy. */
-	if (vm_swap_full() && si->swap_map[offset] == SWAP_HAS_CACHE) {
+	/* reuse swap entry of cache-only swap if not hibernation. */
+	if (vm_swap_full()
+		&& cache == SWAP_CACHE
+		&& si->swap_map[offset] == SWAP_HAS_CACHE) {
 		int swap_was_freed;
 		spin_unlock(&swap_lock);
 		swap_was_freed = __try_to_reclaim_swap(si, offset);
@@ -586,8 +588,12 @@
 		nr_swap_pages++;
 		p->inuse_pages--;
 	}
-	if (!swap_count(count))
+	if (!swap_count(count)) {
 		mem_cgroup_uncharge_swap(ent);
+			if (p->notify_swap_entry_free_fn)
+				p->notify_swap_entry_free_fn(offset);
+	}
+
 	return count;
 }
 
@@ -2167,6 +2173,23 @@
 }
 
 /*
+ * Sets callback for event when swap_map[offset] == 0
+ * i.e. page at this swap offset is not longer used.
+ *
+ * type: identifies swap file
+ * fn: callback function
+ */
+void set_notify_swap_entry_free(unsigned type, void (*fn) (unsigned long))
+{
+	struct swap_info_struct *sis;
+	sis = get_swap_info_struct(type);
+	BUG_ON(!sis);
+	sis->notify_swap_entry_free_fn = fn;
+	return;
+}
+EXPORT_SYMBOL(set_notify_swap_entry_free);
+
+/*
  * swap_lock prevents swap_map being freed. Don't grab an extra
  * reference on the swaphandle, it doesn't matter if it becomes unused.
  */
--- linux-mvl-dove-2.6.32.orig/mm/percpu.c
+++ linux-mvl-dove-2.6.32/mm/percpu.c
@@ -1702,9 +1702,9 @@
 
 			if (pcpu_first_unit_cpu == NR_CPUS)
 				pcpu_first_unit_cpu = cpu;
+			pcpu_last_unit_cpu = cpu;
 		}
 	}
-	pcpu_last_unit_cpu = cpu;
 	pcpu_nr_units = unit;
 
 	for_each_possible_cpu(cpu)
--- linux-mvl-dove-2.6.32.orig/mm/mprotect.c
+++ linux-mvl-dove-2.6.32/mm/mprotect.c
@@ -26,9 +26,14 @@
 #include <linux/perf_event.h>
 #include <asm/uaccess.h>
 #include <asm/pgtable.h>
+#include <asm/pgalloc.h>
 #include <asm/cacheflush.h>
 #include <asm/tlbflush.h>
 
+#ifndef arch_remove_exec_range
+#define arch_remove_exec_range(mm, limit)      do { ; } while (0)
+#endif
+
 #ifndef pgprot_modify
 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
 {
@@ -139,7 +144,7 @@
 	struct mm_struct *mm = vma->vm_mm;
 	unsigned long oldflags = vma->vm_flags;
 	long nrpages = (end - start) >> PAGE_SHIFT;
-	unsigned long charged = 0;
+	unsigned long charged = 0, old_end = vma->vm_end;
 	pgoff_t pgoff;
 	int error;
 	int dirty_accountable = 0;
@@ -204,6 +209,9 @@
 		dirty_accountable = 1;
 	}
 
+	if (oldflags & VM_EXEC)
+		arch_remove_exec_range(current->mm, old_end);
+
 	mmu_notifier_invalidate_range_start(mm, start, end);
 	if (is_vm_hugetlb_page(vma))
 		hugetlb_change_protection(vma, start, end, vma->vm_page_prot);
@@ -212,6 +220,7 @@
 	mmu_notifier_invalidate_range_end(mm, start, end);
 	vm_stat_account(mm, oldflags, vma->vm_file, -nrpages);
 	vm_stat_account(mm, newflags, vma->vm_file, nrpages);
+	perf_event_mmap(vma);
 	return 0;
 
 fail:
@@ -300,7 +309,6 @@
 		error = mprotect_fixup(vma, &prev, nstart, tmp, newflags);
 		if (error)
 			goto out;
-		perf_event_mmap(vma);
 		nstart = tmp;
 
 		if (nstart < prev->vm_end)
--- linux-mvl-dove-2.6.32.orig/mm/nommu.c
+++ linux-mvl-dove-2.6.32/mm/nommu.c
@@ -608,7 +608,7 @@
  */
 static void add_vma_to_mm(struct mm_struct *mm, struct vm_area_struct *vma)
 {
-	struct vm_area_struct *pvma, **pp;
+	struct vm_area_struct *pvma, **pp, *next;
 	struct address_space *mapping;
 	struct rb_node **p, *parent;
 
@@ -668,8 +668,11 @@
 			break;
 	}
 
-	vma->vm_next = *pp;
+	next = *pp;
 	*pp = vma;
+	vma->vm_next = next;
+	if (next)
+		next->vm_prev = vma;
 }
 
 /*
@@ -1612,6 +1615,7 @@
 		mm->mmap = vma->vm_next;
 		delete_vma_from_mm(vma);
 		delete_vma(mm, vma);
+		cond_resched();
 	}
 
 	kleave("");
--- linux-mvl-dove-2.6.32.orig/mm/page-writeback.c
+++ linux-mvl-dove-2.6.32/mm/page-writeback.c
@@ -495,7 +495,6 @@
 
 	for (;;) {
 		struct writeback_control wbc = {
-			.bdi		= bdi,
 			.sync_mode	= WB_SYNC_NONE,
 			.older_than_this = NULL,
 			.nr_to_write	= write_chunk,
@@ -537,7 +536,7 @@
 		 * up.
 		 */
 		if (bdi_nr_reclaimable > bdi_thresh) {
-			writeback_inodes_wbc(&wbc);
+			writeback_inodes_wb(&bdi->wb, &wbc);
 			pages_written += write_chunk - wbc.nr_to_write;
 			get_dirty_limits(&background_thresh, &dirty_thresh,
 				       &bdi_thresh, bdi);
@@ -597,7 +596,7 @@
 	    (!laptop_mode && ((global_page_state(NR_FILE_DIRTY)
 			       + global_page_state(NR_UNSTABLE_NFS))
 					  > background_thresh)))
-		bdi_start_writeback(bdi, NULL, 0);
+		bdi_start_background_writeback(bdi);
 }
 
 void set_page_dirty_balance(struct page *page, int page_mkwrite)
@@ -821,7 +820,6 @@
 		      struct writeback_control *wbc, writepage_t writepage,
 		      void *data)
 {
-	struct backing_dev_info *bdi = mapping->backing_dev_info;
 	int ret = 0;
 	int done = 0;
 	struct pagevec pvec;
@@ -834,11 +832,6 @@
 	int range_whole = 0;
 	long nr_to_write = wbc->nr_to_write;
 
-	if (wbc->nonblocking && bdi_write_congested(bdi)) {
-		wbc->encountered_congestion = 1;
-		return 0;
-	}
-
 	pagevec_init(&pvec, 0);
 	if (wbc->range_cyclic) {
 		writeback_index = mapping->writeback_index; /* prev offset */
@@ -957,12 +950,6 @@
 					break;
 				}
 			}
-
-			if (wbc->nonblocking && bdi_write_congested(bdi)) {
-				wbc->encountered_congestion = 1;
-				done = 1;
-				break;
-			}
 		}
 		pagevec_release(&pvec);
 		cond_resched();
--- linux-mvl-dove-2.6.32.orig/mm/Kconfig
+++ linux-mvl-dove-2.6.32/mm/Kconfig
@@ -227,6 +227,7 @@
 
 config DEFAULT_MMAP_MIN_ADDR
         int "Low address space to protect from user allocation"
+	depends on MMU
         default 4096
         help
 	  This is the portion of low virtual memory which should be protected
--- linux-mvl-dove-2.6.32.orig/mm/slab.c
+++ linux-mvl-dove-2.6.32/mm/slab.c
@@ -971,13 +971,11 @@
 
 	if (limit > 1)
 		limit = 12;
-	ac_ptr = kmalloc_node(memsize, gfp, node);
+	ac_ptr = kzalloc_node(memsize, gfp, node);
 	if (ac_ptr) {
 		for_each_node(i) {
-			if (i == node || !node_online(i)) {
-				ac_ptr[i] = NULL;
+			if (i == node || !node_online(i))
 				continue;
-			}
 			ac_ptr[i] = alloc_arraycache(node, limit, 0xbaadf00d, gfp);
 			if (!ac_ptr[i]) {
 				for (i--; i >= 0; i--)
@@ -2251,8 +2249,8 @@
 	}
 #if FORCED_DEBUG && defined(CONFIG_DEBUG_PAGEALLOC)
 	if (size >= malloc_sizes[INDEX_L3 + 1].cs_size
-	    && cachep->obj_size > cache_line_size() && size < PAGE_SIZE) {
-		cachep->obj_offset += PAGE_SIZE - size;
+	    && cachep->obj_size > cache_line_size() && ALIGN(size, align) < PAGE_SIZE) {
+		cachep->obj_offset += PAGE_SIZE - ALIGN(size, align);
 		size = PAGE_SIZE;
 	}
 #endif
--- linux-mvl-dove-2.6.32.orig/mm/kmemleak.c
+++ linux-mvl-dove-2.6.32/mm/kmemleak.c
@@ -1354,9 +1354,12 @@
 	++(*pos);
 
 	list_for_each_continue_rcu(n, &object_list) {
-		next_obj = list_entry(n, struct kmemleak_object, object_list);
-		if (get_object(next_obj))
+		struct kmemleak_object *obj =
+			list_entry(n, struct kmemleak_object, object_list);
+		if (get_object(obj)) {
+			next_obj = obj;
 			break;
+		}
 	}
 
 	put_object(prev_obj);
--- linux-mvl-dove-2.6.32.orig/mm/vmalloc.c
+++ linux-mvl-dove-2.6.32/mm/vmalloc.c
@@ -509,6 +509,18 @@
 
 static atomic_t vmap_lazy_nr = ATOMIC_INIT(0);
 
+/* for per-CPU blocks */
+static void purge_fragmented_blocks_allcpus(void);
+
+/*
+ * called before a call to iounmap() if the caller wants vm_area_struct's
+ * immediately freed.
+ */
+void set_iounmap_nonlazy(void)
+{
+	atomic_set(&vmap_lazy_nr, lazy_max_pages()+1);
+}
+
 /*
  * Purges all lazily-freed vmap areas.
  *
@@ -539,6 +551,9 @@
 	} else
 		spin_lock(&purge_lock);
 
+	if (sync)
+		purge_fragmented_blocks_allcpus();
+
 	rcu_read_lock();
 	list_for_each_entry_rcu(va, &vmap_area_list, list) {
 		if (va->flags & VM_LAZY_FREE) {
@@ -555,10 +570,8 @@
 	}
 	rcu_read_unlock();
 
-	if (nr) {
-		BUG_ON(nr > atomic_read(&vmap_lazy_nr));
+	if (nr)
 		atomic_sub(nr, &vmap_lazy_nr);
-	}
 
 	if (nr || force_flush)
 		flush_tlb_kernel_range(*start, *end);
@@ -669,8 +682,6 @@
 struct vmap_block_queue {
 	spinlock_t lock;
 	struct list_head free;
-	struct list_head dirty;
-	unsigned int nr_dirty;
 };
 
 struct vmap_block {
@@ -680,10 +691,9 @@
 	unsigned long free, dirty;
 	DECLARE_BITMAP(alloc_map, VMAP_BBMAP_BITS);
 	DECLARE_BITMAP(dirty_map, VMAP_BBMAP_BITS);
-	union {
-		struct list_head free_list;
-		struct rcu_head rcu_head;
-	};
+	struct list_head free_list;
+	struct rcu_head rcu_head;
+	struct list_head purge;
 };
 
 /* Queue of free and dirty vmap blocks, for allocation and flushing purposes */
@@ -759,7 +769,7 @@
 	vbq = &get_cpu_var(vmap_block_queue);
 	vb->vbq = vbq;
 	spin_lock(&vbq->lock);
-	list_add(&vb->free_list, &vbq->free);
+	list_add_rcu(&vb->free_list, &vbq->free);
 	spin_unlock(&vbq->lock);
 	put_cpu_var(vmap_cpu_blocks);
 
@@ -778,8 +788,6 @@
 	struct vmap_block *tmp;
 	unsigned long vb_idx;
 
-	BUG_ON(!list_empty(&vb->free_list));
-
 	vb_idx = addr_to_vb_idx(vb->va->va_start);
 	spin_lock(&vmap_block_tree_lock);
 	tmp = radix_tree_delete(&vmap_block_tree, vb_idx);
@@ -790,12 +798,61 @@
 	call_rcu(&vb->rcu_head, rcu_free_vb);
 }
 
+static void purge_fragmented_blocks(int cpu)
+{
+	LIST_HEAD(purge);
+	struct vmap_block *vb;
+	struct vmap_block *n_vb;
+	struct vmap_block_queue *vbq = &per_cpu(vmap_block_queue, cpu);
+
+	rcu_read_lock();
+	list_for_each_entry_rcu(vb, &vbq->free, free_list) {
+
+		if (!(vb->free + vb->dirty == VMAP_BBMAP_BITS && vb->dirty != VMAP_BBMAP_BITS))
+			continue;
+
+		spin_lock(&vb->lock);
+		if (vb->free + vb->dirty == VMAP_BBMAP_BITS && vb->dirty != VMAP_BBMAP_BITS) {
+			vb->free = 0; /* prevent further allocs after releasing lock */
+			vb->dirty = VMAP_BBMAP_BITS; /* prevent purging it again */
+			bitmap_fill(vb->alloc_map, VMAP_BBMAP_BITS);
+			bitmap_fill(vb->dirty_map, VMAP_BBMAP_BITS);
+			spin_lock(&vbq->lock);
+			list_del_rcu(&vb->free_list);
+			spin_unlock(&vbq->lock);
+			spin_unlock(&vb->lock);
+			list_add_tail(&vb->purge, &purge);
+		} else
+			spin_unlock(&vb->lock);
+	}
+	rcu_read_unlock();
+
+	list_for_each_entry_safe(vb, n_vb, &purge, purge) {
+		list_del(&vb->purge);
+		free_vmap_block(vb);
+	}
+}
+
+static void purge_fragmented_blocks_thiscpu(void)
+{
+	purge_fragmented_blocks(smp_processor_id());
+}
+
+static void purge_fragmented_blocks_allcpus(void)
+{
+	int cpu;
+
+	for_each_possible_cpu(cpu)
+		purge_fragmented_blocks(cpu);
+}
+
 static void *vb_alloc(unsigned long size, gfp_t gfp_mask)
 {
 	struct vmap_block_queue *vbq;
 	struct vmap_block *vb;
 	unsigned long addr = 0;
 	unsigned int order;
+	int purge = 0;
 
 	BUG_ON(size & ~PAGE_MASK);
 	BUG_ON(size > PAGE_SIZE*VMAP_MAX_ALLOC);
@@ -808,24 +865,37 @@
 		int i;
 
 		spin_lock(&vb->lock);
+		if (vb->free < 1UL << order)
+			goto next;
 		i = bitmap_find_free_region(vb->alloc_map,
 						VMAP_BBMAP_BITS, order);
 
-		if (i >= 0) {
-			addr = vb->va->va_start + (i << PAGE_SHIFT);
-			BUG_ON(addr_to_vb_idx(addr) !=
-					addr_to_vb_idx(vb->va->va_start));
-			vb->free -= 1UL << order;
-			if (vb->free == 0) {
-				spin_lock(&vbq->lock);
-				list_del_init(&vb->free_list);
-				spin_unlock(&vbq->lock);
+		if (i < 0) {
+			if (vb->free + vb->dirty == VMAP_BBMAP_BITS) {
+				/* fragmented and no outstanding allocations */
+				BUG_ON(vb->dirty != VMAP_BBMAP_BITS);
+				purge = 1;
 			}
-			spin_unlock(&vb->lock);
-			break;
+			goto next;
 		}
+		addr = vb->va->va_start + (i << PAGE_SHIFT);
+		BUG_ON(addr_to_vb_idx(addr) !=
+				addr_to_vb_idx(vb->va->va_start));
+		vb->free -= 1UL << order;
+		if (vb->free == 0) {
+			spin_lock(&vbq->lock);
+			list_del_rcu(&vb->free_list);
+			spin_unlock(&vbq->lock);
+		}
+		spin_unlock(&vb->lock);
+		break;
+next:
 		spin_unlock(&vb->lock);
 	}
+
+	if (purge)
+		purge_fragmented_blocks_thiscpu();
+
 	put_cpu_var(vmap_cpu_blocks);
 	rcu_read_unlock();
 
@@ -862,11 +932,11 @@
 	BUG_ON(!vb);
 
 	spin_lock(&vb->lock);
-	bitmap_allocate_region(vb->dirty_map, offset >> PAGE_SHIFT, order);
+	BUG_ON(bitmap_allocate_region(vb->dirty_map, offset >> PAGE_SHIFT, order));
 
 	vb->dirty += 1UL << order;
 	if (vb->dirty == VMAP_BBMAP_BITS) {
-		BUG_ON(vb->free || !list_empty(&vb->free_list));
+		BUG_ON(vb->free);
 		spin_unlock(&vb->lock);
 		free_vmap_block(vb);
 	} else
@@ -1035,8 +1105,6 @@
 		vbq = &per_cpu(vmap_block_queue, i);
 		spin_lock_init(&vbq->lock);
 		INIT_LIST_HEAD(&vbq->free);
-		INIT_LIST_HEAD(&vbq->dirty);
-		vbq->nr_dirty = 0;
 	}
 
 	/* Import existing vmlist entries. */
@@ -1993,6 +2061,7 @@
 }
 EXPORT_SYMBOL_GPL(free_vm_area);
 
+#ifndef CONFIG_HAVE_LEGACY_PER_CPU_AREA
 static struct vmap_area *node_to_va(struct rb_node *n)
 {
 	return n ? rb_entry(n, struct vmap_area, rb_node) : NULL;
@@ -2257,6 +2326,7 @@
 	kfree(vms);
 	return NULL;
 }
+#endif
 
 /**
  * pcpu_free_vm_areas - free vmalloc areas for percpu allocator
--- linux-mvl-dove-2.6.32.orig/mm/shmem.c
+++ linux-mvl-dove-2.6.32/mm/shmem.c
@@ -2674,6 +2674,14 @@
 }
 EXPORT_SYMBOL_GPL(shmem_file_setup);
 
+void shmem_set_file(struct vm_area_struct *vma, struct file *file)
+{
+	if (vma->vm_file)
+		fput(vma->vm_file);
+	vma->vm_file = file;
+	vma->vm_ops = &shmem_vm_ops;
+}
+
 /**
  * shmem_zero_setup - setup a shared anonymous mapping
  * @vma: the vma to be mmapped is prepared by do_mmap_pgoff
@@ -2691,5 +2699,6 @@
 		fput(vma->vm_file);
 	vma->vm_file = file;
 	vma->vm_ops = &shmem_vm_ops;
+	vma->vm_flags |= VM_CAN_NONLINEAR;
 	return 0;
 }
--- linux-mvl-dove-2.6.32.orig/mm/ashmem.c
+++ linux-mvl-dove-2.6.32/mm/ashmem.c
@@ -0,0 +1,670 @@
+/* mm/ashmem.c
+**
+** Anonymous Shared Memory Subsystem, ashmem
+**
+** Copyright (C) 2008 Google, Inc.
+**
+** Robert Love <rlove@google.com>
+**
+** This software is licensed under the terms of the GNU General Public
+** License version 2, as published by the Free Software Foundation, and
+** may be copied, distributed, and modified under those terms.
+**
+** This program is distributed in the hope that it will be useful,
+** but WITHOUT ANY WARRANTY; without even the implied warranty of
+** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+** GNU General Public License for more details.
+*/
+
+#include <linux/module.h>
+#include <linux/file.h>
+#include <linux/fs.h>
+#include <linux/miscdevice.h>
+#include <linux/security.h>
+#include <linux/mm.h>
+#include <linux/mman.h>
+#include <linux/uaccess.h>
+#include <linux/personality.h>
+#include <linux/bitops.h>
+#include <linux/mutex.h>
+#include <linux/shmem_fs.h>
+#include <linux/ashmem.h>
+
+#define ASHMEM_NAME_PREFIX "dev/ashmem/"
+#define ASHMEM_NAME_PREFIX_LEN (sizeof(ASHMEM_NAME_PREFIX) - 1)
+#define ASHMEM_FULL_NAME_LEN (ASHMEM_NAME_LEN + ASHMEM_NAME_PREFIX_LEN)
+
+/*
+ * ashmem_area - anonymous shared memory area
+ * Lifecycle: From our parent file's open() until its release()
+ * Locking: Protected by `ashmem_mutex'
+ * Big Note: Mappings do NOT pin this structure; it dies on close()
+ */
+struct ashmem_area {
+	char name[ASHMEM_FULL_NAME_LEN];/* optional name for /proc/pid/maps */
+	struct list_head unpinned_list;	/* list of all ashmem areas */
+	struct file *file;		/* the shmem-based backing file */
+	size_t size;			/* size of the mapping, in bytes */
+	unsigned long prot_mask;	/* allowed prot bits, as vm_flags */
+};
+
+/*
+ * ashmem_range - represents an interval of unpinned (evictable) pages
+ * Lifecycle: From unpin to pin
+ * Locking: Protected by `ashmem_mutex'
+ */
+struct ashmem_range {
+	struct list_head lru;		/* entry in LRU list */
+	struct list_head unpinned;	/* entry in its area's unpinned list */
+	struct ashmem_area *asma;	/* associated area */
+	size_t pgstart;			/* starting page, inclusive */
+	size_t pgend;			/* ending page, inclusive */
+	unsigned int purged;		/* ASHMEM_NOT or ASHMEM_WAS_PURGED */
+};
+
+/* LRU list of unpinned pages, protected by ashmem_mutex */
+static LIST_HEAD(ashmem_lru_list);
+
+/* Count of pages on our LRU list, protected by ashmem_mutex */
+static unsigned long lru_count;
+
+/*
+ * ashmem_mutex - protects the list of and each individual ashmem_area
+ *
+ * Lock Ordering: ashmex_mutex -> i_mutex -> i_alloc_sem
+ */
+static DEFINE_MUTEX(ashmem_mutex);
+
+static struct kmem_cache *ashmem_area_cachep __read_mostly;
+static struct kmem_cache *ashmem_range_cachep __read_mostly;
+
+#define range_size(range) \
+  ((range)->pgend - (range)->pgstart + 1)
+
+#define range_on_lru(range) \
+  ((range)->purged == ASHMEM_NOT_PURGED)
+
+#define page_range_subsumes_range(range, start, end) \
+  (((range)->pgstart >= (start)) && ((range)->pgend <= (end)))
+
+#define page_range_subsumed_by_range(range, start, end) \
+  (((range)->pgstart <= (start)) && ((range)->pgend >= (end)))
+
+#define page_in_range(range, page) \
+ (((range)->pgstart <= (page)) && ((range)->pgend >= (page)))
+
+#define page_range_in_range(range, start, end) \
+  (page_in_range(range, start) || page_in_range(range, end) || \
+   page_range_subsumes_range(range, start, end))
+
+#define range_before_page(range, page) \
+  ((range)->pgend < (page))
+
+#define PROT_MASK		(PROT_EXEC | PROT_READ | PROT_WRITE)
+
+static inline void lru_add(struct ashmem_range *range)
+{
+	list_add_tail(&range->lru, &ashmem_lru_list);
+	lru_count += range_size(range);
+}
+
+static inline void lru_del(struct ashmem_range *range)
+{
+	list_del(&range->lru);
+	lru_count -= range_size(range);
+}
+
+/*
+ * range_alloc - allocate and initialize a new ashmem_range structure
+ *
+ * 'asma' - associated ashmem_area
+ * 'prev_range' - the previous ashmem_range in the sorted asma->unpinned list
+ * 'purged' - initial purge value (ASMEM_NOT_PURGED or ASHMEM_WAS_PURGED)
+ * 'start' - starting page, inclusive
+ * 'end' - ending page, inclusive
+ *
+ * Caller must hold ashmem_mutex.
+ */
+static int range_alloc(struct ashmem_area *asma,
+		       struct ashmem_range *prev_range, unsigned int purged,
+		       size_t start, size_t end)
+{
+	struct ashmem_range *range;
+
+	range = kmem_cache_zalloc(ashmem_range_cachep, GFP_KERNEL);
+	if (unlikely(!range))
+		return -ENOMEM;
+
+	range->asma = asma;
+	range->pgstart = start;
+	range->pgend = end;
+	range->purged = purged;
+
+	list_add_tail(&range->unpinned, &prev_range->unpinned);
+
+	if (range_on_lru(range))
+		lru_add(range);
+
+	return 0;
+}
+
+static void range_del(struct ashmem_range *range)
+{
+	list_del(&range->unpinned);
+	if (range_on_lru(range))
+		lru_del(range);
+	kmem_cache_free(ashmem_range_cachep, range);
+}
+
+/*
+ * range_shrink - shrinks a range
+ *
+ * Caller must hold ashmem_mutex.
+ */
+static inline void range_shrink(struct ashmem_range *range,
+				size_t start, size_t end)
+{
+	size_t pre = range_size(range);
+
+	range->pgstart = start;
+	range->pgend = end;
+
+	if (range_on_lru(range))
+		lru_count -= pre - range_size(range);
+}
+
+static int ashmem_open(struct inode *inode, struct file *file)
+{
+	struct ashmem_area *asma;
+	int ret;
+
+	ret = nonseekable_open(inode, file);
+	if (unlikely(ret))
+		return ret;
+
+	asma = kmem_cache_zalloc(ashmem_area_cachep, GFP_KERNEL);
+	if (unlikely(!asma))
+		return -ENOMEM;
+
+	INIT_LIST_HEAD(&asma->unpinned_list);
+	memcpy(asma->name, ASHMEM_NAME_PREFIX, ASHMEM_NAME_PREFIX_LEN);
+	asma->prot_mask = PROT_MASK;
+	file->private_data = asma;
+
+	return 0;
+}
+
+static int ashmem_release(struct inode *ignored, struct file *file)
+{
+	struct ashmem_area *asma = file->private_data;
+	struct ashmem_range *range, *next;
+
+	mutex_lock(&ashmem_mutex);
+	list_for_each_entry_safe(range, next, &asma->unpinned_list, unpinned)
+		range_del(range);
+	mutex_unlock(&ashmem_mutex);
+
+	if (asma->file)
+		fput(asma->file);
+	kmem_cache_free(ashmem_area_cachep, asma);
+
+	return 0;
+}
+
+static int ashmem_mmap(struct file *file, struct vm_area_struct *vma)
+{
+	struct ashmem_area *asma = file->private_data;
+	int ret = 0;
+
+	mutex_lock(&ashmem_mutex);
+
+	/* user needs to SET_SIZE before mapping */
+	if (unlikely(!asma->size)) {
+		ret = -EINVAL;
+		goto out;
+	}
+
+	/* requested protection bits must match our allowed protection mask */
+	if (unlikely((vma->vm_flags & ~asma->prot_mask) & PROT_MASK)) {
+		ret = -EPERM;
+		goto out;
+	}
+
+	if (!asma->file) {
+		char *name = ASHMEM_NAME_DEF;
+		struct file *vmfile;
+
+		if (asma->name[ASHMEM_NAME_PREFIX_LEN] != '\0')
+			name = asma->name;
+
+		/* ... and allocate the backing shmem file */
+		vmfile = shmem_file_setup(name, asma->size, vma->vm_flags);
+		if (unlikely(IS_ERR(vmfile))) {
+			ret = PTR_ERR(vmfile);
+			goto out;
+		}
+		asma->file = vmfile;
+	}
+	get_file(asma->file);
+
+	if (vma->vm_flags & VM_SHARED)
+		shmem_set_file(vma, asma->file);
+	else {
+		if (vma->vm_file)
+			fput(vma->vm_file);
+		vma->vm_file = asma->file;
+	}
+	vma->vm_flags |= VM_CAN_NONLINEAR;
+
+out:
+	mutex_unlock(&ashmem_mutex);
+	return ret;
+}
+
+/*
+ * ashmem_shrink - our cache shrinker, called from mm/vmscan.c :: shrink_slab
+ *
+ * 'nr_to_scan' is the number of objects (pages) to prune, or 0 to query how
+ * many objects (pages) we have in total.
+ *
+ * 'gfp_mask' is the mask of the allocation that got us into this mess.
+ *
+ * Return value is the number of objects (pages) remaining, or -1 if we cannot
+ * proceed without risk of deadlock (due to gfp_mask).
+ *
+ * We approximate LRU via least-recently-unpinned, jettisoning unpinned partial
+ * chunks of ashmem regions LRU-wise one-at-a-time until we hit 'nr_to_scan'
+ * pages freed.
+ */
+static int ashmem_shrink(int nr_to_scan, gfp_t gfp_mask)
+{
+	struct ashmem_range *range, *next;
+
+	/* We might recurse into filesystem code, so bail out if necessary */
+	if (nr_to_scan && !(gfp_mask & __GFP_FS))
+		return -1;
+	if (!nr_to_scan)
+		return lru_count;
+
+	mutex_lock(&ashmem_mutex);
+	list_for_each_entry_safe(range, next, &ashmem_lru_list, lru) {
+		struct inode *inode = range->asma->file->f_dentry->d_inode;
+		loff_t start = range->pgstart * PAGE_SIZE;
+		loff_t end = (range->pgend + 1) * PAGE_SIZE - 1;
+
+		vmtruncate_range(inode, start, end);
+		range->purged = ASHMEM_WAS_PURGED;
+		lru_del(range);
+
+		nr_to_scan -= range_size(range);
+		if (nr_to_scan <= 0)
+			break;
+	}
+	mutex_unlock(&ashmem_mutex);
+
+	return lru_count;
+}
+
+static struct shrinker ashmem_shrinker = {
+	.shrink = ashmem_shrink,
+	.seeks = DEFAULT_SEEKS * 4,
+};
+
+static int set_prot_mask(struct ashmem_area *asma, unsigned long prot)
+{
+	int ret = 0;
+
+	mutex_lock(&ashmem_mutex);
+
+	/* the user can only remove, not add, protection bits */
+	if (unlikely((asma->prot_mask & prot) != prot)) {
+		ret = -EINVAL;
+		goto out;
+	}
+
+	/* does the application expect PROT_READ to imply PROT_EXEC? */
+	if ((prot & PROT_READ) && (current->personality & READ_IMPLIES_EXEC))
+		prot |= PROT_EXEC;
+
+	asma->prot_mask = prot;
+
+out:
+	mutex_unlock(&ashmem_mutex);
+	return ret;
+}
+
+static int set_name(struct ashmem_area *asma, void __user *name)
+{
+	int ret = 0;
+
+	mutex_lock(&ashmem_mutex);
+
+	/* cannot change an existing mapping's name */
+	if (unlikely(asma->file)) {
+		ret = -EINVAL;
+		goto out;
+	}
+
+	if (unlikely(copy_from_user(asma->name + ASHMEM_NAME_PREFIX_LEN,
+				    name, ASHMEM_NAME_LEN)))
+		ret = -EFAULT;
+	asma->name[ASHMEM_FULL_NAME_LEN-1] = '\0';
+
+out:
+	mutex_unlock(&ashmem_mutex);
+
+	return ret;
+}
+
+static int get_name(struct ashmem_area *asma, void __user *name)
+{
+	int ret = 0;
+
+	mutex_lock(&ashmem_mutex);
+	if (asma->name[ASHMEM_NAME_PREFIX_LEN] != '\0') {
+		size_t len;
+
+		/*
+		 * Copying only `len', instead of ASHMEM_NAME_LEN, bytes
+		 * prevents us from revealing one user's stack to another.
+		 */
+		len = strlen(asma->name + ASHMEM_NAME_PREFIX_LEN) + 1;
+		if (unlikely(copy_to_user(name,
+				asma->name + ASHMEM_NAME_PREFIX_LEN, len)))
+			ret = -EFAULT;
+	} else {
+		if (unlikely(copy_to_user(name, ASHMEM_NAME_DEF,
+					  sizeof(ASHMEM_NAME_DEF))))
+			ret = -EFAULT;
+	}
+	mutex_unlock(&ashmem_mutex);
+
+	return ret;
+}
+
+/*
+ * ashmem_pin - pin the given ashmem region, returning whether it was
+ * previously purged (ASHMEM_WAS_PURGED) or not (ASHMEM_NOT_PURGED).
+ *
+ * Caller must hold ashmem_mutex.
+ */
+static int ashmem_pin(struct ashmem_area *asma, size_t pgstart, size_t pgend)
+{
+	struct ashmem_range *range, *next;
+	int ret = ASHMEM_NOT_PURGED;
+
+	list_for_each_entry_safe(range, next, &asma->unpinned_list, unpinned) {
+		/* moved past last applicable page; we can short circuit */
+		if (range_before_page(range, pgstart))
+			break;
+
+		/*
+		 * The user can ask us to pin pages that span multiple ranges,
+		 * or to pin pages that aren't even unpinned, so this is messy.
+		 *
+		 * Four cases:
+		 * 1. The requested range subsumes an existing range, so we
+		 *    just remove the entire matching range.
+		 * 2. The requested range overlaps the start of an existing
+		 *    range, so we just update that range.
+		 * 3. The requested range overlaps the end of an existing
+		 *    range, so we just update that range.
+		 * 4. The requested range punches a hole in an existing range,
+		 *    so we have to update one side of the range and then
+		 *    create a new range for the other side.
+		 */
+		if (page_range_in_range(range, pgstart, pgend)) {
+			ret |= range->purged;
+
+			/* Case #1: Easy. Just nuke the whole thing. */
+			if (page_range_subsumes_range(range, pgstart, pgend)) {
+				range_del(range);
+				continue;
+			}
+
+			/* Case #2: We overlap from the start, so adjust it */
+			if (range->pgstart >= pgstart) {
+				range_shrink(range, pgend + 1, range->pgend);
+				continue;
+			}
+
+			/* Case #3: We overlap from the rear, so adjust it */
+			if (range->pgend <= pgend) {
+				range_shrink(range, range->pgstart, pgstart-1);
+				continue;
+			}
+
+			/*
+			 * Case #4: We eat a chunk out of the middle. A bit
+			 * more complicated, we allocate a new range for the
+			 * second half and adjust the first chunk's endpoint.
+			 */
+			range_alloc(asma, range, range->purged,
+				    pgend + 1, range->pgend);
+			range_shrink(range, range->pgstart, pgstart - 1);
+			break;
+		}
+	}
+
+	return ret;
+}
+
+/*
+ * ashmem_unpin - unpin the given range of pages. Returns zero on success.
+ *
+ * Caller must hold ashmem_mutex.
+ */
+static int ashmem_unpin(struct ashmem_area *asma, size_t pgstart, size_t pgend)
+{
+	struct ashmem_range *range, *next;
+	unsigned int purged = ASHMEM_NOT_PURGED;
+
+restart:
+	list_for_each_entry_safe(range, next, &asma->unpinned_list, unpinned) {
+		/* short circuit: this is our insertion point */
+		if (range_before_page(range, pgstart))
+			break;
+
+		/*
+		 * The user can ask us to unpin pages that are already entirely
+		 * or partially pinned. We handle those two cases here.
+		 */
+		if (page_range_subsumed_by_range(range, pgstart, pgend))
+			return 0;
+		if (page_range_in_range(range, pgstart, pgend)) {
+			pgstart = min_t(size_t, range->pgstart, pgstart),
+			pgend = max_t(size_t, range->pgend, pgend);
+			purged |= range->purged;
+			range_del(range);
+			goto restart;
+		}
+	}
+
+	return range_alloc(asma, range, purged, pgstart, pgend);
+}
+
+/*
+ * ashmem_get_pin_status - Returns ASHMEM_IS_UNPINNED if _any_ pages in the
+ * given interval are unpinned and ASHMEM_IS_PINNED otherwise.
+ *
+ * Caller must hold ashmem_mutex.
+ */
+static int ashmem_get_pin_status(struct ashmem_area *asma, size_t pgstart,
+				 size_t pgend)
+{
+	struct ashmem_range *range;
+	int ret = ASHMEM_IS_PINNED;
+
+	list_for_each_entry(range, &asma->unpinned_list, unpinned) {
+		if (range_before_page(range, pgstart))
+			break;
+		if (page_range_in_range(range, pgstart, pgend)) {
+			ret = ASHMEM_IS_UNPINNED;
+			break;
+		}
+	}
+
+	return ret;
+}
+
+static int ashmem_pin_unpin(struct ashmem_area *asma, unsigned long cmd,
+			    void __user *p)
+{
+	struct ashmem_pin pin;
+	size_t pgstart, pgend;
+	int ret = -EINVAL;
+
+	if (unlikely(!asma->file))
+		return -EINVAL;
+
+	if (unlikely(copy_from_user(&pin, p, sizeof(pin))))
+		return -EFAULT;
+
+	/* per custom, you can pass zero for len to mean "everything onward" */
+	if (!pin.len)
+		pin.len = PAGE_ALIGN(asma->size) - pin.offset;
+
+	if (unlikely((pin.offset | pin.len) & ~PAGE_MASK))
+		return -EINVAL;
+
+	if (unlikely(((__u32) -1) - pin.offset < pin.len))
+		return -EINVAL;
+
+	if (unlikely(PAGE_ALIGN(asma->size) < pin.offset + pin.len))
+		return -EINVAL;
+
+	pgstart = pin.offset / PAGE_SIZE;
+	pgend = pgstart + (pin.len / PAGE_SIZE) - 1;
+
+	mutex_lock(&ashmem_mutex);
+
+	switch (cmd) {
+	case ASHMEM_PIN:
+		ret = ashmem_pin(asma, pgstart, pgend);
+		break;
+	case ASHMEM_UNPIN:
+		ret = ashmem_unpin(asma, pgstart, pgend);
+		break;
+	case ASHMEM_GET_PIN_STATUS:
+		ret = ashmem_get_pin_status(asma, pgstart, pgend);
+		break;
+	}
+
+	mutex_unlock(&ashmem_mutex);
+
+	return ret;
+}
+
+static long ashmem_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+	struct ashmem_area *asma = file->private_data;
+	long ret = -ENOTTY;
+
+	switch (cmd) {
+	case ASHMEM_SET_NAME:
+		ret = set_name(asma, (void __user *) arg);
+		break;
+	case ASHMEM_GET_NAME:
+		ret = get_name(asma, (void __user *) arg);
+		break;
+	case ASHMEM_SET_SIZE:
+		ret = -EINVAL;
+		if (!asma->file) {
+			ret = 0;
+			asma->size = (size_t) arg;
+		}
+		break;
+	case ASHMEM_GET_SIZE:
+		ret = asma->size;
+		break;
+	case ASHMEM_SET_PROT_MASK:
+		ret = set_prot_mask(asma, arg);
+		break;
+	case ASHMEM_GET_PROT_MASK:
+		ret = asma->prot_mask;
+		break;
+	case ASHMEM_PIN:
+	case ASHMEM_UNPIN:
+	case ASHMEM_GET_PIN_STATUS:
+		ret = ashmem_pin_unpin(asma, cmd, (void __user *) arg);
+		break;
+	case ASHMEM_PURGE_ALL_CACHES:
+		ret = -EPERM;
+		if (capable(CAP_SYS_ADMIN)) {
+			ret = ashmem_shrink(0, GFP_KERNEL);
+			ashmem_shrink(ret, GFP_KERNEL);
+		}
+		break;
+	}
+
+	return ret;
+}
+
+static struct file_operations ashmem_fops = {
+	.owner = THIS_MODULE,
+	.open = ashmem_open,
+	.release = ashmem_release,
+	.mmap = ashmem_mmap,
+	.unlocked_ioctl = ashmem_ioctl,
+	.compat_ioctl = ashmem_ioctl,
+};
+
+static struct miscdevice ashmem_misc = {
+	.minor = MISC_DYNAMIC_MINOR,
+	.name = "ashmem",
+	.fops = &ashmem_fops,
+};
+
+static int __init ashmem_init(void)
+{
+	int ret;
+
+	ashmem_area_cachep = kmem_cache_create("ashmem_area_cache",
+					  sizeof(struct ashmem_area),
+					  0, 0, NULL);
+	if (unlikely(!ashmem_area_cachep)) {
+		printk(KERN_ERR "ashmem: failed to create slab cache\n");
+		return -ENOMEM;
+	}
+
+	ashmem_range_cachep = kmem_cache_create("ashmem_range_cache",
+					  sizeof(struct ashmem_range),
+					  0, 0, NULL);
+	if (unlikely(!ashmem_range_cachep)) {
+		printk(KERN_ERR "ashmem: failed to create slab cache\n");
+		return -ENOMEM;
+	}
+
+	ret = misc_register(&ashmem_misc);
+	if (unlikely(ret)) {
+		printk(KERN_ERR "ashmem: failed to register misc device!\n");
+		return ret;
+	}
+
+	register_shrinker(&ashmem_shrinker);
+
+	printk(KERN_INFO "ashmem: initialized\n");
+
+	return 0;
+}
+
+static void __exit ashmem_exit(void)
+{
+	int ret;
+
+	unregister_shrinker(&ashmem_shrinker);
+
+	ret = misc_deregister(&ashmem_misc);
+	if (unlikely(ret))
+		printk(KERN_ERR "ashmem: failed to unregister misc device!\n");
+
+	kmem_cache_destroy(ashmem_range_cachep);
+	kmem_cache_destroy(ashmem_area_cachep);
+
+	printk(KERN_INFO "ashmem: unloaded\n");
+}
+
+module_init(ashmem_init);
+module_exit(ashmem_exit);
+
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/mm/memcontrol.c
+++ linux-mvl-dove-2.6.32/mm/memcontrol.c
@@ -758,7 +758,13 @@
 	task_unlock(task);
 	if (!curr)
 		return 0;
-	if (curr->use_hierarchy)
+	/*
+	 * We should check use_hierarchy of "mem" not "curr". Because checking
+	 * use_hierarchy of "curr" here make this function true if hierarchy is
+	 * enabled in "curr" and "curr" is a child of "mem" in *cgroup*
+	 * hierarchy(even if use_hierarchy is disabled in "mem").
+	 */
+	if (mem->use_hierarchy)
 		ret = css_is_ancestor(&curr->css, &mem->css);
 	else
 		ret = (curr == mem);
@@ -2002,12 +2008,12 @@
 	}
 	unlock_page_cgroup(pc);
 
+	*ptr = mem;
 	if (mem) {
-		ret = __mem_cgroup_try_charge(NULL, GFP_KERNEL, &mem, false,
+		ret = __mem_cgroup_try_charge(NULL, GFP_KERNEL, ptr, false,
 						page);
 		css_put(&mem->css);
 	}
-	*ptr = mem;
 	return ret;
 }
 
@@ -2375,7 +2381,7 @@
 	if (free_all)
 		goto try_to_free;
 move_account:
-	while (mem->res.usage > 0) {
+	do {
 		ret = -EBUSY;
 		if (cgroup_task_count(cgrp) || !list_empty(&cgrp->children))
 			goto out;
@@ -2402,8 +2408,8 @@
 		if (ret == -ENOMEM)
 			goto try_to_free;
 		cond_resched();
-	}
-	ret = 0;
+	/* "ret" should also be checked to ensure all lists are empty. */
+	} while (mem->res.usage > 0 || ret);
 out:
 	css_put(&mem->css);
 	return ret;
@@ -2436,10 +2442,7 @@
 	}
 	lru_add_drain();
 	/* try move_account...there may be some *locked* pages. */
-	if (mem->res.usage)
-		goto move_account;
-	ret = 0;
-	goto out;
+	goto move_account;
 }
 
 int mem_cgroup_force_empty_write(struct cgroup *cont, unsigned int event)
@@ -2541,6 +2544,7 @@
 			val += idx_val;
 			mem_cgroup_get_recursive_idx_stat(mem,
 				MEM_CGROUP_STAT_SWAPOUT, &idx_val);
+			val += idx_val;
 			val <<= PAGE_SHIFT;
 		} else
 			val = res_counter_read_u64(&mem->memsw, name);
--- linux-mvl-dove-2.6.32.orig/mm/migrate.c
+++ linux-mvl-dove-2.6.32/mm/migrate.c
@@ -314,7 +314,7 @@
 	 */
 	__dec_zone_page_state(page, NR_FILE_PAGES);
 	__inc_zone_page_state(newpage, NR_FILE_PAGES);
-	if (PageSwapBacked(page)) {
+	if (!PageSwapCache(page) && PageSwapBacked(page)) {
 		__dec_zone_page_state(page, NR_SHMEM);
 		__inc_zone_page_state(newpage, NR_SHMEM);
 	}
@@ -953,6 +953,9 @@
 				goto out_pm;
 
 			err = -ENODEV;
+			if (node < 0 || node >= MAX_NUMNODES)
+				goto out_pm;
+
 			if (!node_state(node, N_HIGH_MEMORY))
 				goto out_pm;
 
--- linux-mvl-dove-2.6.32.orig/mm/oom_kill.c
+++ linux-mvl-dove-2.6.32/mm/oom_kill.c
@@ -404,7 +404,7 @@
 		cpuset_print_task_mems_allowed(current);
 		task_unlock(current);
 		dump_stack();
-		mem_cgroup_print_oom_info(mem, current);
+		mem_cgroup_print_oom_info(mem, p);
 		show_mem();
 		if (sysctl_oom_dump_tasks)
 			dump_tasks(mem);
@@ -426,6 +426,8 @@
 	list_for_each_entry(c, &p->children, sibling) {
 		if (c->mm == p->mm)
 			continue;
+		if (mem && !task_in_mem_cgroup(c, mem))
+			continue;
 		if (!oom_kill_task(c))
 			return 0;
 	}
--- linux-mvl-dove-2.6.32.orig/mm/mincore.c
+++ linux-mvl-dove-2.6.32/mm/mincore.c
@@ -14,6 +14,7 @@
 #include <linux/syscalls.h>
 #include <linux/swap.h>
 #include <linux/swapops.h>
+#include <linux/hugetlb.h>
 
 #include <asm/uaccess.h>
 #include <asm/pgtable.h>
@@ -72,6 +73,42 @@
 	if (!vma || addr < vma->vm_start)
 		return -ENOMEM;
 
+#ifdef CONFIG_HUGETLB_PAGE
+	if (is_vm_hugetlb_page(vma)) {
+		struct hstate *h;
+		unsigned long nr_huge;
+		unsigned char present;
+
+		i = 0;
+		nr = min(pages, (vma->vm_end - addr) >> PAGE_SHIFT);
+		h = hstate_vma(vma);
+		nr_huge = ((addr + pages * PAGE_SIZE - 1) >> huge_page_shift(h))
+			  - (addr >> huge_page_shift(h)) + 1;
+		nr_huge = min(nr_huge,
+			      (vma->vm_end - addr) >> huge_page_shift(h));
+		while (1) {
+			/* hugepage always in RAM for now,
+			 * but generally it needs to be check */
+			ptep = huge_pte_offset(current->mm,
+					       addr & huge_page_mask(h));
+			present = !!(ptep &&
+				     !huge_pte_none(huge_ptep_get(ptep)));
+			while (1) {
+				vec[i++] = present;
+				addr += PAGE_SIZE;
+				/* reach buffer limit */
+				if (i == nr)
+					return nr;
+				/* check hugepage border */
+				if (!((addr & ~huge_page_mask(h))
+				      >> PAGE_SHIFT))
+					break;
+			}
+		}
+		return nr;
+	}
+#endif
+
 	/*
 	 * Calculate how many pages there are left in the last level of the
 	 * PTE array for our address.
--- linux-mvl-dove-2.6.32.orig/mm/internal.h
+++ linux-mvl-dove-2.6.32/mm/internal.h
@@ -59,7 +59,7 @@
  */
 static inline unsigned long page_order(struct page *page)
 {
-	VM_BUG_ON(!PageBuddy(page));
+	/* PageBuddy() must be checked by the caller */
 	return page_private(page);
 }
 
@@ -107,9 +107,10 @@
 }
 
 /*
- * must be called with vma's mmap_sem held for read, and page locked.
+ * must be called with vma's mmap_sem held for read or write, and page locked.
  */
 extern void mlock_vma_page(struct page *page);
+extern void munlock_vma_page(struct page *page);
 
 /*
  * Clear the page's PageMlocked().  This can be useful in a situation where
--- linux-mvl-dove-2.6.32.orig/mm/Makefile
+++ linux-mvl-dove-2.6.32/mm/Makefile
@@ -22,6 +22,7 @@
 obj-$(CONFIG_NUMA) 	+= mempolicy.o
 obj-$(CONFIG_SPARSEMEM)	+= sparse.o
 obj-$(CONFIG_SPARSEMEM_VMEMMAP) += sparse-vmemmap.o
+obj-$(CONFIG_ASHMEM) += ashmem.o
 obj-$(CONFIG_TMPFS_POSIX_ACL) += shmem_acl.o
 obj-$(CONFIG_SLOB) += slob.o
 obj-$(CONFIG_MMU_NOTIFIER) += mmu_notifier.o
--- linux-mvl-dove-2.6.32.orig/mm/hugetlb.c
+++ linux-mvl-dove-2.6.32/mm/hugetlb.c
@@ -401,7 +401,7 @@
 {
 	int i;
 
-	if (unlikely(sz > MAX_ORDER_NR_PAGES)) {
+	if (unlikely(sz/PAGE_SIZE > MAX_ORDER_NR_PAGES)) {
 		clear_gigantic_page(page, addr, sz);
 		return;
 	}
@@ -545,6 +545,7 @@
 
 	mapping = (struct address_space *) page_private(page);
 	set_page_private(page, 0);
+	page->mapping = NULL;
 	BUG_ON(page_count(page));
 	INIT_LIST_HEAD(&page->lru);
 
@@ -994,10 +995,10 @@
 	 */
 	chg = vma_needs_reservation(h, vma, addr);
 	if (chg < 0)
-		return ERR_PTR(chg);
+		return ERR_PTR(-VM_FAULT_OOM);
 	if (chg)
 		if (hugetlb_get_quota(inode->i_mapping, chg))
-			return ERR_PTR(-ENOSPC);
+			return ERR_PTR(-VM_FAULT_SIGBUS);
 
 	spin_lock(&hugetlb_lock);
 	page = dequeue_huge_page_vma(h, vma, addr, avoid_reserve);
@@ -1007,7 +1008,7 @@
 		page = alloc_buddy_huge_page(h, vma, addr);
 		if (!page) {
 			hugetlb_put_quota(inode->i_mapping, chg);
-			return ERR_PTR(-VM_FAULT_OOM);
+			return ERR_PTR(-VM_FAULT_SIGBUS);
 		}
 	}
 
@@ -1073,6 +1074,14 @@
 		WARN_ON(page_count(page) != 1);
 		prep_compound_huge_page(page, h->order);
 		prep_new_huge_page(h, page, page_to_nid(page));
+		/*
+		 * If we had gigantic hugepages allocated at boot time, we need
+		 * to restore the 'stolen' pages to totalram_pages in order to
+		 * fix confusing memory reports from free(1) and another
+		 * side-effects, like CommitLimit going negative.
+		 */
+		if (h->order > (MAX_ORDER - 1))
+			totalram_pages += 1 << h->order;
 	}
 }
 
@@ -2095,8 +2104,10 @@
 			spin_lock(&inode->i_lock);
 			inode->i_blocks += blocks_per_huge_page(h);
 			spin_unlock(&inode->i_lock);
-		} else
+		} else {
 			lock_page(page);
+			page->mapping = HUGETLB_POISON;
+		}
 	}
 
 	/*
--- linux-mvl-dove-2.6.32.orig/mm/mlock.c
+++ linux-mvl-dove-2.6.32/mm/mlock.c
@@ -99,14 +99,14 @@
  * not get another chance to clear PageMlocked.  If we successfully
  * isolate the page and try_to_munlock() detects other VM_LOCKED vmas
  * mapping the page, it will restore the PageMlocked state, unless the page
- * is mapped in a non-linear vma.  So, we go ahead and SetPageMlocked(),
+ * is mapped in a non-linear vma.  So, we go ahead and ClearPageMlocked(),
  * perhaps redundantly.
  * If we lose the isolation race, and the page is mapped by other VM_LOCKED
  * vmas, we'll detect this in vmscan--via try_to_munlock() or try_to_unmap()
  * either of which will restore the PageMlocked state by calling
  * mlock_vma_page() above, if it can grab the vma's mmap sem.
  */
-static void munlock_vma_page(struct page *page)
+void munlock_vma_page(struct page *page)
 {
 	BUG_ON(!PageLocked(page));
 
@@ -138,6 +138,13 @@
 	}
 }
 
+static inline int stack_guard_page(struct vm_area_struct *vma, unsigned long addr)
+{
+	return (vma->vm_flags & VM_GROWSDOWN) &&
+		(vma->vm_start == addr) &&
+		!vma_stack_continue(vma->vm_prev, addr);
+}
+
 /**
  * __mlock_vma_pages_range() -  mlock a range of pages in the vma.
  * @vma:   target vma
@@ -170,6 +177,12 @@
 	if (vma->vm_flags & VM_WRITE)
 		gup_flags |= FOLL_WRITE;
 
+	/* We don't try to access the guard page of a stack vma */
+	if (stack_guard_page(vma, start)) {
+		addr += PAGE_SIZE;
+		nr_pages--;
+	}
+
 	while (nr_pages > 0) {
 		int i;
 
--- linux-mvl-dove-2.6.32.orig/mm/memory.c
+++ linux-mvl-dove-2.6.32/mm/memory.c
@@ -1282,10 +1282,20 @@
 				return i ? : -EFAULT;
 			}
 			if (pages) {
-				struct page *page = vm_normal_page(gate_vma, start, *pte);
+				struct page *page;
+
+				page = vm_normal_page(gate_vma, start, *pte);
+				if (!page) {
+					if (!(gup_flags & FOLL_DUMP) &&
+					     is_zero_pfn(pte_pfn(*pte)))
+						page = pte_page(*pte);
+					else {
+						pte_unmap(pte);
+						return i ? : -EFAULT;
+					}
+				}
 				pages[i] = page;
-				if (page)
-					get_page(page);
+				get_page(page);
 			}
 			pte_unmap(pte);
 			if (vmas)
@@ -2444,6 +2454,7 @@
 		details.last_index = ULONG_MAX;
 	details.i_mmap_lock = &mapping->i_mmap_lock;
 
+	mutex_lock(&mapping->unmap_mutex);
 	spin_lock(&mapping->i_mmap_lock);
 
 	/* Protect against endless unmapping loops */
@@ -2460,6 +2471,7 @@
 	if (unlikely(!list_empty(&mapping->i_mmap_nonlinear)))
 		unmap_mapping_range_list(&mapping->i_mmap_nonlinear, &details);
 	spin_unlock(&mapping->i_mmap_lock);
+	mutex_unlock(&mapping->unmap_mutex);
 }
 EXPORT_SYMBOL(unmap_mapping_range);
 
@@ -2514,7 +2526,7 @@
 			ret = VM_FAULT_HWPOISON;
 		} else {
 			print_bad_pte(vma, address, orig_pte, NULL);
-			ret = VM_FAULT_OOM;
+			ret = VM_FAULT_SIGBUS;
 		}
 		goto out;
 	}
@@ -2620,6 +2632,40 @@
 }
 
 /*
+ * This is like a special single-page "expand_{down|up}wards()",
+ * except we must first make sure that 'address{-|+}PAGE_SIZE'
+ * doesn't hit another vma.
+ */
+static inline int check_stack_guard_page(struct vm_area_struct *vma, unsigned long address)
+{
+	address &= PAGE_MASK;
+	if ((vma->vm_flags & VM_GROWSDOWN) && address == vma->vm_start) {
+		struct vm_area_struct *prev = vma->vm_prev;
+
+		/*
+		 * Is there a mapping abutting this one below?
+		 *
+		 * That's only ok if it's the same stack mapping
+		 * that has gotten split..
+		 */
+		if (prev && prev->vm_end == address)
+			return prev->vm_flags & VM_GROWSDOWN ? 0 : -ENOMEM;
+
+		expand_stack(vma, address - PAGE_SIZE);
+	}
+	if ((vma->vm_flags & VM_GROWSUP) && address + PAGE_SIZE == vma->vm_end) {
+		struct vm_area_struct *next = vma->vm_next;
+
+		/* As VM_GROWSDOWN but s/below/above/ */
+		if (next && next->vm_start == address + PAGE_SIZE)
+			return next->vm_flags & VM_GROWSUP ? 0 : -ENOMEM;
+
+		expand_upwards(vma, address + PAGE_SIZE);
+	}
+	return 0;
+}
+
+/*
  * We enter with non-exclusive mmap_sem (to exclude vma changes,
  * but allow concurrent faults), and pte mapped but not yet locked.
  * We return with mmap_sem still held, but pte unmapped and unlocked.
@@ -2632,19 +2678,23 @@
 	spinlock_t *ptl;
 	pte_t entry;
 
+	pte_unmap(page_table);
+
+	/* Check if we need to add a guard page to the stack */
+	if (check_stack_guard_page(vma, address) < 0)
+		return VM_FAULT_SIGBUS;
+
+	/* Use the zero-page for reads */
 	if (!(flags & FAULT_FLAG_WRITE)) {
 		entry = pte_mkspecial(pfn_pte(my_zero_pfn(address),
 						vma->vm_page_prot));
-		ptl = pte_lockptr(mm, pmd);
-		spin_lock(ptl);
+		page_table = pte_offset_map_lock(mm, pmd, address, &ptl);
 		if (!pte_none(*page_table))
 			goto unlock;
 		goto setpte;
 	}
 
 	/* Allocate our own private page. */
-	pte_unmap(page_table);
-
 	if (unlikely(anon_vma_prepare(vma)))
 		goto oom;
 	page = alloc_zeroed_user_highpage_movable(vma, address);
@@ -2910,7 +2960,7 @@
 		 * Page table corrupted: show pte and kill process.
 		 */
 		print_bad_pte(vma, address, orig_pte, NULL);
-		return VM_FAULT_OOM;
+		return VM_FAULT_SIGBUS;
 	}
 
 	pgoff = pte_to_pgoff(orig_pte);
--- linux-mvl-dove-2.6.32.orig/mm/bounce.c
+++ linux-mvl-dove-2.6.32/mm/bounce.c
@@ -115,8 +115,8 @@
 		 */
 		vfrom = page_address(fromvec->bv_page) + tovec->bv_offset;
 
-		flush_dcache_page(tovec->bv_page);
 		bounce_copy_vec(tovec, vfrom);
+		flush_dcache_page(tovec->bv_page);
 	}
 }
 
--- linux-mvl-dove-2.6.32.orig/mm/ksm.c
+++ linux-mvl-dove-2.6.32/mm/ksm.c
@@ -34,6 +34,7 @@
 #include <linux/ksm.h>
 
 #include <asm/tlbflush.h>
+#include "internal.h"
 
 /*
  * A few notes about the KSM scanning process,
@@ -767,15 +768,14 @@
 	 * ptes are necessarily already write-protected.  But in either
 	 * case, we need to lock and check page_count is not raised.
 	 */
-	if (write_protect_page(vma, oldpage, &orig_pte)) {
-		unlock_page(oldpage);
-		goto out_putpage;
-	}
-	unlock_page(oldpage);
-
-	if (pages_identical(oldpage, newpage))
+	if (write_protect_page(vma, oldpage, &orig_pte) == 0 &&
+	    pages_identical(oldpage, newpage))
 		err = replace_page(vma, oldpage, newpage, orig_pte);
 
+	if ((vma->vm_flags & VM_LOCKED) && !err)
+		munlock_vma_page(oldpage);
+
+	unlock_page(oldpage);
 out_putpage:
 	put_page(oldpage);
 	put_page(newpage);
@@ -1215,6 +1215,12 @@
 		slot = list_entry(slot->mm_list.next, struct mm_slot, mm_list);
 		ksm_scan.mm_slot = slot;
 		spin_unlock(&ksm_mmlist_lock);
+		/*
+		 * Although we tested list_empty() above, a racing __ksm_exit
+		 * of the last mm on the list may have removed it since then.
+		 */
+		if (slot == &ksm_mm_head)
+			return NULL;
 next_mm:
 		ksm_scan.address = 0;
 		ksm_scan.rmap_item = list_entry(&slot->rmap_list,
--- linux-mvl-dove-2.6.32.orig/mm/page_alloc.c
+++ linux-mvl-dove-2.6.32/mm/page_alloc.c
@@ -531,13 +531,13 @@
 {
 	int migratetype = 0;
 	int batch_free = 0;
+	int to_free = count;
 
 	spin_lock(&zone->lock);
 	zone_clear_flag(zone, ZONE_ALL_UNRECLAIMABLE);
 	zone->pages_scanned = 0;
 
-	__mod_zone_page_state(zone, NR_FREE_PAGES, count);
-	while (count) {
+	while (to_free) {
 		struct page *page;
 		struct list_head *list;
 
@@ -559,10 +559,12 @@
 			page = list_entry(list->prev, struct page, lru);
 			/* must delete as __free_one_page list manipulates */
 			list_del(&page->lru);
-			__free_one_page(page, zone, 0, migratetype);
-			trace_mm_page_pcpu_drain(page, 0, migratetype);
-		} while (--count && --batch_free && !list_empty(list));
+			/* MIGRATE_MOVABLE list may include MIGRATE_RESERVEs */
+			__free_one_page(page, zone, 0, page_private(page));
+			trace_mm_page_pcpu_drain(page, 0, page_private(page));
+		} while (--to_free && --batch_free && !list_empty(list));
 	}
+	__mod_zone_page_state(zone, NR_FREE_PAGES, count);
 	spin_unlock(&zone->lock);
 }
 
@@ -573,8 +575,8 @@
 	zone_clear_flag(zone, ZONE_ALL_UNRECLAIMABLE);
 	zone->pages_scanned = 0;
 
-	__mod_zone_page_state(zone, NR_FREE_PAGES, 1 << order);
 	__free_one_page(page, zone, order, migratetype);
+	__mod_zone_page_state(zone, NR_FREE_PAGES, 1 << order);
 	spin_unlock(&zone->lock);
 }
 
@@ -1225,10 +1227,10 @@
 		}
 		spin_lock_irqsave(&zone->lock, flags);
 		page = __rmqueue(zone, order, migratetype);
-		__mod_zone_page_state(zone, NR_FREE_PAGES, -(1 << order));
 		spin_unlock(&zone->lock);
 		if (!page)
 			goto failed;
+		__mod_zone_page_state(zone, NR_FREE_PAGES, -(1 << order));
 	}
 
 	__count_zone_vm_events(PGALLOC, zone, 1 << order);
@@ -1364,7 +1366,7 @@
 {
 	/* free_pages my go negative - that's OK */
 	long min = mark;
-	long free_pages = zone_page_state(z, NR_FREE_PAGES) - (1 << order) + 1;
+	long free_pages = zone_nr_free_pages(z) - (1 << order) + 1;
 	int o;
 
 	if (alloc_flags & ALLOC_HIGH)
@@ -1680,6 +1682,7 @@
 	struct page *page = NULL;
 	struct reclaim_state reclaim_state;
 	struct task_struct *p = current;
+	bool drained = false;
 
 	cond_resched();
 
@@ -1698,14 +1701,25 @@
 
 	cond_resched();
 
-	if (order != 0)
-		drain_all_pages();
+	if (unlikely(!(*did_some_progress)))
+		return NULL;
 
-	if (likely(*did_some_progress))
-		page = get_page_from_freelist(gfp_mask, nodemask, order,
+retry:
+	page = get_page_from_freelist(gfp_mask, nodemask, order,
 					zonelist, high_zoneidx,
 					alloc_flags, preferred_zone,
 					migratetype);
+
+	/*
+	 * If an allocation failed after direct reclaim, it could be because
+	 * pages are pinned on the per-cpu lists. Drain them and try again
+	 */
+	if (!page && !drained) {
+		drain_all_pages();
+		drained = true;
+		goto retry;
+	}
+
 	return page;
 }
 
@@ -1827,6 +1841,7 @@
 	 */
 	alloc_flags = gfp_to_alloc_flags(gfp_mask);
 
+rebalance:
 	/* This is the last chance, in general, before the goto nopage. */
 	page = get_page_from_freelist(gfp_mask, nodemask, order, zonelist,
 			high_zoneidx, alloc_flags & ~ALLOC_NO_WATERMARKS,
@@ -1834,7 +1849,6 @@
 	if (page)
 		goto got_pg;
 
-rebalance:
 	/* Allocate without watermarks if the context allows */
 	if (alloc_flags & ALLOC_NO_WATERMARKS) {
 		page = __alloc_pages_high_priority(gfp_mask, order,
@@ -2237,7 +2251,7 @@
 			" all_unreclaimable? %s"
 			"\n",
 			zone->name,
-			K(zone_page_state(zone, NR_FREE_PAGES)),
+			K(zone_nr_free_pages(zone)),
 			K(min_wmark_pages(zone)),
 			K(low_wmark_pages(zone)),
 			K(high_wmark_pages(zone)),
@@ -2858,6 +2872,20 @@
 #define LONG_ALIGN(x) (((x)+(sizeof(long))-1)&~((sizeof(long))-1))
 
 /*
+ * Check if a pageblock contains reserved pages
+ */
+static int pageblock_is_reserved(unsigned long start_pfn)
+{
+	unsigned long end_pfn = start_pfn + pageblock_nr_pages;
+	unsigned long pfn;
+
+	for (pfn = start_pfn; pfn < end_pfn; pfn++)
+		if (PageReserved(pfn_to_page(pfn)))
+			return 1;
+	return 0;
+}
+
+/*
  * Mark a number of pageblocks as MIGRATE_RESERVE. The number
  * of blocks reserved is based on min_wmark_pages(zone). The memory within
  * the reserve will tend to store contiguous free pages. Setting min_free_kbytes
@@ -2896,7 +2924,7 @@
 			continue;
 
 		/* Blocks with reserved pages will never free, skip them. */
-		if (PageReserved(page))
+		if (pageblock_is_reserved(pfn))
 			continue;
 
 		block_migratetype = get_pageblock_migratetype(page);
@@ -3221,6 +3249,7 @@
 	if (!slab_is_available()) {
 		zone->wait_table = (wait_queue_head_t *)
 			alloc_bootmem_node(pgdat, alloc_size);
+		printk("\n\n\n\n wait table %p\n", zone->wait_table);
 	} else {
 		/*
 		 * This case means that a zone whose size was 0 gets new memory
@@ -3718,7 +3747,7 @@
 {
 	unsigned long usemapsize = usemap_size(zonesize);
 	zone->pageblock_flags = NULL;
-	if (usemapsize)
+	if (usemapsize) 
 		zone->pageblock_flags = alloc_bootmem_node(pgdat, usemapsize);
 }
 #else
--- linux-mvl-dove-2.6.32.orig/mm/util.c
+++ linux-mvl-dove-2.6.32/mm/util.c
@@ -4,6 +4,10 @@
 #include <linux/module.h>
 #include <linux/err.h>
 #include <linux/sched.h>
+#include <linux/hugetlb.h>
+#include <linux/syscalls.h>
+#include <linux/mman.h>
+#include <linux/file.h>
 #include <asm/uaccess.h>
 
 #define CREATE_TRACE_POINTS
@@ -268,6 +272,46 @@
 }
 EXPORT_SYMBOL_GPL(get_user_pages_fast);
 
+SYSCALL_DEFINE6(mmap_pgoff, unsigned long, addr, unsigned long, len,
+		unsigned long, prot, unsigned long, flags,
+		unsigned long, fd, unsigned long, pgoff)
+{
+	struct file * file = NULL;
+	unsigned long retval = -EBADF;
+
+	if (!(flags & MAP_ANONYMOUS)) {
+		if (unlikely(flags & MAP_HUGETLB))
+			return -EINVAL;
+		file = fget(fd);
+		if (!file)
+			goto out;
+	} else if (flags & MAP_HUGETLB) {
+		struct user_struct *user = NULL;
+		/*
+		 * VM_NORESERVE is used because the reservations will be
+		 * taken when vm_ops->mmap() is called
+		 * A dummy user value is used because we are not locking
+		 * memory so no accounting is necessary
+		 */
+		len = ALIGN(len, huge_page_size(&default_hstate));
+		file = hugetlb_file_setup(HUGETLB_ANON_FILE, len, VM_NORESERVE,
+						&user, HUGETLB_ANONHUGE_INODE);
+		if (IS_ERR(file))
+			return PTR_ERR(file);
+	}
+
+	flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
+
+	down_write(&current->mm->mmap_sem);
+	retval = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
+	up_write(&current->mm->mmap_sem);
+
+	if (file)
+		fput(file);
+out:
+	return retval;
+}
+
 /* Tracepoints definitions. */
 EXPORT_TRACEPOINT_SYMBOL(kmalloc);
 EXPORT_TRACEPOINT_SYMBOL(kmem_cache_alloc);
--- linux-mvl-dove-2.6.32.orig/mm/backing-dev.c
+++ linux-mvl-dove-2.6.32/mm/backing-dev.c
@@ -98,15 +98,13 @@
 		   "b_more_io:        %8lu\n"
 		   "bdi_list:         %8u\n"
 		   "state:            %8lx\n"
-		   "wb_mask:          %8lx\n"
-		   "wb_list:          %8u\n"
-		   "wb_cnt:           %8u\n",
+		   "wb_list:          %8u\n",
 		   (unsigned long) K(bdi_stat(bdi, BDI_WRITEBACK)),
 		   (unsigned long) K(bdi_stat(bdi, BDI_RECLAIMABLE)),
 		   K(bdi_thresh), K(dirty_thresh),
 		   K(background_thresh), nr_wb, nr_dirty, nr_io, nr_more_io,
-		   !list_empty(&bdi->bdi_list), bdi->state, bdi->wb_mask,
-		   !list_empty(&bdi->wb_list), bdi->wb_cnt);
+		   !list_empty(&bdi->bdi_list), bdi->state,
+		   !list_empty(&bdi->wb_list));
 #undef K
 
 	return 0;
@@ -331,14 +329,13 @@
 static void bdi_flush_io(struct backing_dev_info *bdi)
 {
 	struct writeback_control wbc = {
-		.bdi			= bdi,
 		.sync_mode		= WB_SYNC_NONE,
 		.older_than_this	= NULL,
 		.range_cyclic		= 1,
 		.nr_to_write		= 1024,
 	};
 
-	writeback_inodes_wbc(&wbc);
+	writeback_inodes_wb(&bdi->wb, &wbc);
 }
 
 /*
@@ -660,12 +657,6 @@
 
 	bdi_wb_init(&bdi->wb, bdi);
 
-	/*
-	 * Just one thread support for now, hard code mask and count
-	 */
-	bdi->wb_mask = 1;
-	bdi->wb_cnt = 1;
-
 	for (i = 0; i < NR_BDI_STAT_ITEMS; i++) {
 		err = percpu_counter_init(&bdi->bdi_stat[i], 0);
 		if (err)
--- linux-mvl-dove-2.6.32.orig/mm/filemap.c
+++ linux-mvl-dove-2.6.32/mm/filemap.c
@@ -462,7 +462,7 @@
 	/*
 	 * Splice_read and readahead add shmem/tmpfs pages into the page cache
 	 * before shmem_readpage has a chance to mark them as SwapBacked: they
-	 * need to go on the active_anon lru below, and mem_cgroup_cache_charge
+	 * need to go on the anon lru below, and mem_cgroup_cache_charge
 	 * (called in add_to_page_cache) needs to know where they're going too.
 	 */
 	if (mapping_cap_swap_backed(mapping))
@@ -473,7 +473,7 @@
 		if (page_is_file_cache(page))
 			lru_cache_add_file(page);
 		else
-			lru_cache_add_active_anon(page);
+			lru_cache_add_anon(page);
 	}
 	return ret;
 }
@@ -1030,6 +1030,9 @@
 				goto page_not_up_to_date;
 			if (!trylock_page(page))
 				goto page_not_up_to_date;
+			/* Did it get truncated before we got the lock? */
+			if (!page->mapping)
+				goto page_not_up_to_date_locked;
 			if (!mapping->a_ops->is_partially_uptodate(page,
 								desc, offset))
 				goto page_not_up_to_date_locked;
@@ -1120,6 +1123,12 @@
 		}
 
 readpage:
+		/*
+		 * A previous I/O error may have been due to temporary
+		 * failures, eg. multipath errors.
+		 * PG_error will be set again if readpage fails.
+		 */
+		ClearPageError(page);
 		/* Start the actual read. The read will unlock the page. */
 		error = mapping->a_ops->readpage(filp, page);
 
@@ -1655,14 +1664,15 @@
 static struct page *__read_cache_page(struct address_space *mapping,
 				pgoff_t index,
 				int (*filler)(void *,struct page*),
-				void *data)
+				void *data,
+				gfp_t gfp)
 {
 	struct page *page;
 	int err;
 repeat:
 	page = find_get_page(mapping, index);
 	if (!page) {
-		page = page_cache_alloc_cold(mapping);
+		page = __page_cache_alloc(gfp | __GFP_COLD);
 		if (!page)
 			return ERR_PTR(-ENOMEM);
 		err = add_to_page_cache_lru(page, mapping, index, GFP_KERNEL);
@@ -1682,31 +1692,18 @@
 	return page;
 }
 
-/**
- * read_cache_page_async - read into page cache, fill it if needed
- * @mapping:	the page's address_space
- * @index:	the page index
- * @filler:	function to perform the read
- * @data:	destination for read data
- *
- * Same as read_cache_page, but don't wait for page to become unlocked
- * after submitting it to the filler.
- *
- * Read into the page cache. If a page already exists, and PageUptodate() is
- * not set, try to fill the page but don't wait for it to become unlocked.
- *
- * If the page does not get brought uptodate, return -EIO.
- */
-struct page *read_cache_page_async(struct address_space *mapping,
+static struct page *do_read_cache_page(struct address_space *mapping,
 				pgoff_t index,
 				int (*filler)(void *,struct page*),
-				void *data)
+				void *data,
+				gfp_t gfp)
+
 {
 	struct page *page;
 	int err;
 
 retry:
-	page = __read_cache_page(mapping, index, filler, data);
+	page = __read_cache_page(mapping, index, filler, data, gfp);
 	if (IS_ERR(page))
 		return page;
 	if (PageUptodate(page))
@@ -1731,8 +1728,67 @@
 	mark_page_accessed(page);
 	return page;
 }
+
+/**
+ * read_cache_page_async - read into page cache, fill it if needed
+ * @mapping:	the page's address_space
+ * @index:	the page index
+ * @filler:	function to perform the read
+ * @data:	destination for read data
+ *
+ * Same as read_cache_page, but don't wait for page to become unlocked
+ * after submitting it to the filler.
+ *
+ * Read into the page cache. If a page already exists, and PageUptodate() is
+ * not set, try to fill the page but don't wait for it to become unlocked.
+ *
+ * If the page does not get brought uptodate, return -EIO.
+ */
+struct page *read_cache_page_async(struct address_space *mapping,
+				pgoff_t index,
+				int (*filler)(void *,struct page*),
+				void *data)
+{
+	return do_read_cache_page(mapping, index, filler, data, mapping_gfp_mask(mapping));
+}
 EXPORT_SYMBOL(read_cache_page_async);
 
+static struct page *wait_on_page_read(struct page *page)
+{
+	if (!IS_ERR(page)) {
+		wait_on_page_locked(page);
+		if (!PageUptodate(page)) {
+			page_cache_release(page);
+			page = ERR_PTR(-EIO);
+		}
+	}
+	return page;
+}
+
+/**
+ * read_cache_page_gfp - read into page cache, using specified page allocation flags.
+ * @mapping:	the page's address_space
+ * @index:	the page index
+ * @gfp:	the page allocator flags to use if allocating
+ *
+ * This is the same as "read_mapping_page(mapping, index, NULL)", but with
+ * any new page allocations done using the specified allocation flags. Note
+ * that the Radix tree operations will still use GFP_KERNEL, so you can't
+ * expect to do this atomically or anything like that - but you can pass in
+ * other page requirements.
+ *
+ * If the page does not get brought uptodate, return -EIO.
+ */
+struct page *read_cache_page_gfp(struct address_space *mapping,
+				pgoff_t index,
+				gfp_t gfp)
+{
+	filler_t *filler = (filler_t *)mapping->a_ops->readpage;
+
+	return wait_on_page_read(do_read_cache_page(mapping, index, filler, NULL, gfp));
+}
+EXPORT_SYMBOL(read_cache_page_gfp);
+
 /**
  * read_cache_page - read into page cache, fill it if needed
  * @mapping:	the page's address_space
@@ -1750,18 +1806,7 @@
 				int (*filler)(void *,struct page*),
 				void *data)
 {
-	struct page *page;
-
-	page = read_cache_page_async(mapping, index, filler, data);
-	if (IS_ERR(page))
-		goto out;
-	wait_on_page_locked(page);
-	if (!PageUptodate(page)) {
-		page_cache_release(page);
-		page = ERR_PTR(-EIO);
-	}
- out:
-	return page;
+	return wait_on_page_read(read_cache_page_async(mapping, index, filler, data));
 }
 EXPORT_SYMBOL(read_cache_page);
 
@@ -2217,6 +2262,9 @@
 		if (unlikely(status))
 			break;
 
+		if (mapping_writably_mapped(mapping))
+			flush_dcache_page(page);
+
 		pagefault_disable();
 		copied = iov_iter_copy_from_user_atomic(page, i, offset, bytes);
 		pagefault_enable();
--- linux-mvl-dove-2.6.32.orig/mm/truncate.c
+++ linux-mvl-dove-2.6.32/mm/truncate.c
@@ -516,22 +516,20 @@
  */
 void truncate_pagecache(struct inode *inode, loff_t old, loff_t new)
 {
-	if (new < old) {
-		struct address_space *mapping = inode->i_mapping;
+	struct address_space *mapping = inode->i_mapping;
 
-		/*
-		 * unmap_mapping_range is called twice, first simply for
-		 * efficiency so that truncate_inode_pages does fewer
-		 * single-page unmaps.  However after this first call, and
-		 * before truncate_inode_pages finishes, it is possible for
-		 * private pages to be COWed, which remain after
-		 * truncate_inode_pages finishes, hence the second
-		 * unmap_mapping_range call must be made for correctness.
-		 */
-		unmap_mapping_range(mapping, new + PAGE_SIZE - 1, 0, 1);
-		truncate_inode_pages(mapping, new);
-		unmap_mapping_range(mapping, new + PAGE_SIZE - 1, 0, 1);
-	}
+	/*
+	 * unmap_mapping_range is called twice, first simply for
+	 * efficiency so that truncate_inode_pages does fewer
+	 * single-page unmaps.  However after this first call, and
+	 * before truncate_inode_pages finishes, it is possible for
+	 * private pages to be COWed, which remain after
+	 * truncate_inode_pages finishes, hence the second
+	 * unmap_mapping_range call must be made for correctness.
+	 */
+	unmap_mapping_range(mapping, new + PAGE_SIZE - 1, 0, 1);
+	truncate_inode_pages(mapping, new);
+	unmap_mapping_range(mapping, new + PAGE_SIZE - 1, 0, 1);
 }
 EXPORT_SYMBOL(truncate_pagecache);
 
--- linux-mvl-dove-2.6.32.orig/mm/mmap.c
+++ linux-mvl-dove-2.6.32/mm/mmap.c
@@ -29,6 +29,7 @@
 #include <linux/rmap.h>
 #include <linux/mmu_notifier.h>
 #include <linux/perf_event.h>
+#include <linux/random.h>
 
 #include <asm/uaccess.h>
 #include <asm/cacheflush.h>
@@ -45,6 +46,18 @@
 #define arch_rebalance_pgtables(addr, len)		(addr)
 #endif
 
+/* No sane architecture will #define these to anything else */
+#ifndef arch_add_exec_range
+#define arch_add_exec_range(mm, limit)	do { ; } while (0)
+#endif
+#ifndef arch_flush_exec_range
+#define arch_flush_exec_range(mm)	do { ; } while (0)
+#endif
+#ifndef arch_remove_exec_range
+#define arch_remove_exec_range(mm, limit)	do { ; } while (0)
+#endif
+
+
 static void unmap_region(struct mm_struct *mm,
 		struct vm_area_struct *vma, struct vm_area_struct *prev,
 		unsigned long start, unsigned long end);
@@ -389,17 +402,23 @@
 __vma_link_list(struct mm_struct *mm, struct vm_area_struct *vma,
 		struct vm_area_struct *prev, struct rb_node *rb_parent)
 {
-	if (prev) {
-		vma->vm_next = prev->vm_next;
-		prev->vm_next = vma;
-	} else {
-		mm->mmap = vma;
-		if (rb_parent)
-			vma->vm_next = rb_entry(rb_parent,
-					struct vm_area_struct, vm_rb);
-		else
-			vma->vm_next = NULL;
-	}
+	struct vm_area_struct *next;
+
+	vma->vm_prev = prev;
+ 	if (prev) {
+		next = prev->vm_next;
+ 		prev->vm_next = vma;
+ 	} else {
+ 		mm->mmap = vma;
+ 		if (rb_parent)
+			next = rb_entry(rb_parent,
+ 					struct vm_area_struct, vm_rb);
+ 		else
+			next = NULL;
+ 	}
+	vma->vm_next = next;
+	if (next)
+		next->vm_prev = vma;
 }
 
 void __vma_link_rb(struct mm_struct *mm, struct vm_area_struct *vma,
@@ -487,10 +506,16 @@
 __vma_unlink(struct mm_struct *mm, struct vm_area_struct *vma,
 		struct vm_area_struct *prev)
 {
-	prev->vm_next = vma->vm_next;
+	struct vm_area_struct *next = vma->vm_next;
+
+	prev->vm_next = next;
+	if (next)
+		next->vm_prev = prev;
 	rb_erase(&vma->vm_rb, &mm->mm_rb);
 	if (mm->mmap_cache == vma)
 		mm->mmap_cache = prev;
+	if (vma->vm_flags & VM_EXEC)
+		arch_remove_exec_range(mm, vma->vm_end);
 }
 
 /*
@@ -798,6 +823,8 @@
 		} else					/* cases 2, 5, 7 */
 			vma_adjust(prev, prev->vm_start,
 				end, prev->vm_pgoff, NULL);
+		if (prev->vm_flags & VM_EXEC)
+			arch_add_exec_range(mm, prev->vm_end);
 		return prev;
 	}
 
@@ -932,13 +959,9 @@
 	if (!(flags & MAP_FIXED))
 		addr = round_hint_to_min(addr);
 
-	error = arch_mmap_check(addr, len, flags);
-	if (error)
-		return error;
-
 	/* Careful about overflows.. */
 	len = PAGE_ALIGN(len);
-	if (!len || len > TASK_SIZE)
+	if (!len)
 		return -ENOMEM;
 
 	/* offset overflow? */
@@ -949,28 +972,11 @@
 	if (mm->map_count > sysctl_max_map_count)
 		return -ENOMEM;
 
-	if (flags & MAP_HUGETLB) {
-		struct user_struct *user = NULL;
-		if (file)
-			return -EINVAL;
-
-		/*
-		 * VM_NORESERVE is used because the reservations will be
-		 * taken when vm_ops->mmap() is called
-		 * A dummy user value is used because we are not locking
-		 * memory so no accounting is necessary
-		 */
-		len = ALIGN(len, huge_page_size(&default_hstate));
-		file = hugetlb_file_setup(HUGETLB_ANON_FILE, len, VM_NORESERVE,
-						&user, HUGETLB_ANONHUGE_INODE);
-		if (IS_ERR(file))
-			return PTR_ERR(file);
-	}
-
 	/* Obtain the address to map to. we verify (or select) it and ensure
 	 * that it represents a valid section of the address space.
 	 */
-	addr = get_unmapped_area(file, addr, len, pgoff, flags);
+	addr = get_unmapped_area_prot(file, addr, len, pgoff, flags,
+		prot & PROT_EXEC);
 	if (addr & ~PAGE_MASK)
 		return addr;
 
@@ -1453,13 +1459,23 @@
 }
 
 unsigned long
-get_unmapped_area(struct file *file, unsigned long addr, unsigned long len,
-		unsigned long pgoff, unsigned long flags)
+get_unmapped_area_prot(struct file *file, unsigned long addr, unsigned long len,
+		unsigned long pgoff, unsigned long flags, int exec)
 {
 	unsigned long (*get_area)(struct file *, unsigned long,
 				  unsigned long, unsigned long, unsigned long);
+	unsigned long error = arch_mmap_check(addr, len, flags);
+	if (error)
+		return error;
 
-	get_area = current->mm->get_unmapped_area;
+	/* Careful about overflows.. */
+	if (len > TASK_SIZE)
+		return -ENOMEM;
+
+	if (exec && current->mm->get_unmapped_exec_area)
+		get_area = current->mm->get_unmapped_exec_area;
+	else
+		get_area = current->mm->get_unmapped_area;
 	if (file && file->f_op && file->f_op->get_unmapped_area)
 		get_area = file->f_op->get_unmapped_area;
 	addr = get_area(file, addr, len, pgoff, flags);
@@ -1473,8 +1489,81 @@
 
 	return arch_rebalance_pgtables(addr, len);
 }
+EXPORT_SYMBOL(get_unmapped_area_prot);
+
+#define SHLIB_BASE	0x00110000
+
+unsigned long
+arch_get_unmapped_exec_area(struct file *filp, unsigned long addr0,
+		unsigned long len0, unsigned long pgoff, unsigned long flags)
+{
+	unsigned long addr = addr0, len = len0;
+	struct mm_struct *mm = current->mm;
+	struct vm_area_struct *vma;
+	unsigned long tmp;
+
+	if (len > TASK_SIZE)
+		return -ENOMEM;
+
+	if (flags & MAP_FIXED)
+		return addr;
+
+	if (!addr) {
+		addr = SHLIB_BASE;
+		if ((current->flags & PF_RANDOMIZE) && randomize_va_space)
+			addr = randomize_range(addr, 0x01000000, len);
+	}
+
+	if (addr) {
+		addr = PAGE_ALIGN(addr);
+		vma = find_vma(mm, addr);
+		if (TASK_SIZE - len >= addr &&
+		    (!vma || addr + len <= vma->vm_start))
+			return addr;
+	}
+
+	addr = SHLIB_BASE;
+	for (vma = find_vma(mm, addr); ; vma = vma->vm_next) {
+		/* At this point:  (!vma || addr < vma->vm_end). */
+		if (TASK_SIZE - len < addr)
+			return -ENOMEM;
+
+		if (!vma || addr + len <= vma->vm_start) {
+			/*
+			 * Must not let a PROT_EXEC mapping get into the
+			 * brk area:
+			 */
+			if (addr + len > mm->brk)
+				goto failed;
+
+			/*
+			 * Up until the brk area we randomize addresses
+			 * as much as possible:
+			 */
+			if ((current->flags & PF_RANDOMIZE) &&
+                            randomize_va_space &&
+                            addr >= 0x01000000) {
+				tmp = randomize_range(0x01000000,
+					PAGE_ALIGN(max(mm->start_brk,
+					(unsigned long)0x08000000)), len);
+				vma = find_vma(mm, tmp);
+				if (TASK_SIZE - len >= tmp &&
+				    (!vma || tmp + len <= vma->vm_start))
+					return tmp;
+			}
+			/*
+			 * Ok, randomization didnt work out - return
+			 * the result of the linear search:
+			 */
+			return addr;
+		}
+		addr = vma->vm_end;
+	}
+
+failed:
+	return current->mm->get_unmapped_area(filp, addr0, len0, pgoff, flags);
+}
 
-EXPORT_SYMBOL(get_unmapped_area);
 
 /* Look up the first VMA which satisfies  addr < vm_end,  NULL if none. */
 struct vm_area_struct *find_vma(struct mm_struct *mm, unsigned long addr)
@@ -1549,6 +1638,14 @@
 	return prev ? prev->vm_next : vma;
 }
 
+static int over_stack_limit(unsigned long sz)
+{
+	if (sz < EXEC_STACK_BIAS)
+		return 0;
+	return (sz - EXEC_STACK_BIAS) >
+			current->signal->rlim[RLIMIT_STACK].rlim_cur;
+}
+
 /*
  * Verify that the stack growth is acceptable and
  * update accounting. This is shared with both the
@@ -1565,7 +1662,7 @@
 		return -ENOMEM;
 
 	/* Stack limit test */
-	if (size > rlim[RLIMIT_STACK].rlim_cur)
+	if (over_stack_limit(size))
 		return -ENOMEM;
 
 	/* mlock limit tests */
@@ -1604,9 +1701,6 @@
  * PA-RISC uses this for its stack; IA64 for its Register Backing Store.
  * vma is the last one with address > vma->vm_end.  Have to extend vma.
  */
-#ifndef CONFIG_IA64
-static
-#endif
 int expand_upwards(struct vm_area_struct *vma, unsigned long address)
 {
 	int error;
@@ -1812,6 +1906,7 @@
 	unsigned long addr;
 
 	insertion_point = (prev ? &prev->vm_next : &mm->mmap);
+	vma->vm_prev = NULL;
 	do {
 		rb_erase(&vma->vm_rb, &mm->mm_rb);
 		mm->map_count--;
@@ -1819,6 +1914,8 @@
 		vma = vma->vm_next;
 	} while (vma && vma->vm_start < end);
 	*insertion_point = vma;
+	if (vma)
+		vma->vm_prev = prev;
 	tail_vma->vm_next = NULL;
 	if (mm->unmap_area == arch_unmap_area)
 		addr = prev ? prev->vm_end : mm->mmap_base;
@@ -1875,10 +1972,14 @@
 	if (new->vm_ops && new->vm_ops->open)
 		new->vm_ops->open(new);
 
-	if (new_below)
+	if (new_below) {
+		unsigned long old_end = vma->vm_end;
+
 		vma_adjust(vma, addr, vma->vm_end, vma->vm_pgoff +
 			((addr - new->vm_start) >> PAGE_SHIFT), new);
-	else
+		if (vma->vm_flags & VM_EXEC)
+			arch_remove_exec_range(mm, old_end);
+	} else
 		vma_adjust(vma, vma->vm_start, addr, vma->vm_pgoff, new);
 
 	return 0;
@@ -2003,20 +2104,14 @@
 	if (!len)
 		return addr;
 
-	if ((addr + len) > TASK_SIZE || (addr + len) < addr)
-		return -EINVAL;
-
-	if (is_hugepage_only_range(mm, addr, len))
-		return -EINVAL;
-
 	error = security_file_mmap(NULL, 0, 0, 0, addr, 1);
 	if (error)
 		return error;
 
 	flags = VM_DATA_DEFAULT_FLAGS | VM_ACCOUNT | mm->def_flags;
 
-	error = arch_mmap_check(addr, len, flags);
-	if (error)
+	error = get_unmapped_area(NULL, addr, len, 0, MAP_FIXED);
+	if (error & ~PAGE_MASK)
 		return error;
 
 	/*
@@ -2128,6 +2223,7 @@
 
 	free_pgtables(tlb, vma, FIRST_USER_ADDRESS, 0);
 	tlb_finish_mmu(tlb, 0, end);
+	arch_flush_exec_range(mm);
 
 	/*
 	 * Walk the list again, actually closing and freeing it,
@@ -2300,6 +2396,7 @@
 			    unsigned long addr, unsigned long len,
 			    unsigned long vm_flags, struct page **pages)
 {
+	int ret;
 	struct vm_area_struct *vma;
 
 	vma = kmem_cache_zalloc(vm_area_cachep, GFP_KERNEL);
@@ -2316,16 +2413,23 @@
 	vma->vm_ops = &special_mapping_vmops;
 	vma->vm_private_data = pages;
 
-	if (unlikely(insert_vm_struct(mm, vma))) {
-		kmem_cache_free(vm_area_cachep, vma);
-		return -ENOMEM;
-	}
+	ret = security_file_mmap(NULL, 0, 0, 0, vma->vm_start, 1);
+	if (ret)
+		goto out;
+
+	ret = insert_vm_struct(mm, vma);
+	if (ret)
+		goto out;
 
 	mm->total_vm += len >> PAGE_SHIFT;
 
 	perf_event_mmap(vma);
 
 	return 0;
+
+out:
+	kmem_cache_free(vm_area_cachep, vma);
+	return ret;
 }
 
 static DEFINE_MUTEX(mm_all_locks_mutex);
--- linux-mvl-dove-2.6.32.orig/mm/memory_hotplug.c
+++ linux-mvl-dove-2.6.32/mm/memory_hotplug.c
@@ -551,19 +551,19 @@
 /* Return the start of the next active pageblock after a given page */
 static struct page *next_active_pageblock(struct page *page)
 {
-	int pageblocks_stride;
-
 	/* Ensure the starting page is pageblock-aligned */
 	BUG_ON(page_to_pfn(page) & (pageblock_nr_pages - 1));
 
-	/* Move forward by at least 1 * pageblock_nr_pages */
-	pageblocks_stride = 1;
-
 	/* If the entire pageblock is free, move to the end of free page */
-	if (pageblock_free(page))
-		pageblocks_stride += page_order(page) - pageblock_order;
+	if (pageblock_free(page)) {
+		int order;
+		/* be careful. we don't have locks, page_order can be changed.*/
+		order = page_order(page);
+		if ((order < MAX_ORDER) && (order >= pageblock_order))
+			return page + (1 << order);
+	}
 
-	return page + (pageblocks_stride * pageblock_nr_pages);
+	return page + pageblock_nr_pages;
 }
 
 /* Checks if this range of memory is likely to be hot-removable. */
@@ -626,7 +626,7 @@
  * Scanning pfn is much easier than scanning lru list.
  * Scan pfn from start to end and Find LRU page.
  */
-int scan_lru_pages(unsigned long start, unsigned long end)
+unsigned long scan_lru_pages(unsigned long start, unsigned long end)
 {
 	unsigned long pfn;
 	struct page *page;
--- linux-mvl-dove-2.6.32.orig/mm/mremap.c
+++ linux-mvl-dove-2.6.32/mm/mremap.c
@@ -92,9 +92,7 @@
 		 */
 		mapping = vma->vm_file->f_mapping;
 		spin_lock(&mapping->i_mmap_lock);
-		if (new_vma->vm_truncate_count &&
-		    new_vma->vm_truncate_count != vma->vm_truncate_count)
-			new_vma->vm_truncate_count = 0;
+		new_vma->vm_truncate_count = 0;
 	}
 
 	/*
@@ -261,6 +259,144 @@
 	return new_addr;
 }
 
+static struct vm_area_struct *vma_to_resize(unsigned long addr,
+	unsigned long old_len, unsigned long new_len, unsigned long *p)
+{
+	struct mm_struct *mm = current->mm;
+	struct vm_area_struct *vma = find_vma(mm, addr);
+
+	if (!vma || vma->vm_start > addr)
+		goto Efault;
+
+	if (is_vm_hugetlb_page(vma))
+		goto Einval;
+
+	/* We can't remap across vm area boundaries */
+	if (old_len > vma->vm_end - addr)
+		goto Efault;
+
+	/* Need to be careful about a growing mapping */
+	if (new_len > old_len) {
+		unsigned long pgoff;
+
+		if (vma->vm_flags & (VM_DONTEXPAND | VM_PFNMAP))
+			goto Efault;
+		pgoff = (addr - vma->vm_start) >> PAGE_SHIFT;
+		pgoff += vma->vm_pgoff;
+		if (pgoff + (new_len >> PAGE_SHIFT) < pgoff)
+			goto Einval;
+	}
+
+	if (vma->vm_flags & VM_LOCKED) {
+		unsigned long locked, lock_limit;
+		locked = mm->locked_vm << PAGE_SHIFT;
+		lock_limit = current->signal->rlim[RLIMIT_MEMLOCK].rlim_cur;
+		locked += new_len - old_len;
+		if (locked > lock_limit && !capable(CAP_IPC_LOCK))
+			goto Eagain;
+	}
+
+	if (!may_expand_vm(mm, (new_len - old_len) >> PAGE_SHIFT))
+		goto Enomem;
+
+	if (vma->vm_flags & VM_ACCOUNT) {
+		unsigned long charged = (new_len - old_len) >> PAGE_SHIFT;
+		if (security_vm_enough_memory(charged))
+			goto Efault;
+		*p = charged;
+	}
+
+	return vma;
+
+Efault:	/* very odd choice for most of the cases, but... */
+	return ERR_PTR(-EFAULT);
+Einval:
+	return ERR_PTR(-EINVAL);
+Enomem:
+	return ERR_PTR(-ENOMEM);
+Eagain:
+	return ERR_PTR(-EAGAIN);
+}
+
+static unsigned long mremap_to(unsigned long addr,
+	unsigned long old_len, unsigned long new_addr,
+	unsigned long new_len)
+{
+	struct mm_struct *mm = current->mm;
+	struct vm_area_struct *vma;
+	unsigned long ret = -EINVAL;
+	unsigned long charged = 0;
+	unsigned long map_flags;
+
+	if (new_addr & ~PAGE_MASK)
+		goto out;
+
+	if (new_len > TASK_SIZE || new_addr > TASK_SIZE - new_len)
+		goto out;
+
+	/* Check if the location we're moving into overlaps the
+	 * old location at all, and fail if it does.
+	 */
+	if ((new_addr <= addr) && (new_addr+new_len) > addr)
+		goto out;
+
+	if ((addr <= new_addr) && (addr+old_len) > new_addr)
+		goto out;
+
+	ret = security_file_mmap(NULL, 0, 0, 0, new_addr, 1);
+	if (ret)
+		goto out;
+
+	ret = do_munmap(mm, new_addr, new_len);
+	if (ret)
+		goto out;
+
+	if (old_len >= new_len) {
+		ret = do_munmap(mm, addr+new_len, old_len - new_len);
+		if (ret && old_len != new_len)
+			goto out;
+		old_len = new_len;
+	}
+
+	vma = vma_to_resize(addr, old_len, new_len, &charged);
+	if (IS_ERR(vma)) {
+		ret = PTR_ERR(vma);
+		goto out;
+	}
+
+	map_flags = MAP_FIXED;
+	if (vma->vm_flags & VM_MAYSHARE)
+		map_flags |= MAP_SHARED;
+
+	ret = get_unmapped_area(vma->vm_file, new_addr, new_len, vma->vm_pgoff +
+				((addr - vma->vm_start) >> PAGE_SHIFT),
+				map_flags);
+	if (ret & ~PAGE_MASK)
+		goto out1;
+
+	ret = move_vma(vma, addr, old_len, new_len, new_addr);
+	if (!(ret & ~PAGE_MASK))
+		goto out;
+out1:
+	vm_unacct_memory(charged);
+
+out:
+	return ret;
+}
+
+static int vma_expandable(struct vm_area_struct *vma, unsigned long delta)
+{
+	unsigned long end = vma->vm_end + delta;
+	if (end < vma->vm_end) /* overflow */
+		return 0;
+	if (vma->vm_next && vma->vm_next->vm_start < end) /* intersection */
+		return 0;
+	if (get_unmapped_area(NULL, vma->vm_start, end - vma->vm_start,
+			      0, MAP_FIXED) & ~PAGE_MASK)
+		return 0;
+	return 1;
+}
+
 /*
  * Expand (or shrink) an existing mapping, potentially moving it at the
  * same time (controlled by the MREMAP_MAYMOVE flag and available VM space)
@@ -294,32 +430,10 @@
 	if (!new_len)
 		goto out;
 
-	/* new_addr is only valid if MREMAP_FIXED is specified */
 	if (flags & MREMAP_FIXED) {
-		if (new_addr & ~PAGE_MASK)
-			goto out;
-		if (!(flags & MREMAP_MAYMOVE))
-			goto out;
-
-		if (new_len > TASK_SIZE || new_addr > TASK_SIZE - new_len)
-			goto out;
-
-		/* Check if the location we're moving into overlaps the
-		 * old location at all, and fail if it does.
-		 */
-		if ((new_addr <= addr) && (new_addr+new_len) > addr)
-			goto out;
-
-		if ((addr <= new_addr) && (addr+old_len) > new_addr)
-			goto out;
-
-		ret = security_file_mmap(NULL, 0, 0, 0, new_addr, 1);
-		if (ret)
-			goto out;
-
-		ret = do_munmap(mm, new_addr, new_len);
-		if (ret)
-			goto out;
+		if (flags & MREMAP_MAYMOVE)
+			ret = mremap_to(addr, old_len, new_addr, new_len);
+		goto out;
 	}
 
 	/*
@@ -332,60 +446,23 @@
 		if (ret && old_len != new_len)
 			goto out;
 		ret = addr;
-		if (!(flags & MREMAP_FIXED) || (new_addr == addr))
-			goto out;
-		old_len = new_len;
+		goto out;
 	}
 
 	/*
-	 * Ok, we need to grow..  or relocate.
+	 * Ok, we need to grow..
 	 */
-	ret = -EFAULT;
-	vma = find_vma(mm, addr);
-	if (!vma || vma->vm_start > addr)
-		goto out;
-	if (is_vm_hugetlb_page(vma)) {
-		ret = -EINVAL;
-		goto out;
-	}
-	/* We can't remap across vm area boundaries */
-	if (old_len > vma->vm_end - addr)
+	vma = vma_to_resize(addr, old_len, new_len, &charged);
+	if (IS_ERR(vma)) {
+		ret = PTR_ERR(vma);
 		goto out;
-	if (vma->vm_flags & (VM_DONTEXPAND | VM_PFNMAP)) {
-		if (new_len > old_len)
-			goto out;
-	}
-	if (vma->vm_flags & VM_LOCKED) {
-		unsigned long locked, lock_limit;
-		locked = mm->locked_vm << PAGE_SHIFT;
-		lock_limit = current->signal->rlim[RLIMIT_MEMLOCK].rlim_cur;
-		locked += new_len - old_len;
-		ret = -EAGAIN;
-		if (locked > lock_limit && !capable(CAP_IPC_LOCK))
-			goto out;
-	}
-	if (!may_expand_vm(mm, (new_len - old_len) >> PAGE_SHIFT)) {
-		ret = -ENOMEM;
-		goto out;
-	}
-
-	if (vma->vm_flags & VM_ACCOUNT) {
-		charged = (new_len - old_len) >> PAGE_SHIFT;
-		if (security_vm_enough_memory(charged))
-			goto out_nc;
 	}
 
 	/* old_len exactly to the end of the area..
-	 * And we're not relocating the area.
 	 */
-	if (old_len == vma->vm_end - addr &&
-	    !((flags & MREMAP_FIXED) && (addr != new_addr)) &&
-	    (old_len != new_len || !(flags & MREMAP_MAYMOVE))) {
-		unsigned long max_addr = TASK_SIZE;
-		if (vma->vm_next)
-			max_addr = vma->vm_next->vm_start;
+	if (old_len == vma->vm_end - addr) {
 		/* can we just expand the current mapping? */
-		if (max_addr - addr >= new_len) {
+		if (vma_expandable(vma, new_len - old_len)) {
 			int pages = (new_len - old_len) >> PAGE_SHIFT;
 
 			vma_adjust(vma, vma->vm_start,
@@ -409,28 +486,27 @@
 	 */
 	ret = -ENOMEM;
 	if (flags & MREMAP_MAYMOVE) {
-		if (!(flags & MREMAP_FIXED)) {
-			unsigned long map_flags = 0;
-			if (vma->vm_flags & VM_MAYSHARE)
-				map_flags |= MAP_SHARED;
-
-			new_addr = get_unmapped_area(vma->vm_file, 0, new_len,
-						vma->vm_pgoff, map_flags);
-			if (new_addr & ~PAGE_MASK) {
-				ret = new_addr;
-				goto out;
-			}
-
-			ret = security_file_mmap(NULL, 0, 0, 0, new_addr, 1);
-			if (ret)
-				goto out;
+		unsigned long map_flags = 0;
+		if (vma->vm_flags & VM_MAYSHARE)
+			map_flags |= MAP_SHARED;
+
+		new_addr = get_unmapped_area_prot(vma->vm_file, 0, new_len,
+					vma->vm_pgoff +
+					((addr - vma->vm_start) >> PAGE_SHIFT),
+					map_flags, vma->vm_flags & VM_EXEC);
+		if (new_addr & ~PAGE_MASK) {
+			ret = new_addr;
+			goto out;
 		}
+
+		ret = security_file_mmap(NULL, 0, 0, 0, new_addr, 1);
+		if (ret)
+			goto out;
 		ret = move_vma(vma, addr, old_len, new_len, new_addr);
 	}
 out:
 	if (ret & ~PAGE_MASK)
 		vm_unacct_memory(charged);
-out_nc:
 	return ret;
 }
 
--- linux-mvl-dove-2.6.32.orig/mm/vmscan.c
+++ linux-mvl-dove-2.6.32/mm/vmscan.c
@@ -1083,6 +1083,48 @@
 }
 
 /*
+ * Returns true if the caller should wait to clean dirty/writeback pages.
+ *
+ * If we are direct reclaiming for contiguous pages and we do not reclaim
+ * everything in the list, try again and wait for writeback IO to complete.
+ * This will stall high-order allocations noticeably. Only do that when really
+ * need to free the pages under high memory pressure.
+ */
+static inline bool should_reclaim_stall(unsigned long nr_taken,
+					unsigned long nr_freed,
+					int priority,
+					int lumpy_reclaim,
+					struct scan_control *sc)
+{
+	int lumpy_stall_priority;
+
+	/* kswapd should not stall on sync IO */
+	if (current_is_kswapd())
+		return false;
+
+	/* Only stall on lumpy reclaim */
+	if (!lumpy_reclaim)
+		return false;
+
+	/* If we have relaimed everything on the isolated list, no stall */
+	if (nr_freed == nr_taken)
+		return false;
+
+	/*
+	 * For high-order allocations, there are two stall thresholds.
+	 * High-cost allocations stall immediately where as lower
+	 * order allocations such as stacks require the scanning
+	 * priority to be much higher before stalling.
+	 */
+	if (sc->order > PAGE_ALLOC_COSTLY_ORDER)
+		lumpy_stall_priority = DEF_PRIORITY;
+	else
+		lumpy_stall_priority = DEF_PRIORITY / 3;
+
+	return priority <= lumpy_stall_priority;
+}
+
+/*
  * shrink_inactive_list() is a helper for shrink_zone().  It returns the number
  * of reclaimed pages
  */
@@ -1176,14 +1218,9 @@
 		nr_scanned += nr_scan;
 		nr_freed = shrink_page_list(&page_list, sc, PAGEOUT_IO_ASYNC);
 
-		/*
-		 * If we are direct reclaiming for contiguous pages and we do
-		 * not reclaim everything in the list, try again and wait
-		 * for IO to complete. This will stall high-order allocations
-		 * but that should be acceptable to the caller
-		 */
-		if (nr_freed < nr_taken && !current_is_kswapd() &&
-		    lumpy_reclaim) {
+		/* Check if we should syncronously wait for writeback */
+		if (should_reclaim_stall(nr_taken, nr_freed, priority,
+					lumpy_reclaim, sc)) {
 			congestion_wait(BLK_RW_ASYNC, HZ/10);
 
 			/*
@@ -1464,20 +1501,26 @@
 	return low;
 }
 
+static int inactive_list_is_low(struct zone *zone, struct scan_control *sc,
+				int file)
+{
+	if (file)
+		return inactive_file_is_low(zone, sc);
+	else
+		return inactive_anon_is_low(zone, sc);
+}
+
 static unsigned long shrink_list(enum lru_list lru, unsigned long nr_to_scan,
 	struct zone *zone, struct scan_control *sc, int priority)
 {
 	int file = is_file_lru(lru);
 
-	if (lru == LRU_ACTIVE_FILE && inactive_file_is_low(zone, sc)) {
-		shrink_active_list(nr_to_scan, zone, sc, priority, file);
+	if (is_active_lru(lru)) {
+		if (inactive_list_is_low(zone, sc, file))
+		    shrink_active_list(nr_to_scan, zone, sc, priority, file);
 		return 0;
 	}
 
-	if (lru == LRU_ACTIVE_ANON && inactive_anon_is_low(zone, sc)) {
-		shrink_active_list(nr_to_scan, zone, sc, priority, file);
-		return 0;
-	}
 	return shrink_inactive_list(nr_to_scan, zone, sc, priority, file);
 }
 
--- linux-mvl-dove-2.6.32.orig/mm/mmzone.c
+++ linux-mvl-dove-2.6.32/mm/mmzone.c
@@ -87,3 +87,24 @@
 	return 1;
 }
 #endif /* CONFIG_ARCH_HAS_HOLES_MEMORYMODEL */
+
+#ifdef CONFIG_SMP
+/* Called when a more accurate view of NR_FREE_PAGES is needed */
+unsigned long zone_nr_free_pages(struct zone *zone)
+{
+	unsigned long nr_free_pages = zone_page_state(zone, NR_FREE_PAGES);
+
+	/*
+	 * While kswapd is awake, it is considered the zone is under some
+	 * memory pressure. Under pressure, there is a risk that
+	 * per-cpu-counter-drift will allow the min watermark to be breached
+	 * potentially causing a live-lock. While kswapd is awake and
+	 * free pages are low, get a better estimate for free pages
+	 */
+	if (nr_free_pages < zone->percpu_drift_mark &&
+			!waitqueue_active(&zone->zone_pgdat->kswapd_wait))
+		return zone_page_state_snapshot(zone, NR_FREE_PAGES);
+
+	return nr_free_pages;
+}
+#endif /* CONFIG_SMP */
--- linux-mvl-dove-2.6.32.orig/kernel/kgdb.c
+++ linux-mvl-dove-2.6.32/kernel/kgdb.c
@@ -1001,10 +1001,8 @@
 	switch (remcom_in_buffer[1]) {
 	case 's':
 	case 'f':
-		if (memcmp(remcom_in_buffer + 2, "ThreadInfo", 10)) {
-			error_packet(remcom_out_buffer, -EINVAL);
+		if (memcmp(remcom_in_buffer + 2, "ThreadInfo", 10))
 			break;
-		}
 
 		i = 0;
 		remcom_out_buffer[0] = 'm';
@@ -1045,10 +1043,9 @@
 		pack_threadid(remcom_out_buffer + 2, thref);
 		break;
 	case 'T':
-		if (memcmp(remcom_in_buffer + 1, "ThreadExtraInfo,", 16)) {
-			error_packet(remcom_out_buffer, -EINVAL);
+		if (memcmp(remcom_in_buffer + 1, "ThreadExtraInfo,", 16))
 			break;
-		}
+
 		ks->threadid = 0;
 		ptr = remcom_in_buffer + 17;
 		kgdb_hex2long(&ptr, &ks->threadid);
--- linux-mvl-dove-2.6.32.orig/kernel/lockdep.c
+++ linux-mvl-dove-2.6.32/kernel/lockdep.c
@@ -3243,7 +3243,7 @@
 	int ret = 0;
 
 	if (unlikely(current->lockdep_recursion))
-		return ret;
+		return 1; /* avoid false negative lockdep_assert_held() */
 
 	raw_local_irq_save(flags);
 	check_flags(flags);
--- linux-mvl-dove-2.6.32.orig/kernel/sysctl_check.c
+++ linux-mvl-dove-2.6.32/kernel/sysctl_check.c
@@ -220,6 +220,7 @@
 	{ NET_IPV4_CONF_PROMOTE_SECONDARIES,	"promote_secondaries" },
 	{ NET_IPV4_CONF_ARP_ACCEPT,		"arp_accept" },
 	{ NET_IPV4_CONF_ARP_NOTIFY,		"arp_notify" },
+	{ NET_IPV4_CONF_SRC_VMARK,		"src_valid_mark" },
 	{}
 };
 
--- linux-mvl-dove-2.6.32.orig/kernel/module.c
+++ linux-mvl-dove-2.6.32/kernel/module.c
@@ -870,7 +870,6 @@
 	mutex_lock(&module_mutex);
 	/* Store the name of the last unloaded module for diagnostic purposes */
 	strlcpy(last_unloaded_module, mod->name, sizeof(last_unloaded_module));
-	ddebug_remove_module(mod->name);
 	free_module(mod);
 
  out:
@@ -1030,11 +1029,23 @@
 }
 
 #ifdef CONFIG_MODVERSIONS
+/* If the arch applies (non-zero) relocations to kernel kcrctab, unapply it. */
+static unsigned long maybe_relocated(unsigned long crc,
+				     const struct module *crc_owner)
+{
+#ifdef ARCH_RELOCATES_KCRCTAB
+	if (crc_owner == NULL)
+		return crc - (unsigned long)reloc_start;
+#endif
+	return crc;
+}
+
 static int check_version(Elf_Shdr *sechdrs,
 			 unsigned int versindex,
 			 const char *symname,
 			 struct module *mod, 
-			 const unsigned long *crc)
+			 const unsigned long *crc,
+			 const struct module *crc_owner)
 {
 	unsigned int i, num_versions;
 	struct modversion_info *versions;
@@ -1055,10 +1066,10 @@
 		if (strcmp(versions[i].name, symname) != 0)
 			continue;
 
-		if (versions[i].crc == *crc)
+		if (versions[i].crc == maybe_relocated(*crc, crc_owner))
 			return 1;
 		DEBUGP("Found checksum %lX vs module %lX\n",
-		       *crc, versions[i].crc);
+		       maybe_relocated(*crc, crc_owner), versions[i].crc);
 		goto bad_version;
 	}
 
@@ -1081,7 +1092,8 @@
 	if (!find_symbol(MODULE_SYMBOL_PREFIX "module_layout", NULL,
 			 &crc, true, false))
 		BUG();
-	return check_version(sechdrs, versindex, "module_layout", mod, crc);
+	return check_version(sechdrs, versindex, "module_layout", mod, crc,
+			     NULL);
 }
 
 /* First part is kernel version, which we ignore if module has crcs. */
@@ -1099,7 +1111,8 @@
 				unsigned int versindex,
 				const char *symname,
 				struct module *mod, 
-				const unsigned long *crc)
+				const unsigned long *crc,
+				const struct module *crc_owner)
 {
 	return 1;
 }
@@ -1134,8 +1147,8 @@
 	/* use_module can fail due to OOM,
 	   or module initialization or unloading */
 	if (sym) {
-		if (!check_version(sechdrs, versindex, name, mod, crc) ||
-		    !use_module(mod, owner))
+		if (!check_version(sechdrs, versindex, name, mod, crc, owner)
+		    || !use_module(mod, owner))
 			sym = NULL;
 	}
 	return sym;
@@ -1146,6 +1159,12 @@
  * J. Corbet <corbet@lwn.net>
  */
 #if defined(CONFIG_KALLSYMS) && defined(CONFIG_SYSFS)
+
+static inline bool sect_empty(const Elf_Shdr *sect)
+{
+	return !(sect->sh_flags & SHF_ALLOC) || sect->sh_size == 0;
+}
+
 struct module_sect_attr
 {
 	struct module_attribute mattr;
@@ -1187,8 +1206,7 @@
 
 	/* Count loaded sections and allocate structures */
 	for (i = 0; i < nsect; i++)
-		if (sechdrs[i].sh_flags & SHF_ALLOC
-		    && sechdrs[i].sh_size)
+		if (!sect_empty(&sechdrs[i]))
 			nloaded++;
 	size[0] = ALIGN(sizeof(*sect_attrs)
 			+ nloaded * sizeof(sect_attrs->attrs[0]),
@@ -1206,9 +1224,7 @@
 	sattr = &sect_attrs->attrs[0];
 	gattr = &sect_attrs->grp.attrs[0];
 	for (i = 0; i < nsect; i++) {
-		if (! (sechdrs[i].sh_flags & SHF_ALLOC))
-			continue;
-		if (!sechdrs[i].sh_size)
+		if (sect_empty(&sechdrs[i]))
 			continue;
 		sattr->address = sechdrs[i].sh_addr;
 		sattr->name = kstrdup(secstrings + sechdrs[i].sh_name,
@@ -1292,7 +1308,7 @@
 	/* Count notes sections and allocate structures.  */
 	notes = 0;
 	for (i = 0; i < nsect; i++)
-		if ((sechdrs[i].sh_flags & SHF_ALLOC) &&
+		if (!sect_empty(&sechdrs[i]) &&
 		    (sechdrs[i].sh_type == SHT_NOTE))
 			++notes;
 
@@ -1308,7 +1324,7 @@
 	notes_attrs->notes = notes;
 	nattr = &notes_attrs->attrs[0];
 	for (loaded = i = 0; i < nsect; ++i) {
-		if (!(sechdrs[i].sh_flags & SHF_ALLOC))
+		if (sect_empty(&sechdrs[i]))
 			continue;
 		if (sechdrs[i].sh_type == SHT_NOTE) {
 			nattr->attr.name = mod->sect_attrs->attrs[loaded].name;
@@ -1516,6 +1532,9 @@
 	remove_sect_attrs(mod);
 	mod_kobject_remove(mod);
 
+	/* Remove dynamic debug info */
+	ddebug_remove_module(mod->name);
+
 	/* Arch-specific cleanup. */
 	module_arch_cleanup(mod);
 
--- linux-mvl-dove-2.6.32.orig/kernel/softirq.c
+++ linux-mvl-dove-2.6.32/kernel/softirq.c
@@ -77,11 +77,21 @@
 }
 
 /*
+ * preempt_count and SOFTIRQ_OFFSET usage:
+ * - preempt_count is changed by SOFTIRQ_OFFSET on entering or leaving
+ *   softirq processing.
+ * - preempt_count is changed by SOFTIRQ_DISABLE_OFFSET (= 2 * SOFTIRQ_OFFSET)
+ *   on local_bh_disable or local_bh_enable.
+ * This lets us distinguish between whether we are currently processing
+ * softirq and whether we just have bh disabled.
+ */
+
+/*
  * This one is for softirq.c-internal use,
  * where hardirqs are disabled legitimately:
  */
 #ifdef CONFIG_TRACE_IRQFLAGS
-static void __local_bh_disable(unsigned long ip)
+static void __local_bh_disable(unsigned long ip, unsigned int cnt)
 {
 	unsigned long flags;
 
@@ -95,32 +105,43 @@
 	 * We must manually increment preempt_count here and manually
 	 * call the trace_preempt_off later.
 	 */
-	preempt_count() += SOFTIRQ_OFFSET;
+	preempt_count() += cnt;
 	/*
 	 * Were softirqs turned off above:
 	 */
-	if (softirq_count() == SOFTIRQ_OFFSET)
+	if (softirq_count() == cnt)
 		trace_softirqs_off(ip);
 	raw_local_irq_restore(flags);
 
-	if (preempt_count() == SOFTIRQ_OFFSET)
+	if (preempt_count() == cnt)
 		trace_preempt_off(CALLER_ADDR0, get_parent_ip(CALLER_ADDR1));
 }
 #else /* !CONFIG_TRACE_IRQFLAGS */
-static inline void __local_bh_disable(unsigned long ip)
+static inline void __local_bh_disable(unsigned long ip, unsigned int cnt)
 {
-	add_preempt_count(SOFTIRQ_OFFSET);
+	add_preempt_count(cnt);
 	barrier();
 }
 #endif /* CONFIG_TRACE_IRQFLAGS */
 
 void local_bh_disable(void)
 {
-	__local_bh_disable((unsigned long)__builtin_return_address(0));
+	__local_bh_disable((unsigned long)__builtin_return_address(0),
+				SOFTIRQ_DISABLE_OFFSET);
 }
 
 EXPORT_SYMBOL(local_bh_disable);
 
+static void __local_bh_enable(unsigned int cnt)
+{
+	WARN_ON_ONCE(in_irq());
+	WARN_ON_ONCE(!irqs_disabled());
+
+	if (softirq_count() == cnt)
+		trace_softirqs_on((unsigned long)__builtin_return_address(0));
+	sub_preempt_count(cnt);
+}
+
 /*
  * Special-case - softirqs can safely be enabled in
  * cond_resched_softirq(), or by __do_softirq(),
@@ -128,12 +149,7 @@
  */
 void _local_bh_enable(void)
 {
-	WARN_ON_ONCE(in_irq());
-	WARN_ON_ONCE(!irqs_disabled());
-
-	if (softirq_count() == SOFTIRQ_OFFSET)
-		trace_softirqs_on((unsigned long)__builtin_return_address(0));
-	sub_preempt_count(SOFTIRQ_OFFSET);
+	__local_bh_enable(SOFTIRQ_DISABLE_OFFSET);
 }
 
 EXPORT_SYMBOL(_local_bh_enable);
@@ -147,13 +163,13 @@
 	/*
 	 * Are softirqs going to be turned on now:
 	 */
-	if (softirq_count() == SOFTIRQ_OFFSET)
+	if (softirq_count() == SOFTIRQ_DISABLE_OFFSET)
 		trace_softirqs_on(ip);
 	/*
 	 * Keep preemption disabled until we are done with
 	 * softirq processing:
  	 */
- 	sub_preempt_count(SOFTIRQ_OFFSET - 1);
+	sub_preempt_count(SOFTIRQ_DISABLE_OFFSET - 1);
 
 	if (unlikely(!in_interrupt() && local_softirq_pending()))
 		do_softirq();
@@ -198,7 +214,8 @@
 	pending = local_softirq_pending();
 	account_system_vtime(current);
 
-	__local_bh_disable((unsigned long)__builtin_return_address(0));
+	__local_bh_disable((unsigned long)__builtin_return_address(0),
+				SOFTIRQ_OFFSET);
 	lockdep_softirq_enter();
 
 	cpu = smp_processor_id();
@@ -245,7 +262,7 @@
 	lockdep_softirq_exit();
 
 	account_system_vtime(current);
-	_local_bh_enable();
+	__local_bh_enable(SOFTIRQ_OFFSET);
 }
 
 #ifndef __ARCH_HAS_DO_SOFTIRQ
@@ -279,10 +296,16 @@
 
 	rcu_irq_enter();
 	if (idle_cpu(cpu) && !in_interrupt()) {
-		__irq_enter();
+		/*
+		 * Prevent raise_softirq from needlessly waking up ksoftirqd
+		 * here, as softirq will be serviced on return from interrupt.
+		 */
+		local_bh_disable();
 		tick_check_idle(cpu);
-	} else
-		__irq_enter();
+		_local_bh_enable();
+	}
+
+	__irq_enter();
 }
 
 #ifdef __ARCH_IRQ_EXIT_IRQS_DISABLED
@@ -701,6 +724,7 @@
 {
 	set_current_state(TASK_INTERRUPTIBLE);
 
+	current->flags |= PF_KSOFTIRQD;
 	while (!kthread_should_stop()) {
 		preempt_disable();
 		if (!local_softirq_pending()) {
--- linux-mvl-dove-2.6.32.orig/kernel/cred.c
+++ linux-mvl-dove-2.6.32/kernel/cred.c
@@ -16,7 +16,6 @@
 #include <linux/init_task.h>
 #include <linux/security.h>
 #include <linux/cn_proc.h>
-#include "cred-internals.h"
 
 #if 0
 #define kdebug(FMT, ...) \
@@ -209,6 +208,31 @@
 	}
 }
 
+/**
+ * get_task_cred - Get another task's objective credentials
+ * @task: The task to query
+ *
+ * Get the objective credentials of a task, pinning them so that they can't go
+ * away.  Accessing a task's credentials directly is not permitted.
+ *
+ * The caller must also make sure task doesn't get deleted, either by holding a
+ * ref on task or by holding tasklist_lock to prevent it from being unlinked.
+ */
+const struct cred *get_task_cred(struct task_struct *task)
+{
+	const struct cred *cred;
+
+	rcu_read_lock();
+
+	do {
+		cred = __task_cred((task));
+		BUG_ON(!cred);
+	} while (!atomic_inc_not_zero(&((struct cred *)cred)->usage));
+
+	rcu_read_unlock();
+	return cred;
+}
+
 /*
  * Allocate blank credentials, such that the credentials can be filled in at a
  * later date without risk of ENOMEM.
@@ -224,20 +248,20 @@
 #ifdef CONFIG_KEYS
 	new->tgcred = kzalloc(sizeof(*new->tgcred), GFP_KERNEL);
 	if (!new->tgcred) {
-		kfree(new);
+		kmem_cache_free(cred_jar, new);
 		return NULL;
 	}
 	atomic_set(&new->tgcred->usage, 1);
 #endif
 
 	atomic_set(&new->usage, 1);
+#ifdef CONFIG_DEBUG_CREDENTIALS
+	new->magic = CRED_MAGIC;
+#endif
 
 	if (security_cred_alloc_blank(new, GFP_KERNEL) < 0)
 		goto error;
 
-#ifdef CONFIG_DEBUG_CREDENTIALS
-	new->magic = CRED_MAGIC;
-#endif
 	return new;
 
 error:
@@ -553,8 +577,6 @@
 		atomic_dec(&old->user->processes);
 	alter_cred_subscribers(old, -2);
 
-	sched_switch_user(task);
-
 	/* send notifications */
 	if (new->uid   != old->uid  ||
 	    new->euid  != old->euid ||
@@ -696,6 +718,8 @@
 	validate_creds(old);
 
 	*new = *old;
+	atomic_set(&new->usage, 1);
+	set_cred_subscribers(new, 0);
 	get_uid(new->user);
 	get_group_info(new->group_info);
 
@@ -713,8 +737,6 @@
 	if (security_prepare_creds(new, old, GFP_KERNEL) < 0)
 		goto error;
 
-	atomic_set(&new->usage, 1);
-	set_cred_subscribers(new, 0);
 	put_cred(old);
 	validate_creds(new);
 	return new;
@@ -786,10 +808,12 @@
 {
 	if (cred->magic != CRED_MAGIC)
 		return true;
-	if (atomic_read(&cred->usage) < atomic_read(&cred->subscribers))
-		return true;
 #ifdef CONFIG_SECURITY_SELINUX
-	if (selinux_is_enabled()) {
+	/*
+	 * cred->security == NULL if security_cred_alloc_blank() or
+	 * security_prepare_creds() returned an error.
+	 */
+	if (selinux_is_enabled() && cred->security) {
 		if ((unsigned long) cred->security < PAGE_SIZE)
 			return true;
 		if ((*(u32 *)cred->security & 0xffffff00) ==
--- linux-mvl-dove-2.6.32.orig/kernel/signal.c
+++ linux-mvl-dove-2.6.32/kernel/signal.c
@@ -591,7 +591,7 @@
 static int check_kill_permission(int sig, struct siginfo *info,
 				 struct task_struct *t)
 {
-	const struct cred *cred = current_cred(), *tcred;
+	const struct cred *cred, *tcred;
 	struct pid *sid;
 	int error;
 
@@ -605,8 +605,10 @@
 	if (error)
 		return error;
 
+	cred = current_cred();
 	tcred = __task_cred(t);
-	if ((cred->euid ^ tcred->suid) &&
+	if (!same_thread_group(current, t) &&
+	    (cred->euid ^ tcred->suid) &&
 	    (cred->euid ^ tcred->uid) &&
 	    (cred->uid  ^ tcred->suid) &&
 	    (cred->uid  ^ tcred->uid) &&
@@ -939,7 +941,8 @@
 		for (i = 0; i < 16; i++) {
 			unsigned char insn;
 
-			__get_user(insn, (unsigned char *)(regs->ip + i));
+			if (get_user(insn, (unsigned char *)(regs->ip + i)))
+				break;
 			printk("%02x ", insn);
 		}
 	}
@@ -2348,9 +2351,13 @@
 		return -EFAULT;
 
 	/* Not even root can pretend to send signals from the kernel.
-	   Nor can they impersonate a kill(), which adds source info.  */
-	if (info.si_code >= 0)
+	 * Nor can they impersonate a kill()/tgkill(), which adds source info.
+	 */
+	if (info.si_code >= 0 || info.si_code == SI_TKILL) {
+		/* We used to allow any < 0 si_code */
+		WARN_ON_ONCE(info.si_code < 0);
 		return -EPERM;
+	}
 	info.si_signo = sig;
 
 	/* POSIX.1b doesn't mention process groups.  */
@@ -2364,9 +2371,13 @@
 		return -EINVAL;
 
 	/* Not even root can pretend to send signals from the kernel.
-	   Nor can they impersonate a kill(), which adds source info.  */
-	if (info->si_code >= 0)
+	 * Nor can they impersonate a kill()/tgkill(), which adds source info.
+	 */
+	if (info->si_code >= 0 || info->si_code == SI_TKILL) {
+		/* We used to allow any < 0 si_code */
+		WARN_ON_ONCE(info->si_code < 0);
 		return -EPERM;
+	}
 	info->si_signo = sig;
 
 	return do_send_specific(tgid, pid, sig, info);
--- linux-mvl-dove-2.6.32.orig/kernel/latencytop.c
+++ linux-mvl-dove-2.6.32/kernel/latencytop.c
@@ -195,14 +195,7 @@
 
 	account_global_scheduler_latency(tsk, &lat);
 
-	/*
-	 * short term hack; if we're > 32 we stop; future we recycle:
-	 */
-	tsk->latency_record_count++;
-	if (tsk->latency_record_count >= LT_SAVECOUNT)
-		goto out_unlock;
-
-	for (i = 0; i < LT_SAVECOUNT; i++) {
+	for (i = 0; i < tsk->latency_record_count; i++) {
 		struct latency_record *mylat;
 		int same = 1;
 
@@ -228,8 +221,14 @@
 		}
 	}
 
+	/*
+	 * short term hack; if we're > 32 we stop; future we recycle:
+	 */
+	if (tsk->latency_record_count >= LT_SAVECOUNT)
+		goto out_unlock;
+
 	/* Allocated a new one: */
-	i = tsk->latency_record_count;
+	i = tsk->latency_record_count++;
 	memcpy(&tsk->latency_record[i], &lat, sizeof(struct latency_record));
 
 out_unlock:
--- linux-mvl-dove-2.6.32.orig/kernel/rcutree_plugin.h
+++ linux-mvl-dove-2.6.32/kernel/rcutree_plugin.h
@@ -33,7 +33,7 @@
 /*
  * Tell them what RCU they are running.
  */
-static inline void rcu_bootup_announce(void)
+static void rcu_bootup_announce(void)
 {
 	printk(KERN_INFO
 	       "Experimental preemptable hierarchical RCU implementation.\n");
@@ -481,7 +481,7 @@
 /*
  * Tell them what RCU they are running.
  */
-static inline void rcu_bootup_announce(void)
+static void rcu_bootup_announce(void)
 {
 	printk(KERN_INFO "Hierarchical RCU implementation.\n");
 }
--- linux-mvl-dove-2.6.32.orig/kernel/sched_clock.c
+++ linux-mvl-dove-2.6.32/kernel/sched_clock.c
@@ -236,6 +236,18 @@
 }
 EXPORT_SYMBOL_GPL(sched_clock_idle_wakeup_event);
 
+unsigned long long cpu_clock(int cpu)
+{
+	unsigned long long clock;
+	unsigned long flags;
+
+	local_irq_save(flags);
+	clock = sched_clock_cpu(cpu);
+	local_irq_restore(flags);
+
+	return clock;
+}
+
 #else /* CONFIG_HAVE_UNSTABLE_SCHED_CLOCK */
 
 void sched_clock_init(void)
@@ -251,17 +263,12 @@
 	return sched_clock();
 }
 
-#endif /* CONFIG_HAVE_UNSTABLE_SCHED_CLOCK */
 
 unsigned long long cpu_clock(int cpu)
 {
-	unsigned long long clock;
-	unsigned long flags;
+	return sched_clock_cpu(cpu);
+}
 
-	local_irq_save(flags);
-	clock = sched_clock_cpu(cpu);
-	local_irq_restore(flags);
+#endif /* CONFIG_HAVE_UNSTABLE_SCHED_CLOCK */
 
-	return clock;
-}
 EXPORT_SYMBOL_GPL(cpu_clock);
--- linux-mvl-dove-2.6.32.orig/kernel/groups.c
+++ linux-mvl-dove-2.6.32/kernel/groups.c
@@ -143,10 +143,9 @@
 	right = group_info->ngroups;
 	while (left < right) {
 		unsigned int mid = (left+right)/2;
-		int cmp = grp - GROUP_AT(group_info, mid);
-		if (cmp > 0)
+		if (grp > GROUP_AT(group_info, mid))
 			left = mid + 1;
-		else if (cmp < 0)
+		else if (grp < GROUP_AT(group_info, mid))
 			right = mid;
 		else
 			return 1;
--- linux-mvl-dove-2.6.32.orig/kernel/audit_tree.c
+++ linux-mvl-dove-2.6.32/kernel/audit_tree.c
@@ -277,7 +277,7 @@
 		owner->root = NULL;
 	}
 
-	for (i = j = 0; i < size; i++, j++) {
+	for (i = j = 0; j <= size; i++, j++) {
 		struct audit_tree *s;
 		if (&chunk->owners[j] == p) {
 			list_del_init(&p->list);
@@ -290,7 +290,7 @@
 		if (!s) /* result of earlier fallback */
 			continue;
 		get_tree(s);
-		list_replace_init(&chunk->owners[i].list, &new->owners[j].list);
+		list_replace_init(&chunk->owners[j].list, &new->owners[i].list);
 	}
 
 	list_replace_rcu(&chunk->hash, &new->hash);
@@ -373,15 +373,17 @@
 	for (n = 0; n < old->count; n++) {
 		if (old->owners[n].owner == tree) {
 			spin_unlock(&hash_lock);
-			put_inotify_watch(watch);
+			put_inotify_watch(&old->watch);
 			return 0;
 		}
 	}
 	spin_unlock(&hash_lock);
 
 	chunk = alloc_chunk(old->count + 1);
-	if (!chunk)
+	if (!chunk) {
+		put_inotify_watch(&old->watch);
 		return -ENOMEM;
+	}
 
 	mutex_lock(&inode->inotify_mutex);
 	if (inotify_clone_watch(&old->watch, &chunk->watch) < 0) {
@@ -425,7 +427,8 @@
 	spin_unlock(&hash_lock);
 	inotify_evict_watch(&old->watch);
 	mutex_unlock(&inode->inotify_mutex);
-	put_inotify_watch(&old->watch);
+	put_inotify_watch(&old->watch); /* pair to inotify_find_watch */
+	put_inotify_watch(&old->watch); /* and kill it */
 	return 0;
 }
 
--- linux-mvl-dove-2.6.32.orig/kernel/cgroup_freezer.c
+++ linux-mvl-dove-2.6.32/kernel/cgroup_freezer.c
@@ -47,17 +47,20 @@
 			    struct freezer, css);
 }
 
-int cgroup_frozen(struct task_struct *task)
+int cgroup_freezing_or_frozen(struct task_struct *task)
 {
 	struct freezer *freezer;
 	enum freezer_state state;
 
 	task_lock(task);
 	freezer = task_freezer(task);
-	state = freezer->state;
+	if (!freezer->css.cgroup->parent)
+		state = CGROUP_THAWED; /* root cgroup can't be frozen */
+	else
+		state = freezer->state;
 	task_unlock(task);
 
-	return state == CGROUP_FROZEN;
+	return (state == CGROUP_FREEZING) || (state == CGROUP_FROZEN);
 }
 
 /*
@@ -163,6 +166,14 @@
 {
 	struct freezer *freezer;
 
+	if ((current != task) && (!capable(CAP_SYS_ADMIN))) {
+		const struct cred *cred = current_cred(), *tcred;
+
+		tcred = __task_cred(task);
+		if (cred->euid != tcred->uid && cred->euid != tcred->suid)
+			return -EPERM;
+	}
+
 	/*
 	 * Anything frozen can't move or be moved to/from.
 	 *
--- linux-mvl-dove-2.6.32.orig/kernel/capability.c
+++ linux-mvl-dove-2.6.32/kernel/capability.c
@@ -15,7 +15,6 @@
 #include <linux/syscalls.h>
 #include <linux/pid_namespace.h>
 #include <asm/uaccess.h>
-#include "cred-internals.h"
 
 /*
  * Leveraged for setting/resetting capabilities
--- linux-mvl-dove-2.6.32.orig/kernel/rcutree.h
+++ linux-mvl-dove-2.6.32/kernel/rcutree.h
@@ -84,6 +84,9 @@
 	long	gpnum;		/* Current grace period for this node. */
 				/*  This will either be equal to or one */
 				/*  behind the root rcu_node's gpnum. */
+	long	completed;	/* Last grace period completed for this node. */
+				/*  This will either be equal to or one */
+				/*  behind the root rcu_node's gpnum. */
 	unsigned long qsmask;	/* CPUs or groups that need to switch in */
 				/*  order for current grace period to proceed.*/
 				/*  In leaf rcu_node, each bit corresponds to */
@@ -204,11 +207,12 @@
 #define RCU_GP_IDLE		0	/* No grace period in progress. */
 #define RCU_GP_INIT		1	/* Grace period being initialized. */
 #define RCU_SAVE_DYNTICK	2	/* Need to scan dyntick state. */
-#define RCU_FORCE_QS		3	/* Need to force quiescent state. */
+#define RCU_SAVE_COMPLETED	3	/* Need to save rsp->completed. */
+#define RCU_FORCE_QS		4	/* Need to force quiescent state. */
 #ifdef CONFIG_NO_HZ
 #define RCU_SIGNAL_INIT		RCU_SAVE_DYNTICK
 #else /* #ifdef CONFIG_NO_HZ */
-#define RCU_SIGNAL_INIT		RCU_FORCE_QS
+#define RCU_SIGNAL_INIT		RCU_SAVE_COMPLETED
 #endif /* #else #ifdef CONFIG_NO_HZ */
 
 #define RCU_JIFFIES_TILL_FORCE_QS	 3	/* for rsp->jiffies_force_qs */
@@ -274,9 +278,8 @@
 	unsigned long jiffies_stall;		/* Time at which to check */
 						/*  for CPU stalls. */
 #endif /* #ifdef CONFIG_RCU_CPU_STALL_DETECTOR */
-#ifdef CONFIG_NO_HZ
 	long dynticks_completed;		/* Value of completed @ snap. */
-#endif /* #ifdef CONFIG_NO_HZ */
+						/*  Protected by fqslock. */
 };
 
 #ifdef RCU_TREE_NONCORE
@@ -298,7 +301,7 @@
 #else /* #ifdef RCU_TREE_NONCORE */
 
 /* Forward declarations for rcutree_plugin.h */
-static inline void rcu_bootup_announce(void);
+static void rcu_bootup_announce(void);
 long rcu_batches_completed(void);
 static void rcu_preempt_note_context_switch(int cpu);
 static int rcu_preempted_readers(struct rcu_node *rnp);
--- linux-mvl-dove-2.6.32.orig/kernel/sched_rt.c
+++ linux-mvl-dove-2.6.32/kernel/sched_rt.c
@@ -194,7 +194,7 @@
 	return rt_se->my_q;
 }
 
-static void enqueue_rt_entity(struct sched_rt_entity *rt_se);
+static void enqueue_rt_entity(struct sched_rt_entity *rt_se, bool head);
 static void dequeue_rt_entity(struct sched_rt_entity *rt_se);
 
 static void sched_rt_rq_enqueue(struct rt_rq *rt_rq)
@@ -204,7 +204,7 @@
 
 	if (rt_rq->rt_nr_running) {
 		if (rt_se && !on_rt_rq(rt_se))
-			enqueue_rt_entity(rt_se);
+			enqueue_rt_entity(rt_se, false);
 		if (rt_rq->highest_prio.curr < curr->prio)
 			resched_task(curr);
 	}
@@ -603,7 +603,7 @@
 	if (!task_has_rt_policy(curr))
 		return;
 
-	delta_exec = rq->clock - curr->se.exec_start;
+	delta_exec = rq->clock_task - curr->se.exec_start;
 	if (unlikely((s64)delta_exec < 0))
 		delta_exec = 0;
 
@@ -612,7 +612,7 @@
 	curr->se.sum_exec_runtime += delta_exec;
 	account_group_exec_runtime(curr, delta_exec);
 
-	curr->se.exec_start = rq->clock;
+	curr->se.exec_start = rq->clock_task;
 	cpuacct_charge(curr, delta_exec);
 
 	sched_rt_avg_update(rq, delta_exec);
@@ -803,7 +803,7 @@
 	dec_rt_group(rt_se, rt_rq);
 }
 
-static void __enqueue_rt_entity(struct sched_rt_entity *rt_se)
+static void __enqueue_rt_entity(struct sched_rt_entity *rt_se, bool head)
 {
 	struct rt_rq *rt_rq = rt_rq_of_se(rt_se);
 	struct rt_prio_array *array = &rt_rq->active;
@@ -819,7 +819,10 @@
 	if (group_rq && (rt_rq_throttled(group_rq) || !group_rq->rt_nr_running))
 		return;
 
-	list_add_tail(&rt_se->run_list, queue);
+	if (head)
+		list_add(&rt_se->run_list, queue);
+	else
+		list_add_tail(&rt_se->run_list, queue);
 	__set_bit(rt_se_prio(rt_se), array->bitmap);
 
 	inc_rt_tasks(rt_se, rt_rq);
@@ -856,11 +859,11 @@
 	}
 }
 
-static void enqueue_rt_entity(struct sched_rt_entity *rt_se)
+static void enqueue_rt_entity(struct sched_rt_entity *rt_se, bool head)
 {
 	dequeue_rt_stack(rt_se);
 	for_each_sched_rt_entity(rt_se)
-		__enqueue_rt_entity(rt_se);
+		__enqueue_rt_entity(rt_se, head);
 }
 
 static void dequeue_rt_entity(struct sched_rt_entity *rt_se)
@@ -871,21 +874,22 @@
 		struct rt_rq *rt_rq = group_rt_rq(rt_se);
 
 		if (rt_rq && rt_rq->rt_nr_running)
-			__enqueue_rt_entity(rt_se);
+			__enqueue_rt_entity(rt_se, false);
 	}
 }
 
 /*
  * Adding/removing a task to/from a priority array:
  */
-static void enqueue_task_rt(struct rq *rq, struct task_struct *p, int wakeup)
+static void
+enqueue_task_rt(struct rq *rq, struct task_struct *p, int wakeup, bool head)
 {
 	struct sched_rt_entity *rt_se = &p->rt;
 
 	if (wakeup)
 		rt_se->timeout = 0;
 
-	enqueue_rt_entity(rt_se);
+	enqueue_rt_entity(rt_se, head);
 
 	if (!task_current(rq, p) && p->rt.nr_cpus_allowed > 1)
 		enqueue_pushable_task(rq, p);
@@ -938,10 +942,9 @@
 #ifdef CONFIG_SMP
 static int find_lowest_rq(struct task_struct *task);
 
-static int select_task_rq_rt(struct task_struct *p, int sd_flag, int flags)
+static int
+select_task_rq_rt(struct rq *rq, struct task_struct *p, int sd_flag, int flags)
 {
-	struct rq *rq = task_rq(p);
-
 	if (sd_flag != SD_BALANCE_WAKE)
 		return smp_processor_id();
 
@@ -951,18 +954,19 @@
 	 * runqueue. Otherwise simply start this RT task
 	 * on its current runqueue.
 	 *
-	 * We want to avoid overloading runqueues. Even if
-	 * the RT task is of higher priority than the current RT task.
-	 * RT tasks behave differently than other tasks. If
-	 * one gets preempted, we try to push it off to another queue.
-	 * So trying to keep a preempting RT task on the same
-	 * cache hot CPU will force the running RT task to
-	 * a cold CPU. So we waste all the cache for the lower
-	 * RT task in hopes of saving some of a RT task
-	 * that is just being woken and probably will have
-	 * cold cache anyway.
+	 * We want to avoid overloading runqueues. If the woken
+	 * task is a higher priority, then it will stay on this CPU
+	 * and the lower prio task should be moved to another CPU.
+	 * Even though this will probably make the lower prio task
+	 * lose its cache, we do not want to bounce a higher task
+	 * around just because it gave up its CPU, perhaps for a
+	 * lock?
+	 *
+	 * For equal prio tasks, we just let the scheduler sort it out.
 	 */
 	if (unlikely(rt_task(rq->curr)) &&
+	    (rq->curr->rt.nr_cpus_allowed < 2 ||
+	     rq->curr->prio < p->prio) &&
 	    (p->rt.nr_cpus_allowed > 1)) {
 		int cpu = find_lowest_rq(p);
 
@@ -1065,7 +1069,7 @@
 	} while (rt_rq);
 
 	p = rt_task_of(rt_se);
-	p->se.exec_start = rq->clock;
+	p->se.exec_start = rq->clock_task;
 
 	return p;
 }
@@ -1485,12 +1489,15 @@
  * If we are not running and we are not going to reschedule soon, we should
  * try to push tasks away now
  */
-static void task_wake_up_rt(struct rq *rq, struct task_struct *p)
+static void task_woken_rt(struct rq *rq, struct task_struct *p)
 {
 	if (!task_running(rq, p) &&
 	    !test_tsk_need_resched(rq->curr) &&
 	    has_pushable_tasks(rq) &&
-	    p->rt.nr_cpus_allowed > 1)
+	    p->rt.nr_cpus_allowed > 1 &&
+	    rt_task(rq->curr) &&
+	    (rq->curr->rt.nr_cpus_allowed < 2 ||
+	     rq->curr->prio < p->prio))
 		push_rt_tasks(rq);
 }
 
@@ -1728,13 +1735,13 @@
 {
 	struct task_struct *p = rq->curr;
 
-	p->se.exec_start = rq->clock;
+	p->se.exec_start = rq->clock_task;
 
 	/* The running task is never eligible for pushing */
 	dequeue_pushable_task(rq, p);
 }
 
-unsigned int get_rr_interval_rt(struct task_struct *task)
+unsigned int get_rr_interval_rt(struct rq *rq, struct task_struct *task)
 {
 	/*
 	 * Time slice is 0 for SCHED_FIFO tasks
@@ -1766,7 +1773,7 @@
 	.rq_offline             = rq_offline_rt,
 	.pre_schedule		= pre_schedule_rt,
 	.post_schedule		= post_schedule_rt,
-	.task_wake_up		= task_wake_up_rt,
+	.task_woken		= task_woken_rt,
 	.switched_from		= switched_from_rt,
 #endif
 
--- linux-mvl-dove-2.6.32.orig/kernel/profile.c
+++ linux-mvl-dove-2.6.32/kernel/profile.c
@@ -127,8 +127,10 @@
 		return 0;
 
 	prof_buffer = vmalloc(buffer_bytes);
-	if (prof_buffer)
+	if (prof_buffer) {
+		memset(prof_buffer, 0, buffer_bytes);
 		return 0;
+	}
 
 	free_cpumask_var(prof_cpu_mask);
 	return -ENOMEM;
--- linux-mvl-dove-2.6.32.orig/kernel/sched_features.h
+++ linux-mvl-dove-2.6.32/kernel/sched_features.h
@@ -121,3 +121,8 @@
  * release the lock. Decreases scheduling overhead.
  */
 SCHED_FEAT(OWNER_SPIN, 1)
+
+/*
+ * Decrement CPU power based on irq activity
+ */
+SCHED_FEAT(NONIRQ_POWER, 1)
--- linux-mvl-dove-2.6.32.orig/kernel/acct.c
+++ linux-mvl-dove-2.6.32/kernel/acct.c
@@ -536,7 +536,8 @@
 	do_div(elapsed, AHZ);
 	ac.ac_btime = get_seconds() - elapsed;
 	/* we really need to bite the bullet and change layout */
-	current_uid_gid(&ac.ac_uid, &ac.ac_gid);
+	ac.ac_uid = orig_cred->uid;
+	ac.ac_gid = orig_cred->gid;
 #if ACCT_VERSION==2
 	ac.ac_ahz = AHZ;
 #endif
--- linux-mvl-dove-2.6.32.orig/kernel/sched_fair.c
+++ linux-mvl-dove-2.6.32/kernel/sched_fair.c
@@ -35,12 +35,14 @@
  *  run vmstat and monitor the context-switches (cs) field)
  */
 unsigned int sysctl_sched_latency = 5000000ULL;
+unsigned int normalized_sysctl_sched_latency = 5000000ULL;
 
 /*
  * Minimal preemption granularity for CPU-bound tasks:
  * (default: 1 msec * (1 + ilog(ncpus)), units: nanoseconds)
  */
 unsigned int sysctl_sched_min_granularity = 1000000ULL;
+unsigned int normalized_sysctl_sched_min_granularity = 1000000ULL;
 
 /*
  * is kept at sysctl_sched_latency / sysctl_sched_min_granularity
@@ -70,6 +72,7 @@
  * have immediate wakeup/sleep latencies.
  */
 unsigned int sysctl_sched_wakeup_granularity = 1000000UL;
+unsigned int normalized_sysctl_sched_wakeup_granularity = 1000000UL;
 
 const_debug unsigned int sysctl_sched_migration_cost = 500000UL;
 
@@ -485,6 +488,7 @@
 	curr->sum_exec_runtime += delta_exec;
 	schedstat_add(cfs_rq, exec_clock, delta_exec);
 	delta_exec_weighted = calc_delta_fair(delta_exec, curr);
+
 	curr->vruntime += delta_exec_weighted;
 	update_min_vruntime(cfs_rq);
 }
@@ -492,7 +496,7 @@
 static void update_curr(struct cfs_rq *cfs_rq)
 {
 	struct sched_entity *curr = cfs_rq->curr;
-	u64 now = rq_of(cfs_rq)->clock;
+	u64 now = rq_of(cfs_rq)->clock_task;
 	unsigned long delta_exec;
 
 	if (unlikely(!curr))
@@ -575,7 +579,7 @@
 	/*
 	 * We are starting a new run period:
 	 */
-	se->exec_start = rq_of(cfs_rq)->clock;
+	se->exec_start = rq_of(cfs_rq)->clock_task;
 }
 
 /**************************************************
@@ -740,16 +744,26 @@
 	se->vruntime = vruntime;
 }
 
+#define ENQUEUE_WAKEUP	1
+#define ENQUEUE_MIGRATE 2
+
 static void
-enqueue_entity(struct cfs_rq *cfs_rq, struct sched_entity *se, int wakeup)
+enqueue_entity(struct cfs_rq *cfs_rq, struct sched_entity *se, int flags)
 {
 	/*
+	 * Update the normalized vruntime before updating min_vruntime
+	 * through callig update_curr().
+	 */
+	if (!(flags & ENQUEUE_WAKEUP) || (flags & ENQUEUE_MIGRATE))
+		se->vruntime += cfs_rq->min_vruntime;
+
+	/*
 	 * Update run-time statistics of the 'current'.
 	 */
 	update_curr(cfs_rq);
 	account_entity_enqueue(cfs_rq, se);
 
-	if (wakeup) {
+	if (flags & ENQUEUE_WAKEUP) {
 		place_entity(cfs_rq, se, 0);
 		enqueue_sleeper(cfs_rq, se);
 	}
@@ -803,6 +817,14 @@
 		__dequeue_entity(cfs_rq, se);
 	account_entity_dequeue(cfs_rq, se);
 	update_min_vruntime(cfs_rq);
+
+	/*
+	 * Normalize the entity after updating the min_vruntime because the
+	 * update can refer to the ->curr item and we need to reflect this
+	 * movement in our normalized position.
+	 */
+	if (!sleep)
+		se->vruntime -= cfs_rq->min_vruntime;
 }
 
 /*
@@ -1009,17 +1031,24 @@
  * increased. Here we update the fair scheduling stats and
  * then put the task into the rbtree:
  */
-static void enqueue_task_fair(struct rq *rq, struct task_struct *p, int wakeup)
+static void
+enqueue_task_fair(struct rq *rq, struct task_struct *p, int wakeup, bool head)
 {
 	struct cfs_rq *cfs_rq;
 	struct sched_entity *se = &p->se;
+	int flags = 0;
+
+	if (wakeup)
+		flags |= ENQUEUE_WAKEUP;
+	if (p->state == TASK_WAKING)
+		flags |= ENQUEUE_MIGRATE;
 
 	for_each_sched_entity(se) {
 		if (se->on_rq)
 			break;
 		cfs_rq = cfs_rq_of(se);
-		enqueue_entity(cfs_rq, se, wakeup);
-		wakeup = 1;
+		enqueue_entity(cfs_rq, se, flags);
+		flags = ENQUEUE_WAKEUP;
 	}
 
 	hrtick_update(rq);
@@ -1095,6 +1124,14 @@
 
 #ifdef CONFIG_SMP
 
+static void task_waking_fair(struct rq *rq, struct task_struct *p)
+{
+	struct sched_entity *se = &p->se;
+	struct cfs_rq *cfs_rq = cfs_rq_of(se);
+
+	se->vruntime -= cfs_rq->min_vruntime;
+}
+
 #ifdef CONFIG_FAIR_GROUP_SCHED
 /*
  * effective_load() calculates the load change as seen from the root_task_group
@@ -1185,7 +1222,6 @@
 	unsigned long this_load, load;
 	int idx, this_cpu, prev_cpu;
 	unsigned long tl_per_task;
-	unsigned int imbalance;
 	struct task_group *tg;
 	unsigned long weight;
 	int balanced;
@@ -1213,6 +1249,7 @@
 	 * effect of the currently running task from the load
 	 * of the current CPU:
 	 */
+	rcu_read_lock();
 	if (sync) {
 		tg = task_group(current);
 		weight = current->se.load.weight;
@@ -1224,8 +1261,6 @@
 	tg = task_group(p);
 	weight = p->se.load.weight;
 
-	imbalance = 100 + (sd->imbalance_pct - 100) / 2;
-
 	/*
 	 * In low-load situations, where prev_cpu is idle and this_cpu is idle
 	 * due to the sync cause above having dropped this_load to 0, we'll
@@ -1235,9 +1270,23 @@
 	 * Otherwise check if either cpus are near enough in load to allow this
 	 * task to be woken on this_cpu.
 	 */
-	balanced = !this_load ||
-		100*(this_load + effective_load(tg, this_cpu, weight, weight)) <=
-		imbalance*(load + effective_load(tg, prev_cpu, 0, weight));
+	if (this_load) {
+		unsigned long this_eff_load, prev_eff_load;
+
+		this_eff_load = 100;
+		this_eff_load *= power_of(prev_cpu);
+		this_eff_load *= this_load +
+			effective_load(tg, this_cpu, weight, weight);
+
+		prev_eff_load = 100 + (sd->imbalance_pct - 100) / 2;
+		prev_eff_load *= power_of(this_cpu);
+		prev_eff_load *= load + effective_load(tg, prev_cpu, 0, weight);
+
+		balanced = this_eff_load <= prev_eff_load;
+	} else
+		balanced = true;
+
+	rcu_read_unlock();
 
 	/*
 	 * If the currently running task will sleep within
@@ -1345,6 +1394,56 @@
 }
 
 /*
+ * Try and locate an idle CPU in the sched_domain.
+ */
+static int select_idle_sibling(struct task_struct *p, int target)
+{
+	int cpu = smp_processor_id();
+	int prev_cpu = task_cpu(p);
+	struct sched_domain *sd;
+	int i;
+
+	/*
+	 * If the task is going to be woken-up on this cpu and if it is
+	 * already idle, then it is the right target.
+	 */
+	if (target == cpu && idle_cpu(cpu))
+		return cpu;
+
+	/*
+	 * If the task is going to be woken-up on the cpu where it previously
+	 * ran and if it is currently idle, then it the right target.
+	 */
+	if (target == prev_cpu && idle_cpu(prev_cpu))
+		return prev_cpu;
+
+	/*
+	 * Otherwise, iterate the domains and find an elegible idle cpu.
+	 */
+	for_each_domain(target, sd) {
+		if (!(sd->flags & SD_SHARE_PKG_RESOURCES))
+			break;
+
+		for_each_cpu_and(i, sched_domain_span(sd), &p->cpus_allowed) {
+			if (idle_cpu(i)) {
+				target = i;
+				break;
+			}
+		}
+
+		/*
+		 * Lets stop looking for an idle sibling when we reached
+		 * the domain that spans the current cpu and prev_cpu.
+		 */
+		if (cpumask_test_cpu(cpu, sched_domain_span(sd)) &&
+		    cpumask_test_cpu(prev_cpu, sched_domain_span(sd)))
+			break;
+	}
+
+	return target;
+}
+
+/*
  * sched_balance_self: balance the current task (running on cpu) in domains
  * that have the 'flag' flag set. In practice, this is SD_BALANCE_FORK and
  * SD_BALANCE_EXEC.
@@ -1355,7 +1454,8 @@
  *
  * preempt must be disabled.
  */
-static int select_task_rq_fair(struct task_struct *p, int sd_flag, int wake_flags)
+static int
+select_task_rq_fair(struct rq *rq, struct task_struct *p, int sd_flag, int wake_flags)
 {
 	struct sched_domain *tmp, *affine_sd = NULL, *sd = NULL;
 	int cpu = smp_processor_id();
@@ -1372,8 +1472,10 @@
 		new_cpu = prev_cpu;
 	}
 
-	rcu_read_lock();
 	for_each_domain(cpu, tmp) {
+		if (!(tmp->flags & SD_LOAD_BALANCE))
+			continue;
+
 		/*
 		 * If power savings logic is enabled for a domain, see if we
 		 * are not overloaded, if so, don't balance wider.
@@ -1398,9 +1500,12 @@
 				want_sd = 0;
 		}
 
+		/*
+		 * If both cpu and prev_cpu are part of this domain,
+		 * cpu is a valid SD_WAKE_AFFINE target.
+		 */
 		if (want_affine && (tmp->flags & SD_WAKE_AFFINE) &&
 		    cpumask_test_cpu(prev_cpu, sched_domain_span(tmp))) {
-
 			affine_sd = tmp;
 			want_affine = 0;
 		}
@@ -1415,23 +1520,28 @@
 			sd = tmp;
 	}
 
+#ifdef CONFIG_FAIR_GROUP_SCHED
 	if (sched_feat(LB_SHARES_UPDATE)) {
 		/*
 		 * Pick the largest domain to update shares over
 		 */
 		tmp = sd;
-		if (affine_sd && (!tmp ||
-				  cpumask_weight(sched_domain_span(affine_sd)) >
-				  cpumask_weight(sched_domain_span(sd))))
+		if (affine_sd && (!tmp || affine_sd->span_weight > sd->span_weight))
 			tmp = affine_sd;
 
-		if (tmp)
+		if (tmp) {
+			spin_unlock(&rq->lock);
 			update_shares(tmp);
+			spin_lock(&rq->lock);
+		}
 	}
+#endif
 
-	if (affine_sd && wake_affine(affine_sd, p, sync)) {
-		new_cpu = cpu;
-		goto out;
+	if (affine_sd) {
+		if (cpu == prev_cpu || wake_affine(affine_sd, p, sync))
+			return select_idle_sibling(p, cpu);
+		else
+			return select_idle_sibling(p, prev_cpu);
 	}
 
 	while (sd) {
@@ -1462,10 +1572,10 @@
 
 		/* Now try balancing at a lower domain level of new_cpu */
 		cpu = new_cpu;
-		weight = cpumask_weight(sched_domain_span(sd));
+		weight = sd->span_weight;
 		sd = NULL;
 		for_each_domain(cpu, tmp) {
-			if (weight <= cpumask_weight(sched_domain_span(tmp)))
+			if (weight <= tmp->span_weight)
 				break;
 			if (tmp->flags & sd_flag)
 				sd = tmp;
@@ -1473,8 +1583,6 @@
 		/* while loop will break here if sd == NULL */
 	}
 
-out:
-	rcu_read_unlock();
 	return new_cpu;
 }
 #endif /* CONFIG_SMP */
@@ -1850,6 +1958,17 @@
 
 	return 0;
 }
+
+static void rq_online_fair(struct rq *rq)
+{
+	update_sysctl();
+}
+
+static void rq_offline_fair(struct rq *rq)
+{
+	update_sysctl();
+}
+
 #endif /* CONFIG_SMP */
 
 /*
@@ -1867,28 +1986,35 @@
 }
 
 /*
- * Share the fairness runtime between parent and child, thus the
- * total amount of pressure for CPU stays equal - new tasks
- * get a chance to run but frequent forkers are not allowed to
- * monopolize the CPU. Note: the parent runqueue is locked,
- * the child is not running yet.
+ * called on fork with the child task as argument from the parent's context
+ *  - child not yet on the tasklist
+ *  - preemption disabled
  */
-static void task_new_fair(struct rq *rq, struct task_struct *p)
+static void task_fork_fair(struct task_struct *p)
 {
-	struct cfs_rq *cfs_rq = task_cfs_rq(p);
+	struct cfs_rq *cfs_rq = task_cfs_rq(current);
 	struct sched_entity *se = &p->se, *curr = cfs_rq->curr;
 	int this_cpu = smp_processor_id();
+	struct rq *rq = this_rq();
+	unsigned long flags;
+
+	spin_lock_irqsave(&rq->lock, flags);
+
+	update_rq_clock(rq);
 
-	sched_info_queued(p);
+	if (unlikely(task_cpu(p) != this_cpu)) {
+		rcu_read_lock();
+		__set_task_cpu(p, this_cpu);
+		rcu_read_unlock();
+	}
 
 	update_curr(cfs_rq);
+
 	if (curr)
 		se->vruntime = curr->vruntime;
 	place_entity(cfs_rq, se, 1);
 
-	/* 'curr' will be NULL if the child belongs to a different group */
-	if (sysctl_sched_child_runs_first && this_cpu == task_cpu(p) &&
-			curr && entity_before(curr, se)) {
+	if (sysctl_sched_child_runs_first && curr && entity_before(curr, se)) {
 		/*
 		 * Upon rescheduling, sched_class::put_prev_task() will place
 		 * 'current' within the tree based on its new key value.
@@ -1897,7 +2023,9 @@
 		resched_task(rq->curr);
 	}
 
-	enqueue_task_fair(rq, p, 0);
+	se->vruntime -= cfs_rq->min_vruntime;
+
+	spin_unlock_irqrestore(&rq->lock, flags);
 }
 
 /*
@@ -1950,30 +2078,40 @@
 }
 
 #ifdef CONFIG_FAIR_GROUP_SCHED
-static void moved_group_fair(struct task_struct *p)
+static void task_move_group_fair(struct task_struct *p, int on_rq)
 {
-	struct cfs_rq *cfs_rq = task_cfs_rq(p);
-
-	update_curr(cfs_rq);
-	place_entity(cfs_rq, &p->se, 1);
+	/*
+	 * If the task was not on the rq at the time of this cgroup movement
+	 * it must have been asleep, sleeping tasks keep their ->vruntime
+	 * absolute on their old rq until wakeup (needed for the fair sleeper
+	 * bonus in place_entity()).
+	 *
+	 * If it was on the rq, we've just 'preempted' it, which does convert
+	 * ->vruntime to a relative base.
+	 *
+	 * Make sure both cases convert their relative position when migrating
+	 * to another cgroup's rq. This does somewhat interfere with the
+	 * fair sleeper stuff for the first placement, but who cares.
+	 */
+	if (!on_rq)
+		p->se.vruntime -= cfs_rq_of(&p->se)->min_vruntime;
+	set_task_rq(p, task_cpu(p));
+	if (!on_rq)
+		p->se.vruntime += cfs_rq_of(&p->se)->min_vruntime;
 }
 #endif
 
-unsigned int get_rr_interval_fair(struct task_struct *task)
+unsigned int get_rr_interval_fair(struct rq *rq, struct task_struct *task)
 {
 	struct sched_entity *se = &task->se;
-	unsigned long flags;
-	struct rq *rq;
 	unsigned int rr_interval = 0;
 
 	/*
 	 * Time slice is 0 for SCHED_OTHER tasks that are on an otherwise
 	 * idle runqueue:
 	 */
-	rq = task_rq_lock(task, &flags);
 	if (rq->cfs.load.weight)
 		rr_interval = NS_TO_JIFFIES(sched_slice(&rq->cfs, se));
-	task_rq_unlock(rq, &flags);
 
 	return rr_interval;
 }
@@ -1997,11 +2135,15 @@
 
 	.load_balance		= load_balance_fair,
 	.move_one_task		= move_one_task_fair,
+	.rq_online		= rq_online_fair,
+	.rq_offline		= rq_offline_fair,
+
+	.task_waking		= task_waking_fair,
 #endif
 
 	.set_curr_task          = set_curr_task_fair,
 	.task_tick		= task_tick_fair,
-	.task_new		= task_new_fair,
+	.task_fork		= task_fork_fair,
 
 	.prio_changed		= prio_changed_fair,
 	.switched_to		= switched_to_fair,
@@ -2009,7 +2151,7 @@
 	.get_rr_interval	= get_rr_interval_fair,
 
 #ifdef CONFIG_FAIR_GROUP_SCHED
-	.moved_group		= moved_group_fair,
+	.task_move_group	= task_move_group_fair,
 #endif
 };
 
--- linux-mvl-dove-2.6.32.orig/kernel/sched_idletask.c
+++ linux-mvl-dove-2.6.32/kernel/sched_idletask.c
@@ -6,7 +6,8 @@
  */
 
 #ifdef CONFIG_SMP
-static int select_task_rq_idle(struct task_struct *p, int sd_flag, int flags)
+static int
+select_task_rq_idle(struct rq *rq, struct task_struct *p, int sd_flag, int flags)
 {
 	return task_cpu(p); /* IDLE tasks as never migrated */
 }
@@ -97,7 +98,7 @@
 		check_preempt_curr(rq, p, 0);
 }
 
-unsigned int get_rr_interval_idle(struct task_struct *task)
+unsigned int get_rr_interval_idle(struct rq *rq, struct task_struct *task)
 {
 	return 0;
 }
--- linux-mvl-dove-2.6.32.orig/kernel/fork.c
+++ linux-mvl-dove-2.6.32/kernel/fork.c
@@ -277,7 +277,7 @@
 #ifdef CONFIG_MMU
 static int dup_mmap(struct mm_struct *mm, struct mm_struct *oldmm)
 {
-	struct vm_area_struct *mpnt, *tmp, **pprev;
+	struct vm_area_struct *mpnt, *tmp, *prev, **pprev;
 	struct rb_node **rb_link, *rb_parent;
 	int retval;
 	unsigned long charge;
@@ -305,6 +305,7 @@
 	if (retval)
 		goto out;
 
+	prev = NULL;
 	for (mpnt = oldmm->mmap; mpnt; mpnt = mpnt->vm_next) {
 		struct file *file;
 
@@ -333,7 +334,7 @@
 		vma_set_policy(tmp, pol);
 		tmp->vm_flags &= ~VM_LOCKED;
 		tmp->vm_mm = mm;
-		tmp->vm_next = NULL;
+		tmp->vm_next = tmp->vm_prev = NULL;
 		anon_vma_link(tmp);
 		file = tmp->vm_file;
 		if (file) {
@@ -367,6 +368,8 @@
 		 */
 		*pprev = tmp;
 		pprev = &tmp->vm_next;
+		tmp->vm_prev = prev;
+		prev = tmp;
 
 		__vma_link_rb(mm, tmp, rb_link, rb_parent);
 		rb_link = &tmp->vm_rb.rb_right;
@@ -884,6 +887,9 @@
 	sig->utime = sig->stime = sig->cutime = sig->cstime = cputime_zero;
 	sig->gtime = cputime_zero;
 	sig->cgtime = cputime_zero;
+#ifndef CONFIG_VIRT_CPU_ACCOUNTING
+	sig->prev_utime = sig->prev_stime = cputime_zero;
+#endif
 	sig->nvcsw = sig->nivcsw = sig->cnvcsw = sig->cnivcsw = 0;
 	sig->min_flt = sig->maj_flt = sig->cmin_flt = sig->cmaj_flt = 0;
 	sig->inblock = sig->oublock = sig->cinblock = sig->coublock = 0;
@@ -1123,8 +1129,6 @@
 
 	p->bts = NULL;
 
-	p->stack_start = stack_start;
-
 	/* Perform scheduler related setup. Assign this task to a CPU. */
 	sched_fork(p, clone_flags);
 
@@ -1229,21 +1233,6 @@
 	/* Need tasklist lock for parent etc handling! */
 	write_lock_irq(&tasklist_lock);
 
-	/*
-	 * The task hasn't been attached yet, so its cpus_allowed mask will
-	 * not be changed, nor will its assigned CPU.
-	 *
-	 * The cpus_allowed mask of the parent may have changed after it was
-	 * copied first time - so re-copy it here, then check the child's CPU
-	 * to ensure it is on a valid CPU (and if not, just force it back to
-	 * parent's CPU). This avoids alot of nasty races.
-	 */
-	p->cpus_allowed = current->cpus_allowed;
-	p->rt.nr_cpus_allowed = current->rt.nr_cpus_allowed;
-	if (unlikely(!cpu_isset(task_cpu(p), p->cpus_allowed) ||
-			!cpu_online(task_cpu(p))))
-		set_task_cpu(p, smp_processor_id());
-
 	/* CLONE_PARENT re-uses the old parent */
 	if (clone_flags & (CLONE_PARENT|CLONE_THREAD)) {
 		p->real_parent = current->real_parent;
--- linux-mvl-dove-2.6.32.orig/kernel/cpuset.c
+++ linux-mvl-dove-2.6.32/kernel/cpuset.c
@@ -873,7 +873,7 @@
 		if (retval < 0)
 			return retval;
 
-		if (!cpumask_subset(trialcs->cpus_allowed, cpu_online_mask))
+		if (!cpumask_subset(trialcs->cpus_allowed, cpu_active_mask))
 			return -EINVAL;
 	}
 	retval = validate_change(cs, trialcs);
@@ -921,9 +921,6 @@
  *    call to guarantee_online_mems(), as we know no one is changing
  *    our task's cpuset.
  *
- *    Hold callback_mutex around the two modifications of our tasks
- *    mems_allowed to synchronize with cpuset_mems_allowed().
- *
  *    While the mm_struct we are migrating is typically from some
  *    other task, the task_struct mems_allowed that we are hacking
  *    is for our current task, which must allocate new pages for that
@@ -1330,6 +1327,13 @@
 	int ret;
 	struct cpuset *cs = cgroup_cs(cont);
 
+	if ((current != tsk) && (!capable(CAP_SYS_ADMIN))) {
+		const struct cred *cred = current_cred(), *tcred;
+
+		if (cred->euid != tcred->uid && cred->euid != tcred->suid)
+			return -EPERM;
+	}
+
 	if (cpumask_empty(cs->cpus_allowed) || nodes_empty(cs->mems_allowed))
 		return -ENOSPC;
 
@@ -1392,11 +1396,10 @@
 
 	if (cs == &top_cpuset) {
 		cpumask_copy(cpus_attach, cpu_possible_mask);
-		to = node_possible_map;
 	} else {
 		guarantee_online_cpus(cs, cpus_attach);
-		guarantee_online_mems(cs, &to);
 	}
+	guarantee_online_mems(cs, &to);
 
 	/* do per-task migration stuff possibly for each in the threadgroup */
 	cpuset_attach_task(tsk, &to, cs);
@@ -1518,8 +1521,10 @@
 		return -ENODEV;
 
 	trialcs = alloc_trial_cpuset(cs);
-	if (!trialcs)
-		return -ENOMEM;
+	if (!trialcs) {
+		retval = -ENOMEM;
+		goto out;
+	}
 
 	switch (cft->private) {
 	case FILE_CPULIST:
@@ -1534,6 +1539,7 @@
 	}
 
 	free_trial_cpuset(trialcs);
+out:
 	cgroup_unlock();
 	return retval;
 }
@@ -2011,7 +2017,7 @@
 		}
 
 		/* Continue past cpusets with all cpus, mems online */
-		if (cpumask_subset(cp->cpus_allowed, cpu_online_mask) &&
+		if (cpumask_subset(cp->cpus_allowed, cpu_active_mask) &&
 		    nodes_subset(cp->mems_allowed, node_states[N_HIGH_MEMORY]))
 			continue;
 
@@ -2020,7 +2026,7 @@
 		/* Remove offline cpus and mems from this cpuset. */
 		mutex_lock(&callback_mutex);
 		cpumask_and(cp->cpus_allowed, cp->cpus_allowed,
-			    cpu_online_mask);
+			    cpu_active_mask);
 		nodes_and(cp->mems_allowed, cp->mems_allowed,
 						node_states[N_HIGH_MEMORY]);
 		mutex_unlock(&callback_mutex);
@@ -2058,8 +2064,10 @@
 	switch (phase) {
 	case CPU_ONLINE:
 	case CPU_ONLINE_FROZEN:
-	case CPU_DEAD:
-	case CPU_DEAD_FROZEN:
+	case CPU_DOWN_PREPARE:
+	case CPU_DOWN_PREPARE_FROZEN:
+	case CPU_DOWN_FAILED:
+	case CPU_DOWN_FAILED_FROZEN:
 		break;
 
 	default:
@@ -2068,7 +2076,7 @@
 
 	cgroup_lock();
 	mutex_lock(&callback_mutex);
-	cpumask_copy(top_cpuset.cpus_allowed, cpu_online_mask);
+	cpumask_copy(top_cpuset.cpus_allowed, cpu_active_mask);
 	mutex_unlock(&callback_mutex);
 	scan_for_empty_cpusets(&top_cpuset);
 	ndoms = generate_sched_domains(&doms, &attr);
@@ -2089,15 +2097,23 @@
 static int cpuset_track_online_nodes(struct notifier_block *self,
 				unsigned long action, void *arg)
 {
+	nodemask_t oldmems;
+
 	cgroup_lock();
 	switch (action) {
 	case MEM_ONLINE:
-	case MEM_OFFLINE:
+		oldmems = top_cpuset.mems_allowed;
 		mutex_lock(&callback_mutex);
 		top_cpuset.mems_allowed = node_states[N_HIGH_MEMORY];
 		mutex_unlock(&callback_mutex);
-		if (action == MEM_OFFLINE)
-			scan_for_empty_cpusets(&top_cpuset);
+		update_tasks_nodemask(&top_cpuset, &oldmems, NULL);
+		break;
+	case MEM_OFFLINE:
+		/*
+		 * needn't update top_cpuset.mems_allowed explicitly because
+		 * scan_for_empty_cpusets() will update it.
+		 */
+		scan_for_empty_cpusets(&top_cpuset);
 		break;
 	default:
 		break;
@@ -2115,7 +2131,7 @@
 
 void __init cpuset_init_smp(void)
 {
-	cpumask_copy(top_cpuset.cpus_allowed, cpu_online_mask);
+	cpumask_copy(top_cpuset.cpus_allowed, cpu_active_mask);
 	top_cpuset.mems_allowed = node_states[N_HIGH_MEMORY];
 
 	hotcpu_notifier(cpuset_track_online_cpus, 0);
@@ -2139,19 +2155,52 @@
 void cpuset_cpus_allowed(struct task_struct *tsk, struct cpumask *pmask)
 {
 	mutex_lock(&callback_mutex);
-	cpuset_cpus_allowed_locked(tsk, pmask);
+	task_lock(tsk);
+	guarantee_online_cpus(task_cs(tsk), pmask);
+	task_unlock(tsk);
 	mutex_unlock(&callback_mutex);
 }
 
-/**
- * cpuset_cpus_allowed_locked - return cpus_allowed mask from a tasks cpuset.
- * Must be called with callback_mutex held.
- **/
-void cpuset_cpus_allowed_locked(struct task_struct *tsk, struct cpumask *pmask)
+int cpuset_cpus_allowed_fallback(struct task_struct *tsk)
 {
-	task_lock(tsk);
-	guarantee_online_cpus(task_cs(tsk), pmask);
-	task_unlock(tsk);
+	const struct cpuset *cs;
+	int cpu;
+
+	rcu_read_lock();
+	cs = task_cs(tsk);
+	if (cs)
+		cpumask_copy(&tsk->cpus_allowed, cs->cpus_allowed);
+	rcu_read_unlock();
+
+	/*
+	 * We own tsk->cpus_allowed, nobody can change it under us.
+	 *
+	 * But we used cs && cs->cpus_allowed lockless and thus can
+	 * race with cgroup_attach_task() or update_cpumask() and get
+	 * the wrong tsk->cpus_allowed. However, both cases imply the
+	 * subsequent cpuset_change_cpumask()->set_cpus_allowed_ptr()
+	 * which takes task_rq_lock().
+	 *
+	 * If we are called after it dropped the lock we must see all
+	 * changes in tsk_cs()->cpus_allowed. Otherwise we can temporary
+	 * set any mask even if it is not right from task_cs() pov,
+	 * the pending set_cpus_allowed_ptr() will fix things.
+	 */
+
+	cpu = cpumask_any_and(&tsk->cpus_allowed, cpu_active_mask);
+	if (cpu >= nr_cpu_ids) {
+		/*
+		 * Either tsk->cpus_allowed is wrong (see above) or it
+		 * is actually empty. The latter case is only possible
+		 * if we are racing with remove_tasks_in_empty_cpuset().
+		 * Like above we can temporary set any mask and rely on
+		 * set_cpus_allowed_ptr() as synchronization point.
+		 */
+		cpumask_copy(&tsk->cpus_allowed, cpu_possible_mask);
+		cpu = cpumask_any(cpu_active_mask);
+	}
+
+	return cpu;
 }
 
 void cpuset_init_current_mems_allowed(void)
@@ -2340,22 +2389,6 @@
 }
 
 /**
- * cpuset_lock - lock out any changes to cpuset structures
- *
- * The out of memory (oom) code needs to mutex_lock cpusets
- * from being changed while it scans the tasklist looking for a
- * task in an overlapping cpuset.  Expose callback_mutex via this
- * cpuset_lock() routine, so the oom code can lock it, before
- * locking the task list.  The tasklist_lock is a spinlock, so
- * must be taken inside callback_mutex.
- */
-
-void cpuset_lock(void)
-{
-	mutex_lock(&callback_mutex);
-}
-
-/**
  * cpuset_unlock - release lock on cpuset changes
  *
  * Undo the lock taken in a previous cpuset_lock() call.
--- linux-mvl-dove-2.6.32.orig/kernel/posix-timers.c
+++ linux-mvl-dove-2.6.32/kernel/posix-timers.c
@@ -559,14 +559,7 @@
 	new_timer->it_id = (timer_t) new_timer_id;
 	new_timer->it_clock = which_clock;
 	new_timer->it_overrun = -1;
-	error = CLOCK_DISPATCH(which_clock, timer_create, (new_timer));
-	if (error)
-		goto out;
 
-	/*
-	 * return the timer_id now.  The next step is hard to
-	 * back out if there is an error.
-	 */
 	if (copy_to_user(created_timer_id,
 			 &new_timer_id, sizeof (new_timer_id))) {
 		error = -EFAULT;
@@ -597,6 +590,10 @@
 	new_timer->sigq->info.si_tid   = new_timer->it_id;
 	new_timer->sigq->info.si_code  = SI_TIMER;
 
+	error = CLOCK_DISPATCH(which_clock, timer_create, (new_timer));
+	if (error)
+		goto out;
+
 	spin_lock_irq(&current->sighand->siglock);
 	new_timer->it_signal = current->signal;
 	list_add(&new_timer->list, &current->signal->posix_timers);
--- linux-mvl-dove-2.6.32.orig/kernel/cpu.c
+++ linux-mvl-dove-2.6.32/kernel/cpu.c
@@ -151,7 +151,7 @@
 
 	write_lock_irq(&tasklist_lock);
 	for_each_process(p) {
-		if (task_cpu(p) == cpu &&
+		if (task_cpu(p) == cpu && p->state == TASK_RUNNING &&
 		    (!cputime_eq(p->utime, cputime_zero) ||
 		     !cputime_eq(p->stime, cputime_zero)))
 			printk(KERN_WARNING "Task %s (pid = %d) is on cpu %d\
@@ -163,6 +163,7 @@
 }
 
 struct take_cpu_down_param {
+	struct task_struct *caller;
 	unsigned long mod;
 	void *hcpu;
 };
@@ -171,6 +172,7 @@
 static int __ref take_cpu_down(void *_param)
 {
 	struct take_cpu_down_param *param = _param;
+	unsigned int cpu = (unsigned long)param->hcpu;
 	int err;
 
 	/* Ensure this CPU doesn't handle any more interrupts. */
@@ -181,6 +183,8 @@
 	raw_notifier_call_chain(&cpu_chain, CPU_DYING | param->mod,
 				param->hcpu);
 
+	if (task_cpu(param->caller) == cpu)
+		move_task_off_dead_cpu(cpu, param->caller);
 	/* Force idle task to run as soon as we yield: it should
 	   immediately notice cpu is offline and die quickly. */
 	sched_idle_next();
@@ -191,10 +195,10 @@
 static int __ref _cpu_down(unsigned int cpu, int tasks_frozen)
 {
 	int err, nr_calls = 0;
-	cpumask_var_t old_allowed;
 	void *hcpu = (void *)(long)cpu;
 	unsigned long mod = tasks_frozen ? CPU_TASKS_FROZEN : 0;
 	struct take_cpu_down_param tcd_param = {
+		.caller = current,
 		.mod = mod,
 		.hcpu = hcpu,
 	};
@@ -205,13 +209,13 @@
 	if (!cpu_online(cpu))
 		return -EINVAL;
 
-	if (!alloc_cpumask_var(&old_allowed, GFP_KERNEL))
-		return -ENOMEM;
-
 	cpu_hotplug_begin();
+	set_cpu_active(cpu, false);
 	err = __raw_notifier_call_chain(&cpu_chain, CPU_DOWN_PREPARE | mod,
 					hcpu, -1, &nr_calls);
 	if (err == NOTIFY_BAD) {
+		set_cpu_active(cpu, true);
+
 		nr_calls--;
 		__raw_notifier_call_chain(&cpu_chain, CPU_DOWN_FAILED | mod,
 					  hcpu, nr_calls, NULL);
@@ -221,19 +225,15 @@
 		goto out_release;
 	}
 
-	/* Ensure that we are not runnable on dying cpu */
-	cpumask_copy(old_allowed, &current->cpus_allowed);
-	set_cpus_allowed_ptr(current,
-			     cpumask_of(cpumask_any_but(cpu_online_mask, cpu)));
-
 	err = __stop_machine(take_cpu_down, &tcd_param, cpumask_of(cpu));
 	if (err) {
+		set_cpu_active(cpu, true);
 		/* CPU didn't die: tell everyone.  Can't complain. */
 		if (raw_notifier_call_chain(&cpu_chain, CPU_DOWN_FAILED | mod,
 					    hcpu) == NOTIFY_BAD)
 			BUG();
 
-		goto out_allowed;
+		goto out_release;
 	}
 	BUG_ON(cpu_online(cpu));
 
@@ -251,8 +251,6 @@
 
 	check_for_tasks(cpu);
 
-out_allowed:
-	set_cpus_allowed_ptr(current, old_allowed);
 out_release:
 	cpu_hotplug_done();
 	if (!err) {
@@ -260,7 +258,6 @@
 					    hcpu) == NOTIFY_BAD)
 			BUG();
 	}
-	free_cpumask_var(old_allowed);
 	return err;
 }
 
@@ -278,23 +275,8 @@
 		goto out;
 	}
 
-	set_cpu_active(cpu, false);
-
-	/*
-	 * Make sure the all cpus did the reschedule and are not
-	 * using stale version of the cpu_active_mask.
-	 * This is not strictly necessary becuase stop_machine()
-	 * that we run down the line already provides the required
-	 * synchronization. But it's really a side effect and we do not
-	 * want to depend on the innards of the stop_machine here.
-	 */
-	synchronize_sched();
-
 	err = _cpu_down(cpu, 0);
 
-	if (cpu_online(cpu))
-		set_cpu_active(cpu, true);
-
 out:
 	cpu_maps_update_done();
 	stop_machine_destroy();
@@ -383,19 +365,20 @@
 		return error;
 	cpu_maps_update_begin();
 	first_cpu = cpumask_first(cpu_online_mask);
-	/* We take down all of the non-boot CPUs in one shot to avoid races
+	/*
+	 * We take down all of the non-boot CPUs in one shot to avoid races
 	 * with the userspace trying to use the CPU hotplug at the same time
 	 */
 	cpumask_clear(frozen_cpus);
+
 	printk("Disabling non-boot CPUs ...\n");
 	for_each_online_cpu(cpu) {
 		if (cpu == first_cpu)
 			continue;
 		error = _cpu_down(cpu, 1);
-		if (!error) {
+		if (!error)
 			cpumask_set_cpu(cpu, frozen_cpus);
-			printk("CPU%d is down\n", cpu);
-		} else {
+		else {
 			printk(KERN_ERR "Error taking CPU%d down: %d\n",
 				cpu, error);
 			break;
--- linux-mvl-dove-2.6.32.orig/kernel/kthread.c
+++ linux-mvl-dove-2.6.32/kernel/kthread.c
@@ -196,7 +196,7 @@
 	set_task_comm(tsk, "kthreadd");
 	ignore_signals(tsk);
 	set_cpus_allowed_ptr(tsk, cpu_all_mask);
-	set_mems_allowed(node_possible_map);
+	set_mems_allowed(node_states[N_HIGH_MEMORY]);
 
 	current->flags |= PF_NOFREEZE | PF_FREEZER_NOSIG;
 
--- linux-mvl-dove-2.6.32.orig/kernel/cgroup.c
+++ linux-mvl-dove-2.6.32/kernel/cgroup.c
@@ -51,6 +51,7 @@
 #include <linux/pid_namespace.h>
 #include <linux/idr.h>
 #include <linux/vmalloc.h> /* TODO: replace with more sophisticated array */
+#include <linux/capability.h>
 
 #include <asm/atomic.h>
 
@@ -1555,6 +1556,15 @@
 			retval = ss->can_attach(ss, cgrp, tsk, false);
 			if (retval)
 				return retval;
+		} else if (!capable(CAP_SYS_ADMIN)) {
+			const struct cred *cred = current_cred(), *tcred;
+
+			/* No can_attach() - check perms generically */
+			tcred = __task_cred(tsk);
+			if (cred->euid != tcred->uid &&
+			    cred->euid != tcred->suid) {
+				return -EACCES;
+			}
 		}
 	}
 
@@ -1611,7 +1621,6 @@
 static int attach_task_by_pid(struct cgroup *cgrp, u64 pid)
 {
 	struct task_struct *tsk;
-	const struct cred *cred = current_cred(), *tcred;
 	int ret;
 
 	if (pid) {
@@ -1621,14 +1630,6 @@
 			rcu_read_unlock();
 			return -ESRCH;
 		}
-
-		tcred = __task_cred(tsk);
-		if (cred->euid &&
-		    cred->euid != tcred->uid &&
-		    cred->euid != tcred->suid) {
-			rcu_read_unlock();
-			return -EACCES;
-		}
 		get_task_struct(tsk);
 		rcu_read_unlock();
 	} else {
@@ -2468,7 +2469,6 @@
 			/* make sure l doesn't vanish out from under us */
 			down_write(&l->mutex);
 			mutex_unlock(&cgrp->pidlist_mutex);
-			l->use_count++;
 			return l;
 		}
 	}
--- linux-mvl-dove-2.6.32.orig/kernel/sched_debug.c
+++ linux-mvl-dove-2.6.32/kernel/sched_debug.c
@@ -173,11 +173,6 @@
 	task_group_path(tg, path, sizeof(path));
 
 	SEQ_printf(m, "\ncfs_rq[%d]:%s\n", cpu, path);
-#elif defined(CONFIG_USER_SCHED) && defined(CONFIG_FAIR_GROUP_SCHED)
-	{
-		uid_t uid = cfs_rq->tg->uid;
-		SEQ_printf(m, "\ncfs_rq[%d] for UID: %u\n", cpu, uid);
-	}
 #else
 	SEQ_printf(m, "\ncfs_rq[%d]:\n", cpu);
 #endif
@@ -285,12 +280,16 @@
 
 #ifdef CONFIG_SCHEDSTATS
 #define P(n) SEQ_printf(m, "  .%-30s: %d\n", #n, rq->n);
+#define P64(n) SEQ_printf(m, "  .%-30s: %Ld\n", #n, rq->n);
 
 	P(yld_count);
 
 	P(sched_switch);
 	P(sched_count);
 	P(sched_goidle);
+#ifdef CONFIG_SMP
+	P64(avg_idle);
+#endif
 
 	P(ttwu_count);
 	P(ttwu_local);
@@ -419,7 +418,6 @@
 	P(se.nr_failed_migrations_running);
 	P(se.nr_failed_migrations_hot);
 	P(se.nr_forced_migrations);
-	P(se.nr_forced2_migrations);
 	P(se.nr_wakeups);
 	P(se.nr_wakeups_sync);
 	P(se.nr_wakeups_migrate);
@@ -495,7 +493,6 @@
 	p->se.nr_failed_migrations_running	= 0;
 	p->se.nr_failed_migrations_hot		= 0;
 	p->se.nr_forced_migrations		= 0;
-	p->se.nr_forced2_migrations		= 0;
 	p->se.nr_wakeups			= 0;
 	p->se.nr_wakeups_sync			= 0;
 	p->se.nr_wakeups_migrate		= 0;
--- linux-mvl-dove-2.6.32.orig/kernel/ksysfs.c
+++ linux-mvl-dove-2.6.32/kernel/ksysfs.c
@@ -176,16 +176,8 @@
 			goto group_exit;
 	}
 
-	/* create the /sys/kernel/uids/ directory */
-	error = uids_sysfs_init();
-	if (error)
-		goto notes_exit;
-
 	return 0;
 
-notes_exit:
-	if (notes_size > 0)
-		sysfs_remove_bin_file(kernel_kobj, &notes_attr);
 group_exit:
 	sysfs_remove_group(kernel_kobj, &kernel_attr_group);
 kset_exit:
--- linux-mvl-dove-2.6.32.orig/kernel/timer.c
+++ linux-mvl-dove-2.6.32/kernel/timer.c
@@ -1173,6 +1173,12 @@
 	struct tvec_base *base = __get_cpu_var(tvec_bases);
 	unsigned long expires;
 
+	/*
+	 * Pretend that there is no timer pending if the cpu is offline.
+	 * Possible pending timers will be migrated later to an active cpu.
+	 */
+	if (cpu_is_offline(smp_processor_id()))
+		return now + NEXT_TIMER_MAX_DELTA;
 	spin_lock(&base->lock);
 	if (time_before_eq(base->next_timer, base->timer_jiffies))
 		base->next_timer = __next_timer_interrupt(base);
--- linux-mvl-dove-2.6.32.orig/kernel/futex.c
+++ linux-mvl-dove-2.6.32/kernel/futex.c
@@ -203,8 +203,6 @@
  * @uaddr:	virtual address of the futex
  * @fshared:	0 for a PROCESS_PRIVATE futex, 1 for PROCESS_SHARED
  * @key:	address where result is stored.
- * @rw:		mapping needs to be read/write (values: VERIFY_READ,
- * 		VERIFY_WRITE)
  *
  * Returns a negative error code or 0
  * The key words are stored in *key on success.
@@ -216,12 +214,13 @@
  * lock_page() might sleep, the caller should not hold a spinlock.
  */
 static int
-get_futex_key(u32 __user *uaddr, int fshared, union futex_key *key, int rw)
+get_futex_key(u32 __user *uaddr, int fshared, union futex_key *key)
 {
 	unsigned long address = (unsigned long)uaddr;
 	struct mm_struct *mm = current->mm;
 	struct page *page;
 	int err;
+	struct vm_area_struct *vma;
 
 	/*
 	 * The futex address must be "naturally" aligned.
@@ -239,7 +238,7 @@
 	 *        but access_ok() should be faster than find_vma()
 	 */
 	if (!fshared) {
-		if (unlikely(!access_ok(rw, uaddr, sizeof(u32))))
+		if (unlikely(!access_ok(VERIFY_WRITE, uaddr, sizeof(u32))))
 			return -EFAULT;
 		key->private.mm = mm;
 		key->private.address = address;
@@ -247,8 +246,39 @@
 		return 0;
 	}
 
+	/*
+	 * The futex is hashed differently depending on whether
+	 * it's in a shared or private mapping.  So check vma first.
+	 */
+	vma = find_extend_vma(mm, address);
+	if (unlikely(!vma))
+	return -EFAULT;
+
+	/*
+	 * Permissions.
+	 */
+	if (unlikely((vma->vm_flags & (VM_IO|VM_READ)) != VM_READ))
+		return (vma->vm_flags & VM_IO) ? -EPERM : -EACCES;
+
+	/*
+	 * Private mappings are handled in a simple way.
+	 *
+	 * NOTE: When userspace waits on a MAP_SHARED mapping, even if
+	 * it's a read-only handle, it's expected that futexes attach to
+	 * the object not the particular process.  Therefore we use
+	 * VM_MAYSHARE here, not VM_SHARED which is restricted to shared
+	 * mappings of _writable_ handles.
+	 */
+	if (likely(!(vma->vm_flags & VM_MAYSHARE))) {
+		key->both.offset |= FUT_OFF_MMSHARED; /* reference taken on mm */
+		key->private.mm = mm;
+		key->private.address = address;
+		get_futex_key_refs(key);
+		return 0;
+	}
+
 again:
-	err = get_user_pages_fast(address, 1, rw == VERIFY_WRITE, &page);
+	err = get_user_pages_fast(address, 1, 1, &page);
 	if (err < 0)
 		return err;
 
@@ -304,8 +334,14 @@
  */
 static int fault_in_user_writeable(u32 __user *uaddr)
 {
-	int ret = get_user_pages(current, current->mm, (unsigned long)uaddr,
-				 1, 1, 0, NULL, NULL);
+	struct mm_struct *mm = current->mm;
+	int ret;
+
+	down_read(&mm->mmap_sem);
+	ret = get_user_pages(current, mm, (unsigned long)uaddr,
+			     1, 1, 0, NULL, NULL);
+	up_read(&mm->mmap_sem);
+
 	return ret < 0 ? ret : 0;
 }
 
@@ -425,20 +461,11 @@
 static struct task_struct * futex_find_get_task(pid_t pid)
 {
 	struct task_struct *p;
-	const struct cred *cred = current_cred(), *pcred;
 
 	rcu_read_lock();
 	p = find_task_by_vpid(pid);
-	if (!p) {
-		p = ERR_PTR(-ESRCH);
-	} else {
-		pcred = __task_cred(p);
-		if (cred->euid != pcred->euid &&
-		    cred->euid != pcred->uid)
-			p = ERR_PTR(-ESRCH);
-		else
-			get_task_struct(p);
-	}
+	if (p)
+		get_task_struct(p);
 
 	rcu_read_unlock();
 
@@ -526,8 +553,25 @@
 				return -EINVAL;
 
 			WARN_ON(!atomic_read(&pi_state->refcount));
-			WARN_ON(pid && pi_state->owner &&
-				pi_state->owner->pid != pid);
+
+			/*
+			 * When pi_state->owner is NULL then the owner died
+			 * and another waiter is on the fly. pi_state->owner
+			 * is fixed up by the task which acquires
+			 * pi_state->rt_mutex.
+			 *
+			 * We do not check for pid == 0 which can happen when
+			 * the owner died and robust_list_exit() cleared the
+			 * TID.
+			 */
+			if (pid && pi_state->owner) {
+				/*
+				 * Bail out if user space manipulated the
+				 * futex value.
+				 */
+				if (pid != task_pid_vnr(pi_state->owner))
+					return -EINVAL;
+			}
 
 			atomic_inc(&pi_state->refcount);
 			*ps = pi_state;
@@ -543,8 +587,8 @@
 	if (!pid)
 		return -ESRCH;
 	p = futex_find_get_task(pid);
-	if (IS_ERR(p))
-		return PTR_ERR(p);
+	if (!p)
+		return -ESRCH;
 
 	/*
 	 * We need to look at the task state flags to figure out,
@@ -754,6 +798,13 @@
 	if (!pi_state)
 		return -EINVAL;
 
+	/*
+	 * If current does not own the pi_state then the futex is
+	 * inconsistent and user space fiddled with the futex value.
+	 */
+	if (pi_state->owner != current)
+		return -EINVAL;
+
 	spin_lock(&pi_state->pi_mutex.wait_lock);
 	new_owner = rt_mutex_next_owner(&pi_state->pi_mutex);
 
@@ -861,7 +912,7 @@
 	if (!bitset)
 		return -EINVAL;
 
-	ret = get_futex_key(uaddr, fshared, &key, VERIFY_READ);
+	ret = get_futex_key(uaddr, fshared, &key);
 	if (unlikely(ret != 0))
 		goto out;
 
@@ -907,10 +958,10 @@
 	int ret, op_ret;
 
 retry:
-	ret = get_futex_key(uaddr1, fshared, &key1, VERIFY_READ);
+	ret = get_futex_key(uaddr1, fshared, &key1);
 	if (unlikely(ret != 0))
 		goto out;
-	ret = get_futex_key(uaddr2, fshared, &key2, VERIFY_WRITE);
+	ret = get_futex_key(uaddr2, fshared, &key2);
 	if (unlikely(ret != 0))
 		goto out_put_key1;
 
@@ -1169,11 +1220,10 @@
 		pi_state = NULL;
 	}
 
-	ret = get_futex_key(uaddr1, fshared, &key1, VERIFY_READ);
+	ret = get_futex_key(uaddr1, fshared, &key1);
 	if (unlikely(ret != 0))
 		goto out;
-	ret = get_futex_key(uaddr2, fshared, &key2,
-			    requeue_pi ? VERIFY_WRITE : VERIFY_READ);
+	ret = get_futex_key(uaddr2, fshared, &key2);
 	if (unlikely(ret != 0))
 		goto out_put_key1;
 
@@ -1345,7 +1395,6 @@
 {
 	struct futex_hash_bucket *hb;
 
-	get_futex_key_refs(&q->key);
 	hb = hash_futex(&q->key);
 	q->lock_ptr = &hb->lock;
 
@@ -1357,7 +1406,6 @@
 queue_unlock(struct futex_q *q, struct futex_hash_bucket *hb)
 {
 	spin_unlock(&hb->lock);
-	drop_futex_key_refs(&q->key);
 }
 
 /**
@@ -1462,8 +1510,6 @@
 	q->pi_state = NULL;
 
 	spin_unlock(q->lock_ptr);
-
-	drop_futex_key_refs(&q->key);
 }
 
 /*
@@ -1732,7 +1778,7 @@
 	 */
 retry:
 	q->key = FUTEX_KEY_INIT;
-	ret = get_futex_key(uaddr, fshared, &q->key, VERIFY_READ);
+	ret = get_futex_key(uaddr, fshared, &q->key);
 	if (unlikely(ret != 0))
 		return ret;
 
@@ -1794,7 +1840,10 @@
 	}
 
 retry:
-	/* Prepare to wait on uaddr. */
+	/*
+	 * Prepare to wait on uaddr. On success, holds hb lock and increments
+	 * q.key refs.
+	 */
 	ret = futex_wait_setup(uaddr, val, fshared, &q, &hb);
 	if (ret)
 		goto out;
@@ -1804,24 +1853,23 @@
 
 	/* If we were woken (and unqueued), we succeeded, whatever. */
 	ret = 0;
+	/* unqueue_me() drops q.key ref */
 	if (!unqueue_me(&q))
-		goto out_put_key;
+		goto out;
 	ret = -ETIMEDOUT;
 	if (to && !to->task)
-		goto out_put_key;
+		goto out;
 
 	/*
 	 * We expect signal_pending(current), but we might be the
 	 * victim of a spurious wakeup as well.
 	 */
-	if (!signal_pending(current)) {
-		put_futex_key(fshared, &q.key);
+	if (!signal_pending(current))
 		goto retry;
-	}
 
 	ret = -ERESTARTSYS;
 	if (!abs_time)
-		goto out_put_key;
+		goto out;
 
 	restart = &current_thread_info()->restart_block;
 	restart->fn = futex_wait_restart;
@@ -1838,8 +1886,6 @@
 
 	ret = -ERESTART_RESTARTBLOCK;
 
-out_put_key:
-	put_futex_key(fshared, &q.key);
 out:
 	if (to) {
 		hrtimer_cancel(&to->timer);
@@ -1898,7 +1944,7 @@
 	q.requeue_pi_key = NULL;
 retry:
 	q.key = FUTEX_KEY_INIT;
-	ret = get_futex_key(uaddr, fshared, &q.key, VERIFY_WRITE);
+	ret = get_futex_key(uaddr, fshared, &q.key);
 	if (unlikely(ret != 0))
 		goto out;
 
@@ -1968,7 +2014,7 @@
 	/* Unqueue and drop the lock */
 	unqueue_me_pi(&q);
 
-	goto out;
+	goto out_put_key;
 
 out_unlock_put_key:
 	queue_unlock(&q, hb);
@@ -2017,7 +2063,7 @@
 	if ((uval & FUTEX_TID_MASK) != task_pid_vnr(current))
 		return -EPERM;
 
-	ret = get_futex_key(uaddr, fshared, &key, VERIFY_WRITE);
+	ret = get_futex_key(uaddr, fshared, &key);
 	if (unlikely(ret != 0))
 		goto out;
 
@@ -2209,7 +2255,7 @@
 	rt_waiter.task = NULL;
 
 	key2 = FUTEX_KEY_INIT;
-	ret = get_futex_key(uaddr2, fshared, &key2, VERIFY_WRITE);
+	ret = get_futex_key(uaddr2, fshared, &key2);
 	if (unlikely(ret != 0))
 		goto out;
 
@@ -2218,7 +2264,10 @@
 	q.rt_waiter = &rt_waiter;
 	q.requeue_pi_key = &key2;
 
-	/* Prepare to wait on uaddr. */
+	/*
+	 * Prepare to wait on uaddr. On success, increments q.key (key1) ref
+	 * count.
+	 */
 	ret = futex_wait_setup(uaddr, val, fshared, &q, &hb);
 	if (ret)
 		goto out_key2;
@@ -2236,7 +2285,9 @@
 	 * In order for us to be here, we know our q.key == key2, and since
 	 * we took the hb->lock above, we also know that futex_requeue() has
 	 * completed and we no longer have to concern ourselves with a wakeup
-	 * race with the atomic proxy lock acquition by the requeue code.
+	 * race with the atomic proxy lock acquisition by the requeue code. The
+	 * futex_requeue dropped our key1 reference and incremented our key2
+	 * reference count.
 	 */
 
 	/* Check if the requeue code acquired the second futex for us. */
--- linux-mvl-dove-2.6.32.orig/kernel/pid.c
+++ linux-mvl-dove-2.6.32/kernel/pid.c
@@ -182,11 +182,14 @@
 	return -1;
 }
 
-int next_pidmap(struct pid_namespace *pid_ns, int last)
+int next_pidmap(struct pid_namespace *pid_ns, unsigned int last)
 {
 	int offset;
 	struct pidmap *map, *end;
 
+	if (last >= PID_MAX_LIMIT)
+		return -1;
+
 	offset = (last + 1) & BITS_PER_PAGE_MASK;
 	map = &pid_ns->pidmap[(last + 1)/BITS_PER_PAGE];
 	end = &pid_ns->pidmap[PIDMAP_ENTRIES];
@@ -388,6 +391,8 @@
 	return find_task_by_pid_ns(vnr, current->nsproxy->pid_ns);
 }
 
+EXPORT_SYMBOL_GPL(find_task_by_vpid);
+
 struct pid *get_task_pid(struct task_struct *task, enum pid_type type)
 {
 	struct pid *pid;
--- linux-mvl-dove-2.6.32.orig/kernel/smp.c
+++ linux-mvl-dove-2.6.32/kernel/smp.c
@@ -193,6 +193,24 @@
 	list_for_each_entry_rcu(data, &call_function.queue, csd.list) {
 		int refs;
 
+		/*
+		 * Since we walk the list without any locks, we might
+		 * see an entry that was completed, removed from the
+		 * list and is in the process of being reused.
+		 *
+		 * We must check that the cpu is in the cpumask before
+		 * checking the refs, and both must be set before
+		 * executing the callback on this cpu.
+		 */
+
+		if (!cpumask_test_cpu(cpu, data->cpumask))
+			continue;
+
+		smp_rmb();
+
+		if (atomic_read(&data->refs) == 0)
+			continue;
+
 		if (!cpumask_test_and_clear_cpu(cpu, data->cpumask))
 			continue;
 
@@ -201,6 +219,8 @@
 		refs = atomic_dec_return(&data->refs);
 		WARN_ON(refs < 0);
 		if (!refs) {
+			WARN_ON(!cpumask_empty(data->cpumask));
+
 			spin_lock(&call_function.lock);
 			list_del_rcu(&data->csd.list);
 			spin_unlock(&call_function.lock);
@@ -368,7 +388,7 @@
 {
 	struct call_function_data *data;
 	unsigned long flags;
-	int cpu, next_cpu, this_cpu = smp_processor_id();
+	int refs, cpu, next_cpu, this_cpu = smp_processor_id();
 
 	/*
 	 * Can deadlock when called with interrupts disabled.
@@ -379,7 +399,7 @@
 	WARN_ON_ONCE(cpu_online(this_cpu) && irqs_disabled()
 		     && !oops_in_progress);
 
-	/* So, what's a CPU they want? Ignoring this one. */
+	/* Try to fastpath.  So, what's a CPU they want? Ignoring this one. */
 	cpu = cpumask_first_and(mask, cpu_online_mask);
 	if (cpu == this_cpu)
 		cpu = cpumask_next_and(cpu, mask, cpu_online_mask);
@@ -402,11 +422,48 @@
 	data = &__get_cpu_var(cfd_data);
 	csd_lock(&data->csd);
 
+	/* This BUG_ON verifies our reuse assertions and can be removed */
+	BUG_ON(atomic_read(&data->refs) || !cpumask_empty(data->cpumask));
+
+	/*
+	 * The global call function queue list add and delete are protected
+	 * by a lock, but the list is traversed without any lock, relying
+	 * on the rcu list add and delete to allow safe concurrent traversal.
+	 * We reuse the call function data without waiting for any grace
+	 * period after some other cpu removes it from the global queue.
+	 * This means a cpu might find our data block as it is being
+	 * filled out.
+	 *
+	 * We hold off the interrupt handler on the other cpu by
+	 * ordering our writes to the cpu mask vs our setting of the
+	 * refs counter.  We assert only the cpu owning the data block
+	 * will set a bit in cpumask, and each bit will only be cleared
+	 * by the subject cpu.  Each cpu must first find its bit is
+	 * set and then check that refs is set indicating the element is
+	 * ready to be processed, otherwise it must skip the entry.
+	 *
+	 * On the previous iteration refs was set to 0 by another cpu.
+	 * To avoid the use of transitivity, set the counter to 0 here
+	 * so the wmb will pair with the rmb in the interrupt handler.
+	 */
+	atomic_set(&data->refs, 0);	/* convert 3rd to 1st party write */
+
 	data->csd.func = func;
 	data->csd.info = info;
+
+	/* Ensure 0 refs is visible before mask.  Also orders func and info */
+	smp_wmb();
+
+	/* We rely on the "and" being processed before the store */
 	cpumask_and(data->cpumask, mask, cpu_online_mask);
 	cpumask_clear_cpu(this_cpu, data->cpumask);
-	atomic_set(&data->refs, cpumask_weight(data->cpumask));
+	refs = cpumask_weight(data->cpumask);
+
+	/* Some callers race with other cpus changing the passed mask */
+	if (unlikely(!refs)) {
+		csd_unlock(&data->csd);
+		return;
+	}
 
 	spin_lock_irqsave(&call_function.lock, flags);
 	/*
@@ -415,6 +472,12 @@
 	 * will not miss any other list entries:
 	 */
 	list_add_rcu(&data->csd.list, &call_function.queue);
+	/*
+	 * We rely on the wmb() in list_add_rcu to complete our writes
+	 * to the cpumask before this write to refs, which indicates
+	 * data is on the list and is ready to be processed.
+	 */
+	atomic_set(&data->refs, refs);
 	spin_unlock_irqrestore(&call_function.lock, flags);
 
 	/*
--- linux-mvl-dove-2.6.32.orig/kernel/sched.c
+++ linux-mvl-dove-2.6.32/kernel/sched.c
@@ -233,7 +233,7 @@
  */
 static DEFINE_MUTEX(sched_domains_mutex);
 
-#ifdef CONFIG_GROUP_SCHED
+#ifdef CONFIG_CGROUP_SCHED
 
 #include <linux/cgroup.h>
 
@@ -243,13 +243,7 @@
 
 /* task group related information */
 struct task_group {
-#ifdef CONFIG_CGROUP_SCHED
 	struct cgroup_subsys_state css;
-#endif
-
-#ifdef CONFIG_USER_SCHED
-	uid_t uid;
-#endif
 
 #ifdef CONFIG_FAIR_GROUP_SCHED
 	/* schedulable entities of this group on each cpu */
@@ -274,35 +268,7 @@
 	struct list_head children;
 };
 
-#ifdef CONFIG_USER_SCHED
-
-/* Helper function to pass uid information to create_sched_user() */
-void set_tg_uid(struct user_struct *user)
-{
-	user->tg->uid = user->uid;
-}
-
-/*
- * Root task group.
- *	Every UID task group (including init_task_group aka UID-0) will
- *	be a child to this group.
- */
-struct task_group root_task_group;
-
-#ifdef CONFIG_FAIR_GROUP_SCHED
-/* Default task group's sched entity on each cpu */
-static DEFINE_PER_CPU(struct sched_entity, init_sched_entity);
-/* Default task group's cfs_rq on each cpu */
-static DEFINE_PER_CPU_SHARED_ALIGNED(struct cfs_rq, init_tg_cfs_rq);
-#endif /* CONFIG_FAIR_GROUP_SCHED */
-
-#ifdef CONFIG_RT_GROUP_SCHED
-static DEFINE_PER_CPU(struct sched_rt_entity, init_sched_rt_entity);
-static DEFINE_PER_CPU_SHARED_ALIGNED(struct rt_rq, init_rt_rq);
-#endif /* CONFIG_RT_GROUP_SCHED */
-#else /* !CONFIG_USER_SCHED */
 #define root_task_group init_task_group
-#endif /* CONFIG_USER_SCHED */
 
 /* task_group_lock serializes add/remove of task groups and also changes to
  * a task group's cpu shares.
@@ -318,11 +284,7 @@
 }
 #endif
 
-#ifdef CONFIG_USER_SCHED
-# define INIT_TASK_GROUP_LOAD	(2*NICE_0_LOAD)
-#else /* !CONFIG_USER_SCHED */
 # define INIT_TASK_GROUP_LOAD	NICE_0_LOAD
-#endif /* CONFIG_USER_SCHED */
 
 /*
  * A weight of 0 or 1 can cause arithmetics problems.
@@ -348,11 +310,7 @@
 {
 	struct task_group *tg;
 
-#ifdef CONFIG_USER_SCHED
-	rcu_read_lock();
-	tg = __task_cred(p)->user->tg;
-	rcu_read_unlock();
-#elif defined(CONFIG_CGROUP_SCHED)
+#ifdef CONFIG_CGROUP_SCHED
 	tg = container_of(task_subsys_state(p, cpu_cgroup_subsys_id),
 				struct task_group, css);
 #else
@@ -383,7 +341,7 @@
 	return NULL;
 }
 
-#endif	/* CONFIG_GROUP_SCHED */
+#endif	/* CONFIG_CGROUP_SCHED */
 
 /* CFS-related fields in a runqueue */
 struct cfs_rq {
@@ -542,7 +500,6 @@
 	struct load_weight load;
 	unsigned long nr_load_updates;
 	u64 nr_switches;
-	u64 nr_migrations_in;
 
 	struct cfs_rq cfs;
 	struct rt_rq rt;
@@ -568,6 +525,7 @@
 	struct mm_struct *prev_mm;
 
 	u64 clock;
+	u64 clock_task;
 
 	atomic_t nr_iowait;
 
@@ -575,6 +533,8 @@
 	struct root_domain *rd;
 	struct sched_domain *sd;
 
+	unsigned long cpu_power;
+
 	unsigned char idle_at_tick;
 	/* For active balancing */
 	int post_schedule;
@@ -591,6 +551,12 @@
 
 	u64 rt_avg;
 	u64 age_stamp;
+	u64 idle_stamp;
+	u64 avg_idle;
+#endif
+
+#ifdef CONFIG_IRQ_TIME_ACCOUNTING
+	u64 prev_irq_time;
 #endif
 
 	/* calc_load related fields */
@@ -630,11 +596,7 @@
 
 static DEFINE_PER_CPU_SHARED_ALIGNED(struct rq, runqueues);
 
-static inline
-void check_preempt_curr(struct rq *rq, struct task_struct *p, int flags)
-{
-	rq->curr->sched_class->check_preempt_curr(rq, p, flags);
-}
+static void check_preempt_curr(struct rq *rq, struct task_struct *p, int flags);
 
 static inline int cpu_of(struct rq *rq)
 {
@@ -661,9 +623,20 @@
 #define cpu_curr(cpu)		(cpu_rq(cpu)->curr)
 #define raw_rq()		(&__raw_get_cpu_var(runqueues))
 
+static u64 irq_time_cpu(int cpu);
+static void sched_irq_time_avg_update(struct rq *rq, u64 irq_time);
+
 inline void update_rq_clock(struct rq *rq)
 {
+	int cpu = cpu_of(rq);
+	u64 irq_time;
+
 	rq->clock = sched_clock_cpu(cpu_of(rq));
+	irq_time = irq_time_cpu(cpu);
+	if (rq->clock - irq_time > rq->clock_task)
+		rq->clock_task = rq->clock - irq_time;
+
+	sched_irq_time_avg_update(rq, irq_time);
 }
 
 /*
@@ -740,7 +713,7 @@
 		size_t cnt, loff_t *ppos)
 {
 	char buf[64];
-	char *cmp = buf;
+	char *cmp;
 	int neg = 0;
 	int i;
 
@@ -751,6 +724,7 @@
 		return -EFAULT;
 
 	buf[cnt] = 0;
+	cmp = strstrip(buf);
 
 	if (strncmp(buf, "NO_", 3) == 0) {
 		neg = 1;
@@ -758,9 +732,7 @@
 	}
 
 	for (i = 0; sched_feat_names[i]; i++) {
-		int len = strlen(sched_feat_names[i]);
-
-		if (strncmp(cmp, sched_feat_names[i], len) == 0) {
+		if (strcmp(cmp, sched_feat_names[i]) == 0) {
 			if (neg)
 				sysctl_sched_features &= ~(1UL << i);
 			else
@@ -814,6 +786,7 @@
  * default: 0.25ms
  */
 unsigned int sysctl_sched_shares_ratelimit = 250000;
+unsigned int normalized_sysctl_sched_shares_ratelimit = 250000;
 
 /*
  * Inject some fuzzyness into changing the per-cpu group shares
@@ -940,14 +913,25 @@
 #endif /* __ARCH_WANT_UNLOCKED_CTXSW */
 
 /*
+ * Check whether the task is waking, we use this to synchronize ->cpus_allowed
+ * against ttwu().
+ */
+static inline int task_is_waking(struct task_struct *p)
+{
+	return unlikely(p->state == TASK_WAKING);
+}
+
+/*
  * __task_rq_lock - lock the runqueue a given task resides on.
  * Must be called interrupts disabled.
  */
 static inline struct rq *__task_rq_lock(struct task_struct *p)
 	__acquires(rq->lock)
 {
+	struct rq *rq;
+
 	for (;;) {
-		struct rq *rq = task_rq(p);
+		rq = task_rq(p);
 		spin_lock(&rq->lock);
 		if (likely(rq == task_rq(p)))
 			return rq;
@@ -1258,6 +1242,12 @@
 	s64 period = sched_avg_period();
 
 	while ((s64)(rq->clock - rq->age_stamp) > period) {
+		/*
+		 * Inline assembly required to prevent the compiler
+		 * optimising this loop into a divmod call.
+		 * See __iter_div_u64_rem() for another example of this.
+		 */
+		asm("" : "+rm" (rq->age_stamp));
 		rq->age_stamp += period;
 		rq->rt_avg /= 2;
 	}
@@ -1279,6 +1269,10 @@
 static void sched_rt_avg_update(struct rq *rq, u64 rt_delta)
 {
 }
+
+static void sched_avg_update(struct rq *rq)
+{
+}
 #endif /* CONFIG_SMP */
 
 #if BITS_PER_LONG == 32
@@ -1528,24 +1522,9 @@
 	return max(rq->cpu_load[type-1], total);
 }
 
-static struct sched_group *group_of(int cpu)
-{
-	struct sched_domain *sd = rcu_dereference(cpu_rq(cpu)->sd);
-
-	if (!sd)
-		return NULL;
-
-	return sd->groups;
-}
-
 static unsigned long power_of(int cpu)
 {
-	struct sched_group *group = group_of(cpu);
-
-	if (!group)
-		return SCHED_LOAD_SCALE;
-
-	return group->cpu_power;
+	return cpu_rq(cpu)->cpu_power;
 }
 
 static int task_hot(struct task_struct *p, u64 now, struct sched_domain *sd);
@@ -1614,7 +1593,7 @@
  */
 static int tg_shares_up(struct task_group *tg, void *data)
 {
-	unsigned long weight, rq_weight = 0, shares = 0;
+	unsigned long weight, rq_weight = 0, sum_weight = 0, shares = 0;
 	unsigned long *usd_rq_weight;
 	struct sched_domain *sd = data;
 	unsigned long flags;
@@ -1630,6 +1609,7 @@
 		weight = tg->cfs_rq[i]->load.weight;
 		usd_rq_weight[i] = weight;
 
+		rq_weight += weight;
 		/*
 		 * If there are currently no tasks on the cpu pretend there
 		 * is one of average load so that when a new task gets to
@@ -1638,10 +1618,13 @@
 		if (!weight)
 			weight = NICE_0_LOAD;
 
-		rq_weight += weight;
+		sum_weight += weight;
 		shares += tg->cfs_rq[i]->shares;
 	}
 
+	if (!rq_weight)
+		rq_weight = sum_weight;
+
 	if ((!shares && rq_weight) || shares > tg->shares)
 		shares = tg->shares;
 
@@ -1708,9 +1691,6 @@
 
 static void update_h_load(long cpu)
 {
-	if (root_task_group_empty())
-		return;
-
 	walk_tg_tree(tg_load_down, tg_nop, (void *)cpu);
 }
 
@@ -1810,6 +1790,109 @@
 #endif
 
 static void calc_load_account_active(struct rq *this_rq);
+static void update_sysctl(void);
+
+static inline void __set_task_cpu(struct task_struct *p, unsigned int cpu)
+{
+	set_task_rq(p, cpu);
+#ifdef CONFIG_SMP
+	/*
+	 * After ->cpu is set up to a new value, task_rq_lock(p, ...) can be
+	 * successfuly executed on another CPU. We must ensure that updates of
+	 * per-task data have been completed by this moment.
+	 */
+	smp_wmb();
+	task_thread_info(p)->cpu = cpu;
+#endif
+}
+
+#ifdef CONFIG_IRQ_TIME_ACCOUNTING
+
+/*
+ * There are no locks covering percpu hardirq/softirq time.
+ * They are only modified in account_system_vtime, on corresponding CPU
+ * with interrupts disabled. So, writes are safe.
+ * They are read and saved off onto struct rq in update_rq_clock().
+ * This may result in other CPU reading this CPU's irq time and can
+ * race with irq/account_system_vtime on this CPU. We would either get old
+ * or new value (or semi updated value on 32 bit) with a side effect of
+ * accounting a slice of irq time to wrong task when irq is in progress
+ * while we read rq->clock. That is a worthy compromise in place of having
+ * locks on each irq in account_system_time.
+ */
+static DEFINE_PER_CPU(u64, cpu_hardirq_time);
+static DEFINE_PER_CPU(u64, cpu_softirq_time);
+
+static DEFINE_PER_CPU(u64, irq_start_time);
+static int sched_clock_irqtime;
+
+void enable_sched_clock_irqtime(void)
+{
+	sched_clock_irqtime = 1;
+}
+
+void disable_sched_clock_irqtime(void)
+{
+	sched_clock_irqtime = 0;
+}
+
+static u64 irq_time_cpu(int cpu)
+{
+	if (!sched_clock_irqtime)
+		return 0;
+
+	return per_cpu(cpu_softirq_time, cpu) + per_cpu(cpu_hardirq_time, cpu);
+}
+
+void account_system_vtime(struct task_struct *curr)
+{
+	unsigned long flags;
+	int cpu;
+	u64 now, delta;
+
+	if (!sched_clock_irqtime)
+		return;
+
+	local_irq_save(flags);
+
+	cpu = smp_processor_id();
+	now = sched_clock_cpu(cpu);
+	delta = now - per_cpu(irq_start_time, cpu);
+	per_cpu(irq_start_time, cpu) = now;
+	/*
+	 * We do not account for softirq time from ksoftirqd here.
+	 * We want to continue accounting softirq time to ksoftirqd thread
+	 * in that case, so as not to confuse scheduler with a special task
+	 * that do not consume any time, but still wants to run.
+	 */
+	if (hardirq_count())
+		per_cpu(cpu_hardirq_time, cpu) += delta;
+	else if (in_serving_softirq() && !(curr->flags & PF_KSOFTIRQD))
+		per_cpu(cpu_softirq_time, cpu) += delta;
+
+	local_irq_restore(flags);
+}
+EXPORT_SYMBOL_GPL(account_system_vtime);
+
+static void sched_irq_time_avg_update(struct rq *rq, u64 curr_irq_time)
+{
+	if (sched_clock_irqtime && sched_feat(NONIRQ_POWER)) {
+		u64 delta_irq = curr_irq_time - rq->prev_irq_time;
+		rq->prev_irq_time = curr_irq_time;
+		sched_rt_avg_update(rq, delta_irq);
+	}
+}
+
+#else
+
+static u64 irq_time_cpu(int cpu)
+{
+	return 0;
+}
+
+static void sched_irq_time_avg_update(struct rq *rq, u64 curr_irq_time) { }
+
+#endif
 
 #include "sched_stats.h"
 #include "sched_idletask.c"
@@ -1836,8 +1919,8 @@
 static void set_load_weight(struct task_struct *p)
 {
 	if (task_has_rt_policy(p)) {
-		p->se.load.weight = prio_to_weight[0] * 2;
-		p->se.load.inv_weight = prio_to_wmult[0] >> 1;
+		p->se.load.weight = 0;
+		p->se.load.inv_weight = WMULT_CONST;
 		return;
 	}
 
@@ -1860,13 +1943,14 @@
 	*avg += diff >> 3;
 }
 
-static void enqueue_task(struct rq *rq, struct task_struct *p, int wakeup)
+static void
+enqueue_task(struct rq *rq, struct task_struct *p, int wakeup, bool head)
 {
 	if (wakeup)
 		p->se.start_runtime = p->se.sum_exec_runtime;
 
 	sched_info_queued(p);
-	p->sched_class->enqueue_task(rq, p, wakeup);
+	p->sched_class->enqueue_task(rq, p, wakeup, head);
 	p->se.on_rq = 1;
 }
 
@@ -1942,7 +2026,7 @@
 	if (task_contributes_to_load(p))
 		rq->nr_uninterruptible--;
 
-	enqueue_task(rq, p, wakeup);
+	enqueue_task(rq, p, wakeup, false);
 	inc_nr_running(rq);
 }
 
@@ -1967,20 +2051,6 @@
 	return cpu_curr(task_cpu(p)) == p;
 }
 
-static inline void __set_task_cpu(struct task_struct *p, unsigned int cpu)
-{
-	set_task_rq(p, cpu);
-#ifdef CONFIG_SMP
-	/*
-	 * After ->cpu is set up to a new value, task_rq_lock(p, ...) can be
-	 * successfuly executed on another CPU. We must ensure that updates of
-	 * per-task data have been completed by this moment.
-	 */
-	smp_wmb();
-	task_thread_info(p)->cpu = cpu;
-#endif
-}
-
 static inline void check_class_changed(struct rq *rq, struct task_struct *p,
 				       const struct sched_class *prev_class,
 				       int oldprio, int running)
@@ -2007,21 +2077,15 @@
  */
 void kthread_bind(struct task_struct *p, unsigned int cpu)
 {
-	struct rq *rq = cpu_rq(cpu);
-	unsigned long flags;
-
 	/* Must have done schedule() in kthread() before we set_task_cpu */
 	if (!wait_task_inactive(p, TASK_UNINTERRUPTIBLE)) {
 		WARN_ON(1);
 		return;
 	}
 
-	spin_lock_irqsave(&rq->lock, flags);
-	set_task_cpu(p, cpu);
 	p->cpus_allowed = cpumask_of_cpu(cpu);
 	p->rt.nr_cpus_allowed = 1;
 	p->flags |= PF_THREAD_BOUND;
-	spin_unlock_irqrestore(&rq->lock, flags);
 }
 EXPORT_SYMBOL(kthread_bind);
 
@@ -2034,6 +2098,12 @@
 {
 	s64 delta;
 
+	if (p->sched_class != &fair_sched_class)
+		return 0;
+
+	if (unlikely(p->policy == SCHED_IDLE))
+		return 0;
+
 	/*
 	 * Buddy candidates are cache hot:
 	 */
@@ -2042,9 +2112,6 @@
 			 &p->se == cfs_rq_of(&p->se)->last))
 		return 1;
 
-	if (p->sched_class != &fair_sched_class)
-		return 0;
-
 	if (sysctl_sched_migration_cost == -1)
 		return 1;
 	if (sysctl_sched_migration_cost == 0)
@@ -2059,35 +2126,23 @@
 void set_task_cpu(struct task_struct *p, unsigned int new_cpu)
 {
 	int old_cpu = task_cpu(p);
-	struct rq *old_rq = cpu_rq(old_cpu), *new_rq = cpu_rq(new_cpu);
-	struct cfs_rq *old_cfsrq = task_cfs_rq(p),
-		      *new_cfsrq = cpu_cfs_rq(old_cfsrq, new_cpu);
-	u64 clock_offset;
 
-	clock_offset = old_rq->clock - new_rq->clock;
+#ifdef CONFIG_SCHED_DEBUG
+	/*
+	 * We should never call set_task_cpu() on a blocked task,
+	 * ttwu() will sort out the placement.
+	 */
+	WARN_ON_ONCE(p->state != TASK_RUNNING && p->state != TASK_WAKING &&
+			!(task_thread_info(p)->preempt_count & PREEMPT_ACTIVE));
+#endif
 
 	trace_sched_migrate_task(p, new_cpu);
 
-#ifdef CONFIG_SCHEDSTATS
-	if (p->se.wait_start)
-		p->se.wait_start -= clock_offset;
-	if (p->se.sleep_start)
-		p->se.sleep_start -= clock_offset;
-	if (p->se.block_start)
-		p->se.block_start -= clock_offset;
-#endif
 	if (old_cpu != new_cpu) {
 		p->se.nr_migrations++;
-		new_rq->nr_migrations_in++;
-#ifdef CONFIG_SCHEDSTATS
-		if (task_hot(p, old_rq->clock, NULL))
-			schedstat_inc(p, se.nr_forced2_migrations);
-#endif
 		perf_sw_event(PERF_COUNT_SW_CPU_MIGRATIONS,
 				     1, 1, NULL, 0);
 	}
-	p->se.vruntime -= old_cfsrq->min_vruntime -
-					 new_cfsrq->min_vruntime;
 
 	__set_task_cpu(p, new_cpu);
 }
@@ -2112,12 +2167,10 @@
 
 	/*
 	 * If the task is not on a runqueue (and not running), then
-	 * it is sufficient to simply update the task's cpu field.
+	 * the next wake-up will properly place the task.
 	 */
-	if (!p->se.on_rq && !task_running(rq, p)) {
-		set_task_cpu(p, dest_cpu);
+	if (!p->se.on_rq && !task_running(rq, p))
 		return 0;
-	}
 
 	init_completion(&req->done);
 	req->task = p;
@@ -2322,6 +2375,87 @@
 	preempt_enable();
 }
 
+static void check_preempt_curr(struct rq *rq, struct task_struct *p, int flags)
+{
+	const struct sched_class *class;
+
+	if (p->sched_class == rq->curr->sched_class) {
+		rq->curr->sched_class->check_preempt_curr(rq, p, flags);
+	} else {
+		for_each_class(class) {
+			if (class == rq->curr->sched_class)
+				break;
+			if (class == p->sched_class) {
+				resched_task(rq->curr);
+				break;
+			}
+		}
+	}
+}
+
+#ifdef CONFIG_SMP
+/*
+ * ->cpus_allowed is protected by either TASK_WAKING or rq->lock held.
+ */
+static int select_fallback_rq(int cpu, struct task_struct *p)
+{
+	int dest_cpu;
+	const struct cpumask *nodemask = cpumask_of_node(cpu_to_node(cpu));
+
+	/* Look for allowed, online CPU in same node. */
+	for_each_cpu_and(dest_cpu, nodemask, cpu_active_mask)
+		if (cpumask_test_cpu(dest_cpu, &p->cpus_allowed))
+			return dest_cpu;
+
+	/* Any allowed, online CPU? */
+	dest_cpu = cpumask_any_and(&p->cpus_allowed, cpu_active_mask);
+	if (dest_cpu < nr_cpu_ids)
+		return dest_cpu;
+
+	/* No more Mr. Nice Guy. */
+	if (unlikely(dest_cpu >= nr_cpu_ids)) {
+		dest_cpu = cpuset_cpus_allowed_fallback(p);
+		/*
+		 * Don't tell them about moving exiting tasks or
+		 * kernel threads (both mm NULL), since they never
+		 * leave kernel.
+		 */
+		if (p->mm && printk_ratelimit()) {
+			printk(KERN_INFO "process %d (%s) no "
+			       "longer affine to cpu%d\n",
+			       task_pid_nr(p), p->comm, cpu);
+		}
+	}
+
+	return dest_cpu;
+}
+
+/*
+ * The caller (fork, wakeup) owns TASK_WAKING, ->cpus_allowed is stable.
+ */
+static inline
+int select_task_rq(struct rq *rq, struct task_struct *p, int sd_flags, int wake_flags)
+{
+	int cpu = p->sched_class->select_task_rq(rq, p, sd_flags, wake_flags);
+
+	/*
+	 * In order not to call set_task_cpu() on a blocking task we need
+	 * to rely on ttwu() to place the task on a valid ->cpus_allowed
+	 * cpu.
+	 *
+	 * Since this is common to all placement strategies, this lives here.
+	 *
+	 * [ this allows ->select_task() to simply return task_cpu(p) and
+	 *   not worry about this generic constraint ]
+	 */
+	if (unlikely(!cpumask_test_cpu(cpu, &p->cpus_allowed) ||
+		     !cpu_online(cpu)))
+		cpu = select_fallback_rq(task_cpu(p), p);
+
+	return cpu;
+}
+#endif
+
 /***
  * try_to_wake_up - wake up a thread
  * @p: the to-be-woken-up thread
@@ -2370,22 +2504,34 @@
 	 *
 	 * First fix up the nr_uninterruptible count:
 	 */
-	if (task_contributes_to_load(p))
-		rq->nr_uninterruptible--;
+	if (task_contributes_to_load(p)) {
+		if (likely(cpu_online(orig_cpu)))
+			rq->nr_uninterruptible--;
+		else
+			this_rq()->nr_uninterruptible--;
+	}
 	p->state = TASK_WAKING;
-	task_rq_unlock(rq, &flags);
 
-	cpu = p->sched_class->select_task_rq(p, SD_BALANCE_WAKE, wake_flags);
+	if (p->sched_class->task_waking)
+		p->sched_class->task_waking(rq, p);
+
+	cpu = select_task_rq(rq, p, SD_BALANCE_WAKE, wake_flags);
 	if (cpu != orig_cpu)
 		set_task_cpu(p, cpu);
+	__task_rq_unlock(rq);
 
-	rq = task_rq_lock(p, &flags);
-
-	if (rq != orig_rq)
-		update_rq_clock(rq);
+	rq = cpu_rq(cpu);
+	spin_lock(&rq->lock);
+	update_rq_clock(rq);
 
+	/*
+	 * We migrated the task without holding either rq->lock, however
+	 * since the task is not on the task list itself, nobody else
+	 * will try and migrate the task, hence the rq should match the
+	 * cpu we just moved it to.
+	 */
+	WARN_ON(task_cpu(p) != cpu);
 	WARN_ON(p->state != TASK_WAKING);
-	cpu = task_cpu(p);
 
 #ifdef CONFIG_SCHEDSTATS
 	schedstat_inc(rq, ttwu_count);
@@ -2438,8 +2584,19 @@
 
 	p->state = TASK_RUNNING;
 #ifdef CONFIG_SMP
-	if (p->sched_class->task_wake_up)
-		p->sched_class->task_wake_up(rq, p);
+	if (p->sched_class->task_woken)
+		p->sched_class->task_woken(rq, p);
+
+	if (unlikely(rq->idle_stamp)) {
+		u64 delta = rq->clock - rq->idle_stamp;
+		u64 max = 2*sysctl_sched_migration_cost;
+
+		if (delta > max)
+			rq->avg_idle = max;
+		else
+			update_avg(&rq->avg_idle, delta);
+		rq->idle_stamp = 0;
+	}
 #endif
 out:
 	task_rq_unlock(rq, &flags);
@@ -2508,7 +2665,6 @@
 	p->se.nr_failed_migrations_running	= 0;
 	p->se.nr_failed_migrations_hot		= 0;
 	p->se.nr_forced_migrations		= 0;
-	p->se.nr_forced2_migrations		= 0;
 
 	p->se.nr_wakeups			= 0;
 	p->se.nr_wakeups_sync			= 0;
@@ -2529,14 +2685,6 @@
 #ifdef CONFIG_PREEMPT_NOTIFIERS
 	INIT_HLIST_HEAD(&p->preempt_notifiers);
 #endif
-
-	/*
-	 * We mark the process as running here, but have not actually
-	 * inserted it onto the runqueue yet. This guarantees that
-	 * nobody will actually run it, and a signal or other external
-	 * event cannot wake it up and insert it on the runqueue either.
-	 */
-	p->state = TASK_RUNNING;
 }
 
 /*
@@ -2547,6 +2695,12 @@
 	int cpu = get_cpu();
 
 	__sched_fork(p);
+	/*
+	 * We mark the process as running here. This guarantees that
+	 * nobody will actually run it, and a signal or other external
+	 * event cannot wake it up and insert it on the runqueue either.
+	 */
+	p->state = TASK_RUNNING;
 
 	/*
 	 * Revert to default priority/policy on fork if requested.
@@ -2578,9 +2732,9 @@
 	if (!rt_prio(p->prio))
 		p->sched_class = &fair_sched_class;
 
-#ifdef CONFIG_SMP
-	cpu = p->sched_class->select_task_rq(p, SD_BALANCE_FORK, 0);
-#endif
+	if (p->sched_class->task_fork)
+		p->sched_class->task_fork(p);
+
 	set_task_cpu(p, cpu);
 
 #if defined(CONFIG_SCHEDSTATS) || defined(CONFIG_TASK_DELAY_ACCT)
@@ -2610,28 +2764,38 @@
 {
 	unsigned long flags;
 	struct rq *rq;
+	int cpu = get_cpu();
 
+#ifdef CONFIG_SMP
 	rq = task_rq_lock(p, &flags);
-	BUG_ON(p->state != TASK_RUNNING);
-	update_rq_clock(rq);
+	p->state = TASK_WAKING;
 
-	if (!p->sched_class->task_new || !current->se.on_rq) {
-		activate_task(rq, p, 0);
-	} else {
-		/*
-		 * Let the scheduling class do new task startup
-		 * management (if any):
-		 */
-		p->sched_class->task_new(rq, p);
-		inc_nr_running(rq);
-	}
+	/*
+	 * Fork balancing, do it here and not earlier because:
+	 *  - cpus_allowed can change in the fork path
+	 *  - any previously selected cpu might disappear through hotplug
+	 *
+	 * We set TASK_WAKING so that select_task_rq() can drop rq->lock
+	 * without people poking at ->cpus_allowed.
+	 */
+	cpu = select_task_rq(rq, p, SD_BALANCE_FORK, 0);
+	set_task_cpu(p, cpu);
+
+	p->state = TASK_RUNNING;
+	task_rq_unlock(rq, &flags);
+#endif
+
+	rq = task_rq_lock(p, &flags);
+	update_rq_clock(rq);
+	activate_task(rq, p, 0);
 	trace_sched_wakeup_new(rq, p, 1);
 	check_preempt_curr(rq, p, WF_FORK);
 #ifdef CONFIG_SMP
-	if (p->sched_class->task_wake_up)
-		p->sched_class->task_wake_up(rq, p);
+	if (p->sched_class->task_woken)
+		p->sched_class->task_woken(rq, p);
 #endif
 	task_rq_unlock(rq, &flags);
+	put_cpu();
 }
 
 #ifdef CONFIG_PREEMPT_NOTIFIERS
@@ -2951,6 +3115,7 @@
 
 /* Variables and functions for calc_load */
 static atomic_long_t calc_load_tasks;
+static atomic_long_t calc_load_tasks_deferred;
 static unsigned long calc_load_update;
 unsigned long avenrun[3];
 EXPORT_SYMBOL(avenrun);
@@ -3005,7 +3170,7 @@
  */
 static void calc_load_account_active(struct rq *this_rq)
 {
-	long nr_active, delta;
+	long nr_active, delta, deferred;
 
 	nr_active = this_rq->nr_running;
 	nr_active += (long) this_rq->nr_uninterruptible;
@@ -3013,20 +3178,30 @@
 	if (nr_active != this_rq->calc_load_active) {
 		delta = nr_active - this_rq->calc_load_active;
 		this_rq->calc_load_active = nr_active;
+
+		/*
+		 * Update calc_load_tasks only once per cpu in 10 tick update
+		 * window.
+		 */
+		if (unlikely(time_before(jiffies, this_rq->calc_load_update) &&
+			     time_after_eq(jiffies, calc_load_update))) {
+			if (delta)
+				atomic_long_add(delta,
+						&calc_load_tasks_deferred);
+			return;
+		}
+
+		if (atomic_long_read(&calc_load_tasks_deferred)) {
+			deferred = atomic_long_xchg(&calc_load_tasks_deferred,
+						    0);
+			delta += deferred;
+		}
+
 		atomic_long_add(delta, &calc_load_tasks);
 	}
 }
 
 /*
- * Externally visible per-cpu scheduler statistics:
- * cpu_nr_migrations(cpu) - number of migrations into that cpu
- */
-u64 cpu_nr_migrations(int cpu)
-{
-	return cpu_rq(cpu)->nr_migrations_in;
-}
-
-/*
  * Update rq->cpu_load[] statistics. This function is usually called every
  * scheduler tick (TICK_NSEC).
  */
@@ -3056,9 +3231,11 @@
 	}
 
 	if (time_after_eq(jiffies, this_rq->calc_load_update)) {
-		this_rq->calc_load_update += LOAD_FREQ;
 		calc_load_account_active(this_rq);
+		this_rq->calc_load_update += LOAD_FREQ;
 	}
+
+	sched_avg_update(this_rq);
 }
 
 #ifdef CONFIG_SMP
@@ -3108,24 +3285,28 @@
 }
 
 /*
- * If dest_cpu is allowed for this process, migrate the task to it.
- * This is accomplished by forcing the cpu_allowed mask to only
- * allow dest_cpu, which will force the cpu onto dest_cpu. Then
- * the cpu_allowed mask is restored.
+ * sched_exec - execve() is a valuable balancing opportunity, because at
+ * this point the task has the smallest effective memory and cache footprint.
  */
-static void sched_migrate_task(struct task_struct *p, int dest_cpu)
+void sched_exec(void)
 {
+	struct task_struct *p = current;
 	struct migration_req req;
 	unsigned long flags;
 	struct rq *rq;
+	int dest_cpu;
 
 	rq = task_rq_lock(p, &flags);
-	if (!cpumask_test_cpu(dest_cpu, &p->cpus_allowed)
-	    || unlikely(!cpu_active(dest_cpu)))
-		goto out;
+	dest_cpu = p->sched_class->select_task_rq(rq, p, SD_BALANCE_EXEC, 0);
+	if (dest_cpu == smp_processor_id())
+		goto unlock;
 
-	/* force the process onto the specified CPU */
-	if (migrate_task(p, dest_cpu, &req)) {
+	/*
+	 * select_task_rq() can race against ->cpus_allowed
+	 */
+	if (cpumask_test_cpu(dest_cpu, &p->cpus_allowed) &&
+	    likely(cpu_active(dest_cpu)) &&
+	    migrate_task(p, dest_cpu, &req)) {
 		/* Need to wait for migration thread (might exit: take ref). */
 		struct task_struct *mt = rq->migration_thread;
 
@@ -3137,24 +3318,11 @@
 
 		return;
 	}
-out:
+unlock:
 	task_rq_unlock(rq, &flags);
 }
 
 /*
- * sched_exec - execve() is a valuable balancing opportunity, because at
- * this point the task has the smallest effective memory and cache footprint.
- */
-void sched_exec(void)
-{
-	int new_cpu, this_cpu = get_cpu();
-	new_cpu = current->sched_class->select_task_rq(current, SD_BALANCE_EXEC, 0);
-	put_cpu();
-	if (new_cpu != this_cpu)
-		sched_migrate_task(current, new_cpu);
-}
-
-/*
  * pull_task - move a task from a remote runqueue to the local runqueue.
  * Both runqueues must be locked.
  */
@@ -3164,10 +3332,6 @@
 	deactivate_task(src_rq, p, 0);
 	set_task_cpu(p, this_cpu);
 	activate_task(this_rq, p, 0);
-	/*
-	 * Note that idle threads have a prio of MAX_PRIO, for this test
-	 * to be always true for them.
-	 */
 	check_preempt_curr(this_rq, p, 0);
 }
 
@@ -3203,7 +3367,7 @@
 	 * 2) too many balance attempts have failed.
 	 */
 
-	tsk_cache_hot = task_hot(p, rq->clock, sd);
+	tsk_cache_hot = task_hot(p, rq->clock_task, sd);
 	if (!tsk_cache_hot ||
 		sd->nr_balance_failed > sd->cache_nice_tries) {
 #ifdef CONFIG_SCHEDSTATS
@@ -3386,11 +3550,17 @@
 	unsigned long this_load;
 	unsigned long this_load_per_task;
 	unsigned long this_nr_running;
+	unsigned long this_has_capacity;
+	unsigned int  this_idle_cpus;
 
 	/* Statistics of the busiest group */
+	unsigned int  busiest_idle_cpus;
 	unsigned long max_load;
 	unsigned long busiest_load_per_task;
 	unsigned long busiest_nr_running;
+	unsigned long busiest_group_capacity;
+	unsigned long busiest_has_capacity;
+	unsigned int  busiest_group_weight;
 
 	int group_imb; /* Is there imbalance in this sd */
 #if defined(CONFIG_SCHED_MC) || defined(CONFIG_SCHED_SMT)
@@ -3412,7 +3582,10 @@
 	unsigned long sum_nr_running; /* Nr tasks running in the group */
 	unsigned long sum_weighted_load; /* Weighted load of group's tasks */
 	unsigned long group_capacity;
+	unsigned long idle_cpus;
+	unsigned long group_weight;
 	int group_imb; /* Is there an imbalance in the group ? */
+	int group_has_capacity; /* Is there extra capacity in the group? */
 };
 
 /**
@@ -3604,7 +3777,7 @@
 
 unsigned long default_scale_smt_power(struct sched_domain *sd, int cpu)
 {
-	unsigned long weight = cpumask_weight(sched_domain_span(sd));
+	unsigned long weight = sd->span_weight;
 	unsigned long smt_gain = sd->smt_gain;
 
 	smt_gain /= weight;
@@ -3622,10 +3795,14 @@
 	struct rq *rq = cpu_rq(cpu);
 	u64 total, available;
 
-	sched_avg_update(rq);
-
 	total = sched_avg_period() + (rq->clock - rq->age_stamp);
-	available = total - rq->rt_avg;
+
+	if (unlikely(total < rq->rt_avg)) {
+		/* Ensures that power won't end up being negative */
+		available = 0;
+	} else {
+		available = total - rq->rt_avg;
+	}
 
 	if (unlikely((s64)total < SCHED_LOAD_SCALE))
 		total = SCHED_LOAD_SCALE;
@@ -3637,7 +3814,7 @@
 
 static void update_cpu_power(struct sched_domain *sd, int cpu)
 {
-	unsigned long weight = cpumask_weight(sched_domain_span(sd));
+	unsigned long weight = sd->span_weight;
 	unsigned long power = SCHED_LOAD_SCALE;
 	struct sched_group *sdg = sd->groups;
 
@@ -3663,6 +3840,7 @@
 	if (!power)
 		power = 1;
 
+	cpu_rq(cpu)->cpu_power = power;
 	sdg->cpu_power = power;
 }
 
@@ -3707,11 +3885,10 @@
 			int local_group, const struct cpumask *cpus,
 			int *balance, struct sg_lb_stats *sgs)
 {
-	unsigned long load, max_cpu_load, min_cpu_load;
+	unsigned long load, max_cpu_load, min_cpu_load, max_nr_running;
 	int i;
 	unsigned int balance_cpu = -1, first_idle_cpu = 0;
-	unsigned long sum_avg_load_per_task;
-	unsigned long avg_load_per_task;
+	unsigned long avg_load_per_task = 0;
 
 	if (local_group) {
 		balance_cpu = group_first_cpu(group);
@@ -3720,9 +3897,9 @@
 	}
 
 	/* Tally up the load of all CPUs in the group */
-	sum_avg_load_per_task = avg_load_per_task = 0;
 	max_cpu_load = 0;
 	min_cpu_load = ~0UL;
+	max_nr_running = 0;
 
 	for_each_cpu_and(i, sched_group_cpus(group), cpus) {
 		struct rq *rq = cpu_rq(i);
@@ -3740,8 +3917,10 @@
 			load = target_load(i, load_idx);
 		} else {
 			load = source_load(i, load_idx);
-			if (load > max_cpu_load)
+			if (load > max_cpu_load) {
 				max_cpu_load = load;
+				max_nr_running = rq->nr_running;
+			}
 			if (min_cpu_load > load)
 				min_cpu_load = load;
 		}
@@ -3749,8 +3928,8 @@
 		sgs->group_load += load;
 		sgs->sum_nr_running += rq->nr_running;
 		sgs->sum_weighted_load += weighted_cpuload(i);
-
-		sum_avg_load_per_task += cpu_avg_load_per_task(i);
+		if (idle_cpu(i))
+			sgs->idle_cpus++;
 	}
 
 	/*
@@ -3768,7 +3947,6 @@
 	/* Adjust by relative CPU power of the group */
 	sgs->avg_load = (sgs->group_load * SCHED_LOAD_SCALE) / group->cpu_power;
 
-
 	/*
 	 * Consider the group unbalanced when the imbalance is larger
 	 * than the average weight of two tasks.
@@ -3778,14 +3956,17 @@
 	 *      normalized nr_running number somewhere that negates
 	 *      the hierarchy?
 	 */
-	avg_load_per_task = (sum_avg_load_per_task * SCHED_LOAD_SCALE) /
-		group->cpu_power;
+	if (sgs->sum_nr_running)
+		avg_load_per_task = sgs->sum_weighted_load / sgs->sum_nr_running;
 
-	if ((max_cpu_load - min_cpu_load) > 2*avg_load_per_task)
+	if ((max_cpu_load - min_cpu_load) > 2*avg_load_per_task && max_nr_running > 1)
 		sgs->group_imb = 1;
 
-	sgs->group_capacity =
-		DIV_ROUND_CLOSEST(group->cpu_power, SCHED_LOAD_SCALE);
+	sgs->group_capacity = DIV_ROUND_CLOSEST(group->cpu_power, SCHED_LOAD_SCALE);
+	sgs->group_weight = group->group_weight;
+
+	if (sgs->group_capacity > sgs->sum_nr_running)
+		sgs->group_has_capacity = 1;
 }
 
 /**
@@ -3832,9 +4013,14 @@
 		/*
 		 * In case the child domain prefers tasks go to siblings
 		 * first, lower the group capacity to one so that we'll try
-		 * and move all the excess tasks away.
+		 * and move all the excess tasks away. We lower the capacity
+		 * of a group only if the local group has the capacity to fit
+		 * these excess tasks, i.e. nr_running < group_capacity. The
+		 * extra check prevents the case where you always pull from the
+		 * heaviest group when it is already under-utilized (possible
+		 * with a large weight task outweighs the tasks on the system).
 		 */
-		if (prefer_sibling)
+		if (prefer_sibling && !local_group && sds->this_has_capacity)
 			sgs.group_capacity = min(sgs.group_capacity, 1UL);
 
 		if (local_group) {
@@ -3842,13 +4028,19 @@
 			sds->this = group;
 			sds->this_nr_running = sgs.sum_nr_running;
 			sds->this_load_per_task = sgs.sum_weighted_load;
+			sds->this_has_capacity = sgs.group_has_capacity;
+			sds->this_idle_cpus = sgs.idle_cpus;
 		} else if (sgs.avg_load > sds->max_load &&
 			   (sgs.sum_nr_running > sgs.group_capacity ||
 				sgs.group_imb)) {
 			sds->max_load = sgs.avg_load;
 			sds->busiest = group;
 			sds->busiest_nr_running = sgs.sum_nr_running;
+			sds->busiest_idle_cpus = sgs.idle_cpus;
+			sds->busiest_group_capacity = sgs.group_capacity;
+			sds->busiest_group_weight = sgs.group_weight;
 			sds->busiest_load_per_task = sgs.sum_weighted_load;
+			sds->busiest_has_capacity = sgs.group_has_capacity;
 			sds->group_imb = sgs.group_imb;
 		}
 
@@ -3870,6 +4062,7 @@
 {
 	unsigned long tmp, pwr_now = 0, pwr_move = 0;
 	unsigned int imbn = 2;
+	unsigned long scaled_busy_load_per_task;
 
 	if (sds->this_nr_running) {
 		sds->this_load_per_task /= sds->this_nr_running;
@@ -3880,8 +4073,12 @@
 		sds->this_load_per_task =
 			cpu_avg_load_per_task(this_cpu);
 
-	if (sds->max_load - sds->this_load + sds->busiest_load_per_task >=
-			sds->busiest_load_per_task * imbn) {
+	scaled_busy_load_per_task = sds->busiest_load_per_task
+						 * SCHED_LOAD_SCALE;
+	scaled_busy_load_per_task /= sds->busiest->cpu_power;
+
+	if (sds->max_load - sds->this_load + scaled_busy_load_per_task >=
+			(scaled_busy_load_per_task * imbn)) {
 		*imbalance = sds->busiest_load_per_task;
 		return;
 	}
@@ -3932,7 +4129,14 @@
 static inline void calculate_imbalance(struct sd_lb_stats *sds, int this_cpu,
 		unsigned long *imbalance)
 {
-	unsigned long max_pull;
+	unsigned long max_pull, load_above_capacity = ~0UL;
+
+	sds->busiest_load_per_task /= sds->busiest_nr_running;
+	if (sds->group_imb) {
+		sds->busiest_load_per_task =
+			min(sds->busiest_load_per_task, sds->avg_load);
+	}
+
 	/*
 	 * In the presence of smp nice balancing, certain scenarios can have
 	 * max load less than avg load(as we skip the groups at or below
@@ -3943,9 +4147,29 @@
 		return fix_small_imbalance(sds, this_cpu, imbalance);
 	}
 
-	/* Don't want to pull so many tasks that a group would go idle */
-	max_pull = min(sds->max_load - sds->avg_load,
-			sds->max_load - sds->busiest_load_per_task);
+	if (!sds->group_imb) {
+		/*
+		 * Don't want to pull so many tasks that a group would go idle.
+		 */
+		load_above_capacity = (sds->busiest_nr_running -
+						sds->busiest_group_capacity);
+
+		load_above_capacity *= (SCHED_LOAD_SCALE * SCHED_LOAD_SCALE);
+
+		load_above_capacity /= sds->busiest->cpu_power;
+	}
+
+	/*
+	 * We're trying to get all the cpus to the average_load, so we don't
+	 * want to push ourselves above the average load, nor do we wish to
+	 * reduce the max loaded cpu below the average load. At the same time,
+	 * we also don't want to reduce the group load below the group capacity
+	 * (so that we can implement power-savings policies etc). Thus we look
+	 * for the minimum possible imbalance.
+	 * Be careful of negative numbers as they'll appear as very large values
+	 * with unsigned longs.
+	 */
+	max_pull = min(sds->max_load - sds->avg_load, load_above_capacity);
 
 	/* How much load to actually move to equalise the imbalance */
 	*imbalance = min(max_pull * sds->busiest->cpu_power,
@@ -3962,6 +4186,7 @@
 		return fix_small_imbalance(sds, this_cpu, imbalance);
 
 }
+
 /******* find_busiest_group() helpers end here *********************/
 
 /**
@@ -4013,7 +4238,11 @@
 	 * 4) This group is more busy than the avg busieness at this
 	 *    sched_domain.
 	 * 5) The imbalance is within the specified limit.
-	 * 6) Any rebalance would lead to ping-pong
+	 *
+	 * Note: when doing newidle balance, if the local group has excess
+	 * capacity (i.e. nr_running < group_capacity) and the busiest group
+	 * does not have any capacity, we force a load balance to pull tasks
+	 * to the local group. In this case, we skip past checks 3, 4 and 5.
 	 */
 	if (balance && !(*balance))
 		goto ret;
@@ -4021,6 +4250,11 @@
 	if (!sds.busiest || sds.busiest_nr_running == 0)
 		goto out_balanced;
 
+	/*  SD_BALANCE_NEWIDLE trumps SMP nice when underutilized */
+	if (idle == CPU_NEWLY_IDLE && sds.this_has_capacity &&
+			!sds.busiest_has_capacity)
+		goto force_balance;
+
 	if (sds.this_load >= sds.max_load)
 		goto out_balanced;
 
@@ -4029,28 +4263,28 @@
 	if (sds.this_load >= sds.avg_load)
 		goto out_balanced;
 
-	if (100 * sds.max_load <= sd->imbalance_pct * sds.this_load)
-		goto out_balanced;
-
-	sds.busiest_load_per_task /= sds.busiest_nr_running;
-	if (sds.group_imb)
-		sds.busiest_load_per_task =
-			min(sds.busiest_load_per_task, sds.avg_load);
-
 	/*
-	 * We're trying to get all the cpus to the average_load, so we don't
-	 * want to push ourselves above the average load, nor do we wish to
-	 * reduce the max loaded cpu below the average load, as either of these
-	 * actions would just result in more rebalancing later, and ping-pong
-	 * tasks around. Thus we look for the minimum possible imbalance.
-	 * Negative imbalances (*we* are more loaded than anyone else) will
-	 * be counted as no imbalance for these purposes -- we can't fix that
-	 * by pulling tasks to us. Be careful of negative numbers as they'll
-	 * appear as very large values with unsigned longs.
+	 * In the CPU_NEWLY_IDLE, use imbalance_pct to be conservative.
+	 * And to check for busy balance use !idle_cpu instead of
+	 * CPU_NOT_IDLE. This is because HT siblings will use CPU_NOT_IDLE
+	 * even when they are idle.
 	 */
-	if (sds.max_load <= sds.busiest_load_per_task)
-		goto out_balanced;
+	if (idle == CPU_NEWLY_IDLE || !idle_cpu(this_cpu)) {
+		if (100 * sds.max_load <= sd->imbalance_pct * sds.this_load)
+			goto out_balanced;
+	} else {
+		/*
+		 * This cpu is idle. If the busiest group load doesn't
+		 * have more tasks than the number of available cpu's and
+		 * there is no imbalance between this and busiest group
+		 * wrt to idle cpu's, it is balanced.
+		 */
+		if ((sds.this_idle_cpus  <= sds.busiest_idle_cpus + 1) &&
+		    sds.busiest_nr_running <= sds.busiest_group_weight)
+			goto out_balanced;
+	}
 
+force_balance:
 	/* Looks like there is an imbalance. Compute it */
 	calculate_imbalance(&sds, this_cpu, imbalance);
 	return sds.busiest;
@@ -4087,12 +4321,23 @@
 			continue;
 
 		rq = cpu_rq(i);
-		wl = weighted_cpuload(i) * SCHED_LOAD_SCALE;
-		wl /= power;
+		wl = weighted_cpuload(i);
 
+		/*
+		 * When comparing with imbalance, use weighted_cpuload()
+		 * which is not scaled with the cpu power.
+		 */
 		if (capacity && rq->nr_running == 1 && wl > imbalance)
 			continue;
 
+		/*
+		 * For the load comparisons with the other cpu's, consider
+		 * the weighted_cpuload() scaled with the cpu power, so that
+		 * the load can be moved away from the cpu that is potentially
+		 * running at a lower capacity.
+		 */
+		wl = (wl * SCHED_LOAD_SCALE) / power;
+
 		if (wl > max_load) {
 			max_load = wl;
 			busiest = rq;
@@ -4126,7 +4371,7 @@
 	unsigned long flags;
 	struct cpumask *cpus = __get_cpu_var(load_balance_tmpmask);
 
-	cpumask_setall(cpus);
+	cpumask_copy(cpus, cpu_active_mask);
 
 	/*
 	 * When power savings policy is enabled for the parent domain, idle
@@ -4195,7 +4440,14 @@
 
 	if (!ld_moved) {
 		schedstat_inc(sd, lb_failed[idle]);
-		sd->nr_balance_failed++;
+		/*
+		 * Increment the failure counter only on periodic balance.
+		 * We do not want newidle balance, which can be very
+		 * frequent, pollute the failure counter causing
+		 * excessive cache_hot migrations and active balances.
+		 */
+		if (idle != CPU_NEWLY_IDLE)
+			sd->nr_balance_failed++;
 
 		if (unlikely(sd->nr_balance_failed > sd->cache_nice_tries+2)) {
 
@@ -4289,7 +4541,7 @@
 	int all_pinned = 0;
 	struct cpumask *cpus = __get_cpu_var(load_balance_tmpmask);
 
-	cpumask_setall(cpus);
+	cpumask_copy(cpus, cpu_active_mask);
 
 	/*
 	 * When power savings policy is enabled for the parent domain, idle
@@ -4429,6 +4681,11 @@
 	int pulled_task = 0;
 	unsigned long next_balance = jiffies + HZ;
 
+	this_rq->idle_stamp = this_rq->clock;
+
+	if (this_rq->avg_idle < sysctl_sched_migration_cost)
+		return;
+
 	for_each_domain(this_cpu, sd) {
 		unsigned long interval;
 
@@ -4443,8 +4700,10 @@
 		interval = msecs_to_jiffies(sd->balance_interval);
 		if (time_after(next_balance, sd->last_balance + interval))
 			next_balance = sd->last_balance + interval;
-		if (pulled_task)
+		if (pulled_task) {
+			this_rq->idle_stamp = 0;
 			break;
+		}
 	}
 	if (pulled_task || time_after(jiffies, this_rq->next_balance)) {
 		/*
@@ -4679,7 +4938,7 @@
 		cpumask_set_cpu(cpu, nohz.cpu_mask);
 
 		/* time for ilb owner also to sleep */
-		if (cpumask_weight(nohz.cpu_mask) == num_online_cpus()) {
+		if (cpumask_weight(nohz.cpu_mask) == num_active_cpus()) {
 			if (atomic_read(&nohz.load_balancer) == cpu)
 				atomic_set(&nohz.load_balancer, -1);
 			return 0;
@@ -4933,7 +5192,7 @@
 
 	if (task_current(rq, p)) {
 		update_rq_clock(rq);
-		ns = rq->clock - p->se.exec_start;
+		ns = rq->clock_task - p->se.exec_start;
 		if ((s64)ns < 0)
 			ns = 0;
 	}
@@ -5077,7 +5336,7 @@
 	tmp = cputime_to_cputime64(cputime);
 	if (hardirq_count() - hardirq_offset)
 		cpustat->irq = cputime64_add(cpustat->irq, tmp);
-	else if (softirq_count())
+	else if (in_serving_softirq())
 		cpustat->softirq = cputime64_add(cpustat->softirq, tmp);
 	else
 		cpustat->system = cputime64_add(cpustat->system, tmp);
@@ -5171,45 +5430,90 @@
 {
 	return p->stime;
 }
+
+void thread_group_times(struct task_struct *p, cputime_t *ut, cputime_t *st)
+{
+	struct task_cputime cputime;
+
+	thread_group_cputime(p, &cputime);
+
+	*ut = cputime.utime;
+	*st = cputime.stime;
+}
 #else
+
+#ifndef nsecs_to_cputime
+# define nsecs_to_cputime(__nsecs) \
+	msecs_to_cputime(div_u64((__nsecs), NSEC_PER_MSEC))
+#endif
+
 cputime_t task_utime(struct task_struct *p)
 {
-	clock_t utime = cputime_to_clock_t(p->utime),
-		total = utime + cputime_to_clock_t(p->stime);
+	cputime_t utime = p->utime, total = utime + p->stime;
 	u64 temp;
 
 	/*
 	 * Use CFS's precise accounting:
 	 */
-	temp = (u64)nsec_to_clock_t(p->se.sum_exec_runtime);
+	temp = (u64)nsecs_to_cputime(p->se.sum_exec_runtime);
 
 	if (total) {
 		temp *= utime;
 		do_div(temp, total);
 	}
-	utime = (clock_t)temp;
+	utime = (cputime_t)temp;
 
-	p->prev_utime = max(p->prev_utime, clock_t_to_cputime(utime));
+	p->prev_utime = max(p->prev_utime, utime);
 	return p->prev_utime;
 }
 
 cputime_t task_stime(struct task_struct *p)
 {
-	clock_t stime;
+	cputime_t stime;
 
 	/*
 	 * Use CFS's precise accounting. (we subtract utime from
 	 * the total, to make sure the total observed by userspace
 	 * grows monotonically - apps rely on that):
 	 */
-	stime = nsec_to_clock_t(p->se.sum_exec_runtime) -
-			cputime_to_clock_t(task_utime(p));
+	stime = nsecs_to_cputime(p->se.sum_exec_runtime) - task_utime(p);
 
 	if (stime >= 0)
-		p->prev_stime = max(p->prev_stime, clock_t_to_cputime(stime));
+		p->prev_stime = max(p->prev_stime, stime);
 
 	return p->prev_stime;
 }
+
+/*
+ * Must be called with siglock held.
+ */
+void thread_group_times(struct task_struct *p, cputime_t *ut, cputime_t *st)
+{
+	struct signal_struct *sig = p->signal;
+	struct task_cputime cputime;
+	cputime_t rtime, utime, total;
+
+	thread_group_cputime(p, &cputime);
+
+	total = cputime_add(cputime.utime, cputime.stime);
+	rtime = nsecs_to_cputime(cputime.sum_exec_runtime);
+
+	if (total) {
+		u64 temp = rtime;
+
+		temp *= cputime.utime;
+		do_div(temp, total);
+		utime = (cputime_t)temp;
+	} else
+		utime = rtime;
+
+	sig->prev_utime = max(sig->prev_utime, utime);
+	sig->prev_stime = max(sig->prev_stime,
+			      cputime_sub(rtime, sig->prev_utime));
+
+	*ut = sig->prev_utime;
+	*st = sig->prev_stime;
+}
 #endif
 
 inline cputime_t task_gtime(struct task_struct *p)
@@ -5312,6 +5616,8 @@
 {
 	struct pt_regs *regs = get_irq_regs();
 
+	tracing_off();
+
 	printk(KERN_ERR "BUG: scheduling while atomic: %s/%d/0x%08x\n",
 		prev->comm, prev->pid, preempt_count());
 
@@ -5501,7 +5807,7 @@
 	 * the mutex owner just released it and exited.
 	 */
 	if (probe_kernel_address(&owner->cpu, cpu))
-		goto out;
+		return 0;
 #else
 	cpu = owner->cpu;
 #endif
@@ -5511,14 +5817,14 @@
 	 * the cpu field may no longer be valid.
 	 */
 	if (cpu >= nr_cpumask_bits)
-		goto out;
+		return 0;
 
 	/*
 	 * We need to validate that we can do a
 	 * get_cpu() and that we have the percpu area.
 	 */
 	if (!cpu_online(cpu))
-		goto out;
+		return 0;
 
 	rq = cpu_rq(cpu);
 
@@ -5537,7 +5843,7 @@
 
 		cpu_relax();
 	}
-out:
+
 	return 1;
 }
 #endif
@@ -5885,14 +6191,15 @@
  */
 bool try_wait_for_completion(struct completion *x)
 {
+	unsigned long flags;
 	int ret = 1;
 
-	spin_lock_irq(&x->wait.lock);
+	spin_lock_irqsave(&x->wait.lock, flags);
 	if (!x->done)
 		ret = 0;
 	else
 		x->done--;
-	spin_unlock_irq(&x->wait.lock);
+	spin_unlock_irqrestore(&x->wait.lock, flags);
 	return ret;
 }
 EXPORT_SYMBOL(try_wait_for_completion);
@@ -5907,12 +6214,13 @@
  */
 bool completion_done(struct completion *x)
 {
+	unsigned long flags;
 	int ret = 1;
 
-	spin_lock_irq(&x->wait.lock);
+	spin_lock_irqsave(&x->wait.lock, flags);
 	if (!x->done)
 		ret = 0;
-	spin_unlock_irq(&x->wait.lock);
+	spin_unlock_irqrestore(&x->wait.lock, flags);
 	return ret;
 }
 EXPORT_SYMBOL(completion_done);
@@ -5980,7 +6288,7 @@
 	unsigned long flags;
 	int oldprio, on_rq, running;
 	struct rq *rq;
-	const struct sched_class *prev_class = p->sched_class;
+	const struct sched_class *prev_class;
 
 	BUG_ON(prio < 0 || prio > MAX_PRIO);
 
@@ -5988,6 +6296,7 @@
 	update_rq_clock(rq);
 
 	oldprio = p->prio;
+	prev_class = p->sched_class;
 	on_rq = p->se.on_rq;
 	running = task_current(rq, p);
 	if (on_rq)
@@ -6005,7 +6314,7 @@
 	if (running)
 		p->sched_class->set_curr_task(rq);
 	if (on_rq) {
-		enqueue_task(rq, p, 0);
+		enqueue_task(rq, p, 0, oldprio < prio);
 
 		check_class_changed(rq, p, prev_class, oldprio, running);
 	}
@@ -6049,7 +6358,7 @@
 	delta = p->prio - old_prio;
 
 	if (on_rq) {
-		enqueue_task(rq, p, 0);
+		enqueue_task(rq, p, 0, false);
 		/*
 		 * If the task increased its priority or is running and
 		 * lowered its priority, then reschedule its CPU:
@@ -6215,7 +6524,7 @@
 {
 	int retval, oldprio, oldpolicy = -1, on_rq, running;
 	unsigned long flags;
-	const struct sched_class *prev_class = p->sched_class;
+	const struct sched_class *prev_class;
 	struct rq *rq;
 	int reset_on_fork;
 
@@ -6329,6 +6638,7 @@
 	p->sched_reset_on_fork = reset_on_fork;
 
 	oldprio = p->prio;
+	prev_class = p->sched_class;
 	__setscheduler(rq, p, policy, param->sched_priority);
 
 	if (running)
@@ -6439,7 +6749,7 @@
 		return -EINVAL;
 
 	retval = -ESRCH;
-	read_lock(&tasklist_lock);
+	rcu_read_lock();
 	p = find_process_by_pid(pid);
 	if (p) {
 		retval = security_task_getscheduler(p);
@@ -6447,7 +6757,7 @@
 			retval = p->policy
 				| (p->sched_reset_on_fork ? SCHED_RESET_ON_FORK : 0);
 	}
-	read_unlock(&tasklist_lock);
+	rcu_read_unlock();
 	return retval;
 }
 
@@ -6465,7 +6775,7 @@
 	if (!param || pid < 0)
 		return -EINVAL;
 
-	read_lock(&tasklist_lock);
+	rcu_read_lock();
 	p = find_process_by_pid(pid);
 	retval = -ESRCH;
 	if (!p)
@@ -6476,7 +6786,7 @@
 		goto out_unlock;
 
 	lp.sched_priority = p->rt_priority;
-	read_unlock(&tasklist_lock);
+	rcu_read_unlock();
 
 	/*
 	 * This one might sleep, we cannot do it with a spinlock held ...
@@ -6486,7 +6796,7 @@
 	return retval;
 
 out_unlock:
-	read_unlock(&tasklist_lock);
+	rcu_read_unlock();
 	return retval;
 }
 
@@ -6497,22 +6807,18 @@
 	int retval;
 
 	get_online_cpus();
-	read_lock(&tasklist_lock);
+	rcu_read_lock();
 
 	p = find_process_by_pid(pid);
 	if (!p) {
-		read_unlock(&tasklist_lock);
+		rcu_read_unlock();
 		put_online_cpus();
 		return -ESRCH;
 	}
 
-	/*
-	 * It is not safe to call set_cpus_allowed with the
-	 * tasklist_lock held. We will bump the task_struct's
-	 * usage count and then drop tasklist_lock.
-	 */
+	/* Prevent p going away */
 	get_task_struct(p);
-	read_unlock(&tasklist_lock);
+	rcu_read_unlock();
 
 	if (!alloc_cpumask_var(&cpus_allowed, GFP_KERNEL)) {
 		retval = -ENOMEM;
@@ -6593,10 +6899,12 @@
 long sched_getaffinity(pid_t pid, struct cpumask *mask)
 {
 	struct task_struct *p;
+	unsigned long flags;
+	struct rq *rq;
 	int retval;
 
 	get_online_cpus();
-	read_lock(&tasklist_lock);
+	rcu_read_lock();
 
 	retval = -ESRCH;
 	p = find_process_by_pid(pid);
@@ -6607,10 +6915,12 @@
 	if (retval)
 		goto out_unlock;
 
+	rq = task_rq_lock(p, &flags);
 	cpumask_and(mask, &p->cpus_allowed, cpu_online_mask);
+	task_rq_unlock(rq, &flags);
 
 out_unlock:
-	read_unlock(&tasklist_lock);
+	rcu_read_unlock();
 	put_online_cpus();
 
 	return retval;
@@ -6628,7 +6938,9 @@
 	int ret;
 	cpumask_var_t mask;
 
-	if (len < cpumask_size())
+	if ((len * BITS_PER_BYTE) < nr_cpu_ids)
+		return -EINVAL;
+	if (len & (sizeof(unsigned long)-1))
 		return -EINVAL;
 
 	if (!alloc_cpumask_var(&mask, GFP_KERNEL))
@@ -6636,10 +6948,12 @@
 
 	ret = sched_getaffinity(pid, mask);
 	if (ret == 0) {
-		if (copy_to_user(user_mask_ptr, mask, cpumask_size()))
+		size_t retlen = min_t(size_t, len, cpumask_size());
+
+		if (copy_to_user(user_mask_ptr, mask, retlen))
 			ret = -EFAULT;
 		else
-			ret = cpumask_size();
+			ret = retlen;
 	}
 	free_cpumask_var(mask);
 
@@ -6845,6 +7159,8 @@
 {
 	struct task_struct *p;
 	unsigned int time_slice;
+	unsigned long flags;
+	struct rq *rq;
 	int retval;
 	struct timespec t;
 
@@ -6852,7 +7168,7 @@
 		return -EINVAL;
 
 	retval = -ESRCH;
-	read_lock(&tasklist_lock);
+	rcu_read_lock();
 	p = find_process_by_pid(pid);
 	if (!p)
 		goto out_unlock;
@@ -6861,15 +7177,17 @@
 	if (retval)
 		goto out_unlock;
 
-	time_slice = p->sched_class->get_rr_interval(p);
+	rq = task_rq_lock(p, &flags);
+	time_slice = p->sched_class->get_rr_interval(rq, p);
+	task_rq_unlock(rq, &flags);
 
-	read_unlock(&tasklist_lock);
+	rcu_read_unlock();
 	jiffies_to_timespec(time_slice, &t);
 	retval = copy_to_user(interval, &t, sizeof(t)) ? -EFAULT : 0;
 	return retval;
 
 out_unlock:
-	read_unlock(&tasklist_lock);
+	rcu_read_unlock();
 	return retval;
 }
 
@@ -6960,11 +7278,23 @@
 	spin_lock_irqsave(&rq->lock, flags);
 
 	__sched_fork(idle);
+	idle->state = TASK_RUNNING;
 	idle->se.exec_start = sched_clock();
 
-	idle->prio = idle->normal_prio = MAX_PRIO;
 	cpumask_copy(&idle->cpus_allowed, cpumask_of(cpu));
+	/*
+	 * We're having a chicken and egg problem, even though we are
+	 * holding rq->lock, the cpu isn't yet set to this cpu so the
+	 * lockdep check in task_group() will fail.
+	 *
+	 * Similar case to sched_fork(). / Alternatively we could
+	 * use task_rq_lock() here and obtain the other rq->lock.
+	 *
+	 * Silence PROVE_RCU
+	 */
+	rcu_read_lock();
 	__set_task_cpu(idle, cpu);
+	rcu_read_unlock();
 
 	rq->curr = rq->idle = idle;
 #if defined(CONFIG_SMP) && defined(__ARCH_WANT_UNLOCKED_CTXSW)
@@ -6982,7 +7312,7 @@
 	 * The idle tasks have their own, simple scheduling class:
 	 */
 	idle->sched_class = &idle_sched_class;
-	ftrace_graph_init_task(idle);
+	ftrace_graph_init_idle_task(idle, cpu);
 }
 
 /*
@@ -7003,22 +7333,23 @@
  *
  * This idea comes from the SD scheduler of Con Kolivas:
  */
-static inline void sched_init_granularity(void)
+static void update_sysctl(void)
 {
-	unsigned int factor = 1 + ilog2(num_online_cpus());
-	const unsigned long limit = 200000000;
-
-	sysctl_sched_min_granularity *= factor;
-	if (sysctl_sched_min_granularity > limit)
-		sysctl_sched_min_granularity = limit;
-
-	sysctl_sched_latency *= factor;
-	if (sysctl_sched_latency > limit)
-		sysctl_sched_latency = limit;
+	unsigned int cpus = min(num_online_cpus(), 8U);
+	unsigned int factor = 1 + ilog2(cpus);
 
-	sysctl_sched_wakeup_granularity *= factor;
+#define SET_SYSCTL(name) \
+	(sysctl_##name = (factor) * normalized_sysctl_##name)
+	SET_SYSCTL(sched_min_granularity);
+	SET_SYSCTL(sched_latency);
+	SET_SYSCTL(sched_wakeup_granularity);
+	SET_SYSCTL(sched_shares_ratelimit);
+#undef SET_SYSCTL
+}
 
-	sysctl_sched_shares_ratelimit *= factor;
+static inline void sched_init_granularity(void)
+{
+	update_sysctl();
 }
 
 #ifdef CONFIG_SMP
@@ -7054,8 +7385,20 @@
 	struct rq *rq;
 	int ret = 0;
 
+	/*
+	 * Serialize against TASK_WAKING so that ttwu() and wunt() can
+	 * drop the rq->lock and still rely on ->cpus_allowed.
+	 */
+again:
+	while (task_is_waking(p))
+		cpu_relax();
 	rq = task_rq_lock(p, &flags);
-	if (!cpumask_intersects(new_mask, cpu_online_mask)) {
+	if (task_is_waking(p)) {
+		task_rq_unlock(rq, &flags);
+		goto again;
+	}
+
+	if (!cpumask_intersects(new_mask, cpu_active_mask)) {
 		ret = -EINVAL;
 		goto out;
 	}
@@ -7077,13 +7420,13 @@
 	if (cpumask_test_cpu(task_cpu(p), new_mask))
 		goto out;
 
-	if (migrate_task(p, cpumask_any_and(cpu_online_mask, new_mask), &req)) {
+	if (migrate_task(p, cpumask_any_and(cpu_active_mask, new_mask), &req)) {
 		/* Need help from migration thread: drop lock and wait. */
 		struct task_struct *mt = rq->migration_thread;
 
 		get_task_struct(mt);
 		task_rq_unlock(rq, &flags);
-		wake_up_process(rq->migration_thread);
+		wake_up_process(mt);
 		put_task_struct(mt);
 		wait_for_completion(&req.done);
 		tlb_migrate_finish(p->mm);
@@ -7110,7 +7453,7 @@
 static int __migrate_task(struct task_struct *p, int src_cpu, int dest_cpu)
 {
 	struct rq *rq_dest, *rq_src;
-	int ret = 0, on_rq;
+	int ret = 0;
 
 	if (unlikely(!cpu_active(dest_cpu)))
 		return ret;
@@ -7126,12 +7469,13 @@
 	if (!cpumask_test_cpu(dest_cpu, &p->cpus_allowed))
 		goto fail;
 
-	on_rq = p->se.on_rq;
-	if (on_rq)
+	/*
+	 * If we're not on a rq, the next wake-up will ensure we're
+	 * placed properly.
+	 */
+	if (p->se.on_rq) {
 		deactivate_task(rq_src, p, 0);
-
-	set_task_cpu(p, dest_cpu);
-	if (on_rq) {
+		set_task_cpu(p, dest_cpu);
 		activate_task(rq_dest, p, 0);
 		check_preempt_curr(rq_dest, p, 0);
 	}
@@ -7210,57 +7554,29 @@
 }
 
 #ifdef CONFIG_HOTPLUG_CPU
-
-static int __migrate_task_irq(struct task_struct *p, int src_cpu, int dest_cpu)
-{
-	int ret;
-
-	local_irq_disable();
-	ret = __migrate_task(p, src_cpu, dest_cpu);
-	local_irq_enable();
-	return ret;
-}
-
 /*
  * Figure out where task on dead CPU should go, use force if necessary.
  */
-static void move_task_off_dead_cpu(int dead_cpu, struct task_struct *p)
+void move_task_off_dead_cpu(int dead_cpu, struct task_struct *p)
 {
-	int dest_cpu;
-	const struct cpumask *nodemask = cpumask_of_node(cpu_to_node(dead_cpu));
-
-again:
-	/* Look for allowed, online CPU in same node. */
-	for_each_cpu_and(dest_cpu, nodemask, cpu_online_mask)
-		if (cpumask_test_cpu(dest_cpu, &p->cpus_allowed))
-			goto move;
-
-	/* Any allowed, online CPU? */
-	dest_cpu = cpumask_any_and(&p->cpus_allowed, cpu_online_mask);
-	if (dest_cpu < nr_cpu_ids)
-		goto move;
-
-	/* No more Mr. Nice Guy. */
-	if (dest_cpu >= nr_cpu_ids) {
-		cpuset_cpus_allowed_locked(p, &p->cpus_allowed);
-		dest_cpu = cpumask_any_and(cpu_online_mask, &p->cpus_allowed);
+	struct rq *rq = cpu_rq(dead_cpu);
+	int needs_cpu, uninitialized_var(dest_cpu);
+	unsigned long flags;
 
-		/*
-		 * Don't tell them about moving exiting tasks or
-		 * kernel threads (both mm NULL), since they never
-		 * leave kernel.
-		 */
-		if (p->mm && printk_ratelimit()) {
-			printk(KERN_INFO "process %d (%s) no "
-			       "longer affine to cpu%d\n",
-			       task_pid_nr(p), p->comm, dead_cpu);
-		}
-	}
+	local_irq_save(flags);
 
-move:
-	/* It can have affinity changed while we were choosing. */
-	if (unlikely(!__migrate_task_irq(p, dead_cpu, dest_cpu)))
-		goto again;
+	spin_lock(&rq->lock);
+	needs_cpu = (task_cpu(p) == dead_cpu) && (p->state != TASK_WAKING);
+	if (needs_cpu)
+		dest_cpu = select_fallback_rq(dead_cpu, p);
+	spin_unlock(&rq->lock);
+	/*
+	 * It can only fail if we race with set_cpus_allowed(),
+	 * in the racer should migrate the task anyway.
+	 */
+	if (needs_cpu)
+		__migrate_task(p, dead_cpu, dest_cpu);
+	local_irq_restore(flags);
 }
 
 /*
@@ -7272,7 +7588,7 @@
  */
 static void migrate_nr_uninterruptible(struct rq *rq_src)
 {
-	struct rq *rq_dest = cpu_rq(cpumask_any(cpu_online_mask));
+	struct rq *rq_dest = cpu_rq(cpumask_any(cpu_active_mask));
 	unsigned long flags;
 
 	local_irq_save(flags);
@@ -7526,7 +7842,7 @@
 static struct ctl_table_header *sd_sysctl_header;
 static void register_sched_domain_sysctl(void)
 {
-	int i, cpu_num = num_online_cpus();
+	int i, cpu_num = num_possible_cpus();
 	struct ctl_table *entry = sd_alloc_ctl_entry(cpu_num + 1);
 	char buf[32];
 
@@ -7536,7 +7852,7 @@
 	if (entry == NULL)
 		return;
 
-	for_each_online_cpu(i) {
+	for_each_possible_cpu(i) {
 		snprintf(buf, 32, "cpu%d", i);
 		entry->procname = kstrdup(buf, GFP_KERNEL);
 		entry->mode = 0555;
@@ -7608,10 +7924,9 @@
 	unsigned long flags;
 	struct rq *rq;
 
-	switch (action) {
+	switch (action & ~CPU_TASKS_FROZEN) {
 
 	case CPU_UP_PREPARE:
-	case CPU_UP_PREPARE_FROZEN:
 		p = kthread_create(migration_thread, hcpu, "migration/%d", cpu);
 		if (IS_ERR(p))
 			return NOTIFY_BAD;
@@ -7626,7 +7941,6 @@
 		break;
 
 	case CPU_ONLINE:
-	case CPU_ONLINE_FROZEN:
 		/* Strictly unnecessary, as first user will wake it. */
 		wake_up_process(cpu_rq(cpu)->migration_thread);
 
@@ -7643,7 +7957,6 @@
 
 #ifdef CONFIG_HOTPLUG_CPU
 	case CPU_UP_CANCELED:
-	case CPU_UP_CANCELED_FROZEN:
 		if (!cpu_rq(cpu)->migration_thread)
 			break;
 		/* Unbind it from offline cpu so it can run. Fall thru. */
@@ -7654,24 +7967,30 @@
 		cpu_rq(cpu)->migration_thread = NULL;
 		break;
 
-	case CPU_DEAD:
-	case CPU_DEAD_FROZEN:
-		cpuset_lock(); /* around calls to cpuset_cpus_allowed_lock() */
-		migrate_live_tasks(cpu);
+	case CPU_POST_DEAD:
+		/*
+		 * Bring the migration thread down in CPU_POST_DEAD event,
+		 * since the timers should have got migrated by now and thus
+		 * we should not see a deadlock between trying to kill the
+		 * migration thread and the sched_rt_period_timer.
+		 */
 		rq = cpu_rq(cpu);
 		kthread_stop(rq->migration_thread);
 		put_task_struct(rq->migration_thread);
 		rq->migration_thread = NULL;
+		break;
+
+	case CPU_DEAD:
+		migrate_live_tasks(cpu);
+		rq = cpu_rq(cpu);
 		/* Idle task back to normal (off runqueue, low prio) */
 		spin_lock_irq(&rq->lock);
 		update_rq_clock(rq);
 		deactivate_task(rq, rq->idle, 0);
-		rq->idle->static_prio = MAX_PRIO;
 		__setscheduler(rq, rq->idle, SCHED_NORMAL, 0);
 		rq->idle->sched_class = &idle_sched_class;
 		migrate_dead_tasks(cpu);
 		spin_unlock_irq(&rq->lock);
-		cpuset_unlock();
 		migrate_nr_uninterruptible(rq);
 		BUG_ON(rq->nr_running != 0);
 		calc_global_load_remove(rq);
@@ -7695,7 +8014,6 @@
 		break;
 
 	case CPU_DYING:
-	case CPU_DYING_FROZEN:
 		/* Update our root-domain */
 		rq = cpu_rq(cpu);
 		spin_lock_irqsave(&rq->lock, flags);
@@ -7905,6 +8223,8 @@
 
 static void free_rootdomain(struct root_domain *rd)
 {
+	synchronize_sched();
+
 	cpupri_cleanup(&rd->cpupri);
 
 	free_cpumask_var(rd->rto_mask);
@@ -8013,6 +8333,9 @@
 	struct rq *rq = cpu_rq(cpu);
 	struct sched_domain *tmp;
 
+	for (tmp = sd; tmp; tmp = tmp->parent)
+		tmp->span_weight = cpumask_weight(sched_domain_span(tmp));
+
 	/* Remove the sched domains which do not contribute to scheduling. */
 	for (tmp = sd; tmp; ) {
 		struct sched_domain *parent = tmp->parent;
@@ -8045,6 +8368,7 @@
 /* Setup the mask of cpus configured for isolated domains */
 static int __init isolated_cpu_setup(char *str)
 {
+	alloc_bootmem_cpumask_var(&cpu_isolated_map);
 	cpulist_parse(str, cpu_isolated_map);
 	return 1;
 }
@@ -8477,6 +8801,8 @@
 	if (cpu != group_first_cpu(sd->groups))
 		return;
 
+	sd->groups->group_weight = cpumask_weight(sched_group_cpus(sd->groups));
+
 	child = sd->child;
 
 	sd->groups->cpu_power = 0;
@@ -9022,7 +9348,7 @@
 	if (doms_new == NULL) {
 		ndoms_cur = 0;
 		doms_new = fallback_doms;
-		cpumask_andnot(&doms_new[0], cpu_online_mask, cpu_isolated_map);
+		cpumask_andnot(&doms_new[0], cpu_active_mask, cpu_isolated_map);
 		WARN_ON_ONCE(dattr_new);
 	}
 
@@ -9153,8 +9479,10 @@
 	switch (action) {
 	case CPU_ONLINE:
 	case CPU_ONLINE_FROZEN:
-	case CPU_DEAD:
-	case CPU_DEAD_FROZEN:
+	case CPU_DOWN_PREPARE:
+	case CPU_DOWN_PREPARE_FROZEN:
+	case CPU_DOWN_FAILED:
+	case CPU_DOWN_FAILED_FROZEN:
 		partition_sched_domains(1, NULL, NULL);
 		return NOTIFY_OK;
 
@@ -9201,7 +9529,7 @@
 #endif
 	get_online_cpus();
 	mutex_lock(&sched_domains_mutex);
-	arch_init_sched_domains(cpu_online_mask);
+	arch_init_sched_domains(cpu_active_mask);
 	cpumask_andnot(non_isolated_cpus, cpu_possible_mask, cpu_isolated_map);
 	if (cpumask_empty(non_isolated_cpus))
 		cpumask_set_cpu(smp_processor_id(), non_isolated_cpus);
@@ -9358,9 +9686,6 @@
 #ifdef CONFIG_RT_GROUP_SCHED
 	alloc_size += 2 * nr_cpu_ids * sizeof(void **);
 #endif
-#ifdef CONFIG_USER_SCHED
-	alloc_size *= 2;
-#endif
 #ifdef CONFIG_CPUMASK_OFFSTACK
 	alloc_size += num_possible_cpus() * cpumask_size();
 #endif
@@ -9378,13 +9703,6 @@
 		init_task_group.cfs_rq = (struct cfs_rq **)ptr;
 		ptr += nr_cpu_ids * sizeof(void **);
 
-#ifdef CONFIG_USER_SCHED
-		root_task_group.se = (struct sched_entity **)ptr;
-		ptr += nr_cpu_ids * sizeof(void **);
-
-		root_task_group.cfs_rq = (struct cfs_rq **)ptr;
-		ptr += nr_cpu_ids * sizeof(void **);
-#endif /* CONFIG_USER_SCHED */
 #endif /* CONFIG_FAIR_GROUP_SCHED */
 #ifdef CONFIG_RT_GROUP_SCHED
 		init_task_group.rt_se = (struct sched_rt_entity **)ptr;
@@ -9393,13 +9711,6 @@
 		init_task_group.rt_rq = (struct rt_rq **)ptr;
 		ptr += nr_cpu_ids * sizeof(void **);
 
-#ifdef CONFIG_USER_SCHED
-		root_task_group.rt_se = (struct sched_rt_entity **)ptr;
-		ptr += nr_cpu_ids * sizeof(void **);
-
-		root_task_group.rt_rq = (struct rt_rq **)ptr;
-		ptr += nr_cpu_ids * sizeof(void **);
-#endif /* CONFIG_USER_SCHED */
 #endif /* CONFIG_RT_GROUP_SCHED */
 #ifdef CONFIG_CPUMASK_OFFSTACK
 		for_each_possible_cpu(i) {
@@ -9419,22 +9730,13 @@
 #ifdef CONFIG_RT_GROUP_SCHED
 	init_rt_bandwidth(&init_task_group.rt_bandwidth,
 			global_rt_period(), global_rt_runtime());
-#ifdef CONFIG_USER_SCHED
-	init_rt_bandwidth(&root_task_group.rt_bandwidth,
-			global_rt_period(), RUNTIME_INF);
-#endif /* CONFIG_USER_SCHED */
 #endif /* CONFIG_RT_GROUP_SCHED */
 
-#ifdef CONFIG_GROUP_SCHED
+#ifdef CONFIG_CGROUP_SCHED
 	list_add(&init_task_group.list, &task_groups);
 	INIT_LIST_HEAD(&init_task_group.children);
 
-#ifdef CONFIG_USER_SCHED
-	INIT_LIST_HEAD(&root_task_group.children);
-	init_task_group.parent = &root_task_group;
-	list_add(&init_task_group.siblings, &root_task_group.children);
-#endif /* CONFIG_USER_SCHED */
-#endif /* CONFIG_GROUP_SCHED */
+#endif /* CONFIG_CGROUP_SCHED */
 
 #if defined CONFIG_FAIR_GROUP_SCHED && defined CONFIG_SMP
 	update_shares_data = __alloc_percpu(nr_cpu_ids * sizeof(unsigned long),
@@ -9474,25 +9776,6 @@
 		 * directly in rq->cfs (i.e init_task_group->se[] = NULL).
 		 */
 		init_tg_cfs_entry(&init_task_group, &rq->cfs, NULL, i, 1, NULL);
-#elif defined CONFIG_USER_SCHED
-		root_task_group.shares = NICE_0_LOAD;
-		init_tg_cfs_entry(&root_task_group, &rq->cfs, NULL, i, 0, NULL);
-		/*
-		 * In case of task-groups formed thr' the user id of tasks,
-		 * init_task_group represents tasks belonging to root user.
-		 * Hence it forms a sibling of all subsequent groups formed.
-		 * In this case, init_task_group gets only a fraction of overall
-		 * system cpu resource, based on the weight assigned to root
-		 * user's cpu share (INIT_TASK_GROUP_LOAD). This is accomplished
-		 * by letting tasks of init_task_group sit in a separate cfs_rq
-		 * (init_tg_cfs_rq) and having one entity represent this group of
-		 * tasks in rq->cfs (i.e init_task_group->se[] != NULL).
-		 */
-		init_tg_cfs_entry(&init_task_group,
-				&per_cpu(init_tg_cfs_rq, i),
-				&per_cpu(init_sched_entity, i), i, 1,
-				root_task_group.se[i]);
-
 #endif
 #endif /* CONFIG_FAIR_GROUP_SCHED */
 
@@ -9515,6 +9798,7 @@
 #ifdef CONFIG_SMP
 		rq->sd = NULL;
 		rq->rd = NULL;
+		rq->cpu_power = SCHED_LOAD_SCALE;
 		rq->post_schedule = 0;
 		rq->active_balance = 0;
 		rq->next_balance = jiffies;
@@ -9522,6 +9806,8 @@
 		rq->cpu = i;
 		rq->online = 0;
 		rq->migration_thread = NULL;
+		rq->idle_stamp = 0;
+		rq->avg_idle = 2*sysctl_sched_migration_cost;
 		INIT_LIST_HEAD(&rq->migration_queue);
 		rq_attach_root(rq, &def_root_domain);
 #endif
@@ -9571,7 +9857,9 @@
 	zalloc_cpumask_var(&nohz.cpu_mask, GFP_NOWAIT);
 	alloc_cpumask_var(&nohz.ilb_grp_nohz_mask, GFP_NOWAIT);
 #endif
-	zalloc_cpumask_var(&cpu_isolated_map, GFP_NOWAIT);
+	/* May be allocated at isolcpus cmdline parse time */
+	if (cpu_isolated_map == NULL)
+		zalloc_cpumask_var(&cpu_isolated_map, GFP_NOWAIT);
 #endif /* SMP */
 
 	perf_event_init();
@@ -9587,13 +9875,23 @@
 	return (nested == PREEMPT_INATOMIC_BASE + preempt_offset);
 }
 
+static int __might_sleep_init_called;
+int __init __might_sleep_init(void)
+{
+	__might_sleep_init_called = 1;
+	return 0;
+}
+early_initcall(__might_sleep_init);
+
 void __might_sleep(char *file, int line, int preempt_offset)
 {
 #ifdef in_atomic
 	static unsigned long prev_jiffy;	/* ratelimiting */
 
-	if ((preempt_count_equals(preempt_offset) && !irqs_disabled()) ||
-	    system_state != SYSTEM_RUNNING || oops_in_progress)
+	if ((preempt_count_equals(preempt_offset) && !irqs_disabled()) || oops_in_progress)
+		return;
+	if (system_state != SYSTEM_RUNNING &&
+	    (!__might_sleep_init_called || system_state != SYSTEM_BOOTING))
 		return;
 	if (time_before(jiffies, prev_jiffy + HZ) && prev_jiffy)
 		return;
@@ -9894,7 +10192,7 @@
 }
 #endif /* CONFIG_RT_GROUP_SCHED */
 
-#ifdef CONFIG_GROUP_SCHED
+#ifdef CONFIG_CGROUP_SCHED
 static void free_sched_group(struct task_group *tg)
 {
 	free_fair_sched_group(tg);
@@ -9989,21 +10287,21 @@
 	if (unlikely(running))
 		tsk->sched_class->put_prev_task(rq, tsk);
 
-	set_task_rq(tsk, task_cpu(tsk));
-
 #ifdef CONFIG_FAIR_GROUP_SCHED
-	if (tsk->sched_class->moved_group)
-		tsk->sched_class->moved_group(tsk);
+	if (tsk->sched_class->task_move_group)
+		tsk->sched_class->task_move_group(tsk, on_rq);
+	else
 #endif
+		set_task_rq(tsk, task_cpu(tsk));
 
 	if (unlikely(running))
 		tsk->sched_class->set_curr_task(rq);
 	if (on_rq)
-		enqueue_task(rq, tsk, 0);
+		enqueue_task(rq, tsk, 0, false);
 
 	task_rq_unlock(rq, &flags);
 }
-#endif /* CONFIG_GROUP_SCHED */
+#endif /* CONFIG_CGROUP_SCHED */
 
 #ifdef CONFIG_FAIR_GROUP_SCHED
 static void __set_se_shares(struct sched_entity *se, unsigned long shares)
@@ -10145,13 +10443,6 @@
 		runtime = d->rt_runtime;
 	}
 
-#ifdef CONFIG_USER_SCHED
-	if (tg == &root_task_group) {
-		period = global_rt_period();
-		runtime = global_rt_runtime();
-	}
-#endif
-
 	/*
 	 * Cannot have more runtime than the period.
 	 */
@@ -10413,6 +10704,15 @@
 static int
 cpu_cgroup_can_attach_task(struct cgroup *cgrp, struct task_struct *tsk)
 {
+	if ((current != tsk) && (!capable(CAP_SYS_NICE))) {
+		const struct cred *cred = current_cred(), *tcred;
+
+		tcred = __task_cred(tsk);
+
+		if (cred->euid != tcred->uid && cred->euid != tcred->suid)
+			return -EPERM;
+	}
+
 #ifdef CONFIG_RT_GROUP_SCHED
 	if (!sched_rt_can_attach(cgroup_tg(cgrp), tsk))
 		return -EINVAL;
@@ -10771,12 +11071,30 @@
 }
 
 /*
+ * When CONFIG_VIRT_CPU_ACCOUNTING is enabled one jiffy can be very large
+ * in cputime_t units. As a result, cpuacct_update_stats calls
+ * percpu_counter_add with values large enough to always overflow the
+ * per cpu batch limit causing bad SMP scalability.
+ *
+ * To fix this we scale percpu_counter_batch by cputime_one_jiffy so we
+ * batch the same amount of time with CONFIG_VIRT_CPU_ACCOUNTING disabled
+ * and enabled. We cap it at INT_MAX which is the largest allowed batch value.
+ */
+#ifdef CONFIG_SMP
+#define CPUACCT_BATCH	\
+	min_t(long, percpu_counter_batch * cputime_one_jiffy, INT_MAX)
+#else
+#define CPUACCT_BATCH	0
+#endif
+
+/*
  * Charge the system/user time to the task's accounting group.
  */
 static void cpuacct_update_stats(struct task_struct *tsk,
 		enum cpuacct_stat_index idx, cputime_t val)
 {
 	struct cpuacct *ca;
+	int batch = CPUACCT_BATCH;
 
 	if (unlikely(!cpuacct_subsys.active))
 		return;
@@ -10785,7 +11103,7 @@
 	ca = task_ca(tsk);
 
 	do {
-		percpu_counter_add(&ca->cpustat[idx], val);
+		__percpu_counter_add(&ca->cpustat[idx], val, batch);
 		ca = ca->parent;
 	} while (ca);
 	rcu_read_unlock();
--- linux-mvl-dove-2.6.32.orig/kernel/panic.c
+++ linux-mvl-dove-2.6.32/kernel/panic.c
@@ -29,7 +29,10 @@
 static int pause_on_oops_flag;
 static DEFINE_SPINLOCK(pause_on_oops_lock);
 
-int panic_timeout;
+#ifndef CONFIG_PANIC_TIMEOUT
+#define CONFIG_PANIC_TIMEOUT 0
+#endif
+int panic_timeout = CONFIG_PANIC_TIMEOUT;
 
 ATOMIC_NOTIFIER_HEAD(panic_notifier_list);
 
--- linux-mvl-dove-2.6.32.orig/kernel/sysctl.c
+++ linux-mvl-dove-2.6.32/kernel/sysctl.c
@@ -1345,6 +1345,7 @@
 		.strategy	= &sysctl_jiffies,
 	},
 #endif
+#ifdef CONFIG_MMU
 	{
 		.ctl_name	= CTL_UNNUMBERED,
 		.procname	= "mmap_min_addr",
@@ -1353,6 +1354,7 @@
 		.mode		= 0644,
 		.proc_handler	= &mmap_min_addr_handler,
 	},
+#endif
 #ifdef CONFIG_NUMA
 	{
 		.ctl_name	= CTL_UNNUMBERED,
@@ -1605,7 +1607,8 @@
 		.data		= &show_unhandled_signals,
 		.maxlen		= sizeof(int),
 		.mode		= 0644,
-		.proc_handler	= proc_dointvec
+		.proc_handler	= proc_dointvec_minmax,
+		.extra1		= &zero,
 	},
 #endif
 	{ .ctl_name = 0 }
--- linux-mvl-dove-2.6.32.orig/kernel/hrtimer.c
+++ linux-mvl-dove-2.6.32/kernel/hrtimer.c
@@ -557,7 +557,7 @@
 static int hrtimer_reprogram(struct hrtimer *timer,
 			     struct hrtimer_clock_base *base)
 {
-	ktime_t *expires_next = &__get_cpu_var(hrtimer_bases).expires_next;
+	struct hrtimer_cpu_base *cpu_base = &__get_cpu_var(hrtimer_bases);
 	ktime_t expires = ktime_sub(hrtimer_get_expires(timer), base->offset);
 	int res;
 
@@ -582,7 +582,16 @@
 	if (expires.tv64 < 0)
 		return -ETIME;
 
-	if (expires.tv64 >= expires_next->tv64)
+	if (expires.tv64 >= cpu_base->expires_next.tv64)
+		return 0;
+
+	/*
+	 * If a hang was detected in the last timer interrupt then we
+	 * do not schedule a timer which is earlier than the expiry
+	 * which we enforced in the hang detection. We want the system
+	 * to make progress.
+	 */
+	if (cpu_base->hang_detected)
 		return 0;
 
 	/*
@@ -590,7 +599,7 @@
 	 */
 	res = tick_program_event(expires, 0);
 	if (!IS_ERR_VALUE(res))
-		*expires_next = expires;
+		cpu_base->expires_next = expires;
 	return res;
 }
 
@@ -911,6 +920,7 @@
 remove_hrtimer(struct hrtimer *timer, struct hrtimer_clock_base *base)
 {
 	if (hrtimer_is_queued(timer)) {
+		unsigned long state;
 		int reprogram;
 
 		/*
@@ -924,8 +934,13 @@
 		debug_deactivate(timer);
 		timer_stats_hrtimer_clear_start_info(timer);
 		reprogram = base->cpu_base == &__get_cpu_var(hrtimer_bases);
-		__remove_hrtimer(timer, base, HRTIMER_STATE_INACTIVE,
-				 reprogram);
+		/*
+		 * We must preserve the CALLBACK state flag here,
+		 * otherwise we could move the timer base in
+		 * switch_hrtimer_base.
+		 */
+		state = timer->state & HRTIMER_STATE_CALLBACK;
+		__remove_hrtimer(timer, base, state, reprogram);
 		return 1;
 	}
 	return 0;
@@ -1212,34 +1227,14 @@
 		BUG_ON(timer->state != HRTIMER_STATE_CALLBACK);
 		enqueue_hrtimer(timer, base);
 	}
+
+	WARN_ON_ONCE(!(timer->state & HRTIMER_STATE_CALLBACK));
+
 	timer->state &= ~HRTIMER_STATE_CALLBACK;
 }
 
 #ifdef CONFIG_HIGH_RES_TIMERS
 
-static int force_clock_reprogram;
-
-/*
- * After 5 iteration's attempts, we consider that hrtimer_interrupt()
- * is hanging, which could happen with something that slows the interrupt
- * such as the tracing. Then we force the clock reprogramming for each future
- * hrtimer interrupts to avoid infinite loops and use the min_delta_ns
- * threshold that we will overwrite.
- * The next tick event will be scheduled to 3 times we currently spend on
- * hrtimer_interrupt(). This gives a good compromise, the cpus will spend
- * 1/4 of their time to process the hrtimer interrupts. This is enough to
- * let it running without serious starvation.
- */
-
-static inline void
-hrtimer_interrupt_hanging(struct clock_event_device *dev,
-			ktime_t try_time)
-{
-	force_clock_reprogram = 1;
-	dev->min_delta_ns = (unsigned long)try_time.tv64 * 3;
-	printk(KERN_WARNING "hrtimer: interrupt too slow, "
-		"forcing clock min delta to %lu ns\n", dev->min_delta_ns);
-}
 /*
  * High resolution timer interrupt
  * Called with interrupts disabled
@@ -1248,21 +1243,15 @@
 {
 	struct hrtimer_cpu_base *cpu_base = &__get_cpu_var(hrtimer_bases);
 	struct hrtimer_clock_base *base;
-	ktime_t expires_next, now;
-	int nr_retries = 0;
-	int i;
+	ktime_t expires_next, now, entry_time, delta;
+	int i, retries = 0;
 
 	BUG_ON(!cpu_base->hres_active);
 	cpu_base->nr_events++;
 	dev->next_event.tv64 = KTIME_MAX;
 
- retry:
-	/* 5 retries is enough to notice a hang */
-	if (!(++nr_retries % 5))
-		hrtimer_interrupt_hanging(dev, ktime_sub(ktime_get(), now));
-
-	now = ktime_get();
-
+	entry_time = now = ktime_get();
+retry:
 	expires_next.tv64 = KTIME_MAX;
 
 	spin_lock(&cpu_base->lock);
@@ -1324,10 +1313,48 @@
 	spin_unlock(&cpu_base->lock);
 
 	/* Reprogramming necessary ? */
-	if (expires_next.tv64 != KTIME_MAX) {
-		if (tick_program_event(expires_next, force_clock_reprogram))
-			goto retry;
+	if (expires_next.tv64 == KTIME_MAX ||
+	    !tick_program_event(expires_next, 0)) {
+		cpu_base->hang_detected = 0;
+		return;
 	}
+
+	/*
+	 * The next timer was already expired due to:
+	 * - tracing
+	 * - long lasting callbacks
+	 * - being scheduled away when running in a VM
+	 *
+	 * We need to prevent that we loop forever in the hrtimer
+	 * interrupt routine. We give it 3 attempts to avoid
+	 * overreacting on some spurious event.
+	 */
+	now = ktime_get();
+	cpu_base->nr_retries++;
+	if (++retries < 3)
+		goto retry;
+	/*
+	 * Give the system a chance to do something else than looping
+	 * here. We stored the entry time, so we know exactly how long
+	 * we spent here. We schedule the next event this amount of
+	 * time away.
+	 */
+	cpu_base->nr_hangs++;
+	cpu_base->hang_detected = 1;
+	delta = ktime_sub(now, entry_time);
+	if (delta.tv64 > cpu_base->max_hang_time.tv64)
+		cpu_base->max_hang_time = delta;
+	/*
+	 * Limit it to a sensible value as we enforce a longer
+	 * delay. Give the CPU at least 100ms to catch up.
+	 */
+	if (delta.tv64 > 100 * NSEC_PER_MSEC)
+		expires_next = ktime_add_ns(now, 100 * NSEC_PER_MSEC);
+	else
+		expires_next = ktime_add(now, delta);
+	tick_program_event(expires_next, 1);
+	printk_once(KERN_WARNING "hrtimer: interrupt took %llu ns\n",
+		    ktime_to_ns(delta));
 }
 
 /*
--- linux-mvl-dove-2.6.32.orig/kernel/rcutree.c
+++ linux-mvl-dove-2.6.32/kernel/rcutree.c
@@ -176,9 +176,29 @@
 	return &rsp->node[0];
 }
 
+/*
+ * Record the specified "completed" value, which is later used to validate
+ * dynticks counter manipulations and CPU-offline checks.  Specify
+ * "rsp->completed - 1" to unconditionally invalidate any future dynticks
+ * manipulations and CPU-offline checks.  Such invalidation is useful at
+ * the beginning of a grace period.
+ */
+static void dyntick_record_completed(struct rcu_state *rsp, long comp)
+{
+	rsp->dynticks_completed = comp;
+}
+
 #ifdef CONFIG_SMP
 
 /*
+ * Recall the previously recorded value of the completion for dynticks.
+ */
+static long dyntick_recall_completed(struct rcu_state *rsp)
+{
+	return rsp->dynticks_completed;
+}
+
+/*
  * If the specified CPU is offline, tell the caller that it is in
  * a quiescent state.  Otherwise, whack it with a reschedule IPI.
  * Grace periods can end up waiting on an offline CPU when that
@@ -335,28 +355,9 @@
 		set_need_resched();
 }
 
-/*
- * Record the specified "completed" value, which is later used to validate
- * dynticks counter manipulations.  Specify "rsp->completed - 1" to
- * unconditionally invalidate any future dynticks manipulations (which is
- * useful at the beginning of a grace period).
- */
-static void dyntick_record_completed(struct rcu_state *rsp, long comp)
-{
-	rsp->dynticks_completed = comp;
-}
-
 #ifdef CONFIG_SMP
 
 /*
- * Recall the previously recorded value of the completion for dynticks.
- */
-static long dyntick_recall_completed(struct rcu_state *rsp)
-{
-	return rsp->dynticks_completed;
-}
-
-/*
  * Snapshot the specified CPU's dynticks counter so that we can later
  * credit them with an implicit quiescent state.  Return 1 if this CPU
  * is in dynticks idle mode, which is an extended quiescent state.
@@ -419,24 +420,8 @@
 
 #else /* #ifdef CONFIG_NO_HZ */
 
-static void dyntick_record_completed(struct rcu_state *rsp, long comp)
-{
-}
-
 #ifdef CONFIG_SMP
 
-/*
- * If there are no dynticks, then the only way that a CPU can passively
- * be in a quiescent state is to be offline.  Unlike dynticks idle, which
- * is a point in time during the prior (already finished) grace period,
- * an offline CPU is always in a quiescent state, and thus can be
- * unconditionally applied.  So just return the current value of completed.
- */
-static long dyntick_recall_completed(struct rcu_state *rsp)
-{
-	return rsp->completed;
-}
-
 static int dyntick_save_progress_counter(struct rcu_data *rdp)
 {
 	return 0;
@@ -553,13 +538,33 @@
 /*
  * Update CPU-local rcu_data state to record the newly noticed grace period.
  * This is used both when we started the grace period and when we notice
- * that someone else started the grace period.
- */
+ * that someone else started the grace period.  The caller must hold the
+ * ->lock of the leaf rcu_node structure corresponding to the current CPU,
+ *  and must have irqs disabled.
+ */
+static void __note_new_gpnum(struct rcu_state *rsp, struct rcu_node *rnp, struct rcu_data *rdp)
+{
+	if (rdp->gpnum != rnp->gpnum) {
+		rdp->qs_pending = 1;
+		rdp->passed_quiesc = 0;
+		rdp->gpnum = rnp->gpnum;
+	}
+}
+
 static void note_new_gpnum(struct rcu_state *rsp, struct rcu_data *rdp)
 {
-	rdp->qs_pending = 1;
-	rdp->passed_quiesc = 0;
-	rdp->gpnum = rsp->gpnum;
+	unsigned long flags;
+	struct rcu_node *rnp;
+
+	local_irq_save(flags);
+	rnp = rdp->mynode;
+	if (rdp->gpnum == ACCESS_ONCE(rnp->gpnum) || /* outside lock. */
+	    !spin_trylock(&rnp->lock)) { /* irqs already off, retry later. */
+		local_irq_restore(flags);
+		return;
+	}
+	__note_new_gpnum(rsp, rnp, rdp);
+	spin_unlock_irqrestore(&rnp->lock, flags);
 }
 
 /*
@@ -583,6 +588,79 @@
 }
 
 /*
+ * Advance this CPU's callbacks, but only if the current grace period
+ * has ended.  This may be called only from the CPU to whom the rdp
+ * belongs.  In addition, the corresponding leaf rcu_node structure's
+ * ->lock must be held by the caller, with irqs disabled.
+ */
+static void
+__rcu_process_gp_end(struct rcu_state *rsp, struct rcu_node *rnp, struct rcu_data *rdp)
+{
+	/* Did another grace period end? */
+	if (rdp->completed != rnp->completed) {
+
+		/* Advance callbacks.  No harm if list empty. */
+		rdp->nxttail[RCU_DONE_TAIL] = rdp->nxttail[RCU_WAIT_TAIL];
+		rdp->nxttail[RCU_WAIT_TAIL] = rdp->nxttail[RCU_NEXT_READY_TAIL];
+		rdp->nxttail[RCU_NEXT_READY_TAIL] = rdp->nxttail[RCU_NEXT_TAIL];
+
+		/* Remember that we saw this grace-period completion. */
+		rdp->completed = rnp->completed;
+	}
+}
+
+/*
+ * Advance this CPU's callbacks, but only if the current grace period
+ * has ended.  This may be called only from the CPU to whom the rdp
+ * belongs.
+ */
+static void
+rcu_process_gp_end(struct rcu_state *rsp, struct rcu_data *rdp)
+{
+	unsigned long flags;
+	struct rcu_node *rnp;
+
+	local_irq_save(flags);
+	rnp = rdp->mynode;
+	if (rdp->completed == ACCESS_ONCE(rnp->completed) || /* outside lock. */
+	    !spin_trylock(&rnp->lock)) { /* irqs already off, retry later. */
+		local_irq_restore(flags);
+		return;
+	}
+	__rcu_process_gp_end(rsp, rnp, rdp);
+	spin_unlock_irqrestore(&rnp->lock, flags);
+}
+
+/*
+ * Do per-CPU grace-period initialization for running CPU.  The caller
+ * must hold the lock of the leaf rcu_node structure corresponding to
+ * this CPU.
+ */
+static void
+rcu_start_gp_per_cpu(struct rcu_state *rsp, struct rcu_node *rnp, struct rcu_data *rdp)
+{
+	/* Prior grace period ended, so advance callbacks for current CPU. */
+	__rcu_process_gp_end(rsp, rnp, rdp);
+
+	/*
+	 * Because this CPU just now started the new grace period, we know
+	 * that all of its callbacks will be covered by this upcoming grace
+	 * period, even the ones that were registered arbitrarily recently.
+	 * Therefore, advance all outstanding callbacks to RCU_WAIT_TAIL.
+	 *
+	 * Other CPUs cannot be sure exactly when the grace period started.
+	 * Therefore, their recently registered callbacks must pass through
+	 * an additional RCU_NEXT_READY stage, so that they will be handled
+	 * by the next RCU grace period.
+	 */
+	rdp->nxttail[RCU_NEXT_READY_TAIL] = rdp->nxttail[RCU_NEXT_TAIL];
+	rdp->nxttail[RCU_WAIT_TAIL] = rdp->nxttail[RCU_NEXT_TAIL];
+
+	/* Set state so that this CPU will detect the next quiescent state. */
+	__note_new_gpnum(rsp, rnp, rdp);
+}
+
+/*
  * Start a new RCU grace period if warranted, re-initializing the hierarchy
  * in preparation for detecting the next grace period.  The caller must hold
  * the root node's ->lock, which is released before return.  Hard irqs must
@@ -607,28 +685,15 @@
 	rsp->jiffies_force_qs = jiffies + RCU_JIFFIES_TILL_FORCE_QS;
 	record_gp_stall_check_time(rsp);
 	dyntick_record_completed(rsp, rsp->completed - 1);
-	note_new_gpnum(rsp, rdp);
-
-	/*
-	 * Because this CPU just now started the new grace period, we know
-	 * that all of its callbacks will be covered by this upcoming grace
-	 * period, even the ones that were registered arbitrarily recently.
-	 * Therefore, advance all outstanding callbacks to RCU_WAIT_TAIL.
-	 *
-	 * Other CPUs cannot be sure exactly when the grace period started.
-	 * Therefore, their recently registered callbacks must pass through
-	 * an additional RCU_NEXT_READY stage, so that they will be handled
-	 * by the next RCU grace period.
-	 */
-	rdp->nxttail[RCU_NEXT_READY_TAIL] = rdp->nxttail[RCU_NEXT_TAIL];
-	rdp->nxttail[RCU_WAIT_TAIL] = rdp->nxttail[RCU_NEXT_TAIL];
 
 	/* Special-case the common single-level case. */
 	if (NUM_RCU_NODES == 1) {
 		rcu_preempt_check_blocked_tasks(rnp);
 		rnp->qsmask = rnp->qsmaskinit;
 		rnp->gpnum = rsp->gpnum;
+		rnp->completed = rsp->completed;
 		rsp->signaled = RCU_SIGNAL_INIT; /* force_quiescent_state OK. */
+		rcu_start_gp_per_cpu(rsp, rnp, rdp);
 		spin_unlock_irqrestore(&rnp->lock, flags);
 		return;
 	}
@@ -661,6 +726,9 @@
 		rcu_preempt_check_blocked_tasks(rnp);
 		rnp->qsmask = rnp->qsmaskinit;
 		rnp->gpnum = rsp->gpnum;
+		rnp->completed = rsp->completed;
+		if (rnp == rdp->mynode)
+			rcu_start_gp_per_cpu(rsp, rnp, rdp);
 		spin_unlock(&rnp->lock);	/* irqs remain disabled. */
 	}
 
@@ -672,34 +740,6 @@
 }
 
 /*
- * Advance this CPU's callbacks, but only if the current grace period
- * has ended.  This may be called only from the CPU to whom the rdp
- * belongs.
- */
-static void
-rcu_process_gp_end(struct rcu_state *rsp, struct rcu_data *rdp)
-{
-	long completed_snap;
-	unsigned long flags;
-
-	local_irq_save(flags);
-	completed_snap = ACCESS_ONCE(rsp->completed);  /* outside of lock. */
-
-	/* Did another grace period end? */
-	if (rdp->completed != completed_snap) {
-
-		/* Advance callbacks.  No harm if list empty. */
-		rdp->nxttail[RCU_DONE_TAIL] = rdp->nxttail[RCU_WAIT_TAIL];
-		rdp->nxttail[RCU_WAIT_TAIL] = rdp->nxttail[RCU_NEXT_READY_TAIL];
-		rdp->nxttail[RCU_NEXT_READY_TAIL] = rdp->nxttail[RCU_NEXT_TAIL];
-
-		/* Remember that we saw this grace-period completion. */
-		rdp->completed = completed_snap;
-	}
-	local_irq_restore(flags);
-}
-
-/*
  * Clean up after the prior grace period and let rcu_start_gp() start up
  * the next grace period if one is needed.  Note that the caller must
  * hold rnp->lock, as required by rcu_start_gp(), which will release it.
@@ -710,7 +750,6 @@
 	WARN_ON_ONCE(!rcu_gp_in_progress(rsp));
 	rsp->completed = rsp->gpnum;
 	rsp->signaled = RCU_GP_IDLE;
-	rcu_process_gp_end(rsp, rsp->rda[smp_processor_id()]);
 	rcu_start_gp(rsp, flags);  /* releases root node's rnp->lock. */
 }
 
@@ -1144,6 +1183,7 @@
 	long lastcomp;
 	struct rcu_node *rnp = rcu_get_root(rsp);
 	u8 signaled;
+	u8 forcenow;
 
 	if (!rcu_gp_in_progress(rsp))
 		return;  /* No grace period in progress, nothing to force. */
@@ -1180,16 +1220,23 @@
 		if (rcu_process_dyntick(rsp, lastcomp,
 					dyntick_save_progress_counter))
 			goto unlock_ret;
+		/* fall into next case. */
+
+	case RCU_SAVE_COMPLETED:
 
 		/* Update state, record completion counter. */
+		forcenow = 0;
 		spin_lock(&rnp->lock);
 		if (lastcomp == rsp->completed &&
-		    rsp->signaled == RCU_SAVE_DYNTICK) {
+		    rsp->signaled == signaled) {
 			rsp->signaled = RCU_FORCE_QS;
 			dyntick_record_completed(rsp, lastcomp);
+			forcenow = signaled == RCU_SAVE_COMPLETED;
 		}
 		spin_unlock(&rnp->lock);
-		break;
+		if (!forcenow)
+			break;
+		/* fall into next case. */
 
 	case RCU_FORCE_QS:
 
@@ -1544,21 +1591,16 @@
 rcu_init_percpu_data(int cpu, struct rcu_state *rsp, int preemptable)
 {
 	unsigned long flags;
-	long lastcomp;
 	unsigned long mask;
 	struct rcu_data *rdp = rsp->rda[cpu];
 	struct rcu_node *rnp = rcu_get_root(rsp);
 
 	/* Set up local state, ensuring consistent view of global state. */
 	spin_lock_irqsave(&rnp->lock, flags);
-	lastcomp = rsp->completed;
-	rdp->completed = lastcomp;
-	rdp->gpnum = lastcomp;
 	rdp->passed_quiesc = 0;  /* We could be racing with new GP, */
 	rdp->qs_pending = 1;	 /*  so set up to respond to current GP. */
 	rdp->beenonline = 1;	 /* We have now been online. */
 	rdp->preemptable = preemptable;
-	rdp->passed_quiesc_completed = lastcomp - 1;
 	rdp->qlen_last_fqs_check = 0;
 	rdp->n_force_qs_snap = rsp->n_force_qs;
 	rdp->blimit = blimit;
@@ -1580,6 +1622,11 @@
 		spin_lock(&rnp->lock);	/* irqs already disabled. */
 		rnp->qsmaskinit |= mask;
 		mask = rnp->grpmask;
+		if (rnp == rdp->mynode) {
+			rdp->gpnum = rnp->completed; /* if GP in progress... */
+			rdp->completed = rnp->completed;
+			rdp->passed_quiesc_completed = rnp->completed - 1;
+		}
 		spin_unlock(&rnp->lock); /* irqs already disabled. */
 		rnp = rnp->parent;
 	} while (rnp != NULL && !(rnp->qsmaskinit & mask));
--- linux-mvl-dove-2.6.32.orig/kernel/delayacct.c
+++ linux-mvl-dove-2.6.32/kernel/delayacct.c
@@ -20,15 +20,15 @@
 #include <linux/sysctl.h>
 #include <linux/delayacct.h>
 
-int delayacct_on __read_mostly = 1;	/* Delay accounting turned on/off */
+int delayacct_on __read_mostly = 0;	/* Delay accounting turned on/off */
 struct kmem_cache *delayacct_cache;
 
-static int __init delayacct_setup_disable(char *str)
+static int __init delayacct_setup_enable(char *str)
 {
-	delayacct_on = 0;
+	delayacct_on = 1;
 	return 1;
 }
-__setup("nodelayacct", delayacct_setup_disable);
+__setup("delayacct", delayacct_setup_enable);
 
 void delayacct_init(void)
 {
--- linux-mvl-dove-2.6.32.orig/kernel/ptrace.c
+++ linux-mvl-dove-2.6.32/kernel/ptrace.c
@@ -314,7 +314,7 @@
 		child->exit_code = data;
 		dead = __ptrace_detach(current, child);
 		if (!child->exit_state)
-			wake_up_process(child);
+			wake_up_state(child, TASK_TRACED | TASK_STOPPED);
 	}
 	write_unlock_irq(&tasklist_lock);
 
--- linux-mvl-dove-2.6.32.orig/kernel/printk.c
+++ linux-mvl-dove-2.6.32/kernel/printk.c
@@ -33,6 +33,7 @@
 #include <linux/bootmem.h>
 #include <linux/syscalls.h>
 #include <linux/kexec.h>
+#include <linux/syslog.h>
 
 #include <asm/uaccess.h>
 
@@ -257,6 +258,45 @@
 #endif
 
 /*
+ * Return the number of unread characters in the log buffer.
+ */
+static int log_buf_get_len(void)
+{
+	return logged_chars;
+}
+
+/*
+ * Copy a range of characters from the log buffer.
+ */
+int log_buf_copy(char *dest, int idx, int len)
+{
+	int ret, max;
+	bool took_lock = false;
+
+	if (!oops_in_progress) {
+		spin_lock_irq(&logbuf_lock);
+		took_lock = true;
+	}
+
+	max = log_buf_get_len();
+	if (idx < 0 || idx >= max) {
+		ret = -1;
+	} else {
+		if (len > max - idx)
+			len = max - idx;
+		ret = len;
+		idx += (log_end - max);
+		while (len-- > 0)
+			dest[len] = LOG_BUF(idx + len);
+	}
+
+	if (took_lock)
+		spin_unlock_irq(&logbuf_lock);
+
+	return ret;
+}
+
+/*
  * Commands to do_syslog:
  *
  * 	0 -- Close the log.  Currently a NOP.
@@ -271,14 +311,14 @@
  *	9 -- Return number of unread characters in the log buffer
  *     10 -- Return size of the log buffer
  */
-int do_syslog(int type, char __user *buf, int len)
+int do_syslog(int type, char __user *buf, int len, bool from_file)
 {
 	unsigned i, j, limit, count;
 	int do_clear = 0;
 	char c;
 	int error = 0;
 
-	error = security_syslog(type);
+	error = security_syslog(type, from_file);
 	if (error)
 		return error;
 
@@ -415,7 +455,7 @@
 
 SYSCALL_DEFINE3(syslog, int, type, char __user *, buf, int, len)
 {
-	return do_syslog(type, buf, len);
+	return do_syslog(type, buf, len, SYSLOG_FROM_CALL);
 }
 
 /*
@@ -1014,6 +1054,8 @@
 
 int printk_needs_cpu(int cpu)
 {
+	if (unlikely(cpu_is_offline(cpu)))
+		printk_tick();
 	return per_cpu(printk_pending, cpu);
 }
 
--- linux-mvl-dove-2.6.32.orig/kernel/user.c
+++ linux-mvl-dove-2.6.32/kernel/user.c
@@ -16,7 +16,6 @@
 #include <linux/interrupt.h>
 #include <linux/module.h>
 #include <linux/user_namespace.h>
-#include "cred-internals.h"
 
 struct user_namespace init_user_ns = {
 	.kref = {
@@ -56,9 +55,6 @@
 	.sigpending	= ATOMIC_INIT(0),
 	.locked_shm     = 0,
 	.user_ns	= &init_user_ns,
-#ifdef CONFIG_USER_SCHED
-	.tg		= &init_task_group,
-#endif
 };
 
 /*
@@ -75,268 +71,6 @@
 	put_user_ns(up->user_ns);
 }
 
-#ifdef CONFIG_USER_SCHED
-
-static void sched_destroy_user(struct user_struct *up)
-{
-	sched_destroy_group(up->tg);
-}
-
-static int sched_create_user(struct user_struct *up)
-{
-	int rc = 0;
-
-	up->tg = sched_create_group(&root_task_group);
-	if (IS_ERR(up->tg))
-		rc = -ENOMEM;
-
-	set_tg_uid(up);
-
-	return rc;
-}
-
-#else	/* CONFIG_USER_SCHED */
-
-static void sched_destroy_user(struct user_struct *up) { }
-static int sched_create_user(struct user_struct *up) { return 0; }
-
-#endif	/* CONFIG_USER_SCHED */
-
-#if defined(CONFIG_USER_SCHED) && defined(CONFIG_SYSFS)
-
-static struct user_struct *uid_hash_find(uid_t uid, struct hlist_head *hashent)
-{
-	struct user_struct *user;
-	struct hlist_node *h;
-
-	hlist_for_each_entry(user, h, hashent, uidhash_node) {
-		if (user->uid == uid) {
-			/* possibly resurrect an "almost deleted" object */
-			if (atomic_inc_return(&user->__count) == 1)
-				cancel_delayed_work(&user->work);
-			return user;
-		}
-	}
-
-	return NULL;
-}
-
-static struct kset *uids_kset; /* represents the /sys/kernel/uids/ directory */
-static DEFINE_MUTEX(uids_mutex);
-
-static inline void uids_mutex_lock(void)
-{
-	mutex_lock(&uids_mutex);
-}
-
-static inline void uids_mutex_unlock(void)
-{
-	mutex_unlock(&uids_mutex);
-}
-
-/* uid directory attributes */
-#ifdef CONFIG_FAIR_GROUP_SCHED
-static ssize_t cpu_shares_show(struct kobject *kobj,
-			       struct kobj_attribute *attr,
-			       char *buf)
-{
-	struct user_struct *up = container_of(kobj, struct user_struct, kobj);
-
-	return sprintf(buf, "%lu\n", sched_group_shares(up->tg));
-}
-
-static ssize_t cpu_shares_store(struct kobject *kobj,
-				struct kobj_attribute *attr,
-				const char *buf, size_t size)
-{
-	struct user_struct *up = container_of(kobj, struct user_struct, kobj);
-	unsigned long shares;
-	int rc;
-
-	sscanf(buf, "%lu", &shares);
-
-	rc = sched_group_set_shares(up->tg, shares);
-
-	return (rc ? rc : size);
-}
-
-static struct kobj_attribute cpu_share_attr =
-	__ATTR(cpu_share, 0644, cpu_shares_show, cpu_shares_store);
-#endif
-
-#ifdef CONFIG_RT_GROUP_SCHED
-static ssize_t cpu_rt_runtime_show(struct kobject *kobj,
-				   struct kobj_attribute *attr,
-				   char *buf)
-{
-	struct user_struct *up = container_of(kobj, struct user_struct, kobj);
-
-	return sprintf(buf, "%ld\n", sched_group_rt_runtime(up->tg));
-}
-
-static ssize_t cpu_rt_runtime_store(struct kobject *kobj,
-				    struct kobj_attribute *attr,
-				    const char *buf, size_t size)
-{
-	struct user_struct *up = container_of(kobj, struct user_struct, kobj);
-	unsigned long rt_runtime;
-	int rc;
-
-	sscanf(buf, "%ld", &rt_runtime);
-
-	rc = sched_group_set_rt_runtime(up->tg, rt_runtime);
-
-	return (rc ? rc : size);
-}
-
-static struct kobj_attribute cpu_rt_runtime_attr =
-	__ATTR(cpu_rt_runtime, 0644, cpu_rt_runtime_show, cpu_rt_runtime_store);
-
-static ssize_t cpu_rt_period_show(struct kobject *kobj,
-				   struct kobj_attribute *attr,
-				   char *buf)
-{
-	struct user_struct *up = container_of(kobj, struct user_struct, kobj);
-
-	return sprintf(buf, "%lu\n", sched_group_rt_period(up->tg));
-}
-
-static ssize_t cpu_rt_period_store(struct kobject *kobj,
-				    struct kobj_attribute *attr,
-				    const char *buf, size_t size)
-{
-	struct user_struct *up = container_of(kobj, struct user_struct, kobj);
-	unsigned long rt_period;
-	int rc;
-
-	sscanf(buf, "%lu", &rt_period);
-
-	rc = sched_group_set_rt_period(up->tg, rt_period);
-
-	return (rc ? rc : size);
-}
-
-static struct kobj_attribute cpu_rt_period_attr =
-	__ATTR(cpu_rt_period, 0644, cpu_rt_period_show, cpu_rt_period_store);
-#endif
-
-/* default attributes per uid directory */
-static struct attribute *uids_attributes[] = {
-#ifdef CONFIG_FAIR_GROUP_SCHED
-	&cpu_share_attr.attr,
-#endif
-#ifdef CONFIG_RT_GROUP_SCHED
-	&cpu_rt_runtime_attr.attr,
-	&cpu_rt_period_attr.attr,
-#endif
-	NULL
-};
-
-/* the lifetime of user_struct is not managed by the core (now) */
-static void uids_release(struct kobject *kobj)
-{
-	return;
-}
-
-static struct kobj_type uids_ktype = {
-	.sysfs_ops = &kobj_sysfs_ops,
-	.default_attrs = uids_attributes,
-	.release = uids_release,
-};
-
-/*
- * Create /sys/kernel/uids/<uid>/cpu_share file for this user
- * We do not create this file for users in a user namespace (until
- * sysfs tagging is implemented).
- *
- * See Documentation/scheduler/sched-design-CFS.txt for ramifications.
- */
-static int uids_user_create(struct user_struct *up)
-{
-	struct kobject *kobj = &up->kobj;
-	int error;
-
-	memset(kobj, 0, sizeof(struct kobject));
-	if (up->user_ns != &init_user_ns)
-		return 0;
-	kobj->kset = uids_kset;
-	error = kobject_init_and_add(kobj, &uids_ktype, NULL, "%d", up->uid);
-	if (error) {
-		kobject_put(kobj);
-		goto done;
-	}
-
-	kobject_uevent(kobj, KOBJ_ADD);
-done:
-	return error;
-}
-
-/* create these entries in sysfs:
- * 	"/sys/kernel/uids" directory
- * 	"/sys/kernel/uids/0" directory (for root user)
- * 	"/sys/kernel/uids/0/cpu_share" file (for root user)
- */
-int __init uids_sysfs_init(void)
-{
-	uids_kset = kset_create_and_add("uids", NULL, kernel_kobj);
-	if (!uids_kset)
-		return -ENOMEM;
-
-	return uids_user_create(&root_user);
-}
-
-/* delayed work function to remove sysfs directory for a user and free up
- * corresponding structures.
- */
-static void cleanup_user_struct(struct work_struct *w)
-{
-	struct user_struct *up = container_of(w, struct user_struct, work.work);
-	unsigned long flags;
-	int remove_user = 0;
-
-	/* Make uid_hash_remove() + sysfs_remove_file() + kobject_del()
-	 * atomic.
-	 */
-	uids_mutex_lock();
-
-	spin_lock_irqsave(&uidhash_lock, flags);
-	if (atomic_read(&up->__count) == 0) {
-		uid_hash_remove(up);
-		remove_user = 1;
-	}
-	spin_unlock_irqrestore(&uidhash_lock, flags);
-
-	if (!remove_user)
-		goto done;
-
-	if (up->user_ns == &init_user_ns) {
-		kobject_uevent(&up->kobj, KOBJ_REMOVE);
-		kobject_del(&up->kobj);
-		kobject_put(&up->kobj);
-	}
-
-	sched_destroy_user(up);
-	key_put(up->uid_keyring);
-	key_put(up->session_keyring);
-	kmem_cache_free(uid_cachep, up);
-
-done:
-	uids_mutex_unlock();
-}
-
-/* IRQs are disabled and uidhash_lock is held upon function entry.
- * IRQ state (as stored in flags) is restored and uidhash_lock released
- * upon function exit.
- */
-static void free_user(struct user_struct *up, unsigned long flags)
-{
-	INIT_DELAYED_WORK(&up->work, cleanup_user_struct);
-	schedule_delayed_work(&up->work, msecs_to_jiffies(1000));
-	spin_unlock_irqrestore(&uidhash_lock, flags);
-}
-
-#else	/* CONFIG_USER_SCHED && CONFIG_SYSFS */
-
 static struct user_struct *uid_hash_find(uid_t uid, struct hlist_head *hashent)
 {
 	struct user_struct *user;
@@ -352,45 +86,20 @@
 	return NULL;
 }
 
-int uids_sysfs_init(void) { return 0; }
-static inline int uids_user_create(struct user_struct *up) { return 0; }
-static inline void uids_mutex_lock(void) { }
-static inline void uids_mutex_unlock(void) { }
-
 /* IRQs are disabled and uidhash_lock is held upon function entry.
  * IRQ state (as stored in flags) is restored and uidhash_lock released
  * upon function exit.
  */
 static void free_user(struct user_struct *up, unsigned long flags)
+	__releases(&uidhash_lock)
 {
 	uid_hash_remove(up);
 	spin_unlock_irqrestore(&uidhash_lock, flags);
-	sched_destroy_user(up);
 	key_put(up->uid_keyring);
 	key_put(up->session_keyring);
 	kmem_cache_free(uid_cachep, up);
 }
 
-#endif
-
-#if defined(CONFIG_RT_GROUP_SCHED) && defined(CONFIG_USER_SCHED)
-/*
- * We need to check if a setuid can take place. This function should be called
- * before successfully completing the setuid.
- */
-int task_can_switch_user(struct user_struct *up, struct task_struct *tsk)
-{
-
-	return sched_rt_can_attach(up->tg, tsk);
-
-}
-#else
-int task_can_switch_user(struct user_struct *up, struct task_struct *tsk)
-{
-	return 1;
-}
-#endif
-
 /*
  * Locate the user_struct for the passed UID.  If found, take a ref on it.  The
  * caller must undo that ref with free_uid().
@@ -428,11 +137,7 @@
 	struct hlist_head *hashent = uidhashentry(ns, uid);
 	struct user_struct *up, *new;
 
-	/* Make uid_hash_find() + uids_user_create() + uid_hash_insert()
-	 * atomic.
-	 */
-	uids_mutex_lock();
-
+	/* Make uid_hash_find() + uid_hash_insert() atomic. */
 	spin_lock_irq(&uidhash_lock);
 	up = uid_hash_find(uid, hashent);
 	spin_unlock_irq(&uidhash_lock);
@@ -445,14 +150,8 @@
 		new->uid = uid;
 		atomic_set(&new->__count, 1);
 
-		if (sched_create_user(new) < 0)
-			goto out_free_user;
-
 		new->user_ns = get_user_ns(ns);
 
-		if (uids_user_create(new))
-			goto out_destoy_sched;
-
 		/*
 		 * Before adding this, check whether we raced
 		 * on adding the same user already..
@@ -460,11 +159,6 @@
 		spin_lock_irq(&uidhash_lock);
 		up = uid_hash_find(uid, hashent);
 		if (up) {
-			/* This case is not possible when CONFIG_USER_SCHED
-			 * is defined, since we serialize alloc_uid() using
-			 * uids_mutex. Hence no need to call
-			 * sched_destroy_user() or remove_user_sysfs_dir().
-			 */
 			key_put(new->uid_keyring);
 			key_put(new->session_keyring);
 			kmem_cache_free(uid_cachep, new);
@@ -475,17 +169,9 @@
 		spin_unlock_irq(&uidhash_lock);
 	}
 
-	uids_mutex_unlock();
-
 	return up;
 
-out_destoy_sched:
-	sched_destroy_user(new);
-	put_user_ns(new->user_ns);
-out_free_user:
-	kmem_cache_free(uid_cachep, new);
 out_unlock:
-	uids_mutex_unlock();
 	return NULL;
 }
 
--- linux-mvl-dove-2.6.32.orig/kernel/compat.c
+++ linux-mvl-dove-2.6.32/kernel/compat.c
@@ -25,6 +25,7 @@
 #include <linux/posix-timers.h>
 #include <linux/times.h>
 #include <linux/ptrace.h>
+#include <linux/module.h>
 
 #include <asm/uaccess.h>
 
@@ -494,29 +495,26 @@
 {
 	int ret;
 	cpumask_var_t mask;
-	unsigned long *k;
-	unsigned int min_length = cpumask_size();
-
-	if (nr_cpu_ids <= BITS_PER_COMPAT_LONG)
-		min_length = sizeof(compat_ulong_t);
 
-	if (len < min_length)
+	if ((len * BITS_PER_BYTE) < nr_cpu_ids)
+		return -EINVAL;
+	if (len & (sizeof(compat_ulong_t)-1))
 		return -EINVAL;
 
 	if (!alloc_cpumask_var(&mask, GFP_KERNEL))
 		return -ENOMEM;
 
 	ret = sched_getaffinity(pid, mask);
-	if (ret < 0)
-		goto out;
+	if (ret == 0) {
+		size_t retlen = min_t(size_t, len, cpumask_size());
 
-	k = cpumask_bits(mask);
-	ret = compat_put_bitmap(user_mask_ptr, k, min_length * 8);
-	if (ret == 0)
-		ret = min_length;
-
-out:
+		if (compat_put_bitmap(user_mask_ptr, cpumask_bits(mask), retlen * 8))
+			ret = -EFAULT;
+		else
+			ret = retlen;
+	}
 	free_cpumask_var(mask);
+
 	return ret;
 }
 
@@ -1139,3 +1137,24 @@
 
 	return 0;
 }
+
+/*
+ * Allocate user-space memory for the duration of a single system call,
+ * in order to marshall parameters inside a compat thunk.
+ */
+void __user *compat_alloc_user_space(unsigned long len)
+{
+	void __user *ptr;
+
+	/* If len would occupy more than half of the entire compat space... */
+	if (unlikely(len > (((compat_uptr_t)~0) >> 1)))
+		return NULL;
+
+	ptr = arch_compat_alloc_user_space(len);
+
+	if (unlikely(!access_ok(VERIFY_WRITE, ptr, len)))
+		return NULL;
+
+	return ptr;
+}
+EXPORT_SYMBOL_GPL(compat_alloc_user_space);
--- linux-mvl-dove-2.6.32.orig/kernel/slow-work.c
+++ linux-mvl-dove-2.6.32/kernel/slow-work.c
@@ -640,7 +640,7 @@
 			goto cancelled;
 
 		/* the timer holds a reference whilst it is pending */
-		ret = work->ops->get_ref(work);
+		ret = slow_work_get_ref(work);
 		if (ret < 0)
 			goto cant_get_ref;
 
--- linux-mvl-dove-2.6.32.orig/kernel/softlockup.c
+++ linux-mvl-dove-2.6.32/kernel/softlockup.c
@@ -140,11 +140,11 @@
 	 * Wake up the high-prio watchdog task twice per
 	 * threshold timespan.
 	 */
-	if (now > touch_timestamp + softlockup_thresh/2)
+	if (time_after(now - softlockup_thresh/2, touch_timestamp))
 		wake_up_process(per_cpu(watchdog_task, this_cpu));
 
 	/* Warn about unreasonable delays: */
-	if (now <= (touch_timestamp + softlockup_thresh))
+	if (time_before_eq(now - softlockup_thresh, touch_timestamp))
 		return;
 
 	per_cpu(print_timestamp, this_cpu) = touch_timestamp;
--- linux-mvl-dove-2.6.32.orig/kernel/taskstats.c
+++ linux-mvl-dove-2.6.32/kernel/taskstats.c
@@ -293,16 +293,18 @@
 static int add_del_listener(pid_t pid, const struct cpumask *mask, int isadd)
 {
 	struct listener_list *listeners;
-	struct listener *s, *tmp;
+	struct listener *s, *tmp, *s2;
 	unsigned int cpu;
 
 	if (!cpumask_subset(mask, cpu_possible_mask))
 		return -EINVAL;
 
+	s = NULL;
 	if (isadd == REGISTER) {
 		for_each_cpu(cpu, mask) {
-			s = kmalloc_node(sizeof(struct listener), GFP_KERNEL,
-					 cpu_to_node(cpu));
+			if (!s)
+				s = kmalloc_node(sizeof(struct listener),
+						 GFP_KERNEL, cpu_to_node(cpu));
 			if (!s)
 				goto cleanup;
 			s->pid = pid;
@@ -311,9 +313,16 @@
 
 			listeners = &per_cpu(listener_array, cpu);
 			down_write(&listeners->sem);
+			list_for_each_entry_safe(s2, tmp, &listeners->list, list) {
+				if (s2->pid == pid)
+					goto next_cpu;
+			}
 			list_add(&s->list, &listeners->list);
+			s = NULL;
+next_cpu:
 			up_write(&listeners->sem);
 		}
+		kfree(s);
 		return 0;
 	}
 
--- linux-mvl-dove-2.6.32.orig/kernel/mutex.c
+++ linux-mvl-dove-2.6.32/kernel/mutex.c
@@ -172,6 +172,13 @@
 		struct thread_info *owner;
 
 		/*
+		 * If we own the BKL, then don't spin. The owner of
+		 * the mutex might be waiting on us to release the BKL.
+		 */
+		if (unlikely(current->lock_depth >= 0))
+			break;
+
+		/*
 		 * If there's an owner, wait for it to either
 		 * release the lock or go to sleep.
 		 */
--- linux-mvl-dove-2.6.32.orig/kernel/exit.c
+++ linux-mvl-dove-2.6.32/kernel/exit.c
@@ -54,7 +54,6 @@
 #include <asm/unistd.h>
 #include <asm/pgtable.h>
 #include <asm/mmu_context.h>
-#include "cred-internals.h"
 
 static void exit_mm(struct task_struct * tsk);
 
@@ -92,6 +91,14 @@
 		posix_cpu_timers_exit_group(tsk);
 	else {
 		/*
+		 * This can only happen if the caller is de_thread().
+		 * FIXME: this is the temporary hack, we should teach
+		 * posix-cpu-timers to handle this case correctly.
+		 */
+		if (unlikely(has_group_leader_pid(tsk)))
+			posix_cpu_timers_exit_group(tsk);
+
+		/*
 		 * If there is any task waiting for the group exit
 		 * then notify it:
 		 */
@@ -110,8 +117,8 @@
 		 * We won't ever get here for the group leader, since it
 		 * will have been the last reference on the signal_struct.
 		 */
-		sig->utime = cputime_add(sig->utime, task_utime(tsk));
-		sig->stime = cputime_add(sig->stime, task_stime(tsk));
+		sig->utime = cputime_add(sig->utime, tsk->utime);
+		sig->stime = cputime_add(sig->stime, tsk->stime);
 		sig->gtime = cputime_add(sig->gtime, task_gtime(tsk));
 		sig->min_flt += tsk->min_flt;
 		sig->maj_flt += tsk->maj_flt;
@@ -899,6 +906,15 @@
 	if (unlikely(!tsk->pid))
 		panic("Attempted to kill the idle task!");
 
+	/*
+	 * If do_exit is called because this processes oopsed, it's possible
+	 * that get_fs() was left as KERNEL_DS, so reset it to USER_DS before
+	 * continuing. Amongst other possible reasons, this is to prevent
+	 * mm_release()->clear_child_tid() from writing to a user-controlled
+	 * kernel address.
+	 */
+	set_fs(USER_DS);
+
 	tracehook_report_exit(&code);
 
 	validate_creds_for_do_exit(tsk);
@@ -1205,6 +1221,7 @@
 		struct signal_struct *psig;
 		struct signal_struct *sig;
 		unsigned long maxrss;
+		cputime_t tgutime, tgstime;
 
 		/*
 		 * The resource counters for the group leader are in its
@@ -1220,20 +1237,23 @@
 		 * need to protect the access to parent->signal fields,
 		 * as other threads in the parent group can be right
 		 * here reaping other children at the same time.
+		 *
+		 * We use thread_group_times() to get times for the thread
+		 * group, which consolidates times for all threads in the
+		 * group including the group leader.
 		 */
+		thread_group_times(p, &tgutime, &tgstime);
 		spin_lock_irq(&p->real_parent->sighand->siglock);
 		psig = p->real_parent->signal;
 		sig = p->signal;
 		psig->cutime =
 			cputime_add(psig->cutime,
-			cputime_add(p->utime,
-			cputime_add(sig->utime,
-				    sig->cutime)));
+			cputime_add(tgutime,
+				    sig->cutime));
 		psig->cstime =
 			cputime_add(psig->cstime,
-			cputime_add(p->stime,
-			cputime_add(sig->stime,
-				    sig->cstime)));
+			cputime_add(tgstime,
+				    sig->cstime));
 		psig->cgtime =
 			cputime_add(psig->cgtime,
 			cputime_add(p->gtime,
@@ -1370,8 +1390,7 @@
 	if (!unlikely(wo->wo_flags & WNOWAIT))
 		*p_code = 0;
 
-	/* don't need the RCU readlock here as we're holding a spinlock */
-	uid = __task_cred(p)->uid;
+	uid = task_uid(p);
 unlock_sig:
 	spin_unlock_irq(&p->sighand->siglock);
 	if (!exit_code)
@@ -1444,7 +1463,7 @@
 	}
 	if (!unlikely(wo->wo_flags & WNOWAIT))
 		p->signal->flags &= ~SIGNAL_STOP_CONTINUED;
-	uid = __task_cred(p)->uid;
+	uid = task_uid(p);
 	spin_unlock_irq(&p->sighand->siglock);
 
 	pid = task_pid_vnr(p);
--- linux-mvl-dove-2.6.32.orig/kernel/perf_event.c
+++ linux-mvl-dove-2.6.32/kernel/perf_event.c
@@ -69,7 +69,8 @@
 	return sysctl_perf_event_paranoid > 1;
 }
 
-int sysctl_perf_event_mlock __read_mostly = 512; /* 'free' kb per user */
+/* Minimum for 128 pages + 1 for the user control page */
+int sysctl_perf_event_mlock __read_mostly = 516; /* 'free' kb per user */
 
 /*
  * max perf event sample rate
@@ -1359,6 +1360,9 @@
 		if (event->state != PERF_EVENT_STATE_ACTIVE)
 			continue;
 
+		if (event->cpu != -1 && event->cpu != smp_processor_id())
+			continue;
+
 		hwc = &event->hw;
 
 		interrupts = hwc->interrupts;
@@ -1583,7 +1587,7 @@
 		if (perf_paranoid_cpu() && !capable(CAP_SYS_ADMIN))
 			return ERR_PTR(-EACCES);
 
-		if (cpu < 0 || cpu > num_possible_cpus())
+		if (cpu < 0 || cpu >= nr_cpumask_bits)
 			return ERR_PTR(-EINVAL);
 
 		/*
@@ -2174,6 +2178,7 @@
 	perf_mmap_free_page((unsigned long)data->user_page);
 	for (i = 0; i < data->nr_pages; i++)
 		perf_mmap_free_page((unsigned long)data->data_pages[i]);
+	kfree(data);
 }
 
 #else
@@ -2214,6 +2219,7 @@
 		perf_mmap_unmark_page(base + (i * PAGE_SIZE));
 
 	vfree(base);
+	kfree(data);
 }
 
 static void perf_mmap_data_free(struct perf_mmap_data *data)
@@ -2319,7 +2325,6 @@
 
 	data = container_of(rcu_head, struct perf_mmap_data, rcu_head);
 	perf_mmap_data_free(data);
-	kfree(data);
 }
 
 static void perf_mmap_data_release(struct perf_event *event)
@@ -3225,6 +3230,12 @@
 
 static int perf_event_task_match(struct perf_event *event)
 {
+	if (event->state != PERF_EVENT_STATE_ACTIVE)
+		return 0;
+
+	if (event->cpu != -1 && event->cpu != smp_processor_id())
+		return 0;
+
 	if (event->attr.comm || event->attr.mmap || event->attr.task)
 		return 1;
 
@@ -3254,13 +3265,13 @@
 
 	cpuctx = &get_cpu_var(perf_cpu_context);
 	perf_event_task_ctx(&cpuctx->ctx, task_event);
-	put_cpu_var(perf_cpu_context);
 
 	rcu_read_lock();
 	if (!ctx)
 		ctx = rcu_dereference(task_event->task->perf_event_ctxp);
 	if (ctx)
 		perf_event_task_ctx(ctx, task_event);
+	put_cpu_var(perf_cpu_context);
 	rcu_read_unlock();
 }
 
@@ -3337,6 +3348,12 @@
 
 static int perf_event_comm_match(struct perf_event *event)
 {
+	if (event->state != PERF_EVENT_STATE_ACTIVE)
+		return 0;
+
+	if (event->cpu != -1 && event->cpu != smp_processor_id())
+		return 0;
+
 	if (event->attr.comm)
 		return 1;
 
@@ -3377,7 +3394,6 @@
 
 	cpuctx = &get_cpu_var(perf_cpu_context);
 	perf_event_comm_ctx(&cpuctx->ctx, comm_event);
-	put_cpu_var(perf_cpu_context);
 
 	rcu_read_lock();
 	/*
@@ -3387,6 +3403,7 @@
 	ctx = rcu_dereference(current->perf_event_ctxp);
 	if (ctx)
 		perf_event_comm_ctx(ctx, comm_event);
+	put_cpu_var(perf_cpu_context);
 	rcu_read_unlock();
 }
 
@@ -3461,6 +3478,12 @@
 static int perf_event_mmap_match(struct perf_event *event,
 				   struct perf_mmap_event *mmap_event)
 {
+	if (event->state != PERF_EVENT_STATE_ACTIVE)
+		return 0;
+
+	if (event->cpu != -1 && event->cpu != smp_processor_id())
+		return 0;
+
 	if (event->attr.mmap)
 		return 1;
 
@@ -3538,7 +3561,6 @@
 
 	cpuctx = &get_cpu_var(perf_cpu_context);
 	perf_event_mmap_ctx(&cpuctx->ctx, mmap_event);
-	put_cpu_var(perf_cpu_context);
 
 	rcu_read_lock();
 	/*
@@ -3548,6 +3570,7 @@
 	ctx = rcu_dereference(current->perf_event_ctxp);
 	if (ctx)
 		perf_event_mmap_ctx(ctx, mmap_event);
+	put_cpu_var(perf_cpu_context);
 	rcu_read_unlock();
 
 	kfree(buf);
@@ -3671,12 +3694,8 @@
 	if (events && atomic_dec_and_test(&event->event_limit)) {
 		ret = 1;
 		event->pending_kill = POLL_HUP;
-		if (nmi) {
-			event->pending_disable = 1;
-			perf_pending_queue(&event->pending,
-					   perf_pending_event);
-		} else
-			perf_event_disable(event);
+		event->pending_disable = 1;
+		perf_pending_queue(&event->pending, perf_pending_event);
 	}
 
 	perf_event_output(event, nmi, data, regs);
@@ -3810,6 +3829,9 @@
 				enum perf_type_id type,
 				u32 event_id, struct pt_regs *regs)
 {
+	if (event->cpu != -1 && event->cpu != smp_processor_id())
+		return 0;
+
 	if (!perf_swevent_is_counting(event))
 		return 0;
 
@@ -3949,6 +3971,7 @@
 	event->pmu->read(event);
 
 	data.addr = 0;
+	data.period = event->hw.last_period;
 	regs = get_irq_regs();
 	/*
 	 * In case we exclude kernel IPs or are somehow not in interrupt
@@ -4484,8 +4507,8 @@
 	struct perf_event_context *ctx;
 	struct file *event_file = NULL;
 	struct file *group_file = NULL;
+	int event_fd;
 	int fput_needed = 0;
-	int fput_needed2 = 0;
 	int err;
 
 	/* for future expandability... */
@@ -4506,12 +4529,18 @@
 			return -EINVAL;
 	}
 
+	event_fd = get_unused_fd_flags(O_RDWR);
+	if (event_fd < 0)
+		return event_fd;
+
 	/*
 	 * Get the target context (task or percpu):
 	 */
 	ctx = find_get_context(pid, cpu);
-	if (IS_ERR(ctx))
-		return PTR_ERR(ctx);
+	if (IS_ERR(ctx)) {
+		err = PTR_ERR(ctx);
+		goto err_fd;
+	}
 
 	/*
 	 * Look up the group leader (we will attach this event to it):
@@ -4551,13 +4580,11 @@
 	if (IS_ERR(event))
 		goto err_put_context;
 
-	err = anon_inode_getfd("[perf_event]", &perf_fops, event, 0);
-	if (err < 0)
-		goto err_free_put_context;
-
-	event_file = fget_light(err, &fput_needed2);
-	if (!event_file)
+	event_file = anon_inode_getfile("[perf_event]", &perf_fops, event, O_RDWR);
+	if (IS_ERR(event_file)) {
+		err = PTR_ERR(event_file);
 		goto err_free_put_context;
+	}
 
 	if (flags & PERF_FLAG_FD_OUTPUT) {
 		err = perf_event_set_output(event, group_fd);
@@ -4578,19 +4605,19 @@
 	list_add_tail(&event->owner_entry, &current->perf_event_list);
 	mutex_unlock(&current->perf_event_mutex);
 
-err_fput_free_put_context:
-	fput_light(event_file, fput_needed2);
+	fput_light(group_file, fput_needed);
+	fd_install(event_fd, event_file);
+	return event_fd;
 
+err_fput_free_put_context:
+	fput(event_file);
 err_free_put_context:
-	if (err < 0)
-		kfree(event);
-
+	free_event(event);
 err_put_context:
-	if (err < 0)
-		put_ctx(ctx);
-
 	fput_light(group_file, fput_needed);
-
+	put_ctx(ctx);
+err_fd:
+	put_unused_fd(event_fd);
 	return err;
 }
 
@@ -4955,12 +4982,22 @@
 	return ret;
 }
 
+static void __init perf_event_init_all_cpus(void)
+{
+	int cpu;
+	struct perf_cpu_context *cpuctx;
+
+	for_each_possible_cpu(cpu) {
+		cpuctx = &per_cpu(perf_cpu_context, cpu);
+		__perf_event_init_context(&cpuctx->ctx, NULL);
+	}
+}
+
 static void __cpuinit perf_event_init_cpu(int cpu)
 {
 	struct perf_cpu_context *cpuctx;
 
 	cpuctx = &per_cpu(perf_cpu_context, cpu);
-	__perf_event_init_context(&cpuctx->ctx, NULL);
 
 	spin_lock(&perf_resource_lock);
 	cpuctx->max_pertask = perf_max_events - perf_reserved_percpu;
@@ -5031,6 +5068,7 @@
 
 void __init perf_event_init(void)
 {
+	perf_event_init_all_cpus();
 	perf_cpu_notify(&perf_cpu_nb, (unsigned long)CPU_UP_PREPARE,
 			(void *)(long)smp_processor_id());
 	perf_cpu_notify(&perf_cpu_nb, (unsigned long)CPU_ONLINE,
--- linux-mvl-dove-2.6.32.orig/kernel/sys.c
+++ linux-mvl-dove-2.6.32/kernel/sys.c
@@ -567,11 +567,6 @@
 	if (!new_user)
 		return -EAGAIN;
 
-	if (!task_can_switch_user(new_user, current)) {
-		free_uid(new_user);
-		return -EINVAL;
-	}
-
 	if (atomic_read(&new_user->processes) >=
 				current->signal->rlim[RLIMIT_NPROC].rlim_cur &&
 			new_user != INIT_USER) {
@@ -911,16 +906,15 @@
 
 void do_sys_times(struct tms *tms)
 {
-	struct task_cputime cputime;
-	cputime_t cutime, cstime;
+	cputime_t tgutime, tgstime, cutime, cstime;
 
-	thread_group_cputime(current, &cputime);
 	spin_lock_irq(&current->sighand->siglock);
+	thread_group_times(current, &tgutime, &tgstime);
 	cutime = current->signal->cutime;
 	cstime = current->signal->cstime;
 	spin_unlock_irq(&current->sighand->siglock);
-	tms->tms_utime = cputime_to_clock_t(cputime.utime);
-	tms->tms_stime = cputime_to_clock_t(cputime.stime);
+	tms->tms_utime = cputime_to_clock_t(tgutime);
+	tms->tms_stime = cputime_to_clock_t(tgstime);
 	tms->tms_cutime = cputime_to_clock_t(cutime);
 	tms->tms_cstime = cputime_to_clock_t(cstime);
 }
@@ -963,6 +957,7 @@
 		pgid = pid;
 	if (pgid < 0)
 		return -EINVAL;
+	rcu_read_lock();
 
 	/* From this point forward we keep holding onto the tasklist lock
 	 * so that our parent does not change from under us. -DaveM
@@ -1016,6 +1011,7 @@
 out:
 	/* All paths lead to here, thus we are safe. -DaveM */
 	write_unlock_irq(&tasklist_lock);
+	rcu_read_unlock();
 	return err;
 }
 
@@ -1338,8 +1334,7 @@
 {
 	struct task_struct *t;
 	unsigned long flags;
-	cputime_t utime, stime;
-	struct task_cputime cputime;
+	cputime_t tgutime, tgstime, utime, stime;
 	unsigned long maxrss = 0;
 
 	memset((char *) r, 0, sizeof *r);
@@ -1373,9 +1368,9 @@
 				break;
 
 		case RUSAGE_SELF:
-			thread_group_cputime(p, &cputime);
-			utime = cputime_add(utime, cputime.utime);
-			stime = cputime_add(stime, cputime.stime);
+			thread_group_times(p, &tgutime, &tgstime);
+			utime = cputime_add(utime, tgutime);
+			stime = cputime_add(stime, tgstime);
 			r->ru_nvcsw += p->signal->nvcsw;
 			r->ru_nivcsw += p->signal->nivcsw;
 			r->ru_minflt += p->signal->min_flt;
--- linux-mvl-dove-2.6.32.orig/kernel/trace/ring_buffer.c
+++ linux-mvl-dove-2.6.32/kernel/trace/ring_buffer.c
@@ -389,7 +389,7 @@
 #define BUF_MAX_DATA_SIZE (BUF_PAGE_SIZE - (sizeof(u32) * 2))
 
 /* Max number of timestamps that can fit on a page */
-#define RB_TIMESTAMPS_PER_PAGE	(BUF_PAGE_SIZE / RB_LEN_TIME_STAMP)
+#define RB_TIMESTAMPS_PER_PAGE	(BUF_PAGE_SIZE / RB_LEN_TIME_EXTEND)
 
 int ring_buffer_print_page_header(struct trace_seq *s)
 {
@@ -2237,12 +2237,12 @@
 	if (ring_buffer_flags != RB_BUFFERS_ON)
 		return NULL;
 
-	if (atomic_read(&buffer->record_disabled))
-		return NULL;
-
 	/* If we are tracing schedule, we don't want to recurse */
 	resched = ftrace_preempt_disable();
 
+	if (atomic_read(&buffer->record_disabled))
+		goto out_nocheck;
+
 	if (trace_recursive_lock())
 		goto out_nocheck;
 
@@ -2474,11 +2474,11 @@
 	if (ring_buffer_flags != RB_BUFFERS_ON)
 		return -EBUSY;
 
-	if (atomic_read(&buffer->record_disabled))
-		return -EBUSY;
-
 	resched = ftrace_preempt_disable();
 
+	if (atomic_read(&buffer->record_disabled))
+		goto out;
+
 	cpu = raw_smp_processor_id();
 
 	if (!cpumask_test_cpu(cpu, buffer->cpumask))
--- linux-mvl-dove-2.6.32.orig/kernel/trace/ftrace.c
+++ linux-mvl-dove-2.6.32/kernel/trace/ftrace.c
@@ -369,11 +369,18 @@
 {
 	struct ftrace_profile *rec = v;
 	char str[KSYM_SYMBOL_LEN];
+	int ret = 0;
 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
-	static DEFINE_MUTEX(mutex);
 	static struct trace_seq s;
 	unsigned long long avg;
 #endif
+	mutex_lock(&ftrace_profile_lock);
+
+	/* we raced with function_profile_reset() */
+	if (unlikely(rec->counter == 0)) {
+		ret = -EBUSY;
+		goto out;
+	}
 
 	kallsyms_lookup(rec->ip, NULL, NULL, NULL, str);
 	seq_printf(m, "  %-30.30s  %10lu", str, rec->counter);
@@ -383,17 +390,17 @@
 	avg = rec->time;
 	do_div(avg, rec->counter);
 
-	mutex_lock(&mutex);
 	trace_seq_init(&s);
 	trace_print_graph_duration(rec->time, &s);
 	trace_seq_puts(&s, "    ");
 	trace_print_graph_duration(avg, &s);
 	trace_print_seq(m, &s);
-	mutex_unlock(&mutex);
 #endif
 	seq_putc(m, '\n');
+out:
+	mutex_unlock(&ftrace_profile_lock);
 
-	return 0;
+	return ret;
 }
 
 static void ftrace_profile_reset(struct ftrace_profile_stat *stat)
@@ -1473,6 +1480,8 @@
 		if (*pos > 0)
 			return t_hash_start(m, pos);
 		iter->flags |= FTRACE_ITER_PRINTALL;
+		/* reset in case of seek/pread */
+		iter->flags &= ~FTRACE_ITER_HASH;
 		return iter;
 	}
 
@@ -2351,14 +2360,16 @@
 		ftrace_match_records(parser->buffer, parser->idx, enable);
 	}
 
-	mutex_lock(&ftrace_lock);
-	if (ftrace_start_up && ftrace_enabled)
-		ftrace_run_update_code(FTRACE_ENABLE_CALLS);
-	mutex_unlock(&ftrace_lock);
-
 	trace_parser_put(parser);
 	kfree(iter);
 
+	if (file->f_mode & FMODE_WRITE) {
+		mutex_lock(&ftrace_lock);
+		if (ftrace_start_up && ftrace_enabled)
+			ftrace_run_update_code(FTRACE_ENABLE_CALLS);
+		mutex_unlock(&ftrace_lock);
+	}
+
 	mutex_unlock(&ftrace_regex_lock);
 	return 0;
 }
@@ -2393,7 +2404,7 @@
 	.open = ftrace_filter_open,
 	.read = seq_read,
 	.write = ftrace_filter_write,
-	.llseek = ftrace_regex_lseek,
+	.llseek = no_llseek,
 	.release = ftrace_filter_release,
 };
 
@@ -3163,7 +3174,7 @@
 	/* The cpu_boot init_task->ret_stack will never be freed */
 	for_each_online_cpu(cpu) {
 		if (!idle_task(cpu)->ret_stack)
-			ftrace_graph_init_task(idle_task(cpu));
+			ftrace_graph_init_idle_task(idle_task(cpu), cpu);
 	}
 
 	do {
@@ -3253,11 +3264,55 @@
 	mutex_unlock(&ftrace_lock);
 }
 
+static DEFINE_PER_CPU(struct ftrace_ret_stack *, idle_ret_stack);
+
+static void
+graph_init_task(struct task_struct *t, struct ftrace_ret_stack *ret_stack)
+{
+	atomic_set(&t->tracing_graph_pause, 0);
+	atomic_set(&t->trace_overrun, 0);
+	t->ftrace_timestamp = 0;
+	/* make curr_ret_stack visable before we add the ret_stack */
+	smp_wmb();
+	t->ret_stack = ret_stack;
+}
+
+/*
+ * Allocate a return stack for the idle task. May be the first
+ * time through, or it may be done by CPU hotplug online.
+ */
+void ftrace_graph_init_idle_task(struct task_struct *t, int cpu)
+{
+	t->curr_ret_stack = -1;
+	/*
+	 * The idle task has no parent, it either has its own
+	 * stack or no stack at all.
+	 */
+	if (t->ret_stack)
+		WARN_ON(t->ret_stack != per_cpu(idle_ret_stack, cpu));
+
+	if (ftrace_graph_active) {
+		struct ftrace_ret_stack *ret_stack;
+
+		ret_stack = per_cpu(idle_ret_stack, cpu);
+		if (!ret_stack) {
+			ret_stack = kmalloc(FTRACE_RETFUNC_DEPTH
+					    * sizeof(struct ftrace_ret_stack),
+					    GFP_KERNEL);
+			if (!ret_stack)
+				return;
+			per_cpu(idle_ret_stack, cpu) = ret_stack;
+		}
+		graph_init_task(t, ret_stack);
+	}
+}
+
 /* Allocate a return stack for newly created task */
 void ftrace_graph_init_task(struct task_struct *t)
 {
 	/* Make sure we do not use the parent ret_stack */
 	t->ret_stack = NULL;
+	t->curr_ret_stack = -1;
 
 	if (ftrace_graph_active) {
 		struct ftrace_ret_stack *ret_stack;
@@ -3267,13 +3322,7 @@
 				GFP_KERNEL);
 		if (!ret_stack)
 			return;
-		t->curr_ret_stack = -1;
-		atomic_set(&t->tracing_graph_pause, 0);
-		atomic_set(&t->trace_overrun, 0);
-		t->ftrace_timestamp = 0;
-		/* make curr_ret_stack visable before we add the ret_stack */
-		smp_wmb();
-		t->ret_stack = ret_stack;
+		graph_init_task(t, ret_stack);
 	}
 }
 
--- linux-mvl-dove-2.6.32.orig/kernel/trace/trace.c
+++ linux-mvl-dove-2.6.32/kernel/trace/trace.c
@@ -748,10 +748,10 @@
 	mutex_unlock(&trace_types_lock);
 }
 
-static void __tracing_reset(struct trace_array *tr, int cpu)
+static void __tracing_reset(struct ring_buffer *buffer, int cpu)
 {
 	ftrace_disable_cpu();
-	ring_buffer_reset_cpu(tr->buffer, cpu);
+	ring_buffer_reset_cpu(buffer, cpu);
 	ftrace_enable_cpu();
 }
 
@@ -763,7 +763,7 @@
 
 	/* Make sure all commits have finished */
 	synchronize_sched();
-	__tracing_reset(tr, cpu);
+	__tracing_reset(buffer, cpu);
 
 	ring_buffer_record_enable(buffer);
 }
@@ -781,7 +781,7 @@
 	tr->time_start = ftrace_now(tr->cpu);
 
 	for_each_online_cpu(cpu)
-		__tracing_reset(tr, cpu);
+		__tracing_reset(buffer, cpu);
 
 	ring_buffer_record_enable(buffer);
 }
@@ -858,6 +858,8 @@
 		goto out;
 	}
 
+	/* Prevent the buffers from switching */
+	__raw_spin_lock(&ftrace_max_lock);
 
 	buffer = global_trace.buffer;
 	if (buffer)
@@ -867,6 +869,8 @@
 	if (buffer)
 		ring_buffer_record_enable(buffer);
 
+	__raw_spin_unlock(&ftrace_max_lock);
+
 	ftrace_start();
  out:
 	spin_unlock_irqrestore(&tracing_start_lock, flags);
@@ -888,6 +892,9 @@
 	if (trace_stop_count++)
 		goto out;
 
+	/* Prevent the buffers from switching */
+	__raw_spin_lock(&ftrace_max_lock);
+
 	buffer = global_trace.buffer;
 	if (buffer)
 		ring_buffer_record_disable(buffer);
@@ -896,6 +903,8 @@
 	if (buffer)
 		ring_buffer_record_disable(buffer);
 
+	__raw_spin_unlock(&ftrace_max_lock);
+
  out:
 	spin_unlock_irqrestore(&tracing_start_lock, flags);
 }
@@ -1162,6 +1171,13 @@
 	if (!(trace_flags & TRACE_ITER_USERSTACKTRACE))
 		return;
 
+	/*
+	 * NMIs can not handle page faults, even with fix ups.
+	 * The save user stack can (and often does) fault.
+	 */
+	if (unlikely(in_nmi()))
+		return;
+
 	event = trace_buffer_lock_reserve(buffer, TRACE_USER_STACK,
 					  sizeof(*entry), flags, pc);
 	if (!event)
@@ -2183,11 +2199,19 @@
 	return count;
 }
 
+static loff_t tracing_seek(struct file *file, loff_t offset, int origin)
+{
+	if (file->f_mode & FMODE_READ)
+		return seq_lseek(file, offset, origin);
+	else
+		return 0;
+}
+
 static const struct file_operations tracing_fops = {
 	.open		= tracing_open,
 	.read		= seq_read,
 	.write		= tracing_write_stub,
-	.llseek		= seq_lseek,
+	.llseek		= tracing_seek,
 	.release	= tracing_release,
 };
 
--- linux-mvl-dove-2.6.32.orig/kernel/trace/trace.h
+++ linux-mvl-dove-2.6.32/kernel/trace/trace.h
@@ -746,7 +746,8 @@
 
 #undef FTRACE_ENTRY
 #define FTRACE_ENTRY(call, struct_name, id, tstruct, print)		\
-	extern struct ftrace_event_call event_##call;
+	extern struct ftrace_event_call					\
+	__attribute__((__aligned__(4))) event_##call;
 #undef FTRACE_ENTRY_DUP
 #define FTRACE_ENTRY_DUP(call, struct_name, id, tstruct, print)		\
 	FTRACE_ENTRY(call, struct_name, id, PARAMS(tstruct), PARAMS(print))
--- linux-mvl-dove-2.6.32.orig/kernel/irq/manage.c
+++ linux-mvl-dove-2.6.32/kernel/irq/manage.c
@@ -200,7 +200,7 @@
 void __disable_irq(struct irq_desc *desc, unsigned int irq, bool suspend)
 {
 	if (suspend) {
-		if (!desc->action || (desc->action->flags & IRQF_TIMER))
+		if (!desc->action || (desc->action->flags & IRQF_NO_SUSPEND))
 			return;
 		desc->status |= IRQ_SUSPENDED;
 	}
@@ -265,8 +265,17 @@
 
 void __enable_irq(struct irq_desc *desc, unsigned int irq, bool resume)
 {
-	if (resume)
+	if (resume) {
+		if (!(desc->status & IRQ_SUSPENDED)) {
+			if (!desc->action)
+				return;
+			if (!(desc->action->flags & IRQF_FORCE_RESUME))
+				return;
+			/* Pretend that it got disabled ! */
+			desc->depth++;
+		}
 		desc->status &= ~IRQ_SUSPENDED;
+	}
 
 	switch (desc->depth) {
 	case 0:
@@ -436,6 +445,9 @@
 		/* note that IRQF_TRIGGER_MASK == IRQ_TYPE_SENSE_MASK */
 		desc->status &= ~(IRQ_LEVEL | IRQ_TYPE_SENSE_MASK);
 		desc->status |= flags;
+
+		if (chip != desc->chip)
+			irq_chip_set_defaults(desc->chip);
 	}
 
 	return ret;
@@ -735,6 +747,16 @@
 		if (new->flags & IRQF_ONESHOT)
 			desc->status |= IRQ_ONESHOT;
 
+		/*
+		 * Force MSI interrupts to run with interrupts
+		 * disabled. The multi vector cards can cause stack
+		 * overflows due to nested interrupts when enough of
+		 * them are directed to a core and fire at the same
+		 * time.
+		 */
+		if (desc->msi_desc)
+			new->flags |= IRQF_DISABLED;
+
 		if (!(desc->status & IRQ_NOAUTOEN)) {
 			desc->depth = 0;
 			desc->status &= ~IRQ_DISABLED;
@@ -1066,7 +1088,7 @@
 	if (retval)
 		kfree(action);
 
-#ifdef CONFIG_DEBUG_SHIRQ
+#ifdef CONFIG_DEBUG_SHIRQ_FIXME
 	if (irqflags & IRQF_SHARED) {
 		/*
 		 * It's a shared IRQ -- the driver ought to be prepared for it
--- linux-mvl-dove-2.6.32.orig/kernel/irq/pm.c
+++ linux-mvl-dove-2.6.32/kernel/irq/pm.c
@@ -53,9 +53,6 @@
 	for_each_irq_desc(irq, desc) {
 		unsigned long flags;
 
-		if (!(desc->status & IRQ_SUSPENDED))
-			continue;
-
 		spin_lock_irqsave(&desc->lock, flags);
 		__enable_irq(desc, irq, true);
 		spin_unlock_irqrestore(&desc->lock, flags);
--- linux-mvl-dove-2.6.32.orig/kernel/irq/chip.c
+++ linux-mvl-dove-2.6.32/kernel/irq/chip.c
@@ -18,11 +18,7 @@
 
 #include "internals.h"
 
-/**
- *	dynamic_irq_init - initialize a dynamically allocated irq
- *	@irq:	irq number to initialize
- */
-void dynamic_irq_init(unsigned int irq)
+static void dynamic_irq_init_x(unsigned int irq, bool keep_chip_data)
 {
 	struct irq_desc *desc;
 	unsigned long flags;
@@ -41,7 +37,8 @@
 	desc->depth = 1;
 	desc->msi_desc = NULL;
 	desc->handler_data = NULL;
-	desc->chip_data = NULL;
+	if (!keep_chip_data)
+		desc->chip_data = NULL;
 	desc->action = NULL;
 	desc->irq_count = 0;
 	desc->irqs_unhandled = 0;
@@ -55,10 +52,26 @@
 }
 
 /**
- *	dynamic_irq_cleanup - cleanup a dynamically allocated irq
+ *	dynamic_irq_init - initialize a dynamically allocated irq
  *	@irq:	irq number to initialize
  */
-void dynamic_irq_cleanup(unsigned int irq)
+void dynamic_irq_init(unsigned int irq)
+{
+	dynamic_irq_init_x(irq, false);
+}
+
+/**
+ *	dynamic_irq_init_keep_chip_data - initialize a dynamically allocated irq
+ *	@irq:	irq number to initialize
+ *
+ *	does not set irq_to_desc(irq)->chip_data to NULL
+ */
+void dynamic_irq_init_keep_chip_data(unsigned int irq)
+{
+	dynamic_irq_init_x(irq, true);
+}
+
+static void dynamic_irq_cleanup_x(unsigned int irq, bool keep_chip_data)
 {
 	struct irq_desc *desc = irq_to_desc(irq);
 	unsigned long flags;
@@ -77,7 +90,8 @@
 	}
 	desc->msi_desc = NULL;
 	desc->handler_data = NULL;
-	desc->chip_data = NULL;
+	if (!keep_chip_data)
+		desc->chip_data = NULL;
 	desc->handle_irq = handle_bad_irq;
 	desc->chip = &no_irq_chip;
 	desc->name = NULL;
@@ -85,6 +99,26 @@
 	spin_unlock_irqrestore(&desc->lock, flags);
 }
 
+/**
+ *	dynamic_irq_cleanup - cleanup a dynamically allocated irq
+ *	@irq:	irq number to initialize
+ */
+void dynamic_irq_cleanup(unsigned int irq)
+{
+	dynamic_irq_cleanup_x(irq, false);
+}
+
+/**
+ *	dynamic_irq_cleanup_keep_chip_data - cleanup a dynamically allocated irq
+ *	@irq:	irq number to initialize
+ *
+ *	does not set irq_to_desc(irq)->chip_data to NULL
+ */
+void dynamic_irq_cleanup_keep_chip_data(unsigned int irq)
+{
+	dynamic_irq_cleanup_x(irq, true);
+}
+
 
 /**
  *	set_irq_chip - set the irq chip for an irq
--- linux-mvl-dove-2.6.32.orig/kernel/power/wakelock.c
+++ linux-mvl-dove-2.6.32/kernel/power/wakelock.c
@@ -0,0 +1,599 @@
+/* kernel/power/wakelock.c
+ *
+ * Copyright (C) 2005-2008 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/rtc.h>
+#include <linux/suspend.h>
+#include <linux/syscalls.h> /* sys_sync */
+#include <linux/wakelock.h>
+#ifdef CONFIG_WAKELOCK_STAT
+#include <linux/proc_fs.h>
+#endif
+#include "power.h"
+
+enum {
+	DEBUG_EXIT_SUSPEND = 1U << 0,
+	DEBUG_WAKEUP = 1U << 1,
+	DEBUG_SUSPEND = 1U << 2,
+	DEBUG_EXPIRE = 1U << 3,
+	DEBUG_WAKE_LOCK = 1U << 4,
+};
+static int debug_mask = DEBUG_EXIT_SUSPEND | DEBUG_WAKEUP;
+module_param_named(debug_mask, debug_mask, int, S_IRUGO | S_IWUSR | S_IWGRP);
+
+#define WAKE_LOCK_TYPE_MASK              (0x0f)
+#define WAKE_LOCK_INITIALIZED            (1U << 8)
+#define WAKE_LOCK_ACTIVE                 (1U << 9)
+#define WAKE_LOCK_AUTO_EXPIRE            (1U << 10)
+#define WAKE_LOCK_PREVENTING_SUSPEND     (1U << 11)
+
+static DEFINE_SPINLOCK(list_lock);
+static LIST_HEAD(inactive_locks);
+static struct list_head active_wake_locks[WAKE_LOCK_TYPE_COUNT];
+static int current_event_num;
+struct workqueue_struct *suspend_work_queue;
+struct wake_lock main_wake_lock;
+suspend_state_t requested_suspend_state = PM_SUSPEND_MEM;
+static struct wake_lock unknown_wakeup;
+
+#ifdef CONFIG_WAKELOCK_STAT
+static struct wake_lock deleted_wake_locks;
+static ktime_t last_sleep_time_update;
+static int wait_for_wakeup;
+
+int get_expired_time(struct wake_lock *lock, ktime_t *expire_time)
+{
+	struct timespec ts;
+	struct timespec kt;
+	struct timespec tomono;
+	struct timespec delta;
+	unsigned long seq;
+	long timeout;
+
+	if (!(lock->flags & WAKE_LOCK_AUTO_EXPIRE))
+		return 0;
+	do {
+		seq = read_seqbegin(&xtime_lock);
+		timeout = lock->expires - jiffies;
+		if (timeout > 0)
+			return 0;
+		kt = current_kernel_time();
+		tomono = wall_to_monotonic;
+	} while (read_seqretry(&xtime_lock, seq));
+	jiffies_to_timespec(-timeout, &delta);
+	set_normalized_timespec(&ts, kt.tv_sec + tomono.tv_sec - delta.tv_sec,
+				kt.tv_nsec + tomono.tv_nsec - delta.tv_nsec);
+	*expire_time = timespec_to_ktime(ts);
+	return 1;
+}
+
+
+static int print_lock_stat(char *buf, struct wake_lock *lock)
+{
+	int lock_count = lock->stat.count;
+	int expire_count = lock->stat.expire_count;
+	ktime_t active_time = ktime_set(0, 0);
+	ktime_t total_time = lock->stat.total_time;
+	ktime_t max_time = lock->stat.max_time;
+	ktime_t prevent_suspend_time = lock->stat.prevent_suspend_time;
+	if (lock->flags & WAKE_LOCK_ACTIVE) {
+		ktime_t now, add_time;
+		int expired = get_expired_time(lock, &now);
+		if (!expired)
+			now = ktime_get();
+		add_time = ktime_sub(now, lock->stat.last_time);
+		lock_count++;
+		if (!expired)
+			active_time = add_time;
+		else
+			expire_count++;
+		total_time = ktime_add(total_time, add_time);
+		if (lock->flags & WAKE_LOCK_PREVENTING_SUSPEND)
+			prevent_suspend_time = ktime_add(prevent_suspend_time,
+					ktime_sub(now, last_sleep_time_update));
+		if (add_time.tv64 > max_time.tv64)
+			max_time = add_time;
+	}
+
+	return sprintf(buf, "\"%s\"\t%d\t%d\t%d\t%lld\t%lld\t%lld\t%lld\t"
+		       "%lld\n", lock->name, lock_count, expire_count,
+		       lock->stat.wakeup_count, ktime_to_ns(active_time),
+		       ktime_to_ns(total_time),
+		       ktime_to_ns(prevent_suspend_time), ktime_to_ns(max_time),
+		       ktime_to_ns(lock->stat.last_time));
+}
+
+
+static int wakelocks_read_proc(char *page, char **start, off_t off,
+			       int count, int *eof, void *data)
+{
+	unsigned long irqflags;
+	struct wake_lock *lock;
+	int len = 0;
+	char *p = page;
+	int type;
+
+	spin_lock_irqsave(&list_lock, irqflags);
+
+	p += sprintf(p, "name\tcount\texpire_count\twake_count\tactive_since"
+		     "\ttotal_time\tsleep_time\tmax_time\tlast_change\n");
+	list_for_each_entry(lock, &inactive_locks, link) {
+		p += print_lock_stat(p, lock);
+	}
+	for (type = 0; type < WAKE_LOCK_TYPE_COUNT; type++) {
+		list_for_each_entry(lock, &active_wake_locks[type], link)
+			p += print_lock_stat(p, lock);
+	}
+	spin_unlock_irqrestore(&list_lock, irqflags);
+
+	*start = page + off;
+
+	len = p - page;
+	if (len > off)
+		len -= off;
+	else
+		len = 0;
+
+	return len < count ? len  : count;
+}
+
+static void wake_unlock_stat_locked(struct wake_lock *lock, int expired)
+{
+	ktime_t duration;
+	ktime_t now;
+	if (!(lock->flags & WAKE_LOCK_ACTIVE))
+		return;
+	if (get_expired_time(lock, &now))
+		expired = 1;
+	else
+		now = ktime_get();
+	lock->stat.count++;
+	if (expired)
+		lock->stat.expire_count++;
+	duration = ktime_sub(now, lock->stat.last_time);
+	lock->stat.total_time = ktime_add(lock->stat.total_time, duration);
+	if (ktime_to_ns(duration) > ktime_to_ns(lock->stat.max_time))
+		lock->stat.max_time = duration;
+	lock->stat.last_time = ktime_get();
+	if (lock->flags & WAKE_LOCK_PREVENTING_SUSPEND) {
+		duration = ktime_sub(now, last_sleep_time_update);
+		lock->stat.prevent_suspend_time = ktime_add(
+			lock->stat.prevent_suspend_time, duration);
+		lock->flags &= ~WAKE_LOCK_PREVENTING_SUSPEND;
+	}
+}
+
+static void update_sleep_wait_stats_locked(int done)
+{
+	struct wake_lock *lock;
+	ktime_t now, etime, elapsed, add;
+	int expired;
+
+	now = ktime_get();
+	elapsed = ktime_sub(now, last_sleep_time_update);
+	list_for_each_entry(lock, &active_wake_locks[WAKE_LOCK_SUSPEND], link) {
+		expired = get_expired_time(lock, &etime);
+		if (lock->flags & WAKE_LOCK_PREVENTING_SUSPEND) {
+			if (expired)
+				add = ktime_sub(etime, last_sleep_time_update);
+			else
+				add = elapsed;
+			lock->stat.prevent_suspend_time = ktime_add(
+				lock->stat.prevent_suspend_time, add);
+		}
+		if (done || expired)
+			lock->flags &= ~WAKE_LOCK_PREVENTING_SUSPEND;
+		else
+			lock->flags |= WAKE_LOCK_PREVENTING_SUSPEND;
+	}
+	last_sleep_time_update = now;
+}
+#endif
+
+
+static void expire_wake_lock(struct wake_lock *lock)
+{
+#ifdef CONFIG_WAKELOCK_STAT
+	wake_unlock_stat_locked(lock, 1);
+#endif
+	lock->flags &= ~(WAKE_LOCK_ACTIVE | WAKE_LOCK_AUTO_EXPIRE);
+	list_del(&lock->link);
+	list_add(&lock->link, &inactive_locks);
+	if (debug_mask & (DEBUG_WAKE_LOCK | DEBUG_EXPIRE))
+		pr_info("expired wake lock %s\n", lock->name);
+}
+
+static void print_active_locks(int type)
+{
+	unsigned long irqflags;
+	struct wake_lock *lock;
+
+	BUG_ON(type >= WAKE_LOCK_TYPE_COUNT);
+	spin_lock_irqsave(&list_lock, irqflags);
+	list_for_each_entry(lock, &active_wake_locks[type], link) {
+		if (lock->flags & WAKE_LOCK_AUTO_EXPIRE) {
+			long timeout = lock->expires - jiffies;
+			if (timeout <= 0)
+				pr_info("wake lock %s, expired\n", lock->name);
+			else
+				pr_info("active wake lock %s, time left %ld\n",
+					lock->name, timeout);
+		} else
+			pr_info("active wake lock %s\n", lock->name);
+	}
+	spin_unlock_irqrestore(&list_lock, irqflags);
+}
+
+static long has_wake_lock_locked(int type)
+{
+	struct wake_lock *lock, *n;
+	long max_timeout = 0;
+
+	BUG_ON(type >= WAKE_LOCK_TYPE_COUNT);
+	list_for_each_entry_safe(lock, n, &active_wake_locks[type], link) {
+		if (lock->flags & WAKE_LOCK_AUTO_EXPIRE) {
+			long timeout = lock->expires - jiffies;
+			if (timeout <= 0)
+				expire_wake_lock(lock);
+			else if (timeout > max_timeout)
+				max_timeout = timeout;
+		} else
+			return -1;
+	}
+	return max_timeout;
+}
+
+long has_wake_lock(int type)
+{
+	long ret;
+	unsigned long irqflags;
+	spin_lock_irqsave(&list_lock, irqflags);
+	ret = has_wake_lock_locked(type);
+	spin_unlock_irqrestore(&list_lock, irqflags);
+	return ret;
+}
+
+static void suspend(struct work_struct *work)
+{
+	int ret;
+	int entry_event_num;
+
+	if (has_wake_lock(WAKE_LOCK_SUSPEND)) {
+		if (debug_mask & DEBUG_SUSPEND)
+			pr_info("suspend: abort suspend\n");
+		return;
+	}
+
+	entry_event_num = current_event_num;
+	sys_sync();
+	if (debug_mask & DEBUG_SUSPEND)
+		pr_info("suspend: enter suspend\n");
+        return; //FIXME: suspend does not work right now.
+	ret = pm_suspend(requested_suspend_state);
+	if (debug_mask & DEBUG_EXIT_SUSPEND) {
+		struct timespec ts;
+		struct rtc_time tm;
+		getnstimeofday(&ts);
+		rtc_time_to_tm(ts.tv_sec, &tm);
+		pr_info("suspend: exit suspend, ret = %d "
+			"(%d-%02d-%02d %02d:%02d:%02d.%09lu UTC)\n", ret,
+			tm.tm_year + 1900, tm.tm_mon + 1, tm.tm_mday,
+			tm.tm_hour, tm.tm_min, tm.tm_sec, ts.tv_nsec);
+	}
+	if (current_event_num == entry_event_num) {
+		if (debug_mask & DEBUG_SUSPEND)
+			pr_info("suspend: pm_suspend returned with no event\n");
+		wake_lock_timeout(&unknown_wakeup, HZ / 2);
+	}
+}
+static DECLARE_WORK(suspend_work, suspend);
+
+static void expire_wake_locks(unsigned long data)
+{
+	long has_lock;
+	unsigned long irqflags;
+	if (debug_mask & DEBUG_EXPIRE)
+		pr_info("expire_wake_locks: start\n");
+	if (debug_mask & DEBUG_SUSPEND)
+		print_active_locks(WAKE_LOCK_SUSPEND);
+	spin_lock_irqsave(&list_lock, irqflags);
+	has_lock = has_wake_lock_locked(WAKE_LOCK_SUSPEND);
+	if (debug_mask & DEBUG_EXPIRE)
+		pr_info("expire_wake_locks: done, has_lock %ld\n", has_lock);
+	if (has_lock == 0)
+		queue_work(suspend_work_queue, &suspend_work);
+	spin_unlock_irqrestore(&list_lock, irqflags);
+}
+static DEFINE_TIMER(expire_timer, expire_wake_locks, 0, 0);
+
+static int power_suspend_late(struct platform_device *pdev, pm_message_t state)
+{
+	int ret = has_wake_lock(WAKE_LOCK_SUSPEND) ? -EAGAIN : 0;
+#ifdef CONFIG_WAKELOCK_STAT
+	wait_for_wakeup = 1;
+#endif
+	if (debug_mask & DEBUG_SUSPEND)
+		pr_info("power_suspend_late return %d\n", ret);
+	return ret;
+}
+
+static struct platform_driver power_driver = {
+	.driver.name = "power",
+	.suspend = power_suspend_late,
+};
+static struct platform_device power_device = {
+	.name = "power",
+};
+
+void wake_lock_init(struct wake_lock *lock, int type, const char *name)
+{
+	unsigned long irqflags = 0;
+
+	if (name)
+		lock->name = name;
+	BUG_ON(!lock->name);
+
+	if (debug_mask & DEBUG_WAKE_LOCK)
+		pr_info("wake_lock_init name=%s\n", lock->name);
+#ifdef CONFIG_WAKELOCK_STAT
+	lock->stat.count = 0;
+	lock->stat.expire_count = 0;
+	lock->stat.wakeup_count = 0;
+	lock->stat.total_time = ktime_set(0, 0);
+	lock->stat.prevent_suspend_time = ktime_set(0, 0);
+	lock->stat.max_time = ktime_set(0, 0);
+	lock->stat.last_time = ktime_set(0, 0);
+#endif
+	lock->flags = (type & WAKE_LOCK_TYPE_MASK) | WAKE_LOCK_INITIALIZED;
+
+	INIT_LIST_HEAD(&lock->link);
+	spin_lock_irqsave(&list_lock, irqflags);
+	list_add(&lock->link, &inactive_locks);
+	spin_unlock_irqrestore(&list_lock, irqflags);
+}
+EXPORT_SYMBOL(wake_lock_init);
+
+void wake_lock_destroy(struct wake_lock *lock)
+{
+	unsigned long irqflags;
+	if (debug_mask & DEBUG_WAKE_LOCK)
+		pr_info("wake_lock_destroy name=%s\n", lock->name);
+	spin_lock_irqsave(&list_lock, irqflags);
+	lock->flags &= ~WAKE_LOCK_INITIALIZED;
+#ifdef CONFIG_WAKELOCK_STAT
+	if (lock->stat.count) {
+		deleted_wake_locks.stat.count += lock->stat.count;
+		deleted_wake_locks.stat.expire_count += lock->stat.expire_count;
+		deleted_wake_locks.stat.total_time =
+			ktime_add(deleted_wake_locks.stat.total_time,
+				  lock->stat.total_time);
+		deleted_wake_locks.stat.prevent_suspend_time =
+			ktime_add(deleted_wake_locks.stat.prevent_suspend_time,
+				  lock->stat.prevent_suspend_time);
+		deleted_wake_locks.stat.max_time =
+			ktime_add(deleted_wake_locks.stat.max_time,
+				  lock->stat.max_time);
+	}
+#endif
+	list_del(&lock->link);
+	spin_unlock_irqrestore(&list_lock, irqflags);
+}
+EXPORT_SYMBOL(wake_lock_destroy);
+
+static void wake_lock_internal(
+	struct wake_lock *lock, long timeout, int has_timeout)
+{
+	int type;
+	unsigned long irqflags;
+	long expire_in;
+
+	spin_lock_irqsave(&list_lock, irqflags);
+	type = lock->flags & WAKE_LOCK_TYPE_MASK;
+	BUG_ON(type >= WAKE_LOCK_TYPE_COUNT);
+	BUG_ON(!(lock->flags & WAKE_LOCK_INITIALIZED));
+#ifdef CONFIG_WAKELOCK_STAT
+	if (type == WAKE_LOCK_SUSPEND && wait_for_wakeup) {
+		if (debug_mask & DEBUG_WAKEUP)
+			pr_info("wakeup wake lock: %s\n", lock->name);
+		wait_for_wakeup = 0;
+		lock->stat.wakeup_count++;
+	}
+	if ((lock->flags & WAKE_LOCK_AUTO_EXPIRE) &&
+	    (long)(lock->expires - jiffies) <= 0) {
+		wake_unlock_stat_locked(lock, 0);
+		lock->stat.last_time = ktime_get();
+	}
+#endif
+	if (!(lock->flags & WAKE_LOCK_ACTIVE)) {
+		lock->flags |= WAKE_LOCK_ACTIVE;
+#ifdef CONFIG_WAKELOCK_STAT
+		lock->stat.last_time = ktime_get();
+#endif
+	}
+	list_del(&lock->link);
+	if (has_timeout) {
+		if (debug_mask & DEBUG_WAKE_LOCK)
+			pr_info("wake_lock: %s, type %d, timeout %ld.%03lu\n",
+				lock->name, type, timeout / HZ,
+				(timeout % HZ) * MSEC_PER_SEC / HZ);
+		lock->expires = jiffies + timeout;
+		lock->flags |= WAKE_LOCK_AUTO_EXPIRE;
+		list_add_tail(&lock->link, &active_wake_locks[type]);
+	} else {
+		if (debug_mask & DEBUG_WAKE_LOCK)
+			pr_info("wake_lock: %s, type %d\n", lock->name, type);
+		lock->expires = LONG_MAX;
+		lock->flags &= ~WAKE_LOCK_AUTO_EXPIRE;
+		list_add(&lock->link, &active_wake_locks[type]);
+	}
+	if (type == WAKE_LOCK_SUSPEND) {
+		current_event_num++;
+#ifdef CONFIG_WAKELOCK_STAT
+		if (lock == &main_wake_lock)
+			update_sleep_wait_stats_locked(1);
+		else if (!wake_lock_active(&main_wake_lock))
+			update_sleep_wait_stats_locked(0);
+#endif
+		if (has_timeout)
+			expire_in = has_wake_lock_locked(type);
+		else
+			expire_in = -1;
+		if (expire_in > 0) {
+			if (debug_mask & DEBUG_EXPIRE)
+				pr_info("wake_lock: %s, start expire timer, "
+					"%ld\n", lock->name, expire_in);
+			mod_timer(&expire_timer, jiffies + expire_in);
+		} else {
+			if (del_timer(&expire_timer))
+				if (debug_mask & DEBUG_EXPIRE)
+					pr_info("wake_lock: %s, stop expire timer\n",
+						lock->name);
+			if (expire_in == 0)
+				queue_work(suspend_work_queue, &suspend_work);
+		}
+	}
+	spin_unlock_irqrestore(&list_lock, irqflags);
+}
+
+void wake_lock(struct wake_lock *lock)
+{
+	wake_lock_internal(lock, 0, 0);
+}
+EXPORT_SYMBOL(wake_lock);
+
+void wake_lock_timeout(struct wake_lock *lock, long timeout)
+{
+	wake_lock_internal(lock, timeout, 1);
+}
+EXPORT_SYMBOL(wake_lock_timeout);
+
+void wake_unlock(struct wake_lock *lock)
+{
+	int type;
+	unsigned long irqflags;
+	spin_lock_irqsave(&list_lock, irqflags);
+	type = lock->flags & WAKE_LOCK_TYPE_MASK;
+#ifdef CONFIG_WAKELOCK_STAT
+	wake_unlock_stat_locked(lock, 0);
+#endif
+	if (debug_mask & DEBUG_WAKE_LOCK)
+		pr_info("wake_unlock: %s\n", lock->name);
+	lock->flags &= ~(WAKE_LOCK_ACTIVE | WAKE_LOCK_AUTO_EXPIRE);
+	list_del(&lock->link);
+	list_add(&lock->link, &inactive_locks);
+	if (type == WAKE_LOCK_SUSPEND) {
+		long has_lock = has_wake_lock_locked(type);
+		if (has_lock > 0) {
+			if (debug_mask & DEBUG_EXPIRE)
+				pr_info("wake_unlock: %s, start expire timer, "
+					"%ld\n", lock->name, has_lock);
+			mod_timer(&expire_timer, jiffies + has_lock);
+		} else {
+			if (del_timer(&expire_timer))
+				if (debug_mask & DEBUG_EXPIRE)
+					pr_info("wake_unlock: %s, stop expire "
+						"timer\n", lock->name);
+			if (has_lock == 0)
+				queue_work(suspend_work_queue, &suspend_work);
+		}
+		if (lock == &main_wake_lock) {
+			if (debug_mask & DEBUG_SUSPEND)
+				print_active_locks(WAKE_LOCK_SUSPEND);
+#ifdef CONFIG_WAKELOCK_STAT
+			update_sleep_wait_stats_locked(0);
+#endif
+		}
+	}
+	spin_unlock_irqrestore(&list_lock, irqflags);
+}
+EXPORT_SYMBOL(wake_unlock);
+
+int wake_lock_active(struct wake_lock *lock)
+{
+	return !!(lock->flags & WAKE_LOCK_ACTIVE);
+}
+EXPORT_SYMBOL(wake_lock_active);
+
+static int __init wakelocks_init(void)
+{
+	int ret;
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(active_wake_locks); i++)
+		INIT_LIST_HEAD(&active_wake_locks[i]);
+
+#ifdef CONFIG_WAKELOCK_STAT
+	wake_lock_init(&deleted_wake_locks, WAKE_LOCK_SUSPEND,
+			"deleted_wake_locks");
+#endif
+	wake_lock_init(&main_wake_lock, WAKE_LOCK_SUSPEND, "main");
+	wake_lock(&main_wake_lock);
+	wake_lock_init(&unknown_wakeup, WAKE_LOCK_SUSPEND, "unknown_wakeups");
+
+	ret = platform_device_register(&power_device);
+	if (ret) {
+		pr_err("wakelocks_init: platform_device_register failed\n");
+		goto err_platform_device_register;
+	}
+	ret = platform_driver_register(&power_driver);
+	if (ret) {
+		pr_err("wakelocks_init: platform_driver_register failed\n");
+		goto err_platform_driver_register;
+	}
+
+	suspend_work_queue = create_singlethread_workqueue("suspend");
+	if (suspend_work_queue == NULL) {
+		ret = -ENOMEM;
+		goto err_suspend_work_queue;
+	}
+
+#ifdef CONFIG_WAKELOCK_STAT
+	create_proc_read_entry("wakelocks", S_IRUGO, NULL,
+				wakelocks_read_proc, NULL);
+#endif
+
+	return 0;
+
+err_suspend_work_queue:
+	platform_driver_unregister(&power_driver);
+err_platform_driver_register:
+	platform_device_unregister(&power_device);
+err_platform_device_register:
+	wake_lock_destroy(&unknown_wakeup);
+	wake_lock_destroy(&main_wake_lock);
+#ifdef CONFIG_WAKELOCK_STAT
+	wake_lock_destroy(&deleted_wake_locks);
+#endif
+	return ret;
+}
+
+static void  __exit wakelocks_exit(void)
+{
+#ifdef CONFIG_WAKELOCK_STAT
+	remove_proc_entry("wakelocks", NULL);
+#endif
+	destroy_workqueue(suspend_work_queue);
+	platform_driver_unregister(&power_driver);
+	platform_device_unregister(&power_device);
+	wake_lock_destroy(&unknown_wakeup);
+	wake_lock_destroy(&main_wake_lock);
+#ifdef CONFIG_WAKELOCK_STAT
+	wake_lock_destroy(&deleted_wake_locks);
+#endif
+}
+
+core_initcall(wakelocks_init);
+module_exit(wakelocks_exit);
--- linux-mvl-dove-2.6.32.orig/kernel/power/power.h
+++ linux-mvl-dove-2.6.32/kernel/power/power.h
@@ -236,3 +236,27 @@
 {
 }
 #endif
+
+#ifdef CONFIG_WAKELOCK
+/* kernel/power/wakelock.c */
+extern struct workqueue_struct *suspend_work_queue;
+extern struct wake_lock main_wake_lock;
+extern suspend_state_t requested_suspend_state;
+#endif
+
+#ifdef CONFIG_USER_WAKELOCK
+ssize_t wake_lock_show(struct kobject *kobj, struct kobj_attribute *attr,
+			char *buf);
+ssize_t wake_lock_store(struct kobject *kobj, struct kobj_attribute *attr,
+			const char *buf, size_t n);
+ssize_t wake_unlock_show(struct kobject *kobj, struct kobj_attribute *attr,
+			char *buf);
+ssize_t  wake_unlock_store(struct kobject *kobj, struct kobj_attribute *attr,
+			const char *buf, size_t n);
+#endif
+
+#ifdef CONFIG_EARLYSUSPEND
+/* kernel/power/earlysuspend.c */
+void request_suspend_state(suspend_state_t state);
+suspend_state_t get_suspend_state(void);
+#endif
--- linux-mvl-dove-2.6.32.orig/kernel/power/fbearlysuspend.c
+++ linux-mvl-dove-2.6.32/kernel/power/fbearlysuspend.c
@@ -0,0 +1,153 @@
+/* kernel/power/fbearlysuspend.c
+ *
+ * Copyright (C) 2005-2008 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/earlysuspend.h>
+#include <linux/module.h>
+#include <linux/wait.h>
+
+#include "power.h"
+
+static wait_queue_head_t fb_state_wq;
+static DEFINE_SPINLOCK(fb_state_lock);
+static enum {
+	FB_STATE_STOPPED_DRAWING,
+	FB_STATE_REQUEST_STOP_DRAWING,
+	FB_STATE_DRAWING_OK,
+} fb_state;
+
+/* tell userspace to stop drawing, wait for it to stop */
+static void stop_drawing_early_suspend(struct early_suspend *h)
+{
+	int ret;
+	unsigned long irq_flags;
+
+	spin_lock_irqsave(&fb_state_lock, irq_flags);
+	fb_state = FB_STATE_REQUEST_STOP_DRAWING;
+	spin_unlock_irqrestore(&fb_state_lock, irq_flags);
+
+	wake_up_all(&fb_state_wq);
+	ret = wait_event_timeout(fb_state_wq,
+				 fb_state == FB_STATE_STOPPED_DRAWING,
+				 HZ);
+	if (unlikely(fb_state != FB_STATE_STOPPED_DRAWING))
+		pr_warning("stop_drawing_early_suspend: timeout waiting for "
+			   "userspace to stop drawing\n");
+}
+
+/* tell userspace to start drawing */
+static void start_drawing_late_resume(struct early_suspend *h)
+{
+	unsigned long irq_flags;
+
+	spin_lock_irqsave(&fb_state_lock, irq_flags);
+	fb_state = FB_STATE_DRAWING_OK;
+	spin_unlock_irqrestore(&fb_state_lock, irq_flags);
+	wake_up(&fb_state_wq);
+}
+
+static struct early_suspend stop_drawing_early_suspend_desc = {
+	.level = EARLY_SUSPEND_LEVEL_STOP_DRAWING,
+	.suspend = stop_drawing_early_suspend,
+	.resume = start_drawing_late_resume,
+};
+
+static ssize_t wait_for_fb_sleep_show(struct kobject *kobj,
+				      struct kobj_attribute *attr, char *buf)
+{
+	char *s = buf;
+	int ret;
+
+	ret = wait_event_interruptible(fb_state_wq,
+				       fb_state != FB_STATE_DRAWING_OK);
+	if (ret && fb_state == FB_STATE_DRAWING_OK)
+		return ret;
+	else
+		s += sprintf(buf, "sleeping");
+	return s - buf;
+}
+
+static ssize_t wait_for_fb_wake_show(struct kobject *kobj,
+				     struct kobj_attribute *attr, char *buf)
+{
+	char *s = buf;
+	int ret;
+	unsigned long irq_flags;
+
+	spin_lock_irqsave(&fb_state_lock, irq_flags);
+	if (fb_state == FB_STATE_REQUEST_STOP_DRAWING) {
+		fb_state = FB_STATE_STOPPED_DRAWING;
+		wake_up(&fb_state_wq);
+	}
+	spin_unlock_irqrestore(&fb_state_lock, irq_flags);
+
+	ret = wait_event_interruptible(fb_state_wq,
+				       fb_state == FB_STATE_DRAWING_OK);
+	if (ret && fb_state != FB_STATE_DRAWING_OK)
+		return ret;
+	else
+		s += sprintf(buf, "awake");
+
+	return s - buf;
+}
+
+#define power_ro_attr(_name) \
+static struct kobj_attribute _name##_attr = {	\
+	.attr	= {				\
+		.name = __stringify(_name),	\
+		.mode = 0444,			\
+	},					\
+	.show	= _name##_show,			\
+	.store	= NULL,		\
+}
+
+power_ro_attr(wait_for_fb_sleep);
+power_ro_attr(wait_for_fb_wake);
+
+static struct attribute *g[] = {
+	&wait_for_fb_sleep_attr.attr,
+	&wait_for_fb_wake_attr.attr,
+	NULL,
+};
+
+static struct attribute_group attr_group = {
+	.attrs = g,
+};
+
+static int __init android_power_init(void)
+{
+	int ret;
+
+	init_waitqueue_head(&fb_state_wq);
+	fb_state = FB_STATE_DRAWING_OK;
+
+	ret = sysfs_create_group(power_kobj, &attr_group);
+	if (ret) {
+		pr_err("android_power_init: sysfs_create_group failed\n");
+		return ret;
+	}
+
+	register_early_suspend(&stop_drawing_early_suspend_desc);
+	return 0;
+}
+
+static void  __exit android_power_exit(void)
+{
+	unregister_early_suspend(&stop_drawing_early_suspend_desc);
+	sysfs_remove_group(power_kobj, &attr_group);
+}
+
+module_init(android_power_init);
+module_exit(android_power_exit);
+
--- linux-mvl-dove-2.6.32.orig/kernel/power/Kconfig
+++ linux-mvl-dove-2.6.32/kernel/power/Kconfig
@@ -119,6 +119,88 @@
 config HIBERNATION_NVS
 	bool
 
+config PM_DISABLE_CONSOLE
+	bool "Disable Power Management messing with the active console"
+	depends on PM
+	default n
+	---help---
+	  By default, PM will take over the active console (generally, this means
+	  switching to the console when suspending from X). This can at times cause
+	  problems, especially if userspace suspend scripts try to do things with
+	  the console before or after suspending (e.g. calling vbestate).
+
+	  To work around this, enable this option so that PM will not handle the
+	  console.
+
+	  If unsure, say N.
+
+config HAS_WAKELOCK
+	bool
+
+config HAS_EARLYSUSPEND
+	bool
+
+config WAKELOCK
+	bool "Wake lock"
+	depends on PM && RTC_CLASS
+	default n
+	select HAS_WAKELOCK
+	---help---
+	  Enable wakelocks. When user space request a sleep state the
+	  sleep request will be delayed until no wake locks are held.
+
+config WAKELOCK_STAT
+	bool "Wake lock stats"
+	depends on WAKELOCK
+	default y
+	---help---
+	  Report wake lock stats in /proc/wakelocks
+
+config USER_WAKELOCK
+	bool "Userspace wake locks"
+	depends on WAKELOCK
+	default y
+	---help---
+	  User-space wake lock api. Write "lockname" or "lockname timeout"
+	  to /sys/power/wake_lock lock and if needed create a wake lock.
+	  Write "lockname" to /sys/power/wake_unlock to unlock a user wake
+	  lock.
+
+config EARLYSUSPEND
+	bool "Early suspend"
+	depends on WAKELOCK
+	default y
+	select HAS_EARLYSUSPEND
+	---help---
+	  Call early suspend handlers when the user requested sleep state
+	  changes.
+
+choice
+	prompt "User-space screen access"
+	default FB_EARLYSUSPEND if !FRAMEBUFFER_CONSOLE
+	default CONSOLE_EARLYSUSPEND
+	depends on HAS_EARLYSUSPEND
+
+	config NO_USER_SPACE_SCREEN_ACCESS_CONTROL
+		bool "None"
+
+	config CONSOLE_EARLYSUSPEND
+		bool "Console switch on early-suspend"
+		depends on HAS_EARLYSUSPEND && VT
+		---help---
+		  Register early suspend handler to perform a console switch to
+		  when user-space should stop drawing to the screen and a switch
+		  back when it should resume.
+
+	config FB_EARLYSUSPEND
+		bool "Sysfs interface"
+		depends on HAS_EARLYSUSPEND
+		---help---
+		  Register early suspend handler that notifies and waits for
+		  user-space through sysfs when user-space should stop drawing
+		  to the screen and notifies user-space when it should resume.
+endchoice
+
 config HIBERNATION
 	bool "Hibernation (aka 'suspend to disk')"
 	depends on PM && SWAP && ARCH_HIBERNATION_POSSIBLE
@@ -222,3 +304,8 @@
 	  and the bus type drivers of the buses the devices are on are
 	  responsible for the actual handling of the autosuspend requests and
 	  wake-up events.
+
+config APM_EMU_DS2782
+	bool "MAXIM DS2782 Fuel Gauge IC Support"
+	depends on APM_EMULATION
+	default n
--- linux-mvl-dove-2.6.32.orig/kernel/power/consoleearlysuspend.c
+++ linux-mvl-dove-2.6.32/kernel/power/consoleearlysuspend.c
@@ -0,0 +1,78 @@
+/* kernel/power/consoleearlysuspend.c
+ *
+ * Copyright (C) 2005-2008 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/console.h>
+#include <linux/earlysuspend.h>
+#include <linux/kbd_kern.h>
+#include <linux/module.h>
+#include <linux/vt_kern.h>
+#include <linux/wait.h>
+
+#define EARLY_SUSPEND_CONSOLE	(MAX_NR_CONSOLES-1)
+
+static int orig_fgconsole;
+static void console_early_suspend(struct early_suspend *h)
+{
+	acquire_console_sem();
+	orig_fgconsole = fg_console;
+	if (vc_allocate(EARLY_SUSPEND_CONSOLE))
+		goto err;
+	if (set_console(EARLY_SUSPEND_CONSOLE))
+		goto err;
+	release_console_sem();
+
+	if (vt_waitactive(EARLY_SUSPEND_CONSOLE))
+		pr_warning("console_early_suspend: Can't switch VCs.\n");
+	return;
+err:
+	pr_warning("console_early_suspend: Can't set console\n");
+	release_console_sem();
+}
+
+static void console_late_resume(struct early_suspend *h)
+{
+	int ret;
+	acquire_console_sem();
+	ret = set_console(orig_fgconsole);
+	release_console_sem();
+	if (ret) {
+		pr_warning("console_late_resume: Can't set console.\n");
+		return;
+	}
+
+	if (vt_waitactive(orig_fgconsole))
+		pr_warning("console_late_resume: Can't switch VCs.\n");
+}
+
+static struct early_suspend console_early_suspend_desc = {
+	.level = EARLY_SUSPEND_LEVEL_STOP_DRAWING,
+	.suspend = console_early_suspend,
+	.resume = console_late_resume,
+};
+
+static int __init console_early_suspend_init(void)
+{
+	register_early_suspend(&console_early_suspend_desc);
+	return 0;
+}
+
+static void  __exit console_early_suspend_exit(void)
+{
+	unregister_early_suspend(&console_early_suspend_desc);
+}
+
+module_init(console_early_suspend_init);
+module_exit(console_early_suspend_exit);
+
--- linux-mvl-dove-2.6.32.orig/kernel/power/main.c
+++ linux-mvl-dove-2.6.32/kernel/power/main.c
@@ -203,6 +203,11 @@
 power_attr(pm_trace);
 #endif /* CONFIG_PM_TRACE */
 
+#ifdef CONFIG_USER_WAKELOCK
+power_attr(wake_lock);
+power_attr(wake_unlock);
+#endif
+
 static struct attribute * g[] = {
 	&state_attr.attr,
 #ifdef CONFIG_PM_TRACE
@@ -211,6 +216,10 @@
 #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_PM_DEBUG)
 	&pm_test_attr.attr,
 #endif
+#ifdef CONFIG_USER_WAKELOCK
+	&wake_lock_attr.attr,
+	&wake_unlock_attr.attr,
+#endif
 	NULL,
 };
 
--- linux-mvl-dove-2.6.32.orig/kernel/power/snapshot.c
+++ linux-mvl-dove-2.6.32/kernel/power/snapshot.c
@@ -1120,9 +1120,19 @@
 	return nr_alloc;
 }
 
-static unsigned long preallocate_image_memory(unsigned long nr_pages)
+static unsigned long preallocate_image_memory(unsigned long nr_pages,
+					      unsigned long avail_normal)
 {
-	return preallocate_image_pages(nr_pages, GFP_IMAGE);
+	unsigned long alloc;
+
+	if (avail_normal <= alloc_normal)
+		return 0;
+
+	alloc = avail_normal - alloc_normal;
+	if (nr_pages < alloc)
+		alloc = nr_pages;
+
+	return preallocate_image_pages(alloc, GFP_IMAGE);
 }
 
 #ifdef CONFIG_HIGHMEM
@@ -1168,20 +1178,31 @@
  */
 static void free_unnecessary_pages(void)
 {
-	unsigned long save_highmem, to_free_normal, to_free_highmem;
+	unsigned long save, to_free_normal, to_free_highmem;
 
-	to_free_normal = alloc_normal - count_data_pages();
-	save_highmem = count_highmem_pages();
-	if (alloc_highmem > save_highmem) {
-		to_free_highmem = alloc_highmem - save_highmem;
+	save = count_data_pages();
+	if (alloc_normal >= save) {
+		to_free_normal = alloc_normal - save;
+		save = 0;
+	} else {
+		to_free_normal = 0;
+		save -= alloc_normal;
+	}
+	save += count_highmem_pages();
+	if (alloc_highmem >= save) {
+		to_free_highmem = alloc_highmem - save;
 	} else {
 		to_free_highmem = 0;
-		to_free_normal -= save_highmem - alloc_highmem;
+		save -= alloc_highmem;
+		if (to_free_normal > save)
+			to_free_normal -= save;
+		else
+			to_free_normal = 0;
 	}
 
 	memory_bm_position_reset(&copy_bm);
 
-	while (to_free_normal > 0 && to_free_highmem > 0) {
+	while (to_free_normal > 0 || to_free_highmem > 0) {
 		unsigned long pfn = memory_bm_next_pfn(&copy_bm);
 		struct page *page = pfn_to_page(pfn);
 
@@ -1257,7 +1278,7 @@
 {
 	struct zone *zone;
 	unsigned long saveable, size, max_size, count, highmem, pages = 0;
-	unsigned long alloc, save_highmem, pages_highmem;
+	unsigned long alloc, save_highmem, pages_highmem, avail_normal;
 	struct timeval start, stop;
 	int error;
 
@@ -1294,6 +1315,7 @@
 		else
 			count += zone_page_state(zone, NR_FREE_PAGES);
 	}
+	avail_normal = count;
 	count += highmem;
 	count -= totalreserve_pages;
 
@@ -1308,12 +1330,21 @@
 	 */
 	if (size >= saveable) {
 		pages = preallocate_image_highmem(save_highmem);
-		pages += preallocate_image_memory(saveable - pages);
+		pages += preallocate_image_memory(saveable - pages, avail_normal);
 		goto out;
 	}
 
 	/* Estimate the minimum size of the image. */
 	pages = minimum_image_size(saveable);
+	/*
+	 * To avoid excessive pressure on the normal zone, leave room in it to
+	 * accommodate an image of the minimum size (unless it's already too
+	 * small, in which case don't preallocate pages from it at all).
+	 */
+	if (avail_normal > pages)
+		avail_normal -= pages;
+	else
+		avail_normal = 0;
 	if (size < pages)
 		size = min_t(unsigned long, pages, max_size);
 
@@ -1334,16 +1365,34 @@
 	 */
 	pages_highmem = preallocate_image_highmem(highmem / 2);
 	alloc = (count - max_size) - pages_highmem;
-	pages = preallocate_image_memory(alloc);
-	if (pages < alloc)
-		goto err_out;
-	size = max_size - size;
-	alloc = size;
-	size = preallocate_highmem_fraction(size, highmem, count);
-	pages_highmem += size;
-	alloc -= size;
-	pages += preallocate_image_memory(alloc);
-	pages += pages_highmem;
+	pages = preallocate_image_memory(alloc, avail_normal);
+	if (pages < alloc) {
+		/* We have exhausted non-highmem pages, try highmem. */
+		alloc -= pages;
+		pages += pages_highmem;
+		pages_highmem = preallocate_image_highmem(alloc);
+		if (pages_highmem < alloc)
+			goto err_out;
+		pages += pages_highmem;
+		/*
+		 * size is the desired number of saveable pages to leave in
+		 * memory, so try to preallocate (all memory - size) pages.
+		 */
+		alloc = (count - pages) - size;
+		pages += preallocate_image_highmem(alloc);
+	} else {
+		/*
+		 * There are approximately max_size saveable pages at this point
+		 * and we want to reduce this number down to size.
+		 */
+		alloc = max_size - size;
+		size = preallocate_highmem_fraction(alloc, highmem, count);
+		pages_highmem += size;
+		alloc -= size;
+		size = preallocate_image_memory(alloc, avail_normal);
+		pages_highmem += preallocate_image_highmem(alloc - size);
+		pages += pages_highmem + size;
+	}
 
 	/*
 	 * We only need as many page frames for the image as there are saveable
@@ -1466,11 +1515,8 @@
 swsusp_alloc(struct memory_bitmap *orig_bm, struct memory_bitmap *copy_bm,
 		unsigned int nr_pages, unsigned int nr_highmem)
 {
-	int error = 0;
-
 	if (nr_highmem > 0) {
-		error = get_highmem_buffer(PG_ANY);
-		if (error)
+		if (get_highmem_buffer(PG_ANY))
 			goto err_out;
 		if (nr_highmem > alloc_highmem) {
 			nr_highmem -= alloc_highmem;
@@ -1493,7 +1539,7 @@
 
  err_out:
 	swsusp_free();
-	return error;
+	return -ENOMEM;
 }
 
 asmlinkage int swsusp_save(void)
--- linux-mvl-dove-2.6.32.orig/kernel/power/Makefile
+++ linux-mvl-dove-2.6.32/kernel/power/Makefile
@@ -10,5 +10,10 @@
 obj-$(CONFIG_PM_TEST_SUSPEND)	+= suspend_test.o
 obj-$(CONFIG_HIBERNATION)	+= swsusp.o hibernate.o snapshot.o swap.o user.o
 obj-$(CONFIG_HIBERNATION_NVS)	+= hibernate_nvs.o
+obj-$(CONFIG_WAKELOCK)		+= wakelock.o
+obj-$(CONFIG_USER_WAKELOCK)	+= userwakelock.o
+obj-$(CONFIG_EARLYSUSPEND)	+= earlysuspend.o
+obj-$(CONFIG_CONSOLE_EARLYSUSPEND)	+= consoleearlysuspend.o
+obj-$(CONFIG_FB_EARLYSUSPEND)	+= fbearlysuspend.o
 
 obj-$(CONFIG_MAGIC_SYSRQ)	+= poweroff.o
--- linux-mvl-dove-2.6.32.orig/kernel/power/userwakelock.c
+++ linux-mvl-dove-2.6.32/kernel/power/userwakelock.c
@@ -0,0 +1,218 @@
+/* kernel/power/userwakelock.c
+ *
+ * Copyright (C) 2005-2008 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/ctype.h>
+#include <linux/module.h>
+#include <linux/wakelock.h>
+
+#include "power.h"
+
+enum {
+	DEBUG_FAILURE	= BIT(0),
+	DEBUG_ERROR	= BIT(1),
+	DEBUG_NEW	= BIT(2),
+	DEBUG_ACCESS	= BIT(3),
+	DEBUG_LOOKUP	= BIT(4),
+};
+static int debug_mask = DEBUG_FAILURE;
+module_param_named(debug_mask, debug_mask, int, S_IRUGO | S_IWUSR | S_IWGRP);
+
+static DEFINE_MUTEX(tree_lock);
+
+struct user_wake_lock {
+	struct rb_node		node;
+	struct wake_lock	wake_lock;
+	char			name[0];
+};
+struct rb_root user_wake_locks;
+
+static struct user_wake_lock *lookup_wake_lock_name(
+	const char *buf, int allocate, long *timeoutptr)
+{
+	struct rb_node **p = &user_wake_locks.rb_node;
+	struct rb_node *parent = NULL;
+	struct user_wake_lock *l;
+	int diff;
+	u64 timeout;
+	int name_len;
+	const char *arg;
+
+	/* Find length of lock name and start of optional timeout string */
+	arg = buf;
+	while (*arg && !isspace(*arg))
+		arg++;
+	name_len = arg - buf;
+	if (!name_len)
+		goto bad_arg;
+	while (isspace(*arg))
+		arg++;
+
+	/* Process timeout string */
+	if (timeoutptr && *arg) {
+		timeout = simple_strtoull(arg, (char **)&arg, 0);
+		while (isspace(*arg))
+			arg++;
+		if (*arg)
+			goto bad_arg;
+		/* convert timeout from nanoseconds to jiffies > 0 */
+		timeout += (NSEC_PER_SEC / HZ) - 1;
+		do_div(timeout, (NSEC_PER_SEC / HZ));
+		if (timeout <= 0)
+			timeout = 1;
+		*timeoutptr = timeout;
+	} else if (*arg)
+		goto bad_arg;
+	else if (timeoutptr)
+		*timeoutptr = 0;
+
+	/* Lookup wake lock in rbtree */
+	while (*p) {
+		parent = *p;
+		l = rb_entry(parent, struct user_wake_lock, node);
+		diff = strncmp(buf, l->name, name_len);
+		if (!diff && l->name[name_len])
+			diff = -1;
+		if (debug_mask & DEBUG_ERROR)
+			pr_info("lookup_wake_lock_name: compare %.*s %s %d\n",
+				name_len, buf, l->name, diff);
+
+		if (diff < 0)
+			p = &(*p)->rb_left;
+		else if (diff > 0)
+			p = &(*p)->rb_right;
+		else
+			return l;
+	}
+
+	/* Allocate and add new wakelock to rbtree */
+	if (!allocate) {
+		if (debug_mask & DEBUG_ERROR)
+			pr_info("lookup_wake_lock_name: %.*s not found\n",
+				name_len, buf);
+		return ERR_PTR(-EINVAL);
+	}
+	l = kzalloc(sizeof(*l) + name_len + 1, GFP_KERNEL);
+	if (l == NULL) {
+		if (debug_mask & DEBUG_FAILURE)
+			pr_err("lookup_wake_lock_name: failed to allocate "
+				"memory for %.*s\n", name_len, buf);
+		return ERR_PTR(-ENOMEM);
+	}
+	memcpy(l->name, buf, name_len);
+	if (debug_mask & DEBUG_NEW)
+		pr_info("lookup_wake_lock_name: new wake lock %s\n", l->name);
+	wake_lock_init(&l->wake_lock, WAKE_LOCK_SUSPEND, l->name);
+	rb_link_node(&l->node, parent, p);
+	rb_insert_color(&l->node, &user_wake_locks);
+	return l;
+
+bad_arg:
+	if (debug_mask & DEBUG_ERROR)
+		pr_info("lookup_wake_lock_name: wake lock, %.*s, bad arg, %s\n",
+			name_len, buf, arg);
+	return ERR_PTR(-EINVAL);
+}
+
+ssize_t wake_lock_show(
+	struct kobject *kobj, struct kobj_attribute *attr, char *buf)
+{
+	char *s = buf;
+	char *end = buf + PAGE_SIZE;
+	struct rb_node *n;
+	struct user_wake_lock *l;
+
+	mutex_lock(&tree_lock);
+
+	for (n = rb_first(&user_wake_locks); n != NULL; n = rb_next(n)) {
+		l = rb_entry(n, struct user_wake_lock, node);
+		if (wake_lock_active(&l->wake_lock))
+			s += scnprintf(s, end - s, "%s ", l->name);
+	}
+	s += scnprintf(s, end - s, "\n");
+
+	mutex_unlock(&tree_lock);
+	return (s - buf);
+}
+
+ssize_t wake_lock_store(
+	struct kobject *kobj, struct kobj_attribute *attr,
+	const char *buf, size_t n)
+{
+	long timeout;
+	struct user_wake_lock *l;
+
+	mutex_lock(&tree_lock);
+	l = lookup_wake_lock_name(buf, 1, &timeout);
+	if (IS_ERR(l)) {
+		n = PTR_ERR(l);
+		goto bad_name;
+	}
+
+	if (debug_mask & DEBUG_ACCESS)
+		pr_info("wake_lock_store: %s, timeout %ld\n", l->name, timeout);
+
+	if (timeout)
+		wake_lock_timeout(&l->wake_lock, timeout);
+	else
+		wake_lock(&l->wake_lock);
+bad_name:
+	mutex_unlock(&tree_lock);
+	return n;
+}
+
+
+ssize_t wake_unlock_show(
+	struct kobject *kobj, struct kobj_attribute *attr, char *buf)
+{
+	char *s = buf;
+	char *end = buf + PAGE_SIZE;
+	struct rb_node *n;
+	struct user_wake_lock *l;
+
+	mutex_lock(&tree_lock);
+
+	for (n = rb_first(&user_wake_locks); n != NULL; n = rb_next(n)) {
+		l = rb_entry(n, struct user_wake_lock, node);
+		if (!wake_lock_active(&l->wake_lock))
+			s += scnprintf(s, end - s, "%s ", l->name);
+	}
+	s += scnprintf(s, end - s, "\n");
+
+	mutex_unlock(&tree_lock);
+	return (s - buf);
+}
+
+ssize_t wake_unlock_store(
+	struct kobject *kobj, struct kobj_attribute *attr,
+	const char *buf, size_t n)
+{
+	struct user_wake_lock *l;
+
+	mutex_lock(&tree_lock);
+	l = lookup_wake_lock_name(buf, 0, NULL);
+	if (IS_ERR(l)) {
+		n = PTR_ERR(l);
+		goto not_found;
+	}
+
+	if (debug_mask & DEBUG_ACCESS)
+		pr_info("wake_unlock_store: %s\n", l->name);
+
+	wake_unlock(&l->wake_lock);
+not_found:
+	mutex_unlock(&tree_lock);
+	return n;
+}
+
--- linux-mvl-dove-2.6.32.orig/kernel/power/earlysuspend.c
+++ linux-mvl-dove-2.6.32/kernel/power/earlysuspend.c
@@ -0,0 +1,178 @@
+/* kernel/power/earlysuspend.c
+ *
+ * Copyright (C) 2005-2008 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/earlysuspend.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/rtc.h>
+#include <linux/syscalls.h> /* sys_sync */
+#include <linux/wakelock.h>
+#include <linux/workqueue.h>
+
+#include "power.h"
+
+enum {
+	DEBUG_USER_STATE = 1U << 0,
+	DEBUG_SUSPEND = 1U << 2,
+};
+static int debug_mask = DEBUG_USER_STATE;
+module_param_named(debug_mask, debug_mask, int, S_IRUGO | S_IWUSR | S_IWGRP);
+
+static DEFINE_MUTEX(early_suspend_lock);
+static LIST_HEAD(early_suspend_handlers);
+static void early_suspend(struct work_struct *work);
+static void late_resume(struct work_struct *work);
+static DECLARE_WORK(early_suspend_work, early_suspend);
+static DECLARE_WORK(late_resume_work, late_resume);
+static DEFINE_SPINLOCK(state_lock);
+enum {
+	SUSPEND_REQUESTED = 0x1,
+	SUSPENDED = 0x2,
+	SUSPEND_REQUESTED_AND_SUSPENDED = SUSPEND_REQUESTED | SUSPENDED,
+};
+static int state;
+
+void register_early_suspend(struct early_suspend *handler)
+{
+	struct list_head *pos;
+
+	mutex_lock(&early_suspend_lock);
+	list_for_each(pos, &early_suspend_handlers) {
+		struct early_suspend *e;
+		e = list_entry(pos, struct early_suspend, link);
+		if (e->level > handler->level)
+			break;
+	}
+	list_add_tail(&handler->link, pos);
+	if ((state & SUSPENDED) && handler->suspend)
+		handler->suspend(handler);
+	mutex_unlock(&early_suspend_lock);
+}
+EXPORT_SYMBOL(register_early_suspend);
+
+void unregister_early_suspend(struct early_suspend *handler)
+{
+	mutex_lock(&early_suspend_lock);
+	list_del(&handler->link);
+	mutex_unlock(&early_suspend_lock);
+}
+EXPORT_SYMBOL(unregister_early_suspend);
+
+static void early_suspend(struct work_struct *work)
+{
+	struct early_suspend *pos;
+	unsigned long irqflags;
+	int abort = 0;
+
+	mutex_lock(&early_suspend_lock);
+	spin_lock_irqsave(&state_lock, irqflags);
+	if (state == SUSPEND_REQUESTED)
+		state |= SUSPENDED;
+	else
+		abort = 1;
+	spin_unlock_irqrestore(&state_lock, irqflags);
+
+	if (abort) {
+		if (debug_mask & DEBUG_SUSPEND)
+			pr_info("early_suspend: abort, state %d\n", state);
+		mutex_unlock(&early_suspend_lock);
+		goto abort;
+	}
+
+	if (debug_mask & DEBUG_SUSPEND)
+		pr_info("early_suspend: call handlers\n");
+	list_for_each_entry(pos, &early_suspend_handlers, link) {
+		if (pos->suspend != NULL)
+			pos->suspend(pos);
+	}
+	mutex_unlock(&early_suspend_lock);
+
+	if (debug_mask & DEBUG_SUSPEND)
+		pr_info("early_suspend: sync\n");
+
+	sys_sync();
+abort:
+	spin_lock_irqsave(&state_lock, irqflags);
+	if (state == SUSPEND_REQUESTED_AND_SUSPENDED)
+		wake_unlock(&main_wake_lock);
+	spin_unlock_irqrestore(&state_lock, irqflags);
+}
+
+static void late_resume(struct work_struct *work)
+{
+	struct early_suspend *pos;
+	unsigned long irqflags;
+	int abort = 0;
+
+	mutex_lock(&early_suspend_lock);
+	spin_lock_irqsave(&state_lock, irqflags);
+	if (state == SUSPENDED)
+		state &= ~SUSPENDED;
+	else
+		abort = 1;
+	spin_unlock_irqrestore(&state_lock, irqflags);
+
+	if (abort) {
+		if (debug_mask & DEBUG_SUSPEND)
+			pr_info("late_resume: abort, state %d\n", state);
+		goto abort;
+	}
+	if (debug_mask & DEBUG_SUSPEND)
+		pr_info("late_resume: call handlers\n");
+	list_for_each_entry_reverse(pos, &early_suspend_handlers, link)
+		if (pos->resume != NULL)
+			pos->resume(pos);
+	if (debug_mask & DEBUG_SUSPEND)
+		pr_info("late_resume: done\n");
+abort:
+	mutex_unlock(&early_suspend_lock);
+}
+
+void request_suspend_state(suspend_state_t new_state)
+{
+	unsigned long irqflags;
+	int old_sleep;
+
+	spin_lock_irqsave(&state_lock, irqflags);
+	old_sleep = state & SUSPEND_REQUESTED;
+	if (debug_mask & DEBUG_USER_STATE) {
+		struct timespec ts;
+		struct rtc_time tm;
+		getnstimeofday(&ts);
+		rtc_time_to_tm(ts.tv_sec, &tm);
+		pr_info("request_suspend_state: %s (%d->%d) at %lld "
+			"(%d-%02d-%02d %02d:%02d:%02d.%09lu UTC)\n",
+			new_state != PM_SUSPEND_ON ? "sleep" : "wakeup",
+			requested_suspend_state, new_state,
+			ktime_to_ns(ktime_get()),
+			tm.tm_year + 1900, tm.tm_mon + 1, tm.tm_mday,
+			tm.tm_hour, tm.tm_min, tm.tm_sec, ts.tv_nsec);
+	}
+	if (!old_sleep && new_state != PM_SUSPEND_ON) {
+		state |= SUSPEND_REQUESTED;
+		queue_work(suspend_work_queue, &early_suspend_work);
+	} else if (old_sleep && new_state == PM_SUSPEND_ON) {
+		state &= ~SUSPEND_REQUESTED;
+		wake_lock(&main_wake_lock);
+		queue_work(suspend_work_queue, &late_resume_work);
+	}
+	requested_suspend_state = new_state;
+	spin_unlock_irqrestore(&state_lock, irqflags);
+}
+
+suspend_state_t get_suspend_state(void)
+{
+	return requested_suspend_state;
+}
--- linux-mvl-dove-2.6.32.orig/kernel/power/user.c
+++ linux-mvl-dove-2.6.32/kernel/power/user.c
@@ -113,8 +113,10 @@
 		if (error)
 			pm_notifier_call_chain(PM_POST_RESTORE);
 	}
-	if (error)
+	if (error) {
+		free_basic_memory_bitmaps();
 		atomic_inc(&snapshot_device_available);
+	}
 	data->frozen = 0;
 	data->ready = 0;
 	data->platform_support = 0;
@@ -137,7 +139,7 @@
 	free_all_swap_pages(data->swap);
 	if (data->frozen)
 		thaw_processes();
-	pm_notifier_call_chain(data->mode == O_WRONLY ?
+	pm_notifier_call_chain(data->mode == O_RDONLY ?
 			PM_POST_HIBERNATION : PM_POST_RESTORE);
 	atomic_inc(&snapshot_device_available);
 
--- linux-mvl-dove-2.6.32.orig/kernel/power/process.c
+++ linux-mvl-dove-2.6.32/kernel/power/process.c
@@ -14,6 +14,7 @@
 #include <linux/module.h>
 #include <linux/syscalls.h>
 #include <linux/freezer.h>
+#include <linux/wakelock.h>
 
 /* 
  * Timeout for stopping processes
@@ -37,6 +38,7 @@
 	struct timeval start, end;
 	u64 elapsed_csecs64;
 	unsigned int elapsed_csecs;
+	unsigned int wakeup = 0;
 
 	do_gettimeofday(&start);
 
@@ -63,6 +65,10 @@
 		} while_each_thread(g, p);
 		read_unlock(&tasklist_lock);
 		yield();			/* Yield is okay here */
+		if (todo && has_wake_lock(WAKE_LOCK_SUSPEND)) {
+			wakeup = 1;
+			break;
+		}
 		if (time_after(jiffies, end_time))
 			break;
 	} while (todo);
@@ -78,11 +84,18 @@
 		 * and caller must call thaw_processes() if something fails),
 		 * but it cleans up leftover PF_FREEZE requests.
 		 */
-		printk("\n");
-		printk(KERN_ERR "Freezing of tasks failed after %d.%02d seconds "
-				"(%d tasks refusing to freeze):\n",
-				elapsed_csecs / 100, elapsed_csecs % 100, todo);
-		show_state();
+		if(wakeup) {
+			printk("\n");
+			printk(KERN_ERR "Freezing of %s aborted\n",
+					sig_only ? "user space " : "tasks ");
+		}
+		else {
+			printk("\n");
+			printk(KERN_ERR "Freezing of tasks failed after %d.%02d seconds "
+					"(%d tasks refusing to freeze):\n",
+					elapsed_csecs / 100, elapsed_csecs % 100, todo);
+			show_state();
+		}
 		read_lock(&tasklist_lock);
 		do_each_thread(g, p) {
 			task_lock(p);
@@ -139,7 +152,7 @@
 		if (nosig_only && should_send_signal(p))
 			continue;
 
-		if (cgroup_frozen(p))
+		if (cgroup_freezing_or_frozen(p))
 			continue;
 
 		thaw_process(p);
--- linux-mvl-dove-2.6.32.orig/kernel/power/console.c
+++ linux-mvl-dove-2.6.32/kernel/power/console.c
@@ -17,20 +17,24 @@
 
 int pm_prepare_console(void)
 {
+#ifndef CONFIG_PM_DISABLE_CONSOLE
 	orig_fgconsole = vt_move_to_console(SUSPEND_CONSOLE, 1);
 	if (orig_fgconsole < 0)
 		return 1;
 
 	orig_kmsg = kmsg_redirect;
 	kmsg_redirect = SUSPEND_CONSOLE;
+#endif
 	return 0;
 }
 
 void pm_restore_console(void)
 {
+#ifndef CONFIG_PM_DISABLE_CONSOLE
 	if (orig_fgconsole >= 0) {
 		vt_move_to_console(orig_fgconsole, 0);
 		kmsg_redirect = orig_kmsg;
 	}
+#endif
 }
 #endif
--- linux-mvl-dove-2.6.32.orig/kernel/gcov/fs.c
+++ linux-mvl-dove-2.6.32/kernel/gcov/fs.c
@@ -33,10 +33,11 @@
  * @children: child nodes
  * @all: list head for list of all nodes
  * @parent: parent node
- * @info: associated profiling data structure if not a directory
- * @ghost: when an object file containing profiling data is unloaded we keep a
- *         copy of the profiling data here to allow collecting coverage data
- *         for cleanup code. Such a node is called a "ghost".
+ * @loaded_info: array of pointers to profiling data sets for loaded object
+ *   files.
+ * @num_loaded: number of profiling data sets for loaded object files.
+ * @unloaded_info: accumulated copy of profiling data sets for unloaded
+ *   object files. Used only when gcov_persist=1.
  * @dentry: main debugfs entry, either a directory or data file
  * @links: associated symbolic links
  * @name: data file basename
@@ -51,10 +52,11 @@
 	struct list_head children;
 	struct list_head all;
 	struct gcov_node *parent;
-	struct gcov_info *info;
-	struct gcov_info *ghost;
+	struct gcov_info **loaded_info;
+	struct gcov_info *unloaded_info;
 	struct dentry *dentry;
 	struct dentry **links;
+	int num_loaded;
 	char name[0];
 };
 
@@ -136,16 +138,37 @@
 };
 
 /*
- * Return the profiling data set for a given node. This can either be the
- * original profiling data structure or a duplicate (also called "ghost")
- * in case the associated object file has been unloaded.
+ * Return a profiling data set associated with the given node. This is
+ * either a data set for a loaded object file or a data set copy in case
+ * all associated object files have been unloaded.
  */
 static struct gcov_info *get_node_info(struct gcov_node *node)
 {
-	if (node->info)
-		return node->info;
+	if (node->num_loaded > 0)
+		return node->loaded_info[0];
 
-	return node->ghost;
+	return node->unloaded_info;
+}
+
+/*
+ * Return a newly allocated profiling data set which contains the sum of
+ * all profiling data associated with the given node.
+ */
+static struct gcov_info *get_accumulated_info(struct gcov_node *node)
+{
+	struct gcov_info *info;
+	int i = 0;
+
+	if (node->unloaded_info)
+		info = gcov_info_dup(node->unloaded_info);
+	else
+		info = gcov_info_dup(node->loaded_info[i++]);
+	if (!info)
+		return NULL;
+	for (; i < node->num_loaded; i++)
+		gcov_info_add(info, node->loaded_info[i]);
+
+	return info;
 }
 
 /*
@@ -163,9 +186,10 @@
 	mutex_lock(&node_lock);
 	/*
 	 * Read from a profiling data copy to minimize reference tracking
-	 * complexity and concurrent access.
+	 * complexity and concurrent access and to keep accumulating multiple
+	 * profiling data sets associated with one node simple.
 	 */
-	info = gcov_info_dup(get_node_info(node));
+	info = get_accumulated_info(node);
 	if (!info)
 		goto out_unlock;
 	iter = gcov_iter_new(info);
@@ -225,12 +249,25 @@
 	return NULL;
 }
 
+/*
+ * Reset all profiling data associated with the specified node.
+ */
+static void reset_node(struct gcov_node *node)
+{
+	int i;
+
+	if (node->unloaded_info)
+		gcov_info_reset(node->unloaded_info);
+	for (i = 0; i < node->num_loaded; i++)
+		gcov_info_reset(node->loaded_info[i]);
+}
+
 static void remove_node(struct gcov_node *node);
 
 /*
  * write() implementation for gcov data files. Reset profiling data for the
- * associated file. If the object file has been unloaded (i.e. this is
- * a "ghost" node), remove the debug fs node as well.
+ * corresponding file. If all associated object files have been unloaded,
+ * remove the debug fs node as well.
  */
 static ssize_t gcov_seq_write(struct file *file, const char __user *addr,
 			      size_t len, loff_t *pos)
@@ -245,10 +282,10 @@
 	node = get_node_by_name(info->filename);
 	if (node) {
 		/* Reset counts or remove node for unloaded modules. */
-		if (node->ghost)
+		if (node->num_loaded == 0)
 			remove_node(node);
 		else
-			gcov_info_reset(node->info);
+			reset_node(node);
 	}
 	/* Reset counts for open file. */
 	gcov_info_reset(info);
@@ -378,7 +415,10 @@
 	INIT_LIST_HEAD(&node->list);
 	INIT_LIST_HEAD(&node->children);
 	INIT_LIST_HEAD(&node->all);
-	node->info = info;
+	if (node->loaded_info) {
+		node->loaded_info[0] = info;
+		node->num_loaded = 1;
+	}
 	node->parent = parent;
 	if (name)
 		strcpy(node->name, name);
@@ -394,9 +434,13 @@
 	struct gcov_node *node;
 
 	node = kzalloc(sizeof(struct gcov_node) + strlen(name) + 1, GFP_KERNEL);
-	if (!node) {
-		pr_warning("out of memory\n");
-		return NULL;
+	if (!node)
+		goto err_nomem;
+	if (info) {
+		node->loaded_info = kcalloc(1, sizeof(struct gcov_info *),
+					   GFP_KERNEL);
+		if (!node->loaded_info)
+			goto err_nomem;
 	}
 	init_node(node, info, name, parent);
 	/* Differentiate between gcov data file nodes and directory nodes. */
@@ -416,6 +460,11 @@
 	list_add(&node->all, &all_head);
 
 	return node;
+
+err_nomem:
+	kfree(node);
+	pr_warning("out of memory\n");
+	return NULL;
 }
 
 /* Remove symbolic links associated with node. */
@@ -441,8 +490,9 @@
 	list_del(&node->all);
 	debugfs_remove(node->dentry);
 	remove_links(node);
-	if (node->ghost)
-		gcov_info_free(node->ghost);
+	kfree(node->loaded_info);
+	if (node->unloaded_info)
+		gcov_info_free(node->unloaded_info);
 	kfree(node);
 }
 
@@ -477,7 +527,7 @@
 
 /*
  * write() implementation for reset file. Reset all profiling data to zero
- * and remove ghost nodes.
+ * and remove nodes for which all associated object files are unloaded.
  */
 static ssize_t reset_write(struct file *file, const char __user *addr,
 			   size_t len, loff_t *pos)
@@ -487,8 +537,8 @@
 	mutex_lock(&node_lock);
 restart:
 	list_for_each_entry(node, &all_head, all) {
-		if (node->info)
-			gcov_info_reset(node->info);
+		if (node->num_loaded > 0)
+			reset_node(node);
 		else if (list_empty(&node->children)) {
 			remove_node(node);
 			/* Several nodes may have gone - restart loop. */
@@ -564,37 +614,115 @@
 }
 
 /*
- * The profiling data set associated with this node is being unloaded. Store a
- * copy of the profiling data and turn this node into a "ghost".
+ * Associate a profiling data set with an existing node. Needs to be called
+ * with node_lock held.
  */
-static int ghost_node(struct gcov_node *node)
+static void add_info(struct gcov_node *node, struct gcov_info *info)
 {
-	node->ghost = gcov_info_dup(node->info);
-	if (!node->ghost) {
-		pr_warning("could not save data for '%s' (out of memory)\n",
-			   node->info->filename);
-		return -ENOMEM;
+	struct gcov_info **loaded_info;
+	int num = node->num_loaded;
+
+	/*
+	 * Prepare new array. This is done first to simplify cleanup in
+	 * case the new data set is incompatible, the node only contains
+	 * unloaded data sets and there's not enough memory for the array.
+	 */
+	loaded_info = kcalloc(num + 1, sizeof(struct gcov_info *), GFP_KERNEL);
+	if (!loaded_info) {
+		pr_warning("could not add '%s' (out of memory)\n",
+			   info->filename);
+		return;
+	}
+	memcpy(loaded_info, node->loaded_info,
+	       num * sizeof(struct gcov_info *));
+	loaded_info[num] = info;
+	/* Check if the new data set is compatible. */
+	if (num == 0) {
+		/*
+		 * A module was unloaded, modified and reloaded. The new
+		 * data set replaces the copy of the last one.
+		 */
+		if (!gcov_info_is_compatible(node->unloaded_info, info)) {
+			pr_warning("discarding saved data for %s "
+				   "(incompatible version)\n", info->filename);
+			gcov_info_free(node->unloaded_info);
+			node->unloaded_info = NULL;
+		}
+	} else {
+		/*
+		 * Two different versions of the same object file are loaded.
+		 * The initial one takes precedence.
+		 */
+		if (!gcov_info_is_compatible(node->loaded_info[0], info)) {
+			pr_warning("could not add '%s' (incompatible "
+				   "version)\n", info->filename);
+			kfree(loaded_info);
+			return;
+		}
 	}
-	node->info = NULL;
+	/* Overwrite previous array. */
+	kfree(node->loaded_info);
+	node->loaded_info = loaded_info;
+	node->num_loaded = num + 1;
+}
 
-	return 0;
+/*
+ * Return the index of a profiling data set associated with a node.
+ */
+static int get_info_index(struct gcov_node *node, struct gcov_info *info)
+{
+	int i;
+
+	for (i = 0; i < node->num_loaded; i++) {
+		if (node->loaded_info[i] == info)
+			return i;
+	}
+	return -ENOENT;
 }
 
 /*
- * Profiling data for this node has been loaded again. Add profiling data
- * from previous instantiation and turn this node into a regular node.
+ * Save the data of a profiling data set which is being unloaded.
  */
-static void revive_node(struct gcov_node *node, struct gcov_info *info)
+static void save_info(struct gcov_node *node, struct gcov_info *info)
 {
-	if (gcov_info_is_compatible(node->ghost, info))
-		gcov_info_add(info, node->ghost);
+	if (node->unloaded_info)
+		gcov_info_add(node->unloaded_info, info);
 	else {
-		pr_warning("discarding saved data for '%s' (version changed)\n",
+		node->unloaded_info = gcov_info_dup(info);
+		if (!node->unloaded_info) {
+			pr_warning("could not save data for '%s' "
+				   "(out of memory)\n", info->filename);
+		}
+	}
+}
+
+/*
+ * Disassociate a profiling data set from a node. Needs to be called with
+ * node_lock held.
+ */
+static void remove_info(struct gcov_node *node, struct gcov_info *info)
+{
+	int i;
+
+	i = get_info_index(node, info);
+	if (i < 0) {
+		pr_warning("could not remove '%s' (not found)\n",
 			   info->filename);
+		return;
 	}
-	gcov_info_free(node->ghost);
-	node->ghost = NULL;
-	node->info = info;
+	if (gcov_persist)
+		save_info(node, info);
+	/* Shrink array. */
+	node->loaded_info[i] = node->loaded_info[node->num_loaded - 1];
+	node->num_loaded--;
+	if (node->num_loaded > 0)
+		return;
+	/* Last loaded data set was removed. */
+	kfree(node->loaded_info);
+	node->loaded_info = NULL;
+	node->num_loaded = 0;
+	if (!node->unloaded_info)
+		remove_node(node);
 }
 
 /*
@@ -609,30 +737,18 @@
 	node = get_node_by_name(info->filename);
 	switch (action) {
 	case GCOV_ADD:
-		/* Add new node or revive ghost. */
-		if (!node) {
+		if (node)
+			add_info(node, info);
+		else
 			add_node(info);
-			break;
-		}
-		if (gcov_persist)
-			revive_node(node, info);
-		else {
-			pr_warning("could not add '%s' (already exists)\n",
-				   info->filename);
-		}
 		break;
 	case GCOV_REMOVE:
-		/* Remove node or turn into ghost. */
-		if (!node) {
+		if (node)
+			remove_info(node, info);
+		else {
 			pr_warning("could not remove '%s' (not found)\n",
 				   info->filename);
-			break;
 		}
-		if (gcov_persist) {
-			if (!ghost_node(node))
-				break;
-		}
-		remove_node(node);
 		break;
 	}
 	mutex_unlock(&node_lock);
--- linux-mvl-dove-2.6.32.orig/kernel/time/tick-common.c
+++ linux-mvl-dove-2.6.32/kernel/time/tick-common.c
@@ -51,7 +51,11 @@
 {
 	struct clock_event_device *dev = __get_cpu_var(tick_cpu_device).evtdev;
 
-	return dev && (dev->features & CLOCK_EVT_FEAT_ONESHOT);
+	if (!dev || !(dev->features & CLOCK_EVT_FEAT_ONESHOT))
+		return 0;
+	if (!(dev->features & CLOCK_EVT_FEAT_C3STOP))
+		return 1;
+	return tick_broadcast_oneshot_available();
 }
 
 /*
--- linux-mvl-dove-2.6.32.orig/kernel/time/clocksource.c
+++ linux-mvl-dove-2.6.32/kernel/time/clocksource.c
@@ -131,7 +131,6 @@
 static struct timer_list watchdog_timer;
 static DECLARE_WORK(watchdog_work, clocksource_watchdog_work);
 static DEFINE_SPINLOCK(watchdog_lock);
-static cycle_t watchdog_last;
 static int watchdog_running;
 
 static int clocksource_watchdog_kthread(void *data);
@@ -200,11 +199,6 @@
 	if (!watchdog_running)
 		goto out;
 
-	wdnow = watchdog->read(watchdog);
-	wd_nsec = clocksource_cyc2ns((wdnow - watchdog_last) & watchdog->mask,
-				     watchdog->mult, watchdog->shift);
-	watchdog_last = wdnow;
-
 	list_for_each_entry(cs, &watchdog_list, wd_list) {
 
 		/* Clocksource already marked unstable? */
@@ -214,19 +208,28 @@
 			continue;
 		}
 
+		local_irq_disable();
 		csnow = cs->read(cs);
+		wdnow = watchdog->read(watchdog);
+		local_irq_enable();
 
 		/* Clocksource initialized ? */
 		if (!(cs->flags & CLOCK_SOURCE_WATCHDOG)) {
 			cs->flags |= CLOCK_SOURCE_WATCHDOG;
-			cs->wd_last = csnow;
+			cs->wd_last = wdnow;
+			cs->cs_last = csnow;
 			continue;
 		}
 
-		/* Check the deviation from the watchdog clocksource. */
-		cs_nsec = clocksource_cyc2ns((csnow - cs->wd_last) &
+		wd_nsec = clocksource_cyc2ns((wdnow - cs->wd_last) & watchdog->mask,
+					     watchdog->mult, watchdog->shift);
+
+		cs_nsec = clocksource_cyc2ns((csnow - cs->cs_last) &
 					     cs->mask, cs->mult, cs->shift);
-		cs->wd_last = csnow;
+		cs->cs_last = csnow;
+		cs->wd_last = wdnow;
+
+		/* Check the deviation from the watchdog clocksource. */
 		if (abs(cs_nsec - wd_nsec) > WATCHDOG_THRESHOLD) {
 			clocksource_unstable(cs, cs_nsec - wd_nsec);
 			continue;
@@ -264,7 +267,6 @@
 		return;
 	init_timer(&watchdog_timer);
 	watchdog_timer.function = clocksource_watchdog;
-	watchdog_last = watchdog->read(watchdog);
 	watchdog_timer.expires = jiffies + WATCHDOG_INTERVAL;
 	add_timer_on(&watchdog_timer, cpumask_first(cpu_online_mask));
 	watchdog_running = 1;
@@ -413,6 +415,47 @@
 	clocksource_resume_watchdog();
 }
 
+/**
+ * clocksource_max_deferment - Returns max time the clocksource can be deferred
+ * @cs:         Pointer to clocksource
+ *
+ */
+static u64 clocksource_max_deferment(struct clocksource *cs)
+{
+	u64 max_nsecs, max_cycles;
+
+	/*
+	 * Calculate the maximum number of cycles that we can pass to the
+	 * cyc2ns function without overflowing a 64-bit signed result. The
+	 * maximum number of cycles is equal to ULLONG_MAX/cs->mult which
+	 * is equivalent to the below.
+	 * max_cycles < (2^63)/cs->mult
+	 * max_cycles < 2^(log2((2^63)/cs->mult))
+	 * max_cycles < 2^(log2(2^63) - log2(cs->mult))
+	 * max_cycles < 2^(63 - log2(cs->mult))
+	 * max_cycles < 1 << (63 - log2(cs->mult))
+	 * Please note that we add 1 to the result of the log2 to account for
+	 * any rounding errors, ensure the above inequality is satisfied and
+	 * no overflow will occur.
+	 */
+	max_cycles = 1ULL << (63 - (ilog2(cs->mult) + 1));
+
+	/*
+	 * The actual maximum number of cycles we can defer the clocksource is
+	 * determined by the minimum of max_cycles and cs->mask.
+	 */
+	max_cycles = min_t(u64, max_cycles, (u64) cs->mask);
+	max_nsecs = clocksource_cyc2ns(max_cycles, cs->mult, cs->shift);
+
+	/*
+	 * To ensure that the clocksource does not wrap whilst we are idle,
+	 * limit the time the clocksource can be deferred by 12.5%. Please
+	 * note a margin of 12.5% is used because this can be computed with
+	 * a shift, versus say 10% which would require division.
+	 */
+	return max_nsecs - (max_nsecs >> 5);
+}
+
 #ifdef CONFIG_GENERIC_TIME
 
 /**
@@ -474,6 +517,10 @@
  */
 static int __init clocksource_done_booting(void)
 {
+	mutex_lock(&clocksource_mutex);
+	curr_clocksource = clocksource_default_clock();
+	mutex_unlock(&clocksource_mutex);
+
 	finished_booting = 1;
 
 	/*
@@ -511,10 +558,13 @@
  */
 int clocksource_register(struct clocksource *cs)
 {
+	/* calculate max idle time permitted for this clocksource */
+	cs->max_idle_ns = clocksource_max_deferment(cs);
+
 	mutex_lock(&clocksource_mutex);
 	clocksource_enqueue(cs);
-	clocksource_select();
 	clocksource_enqueue_watchdog(cs);
+	clocksource_select();
 	mutex_unlock(&clocksource_mutex);
 	return 0;
 }
--- linux-mvl-dove-2.6.32.orig/kernel/time/tick-sched.c
+++ linux-mvl-dove-2.6.32/kernel/time/tick-sched.c
@@ -134,18 +134,13 @@
  * value. We do this unconditionally on any cpu, as we don't know whether the
  * cpu, which has the update task assigned is in a long sleep.
  */
-static void tick_nohz_update_jiffies(void)
+static void tick_nohz_update_jiffies(ktime_t now)
 {
 	int cpu = smp_processor_id();
 	struct tick_sched *ts = &per_cpu(tick_cpu_sched, cpu);
 	unsigned long flags;
-	ktime_t now;
-
-	if (!ts->tick_stopped)
-		return;
 
 	cpumask_clear_cpu(cpu, nohz_cpu_mask);
-	now = ktime_get();
 	ts->idle_waketime = now;
 
 	local_irq_save(flags);
@@ -155,20 +150,17 @@
 	touch_softlockup_watchdog();
 }
 
-static void tick_nohz_stop_idle(int cpu)
+static void tick_nohz_stop_idle(int cpu, ktime_t now)
 {
 	struct tick_sched *ts = &per_cpu(tick_cpu_sched, cpu);
+	ktime_t delta;
 
-	if (ts->idle_active) {
-		ktime_t now, delta;
-		now = ktime_get();
-		delta = ktime_sub(now, ts->idle_entrytime);
-		ts->idle_lastupdate = now;
-		ts->idle_sleeptime = ktime_add(ts->idle_sleeptime, delta);
-		ts->idle_active = 0;
+	delta = ktime_sub(now, ts->idle_entrytime);
+	ts->idle_lastupdate = now;
+	ts->idle_sleeptime = ktime_add(ts->idle_sleeptime, delta);
+	ts->idle_active = 0;
 
-		sched_clock_idle_wakeup_event(0);
-	}
+	sched_clock_idle_wakeup_event(0);
 }
 
 static ktime_t tick_nohz_start_idle(struct tick_sched *ts)
@@ -216,6 +208,7 @@
 	struct tick_sched *ts;
 	ktime_t last_update, expires, now;
 	struct clock_event_device *dev = __get_cpu_var(tick_cpu_device).evtdev;
+	u64 time_delta;
 	int cpu;
 
 	local_irq_save(flags);
@@ -255,6 +248,12 @@
 	if (unlikely(ts->nohz_mode == NOHZ_MODE_INACTIVE))
 		goto end;
 
+	if (!inidle && !ts->inidle)
+		goto end;
+
+	now = tick_nohz_start_idle(ts);
+	ts->inidle = 1;
+
 	if (need_resched())
 		goto end;
 
@@ -275,14 +274,28 @@
 		seq = read_seqbegin(&xtime_lock);
 		last_update = last_jiffies_update;
 		last_jiffies = jiffies;
-	} while (read_seqretry(&xtime_lock, seq));
 
-	/* Get the next timer wheel timer */
-	next_jiffies = get_next_timer_interrupt(last_jiffies);
-	delta_jiffies = next_jiffies - last_jiffies;
+		/*
+		 * On SMP we really should only care for the CPU which
+		 * has the do_timer duty assigned. All other CPUs can
+		 * sleep as long as they want.
+		 */
+		if (cpu == tick_do_timer_cpu ||
+		    tick_do_timer_cpu == TICK_DO_TIMER_NONE)
+			time_delta = timekeeping_max_deferment();
+		else
+			time_delta = KTIME_MAX;
+	} while (read_seqretry(&xtime_lock, seq));
 
-	if (rcu_needs_cpu(cpu) || printk_needs_cpu(cpu))
+	if (rcu_needs_cpu(cpu) || printk_needs_cpu(cpu) ||
+	    arch_needs_cpu(cpu)) {
+		next_jiffies = last_jiffies + 1;
 		delta_jiffies = 1;
+	} else {
+		/* Get the next timer wheel timer */
+		next_jiffies = get_next_timer_interrupt(last_jiffies);
+		delta_jiffies = next_jiffies - last_jiffies;
+	}
 	/*
 	 * Do not stop the tick, if we are only one off
 	 * or if the cpu is required for rcu
@@ -294,11 +307,26 @@
 	if ((long)delta_jiffies >= 1) {
 
 		/*
-		* calculate the expiry time for the next timer wheel
-		* timer
-		*/
-		expires = ktime_add_ns(last_update, tick_period.tv64 *
-				   delta_jiffies);
+		 * calculate the expiry time for the next timer wheel
+		 * timer. delta_jiffies >= NEXT_TIMER_MAX_DELTA signals
+		 * that there is no timer pending or at least extremely
+		 * far into the future (12 days for HZ=1000). In this
+		 * case we set the expiry to the end of time.
+		 */
+		if (likely(delta_jiffies < NEXT_TIMER_MAX_DELTA)) {
+			/*
+			 * Calculate the time delta for the next timer event.
+			 * If the time delta exceeds the maximum time delta
+			 * permitted by the current clocksource then adjust
+			 * the time delta accordingly to ensure the
+			 * clocksource does not wrap.
+			 */
+			time_delta = min_t(u64, time_delta,
+					   tick_period.tv64 * delta_jiffies);
+			expires = ktime_add_ns(last_update, time_delta);
+		} else {
+			expires.tv64 = KTIME_MAX;
+		}
 
 		/*
 		 * If this cpu is the one which updates jiffies, then
@@ -342,22 +370,19 @@
 
 		ts->idle_sleeps++;
 
+		/* Mark expires */
+		ts->idle_expires = expires;
+
 		/*
-		 * delta_jiffies >= NEXT_TIMER_MAX_DELTA signals that
-		 * there is no timer pending or at least extremly far
-		 * into the future (12 days for HZ=1000). In this case
-		 * we simply stop the tick timer:
+		 * If the expiration time == KTIME_MAX, then
+		 * in this case we simply stop the tick timer.
 		 */
-		if (unlikely(delta_jiffies >= NEXT_TIMER_MAX_DELTA)) {
-			ts->idle_expires.tv64 = KTIME_MAX;
+		 if (unlikely(expires.tv64 == KTIME_MAX)) {
 			if (ts->nohz_mode == NOHZ_MODE_HIGHRES)
 				hrtimer_cancel(&ts->sched_timer);
 			goto out;
 		}
 
-		/* Mark expiries */
-		ts->idle_expires = expires;
-
 		if (ts->nohz_mode == NOHZ_MODE_HIGHRES) {
 			hrtimer_start(&ts->sched_timer, expires,
 				      HRTIMER_MODE_ABS_PINNED);
@@ -436,7 +461,11 @@
 	ktime_t now;
 
 	local_irq_disable();
-	tick_nohz_stop_idle(cpu);
+	if (ts->idle_active || (ts->inidle && ts->tick_stopped))
+		now = ktime_get();
+
+	if (ts->idle_active)
+		tick_nohz_stop_idle(cpu, now);
 
 	if (!ts->inidle || !ts->tick_stopped) {
 		ts->inidle = 0;
@@ -450,7 +479,6 @@
 
 	/* Update jiffies first */
 	select_nohz_load_balancer(0);
-	now = ktime_get();
 	tick_do_update_jiffies64(now);
 	cpumask_clear_cpu(cpu, nohz_cpu_mask);
 
@@ -584,22 +612,18 @@
  * timer and do not touch the other magic bits which need to be done
  * when idle is left.
  */
-static void tick_nohz_kick_tick(int cpu)
+static void tick_nohz_kick_tick(int cpu, ktime_t now)
 {
 #if 0
 	/* Switch back to 2.6.27 behaviour */
 
 	struct tick_sched *ts = &per_cpu(tick_cpu_sched, cpu);
-	ktime_t delta, now;
-
-	if (!ts->tick_stopped)
-		return;
+	ktime_t delta;
 
 	/*
 	 * Do not touch the tick device, when the next expiry is either
 	 * already reached or less/equal than the tick period.
 	 */
-	now = ktime_get();
 	delta =	ktime_sub(hrtimer_get_expires(&ts->sched_timer), now);
 	if (delta.tv64 <= tick_period.tv64)
 		return;
@@ -608,9 +632,26 @@
 #endif
 }
 
+static inline void tick_check_nohz(int cpu)
+{
+	struct tick_sched *ts = &per_cpu(tick_cpu_sched, cpu);
+	ktime_t now;
+
+	if (!ts->idle_active && !ts->tick_stopped)
+		return;
+	now = ktime_get();
+	if (ts->idle_active)
+		tick_nohz_stop_idle(cpu, now);
+	if (ts->tick_stopped) {
+		tick_nohz_update_jiffies(now);
+		tick_nohz_kick_tick(cpu, now);
+	}
+}
+
 #else
 
 static inline void tick_nohz_switch_to_nohz(void) { }
+static inline void tick_check_nohz(int cpu) { }
 
 #endif /* NO_HZ */
 
@@ -620,11 +661,7 @@
 void tick_check_idle(int cpu)
 {
 	tick_check_oneshot_broadcast(cpu);
-#ifdef CONFIG_NO_HZ
-	tick_nohz_stop_idle(cpu);
-	tick_nohz_update_jiffies();
-	tick_nohz_kick_tick(cpu);
-#endif
+	tick_check_nohz(cpu);
 }
 
 /*
--- linux-mvl-dove-2.6.32.orig/kernel/time/timekeeping.c
+++ linux-mvl-dove-2.6.32/kernel/time/timekeeping.c
@@ -32,6 +32,8 @@
 	cycle_t cycle_interval;
 	/* Number of clock shifted nano seconds in one NTP interval. */
 	u64	xtime_interval;
+	/* shifted nano seconds left over when rounding cycle_interval */
+	s64	xtime_remainder;
 	/* Raw nano seconds accumulated per NTP interval. */
 	u32	raw_interval;
 
@@ -62,7 +64,7 @@
 static void timekeeper_setup_internals(struct clocksource *clock)
 {
 	cycle_t interval;
-	u64 tmp;
+	u64 tmp, ntpinterval;
 
 	timekeeper.clock = clock;
 	clock->cycle_last = clock->read(clock);
@@ -70,6 +72,7 @@
 	/* Do the ns -> cycle conversion first, using original mult */
 	tmp = NTP_INTERVAL_LENGTH;
 	tmp <<= clock->shift;
+	ntpinterval = tmp;
 	tmp += clock->mult/2;
 	do_div(tmp, clock->mult);
 	if (tmp == 0)
@@ -80,6 +83,7 @@
 
 	/* Go back from cycles -> shifted ns */
 	timekeeper.xtime_interval = (u64) interval * clock->mult;
+	timekeeper.xtime_remainder = ntpinterval - timekeeper.xtime_interval;
 	timekeeper.raw_interval =
 		((u64) interval * clock->mult) >> clock->shift;
 
@@ -168,8 +172,15 @@
 static struct timespec xtime_cache __attribute__ ((aligned (16)));
 void update_xtime_cache(u64 nsec)
 {
-	xtime_cache = xtime;
-	timespec_add_ns(&xtime_cache, nsec);
+	/*
+	 * Use temporary variable so get_seconds() cannot catch
+	 * an intermediate xtime_cache.tv_sec value.
+	 * The ACCESS_ONCE() keeps the compiler from optimizing
+	 * out the intermediate value.
+	 */
+	struct timespec ts = xtime;
+	timespec_add_ns(&ts, nsec);
+	ACCESS_ONCE(xtime_cache) = ts;
 }
 
 /* must hold xtime_lock */
@@ -177,7 +188,7 @@
 {
 	xtime.tv_sec += leapsecond;
 	wall_to_monotonic.tv_sec -= leapsecond;
-	update_vsyscall(&xtime, timekeeper.clock);
+	update_vsyscall(&xtime, timekeeper.clock, timekeeper.mult);
 }
 
 #ifdef CONFIG_GENERIC_TIME
@@ -337,7 +348,7 @@
 	timekeeper.ntp_error = 0;
 	ntp_clear();
 
-	update_vsyscall(&xtime, timekeeper.clock);
+	update_vsyscall(&xtime, timekeeper.clock, timekeeper.mult);
 
 	write_sequnlock_irqrestore(&xtime_lock, flags);
 
@@ -488,6 +499,17 @@
 }
 
 /**
+ * timekeeping_max_deferment - Returns max time the clocksource can be deferred
+ *
+ * Caller must observe xtime_lock via read_seqbegin/read_seqretry to
+ * ensure that the clocksource does not change!
+ */
+u64 timekeeping_max_deferment(void)
+{
+	return timekeeper.clock->max_idle_ns;
+}
+
+/**
  * read_persistent_clock -  Return time from the persistent clock.
  *
  * Weak dummy function for arches that do not yet support it.
@@ -770,7 +792,8 @@
 
 		/* accumulate error between NTP and clock interval */
 		timekeeper.ntp_error += tick_length;
-		timekeeper.ntp_error -= timekeeper.xtime_interval <<
+		timekeeper.ntp_error -=
+		    (timekeeper.xtime_interval + timekeeper.xtime_remainder) <<
 					timekeeper.ntp_error_shift;
 	}
 
@@ -811,7 +834,7 @@
 	update_xtime_cache(nsecs);
 
 	/* check to see if there is a new clocksource to use */
-	update_vsyscall(&xtime, timekeeper.clock);
+	update_vsyscall(&xtime, timekeeper.clock, timekeeper.mult);
 }
 
 /**
@@ -834,6 +857,7 @@
 
 	set_normalized_timespec(ts, -boottime.tv_sec, -boottime.tv_nsec);
 }
+EXPORT_SYMBOL_GPL(getboottime);
 
 /**
  * monotonic_to_bootbased - Convert the monotonic time to boot based.
@@ -843,6 +867,7 @@
 {
 	*ts = timespec_add_safe(*ts, total_sleep_time);
 }
+EXPORT_SYMBOL_GPL(monotonic_to_bootbased);
 
 unsigned long get_seconds(void)
 {
--- linux-mvl-dove-2.6.32.orig/kernel/time/tick-internal.h
+++ linux-mvl-dove-2.6.32/kernel/time/tick-internal.h
@@ -37,6 +37,7 @@
 extern int tick_resume_broadcast_oneshot(struct clock_event_device *bc);
 extern int tick_broadcast_oneshot_active(void);
 extern void tick_check_oneshot_broadcast(int cpu);
+bool tick_broadcast_oneshot_available(void);
 # else /* BROADCAST */
 static inline void tick_broadcast_setup_oneshot(struct clock_event_device *bc)
 {
@@ -47,6 +48,7 @@
 static inline void tick_shutdown_broadcast_oneshot(unsigned int *cpup) { }
 static inline int tick_broadcast_oneshot_active(void) { return 0; }
 static inline void tick_check_oneshot_broadcast(int cpu) { }
+static inline bool tick_broadcast_oneshot_available(void) { return true; }
 # endif /* !BROADCAST */
 
 #else /* !ONESHOT */
@@ -77,6 +79,7 @@
 	return 0;
 }
 static inline int tick_broadcast_oneshot_active(void) { return 0; }
+static inline bool tick_broadcast_oneshot_available(void) { return false; }
 #endif /* !TICK_ONESHOT */
 
 /*
--- linux-mvl-dove-2.6.32.orig/kernel/time/tick-broadcast.c
+++ linux-mvl-dove-2.6.32/kernel/time/tick-broadcast.c
@@ -523,10 +523,11 @@
  */
 void tick_broadcast_setup_oneshot(struct clock_event_device *bc)
 {
+	int cpu = smp_processor_id();
+
 	/* Set it up only once ! */
 	if (bc->event_handler != tick_handle_oneshot_broadcast) {
 		int was_periodic = bc->mode == CLOCK_EVT_MODE_PERIODIC;
-		int cpu = smp_processor_id();
 
 		bc->event_handler = tick_handle_oneshot_broadcast;
 		clockevents_set_mode(bc, CLOCK_EVT_MODE_ONESHOT);
@@ -552,6 +553,15 @@
 			tick_broadcast_set_event(tick_next_period, 1);
 		} else
 			bc->next_event.tv64 = KTIME_MAX;
+	} else {
+		/*
+		 * The first cpu which switches to oneshot mode sets
+		 * the bit for all other cpus which are in the general
+		 * (periodic) broadcast mask. So the bit is set and
+		 * would prevent the first broadcast enter after this
+		 * to program the bc device.
+		 */
+		tick_broadcast_clear_oneshot(cpu);
 	}
 }
 
@@ -600,4 +610,14 @@
 	return tick_broadcast_device.mode == TICKDEV_MODE_ONESHOT;
 }
 
+/*
+ * Check whether the broadcast device supports oneshot.
+ */
+bool tick_broadcast_oneshot_available(void)
+{
+	struct clock_event_device *bc = tick_broadcast_device.evtdev;
+
+	return bc ? bc->features & CLOCK_EVT_FEAT_ONESHOT : false;
+}
+
 #endif
--- linux-mvl-dove-2.6.32.orig/kernel/time/clockevents.c
+++ linux-mvl-dove-2.6.32/kernel/time/clockevents.c
@@ -20,6 +20,8 @@
 #include <linux/sysdev.h>
 #include <linux/tick.h>
 
+#include "tick-internal.h"
+
 /* The registered clock event devices */
 static LIST_HEAD(clockevent_devices);
 static LIST_HEAD(clockevents_released);
@@ -237,8 +239,9 @@
  */
 void clockevents_notify(unsigned long reason, void *arg)
 {
-	struct list_head *node, *tmp;
+	struct clock_event_device *dev, *tmp;
 	unsigned long flags;
+	int cpu;
 
 	spin_lock_irqsave(&clockevents_lock, flags);
 	clockevents_do_notify(reason, arg);
@@ -249,8 +252,20 @@
 		 * Unregister the clock event devices which were
 		 * released from the users in the notify chain.
 		 */
-		list_for_each_safe(node, tmp, &clockevents_released)
-			list_del(node);
+		list_for_each_entry_safe(dev, tmp, &clockevents_released, list)
+			list_del(&dev->list);
+		/*
+		 * Now check whether the CPU has left unused per cpu devices
+		 */
+		cpu = *((int *)arg);
+		list_for_each_entry_safe(dev, tmp, &clockevent_devices, list) {
+			if (cpumask_test_cpu(cpu, dev->cpumask) &&
+			    cpumask_weight(dev->cpumask) == 1 &&
+			    !tick_is_broadcast_device(dev)) {
+				BUG_ON(dev->mode != CLOCK_EVT_MODE_UNUSED);
+				list_del(&dev->list);
+			}
+		}
 		break;
 	default:
 		break;
--- linux-mvl-dove-2.6.32.orig/kernel/time/timer_list.c
+++ linux-mvl-dove-2.6.32/kernel/time/timer_list.c
@@ -150,6 +150,9 @@
 	P_ns(expires_next);
 	P(hres_active);
 	P(nr_events);
+	P(nr_retries);
+	P(nr_hangs);
+	P_ns(max_hang_time);
 #endif
 #undef P
 #undef P_ns
@@ -252,7 +255,7 @@
 	u64 now = ktime_to_ns(ktime_get());
 	int cpu;
 
-	SEQ_printf(m, "Timer List Version: v0.4\n");
+	SEQ_printf(m, "Timer List Version: v0.5\n");
 	SEQ_printf(m, "HRTIMER_MAX_CLOCK_BASES: %d\n", HRTIMER_MAX_CLOCK_BASES);
 	SEQ_printf(m, "now at %Ld nsecs\n", (unsigned long long)now);
 
--- linux-mvl-dove-2.6.32.orig/ipc/shm.c
+++ linux-mvl-dove-2.6.32/ipc/shm.c
@@ -101,6 +101,7 @@
 void shm_exit_ns(struct ipc_namespace *ns)
 {
 	free_ipcs(ns, &shm_ids(ns), do_shm_rmid);
+	idr_destroy(&ns->ids[IPC_SHM_IDS].ipcs_idr);
 }
 #endif
 
@@ -290,28 +291,28 @@
 	unsigned long flags)
 {
 	struct shm_file_data *sfd = shm_file_data(file);
-	return get_unmapped_area(sfd->file, addr, len, pgoff, flags);
-}
-
-int is_file_shm_hugepages(struct file *file)
-{
-	int ret = 0;
-
-	if (file->f_op == &shm_file_operations) {
-		struct shm_file_data *sfd;
-		sfd = shm_file_data(file);
-		ret = is_file_hugepages(sfd->file);
-	}
-	return ret;
+	return sfd->file->f_op->get_unmapped_area(sfd->file, addr, len,
+						pgoff, flags);
 }
 
 static const struct file_operations shm_file_operations = {
 	.mmap		= shm_mmap,
 	.fsync		= shm_fsync,
 	.release	= shm_release,
+};
+
+static const struct file_operations shm_file_operations_huge = {
+	.mmap		= shm_mmap,
+	.fsync		= shm_fsync,
+	.release	= shm_release,
 	.get_unmapped_area	= shm_get_unmapped_area,
 };
 
+int is_file_shm_hugepages(struct file *file)
+{
+	return file->f_op == &shm_file_operations_huge;
+}
+
 static const struct vm_operations_struct shm_vm_ops = {
 	.open	= shm_open,	/* callback for a new vm-area open */
 	.close	= shm_close,	/* callback for when the vm-area is released */
@@ -473,6 +474,7 @@
 	    {
 		struct shmid_ds out;
 
+		memset(&out, 0, sizeof(out));
 		ipc64_perm_to_ipc_perm(&in->shm_perm, &out.shm_perm);
 		out.shm_segsz	= in->shm_segsz;
 		out.shm_atime	= in->shm_atime;
@@ -889,7 +891,10 @@
 	if (!sfd)
 		goto out_put_dentry;
 
-	file = alloc_file(path.mnt, path.dentry, f_mode, &shm_file_operations);
+	file = alloc_file(path.mnt, path.dentry, f_mode,
+			is_file_hugepages(shp->shm_file) ?
+				&shm_file_operations_huge :
+				&shm_file_operations);
 	if (!file)
 		goto out_free;
 	ima_counts_get(file);
--- linux-mvl-dove-2.6.32.orig/ipc/sem.c
+++ linux-mvl-dove-2.6.32/ipc/sem.c
@@ -129,6 +129,7 @@
 void sem_exit_ns(struct ipc_namespace *ns)
 {
 	free_ipcs(ns, &sem_ids(ns), freeary);
+	idr_destroy(&ns->ids[IPC_SEM_IDS].ipcs_idr);
 }
 #endif
 
@@ -559,6 +560,8 @@
 	    {
 		struct semid_ds out;
 
+		memset(&out, 0, sizeof(out));
+
 		ipc64_perm_to_ipc_perm(&in->sem_perm, &out.sem_perm);
 
 		out.sem_otime	= in->sem_otime;
--- linux-mvl-dove-2.6.32.orig/ipc/msg.c
+++ linux-mvl-dove-2.6.32/ipc/msg.c
@@ -125,6 +125,7 @@
 void msg_exit_ns(struct ipc_namespace *ns)
 {
 	free_ipcs(ns, &msg_ids(ns), freeque);
+	idr_destroy(&ns->ids[IPC_MSG_IDS].ipcs_idr);
 }
 #endif
 
--- linux-mvl-dove-2.6.32.orig/ipc/compat_mq.c
+++ linux-mvl-dove-2.6.32/ipc/compat_mq.c
@@ -53,6 +53,9 @@
 	void __user *p = NULL;
 	if (u_attr && oflag & O_CREAT) {
 		struct mq_attr attr;
+
+		memset(&attr, 0, sizeof(attr));
+
 		p = compat_alloc_user_space(sizeof(attr));
 		if (get_compat_mq_attr(&attr, u_attr) ||
 		    copy_to_user(p, &attr, sizeof(attr)))
@@ -127,6 +130,8 @@
 	struct mq_attr __user *p = compat_alloc_user_space(2 * sizeof(*p));
 	long ret;
 
+	memset(&mqstat, 0, sizeof(mqstat));
+
 	if (u_mqstat) {
 		if (get_compat_mq_attr(&mqstat, u_mqstat) ||
 		    copy_to_user(p, &mqstat, sizeof(mqstat)))
--- linux-mvl-dove-2.6.32.orig/ipc/mqueue.c
+++ linux-mvl-dove-2.6.32/ipc/mqueue.c
@@ -706,7 +706,7 @@
 	dentry = lookup_one_len(name, ipc_ns->mq_mnt->mnt_root, strlen(name));
 	if (IS_ERR(dentry)) {
 		error = PTR_ERR(dentry);
-		goto out_err;
+		goto out_putfd;
 	}
 	mntget(ipc_ns->mq_mnt);
 
@@ -744,7 +744,6 @@
 	mntput(ipc_ns->mq_mnt);
 out_putfd:
 	put_unused_fd(fd);
-out_err:
 	fd = error;
 out_upsem:
 	mutex_unlock(&ipc_ns->mq_mnt->mnt_root->d_inode->i_mutex);
--- linux-mvl-dove-2.6.32.orig/ipc/compat.c
+++ linux-mvl-dove-2.6.32/ipc/compat.c
@@ -242,6 +242,8 @@
 	struct semid64_ds __user *up64;
 	int version = compat_ipc_parse_version(&third);
 
+	memset(&s64, 0, sizeof(s64));
+
 	if (!uptr)
 		return -EINVAL;
 	if (get_user(pad, (u32 __user *) uptr))
@@ -422,6 +424,8 @@
 	int version = compat_ipc_parse_version(&second);
 	void __user *p;
 
+	memset(&m64, 0, sizeof(m64));
+
 	switch (second & (~IPC_64)) {
 	case IPC_INFO:
 	case IPC_RMID:
@@ -595,6 +599,8 @@
 	int err, err2;
 	int version = compat_ipc_parse_version(&second);
 
+	memset(&s64, 0, sizeof(s64));
+
 	switch (second & (~IPC_64)) {
 	case IPC_RMID:
 	case SHM_LOCK:
--- linux-mvl-dove-2.6.32.orig/fs/pipe.c
+++ linux-mvl-dove-2.6.32/fs/pipe.c
@@ -363,7 +363,7 @@
 			error = ops->confirm(pipe, buf);
 			if (error) {
 				if (!ret)
-					error = ret;
+					ret = error;
 				break;
 			}
 
--- linux-mvl-dove-2.6.32.orig/fs/fcntl.c
+++ linux-mvl-dove-2.6.32/fs/fcntl.c
@@ -195,6 +195,7 @@
  out:
 	return error;
 }
+EXPORT_SYMBOL(sys_dup);
 
 static void f_modown(struct file *filp, struct pid *pid, enum pid_type type,
                      int force)
@@ -618,60 +619,90 @@
 static struct kmem_cache *fasync_cache __read_mostly;
 
 /*
- * fasync_helper() is used by almost all character device drivers
- * to set up the fasync queue. It returns negative on error, 0 if it did
- * no changes and positive if it added/deleted the entry.
+ * Remove a fasync entry. If successfully removed, return
+ * positive and clear the FASYNC flag. If no entry exists,
+ * do nothing and return 0.
+ *
+ * NOTE! It is very important that the FASYNC flag always
+ * match the state "is the filp on a fasync list".
+ *
+ * We always take the 'filp->f_lock', in since fasync_lock
+ * needs to be irq-safe.
  */
-int fasync_helper(int fd, struct file * filp, int on, struct fasync_struct **fapp)
+static int fasync_remove_entry(struct file *filp, struct fasync_struct **fapp)
 {
 	struct fasync_struct *fa, **fp;
-	struct fasync_struct *new = NULL;
 	int result = 0;
 
-	if (on) {
-		new = kmem_cache_alloc(fasync_cache, GFP_KERNEL);
-		if (!new)
-			return -ENOMEM;
+	spin_lock(&filp->f_lock);
+	write_lock_irq(&fasync_lock);
+	for (fp = fapp; (fa = *fp) != NULL; fp = &fa->fa_next) {
+		if (fa->fa_file != filp)
+			continue;
+		*fp = fa->fa_next;
+		kmem_cache_free(fasync_cache, fa);
+		filp->f_flags &= ~FASYNC;
+		result = 1;
+		break;
 	}
+	write_unlock_irq(&fasync_lock);
+	spin_unlock(&filp->f_lock);
+	return result;
+}
+
+/*
+ * Add a fasync entry. Return negative on error, positive if
+ * added, and zero if did nothing but change an existing one.
+ *
+ * NOTE! It is very important that the FASYNC flag always
+ * match the state "is the filp on a fasync list".
+ */
+static int fasync_add_entry(int fd, struct file *filp, struct fasync_struct **fapp)
+{
+	struct fasync_struct *new, *fa, **fp;
+	int result = 0;
+
+	new = kmem_cache_alloc(fasync_cache, GFP_KERNEL);
+	if (!new)
+		return -ENOMEM;
 
-	/*
-	 * We need to take f_lock first since it's not an IRQ-safe
-	 * lock.
-	 */
 	spin_lock(&filp->f_lock);
 	write_lock_irq(&fasync_lock);
 	for (fp = fapp; (fa = *fp) != NULL; fp = &fa->fa_next) {
-		if (fa->fa_file == filp) {
-			if(on) {
-				fa->fa_fd = fd;
-				kmem_cache_free(fasync_cache, new);
-			} else {
-				*fp = fa->fa_next;
-				kmem_cache_free(fasync_cache, fa);
-				result = 1;
-			}
-			goto out;
-		}
+		if (fa->fa_file != filp)
+			continue;
+		fa->fa_fd = fd;
+		kmem_cache_free(fasync_cache, new);
+		goto out;
 	}
 
-	if (on) {
-		new->magic = FASYNC_MAGIC;
-		new->fa_file = filp;
-		new->fa_fd = fd;
-		new->fa_next = *fapp;
-		*fapp = new;
-		result = 1;
-	}
+	new->magic = FASYNC_MAGIC;
+	new->fa_file = filp;
+	new->fa_fd = fd;
+	new->fa_next = *fapp;
+	*fapp = new;
+	result = 1;
+	filp->f_flags |= FASYNC;
+
 out:
-	if (on)
-		filp->f_flags |= FASYNC;
-	else
-		filp->f_flags &= ~FASYNC;
 	write_unlock_irq(&fasync_lock);
 	spin_unlock(&filp->f_lock);
 	return result;
 }
 
+/*
+ * fasync_helper() is used by almost all character device drivers
+ * to set up the fasync queue, and for regular files by the file
+ * lease code. It returns negative on error, 0 if it did no changes
+ * and positive if it added/deleted the entry.
+ */
+int fasync_helper(int fd, struct file * filp, int on, struct fasync_struct **fapp)
+{
+	if (!on)
+		return fasync_remove_entry(filp, fapp);
+	return fasync_add_entry(fd, filp, fapp);
+}
+
 EXPORT_SYMBOL(fasync_helper);
 
 void __kill_fasync(struct fasync_struct *fa, int sig, int band)
--- linux-mvl-dove-2.6.32.orig/fs/binfmt_elf.c
+++ linux-mvl-dove-2.6.32/fs/binfmt_elf.c
@@ -662,27 +662,6 @@
 			if (elf_interpreter[elf_ppnt->p_filesz - 1] != '\0')
 				goto out_free_interp;
 
-			/*
-			 * The early SET_PERSONALITY here is so that the lookup
-			 * for the interpreter happens in the namespace of the 
-			 * to-be-execed image.  SET_PERSONALITY can select an
-			 * alternate root.
-			 *
-			 * However, SET_PERSONALITY is NOT allowed to switch
-			 * this task into the new images's memory mapping
-			 * policy - that is, TASK_SIZE must still evaluate to
-			 * that which is appropriate to the execing application.
-			 * This is because exit_mmap() needs to have TASK_SIZE
-			 * evaluate to the size of the old image.
-			 *
-			 * So if (say) a 64-bit application is execing a 32-bit
-			 * application it is the architecture's responsibility
-			 * to defer changing the value of TASK_SIZE until the
-			 * switch really is going to happen - do this in
-			 * flush_thread().	- akpm
-			 */
-			SET_PERSONALITY(loc->elf_ex);
-
 			interpreter = open_exec(elf_interpreter);
 			retval = PTR_ERR(interpreter);
 			if (IS_ERR(interpreter))
@@ -730,9 +709,6 @@
 		/* Verify the interpreter has a valid arch */
 		if (!elf_check_arch(&loc->interp_elf_ex))
 			goto out_free_dentry;
-	} else {
-		/* Executables without an interpreter also need a personality  */
-		SET_PERSONALITY(loc->elf_ex);
 	}
 
 	/* Flush all traces of the currently running executable */
@@ -740,6 +716,14 @@
 	if (retval)
 		goto out_free_dentry;
 
+#if defined(CONFIG_X86_32) && !defined(CONFIG_UML)
+	/*
+	 * Turn off the CS limit completely if NX active:
+	 */
+	if (executable_stack != EXSTACK_DISABLE_X || nx_enabled)
+		arch_add_exec_range(current->mm, -1);
+#endif
+
 	/* OK, This is the point of no return */
 	current->flags &= ~PF_FORKNOEXEC;
 	current->mm->def_flags = def_flags;
@@ -752,7 +736,8 @@
 
 	if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
 		current->flags |= PF_RANDOMIZE;
-	arch_pick_mmap_layout(current->mm);
+
+	setup_new_exec(bprm);
 
 	/* Do this so that we can load the interpreter, if need be.  We will
 	   change some of these later */
--- linux-mvl-dove-2.6.32.orig/fs/read_write.c
+++ linux-mvl-dove-2.6.32/fs/read_write.c
@@ -826,8 +826,6 @@
 	if (!(out_file->f_mode & FMODE_WRITE))
 		goto fput_out;
 	retval = -EINVAL;
-	if (!out_file->f_op || !out_file->f_op->sendpage)
-		goto fput_out;
 	in_inode = in_file->f_path.dentry->d_inode;
 	out_inode = out_file->f_path.dentry->d_inode;
 	retval = rw_verify_area(WRITE, out_file, &out_file->f_pos, count);
--- linux-mvl-dove-2.6.32.orig/fs/binfmt_misc.c
+++ linux-mvl-dove-2.6.32/fs/binfmt_misc.c
@@ -723,7 +723,7 @@
 {
 	int err = register_filesystem(&bm_fs_type);
 	if (!err) {
-		err = register_binfmt(&misc_format);
+		err = insert_binfmt(&misc_format);
 		if (err)
 			unregister_filesystem(&bm_fs_type);
 	}
--- linux-mvl-dove-2.6.32.orig/fs/eventpoll.c
+++ linux-mvl-dove-2.6.32/fs/eventpoll.c
@@ -63,6 +63,13 @@
  * cleanup path and it is also acquired by eventpoll_release_file()
  * if a file has been pushed inside an epoll set and it is then
  * close()d without a previous call toepoll_ctl(EPOLL_CTL_DEL).
+ * It is also acquired when inserting an epoll fd onto another epoll
+ * fd. We do this so that we walk the epoll tree and ensure that this
+ * insertion does not create a cycle of epoll file descriptors, which
+ * could lead to deadlock. We need a global mutex to prevent two
+ * simultaneous inserts (A into B and B into A) from racing and
+ * constructing a cycle without either insert observing that it is
+ * going to.
  * It is possible to drop the "ep->mtx" and to use the global
  * mutex "epmutex" (together with "ep->lock") to have it working,
  * but having "ep->mtx" will make the interface more scalable.
@@ -227,6 +234,9 @@
  */
 static DEFINE_MUTEX(epmutex);
 
+/* Used to check for epoll file descriptor inclusion loops */
+static struct nested_calls poll_loop_ncalls;
+
 /* Used for safe wake up implementation */
 static struct nested_calls poll_safewake_ncalls;
 
@@ -1182,6 +1192,62 @@
 	return res;
 }
 
+/**
+ * ep_loop_check_proc - Callback function to be passed to the @ep_call_nested()
+ *                      API, to verify that adding an epoll file inside another
+ *                      epoll structure, does not violate the constraints, in
+ *                      terms of closed loops, or too deep chains (which can
+ *                      result in excessive stack usage).
+ *
+ * @priv: Pointer to the epoll file to be currently checked.
+ * @cookie: Original cookie for this call. This is the top-of-the-chain epoll
+ *          data structure pointer.
+ * @call_nests: Current dept of the @ep_call_nested() call stack.
+ *
+ * Returns: Returns zero if adding the epoll @file inside current epoll
+ *          structure @ep does not violate the constraints, or -1 otherwise.
+ */
+static int ep_loop_check_proc(void *priv, void *cookie, int call_nests)
+{
+	int error = 0;
+	struct file *file = priv;
+	struct eventpoll *ep = file->private_data;
+	struct rb_node *rbp;
+	struct epitem *epi;
+
+	mutex_lock(&ep->mtx);
+	for (rbp = rb_first(&ep->rbr); rbp; rbp = rb_next(rbp)) {
+		epi = rb_entry(rbp, struct epitem, rbn);
+		if (unlikely(is_file_epoll(epi->ffd.file))) {
+			error = ep_call_nested(&poll_loop_ncalls, EP_MAX_NESTS,
+					       ep_loop_check_proc, epi->ffd.file,
+					       epi->ffd.file->private_data, current);
+			if (error != 0)
+				break;
+		}
+	}
+	mutex_unlock(&ep->mtx);
+
+	return error;
+}
+
+/**
+ * ep_loop_check - Performs a check to verify that adding an epoll file (@file)
+ *                 another epoll file (represented by @ep) does not create
+ *                 closed loops or too deep chains.
+ *
+ * @ep: Pointer to the epoll private data structure.
+ * @file: Pointer to the epoll file to be checked.
+ *
+ * Returns: Returns zero if adding the epoll @file inside current epoll
+ *          structure @ep does not violate the constraints, or -1 otherwise.
+ */
+static int ep_loop_check(struct eventpoll *ep, struct file *file)
+{
+	return ep_call_nested(&poll_loop_ncalls, EP_MAX_NESTS,
+			      ep_loop_check_proc, file, ep, current);
+}
+
 /*
  * Open an eventpoll file descriptor.
  */
@@ -1230,6 +1296,7 @@
 		struct epoll_event __user *, event)
 {
 	int error;
+	int did_lock_epmutex = 0;
 	struct file *file, *tfile;
 	struct eventpoll *ep;
 	struct epitem *epi;
@@ -1271,6 +1338,25 @@
 	 */
 	ep = file->private_data;
 
+	/*
+	 * When we insert an epoll file descriptor, inside another epoll file
+	 * descriptor, there is the change of creating closed loops, which are
+	 * better be handled here, than in more critical paths.
+	 *
+	 * We hold epmutex across the loop check and the insert in this case, in
+	 * order to prevent two separate inserts from racing and each doing the
+	 * insert "at the same time" such that ep_loop_check passes on both
+	 * before either one does the insert, thereby creating a cycle.
+	 */
+	if (unlikely(is_file_epoll(tfile) && op == EPOLL_CTL_ADD)) {
+		mutex_lock(&epmutex);
+		did_lock_epmutex = 1;
+		error = -ELOOP;
+		if (ep_loop_check(ep, tfile) != 0)
+			goto error_tgt_fput;
+	}
+
+
 	mutex_lock(&ep->mtx);
 
 	/*
@@ -1306,6 +1392,9 @@
 	mutex_unlock(&ep->mtx);
 
 error_tgt_fput:
+	if (unlikely(did_lock_epmutex))
+		mutex_unlock(&epmutex);
+
 	fput(tfile);
 error_fput:
 	fput(file);
@@ -1424,6 +1513,12 @@
 	max_user_watches = (((si.totalram - si.totalhigh) / 25) << PAGE_SHIFT) /
 		EP_ITEM_COST;
 
+	/*
+	 * Initialize the structure used to perform epoll file descriptor
+	 * inclusion loops checks.
+	 */
+	ep_nested_calls_init(&poll_loop_ncalls);
+
 	/* Initialize the structure used to perform safe poll wait head wake ups */
 	ep_nested_calls_init(&poll_safewake_ncalls);
 
--- linux-mvl-dove-2.6.32.orig/fs/binfmt_aout.c
+++ linux-mvl-dove-2.6.32/fs/binfmt_aout.c
@@ -263,6 +263,7 @@
 #else
 	set_personality(PER_LINUX);
 #endif
+	setup_new_exec(bprm);
 
 	current->mm->end_code = ex.a_text +
 		(current->mm->start_code = N_TXTADDR(ex));
--- linux-mvl-dove-2.6.32.orig/fs/binfmt_flat.c
+++ linux-mvl-dove-2.6.32/fs/binfmt_flat.c
@@ -519,6 +519,7 @@
 
 		/* OK, This is the point of no return */
 		set_personality(PER_LINUX_32BIT);
+		setup_new_exec(bprm);
 	}
 
 	/*
--- linux-mvl-dove-2.6.32.orig/fs/inode.c
+++ linux-mvl-dove-2.6.32/fs/inode.c
@@ -256,6 +256,20 @@
 		kmem_cache_free(inode_cachep, (inode));
 }
 
+void address_space_init_once(struct address_space *mapping)
+{
+	memset(mapping, 0, sizeof(*mapping));
+	INIT_RADIX_TREE(&mapping->page_tree, GFP_ATOMIC);
+	spin_lock_init(&mapping->tree_lock);
+	spin_lock_init(&mapping->i_mmap_lock);
+	INIT_LIST_HEAD(&mapping->private_list);
+	spin_lock_init(&mapping->private_lock);
+	INIT_RAW_PRIO_TREE_ROOT(&mapping->i_mmap);
+	INIT_LIST_HEAD(&mapping->i_mmap_nonlinear);
+	mutex_init(&mapping->unmap_mutex);
+}
+EXPORT_SYMBOL(address_space_init_once);
+
 /*
  * These are initializations that only need to be done
  * once, because the fields are idempotent across use
@@ -267,13 +281,7 @@
 	INIT_HLIST_NODE(&inode->i_hash);
 	INIT_LIST_HEAD(&inode->i_dentry);
 	INIT_LIST_HEAD(&inode->i_devices);
-	INIT_RADIX_TREE(&inode->i_data.page_tree, GFP_ATOMIC);
-	spin_lock_init(&inode->i_data.tree_lock);
-	spin_lock_init(&inode->i_data.i_mmap_lock);
-	INIT_LIST_HEAD(&inode->i_data.private_list);
-	spin_lock_init(&inode->i_data.private_lock);
-	INIT_RAW_PRIO_TREE_ROOT(&inode->i_data.i_mmap);
-	INIT_LIST_HEAD(&inode->i_data.i_mmap_nonlinear);
+	address_space_init_once(&inode->i_data);
 	i_size_ordered_init(inode);
 #ifdef CONFIG_INOTIFY
 	INIT_LIST_HEAD(&inode->inotify_watches);
@@ -1624,3 +1632,7 @@
 				  inode->i_ino);
 }
 EXPORT_SYMBOL(init_special_inode);
+
+#define CREATE_TRACE_POINTS
+#include <trace/events/vfs.h>
+
--- linux-mvl-dove-2.6.32.orig/fs/fs-writeback.c
+++ linux-mvl-dove-2.6.32/fs/fs-writeback.c
@@ -25,6 +25,7 @@
 #include <linux/blkdev.h>
 #include <linux/backing-dev.h>
 #include <linux/buffer_head.h>
+#include <trace/events/vfs.h>
 #include "internal.h"
 
 #define inode_to_bdi(inode)	((inode)->i_mapping->backing_dev_info)
@@ -37,51 +38,18 @@
 /*
  * Passed into wb_writeback(), essentially a subset of writeback_control
  */
-struct wb_writeback_args {
+struct wb_writeback_work {
 	long nr_pages;
 	struct super_block *sb;
 	enum writeback_sync_modes sync_mode;
 	int for_kupdate:1;
 	int range_cyclic:1;
 	int for_background:1;
-};
 
-/*
- * Work items for the bdi_writeback threads
- */
-struct bdi_work {
 	struct list_head list;		/* pending work list */
-	struct rcu_head rcu_head;	/* for RCU free/clear of work */
-
-	unsigned long seen;		/* threads that have seen this work */
-	atomic_t pending;		/* number of threads still to do work */
-
-	struct wb_writeback_args args;	/* writeback arguments */
-
-	unsigned long state;		/* flag bits, see WS_* */
-};
-
-enum {
-	WS_USED_B = 0,
-	WS_ONSTACK_B,
+	struct completion *done;	/* set if the caller waits */
 };
 
-#define WS_USED (1 << WS_USED_B)
-#define WS_ONSTACK (1 << WS_ONSTACK_B)
-
-static inline bool bdi_work_on_stack(struct bdi_work *work)
-{
-	return test_bit(WS_ONSTACK_B, &work->state);
-}
-
-static inline void bdi_work_init(struct bdi_work *work,
-				 struct wb_writeback_args *args)
-{
-	INIT_RCU_HEAD(&work->rcu_head);
-	work->args = *args;
-	work->state = WS_USED;
-}
-
 /**
  * writeback_in_progress - determine whether there is writeback in progress
  * @bdi: the device's backing_dev_info structure.
@@ -94,76 +62,11 @@
 	return !list_empty(&bdi->work_list);
 }
 
-static void bdi_work_clear(struct bdi_work *work)
-{
-	clear_bit(WS_USED_B, &work->state);
-	smp_mb__after_clear_bit();
-	/*
-	 * work can have disappeared at this point. bit waitq functions
-	 * should be able to tolerate this, provided bdi_sched_wait does
-	 * not dereference it's pointer argument.
-	*/
-	wake_up_bit(&work->state, WS_USED_B);
-}
-
-static void bdi_work_free(struct rcu_head *head)
-{
-	struct bdi_work *work = container_of(head, struct bdi_work, rcu_head);
-
-	if (!bdi_work_on_stack(work))
-		kfree(work);
-	else
-		bdi_work_clear(work);
-}
-
-static void wb_work_complete(struct bdi_work *work)
-{
-	const enum writeback_sync_modes sync_mode = work->args.sync_mode;
-	int onstack = bdi_work_on_stack(work);
-
-	/*
-	 * For allocated work, we can clear the done/seen bit right here.
-	 * For on-stack work, we need to postpone both the clear and free
-	 * to after the RCU grace period, since the stack could be invalidated
-	 * as soon as bdi_work_clear() has done the wakeup.
-	 */
-	if (!onstack)
-		bdi_work_clear(work);
-	if (sync_mode == WB_SYNC_NONE || onstack)
-		call_rcu(&work->rcu_head, bdi_work_free);
-}
-
-static void wb_clear_pending(struct bdi_writeback *wb, struct bdi_work *work)
+static void bdi_queue_work(struct backing_dev_info *bdi,
+		struct wb_writeback_work *work)
 {
-	/*
-	 * The caller has retrieved the work arguments from this work,
-	 * drop our reference. If this is the last ref, delete and free it
-	 */
-	if (atomic_dec_and_test(&work->pending)) {
-		struct backing_dev_info *bdi = wb->bdi;
-
-		spin_lock(&bdi->wb_lock);
-		list_del_rcu(&work->list);
-		spin_unlock(&bdi->wb_lock);
-
-		wb_work_complete(work);
-	}
-}
-
-static void bdi_queue_work(struct backing_dev_info *bdi, struct bdi_work *work)
-{
-	work->seen = bdi->wb_mask;
-	BUG_ON(!work->seen);
-	atomic_set(&work->pending, bdi->wb_cnt);
-	BUG_ON(!bdi->wb_cnt);
-
-	/*
-	 * list_add_tail_rcu() contains the necessary barriers to
-	 * make sure the above stores are seen before the item is
-	 * noticed on the list
-	 */
 	spin_lock(&bdi->wb_lock);
-	list_add_tail_rcu(&work->list, &bdi->work_list);
+	list_add_tail(&work->list, &bdi->work_list);
 	spin_unlock(&bdi->wb_lock);
 
 	/*
@@ -180,96 +83,59 @@
 	}
 }
 
-/*
- * Used for on-stack allocated work items. The caller needs to wait until
- * the wb threads have acked the work before it's safe to continue.
- */
-static void bdi_wait_on_work_clear(struct bdi_work *work)
+static void
+__bdi_start_writeback(struct backing_dev_info *bdi, long nr_pages,
+		      bool range_cyclic, bool for_background)
 {
-	wait_on_bit(&work->state, WS_USED_B, bdi_sched_wait,
-		    TASK_UNINTERRUPTIBLE);
-}
-
-static void bdi_alloc_queue_work(struct backing_dev_info *bdi,
-				 struct wb_writeback_args *args)
-{
-	struct bdi_work *work;
+	struct wb_writeback_work *work;
 
 	/*
 	 * This is WB_SYNC_NONE writeback, so if allocation fails just
 	 * wakeup the thread for old dirty data writeback
 	 */
-	work = kmalloc(sizeof(*work), GFP_ATOMIC);
-	if (work) {
-		bdi_work_init(work, args);
-		bdi_queue_work(bdi, work);
-	} else {
-		struct bdi_writeback *wb = &bdi->wb;
-
-		if (wb->task)
-			wake_up_process(wb->task);
+	work = kzalloc(sizeof(*work), GFP_ATOMIC);
+	if (!work) {
+		if (bdi->wb.task)
+			wake_up_process(bdi->wb.task);
+		return;
 	}
+
+	work->sync_mode = WB_SYNC_NONE;
+	work->nr_pages  = nr_pages;
+	work->range_cyclic = range_cyclic;
+	work->for_background = for_background;
+
+	bdi_queue_work(bdi, work);
 }
 
 /**
- * bdi_sync_writeback - start and wait for writeback
+ * bdi_start_writeback - start writeback
  * @bdi: the backing device to write from
- * @sb: write inodes from this super_block
+ * @nr_pages: the number of pages to write
  *
  * Description:
- *   This does WB_SYNC_ALL data integrity writeback and waits for the
- *   IO to complete. Callers must hold the sb s_umount semaphore for
- *   reading, to avoid having the super disappear before we are done.
+ *   This does WB_SYNC_NONE opportunistic writeback. The IO is only
+ *   started when this function returns, we make no guarentees on
+ *   completion. Caller need not hold sb s_umount semaphore.
+ *
  */
-static void bdi_sync_writeback(struct backing_dev_info *bdi,
-			       struct super_block *sb)
+void bdi_start_writeback(struct backing_dev_info *bdi, long nr_pages)
 {
-	struct wb_writeback_args args = {
-		.sb		= sb,
-		.sync_mode	= WB_SYNC_ALL,
-		.nr_pages	= LONG_MAX,
-		.range_cyclic	= 0,
-	};
-	struct bdi_work work;
-
-	bdi_work_init(&work, &args);
-	work.state |= WS_ONSTACK;
-
-	bdi_queue_work(bdi, &work);
-	bdi_wait_on_work_clear(&work);
+	__bdi_start_writeback(bdi, nr_pages, true, false);
 }
 
 /**
- * bdi_start_writeback - start writeback
+ * bdi_start_background_writeback - start background writeback
  * @bdi: the backing device to write from
- * @nr_pages: the number of pages to write
  *
  * Description:
- *   This does WB_SYNC_NONE opportunistic writeback. The IO is only
+ *   This does WB_SYNC_NONE background writeback. The IO is only
  *   started when this function returns, we make no guarentees on
  *   completion. Caller need not hold sb s_umount semaphore.
- *
  */
-void bdi_start_writeback(struct backing_dev_info *bdi, struct super_block *sb,
-			 long nr_pages)
+void bdi_start_background_writeback(struct backing_dev_info *bdi)
 {
-	struct wb_writeback_args args = {
-		.sb		= sb,
-		.sync_mode	= WB_SYNC_NONE,
-		.nr_pages	= nr_pages,
-		.range_cyclic	= 1,
-	};
-
-	/*
-	 * We treat @nr_pages=0 as the special case to do background writeback,
-	 * ie. to sync pages until the background dirty threshold is reached.
-	 */
-	if (!nr_pages) {
-		args.nr_pages = LONG_MAX;
-		args.for_background = 1;
-	}
-
-	bdi_alloc_queue_work(bdi, &args);
+	__bdi_start_writeback(bdi, LONG_MAX, true, true);
 }
 
 /*
@@ -548,134 +414,79 @@
 	return ret;
 }
 
-static void unpin_sb_for_writeback(struct super_block **psb)
-{
-	struct super_block *sb = *psb;
-
-	if (sb) {
-		up_read(&sb->s_umount);
-		put_super(sb);
-		*psb = NULL;
-	}
-}
-
 /*
- * For WB_SYNC_NONE writeback, the caller does not have the sb pinned
+ * For background writeback the caller does not have the sb pinned
  * before calling writeback. So make sure that we do pin it, so it doesn't
  * go away while we are writing inodes from it.
- *
- * Returns 0 if the super was successfully pinned (or pinning wasn't needed),
- * 1 if we failed.
  */
-static int pin_sb_for_writeback(struct writeback_control *wbc,
-				struct inode *inode, struct super_block **psb)
+static bool pin_sb_for_writeback(struct super_block *sb)
 {
-	struct super_block *sb = inode->i_sb;
-
-	/*
-	 * If this sb is already pinned, nothing more to do. If not and
-	 * *psb is non-NULL, unpin the old one first
-	 */
-	if (sb == *psb)
-		return 0;
-	else if (*psb)
-		unpin_sb_for_writeback(psb);
-
-	/*
-	 * Caller must already hold the ref for this
-	 */
-	if (wbc->sync_mode == WB_SYNC_ALL) {
-		WARN_ON(!rwsem_is_locked(&sb->s_umount));
-		return 0;
+	spin_lock(&sb_lock);
+	if (list_empty(&sb->s_instances)) {
+		spin_unlock(&sb_lock);
+		return false;
 	}
 
-	spin_lock(&sb_lock);
 	sb->s_count++;
+	spin_unlock(&sb_lock);
+
 	if (down_read_trylock(&sb->s_umount)) {
-		if (sb->s_root) {
-			spin_unlock(&sb_lock);
-			goto pinned;
-		}
-		/*
-		 * umounted, drop rwsem again and fall through to failure
-		 */
+		if (sb->s_root)
+			return true;
 		up_read(&sb->s_umount);
 	}
 
-	sb->s_count--;
-	spin_unlock(&sb_lock);
-	return 1;
-pinned:
-	*psb = sb;
-	return 0;
+	put_super(sb);
+	return false;
 }
 
-static void writeback_inodes_wb(struct bdi_writeback *wb,
-				struct writeback_control *wbc)
+/*
+ * Write a portion of b_io inodes which belong to @sb.
+ *
+ * If @only_this_sb is true, then find and write all such
+ * inodes. Otherwise write only ones which go sequentially
+ * in reverse order.
+ *
+ * Return 1, if the caller writeback routine should be
+ * interrupted. Otherwise return 0.
+ */
+static int writeback_sb_inodes(struct super_block *sb, struct bdi_writeback *wb,
+		struct writeback_control *wbc, bool only_this_sb)
 {
-	struct super_block *sb = wbc->sb, *pin_sb = NULL;
-	const int is_blkdev_sb = sb_is_blkdev_sb(sb);
-	const unsigned long start = jiffies;	/* livelock avoidance */
-
-	spin_lock(&inode_lock);
-
-	if (!wbc->for_kupdate || list_empty(&wb->b_io))
-		queue_io(wb, wbc->older_than_this);
-
 	while (!list_empty(&wb->b_io)) {
-		struct inode *inode = list_entry(wb->b_io.prev,
-						struct inode, i_list);
 		long pages_skipped;
+		struct inode *inode = list_entry(wb->b_io.prev,
+						 struct inode, i_list);
 
-		/*
-		 * super block given and doesn't match, skip this inode
-		 */
-		if (sb && sb != inode->i_sb) {
-			redirty_tail(inode);
-			continue;
-		}
-
-		if (!bdi_cap_writeback_dirty(wb->bdi)) {
-			redirty_tail(inode);
-			if (is_blkdev_sb) {
+		if (inode->i_sb != sb) {
+			if (only_this_sb) {
 				/*
-				 * Dirty memory-backed blockdev: the ramdisk
-				 * driver does this.  Skip just this inode
+				 * We only want to write back data for this
+				 * superblock, move all inodes not belonging
+				 * to it back onto the dirty list.
 				 */
+				redirty_tail(inode);
 				continue;
 			}
+
 			/*
-			 * Dirty memory-backed inode against a filesystem other
-			 * than the kernel-internal bdev filesystem.  Skip the
-			 * entire superblock.
+			 * The inode belongs to a different superblock.
+			 * Bounce back to the caller to unpin this and
+			 * pin the next superblock.
 			 */
-			break;
+			return 0;
 		}
 
 		if (inode->i_state & (I_NEW | I_WILL_FREE)) {
 			requeue_io(inode);
 			continue;
 		}
-
-		if (wbc->nonblocking && bdi_write_congested(wb->bdi)) {
-			wbc->encountered_congestion = 1;
-			if (!is_blkdev_sb)
-				break;		/* Skip a congested fs */
-			requeue_io(inode);
-			continue;		/* Skip a congested blockdev */
-		}
-
 		/*
 		 * Was this inode dirtied after sync_sb_inodes was called?
 		 * This keeps sync from extra jobs and livelock.
 		 */
-		if (inode_dirtied_after(inode, start))
-			break;
-
-		if (pin_sb_for_writeback(wbc, inode, &pin_sb)) {
-			requeue_io(inode);
-			continue;
-		}
+		if (inode_dirtied_after(inode, wbc->wb_start))
+			return 1;
 
 		BUG_ON(inode->i_state & (I_FREEING | I_CLEAR));
 		__iget(inode);
@@ -694,23 +505,55 @@
 		spin_lock(&inode_lock);
 		if (wbc->nr_to_write <= 0) {
 			wbc->more_io = 1;
-			break;
+			return 1;
 		}
 		if (!list_empty(&wb->b_more_io))
 			wbc->more_io = 1;
 	}
+	/* b_io is empty */
+	return 1;
+}
+
+void writeback_inodes_wb(struct bdi_writeback *wb,
+		struct writeback_control *wbc)
+{
+	int ret = 0;
+
+	wbc->wb_start = jiffies; /* livelock avoidance */
+	spin_lock(&inode_lock);
+	if (!wbc->for_kupdate || list_empty(&wb->b_io))
+		queue_io(wb, wbc->older_than_this);
+
+	while (!list_empty(&wb->b_io)) {
+		struct inode *inode = list_entry(wb->b_io.prev,
+						 struct inode, i_list);
+		struct super_block *sb = inode->i_sb;
 
-	unpin_sb_for_writeback(&pin_sb);
+		if (!pin_sb_for_writeback(sb)) {
+			requeue_io(inode);
+			continue;
+		}
+		ret = writeback_sb_inodes(sb, wb, wbc, false);
+		drop_super(sb);
 
+		if (ret)
+			break;
+	}
 	spin_unlock(&inode_lock);
 	/* Leave any unwritten inodes on b_io */
 }
 
-void writeback_inodes_wbc(struct writeback_control *wbc)
+static void __writeback_inodes_sb(struct super_block *sb,
+		struct bdi_writeback *wb, struct writeback_control *wbc)
 {
-	struct backing_dev_info *bdi = wbc->bdi;
+	WARN_ON(!rwsem_is_locked(&sb->s_umount));
 
-	writeback_inodes_wb(&bdi->wb, wbc);
+	wbc->wb_start = jiffies; /* livelock avoidance */
+	spin_lock(&inode_lock);
+	if (!wbc->for_kupdate || list_empty(&wb->b_io))
+		queue_io(wb, wbc->older_than_this);
+	writeback_sb_inodes(sb, wb, wbc, true);
+	spin_unlock(&inode_lock);
 }
 
 /*
@@ -748,15 +591,13 @@
  * all dirty pages if they are all attached to "old" mappings.
  */
 static long wb_writeback(struct bdi_writeback *wb,
-			 struct wb_writeback_args *args)
+			 struct wb_writeback_work *work)
 {
 	struct writeback_control wbc = {
-		.bdi			= wb->bdi,
-		.sb			= args->sb,
-		.sync_mode		= args->sync_mode,
+		.sync_mode		= work->sync_mode,
 		.older_than_this	= NULL,
-		.for_kupdate		= args->for_kupdate,
-		.range_cyclic		= args->range_cyclic,
+		.for_kupdate		= work->for_kupdate,
+		.range_cyclic		= work->range_cyclic,
 	};
 	unsigned long oldest_jif;
 	long wrote = 0;
@@ -776,22 +617,24 @@
 		/*
 		 * Stop writeback when nr_pages has been consumed
 		 */
-		if (args->nr_pages <= 0)
+		if (work->nr_pages <= 0)
 			break;
 
 		/*
 		 * For background writeout, stop when we are below the
 		 * background dirty threshold
 		 */
-		if (args->for_background && !over_bground_thresh())
+		if (work->for_background && !over_bground_thresh())
 			break;
 
 		wbc.more_io = 0;
-		wbc.encountered_congestion = 0;
 		wbc.nr_to_write = MAX_WRITEBACK_PAGES;
 		wbc.pages_skipped = 0;
-		writeback_inodes_wb(wb, &wbc);
-		args->nr_pages -= MAX_WRITEBACK_PAGES - wbc.nr_to_write;
+		if (work->sb)
+			__writeback_inodes_sb(work->sb, wb, &wbc);
+		else
+			writeback_inodes_wb(wb, &wbc);
+		work->nr_pages -= MAX_WRITEBACK_PAGES - wbc.nr_to_write;
 		wrote += MAX_WRITEBACK_PAGES - wbc.nr_to_write;
 
 		/*
@@ -827,31 +670,21 @@
 }
 
 /*
- * Return the next bdi_work struct that hasn't been processed by this
- * wb thread yet. ->seen is initially set for each thread that exists
- * for this device, when a thread first notices a piece of work it
- * clears its bit. Depending on writeback type, the thread will notify
- * completion on either receiving the work (WB_SYNC_NONE) or after
- * it is done (WB_SYNC_ALL).
+ * Return the next wb_writeback_work struct that hasn't been processed yet.
  */
-static struct bdi_work *get_next_work_item(struct backing_dev_info *bdi,
-					   struct bdi_writeback *wb)
+static struct wb_writeback_work *
+get_next_work_item(struct backing_dev_info *bdi, struct bdi_writeback *wb)
 {
-	struct bdi_work *work, *ret = NULL;
+	struct wb_writeback_work *work = NULL;
 
-	rcu_read_lock();
-
-	list_for_each_entry_rcu(work, &bdi->work_list, list) {
-		if (!test_bit(wb->nr, &work->seen))
-			continue;
-		clear_bit(wb->nr, &work->seen);
-
-		ret = work;
-		break;
+	spin_lock(&bdi->wb_lock);
+	if (!list_empty(&bdi->work_list)) {
+		work = list_entry(bdi->work_list.next,
+				  struct wb_writeback_work, list);
+		list_del_init(&work->list);
 	}
-
-	rcu_read_unlock();
-	return ret;
+	spin_unlock(&bdi->wb_lock);
+	return work;
 }
 
 static long wb_check_old_data_flush(struct bdi_writeback *wb)
@@ -859,6 +692,12 @@
 	unsigned long expired;
 	long nr_pages;
 
+	/*
+	 * When set to zero, disable periodic writeback
+	 */
+	if (!dirty_writeback_interval)
+		return 0;
+
 	expired = wb->last_old_flush +
 			msecs_to_jiffies(dirty_writeback_interval * 10);
 	if (time_before(jiffies, expired))
@@ -870,14 +709,14 @@
 			(inodes_stat.nr_inodes - inodes_stat.nr_unused);
 
 	if (nr_pages) {
-		struct wb_writeback_args args = {
+		struct wb_writeback_work work = {
 			.nr_pages	= nr_pages,
 			.sync_mode	= WB_SYNC_NONE,
 			.for_kupdate	= 1,
 			.range_cyclic	= 1,
 		};
 
-		return wb_writeback(wb, &args);
+		return wb_writeback(wb, &work);
 	}
 
 	return 0;
@@ -889,33 +728,27 @@
 long wb_do_writeback(struct bdi_writeback *wb, int force_wait)
 {
 	struct backing_dev_info *bdi = wb->bdi;
-	struct bdi_work *work;
+	struct wb_writeback_work *work;
 	long wrote = 0;
 
 	while ((work = get_next_work_item(bdi, wb)) != NULL) {
-		struct wb_writeback_args args = work->args;
-
 		/*
 		 * Override sync mode, in case we must wait for completion
+		 * because this thread is exiting now.
 		 */
 		if (force_wait)
-			work->args.sync_mode = args.sync_mode = WB_SYNC_ALL;
+			work->sync_mode = WB_SYNC_ALL;
 
-		/*
-		 * If this isn't a data integrity operation, just notify
-		 * that we have seen this work and we are now starting it.
-		 */
-		if (args.sync_mode == WB_SYNC_NONE)
-			wb_clear_pending(wb, work);
-
-		wrote += wb_writeback(wb, &args);
+		wrote += wb_writeback(wb, work);
 
 		/*
-		 * This is a data integrity writeback, so only do the
-		 * notification when we have completed the work.
+		 * Notify the caller of completion if this is a synchronous
+		 * work item, otherwise just free it.
 		 */
-		if (args.sync_mode == WB_SYNC_ALL)
-			wb_clear_pending(wb, work);
+		if (work->done)
+			complete(work->done);
+		else
+			kfree(work);
 	}
 
 	/*
@@ -954,8 +787,12 @@
 				break;
 		}
 
-		wait_jiffies = msecs_to_jiffies(dirty_writeback_interval * 10);
-		schedule_timeout_interruptible(wait_jiffies);
+		if (dirty_writeback_interval) {
+			wait_jiffies = msecs_to_jiffies(dirty_writeback_interval * 10);
+			schedule_timeout_interruptible(wait_jiffies);
+		} else
+			schedule();
+
 		try_to_freeze();
 	}
 
@@ -963,42 +800,27 @@
 }
 
 /*
- * Schedule writeback for all backing devices. This does WB_SYNC_NONE
- * writeback, for integrity writeback see bdi_sync_writeback().
+ * Start writeback of `nr_pages' pages.  If `nr_pages' is zero, write back
+ * the whole world.
  */
-static void bdi_writeback_all(struct super_block *sb, long nr_pages)
+void wakeup_flusher_threads(long nr_pages)
 {
-	struct wb_writeback_args args = {
-		.sb		= sb,
-		.nr_pages	= nr_pages,
-		.sync_mode	= WB_SYNC_NONE,
-	};
 	struct backing_dev_info *bdi;
 
-	rcu_read_lock();
+	if (!nr_pages) {
+		nr_pages = global_page_state(NR_FILE_DIRTY) +
+				global_page_state(NR_UNSTABLE_NFS);
+	}
 
+	rcu_read_lock();
 	list_for_each_entry_rcu(bdi, &bdi_list, bdi_list) {
 		if (!bdi_has_dirty_io(bdi))
 			continue;
-
-		bdi_alloc_queue_work(bdi, &args);
+		__bdi_start_writeback(bdi, nr_pages, false, false);
 	}
-
 	rcu_read_unlock();
 }
 
-/*
- * Start writeback of `nr_pages' pages.  If `nr_pages' is zero, write back
- * the whole world.
- */
-void wakeup_flusher_threads(long nr_pages)
-{
-	if (nr_pages == 0)
-		nr_pages = global_page_state(NR_FILE_DIRTY) +
-				global_page_state(NR_UNSTABLE_NFS);
-	bdi_writeback_all(NULL, nr_pages);
-}
-
 static noinline void block_dump___mark_inode_dirty(struct inode *inode)
 {
 	if (inode->i_ino || strcmp(inode->i_sb->s_id, "bdev")) {
@@ -1071,8 +893,27 @@
 	if ((inode->i_state & flags) == flags)
 		return;
 
+	trace_dirty_inode(inode, current);
+
 	if (unlikely(block_dump))
 		block_dump___mark_inode_dirty(inode);
+	if (unlikely(block_dump > 1)) {
+		struct dentry *dentry = NULL;
+		const char *name = "?";
+
+		if (!list_empty(&inode->i_dentry)) {
+			dentry = list_entry(inode->i_dentry.next,
+					    struct dentry, d_alias);
+			if (dentry && dentry->d_name.name)
+				name = (const char *) dentry->d_name.name;
+		}
+
+		if (inode->i_ino || strcmp(inode->i_sb->s_id, "bdev"))
+			printk(KERN_DEBUG
+			       "%s(%d): dirtied inode %lu (%s) on %s\n",
+			       current->comm, task_pid_nr(current), inode->i_ino,
+			       name, inode->i_sb->s_id);
+	}
 
 	spin_lock(&inode_lock);
 	if ((inode->i_state & flags) != flags) {
@@ -1203,16 +1044,43 @@
 {
 	unsigned long nr_dirty = global_page_state(NR_FILE_DIRTY);
 	unsigned long nr_unstable = global_page_state(NR_UNSTABLE_NFS);
-	long nr_to_write;
+	DECLARE_COMPLETION_ONSTACK(done);
+	struct wb_writeback_work work = {
+		.sb		= sb,
+		.sync_mode	= WB_SYNC_NONE,
+		.done		= &done,
+	};
+
+	WARN_ON(!rwsem_is_locked(&sb->s_umount));
 
-	nr_to_write = nr_dirty + nr_unstable +
+	work.nr_pages = nr_dirty + nr_unstable +
 			(inodes_stat.nr_inodes - inodes_stat.nr_unused);
 
-	bdi_start_writeback(sb->s_bdi, sb, nr_to_write);
+	bdi_queue_work(sb->s_bdi, &work);
+	wait_for_completion(&done);
 }
 EXPORT_SYMBOL(writeback_inodes_sb);
 
 /**
+ * writeback_inodes_sb_if_idle	-	start writeback if none underway
+ * @sb: the superblock
+ *
+ * Invoke writeback_inodes_sb if no writeback is currently underway.
+ * Returns 1 if writeback was started, 0 if not.
+ */
+int writeback_inodes_sb_if_idle(struct super_block *sb)
+{
+	if (!writeback_in_progress(sb->s_bdi)) {
+		down_read(&sb->s_umount);
+		writeback_inodes_sb(sb);
+		up_read(&sb->s_umount);
+		return 1;
+	} else
+		return 0;
+}
+EXPORT_SYMBOL(writeback_inodes_sb_if_idle);
+
+/**
  * sync_inodes_sb	-	sync sb inode pages
  * @sb: the superblock
  *
@@ -1221,7 +1089,20 @@
  */
 void sync_inodes_sb(struct super_block *sb)
 {
-	bdi_sync_writeback(sb->s_bdi, sb);
+	DECLARE_COMPLETION_ONSTACK(done);
+	struct wb_writeback_work work = {
+		.sb		= sb,
+		.sync_mode	= WB_SYNC_ALL,
+		.nr_pages	= LONG_MAX,
+		.range_cyclic	= 0,
+		.done		= &done,
+	};
+
+	WARN_ON(!rwsem_is_locked(&sb->s_umount));
+
+	bdi_queue_work(sb->s_bdi, &work);
+	wait_for_completion(&done);
+
 	wait_sb_inodes(sb);
 }
 EXPORT_SYMBOL(sync_inodes_sb);
--- linux-mvl-dove-2.6.32.orig/fs/aio.c
+++ linux-mvl-dove-2.6.32/fs/aio.c
@@ -497,7 +497,7 @@
 	ctx->reqs_active--;
 
 	if (unlikely(!ctx->reqs_active && ctx->dead))
-		wake_up(&ctx->wait);
+		wake_up_all(&ctx->wait);
 }
 
 static void aio_fput_routine(struct work_struct *data)
@@ -1219,7 +1219,7 @@
 	 * by other CPUs at this point.  Right now, we rely on the
 	 * locking done by the above calls to ensure this consistency.
 	 */
-	wake_up(&ioctx->wait);
+	wake_up_all(&ioctx->wait);
 	put_ioctx(ioctx);	/* once for the lookup */
 }
 
@@ -1639,6 +1639,9 @@
 	if (unlikely(nr < 0))
 		return -EINVAL;
 
+	if (unlikely(nr > LONG_MAX/sizeof(*iocbpp)))
+		nr = LONG_MAX/sizeof(*iocbpp);
+
 	if (unlikely(!access_ok(VERIFY_READ, iocbpp, (nr*sizeof(*iocbpp)))))
 		return -EFAULT;
 
--- linux-mvl-dove-2.6.32.orig/fs/file_table.c
+++ linux-mvl-dove-2.6.32/fs/file_table.c
@@ -121,13 +121,13 @@
 		goto fail;
 
 	percpu_counter_inc(&nr_files);
+	f->f_cred = get_cred(cred);
 	if (security_file_alloc(f))
 		goto fail_sec;
 
 	INIT_LIST_HEAD(&f->f_u.fu_list);
 	atomic_long_set(&f->f_count, 1);
 	rwlock_init(&f->f_owner.lock);
-	f->f_cred = get_cred(cred);
 	spin_lock_init(&f->f_lock);
 	eventpoll_init_file(f);
 	/* f->f_version: 0 */
@@ -420,7 +420,9 @@
 			continue;
 		if (!(f->f_mode & FMODE_WRITE))
 			continue;
+		spin_lock(&f->f_lock);
 		f->f_mode &= ~FMODE_WRITE;
+		spin_unlock(&f->f_lock);
 		if (file_check_writeable(f) != 0)
 			continue;
 		file_release_write(f);
--- linux-mvl-dove-2.6.32.orig/fs/stat.c
+++ linux-mvl-dove-2.6.32/fs/stat.c
@@ -401,9 +401,9 @@
 }
 #endif /* __ARCH_WANT_STAT64 */
 
-void inode_add_bytes(struct inode *inode, loff_t bytes)
+/* Caller is here responsible for sufficient locking (ie. inode->i_lock) */
+void __inode_add_bytes(struct inode *inode, loff_t bytes)
 {
-	spin_lock(&inode->i_lock);
 	inode->i_blocks += bytes >> 9;
 	bytes &= 511;
 	inode->i_bytes += bytes;
@@ -411,6 +411,12 @@
 		inode->i_blocks++;
 		inode->i_bytes -= 512;
 	}
+}
+
+void inode_add_bytes(struct inode *inode, loff_t bytes)
+{
+	spin_lock(&inode->i_lock);
+	__inode_add_bytes(inode, bytes);
 	spin_unlock(&inode->i_lock);
 }
 
--- linux-mvl-dove-2.6.32.orig/fs/char_dev.c
+++ linux-mvl-dove-2.6.32/fs/char_dev.c
@@ -39,7 +39,9 @@
 #endif
 		/* permit direct mmap, for read, write or exec */
 		BDI_CAP_MAP_DIRECT |
-		BDI_CAP_READ_MAP | BDI_CAP_WRITE_MAP | BDI_CAP_EXEC_MAP),
+		BDI_CAP_READ_MAP | BDI_CAP_WRITE_MAP | BDI_CAP_EXEC_MAP |
+		/* no writeback happens */
+		BDI_CAP_NO_ACCT_AND_WRITEBACK),
 };
 
 static struct kobj_map *cdev_map;
--- linux-mvl-dove-2.6.32.orig/fs/namei.c
+++ linux-mvl-dove-2.6.32/fs/namei.c
@@ -234,6 +234,7 @@
 	/*
 	 * Searching includes executable on directories, else just read.
 	 */
+	mask &= MAY_READ | MAY_WRITE | MAY_EXEC;
 	if (mask == MAY_READ || (S_ISDIR(inode->i_mode) && !(mask & MAY_WRITE)))
 		if (capable(CAP_DAC_READ_SEARCH))
 			return 0;
@@ -350,6 +351,7 @@
 
 	return 0;
 }
+EXPORT_SYMBOL(deny_write_access);
 
 /**
  * path_get - get a reference to a path
@@ -828,6 +830,17 @@
 }
 
 /*
+ * This is a temporary kludge to deal with "automount" symlinks; proper
+ * solution is to trigger them on follow_mount(), so that do_lookup()
+ * would DTRT.  To be killed before 2.6.34-final.
+ */
+static inline int follow_on_final(struct inode *inode, unsigned lookup_flags)
+{
+	return inode && unlikely(inode->i_op->follow_link) &&
+		((lookup_flags & LOOKUP_FOLLOW) || S_ISDIR(inode->i_mode));
+}
+
+/*
  * Name resolution.
  * This is the basic name resolution function, turning a pathname into
  * the final dentry. We expect 'base' to be positive and a directory.
@@ -963,8 +976,7 @@
 		if (err)
 			break;
 		inode = next.dentry->d_inode;
-		if ((lookup_flags & LOOKUP_FOLLOW)
-		    && inode && inode->i_op->follow_link) {
+		if (follow_on_final(inode, lookup_flags)) {
 			err = do_follow_link(&next, nd);
 			if (err)
 				goto return_err;
@@ -1219,7 +1231,7 @@
  * needs parent already locked. Doesn't follow mounts.
  * SMP-safe.
  */
-static struct dentry *lookup_hash(struct nameidata *nd)
+struct dentry *lookup_hash(struct nameidata *nd)
 {
 	int err;
 
@@ -1228,8 +1240,9 @@
 		return ERR_PTR(err);
 	return __lookup_hash(&nd->last, nd->path.dentry, nd);
 }
+EXPORT_SYMBOL(lookup_hash);
 
-static int __lookup_one_len(const char *name, struct qstr *this,
+int __lookup_one_len(const char *name, struct qstr *this,
 		struct dentry *base, int len)
 {
 	unsigned long hash;
@@ -1250,6 +1263,7 @@
 	this->hash = end_name_hash(hash);
 	return 0;
 }
+EXPORT_SYMBOL(__lookup_one_len);
 
 /**
  * lookup_one_len - filesystem helper to lookup single pathname component
--- linux-mvl-dove-2.6.32.orig/fs/namespace.c
+++ linux-mvl-dove-2.6.32/fs/namespace.c
@@ -39,6 +39,7 @@
 
 /* spinlock for vfsmount related operations, inplace of dcache_lock */
 __cacheline_aligned_in_smp DEFINE_SPINLOCK(vfsmount_lock);
+EXPORT_SYMBOL(vfsmount_lock);
 
 static int event;
 static DEFINE_IDA(mnt_id_ida);
@@ -1119,8 +1120,15 @@
 {
 	struct path path;
 	int retval;
+	int lookup_flags = 0;
 
-	retval = user_path(name, &path);
+	if (flags & ~(MNT_FORCE | MNT_DETACH | MNT_EXPIRE | UMOUNT_NOFOLLOW))
+		return -EINVAL;
+
+	if (!(flags & UMOUNT_NOFOLLOW))
+		lookup_flags |= LOOKUP_FOLLOW;
+
+	retval = user_path_at(AT_FDCWD, name, lookup_flags, &path);
 	if (retval)
 		goto out;
 	retval = -EINVAL;
--- linux-mvl-dove-2.6.32.orig/fs/block_dev.c
+++ linux-mvl-dove-2.6.32/fs/block_dev.c
@@ -246,7 +246,8 @@
 	if (!sb)
 		goto out;
 	if (sb->s_flags & MS_RDONLY) {
-		deactivate_locked_super(sb);
+		sb->s_frozen = SB_FREEZE_TRANS;
+		up_write(&sb->s_umount);
 		mutex_unlock(&bdev->bd_fsfreeze_mutex);
 		return sb;
 	}
@@ -307,7 +308,7 @@
 	BUG_ON(sb->s_bdev != bdev);
 	down_write(&sb->s_umount);
 	if (sb->s_flags & MS_RDONLY)
-		goto out_deactivate;
+		goto out_unfrozen;
 
 	if (sb->s_op->unfreeze_fs) {
 		error = sb->s_op->unfreeze_fs(sb);
@@ -321,11 +322,11 @@
 		}
 	}
 
+out_unfrozen:
 	sb->s_frozen = SB_UNFROZEN;
 	smp_wmb();
 	wake_up(&sb->s_wait_unfrozen);
 
-out_deactivate:
 	if (sb)
 		deactivate_locked_super(sb);
 out_unlock:
@@ -403,7 +404,7 @@
  *	NULL first argument is nfsd_sync_dir() and that's not a directory.
  */
  
-static int block_fsync(struct file *filp, struct dentry *dentry, int datasync)
+int block_fsync(struct file *filp, struct dentry *dentry, int datasync)
 {
 	return sync_blockdev(I_BDEV(filp->f_mapping->host));
 }
@@ -422,6 +423,7 @@
 		return NULL;
 	return &ei->vfs_inode;
 }
+EXPORT_SYMBOL(block_fsync);
 
 static void bdev_destroy_inode(struct inode *inode)
 {
@@ -1173,10 +1175,12 @@
 	/*
 	 * hooks: /n/, see "layering violations".
 	 */
-	ret = devcgroup_inode_permission(bdev->bd_inode, perm);
-	if (ret != 0) {
-		bdput(bdev);
-		return ret;
+	if (!for_part) {
+		ret = devcgroup_inode_permission(bdev->bd_inode, perm);
+		if (ret != 0) {
+			bdput(bdev);
+			return ret;
+		}
 	}
 
 	lock_kernel();
--- linux-mvl-dove-2.6.32.orig/fs/bio.c
+++ linux-mvl-dove-2.6.32/fs/bio.c
@@ -371,6 +371,9 @@
 {
 	struct bio *bio;
 
+	if (nr_iovecs > UIO_MAXIOV)
+		return NULL;
+
 	bio = kmalloc(sizeof(struct bio) + nr_iovecs * sizeof(struct bio_vec),
 		      gfp_mask);
 	if (unlikely(!bio))
@@ -542,13 +545,18 @@
 
 		if (page == prev->bv_page &&
 		    offset == prev->bv_offset + prev->bv_len) {
+			unsigned int prev_bv_len = prev->bv_len;
 			prev->bv_len += len;
 
 			if (q->merge_bvec_fn) {
 				struct bvec_merge_data bvm = {
+					/* prev_bvec is already charged in
+					   bi_size, discharge it in order to
+					   simulate merging updated prev_bvec
+					   as new bvec. */
 					.bi_bdev = bio->bi_bdev,
 					.bi_sector = bio->bi_sector,
-					.bi_size = bio->bi_size,
+					.bi_size = bio->bi_size - prev_bv_len,
 					.bi_rw = bio->bi_rw,
 				};
 
@@ -696,8 +704,12 @@
 static struct bio_map_data *bio_alloc_map_data(int nr_segs, int iov_count,
 					       gfp_t gfp_mask)
 {
-	struct bio_map_data *bmd = kmalloc(sizeof(*bmd), gfp_mask);
+	struct bio_map_data *bmd;
 
+	if (iov_count > UIO_MAXIOV)
+		return NULL;
+
+	bmd = kmalloc(sizeof(*bmd), gfp_mask);
 	if (!bmd)
 		return NULL;
 
@@ -826,6 +838,12 @@
 		end = (uaddr + iov[i].iov_len + PAGE_SIZE - 1) >> PAGE_SHIFT;
 		start = uaddr >> PAGE_SHIFT;
 
+		/*
+		 * Overflow, abort
+		 */
+		if (end < start)
+			return ERR_PTR(-EINVAL);
+
 		nr_pages += end - start;
 		len += iov[i].iov_len;
 	}
@@ -953,6 +971,12 @@
 		unsigned long end = (uaddr + len + PAGE_SIZE - 1) >> PAGE_SHIFT;
 		unsigned long start = uaddr >> PAGE_SHIFT;
 
+		/*
+		 * Overflow, abort
+		 */
+		if (end < start)
+			return ERR_PTR(-EINVAL);
+
 		nr_pages += end - start;
 		/*
 		 * buffer must be aligned to at least hardsector size for now
@@ -980,7 +1004,7 @@
 		unsigned long start = uaddr >> PAGE_SHIFT;
 		const int local_nr_pages = end - start;
 		const int page_limit = cur_page + local_nr_pages;
-		
+
 		ret = get_user_pages_fast(uaddr, local_nr_pages,
 				write_to_vm, &pages[cur_page]);
 		if (ret < local_nr_pages) {
--- linux-mvl-dove-2.6.32.orig/fs/bio-integrity.c
+++ linux-mvl-dove-2.6.32/fs/bio-integrity.c
@@ -61,7 +61,7 @@
 
 static inline int use_bip_pool(unsigned int idx)
 {
-	if (idx == BIOVEC_NR_POOLS)
+	if (idx == BIOVEC_MAX_IDX)
 		return 1;
 
 	return 0;
@@ -95,6 +95,7 @@
 
 	/* Use mempool if lower order alloc failed or max vecs were requested */
 	if (bip == NULL) {
+		idx = BIOVEC_MAX_IDX;  /* so we free the payload properly later */
 		bip = mempool_alloc(bs->bio_integrity_pool, gfp_mask);
 
 		if (unlikely(bip == NULL)) {
--- linux-mvl-dove-2.6.32.orig/fs/dcache.c
+++ linux-mvl-dove-2.6.32/fs/dcache.c
@@ -1175,9 +1175,12 @@
 	spin_unlock(&tmp->d_lock);
 
 	spin_unlock(&dcache_lock);
+	security_d_instantiate(tmp, inode);
 	return tmp;
 
  out_iput:
+	if (res && !IS_ERR(res))
+		security_d_instantiate(res, inode);
 	iput(inode);
 	return res;
 }
--- linux-mvl-dove-2.6.32.orig/fs/super.c
+++ linux-mvl-dove-2.6.32/fs/super.c
@@ -901,8 +901,9 @@
 			return error;
 		}
 		s->s_flags |= MS_ACTIVE;
+	} else {
+		do_remount_sb(s, flags, data, 0);
 	}
-	do_remount_sb(s, flags, data, 0);
 	simple_set_mnt(mnt, s);
 	return 0;
 }
--- linux-mvl-dove-2.6.32.orig/fs/open.c
+++ linux-mvl-dove-2.6.32/fs/open.c
@@ -31,6 +31,9 @@
 #include <linux/falloc.h>
 #include <linux/fs_struct.h>
 
+#define CREATE_TRACE_POINTS
+#include <trace/events/fs.h>
+
 int vfs_statfs(struct dentry *dentry, struct kstatfs *buf)
 {
 	int retval = -ENODEV;
@@ -223,6 +226,7 @@
 	mutex_unlock(&dentry->d_inode->i_mutex);
 	return ret;
 }
+EXPORT_SYMBOL(do_truncate);
 
 static long do_sys_truncate(const char __user *pathname, loff_t length)
 {
@@ -587,6 +591,9 @@
 	error = -EPERM;
 	if (!capable(CAP_SYS_CHROOT))
 		goto dput_and_out;
+	error = security_path_chroot(&path);
+	if (error)
+		goto dput_and_out;
 
 	set_fs_root(current->fs, &path);
 	error = 0;
@@ -617,11 +624,15 @@
 	if (err)
 		goto out_putf;
 	mutex_lock(&inode->i_mutex);
+	err = security_path_chmod(dentry, file->f_vfsmnt, mode);
+	if (err)
+		goto out_unlock;
 	if (mode == (mode_t) -1)
 		mode = inode->i_mode;
 	newattrs.ia_mode = (mode & S_IALLUGO) | (inode->i_mode & ~S_IALLUGO);
 	newattrs.ia_valid = ATTR_MODE | ATTR_CTIME;
 	err = notify_change(dentry, &newattrs);
+out_unlock:
 	mutex_unlock(&inode->i_mutex);
 	mnt_drop_write(file->f_path.mnt);
 out_putf:
@@ -646,11 +657,15 @@
 	if (error)
 		goto dput_and_out;
 	mutex_lock(&inode->i_mutex);
+	error = security_path_chmod(path.dentry, path.mnt, mode);
+	if (error)
+		goto out_unlock;
 	if (mode == (mode_t) -1)
 		mode = inode->i_mode;
 	newattrs.ia_mode = (mode & S_IALLUGO) | (inode->i_mode & ~S_IALLUGO);
 	newattrs.ia_valid = ATTR_MODE | ATTR_CTIME;
 	error = notify_change(path.dentry, &newattrs);
+out_unlock:
 	mutex_unlock(&inode->i_mutex);
 	mnt_drop_write(path.mnt);
 dput_and_out:
@@ -664,9 +679,9 @@
 	return sys_fchmodat(AT_FDCWD, filename, mode);
 }
 
-static int chown_common(struct dentry * dentry, uid_t user, gid_t group)
+static int chown_common(struct path *path, uid_t user, gid_t group)
 {
-	struct inode *inode = dentry->d_inode;
+	struct inode *inode = path->dentry->d_inode;
 	int error;
 	struct iattr newattrs;
 
@@ -683,7 +698,9 @@
 		newattrs.ia_valid |=
 			ATTR_KILL_SUID | ATTR_KILL_SGID | ATTR_KILL_PRIV;
 	mutex_lock(&inode->i_mutex);
-	error = notify_change(dentry, &newattrs);
+	error = security_path_chown(path, user, group);
+	if (!error)
+		error = notify_change(path->dentry, &newattrs);
 	mutex_unlock(&inode->i_mutex);
 
 	return error;
@@ -700,7 +717,7 @@
 	error = mnt_want_write(path.mnt);
 	if (error)
 		goto out_release;
-	error = chown_common(path.dentry, user, group);
+	error = chown_common(&path, user, group);
 	mnt_drop_write(path.mnt);
 out_release:
 	path_put(&path);
@@ -725,7 +742,7 @@
 	error = mnt_want_write(path.mnt);
 	if (error)
 		goto out_release;
-	error = chown_common(path.dentry, user, group);
+	error = chown_common(&path, user, group);
 	mnt_drop_write(path.mnt);
 out_release:
 	path_put(&path);
@@ -744,7 +761,7 @@
 	error = mnt_want_write(path.mnt);
 	if (error)
 		goto out_release;
-	error = chown_common(path.dentry, user, group);
+	error = chown_common(&path, user, group);
 	mnt_drop_write(path.mnt);
 out_release:
 	path_put(&path);
@@ -767,7 +784,7 @@
 		goto out_fput;
 	dentry = file->f_path.dentry;
 	audit_inode(NULL, dentry);
-	error = chown_common(dentry, user, group);
+	error = chown_common(&file->f_path, user, group);
 	mnt_drop_write(file->f_path.mnt);
 out_fput:
 	fput(file);
@@ -1043,6 +1060,7 @@
 			} else {
 				fsnotify_open(f->f_path.dentry);
 				fd_install(fd, f);
+				trace_do_sys_open(tmp, flags, mode);
 			}
 		}
 		putname(tmp);
--- linux-mvl-dove-2.6.32.orig/fs/signalfd.c
+++ linux-mvl-dove-2.6.32/fs/signalfd.c
@@ -87,6 +87,7 @@
 		 err |= __put_user(kinfo->si_tid, &uinfo->ssi_tid);
 		 err |= __put_user(kinfo->si_overrun, &uinfo->ssi_overrun);
 		 err |= __put_user((long) kinfo->si_ptr, &uinfo->ssi_ptr);
+		 err |= __put_user(kinfo->si_int, &uinfo->ssi_int);
 		break;
 	case __SI_POLL:
 		err |= __put_user(kinfo->si_band, &uinfo->ssi_band);
@@ -110,6 +111,7 @@
 		err |= __put_user(kinfo->si_pid, &uinfo->ssi_pid);
 		err |= __put_user(kinfo->si_uid, &uinfo->ssi_uid);
 		err |= __put_user((long) kinfo->si_ptr, &uinfo->ssi_ptr);
+		err |= __put_user(kinfo->si_int, &uinfo->ssi_int);
 		break;
 	default:
 		/*
--- linux-mvl-dove-2.6.32.orig/fs/binfmt_elf_fdpic.c
+++ linux-mvl-dove-2.6.32/fs/binfmt_elf_fdpic.c
@@ -171,6 +171,9 @@
 #ifdef ELF_FDPIC_PLAT_INIT
 	unsigned long dynaddr;
 #endif
+#ifndef CONFIG_MMU
+	unsigned long stack_prot;
+#endif
 	struct file *interpreter = NULL; /* to shut gcc up */
 	char *interpreter_name = NULL;
 	int executable_stack;
@@ -316,6 +319,11 @@
 	 * defunct, deceased, etc. after this point we have to exit via
 	 * error_kill */
 	set_personality(PER_LINUX_FDPIC);
+	if (elf_read_implies_exec(&exec_params.hdr, executable_stack))
+		current->personality |= READ_IMPLIES_EXEC;
+
+	setup_new_exec(bprm);
+
 	set_binfmt(&elf_fdpic_format);
 
 	current->mm->start_code = 0;
@@ -377,9 +385,13 @@
 	if (stack_size < PAGE_SIZE * 2)
 		stack_size = PAGE_SIZE * 2;
 
+	stack_prot = PROT_READ | PROT_WRITE;
+	if (executable_stack == EXSTACK_ENABLE_X ||
+	    (executable_stack == EXSTACK_DEFAULT && VM_STACK_FLAGS & VM_EXEC))
+		stack_prot |= PROT_EXEC;
+
 	down_write(&current->mm->mmap_sem);
-	current->mm->start_brk = do_mmap(NULL, 0, stack_size,
-					 PROT_READ | PROT_WRITE | PROT_EXEC,
+	current->mm->start_brk = do_mmap(NULL, 0, stack_size, stack_prot,
 					 MAP_PRIVATE | MAP_ANONYMOUS | MAP_GROWSDOWN,
 					 0);
 
--- linux-mvl-dove-2.6.32.orig/fs/compat.c
+++ linux-mvl-dove-2.6.32/fs/compat.c
@@ -1353,6 +1353,10 @@
 			argv++;
 			if (i++ >= max)
 				return -E2BIG;
+
+			if (fatal_signal_pending(current))
+				return -ERESTARTNOHAND;
+			cond_resched();
 		}
 	}
 	return i;
@@ -1394,6 +1398,12 @@
 		while (len > 0) {
 			int offset, bytes_to_copy;
 
+			if (fatal_signal_pending(current)) {
+				ret = -ERESTARTNOHAND;
+				goto out;
+			}
+			cond_resched();
+
 			offset = pos % PAGE_SIZE;
 			if (offset == 0)
 				offset = PAGE_SIZE;
@@ -1410,18 +1420,8 @@
 			if (!kmapped_page || kpos != (pos & PAGE_MASK)) {
 				struct page *page;
 
-#ifdef CONFIG_STACK_GROWSUP
-				ret = expand_stack_downwards(bprm->vma, pos);
-				if (ret < 0) {
-					/* We've exceed the stack rlimit. */
-					ret = -E2BIG;
-					goto out;
-				}
-#endif
-				ret = get_user_pages(current, bprm->mm, pos,
-						     1, 1, 1, &page, NULL);
-				if (ret <= 0) {
-					/* We've exceed the stack rlimit. */
+				page = get_arg_page(bprm, pos, 1);
+				if (!page) {
 					ret = -E2BIG;
 					goto out;
 				}
@@ -1532,8 +1532,6 @@
 	if (retval < 0)
 		goto out;
 
-	current->stack_start = current->mm->start_stack;
-
 	/* execve succeeded */
 	current->fs->in_exec = 0;
 	current->in_execve = 0;
@@ -1544,8 +1542,10 @@
 	return retval;
 
 out:
-	if (bprm->mm)
+	if (bprm->mm) {
+		acct_arg_size(bprm, 0);
 		mmput(bprm->mm);
+	}
 
 out_file:
 	if (bprm->file) {
--- linux-mvl-dove-2.6.32.orig/fs/exec.c
+++ linux-mvl-dove-2.6.32/fs/exec.c
@@ -57,6 +57,8 @@
 #include <linux/fs_struct.h>
 #include <linux/pipe_fs_i.h>
 
+#include <trace/events/fs.h>
+
 #include <asm/uaccess.h>
 #include <asm/mmu_context.h>
 #include <asm/tlb.h>
@@ -159,7 +161,22 @@
 
 #ifdef CONFIG_MMU
 
-static struct page *get_arg_page(struct linux_binprm *bprm, unsigned long pos,
+void acct_arg_size(struct linux_binprm *bprm, unsigned long pages)
+{
+	struct mm_struct *mm = current->mm;
+	long diff = (long)(pages - bprm->vma_pages);
+
+	if (!mm || !diff)
+		return;
+
+	bprm->vma_pages = pages;
+
+	down_write(&mm->mmap_sem);
+	mm->total_vm += diff;
+	up_write(&mm->mmap_sem);
+}
+
+struct page *get_arg_page(struct linux_binprm *bprm, unsigned long pos,
 		int write)
 {
 	struct page *page;
@@ -181,6 +198,8 @@
 		unsigned long size = bprm->vma->vm_end - bprm->vma->vm_start;
 		struct rlimit *rlim;
 
+		acct_arg_size(bprm, size / PAGE_SIZE);
+
 		/*
 		 * We've historically supported up to 32 pages (ARG_MAX)
 		 * of argument strings even with small stacks
@@ -247,6 +266,11 @@
 	vma->vm_start = vma->vm_end - PAGE_SIZE;
 	vma->vm_flags = VM_STACK_FLAGS;
 	vma->vm_page_prot = vm_get_page_prot(vma->vm_flags);
+
+	err = security_file_mmap(NULL, 0, 0, 0, vma->vm_start, 1);
+	if (err)
+		goto err;
+
 	err = insert_vm_struct(mm, vma);
 	if (err)
 		goto err;
@@ -269,7 +293,11 @@
 
 #else
 
-static struct page *get_arg_page(struct linux_binprm *bprm, unsigned long pos,
+void acct_arg_size(struct linux_binprm *bprm, unsigned long pages)
+{
+}
+
+struct page *get_arg_page(struct linux_binprm *bprm, unsigned long pos,
 		int write)
 {
 	struct page *page;
@@ -376,6 +404,9 @@
 			argv++;
 			if (i++ >= max)
 				return -E2BIG;
+
+			if (fatal_signal_pending(current))
+				return -ERESTARTNOHAND;
 			cond_resched();
 		}
 	}
@@ -419,6 +450,12 @@
 		while (len > 0) {
 			int offset, bytes_to_copy;
 
+			if (fatal_signal_pending(current)) {
+				ret = -ERESTARTNOHAND;
+				goto out;
+			}
+			cond_resched();
+
 			offset = pos % PAGE_SIZE;
 			if (offset == 0)
 				offset = PAGE_SIZE;
@@ -572,6 +609,9 @@
 	struct vm_area_struct *prev = NULL;
 	unsigned long vm_flags;
 	unsigned long stack_base;
+	unsigned long stack_size;
+	unsigned long stack_expand;
+	unsigned long rlim_stack;
 
 #ifdef CONFIG_STACK_GROWSUP
 	/* Limit stack size to 1GB */
@@ -591,6 +631,11 @@
 #else
 	stack_top = arch_align_stack(stack_top);
 	stack_top = PAGE_ALIGN(stack_top);
+
+	if (unlikely(stack_top < mmap_min_addr) ||
+	    unlikely(vma->vm_end - vma->vm_start >= stack_top - mmap_min_addr))
+		return -ENOMEM;
+
 	stack_shift = vma->vm_end - stack_top;
 
 	bprm->p -= stack_shift;
@@ -628,10 +673,23 @@
 			goto out_unlock;
 	}
 
+	stack_expand = EXTRA_STACK_VM_PAGES * PAGE_SIZE;
+	stack_size = vma->vm_end - vma->vm_start;
+	/*
+	 * Align this down to a page boundary as expand_stack
+	 * will align it up.
+	 */
+	rlim_stack = rlimit(RLIMIT_STACK) & PAGE_MASK;
 #ifdef CONFIG_STACK_GROWSUP
-	stack_base = vma->vm_end + EXTRA_STACK_VM_PAGES * PAGE_SIZE;
+	if (stack_size + stack_expand > rlim_stack)
+		stack_base = vma->vm_start + rlim_stack;
+	else
+		stack_base = vma->vm_end + stack_expand;
 #else
-	stack_base = vma->vm_start - EXTRA_STACK_VM_PAGES * PAGE_SIZE;
+	if (stack_size + stack_expand > rlim_stack)
+		stack_base = vma->vm_end - rlim_stack;
+	else
+		stack_base = vma->vm_start - stack_expand;
 #endif
 	ret = expand_stack(vma, stack_base);
 	if (ret)
@@ -665,6 +723,8 @@
 
 	fsnotify_open(file->f_path.dentry);
 
+	trace_open_exec(name);
+
 	err = deny_write_access(file);
 	if (err)
 		goto exit;
@@ -931,9 +991,7 @@
 
 int flush_old_exec(struct linux_binprm * bprm)
 {
-	char * name;
-	int i, ch, retval;
-	char tcomm[sizeof(current->comm)];
+	int retval;
 
 	/*
 	 * Make sure we have a private signal table and that
@@ -948,12 +1006,33 @@
 	/*
 	 * Release all of the old mmap stuff
 	 */
+	acct_arg_size(bprm, 0);
 	retval = exec_mmap(bprm->mm);
 	if (retval)
 		goto out;
 
 	bprm->mm = NULL;		/* We're using it now */
 
+	set_fs(USER_DS);
+	current->flags &= ~PF_RANDOMIZE;
+	flush_thread();
+	current->personality &= ~bprm->per_clear;
+
+	return 0;
+
+out:
+	return retval;
+}
+EXPORT_SYMBOL(flush_old_exec);
+
+void setup_new_exec(struct linux_binprm * bprm)
+{
+	int i, ch;
+	char * name;
+	char tcomm[sizeof(current->comm)];
+
+	arch_pick_mmap_layout(current->mm);
+
 	/* This is the point of no return */
 	current->sas_ss_sp = current->sas_ss_size = 0;
 
@@ -975,9 +1054,6 @@
 	tcomm[i] = '\0';
 	set_task_comm(current, tcomm);
 
-	current->flags &= ~PF_RANDOMIZE;
-	flush_thread();
-
 	/* Set the new mm task size. We have to do that late because it may
 	 * depend on TIF_32BIT which is only updated in flush_thread() on
 	 * some architectures like powerpc
@@ -993,8 +1069,6 @@
 		set_dumpable(current->mm, suid_dumpable);
 	}
 
-	current->personality &= ~bprm->per_clear;
-
 	/*
 	 * Flush performance counters when crossing a
 	 * security domain:
@@ -1009,14 +1083,8 @@
 			
 	flush_signal_handlers(current, 0);
 	flush_old_files(current->files);
-
-	return 0;
-
-out:
-	return retval;
 }
-
-EXPORT_SYMBOL(flush_old_exec);
+EXPORT_SYMBOL(setup_new_exec);
 
 /*
  * Prepare credentials and lock ->cred_guard_mutex.
@@ -1213,10 +1281,6 @@
 	if (retval)
 		return retval;
 
-	/* kernel module loader fixup */
-	/* so we don't try to load run modprobe in kernel space. */
-	set_fs(USER_DS);
-
 	retval = audit_bprm(bprm);
 	if (retval)
 		return retval;
@@ -1357,8 +1421,6 @@
 	if (retval < 0)
 		goto out;
 
-	current->stack_start = current->mm->start_stack;
-
 	/* execve succeeded */
 	current->fs->in_exec = 0;
 	current->in_execve = 0;
@@ -1369,8 +1431,10 @@
 	return retval;
 
 out:
-	if (bprm->mm)
-		mmput (bprm->mm);
+	if (bprm->mm) {
+		acct_arg_size(bprm, 0);
+		mmput(bprm->mm);
+	}
 
 out_file:
 	if (bprm->file) {
@@ -1826,15 +1890,15 @@
 		goto fail_unlock;
 
  	if (ispipe) {
-		if (core_limit == 0) {
+		if (core_limit == 1) {
 			/*
 			 * Normally core limits are irrelevant to pipes, since
 			 * we're not writing to the file system, but we use
-			 * core_limit of 0 here as a speacial value. Any
+			 * core_limit of 1 here as a special value. Any
 			 * non-zero limit gets set to RLIM_INFINITY below, but
 			 * a limit of 0 skips the dump.  This is a consistent
 			 * way to catch recursive crashes.  We can still crash
-			 * if the core_pattern binary sets RLIM_CORE =  !0
+			 * if the core_pattern binary sets RLIM_CORE =  !1
 			 * but it runs as root, and can do lots of stupid things
 			 * Note that we use task_tgid_vnr here to grab the pid
 			 * of the process group leader.  That way we get the
@@ -1842,7 +1906,7 @@
 			 * core_pattern process dies.
 			 */
 			printk(KERN_WARNING
-				"Process %d(%s) has RLIMIT_CORE set to 0\n",
+				"Process %d(%s) has RLIMIT_CORE set to 1\n",
 				task_tgid_vnr(current), current->comm);
 			printk(KERN_WARNING "Aborting core\n");
 			goto fail_unlock;
@@ -1891,8 +1955,9 @@
 	/*
 	 * Dont allow local users get cute and trick others to coredump
 	 * into their pre-created files:
+	 * Note, this is not relevant for pipes
 	 */
-	if (inode->i_uid != current_fsuid())
+	if (!ispipe && (inode->i_uid != current_fsuid()))
 		goto close_fail;
 	if (!file->f_op)
 		goto close_fail;
--- linux-mvl-dove-2.6.32.orig/fs/libfs.c
+++ linux-mvl-dove-2.6.32/fs/libfs.c
@@ -415,7 +415,8 @@
  * unique inode values later for this filesystem, then you must take care
  * to pass it an appropriate max_reserved value to avoid collisions.
  */
-int simple_fill_super(struct super_block *s, int magic, struct tree_descr *files)
+int simple_fill_super(struct super_block *s, unsigned long magic,
+		      struct tree_descr *files)
 {
 	struct inode *inode;
 	struct dentry *root;
--- linux-mvl-dove-2.6.32.orig/fs/splice.c
+++ linux-mvl-dove-2.6.32/fs/splice.c
@@ -365,17 +365,7 @@
 		 * If the page isn't uptodate, we may need to start io on it
 		 */
 		if (!PageUptodate(page)) {
-			/*
-			 * If in nonblock mode then dont block on waiting
-			 * for an in-flight io page
-			 */
-			if (flags & SPLICE_F_NONBLOCK) {
-				if (!trylock_page(page)) {
-					error = -EAGAIN;
-					break;
-				}
-			} else
-				lock_page(page);
+			lock_page(page);
 
 			/*
 			 * Page was truncated, or invalidated by the
@@ -648,9 +638,11 @@
 	ret = buf->ops->confirm(pipe, buf);
 	if (!ret) {
 		more = (sd->flags & SPLICE_F_MORE) || sd->len < sd->total_len;
-
-		ret = file->f_op->sendpage(file, buf->page, buf->offset,
-					   sd->len, &pos, more);
+		if (file->f_op && file->f_op->sendpage)
+			ret = file->f_op->sendpage(file, buf->page, buf->offset,
+						   sd->len, &pos, more);
+		else
+			ret = -EINVAL;
 	}
 
 	return ret;
@@ -1051,8 +1043,8 @@
 /*
  * Attempt to initiate a splice from pipe to file.
  */
-static long do_splice_from(struct pipe_inode_info *pipe, struct file *out,
-			   loff_t *ppos, size_t len, unsigned int flags)
+long do_splice_from(struct pipe_inode_info *pipe, struct file *out,
+		    loff_t *ppos, size_t len, unsigned int flags)
 {
 	ssize_t (*splice_write)(struct pipe_inode_info *, struct file *,
 				loff_t *, size_t, unsigned int);
@@ -1068,19 +1060,21 @@
 	if (unlikely(ret < 0))
 		return ret;
 
-	splice_write = out->f_op->splice_write;
-	if (!splice_write)
+	if (out->f_op && out->f_op->splice_write)
+		splice_write = out->f_op->splice_write;
+	else
 		splice_write = default_file_splice_write;
 
 	return splice_write(pipe, out, ppos, len, flags);
 }
+EXPORT_SYMBOL(do_splice_from);
 
 /*
  * Attempt to initiate a splice from a file to a pipe.
  */
-static long do_splice_to(struct file *in, loff_t *ppos,
-			 struct pipe_inode_info *pipe, size_t len,
-			 unsigned int flags)
+long do_splice_to(struct file *in, loff_t *ppos,
+		  struct pipe_inode_info *pipe, size_t len,
+		  unsigned int flags)
 {
 	ssize_t (*splice_read)(struct file *, loff_t *,
 			       struct pipe_inode_info *, size_t, unsigned int);
@@ -1093,12 +1087,14 @@
 	if (unlikely(ret < 0))
 		return ret;
 
-	splice_read = in->f_op->splice_read;
-	if (!splice_read)
+	if (in->f_op && in->f_op->splice_read)
+		splice_read = in->f_op->splice_read;
+	else
 		splice_read = default_file_splice_read;
 
 	return splice_read(in, ppos, pipe, len, flags);
 }
+EXPORT_SYMBOL(do_splice_to);
 
 /**
  * splice_direct_to_actor - splices data directly between two non-pipes
@@ -1227,7 +1223,8 @@
 {
 	struct file *file = sd->u.file;
 
-	return do_splice_from(pipe, file, &sd->pos, sd->total_len, sd->flags);
+	return do_splice_from(pipe, file, &file->f_pos, sd->total_len,
+			      sd->flags);
 }
 
 /**
@@ -1316,7 +1313,8 @@
 		if (off_in)
 			return -ESPIPE;
 		if (off_out) {
-			if (out->f_op->llseek == no_llseek)
+			if (!out->f_op || !out->f_op->llseek ||
+			    out->f_op->llseek == no_llseek)
 				return -EINVAL;
 			if (copy_from_user(&offset, off_out, sizeof(loff_t)))
 				return -EFAULT;
@@ -1336,7 +1334,8 @@
 		if (off_out)
 			return -ESPIPE;
 		if (off_in) {
-			if (in->f_op->llseek == no_llseek)
+			if (!in->f_op || !in->f_op->llseek ||
+			    in->f_op->llseek == no_llseek)
 				return -EINVAL;
 			if (copy_from_user(&offset, off_in, sizeof(loff_t)))
 				return -EFAULT;
--- linux-mvl-dove-2.6.32.orig/fs/binfmt_som.c
+++ linux-mvl-dove-2.6.32/fs/binfmt_som.c
@@ -227,6 +227,7 @@
 	/* OK, This is the point of no return */
 	current->flags &= ~PF_FORKNOEXEC;
 	current->personality = PER_HPUX;
+	setup_new_exec(bprm);
 
 	/* Set the task size for HP-UX processes such that
 	 * the gateway page is outside the address space.
--- linux-mvl-dove-2.6.32.orig/fs/dcookies.c
+++ linux-mvl-dove-2.6.32/fs/dcookies.c
@@ -178,6 +178,8 @@
 	/* FIXME: (deleted) ? */
 	path = d_path(&dcs->path, kbuf, PAGE_SIZE);
 
+	mutex_unlock(&dcookie_mutex);
+
 	if (IS_ERR(path)) {
 		err = PTR_ERR(path);
 		goto out_free;
@@ -194,6 +196,7 @@
 
 out_free:
 	kfree(kbuf);
+	return err;
 out:
 	mutex_unlock(&dcookie_mutex);
 	return err;
--- linux-mvl-dove-2.6.32.orig/fs/dlm/rcom.c
+++ linux-mvl-dove-2.6.32/fs/dlm/rcom.c
@@ -38,7 +38,7 @@
 	char *mb;
 	int mb_len = sizeof(struct dlm_rcom) + len;
 
-	mh = dlm_lowcomms_get_buffer(to_nodeid, mb_len, ls->ls_allocation, &mb);
+	mh = dlm_lowcomms_get_buffer(to_nodeid, mb_len, GFP_NOFS, &mb);
 	if (!mh) {
 		log_print("create_rcom to %d type %d len %d ENOBUFS",
 			  to_nodeid, type, len);
--- linux-mvl-dove-2.6.32.orig/fs/dlm/lock.c
+++ linux-mvl-dove-2.6.32/fs/dlm/lock.c
@@ -1,7 +1,7 @@
 /******************************************************************************
 *******************************************************************************
 **
-**  Copyright (C) 2005-2008 Red Hat, Inc.  All rights reserved.
+**  Copyright (C) 2005-2010 Red Hat, Inc.  All rights reserved.
 **
 **  This copyrighted material is made available to anyone wishing to use,
 **  modify, copy, or redistribute it subject to the terms and conditions
@@ -307,7 +307,7 @@
 	lkb->lkb_lksb->sb_status = rv;
 	lkb->lkb_lksb->sb_flags = lkb->lkb_sbflags;
 
-	dlm_add_ast(lkb, AST_COMP, 0);
+	dlm_add_ast(lkb, AST_COMP, lkb->lkb_grmode);
 }
 
 static inline void queue_cast_overlap(struct dlm_rsb *r, struct dlm_lkb *lkb)
@@ -2280,20 +2280,30 @@
 	if (can_be_queued(lkb)) {
 		error = -EINPROGRESS;
 		add_lkb(r, lkb, DLM_LKSTS_WAITING);
-		send_blocking_asts(r, lkb);
 		add_timeout(lkb);
 		goto out;
 	}
 
 	error = -EAGAIN;
-	if (force_blocking_asts(lkb))
-		send_blocking_asts_all(r, lkb);
 	queue_cast(r, lkb, -EAGAIN);
-
  out:
 	return error;
 }
 
+static void do_request_effects(struct dlm_rsb *r, struct dlm_lkb *lkb,
+			       int error)
+{
+	switch (error) {
+	case -EAGAIN:
+		if (force_blocking_asts(lkb))
+			send_blocking_asts_all(r, lkb);
+		break;
+	case -EINPROGRESS:
+		send_blocking_asts(r, lkb);
+		break;
+	}
+}
+
 static int do_convert(struct dlm_rsb *r, struct dlm_lkb *lkb)
 {
 	int error = 0;
@@ -2304,7 +2314,6 @@
 	if (can_be_granted(r, lkb, 1, &deadlk)) {
 		grant_lock(r, lkb);
 		queue_cast(r, lkb, 0);
-		grant_pending_locks(r);
 		goto out;
 	}
 
@@ -2334,7 +2343,6 @@
 		if (_can_be_granted(r, lkb, 1)) {
 			grant_lock(r, lkb);
 			queue_cast(r, lkb, 0);
-			grant_pending_locks(r);
 			goto out;
 		}
 		/* else fall through and move to convert queue */
@@ -2344,28 +2352,47 @@
 		error = -EINPROGRESS;
 		del_lkb(r, lkb);
 		add_lkb(r, lkb, DLM_LKSTS_CONVERT);
-		send_blocking_asts(r, lkb);
 		add_timeout(lkb);
 		goto out;
 	}
 
 	error = -EAGAIN;
-	if (force_blocking_asts(lkb))
-		send_blocking_asts_all(r, lkb);
 	queue_cast(r, lkb, -EAGAIN);
-
  out:
 	return error;
 }
 
+static void do_convert_effects(struct dlm_rsb *r, struct dlm_lkb *lkb,
+			       int error)
+{
+	switch (error) {
+	case 0:
+		grant_pending_locks(r);
+		/* grant_pending_locks also sends basts */
+		break;
+	case -EAGAIN:
+		if (force_blocking_asts(lkb))
+			send_blocking_asts_all(r, lkb);
+		break;
+	case -EINPROGRESS:
+		send_blocking_asts(r, lkb);
+		break;
+	}
+}
+
 static int do_unlock(struct dlm_rsb *r, struct dlm_lkb *lkb)
 {
 	remove_lock(r, lkb);
 	queue_cast(r, lkb, -DLM_EUNLOCK);
-	grant_pending_locks(r);
 	return -DLM_EUNLOCK;
 }
 
+static void do_unlock_effects(struct dlm_rsb *r, struct dlm_lkb *lkb,
+			      int error)
+{
+	grant_pending_locks(r);
+}
+
 /* returns: 0 did nothing, -DLM_ECANCEL canceled lock */
  
 static int do_cancel(struct dlm_rsb *r, struct dlm_lkb *lkb)
@@ -2375,12 +2402,18 @@
 	error = revert_lock(r, lkb);
 	if (error) {
 		queue_cast(r, lkb, -DLM_ECANCEL);
-		grant_pending_locks(r);
 		return -DLM_ECANCEL;
 	}
 	return 0;
 }
 
+static void do_cancel_effects(struct dlm_rsb *r, struct dlm_lkb *lkb,
+			      int error)
+{
+	if (error)
+		grant_pending_locks(r);
+}
+
 /*
  * Four stage 3 varieties:
  * _request_lock(), _convert_lock(), _unlock_lock(), _cancel_lock()
@@ -2402,11 +2435,15 @@
 		goto out;
 	}
 
-	if (is_remote(r))
+	if (is_remote(r)) {
 		/* receive_request() calls do_request() on remote node */
 		error = send_request(r, lkb);
-	else
+	} else {
 		error = do_request(r, lkb);
+		/* for remote locks the request_reply is sent
+		   between do_request and do_request_effects */
+		do_request_effects(r, lkb, error);
+	}
  out:
 	return error;
 }
@@ -2417,11 +2454,15 @@
 {
 	int error;
 
-	if (is_remote(r))
+	if (is_remote(r)) {
 		/* receive_convert() calls do_convert() on remote node */
 		error = send_convert(r, lkb);
-	else
+	} else {
 		error = do_convert(r, lkb);
+		/* for remote locks the convert_reply is sent
+		   between do_convert and do_convert_effects */
+		do_convert_effects(r, lkb, error);
+	}
 
 	return error;
 }
@@ -2432,11 +2473,15 @@
 {
 	int error;
 
-	if (is_remote(r))
+	if (is_remote(r)) {
 		/* receive_unlock() calls do_unlock() on remote node */
 		error = send_unlock(r, lkb);
-	else
+	} else {
 		error = do_unlock(r, lkb);
+		/* for remote locks the unlock_reply is sent
+		   between do_unlock and do_unlock_effects */
+		do_unlock_effects(r, lkb, error);
+	}
 
 	return error;
 }
@@ -2447,11 +2492,15 @@
 {
 	int error;
 
-	if (is_remote(r))
+	if (is_remote(r)) {
 		/* receive_cancel() calls do_cancel() on remote node */
 		error = send_cancel(r, lkb);
-	else
+	} else {
 		error = do_cancel(r, lkb);
+		/* for remote locks the cancel_reply is sent
+		   between do_cancel and do_cancel_effects */
+		do_cancel_effects(r, lkb, error);
+	}
 
 	return error;
 }
@@ -2689,7 +2738,7 @@
 	   pass into lowcomms_commit and a message buffer (mb) that we
 	   write our data into */
 
-	mh = dlm_lowcomms_get_buffer(to_nodeid, mb_len, ls->ls_allocation, &mb);
+	mh = dlm_lowcomms_get_buffer(to_nodeid, mb_len, GFP_NOFS, &mb);
 	if (!mh)
 		return -ENOBUFS;
 
@@ -3191,6 +3240,7 @@
 	attach_lkb(r, lkb);
 	error = do_request(r, lkb);
 	send_request_reply(r, lkb, error);
+	do_request_effects(r, lkb, error);
 
 	unlock_rsb(r);
 	put_rsb(r);
@@ -3226,15 +3276,19 @@
 		goto out;
 
 	receive_flags(lkb, ms);
+
 	error = receive_convert_args(ls, lkb, ms);
-	if (error)
-		goto out_reply;
+	if (error) {
+		send_convert_reply(r, lkb, error);
+		goto out;
+	}
+
 	reply = !down_conversion(lkb);
 
 	error = do_convert(r, lkb);
- out_reply:
 	if (reply)
 		send_convert_reply(r, lkb, error);
+	do_convert_effects(r, lkb, error);
  out:
 	unlock_rsb(r);
 	put_rsb(r);
@@ -3266,13 +3320,16 @@
 		goto out;
 
 	receive_flags(lkb, ms);
+
 	error = receive_unlock_args(ls, lkb, ms);
-	if (error)
-		goto out_reply;
+	if (error) {
+		send_unlock_reply(r, lkb, error);
+		goto out;
+	}
 
 	error = do_unlock(r, lkb);
- out_reply:
 	send_unlock_reply(r, lkb, error);
+	do_unlock_effects(r, lkb, error);
  out:
 	unlock_rsb(r);
 	put_rsb(r);
@@ -3307,6 +3364,7 @@
 
 	error = do_cancel(r, lkb);
 	send_cancel_reply(r, lkb, error);
+	do_cancel_effects(r, lkb, error);
  out:
 	unlock_rsb(r);
 	put_rsb(r);
@@ -4512,7 +4570,7 @@
 	}
 
 	if (flags & DLM_LKF_VALBLK) {
-		ua->lksb.sb_lvbptr = kzalloc(DLM_USER_LVB_LEN, GFP_KERNEL);
+		ua->lksb.sb_lvbptr = kzalloc(DLM_USER_LVB_LEN, GFP_NOFS);
 		if (!ua->lksb.sb_lvbptr) {
 			kfree(ua);
 			__put_lkb(ls, lkb);
@@ -4582,7 +4640,7 @@
 	ua = lkb->lkb_ua;
 
 	if (flags & DLM_LKF_VALBLK && !ua->lksb.sb_lvbptr) {
-		ua->lksb.sb_lvbptr = kzalloc(DLM_USER_LVB_LEN, GFP_KERNEL);
+		ua->lksb.sb_lvbptr = kzalloc(DLM_USER_LVB_LEN, GFP_NOFS);
 		if (!ua->lksb.sb_lvbptr) {
 			error = -ENOMEM;
 			goto out_put;
--- linux-mvl-dove-2.6.32.orig/fs/dlm/lockspace.c
+++ linux-mvl-dove-2.6.32/fs/dlm/lockspace.c
@@ -430,7 +430,7 @@
 
 	error = -ENOMEM;
 
-	ls = kzalloc(sizeof(struct dlm_ls) + namelen, GFP_KERNEL);
+	ls = kzalloc(sizeof(struct dlm_ls) + namelen, GFP_NOFS);
 	if (!ls)
 		goto out;
 	memcpy(ls->ls_name, name, namelen);
@@ -443,11 +443,6 @@
 	if (flags & DLM_LSFL_TIMEWARN)
 		set_bit(LSFL_TIMEWARN, &ls->ls_flags);
 
-	if (flags & DLM_LSFL_FS)
-		ls->ls_allocation = GFP_NOFS;
-	else
-		ls->ls_allocation = GFP_KERNEL;
-
 	/* ls_exflags are forced to match among nodes, and we don't
 	   need to require all nodes to have some flags set */
 	ls->ls_exflags = (flags & ~(DLM_LSFL_TIMEWARN | DLM_LSFL_FS |
@@ -456,7 +451,7 @@
 	size = dlm_config.ci_rsbtbl_size;
 	ls->ls_rsbtbl_size = size;
 
-	ls->ls_rsbtbl = kmalloc(sizeof(struct dlm_rsbtable) * size, GFP_KERNEL);
+	ls->ls_rsbtbl = kmalloc(sizeof(struct dlm_rsbtable) * size, GFP_NOFS);
 	if (!ls->ls_rsbtbl)
 		goto out_lsfree;
 	for (i = 0; i < size; i++) {
@@ -468,7 +463,7 @@
 	size = dlm_config.ci_lkbtbl_size;
 	ls->ls_lkbtbl_size = size;
 
-	ls->ls_lkbtbl = kmalloc(sizeof(struct dlm_lkbtable) * size, GFP_KERNEL);
+	ls->ls_lkbtbl = kmalloc(sizeof(struct dlm_lkbtable) * size, GFP_NOFS);
 	if (!ls->ls_lkbtbl)
 		goto out_rsbfree;
 	for (i = 0; i < size; i++) {
@@ -480,7 +475,7 @@
 	size = dlm_config.ci_dirtbl_size;
 	ls->ls_dirtbl_size = size;
 
-	ls->ls_dirtbl = kmalloc(sizeof(struct dlm_dirtable) * size, GFP_KERNEL);
+	ls->ls_dirtbl = kmalloc(sizeof(struct dlm_dirtable) * size, GFP_NOFS);
 	if (!ls->ls_dirtbl)
 		goto out_lkbfree;
 	for (i = 0; i < size; i++) {
@@ -527,7 +522,7 @@
 	mutex_init(&ls->ls_requestqueue_mutex);
 	mutex_init(&ls->ls_clear_proc_locks);
 
-	ls->ls_recover_buf = kmalloc(dlm_config.ci_buffer_size, GFP_KERNEL);
+	ls->ls_recover_buf = kmalloc(dlm_config.ci_buffer_size, GFP_NOFS);
 	if (!ls->ls_recover_buf)
 		goto out_dirfree;
 
--- linux-mvl-dove-2.6.32.orig/fs/dlm/ast.h
+++ linux-mvl-dove-2.6.32/fs/dlm/ast.h
@@ -1,7 +1,7 @@
 /******************************************************************************
 *******************************************************************************
 **
-**  Copyright (C) 2005-2008 Red Hat, Inc.  All rights reserved.
+**  Copyright (C) 2005-2010 Red Hat, Inc.  All rights reserved.
 **
 **  This copyrighted material is made available to anyone wishing to use,
 **  modify, copy, or redistribute it subject to the terms and conditions
@@ -13,7 +13,7 @@
 #ifndef __ASTD_DOT_H__
 #define __ASTD_DOT_H__
 
-void dlm_add_ast(struct dlm_lkb *lkb, int type, int bastmode);
+void dlm_add_ast(struct dlm_lkb *lkb, int type, int mode);
 void dlm_del_ast(struct dlm_lkb *lkb);
 
 void dlm_astd_wake(void);
--- linux-mvl-dove-2.6.32.orig/fs/dlm/config.c
+++ linux-mvl-dove-2.6.32/fs/dlm/config.c
@@ -410,10 +410,10 @@
 	struct dlm_comms *cms = NULL;
 	void *gps = NULL;
 
-	cl = kzalloc(sizeof(struct dlm_cluster), GFP_KERNEL);
-	gps = kcalloc(3, sizeof(struct config_group *), GFP_KERNEL);
-	sps = kzalloc(sizeof(struct dlm_spaces), GFP_KERNEL);
-	cms = kzalloc(sizeof(struct dlm_comms), GFP_KERNEL);
+	cl = kzalloc(sizeof(struct dlm_cluster), GFP_NOFS);
+	gps = kcalloc(3, sizeof(struct config_group *), GFP_NOFS);
+	sps = kzalloc(sizeof(struct dlm_spaces), GFP_NOFS);
+	cms = kzalloc(sizeof(struct dlm_comms), GFP_NOFS);
 
 	if (!cl || !gps || !sps || !cms)
 		goto fail;
@@ -482,9 +482,9 @@
 	struct dlm_nodes *nds = NULL;
 	void *gps = NULL;
 
-	sp = kzalloc(sizeof(struct dlm_space), GFP_KERNEL);
-	gps = kcalloc(2, sizeof(struct config_group *), GFP_KERNEL);
-	nds = kzalloc(sizeof(struct dlm_nodes), GFP_KERNEL);
+	sp = kzalloc(sizeof(struct dlm_space), GFP_NOFS);
+	gps = kcalloc(2, sizeof(struct config_group *), GFP_NOFS);
+	nds = kzalloc(sizeof(struct dlm_nodes), GFP_NOFS);
 
 	if (!sp || !gps || !nds)
 		goto fail;
@@ -536,7 +536,7 @@
 {
 	struct dlm_comm *cm;
 
-	cm = kzalloc(sizeof(struct dlm_comm), GFP_KERNEL);
+	cm = kzalloc(sizeof(struct dlm_comm), GFP_NOFS);
 	if (!cm)
 		return ERR_PTR(-ENOMEM);
 
@@ -569,7 +569,7 @@
 	struct dlm_space *sp = config_item_to_space(g->cg_item.ci_parent);
 	struct dlm_node *nd;
 
-	nd = kzalloc(sizeof(struct dlm_node), GFP_KERNEL);
+	nd = kzalloc(sizeof(struct dlm_node), GFP_NOFS);
 	if (!nd)
 		return ERR_PTR(-ENOMEM);
 
@@ -705,7 +705,7 @@
 	if (cm->addr_count >= DLM_MAX_ADDR_COUNT)
 		return -ENOSPC;
 
-	addr = kzalloc(sizeof(*addr), GFP_KERNEL);
+	addr = kzalloc(sizeof(*addr), GFP_NOFS);
 	if (!addr)
 		return -ENOMEM;
 
@@ -868,7 +868,7 @@
 
 	ids_count = sp->members_count;
 
-	ids = kcalloc(ids_count, sizeof(int), GFP_KERNEL);
+	ids = kcalloc(ids_count, sizeof(int), GFP_NOFS);
 	if (!ids) {
 		rv = -ENOMEM;
 		goto out;
@@ -886,7 +886,7 @@
 	if (!new_count)
 		goto out_ids;
 
-	new = kcalloc(new_count, sizeof(int), GFP_KERNEL);
+	new = kcalloc(new_count, sizeof(int), GFP_NOFS);
 	if (!new) {
 		kfree(ids);
 		rv = -ENOMEM;
--- linux-mvl-dove-2.6.32.orig/fs/dlm/dlm_internal.h
+++ linux-mvl-dove-2.6.32/fs/dlm/dlm_internal.h
@@ -2,7 +2,7 @@
 *******************************************************************************
 **
 **  Copyright (C) Sistina Software, Inc.  1997-2003  All rights reserved.
-**  Copyright (C) 2004-2008 Red Hat, Inc.  All rights reserved.
+**  Copyright (C) 2004-2010 Red Hat, Inc.  All rights reserved.
 **
 **  This copyrighted material is made available to anyone wishing to use,
 **  modify, copy, or redistribute it subject to the terms and conditions
@@ -232,11 +232,17 @@
 	int8_t			lkb_status;     /* granted, waiting, convert */
 	int8_t			lkb_rqmode;	/* requested lock mode */
 	int8_t			lkb_grmode;	/* granted lock mode */
-	int8_t			lkb_bastmode;	/* requested mode */
 	int8_t			lkb_highbast;	/* highest mode bast sent for */
+
 	int8_t			lkb_wait_type;	/* type of reply waiting for */
 	int8_t			lkb_wait_count;
 	int8_t			lkb_ast_type;	/* type of ast queued for */
+	int8_t			lkb_ast_first;	/* type of first ast queued */
+
+	int8_t			lkb_bastmode;	/* req mode of queued bast */
+	int8_t			lkb_castmode;	/* gr mode of queued cast */
+	int8_t			lkb_bastmode_done; /* last delivered bastmode */
+	int8_t			lkb_castmode_done; /* last delivered castmode */
 
 	struct list_head	lkb_idtbl_list;	/* lockspace lkbtbl */
 	struct list_head	lkb_statequeue;	/* rsb g/c/w list */
@@ -473,7 +479,6 @@
 	int			ls_low_nodeid;
 	int			ls_total_weight;
 	int			*ls_node_array;
-	gfp_t			ls_allocation;
 
 	struct dlm_rsb		ls_stub_rsb;	/* for returning errors */
 	struct dlm_lkb		ls_stub_lkb;	/* for returning errors */
--- linux-mvl-dove-2.6.32.orig/fs/dlm/user.h
+++ linux-mvl-dove-2.6.32/fs/dlm/user.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2006-2008 Red Hat, Inc.  All rights reserved.
+ * Copyright (C) 2006-2010 Red Hat, Inc.  All rights reserved.
  *
  * This copyrighted material is made available to anyone wishing to use,
  * modify, copy, or redistribute it subject to the terms and conditions
@@ -9,7 +9,7 @@
 #ifndef __USER_DOT_H__
 #define __USER_DOT_H__
 
-void dlm_user_add_ast(struct dlm_lkb *lkb, int type, int bastmode);
+void dlm_user_add_ast(struct dlm_lkb *lkb, int type, int mode);
 int dlm_user_init(void);
 void dlm_user_exit(void);
 int dlm_device_deregister(struct dlm_ls *ls);
--- linux-mvl-dove-2.6.32.orig/fs/dlm/ast.c
+++ linux-mvl-dove-2.6.32/fs/dlm/ast.c
@@ -2,7 +2,7 @@
 *******************************************************************************
 **
 **  Copyright (C) Sistina Software, Inc.  1997-2003  All rights reserved.
-**  Copyright (C) 2004-2008 Red Hat, Inc.  All rights reserved.
+**  Copyright (C) 2004-2010 Red Hat, Inc.  All rights reserved.
 **
 **  This copyrighted material is made available to anyone wishing to use,
 **  modify, copy, or redistribute it subject to the terms and conditions
@@ -33,10 +33,10 @@
 	spin_unlock(&ast_queue_lock);
 }
 
-void dlm_add_ast(struct dlm_lkb *lkb, int type, int bastmode)
+void dlm_add_ast(struct dlm_lkb *lkb, int type, int mode)
 {
 	if (lkb->lkb_flags & DLM_IFL_USER) {
-		dlm_user_add_ast(lkb, type, bastmode);
+		dlm_user_add_ast(lkb, type, mode);
 		return;
 	}
 
@@ -44,10 +44,21 @@
 	if (!(lkb->lkb_ast_type & (AST_COMP | AST_BAST))) {
 		kref_get(&lkb->lkb_ref);
 		list_add_tail(&lkb->lkb_astqueue, &ast_queue);
+		lkb->lkb_ast_first = type;
 	}
+
+	/* sanity check, this should not happen */
+
+	if ((type == AST_COMP) && (lkb->lkb_ast_type & AST_COMP))
+		log_print("repeat cast %d castmode %d lock %x %s",
+			  mode, lkb->lkb_castmode,
+			  lkb->lkb_id, lkb->lkb_resource->res_name);
+
 	lkb->lkb_ast_type |= type;
-	if (bastmode)
-		lkb->lkb_bastmode = bastmode;
+	if (type == AST_BAST)
+		lkb->lkb_bastmode = mode;
+	else
+		lkb->lkb_castmode = mode;
 	spin_unlock(&ast_queue_lock);
 
 	set_bit(WAKE_ASTS, &astd_wakeflags);
@@ -59,9 +70,9 @@
 	struct dlm_ls *ls = NULL;
 	struct dlm_rsb *r = NULL;
 	struct dlm_lkb *lkb;
-	void (*cast) (void *astparam);
-	void (*bast) (void *astparam, int mode);
-	int type = 0, bastmode;
+	void (*castfn) (void *astparam);
+	void (*bastfn) (void *astparam, int mode);
+	int type, first, bastmode, castmode, do_bast, do_cast, last_castmode;
 
 repeat:
 	spin_lock(&ast_queue_lock);
@@ -75,17 +86,48 @@
 		list_del(&lkb->lkb_astqueue);
 		type = lkb->lkb_ast_type;
 		lkb->lkb_ast_type = 0;
+		first = lkb->lkb_ast_first;
+		lkb->lkb_ast_first = 0;
 		bastmode = lkb->lkb_bastmode;
-
+		castmode = lkb->lkb_castmode;
+		castfn = lkb->lkb_astfn;
+		bastfn = lkb->lkb_bastfn;
 		spin_unlock(&ast_queue_lock);
-		cast = lkb->lkb_astfn;
-		bast = lkb->lkb_bastfn;
 
-		if ((type & AST_COMP) && cast)
-			cast(lkb->lkb_astparam);
+		do_cast = (type & AST_COMP) && castfn;
+		do_bast = (type & AST_BAST) && bastfn;
+
+		/* Skip a bast if its blocking mode is compatible with the
+		   granted mode of the preceding cast. */
 
-		if ((type & AST_BAST) && bast)
-			bast(lkb->lkb_astparam, bastmode);
+		if (do_bast) {
+			if (first == AST_COMP)
+				last_castmode = castmode;
+			else
+				last_castmode = lkb->lkb_castmode_done;
+			if (dlm_modes_compat(bastmode, last_castmode))
+				do_bast = 0;
+		}
+
+		if (first == AST_COMP) {
+			if (do_cast)
+				castfn(lkb->lkb_astparam);
+			if (do_bast)
+				bastfn(lkb->lkb_astparam, bastmode);
+		} else if (first == AST_BAST) {
+			if (do_bast)
+				bastfn(lkb->lkb_astparam, bastmode);
+			if (do_cast)
+				castfn(lkb->lkb_astparam);
+		} else {
+			log_error(ls, "bad ast_first %d ast_type %d",
+				  first, type);
+		}
+
+		if (do_cast)
+			lkb->lkb_castmode_done = castmode;
+		if (do_bast)
+			lkb->lkb_bastmode_done = bastmode;
 
 		/* this removes the reference added by dlm_add_ast
 		   and may result in the lkb being freed */
--- linux-mvl-dove-2.6.32.orig/fs/dlm/member.c
+++ linux-mvl-dove-2.6.32/fs/dlm/member.c
@@ -48,7 +48,7 @@
 	struct dlm_member *memb;
 	int w, error;
 
-	memb = kzalloc(sizeof(struct dlm_member), ls->ls_allocation);
+	memb = kzalloc(sizeof(struct dlm_member), GFP_NOFS);
 	if (!memb)
 		return -ENOMEM;
 
@@ -143,7 +143,7 @@
 
 	ls->ls_total_weight = total;
 
-	array = kmalloc(sizeof(int) * total, ls->ls_allocation);
+	array = kmalloc(sizeof(int) * total, GFP_NOFS);
 	if (!array)
 		return;
 
@@ -226,7 +226,7 @@
 			continue;
 		log_debug(ls, "new nodeid %d is a re-added member", rv->new[i]);
 
-		memb = kzalloc(sizeof(struct dlm_member), ls->ls_allocation);
+		memb = kzalloc(sizeof(struct dlm_member), GFP_NOFS);
 		if (!memb)
 			return -ENOMEM;
 		memb->nodeid = rv->new[i];
@@ -341,7 +341,7 @@
 	int *ids = NULL, *new = NULL;
 	int error, ids_count = 0, new_count = 0;
 
-	rv = kzalloc(sizeof(struct dlm_recover), ls->ls_allocation);
+	rv = kzalloc(sizeof(struct dlm_recover), GFP_NOFS);
 	if (!rv)
 		return -ENOMEM;
 
--- linux-mvl-dove-2.6.32.orig/fs/dlm/memory.c
+++ linux-mvl-dove-2.6.32/fs/dlm/memory.c
@@ -39,7 +39,7 @@
 {
 	char *p;
 
-	p = kzalloc(ls->ls_lvblen, ls->ls_allocation);
+	p = kzalloc(ls->ls_lvblen, GFP_NOFS);
 	return p;
 }
 
@@ -57,7 +57,7 @@
 
 	DLM_ASSERT(namelen <= DLM_RESNAME_MAXLEN,);
 
-	r = kzalloc(sizeof(*r) + namelen, ls->ls_allocation);
+	r = kzalloc(sizeof(*r) + namelen, GFP_NOFS);
 	return r;
 }
 
@@ -72,7 +72,7 @@
 {
 	struct dlm_lkb *lkb;
 
-	lkb = kmem_cache_zalloc(lkb_cache, ls->ls_allocation);
+	lkb = kmem_cache_zalloc(lkb_cache, GFP_NOFS);
 	return lkb;
 }
 
--- linux-mvl-dove-2.6.32.orig/fs/dlm/dir.c
+++ linux-mvl-dove-2.6.32/fs/dlm/dir.c
@@ -49,8 +49,7 @@
 	spin_unlock(&ls->ls_recover_list_lock);
 
 	if (!found)
-		de = kzalloc(sizeof(struct dlm_direntry) + len,
-			     ls->ls_allocation);
+		de = kzalloc(sizeof(struct dlm_direntry) + len, GFP_NOFS);
 	return de;
 }
 
@@ -212,7 +211,7 @@
 
 	dlm_dir_clear(ls);
 
-	last_name = kmalloc(DLM_RESNAME_MAXLEN, ls->ls_allocation);
+	last_name = kmalloc(DLM_RESNAME_MAXLEN, GFP_NOFS);
 	if (!last_name)
 		goto out;
 
@@ -323,7 +322,7 @@
 	if (namelen > DLM_RESNAME_MAXLEN)
 		return -EINVAL;
 
-	de = kzalloc(sizeof(struct dlm_direntry) + namelen, ls->ls_allocation);
+	de = kzalloc(sizeof(struct dlm_direntry) + namelen, GFP_NOFS);
 	if (!de)
 		return -ENOMEM;
 
--- linux-mvl-dove-2.6.32.orig/fs/dlm/debug_fs.c
+++ linux-mvl-dove-2.6.32/fs/dlm/debug_fs.c
@@ -404,7 +404,7 @@
 	if (bucket >= ls->ls_rsbtbl_size)
 		return NULL;
 
-	ri = kzalloc(sizeof(struct rsbtbl_iter), GFP_KERNEL);
+	ri = kzalloc(sizeof(struct rsbtbl_iter), GFP_NOFS);
 	if (!ri)
 		return NULL;
 	if (n == 0)
--- linux-mvl-dove-2.6.32.orig/fs/dlm/netlink.c
+++ linux-mvl-dove-2.6.32/fs/dlm/netlink.c
@@ -26,7 +26,7 @@
 	struct sk_buff *skb;
 	void *data;
 
-	skb = genlmsg_new(size, GFP_KERNEL);
+	skb = genlmsg_new(size, GFP_NOFS);
 	if (!skb)
 		return -ENOMEM;
 
--- linux-mvl-dove-2.6.32.orig/fs/dlm/user.c
+++ linux-mvl-dove-2.6.32/fs/dlm/user.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2006-2009 Red Hat, Inc.  All rights reserved.
+ * Copyright (C) 2006-2010 Red Hat, Inc.  All rights reserved.
  *
  * This copyrighted material is made available to anyone wishing to use,
  * modify, copy, or redistribute it subject to the terms and conditions
@@ -173,7 +173,7 @@
 /* we could possibly check if the cancel of an orphan has resulted in the lkb
    being removed and then remove that lkb from the orphans list and free it */
 
-void dlm_user_add_ast(struct dlm_lkb *lkb, int type, int bastmode)
+void dlm_user_add_ast(struct dlm_lkb *lkb, int type, int mode)
 {
 	struct dlm_ls *ls;
 	struct dlm_user_args *ua;
@@ -206,8 +206,10 @@
 
 	ast_type = lkb->lkb_ast_type;
 	lkb->lkb_ast_type |= type;
-	if (bastmode)
-		lkb->lkb_bastmode = bastmode;
+	if (type == AST_BAST)
+		lkb->lkb_bastmode = mode;
+	else
+		lkb->lkb_castmode = mode;
 
 	if (!ast_type) {
 		kref_get(&lkb->lkb_ref);
@@ -267,7 +269,7 @@
 		goto out;
 	}
 
-	ua = kzalloc(sizeof(struct dlm_user_args), GFP_KERNEL);
+	ua = kzalloc(sizeof(struct dlm_user_args), GFP_NOFS);
 	if (!ua)
 		goto out;
 	ua->proc = proc;
@@ -307,7 +309,7 @@
 	if (!ls)
 		return -ENOENT;
 
-	ua = kzalloc(sizeof(struct dlm_user_args), GFP_KERNEL);
+	ua = kzalloc(sizeof(struct dlm_user_args), GFP_NOFS);
 	if (!ua)
 		goto out;
 	ua->proc = proc;
@@ -352,7 +354,7 @@
 
 	error = -ENOMEM;
 	len = strlen(name) + strlen(name_prefix) + 2;
-	ls->ls_device.name = kzalloc(len, GFP_KERNEL);
+	ls->ls_device.name = kzalloc(len, GFP_NOFS);
 	if (!ls->ls_device.name)
 		goto fail;
 
@@ -520,7 +522,7 @@
 #endif
 		return -EINVAL;
 
-	kbuf = kzalloc(count + 1, GFP_KERNEL);
+	kbuf = kzalloc(count + 1, GFP_NOFS);
 	if (!kbuf)
 		return -ENOMEM;
 
@@ -546,7 +548,7 @@
 
 		/* add 1 after namelen so that the name string is terminated */
 		kbuf = kzalloc(sizeof(struct dlm_write_request) + namelen + 1,
-			       GFP_KERNEL);
+			       GFP_NOFS);
 		if (!kbuf) {
 			kfree(k32buf);
 			return -ENOMEM;
@@ -648,7 +650,7 @@
 	if (!ls)
 		return -ENOENT;
 
-	proc = kzalloc(sizeof(struct dlm_user_proc), GFP_KERNEL);
+	proc = kzalloc(sizeof(struct dlm_user_proc), GFP_NOFS);
 	if (!proc) {
 		dlm_put_lockspace(ls);
 		return -ENOMEM;
--- linux-mvl-dove-2.6.32.orig/fs/dlm/plock.c
+++ linux-mvl-dove-2.6.32/fs/dlm/plock.c
@@ -82,7 +82,7 @@
 	if (!ls)
 		return -EINVAL;
 
-	xop = kzalloc(sizeof(*xop), GFP_KERNEL);
+	xop = kzalloc(sizeof(*xop), GFP_NOFS);
 	if (!xop) {
 		rv = -ENOMEM;
 		goto out;
@@ -211,7 +211,7 @@
 	if (!ls)
 		return -EINVAL;
 
-	op = kzalloc(sizeof(*op), GFP_KERNEL);
+	op = kzalloc(sizeof(*op), GFP_NOFS);
 	if (!op) {
 		rv = -ENOMEM;
 		goto out;
@@ -266,7 +266,7 @@
 	if (!ls)
 		return -EINVAL;
 
-	op = kzalloc(sizeof(*op), GFP_KERNEL);
+	op = kzalloc(sizeof(*op), GFP_NOFS);
 	if (!op) {
 		rv = -ENOMEM;
 		goto out;
--- linux-mvl-dove-2.6.32.orig/fs/dlm/lowcomms.c
+++ linux-mvl-dove-2.6.32/fs/dlm/lowcomms.c
@@ -1060,7 +1060,7 @@
 		if (dlm_our_addr(&sas, i))
 			break;
 
-		addr = kmalloc(sizeof(*addr), GFP_KERNEL);
+		addr = kmalloc(sizeof(*addr), GFP_NOFS);
 		if (!addr)
 			break;
 		memcpy(addr, &sas, sizeof(*addr));
@@ -1099,7 +1099,7 @@
 	struct sockaddr_storage localaddr;
 	struct sctp_event_subscribe subscribe;
 	int result = -EINVAL, num = 1, i, addr_len;
-	struct connection *con = nodeid2con(0, GFP_KERNEL);
+	struct connection *con = nodeid2con(0, GFP_NOFS);
 	int bufsize = NEEDED_RMEM;
 
 	if (!con)
@@ -1171,7 +1171,7 @@
 static int tcp_listen_for_all(void)
 {
 	struct socket *sock = NULL;
-	struct connection *con = nodeid2con(0, GFP_KERNEL);
+	struct connection *con = nodeid2con(0, GFP_NOFS);
 	int result = -EINVAL;
 
 	if (!con)
--- linux-mvl-dove-2.6.32.orig/fs/dlm/requestqueue.c
+++ linux-mvl-dove-2.6.32/fs/dlm/requestqueue.c
@@ -35,7 +35,7 @@
 	struct rq_entry *e;
 	int length = ms->m_header.h_length - sizeof(struct dlm_message);
 
-	e = kmalloc(sizeof(struct rq_entry) + length, ls->ls_allocation);
+	e = kmalloc(sizeof(struct rq_entry) + length, GFP_NOFS);
 	if (!e) {
 		log_print("dlm_add_requestqueue: out of memory len %d", length);
 		return;
--- linux-mvl-dove-2.6.32.orig/fs/fuse/file.c
+++ linux-mvl-dove-2.6.32/fs/fuse/file.c
@@ -13,6 +13,7 @@
 #include <linux/kernel.h>
 #include <linux/sched.h>
 #include <linux/module.h>
+#include <linux/compat.h>
 
 static const struct file_operations fuse_direct_io_file_operations;
 
@@ -85,18 +86,52 @@
 	return ff;
 }
 
+static void fuse_release_async(struct work_struct *work)
+{
+	struct fuse_req *req;
+	struct fuse_conn *fc;
+	struct path path;
+
+	req = container_of(work, struct fuse_req, misc.release.work);
+	path = req->misc.release.path;
+	fc = get_fuse_conn(path.dentry->d_inode);
+
+	fuse_put_request(fc, req);
+	path_put(&path);
+}
+
 static void fuse_release_end(struct fuse_conn *fc, struct fuse_req *req)
 {
-	path_put(&req->misc.release.path);
+	if (fc->destroy_req) {
+		/*
+		 * If this is a fuseblk mount, then it's possible that
+		 * releasing the path will result in releasing the
+		 * super block and sending the DESTROY request.  If
+		 * the server is single threaded, this would hang.
+		 * For this reason do the path_put() in a separate
+		 * thread.
+		 */
+		atomic_inc(&req->count);
+		INIT_WORK(&req->misc.release.work, fuse_release_async);
+		schedule_work(&req->misc.release.work);
+	} else {
+		path_put(&req->misc.release.path);
+	}
 }
 
-static void fuse_file_put(struct fuse_file *ff)
+static void fuse_file_put(struct fuse_file *ff, bool sync)
 {
 	if (atomic_dec_and_test(&ff->count)) {
 		struct fuse_req *req = ff->reserved_req;
 
-		req->end = fuse_release_end;
-		fuse_request_send_background(ff->fc, req);
+		if (sync) {
+			fuse_request_send(ff->fc, req);
+			path_put(&req->misc.release.path);
+			fuse_put_request(ff->fc, req);
+		} else {
+			req->end = fuse_release_end;
+			fuse_request_send_background(ff->fc, req);
+		}
 		kfree(ff);
 	}
 }
@@ -134,6 +169,7 @@
 void fuse_finish_open(struct inode *inode, struct file *file)
 {
 	struct fuse_file *ff = file->private_data;
+	struct fuse_conn *fc = get_fuse_conn(inode);
 
 	if (ff->open_flags & FOPEN_DIRECT_IO)
 		file->f_op = &fuse_direct_io_file_operations;
@@ -141,6 +177,15 @@
 		invalidate_inode_pages2(inode->i_mapping);
 	if (ff->open_flags & FOPEN_NONSEEKABLE)
 		nonseekable_open(inode, file);
+	if (fc->atomic_o_trunc && (file->f_flags & O_TRUNC)) {
+		struct fuse_inode *fi = get_fuse_inode(inode);
+
+		spin_lock(&fc->lock);
+		fi->attr_version = ++fc->attr_version;
+		i_size_write(inode, 0);
+		spin_unlock(&fc->lock);
+		fuse_invalidate_attr(inode);
+	}
 }
 
 int fuse_open_common(struct inode *inode, struct file *file, bool isdir)
@@ -208,8 +253,12 @@
 	 * Normally this will send the RELEASE request, however if
 	 * some asynchronous READ or WRITE requests are outstanding,
 	 * the sending will be delayed.
+	 *
+	 * Make the release synchronous if this is a fuseblk mount,
+	 * synchronous RELEASE is allowed (and desirable) in this case
+	 * because the server can be trusted not to screw up.
 	 */
-	fuse_file_put(ff);
+	fuse_file_put(ff, ff->fc->destroy_req != NULL);
 }
 
 static int fuse_open(struct inode *inode, struct file *file)
@@ -538,7 +587,7 @@
 		unlock_page(page);
 	}
 	if (req->ff)
-		fuse_file_put(req->ff);
+		fuse_file_put(req->ff, false);
 }
 
 static void fuse_send_readpages(struct fuse_req *req, struct file *file)
@@ -828,6 +877,9 @@
 		if (!page)
 			break;
 
+		if (mapping_writably_mapped(mapping))
+			flush_dcache_page(page);
+
 		pagefault_disable();
 		tmp = iov_iter_copy_from_user_atomic(page, ii, offset, bytes);
 		pagefault_enable();
@@ -1115,7 +1167,7 @@
 static void fuse_writepage_free(struct fuse_conn *fc, struct fuse_req *req)
 {
 	__free_page(req->pages[0]);
-	fuse_file_put(req->ff);
+	fuse_file_put(req->ff, false);
 }
 
 static void fuse_writepage_finish(struct fuse_conn *fc, struct fuse_req *req)
@@ -1606,6 +1658,58 @@
 	return 0;
 }
 
+/* Make sure iov_length() won't overflow */
+static int fuse_verify_ioctl_iov(struct iovec *iov, size_t count)
+{
+	size_t n;
+	u32 max = FUSE_MAX_PAGES_PER_REQ << PAGE_SHIFT;
+
+	for (n = 0; n < count; n++) {
+		if (iov->iov_len > (size_t) max)
+			return -ENOMEM;
+		max -= iov->iov_len;
+	}
+	return 0;
+}
+
+/*
+ * CUSE servers compiled on 32bit broke on 64bit kernels because the
+ * ABI was defined to be 'struct iovec' which is different on 32bit
+ * and 64bit.  Fortunately we can determine which structure the server
+ * used from the size of the reply.
+ */
+static int fuse_copy_ioctl_iovec(struct iovec *dst, void *src,
+				 size_t transferred, unsigned count,
+				 bool is_compat)
+{
+#ifdef CONFIG_COMPAT
+	if (count * sizeof(struct compat_iovec) == transferred) {
+		struct compat_iovec *ciov = src;
+		unsigned i;
+
+		/*
+		 * With this interface a 32bit server cannot support
+		 * non-compat (i.e. ones coming from 64bit apps) ioctl
+		 * requests
+		 */
+		if (!is_compat)
+			return -EINVAL;
+
+		for (i = 0; i < count; i++) {
+			dst[i].iov_base = compat_ptr(ciov[i].iov_base);
+			dst[i].iov_len = ciov[i].iov_len;
+		}
+		return 0;
+	}
+#endif
+
+	if (count * sizeof(struct iovec) != transferred)
+		return -EIO;
+
+	memcpy(dst, src, transferred);
+	return 0;
+}
+
 /*
  * For ioctls, there is no generic way to determine how much memory
  * needs to be read and/or written.  Furthermore, ioctls are allowed
@@ -1787,18 +1891,25 @@
 		    in_iovs + out_iovs > FUSE_IOCTL_MAX_IOV)
 			goto out;
 
-		err = -EIO;
-		if ((in_iovs + out_iovs) * sizeof(struct iovec) != transferred)
-			goto out;
-
-		/* okay, copy in iovs and retry */
 		vaddr = kmap_atomic(pages[0], KM_USER0);
-		memcpy(page_address(iov_page), vaddr, transferred);
+		err = fuse_copy_ioctl_iovec(page_address(iov_page), vaddr,
+					    transferred, in_iovs + out_iovs,
+					    (flags & FUSE_IOCTL_COMPAT) != 0);
 		kunmap_atomic(vaddr, KM_USER0);
+		if (err)
+			goto out;
 
 		in_iov = page_address(iov_page);
 		out_iov = in_iov + in_iovs;
 
+		err = fuse_verify_ioctl_iov(in_iov, in_iovs);
+		if (err)
+			goto out;
+
+		err = fuse_verify_ioctl_iov(out_iov, out_iovs);
+		if (err)
+			goto out;
+
 		goto retry;
 	}
 
--- linux-mvl-dove-2.6.32.orig/fs/fuse/dev.c
+++ linux-mvl-dove-2.6.32/fs/fuse/dev.c
@@ -1158,6 +1158,14 @@
 	}
 }
 
+static void end_queued_requests(struct fuse_conn *fc)
+{
+	fc->max_background = UINT_MAX;
+	flush_bg_queue(fc);
+	end_requests(fc, &fc->pending);
+	end_requests(fc, &fc->processing);
+}
+
 /*
  * Abort all requests.
  *
@@ -1184,8 +1192,7 @@
 		fc->connected = 0;
 		fc->blocked = 0;
 		end_io_requests(fc);
-		end_requests(fc, &fc->pending);
-		end_requests(fc, &fc->processing);
+		end_queued_requests(fc);
 		wake_up_all(&fc->waitq);
 		wake_up_all(&fc->blocked_waitq);
 		kill_fasync(&fc->fasync, SIGIO, POLL_IN);
@@ -1200,8 +1207,9 @@
 	if (fc) {
 		spin_lock(&fc->lock);
 		fc->connected = 0;
-		end_requests(fc, &fc->pending);
-		end_requests(fc, &fc->processing);
+		fc->blocked = 0;
+		end_queued_requests(fc);
+		wake_up_all(&fc->blocked_waitq);
 		spin_unlock(&fc->lock);
 		fuse_conn_put(fc);
 	}
--- linux-mvl-dove-2.6.32.orig/fs/fuse/fuse_i.h
+++ linux-mvl-dove-2.6.32/fs/fuse/fuse_i.h
@@ -21,6 +21,7 @@
 #include <linux/rwsem.h>
 #include <linux/rbtree.h>
 #include <linux/poll.h>
+#include <linux/workqueue.h>
 
 /** Max number of pages that can be used in a single read request */
 #define FUSE_MAX_PAGES_PER_REQ 32
@@ -254,7 +255,10 @@
 	union {
 		struct fuse_forget_in forget_in;
 		struct {
-			struct fuse_release_in in;
+			union {
+				struct fuse_release_in in;
+				struct work_struct work;
+			};
 			struct path path;
 		} release;
 		struct fuse_init_in init_in;
--- linux-mvl-dove-2.6.32.orig/fs/exofs/inode.c
+++ linux-mvl-dove-2.6.32/fs/exofs/inode.c
@@ -731,13 +731,28 @@
 					fsdata);
 }
 
+static int exofs_write_end(struct file *file, struct address_space *mapping,
+			loff_t pos, unsigned len, unsigned copied,
+			struct page *page, void *fsdata)
+{
+	struct inode *inode = mapping->host;
+	/* According to comment in simple_write_end i_mutex is held */
+	loff_t i_size = inode->i_size;
+	int ret;
+
+	ret = simple_write_end(file, mapping,pos, len, copied, page, fsdata);
+	if (i_size != inode->i_size)
+		mark_inode_dirty(inode);
+	return ret;
+}
+
 const struct address_space_operations exofs_aops = {
 	.readpage	= exofs_readpage,
 	.readpages	= exofs_readpages,
 	.writepage	= exofs_writepage,
 	.writepages	= exofs_writepages,
 	.write_begin	= exofs_write_begin_export,
-	.write_end	= simple_write_end,
+	.write_end	= exofs_write_end,
 };
 
 /******************************************************************************
--- linux-mvl-dove-2.6.32.orig/fs/exofs/dir.c
+++ linux-mvl-dove-2.6.32/fs/exofs/dir.c
@@ -608,7 +608,7 @@
 	de->inode_no = cpu_to_le64(parent->i_ino);
 	memcpy(de->name, PARENT_DIR, sizeof(PARENT_DIR));
 	exofs_set_de_type(de, inode);
-	kunmap_atomic(page, KM_USER0);
+	kunmap_atomic(kaddr, KM_USER0);
 	err = exofs_commit_chunk(page, 0, chunk_size);
 fail:
 	page_cache_release(page);
--- linux-mvl-dove-2.6.32.orig/fs/cachefiles/security.c
+++ linux-mvl-dove-2.6.32/fs/cachefiles/security.c
@@ -77,6 +77,8 @@
 /*
  * check the security details of the on-disk cache
  * - must be called with security override in force
+ * - must return with a security override in force - even in the case of an
+ *   error
  */
 int cachefiles_determine_cache_security(struct cachefiles_cache *cache,
 					struct dentry *root,
@@ -99,6 +101,8 @@
 	 * which create files */
 	ret = set_create_files_as(new, root->d_inode);
 	if (ret < 0) {
+		abort_creds(new);
+		cachefiles_begin_secure(cache, _saved_cred);
 		_leave(" = %d [cfa]", ret);
 		return ret;
 	}
--- linux-mvl-dove-2.6.32.orig/fs/fat/inode.c
+++ linux-mvl-dove-2.6.32/fs/fat/inode.c
@@ -1215,6 +1215,7 @@
 	struct inode *root_inode = NULL, *fat_inode = NULL;
 	struct buffer_head *bh;
 	struct fat_boot_sector *b;
+	struct fat_boot_bsx *bsx;
 	struct msdos_sb_info *sbi;
 	u16 logical_sector_size;
 	u32 total_sectors, total_clusters, fat_clusters, rootdir_sectors;
@@ -1357,6 +1358,8 @@
 			goto out_fail;
 		}
 
+		bsx = (struct fat_boot_bsx *)(bh->b_data + FAT32_BSX_OFFSET);
+
 		fsinfo = (struct fat_boot_fsinfo *)fsinfo_bh->b_data;
 		if (!IS_FSINFO(fsinfo)) {
 			printk(KERN_WARNING "FAT: Invalid FSINFO signature: "
@@ -1372,8 +1375,14 @@
 		}
 
 		brelse(fsinfo_bh);
+	} else {
+		bsx = (struct fat_boot_bsx *)(bh->b_data + FAT16_BSX_OFFSET);
 	}
 
+	/* interpret volume ID as a little endian 32 bit integer */
+	sbi->vol_id = (((u32)bsx->vol_id[0]) | ((u32)bsx->vol_id[1] << 8) |
+		((u32)bsx->vol_id[2] << 16) | ((u32)bsx->vol_id[3] << 24));
+
 	sbi->dir_per_block = sb->s_blocksize / sizeof(struct msdos_dir_entry);
 	sbi->dir_per_block_bits = ffs(sbi->dir_per_block) - 1;
 
--- linux-mvl-dove-2.6.32.orig/fs/fat/file.c
+++ linux-mvl-dove-2.6.32/fs/fat/file.c
@@ -101,7 +101,7 @@
 		if (attr & ATTR_SYS)
 			inode->i_flags |= S_IMMUTABLE;
 		else
-			inode->i_flags &= S_IMMUTABLE;
+			inode->i_flags &= ~S_IMMUTABLE;
 	}
 
 	fat_save_attrs(inode, attr);
--- linux-mvl-dove-2.6.32.orig/fs/fat/fat.h
+++ linux-mvl-dove-2.6.32/fs/fat/fat.h
@@ -76,6 +76,7 @@
 	const void *dir_ops;		     /* Opaque; default directory operations */
 	int dir_per_block;	     /* dir entries per block */
 	int dir_per_block_bits;	     /* log2(dir_per_block) */
+	unsigned long vol_id;        /* volume ID */
 
 	int fatent_shift;
 	struct fatent_operations *fatent_ops;
--- linux-mvl-dove-2.6.32.orig/fs/fat/namei_vfat.c
+++ linux-mvl-dove-2.6.32/fs/fat/namei_vfat.c
@@ -309,7 +309,7 @@
 {
 	struct fat_mount_options *opts = &MSDOS_SB(dir->i_sb)->options;
 	wchar_t *ip, *ext_start, *end, *name_start;
-	unsigned char base[9], ext[4], buf[8], *p;
+	unsigned char base[9], ext[4], buf[5], *p;
 	unsigned char charbuf[NLS_MAX_CHARSET_SIZE];
 	int chl, chi;
 	int sz = 0, extlen, baselen, i, numtail_baselen, numtail2_baselen;
@@ -467,7 +467,7 @@
 			return 0;
 	}
 
-	i = jiffies & 0xffff;
+	i = jiffies;
 	sz = (jiffies >> 16) & 0x7;
 	if (baselen > 2) {
 		baselen = numtail2_baselen;
@@ -476,7 +476,7 @@
 	name_res[baselen + 4] = '~';
 	name_res[baselen + 5] = '1' + sz;
 	while (1) {
-		sprintf(buf, "%04X", i);
+		snprintf(buf, sizeof(buf), "%04X", i & 0xffff);
 		memcpy(&name_res[baselen], buf, 4);
 		if (vfat_find_form(dir, name_res) < 0)
 			break;
--- linux-mvl-dove-2.6.32.orig/fs/fat/dir.c
+++ linux-mvl-dove-2.6.32/fs/fat/dir.c
@@ -758,6 +758,13 @@
 	return ret;
 }
 
+static int fat_ioctl_volume_id(struct inode *dir)
+{
+	struct super_block *sb = dir->i_sb;
+	struct msdos_sb_info *sbi = MSDOS_SB(sb);
+	return sbi->vol_id;
+}
+
 static int fat_dir_ioctl(struct inode *inode, struct file *filp,
 			 unsigned int cmd, unsigned long arg)
 {
@@ -773,6 +780,8 @@
 		short_only = 0;
 		both = 1;
 		break;
+	case VFAT_IOCTL_GET_VOLUME_ID:
+		return fat_ioctl_volume_id(inode);
 	default:
 		return fat_generic_ioctl(inode, filp, cmd, arg);
 	}
--- linux-mvl-dove-2.6.32.orig/fs/ubifs/journal.c
+++ linux-mvl-dove-2.6.32/fs/ubifs/journal.c
@@ -665,6 +665,7 @@
 
 out_release:
 	release_head(c, BASEHD);
+	kfree(dent);
 out_ro:
 	ubifs_ro_mode(c, err);
 	if (last_reference)
--- linux-mvl-dove-2.6.32.orig/fs/ubifs/lpt.c
+++ linux-mvl-dove-2.6.32/fs/ubifs/lpt.c
@@ -1269,10 +1269,9 @@
 	lnum = branch->lnum;
 	offs = branch->offs;
 	pnode = kzalloc(sizeof(struct ubifs_pnode), GFP_NOFS);
-	if (!pnode) {
-		err = -ENOMEM;
-		goto out;
-	}
+	if (!pnode)
+		return -ENOMEM;
+
 	if (lnum == 0) {
 		/*
 		 * This pnode was not written which just means that the LEB
--- linux-mvl-dove-2.6.32.orig/fs/ubifs/debug.c
+++ linux-mvl-dove-2.6.32/fs/ubifs/debug.c
@@ -965,11 +965,39 @@
 void dbg_save_space_info(struct ubifs_info *c)
 {
 	struct ubifs_debug_info *d = c->dbg;
-
-	ubifs_get_lp_stats(c, &d->saved_lst);
+	int freeable_cnt;
 
 	spin_lock(&c->space_lock);
+	memcpy(&d->saved_lst, &c->lst, sizeof(struct ubifs_lp_stats));
+
+	/*
+	 * We use a dirty hack here and zero out @c->freeable_cnt, because it
+	 * affects the free space calculations, and UBIFS might not know about
+	 * all freeable eraseblocks. Indeed, we know about freeable eraseblocks
+	 * only when we read their lprops, and we do this only lazily, upon the
+	 * need. So at any given point of time @c->freeable_cnt might be not
+	 * exactly accurate.
+	 *
+	 * Just one example about the issue we hit when we did not zero
+	 * @c->freeable_cnt.
+	 * 1. The file-system is mounted R/O, c->freeable_cnt is %0. We save the
+	 *    amount of free space in @d->saved_free
+	 * 2. We re-mount R/W, which makes UBIFS to read the "lsave"
+	 *    information from flash, where we cache LEBs from various
+	 *    categories ('ubifs_remount_fs()' -> 'ubifs_lpt_init()'
+	 *    -> 'lpt_init_wr()' -> 'read_lsave()' -> 'ubifs_lpt_lookup()'
+	 *    -> 'ubifs_get_pnode()' -> 'update_cats()'
+	 *    -> 'ubifs_add_to_cat()').
+	 * 3. Lsave contains a freeable eraseblock, and @c->freeable_cnt
+	 *    becomes %1.
+	 * 4. We calculate the amount of free space when the re-mount is
+	 *    finished in 'dbg_check_space_info()' and it does not match
+	 *    @d->saved_free.
+	 */
+	freeable_cnt = c->freeable_cnt;
+	c->freeable_cnt = 0;
 	d->saved_free = ubifs_get_free_space_nolock(c);
+	c->freeable_cnt = freeable_cnt;
 	spin_unlock(&c->space_lock);
 }
 
@@ -986,12 +1014,15 @@
 {
 	struct ubifs_debug_info *d = c->dbg;
 	struct ubifs_lp_stats lst;
-	long long avail, free;
+	long long free;
+	int freeable_cnt;
 
 	spin_lock(&c->space_lock);
-	avail = ubifs_calc_available(c, c->min_idx_lebs);
+	freeable_cnt = c->freeable_cnt;
+	c->freeable_cnt = 0;
+	free = ubifs_get_free_space_nolock(c);
+	c->freeable_cnt = freeable_cnt;
 	spin_unlock(&c->space_lock);
-	free = ubifs_get_free_space(c);
 
 	if (free != d->saved_free) {
 		ubifs_err("free space changed from %lld to %lld",
@@ -2660,19 +2691,19 @@
 	}
 
 	fname = "dump_lprops";
-	dent = debugfs_create_file(fname, S_IWUGO, d->dfs_dir, c, &dfs_fops);
+	dent = debugfs_create_file(fname, S_IWUSR, d->dfs_dir, c, &dfs_fops);
 	if (IS_ERR(dent))
 		goto out_remove;
 	d->dfs_dump_lprops = dent;
 
 	fname = "dump_budg";
-	dent = debugfs_create_file(fname, S_IWUGO, d->dfs_dir, c, &dfs_fops);
+	dent = debugfs_create_file(fname, S_IWUSR, d->dfs_dir, c, &dfs_fops);
 	if (IS_ERR(dent))
 		goto out_remove;
 	d->dfs_dump_budg = dent;
 
 	fname = "dump_tnc";
-	dent = debugfs_create_file(fname, S_IWUGO, d->dfs_dir, c, &dfs_fops);
+	dent = debugfs_create_file(fname, S_IWUSR, d->dfs_dir, c, &dfs_fops);
 	if (IS_ERR(dent))
 		goto out_remove;
 	d->dfs_dump_tnc = dent;
--- linux-mvl-dove-2.6.32.orig/fs/ubifs/recovery.c
+++ linux-mvl-dove-2.6.32/fs/ubifs/recovery.c
@@ -299,6 +299,32 @@
 			goto out_free;
 		}
 		memcpy(c->rcvrd_mst_node, c->mst_node, UBIFS_MST_NODE_SZ);
+
+		/*
+		 * We had to recover the master node, which means there was an
+		 * unclean reboot. However, it is possible that the master node
+		 * is clean at this point, i.e., %UBIFS_MST_DIRTY is not set.
+		 * E.g., consider the following chain of events:
+		 *
+		 * 1. UBIFS was cleanly unmounted, so the master node is clean
+		 * 2. UBIFS is being mounted R/W and starts changing the master
+		 *    node in the first (%UBIFS_MST_LNUM). A power cut happens,
+		 *    so this LEB ends up with some amount of garbage at the
+		 *    end.
+		 * 3. UBIFS is being mounted R/O. We reach this place and
+		 *    recover the master node from the second LEB
+		 *    (%UBIFS_MST_LNUM + 1). But we cannot update the media
+		 *    because we are being mounted R/O. We have to defer the
+		 *    operation.
+		 * 4. However, this master node (@c->mst_node) is marked as
+		 *    clean (since the step 1). And if we just return, the
+		 *    mount code will be confused and won't recover the master
+		 *    node when it is re-mounter R/W later.
+		 *
+		 *    Thus, to force the recovery by marking the master node as
+		 *    dirty.
+		 */
+		c->mst_node->flags |= cpu_to_le32(UBIFS_MST_DIRTY);
 	} else {
 		/* Write the recovered master node */
 		c->max_sqnum = le64_to_cpu(mst->ch.sqnum) - 1;
--- linux-mvl-dove-2.6.32.orig/fs/ubifs/budget.c
+++ linux-mvl-dove-2.6.32/fs/ubifs/budget.c
@@ -62,7 +62,9 @@
  */
 static void shrink_liability(struct ubifs_info *c, int nr_to_write)
 {
+	down_read(&c->vfs_sb->s_umount);
 	writeback_inodes_sb(c->vfs_sb);
+	up_read(&c->vfs_sb->s_umount);
 }
 
 /**
--- linux-mvl-dove-2.6.32.orig/fs/ubifs/file.c
+++ linux-mvl-dove-2.6.32/fs/ubifs/file.c
@@ -1311,6 +1311,9 @@
 
 	dbg_gen("syncing inode %lu", inode->i_ino);
 
+	if (inode->i_sb->s_flags & MS_RDONLY)
+		return 0;
+
 	/*
 	 * VFS has already synchronized dirty pages for this inode. Synchronize
 	 * the inode unless this is a 'datasync()' call.
--- linux-mvl-dove-2.6.32.orig/fs/ubifs/sb.c
+++ linux-mvl-dove-2.6.32/fs/ubifs/sb.c
@@ -474,7 +474,8 @@
  * @c: UBIFS file-system description object
  *
  * This function returns a pointer to the superblock node or a negative error
- * code.
+ * code. Note, the user of this function is responsible of kfree()'ing the
+ * returned superblock buffer.
  */
 struct ubifs_sb_node *ubifs_read_sb_node(struct ubifs_info *c)
 {
--- linux-mvl-dove-2.6.32.orig/fs/ubifs/shrinker.c
+++ linux-mvl-dove-2.6.32/fs/ubifs/shrinker.c
@@ -283,7 +283,11 @@
 	long clean_zn_cnt = atomic_long_read(&ubifs_clean_zn_cnt);
 
 	if (nr == 0)
-		return clean_zn_cnt;
+		/*
+		 * Due to the way UBIFS updates the clean znode counter it may
+		 * temporarily be negative.
+		 */
+		return clean_zn_cnt >= 0 ? clean_zn_cnt : 1;
 
 	if (!clean_zn_cnt) {
 		/*
--- linux-mvl-dove-2.6.32.orig/fs/ubifs/super.c
+++ linux-mvl-dove-2.6.32/fs/ubifs/super.c
@@ -1550,6 +1550,7 @@
 		}
 		sup->leb_cnt = cpu_to_le32(c->leb_cnt);
 		err = ubifs_write_sb_node(c, sup);
+		kfree(sup);
 		if (err)
 			goto out;
 	}
--- linux-mvl-dove-2.6.32.orig/fs/ubifs/commit.c
+++ linux-mvl-dove-2.6.32/fs/ubifs/commit.c
@@ -518,7 +518,7 @@
 	size_t sz;
 
 	if (!(ubifs_chk_flags & UBIFS_CHK_OLD_IDX))
-		goto out;
+		return 0;
 
 	INIT_LIST_HEAD(&list);
 
--- linux-mvl-dove-2.6.32.orig/fs/partitions/mac.c
+++ linux-mvl-dove-2.6.32/fs/partitions/mac.c
@@ -29,10 +29,9 @@
 
 int mac_partition(struct parsed_partitions *state, struct block_device *bdev)
 {
-	int slot = 1;
 	Sector sect;
 	unsigned char *data;
-	int blk, blocks_in_map;
+	int slot, blocks_in_map;
 	unsigned secsize;
 #ifdef CONFIG_PPC_PMAC
 	int found_root = 0;
@@ -59,10 +58,14 @@
 		put_dev_sector(sect);
 		return 0;		/* not a MacOS disk */
 	}
-	printk(" [mac]");
 	blocks_in_map = be32_to_cpu(part->map_count);
-	for (blk = 1; blk <= blocks_in_map; ++blk) {
-		int pos = blk * secsize;
+	if (blocks_in_map < 0 || blocks_in_map >= DISK_MAX_PARTS) {
+		put_dev_sector(sect);
+		return 0;
+	}
+	printk(" [mac]");
+	for (slot = 1; slot <= blocks_in_map; ++slot) {
+		int pos = slot * secsize;
 		put_dev_sector(sect);
 		data = read_dev_sector(bdev, pos/512, &sect);
 		if (!data)
@@ -113,13 +116,11 @@
 			}
 
 			if (goodness > found_root_goodness) {
-				found_root = blk;
+				found_root = slot;
 				found_root_goodness = goodness;
 			}
 		}
 #endif /* CONFIG_PPC_PMAC */
-
-		++slot;
 	}
 #ifdef CONFIG_PPC_PMAC
 	if (found_root_goodness)
--- linux-mvl-dove-2.6.32.orig/fs/partitions/efi.h
+++ linux-mvl-dove-2.6.32/fs/partitions/efi.h
@@ -37,7 +37,6 @@
 #define EFI_PMBR_OSTYPE_EFI 0xEF
 #define EFI_PMBR_OSTYPE_EFI_GPT 0xEE
 
-#define GPT_BLOCK_SIZE 512
 #define GPT_HEADER_SIGNATURE 0x5452415020494645ULL
 #define GPT_HEADER_REVISION_V1 0x00010000
 #define GPT_PRIMARY_PARTITION_TABLE_LBA 1
@@ -79,7 +78,12 @@
 	__le32 num_partition_entries;
 	__le32 sizeof_partition_entry;
 	__le32 partition_entry_array_crc32;
-	u8 reserved2[GPT_BLOCK_SIZE - 92];
+
+	/* The rest of the logical block is reserved by UEFI and must be zero.
+	 * EFI standard handles this by:
+	 *
+	 * uint8_t		reserved2[ BlockSize - 92 ];
+	 */
 } __attribute__ ((packed)) gpt_header;
 
 typedef struct _gpt_entry_attributes {
--- linux-mvl-dove-2.6.32.orig/fs/partitions/ibm.c
+++ linux-mvl-dove-2.6.32/fs/partitions/ibm.c
@@ -74,6 +74,7 @@
 	} *label;
 	unsigned char *data;
 	Sector sect;
+	sector_t labelsect;
 
 	res = 0;
 	blocksize = bdev_logical_block_size(bdev);
@@ -98,9 +99,19 @@
 		goto out_freeall;
 
 	/*
+	 * Special case for FBA disks: label sector does not depend on
+	 * blocksize.
+	 */
+	if ((info->cu_type == 0x6310 && info->dev_type == 0x9336) ||
+	    (info->cu_type == 0x3880 && info->dev_type == 0x3370))
+		labelsect = info->label_block;
+	else
+		labelsect = info->label_block * (blocksize >> 9);
+
+	/*
 	 * Get volume label, extract name and type.
 	 */
-	data = read_dev_sector(bdev, info->label_block*(blocksize/512), &sect);
+	data = read_dev_sector(bdev, labelsect, &sect);
 	if (data == NULL)
 		goto out_readerr;
 
--- linux-mvl-dove-2.6.32.orig/fs/partitions/msdos.c
+++ linux-mvl-dove-2.6.32/fs/partitions/msdos.c
@@ -31,14 +31,17 @@
  */
 #include <asm/unaligned.h>
 
-#define SYS_IND(p)	(get_unaligned(&p->sys_ind))
-#define NR_SECTS(p)	({ __le32 __a =	get_unaligned(&p->nr_sects);	\
-				le32_to_cpu(__a); \
-			})
-
-#define START_SECT(p)	({ __le32 __a =	get_unaligned(&p->start_sect);	\
-				le32_to_cpu(__a); \
-			})
+#define SYS_IND(p)	get_unaligned(&p->sys_ind)
+
+static inline sector_t nr_sects(struct partition *p)
+{
+	return (sector_t)get_unaligned_le32(&p->nr_sects);
+}
+
+static inline sector_t start_sect(struct partition *p)
+{
+	return (sector_t)get_unaligned_le32(&p->start_sect);
+}
 
 static inline int is_extended_partition(struct partition *p)
 {
@@ -104,13 +107,13 @@
 
 static void
 parse_extended(struct parsed_partitions *state, struct block_device *bdev,
-			u32 first_sector, u32 first_size)
+			sector_t first_sector, sector_t first_size)
 {
 	struct partition *p;
 	Sector sect;
 	unsigned char *data;
-	u32 this_sector, this_size;
-	int sector_size = bdev_logical_block_size(bdev) / 512;
+	sector_t this_sector, this_size;
+	sector_t sector_size = bdev_logical_block_size(bdev) / 512;
 	int loopct = 0;		/* number of links followed
 				   without finding a data partition */
 	int i;
@@ -145,14 +148,14 @@
 		 * First process the data partition(s)
 		 */
 		for (i=0; i<4; i++, p++) {
-			u32 offs, size, next;
-			if (!NR_SECTS(p) || is_extended_partition(p))
+			sector_t offs, size, next;
+			if (!nr_sects(p) || is_extended_partition(p))
 				continue;
 
 			/* Check the 3rd and 4th entries -
 			   these sometimes contain random garbage */
-			offs = START_SECT(p)*sector_size;
-			size = NR_SECTS(p)*sector_size;
+			offs = start_sect(p)*sector_size;
+			size = nr_sects(p)*sector_size;
 			next = this_sector + offs;
 			if (i >= 2) {
 				if (offs + size > this_size)
@@ -179,13 +182,13 @@
 		 */
 		p -= 4;
 		for (i=0; i<4; i++, p++)
-			if (NR_SECTS(p) && is_extended_partition(p))
+			if (nr_sects(p) && is_extended_partition(p))
 				break;
 		if (i == 4)
 			goto done;	 /* nothing left to do */
 
-		this_sector = first_sector + START_SECT(p) * sector_size;
-		this_size = NR_SECTS(p) * sector_size;
+		this_sector = first_sector + start_sect(p) * sector_size;
+		this_size = nr_sects(p) * sector_size;
 		put_dev_sector(sect);
 	}
 done:
@@ -197,7 +200,7 @@
 
 static void
 parse_solaris_x86(struct parsed_partitions *state, struct block_device *bdev,
-			u32 offset, u32 size, int origin)
+			sector_t offset, sector_t size, int origin)
 {
 #ifdef CONFIG_SOLARIS_X86_PARTITION
 	Sector sect;
@@ -244,7 +247,7 @@
  */
 static void
 parse_bsd(struct parsed_partitions *state, struct block_device *bdev,
-		u32 offset, u32 size, int origin, char *flavour,
+		sector_t offset, sector_t size, int origin, char *flavour,
 		int max_partitions)
 {
 	Sector sect;
@@ -263,7 +266,7 @@
 	if (le16_to_cpu(l->d_npartitions) < max_partitions)
 		max_partitions = le16_to_cpu(l->d_npartitions);
 	for (p = l->d_partitions; p - l->d_partitions < max_partitions; p++) {
-		u32 bsd_start, bsd_size;
+		sector_t bsd_start, bsd_size;
 
 		if (state->next == state->limit)
 			break;
@@ -290,7 +293,7 @@
 
 static void
 parse_freebsd(struct parsed_partitions *state, struct block_device *bdev,
-		u32 offset, u32 size, int origin)
+		sector_t offset, sector_t size, int origin)
 {
 #ifdef CONFIG_BSD_DISKLABEL
 	parse_bsd(state, bdev, offset, size, origin,
@@ -300,7 +303,7 @@
 
 static void
 parse_netbsd(struct parsed_partitions *state, struct block_device *bdev,
-		u32 offset, u32 size, int origin)
+		sector_t offset, sector_t size, int origin)
 {
 #ifdef CONFIG_BSD_DISKLABEL
 	parse_bsd(state, bdev, offset, size, origin,
@@ -310,7 +313,7 @@
 
 static void
 parse_openbsd(struct parsed_partitions *state, struct block_device *bdev,
-		u32 offset, u32 size, int origin)
+		sector_t offset, sector_t size, int origin)
 {
 #ifdef CONFIG_BSD_DISKLABEL
 	parse_bsd(state, bdev, offset, size, origin,
@@ -324,7 +327,7 @@
  */
 static void
 parse_unixware(struct parsed_partitions *state, struct block_device *bdev,
-		u32 offset, u32 size, int origin)
+		sector_t offset, sector_t size, int origin)
 {
 #ifdef CONFIG_UNIXWARE_DISKLABEL
 	Sector sect;
@@ -348,7 +351,8 @@
 
 		if (p->s_label != UNIXWARE_FS_UNUSED)
 			put_partition(state, state->next++,
-						START_SECT(p), NR_SECTS(p));
+				      le32_to_cpu(p->start_sect),
+				      le32_to_cpu(p->nr_sects));
 		p++;
 	}
 	put_dev_sector(sect);
@@ -363,7 +367,7 @@
  */
 static void
 parse_minix(struct parsed_partitions *state, struct block_device *bdev,
-		u32 offset, u32 size, int origin)
+		sector_t offset, sector_t size, int origin)
 {
 #ifdef CONFIG_MINIX_SUBPARTITION
 	Sector sect;
@@ -390,7 +394,7 @@
 			/* add each partition in use */
 			if (SYS_IND(p) == MINIX_PARTITION)
 				put_partition(state, state->next++,
-					      START_SECT(p), NR_SECTS(p));
+					      start_sect(p), nr_sects(p));
 		}
 		printk(" >\n");
 	}
@@ -401,7 +405,7 @@
 static struct {
 	unsigned char id;
 	void (*parse)(struct parsed_partitions *, struct block_device *,
-			u32, u32, int);
+			sector_t, sector_t, int);
 } subtypes[] = {
 	{FREEBSD_PARTITION, parse_freebsd},
 	{NETBSD_PARTITION, parse_netbsd},
@@ -415,7 +419,7 @@
  
 int msdos_partition(struct parsed_partitions *state, struct block_device *bdev)
 {
-	int sector_size = bdev_logical_block_size(bdev) / 512;
+	sector_t sector_size = bdev_logical_block_size(bdev) / 512;
 	Sector sect;
 	unsigned char *data;
 	struct partition *p;
@@ -483,14 +487,21 @@
 
 	state->next = 5;
 	for (slot = 1 ; slot <= 4 ; slot++, p++) {
-		u32 start = START_SECT(p)*sector_size;
-		u32 size = NR_SECTS(p)*sector_size;
+		sector_t start = start_sect(p)*sector_size;
+		sector_t size = nr_sects(p)*sector_size;
 		if (!size)
 			continue;
 		if (is_extended_partition(p)) {
-			/* prevent someone doing mkfs or mkswap on an
-			   extended partition, but leave room for LILO */
-			put_partition(state, slot, start, size == 1 ? 1 : 2);
+			/*
+			 * prevent someone doing mkfs or mkswap on an
+			 * extended partition, but leave room for LILO
+			 * FIXME: this uses one logical sector for > 512b
+			 * sector, although it may not be enough/proper.
+			 */
+			sector_t n = 2;
+			n = min(size, max(sector_size, n));
+			put_partition(state, slot, start, n);
+
 			printk(" <");
 			parse_extended(state, bdev, start, size);
 			printk(" >");
@@ -513,7 +524,7 @@
 		unsigned char id = SYS_IND(p);
 		int n;
 
-		if (!NR_SECTS(p))
+		if (!nr_sects(p))
 			continue;
 
 		for (n = 0; subtypes[n].parse && id != subtypes[n].id; n++)
@@ -521,8 +532,8 @@
 
 		if (!subtypes[n].parse)
 			continue;
-		subtypes[n].parse(state, bdev, START_SECT(p)*sector_size,
-						NR_SECTS(p)*sector_size, slot);
+		subtypes[n].parse(state, bdev, start_sect(p)*sector_size,
+						nr_sects(p)*sector_size, slot);
 	}
 	put_dev_sector(sect);
 	return 1;
--- linux-mvl-dove-2.6.32.orig/fs/partitions/osf.c
+++ linux-mvl-dove-2.6.32/fs/partitions/osf.c
@@ -10,10 +10,13 @@
 #include "check.h"
 #include "osf.h"
 
+#define MAX_OSF_PARTITIONS 18
+
 int osf_partition(struct parsed_partitions *state, struct block_device *bdev)
 {
 	int i;
 	int slot = 1;
+	unsigned int npartitions;
 	Sector sect;
 	unsigned char *data;
 	struct disklabel {
@@ -45,7 +48,7 @@
 			u8  p_fstype;
 			u8  p_frag;
 			__le16 p_cpg;
-		} d_partitions[8];
+		} d_partitions[MAX_OSF_PARTITIONS];
 	} * label;
 	struct d_partition * partition;
 
@@ -63,7 +66,12 @@
 		put_dev_sector(sect);
 		return 0;
 	}
-	for (i = 0 ; i < le16_to_cpu(label->d_npartitions); i++, partition++) {
+	npartitions = le16_to_cpu(label->d_npartitions);
+	if (npartitions > MAX_OSF_PARTITIONS) {
+		put_dev_sector(sect);
+		return 0;
+	}
+	for (i = 0 ; i < npartitions; i++, partition++) {
 		if (slot == state->limit)
 		        break;
 		if (le32_to_cpu(partition->p_size))
--- linux-mvl-dove-2.6.32.orig/fs/partitions/ldm.c
+++ linux-mvl-dove-2.6.32/fs/partitions/ldm.c
@@ -251,6 +251,11 @@
 	}
 
 	vm->vblk_size     = get_unaligned_be32(data + 0x08);
+	if (vm->vblk_size == 0) {
+		ldm_error ("Illegal VBLK size");
+		return false;
+	}
+
 	vm->vblk_offset   = get_unaligned_be32(data + 0x0C);
 	vm->last_vblk_seq = get_unaligned_be32(data + 0x04);
 
@@ -1294,6 +1299,11 @@
 
 	BUG_ON (!data || !frags);
 
+	if (size < 2 * VBLK_SIZE_HEAD) {
+		ldm_error("Value of size is to small.");
+		return false;
+	}
+
 	group = get_unaligned_be32(data + 0x08);
 	rec   = get_unaligned_be16(data + 0x0C);
 	num   = get_unaligned_be16(data + 0x0E);
@@ -1301,6 +1311,10 @@
 		ldm_error ("A VBLK claims to have %d parts.", num);
 		return false;
 	}
+	if (rec >= num) {
+		ldm_error("REC value (%d) exceeds NUM value (%d)", rec, num);
+		return false;
+	}
 
 	list_for_each (item, frags) {
 		f = list_entry (item, struct frag, list);
@@ -1321,6 +1335,11 @@
 
 	list_add_tail (&f->list, frags);
 found:
+	if (rec >= f->num) {
+		ldm_error("REC value (%d) exceeds NUM value (%d)", rec, f->num);
+		return false;
+	}
+
 	if (f->map & (1 << rec)) {
 		ldm_error ("Duplicate VBLK, part %d.", rec);
 		f->map &= 0x7F;			/* Mark the group as broken */
@@ -1329,10 +1348,9 @@
 
 	f->map |= (1 << rec);
 
-	if (num > 0) {
-		data += VBLK_SIZE_HEAD;
-		size -= VBLK_SIZE_HEAD;
-	}
+	data += VBLK_SIZE_HEAD;
+	size -= VBLK_SIZE_HEAD;
+
 	memcpy (f->data+rec*(size-VBLK_SIZE_HEAD)+VBLK_SIZE_HEAD, data, size);
 
 	return true;
--- linux-mvl-dove-2.6.32.orig/fs/partitions/efi.c
+++ linux-mvl-dove-2.6.32/fs/partitions/efi.c
@@ -1,7 +1,9 @@
 /************************************************************
  * EFI GUID Partition Table handling
- * Per Intel EFI Specification v1.02
- * http://developer.intel.com/technology/efi/efi.htm
+ *
+ * http://www.uefi.org/specs/
+ * http://www.intel.com/technology/efi/
+ *
  * efi.[ch] by Matt Domsch <Matt_Domsch@dell.com>
  *   Copyright 2000,2001,2002,2004 Dell Inc.
  *
@@ -92,6 +94,7 @@
  *
  ************************************************************/
 #include <linux/crc32.h>
+#include <linux/math64.h>
 #include "check.h"
 #include "efi.h"
 
@@ -141,7 +144,8 @@
 {
 	if (!bdev || !bdev->bd_inode)
 		return 0;
-	return (bdev->bd_inode->i_size >> 9) - 1ULL;
+	return div_u64(bdev->bd_inode->i_size,
+		       bdev_logical_block_size(bdev)) - 1ULL;
 }
 
 static inline int
@@ -188,6 +192,7 @@
 read_lba(struct block_device *bdev, u64 lba, u8 * buffer, size_t count)
 {
 	size_t totalreadcount = 0;
+	sector_t n = lba * (bdev_logical_block_size(bdev) / 512);
 
 	if (!bdev || !buffer || lba > last_lba(bdev))
                 return 0;
@@ -195,7 +200,7 @@
 	while (count) {
 		int copied = 512;
 		Sector sect;
-		unsigned char *data = read_dev_sector(bdev, lba++, &sect);
+		unsigned char *data = read_dev_sector(bdev, n++, &sect);
 		if (!data)
 			break;
 		if (copied > count)
@@ -257,15 +262,16 @@
 alloc_read_gpt_header(struct block_device *bdev, u64 lba)
 {
 	gpt_header *gpt;
+	unsigned ssz = bdev_logical_block_size(bdev);
+
 	if (!bdev)
 		return NULL;
 
-	gpt = kzalloc(sizeof (gpt_header), GFP_KERNEL);
+	gpt = kzalloc(ssz, GFP_KERNEL);
 	if (!gpt)
 		return NULL;
 
-	if (read_lba(bdev, lba, (u8 *) gpt,
-		     sizeof (gpt_header)) < sizeof (gpt_header)) {
+	if (read_lba(bdev, lba, (u8 *) gpt, ssz) < ssz) {
 		kfree(gpt);
                 gpt=NULL;
 		return NULL;
@@ -305,6 +311,15 @@
 		goto fail;
 	}
 
+	/* Check the GUID Partition Table header size */
+	if (le32_to_cpu((*gpt)->header_size) >
+			bdev_logical_block_size(bdev)) {
+		pr_debug("GUID Partition Table Header size is wrong: %u > %u\n",
+			le32_to_cpu((*gpt)->header_size),
+			bdev_logical_block_size(bdev));
+		goto fail;
+	}
+
 	/* Check the GUID Partition Table CRC */
 	origcrc = le32_to_cpu((*gpt)->header_crc32);
 	(*gpt)->header_crc32 = 0;
@@ -343,6 +358,12 @@
 		goto fail;
 	}
 
+	/* Check that sizeof_partition_entry has the correct value */
+	if (le32_to_cpu((*gpt)->sizeof_partition_entry) != sizeof(gpt_entry)) {
+		pr_debug("GUID Partitition Entry Size check failed.\n");
+		goto fail;
+	}
+
 	if (!(*ptes = alloc_read_gpt_entries(bdev, *gpt)))
 		goto fail;
 
@@ -601,6 +622,7 @@
 	gpt_header *gpt = NULL;
 	gpt_entry *ptes = NULL;
 	u32 i;
+	unsigned ssz = bdev_logical_block_size(bdev) / 512;
 
 	if (!find_valid_gpt(bdev, &gpt, &ptes) || !gpt || !ptes) {
 		kfree(gpt);
@@ -611,13 +633,14 @@
 	pr_debug("GUID Partition Table is valid!  Yea!\n");
 
 	for (i = 0; i < le32_to_cpu(gpt->num_partition_entries) && i < state->limit-1; i++) {
+		u64 start = le64_to_cpu(ptes[i].starting_lba);
+		u64 size = le64_to_cpu(ptes[i].ending_lba) -
+			   le64_to_cpu(ptes[i].starting_lba) + 1ULL;
+
 		if (!is_pte_valid(&ptes[i], last_lba(bdev)))
 			continue;
 
-		put_partition(state, i+1, le64_to_cpu(ptes[i].starting_lba),
-				 (le64_to_cpu(ptes[i].ending_lba) -
-                                  le64_to_cpu(ptes[i].starting_lba) +
-				  1ULL));
+		put_partition(state, i+1, start * ssz, size * ssz);
 
 		/* If this is a RAID volume, tell md */
 		if (!efi_guidcmp(ptes[i].partition_type_guid,
--- linux-mvl-dove-2.6.32.orig/fs/devpts/inode.c
+++ linux-mvl-dove-2.6.32/fs/devpts/inode.c
@@ -517,11 +517,23 @@
 
 struct tty_struct *devpts_get_tty(struct inode *pts_inode, int number)
 {
+	struct dentry *dentry;
+	struct tty_struct *tty;
+
 	BUG_ON(pts_inode->i_rdev == MKDEV(TTYAUX_MAJOR, PTMX_MINOR));
 
+	/* Ensure dentry has not been deleted by devpts_pty_kill() */
+	dentry = d_find_alias(pts_inode);
+	if (!dentry)
+		return NULL;
+
+	tty = NULL;
 	if (pts_inode->i_sb->s_magic == DEVPTS_SUPER_MAGIC)
-		return (struct tty_struct *)pts_inode->i_private;
-	return NULL;
+		tty = (struct tty_struct *)pts_inode->i_private;
+
+	dput(dentry);
+
+	return tty;
 }
 
 void devpts_pty_kill(struct tty_struct *tty)
--- linux-mvl-dove-2.6.32.orig/fs/ramfs/file-nommu.c
+++ linux-mvl-dove-2.6.32/fs/ramfs/file-nommu.c
@@ -111,6 +111,7 @@
 		SetPageDirty(page);
 
 		unlock_page(page);
+		put_page(page);
 	}
 
 	return 0;
--- linux-mvl-dove-2.6.32.orig/fs/bfs/inode.c
+++ linux-mvl-dove-2.6.32/fs/bfs/inode.c
@@ -353,35 +353,35 @@
 	struct inode *inode;
 	unsigned i, imap_len;
 	struct bfs_sb_info *info;
-	long ret = -EINVAL;
+	int ret = -EINVAL;
 	unsigned long i_sblock, i_eblock, i_eoff, s_size;
 
 	info = kzalloc(sizeof(*info), GFP_KERNEL);
 	if (!info)
 		return -ENOMEM;
+	mutex_init(&info->bfs_lock);
 	s->s_fs_info = info;
 
 	sb_set_blocksize(s, BFS_BSIZE);
 
-	bh = sb_bread(s, 0);
-	if(!bh)
+	info->si_sbh = sb_bread(s, 0);
+	if (!info->si_sbh)
 		goto out;
-	bfs_sb = (struct bfs_super_block *)bh->b_data;
+	bfs_sb = (struct bfs_super_block *)info->si_sbh->b_data;
 	if (le32_to_cpu(bfs_sb->s_magic) != BFS_MAGIC) {
 		if (!silent)
 			printf("No BFS filesystem on %s (magic=%08x)\n", 
 				s->s_id,  le32_to_cpu(bfs_sb->s_magic));
-		goto out;
+		goto out1;
 	}
 	if (BFS_UNCLEAN(bfs_sb, s) && !silent)
 		printf("%s is unclean, continuing\n", s->s_id);
 
 	s->s_magic = BFS_MAGIC;
-	info->si_sbh = bh;
 
 	if (le32_to_cpu(bfs_sb->s_start) > le32_to_cpu(bfs_sb->s_end)) {
 		printf("Superblock is corrupted\n");
-		goto out;
+		goto out1;
 	}
 
 	info->si_lasti = (le32_to_cpu(bfs_sb->s_start) - BFS_BSIZE) /
@@ -390,7 +390,7 @@
 	imap_len = (info->si_lasti / 8) + 1;
 	info->si_imap = kzalloc(imap_len, GFP_KERNEL);
 	if (!info->si_imap)
-		goto out;
+		goto out1;
 	for (i = 0; i < BFS_ROOT_INO; i++)
 		set_bit(i, info->si_imap);
 
@@ -398,15 +398,13 @@
 	inode = bfs_iget(s, BFS_ROOT_INO);
 	if (IS_ERR(inode)) {
 		ret = PTR_ERR(inode);
-		kfree(info->si_imap);
-		goto out;
+		goto out2;
 	}
 	s->s_root = d_alloc_root(inode);
 	if (!s->s_root) {
 		iput(inode);
 		ret = -ENOMEM;
-		kfree(info->si_imap);
-		goto out;
+		goto out2;
 	}
 
 	info->si_blocks = (le32_to_cpu(bfs_sb->s_end) + 1) >> BFS_BSIZE_BITS;
@@ -419,10 +417,8 @@
 	bh = sb_bread(s, info->si_blocks - 1);
 	if (!bh) {
 		printf("Last block not available: %lu\n", info->si_blocks - 1);
-		iput(inode);
 		ret = -EIO;
-		kfree(info->si_imap);
-		goto out;
+		goto out3;
 	}
 	brelse(bh);
 
@@ -459,11 +455,8 @@
 			printf("Inode 0x%08x corrupted\n", i);
 
 			brelse(bh);
-			s->s_root = NULL;
-			kfree(info->si_imap);
-			kfree(info);
-			s->s_fs_info = NULL;
-			return -EIO;
+			ret = -EIO;
+			goto out3;
 		}
 
 		if (!di->i_ino) {
@@ -483,11 +476,17 @@
 		s->s_dirt = 1;
 	} 
 	dump_imap("read_super", s);
-	mutex_init(&info->bfs_lock);
 	return 0;
 
+out3:
+	dput(s->s_root);
+	s->s_root = NULL;
+out2:
+	kfree(info->si_imap);
+out1:
+	brelse(info->si_sbh);
 out:
-	brelse(bh);
+	mutex_destroy(&info->bfs_lock);
 	kfree(info);
 	s->s_fs_info = NULL;
 	return ret;
--- linux-mvl-dove-2.6.32.orig/fs/reiserfs/journal.c
+++ linux-mvl-dove-2.6.32/fs/reiserfs/journal.c
@@ -2184,6 +2184,15 @@
 		brelse(d_bh);
 		return 1;
 	}
+
+	if (bdev_read_only(sb->s_bdev)) {
+		reiserfs_warning(sb, "clm-2076",
+				 "device is readonly, unable to replay log");
+		brelse(c_bh);
+		brelse(d_bh);
+		return -EROFS;
+	}
+
 	trans_id = get_desc_trans_id(desc);
 	/* now we know we've got a good transaction, and it was inside the valid time ranges */
 	log_blocks = kmalloc(get_desc_trans_len(desc) *
@@ -2422,12 +2431,6 @@
 		goto start_log_replay;
 	}
 
-	if (continue_replay && bdev_read_only(sb->s_bdev)) {
-		reiserfs_warning(sb, "clm-2076",
-				 "device is readonly, unable to replay log");
-		return -1;
-	}
-
 	/* ok, there are transactions that need to be replayed.  start with the first log block, find
 	 ** all the valid transactions, and pick out the oldest.
 	 */
--- linux-mvl-dove-2.6.32.orig/fs/reiserfs/xattr.c
+++ linux-mvl-dove-2.6.32/fs/reiserfs/xattr.c
@@ -536,7 +536,7 @@
 	if (!err && new_size < i_size_read(dentry->d_inode)) {
 		struct iattr newattrs = {
 			.ia_ctime = current_fs_time(inode->i_sb),
-			.ia_size = buffer_size,
+			.ia_size = new_size,
 			.ia_valid = ATTR_SIZE | ATTR_CTIME,
 		};
 		mutex_lock_nested(&dentry->d_inode->i_mutex, I_MUTEX_XATTR);
@@ -952,21 +952,13 @@
 	return generic_permission(inode, mask, NULL);
 }
 
-/* This will catch lookups from the fs root to .reiserfs_priv */
-static int
-xattr_lookup_poison(struct dentry *dentry, struct qstr *q1, struct qstr *name)
-{
-	struct dentry *priv_root = REISERFS_SB(dentry->d_sb)->priv_root;
-	if (container_of(q1, struct dentry, d_name) == priv_root)
-		return -ENOENT;
-	if (q1->len == name->len &&
-		   !memcmp(q1->name, name->name, name->len))
-		return 0;
-	return 1;
+static int xattr_hide_revalidate(struct dentry *dentry, struct nameidata *nd)
+{
+	return -EPERM;
 }
 
 static const struct dentry_operations xattr_lookup_poison_ops = {
-	.d_compare = xattr_lookup_poison,
+	.d_revalidate = xattr_hide_revalidate,
 };
 
 int reiserfs_lookup_privroot(struct super_block *s)
@@ -980,8 +972,7 @@
 				strlen(PRIVROOT_NAME));
 	if (!IS_ERR(dentry)) {
 		REISERFS_SB(s)->priv_root = dentry;
-		if (!reiserfs_expose_privroot(s))
-			s->s_root->d_op = &xattr_lookup_poison_ops;
+		dentry->d_op = &xattr_lookup_poison_ops;
 		if (dentry->d_inode)
 			dentry->d_inode->i_flags |= S_PRIVATE;
 	} else
--- linux-mvl-dove-2.6.32.orig/fs/reiserfs/inode.c
+++ linux-mvl-dove-2.6.32/fs/reiserfs/inode.c
@@ -2531,6 +2531,12 @@
 	return reiserfs_write_full_page(page, wbc);
 }
 
+static void reiserfs_truncate_failed_write(struct inode *inode)
+{
+	truncate_inode_pages(inode->i_mapping, inode->i_size);
+	reiserfs_truncate_file(inode, 0);
+}
+
 static int reiserfs_write_begin(struct file *file,
 				struct address_space *mapping,
 				loff_t pos, unsigned len, unsigned flags,
@@ -2597,6 +2603,8 @@
 	if (ret) {
 		unlock_page(page);
 		page_cache_release(page);
+		/* Truncate allocated blocks */
+		reiserfs_truncate_failed_write(inode);
 	}
 	return ret;
 }
@@ -2689,8 +2697,7 @@
 	 ** transaction tracking stuff when the size changes.  So, we have
 	 ** to do the i_size updates here.
 	 */
-	pos += copied;
-	if (pos > inode->i_size) {
+	if (pos + copied > inode->i_size) {
 		struct reiserfs_transaction_handle myth;
 		reiserfs_write_lock(inode->i_sb);
 		/* If the file have grown beyond the border where it
@@ -2708,7 +2715,7 @@
 			goto journal_error;
 		}
 		reiserfs_update_inode_transaction(inode);
-		inode->i_size = pos;
+		inode->i_size = pos + copied;
 		/*
 		 * this will just nest into our transaction.  It's important
 		 * to use mark_inode_dirty so the inode gets pushed around on the
@@ -2735,6 +2742,10 @@
       out:
 	unlock_page(page);
 	page_cache_release(page);
+
+	if (pos + len > inode->i_size)
+		reiserfs_truncate_failed_write(inode);
+
 	return ret == 0 ? copied : ret;
 
       journal_error:
--- linux-mvl-dove-2.6.32.orig/fs/reiserfs/dir.c
+++ linux-mvl-dove-2.6.32/fs/reiserfs/dir.c
@@ -45,8 +45,6 @@
 				   struct reiserfs_de_head *deh)
 {
 	struct dentry *privroot = REISERFS_SB(dir->d_sb)->priv_root;
-	if (reiserfs_expose_privroot(dir->d_sb))
-		return 0;
 	return (dir == dir->d_parent && privroot->d_inode &&
 	        deh->deh_objectid == INODE_PKEY(privroot->d_inode)->k_objectid);
 }
--- linux-mvl-dove-2.6.32.orig/fs/reiserfs/xattr_security.c
+++ linux-mvl-dove-2.6.32/fs/reiserfs/xattr_security.c
@@ -75,7 +75,7 @@
 		return error;
 	}
 
-	if (sec->length) {
+	if (sec->length && reiserfs_xattrs_initialized(inode->i_sb)) {
 		blocks = reiserfs_xattr_jcreate_nblocks(inode) +
 			 reiserfs_xattr_nblocks(inode, sec->length);
 		/* We don't want to count the directories twice if we have
--- linux-mvl-dove-2.6.32.orig/fs/cifs/readdir.c
+++ linux-mvl-dove-2.6.32/fs/cifs/readdir.c
@@ -666,6 +666,7 @@
 					   min(len, max_len), nlt,
 					   cifs_sb->mnt_cifs_flags &
 						CIFS_MOUNT_MAP_SPECIAL_CHR);
+		pqst->len -= nls_nullsize(nlt);
 	} else {
 		pqst->name = filename;
 		pqst->len = len;
--- linux-mvl-dove-2.6.32.orig/fs/cifs/dns_resolve.h
+++ linux-mvl-dove-2.6.32/fs/cifs/dns_resolve.h
@@ -24,8 +24,10 @@
 #define _DNS_RESOLVE_H
 
 #ifdef __KERNEL__
-#include <linux/key-type.h>
-extern struct key_type key_type_dns_resolver;
+#include <linux/module.h>
+
+extern int __init cifs_init_dns_resolver(void);
+extern void cifs_exit_dns_resolver(void);
 extern int dns_resolve_server_name_to_ip(const char *unc, char **ip_addr);
 #endif /* KERNEL */
 
--- linux-mvl-dove-2.6.32.orig/fs/cifs/cifsglob.h
+++ linux-mvl-dove-2.6.32/fs/cifs/cifsglob.h
@@ -33,7 +33,7 @@
 #define MAX_SHARE_SIZE  64	/* used to be 20, this should still be enough */
 #define MAX_USERNAME_SIZE 32	/* 32 is to allow for 15 char names + null
 				   termination then *2 for unicode versions */
-#define MAX_PASSWORD_SIZE 16
+#define MAX_PASSWORD_SIZE 512  /* max for windows seems to be 256 wide chars */
 
 #define CIFS_MIN_RCV_POOL 4
 
@@ -499,6 +499,7 @@
 #define CIFS_FATTR_DFS_REFERRAL		0x1
 #define CIFS_FATTR_DELETE_PENDING	0x2
 #define CIFS_FATTR_NEED_REVAL		0x4
+#define CIFS_FATTR_INO_COLLISION	0x8
 
 struct cifs_fattr {
 	u32		cf_flags;
--- linux-mvl-dove-2.6.32.orig/fs/cifs/cifsproto.h
+++ linux-mvl-dove-2.6.32/fs/cifs/cifsproto.h
@@ -95,8 +95,10 @@
 				__u16 fileHandle, struct file *file,
 				struct vfsmount *mnt, unsigned int oflags);
 extern int cifs_posix_open(char *full_path, struct inode **pinode,
-			   struct vfsmount *mnt, int mode, int oflags,
-			   __u32 *poplock, __u16 *pnetfid, int xid);
+				struct vfsmount *mnt,
+				struct super_block *sb,
+				int mode, int oflags,
+				__u32 *poplock, __u16 *pnetfid, int xid);
 extern void cifs_unix_basic_to_fattr(struct cifs_fattr *fattr,
 				     FILE_UNIX_BASIC_INFO *info,
 				     struct cifs_sb_info *cifs_sb);
@@ -321,7 +323,7 @@
 			const __u16 netfid, const __u64 len,
 			const __u64 offset, const __u32 numUnlock,
 			const __u32 numLock, const __u8 lockType,
-			const bool waitFlag);
+			const bool waitFlag, const __u8 oplock_level);
 extern int CIFSSMBPosixLock(const int xid, struct cifsTconInfo *tcon,
 			const __u16 smb_file_id, const int get_flag,
 			const __u64 len, struct file_lock *,
--- linux-mvl-dove-2.6.32.orig/fs/cifs/inode.c
+++ linux-mvl-dove-2.6.32/fs/cifs/inode.c
@@ -610,6 +610,16 @@
 	if (CIFS_I(inode)->uniqueid != fattr->cf_uniqueid)
 		return 0;
 
+	/*
+	 * uh oh -- it's a directory. We can't use it since hardlinked dirs are
+	 * verboten. Disable serverino and return it as if it were found, the
+	 * caller can discard it, generate a uniqueid and retry the find
+	 */
+	if (S_ISDIR(inode->i_mode) && !list_empty(&inode->i_dentry)) {
+		fattr->cf_flags |= CIFS_FATTR_INO_COLLISION;
+		cifs_autodisable_serverino(CIFS_SB(inode->i_sb));
+	}
+
 	return 1;
 }
 
@@ -629,15 +639,22 @@
 	unsigned long hash;
 	struct inode *inode;
 
+retry_iget5_locked:
 	cFYI(1, ("looking for uniqueid=%llu", fattr->cf_uniqueid));
 
 	/* hash down to 32-bits on 32-bit arch */
 	hash = cifs_uniqueid_to_ino_t(fattr->cf_uniqueid);
 
 	inode = iget5_locked(sb, hash, cifs_find_inode, cifs_init_inode, fattr);
-
-	/* we have fattrs in hand, update the inode */
 	if (inode) {
+		/* was there a problematic inode number collision? */
+		if (fattr->cf_flags & CIFS_FATTR_INO_COLLISION) {
+			iput(inode);
+			fattr->cf_uniqueid = iunique(sb, ROOT_I);
+			fattr->cf_flags &= ~CIFS_FATTR_INO_COLLISION;
+			goto retry_iget5_locked;
+		}
+
 		cifs_fattr_to_inode(inode, fattr);
 		if (sb->s_flags & MS_NOATIME)
 			inode->i_flags |= S_NOATIME | S_NOCMTIME;
@@ -671,8 +688,10 @@
 		rc = cifs_get_inode_info(&inode, full_path, NULL, sb,
 						xid, NULL);
 
-	if (!inode)
-		return ERR_PTR(-ENOMEM);
+	if (!inode) {
+		inode = ERR_PTR(rc);
+		goto out;
+	}
 
 	if (rc && cifs_sb->tcon->ipc) {
 		cFYI(1, ("ipc connection - fake read inode"));
@@ -683,13 +702,11 @@
 		inode->i_uid = cifs_sb->mnt_uid;
 		inode->i_gid = cifs_sb->mnt_gid;
 	} else if (rc) {
-		kfree(full_path);
-		_FreeXid(xid);
 		iget_failed(inode);
-		return ERR_PTR(rc);
+		inode = ERR_PTR(rc);
 	}
 
-
+out:
 	kfree(full_path);
 	/* can not call macro FreeXid here since in a void func
 	 * TODO: This is no longer true
@@ -1267,6 +1284,10 @@
 	if (rc == 0 || rc != -ETXTBSY)
 		return rc;
 
+	/* open-file renames don't work across directories */
+	if (to_dentry->d_parent != from_dentry->d_parent)
+		return rc;
+
 	/* open the file to be renamed -- we need DELETE perms */
 	rc = CIFSSMBOpen(xid, pTcon, fromPath, FILE_OPEN, DELETE,
 			 CREATE_NOT_DIR, &srcfid, &oplock, NULL,
--- linux-mvl-dove-2.6.32.orig/fs/cifs/sess.c
+++ linux-mvl-dove-2.6.32/fs/cifs/sess.c
@@ -723,15 +723,7 @@
 
 		/* calculate session key */
 		setup_ntlmv2_rsp(ses, v2_sess_key, nls_cp);
-		if (first_time) /* should this be moved into common code
-				   with similar ntlmv2 path? */
-		/*   cifs_calculate_ntlmv2_mac_key(ses->server->mac_signing_key,
-				response BB FIXME, v2_sess_key); */
-
-		/* copy session key */
-
-	/*	memcpy(bcc_ptr, (char *)ntlm_session_key,LM2_SESS_KEY_SIZE);
-		bcc_ptr += LM2_SESS_KEY_SIZE; */
+		/* FIXME: calculate MAC key */
 		memcpy(bcc_ptr, (char *)v2_sess_key,
 		       sizeof(struct ntlmv2_resp));
 		bcc_ptr += sizeof(struct ntlmv2_resp);
@@ -914,7 +906,9 @@
 	}
 
 	/* BB check if Unicode and decode strings */
-	if (smb_buf->Flags2 & SMBFLG2_UNICODE) {
+	if (bytes_remaining == 0) {
+		/* no string area to decode, do nothing */
+	} else if (smb_buf->Flags2 & SMBFLG2_UNICODE) {
 		/* unicode string area must be word-aligned */
 		if (((unsigned long) bcc_ptr - (unsigned long) smb_buf) % 2) {
 			++bcc_ptr;
--- linux-mvl-dove-2.6.32.orig/fs/cifs/cifsfs.c
+++ linux-mvl-dove-2.6.32/fs/cifs/cifsfs.c
@@ -1033,7 +1033,7 @@
 		goto out_unregister_filesystem;
 #endif
 #ifdef CONFIG_CIFS_DFS_UPCALL
-	rc = register_key_type(&key_type_dns_resolver);
+	rc = cifs_init_dns_resolver();
 	if (rc)
 		goto out_unregister_key_type;
 #endif
@@ -1045,7 +1045,7 @@
 
  out_unregister_resolver_key:
 #ifdef CONFIG_CIFS_DFS_UPCALL
-	unregister_key_type(&key_type_dns_resolver);
+	cifs_exit_dns_resolver();
  out_unregister_key_type:
 #endif
 #ifdef CONFIG_CIFS_UPCALL
@@ -1071,7 +1071,7 @@
 	cifs_proc_clean();
 #ifdef CONFIG_CIFS_DFS_UPCALL
 	cifs_dfs_release_automount_timer();
-	unregister_key_type(&key_type_dns_resolver);
+	cifs_exit_dns_resolver();
 #endif
 #ifdef CONFIG_CIFS_UPCALL
 	unregister_key_type(&cifs_spnego_key_type);
--- linux-mvl-dove-2.6.32.orig/fs/cifs/cifssmb.c
+++ linux-mvl-dove-2.6.32/fs/cifs/cifssmb.c
@@ -1430,6 +1430,8 @@
 	__u32 bytes_sent;
 	__u16 byte_count;
 
+	*nbytes = 0;
+
 	/* cFYI(1, ("write at %lld %d bytes", offset, count));*/
 	if (tcon->ses == NULL)
 		return -ECONNABORTED;
@@ -1512,11 +1514,18 @@
 	cifs_stats_inc(&tcon->num_writes);
 	if (rc) {
 		cFYI(1, ("Send error in write = %d", rc));
-		*nbytes = 0;
 	} else {
 		*nbytes = le16_to_cpu(pSMBr->CountHigh);
 		*nbytes = (*nbytes) << 16;
 		*nbytes += le16_to_cpu(pSMBr->Count);
+
+		/*
+		 * Mask off high 16 bits when bytes written as returned by the
+		 * server is greater than bytes requested by the client. Some
+		 * OS/2 servers are known to set incorrect CountHigh values.
+		 */
+		if (*nbytes > count)
+			*nbytes &= 0xFFFF;
 	}
 
 	cifs_buf_release(pSMB);
@@ -1605,6 +1614,14 @@
 		*nbytes = le16_to_cpu(pSMBr->CountHigh);
 		*nbytes = (*nbytes) << 16;
 		*nbytes += le16_to_cpu(pSMBr->Count);
+
+		/*
+		 * Mask off high 16 bits when bytes written as returned by the
+		 * server is greater than bytes requested by the client. OS/2
+		 * servers are known to set incorrect CountHigh values.
+		 */
+		if (*nbytes > count)
+			*nbytes &= 0xFFFF;
 	}
 
 /*	cifs_small_buf_release(pSMB); */ /* Freed earlier now in SendReceive2 */
@@ -1624,7 +1641,8 @@
 CIFSSMBLock(const int xid, struct cifsTconInfo *tcon,
 	    const __u16 smb_file_id, const __u64 len,
 	    const __u64 offset, const __u32 numUnlock,
-	    const __u32 numLock, const __u8 lockType, const bool waitFlag)
+	    const __u32 numLock, const __u8 lockType,
+	    const bool waitFlag, const __u8 oplock_level)
 {
 	int rc = 0;
 	LOCK_REQ *pSMB = NULL;
@@ -1652,6 +1670,7 @@
 	pSMB->NumberOfLocks = cpu_to_le16(numLock);
 	pSMB->NumberOfUnlocks = cpu_to_le16(numUnlock);
 	pSMB->LockType = lockType;
+	pSMB->OplockLevel = oplock_level;
 	pSMB->AndXCommand = 0xFF;	/* none */
 	pSMB->Fid = smb_file_id; /* netfid stays le */
 
--- linux-mvl-dove-2.6.32.orig/fs/cifs/file.c
+++ linux-mvl-dove-2.6.32/fs/cifs/file.c
@@ -295,10 +295,12 @@
 	    (CIFS_UNIX_POSIX_PATH_OPS_CAP &
 			le64_to_cpu(tcon->fsUnixInfo.Capability))) {
 		int oflags = (int) cifs_posix_convert_flags(file->f_flags);
+		oflags |= SMB_O_CREAT;
 		/* can not refresh inode info since size could be stale */
 		rc = cifs_posix_open(full_path, &inode, file->f_path.mnt,
-				     cifs_sb->mnt_file_mode /* ignored */,
-				     oflags, &oplock, &netfid, xid);
+				inode->i_sb,
+				cifs_sb->mnt_file_mode /* ignored */,
+				oflags, &oplock, &netfid, xid);
 		if (rc == 0) {
 			cFYI(1, ("posix open succeeded"));
 			/* no need for special case handling of setting mode
@@ -510,8 +512,9 @@
 		int oflags = (int) cifs_posix_convert_flags(file->f_flags);
 		/* can not refresh inode info since size could be stale */
 		rc = cifs_posix_open(full_path, NULL, file->f_path.mnt,
-				     cifs_sb->mnt_file_mode /* ignored */,
-				     oflags, &oplock, &netfid, xid);
+				inode->i_sb,
+				cifs_sb->mnt_file_mode /* ignored */,
+				oflags, &oplock, &netfid, xid);
 		if (rc == 0) {
 			cFYI(1, ("posix reopen succeeded"));
 			goto reopen_success;
@@ -822,12 +825,12 @@
 
 		/* BB we could chain these into one lock request BB */
 		rc = CIFSSMBLock(xid, tcon, netfid, length, pfLock->fl_start,
-				 0, 1, lockType, 0 /* wait flag */ );
+				 0, 1, lockType, 0 /* wait flag */, 0);
 		if (rc == 0) {
 			rc = CIFSSMBLock(xid, tcon, netfid, length,
 					 pfLock->fl_start, 1 /* numUnlock */ ,
 					 0 /* numLock */ , lockType,
-					 0 /* wait flag */ );
+					 0 /* wait flag */, 0);
 			pfLock->fl_type = F_UNLCK;
 			if (rc != 0)
 				cERROR(1, ("Error unlocking previously locked "
@@ -870,8 +873,8 @@
 
 		if (numLock) {
 			rc = CIFSSMBLock(xid, tcon, netfid, length,
-					pfLock->fl_start,
-					0, numLock, lockType, wait_flag);
+					 pfLock->fl_start, 0, numLock, lockType,
+					 wait_flag, 0);
 
 			if (rc == 0) {
 				/* For Windows locks we must store them. */
@@ -891,9 +894,9 @@
 						(pfLock->fl_start + length) >=
 						(li->offset + li->length)) {
 					stored_rc = CIFSSMBLock(xid, tcon,
-							netfid,
-							li->length, li->offset,
-							1, 0, li->type, false);
+							netfid, li->length,
+							li->offset, 1, 0,
+							li->type, false, 0);
 					if (stored_rc)
 						rc = stored_rc;
 
@@ -2311,7 +2314,8 @@
 	 */
 	if (!cfile->closePend && !cfile->oplock_break_cancelled) {
 		rc = CIFSSMBLock(0, cifs_sb->tcon, cfile->netfid, 0, 0, 0, 0,
-				 LOCKING_ANDX_OPLOCK_RELEASE, false);
+				 LOCKING_ANDX_OPLOCK_RELEASE, false,
+				 cinode->clientCanCacheRead ? 1 : 0);
 		cFYI(1, ("Oplock release rc = %d", rc));
 	}
 }
--- linux-mvl-dove-2.6.32.orig/fs/cifs/dir.c
+++ linux-mvl-dove-2.6.32/fs/cifs/dir.c
@@ -183,13 +183,14 @@
 }
 
 int cifs_posix_open(char *full_path, struct inode **pinode,
-		    struct vfsmount *mnt, int mode, int oflags,
-		    __u32 *poplock, __u16 *pnetfid, int xid)
+			struct vfsmount *mnt, struct super_block *sb,
+			int mode, int oflags,
+			__u32 *poplock, __u16 *pnetfid, int xid)
 {
 	int rc;
 	FILE_UNIX_BASIC_INFO *presp_data;
 	__u32 posix_flags = 0;
-	struct cifs_sb_info *cifs_sb = CIFS_SB(mnt->mnt_sb);
+	struct cifs_sb_info *cifs_sb = CIFS_SB(sb);
 	struct cifs_fattr fattr;
 
 	cFYI(1, ("posix open %s", full_path));
@@ -241,7 +242,7 @@
 
 	/* get new inode and set it up */
 	if (*pinode == NULL) {
-		*pinode = cifs_iget(mnt->mnt_sb, &fattr);
+		*pinode = cifs_iget(sb, &fattr);
 		if (!*pinode) {
 			rc = -ENOMEM;
 			goto posix_open_ret;
@@ -250,7 +251,8 @@
 		cifs_fattr_to_inode(*pinode, &fattr);
 	}
 
-	cifs_new_fileinfo(*pinode, *pnetfid, NULL, mnt, oflags);
+	if (mnt)
+		cifs_new_fileinfo(*pinode, *pnetfid, NULL, mnt, oflags);
 
 posix_open_ret:
 	kfree(presp_data);
@@ -314,13 +316,14 @@
 	if (nd && (nd->flags & LOOKUP_OPEN))
 		oflags = nd->intent.open.flags;
 	else
-		oflags = FMODE_READ;
+		oflags = FMODE_READ | SMB_O_CREAT;
 
 	if (tcon->unix_ext && (tcon->ses->capabilities & CAP_UNIX) &&
 	    (CIFS_UNIX_POSIX_PATH_OPS_CAP &
 			le64_to_cpu(tcon->fsUnixInfo.Capability))) {
-		rc = cifs_posix_open(full_path, &newinode, nd->path.mnt,
-				     mode, oflags, &oplock, &fileHandle, xid);
+		rc = cifs_posix_open(full_path, &newinode,
+			nd ? nd->path.mnt : NULL,
+			inode->i_sb, mode, oflags, &oplock, &fileHandle, xid);
 		/* EIO could indicate that (posix open) operation is not
 		   supported, despite what server claimed in capability
 		   negotation.  EREMOTE indicates DFS junction, which is not
@@ -677,6 +680,7 @@
 		     (nd->flags & LOOKUP_OPEN) && !pTcon->broken_posix_open &&
 		     (nd->intent.open.flags & O_CREAT)) {
 			rc = cifs_posix_open(full_path, &newInode, nd->path.mnt,
+					parent_dir_inode->i_sb,
 					nd->intent.open.create_mode,
 					nd->intent.open.flags, &oplock,
 					&fileHandle, xid);
--- linux-mvl-dove-2.6.32.orig/fs/cifs/dns_resolve.c
+++ linux-mvl-dove-2.6.32/fs/cifs/dns_resolve.c
@@ -23,12 +23,16 @@
  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  */
 
+#include <linux/keyctl.h>
+#include <linux/key-type.h>
 #include <keys/user-type.h>
 #include "dns_resolve.h"
 #include "cifsglob.h"
 #include "cifsproto.h"
 #include "cifs_debug.h"
 
+static const struct cred *dns_resolver_cache;
+
 /* Checks if supplied name is IP address
  * returns:
  * 		1 - name is IP
@@ -93,6 +97,7 @@
 int
 dns_resolve_server_name_to_ip(const char *unc, char **ip_addr)
 {
+	const struct cred *saved_cred;
 	int rc = -EAGAIN;
 	struct key *rkey = ERR_PTR(-EAGAIN);
 	char *name;
@@ -132,8 +137,15 @@
 		goto skip_upcall;
 	}
 
+	saved_cred = override_creds(dns_resolver_cache);
 	rkey = request_key(&key_type_dns_resolver, name, "");
+	revert_creds(saved_cred);
 	if (!IS_ERR(rkey)) {
+		if (!(rkey->perm & KEY_USR_VIEW)) {
+			down_read(&rkey->sem);
+			rkey->perm |= KEY_USR_VIEW;
+			up_read(&rkey->sem);
+		}
 		len = rkey->type_data.x[0];
 		data = rkey->payload.data;
 	} else {
@@ -164,4 +176,61 @@
 	return rc;
 }
 
+int __init cifs_init_dns_resolver(void)
+{
+	struct cred *cred;
+	struct key *keyring;
+	int ret;
+
+	printk(KERN_NOTICE "Registering the %s key type\n",
+	       key_type_dns_resolver.name);
+
+	/* create an override credential set with a special thread keyring in
+	 * which DNS requests are cached
+	 *
+	 * this is used to prevent malicious redirections from being installed
+	 * with add_key().
+	 */
+	cred = prepare_kernel_cred(NULL);
+	if (!cred)
+		return -ENOMEM;
+
+	keyring = key_alloc(&key_type_keyring, ".dns_resolver", 0, 0, cred,
+			    (KEY_POS_ALL & ~KEY_POS_SETATTR) |
+			    KEY_USR_VIEW | KEY_USR_READ,
+			    KEY_ALLOC_NOT_IN_QUOTA);
+	if (IS_ERR(keyring)) {
+		ret = PTR_ERR(keyring);
+		goto failed_put_cred;
+	}
+
+	ret = key_instantiate_and_link(keyring, NULL, 0, NULL, NULL);
+	if (ret < 0)
+		goto failed_put_key;
+
+	ret = register_key_type(&key_type_dns_resolver);
+	if (ret < 0)
+		goto failed_put_key;
+
+	/* instruct request_key() to use this special keyring as a cache for
+	 * the results it looks up */
+	cred->thread_keyring = keyring;
+	cred->jit_keyring = KEY_REQKEY_DEFL_THREAD_KEYRING;
+	dns_resolver_cache = cred;
+	return 0;
+
+failed_put_key:
+	key_put(keyring);
+failed_put_cred:
+	put_cred(cred);
+	return ret;
+}
 
+void cifs_exit_dns_resolver(void)
+{
+	key_revoke(dns_resolver_cache->thread_keyring);
+	unregister_key_type(&key_type_dns_resolver);
+	put_cred(dns_resolver_cache);
+	printk(KERN_NOTICE "Unregistered %s key type\n",
+	       key_type_dns_resolver.name);
+}
--- linux-mvl-dove-2.6.32.orig/fs/cifs/connect.c
+++ linux-mvl-dove-2.6.32/fs/cifs/connect.c
@@ -799,8 +799,7 @@
 cifs_parse_mount_options(char *options, const char *devname,
 			 struct smb_vol *vol)
 {
-	char *value;
-	char *data;
+	char *value, *data, *end;
 	unsigned int  temp_len, i, j;
 	char separator[2];
 	short int override_uid = -1;
@@ -843,6 +842,7 @@
 	if (!options)
 		return 1;
 
+	end = options + strlen(options);
 	if (strncmp(options, "sep=", 4) == 0) {
 		if (options[4] != 0) {
 			separator[0] = options[4];
@@ -907,6 +907,7 @@
 			the only illegal character in a password is null */
 
 			if ((value[temp_len] == 0) &&
+			    (value + temp_len < end) &&
 			    (value[temp_len+1] == separator[0])) {
 				/* reinsert comma */
 				value[temp_len] = separator[0];
@@ -1587,17 +1588,29 @@
 }
 
 static struct cifsSesInfo *
-cifs_find_smb_ses(struct TCP_Server_Info *server, char *username)
+cifs_find_smb_ses(struct TCP_Server_Info *server, struct smb_vol *vol)
 {
-	struct list_head *tmp;
 	struct cifsSesInfo *ses;
 
 	write_lock(&cifs_tcp_ses_lock);
-	list_for_each(tmp, &server->smb_ses_list) {
-		ses = list_entry(tmp, struct cifsSesInfo, smb_ses_list);
-		if (strncmp(ses->userName, username, MAX_USERNAME_SIZE))
-			continue;
-
+	list_for_each_entry(ses, &server->smb_ses_list, smb_ses_list) {
+		switch (server->secType) {
+		case Kerberos:
+			if (vol->linux_uid != ses->linux_uid)
+				continue;
+			break;
+		default:
+			/* anything else takes username/password */
+			if (strncmp(ses->userName, vol->username,
+				    MAX_USERNAME_SIZE))
+				continue;
+			if (strlen(vol->username) != 0 &&
+			    ses->password != NULL &&
+			    strncmp(ses->password,
+				    vol->password ? vol->password : "",
+				    MAX_PASSWORD_SIZE))
+				continue;
+		}
 		++ses->ses_count;
 		write_unlock(&cifs_tcp_ses_lock);
 		return ses;
@@ -2230,6 +2243,11 @@
 			      0 /* not legacy */, cifs_sb->local_nls,
 			      cifs_sb->mnt_cifs_flags &
 				CIFS_MOUNT_MAP_SPECIAL_CHR);
+
+	if (rc == -EOPNOTSUPP || rc == -EINVAL)
+		rc = SMBQueryInformation(xid, tcon, full_path, pfile_info,
+				cifs_sb->local_nls, cifs_sb->mnt_cifs_flags &
+				  CIFS_MOUNT_MAP_SPECIAL_CHR);
 	kfree(pfile_info);
 	return rc;
 }
@@ -2287,12 +2305,12 @@
 cifs_mount(struct super_block *sb, struct cifs_sb_info *cifs_sb,
 		char *mount_data_global, const char *devname)
 {
-	int rc = 0;
+	int rc;
 	int xid;
 	struct smb_vol *volume_info;
-	struct cifsSesInfo *pSesInfo = NULL;
-	struct cifsTconInfo *tcon = NULL;
-	struct TCP_Server_Info *srvTcp = NULL;
+	struct cifsSesInfo *pSesInfo;
+	struct cifsTconInfo *tcon;
+	struct TCP_Server_Info *srvTcp;
 	char   *full_path;
 	char *mount_data = mount_data_global;
 #ifdef CONFIG_CIFS_DFS_UPCALL
@@ -2301,6 +2319,10 @@
 	int referral_walks_count = 0;
 try_mount_again:
 #endif
+	rc = 0;
+	tcon = NULL;
+	pSesInfo = NULL;
+	srvTcp = NULL;
 	full_path = NULL;
 
 	xid = GetXid();
@@ -2352,7 +2374,7 @@
 		goto out;
 	}
 
-	pSesInfo = cifs_find_smb_ses(srvTcp, volume_info->username);
+	pSesInfo = cifs_find_smb_ses(srvTcp, volume_info);
 	if (pSesInfo) {
 		cFYI(1, ("Existing smb sess found (status=%d)",
 			pSesInfo->status));
@@ -2528,7 +2550,7 @@
 
 remote_path_check:
 	/* check if a whole path (including prepath) is not remote */
-	if (!rc && cifs_sb->prepathlen && tcon) {
+	if (!rc && tcon) {
 		/* build_path_to_root works only when we have a valid tcon */
 		full_path = cifs_build_path_to_root(cifs_sb);
 		if (full_path == NULL) {
@@ -2597,6 +2619,7 @@
 
 			cleanup_volume_info(&volume_info);
 			referral_walks_count++;
+			FreeXid(xid);
 			goto try_mount_again;
 		}
 #else /* No DFS support, return error on mount */
--- linux-mvl-dove-2.6.32.orig/fs/affs/symlink.c
+++ linux-mvl-dove-2.6.32/fs/affs/symlink.c
@@ -20,7 +20,6 @@
 	int			 i, j;
 	char			 c;
 	char			 lc;
-	char			*pf;
 
 	pr_debug("AFFS: follow_link(ino=%lu)\n",inode->i_ino);
 
@@ -32,11 +31,15 @@
 	j  = 0;
 	lf = (struct slink_front *)bh->b_data;
 	lc = 0;
-	pf = AFFS_SB(inode->i_sb)->s_prefix ? AFFS_SB(inode->i_sb)->s_prefix : "/";
 
 	if (strchr(lf->symname,':')) {	/* Handle assign or volume name */
+		struct affs_sb_info *sbi = AFFS_SB(inode->i_sb);
+		char *pf;
+		spin_lock(&sbi->symlink_lock);
+		pf = sbi->s_prefix ? sbi->s_prefix : "/";
 		while (i < 1023 && (c = pf[i]))
 			link[i++] = c;
+		spin_unlock(&sbi->symlink_lock);
 		while (i < 1023 && lf->symname[j] != ':')
 			link[i++] = lf->symname[j++];
 		if (i < 1023)
--- linux-mvl-dove-2.6.32.orig/fs/affs/affs.h
+++ linux-mvl-dove-2.6.32/fs/affs/affs.h
@@ -106,8 +106,8 @@
 	u32 s_last_bmap;
 	struct buffer_head *s_bmap_bh;
 	char *s_prefix;			/* Prefix for volumes and assigns. */
-	int s_prefix_len;		/* Length of prefix. */
 	char s_volume[32];		/* Volume prefix for absolute symlinks. */
+	spinlock_t symlink_lock;	/* protects the previous two */
 };
 
 #define SF_INTL		0x0001		/* International filesystem. */
--- linux-mvl-dove-2.6.32.orig/fs/affs/namei.c
+++ linux-mvl-dove-2.6.32/fs/affs/namei.c
@@ -341,10 +341,13 @@
 	p  = (char *)AFFS_HEAD(bh)->table;
 	lc = '/';
 	if (*symname == '/') {
+		struct affs_sb_info *sbi = AFFS_SB(sb);
 		while (*symname == '/')
 			symname++;
-		while (AFFS_SB(sb)->s_volume[i])	/* Cannot overflow */
-			*p++ = AFFS_SB(sb)->s_volume[i++];
+		spin_lock(&sbi->symlink_lock);
+		while (sbi->s_volume[i])	/* Cannot overflow */
+			*p++ = sbi->s_volume[i++];
+		spin_unlock(&sbi->symlink_lock);
 	}
 	while (i < maxlen && (c = *symname++)) {
 		if (c == '.' && lc == '/' && *symname == '.' && symname[1] == '/') {
--- linux-mvl-dove-2.6.32.orig/fs/affs/super.c
+++ linux-mvl-dove-2.6.32/fs/affs/super.c
@@ -203,7 +203,7 @@
 		switch (token) {
 		case Opt_bs:
 			if (match_int(&args[0], &n))
-				return -EINVAL;
+				return 0;
 			if (n != 512 && n != 1024 && n != 2048
 			    && n != 4096) {
 				printk ("AFFS: Invalid blocksize (512, 1024, 2048, 4096 allowed)\n");
@@ -213,7 +213,7 @@
 			break;
 		case Opt_mode:
 			if (match_octal(&args[0], &option))
-				return 1;
+				return 0;
 			*mode = option & 0777;
 			*mount_opts |= SF_SETMODE;
 			break;
@@ -221,8 +221,6 @@
 			*mount_opts |= SF_MUFS;
 			break;
 		case Opt_prefix:
-			/* Free any previous prefix */
-			kfree(*prefix);
 			*prefix = match_strdup(&args[0]);
 			if (!*prefix)
 				return 0;
@@ -233,21 +231,21 @@
 			break;
 		case Opt_reserved:
 			if (match_int(&args[0], reserved))
-				return 1;
+				return 0;
 			break;
 		case Opt_root:
 			if (match_int(&args[0], root))
-				return 1;
+				return 0;
 			break;
 		case Opt_setgid:
 			if (match_int(&args[0], &option))
-				return 1;
+				return 0;
 			*gid = option;
 			*mount_opts |= SF_SETGID;
 			break;
 		case Opt_setuid:
 			if (match_int(&args[0], &option))
-				return -EINVAL;
+				return 0;
 			*uid = option;
 			*mount_opts |= SF_SETUID;
 			break;
@@ -311,11 +309,14 @@
 		return -ENOMEM;
 	sb->s_fs_info = sbi;
 	mutex_init(&sbi->s_bmlock);
+	spin_lock_init(&sbi->symlink_lock);
 
 	if (!parse_options(data,&uid,&gid,&i,&reserved,&root_block,
 				&blocksize,&sbi->s_prefix,
 				sbi->s_volume, &mount_flags)) {
 		printk(KERN_ERR "AFFS: Error parsing options\n");
+		kfree(sbi->s_prefix);
+		kfree(sbi);
 		return -EINVAL;
 	}
 	/* N.B. after this point s_prefix must be released */
@@ -516,14 +517,18 @@
 	unsigned long		 mount_flags;
 	int			 res = 0;
 	char			*new_opts = kstrdup(data, GFP_KERNEL);
+	char			 volume[32];
+	char			*prefix = NULL;
 
 	pr_debug("AFFS: remount(flags=0x%x,opts=\"%s\")\n",*flags,data);
 
 	*flags |= MS_NODIRATIME;
 
+	memcpy(volume, sbi->s_volume, 32);
 	if (!parse_options(data, &uid, &gid, &mode, &reserved, &root_block,
-			   &blocksize, &sbi->s_prefix, sbi->s_volume,
+			   &blocksize, &prefix, volume,
 			   &mount_flags)) {
+		kfree(prefix);
 		kfree(new_opts);
 		return -EINVAL;
 	}
@@ -534,6 +539,14 @@
 	sbi->s_mode  = mode;
 	sbi->s_uid   = uid;
 	sbi->s_gid   = gid;
+	/* protect against readers */
+	spin_lock(&sbi->symlink_lock);
+	if (prefix) {
+		kfree(sbi->s_prefix);
+		sbi->s_prefix = prefix;
+	}
+	memcpy(sbi->s_volume, volume, 32);
+	spin_unlock(&sbi->symlink_lock);
 
 	if ((*flags & MS_RDONLY) == (sb->s_flags & MS_RDONLY)) {
 		unlock_kernel();
--- linux-mvl-dove-2.6.32.orig/fs/nfsd/lockd.c
+++ linux-mvl-dove-2.6.32/fs/nfsd/lockd.c
@@ -44,7 +44,6 @@
 	exp_readlock();
 	nfserr = nfsd_open(rqstp, &fh, S_IFREG, NFSD_MAY_LOCK, filp);
 	fh_put(&fh);
-	rqstp->rq_client = NULL;
 	exp_readunlock();
  	/* We return nlm error codes as nlm doesn't know
 	 * about nfsd, but nfsd does know about nlm..
--- linux-mvl-dove-2.6.32.orig/fs/nfsd/nfs3xdr.c
+++ linux-mvl-dove-2.6.32/fs/nfsd/nfs3xdr.c
@@ -273,9 +273,11 @@
 	err = vfs_getattr(fhp->fh_export->ex_path.mnt, fhp->fh_dentry,
 			&fhp->fh_post_attr);
 	fhp->fh_post_change = fhp->fh_dentry->d_inode->i_version;
-	if (err)
+	if (err) {
 		fhp->fh_post_saved = 0;
-	else
+		/* Grab the ctime anyway - set_change_info might use it */
+		fhp->fh_post_attr.ctime = fhp->fh_dentry->d_inode->i_ctime;
+	} else
 		fhp->fh_post_saved = 1;
 }
 
--- linux-mvl-dove-2.6.32.orig/fs/nfsd/nfs4acl.c
+++ linux-mvl-dove-2.6.32/fs/nfsd/nfs4acl.c
@@ -389,7 +389,7 @@
 	sort_pacl_range(pacl, 1, i-1);
 
 	BUG_ON(pacl->a_entries[i].e_tag != ACL_GROUP_OBJ);
-	j = i++;
+	j = ++i;
 	while (pacl->a_entries[j].e_tag == ACL_GROUP)
 		j++;
 	sort_pacl_range(pacl, i, j-1);
--- linux-mvl-dove-2.6.32.orig/fs/nfsd/nfs4proc.c
+++ linux-mvl-dove-2.6.32/fs/nfsd/nfs4proc.c
@@ -964,8 +964,8 @@
 			      void *);
 enum nfsd4_op_flags {
 	ALLOWED_WITHOUT_FH = 1 << 0,	/* No current filehandle required */
-	ALLOWED_ON_ABSENT_FS = 2 << 0,	/* ops processed on absent fs */
-	ALLOWED_AS_FIRST_OP = 3 << 0,	/* ops reqired first in compound */
+	ALLOWED_ON_ABSENT_FS = 1 << 1,	/* ops processed on absent fs */
+	ALLOWED_AS_FIRST_OP = 1 << 2,	/* ops reqired first in compound */
 };
 
 struct nfsd4_operation {
--- linux-mvl-dove-2.6.32.orig/fs/nfsd/vfs.c
+++ linux-mvl-dove-2.6.32/fs/nfsd/vfs.c
@@ -774,12 +774,9 @@
 	int (*fsync) (struct file *, struct dentry *, int);
 	int err;
 
-	err = filemap_fdatawrite(inode->i_mapping);
+	err = filemap_write_and_wait(inode->i_mapping);
 	if (err == 0 && fop && (fsync = fop->fsync))
 		err = fsync(filp, dp, 0);
-	if (err == 0)
-		err = filemap_fdatawait(inode->i_mapping);
-
 	return err;
 }
 
@@ -826,7 +823,7 @@
 		if (ra->p_count == 0)
 			frap = rap;
 	}
-	depth = nfsdstats.ra_size*11/10;
+	depth = nfsdstats.ra_size;
 	if (!frap) {	
 		spin_unlock(&rab->pb_lock);
 		return NULL;
@@ -1382,7 +1379,7 @@
 		goto out;
 	if (!(iap->ia_valid & ATTR_MODE))
 		iap->ia_mode = 0;
-	err = fh_verify(rqstp, fhp, S_IFDIR, NFSD_MAY_CREATE);
+	err = fh_verify(rqstp, fhp, S_IFDIR, NFSD_MAY_EXEC);
 	if (err)
 		goto out;
 
@@ -1404,6 +1401,13 @@
 	if (IS_ERR(dchild))
 		goto out_nfserr;
 
+	/* If file doesn't exist, check for permissions to create one */
+	if (!dchild->d_inode) {
+		err = fh_verify(rqstp, fhp, S_IFDIR, NFSD_MAY_CREATE);
+		if (err)
+			goto out;
+	}
+
 	err = fh_compose(resfhp, fhp->fh_export, dchild, fhp);
 	if (err)
 		goto out;
--- linux-mvl-dove-2.6.32.orig/fs/nfsd/nfs4state.c
+++ linux-mvl-dove-2.6.32/fs/nfsd/nfs4state.c
@@ -2002,7 +2002,9 @@
 {
 	if (share_access & NFS4_SHARE_ACCESS_WRITE) {
 		drop_file_write_access(filp);
+		spin_lock(&filp->f_lock);
 		filp->f_mode = (filp->f_mode | FMODE_READ) & ~FMODE_WRITE;
+		spin_unlock(&filp->f_lock);
 	}
 }
 
--- linux-mvl-dove-2.6.32.orig/fs/nfsd/nfs4xdr.c
+++ linux-mvl-dove-2.6.32/fs/nfsd/nfs4xdr.c
@@ -168,10 +168,10 @@
 	argp->p = page_address(argp->pagelist[0]);
 	argp->pagelist++;
 	if (argp->pagelen < PAGE_SIZE) {
-		argp->end = p + (argp->pagelen>>2);
+		argp->end = argp->p + (argp->pagelen>>2);
 		argp->pagelen = 0;
 	} else {
-		argp->end = p + (PAGE_SIZE>>2);
+		argp->end = argp->p + (PAGE_SIZE>>2);
 		argp->pagelen -= PAGE_SIZE;
 	}
 	memcpy(((char*)p)+avail, argp->p, (nbytes - avail));
@@ -323,8 +323,8 @@
 		READ_BUF(dummy32);
 		len += (XDR_QUADLEN(dummy32) << 2);
 		READMEM(buf, dummy32);
-		if ((host_err = nfsd_map_name_to_uid(argp->rqstp, buf, dummy32, &iattr->ia_uid)))
-			goto out_nfserr;
+		if ((status = nfsd_map_name_to_uid(argp->rqstp, buf, dummy32, &iattr->ia_uid)))
+			return status;
 		iattr->ia_valid |= ATTR_UID;
 	}
 	if (bmval[1] & FATTR4_WORD1_OWNER_GROUP) {
@@ -334,8 +334,8 @@
 		READ_BUF(dummy32);
 		len += (XDR_QUADLEN(dummy32) << 2);
 		READMEM(buf, dummy32);
-		if ((host_err = nfsd_map_name_to_gid(argp->rqstp, buf, dummy32, &iattr->ia_gid)))
-			goto out_nfserr;
+		if ((status = nfsd_map_name_to_gid(argp->rqstp, buf, dummy32, &iattr->ia_gid)))
+			return status;
 		iattr->ia_valid |= ATTR_GID;
 	}
 	if (bmval[1] & FATTR4_WORD1_TIME_ACCESS_SET) {
@@ -1187,8 +1187,6 @@
 			READ_BUF(4);
 			READ32(dummy);
 			READ_BUF(dummy * 4);
-			for (i = 0; i < dummy; ++i)
-				READ32(dummy);
 			break;
 		case RPC_AUTH_GSS:
 			dprintk("RPC_AUTH_GSS callback secflavor "
@@ -1204,7 +1202,6 @@
 			READ_BUF(4);
 			READ32(dummy);
 			READ_BUF(dummy);
-			p += XDR_QUADLEN(dummy);
 			break;
 		default:
 			dprintk("Illegal callback secflavor\n");
@@ -1433,10 +1430,10 @@
 			argp->p = page_address(argp->pagelist[0]);
 			argp->pagelist++;
 			if (argp->pagelen < PAGE_SIZE) {
-				argp->end = p + (argp->pagelen>>2);
+				argp->end = argp->p + (argp->pagelen>>2);
 				argp->pagelen = 0;
 			} else {
-				argp->end = p + (PAGE_SIZE>>2);
+				argp->end = argp->p + (PAGE_SIZE>>2);
 				argp->pagelen -= PAGE_SIZE;
 			}
 		}
@@ -2129,9 +2126,15 @@
 		 * and this is the root of a cross-mounted filesystem.
 		 */
 		if (ignore_crossmnt == 0 &&
-		    exp->ex_path.mnt->mnt_root->d_inode == dentry->d_inode) {
-			err = vfs_getattr(exp->ex_path.mnt->mnt_parent,
-				exp->ex_path.mnt->mnt_mountpoint, &stat);
+		    dentry == exp->ex_path.mnt->mnt_root) {
+			struct path path = exp->ex_path;
+			path_get(&path);
+			while (follow_up(&path)) {
+				if (path.dentry != path.mnt->mnt_root)
+					break;
+			}
+			err = vfs_getattr(path.mnt, path.dentry, &stat);
+			path_put(&path);
 			if (err)
 				goto out_nfserr;
 		}
--- linux-mvl-dove-2.6.32.orig/fs/nfsd/nfssvc.c
+++ linux-mvl-dove-2.6.32/fs/nfsd/nfssvc.c
@@ -136,7 +136,7 @@
 int nfsd_vers(int vers, enum vers_op change)
 {
 	if (vers < NFSD_MINVERS || vers >= NFSD_NRVERS)
-		return -1;
+		return 0;
 	switch(change) {
 	case NFSD_SET:
 		nfsd_versions[vers] = nfsd_version[vers];
--- linux-mvl-dove-2.6.32.orig/fs/btrfs/ioctl.c
+++ linux-mvl-dove-2.6.32/fs/btrfs/ioctl.c
@@ -237,7 +237,6 @@
 	u64 objectid;
 	u64 new_dirid = BTRFS_FIRST_FREE_OBJECTID;
 	u64 index = 0;
-	unsigned long nr = 1;
 
 	/*
 	 * 1 - inode item
@@ -286,11 +285,15 @@
 	inode_item->nbytes = cpu_to_le64(root->leafsize);
 	inode_item->mode = cpu_to_le32(S_IFDIR | 0755);
 
+	root_item.flags = 0;
+	root_item.byte_limit = 0;
+	inode_item->flags = cpu_to_le64(BTRFS_INODE_ROOT_ITEM_INIT);
+
 	btrfs_set_root_bytenr(&root_item, leaf->start);
 	btrfs_set_root_generation(&root_item, trans->transid);
 	btrfs_set_root_level(&root_item, 0);
 	btrfs_set_root_refs(&root_item, 1);
-	btrfs_set_root_used(&root_item, 0);
+	btrfs_set_root_used(&root_item, leaf->len);
 	btrfs_set_root_last_snapshot(&root_item, 0);
 
 	memset(&root_item.drop_progress, 0, sizeof(root_item.drop_progress));
@@ -342,24 +345,21 @@
 
 	d_instantiate(dentry, btrfs_lookup_dentry(dir, dentry));
 fail:
-	nr = trans->blocks_used;
 	err = btrfs_commit_transaction(trans, root);
 	if (err && !ret)
 		ret = err;
 
 	btrfs_unreserve_metadata_space(root, 6);
-	btrfs_btree_balance_dirty(root, nr);
 	return ret;
 }
 
 static int create_snapshot(struct btrfs_root *root, struct dentry *dentry,
 			   char *name, int namelen)
 {
+	struct inode *inode;
 	struct btrfs_pending_snapshot *pending_snapshot;
 	struct btrfs_trans_handle *trans;
-	int ret = 0;
-	int err;
-	unsigned long nr = 0;
+	int ret;
 
 	if (!root->ref_cows)
 		return -EINVAL;
@@ -372,20 +372,20 @@
 	 */
 	ret = btrfs_reserve_metadata_space(root, 6);
 	if (ret)
-		goto fail_unlock;
+		goto fail;
 
 	pending_snapshot = kzalloc(sizeof(*pending_snapshot), GFP_NOFS);
 	if (!pending_snapshot) {
 		ret = -ENOMEM;
 		btrfs_unreserve_metadata_space(root, 6);
-		goto fail_unlock;
+		goto fail;
 	}
 	pending_snapshot->name = kmalloc(namelen + 1, GFP_NOFS);
 	if (!pending_snapshot->name) {
 		ret = -ENOMEM;
 		kfree(pending_snapshot);
 		btrfs_unreserve_metadata_space(root, 6);
-		goto fail_unlock;
+		goto fail;
 	}
 	memcpy(pending_snapshot->name, name, namelen);
 	pending_snapshot->name[namelen] = '\0';
@@ -395,10 +395,19 @@
 	pending_snapshot->root = root;
 	list_add(&pending_snapshot->list,
 		 &trans->transaction->pending_snapshots);
-	err = btrfs_commit_transaction(trans, root);
+	ret = btrfs_commit_transaction(trans, root);
+	BUG_ON(ret);
+	btrfs_unreserve_metadata_space(root, 6);
 
-fail_unlock:
-	btrfs_btree_balance_dirty(root, nr);
+	inode = btrfs_lookup_dentry(dentry->d_parent->d_inode, dentry);
+	if (IS_ERR(inode)) {
+		ret = PTR_ERR(inode);
+		goto fail;
+	}
+	BUG_ON(!inode);
+	d_instantiate(dentry, inode);
+	ret = 0;
+fail:
 	return ret;
 }
 
@@ -947,7 +956,7 @@
 	 */
 
 	/* the destination must be opened for writing */
-	if (!(file->f_mode & FMODE_WRITE))
+	if (!(file->f_mode & FMODE_WRITE) || (file->f_flags & O_APPEND))
 		return -EINVAL;
 
 	ret = mnt_want_write(file->f_path.mnt);
@@ -959,12 +968,17 @@
 		ret = -EBADF;
 		goto out_drop_write;
 	}
+
 	src = src_file->f_dentry->d_inode;
 
 	ret = -EINVAL;
 	if (src == inode)
 		goto out_fput;
 
+	/* the src must be open for reading */
+	if (!(src_file->f_mode & FMODE_READ))
+		goto out_fput;
+
 	ret = -EISDIR;
 	if (S_ISDIR(src->i_mode) || S_ISDIR(inode->i_mode))
 		goto out_fput;
@@ -995,7 +1009,7 @@
 
 	/* determine range to clone */
 	ret = -EINVAL;
-	if (off >= src->i_size || off + len > src->i_size)
+	if (off + len > src->i_size || off + len < off)
 		goto out_unlock;
 	if (len == 0)
 		olen = len = src->i_size - off;
@@ -1027,8 +1041,7 @@
 	BUG_ON(!trans);
 
 	/* punch hole in destination first */
-	btrfs_drop_extents(trans, root, inode, off, off + len,
-			   off + len, 0, &hint_byte, 1);
+	btrfs_drop_extents(trans, inode, off, off + len, &hint_byte, 1);
 
 	/* clone data */
 	key.objectid = src->i_ino;
--- linux-mvl-dove-2.6.32.orig/fs/btrfs/btrfs_inode.h
+++ linux-mvl-dove-2.6.32/fs/btrfs/btrfs_inode.h
@@ -44,9 +44,6 @@
 	 */
 	struct extent_io_tree io_failure_tree;
 
-	/* held while inesrting or deleting extents from files */
-	struct mutex extent_mutex;
-
 	/* held while logging the inode in tree-log.c */
 	struct mutex log_mutex;
 
@@ -166,7 +163,7 @@
 
 static inline void btrfs_i_size_write(struct inode *inode, u64 size)
 {
-	inode->i_size = size;
+	i_size_write(inode, size);
 	BTRFS_I(inode)->disk_i_size = size;
 }
 
--- linux-mvl-dove-2.6.32.orig/fs/btrfs/root-tree.c
+++ linux-mvl-dove-2.6.32/fs/btrfs/root-tree.c
@@ -459,3 +459,21 @@
 	btrfs_free_path(path);
 	return 0;
 }
+
+/*
+ * Old btrfs forgets to init root_item->flags and root_item->byte_limit
+ * for subvolumes. To work around this problem, we steal a bit from
+ * root_item->inode_item->flags, and use it to indicate if those fields
+ * have been properly initialized.
+ */
+void btrfs_check_and_init_root_item(struct btrfs_root_item *root_item)
+{
+	u64 inode_flags = le64_to_cpu(root_item->inode.flags);
+
+	if (!(inode_flags & BTRFS_INODE_ROOT_ITEM_INIT)) {
+		inode_flags |= BTRFS_INODE_ROOT_ITEM_INIT;
+		root_item->inode.flags = cpu_to_le64(inode_flags);
+		root_item->flags = 0;
+		root_item->byte_limit = 0;
+	}
+}
--- linux-mvl-dove-2.6.32.orig/fs/btrfs/extent-tree.c
+++ linux-mvl-dove-2.6.32/fs/btrfs/extent-tree.c
@@ -83,6 +83,17 @@
 	return (cache->flags & bits) == bits;
 }
 
+void btrfs_get_block_group(struct btrfs_block_group_cache *cache)
+{
+	atomic_inc(&cache->count);
+}
+
+void btrfs_put_block_group(struct btrfs_block_group_cache *cache)
+{
+	if (atomic_dec_and_test(&cache->count))
+		kfree(cache);
+}
+
 /*
  * this adds the block group to the fs_info rb tree for the block group
  * cache
@@ -156,7 +167,7 @@
 		}
 	}
 	if (ret)
-		atomic_inc(&ret->count);
+		btrfs_get_block_group(ret);
 	spin_unlock(&info->block_group_cache_lock);
 
 	return ret;
@@ -195,6 +206,14 @@
 	int stripe_len;
 	int i, nr, ret;
 
+	if (cache->key.objectid < BTRFS_SUPER_INFO_OFFSET) {
+		stripe_len = BTRFS_SUPER_INFO_OFFSET - cache->key.objectid;
+		cache->bytes_super += stripe_len;
+		ret = add_excluded_extent(root, cache->key.objectid,
+					  stripe_len);
+		BUG_ON(ret);
+	}
+
 	for (i = 0; i < BTRFS_SUPER_MIRROR_MAX; i++) {
 		bytenr = btrfs_sb_offset(i);
 		ret = btrfs_rmap_block(&root->fs_info->mapping_tree,
@@ -255,7 +274,7 @@
 		if (ret)
 			break;
 
-		if (extent_start == start) {
+		if (extent_start <= start) {
 			start = extent_end + 1;
 		} else if (extent_start > start && extent_start < end) {
 			size = extent_start - start;
@@ -399,6 +418,8 @@
 
 	put_caching_control(caching_ctl);
 	atomic_dec(&block_group->space_info->caching_threads);
+	btrfs_put_block_group(block_group);
+
 	return 0;
 }
 
@@ -439,6 +460,7 @@
 	up_write(&fs_info->extent_commit_sem);
 
 	atomic_inc(&cache->space_info->caching_threads);
+	btrfs_get_block_group(cache);
 
 	tsk = kthread_run(caching_kthread, cache, "btrfs-cache-%llu\n",
 			  cache->key.objectid);
@@ -478,12 +500,6 @@
 	return cache;
 }
 
-void btrfs_put_block_group(struct btrfs_block_group_cache *cache)
-{
-	if (atomic_dec_and_test(&cache->count))
-		kfree(cache);
-}
-
 static struct btrfs_space_info *__find_space_info(struct btrfs_fs_info *info,
 						  u64 flags)
 {
@@ -2574,7 +2590,7 @@
 	if (node) {
 		cache = rb_entry(node, struct btrfs_block_group_cache,
 				 cache_node);
-		atomic_inc(&cache->count);
+		btrfs_get_block_group(cache);
 	} else
 		cache = NULL;
 	spin_unlock(&root->fs_info->block_group_cache_lock);
@@ -2880,9 +2896,9 @@
 	root = async->root;
 	info = async->info;
 
-	btrfs_start_delalloc_inodes(root);
+	btrfs_start_delalloc_inodes(root, 0);
 	wake_up(&info->flush_wait);
-	btrfs_wait_ordered_extents(root, 0);
+	btrfs_wait_ordered_extents(root, 0, 0);
 
 	spin_lock(&info->lock);
 	info->flushing = 0;
@@ -2956,8 +2972,8 @@
 	return;
 
 flush:
-	btrfs_start_delalloc_inodes(root);
-	btrfs_wait_ordered_extents(root, 0);
+	btrfs_start_delalloc_inodes(root, 0);
+	btrfs_wait_ordered_extents(root, 0, 0);
 
 	spin_lock(&info->lock);
 	info->flushing = 0;
@@ -3454,14 +3470,6 @@
 	else
 		old_val -= num_bytes;
 	btrfs_set_super_bytes_used(&info->super_copy, old_val);
-
-	/* block accounting for root item */
-	old_val = btrfs_root_used(&root->root_item);
-	if (alloc)
-		old_val += num_bytes;
-	else
-		old_val -= num_bytes;
-	btrfs_set_root_used(&root->root_item, old_val);
 	spin_unlock(&info->delalloc_lock);
 
 	while (total) {
@@ -4049,6 +4057,21 @@
 	return ret;
 }
 
+int btrfs_free_tree_block(struct btrfs_trans_handle *trans,
+			  struct btrfs_root *root,
+			  u64 bytenr, u32 blocksize,
+			  u64 parent, u64 root_objectid, int level)
+{
+	u64 used;
+	spin_lock(&root->node_lock);
+	used = btrfs_root_used(&root->root_item) - blocksize;
+	btrfs_set_root_used(&root->root_item, used);
+	spin_unlock(&root->node_lock);
+
+	return btrfs_free_extent(trans, root, bytenr, blocksize,
+				 parent, root_objectid, level, 0);
+}
+
 static u64 stripe_align(struct btrfs_root *root, u64 val)
 {
 	u64 mask = ((u64)root->stripesize - 1);
@@ -4212,7 +4235,7 @@
 		u64 offset;
 		int cached;
 
-		atomic_inc(&block_group->count);
+		btrfs_get_block_group(block_group);
 		search_start = block_group->key.objectid;
 
 have_block_group:
@@ -4300,7 +4323,7 @@
 
 				btrfs_put_block_group(block_group);
 				block_group = last_ptr->block_group;
-				atomic_inc(&block_group->count);
+				btrfs_get_block_group(block_group);
 				spin_unlock(&last_ptr->lock);
 				spin_unlock(&last_ptr->refill_lock);
 
@@ -4578,7 +4601,6 @@
 {
 	int ret;
 	u64 search_start = 0;
-	struct btrfs_fs_info *info = root->fs_info;
 
 	data = btrfs_get_alloc_profile(root, data);
 again:
@@ -4586,17 +4608,9 @@
 	 * the only place that sets empty_size is btrfs_realloc_node, which
 	 * is not called recursively on allocations
 	 */
-	if (empty_size || root->ref_cows) {
-		if (!(data & BTRFS_BLOCK_GROUP_METADATA)) {
-			ret = do_chunk_alloc(trans, root->fs_info->extent_root,
-				     2 * 1024 * 1024,
-				     BTRFS_BLOCK_GROUP_METADATA |
-				     (info->metadata_alloc_profile &
-				      info->avail_metadata_alloc_bits), 0);
-		}
+	if (empty_size || root->ref_cows)
 		ret = do_chunk_alloc(trans, root->fs_info->extent_root,
 				     num_bytes + 2 * 1024 * 1024, data, 0);
-	}
 
 	WARN_ON(num_bytes < root->sectorsize);
 	ret = find_free_extent(trans, root, num_bytes, empty_size,
@@ -4897,6 +4911,14 @@
 					extent_op);
 		BUG_ON(ret);
 	}
+
+	if (root_objectid == root->root_key.objectid) {
+		u64 used;
+		spin_lock(&root->node_lock);
+		used = btrfs_root_used(&root->root_item) + num_bytes;
+		btrfs_set_root_used(&root->root_item, used);
+		spin_unlock(&root->node_lock);
+	}
 	return ret;
 }
 
@@ -4919,8 +4941,16 @@
 	btrfs_set_buffer_uptodate(buf);
 
 	if (root->root_key.objectid == BTRFS_TREE_LOG_OBJECTID) {
-		set_extent_dirty(&root->dirty_log_pages, buf->start,
-			 buf->start + buf->len - 1, GFP_NOFS);
+		/*
+		 * we allow two log transactions at a time, use different
+		 * EXENT bit to differentiate dirty pages.
+		 */
+		if (root->log_transid % 2 == 0)
+			set_extent_dirty(&root->dirty_log_pages, buf->start,
+					buf->start + buf->len - 1, GFP_NOFS);
+		else
+			set_extent_new(&root->dirty_log_pages, buf->start,
+					buf->start + buf->len - 1, GFP_NOFS);
 	} else {
 		set_extent_dirty(&trans->transaction->dirty_pages, buf->start,
 			 buf->start + buf->len - 1, GFP_NOFS);
@@ -5372,10 +5402,6 @@
 	int ret;
 
 	while (level >= 0) {
-		if (path->slots[level] >=
-		    btrfs_header_nritems(path->nodes[level]))
-			break;
-
 		ret = walk_down_proc(trans, root, path, wc, lookup_info);
 		if (ret > 0)
 			break;
@@ -5383,6 +5409,10 @@
 		if (level == 0)
 			break;
 
+		if (path->slots[level] >=
+		    btrfs_header_nritems(path->nodes[level]))
+			break;
+
 		ret = do_walk_down(trans, root, path, wc, &lookup_info);
 		if (ret > 0) {
 			path->slots[level]++;
@@ -7373,9 +7403,7 @@
 			wait_block_group_cache_done(block_group);
 
 		btrfs_remove_free_space_cache(block_group);
-
-		WARN_ON(atomic_read(&block_group->count) != 1);
-		kfree(block_group);
+		btrfs_put_block_group(block_group);
 
 		spin_lock(&info->block_group_cache_lock);
 	}
--- linux-mvl-dove-2.6.32.orig/fs/btrfs/dir-item.c
+++ linux-mvl-dove-2.6.32/fs/btrfs/dir-item.c
@@ -68,12 +68,12 @@
  * into the tree
  */
 int btrfs_insert_xattr_item(struct btrfs_trans_handle *trans,
-			    struct btrfs_root *root, const char *name,
-			    u16 name_len, const void *data, u16 data_len,
-			    u64 dir)
+			    struct btrfs_root *root,
+			    struct btrfs_path *path, u64 objectid,
+			    const char *name, u16 name_len,
+			    const void *data, u16 data_len)
 {
 	int ret = 0;
-	struct btrfs_path *path;
 	struct btrfs_dir_item *dir_item;
 	unsigned long name_ptr, data_ptr;
 	struct btrfs_key key, location;
@@ -81,15 +81,11 @@
 	struct extent_buffer *leaf;
 	u32 data_size;
 
-	key.objectid = dir;
+	BUG_ON(name_len + data_len > BTRFS_MAX_XATTR_SIZE(root));
+
+	key.objectid = objectid;
 	btrfs_set_key_type(&key, BTRFS_XATTR_ITEM_KEY);
 	key.offset = btrfs_name_hash(name, name_len);
-	path = btrfs_alloc_path();
-	if (!path)
-		return -ENOMEM;
-	if (name_len + data_len + sizeof(struct btrfs_dir_item) >
-	    BTRFS_LEAF_DATA_SIZE(root) - sizeof(struct btrfs_item))
-		return -ENOSPC;
 
 	data_size = sizeof(*dir_item) + name_len + data_len;
 	dir_item = insert_with_overflow(trans, root, path, &key, data_size,
@@ -117,7 +113,6 @@
 	write_extent_buffer(leaf, data, data_ptr, data_len);
 	btrfs_mark_buffer_dirty(path->nodes[0]);
 
-	btrfs_free_path(path);
 	return ret;
 }
 
--- linux-mvl-dove-2.6.32.orig/fs/btrfs/xattr.c
+++ linux-mvl-dove-2.6.32/fs/btrfs/xattr.c
@@ -85,22 +85,23 @@
 	return ret;
 }
 
-int __btrfs_setxattr(struct inode *inode, const char *name,
-			    const void *value, size_t size, int flags)
+static int do_setxattr(struct btrfs_trans_handle *trans,
+		       struct inode *inode, const char *name,
+		       const void *value, size_t size, int flags)
 {
 	struct btrfs_dir_item *di;
 	struct btrfs_root *root = BTRFS_I(inode)->root;
-	struct btrfs_trans_handle *trans;
 	struct btrfs_path *path;
-	int ret = 0, mod = 0;
+	size_t name_len = strlen(name);
+	int ret = 0;
+
+	if (name_len + size > BTRFS_MAX_XATTR_SIZE(root))
+		return -ENOSPC;
 
 	path = btrfs_alloc_path();
 	if (!path)
 		return -ENOMEM;
 
-	trans = btrfs_join_transaction(root, 1);
-	btrfs_set_trans_block_group(trans, inode);
-
 	/* first lets see if we already have this xattr */
 	di = btrfs_lookup_xattr(trans, root, path, inode->i_ino, name,
 				strlen(name), -1);
@@ -118,15 +119,12 @@
 		}
 
 		ret = btrfs_delete_one_dir_name(trans, root, path, di);
-		if (ret)
-			goto out;
+		BUG_ON(ret);
 		btrfs_release_path(root, path);
 
 		/* if we don't have a value then we are removing the xattr */
-		if (!value) {
-			mod = 1;
+		if (!value)
 			goto out;
-		}
 	} else {
 		btrfs_release_path(root, path);
 
@@ -138,20 +136,45 @@
 	}
 
 	/* ok we have to create a completely new xattr */
-	ret = btrfs_insert_xattr_item(trans, root, name, strlen(name),
-				      value, size, inode->i_ino);
+	ret = btrfs_insert_xattr_item(trans, root, path, inode->i_ino,
+				      name, name_len, value, size);
+	BUG_ON(ret);
+out:
+	btrfs_free_path(path);
+	return ret;
+}
+
+int __btrfs_setxattr(struct btrfs_trans_handle *trans,
+		     struct inode *inode, const char *name,
+		     const void *value, size_t size, int flags)
+{
+	struct btrfs_root *root = BTRFS_I(inode)->root;
+	int ret;
+
+	if (trans)
+		return do_setxattr(trans, inode, name, value, size, flags);
+
+	ret = btrfs_reserve_metadata_space(root, 2);
 	if (ret)
-		goto out;
-	mod = 1;
+		return ret;
 
-out:
-	if (mod) {
-		inode->i_ctime = CURRENT_TIME;
-		ret = btrfs_update_inode(trans, root, inode);
+	trans = btrfs_start_transaction(root, 1);
+	if (!trans) {
+		ret = -ENOMEM;
+		goto out;
 	}
+	btrfs_set_trans_block_group(trans, inode);
 
-	btrfs_end_transaction(trans, root);
-	btrfs_free_path(path);
+	ret = do_setxattr(trans, inode, name, value, size, flags);
+	if (ret)
+		goto out;
+
+	inode->i_ctime = CURRENT_TIME;
+	ret = btrfs_update_inode(trans, root, inode);
+	BUG_ON(ret);
+out:
+	btrfs_end_transaction_throttle(trans, root);
+	btrfs_unreserve_metadata_space(root, 2);
 	return ret;
 }
 
@@ -314,7 +337,9 @@
 
 	if (size == 0)
 		value = "";  /* empty EA, do not remove */
-	return __btrfs_setxattr(dentry->d_inode, name, value, size, flags);
+
+	return __btrfs_setxattr(NULL, dentry->d_inode, name, value, size,
+				flags);
 }
 
 int btrfs_removexattr(struct dentry *dentry, const char *name)
@@ -329,10 +354,13 @@
 
 	if (!btrfs_is_valid_xattr(name))
 		return -EOPNOTSUPP;
-	return __btrfs_setxattr(dentry->d_inode, name, NULL, 0, XATTR_REPLACE);
+
+	return __btrfs_setxattr(NULL, dentry->d_inode, name, NULL, 0,
+				XATTR_REPLACE);
 }
 
-int btrfs_xattr_security_init(struct inode *inode, struct inode *dir)
+int btrfs_xattr_security_init(struct btrfs_trans_handle *trans,
+			      struct inode *inode, struct inode *dir)
 {
 	int err;
 	size_t len;
@@ -354,7 +382,7 @@
 	} else {
 		strcpy(name, XATTR_SECURITY_PREFIX);
 		strcpy(name + XATTR_SECURITY_PREFIX_LEN, suffix);
-		err = __btrfs_setxattr(inode, name, value, len, 0);
+		err = __btrfs_setxattr(trans, inode, name, value, len, 0);
 		kfree(name);
 	}
 
--- linux-mvl-dove-2.6.32.orig/fs/btrfs/relocation.c
+++ linux-mvl-dove-2.6.32/fs/btrfs/relocation.c
@@ -1561,6 +1561,20 @@
 	return 0;
 }
 
+static void put_inodes(struct list_head *list)
+{
+	struct inodevec *ivec;
+	while (!list_empty(list)) {
+		ivec = list_entry(list->next, struct inodevec, list);
+		list_del(&ivec->list);
+		while (ivec->nr > 0) {
+			ivec->nr--;
+			iput(ivec->inode[ivec->nr]);
+		}
+		kfree(ivec);
+	}
+}
+
 static int find_next_key(struct btrfs_path *path, int level,
 			 struct btrfs_key *key)
 
@@ -1723,6 +1737,11 @@
 
 		btrfs_btree_balance_dirty(root, nr);
 
+		/*
+		 * put inodes outside transaction, otherwise we may deadlock.
+		 */
+		put_inodes(&inode_list);
+
 		if (replaced && rc->stage == UPDATE_DATA_PTRS)
 			invalidate_extent_cache(root, &key, &next_key);
 	}
@@ -1752,19 +1771,7 @@
 
 	btrfs_btree_balance_dirty(root, nr);
 
-	/*
-	 * put inodes while we aren't holding the tree locks
-	 */
-	while (!list_empty(&inode_list)) {
-		struct inodevec *ivec;
-		ivec = list_entry(inode_list.next, struct inodevec, list);
-		list_del(&ivec->list);
-		while (ivec->nr > 0) {
-			ivec->nr--;
-			iput(ivec->inode[ivec->nr]);
-		}
-		kfree(ivec);
-	}
+	put_inodes(&inode_list);
 
 	if (replaced && rc->stage == UPDATE_DATA_PTRS)
 		invalidate_extent_cache(root, &key, &next_key);
@@ -3274,8 +3281,10 @@
 		return -ENOMEM;
 
 	path = btrfs_alloc_path();
-	if (!path)
+	if (!path) {
+		kfree(cluster);
 		return -ENOMEM;
+	}
 
 	rc->extents_found = 0;
 	rc->extents_skipped = 0;
@@ -3534,8 +3543,8 @@
 	       (unsigned long long)rc->block_group->key.objectid,
 	       (unsigned long long)rc->block_group->flags);
 
-	btrfs_start_delalloc_inodes(fs_info->tree_root);
-	btrfs_wait_ordered_extents(fs_info->tree_root, 0);
+	btrfs_start_delalloc_inodes(fs_info->tree_root, 0);
+	btrfs_wait_ordered_extents(fs_info->tree_root, 0, 0);
 
 	while (1) {
 		rc->extents_found = 0;
@@ -3755,6 +3764,8 @@
 				       BTRFS_DATA_RELOC_TREE_OBJECTID);
 		if (IS_ERR(fs_root))
 			err = PTR_ERR(fs_root);
+		else
+			btrfs_orphan_cleanup(fs_root);
 	}
 	return err;
 }
--- linux-mvl-dove-2.6.32.orig/fs/btrfs/inode.c
+++ linux-mvl-dove-2.6.32/fs/btrfs/inode.c
@@ -88,13 +88,14 @@
 				   u64 start, u64 end, int *page_started,
 				   unsigned long *nr_written, int unlock);
 
-static int btrfs_init_inode_security(struct inode *inode,  struct inode *dir)
+static int btrfs_init_inode_security(struct btrfs_trans_handle *trans,
+				     struct inode *inode,  struct inode *dir)
 {
 	int err;
 
-	err = btrfs_init_acl(inode, dir);
+	err = btrfs_init_acl(trans, inode, dir);
 	if (!err)
-		err = btrfs_xattr_security_init(inode, dir);
+		err = btrfs_xattr_security_init(trans, inode, dir);
 	return err;
 }
 
@@ -188,8 +189,18 @@
 	btrfs_mark_buffer_dirty(leaf);
 	btrfs_free_path(path);
 
+	/*
+	 * we're an inline extent, so nobody can
+	 * extend the file past i_size without locking
+	 * a page we already have locked.
+	 *
+	 * We must do any isize and inode updates
+	 * before we unlock the pages.  Otherwise we
+	 * could end up racing with unlink.
+	 */
 	BTRFS_I(inode)->disk_i_size = inode->i_size;
 	btrfs_update_inode(trans, root, inode);
+
 	return 0;
 fail:
 	btrfs_free_path(path);
@@ -230,8 +241,7 @@
 		return 1;
 	}
 
-	ret = btrfs_drop_extents(trans, root, inode, start,
-				 aligned_end, aligned_end, start,
+	ret = btrfs_drop_extents(trans, inode, start, aligned_end,
 				 &hint_byte, 1);
 	BUG_ON(ret);
 
@@ -416,7 +426,6 @@
 						    start, end,
 						    total_compressed, pages);
 		}
-		btrfs_end_transaction(trans, root);
 		if (ret == 0) {
 			/*
 			 * inline extent creation worked, we don't need
@@ -430,9 +439,11 @@
 			     EXTENT_CLEAR_DELALLOC |
 			     EXTENT_CLEAR_ACCOUNTING |
 			     EXTENT_SET_WRITEBACK | EXTENT_END_WRITEBACK);
-			ret = 0;
+
+			btrfs_end_transaction(trans, root);
 			goto free_pages_out;
 		}
+		btrfs_end_transaction(trans, root);
 	}
 
 	if (will_compress) {
@@ -543,7 +554,6 @@
 	if (list_empty(&async_cow->extents))
 		return 0;
 
-	trans = btrfs_join_transaction(root, 1);
 
 	while (!list_empty(&async_cow->extents)) {
 		async_extent = list_entry(async_cow->extents.next,
@@ -590,19 +600,15 @@
 		lock_extent(io_tree, async_extent->start,
 			    async_extent->start + async_extent->ram_size - 1,
 			    GFP_NOFS);
-		/*
-		 * here we're doing allocation and writeback of the
-		 * compressed pages
-		 */
-		btrfs_drop_extent_cache(inode, async_extent->start,
-					async_extent->start +
-					async_extent->ram_size - 1, 0);
 
+		trans = btrfs_join_transaction(root, 1);
 		ret = btrfs_reserve_extent(trans, root,
 					   async_extent->compressed_size,
 					   async_extent->compressed_size,
 					   0, alloc_hint,
 					   (u64)-1, &ins, 1);
+		btrfs_end_transaction(trans, root);
+
 		if (ret) {
 			int i;
 			for (i = 0; i < async_extent->nr_pages; i++) {
@@ -618,6 +624,14 @@
 			goto retry;
 		}
 
+		/*
+		 * here we're doing allocation and writeback of the
+		 * compressed pages
+		 */
+		btrfs_drop_extent_cache(inode, async_extent->start,
+					async_extent->start +
+					async_extent->ram_size - 1, 0);
+
 		em = alloc_extent_map(GFP_NOFS);
 		em->start = async_extent->start;
 		em->len = async_extent->ram_size;
@@ -649,8 +663,6 @@
 					       BTRFS_ORDERED_COMPRESSED);
 		BUG_ON(ret);
 
-		btrfs_end_transaction(trans, root);
-
 		/*
 		 * clear dirty, set writeback and unlock the pages.
 		 */
@@ -672,13 +684,11 @@
 				    async_extent->nr_pages);
 
 		BUG_ON(ret);
-		trans = btrfs_join_transaction(root, 1);
 		alloc_hint = ins.objectid + ins.offset;
 		kfree(async_extent);
 		cond_resched();
 	}
 
-	btrfs_end_transaction(trans, root);
 	return 0;
 }
 
@@ -742,6 +752,7 @@
 				     EXTENT_CLEAR_DIRTY |
 				     EXTENT_SET_WRITEBACK |
 				     EXTENT_END_WRITEBACK);
+
 			*nr_written = *nr_written +
 			     (end - start + PAGE_CACHE_SIZE) / PAGE_CACHE_SIZE;
 			*page_started = 1;
@@ -1596,7 +1607,6 @@
 				       struct inode *inode, u64 file_pos,
 				       u64 disk_bytenr, u64 disk_num_bytes,
 				       u64 num_bytes, u64 ram_bytes,
-				       u64 locked_end,
 				       u8 compression, u8 encryption,
 				       u16 other_encoding, int extent_type)
 {
@@ -1622,9 +1632,8 @@
 	 * the caller is expected to unpin it and allow it to be merged
 	 * with the others.
 	 */
-	ret = btrfs_drop_extents(trans, root, inode, file_pos,
-				 file_pos + num_bytes, locked_end,
-				 file_pos, &hint, 0);
+	ret = btrfs_drop_extents(trans, inode, file_pos, file_pos + num_bytes,
+				 &hint, 0);
 	BUG_ON(ret);
 
 	ins.objectid = inode->i_ino;
@@ -1671,24 +1680,6 @@
  * before we start the transaction.  It limits the amount of btree
  * reads required while inside the transaction.
  */
-static noinline void reada_csum(struct btrfs_root *root,
-				struct btrfs_path *path,
-				struct btrfs_ordered_extent *ordered_extent)
-{
-	struct btrfs_ordered_sum *sum;
-	u64 bytenr;
-
-	sum = list_entry(ordered_extent->list.next, struct btrfs_ordered_sum,
-			 list);
-	bytenr = sum->sums[0].bytenr;
-
-	/*
-	 * we don't care about the results, the point of this search is
-	 * just to get the btree leaves into ram
-	 */
-	btrfs_lookup_csum(NULL, root->fs_info->csum_root, path, bytenr, 0);
-}
-
 /* as ordered data IO finishes, this gets called so we can finish
  * an ordered extent if the range of bytes in the file it covers are
  * fully written.
@@ -1699,7 +1690,6 @@
 	struct btrfs_trans_handle *trans;
 	struct btrfs_ordered_extent *ordered_extent = NULL;
 	struct extent_io_tree *io_tree = &BTRFS_I(inode)->io_tree;
-	struct btrfs_path *path;
 	int compressed = 0;
 	int ret;
 
@@ -1707,46 +1697,32 @@
 	if (!ret)
 		return 0;
 
-	/*
-	 * before we join the transaction, try to do some of our IO.
-	 * This will limit the amount of IO that we have to do with
-	 * the transaction running.  We're unlikely to need to do any
-	 * IO if the file extents are new, the disk_i_size checks
-	 * covers the most common case.
-	 */
-	if (start < BTRFS_I(inode)->disk_i_size) {
-		path = btrfs_alloc_path();
-		if (path) {
-			ret = btrfs_lookup_file_extent(NULL, root, path,
-						       inode->i_ino,
-						       start, 0);
-			ordered_extent = btrfs_lookup_ordered_extent(inode,
-								     start);
-			if (!list_empty(&ordered_extent->list)) {
-				btrfs_release_path(root, path);
-				reada_csum(root, path, ordered_extent);
-			}
-			btrfs_free_path(path);
+	ordered_extent = btrfs_lookup_ordered_extent(inode, start);
+	BUG_ON(!ordered_extent);
+
+	if (test_bit(BTRFS_ORDERED_NOCOW, &ordered_extent->flags)) {
+		BUG_ON(!list_empty(&ordered_extent->list));
+		ret = btrfs_ordered_update_i_size(inode, 0, ordered_extent);
+		if (!ret) {
+			trans = btrfs_join_transaction(root, 1);
+			ret = btrfs_update_inode(trans, root, inode);
+			BUG_ON(ret);
+			btrfs_end_transaction(trans, root);
 		}
+		goto out;
 	}
 
-	trans = btrfs_join_transaction(root, 1);
-
-	if (!ordered_extent)
-		ordered_extent = btrfs_lookup_ordered_extent(inode, start);
-	BUG_ON(!ordered_extent);
-	if (test_bit(BTRFS_ORDERED_NOCOW, &ordered_extent->flags))
-		goto nocow;
-
 	lock_extent(io_tree, ordered_extent->file_offset,
 		    ordered_extent->file_offset + ordered_extent->len - 1,
 		    GFP_NOFS);
 
+	trans = btrfs_join_transaction(root, 1);
+
 	if (test_bit(BTRFS_ORDERED_COMPRESSED, &ordered_extent->flags))
 		compressed = 1;
 	if (test_bit(BTRFS_ORDERED_PREALLOC, &ordered_extent->flags)) {
 		BUG_ON(compressed);
-		ret = btrfs_mark_extent_written(trans, root, inode,
+		ret = btrfs_mark_extent_written(trans, inode,
 						ordered_extent->file_offset,
 						ordered_extent->file_offset +
 						ordered_extent->len);
@@ -1758,8 +1734,6 @@
 						ordered_extent->disk_len,
 						ordered_extent->len,
 						ordered_extent->len,
-						ordered_extent->file_offset +
-						ordered_extent->len,
 						compressed, 0, 0,
 						BTRFS_FILE_EXTENT_REG);
 		unpin_extent_cache(&BTRFS_I(inode)->extent_tree,
@@ -1770,22 +1744,20 @@
 	unlock_extent(io_tree, ordered_extent->file_offset,
 		    ordered_extent->file_offset + ordered_extent->len - 1,
 		    GFP_NOFS);
-nocow:
 	add_pending_csums(trans, inode, ordered_extent->file_offset,
 			  &ordered_extent->list);
 
-	mutex_lock(&BTRFS_I(inode)->extent_mutex);
-	btrfs_ordered_update_i_size(inode, ordered_extent);
-	btrfs_update_inode(trans, root, inode);
-	btrfs_remove_ordered_extent(inode, ordered_extent);
-	mutex_unlock(&BTRFS_I(inode)->extent_mutex);
-
+	/* this also removes the ordered extent from the tree */
+	btrfs_ordered_update_i_size(inode, 0, ordered_extent);
+	ret = btrfs_update_inode(trans, root, inode);
+	BUG_ON(ret);
+	btrfs_end_transaction(trans, root);
+out:
 	/* once for us */
 	btrfs_put_ordered_extent(ordered_extent);
 	/* once for the tree */
 	btrfs_put_ordered_extent(ordered_extent);
 
-	btrfs_end_transaction(trans, root);
 	return 0;
 }
 
@@ -2008,6 +1980,54 @@
 	return -EIO;
 }
 
+struct delayed_iput {
+	struct list_head list;
+	struct inode *inode;
+};
+
+void btrfs_add_delayed_iput(struct inode *inode)
+{
+	struct btrfs_fs_info *fs_info = BTRFS_I(inode)->root->fs_info;
+	struct delayed_iput *delayed;
+
+	if (atomic_add_unless(&inode->i_count, -1, 1))
+		return;
+
+	delayed = kmalloc(sizeof(*delayed), GFP_NOFS | __GFP_NOFAIL);
+	delayed->inode = inode;
+
+	spin_lock(&fs_info->delayed_iput_lock);
+	list_add_tail(&delayed->list, &fs_info->delayed_iputs);
+	spin_unlock(&fs_info->delayed_iput_lock);
+}
+
+void btrfs_run_delayed_iputs(struct btrfs_root *root)
+{
+	LIST_HEAD(list);
+	struct btrfs_fs_info *fs_info = root->fs_info;
+	struct delayed_iput *delayed;
+	int empty;
+
+	spin_lock(&fs_info->delayed_iput_lock);
+	empty = list_empty(&fs_info->delayed_iputs);
+	spin_unlock(&fs_info->delayed_iput_lock);
+	if (empty)
+		return;
+
+	down_read(&root->fs_info->cleanup_work_sem);
+	spin_lock(&fs_info->delayed_iput_lock);
+	list_splice_init(&fs_info->delayed_iputs, &list);
+	spin_unlock(&fs_info->delayed_iput_lock);
+
+	while (!list_empty(&list)) {
+		delayed = list_entry(list.next, struct delayed_iput, list);
+		list_del(&delayed->list);
+		iput(delayed->inode);
+		kfree(delayed);
+	}
+	up_read(&root->fs_info->cleanup_work_sem);
+}
+
 /*
  * This creates an orphan entry for the given inode in case something goes
  * wrong in the middle of an unlink/truncate.
@@ -2080,16 +2100,17 @@
 	struct inode *inode;
 	int ret = 0, nr_unlink = 0, nr_truncate = 0;
 
-	path = btrfs_alloc_path();
-	if (!path)
+	if (!xchg(&root->clean_orphans, 0))
 		return;
+
+	path = btrfs_alloc_path();
+	BUG_ON(!path);
 	path->reada = -1;
 
 	key.objectid = BTRFS_ORPHAN_OBJECTID;
 	btrfs_set_key_type(&key, BTRFS_ORPHAN_ITEM_KEY);
 	key.offset = (u64)-1;
 
-
 	while (1) {
 		ret = btrfs_search_slot(NULL, root, &key, path, 0, 0);
 		if (ret < 0) {
@@ -2834,37 +2855,40 @@
  * min_type is the minimum key type to truncate down to.  If set to 0, this
  * will kill all the items on this inode, including the INODE_ITEM_KEY.
  */
-noinline int btrfs_truncate_inode_items(struct btrfs_trans_handle *trans,
-					struct btrfs_root *root,
-					struct inode *inode,
-					u64 new_size, u32 min_type)
+int btrfs_truncate_inode_items(struct btrfs_trans_handle *trans,
+			       struct btrfs_root *root,
+			       struct inode *inode,
+			       u64 new_size, u32 min_type)
 {
-	int ret;
 	struct btrfs_path *path;
-	struct btrfs_key key;
-	struct btrfs_key found_key;
-	u32 found_type = (u8)-1;
 	struct extent_buffer *leaf;
 	struct btrfs_file_extent_item *fi;
+	struct btrfs_key key;
+	struct btrfs_key found_key;
 	u64 extent_start = 0;
 	u64 extent_num_bytes = 0;
 	u64 extent_offset = 0;
 	u64 item_end = 0;
+	u64 mask = root->sectorsize - 1;
+	u32 found_type = (u8)-1;
 	int found_extent;
 	int del_item;
 	int pending_del_nr = 0;
 	int pending_del_slot = 0;
 	int extent_type = -1;
 	int encoding;
-	u64 mask = root->sectorsize - 1;
+	int ret;
+	int err = 0;
+
+	BUG_ON(new_size > 0 && min_type != BTRFS_EXTENT_DATA_KEY);
 
 	if (root->ref_cows)
 		btrfs_drop_extent_cache(inode, new_size & (~mask), (u64)-1, 0);
+
 	path = btrfs_alloc_path();
 	BUG_ON(!path);
 	path->reada = -1;
 
-	/* FIXME, add redo link to tree so we don't leak on crash */
 	key.objectid = inode->i_ino;
 	key.offset = (u64)-1;
 	key.type = (u8)-1;
@@ -2872,17 +2896,17 @@
 search_again:
 	path->leave_spinning = 1;
 	ret = btrfs_search_slot(trans, root, &key, path, -1, 1);
-	if (ret < 0)
-		goto error;
+	if (ret < 0) {
+		err = ret;
+		goto out;
+	}
 
 	if (ret > 0) {
 		/* there are no items in the tree for us to truncate, we're
 		 * done
 		 */
-		if (path->slots[0] == 0) {
-			ret = 0;
-			goto error;
-		}
+		if (path->slots[0] == 0)
+			goto out;
 		path->slots[0]--;
 	}
 
@@ -2917,28 +2941,17 @@
 			}
 			item_end--;
 		}
-		if (item_end < new_size) {
-			if (found_type == BTRFS_DIR_ITEM_KEY)
-				found_type = BTRFS_INODE_ITEM_KEY;
-			else if (found_type == BTRFS_EXTENT_ITEM_KEY)
-				found_type = BTRFS_EXTENT_DATA_KEY;
-			else if (found_type == BTRFS_EXTENT_DATA_KEY)
-				found_type = BTRFS_XATTR_ITEM_KEY;
-			else if (found_type == BTRFS_XATTR_ITEM_KEY)
-				found_type = BTRFS_INODE_REF_KEY;
-			else if (found_type)
-				found_type--;
-			else
+		if (found_type > min_type) {
+			del_item = 1;
+		} else {
+			if (item_end < new_size)
 				break;
-			btrfs_set_key_type(&key, found_type);
-			goto next;
+			if (found_key.offset >= new_size)
+				del_item = 1;
+			else
+				del_item = 0;
 		}
-		if (found_key.offset >= new_size)
-			del_item = 1;
-		else
-			del_item = 0;
 		found_extent = 0;
-
 		/* FIXME, shrink the extent if the ref count is only 1 */
 		if (found_type != BTRFS_EXTENT_DATA_KEY)
 			goto delete;
@@ -3025,42 +3038,36 @@
 						inode->i_ino, extent_offset);
 			BUG_ON(ret);
 		}
-next:
-		if (path->slots[0] == 0) {
-			if (pending_del_nr)
-				goto del_pending;
-			btrfs_release_path(root, path);
-			if (found_type == BTRFS_INODE_ITEM_KEY)
-				break;
-			goto search_again;
-		}
 
-		path->slots[0]--;
-		if (pending_del_nr &&
-		    path->slots[0] + 1 != pending_del_slot) {
-			struct btrfs_key debug;
-del_pending:
-			btrfs_item_key_to_cpu(path->nodes[0], &debug,
-					      pending_del_slot);
-			ret = btrfs_del_items(trans, root, path,
-					      pending_del_slot,
-					      pending_del_nr);
-			BUG_ON(ret);
-			pending_del_nr = 0;
+		if (found_type == BTRFS_INODE_ITEM_KEY)
+			break;
+
+		if (path->slots[0] == 0 ||
+		    path->slots[0] != pending_del_slot) {
+			if (root->ref_cows) {
+				err = -EAGAIN;
+				goto out;
+			}
+			if (pending_del_nr) {
+				ret = btrfs_del_items(trans, root, path,
+						pending_del_slot,
+						pending_del_nr);
+				BUG_ON(ret);
+				pending_del_nr = 0;
+			}
 			btrfs_release_path(root, path);
-			if (found_type == BTRFS_INODE_ITEM_KEY)
-				break;
 			goto search_again;
+		} else {
+			path->slots[0]--;
 		}
 	}
-	ret = 0;
-error:
+out:
 	if (pending_del_nr) {
 		ret = btrfs_del_items(trans, root, path, pending_del_slot,
 				      pending_del_nr);
 	}
 	btrfs_free_path(path);
-	return ret;
+	return err;
 }
 
 /*
@@ -3180,10 +3187,6 @@
 	if (size <= hole_start)
 		return 0;
 
-	err = btrfs_truncate_page(inode->i_mapping, inode->i_size);
-	if (err)
-		return err;
-
 	while (1) {
 		struct btrfs_ordered_extent *ordered;
 		btrfs_wait_ordered_range(inode, hole_start,
@@ -3196,9 +3199,6 @@
 		btrfs_put_ordered_extent(ordered);
 	}
 
-	trans = btrfs_start_transaction(root, 1);
-	btrfs_set_trans_block_group(trans, inode);
-
 	cur_offset = hole_start;
 	while (1) {
 		em = btrfs_get_extent(inode, NULL, 0, cur_offset,
@@ -3206,40 +3206,120 @@
 		BUG_ON(IS_ERR(em) || !em);
 		last_byte = min(extent_map_end(em), block_end);
 		last_byte = (last_byte + mask) & ~mask;
-		if (test_bit(EXTENT_FLAG_VACANCY, &em->flags)) {
+		if (!test_bit(EXTENT_FLAG_PREALLOC, &em->flags)) {
 			u64 hint_byte = 0;
 			hole_size = last_byte - cur_offset;
-			err = btrfs_drop_extents(trans, root, inode,
-						 cur_offset,
-						 cur_offset + hole_size,
-						 block_end,
-						 cur_offset, &hint_byte, 1);
-			if (err)
-				break;
 
-			err = btrfs_reserve_metadata_space(root, 1);
+			err = btrfs_reserve_metadata_space(root, 2);
 			if (err)
 				break;
 
+			trans = btrfs_start_transaction(root, 1);
+			btrfs_set_trans_block_group(trans, inode);
+
+			err = btrfs_drop_extents(trans, inode, cur_offset,
+						 cur_offset + hole_size,
+						 &hint_byte, 1);
+			BUG_ON(err);
+
 			err = btrfs_insert_file_extent(trans, root,
 					inode->i_ino, cur_offset, 0,
 					0, hole_size, 0, hole_size,
 					0, 0, 0);
+			BUG_ON(err);
+
 			btrfs_drop_extent_cache(inode, hole_start,
 					last_byte - 1, 0);
-			btrfs_unreserve_metadata_space(root, 1);
+
+			btrfs_end_transaction(trans, root);
+			btrfs_unreserve_metadata_space(root, 2);
 		}
 		free_extent_map(em);
 		cur_offset = last_byte;
-		if (err || cur_offset >= block_end)
+		if (cur_offset >= block_end)
 			break;
 	}
 
-	btrfs_end_transaction(trans, root);
 	unlock_extent(io_tree, hole_start, block_end - 1, GFP_NOFS);
 	return err;
 }
 
+static int btrfs_setattr_size(struct inode *inode, struct iattr *attr)
+{
+	struct btrfs_root *root = BTRFS_I(inode)->root;
+	struct btrfs_trans_handle *trans;
+	unsigned long nr;
+	int ret;
+
+	if (attr->ia_size == inode->i_size)
+		return 0;
+
+	if (attr->ia_size > inode->i_size) {
+		unsigned long limit;
+		limit = current->signal->rlim[RLIMIT_FSIZE].rlim_cur;
+		if (attr->ia_size > inode->i_sb->s_maxbytes)
+			return -EFBIG;
+		if (limit != RLIM_INFINITY && attr->ia_size > limit) {
+			send_sig(SIGXFSZ, current, 0);
+			return -EFBIG;
+		}
+	}
+
+	ret = btrfs_reserve_metadata_space(root, 1);
+	if (ret)
+		return ret;
+
+	trans = btrfs_start_transaction(root, 1);
+	btrfs_set_trans_block_group(trans, inode);
+
+	ret = btrfs_orphan_add(trans, inode);
+	BUG_ON(ret);
+
+	nr = trans->blocks_used;
+	btrfs_end_transaction(trans, root);
+	btrfs_unreserve_metadata_space(root, 1);
+	btrfs_btree_balance_dirty(root, nr);
+
+	if (attr->ia_size > inode->i_size) {
+		ret = btrfs_cont_expand(inode, attr->ia_size);
+		if (ret) {
+			btrfs_truncate(inode);
+			return ret;
+		}
+
+		i_size_write(inode, attr->ia_size);
+		btrfs_ordered_update_i_size(inode, inode->i_size, NULL);
+
+		trans = btrfs_start_transaction(root, 1);
+		btrfs_set_trans_block_group(trans, inode);
+
+		ret = btrfs_update_inode(trans, root, inode);
+		BUG_ON(ret);
+		if (inode->i_nlink > 0) {
+			ret = btrfs_orphan_del(trans, inode);
+			BUG_ON(ret);
+		}
+		nr = trans->blocks_used;
+		btrfs_end_transaction(trans, root);
+		btrfs_btree_balance_dirty(root, nr);
+		return 0;
+	}
+
+	/*
+	 * We're truncating a file that used to have good data down to
+	 * zero. Make sure it gets into the ordered flush list so that
+	 * any new writes get down to disk quickly.
+	 */
+	if (attr->ia_size == 0)
+		BTRFS_I(inode)->ordered_data_close = 1;
+
+	/* we don't support swapfiles, so vmtruncate shouldn't fail */
+	ret = vmtruncate(inode, attr->ia_size);
+	BUG_ON(ret);
+
+	return 0;
+}
+
 static int btrfs_setattr(struct dentry *dentry, struct iattr *attr)
 {
 	struct inode *inode = dentry->d_inode;
@@ -3250,23 +3330,14 @@
 		return err;
 
 	if (S_ISREG(inode->i_mode) && (attr->ia_valid & ATTR_SIZE)) {
-		if (attr->ia_size > inode->i_size) {
-			err = btrfs_cont_expand(inode, attr->ia_size);
-			if (err)
-				return err;
-		} else if (inode->i_size > 0 &&
-			   attr->ia_size == 0) {
-
-			/* we're truncating a file that used to have good
-			 * data down to zero.  Make sure it gets into
-			 * the ordered flush list so that any new writes
-			 * get down to disk quickly.
-			 */
-			BTRFS_I(inode)->ordered_data_close = 1;
-		}
+		err = btrfs_setattr_size(inode, attr);
+		if (err)
+			return err;
 	}
+	attr->ia_valid &= ~ATTR_SIZE;
 
-	err = inode_setattr(inode, attr);
+	if (attr->ia_valid)
+		err = inode_setattr(inode, attr);
 
 	if (!err && ((attr->ia_valid & ATTR_MODE)))
 		err = btrfs_acl_chmod(inode);
@@ -3287,36 +3358,43 @@
 	}
 	btrfs_wait_ordered_range(inode, 0, (u64)-1);
 
+	if (root->fs_info->log_root_recovering) {
+		BUG_ON(!list_empty(&BTRFS_I(inode)->i_orphan));
+		goto no_delete;
+	}
+
 	if (inode->i_nlink > 0) {
 		BUG_ON(btrfs_root_refs(&root->root_item) != 0);
 		goto no_delete;
 	}
 
 	btrfs_i_size_write(inode, 0);
-	trans = btrfs_join_transaction(root, 1);
 
-	btrfs_set_trans_block_group(trans, inode);
-	ret = btrfs_truncate_inode_items(trans, root, inode, inode->i_size, 0);
-	if (ret) {
-		btrfs_orphan_del(NULL, inode);
-		goto no_delete_lock;
-	}
+	while (1) {
+		trans = btrfs_start_transaction(root, 1);
+		btrfs_set_trans_block_group(trans, inode);
+		ret = btrfs_truncate_inode_items(trans, root, inode, 0, 0);
 
-	btrfs_orphan_del(trans, inode);
+		if (ret != -EAGAIN)
+			break;
 
-	nr = trans->blocks_used;
-	clear_inode(inode);
+		nr = trans->blocks_used;
+		btrfs_end_transaction(trans, root);
+		trans = NULL;
+		btrfs_btree_balance_dirty(root, nr);
+	}
 
-	btrfs_end_transaction(trans, root);
-	btrfs_btree_balance_dirty(root, nr);
-	return;
+	if (ret == 0) {
+		ret = btrfs_orphan_del(trans, inode);
+		BUG_ON(ret);
+	}
 
-no_delete_lock:
 	nr = trans->blocks_used;
 	btrfs_end_transaction(trans, root);
 	btrfs_btree_balance_dirty(root, nr);
 no_delete:
 	clear_inode(inode);
+	return;
 }
 
 /*
@@ -3569,7 +3647,6 @@
 	INIT_LIST_HEAD(&BTRFS_I(inode)->ordered_operations);
 	RB_CLEAR_NODE(&BTRFS_I(inode)->rb_node);
 	btrfs_ordered_inode_tree_init(&BTRFS_I(inode)->ordered_tree);
-	mutex_init(&BTRFS_I(inode)->extent_mutex);
 	mutex_init(&BTRFS_I(inode)->log_mutex);
 }
 
@@ -3695,6 +3772,13 @@
 	}
 	srcu_read_unlock(&root->fs_info->subvol_srcu, index);
 
+	if (root != sub_root) {
+		down_read(&root->fs_info->cleanup_work_sem);
+		if (!(inode->i_sb->s_flags & MS_RDONLY))
+			btrfs_orphan_cleanup(sub_root);
+		up_read(&root->fs_info->cleanup_work_sem);
+	}
+
 	return inode;
 }
 
@@ -3869,7 +3953,11 @@
 
 	/* Reached end of directory/root. Bump pos past the last item. */
 	if (key_type == BTRFS_DIR_INDEX_KEY)
-		filp->f_pos = INT_LIMIT(off_t);
+		/*
+		 * 32-bit glibc will use getdents64, but then strtol -
+		 * so the last number we can serve is this.
+		 */
+		filp->f_pos = 0x7fffffff;
 	else
 		filp->f_pos++;
 nopos:
@@ -4219,7 +4307,7 @@
 	if (IS_ERR(inode))
 		goto out_unlock;
 
-	err = btrfs_init_inode_security(inode, dir);
+	err = btrfs_init_inode_security(trans, inode, dir);
 	if (err) {
 		drop_inode = 1;
 		goto out_unlock;
@@ -4290,7 +4378,7 @@
 	if (IS_ERR(inode))
 		goto out_unlock;
 
-	err = btrfs_init_inode_security(inode, dir);
+	err = btrfs_init_inode_security(trans, inode, dir);
 	if (err) {
 		drop_inode = 1;
 		goto out_unlock;
@@ -4336,6 +4424,10 @@
 	if (inode->i_nlink == 0)
 		return -ENOENT;
 
+	/* do not allow sys_link's with other subvols of the same device */
+	if (root->objectid != BTRFS_I(inode)->root->objectid)
+		return -EPERM;
+
 	/*
 	 * 1 item for inode ref
 	 * 2 items for dir items
@@ -4423,7 +4515,7 @@
 
 	drop_on_err = 1;
 
-	err = btrfs_init_inode_security(inode, dir);
+	err = btrfs_init_inode_security(trans, inode, dir);
 	if (err)
 		goto out_fail;
 
@@ -5074,17 +5166,20 @@
 	unsigned long nr;
 	u64 mask = root->sectorsize - 1;
 
-	if (!S_ISREG(inode->i_mode))
-		return;
-	if (IS_APPEND(inode) || IS_IMMUTABLE(inode))
+	if (!S_ISREG(inode->i_mode)) {
+		WARN_ON(1);
 		return;
+	}
 
 	ret = btrfs_truncate_page(inode->i_mapping, inode->i_size);
 	if (ret)
 		return;
+
 	btrfs_wait_ordered_range(inode, inode->i_size & (~mask), (u64)-1);
+	btrfs_ordered_update_i_size(inode, inode->i_size, NULL);
 
 	trans = btrfs_start_transaction(root, 1);
+	btrfs_set_trans_block_group(trans, inode);
 
 	/*
 	 * setattr is responsible for setting the ordered_data_close flag,
@@ -5106,21 +5201,32 @@
 	if (inode->i_size == 0 && BTRFS_I(inode)->ordered_data_close)
 		btrfs_add_ordered_operation(trans, root, inode);
 
-	btrfs_set_trans_block_group(trans, inode);
-	btrfs_i_size_write(inode, inode->i_size);
+	while (1) {
+		ret = btrfs_truncate_inode_items(trans, root, inode,
+						 inode->i_size,
+						 BTRFS_EXTENT_DATA_KEY);
+		if (ret != -EAGAIN)
+			break;
 
-	ret = btrfs_orphan_add(trans, inode);
-	if (ret)
-		goto out;
-	/* FIXME, add redo link to tree so we don't leak on crash */
-	ret = btrfs_truncate_inode_items(trans, root, inode, inode->i_size,
-				      BTRFS_EXTENT_DATA_KEY);
-	btrfs_update_inode(trans, root, inode);
+		ret = btrfs_update_inode(trans, root, inode);
+		BUG_ON(ret);
 
-	ret = btrfs_orphan_del(trans, inode);
+		nr = trans->blocks_used;
+		btrfs_end_transaction(trans, root);
+		btrfs_btree_balance_dirty(root, nr);
+
+		trans = btrfs_start_transaction(root, 1);
+		btrfs_set_trans_block_group(trans, inode);
+	}
+
+	if (ret == 0 && inode->i_nlink > 0) {
+		ret = btrfs_orphan_del(trans, inode);
+		BUG_ON(ret);
+	}
+
+	ret = btrfs_update_inode(trans, root, inode);
 	BUG_ON(ret);
 
-out:
 	nr = trans->blocks_used;
 	ret = btrfs_end_transaction_throttle(trans, root);
 	BUG_ON(ret);
@@ -5217,9 +5323,9 @@
 
 	spin_lock(&root->list_lock);
 	if (!list_empty(&BTRFS_I(inode)->i_orphan)) {
-		printk(KERN_ERR "BTRFS: inode %lu: inode still on the orphan"
-		       " list\n", inode->i_ino);
-		dump_stack();
+		printk(KERN_INFO "BTRFS: inode %lu still on the orphan list\n",
+		       inode->i_ino);
+		list_del_init(&BTRFS_I(inode)->i_orphan);
 	}
 	spin_unlock(&root->list_lock);
 
@@ -5476,7 +5582,7 @@
  * some fairly slow code that needs optimization. This walks the list
  * of all the inodes with pending delalloc and forces them to disk.
  */
-int btrfs_start_delalloc_inodes(struct btrfs_root *root)
+int btrfs_start_delalloc_inodes(struct btrfs_root *root, int delay_iput)
 {
 	struct list_head *head = &root->fs_info->delalloc_inodes;
 	struct btrfs_inode *binode;
@@ -5495,7 +5601,10 @@
 		spin_unlock(&root->fs_info->delalloc_lock);
 		if (inode) {
 			filemap_flush(inode->i_mapping);
-			iput(inode);
+			if (delay_iput)
+				btrfs_add_delayed_iput(inode);
+			else
+				iput(inode);
 		}
 		cond_resched();
 		spin_lock(&root->fs_info->delalloc_lock);
@@ -5569,7 +5678,7 @@
 	if (IS_ERR(inode))
 		goto out_unlock;
 
-	err = btrfs_init_inode_security(inode, dir);
+	err = btrfs_init_inode_security(trans, inode, dir);
 	if (err) {
 		drop_inode = 1;
 		goto out_unlock;
@@ -5641,57 +5750,77 @@
 	return err;
 }
 
-static int prealloc_file_range(struct btrfs_trans_handle *trans,
-			       struct inode *inode, u64 start, u64 end,
-			       u64 locked_end, u64 alloc_hint, int mode)
+static int prealloc_file_range(struct inode *inode, u64 start, u64 end,
+			u64 alloc_hint, int mode, loff_t actual_len)
 {
+	struct btrfs_trans_handle *trans;
 	struct btrfs_root *root = BTRFS_I(inode)->root;
 	struct btrfs_key ins;
 	u64 alloc_size;
 	u64 cur_offset = start;
 	u64 num_bytes = end - start;
 	int ret = 0;
+	u64 i_size;
 
 	while (num_bytes > 0) {
 		alloc_size = min(num_bytes, root->fs_info->max_extent);
 
-		ret = btrfs_reserve_metadata_space(root, 1);
-		if (ret)
-			goto out;
+		trans = btrfs_start_transaction(root, 1);
 
 		ret = btrfs_reserve_extent(trans, root, alloc_size,
 					   root->sectorsize, 0, alloc_hint,
 					   (u64)-1, &ins, 1);
 		if (ret) {
 			WARN_ON(1);
-			goto out;
+			goto stop_trans;
 		}
+
+		ret = btrfs_reserve_metadata_space(root, 3);
+		if (ret) {
+			btrfs_free_reserved_extent(root, ins.objectid,
+						   ins.offset);
+			goto stop_trans;
+		}
+
 		ret = insert_reserved_file_extent(trans, inode,
 						  cur_offset, ins.objectid,
 						  ins.offset, ins.offset,
-						  ins.offset, locked_end,
-						  0, 0, 0,
+						  ins.offset, 0, 0, 0,
 						  BTRFS_FILE_EXTENT_PREALLOC);
 		BUG_ON(ret);
 		btrfs_drop_extent_cache(inode, cur_offset,
 					cur_offset + ins.offset -1, 0);
+
 		num_bytes -= ins.offset;
 		cur_offset += ins.offset;
 		alloc_hint = ins.objectid + ins.offset;
-		btrfs_unreserve_metadata_space(root, 1);
-	}
-out:
-	if (cur_offset > start) {
+
 		inode->i_ctime = CURRENT_TIME;
 		BTRFS_I(inode)->flags |= BTRFS_INODE_PREALLOC;
 		if (!(mode & FALLOC_FL_KEEP_SIZE) &&
-		    cur_offset > i_size_read(inode))
-			btrfs_i_size_write(inode, cur_offset);
+			(actual_len > inode->i_size) &&
+			(cur_offset > inode->i_size)) {
+
+			if (cur_offset > actual_len)
+				i_size  = actual_len;
+			else
+				i_size = cur_offset;
+			i_size_write(inode, i_size);
+			btrfs_ordered_update_i_size(inode, i_size, NULL);
+		}
+
 		ret = btrfs_update_inode(trans, root, inode);
 		BUG_ON(ret);
+
+		btrfs_end_transaction(trans, root);
+		btrfs_unreserve_metadata_space(root, 3);
 	}
+	return ret;
 
+stop_trans:
+	btrfs_end_transaction(trans, root);
 	return ret;
+
 }
 
 static long btrfs_fallocate(struct inode *inode, int mode,
@@ -5705,8 +5834,6 @@
 	u64 locked_end;
 	u64 mask = BTRFS_I(inode)->root->sectorsize - 1;
 	struct extent_map *em;
-	struct btrfs_trans_handle *trans;
-	struct btrfs_root *root;
 	int ret;
 
 	alloc_start = offset & ~mask;
@@ -5725,9 +5852,7 @@
 			goto out;
 	}
 
-	root = BTRFS_I(inode)->root;
-
-	ret = btrfs_check_data_free_space(root, inode,
+	ret = btrfs_check_data_free_space(BTRFS_I(inode)->root, inode,
 					  alloc_end - alloc_start);
 	if (ret)
 		goto out;
@@ -5736,12 +5861,6 @@
 	while (1) {
 		struct btrfs_ordered_extent *ordered;
 
-		trans = btrfs_start_transaction(BTRFS_I(inode)->root, 1);
-		if (!trans) {
-			ret = -EIO;
-			goto out_free;
-		}
-
 		/* the extent lock is ordered inside the running
 		 * transaction
 		 */
@@ -5755,8 +5874,6 @@
 			btrfs_put_ordered_extent(ordered);
 			unlock_extent(&BTRFS_I(inode)->io_tree,
 				      alloc_start, locked_end, GFP_NOFS);
-			btrfs_end_transaction(trans, BTRFS_I(inode)->root);
-
 			/*
 			 * we can't wait on the range with the transaction
 			 * running or with the extent lock held
@@ -5777,10 +5894,12 @@
 		BUG_ON(IS_ERR(em) || !em);
 		last_byte = min(extent_map_end(em), alloc_end);
 		last_byte = (last_byte + mask) & ~mask;
-		if (em->block_start == EXTENT_MAP_HOLE) {
-			ret = prealloc_file_range(trans, inode, cur_offset,
-					last_byte, locked_end + 1,
-					alloc_hint, mode);
+		if (em->block_start == EXTENT_MAP_HOLE ||
+		    (cur_offset >= inode->i_size &&
+		     !test_bit(EXTENT_FLAG_PREALLOC, &em->flags))) {
+			ret = prealloc_file_range(inode,
+						  cur_offset, last_byte,
+						alloc_hint, mode, offset+len);
 			if (ret < 0) {
 				free_extent_map(em);
 				break;
@@ -5799,9 +5918,8 @@
 	unlock_extent(&BTRFS_I(inode)->io_tree, alloc_start, locked_end,
 		      GFP_NOFS);
 
-	btrfs_end_transaction(trans, BTRFS_I(inode)->root);
-out_free:
-	btrfs_free_reserved_data_space(root, inode, alloc_end - alloc_start);
+	btrfs_free_reserved_data_space(BTRFS_I(inode)->root, inode,
+				       alloc_end - alloc_start);
 out:
 	mutex_unlock(&inode->i_mutex);
 	return ret;
--- linux-mvl-dove-2.6.32.orig/fs/btrfs/volumes.c
+++ linux-mvl-dove-2.6.32/fs/btrfs/volumes.c
@@ -21,6 +21,7 @@
 #include <linux/blkdev.h>
 #include <linux/random.h>
 #include <linux/iocontext.h>
+#include <linux/capability.h>
 #include <asm/div64.h>
 #include "compat.h"
 #include "ctree.h"
@@ -1135,7 +1136,7 @@
 		root->fs_info->avail_metadata_alloc_bits;
 
 	if ((all_avail & BTRFS_BLOCK_GROUP_RAID10) &&
-	    root->fs_info->fs_devices->rw_devices <= 4) {
+	    root->fs_info->fs_devices->num_devices <= 4) {
 		printk(KERN_ERR "btrfs: unable to go below four devices "
 		       "on raid10\n");
 		ret = -EINVAL;
@@ -1143,7 +1144,7 @@
 	}
 
 	if ((all_avail & BTRFS_BLOCK_GROUP_RAID1) &&
-	    root->fs_info->fs_devices->rw_devices <= 2) {
+	    root->fs_info->fs_devices->num_devices <= 2) {
 		printk(KERN_ERR "btrfs: unable to go below two "
 		       "devices on raid1\n");
 		ret = -EINVAL;
@@ -1434,8 +1435,8 @@
 		return -EINVAL;
 
 	bdev = open_bdev_exclusive(device_path, 0, root->fs_info->bdev_holder);
-	if (!bdev)
-		return -EIO;
+	if (IS_ERR(bdev))
+		return PTR_ERR(bdev);
 
 	if (root->fs_info->fs_devices->seeding) {
 		seeding_dev = 1;
@@ -1900,6 +1901,9 @@
 	if (dev_root->fs_info->sb->s_flags & MS_RDONLY)
 		return -EROFS;
 
+	if (!capable(CAP_SYS_ADMIN))
+		return -EPERM;
+
 	mutex_lock(&dev_root->fs_info->volume_mutex);
 	dev_root = dev_root->fs_info->dev_root;
 
@@ -2209,7 +2213,7 @@
 		max_chunk_size = 10 * calc_size;
 		min_stripe_size = 64 * 1024 * 1024;
 	} else if (type & BTRFS_BLOCK_GROUP_METADATA) {
-		max_chunk_size = 4 * calc_size;
+		max_chunk_size = 256 * 1024 * 1024;
 		min_stripe_size = 32 * 1024 * 1024;
 	} else if (type & BTRFS_BLOCK_GROUP_SYSTEM) {
 		calc_size = 8 * 1024 * 1024;
@@ -2538,6 +2542,11 @@
 	if (!em)
 		return 1;
 
+	if (btrfs_test_opt(root, DEGRADED)) {
+		free_extent_map(em);
+		return 0;
+	}
+
 	map = (struct map_lookup *)em->bdev;
 	for (i = 0; i < map->num_stripes; i++) {
 		if (!map->stripes[i].dev->writeable) {
@@ -2649,8 +2658,10 @@
 	em = lookup_extent_mapping(em_tree, logical, *length);
 	read_unlock(&em_tree->lock);
 
-	if (!em && unplug_page)
+	if (!em && unplug_page) {
+		kfree(multi);
 		return 0;
+	}
 
 	if (!em) {
 		printk(KERN_CRIT "unable to find logical %llu len %llu\n",
--- linux-mvl-dove-2.6.32.orig/fs/btrfs/xattr.h
+++ linux-mvl-dove-2.6.32/fs/btrfs/xattr.h
@@ -27,15 +27,16 @@
 
 extern ssize_t __btrfs_getxattr(struct inode *inode, const char *name,
 		void *buffer, size_t size);
-extern int __btrfs_setxattr(struct inode *inode, const char *name,
-		const void *value, size_t size, int flags);
-
+extern int __btrfs_setxattr(struct btrfs_trans_handle *trans,
+			    struct inode *inode, const char *name,
+			    const void *value, size_t size, int flags);
 extern ssize_t btrfs_getxattr(struct dentry *dentry, const char *name,
 		void *buffer, size_t size);
 extern int btrfs_setxattr(struct dentry *dentry, const char *name,
 		const void *value, size_t size, int flags);
 extern int btrfs_removexattr(struct dentry *dentry, const char *name);
 
-extern int btrfs_xattr_security_init(struct inode *inode, struct inode *dir);
+extern int btrfs_xattr_security_init(struct btrfs_trans_handle *trans,
+				     struct inode *inode, struct inode *dir);
 
 #endif /* __XATTR__ */
--- linux-mvl-dove-2.6.32.orig/fs/btrfs/file.c
+++ linux-mvl-dove-2.6.32/fs/btrfs/file.c
@@ -179,18 +179,14 @@
 		}
 		flags = em->flags;
 		if (skip_pinned && test_bit(EXTENT_FLAG_PINNED, &em->flags)) {
-			if (em->start <= start &&
-			    (!testend || em->start + em->len >= start + len)) {
+			if (testend && em->start + em->len >= start + len) {
 				free_extent_map(em);
 				write_unlock(&em_tree->lock);
 				break;
 			}
-			if (start < em->start) {
-				len = em->start - start;
-			} else {
+			start = em->start + em->len;
+			if (testend)
 				len = start + len - (em->start + em->len);
-				start = em->start + em->len;
-			}
 			free_extent_map(em);
 			write_unlock(&em_tree->lock);
 			continue;
@@ -265,324 +261,253 @@
  * If an extent intersects the range but is not entirely inside the range
  * it is either truncated or split.  Anything entirely inside the range
  * is deleted from the tree.
- *
- * inline_limit is used to tell this code which offsets in the file to keep
- * if they contain inline extents.
  */
-noinline int btrfs_drop_extents(struct btrfs_trans_handle *trans,
-		       struct btrfs_root *root, struct inode *inode,
-		       u64 start, u64 end, u64 locked_end,
-		       u64 inline_limit, u64 *hint_byte, int drop_cache)
+int btrfs_drop_extents(struct btrfs_trans_handle *trans, struct inode *inode,
+		       u64 start, u64 end, u64 *hint_byte, int drop_cache)
 {
-	u64 extent_end = 0;
-	u64 search_start = start;
-	u64 ram_bytes = 0;
-	u64 disk_bytenr = 0;
-	u64 orig_locked_end = locked_end;
-	u8 compression;
-	u8 encryption;
-	u16 other_encoding = 0;
+	struct btrfs_root *root = BTRFS_I(inode)->root;
 	struct extent_buffer *leaf;
-	struct btrfs_file_extent_item *extent;
+	struct btrfs_file_extent_item *fi;
 	struct btrfs_path *path;
 	struct btrfs_key key;
-	struct btrfs_file_extent_item old;
-	int keep;
-	int slot;
-	int bookend;
-	int found_type = 0;
-	int found_extent;
-	int found_inline;
+	struct btrfs_key new_key;
+	u64 search_start = start;
+	u64 disk_bytenr = 0;
+	u64 num_bytes = 0;
+	u64 extent_offset = 0;
+	u64 extent_end = 0;
+	int del_nr = 0;
+	int del_slot = 0;
+	int extent_type;
 	int recow;
 	int ret;
 
-	inline_limit = 0;
 	if (drop_cache)
 		btrfs_drop_extent_cache(inode, start, end - 1, 0);
 
 	path = btrfs_alloc_path();
 	if (!path)
 		return -ENOMEM;
+
 	while (1) {
 		recow = 0;
-		btrfs_release_path(root, path);
 		ret = btrfs_lookup_file_extent(trans, root, path, inode->i_ino,
 					       search_start, -1);
 		if (ret < 0)
-			goto out;
-		if (ret > 0) {
-			if (path->slots[0] == 0) {
-				ret = 0;
-				goto out;
-			}
-			path->slots[0]--;
+			break;
+		if (ret > 0 && path->slots[0] > 0 && search_start == start) {
+			leaf = path->nodes[0];
+			btrfs_item_key_to_cpu(leaf, &key, path->slots[0] - 1);
+			if (key.objectid == inode->i_ino &&
+			    key.type == BTRFS_EXTENT_DATA_KEY)
+				path->slots[0]--;
 		}
+		ret = 0;
 next_slot:
-		keep = 0;
-		bookend = 0;
-		found_extent = 0;
-		found_inline = 0;
-		compression = 0;
-		encryption = 0;
-		extent = NULL;
 		leaf = path->nodes[0];
-		slot = path->slots[0];
-		ret = 0;
-		btrfs_item_key_to_cpu(leaf, &key, slot);
-		if (btrfs_key_type(&key) == BTRFS_EXTENT_DATA_KEY &&
-		    key.offset >= end) {
-			goto out;
-		}
-		if (btrfs_key_type(&key) > BTRFS_EXTENT_DATA_KEY ||
-		    key.objectid != inode->i_ino) {
-			goto out;
-		}
-		if (recow) {
-			search_start = max(key.offset, start);
-			continue;
-		}
-		if (btrfs_key_type(&key) == BTRFS_EXTENT_DATA_KEY) {
-			extent = btrfs_item_ptr(leaf, slot,
-						struct btrfs_file_extent_item);
-			found_type = btrfs_file_extent_type(leaf, extent);
-			compression = btrfs_file_extent_compression(leaf,
-								    extent);
-			encryption = btrfs_file_extent_encryption(leaf,
-								  extent);
-			other_encoding = btrfs_file_extent_other_encoding(leaf,
-								  extent);
-			if (found_type == BTRFS_FILE_EXTENT_REG ||
-			    found_type == BTRFS_FILE_EXTENT_PREALLOC) {
-				extent_end =
-				     btrfs_file_extent_disk_bytenr(leaf,
-								   extent);
-				if (extent_end)
-					*hint_byte = extent_end;
-
-				extent_end = key.offset +
-				     btrfs_file_extent_num_bytes(leaf, extent);
-				ram_bytes = btrfs_file_extent_ram_bytes(leaf,
-								extent);
-				found_extent = 1;
-			} else if (found_type == BTRFS_FILE_EXTENT_INLINE) {
-				found_inline = 1;
-				extent_end = key.offset +
-				     btrfs_file_extent_inline_len(leaf, extent);
+		if (path->slots[0] >= btrfs_header_nritems(leaf)) {
+			BUG_ON(del_nr > 0);
+			ret = btrfs_next_leaf(root, path);
+			if (ret < 0)
+				break;
+			if (ret > 0) {
+				ret = 0;
+				break;
 			}
+			leaf = path->nodes[0];
+			recow = 1;
+		}
+
+		btrfs_item_key_to_cpu(leaf, &key, path->slots[0]);
+		if (key.objectid > inode->i_ino ||
+		    key.type > BTRFS_EXTENT_DATA_KEY || key.offset >= end)
+			break;
+
+		fi = btrfs_item_ptr(leaf, path->slots[0],
+				    struct btrfs_file_extent_item);
+		extent_type = btrfs_file_extent_type(leaf, fi);
+
+		if (extent_type == BTRFS_FILE_EXTENT_REG ||
+		    extent_type == BTRFS_FILE_EXTENT_PREALLOC) {
+			disk_bytenr = btrfs_file_extent_disk_bytenr(leaf, fi);
+			num_bytes = btrfs_file_extent_disk_num_bytes(leaf, fi);
+			extent_offset = btrfs_file_extent_offset(leaf, fi);
+			extent_end = key.offset +
+				btrfs_file_extent_num_bytes(leaf, fi);
+		} else if (extent_type == BTRFS_FILE_EXTENT_INLINE) {
+			extent_end = key.offset +
+				btrfs_file_extent_inline_len(leaf, fi);
 		} else {
+			WARN_ON(1);
 			extent_end = search_start;
 		}
 
-		/* we found nothing we can drop */
-		if ((!found_extent && !found_inline) ||
-		    search_start >= extent_end) {
-			int nextret;
-			u32 nritems;
-			nritems = btrfs_header_nritems(leaf);
-			if (slot >= nritems - 1) {
-				nextret = btrfs_next_leaf(root, path);
-				if (nextret)
-					goto out;
-				recow = 1;
-			} else {
-				path->slots[0]++;
-			}
+		if (extent_end <= search_start) {
+			path->slots[0]++;
 			goto next_slot;
 		}
 
-		if (end <= extent_end && start >= key.offset && found_inline)
-			*hint_byte = EXTENT_MAP_INLINE;
+		search_start = max(key.offset, start);
+		if (recow) {
+			btrfs_release_path(root, path);
+			continue;
+		}
 
-		if (found_extent) {
-			read_extent_buffer(leaf, &old, (unsigned long)extent,
-					   sizeof(old));
-		}
-
-		if (end < extent_end && end >= key.offset) {
-			bookend = 1;
-			if (found_inline && start <= key.offset)
-				keep = 1;
-		}
-
-		if (bookend && found_extent) {
-			if (locked_end < extent_end) {
-				ret = try_lock_extent(&BTRFS_I(inode)->io_tree,
-						locked_end, extent_end - 1,
-						GFP_NOFS);
-				if (!ret) {
-					btrfs_release_path(root, path);
-					lock_extent(&BTRFS_I(inode)->io_tree,
-						locked_end, extent_end - 1,
-						GFP_NOFS);
-					locked_end = extent_end;
-					continue;
-				}
-				locked_end = extent_end;
+		/*
+		 *     | - range to drop - |
+		 *  | -------- extent -------- |
+		 */
+		if (start > key.offset && end < extent_end) {
+			BUG_ON(del_nr > 0);
+			BUG_ON(extent_type == BTRFS_FILE_EXTENT_INLINE);
+
+			memcpy(&new_key, &key, sizeof(new_key));
+			new_key.offset = start;
+			ret = btrfs_duplicate_item(trans, root, path,
+						   &new_key);
+			if (ret == -EAGAIN) {
+				btrfs_release_path(root, path);
+				continue;
 			}
-			disk_bytenr = le64_to_cpu(old.disk_bytenr);
-			if (disk_bytenr != 0) {
+			if (ret < 0)
+				break;
+
+			leaf = path->nodes[0];
+			fi = btrfs_item_ptr(leaf, path->slots[0] - 1,
+					    struct btrfs_file_extent_item);
+			btrfs_set_file_extent_num_bytes(leaf, fi,
+							start - key.offset);
+
+			fi = btrfs_item_ptr(leaf, path->slots[0],
+					    struct btrfs_file_extent_item);
+
+			extent_offset += start - key.offset;
+			btrfs_set_file_extent_offset(leaf, fi, extent_offset);
+			btrfs_set_file_extent_num_bytes(leaf, fi,
+							extent_end - start);
+			btrfs_mark_buffer_dirty(leaf);
+
+			if (disk_bytenr > 0) {
 				ret = btrfs_inc_extent_ref(trans, root,
-					   disk_bytenr,
-					   le64_to_cpu(old.disk_num_bytes), 0,
-					   root->root_key.objectid,
-					   key.objectid, key.offset -
-					   le64_to_cpu(old.offset));
+						disk_bytenr, num_bytes, 0,
+						root->root_key.objectid,
+						new_key.objectid,
+						start - extent_offset);
 				BUG_ON(ret);
+				*hint_byte = disk_bytenr;
 			}
+			key.offset = start;
 		}
+		/*
+		 *  | ---- range to drop ----- |
+		 *      | -------- extent -------- |
+		 */
+		if (start <= key.offset && end < extent_end) {
+			BUG_ON(extent_type == BTRFS_FILE_EXTENT_INLINE);
+
+			memcpy(&new_key, &key, sizeof(new_key));
+			new_key.offset = end;
+			btrfs_set_item_key_safe(trans, root, path, &new_key);
 
-		if (found_inline) {
-			u64 mask = root->sectorsize - 1;
-			search_start = (extent_end + mask) & ~mask;
-		} else
-			search_start = extent_end;
-
-		/* truncate existing extent */
-		if (start > key.offset) {
-			u64 new_num;
-			u64 old_num;
-			keep = 1;
-			WARN_ON(start & (root->sectorsize - 1));
-			if (found_extent) {
-				new_num = start - key.offset;
-				old_num = btrfs_file_extent_num_bytes(leaf,
-								      extent);
-				*hint_byte =
-					btrfs_file_extent_disk_bytenr(leaf,
-								      extent);
-				if (btrfs_file_extent_disk_bytenr(leaf,
-								  extent)) {
-					inode_sub_bytes(inode, old_num -
-							new_num);
-				}
-				btrfs_set_file_extent_num_bytes(leaf,
-							extent, new_num);
-				btrfs_mark_buffer_dirty(leaf);
-			} else if (key.offset < inline_limit &&
-				   (end > extent_end) &&
-				   (inline_limit < extent_end)) {
-				u32 new_size;
-				new_size = btrfs_file_extent_calc_inline_size(
-						   inline_limit - key.offset);
-				inode_sub_bytes(inode, extent_end -
-						inline_limit);
-				btrfs_set_file_extent_ram_bytes(leaf, extent,
-							new_size);
-				if (!compression && !encryption) {
-					btrfs_truncate_item(trans, root, path,
-							    new_size, 1);
-				}
-			}
-		}
-		/* delete the entire extent */
-		if (!keep) {
-			if (found_inline)
-				inode_sub_bytes(inode, extent_end -
-						key.offset);
-			ret = btrfs_del_item(trans, root, path);
-			/* TODO update progress marker and return */
-			BUG_ON(ret);
-			extent = NULL;
-			btrfs_release_path(root, path);
-			/* the extent will be freed later */
-		}
-		if (bookend && found_inline && start <= key.offset) {
-			u32 new_size;
-			new_size = btrfs_file_extent_calc_inline_size(
-						   extent_end - end);
-			inode_sub_bytes(inode, end - key.offset);
-			btrfs_set_file_extent_ram_bytes(leaf, extent,
-							new_size);
-			if (!compression && !encryption)
-				ret = btrfs_truncate_item(trans, root, path,
-							  new_size, 0);
-			BUG_ON(ret);
-		}
-		/* create bookend, splitting the extent in two */
-		if (bookend && found_extent) {
-			struct btrfs_key ins;
-			ins.objectid = inode->i_ino;
-			ins.offset = end;
-			btrfs_set_key_type(&ins, BTRFS_EXTENT_DATA_KEY);
-
-			btrfs_release_path(root, path);
-			path->leave_spinning = 1;
-			ret = btrfs_insert_empty_item(trans, root, path, &ins,
-						      sizeof(*extent));
-			BUG_ON(ret);
-
-			leaf = path->nodes[0];
-			extent = btrfs_item_ptr(leaf, path->slots[0],
-						struct btrfs_file_extent_item);
-			write_extent_buffer(leaf, &old,
-					    (unsigned long)extent, sizeof(old));
-
-			btrfs_set_file_extent_compression(leaf, extent,
-							  compression);
-			btrfs_set_file_extent_encryption(leaf, extent,
-							 encryption);
-			btrfs_set_file_extent_other_encoding(leaf, extent,
-							     other_encoding);
-			btrfs_set_file_extent_offset(leaf, extent,
-				    le64_to_cpu(old.offset) + end - key.offset);
-			WARN_ON(le64_to_cpu(old.num_bytes) <
-				(extent_end - end));
-			btrfs_set_file_extent_num_bytes(leaf, extent,
+			extent_offset += end - key.offset;
+			btrfs_set_file_extent_offset(leaf, fi, extent_offset);
+			btrfs_set_file_extent_num_bytes(leaf, fi,
 							extent_end - end);
+			btrfs_mark_buffer_dirty(leaf);
+			if (disk_bytenr > 0) {
+				inode_sub_bytes(inode, end - key.offset);
+				*hint_byte = disk_bytenr;
+			}
+			break;
+		}
+
+		search_start = extent_end;
+		/*
+		 *       | ---- range to drop ----- |
+		 *  | -------- extent -------- |
+		 */
+		if (start > key.offset && end >= extent_end) {
+			BUG_ON(del_nr > 0);
+			BUG_ON(extent_type == BTRFS_FILE_EXTENT_INLINE);
 
-			/*
-			 * set the ram bytes to the size of the full extent
-			 * before splitting.  This is a worst case flag,
-			 * but its the best we can do because we don't know
-			 * how splitting affects compression
-			 */
-			btrfs_set_file_extent_ram_bytes(leaf, extent,
-							ram_bytes);
-			btrfs_set_file_extent_type(leaf, extent, found_type);
-
-			btrfs_unlock_up_safe(path, 1);
-			btrfs_mark_buffer_dirty(path->nodes[0]);
-			btrfs_set_lock_blocking(path->nodes[0]);
+			btrfs_set_file_extent_num_bytes(leaf, fi,
+							start - key.offset);
+			btrfs_mark_buffer_dirty(leaf);
+			if (disk_bytenr > 0) {
+				inode_sub_bytes(inode, extent_end - start);
+				*hint_byte = disk_bytenr;
+			}
+			if (end == extent_end)
+				break;
 
-			path->leave_spinning = 0;
-			btrfs_release_path(root, path);
-			if (disk_bytenr != 0)
-				inode_add_bytes(inode, extent_end - end);
+			path->slots[0]++;
+			goto next_slot;
 		}
 
-		if (found_extent && !keep) {
-			u64 old_disk_bytenr = le64_to_cpu(old.disk_bytenr);
+		/*
+		 *  | ---- range to drop ----- |
+		 *    | ------ extent ------ |
+		 */
+		if (start <= key.offset && end >= extent_end) {
+			if (del_nr == 0) {
+				del_slot = path->slots[0];
+				del_nr = 1;
+			} else {
+				BUG_ON(del_slot + del_nr != path->slots[0]);
+				del_nr++;
+			}
 
-			if (old_disk_bytenr != 0) {
+			if (extent_type == BTRFS_FILE_EXTENT_INLINE) {
 				inode_sub_bytes(inode,
-						le64_to_cpu(old.num_bytes));
+						extent_end - key.offset);
+				extent_end = ALIGN(extent_end,
+						   root->sectorsize);
+			} else if (disk_bytenr > 0) {
 				ret = btrfs_free_extent(trans, root,
-						old_disk_bytenr,
-						le64_to_cpu(old.disk_num_bytes),
-						0, root->root_key.objectid,
+						disk_bytenr, num_bytes, 0,
+						root->root_key.objectid,
 						key.objectid, key.offset -
-						le64_to_cpu(old.offset));
+						extent_offset);
 				BUG_ON(ret);
-				*hint_byte = old_disk_bytenr;
+				inode_sub_bytes(inode,
+						extent_end - key.offset);
+				*hint_byte = disk_bytenr;
 			}
-		}
 
-		if (search_start >= end) {
-			ret = 0;
-			goto out;
+			if (end == extent_end)
+				break;
+
+			if (path->slots[0] + 1 < btrfs_header_nritems(leaf)) {
+				path->slots[0]++;
+				goto next_slot;
+			}
+
+			ret = btrfs_del_items(trans, root, path, del_slot,
+					      del_nr);
+			BUG_ON(ret);
+
+			del_nr = 0;
+			del_slot = 0;
+
+			btrfs_release_path(root, path);
+			continue;
 		}
+
+		BUG_ON(1);
 	}
-out:
-	btrfs_free_path(path);
-	if (locked_end > orig_locked_end) {
-		unlock_extent(&BTRFS_I(inode)->io_tree, orig_locked_end,
-			      locked_end - 1, GFP_NOFS);
+
+	if (del_nr > 0) {
+		ret = btrfs_del_items(trans, root, path, del_slot, del_nr);
+		BUG_ON(ret);
 	}
+
+	btrfs_free_path(path);
 	return ret;
 }
 
 static int extent_mergeable(struct extent_buffer *leaf, int slot,
-			    u64 objectid, u64 bytenr, u64 *start, u64 *end)
+			    u64 objectid, u64 bytenr, u64 orig_offset,
+			    u64 *start, u64 *end)
 {
 	struct btrfs_file_extent_item *fi;
 	struct btrfs_key key;
@@ -598,6 +523,7 @@
 	fi = btrfs_item_ptr(leaf, slot, struct btrfs_file_extent_item);
 	if (btrfs_file_extent_type(leaf, fi) != BTRFS_FILE_EXTENT_REG ||
 	    btrfs_file_extent_disk_bytenr(leaf, fi) != bytenr ||
+	    btrfs_file_extent_offset(leaf, fi) != key.offset - orig_offset ||
 	    btrfs_file_extent_compression(leaf, fi) ||
 	    btrfs_file_extent_encryption(leaf, fi) ||
 	    btrfs_file_extent_other_encoding(leaf, fi))
@@ -620,23 +546,24 @@
  * two or three.
  */
 int btrfs_mark_extent_written(struct btrfs_trans_handle *trans,
-			      struct btrfs_root *root,
 			      struct inode *inode, u64 start, u64 end)
 {
+	struct btrfs_root *root = BTRFS_I(inode)->root;
 	struct extent_buffer *leaf;
 	struct btrfs_path *path;
 	struct btrfs_file_extent_item *fi;
 	struct btrfs_key key;
+	struct btrfs_key new_key;
 	u64 bytenr;
 	u64 num_bytes;
 	u64 extent_end;
 	u64 orig_offset;
 	u64 other_start;
 	u64 other_end;
-	u64 split = start;
-	u64 locked_end = end;
-	int extent_type;
-	int split_end = 1;
+	u64 split;
+	int del_nr = 0;
+	int del_slot = 0;
+	int recow;
 	int ret;
 
 	btrfs_drop_extent_cache(inode, start, end - 1, 0);
@@ -644,12 +571,11 @@
 	path = btrfs_alloc_path();
 	BUG_ON(!path);
 again:
+	recow = 0;
+	split = start;
 	key.objectid = inode->i_ino;
 	key.type = BTRFS_EXTENT_DATA_KEY;
-	if (split == start)
-		key.offset = split;
-	else
-		key.offset = split - 1;
+	key.offset = split;
 
 	ret = btrfs_search_slot(trans, root, &key, path, -1, 1);
 	if (ret > 0 && path->slots[0] > 0)
@@ -661,159 +587,158 @@
 	       key.type != BTRFS_EXTENT_DATA_KEY);
 	fi = btrfs_item_ptr(leaf, path->slots[0],
 			    struct btrfs_file_extent_item);
-	extent_type = btrfs_file_extent_type(leaf, fi);
-	BUG_ON(extent_type != BTRFS_FILE_EXTENT_PREALLOC);
+	BUG_ON(btrfs_file_extent_type(leaf, fi) !=
+	       BTRFS_FILE_EXTENT_PREALLOC);
 	extent_end = key.offset + btrfs_file_extent_num_bytes(leaf, fi);
 	BUG_ON(key.offset > start || extent_end < end);
 
 	bytenr = btrfs_file_extent_disk_bytenr(leaf, fi);
 	num_bytes = btrfs_file_extent_disk_num_bytes(leaf, fi);
 	orig_offset = key.offset - btrfs_file_extent_offset(leaf, fi);
+	memcpy(&new_key, &key, sizeof(new_key));
 
-	if (key.offset == start)
-		split = end;
+	if (start == key.offset && end < extent_end) {
+		other_start = 0;
+		other_end = start;
+		if (extent_mergeable(leaf, path->slots[0] - 1,
+				     inode->i_ino, bytenr, orig_offset,
+				     &other_start, &other_end)) {
+			new_key.offset = end;
+			btrfs_set_item_key_safe(trans, root, path, &new_key);
+			fi = btrfs_item_ptr(leaf, path->slots[0],
+					    struct btrfs_file_extent_item);
+			btrfs_set_file_extent_num_bytes(leaf, fi,
+							extent_end - end);
+			btrfs_set_file_extent_offset(leaf, fi,
+						     end - orig_offset);
+			fi = btrfs_item_ptr(leaf, path->slots[0] - 1,
+					    struct btrfs_file_extent_item);
+			btrfs_set_file_extent_num_bytes(leaf, fi,
+							end - other_start);
+			btrfs_mark_buffer_dirty(leaf);
+			goto out;
+		}
+	}
 
-	if (key.offset == start && extent_end == end) {
-		int del_nr = 0;
-		int del_slot = 0;
+	if (start > key.offset && end == extent_end) {
 		other_start = end;
 		other_end = 0;
-		if (extent_mergeable(leaf, path->slots[0] + 1, inode->i_ino,
-				     bytenr, &other_start, &other_end)) {
-			extent_end = other_end;
-			del_slot = path->slots[0] + 1;
-			del_nr++;
-			ret = btrfs_free_extent(trans, root, bytenr, num_bytes,
-						0, root->root_key.objectid,
-						inode->i_ino, orig_offset);
-			BUG_ON(ret);
-		}
-		other_start = 0;
-		other_end = start;
-		if (extent_mergeable(leaf, path->slots[0] - 1, inode->i_ino,
-				     bytenr, &other_start, &other_end)) {
-			key.offset = other_start;
-			del_slot = path->slots[0];
-			del_nr++;
-			ret = btrfs_free_extent(trans, root, bytenr, num_bytes,
-						0, root->root_key.objectid,
-						inode->i_ino, orig_offset);
-			BUG_ON(ret);
+		if (extent_mergeable(leaf, path->slots[0] + 1,
+				     inode->i_ino, bytenr, orig_offset,
+				     &other_start, &other_end)) {
+			fi = btrfs_item_ptr(leaf, path->slots[0],
+					    struct btrfs_file_extent_item);
+			btrfs_set_file_extent_num_bytes(leaf, fi,
+							start - key.offset);
+			path->slots[0]++;
+			new_key.offset = start;
+			btrfs_set_item_key_safe(trans, root, path, &new_key);
+
+			fi = btrfs_item_ptr(leaf, path->slots[0],
+					    struct btrfs_file_extent_item);
+			btrfs_set_file_extent_num_bytes(leaf, fi,
+							other_end - start);
+			btrfs_set_file_extent_offset(leaf, fi,
+						     start - orig_offset);
+			btrfs_mark_buffer_dirty(leaf);
+			goto out;
 		}
-		split_end = 0;
-		if (del_nr == 0) {
-			btrfs_set_file_extent_type(leaf, fi,
-						   BTRFS_FILE_EXTENT_REG);
-			goto done;
+	}
+
+	while (start > key.offset || end < extent_end) {
+		if (key.offset == start)
+			split = end;
+
+		new_key.offset = split;
+		ret = btrfs_duplicate_item(trans, root, path, &new_key);
+		if (ret == -EAGAIN) {
+			btrfs_release_path(root, path);
+			goto again;
 		}
+		BUG_ON(ret < 0);
 
-		fi = btrfs_item_ptr(leaf, del_slot - 1,
+		leaf = path->nodes[0];
+		fi = btrfs_item_ptr(leaf, path->slots[0] - 1,
 				    struct btrfs_file_extent_item);
-		btrfs_set_file_extent_type(leaf, fi, BTRFS_FILE_EXTENT_REG);
 		btrfs_set_file_extent_num_bytes(leaf, fi,
-						extent_end - key.offset);
+						split - key.offset);
+
+		fi = btrfs_item_ptr(leaf, path->slots[0],
+				    struct btrfs_file_extent_item);
+
+		btrfs_set_file_extent_offset(leaf, fi, split - orig_offset);
+		btrfs_set_file_extent_num_bytes(leaf, fi,
+						extent_end - split);
 		btrfs_mark_buffer_dirty(leaf);
 
-		ret = btrfs_del_items(trans, root, path, del_slot, del_nr);
+		ret = btrfs_inc_extent_ref(trans, root, bytenr, num_bytes, 0,
+					   root->root_key.objectid,
+					   inode->i_ino, orig_offset);
 		BUG_ON(ret);
-		goto release;
-	} else if (split == start) {
-		if (locked_end < extent_end) {
-			ret = try_lock_extent(&BTRFS_I(inode)->io_tree,
-					locked_end, extent_end - 1, GFP_NOFS);
-			if (!ret) {
-				btrfs_release_path(root, path);
-				lock_extent(&BTRFS_I(inode)->io_tree,
-					locked_end, extent_end - 1, GFP_NOFS);
-				locked_end = extent_end;
-				goto again;
-			}
-			locked_end = extent_end;
+
+		if (split == start) {
+			key.offset = start;
+		} else {
+			BUG_ON(start != key.offset);
+			path->slots[0]--;
+			extent_end = end;
 		}
-		btrfs_set_file_extent_num_bytes(leaf, fi, split - key.offset);
-	} else  {
-		BUG_ON(key.offset != start);
-		key.offset = split;
-		btrfs_set_file_extent_offset(leaf, fi, key.offset -
-					     orig_offset);
-		btrfs_set_file_extent_num_bytes(leaf, fi, extent_end - split);
-		btrfs_set_item_key_safe(trans, root, path, &key);
-		extent_end = split;
-	}
-
-	if (extent_end == end) {
-		split_end = 0;
-		extent_type = BTRFS_FILE_EXTENT_REG;
+		recow = 1;
 	}
-	if (extent_end == end && split == start) {
-		other_start = end;
-		other_end = 0;
-		if (extent_mergeable(leaf, path->slots[0] + 1, inode->i_ino,
-				     bytenr, &other_start, &other_end)) {
-			path->slots[0]++;
-			fi = btrfs_item_ptr(leaf, path->slots[0],
-					    struct btrfs_file_extent_item);
-			key.offset = split;
-			btrfs_set_item_key_safe(trans, root, path, &key);
-			btrfs_set_file_extent_offset(leaf, fi, key.offset -
-						     orig_offset);
-			btrfs_set_file_extent_num_bytes(leaf, fi,
-							other_end - split);
-			goto done;
+
+	other_start = end;
+	other_end = 0;
+	if (extent_mergeable(leaf, path->slots[0] + 1,
+			     inode->i_ino, bytenr, orig_offset,
+			     &other_start, &other_end)) {
+		if (recow) {
+			btrfs_release_path(root, path);
+			goto again;
 		}
+		extent_end = other_end;
+		del_slot = path->slots[0] + 1;
+		del_nr++;
+		ret = btrfs_free_extent(trans, root, bytenr, num_bytes,
+					0, root->root_key.objectid,
+					inode->i_ino, orig_offset);
+		BUG_ON(ret);
 	}
-	if (extent_end == end && split == end) {
-		other_start = 0;
-		other_end = start;
-		if (extent_mergeable(leaf, path->slots[0] - 1 , inode->i_ino,
-				     bytenr, &other_start, &other_end)) {
-			path->slots[0]--;
-			fi = btrfs_item_ptr(leaf, path->slots[0],
-					    struct btrfs_file_extent_item);
-			btrfs_set_file_extent_num_bytes(leaf, fi, extent_end -
-							other_start);
-			goto done;
+	other_start = 0;
+	other_end = start;
+	if (extent_mergeable(leaf, path->slots[0] - 1,
+			     inode->i_ino, bytenr, orig_offset,
+			     &other_start, &other_end)) {
+		if (recow) {
+			btrfs_release_path(root, path);
+			goto again;
 		}
+		key.offset = other_start;
+		del_slot = path->slots[0];
+		del_nr++;
+		ret = btrfs_free_extent(trans, root, bytenr, num_bytes,
+					0, root->root_key.objectid,
+					inode->i_ino, orig_offset);
+		BUG_ON(ret);
 	}
+	if (del_nr == 0) {
+		fi = btrfs_item_ptr(leaf, path->slots[0],
+			   struct btrfs_file_extent_item);
+		btrfs_set_file_extent_type(leaf, fi,
+					   BTRFS_FILE_EXTENT_REG);
+		btrfs_mark_buffer_dirty(leaf);
+	} else {
+		fi = btrfs_item_ptr(leaf, del_slot - 1,
+			   struct btrfs_file_extent_item);
+		btrfs_set_file_extent_type(leaf, fi,
+					   BTRFS_FILE_EXTENT_REG);
+		btrfs_set_file_extent_num_bytes(leaf, fi,
+						extent_end - key.offset);
+		btrfs_mark_buffer_dirty(leaf);
 
-	btrfs_mark_buffer_dirty(leaf);
-
-	ret = btrfs_inc_extent_ref(trans, root, bytenr, num_bytes, 0,
-				   root->root_key.objectid,
-				   inode->i_ino, orig_offset);
-	BUG_ON(ret);
-	btrfs_release_path(root, path);
-
-	key.offset = start;
-	ret = btrfs_insert_empty_item(trans, root, path, &key, sizeof(*fi));
-	BUG_ON(ret);
-
-	leaf = path->nodes[0];
-	fi = btrfs_item_ptr(leaf, path->slots[0],
-			    struct btrfs_file_extent_item);
-	btrfs_set_file_extent_generation(leaf, fi, trans->transid);
-	btrfs_set_file_extent_type(leaf, fi, extent_type);
-	btrfs_set_file_extent_disk_bytenr(leaf, fi, bytenr);
-	btrfs_set_file_extent_disk_num_bytes(leaf, fi, num_bytes);
-	btrfs_set_file_extent_offset(leaf, fi, key.offset - orig_offset);
-	btrfs_set_file_extent_num_bytes(leaf, fi, extent_end - key.offset);
-	btrfs_set_file_extent_ram_bytes(leaf, fi, num_bytes);
-	btrfs_set_file_extent_compression(leaf, fi, 0);
-	btrfs_set_file_extent_encryption(leaf, fi, 0);
-	btrfs_set_file_extent_other_encoding(leaf, fi, 0);
-done:
-	btrfs_mark_buffer_dirty(leaf);
-
-release:
-	btrfs_release_path(root, path);
-	if (split_end && split == start) {
-		split = end;
-		goto again;
-	}
-	if (locked_end > end) {
-		unlock_extent(&BTRFS_I(inode)->io_tree, end, locked_end - 1,
-			      GFP_NOFS);
+		ret = btrfs_del_items(trans, root, path, del_slot, del_nr);
+		BUG_ON(ret);
 	}
+out:
 	btrfs_free_path(path);
 	return 0;
 }
@@ -1210,7 +1135,7 @@
 	}
 	mutex_lock(&dentry->d_inode->i_mutex);
 out:
-	return ret > 0 ? EIO : ret;
+	return ret > 0 ? -EIO : ret;
 }
 
 static const struct vm_operations_struct btrfs_file_vm_ops = {
--- linux-mvl-dove-2.6.32.orig/fs/btrfs/ctree.c
+++ linux-mvl-dove-2.6.32/fs/btrfs/ctree.c
@@ -37,6 +37,11 @@
 			      struct extent_buffer *src_buf);
 static int del_ptr(struct btrfs_trans_handle *trans, struct btrfs_root *root,
 		   struct btrfs_path *path, int level, int slot);
+static int setup_items_for_insert(struct btrfs_trans_handle *trans,
+			struct btrfs_root *root, struct btrfs_path *path,
+			struct btrfs_key *cpu_key, u32 *data_size,
+			u32 total_data, u32 total_size, int nr);
+
 
 struct btrfs_path *btrfs_alloc_path(void)
 {
@@ -451,9 +456,8 @@
 		extent_buffer_get(cow);
 		spin_unlock(&root->node_lock);
 
-		btrfs_free_extent(trans, root, buf->start, buf->len,
-				  parent_start, root->root_key.objectid,
-				  level, 0);
+		btrfs_free_tree_block(trans, root, buf->start, buf->len,
+				parent_start, root->root_key.objectid, level);
 		free_extent_buffer(buf);
 		add_root_to_dirty_list(root);
 	} else {
@@ -468,9 +472,8 @@
 		btrfs_set_node_ptr_generation(parent, parent_slot,
 					      trans->transid);
 		btrfs_mark_buffer_dirty(parent);
-		btrfs_free_extent(trans, root, buf->start, buf->len,
-				  parent_start, root->root_key.objectid,
-				  level, 0);
+		btrfs_free_tree_block(trans, root, buf->start, buf->len,
+				parent_start, root->root_key.objectid, level);
 	}
 	if (unlock_orig)
 		btrfs_tree_unlock(buf);
@@ -1030,8 +1033,8 @@
 		btrfs_tree_unlock(mid);
 		/* once for the path */
 		free_extent_buffer(mid);
-		ret = btrfs_free_extent(trans, root, mid->start, mid->len,
-					0, root->root_key.objectid, level, 1);
+		ret = btrfs_free_tree_block(trans, root, mid->start, mid->len,
+					    0, root->root_key.objectid, level);
 		/* once for the root ptr */
 		free_extent_buffer(mid);
 		return ret;
@@ -1095,10 +1098,10 @@
 				       1);
 			if (wret)
 				ret = wret;
-			wret = btrfs_free_extent(trans, root, bytenr,
-						 blocksize, 0,
-						 root->root_key.objectid,
-						 level, 0);
+			wret = btrfs_free_tree_block(trans, root,
+						     bytenr, blocksize, 0,
+						     root->root_key.objectid,
+						     level);
 			if (wret)
 				ret = wret;
 		} else {
@@ -1143,9 +1146,8 @@
 		wret = del_ptr(trans, root, path, level + 1, pslot);
 		if (wret)
 			ret = wret;
-		wret = btrfs_free_extent(trans, root, bytenr, blocksize,
-					 0, root->root_key.objectid,
-					 level, 0);
+		wret = btrfs_free_tree_block(trans, root, bytenr, blocksize,
+					 0, root->root_key.objectid, level);
 		if (wret)
 			ret = wret;
 	} else {
@@ -2997,75 +2999,85 @@
 	return ret;
 }
 
-/*
- * This function splits a single item into two items,
- * giving 'new_key' to the new item and splitting the
- * old one at split_offset (from the start of the item).
- *
- * The path may be released by this operation.  After
- * the split, the path is pointing to the old item.  The
- * new item is going to be in the same node as the old one.
- *
- * Note, the item being split must be smaller enough to live alone on
- * a tree block with room for one extra struct btrfs_item
- *
- * This allows us to split the item in place, keeping a lock on the
- * leaf the entire time.
- */
-int btrfs_split_item(struct btrfs_trans_handle *trans,
-		     struct btrfs_root *root,
-		     struct btrfs_path *path,
-		     struct btrfs_key *new_key,
-		     unsigned long split_offset)
+static noinline int setup_leaf_for_split(struct btrfs_trans_handle *trans,
+					 struct btrfs_root *root,
+					 struct btrfs_path *path, int ins_len)
 {
-	u32 item_size;
+	struct btrfs_key key;
 	struct extent_buffer *leaf;
-	struct btrfs_key orig_key;
-	struct btrfs_item *item;
-	struct btrfs_item *new_item;
-	int ret = 0;
-	int slot;
-	u32 nritems;
-	u32 orig_offset;
-	struct btrfs_disk_key disk_key;
-	char *buf;
+	struct btrfs_file_extent_item *fi;
+	u64 extent_len = 0;
+	u32 item_size;
+	int ret;
 
 	leaf = path->nodes[0];
-	btrfs_item_key_to_cpu(leaf, &orig_key, path->slots[0]);
-	if (btrfs_leaf_free_space(root, leaf) >= sizeof(struct btrfs_item))
-		goto split;
+	btrfs_item_key_to_cpu(leaf, &key, path->slots[0]);
+
+	BUG_ON(key.type != BTRFS_EXTENT_DATA_KEY &&
+	       key.type != BTRFS_EXTENT_CSUM_KEY);
+
+	if (btrfs_leaf_free_space(root, leaf) >= ins_len)
+		return 0;
 
 	item_size = btrfs_item_size_nr(leaf, path->slots[0]);
+	if (key.type == BTRFS_EXTENT_DATA_KEY) {
+		fi = btrfs_item_ptr(leaf, path->slots[0],
+				    struct btrfs_file_extent_item);
+		extent_len = btrfs_file_extent_num_bytes(leaf, fi);
+	}
 	btrfs_release_path(root, path);
 
-	path->search_for_split = 1;
 	path->keep_locks = 1;
-
-	ret = btrfs_search_slot(trans, root, &orig_key, path, 0, 1);
+	path->search_for_split = 1;
+	ret = btrfs_search_slot(trans, root, &key, path, 0, 1);
 	path->search_for_split = 0;
+	if (ret < 0)
+		goto err;
 
+	ret = -EAGAIN;
+	leaf = path->nodes[0];
 	/* if our item isn't there or got smaller, return now */
-	if (ret != 0 || item_size != btrfs_item_size_nr(path->nodes[0],
-							path->slots[0])) {
-		path->keep_locks = 0;
-		return -EAGAIN;
+	if (ret > 0 || item_size != btrfs_item_size_nr(leaf, path->slots[0]))
+		goto err;
+
+	if (key.type == BTRFS_EXTENT_DATA_KEY) {
+		fi = btrfs_item_ptr(leaf, path->slots[0],
+				    struct btrfs_file_extent_item);
+		if (extent_len != btrfs_file_extent_num_bytes(leaf, fi))
+			goto err;
 	}
 
 	btrfs_set_path_blocking(path);
-	ret = split_leaf(trans, root, &orig_key, path,
-			 sizeof(struct btrfs_item), 1);
-	path->keep_locks = 0;
+	ret = split_leaf(trans, root, &key, path, ins_len, 1);
 	BUG_ON(ret);
 
+	path->keep_locks = 0;
 	btrfs_unlock_up_safe(path, 1);
+	return 0;
+err:
+	path->keep_locks = 0;
+	return ret;
+}
+
+static noinline int split_item(struct btrfs_trans_handle *trans,
+			       struct btrfs_root *root,
+			       struct btrfs_path *path,
+			       struct btrfs_key *new_key,
+			       unsigned long split_offset)
+{
+	struct extent_buffer *leaf;
+	struct btrfs_item *item;
+	struct btrfs_item *new_item;
+	int slot;
+	char *buf;
+	u32 nritems;
+	u32 item_size;
+	u32 orig_offset;
+	struct btrfs_disk_key disk_key;
+
 	leaf = path->nodes[0];
 	BUG_ON(btrfs_leaf_free_space(root, leaf) < sizeof(struct btrfs_item));
 
-split:
-	/*
-	 * make sure any changes to the path from split_leaf leave it
-	 * in a blocking state
-	 */
 	btrfs_set_path_blocking(path);
 
 	item = btrfs_item_nr(leaf, path->slots[0]);
@@ -3073,19 +3085,19 @@
 	item_size = btrfs_item_size(leaf, item);
 
 	buf = kmalloc(item_size, GFP_NOFS);
+	if (!buf)
+		return -ENOMEM;
+
 	read_extent_buffer(leaf, buf, btrfs_item_ptr_offset(leaf,
 			    path->slots[0]), item_size);
-	slot = path->slots[0] + 1;
-	leaf = path->nodes[0];
 
+	slot = path->slots[0] + 1;
 	nritems = btrfs_header_nritems(leaf);
-
 	if (slot != nritems) {
 		/* shift the items */
 		memmove_extent_buffer(leaf, btrfs_item_nr_offset(slot + 1),
-			      btrfs_item_nr_offset(slot),
-			      (nritems - slot) * sizeof(struct btrfs_item));
-
+				btrfs_item_nr_offset(slot),
+				(nritems - slot) * sizeof(struct btrfs_item));
 	}
 
 	btrfs_cpu_key_to_disk(&disk_key, new_key);
@@ -3113,16 +3125,81 @@
 			    item_size - split_offset);
 	btrfs_mark_buffer_dirty(leaf);
 
-	ret = 0;
-	if (btrfs_leaf_free_space(root, leaf) < 0) {
-		btrfs_print_leaf(root, leaf);
-		BUG();
-	}
+	BUG_ON(btrfs_leaf_free_space(root, leaf) < 0);
 	kfree(buf);
+	return 0;
+}
+
+/*
+ * This function splits a single item into two items,
+ * giving 'new_key' to the new item and splitting the
+ * old one at split_offset (from the start of the item).
+ *
+ * The path may be released by this operation.  After
+ * the split, the path is pointing to the old item.  The
+ * new item is going to be in the same node as the old one.
+ *
+ * Note, the item being split must be smaller enough to live alone on
+ * a tree block with room for one extra struct btrfs_item
+ *
+ * This allows us to split the item in place, keeping a lock on the
+ * leaf the entire time.
+ */
+int btrfs_split_item(struct btrfs_trans_handle *trans,
+		     struct btrfs_root *root,
+		     struct btrfs_path *path,
+		     struct btrfs_key *new_key,
+		     unsigned long split_offset)
+{
+	int ret;
+	ret = setup_leaf_for_split(trans, root, path,
+				   sizeof(struct btrfs_item));
+	if (ret)
+		return ret;
+
+	ret = split_item(trans, root, path, new_key, split_offset);
 	return ret;
 }
 
 /*
+ * This function duplicate a item, giving 'new_key' to the new item.
+ * It guarantees both items live in the same tree leaf and the new item
+ * is contiguous with the original item.
+ *
+ * This allows us to split file extent in place, keeping a lock on the
+ * leaf the entire time.
+ */
+int btrfs_duplicate_item(struct btrfs_trans_handle *trans,
+			 struct btrfs_root *root,
+			 struct btrfs_path *path,
+			 struct btrfs_key *new_key)
+{
+	struct extent_buffer *leaf;
+	int ret;
+	u32 item_size;
+
+	leaf = path->nodes[0];
+	item_size = btrfs_item_size_nr(leaf, path->slots[0]);
+	ret = setup_leaf_for_split(trans, root, path,
+				   item_size + sizeof(struct btrfs_item));
+	if (ret)
+		return ret;
+
+	path->slots[0]++;
+	ret = setup_items_for_insert(trans, root, path, new_key, &item_size,
+				     item_size, item_size +
+				     sizeof(struct btrfs_item), 1);
+	BUG_ON(ret);
+
+	leaf = path->nodes[0];
+	memcpy_extent_buffer(leaf,
+			     btrfs_item_ptr_offset(leaf, path->slots[0]),
+			     btrfs_item_ptr_offset(leaf, path->slots[0] - 1),
+			     item_size);
+	return 0;
+}
+
+/*
  * make the item pointed to by the path smaller.  new_size indicates
  * how small to make it, and from_end tells us if we just chop bytes
  * off the end of the item or if we shift the item to chop bytes off
@@ -3714,8 +3791,8 @@
 	 */
 	btrfs_unlock_up_safe(path, 0);
 
-	ret = btrfs_free_extent(trans, root, leaf->start, leaf->len,
-				0, root->root_key.objectid, 0, 0);
+	ret = btrfs_free_tree_block(trans, root, leaf->start, leaf->len,
+				    0, root->root_key.objectid, 0);
 	return ret;
 }
 /*
--- linux-mvl-dove-2.6.32.orig/fs/btrfs/tree-log.c
+++ linux-mvl-dove-2.6.32/fs/btrfs/tree-log.c
@@ -542,8 +542,8 @@
 
 	saved_nbytes = inode_get_bytes(inode);
 	/* drop any overlapping extents */
-	ret = btrfs_drop_extents(trans, root, inode,
-			 start, extent_end, extent_end, start, &alloc_hint, 1);
+	ret = btrfs_drop_extents(trans, inode, start, extent_end,
+				 &alloc_hint, 1);
 	BUG_ON(ret);
 
 	if (found_type == BTRFS_FILE_EXTENT_REG ||
@@ -930,6 +930,17 @@
 	return 0;
 }
 
+static int insert_orphan_item(struct btrfs_trans_handle *trans,
+			      struct btrfs_root *root, u64 offset)
+{
+	int ret;
+	ret = btrfs_find_orphan_item(root, offset);
+	if (ret > 0)
+		ret = btrfs_insert_orphan_item(trans, root, offset);
+	return ret;
+}
+
+
 /*
  * There are a few corners where the link count of the file can't
  * be properly maintained during replay.  So, instead of adding
@@ -997,9 +1008,13 @@
 	}
 	BTRFS_I(inode)->index_cnt = (u64)-1;
 
-	if (inode->i_nlink == 0 && S_ISDIR(inode->i_mode)) {
-		ret = replay_dir_deletes(trans, root, NULL, path,
-					 inode->i_ino, 1);
+	if (inode->i_nlink == 0) {
+		if (S_ISDIR(inode->i_mode)) {
+			ret = replay_dir_deletes(trans, root, NULL, path,
+						 inode->i_ino, 1);
+			BUG_ON(ret);
+		}
+		ret = insert_orphan_item(trans, root, inode->i_ino);
 		BUG_ON(ret);
 	}
 	btrfs_free_path(path);
@@ -1587,7 +1602,6 @@
 		/* inode keys are done during the first stage */
 		if (key.type == BTRFS_INODE_ITEM_KEY &&
 		    wc->stage == LOG_WALK_REPLAY_INODES) {
-			struct inode *inode;
 			struct btrfs_inode_item *inode_item;
 			u32 mode;
 
@@ -1603,31 +1617,16 @@
 					     eb, i, &key);
 			BUG_ON(ret);
 
-			/* for regular files, truncate away
-			 * extents past the new EOF
+			/* for regular files, make sure corresponding
+			 * orhpan item exist. extents past the new EOF
+			 * will be truncated later by orphan cleanup.
 			 */
 			if (S_ISREG(mode)) {
-				inode = read_one_inode(root,
-						       key.objectid);
-				BUG_ON(!inode);
-
-				ret = btrfs_truncate_inode_items(wc->trans,
-					root, inode, inode->i_size,
-					BTRFS_EXTENT_DATA_KEY);
+				ret = insert_orphan_item(wc->trans, root,
+							 key.objectid);
 				BUG_ON(ret);
-
-				/* if the nlink count is zero here, the iput
-				 * will free the inode.  We bump it to make
-				 * sure it doesn't get freed until the link
-				 * count fixup is done
-				 */
-				if (inode->i_nlink == 0) {
-					btrfs_inc_nlink(inode);
-					btrfs_update_inode(wc->trans,
-							   root, inode);
-				}
-				iput(inode);
 			}
+
 			ret = link_to_fixup_dir(wc->trans, root,
 						path, key.objectid);
 			BUG_ON(ret);
@@ -1977,10 +1976,11 @@
 {
 	int index1;
 	int index2;
+	int mark;
 	int ret;
 	struct btrfs_root *log = root->log_root;
 	struct btrfs_root *log_root_tree = root->fs_info->log_root_tree;
-	u64 log_transid = 0;
+	unsigned long log_transid = 0;
 
 	mutex_lock(&root->log_mutex);
 	index1 = root->log_transid % 2;
@@ -2014,24 +2014,29 @@
 		goto out;
 	}
 
+	log_transid = root->log_transid;
+	if (log_transid % 2 == 0)
+		mark = EXTENT_DIRTY;
+	else
+		mark = EXTENT_NEW;
+
 	/* we start IO on  all the marked extents here, but we don't actually
 	 * wait for them until later.
 	 */
-	ret = btrfs_write_marked_extents(log, &log->dirty_log_pages);
+	ret = btrfs_write_marked_extents(log, &log->dirty_log_pages, mark);
 	BUG_ON(ret);
 
 	btrfs_set_root_node(&log->root_item, log->node);
 
 	root->log_batch = 0;
-	log_transid = root->log_transid;
 	root->log_transid++;
 	log->log_transid = root->log_transid;
 	root->log_start_pid = 0;
 	smp_mb();
 	/*
-	 * log tree has been flushed to disk, new modifications of
-	 * the log will be written to new positions. so it's safe to
-	 * allow log writers to go in.
+	 * IO has been started, blocks of the log tree have WRITTEN flag set
+	 * in their headers. new modifications of the log will be written to
+	 * new positions. so it's safe to allow log writers to go in.
 	 */
 	mutex_unlock(&root->log_mutex);
 
@@ -2052,7 +2057,7 @@
 
 	index2 = log_root_tree->log_transid % 2;
 	if (atomic_read(&log_root_tree->log_commit[index2])) {
-		btrfs_wait_marked_extents(log, &log->dirty_log_pages);
+		btrfs_wait_marked_extents(log, &log->dirty_log_pages, mark);
 		wait_log_commit(trans, log_root_tree,
 				log_root_tree->log_transid);
 		mutex_unlock(&log_root_tree->log_mutex);
@@ -2072,16 +2077,17 @@
 	 * check the full commit flag again
 	 */
 	if (root->fs_info->last_trans_log_full_commit == trans->transid) {
-		btrfs_wait_marked_extents(log, &log->dirty_log_pages);
+		btrfs_wait_marked_extents(log, &log->dirty_log_pages, mark);
 		mutex_unlock(&log_root_tree->log_mutex);
 		ret = -EAGAIN;
 		goto out_wake_log_root;
 	}
 
 	ret = btrfs_write_and_wait_marked_extents(log_root_tree,
-				&log_root_tree->dirty_log_pages);
+				&log_root_tree->dirty_log_pages,
+				EXTENT_DIRTY | EXTENT_NEW);
 	BUG_ON(ret);
-	btrfs_wait_marked_extents(log, &log->dirty_log_pages);
+	btrfs_wait_marked_extents(log, &log->dirty_log_pages, mark);
 
 	btrfs_set_super_log_root(&root->fs_info->super_for_commit,
 				log_root_tree->node->start);
@@ -2147,12 +2153,12 @@
 
 	while (1) {
 		ret = find_first_extent_bit(&log->dirty_log_pages,
-				    0, &start, &end, EXTENT_DIRTY);
+				0, &start, &end, EXTENT_DIRTY | EXTENT_NEW);
 		if (ret)
 			break;
 
-		clear_extent_dirty(&log->dirty_log_pages,
-				   start, end, GFP_NOFS);
+		clear_extent_bits(&log->dirty_log_pages, start, end,
+				  EXTENT_DIRTY | EXTENT_NEW, GFP_NOFS);
 	}
 
 	if (log->log_transid > 0) {
--- linux-mvl-dove-2.6.32.orig/fs/btrfs/transaction.h
+++ linux-mvl-dove-2.6.32/fs/btrfs/transaction.h
@@ -107,10 +107,10 @@
 int btrfs_record_root_in_trans(struct btrfs_trans_handle *trans,
 				struct btrfs_root *root);
 int btrfs_write_and_wait_marked_extents(struct btrfs_root *root,
-					struct extent_io_tree *dirty_pages);
+				struct extent_io_tree *dirty_pages, int mark);
 int btrfs_write_marked_extents(struct btrfs_root *root,
-					struct extent_io_tree *dirty_pages);
+				struct extent_io_tree *dirty_pages, int mark);
 int btrfs_wait_marked_extents(struct btrfs_root *root,
-					struct extent_io_tree *dirty_pages);
+				struct extent_io_tree *dirty_pages, int mark);
 int btrfs_transaction_in_commit(struct btrfs_fs_info *info);
 #endif
--- linux-mvl-dove-2.6.32.orig/fs/btrfs/acl.c
+++ linux-mvl-dove-2.6.32/fs/btrfs/acl.c
@@ -94,7 +94,8 @@
 /*
  * Needs to be called with fs_mutex held
  */
-static int btrfs_set_acl(struct inode *inode, struct posix_acl *acl, int type)
+static int btrfs_set_acl(struct btrfs_trans_handle *trans,
+			 struct inode *inode, struct posix_acl *acl, int type)
 {
 	int ret, size = 0;
 	const char *name;
@@ -111,12 +112,14 @@
 	switch (type) {
 	case ACL_TYPE_ACCESS:
 		mode = inode->i_mode;
-		ret = posix_acl_equiv_mode(acl, &mode);
-		if (ret < 0)
-			return ret;
-		ret = 0;
-		inode->i_mode = mode;
 		name = POSIX_ACL_XATTR_ACCESS;
+		if (acl) {
+			ret = posix_acl_equiv_mode(acl, &mode);
+			if (ret < 0)
+				return ret;
+			inode->i_mode = mode;
+		}
+		ret = 0;
 		break;
 	case ACL_TYPE_DEFAULT:
 		if (!S_ISDIR(inode->i_mode))
@@ -140,8 +143,7 @@
 			goto out;
 	}
 
-	ret = __btrfs_setxattr(inode, name, value, size, 0);
-
+	ret = __btrfs_setxattr(trans, inode, name, value, size, 0);
 out:
 	kfree(value);
 
@@ -154,9 +156,12 @@
 static int btrfs_xattr_set_acl(struct inode *inode, int type,
 			       const void *value, size_t size)
 {
-	int ret = 0;
+	int ret;
 	struct posix_acl *acl = NULL;
 
+	if (!is_owner_or_cap(inode))
+		return -EPERM;
+
 	if (value) {
 		acl = posix_acl_from_xattr(value, size);
 		if (acl == NULL) {
@@ -167,7 +172,7 @@
 		}
 	}
 
-	ret = btrfs_set_acl(inode, acl, type);
+	ret = btrfs_set_acl(NULL, inode, acl, type);
 
 	posix_acl_release(acl);
 
@@ -221,7 +226,8 @@
  * stuff has been fixed to work with that.  If the locking stuff changes, we
  * need to re-evaluate the acl locking stuff.
  */
-int btrfs_init_acl(struct inode *inode, struct inode *dir)
+int btrfs_init_acl(struct btrfs_trans_handle *trans,
+		   struct inode *inode, struct inode *dir)
 {
 	struct posix_acl *acl = NULL;
 	int ret = 0;
@@ -246,7 +252,8 @@
 		mode_t mode;
 
 		if (S_ISDIR(inode->i_mode)) {
-			ret = btrfs_set_acl(inode, acl, ACL_TYPE_DEFAULT);
+			ret = btrfs_set_acl(trans, inode, acl,
+					    ACL_TYPE_DEFAULT);
 			if (ret)
 				goto failed;
 		}
@@ -261,10 +268,11 @@
 			inode->i_mode = mode;
 			if (ret > 0) {
 				/* we need an acl */
-				ret = btrfs_set_acl(inode, clone,
+				ret = btrfs_set_acl(trans, inode, clone,
 						    ACL_TYPE_ACCESS);
 			}
 		}
+		posix_acl_release(clone);
 	}
 failed:
 	posix_acl_release(acl);
@@ -294,7 +302,7 @@
 
 	ret = posix_acl_chmod_masq(clone, inode->i_mode);
 	if (!ret)
-		ret = btrfs_set_acl(inode, clone, ACL_TYPE_ACCESS);
+		ret = btrfs_set_acl(NULL, inode, clone, ACL_TYPE_ACCESS);
 
 	posix_acl_release(clone);
 
@@ -320,7 +328,8 @@
 	return 0;
 }
 
-int btrfs_init_acl(struct inode *inode, struct inode *dir)
+int btrfs_init_acl(struct btrfs_trans_handle *trans,
+		   struct inode *inode, struct inode *dir)
 {
 	return 0;
 }
--- linux-mvl-dove-2.6.32.orig/fs/btrfs/ordered-data.c
+++ linux-mvl-dove-2.6.32/fs/btrfs/ordered-data.c
@@ -291,16 +291,16 @@
 
 /*
  * remove an ordered extent from the tree.  No references are dropped
- * but, anyone waiting on this extent is woken up.
+ * and you must wake_up entry->wait.  You must hold the tree mutex
+ * while you call this function.
  */
-int btrfs_remove_ordered_extent(struct inode *inode,
+static int __btrfs_remove_ordered_extent(struct inode *inode,
 				struct btrfs_ordered_extent *entry)
 {
 	struct btrfs_ordered_inode_tree *tree;
 	struct rb_node *node;
 
 	tree = &BTRFS_I(inode)->ordered_tree;
-	mutex_lock(&tree->mutex);
 	node = &entry->rb_node;
 	rb_erase(node, &tree->tree);
 	tree->last = NULL;
@@ -326,16 +326,34 @@
 	}
 	spin_unlock(&BTRFS_I(inode)->root->fs_info->ordered_extent_lock);
 
+	return 0;
+}
+
+/*
+ * remove an ordered extent from the tree.  No references are dropped
+ * but any waiters are woken.
+ */
+int btrfs_remove_ordered_extent(struct inode *inode,
+				struct btrfs_ordered_extent *entry)
+{
+	struct btrfs_ordered_inode_tree *tree;
+	int ret;
+
+	tree = &BTRFS_I(inode)->ordered_tree;
+	mutex_lock(&tree->mutex);
+	ret = __btrfs_remove_ordered_extent(inode, entry);
 	mutex_unlock(&tree->mutex);
 	wake_up(&entry->wait);
-	return 0;
+
+	return ret;
 }
 
 /*
  * wait for all the ordered extents in a root.  This is done when balancing
  * space between drives.
  */
-int btrfs_wait_ordered_extents(struct btrfs_root *root, int nocow_only)
+int btrfs_wait_ordered_extents(struct btrfs_root *root,
+			       int nocow_only, int delay_iput)
 {
 	struct list_head splice;
 	struct list_head *cur;
@@ -372,7 +390,10 @@
 		if (inode) {
 			btrfs_start_ordered_extent(inode, ordered, 1);
 			btrfs_put_ordered_extent(ordered);
-			iput(inode);
+			if (delay_iput)
+				btrfs_add_delayed_iput(inode);
+			else
+				iput(inode);
 		} else {
 			btrfs_put_ordered_extent(ordered);
 		}
@@ -430,7 +451,7 @@
 				btrfs_wait_ordered_range(inode, 0, (u64)-1);
 			else
 				filemap_flush(inode->i_mapping);
-			iput(inode);
+			btrfs_add_delayed_iput(inode);
 		}
 
 		cond_resched();
@@ -589,7 +610,7 @@
  * After an extent is done, call this to conditionally update the on disk
  * i_size.  i_size is updated to cover any fully written part of the file.
  */
-int btrfs_ordered_update_i_size(struct inode *inode,
+int btrfs_ordered_update_i_size(struct inode *inode, u64 offset,
 				struct btrfs_ordered_extent *ordered)
 {
 	struct btrfs_ordered_inode_tree *tree = &BTRFS_I(inode)->ordered_tree;
@@ -597,18 +618,32 @@
 	u64 disk_i_size;
 	u64 new_i_size;
 	u64 i_size_test;
+	u64 i_size = i_size_read(inode);
 	struct rb_node *node;
+	struct rb_node *prev = NULL;
 	struct btrfs_ordered_extent *test;
+	int ret = 1;
+
+	if (ordered)
+		offset = entry_end(ordered);
+	else
+		offset = ALIGN(offset, BTRFS_I(inode)->root->sectorsize);
 
 	mutex_lock(&tree->mutex);
 	disk_i_size = BTRFS_I(inode)->disk_i_size;
 
+	/* truncate file */
+	if (disk_i_size > i_size) {
+		BTRFS_I(inode)->disk_i_size = i_size;
+		ret = 0;
+		goto out;
+	}
+
 	/*
 	 * if the disk i_size is already at the inode->i_size, or
 	 * this ordered extent is inside the disk i_size, we're done
 	 */
-	if (disk_i_size >= inode->i_size ||
-	    ordered->file_offset + ordered->len <= disk_i_size) {
+	if (disk_i_size == i_size || offset <= disk_i_size) {
 		goto out;
 	}
 
@@ -616,8 +651,7 @@
 	 * we can't update the disk_isize if there are delalloc bytes
 	 * between disk_i_size and  this ordered extent
 	 */
-	if (test_range_bit(io_tree, disk_i_size,
-			   ordered->file_offset + ordered->len - 1,
+	if (test_range_bit(io_tree, disk_i_size, offset - 1,
 			   EXTENT_DELALLOC, 0, NULL)) {
 		goto out;
 	}
@@ -626,20 +660,32 @@
 	 * if we find an ordered extent then we can't update disk i_size
 	 * yet
 	 */
-	node = &ordered->rb_node;
-	while (1) {
-		node = rb_prev(node);
-		if (!node)
-			break;
+	if (ordered) {
+		node = rb_prev(&ordered->rb_node);
+	} else {
+		prev = tree_search(tree, offset);
+		/*
+		 * we insert file extents without involving ordered struct,
+		 * so there should be no ordered struct cover this offset
+		 */
+		if (prev) {
+			test = rb_entry(prev, struct btrfs_ordered_extent,
+					rb_node);
+			BUG_ON(offset_in_entry(test, offset));
+		}
+		node = prev;
+	}
+	while (node) {
 		test = rb_entry(node, struct btrfs_ordered_extent, rb_node);
 		if (test->file_offset + test->len <= disk_i_size)
 			break;
-		if (test->file_offset >= inode->i_size)
+		if (test->file_offset >= i_size)
 			break;
 		if (test->file_offset >= disk_i_size)
 			goto out;
+		node = rb_prev(node);
 	}
-	new_i_size = min_t(u64, entry_end(ordered), i_size_read(inode));
+	new_i_size = min_t(u64, offset, i_size);
 
 	/*
 	 * at this point, we know we can safely update i_size to at least
@@ -647,7 +693,14 @@
 	 * walk forward and see if ios from higher up in the file have
 	 * finished.
 	 */
-	node = rb_next(&ordered->rb_node);
+	if (ordered) {
+		node = rb_next(&ordered->rb_node);
+	} else {
+		if (prev)
+			node = rb_next(prev);
+		else
+			node = rb_first(&tree->tree);
+	}
 	i_size_test = 0;
 	if (node) {
 		/*
@@ -655,10 +708,10 @@
 		 * between our ordered extent and the next one.
 		 */
 		test = rb_entry(node, struct btrfs_ordered_extent, rb_node);
-		if (test->file_offset > entry_end(ordered))
+		if (test->file_offset > offset)
 			i_size_test = test->file_offset;
 	} else {
-		i_size_test = i_size_read(inode);
+		i_size_test = i_size;
 	}
 
 	/*
@@ -667,15 +720,25 @@
 	 * are no delalloc bytes in this area, it is safe to update
 	 * disk_i_size to the end of the region.
 	 */
-	if (i_size_test > entry_end(ordered) &&
-	    !test_range_bit(io_tree, entry_end(ordered), i_size_test - 1,
-			   EXTENT_DELALLOC, 0, NULL)) {
-		new_i_size = min_t(u64, i_size_test, i_size_read(inode));
+	if (i_size_test > offset &&
+	    !test_range_bit(io_tree, offset, i_size_test - 1,
+			    EXTENT_DELALLOC, 0, NULL)) {
+		new_i_size = min_t(u64, i_size_test, i_size);
 	}
 	BTRFS_I(inode)->disk_i_size = new_i_size;
+	ret = 0;
 out:
+	/*
+	 * we need to remove the ordered extent with the tree lock held
+	 * so that other people calling this function don't find our fully
+	 * processed ordered entry and skip updating the i_size
+	 */
+	if (ordered)
+		__btrfs_remove_ordered_extent(inode, ordered);
 	mutex_unlock(&tree->mutex);
-	return 0;
+	if (ordered)
+		wake_up(&ordered->wait);
+	return ret;
 }
 
 /*
--- linux-mvl-dove-2.6.32.orig/fs/btrfs/super.c
+++ linux-mvl-dove-2.6.32/fs/btrfs/super.c
@@ -126,8 +126,9 @@
 {
 	struct btrfs_fs_info *info = root->fs_info;
 	substring_t args[MAX_OPT_ARGS];
-	char *p, *num;
+	char *p, *num, *orig;
 	int intarg;
+	int ret = 0;
 
 	if (!options)
 		return 0;
@@ -140,6 +141,7 @@
 	if (!options)
 		return -ENOMEM;
 
+	orig = options;
 
 	while ((p = strsep(&options, ",")) != NULL) {
 		int token;
@@ -262,12 +264,18 @@
 		case Opt_discard:
 			btrfs_set_opt(info->mount_opt, DISCARD);
 			break;
+		case Opt_err:
+			printk(KERN_INFO "btrfs: unrecognized mount option "
+			       "'%s'\n", p);
+			ret = -EINVAL;
+			goto out;
 		default:
 			break;
 		}
 	}
-	kfree(options);
-	return 0;
+out:
+	kfree(orig);
+	return ret;
 }
 
 /*
@@ -405,8 +413,8 @@
 		return 0;
 	}
 
-	btrfs_start_delalloc_inodes(root);
-	btrfs_wait_ordered_extents(root, 0);
+	btrfs_start_delalloc_inodes(root, 0);
+	btrfs_wait_ordered_extents(root, 0, 0);
 
 	trans = btrfs_start_transaction(root, 1);
 	ret = btrfs_commit_transaction(trans, root);
@@ -450,6 +458,8 @@
 		seq_puts(seq, ",notreelog");
 	if (btrfs_test_opt(root, FLUSHONCOMMIT))
 		seq_puts(seq, ",flushoncommit");
+	if (btrfs_test_opt(root, DISCARD))
+		seq_puts(seq, ",discard");
 	if (!(root->fs_info->sb->s_flags & MS_POSIXACL))
 		seq_puts(seq, ",noacl");
 	return 0;
--- linux-mvl-dove-2.6.32.orig/fs/btrfs/extent_io.c
+++ linux-mvl-dove-2.6.32/fs/btrfs/extent_io.c
@@ -2574,7 +2574,6 @@
 		.sync_io = wbc->sync_mode == WB_SYNC_ALL,
 	};
 	struct writeback_control wbc_writepages = {
-		.bdi		= wbc->bdi,
 		.sync_mode	= wbc->sync_mode,
 		.older_than_this = NULL,
 		.nr_to_write	= 64,
@@ -2608,7 +2607,6 @@
 		.sync_io = mode == WB_SYNC_ALL,
 	};
 	struct writeback_control wbc_writepages = {
-		.bdi		= inode->i_mapping->backing_dev_info,
 		.sync_mode	= mode,
 		.older_than_this = NULL,
 		.nr_to_write	= nr_pages * 2,
@@ -3165,10 +3163,9 @@
 		spin_unlock(&tree->buffer_lock);
 		goto free_eb;
 	}
-	spin_unlock(&tree->buffer_lock);
-
 	/* add one reference for the tree */
 	atomic_inc(&eb->refs);
+	spin_unlock(&tree->buffer_lock);
 	return eb;
 
 free_eb:
--- linux-mvl-dove-2.6.32.orig/fs/btrfs/ctree.h
+++ linux-mvl-dove-2.6.32/fs/btrfs/ctree.h
@@ -310,6 +310,9 @@
 #define BTRFS_MAX_INLINE_DATA_SIZE(r) (BTRFS_LEAF_DATA_SIZE(r) - \
 					sizeof(struct btrfs_item) - \
 					sizeof(struct btrfs_file_extent_item))
+#define BTRFS_MAX_XATTR_SIZE(r)	(BTRFS_LEAF_DATA_SIZE(r) - \
+				 sizeof(struct btrfs_item) -\
+				 sizeof(struct btrfs_dir_item))
 
 
 /*
@@ -859,8 +862,9 @@
 	struct mutex ordered_operations_mutex;
 	struct rw_semaphore extent_commit_sem;
 
-	struct rw_semaphore subvol_sem;
+	struct rw_semaphore cleanup_work_sem;
 
+	struct rw_semaphore subvol_sem;
 	struct srcu_struct subvol_srcu;
 
 	struct list_head trans_list;
@@ -868,6 +872,9 @@
 	struct list_head dead_roots;
 	struct list_head caching_block_groups;
 
+	spinlock_t delayed_iput_lock;
+	struct list_head delayed_iputs;
+
 	atomic_t nr_async_submits;
 	atomic_t async_submit_draining;
 	atomic_t nr_async_bios;
@@ -1034,12 +1041,12 @@
 	int ref_cows;
 	int track_dirty;
 	int in_radix;
+	int clean_orphans;
 
 	u64 defrag_trans_start;
 	struct btrfs_key defrag_progress;
 	struct btrfs_key defrag_max;
 	int defrag_running;
-	int defrag_level;
 	char *name;
 	int in_sysfs;
 
@@ -1175,6 +1182,8 @@
 #define BTRFS_INODE_DIRSYNC		(1 << 10)
 
 
+#define BTRFS_INODE_ROOT_ITEM_INIT	(1 << 31)
+
 /* some macros to generate set/get funcs for the struct fields.  This
  * assumes there is a lefoo_to_cpu for every type, so lets make a simple
  * one for u8:
@@ -1975,6 +1984,10 @@
 					u64 parent, u64 root_objectid,
 					struct btrfs_disk_key *key, int level,
 					u64 hint, u64 empty_size);
+int btrfs_free_tree_block(struct btrfs_trans_handle *trans,
+			  struct btrfs_root *root,
+			  u64 bytenr, u32 blocksize,
+			  u64 parent, u64 root_objectid, int level);
 struct extent_buffer *btrfs_init_new_buffer(struct btrfs_trans_handle *trans,
 					    struct btrfs_root *root,
 					    u64 bytenr, u32 blocksize,
@@ -2089,6 +2102,10 @@
 		     struct btrfs_path *path,
 		     struct btrfs_key *new_key,
 		     unsigned long split_offset);
+int btrfs_duplicate_item(struct btrfs_trans_handle *trans,
+			 struct btrfs_root *root,
+			 struct btrfs_path *path,
+			 struct btrfs_key *new_key);
 int btrfs_search_slot(struct btrfs_trans_handle *trans, struct btrfs_root
 		      *root, struct btrfs_key *key, struct btrfs_path *p, int
 		      ins_len, int cow);
@@ -2168,6 +2185,8 @@
 int btrfs_find_orphan_roots(struct btrfs_root *tree_root);
 int btrfs_set_root_node(struct btrfs_root_item *item,
 			struct extent_buffer *node);
+void btrfs_check_and_init_root_item(struct btrfs_root_item *item);
+
 /* dir-item.c */
 int btrfs_insert_dir_item(struct btrfs_trans_handle *trans,
 			  struct btrfs_root *root, const char *name,
@@ -2196,9 +2215,10 @@
 			      struct btrfs_path *path,
 			      struct btrfs_dir_item *di);
 int btrfs_insert_xattr_item(struct btrfs_trans_handle *trans,
-			    struct btrfs_root *root, const char *name,
-			    u16 name_len, const void *data, u16 data_len,
-			    u64 dir);
+			    struct btrfs_root *root,
+			    struct btrfs_path *path, u64 objectid,
+			    const char *name, u16 name_len,
+			    const void *data, u16 data_len);
 struct btrfs_dir_item *btrfs_lookup_xattr(struct btrfs_trans_handle *trans,
 					  struct btrfs_root *root,
 					  struct btrfs_path *path, u64 dir,
@@ -2292,7 +2312,7 @@
 			       struct inode *inode, u64 new_size,
 			       u32 min_type);
 
-int btrfs_start_delalloc_inodes(struct btrfs_root *root);
+int btrfs_start_delalloc_inodes(struct btrfs_root *root, int delay_iput);
 int btrfs_set_extent_delalloc(struct inode *inode, u64 start, u64 end);
 int btrfs_writepages(struct address_space *mapping,
 		     struct writeback_control *wbc);
@@ -2332,6 +2352,8 @@
 void btrfs_orphan_cleanup(struct btrfs_root *root);
 int btrfs_cont_expand(struct inode *inode, loff_t size);
 int btrfs_invalidate_inodes(struct btrfs_root *root);
+void btrfs_add_delayed_iput(struct inode *inode);
+void btrfs_run_delayed_iputs(struct btrfs_root *root);
 extern const struct dentry_operations btrfs_dentry_operations;
 
 /* ioctl.c */
@@ -2345,12 +2367,9 @@
 			    int skip_pinned);
 int btrfs_check_file(struct btrfs_root *root, struct inode *inode);
 extern const struct file_operations btrfs_file_operations;
-int btrfs_drop_extents(struct btrfs_trans_handle *trans,
-		       struct btrfs_root *root, struct inode *inode,
-		       u64 start, u64 end, u64 locked_end,
-		       u64 inline_limit, u64 *hint_block, int drop_cache);
+int btrfs_drop_extents(struct btrfs_trans_handle *trans, struct inode *inode,
+		       u64 start, u64 end, u64 *hint_byte, int drop_cache);
 int btrfs_mark_extent_written(struct btrfs_trans_handle *trans,
-			      struct btrfs_root *root,
 			      struct inode *inode, u64 start, u64 end);
 int btrfs_release_file(struct inode *inode, struct file *file);
 
@@ -2380,7 +2399,8 @@
 #else
 #define btrfs_check_acl NULL
 #endif
-int btrfs_init_acl(struct inode *inode, struct inode *dir);
+int btrfs_init_acl(struct btrfs_trans_handle *trans,
+		   struct inode *inode, struct inode *dir);
 int btrfs_acl_chmod(struct inode *inode);
 
 /* relocation.c */
--- linux-mvl-dove-2.6.32.orig/fs/btrfs/disk-io.c
+++ linux-mvl-dove-2.6.32/fs/btrfs/disk-io.c
@@ -892,6 +892,8 @@
 	root->stripesize = stripesize;
 	root->ref_cows = 0;
 	root->track_dirty = 0;
+	root->in_radix = 0;
+	root->clean_orphans = 0;
 
 	root->fs_info = fs_info;
 	root->objectid = objectid;
@@ -928,7 +930,6 @@
 	root->defrag_trans_start = fs_info->generation;
 	init_completion(&root->kobj_unregister);
 	root->defrag_running = 0;
-	root->defrag_level = 0;
 	root->root_key.objectid = objectid;
 	root->anon_super.s_root = NULL;
 	root->anon_super.s_dev = 0;
@@ -980,12 +981,12 @@
 
 	while (1) {
 		ret = find_first_extent_bit(&log_root_tree->dirty_log_pages,
-				    0, &start, &end, EXTENT_DIRTY);
+				0, &start, &end, EXTENT_DIRTY | EXTENT_NEW);
 		if (ret)
 			break;
 
-		clear_extent_dirty(&log_root_tree->dirty_log_pages,
-				   start, end, GFP_NOFS);
+		clear_extent_bits(&log_root_tree->dirty_log_pages, start, end,
+				  EXTENT_DIRTY | EXTENT_NEW, GFP_NOFS);
 	}
 	eb = fs_info->log_root_tree->node;
 
@@ -1144,8 +1145,10 @@
 	root->commit_root = btrfs_root_node(root);
 	BUG_ON(!root->node);
 out:
-	if (location->objectid != BTRFS_TREE_LOG_OBJECTID)
+	if (location->objectid != BTRFS_TREE_LOG_OBJECTID) {
 		root->ref_cows = 1;
+		btrfs_check_and_init_root_item(&root->root_item);
+	}
 
 	return root;
 }
@@ -1210,8 +1213,10 @@
 	ret = radix_tree_insert(&fs_info->fs_roots_radix,
 				(unsigned long)root->root_key.objectid,
 				root);
-	if (ret == 0)
+	if (ret == 0) {
 		root->in_radix = 1;
+		root->clean_orphans = 1;
+	}
 	spin_unlock(&fs_info->fs_roots_radix_lock);
 	radix_tree_preload_end();
 	if (ret) {
@@ -1225,10 +1230,6 @@
 	ret = btrfs_find_dead_roots(fs_info->tree_root,
 				    root->root_key.objectid);
 	WARN_ON(ret);
-
-	if (!(fs_info->sb->s_flags & MS_RDONLY))
-		btrfs_orphan_cleanup(root);
-
 	return root;
 fail:
 	free_fs_root(root);
@@ -1477,6 +1478,7 @@
 
 		if (!(root->fs_info->sb->s_flags & MS_RDONLY) &&
 		    mutex_trylock(&root->fs_info->cleaner_mutex)) {
+			btrfs_run_delayed_iputs(root);
 			btrfs_clean_old_snapshots(root);
 			mutex_unlock(&root->fs_info->cleaner_mutex);
 		}
@@ -1606,6 +1608,7 @@
 	INIT_RADIX_TREE(&fs_info->fs_roots_radix, GFP_ATOMIC);
 	INIT_LIST_HEAD(&fs_info->trans_list);
 	INIT_LIST_HEAD(&fs_info->dead_roots);
+	INIT_LIST_HEAD(&fs_info->delayed_iputs);
 	INIT_LIST_HEAD(&fs_info->hashers);
 	INIT_LIST_HEAD(&fs_info->delalloc_inodes);
 	INIT_LIST_HEAD(&fs_info->ordered_operations);
@@ -1614,6 +1617,7 @@
 	spin_lock_init(&fs_info->new_trans_lock);
 	spin_lock_init(&fs_info->ref_cache_lock);
 	spin_lock_init(&fs_info->fs_roots_radix_lock);
+	spin_lock_init(&fs_info->delayed_iput_lock);
 
 	init_completion(&fs_info->kobj_unregister);
 	fs_info->tree_root = tree_root;
@@ -1689,6 +1693,7 @@
 	mutex_init(&fs_info->cleaner_mutex);
 	mutex_init(&fs_info->volume_mutex);
 	init_rwsem(&fs_info->extent_commit_sem);
+	init_rwsem(&fs_info->cleanup_work_sem);
 	init_rwsem(&fs_info->subvol_sem);
 
 	btrfs_init_free_cluster(&fs_info->meta_alloc_cluster);
@@ -1979,7 +1984,12 @@
 
 	if (!(sb->s_flags & MS_RDONLY)) {
 		ret = btrfs_recover_relocation(tree_root);
-		BUG_ON(ret);
+		if (ret < 0) {
+			printk(KERN_WARNING
+			       "btrfs: failed to recover relocation\n");
+			err = -EINVAL;
+			goto fail_trans_kthread;
+		}
 	}
 
 	location.objectid = BTRFS_FS_TREE_OBJECTID;
@@ -1990,6 +2000,12 @@
 	if (!fs_info->fs_root)
 		goto fail_trans_kthread;
 
+	if (!(sb->s_flags & MS_RDONLY)) {
+		down_read(&fs_info->cleanup_work_sem);
+		btrfs_orphan_cleanup(fs_info->fs_root);
+		up_read(&fs_info->cleanup_work_sem);
+	}
+
 	return tree_root;
 
 fail_trans_kthread:
@@ -2386,8 +2402,14 @@
 	int ret;
 
 	mutex_lock(&root->fs_info->cleaner_mutex);
+	btrfs_run_delayed_iputs(root);
 	btrfs_clean_old_snapshots(root);
 	mutex_unlock(&root->fs_info->cleaner_mutex);
+
+	/* wait until ongoing cleanup work done */
+	down_write(&root->fs_info->cleanup_work_sem);
+	up_write(&root->fs_info->cleanup_work_sem);
+
 	trans = btrfs_start_transaction(root, 1);
 	ret = btrfs_commit_transaction(trans, root);
 	BUG_ON(ret);
--- linux-mvl-dove-2.6.32.orig/fs/btrfs/ordered-data.h
+++ linux-mvl-dove-2.6.32/fs/btrfs/ordered-data.h
@@ -150,12 +150,13 @@
 int btrfs_wait_ordered_range(struct inode *inode, u64 start, u64 len);
 struct btrfs_ordered_extent *
 btrfs_lookup_first_ordered_extent(struct inode * inode, u64 file_offset);
-int btrfs_ordered_update_i_size(struct inode *inode,
+int btrfs_ordered_update_i_size(struct inode *inode, u64 offset,
 				struct btrfs_ordered_extent *ordered);
 int btrfs_find_ordered_sum(struct inode *inode, u64 offset, u64 disk_bytenr, u32 *sum);
-int btrfs_wait_ordered_extents(struct btrfs_root *root, int nocow_only);
 int btrfs_run_ordered_operations(struct btrfs_root *root, int wait);
 int btrfs_add_ordered_operation(struct btrfs_trans_handle *trans,
 				struct btrfs_root *root,
 				struct inode *inode);
+int btrfs_wait_ordered_extents(struct btrfs_root *root,
+			       int nocow_only, int delay_iput);
 #endif
--- linux-mvl-dove-2.6.32.orig/fs/btrfs/transaction.c
+++ linux-mvl-dove-2.6.32/fs/btrfs/transaction.c
@@ -333,6 +333,9 @@
 	memset(trans, 0, sizeof(*trans));
 	kmem_cache_free(btrfs_trans_handle_cachep, trans);
 
+	if (throttle)
+		btrfs_run_delayed_iputs(root);
+
 	return 0;
 }
 
@@ -354,7 +357,7 @@
  * those extents are sent to disk but does not wait on them
  */
 int btrfs_write_marked_extents(struct btrfs_root *root,
-			       struct extent_io_tree *dirty_pages)
+			       struct extent_io_tree *dirty_pages, int mark)
 {
 	int ret;
 	int err = 0;
@@ -367,7 +370,7 @@
 
 	while (1) {
 		ret = find_first_extent_bit(dirty_pages, start, &start, &end,
-					    EXTENT_DIRTY);
+					    mark);
 		if (ret)
 			break;
 		while (start <= end) {
@@ -413,7 +416,7 @@
  * on all the pages and clear them from the dirty pages state tree
  */
 int btrfs_wait_marked_extents(struct btrfs_root *root,
-			      struct extent_io_tree *dirty_pages)
+			      struct extent_io_tree *dirty_pages, int mark)
 {
 	int ret;
 	int err = 0;
@@ -425,12 +428,12 @@
 	unsigned long index;
 
 	while (1) {
-		ret = find_first_extent_bit(dirty_pages, 0, &start, &end,
-					    EXTENT_DIRTY);
+		ret = find_first_extent_bit(dirty_pages, start, &start, &end,
+					    mark);
 		if (ret)
 			break;
 
-		clear_extent_dirty(dirty_pages, start, end, GFP_NOFS);
+		clear_extent_bits(dirty_pages, start, end, mark, GFP_NOFS);
 		while (start <= end) {
 			index = start >> PAGE_CACHE_SHIFT;
 			start = (u64)(index + 1) << PAGE_CACHE_SHIFT;
@@ -460,13 +463,13 @@
  * those extents are on disk for transaction or log commit
  */
 int btrfs_write_and_wait_marked_extents(struct btrfs_root *root,
-					struct extent_io_tree *dirty_pages)
+				struct extent_io_tree *dirty_pages, int mark)
 {
 	int ret;
 	int ret2;
 
-	ret = btrfs_write_marked_extents(root, dirty_pages);
-	ret2 = btrfs_wait_marked_extents(root, dirty_pages);
+	ret = btrfs_write_marked_extents(root, dirty_pages, mark);
+	ret2 = btrfs_wait_marked_extents(root, dirty_pages, mark);
 	return ret || ret2;
 }
 
@@ -479,7 +482,8 @@
 		return filemap_write_and_wait(btree_inode->i_mapping);
 	}
 	return btrfs_write_and_wait_marked_extents(root,
-					   &trans->transaction->dirty_pages);
+					   &trans->transaction->dirty_pages,
+					   EXTENT_DIRTY);
 }
 
 /*
@@ -497,13 +501,16 @@
 {
 	int ret;
 	u64 old_root_bytenr;
+	u64 old_root_used;
 	struct btrfs_root *tree_root = root->fs_info->tree_root;
 
+	old_root_used = btrfs_root_used(&root->root_item);
 	btrfs_write_dirty_block_groups(trans, root);
 
 	while (1) {
 		old_root_bytenr = btrfs_root_bytenr(&root->root_item);
-		if (old_root_bytenr == root->node->start)
+		if (old_root_bytenr == root->node->start &&
+		    old_root_used == btrfs_root_used(&root->root_item))
 			break;
 
 		btrfs_set_root_node(&root->root_item, root->node);
@@ -512,6 +519,7 @@
 					&root->root_item);
 		BUG_ON(ret);
 
+		old_root_used = btrfs_root_used(&root->root_item);
 		ret = btrfs_write_dirty_block_groups(trans, root);
 		BUG_ON(ret);
 	}
@@ -769,6 +777,7 @@
 	record_root_in_trans(trans, root);
 	btrfs_set_root_last_snapshot(&root->root_item, trans->transid);
 	memcpy(new_root_item, &root->root_item, sizeof(*new_root_item));
+	btrfs_check_and_init_root_item(new_root_item);
 
 	key.objectid = objectid;
 	/* record when the snapshot was created in key.offset */
@@ -795,7 +804,6 @@
 	memcpy(&pending->root_key, &key, sizeof(key));
 fail:
 	kfree(new_root_item);
-	btrfs_unreserve_metadata_space(root, 6);
 	return ret;
 }
 
@@ -807,7 +815,6 @@
 	u64 index = 0;
 	struct btrfs_trans_handle *trans;
 	struct inode *parent_inode;
-	struct inode *inode;
 	struct btrfs_root *parent_root;
 
 	parent_inode = pending->dentry->d_parent->d_inode;
@@ -839,8 +846,6 @@
 
 	BUG_ON(ret);
 
-	inode = btrfs_lookup_dentry(parent_inode, pending->dentry);
-	d_instantiate(pending->dentry, inode);
 fail:
 	btrfs_end_transaction(trans, fs_info->fs_root);
 	return ret;
@@ -994,11 +999,11 @@
 		mutex_unlock(&root->fs_info->trans_mutex);
 
 		if (flush_on_commit) {
-			btrfs_start_delalloc_inodes(root);
-			ret = btrfs_wait_ordered_extents(root, 0);
+			btrfs_start_delalloc_inodes(root, 1);
+			ret = btrfs_wait_ordered_extents(root, 0, 1);
 			BUG_ON(ret);
 		} else if (snap_pending) {
-			ret = btrfs_wait_ordered_extents(root, 1);
+			ret = btrfs_wait_ordered_extents(root, 0, 1);
 			BUG_ON(ret);
 		}
 
@@ -1116,6 +1121,10 @@
 		current->journal_info = NULL;
 
 	kmem_cache_free(btrfs_trans_handle_cachep, trans);
+
+	if (current != root->fs_info->transaction_kthread)
+		btrfs_run_delayed_iputs(root);
+
 	return ret;
 }
 
--- linux-mvl-dove-2.6.32.orig/fs/nilfs2/btnode.h
+++ linux-mvl-dove-2.6.32/fs/nilfs2/btnode.h
@@ -37,7 +37,6 @@
 	struct buffer_head *newbh;
 };
 
-void nilfs_btnode_cache_init_once(struct address_space *);
 void nilfs_btnode_cache_init(struct address_space *, struct backing_dev_info *);
 void nilfs_btnode_cache_clear(struct address_space *);
 int nilfs_btnode_submit_block(struct address_space *, __u64, sector_t,
--- linux-mvl-dove-2.6.32.orig/fs/nilfs2/file.c
+++ linux-mvl-dove-2.6.32/fs/nilfs2/file.c
@@ -72,10 +72,9 @@
 	/*
 	 * check to see if the page is mapped already (no holes)
 	 */
-	if (PageMappedToDisk(page)) {
-		unlock_page(page);
+	if (PageMappedToDisk(page))
 		goto mapped;
-	}
+
 	if (page_has_buffers(page)) {
 		struct buffer_head *bh, *head;
 		int fully_mapped = 1;
@@ -90,7 +89,6 @@
 
 		if (fully_mapped) {
 			SetPageMappedToDisk(page);
-			unlock_page(page);
 			goto mapped;
 		}
 	}
@@ -105,16 +103,18 @@
 		return VM_FAULT_SIGBUS;
 
 	ret = block_page_mkwrite(vma, vmf, nilfs_get_block);
-	if (unlikely(ret)) {
+	if (ret != VM_FAULT_LOCKED) {
 		nilfs_transaction_abort(inode->i_sb);
 		return ret;
 	}
+	nilfs_set_file_dirty(NILFS_SB(inode->i_sb), inode,
+			     1 << (PAGE_SHIFT - inode->i_blkbits));
 	nilfs_transaction_commit(inode->i_sb);
 
  mapped:
 	SetPageChecked(page);
 	wait_on_page_writeback(page);
-	return 0;
+	return VM_FAULT_LOCKED;
 }
 
 static const struct vm_operations_struct nilfs_file_vm_ops = {
--- linux-mvl-dove-2.6.32.orig/fs/nilfs2/super.c
+++ linux-mvl-dove-2.6.32/fs/nilfs2/super.c
@@ -166,7 +166,7 @@
 #ifdef CONFIG_NILFS_XATTR
 	init_rwsem(&ii->xattr_sem);
 #endif
-	nilfs_btnode_cache_init_once(&ii->i_btnode_cache);
+	address_space_init_once(&ii->i_btnode_cache);
 	ii->i_bmap = (struct nilfs_bmap *)&ii->i_bmap_union;
 	inode_init_once(&ii->vfs_inode);
 }
@@ -781,6 +781,7 @@
 	sb->s_export_op = &nilfs_export_ops;
 	sb->s_root = NULL;
 	sb->s_time_gran = 1;
+	sb->s_bdi = nilfs->ns_bdi;
 
 	if (!nilfs_loaded(nilfs)) {
 		err = load_nilfs(nilfs, sbi);
--- linux-mvl-dove-2.6.32.orig/fs/nilfs2/btnode.c
+++ linux-mvl-dove-2.6.32/fs/nilfs2/btnode.c
@@ -34,19 +34,6 @@
 #include "btnode.h"
 
 
-void nilfs_btnode_cache_init_once(struct address_space *btnc)
-{
-	memset(btnc, 0, sizeof(*btnc));
-	INIT_RADIX_TREE(&btnc->page_tree, GFP_ATOMIC);
-	spin_lock_init(&btnc->tree_lock);
-	INIT_LIST_HEAD(&btnc->private_list);
-	spin_lock_init(&btnc->private_lock);
-
-	spin_lock_init(&btnc->i_mmap_lock);
-	INIT_RAW_PRIO_TREE_ROOT(&btnc->i_mmap);
-	INIT_LIST_HEAD(&btnc->i_mmap_nonlinear);
-}
-
 static const struct address_space_operations def_btnode_aops = {
 	.sync_page		= block_sync_page,
 };
--- linux-mvl-dove-2.6.32.orig/fs/squashfs/namei.c
+++ linux-mvl-dove-2.6.32/fs/squashfs/namei.c
@@ -175,6 +175,11 @@
 		length += sizeof(dirh);
 
 		dir_count = le32_to_cpu(dirh.count) + 1;
+
+		/* dir_count should never be larger than 256 */
+		if (dir_count > 256)
+			goto data_error;
+
 		while (dir_count--) {
 			/*
 			 * Read directory entry.
@@ -186,6 +191,10 @@
 
 			size = le16_to_cpu(dire->size) + 1;
 
+			/* size should never be larger than SQUASHFS_NAME_LEN */
+			if (size > SQUASHFS_NAME_LEN)
+				goto data_error;
+
 			err = squashfs_read_metadata(dir->i_sb, dire->name,
 					&block, &offset, size);
 			if (err < 0)
@@ -227,6 +236,9 @@
 	d_add(dentry, inode);
 	return ERR_PTR(0);
 
+data_error:
+	err = -EIO;
+
 read_failure:
 	ERROR("Unable to read directory block [%llx:%x]\n",
 		squashfs_i(dir)->start + msblk->directory_table,
--- linux-mvl-dove-2.6.32.orig/fs/squashfs/dir.c
+++ linux-mvl-dove-2.6.32/fs/squashfs/dir.c
@@ -173,6 +173,11 @@
 		length += sizeof(dirh);
 
 		dir_count = le32_to_cpu(dirh.count) + 1;
+
+		/* dir_count should never be larger than 256 */
+		if (dir_count > 256)
+			goto failed_read;
+
 		while (dir_count--) {
 			/*
 			 * Read directory entry.
@@ -184,6 +189,10 @@
 
 			size = le16_to_cpu(dire->size) + 1;
 
+			/* size should never be larger than SQUASHFS_NAME_LEN */
+			if (size > SQUASHFS_NAME_LEN)
+				goto failed_read;
+
 			err = squashfs_read_metadata(inode->i_sb, dire->name,
 					&block, &offset, size);
 			if (err < 0)
--- linux-mvl-dove-2.6.32.orig/fs/hfs/super.c
+++ linux-mvl-dove-2.6.32/fs/hfs/super.c
@@ -409,8 +409,13 @@
 	/* try to get the root inode */
 	hfs_find_init(HFS_SB(sb)->cat_tree, &fd);
 	res = hfs_cat_find_brec(sb, HFS_ROOT_CNID, &fd);
-	if (!res)
+	if (!res) {
+		if (fd.entrylength > sizeof(rec) || fd.entrylength < 0) {
+			res =  -EIO;
+			goto bail;
+		}
 		hfs_bnode_read(fd.bnode, &rec, fd.entryoffset, fd.entrylength);
+	}
 	if (res) {
 		hfs_find_exit(&fd);
 		goto bail_no_root;
--- linux-mvl-dove-2.6.32.orig/fs/hfs/dir.c
+++ linux-mvl-dove-2.6.32/fs/hfs/dir.c
@@ -79,6 +79,11 @@
 		filp->f_pos++;
 		/* fall through */
 	case 1:
+		if (fd.entrylength > sizeof(entry) || fd.entrylength < 0) {
+			err = -EIO;
+			goto out;
+		}
+
 		hfs_bnode_read(fd.bnode, &entry, fd.entryoffset, fd.entrylength);
 		if (entry.type != HFS_CDR_THD) {
 			printk(KERN_ERR "hfs: bad catalog folder thread\n");
@@ -109,6 +114,12 @@
 			err = -EIO;
 			goto out;
 		}
+
+		if (fd.entrylength > sizeof(entry) || fd.entrylength < 0) {
+			err = -EIO;
+			goto out;
+		}
+
 		hfs_bnode_read(fd.bnode, &entry, fd.entryoffset, fd.entrylength);
 		type = entry.type;
 		len = hfs_mac2asc(sb, strbuf, &fd.key->cat.CName);
--- linux-mvl-dove-2.6.32.orig/fs/hfs/catalog.c
+++ linux-mvl-dove-2.6.32/fs/hfs/catalog.c
@@ -289,6 +289,10 @@
 	err = hfs_brec_find(&src_fd);
 	if (err)
 		goto out;
+	if (src_fd.entrylength > sizeof(entry) || src_fd.entrylength < 0) {
+		err = -EIO;
+		goto out;
+	}
 
 	hfs_bnode_read(src_fd.bnode, &entry, src_fd.entryoffset,
 			    src_fd.entrylength);
--- linux-mvl-dove-2.6.32.orig/fs/sysfs/inode.c
+++ linux-mvl-dove-2.6.32/fs/sysfs/inode.c
@@ -94,30 +94,29 @@
 		if (!sd_attrs)
 			return -ENOMEM;
 		sd->s_iattr = sd_attrs;
-	} else {
-		/* attributes were changed at least once in past */
-		iattrs = &sd_attrs->ia_iattr;
-
-		if (ia_valid & ATTR_UID)
-			iattrs->ia_uid = iattr->ia_uid;
-		if (ia_valid & ATTR_GID)
-			iattrs->ia_gid = iattr->ia_gid;
-		if (ia_valid & ATTR_ATIME)
-			iattrs->ia_atime = timespec_trunc(iattr->ia_atime,
-					inode->i_sb->s_time_gran);
-		if (ia_valid & ATTR_MTIME)
-			iattrs->ia_mtime = timespec_trunc(iattr->ia_mtime,
-					inode->i_sb->s_time_gran);
-		if (ia_valid & ATTR_CTIME)
-			iattrs->ia_ctime = timespec_trunc(iattr->ia_ctime,
-					inode->i_sb->s_time_gran);
-		if (ia_valid & ATTR_MODE) {
-			umode_t mode = iattr->ia_mode;
-
-			if (!in_group_p(inode->i_gid) && !capable(CAP_FSETID))
-				mode &= ~S_ISGID;
-			iattrs->ia_mode = sd->s_mode = mode;
-		}
+	}
+	/* attributes were changed at least once in past */
+	iattrs = &sd_attrs->ia_iattr;
+
+	if (ia_valid & ATTR_UID)
+		iattrs->ia_uid = iattr->ia_uid;
+	if (ia_valid & ATTR_GID)
+		iattrs->ia_gid = iattr->ia_gid;
+	if (ia_valid & ATTR_ATIME)
+		iattrs->ia_atime = timespec_trunc(iattr->ia_atime,
+			inode->i_sb->s_time_gran);
+	if (ia_valid & ATTR_MTIME)
+		iattrs->ia_mtime = timespec_trunc(iattr->ia_mtime,
+			inode->i_sb->s_time_gran);
+	if (ia_valid & ATTR_CTIME)
+		iattrs->ia_ctime = timespec_trunc(iattr->ia_ctime,
+			inode->i_sb->s_time_gran);
+	if (ia_valid & ATTR_MODE) {
+		umode_t mode = iattr->ia_mode;
+
+		if (!in_group_p(inode->i_gid) && !capable(CAP_FSETID))
+			mode &= ~S_ISGID;
+		iattrs->ia_mode = sd->s_mode = mode;
 	}
 	return error;
 }
--- linux-mvl-dove-2.6.32.orig/fs/sysfs/file.c
+++ linux-mvl-dove-2.6.32/fs/sysfs/file.c
@@ -340,7 +340,7 @@
 	char *p;
 
 	p = d_path(&file->f_path, last_sysfs_file, sizeof(last_sysfs_file));
-	if (p)
+	if (!IS_ERR(p))
 		memmove(last_sysfs_file, p, strlen(p) + 1);
 
 	/* need attr_sd for attr and ops, its parent for kobj */
--- linux-mvl-dove-2.6.32.orig/fs/ext3/xattr.c
+++ linux-mvl-dove-2.6.32/fs/ext3/xattr.c
@@ -800,8 +800,16 @@
 			/* We need to allocate a new block */
 			ext3_fsblk_t goal = ext3_group_first_block_no(sb,
 						EXT3_I(inode)->i_block_group);
-			ext3_fsblk_t block = ext3_new_block(handle, inode,
-							goal, &error);
+			ext3_fsblk_t block;
+
+			/*
+			 * Protect us agaist concurrent allocations to the
+			 * same inode from ext3_..._writepage(). Reservation
+			 * code does not expect racing allocations.
+			 */
+			mutex_lock(&EXT3_I(inode)->truncate_mutex);
+			block = ext3_new_block(handle, inode, goal, &error);
+			mutex_unlock(&EXT3_I(inode)->truncate_mutex);
 			if (error)
 				goto cleanup;
 			ea_idebug(inode, "creating block %d", block);
@@ -960,6 +968,10 @@
 	if (error)
 		goto cleanup;
 
+	error = ext3_journal_get_write_access(handle, is.iloc.bh);
+	if (error)
+		goto cleanup;
+
 	if (EXT3_I(inode)->i_state & EXT3_STATE_NEW) {
 		struct ext3_inode *raw_inode = ext3_raw_inode(&is.iloc);
 		memset(raw_inode, 0, EXT3_SB(inode->i_sb)->s_inode_size);
@@ -985,9 +997,6 @@
 		if (flags & XATTR_CREATE)
 			goto cleanup;
 	}
-	error = ext3_journal_get_write_access(handle, is.iloc.bh);
-	if (error)
-		goto cleanup;
 	if (!value) {
 		if (!is.s.not_found)
 			error = ext3_xattr_ibody_set(handle, inode, &i, &is);
--- linux-mvl-dove-2.6.32.orig/fs/ext3/inode.c
+++ linux-mvl-dove-2.6.32/fs/ext3/inode.c
@@ -1151,6 +1151,16 @@
 	return ext3_journal_get_write_access(handle, bh);
 }
 
+/*
+ * Truncate blocks that were not used by write. We have to truncate the
+ * pagecache as well so that corresponding buffers get properly unmapped.
+ */
+static void ext3_truncate_failed_write(struct inode *inode)
+{
+	truncate_inode_pages(inode->i_mapping, inode->i_size);
+	ext3_truncate(inode);
+}
+
 static int ext3_write_begin(struct file *file, struct address_space *mapping,
 				loff_t pos, unsigned len, unsigned flags,
 				struct page **pagep, void **fsdata)
@@ -1209,7 +1219,7 @@
 		unlock_page(page);
 		page_cache_release(page);
 		if (pos + len > inode->i_size)
-			ext3_truncate(inode);
+			ext3_truncate_failed_write(inode);
 	}
 	if (ret == -ENOSPC && ext3_should_retry_alloc(inode->i_sb, &retries))
 		goto retry;
@@ -1304,7 +1314,7 @@
 	page_cache_release(page);
 
 	if (pos + len > inode->i_size)
-		ext3_truncate(inode);
+		ext3_truncate_failed_write(inode);
 	return ret ? ret : copied;
 }
 
@@ -1330,7 +1340,7 @@
 	page_cache_release(page);
 
 	if (pos + len > inode->i_size)
-		ext3_truncate(inode);
+		ext3_truncate_failed_write(inode);
 	return ret ? ret : copied;
 }
 
@@ -1383,7 +1393,7 @@
 	page_cache_release(page);
 
 	if (pos + len > inode->i_size)
-		ext3_truncate(inode);
+		ext3_truncate_failed_write(inode);
 	return ret ? ret : copied;
 }
 
--- linux-mvl-dove-2.6.32.orig/fs/ext3/namei.c
+++ linux-mvl-dove-2.6.32/fs/ext3/namei.c
@@ -1425,10 +1425,19 @@
 	frame->at = entries;
 	frame->bh = bh;
 	bh = bh2;
+	/*
+	 * Mark buffers dirty here so that if do_split() fails we write a
+	 * consistent set of buffers to disk.
+	 */
+	ext3_journal_dirty_metadata(handle, frame->bh);
+	ext3_journal_dirty_metadata(handle, bh);
 	de = do_split(handle,dir, &bh, frame, &hinfo, &retval);
-	dx_release (frames);
-	if (!(de))
+	if (!de) {
+		ext3_mark_inode_dirty(handle, dir);
+		dx_release(frames);
 		return retval;
+	}
+	dx_release(frames);
 
 	return add_dirent_to_buf(handle, dentry, inode, de, bh);
 }
@@ -1550,8 +1559,8 @@
 			goto cleanup;
 		node2 = (struct dx_node *)(bh2->b_data);
 		entries2 = node2->entries;
+		memset(&node2->fake, 0, sizeof(struct fake_dirent));
 		node2->fake.rec_len = ext3_rec_len_to_disk(sb->s_blocksize);
-		node2->fake.inode = 0;
 		BUFFER_TRACE(frame->bh, "get_write_access");
 		err = ext3_journal_get_write_access(handle, frame->bh);
 		if (err)
--- linux-mvl-dove-2.6.32.orig/fs/ext3/super.c
+++ linux-mvl-dove-2.6.32/fs/ext3/super.c
@@ -1404,6 +1404,13 @@
 		return;
 	}
 
+	/* Check if feature set allows readwrite operations */
+	if (EXT3_HAS_RO_COMPAT_FEATURE(sb, ~EXT3_FEATURE_RO_COMPAT_SUPP)) {
+		printk(KERN_INFO "EXT3-fs: %s: Skipping orphan cleanup due to "
+			 "unknown ROCOMPAT features\n", sb->s_id);
+		return;
+	}
+
 	if (EXT3_SB(sb)->s_mount_state & EXT3_ERROR_FS) {
 		if (es->s_last_orphan)
 			jbd_debug(1, "Errors on filesystem, "
@@ -2686,13 +2693,11 @@
 	buf->f_bsize = sb->s_blocksize;
 	buf->f_blocks = le32_to_cpu(es->s_blocks_count) - sbi->s_overhead_last;
 	buf->f_bfree = percpu_counter_sum_positive(&sbi->s_freeblocks_counter);
-	es->s_free_blocks_count = cpu_to_le32(buf->f_bfree);
 	buf->f_bavail = buf->f_bfree - le32_to_cpu(es->s_r_blocks_count);
 	if (buf->f_bfree < le32_to_cpu(es->s_r_blocks_count))
 		buf->f_bavail = 0;
 	buf->f_files = le32_to_cpu(es->s_inodes_count);
 	buf->f_ffree = percpu_counter_sum_positive(&sbi->s_freeinodes_counter);
-	es->s_free_inodes_count = cpu_to_le32(buf->f_ffree);
 	buf->f_namelen = EXT3_NAME_LEN;
 	fsid = le64_to_cpup((void *)es->s_uuid) ^
 	       le64_to_cpup((void *)es->s_uuid + sizeof(u64));
--- linux-mvl-dove-2.6.32.orig/fs/proc/task_mmu.c
+++ linux-mvl-dove-2.6.32/fs/proc/task_mmu.c
@@ -114,11 +114,11 @@
 
 	priv->task = get_pid_task(priv->pid, PIDTYPE_PID);
 	if (!priv->task)
-		return NULL;
+		return ERR_PTR(-ESRCH);
 
 	mm = mm_for_maps(priv->task);
-	if (!mm)
-		return NULL;
+	if (!mm || IS_ERR(mm))
+		return mm;
 	down_read(&mm->mmap_sem);
 
 	tail_vma = get_gate_vma(priv->task);
@@ -175,7 +175,8 @@
 	struct proc_maps_private *priv = m->private;
 	struct vm_area_struct *vma = v;
 
-	vma_stop(priv, vma);
+	if (!IS_ERR(vma))
+		vma_stop(priv, vma);
 	if (priv->task)
 		put_task_struct(priv->task);
 }
@@ -206,6 +207,7 @@
 	int flags = vma->vm_flags;
 	unsigned long ino = 0;
 	unsigned long long pgoff = 0;
+	unsigned long start;
 	dev_t dev = 0;
 	int len;
 
@@ -216,8 +218,14 @@
 		pgoff = ((loff_t)vma->vm_pgoff) << PAGE_SHIFT;
 	}
 
+	/* We don't show the stack guard page in /proc/maps */
+	start = vma->vm_start;
+	if (vma->vm_flags & VM_GROWSDOWN)
+		if (!vma_stack_continue(vma->vm_prev, vma->vm_start))
+			start += PAGE_SIZE;
+
 	seq_printf(m, "%08lx-%08lx %c%c%c%c %08llx %02x:%02x %lu %n",
-			vma->vm_start,
+			start,
 			vma->vm_end,
 			flags & VM_READ ? 'r' : '-',
 			flags & VM_WRITE ? 'w' : '-',
@@ -237,31 +245,12 @@
 		const char *name = arch_vma_name(vma);
 		if (!name) {
 			if (mm) {
-				if (vma->vm_start <= mm->start_brk &&
-						vma->vm_end >= mm->brk) {
+				if (vma->vm_start <= mm->brk &&
+						vma->vm_end >= mm->start_brk) {
 					name = "[heap]";
 				} else if (vma->vm_start <= mm->start_stack &&
 					   vma->vm_end >= mm->start_stack) {
 					name = "[stack]";
-				} else {
-					unsigned long stack_start;
-					struct proc_maps_private *pmp;
-
-					pmp = m->private;
-					stack_start = pmp->task->stack_start;
-
-					if (vma->vm_start <= stack_start &&
-					    vma->vm_end >= stack_start) {
-						pad_len_spaces(m, len);
-						seq_printf(m,
-						 "[threadstack:%08lx]",
-#ifdef CONFIG_STACK_GROWSUP
-						 vma->vm_end - stack_start
-#else
-						 stack_start - vma->vm_start
-#endif
-						);
-					}
 				}
 			} else {
 				name = "[vdso]";
@@ -693,8 +682,9 @@
 	if (!task)
 		goto out;
 
-	ret = -EACCES;
-	if (!ptrace_may_access(task, PTRACE_MODE_READ))
+	mm = mm_for_maps(task);
+	ret = PTR_ERR(mm);
+	if (!mm || IS_ERR(mm))
 		goto out_task;
 
 	ret = -EINVAL;
@@ -707,10 +697,6 @@
 	if (!count)
 		goto out_task;
 
-	mm = get_task_mm(task);
-	if (!mm)
-		goto out_task;
-
 
 	uaddr = (unsigned long)buf & PAGE_MASK;
 	uend = (unsigned long)(buf + count);
--- linux-mvl-dove-2.6.32.orig/fs/proc/base.c
+++ linux-mvl-dove-2.6.32/fs/proc/base.c
@@ -128,6 +128,12 @@
 		NULL, &proc_single_file_operations,	\
 		{ .proc_show = show } )
 
+/* ANDROID is for special files in /proc. */
+#define ANDROID(NAME, MODE, OTYPE)			\
+	NOD(NAME, (S_IFREG|(MODE)),			\
+		&proc_##OTYPE##_inode_operations,	\
+		&proc_##OTYPE##_operations, {})
+
 /*
  * Count the number of hardlinks for the pid_entry table, excluding the .
  * and .. links.
@@ -235,15 +241,17 @@
 struct mm_struct *mm_for_maps(struct task_struct *task)
 {
 	struct mm_struct *mm;
+	int err;
 
-	if (mutex_lock_killable(&task->cred_guard_mutex))
-		return NULL;
+	err =  mutex_lock_killable(&task->cred_guard_mutex);
+	if (err)
+		return ERR_PTR(err);
 
 	mm = get_task_mm(task);
 	if (mm && mm != current->mm &&
 			!ptrace_may_access(task, PTRACE_MODE_READ)) {
 		mmput(mm);
-		mm = NULL;
+		mm = ERR_PTR(-EACCES);
 	}
 	mutex_unlock(&task->cred_guard_mutex);
 
@@ -289,9 +297,9 @@
 
 static int proc_pid_auxv(struct task_struct *task, char *buffer)
 {
-	int res = 0;
-	struct mm_struct *mm = get_task_mm(task);
-	if (mm) {
+	struct mm_struct *mm = mm_for_maps(task);
+	int res = PTR_ERR(mm);
+	if (mm && !IS_ERR(mm)) {
 		unsigned int nwords = 0;
 		do {
 			nwords += 2;
@@ -328,6 +336,23 @@
 }
 #endif /* CONFIG_KALLSYMS */
 
+static int lock_trace(struct task_struct *task)
+{
+	int err = mutex_lock_killable(&task->cred_guard_mutex);
+	if (err)
+		return err;
+	if (!ptrace_may_access(task, PTRACE_MODE_ATTACH)) {
+		mutex_unlock(&task->cred_guard_mutex);
+		return -EPERM;
+	}
+	return 0;
+}
+
+static void unlock_trace(struct task_struct *task)
+{
+	mutex_unlock(&task->cred_guard_mutex);
+}
+
 #ifdef CONFIG_STACKTRACE
 
 #define MAX_STACK_TRACE_DEPTH	64
@@ -337,6 +362,7 @@
 {
 	struct stack_trace trace;
 	unsigned long *entries;
+	int err;
 	int i;
 
 	entries = kmalloc(MAX_STACK_TRACE_DEPTH * sizeof(*entries), GFP_KERNEL);
@@ -347,15 +373,20 @@
 	trace.max_entries	= MAX_STACK_TRACE_DEPTH;
 	trace.entries		= entries;
 	trace.skip		= 0;
-	save_stack_trace_tsk(task, &trace);
 
-	for (i = 0; i < trace.nr_entries; i++) {
-		seq_printf(m, "[<%p>] %pS\n",
-			   (void *)entries[i], (void *)entries[i]);
+	err = lock_trace(task);
+	if (!err) {
+		save_stack_trace_tsk(task, &trace);
+
+		for (i = 0; i < trace.nr_entries; i++) {
+			seq_printf(m, "[<%p>] %pS\n",
+				   (void *)entries[i], (void *)entries[i]);
+		}
+		unlock_trace(task);
 	}
 	kfree(entries);
 
-	return 0;
+	return err;
 }
 #endif
 
@@ -442,12 +473,13 @@
 unsigned long badness(struct task_struct *p, unsigned long uptime);
 static int proc_oom_score(struct task_struct *task, char *buffer)
 {
-	unsigned long points;
+	unsigned long points = 0;
 	struct timespec uptime;
 
 	do_posix_clock_monotonic_gettime(&uptime);
 	read_lock(&tasklist_lock);
-	points = badness(task->group_leader, uptime.tv_sec);
+	if (pid_alive(task))
+		points = badness(task, uptime.tv_sec);
 	read_unlock(&tasklist_lock);
 	return sprintf(buffer, "%lu\n", points);
 }
@@ -526,18 +558,22 @@
 {
 	long nr;
 	unsigned long args[6], sp, pc;
+	int res = lock_trace(task);
+	if (res)
+		return res;
 
 	if (task_current_syscall(task, &nr, args, 6, &sp, &pc))
-		return sprintf(buffer, "running\n");
-
-	if (nr < 0)
-		return sprintf(buffer, "%ld 0x%lx 0x%lx\n", nr, sp, pc);
-
-	return sprintf(buffer,
+		res = sprintf(buffer, "running\n");
+	else if (nr < 0)
+		res = sprintf(buffer, "%ld 0x%lx 0x%lx\n", nr, sp, pc);
+	else
+		res = sprintf(buffer,
 		       "%ld 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx\n",
 		       nr,
 		       args[0], args[1], args[2], args[3], args[4], args[5],
 		       sp, pc);
+	unlock_trace(task);
+	return res;
 }
 #endif /* CONFIG_HAVE_ARCH_TRACEHOOK */
 
@@ -935,20 +971,18 @@
 	if (!task)
 		goto out_no_task;
 
-	if (!ptrace_may_access(task, PTRACE_MODE_READ))
-		goto out;
-
 	ret = -ENOMEM;
 	page = (char *)__get_free_page(GFP_TEMPORARY);
 	if (!page)
 		goto out;
 
-	ret = 0;
 
-	mm = get_task_mm(task);
-	if (!mm)
+	mm = mm_for_maps(task);
+	ret = PTR_ERR(mm);
+	if (!mm || IS_ERR(mm))
 		goto out_free;
 
+	ret = 0;
 	while (count > 0) {
 		int this_len, retval, max_len;
 
@@ -1061,6 +1095,33 @@
 	return count;
 }
 
+static int oom_adjust_permission(struct inode *inode, int mask)
+{
+	uid_t uid;
+	struct task_struct *p = get_proc_task(inode);
+	if(p) {
+		uid = task_uid(p);
+		put_task_struct(p);
+	}
+
+	/*
+	 * System Server (uid == 1000) is granted access to oom_adj of all 
+	 * android applications (uid > 10000) as and services (uid >= 1000)
+	 */
+	if (p && (current_fsuid() == 1000) && (uid >= 1000)) {
+		if (inode->i_mode >> 6 & mask) {
+			return 0;
+		}
+	}
+
+	/* Fall back to default. */
+	return generic_permission(inode, mask, NULL);
+}
+
+static const struct inode_operations proc_oom_adjust_inode_operations = {
+	.permission	= oom_adjust_permission,
+};
+
 static const struct file_operations proc_oom_adjust_operations = {
 	.read		= oom_adjust_read,
 	.write		= oom_adjust_write,
@@ -2304,16 +2365,30 @@
 {
 	struct pid_namespace *ns = dentry->d_sb->s_fs_info;
 	pid_t tgid = task_tgid_nr_ns(current, ns);
-	char tmp[PROC_NUMBUF];
-	if (!tgid)
-		return ERR_PTR(-ENOENT);
-	sprintf(tmp, "%d", task_tgid_nr_ns(current, ns));
-	return ERR_PTR(vfs_follow_link(nd,tmp));
+	char *name = ERR_PTR(-ENOENT);
+	if (tgid) {
+		name = __getname();
+		if (!name)
+			name = ERR_PTR(-ENOMEM);
+		else
+			sprintf(name, "%d", tgid);
+	}
+	nd_set_link(nd, name);
+	return NULL;
+}
+
+static void proc_self_put_link(struct dentry *dentry, struct nameidata *nd,
+				void *cookie)
+{
+	char *s = nd_get_link(nd);
+	if (!IS_ERR(s))
+		__putname(s);
 }
 
 static const struct inode_operations proc_self_inode_operations = {
 	.readlink	= proc_self_readlink,
 	.follow_link	= proc_self_follow_link,
+	.put_link	= proc_self_put_link,
 };
 
 /*
@@ -2439,6 +2514,9 @@
 	struct task_io_accounting acct = task->ioac;
 	unsigned long flags;
 
+	if (!ptrace_may_access(task, PTRACE_MODE_READ))
+		return -EACCES;
+
 	if (whole && lock_task_sighand(task, &flags)) {
 		struct task_struct *t = task;
 
@@ -2479,8 +2557,12 @@
 static int proc_pid_personality(struct seq_file *m, struct pid_namespace *ns,
 				struct pid *pid, struct task_struct *task)
 {
-	seq_printf(m, "%08x\n", task->personality);
-	return 0;
+	int err = lock_trace(task);
+	if (!err) {
+		seq_printf(m, "%08x\n", task->personality);
+		unlock_trace(task);
+	}
+	return err;
 }
 
 /*
@@ -2499,13 +2581,13 @@
 	REG("environ",    S_IRUSR, proc_environ_operations),
 	INF("auxv",       S_IRUSR, proc_pid_auxv),
 	ONE("status",     S_IRUGO, proc_pid_status),
-	ONE("personality", S_IRUSR, proc_pid_personality),
+	ONE("personality", S_IRUGO, proc_pid_personality),
 	INF("limits",	  S_IRUSR, proc_pid_limits),
 #ifdef CONFIG_SCHED_DEBUG
 	REG("sched",      S_IRUGO|S_IWUSR, proc_pid_sched_operations),
 #endif
 #ifdef CONFIG_HAVE_ARCH_TRACEHOOK
-	INF("syscall",    S_IRUSR, proc_pid_syscall),
+	INF("syscall",    S_IRUGO, proc_pid_syscall),
 #endif
 	INF("cmdline",    S_IRUGO, proc_pid_cmdline),
 	ONE("stat",       S_IRUGO, proc_tgid_stat),
@@ -2524,7 +2606,7 @@
 #ifdef CONFIG_PROC_PAGE_MONITOR
 	REG("clear_refs", S_IWUSR, proc_clear_refs_operations),
 	REG("smaps",      S_IRUGO, proc_smaps_operations),
-	REG("pagemap",    S_IRUSR, proc_pagemap_operations),
+	REG("pagemap",    S_IRUGO, proc_pagemap_operations),
 #endif
 #ifdef CONFIG_SECURITY
 	DIR("attr",       S_IRUGO|S_IXUGO, proc_attr_dir_inode_operations, proc_attr_dir_operations),
@@ -2533,7 +2615,7 @@
 	INF("wchan",      S_IRUGO, proc_pid_wchan),
 #endif
 #ifdef CONFIG_STACKTRACE
-	ONE("stack",      S_IRUSR, proc_pid_stack),
+	ONE("stack",      S_IRUGO, proc_pid_stack),
 #endif
 #ifdef CONFIG_SCHEDSTATS
 	INF("schedstat",  S_IRUGO, proc_pid_schedstat),
@@ -2548,7 +2630,7 @@
 	REG("cgroup",  S_IRUGO, proc_cgroup_operations),
 #endif
 	INF("oom_score",  S_IRUGO, proc_oom_score),
-	REG("oom_adj",    S_IRUGO|S_IWUSR, proc_oom_adjust_operations),
+	ANDROID("oom_adj",S_IRUGO|S_IWUSR, oom_adjust),
 #ifdef CONFIG_AUDITSYSCALL
 	REG("loginuid",   S_IWUSR|S_IRUGO, proc_loginuid_operations),
 	REG("sessionid",  S_IRUGO, proc_sessionid_operations),
@@ -2560,7 +2642,7 @@
 	REG("coredump_filter", S_IRUGO|S_IWUSR, proc_coredump_filter_operations),
 #endif
 #ifdef CONFIG_TASK_IO_ACCOUNTING
-	INF("io",	S_IRUGO, proc_tgid_io_accounting),
+	INF("io",	S_IRUSR, proc_tgid_io_accounting),
 #endif
 };
 
@@ -2791,11 +2873,16 @@
 /* for the /proc/ directory itself, after non-process stuff has been done */
 int proc_pid_readdir(struct file * filp, void * dirent, filldir_t filldir)
 {
-	unsigned int nr = filp->f_pos - FIRST_PROCESS_ENTRY;
-	struct task_struct *reaper = get_proc_task(filp->f_path.dentry->d_inode);
+	unsigned int nr;
+	struct task_struct *reaper;
 	struct tgid_iter iter;
 	struct pid_namespace *ns;
 
+	if (filp->f_pos >= PID_MAX_LIMIT + TGID_OFFSET)
+		goto out_no_task;
+	nr = filp->f_pos - FIRST_PROCESS_ENTRY;
+
+	reaper = get_proc_task(filp->f_path.dentry->d_inode);
 	if (!reaper)
 		goto out_no_task;
 
@@ -2829,17 +2916,17 @@
  */
 static const struct pid_entry tid_base_stuff[] = {
 	DIR("fd",        S_IRUSR|S_IXUSR, proc_fd_inode_operations, proc_fd_operations),
-	DIR("fdinfo",    S_IRUSR|S_IXUSR, proc_fdinfo_inode_operations, proc_fd_operations),
+	DIR("fdinfo",    S_IRUSR|S_IXUSR, proc_fdinfo_inode_operations, proc_fdinfo_operations),
 	REG("environ",   S_IRUSR, proc_environ_operations),
 	INF("auxv",      S_IRUSR, proc_pid_auxv),
 	ONE("status",    S_IRUGO, proc_pid_status),
-	ONE("personality", S_IRUSR, proc_pid_personality),
+	ONE("personality", S_IRUGO, proc_pid_personality),
 	INF("limits",	 S_IRUSR, proc_pid_limits),
 #ifdef CONFIG_SCHED_DEBUG
 	REG("sched",     S_IRUGO|S_IWUSR, proc_pid_sched_operations),
 #endif
 #ifdef CONFIG_HAVE_ARCH_TRACEHOOK
-	INF("syscall",   S_IRUSR, proc_pid_syscall),
+	INF("syscall",   S_IRUGO, proc_pid_syscall),
 #endif
 	INF("cmdline",   S_IRUGO, proc_pid_cmdline),
 	ONE("stat",      S_IRUGO, proc_tid_stat),
@@ -2857,7 +2944,7 @@
 #ifdef CONFIG_PROC_PAGE_MONITOR
 	REG("clear_refs", S_IWUSR, proc_clear_refs_operations),
 	REG("smaps",     S_IRUGO, proc_smaps_operations),
-	REG("pagemap",    S_IRUSR, proc_pagemap_operations),
+	REG("pagemap",    S_IRUGO, proc_pagemap_operations),
 #endif
 #ifdef CONFIG_SECURITY
 	DIR("attr",      S_IRUGO|S_IXUGO, proc_attr_dir_inode_operations, proc_attr_dir_operations),
@@ -2866,7 +2953,7 @@
 	INF("wchan",     S_IRUGO, proc_pid_wchan),
 #endif
 #ifdef CONFIG_STACKTRACE
-	ONE("stack",      S_IRUSR, proc_pid_stack),
+	ONE("stack",      S_IRUGO, proc_pid_stack),
 #endif
 #ifdef CONFIG_SCHEDSTATS
 	INF("schedstat", S_IRUGO, proc_pid_schedstat),
@@ -2890,7 +2977,7 @@
 	REG("make-it-fail", S_IRUGO|S_IWUSR, proc_fault_inject_operations),
 #endif
 #ifdef CONFIG_TASK_IO_ACCOUNTING
-	INF("io",	S_IRUGO, proc_tid_io_accounting),
+	INF("io",	S_IRUSR, proc_tid_io_accounting),
 #endif
 };
 
--- linux-mvl-dove-2.6.32.orig/fs/proc/Makefile
+++ linux-mvl-dove-2.6.32/fs/proc/Makefile
@@ -26,3 +26,4 @@
 proc-$(CONFIG_PROC_DEVICETREE)	+= proc_devtree.o
 proc-$(CONFIG_PRINTK)	+= kmsg.o
 proc-$(CONFIG_PROC_PAGE_MONITOR)	+= page.o
+proc-y	+= version_signature.o
--- linux-mvl-dove-2.6.32.orig/fs/proc/task_nommu.c
+++ linux-mvl-dove-2.6.32/fs/proc/task_nommu.c
@@ -181,13 +181,13 @@
 	/* pin the task and mm whilst we play with them */
 	priv->task = get_pid_task(priv->pid, PIDTYPE_PID);
 	if (!priv->task)
-		return NULL;
+		return ERR_PTR(-ESRCH);
 
 	mm = mm_for_maps(priv->task);
-	if (!mm) {
+	if (!mm || IS_ERR(mm)) {
 		put_task_struct(priv->task);
 		priv->task = NULL;
-		return NULL;
+		return mm;
 	}
 	down_read(&mm->mmap_sem);
 
--- linux-mvl-dove-2.6.32.orig/fs/proc/kmsg.c
+++ linux-mvl-dove-2.6.32/fs/proc/kmsg.c
@@ -12,37 +12,37 @@
 #include <linux/poll.h>
 #include <linux/proc_fs.h>
 #include <linux/fs.h>
+#include <linux/syslog.h>
 
 #include <asm/uaccess.h>
 #include <asm/io.h>
 
 extern wait_queue_head_t log_wait;
 
-extern int do_syslog(int type, char __user *bug, int count);
-
 static int kmsg_open(struct inode * inode, struct file * file)
 {
-	return do_syslog(1,NULL,0);
+	return do_syslog(1, NULL, 0, SYSLOG_FROM_FILE);
 }
 
 static int kmsg_release(struct inode * inode, struct file * file)
 {
-	(void) do_syslog(0,NULL,0);
+	(void) do_syslog(0, NULL, 0, SYSLOG_FROM_FILE);
 	return 0;
 }
 
 static ssize_t kmsg_read(struct file *file, char __user *buf,
 			 size_t count, loff_t *ppos)
 {
-	if ((file->f_flags & O_NONBLOCK) && !do_syslog(9, NULL, 0))
+	if ((file->f_flags & O_NONBLOCK) &&
+	    !do_syslog(9, NULL, 0, SYSLOG_FROM_FILE))
 		return -EAGAIN;
-	return do_syslog(2, buf, count);
+	return do_syslog(2, buf, count, SYSLOG_FROM_FILE);
 }
 
 static unsigned int kmsg_poll(struct file *file, poll_table *wait)
 {
 	poll_wait(file, &log_wait, wait);
-	if (do_syslog(9, NULL, 0))
+	if (do_syslog(9, NULL, 0, SYSLOG_FROM_FILE))
 		return POLLIN | POLLRDNORM;
 	return 0;
 }
--- linux-mvl-dove-2.6.32.orig/fs/proc/array.c
+++ linux-mvl-dove-2.6.32/fs/proc/array.c
@@ -82,7 +82,6 @@
 #include <linux/pid_namespace.h>
 #include <linux/ptrace.h>
 #include <linux/tracehook.h>
-#include <linux/swapops.h>
 
 #include <asm/pgtable.h>
 #include <asm/processor.h>
@@ -173,7 +172,7 @@
 		if (tracer)
 			tpid = task_pid_nr_ns(tracer, ns);
 	}
-	cred = get_cred((struct cred *) __task_cred(p));
+	cred = get_task_cred(p);
 	seq_printf(m,
 		"State:\t%s\n"
 		"Tgid:\t%d\n"
@@ -322,94 +321,6 @@
 			p->nivcsw);
 }
 
-#ifdef CONFIG_MMU
-
-struct stack_stats {
-	struct vm_area_struct *vma;
-	unsigned long	startpage;
-	unsigned long	usage;
-};
-
-static int stack_usage_pte_range(pmd_t *pmd, unsigned long addr,
-				unsigned long end, struct mm_walk *walk)
-{
-	struct stack_stats *ss = walk->private;
-	struct vm_area_struct *vma = ss->vma;
-	pte_t *pte, ptent;
-	spinlock_t *ptl;
-	int ret = 0;
-
-	pte = pte_offset_map_lock(vma->vm_mm, pmd, addr, &ptl);
-	for (; addr != end; pte++, addr += PAGE_SIZE) {
-		ptent = *pte;
-
-#ifdef CONFIG_STACK_GROWSUP
-		if (pte_present(ptent) || is_swap_pte(ptent))
-			ss->usage = addr - ss->startpage + PAGE_SIZE;
-#else
-		if (pte_present(ptent) || is_swap_pte(ptent)) {
-			ss->usage = ss->startpage - addr + PAGE_SIZE;
-			pte++;
-			ret = 1;
-			break;
-		}
-#endif
-	}
-	pte_unmap_unlock(pte - 1, ptl);
-	cond_resched();
-	return ret;
-}
-
-static inline unsigned long get_stack_usage_in_bytes(struct vm_area_struct *vma,
-				struct task_struct *task)
-{
-	struct stack_stats ss;
-	struct mm_walk stack_walk = {
-		.pmd_entry = stack_usage_pte_range,
-		.mm = vma->vm_mm,
-		.private = &ss,
-	};
-
-	if (!vma->vm_mm || is_vm_hugetlb_page(vma))
-		return 0;
-
-	ss.vma = vma;
-	ss.startpage = task->stack_start & PAGE_MASK;
-	ss.usage = 0;
-
-#ifdef CONFIG_STACK_GROWSUP
-	walk_page_range(KSTK_ESP(task) & PAGE_MASK, vma->vm_end,
-		&stack_walk);
-#else
-	walk_page_range(vma->vm_start, (KSTK_ESP(task) & PAGE_MASK) + PAGE_SIZE,
-		&stack_walk);
-#endif
-	return ss.usage;
-}
-
-static inline void task_show_stack_usage(struct seq_file *m,
-						struct task_struct *task)
-{
-	struct vm_area_struct	*vma;
-	struct mm_struct	*mm = get_task_mm(task);
-
-	if (mm) {
-		down_read(&mm->mmap_sem);
-		vma = find_vma(mm, task->stack_start);
-		if (vma)
-			seq_printf(m, "Stack usage:\t%lu kB\n",
-				get_stack_usage_in_bytes(vma, task) >> 10);
-
-		up_read(&mm->mmap_sem);
-		mmput(mm);
-	}
-}
-#else
-static void task_show_stack_usage(struct seq_file *m, struct task_struct *task)
-{
-}
-#endif		/* CONFIG_MMU */
-
 int proc_pid_status(struct seq_file *m, struct pid_namespace *ns,
 			struct pid *pid, struct task_struct *task)
 {
@@ -425,11 +336,7 @@
 	task_sig(m, task);
 	task_cap(m, task);
 	cpuset_task_status_allowed(m, task);
-#if defined(CONFIG_S390)
-	task_show_regs(m, task);
-#endif
 	task_context_switch_counts(m, task);
-	task_show_stack_usage(m, task);
 	return 0;
 }
 
@@ -495,7 +402,6 @@
 
 		/* add up live thread stats at the group level */
 		if (whole) {
-			struct task_cputime cputime;
 			struct task_struct *t = task;
 			do {
 				min_flt += t->min_flt;
@@ -506,9 +412,7 @@
 
 			min_flt += sig->min_flt;
 			maj_flt += sig->maj_flt;
-			thread_group_cputime(task, &cputime);
-			utime = cputime.utime;
-			stime = cputime.stime;
+			thread_group_times(task, &utime, &stime);
 			gtime = cputime_add(gtime, sig->gtime);
 		}
 
@@ -569,9 +473,9 @@
 		vsize,
 		mm ? get_mm_rss(mm) : 0,
 		rsslim,
-		mm ? mm->start_code : 0,
-		mm ? mm->end_code : 0,
-		(permitted && mm) ? task->stack_start : 0,
+		mm ? (permitted ? mm->start_code : 1) : 0,
+		mm ? (permitted ? mm->end_code : 1) : 0,
+		(permitted && mm) ? mm->start_stack : 0,
 		esp,
 		eip,
 		/* The signal information here is obsolete.
--- linux-mvl-dove-2.6.32.orig/fs/proc/version_signature.c
+++ linux-mvl-dove-2.6.32/fs/proc/version_signature.c
@@ -0,0 +1,31 @@
+#include <linux/fs.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/proc_fs.h>
+#include <linux/seq_file.h>
+#include <linux/utsname.h>
+
+static int version_signature_proc_show(struct seq_file *m, void *v)
+{
+	seq_printf(m, "%s\n", CONFIG_VERSION_SIGNATURE);
+	return 0;
+}
+
+static int version_signature_proc_open(struct inode *inode, struct file *file)
+{
+	return single_open(file, version_signature_proc_show, NULL);
+}
+
+static const struct file_operations version_signature_proc_fops = {
+	.open		= version_signature_proc_open,
+	.read		= seq_read,
+	.llseek		= seq_lseek,
+	.release	= single_release,
+};
+
+static int __init proc_version_signature_init(void)
+{
+	proc_create("version_signature", 0, NULL, &version_signature_proc_fops);
+	return 0;
+}
+module_init(proc_version_signature_init);
--- linux-mvl-dove-2.6.32.orig/fs/udf/super.c
+++ linux-mvl-dove-2.6.32/fs/udf/super.c
@@ -1078,21 +1078,39 @@
 	return 0;
 }
 
-static int udf_load_vat(struct super_block *sb, int p_index, int type1_index)
+static void udf_find_vat_block(struct super_block *sb, int p_index,
+			       int type1_index, sector_t start_block)
 {
 	struct udf_sb_info *sbi = UDF_SB(sb);
 	struct udf_part_map *map = &sbi->s_partmaps[p_index];
+	sector_t vat_block;
 	struct kernel_lb_addr ino;
+
+	/*
+	 * VAT file entry is in the last recorded block. Some broken disks have
+	 * it a few blocks before so try a bit harder...
+	 */
+	ino.partitionReferenceNum = type1_index;
+	for (vat_block = start_block;
+	     vat_block >= map->s_partition_root &&
+	     vat_block >= start_block - 3 &&
+	     !sbi->s_vat_inode; vat_block--) {
+		ino.logicalBlockNum = vat_block - map->s_partition_root;
+		sbi->s_vat_inode = udf_iget(sb, &ino);
+	}
+}
+
+static int udf_load_vat(struct super_block *sb, int p_index, int type1_index)
+{
+	struct udf_sb_info *sbi = UDF_SB(sb);
+	struct udf_part_map *map = &sbi->s_partmaps[p_index];
 	struct buffer_head *bh = NULL;
 	struct udf_inode_info *vati;
 	uint32_t pos;
 	struct virtualAllocationTable20 *vat20;
 	sector_t blocks = sb->s_bdev->bd_inode->i_size >> sb->s_blocksize_bits;
 
-	/* VAT file entry is in the last recorded block */
-	ino.partitionReferenceNum = type1_index;
-	ino.logicalBlockNum = sbi->s_last_block - map->s_partition_root;
-	sbi->s_vat_inode = udf_iget(sb, &ino);
+	udf_find_vat_block(sb, p_index, type1_index, sbi->s_last_block);
 	if (!sbi->s_vat_inode &&
 	    sbi->s_last_block != blocks - 1) {
 		printk(KERN_NOTICE "UDF-fs: Failed to read VAT inode from the"
@@ -1100,9 +1118,7 @@
 		       "block of the device (%lu).\n",
 		       (unsigned long)sbi->s_last_block,
 		       (unsigned long)blocks - 1);
-		ino.partitionReferenceNum = type1_index;
-		ino.logicalBlockNum = blocks - 1 - map->s_partition_root;
-		sbi->s_vat_inode = udf_iget(sb, &ino);
+		udf_find_vat_block(sb, p_index, type1_index, blocks - 1);
 	}
 	if (!sbi->s_vat_inode)
 		return 1;
--- linux-mvl-dove-2.6.32.orig/fs/ecryptfs/messaging.c
+++ linux-mvl-dove-2.6.32/fs/ecryptfs/messaging.c
@@ -30,9 +30,9 @@
 
 static struct hlist_head *ecryptfs_daemon_hash;
 struct mutex ecryptfs_daemon_hash_mux;
-static int ecryptfs_hash_buckets;
+static int ecryptfs_hash_bits;
 #define ecryptfs_uid_hash(uid) \
-        hash_long((unsigned long)uid, ecryptfs_hash_buckets)
+        hash_long((unsigned long)uid, ecryptfs_hash_bits)
 
 static u32 ecryptfs_msg_counter;
 static struct ecryptfs_msg_ctx *ecryptfs_msg_ctx_arr;
@@ -485,18 +485,19 @@
 	}
 	mutex_init(&ecryptfs_daemon_hash_mux);
 	mutex_lock(&ecryptfs_daemon_hash_mux);
-	ecryptfs_hash_buckets = 1;
-	while (ecryptfs_number_of_users >> ecryptfs_hash_buckets)
-		ecryptfs_hash_buckets++;
+	ecryptfs_hash_bits = 1;
+	while (ecryptfs_number_of_users >> ecryptfs_hash_bits)
+		ecryptfs_hash_bits++;
 	ecryptfs_daemon_hash = kmalloc((sizeof(struct hlist_head)
-					* ecryptfs_hash_buckets), GFP_KERNEL);
+					* (1 << ecryptfs_hash_bits)),
+				       GFP_KERNEL);
 	if (!ecryptfs_daemon_hash) {
 		rc = -ENOMEM;
 		printk(KERN_ERR "%s: Failed to allocate memory\n", __func__);
 		mutex_unlock(&ecryptfs_daemon_hash_mux);
 		goto out;
 	}
-	for (i = 0; i < ecryptfs_hash_buckets; i++)
+	for (i = 0; i < (1 << ecryptfs_hash_bits); i++)
 		INIT_HLIST_HEAD(&ecryptfs_daemon_hash[i]);
 	mutex_unlock(&ecryptfs_daemon_hash_mux);
 	ecryptfs_msg_ctx_arr = kmalloc((sizeof(struct ecryptfs_msg_ctx)
@@ -553,7 +554,7 @@
 		int i;
 
 		mutex_lock(&ecryptfs_daemon_hash_mux);
-		for (i = 0; i < ecryptfs_hash_buckets; i++) {
+		for (i = 0; i < (1 << ecryptfs_hash_bits); i++) {
 			int rc;
 
 			hlist_for_each_entry(daemon, elem,
--- linux-mvl-dove-2.6.32.orig/fs/ecryptfs/inode.c
+++ linux-mvl-dove-2.6.32/fs/ecryptfs/inode.c
@@ -69,15 +69,19 @@
 	struct vfsmount *lower_mnt = ecryptfs_dentry_to_lower_mnt(dentry);
 	struct dentry *dentry_save;
 	struct vfsmount *vfsmount_save;
+	unsigned int flags_save;
 	int rc;
 
 	dentry_save = nd->path.dentry;
 	vfsmount_save = nd->path.mnt;
+	flags_save = nd->flags;
 	nd->path.dentry = lower_dentry;
 	nd->path.mnt = lower_mnt;
+	nd->flags &= ~LOOKUP_OPEN;
 	rc = vfs_create(lower_dir_inode, lower_dentry, mode, nd);
 	nd->path.dentry = dentry_save;
 	nd->path.mnt = vfsmount_save;
+	nd->flags = flags_save;
 	return rc;
 }
 
@@ -252,10 +256,8 @@
 	struct dentry *lower_dir_dentry;
 	struct vfsmount *lower_mnt;
 	struct inode *lower_inode;
-	struct ecryptfs_mount_crypt_stat *mount_crypt_stat;
 	struct ecryptfs_crypt_stat *crypt_stat;
 	char *page_virt = NULL;
-	u64 file_size;
 	int rc = 0;
 
 	lower_dir_dentry = lower_dentry->d_parent;
@@ -272,7 +274,7 @@
 		printk(KERN_ERR "%s: Out of memory whilst attempting "
 		       "to allocate ecryptfs_dentry_info struct\n",
 			__func__);
-		goto out_dput;
+		goto out_put;
 	}
 	ecryptfs_set_dentry_lower(ecryptfs_dentry, lower_dentry);
 	ecryptfs_set_dentry_lower_mnt(ecryptfs_dentry, lower_mnt);
@@ -330,23 +332,13 @@
 		}
 		crypt_stat->flags |= ECRYPTFS_METADATA_IN_XATTR;
 	}
-	mount_crypt_stat = &ecryptfs_superblock_to_private(
-		ecryptfs_dentry->d_sb)->mount_crypt_stat;
-	if (mount_crypt_stat->flags & ECRYPTFS_ENCRYPTED_VIEW_ENABLED) {
-		if (crypt_stat->flags & ECRYPTFS_METADATA_IN_XATTR)
-			file_size = (crypt_stat->num_header_bytes_at_front
-				     + i_size_read(lower_dentry->d_inode));
-		else
-			file_size = i_size_read(lower_dentry->d_inode);
-	} else {
-		file_size = get_unaligned_be64(page_virt);
-	}
-	i_size_write(ecryptfs_dentry->d_inode, (loff_t)file_size);
+	ecryptfs_i_size_init(page_virt, ecryptfs_dentry->d_inode);
 out_free_kmem:
 	kmem_cache_free(ecryptfs_header_cache_2, page_virt);
 	goto out;
-out_dput:
+out_put:
 	dput(lower_dentry);
+	mntput(lower_mnt);
 	d_drop(ecryptfs_dentry);
 out:
 	return rc;
@@ -638,38 +630,17 @@
 	return rc;
 }
 
-static int
-ecryptfs_readlink(struct dentry *dentry, char __user *buf, int bufsiz)
+static int ecryptfs_readlink_lower(struct dentry *dentry, char **buf,
+				   size_t *bufsiz)
 {
+	struct dentry *lower_dentry = ecryptfs_dentry_to_lower(dentry);
 	char *lower_buf;
-	size_t lower_bufsiz;
-	struct dentry *lower_dentry;
-	struct ecryptfs_mount_crypt_stat *mount_crypt_stat;
-	char *plaintext_name;
-	size_t plaintext_name_size;
+	size_t lower_bufsiz = PATH_MAX;
 	mm_segment_t old_fs;
 	int rc;
 
-	lower_dentry = ecryptfs_dentry_to_lower(dentry);
-	if (!lower_dentry->d_inode->i_op->readlink) {
-		rc = -EINVAL;
-		goto out;
-	}
-	mount_crypt_stat = &ecryptfs_superblock_to_private(
-						dentry->d_sb)->mount_crypt_stat;
-	/*
-	 * If the lower filename is encrypted, it will result in a significantly
-	 * longer name.  If needed, truncate the name after decode and decrypt.
-	 */
-	if (mount_crypt_stat->flags & ECRYPTFS_GLOBAL_ENCRYPT_FILENAMES)
-		lower_bufsiz = PATH_MAX;
-	else
-		lower_bufsiz = bufsiz;
-	/* Released in this function */
 	lower_buf = kmalloc(lower_bufsiz, GFP_KERNEL);
-	if (lower_buf == NULL) {
-		printk(KERN_ERR "%s: Out of memory whilst attempting to "
-		       "kmalloc [%zd] bytes\n", __func__, lower_bufsiz);
+	if (!lower_buf) {
 		rc = -ENOMEM;
 		goto out;
 	}
@@ -679,29 +650,31 @@
 						   (char __user *)lower_buf,
 						   lower_bufsiz);
 	set_fs(old_fs);
-	if (rc >= 0) {
-		rc = ecryptfs_decode_and_decrypt_filename(&plaintext_name,
-							  &plaintext_name_size,
-							  dentry, lower_buf,
-							  rc);
-		if (rc) {
-			printk(KERN_ERR "%s: Error attempting to decode and "
-			       "decrypt filename; rc = [%d]\n", __func__,
-				rc);
-			goto out_free_lower_buf;
-		}
-		/* Check for bufsiz <= 0 done in sys_readlinkat() */
-		rc = copy_to_user(buf, plaintext_name,
-				  min((size_t) bufsiz, plaintext_name_size));
-		if (rc)
-			rc = -EFAULT;
-		else
-			rc = plaintext_name_size;
-		kfree(plaintext_name);
-		fsstack_copy_attr_atime(dentry->d_inode, lower_dentry->d_inode);
-	}
-out_free_lower_buf:
+	if (rc < 0)
+		goto out;
+	lower_bufsiz = rc;
+	rc = ecryptfs_decode_and_decrypt_filename(buf, bufsiz, dentry,
+						  lower_buf, lower_bufsiz);
+out:
 	kfree(lower_buf);
+	return rc;
+}
+
+static int
+ecryptfs_readlink(struct dentry *dentry, char __user *buf, int bufsiz)
+{
+	char *kbuf;
+	size_t kbufsiz, copied;
+	int rc;
+
+	rc = ecryptfs_readlink_lower(dentry, &kbuf, &kbufsiz);
+	if (rc)
+		goto out;
+	copied = min_t(size_t, bufsiz, kbufsiz);
+	rc = copy_to_user(buf, kbuf, copied) ? -EFAULT : copied;
+	kfree(kbuf);
+	fsstack_copy_attr_atime(dentry->d_inode,
+				ecryptfs_dentry_to_lower(dentry)->d_inode);
 out:
 	return rc;
 }
@@ -939,7 +912,8 @@
 				goto out;
 			}
 			rc = 0;
-			crypt_stat->flags &= ~(ECRYPTFS_ENCRYPTED);
+			crypt_stat->flags &= ~(ECRYPTFS_I_SIZE_INITIALIZED
+						| ECRYPTFS_ENCRYPTED);
 		}
 	}
 	mutex_unlock(&crypt_stat->cs_mutex);
@@ -971,6 +945,45 @@
 	return rc;
 }
 
+int ecryptfs_getattr_link(struct vfsmount *mnt, struct dentry *dentry,
+			  struct kstat *stat)
+{
+	struct ecryptfs_mount_crypt_stat *mount_crypt_stat;
+	int rc = 0;
+
+	mount_crypt_stat = &ecryptfs_superblock_to_private(
+						dentry->d_sb)->mount_crypt_stat;
+	generic_fillattr(dentry->d_inode, stat);
+	if (mount_crypt_stat->flags & ECRYPTFS_GLOBAL_ENCRYPT_FILENAMES) {
+		char *target;
+		size_t targetsiz;
+
+		rc = ecryptfs_readlink_lower(dentry, &target, &targetsiz);
+		if (!rc) {
+			kfree(target);
+			stat->size = targetsiz;
+		}
+	}
+	return rc;
+}
+
+int ecryptfs_getattr(struct vfsmount *mnt, struct dentry *dentry,
+		     struct kstat *stat)
+{
+	struct kstat lower_stat;
+	int rc;
+
+	rc = vfs_getattr(ecryptfs_dentry_to_lower_mnt(dentry),
+			 ecryptfs_dentry_to_lower(dentry), &lower_stat);
+	if (!rc) {
+		fsstack_copy_attr_all(dentry->d_inode,
+				      ecryptfs_inode_to_lower(dentry->d_inode), NULL);
+		generic_fillattr(dentry->d_inode, stat);
+		stat->blocks = lower_stat.blocks;
+	}
+	return rc;
+}
+
 int
 ecryptfs_setxattr(struct dentry *dentry, const char *name, const void *value,
 		  size_t size, int flags)
@@ -980,7 +993,7 @@
 
 	lower_dentry = ecryptfs_dentry_to_lower(dentry);
 	if (!lower_dentry->d_inode->i_op->setxattr) {
-		rc = -ENOSYS;
+		rc = -EOPNOTSUPP;
 		goto out;
 	}
 	mutex_lock(&lower_dentry->d_inode->i_mutex);
@@ -998,7 +1011,7 @@
 	int rc = 0;
 
 	if (!lower_dentry->d_inode->i_op->getxattr) {
-		rc = -ENOSYS;
+		rc = -EOPNOTSUPP;
 		goto out;
 	}
 	mutex_lock(&lower_dentry->d_inode->i_mutex);
@@ -1025,7 +1038,7 @@
 
 	lower_dentry = ecryptfs_dentry_to_lower(dentry);
 	if (!lower_dentry->d_inode->i_op->listxattr) {
-		rc = -ENOSYS;
+		rc = -EOPNOTSUPP;
 		goto out;
 	}
 	mutex_lock(&lower_dentry->d_inode->i_mutex);
@@ -1042,7 +1055,7 @@
 
 	lower_dentry = ecryptfs_dentry_to_lower(dentry);
 	if (!lower_dentry->d_inode->i_op->removexattr) {
-		rc = -ENOSYS;
+		rc = -EOPNOTSUPP;
 		goto out;
 	}
 	mutex_lock(&lower_dentry->d_inode->i_mutex);
@@ -1073,6 +1086,7 @@
 	.put_link = ecryptfs_put_link,
 	.permission = ecryptfs_permission,
 	.setattr = ecryptfs_setattr,
+	.getattr = ecryptfs_getattr_link,
 	.setxattr = ecryptfs_setxattr,
 	.getxattr = ecryptfs_getxattr,
 	.listxattr = ecryptfs_listxattr,
@@ -1100,6 +1114,7 @@
 const struct inode_operations ecryptfs_main_iops = {
 	.permission = ecryptfs_permission,
 	.setattr = ecryptfs_setattr,
+	.getattr = ecryptfs_getattr,
 	.setxattr = ecryptfs_setxattr,
 	.getxattr = ecryptfs_getxattr,
 	.listxattr = ecryptfs_listxattr,
--- linux-mvl-dove-2.6.32.orig/fs/ecryptfs/ecryptfs_kernel.h
+++ linux-mvl-dove-2.6.32/fs/ecryptfs/ecryptfs_kernel.h
@@ -270,6 +270,7 @@
 #define ECRYPTFS_ENCFN_USE_MOUNT_FNEK 0x00001000
 #define ECRYPTFS_ENCFN_USE_FEK        0x00002000
 #define ECRYPTFS_UNLINK_SIGS	      0x00004000
+#define ECRYPTFS_I_SIZE_INITIALIZED   0x00008000
 	u32 flags;
 	unsigned int file_version;
 	size_t iv_bytes;
@@ -619,6 +620,7 @@
 int ecryptfs_interpose(struct dentry *hidden_dentry,
 		       struct dentry *this_dentry, struct super_block *sb,
 		       u32 flags);
+void ecryptfs_i_size_init(const char *page_virt, struct inode *inode);
 int ecryptfs_lookup_and_interpose_lower(struct dentry *ecryptfs_dentry,
 					struct dentry *lower_dentry,
 					struct inode *ecryptfs_dir_inode,
--- linux-mvl-dove-2.6.32.orig/fs/ecryptfs/keystore.c
+++ linux-mvl-dove-2.6.32/fs/ecryptfs/keystore.c
@@ -481,8 +481,8 @@
 	struct mutex *tfm_mutex;
 	char *block_aligned_filename;
 	struct ecryptfs_auth_tok *auth_tok;
-	struct scatterlist src_sg;
-	struct scatterlist dst_sg;
+	struct scatterlist src_sg[2];
+	struct scatterlist dst_sg[2];
 	struct blkcipher_desc desc;
 	char iv[ECRYPTFS_MAX_IV_BYTES];
 	char hash[ECRYPTFS_TAG_70_DIGEST_SIZE];
@@ -695,23 +695,21 @@
 	memcpy(&s->block_aligned_filename[s->num_rand_bytes], filename,
 	       filename_size);
 	rc = virt_to_scatterlist(s->block_aligned_filename,
-				 s->block_aligned_filename_size, &s->src_sg, 1);
-	if (rc != 1) {
+				 s->block_aligned_filename_size, s->src_sg, 2);
+	if (rc < 1) {
 		printk(KERN_ERR "%s: Internal error whilst attempting to "
-		       "convert filename memory to scatterlist; "
-		       "expected rc = 1; got rc = [%d]. "
+		       "convert filename memory to scatterlist; rc = [%d]. "
 		       "block_aligned_filename_size = [%zd]\n", __func__, rc,
 		       s->block_aligned_filename_size);
 		goto out_release_free_unlock;
 	}
 	rc = virt_to_scatterlist(&dest[s->i], s->block_aligned_filename_size,
-				 &s->dst_sg, 1);
-	if (rc != 1) {
+				 s->dst_sg, 2);
+	if (rc < 1) {
 		printk(KERN_ERR "%s: Internal error whilst attempting to "
 		       "convert encrypted filename memory to scatterlist; "
-		       "expected rc = 1; got rc = [%d]. "
-		       "block_aligned_filename_size = [%zd]\n", __func__, rc,
-		       s->block_aligned_filename_size);
+		       "rc = [%d]. block_aligned_filename_size = [%zd]\n",
+		       __func__, rc, s->block_aligned_filename_size);
 		goto out_release_free_unlock;
 	}
 	/* The characters in the first block effectively do the job
@@ -734,7 +732,7 @@
 		       mount_crypt_stat->global_default_fn_cipher_key_bytes);
 		goto out_release_free_unlock;
 	}
-	rc = crypto_blkcipher_encrypt_iv(&s->desc, &s->dst_sg, &s->src_sg,
+	rc = crypto_blkcipher_encrypt_iv(&s->desc, s->dst_sg, s->src_sg,
 					 s->block_aligned_filename_size);
 	if (rc) {
 		printk(KERN_ERR "%s: Error attempting to encrypt filename; "
@@ -766,8 +764,8 @@
 	struct mutex *tfm_mutex;
 	char *decrypted_filename;
 	struct ecryptfs_auth_tok *auth_tok;
-	struct scatterlist src_sg;
-	struct scatterlist dst_sg;
+	struct scatterlist src_sg[2];
+	struct scatterlist dst_sg[2];
 	struct blkcipher_desc desc;
 	char fnek_sig_hex[ECRYPTFS_SIG_SIZE_HEX + 1];
 	char iv[ECRYPTFS_MAX_IV_BYTES];
@@ -872,13 +870,12 @@
 	}
 	mutex_lock(s->tfm_mutex);
 	rc = virt_to_scatterlist(&data[(*packet_size)],
-				 s->block_aligned_filename_size, &s->src_sg, 1);
-	if (rc != 1) {
+				 s->block_aligned_filename_size, s->src_sg, 2);
+	if (rc < 1) {
 		printk(KERN_ERR "%s: Internal error whilst attempting to "
 		       "convert encrypted filename memory to scatterlist; "
-		       "expected rc = 1; got rc = [%d]. "
-		       "block_aligned_filename_size = [%zd]\n", __func__, rc,
-		       s->block_aligned_filename_size);
+		       "rc = [%d]. block_aligned_filename_size = [%zd]\n",
+		       __func__, rc, s->block_aligned_filename_size);
 		goto out_unlock;
 	}
 	(*packet_size) += s->block_aligned_filename_size;
@@ -892,13 +889,12 @@
 		goto out_unlock;
 	}
 	rc = virt_to_scatterlist(s->decrypted_filename,
-				 s->block_aligned_filename_size, &s->dst_sg, 1);
-	if (rc != 1) {
+				 s->block_aligned_filename_size, s->dst_sg, 2);
+	if (rc < 1) {
 		printk(KERN_ERR "%s: Internal error whilst attempting to "
 		       "convert decrypted filename memory to scatterlist; "
-		       "expected rc = 1; got rc = [%d]. "
-		       "block_aligned_filename_size = [%zd]\n", __func__, rc,
-		       s->block_aligned_filename_size);
+		       "rc = [%d]. block_aligned_filename_size = [%zd]\n",
+		       __func__, rc, s->block_aligned_filename_size);
 		goto out_free_unlock;
 	}
 	/* The characters in the first block effectively do the job of
@@ -937,7 +933,7 @@
 		       mount_crypt_stat->global_default_fn_cipher_key_bytes);
 		goto out_free_unlock;
 	}
-	rc = crypto_blkcipher_decrypt_iv(&s->desc, &s->dst_sg, &s->src_sg,
+	rc = crypto_blkcipher_decrypt_iv(&s->desc, s->dst_sg, s->src_sg,
 					 s->block_aligned_filename_size);
 	if (rc) {
 		printk(KERN_ERR "%s: Error attempting to decrypt filename; "
@@ -1542,6 +1538,7 @@
 		printk(KERN_ERR "Could not find key with description: [%s]\n",
 		       sig);
 		rc = process_request_key_err(PTR_ERR(*auth_tok_key));
+		(*auth_tok_key) = NULL;
 		goto out;
 	}
 	(*auth_tok) = ecryptfs_get_key_payload_data(*auth_tok_key);
--- linux-mvl-dove-2.6.32.orig/fs/ecryptfs/file.c
+++ linux-mvl-dove-2.6.32/fs/ecryptfs/file.c
@@ -191,13 +191,6 @@
 				      | ECRYPTFS_ENCRYPTED);
 	}
 	mutex_unlock(&crypt_stat->cs_mutex);
-	if ((ecryptfs_inode_to_private(inode)->lower_file->f_flags & O_RDONLY)
-	    && !(file->f_flags & O_RDONLY)) {
-		rc = -EPERM;
-		printk(KERN_WARNING "%s: Lower persistent file is RO; eCryptfs "
-		       "file must hence be opened RO\n", __func__);
-		goto out;
-	}
 	if (!ecryptfs_inode_to_private(inode)->lower_file) {
 		rc = ecryptfs_init_persistent_file(ecryptfs_dentry);
 		if (rc) {
@@ -205,9 +198,16 @@
 			       "the persistent file for the dentry with name "
 			       "[%s]; rc = [%d]\n", __func__,
 			       ecryptfs_dentry->d_name.name, rc);
-			goto out;
+			goto out_free;
 		}
 	}
+	if ((ecryptfs_inode_to_private(inode)->lower_file->f_flags & O_RDONLY)
+	    && !(file->f_flags & O_RDONLY)) {
+		rc = -EPERM;
+		printk(KERN_WARNING "%s: Lower persistent file is RO; eCryptfs "
+		       "file must hence be opened RO\n", __func__);
+		goto out_free;
+	}
 	ecryptfs_set_file_lower(
 		file, ecryptfs_inode_to_private(inode)->lower_file);
 	if (S_ISDIR(ecryptfs_dentry->d_inode->i_mode)) {
@@ -237,7 +237,8 @@
 				goto out_free;
 			}
 			rc = 0;
-			crypt_stat->flags &= ~(ECRYPTFS_ENCRYPTED);
+			crypt_stat->flags &= ~(ECRYPTFS_I_SIZE_INITIALIZED
+						| ECRYPTFS_ENCRYPTED);
 			mutex_unlock(&crypt_stat->cs_mutex);
 			goto out;
 		}
@@ -293,12 +294,40 @@
 	return rc;
 }
 
-static int ecryptfs_ioctl(struct inode *inode, struct file *file,
-			  unsigned int cmd, unsigned long arg);
+static long
+ecryptfs_unlocked_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+	struct file *lower_file = NULL;
+	long rc = -ENOTTY;
+
+	if (ecryptfs_file_to_private(file))
+		lower_file = ecryptfs_file_to_lower(file);
+	if (lower_file && lower_file->f_op && lower_file->f_op->unlocked_ioctl)
+		rc = lower_file->f_op->unlocked_ioctl(lower_file, cmd, arg);
+	return rc;
+}
+
+#ifdef CONFIG_COMPAT
+static long
+ecryptfs_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+	struct file *lower_file = NULL;
+	long rc = -ENOIOCTLCMD;
+
+	if (ecryptfs_file_to_private(file))
+		lower_file = ecryptfs_file_to_lower(file);
+	if (lower_file && lower_file->f_op && lower_file->f_op->compat_ioctl)
+		rc = lower_file->f_op->compat_ioctl(lower_file, cmd, arg);
+	return rc;
+}
+#endif
 
 const struct file_operations ecryptfs_dir_fops = {
 	.readdir = ecryptfs_readdir,
-	.ioctl = ecryptfs_ioctl,
+	.unlocked_ioctl = ecryptfs_unlocked_ioctl,
+#ifdef CONFIG_COMPAT
+	.compat_ioctl = ecryptfs_compat_ioctl,
+#endif
 	.mmap = generic_file_mmap,
 	.open = ecryptfs_open,
 	.flush = ecryptfs_flush,
@@ -315,7 +344,10 @@
 	.write = do_sync_write,
 	.aio_write = generic_file_aio_write,
 	.readdir = ecryptfs_readdir,
-	.ioctl = ecryptfs_ioctl,
+	.unlocked_ioctl = ecryptfs_unlocked_ioctl,
+#ifdef CONFIG_COMPAT
+	.compat_ioctl = ecryptfs_compat_ioctl,
+#endif
 	.mmap = generic_file_mmap,
 	.open = ecryptfs_open,
 	.flush = ecryptfs_flush,
@@ -324,20 +356,3 @@
 	.fasync = ecryptfs_fasync,
 	.splice_read = generic_file_splice_read,
 };
-
-static int
-ecryptfs_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
-	       unsigned long arg)
-{
-	int rc = 0;
-	struct file *lower_file = NULL;
-
-	if (ecryptfs_file_to_private(file))
-		lower_file = ecryptfs_file_to_lower(file);
-	if (lower_file && lower_file->f_op && lower_file->f_op->ioctl)
-		rc = lower_file->f_op->ioctl(ecryptfs_inode_to_lower(inode),
-					     lower_file, cmd, arg);
-	else
-		rc = -ENOTTY;
-	return rc;
-}
--- linux-mvl-dove-2.6.32.orig/fs/ecryptfs/super.c
+++ linux-mvl-dove-2.6.32/fs/ecryptfs/super.c
@@ -85,7 +85,6 @@
 		if (lower_dentry->d_inode) {
 			fput(inode_info->lower_file);
 			inode_info->lower_file = NULL;
-			d_drop(lower_dentry);
 		}
 	}
 	ecryptfs_destroy_crypt_stat(&inode_info->crypt_stat);
--- linux-mvl-dove-2.6.32.orig/fs/ecryptfs/mmap.c
+++ linux-mvl-dove-2.6.32/fs/ecryptfs/mmap.c
@@ -372,6 +372,11 @@
 	    && (pos != 0))
 		zero_user(page, 0, PAGE_CACHE_SIZE);
 out:
+	if (unlikely(rc)) {
+		unlock_page(page);
+		page_cache_release(page);
+		*pagep = NULL;
+	}
 	return rc;
 }
 
--- linux-mvl-dove-2.6.32.orig/fs/ecryptfs/crypto.c
+++ linux-mvl-dove-2.6.32/fs/ecryptfs/crypto.c
@@ -1455,6 +1455,25 @@
 		ECRYPTFS_MINIMUM_HEADER_EXTENT_SIZE;
 }
 
+void ecryptfs_i_size_init(const char *page_virt, struct inode *inode)
+{
+	struct ecryptfs_mount_crypt_stat *mount_crypt_stat;
+	struct ecryptfs_crypt_stat *crypt_stat;
+	u64 file_size;
+
+	crypt_stat = &ecryptfs_inode_to_private(inode)->crypt_stat;
+	mount_crypt_stat =
+		&ecryptfs_superblock_to_private(inode->i_sb)->mount_crypt_stat;
+	if (mount_crypt_stat->flags & ECRYPTFS_ENCRYPTED_VIEW_ENABLED) {
+		file_size = i_size_read(ecryptfs_inode_to_lower(inode));
+		if (crypt_stat->flags & ECRYPTFS_METADATA_IN_XATTR)
+			file_size += crypt_stat->num_header_bytes_at_front;
+	} else
+		file_size = get_unaligned_be64(page_virt);
+	i_size_write(inode, (loff_t)file_size);
+	crypt_stat->flags |= ECRYPTFS_I_SIZE_INITIALIZED;
+}
+
 /**
  * ecryptfs_read_headers_virt
  * @page_virt: The virtual address into which to read the headers
@@ -1485,6 +1504,8 @@
 		rc = -EINVAL;
 		goto out;
 	}
+	if (!(crypt_stat->flags & ECRYPTFS_I_SIZE_INITIALIZED))
+		ecryptfs_i_size_init(page_virt, ecryptfs_dentry->d_inode);
 	offset += MAGIC_ECRYPTFS_MARKER_SIZE_BYTES;
 	rc = ecryptfs_process_flags(crypt_stat, (page_virt + offset),
 				    &bytes_read);
@@ -1748,7 +1769,7 @@
 			    char *cipher_name, size_t *key_size)
 {
 	char dummy_key[ECRYPTFS_MAX_KEY_BYTES];
-	char *full_alg_name;
+	char *full_alg_name = NULL;
 	int rc;
 
 	*key_tfm = NULL;
@@ -1763,7 +1784,6 @@
 	if (rc)
 		goto out;
 	*key_tfm = crypto_alloc_blkcipher(full_alg_name, 0, CRYPTO_ALG_ASYNC);
-	kfree(full_alg_name);
 	if (IS_ERR(*key_tfm)) {
 		rc = PTR_ERR(*key_tfm);
 		printk(KERN_ERR "Unable to allocate crypto cipher with name "
@@ -1786,6 +1806,7 @@
 		goto out;
 	}
 out:
+	kfree(full_alg_name);
 	return rc;
 }
 
--- linux-mvl-dove-2.6.32.orig/fs/jbd2/journal.c
+++ linux-mvl-dove-2.6.32/fs/jbd2/journal.c
@@ -78,6 +78,7 @@
 EXPORT_SYMBOL(jbd2_journal_ack_err);
 EXPORT_SYMBOL(jbd2_journal_clear_err);
 EXPORT_SYMBOL(jbd2_log_wait_commit);
+EXPORT_SYMBOL(jbd2_log_start_commit);
 EXPORT_SYMBOL(jbd2_journal_start_commit);
 EXPORT_SYMBOL(jbd2_journal_force_commit_nested);
 EXPORT_SYMBOL(jbd2_journal_wipe);
@@ -358,6 +359,10 @@
 
 		jbd_unlock_bh_state(bh_in);
 		tmp = jbd2_alloc(bh_in->b_size, GFP_NOFS);
+		if (!tmp) {
+			jbd2_journal_put_journal_head(new_jh);
+			return -ENOMEM;
+		}
 		jbd_lock_bh_state(bh_in);
 		if (jh_in->b_frozen_data) {
 			jbd2_free(tmp, bh_in->b_size);
@@ -1248,6 +1253,13 @@
 	if (jbd2_journal_recover(journal))
 		goto recovery_error;
 
+	if (journal->j_failed_commit) {
+		printk(KERN_ERR "JBD2: journal transaction %u on %s "
+		       "is corrupt.\n", journal->j_failed_commit,
+		       journal->j_devname);
+		return -EIO;
+	}
+
 	/* OK, we've finished with the dynamic journal bits:
 	 * reinitialise the dynamic contents of the superblock in memory
 	 * and reset them on disk. */
@@ -2103,7 +2115,8 @@
 {
 	jbd2_debugfs_dir = debugfs_create_dir("jbd2", NULL);
 	if (jbd2_debugfs_dir)
-		jbd2_debug = debugfs_create_u8(JBD2_DEBUG_NAME, S_IRUGO,
+		jbd2_debug = debugfs_create_u8(JBD2_DEBUG_NAME,
+					       S_IRUGO | S_IWUSR,
 					       jbd2_debugfs_dir,
 					       &jbd2_journal_enable_debug);
 }
--- linux-mvl-dove-2.6.32.orig/fs/jbd2/checkpoint.c
+++ linux-mvl-dove-2.6.32/fs/jbd2/checkpoint.c
@@ -22,6 +22,7 @@
 #include <linux/jbd2.h>
 #include <linux/errno.h>
 #include <linux/slab.h>
+#include <linux/blkdev.h>
 #include <trace/events/jbd2.h>
 
 /*
@@ -515,6 +516,20 @@
 	journal->j_tail_sequence = first_tid;
 	journal->j_tail = blocknr;
 	spin_unlock(&journal->j_state_lock);
+
+	/*
+	 * If there is an external journal, we need to make sure that
+	 * any data blocks that were recently written out --- perhaps
+	 * by jbd2_log_do_checkpoint() --- are flushed out before we
+	 * drop the transactions from the external journal.  It's
+	 * unlikely this will be necessary, especially with a
+	 * appropriately sized journal, but we need this to guarantee
+	 * correctness.  Fortunately jbd2_cleanup_journal_tail()
+	 * doesn't get called all that often.
+	 */
+	if ((journal->j_fs_dev != journal->j_dev) &&
+	    (journal->j_flags & JBD2_BARRIER))
+		blkdev_issue_flush(journal->j_fs_dev, NULL);
 	if (!(journal->j_flags & JBD2_ABORT))
 		jbd2_journal_update_superblock(journal, 1);
 	return 0;
--- linux-mvl-dove-2.6.32.orig/fs/jbd2/commit.c
+++ linux-mvl-dove-2.6.32/fs/jbd2/commit.c
@@ -259,6 +259,7 @@
 			ret = err;
 		spin_lock(&journal->j_list_lock);
 		J_ASSERT(jinode->i_transaction == commit_transaction);
+		commit_transaction->t_flushed_data_blocks = 1;
 		jinode->i_flags &= ~JI_COMMIT_RUNNING;
 		wake_up_bit(&jinode->i_flags, __JI_COMMIT_RUNNING);
 	}
@@ -636,6 +637,10 @@
 		JBUFFER_TRACE(jh, "ph3: write metadata");
 		flags = jbd2_journal_write_metadata_buffer(commit_transaction,
 						      jh, &new_jh, blocknr);
+		if (flags < 0) {
+			jbd2_journal_abort(journal, flags);
+			continue;
+		}
 		set_bit(BH_JWrite, &jh2bh(new_jh)->b_state);
 		wbuf[bufs++] = jh2bh(new_jh);
 
@@ -704,8 +709,17 @@
 		}
 	}
 
-	/* Done it all: now write the commit record asynchronously. */
+	/*
+	 * If the journal is not located on the file system device,
+	 * then we must flush the file system device before we issue
+	 * the commit record
+	 */
+	if (commit_transaction->t_flushed_data_blocks &&
+	    (journal->j_fs_dev != journal->j_dev) &&
+	    (journal->j_flags & JBD2_BARRIER))
+		blkdev_issue_flush(journal->j_fs_dev, NULL);
 
+	/* Done it all: now write the commit record asynchronously. */
 	if (JBD2_HAS_INCOMPAT_FEATURE(journal,
 				      JBD2_FEATURE_INCOMPAT_ASYNC_COMMIT)) {
 		err = journal_submit_commit_record(journal, commit_transaction,
@@ -716,13 +730,6 @@
 			blkdev_issue_flush(journal->j_dev, NULL);
 	}
 
-	/*
-	 * This is the right place to wait for data buffers both for ASYNC
-	 * and !ASYNC commit. If commit is ASYNC, we need to wait only after
-	 * the commit block went to disk (which happens above). If commit is
-	 * SYNC, we need to wait for data buffers before we start writing
-	 * commit block, which happens below in such setting.
-	 */
 	err = journal_finish_inode_data_buffers(journal, commit_transaction);
 	if (err) {
 		printk(KERN_WARNING
--- linux-mvl-dove-2.6.32.orig/fs/jfs/xattr.c
+++ linux-mvl-dove-2.6.32/fs/jfs/xattr.c
@@ -85,46 +85,25 @@
 #define EA_MALLOC	0x0008
 
 
+static int is_known_namespace(const char *name)
+{
+	if (strncmp(name, XATTR_SYSTEM_PREFIX, XATTR_SYSTEM_PREFIX_LEN) &&
+	    strncmp(name, XATTR_USER_PREFIX, XATTR_USER_PREFIX_LEN) &&
+	    strncmp(name, XATTR_SECURITY_PREFIX, XATTR_SECURITY_PREFIX_LEN) &&
+	    strncmp(name, XATTR_TRUSTED_PREFIX, XATTR_TRUSTED_PREFIX_LEN))
+		return false;
+
+	return true;
+}
+
 /*
  * These three routines are used to recognize on-disk extended attributes
  * that are in a recognized namespace.  If the attribute is not recognized,
  * "os2." is prepended to the name
  */
-static inline int is_os2_xattr(struct jfs_ea *ea)
+static int is_os2_xattr(struct jfs_ea *ea)
 {
-	/*
-	 * Check for "system."
-	 */
-	if ((ea->namelen >= XATTR_SYSTEM_PREFIX_LEN) &&
-	    !strncmp(ea->name, XATTR_SYSTEM_PREFIX, XATTR_SYSTEM_PREFIX_LEN))
-		return false;
-	/*
-	 * Check for "user."
-	 */
-	if ((ea->namelen >= XATTR_USER_PREFIX_LEN) &&
-	    !strncmp(ea->name, XATTR_USER_PREFIX, XATTR_USER_PREFIX_LEN))
-		return false;
-	/*
-	 * Check for "security."
-	 */
-	if ((ea->namelen >= XATTR_SECURITY_PREFIX_LEN) &&
-	    !strncmp(ea->name, XATTR_SECURITY_PREFIX,
-		     XATTR_SECURITY_PREFIX_LEN))
-		return false;
-	/*
-	 * Check for "trusted."
-	 */
-	if ((ea->namelen >= XATTR_TRUSTED_PREFIX_LEN) &&
-	    !strncmp(ea->name, XATTR_TRUSTED_PREFIX, XATTR_TRUSTED_PREFIX_LEN))
-		return false;
-	/*
-	 * Add any other valid namespace prefixes here
-	 */
-
-	/*
-	 * We assume it's OS/2's flat namespace
-	 */
-	return true;
+	return !is_known_namespace(ea->name);
 }
 
 static inline int name_size(struct jfs_ea *ea)
@@ -762,13 +741,23 @@
 	if (!strncmp(name, XATTR_SYSTEM_PREFIX, XATTR_SYSTEM_PREFIX_LEN))
 		return can_set_system_xattr(inode, name, value, value_len);
 
+	if (!strncmp(name, XATTR_OS2_PREFIX, XATTR_OS2_PREFIX_LEN)) {
+		/*
+		 * This makes sure that we aren't trying to set an
+		 * attribute in a different namespace by prefixing it
+		 * with "os2."
+		 */
+		if (is_known_namespace(name + XATTR_OS2_PREFIX_LEN))
+				return -EOPNOTSUPP;
+		return 0;
+	}
+
 	/*
 	 * Don't allow setting an attribute in an unknown namespace.
 	 */
 	if (strncmp(name, XATTR_TRUSTED_PREFIX, XATTR_TRUSTED_PREFIX_LEN) &&
 	    strncmp(name, XATTR_SECURITY_PREFIX, XATTR_SECURITY_PREFIX_LEN) &&
-	    strncmp(name, XATTR_USER_PREFIX, XATTR_USER_PREFIX_LEN) &&
-	    strncmp(name, XATTR_OS2_PREFIX, XATTR_OS2_PREFIX_LEN))
+	    strncmp(name, XATTR_USER_PREFIX, XATTR_USER_PREFIX_LEN))
 		return -EOPNOTSUPP;
 
 	return 0;
@@ -950,19 +939,8 @@
 	int xattr_size;
 	ssize_t size;
 	int namelen = strlen(name);
-	char *os2name = NULL;
 	char *value;
 
-	if (strncmp(name, XATTR_OS2_PREFIX, XATTR_OS2_PREFIX_LEN) == 0) {
-		os2name = kmalloc(namelen - XATTR_OS2_PREFIX_LEN + 1,
-				  GFP_KERNEL);
-		if (!os2name)
-			return -ENOMEM;
-		strcpy(os2name, name + XATTR_OS2_PREFIX_LEN);
-		name = os2name;
-		namelen -= XATTR_OS2_PREFIX_LEN;
-	}
-
 	down_read(&JFS_IP(inode)->xattr_sem);
 
 	xattr_size = ea_get(inode, &ea_buf, 0);
@@ -1000,8 +978,6 @@
       out:
 	up_read(&JFS_IP(inode)->xattr_sem);
 
-	kfree(os2name);
-
 	return size;
 }
 
@@ -1010,6 +986,19 @@
 {
 	int err;
 
+	if (strncmp(name, XATTR_OS2_PREFIX, XATTR_OS2_PREFIX_LEN) == 0) {
+		/*
+		 * skip past "os2." prefix
+		 */
+		name += XATTR_OS2_PREFIX_LEN;
+		/*
+		 * Don't allow retrieving properly prefixed attributes
+		 * by prepending them with "os2."
+		 */
+		if (is_known_namespace(name))
+			return -EOPNOTSUPP;
+	}
+
 	err = __jfs_getxattr(dentry->d_inode, name, data, buf_size);
 
 	return err;
--- linux-mvl-dove-2.6.32.orig/fs/jfs/resize.c
+++ linux-mvl-dove-2.6.32/fs/jfs/resize.c
@@ -81,6 +81,7 @@
 	struct inode *iplist[1];
 	struct jfs_superblock *j_sb, *j_sb2;
 	uint old_agsize;
+	int agsizechanged = 0;
 	struct buffer_head *bh, *bh2;
 
 	/* If the volume hasn't grown, get out now */
@@ -333,6 +334,9 @@
 	 */
 	if ((rc = dbExtendFS(ipbmap, XAddress, nblocks)))
 		goto error_out;
+
+	agsizechanged |= (bmp->db_agsize != old_agsize);
+
 	/*
 	 * the map now has extended to cover additional nblocks:
 	 * dn_mapsize = oldMapsize + nblocks;
@@ -432,7 +436,7 @@
 	 * will correctly identify the new ag);
 	 */
 	/* if new AG size the same as old AG size, done! */
-	if (bmp->db_agsize != old_agsize) {
+	if (agsizechanged) {
 		if ((rc = diExtendFS(ipimap, ipbmap)))
 			goto error_out;
 
--- linux-mvl-dove-2.6.32.orig/fs/debugfs/inode.c
+++ linux-mvl-dove-2.6.32/fs/debugfs/inode.c
@@ -32,7 +32,9 @@
 static int debugfs_mount_count;
 static bool debugfs_registered;
 
-static struct inode *debugfs_get_inode(struct super_block *sb, int mode, dev_t dev)
+static struct inode *debugfs_get_inode(struct super_block *sb, int mode, dev_t dev,
+				       void *data, const struct file_operations *fops)
+
 {
 	struct inode *inode = new_inode(sb);
 
@@ -44,14 +46,18 @@
 			init_special_inode(inode, mode, dev);
 			break;
 		case S_IFREG:
-			inode->i_fop = &debugfs_file_operations;
+			inode->i_fop = fops ? fops : &debugfs_file_operations;
+			inode->i_private = data;
 			break;
 		case S_IFLNK:
 			inode->i_op = &debugfs_link_operations;
+			inode->i_fop = fops;
+			inode->i_private = data;
 			break;
 		case S_IFDIR:
 			inode->i_op = &simple_dir_inode_operations;
-			inode->i_fop = &simple_dir_operations;
+			inode->i_fop = fops ? fops : &simple_dir_operations;
+			inode->i_private = data;
 
 			/* directory inodes start off with i_nlink == 2
 			 * (for "." entry) */
@@ -64,7 +70,8 @@
 
 /* SMP-safe */
 static int debugfs_mknod(struct inode *dir, struct dentry *dentry,
-			 int mode, dev_t dev)
+			 int mode, dev_t dev, void *data,
+			 const struct file_operations *fops)
 {
 	struct inode *inode;
 	int error = -EPERM;
@@ -72,7 +79,7 @@
 	if (dentry->d_inode)
 		return -EEXIST;
 
-	inode = debugfs_get_inode(dir->i_sb, mode, dev);
+	inode = debugfs_get_inode(dir->i_sb, mode, dev, data, fops);
 	if (inode) {
 		d_instantiate(dentry, inode);
 		dget(dentry);
@@ -81,12 +88,13 @@
 	return error;
 }
 
-static int debugfs_mkdir(struct inode *dir, struct dentry *dentry, int mode)
+static int debugfs_mkdir(struct inode *dir, struct dentry *dentry, int mode,
+			 void *data, const struct file_operations *fops)
 {
 	int res;
 
 	mode = (mode & (S_IRWXUGO | S_ISVTX)) | S_IFDIR;
-	res = debugfs_mknod(dir, dentry, mode, 0);
+	res = debugfs_mknod(dir, dentry, mode, 0, data, fops);
 	if (!res) {
 		inc_nlink(dir);
 		fsnotify_mkdir(dir, dentry);
@@ -94,18 +102,20 @@
 	return res;
 }
 
-static int debugfs_link(struct inode *dir, struct dentry *dentry, int mode)
+static int debugfs_link(struct inode *dir, struct dentry *dentry, int mode,
+			void *data, const struct file_operations *fops)
 {
 	mode = (mode & S_IALLUGO) | S_IFLNK;
-	return debugfs_mknod(dir, dentry, mode, 0);
+	return debugfs_mknod(dir, dentry, mode, 0, data, fops);
 }
 
-static int debugfs_create(struct inode *dir, struct dentry *dentry, int mode)
+static int debugfs_create(struct inode *dir, struct dentry *dentry, int mode,
+			  void *data, const struct file_operations *fops)
 {
 	int res;
 
 	mode = (mode & S_IALLUGO) | S_IFREG;
-	res = debugfs_mknod(dir, dentry, mode, 0);
+	res = debugfs_mknod(dir, dentry, mode, 0, data, fops);
 	if (!res)
 		fsnotify_create(dir, dentry);
 	return res;
@@ -139,7 +149,9 @@
 
 static int debugfs_create_by_name(const char *name, mode_t mode,
 				  struct dentry *parent,
-				  struct dentry **dentry)
+				  struct dentry **dentry,
+				  void *data,
+				  const struct file_operations *fops)
 {
 	int error = 0;
 
@@ -164,13 +176,16 @@
 	if (!IS_ERR(*dentry)) {
 		switch (mode & S_IFMT) {
 		case S_IFDIR:
-			error = debugfs_mkdir(parent->d_inode, *dentry, mode);
+			error = debugfs_mkdir(parent->d_inode, *dentry, mode,
+					      data, fops);
 			break;
 		case S_IFLNK:
-			error = debugfs_link(parent->d_inode, *dentry, mode);
+			error = debugfs_link(parent->d_inode, *dentry, mode,
+					     data, fops);
 			break;
 		default:
-			error = debugfs_create(parent->d_inode, *dentry, mode);
+			error = debugfs_create(parent->d_inode, *dentry, mode,
+					       data, fops);
 			break;
 		}
 		dput(*dentry);
@@ -221,19 +236,13 @@
 	if (error)
 		goto exit;
 
-	error = debugfs_create_by_name(name, mode, parent, &dentry);
+	error = debugfs_create_by_name(name, mode, parent, &dentry,
+				       data, fops);
 	if (error) {
 		dentry = NULL;
 		simple_release_fs(&debugfs_mount, &debugfs_mount_count);
 		goto exit;
 	}
-
-	if (dentry->d_inode) {
-		if (data)
-			dentry->d_inode->i_private = data;
-		if (fops)
-			dentry->d_inode->i_fop = fops;
-	}
 exit:
 	return dentry;
 }
--- linux-mvl-dove-2.6.32.orig/fs/nfs/nfs4_fs.h
+++ linux-mvl-dove-2.6.32/fs/nfs/nfs4_fs.h
@@ -141,6 +141,7 @@
 	NFS_O_RDWR_STATE,		/* OPEN stateid has read/write state */
 	NFS_STATE_RECLAIM_REBOOT,	/* OPEN stateid server rebooted */
 	NFS_STATE_RECLAIM_NOGRACE,	/* OPEN stateid needs to recover state */
+	NFS_STATE_POSIX_LOCKS,		/* Posix locks are supported */
 };
 
 struct nfs4_state {
--- linux-mvl-dove-2.6.32.orig/fs/nfs/client.c
+++ linux-mvl-dove-2.6.32/fs/nfs/client.c
@@ -273,7 +273,7 @@
 	    sin1->sin6_scope_id != sin2->sin6_scope_id)
 		return 0;
 
-	return ipv6_addr_equal(&sin1->sin6_addr, &sin1->sin6_addr);
+	return ipv6_addr_equal(&sin1->sin6_addr, &sin2->sin6_addr);
 }
 #else	/* !defined(CONFIG_IPV6) && !defined(CONFIG_IPV6_MODULE) */
 static int nfs_sockaddr_match_ipaddr6(const struct sockaddr *sa1,
@@ -965,6 +965,8 @@
 static void nfs_server_copy_userdata(struct nfs_server *target, struct nfs_server *source)
 {
 	target->flags = source->flags;
+	target->rsize = source->rsize;
+	target->wsize = source->wsize;
 	target->acregmin = source->acregmin;
 	target->acregmax = source->acregmax;
 	target->acdirmin = source->acdirmin;
@@ -1283,7 +1285,8 @@
 
 	/* Initialise the client representation from the mount data */
 	server->flags = data->flags;
-	server->caps |= NFS_CAP_ATOMIC_OPEN|NFS_CAP_CHANGE_ATTR;
+	server->caps |= NFS_CAP_ATOMIC_OPEN|NFS_CAP_CHANGE_ATTR|
+		NFS_CAP_POSIX_LOCK;
 	server->options = data->options;
 
 	/* Get a client record */
--- linux-mvl-dove-2.6.32.orig/fs/nfs/delegation.h
+++ linux-mvl-dove-2.6.32/fs/nfs/delegation.h
@@ -68,4 +68,10 @@
 }
 #endif
 
+static inline int nfs_have_delegated_attributes(struct inode *inode)
+{
+	return nfs_have_delegation(inode, FMODE_READ) &&
+		!(NFS_I(inode)->cache_validity & NFS_INO_REVAL_FORCED);
+}
+
 #endif
--- linux-mvl-dove-2.6.32.orig/fs/nfs/inode.c
+++ linux-mvl-dove-2.6.32/fs/nfs/inode.c
@@ -759,7 +759,7 @@
 {
 	struct nfs_inode *nfsi = NFS_I(inode);
 
-	if (nfs_have_delegation(inode, FMODE_READ))
+	if (nfs_have_delegated_attributes(inode))
 		return 0;
 	return !time_in_range_open(jiffies, nfsi->read_cache_jiffies, nfsi->read_cache_jiffies + nfsi->attrtimeo);
 }
@@ -861,9 +861,10 @@
 	return ret;
 }
 
-static void nfs_wcc_update_inode(struct inode *inode, struct nfs_fattr *fattr)
+static unsigned long nfs_wcc_update_inode(struct inode *inode, struct nfs_fattr *fattr)
 {
 	struct nfs_inode *nfsi = NFS_I(inode);
+	unsigned long ret = 0;
 
 	if ((fattr->valid & NFS_ATTR_FATTR_PRECHANGE)
 			&& (fattr->valid & NFS_ATTR_FATTR_CHANGE)
@@ -871,25 +872,32 @@
 		nfsi->change_attr = fattr->change_attr;
 		if (S_ISDIR(inode->i_mode))
 			nfsi->cache_validity |= NFS_INO_INVALID_DATA;
+		ret |= NFS_INO_INVALID_ATTR;
 	}
 	/* If we have atomic WCC data, we may update some attributes */
 	if ((fattr->valid & NFS_ATTR_FATTR_PRECTIME)
 			&& (fattr->valid & NFS_ATTR_FATTR_CTIME)
-			&& timespec_equal(&inode->i_ctime, &fattr->pre_ctime))
-			memcpy(&inode->i_ctime, &fattr->ctime, sizeof(inode->i_ctime));
+			&& timespec_equal(&inode->i_ctime, &fattr->pre_ctime)) {
+		memcpy(&inode->i_ctime, &fattr->ctime, sizeof(inode->i_ctime));
+		ret |= NFS_INO_INVALID_ATTR;
+	}
 
 	if ((fattr->valid & NFS_ATTR_FATTR_PREMTIME)
 			&& (fattr->valid & NFS_ATTR_FATTR_MTIME)
 			&& timespec_equal(&inode->i_mtime, &fattr->pre_mtime)) {
-			memcpy(&inode->i_mtime, &fattr->mtime, sizeof(inode->i_mtime));
-			if (S_ISDIR(inode->i_mode))
-				nfsi->cache_validity |= NFS_INO_INVALID_DATA;
+		memcpy(&inode->i_mtime, &fattr->mtime, sizeof(inode->i_mtime));
+		if (S_ISDIR(inode->i_mode))
+			nfsi->cache_validity |= NFS_INO_INVALID_DATA;
+		ret |= NFS_INO_INVALID_ATTR;
 	}
 	if ((fattr->valid & NFS_ATTR_FATTR_PRESIZE)
 			&& (fattr->valid & NFS_ATTR_FATTR_SIZE)
 			&& i_size_read(inode) == nfs_size_to_loff_t(fattr->pre_size)
-			&& nfsi->npages == 0)
-			i_size_write(inode, nfs_size_to_loff_t(fattr->size));
+			&& nfsi->npages == 0) {
+		i_size_write(inode, nfs_size_to_loff_t(fattr->size));
+		ret |= NFS_INO_INVALID_ATTR;
+	}
+	return ret;
 }
 
 /**
@@ -1183,7 +1191,7 @@
 			| NFS_INO_REVAL_PAGECACHE);
 
 	/* Do atomic weak cache consistency updates */
-	nfs_wcc_update_inode(inode, fattr);
+	invalid |= nfs_wcc_update_inode(inode, fattr);
 
 	/* More cache consistency checks */
 	if (fattr->valid & NFS_ATTR_FATTR_CHANGE) {
--- linux-mvl-dove-2.6.32.orig/fs/nfs/nfs4proc.c
+++ linux-mvl-dove-2.6.32/fs/nfs/nfs4proc.c
@@ -1439,6 +1439,8 @@
 		nfs_post_op_update_inode(dir, o_res->dir_attr);
 	} else
 		nfs_refresh_inode(dir, o_res->dir_attr);
+	if ((o_res->rflags & NFS4_OPEN_RESULT_LOCKTYPE_POSIX) == 0)
+		server->caps &= ~NFS_CAP_POSIX_LOCK;
 	if(o_res->rflags & NFS4_OPEN_RESULT_CONFIRM) {
 		status = _nfs4_proc_open_confirm(data);
 		if (status != 0)
@@ -1573,6 +1575,8 @@
 	status = PTR_ERR(state);
 	if (IS_ERR(state))
 		goto err_opendata_put;
+	if (server->caps & NFS_CAP_POSIX_LOCK)
+		set_bit(NFS_STATE_POSIX_LOCKS, &state->flags);
 	nfs4_opendata_put(opendata);
 	nfs4_put_state_owner(sp);
 	*res = state;
@@ -3129,6 +3133,35 @@
 	}
 }
 
+static int buf_to_pages_noslab(const void *buf, size_t buflen,
+		struct page **pages, unsigned int *pgbase)
+{
+	struct page *newpage, **spages;
+	int rc = 0;
+	size_t len;
+	spages = pages;
+
+	do {
+		len = min_t(size_t, PAGE_CACHE_SIZE, buflen);
+		newpage = alloc_page(GFP_KERNEL);
+
+		if (newpage == NULL)
+			goto unwind;
+		memcpy(page_address(newpage), buf, len);
+                buf += len;
+                buflen -= len;
+		*pages++ = newpage;
+		rc++;
+	} while (buflen != 0);
+
+	return rc;
+
+unwind:
+	for(; rc > 0; rc--)
+		__free_page(spages[rc-1]);
+	return -ENOMEM;
+}
+
 struct nfs4_cached_acl {
 	int cached;
 	size_t len;
@@ -3295,13 +3328,23 @@
 		.rpc_argp	= &arg,
 		.rpc_resp	= &res,
 	};
-	int ret;
+	int ret, i;
 
 	if (!nfs4_server_supports_acls(server))
 		return -EOPNOTSUPP;
+	i = buf_to_pages_noslab(buf, buflen, arg.acl_pages, &arg.acl_pgbase);
+	if (i < 0)
+		return i;
 	nfs_inode_return_delegation(inode);
-	buf_to_pages(buf, buflen, arg.acl_pages, &arg.acl_pgbase);
 	ret = nfs4_call_sync(server, &msg, &arg, &res, 1);
+
+	/*
+	 * Free each page after tx, so the only ref left is
+	 * held by the network stack
+	 */
+	for (; i > 0; i--)
+		put_page(pages[i-1]);
+
 	nfs_access_zap_cache(inode);
 	nfs_zap_acl_cache(inode);
 	return ret;
@@ -3976,6 +4019,22 @@
 	.rpc_release = nfs4_lock_release,
 };
 
+static void nfs4_handle_setlk_error(struct nfs_server *server, struct nfs4_lock_state *lsp, int new_lock_owner, int error)
+{
+	struct nfs_client *clp = server->nfs_client;
+	struct nfs4_state *state = lsp->ls_state;
+
+	switch (error) {
+	case -NFS4ERR_ADMIN_REVOKED:
+	case -NFS4ERR_BAD_STATEID:
+	case -NFS4ERR_EXPIRED:
+		if (new_lock_owner != 0 ||
+		   (lsp->ls_flags & NFS_LOCK_INITIALIZED) != 0)
+			nfs4_state_mark_reclaim_nograce(clp, state);
+		lsp->ls_seqid.flags &= ~NFS_SEQID_CONFIRMED;
+	};
+}
+
 static int _nfs4_do_setlk(struct nfs4_state *state, int cmd, struct file_lock *fl, int reclaim)
 {
 	struct nfs4_lockdata *data;
@@ -4011,6 +4070,9 @@
 	ret = nfs4_wait_for_completion_rpc_task(task);
 	if (ret == 0) {
 		ret = data->rpc_status;
+		if (ret)
+			nfs4_handle_setlk_error(data->server, data->lsp,
+					data->arg.new_lock_owner, ret);
 	} else
 		data->cancelled = 1;
 	rpc_put_task(task);
@@ -4060,8 +4122,11 @@
 {
 	struct nfs_inode *nfsi = NFS_I(state->inode);
 	unsigned char fl_flags = request->fl_flags;
-	int status;
+	int status = -ENOLCK;
 
+	if ((fl_flags & FL_POSIX) &&
+			!test_bit(NFS_STATE_POSIX_LOCKS, &state->flags))
+		goto out;
 	/* Is this a delegated open? */
 	status = nfs4_set_lock_state(state, request);
 	if (status != 0)
--- linux-mvl-dove-2.6.32.orig/fs/nfs/pagelist.c
+++ linux-mvl-dove-2.6.32/fs/nfs/pagelist.c
@@ -112,12 +112,10 @@
  */
 int nfs_set_page_tag_locked(struct nfs_page *req)
 {
-	struct nfs_inode *nfsi = NFS_I(req->wb_context->path.dentry->d_inode);
-
 	if (!nfs_lock_request_dontget(req))
 		return 0;
 	if (req->wb_page != NULL)
-		radix_tree_tag_set(&nfsi->nfs_page_tree, req->wb_index, NFS_PAGE_TAG_LOCKED);
+		radix_tree_tag_set(&NFS_I(req->wb_context->path.dentry->d_inode)->nfs_page_tree, req->wb_index, NFS_PAGE_TAG_LOCKED);
 	return 1;
 }
 
@@ -126,10 +124,10 @@
  */
 void nfs_clear_page_tag_locked(struct nfs_page *req)
 {
-	struct inode *inode = req->wb_context->path.dentry->d_inode;
-	struct nfs_inode *nfsi = NFS_I(inode);
-
 	if (req->wb_page != NULL) {
+		struct inode *inode = req->wb_context->path.dentry->d_inode;
+		struct nfs_inode *nfsi = NFS_I(inode);
+
 		spin_lock(&inode->i_lock);
 		radix_tree_tag_clear(&nfsi->nfs_page_tree, req->wb_index, NFS_PAGE_TAG_LOCKED);
 		nfs_unlock_request(req);
@@ -142,16 +140,22 @@
  * nfs_clear_request - Free up all resources allocated to the request
  * @req:
  *
- * Release page resources associated with a write request after it
- * has completed.
+ * Release page and open context resources associated with a read/write
+ * request after it has completed.
  */
 void nfs_clear_request(struct nfs_page *req)
 {
 	struct page *page = req->wb_page;
+	struct nfs_open_context *ctx = req->wb_context;
+
 	if (page != NULL) {
 		page_cache_release(page);
 		req->wb_page = NULL;
 	}
+	if (ctx != NULL) {
+		put_nfs_open_context(ctx);
+		req->wb_context = NULL;
+	}
 }
 
 
@@ -165,9 +169,8 @@
 {
 	struct nfs_page *req = container_of(kref, struct nfs_page, wb_kref);
 
-	/* Release struct file or cached credential */
+	/* Release struct file and open context */
 	nfs_clear_request(req);
-	put_nfs_open_context(req->wb_context);
 	nfs_page_free(req);
 }
 
@@ -176,6 +179,12 @@
 	kref_put(&req->wb_kref, nfs_free_request);
 }
 
+static int nfs_wait_bit_uninterruptible(void *word)
+{
+	io_schedule();
+	return 0;
+}
+
 /**
  * nfs_wait_on_request - Wait for a request to complete.
  * @req: request to wait upon.
@@ -186,14 +195,9 @@
 int
 nfs_wait_on_request(struct nfs_page *req)
 {
-	int ret = 0;
-
-	if (!test_bit(PG_BUSY, &req->wb_flags))
-		goto out;
-	ret = out_of_line_wait_on_bit(&req->wb_flags, PG_BUSY,
-			nfs_wait_bit_killable, TASK_KILLABLE);
-out:
-	return ret;
+	return wait_on_bit(&req->wb_flags, PG_BUSY,
+			nfs_wait_bit_uninterruptible,
+			TASK_UNINTERRUPTIBLE);
 }
 
 /**
--- linux-mvl-dove-2.6.32.orig/fs/nfs/nfs2xdr.c
+++ linux-mvl-dove-2.6.32/fs/nfs/nfs2xdr.c
@@ -699,7 +699,7 @@
 	{ NFSERR_BAD_COOKIE,	-EBADCOOKIE	},
 	{ NFSERR_NOTSUPP,	-ENOTSUPP	},
 	{ NFSERR_TOOSMALL,	-ETOOSMALL	},
-	{ NFSERR_SERVERFAULT,	-ESERVERFAULT	},
+	{ NFSERR_SERVERFAULT,	-EREMOTEIO	},
 	{ NFSERR_BADTYPE,	-EBADTYPE	},
 	{ NFSERR_JUKEBOX,	-EJUKEBOX	},
 	{ -1,			-EIO		}
--- linux-mvl-dove-2.6.32.orig/fs/nfs/mount_clnt.c
+++ linux-mvl-dove-2.6.32/fs/nfs/mount_clnt.c
@@ -120,7 +120,7 @@
 	{ .status = MNT3ERR_INVAL,		.errno = -EINVAL,	},
 	{ .status = MNT3ERR_NAMETOOLONG,	.errno = -ENAMETOOLONG,	},
 	{ .status = MNT3ERR_NOTSUPP,		.errno = -ENOTSUPP,	},
-	{ .status = MNT3ERR_SERVERFAULT,	.errno = -ESERVERFAULT,	},
+	{ .status = MNT3ERR_SERVERFAULT,	.errno = -EREMOTEIO,	},
 };
 
 struct mountres {
@@ -503,13 +503,13 @@
 
 static struct rpc_version mnt_version1 = {
 	.number		= 1,
-	.nrprocs	= 2,
+	.nrprocs	= ARRAY_SIZE(mnt_procedures),
 	.procs		= mnt_procedures,
 };
 
 static struct rpc_version mnt_version3 = {
 	.number		= 3,
-	.nrprocs	= 2,
+	.nrprocs	= ARRAY_SIZE(mnt3_procedures),
 	.procs		= mnt3_procedures,
 };
 
--- linux-mvl-dove-2.6.32.orig/fs/nfs/file.c
+++ linux-mvl-dove-2.6.32/fs/nfs/file.c
@@ -27,6 +27,8 @@
 #include <linux/slab.h>
 #include <linux/pagemap.h>
 #include <linux/aio.h>
+#include <linux/gfp.h>
+#include <linux/swap.h>
 
 #include <asm/uaccess.h>
 #include <asm/system.h>
@@ -218,7 +220,7 @@
 	have_error |= test_bit(NFS_CONTEXT_ERROR_WRITE, &ctx->flags);
 	if (have_error)
 		ret = xchg(&ctx->error, 0);
-	if (!ret)
+	if (!ret && status < 0)
 		ret = status;
 	return ret;
 }
@@ -484,8 +486,19 @@
  */
 static int nfs_release_page(struct page *page, gfp_t gfp)
 {
+	struct address_space *mapping = page->mapping;
+
 	dfprintk(PAGECACHE, "NFS: release_page(%p)\n", page);
 
+	/* Only do I/O if gfp is a superset of GFP_KERNEL */
+	if (mapping && (gfp & GFP_KERNEL) == GFP_KERNEL) {
+		int how = FLUSH_SYNC;
+
+		/* Don't let kswapd deadlock waiting for OOM RPC calls */
+		if (current_is_kswapd())
+			how = 0;
+		nfs_commit_inode(mapping->host, how);
+	}
 	/* If PagePrivate() is set, then the page is not freeable */
 	if (PagePrivate(page))
 		return 0;
@@ -667,6 +680,7 @@
 {
 	struct inode *inode = filp->f_mapping->host;
 	int status = 0;
+	unsigned int saved_type = fl->fl_type;
 
 	/* Try local locking first */
 	posix_test_lock(filp, fl);
@@ -674,6 +688,7 @@
 		/* found a conflict */
 		goto out;
 	}
+	fl->fl_type = saved_type;
 
 	if (nfs_have_delegation(inode, FMODE_READ))
 		goto out_noconflict;
--- linux-mvl-dove-2.6.32.orig/fs/nfs/nfs4state.c
+++ linux-mvl-dove-2.6.32/fs/nfs/nfs4state.c
@@ -1228,7 +1228,7 @@
 	int status = 0;
 
 	/* Ensure exclusive access to NFSv4 state */
-	for(;;) {
+	do {
 		if (test_and_clear_bit(NFS4CLNT_LEASE_EXPIRED, &clp->cl_state)) {
 			/* We're going to have to re-establish a clientid */
 			status = nfs4_reclaim_lease(clp);
@@ -1304,7 +1304,7 @@
 			break;
 		if (test_and_set_bit(NFS4CLNT_MANAGER_RUNNING, &clp->cl_state) != 0)
 			break;
-	}
+	} while (atomic_read(&clp->cl_count) > 1);
 	return;
 out_error:
 	printk(KERN_WARNING "Error: state manager failed on NFSv4 server %s"
--- linux-mvl-dove-2.6.32.orig/fs/nfs/nfs4xdr.c
+++ linux-mvl-dove-2.6.32/fs/nfs/nfs4xdr.c
@@ -88,7 +88,7 @@
 #define encode_getfh_maxsz      (op_encode_hdr_maxsz)
 #define decode_getfh_maxsz      (op_decode_hdr_maxsz + 1 + \
 				((3+NFS4_FHSIZE) >> 2))
-#define nfs4_fattr_bitmap_maxsz 3
+#define nfs4_fattr_bitmap_maxsz 4
 #define encode_getattr_maxsz    (op_encode_hdr_maxsz + nfs4_fattr_bitmap_maxsz)
 #define nfs4_name_maxsz		(1 + ((3 + NFS4_MAXNAMLEN) >> 2))
 #define nfs4_path_maxsz		(1 + ((3 + NFS4_MAXPATHLEN) >> 2))
@@ -840,8 +840,8 @@
 		bmval1 |= FATTR4_WORD1_TIME_ACCESS_SET;
 		*p++ = cpu_to_be32(NFS4_SET_TO_CLIENT_TIME);
 		*p++ = cpu_to_be32(0);
-		*p++ = cpu_to_be32(iap->ia_mtime.tv_sec);
-		*p++ = cpu_to_be32(iap->ia_mtime.tv_nsec);
+		*p++ = cpu_to_be32(iap->ia_atime.tv_sec);
+		*p++ = cpu_to_be32(iap->ia_atime.tv_nsec);
 	}
 	else if (iap->ia_valid & ATTR_ATIME) {
 		bmval1 |= FATTR4_WORD1_TIME_ACCESS_SET;
@@ -2096,7 +2096,7 @@
 	encode_compound_hdr(&xdr, req, &hdr);
 	encode_sequence(&xdr, &args->seq_args, &hdr);
 	encode_putfh(&xdr, args->fh, &hdr);
-	replen = hdr.replen + nfs4_fattr_bitmap_maxsz + 1;
+	replen = hdr.replen + op_decode_hdr_maxsz + nfs4_fattr_bitmap_maxsz + 1;
 	encode_getattr_two(&xdr, FATTR4_WORD0_ACL, 0, &hdr);
 
 	xdr_inline_pages(&req->rq_rcv_buf, replen << 2,
@@ -4554,7 +4554,7 @@
 	 * If the server returns different values for sessionID, slotID or
 	 * sequence number, the server is looney tunes.
 	 */
-	status = -ESERVERFAULT;
+	status = -EREMOTEIO;
 
 	if (memcmp(id.data, res->sr_session->sess_id.data,
 		   NFS4_MAX_SESSIONID_LEN)) {
@@ -5678,7 +5678,7 @@
 	{ NFS4ERR_BAD_COOKIE,	-EBADCOOKIE	},
 	{ NFS4ERR_NOTSUPP,	-ENOTSUPP	},
 	{ NFS4ERR_TOOSMALL,	-ETOOSMALL	},
-	{ NFS4ERR_SERVERFAULT,	-ESERVERFAULT	},
+	{ NFS4ERR_SERVERFAULT,	-EREMOTEIO	},
 	{ NFS4ERR_BADTYPE,	-EBADTYPE	},
 	{ NFS4ERR_LOCKED,	-EAGAIN		},
 	{ NFS4ERR_SYMLINK,	-ELOOP		},
@@ -5705,7 +5705,7 @@
 	}
 	if (stat <= 10000 || stat > 10100) {
 		/* The server is looney tunes. */
-		return -ESERVERFAULT;
+		return -EREMOTEIO;
 	}
 	/* If we cannot translate the error, the recovery routines should
 	 * handle it.
--- linux-mvl-dove-2.6.32.orig/fs/nfs/super.c
+++ linux-mvl-dove-2.6.32/fs/nfs/super.c
@@ -241,6 +241,7 @@
 static int nfs_get_sb(struct file_system_type *, int, const char *, void *, struct vfsmount *);
 static int nfs_xdev_get_sb(struct file_system_type *fs_type,
 		int flags, const char *dev_name, void *raw_data, struct vfsmount *mnt);
+static void nfs_put_super(struct super_block *);
 static void nfs_kill_super(struct super_block *);
 static int nfs_remount(struct super_block *sb, int *flags, char *raw_data);
 
@@ -264,6 +265,7 @@
 	.alloc_inode	= nfs_alloc_inode,
 	.destroy_inode	= nfs_destroy_inode,
 	.write_inode	= nfs_write_inode,
+	.put_super	= nfs_put_super,
 	.statfs		= nfs_statfs,
 	.clear_inode	= nfs_clear_inode,
 	.umount_begin	= nfs_umount_begin,
@@ -333,6 +335,7 @@
 	.alloc_inode	= nfs_alloc_inode,
 	.destroy_inode	= nfs_destroy_inode,
 	.write_inode	= nfs_write_inode,
+	.put_super	= nfs_put_super,
 	.statfs		= nfs_statfs,
 	.clear_inode	= nfs4_clear_inode,
 	.umount_begin	= nfs_umount_begin,
@@ -531,6 +534,22 @@
 	}
 }
 
+#ifdef CONFIG_NFS_V4
+static void nfs_show_nfsv4_options(struct seq_file *m, struct nfs_server *nfss,
+				    int showdefaults)
+{
+	struct nfs_client *clp = nfss->nfs_client;
+
+	seq_printf(m, ",clientaddr=%s", clp->cl_ipaddr);
+	seq_printf(m, ",minorversion=%u", clp->cl_minorversion);
+}
+#else
+static void nfs_show_nfsv4_options(struct seq_file *m, struct nfs_server *nfss,
+				    int showdefaults)
+{
+}
+#endif
+
 /*
  * Describe the mount options in force on this server representation
  */
@@ -592,13 +611,18 @@
 
 	if (version != 4)
 		nfs_show_mountd_options(m, nfss, showdefaults);
+	else
+		nfs_show_nfsv4_options(m, nfss, showdefaults);
 
-#ifdef CONFIG_NFS_V4
-	if (clp->rpc_ops->version == 4)
-		seq_printf(m, ",clientaddr=%s", clp->cl_ipaddr);
-#endif
 	if (nfss->options & NFS_OPTION_FSCACHE)
 		seq_printf(m, ",fsc");
+
+	if (nfss->flags & NFS_MOUNT_LOOKUP_CACHE_NONEG) {
+		if (nfss->flags & NFS_MOUNT_LOOKUP_CACHE_NONE)
+			seq_printf(m, ",lookupcache=none");
+		else
+			seq_printf(m, ",lookupcache=pos");
+	}
 }
 
 /*
@@ -734,8 +758,6 @@
 
 	data = kzalloc(sizeof(*data), GFP_KERNEL);
 	if (data) {
-		data->rsize		= NFS_MAX_FILE_IO_SIZE;
-		data->wsize		= NFS_MAX_FILE_IO_SIZE;
 		data->acregmin		= NFS_DEF_ACREGMIN;
 		data->acregmax		= NFS_DEF_ACREGMAX;
 		data->acdirmin		= NFS_DEF_ACDIRMIN;
@@ -1903,6 +1925,15 @@
 	if (error < 0)
 		goto out;
 
+	/*
+	 * noac is a special case. It implies -o sync, but that's not
+	 * necessarily reflected in the mtab options. do_remount_sb
+	 * will clear MS_SYNCHRONOUS if -o sync wasn't specified in the
+	 * remount options, so we have to explicitly reset it.
+	 */
+	if (data->flags & NFS_MOUNT_NOAC)
+		*flags |= MS_SYNCHRONOUS;
+
 	/* compare new mount options with old ones */
 	error = nfs_compare_remount_data(nfss, data);
 out:
@@ -2198,6 +2229,17 @@
 }
 
 /*
+ * Ensure that we unregister the bdi before kill_anon_super
+ * releases the device name
+ */
+static void nfs_put_super(struct super_block *s)
+{
+	struct nfs_server *server = NFS_SB(s);
+
+	bdi_unregister(&server->backing_dev_info);
+}
+
+/*
  * Destroy an NFS2/3 superblock
  */
 static void nfs_kill_super(struct super_block *s)
@@ -2205,7 +2247,6 @@
 	struct nfs_server *server = NFS_SB(s);
 
 	kill_anon_super(s);
-	bdi_unregister(&server->backing_dev_info);
 	nfs_fscache_release_super_cookie(s);
 	nfs_free_server(server);
 }
--- linux-mvl-dove-2.6.32.orig/fs/nfs/dir.c
+++ linux-mvl-dove-2.6.32/fs/nfs/dir.c
@@ -837,6 +837,8 @@
 		/* If we have submounts, don't unhash ! */
 		if (have_submounts(dentry))
 			goto out_valid;
+		if (dentry->d_flags & DCACHE_DISCONNECTED)
+			goto out_valid;
 		shrink_dcache_parent(dentry);
 	}
 	d_drop(dentry);
@@ -1025,12 +1027,12 @@
 				res = NULL;
 				goto out;
 			/* This turned out not to be a regular file */
+			case -EISDIR:
 			case -ENOTDIR:
 				goto no_open;
 			case -ELOOP:
 				if (!(nd->intent.open.flags & O_NOFOLLOW))
 					goto no_open;
-			/* case -EISDIR: */
 			/* case -EINVAL: */
 			default:
 				goto out;
@@ -1797,7 +1799,7 @@
 	cache = nfs_access_search_rbtree(inode, cred);
 	if (cache == NULL)
 		goto out;
-	if (!nfs_have_delegation(inode, FMODE_READ) &&
+	if (!nfs_have_delegated_attributes(inode) &&
 	    !time_in_range_open(jiffies, cache->jiffies, cache->jiffies + nfsi->attrtimeo))
 		goto out_stale;
 	res->jiffies = cache->jiffies;
--- linux-mvl-dove-2.6.32.orig/fs/nfs/dns_resolve.c
+++ linux-mvl-dove-2.6.32/fs/nfs/dns_resolve.c
@@ -36,6 +36,19 @@
 };
 
 
+static void nfs_dns_ent_update(struct cache_head *cnew,
+		struct cache_head *ckey)
+{
+	struct nfs_dns_ent *new;
+	struct nfs_dns_ent *key;
+
+	new = container_of(cnew, struct nfs_dns_ent, h);
+	key = container_of(ckey, struct nfs_dns_ent, h);
+
+	memcpy(&new->addr, &key->addr, key->addrlen);
+	new->addrlen = key->addrlen;
+}
+
 static void nfs_dns_ent_init(struct cache_head *cnew,
 		struct cache_head *ckey)
 {
@@ -49,8 +62,7 @@
 	new->hostname = kstrndup(key->hostname, key->namelen, GFP_KERNEL);
 	if (new->hostname) {
 		new->namelen = key->namelen;
-		memcpy(&new->addr, &key->addr, key->addrlen);
-		new->addrlen = key->addrlen;
+		nfs_dns_ent_update(cnew, ckey);
 	} else {
 		new->namelen = 0;
 		new->addrlen = 0;
@@ -234,7 +246,7 @@
 	.cache_show = nfs_dns_show,
 	.match = nfs_dns_match,
 	.init = nfs_dns_ent_init,
-	.update = nfs_dns_ent_init,
+	.update = nfs_dns_ent_update,
 	.alloc = nfs_dns_ent_alloc,
 };
 
--- linux-mvl-dove-2.6.32.orig/fs/nfs/write.c
+++ linux-mvl-dove-2.6.32/fs/nfs/write.c
@@ -1485,7 +1485,6 @@
 static int nfs_write_mapping(struct address_space *mapping, int how)
 {
 	struct writeback_control wbc = {
-		.bdi = mapping->backing_dev_info,
 		.sync_mode = WB_SYNC_ALL,
 		.nr_to_write = LONG_MAX,
 		.range_start = 0,
@@ -1514,7 +1513,6 @@
 	loff_t range_start = page_offset(page);
 	loff_t range_end = range_start + (loff_t)(PAGE_CACHE_SIZE - 1);
 	struct writeback_control wbc = {
-		.bdi = page->mapping->backing_dev_info,
 		.sync_mode = WB_SYNC_ALL,
 		.nr_to_write = LONG_MAX,
 		.range_start = range_start,
@@ -1542,6 +1540,7 @@
 			break;
 		}
 		ret = nfs_wait_on_request(req);
+		nfs_release_request(req);
 		if (ret < 0)
 			goto out;
 	}
@@ -1558,7 +1557,6 @@
 	loff_t range_start = page_offset(page);
 	loff_t range_end = range_start + (loff_t)(PAGE_CACHE_SIZE - 1);
 	struct writeback_control wbc = {
-		.bdi = page->mapping->backing_dev_info,
 		.sync_mode = WB_SYNC_ALL,
 		.nr_to_write = LONG_MAX,
 		.range_start = range_start,
@@ -1612,15 +1610,16 @@
 	if (ret)
 		goto out_unlock;
 	page_cache_get(newpage);
+	spin_lock(&mapping->host->i_lock);
 	req->wb_page = newpage;
 	SetPagePrivate(newpage);
-	set_page_private(newpage, page_private(page));
+	set_page_private(newpage, (unsigned long)req);
 	ClearPagePrivate(page);
 	set_page_private(page, 0);
+	spin_unlock(&mapping->host->i_lock);
 	page_cache_release(page);
 out_unlock:
 	nfs_clear_page_tag_locked(req);
-	nfs_release_request(req);
 out:
 	return ret;
 }
--- linux-mvl-dove-2.6.32.orig/fs/nfs/direct.c
+++ linux-mvl-dove-2.6.32/fs/nfs/direct.c
@@ -342,6 +342,7 @@
 		data->res.fattr = &data->fattr;
 		data->res.eof = 0;
 		data->res.count = bytes;
+		nfs_fattr_init(&data->fattr);
 		msg.rpc_argp = &data->args;
 		msg.rpc_resp = &data->res;
 
@@ -400,15 +401,18 @@
 		pos += vec->iov_len;
 	}
 
+	/*
+	 * If no bytes were started, return the error, and let the
+	 * generic layer handle the completion.
+	 */
+	if (requested_bytes == 0) {
+		nfs_direct_req_release(dreq);
+		return result < 0 ? result : -EIO;
+	}
+
 	if (put_dreq(dreq))
 		nfs_direct_complete(dreq);
-
-	if (requested_bytes != 0)
-		return 0;
-
-	if (result < 0)
-		return result;
-	return -EIO;
+	return 0;
 }
 
 static ssize_t nfs_direct_read(struct kiocb *iocb, const struct iovec *iov,
@@ -575,6 +579,7 @@
 	data->res.count = 0;
 	data->res.fattr = &data->fattr;
 	data->res.verf = &data->verf;
+	nfs_fattr_init(&data->fattr);
 
 	NFS_PROTO(data->inode)->commit_setup(data, &msg);
 
@@ -766,6 +771,7 @@
 		data->res.fattr = &data->fattr;
 		data->res.count = bytes;
 		data->res.verf = &data->verf;
+		nfs_fattr_init(&data->fattr);
 
 		task_setup_data.task = &data->task;
 		task_setup_data.callback_data = data;
@@ -826,15 +832,18 @@
 		pos += vec->iov_len;
 	}
 
+	/*
+	 * If no bytes were started, return the error, and let the
+	 * generic layer handle the completion.
+	 */
+	if (requested_bytes == 0) {
+		nfs_direct_req_release(dreq);
+		return result < 0 ? result : -EIO;
+	}
+
 	if (put_dreq(dreq))
 		nfs_direct_write_complete(dreq, dreq->inode);
-
-	if (requested_bytes != 0)
-		return 0;
-
-	if (result < 0)
-		return result;
-	return -EIO;
+	return 0;
 }
 
 static ssize_t nfs_direct_write(struct kiocb *iocb, const struct iovec *iov,
--- linux-mvl-dove-2.6.32.orig/fs/nfs/fscache.c
+++ linux-mvl-dove-2.6.32/fs/nfs/fscache.c
@@ -354,12 +354,11 @@
  */
 int nfs_fscache_release_page(struct page *page, gfp_t gfp)
 {
-	struct nfs_inode *nfsi = NFS_I(page->mapping->host);
-	struct fscache_cookie *cookie = nfsi->fscache;
-
-	BUG_ON(!cookie);
-
 	if (PageFsCache(page)) {
+		struct nfs_inode *nfsi = NFS_I(page->mapping->host);
+		struct fscache_cookie *cookie = nfsi->fscache;
+
+		BUG_ON(!cookie);
 		dfprintk(FSCACHE, "NFS: fscache releasepage (0x%p/0x%p/0x%p)\n",
 			 cookie, page, nfsi);
 
--- linux-mvl-dove-2.6.32.orig/fs/befs/linuxvfs.c
+++ linux-mvl-dove-2.6.32/fs/befs/linuxvfs.c
@@ -873,6 +873,7 @@
 	brelse(bh);
 
       unacquire_priv_sbp:
+	kfree(befs_sb->mount_opts.iocharset);
 	kfree(sb->s_fs_info);
 
       unacquire_none:
--- linux-mvl-dove-2.6.32.orig/fs/jbd/journal.c
+++ linux-mvl-dove-2.6.32/fs/jbd/journal.c
@@ -435,9 +435,12 @@
 int __log_start_commit(journal_t *journal, tid_t target)
 {
 	/*
-	 * Are we already doing a recent enough commit?
+	 * The only transaction we can possibly wait upon is the
+	 * currently running transaction (if it exists).  Otherwise,
+	 * the target tid must be an old one.
 	 */
-	if (!tid_geq(journal->j_commit_request, target)) {
+	if (journal->j_running_transaction &&
+	    journal->j_running_transaction->t_tid == target) {
 		/*
 		 * We want a new commit: OK, mark the request and wakup the
 		 * commit thread.  We do _not_ do the commit ourselves.
@@ -449,7 +452,14 @@
 			  journal->j_commit_sequence);
 		wake_up(&journal->j_wait_commit);
 		return 1;
-	}
+	} else if (!tid_geq(journal->j_commit_request, target))
+		/* This should never happen, but if it does, preserve
+		   the evidence before kjournald goes into a loop and
+		   increments j_commit_sequence beyond all recognition. */
+		WARN_ONCE(1, "jbd: bad log_start_commit: %u %u %u %u\n",
+		    journal->j_commit_request, journal->j_commit_sequence,
+		    target, journal->j_running_transaction ?
+		    journal->j_running_transaction->t_tid : 0);
 	return 0;
 }
 
@@ -1913,7 +1923,7 @@
 {
 	jbd_debugfs_dir = debugfs_create_dir("jbd", NULL);
 	if (jbd_debugfs_dir)
-		jbd_debug = debugfs_create_u8("jbd-debug", S_IRUGO,
+		jbd_debug = debugfs_create_u8("jbd-debug", S_IRUGO | S_IWUSR,
 					       jbd_debugfs_dir,
 					       &journal_enable_debug);
 }
--- linux-mvl-dove-2.6.32.orig/fs/jbd/commit.c
+++ linux-mvl-dove-2.6.32/fs/jbd/commit.c
@@ -746,8 +746,13 @@
                    required. */
 		JBUFFER_TRACE(jh, "file as BJ_Forget");
 		journal_file_buffer(jh, commit_transaction, BJ_Forget);
-		/* Wake up any transactions which were waiting for this
-		   IO to complete */
+		/*
+		 * Wake up any transactions which were waiting for this
+		 * IO to complete. The barrier must be here so that changes
+		 * by journal_file_buffer() take effect before wake_up_bit()
+		 * does the waitqueue check.
+		 */
+		smp_mb();
 		wake_up_bit(&bh->b_state, BH_Unshadow);
 		JBUFFER_TRACE(jh, "brelse shadowed buffer");
 		__brelse(bh);
--- linux-mvl-dove-2.6.32.orig/fs/9p/vfs_file.c
+++ linux-mvl-dove-2.6.32/fs/9p/vfs_file.c
@@ -114,7 +114,7 @@
 	P9_DPRINTK(P9_DEBUG_VFS, "filp: %p lock: %p\n", filp, fl);
 
 	/* No mandatory locks */
-	if (__mandatory_lock(inode))
+	if (__mandatory_lock(inode) && fl->fl_type != F_UNLCK)
 		return -ENOLCK;
 
 	if ((IS_SETLK(cmd) || IS_SETLKW(cmd)) && fl->fl_type != F_UNLCK) {
--- linux-mvl-dove-2.6.32.orig/fs/9p/vfs_super.c
+++ linux-mvl-dove-2.6.32/fs/9p/vfs_super.c
@@ -188,7 +188,8 @@
 
 	P9_DPRINTK(P9_DEBUG_VFS, " %p\n", s);
 
-	v9fs_dentry_release(s->s_root);	/* clunk root */
+	if (s->s_root)
+		v9fs_dentry_release(s->s_root);	/* clunk root */
 
 	kill_anon_super(s);
 
--- linux-mvl-dove-2.6.32.orig/fs/jffs2/gc.c
+++ linux-mvl-dove-2.6.32/fs/jffs2/gc.c
@@ -700,7 +700,8 @@
 	struct jffs2_raw_inode ri;
 	struct jffs2_node_frag *last_frag;
 	union jffs2_device_node dev;
-	char *mdata = NULL, mdatalen = 0;
+	char *mdata = NULL;
+	int mdatalen = 0;
 	uint32_t alloclen, ilen;
 	int ret;
 
--- linux-mvl-dove-2.6.32.orig/fs/notify/inotify/inotify_fsnotify.c
+++ linux-mvl-dove-2.6.32/fs/notify/inotify/inotify_fsnotify.c
@@ -28,6 +28,7 @@
 #include <linux/path.h> /* struct path */
 #include <linux/slab.h> /* kmem_* */
 #include <linux/types.h>
+#include <linux/sched.h>
 
 #include "inotify.h"
 
@@ -71,6 +72,9 @@
 			ret = 0;
 	}
 
+	if (entry->mask & IN_ONESHOT)
+		fsnotify_destroy_mark_by_entry(entry);
+
 	/*
 	 * If we hold the entry until after the event is on the queue
 	 * IN_IGNORED won't be able to pass this event in the queue
@@ -121,7 +125,7 @@
 	if (warned)
 		return 0;
 
-	warned = false;
+	warned = true;
 	entry = p;
 	ientry = container_of(entry, struct inotify_inode_mark_entry, fsn_entry);
 
@@ -146,6 +150,7 @@
 	idr_for_each(&group->inotify_data.idr, idr_callback, group);
 	idr_remove_all(&group->inotify_data.idr);
 	idr_destroy(&group->inotify_data.idr);
+	free_uid(group->inotify_data.user);
 }
 
 void inotify_free_event_priv(struct fsnotify_event_private_data *fsn_event_priv)
--- linux-mvl-dove-2.6.32.orig/fs/notify/inotify/inotify_user.c
+++ linux-mvl-dove-2.6.32/fs/notify/inotify/inotify_user.c
@@ -106,8 +106,11 @@
 {
 	__u32 mask;
 
-	/* everything should accept their own ignored and cares about children */
-	mask = (FS_IN_IGNORED | FS_EVENT_ON_CHILD);
+	/*
+	 * everything should accept their own ignored, cares about children,
+	 * and should receive events when the inode is unmounted
+	 */
+	mask = (FS_IN_IGNORED | FS_EVENT_ON_CHILD | FS_UNMOUNT);
 
 	/* mask off the flags used to open the fd */
 	mask |= (arg & (IN_ALL_EVENTS | IN_ONESHOT));
@@ -556,21 +559,24 @@
 	if (unlikely(!idr_pre_get(&group->inotify_data.idr, GFP_KERNEL)))
 		goto out_err;
 
+	/* we are putting the mark on the idr, take a reference */
+	fsnotify_get_mark(&tmp_ientry->fsn_entry);
+
 	spin_lock(&group->inotify_data.idr_lock);
 	ret = idr_get_new_above(&group->inotify_data.idr, &tmp_ientry->fsn_entry,
-				group->inotify_data.last_wd,
+				group->inotify_data.last_wd+1,
 				&tmp_ientry->wd);
 	spin_unlock(&group->inotify_data.idr_lock);
 	if (ret) {
+		/* we didn't get on the idr, drop the idr reference */
+		fsnotify_put_mark(&tmp_ientry->fsn_entry);
+
 		/* idr was out of memory allocate and try again */
 		if (ret == -EAGAIN)
 			goto retry;
 		goto out_err;
 	}
 
-	/* we put the mark on the idr, take a reference */
-	fsnotify_get_mark(&tmp_ientry->fsn_entry);
-
 	/* we are on the idr, now get on the inode */
 	ret = fsnotify_add_mark(&tmp_ientry->fsn_entry, group, inode);
 	if (ret) {
@@ -638,7 +644,7 @@
 
 	spin_lock_init(&group->inotify_data.idr_lock);
 	idr_init(&group->inotify_data.idr);
-	group->inotify_data.last_wd = 1;
+	group->inotify_data.last_wd = 0;
 	group->inotify_data.user = user;
 	group->inotify_data.fa = NULL;
 
--- linux-mvl-dove-2.6.32.orig/fs/ext4/ioctl.c
+++ linux-mvl-dove-2.6.32/fs/ext4/ioctl.c
@@ -92,6 +92,15 @@
 			flags &= ~EXT4_EXTENTS_FL;
 		}
 
+		if (flags & EXT4_EOFBLOCKS_FL) {
+			/* we don't support adding EOFBLOCKS flag */
+			if (!(oldflags & EXT4_EOFBLOCKS_FL)) {
+				err = -EOPNOTSUPP;
+				goto flags_out;
+			}
+		} else if (oldflags & EXT4_EOFBLOCKS_FL)
+			ext4_truncate(inode);
+
 		handle = ext4_journal_start(inode, 1);
 		if (IS_ERR(handle)) {
 			err = PTR_ERR(handle);
@@ -221,31 +230,39 @@
 		struct file *donor_filp;
 		int err;
 
+		if (!(filp->f_mode & FMODE_READ) ||
+		    !(filp->f_mode & FMODE_WRITE))
+			return -EBADF;
+
 		if (copy_from_user(&me,
 			(struct move_extent __user *)arg, sizeof(me)))
 			return -EFAULT;
+		me.moved_len = 0;
 
 		donor_filp = fget(me.donor_fd);
 		if (!donor_filp)
 			return -EBADF;
 
-		if (!capable(CAP_DAC_OVERRIDE)) {
-			if ((current->real_cred->fsuid != inode->i_uid) ||
-				!(inode->i_mode & S_IRUSR) ||
-				!(donor_filp->f_dentry->d_inode->i_mode &
-				S_IRUSR)) {
-				fput(donor_filp);
-				return -EACCES;
-			}
+		if (!(donor_filp->f_mode & FMODE_WRITE)) {
+			err = -EBADF;
+			goto mext_out;
 		}
 
+		err = mnt_want_write(filp->f_path.mnt);
+		if (err)
+			goto mext_out;
+
 		err = ext4_move_extents(filp, donor_filp, me.orig_start,
 					me.donor_start, me.len, &me.moved_len);
-		fput(donor_filp);
-
-		if (copy_to_user((struct move_extent *)arg, &me, sizeof(me)))
-			return -EFAULT;
+		mnt_drop_write(filp->f_path.mnt);
+		if (me.moved_len > 0)
+			file_remove_suid(donor_filp);
 
+		if (copy_to_user((struct move_extent __user *)arg,
+				 &me, sizeof(me)))
+			err = -EFAULT;
+mext_out:
+		fput(donor_filp);
 		return err;
 	}
 
@@ -356,7 +373,30 @@
 	case EXT4_IOC32_SETRSVSZ:
 		cmd = EXT4_IOC_SETRSVSZ;
 		break;
-	case EXT4_IOC_GROUP_ADD:
+	case EXT4_IOC32_GROUP_ADD: {
+		struct compat_ext4_new_group_input __user *uinput;
+		struct ext4_new_group_input input;
+		mm_segment_t old_fs;
+		int err;
+
+		uinput = compat_ptr(arg);
+		err = get_user(input.group, &uinput->group);
+		err |= get_user(input.block_bitmap, &uinput->block_bitmap);
+		err |= get_user(input.inode_bitmap, &uinput->inode_bitmap);
+		err |= get_user(input.inode_table, &uinput->inode_table);
+		err |= get_user(input.blocks_count, &uinput->blocks_count);
+		err |= get_user(input.reserved_blocks,
+				&uinput->reserved_blocks);
+		if (err)
+			return -EFAULT;
+		old_fs = get_fs();
+		set_fs(KERNEL_DS);
+		err = ext4_ioctl(file, EXT4_IOC_GROUP_ADD,
+				 (unsigned long) &input);
+		set_fs(old_fs);
+		return err;
+	}
+	case EXT4_IOC_MOVE_EXT:
 		break;
 	default:
 		return -ENOIOCTLCMD;
--- linux-mvl-dove-2.6.32.orig/fs/ext4/mballoc.h
+++ linux-mvl-dove-2.6.32/fs/ext4/mballoc.h
@@ -221,8 +221,6 @@
 #define EXT4_MB_BITMAP(e4b)	((e4b)->bd_bitmap)
 #define EXT4_MB_BUDDY(e4b)	((e4b)->bd_buddy)
 
-#define in_range(b, first, len)	((b) >= (first) && (b) <= (first) + (len) - 1)
-
 static inline ext4_fsblk_t ext4_grp_offs_to_block(struct super_block *sb,
 					struct ext4_free_extent *fex)
 {
--- linux-mvl-dove-2.6.32.orig/fs/ext4/ext4_jbd2.h
+++ linux-mvl-dove-2.6.32/fs/ext4/ext4_jbd2.h
@@ -49,7 +49,7 @@
 
 #define EXT4_DATA_TRANS_BLOCKS(sb)	(EXT4_SINGLEDATA_TRANS_BLOCKS(sb) + \
 					 EXT4_XATTR_TRANS_BLOCKS - 2 + \
-					 2*EXT4_QUOTA_TRANS_BLOCKS(sb))
+					 EXT4_MAXQUOTAS_TRANS_BLOCKS(sb))
 
 /*
  * Define the number of metadata blocks we need to account to modify data.
@@ -57,7 +57,7 @@
  * This include super block, inode block, quota blocks and xattr blocks
  */
 #define EXT4_META_TRANS_BLOCKS(sb)	(EXT4_XATTR_TRANS_BLOCKS + \
-					2*EXT4_QUOTA_TRANS_BLOCKS(sb))
+					EXT4_MAXQUOTAS_TRANS_BLOCKS(sb))
 
 /* Delete operations potentially hit one directory's namespace plus an
  * entire inode, plus arbitrary amounts of bitmap/indirection data.  Be
@@ -92,6 +92,7 @@
  * but inode, sb and group updates are done only once */
 #define EXT4_QUOTA_INIT_BLOCKS(sb) (test_opt(sb, QUOTA) ? (DQUOT_INIT_ALLOC*\
 		(EXT4_SINGLEDATA_TRANS_BLOCKS(sb)-3)+3+DQUOT_INIT_REWRITE) : 0)
+
 #define EXT4_QUOTA_DEL_BLOCKS(sb) (test_opt(sb, QUOTA) ? (DQUOT_DEL_ALLOC*\
 		(EXT4_SINGLEDATA_TRANS_BLOCKS(sb)-3)+3+DQUOT_DEL_REWRITE) : 0)
 #else
@@ -99,6 +100,9 @@
 #define EXT4_QUOTA_INIT_BLOCKS(sb) 0
 #define EXT4_QUOTA_DEL_BLOCKS(sb) 0
 #endif
+#define EXT4_MAXQUOTAS_TRANS_BLOCKS(sb) (MAXQUOTAS*EXT4_QUOTA_TRANS_BLOCKS(sb))
+#define EXT4_MAXQUOTAS_INIT_BLOCKS(sb) (MAXQUOTAS*EXT4_QUOTA_INIT_BLOCKS(sb))
+#define EXT4_MAXQUOTAS_DEL_BLOCKS(sb) (MAXQUOTAS*EXT4_QUOTA_DEL_BLOCKS(sb))
 
 int
 ext4_mark_iloc_dirty(handle_t *handle,
@@ -254,6 +258,19 @@
 	return 0;
 }
 
+static inline void ext4_update_inode_fsync_trans(handle_t *handle,
+						 struct inode *inode,
+						 int datasync)
+{
+	struct ext4_inode_info *ei = EXT4_I(inode);
+
+	if (ext4_handle_valid(handle)) {
+		ei->i_sync_tid = handle->h_transaction->t_tid;
+		if (datasync)
+			ei->i_datasync_tid = handle->h_transaction->t_tid;
+	}
+}
+
 /* super.c */
 int ext4_force_commit(struct super_block *sb);
 
@@ -265,7 +282,7 @@
 		return 1;
 	if (test_opt(inode->i_sb, DATA_FLAGS) == EXT4_MOUNT_JOURNAL_DATA)
 		return 1;
-	if (EXT4_I(inode)->i_flags & EXT4_JOURNAL_DATA_FL)
+	if (ext4_test_inode_flag(inode, EXT4_INODE_JOURNAL_DATA))
 		return 1;
 	return 0;
 }
@@ -276,7 +293,7 @@
 		return 0;
 	if (!S_ISREG(inode->i_mode))
 		return 0;
-	if (EXT4_I(inode)->i_flags & EXT4_JOURNAL_DATA_FL)
+	if (ext4_test_inode_flag(inode, EXT4_INODE_JOURNAL_DATA))
 		return 0;
 	if (test_opt(inode->i_sb, DATA_FLAGS) == EXT4_MOUNT_ORDERED_DATA)
 		return 1;
@@ -289,7 +306,7 @@
 		return 0;
 	if (EXT4_JOURNAL(inode) == NULL)
 		return 1;
-	if (EXT4_I(inode)->i_flags & EXT4_JOURNAL_DATA_FL)
+	if (ext4_test_inode_flag(inode, EXT4_INODE_JOURNAL_DATA))
 		return 0;
 	if (test_opt(inode->i_sb, DATA_FLAGS) == EXT4_MOUNT_WRITEBACK_DATA)
 		return 1;
--- linux-mvl-dove-2.6.32.orig/fs/ext4/balloc.c
+++ linux-mvl-dove-2.6.32/fs/ext4/balloc.c
@@ -189,9 +189,6 @@
  * when a file system is mounted (see ext4_fill_super).
  */
 
-
-#define in_range(b, first, len)	((b) >= (first) && (b) <= (first) + (len) - 1)
-
 /**
  * ext4_get_group_desc() -- load group descriptor from disk
  * @sb:			super block
@@ -761,7 +758,13 @@
 static unsigned long ext4_bg_num_gdb_nometa(struct super_block *sb,
 					ext4_group_t group)
 {
-	return ext4_bg_has_super(sb, group) ? EXT4_SB(sb)->s_gdb_count : 0;
+	if (!ext4_bg_has_super(sb, group))
+		return 0;
+
+	if (EXT4_HAS_INCOMPAT_FEATURE(sb,EXT4_FEATURE_INCOMPAT_META_BG))
+		return le32_to_cpu(EXT4_SB(sb)->s_es->s_first_meta_bg);
+	else
+		return EXT4_SB(sb)->s_gdb_count;
 }
 
 /**
--- linux-mvl-dove-2.6.32.orig/fs/ext4/extents.c
+++ linux-mvl-dove-2.6.32/fs/ext4/extents.c
@@ -107,11 +107,8 @@
 	if (err <= 0)
 		return err;
 	err = ext4_truncate_restart_trans(handle, inode, needed);
-	/*
-	 * We have dropped i_data_sem so someone might have cached again
-	 * an extent we are going to truncate.
-	 */
-	ext4_ext_invalidate_cache(inode);
+	if (err == 0)
+		err = -EAGAIN;
 
 	return err;
 }
@@ -296,29 +293,44 @@
  * to allocate @blocks
  * Worse case is one block per extent
  */
-int ext4_ext_calc_metadata_amount(struct inode *inode, int blocks)
+int ext4_ext_calc_metadata_amount(struct inode *inode, sector_t lblock)
 {
-	int lcap, icap, rcap, leafs, idxs, num;
-	int newextents = blocks;
+	struct ext4_inode_info *ei = EXT4_I(inode);
+	int idxs, num = 0;
 
-	rcap = ext4_ext_space_root_idx(inode, 0);
-	lcap = ext4_ext_space_block(inode, 0);
-	icap = ext4_ext_space_block_idx(inode, 0);
+	idxs = ((inode->i_sb->s_blocksize - sizeof(struct ext4_extent_header))
+		/ sizeof(struct ext4_extent_idx));
 
-	/* number of new leaf blocks needed */
-	num = leafs = (newextents + lcap - 1) / lcap;
+	/*
+	 * If the new delayed allocation block is contiguous with the
+	 * previous da block, it can share index blocks with the
+	 * previous block, so we only need to allocate a new index
+	 * block every idxs leaf blocks.  At ldxs**2 blocks, we need
+	 * an additional index block, and at ldxs**3 blocks, yet
+	 * another index blocks.
+	 */
+	if (ei->i_da_metadata_calc_len &&
+	    ei->i_da_metadata_calc_last_lblock+1 == lblock) {
+		if ((ei->i_da_metadata_calc_len % idxs) == 0)
+			num++;
+		if ((ei->i_da_metadata_calc_len % (idxs*idxs)) == 0)
+			num++;
+		if ((ei->i_da_metadata_calc_len % (idxs*idxs*idxs)) == 0) {
+			num++;
+			ei->i_da_metadata_calc_len = 0;
+		} else
+			ei->i_da_metadata_calc_len++;
+		ei->i_da_metadata_calc_last_lblock++;
+		return num;
+	}
 
 	/*
-	 * Worse case, we need separate index block(s)
-	 * to link all new leaf blocks
+	 * In the worst case we need a new set of index blocks at
+	 * every level of the inode's extent tree.
 	 */
-	idxs = (leafs + icap - 1) / icap;
-	do {
-		num += idxs;
-		idxs = (idxs + icap - 1) / icap;
-	} while (idxs > rcap);
-
-	return num;
+	ei->i_da_metadata_calc_len = 1;
+	ei->i_da_metadata_calc_last_lblock = lblock;
+	return ext_depth(inode) + 1;
 }
 
 static int
@@ -1761,7 +1773,9 @@
 	while (block < last && block != EXT_MAX_BLOCK) {
 		num = last - block;
 		/* find extent for this block */
+		down_read(&EXT4_I(inode)->i_data_sem);
 		path = ext4_ext_find_extent(inode, block, path);
+		up_read(&EXT4_I(inode)->i_data_sem);
 		if (IS_ERR(path)) {
 			err = PTR_ERR(path);
 			path = NULL;
@@ -1934,7 +1948,7 @@
 
 	BUG_ON(cex->ec_type != EXT4_EXT_CACHE_GAP &&
 			cex->ec_type != EXT4_EXT_CACHE_EXTENT);
-	if (block >= cex->ec_block && block < cex->ec_block + cex->ec_len) {
+	if (in_range(block, cex->ec_block, cex->ec_len)) {
 		ex->ee_block = cpu_to_le32(cex->ec_block);
 		ext4_ext_store_pblock(ex, cex->ec_start);
 		ex->ee_len = cpu_to_le16(cex->ec_len);
@@ -2074,7 +2088,7 @@
 		ext_debug("free last %u blocks starting %llu\n", num, start);
 		for (i = 0; i < num; i++) {
 			bh = sb_find_get_block(inode->i_sb, start + i);
-			ext4_forget(handle, 0, inode, bh, start + i);
+			ext4_forget(handle, metadata, inode, bh, start + i);
 		}
 		ext4_free_blocks(handle, inode, start, num, metadata);
 	} else if (from == le32_to_cpu(ex->ee_block)
@@ -2167,7 +2181,7 @@
 			correct_index = 1;
 			credits += (ext_depth(inode)) + 1;
 		}
-		credits += 2 * EXT4_QUOTA_TRANS_BLOCKS(inode->i_sb);
+		credits += EXT4_MAXQUOTAS_TRANS_BLOCKS(inode->i_sb);
 
 		err = ext4_ext_truncate_extend_restart(handle, inode, credits);
 		if (err)
@@ -2246,7 +2260,7 @@
 	int depth = ext_depth(inode);
 	struct ext4_ext_path *path;
 	handle_t *handle;
-	int i = 0, err = 0;
+	int i, err;
 
 	ext_debug("truncate since %u\n", start);
 
@@ -2255,23 +2269,26 @@
 	if (IS_ERR(handle))
 		return PTR_ERR(handle);
 
+again:
 	ext4_ext_invalidate_cache(inode);
 
 	/*
 	 * We start scanning from right side, freeing all the blocks
 	 * after i_size and walking into the tree depth-wise.
 	 */
+	depth = ext_depth(inode);
 	path = kzalloc(sizeof(struct ext4_ext_path) * (depth + 1), GFP_NOFS);
 	if (path == NULL) {
 		ext4_journal_stop(handle);
 		return -ENOMEM;
 	}
+	path[0].p_depth = depth;
 	path[0].p_hdr = ext_inode_hdr(inode);
 	if (ext4_ext_check(inode, path[0].p_hdr, depth)) {
 		err = -EIO;
 		goto out;
 	}
-	path[0].p_depth = depth;
+	i = err = 0;
 
 	while (i >= 0 && err == 0) {
 		if (i == depth) {
@@ -2365,6 +2382,8 @@
 out:
 	ext4_ext_drop_refs(path);
 	kfree(path);
+	if (err == -EAGAIN)
+		goto again;
 	ext4_journal_stop(handle);
 
 	return err;
@@ -2429,7 +2448,7 @@
 /* FIXME!! we need to try to merge to left or right after zero-out  */
 static int ext4_ext_zeroout(struct inode *inode, struct ext4_extent *ex)
 {
-	int ret = -EIO;
+	int ret;
 	struct bio *bio;
 	int blkbits, blocksize;
 	sector_t ee_pblock;
@@ -2453,6 +2472,9 @@
 			len = ee_len;
 
 		bio = bio_alloc(GFP_NOIO, len);
+		if (!bio)
+			return -ENOMEM;
+
 		bio->bi_sector = ee_pblock;
 		bio->bi_bdev   = inode->i_sb->s_bdev;
 
@@ -2480,17 +2502,15 @@
 		submit_bio(WRITE, bio);
 		wait_for_completion(&event);
 
-		if (test_bit(BIO_UPTODATE, &bio->bi_flags))
-			ret = 0;
-		else {
-			ret = -EIO;
-			break;
+		if (!test_bit(BIO_UPTODATE, &bio->bi_flags)) {
+			bio_put(bio);
+			return -EIO;
 		}
 		bio_put(bio);
 		ee_len    -= done;
 		ee_pblock += done  << (blkbits - 9);
 	}
-	return ret;
+	return 0;
 }
 
 #define EXT4_EXT_ZERO_LEN 7
@@ -2515,11 +2535,21 @@
 	struct ext4_extent *ex2 = NULL;
 	struct ext4_extent *ex3 = NULL;
 	struct ext4_extent_header *eh;
-	ext4_lblk_t ee_block;
+	ext4_lblk_t ee_block, eof_block;
 	unsigned int allocated, ee_len, depth;
 	ext4_fsblk_t newblock;
 	int err = 0;
 	int ret = 0;
+	int may_zeroout;
+
+	ext_debug("ext4_ext_convert_to_initialized: inode %lu, logical"
+		"block %llu, max_blocks %u\n", inode->i_ino,
+		(unsigned long long)iblock, max_blocks);
+
+	eof_block = (inode->i_size + inode->i_sb->s_blocksize - 1) >>
+		inode->i_sb->s_blocksize_bits;
+	if (eof_block < iblock + max_blocks)
+		eof_block = iblock + max_blocks;
 
 	depth = ext_depth(inode);
 	eh = path[depth].p_hdr;
@@ -2528,16 +2558,23 @@
 	ee_len = ext4_ext_get_actual_len(ex);
 	allocated = ee_len - (iblock - ee_block);
 	newblock = iblock - ee_block + ext_pblock(ex);
+
 	ex2 = ex;
 	orig_ex.ee_block = ex->ee_block;
 	orig_ex.ee_len   = cpu_to_le16(ee_len);
 	ext4_ext_store_pblock(&orig_ex, ext_pblock(ex));
 
+	/*
+	 * It is safe to convert extent to initialized via explicit
+	 * zeroout only if extent is fully insde i_size or new_size.
+	 */
+	may_zeroout = ee_block + ee_len <= eof_block;
+
 	err = ext4_ext_get_access(handle, inode, path + depth);
 	if (err)
 		goto out;
 	/* If extent has less than 2*EXT4_EXT_ZERO_LEN zerout directly */
-	if (ee_len <= 2*EXT4_EXT_ZERO_LEN) {
+	if (ee_len <= 2*EXT4_EXT_ZERO_LEN && may_zeroout) {
 		err =  ext4_ext_zeroout(inode, &orig_ex);
 		if (err)
 			goto fix_extent_len;
@@ -2568,7 +2605,7 @@
 	if (allocated > max_blocks) {
 		unsigned int newdepth;
 		/* If extent has less than EXT4_EXT_ZERO_LEN zerout directly */
-		if (allocated <= EXT4_EXT_ZERO_LEN) {
+		if (allocated <= EXT4_EXT_ZERO_LEN && may_zeroout) {
 			/*
 			 * iblock == ee_block is handled by the zerouout
 			 * at the beginning.
@@ -2644,7 +2681,7 @@
 		ex3->ee_len = cpu_to_le16(allocated - max_blocks);
 		ext4_ext_mark_uninitialized(ex3);
 		err = ext4_ext_insert_extent(handle, inode, path, ex3, 0);
-		if (err == -ENOSPC) {
+		if (err == -ENOSPC && may_zeroout) {
 			err =  ext4_ext_zeroout(inode, &orig_ex);
 			if (err)
 				goto fix_extent_len;
@@ -2668,8 +2705,10 @@
 		 * update the extent length after successful insert of the
 		 * split extent
 		 */
-		orig_ex.ee_len = cpu_to_le16(ee_len -
-						ext4_ext_get_actual_len(ex3));
+		ee_len -= ext4_ext_get_actual_len(ex3);
+		orig_ex.ee_len = cpu_to_le16(ee_len);
+		may_zeroout = ee_block + ee_len <= eof_block;
+
 		depth = newdepth;
 		ext4_ext_drop_refs(path);
 		path = ext4_ext_find_extent(inode, iblock, path);
@@ -2693,7 +2732,7 @@
 		 * otherwise give the extent a chance to merge to left
 		 */
 		if (le16_to_cpu(orig_ex.ee_len) <= EXT4_EXT_ZERO_LEN &&
-							iblock != ee_block) {
+			iblock != ee_block && may_zeroout) {
 			err =  ext4_ext_zeroout(inode, &orig_ex);
 			if (err)
 				goto fix_extent_len;
@@ -2762,7 +2801,7 @@
 	goto out;
 insert:
 	err = ext4_ext_insert_extent(handle, inode, path, &newex, 0);
-	if (err == -ENOSPC) {
+	if (err == -ENOSPC && may_zeroout) {
 		err =  ext4_ext_zeroout(inode, &orig_ex);
 		if (err)
 			goto fix_extent_len;
@@ -2822,14 +2861,21 @@
 	struct ext4_extent *ex2 = NULL;
 	struct ext4_extent *ex3 = NULL;
 	struct ext4_extent_header *eh;
-	ext4_lblk_t ee_block;
+	ext4_lblk_t ee_block, eof_block;
 	unsigned int allocated, ee_len, depth;
 	ext4_fsblk_t newblock;
 	int err = 0;
+	int may_zeroout;
+
+	ext_debug("ext4_split_unwritten_extents: inode %lu, logical"
+		"block %llu, max_blocks %u\n", inode->i_ino,
+		(unsigned long long)iblock, max_blocks);
+
+	eof_block = (inode->i_size + inode->i_sb->s_blocksize - 1) >>
+		inode->i_sb->s_blocksize_bits;
+	if (eof_block < iblock + max_blocks)
+		eof_block = iblock + max_blocks;
 
-	ext_debug("ext4_split_unwritten_extents: inode %lu,"
-		  "iblock %llu, max_blocks %u\n", inode->i_ino,
-		  (unsigned long long)iblock, max_blocks);
 	depth = ext_depth(inode);
 	eh = path[depth].p_hdr;
 	ex = path[depth].p_ext;
@@ -2837,12 +2883,19 @@
 	ee_len = ext4_ext_get_actual_len(ex);
 	allocated = ee_len - (iblock - ee_block);
 	newblock = iblock - ee_block + ext_pblock(ex);
+
 	ex2 = ex;
 	orig_ex.ee_block = ex->ee_block;
 	orig_ex.ee_len   = cpu_to_le16(ee_len);
 	ext4_ext_store_pblock(&orig_ex, ext_pblock(ex));
 
 	/*
+	 * It is safe to convert extent to initialized via explicit
+	 * zeroout only if extent is fully insde i_size or new_size.
+	 */
+	may_zeroout = ee_block + ee_len <= eof_block;
+
+	/*
  	 * If the uninitialized extent begins at the same logical
  	 * block where the write begins, and the write completely
  	 * covers the extent, then we don't need to split it.
@@ -2876,7 +2929,7 @@
 		ex3->ee_len = cpu_to_le16(allocated - max_blocks);
 		ext4_ext_mark_uninitialized(ex3);
 		err = ext4_ext_insert_extent(handle, inode, path, ex3, flags);
-		if (err == -ENOSPC) {
+		if (err == -ENOSPC && may_zeroout) {
 			err =  ext4_ext_zeroout(inode, &orig_ex);
 			if (err)
 				goto fix_extent_len;
@@ -2900,8 +2953,10 @@
 		 * update the extent length after successful insert of the
 		 * split extent
 		 */
-		orig_ex.ee_len = cpu_to_le16(ee_len -
-						ext4_ext_get_actual_len(ex3));
+		ee_len -= ext4_ext_get_actual_len(ex3);
+		orig_ex.ee_len = cpu_to_le16(ee_len);
+		may_zeroout = ee_block + ee_len <= eof_block;
+
 		depth = newdepth;
 		ext4_ext_drop_refs(path);
 		path = ext4_ext_find_extent(inode, iblock, path);
@@ -2947,7 +3002,7 @@
 	goto out;
 insert:
 	err = ext4_ext_insert_extent(handle, inode, path, &newex, flags);
-	if (err == -ENOSPC) {
+	if (err == -ENOSPC && may_zeroout) {
 		err =  ext4_ext_zeroout(inode, &orig_ex);
 		if (err)
 			goto fix_extent_len;
@@ -3027,6 +3082,14 @@
 	return err;
 }
 
+static void unmap_underlying_metadata_blocks(struct block_device *bdev,
+			sector_t block, int count)
+{
+	int i;
+	for (i = 0; i < count; i++)
+                unmap_underlying_metadata(bdev, block + i);
+}
+
 static int
 ext4_ext_handle_uninitialized_extents(handle_t *handle, struct inode *inode,
 			ext4_lblk_t iblock, unsigned int max_blocks,
@@ -3057,13 +3120,15 @@
 		if (io)
 			io->flag = DIO_AIO_UNWRITTEN;
 		else
-			EXT4_I(inode)->i_state |= EXT4_STATE_DIO_UNWRITTEN;
+			ext4_set_inode_state(inode, EXT4_STATE_DIO_UNWRITTEN);
 		goto out;
 	}
 	/* async DIO end_io complete, convert the filled extent to written */
 	if (flags == EXT4_GET_BLOCKS_DIO_CONVERT_EXT) {
 		ret = ext4_convert_unwritten_extents_dio(handle, inode,
 							path);
+		if (ret >= 0)
+			ext4_update_inode_fsync_trans(handle, inode, 1);
 		goto out2;
 	}
 	/* buffered IO case */
@@ -3091,6 +3156,8 @@
 	ret = ext4_ext_convert_to_initialized(handle, inode,
 						path, iblock,
 						max_blocks);
+	if (ret >= 0)
+		ext4_update_inode_fsync_trans(handle, inode, 1);
 out:
 	if (ret <= 0) {
 		err = ret;
@@ -3098,6 +3165,30 @@
 	} else
 		allocated = ret;
 	set_buffer_new(bh_result);
+	/*
+	 * if we allocated more blocks than requested
+	 * we need to make sure we unmap the extra block
+	 * allocated. The actual needed block will get
+	 * unmapped later when we find the buffer_head marked
+	 * new.
+	 */
+	if (allocated > max_blocks) {
+		unmap_underlying_metadata_blocks(inode->i_sb->s_bdev,
+					newblock + max_blocks,
+					allocated - max_blocks);
+		allocated = max_blocks;
+	}
+
+	/*
+	 * If we have done fallocate with the offset that is already
+	 * delayed allocated, we would have block reservation
+	 * and quota reservation done in the delayed write path.
+	 * But fallocate would have already updated quota and block
+	 * count for this offset. So cancel these reservation
+	 */
+	if (flags & EXT4_GET_BLOCKS_DELALLOC_RESERVE)
+		ext4_da_update_reserve_space(inode, allocated, 0);
+
 map_out:
 	set_buffer_mapped(bh_result);
 out1:
@@ -3138,9 +3229,9 @@
 {
 	struct ext4_ext_path *path = NULL;
 	struct ext4_extent_header *eh;
-	struct ext4_extent newex, *ex;
+	struct ext4_extent newex, *ex, *last_ex;
 	ext4_fsblk_t newblock;
-	int err = 0, depth, ret, cache_type;
+	int i, err = 0, depth, ret, cache_type;
 	unsigned int allocated = 0;
 	struct ext4_allocation_request ar;
 	ext4_io_end_t *io = EXT4_I(inode)->cur_aio_dio;
@@ -3190,7 +3281,13 @@
 	 * this situation is possible, though, _during_ tree modification;
 	 * this is why assert can't be put in ext4_ext_find_extent()
 	 */
-	BUG_ON(path[depth].p_ext == NULL && depth != 0);
+	if (path[depth].p_ext == NULL && depth != 0) {
+		ext4_error(inode->i_sb, __func__, "bad extent address "
+			   "inode: %lu, iblock: %lu, depth: %d",
+			   inode->i_ino, (unsigned long) iblock, depth);
+		err = -EIO;
+		goto out2;
+	}
 	eh = path[depth].p_hdr;
 
 	ex = path[depth].p_ext;
@@ -3205,7 +3302,7 @@
 		 */
 		ee_len = ext4_ext_get_actual_len(ex);
 		/* if found extent covers block, simply return it */
-		if (iblock >= ee_block && iblock < ee_block + ee_len) {
+		if (in_range(iblock, ee_block, ee_len)) {
 			newblock = iblock - ee_block + ee_start;
 			/* number of remaining blocks in the extent */
 			allocated = ee_len - (iblock - ee_block);
@@ -3309,9 +3406,35 @@
 			if (io)
 				io->flag = DIO_AIO_UNWRITTEN;
 			else
-				EXT4_I(inode)->i_state |=
-					EXT4_STATE_DIO_UNWRITTEN;;
+				ext4_set_inode_state(inode,
+						     EXT4_STATE_DIO_UNWRITTEN);
+		}
+	}
+
+	if (unlikely(ext4_test_inode_flag(inode, EXT4_INODE_EOFBLOCKS))) {
+		if (unlikely(!eh->eh_entries)) {
+			ext4_error(inode->i_sb, __func__,
+				   "inode#%lu, eh->eh_entries = 0 and "
+				   "EOFBLOCKS_FL set", inode->i_ino);
+			err = -EIO;
+			goto out2;
+		}
+		last_ex = EXT_LAST_EXTENT(eh);
+		/*
+		 * If the current leaf block was reached by looking at
+		 * the last index block all the way down the tree, and
+		 * we are extending the inode beyond the last extent
+		 * in the current leaf block, then clear the
+		 * EOFBLOCKS_FL flag.
+		 */
+		for (i = depth-1; i >= 0; i--) {
+			if (path[i].p_idx != EXT_LAST_INDEX(path[i].p_hdr))
+				break;
 		}
+		if ((i < 0) &&
+		    (iblock + ar.len > le32_to_cpu(last_ex->ee_block) +
+		     ext4_ext_get_actual_len(last_ex)))
+			ext4_clear_inode_flag(inode, EXT4_INODE_EOFBLOCKS);
 	}
 	err = ext4_ext_insert_extent(handle, inode, path, &newex, flags);
 	if (err) {
@@ -3327,12 +3450,27 @@
 	/* previous routine could use block we allocated */
 	newblock = ext_pblock(&newex);
 	allocated = ext4_ext_get_actual_len(&newex);
+	if (allocated > max_blocks)
+		allocated = max_blocks;
 	set_buffer_new(bh_result);
 
-	/* Cache only when it is _not_ an uninitialized extent */
-	if ((flags & EXT4_GET_BLOCKS_UNINIT_EXT) == 0)
+	/*
+	 * Update reserved blocks/metadata blocks after successful
+	 * block allocation which had been deferred till now.
+	 */
+	if (flags & EXT4_GET_BLOCKS_DELALLOC_RESERVE)
+		ext4_da_update_reserve_space(inode, allocated, 1);
+
+	/*
+	 * Cache the extent and update transaction to commit on fdatasync only
+	 * when it is _not_ an uninitialized extent.
+	 */
+	if ((flags & EXT4_GET_BLOCKS_UNINIT_EXT) == 0) {
 		ext4_ext_put_in_cache(inode, iblock, allocated, newblock,
 						EXT4_EXT_CACHE_EXTENT);
+		ext4_update_inode_fsync_trans(handle, inode, 1);
+	} else
+		ext4_update_inode_fsync_trans(handle, inode, 0);
 out:
 	if (allocated > max_blocks)
 		allocated = max_blocks;
@@ -3431,6 +3569,13 @@
 			i_size_write(inode, new_size);
 		if (new_size > EXT4_I(inode)->i_disksize)
 			ext4_update_i_disksize(inode, new_size);
+	} else {
+		/*
+		 * Mark that we allocate beyond EOF so the subsequent truncate
+		 * can proceed even if the new size is the same as i_size.
+		 */
+		if (new_size > i_size_read(inode))
+			ext4_set_inode_flag(inode, EXT4_INODE_EOFBLOCKS);
 	}
 
 }
@@ -3458,7 +3603,7 @@
 	 * currently supporting (pre)allocate mode for extent-based
 	 * files _only_
 	 */
-	if (!(EXT4_I(inode)->i_flags & EXT4_EXTENTS_FL))
+	if (!(ext4_test_inode_flag(inode, EXT4_INODE_EXTENTS)))
 		return -EOPNOTSUPP;
 
 	/* preallocation to directories is currently not supported */
@@ -3477,6 +3622,11 @@
 	 */
 	credits = ext4_chunk_trans_blocks(inode, max_blocks);
 	mutex_lock(&inode->i_mutex);
+	ret = inode_newsize_ok(inode, (len + offset));
+	if (ret) {
+		mutex_unlock(&inode->i_mutex);
+		return ret;
+	}
 retry:
 	while (ret >= 0 && ret < max_blocks) {
 		block = block + ret;
@@ -3535,7 +3685,7 @@
  * Returns 0 on success.
  */
 int ext4_convert_unwritten_extents(struct inode *inode, loff_t offset,
-				    loff_t len)
+				    ssize_t len)
 {
 	handle_t *handle;
 	ext4_lblk_t block;
@@ -3671,7 +3821,7 @@
 	int error = 0;
 
 	/* in-inode? */
-	if (EXT4_I(inode)->i_state & EXT4_STATE_XATTR) {
+	if (ext4_test_inode_state(inode, EXT4_STATE_XATTR)) {
 		struct ext4_iloc iloc;
 		int offset;	/* offset of xattr in inode */
 
@@ -3684,6 +3834,7 @@
 		physical += offset;
 		length = EXT4_SB(inode->i_sb)->s_inode_size - offset;
 		flags |= FIEMAP_EXTENT_DATA_INLINE;
+		brelse(iloc.bh);
 	} else { /* external block */
 		physical = EXT4_I(inode)->i_file_acl << blockbits;
 		length = inode->i_sb->s_blocksize;
@@ -3699,11 +3850,10 @@
 		__u64 start, __u64 len)
 {
 	ext4_lblk_t start_blk;
-	ext4_lblk_t len_blks;
 	int error = 0;
 
 	/* fallback to generic here if not in extents fmt */
-	if (!(EXT4_I(inode)->i_flags & EXT4_EXTENTS_FL))
+	if (!(ext4_test_inode_flag(inode, EXT4_INODE_EXTENTS)))
 		return generic_block_fiemap(inode, fieinfo, start, len,
 			ext4_get_block);
 
@@ -3713,17 +3863,21 @@
 	if (fieinfo->fi_flags & FIEMAP_FLAG_XATTR) {
 		error = ext4_xattr_fiemap(inode, fieinfo);
 	} else {
+		ext4_lblk_t len_blks;
+		__u64 last_blk;
+
 		start_blk = start >> inode->i_sb->s_blocksize_bits;
-		len_blks = len >> inode->i_sb->s_blocksize_bits;
+		last_blk = (start + len - 1) >> inode->i_sb->s_blocksize_bits;
+		if (last_blk >= EXT_MAX_BLOCK)
+			last_blk = EXT_MAX_BLOCK-1;
+		len_blks = ((ext4_lblk_t) last_blk) - start_blk + 1;
 
 		/*
 		 * Walk the extent tree gathering extent information.
 		 * ext4_ext_fiemap_cb will push extents back to user.
 		 */
-		down_read(&EXT4_I(inode)->i_data_sem);
 		error = ext4_ext_walk_space(inode, start_blk, len_blks,
 					  ext4_ext_fiemap_cb, fieinfo);
-		up_read(&EXT4_I(inode)->i_data_sem);
 	}
 
 	return error;
--- linux-mvl-dove-2.6.32.orig/fs/ext4/xattr.c
+++ linux-mvl-dove-2.6.32/fs/ext4/xattr.c
@@ -267,7 +267,7 @@
 	void *end;
 	int error;
 
-	if (!(EXT4_I(inode)->i_state & EXT4_STATE_XATTR))
+	if (!ext4_test_inode_state(inode, EXT4_STATE_XATTR))
 		return -ENODATA;
 	error = ext4_get_inode_loc(inode, &iloc);
 	if (error)
@@ -393,7 +393,7 @@
 	void *end;
 	int error;
 
-	if (!(EXT4_I(inode)->i_state & EXT4_STATE_XATTR))
+	if (!ext4_test_inode_state(inode, EXT4_STATE_XATTR))
 		return 0;
 	error = ext4_get_inode_loc(inode, &iloc);
 	if (error)
@@ -816,7 +816,7 @@
 						EXT4_I(inode)->i_block_group);
 
 			/* non-extent files can't have physical blocks past 2^32 */
-			if (!(EXT4_I(inode)->i_flags & EXT4_EXTENTS_FL))
+			if (!(ext4_test_inode_flag(inode, EXT4_INODE_EXTENTS)))
 				goal = goal & EXT4_MAX_BLOCK_FILE_PHYS;
 
 			block = ext4_new_meta_blocks(handle, inode,
@@ -824,7 +824,7 @@
 			if (error)
 				goto cleanup;
 
-			if (!(EXT4_I(inode)->i_flags & EXT4_EXTENTS_FL))
+			if (!(ext4_test_inode_flag(inode, EXT4_INODE_EXTENTS)))
 				BUG_ON(block > EXT4_MAX_BLOCK_FILE_PHYS);
 
 			ea_idebug(inode, "creating block %d", block);
@@ -903,7 +903,7 @@
 	is->s.base = is->s.first = IFIRST(header);
 	is->s.here = is->s.first;
 	is->s.end = (void *)raw_inode + EXT4_SB(inode->i_sb)->s_inode_size;
-	if (EXT4_I(inode)->i_state & EXT4_STATE_XATTR) {
+	if (ext4_test_inode_state(inode, EXT4_STATE_XATTR)) {
 		error = ext4_xattr_check_names(IFIRST(header), is->s.end);
 		if (error)
 			return error;
@@ -935,10 +935,10 @@
 	header = IHDR(inode, ext4_raw_inode(&is->iloc));
 	if (!IS_LAST_ENTRY(s->first)) {
 		header->h_magic = cpu_to_le32(EXT4_XATTR_MAGIC);
-		EXT4_I(inode)->i_state |= EXT4_STATE_XATTR;
+		ext4_set_inode_state(inode, EXT4_STATE_XATTR);
 	} else {
 		header->h_magic = cpu_to_le32(0);
-		EXT4_I(inode)->i_state &= ~EXT4_STATE_XATTR;
+		ext4_clear_inode_state(inode, EXT4_STATE_XATTR);
 	}
 	return 0;
 }
@@ -981,17 +981,21 @@
 	if (strlen(name) > 255)
 		return -ERANGE;
 	down_write(&EXT4_I(inode)->xattr_sem);
-	no_expand = EXT4_I(inode)->i_state & EXT4_STATE_NO_EXPAND;
-	EXT4_I(inode)->i_state |= EXT4_STATE_NO_EXPAND;
+	no_expand = ext4_test_inode_state(inode, EXT4_STATE_NO_EXPAND);
+	ext4_set_inode_state(inode, EXT4_STATE_NO_EXPAND);
 
 	error = ext4_get_inode_loc(inode, &is.iloc);
 	if (error)
 		goto cleanup;
 
-	if (EXT4_I(inode)->i_state & EXT4_STATE_NEW) {
+	error = ext4_journal_get_write_access(handle, is.iloc.bh);
+	if (error)
+		goto cleanup;
+
+	if (ext4_test_inode_state(inode, EXT4_STATE_NEW)) {
 		struct ext4_inode *raw_inode = ext4_raw_inode(&is.iloc);
 		memset(raw_inode, 0, EXT4_SB(inode->i_sb)->s_inode_size);
-		EXT4_I(inode)->i_state &= ~EXT4_STATE_NEW;
+		ext4_clear_inode_state(inode, EXT4_STATE_NEW);
 	}
 
 	error = ext4_xattr_ibody_find(inode, &i, &is);
@@ -1013,9 +1017,6 @@
 		if (flags & XATTR_CREATE)
 			goto cleanup;
 	}
-	error = ext4_journal_get_write_access(handle, is.iloc.bh);
-	if (error)
-		goto cleanup;
 	if (!value) {
 		if (!is.s.not_found)
 			error = ext4_xattr_ibody_set(handle, inode, &i, &is);
@@ -1046,7 +1047,7 @@
 		ext4_xattr_update_super_block(handle, inode->i_sb);
 		inode->i_ctime = ext4_current_time(inode);
 		if (!value)
-			EXT4_I(inode)->i_state &= ~EXT4_STATE_NO_EXPAND;
+			ext4_clear_inode_state(inode, EXT4_STATE_NO_EXPAND);
 		error = ext4_mark_iloc_dirty(handle, inode, &is.iloc);
 		/*
 		 * The bh is consumed by ext4_mark_iloc_dirty, even with
@@ -1061,7 +1062,7 @@
 	brelse(is.iloc.bh);
 	brelse(bs.bh);
 	if (no_expand == 0)
-		EXT4_I(inode)->i_state &= ~EXT4_STATE_NO_EXPAND;
+		ext4_clear_inode_state(inode, EXT4_STATE_NO_EXPAND);
 	up_write(&EXT4_I(inode)->xattr_sem);
 	return error;
 }
@@ -1326,6 +1327,8 @@
 			goto cleanup;
 		kfree(b_entry_name);
 		kfree(buffer);
+		b_entry_name = NULL;
+		buffer = NULL;
 		brelse(is->iloc.bh);
 		kfree(is);
 		kfree(bs);
--- linux-mvl-dove-2.6.32.orig/fs/ext4/inode.c
+++ linux-mvl-dove-2.6.32/fs/ext4/inode.c
@@ -957,7 +957,7 @@
 	int count = 0;
 	ext4_fsblk_t first_block = 0;
 
-	J_ASSERT(!(EXT4_I(inode)->i_flags & EXT4_EXTENTS_FL));
+	J_ASSERT(!(ext4_test_inode_flag(inode, EXT4_INODE_EXTENTS)));
 	J_ASSERT(handle != NULL || (flags & EXT4_GET_BLOCKS_CREATE) == 0);
 	depth = ext4_block_to_path(inode, iblock, offsets,
 				   &blocks_to_boundary);
@@ -1021,10 +1021,12 @@
 	if (!err)
 		err = ext4_splice_branch(handle, inode, iblock,
 					 partial, indirect_blks, count);
-	else
+	if (err)
 		goto cleanup;
 
 	set_buffer_new(bh_result);
+
+	ext4_update_inode_fsync_trans(handle, inode, 1);
 got_it:
 	map_bh(bh_result, inode->i_sb, le32_to_cpu(chain[depth-1].key));
 	if (count > blocks_to_boundary)
@@ -1043,92 +1045,121 @@
 	return err;
 }
 
-qsize_t ext4_get_reserved_space(struct inode *inode)
+#ifdef CONFIG_QUOTA
+qsize_t *ext4_get_reserved_space(struct inode *inode)
 {
-	unsigned long long total;
-
-	spin_lock(&EXT4_I(inode)->i_block_reservation_lock);
-	total = EXT4_I(inode)->i_reserved_data_blocks +
-		EXT4_I(inode)->i_reserved_meta_blocks;
-	spin_unlock(&EXT4_I(inode)->i_block_reservation_lock);
-
-	return total;
+	return &EXT4_I(inode)->i_reserved_quota;
 }
+#endif
+
 /*
  * Calculate the number of metadata blocks need to reserve
- * to allocate @blocks for non extent file based file
+ * to allocate a new block at @lblocks for non extent file based file
  */
-static int ext4_indirect_calc_metadata_amount(struct inode *inode, int blocks)
+static int ext4_indirect_calc_metadata_amount(struct inode *inode,
+					      sector_t lblock)
 {
-	int icap = EXT4_ADDR_PER_BLOCK(inode->i_sb);
-	int ind_blks, dind_blks, tind_blks;
-
-	/* number of new indirect blocks needed */
-	ind_blks = (blocks + icap - 1) / icap;
+	struct ext4_inode_info *ei = EXT4_I(inode);
+	sector_t dind_mask = ~((sector_t)EXT4_ADDR_PER_BLOCK(inode->i_sb) - 1);
+	int blk_bits;
 
-	dind_blks = (ind_blks + icap - 1) / icap;
+	if (lblock < EXT4_NDIR_BLOCKS)
+		return 0;
 
-	tind_blks = 1;
+	lblock -= EXT4_NDIR_BLOCKS;
 
-	return ind_blks + dind_blks + tind_blks;
+	if (ei->i_da_metadata_calc_len &&
+	    (lblock & dind_mask) == ei->i_da_metadata_calc_last_lblock) {
+		ei->i_da_metadata_calc_len++;
+		return 0;
+	}
+	ei->i_da_metadata_calc_last_lblock = lblock & dind_mask;
+	ei->i_da_metadata_calc_len = 1;
+	blk_bits = order_base_2(lblock);
+	return (blk_bits / EXT4_ADDR_PER_BLOCK_BITS(inode->i_sb)) + 1;
 }
 
 /*
  * Calculate the number of metadata blocks need to reserve
- * to allocate given number of blocks
+ * to allocate a block located at @lblock
  */
-static int ext4_calc_metadata_amount(struct inode *inode, int blocks)
+static int ext4_calc_metadata_amount(struct inode *inode, sector_t lblock)
 {
-	if (!blocks)
-		return 0;
-
-	if (EXT4_I(inode)->i_flags & EXT4_EXTENTS_FL)
-		return ext4_ext_calc_metadata_amount(inode, blocks);
+	if (ext4_test_inode_flag(inode, EXT4_INODE_EXTENTS))
+		return ext4_ext_calc_metadata_amount(inode, lblock);
 
-	return ext4_indirect_calc_metadata_amount(inode, blocks);
+	return ext4_indirect_calc_metadata_amount(inode, lblock);
 }
 
-static void ext4_da_update_reserve_space(struct inode *inode, int used)
+/*
+ * Called with i_data_sem down, which is important since we can call
+ * ext4_discard_preallocations() from here.
+ */
+void ext4_da_update_reserve_space(struct inode *inode,
+					int used, int quota_claim)
 {
 	struct ext4_sb_info *sbi = EXT4_SB(inode->i_sb);
-	int total, mdb, mdb_free;
+	struct ext4_inode_info *ei = EXT4_I(inode);
+	int mdb_free = 0, allocated_meta_blocks = 0;
 
-	spin_lock(&EXT4_I(inode)->i_block_reservation_lock);
-	/* recalculate the number of metablocks still need to be reserved */
-	total = EXT4_I(inode)->i_reserved_data_blocks - used;
-	mdb = ext4_calc_metadata_amount(inode, total);
-
-	/* figure out how many metablocks to release */
-	BUG_ON(mdb > EXT4_I(inode)->i_reserved_meta_blocks);
-	mdb_free = EXT4_I(inode)->i_reserved_meta_blocks - mdb;
-
-	if (mdb_free) {
-		/* Account for allocated meta_blocks */
-		mdb_free -= EXT4_I(inode)->i_allocated_meta_blocks;
+	spin_lock(&ei->i_block_reservation_lock);
+	if (unlikely(used > ei->i_reserved_data_blocks)) {
+		ext4_msg(inode->i_sb, KERN_NOTICE, "%s: ino %lu, used %d "
+			 "with only %d reserved data blocks\n",
+			 __func__, inode->i_ino, used,
+			 ei->i_reserved_data_blocks);
+		WARN_ON(1);
+		used = ei->i_reserved_data_blocks;
+	}
+
+	/* Update per-inode reservations */
+	ei->i_reserved_data_blocks -= used;
+	used += ei->i_allocated_meta_blocks;
+	ei->i_reserved_meta_blocks -= ei->i_allocated_meta_blocks;
+	allocated_meta_blocks = ei->i_allocated_meta_blocks;
+	ei->i_allocated_meta_blocks = 0;
+	percpu_counter_sub(&sbi->s_dirtyblocks_counter, used);
 
-		/* update fs dirty blocks counter */
+	if (ei->i_reserved_data_blocks == 0) {
+		/*
+		 * We can release all of the reserved metadata blocks
+		 * only when we have written all of the delayed
+		 * allocation blocks.
+		 */
+		mdb_free = ei->i_reserved_meta_blocks;
+		ei->i_reserved_meta_blocks = 0;
+		ei->i_da_metadata_calc_len = 0;
 		percpu_counter_sub(&sbi->s_dirtyblocks_counter, mdb_free);
-		EXT4_I(inode)->i_allocated_meta_blocks = 0;
-		EXT4_I(inode)->i_reserved_meta_blocks = mdb;
 	}
-
-	/* update per-inode reservations */
-	BUG_ON(used  > EXT4_I(inode)->i_reserved_data_blocks);
-	EXT4_I(inode)->i_reserved_data_blocks -= used;
 	spin_unlock(&EXT4_I(inode)->i_block_reservation_lock);
 
-	/*
-	 * free those over-booking quota for metadata blocks
-	 */
-	if (mdb_free)
-		vfs_dq_release_reservation_block(inode, mdb_free);
+	/* Update quota subsystem */
+	if (quota_claim) {
+		vfs_dq_claim_block(inode, used);
+		if (mdb_free)
+			vfs_dq_release_reservation_block(inode, mdb_free);
+	} else {
+		/*
+		 * We did fallocate with an offset that is already delayed
+		 * allocated. So on delayed allocated writeback we should
+		 * not update the quota for allocated blocks. But then
+		 * converting an fallocate region to initialized region would
+		 * have caused a metadata allocation. So claim quota for
+		 * that
+		 */
+		if (allocated_meta_blocks)
+			vfs_dq_claim_block(inode, allocated_meta_blocks);
+		vfs_dq_release_reservation_block(inode, mdb_free + used -
+						allocated_meta_blocks);
+	}
 
 	/*
 	 * If we have done all the pending block allocations and if
 	 * there aren't any writers on the inode, we can discard the
 	 * inode's preallocations.
 	 */
-	if (!total && (atomic_read(&inode->i_writecount) == 0))
+	if ((ei->i_reserved_data_blocks == 0) &&
+	    (atomic_read(&inode->i_writecount) == 0))
 		ext4_discard_preallocations(inode);
 }
 
@@ -1243,7 +1274,7 @@
 	 * file system block.
 	 */
 	down_read((&EXT4_I(inode)->i_data_sem));
-	if (EXT4_I(inode)->i_flags & EXT4_EXTENTS_FL) {
+	if (ext4_test_inode_flag(inode, EXT4_INODE_EXTENTS)) {
 		retval =  ext4_ext_get_blocks(handle, inode, block, max_blocks,
 				bh, 0);
 	} else {
@@ -1305,7 +1336,7 @@
 	 * We need to check for EXT4 here because migrate
 	 * could have changed the inode type in between
 	 */
-	if (EXT4_I(inode)->i_flags & EXT4_EXTENTS_FL) {
+	if (ext4_test_inode_flag(inode, EXT4_INODE_EXTENTS)) {
 		retval =  ext4_ext_get_blocks(handle, inode, block, max_blocks,
 					      bh, flags);
 	} else {
@@ -1318,20 +1349,22 @@
 			 * i_data's format changing.  Force the migrate
 			 * to fail by clearing migrate flags
 			 */
-			EXT4_I(inode)->i_state &= ~EXT4_STATE_EXT_MIGRATE;
+			ext4_clear_inode_state(inode, EXT4_STATE_EXT_MIGRATE);
 		}
-	}
 
+		/*
+		 * Update reserved blocks/metadata blocks after successful
+		 * block allocation which had been deferred till now. We don't
+		 * support fallocate for non extent files. So we can update
+		 * reserve space here.
+		 */
+		if ((retval > 0) &&
+			(flags & EXT4_GET_BLOCKS_DELALLOC_RESERVE))
+			ext4_da_update_reserve_space(inode, retval, 1);
+	}
 	if (flags & EXT4_GET_BLOCKS_DELALLOC_RESERVE)
 		EXT4_I(inode)->i_delalloc_reserved_flag = 0;
 
-	/*
-	 * Update reserved blocks/metadata blocks after successful
-	 * block allocation which had been deferred till now.
-	 */
-	if ((retval > 0) && (flags & EXT4_GET_BLOCKS_UPDATE_RESERVE_SPACE))
-		ext4_da_update_reserve_space(inode, retval);
-
 	up_write((&EXT4_I(inode)->i_data_sem));
 	if (retval > 0 && buffer_mapped(bh)) {
 		int ret = check_block_validity(inode, "file system "
@@ -1534,6 +1567,16 @@
 	return ext4_journal_get_write_access(handle, bh);
 }
 
+/*
+ * Truncate blocks that were not used by write. We have to truncate the
+ * pagecache as well so that corresponding buffers get properly unmapped.
+ */
+static void ext4_truncate_failed_write(struct inode *inode)
+{
+	truncate_inode_pages(inode->i_mapping, inode->i_size);
+	ext4_truncate(inode);
+}
+
 static int ext4_write_begin(struct file *file, struct address_space *mapping,
 			    loff_t pos, unsigned len, unsigned flags,
 			    struct page **pagep, void **fsdata)
@@ -1599,7 +1642,7 @@
 
 		ext4_journal_stop(handle);
 		if (pos + len > inode->i_size) {
-			ext4_truncate(inode);
+			ext4_truncate_failed_write(inode);
 			/*
 			 * If truncate failed early the inode might
 			 * still be on the orphan list; we need to
@@ -1709,7 +1752,7 @@
 		ret = ret2;
 
 	if (pos + len > inode->i_size) {
-		ext4_truncate(inode);
+		ext4_truncate_failed_write(inode);
 		/*
 		 * If truncate failed early the inode might still be
 		 * on the orphan list; we need to make sure the inode
@@ -1751,7 +1794,7 @@
 		ret = ret2;
 
 	if (pos + len > inode->i_size) {
-		ext4_truncate(inode);
+		ext4_truncate_failed_write(inode);
 		/*
 		 * If truncate failed early the inode might still be
 		 * on the orphan list; we need to make sure the inode
@@ -1793,7 +1836,7 @@
 	new_i_size = pos + copied;
 	if (new_i_size > inode->i_size)
 		i_size_write(inode, pos+copied);
-	EXT4_I(inode)->i_state |= EXT4_STATE_JDATA;
+	ext4_set_inode_state(inode, EXT4_STATE_JDATA);
 	if (new_i_size > EXT4_I(inode)->i_disksize) {
 		ext4_update_i_disksize(inode, new_i_size);
 		ret2 = ext4_mark_inode_dirty(handle, inode);
@@ -1814,7 +1857,7 @@
 	if (!ret)
 		ret = ret2;
 	if (pos + len > inode->i_size) {
-		ext4_truncate(inode);
+		ext4_truncate_failed_write(inode);
 		/*
 		 * If truncate failed early the inode might still be
 		 * on the orphan list; we need to make sure the inode
@@ -1827,11 +1870,15 @@
 	return ret ? ret : copied;
 }
 
-static int ext4_da_reserve_space(struct inode *inode, int nrblocks)
+/*
+ * Reserve a single block located at lblock
+ */
+static int ext4_da_reserve_space(struct inode *inode, sector_t lblock)
 {
 	int retries = 0;
 	struct ext4_sb_info *sbi = EXT4_SB(inode->i_sb);
-	unsigned long md_needed, mdblocks, total = 0;
+	struct ext4_inode_info *ei = EXT4_I(inode);
+	unsigned long md_needed, md_reserved;
 
 	/*
 	 * recalculate the amount of metadata blocks to reserve
@@ -1839,86 +1886,78 @@
 	 * worse case is one extent per block
 	 */
 repeat:
-	spin_lock(&EXT4_I(inode)->i_block_reservation_lock);
-	total = EXT4_I(inode)->i_reserved_data_blocks + nrblocks;
-	mdblocks = ext4_calc_metadata_amount(inode, total);
-	BUG_ON(mdblocks < EXT4_I(inode)->i_reserved_meta_blocks);
-
-	md_needed = mdblocks - EXT4_I(inode)->i_reserved_meta_blocks;
-	total = md_needed + nrblocks;
+	spin_lock(&ei->i_block_reservation_lock);
+	md_reserved = ei->i_reserved_meta_blocks;
+	md_needed = ext4_calc_metadata_amount(inode, lblock);
+	spin_unlock(&ei->i_block_reservation_lock);
 
 	/*
 	 * Make quota reservation here to prevent quota overflow
 	 * later. Real quota accounting is done at pages writeout
 	 * time.
 	 */
-	if (vfs_dq_reserve_block(inode, total)) {
-		spin_unlock(&EXT4_I(inode)->i_block_reservation_lock);
+	if (vfs_dq_reserve_block(inode, md_needed + 1))
 		return -EDQUOT;
-	}
 
-	if (ext4_claim_free_blocks(sbi, total)) {
-		spin_unlock(&EXT4_I(inode)->i_block_reservation_lock);
-		vfs_dq_release_reservation_block(inode, total);
+	if (ext4_claim_free_blocks(sbi, md_needed + 1)) {
+		vfs_dq_release_reservation_block(inode, md_needed + 1);
 		if (ext4_should_retry_alloc(inode->i_sb, &retries)) {
 			yield();
 			goto repeat;
 		}
 		return -ENOSPC;
 	}
-	EXT4_I(inode)->i_reserved_data_blocks += nrblocks;
-	EXT4_I(inode)->i_reserved_meta_blocks = mdblocks;
+	spin_lock(&ei->i_block_reservation_lock);
+	ei->i_reserved_data_blocks++;
+	ei->i_reserved_meta_blocks += md_needed;
+	spin_unlock(&ei->i_block_reservation_lock);
 
-	spin_unlock(&EXT4_I(inode)->i_block_reservation_lock);
 	return 0;       /* success */
 }
 
 static void ext4_da_release_space(struct inode *inode, int to_free)
 {
 	struct ext4_sb_info *sbi = EXT4_SB(inode->i_sb);
-	int total, mdb, mdb_free, release;
+	struct ext4_inode_info *ei = EXT4_I(inode);
 
 	if (!to_free)
 		return;		/* Nothing to release, exit */
 
 	spin_lock(&EXT4_I(inode)->i_block_reservation_lock);
 
-	if (!EXT4_I(inode)->i_reserved_data_blocks) {
+	if (unlikely(to_free > ei->i_reserved_data_blocks)) {
 		/*
-		 * if there is no reserved blocks, but we try to free some
-		 * then the counter is messed up somewhere.
-		 * but since this function is called from invalidate
-		 * page, it's harmless to return without any action
-		 */
-		printk(KERN_INFO "ext4 delalloc try to release %d reserved "
-			    "blocks for inode %lu, but there is no reserved "
-			    "data blocks\n", to_free, inode->i_ino);
-		spin_unlock(&EXT4_I(inode)->i_block_reservation_lock);
-		return;
+		 * if there aren't enough reserved blocks, then the
+		 * counter is messed up somewhere.  Since this
+		 * function is called from invalidate page, it's
+		 * harmless to return without any action.
+		 */
+		ext4_msg(inode->i_sb, KERN_NOTICE, "ext4_da_release_space: "
+			 "ino %lu, to_free %d with only %d reserved "
+			 "data blocks\n", inode->i_ino, to_free,
+			 ei->i_reserved_data_blocks);
+		WARN_ON(1);
+		to_free = ei->i_reserved_data_blocks;
 	}
+	ei->i_reserved_data_blocks -= to_free;
 
-	/* recalculate the number of metablocks still need to be reserved */
-	total = EXT4_I(inode)->i_reserved_data_blocks - to_free;
-	mdb = ext4_calc_metadata_amount(inode, total);
-
-	/* figure out how many metablocks to release */
-	BUG_ON(mdb > EXT4_I(inode)->i_reserved_meta_blocks);
-	mdb_free = EXT4_I(inode)->i_reserved_meta_blocks - mdb;
-
-	release = to_free + mdb_free;
-
-	/* update fs dirty blocks counter for truncate case */
-	percpu_counter_sub(&sbi->s_dirtyblocks_counter, release);
+	if (ei->i_reserved_data_blocks == 0) {
+		/*
+		 * We can release all of the reserved metadata blocks
+		 * only when we have written all of the delayed
+		 * allocation blocks.
+		 */
+		to_free += ei->i_reserved_meta_blocks;
+		ei->i_reserved_meta_blocks = 0;
+		ei->i_da_metadata_calc_len = 0;
+	}
 
-	/* update per-inode reservations */
-	BUG_ON(to_free > EXT4_I(inode)->i_reserved_data_blocks);
-	EXT4_I(inode)->i_reserved_data_blocks -= to_free;
+	/* update fs dirty blocks counter */
+	percpu_counter_sub(&sbi->s_dirtyblocks_counter, to_free);
 
-	BUG_ON(mdb > EXT4_I(inode)->i_reserved_meta_blocks);
-	EXT4_I(inode)->i_reserved_meta_blocks = mdb;
 	spin_unlock(&EXT4_I(inode)->i_block_reservation_lock);
 
-	vfs_dq_release_reservation_block(inode, release);
+	vfs_dq_release_reservation_block(inode, to_free);
 }
 
 static void ext4_da_page_release_reservation(struct page *page,
@@ -2223,10 +2262,10 @@
 	 * variables are updated after the blocks have been allocated.
 	 */
 	new.b_state = 0;
-	get_blocks_flags = (EXT4_GET_BLOCKS_CREATE |
-			    EXT4_GET_BLOCKS_DELALLOC_RESERVE);
+	get_blocks_flags = EXT4_GET_BLOCKS_CREATE;
 	if (mpd->b_state & (1 << BH_Delay))
-		get_blocks_flags |= EXT4_GET_BLOCKS_UPDATE_RESERVE_SPACE;
+		get_blocks_flags |= EXT4_GET_BLOCKS_DELALLOC_RESERVE;
+
 	blks = ext4_get_blocks(handle, mpd->inode, next, max_blocks,
 			       &new, get_blocks_flags);
 	if (blks < 0) {
@@ -2255,7 +2294,7 @@
 		ext4_msg(mpd->inode->i_sb, KERN_CRIT,
 			 "delayed block allocation failed for inode %lu at "
 			 "logical offset %llu with max blocks %zd with "
-			 "error %d\n", mpd->inode->i_ino,
+			 "error %d", mpd->inode->i_ino,
 			 (unsigned long long) next,
 			 mpd->b_size >> mpd->inode->i_blkbits, err);
 		printk(KERN_CRIT "This should not happen!!  "
@@ -2322,8 +2361,17 @@
 	sector_t next;
 	int nrblocks = mpd->b_size >> mpd->inode->i_blkbits;
 
+	/*
+	 * XXX Don't go larger than mballoc is willing to allocate
+	 * This is a stopgap solution.  We eventually need to fold
+	 * mpage_da_submit_io() into this function and then call
+	 * ext4_get_blocks() multiple times in a loop
+	 */
+	if (nrblocks >= 8*1024*1024/mpd->inode->i_sb->s_blocksize)
+		goto flush_it;
+
 	/* check if thereserved journal credits might overflow */
-	if (!(EXT4_I(mpd->inode)->i_flags & EXT4_EXTENTS_FL)) {
+	if (!(ext4_test_inode_flag(mpd->inode, EXT4_INODE_EXTENTS))) {
 		if (nrblocks >= EXT4_MAX_TRANS_DATA) {
 			/*
 			 * With non-extent format we are limited by the journal
@@ -2524,7 +2572,7 @@
 		 * XXX: __block_prepare_write() unmaps passed block,
 		 * is it OK?
 		 */
-		ret = ext4_da_reserve_space(inode, 1);
+		ret = ext4_da_reserve_space(inode, iblock);
 		if (ret)
 			/* not enough space to reserve */
 			return ret;
@@ -2635,7 +2683,7 @@
 		ret = err;
 
 	walk_page_buffers(handle, page_bufs, 0, len, NULL, bput_one);
-	EXT4_I(inode)->i_state |= EXT4_STATE_JDATA;
+	ext4_set_inode_state(inode, EXT4_STATE_JDATA);
 out:
 	return ret;
 }
@@ -2788,7 +2836,7 @@
 	 * number of contiguous block. So we will limit
 	 * number of contiguous block to a sane value
 	 */
-	if (!(inode->i_flags & EXT4_EXTENTS_FL) &&
+	if (!(ext4_test_inode_flag(inode, EXT4_INODE_EXTENTS)) &&
 	    (max_blocks > EXT4_MAX_TRANS_DATA))
 		max_blocks = EXT4_MAX_TRANS_DATA;
 
@@ -2908,7 +2956,7 @@
 		if (IS_ERR(handle)) {
 			ret = PTR_ERR(handle);
 			ext4_msg(inode->i_sb, KERN_CRIT, "%s: jbd2_start: "
-			       "%ld pages, ino %lu; err %d\n", __func__,
+			       "%ld pages, ino %lu; err %d", __func__,
 				wbc->nr_to_write, inode->i_ino, ret);
 			goto out_writepages;
 		}
@@ -2983,7 +3031,7 @@
 	if (pages_skipped != wbc->pages_skipped)
 		ext4_msg(inode->i_sb, KERN_CRIT,
 			 "This should not happen leaving %s "
-			 "with nr_to_write = %ld ret = %d\n",
+			 "with nr_to_write = %ld ret = %d",
 			 __func__, wbc->nr_to_write, ret);
 
 	/* Update index */
@@ -2999,8 +3047,7 @@
 out_writepages:
 	if (!no_nrwrite_index_update)
 		wbc->no_nrwrite_index_update = 0;
-	if (wbc->nr_to_write > nr_to_writebump)
-		wbc->nr_to_write -= nr_to_writebump;
+	wbc->nr_to_write -= nr_to_writebump;
 	wbc->range_start = range_start;
 	trace_ext4_da_writepages_result(inode, wbc, ret, pages_written);
 	return ret;
@@ -3025,11 +3072,18 @@
 	if (2 * free_blocks < 3 * dirty_blocks ||
 		free_blocks < (dirty_blocks + EXT4_FREEBLOCKS_WATERMARK)) {
 		/*
-		 * free block count is less that 150% of dirty blocks
-		 * or free blocks is less that watermark
+		 * free block count is less than 150% of dirty blocks
+		 * or free blocks is less than watermark
 		 */
 		return 1;
 	}
+	/*
+	 * Even if we don't switch but are nearing capacity,
+	 * start pushing delalloc when 1/2 of free blocks are dirty.
+	 */
+	if (free_blocks < 2 * dirty_blocks)
+		writeback_inodes_sb_if_idle(sb);
+
 	return 0;
 }
 
@@ -3037,7 +3091,7 @@
 			       loff_t pos, unsigned len, unsigned flags,
 			       struct page **pagep, void **fsdata)
 {
-	int ret, retries = 0;
+	int ret, retries = 0, quota_retries = 0;
 	struct page *page;
 	pgoff_t index;
 	unsigned from, to;
@@ -3091,11 +3145,27 @@
 		 * i_size_read because we hold i_mutex.
 		 */
 		if (pos + len > inode->i_size)
-			ext4_truncate(inode);
+			ext4_truncate_failed_write(inode);
 	}
 
 	if (ret == -ENOSPC && ext4_should_retry_alloc(inode->i_sb, &retries))
 		goto retry;
+
+	if ((ret == -EDQUOT) &&
+	    EXT4_I(inode)->i_reserved_meta_blocks &&
+	    (quota_retries++ < 3)) {
+		/*
+		 * Since we often over-estimate the number of meta
+		 * data blocks required, we may sometimes get a
+		 * spurios out of quota error even though there would
+		 * be enough space once we write the data blocks and
+		 * find out how many meta data blocks were _really_
+		 * required.  So try forcing the inode write to see if
+		 * that helps.
+		 */
+		write_inode_now(inode, (quota_retries == 3));
+		goto retry;
+	}
 out:
 	return ret;
 }
@@ -3284,7 +3354,8 @@
 		filemap_write_and_wait(mapping);
 	}
 
-	if (EXT4_JOURNAL(inode) && EXT4_I(inode)->i_state & EXT4_STATE_JDATA) {
+	if (EXT4_JOURNAL(inode) &&
+	    ext4_test_inode_state(inode, EXT4_STATE_JDATA)) {
 		/*
 		 * This is a REALLY heavyweight approach, but the use of
 		 * bmap on dirty files is expected to be extremely rare:
@@ -3303,7 +3374,7 @@
 		 * everything they get.
 		 */
 
-		EXT4_I(inode)->i_state &= ~EXT4_STATE_JDATA;
+		ext4_clear_inode_state(inode, EXT4_STATE_JDATA);
 		journal = EXT4_JOURNAL(inode);
 		jbd2_journal_lock_updates(journal);
 		err = jbd2_journal_flush(journal);
@@ -3419,6 +3490,9 @@
 			 * but cannot extend i_size. Bail out and pretend
 			 * the write failed... */
 			ret = PTR_ERR(handle);
+			if (inode->i_nlink)
+				ext4_orphan_del(NULL, inode);
+
 			goto out;
 		}
 		if (inode->i_nlink)
@@ -3534,7 +3608,7 @@
 {
 	struct inode *inode = io->inode;
 	loff_t offset = io->offset;
-	size_t size = io->size;
+	ssize_t size = io->size;
 	int ret = 0;
 
 	ext4_debug("end_aio_dio_onlock: io 0x%p from inode %lu,list->next 0x%p,"
@@ -3771,8 +3845,8 @@
 		if (ret != -EIOCBQUEUED && ret <= 0 && iocb->private) {
 			ext4_free_io_end(iocb->private);
 			iocb->private = NULL;
-		} else if (ret > 0 && (EXT4_I(inode)->i_state &
-				       EXT4_STATE_DIO_UNWRITTEN)) {
+		} else if (ret > 0 && ext4_test_inode_state(inode,
+						EXT4_STATE_DIO_UNWRITTEN)) {
 			int err;
 			/*
 			 * for non AIO case, since the IO is already
@@ -3782,7 +3856,7 @@
 							     offset, ret);
 			if (err < 0)
 				ret = err;
-			EXT4_I(inode)->i_state &= ~EXT4_STATE_DIO_UNWRITTEN;
+			ext4_clear_inode_state(inode, EXT4_STATE_DIO_UNWRITTEN);
 		}
 		return ret;
 	}
@@ -3798,7 +3872,7 @@
 	struct file *file = iocb->ki_filp;
 	struct inode *inode = file->f_mapping->host;
 
-	if (EXT4_I(inode)->i_flags & EXT4_EXTENTS_FL)
+	if (ext4_test_inode_flag(inode, EXT4_INODE_EXTENTS))
 		return ext4_ext_direct_IO(rw, iocb, iov, offset, nr_segs);
 
 	return ext4_ind_direct_IO(rw, iocb, iov, offset, nr_segs);
@@ -4120,6 +4194,8 @@
 			      __le32 *last)
 {
 	__le32 *p;
+	int	is_metadata = S_ISDIR(inode->i_mode) || S_ISLNK(inode->i_mode);
+
 	if (try_to_extend_transaction(handle, inode)) {
 		if (bh) {
 			BUFFER_TRACE(bh, "call ext4_handle_dirty_metadata");
@@ -4150,11 +4226,11 @@
 
 			*p = 0;
 			tbh = sb_find_get_block(inode->i_sb, nr);
-			ext4_forget(handle, 0, inode, tbh, nr);
+			ext4_forget(handle, is_metadata, inode, tbh, nr);
 		}
 	}
 
-	ext4_free_blocks(handle, inode, block_to_free, count, 0);
+	ext4_free_blocks(handle, inode, block_to_free, count, is_metadata);
 }
 
 /**
@@ -4427,10 +4503,12 @@
 	if (!ext4_can_truncate(inode))
 		return;
 
+	ext4_clear_inode_flag(inode, EXT4_INODE_EOFBLOCKS);
+
 	if (inode->i_size == 0 && !test_opt(inode->i_sb, NO_AUTO_DA_ALLOC))
-		ei->i_state |= EXT4_STATE_DA_ALLOC_CLOSE;
+		ext4_set_inode_state(inode, EXT4_STATE_DA_ALLOC_CLOSE);
 
-	if (EXT4_I(inode)->i_flags & EXT4_EXTENTS_FL) {
+	if (ext4_test_inode_flag(inode, EXT4_INODE_EXTENTS)) {
 		ext4_ext_truncate(inode);
 		return;
 	}
@@ -4714,7 +4792,7 @@
 {
 	/* We have all inode data except xattrs in memory here. */
 	return __ext4_get_inode_loc(inode, iloc,
-		!(EXT4_I(inode)->i_state & EXT4_STATE_XATTR));
+		!ext4_test_inode_state(inode, EXT4_STATE_XATTR));
 }
 
 void ext4_set_inode_flags(struct inode *inode)
@@ -4737,20 +4815,26 @@
 /* Propagate flags from i_flags to EXT4_I(inode)->i_flags */
 void ext4_get_inode_flags(struct ext4_inode_info *ei)
 {
-	unsigned int flags = ei->vfs_inode.i_flags;
+	unsigned int vfs_fl;
+	unsigned long old_fl, new_fl;
 
-	ei->i_flags &= ~(EXT4_SYNC_FL|EXT4_APPEND_FL|
-			EXT4_IMMUTABLE_FL|EXT4_NOATIME_FL|EXT4_DIRSYNC_FL);
-	if (flags & S_SYNC)
-		ei->i_flags |= EXT4_SYNC_FL;
-	if (flags & S_APPEND)
-		ei->i_flags |= EXT4_APPEND_FL;
-	if (flags & S_IMMUTABLE)
-		ei->i_flags |= EXT4_IMMUTABLE_FL;
-	if (flags & S_NOATIME)
-		ei->i_flags |= EXT4_NOATIME_FL;
-	if (flags & S_DIRSYNC)
-		ei->i_flags |= EXT4_DIRSYNC_FL;
+	do {
+		vfs_fl = ei->vfs_inode.i_flags;
+		old_fl = ei->i_flags;
+		new_fl = old_fl & ~(EXT4_SYNC_FL|EXT4_APPEND_FL|
+				EXT4_IMMUTABLE_FL|EXT4_NOATIME_FL|
+				EXT4_DIRSYNC_FL);
+		if (vfs_fl & S_SYNC)
+			new_fl |= EXT4_SYNC_FL;
+		if (vfs_fl & S_APPEND)
+			new_fl |= EXT4_APPEND_FL;
+		if (vfs_fl & S_IMMUTABLE)
+			new_fl |= EXT4_IMMUTABLE_FL;
+		if (vfs_fl & S_NOATIME)
+			new_fl |= EXT4_NOATIME_FL;
+		if (vfs_fl & S_DIRSYNC)
+			new_fl |= EXT4_DIRSYNC_FL;
+	} while (cmpxchg(&ei->i_flags, old_fl, new_fl) != old_fl);
 }
 
 static blkcnt_t ext4_inode_blocks(struct ext4_inode *raw_inode,
@@ -4781,8 +4865,8 @@
 	struct ext4_iloc iloc;
 	struct ext4_inode *raw_inode;
 	struct ext4_inode_info *ei;
-	struct buffer_head *bh;
 	struct inode *inode;
+	journal_t *journal = EXT4_SB(sb)->s_journal;
 	long ret;
 	int block;
 
@@ -4793,11 +4877,11 @@
 		return inode;
 
 	ei = EXT4_I(inode);
+	iloc.bh = 0;
 
 	ret = __ext4_get_inode_loc(inode, &iloc, 0);
 	if (ret < 0)
 		goto bad_inode;
-	bh = iloc.bh;
 	raw_inode = ext4_raw_inode(&iloc);
 	inode->i_mode = le16_to_cpu(raw_inode->i_mode);
 	inode->i_uid = (uid_t)le16_to_cpu(raw_inode->i_uid_low);
@@ -4808,7 +4892,7 @@
 	}
 	inode->i_nlink = le16_to_cpu(raw_inode->i_links_count);
 
-	ei->i_state = 0;
+	ei->i_state_flags = 0;
 	ei->i_dir_start_lookup = 0;
 	ei->i_dtime = le32_to_cpu(raw_inode->i_dtime);
 	/* We now have enough fields to check if the inode was active or not.
@@ -4820,7 +4904,6 @@
 		if (inode->i_mode == 0 ||
 		    !(EXT4_SB(inode->i_sb)->s_mount_state & EXT4_ORPHAN_FS)) {
 			/* this inode is deleted */
-			brelse(bh);
 			ret = -ESTALE;
 			goto bad_inode;
 		}
@@ -4837,6 +4920,9 @@
 			((__u64)le16_to_cpu(raw_inode->i_file_acl_high)) << 32;
 	inode->i_size = ext4_isize(raw_inode);
 	ei->i_disksize = inode->i_size;
+#ifdef CONFIG_QUOTA
+	ei->i_reserved_quota = 0;
+#endif
 	inode->i_generation = le32_to_cpu(raw_inode->i_generation);
 	ei->i_block_group = iloc.block_group;
 	ei->i_last_alloc_group = ~0;
@@ -4848,11 +4934,35 @@
 		ei->i_data[block] = raw_inode->i_block[block];
 	INIT_LIST_HEAD(&ei->i_orphan);
 
+	/*
+	 * Set transaction id's of transactions that have to be committed
+	 * to finish f[data]sync. We set them to currently running transaction
+	 * as we cannot be sure that the inode or some of its metadata isn't
+	 * part of the transaction - the inode could have been reclaimed and
+	 * now it is reread from disk.
+	 */
+	if (journal) {
+		transaction_t *transaction;
+		tid_t tid;
+
+		spin_lock(&journal->j_state_lock);
+		if (journal->j_running_transaction)
+			transaction = journal->j_running_transaction;
+		else
+			transaction = journal->j_committing_transaction;
+		if (transaction)
+			tid = transaction->t_tid;
+		else
+			tid = journal->j_commit_sequence;
+		spin_unlock(&journal->j_state_lock);
+		ei->i_sync_tid = tid;
+		ei->i_datasync_tid = tid;
+	}
+
 	if (EXT4_INODE_SIZE(inode->i_sb) > EXT4_GOOD_OLD_INODE_SIZE) {
 		ei->i_extra_isize = le16_to_cpu(raw_inode->i_extra_isize);
 		if (EXT4_GOOD_OLD_INODE_SIZE + ei->i_extra_isize >
 		    EXT4_INODE_SIZE(inode->i_sb)) {
-			brelse(bh);
 			ret = -EIO;
 			goto bad_inode;
 		}
@@ -4865,7 +4975,7 @@
 					EXT4_GOOD_OLD_INODE_SIZE +
 					ei->i_extra_isize;
 			if (*magic == cpu_to_le32(EXT4_XATTR_MAGIC))
-				ei->i_state |= EXT4_STATE_XATTR;
+				ext4_set_inode_state(inode, EXT4_STATE_XATTR);
 		}
 	} else
 		ei->i_extra_isize = 0;
@@ -4884,10 +4994,7 @@
 
 	ret = 0;
 	if (ei->i_file_acl &&
-	    ((ei->i_file_acl <
-	      (le32_to_cpu(EXT4_SB(sb)->s_es->s_first_data_block) +
-	       EXT4_SB(sb)->s_gdb_count)) ||
-	     (ei->i_file_acl >= ext4_blocks_count(EXT4_SB(sb)->s_es)))) {
+	    !ext4_data_block_valid(EXT4_SB(sb), ei->i_file_acl, 1)) {
 		ext4_error(sb, __func__,
 			   "bad extended attribute block %llu in inode #%lu",
 			   ei->i_file_acl, inode->i_ino);
@@ -4905,10 +5012,8 @@
 		/* Validate block references which are part of inode */
 		ret = ext4_check_inode_blockref(inode);
 	}
-	if (ret) {
-		brelse(bh);
+	if (ret)
 		goto bad_inode;
-	}
 
 	if (S_ISREG(inode->i_mode)) {
 		inode->i_op = &ext4_file_inode_operations;
@@ -4936,7 +5041,6 @@
 			init_special_inode(inode, inode->i_mode,
 			   new_decode_dev(le32_to_cpu(raw_inode->i_block[1])));
 	} else {
-		brelse(bh);
 		ret = -EIO;
 		ext4_error(inode->i_sb, __func__,
 			   "bogus i_mode (%o) for inode=%lu",
@@ -4949,6 +5053,7 @@
 	return inode;
 
 bad_inode:
+	brelse(iloc.bh);
 	iget_failed(inode);
 	return ERR_PTR(ret);
 }
@@ -4968,7 +5073,7 @@
 		 */
 		raw_inode->i_blocks_lo   = cpu_to_le32(i_blocks);
 		raw_inode->i_blocks_high = 0;
-		ei->i_flags &= ~EXT4_HUGE_FILE_FL;
+		ext4_clear_inode_flag(inode, EXT4_INODE_HUGE_FILE);
 		return 0;
 	}
 	if (!EXT4_HAS_RO_COMPAT_FEATURE(sb, EXT4_FEATURE_RO_COMPAT_HUGE_FILE))
@@ -4981,9 +5086,9 @@
 		 */
 		raw_inode->i_blocks_lo   = cpu_to_le32(i_blocks);
 		raw_inode->i_blocks_high = cpu_to_le16(i_blocks >> 32);
-		ei->i_flags &= ~EXT4_HUGE_FILE_FL;
+		ext4_clear_inode_flag(inode, EXT4_INODE_HUGE_FILE);
 	} else {
-		ei->i_flags |= EXT4_HUGE_FILE_FL;
+		ext4_set_inode_flag(inode, EXT4_INODE_HUGE_FILE);
 		/* i_block is stored in file system block size */
 		i_blocks = i_blocks >> (inode->i_blkbits - 9);
 		raw_inode->i_blocks_lo   = cpu_to_le32(i_blocks);
@@ -5010,7 +5115,7 @@
 
 	/* For fields not not tracking in the in-memory inode,
 	 * initialise them to zero for new inodes. */
-	if (ei->i_state & EXT4_STATE_NEW)
+	if (ext4_test_inode_state(inode, EXT4_STATE_NEW))
 		memset(raw_inode, 0, EXT4_SB(inode->i_sb)->s_inode_size);
 
 	ext4_get_inode_flags(ei);
@@ -5074,7 +5179,7 @@
 					EXT4_FEATURE_RO_COMPAT_LARGE_FILE);
 			sb->s_dirt = 1;
 			ext4_handle_sync(handle);
-			err = ext4_handle_dirty_metadata(handle, inode,
+			err = ext4_handle_dirty_metadata(handle, NULL,
 					EXT4_SB(sb)->s_sbh);
 		}
 	}
@@ -5103,11 +5208,12 @@
 	}
 
 	BUFFER_TRACE(bh, "call ext4_handle_dirty_metadata");
-	rc = ext4_handle_dirty_metadata(handle, inode, bh);
+	rc = ext4_handle_dirty_metadata(handle, NULL, bh);
 	if (!err)
 		err = rc;
-	ei->i_state &= ~EXT4_STATE_NEW;
+	ext4_clear_inode_state(inode, EXT4_STATE_NEW);
 
+	ext4_update_inode_fsync_trans(handle, inode, 0);
 out_brelse:
 	brelse(bh);
 	ext4_std_error(inode->i_sb, err);
@@ -5170,7 +5276,7 @@
 	} else {
 		struct ext4_iloc iloc;
 
-		err = ext4_get_inode_loc(inode, &iloc);
+		err = __ext4_get_inode_loc(inode, &iloc, 0);
 		if (err)
 			return err;
 		if (wait)
@@ -5183,6 +5289,7 @@
 				   (unsigned long long)iloc.bh->b_blocknr);
 			err = -EIO;
 		}
+		brelse(iloc.bh);
 	}
 	return err;
 }
@@ -5227,8 +5334,8 @@
 
 		/* (user+group)*(old+new) structure, inode write (sb,
 		 * inode block, ? - but truncate inode update has it) */
-		handle = ext4_journal_start(inode, 2*(EXT4_QUOTA_INIT_BLOCKS(inode->i_sb)+
-					EXT4_QUOTA_DEL_BLOCKS(inode->i_sb))+3);
+		handle = ext4_journal_start(inode, (EXT4_MAXQUOTAS_INIT_BLOCKS(inode->i_sb)+
+					EXT4_MAXQUOTAS_DEL_BLOCKS(inode->i_sb))+3);
 		if (IS_ERR(handle)) {
 			error = PTR_ERR(handle);
 			goto err_out;
@@ -5249,7 +5356,7 @@
 	}
 
 	if (attr->ia_valid & ATTR_SIZE) {
-		if (!(EXT4_I(inode)->i_flags & EXT4_EXTENTS_FL)) {
+		if (!(ext4_test_inode_flag(inode, EXT4_INODE_EXTENTS))) {
 			struct ext4_sb_info *sbi = EXT4_SB(inode->i_sb);
 
 			if (attr->ia_size > sbi->s_bitmap_maxbytes) {
@@ -5260,7 +5367,9 @@
 	}
 
 	if (S_ISREG(inode->i_mode) &&
-	    attr->ia_valid & ATTR_SIZE && attr->ia_size < inode->i_size) {
+	    attr->ia_valid & ATTR_SIZE &&
+	    (attr->ia_size < inode->i_size ||
+	     (ext4_test_inode_flag(inode, EXT4_INODE_EOFBLOCKS)))) {
 		handle_t *handle;
 
 		handle = ext4_journal_start(inode, 3);
@@ -5291,6 +5400,9 @@
 				goto err_out;
 			}
 		}
+		/* ext4_truncate will clear the flag */
+		if ((ext4_test_inode_flag(inode, EXT4_INODE_EOFBLOCKS)))
+			ext4_truncate(inode);
 	}
 
 	rc = inode_setattr(inode, attr);
@@ -5346,13 +5458,12 @@
 	/* if nrblocks are contiguous */
 	if (chunk) {
 		/*
-		 * With N contiguous data blocks, it need at most
-		 * N/EXT4_ADDR_PER_BLOCK(inode->i_sb) indirect blocks
-		 * 2 dindirect blocks
-		 * 1 tindirect block
+		 * With N contiguous data blocks, we need at most
+		 * N/EXT4_ADDR_PER_BLOCK(inode->i_sb) + 1 indirect blocks,
+		 * 2 dindirect blocks, and 1 tindirect block
 		 */
-		indirects = nrblocks / EXT4_ADDR_PER_BLOCK(inode->i_sb);
-		return indirects + 3;
+		return DIV_ROUND_UP(nrblocks,
+				    EXT4_ADDR_PER_BLOCK(inode->i_sb)) + 4;
 	}
 	/*
 	 * if nrblocks are not contiguous, worse case, each block touch
@@ -5365,7 +5476,7 @@
 
 static int ext4_index_trans_blocks(struct inode *inode, int nrblocks, int chunk)
 {
-	if (!(EXT4_I(inode)->i_flags & EXT4_EXTENTS_FL))
+	if (!(ext4_test_inode_flag(inode, EXT4_INODE_EXTENTS)))
 		return ext4_indirect_trans_blocks(inode, nrblocks, chunk);
 	return ext4_ext_index_trans_blocks(inode, nrblocks, chunk);
 }
@@ -5529,8 +5640,8 @@
 	entry = IFIRST(header);
 
 	/* No extended attributes present */
-	if (!(EXT4_I(inode)->i_state & EXT4_STATE_XATTR) ||
-		header->h_magic != cpu_to_le32(EXT4_XATTR_MAGIC)) {
+	if (!ext4_test_inode_state(inode, EXT4_STATE_XATTR) ||
+	    header->h_magic != cpu_to_le32(EXT4_XATTR_MAGIC)) {
 		memset((void *)raw_inode + EXT4_GOOD_OLD_INODE_SIZE, 0,
 			new_extra_isize);
 		EXT4_I(inode)->i_extra_isize = new_extra_isize;
@@ -5574,7 +5685,7 @@
 	err = ext4_reserve_inode_write(handle, inode, &iloc);
 	if (ext4_handle_valid(handle) &&
 	    EXT4_I(inode)->i_extra_isize < sbi->s_want_extra_isize &&
-	    !(EXT4_I(inode)->i_state & EXT4_STATE_NO_EXPAND)) {
+	    !ext4_test_inode_state(inode, EXT4_STATE_NO_EXPAND)) {
 		/*
 		 * We need extra buffer credits since we may write into EA block
 		 * with this same handle. If journal_extend fails, then it will
@@ -5588,7 +5699,8 @@
 						      sbi->s_want_extra_isize,
 						      iloc, handle);
 			if (ret) {
-				EXT4_I(inode)->i_state |= EXT4_STATE_NO_EXPAND;
+				ext4_set_inode_state(inode,
+						     EXT4_STATE_NO_EXPAND);
 				if (mnt_count !=
 					le16_to_cpu(sbi->s_es->s_mnt_count)) {
 					ext4_warning(inode->i_sb, __func__,
@@ -5655,7 +5767,7 @@
 			err = jbd2_journal_get_write_access(handle, iloc.bh);
 			if (!err)
 				err = ext4_handle_dirty_metadata(handle,
-								 inode,
+								 NULL,
 								 iloc.bh);
 			brelse(iloc.bh);
 		}
@@ -5699,9 +5811,9 @@
 	 */
 
 	if (val)
-		EXT4_I(inode)->i_flags |= EXT4_JOURNAL_DATA_FL;
+		ext4_set_inode_flag(inode, EXT4_INODE_JOURNAL_DATA);
 	else
-		EXT4_I(inode)->i_flags &= ~EXT4_JOURNAL_DATA_FL;
+		ext4_clear_inode_flag(inode, EXT4_INODE_JOURNAL_DATA);
 	ext4_set_aops(inode);
 
 	jbd2_journal_unlock_updates(journal);
--- linux-mvl-dove-2.6.32.orig/fs/ext4/move_extent.c
+++ linux-mvl-dove-2.6.32/fs/ext4/move_extent.c
@@ -77,12 +77,14 @@
 mext_next_extent(struct inode *inode, struct ext4_ext_path *path,
 		      struct ext4_extent **extent)
 {
+	struct ext4_extent_header *eh;
 	int ppos, leaf_ppos = path->p_depth;
 
 	ppos = leaf_ppos;
 	if (EXT_LAST_EXTENT(path[ppos].p_hdr) > path[ppos].p_ext) {
 		/* leaf block */
 		*extent = ++path[ppos].p_ext;
+		path[ppos].p_block = ext_pblock(path[ppos].p_ext);
 		return 0;
 	}
 
@@ -119,9 +121,18 @@
 					ext_block_hdr(path[cur_ppos+1].p_bh);
 			}
 
+			path[leaf_ppos].p_ext = *extent = NULL;
+
+			eh = path[leaf_ppos].p_hdr;
+			if (le16_to_cpu(eh->eh_entries) == 0)
+				/* empty leaf is found */
+				return -ENODATA;
+
 			/* leaf block */
 			path[leaf_ppos].p_ext = *extent =
 				EXT_FIRST_EXTENT(path[leaf_ppos].p_hdr);
+			path[leaf_ppos].p_block =
+					ext_pblock(path[leaf_ppos].p_ext);
 			return 0;
 		}
 	}
@@ -155,40 +166,15 @@
 }
 
 /**
- * mext_double_down_read - Acquire two inodes' read semaphore
+ * double_down_write_data_sem - Acquire two inodes' write lock of i_data_sem
  *
  * @orig_inode:		original inode structure
  * @donor_inode:	donor inode structure
- * Acquire read semaphore of the two inodes (orig and donor) by i_ino order.
+ * Acquire write lock of i_data_sem of the two inodes (orig and donor) by
+ * i_ino order.
  */
 static void
-mext_double_down_read(struct inode *orig_inode, struct inode *donor_inode)
-{
-	struct inode *first = orig_inode, *second = donor_inode;
-
-	/*
-	 * Use the inode number to provide the stable locking order instead
-	 * of its address, because the C language doesn't guarantee you can
-	 * compare pointers that don't come from the same array.
-	 */
-	if (donor_inode->i_ino < orig_inode->i_ino) {
-		first = donor_inode;
-		second = orig_inode;
-	}
-
-	down_read(&EXT4_I(first)->i_data_sem);
-	down_read(&EXT4_I(second)->i_data_sem);
-}
-
-/**
- * mext_double_down_write - Acquire two inodes' write semaphore
- *
- * @orig_inode:		original inode structure
- * @donor_inode:	donor inode structure
- * Acquire write semaphore of the two inodes (orig and donor) by i_ino order.
- */
-static void
-mext_double_down_write(struct inode *orig_inode, struct inode *donor_inode)
+double_down_write_data_sem(struct inode *orig_inode, struct inode *donor_inode)
 {
 	struct inode *first = orig_inode, *second = donor_inode;
 
@@ -203,32 +189,18 @@
 	}
 
 	down_write(&EXT4_I(first)->i_data_sem);
-	down_write(&EXT4_I(second)->i_data_sem);
-}
-
-/**
- * mext_double_up_read - Release two inodes' read semaphore
- *
- * @orig_inode:		original inode structure to be released its lock first
- * @donor_inode:	donor inode structure to be released its lock second
- * Release read semaphore of two inodes (orig and donor).
- */
-static void
-mext_double_up_read(struct inode *orig_inode, struct inode *donor_inode)
-{
-	up_read(&EXT4_I(orig_inode)->i_data_sem);
-	up_read(&EXT4_I(donor_inode)->i_data_sem);
+	down_write_nested(&EXT4_I(second)->i_data_sem, SINGLE_DEPTH_NESTING);
 }
 
 /**
- * mext_double_up_write - Release two inodes' write semaphore
+ * double_up_write_data_sem - Release two inodes' write lock of i_data_sem
  *
  * @orig_inode:		original inode structure to be released its lock first
  * @donor_inode:	donor inode structure to be released its lock second
- * Release write semaphore of two inodes (orig and donor).
+ * Release write lock of i_data_sem of two inodes (orig and donor).
  */
 static void
-mext_double_up_write(struct inode *orig_inode, struct inode *donor_inode)
+double_up_write_data_sem(struct inode *orig_inode, struct inode *donor_inode)
 {
 	up_write(&EXT4_I(orig_inode)->i_data_sem);
 	up_write(&EXT4_I(donor_inode)->i_data_sem);
@@ -280,6 +252,7 @@
 		}
 
 		o_start->ee_len = start_ext->ee_len;
+		eblock = le32_to_cpu(start_ext->ee_block);
 		new_flag = 1;
 
 	} else if (start_ext->ee_len && new_ext->ee_len &&
@@ -290,6 +263,7 @@
 		 * orig  |------------------------------|
 		 */
 		o_start->ee_len = start_ext->ee_len;
+		eblock = le32_to_cpu(start_ext->ee_block);
 		new_flag = 1;
 
 	} else if (!start_ext->ee_len && new_ext->ee_len &&
@@ -503,7 +477,6 @@
 	struct ext4_extent *oext, *o_start, *o_end, *prev_ext;
 	struct ext4_extent new_ext, start_ext, end_ext;
 	ext4_lblk_t new_ext_end;
-	ext4_fsblk_t new_phys_end;
 	int oext_alen, new_ext_alen, end_ext_alen;
 	int depth = ext_depth(orig_inode);
 	int ret;
@@ -517,7 +490,6 @@
 	new_ext.ee_len = dext->ee_len;
 	new_ext_alen = ext4_ext_get_actual_len(&new_ext);
 	new_ext_end = le32_to_cpu(new_ext.ee_block) + new_ext_alen - 1;
-	new_phys_end = ext_pblock(&new_ext) + new_ext_alen - 1;
 
 	/*
 	 * Case: original extent is first
@@ -530,6 +502,7 @@
 		le32_to_cpu(oext->ee_block) + oext_alen) {
 		start_ext.ee_len = cpu_to_le16(le32_to_cpu(new_ext.ee_block) -
 					       le32_to_cpu(oext->ee_block));
+		start_ext.ee_block = oext->ee_block;
 		copy_extent_status(oext, &start_ext);
 	} else if (oext > EXT_FIRST_EXTENT(orig_path[depth].p_hdr)) {
 		prev_ext = oext - 1;
@@ -543,6 +516,7 @@
 			start_ext.ee_len = cpu_to_le16(
 				ext4_ext_get_actual_len(prev_ext) +
 				new_ext_alen);
+			start_ext.ee_block = oext->ee_block;
 			copy_extent_status(prev_ext, &start_ext);
 			new_ext.ee_len = 0;
 		}
@@ -661,6 +635,7 @@
  * @donor_inode:	donor inode
  * @from:		block offset of orig_inode
  * @count:		block count to be replaced
+ * @err:		pointer to save return value
  *
  * Replace original inode extents and donor inode extents page by page.
  * We implement this replacement in the following three steps:
@@ -671,33 +646,33 @@
  * 3. Change the block information of donor inode to point at the saved
  *    original inode blocks in the dummy extents.
  *
- * Return 0 on success, or a negative error value on failure.
+ * Return replaced block count.
  */
 static int
 mext_replace_branches(handle_t *handle, struct inode *orig_inode,
 			   struct inode *donor_inode, ext4_lblk_t from,
-			   ext4_lblk_t count)
+			   ext4_lblk_t count, int *err)
 {
 	struct ext4_ext_path *orig_path = NULL;
 	struct ext4_ext_path *donor_path = NULL;
 	struct ext4_extent *oext, *dext;
 	struct ext4_extent tmp_dext, tmp_oext;
 	ext4_lblk_t orig_off = from, donor_off = from;
-	int err = 0;
 	int depth;
 	int replaced_count = 0;
 	int dext_alen;
 
-	mext_double_down_write(orig_inode, donor_inode);
+	/* Protect extent trees against block allocations via delalloc */
+	double_down_write_data_sem(orig_inode, donor_inode);
 
 	/* Get the original extent for the block "orig_off" */
-	err = get_ext_path(orig_inode, orig_off, &orig_path);
-	if (err)
+	*err = get_ext_path(orig_inode, orig_off, &orig_path);
+	if (*err)
 		goto out;
 
 	/* Get the donor extent for the head */
-	err = get_ext_path(donor_inode, donor_off, &donor_path);
-	if (err)
+	*err = get_ext_path(donor_inode, donor_off, &donor_path);
+	if (*err)
 		goto out;
 	depth = ext_depth(orig_inode);
 	oext = orig_path[depth].p_ext;
@@ -707,9 +682,9 @@
 	dext = donor_path[depth].p_ext;
 	tmp_dext = *dext;
 
-	err = mext_calc_swap_extents(&tmp_dext, &tmp_oext, orig_off,
+	*err = mext_calc_swap_extents(&tmp_dext, &tmp_oext, orig_off,
 				      donor_off, count);
-	if (err)
+	if (*err)
 		goto out;
 
 	/* Loop for the donor extents */
@@ -718,7 +693,7 @@
 		if (!dext) {
 			ext4_error(donor_inode->i_sb, __func__,
 				   "The extent for donor must be found");
-			err = -EIO;
+			*err = -EIO;
 			goto out;
 		} else if (donor_off != le32_to_cpu(tmp_dext.ee_block)) {
 			ext4_error(donor_inode->i_sb, __func__,
@@ -726,20 +701,20 @@
 				"extent(%u) should be equal",
 				donor_off,
 				le32_to_cpu(tmp_dext.ee_block));
-			err = -EIO;
+			*err = -EIO;
 			goto out;
 		}
 
 		/* Set donor extent to orig extent */
-		err = mext_leaf_block(handle, orig_inode,
+		*err = mext_leaf_block(handle, orig_inode,
 					   orig_path, &tmp_dext, &orig_off);
-		if (err < 0)
+		if (*err)
 			goto out;
 
 		/* Set orig extent to donor extent */
-		err = mext_leaf_block(handle, donor_inode,
+		*err = mext_leaf_block(handle, donor_inode,
 					   donor_path, &tmp_oext, &donor_off);
-		if (err < 0)
+		if (*err)
 			goto out;
 
 		dext_alen = ext4_ext_get_actual_len(&tmp_dext);
@@ -753,35 +728,25 @@
 
 		if (orig_path)
 			ext4_ext_drop_refs(orig_path);
-		err = get_ext_path(orig_inode, orig_off, &orig_path);
-		if (err)
+		*err = get_ext_path(orig_inode, orig_off, &orig_path);
+		if (*err)
 			goto out;
 		depth = ext_depth(orig_inode);
 		oext = orig_path[depth].p_ext;
-		if (le32_to_cpu(oext->ee_block) +
-				ext4_ext_get_actual_len(oext) <= orig_off) {
-			err = 0;
-			goto out;
-		}
 		tmp_oext = *oext;
 
 		if (donor_path)
 			ext4_ext_drop_refs(donor_path);
-		err = get_ext_path(donor_inode, donor_off, &donor_path);
-		if (err)
+		*err = get_ext_path(donor_inode, donor_off, &donor_path);
+		if (*err)
 			goto out;
 		depth = ext_depth(donor_inode);
 		dext = donor_path[depth].p_ext;
-		if (le32_to_cpu(dext->ee_block) +
-				ext4_ext_get_actual_len(dext) <= donor_off) {
-			err = 0;
-			goto out;
-		}
 		tmp_dext = *dext;
 
-		err = mext_calc_swap_extents(&tmp_dext, &tmp_oext, orig_off,
+		*err = mext_calc_swap_extents(&tmp_dext, &tmp_oext, orig_off,
 					   donor_off, count - replaced_count);
-		if (err)
+		if (*err)
 			goto out;
 	}
 
@@ -795,8 +760,12 @@
 		kfree(donor_path);
 	}
 
-	mext_double_up_write(orig_inode, donor_inode);
-	return err;
+	ext4_ext_invalidate_cache(orig_inode);
+	ext4_ext_invalidate_cache(donor_inode);
+
+	double_up_write_data_sem(orig_inode, donor_inode);
+
+	return replaced_count;
 }
 
 /**
@@ -808,16 +777,17 @@
  * @data_offset_in_page:	block index where data swapping starts
  * @block_len_in_page:		the number of blocks to be swapped
  * @uninit:			orig extent is uninitialized or not
+ * @err:			pointer to save return value
  *
  * Save the data in original inode blocks and replace original inode extents
  * with donor inode extents by calling mext_replace_branches().
- * Finally, write out the saved data in new original inode blocks. Return 0
- * on success, or a negative error value on failure.
+ * Finally, write out the saved data in new original inode blocks. Return
+ * replaced block count.
  */
 static int
 move_extent_per_page(struct file *o_filp, struct inode *donor_inode,
 		  pgoff_t orig_page_offset, int data_offset_in_page,
-		  int block_len_in_page, int uninit)
+		  int block_len_in_page, int uninit, int *err)
 {
 	struct inode *orig_inode = o_filp->f_dentry->d_inode;
 	struct address_space *mapping = orig_inode->i_mapping;
@@ -829,9 +799,11 @@
 	long long offs = orig_page_offset << PAGE_CACHE_SHIFT;
 	unsigned long blocksize = orig_inode->i_sb->s_blocksize;
 	unsigned int w_flags = 0;
-	unsigned int tmp_data_len, data_len;
+	unsigned int tmp_data_size, data_size, replaced_size;
 	void *fsdata;
-	int ret, i, jblocks;
+	int i, jblocks;
+	int err2 = 0;
+	int replaced_count = 0;
 	int blocks_per_page = PAGE_CACHE_SIZE >> orig_inode->i_blkbits;
 
 	/*
@@ -841,8 +813,8 @@
 	jblocks = ext4_writepage_trans_blocks(orig_inode) * 2;
 	handle = ext4_journal_start(orig_inode, jblocks);
 	if (IS_ERR(handle)) {
-		ret = PTR_ERR(handle);
-		return ret;
+		*err = PTR_ERR(handle);
+		return 0;
 	}
 
 	if (segment_eq(get_fs(), KERNEL_DS))
@@ -858,39 +830,36 @@
 	 * Just swap data blocks between orig and donor.
 	 */
 	if (uninit) {
-		ret = mext_replace_branches(handle, orig_inode,
-						 donor_inode, orig_blk_offset,
-						 block_len_in_page);
-
-		/* Clear the inode cache not to refer to the old data */
-		ext4_ext_invalidate_cache(orig_inode);
-		ext4_ext_invalidate_cache(donor_inode);
+		replaced_count = mext_replace_branches(handle, orig_inode,
+						donor_inode, orig_blk_offset,
+						block_len_in_page, err);
 		goto out2;
 	}
 
 	offs = (long long)orig_blk_offset << orig_inode->i_blkbits;
 
-	/* Calculate data_len */
+	/* Calculate data_size */
 	if ((orig_blk_offset + block_len_in_page - 1) ==
 	    ((orig_inode->i_size - 1) >> orig_inode->i_blkbits)) {
 		/* Replace the last block */
-		tmp_data_len = orig_inode->i_size & (blocksize - 1);
+		tmp_data_size = orig_inode->i_size & (blocksize - 1);
 		/*
-		 * If data_len equal zero, it shows data_len is multiples of
+		 * If data_size equal zero, it shows data_size is multiples of
 		 * blocksize. So we set appropriate value.
 		 */
-		if (tmp_data_len == 0)
-			tmp_data_len = blocksize;
+		if (tmp_data_size == 0)
+			tmp_data_size = blocksize;
 
-		data_len = tmp_data_len +
+		data_size = tmp_data_size +
 			((block_len_in_page - 1) << orig_inode->i_blkbits);
-	} else {
-		data_len = block_len_in_page << orig_inode->i_blkbits;
-	}
+	} else
+		data_size = block_len_in_page << orig_inode->i_blkbits;
 
-	ret = a_ops->write_begin(o_filp, mapping, offs, data_len, w_flags,
+	replaced_size = data_size;
+
+	*err = a_ops->write_begin(o_filp, mapping, offs, data_size, w_flags,
 				 &page, &fsdata);
-	if (unlikely(ret < 0))
+	if (unlikely(*err < 0))
 		goto out;
 
 	if (!PageUptodate(page)) {
@@ -911,14 +880,17 @@
 	/* Release old bh and drop refs */
 	try_to_release_page(page, 0);
 
-	ret = mext_replace_branches(handle, orig_inode, donor_inode,
-					 orig_blk_offset, block_len_in_page);
-	if (ret < 0)
-		goto out;
-
-	/* Clear the inode cache not to refer to the old data */
-	ext4_ext_invalidate_cache(orig_inode);
-	ext4_ext_invalidate_cache(donor_inode);
+	replaced_count = mext_replace_branches(handle, orig_inode, donor_inode,
+					orig_blk_offset, block_len_in_page,
+					&err2);
+	if (err2) {
+		if (replaced_count) {
+			block_len_in_page = replaced_count;
+			replaced_size =
+				block_len_in_page << orig_inode->i_blkbits;
+		} else
+			goto out;
+	}
 
 	if (!page_has_buffers(page))
 		create_empty_buffers(page, 1 << orig_inode->i_blkbits, 0);
@@ -928,16 +900,16 @@
 		bh = bh->b_this_page;
 
 	for (i = 0; i < block_len_in_page; i++) {
-		ret = ext4_get_block(orig_inode,
+		*err = ext4_get_block(orig_inode,
 				(sector_t)(orig_blk_offset + i), bh, 0);
-		if (ret < 0)
+		if (*err < 0)
 			goto out;
 
 		if (bh->b_this_page != NULL)
 			bh = bh->b_this_page;
 	}
 
-	ret = a_ops->write_end(o_filp, mapping, offs, data_len, data_len,
+	*err = a_ops->write_end(o_filp, mapping, offs, data_size, replaced_size,
 			       page, fsdata);
 	page = NULL;
 
@@ -951,18 +923,20 @@
 out2:
 	ext4_journal_stop(handle);
 
-	return ret < 0 ? ret : 0;
+	if (err2)
+		*err = err2;
+
+	return replaced_count;
 }
 
 /**
- * mext_check_argumants - Check whether move extent can be done
+ * mext_check_arguments - Check whether move extent can be done
  *
  * @orig_inode:		original inode
  * @donor_inode:	donor inode
  * @orig_start:		logical start offset in block for orig
  * @donor_start:	logical start offset in block for donor
  * @len:		the number of blocks to be moved
- * @moved_len:		moved block length
  *
  * Check the arguments of ext4_move_extents() whether the files can be
  * exchanged with each other.
@@ -970,21 +944,23 @@
  */
 static int
 mext_check_arguments(struct inode *orig_inode,
-			  struct inode *donor_inode, __u64 orig_start,
-			  __u64 donor_start, __u64 *len, __u64 moved_len)
+		     struct inode *donor_inode, __u64 orig_start,
+		     __u64 donor_start, __u64 *len)
 {
 	ext4_lblk_t orig_blocks, donor_blocks;
 	unsigned int blkbits = orig_inode->i_blkbits;
 	unsigned int blocksize = 1 << blkbits;
 
-	/* Regular file check */
-	if (!S_ISREG(orig_inode->i_mode) || !S_ISREG(donor_inode->i_mode)) {
-		ext4_debug("ext4 move extent: The argument files should be "
-			"regular file [ino:orig %lu, donor %lu]\n",
-			orig_inode->i_ino, donor_inode->i_ino);
+	if (donor_inode->i_mode & (S_ISUID|S_ISGID)) {
+		ext4_debug("ext4 move extent: suid or sgid is set"
+			   " to donor file [ino:orig %lu, donor %lu]\n",
+			   orig_inode->i_ino, donor_inode->i_ino);
 		return -EINVAL;
 	}
 
+	if (IS_IMMUTABLE(donor_inode) || IS_APPEND(donor_inode))
+		return -EPERM;
+
 	/* Ext4 move extent does not support swapfile */
 	if (IS_SWAPFILE(orig_inode) || IS_SWAPFILE(donor_inode)) {
 		ext4_debug("ext4 move extent: The argument files should "
@@ -1002,11 +978,11 @@
 	}
 
 	/* Ext4 move extent supports only extent based file */
-	if (!(EXT4_I(orig_inode)->i_flags & EXT4_EXTENTS_FL)) {
+	if (!(ext4_test_inode_flag(orig_inode, EXT4_INODE_EXTENTS))) {
 		ext4_debug("ext4 move extent: orig file is not extents "
 			"based file [ino:orig %lu]\n", orig_inode->i_ino);
 		return -EOPNOTSUPP;
-	} else if (!(EXT4_I(donor_inode)->i_flags & EXT4_EXTENTS_FL)) {
+	} else if (!(ext4_test_inode_flag(donor_inode, EXT4_INODE_EXTENTS))) {
 		ext4_debug("ext4 move extent: donor file is not extents "
 			"based file [ino:donor %lu]\n", donor_inode->i_ino);
 		return -EOPNOTSUPP;
@@ -1025,13 +1001,6 @@
 		return -EINVAL;
 	}
 
-	if (moved_len) {
-		ext4_debug("ext4 move extent: moved_len should be 0 "
-			"[ino:orig %lu, donor %lu]\n", orig_inode->i_ino,
-			donor_inode->i_ino);
-		return -EINVAL;
-	}
-
 	if ((orig_start > EXT_MAX_BLOCK) ||
 	    (donor_start > EXT_MAX_BLOCK) ||
 	    (*len > EXT_MAX_BLOCK) ||
@@ -1232,16 +1201,24 @@
 		return -EINVAL;
 	}
 
-	/* protect orig and donor against a truncate */
+	/* Regular file check */
+	if (!S_ISREG(orig_inode->i_mode) || !S_ISREG(donor_inode->i_mode)) {
+		ext4_debug("ext4 move extent: The argument files should be "
+			"regular file [ino:orig %lu, donor %lu]\n",
+			orig_inode->i_ino, donor_inode->i_ino);
+		return -EINVAL;
+	}
+
+	/* Protect orig and donor inodes against a truncate */
 	ret1 = mext_inode_double_lock(orig_inode, donor_inode);
 	if (ret1 < 0)
 		return ret1;
 
-	mext_double_down_read(orig_inode, donor_inode);
+	/* Protect extent tree against block allocations via delalloc */
+	double_down_write_data_sem(orig_inode, donor_inode);
 	/* Check the filesystem environment whether move_extent can be done */
 	ret1 = mext_check_arguments(orig_inode, donor_inode, orig_start,
-					donor_start, &len, *moved_len);
-	mext_double_up_read(orig_inode, donor_inode);
+				    donor_start, &len);
 	if (ret1)
 		goto out;
 
@@ -1355,36 +1332,39 @@
 		seq_start = le32_to_cpu(ext_cur->ee_block);
 		rest_blocks = seq_blocks;
 
-		/* Discard preallocations of two inodes */
-		down_write(&EXT4_I(orig_inode)->i_data_sem);
-		ext4_discard_preallocations(orig_inode);
-		up_write(&EXT4_I(orig_inode)->i_data_sem);
-
-		down_write(&EXT4_I(donor_inode)->i_data_sem);
-		ext4_discard_preallocations(donor_inode);
-		up_write(&EXT4_I(donor_inode)->i_data_sem);
+		/*
+		 * Up semaphore to avoid following problems:
+		 * a. transaction deadlock among ext4_journal_start,
+		 *    ->write_begin via pagefault, and jbd2_journal_commit
+		 * b. racing with ->readpage, ->write_begin, and ext4_get_block
+		 *    in move_extent_per_page
+		 */
+		double_up_write_data_sem(orig_inode, donor_inode);
 
 		while (orig_page_offset <= seq_end_page) {
 
 			/* Swap original branches with new branches */
-			ret1 = move_extent_per_page(o_filp, donor_inode,
+			block_len_in_page = move_extent_per_page(
+						o_filp, donor_inode,
 						orig_page_offset,
 						data_offset_in_page,
-						block_len_in_page, uninit);
-			if (ret1 < 0)
-				goto out;
-			orig_page_offset++;
+						block_len_in_page, uninit,
+						&ret1);
+
 			/* Count how many blocks we have exchanged */
 			*moved_len += block_len_in_page;
+			if (ret1 < 0)
+				break;
 			if (*moved_len > len) {
 				ext4_error(orig_inode->i_sb, __func__,
 					"We replaced blocks too much! "
 					"sum of replaced: %llu requested: %llu",
 					*moved_len, len);
 				ret1 = -EIO;
-				goto out;
+				break;
 			}
 
+			orig_page_offset++;
 			data_offset_in_page = 0;
 			rest_blocks -= block_len_in_page;
 			if (rest_blocks > blocks_per_page)
@@ -1393,6 +1373,10 @@
 				block_len_in_page = rest_blocks;
 		}
 
+		double_down_write_data_sem(orig_inode, donor_inode);
+		if (ret1 < 0)
+			break;
+
 		/* Decrease buffer counter */
 		if (holecheck_path)
 			ext4_ext_drop_refs(holecheck_path);
@@ -1414,6 +1398,11 @@
 
 	}
 out:
+	if (*moved_len) {
+		ext4_discard_preallocations(orig_inode);
+		ext4_discard_preallocations(donor_inode);
+	}
+
 	if (orig_path) {
 		ext4_ext_drop_refs(orig_path);
 		kfree(orig_path);
@@ -1422,7 +1411,7 @@
 		ext4_ext_drop_refs(holecheck_path);
 		kfree(holecheck_path);
 	}
-
+	double_up_write_data_sem(orig_inode, donor_inode);
 	ret2 = mext_inode_double_unlock(orig_inode, donor_inode);
 
 	if (ret1)
--- linux-mvl-dove-2.6.32.orig/fs/ext4/ext4.h
+++ linux-mvl-dove-2.6.32/fs/ext4/ext4.h
@@ -29,6 +29,9 @@
 #include <linux/wait.h>
 #include <linux/blockgroup_lock.h>
 #include <linux/percpu_counter.h>
+#ifdef __KERNEL__
+#include <linux/compat.h>
+#endif
 
 /*
  * The fourth extended filesystem constants/structures
@@ -139,8 +142,8 @@
 	struct inode		*inode;		/* file being written to */
 	unsigned int		flag;		/* unwritten or not */
 	int			error;		/* I/O error code */
-	ext4_lblk_t		offset;		/* offset in the file */
-	size_t			size;		/* size of the extent */
+	loff_t			offset;		/* offset in the file */
+	ssize_t			size;		/* size of the extent */
 	struct work_struct	work;		/* data work queue */
 } ext4_io_end_t;
 
@@ -284,10 +287,12 @@
 #define EXT4_TOPDIR_FL			0x00020000 /* Top of directory hierarchies*/
 #define EXT4_HUGE_FILE_FL               0x00040000 /* Set to each huge file */
 #define EXT4_EXTENTS_FL			0x00080000 /* Inode uses extents */
+#define EXT4_EA_INODE_FL	        0x00200000 /* Inode used for large EA */
+#define EXT4_EOFBLOCKS_FL		0x00400000 /* Blocks allocated beyond EOF */
 #define EXT4_RESERVED_FL		0x80000000 /* reserved for ext4 lib */
 
-#define EXT4_FL_USER_VISIBLE		0x000BDFFF /* User visible flags */
-#define EXT4_FL_USER_MODIFIABLE		0x000B80FF /* User modifiable flags */
+#define EXT4_FL_USER_VISIBLE		0x004BDFFF /* User visible flags */
+#define EXT4_FL_USER_MODIFIABLE		0x004B80FF /* User modifiable flags */
 
 /* Flags that should be inherited by new inodes from their parent. */
 #define EXT4_FL_INHERITED (EXT4_SECRM_FL | EXT4_UNRM_FL | EXT4_COMPR_FL |\
@@ -314,15 +319,81 @@
 }
 
 /*
- * Inode dynamic state flags
+ * Inode flags used for atomic set/get
+ */
+enum {
+	EXT4_INODE_SECRM	= 0,	/* Secure deletion */
+	EXT4_INODE_UNRM		= 1,	/* Undelete */
+	EXT4_INODE_COMPR	= 2,	/* Compress file */
+	EXT4_INODE_SYNC		= 3,	/* Synchronous updates */
+	EXT4_INODE_IMMUTABLE	= 4,	/* Immutable file */
+	EXT4_INODE_APPEND	= 5,	/* writes to file may only append */
+	EXT4_INODE_NODUMP	= 6,	/* do not dump file */
+	EXT4_INODE_NOATIME	= 7,	/* do not update atime */
+/* Reserved for compression usage... */
+	EXT4_INODE_DIRTY	= 8,
+	EXT4_INODE_COMPRBLK	= 9,	/* One or more compressed clusters */
+	EXT4_INODE_NOCOMPR	= 10,	/* Don't compress */
+	EXT4_INODE_ECOMPR	= 11,	/* Compression error */
+/* End compression flags --- maybe not all used */
+	EXT4_INODE_INDEX	= 12,	/* hash-indexed directory */
+	EXT4_INODE_IMAGIC	= 13,	/* AFS directory */
+	EXT4_INODE_JOURNAL_DATA	= 14,	/* file data should be journaled */
+	EXT4_INODE_NOTAIL	= 15,	/* file tail should not be merged */
+	EXT4_INODE_DIRSYNC	= 16,	/* dirsync behaviour (directories only) */
+	EXT4_INODE_TOPDIR	= 17,	/* Top of directory hierarchies*/
+	EXT4_INODE_HUGE_FILE	= 18,	/* Set to each huge file */
+	EXT4_INODE_EXTENTS	= 19,	/* Inode uses extents */
+	EXT4_INODE_EA_INODE	= 21,	/* Inode used for large EA */
+	EXT4_INODE_EOFBLOCKS	= 22,	/* Blocks allocated beyond EOF */
+	EXT4_INODE_RESERVED	= 31,	/* reserved for ext4 lib */
+};
+
+#define TEST_FLAG_VALUE(FLAG) (EXT4_##FLAG##_FL == (1 << EXT4_INODE_##FLAG))
+#define CHECK_FLAG_VALUE(FLAG) if (!TEST_FLAG_VALUE(FLAG)) { \
+	printk(KERN_EMERG "EXT4 flag fail: " #FLAG ": %d %d\n", \
+		EXT4_##FLAG##_FL, EXT4_INODE_##FLAG); BUG_ON(1); }
+
+/*
+ * Since it's pretty easy to mix up bit numbers and hex values, and we
+ * can't do a compile-time test for ENUM values, we use a run-time
+ * test to make sure that EXT4_XXX_FL is consistent with respect to
+ * EXT4_INODE_XXX.  If all is well the printk and BUG_ON will all drop
+ * out so it won't cost any extra space in the compiled kernel image.
+ * But it's important that these values are the same, since we are
+ * using EXT4_INODE_XXX to test for the flag values, but EXT4_XX_FL
+ * must be consistent with the values of FS_XXX_FL defined in
+ * include/linux/fs.h and the on-disk values found in ext2, ext3, and
+ * ext4 filesystems, and of course the values defined in e2fsprogs.
+ *
+ * It's not paranoia if the Murphy's Law really *is* out to get you.  :-)
  */
-#define EXT4_STATE_JDATA		0x00000001 /* journaled data exists */
-#define EXT4_STATE_NEW			0x00000002 /* inode is newly created */
-#define EXT4_STATE_XATTR		0x00000004 /* has in-inode xattrs */
-#define EXT4_STATE_NO_EXPAND		0x00000008 /* No space for expansion */
-#define EXT4_STATE_DA_ALLOC_CLOSE	0x00000010 /* Alloc DA blks on close */
-#define EXT4_STATE_EXT_MIGRATE		0x00000020 /* Inode is migrating */
-#define EXT4_STATE_DIO_UNWRITTEN	0x00000040 /* need convert on dio done*/
+static inline void ext4_check_flag_values(void)
+{
+	CHECK_FLAG_VALUE(SECRM);
+	CHECK_FLAG_VALUE(UNRM);
+	CHECK_FLAG_VALUE(COMPR);
+	CHECK_FLAG_VALUE(SYNC);
+	CHECK_FLAG_VALUE(IMMUTABLE);
+	CHECK_FLAG_VALUE(APPEND);
+	CHECK_FLAG_VALUE(NODUMP);
+	CHECK_FLAG_VALUE(NOATIME);
+	CHECK_FLAG_VALUE(DIRTY);
+	CHECK_FLAG_VALUE(COMPRBLK);
+	CHECK_FLAG_VALUE(NOCOMPR);
+	CHECK_FLAG_VALUE(ECOMPR);
+	CHECK_FLAG_VALUE(INDEX);
+	CHECK_FLAG_VALUE(IMAGIC);
+	CHECK_FLAG_VALUE(JOURNAL_DATA);
+	CHECK_FLAG_VALUE(NOTAIL);
+	CHECK_FLAG_VALUE(DIRSYNC);
+	CHECK_FLAG_VALUE(TOPDIR);
+	CHECK_FLAG_VALUE(HUGE_FILE);
+	CHECK_FLAG_VALUE(EXTENTS);
+	CHECK_FLAG_VALUE(EA_INODE);
+	CHECK_FLAG_VALUE(EOFBLOCKS);
+	CHECK_FLAG_VALUE(RESERVED);
+}
 
 /* Used to pass group descriptor data when online resize is done */
 struct ext4_new_group_input {
@@ -335,6 +406,18 @@
 	__u16 unused;
 };
 
+#if defined(__KERNEL__) && defined(CONFIG_COMPAT)
+struct compat_ext4_new_group_input {
+	u32 group;
+	compat_u64 block_bitmap;
+	compat_u64 inode_bitmap;
+	compat_u64 inode_table;
+	u32 blocks_count;
+	u16 reserved_blocks;
+	u16 unused;
+};
+#endif
+
 /* The struct ext4_new_group_input in kernel space, with free_blocks_count */
 struct ext4_new_group_data {
 	__u32 group;
@@ -361,14 +444,11 @@
 	   so set the magic i_delalloc_reserve_flag after taking the 
 	   inode allocation semaphore for */
 #define EXT4_GET_BLOCKS_DELALLOC_RESERVE	0x0004
-	/* Call ext4_da_update_reserve_space() after successfully 
-	   allocating the blocks */
-#define EXT4_GET_BLOCKS_UPDATE_RESERVE_SPACE	0x0008
 	/* caller is from the direct IO path, request to creation of an
 	unitialized extents if not allocated, split the uninitialized
 	extent if blocks has been preallocated already*/
-#define EXT4_GET_BLOCKS_DIO			0x0010
-#define EXT4_GET_BLOCKS_CONVERT			0x0020
+#define EXT4_GET_BLOCKS_DIO			0x0008
+#define EXT4_GET_BLOCKS_CONVERT			0x0010
 #define EXT4_GET_BLOCKS_DIO_CREATE_EXT		(EXT4_GET_BLOCKS_DIO|\
 					 EXT4_GET_BLOCKS_CREATE_UNINIT_EXT)
 	/* Convert extent to initialized after direct IO complete */
@@ -397,6 +477,7 @@
 #define EXT4_IOC_ALLOC_DA_BLKS		_IO('f', 12)
 #define EXT4_IOC_MOVE_EXT		_IOWR('f', 15, struct move_extent)
 
+#if defined(__KERNEL__) && defined(CONFIG_COMPAT)
 /*
  * ioctl commands in 32 bit emulation
  */
@@ -407,11 +488,13 @@
 #define EXT4_IOC32_GETRSVSZ		_IOR('f', 5, int)
 #define EXT4_IOC32_SETRSVSZ		_IOW('f', 6, int)
 #define EXT4_IOC32_GROUP_EXTEND		_IOW('f', 7, unsigned int)
+#define EXT4_IOC32_GROUP_ADD		_IOW('f', 8, struct compat_ext4_new_group_input)
 #ifdef CONFIG_JBD2_DEBUG
 #define EXT4_IOC32_WAIT_FOR_READONLY	_IOR('f', 99, int)
 #endif
 #define EXT4_IOC32_GETVERSION_OLD	FS_IOC32_GETVERSION
 #define EXT4_IOC32_SETVERSION_OLD	FS_IOC32_SETVERSION
+#endif
 
 
 /*
@@ -615,9 +698,8 @@
  */
 struct ext4_inode_info {
 	__le32	i_data[15];	/* unconverted */
-	__u32	i_flags;
-	ext4_fsblk_t	i_file_acl;
 	__u32	i_dtime;
+	ext4_fsblk_t	i_file_acl;
 
 	/*
 	 * i_block_group is the number of the block group which contains
@@ -627,7 +709,8 @@
 	 * near to their parent directory's inode.
 	 */
 	ext4_group_t	i_block_group;
-	__u32	i_state;		/* Dynamic state flags for ext4 */
+	unsigned long	i_state_flags;		/* Dynamic state flags */
+	unsigned long	i_flags;
 
 	ext4_lblk_t		i_dir_start_lookup;
 #ifdef CONFIG_EXT4_FS_XATTR
@@ -693,16 +776,29 @@
 	unsigned int i_reserved_meta_blocks;
 	unsigned int i_allocated_meta_blocks;
 	unsigned short i_delalloc_reserved_flag;
+	sector_t i_da_metadata_calc_last_lblock;
+	int i_da_metadata_calc_len;
 
 	/* on-disk additional length */
 	__u16 i_extra_isize;
 
 	spinlock_t i_block_reservation_lock;
+#ifdef CONFIG_QUOTA
+	/* quota space reservation, managed internally by quota code */
+	qsize_t i_reserved_quota;
+#endif
 
 	/* completed async DIOs that might need unwritten extents handling */
 	struct list_head i_aio_dio_complete_list;
 	/* current io_end structure for async DIO write*/
 	ext4_io_end_t *cur_aio_dio;
+
+	/*
+	 * Transactions that contain inode's metadata needed to complete
+	 * fsync and fdatasync, respectively.
+	 */
+	tid_t i_sync_tid;
+	tid_t i_datasync_tid;
 };
 
 /*
@@ -750,6 +846,7 @@
 #define EXT4_MOUNT_DELALLOC		0x8000000 /* Delalloc support */
 #define EXT4_MOUNT_DATA_ERR_ABORT	0x10000000 /* Abort on file data write */
 #define EXT4_MOUNT_BLOCK_VALIDITY	0x20000000 /* Block validity checking */
+#define EXT4_MOUNT_DISCARD		0x40000000 /* Issue DISCARD requests */
 
 #define clear_opt(o, opt)		o &= ~EXT4_MOUNT_##opt
 #define set_opt(o, opt)			o |= EXT4_MOUNT_##opt
@@ -1033,6 +1130,37 @@
 		(ino >= EXT4_FIRST_INO(sb) &&
 		 ino <= le32_to_cpu(EXT4_SB(sb)->s_es->s_inodes_count));
 }
+
+/*
+ * Inode dynamic state flags
+ */
+enum {
+	EXT4_STATE_JDATA,		/* journaled data exists */
+	EXT4_STATE_NEW,			/* inode is newly created */
+	EXT4_STATE_XATTR,		/* has in-inode xattrs */
+	EXT4_STATE_NO_EXPAND,		/* No space for expansion */
+	EXT4_STATE_DA_ALLOC_CLOSE,	/* Alloc DA blks on close */
+	EXT4_STATE_EXT_MIGRATE,		/* Inode is migrating */
+	EXT4_STATE_DIO_UNWRITTEN,	/* need convert on dio done*/
+	EXT4_STATE_NEWENTRY,		/* File just added to dir */
+};
+
+#define EXT4_INODE_BIT_FNS(name, field)					\
+static inline int ext4_test_inode_##name(struct inode *inode, int bit)	\
+{									\
+	return test_bit(bit, &EXT4_I(inode)->i_##field);		\
+}									\
+static inline void ext4_set_inode_##name(struct inode *inode, int bit)	\
+{									\
+	set_bit(bit, &EXT4_I(inode)->i_##field);			\
+}									\
+static inline void ext4_clear_inode_##name(struct inode *inode, int bit) \
+{									\
+	clear_bit(bit, &EXT4_I(inode)->i_##field);			\
+}
+
+EXT4_INODE_BIT_FNS(flag, flags)
+EXT4_INODE_BIT_FNS(state, state_flags)
 #else
 /* Assume that user mode programs are passing in an ext4fs superblock, not
  * a kernel struct super_block.  This will allow us to call the feature-test
@@ -1217,7 +1345,7 @@
 
 #define is_dx(dir) (EXT4_HAS_COMPAT_FEATURE(dir->i_sb, \
 				      EXT4_FEATURE_COMPAT_DIR_INDEX) && \
-		      (EXT4_I(dir)->i_flags & EXT4_INDEX_FL))
+		    ext4_test_inode_flag((dir), EXT4_INODE_INDEX))
 #define EXT4_DIR_LINK_MAX(dir) (!is_dx(dir) && (dir)->i_nlink >= EXT4_LINK_MAX)
 #define EXT4_DIR_LINK_EMPTY(dir) ((dir)->i_nlink == 2 || (dir)->i_nlink == 1)
 
@@ -1424,8 +1552,10 @@
 extern int ext4_block_truncate_page(handle_t *handle,
 		struct address_space *mapping, loff_t from);
 extern int ext4_page_mkwrite(struct vm_area_struct *vma, struct vm_fault *vmf);
-extern qsize_t ext4_get_reserved_space(struct inode *inode);
+extern qsize_t *ext4_get_reserved_space(struct inode *inode);
 extern int flush_aio_dio_completed_IO(struct inode *inode);
+extern void ext4_da_update_reserve_space(struct inode *inode,
+					int used, int quota_claim);
 /* ioctl.c */
 extern long ext4_ioctl(struct file *, unsigned int, unsigned long);
 extern long ext4_compat_ioctl(struct file *, unsigned int, unsigned long);
@@ -1625,6 +1755,7 @@
 	ext4_grpblk_t	bb_first_free;	/* first free block */
 	ext4_grpblk_t	bb_free;	/* total free blocks */
 	ext4_grpblk_t	bb_fragments;	/* nr of freespace fragments */
+	ext4_grpblk_t	bb_largest_free_order;/* order of largest frag in BG */
 	struct          list_head bb_prealloc_list;
 #ifdef DOUBLE_CHECK
 	void            *bb_bitmap;
@@ -1728,7 +1859,7 @@
 extern long ext4_fallocate(struct inode *inode, int mode, loff_t offset,
 			  loff_t len);
 extern int ext4_convert_unwritten_extents(struct inode *inode, loff_t offset,
-			  loff_t len);
+			  ssize_t len);
 extern int ext4_get_blocks(handle_t *handle, struct inode *inode,
 			   sector_t block, unsigned int max_blocks,
 			   struct buffer_head *bh, int flags);
@@ -1757,6 +1888,8 @@
 	set_bit(BH_BITMAP_UPTODATE, &(bh)->b_state);
 }
 
+#define in_range(b, first, len)	((b) >= (first) && (b) <= (first) + (len) - 1)
+
 #endif	/* __KERNEL__ */
 
 #endif	/* _EXT4_H */
--- linux-mvl-dove-2.6.32.orig/fs/ext4/namei.c
+++ linux-mvl-dove-2.6.32/fs/ext4/namei.c
@@ -660,7 +660,7 @@
 	dxtrace(printk(KERN_DEBUG "In htree_fill_tree, start hash: %x:%x\n", 
 		       start_hash, start_minor_hash));
 	dir = dir_file->f_path.dentry->d_inode;
-	if (!(EXT4_I(dir)->i_flags & EXT4_INDEX_FL)) {
+	if (!(ext4_test_inode_flag(dir, EXT4_INODE_INDEX))) {
 		hinfo.hash_version = EXT4_SB(dir->i_sb)->s_def_hash_version;
 		if (hinfo.hash_version <= DX_HASH_TEA)
 			hinfo.hash_version +=
@@ -805,7 +805,7 @@
 {
 	if (!EXT4_HAS_COMPAT_FEATURE(inode->i_sb,
 				     EXT4_FEATURE_COMPAT_DIR_INDEX))
-		EXT4_I(inode)->i_flags &= ~EXT4_INDEX_FL;
+		ext4_clear_inode_flag(inode, EXT4_INODE_INDEX);
 }
 
 /*
@@ -1292,9 +1292,6 @@
  * add_dirent_to_buf will attempt search the directory block for
  * space.  It will return -ENOSPC if no space is available, and -EIO
  * and -EEXIST if directory entry already exists.
- *
- * NOTE!  bh is NOT released in the case where ENOSPC is returned.  In
- * all other cases bh is released.
  */
 static int add_dirent_to_buf(handle_t *handle, struct dentry *dentry,
 			     struct inode *inode, struct ext4_dir_entry_2 *de,
@@ -1315,14 +1312,10 @@
 		top = bh->b_data + blocksize - reclen;
 		while ((char *) de <= top) {
 			if (!ext4_check_dir_entry("ext4_add_entry", dir, de,
-						  bh, offset)) {
-				brelse(bh);
+						  bh, offset))
 				return -EIO;
-			}
-			if (ext4_match(namelen, name, de)) {
-				brelse(bh);
+			if (ext4_match(namelen, name, de))
 				return -EEXIST;
-			}
 			nlen = EXT4_DIR_REC_LEN(de->name_len);
 			rlen = ext4_rec_len_from_disk(de->rec_len, blocksize);
 			if ((de->inode? rlen - nlen: rlen) >= reclen)
@@ -1337,7 +1330,6 @@
 	err = ext4_journal_get_write_access(handle, bh);
 	if (err) {
 		ext4_std_error(dir->i_sb, err);
-		brelse(bh);
 		return err;
 	}
 
@@ -1377,7 +1369,6 @@
 	err = ext4_handle_dirty_metadata(handle, dir, bh);
 	if (err)
 		ext4_std_error(dir->i_sb, err);
-	brelse(bh);
 	return 0;
 }
 
@@ -1433,7 +1424,7 @@
 		brelse(bh);
 		return retval;
 	}
-	EXT4_I(dir)->i_flags |= EXT4_INDEX_FL;
+	ext4_set_inode_flag(dir, EXT4_INODE_INDEX);
 	data1 = bh2->b_data;
 
 	memcpy (data1, de, len);
@@ -1471,7 +1462,9 @@
 	if (!(de))
 		return retval;
 
-	return add_dirent_to_buf(handle, dentry, inode, de, bh);
+	retval = add_dirent_to_buf(handle, dentry, inode, de, bh);
+	brelse(bh);
+	return retval;
 }
 
 /*
@@ -1504,7 +1497,7 @@
 		retval = ext4_dx_add_entry(handle, dentry, inode);
 		if (!retval || (retval != ERR_BAD_DX_DIR))
 			return retval;
-		EXT4_I(dir)->i_flags &= ~EXT4_INDEX_FL;
+		ext4_clear_inode_flag(dir, EXT4_INODE_INDEX);
 		dx_fallback++;
 		ext4_mark_inode_dirty(handle, dir);
 	}
@@ -1514,8 +1507,10 @@
 		if(!bh)
 			return retval;
 		retval = add_dirent_to_buf(handle, dentry, inode, NULL, bh);
-		if (retval != -ENOSPC)
+		if (retval != -ENOSPC) {
+			brelse(bh);
 			return retval;
+		}
 
 		if (blocks == 1 && !dx_fallback &&
 		    EXT4_HAS_COMPAT_FEATURE(sb, EXT4_FEATURE_COMPAT_DIR_INDEX))
@@ -1528,7 +1523,11 @@
 	de = (struct ext4_dir_entry_2 *) bh->b_data;
 	de->inode = 0;
 	de->rec_len = ext4_rec_len_to_disk(blocksize, blocksize);
-	return add_dirent_to_buf(handle, dentry, inode, de, bh);
+	retval = add_dirent_to_buf(handle, dentry, inode, de, bh);
+	brelse(bh);
+	if (retval == 0)
+		ext4_set_inode_state(inode, EXT4_STATE_NEWENTRY);
+	return retval;
 }
 
 /*
@@ -1561,10 +1560,8 @@
 		goto journal_error;
 
 	err = add_dirent_to_buf(handle, dentry, inode, NULL, bh);
-	if (err != -ENOSPC) {
-		bh = NULL;
+	if (err != -ENOSPC)
 		goto cleanup;
-	}
 
 	/* Block full, should compress but for now just split */
 	dxtrace(printk(KERN_DEBUG "using %u of %u node entries\n",
@@ -1657,7 +1654,6 @@
 	if (!de)
 		goto cleanup;
 	err = add_dirent_to_buf(handle, dentry, inode, de, bh);
-	bh = NULL;
 	goto cleanup;
 
 journal_error:
@@ -1775,7 +1771,7 @@
 retry:
 	handle = ext4_journal_start(dir, EXT4_DATA_TRANS_BLOCKS(dir->i_sb) +
 					EXT4_INDEX_EXTRA_TRANS_BLOCKS + 3 +
-					2*EXT4_QUOTA_INIT_BLOCKS(dir->i_sb));
+					EXT4_MAXQUOTAS_INIT_BLOCKS(dir->i_sb));
 	if (IS_ERR(handle))
 		return PTR_ERR(handle);
 
@@ -1809,7 +1805,7 @@
 retry:
 	handle = ext4_journal_start(dir, EXT4_DATA_TRANS_BLOCKS(dir->i_sb) +
 					EXT4_INDEX_EXTRA_TRANS_BLOCKS + 3 +
-					2*EXT4_QUOTA_INIT_BLOCKS(dir->i_sb));
+					EXT4_MAXQUOTAS_INIT_BLOCKS(dir->i_sb));
 	if (IS_ERR(handle))
 		return PTR_ERR(handle);
 
@@ -1846,7 +1842,7 @@
 retry:
 	handle = ext4_journal_start(dir, EXT4_DATA_TRANS_BLOCKS(dir->i_sb) +
 					EXT4_INDEX_EXTRA_TRANS_BLOCKS + 3 +
-					2*EXT4_QUOTA_INIT_BLOCKS(dir->i_sb));
+					EXT4_MAXQUOTAS_INIT_BLOCKS(dir->i_sb));
 	if (IS_ERR(handle))
 		return PTR_ERR(handle);
 
@@ -2026,11 +2022,18 @@
 	err = ext4_reserve_inode_write(handle, inode, &iloc);
 	if (err)
 		goto out_unlock;
+	/*
+	 * Due to previous errors inode may be already a part of on-disk
+	 * orphan list. If so skip on-disk list modification.
+	 */
+	if (NEXT_ORPHAN(inode) && NEXT_ORPHAN(inode) <=
+		(le32_to_cpu(EXT4_SB(sb)->s_es->s_inodes_count)))
+			goto mem_insert;
 
 	/* Insert this inode at the head of the on-disk orphan list... */
 	NEXT_ORPHAN(inode) = le32_to_cpu(EXT4_SB(sb)->s_es->s_last_orphan);
 	EXT4_SB(sb)->s_es->s_last_orphan = cpu_to_le32(inode->i_ino);
-	err = ext4_handle_dirty_metadata(handle, inode, EXT4_SB(sb)->s_sbh);
+	err = ext4_handle_dirty_metadata(handle, NULL, EXT4_SB(sb)->s_sbh);
 	rc = ext4_mark_iloc_dirty(handle, inode, &iloc);
 	if (!err)
 		err = rc;
@@ -2043,6 +2046,7 @@
 	 *
 	 * This is safe: on error we're going to ignore the orphan list
 	 * anyway on the next recovery. */
+mem_insert:
 	if (!err)
 		list_add(&EXT4_I(inode)->i_orphan, &EXT4_SB(sb)->s_orphan);
 
@@ -2102,7 +2106,7 @@
 		if (err)
 			goto out_brelse;
 		sbi->s_es->s_last_orphan = cpu_to_le32(ino_next);
-		err = ext4_handle_dirty_metadata(handle, inode, sbi->s_sbh);
+		err = ext4_handle_dirty_metadata(handle, NULL, sbi->s_sbh);
 	} else {
 		struct ext4_iloc iloc2;
 		struct inode *i_prev =
@@ -2259,7 +2263,7 @@
 retry:
 	handle = ext4_journal_start(dir, EXT4_DATA_TRANS_BLOCKS(dir->i_sb) +
 					EXT4_INDEX_EXTRA_TRANS_BLOCKS + 5 +
-					2*EXT4_QUOTA_INIT_BLOCKS(dir->i_sb));
+					EXT4_MAXQUOTAS_INIT_BLOCKS(dir->i_sb));
 	if (IS_ERR(handle))
 		return PTR_ERR(handle);
 
@@ -2290,7 +2294,7 @@
 		}
 	} else {
 		/* clear the extent format for fast symlink */
-		EXT4_I(inode)->i_flags &= ~EXT4_EXTENTS_FL;
+		ext4_clear_inode_flag(inode, EXT4_INODE_EXTENTS);
 		inode->i_op = &ext4_fast_symlink_inode_operations;
 		memcpy((char *)&EXT4_I(inode)->i_data, symname, l);
 		inode->i_size = l-1;
--- linux-mvl-dove-2.6.32.orig/fs/ext4/migrate.c
+++ linux-mvl-dove-2.6.32/fs/ext4/migrate.c
@@ -238,7 +238,7 @@
 	 * So allocate a credit of 3. We may update
 	 * quota (user and group).
 	 */
-	needed = 3 + 2*EXT4_QUOTA_TRANS_BLOCKS(inode->i_sb);
+	needed = 3 + EXT4_MAXQUOTAS_TRANS_BLOCKS(inode->i_sb);
 
 	if (ext4_journal_extend(handle, needed) != 0)
 		retval = ext4_journal_restart(handle, needed);
@@ -357,12 +357,12 @@
 	 * happened after we started the migrate. We need to
 	 * fail the migrate
 	 */
-	if (!(EXT4_I(inode)->i_state & EXT4_STATE_EXT_MIGRATE)) {
+	if (!ext4_test_inode_state(inode, EXT4_STATE_EXT_MIGRATE)) {
 		retval = -EAGAIN;
 		up_write(&EXT4_I(inode)->i_data_sem);
 		goto err_out;
 	} else
-		EXT4_I(inode)->i_state &= ~EXT4_STATE_EXT_MIGRATE;
+		ext4_clear_inode_state(inode, EXT4_STATE_EXT_MIGRATE);
 	/*
 	 * We have the extent map build with the tmp inode.
 	 * Now copy the i_data across
@@ -465,7 +465,7 @@
 	 */
 	if (!EXT4_HAS_INCOMPAT_FEATURE(inode->i_sb,
 				       EXT4_FEATURE_INCOMPAT_EXTENTS) ||
-	    (EXT4_I(inode)->i_flags & EXT4_EXTENTS_FL))
+	    (ext4_test_inode_flag(inode, EXT4_INODE_EXTENTS)))
 		return -EINVAL;
 
 	if (S_ISLNK(inode->i_mode) && inode->i_blocks == 0)
@@ -477,7 +477,7 @@
 	handle = ext4_journal_start(inode,
 					EXT4_DATA_TRANS_BLOCKS(inode->i_sb) +
 					EXT4_INDEX_EXTRA_TRANS_BLOCKS + 3 +
-					2 * EXT4_QUOTA_INIT_BLOCKS(inode->i_sb)
+					EXT4_MAXQUOTAS_INIT_BLOCKS(inode->i_sb)
 					+ 1);
 	if (IS_ERR(handle)) {
 		retval = PTR_ERR(handle);
@@ -494,14 +494,10 @@
 	}
 	i_size_write(tmp_inode, i_size_read(inode));
 	/*
-	 * We don't want the inode to be reclaimed
-	 * if we got interrupted in between. We have
-	 * this tmp inode carrying reference to the
-	 * data blocks of the original file. We set
-	 * the i_nlink to zero at the last stage after
-	 * switching the original file to extent format
+	 * Set the i_nlink to zero so it will be deleted later
+	 * when we drop inode reference.
 	 */
-	tmp_inode->i_nlink = 1;
+	tmp_inode->i_nlink = 0;
 
 	ext4_ext_tree_init(handle, tmp_inode);
 	ext4_orphan_add(handle, tmp_inode);
@@ -524,10 +520,20 @@
 	 * allocation.
 	 */
 	down_read((&EXT4_I(inode)->i_data_sem));
-	EXT4_I(inode)->i_state |= EXT4_STATE_EXT_MIGRATE;
+	ext4_set_inode_state(inode, EXT4_STATE_EXT_MIGRATE);
 	up_read((&EXT4_I(inode)->i_data_sem));
 
 	handle = ext4_journal_start(inode, 1);
+	if (IS_ERR(handle)) {
+		/*
+		 * It is impossible to update on-disk structures without
+		 * a handle, so just rollback in-core changes and live other
+		 * work to orphan_list_cleanup()
+		 */
+		ext4_orphan_del(NULL, tmp_inode);
+		retval = PTR_ERR(handle);
+		goto out;
+	}
 
 	ei = EXT4_I(inode);
 	i_data = ei->i_data;
@@ -609,15 +615,8 @@
 
 	/* Reset the extent details */
 	ext4_ext_tree_init(handle, tmp_inode);
-
-	/*
-	 * Set the i_nlink to zero so that
-	 * generic_drop_inode really deletes the
-	 * inode
-	 */
-	tmp_inode->i_nlink = 0;
-
 	ext4_journal_stop(handle);
+out:
 	unlock_new_inode(tmp_inode);
 	iput(tmp_inode);
 
--- linux-mvl-dove-2.6.32.orig/fs/ext4/file.c
+++ linux-mvl-dove-2.6.32/fs/ext4/file.c
@@ -35,9 +35,9 @@
  */
 static int ext4_release_file(struct inode *inode, struct file *filp)
 {
-	if (EXT4_I(inode)->i_state & EXT4_STATE_DA_ALLOC_CLOSE) {
+	if (ext4_test_inode_state(inode, EXT4_STATE_DA_ALLOC_CLOSE)) {
 		ext4_alloc_da_blocks(inode);
-		EXT4_I(inode)->i_state &= ~EXT4_STATE_DA_ALLOC_CLOSE;
+		ext4_clear_inode_state(inode, EXT4_STATE_DA_ALLOC_CLOSE);
 	}
 	/* if we are the last writer on the inode, drop the block reservation */
 	if ((filp->f_mode & FMODE_WRITE) &&
@@ -65,7 +65,7 @@
 	 * is smaller than s_maxbytes, which is for extent-mapped files.
 	 */
 
-	if (!(EXT4_I(inode)->i_flags & EXT4_EXTENTS_FL)) {
+	if (!(ext4_test_inode_flag(inode, EXT4_INODE_EXTENTS))) {
 		struct ext4_sb_info *sbi = EXT4_SB(inode->i_sb);
 		size_t length = iov_length(iov, nr_segs);
 
--- linux-mvl-dove-2.6.32.orig/fs/ext4/mballoc.c
+++ linux-mvl-dove-2.6.32/fs/ext4/mballoc.c
@@ -658,6 +658,27 @@
 	}
 }
 
+/*
+ * Cache the order of the largest free extent we have available in this block
+ * group.
+ */
+static void
+mb_set_largest_free_order(struct super_block *sb, struct ext4_group_info *grp)
+{
+	int i;
+	int bits;
+
+	grp->bb_largest_free_order = -1; /* uninit */
+
+	bits = sb->s_blocksize_bits + 1;
+	for (i = bits; i >= 0; i--) {
+		if (grp->bb_counters[i] > 0) {
+			grp->bb_largest_free_order = i;
+			break;
+		}
+	}
+}
+
 static noinline_for_stack
 void ext4_mb_generate_buddy(struct super_block *sb,
 				void *buddy, void *bitmap, ext4_group_t group)
@@ -700,6 +721,7 @@
 		 */
 		grp->bb_free = free;
 	}
+	mb_set_largest_free_order(sb, grp);
 
 	clear_bit(EXT4_GROUP_INFO_NEED_INIT_BIT, &(grp->bb_state));
 
@@ -725,6 +747,9 @@
  * contain blocks_per_page (PAGE_CACHE_SIZE / blocksize)  blocks.
  * So it can have information regarding groups_per_page which
  * is blocks_per_page/2
+ *
+ * Locking note:  This routine takes the block group lock of all groups
+ * for this page; do not hold this lock when calling this routine!
  */
 
 static int ext4_mb_init_cache(struct page *page, char *incore)
@@ -910,6 +935,11 @@
 	return err;
 }
 
+/*
+ * Locking note:  This routine calls ext4_mb_init_cache(), which takes the
+ * block group lock of all groups for this page; do not hold the BG lock when
+ * calling this routine!
+ */
 static noinline_for_stack
 int ext4_mb_init_group(struct super_block *sb, ext4_group_t group)
 {
@@ -1004,6 +1034,11 @@
 	return ret;
 }
 
+/*
+ * Locking note:  This routine calls ext4_mb_init_cache(), which takes the
+ * block group lock of all groups for this page; do not hold the BG lock when
+ * calling this routine!
+ */
 static noinline_for_stack int
 ext4_mb_load_buddy(struct super_block *sb, ext4_group_t group,
 					struct ext4_buddy *e4b)
@@ -1138,6 +1173,8 @@
 	return 0;
 
 err:
+	if (page)
+		page_cache_release(page);
 	if (e4b->bd_bitmap_page)
 		page_cache_release(e4b->bd_bitmap_page);
 	if (e4b->bd_buddy_page)
@@ -1150,7 +1187,7 @@
 	return ret;
 }
 
-static void ext4_mb_release_desc(struct ext4_buddy *e4b)
+static void ext4_mb_unload_buddy(struct ext4_buddy *e4b)
 {
 	if (e4b->bd_bitmap_page)
 		page_cache_release(e4b->bd_bitmap_page);
@@ -1300,6 +1337,7 @@
 			buddy = buddy2;
 		} while (1);
 	}
+	mb_set_largest_free_order(sb, e4b->bd_info);
 	mb_check_buddy(e4b);
 }
 
@@ -1428,6 +1466,7 @@
 		e4b->bd_info->bb_counters[ord]++;
 		e4b->bd_info->bb_counters[ord]++;
 	}
+	mb_set_largest_free_order(e4b->bd_sb, e4b->bd_info);
 
 	mb_set_bits(EXT4_MB_BITMAP(e4b), ex->fe_start, len0);
 	mb_check_buddy(e4b);
@@ -1618,7 +1657,7 @@
 	}
 
 	ext4_unlock_group(ac->ac_sb, group);
-	ext4_mb_release_desc(e4b);
+	ext4_mb_unload_buddy(e4b);
 
 	return 0;
 }
@@ -1674,7 +1713,7 @@
 		ext4_mb_use_best_found(ac, e4b);
 	}
 	ext4_unlock_group(ac->ac_sb, group);
-	ext4_mb_release_desc(e4b);
+	ext4_mb_unload_buddy(e4b);
 
 	return 0;
 }
@@ -1823,16 +1862,22 @@
 	}
 }
 
+/* This is now called BEFORE we load the buddy bitmap. */
 static int ext4_mb_good_group(struct ext4_allocation_context *ac,
 				ext4_group_t group, int cr)
 {
 	unsigned free, fragments;
-	unsigned i, bits;
 	int flex_size = ext4_flex_bg_size(EXT4_SB(ac->ac_sb));
 	struct ext4_group_info *grp = ext4_get_group_info(ac->ac_sb, group);
 
 	BUG_ON(cr < 0 || cr >= 4);
-	BUG_ON(EXT4_MB_GRP_NEED_INIT(grp));
+
+	/* We only do this if the grp has never been initialized */
+	if (unlikely(EXT4_MB_GRP_NEED_INIT(grp))) {
+		int ret = ext4_mb_init_group(ac->ac_sb, group);
+		if (ret)
+			return 0;
+	}
 
 	free = grp->bb_free;
 	fragments = grp->bb_fragments;
@@ -1845,17 +1890,16 @@
 	case 0:
 		BUG_ON(ac->ac_2order == 0);
 
+		if (grp->bb_largest_free_order < ac->ac_2order)
+			return 0;
+
 		/* Avoid using the first bg of a flexgroup for data files */
 		if ((ac->ac_flags & EXT4_MB_HINT_DATA) &&
 		    (flex_size >= EXT4_FLEX_SIZE_DIR_ALLOC_SCHEME) &&
 		    ((group % flex_size) == 0))
 			return 0;
 
-		bits = ac->ac_sb->s_blocksize_bits + 1;
-		for (i = ac->ac_2order; i <= bits; i++)
-			if (grp->bb_counters[i] > 0)
-				return 1;
-		break;
+		return 1;
 	case 1:
 		if ((free / fragments) >= ac->ac_g_ex.fe_len)
 			return 1;
@@ -1966,7 +2010,7 @@
 	sbi = EXT4_SB(sb);
 	ngroups = ext4_get_groups_count(sb);
 	/* non-extent files are limited to low blocks/groups */
-	if (!(EXT4_I(ac->ac_inode)->i_flags & EXT4_EXTENTS_FL))
+	if (!(ext4_test_inode_flag(ac->ac_inode, EXT4_INODE_EXTENTS)))
 		ngroups = sbi->s_blockfile_groups;
 
 	BUG_ON(ac->ac_status == AC_STATUS_FOUND);
@@ -2026,15 +2070,11 @@
 		group = ac->ac_g_ex.fe_group;
 
 		for (i = 0; i < ngroups; group++, i++) {
-			struct ext4_group_info *grp;
-			struct ext4_group_desc *desc;
-
 			if (group == ngroups)
 				group = 0;
 
-			/* quick check to skip empty groups */
-			grp = ext4_get_group_info(sb, group);
-			if (grp->bb_free == 0)
+			/* This now checks without needing the buddy page */
+			if (!ext4_mb_good_group(ac, group, cr))
 				continue;
 
 			err = ext4_mb_load_buddy(sb, group, &e4b);
@@ -2042,15 +2082,18 @@
 				goto out;
 
 			ext4_lock_group(sb, group);
+
+			/*
+			 * We need to check again after locking the
+			 * block group
+			 */
 			if (!ext4_mb_good_group(ac, group, cr)) {
-				/* someone did allocation from this group */
 				ext4_unlock_group(sb, group);
-				ext4_mb_release_desc(&e4b);
+				ext4_mb_unload_buddy(&e4b);
 				continue;
 			}
 
 			ac->ac_groups_scanned++;
-			desc = ext4_get_group_desc(sb, group, NULL);
 			if (cr == 0)
 				ext4_mb_simple_scan_group(ac, &e4b);
 			else if (cr == 1 &&
@@ -2060,7 +2103,7 @@
 				ext4_mb_complex_scan_group(ac, &e4b);
 
 			ext4_unlock_group(sb, group);
-			ext4_mb_release_desc(&e4b);
+			ext4_mb_unload_buddy(&e4b);
 
 			if (ac->ac_status != AC_STATUS_CONTINUE)
 				break;
@@ -2150,7 +2193,7 @@
 	ext4_lock_group(sb, group);
 	memcpy(&sg, ext4_get_group_info(sb, group), i);
 	ext4_unlock_group(sb, group);
-	ext4_mb_release_desc(&e4b);
+	ext4_mb_unload_buddy(&e4b);
 
 	seq_printf(seq, "#%-5u: %-5u %-5u %-5u [", group, sg.info.bb_free,
 			sg.info.bb_fragments, sg.info.bb_first_free);
@@ -2257,6 +2300,7 @@
 	INIT_LIST_HEAD(&meta_group_info[i]->bb_prealloc_list);
 	init_rwsem(&meta_group_info[i]->alloc_sem);
 	meta_group_info[i]->bb_free_root.rb_node = NULL;
+	meta_group_info[i]->bb_largest_free_order = -1;  /* uninit */
 
 #ifdef DOUBLE_CHECK
 	{
@@ -2529,7 +2573,6 @@
 	struct ext4_group_info *db;
 	int err, count = 0, count2 = 0;
 	struct ext4_free_data *entry;
-	ext4_fsblk_t discard_block;
 	struct list_head *l, *ltmp;
 
 	list_for_each_safe(l, ltmp, &txn->t_private_list) {
@@ -2538,6 +2581,23 @@
 		mb_debug(1, "gonna free %u blocks in group %u (0x%p):",
 			 entry->count, entry->group, entry);
 
+		if (test_opt(sb, DISCARD)) {
+			int ret;
+			ext4_fsblk_t discard_block;
+
+			discard_block = entry->start_blk +
+				ext4_group_first_block_no(sb, entry->group);
+			trace_ext4_discard_blocks(sb,
+					(unsigned long long)discard_block,
+					entry->count);
+			ret = sb_issue_discard(sb, discard_block, entry->count);
+			if (ret == EOPNOTSUPP) {
+				ext4_warning(sb, __func__,
+					"discard not supported, disabling");
+				clear_opt(EXT4_SB(sb)->s_mount_opt, DISCARD);
+			}
+		}
+
 		err = ext4_mb_load_buddy(sb, entry->group, &e4b);
 		/* we expect to find existing buddy because it's pinned */
 		BUG_ON(err != 0);
@@ -2559,15 +2619,8 @@
 			page_cache_release(e4b.bd_bitmap_page);
 		}
 		ext4_unlock_group(sb, entry->group);
-		discard_block = (ext4_fsblk_t) entry->group * EXT4_BLOCKS_PER_GROUP(sb)
-			+ entry->start_blk
-			+ le32_to_cpu(EXT4_SB(sb)->s_es->s_first_data_block);
-		trace_ext4_discard_blocks(sb, (unsigned long long)discard_block,
-					  entry->count);
-		sb_issue_discard(sb, discard_block, entry->count);
-
 		kmem_cache_free(ext4_free_ext_cachep, entry);
-		ext4_mb_release_desc(&e4b);
+		ext4_mb_unload_buddy(&e4b);
 	}
 
 	mb_debug(1, "freed %u blocks in %u structures\n", count, count2);
@@ -2750,12 +2803,6 @@
 	if (!(ac->ac_flags & EXT4_MB_DELALLOC_RESERVED))
 		/* release all the reserved blocks if non delalloc */
 		percpu_counter_sub(&sbi->s_dirtyblocks_counter, reserv_blks);
-	else {
-		percpu_counter_sub(&sbi->s_dirtyblocks_counter,
-						ac->ac_b_ex.fe_len);
-		/* convert reserved quota blocks to real quota blocks */
-		vfs_dq_claim_block(ac->ac_inode, ac->ac_b_ex.fe_len);
-	}
 
 	if (sbi->s_log_groups_per_flex) {
 		ext4_group_t flex_group = ext4_flex_group(sbi,
@@ -3006,6 +3053,24 @@
 }
 
 /*
+ * Called on failure; free up any blocks from the inode PA for this
+ * context.  We don't need this for MB_GROUP_PA because we only change
+ * pa_free in ext4_mb_release_context(), but on failure, we've already
+ * zeroed out ac->ac_b_ex.fe_len, so group_pa->pa_free is not changed.
+ */
+static void ext4_discard_allocated_blocks(struct ext4_allocation_context *ac)
+{
+	struct ext4_prealloc_space *pa = ac->ac_pa;
+	int len;
+
+	if (pa && pa->pa_type == MB_INODE_PA) {
+		len = ac->ac_b_ex.fe_len;
+		pa->pa_free += len;
+	}
+
+}
+
+/*
  * use blocks preallocated to inode
  */
 static void ext4_mb_use_inode_pa(struct ext4_allocation_context *ac,
@@ -3113,7 +3178,7 @@
 			continue;
 
 		/* non-extent files can't have physical blocks past 2^32 */
-		if (!(EXT4_I(ac->ac_inode)->i_flags & EXT4_EXTENTS_FL) &&
+		if (!(ext4_test_inode_flag(ac->ac_inode, EXT4_INODE_EXTENTS)) &&
 			pa->pa_pstart + pa->pa_len > EXT4_MAX_BLOCK_FILE_PHYS)
 			continue;
 
@@ -3692,7 +3757,7 @@
 	ext4_unlock_group(sb, group);
 	if (ac)
 		kmem_cache_free(ext4_ac_cachep, ac);
-	ext4_mb_release_desc(&e4b);
+	ext4_mb_unload_buddy(&e4b);
 	put_bh(bitmap_bh);
 	return free;
 }
@@ -3796,7 +3861,7 @@
 		if (bitmap_bh == NULL) {
 			ext4_error(sb, __func__, "Error in reading block "
 					"bitmap for %u", group);
-			ext4_mb_release_desc(&e4b);
+			ext4_mb_unload_buddy(&e4b);
 			continue;
 		}
 
@@ -3805,7 +3870,7 @@
 		ext4_mb_release_inode_pa(&e4b, bitmap_bh, pa, ac);
 		ext4_unlock_group(sb, group);
 
-		ext4_mb_release_desc(&e4b);
+		ext4_mb_unload_buddy(&e4b);
 		put_bh(bitmap_bh);
 
 		list_del(&pa->u.pa_tmp_list);
@@ -3921,7 +3986,7 @@
 
 	/* don't use group allocation for large files */
 	size = max(size, isize);
-	if (size >= sbi->s_mb_stream_request) {
+	if (size > sbi->s_mb_stream_request) {
 		ac->ac_flags |= EXT4_MB_STREAM_ALLOC;
 		return;
 	}
@@ -4069,7 +4134,7 @@
 		ext4_mb_release_group_pa(&e4b, pa, ac);
 		ext4_unlock_group(sb, group);
 
-		ext4_mb_release_desc(&e4b);
+		ext4_mb_unload_buddy(&e4b);
 		list_del(&pa->u.pa_tmp_list);
 		call_rcu(&(pa)->u.pa_rcu, ext4_mb_pa_callback);
 	}
@@ -4290,6 +4355,7 @@
 			ac->ac_status = AC_STATUS_CONTINUE;
 			goto repeat;
 		} else if (*errp) {
+			ext4_discard_allocated_blocks(ac);
 			ac->ac_b_ex.fe_len = 0;
 			ar->len = 0;
 			ext4_mb_show_ac(ac);
@@ -4570,7 +4636,7 @@
 		atomic_add(count, &sbi->s_flex_groups[flex_group].free_blocks);
 	}
 
-	ext4_mb_release_desc(&e4b);
+	ext4_mb_unload_buddy(&e4b);
 
 	*freed += count;
 
--- linux-mvl-dove-2.6.32.orig/fs/ext4/ext4_extents.h
+++ linux-mvl-dove-2.6.32/fs/ext4/ext4_extents.h
@@ -225,7 +225,8 @@
 	ext->ee_len = cpu_to_le16(ext4_ext_get_actual_len(ext));
 }
 
-extern int ext4_ext_calc_metadata_amount(struct inode *inode, int blocks);
+extern int ext4_ext_calc_metadata_amount(struct inode *inode,
+					 sector_t lblocks);
 extern ext4_fsblk_t ext_pblock(struct ext4_extent *ex);
 extern ext4_fsblk_t idx_pblock(struct ext4_extent_idx *);
 extern void ext4_ext_store_pblock(struct ext4_extent *, ext4_fsblk_t);
--- linux-mvl-dove-2.6.32.orig/fs/ext4/super.c
+++ linux-mvl-dove-2.6.32/fs/ext4/super.c
@@ -227,6 +227,7 @@
 	if (sb->s_flags & MS_RDONLY)
 		return ERR_PTR(-EROFS);
 
+	vfs_check_frozen(sb, SB_FREEZE_TRANS);
 	/* Special case here: if the journal has aborted behind our
 	 * backs (eg. EIO in the commit thread), then we still need to
 	 * take the FS itself readonly cleanly. */
@@ -603,10 +604,6 @@
 	if (sb->s_dirt)
 		ext4_commit_super(sb, 1);
 
-	ext4_release_system_zone(sb);
-	ext4_mb_release(sb);
-	ext4_ext_release(sb);
-	ext4_xattr_put_super(sb);
 	if (sbi->s_journal) {
 		err = jbd2_journal_destroy(sbi->s_journal);
 		sbi->s_journal = NULL;
@@ -614,6 +611,12 @@
 			ext4_abort(sb, __func__,
 				   "Couldn't clean up the journal");
 	}
+
+	ext4_release_system_zone(sb);
+	ext4_mb_release(sb);
+	ext4_ext_release(sb);
+	ext4_xattr_put_super(sb);
+
 	if (!(sb->s_flags & MS_RDONLY)) {
 		EXT4_CLEAR_INCOMPAT_FEATURE(sb, EXT4_FEATURE_INCOMPAT_RECOVER);
 		es->s_state = cpu_to_le16(sbi->s_mount_state);
@@ -700,10 +703,16 @@
 	ei->i_reserved_data_blocks = 0;
 	ei->i_reserved_meta_blocks = 0;
 	ei->i_allocated_meta_blocks = 0;
+	ei->i_da_metadata_calc_len = 0;
 	ei->i_delalloc_reserved_flag = 0;
 	spin_lock_init(&(ei->i_block_reservation_lock));
+#ifdef CONFIG_QUOTA
+	ei->i_reserved_quota = 0;
+#endif
 	INIT_LIST_HEAD(&ei->i_aio_dio_complete_list);
 	ei->cur_aio_dio = NULL;
+	ei->i_sync_tid = 0;
+	ei->i_datasync_tid = 0;
 
 	return &ei->vfs_inode;
 }
@@ -868,6 +877,8 @@
 	seq_puts(seq, test_opt(sb, BARRIER) ? "1" : "0");
 	if (test_opt(sb, JOURNAL_ASYNC_COMMIT))
 		seq_puts(seq, ",journal_async_commit");
+	else if (test_opt(sb, JOURNAL_CHECKSUM))
+		seq_puts(seq, ",journal_checksum");
 	if (test_opt(sb, NOBH))
 		seq_puts(seq, ",nobh");
 	if (test_opt(sb, I_VERSION))
@@ -899,6 +910,12 @@
 	if (test_opt(sb, NO_AUTO_DA_ALLOC))
 		seq_puts(seq, ",noauto_da_alloc");
 
+	if (test_opt(sb, DISCARD))
+		seq_puts(seq, ",discard");
+
+	if (test_opt(sb, NOLOAD))
+		seq_puts(seq, ",norecovery");
+
 	ext4_show_quota_options(seq, sb);
 
 	return 0;
@@ -991,7 +1008,9 @@
 	.reserve_space	= dquot_reserve_space,
 	.claim_space	= dquot_claim_space,
 	.release_rsv	= dquot_release_reserved_space,
+#ifdef CONFIG_QUOTA
 	.get_reserved_space = ext4_get_reserved_space,
+#endif
 	.alloc_inode	= dquot_alloc_inode,
 	.free_space	= dquot_free_space,
 	.free_inode	= dquot_free_inode,
@@ -1079,7 +1098,8 @@
 	Opt_usrquota, Opt_grpquota, Opt_i_version,
 	Opt_stripe, Opt_delalloc, Opt_nodelalloc,
 	Opt_block_validity, Opt_noblock_validity,
-	Opt_inode_readahead_blks, Opt_journal_ioprio
+	Opt_inode_readahead_blks, Opt_journal_ioprio,
+	Opt_discard, Opt_nodiscard,
 };
 
 static const match_table_t tokens = {
@@ -1104,6 +1124,7 @@
 	{Opt_acl, "acl"},
 	{Opt_noacl, "noacl"},
 	{Opt_noload, "noload"},
+	{Opt_noload, "norecovery"},
 	{Opt_nobh, "nobh"},
 	{Opt_bh, "bh"},
 	{Opt_commit, "commit=%u"},
@@ -1144,6 +1165,8 @@
 	{Opt_auto_da_alloc, "auto_da_alloc=%u"},
 	{Opt_auto_da_alloc, "auto_da_alloc"},
 	{Opt_noauto_da_alloc, "noauto_da_alloc"},
+	{Opt_discard, "discard"},
+	{Opt_nodiscard, "nodiscard"},
 	{Opt_err, NULL},
 };
 
@@ -1195,6 +1218,11 @@
 		if (!*p)
 			continue;
 
+		/*
+		 * Initialize args struct so we know whether arg was
+		 * found; some options take optional arguments.
+		 */
+		args[0].to = args[0].from = 0;
 		token = match_token(p, tokens, args);
 		switch (token) {
 		case Opt_bsd_df:
@@ -1480,10 +1508,11 @@
 			clear_opt(sbi->s_mount_opt, BARRIER);
 			break;
 		case Opt_barrier:
-			if (match_int(&args[0], &option)) {
-				set_opt(sbi->s_mount_opt, BARRIER);
-				break;
-			}
+			if (args[0].from) {
+				if (match_int(&args[0], &option))
+					return 0;
+			} else
+				option = 1;	/* No argument, default to 1 */
 			if (option)
 				set_opt(sbi->s_mount_opt, BARRIER);
 			else
@@ -1556,15 +1585,22 @@
 			set_opt(sbi->s_mount_opt,NO_AUTO_DA_ALLOC);
 			break;
 		case Opt_auto_da_alloc:
-			if (match_int(&args[0], &option)) {
-				clear_opt(sbi->s_mount_opt, NO_AUTO_DA_ALLOC);
-				break;
-			}
+			if (args[0].from) {
+				if (match_int(&args[0], &option))
+					return 0;
+			} else
+				option = 1;	/* No argument, default to 1 */
 			if (option)
 				clear_opt(sbi->s_mount_opt, NO_AUTO_DA_ALLOC);
 			else
 				set_opt(sbi->s_mount_opt,NO_AUTO_DA_ALLOC);
 			break;
+		case Opt_discard:
+			set_opt(sbi->s_mount_opt, DISCARD);
+			break;
+		case Opt_nodiscard:
+			clear_opt(sbi->s_mount_opt, DISCARD);
+			break;
 		default:
 			ext4_msg(sb, KERN_ERR,
 			       "Unrecognized mount option \"%s\" "
@@ -1673,14 +1709,14 @@
 	size_t size;
 	int i;
 
-	if (!sbi->s_es->s_log_groups_per_flex) {
+	sbi->s_log_groups_per_flex = sbi->s_es->s_log_groups_per_flex;
+	groups_per_flex = 1 << sbi->s_log_groups_per_flex;
+
+	if (groups_per_flex < 2) {
 		sbi->s_log_groups_per_flex = 0;
 		return 1;
 	}
 
-	sbi->s_log_groups_per_flex = sbi->s_es->s_log_groups_per_flex;
-	groups_per_flex = 1 << sbi->s_log_groups_per_flex;
-
 	/* We allocate both existing and potentially added groups */
 	flex_group_count = ((sbi->s_groups_count + groups_per_flex - 1) +
 			((le16_to_cpu(sbi->s_es->s_reserved_gdt_blocks) + 1) <<
@@ -2668,24 +2704,6 @@
 	get_random_bytes(&sbi->s_next_generation, sizeof(u32));
 	spin_lock_init(&sbi->s_next_gen_lock);
 
-	err = percpu_counter_init(&sbi->s_freeblocks_counter,
-			ext4_count_free_blocks(sb));
-	if (!err) {
-		err = percpu_counter_init(&sbi->s_freeinodes_counter,
-				ext4_count_free_inodes(sb));
-	}
-	if (!err) {
-		err = percpu_counter_init(&sbi->s_dirs_counter,
-				ext4_count_dirs(sb));
-	}
-	if (!err) {
-		err = percpu_counter_init(&sbi->s_dirtyblocks_counter, 0);
-	}
-	if (err) {
-		ext4_msg(sb, KERN_ERR, "insufficient memory");
-		goto failed_mount3;
-	}
-
 	sbi->s_stripe = ext4_get_stripe_size(sbi);
 	sbi->s_max_writeback_mb_bump = 128;
 
@@ -2805,7 +2823,20 @@
 	set_task_ioprio(sbi->s_journal->j_task, journal_ioprio);
 
 no_journal:
-
+	err = percpu_counter_init(&sbi->s_freeblocks_counter,
+				  ext4_count_free_blocks(sb));
+	if (!err)
+		err = percpu_counter_init(&sbi->s_freeinodes_counter,
+					  ext4_count_free_inodes(sb));
+	if (!err)
+		err = percpu_counter_init(&sbi->s_dirs_counter,
+					  ext4_count_dirs(sb));
+	if (!err)
+		err = percpu_counter_init(&sbi->s_dirtyblocks_counter, 0);
+	if (err) {
+		ext4_msg(sb, KERN_ERR, "insufficient memory");
+		goto failed_mount_wq;
+	}
 	if (test_opt(sb, NOBH)) {
 		if (!(test_opt(sb, DATA_FLAGS) == EXT4_MOUNT_WRITEBACK_DATA)) {
 			ext4_msg(sb, KERN_WARNING, "Ignoring nobh option - "
@@ -2880,7 +2911,7 @@
 	err = ext4_setup_system_zone(sb);
 	if (err) {
 		ext4_msg(sb, KERN_ERR, "failed to initialize system "
-			 "zone (%d)\n", err);
+			 "zone (%d)", err);
 		goto failed_mount4;
 	}
 
@@ -2938,6 +2969,10 @@
 		jbd2_journal_destroy(sbi->s_journal);
 		sbi->s_journal = NULL;
 	}
+	percpu_counter_destroy(&sbi->s_freeblocks_counter);
+	percpu_counter_destroy(&sbi->s_freeinodes_counter);
+	percpu_counter_destroy(&sbi->s_dirs_counter);
+	percpu_counter_destroy(&sbi->s_dirtyblocks_counter);
 failed_mount3:
 	if (sbi->s_flex_groups) {
 		if (is_vmalloc_addr(sbi->s_flex_groups))
@@ -2945,10 +2980,6 @@
 		else
 			kfree(sbi->s_flex_groups);
 	}
-	percpu_counter_destroy(&sbi->s_freeblocks_counter);
-	percpu_counter_destroy(&sbi->s_freeinodes_counter);
-	percpu_counter_destroy(&sbi->s_dirs_counter);
-	percpu_counter_destroy(&sbi->s_dirtyblocks_counter);
 failed_mount2:
 	for (i = 0; i < db_count; i++)
 		brelse(sbi->s_group_desc[i]);
@@ -3365,8 +3396,10 @@
 		return 0;
 
 	journal = EXT4_SB(sb)->s_journal;
-	if (journal)
+	if (journal) {
+		vfs_check_frozen(sb, SB_FREEZE_TRANS);
 		ret = ext4_journal_force_commit(journal);
+	}
 
 	return ret;
 }
@@ -3415,18 +3448,16 @@
 	 * the journal.
 	 */
 	error = jbd2_journal_flush(journal);
-	if (error < 0) {
-	out:
-		jbd2_journal_unlock_updates(journal);
-		return error;
-	}
+	if (error < 0)
+		goto out;
 
 	/* Journal blocked and flushed, clear needs_recovery flag. */
 	EXT4_CLEAR_INCOMPAT_FEATURE(sb, EXT4_FEATURE_INCOMPAT_RECOVER);
 	error = ext4_commit_super(sb, 1);
-	if (error)
-		goto out;
-	return 0;
+out:
+	/* we rely on s_frozen to stop further updates */
+	jbd2_journal_unlock_updates(EXT4_SB(sb)->s_journal);
+	return error;
 }
 
 /*
@@ -3443,7 +3474,6 @@
 	EXT4_SET_INCOMPAT_FEATURE(sb, EXT4_FEATURE_INCOMPAT_RECOVER);
 	ext4_commit_super(sb, 1);
 	unlock_super(sb);
-	jbd2_journal_unlock_updates(EXT4_SB(sb)->s_journal);
 	return 0;
 }
 
@@ -3668,13 +3698,11 @@
 	buf->f_blocks = ext4_blocks_count(es) - sbi->s_overhead_last;
 	buf->f_bfree = percpu_counter_sum_positive(&sbi->s_freeblocks_counter) -
 		       percpu_counter_sum_positive(&sbi->s_dirtyblocks_counter);
-	ext4_free_blocks_count_set(es, buf->f_bfree);
 	buf->f_bavail = buf->f_bfree - ext4_r_blocks_count(es);
 	if (buf->f_bfree < ext4_r_blocks_count(es))
 		buf->f_bavail = 0;
 	buf->f_files = le32_to_cpu(es->s_inodes_count);
 	buf->f_ffree = percpu_counter_sum_positive(&sbi->s_freeinodes_counter);
-	es->s_free_inodes_count = cpu_to_le32(buf->f_ffree);
 	buf->f_namelen = EXT4_NAME_LEN;
 	fsid = le64_to_cpup((void *)es->s_uuid) ^
 	       le64_to_cpup((void *)es->s_uuid + sizeof(u64));
@@ -3978,6 +4006,7 @@
 {
 	int err;
 
+	ext4_check_flag_values();
 	err = init_ext4_system_zone();
 	if (err)
 		return err;
--- linux-mvl-dove-2.6.32.orig/fs/ext4/block_validity.c
+++ linux-mvl-dove-2.6.32/fs/ext4/block_validity.c
@@ -160,7 +160,7 @@
 		if (ext4_bg_has_super(sb, i) &&
 		    ((i < 5) || ((i % flex_size) == 0)))
 			add_system_zone(sbi, ext4_group_first_block_no(sb, i),
-					sbi->s_gdb_count + 1);
+					ext4_bg_num_gdb(sb, i) + 1);
 		gdp = ext4_get_group_desc(sb, i, NULL);
 		ret = add_system_zone(sbi, ext4_block_bitmap(sb, gdp), 1);
 		if (ret)
--- linux-mvl-dove-2.6.32.orig/fs/ext4/ialloc.c
+++ linux-mvl-dove-2.6.32/fs/ext4/ialloc.c
@@ -244,57 +244,50 @@
 	if (fatal)
 		goto error_return;
 
-	/* Ok, now we can actually update the inode bitmaps.. */
-	cleared = ext4_clear_bit_atomic(ext4_group_lock_ptr(sb, block_group),
-					bit, bitmap_bh->b_data);
-	if (!cleared)
-		ext4_error(sb, "ext4_free_inode",
-			   "bit already cleared for inode %lu", ino);
-	else {
-		gdp = ext4_get_group_desc(sb, block_group, &bh2);
-
+	fatal = -ESRCH;
+	gdp = ext4_get_group_desc(sb, block_group, &bh2);
+	if (gdp) {
 		BUFFER_TRACE(bh2, "get_write_access");
 		fatal = ext4_journal_get_write_access(handle, bh2);
-		if (fatal) goto error_return;
+	}
+	ext4_lock_group(sb, block_group);
+	cleared = ext4_clear_bit(bit, bitmap_bh->b_data);
+	if (fatal || !cleared) {
+		ext4_unlock_group(sb, block_group);
+		goto out;
+	}
 
-		if (gdp) {
-			ext4_lock_group(sb, block_group);
-			count = ext4_free_inodes_count(sb, gdp) + 1;
-			ext4_free_inodes_set(sb, gdp, count);
-			if (is_directory) {
-				count = ext4_used_dirs_count(sb, gdp) - 1;
-				ext4_used_dirs_set(sb, gdp, count);
-				if (sbi->s_log_groups_per_flex) {
-					ext4_group_t f;
-
-					f = ext4_flex_group(sbi, block_group);
-					atomic_dec(&sbi->s_flex_groups[f].free_inodes);
-				}
+	count = ext4_free_inodes_count(sb, gdp) + 1;
+	ext4_free_inodes_set(sb, gdp, count);
+	if (is_directory) {
+		count = ext4_used_dirs_count(sb, gdp) - 1;
+		ext4_used_dirs_set(sb, gdp, count);
+		percpu_counter_dec(&sbi->s_dirs_counter);
+	}
+	gdp->bg_checksum = ext4_group_desc_csum(sbi, block_group, gdp);
+	ext4_unlock_group(sb, block_group);
 
-			}
-			gdp->bg_checksum = ext4_group_desc_csum(sbi,
-							block_group, gdp);
-			ext4_unlock_group(sb, block_group);
-			percpu_counter_inc(&sbi->s_freeinodes_counter);
-			if (is_directory)
-				percpu_counter_dec(&sbi->s_dirs_counter);
+	percpu_counter_inc(&sbi->s_freeinodes_counter);
+	if (sbi->s_log_groups_per_flex) {
+		ext4_group_t f = ext4_flex_group(sbi, block_group);
 
-			if (sbi->s_log_groups_per_flex) {
-				ext4_group_t f;
+		atomic_inc(&sbi->s_flex_groups[f].free_inodes);
+		if (is_directory)
+			atomic_dec(&sbi->s_flex_groups[f].used_dirs);
+	}
+	BUFFER_TRACE(bh2, "call ext4_handle_dirty_metadata");
+	fatal = ext4_handle_dirty_metadata(handle, NULL, bh2);
+out:
+	if (cleared) {
+		BUFFER_TRACE(bitmap_bh, "call ext4_handle_dirty_metadata");
+		err = ext4_handle_dirty_metadata(handle, NULL, bitmap_bh);
+		if (!fatal)
+			fatal = err;
+		sb->s_dirt = 1;
+	} else
+		ext4_error(sb, "ext4_free_inode",
+			   "bit already cleared for inode %lu", ino);
 
-				f = ext4_flex_group(sbi, block_group);
-				atomic_inc(&sbi->s_flex_groups[f].free_inodes);
-			}
-		}
-		BUFFER_TRACE(bh2, "call ext4_handle_dirty_metadata");
-		err = ext4_handle_dirty_metadata(handle, NULL, bh2);
-		if (!fatal) fatal = err;
-	}
-	BUFFER_TRACE(bitmap_bh, "call ext4_handle_dirty_metadata");
-	err = ext4_handle_dirty_metadata(handle, NULL, bitmap_bh);
-	if (!fatal)
-		fatal = err;
-	sb->s_dirt = 1;
 error_return:
 	brelse(bitmap_bh);
 	ext4_std_error(sb, fatal);
@@ -504,7 +497,7 @@
 
 	if (S_ISDIR(mode) &&
 	    ((parent == sb->s_root->d_inode) ||
-	     (EXT4_I(parent)->i_flags & EXT4_TOPDIR_FL))) {
+	     (ext4_test_inode_flag(parent, EXT4_INODE_TOPDIR)))) {
 		int best_ndir = inodes_per_group;
 		int ret = -1;
 
@@ -779,7 +772,7 @@
 		if (sbi->s_log_groups_per_flex) {
 			ext4_group_t f = ext4_flex_group(sbi, group);
 
-			atomic_inc(&sbi->s_flex_groups[f].free_inodes);
+			atomic_inc(&sbi->s_flex_groups[f].used_dirs);
 		}
 	}
 	gdp->bg_checksum = ext4_group_desc_csum(sbi, group, gdp);
@@ -904,7 +897,7 @@
 				BUFFER_TRACE(inode_bitmap_bh,
 					"call ext4_handle_dirty_metadata");
 				err = ext4_handle_dirty_metadata(handle,
-								 inode,
+								 NULL,
 							inode_bitmap_bh);
 				if (err)
 					goto fail;
@@ -1029,7 +1022,8 @@
 	inode->i_generation = sbi->s_next_generation++;
 	spin_unlock(&sbi->s_next_gen_lock);
 
-	ei->i_state = EXT4_STATE_NEW;
+	ei->i_state_flags = 0;
+	ext4_set_inode_state(inode, EXT4_STATE_NEW);
 
 	ei->i_extra_isize = EXT4_SB(sb)->s_want_extra_isize;
 
@@ -1050,7 +1044,7 @@
 	if (EXT4_HAS_INCOMPAT_FEATURE(sb, EXT4_FEATURE_INCOMPAT_EXTENTS)) {
 		/* set extent flag only for directory, file and normal symlink*/
 		if (S_ISDIR(mode) || S_ISREG(mode) || S_ISLNK(mode)) {
-			EXT4_I(inode)->i_flags |= EXT4_EXTENTS_FL;
+			ext4_set_inode_flag(inode, EXT4_INODE_EXTENTS);
 			ext4_ext_tree_init(handle, inode);
 		}
 	}
--- linux-mvl-dove-2.6.32.orig/fs/ext4/dir.c
+++ linux-mvl-dove-2.6.32/fs/ext4/dir.c
@@ -84,9 +84,11 @@
 
 	if (error_msg != NULL)
 		ext4_error(dir->i_sb, function,
-			"bad entry in directory #%lu: %s - "
-			"offset=%u, inode=%u, rec_len=%d, name_len=%d",
-			dir->i_ino, error_msg, offset,
+			"bad entry in directory #%lu: %s - block=%llu"
+			"offset=%u(%u), inode=%u, rec_len=%d, name_len=%d",
+			dir->i_ino, error_msg,
+			(unsigned long long) bh->b_blocknr,
+			(unsigned) (offset%bh->b_size), offset,
 			le32_to_cpu(de->inode),
 			rlen, de->name_len);
 	return error_msg == NULL ? 1 : 0;
@@ -109,7 +111,7 @@
 
 	if (EXT4_HAS_COMPAT_FEATURE(inode->i_sb,
 				    EXT4_FEATURE_COMPAT_DIR_INDEX) &&
-	    ((EXT4_I(inode)->i_flags & EXT4_INDEX_FL) ||
+	    ((ext4_test_inode_flag(inode, EXT4_INODE_INDEX)) ||
 	     ((inode->i_size >> sb->s_blocksize_bits) == 1))) {
 		err = ext4_dx_readdir(filp, dirent, filldir);
 		if (err != ERR_BAD_DX_DIR) {
@@ -120,7 +122,7 @@
 		 * We don't set the inode dirty flag since it's not
 		 * critical that it get flushed back to the disk.
 		 */
-		EXT4_I(filp->f_path.dentry->d_inode)->i_flags &= ~EXT4_INDEX_FL;
+		ext4_clear_inode_flag(filp->f_path.dentry->d_inode, EXT4_INODE_INDEX);
 	}
 	stored = 0;
 	offset = filp->f_pos & (sb->s_blocksize - 1);
--- linux-mvl-dove-2.6.32.orig/fs/ext4/resize.c
+++ linux-mvl-dove-2.6.32/fs/ext4/resize.c
@@ -247,7 +247,7 @@
 			goto exit_bh;
 
 		if (IS_ERR(gdb = bclean(handle, sb, block))) {
-			err = PTR_ERR(bh);
+			err = PTR_ERR(gdb);
 			goto exit_bh;
 		}
 		ext4_handle_dirty_metadata(handle, NULL, gdb);
@@ -930,7 +930,8 @@
 	percpu_counter_add(&sbi->s_freeinodes_counter,
 			   EXT4_INODES_PER_GROUP(sb));
 
-	if (EXT4_HAS_INCOMPAT_FEATURE(sb, EXT4_FEATURE_INCOMPAT_FLEX_BG)) {
+	if (EXT4_HAS_INCOMPAT_FEATURE(sb, EXT4_FEATURE_INCOMPAT_FLEX_BG) &&
+	    sbi->s_log_groups_per_flex) {
 		ext4_group_t flex_group;
 		flex_group = ext4_flex_group(sbi, input->group);
 		atomic_add(input->free_blocks_count,
--- linux-mvl-dove-2.6.32.orig/fs/ext4/fsync.c
+++ linux-mvl-dove-2.6.32/fs/ext4/fsync.c
@@ -35,6 +35,29 @@
 #include <trace/events/ext4.h>
 
 /*
+ * If we're not journaling and this is a just-created file, we have to
+ * sync our parent directory (if it was freshly created) since
+ * otherwise it will only be written by writeback, leaving a huge
+ * window during which a crash may lose the file.  This may apply for
+ * the parent directory's parent as well, and so on recursively, if
+ * they are also freshly created.
+ */
+static void ext4_sync_parent(struct inode *inode)
+{
+	struct dentry *dentry = NULL;
+
+	while (inode && ext4_test_inode_state(inode, EXT4_STATE_NEWENTRY)) {
+		ext4_clear_inode_state(inode, EXT4_STATE_NEWENTRY);
+		dentry = list_entry(inode->i_dentry.next,
+				    struct dentry, d_alias);
+		if (!dentry || !dentry->d_parent || !dentry->d_parent->d_inode)
+			break;
+		inode = dentry->d_parent->d_inode;
+		sync_mapping_buffers(inode->i_mapping);
+	}
+}
+
+/*
  * akpm: A new design for ext4_sync_file().
  *
  * This is only called from sys_fsync(), sys_fdatasync() and sys_msync().
@@ -51,25 +74,34 @@
 int ext4_sync_file(struct file *file, struct dentry *dentry, int datasync)
 {
 	struct inode *inode = dentry->d_inode;
+	struct ext4_inode_info *ei = EXT4_I(inode);
 	journal_t *journal = EXT4_SB(inode->i_sb)->s_journal;
-	int err, ret = 0;
+	int ret;
+	tid_t commit_tid;
 
 	J_ASSERT(ext4_journal_current_handle() == NULL);
 
 	trace_ext4_sync_file(file, dentry, datasync);
 
+	if (inode->i_sb->s_flags & MS_RDONLY)
+		return 0;
+
 	ret = flush_aio_dio_completed_IO(inode);
 	if (ret < 0)
-		goto out;
+		return ret;
+
+	if (!journal) {
+		ret = simple_fsync(file, dentry, datasync);
+		if (!ret && !list_empty(&inode->i_dentry))
+			ext4_sync_parent(inode);
+		return ret;
+	}
+
 	/*
-	 * data=writeback:
+	 * data=writeback,ordered:
 	 *  The caller's filemap_fdatawrite()/wait will sync the data.
-	 *  sync_inode() will sync the metadata
-	 *
-	 * data=ordered:
-	 *  The caller's filemap_fdatawrite() will write the data and
-	 *  sync_inode() will write the inode if it is dirty.  Then the caller's
-	 *  filemap_fdatawait() will wait on the pages.
+	 *  Metadata is in the journal, we wait for proper transaction to
+	 *  commit here.
 	 *
 	 * data=journal:
 	 *  filemap_fdatawrite won't do anything (the buffers are clean).
@@ -79,32 +111,25 @@
 	 *  (they were dirtied by commit).  But that's OK - the blocks are
 	 *  safe in-journal, which is all fsync() needs to ensure.
 	 */
-	if (ext4_should_journal_data(inode)) {
-		ret = ext4_force_commit(inode->i_sb);
-		goto out;
-	}
-
-	if (!journal)
-		ret = sync_mapping_buffers(inode->i_mapping);
+	if (ext4_should_journal_data(inode))
+		return ext4_force_commit(inode->i_sb);
 
-	if (datasync && !(inode->i_state & I_DIRTY_DATASYNC))
-		goto out;
-
-	/*
-	 * The VFS has written the file data.  If the inode is unaltered
-	 * then we need not start a commit.
-	 */
-	if (inode->i_state & (I_DIRTY_SYNC|I_DIRTY_DATASYNC)) {
-		struct writeback_control wbc = {
-			.sync_mode = WB_SYNC_ALL,
-			.nr_to_write = 0, /* sys_fsync did this */
-		};
-		err = sync_inode(inode, &wbc);
-		if (ret == 0)
-			ret = err;
-	}
-out:
-	if (journal && (journal->j_flags & JBD2_BARRIER))
+	commit_tid = datasync ? ei->i_datasync_tid : ei->i_sync_tid;
+	if (jbd2_log_start_commit(journal, commit_tid)) {
+		/*
+		 * When the journal is on a different device than the
+		 * fs data disk, we need to issue the barrier in
+		 * writeback mode.  (In ordered mode, the jbd2 layer
+		 * will take care of issuing the barrier.  In
+		 * data=journal, all of the data blocks are written to
+		 * the journal device.)
+		 */
+		if (ext4_should_writeback_data(inode) &&
+		    (journal->j_fs_dev != journal->j_dev) &&
+		    (journal->j_flags & JBD2_BARRIER))
+			blkdev_issue_flush(inode->i_sb->s_bdev, NULL);
+		ret = jbd2_log_wait_commit(journal, commit_tid);
+	} else if (journal->j_flags & JBD2_BARRIER)
 		blkdev_issue_flush(inode->i_sb->s_bdev, NULL);
 	return ret;
 }
--- linux-mvl-dove-2.6.32.orig/fs/ext4/ext4_jbd2.c
+++ linux-mvl-dove-2.6.32/fs/ext4/ext4_jbd2.c
@@ -89,7 +89,7 @@
 			ext4_journal_abort_handle(where, __func__, bh,
 						  handle, err);
 	} else {
-		if (inode && bh)
+		if (inode)
 			mark_buffer_dirty_inode(bh, inode);
 		else
 			mark_buffer_dirty(bh);
--- linux-mvl-dove-2.6.32.orig/fs/romfs/super.c
+++ linux-mvl-dove-2.6.32/fs/romfs/super.c
@@ -544,6 +544,7 @@
 error_rsb_inval:
 	ret = -EINVAL;
 error_rsb:
+	kfree(rsb);
 	return ret;
 }
 
--- linux-mvl-dove-2.6.32.orig/fs/xfs/xfs_fsops.c
+++ linux-mvl-dove-2.6.32/fs/xfs/xfs_fsops.c
@@ -56,6 +56,9 @@
 	xfs_fsop_geom_t		*geo,
 	int			new_version)
 {
+
+	memset(geo, 0, sizeof(*geo));
+
 	geo->blocksize = mp->m_sb.sb_blocksize;
 	geo->rtextsize = mp->m_sb.sb_rextsize;
 	geo->agblocks = mp->m_sb.sb_agblocks;
@@ -611,7 +614,7 @@
 	xfs_inode_t	*ip;
 	int		error;
 
-	tp = _xfs_trans_alloc(mp, XFS_TRANS_DUMMY1);
+	tp = _xfs_trans_alloc(mp, XFS_TRANS_DUMMY1, KM_SLEEP);
 	error = xfs_trans_reserve(tp, 0, XFS_ICHANGE_LOG_RES(mp), 0, 0, 0);
 	if (error) {
 		xfs_trans_cancel(tp, 0);
--- linux-mvl-dove-2.6.32.orig/fs/xfs/xfs_itable.c
+++ linux-mvl-dove-2.6.32/fs/xfs/xfs_itable.c
@@ -49,24 +49,40 @@
 		 (ino == mp->m_sb.sb_uquotino || ino == mp->m_sb.sb_gquotino)));
 }
 
-STATIC int
-xfs_bulkstat_one_iget(
-	xfs_mount_t	*mp,		/* mount point for filesystem */
-	xfs_ino_t	ino,		/* inode number to get data for */
-	xfs_daddr_t	bno,		/* starting bno of inode cluster */
-	xfs_bstat_t	*buf,		/* return buffer */
-	int		*stat)		/* BULKSTAT_RV_... */
+/*
+ * Return stat information for one inode.
+ * Return 0 if ok, else errno.
+ */
+int
+xfs_bulkstat_one_int(
+	xfs_mount_t		*mp,		/* mount point for filesystem */
+	xfs_ino_t		ino,		/* inode to get data for */
+	void __user		*buffer,	/* buffer to place output in */
+	int			ubsize,		/* size of buffer */
+	bulkstat_one_fmt_pf	formatter,	/* formatter, copy to user */
+	int			*ubused,	/* bytes used by me */
+	int			*stat)		/* BULKSTAT_RV_... */
 {
-	xfs_icdinode_t	*dic;	/* dinode core info pointer */
-	xfs_inode_t	*ip;		/* incore inode pointer */
-	struct inode	*inode;
-	int		error;
+	struct xfs_icdinode	*dic;		/* dinode core info pointer */
+	struct xfs_inode	*ip;		/* incore inode pointer */
+	struct inode		*inode;
+	struct xfs_bstat	*buf;		/* return buffer */
+	int			error = 0;	/* error value */
+
+	*stat = BULKSTAT_RV_NOTHING;
+
+	if (!buffer || xfs_internal_inum(mp, ino))
+		return XFS_ERROR(EINVAL);
+
+	buf = kmem_alloc(sizeof(*buf), KM_SLEEP | KM_MAYFAIL);
+	if (!buf)
+		return XFS_ERROR(ENOMEM);
 
 	error = xfs_iget(mp, NULL, ino,
-			 XFS_IGET_BULKSTAT, XFS_ILOCK_SHARED, &ip, bno);
+			 XFS_IGET_UNTRUSTED, XFS_ILOCK_SHARED, &ip);
 	if (error) {
 		*stat = BULKSTAT_RV_NOTHING;
-		return error;
+		goto out_free;
 	}
 
 	ASSERT(ip != NULL);
@@ -126,76 +142,16 @@
 		buf->bs_blocks = dic->di_nblocks + ip->i_delayed_blks;
 		break;
 	}
-
 	xfs_iput(ip, XFS_ILOCK_SHARED);
-	return error;
-}
 
-STATIC void
-xfs_bulkstat_one_dinode(
-	xfs_mount_t	*mp,		/* mount point for filesystem */
-	xfs_ino_t	ino,		/* inode number to get data for */
-	xfs_dinode_t	*dic,		/* dinode inode pointer */
-	xfs_bstat_t	*buf)		/* return buffer */
-{
-	/*
-	 * The inode format changed when we moved the link count and
-	 * made it 32 bits long.  If this is an old format inode,
-	 * convert it in memory to look like a new one.  If it gets
-	 * flushed to disk we will convert back before flushing or
-	 * logging it.  We zero out the new projid field and the old link
-	 * count field.  We'll handle clearing the pad field (the remains
-	 * of the old uuid field) when we actually convert the inode to
-	 * the new format. We don't change the version number so that we
-	 * can distinguish this from a real new format inode.
-	 */
-	if (dic->di_version == 1) {
-		buf->bs_nlink = be16_to_cpu(dic->di_onlink);
-		buf->bs_projid = 0;
-	} else {
-		buf->bs_nlink = be32_to_cpu(dic->di_nlink);
-		buf->bs_projid = be16_to_cpu(dic->di_projid);
-	}
+	error = formatter(buffer, ubsize, ubused, buf);
 
-	buf->bs_ino = ino;
-	buf->bs_mode = be16_to_cpu(dic->di_mode);
-	buf->bs_uid = be32_to_cpu(dic->di_uid);
-	buf->bs_gid = be32_to_cpu(dic->di_gid);
-	buf->bs_size = be64_to_cpu(dic->di_size);
-	buf->bs_atime.tv_sec = be32_to_cpu(dic->di_atime.t_sec);
-	buf->bs_atime.tv_nsec = be32_to_cpu(dic->di_atime.t_nsec);
-	buf->bs_mtime.tv_sec = be32_to_cpu(dic->di_mtime.t_sec);
-	buf->bs_mtime.tv_nsec = be32_to_cpu(dic->di_mtime.t_nsec);
-	buf->bs_ctime.tv_sec = be32_to_cpu(dic->di_ctime.t_sec);
-	buf->bs_ctime.tv_nsec = be32_to_cpu(dic->di_ctime.t_nsec);
-	buf->bs_xflags = xfs_dic2xflags(dic);
-	buf->bs_extsize = be32_to_cpu(dic->di_extsize) << mp->m_sb.sb_blocklog;
-	buf->bs_extents = be32_to_cpu(dic->di_nextents);
-	buf->bs_gen = be32_to_cpu(dic->di_gen);
-	memset(buf->bs_pad, 0, sizeof(buf->bs_pad));
-	buf->bs_dmevmask = be32_to_cpu(dic->di_dmevmask);
-	buf->bs_dmstate = be16_to_cpu(dic->di_dmstate);
-	buf->bs_aextents = be16_to_cpu(dic->di_anextents);
+	if (!error)
+		*stat = BULKSTAT_RV_DIDONE;
 
-	switch (dic->di_format) {
-	case XFS_DINODE_FMT_DEV:
-		buf->bs_rdev = xfs_dinode_get_rdev(dic);
-		buf->bs_blksize = BLKDEV_IOSIZE;
-		buf->bs_blocks = 0;
-		break;
-	case XFS_DINODE_FMT_LOCAL:
-	case XFS_DINODE_FMT_UUID:
-		buf->bs_rdev = 0;
-		buf->bs_blksize = mp->m_sb.sb_blocksize;
-		buf->bs_blocks = 0;
-		break;
-	case XFS_DINODE_FMT_EXTENTS:
-	case XFS_DINODE_FMT_BTREE:
-		buf->bs_rdev = 0;
-		buf->bs_blksize = mp->m_sb.sb_blocksize;
-		buf->bs_blocks = be64_to_cpu(dic->di_nblocks);
-		break;
-	}
+ out_free:
+	kmem_free(buf);
+	return error;
 }
 
 /* Return 0 on success or positive error */
@@ -215,118 +171,17 @@
 	return 0;
 }
 
-/*
- * Return stat information for one inode.
- * Return 0 if ok, else errno.
- */
-int		   	    		/* error status */
-xfs_bulkstat_one_int(
-	xfs_mount_t	*mp,		/* mount point for filesystem */
-	xfs_ino_t	ino,		/* inode number to get data for */
-	void		__user *buffer,	/* buffer to place output in */
-	int		ubsize,		/* size of buffer */
-	bulkstat_one_fmt_pf formatter,	/* formatter, copy to user */
-	xfs_daddr_t	bno,		/* starting bno of inode cluster */
-	int		*ubused,	/* bytes used by me */
-	void		*dibuff,	/* on-disk inode buffer */
-	int		*stat)		/* BULKSTAT_RV_... */
-{
-	xfs_bstat_t	*buf;		/* return buffer */
-	int		error = 0;	/* error value */
-	xfs_dinode_t	*dip;		/* dinode inode pointer */
-
-	dip = (xfs_dinode_t *)dibuff;
-	*stat = BULKSTAT_RV_NOTHING;
-
-	if (!buffer || xfs_internal_inum(mp, ino))
-		return XFS_ERROR(EINVAL);
-
-	buf = kmem_alloc(sizeof(*buf), KM_SLEEP);
-
-	if (dip == NULL) {
-		/* We're not being passed a pointer to a dinode.  This happens
-		 * if BULKSTAT_FG_IGET is selected.  Do the iget.
-		 */
-		error = xfs_bulkstat_one_iget(mp, ino, bno, buf, stat);
-		if (error)
-			goto out_free;
-	} else {
-		xfs_bulkstat_one_dinode(mp, ino, dip, buf);
-	}
-
-	error = formatter(buffer, ubsize, ubused, buf);
-	if (error)
-		goto out_free;
-
-	*stat = BULKSTAT_RV_DIDONE;
-
- out_free:
-	kmem_free(buf);
-	return error;
-}
-
 int
 xfs_bulkstat_one(
 	xfs_mount_t	*mp,		/* mount point for filesystem */
 	xfs_ino_t	ino,		/* inode number to get data for */
 	void		__user *buffer,	/* buffer to place output in */
 	int		ubsize,		/* size of buffer */
-	void		*private_data,	/* my private data */
-	xfs_daddr_t	bno,		/* starting bno of inode cluster */
 	int		*ubused,	/* bytes used by me */
-	void		*dibuff,	/* on-disk inode buffer */
 	int		*stat)		/* BULKSTAT_RV_... */
 {
 	return xfs_bulkstat_one_int(mp, ino, buffer, ubsize,
-				    xfs_bulkstat_one_fmt, bno,
-				    ubused, dibuff, stat);
-}
-
-/*
- * Test to see whether we can use the ondisk inode directly, based
- * on the given bulkstat flags, filling in dipp accordingly.
- * Returns zero if the inode is dodgey.
- */
-STATIC int
-xfs_bulkstat_use_dinode(
-	xfs_mount_t	*mp,
-	int		flags,
-	xfs_buf_t	*bp,
-	int		clustidx,
-	xfs_dinode_t	**dipp)
-{
-	xfs_dinode_t	*dip;
-	unsigned int	aformat;
-
-	*dipp = NULL;
-	if (!bp || (flags & BULKSTAT_FG_IGET))
-		return 1;
-	dip = (xfs_dinode_t *)
-			xfs_buf_offset(bp, clustidx << mp->m_sb.sb_inodelog);
-	/*
-	 * Check the buffer containing the on-disk inode for di_mode == 0.
-	 * This is to prevent xfs_bulkstat from picking up just reclaimed
-	 * inodes that have their in-core state initialized but not flushed
-	 * to disk yet. This is a temporary hack that would require a proper
-	 * fix in the future.
-	 */
-	if (be16_to_cpu(dip->di_magic) != XFS_DINODE_MAGIC ||
-	    !XFS_DINODE_GOOD_VERSION(dip->di_version) ||
-	    !dip->di_mode)
-		return 0;
-	if (flags & BULKSTAT_FG_QUICK) {
-		*dipp = dip;
-		return 1;
-	}
-	/* BULKSTAT_FG_INLINE: if attr fork is local, or not there, use it */
-	aformat = dip->di_aformat;
-	if ((XFS_DFORK_Q(dip) == 0) ||
-	    (aformat == XFS_DINODE_FMT_LOCAL) ||
-	    (aformat == XFS_DINODE_FMT_EXTENTS && !dip->di_anextents)) {
-		*dipp = dip;
-		return 1;
-	}
-	return 1;
+				    xfs_bulkstat_one_fmt, ubused, stat);
 }
 
 #define XFS_BULKSTAT_UBLEFT(ubleft)	((ubleft) >= statstruct_size)
@@ -340,10 +195,8 @@
 	xfs_ino_t		*lastinop, /* last inode returned */
 	int			*ubcountp, /* size of buffer/count returned */
 	bulkstat_one_pf		formatter, /* func that'd fill a single buf */
-	void			*private_data,/* private data for formatter */
 	size_t			statstruct_size, /* sizeof struct filling */
 	char			__user *ubuffer, /* buffer with inode stats */
-	int			flags,	/* defined in xfs_itable.h */
 	int			*done)	/* 1 if there are more stats to get */
 {
 	xfs_agblock_t		agbno=0;/* allocation group block number */
@@ -378,14 +231,12 @@
 	int			ubelem;	/* spaces used in user's buffer */
 	int			ubused;	/* bytes used by formatter */
 	xfs_buf_t		*bp;	/* ptr to on-disk inode cluster buf */
-	xfs_dinode_t		*dip;	/* ptr into bp for specific inode */
 
 	/*
 	 * Get the last inode value, see if there's nothing to do.
 	 */
 	ino = (xfs_ino_t)*lastinop;
 	lastino = ino;
-	dip = NULL;
 	agno = XFS_INO_TO_AGNO(mp, ino);
 	agino = XFS_INO_TO_AGINO(mp, ino);
 	if (agno >= mp->m_sb.sb_agcount ||
@@ -610,37 +461,6 @@
 							irbp->ir_startino) +
 						((chunkidx & nimask) >>
 						 mp->m_sb.sb_inopblog);
-
-					if (flags & (BULKSTAT_FG_QUICK |
-						     BULKSTAT_FG_INLINE)) {
-						int offset;
-
-						ino = XFS_AGINO_TO_INO(mp, agno,
-								       agino);
-						bno = XFS_AGB_TO_DADDR(mp, agno,
-								       agbno);
-
-						/*
-						 * Get the inode cluster buffer
-						 */
-						if (bp)
-							xfs_buf_relse(bp);
-
-						error = xfs_inotobp(mp, NULL, ino, &dip,
-								    &bp, &offset,
-								    XFS_IGET_BULKSTAT);
-
-						if (!error)
-							clustidx = offset / mp->m_sb.sb_inodesize;
-						if (XFS_TEST_ERROR(error != 0,
-								   mp, XFS_ERRTAG_BULKSTAT_READ_CHUNK,
-								   XFS_RANDOM_BULKSTAT_READ_CHUNK)) {
-							bp = NULL;
-							ubleft = 0;
-							rval = error;
-							break;
-						}
-					}
 				}
 				ino = XFS_AGINO_TO_INO(mp, agno, agino);
 				bno = XFS_AGB_TO_DADDR(mp, agno, agbno);
@@ -656,35 +476,13 @@
 				 * when the chunk is used up.
 				 */
 				irbp->ir_freecount++;
-				if (!xfs_bulkstat_use_dinode(mp, flags, bp,
-							     clustidx, &dip)) {
-					lastino = ino;
-					continue;
-				}
-				/*
-				 * If we need to do an iget, cannot hold bp.
-				 * Drop it, until starting the next cluster.
-				 */
-				if ((flags & BULKSTAT_FG_INLINE) && !dip) {
-					if (bp)
-						xfs_buf_relse(bp);
-					bp = NULL;
-				}
 
 				/*
 				 * Get the inode and fill in a single buffer.
-				 * BULKSTAT_FG_QUICK uses dip to fill it in.
-				 * BULKSTAT_FG_IGET uses igets.
-				 * BULKSTAT_FG_INLINE uses dip if we have an
-				 * inline attr fork, else igets.
-				 * See: xfs_bulkstat_one & xfs_dm_bulkstat_one.
-				 * This is also used to count inodes/blks, etc
-				 * in xfs_qm_quotacheck.
 				 */
 				ubused = statstruct_size;
-				error = formatter(mp, ino, ubufp,
-						ubleft, private_data,
-						bno, &ubused, dip, &fmterror);
+				error = formatter(mp, ino, ubufp, ubleft,
+						  &ubused, &fmterror);
 				if (fmterror == BULKSTAT_RV_NOTHING) {
 					if (error && error != ENOENT &&
 						error != EINVAL) {
@@ -776,8 +574,7 @@
 	 */
 
 	ino = (xfs_ino_t)*lastinop;
-	error = xfs_bulkstat_one(mp, ino, buffer, sizeof(xfs_bstat_t),
-				 NULL, 0, NULL, NULL, &res);
+	error = xfs_bulkstat_one(mp, ino, buffer, sizeof(xfs_bstat_t), 0, &res);
 	if (error) {
 		/*
 		 * Special case way failed, do it the "long" way
@@ -786,8 +583,7 @@
 		(*lastinop)--;
 		count = 1;
 		if (xfs_bulkstat(mp, lastinop, &count, xfs_bulkstat_one,
-				NULL, sizeof(xfs_bstat_t), buffer,
-				BULKSTAT_FG_IGET, done))
+				sizeof(xfs_bstat_t), buffer, done))
 			return error;
 		if (count == 0 || (xfs_ino_t)*lastinop != ino)
 			return error == EFSCORRUPTED ?
--- linux-mvl-dove-2.6.32.orig/fs/xfs/xfs_log_recover.c
+++ linux-mvl-dove-2.6.32/fs/xfs/xfs_log_recover.c
@@ -3209,7 +3209,7 @@
 	int				error;
 
 	ino = XFS_AGINO_TO_INO(mp, agno, agino);
-	error = xfs_iget(mp, NULL, ino, 0, 0, &ip, 0);
+	error = xfs_iget(mp, NULL, ino, 0, 0, &ip);
 	if (error)
 		goto fail;
 
@@ -3517,7 +3517,7 @@
 {
 	xlog_rec_header_t	*rhead;
 	xfs_daddr_t		blk_no;
-	xfs_caddr_t		bufaddr, offset;
+	xfs_caddr_t		offset;
 	xfs_buf_t		*hbp, *dbp;
 	int			error = 0, h_size;
 	int			bblks, split_bblks;
@@ -3610,7 +3610,7 @@
 			/*
 			 * Check for header wrapping around physical end-of-log
 			 */
-			offset = NULL;
+			offset = XFS_BUF_PTR(hbp);
 			split_hblks = 0;
 			wrapped_hblks = 0;
 			if (blk_no + hblks <= log->l_logBBsize) {
@@ -3646,9 +3646,8 @@
 				 *   - order is important.
 				 */
 				wrapped_hblks = hblks - split_hblks;
-				bufaddr = XFS_BUF_PTR(hbp);
 				error = XFS_BUF_SET_PTR(hbp,
-						bufaddr + BBTOB(split_hblks),
+						offset + BBTOB(split_hblks),
 						BBTOB(hblks - split_hblks));
 				if (error)
 					goto bread_err2;
@@ -3658,14 +3657,10 @@
 				if (error)
 					goto bread_err2;
 
-				error = XFS_BUF_SET_PTR(hbp, bufaddr,
+				error = XFS_BUF_SET_PTR(hbp, offset,
 							BBTOB(hblks));
 				if (error)
 					goto bread_err2;
-
-				if (!offset)
-					offset = xlog_align(log, 0,
-							wrapped_hblks, hbp);
 			}
 			rhead = (xlog_rec_header_t *)offset;
 			error = xlog_valid_rec_header(log, rhead,
@@ -3685,7 +3680,7 @@
 			} else {
 				/* This log record is split across the
 				 * physical end of log */
-				offset = NULL;
+				offset = XFS_BUF_PTR(dbp);
 				split_bblks = 0;
 				if (blk_no != log->l_logBBsize) {
 					/* some data is before the physical
@@ -3714,9 +3709,8 @@
 				 *   _first_, then the log start (LR header end)
 				 *   - order is important.
 				 */
-				bufaddr = XFS_BUF_PTR(dbp);
 				error = XFS_BUF_SET_PTR(dbp,
-						bufaddr + BBTOB(split_bblks),
+						offset + BBTOB(split_bblks),
 						BBTOB(bblks - split_bblks));
 				if (error)
 					goto bread_err2;
@@ -3727,13 +3721,9 @@
 				if (error)
 					goto bread_err2;
 
-				error = XFS_BUF_SET_PTR(dbp, bufaddr, h_size);
+				error = XFS_BUF_SET_PTR(dbp, offset, h_size);
 				if (error)
 					goto bread_err2;
-
-				if (!offset)
-					offset = xlog_align(log, wrapped_hblks,
-						bblks - split_bblks, dbp);
 			}
 			xlog_unpack_data(rhead, offset, log);
 			if ((error = xlog_recover_process_data(log, rhash,
--- linux-mvl-dove-2.6.32.orig/fs/xfs/xfs_vnodeops.h
+++ linux-mvl-dove-2.6.32/fs/xfs/xfs_vnodeops.h
@@ -38,7 +38,6 @@
 		const char *target_path, mode_t mode, struct xfs_inode **ipp,
 		cred_t *credp);
 int xfs_set_dmattrs(struct xfs_inode *ip, u_int evmask, u_int16_t state);
-int xfs_reclaim(struct xfs_inode *ip);
 int xfs_change_file_space(struct xfs_inode *ip, int cmd,
 		xfs_flock64_t *bf, xfs_off_t offset, int attr_flags);
 int xfs_rename(struct xfs_inode *src_dp, struct xfs_name *src_name,
--- linux-mvl-dove-2.6.32.orig/fs/xfs/xfs_mount.c
+++ linux-mvl-dove-2.6.32/fs/xfs/xfs_mount.c
@@ -1207,7 +1207,7 @@
 	 * Get and sanity-check the root inode.
 	 * Save the pointer to it in the mount structure.
 	 */
-	error = xfs_iget(mp, NULL, sbp->sb_rootino, 0, XFS_ILOCK_EXCL, &rip, 0);
+	error = xfs_iget(mp, NULL, sbp->sb_rootino, 0, XFS_ILOCK_EXCL, &rip);
 	if (error) {
 		cmn_err(CE_WARN, "XFS: failed to read root inode");
 		goto out_log_dealloc;
@@ -1471,7 +1471,7 @@
 	if (!xfs_sb_version_haslazysbcount(&mp->m_sb))
 		return 0;
 
-	tp = _xfs_trans_alloc(mp, XFS_TRANS_SB_COUNT);
+	tp = _xfs_trans_alloc(mp, XFS_TRANS_SB_COUNT, KM_SLEEP);
 	error = xfs_trans_reserve(tp, 0, mp->m_sb.sb_sectsize + 128, 0, 0,
 					XFS_DEFAULT_LOG_COUNT);
 	if (error) {
--- linux-mvl-dove-2.6.32.orig/fs/xfs/xfs_dfrag.c
+++ linux-mvl-dove-2.6.32/fs/xfs/xfs_dfrag.c
@@ -62,7 +62,9 @@
 		goto out;
 	}
 
-	if (!(file->f_mode & FMODE_WRITE) || (file->f_flags & O_APPEND)) {
+	if (!(file->f_mode & FMODE_WRITE) ||
+	    !(file->f_mode & FMODE_READ) ||
+	    (file->f_flags & O_APPEND)) {
 		error = XFS_ERROR(EBADF);
 		goto out_put_file;
 	}
@@ -74,6 +76,7 @@
 	}
 
 	if (!(target_file->f_mode & FMODE_WRITE) ||
+	    !(target_file->f_mode & FMODE_READ) ||
 	    (target_file->f_flags & O_APPEND)) {
 		error = XFS_ERROR(EBADF);
 		goto out_put_target_file;
@@ -113,10 +116,82 @@
 	return error;
 }
 
+/*
+ * We need to check that the format of the data fork in the temporary inode is
+ * valid for the target inode before doing the swap. This is not a problem with
+ * attr1 because of the fixed fork offset, but attr2 has a dynamically sized
+ * data fork depending on the space the attribute fork is taking so we can get
+ * invalid formats on the target inode.
+ *
+ * E.g. target has space for 7 extents in extent format, temp inode only has
+ * space for 6.  If we defragment down to 7 extents, then the tmp format is a
+ * btree, but when swapped it needs to be in extent format. Hence we can't just
+ * blindly swap data forks on attr2 filesystems.
+ *
+ * Note that we check the swap in both directions so that we don't end up with
+ * a corrupt temporary inode, either.
+ *
+ * Note that fixing the way xfs_fsr sets up the attribute fork in the source
+ * inode will prevent this situation from occurring, so all we do here is
+ * reject and log the attempt. basically we are putting the responsibility on
+ * userspace to get this right.
+ */
+static int
+xfs_swap_extents_check_format(
+	xfs_inode_t	*ip,	/* target inode */
+	xfs_inode_t	*tip)	/* tmp inode */
+{
+
+	/* Should never get a local format */
+	if (ip->i_d.di_format == XFS_DINODE_FMT_LOCAL ||
+	    tip->i_d.di_format == XFS_DINODE_FMT_LOCAL)
+		return EINVAL;
+
+	/*
+	 * if the target inode has less extents that then temporary inode then
+	 * why did userspace call us?
+	 */
+	if (ip->i_d.di_nextents < tip->i_d.di_nextents)
+		return EINVAL;
+
+	/*
+	 * if the target inode is in extent form and the temp inode is in btree
+	 * form then we will end up with the target inode in the wrong format
+	 * as we already know there are less extents in the temp inode.
+	 */
+	if (ip->i_d.di_format == XFS_DINODE_FMT_EXTENTS &&
+	    tip->i_d.di_format == XFS_DINODE_FMT_BTREE)
+		return EINVAL;
+
+	/* Check temp in extent form to max in target */
+	if (tip->i_d.di_format == XFS_DINODE_FMT_EXTENTS &&
+	    XFS_IFORK_NEXTENTS(tip, XFS_DATA_FORK) > ip->i_df.if_ext_max)
+		return EINVAL;
+
+	/* Check target in extent form to max in temp */
+	if (ip->i_d.di_format == XFS_DINODE_FMT_EXTENTS &&
+	    XFS_IFORK_NEXTENTS(ip, XFS_DATA_FORK) > tip->i_df.if_ext_max)
+		return EINVAL;
+
+	/* Check root block of temp in btree form to max in target */
+	if (tip->i_d.di_format == XFS_DINODE_FMT_BTREE &&
+	    XFS_IFORK_BOFF(ip) &&
+	    tip->i_df.if_broot_bytes > XFS_IFORK_BOFF(ip))
+		return EINVAL;
+
+	/* Check root block of target in btree form to max in temp */
+	if (ip->i_d.di_format == XFS_DINODE_FMT_BTREE &&
+	    XFS_IFORK_BOFF(tip) &&
+	    ip->i_df.if_broot_bytes > XFS_IFORK_BOFF(tip))
+		return EINVAL;
+
+	return 0;
+}
+
 int
 xfs_swap_extents(
-	xfs_inode_t	*ip,
-	xfs_inode_t	*tip,
+	xfs_inode_t	*ip,	/* target inode */
+	xfs_inode_t	*tip,	/* tmp inode */
 	xfs_swapext_t	*sxp)
 {
 	xfs_mount_t	*mp;
@@ -160,13 +235,6 @@
 		goto out_unlock;
 	}
 
-	/* Should never get a local format */
-	if (ip->i_d.di_format == XFS_DINODE_FMT_LOCAL ||
-	    tip->i_d.di_format == XFS_DINODE_FMT_LOCAL) {
-		error = XFS_ERROR(EINVAL);
-		goto out_unlock;
-	}
-
 	if (VN_CACHED(VFS_I(tip)) != 0) {
 		xfs_inval_cached_trace(tip, 0, -1, 0, -1);
 		error = xfs_flushinval_pages(tip, 0, -1,
@@ -189,13 +257,12 @@
 		goto out_unlock;
 	}
 
-	/*
-	 * If the target has extended attributes, the tmp file
-	 * must also in order to ensure the correct data fork
-	 * format.
-	 */
-	if ( XFS_IFORK_Q(ip) != XFS_IFORK_Q(tip) ) {
-		error = XFS_ERROR(EINVAL);
+	/* check inode formats now that data is flushed */
+	error = xfs_swap_extents_check_format(ip, tip);
+	if (error) {
+		xfs_fs_cmn_err(CE_NOTE, mp,
+		    "%s: inode 0x%llx format is incompatible for exchanging.",
+				__FILE__, ip->i_ino);
 		goto out_unlock;
 	}
 
@@ -276,6 +343,16 @@
 	*tifp = *tempifp;	/* struct copy */
 
 	/*
+	 * Fix the in-memory data fork values that are dependent on the fork
+	 * offset in the inode. We can't assume they remain the same as attr2
+	 * has dynamic fork offsets.
+	 */
+	ifp->if_ext_max = XFS_IFORK_SIZE(ip, XFS_DATA_FORK) /
+					(uint)sizeof(xfs_bmbt_rec_t);
+	tifp->if_ext_max = XFS_IFORK_SIZE(tip, XFS_DATA_FORK) /
+					(uint)sizeof(xfs_bmbt_rec_t);
+
+	/*
 	 * Fix the on-disk inode values
 	 */
 	tmp = (__uint64_t)ip->i_d.di_nblocks;
--- linux-mvl-dove-2.6.32.orig/fs/xfs/xfs_alloc.c
+++ linux-mvl-dove-2.6.32/fs/xfs/xfs_alloc.c
@@ -2703,45 +2703,35 @@
 	xfs_mount_t		*mp;
 	xfs_perag_busy_t	*bsy;
 	xfs_agblock_t		uend, bend;
-	xfs_lsn_t		lsn;
+	xfs_lsn_t		lsn = 0;
 	int			cnt;
 
 	mp = tp->t_mountp;
 
 	spin_lock(&mp->m_perag[agno].pagb_lock);
-	cnt = mp->m_perag[agno].pagb_count;
-
 	uend = bno + len - 1;
 
-	/* search pagb_list for this slot, skipping open slots */
-	for (bsy = mp->m_perag[agno].pagb_list; cnt; bsy++) {
-
-		/*
-		 * (start1,length1) within (start2, length2)
-		 */
-		if (bsy->busy_tp != NULL) {
-			bend = bsy->busy_start + bsy->busy_length - 1;
-			if ((bno > bend) || (uend < bsy->busy_start)) {
-				cnt--;
-			} else {
-				TRACE_BUSYSEARCH("xfs_alloc_search_busy",
-					 "found1", agno, bno, len, tp);
-				break;
-			}
-		}
-	}
-
 	/*
-	 * If a block was found, force the log through the LSN of the
-	 * transaction that freed the block
+	 * search pagb_list for this slot, skipping open slots. We have to
+	 * search the entire array as there may be multiple overlaps and
+	 * we have to get the most recent LSN for the log force to push out
+	 * all the transactions that span the range.
 	 */
-	if (cnt) {
-		TRACE_BUSYSEARCH("xfs_alloc_search_busy", "found", agno, bno, len, tp);
-		lsn = bsy->busy_tp->t_commit_lsn;
-		spin_unlock(&mp->m_perag[agno].pagb_lock);
-		xfs_log_force(mp, lsn, XFS_LOG_FORCE|XFS_LOG_SYNC);
-	} else {
-		TRACE_BUSYSEARCH("xfs_alloc_search_busy", "not-found", agno, bno, len, tp);
-		spin_unlock(&mp->m_perag[agno].pagb_lock);
+	for (cnt = 0; cnt < mp->m_perag[agno].pagb_count; cnt++) {
+		bsy = &mp->m_perag[agno].pagb_list[cnt];
+		if (!bsy->busy_tp)
+			continue;
+		bend = bsy->busy_start + bsy->busy_length - 1;
+		if (bno > bend || uend < bsy->busy_start)
+			continue;
+
+		/* (start1,length1) within (start2, length2) */
+		if (XFS_LSN_CMP(bsy->busy_tp->t_commit_lsn, lsn) > 0)
+			lsn = bsy->busy_tp->t_commit_lsn;
 	}
+	spin_unlock(&mp->m_perag[agno].pagb_lock);
+	TRACE_BUSYSEARCH("xfs_alloc_search_busy", lsn ? "found" : "not-found",
+						agno, bno, len, tp);
+	if (lsn)
+		xfs_log_force(mp, lsn, XFS_LOG_FORCE|XFS_LOG_SYNC);
 }
--- linux-mvl-dove-2.6.32.orig/fs/xfs/xfs_iomap.c
+++ linux-mvl-dove-2.6.32/fs/xfs/xfs_iomap.c
@@ -860,8 +860,15 @@
 		 * set up a transaction to convert the range of extents
 		 * from unwritten to real. Do allocations in a loop until
 		 * we have covered the range passed in.
+		 *
+		 * Note that we open code the transaction allocation here
+		 * to pass KM_NOFS--we can't risk to recursing back into
+		 * the filesystem here as we might be asked to write out
+		 * the same inode that we complete here and might deadlock
+		 * on the iolock.
 		 */
-		tp = xfs_trans_alloc(mp, XFS_TRANS_STRAT_WRITE);
+		xfs_wait_for_freeze(mp, SB_FREEZE_TRANS);
+		tp = _xfs_trans_alloc(mp, XFS_TRANS_STRAT_WRITE, KM_NOFS);
 		tp->t_flags |= XFS_TRANS_RESERVE;
 		error = xfs_trans_reserve(tp, resblks,
 				XFS_WRITE_LOG_RES(mp), 0,
--- linux-mvl-dove-2.6.32.orig/fs/xfs/xfs_inode.h
+++ linux-mvl-dove-2.6.32/fs/xfs/xfs_inode.h
@@ -468,7 +468,7 @@
  * xfs_iget.c prototypes.
  */
 int		xfs_iget(struct xfs_mount *, struct xfs_trans *, xfs_ino_t,
-			 uint, uint, xfs_inode_t **, xfs_daddr_t);
+			 uint, uint, xfs_inode_t **);
 void		xfs_iput(xfs_inode_t *, uint);
 void		xfs_iput_new(xfs_inode_t *, uint);
 void		xfs_ilock(xfs_inode_t *, uint);
@@ -558,7 +558,7 @@
  * Flags for xfs_iget()
  */
 #define XFS_IGET_CREATE		0x1
-#define XFS_IGET_BULKSTAT	0x2
+#define XFS_IGET_UNTRUSTED	0x2
 
 int		xfs_inotobp(struct xfs_mount *, struct xfs_trans *,
 			    xfs_ino_t, struct xfs_dinode **,
@@ -567,7 +567,7 @@
 			  struct xfs_inode *, struct xfs_dinode **,
 			  struct xfs_buf **, uint);
 int		xfs_iread(struct xfs_mount *, struct xfs_trans *,
-			  struct xfs_inode *, xfs_daddr_t, uint);
+			  struct xfs_inode *, uint);
 void		xfs_dinode_to_disk(struct xfs_dinode *,
 				   struct xfs_icdinode *);
 void		xfs_idestroy_fork(struct xfs_inode *, int);
--- linux-mvl-dove-2.6.32.orig/fs/xfs/xfs_vnodeops.c
+++ linux-mvl-dove-2.6.32/fs/xfs/xfs_vnodeops.c
@@ -69,7 +69,6 @@
 	uint			commit_flags=0;
 	uid_t			uid=0, iuid=0;
 	gid_t			gid=0, igid=0;
-	int			timeflags = 0;
 	struct xfs_dquot	*udqp, *gdqp, *olddquot1, *olddquot2;
 	int			need_iolock = 1;
 
@@ -134,16 +133,13 @@
 	if (flags & XFS_ATTR_NOLOCK)
 		need_iolock = 0;
 	if (!(mask & ATTR_SIZE)) {
-		if ((mask != (ATTR_CTIME|ATTR_ATIME|ATTR_MTIME)) ||
-		    (mp->m_flags & XFS_MOUNT_WSYNC)) {
-			tp = xfs_trans_alloc(mp, XFS_TRANS_SETATTR_NOT_SIZE);
-			commit_flags = 0;
-			if ((code = xfs_trans_reserve(tp, 0,
-						     XFS_ICHANGE_LOG_RES(mp), 0,
-						     0, 0))) {
-				lock_flags = 0;
-				goto error_return;
-			}
+		tp = xfs_trans_alloc(mp, XFS_TRANS_SETATTR_NOT_SIZE);
+		commit_flags = 0;
+		code = xfs_trans_reserve(tp, 0, XFS_ICHANGE_LOG_RES(mp),
+					 0, 0, 0);
+		if (code) {
+			lock_flags = 0;
+			goto error_return;
 		}
 	} else {
 		if (DM_EVENT_ENABLED(ip, DM_EVENT_TRUNCATE) &&
@@ -294,15 +290,23 @@
 		 * or we are explicitly asked to change it. This handles
 		 * the semantic difference between truncate() and ftruncate()
 		 * as implemented in the VFS.
-		 */
-		if (iattr->ia_size != ip->i_size || (mask & ATTR_CTIME))
-			timeflags |= XFS_ICHGTIME_MOD | XFS_ICHGTIME_CHG;
+		 *
+		 * The regular truncate() case without ATTR_CTIME and ATTR_MTIME
+		 * is a special case where we need to update the times despite
+		 * not having these flags set.  For all other operations the
+		 * VFS set these flags explicitly if it wants a timestamp
+		 * update.
+		 */
+		if (iattr->ia_size != ip->i_size &&
+		    (!(mask & (ATTR_CTIME | ATTR_MTIME)))) {
+			iattr->ia_ctime = iattr->ia_mtime =
+				current_fs_time(inode->i_sb);
+			mask |= ATTR_CTIME | ATTR_MTIME;
+		}
 
 		if (iattr->ia_size > ip->i_size) {
 			ip->i_d.di_size = iattr->ia_size;
 			ip->i_size = iattr->ia_size;
-			if (!(flags & XFS_ATTR_DMI))
-				xfs_ichgtime(ip, XFS_ICHGTIME_CHG);
 			xfs_trans_log_inode(tp, ip, XFS_ILOG_CORE);
 		} else if (iattr->ia_size <= ip->i_size ||
 			   (iattr->ia_size == 0 && ip->i_d.di_nextents)) {
@@ -373,9 +377,6 @@
 			ip->i_d.di_gid = gid;
 			inode->i_gid = gid;
 		}
-
-		xfs_trans_log_inode (tp, ip, XFS_ILOG_CORE);
-		timeflags |= XFS_ICHGTIME_CHG;
 	}
 
 	/*
@@ -392,51 +393,37 @@
 
 		inode->i_mode &= S_IFMT;
 		inode->i_mode |= mode & ~S_IFMT;
-
-		xfs_trans_log_inode(tp, ip, XFS_ILOG_CORE);
-		timeflags |= XFS_ICHGTIME_CHG;
 	}
 
 	/*
 	 * Change file access or modified times.
 	 */
-	if (mask & (ATTR_ATIME|ATTR_MTIME)) {
-		if (mask & ATTR_ATIME) {
-			inode->i_atime = iattr->ia_atime;
-			ip->i_d.di_atime.t_sec = iattr->ia_atime.tv_sec;
-			ip->i_d.di_atime.t_nsec = iattr->ia_atime.tv_nsec;
-			ip->i_update_core = 1;
-		}
-		if (mask & ATTR_MTIME) {
-			inode->i_mtime = iattr->ia_mtime;
-			ip->i_d.di_mtime.t_sec = iattr->ia_mtime.tv_sec;
-			ip->i_d.di_mtime.t_nsec = iattr->ia_mtime.tv_nsec;
-			timeflags &= ~XFS_ICHGTIME_MOD;
-			timeflags |= XFS_ICHGTIME_CHG;
-		}
-		if (tp && (mask & (ATTR_MTIME_SET|ATTR_ATIME_SET)))
-			xfs_trans_log_inode (tp, ip, XFS_ILOG_CORE);
+	if (mask & ATTR_ATIME) {
+		inode->i_atime = iattr->ia_atime;
+		ip->i_d.di_atime.t_sec = iattr->ia_atime.tv_sec;
+		ip->i_d.di_atime.t_nsec = iattr->ia_atime.tv_nsec;
+		ip->i_update_core = 1;
 	}
-
-	/*
-	 * Change file inode change time only if ATTR_CTIME set
-	 * AND we have been called by a DMI function.
-	 */
-
-	if ((flags & XFS_ATTR_DMI) && (mask & ATTR_CTIME)) {
+	if (mask & ATTR_CTIME) {
 		inode->i_ctime = iattr->ia_ctime;
 		ip->i_d.di_ctime.t_sec = iattr->ia_ctime.tv_sec;
 		ip->i_d.di_ctime.t_nsec = iattr->ia_ctime.tv_nsec;
 		ip->i_update_core = 1;
-		timeflags &= ~XFS_ICHGTIME_CHG;
+	}
+	if (mask & ATTR_MTIME) {
+		inode->i_mtime = iattr->ia_mtime;
+		ip->i_d.di_mtime.t_sec = iattr->ia_mtime.tv_sec;
+		ip->i_d.di_mtime.t_nsec = iattr->ia_mtime.tv_nsec;
+		ip->i_update_core = 1;
 	}
 
 	/*
-	 * Send out timestamp changes that need to be set to the
-	 * current time.  Not done when called by a DMI function.
+	 * And finally, log the inode core if any attribute in it
+	 * has been changed.
 	 */
-	if (timeflags && !(flags & XFS_ATTR_DMI))
-		xfs_ichgtime(ip, timeflags);
+	if (mask & (ATTR_UID|ATTR_GID|ATTR_MODE|
+		    ATTR_ATIME|ATTR_CTIME|ATTR_MTIME))
+		xfs_trans_log_inode(tp, ip, XFS_ILOG_CORE);
 
 	XFS_STATS_INC(xs_ig_attrchg);
 
@@ -451,12 +438,10 @@
 	 * mix so this probably isn't worth the trouble to optimize.
 	 */
 	code = 0;
-	if (tp) {
-		if (mp->m_flags & XFS_MOUNT_WSYNC)
-			xfs_trans_set_sync(tp);
+	if (mp->m_flags & XFS_MOUNT_WSYNC)
+		xfs_trans_set_sync(tp);
 
-		code = xfs_trans_commit(tp, commit_flags);
-	}
+	code = xfs_trans_commit(tp, commit_flags);
 
 	xfs_iunlock(ip, lock_flags);
 
@@ -612,7 +597,7 @@
 {
 	xfs_trans_t	*tp;
 	int		error = 0;
-	int		log_flushed = 0, changed = 1;
+	int		log_flushed = 0;
 
 	xfs_itrace_entry(ip);
 
@@ -642,19 +627,11 @@
 		 * disk yet, the inode will be still be pinned.  If it is,
 		 * force the log.
 		 */
-
 		xfs_iunlock(ip, XFS_ILOCK_SHARED);
-
 		if (xfs_ipincount(ip)) {
 			error = _xfs_log_force(ip->i_mount, (xfs_lsn_t)0,
 				      XFS_LOG_FORCE | XFS_LOG_SYNC,
 				      &log_flushed);
-		} else {
-			/*
-			 * If the inode is not pinned and nothing has changed
-			 * we don't need to flush the cache.
-			 */
-			changed = 0;
 		}
 	} else	{
 		/*
@@ -689,7 +666,7 @@
 		xfs_iunlock(ip, XFS_ILOCK_EXCL);
 	}
 
-	if ((ip->i_mount->m_flags & XFS_MOUNT_BARRIER) && changed) {
+	if (ip->i_mount->m_flags & XFS_MOUNT_BARRIER) {
 		/*
 		 * If the log write didn't issue an ordered tag we need
 		 * to flush the disk cache for the data device now.
@@ -709,6 +686,11 @@
 }
 
 /*
+ * Flags for xfs_free_eofblocks
+ */
+#define XFS_FREE_EOF_TRYLOCK	(1<<0)
+
+/*
  * This is called by xfs_inactive to free any blocks beyond eof
  * when the link count isn't zero and by xfs_dm_punch_hole() when
  * punching a hole to EOF.
@@ -726,7 +708,6 @@
 	xfs_filblks_t	map_len;
 	int		nimaps;
 	xfs_bmbt_irec_t	imap;
-	int		use_iolock = (flags & XFS_FREE_EOF_LOCK);
 
 	/*
 	 * Figure out if there are any blocks beyond the end
@@ -768,14 +749,19 @@
 		 * cache and we can't
 		 * do that within a transaction.
 		 */
-		if (use_iolock)
+		if (flags & XFS_FREE_EOF_TRYLOCK) {
+			if (!xfs_ilock_nowait(ip, XFS_IOLOCK_EXCL)) {
+				xfs_trans_cancel(tp, 0);
+				return 0;
+			}
+		} else {
 			xfs_ilock(ip, XFS_IOLOCK_EXCL);
+		}
 		error = xfs_itruncate_start(ip, XFS_ITRUNC_DEFINITE,
 				    ip->i_size);
 		if (error) {
 			xfs_trans_cancel(tp, 0);
-			if (use_iolock)
-				xfs_iunlock(ip, XFS_IOLOCK_EXCL);
+			xfs_iunlock(ip, XFS_IOLOCK_EXCL);
 			return error;
 		}
 
@@ -812,8 +798,7 @@
 			error = xfs_trans_commit(tp,
 						XFS_TRANS_RELEASE_LOG_RES);
 		}
-		xfs_iunlock(ip, (use_iolock ? (XFS_IOLOCK_EXCL|XFS_ILOCK_EXCL)
-					    : XFS_ILOCK_EXCL));
+		xfs_iunlock(ip, XFS_IOLOCK_EXCL|XFS_ILOCK_EXCL);
 	}
 	return error;
 }
@@ -1113,7 +1098,17 @@
 		     (ip->i_df.if_flags & XFS_IFEXTENTS))  &&
 		    (!(ip->i_d.di_flags &
 				(XFS_DIFLAG_PREALLOC | XFS_DIFLAG_APPEND)))) {
-			error = xfs_free_eofblocks(mp, ip, XFS_FREE_EOF_LOCK);
+
+			/*
+			 * If we can't get the iolock just skip truncating
+			 * the blocks past EOF because we could deadlock
+			 * with the mmap_sem otherwise.  We'll get another
+			 * chance to drop them once the last reference to
+			 * the inode is dropped, so we'll never leak blocks
+			 * permanently.
+			 */
+			error = xfs_free_eofblocks(mp, ip,
+						   XFS_FREE_EOF_TRYLOCK);
 			if (error)
 				return error;
 		}
@@ -1184,7 +1179,7 @@
 		     (!(ip->i_d.di_flags &
 				(XFS_DIFLAG_PREALLOC | XFS_DIFLAG_APPEND)) ||
 		      (ip->i_delayed_blks != 0)))) {
-			error = xfs_free_eofblocks(mp, ip, XFS_FREE_EOF_LOCK);
+			error = xfs_free_eofblocks(mp, ip, 0);
 			if (error)
 				return VN_INACTIVE_CACHE;
 		}
@@ -1376,7 +1371,7 @@
 	if (error)
 		goto out;
 
-	error = xfs_iget(dp->i_mount, NULL, inum, 0, 0, ipp, 0);
+	error = xfs_iget(dp->i_mount, NULL, inum, 0, 0, ipp);
 	if (error)
 		goto out_free_name;
 
@@ -2456,46 +2451,6 @@
 	return error;
 }
 
-int
-xfs_reclaim(
-	xfs_inode_t	*ip)
-{
-
-	xfs_itrace_entry(ip);
-
-	ASSERT(!VN_MAPPED(VFS_I(ip)));
-
-	/* bad inode, get out here ASAP */
-	if (is_bad_inode(VFS_I(ip))) {
-		xfs_ireclaim(ip);
-		return 0;
-	}
-
-	xfs_ioend_wait(ip);
-
-	ASSERT(XFS_FORCED_SHUTDOWN(ip->i_mount) || ip->i_delayed_blks == 0);
-
-	/*
-	 * If we have nothing to flush with this inode then complete the
-	 * teardown now, otherwise break the link between the xfs inode and the
-	 * linux inode and clean up the xfs inode later. This avoids flushing
-	 * the inode to disk during the delete operation itself.
-	 *
-	 * When breaking the link, we need to set the XFS_IRECLAIMABLE flag
-	 * first to ensure that xfs_iunpin() will never see an xfs inode
-	 * that has a linux inode being reclaimed. Synchronisation is provided
-	 * by the i_flags_lock.
-	 */
-	if (!ip->i_update_core && (ip->i_itemp == NULL)) {
-		xfs_ilock(ip, XFS_ILOCK_EXCL);
-		xfs_iflock(ip);
-		xfs_iflags_set(ip, XFS_IRECLAIMABLE);
-		return xfs_reclaim_inode(ip, 1, XFS_IFLUSH_DELWRI_ELSE_SYNC);
-	}
-	xfs_inode_set_reclaim_tag(ip);
-	return 0;
-}
-
 /*
  * xfs_alloc_file_space()
  *      This routine allocates disk space for the given file.
--- linux-mvl-dove-2.6.32.orig/fs/xfs/xfs_mount.h
+++ linux-mvl-dove-2.6.32/fs/xfs/xfs_mount.h
@@ -209,6 +209,7 @@
 	__uint64_t		m_maxioffset;	/* maximum inode offset */
 	__uint64_t		m_resblks;	/* total reserved blocks */
 	__uint64_t		m_resblks_avail;/* available reserved blocks */
+	__uint64_t		m_resblks_save;	/* reserved blks @ remount,ro */
 	int			m_dalign;	/* stripe unit */
 	int			m_swidth;	/* stripe width */
 	int			m_sinoalign;	/* stripe unit inode alignment */
@@ -242,6 +243,7 @@
 	wait_queue_head_t	m_wait_single_sync_task;
 	__int64_t		m_update_flags;	/* sb flags we need to update
 						   on the next remount,rw */
+	struct list_head	m_mplist;	/* inode shrinker mount list */
 } xfs_mount_t;
 
 /*
--- linux-mvl-dove-2.6.32.orig/fs/xfs/xfs_inode.c
+++ linux-mvl-dove-2.6.32/fs/xfs/xfs_inode.c
@@ -177,7 +177,7 @@
 		if (unlikely(XFS_TEST_ERROR(!di_ok, mp,
 						XFS_ERRTAG_ITOBP_INOTOBP,
 						XFS_RANDOM_ITOBP_INOTOBP))) {
-			if (iget_flags & XFS_IGET_BULKSTAT) {
+			if (iget_flags & XFS_IGET_UNTRUSTED) {
 				xfs_trans_brelse(tp, bp);
 				return XFS_ERROR(EINVAL);
 			}
@@ -787,7 +787,6 @@
 	xfs_mount_t	*mp,
 	xfs_trans_t	*tp,
 	xfs_inode_t	*ip,
-	xfs_daddr_t	bno,
 	uint		iget_flags)
 {
 	xfs_buf_t	*bp;
@@ -797,11 +796,9 @@
 	/*
 	 * Fill in the location information in the in-core inode.
 	 */
-	ip->i_imap.im_blkno = bno;
 	error = xfs_imap(mp, tp, ip->i_ino, &ip->i_imap, iget_flags);
 	if (error)
 		return error;
-	ASSERT(bno == 0 || bno == ip->i_imap.im_blkno);
 
 	/*
 	 * Get pointers to the on-disk inode and the buffer containing it.
@@ -2877,8 +2874,8 @@
 	mp = ip->i_mount;
 
 	/*
-	 * If the inode isn't dirty, then just release the inode
-	 * flush lock and do nothing.
+	 * If the inode isn't dirty, then just release the inode flush lock and
+	 * do nothing.
 	 */
 	if (xfs_inode_clean(ip)) {
 		xfs_ifunlock(ip);
@@ -2904,6 +2901,19 @@
 	xfs_iunpin_wait(ip);
 
 	/*
+	 * For stale inodes we cannot rely on the backing buffer remaining
+	 * stale in cache for the remaining life of the stale inode and so
+	 * xfs_itobp() below may give us a buffer that no longer contains
+	 * inodes below. We have to check this after ensuring the inode is
+	 * unpinned so that it is safe to reclaim the stale inode after the
+	 * flush call.
+	 */
+	if (xfs_iflags_test(ip, XFS_ISTALE)) {
+		xfs_ifunlock(ip);
+		return 0;
+	}
+
+	/*
 	 * This may have been unpinned because the filesystem is shutting
 	 * down forcibly. If that's the case we must not write this inode
 	 * to disk, because the log record didn't make it to disk!
--- linux-mvl-dove-2.6.32.orig/fs/xfs/xfs_ialloc.c
+++ linux-mvl-dove-2.6.32/fs/xfs/xfs_ialloc.c
@@ -1206,6 +1206,69 @@
 	return error;
 }
 
+STATIC int
+xfs_imap_lookup(
+	struct xfs_mount	*mp,
+	struct xfs_trans	*tp,
+	xfs_agnumber_t		agno,
+	xfs_agino_t		agino,
+	xfs_agblock_t		agbno,
+	xfs_agblock_t		*chunk_agbno,
+	xfs_agblock_t		*offset_agbno,
+	int			flags)
+{
+	struct xfs_inobt_rec_incore rec;
+	struct xfs_btree_cur	*cur;
+	struct xfs_buf		*agbp;
+	int			error;
+	int			i;
+
+	down_read(&mp->m_peraglock);
+	error = xfs_ialloc_read_agi(mp, tp, agno, &agbp);
+	up_read(&mp->m_peraglock);
+	if (error) {
+		xfs_fs_cmn_err(CE_ALERT, mp, "xfs_imap: "
+				"xfs_ialloc_read_agi() returned "
+				"error %d, agno %d",
+				error, agno);
+		return error;
+	}
+
+	/*
+	 * Lookup the inode record for the given agino. If the record cannot be
+	 * found, then it's an invalid inode number and we should abort. Once
+	 * we have a record, we need to ensure it contains the inode number
+	 * we are looking up.
+	 */
+	cur = xfs_inobt_init_cursor(mp, tp, agbp, agno);
+	error = xfs_inobt_lookup(cur, agino, XFS_LOOKUP_LE, &i);
+	if (!error) {
+		if (i)
+			error = xfs_inobt_get_rec(cur, &rec, &i);
+		if (!error && i == 0)
+			error = EINVAL;
+	}
+
+	xfs_trans_brelse(tp, agbp);
+	xfs_btree_del_cursor(cur, XFS_BTREE_NOERROR);
+	if (error)
+		return error;
+
+	/* check that the returned record contains the required inode */
+	if (rec.ir_startino > agino ||
+	    rec.ir_startino + XFS_IALLOC_INODES(mp) <= agino)
+		return EINVAL;
+
+	/* for untrusted inodes check it is allocated first */
+	if ((flags & XFS_IGET_UNTRUSTED) &&
+	    (rec.ir_free & XFS_INOBT_MASK(agino - rec.ir_startino)))
+		return EINVAL;
+
+	*chunk_agbno = XFS_AGINO_TO_AGBNO(mp, rec.ir_startino);
+	*offset_agbno = agbno - *chunk_agbno;
+	return 0;
+}
+
 /*
  * Return the location of the inode in imap, for mapping it into a buffer.
  */
@@ -1238,8 +1301,11 @@
 	if (agno >= mp->m_sb.sb_agcount || agbno >= mp->m_sb.sb_agblocks ||
 	    ino != XFS_AGINO_TO_INO(mp, agno, agino)) {
 #ifdef DEBUG
-		/* no diagnostics for bulkstat, ino comes from userspace */
-		if (flags & XFS_IGET_BULKSTAT)
+		/*
+		 * Don't output diagnostic information for untrusted inodes
+		 * as they can be invalid without implying corruption.
+		 */
+		if (flags & XFS_IGET_UNTRUSTED)
 			return XFS_ERROR(EINVAL);
 		if (agno >= mp->m_sb.sb_agcount) {
 			xfs_fs_cmn_err(CE_ALERT, mp,
@@ -1266,6 +1332,23 @@
 		return XFS_ERROR(EINVAL);
 	}
 
+	blks_per_cluster = XFS_INODE_CLUSTER_SIZE(mp) >> mp->m_sb.sb_blocklog;
+
+	/*
+	 * For bulkstat and handle lookups, we have an untrusted inode number
+	 * that we have to verify is valid. We cannot do this just by reading
+	 * the inode buffer as it may have been unlinked and removed leaving
+	 * inodes in stale state on disk. Hence we have to do a btree lookup
+	 * in all cases where an untrusted inode number is passed.
+	 */
+	if (flags & XFS_IGET_UNTRUSTED) {
+		error = xfs_imap_lookup(mp, tp, agno, agino, agbno,
+					&chunk_agbno, &offset_agbno, flags);
+		if (error)
+			return error;
+		goto out_map;
+	}
+
 	/*
 	 * If the inode cluster size is the same as the blocksize or
 	 * smaller we get to the buffer by simple arithmetics.
@@ -1280,24 +1363,6 @@
 		return 0;
 	}
 
-	blks_per_cluster = XFS_INODE_CLUSTER_SIZE(mp) >> mp->m_sb.sb_blocklog;
-
-	/*
-	 * If we get a block number passed from bulkstat we can use it to
-	 * find the buffer easily.
-	 */
-	if (imap->im_blkno) {
-		offset = XFS_INO_TO_OFFSET(mp, ino);
-		ASSERT(offset < mp->m_sb.sb_inopblock);
-
-		cluster_agbno = xfs_daddr_to_agbno(mp, imap->im_blkno);
-		offset += (agbno - cluster_agbno) * mp->m_sb.sb_inopblock;
-
-		imap->im_len = XFS_FSB_TO_BB(mp, blks_per_cluster);
-		imap->im_boffset = (ushort)(offset << mp->m_sb.sb_inodelog);
-		return 0;
-	}
-
 	/*
 	 * If the inode chunks are aligned then use simple maths to
 	 * find the location. Otherwise we have to do a btree
@@ -1307,52 +1372,13 @@
 		offset_agbno = agbno & mp->m_inoalign_mask;
 		chunk_agbno = agbno - offset_agbno;
 	} else {
-		xfs_btree_cur_t	*cur;	/* inode btree cursor */
-		xfs_inobt_rec_incore_t chunk_rec;
-		xfs_buf_t	*agbp;	/* agi buffer */
-		int		i;	/* temp state */
-
-		down_read(&mp->m_peraglock);
-		error = xfs_ialloc_read_agi(mp, tp, agno, &agbp);
-		up_read(&mp->m_peraglock);
-		if (error) {
-			xfs_fs_cmn_err(CE_ALERT, mp, "xfs_imap: "
-					"xfs_ialloc_read_agi() returned "
-					"error %d, agno %d",
-					error, agno);
-			return error;
-		}
-
-		cur = xfs_inobt_init_cursor(mp, tp, agbp, agno);
-		error = xfs_inobt_lookup(cur, agino, XFS_LOOKUP_LE, &i);
-		if (error) {
-			xfs_fs_cmn_err(CE_ALERT, mp, "xfs_imap: "
-					"xfs_inobt_lookup() failed");
-			goto error0;
-		}
-
-		error = xfs_inobt_get_rec(cur, &chunk_rec, &i);
-		if (error) {
-			xfs_fs_cmn_err(CE_ALERT, mp, "xfs_imap: "
-					"xfs_inobt_get_rec() failed");
-			goto error0;
-		}
-		if (i == 0) {
-#ifdef DEBUG
-			xfs_fs_cmn_err(CE_ALERT, mp, "xfs_imap: "
-					"xfs_inobt_get_rec() failed");
-#endif /* DEBUG */
-			error = XFS_ERROR(EINVAL);
-		}
- error0:
-		xfs_trans_brelse(tp, agbp);
-		xfs_btree_del_cursor(cur, XFS_BTREE_NOERROR);
+		error = xfs_imap_lookup(mp, tp, agno, agino, agbno,
+					&chunk_agbno, &offset_agbno, flags);
 		if (error)
 			return error;
-		chunk_agbno = XFS_AGINO_TO_AGBNO(mp, chunk_rec.ir_startino);
-		offset_agbno = agbno - chunk_agbno;
 	}
 
+out_map:
 	ASSERT(agbno >= chunk_agbno);
 	cluster_agbno = chunk_agbno +
 		((offset_agbno / blks_per_cluster) * blks_per_cluster);
--- linux-mvl-dove-2.6.32.orig/fs/xfs/xfs_trans.h
+++ linux-mvl-dove-2.6.32/fs/xfs/xfs_trans.h
@@ -924,7 +924,7 @@
  * XFS transaction mechanism exported interfaces.
  */
 xfs_trans_t	*xfs_trans_alloc(struct xfs_mount *, uint);
-xfs_trans_t	*_xfs_trans_alloc(struct xfs_mount *, uint);
+xfs_trans_t	*_xfs_trans_alloc(struct xfs_mount *, uint, uint);
 xfs_trans_t	*xfs_trans_dup(xfs_trans_t *);
 int		xfs_trans_reserve(xfs_trans_t *, uint, uint, uint,
 				  uint, uint);
--- linux-mvl-dove-2.6.32.orig/fs/xfs/xfs_iget.c
+++ linux-mvl-dove-2.6.32/fs/xfs/xfs_iget.c
@@ -228,13 +228,12 @@
 		xfs_itrace_exit_tag(ip, "xfs_iget.alloc");
 
 		/*
-		 * We need to set XFS_INEW atomically with clearing the
-		 * reclaimable tag so that we do have an indicator of the
-		 * inode still being initialized.
+		 * We need to set XFS_IRECLAIM to prevent xfs_reclaim_inode
+		 * from stomping over us while we recycle the inode.  We can't
+		 * clear the radix tree reclaimable tag yet as it requires
+		 * pag_ici_lock to be held exclusive.
 		 */
-		ip->i_flags |= XFS_INEW;
-		ip->i_flags &= ~XFS_IRECLAIMABLE;
-		__xfs_inode_clear_reclaim_tag(mp, pag, ip);
+		ip->i_flags |= XFS_IRECLAIM;
 
 		spin_unlock(&ip->i_flags_lock);
 		read_unlock(&pag->pag_ici_lock);
@@ -253,7 +252,15 @@
 			__xfs_inode_set_reclaim_tag(pag, ip);
 			goto out_error;
 		}
+
+		write_lock(&pag->pag_ici_lock);
+		spin_lock(&ip->i_flags_lock);
+		ip->i_flags &= ~(XFS_IRECLAIMABLE | XFS_IRECLAIM);
+		ip->i_flags |= XFS_INEW;
+		__xfs_inode_clear_reclaim_tag(mp, pag, ip);
 		inode->i_state = I_LOCK|I_NEW;
+		spin_unlock(&ip->i_flags_lock);
+		write_unlock(&pag->pag_ici_lock);
 	} else {
 		/* If the VFS inode is being torn down, pause and try again. */
 		if (!igrab(inode)) {
@@ -288,7 +295,6 @@
 	xfs_trans_t		*tp,
 	xfs_ino_t		ino,
 	struct xfs_inode	**ipp,
-	xfs_daddr_t		bno,
 	int			flags,
 	int			lock_flags) __releases(pag->pag_ici_lock)
 {
@@ -301,7 +307,7 @@
 	if (!ip)
 		return ENOMEM;
 
-	error = xfs_iread(mp, tp, ip, bno, flags);
+	error = xfs_iread(mp, tp, ip, flags);
 	if (error)
 		goto out_destroy;
 
@@ -385,8 +391,6 @@
  *        within the file system for the inode being requested.
  * lock_flags -- flags indicating how to lock the inode.  See the comment
  *		 for xfs_ilock() for a list of valid values.
- * bno -- the block number starting the buffer containing the inode,
- *	  if known (as by bulkstat), else 0.
  */
 int
 xfs_iget(
@@ -395,8 +399,7 @@
 	xfs_ino_t	ino,
 	uint		flags,
 	uint		lock_flags,
-	xfs_inode_t	**ipp,
-	xfs_daddr_t	bno)
+	xfs_inode_t	**ipp)
 {
 	xfs_inode_t	*ip;
 	int		error;
@@ -427,7 +430,7 @@
 		read_unlock(&pag->pag_ici_lock);
 		XFS_STATS_INC(xs_ig_missed);
 
-		error = xfs_iget_cache_miss(mp, pag, tp, ino, &ip, bno,
+		error = xfs_iget_cache_miss(mp, pag, tp, ino, &ip,
 							flags, lock_flags);
 		if (error)
 			goto out_error_or_again;
@@ -511,17 +514,22 @@
 {
 	struct xfs_mount	*mp = ip->i_mount;
 	struct xfs_perag	*pag;
+	xfs_agino_t		agino = XFS_INO_TO_AGINO(mp, ip->i_ino);
 
 	XFS_STATS_INC(xs_ig_reclaims);
 
 	/*
-	 * Remove the inode from the per-AG radix tree.  It doesn't matter
-	 * if it was never added to it because radix_tree_delete can deal
-	 * with that case just fine.
+	 * Remove the inode from the per-AG radix tree.
+	 *
+	 * Because radix_tree_delete won't complain even if the item was never
+	 * added to the tree assert that it's been there before to catch
+	 * problems with the inode life time early on.
 	 */
 	pag = xfs_get_perag(mp, ip->i_ino);
 	write_lock(&pag->pag_ici_lock);
-	radix_tree_delete(&pag->pag_ici_root, XFS_INO_TO_AGINO(mp, ip->i_ino));
+	if (!radix_tree_delete(&pag->pag_ici_root, agino))
+		ASSERT(0);
+	__xfs_inode_clear_reclaim(pag, ip);
 	write_unlock(&pag->pag_ici_lock);
 	xfs_put_perag(mp, pag);
 
--- linux-mvl-dove-2.6.32.orig/fs/xfs/xfs_itable.h
+++ linux-mvl-dove-2.6.32/fs/xfs/xfs_itable.h
@@ -27,10 +27,7 @@
 			       xfs_ino_t	ino,
 			       void		__user *buffer,
 			       int		ubsize,
-			       void		*private_data,
-			       xfs_daddr_t	bno,
 			       int		*ubused,
-			       void		*dip,
 			       int		*stat);
 
 /*
@@ -41,13 +38,6 @@
 #define BULKSTAT_RV_GIVEUP	2
 
 /*
- * Values for bulkstat flag argument.
- */
-#define BULKSTAT_FG_IGET	0x1	/* Go through the buffer cache */
-#define BULKSTAT_FG_QUICK	0x2	/* No iget, walk the dinode cluster */
-#define BULKSTAT_FG_INLINE	0x4	/* No iget if inline attrs */
-
-/*
  * Return stat information in bulk (by-inode) for the filesystem.
  */
 int					/* error status */
@@ -56,10 +46,8 @@
 	xfs_ino_t	*lastino,	/* last inode returned */
 	int		*count,		/* size of buffer/count returned */
 	bulkstat_one_pf formatter,	/* func that'd fill a single buf */
-	void		*private_data,	/* private data for formatter */
 	size_t		statstruct_size,/* sizeof struct that we're filling */
 	char		__user *ubuffer,/* buffer with inode stats */
-	int		flags,		/* flag to control access method */
 	int		*done);		/* 1 if there are more stats to get */
 
 int
@@ -82,9 +70,7 @@
 	void			__user *buffer,
 	int			ubsize,
 	bulkstat_one_fmt_pf	formatter,
-	xfs_daddr_t		bno,
 	int			*ubused,
-	void			*dibuff,
 	int			*stat);
 
 int
@@ -93,10 +79,7 @@
 	xfs_ino_t		ino,
 	void			__user *buffer,
 	int			ubsize,
-	void			*private_data,
-	xfs_daddr_t		bno,
 	int			*ubused,
-	void			*dibuff,
 	int			*stat);
 
 typedef int (*inumbers_fmt_pf)(
--- linux-mvl-dove-2.6.32.orig/fs/xfs/xfs_rtalloc.c
+++ linux-mvl-dove-2.6.32/fs/xfs/xfs_rtalloc.c
@@ -2274,12 +2274,12 @@
 	sbp = &mp->m_sb;
 	if (sbp->sb_rbmino == NULLFSINO)
 		return 0;
-	error = xfs_iget(mp, NULL, sbp->sb_rbmino, 0, 0, &mp->m_rbmip, 0);
+	error = xfs_iget(mp, NULL, sbp->sb_rbmino, 0, 0, &mp->m_rbmip);
 	if (error)
 		return error;
 	ASSERT(mp->m_rbmip != NULL);
 	ASSERT(sbp->sb_rsumino != NULLFSINO);
-	error = xfs_iget(mp, NULL, sbp->sb_rsumino, 0, 0, &mp->m_rsumip, 0);
+	error = xfs_iget(mp, NULL, sbp->sb_rsumino, 0, 0, &mp->m_rsumip);
 	if (error) {
 		IRELE(mp->m_rbmip);
 		return error;
--- linux-mvl-dove-2.6.32.orig/fs/xfs/xfs_trans_inode.c
+++ linux-mvl-dove-2.6.32/fs/xfs/xfs_trans_inode.c
@@ -62,7 +62,7 @@
 {
 	int			error;
 
-	error = xfs_iget(mp, tp, ino, flags, lock_flags, ipp, 0);
+	error = xfs_iget(mp, tp, ino, flags, lock_flags, ipp);
 	if (!error && tp)
 		xfs_trans_ijoin(tp, *ipp, lock_flags);
 	return error;
--- linux-mvl-dove-2.6.32.orig/fs/xfs/xfs_ag.h
+++ linux-mvl-dove-2.6.32/fs/xfs/xfs_ag.h
@@ -215,6 +215,7 @@
 	int		pag_ici_init;	/* incore inode cache initialised */
 	rwlock_t	pag_ici_lock;	/* incore inode lock */
 	struct radix_tree_root pag_ici_root;	/* incore inode cache root */
+	int		pag_ici_reclaimable;	/* reclaimable inodes */
 #endif
 } xfs_perag_t;
 
--- linux-mvl-dove-2.6.32.orig/fs/xfs/xfs_trans.c
+++ linux-mvl-dove-2.6.32/fs/xfs/xfs_trans.c
@@ -236,19 +236,20 @@
 	uint		type)
 {
 	xfs_wait_for_freeze(mp, SB_FREEZE_TRANS);
-	return _xfs_trans_alloc(mp, type);
+	return _xfs_trans_alloc(mp, type, KM_SLEEP);
 }
 
 xfs_trans_t *
 _xfs_trans_alloc(
 	xfs_mount_t	*mp,
-	uint		type)
+	uint		type,
+	uint		memflags)
 {
 	xfs_trans_t	*tp;
 
 	atomic_inc(&mp->m_active_trans);
 
-	tp = kmem_zone_zalloc(xfs_trans_zone, KM_SLEEP);
+	tp = kmem_zone_zalloc(xfs_trans_zone, memflags);
 	tp->t_magic = XFS_TRANS_MAGIC;
 	tp->t_type = type;
 	tp->t_mountp = mp;
--- linux-mvl-dove-2.6.32.orig/fs/xfs/xfs_rw.h
+++ linux-mvl-dove-2.6.32/fs/xfs/xfs_rw.h
@@ -37,13 +37,6 @@
 }
 
 /*
- * Flags for xfs_free_eofblocks
- */
-#define XFS_FREE_EOF_LOCK	(1<<0)
-#define XFS_FREE_EOF_NOLOCK	(1<<1)
-
-
-/*
  * helper function to extract extent size hint from inode
  */
 STATIC_INLINE xfs_extlen_t
--- linux-mvl-dove-2.6.32.orig/fs/xfs/linux-2.6/xfs_sync.c
+++ linux-mvl-dove-2.6.32/fs/xfs/linux-2.6/xfs_sync.c
@@ -64,7 +64,6 @@
 	 * as the tree is sparse and a gang lookup walks to find
 	 * the number of objects requested.
 	 */
-	read_lock(&pag->pag_ici_lock);
 	if (tag == XFS_ICI_NO_TAG) {
 		nr_found = radix_tree_gang_lookup(&pag->pag_ici_root,
 				(void **)&ip, *first_index, 1);
@@ -73,7 +72,7 @@
 				(void **)&ip, *first_index, 1, tag);
 	}
 	if (!nr_found)
-		goto unlock;
+		return NULL;
 
 	/*
 	 * Update the index for the next lookup. Catch overflows
@@ -83,13 +82,8 @@
 	 */
 	*first_index = XFS_INO_TO_AGINO(mp, ip->i_ino + 1);
 	if (*first_index < XFS_INO_TO_AGINO(mp, ip->i_ino))
-		goto unlock;
-
+		return NULL;
 	return ip;
-
-unlock:
-	read_unlock(&pag->pag_ici_lock);
-	return NULL;
 }
 
 STATIC int
@@ -99,7 +93,9 @@
 	int			(*execute)(struct xfs_inode *ip,
 					   struct xfs_perag *pag, int flags),
 	int			flags,
-	int			tag)
+	int			tag,
+	int			exclusive,
+	int			*nr_to_scan)
 {
 	struct xfs_perag	*pag = &mp->m_perag[ag];
 	uint32_t		first_index;
@@ -113,10 +109,20 @@
 		int		error = 0;
 		xfs_inode_t	*ip;
 
+		if (exclusive)
+			write_lock(&pag->pag_ici_lock);
+		else
+			read_lock(&pag->pag_ici_lock);
 		ip = xfs_inode_ag_lookup(mp, pag, &first_index, tag);
-		if (!ip)
+		if (!ip) {
+			if (exclusive)
+				write_unlock(&pag->pag_ici_lock);
+			else
+				read_unlock(&pag->pag_ici_lock);
 			break;
+		}
 
+		/* execute releases pag->pag_ici_lock */
 		error = execute(ip, pag, flags);
 		if (error == EAGAIN) {
 			skipped++;
@@ -124,13 +130,12 @@
 		}
 		if (error)
 			last_error = error;
-		/*
-		 * bail out if the filesystem is corrupted.
-		 */
+
+		/* bail out if the filesystem is corrupted.  */
 		if (error == EFSCORRUPTED)
 			break;
 
-	} while (1);
+	} while ((*nr_to_scan)--);
 
 	if (skipped) {
 		delay(1);
@@ -147,22 +152,31 @@
 	int			(*execute)(struct xfs_inode *ip,
 					   struct xfs_perag *pag, int flags),
 	int			flags,
-	int			tag)
+	int			tag,
+	int			exclusive,
+	int			*nr_to_scan)
 {
 	int			error = 0;
 	int			last_error = 0;
 	xfs_agnumber_t		ag;
+	int			nr;
 
+	nr = nr_to_scan ? *nr_to_scan : INT_MAX;
 	for (ag = 0; ag < mp->m_sb.sb_agcount; ag++) {
 		if (!mp->m_perag[ag].pag_ici_init)
 			continue;
-		error = xfs_inode_ag_walk(mp, ag, execute, flags, tag);
+		error = xfs_inode_ag_walk(mp, ag, execute, flags, tag,
+						exclusive, &nr);
 		if (error) {
 			last_error = error;
 			if (error == EFSCORRUPTED)
 				break;
 		}
+		if (nr <= 0)
+			break;
 	}
+	if (nr_to_scan)
+		*nr_to_scan = nr;
 	return XFS_ERROR(last_error);
 }
 
@@ -173,30 +187,31 @@
 	struct xfs_perag	*pag)
 {
 	struct inode		*inode = VFS_I(ip);
+	int			error = EFSCORRUPTED;
 
 	/* nothing to sync during shutdown */
-	if (XFS_FORCED_SHUTDOWN(ip->i_mount)) {
-		read_unlock(&pag->pag_ici_lock);
-		return EFSCORRUPTED;
-	}
+	if (XFS_FORCED_SHUTDOWN(ip->i_mount))
+		goto out_unlock;
 
-	/*
-	 * If we can't get a reference on the inode, it must be in reclaim.
-	 * Leave it for the reclaim code to flush. Also avoid inodes that
-	 * haven't been fully initialised.
-	 */
-	if (!igrab(inode)) {
-		read_unlock(&pag->pag_ici_lock);
-		return ENOENT;
-	}
-	read_unlock(&pag->pag_ici_lock);
+	/* avoid new or reclaimable inodes. Leave for reclaim code to flush */
+	error = ENOENT;
+	if (xfs_iflags_test(ip, XFS_INEW | XFS_IRECLAIMABLE | XFS_IRECLAIM))
+		goto out_unlock;
+
+	/* If we can't grab the inode, it must on it's way to reclaim. */
+	if (!igrab(inode))
+		goto out_unlock;
 
-	if (is_bad_inode(inode) || xfs_iflags_test(ip, XFS_INEW)) {
+	if (is_bad_inode(inode)) {
 		IRELE(ip);
-		return ENOENT;
+		goto out_unlock;
 	}
 
-	return 0;
+	/* inode is valid */
+	error = 0;
+out_unlock:
+	read_unlock(&pag->pag_ici_lock);
+	return error;
 }
 
 STATIC int
@@ -281,7 +296,7 @@
 	ASSERT((flags & ~(SYNC_TRYLOCK|SYNC_WAIT)) == 0);
 
 	error = xfs_inode_ag_iterator(mp, xfs_sync_inode_data, flags,
-				      XFS_ICI_NO_TAG);
+				      XFS_ICI_NO_TAG, 0, NULL);
 	if (error)
 		return XFS_ERROR(error);
 
@@ -303,7 +318,7 @@
 	ASSERT((flags & ~SYNC_WAIT) == 0);
 
 	return xfs_inode_ag_iterator(mp, xfs_sync_inode_attr, flags,
-				     XFS_ICI_NO_TAG);
+				     XFS_ICI_NO_TAG, 0, NULL);
 }
 
 STATIC int
@@ -663,35 +678,79 @@
 	kthread_stop(mp->m_sync_task);
 }
 
-int
+void
+__xfs_inode_set_reclaim_tag(
+	struct xfs_perag	*pag,
+	struct xfs_inode	*ip)
+{
+	radix_tree_tag_set(&pag->pag_ici_root,
+			   XFS_INO_TO_AGINO(ip->i_mount, ip->i_ino),
+			   XFS_ICI_RECLAIM_TAG);
+	pag->pag_ici_reclaimable++;
+}
+
+/*
+ * We set the inode flag atomically with the radix tree tag.
+ * Once we get tag lookups on the radix tree, this inode flag
+ * can go away.
+ */
+void
+xfs_inode_set_reclaim_tag(
+	xfs_inode_t	*ip)
+{
+	xfs_mount_t	*mp = ip->i_mount;
+	xfs_perag_t	*pag = xfs_get_perag(mp, ip->i_ino);
+
+	write_lock(&pag->pag_ici_lock);
+	spin_lock(&ip->i_flags_lock);
+	__xfs_inode_set_reclaim_tag(pag, ip);
+	__xfs_iflags_set(ip, XFS_IRECLAIMABLE);
+	spin_unlock(&ip->i_flags_lock);
+	write_unlock(&pag->pag_ici_lock);
+	xfs_put_perag(mp, pag);
+}
+
+void
+__xfs_inode_clear_reclaim(
+	xfs_perag_t	*pag,
+	xfs_inode_t	*ip)
+{
+	pag->pag_ici_reclaimable--;
+}
+
+void
+__xfs_inode_clear_reclaim_tag(
+       xfs_mount_t     *mp,
+       xfs_perag_t     *pag,
+       xfs_inode_t     *ip)
+{
+       radix_tree_tag_clear(&pag->pag_ici_root,
+                       XFS_INO_TO_AGINO(mp, ip->i_ino), XFS_ICI_RECLAIM_TAG);
+       __xfs_inode_clear_reclaim(pag, ip);
+}
+
+STATIC int
 xfs_reclaim_inode(
-	xfs_inode_t	*ip,
-	int		locked,
-	int		sync_mode)
-{
-	xfs_perag_t	*pag = xfs_get_perag(ip->i_mount, ip->i_ino);
-
-	/* The hash lock here protects a thread in xfs_iget_core from
-	 * racing with us on linking the inode back with a vnode.
-	 * Once we have the XFS_IRECLAIM flag set it will not touch
-	 * us.
+	struct xfs_inode	*ip,
+	struct xfs_perag	*pag,
+	int			sync_mode)
+{
+	/*
+	 * The radix tree lock here protects a thread in xfs_iget from racing
+	 * with us starting reclaim on the inode.  Once we have the
+	 * XFS_IRECLAIM flag set it will not touch us.
 	 */
-	write_lock(&pag->pag_ici_lock);
 	spin_lock(&ip->i_flags_lock);
-	if (__xfs_iflags_test(ip, XFS_IRECLAIM) ||
-	    !__xfs_iflags_test(ip, XFS_IRECLAIMABLE)) {
+	ASSERT_ALWAYS(__xfs_iflags_test(ip, XFS_IRECLAIMABLE));
+	if (__xfs_iflags_test(ip, XFS_IRECLAIM)) {
+		/* ignore as it is already under reclaim */
 		spin_unlock(&ip->i_flags_lock);
 		write_unlock(&pag->pag_ici_lock);
-		if (locked) {
-			xfs_ifunlock(ip);
-			xfs_iunlock(ip, XFS_ILOCK_EXCL);
-		}
-		return -EAGAIN;
+		return 0;
 	}
 	__xfs_iflags_set(ip, XFS_IRECLAIM);
 	spin_unlock(&ip->i_flags_lock);
 	write_unlock(&pag->pag_ici_lock);
-	xfs_put_perag(ip->i_mount, pag);
 
 	/*
 	 * If the inode is still dirty, then flush it out.  If the inode
@@ -704,10 +763,8 @@
 	 * We get the flush lock regardless, though, just to make sure
 	 * we don't free it while it is being flushed.
 	 */
-	if (!locked) {
-		xfs_ilock(ip, XFS_ILOCK_EXCL);
-		xfs_iflock(ip);
-	}
+	xfs_ilock(ip, XFS_ILOCK_EXCL);
+	xfs_iflock(ip);
 
 	/*
 	 * In the case of a forced shutdown we rely on xfs_iflush() to
@@ -724,68 +781,94 @@
 	return 0;
 }
 
-void
-__xfs_inode_set_reclaim_tag(
-	struct xfs_perag	*pag,
-	struct xfs_inode	*ip)
+int
+xfs_reclaim_inodes(
+	xfs_mount_t	*mp,
+	int		mode)
 {
-	radix_tree_tag_set(&pag->pag_ici_root,
-			   XFS_INO_TO_AGINO(ip->i_mount, ip->i_ino),
-			   XFS_ICI_RECLAIM_TAG);
+	return xfs_inode_ag_iterator(mp, xfs_reclaim_inode, mode,
+					XFS_ICI_RECLAIM_TAG, 1, NULL);
 }
 
 /*
- * We set the inode flag atomically with the radix tree tag.
- * Once we get tag lookups on the radix tree, this inode flag
- * can go away.
+ * Shrinker infrastructure.
+ *
+ * This is all far more complex than it needs to be. It adds a global list of
+ * mounts because the shrinkers can only call a global context. We need to make
+ * the shrinkers pass a context to avoid the need for global state.
  */
-void
-xfs_inode_set_reclaim_tag(
-	xfs_inode_t	*ip)
-{
-	xfs_mount_t	*mp = ip->i_mount;
-	xfs_perag_t	*pag = xfs_get_perag(mp, ip->i_ino);
+static LIST_HEAD(xfs_mount_list);
+static struct rw_semaphore xfs_mount_list_lock;
 
-	read_lock(&pag->pag_ici_lock);
-	spin_lock(&ip->i_flags_lock);
-	__xfs_inode_set_reclaim_tag(pag, ip);
-	__xfs_iflags_set(ip, XFS_IRECLAIMABLE);
-	spin_unlock(&ip->i_flags_lock);
-	read_unlock(&pag->pag_ici_lock);
-	xfs_put_perag(mp, pag);
+static int
+xfs_reclaim_inode_shrink(
+	int		nr_to_scan,
+	gfp_t		gfp_mask)
+{
+	struct xfs_mount *mp;
+	xfs_agnumber_t	ag;
+	int		reclaimable = 0;
+
+	if (nr_to_scan) {
+		if (!(gfp_mask & __GFP_FS))
+			return -1;
+
+		down_read(&xfs_mount_list_lock);
+		list_for_each_entry(mp, &xfs_mount_list, m_mplist) {
+			xfs_inode_ag_iterator(mp, xfs_reclaim_inode, 0,
+					XFS_ICI_RECLAIM_TAG, 1, &nr_to_scan);
+			if (nr_to_scan <= 0)
+				break;
+		}
+		up_read(&xfs_mount_list_lock);
+	}
+
+	down_read(&xfs_mount_list_lock);
+	list_for_each_entry(mp, &xfs_mount_list, m_mplist) {
+		for (ag = 0; ag < mp->m_sb.sb_agcount; ag++) {
+
+			if (!mp->m_perag[ag].pag_ici_init)
+				continue;
+			reclaimable += mp->m_perag[ag].pag_ici_reclaimable;
+		}
+	}
+	up_read(&xfs_mount_list_lock);
+	return reclaimable;
 }
 
-void
-__xfs_inode_clear_reclaim_tag(
-	xfs_mount_t	*mp,
-	xfs_perag_t	*pag,
-	xfs_inode_t	*ip)
+static struct shrinker xfs_inode_shrinker = {
+	.shrink = xfs_reclaim_inode_shrink,
+	.seeks = DEFAULT_SEEKS,
+};
+
+void __init
+xfs_inode_shrinker_init(void)
 {
-	radix_tree_tag_clear(&pag->pag_ici_root,
-			XFS_INO_TO_AGINO(mp, ip->i_ino), XFS_ICI_RECLAIM_TAG);
+	init_rwsem(&xfs_mount_list_lock);
+	register_shrinker(&xfs_inode_shrinker);
 }
 
-STATIC int
-xfs_reclaim_inode_now(
-	struct xfs_inode	*ip,
-	struct xfs_perag	*pag,
-	int			flags)
+void
+xfs_inode_shrinker_destroy(void)
 {
-	/* ignore if already under reclaim */
-	if (xfs_iflags_test(ip, XFS_IRECLAIM)) {
-		read_unlock(&pag->pag_ici_lock);
-		return 0;
-	}
-	read_unlock(&pag->pag_ici_lock);
+	ASSERT(list_empty(&xfs_mount_list));
+	unregister_shrinker(&xfs_inode_shrinker);
+}
 
-	return xfs_reclaim_inode(ip, 0, flags);
+void
+xfs_inode_shrinker_register(
+	struct xfs_mount	*mp)
+{
+	down_write(&xfs_mount_list_lock);
+	list_add_tail(&mp->m_mplist, &xfs_mount_list);
+	up_write(&xfs_mount_list_lock);
 }
 
-int
-xfs_reclaim_inodes(
-	xfs_mount_t	*mp,
-	int		mode)
+void
+xfs_inode_shrinker_unregister(
+	struct xfs_mount	*mp)
 {
-	return xfs_inode_ag_iterator(mp, xfs_reclaim_inode_now, mode,
-					XFS_ICI_RECLAIM_TAG);
+	down_write(&xfs_mount_list_lock);
+	list_del(&mp->m_mplist);
+	up_write(&xfs_mount_list_lock);
 }
--- linux-mvl-dove-2.6.32.orig/fs/xfs/linux-2.6/xfs_iops.c
+++ linux-mvl-dove-2.6.32/fs/xfs/linux-2.6/xfs_iops.c
@@ -573,8 +573,8 @@
 	bf.l_len = len;
 
 	xfs_ilock(ip, XFS_IOLOCK_EXCL);
-	error = xfs_change_file_space(ip, XFS_IOC_RESVSP, &bf,
-				      0, XFS_ATTR_NOLOCK);
+	error = -xfs_change_file_space(ip, XFS_IOC_RESVSP, &bf,
+				       0, XFS_ATTR_NOLOCK);
 	if (!error && !(mode & FALLOC_FL_KEEP_SIZE) &&
 	    offset + len > i_size_read(inode))
 		new_size = offset + len;
@@ -585,7 +585,7 @@
 
 		iattr.ia_valid = ATTR_SIZE;
 		iattr.ia_size = new_size;
-		error = xfs_setattr(ip, &iattr, XFS_ATTR_NOLOCK);
+		error = -xfs_setattr(ip, &iattr, XFS_ATTR_NOLOCK);
 	}
 
 	xfs_iunlock(ip, XFS_IOLOCK_EXCL);
--- linux-mvl-dove-2.6.32.orig/fs/xfs/linux-2.6/xfs_sync.h
+++ linux-mvl-dove-2.6.32/fs/xfs/linux-2.6/xfs_sync.h
@@ -44,17 +44,22 @@
 
 void xfs_flush_inodes(struct xfs_inode *ip);
 
-int xfs_reclaim_inode(struct xfs_inode *ip, int locked, int sync_mode);
 int xfs_reclaim_inodes(struct xfs_mount *mp, int mode);
 
 void xfs_inode_set_reclaim_tag(struct xfs_inode *ip);
 void __xfs_inode_set_reclaim_tag(struct xfs_perag *pag, struct xfs_inode *ip);
+void __xfs_inode_clear_reclaim(struct xfs_perag *pag, struct xfs_inode *ip);
 void __xfs_inode_clear_reclaim_tag(struct xfs_mount *mp, struct xfs_perag *pag,
 				struct xfs_inode *ip);
 
 int xfs_sync_inode_valid(struct xfs_inode *ip, struct xfs_perag *pag);
 int xfs_inode_ag_iterator(struct xfs_mount *mp,
 	int (*execute)(struct xfs_inode *ip, struct xfs_perag *pag, int flags),
-	int flags, int tag);
+	int flags, int tag, int write_lock, int *nr_to_scan);
+
+void xfs_inode_shrinker_init(void);
+void xfs_inode_shrinker_destroy(void);
+void xfs_inode_shrinker_register(struct xfs_mount *mp);
+void xfs_inode_shrinker_unregister(struct xfs_mount *mp);
 
 #endif
--- linux-mvl-dove-2.6.32.orig/fs/xfs/linux-2.6/xfs_ioctl.c
+++ linux-mvl-dove-2.6.32/fs/xfs/linux-2.6/xfs_ioctl.c
@@ -673,10 +673,9 @@
 		error = xfs_bulkstat_single(mp, &inlast,
 						bulkreq.ubuffer, &done);
 	else	/* XFS_IOC_FSBULKSTAT */
-		error = xfs_bulkstat(mp, &inlast, &count,
-			(bulkstat_one_pf)xfs_bulkstat_one, NULL,
-			sizeof(xfs_bstat_t), bulkreq.ubuffer,
-			BULKSTAT_FG_QUICK, &done);
+		error = xfs_bulkstat(mp, &inlast, &count, xfs_bulkstat_one,
+				     sizeof(xfs_bstat_t), bulkreq.ubuffer,
+				     &done);
 
 	if (error)
 		return -error;
@@ -698,14 +697,19 @@
 	xfs_mount_t		*mp,
 	void			__user *arg)
 {
-	xfs_fsop_geom_v1_t	fsgeo;
+	xfs_fsop_geom_t         fsgeo;
 	int			error;
 
-	error = xfs_fs_geometry(mp, (xfs_fsop_geom_t *)&fsgeo, 3);
+	error = xfs_fs_geometry(mp, &fsgeo, 3);
 	if (error)
 		return -error;
 
-	if (copy_to_user(arg, &fsgeo, sizeof(fsgeo)))
+	/*
+	 * Caller should have passed an argument of type
+	 * xfs_fsop_geom_v1_t.  This is a proper subset of the
+	 * xfs_fsop_geom_t that xfs_fs_geometry() fills in.
+	 */
+	if (copy_to_user(arg, &fsgeo, sizeof(xfs_fsop_geom_v1_t)))
 		return -XFS_ERROR(EFAULT);
 	return 0;
 }
@@ -789,6 +793,8 @@
 {
 	struct fsxattr		fa;
 
+	memset(&fa, 0, sizeof(struct fsxattr));
+
 	xfs_ilock(ip, XFS_ILOCK_SHARED);
 	fa.fsx_xflags = xfs_ip2xflags(ip);
 	fa.fsx_extsize = ip->i_d.di_extsize << ip->i_mount->m_sb.sb_blocklog;
--- linux-mvl-dove-2.6.32.orig/fs/xfs/linux-2.6/xfs_acl.c
+++ linux-mvl-dove-2.6.32/fs/xfs/linux-2.6/xfs_acl.c
@@ -250,8 +250,9 @@
 	if (mode != inode->i_mode) {
 		struct iattr iattr;
 
-		iattr.ia_valid = ATTR_MODE;
+		iattr.ia_valid = ATTR_MODE | ATTR_CTIME;
 		iattr.ia_mode = mode;
+		iattr.ia_ctime = current_fs_time(inode->i_sb);
 
 		error = -xfs_setattr(XFS_I(inode), &iattr, XFS_ATTR_NOACL);
 	}
--- linux-mvl-dove-2.6.32.orig/fs/xfs/linux-2.6/xfs_ioctl32.c
+++ linux-mvl-dove-2.6.32/fs/xfs/linux-2.6/xfs_ioctl32.c
@@ -235,15 +235,12 @@
 	xfs_ino_t	ino,		/* inode number to get data for */
 	void		__user *buffer,	/* buffer to place output in */
 	int		ubsize,		/* size of buffer */
-	void		*private_data,	/* my private data */
-	xfs_daddr_t	bno,		/* starting bno of inode cluster */
 	int		*ubused,	/* bytes used by me */
-	void		*dibuff,	/* on-disk inode buffer */
 	int		*stat)		/* BULKSTAT_RV_... */
 {
 	return xfs_bulkstat_one_int(mp, ino, buffer, ubsize,
-				    xfs_bulkstat_one_fmt_compat, bno,
-				    ubused, dibuff, stat);
+				    xfs_bulkstat_one_fmt_compat,
+				    ubused, stat);
 }
 
 /* copied from xfs_ioctl.c */
@@ -296,13 +293,11 @@
 		int res;
 
 		error = xfs_bulkstat_one_compat(mp, inlast, bulkreq.ubuffer,
-				sizeof(compat_xfs_bstat_t),
-				NULL, 0, NULL, NULL, &res);
+				sizeof(compat_xfs_bstat_t), 0, &res);
 	} else if (cmd == XFS_IOC_FSBULKSTAT_32) {
 		error = xfs_bulkstat(mp, &inlast, &count,
-			xfs_bulkstat_one_compat, NULL,
-			sizeof(compat_xfs_bstat_t), bulkreq.ubuffer,
-			BULKSTAT_FG_QUICK, &done);
+			xfs_bulkstat_one_compat, sizeof(compat_xfs_bstat_t),
+			bulkreq.ubuffer, &done);
 	} else
 		error = XFS_ERROR(EINVAL);
 	if (error)
--- linux-mvl-dove-2.6.32.orig/fs/xfs/linux-2.6/xfs_super.c
+++ linux-mvl-dove-2.6.32/fs/xfs/linux-2.6/xfs_super.c
@@ -930,13 +930,37 @@
  */
 STATIC void
 xfs_fs_destroy_inode(
-	struct inode	*inode)
+	struct inode		*inode)
 {
-	xfs_inode_t		*ip = XFS_I(inode);
+	struct xfs_inode	*ip = XFS_I(inode);
+
+	xfs_itrace_entry(ip);
 
 	XFS_STATS_INC(vn_reclaim);
-	if (xfs_reclaim(ip))
-		panic("%s: cannot reclaim 0x%p\n", __func__, inode);
+
+	/* bad inode, get out here ASAP */
+	if (is_bad_inode(inode))
+		goto out_reclaim;
+
+	xfs_ioend_wait(ip);
+
+	ASSERT(XFS_FORCED_SHUTDOWN(ip->i_mount) || ip->i_delayed_blks == 0);
+
+	/*
+	 * We should never get here with one of the reclaim flags already set.
+	 */
+	ASSERT_ALWAYS(!xfs_iflags_test(ip, XFS_IRECLAIMABLE));
+	ASSERT_ALWAYS(!xfs_iflags_test(ip, XFS_IRECLAIM));
+
+	/*
+	 * We always use background reclaim here because even if the
+	 * inode is clean, it still may be under IO and hence we have
+	 * to take the flush lock. The background reclaim path handles
+	 * this more efficiently than we can here, so simply let background
+	 * reclaim tear down all inodes.
+	 */
+out_reclaim:
+	xfs_inode_set_reclaim_tag(ip);
 }
 
 /*
@@ -1140,6 +1164,7 @@
 
 	xfs_unmountfs(mp);
 	xfs_freesb(mp);
+	xfs_inode_shrinker_unregister(mp);
 	xfs_icsb_destroy_counters(mp);
 	xfs_close_devices(mp);
 	xfs_dmops_put(mp);
@@ -1299,6 +1324,8 @@
 
 	/* ro -> rw */
 	if ((mp->m_flags & XFS_MOUNT_RDONLY) && !(*flags & MS_RDONLY)) {
+		__uint64_t resblks;
+
 		mp->m_flags &= ~XFS_MOUNT_RDONLY;
 		if (mp->m_flags & XFS_MOUNT_BARRIER)
 			xfs_mountfs_check_barriers(mp);
@@ -1316,11 +1343,37 @@
 			}
 			mp->m_update_flags = 0;
 		}
+
+		/*
+		 * Fill out the reserve pool if it is empty. Use the stashed
+		 * value if it is non-zero, otherwise go with the default.
+		 */
+		if (mp->m_resblks_save) {
+			resblks = mp->m_resblks_save;
+			mp->m_resblks_save = 0;
+		} else {
+			resblks = mp->m_sb.sb_dblocks;
+			do_div(resblks, 20);
+			resblks = min_t(__uint64_t, resblks, 1024);
+		}
+		xfs_reserve_blocks(mp, &resblks, NULL);
 	}
 
 	/* rw -> ro */
 	if (!(mp->m_flags & XFS_MOUNT_RDONLY) && (*flags & MS_RDONLY)) {
+		/*
+		 * After we have synced the data but before we sync the
+		 * metadata, we need to free up the reserve block pool so that
+		 * the used block count in the superblock on disk is correct at
+		 * the end of the remount. Stash the current reserve pool size
+		 * so that if we get remounted rw, we can return it to the same
+		 * size.
+		 */
+		__uint64_t resblks = 0;
+
 		xfs_quiesce_data(mp);
+		mp->m_resblks_save = mp->m_resblks;
+		xfs_reserve_blocks(mp, &resblks, NULL);
 		xfs_quiesce_attr(mp);
 		mp->m_flags |= XFS_MOUNT_RDONLY;
 	}
@@ -1503,6 +1556,8 @@
 	if (error)
 		goto fail_vnrele;
 
+	xfs_inode_shrinker_register(mp);
+
 	kfree(mtpt);
 
 	xfs_itrace_exit(XFS_I(sb->s_root->d_inode));
@@ -1842,6 +1897,7 @@
 		goto out_cleanup_procfs;
 
 	vfs_initquota();
+	xfs_inode_shrinker_init();
 
 	error = register_filesystem(&xfs_fs_type);
 	if (error)
@@ -1871,6 +1927,7 @@
 {
 	vfs_exitquota();
 	unregister_filesystem(&xfs_fs_type);
+	xfs_inode_shrinker_destroy();
 	xfs_sysctl_unregister();
 	xfs_cleanup_procfs();
 	xfs_buf_terminate();
--- linux-mvl-dove-2.6.32.orig/fs/xfs/linux-2.6/xfs_aops.c
+++ linux-mvl-dove-2.6.32/fs/xfs/linux-2.6/xfs_aops.c
@@ -204,14 +204,17 @@
 }
 
 /*
- * Update on-disk file size now that data has been written to disk.
- * The current in-memory file size is i_size.  If a write is beyond
- * eof i_new_size will be the intended file size until i_size is
- * updated.  If this write does not extend all the way to the valid
- * file size then restrict this update to the end of the write.
+ * Update on-disk file size now that data has been written to disk.  The
+ * current in-memory file size is i_size.  If a write is beyond eof i_new_size
+ * will be the intended file size until i_size is updated.  If this write does
+ * not extend all the way to the valid file size then restrict this update to
+ * the end of the write.
+ *
+ * This function does not block as blocking on the inode lock in IO completion
+ * can lead to IO completion order dependency deadlocks.. If it can't get the
+ * inode ilock it will return EAGAIN. Callers must handle this.
  */
-
-STATIC void
+STATIC int
 xfs_setfilesize(
 	xfs_ioend_t		*ioend)
 {
@@ -222,9 +225,11 @@
 	ASSERT(ioend->io_type != IOMAP_READ);
 
 	if (unlikely(ioend->io_error))
-		return;
+		return 0;
+
+	if (!xfs_ilock_nowait(ip, XFS_ILOCK_EXCL))
+		return EAGAIN;
 
-	xfs_ilock(ip, XFS_ILOCK_EXCL);
 	isize = xfs_ioend_new_eof(ioend);
 	if (isize) {
 		ip->i_d.di_size = isize;
@@ -232,6 +237,28 @@
 	}
 
 	xfs_iunlock(ip, XFS_ILOCK_EXCL);
+	return 0;
+}
+
+/*
+ * Schedule IO completion handling on a xfsdatad if this was
+ * the final hold on this ioend. If we are asked to wait,
+ * flush the workqueue.
+ */
+STATIC void
+xfs_finish_ioend(
+	xfs_ioend_t	*ioend,
+	int		wait)
+{
+	if (atomic_dec_and_test(&ioend->io_remaining)) {
+		struct workqueue_struct *wq;
+
+		wq = (ioend->io_type == IOMAP_UNWRITTEN) ?
+			xfsconvertd_workqueue : xfsdatad_workqueue;
+		queue_work(wq, &ioend->io_work);
+		if (wait)
+			flush_workqueue(wq);
+	}
 }
 
 /*
@@ -243,9 +270,23 @@
 {
 	xfs_ioend_t		*ioend =
 		container_of(work, xfs_ioend_t, io_work);
+	int			error;
 
-	xfs_setfilesize(ioend);
-	xfs_destroy_ioend(ioend);
+	/*
+	 * If we didn't complete processing of the ioend, requeue it to the
+	 * tail of the workqueue for another attempt later. Otherwise destroy
+	 * it.
+	 */
+	error = xfs_setfilesize(ioend);
+	if (error == EAGAIN) {
+		atomic_inc(&ioend->io_remaining);
+		xfs_finish_ioend(ioend, 0);
+		/* ensure we don't spin on blocked ioends */
+		delay(1);
+	} else {
+		ASSERT(!error);
+		xfs_destroy_ioend(ioend);
+	}
 }
 
 /*
@@ -257,9 +298,23 @@
 {
 	xfs_ioend_t		*ioend =
 		container_of(work, xfs_ioend_t, io_work);
+	int			error;
 
-	xfs_setfilesize(ioend);
-	xfs_destroy_ioend(ioend);
+	/*
+	 * If we didn't complete processing of the ioend, requeue it to the
+	 * tail of the workqueue for another attempt later. Otherwise destroy
+	 * it.
+	 */
+	error = xfs_setfilesize(ioend);
+	if (error == EAGAIN) {
+		atomic_inc(&ioend->io_remaining);
+		xfs_finish_ioend(ioend, 0);
+		/* ensure we don't spin on blocked ioends */
+		delay(1);
+	} else {
+		ASSERT(!error);
+		xfs_destroy_ioend(ioend);
+	}
 }
 
 /*
@@ -279,13 +334,25 @@
 	size_t			size = ioend->io_size;
 
 	if (likely(!ioend->io_error)) {
+		int	error;
 		if (!XFS_FORCED_SHUTDOWN(ip->i_mount)) {
-			int error;
 			error = xfs_iomap_write_unwritten(ip, offset, size);
 			if (error)
 				ioend->io_error = error;
 		}
-		xfs_setfilesize(ioend);
+		/*
+		 * If we didn't complete processing of the ioend, requeue it to the
+		 * tail of the workqueue for another attempt later. Otherwise destroy
+		 * it.
+		 */
+		error = xfs_setfilesize(ioend);
+		if (error == EAGAIN) {
+			atomic_inc(&ioend->io_remaining);
+			xfs_finish_ioend(ioend, 0);
+			/* ensure we don't spin on blocked ioends */
+			delay(1);
+			return;
+		}
 	}
 	xfs_destroy_ioend(ioend);
 }
@@ -304,27 +371,6 @@
 }
 
 /*
- * Schedule IO completion handling on a xfsdatad if this was
- * the final hold on this ioend. If we are asked to wait,
- * flush the workqueue.
- */
-STATIC void
-xfs_finish_ioend(
-	xfs_ioend_t	*ioend,
-	int		wait)
-{
-	if (atomic_dec_and_test(&ioend->io_remaining)) {
-		struct workqueue_struct *wq = xfsdatad_workqueue;
-		if (ioend->io_work.func == xfs_end_bio_unwritten)
-			wq = xfsconvertd_workqueue;
-
-		queue_work(wq, &ioend->io_work);
-		if (wait)
-			flush_workqueue(wq);
-	}
-}
-
-/*
  * Allocate and initialise an IO completion structure.
  * We need to track unwritten extent write completion here initially.
  * We'll need to extend this for updating the ondisk inode size later
@@ -904,16 +950,9 @@
 
 	if (startio) {
 		if (count) {
-			struct backing_dev_info *bdi;
-
-			bdi = inode->i_mapping->backing_dev_info;
 			wbc->nr_to_write--;
-			if (bdi_write_congested(bdi)) {
-				wbc->encountered_congestion = 1;
-				done = 1;
-			} else if (wbc->nr_to_write <= 0) {
+			if (wbc->nr_to_write <= 0)
 				done = 1;
-			}
 		}
 		xfs_start_page_writeback(page, !page_dirty, count);
 	}
--- linux-mvl-dove-2.6.32.orig/fs/xfs/linux-2.6/xfs_export.c
+++ linux-mvl-dove-2.6.32/fs/xfs/linux-2.6/xfs_export.c
@@ -127,13 +127,12 @@
 		return ERR_PTR(-ESTALE);
 
 	/*
-	 * The XFS_IGET_BULKSTAT means that an invalid inode number is just
-	 * fine and not an indication of a corrupted filesystem.  Because
-	 * clients can send any kind of invalid file handle, e.g. after
-	 * a restore on the server we have to deal with this case gracefully.
+	 * The XFS_IGET_UNTRUSTED means that an invalid inode number is just
+	 * fine and not an indication of a corrupted filesystem as clients can
+	 * send invalid file handles and we have to handle it gracefully..
 	 */
-	error = xfs_iget(mp, NULL, ino, XFS_IGET_BULKSTAT,
-			 XFS_ILOCK_SHARED, &ip, 0);
+	error = xfs_iget(mp, NULL, ino, XFS_IGET_UNTRUSTED,
+			 XFS_ILOCK_SHARED, &ip);
 	if (error) {
 		/*
 		 * EINVAL means the inode cluster doesn't exist anymore.
--- linux-mvl-dove-2.6.32.orig/fs/xfs/quota/xfs_qm_syscalls.c
+++ linux-mvl-dove-2.6.32/fs/xfs/quota/xfs_qm_syscalls.c
@@ -266,7 +266,7 @@
 	}
 
 	if ((flags & XFS_DQ_USER) && mp->m_sb.sb_uquotino != NULLFSINO) {
-		error = xfs_iget(mp, NULL, mp->m_sb.sb_uquotino, 0, 0, &qip, 0);
+		error = xfs_iget(mp, NULL, mp->m_sb.sb_uquotino, 0, 0, &qip);
 		if (!error) {
 			error = xfs_truncate_file(mp, qip);
 			IRELE(qip);
@@ -275,7 +275,7 @@
 
 	if ((flags & (XFS_DQ_GROUP|XFS_DQ_PROJ)) &&
 	    mp->m_sb.sb_gquotino != NULLFSINO) {
-		error2 = xfs_iget(mp, NULL, mp->m_sb.sb_gquotino, 0, 0, &qip, 0);
+		error2 = xfs_iget(mp, NULL, mp->m_sb.sb_gquotino, 0, 0, &qip);
 		if (!error2) {
 			error2 = xfs_truncate_file(mp, qip);
 			IRELE(qip);
@@ -420,12 +420,12 @@
 	}
 	if (!uip && mp->m_sb.sb_uquotino != NULLFSINO) {
 		if (xfs_iget(mp, NULL, mp->m_sb.sb_uquotino,
-					0, 0, &uip, 0) == 0)
+					0, 0, &uip) == 0)
 			tempuqip = B_TRUE;
 	}
 	if (!gip && mp->m_sb.sb_gquotino != NULLFSINO) {
 		if (xfs_iget(mp, NULL, mp->m_sb.sb_gquotino,
-					0, 0, &gip, 0) == 0)
+					0, 0, &gip) == 0)
 			tempgqip = B_TRUE;
 	}
 	if (uip) {
@@ -893,7 +893,8 @@
 	uint		 flags)
 {
 	ASSERT(mp->m_quotainfo);
-	xfs_inode_ag_iterator(mp, xfs_dqrele_inode, flags, XFS_ICI_NO_TAG);
+	xfs_inode_ag_iterator(mp, xfs_dqrele_inode, flags,
+				XFS_ICI_NO_TAG, 0, NULL);
 }
 
 /*------------------------------------------------------------------------*/
@@ -1113,10 +1114,7 @@
 	xfs_ino_t	ino,		/* inode number to get data for */
 	void		__user *buffer,	/* not used */
 	int		ubsize,		/* not used */
-	void		*private_data,	/* not used */
-	xfs_daddr_t	bno,		/* starting block of inode cluster */
 	int		*ubused,	/* not used */
-	void		*dip,		/* not used */
 	int		*res)		/* bulkstat result code */
 {
 	xfs_inode_t		*ip;
@@ -1138,7 +1136,7 @@
 	ipreleased = B_FALSE;
  again:
 	lock_flags = XFS_ILOCK_SHARED;
-	if ((error = xfs_iget(mp, NULL, ino, 0, lock_flags, &ip, bno))) {
+	if ((error = xfs_iget(mp, NULL, ino, 0, lock_flags, &ip))) {
 		*res = BULKSTAT_RV_NOTHING;
 		return (error);
 	}
@@ -1211,15 +1209,15 @@
 		 * Iterate thru all the inodes in the file system,
 		 * adjusting the corresponding dquot counters
 		 */
-		if ((error = xfs_bulkstat(mp, &lastino, &count,
-				 xfs_qm_internalqcheck_adjust, NULL,
-				 0, NULL, BULKSTAT_FG_IGET, &done))) {
+		error = xfs_bulkstat(mp, &lastino, &count,
+				 xfs_qm_internalqcheck_adjust,
+				 0, NULL, &done);
+		if (error) {
+			cmn_err(CE_DEBUG, "Bulkstat returned error 0x%x", error);
 			break;
 		}
-	} while (! done);
-	if (error) {
-		cmn_err(CE_DEBUG, "Bulkstat returned error 0x%x", error);
-	}
+	} while (!done);
+
 	cmn_err(CE_DEBUG, "Checking results against system dquots");
 	for (i = 0; i < qmtest_hashmask; i++) {
 		h1 = &qmtest_udqtab[i];
--- linux-mvl-dove-2.6.32.orig/fs/xfs/quota/xfs_qm_bhv.c
+++ linux-mvl-dove-2.6.32/fs/xfs/quota/xfs_qm_bhv.c
@@ -59,7 +59,7 @@
 		be64_to_cpu(dp->d_blk_hardlimit);
 	if (limit && statp->f_blocks > limit) {
 		statp->f_blocks = limit;
-		statp->f_bfree =
+		statp->f_bfree = statp->f_bavail =
 			(statp->f_blocks > be64_to_cpu(dp->d_bcount)) ?
 			 (statp->f_blocks - be64_to_cpu(dp->d_bcount)) : 0;
 	}
--- linux-mvl-dove-2.6.32.orig/fs/xfs/quota/xfs_qm.c
+++ linux-mvl-dove-2.6.32/fs/xfs/quota/xfs_qm.c
@@ -1606,10 +1606,7 @@
 	xfs_ino_t	ino,		/* inode number to get data for */
 	void		__user *buffer,	/* not used */
 	int		ubsize,		/* not used */
-	void		*private_data,	/* not used */
-	xfs_daddr_t	bno,		/* starting block of inode cluster */
 	int		*ubused,	/* not used */
-	void		*dip,		/* on-disk inode pointer (not used) */
 	int		*res)		/* result code value */
 {
 	xfs_inode_t	*ip;
@@ -1634,7 +1631,7 @@
 	 * the case in all other instances. It's OK that we do this because
 	 * quotacheck is done only at mount time.
 	 */
-	if ((error = xfs_iget(mp, NULL, ino, 0, XFS_ILOCK_EXCL, &ip, bno))) {
+	if ((error = xfs_iget(mp, NULL, ino, 0, XFS_ILOCK_EXCL, &ip))) {
 		*res = BULKSTAT_RV_NOTHING;
 		return error;
 	}
@@ -1766,12 +1763,13 @@
 		 * Iterate thru all the inodes in the file system,
 		 * adjusting the corresponding dquot counters in core.
 		 */
-		if ((error = xfs_bulkstat(mp, &lastino, &count,
-				     xfs_qm_dqusage_adjust, NULL,
-				     structsz, NULL, BULKSTAT_FG_IGET, &done)))
+		error = xfs_bulkstat(mp, &lastino, &count,
+				     xfs_qm_dqusage_adjust,
+				     structsz, NULL, &done);
+		if (error)
 			break;
 
-	} while (! done);
+	} while (!done);
 
 	/*
 	 * We've made all the changes that we need to make incore.
@@ -1859,14 +1857,14 @@
 		    mp->m_sb.sb_uquotino != NULLFSINO) {
 			ASSERT(mp->m_sb.sb_uquotino > 0);
 			if ((error = xfs_iget(mp, NULL, mp->m_sb.sb_uquotino,
-					     0, 0, &uip, 0)))
+					     0, 0, &uip)))
 				return XFS_ERROR(error);
 		}
 		if (XFS_IS_OQUOTA_ON(mp) &&
 		    mp->m_sb.sb_gquotino != NULLFSINO) {
 			ASSERT(mp->m_sb.sb_gquotino > 0);
 			if ((error = xfs_iget(mp, NULL, mp->m_sb.sb_gquotino,
-					     0, 0, &gip, 0))) {
+					     0, 0, &gip))) {
 				if (uip)
 					IRELE(uip);
 				return XFS_ERROR(error);
--- linux-mvl-dove-2.6.32.orig/fs/ocfs2/symlink.c
+++ linux-mvl-dove-2.6.32/fs/ocfs2/symlink.c
@@ -128,7 +128,7 @@
 	}
 
 	/* Fast symlinks can't be large */
-	len = strlen(target);
+	len = strnlen(target, ocfs2_fast_symlink_chars(inode->i_sb));
 	link = kzalloc(len + 1, GFP_NOFS);
 	if (!link) {
 		status = -ENOMEM;
--- linux-mvl-dove-2.6.32.orig/fs/ocfs2/inode.c
+++ linux-mvl-dove-2.6.32/fs/ocfs2/inode.c
@@ -485,7 +485,11 @@
 						     OCFS2_BH_IGNORE_CACHE);
 	} else {
 		status = ocfs2_read_blocks_sync(osb, args->fi_blkno, 1, &bh);
-		if (!status)
+		/*
+		 * If buffer is in jbd, then its checksum may not have been
+		 * computed as yet.
+		 */
+		if (!status && !buffer_jbd(bh))
 			status = ocfs2_validate_inode_block(osb->sb, bh);
 	}
 	if (status < 0) {
@@ -559,6 +563,7 @@
 		handle = ocfs2_start_trans(osb, OCFS2_INODE_UPDATE_CREDITS);
 		if (IS_ERR(handle)) {
 			status = PTR_ERR(handle);
+			handle = NULL;
 			mlog_errno(status);
 			goto out;
 		}
--- linux-mvl-dove-2.6.32.orig/fs/ocfs2/locks.c
+++ linux-mvl-dove-2.6.32/fs/ocfs2/locks.c
@@ -133,7 +133,7 @@
 
 	if (!(fl->fl_flags & FL_POSIX))
 		return -ENOLCK;
-	if (__mandatory_lock(inode))
+	if (__mandatory_lock(inode) && fl->fl_type != F_UNLCK)
 		return -ENOLCK;
 
 	return ocfs2_plock(osb->cconn, OCFS2_I(inode)->ip_blkno, file, cmd, fl);
--- linux-mvl-dove-2.6.32.orig/fs/ocfs2/suballoc.c
+++ linux-mvl-dove-2.6.32/fs/ocfs2/suballoc.c
@@ -152,7 +152,7 @@
 
 #define do_error(fmt, ...)						\
 	do{								\
-		if (clean_error)					\
+		if (resize)					\
 			mlog(ML_ERROR, fmt "\n", ##__VA_ARGS__);	\
 		else							\
 			ocfs2_error(sb, fmt, ##__VA_ARGS__);		\
@@ -160,7 +160,7 @@
 
 static int ocfs2_validate_gd_self(struct super_block *sb,
 				  struct buffer_head *bh,
-				  int clean_error)
+				  int resize)
 {
 	struct ocfs2_group_desc *gd = (struct ocfs2_group_desc *)bh->b_data;
 
@@ -211,7 +211,7 @@
 static int ocfs2_validate_gd_parent(struct super_block *sb,
 				    struct ocfs2_dinode *di,
 				    struct buffer_head *bh,
-				    int clean_error)
+				    int resize)
 {
 	unsigned int max_bits;
 	struct ocfs2_group_desc *gd = (struct ocfs2_group_desc *)bh->b_data;
@@ -233,8 +233,11 @@
 		return -EINVAL;
 	}
 
-	if (le16_to_cpu(gd->bg_chain) >=
-	    le16_to_cpu(di->id2.i_chain.cl_next_free_rec)) {
+	/* In resize, we may meet the case bg_chain == cl_next_free_rec. */
+	if ((le16_to_cpu(gd->bg_chain) >
+	     le16_to_cpu(di->id2.i_chain.cl_next_free_rec)) ||
+	    ((le16_to_cpu(gd->bg_chain) ==
+	     le16_to_cpu(di->id2.i_chain.cl_next_free_rec)) && !resize)) {
 		do_error("Group descriptor #%llu has bad chain %u",
 			 (unsigned long long)bh->b_blocknr,
 			 le16_to_cpu(gd->bg_chain));
--- linux-mvl-dove-2.6.32.orig/fs/ocfs2/aops.c
+++ linux-mvl-dove-2.6.32/fs/ocfs2/aops.c
@@ -591,8 +591,9 @@
 		goto bail;
 	}
 
-	/* We should already CoW the refcounted extent. */
-	BUG_ON(ext_flags & OCFS2_EXT_REFCOUNTED);
+	/* We should already CoW the refcounted extent in case of create. */
+	BUG_ON(create && (ext_flags & OCFS2_EXT_REFCOUNTED));
+
 	/*
 	 * get_more_blocks() expects us to describe a hole by clearing
 	 * the mapped bit on bh_result().
@@ -1090,6 +1091,12 @@
 	ocfs2_figure_cluster_boundaries(OCFS2_SB(inode->i_sb), cpos,
 					&cluster_start, &cluster_end);
 
+	/* treat the write as new if the a hole/lseek spanned across
+	 * the page boundary.
+	 */
+	new = new | ((i_size_read(inode) <= page_offset(page)) &&
+			(page_offset(page) <= user_pos));
+
 	if (page == wc->w_target_page) {
 		map_from = user_pos & (PAGE_CACHE_SIZE - 1);
 		map_to = map_from + user_len;
--- linux-mvl-dove-2.6.32.orig/fs/ocfs2/stack_user.c
+++ linux-mvl-dove-2.6.32/fs/ocfs2/stack_user.c
@@ -191,7 +191,7 @@
 			return c;
 	}
 
-	return c;
+	return NULL;
 }
 
 /*
--- linux-mvl-dove-2.6.32.orig/fs/ocfs2/acl.c
+++ linux-mvl-dove-2.6.32/fs/ocfs2/acl.c
@@ -30,6 +30,8 @@
 #include "alloc.h"
 #include "dlmglue.h"
 #include "file.h"
+#include "inode.h"
+#include "journal.h"
 #include "ocfs2_fs.h"
 
 #include "xattr.h"
@@ -170,6 +172,60 @@
 }
 
 /*
+ * Helper function to set i_mode in memory and disk. Some call paths
+ * will not have di_bh or a journal handle to pass, in which case it
+ * will create it's own.
+ */
+static int ocfs2_acl_set_mode(struct inode *inode, struct buffer_head *di_bh,
+			      handle_t *handle, umode_t new_mode)
+{
+	int ret, commit_handle = 0;
+	struct ocfs2_dinode *di;
+
+	if (di_bh == NULL) {
+		ret = ocfs2_read_inode_block(inode, &di_bh);
+		if (ret) {
+			mlog_errno(ret);
+			goto out;
+		}
+	} else
+		get_bh(di_bh);
+
+	if (handle == NULL) {
+		handle = ocfs2_start_trans(OCFS2_SB(inode->i_sb),
+					   OCFS2_INODE_UPDATE_CREDITS);
+		if (IS_ERR(handle)) {
+			ret = PTR_ERR(handle);
+			mlog_errno(ret);
+			goto out_brelse;
+		}
+
+		commit_handle = 1;
+	}
+
+	di = (struct ocfs2_dinode *)di_bh->b_data;
+	ret = ocfs2_journal_access_di(handle, INODE_CACHE(inode), di_bh,
+				      OCFS2_JOURNAL_ACCESS_WRITE);
+	if (ret) {
+		mlog_errno(ret);
+		goto out_commit;
+	}
+
+	inode->i_mode = new_mode;
+	di->i_mode = cpu_to_le16(inode->i_mode);
+
+	ocfs2_journal_dirty(handle, di_bh);
+
+out_commit:
+	if (commit_handle)
+		ocfs2_commit_trans(OCFS2_SB(inode->i_sb), handle);
+out_brelse:
+	brelse(di_bh);
+out:
+	return ret;
+}
+
+/*
  * Set the access or default ACL of an inode.
  */
 static int ocfs2_set_acl(handle_t *handle,
@@ -197,9 +253,14 @@
 			if (ret < 0)
 				return ret;
 			else {
-				inode->i_mode = mode;
 				if (ret == 0)
 					acl = NULL;
+
+				ret = ocfs2_acl_set_mode(inode, di_bh,
+							 handle, mode);
+				if (ret)
+					return ret;
+
 			}
 		}
 		break;
@@ -232,12 +293,30 @@
 
 int ocfs2_check_acl(struct inode *inode, int mask)
 {
-	struct posix_acl *acl = ocfs2_get_acl(inode, ACL_TYPE_ACCESS);
+	struct ocfs2_super *osb = OCFS2_SB(inode->i_sb);
+	struct buffer_head *di_bh = NULL;
+	struct posix_acl *acl;
+	int ret = -EAGAIN;
 
-	if (IS_ERR(acl))
+	if (!(osb->s_mount_opt & OCFS2_MOUNT_POSIX_ACL))
+		return ret;
+
+	ret = ocfs2_read_inode_block(inode, &di_bh);
+	if (ret < 0) {
+		mlog_errno(ret);
+		return ret;
+	}
+
+	acl = ocfs2_get_acl_nolock(inode, ACL_TYPE_ACCESS, di_bh);
+
+	brelse(di_bh);
+
+	if (IS_ERR(acl)) {
+		mlog_errno(PTR_ERR(acl));
 		return PTR_ERR(acl);
+	}
 	if (acl) {
-		int ret = posix_acl_permission(inode, acl, mask);
+		ret = posix_acl_permission(inode, acl, mask);
 		posix_acl_release(acl);
 		return ret;
 	}
@@ -286,7 +365,8 @@
 {
 	struct ocfs2_super *osb = OCFS2_SB(inode->i_sb);
 	struct posix_acl *acl = NULL;
-	int ret = 0;
+	int ret = 0, ret2;
+	mode_t mode;
 
 	if (!S_ISLNK(inode->i_mode)) {
 		if (osb->s_mount_opt & OCFS2_MOUNT_POSIX_ACL) {
@@ -295,12 +375,17 @@
 			if (IS_ERR(acl))
 				return PTR_ERR(acl);
 		}
-		if (!acl)
-			inode->i_mode &= ~current_umask();
+		if (!acl) {
+			mode = inode->i_mode & ~current_umask();
+			ret = ocfs2_acl_set_mode(inode, di_bh, handle, mode);
+			if (ret) {
+				mlog_errno(ret);
+				goto cleanup;
+			}
+		}
 	}
 	if ((osb->s_mount_opt & OCFS2_MOUNT_POSIX_ACL) && acl) {
 		struct posix_acl *clone;
-		mode_t mode;
 
 		if (S_ISDIR(inode->i_mode)) {
 			ret = ocfs2_set_acl(handle, inode, di_bh,
@@ -317,7 +402,12 @@
 		mode = inode->i_mode;
 		ret = posix_acl_create_masq(clone, &mode);
 		if (ret >= 0) {
-			inode->i_mode = mode;
+			ret2 = ocfs2_acl_set_mode(inode, di_bh, handle, mode);
+			if (ret2) {
+				mlog_errno(ret2);
+				ret = ret2;
+				goto cleanup;
+			}
 			if (ret > 0) {
 				ret = ocfs2_set_acl(handle, inode,
 						    di_bh, ACL_TYPE_ACCESS,
--- linux-mvl-dove-2.6.32.orig/fs/ocfs2/alloc.c
+++ linux-mvl-dove-2.6.32/fs/ocfs2/alloc.c
@@ -1765,9 +1765,9 @@
  *
  * The array index of the subtree root is passed back.
  */
-static int ocfs2_find_subtree_root(struct ocfs2_extent_tree *et,
-				   struct ocfs2_path *left,
-				   struct ocfs2_path *right)
+int ocfs2_find_subtree_root(struct ocfs2_extent_tree *et,
+			    struct ocfs2_path *left,
+			    struct ocfs2_path *right)
 {
 	int i = 0;
 
@@ -2872,8 +2872,8 @@
  * This looks similar, but is subtly different to
  * ocfs2_find_cpos_for_left_leaf().
  */
-static int ocfs2_find_cpos_for_right_leaf(struct super_block *sb,
-					  struct ocfs2_path *path, u32 *cpos)
+int ocfs2_find_cpos_for_right_leaf(struct super_block *sb,
+				   struct ocfs2_path *path, u32 *cpos)
 {
 	int i, j, ret = 0;
 	u64 blkno;
--- linux-mvl-dove-2.6.32.orig/fs/ocfs2/super.c
+++ linux-mvl-dove-2.6.32/fs/ocfs2/super.c
@@ -701,6 +701,10 @@
 
 		if (!ocfs2_is_hard_readonly(osb))
 			ocfs2_set_journal_params(osb);
+
+		sb->s_flags = (sb->s_flags & ~MS_POSIXACL) |
+			((osb->s_mount_opt & OCFS2_MOUNT_POSIX_ACL) ?
+							MS_POSIXACL : 0);
 	}
 out:
 	unlock_kernel();
--- linux-mvl-dove-2.6.32.orig/fs/ocfs2/refcounttree.c
+++ linux-mvl-dove-2.6.32/fs/ocfs2/refcounttree.c
@@ -969,6 +969,103 @@
 }
 
 /*
+ * Find the end range for a leaf refcount block indicated by
+ * el->l_recs[index].e_blkno.
+ */
+static int ocfs2_get_refcount_cpos_end(struct ocfs2_caching_info *ci,
+				       struct buffer_head *ref_root_bh,
+				       struct ocfs2_extent_block *eb,
+				       struct ocfs2_extent_list *el,
+				       int index,  u32 *cpos_end)
+{
+	int ret, i, subtree_root;
+	u32 cpos;
+	u64 blkno;
+	struct super_block *sb = ocfs2_metadata_cache_get_super(ci);
+	struct ocfs2_path *left_path = NULL, *right_path = NULL;
+	struct ocfs2_extent_tree et;
+	struct ocfs2_extent_list *tmp_el;
+
+	if (index < le16_to_cpu(el->l_next_free_rec) - 1) {
+		/*
+		 * We have a extent rec after index, so just use the e_cpos
+		 * of the next extent rec.
+		 */
+		*cpos_end = le32_to_cpu(el->l_recs[index+1].e_cpos);
+		return 0;
+	}
+
+	if (!eb || (eb && !eb->h_next_leaf_blk)) {
+		/*
+		 * We are the last extent rec, so any high cpos should
+		 * be stored in this leaf refcount block.
+		 */
+		*cpos_end = UINT_MAX;
+		return 0;
+	}
+
+	/*
+	 * If the extent block isn't the last one, we have to find
+	 * the subtree root between this extent block and the next
+	 * leaf extent block and get the corresponding e_cpos from
+	 * the subroot. Otherwise we may corrupt the b-tree.
+	 */
+	ocfs2_init_refcount_extent_tree(&et, ci, ref_root_bh);
+
+	left_path = ocfs2_new_path_from_et(&et);
+	if (!left_path) {
+		ret = -ENOMEM;
+		mlog_errno(ret);
+		goto out;
+	}
+
+	cpos = le32_to_cpu(eb->h_list.l_recs[index].e_cpos);
+	ret = ocfs2_find_path(ci, left_path, cpos);
+	if (ret) {
+		mlog_errno(ret);
+		goto out;
+	}
+
+	right_path = ocfs2_new_path_from_path(left_path);
+	if (!right_path) {
+		ret = -ENOMEM;
+		mlog_errno(ret);
+		goto out;
+	}
+
+	ret = ocfs2_find_cpos_for_right_leaf(sb, left_path, &cpos);
+	if (ret) {
+		mlog_errno(ret);
+		goto out;
+	}
+
+	ret = ocfs2_find_path(ci, right_path, cpos);
+	if (ret) {
+		mlog_errno(ret);
+		goto out;
+	}
+
+	subtree_root = ocfs2_find_subtree_root(&et, left_path,
+					       right_path);
+
+	tmp_el = left_path->p_node[subtree_root].el;
+	blkno = left_path->p_node[subtree_root+1].bh->b_blocknr;
+	for (i = 0; i < le32_to_cpu(tmp_el->l_next_free_rec); i++) {
+		if (le64_to_cpu(tmp_el->l_recs[i].e_blkno) == blkno) {
+			*cpos_end = le32_to_cpu(tmp_el->l_recs[i+1].e_cpos);
+			break;
+		}
+	}
+
+	BUG_ON(i == le32_to_cpu(tmp_el->l_next_free_rec));
+
+out:
+	ocfs2_free_path(left_path);
+	ocfs2_free_path(right_path);
+	return ret;
+}
+
+/*
  * Given a cpos and len, try to find the refcount record which contains cpos.
  * 1. If cpos can be found in one refcount record, return the record.
  * 2. If cpos can't be found, return a fake record which start from cpos
@@ -983,10 +1080,10 @@
 				  struct buffer_head **ret_bh)
 {
 	int ret = 0, i, found;
-	u32 low_cpos;
+	u32 low_cpos, uninitialized_var(cpos_end);
 	struct ocfs2_extent_list *el;
-	struct ocfs2_extent_rec *tmp, *rec = NULL;
-	struct ocfs2_extent_block *eb;
+	struct ocfs2_extent_rec *rec = NULL;
+	struct ocfs2_extent_block *eb = NULL;
 	struct buffer_head *eb_bh = NULL, *ref_leaf_bh = NULL;
 	struct super_block *sb = ocfs2_metadata_cache_get_super(ci);
 	struct ocfs2_refcount_block *rb =
@@ -1034,12 +1131,16 @@
 		}
 	}
 
-	/* adjust len when we have ocfs2_extent_rec after it. */
-	if (found && i < le16_to_cpu(el->l_next_free_rec) - 1) {
-		tmp = &el->l_recs[i+1];
+	if (found) {
+		ret = ocfs2_get_refcount_cpos_end(ci, ref_root_bh,
+						  eb, el, i, &cpos_end);
+		if (ret) {
+			mlog_errno(ret);
+			goto out;
+		}
 
-		if (le32_to_cpu(tmp->e_cpos) < cpos + len)
-			len = le32_to_cpu(tmp->e_cpos) - cpos;
+		if (cpos_end < low_cpos + len)
+			len = cpos_end - low_cpos;
 	}
 
 	ret = ocfs2_read_refcount_block(ci, le64_to_cpu(rec->e_blkno),
@@ -2353,16 +2454,26 @@
 		len = min((u64)cpos + clusters, le64_to_cpu(rec.r_cpos) +
 			  le32_to_cpu(rec.r_clusters)) - cpos;
 		/*
-		 * If the refcount rec already exist, cool. We just need
-		 * to check whether there is a split. Otherwise we just need
-		 * to increase the refcount.
-		 * If we will insert one, increases recs_add.
-		 *
 		 * We record all the records which will be inserted to the
 		 * same refcount block, so that we can tell exactly whether
 		 * we need a new refcount block or not.
+		 *
+		 * If we will insert a new one, this is easy and only happens
+		 * during adding refcounted flag to the extent, so we don't
+		 * have a chance of spliting. We just need one record.
+		 *
+		 * If the refcount rec already exists, that would be a little
+		 * complicated. we may have to:
+		 * 1) split at the beginning if the start pos isn't aligned.
+		 *    we need 1 more record in this case.
+		 * 2) split int the end if the end pos isn't aligned.
+		 *    we need 1 more record in this case.
+		 * 3) split in the middle because of file system fragmentation.
+		 *    we need 2 more records in this case(we can't detect this
+		 *    beforehand, so always think of the worst case).
 		 */
 		if (rec.r_refcount) {
+			recs_add += 2;
 			/* Check whether we need a split at the beginning. */
 			if (cpos == start_cpos &&
 			    cpos != le64_to_cpu(rec.r_cpos))
@@ -3125,7 +3236,7 @@
 					u32 num_clusters, unsigned int e_flags)
 {
 	int ret, delete, index, credits =  0;
-	u32 new_bit, new_len;
+	u32 new_bit, new_len, orig_num_clusters;
 	unsigned int set_len;
 	struct ocfs2_super *osb = OCFS2_SB(sb);
 	handle_t *handle;
@@ -3158,6 +3269,8 @@
 		goto out;
 	}
 
+	orig_num_clusters = num_clusters;
+
 	while (num_clusters) {
 		ret = ocfs2_get_refcount_rec(ref_ci, context->ref_root_bh,
 					     p_cluster, num_clusters,
@@ -3245,7 +3358,8 @@
 	 * in write-back mode.
 	 */
 	if (context->get_clusters == ocfs2_di_get_clusters) {
-		ret = ocfs2_cow_sync_writeback(sb, context, cpos, num_clusters);
+		ret = ocfs2_cow_sync_writeback(sb, context, cpos,
+					       orig_num_clusters);
 		if (ret)
 			mlog_errno(ret);
 	}
@@ -3995,6 +4109,9 @@
 	di->i_attr = s_di->i_attr;
 
 	if (preserve) {
+		t_inode->i_uid = s_inode->i_uid;
+		t_inode->i_gid = s_inode->i_gid;
+		t_inode->i_mode = s_inode->i_mode;
 		di->i_uid = s_di->i_uid;
 		di->i_gid = s_di->i_gid;
 		di->i_mode = s_di->i_mode;
--- linux-mvl-dove-2.6.32.orig/fs/ocfs2/alloc.h
+++ linux-mvl-dove-2.6.32/fs/ocfs2/alloc.h
@@ -317,4 +317,9 @@
 int ocfs2_journal_access_path(struct ocfs2_caching_info *ci,
 			      handle_t *handle,
 			      struct ocfs2_path *path);
+int ocfs2_find_cpos_for_right_leaf(struct super_block *sb,
+				   struct ocfs2_path *path, u32 *cpos);
+int ocfs2_find_subtree_root(struct ocfs2_extent_tree *et,
+			    struct ocfs2_path *left,
+			    struct ocfs2_path *right);
 #endif /* OCFS2_ALLOC_H */
--- linux-mvl-dove-2.6.32.orig/fs/ocfs2/buffer_head_io.c
+++ linux-mvl-dove-2.6.32/fs/ocfs2/buffer_head_io.c
@@ -407,6 +407,7 @@
 				struct buffer_head *bh)
 {
 	int ret = 0;
+	struct ocfs2_dinode *di = (struct ocfs2_dinode *)bh->b_data;
 
 	mlog_entry_void();
 
@@ -426,6 +427,7 @@
 
 	get_bh(bh); /* for end_buffer_write_sync() */
 	bh->b_end_io = end_buffer_write_sync;
+	ocfs2_compute_meta_ecc(osb->sb, bh->b_data, &di->i_check);
 	submit_bh(WRITE, bh);
 
 	wait_on_buffer(bh);
--- linux-mvl-dove-2.6.32.orig/fs/ocfs2/dlm/dlmthread.c
+++ linux-mvl-dove-2.6.32/fs/ocfs2/dlm/dlmthread.c
@@ -93,19 +93,27 @@
  * truly ready to be freed. */
 int __dlm_lockres_unused(struct dlm_lock_resource *res)
 {
-	if (!__dlm_lockres_has_locks(res) &&
-	    (list_empty(&res->dirty) && !(res->state & DLM_LOCK_RES_DIRTY))) {
-		/* try not to scan the bitmap unless the first two
-		 * conditions are already true */
-		int bit = find_next_bit(res->refmap, O2NM_MAX_NODES, 0);
-		if (bit >= O2NM_MAX_NODES) {
-			/* since the bit for dlm->node_num is not
-			 * set, inflight_locks better be zero */
-			BUG_ON(res->inflight_locks != 0);
-			return 1;
-		}
-	}
-	return 0;
+	int bit;
+
+	if (__dlm_lockres_has_locks(res))
+		return 0;
+
+	if (!list_empty(&res->dirty) || res->state & DLM_LOCK_RES_DIRTY)
+		return 0;
+
+	if (res->state & DLM_LOCK_RES_RECOVERING)
+		return 0;
+
+	bit = find_next_bit(res->refmap, O2NM_MAX_NODES, 0);
+	if (bit < O2NM_MAX_NODES)
+		return 0;
+
+	/*
+	 * since the bit for dlm->node_num is not set, inflight_locks better
+	 * be zero
+	 */
+	BUG_ON(res->inflight_locks != 0);
+	return 1;
 }
 
 
@@ -153,45 +161,25 @@
 	spin_unlock(&dlm->spinlock);
 }
 
-static int dlm_purge_lockres(struct dlm_ctxt *dlm,
+static void dlm_purge_lockres(struct dlm_ctxt *dlm,
 			     struct dlm_lock_resource *res)
 {
 	int master;
 	int ret = 0;
 
-	spin_lock(&res->spinlock);
-	if (!__dlm_lockres_unused(res)) {
-		mlog(0, "%s:%.*s: tried to purge but not unused\n",
-		     dlm->name, res->lockname.len, res->lockname.name);
-		__dlm_print_one_lock_resource(res);
-		spin_unlock(&res->spinlock);
-		BUG();
-	}
-
-	if (res->state & DLM_LOCK_RES_MIGRATING) {
-		mlog(0, "%s:%.*s: Delay dropref as this lockres is "
-		     "being remastered\n", dlm->name, res->lockname.len,
-		     res->lockname.name);
-		/* Re-add the lockres to the end of the purge list */
-		if (!list_empty(&res->purge)) {
-			list_del_init(&res->purge);
-			list_add_tail(&res->purge, &dlm->purge_list);
-		}
-		spin_unlock(&res->spinlock);
-		return 0;
-	}
+	assert_spin_locked(&dlm->spinlock);
+	assert_spin_locked(&res->spinlock);
 
 	master = (res->owner == dlm->node_num);
 
-	if (!master)
-		res->state |= DLM_LOCK_RES_DROPPING_REF;
-	spin_unlock(&res->spinlock);
 
 	mlog(0, "purging lockres %.*s, master = %d\n", res->lockname.len,
 	     res->lockname.name, master);
 
 	if (!master) {
+		res->state |= DLM_LOCK_RES_DROPPING_REF;
 		/* drop spinlock...  retake below */
+		spin_unlock(&res->spinlock);
 		spin_unlock(&dlm->spinlock);
 
 		spin_lock(&res->spinlock);
@@ -209,31 +197,35 @@
 		mlog(0, "%s:%.*s: dlm_deref_lockres returned %d\n",
 		     dlm->name, res->lockname.len, res->lockname.name, ret);
 		spin_lock(&dlm->spinlock);
+		spin_lock(&res->spinlock);
 	}
 
-	spin_lock(&res->spinlock);
 	if (!list_empty(&res->purge)) {
 		mlog(0, "removing lockres %.*s:%p from purgelist, "
 		     "master = %d\n", res->lockname.len, res->lockname.name,
 		     res, master);
 		list_del_init(&res->purge);
-		spin_unlock(&res->spinlock);
 		dlm_lockres_put(res);
 		dlm->purge_count--;
-	} else
-		spin_unlock(&res->spinlock);
+	}
+
+	if (!__dlm_lockres_unused(res)) {
+		mlog(ML_ERROR, "found lockres %s:%.*s: in use after deref\n",
+		     dlm->name, res->lockname.len, res->lockname.name);
+		__dlm_print_one_lock_resource(res);
+		BUG();
+	}
 
 	__dlm_unhash_lockres(res);
 
 	/* lockres is not in the hash now.  drop the flag and wake up
 	 * any processes waiting in dlm_get_lock_resource. */
 	if (!master) {
-		spin_lock(&res->spinlock);
 		res->state &= ~DLM_LOCK_RES_DROPPING_REF;
 		spin_unlock(&res->spinlock);
 		wake_up(&res->wq);
-	}
-	return 0;
+	} else
+		spin_unlock(&res->spinlock);
 }
 
 static void dlm_run_purge_list(struct dlm_ctxt *dlm,
@@ -252,17 +244,7 @@
 		lockres = list_entry(dlm->purge_list.next,
 				     struct dlm_lock_resource, purge);
 
-		/* Status of the lockres *might* change so double
-		 * check. If the lockres is unused, holding the dlm
-		 * spinlock will prevent people from getting and more
-		 * refs on it -- there's no need to keep the lockres
-		 * spinlock. */
 		spin_lock(&lockres->spinlock);
-		unused = __dlm_lockres_unused(lockres);
-		spin_unlock(&lockres->spinlock);
-
-		if (!unused)
-			continue;
 
 		purge_jiffies = lockres->last_used +
 			msecs_to_jiffies(DLM_PURGE_INTERVAL_MS);
@@ -274,15 +256,29 @@
 			 * in tail order, we can stop at the first
 			 * unpurgable resource -- anyone added after
 			 * him will have a greater last_used value */
+			spin_unlock(&lockres->spinlock);
 			break;
 		}
 
+		/* Status of the lockres *might* change so double
+		 * check. If the lockres is unused, holding the dlm
+		 * spinlock will prevent people from getting and more
+		 * refs on it. */
+		unused = __dlm_lockres_unused(lockres);
+		if (!unused ||
+		    (lockres->state & DLM_LOCK_RES_MIGRATING)) {
+			mlog(0, "lockres %s:%.*s: is in use or "
+			     "being remastered, used %d, state %d\n",
+			     dlm->name, lockres->lockname.len,
+			     lockres->lockname.name, !unused, lockres->state);
+			list_move_tail(&dlm->purge_list, &lockres->purge);
+			spin_unlock(&lockres->spinlock);
+			continue;
+		}
+
 		dlm_lockres_get(lockres);
 
-		/* This may drop and reacquire the dlm spinlock if it
-		 * has to do migration. */
-		if (dlm_purge_lockres(dlm, lockres))
-			BUG();
+		dlm_purge_lockres(dlm, lockres);
 
 		dlm_lockres_put(lockres);
 
--- linux-mvl-dove-2.6.32.orig/fs/ocfs2/dlm/dlmmaster.c
+++ linux-mvl-dove-2.6.32/fs/ocfs2/dlm/dlmmaster.c
@@ -511,8 +511,6 @@
 
 	atomic_dec(&dlm->res_cur_count);
 
-	dlm_put(dlm);
-
 	if (!hlist_unhashed(&res->hash_node) ||
 	    !list_empty(&res->granted) ||
 	    !list_empty(&res->converting) ||
@@ -585,8 +583,6 @@
 	res->migration_pending = 0;
 	res->inflight_locks = 0;
 
-	/* put in dlm_lockres_release */
-	dlm_grab(dlm);
 	res->dlm = dlm;
 
 	kref_init(&res->refs);
@@ -3046,8 +3042,6 @@
 	/* check for pre-existing lock */
 	spin_lock(&dlm->spinlock);
 	res = __dlm_lookup_lockres(dlm, name, namelen, hash);
-	spin_lock(&dlm->master_lock);
-
 	if (res) {
 		spin_lock(&res->spinlock);
 		if (res->state & DLM_LOCK_RES_RECOVERING) {
@@ -3065,14 +3059,15 @@
 		spin_unlock(&res->spinlock);
 	}
 
+	spin_lock(&dlm->master_lock);
 	/* ignore status.  only nonzero status would BUG. */
 	ret = dlm_add_migration_mle(dlm, res, mle, &oldmle,
 				    name, namelen,
 				    migrate->new_master,
 				    migrate->master);
 
-unlock:
 	spin_unlock(&dlm->master_lock);
+unlock:
 	spin_unlock(&dlm->spinlock);
 
 	if (oldmle) {
--- linux-mvl-dove-2.6.32.orig/fs/ocfs2/dlm/dlmfs.c
+++ linux-mvl-dove-2.6.32/fs/ocfs2/dlm/dlmfs.c
@@ -205,7 +205,7 @@
 	if ((count + *ppos) > i_size_read(inode))
 		readlen = i_size_read(inode) - *ppos;
 	else
-		readlen = count - *ppos;
+		readlen = count;
 
 	lvb_buf = kmalloc(readlen, GFP_NOFS);
 	if (!lvb_buf)
--- linux-mvl-dove-2.6.32.orig/fs/ocfs2/dlm/dlmrecovery.c
+++ linux-mvl-dove-2.6.32/fs/ocfs2/dlm/dlmrecovery.c
@@ -1941,6 +1941,8 @@
 	struct list_head *queue;
 	struct dlm_lock *lock, *next;
 
+	assert_spin_locked(&dlm->spinlock);
+	assert_spin_locked(&res->spinlock);
 	res->state |= DLM_LOCK_RES_RECOVERING;
 	if (!list_empty(&res->recovering)) {
 		mlog(0,
@@ -2265,19 +2267,15 @@
 			/* zero the lvb if necessary */
 			dlm_revalidate_lvb(dlm, res, dead_node);
 			if (res->owner == dead_node) {
-				if (res->state & DLM_LOCK_RES_DROPPING_REF)
-					mlog(0, "%s:%.*s: owned by "
-					     "dead node %u, this node was "
-					     "dropping its ref when it died. "
-					     "continue, dropping the flag.\n",
-					     dlm->name, res->lockname.len,
-					     res->lockname.name, dead_node);
-
-				/* the wake_up for this will happen when the
-				 * RECOVERING flag is dropped later */
-				res->state &= ~DLM_LOCK_RES_DROPPING_REF;
+				if (res->state & DLM_LOCK_RES_DROPPING_REF) {
+					mlog(ML_NOTICE, "Ignore %.*s for "
+					     "recovery as it is being freed\n",
+					     res->lockname.len,
+					     res->lockname.name);
+				} else
+					dlm_move_lockres_to_recovery_list(dlm,
+									  res);
 
-				dlm_move_lockres_to_recovery_list(dlm, res);
 			} else if (res->owner == dlm->node_num) {
 				dlm_free_dead_locks(dlm, res, dead_node);
 				__dlm_lockres_calc_usage(dlm, res);
--- linux-mvl-dove-2.6.32.orig/fs/afs/write.c
+++ linux-mvl-dove-2.6.32/fs/afs/write.c
@@ -709,7 +709,6 @@
 {
 	struct address_space *mapping = vnode->vfs_inode.i_mapping;
 	struct writeback_control wbc = {
-		.bdi		= mapping->backing_dev_info,
 		.sync_mode	= WB_SYNC_ALL,
 		.nr_to_write	= LONG_MAX,
 		.range_cyclic	= 1,
--- linux-mvl-dove-2.6.32.orig/fs/gfs2/xattr.c
+++ linux-mvl-dove-2.6.32/fs/gfs2/xattr.c
@@ -1507,18 +1507,6 @@
 	return gfs2_xattr_set(inode, GFS2_EATYPE_USR, name, value, size, flags);
 }
 
-static int gfs2_xattr_system_get(struct inode *inode, const char *name,
-				 void *buffer, size_t size)
-{
-	return gfs2_xattr_get(inode, GFS2_EATYPE_SYS, name, buffer, size);
-}
-
-static int gfs2_xattr_system_set(struct inode *inode, const char *name,
-				 const void *value, size_t size, int flags)
-{
-	return gfs2_xattr_set(inode, GFS2_EATYPE_SYS, name, value, size, flags);
-}
-
 static int gfs2_xattr_security_get(struct inode *inode, const char *name,
 				   void *buffer, size_t size)
 {
@@ -1543,12 +1531,6 @@
 	.set    = gfs2_xattr_security_set,
 };
 
-static struct xattr_handler gfs2_xattr_system_handler = {
-	.prefix = XATTR_SYSTEM_PREFIX,
-	.get    = gfs2_xattr_system_get,
-	.set    = gfs2_xattr_system_set,
-};
-
 struct xattr_handler *gfs2_xattr_handlers[] = {
 	&gfs2_xattr_user_handler,
 	&gfs2_xattr_security_handler,
--- linux-mvl-dove-2.6.32.orig/fs/gfs2/acl.h
+++ linux-mvl-dove-2.6.32/fs/gfs2/acl.h
@@ -13,26 +13,12 @@
 #include "incore.h"
 
 #define GFS2_POSIX_ACL_ACCESS		"posix_acl_access"
-#define GFS2_POSIX_ACL_ACCESS_LEN	16
 #define GFS2_POSIX_ACL_DEFAULT		"posix_acl_default"
-#define GFS2_POSIX_ACL_DEFAULT_LEN	17
+#define GFS2_ACL_MAX_ENTRIES		25
 
-#define GFS2_ACL_IS_ACCESS(name, len) \
-         ((len) == GFS2_POSIX_ACL_ACCESS_LEN && \
-         !memcmp(GFS2_POSIX_ACL_ACCESS, (name), (len)))
-
-#define GFS2_ACL_IS_DEFAULT(name, len) \
-         ((len) == GFS2_POSIX_ACL_DEFAULT_LEN && \
-         !memcmp(GFS2_POSIX_ACL_DEFAULT, (name), (len)))
-
-struct gfs2_ea_request;
-
-int gfs2_acl_validate_set(struct gfs2_inode *ip, int access,
-			  struct gfs2_ea_request *er,
-			  int *remove, mode_t *mode);
-int gfs2_acl_validate_remove(struct gfs2_inode *ip, int access);
-int gfs2_check_acl(struct inode *inode, int mask);
-int gfs2_acl_create(struct gfs2_inode *dip, struct gfs2_inode *ip);
-int gfs2_acl_chmod(struct gfs2_inode *ip, struct iattr *attr);
+extern int gfs2_check_acl(struct inode *inode, int mask);
+extern int gfs2_acl_create(struct gfs2_inode *dip, struct gfs2_inode *ip);
+extern int gfs2_acl_chmod(struct gfs2_inode *ip, struct iattr *attr);
+extern struct xattr_handler gfs2_xattr_system_handler;
 
 #endif /* __ACL_DOT_H__ */
--- linux-mvl-dove-2.6.32.orig/fs/gfs2/file.c
+++ linux-mvl-dove-2.6.32/fs/gfs2/file.c
@@ -218,6 +218,11 @@
 	if (error)
 		goto out_drop_write;
 
+	error = -EACCES;
+	if (!is_owner_or_cap(inode))
+		goto out;
+
+	error = 0;
 	flags = ip->i_diskflags;
 	new_flags = (flags & ~mask) | (reqflags & mask);
 	if ((new_flags ^ flags) == 0)
@@ -275,8 +280,10 @@
 {
 	struct inode *inode = filp->f_path.dentry->d_inode;
 	u32 fsflags, gfsflags;
+
 	if (get_user(fsflags, ptr))
 		return -EFAULT;
+
 	gfsflags = fsflags_cvt(fsflags_to_gfs2, fsflags);
 	if (!S_ISDIR(inode->i_mode)) {
 		if (gfsflags & GFS2_DIF_INHERIT_JDATA)
@@ -606,7 +613,7 @@
 
 	if (!(fl->fl_flags & FL_POSIX))
 		return -ENOLCK;
-	if (__mandatory_lock(&ip->i_inode))
+	if (__mandatory_lock(&ip->i_inode) && fl->fl_type != F_UNLCK)
 		return -ENOLCK;
 
 	if (cmd == F_CANCELLK) {
--- linux-mvl-dove-2.6.32.orig/fs/gfs2/acl.c
+++ linux-mvl-dove-2.6.32/fs/gfs2/acl.c
@@ -12,6 +12,7 @@
 #include <linux/spinlock.h>
 #include <linux/completion.h>
 #include <linux/buffer_head.h>
+#include <linux/xattr.h>
 #include <linux/posix_acl.h>
 #include <linux/posix_acl_xattr.h>
 #include <linux/gfs2_ondisk.h>
@@ -26,61 +27,6 @@
 #include "trans.h"
 #include "util.h"
 
-#define ACL_ACCESS 1
-#define ACL_DEFAULT 0
-
-int gfs2_acl_validate_set(struct gfs2_inode *ip, int access,
-			  struct gfs2_ea_request *er, int *remove, mode_t *mode)
-{
-	struct posix_acl *acl;
-	int error;
-
-	error = gfs2_acl_validate_remove(ip, access);
-	if (error)
-		return error;
-
-	if (!er->er_data)
-		return -EINVAL;
-
-	acl = posix_acl_from_xattr(er->er_data, er->er_data_len);
-	if (IS_ERR(acl))
-		return PTR_ERR(acl);
-	if (!acl) {
-		*remove = 1;
-		return 0;
-	}
-
-	error = posix_acl_valid(acl);
-	if (error)
-		goto out;
-
-	if (access) {
-		error = posix_acl_equiv_mode(acl, mode);
-		if (!error)
-			*remove = 1;
-		else if (error > 0)
-			error = 0;
-	}
-
-out:
-	posix_acl_release(acl);
-	return error;
-}
-
-int gfs2_acl_validate_remove(struct gfs2_inode *ip, int access)
-{
-	if (!GFS2_SB(&ip->i_inode)->sd_args.ar_posix_acl)
-		return -EOPNOTSUPP;
-	if (!is_owner_or_cap(&ip->i_inode))
-		return -EPERM;
-	if (S_ISLNK(ip->i_inode.i_mode))
-		return -EOPNOTSUPP;
-	if (!access && !S_ISDIR(ip->i_inode.i_mode))
-		return -EACCES;
-
-	return 0;
-}
-
 static int acl_get(struct gfs2_inode *ip, const char *name,
 		   struct posix_acl **acl, struct gfs2_ea_location *el,
 		   char **datap, unsigned int *lenp)
@@ -277,3 +223,117 @@
 	return error;
 }
 
+static int gfs2_acl_type(const char *name)
+{
+	if (strcmp(name, GFS2_POSIX_ACL_ACCESS) == 0)
+		return ACL_TYPE_ACCESS;
+	if (strcmp(name, GFS2_POSIX_ACL_DEFAULT) == 0)
+		return ACL_TYPE_DEFAULT;
+	return -EINVAL;
+}
+
+static int gfs2_xattr_system_get(struct inode *inode, const char *name,
+				 void *buffer, size_t size)
+{
+	int type;
+
+	type = gfs2_acl_type(name);
+	if (type < 0)
+		return type;
+
+	return gfs2_xattr_get(inode, GFS2_EATYPE_SYS, name, buffer, size);
+}
+
+static int gfs2_set_mode(struct inode *inode, mode_t mode)
+{
+	int error = 0;
+
+	if (mode != inode->i_mode) {
+		struct iattr iattr;
+
+		iattr.ia_valid = ATTR_MODE;
+		iattr.ia_mode = mode;
+
+		error = gfs2_setattr_simple(GFS2_I(inode), &iattr);
+	}
+
+	return error;
+}
+
+static int gfs2_xattr_system_set(struct inode *inode, const char *name,
+				 const void *value, size_t size, int flags)
+{
+	struct gfs2_sbd *sdp = GFS2_SB(inode);
+	struct posix_acl *acl = NULL;
+	int error = 0, type;
+
+	if (!sdp->sd_args.ar_posix_acl)
+		return -EOPNOTSUPP;
+
+	type = gfs2_acl_type(name);
+	if (type < 0)
+		return type;
+	if (flags & XATTR_CREATE)
+		return -EINVAL;
+	if (type == ACL_TYPE_DEFAULT && !S_ISDIR(inode->i_mode))
+		return value ? -EACCES : 0;
+	if ((current_fsuid() != inode->i_uid) && !capable(CAP_FOWNER))
+		return -EPERM;
+	if (S_ISLNK(inode->i_mode))
+		return -EOPNOTSUPP;
+
+	if (!value)
+		goto set_acl;
+
+	acl = posix_acl_from_xattr(value, size);
+	if (!acl) {
+		/*
+		 * acl_set_file(3) may request that we set default ACLs with
+		 * zero length -- defend (gracefully) against that here.
+		 */
+		goto out;
+	}
+	if (IS_ERR(acl)) {
+		error = PTR_ERR(acl);
+		goto out;
+	}
+
+	error = posix_acl_valid(acl);
+	if (error)
+		goto out_release;
+
+	error = -EINVAL;
+	if (acl->a_count > GFS2_ACL_MAX_ENTRIES)
+		goto out_release;
+
+	if (type == ACL_TYPE_ACCESS) {
+		mode_t mode = inode->i_mode;
+		error = posix_acl_equiv_mode(acl, &mode);
+
+		if (error <= 0) {
+			posix_acl_release(acl);
+			acl = NULL;
+
+			if (error < 0)
+				return error;
+		}
+
+		error = gfs2_set_mode(inode, mode);
+		if (error)
+			goto out_release;
+	}
+
+set_acl:
+	error = gfs2_xattr_set(inode, GFS2_EATYPE_SYS, name, value, size, 0);
+out_release:
+	posix_acl_release(acl);
+out:
+	return error;
+}
+
+struct xattr_handler gfs2_xattr_system_handler = {
+	.prefix = XATTR_SYSTEM_PREFIX,
+	.get    = gfs2_xattr_system_get,
+	.set    = gfs2_xattr_system_set,
+};
+
--- linux-mvl-dove-2.6.32.orig/fs/gfs2/bmap.c
+++ linux-mvl-dove-2.6.32/fs/gfs2/bmap.c
@@ -541,7 +541,7 @@
 				*ptr++ = cpu_to_be64(bn++);
 			break;
 		}
-	} while (state != ALLOC_DATA);
+	} while ((state != ALLOC_DATA) || !dblock);
 
 	ip->i_height = height;
 	gfs2_add_inode_blocks(&ip->i_inode, alloced);
--- linux-mvl-dove-2.6.32.orig/fs/gfs2/quota.c
+++ linux-mvl-dove-2.6.32/fs/gfs2/quota.c
@@ -15,7 +15,7 @@
  * fuzziness in the current usage value of IDs that are being used on different
  * nodes in the cluster simultaneously.  So, it is possible for a user on
  * multiple nodes to overrun their quota, but that overrun is controlable.
- * Since quota tags are part of transactions, there is no need to a quota check
+ * Since quota tags are part of transactions, there is no need for a quota check
  * program to be run on node crashes or anything like that.
  *
  * There are couple of knobs that let the administrator manage the quota
@@ -65,13 +65,6 @@
 #define QUOTA_USER 1
 #define QUOTA_GROUP 0
 
-struct gfs2_quota_host {
-	u64 qu_limit;
-	u64 qu_warn;
-	s64 qu_value;
-	u32 qu_ll_next;
-};
-
 struct gfs2_quota_change_host {
 	u64 qc_change;
 	u32 qc_flags; /* GFS2_QCF_... */
@@ -617,33 +610,19 @@
 	mutex_unlock(&sdp->sd_quota_mutex);
 }
 
-static void gfs2_quota_in(struct gfs2_quota_host *qu, const void *buf)
-{
-	const struct gfs2_quota *str = buf;
-
-	qu->qu_limit = be64_to_cpu(str->qu_limit);
-	qu->qu_warn = be64_to_cpu(str->qu_warn);
-	qu->qu_value = be64_to_cpu(str->qu_value);
-	qu->qu_ll_next = be32_to_cpu(str->qu_ll_next);
-}
-
-static void gfs2_quota_out(const struct gfs2_quota_host *qu, void *buf)
-{
-	struct gfs2_quota *str = buf;
-
-	str->qu_limit = cpu_to_be64(qu->qu_limit);
-	str->qu_warn = cpu_to_be64(qu->qu_warn);
-	str->qu_value = cpu_to_be64(qu->qu_value);
-	str->qu_ll_next = cpu_to_be32(qu->qu_ll_next);
-	memset(&str->qu_reserved, 0, sizeof(str->qu_reserved));
-}
-
 /**
- * gfs2_adjust_quota
+ * gfs2_adjust_quota - adjust record of current block usage
+ * @ip: The quota inode
+ * @loc: Offset of the entry in the quota file
+ * @change: The amount of change to record
+ * @qd: The quota data
  *
  * This function was mostly borrowed from gfs2_block_truncate_page which was
  * in turn mostly borrowed from ext3
+ *
+ * Returns: 0 or -ve on error
  */
+
 static int gfs2_adjust_quota(struct gfs2_inode *ip, loff_t loc,
 			     s64 change, struct gfs2_quota_data *qd)
 {
@@ -654,15 +633,29 @@
 	unsigned blocksize, iblock, pos;
 	struct buffer_head *bh;
 	struct page *page;
-	void *kaddr;
-	char *ptr;
-	struct gfs2_quota_host qp;
-	s64 value;
-	int err = -EIO;
+	void *kaddr, *ptr;
+	struct gfs2_quota q, *qp;
+	int err, nbytes;
 
 	if (gfs2_is_stuffed(ip))
 		gfs2_unstuff_dinode(ip, NULL);
-	
+
+	memset(&q, 0, sizeof(struct gfs2_quota));
+	err = gfs2_internal_read(ip, NULL, (char *)&q, &loc, sizeof(q));
+	if (err < 0)
+		return err;
+
+	err = -EIO;
+	qp = &q;
+	qp->qu_value = be64_to_cpu(qp->qu_value);
+	qp->qu_value += change;
+	qp->qu_value = cpu_to_be64(qp->qu_value);
+	qd->qd_qb.qb_value = qp->qu_value;
+
+	/* Write the quota into the quota file on disk */
+	ptr = qp;
+	nbytes = sizeof(struct gfs2_quota);
+get_a_page:
 	page = grab_cache_page(mapping, index);
 	if (!page)
 		return -ENOMEM;
@@ -684,7 +677,10 @@
 	if (!buffer_mapped(bh)) {
 		gfs2_block_map(inode, iblock, bh, 1);
 		if (!buffer_mapped(bh))
-			goto unlock;
+			goto unlock_out;
+		/* If it's a newly allocated disk block for quota, zero it */
+		if (buffer_new(bh))
+			zero_user(page, pos - blocksize, bh->b_size);
 	}
 
 	if (PageUptodate(page))
@@ -694,25 +690,32 @@
 		ll_rw_block(READ_META, 1, &bh);
 		wait_on_buffer(bh);
 		if (!buffer_uptodate(bh))
-			goto unlock;
+			goto unlock_out;
 	}
 
 	gfs2_trans_add_bh(ip->i_gl, bh, 0);
 
 	kaddr = kmap_atomic(page, KM_USER0);
-	ptr = kaddr + offset;
-	gfs2_quota_in(&qp, ptr);
-	qp.qu_value += change;
-	value = qp.qu_value;
-	gfs2_quota_out(&qp, ptr);
+	if (offset + sizeof(struct gfs2_quota) > PAGE_CACHE_SIZE)
+		nbytes = PAGE_CACHE_SIZE - offset;
+	memcpy(kaddr + offset, ptr, nbytes);
 	flush_dcache_page(page);
 	kunmap_atomic(kaddr, KM_USER0);
+	unlock_page(page);
+	page_cache_release(page);
+
+	/* If quota straddles page boundary, we need to update the rest of the
+	 * quota at the beginning of the next page */
+	if ((offset + sizeof(struct gfs2_quota)) > PAGE_CACHE_SIZE) {
+		ptr = ptr + nbytes;
+		nbytes = sizeof(struct gfs2_quota) - nbytes;
+		offset = 0;
+		index++;
+		goto get_a_page;
+	}
 	err = 0;
-	qd->qd_qb.qb_magic = cpu_to_be32(GFS2_MAGIC);
-	qd->qd_qb.qb_value = cpu_to_be64(value);
-	((struct gfs2_quota_lvb*)(qd->qd_gl->gl_lvb))->qb_magic = cpu_to_be32(GFS2_MAGIC);
-	((struct gfs2_quota_lvb*)(qd->qd_gl->gl_lvb))->qb_value = cpu_to_be64(value);
-unlock:
+	return err;
+unlock_out:
 	unlock_page(page);
 	page_cache_release(page);
 	return err;
@@ -740,8 +743,7 @@
 
 	sort(qda, num_qd, sizeof(struct gfs2_quota_data *), sort_qd, NULL);
 	for (qx = 0; qx < num_qd; qx++) {
-		error = gfs2_glock_nq_init(qda[qx]->qd_gl,
-					   LM_ST_EXCLUSIVE,
+		error = gfs2_glock_nq_init(qda[qx]->qd_gl, LM_ST_EXCLUSIVE,
 					   GL_NOCACHE, &ghs[qx]);
 		if (error)
 			goto out;
@@ -776,8 +778,10 @@
 	 * rgrp since it won't be allocated during the transaction
 	 */
 	al->al_requested = 1;
-	/* +1 in the end for block requested above for unstuffing */
-	blocks = num_qd * data_blocks + RES_DINODE + num_qd + 1;
+	/* +3 in the end for unstuffing block, inode size update block
+	 * and another block in case quota straddles page boundary and
+	 * two blocks need to be updated instead of 1 */
+	blocks = num_qd * data_blocks + RES_DINODE + num_qd + 3;
 
 	if (nalloc)
 		al->al_requested += nalloc * (data_blocks + ind_blocks);		
@@ -796,8 +800,7 @@
 		qd = qda[x];
 		offset = qd2offset(qd);
 		error = gfs2_adjust_quota(ip, offset, qd->qd_change_sync,
-					  (struct gfs2_quota_data *)
-					  qd);
+					  (struct gfs2_quota_data *)qd);
 		if (error)
 			goto out_end_trans;
 
@@ -828,8 +831,7 @@
 	struct gfs2_sbd *sdp = qd->qd_gl->gl_sbd;
 	struct gfs2_inode *ip = GFS2_I(sdp->sd_quota_inode);
 	struct gfs2_holder i_gh;
-	struct gfs2_quota_host q;
-	char buf[sizeof(struct gfs2_quota)];
+	struct gfs2_quota q;
 	int error;
 	struct gfs2_quota_lvb *qlvb;
 
@@ -853,22 +855,23 @@
 		if (error)
 			goto fail;
 
-		memset(buf, 0, sizeof(struct gfs2_quota));
+		memset(&q, 0, sizeof(struct gfs2_quota));
 		pos = qd2offset(qd);
-		error = gfs2_internal_read(ip, NULL, buf, &pos,
-					   sizeof(struct gfs2_quota));
+		error = gfs2_internal_read(ip, NULL, (char *)&q, &pos, sizeof(q));
 		if (error < 0)
 			goto fail_gunlock;
-
+		if ((error < sizeof(q)) && force_refresh) {
+			error = -ENOENT;
+			goto fail_gunlock;
+		}
 		gfs2_glock_dq_uninit(&i_gh);
 
-		gfs2_quota_in(&q, buf);
 		qlvb = (struct gfs2_quota_lvb *)qd->qd_gl->gl_lvb;
 		qlvb->qb_magic = cpu_to_be32(GFS2_MAGIC);
 		qlvb->__pad = 0;
-		qlvb->qb_limit = cpu_to_be64(q.qu_limit);
-		qlvb->qb_warn = cpu_to_be64(q.qu_warn);
-		qlvb->qb_value = cpu_to_be64(q.qu_value);
+		qlvb->qb_limit = q.qu_limit;
+		qlvb->qb_warn = q.qu_warn;
+		qlvb->qb_value = q.qu_value;
 		qd->qd_qb = *qlvb;
 
 		if (gfs2_glock_is_blocking(qd->qd_gl)) {
@@ -1127,7 +1130,6 @@
 		gfs2_glock_dq_uninit(&q_gh);
 
 	qd_put(qd);
-
 	return error;
 }
 
--- linux-mvl-dove-2.6.32.orig/fs/gfs2/dir.c
+++ linux-mvl-dove-2.6.32/fs/gfs2/dir.c
@@ -392,7 +392,7 @@
 	unsigned totlen = be16_to_cpu(dent->de_rec_len);
 
 	if (gfs2_dirent_sentinel(dent))
-		actual = GFS2_DIRENT_SIZE(0);
+		actual = 0;
 	if (totlen - actual >= required)
 		return 1;
 	return 0;
--- linux-mvl-dove-2.6.32.orig/fs/quota/dquot.c
+++ linux-mvl-dove-2.6.32/fs/quota/dquot.c
@@ -229,6 +229,8 @@
 struct dqstats dqstats;
 EXPORT_SYMBOL(dqstats);
 
+static qsize_t inode_get_rsv_space(struct inode *inode);
+
 static inline unsigned int
 hashfn(const struct super_block *sb, unsigned int id, int type)
 {
@@ -386,7 +388,7 @@
  */
 int dquot_commit(struct dquot *dquot)
 {
-	int ret = 0, ret2 = 0;
+	int ret = 0;
 	struct quota_info *dqopt = sb_dqopt(dquot->dq_sb);
 
 	mutex_lock(&dqopt->dqio_mutex);
@@ -398,15 +400,10 @@
 	spin_unlock(&dq_list_lock);
 	/* Inactive dquot can be only if there was error during read/init
 	 * => we have better not writing it */
-	if (test_bit(DQ_ACTIVE_B, &dquot->dq_flags)) {
+	if (test_bit(DQ_ACTIVE_B, &dquot->dq_flags))
 		ret = dqopt->ops[dquot->dq_type]->commit_dqblk(dquot);
-		if (info_dirty(&dqopt->info[dquot->dq_type])) {
-			ret2 = dqopt->ops[dquot->dq_type]->write_file_info(
-						dquot->dq_sb, dquot->dq_type);
-		}
-		if (ret >= 0)
-			ret = ret2;
-	}
+	else
+		ret = -EIO;
 out_sem:
 	mutex_unlock(&dqopt->dqio_mutex);
 	return ret;
@@ -820,11 +817,14 @@
 static void add_dquot_ref(struct super_block *sb, int type)
 {
 	struct inode *inode, *old_inode = NULL;
+	int reserved = 0;
 
 	spin_lock(&inode_lock);
 	list_for_each_entry(inode, &sb->s_inodes, i_sb_list) {
 		if (inode->i_state & (I_FREEING|I_CLEAR|I_WILL_FREE|I_NEW))
 			continue;
+		if (unlikely(inode_get_rsv_space(inode) > 0))
+			reserved = 1;
 		if (!atomic_read(&inode->i_writecount))
 			continue;
 		if (!dqinit_needed(inode, type))
@@ -845,6 +845,12 @@
 	}
 	spin_unlock(&inode_lock);
 	iput(old_inode);
+
+	if (reserved) {
+		printk(KERN_WARNING "VFS (%s): Writes happened before quota"
+			" was turned on thus quota information is probably "
+			"inconsistent. Please run quotacheck(8).\n", sb->s_id);
+	}
 }
 
 /*
@@ -958,10 +964,12 @@
 /*
  * Claim reserved quota space
  */
-static void dquot_claim_reserved_space(struct dquot *dquot,
-						qsize_t number)
+static void dquot_claim_reserved_space(struct dquot *dquot, qsize_t number)
 {
-	WARN_ON(dquot->dq_dqb.dqb_rsvspace < number);
+	if (dquot->dq_dqb.dqb_rsvspace < number) {
+		WARN_ON_ONCE(1);
+		number = dquot->dq_dqb.dqb_rsvspace;
+	}
 	dquot->dq_dqb.dqb_curspace += number;
 	dquot->dq_dqb.dqb_rsvspace -= number;
 }
@@ -969,7 +977,12 @@
 static inline
 void dquot_free_reserved_space(struct dquot *dquot, qsize_t number)
 {
-	dquot->dq_dqb.dqb_rsvspace -= number;
+	if (dquot->dq_dqb.dqb_rsvspace >= number)
+		dquot->dq_dqb.dqb_rsvspace -= number;
+	else {
+		WARN_ON_ONCE(1);
+		dquot->dq_dqb.dqb_rsvspace = 0;
+	}
 }
 
 static void dquot_decr_inodes(struct dquot *dquot, qsize_t number)
@@ -1287,6 +1300,7 @@
 		return QUOTA_NL_BHARDBELOW;
 	return QUOTA_NL_NOWARN;
 }
+
 /*
  *	Initialize quota pointers in inode
  *	We do things in a bit complicated way but by that we avoid calling
@@ -1298,6 +1312,7 @@
 	int cnt, ret = 0;
 	struct dquot *got[MAXQUOTAS] = { NULL, NULL };
 	struct super_block *sb = inode->i_sb;
+	qsize_t rsv;
 
 	/* First test before acquiring mutex - solves deadlocks when we
          * re-enter the quota code and are already holding the mutex */
@@ -1332,6 +1347,13 @@
 		if (!inode->i_dquot[cnt]) {
 			inode->i_dquot[cnt] = got[cnt];
 			got[cnt] = NULL;
+			/*
+			 * Make quota reservation system happy if someone
+			 * did a write before quota was turned on
+			 */
+			rsv = inode_get_rsv_space(inode);
+			if (unlikely(rsv))
+				dquot_resv_space(inode->i_dquot[cnt], rsv);
 		}
 	}
 out_err:
@@ -1388,6 +1410,72 @@
 EXPORT_SYMBOL(vfs_dq_drop);
 
 /*
+ * inode_reserved_space is managed internally by quota, and protected by
+ * i_lock similar to i_blocks+i_bytes.
+ */
+static qsize_t *inode_reserved_space(struct inode * inode)
+{
+	/* Filesystem must explicitly define it's own method in order to use
+	 * quota reservation interface */
+	BUG_ON(!inode->i_sb->dq_op->get_reserved_space);
+	return inode->i_sb->dq_op->get_reserved_space(inode);
+}
+
+void inode_add_rsv_space(struct inode *inode, qsize_t number)
+{
+	spin_lock(&inode->i_lock);
+	*inode_reserved_space(inode) += number;
+	spin_unlock(&inode->i_lock);
+}
+EXPORT_SYMBOL(inode_add_rsv_space);
+
+void inode_claim_rsv_space(struct inode *inode, qsize_t number)
+{
+	spin_lock(&inode->i_lock);
+	*inode_reserved_space(inode) -= number;
+	__inode_add_bytes(inode, number);
+	spin_unlock(&inode->i_lock);
+}
+EXPORT_SYMBOL(inode_claim_rsv_space);
+
+void inode_sub_rsv_space(struct inode *inode, qsize_t number)
+{
+	spin_lock(&inode->i_lock);
+	*inode_reserved_space(inode) -= number;
+	spin_unlock(&inode->i_lock);
+}
+EXPORT_SYMBOL(inode_sub_rsv_space);
+
+static qsize_t inode_get_rsv_space(struct inode *inode)
+{
+	qsize_t ret;
+
+	if (!inode->i_sb->dq_op->get_reserved_space)
+		return 0;
+	spin_lock(&inode->i_lock);
+	ret = *inode_reserved_space(inode);
+	spin_unlock(&inode->i_lock);
+	return ret;
+}
+
+static void inode_incr_space(struct inode *inode, qsize_t number,
+				int reserve)
+{
+	if (reserve)
+		inode_add_rsv_space(inode, number);
+	else
+		inode_add_bytes(inode, number);
+}
+
+static void inode_decr_space(struct inode *inode, qsize_t number, int reserve)
+{
+	if (reserve)
+		inode_sub_rsv_space(inode, number);
+	else
+		inode_sub_bytes(inode, number);
+}
+
+/*
  * Following four functions update i_blocks+i_bytes fields and
  * quota information (together with appropriate checks)
  * NOTE: We absolutely rely on the fact that caller dirties
@@ -1405,6 +1493,21 @@
 	int cnt, ret = QUOTA_OK;
 	char warntype[MAXQUOTAS];
 
+	/*
+	 * First test before acquiring mutex - solves deadlocks when we
+	 * re-enter the quota code and are already holding the mutex
+	 */
+	if (IS_NOQUOTA(inode)) {
+		inode_incr_space(inode, number, reserve);
+		goto out;
+	}
+
+	down_read(&sb_dqopt(inode->i_sb)->dqptr_sem);
+	if (IS_NOQUOTA(inode)) {
+		inode_incr_space(inode, number, reserve);
+		goto out_unlock;
+	}
+
 	for (cnt = 0; cnt < MAXQUOTAS; cnt++)
 		warntype[cnt] = QUOTA_NL_NOWARN;
 
@@ -1415,7 +1518,8 @@
 		if (check_bdq(inode->i_dquot[cnt], number, warn, warntype+cnt)
 		    == NO_QUOTA) {
 			ret = NO_QUOTA;
-			goto out_unlock;
+			spin_unlock(&dq_data_lock);
+			goto out_flush_warn;
 		}
 	}
 	for (cnt = 0; cnt < MAXQUOTAS; cnt++) {
@@ -1426,64 +1530,32 @@
 		else
 			dquot_incr_space(inode->i_dquot[cnt], number);
 	}
-	if (!reserve)
-		inode_add_bytes(inode, number);
-out_unlock:
+	inode_incr_space(inode, number, reserve);
 	spin_unlock(&dq_data_lock);
-	flush_warnings(inode->i_dquot, warntype);
-	return ret;
-}
-
-int dquot_alloc_space(struct inode *inode, qsize_t number, int warn)
-{
-	int cnt, ret = QUOTA_OK;
-
-	/*
-	 * First test before acquiring mutex - solves deadlocks when we
-	 * re-enter the quota code and are already holding the mutex
-	 */
-	if (IS_NOQUOTA(inode)) {
-		inode_add_bytes(inode, number);
-		goto out;
-	}
-
-	down_read(&sb_dqopt(inode->i_sb)->dqptr_sem);
-	if (IS_NOQUOTA(inode)) {
-		inode_add_bytes(inode, number);
-		goto out_unlock;
-	}
-
-	ret = __dquot_alloc_space(inode, number, warn, 0);
-	if (ret == NO_QUOTA)
-		goto out_unlock;
 
+	if (reserve)
+		goto out_flush_warn;
 	/* Dirtify all the dquots - this can block when journalling */
 	for (cnt = 0; cnt < MAXQUOTAS; cnt++)
 		if (inode->i_dquot[cnt])
 			mark_dquot_dirty(inode->i_dquot[cnt]);
+out_flush_warn:
+	flush_warnings(inode->i_dquot, warntype);
 out_unlock:
 	up_read(&sb_dqopt(inode->i_sb)->dqptr_sem);
 out:
 	return ret;
 }
+
+int dquot_alloc_space(struct inode *inode, qsize_t number, int warn)
+{
+	return __dquot_alloc_space(inode, number, warn, 0);
+}
 EXPORT_SYMBOL(dquot_alloc_space);
 
 int dquot_reserve_space(struct inode *inode, qsize_t number, int warn)
 {
-	int ret = QUOTA_OK;
-
-	if (IS_NOQUOTA(inode))
-		goto out;
-
-	down_read(&sb_dqopt(inode->i_sb)->dqptr_sem);
-	if (IS_NOQUOTA(inode))
-		goto out_unlock;
-
-	ret = __dquot_alloc_space(inode, number, warn, 1);
-out_unlock:
-	up_read(&sb_dqopt(inode->i_sb)->dqptr_sem);
-out:
-	return ret;
+	return __dquot_alloc_space(inode, number, warn, 1);
 }
 EXPORT_SYMBOL(dquot_reserve_space);
 
@@ -1540,14 +1612,14 @@
 	int ret = QUOTA_OK;
 
 	if (IS_NOQUOTA(inode)) {
-		inode_add_bytes(inode, number);
+		inode_claim_rsv_space(inode, number);
 		goto out;
 	}
 
 	down_read(&sb_dqopt(inode->i_sb)->dqptr_sem);
 	if (IS_NOQUOTA(inode))	{
 		up_read(&sb_dqopt(inode->i_sb)->dqptr_sem);
-		inode_add_bytes(inode, number);
+		inode_claim_rsv_space(inode, number);
 		goto out;
 	}
 
@@ -1559,7 +1631,7 @@
 							number);
 	}
 	/* Update inode bytes */
-	inode_add_bytes(inode, number);
+	inode_claim_rsv_space(inode, number);
 	spin_unlock(&dq_data_lock);
 	/* Dirtify all the dquots - this can block when journalling */
 	for (cnt = 0; cnt < MAXQUOTAS; cnt++)
@@ -1572,38 +1644,9 @@
 EXPORT_SYMBOL(dquot_claim_space);
 
 /*
- * Release reserved quota space
- */
-void dquot_release_reserved_space(struct inode *inode, qsize_t number)
-{
-	int cnt;
-
-	if (IS_NOQUOTA(inode))
-		goto out;
-
-	down_read(&sb_dqopt(inode->i_sb)->dqptr_sem);
-	if (IS_NOQUOTA(inode))
-		goto out_unlock;
-
-	spin_lock(&dq_data_lock);
-	/* Release reserved dquots */
-	for (cnt = 0; cnt < MAXQUOTAS; cnt++) {
-		if (inode->i_dquot[cnt])
-			dquot_free_reserved_space(inode->i_dquot[cnt], number);
-	}
-	spin_unlock(&dq_data_lock);
-
-out_unlock:
-	up_read(&sb_dqopt(inode->i_sb)->dqptr_sem);
-out:
-	return;
-}
-EXPORT_SYMBOL(dquot_release_reserved_space);
-
-/*
  * This operation can block, but only after everything is updated
  */
-int dquot_free_space(struct inode *inode, qsize_t number)
+int __dquot_free_space(struct inode *inode, qsize_t number, int reserve)
 {
 	unsigned int cnt;
 	char warntype[MAXQUOTAS];
@@ -1612,7 +1655,7 @@
          * re-enter the quota code and are already holding the mutex */
 	if (IS_NOQUOTA(inode)) {
 out_sub:
-		inode_sub_bytes(inode, number);
+		inode_decr_space(inode, number, reserve);
 		return QUOTA_OK;
 	}
 
@@ -1627,21 +1670,43 @@
 		if (!inode->i_dquot[cnt])
 			continue;
 		warntype[cnt] = info_bdq_free(inode->i_dquot[cnt], number);
-		dquot_decr_space(inode->i_dquot[cnt], number);
+		if (reserve)
+			dquot_free_reserved_space(inode->i_dquot[cnt], number);
+		else
+			dquot_decr_space(inode->i_dquot[cnt], number);
 	}
-	inode_sub_bytes(inode, number);
+	inode_decr_space(inode, number, reserve);
 	spin_unlock(&dq_data_lock);
+
+	if (reserve)
+		goto out_unlock;
 	/* Dirtify all the dquots - this can block when journalling */
 	for (cnt = 0; cnt < MAXQUOTAS; cnt++)
 		if (inode->i_dquot[cnt])
 			mark_dquot_dirty(inode->i_dquot[cnt]);
+out_unlock:
 	flush_warnings(inode->i_dquot, warntype);
 	up_read(&sb_dqopt(inode->i_sb)->dqptr_sem);
 	return QUOTA_OK;
 }
+
+int dquot_free_space(struct inode *inode, qsize_t number)
+{
+	return  __dquot_free_space(inode, number, 0);
+}
 EXPORT_SYMBOL(dquot_free_space);
 
 /*
+ * Release reserved quota space
+ */
+void dquot_release_reserved_space(struct inode *inode, qsize_t number)
+{
+	__dquot_free_space(inode, number, 1);
+
+}
+EXPORT_SYMBOL(dquot_release_reserved_space);
+
+/*
  * This operation can block, but only after everything is updated
  */
 int dquot_free_inode(const struct inode *inode, qsize_t number)
@@ -1679,19 +1744,6 @@
 EXPORT_SYMBOL(dquot_free_inode);
 
 /*
- * call back function, get reserved quota space from underlying fs
- */
-qsize_t dquot_get_reserved_space(struct inode *inode)
-{
-	qsize_t reserved_space = 0;
-
-	if (sb_any_quota_active(inode->i_sb) &&
-	    inode->i_sb->dq_op->get_reserved_space)
-		reserved_space = inode->i_sb->dq_op->get_reserved_space(inode);
-	return reserved_space;
-}
-
-/*
  * Transfer the number of inode and blocks from one diskquota to an other.
  *
  * This operation can block, but only after everything is updated
@@ -1734,7 +1786,7 @@
 	}
 	spin_lock(&dq_data_lock);
 	cur_space = inode_get_bytes(inode);
-	rsv_space = dquot_get_reserved_space(inode);
+	rsv_space = inode_get_rsv_space(inode);
 	space = cur_space + rsv_space;
 	/* Build the transfer_from list and check the limits */
 	for (cnt = 0; cnt < MAXQUOTAS; cnt++) {
@@ -2332,34 +2384,34 @@
 	if (di->dqb_valid & QIF_SPACE) {
 		dm->dqb_curspace = di->dqb_curspace - dm->dqb_rsvspace;
 		check_blim = 1;
-		__set_bit(DQ_LASTSET_B + QIF_SPACE_B, &dquot->dq_flags);
+		set_bit(DQ_LASTSET_B + QIF_SPACE_B, &dquot->dq_flags);
 	}
 	if (di->dqb_valid & QIF_BLIMITS) {
 		dm->dqb_bsoftlimit = qbtos(di->dqb_bsoftlimit);
 		dm->dqb_bhardlimit = qbtos(di->dqb_bhardlimit);
 		check_blim = 1;
-		__set_bit(DQ_LASTSET_B + QIF_BLIMITS_B, &dquot->dq_flags);
+		set_bit(DQ_LASTSET_B + QIF_BLIMITS_B, &dquot->dq_flags);
 	}
 	if (di->dqb_valid & QIF_INODES) {
 		dm->dqb_curinodes = di->dqb_curinodes;
 		check_ilim = 1;
-		__set_bit(DQ_LASTSET_B + QIF_INODES_B, &dquot->dq_flags);
+		set_bit(DQ_LASTSET_B + QIF_INODES_B, &dquot->dq_flags);
 	}
 	if (di->dqb_valid & QIF_ILIMITS) {
 		dm->dqb_isoftlimit = di->dqb_isoftlimit;
 		dm->dqb_ihardlimit = di->dqb_ihardlimit;
 		check_ilim = 1;
-		__set_bit(DQ_LASTSET_B + QIF_ILIMITS_B, &dquot->dq_flags);
+		set_bit(DQ_LASTSET_B + QIF_ILIMITS_B, &dquot->dq_flags);
 	}
 	if (di->dqb_valid & QIF_BTIME) {
 		dm->dqb_btime = di->dqb_btime;
 		check_blim = 1;
-		__set_bit(DQ_LASTSET_B + QIF_BTIME_B, &dquot->dq_flags);
+		set_bit(DQ_LASTSET_B + QIF_BTIME_B, &dquot->dq_flags);
 	}
 	if (di->dqb_valid & QIF_ITIME) {
 		dm->dqb_itime = di->dqb_itime;
 		check_ilim = 1;
-		__set_bit(DQ_LASTSET_B + QIF_ITIME_B, &dquot->dq_flags);
+		set_bit(DQ_LASTSET_B + QIF_ITIME_B, &dquot->dq_flags);
 	}
 
 	if (check_blim) {
--- linux-mvl-dove-2.6.32.orig/fs/ext2/namei.c
+++ linux-mvl-dove-2.6.32/fs/ext2/namei.c
@@ -327,7 +327,6 @@
 		new_de = ext2_find_entry (new_dir, &new_dentry->d_name, &new_page);
 		if (!new_de)
 			goto out_dir;
-		inode_inc_link_count(old_inode);
 		ext2_set_link(new_dir, new_de, new_page, old_inode, 1);
 		new_inode->i_ctime = CURRENT_TIME_SEC;
 		if (dir_de)
@@ -339,12 +338,9 @@
 			if (new_dir->i_nlink >= EXT2_LINK_MAX)
 				goto out_dir;
 		}
-		inode_inc_link_count(old_inode);
 		err = ext2_add_link(new_dentry, old_inode);
-		if (err) {
-			inode_dec_link_count(old_inode);
+		if (err)
 			goto out_dir;
-		}
 		if (dir_de)
 			inode_inc_link_count(new_dir);
 	}
@@ -352,12 +348,11 @@
 	/*
 	 * Like most other Unix systems, set the ctime for inodes on a
  	 * rename.
-	 * inode_dec_link_count() will mark the inode dirty.
 	 */
 	old_inode->i_ctime = CURRENT_TIME_SEC;
+	mark_inode_dirty(old_inode);
 
 	ext2_delete_entry (old_de, old_page);
-	inode_dec_link_count(old_inode);
 
 	if (dir_de) {
 		if (old_dir != new_dir)
--- linux-mvl-dove-2.6.32.orig/init/Kconfig
+++ linux-mvl-dove-2.6.32/init/Kconfig
@@ -166,6 +166,15 @@
 
 endchoice
 
+config VERSION_SIGNATURE
+	string "Arbitrary version signature"
+	help
+	  This string will be created in a file, /proc/version_signature. It
+	  is useful in determining arbitrary data about your kernel. For instance,
+	  if you have several kernels of the same version, but need to keep track
+	  of a revision of the same kernel, but not affect it's ability to load
+	  compatible modules, this is the easiest way to do that.
+
 config SWAP
 	bool "Support for paging of anonymous memory (swap)"
 	depends on MMU && BLOCK
@@ -426,57 +435,6 @@
 config HAVE_UNSTABLE_SCHED_CLOCK
 	bool
 
-config GROUP_SCHED
-	bool "Group CPU scheduler"
-	depends on EXPERIMENTAL
-	default n
-	help
-	  This feature lets CPU scheduler recognize task groups and control CPU
-	  bandwidth allocation to such task groups.
-	  In order to create a group from arbitrary set of processes, use
-	  CONFIG_CGROUPS. (See Control Group support.)
-
-config FAIR_GROUP_SCHED
-	bool "Group scheduling for SCHED_OTHER"
-	depends on GROUP_SCHED
-	default GROUP_SCHED
-
-config RT_GROUP_SCHED
-	bool "Group scheduling for SCHED_RR/FIFO"
-	depends on EXPERIMENTAL
-	depends on GROUP_SCHED
-	default n
-	help
-	  This feature lets you explicitly allocate real CPU bandwidth
-	  to users or control groups (depending on the "Basis for grouping tasks"
-	  setting below. If enabled, it will also make it impossible to
-	  schedule realtime tasks for non-root users until you allocate
-	  realtime bandwidth for them.
-	  See Documentation/scheduler/sched-rt-group.txt for more information.
-
-choice
-	depends on GROUP_SCHED
-	prompt "Basis for grouping tasks"
-	default USER_SCHED
-
-config USER_SCHED
-	bool "user id"
-	help
-	  This option will choose userid as the basis for grouping
-	  tasks, thus providing equal CPU bandwidth to each user.
-
-config CGROUP_SCHED
-	bool "Control groups"
- 	depends on CGROUPS
- 	help
-	  This option allows you to create arbitrary task groups
-	  using the "cgroup" pseudo filesystem and control
-	  the cpu bandwidth allocated to each such task group.
-	  Refer to Documentation/cgroups/cgroups.txt for more
-	  information on "cgroup" pseudo filesystem.
-
-endchoice
-
 menuconfig CGROUPS
 	boolean "Control Group support"
 	help
@@ -597,6 +555,35 @@
 	  Now, memory usage of swap_cgroup is 2 bytes per entry. If swap page
 	  size is 4096bytes, 512k per 1Gbytes of swap.
 
+menuconfig CGROUP_SCHED
+	bool "Group CPU scheduler"
+	depends on EXPERIMENTAL && CGROUPS
+	default n
+	help
+	  This feature lets CPU scheduler recognize task groups and control CPU
+	  bandwidth allocation to such task groups. It uses cgroups to group
+	  tasks.
+
+if CGROUP_SCHED
+config FAIR_GROUP_SCHED
+	bool "Group scheduling for SCHED_OTHER"
+	depends on CGROUP_SCHED
+	default CGROUP_SCHED
+
+config RT_GROUP_SCHED
+	bool "Group scheduling for SCHED_RR/FIFO"
+	depends on EXPERIMENTAL
+	depends on CGROUP_SCHED
+	default n
+	help
+	  This feature lets you explicitly allocate real CPU bandwidth
+	  to task groups. If enabled, it will also make it impossible to
+	  schedule realtime tasks for non-root users until you allocate
+	  realtime bandwidth for them.
+	  See Documentation/scheduler/sched-rt-group.txt for more information.
+
+endif #CGROUP_SCHED
+
 endif # CGROUPS
 
 config MM_OWNER
@@ -737,6 +724,12 @@
 config ANON_INODES
 	bool
 
+config PANIC_TIMEOUT
+	int "Default panic timeout"
+	default 0
+	help
+	  Set default panic timeout.
+
 menuconfig EMBEDDED
 	bool "Configure standard kernel features (for small systems)"
 	help
@@ -996,6 +989,15 @@
 
 endmenu
 
+config ASHMEM
+	bool "Enable the Anonymous Shared Memory Subsystem"
+	default n
+	depends on SHMEM || TINY_SHMEM
+	help
+	  The ashmem subsystem is a new shared memory allocator, similar to
+	  POSIX SHM but with different behavior and sporting a simpler
+	  file-based API.
+
 config VM_EVENT_COUNTERS
 	default y
 	bool "Enable VM event counters for /proc/vmstat" if EMBEDDED
@@ -1050,6 +1052,7 @@
 	  per cpu and per node queues.
 
 config SLUB
+	depends on BROKEN || NUMA || !DISCONTIGMEM
 	bool "SLUB (Unqueued Allocator)"
 	help
 	   SLUB is a slab allocator that minimizes cache line usage
--- linux-mvl-dove-2.6.32.orig/init/initramfs.c
+++ linux-mvl-dove-2.6.32/init/initramfs.c
@@ -8,6 +8,7 @@
 #include <linux/dirent.h>
 #include <linux/syscalls.h>
 #include <linux/utime.h>
+#include <linux/async.h>
 
 static __initdata char *message;
 static void __init error(char *x)
@@ -455,7 +456,8 @@
 					 compress_name);
 				message = msg_buf;
 			}
-		}
+		} else
+			error("junk in compressed archive");
 		if (state != Reset)
 			error("junk in compressed archive");
 		this_header = saved_offset + my_inptr;
@@ -565,7 +567,9 @@
 }
 #endif
 
-static int __init populate_rootfs(void)
+LIST_HEAD(populate_rootfs_domain);
+
+static void __init async_populate_rootfs(void)
 {
 	char *err = unpack_to_rootfs(__initramfs_start,
 			 __initramfs_end - __initramfs_start);
@@ -579,7 +583,7 @@
 			initrd_end - initrd_start);
 		if (!err) {
 			free_initrd();
-			return 0;
+			return;
 		} else {
 			clean_rootfs();
 			unpack_to_rootfs(__initramfs_start,
@@ -603,6 +607,25 @@
 		free_initrd();
 #endif
 	}
-	return 0;
+	return;
+}
+
+static int __initdata rootfs_populated;
+
+static int __init populate_rootfs_early(void)
+{
+	if (num_online_cpus() > 1) {
+		rootfs_populated = 1;
+		async_schedule_domain(async_populate_rootfs, NULL,
+						&populate_rootfs_domain);
+	}
 }
+static int __init populate_rootfs(void)
+{
+	if (!rootfs_populated)
+		async_schedule_domain(async_populate_rootfs, NULL,
+						&populate_rootfs_domain);
+}
+
+earlyrootfs_initcall(populate_rootfs_early);
 rootfs_initcall(populate_rootfs);
--- linux-mvl-dove-2.6.32.orig/init/main.c
+++ linux-mvl-dove-2.6.32/init/main.c
@@ -234,7 +234,7 @@
 
 static int __init quiet_kernel(char *str)
 {
-	console_loglevel = 4;
+	console_loglevel = 2;
 	return 0;
 }
 
@@ -369,12 +369,6 @@
 {
 	unsigned int cpu;
 
-	/*
-	 * Set up the current CPU as possible to migrate to.
-	 * The other ones will be done by cpu_up/cpu_down()
-	 */
-	set_cpu_active(smp_processor_id(), true);
-
 	/* FIXME: This should be done in userspace --RR */
 	for_each_present_cpu(cpu) {
 		if (num_online_cpus() >= setup_max_cpus)
@@ -413,16 +407,24 @@
  * gcc-3.4 accidentally inlines this function, so use noinline.
  */
 
+static __initdata DECLARE_COMPLETION(kthreadd_done);
+
 static noinline void __init_refok rest_init(void)
 	__releases(kernel_lock)
 {
 	int pid;
 
 	rcu_scheduler_starting();
+	/*
+	 * We need to spawn init first so that it obtains pid-1, however
+	 * the init task will end up wanting to create kthreads, which, if
+	 * we schedule it before we create kthreadd, will OOPS.
+	 */
 	kernel_thread(kernel_init, NULL, CLONE_FS | CLONE_SIGHAND);
 	numa_default_policy();
 	pid = kernel_thread(kthreadd, NULL, CLONE_FS | CLONE_FILES);
 	kthreadd_task = find_task_by_pid_ns(pid, &init_pid_ns);
+	complete(&kthreadd_done);
 	unlock_kernel();
 
 	/*
@@ -486,6 +488,7 @@
 	int cpu = smp_processor_id();
 	/* Mark the boot cpu "present", "online" etc for SMP and UP case */
 	set_cpu_online(cpu, true);
+	set_cpu_active(cpu, true);
 	set_cpu_present(cpu, true);
 	set_cpu_possible(cpu, true);
 }
@@ -846,12 +849,16 @@
 
 static int __init kernel_init(void * unused)
 {
+	/*
+	 * Wait until kthreadd is all set-up.
+	 */
+	wait_for_completion(&kthreadd_done);
 	lock_kernel();
 
 	/*
 	 * init can allocate pages on any node
 	 */
-	set_mems_allowed(node_possible_map);
+	set_mems_allowed(node_states[N_HIGH_MEMORY]);
 	/*
 	 * init can run on any cpu.
 	 */
@@ -879,6 +886,12 @@
 	do_basic_setup();
 
 	/*
+	 * We need to ensure that the filesystem is ready by this point, wait for
+	 * async_populate_rootfs to complete.
+	 */
+	async_synchronize_full_domain(&populate_rootfs_domain);
+
+	/*
 	 * check if there is an early userspace init.  If yes, let it do all
 	 * the work
 	 */
--- linux-mvl-dove-2.6.32.orig/init/version.c
+++ linux-mvl-dove-2.6.32/init/version.c
@@ -39,7 +39,11 @@
 /* FIXED STRINGS! Don't touch! */
 const char linux_banner[] =
 	"Linux version " UTS_RELEASE " (" LINUX_COMPILE_BY "@"
-	LINUX_COMPILE_HOST ") (" LINUX_COMPILER ") " UTS_VERSION "\n";
+	LINUX_COMPILE_HOST ") (" LINUX_COMPILER ") " UTS_VERSION
+#ifdef CONFIG_VERSION_SIGNATURE
+        " (" CONFIG_VERSION_SIGNATURE ")"
+#endif
+	"\n";
 
 const char linux_proc_banner[] =
 	"%s version %s"
--- linux-mvl-dove-2.6.32.orig/init/calibrate.c
+++ linux-mvl-dove-2.6.32/init/calibrate.c
@@ -66,7 +66,7 @@
 		pre_start = 0;
 		read_current_timer(&start);
 		start_jiffies = jiffies;
-		while (jiffies <= (start_jiffies + 1)) {
+		while (time_before_eq(jiffies, start_jiffies + 1)) {
 			pre_start = start;
 			read_current_timer(&start);
 		}
@@ -74,8 +74,8 @@
 
 		pre_end = 0;
 		end = post_start;
-		while (jiffies <=
-		       (start_jiffies + 1 + DELAY_CALIBRATION_TICKS)) {
+		while (time_before_eq(jiffies, start_jiffies + 1 +
+					       DELAY_CALIBRATION_TICKS)) {
 			pre_end = end;
 			read_current_timer(&end);
 		}
@@ -123,23 +123,26 @@
 {
 	unsigned long ticks, loopbit;
 	int lps_precision = LPS_PREC;
+	static bool printed;
 
 	if (preset_lpj) {
 		loops_per_jiffy = preset_lpj;
-		printk(KERN_INFO
-			"Calibrating delay loop (skipped) preset value.. ");
-	} else if ((smp_processor_id() == 0) && lpj_fine) {
+		if (!printed)
+			pr_info("Calibrating delay loop (skipped) "
+				"preset value.. ");
+	} else if ((!printed) && lpj_fine) {
 		loops_per_jiffy = lpj_fine;
-		printk(KERN_INFO
-			"Calibrating delay loop (skipped), "
+		pr_info("Calibrating delay loop (skipped), "
 			"value calculated using timer frequency.. ");
 	} else if ((loops_per_jiffy = calibrate_delay_direct()) != 0) {
-		printk(KERN_INFO
-			"Calibrating delay using timer specific routine.. ");
+		if (!printed)
+			pr_info("Calibrating delay using timer "
+				"specific routine.. ");
 	} else {
 		loops_per_jiffy = (1<<12);
 
-		printk(KERN_INFO "Calibrating delay loop... ");
+		if (!printed)
+			pr_info("Calibrating delay loop... ");
 		while ((loops_per_jiffy <<= 1) != 0) {
 			/* wait for "start of" clock tick */
 			ticks = jiffies;
@@ -170,7 +173,10 @@
 				loops_per_jiffy &= ~loopbit;
 		}
 	}
-	printk(KERN_CONT "%lu.%02lu BogoMIPS (lpj=%lu)\n",
+	if (!printed)
+		pr_cont("%lu.%02lu BogoMIPS (lpj=%lu)\n",
 			loops_per_jiffy/(500000/HZ),
 			(loops_per_jiffy/(5000/HZ)) % 100, loops_per_jiffy);
+
+	printed = true;
 }
--- linux-mvl-dove-2.6.32.orig/firmware/Makefile
+++ linux-mvl-dove-2.6.32/firmware/Makefile
@@ -140,7 +140,7 @@
 fw-shipped-all := $(fw-shipped-y) $(fw-shipped-m) $(fw-shipped-)
 
 # Directories which we _might_ need to create, so we have a rule for them.
-firmware-dirs := $(sort $(patsubst %,$(objtree)/$(obj)/%/,$(dir $(fw-external-y) $(fw-shipped-all))))
+firmware-dirs := $(sort $(addprefix $(objtree)/$(obj)/,$(dir $(fw-external-y) $(fw-shipped-all))))
 
 quiet_cmd_mkdir = MKDIR   $(patsubst $(objtree)/%,%,$@)
       cmd_mkdir = mkdir -p $@
--- linux-mvl-dove-2.6.32.orig/net/Kconfig
+++ linux-mvl-dove-2.6.32/net/Kconfig
@@ -79,6 +79,12 @@
 
 endif # if INET
 
+config ANDROID_PARANOID_NETWORK
+	bool "Only allow certain groups to create sockets"
+	default y
+	help
+		none
+
 config NETWORK_SECMARK
 	bool "Security Marking"
 	help
--- linux-mvl-dove-2.6.32.orig/net/compat.c
+++ linux-mvl-dove-2.6.32/net/compat.c
@@ -40,10 +40,12 @@
 		compat_size_t len;
 
 		if (get_user(len, &uiov32->iov_len) ||
-		   get_user(buf, &uiov32->iov_base)) {
-			tot_len = -EFAULT;
-			break;
-		}
+		    get_user(buf, &uiov32->iov_base))
+			return -EFAULT;
+
+		if (len > INT_MAX - tot_len)
+			len = INT_MAX - tot_len;
+
 		tot_len += len;
 		kiov->iov_base = compat_ptr(buf);
 		kiov->iov_len = (__kernel_size_t) len;
--- linux-mvl-dove-2.6.32.orig/net/socket.c
+++ linux-mvl-dove-2.6.32/net/socket.c
@@ -97,6 +97,10 @@
 #include <net/sock.h>
 #include <linux/netfilter.h>
 
+#ifdef CONFIG_UID_STAT
+#include <linux/uid_stat.h>
+#endif
+
 static int sock_no_open(struct inode *irrelevant, struct file *dontcare);
 static ssize_t sock_aio_read(struct kiocb *iocb, const struct iovec *iov,
 			 unsigned long nr_segs, loff_t pos);
@@ -570,7 +574,12 @@
 	if (err)
 		return err;
 
-	return sock->ops->sendmsg(iocb, sock, msg, size);
+	err = sock->ops->sendmsg(iocb, sock, msg, size);
+#ifdef CONFIG_UID_STAT
+	if (err > 0)
+		update_tcp_snd(current_uid(), err);
+#endif
+	return err;
 }
 
 int sock_sendmsg(struct socket *sock, struct msghdr *msg, size_t size)
@@ -684,7 +693,12 @@
 	if (err)
 		return err;
 
-	return sock->ops->recvmsg(iocb, sock, msg, size, flags);
+	err = sock->ops->recvmsg(iocb, sock, msg, size, flags);
+#ifdef CONFIG_UID_STAT
+	if (err > 0)
+		update_tcp_rcv(current_uid(), err);
+#endif
+	return err;
 }
 
 int sock_recvmsg(struct socket *sock, struct msghdr *msg,
@@ -1673,6 +1687,8 @@
 	struct iovec iov;
 	int fput_needed;
 
+	if (len > INT_MAX)
+		len = INT_MAX;
 	sock = sockfd_lookup_light(fd, &err, &fput_needed);
 	if (!sock)
 		goto out;
@@ -1730,6 +1746,8 @@
 	int err, err2;
 	int fput_needed;
 
+	if (size > INT_MAX)
+		size = INT_MAX;
 	sock = sockfd_lookup_light(fd, &err, &fput_needed);
 	if (!sock)
 		goto out;
--- linux-mvl-dove-2.6.32.orig/net/netrom/nr_route.c
+++ linux-mvl-dove-2.6.32/net/netrom/nr_route.c
@@ -842,12 +842,13 @@
 	dptr  = skb_push(skb, 1);
 	*dptr = AX25_P_NETROM;
 
-	ax25s = ax25_send_frame(skb, 256, (ax25_address *)dev->dev_addr, &nr_neigh->callsign, nr_neigh->digipeat, nr_neigh->dev);
-	if (nr_neigh->ax25 && ax25s) {
-		/* We were already holding this ax25_cb */
+	ax25s = nr_neigh->ax25;
+	nr_neigh->ax25 = ax25_send_frame(skb, 256,
+					 (ax25_address *)dev->dev_addr,
+					 &nr_neigh->callsign,
+					 nr_neigh->digipeat, nr_neigh->dev);
+	if (ax25s)
 		ax25_cb_put(ax25s);
-	}
-	nr_neigh->ax25 = ax25s;
 
 	dev_put(dev);
 	ret = (nr_neigh->ax25 != NULL);
--- linux-mvl-dove-2.6.32.orig/net/8021q/vlan_core.c
+++ linux-mvl-dove-2.6.32/net/8021q/vlan_core.c
@@ -74,8 +74,9 @@
 }
 EXPORT_SYMBOL(vlan_dev_vlan_id);
 
-static int vlan_gro_common(struct napi_struct *napi, struct vlan_group *grp,
-			   unsigned int vlan_tci, struct sk_buff *skb)
+static gro_result_t
+vlan_gro_common(struct napi_struct *napi, struct vlan_group *grp,
+		unsigned int vlan_tci, struct sk_buff *skb)
 {
 	struct sk_buff *p;
 
@@ -101,11 +102,12 @@
 	return GRO_DROP;
 }
 
-int vlan_gro_receive(struct napi_struct *napi, struct vlan_group *grp,
-		     unsigned int vlan_tci, struct sk_buff *skb)
+gro_result_t vlan_gro_receive(struct napi_struct *napi, struct vlan_group *grp,
+			      unsigned int vlan_tci, struct sk_buff *skb)
 {
 	if (netpoll_rx_on(skb))
-		return vlan_hwaccel_receive_skb(skb, grp, vlan_tci);
+		return vlan_hwaccel_receive_skb(skb, grp, vlan_tci)
+			? GRO_DROP : GRO_NORMAL;
 
 	skb_gro_reset_offset(skb);
 
@@ -113,17 +115,18 @@
 }
 EXPORT_SYMBOL(vlan_gro_receive);
 
-int vlan_gro_frags(struct napi_struct *napi, struct vlan_group *grp,
-		   unsigned int vlan_tci)
+gro_result_t vlan_gro_frags(struct napi_struct *napi, struct vlan_group *grp,
+			    unsigned int vlan_tci)
 {
 	struct sk_buff *skb = napi_frags_skb(napi);
 
 	if (!skb)
-		return NET_RX_DROP;
+		return GRO_DROP;
 
 	if (netpoll_rx_on(skb)) {
 		skb->protocol = eth_type_trans(skb, skb->dev);
-		return vlan_hwaccel_receive_skb(skb, grp, vlan_tci);
+		return vlan_hwaccel_receive_skb(skb, grp, vlan_tci)
+			? GRO_DROP : GRO_NORMAL;
 	}
 
 	return napi_frags_finish(napi, skb,
--- linux-mvl-dove-2.6.32.orig/net/netfilter/nf_conntrack_core.c
+++ linux-mvl-dove-2.6.32/net/netfilter/nf_conntrack_core.c
@@ -30,6 +30,7 @@
 #include <linux/netdevice.h>
 #include <linux/socket.h>
 #include <linux/mm.h>
+#include <linux/nsproxy.h>
 #include <linux/rculist_nulls.h>
 
 #include <net/netfilter/nf_conntrack.h>
@@ -63,8 +64,6 @@
 struct nf_conn nf_conntrack_untracked __read_mostly;
 EXPORT_SYMBOL_GPL(nf_conntrack_untracked);
 
-static struct kmem_cache *nf_conntrack_cachep __read_mostly;
-
 static int nf_conntrack_hash_rnd_initted;
 static unsigned int nf_conntrack_hash_rnd;
 
@@ -86,9 +85,10 @@
 	return ((u64)h * size) >> 32;
 }
 
-static inline u_int32_t hash_conntrack(const struct nf_conntrack_tuple *tuple)
+static inline u_int32_t hash_conntrack(const struct net *net,
+				       const struct nf_conntrack_tuple *tuple)
 {
-	return __hash_conntrack(tuple, nf_conntrack_htable_size,
+	return __hash_conntrack(tuple, net->ct.htable_size,
 				nf_conntrack_hash_rnd);
 }
 
@@ -296,7 +296,7 @@
 {
 	struct nf_conntrack_tuple_hash *h;
 	struct hlist_nulls_node *n;
-	unsigned int hash = hash_conntrack(tuple);
+	unsigned int hash = hash_conntrack(net, tuple);
 
 	/* Disable BHs the entire time since we normally need to disable them
 	 * at least once for the stats anyway.
@@ -366,10 +366,11 @@
 
 void nf_conntrack_hash_insert(struct nf_conn *ct)
 {
+	struct net *net = nf_ct_net(ct);
 	unsigned int hash, repl_hash;
 
-	hash = hash_conntrack(&ct->tuplehash[IP_CT_DIR_ORIGINAL].tuple);
-	repl_hash = hash_conntrack(&ct->tuplehash[IP_CT_DIR_REPLY].tuple);
+	hash = hash_conntrack(net, &ct->tuplehash[IP_CT_DIR_ORIGINAL].tuple);
+	repl_hash = hash_conntrack(net, &ct->tuplehash[IP_CT_DIR_REPLY].tuple);
 
 	__nf_conntrack_hash_insert(ct, hash, repl_hash);
 }
@@ -397,8 +398,8 @@
 	if (CTINFO2DIR(ctinfo) != IP_CT_DIR_ORIGINAL)
 		return NF_ACCEPT;
 
-	hash = hash_conntrack(&ct->tuplehash[IP_CT_DIR_ORIGINAL].tuple);
-	repl_hash = hash_conntrack(&ct->tuplehash[IP_CT_DIR_REPLY].tuple);
+	hash = hash_conntrack(net, &ct->tuplehash[IP_CT_DIR_ORIGINAL].tuple);
+	repl_hash = hash_conntrack(net, &ct->tuplehash[IP_CT_DIR_REPLY].tuple);
 
 	/* We're not in hash table, and we refuse to set up related
 	   connections for unconfirmed conns.  But packet copies and
@@ -468,7 +469,7 @@
 	struct net *net = nf_ct_net(ignored_conntrack);
 	struct nf_conntrack_tuple_hash *h;
 	struct hlist_nulls_node *n;
-	unsigned int hash = hash_conntrack(tuple);
+	unsigned int hash = hash_conntrack(net, tuple);
 
 	/* Disable BHs the entire time since we need to disable them at
 	 * least once for the stats anyway.
@@ -503,7 +504,7 @@
 	int dropped = 0;
 
 	rcu_read_lock();
-	for (i = 0; i < nf_conntrack_htable_size; i++) {
+	for (i = 0; i < net->ct.htable_size; i++) {
 		hlist_nulls_for_each_entry_rcu(h, n, &net->ct.hash[hash],
 					 hnnode) {
 			tmp = nf_ct_tuplehash_to_ctrack(h);
@@ -517,7 +518,8 @@
 			ct = NULL;
 		if (ct || cnt >= NF_CT_EVICTION_RANGE)
 			break;
-		hash = (hash + 1) % nf_conntrack_htable_size;
+
+		hash = (hash + 1) % net->ct.htable_size;
 	}
 	rcu_read_unlock();
 
@@ -551,7 +553,7 @@
 
 	if (nf_conntrack_max &&
 	    unlikely(atomic_read(&net->ct.count) > nf_conntrack_max)) {
-		unsigned int hash = hash_conntrack(orig);
+		unsigned int hash = hash_conntrack(net, orig);
 		if (!early_drop(net, hash)) {
 			atomic_dec(&net->ct.count);
 			if (net_ratelimit())
@@ -566,7 +568,7 @@
 	 * Do not use kmem_cache_zalloc(), as this cache uses
 	 * SLAB_DESTROY_BY_RCU.
 	 */
-	ct = kmem_cache_alloc(nf_conntrack_cachep, gfp);
+	ct = kmem_cache_alloc(net->ct.nf_conntrack_cachep, gfp);
 	if (ct == NULL) {
 		pr_debug("nf_conntrack_alloc: Can't alloc conntrack.\n");
 		atomic_dec(&net->ct.count);
@@ -605,7 +607,7 @@
 	nf_ct_ext_destroy(ct);
 	atomic_dec(&net->ct.count);
 	nf_ct_ext_free(ct);
-	kmem_cache_free(nf_conntrack_cachep, ct);
+	kmem_cache_free(net->ct.nf_conntrack_cachep, ct);
 }
 EXPORT_SYMBOL_GPL(nf_conntrack_free);
 
@@ -1008,7 +1010,7 @@
 	struct hlist_nulls_node *n;
 
 	spin_lock_bh(&nf_conntrack_lock);
-	for (; *bucket < nf_conntrack_htable_size; (*bucket)++) {
+	for (; *bucket < net->ct.htable_size; (*bucket)++) {
 		hlist_nulls_for_each_entry(h, n, &net->ct.hash[*bucket], hnnode) {
 			ct = nf_ct_tuplehash_to_ctrack(h);
 			if (iter(ct, data))
@@ -1107,9 +1109,12 @@
 
 static void nf_conntrack_cleanup_init_net(void)
 {
+	/* wait until all references to nf_conntrack_untracked are dropped */
+	while (atomic_read(&nf_conntrack_untracked.ct_general.use) > 1)
+		schedule();
+
 	nf_conntrack_helper_fini();
 	nf_conntrack_proto_fini();
-	kmem_cache_destroy(nf_conntrack_cachep);
 }
 
 static void nf_conntrack_cleanup_net(struct net *net)
@@ -1121,15 +1126,14 @@
 		schedule();
 		goto i_see_dead_people;
 	}
-	/* wait until all references to nf_conntrack_untracked are dropped */
-	while (atomic_read(&nf_conntrack_untracked.ct_general.use) > 1)
-		schedule();
 
 	nf_ct_free_hashtable(net->ct.hash, net->ct.hash_vmalloc,
-			     nf_conntrack_htable_size);
+			     net->ct.htable_size);
 	nf_conntrack_ecache_fini(net);
 	nf_conntrack_acct_fini(net);
 	nf_conntrack_expect_fini(net);
+	kmem_cache_destroy(net->ct.nf_conntrack_cachep);
+	kfree(net->ct.slabname);
 	free_percpu(net->ct.stat);
 }
 
@@ -1169,7 +1173,8 @@
 	if (!hash) {
 		*vmalloced = 1;
 		printk(KERN_WARNING "nf_conntrack: falling back to vmalloc.\n");
-		hash = __vmalloc(sz, GFP_KERNEL | __GFP_ZERO, PAGE_KERNEL);
+		hash = __vmalloc(sz, GFP_KERNEL | __GFP_HIGHMEM | __GFP_ZERO,
+				 PAGE_KERNEL);
 	}
 
 	if (hash && nulls)
@@ -1184,10 +1189,12 @@
 {
 	int i, bucket, vmalloced, old_vmalloced;
 	unsigned int hashsize, old_size;
-	int rnd;
 	struct hlist_nulls_head *hash, *old_hash;
 	struct nf_conntrack_tuple_hash *h;
 
+	if (current->nsproxy->net_ns != &init_net)
+		return -EOPNOTSUPP;
+
 	/* On boot, we can set this without any fancy locking. */
 	if (!nf_conntrack_htable_size)
 		return param_set_uint(val, kp);
@@ -1200,33 +1207,29 @@
 	if (!hash)
 		return -ENOMEM;
 
-	/* We have to rehahs for the new table anyway, so we also can
-	 * use a newrandom seed */
-	get_random_bytes(&rnd, sizeof(rnd));
-
 	/* Lookups in the old hash might happen in parallel, which means we
 	 * might get false negatives during connection lookup. New connections
 	 * created because of a false negative won't make it into the hash
 	 * though since that required taking the lock.
 	 */
 	spin_lock_bh(&nf_conntrack_lock);
-	for (i = 0; i < nf_conntrack_htable_size; i++) {
+	for (i = 0; i < init_net.ct.htable_size; i++) {
 		while (!hlist_nulls_empty(&init_net.ct.hash[i])) {
 			h = hlist_nulls_entry(init_net.ct.hash[i].first,
 					struct nf_conntrack_tuple_hash, hnnode);
 			hlist_nulls_del_rcu(&h->hnnode);
-			bucket = __hash_conntrack(&h->tuple, hashsize, rnd);
+			bucket = __hash_conntrack(&h->tuple, hashsize,
+						  nf_conntrack_hash_rnd);
 			hlist_nulls_add_head_rcu(&h->hnnode, &hash[bucket]);
 		}
 	}
-	old_size = nf_conntrack_htable_size;
+	old_size = init_net.ct.htable_size;
 	old_vmalloced = init_net.ct.hash_vmalloc;
 	old_hash = init_net.ct.hash;
 
-	nf_conntrack_htable_size = hashsize;
+	init_net.ct.htable_size = nf_conntrack_htable_size = hashsize;
 	init_net.ct.hash_vmalloc = vmalloced;
 	init_net.ct.hash = hash;
-	nf_conntrack_hash_rnd = rnd;
 	spin_unlock_bh(&nf_conntrack_lock);
 
 	nf_ct_free_hashtable(old_hash, old_vmalloced, old_size);
@@ -1265,15 +1268,6 @@
 	       NF_CONNTRACK_VERSION, nf_conntrack_htable_size,
 	       nf_conntrack_max);
 
-	nf_conntrack_cachep = kmem_cache_create("nf_conntrack",
-						sizeof(struct nf_conn),
-						0, SLAB_DESTROY_BY_RCU, NULL);
-	if (!nf_conntrack_cachep) {
-		printk(KERN_ERR "Unable to create nf_conn slab cache\n");
-		ret = -ENOMEM;
-		goto err_cache;
-	}
-
 	ret = nf_conntrack_proto_init();
 	if (ret < 0)
 		goto err_proto;
@@ -1282,13 +1276,19 @@
 	if (ret < 0)
 		goto err_helper;
 
+	/* Set up fake conntrack: to never be deleted, not in any hashes */
+#ifdef CONFIG_NET_NS
+	nf_conntrack_untracked.ct_net = &init_net;
+#endif
+	atomic_set(&nf_conntrack_untracked.ct_general.use, 1);
+	/*  - and look it like as a confirmed connection */
+	set_bit(IPS_CONFIRMED_BIT, &nf_conntrack_untracked.status);
+
 	return 0;
 
 err_helper:
 	nf_conntrack_proto_fini();
 err_proto:
-	kmem_cache_destroy(nf_conntrack_cachep);
-err_cache:
 	return ret;
 }
 
@@ -1310,7 +1310,24 @@
 		ret = -ENOMEM;
 		goto err_stat;
 	}
-	net->ct.hash = nf_ct_alloc_hashtable(&nf_conntrack_htable_size,
+
+	net->ct.slabname = kasprintf(GFP_KERNEL, "nf_conntrack_%p", net);
+	if (!net->ct.slabname) {
+		ret = -ENOMEM;
+		goto err_slabname;
+	}
+
+	net->ct.nf_conntrack_cachep = kmem_cache_create(net->ct.slabname,
+							sizeof(struct nf_conn), 0,
+							SLAB_DESTROY_BY_RCU, NULL);
+	if (!net->ct.nf_conntrack_cachep) {
+		printk(KERN_ERR "Unable to create nf_conn slab cache\n");
+		ret = -ENOMEM;
+		goto err_cache;
+	}
+
+	net->ct.htable_size = nf_conntrack_htable_size;
+	net->ct.hash = nf_ct_alloc_hashtable(&net->ct.htable_size,
 					     &net->ct.hash_vmalloc, 1);
 	if (!net->ct.hash) {
 		ret = -ENOMEM;
@@ -1327,15 +1344,6 @@
 	if (ret < 0)
 		goto err_ecache;
 
-	/* Set up fake conntrack:
-	    - to never be deleted, not in any hashes */
-#ifdef CONFIG_NET_NS
-	nf_conntrack_untracked.ct_net = &init_net;
-#endif
-	atomic_set(&nf_conntrack_untracked.ct_general.use, 1);
-	/*  - and look it like as a confirmed connection */
-	set_bit(IPS_CONFIRMED_BIT, &nf_conntrack_untracked.status);
-
 	return 0;
 
 err_ecache:
@@ -1344,8 +1352,12 @@
 	nf_conntrack_expect_fini(net);
 err_expect:
 	nf_ct_free_hashtable(net->ct.hash, net->ct.hash_vmalloc,
-			     nf_conntrack_htable_size);
+			     net->ct.htable_size);
 err_hash:
+	kmem_cache_destroy(net->ct.nf_conntrack_cachep);
+err_cache:
+	kfree(net->ct.slabname);
+err_slabname:
 	free_percpu(net->ct.stat);
 err_stat:
 	return ret;
--- linux-mvl-dove-2.6.32.orig/net/netfilter/xt_conntrack.c
+++ linux-mvl-dove-2.6.32/net/netfilter/xt_conntrack.c
@@ -113,7 +113,8 @@
 }
 
 static bool
-conntrack_mt(const struct sk_buff *skb, const struct xt_match_param *par)
+conntrack_mt(const struct sk_buff *skb, const struct xt_match_param *par,
+             u16 state_mask, u16 status_mask)
 {
 	const struct xt_conntrack_mtinfo2 *info = par->matchinfo;
 	enum ip_conntrack_info ctinfo;
@@ -136,7 +137,7 @@
 			if (test_bit(IPS_DST_NAT_BIT, &ct->status))
 				statebit |= XT_CONNTRACK_STATE_DNAT;
 		}
-		if (!!(info->state_mask & statebit) ^
+		if (!!(state_mask & statebit) ^
 		    !(info->invert_flags & XT_CONNTRACK_STATE))
 			return false;
 	}
@@ -172,7 +173,7 @@
 		return false;
 
 	if ((info->match_flags & XT_CONNTRACK_STATUS) &&
-	    (!!(info->status_mask & ct->status) ^
+	    (!!(status_mask & ct->status) ^
 	    !(info->invert_flags & XT_CONNTRACK_STATUS)))
 		return false;
 
@@ -192,11 +193,17 @@
 static bool
 conntrack_mt_v1(const struct sk_buff *skb, const struct xt_match_param *par)
 {
-	const struct xt_conntrack_mtinfo2 *const *info = par->matchinfo;
-	struct xt_match_param newpar = *par;
+	const struct xt_conntrack_mtinfo1 *info = par->matchinfo;
 
-	newpar.matchinfo = *info;
-	return conntrack_mt(skb, &newpar);
+	return conntrack_mt(skb, par, info->state_mask, info->status_mask);
+}
+
+static bool
+conntrack_mt_v2(const struct sk_buff *skb, const struct xt_match_param *par)
+{
+	const struct xt_conntrack_mtinfo2 *info = par->matchinfo;
+
+	return conntrack_mt(skb, par, info->state_mask, info->status_mask);
 }
 
 static bool conntrack_mt_check(const struct xt_mtchk_param *par)
@@ -209,45 +216,11 @@
 	return true;
 }
 
-static bool conntrack_mt_check_v1(const struct xt_mtchk_param *par)
-{
-	struct xt_conntrack_mtinfo1 *info = par->matchinfo;
-	struct xt_conntrack_mtinfo2 *up;
-	int ret = conntrack_mt_check(par);
-
-	if (ret < 0)
-		return ret;
-
-	up = kmalloc(sizeof(*up), GFP_KERNEL);
-	if (up == NULL) {
-		nf_ct_l3proto_module_put(par->family);
-		return -ENOMEM;
-	}
-
-	/*
-	 * The strategy here is to minimize the overhead of v1 matching,
-	 * by prebuilding a v2 struct and putting the pointer into the
-	 * v1 dataspace.
-	 */
-	memcpy(up, info, offsetof(typeof(*info), state_mask));
-	up->state_mask  = info->state_mask;
-	up->status_mask = info->status_mask;
-	*(void **)info  = up;
-	return true;
-}
-
 static void conntrack_mt_destroy(const struct xt_mtdtor_param *par)
 {
 	nf_ct_l3proto_module_put(par->family);
 }
 
-static void conntrack_mt_destroy_v1(const struct xt_mtdtor_param *par)
-{
-	struct xt_conntrack_mtinfo2 **info = par->matchinfo;
-	kfree(*info);
-	conntrack_mt_destroy(par);
-}
-
 static struct xt_match conntrack_mt_reg[] __read_mostly = {
 	{
 		.name       = "conntrack",
@@ -255,8 +228,8 @@
 		.family     = NFPROTO_UNSPEC,
 		.matchsize  = sizeof(struct xt_conntrack_mtinfo1),
 		.match      = conntrack_mt_v1,
-		.checkentry = conntrack_mt_check_v1,
-		.destroy    = conntrack_mt_destroy_v1,
+		.checkentry = conntrack_mt_check,
+		.destroy    = conntrack_mt_destroy,
 		.me         = THIS_MODULE,
 	},
 	{
@@ -264,7 +237,7 @@
 		.revision   = 2,
 		.family     = NFPROTO_UNSPEC,
 		.matchsize  = sizeof(struct xt_conntrack_mtinfo2),
-		.match      = conntrack_mt,
+		.match      = conntrack_mt_v2,
 		.checkentry = conntrack_mt_check,
 		.destroy    = conntrack_mt_destroy,
 		.me         = THIS_MODULE,
--- linux-mvl-dove-2.6.32.orig/net/netfilter/xt_DSCP.c
+++ linux-mvl-dove-2.6.32/net/netfilter/xt_DSCP.c
@@ -99,7 +99,7 @@
 	u_int8_t orig, nv;
 
 	orig = ipv6_get_dsfield(iph);
-	nv   = (orig & info->tos_mask) ^ info->tos_value;
+	nv   = (orig & ~info->tos_mask) ^ info->tos_value;
 
 	if (orig != nv) {
 		if (!skb_make_writable(skb, sizeof(struct iphdr)))
--- linux-mvl-dove-2.6.32.orig/net/netfilter/nf_log.c
+++ linux-mvl-dove-2.6.32/net/netfilter/nf_log.c
@@ -83,6 +83,8 @@
 
 int nf_log_bind_pf(u_int8_t pf, const struct nf_logger *logger)
 {
+	if (pf >= ARRAY_SIZE(nf_loggers))
+		return -EINVAL;
 	mutex_lock(&nf_log_mutex);
 	if (__find_logger(pf, logger->name) == NULL) {
 		mutex_unlock(&nf_log_mutex);
@@ -96,6 +98,8 @@
 
 void nf_log_unbind_pf(u_int8_t pf)
 {
+	if (pf >= ARRAY_SIZE(nf_loggers))
+		return;
 	mutex_lock(&nf_log_mutex);
 	rcu_assign_pointer(nf_loggers[pf], NULL);
 	mutex_unlock(&nf_log_mutex);
--- linux-mvl-dove-2.6.32.orig/net/netfilter/xt_recent.c
+++ linux-mvl-dove-2.6.32/net/netfilter/xt_recent.c
@@ -142,6 +142,25 @@
 	t->entries--;
 }
 
+/*
+ * Drop entries with timestamps older then 'time'.
+ */
+static void recent_entry_reap(struct recent_table *t, unsigned long time)
+{
+	struct recent_entry *e;
+
+	/*
+	 * The head of the LRU list is always the oldest entry.
+	 */
+	e = list_entry(t->lru_list.next, struct recent_entry, lru_list);
+
+	/*
+	 * The last time stamp is the most recent.
+	 */
+	if (time_after(time, e->stamps[e->index-1]))
+		recent_entry_remove(t, e);
+}
+
 static struct recent_entry *
 recent_entry_init(struct recent_table *t, const union nf_inet_addr *addr,
 		  u_int16_t family, u_int8_t ttl)
@@ -173,10 +192,10 @@
 
 static void recent_entry_update(struct recent_table *t, struct recent_entry *e)
 {
+	e->index %= ip_pkt_list_tot;
 	e->stamps[e->index++] = jiffies;
 	if (e->index > e->nstamps)
 		e->nstamps = e->index;
-	e->index %= ip_pkt_list_tot;
 	list_move_tail(&e->lru_list, &t->lru_list);
 }
 
@@ -260,11 +279,15 @@
 		for (i = 0; i < e->nstamps; i++) {
 			if (info->seconds && time_after(time, e->stamps[i]))
 				continue;
-			if (++hits >= info->hit_count) {
+			if (!info->hit_count || ++hits >= info->hit_count) {
 				ret = !ret;
 				break;
 			}
 		}
+
+		/* info->seconds must be non-zero */
+		if (info->check_set & XT_RECENT_REAP)
+			recent_entry_reap(t, time);
 	}
 
 	if (info->check_set & XT_RECENT_SET ||
@@ -292,7 +315,10 @@
 		      XT_RECENT_CHECK | XT_RECENT_UPDATE)) != 1)
 		return false;
 	if ((info->check_set & (XT_RECENT_SET | XT_RECENT_REMOVE)) &&
-	    (info->seconds || info->hit_count))
+	    (info->seconds || info->hit_count ||
+	    (info->check_set & XT_RECENT_MODIFIERS)))
+		return false;
+	if ((info->check_set & XT_RECENT_REAP) && !info->seconds)
 		return false;
 	if (info->hit_count > ip_pkt_list_tot)
 		return false;
--- linux-mvl-dove-2.6.32.orig/net/netfilter/nf_conntrack_expect.c
+++ linux-mvl-dove-2.6.32/net/netfilter/nf_conntrack_expect.c
@@ -569,7 +569,7 @@
 #endif /* CONFIG_PROC_FS */
 }
 
-module_param_named(expect_hashsize, nf_ct_expect_hsize, uint, 0600);
+module_param_named(expect_hashsize, nf_ct_expect_hsize, uint, 0400);
 
 int nf_conntrack_expect_init(struct net *net)
 {
@@ -577,7 +577,7 @@
 
 	if (net_eq(net, &init_net)) {
 		if (!nf_ct_expect_hsize) {
-			nf_ct_expect_hsize = nf_conntrack_htable_size / 256;
+			nf_ct_expect_hsize = net->ct.htable_size / 256;
 			if (!nf_ct_expect_hsize)
 				nf_ct_expect_hsize = 1;
 		}
--- linux-mvl-dove-2.6.32.orig/net/netfilter/nf_conntrack_netlink.c
+++ linux-mvl-dove-2.6.32/net/netfilter/nf_conntrack_netlink.c
@@ -594,7 +594,7 @@
 
 	rcu_read_lock();
 	last = (struct nf_conn *)cb->args[1];
-	for (; cb->args[0] < nf_conntrack_htable_size; cb->args[0]++) {
+	for (; cb->args[0] < init_net.ct.htable_size; cb->args[0]++) {
 restart:
 		hlist_nulls_for_each_entry_rcu(h, n, &init_net.ct.hash[cb->args[0]],
 					 hnnode) {
--- linux-mvl-dove-2.6.32.orig/net/netfilter/nf_conntrack_standalone.c
+++ linux-mvl-dove-2.6.32/net/netfilter/nf_conntrack_standalone.c
@@ -51,7 +51,7 @@
 	struct hlist_nulls_node *n;
 
 	for (st->bucket = 0;
-	     st->bucket < nf_conntrack_htable_size;
+	     st->bucket < net->ct.htable_size;
 	     st->bucket++) {
 		n = rcu_dereference(net->ct.hash[st->bucket].first);
 		if (!is_a_nulls(n))
@@ -69,7 +69,7 @@
 	head = rcu_dereference(head->next);
 	while (is_a_nulls(head)) {
 		if (likely(get_nulls_value(head) == st->bucket)) {
-			if (++st->bucket >= nf_conntrack_htable_size)
+			if (++st->bucket >= net->ct.htable_size)
 				return NULL;
 		}
 		head = rcu_dereference(net->ct.hash[st->bucket].first);
@@ -358,7 +358,7 @@
 	{
 		.ctl_name       = NET_NF_CONNTRACK_BUCKETS,
 		.procname       = "nf_conntrack_buckets",
-		.data           = &nf_conntrack_htable_size,
+		.data           = &init_net.ct.htable_size,
 		.maxlen         = sizeof(unsigned int),
 		.mode           = 0444,
 		.proc_handler   = proc_dointvec,
@@ -429,6 +429,7 @@
 		goto out_kmemdup;
 
 	table[1].data = &net->ct.count;
+	table[2].data = &net->ct.htable_size;
 	table[3].data = &net->ct.sysctl_checksum;
 	table[4].data = &net->ct.sysctl_log_invalid;
 
--- linux-mvl-dove-2.6.32.orig/net/netfilter/nf_conntrack_helper.c
+++ linux-mvl-dove-2.6.32/net/netfilter/nf_conntrack_helper.c
@@ -192,7 +192,7 @@
 	/* Get rid of expecteds, set helpers to NULL. */
 	hlist_nulls_for_each_entry(h, nn, &net->ct.unconfirmed, hnnode)
 		unhelp(h, me);
-	for (i = 0; i < nf_conntrack_htable_size; i++) {
+	for (i = 0; i < net->ct.htable_size; i++) {
 		hlist_nulls_for_each_entry(h, nn, &net->ct.hash[i], hnnode)
 			unhelp(h, me);
 	}
--- linux-mvl-dove-2.6.32.orig/net/netfilter/nf_conntrack_ftp.c
+++ linux-mvl-dove-2.6.32/net/netfilter/nf_conntrack_ftp.c
@@ -323,24 +323,24 @@
 			  struct nf_ct_ftp_master *info, int dir,
 			  struct sk_buff *skb)
 {
-	unsigned int i, oldest = NUM_SEQ_TO_REMEMBER;
+	unsigned int i, oldest;
 
 	/* Look for oldest: if we find exact match, we're done. */
 	for (i = 0; i < info->seq_aft_nl_num[dir]; i++) {
 		if (info->seq_aft_nl[dir][i] == nl_seq)
 			return;
-
-		if (oldest == info->seq_aft_nl_num[dir] ||
-		    before(info->seq_aft_nl[dir][i],
-			   info->seq_aft_nl[dir][oldest]))
-			oldest = i;
 	}
 
 	if (info->seq_aft_nl_num[dir] < NUM_SEQ_TO_REMEMBER) {
 		info->seq_aft_nl[dir][info->seq_aft_nl_num[dir]++] = nl_seq;
-	} else if (oldest != NUM_SEQ_TO_REMEMBER &&
-		   after(nl_seq, info->seq_aft_nl[dir][oldest])) {
-		info->seq_aft_nl[dir][oldest] = nl_seq;
+	} else {
+		if (before(info->seq_aft_nl[dir][0], info->seq_aft_nl[dir][1]))
+			oldest = 0;
+		else
+			oldest = 1;
+
+		if (after(nl_seq, info->seq_aft_nl[dir][oldest]))
+			info->seq_aft_nl[dir][oldest] = nl_seq;
 	}
 }
 
--- linux-mvl-dove-2.6.32.orig/net/netfilter/ipvs/ip_vs_conn.c
+++ linux-mvl-dove-2.6.32/net/netfilter/ipvs/ip_vs_conn.c
@@ -146,6 +146,7 @@
 	hash = ip_vs_conn_hashkey(cp->af, cp->protocol, &cp->caddr, cp->cport);
 
 	ct_write_lock(hash);
+	spin_lock(&cp->lock);
 
 	if (!(cp->flags & IP_VS_CONN_F_HASHED)) {
 		list_add(&cp->c_list, &ip_vs_conn_tab[hash]);
@@ -158,6 +159,7 @@
 		ret = 0;
 	}
 
+	spin_unlock(&cp->lock);
 	ct_write_unlock(hash);
 
 	return ret;
@@ -177,6 +179,7 @@
 	hash = ip_vs_conn_hashkey(cp->af, cp->protocol, &cp->caddr, cp->cport);
 
 	ct_write_lock(hash);
+	spin_lock(&cp->lock);
 
 	if (cp->flags & IP_VS_CONN_F_HASHED) {
 		list_del(&cp->c_list);
@@ -186,6 +189,7 @@
 	} else
 		ret = 0;
 
+	spin_unlock(&cp->lock);
 	ct_write_unlock(hash);
 
 	return ret;
--- linux-mvl-dove-2.6.32.orig/net/netfilter/ipvs/ip_vs_ctl.c
+++ linux-mvl-dove-2.6.32/net/netfilter/ipvs/ip_vs_ctl.c
@@ -2714,6 +2714,8 @@
 	if (!(nla_af && (nla_fwmark || (nla_port && nla_protocol && nla_addr))))
 		return -EINVAL;
 
+	memset(usvc, 0, sizeof(*usvc));
+
 	usvc->af = nla_get_u16(nla_af);
 #ifdef CONFIG_IP_VS_IPV6
 	if (usvc->af != AF_INET && usvc->af != AF_INET6)
@@ -2901,6 +2903,8 @@
 	if (!(nla_addr && nla_port))
 		return -EINVAL;
 
+	memset(udest, 0, sizeof(*udest));
+
 	nla_memcpy(&udest->addr, nla_addr, sizeof(udest->addr));
 	udest->port = nla_get_u16(nla_port);
 
--- linux-mvl-dove-2.6.32.orig/net/packet/af_packet.c
+++ linux-mvl-dove-2.6.32/net/packet/af_packet.c
@@ -767,6 +767,7 @@
 		h.h2->tp_sec = ts.tv_sec;
 		h.h2->tp_nsec = ts.tv_nsec;
 		h.h2->tp_vlan_tci = skb->vlan_tci;
+		h.h2->tp_padding = 0;
 		hdrlen = sizeof(*h.h2);
 		break;
 	default:
@@ -1028,8 +1029,20 @@
 
 		status = TP_STATUS_SEND_REQUEST;
 		err = dev_queue_xmit(skb);
-		if (unlikely(err > 0 && (err = net_xmit_errno(err)) != 0))
-			goto out_xmit;
+		if (unlikely(err > 0)) {
+			err = net_xmit_errno(err);
+			if (err && __packet_get_status(po, ph) ==
+				   TP_STATUS_AVAILABLE) {
+				/* skb was destructed already */
+				skb = NULL;
+				goto out_status;
+			}
+			/*
+			 * skb was dropped but not destructed yet;
+			 * let's treat it like congestion or err < 0
+			 */
+			err = 0;
+		}
 		packet_increment_head(&po->tx_ring);
 		len_sum += tp_len;
 	} while (likely((ph != NULL) || ((!(msg->msg_flags & MSG_DONTWAIT))
@@ -1039,9 +1052,6 @@
 	err = len_sum;
 	goto out_put;
 
-out_xmit:
-	skb->destructor = sock_wfree;
-	atomic_dec(&po->tx_ring.pending);
 out_status:
 	__packet_set_status(po, ph, status);
 	kfree_skb(skb);
@@ -1490,6 +1500,7 @@
 		aux.tp_net = skb_network_offset(skb);
 		aux.tp_vlan_tci = skb->vlan_tci;
 
+		aux.tp_padding = 0;
 		put_cmsg(msg, SOL_PACKET, PACKET_AUXDATA, sizeof(aux), &aux);
 	}
 
@@ -1517,7 +1528,7 @@
 	uaddr->sa_family = AF_PACKET;
 	dev = dev_get_by_index(sock_net(sk), pkt_sk(sk)->ifindex);
 	if (dev) {
-		strlcpy(uaddr->sa_data, dev->name, 15);
+		strncpy(uaddr->sa_data, dev->name, 14);
 		dev_put(dev);
 	} else
 		memset(uaddr->sa_data, 0, 14);
@@ -1540,6 +1551,7 @@
 	sll->sll_family = AF_PACKET;
 	sll->sll_ifindex = po->ifindex;
 	sll->sll_protocol = po->num;
+	sll->sll_pkttype = 0;
 	dev = dev_get_by_index(sock_net(sk), po->ifindex);
 	if (dev) {
 		sll->sll_hatype = dev->type;
--- linux-mvl-dove-2.6.32.orig/net/rds/recv.c
+++ linux-mvl-dove-2.6.32/net/rds/recv.c
@@ -296,7 +296,7 @@
 int rds_notify_queue_get(struct rds_sock *rs, struct msghdr *msghdr)
 {
 	struct rds_notifier *notifier;
-	struct rds_rdma_notify cmsg;
+	struct rds_rdma_notify cmsg = { 0 }; /* fill holes with zero */
 	unsigned int count = 0, max_messages = ~0U;
 	unsigned long flags;
 	LIST_HEAD(copy);
--- linux-mvl-dove-2.6.32.orig/net/rds/rdma.c
+++ linux-mvl-dove-2.6.32/net/rds/rdma.c
@@ -447,7 +447,7 @@
 		goto out;
 	}
 
-	if (args->nr_local > (u64)UINT_MAX) {
+	if (args->nr_local > UIO_MAXIOV) {
 		ret = -EMSGSIZE;
 		goto out;
 	}
@@ -473,6 +473,17 @@
 
 		max_pages = max(nr, max_pages);
 		nr_pages += nr;
+
+		/*
+		 * nr for one entry in limited to (UINT_MAX>>PAGE_SHIFT)+1
+		 * so nr_pages cannot overflow without becoming bigger than
+		 * INT_MAX first. If nr cannot overflow then max_pages should
+		 * be ok.
+		 */
+		if (nr_pages > INT_MAX) {
+			ret = -EINVAL;
+			goto out;
+		}
 	}
 
 	pages = kcalloc(max_pages, sizeof(struct page *), GFP_KERNEL);
@@ -605,18 +616,32 @@
 int rds_cmsg_rdma_args(struct rds_sock *rs, struct rds_message *rm,
 			  struct cmsghdr *cmsg)
 {
+	struct rds_rdma_args *args;
 	struct rds_rdma_op *op;
+	int ret = 0;
 
 	if (cmsg->cmsg_len < CMSG_LEN(sizeof(struct rds_rdma_args))
-	 || rm->m_rdma_op != NULL)
-		return -EINVAL;
+	 || rm->m_rdma_op != NULL) {
+		ret = -EINVAL;
+		goto out;
+        }
+
+	args = CMSG_DATA(cmsg);
+
+	if (args->nr_local > UIO_MAXIOV) {
+		ret = -EMSGSIZE;
+		goto out;
+	}
 
 	op = rds_rdma_prepare(rs, CMSG_DATA(cmsg));
-	if (IS_ERR(op))
-		return PTR_ERR(op);
+	if (IS_ERR(op)) {
+		ret = PTR_ERR(op);
+		goto out;
+	}
 	rds_stats_inc(s_send_rdma);
 	rm->m_rdma_op = op;
-	return 0;
+out:
+	return ret;
 }
 
 /*
--- linux-mvl-dove-2.6.32.orig/net/rds/page.c
+++ linux-mvl-dove-2.6.32/net/rds/page.c
@@ -56,30 +56,23 @@
 	unsigned long ret;
 	void *addr;
 
-	if (to_user)
+	addr = kmap(page);
+	if (to_user) {
 		rds_stats_add(s_copy_to_user, bytes);
-	else
+		ret = access_ok(VERIFY_WRITE, ptr, bytes);
+		if (!ret)
+			return -EFAULT;
+		ret = copy_to_user(ptr, addr + offset, bytes);
+	} else {
 		rds_stats_add(s_copy_from_user, bytes);
-
-	addr = kmap_atomic(page, KM_USER0);
-	if (to_user)
-		ret = __copy_to_user_inatomic(ptr, addr + offset, bytes);
-	else
-		ret = __copy_from_user_inatomic(addr + offset, ptr, bytes);
-	kunmap_atomic(addr, KM_USER0);
-
-	if (ret) {
-		addr = kmap(page);
-		if (to_user)
-			ret = copy_to_user(ptr, addr + offset, bytes);
-		else
-			ret = copy_from_user(addr + offset, ptr, bytes);
-		kunmap(page);
-		if (ret)
+		ret = access_ok(VERIFY_READ, ptr, bytes);
+		if (!ret)
 			return -EFAULT;
+		ret = copy_from_user(addr + offset, ptr, bytes);
 	}
+	kunmap(page);
 
-	return 0;
+	return ret ? -EFAULT : 0;
 }
 EXPORT_SYMBOL_GPL(rds_page_copy_user);
 
--- linux-mvl-dove-2.6.32.orig/net/sched/act_mirred.c
+++ linux-mvl-dove-2.6.32/net/sched/act_mirred.c
@@ -205,15 +205,16 @@
 {
 	unsigned char *b = skb_tail_pointer(skb);
 	struct tcf_mirred *m = a->priv;
-	struct tc_mirred opt;
+	struct tc_mirred opt = {
+		.index   = m->tcf_index,
+		.action  = m->tcf_action,
+		.refcnt  = m->tcf_refcnt - ref,
+		.bindcnt = m->tcf_bindcnt - bind,
+		.eaction = m->tcfm_eaction,
+		.ifindex = m->tcfm_ifindex,
+	};
 	struct tcf_t t;
 
-	opt.index = m->tcf_index;
-	opt.action = m->tcf_action;
-	opt.refcnt = m->tcf_refcnt - ref;
-	opt.bindcnt = m->tcf_bindcnt - bind;
-	opt.eaction = m->tcfm_eaction;
-	opt.ifindex = m->tcfm_ifindex;
 	NLA_PUT(skb, TCA_MIRRED_PARMS, sizeof(opt), &opt);
 	t.install = jiffies_to_clock_t(jiffies - m->tcf_tm.install);
 	t.lastuse = jiffies_to_clock_t(jiffies - m->tcf_tm.lastuse);
--- linux-mvl-dove-2.6.32.orig/net/sched/act_police.c
+++ linux-mvl-dove-2.6.32/net/sched/act_police.c
@@ -340,22 +340,19 @@
 {
 	unsigned char *b = skb_tail_pointer(skb);
 	struct tcf_police *police = a->priv;
-	struct tc_police opt;
+	struct tc_police opt = {
+		.index = police->tcf_index,
+		.action = police->tcf_action,
+		.mtu = police->tcfp_mtu,
+		.burst = police->tcfp_burst,
+		.refcnt = police->tcf_refcnt - ref,
+		.bindcnt = police->tcf_bindcnt - bind,
+	};
 
-	opt.index = police->tcf_index;
-	opt.action = police->tcf_action;
-	opt.mtu = police->tcfp_mtu;
-	opt.burst = police->tcfp_burst;
-	opt.refcnt = police->tcf_refcnt - ref;
-	opt.bindcnt = police->tcf_bindcnt - bind;
 	if (police->tcfp_R_tab)
 		opt.rate = police->tcfp_R_tab->rate;
-	else
-		memset(&opt.rate, 0, sizeof(opt.rate));
 	if (police->tcfp_P_tab)
 		opt.peakrate = police->tcfp_P_tab->rate;
-	else
-		memset(&opt.peakrate, 0, sizeof(opt.peakrate));
 	NLA_PUT(skb, TCA_POLICE_TBF, sizeof(opt), &opt);
 	if (police->tcfp_result)
 		NLA_PUT_U32(skb, TCA_POLICE_RESULT, police->tcfp_result);
--- linux-mvl-dove-2.6.32.orig/net/sched/act_nat.c
+++ linux-mvl-dove-2.6.32/net/sched/act_nat.c
@@ -240,7 +240,7 @@
 			iph->saddr = new_addr;
 
 		inet_proto_csum_replace4(&icmph->checksum, skb, addr, new_addr,
-					 1);
+					 0);
 		break;
 	}
 	default:
@@ -261,40 +261,29 @@
 {
 	unsigned char *b = skb_tail_pointer(skb);
 	struct tcf_nat *p = a->priv;
-	struct tc_nat *opt;
+	struct tc_nat opt = {
+		.old_addr = p->old_addr,
+		.new_addr = p->new_addr,
+		.mask     = p->mask,
+		.flags    = p->flags,
+
+		.index    = p->tcf_index,
+		.action   = p->tcf_action,
+		.refcnt   = p->tcf_refcnt - ref,
+		.bindcnt  = p->tcf_bindcnt - bind,
+	};
 	struct tcf_t t;
-	int s;
 
-	s = sizeof(*opt);
-
-	/* netlink spinlocks held above us - must use ATOMIC */
-	opt = kzalloc(s, GFP_ATOMIC);
-	if (unlikely(!opt))
-		return -ENOBUFS;
-
-	opt->old_addr = p->old_addr;
-	opt->new_addr = p->new_addr;
-	opt->mask = p->mask;
-	opt->flags = p->flags;
-
-	opt->index = p->tcf_index;
-	opt->action = p->tcf_action;
-	opt->refcnt = p->tcf_refcnt - ref;
-	opt->bindcnt = p->tcf_bindcnt - bind;
-
-	NLA_PUT(skb, TCA_NAT_PARMS, s, opt);
+	NLA_PUT(skb, TCA_NAT_PARMS, sizeof(opt), &opt);
 	t.install = jiffies_to_clock_t(jiffies - p->tcf_tm.install);
 	t.lastuse = jiffies_to_clock_t(jiffies - p->tcf_tm.lastuse);
 	t.expires = jiffies_to_clock_t(p->tcf_tm.expires);
 	NLA_PUT(skb, TCA_NAT_TM, sizeof(t), &t);
 
-	kfree(opt);
-
 	return skb->len;
 
 nla_put_failure:
 	nlmsg_trim(skb, b);
-	kfree(opt);
 	return -1;
 }
 
--- linux-mvl-dove-2.6.32.orig/net/sched/act_skbedit.c
+++ linux-mvl-dove-2.6.32/net/sched/act_skbedit.c
@@ -147,13 +147,14 @@
 {
 	unsigned char *b = skb_tail_pointer(skb);
 	struct tcf_skbedit *d = a->priv;
-	struct tc_skbedit opt;
+	struct tc_skbedit opt = {
+		.index   = d->tcf_index,
+		.refcnt  = d->tcf_refcnt - ref,
+		.bindcnt = d->tcf_bindcnt - bind,
+		.action  = d->tcf_action,
+	};
 	struct tcf_t t;
 
-	opt.index = d->tcf_index;
-	opt.refcnt = d->tcf_refcnt - ref;
-	opt.bindcnt = d->tcf_bindcnt - bind;
-	opt.action = d->tcf_action;
 	NLA_PUT(skb, TCA_SKBEDIT_PARMS, sizeof(opt), &opt);
 	if (d->flags & SKBEDIT_F_PRIORITY)
 		NLA_PUT(skb, TCA_SKBEDIT_PRIORITY, sizeof(d->priority),
--- linux-mvl-dove-2.6.32.orig/net/sched/act_gact.c
+++ linux-mvl-dove-2.6.32/net/sched/act_gact.c
@@ -152,21 +152,24 @@
 static int tcf_gact_dump(struct sk_buff *skb, struct tc_action *a, int bind, int ref)
 {
 	unsigned char *b = skb_tail_pointer(skb);
-	struct tc_gact opt;
 	struct tcf_gact *gact = a->priv;
+	struct tc_gact opt = {
+		.index   = gact->tcf_index,
+		.refcnt  = gact->tcf_refcnt - ref,
+		.bindcnt = gact->tcf_bindcnt - bind,
+		.action  = gact->tcf_action,
+	};
 	struct tcf_t t;
 
-	opt.index = gact->tcf_index;
-	opt.refcnt = gact->tcf_refcnt - ref;
-	opt.bindcnt = gact->tcf_bindcnt - bind;
-	opt.action = gact->tcf_action;
 	NLA_PUT(skb, TCA_GACT_PARMS, sizeof(opt), &opt);
 #ifdef CONFIG_GACT_PROB
 	if (gact->tcfg_ptype) {
-		struct tc_gact_p p_opt;
-		p_opt.paction = gact->tcfg_paction;
-		p_opt.pval = gact->tcfg_pval;
-		p_opt.ptype = gact->tcfg_ptype;
+		struct tc_gact_p p_opt = {
+			.paction = gact->tcfg_paction,
+			.pval    = gact->tcfg_pval,
+			.ptype   = gact->tcfg_ptype,
+		};
+
 		NLA_PUT(skb, TCA_GACT_PROB, sizeof(p_opt), &p_opt);
 	}
 #endif
--- linux-mvl-dove-2.6.32.orig/net/sched/sch_generic.c
+++ linux-mvl-dove-2.6.32/net/sched/sch_generic.c
@@ -330,6 +330,24 @@
 }
 EXPORT_SYMBOL(netif_carrier_off);
 
+/**
+ * 	netif_notify_peers - notify network peers about existence of @dev
+ * 	@dev: network device
+ *
+ * Generate traffic such that interested network peers are aware of
+ * @dev, such as by generating a gratuitous ARP. This may be used when
+ * a device wants to inform the rest of the network about some sort of
+ * reconfiguration such as a failover event or virtual machine
+ * migration.
+ */
+void netif_notify_peers(struct net_device *dev)
+{
+	rtnl_lock();
+	call_netdevice_notifiers(NETDEV_NOTIFY_PEERS, dev);
+	rtnl_unlock();
+}
+EXPORT_SYMBOL(netif_notify_peers);
+
 /* "NOOP" scheduler: the best scheduler, recommended for all interfaces
    under all circumstances. It is difficult to invent anything faster or
    cheaper.
--- linux-mvl-dove-2.6.32.orig/net/sched/cls_cgroup.c
+++ linux-mvl-dove-2.6.32/net/sched/cls_cgroup.c
@@ -110,7 +110,7 @@
 	 * calls by looking at the number of nested bh disable calls because
 	 * softirqs always disables bh.
 	 */
-	if (softirq_count() != SOFTIRQ_OFFSET)
+	if (in_serving_softirq())
 		return -1;
 
 	rcu_read_lock();
--- linux-mvl-dove-2.6.32.orig/net/sched/act_simple.c
+++ linux-mvl-dove-2.6.32/net/sched/act_simple.c
@@ -163,13 +163,14 @@
 {
 	unsigned char *b = skb_tail_pointer(skb);
 	struct tcf_defact *d = a->priv;
-	struct tc_defact opt;
+	struct tc_defact opt = {
+		.index   = d->tcf_index,
+		.refcnt  = d->tcf_refcnt - ref,
+		.bindcnt = d->tcf_bindcnt - bind,
+		.action  = d->tcf_action,
+	};
 	struct tcf_t t;
 
-	opt.index = d->tcf_index;
-	opt.refcnt = d->tcf_refcnt - ref;
-	opt.bindcnt = d->tcf_bindcnt - bind;
-	opt.action = d->tcf_action;
 	NLA_PUT(skb, TCA_DEF_PARMS, sizeof(opt), &opt);
 	NLA_PUT_STRING(skb, TCA_DEF_DATA, d->tcfd_defdata);
 	t.install = jiffies_to_clock_t(jiffies - d->tcf_tm.install);
--- linux-mvl-dove-2.6.32.orig/net/decnet/af_decnet.c
+++ linux-mvl-dove-2.6.32/net/decnet/af_decnet.c
@@ -1555,6 +1555,8 @@
 			if (r_len > sizeof(struct linkinfo_dn))
 				r_len = sizeof(struct linkinfo_dn);
 
+			memset(&link, 0, sizeof(link));
+
 			switch(sock->state) {
 				case SS_CONNECTING:
 					link.idn_linkstate = LL_CONNECTING;
--- linux-mvl-dove-2.6.32.orig/net/netlink/af_netlink.c
+++ linux-mvl-dove-2.6.32/net/netlink/af_netlink.c
@@ -1363,7 +1363,7 @@
 	struct netlink_sock *nlk = nlk_sk(sk);
 	int noblock = flags&MSG_DONTWAIT;
 	size_t copied;
-	struct sk_buff *skb, *frag __maybe_unused = NULL;
+	struct sk_buff *skb, *data_skb;
 	int err;
 
 	if (flags&MSG_OOB)
@@ -1375,45 +1375,35 @@
 	if (skb == NULL)
 		goto out;
 
+	data_skb = skb;
+
 #ifdef CONFIG_COMPAT_NETLINK_MESSAGES
 	if (unlikely(skb_shinfo(skb)->frag_list)) {
-		bool need_compat = !!(flags & MSG_CMSG_COMPAT);
-
 		/*
-		 * If this skb has a frag_list, then here that means that
-		 * we will have to use the frag_list skb for compat tasks
-		 * and the regular skb for non-compat tasks.
+		 * If this skb has a frag_list, then here that means that we
+		 * will have to use the frag_list skb's data for compat tasks
+		 * and the regular skb's data for normal (non-compat) tasks.
 		 *
-		 * The skb might (and likely will) be cloned, so we can't
-		 * just reset frag_list and go on with things -- we need to
-		 * keep that. For the compat case that's easy -- simply get
-		 * a reference to the compat skb and free the regular one
-		 * including the frag. For the non-compat case, we need to
-		 * avoid sending the frag to the user -- so assign NULL but
-		 * restore it below before freeing the skb.
+		 * If we need to send the compat skb, assign it to the
+		 * 'data_skb' variable so that it will be used below for data
+		 * copying. We keep 'skb' for everything else, including
+		 * freeing both later.
 		 */
-		if (need_compat) {
-			struct sk_buff *compskb = skb_shinfo(skb)->frag_list;
-			skb_get(compskb);
-			kfree_skb(skb);
-			skb = compskb;
-		} else {
-			frag = skb_shinfo(skb)->frag_list;
-			skb_shinfo(skb)->frag_list = NULL;
-		}
+		if (flags & MSG_CMSG_COMPAT)
+			data_skb = skb_shinfo(skb)->frag_list;
 	}
 #endif
 
 	msg->msg_namelen = 0;
 
-	copied = skb->len;
+	copied = data_skb->len;
 	if (len < copied) {
 		msg->msg_flags |= MSG_TRUNC;
 		copied = len;
 	}
 
-	skb_reset_transport_header(skb);
-	err = skb_copy_datagram_iovec(skb, 0, msg->msg_iov, copied);
+	skb_reset_transport_header(data_skb);
+	err = skb_copy_datagram_iovec(data_skb, 0, msg->msg_iov, copied);
 
 	if (msg->msg_name) {
 		struct sockaddr_nl *addr = (struct sockaddr_nl *)msg->msg_name;
@@ -1433,11 +1423,7 @@
 	}
 	siocb->scm->creds = *NETLINK_CREDS(skb);
 	if (flags & MSG_TRUNC)
-		copied = skb->len;
-
-#ifdef CONFIG_COMPAT_NETLINK_MESSAGES
-	skb_shinfo(skb)->frag_list = frag;
-#endif
+		copied = data_skb->len;
 
 	skb_free_datagram(sk, skb);
 
--- linux-mvl-dove-2.6.32.orig/net/llc/llc_c_ac.c
+++ linux-mvl-dove-2.6.32/net/llc/llc_c_ac.c
@@ -1437,7 +1437,7 @@
 			llc_conn_state_process(sk, skb);
 		else {
 			llc_set_backlog_type(skb, LLC_EVENT);
-			sk_add_backlog(sk, skb);
+			__sk_add_backlog(sk, skb);
 		}
 	}
 }
--- linux-mvl-dove-2.6.32.orig/net/llc/llc_conn.c
+++ linux-mvl-dove-2.6.32/net/llc/llc_conn.c
@@ -756,7 +756,8 @@
 	else {
 		dprintk("%s: adding to backlog...\n", __func__);
 		llc_set_backlog_type(skb, LLC_PACKET);
-		sk_add_backlog(sk, skb);
+		if (sk_add_backlog(sk, skb))
+			goto drop_unlock;
 	}
 out:
 	bh_unlock_sock(sk);
--- linux-mvl-dove-2.6.32.orig/net/llc/af_llc.c
+++ linux-mvl-dove-2.6.32/net/llc/af_llc.c
@@ -977,7 +977,8 @@
 {
 	struct sock *sk = sock->sk;
 	struct llc_sock *llc = llc_sk(sk);
-	int rc = -EINVAL, opt;
+	unsigned int opt;
+	int rc = -EINVAL;
 
 	lock_sock(sk);
 	if (unlikely(level != SOL_LLC || optlen != sizeof(int)))
--- linux-mvl-dove-2.6.32.orig/net/mac80211/mesh_hwmp.c
+++ linux-mvl-dove-2.6.32/net/mac80211/mesh_hwmp.c
@@ -813,7 +813,7 @@
 	}
 
 	if (mpath->flags & MESH_PATH_ACTIVE) {
-		if (time_after(jiffies, mpath->exp_time +
+		if (time_after(jiffies, mpath->exp_time -
 			msecs_to_jiffies(sdata->u.mesh.mshcfg.path_refresh_time))
 				&& !memcmp(sdata->dev->dev_addr, hdr->addr4,
 					   ETH_ALEN)
--- linux-mvl-dove-2.6.32.orig/net/mac80211/ibss.c
+++ linux-mvl-dove-2.6.32/net/mac80211/ibss.c
@@ -455,6 +455,10 @@
 
 	ieee80211_sta_expire(sdata, IEEE80211_IBSS_INACTIVITY_LIMIT);
 
+	if (time_before(jiffies, ifibss->last_scan_completed +
+		       IEEE80211_IBSS_MERGE_INTERVAL))
+		return;
+
 	if (ieee80211_sta_active_ibss(sdata))
 		return;
 
@@ -639,7 +643,7 @@
 	}
 	if (pos[1] != 0 &&
 	    (pos[1] != ifibss->ssid_len ||
-	     !memcmp(pos + 2, ifibss->ssid, ifibss->ssid_len))) {
+	     memcmp(pos + 2, ifibss->ssid, ifibss->ssid_len))) {
 		/* Ignore ProbeReq for foreign SSID */
 		return;
 	}
--- linux-mvl-dove-2.6.32.orig/net/mac80211/wme.h
+++ linux-mvl-dove-2.6.32/net/mac80211/wme.h
@@ -20,7 +20,11 @@
 
 extern const int ieee802_1d_to_ac[8];
 
-void ieee80211_select_queue(struct ieee80211_local *local,
-			    struct sk_buff *skb);
+u16 ieee80211_select_queue(struct ieee80211_sub_if_data *sdata,
+			   struct sk_buff *skb);
+void ieee80211_set_qos_hdr(struct ieee80211_local *local, struct sk_buff *skb);
+u16 ieee80211_downgrade_queue(struct ieee80211_local *local,
+                              struct sk_buff *skb);
+
 
 #endif /* _WME_H */
--- linux-mvl-dove-2.6.32.orig/net/mac80211/Kconfig
+++ linux-mvl-dove-2.6.32/net/mac80211/Kconfig
@@ -15,8 +15,12 @@
 
 if MAC80211 != n
 
+config MAC80211_HAS_RC
+	def_bool n
+
 config MAC80211_RC_PID
 	bool "PID controller based rate control algorithm" if EMBEDDED
+	select MAC80211_HAS_RC
 	---help---
 	  This option enables a TX rate control algorithm for
 	  mac80211 that uses a PID controller to select the TX
@@ -24,12 +28,14 @@
 
 config MAC80211_RC_MINSTREL
 	bool "Minstrel" if EMBEDDED
+	select MAC80211_HAS_RC
 	default y
 	---help---
 	  This option enables the 'minstrel' TX rate control algorithm
 
 choice
 	prompt "Default rate control algorithm"
+	depends on MAC80211_HAS_RC
 	default MAC80211_RC_DEFAULT_MINSTREL
 	---help---
 	  This option selects the default rate control algorithm
@@ -62,6 +68,9 @@
 
 endif
 
+comment "Some wireless drivers require a rate control algorithm"
+	depends on MAC80211_HAS_RC=n
+
 config MAC80211_MESH
 	bool "Enable mac80211 mesh networking (pre-802.11s) support"
 	depends on MAC80211 && EXPERIMENTAL
--- linux-mvl-dove-2.6.32.orig/net/mac80211/iface.c
+++ linux-mvl-dove-2.6.32/net/mac80211/iface.c
@@ -15,12 +15,14 @@
 #include <linux/netdevice.h>
 #include <linux/rtnetlink.h>
 #include <net/mac80211.h>
+#include <net/ieee80211_radiotap.h>
 #include "ieee80211_i.h"
 #include "sta_info.h"
 #include "debugfs_netdev.h"
 #include "mesh.h"
 #include "led.h"
 #include "driver-ops.h"
+#include "wme.h"
 
 /**
  * DOC: Interface list locking
@@ -642,6 +644,12 @@
 	WARN_ON(flushed);
 }
 
+static u16 ieee80211_netdev_select_queue(struct net_device *dev,
+					 struct sk_buff *skb)
+{
+	return ieee80211_select_queue(IEEE80211_DEV_TO_SUB_IF(dev), skb);
+}
+
 static const struct net_device_ops ieee80211_dataif_ops = {
 	.ndo_open		= ieee80211_open,
 	.ndo_stop		= ieee80211_stop,
@@ -650,8 +658,35 @@
 	.ndo_set_multicast_list = ieee80211_set_multicast_list,
 	.ndo_change_mtu 	= ieee80211_change_mtu,
 	.ndo_set_mac_address 	= eth_mac_addr,
+	.ndo_select_queue	= ieee80211_netdev_select_queue,
 };
 
+static u16 ieee80211_monitor_select_queue(struct net_device *dev,
+					  struct sk_buff *skb)
+{
+	struct ieee80211_sub_if_data *sdata = IEEE80211_DEV_TO_SUB_IF(dev);
+	struct ieee80211_local *local = sdata->local;
+	struct ieee80211_hdr *hdr;
+	struct ieee80211_radiotap_header *rtap = (void *)skb->data;
+
+	if (local->hw.queues < 4)
+		return 0;
+
+	if (skb->len < 4 ||
+	    skb->len < le16_to_cpu(rtap->it_len) + 2 /* frame control */)
+		return 0; /* doesn't matter, frame will be dropped */
+
+	hdr = (void *)((u8 *)skb->data + le16_to_cpu(rtap->it_len));
+
+	if (!ieee80211_is_data(hdr->frame_control)) {
+		skb->priority = 7;
+		return ieee802_1d_to_ac[skb->priority];
+	}
+
+	skb->priority = 0;
+	return ieee80211_downgrade_queue(local, skb);
+}
+
 static const struct net_device_ops ieee80211_monitorif_ops = {
 	.ndo_open		= ieee80211_open,
 	.ndo_stop		= ieee80211_stop,
@@ -660,6 +695,7 @@
 	.ndo_set_multicast_list = ieee80211_set_multicast_list,
 	.ndo_change_mtu 	= ieee80211_change_mtu,
 	.ndo_set_mac_address 	= eth_mac_addr,
+	.ndo_select_queue	= ieee80211_monitor_select_queue,
 };
 
 static void ieee80211_if_setup(struct net_device *dev)
@@ -768,8 +804,8 @@
 
 	ASSERT_RTNL();
 
-	ndev = alloc_netdev(sizeof(*sdata) + local->hw.vif_data_size,
-			    name, ieee80211_if_setup);
+	ndev = alloc_netdev_mq(sizeof(*sdata) + local->hw.vif_data_size,
+			       name, ieee80211_if_setup, local->hw.queues);
 	if (!ndev)
 		return -ENOMEM;
 	dev_net_set(ndev, wiphy_net(local->hw.wiphy));
--- linux-mvl-dove-2.6.32.orig/net/mac80211/mlme.c
+++ linux-mvl-dove-2.6.32/net/mac80211/mlme.c
@@ -269,12 +269,6 @@
 	if (wk->bss->wmm_used)
 		wmm = 1;
 
-	/* get all rates supported by the device and the AP as
-	 * some APs don't like getting a superset of their rates
-	 * in the association request (e.g. D-Link DAP 1353 in
-	 * b-only mode) */
-	rates_len = ieee80211_compatible_rates(wk->bss, sband, &rates);
-
 	if ((wk->bss->cbss.capability & WLAN_CAPABILITY_SPECTRUM_MGMT) &&
 	    (local->hw.flags & IEEE80211_HW_SPECTRUM_MGMT))
 		capab |= WLAN_CAPABILITY_SPECTRUM_MGMT;
@@ -309,6 +303,17 @@
 	*pos++ = wk->ssid_len;
 	memcpy(pos, wk->ssid, wk->ssid_len);
 
+	if (wk->bss->supp_rates_len) {
+		/* get all rates supported by the device and the AP as
+		 * some APs don't like getting a superset of their rates
+		 * in the association request (e.g. D-Link DAP 1353 in
+		 * b-only mode) */
+		rates_len = ieee80211_compatible_rates(wk->bss, sband, &rates);
+	} else {
+		rates = ~0;
+		rates_len = sband->n_bitrates;
+	}
+
 	/* add all rates which were marked to be used above */
 	supp_rates_len = rates_len;
 	if (supp_rates_len > 8)
@@ -650,8 +655,11 @@
 	} else {
 		if (local->hw.flags & IEEE80211_HW_PS_NULLFUNC_STACK)
 			ieee80211_send_nullfunc(local, sdata, 1);
-		conf->flags |= IEEE80211_CONF_PS;
-		ieee80211_hw_config(local, IEEE80211_CONF_CHANGE_PS);
+
+		if (!(local->hw.flags & IEEE80211_HW_REPORTS_TX_ACK_STATUS)) {
+			conf->flags |= IEEE80211_CONF_PS;
+			ieee80211_hw_config(local, IEEE80211_CONF_CHANGE_PS);
+		}
 	}
 }
 
@@ -742,6 +750,7 @@
 		container_of(work, struct ieee80211_local,
 			     dynamic_ps_enable_work);
 	struct ieee80211_sub_if_data *sdata = local->ps_sdata;
+	struct ieee80211_if_managed *ifmgd = &sdata->u.mgd;
 
 	/* can only happen when PS was just disabled anyway */
 	if (!sdata)
@@ -750,11 +759,16 @@
 	if (local->hw.conf.flags & IEEE80211_CONF_PS)
 		return;
 
-	if (local->hw.flags & IEEE80211_HW_PS_NULLFUNC_STACK)
+	if ((local->hw.flags & IEEE80211_HW_PS_NULLFUNC_STACK) &&
+	    (!(ifmgd->flags & IEEE80211_STA_NULLFUNC_ACKED)))
 		ieee80211_send_nullfunc(local, sdata, 1);
 
-	local->hw.conf.flags |= IEEE80211_CONF_PS;
-	ieee80211_hw_config(local, IEEE80211_CONF_CHANGE_PS);
+	if (!(local->hw.flags & IEEE80211_HW_REPORTS_TX_ACK_STATUS) ||
+	    (ifmgd->flags & IEEE80211_STA_NULLFUNC_ACKED)) {
+		ifmgd->flags &= ~IEEE80211_STA_NULLFUNC_ACKED;
+		local->hw.conf.flags |= IEEE80211_CONF_PS;
+		ieee80211_hw_config(local, IEEE80211_CONF_CHANGE_PS);
+	}
 }
 
 void ieee80211_dynamic_ps_timer(unsigned long data)
@@ -904,6 +918,14 @@
 	sdata->u.mgd.flags &= ~(IEEE80211_STA_CONNECTION_POLL |
 				IEEE80211_STA_BEACON_POLL);
 
+	/*
+	 * Always handle WMM once after association regardless
+	 * of the first value the AP uses. Setting -1 here has
+	 * that effect because the AP values is an unsigned
+	 * 4-bit value.
+	 */
+	sdata->u.mgd.wmm_last_param_set = -1;
+
 	ieee80211_led_assoc(local, 1);
 
 	sdata->vif.bss_conf.assoc = 1;
@@ -1945,7 +1967,9 @@
 			rma = ieee80211_rx_mgmt_disassoc(sdata, mgmt, skb->len);
 			break;
 		case IEEE80211_STYPE_ACTION:
-			/* XXX: differentiate, can only happen for CSA now! */
+			if (mgmt->u.action.category != WLAN_CATEGORY_SPECTRUM_MGMT)
+				break;
+
 			ieee80211_sta_process_chanswitch(sdata,
 					&mgmt->u.action.u.chan_switch.sw_elem,
 					ifmgd->associated);
@@ -2284,6 +2308,9 @@
 {
 	struct ieee80211_if_managed *ifmgd = &sdata->u.mgd;
 
+	if (!ifmgd->associated)
+		return;
+
 	if (test_and_clear_bit(TMR_RUNNING_TIMER, &ifmgd->timers_running))
 		add_timer(&ifmgd->timer);
 	if (test_and_clear_bit(TMR_RUNNING_CHANSW, &ifmgd->timers_running))
@@ -2448,6 +2475,7 @@
 	list_add(&wk->list, &ifmgd->work_list);
 
 	ifmgd->flags &= ~IEEE80211_STA_DISABLE_11N;
+	ifmgd->flags &= ~IEEE80211_STA_NULLFUNC_ACKED;
 
 	for (i = 0; i < req->crypto.n_ciphers_pairwise; i++)
 		if (req->crypto.ciphers_pairwise[i] == WLAN_CIPHER_SUITE_WEP40 ||
--- linux-mvl-dove-2.6.32.orig/net/mac80211/main.c
+++ linux-mvl-dove-2.6.32/net/mac80211/main.c
@@ -441,6 +441,7 @@
 	rcu_read_lock();
 
 	sband = local->hw.wiphy->bands[info->band];
+	fc = hdr->frame_control;
 
 	sta = sta_info_get(local, hdr->addr1);
 
@@ -522,6 +523,20 @@
 			local->dot11FailedCount++;
 	}
 
+	if (ieee80211_is_nullfunc(fc) && ieee80211_has_pm(fc) &&
+	    (local->hw.flags & IEEE80211_HW_REPORTS_TX_ACK_STATUS) &&
+	    !(info->flags & IEEE80211_TX_CTL_INJECTED) &&
+	    local->ps_sdata && !(local->scanning)) {
+		if (info->flags & IEEE80211_TX_STAT_ACK) {
+			local->ps_sdata->u.mgd.flags |=
+				IEEE80211_STA_NULLFUNC_ACKED;
+			ieee80211_queue_work(&local->hw,
+					     &local->dynamic_ps_enable_work);
+		} else
+			mod_timer(&local->dynamic_ps_timer, jiffies +
+				  msecs_to_jiffies(10));
+	}
+
 	/* this was a transmitted frame, but now we want to reuse it */
 	skb_orphan(skb);
 
@@ -844,6 +859,8 @@
 	 * and we need some headroom for passing the frame to monitor
 	 * interfaces, but never both at the same time.
 	 */
+	BUILD_BUG_ON(IEEE80211_TX_STATUS_HEADROOM !=
+			sizeof(struct ieee80211_tx_status_rtap_hdr));
 	local->tx_headroom = max_t(unsigned int , local->hw.extra_tx_headroom,
 				   sizeof(struct ieee80211_tx_status_rtap_hdr));
 
--- linux-mvl-dove-2.6.32.orig/net/mac80211/ieee80211_i.h
+++ linux-mvl-dove-2.6.32/net/mac80211/ieee80211_i.h
@@ -264,6 +264,7 @@
 	IEEE80211_STA_DISABLE_11N	= BIT(4),
 	IEEE80211_STA_CSA_RECEIVED	= BIT(5),
 	IEEE80211_STA_MFP_ENABLED	= BIT(6),
+	IEEE80211_STA_NULLFUNC_ACKED	= BIT(7),
 };
 
 /* flags for MLME request */
@@ -808,6 +809,7 @@
 	unsigned int wmm_acm; /* bit field of ACM bits (BIT(802.1D tag)) */
 
 	bool pspolling;
+	bool scan_ps_enabled;
 	/*
 	 * PS can only be enabled when we have exactly one managed
 	 * interface (and monitors) in PS, this then points there.
--- linux-mvl-dove-2.6.32.orig/net/mac80211/agg-tx.c
+++ linux-mvl-dove-2.6.32/net/mac80211/agg-tx.c
@@ -177,10 +177,10 @@
 
 	/* check if the TID waits for addBA response */
 	spin_lock_bh(&sta->lock);
-	if ((*state & (HT_ADDBA_REQUESTED_MSK | HT_ADDBA_RECEIVED_MSK)) !=
+	if ((*state & (HT_ADDBA_REQUESTED_MSK | HT_ADDBA_RECEIVED_MSK |
+		       HT_AGG_STATE_REQ_STOP_BA_MSK)) !=
 						HT_ADDBA_REQUESTED_MSK) {
 		spin_unlock_bh(&sta->lock);
-		*state = HT_AGG_STATE_IDLE;
 #ifdef CONFIG_MAC80211_HT_DEBUG
 		printk(KERN_DEBUG "timer expired on tid %d but we are not "
 				"(or no longer) expecting addBA response there",
--- linux-mvl-dove-2.6.32.orig/net/mac80211/rx.c
+++ linux-mvl-dove-2.6.32/net/mac80211/rx.c
@@ -1220,7 +1220,8 @@
 		     (rx->key || rx->sdata->drop_unencrypted)))
 		return -EACCES;
 	if (rx->sta && test_sta_flags(rx->sta, WLAN_STA_MFP)) {
-		if (unlikely(ieee80211_is_unicast_robust_mgmt_frame(rx->skb) &&
+		if (unlikely(!ieee80211_has_protected(fc) &&
+			     ieee80211_is_unicast_robust_mgmt_frame(rx->skb) &&
 			     rx->key))
 			return -EACCES;
 		/* BIP does not use Protected field, so need to check MMIE */
@@ -1514,7 +1515,6 @@
 			mpp_path_add(mesh_hdr->eaddr2, hdr->addr4, sdata);
 		} else {
 			spin_lock_bh(&mppath->state_lock);
-			mppath->exp_time = jiffies;
 			if (compare_ether_addr(mppath->mpp, hdr->addr4) != 0)
 				memcpy(mppath->mpp, hdr->addr4, ETH_ALEN);
 			spin_unlock_bh(&mppath->state_lock);
@@ -1549,7 +1549,9 @@
 			memset(info, 0, sizeof(*info));
 			info->flags |= IEEE80211_TX_INTFL_NEED_TXPROCESSING;
 			info->control.vif = &rx->sdata->vif;
-			ieee80211_select_queue(local, fwd_skb);
+			skb_set_queue_mapping(skb,
+				ieee80211_select_queue(rx->sdata, fwd_skb));
+			ieee80211_set_qos_hdr(local, skb);
 			if (is_multicast_ether_addr(fwd_hdr->addr1))
 				IEEE80211_IFSTA_MESH_CTR_INC(&sdata->u.mesh,
 								fwded_mcast);
@@ -1589,6 +1591,7 @@
 ieee80211_rx_h_data(struct ieee80211_rx_data *rx)
 {
 	struct net_device *dev = rx->dev;
+	struct ieee80211_local *local = rx->local;
 	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)rx->skb->data;
 	__le16 fc = hdr->frame_control;
 	int err;
@@ -1611,6 +1614,13 @@
 	dev->stats.rx_packets++;
 	dev->stats.rx_bytes += rx->skb->len;
 
+	if (ieee80211_is_data(hdr->frame_control) &&
+	    !is_multicast_ether_addr(hdr->addr1) &&
+	    local->hw.conf.dynamic_ps_timeout > 0 && local->ps_sdata) {
+		mod_timer(&local->dynamic_ps_timer, jiffies +
+			  msecs_to_jiffies(local->hw.conf.dynamic_ps_timeout));
+	}
+
 	ieee80211_deliver_skb(rx);
 
 	return RX_QUEUED;
@@ -1808,7 +1818,16 @@
 			return RX_CONTINUE;
 		}
 		break;
+	case WLAN_CATEGORY_MESH_PLINK:
+	case WLAN_CATEGORY_MESH_PATH_SEL:
+		if (ieee80211_vif_is_mesh(&sdata->vif))
+			return ieee80211_mesh_rx_mgmt(sdata, rx->skb);
+		break;
 	default:
+		/* do not process rejected action frames */
+		if (mgmt->u.action.category & 0x80)
+			return RX_DROP_MONITOR;
+
 		return RX_CONTINUE;
 	}
 
--- linux-mvl-dove-2.6.32.orig/net/mac80211/sta_info.c
+++ linux-mvl-dove-2.6.32/net/mac80211/sta_info.c
@@ -276,6 +276,7 @@
 	memcpy(sta->sta.addr, addr, ETH_ALEN);
 	sta->local = local;
 	sta->sdata = sdata;
+	sta->last_rx = jiffies;
 
 	sta->rate_ctrl = rate_control_get(local->rate_ctrl);
 	sta->rate_ctrl_priv = rate_control_alloc_sta(sta->rate_ctrl,
--- linux-mvl-dove-2.6.32.orig/net/mac80211/mesh.h
+++ linux-mvl-dove-2.6.32/net/mac80211/mesh.h
@@ -186,8 +186,9 @@
  */
 #define MESH_PREQ_MIN_INT	10
 #define MESH_DIAM_TRAVERSAL_TIME 50
-/* Paths will be refreshed if they are closer than PATH_REFRESH_TIME to their
- * expiration
+/* A path will be refreshed if it is used PATH_REFRESH_TIME milliseconds before
+ * timing out.  This way it will remain ACTIVE and no data frames will be
+ * unnecesarily held in the pending queue.
  */
 #define MESH_PATH_REFRESH_TIME			1000
 #define MESH_MIN_DISCOVERY_TIMEOUT (2 * MESH_DIAM_TRAVERSAL_TIME)
--- linux-mvl-dove-2.6.32.orig/net/mac80211/util.c
+++ linux-mvl-dove-2.6.32/net/mac80211/util.c
@@ -269,6 +269,7 @@
 				   enum queue_stop_reason reason)
 {
 	struct ieee80211_local *local = hw_to_local(hw);
+	struct ieee80211_sub_if_data *sdata;
 
 	if (WARN_ON(queue >= hw->queues))
 		return;
@@ -279,7 +280,12 @@
 		/* someone still has this queue stopped */
 		return;
 
-	if (!skb_queue_empty(&local->pending[queue]))
+	if (skb_queue_empty(&local->pending[queue])) {
+		rcu_read_lock();
+		list_for_each_entry_rcu(sdata, &local->interfaces, list)
+			netif_tx_wake_queue(netdev_get_tx_queue(sdata->dev, queue));
+		rcu_read_unlock();
+	} else
 		tasklet_schedule(&local->tx_pending_tasklet);
 }
 
@@ -305,11 +311,17 @@
 				   enum queue_stop_reason reason)
 {
 	struct ieee80211_local *local = hw_to_local(hw);
+	struct ieee80211_sub_if_data *sdata;
 
 	if (WARN_ON(queue >= hw->queues))
 		return;
 
 	__set_bit(reason, &local->queue_stop_reasons[queue]);
+
+	rcu_read_lock();
+	list_for_each_entry_rcu(sdata, &local->interfaces, list)
+		netif_tx_stop_queue(netdev_get_tx_queue(sdata->dev, queue));
+	rcu_read_unlock();
 }
 
 void ieee80211_stop_queue_by_reason(struct ieee80211_hw *hw, int queue,
@@ -579,7 +591,7 @@
 		if (elen > left)
 			break;
 
-		if (calc_crc && id < 64 && (filter & BIT(id)))
+		if (calc_crc && id < 64 && (filter & (1ULL << id)))
 			crc = crc32_be(crc, pos - 2, elen + 2);
 
 		switch (id) {
@@ -1031,7 +1043,19 @@
 
 	/* restart hardware */
 	if (local->open_count) {
+		/*
+		 * Upon resume hardware can sometimes be goofy due to
+		 * various platform / driver / bus issues, so restarting
+		 * the device may at times not work immediately. Propagate
+		 * the error.
+		 */
 		res = drv_start(local);
+		if (res) {
+			WARN(local->suspended, "Harware became unavailable "
+			     "upon resume. This is could be a software issue"
+			     "prior to suspend or a harware issue\n");
+			return res;
+		}
 
 		ieee80211_led_radio(local, true);
 	}
@@ -1113,6 +1137,14 @@
 		}
 	}
 
+	rcu_read_lock();
+	if (hw->flags & IEEE80211_HW_AMPDU_AGGREGATION) {
+		list_for_each_entry_rcu(sta, &local->sta_list, list) {
+			ieee80211_sta_tear_down_BA_sessions(sta);
+		}
+	}
+	rcu_read_unlock();
+
 	/* add back keys */
 	list_for_each_entry(sdata, &local->interfaces, list)
 		if (netif_running(sdata->dev))
--- linux-mvl-dove-2.6.32.orig/net/mac80211/tx.c
+++ linux-mvl-dove-2.6.32/net/mac80211/tx.c
@@ -496,7 +496,8 @@
 	struct ieee80211_hdr *hdr = (void *)tx->skb->data;
 	struct ieee80211_supported_band *sband;
 	struct ieee80211_rate *rate;
-	int i, len;
+	int i;
+	u32 len;
 	bool inval = false, rts = false, short_preamble = false;
 	struct ieee80211_tx_rate_control txrc;
 	u32 sta_flags;
@@ -505,7 +506,7 @@
 
 	sband = tx->local->hw.wiphy->bands[tx->channel->band];
 
-	len = min_t(int, tx->skb->len + FCS_LEN,
+	len = min_t(u32, tx->skb->len + FCS_LEN,
 			 tx->local->hw.wiphy->frag_threshold);
 
 	/* set up the tx rate control struct we give the RC algo */
@@ -1401,6 +1402,7 @@
 
 	if ((local->hw.flags & IEEE80211_HW_PS_NULLFUNC_STACK) &&
 	    local->hw.conf.dynamic_ps_timeout > 0 &&
+	    !local->quiescing &&
 	    !(local->scanning) && local->ps_sdata) {
 		if (local->hw.conf.flags & IEEE80211_CONF_PS) {
 			ieee80211_stop_queues_by_reason(&local->hw,
@@ -1481,7 +1483,7 @@
 				return;
 			}
 
-	ieee80211_select_queue(local, skb);
+	ieee80211_set_qos_hdr(local, skb);
 	ieee80211_tx(sdata, skb, false);
 	dev_put(sdata->dev);
 }
@@ -1880,6 +1882,7 @@
 void ieee80211_tx_pending(unsigned long data)
 {
 	struct ieee80211_local *local = (struct ieee80211_local *)data;
+	struct ieee80211_sub_if_data *sdata;
 	unsigned long flags;
 	int i;
 	bool txok;
@@ -1920,6 +1923,11 @@
 			if (!txok)
 				break;
 		}
+
+		if (skb_queue_empty(&local->pending[i]))
+			list_for_each_entry_rcu(sdata, &local->interfaces, list)
+				netif_tx_wake_queue(
+					netdev_get_tx_queue(sdata->dev, i));
 	}
 	spin_unlock_irqrestore(&local->queue_stop_reason_lock, flags);
 
@@ -2225,6 +2233,9 @@
 	if (!encrypt)
 		info->flags |= IEEE80211_TX_INTFL_DONT_ENCRYPT;
 
+	/* send all internal mgmt frames on VO */
+	skb_set_queue_mapping(skb, 0);
+
 	/*
 	 * The other path calling ieee80211_xmit is from the tasklet,
 	 * and while we can handle concurrent transmissions locking
--- linux-mvl-dove-2.6.32.orig/net/mac80211/scan.c
+++ linux-mvl-dove-2.6.32/net/mac80211/scan.c
@@ -62,7 +62,7 @@
 			  bool beacon)
 {
 	struct ieee80211_bss *bss;
-	int clen;
+	int clen, srlen;
 	s32 signal = 0;
 
 	if (local->hw.flags & IEEE80211_HW_SIGNAL_DBM)
@@ -94,23 +94,24 @@
 	if (bss->dtim_period == 0)
 		bss->dtim_period = 1;
 
-	bss->supp_rates_len = 0;
+	/* replace old supported rates if we get new values */
+	srlen = 0;
 	if (elems->supp_rates) {
-		clen = IEEE80211_MAX_SUPP_RATES - bss->supp_rates_len;
+		clen = IEEE80211_MAX_SUPP_RATES;
 		if (clen > elems->supp_rates_len)
 			clen = elems->supp_rates_len;
-		memcpy(&bss->supp_rates[bss->supp_rates_len], elems->supp_rates,
-		       clen);
-		bss->supp_rates_len += clen;
+		memcpy(bss->supp_rates, elems->supp_rates, clen);
+		srlen += clen;
 	}
 	if (elems->ext_supp_rates) {
-		clen = IEEE80211_MAX_SUPP_RATES - bss->supp_rates_len;
+		clen = IEEE80211_MAX_SUPP_RATES - srlen;
 		if (clen > elems->ext_supp_rates_len)
 			clen = elems->ext_supp_rates_len;
-		memcpy(&bss->supp_rates[bss->supp_rates_len],
-		       elems->ext_supp_rates, clen);
-		bss->supp_rates_len += clen;
+		memcpy(bss->supp_rates + srlen, elems->ext_supp_rates, clen);
+		srlen += clen;
 	}
+	if (srlen)
+		bss->supp_rates_len = srlen;
 
 	bss->wmm_used = elems->wmm_param || elems->wmm_info;
 
@@ -196,7 +197,8 @@
 static void ieee80211_scan_ps_enable(struct ieee80211_sub_if_data *sdata)
 {
 	struct ieee80211_local *local = sdata->local;
-	bool ps = false;
+
+	local->scan_ps_enabled = false;
 
 	/* FIXME: what to do when local->pspolling is true? */
 
@@ -204,12 +206,13 @@
 	cancel_work_sync(&local->dynamic_ps_enable_work);
 
 	if (local->hw.conf.flags & IEEE80211_CONF_PS) {
-		ps = true;
+		local->scan_ps_enabled = true;
 		local->hw.conf.flags &= ~IEEE80211_CONF_PS;
 		ieee80211_hw_config(local, IEEE80211_CONF_CHANGE_PS);
 	}
 
-	if (!ps || !(local->hw.flags & IEEE80211_HW_PS_NULLFUNC_STACK))
+	if (!(local->scan_ps_enabled) ||
+	    !(local->hw.flags & IEEE80211_HW_PS_NULLFUNC_STACK))
 		/*
 		 * If power save was enabled, no need to send a nullfunc
 		 * frame because AP knows that we are sleeping. But if the
@@ -230,7 +233,7 @@
 
 	if (!local->ps_sdata)
 		ieee80211_send_nullfunc(local, sdata, 0);
-	else {
+	else if (local->scan_ps_enabled) {
 		/*
 		 * In !IEEE80211_HW_PS_NULLFUNC_STACK case the hardware
 		 * will send a nullfunc frame with the powersave bit set
@@ -246,6 +249,16 @@
 		 */
 		local->hw.conf.flags |= IEEE80211_CONF_PS;
 		ieee80211_hw_config(local, IEEE80211_CONF_CHANGE_PS);
+	} else if (local->hw.conf.dynamic_ps_timeout > 0) {
+		/*
+		 * If IEEE80211_CONF_PS was not set and the dynamic_ps_timer
+		 * had been running before leaving the operating channel,
+		 * restart the timer now and send a nullfunc frame to inform
+		 * the AP that we are awake.
+		 */
+		ieee80211_send_nullfunc(local, sdata, 0);
+		mod_timer(&local->dynamic_ps_timer, jiffies +
+			  msecs_to_jiffies(local->hw.conf.dynamic_ps_timeout));
 	}
 }
 
@@ -264,10 +277,14 @@
 
 	mutex_lock(&local->scan_mtx);
 
-	if (WARN_ON(!local->scanning)) {
-		mutex_unlock(&local->scan_mtx);
-		return;
-	}
+	/*
+	 * It's ok to abort a not-yet-running scan (that
+	 * we have one at all will be verified by checking
+	 * local->scan_req next), but not to complete it
+	 * successfully.
+	 */
+	if (WARN_ON(!local->scanning && !aborted))
+		aborted = true;
 
 	if (WARN_ON(!local->scan_req)) {
 		mutex_unlock(&local->scan_mtx);
@@ -392,6 +409,16 @@
 	if (local->scan_req)
 		return -EBUSY;
 
+	if (req != local->int_scan_req &&
+	    sdata->vif.type == NL80211_IFTYPE_STATION &&
+	    !list_empty(&ifmgd->work_list)) {
+		/* actually wait for the work it's doing to finish/time out */
+		set_bit(IEEE80211_STA_REQ_SCAN, &ifmgd->request);
+		local->scan_req = req;
+		local->scan_sdata = sdata;
+		return 0;
+	}
+
 	if (local->ops->hw_scan) {
 		u8 *ies;
 		int ielen;
@@ -412,14 +439,6 @@
 	local->scan_req = req;
 	local->scan_sdata = sdata;
 
-	if (req != local->int_scan_req &&
-	    sdata->vif.type == NL80211_IFTYPE_STATION &&
-	    !list_empty(&ifmgd->work_list)) {
-		/* actually wait for the work it's doing to finish/time out */
-		set_bit(IEEE80211_STA_REQ_SCAN, &ifmgd->request);
-		return 0;
-	}
-
 	if (local->ops->hw_scan)
 		__set_bit(SCAN_HW_SCANNING, &local->scanning);
 	else
--- linux-mvl-dove-2.6.32.orig/net/mac80211/cfg.c
+++ linux-mvl-dove-2.6.32/net/mac80211/cfg.c
@@ -338,7 +338,8 @@
 	sinfo->rx_packets = sta->rx_packets;
 	sinfo->tx_packets = sta->tx_packets;
 
-	if (sta->local->hw.flags & IEEE80211_HW_SIGNAL_DBM) {
+	if ((sta->local->hw.flags & IEEE80211_HW_SIGNAL_DBM) ||
+	    (sta->local->hw.flags & IEEE80211_HW_SIGNAL_UNSPEC)) {
 		sinfo->filled |= STATION_INFO_SIGNAL;
 		sinfo->signal = (s8)sta->last_signal;
 	}
@@ -1305,6 +1306,9 @@
 	struct ieee80211_local *local = wdev_priv(dev->ieee80211_ptr);
 	struct ieee80211_conf *conf = &local->hw.conf;
 
+	if (sdata->vif.type != NL80211_IFTYPE_STATION)
+		return -EOPNOTSUPP;
+
 	if (!(local->hw.flags & IEEE80211_HW_SUPPORTS_PS))
 		return -EOPNOTSUPP;
 
--- linux-mvl-dove-2.6.32.orig/net/mac80211/driver-trace.h
+++ linux-mvl-dove-2.6.32/net/mac80211/driver-trace.h
@@ -655,7 +655,7 @@
 		__entry->ret = ret;
 		__entry->action = action;
 		__entry->tid = tid;
-		__entry->ssn = *ssn;
+		__entry->ssn = ssn ? *ssn : 0;
 	),
 
 	TP_printk(
--- linux-mvl-dove-2.6.32.orig/net/mac80211/wme.c
+++ linux-mvl-dove-2.6.32/net/mac80211/wme.c
@@ -44,22 +44,62 @@
 }
 
 
-/* Indicate which queue to use.  */
-static u16 classify80211(struct ieee80211_local *local, struct sk_buff *skb)
+/* Indicate which queue to use. */
+u16 ieee80211_select_queue(struct ieee80211_sub_if_data *sdata,
+			   struct sk_buff *skb)
 {
-	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
+	struct ieee80211_local *local = sdata->local;
+	struct sta_info *sta = NULL;
+	u32 sta_flags = 0;
+	const u8 *ra = NULL;
+	bool qos = false;
 
-	if (!ieee80211_is_data(hdr->frame_control)) {
-		/* management frames go on AC_VO queue, but are sent
-		* without QoS control fields */
-		return 0;
+	if (local->hw.queues < 4 || skb->len < 6) {
+		skb->priority = 0; /* required for correct WPA/11i MIC */
+		return min_t(u16, local->hw.queues - 1,
+			     ieee802_1d_to_ac[skb->priority]);
+	}
+
+	rcu_read_lock();
+	switch (sdata->vif.type) {
+	case NL80211_IFTYPE_AP_VLAN:
+	case NL80211_IFTYPE_AP:
+		ra = skb->data;
+		break;
+	case NL80211_IFTYPE_WDS:
+		ra = sdata->u.wds.remote_addr;
+		break;
+#ifdef CONFIG_MAC80211_MESH
+	case NL80211_IFTYPE_MESH_POINT:
+		/*
+		 * XXX: This is clearly broken ... but already was before,
+		 * because ieee80211_fill_mesh_addresses() would clear A1
+		 * except for multicast addresses.
+		 */
+		break;
+#endif
+	case NL80211_IFTYPE_STATION:
+		ra = sdata->u.mgd.bssid;
+		break;
+	case NL80211_IFTYPE_ADHOC:
+		ra = skb->data;
+		break;
+	default:
+		break;
 	}
 
-	if (0 /* injected */) {
-		/* use AC from radiotap */
+	if (!sta && ra && !is_multicast_ether_addr(ra)) {
+		sta = sta_info_get(local, ra);
+		if (sta)
+			sta_flags = get_sta_flags(sta);
 	}
 
-	if (!ieee80211_is_data_qos(hdr->frame_control)) {
+	if (sta_flags & WLAN_STA_WME)
+		qos = true;
+
+	rcu_read_unlock();
+
+	if (!qos) {
 		skb->priority = 0; /* required for correct WPA/11i MIC */
 		return ieee802_1d_to_ac[skb->priority];
 	}
@@ -68,6 +108,12 @@
 	 * data frame has */
 	skb->priority = cfg80211_classify8021d(skb);
 
+	return ieee80211_downgrade_queue(local, skb);
+}
+
+u16 ieee80211_downgrade_queue(struct ieee80211_local *local,
+			      struct sk_buff *skb)
+{
 	/* in case we are a client verify acm is not set for this ac */
 	while (unlikely(local->wmm_acm & BIT(skb->priority))) {
 		if (wme_downgrade_ac(skb)) {
@@ -85,24 +131,17 @@
 	return ieee802_1d_to_ac[skb->priority];
 }
 
-void ieee80211_select_queue(struct ieee80211_local *local, struct sk_buff *skb)
+void ieee80211_set_qos_hdr(struct ieee80211_local *local, struct sk_buff *skb)
 {
-	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
-	u16 queue;
-	u8 tid;
-
-	queue = classify80211(local, skb);
-	if (unlikely(queue >= local->hw.queues))
-		queue = local->hw.queues - 1;
-
-	/*
-	 * Now we know the 1d priority, fill in the QoS header if
-	 * there is one (and we haven't done this before).
-	 */
+	struct ieee80211_hdr *hdr = (void *)skb->data;
+
+	/* Fill in the QoS header if there is one. */
 	if (ieee80211_is_data_qos(hdr->frame_control)) {
 		u8 *p = ieee80211_get_qos_ctl(hdr);
-		u8 ack_policy = 0;
+		u8 ack_policy = 0, tid;
+
 		tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
+
 		if (unlikely(local->wifi_wme_noack_test))
 			ack_policy |= QOS_CONTROL_ACK_POLICY_NOACK <<
 					QOS_CONTROL_ACK_POLICY_SHIFT;
@@ -110,6 +149,4 @@
 		*p++ = ack_policy | tid;
 		*p = 0;
 	}
-
-	skb_set_queue_mapping(skb, queue);
 }
--- linux-mvl-dove-2.6.32.orig/net/unix/garbage.c
+++ linux-mvl-dove-2.6.32/net/unix/garbage.c
@@ -97,7 +97,7 @@
 unsigned int unix_tot_inflight;
 
 
-static struct sock *unix_get_socket(struct file *filp)
+struct sock *unix_get_socket(struct file *filp)
 {
 	struct sock *u_sock = NULL;
 	struct inode *inode = filp->f_path.dentry->d_inode;
@@ -269,9 +269,16 @@
 }
 
 static bool gc_in_progress = false;
+#define UNIX_INFLIGHT_TRIGGER_GC 16000
 
 void wait_for_unix_gc(void)
 {
+	/*
+	 * If number of inflight sockets is insane,
+	 * force a garbage collect right now.
+	 */
+	if (unix_tot_inflight > UNIX_INFLIGHT_TRIGGER_GC && !gc_in_progress)
+		unix_gc();
 	wait_event(unix_gc_wait, gc_in_progress == false);
 }
 
--- linux-mvl-dove-2.6.32.orig/net/unix/af_unix.c
+++ linux-mvl-dove-2.6.32/net/unix/af_unix.c
@@ -671,6 +671,7 @@
 	static u32 ordernum = 1;
 	struct unix_address *addr;
 	int err;
+	unsigned int retries = 0;
 
 	mutex_lock(&u->readlock);
 
@@ -696,9 +697,17 @@
 	if (__unix_find_socket_byname(net, addr->name, addr->len, sock->type,
 				      addr->hash)) {
 		spin_unlock(&unix_table_lock);
-		/* Sanity yield. It is unusual case, but yet... */
-		if (!(ordernum&0xFF))
-			yield();
+		/*
+		 * __unix_find_socket_byname() may take long time if many names
+		 * are already in use.
+		 */
+		cond_resched();
+		/* Give up if all names seems to be in use. */
+		if (retries++ == 0xFFFFF) {
+			err = -ENOSPC;
+			kfree(addr);
+			goto out;
+		}
 		goto retry;
 	}
 	addr->hash ^= sk->sk_type;
@@ -1314,9 +1323,25 @@
 	sock_wfree(skb);
 }
 
+#define MAX_RECURSION_LEVEL 4
+
 static int unix_attach_fds(struct scm_cookie *scm, struct sk_buff *skb)
 {
 	int i;
+	unsigned char max_level = 0;
+	int unix_sock_count = 0;
+
+	for (i = scm->fp->count - 1; i >= 0; i--) {
+		struct sock *sk = unix_get_socket(scm->fp->fp[i]);
+
+		if (sk) {
+			unix_sock_count++;
+			max_level = max(max_level,
+					unix_sk(sk)->recursion_level);
+		}
+	}
+	if (unlikely(max_level > MAX_RECURSION_LEVEL))
+		return -ETOOMANYREFS;
 
 	/*
 	 * Need to duplicate file references for the sake of garbage
@@ -1327,10 +1352,12 @@
 	if (!UNIXCB(skb).fp)
 		return -ENOMEM;
 
-	for (i = scm->fp->count-1; i >= 0; i--)
-		unix_inflight(scm->fp->fp[i]);
+	if (unix_sock_count) {
+		for (i = scm->fp->count - 1; i >= 0; i--)
+			unix_inflight(scm->fp->fp[i]);
+	}
 	skb->destructor = unix_destruct_fds;
-	return 0;
+	return max_level;
 }
 
 /*
@@ -1352,6 +1379,7 @@
 	struct sk_buff *skb;
 	long timeo;
 	struct scm_cookie tmp_scm;
+	int max_level = 0;
 
 	if (NULL == siocb->scm)
 		siocb->scm = &tmp_scm;
@@ -1392,8 +1420,9 @@
 	memcpy(UNIXCREDS(skb), &siocb->scm->creds, sizeof(struct ucred));
 	if (siocb->scm->fp) {
 		err = unix_attach_fds(siocb->scm, skb);
-		if (err)
+		if (err < 0)
 			goto out_free;
+		max_level = err + 1;
 	}
 	unix_get_secdata(siocb->scm, skb);
 
@@ -1474,6 +1503,8 @@
 	}
 
 	skb_queue_tail(&other->sk_receive_queue, skb);
+	if (max_level > unix_sk(other)->recursion_level)
+		unix_sk(other)->recursion_level = max_level;
 	unix_state_unlock(other);
 	other->sk_data_ready(other, len);
 	sock_put(other);
@@ -1504,6 +1535,7 @@
 	int sent = 0;
 	struct scm_cookie tmp_scm;
 	bool fds_sent = false;
+	int max_level = 0;
 
 	if (NULL == siocb->scm)
 		siocb->scm = &tmp_scm;
@@ -1568,10 +1600,11 @@
 		/* Only send the fds in the first buffer */
 		if (siocb->scm->fp && !fds_sent) {
 			err = unix_attach_fds(siocb->scm, skb);
-			if (err) {
+			if (err < 0) {
 				kfree_skb(skb);
 				goto out_err;
 			}
+			max_level = err + 1;
 			fds_sent = true;
 		}
 
@@ -1588,6 +1621,8 @@
 			goto pipe_err_free;
 
 		skb_queue_tail(&other->sk_receive_queue, skb);
+		if (max_level > unix_sk(other)->recursion_level)
+			unix_sk(other)->recursion_level = max_level;
 		unix_state_unlock(other);
 		other->sk_data_ready(other, size);
 		sent += size;
@@ -1804,6 +1839,7 @@
 		unix_state_lock(sk);
 		skb = skb_dequeue(&sk->sk_receive_queue);
 		if (skb == NULL) {
+			unix_sk(sk)->recursion_level = 0;
 			if (copied >= target)
 				goto unlock;
 
--- linux-mvl-dove-2.6.32.orig/net/rfkill/rfkill.c
+++ linux-mvl-dove-2.6.32/net/rfkill/rfkill.c
@@ -0,0 +1,882 @@
+/*
+ * Copyright (C) 2006 - 2007 Ivo van Doorn
+ * Copyright (C) 2007 Dmitry Torokhov
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the
+ * Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/workqueue.h>
+#include <linux/capability.h>
+#include <linux/list.h>
+#include <linux/mutex.h>
+#include <linux/rfkill.h>
+
+/* Get declaration of rfkill_switch_all() to shut up sparse. */
+#include "rfkill-input.h"
+
+
+MODULE_AUTHOR("Ivo van Doorn <IvDoorn@gmail.com>");
+MODULE_VERSION("1.0");
+MODULE_DESCRIPTION("RF switch support");
+MODULE_LICENSE("GPL");
+
+static LIST_HEAD(rfkill_list);	/* list of registered rf switches */
+static DEFINE_MUTEX(rfkill_global_mutex);
+
+static unsigned int rfkill_default_state = RFKILL_STATE_UNBLOCKED;
+module_param_named(default_state, rfkill_default_state, uint, 0444);
+MODULE_PARM_DESC(default_state,
+		 "Default initial state for all radio types, 0 = radio off");
+
+struct rfkill_gsw_state {
+	enum rfkill_state current_state;
+	enum rfkill_state default_state;
+};
+
+static struct rfkill_gsw_state rfkill_global_states[RFKILL_TYPE_MAX];
+static unsigned long rfkill_states_lockdflt[BITS_TO_LONGS(RFKILL_TYPE_MAX)];
+static bool rfkill_epo_lock_active;
+
+
+#ifdef CONFIG_RFKILL_LEDS
+static void rfkill_led_trigger(struct rfkill *rfkill,
+			       enum rfkill_state state)
+{
+	struct led_trigger *led = &rfkill->led_trigger;
+
+	if (!led->name)
+		return;
+	if (state != RFKILL_STATE_UNBLOCKED)
+		led_trigger_event(led, LED_OFF);
+	else
+		led_trigger_event(led, LED_FULL);
+}
+
+static void rfkill_led_trigger_activate(struct led_classdev *led)
+{
+	struct rfkill *rfkill = container_of(led->trigger,
+			struct rfkill, led_trigger);
+
+	rfkill_led_trigger(rfkill, rfkill->state);
+}
+#endif /* CONFIG_RFKILL_LEDS */
+
+static void rfkill_uevent(struct rfkill *rfkill)
+{
+	kobject_uevent(&rfkill->dev.kobj, KOBJ_CHANGE);
+}
+
+static void update_rfkill_state(struct rfkill *rfkill)
+{
+	enum rfkill_state newstate, oldstate;
+
+	if (rfkill->get_state) {
+		mutex_lock(&rfkill->mutex);
+		if (!rfkill->get_state(rfkill->data, &newstate)) {
+			oldstate = rfkill->state;
+			rfkill->state = newstate;
+			if (oldstate != newstate)
+				rfkill_uevent(rfkill);
+		}
+		mutex_unlock(&rfkill->mutex);
+	}
+}
+
+/**
+ * rfkill_toggle_radio - wrapper for toggle_radio hook
+ * @rfkill: the rfkill struct to use
+ * @force: calls toggle_radio even if cache says it is not needed,
+ *	and also makes sure notifications of the state will be
+ *	sent even if it didn't change
+ * @state: the new state to call toggle_radio() with
+ *
+ * Calls rfkill->toggle_radio, enforcing the API for toggle_radio
+ * calls and handling all the red tape such as issuing notifications
+ * if the call is successful.
+ *
+ * Suspended devices are not touched at all, and -EAGAIN is returned.
+ *
+ * Note that the @force parameter cannot override a (possibly cached)
+ * state of RFKILL_STATE_HARD_BLOCKED.  Any device making use of
+ * RFKILL_STATE_HARD_BLOCKED implements either get_state() or
+ * rfkill_force_state(), so the cache either is bypassed or valid.
+ *
+ * Note that we do call toggle_radio for RFKILL_STATE_SOFT_BLOCKED
+ * even if the radio is in RFKILL_STATE_HARD_BLOCKED state, so as to
+ * give the driver a hint that it should double-BLOCK the transmitter.
+ *
+ * Caller must have acquired rfkill->mutex.
+ */
+static int rfkill_toggle_radio(struct rfkill *rfkill,
+				enum rfkill_state state,
+				int force)
+{
+	int retval = 0;
+	enum rfkill_state oldstate, newstate;
+
+	if (unlikely(rfkill->dev.power.power_state.event & PM_EVENT_SLEEP))
+		return -EBUSY;
+
+	oldstate = rfkill->state;
+
+	if (rfkill->get_state && !force &&
+	    !rfkill->get_state(rfkill->data, &newstate))
+		rfkill->state = newstate;
+
+	switch (state) {
+	case RFKILL_STATE_HARD_BLOCKED:
+		/* typically happens when refreshing hardware state,
+		 * such as on resume */
+		state = RFKILL_STATE_SOFT_BLOCKED;
+		break;
+	case RFKILL_STATE_UNBLOCKED:
+		/* force can't override this, only rfkill_force_state() can */
+		if (rfkill->state == RFKILL_STATE_HARD_BLOCKED)
+			return -EPERM;
+		break;
+	case RFKILL_STATE_SOFT_BLOCKED:
+		/* nothing to do, we want to give drivers the hint to double
+		 * BLOCK even a transmitter that is already in state
+		 * RFKILL_STATE_HARD_BLOCKED */
+		break;
+	default:
+		WARN(1, KERN_WARNING
+			"rfkill: illegal state %d passed as parameter "
+			"to rfkill_toggle_radio\n", state);
+		return -EINVAL;
+	}
+
+	if (force || state != rfkill->state) {
+		retval = rfkill->toggle_radio(rfkill->data, state);
+		/* never allow a HARD->SOFT downgrade! */
+		if (!retval && rfkill->state != RFKILL_STATE_HARD_BLOCKED)
+			rfkill->state = state;
+	}
+
+	if (force || rfkill->state != oldstate)
+		rfkill_uevent(rfkill);
+
+	return retval;
+}
+
+/**
+ * __rfkill_switch_all - Toggle state of all switches of given type
+ * @type: type of interfaces to be affected
+ * @state: the new state
+ *
+ * This function toggles the state of all switches of given type,
+ * unless a specific switch is claimed by userspace (in which case,
+ * that switch is left alone) or suspended.
+ *
+ * Caller must have acquired rfkill_global_mutex.
+ */
+static void __rfkill_switch_all(const enum rfkill_type type,
+				const enum rfkill_state state)
+{
+	struct rfkill *rfkill;
+
+	if (WARN((state >= RFKILL_STATE_MAX || type >= RFKILL_TYPE_MAX),
+			KERN_WARNING
+			"rfkill: illegal state %d or type %d "
+			"passed as parameter to __rfkill_switch_all\n",
+			state, type))
+		return;
+
+	rfkill_global_states[type].current_state = state;
+	list_for_each_entry(rfkill, &rfkill_list, node) {
+		if ((!rfkill->user_claim) && (rfkill->type == type)) {
+			mutex_lock(&rfkill->mutex);
+			rfkill_toggle_radio(rfkill, state, 0);
+			mutex_unlock(&rfkill->mutex);
+		}
+	}
+}
+
+/**
+ * rfkill_switch_all - Toggle state of all switches of given type
+ * @type: type of interfaces to be affected
+ * @state: the new state
+ *
+ * Acquires rfkill_global_mutex and calls __rfkill_switch_all(@type, @state).
+ * Please refer to __rfkill_switch_all() for details.
+ *
+ * Does nothing if the EPO lock is active.
+ */
+void rfkill_switch_all(enum rfkill_type type, enum rfkill_state state)
+{
+	mutex_lock(&rfkill_global_mutex);
+	if (!rfkill_epo_lock_active)
+		__rfkill_switch_all(type, state);
+	mutex_unlock(&rfkill_global_mutex);
+}
+EXPORT_SYMBOL(rfkill_switch_all);
+
+/**
+ * rfkill_epo - emergency power off all transmitters
+ *
+ * This kicks all non-suspended rfkill devices to RFKILL_STATE_SOFT_BLOCKED,
+ * ignoring everything in its path but rfkill_global_mutex and rfkill->mutex.
+ *
+ * The global state before the EPO is saved and can be restored later
+ * using rfkill_restore_states().
+ */
+void rfkill_epo(void)
+{
+	struct rfkill *rfkill;
+	int i;
+
+	mutex_lock(&rfkill_global_mutex);
+
+	rfkill_epo_lock_active = true;
+	list_for_each_entry(rfkill, &rfkill_list, node) {
+		mutex_lock(&rfkill->mutex);
+		rfkill_toggle_radio(rfkill, RFKILL_STATE_SOFT_BLOCKED, 1);
+		mutex_unlock(&rfkill->mutex);
+	}
+	for (i = 0; i < RFKILL_TYPE_MAX; i++) {
+		rfkill_global_states[i].default_state =
+				rfkill_global_states[i].current_state;
+		rfkill_global_states[i].current_state =
+				RFKILL_STATE_SOFT_BLOCKED;
+	}
+	mutex_unlock(&rfkill_global_mutex);
+}
+EXPORT_SYMBOL_GPL(rfkill_epo);
+
+/**
+ * rfkill_restore_states - restore global states
+ *
+ * Restore (and sync switches to) the global state from the
+ * states in rfkill_default_states.  This can undo the effects of
+ * a call to rfkill_epo().
+ */
+void rfkill_restore_states(void)
+{
+	int i;
+
+	mutex_lock(&rfkill_global_mutex);
+
+	rfkill_epo_lock_active = false;
+	for (i = 0; i < RFKILL_TYPE_MAX; i++)
+		__rfkill_switch_all(i, rfkill_global_states[i].default_state);
+	mutex_unlock(&rfkill_global_mutex);
+}
+EXPORT_SYMBOL_GPL(rfkill_restore_states);
+
+/**
+ * rfkill_remove_epo_lock - unlock state changes
+ *
+ * Used by rfkill-input manually unlock state changes, when
+ * the EPO switch is deactivated.
+ */
+void rfkill_remove_epo_lock(void)
+{
+	mutex_lock(&rfkill_global_mutex);
+	rfkill_epo_lock_active = false;
+	mutex_unlock(&rfkill_global_mutex);
+}
+EXPORT_SYMBOL_GPL(rfkill_remove_epo_lock);
+
+/**
+ * rfkill_is_epo_lock_active - returns true EPO is active
+ *
+ * Returns 0 (false) if there is NOT an active EPO contidion,
+ * and 1 (true) if there is an active EPO contition, which
+ * locks all radios in one of the BLOCKED states.
+ *
+ * Can be called in atomic context.
+ */
+bool rfkill_is_epo_lock_active(void)
+{
+	return rfkill_epo_lock_active;
+}
+EXPORT_SYMBOL_GPL(rfkill_is_epo_lock_active);
+
+/**
+ * rfkill_get_global_state - returns global state for a type
+ * @type: the type to get the global state of
+ *
+ * Returns the current global state for a given wireless
+ * device type.
+ */
+enum rfkill_state rfkill_get_global_state(const enum rfkill_type type)
+{
+	return rfkill_global_states[type].current_state;
+}
+EXPORT_SYMBOL_GPL(rfkill_get_global_state);
+
+/**
+ * rfkill_force_state - Force the internal rfkill radio state
+ * @rfkill: pointer to the rfkill class to modify.
+ * @state: the current radio state the class should be forced to.
+ *
+ * This function updates the internal state of the radio cached
+ * by the rfkill class.  It should be used when the driver gets
+ * a notification by the firmware/hardware of the current *real*
+ * state of the radio rfkill switch.
+ *
+ * Devices which are subject to external changes on their rfkill
+ * state (such as those caused by a hardware rfkill line) MUST
+ * have their driver arrange to call rfkill_force_state() as soon
+ * as possible after such a change.
+ *
+ * This function may not be called from an atomic context.
+ */
+int rfkill_force_state(struct rfkill *rfkill, enum rfkill_state state)
+{
+	enum rfkill_state oldstate;
+
+	BUG_ON(!rfkill);
+	if (WARN((state >= RFKILL_STATE_MAX),
+			KERN_WARNING
+			"rfkill: illegal state %d passed as parameter "
+			"to rfkill_force_state\n", state))
+		return -EINVAL;
+
+	mutex_lock(&rfkill->mutex);
+
+	oldstate = rfkill->state;
+	rfkill->state = state;
+
+	if (state != oldstate)
+		rfkill_uevent(rfkill);
+
+	mutex_unlock(&rfkill->mutex);
+
+	return 0;
+}
+EXPORT_SYMBOL(rfkill_force_state);
+
+static ssize_t rfkill_name_show(struct device *dev,
+				struct device_attribute *attr,
+				char *buf)
+{
+	struct rfkill *rfkill = to_rfkill(dev);
+
+	return sprintf(buf, "%s\n", rfkill->name);
+}
+
+static const char *rfkill_get_type_str(enum rfkill_type type)
+{
+	switch (type) {
+	case RFKILL_TYPE_WLAN:
+		return "wlan";
+	case RFKILL_TYPE_BLUETOOTH:
+		return "bluetooth";
+	case RFKILL_TYPE_UWB:
+		return "ultrawideband";
+	case RFKILL_TYPE_WIMAX:
+		return "wimax";
+	case RFKILL_TYPE_WWAN:
+		return "wwan";
+	default:
+		BUG();
+	}
+}
+
+static ssize_t rfkill_type_show(struct device *dev,
+				struct device_attribute *attr,
+				char *buf)
+{
+	struct rfkill *rfkill = to_rfkill(dev);
+
+	return sprintf(buf, "%s\n", rfkill_get_type_str(rfkill->type));
+}
+
+static ssize_t rfkill_state_show(struct device *dev,
+				 struct device_attribute *attr,
+				 char *buf)
+{
+	struct rfkill *rfkill = to_rfkill(dev);
+
+	update_rfkill_state(rfkill);
+	return sprintf(buf, "%d\n", rfkill->state);
+}
+
+static ssize_t rfkill_state_store(struct device *dev,
+				  struct device_attribute *attr,
+				  const char *buf, size_t count)
+{
+	struct rfkill *rfkill = to_rfkill(dev);
+	unsigned long state;
+	int error;
+
+	if (!capable(CAP_NET_ADMIN))
+		return -EPERM;
+
+	error = strict_strtoul(buf, 0, &state);
+	if (error)
+		return error;
+
+	/* RFKILL_STATE_HARD_BLOCKED is illegal here... */
+	if (state != RFKILL_STATE_UNBLOCKED &&
+	    state != RFKILL_STATE_SOFT_BLOCKED)
+		return -EINVAL;
+
+	error = mutex_lock_killable(&rfkill->mutex);
+	if (error)
+		return error;
+
+	if (!rfkill_epo_lock_active)
+		error = rfkill_toggle_radio(rfkill, state, 0);
+	else
+		error = -EPERM;
+
+	mutex_unlock(&rfkill->mutex);
+
+	return error ? error : count;
+}
+
+static ssize_t rfkill_claim_show(struct device *dev,
+				 struct device_attribute *attr,
+				 char *buf)
+{
+	struct rfkill *rfkill = to_rfkill(dev);
+
+	return sprintf(buf, "%d\n", rfkill->user_claim);
+}
+
+static ssize_t rfkill_claim_store(struct device *dev,
+				  struct device_attribute *attr,
+				  const char *buf, size_t count)
+{
+	struct rfkill *rfkill = to_rfkill(dev);
+	unsigned long claim_tmp;
+	bool claim;
+	int error;
+
+	if (!capable(CAP_NET_ADMIN))
+		return -EPERM;
+
+	if (rfkill->user_claim_unsupported)
+		return -EOPNOTSUPP;
+
+	error = strict_strtoul(buf, 0, &claim_tmp);
+	if (error)
+		return error;
+	claim = !!claim_tmp;
+
+	/*
+	 * Take the global lock to make sure the kernel is not in
+	 * the middle of rfkill_switch_all
+	 */
+	error = mutex_lock_killable(&rfkill_global_mutex);
+	if (error)
+		return error;
+
+	if (rfkill->user_claim != claim) {
+		if (!claim && !rfkill_epo_lock_active) {
+			mutex_lock(&rfkill->mutex);
+			rfkill_toggle_radio(rfkill,
+					rfkill_global_states[rfkill->type].current_state,
+					0);
+			mutex_unlock(&rfkill->mutex);
+		}
+		rfkill->user_claim = claim;
+	}
+
+	mutex_unlock(&rfkill_global_mutex);
+
+	return error ? error : count;
+}
+
+static struct device_attribute rfkill_dev_attrs[] = {
+	__ATTR(name, S_IRUGO, rfkill_name_show, NULL),
+	__ATTR(type, S_IRUGO, rfkill_type_show, NULL),
+	__ATTR(state, S_IRUGO|S_IWUSR, rfkill_state_show, rfkill_state_store),
+	__ATTR(claim, S_IRUGO|S_IWUSR, rfkill_claim_show, rfkill_claim_store),
+	__ATTR_NULL
+};
+
+static void rfkill_release(struct device *dev)
+{
+	struct rfkill *rfkill = to_rfkill(dev);
+
+	kfree(rfkill);
+	module_put(THIS_MODULE);
+}
+
+#ifdef CONFIG_RFKILL_PM
+static int rfkill_suspend(struct device *dev, pm_message_t state)
+{
+	struct rfkill *rfkill = to_rfkill(dev);
+
+	/* mark class device as suspended */
+	if (dev->power.power_state.event != state.event)
+		dev->power.power_state = state;
+
+	/* store state for the resume handler */
+	rfkill->state_for_resume = rfkill->state;
+
+	return 0;
+}
+
+static int rfkill_resume(struct device *dev)
+{
+	struct rfkill *rfkill = to_rfkill(dev);
+	enum rfkill_state newstate;
+
+	if (dev->power.power_state.event != PM_EVENT_ON) {
+		mutex_lock(&rfkill->mutex);
+
+		dev->power.power_state.event = PM_EVENT_ON;
+
+		/*
+		 * rfkill->state could have been modified before we got
+		 * called, and won't be updated by rfkill_toggle_radio()
+		 * in force mode.  Sync it FIRST.
+		 */
+		if (rfkill->get_state &&
+		    !rfkill->get_state(rfkill->data, &newstate))
+			rfkill->state = newstate;
+
+		/*
+		 * If we are under EPO, kick transmitter offline,
+		 * otherwise restore to pre-suspend state.
+		 *
+		 * Issue a notification in any case
+		 */
+		rfkill_toggle_radio(rfkill,
+				rfkill_epo_lock_active ?
+					RFKILL_STATE_SOFT_BLOCKED :
+					rfkill->state_for_resume,
+				1);
+
+		mutex_unlock(&rfkill->mutex);
+	}
+
+	return 0;
+}
+#else
+#define rfkill_suspend NULL
+#define rfkill_resume NULL
+#endif
+
+static int rfkill_dev_uevent(struct device *dev, struct kobj_uevent_env *env)
+{
+	struct rfkill *rfkill = to_rfkill(dev);
+	int error;
+
+	error = add_uevent_var(env, "RFKILL_NAME=%s", rfkill->name);
+	if (error)
+		return error;
+	error = add_uevent_var(env, "RFKILL_TYPE=%s",
+				rfkill_get_type_str(rfkill->type));
+	if (error)
+		return error;
+	error = add_uevent_var(env, "RFKILL_STATE=%d", rfkill->state);
+	return error;
+}
+
+static struct class rfkill_class = {
+	.name		= "rfkill",
+	.dev_release	= rfkill_release,
+	.dev_attrs	= rfkill_dev_attrs,
+	.suspend	= rfkill_suspend,
+	.resume		= rfkill_resume,
+	.dev_uevent	= rfkill_dev_uevent,
+};
+
+static int rfkill_check_duplicity(const struct rfkill *rfkill)
+{
+	struct rfkill *p;
+	unsigned long seen[BITS_TO_LONGS(RFKILL_TYPE_MAX)];
+
+	memset(seen, 0, sizeof(seen));
+
+	list_for_each_entry(p, &rfkill_list, node) {
+		if (WARN((p == rfkill), KERN_WARNING
+				"rfkill: illegal attempt to register "
+				"an already registered rfkill struct\n"))
+			return -EEXIST;
+		set_bit(p->type, seen);
+	}
+
+	/* 0: first switch of its kind */
+	return (test_bit(rfkill->type, seen)) ? 1 : 0;
+}
+
+static int rfkill_add_switch(struct rfkill *rfkill)
+{
+	int error;
+
+	mutex_lock(&rfkill_global_mutex);
+
+	error = rfkill_check_duplicity(rfkill);
+	if (error < 0)
+		goto unlock_out;
+
+	if (!error) {
+		/* lock default after first use */
+		set_bit(rfkill->type, rfkill_states_lockdflt);
+		rfkill_global_states[rfkill->type].current_state =
+			rfkill_global_states[rfkill->type].default_state;
+	}
+
+	rfkill_toggle_radio(rfkill,
+			    rfkill_global_states[rfkill->type].current_state,
+			    0);
+
+	list_add_tail(&rfkill->node, &rfkill_list);
+
+	error = 0;
+unlock_out:
+	mutex_unlock(&rfkill_global_mutex);
+
+	return error;
+}
+
+static void rfkill_remove_switch(struct rfkill *rfkill)
+{
+	mutex_lock(&rfkill_global_mutex);
+	list_del_init(&rfkill->node);
+	mutex_unlock(&rfkill_global_mutex);
+
+	mutex_lock(&rfkill->mutex);
+	rfkill_toggle_radio(rfkill, RFKILL_STATE_SOFT_BLOCKED, 1);
+	mutex_unlock(&rfkill->mutex);
+}
+
+/**
+ * rfkill_allocate - allocate memory for rfkill structure.
+ * @parent: device that has rf switch on it
+ * @type: type of the switch (RFKILL_TYPE_*)
+ *
+ * This function should be called by the network driver when it needs
+ * rfkill structure.  Once the structure is allocated the driver should
+ * finish its initialization by setting the name, private data, enable_radio
+ * and disable_radio methods and then register it with rfkill_register().
+ *
+ * NOTE: If registration fails the structure shoudl be freed by calling
+ * rfkill_free() otherwise rfkill_unregister() should be used.
+ */
+struct rfkill * __must_check rfkill_allocate(struct device *parent,
+					     enum rfkill_type type)
+{
+	struct rfkill *rfkill;
+	struct device *dev;
+
+	if (WARN((type >= RFKILL_TYPE_MAX),
+			KERN_WARNING
+			"rfkill: illegal type %d passed as parameter "
+			"to rfkill_allocate\n", type))
+		return NULL;
+
+	rfkill = kzalloc(sizeof(struct rfkill), GFP_KERNEL);
+	if (!rfkill)
+		return NULL;
+
+	mutex_init(&rfkill->mutex);
+	INIT_LIST_HEAD(&rfkill->node);
+	rfkill->type = type;
+
+	dev = &rfkill->dev;
+	dev->class = &rfkill_class;
+	dev->parent = parent;
+	device_initialize(dev);
+
+	__module_get(THIS_MODULE);
+
+	return rfkill;
+}
+EXPORT_SYMBOL(rfkill_allocate);
+
+/**
+ * rfkill_free - Mark rfkill structure for deletion
+ * @rfkill: rfkill structure to be destroyed
+ *
+ * Decrements reference count of the rfkill structure so it is destroyed.
+ * Note that rfkill_free() should _not_ be called after rfkill_unregister().
+ */
+void rfkill_free(struct rfkill *rfkill)
+{
+	if (rfkill)
+		put_device(&rfkill->dev);
+}
+EXPORT_SYMBOL(rfkill_free);
+
+static void rfkill_led_trigger_register(struct rfkill *rfkill)
+{
+#ifdef CONFIG_RFKILL_LEDS
+	int error;
+
+	if (!rfkill->led_trigger.name)
+		rfkill->led_trigger.name = dev_name(&rfkill->dev);
+	if (!rfkill->led_trigger.activate)
+		rfkill->led_trigger.activate = rfkill_led_trigger_activate;
+	error = led_trigger_register(&rfkill->led_trigger);
+	if (error)
+		rfkill->led_trigger.name = NULL;
+#endif /* CONFIG_RFKILL_LEDS */
+}
+
+static void rfkill_led_trigger_unregister(struct rfkill *rfkill)
+{
+#ifdef CONFIG_RFKILL_LEDS
+	if (rfkill->led_trigger.name) {
+		led_trigger_unregister(&rfkill->led_trigger);
+		rfkill->led_trigger.name = NULL;
+	}
+#endif
+}
+
+/**
+ * rfkill_register - Register a rfkill structure.
+ * @rfkill: rfkill structure to be registered
+ *
+ * This function should be called by the network driver when the rfkill
+ * structure needs to be registered. Immediately from registration the
+ * switch driver should be able to service calls to toggle_radio.
+ */
+int __must_check rfkill_register(struct rfkill *rfkill)
+{
+	static atomic_t rfkill_no = ATOMIC_INIT(0);
+	struct device *dev = &rfkill->dev;
+	int error;
+
+	if (WARN((!rfkill || !rfkill->toggle_radio ||
+			rfkill->type >= RFKILL_TYPE_MAX ||
+			rfkill->state >= RFKILL_STATE_MAX),
+			KERN_WARNING
+			"rfkill: attempt to register a "
+			"badly initialized rfkill struct\n"))
+		return -EINVAL;
+
+	dev_set_name(dev, "rfkill%ld", (long)atomic_inc_return(&rfkill_no) - 1);
+
+	rfkill_led_trigger_register(rfkill);
+
+	error = rfkill_add_switch(rfkill);
+	if (error) {
+		rfkill_led_trigger_unregister(rfkill);
+		return error;
+	}
+
+	error = device_add(dev);
+	if (error) {
+		rfkill_remove_switch(rfkill);
+		rfkill_led_trigger_unregister(rfkill);
+		return error;
+	}
+
+	return 0;
+}
+EXPORT_SYMBOL(rfkill_register);
+
+/**
+ * rfkill_unregister - Unregister a rfkill structure.
+ * @rfkill: rfkill structure to be unregistered
+ *
+ * This function should be called by the network driver during device
+ * teardown to destroy rfkill structure. Note that rfkill_free() should
+ * _not_ be called after rfkill_unregister().
+ */
+void rfkill_unregister(struct rfkill *rfkill)
+{
+	BUG_ON(!rfkill);
+	device_del(&rfkill->dev);
+	rfkill_remove_switch(rfkill);
+	rfkill_led_trigger_unregister(rfkill);
+	put_device(&rfkill->dev);
+}
+EXPORT_SYMBOL(rfkill_unregister);
+
+/**
+ * rfkill_set_default - set initial value for a switch type
+ * @type - the type of switch to set the default state of
+ * @state - the new default state for that group of switches
+ *
+ * Sets the initial state rfkill should use for a given type.
+ * The following initial states are allowed: RFKILL_STATE_SOFT_BLOCKED
+ * and RFKILL_STATE_UNBLOCKED.
+ *
+ * This function is meant to be used by platform drivers for platforms
+ * that can save switch state across power down/reboot.
+ *
+ * The default state for each switch type can be changed exactly once.
+ * After a switch of that type is registered, the default state cannot
+ * be changed anymore.  This guards against multiple drivers it the
+ * same platform trying to set the initial switch default state, which
+ * is not allowed.
+ *
+ * Returns -EPERM if the state has already been set once or is in use,
+ * so drivers likely want to either ignore or at most printk(KERN_NOTICE)
+ * if this function returns -EPERM.
+ *
+ * Returns 0 if the new default state was set, or an error if it
+ * could not be set.
+ */
+int rfkill_set_default(enum rfkill_type type, enum rfkill_state state)
+{
+	int error;
+
+	if (WARN((type >= RFKILL_TYPE_MAX ||
+			(state != RFKILL_STATE_SOFT_BLOCKED &&
+			 state != RFKILL_STATE_UNBLOCKED)),
+			KERN_WARNING
+			"rfkill: illegal state %d or type %d passed as "
+			"parameter to rfkill_set_default\n", state, type))
+		return -EINVAL;
+
+	mutex_lock(&rfkill_global_mutex);
+
+	if (!test_and_set_bit(type, rfkill_states_lockdflt)) {
+		rfkill_global_states[type].default_state = state;
+		rfkill_global_states[type].current_state = state;
+		error = 0;
+	} else
+		error = -EPERM;
+
+	mutex_unlock(&rfkill_global_mutex);
+	return error;
+}
+EXPORT_SYMBOL_GPL(rfkill_set_default);
+
+/*
+ * Rfkill module initialization/deinitialization.
+ */
+static int __init rfkill_init(void)
+{
+	int error;
+	int i;
+
+	/* RFKILL_STATE_HARD_BLOCKED is illegal here... */
+	if (rfkill_default_state != RFKILL_STATE_SOFT_BLOCKED &&
+	    rfkill_default_state != RFKILL_STATE_UNBLOCKED)
+		return -EINVAL;
+
+	for (i = 0; i < RFKILL_TYPE_MAX; i++)
+		rfkill_global_states[i].default_state = rfkill_default_state;
+
+	error = class_register(&rfkill_class);
+	if (error) {
+		printk(KERN_ERR "rfkill: unable to register rfkill class\n");
+		return error;
+	}
+
+	return 0;
+}
+
+static void __exit rfkill_exit(void)
+{
+	class_unregister(&rfkill_class);
+}
+
+subsys_initcall(rfkill_init);
+module_exit(rfkill_exit);
--- linux-mvl-dove-2.6.32.orig/net/rfkill/Kconfig
+++ linux-mvl-dove-2.6.32/net/rfkill/Kconfig
@@ -10,6 +10,24 @@
 	  To compile this driver as a module, choose M here: the
 	  module will be called rfkill.
 
+config RFKILL_PM
+	bool "Power off on suspend"
+	depends on RFKILL && PM
+	default y
+
+config RFKILL_INPUT
+	tristate "Input layer to RF switch connector"
+	depends on RFKILL && INPUT
+	help
+	  Say Y here if you want kernel automatically toggle state
+	  of RF switches on and off when user presses appropriate
+	  button or a key on the keyboard. Without this module you
+	  need a some kind of userspace application to control
+	  state of the switches.
+
+	  To compile this driver as a module, choose M here: the
+	  module will be called rfkill-input.
+
 # LED trigger support
 config RFKILL_LEDS
 	bool
--- linux-mvl-dove-2.6.32.orig/net/irda/parameters.c
+++ linux-mvl-dove-2.6.32/net/irda/parameters.c
@@ -298,6 +298,8 @@
 
 	p.pi = pi;     /* In case handler needs to know */
 	p.pl = buf[1]; /* Extract length of value */
+	if (p.pl > 32)
+		p.pl = 32;
 
 	IRDA_DEBUG(2, "%s(), pi=%#x, pl=%d\n", __func__,
 		   p.pi, p.pl);
@@ -318,7 +320,7 @@
 		   (__u8) str[0], (__u8) str[1]);
 
 	/* Null terminate string */
-	str[p.pl+1] = '\0';
+	str[p.pl] = '\0';
 
 	p.pv.c = str; /* Handler will need to take a copy */
 
--- linux-mvl-dove-2.6.32.orig/net/irda/iriap.c
+++ linux-mvl-dove-2.6.32/net/irda/iriap.c
@@ -501,7 +501,8 @@
 		IRDA_DEBUG(4, "%s(), strlen=%d\n", __func__, value_len);
 
 		/* Make sure the string is null-terminated */
-		fp[n+value_len] = 0x00;
+		if (n + value_len < skb->len)
+			fp[n + value_len] = 0x00;
 		IRDA_DEBUG(4, "Got string %s\n", fp+n);
 
 		/* Will truncate to IAS_MAX_STRING bytes */
@@ -654,10 +655,16 @@
 	n = 1;
 
 	name_len = fp[n++];
+
+	IRDA_ASSERT(name_len < IAS_MAX_CLASSNAME + 1, return;);
+
 	memcpy(name, fp+n, name_len); n+=name_len;
 	name[name_len] = '\0';
 
 	attr_len = fp[n++];
+
+	IRDA_ASSERT(attr_len < IAS_MAX_ATTRIBNAME + 1, return;);
+
 	memcpy(attr, fp+n, attr_len); n+=attr_len;
 	attr[attr_len] = '\0';
 
--- linux-mvl-dove-2.6.32.orig/net/irda/af_irda.c
+++ linux-mvl-dove-2.6.32/net/irda/af_irda.c
@@ -810,8 +810,8 @@
 
 	err = irda_open_tsap(self, addr->sir_lsap_sel, addr->sir_name);
 	if (err < 0) {
-		kfree(self->ias_obj->name);
-		kfree(self->ias_obj);
+		irias_delete_object(self->ias_obj);
+		self->ias_obj = NULL;
 		return err;
 	}
 
@@ -2164,6 +2164,14 @@
 
 	switch (optname) {
 	case IRLMP_ENUMDEVICES:
+
+		/* Offset to first device entry */
+		offset = sizeof(struct irda_device_list) -
+			sizeof(struct irda_device_info);
+
+		if (len < offset)
+			return -EINVAL;
+
 		/* Ask lmp for the current discovery log */
 		discoveries = irlmp_get_discoveries(&list.len, self->mask.word,
 						    self->nslots);
@@ -2173,15 +2181,9 @@
 		err = 0;
 
 		/* Write total list length back to client */
-		if (copy_to_user(optval, &list,
-				 sizeof(struct irda_device_list) -
-				 sizeof(struct irda_device_info)))
+		if (copy_to_user(optval, &list, offset))
 			err = -EFAULT;
 
-		/* Offset to first device entry */
-		offset = sizeof(struct irda_device_list) -
-			sizeof(struct irda_device_info);
-
 		/* Copy the list itself - watch for overflow */
 		if(list.len > 2048)
 		{
--- linux-mvl-dove-2.6.32.orig/net/irda/irlan/irlan_common.c
+++ linux-mvl-dove-2.6.32/net/irda/irlan/irlan_common.c
@@ -1101,7 +1101,7 @@
 	memcpy(&val_len, buf+n, 2); /* To avoid alignment problems */
 	le16_to_cpus(&val_len); n+=2;
 
-	if (val_len > 1016) {
+	if (val_len >= 1016) {
 		IRDA_DEBUG(2, "%s(), parameter length to long\n", __func__ );
 		return -RSP_INVALID_COMMAND_FORMAT;
 	}
--- linux-mvl-dove-2.6.32.orig/net/irda/irnet/irnet_ppp.c
+++ linux-mvl-dove-2.6.32/net/irda/irnet/irnet_ppp.c
@@ -106,6 +106,9 @@
 	      while(isspace(start[length - 1]))
 		length--;
 
+	      DABORT(length < 5 || length > NICKNAME_MAX_LEN + 5,
+		     -EINVAL, CTRL_ERROR, "Invalid nickname.\n");
+
 	      /* Copy the name for later reuse */
 	      memcpy(ap->rname, start + 5, length - 5);
 	      ap->rname[length - 5] = '\0';
--- linux-mvl-dove-2.6.32.orig/net/bridge/br_netfilter.c
+++ linux-mvl-dove-2.6.32/net/bridge/br_netfilter.c
@@ -600,6 +600,9 @@
 
 	pskb_trim_rcsum(skb, len);
 
+	/* BUG: Should really parse the IP options here. */
+	memset(IPCB(skb), 0, sizeof(struct inet_skb_parm));
+
 	nf_bridge_put(skb->nf_bridge);
 	if (!nf_bridge_alloc(skb))
 		return NF_DROP;
@@ -797,9 +800,11 @@
 	if (skb->nfct != NULL &&
 	    (skb->protocol == htons(ETH_P_IP) || IS_VLAN_IP(skb)) &&
 	    skb->len > skb->dev->mtu &&
-	    !skb_is_gso(skb))
+	    !skb_is_gso(skb)) {
+		/* BUG: Should really parse the IP options here. */
+		memset(IPCB(skb), 0, sizeof(struct inet_skb_parm));
 		return ip_fragment(skb, br_dev_queue_push_xmit);
-	else
+	} else
 		return br_dev_queue_push_xmit(skb);
 }
 #else
--- linux-mvl-dove-2.6.32.orig/net/bridge/br_stp.c
+++ linux-mvl-dove-2.6.32/net/bridge/br_stp.c
@@ -165,8 +165,7 @@
 	else {
 		struct net_bridge_port *root
 			= br_get_port(br, br->root_port);
-		bpdu.message_age = br->max_age
-			- (root->message_age_timer.expires - jiffies)
+		bpdu.message_age = (jiffies - root->designated_age)
 			+ MESSAGE_AGE_INCR;
 	}
 	bpdu.max_age = br->max_age;
@@ -190,6 +189,7 @@
 	p->designated_cost = bpdu->root_path_cost;
 	p->designated_bridge = bpdu->bridge_id;
 	p->designated_port = bpdu->port_id;
+	p->designated_age = jiffies + bpdu->message_age;
 
 	mod_timer(&p->message_age_timer, jiffies
 		  + (p->br->max_age - bpdu->message_age));
--- linux-mvl-dove-2.6.32.orig/net/bridge/br_private.h
+++ linux-mvl-dove-2.6.32/net/bridge/br_private.h
@@ -75,6 +75,7 @@
 	bridge_id			designated_bridge;
 	u32				path_cost;
 	u32				designated_cost;
+	unsigned long			designated_age;
 
 	struct timer_list		forward_delay_timer;
 	struct timer_list		hold_timer;
--- linux-mvl-dove-2.6.32.orig/net/bridge/netfilter/ebtables.c
+++ linux-mvl-dove-2.6.32/net/bridge/netfilter/ebtables.c
@@ -979,6 +979,8 @@
 	if (tmp.num_counters >= INT_MAX / sizeof(struct ebt_counter))
 		return -ENOMEM;
 
+	tmp.name[sizeof(tmp.name) - 1] = 0;
+
 	countersize = COUNTER_OFFSET(tmp.nentries) * nr_cpu_ids;
 	newinfo = vmalloc(sizeof(*newinfo) + countersize);
 	if (!newinfo)
@@ -1406,6 +1408,9 @@
 {
 	int ret;
 
+	if (!capable(CAP_NET_ADMIN))
+		return -EPERM;
+
 	switch(cmd) {
 	case EBT_SO_SET_ENTRIES:
 		ret = do_replace(sock_net(sk), user, len);
@@ -1425,6 +1430,9 @@
 	struct ebt_replace tmp;
 	struct ebt_table *t;
 
+	if (!capable(CAP_NET_ADMIN))
+		return -EPERM;
+
 	if (copy_from_user(&tmp, user, sizeof(tmp)))
 		return -EFAULT;
 
--- linux-mvl-dove-2.6.32.orig/net/sctp/transport.c
+++ linux-mvl-dove-2.6.32/net/sctp/transport.c
@@ -108,6 +108,8 @@
 			(unsigned long)peer);
 	setup_timer(&peer->hb_timer, sctp_generate_heartbeat_event,
 			(unsigned long)peer);
+	setup_timer(&peer->proto_unreach_timer,
+		    sctp_generate_proto_unreach_event, (unsigned long)peer);
 
 	/* Initialize the 64-bit random nonce sent with heartbeat. */
 	get_random_bytes(&peer->hb_nonce, sizeof(peer->hb_nonce));
--- linux-mvl-dove-2.6.32.orig/net/sctp/protocol.c
+++ linux-mvl-dove-2.6.32/net/sctp/protocol.c
@@ -1157,7 +1157,8 @@
 
 	/* Set the pressure threshold to be a fraction of global memory that
 	 * is up to 1/2 at 256 MB, decreasing toward zero with the amount of
-	 * memory, with a floor of 128 pages.
+	 * memory, with a floor of 128 pages, and a ceiling that prevents an
+	 * integer overflow.
 	 * Note this initalizes the data in sctpv6_prot too
 	 * Unabashedly stolen from tcp_init
 	 */
@@ -1165,6 +1166,7 @@
 	limit = min(nr_pages, 1UL<<(28-PAGE_SHIFT)) >> (20-PAGE_SHIFT);
 	limit = (limit * (nr_pages >> (20-PAGE_SHIFT))) >> (PAGE_SHIFT-11);
 	limit = max(limit, 128UL);
+	limit = min(limit, INT_MAX * 4UL / 3 / 2);
 	sysctl_sctp_mem[0] = limit / 4 * 3;
 	sysctl_sctp_mem[1] = limit;
 	sysctl_sctp_mem[2] = sysctl_sctp_mem[0] * 2;
--- linux-mvl-dove-2.6.32.orig/net/sctp/sm_make_chunk.c
+++ linux-mvl-dove-2.6.32/net/sctp/sm_make_chunk.c
@@ -107,7 +107,7 @@
 	cpu_to_be16(sizeof(struct sctp_paramhdr)),
 };
 
-/* A helper to initialize to initialize an op error inside a
+/* A helper to initialize an op error inside a
  * provided chunk, as most cause codes will be embedded inside an
  * abort chunk.
  */
@@ -124,6 +124,29 @@
 	chunk->subh.err_hdr = sctp_addto_chunk(chunk, sizeof(sctp_errhdr_t), &err);
 }
 
+/* A helper to initialize an op error inside a
+ * provided chunk, as most cause codes will be embedded inside an
+ * abort chunk.  Differs from sctp_init_cause in that it won't oops
+ * if there isn't enough space in the op error chunk
+ */
+int sctp_init_cause_fixed(struct sctp_chunk *chunk, __be16 cause_code,
+		      size_t paylen)
+{
+	sctp_errhdr_t err;
+	__u16 len;
+
+	/* Cause code constants are now defined in network order.  */
+	err.cause = cause_code;
+	len = sizeof(sctp_errhdr_t) + paylen;
+	err.length  = htons(len);
+
+	if (skb_tailroom(chunk->skb) < len)
+		return -ENOSPC;
+	chunk->subh.err_hdr = sctp_addto_chunk_fixed(chunk,
+						     sizeof(sctp_errhdr_t),
+						     &err);
+	return 0;
+}
 /* 3.3.2 Initiation (INIT) (1)
  *
  * This chunk is used to initiate a SCTP association between two
@@ -207,7 +230,8 @@
 	sp = sctp_sk(asoc->base.sk);
 	num_types = sp->pf->supported_addrs(sp, types);
 
-	chunksize = sizeof(init) + addrs_len + SCTP_SAT_LEN(num_types);
+	chunksize = sizeof(init) + addrs_len;
+	chunksize += WORD_ROUND(SCTP_SAT_LEN(num_types));
 	chunksize += sizeof(ecap_param);
 
 	if (sctp_prsctp_enable)
@@ -237,14 +261,14 @@
 		/* Add HMACS parameter length if any were defined */
 		auth_hmacs = (sctp_paramhdr_t *)asoc->c.auth_hmacs;
 		if (auth_hmacs->length)
-			chunksize += ntohs(auth_hmacs->length);
+			chunksize += WORD_ROUND(ntohs(auth_hmacs->length));
 		else
 			auth_hmacs = NULL;
 
 		/* Add CHUNKS parameter length */
 		auth_chunks = (sctp_paramhdr_t *)asoc->c.auth_chunks;
 		if (auth_chunks->length)
-			chunksize += ntohs(auth_chunks->length);
+			chunksize += WORD_ROUND(ntohs(auth_chunks->length));
 		else
 			auth_chunks = NULL;
 
@@ -254,7 +278,8 @@
 
 	/* If we have any extensions to report, account for that */
 	if (num_ext)
-		chunksize += sizeof(sctp_supported_ext_param_t) + num_ext;
+		chunksize += WORD_ROUND(sizeof(sctp_supported_ext_param_t) +
+					num_ext);
 
 	/* RFC 2960 3.3.2 Initiation (INIT) (1)
 	 *
@@ -396,13 +421,13 @@
 
 		auth_hmacs = (sctp_paramhdr_t *)asoc->c.auth_hmacs;
 		if (auth_hmacs->length)
-			chunksize += ntohs(auth_hmacs->length);
+			chunksize += WORD_ROUND(ntohs(auth_hmacs->length));
 		else
 			auth_hmacs = NULL;
 
 		auth_chunks = (sctp_paramhdr_t *)asoc->c.auth_chunks;
 		if (auth_chunks->length)
-			chunksize += ntohs(auth_chunks->length);
+			chunksize += WORD_ROUND(ntohs(auth_chunks->length));
 		else
 			auth_chunks = NULL;
 
@@ -411,7 +436,8 @@
 	}
 
 	if (num_ext)
-		chunksize += sizeof(sctp_supported_ext_param_t) + num_ext;
+		chunksize += WORD_ROUND(sizeof(sctp_supported_ext_param_t) +
+					num_ext);
 
 	/* Now allocate and fill out the chunk.  */
 	retval = sctp_make_chunk(asoc, SCTP_CID_INIT_ACK, 0, chunksize);
@@ -1125,6 +1151,24 @@
 	return retval;
 }
 
+/* Create an Operation Error chunk of a fixed size,
+ * specifically, max(asoc->pathmtu, SCTP_DEFAULT_MAXSEGMENT)
+ * This is a helper function to allocate an error chunk for
+ * for those invalid parameter codes in which we may not want
+ * to report all the errors, if the incomming chunk is large
+ */
+static inline struct sctp_chunk *sctp_make_op_error_fixed(
+	const struct sctp_association *asoc,
+	const struct sctp_chunk *chunk)
+{
+	size_t size = asoc ? asoc->pathmtu : 0;
+
+	if (!size)
+		size = SCTP_DEFAULT_MAXSEGMENT;
+
+	return sctp_make_op_error_space(asoc, chunk, size);
+}
+
 /* Create an Operation Error chunk.  */
 struct sctp_chunk *sctp_make_op_error(const struct sctp_association *asoc,
 				 const struct sctp_chunk *chunk,
@@ -1365,6 +1409,18 @@
 	return target;
 }
 
+/* Append bytes to the end of a chunk. Returns NULL if there isn't sufficient
+ * space in the chunk
+ */
+void *sctp_addto_chunk_fixed(struct sctp_chunk *chunk,
+			     int len, const void *data)
+{
+	if (skb_tailroom(chunk->skb) >= len)
+		return sctp_addto_chunk(chunk, len, data);
+	else
+		return NULL;
+}
+
 /* Append bytes from user space to the end of a chunk.  Will panic if
  * chunk is not big enough.
  * Returns a kernel err value.
@@ -1968,13 +2024,12 @@
 		 * returning multiple unknown parameters.
 		 */
 		if (NULL == *errp)
-			*errp = sctp_make_op_error_space(asoc, chunk,
-					ntohs(chunk->chunk_hdr->length));
+			*errp = sctp_make_op_error_fixed(asoc, chunk);
 
 		if (*errp) {
-			sctp_init_cause(*errp, SCTP_ERROR_UNKNOWN_PARAM,
+			sctp_init_cause_fixed(*errp, SCTP_ERROR_UNKNOWN_PARAM,
 					WORD_ROUND(ntohs(param.p->length)));
-			sctp_addto_chunk(*errp,
+			sctp_addto_chunk_fixed(*errp,
 					WORD_ROUND(ntohs(param.p->length)),
 					param.v);
 		} else {
@@ -3309,21 +3364,6 @@
 	sctp_chunk_free(asconf);
 	asoc->addip_last_asconf = NULL;
 
-	/* Send the next asconf chunk from the addip chunk queue. */
-	if (!list_empty(&asoc->addip_chunk_list)) {
-		struct list_head *entry = asoc->addip_chunk_list.next;
-		asconf = list_entry(entry, struct sctp_chunk, list);
-
-		list_del_init(entry);
-
-		/* Hold the chunk until an ASCONF_ACK is received. */
-		sctp_chunk_hold(asconf);
-		if (sctp_primitive_ASCONF(asoc, asconf))
-			sctp_chunk_free(asconf);
-		else
-			asoc->addip_last_asconf = asconf;
-	}
-
 	return retval;
 }
 
--- linux-mvl-dove-2.6.32.orig/net/sctp/sm_statefuns.c
+++ linux-mvl-dove-2.6.32/net/sctp/sm_statefuns.c
@@ -3670,8 +3670,14 @@
 				SCTP_TO(SCTP_EVENT_TIMEOUT_T4_RTO));
 
 		if (!sctp_process_asconf_ack((struct sctp_association *)asoc,
-					     asconf_ack))
+					     asconf_ack)) {
+			/* Successfully processed ASCONF_ACK.  We can
+			 * release the next asconf if we have one.
+			 */
+			sctp_add_cmd_sf(commands, SCTP_CMD_SEND_NEXT_ASCONF,
+					SCTP_NULL());
 			return SCTP_DISPOSITION_CONSUME;
+		}
 
 		abort = sctp_make_abort(asoc, asconf_ack,
 					sizeof(sctp_errhdr_t));
--- linux-mvl-dove-2.6.32.orig/net/sctp/sm_sideeffect.c
+++ linux-mvl-dove-2.6.32/net/sctp/sm_sideeffect.c
@@ -397,6 +397,41 @@
 	sctp_transport_put(transport);
 }
 
+/* Handle the timeout of the ICMP protocol unreachable timer.  Trigger
+ * the correct state machine transition that will close the association.
+ */
+void sctp_generate_proto_unreach_event(unsigned long data)
+{
+	struct sctp_transport *transport = (struct sctp_transport *) data;
+	struct sctp_association *asoc = transport->asoc;
+
+	sctp_bh_lock_sock(asoc->base.sk);
+	if (sock_owned_by_user(asoc->base.sk)) {
+		SCTP_DEBUG_PRINTK("%s:Sock is busy.\n", __func__);
+
+		/* Try again later.  */
+		if (!mod_timer(&transport->proto_unreach_timer,
+				jiffies + (HZ/20)))
+			sctp_association_hold(asoc);
+		goto out_unlock;
+	}
+
+	/* Is this structure just waiting around for us to actually
+	 * get destroyed?
+	 */
+	if (asoc->base.dead)
+		goto out_unlock;
+
+	sctp_do_sm(SCTP_EVENT_T_OTHER,
+		   SCTP_ST_OTHER(SCTP_EVENT_ICMP_PROTO_UNREACH),
+		   asoc->state, asoc->ep, asoc, transport, GFP_ATOMIC);
+
+out_unlock:
+	sctp_bh_unlock_sock(asoc->base.sk);
+	sctp_association_put(asoc);
+}
+
+
 /* Inject a SACK Timeout event into the state machine.  */
 static void sctp_generate_sack_event(unsigned long data)
 {
@@ -962,6 +997,29 @@
 }
 
 
+/* Sent the next ASCONF packet currently stored in the association.
+ * This happens after the ASCONF_ACK was succeffully processed.
+ */
+static void sctp_cmd_send_asconf(struct sctp_association *asoc)
+{
+	/* Send the next asconf chunk from the addip chunk
+	 * queue.
+	 */
+	if (!list_empty(&asoc->addip_chunk_list)) {
+		struct list_head *entry = asoc->addip_chunk_list.next;
+		struct sctp_chunk *asconf = list_entry(entry,
+						struct sctp_chunk, list);
+		list_del_init(entry);
+
+		/* Hold the chunk until an ASCONF_ACK is received. */
+		sctp_chunk_hold(asconf);
+		if (sctp_primitive_ASCONF(asoc, asconf))
+			sctp_chunk_free(asconf);
+		else
+			asoc->addip_last_asconf = asconf;
+	}
+}
+
 
 /* These three macros allow us to pull the debugging code out of the
  * main flow of sctp_do_sm() to keep attention focused on the real
@@ -1615,6 +1673,9 @@
 			}
 			error = sctp_cmd_send_msg(asoc, cmd->obj.msg);
 			break;
+		case SCTP_CMD_SEND_NEXT_ASCONF:
+			sctp_cmd_send_asconf(asoc);
+			break;
 		default:
 			printk(KERN_WARNING "Impossible command: %u, %p\n",
 			       cmd->verb, cmd->obj.ptr);
--- linux-mvl-dove-2.6.32.orig/net/sctp/input.c
+++ linux-mvl-dove-2.6.32/net/sctp/input.c
@@ -75,7 +75,7 @@
 					const union sctp_addr *peer,
 					struct sctp_transport **pt);
 
-static void sctp_add_backlog(struct sock *sk, struct sk_buff *skb);
+static int sctp_add_backlog(struct sock *sk, struct sk_buff *skb);
 
 
 /* Calculate the SCTP checksum of an SCTP packet.  */
@@ -265,8 +265,13 @@
 	}
 
 	if (sock_owned_by_user(sk)) {
+		if (sctp_add_backlog(sk, skb)) {
+			sctp_bh_unlock_sock(sk);
+			sctp_chunk_free(chunk);
+			skb = NULL; /* sctp_chunk_free already freed the skb */
+			goto discard_release;
+		}
 		SCTP_INC_STATS_BH(SCTP_MIB_IN_PKT_BACKLOG);
-		sctp_add_backlog(sk, skb);
 	} else {
 		SCTP_INC_STATS_BH(SCTP_MIB_IN_PKT_SOFTIRQ);
 		sctp_inq_push(&chunk->rcvr->inqueue, chunk);
@@ -336,8 +341,10 @@
 		sctp_bh_lock_sock(sk);
 
 		if (sock_owned_by_user(sk)) {
-			sk_add_backlog(sk, skb);
-			backloged = 1;
+			if (sk_add_backlog(sk, skb))
+				sctp_chunk_free(chunk);
+			else
+				backloged = 1;
 		} else
 			sctp_inq_push(inqueue, chunk);
 
@@ -362,22 +369,27 @@
 	return 0;
 }
 
-static void sctp_add_backlog(struct sock *sk, struct sk_buff *skb)
+static int sctp_add_backlog(struct sock *sk, struct sk_buff *skb)
 {
 	struct sctp_chunk *chunk = SCTP_INPUT_CB(skb)->chunk;
 	struct sctp_ep_common *rcvr = chunk->rcvr;
+	int ret;
 
-	/* Hold the assoc/ep while hanging on the backlog queue.
-	 * This way, we know structures we need will not disappear from us
-	 */
-	if (SCTP_EP_TYPE_ASSOCIATION == rcvr->type)
-		sctp_association_hold(sctp_assoc(rcvr));
-	else if (SCTP_EP_TYPE_SOCKET == rcvr->type)
-		sctp_endpoint_hold(sctp_ep(rcvr));
-	else
-		BUG();
+	ret = sk_add_backlog(sk, skb);
+	if (!ret) {
+		/* Hold the assoc/ep while hanging on the backlog queue.
+		 * This way, we know structures we need will not disappear
+		 * from us
+		 */
+		if (SCTP_EP_TYPE_ASSOCIATION == rcvr->type)
+			sctp_association_hold(sctp_assoc(rcvr));
+		else if (SCTP_EP_TYPE_SOCKET == rcvr->type)
+			sctp_endpoint_hold(sctp_ep(rcvr));
+		else
+			BUG();
+	}
+	return ret;
 
-	sk_add_backlog(sk, skb);
 }
 
 /* Handle icmp frag needed error. */
@@ -427,11 +439,25 @@
 {
 	SCTP_DEBUG_PRINTK("%s\n",  __func__);
 
-	sctp_do_sm(SCTP_EVENT_T_OTHER,
-		   SCTP_ST_OTHER(SCTP_EVENT_ICMP_PROTO_UNREACH),
-		   asoc->state, asoc->ep, asoc, t,
-		   GFP_ATOMIC);
+	if (sock_owned_by_user(sk)) {
+		if (timer_pending(&t->proto_unreach_timer))
+			return;
+		else {
+			if (!mod_timer(&t->proto_unreach_timer,
+						jiffies + (HZ/20)))
+				sctp_association_hold(asoc);
+		}
+
+	} else {
+		if (timer_pending(&t->proto_unreach_timer) &&
+		    del_timer(&t->proto_unreach_timer))
+			sctp_association_put(asoc);
 
+		sctp_do_sm(SCTP_EVENT_T_OTHER,
+			   SCTP_ST_OTHER(SCTP_EVENT_ICMP_PROTO_UNREACH),
+			   asoc->state, asoc->ep, asoc, t,
+			   GFP_ATOMIC);
+	}
 }
 
 /* Common lookup code for icmp/icmpv6 error handler. */
--- linux-mvl-dove-2.6.32.orig/net/sctp/auth.c
+++ linux-mvl-dove-2.6.32/net/sctp/auth.c
@@ -542,16 +542,20 @@
 		id = ntohs(hmacs->hmac_ids[i]);
 
 		/* Check the id is in the supported range */
-		if (id > SCTP_AUTH_HMAC_ID_MAX)
+		if (id > SCTP_AUTH_HMAC_ID_MAX) {
+			id = 0;
 			continue;
+		}
 
 		/* See is we support the id.  Supported IDs have name and
 		 * length fields set, so that we can allocated and use
 		 * them.  We can safely just check for name, for without the
 		 * name, we can't allocate the TFM.
 		 */
-		if (!sctp_hmac_list[id].hmac_name)
+		if (!sctp_hmac_list[id].hmac_name) {
+			id = 0;
 			continue;
+		}
 
 		break;
 	}
--- linux-mvl-dove-2.6.32.orig/net/sctp/output.c
+++ linux-mvl-dove-2.6.32/net/sctp/output.c
@@ -91,7 +91,6 @@
 	SCTP_DEBUG_PRINTK("%s: packet:%p vtag:0x%x\n", __func__,
 			  packet, vtag);
 
-	sctp_packet_reset(packet);
 	packet->vtag = vtag;
 
 	if (ecn_capable && sctp_packet_empty(packet)) {
--- linux-mvl-dove-2.6.32.orig/net/ipv4/udp.c
+++ linux-mvl-dove-2.6.32/net/ipv4/udp.c
@@ -1011,6 +1011,9 @@
 
 	if (noblock)
 		return -EAGAIN;
+
+	/* starting over for a new packet */
+	msg->msg_flags &= ~MSG_TRUNC;
 	goto try_again;
 }
 
@@ -1169,13 +1172,19 @@
 			goto drop;
 	}
 
+
+	if (sk_rcvqueues_full(sk, skb))
+		goto drop;
+
 	rc = 0;
 
 	bh_lock_sock(sk);
 	if (!sock_owned_by_user(sk))
 		rc = __udp_queue_rcv_skb(sk, skb);
-	else
-		sk_add_backlog(sk, skb);
+	else if (sk_add_backlog(sk, skb)) {
+		bh_unlock_sock(sk);
+		goto drop;
+	}
 	bh_unlock_sock(sk);
 
 	return rc;
@@ -1186,49 +1195,83 @@
 	return -1;
 }
 
+
+static void flush_stack(struct sock **stack, unsigned int count,
+			struct sk_buff *skb, unsigned int final)
+{
+	unsigned int i;
+	struct sk_buff *skb1 = NULL;
+	struct sock *sk;
+
+	for (i = 0; i < count; i++) {
+		sk = stack[i];
+		if (likely(skb1 == NULL))
+			skb1 = (i == final) ? skb : skb_clone(skb, GFP_ATOMIC);
+
+		if (!skb1) {
+			atomic_inc(&sk->sk_drops);
+			UDP_INC_STATS_BH(sock_net(sk), UDP_MIB_RCVBUFERRORS,
+					 IS_UDPLITE(sk));
+			UDP_INC_STATS_BH(sock_net(sk), UDP_MIB_INERRORS,
+					 IS_UDPLITE(sk));
+		}
+
+		if (skb1 && udp_queue_rcv_skb(sk, skb1) <= 0)
+			skb1 = NULL;
+	}
+	if (unlikely(skb1))
+		kfree_skb(skb1);
+}
+
 /*
  *	Multicasts and broadcasts go to each listener.
  *
- *	Note: called only from the BH handler context,
- *	so we don't need to lock the hashes.
+ *	Note: called only from the BH handler context.
  */
 static int __udp4_lib_mcast_deliver(struct net *net, struct sk_buff *skb,
 				    struct udphdr  *uh,
 				    __be32 saddr, __be32 daddr,
 				    struct udp_table *udptable)
 {
-	struct sock *sk;
+	struct sock *sk, *stack[256 / sizeof(struct sock *)];
 	struct udp_hslot *hslot = &udptable->hash[udp_hashfn(net, ntohs(uh->dest))];
 	int dif;
+	unsigned int i, count = 0;
 
 	spin_lock(&hslot->lock);
 	sk = sk_nulls_head(&hslot->head);
 	dif = skb->dev->ifindex;
 	sk = udp_v4_mcast_next(net, sk, uh->dest, daddr, uh->source, saddr, dif);
-	if (sk) {
-		struct sock *sknext = NULL;
-
-		do {
-			struct sk_buff *skb1 = skb;
+	while (sk) {
+		stack[count++] = sk;
+		sk = udp_v4_mcast_next(net, sk_nulls_next(sk), uh->dest,
+				       daddr, uh->source, saddr, dif);
+		if (unlikely(count == ARRAY_SIZE(stack))) {
+			if (!sk)
+				break;
+			flush_stack(stack, count, skb, ~0);
+			count = 0;
+		}
+	}
+	/*
+	 * before releasing chain lock, we must take a reference on sockets
+	 */
+	for (i = 0; i < count; i++)
+		sock_hold(stack[i]);
 
-			sknext = udp_v4_mcast_next(net, sk_nulls_next(sk), uh->dest,
-						   daddr, uh->source, saddr,
-						   dif);
-			if (sknext)
-				skb1 = skb_clone(skb, GFP_ATOMIC);
-
-			if (skb1) {
-				int ret = udp_queue_rcv_skb(sk, skb1);
-				if (ret > 0)
-					/* we should probably re-process instead
-					 * of dropping packets here. */
-					kfree_skb(skb1);
-			}
-			sk = sknext;
-		} while (sknext);
-	} else
-		consume_skb(skb);
 	spin_unlock(&hslot->lock);
+
+	/*
+	 * do the slow work with no lock held
+	 */
+	if (count) {
+		flush_stack(stack, count, skb, count - 1);
+
+		for (i = 0; i < count; i++)
+			sock_put(stack[i]);
+	} else {
+		kfree_skb(skb);
+	}
 	return 0;
 }
 
@@ -1292,6 +1335,9 @@
 
 	uh   = udp_hdr(skb);
 	ulen = ntohs(uh->len);
+	saddr = ip_hdr(skb)->saddr;
+	daddr = ip_hdr(skb)->daddr;
+
 	if (ulen > skb->len)
 		goto short_packet;
 
@@ -1305,9 +1351,6 @@
 	if (udp4_csum_init(skb, uh, proto))
 		goto csum_error;
 
-	saddr = ip_hdr(skb)->saddr;
-	daddr = ip_hdr(skb)->daddr;
-
 	if (rt->rt_flags & (RTCF_BROADCAST|RTCF_MULTICAST))
 		return __udp4_lib_mcast_deliver(net, skb, uh,
 				saddr, daddr, udptable);
@@ -1832,12 +1875,14 @@
 	udp_table_init(&udp_table);
 	/* Set the pressure threshold up by the same strategy of TCP. It is a
 	 * fraction of global memory that is up to 1/2 at 256 MB, decreasing
-	 * toward zero with the amount of memory, with a floor of 128 pages.
+	 * toward zero with the amount of memory, with a floor of 128 pages,
+	 * and a ceiling that prevents an integer overflow.
 	 */
 	nr_pages = totalram_pages - totalhigh_pages;
 	limit = min(nr_pages, 1UL<<(28-PAGE_SHIFT)) >> (20-PAGE_SHIFT);
 	limit = (limit * (nr_pages >> (20-PAGE_SHIFT))) >> (PAGE_SHIFT-11);
 	limit = max(limit, 128UL);
+	limit = min(limit, INT_MAX * 4UL / 3 / 2);
 	sysctl_udp_mem[0] = limit / 4 * 3;
 	sysctl_udp_mem[1] = limit;
 	sysctl_udp_mem[2] = sysctl_udp_mem[0] * 2;
--- linux-mvl-dove-2.6.32.orig/net/ipv4/ip_output.c
+++ linux-mvl-dove-2.6.32/net/ipv4/ip_output.c
@@ -476,9 +476,8 @@
 	 * we can switch to copy when see the first bad fragment.
 	 */
 	if (skb_has_frags(skb)) {
-		struct sk_buff *frag;
+		struct sk_buff *frag, *frag2;
 		int first_len = skb_pagelen(skb);
-		int truesizes = 0;
 
 		if (first_len - hlen > mtu ||
 		    ((first_len - hlen) & 7) ||
@@ -491,18 +490,18 @@
 			if (frag->len > mtu ||
 			    ((frag->len & 7) && frag->next) ||
 			    skb_headroom(frag) < hlen)
-			    goto slow_path;
+				goto slow_path_clean;
 
 			/* Partially cloned skb? */
 			if (skb_shared(frag))
-				goto slow_path;
+				goto slow_path_clean;
 
 			BUG_ON(frag->sk);
 			if (skb->sk) {
 				frag->sk = skb->sk;
 				frag->destructor = sock_wfree;
-				truesizes += frag->truesize;
 			}
+			skb->truesize -= frag->truesize;
 		}
 
 		/* Everything is OK. Generate! */
@@ -512,7 +511,6 @@
 		frag = skb_shinfo(skb)->frag_list;
 		skb_frag_list_init(skb);
 		skb->data_len = first_len - skb_headlen(skb);
-		skb->truesize -= truesizes;
 		skb->len = first_len;
 		iph->tot_len = htons(first_len);
 		iph->frag_off = htons(IP_MF);
@@ -564,6 +562,15 @@
 		}
 		IP_INC_STATS(dev_net(dev), IPSTATS_MIB_FRAGFAILS);
 		return err;
+
+slow_path_clean:
+		skb_walk_frags(skb, frag2) {
+			if (frag2 == frag)
+				break;
+			frag2->sk = NULL;
+			frag2->destructor = NULL;
+			skb->truesize += frag2->truesize;
+		}
 	}
 
 slow_path:
@@ -860,8 +867,10 @@
 	    !exthdrlen)
 		csummode = CHECKSUM_PARTIAL;
 
+	skb = skb_peek_tail(&sk->sk_write_queue);
+
 	inet->cork.length += length;
-	if (((length> mtu) || !skb_queue_empty(&sk->sk_write_queue)) &&
+	if (((length > mtu) || (skb && skb_is_gso(skb))) &&
 	    (sk->sk_protocol == IPPROTO_UDP) &&
 	    (rt->u.dst.dev->features & NETIF_F_UFO)) {
 		err = ip_ufo_append_data(sk, getfrag, from, length, hh_len,
@@ -879,7 +888,7 @@
 	 * adding appropriate IP header.
 	 */
 
-	if ((skb = skb_peek_tail(&sk->sk_write_queue)) == NULL)
+	if (!skb)
 		goto alloc_new_skb;
 
 	while (length > 0) {
@@ -1108,7 +1117,8 @@
 		return -EINVAL;
 
 	inet->cork.length += size;
-	if ((sk->sk_protocol == IPPROTO_UDP) &&
+	if ((size + skb->len > mtu) &&
+	    (sk->sk_protocol == IPPROTO_UDP) &&
 	    (rt->u.dst.dev->features & NETIF_F_UFO)) {
 		skb_shinfo(skb)->gso_size = mtu - fragheaderlen;
 		skb_shinfo(skb)->gso_type = SKB_GSO_UDP;
--- linux-mvl-dove-2.6.32.orig/net/ipv4/tcp_minisocks.c
+++ linux-mvl-dove-2.6.32/net/ipv4/tcp_minisocks.c
@@ -702,7 +702,7 @@
 		 * in main socket hash table and lock on listening
 		 * socket does not protect us more.
 		 */
-		sk_add_backlog(child, skb);
+		__sk_add_backlog(child, skb);
 	}
 
 	bh_unlock_sock(child);
--- linux-mvl-dove-2.6.32.orig/net/ipv4/inet_diag.c
+++ linux-mvl-dove-2.6.32/net/ipv4/inet_diag.c
@@ -436,7 +436,7 @@
 			return 0;
 		if (cc == len)
 			return 1;
-		if (op->yes < 4)
+		if (op->yes < 4 || op->yes & 3)
 			return 0;
 		len -= op->yes;
 		bc  += op->yes;
@@ -446,11 +446,11 @@
 
 static int inet_diag_bc_audit(const void *bytecode, int bytecode_len)
 {
-	const unsigned char *bc = bytecode;
+	const void *bc = bytecode;
 	int  len = bytecode_len;
 
 	while (len > 0) {
-		struct inet_diag_bc_op *op = (struct inet_diag_bc_op *)bc;
+		const struct inet_diag_bc_op *op = bc;
 
 //printk("BC: %d %d %d {%d} / %d\n", op->code, op->yes, op->no, op[1].no, len);
 		switch (op->code) {
@@ -461,22 +461,20 @@
 		case INET_DIAG_BC_S_LE:
 		case INET_DIAG_BC_D_GE:
 		case INET_DIAG_BC_D_LE:
-			if (op->yes < 4 || op->yes > len + 4)
-				return -EINVAL;
 		case INET_DIAG_BC_JMP:
-			if (op->no < 4 || op->no > len + 4)
+			if (op->no < 4 || op->no > len + 4 || op->no & 3)
 				return -EINVAL;
 			if (op->no < len &&
 			    !valid_cc(bytecode, bytecode_len, len - op->no))
 				return -EINVAL;
 			break;
 		case INET_DIAG_BC_NOP:
-			if (op->yes < 4 || op->yes > len + 4)
-				return -EINVAL;
 			break;
 		default:
 			return -EINVAL;
 		}
+		if (op->yes < 4 || op->yes > len + 4 || op->yes & 3)
+			return -EINVAL;
 		bc  += op->yes;
 		len -= op->yes;
 	}
@@ -489,9 +487,11 @@
 {
 	struct inet_diag_req *r = NLMSG_DATA(cb->nlh);
 
-	if (cb->nlh->nlmsg_len > 4 + NLMSG_SPACE(sizeof(*r))) {
+	if (nlmsg_attrlen(cb->nlh, sizeof(*r))) {
 		struct inet_diag_entry entry;
-		struct rtattr *bc = (struct rtattr *)(r + 1);
+		const struct nlattr *bc = nlmsg_find_attr(cb->nlh,
+							  sizeof(*r),
+							  INET_DIAG_REQ_BYTECODE);
 		struct inet_sock *inet = inet_sk(sk);
 
 		entry.family = sk->sk_family;
@@ -511,7 +511,7 @@
 		entry.dport = ntohs(inet->dport);
 		entry.userlocks = sk->sk_userlocks;
 
-		if (!inet_diag_bc_run(RTA_DATA(bc), RTA_PAYLOAD(bc), &entry))
+		if (!inet_diag_bc_run(nla_data(bc), nla_len(bc), &entry))
 			return 0;
 	}
 
@@ -526,9 +526,11 @@
 {
 	struct inet_diag_req *r = NLMSG_DATA(cb->nlh);
 
-	if (cb->nlh->nlmsg_len > 4 + NLMSG_SPACE(sizeof(*r))) {
+	if (nlmsg_attrlen(cb->nlh, sizeof(*r))) {
 		struct inet_diag_entry entry;
-		struct rtattr *bc = (struct rtattr *)(r + 1);
+		const struct nlattr *bc = nlmsg_find_attr(cb->nlh,
+							  sizeof(*r),
+							  INET_DIAG_REQ_BYTECODE);
 
 		entry.family = tw->tw_family;
 #if defined(CONFIG_IPV6) || defined (CONFIG_IPV6_MODULE)
@@ -547,7 +549,7 @@
 		entry.dport = ntohs(tw->tw_dport);
 		entry.userlocks = 0;
 
-		if (!inet_diag_bc_run(RTA_DATA(bc), RTA_PAYLOAD(bc), &entry))
+		if (!inet_diag_bc_run(nla_data(bc), nla_len(bc), &entry))
 			return 0;
 	}
 
@@ -617,7 +619,7 @@
 	struct inet_diag_req *r = NLMSG_DATA(cb->nlh);
 	struct inet_connection_sock *icsk = inet_csk(sk);
 	struct listen_sock *lopt;
-	struct rtattr *bc = NULL;
+	const struct nlattr *bc = NULL;
 	struct inet_sock *inet = inet_sk(sk);
 	int j, s_j;
 	int reqnum, s_reqnum;
@@ -637,8 +639,9 @@
 	if (!lopt || !lopt->qlen)
 		goto out;
 
-	if (cb->nlh->nlmsg_len > 4 + NLMSG_SPACE(sizeof(*r))) {
-		bc = (struct rtattr *)(r + 1);
+	if (nlmsg_attrlen(cb->nlh, sizeof(*r))) {
+		bc = nlmsg_find_attr(cb->nlh, sizeof(*r),
+				     INET_DIAG_REQ_BYTECODE);
 		entry.sport = inet->num;
 		entry.userlocks = sk->sk_userlocks;
 	}
@@ -671,8 +674,8 @@
 					&ireq->rmt_addr;
 				entry.dport = ntohs(ireq->rmt_port);
 
-				if (!inet_diag_bc_run(RTA_DATA(bc),
-						    RTA_PAYLOAD(bc), &entry))
+				if (!inet_diag_bc_run(nla_data(bc),
+						      nla_len(bc), &entry))
 					continue;
 			}
 
--- linux-mvl-dove-2.6.32.orig/net/ipv4/tcp_output.c
+++ linux-mvl-dove-2.6.32/net/ipv4/tcp_output.c
@@ -2037,6 +2037,9 @@
 	int mib_idx;
 	int fwd_rexmitting = 0;
 
+	if (!tp->packets_out)
+		return;
+
 	if (!tp->lost_out)
 		tp->retransmit_high = tp->snd_una;
 
--- linux-mvl-dove-2.6.32.orig/net/ipv4/xfrm4_policy.c
+++ linux-mvl-dove-2.6.32/net/ipv4/xfrm4_policy.c
@@ -71,7 +71,7 @@
 		if (xdst->u.rt.fl.oif == fl->oif &&	/*XXX*/
 		    xdst->u.rt.fl.fl4_dst == fl->fl4_dst &&
 		    xdst->u.rt.fl.fl4_src == fl->fl4_src &&
-		    xdst->u.rt.fl.fl4_tos == fl->fl4_tos &&
+                    !((xdst->u.rt.fl.fl4_tos ^ fl->fl4_tos) & IPTOS_RT_MASK) &&
 		    xfrm_bundle_ok(policy, xdst, fl, AF_INET, 0)) {
 			dst_clone(dst);
 			break;
@@ -83,7 +83,7 @@
 
 static int xfrm4_get_tos(struct flowi *fl)
 {
-	return fl->fl4_tos;
+	return IPTOS_RT_MASK & fl->fl4_tos; /* Strip ECN bits */
 }
 
 static int xfrm4_init_path(struct xfrm_dst *path, struct dst_entry *dst,
--- linux-mvl-dove-2.6.32.orig/net/ipv4/tcp_timer.c
+++ linux-mvl-dove-2.6.32/net/ipv4/tcp_timer.c
@@ -65,18 +65,18 @@
 static int tcp_out_of_resources(struct sock *sk, int do_reset)
 {
 	struct tcp_sock *tp = tcp_sk(sk);
-	int orphans = percpu_counter_read_positive(&tcp_orphan_count);
+	int shift = 0;
 
 	/* If peer does not open window for long time, or did not transmit
 	 * anything for long time, penalize it. */
 	if ((s32)(tcp_time_stamp - tp->lsndtime) > 2*TCP_RTO_MAX || !do_reset)
-		orphans <<= 1;
+		shift++;
 
 	/* If some dubious ICMP arrived, penalize even more. */
 	if (sk->sk_err_soft)
-		orphans <<= 1;
+		shift++;
 
-	if (tcp_too_many_orphans(sk, orphans)) {
+	if (tcp_too_many_orphans(sk, shift)) {
 		if (net_ratelimit())
 			printk(KERN_INFO "Out of socket memory\n");
 
--- linux-mvl-dove-2.6.32.orig/net/ipv4/devinet.c
+++ linux-mvl-dove-2.6.32/net/ipv4/devinet.c
@@ -57,6 +57,7 @@
 
 #include <net/arp.h>
 #include <net/ip.h>
+#include <net/tcp.h>
 #include <net/route.h>
 #include <net/ip_fib.h>
 #include <net/rtnetlink.h>
@@ -631,6 +632,7 @@
 	case SIOCSIFBRDADDR:	/* Set the broadcast address */
 	case SIOCSIFDSTADDR:	/* Set the destination address */
 	case SIOCSIFNETMASK: 	/* Set the netmask for the interface */
+	case SIOCKILLADDR:	/* Nuke all sockets on this address */
 		ret = -EACCES;
 		if (!capable(CAP_NET_ADMIN))
 			goto out;
@@ -680,7 +682,8 @@
 	}
 
 	ret = -EADDRNOTAVAIL;
-	if (!ifa && cmd != SIOCSIFADDR && cmd != SIOCSIFFLAGS)
+	if (!ifa && cmd != SIOCSIFADDR && cmd != SIOCSIFFLAGS
+	    && cmd != SIOCKILLADDR)
 		goto done;
 
 	switch (cmd) {
@@ -804,6 +807,10 @@
 			inet_insert_ifa(ifa);
 		}
 		break;
+	case SIOCKILLADDR:	/* Nuke all connections on this address */
+		ret = 0;
+		tcp_v4_nuke_addr(sin->sin_addr.s_addr);
+		break;
 	}
 done:
 	rtnl_unlock();
@@ -1025,6 +1032,21 @@
 	return mtu >= 68;
 }
 
+static void inetdev_send_gratuitous_arp(struct net_device *dev,
+					struct in_device *in_dev)
+
+{
+	struct in_ifaddr *ifa = in_dev->ifa_list;
+
+	if (!ifa)
+		return;
+
+	arp_send(ARPOP_REQUEST, ETH_P_ARP,
+		 ifa->ifa_address, dev,
+		 ifa->ifa_address, NULL,
+		 dev->dev_addr, NULL);
+}
+
 /* Called only under RTNL semaphore */
 
 static int inetdev_event(struct notifier_block *this, unsigned long event,
@@ -1077,16 +1099,12 @@
 		ip_mc_up(in_dev);
 		/* fall through */
 	case NETDEV_CHANGEADDR:
+		if (!IN_DEV_ARP_NOTIFY(in_dev))
+			break;
+		/* fall through */
+	case NETDEV_NOTIFY_PEERS:
 		/* Send gratuitous ARP to notify of link change */
-		if (IN_DEV_ARP_NOTIFY(in_dev)) {
-			struct in_ifaddr *ifa = in_dev->ifa_list;
-
-			if (ifa)
-				arp_send(ARPOP_REQUEST, ETH_P_ARP,
-					 ifa->ifa_address, dev,
-					 ifa->ifa_address, NULL,
-					 dev->dev_addr, NULL);
-		}
+		inetdev_send_gratuitous_arp(dev, in_dev);
 		break;
 	case NETDEV_DOWN:
 		ip_mc_down(in_dev);
@@ -1351,14 +1369,19 @@
 {
 	int *valp = ctl->data;
 	int val = *valp;
+	loff_t pos = *ppos;
 	int ret = proc_dointvec(ctl, write, buffer, lenp, ppos);
 
 	if (write && *valp != val) {
 		struct net *net = ctl->extra2;
 
 		if (valp != &IPV4_DEVCONF_DFLT(net, FORWARDING)) {
-			if (!rtnl_trylock())
+			if (!rtnl_trylock()) {
+				/* Restore the original values before restarting */
+				*valp = val;
+				*ppos = pos;
 				return restart_syscall();
+			}
 			if (valp == &IPV4_DEVCONF_ALL(net, FORWARDING)) {
 				inet_forward_change(net);
 			} else if (*valp) {
@@ -1450,6 +1473,7 @@
 		DEVINET_SYSCTL_RW_ENTRY(SEND_REDIRECTS, "send_redirects"),
 		DEVINET_SYSCTL_RW_ENTRY(ACCEPT_SOURCE_ROUTE,
 					"accept_source_route"),
+		DEVINET_SYSCTL_RW_ENTRY(SRC_VMARK, "src_valid_mark"),
 		DEVINET_SYSCTL_RW_ENTRY(PROXY_ARP, "proxy_arp"),
 		DEVINET_SYSCTL_RW_ENTRY(MEDIUM_ID, "medium_id"),
 		DEVINET_SYSCTL_RW_ENTRY(BOOTP_RELAY, "bootp_relay"),
--- linux-mvl-dove-2.6.32.orig/net/ipv4/Makefile
+++ linux-mvl-dove-2.6.32/net/ipv4/Makefile
@@ -14,6 +14,7 @@
 	     inet_fragment.o
 
 obj-$(CONFIG_SYSCTL) += sysctl_net_ipv4.o
+obj-$(CONFIG_SYSFS) += sysfs_net_ipv4.o
 obj-$(CONFIG_IP_FIB_HASH) += fib_hash.o
 obj-$(CONFIG_IP_FIB_TRIE) += fib_trie.o
 obj-$(CONFIG_PROC_FS) += proc.o
--- linux-mvl-dove-2.6.32.orig/net/ipv4/tcp_input.c
+++ linux-mvl-dove-2.6.32/net/ipv4/tcp_input.c
@@ -3969,6 +3969,8 @@
 	default:
 		sk->sk_err = ECONNRESET;
 	}
+	/* This barrier is coupled with smp_rmb() in tcp_poll() */
+	smp_wmb();
 
 	if (!sock_flag(sk, SOCK_DEAD))
 		sk->sk_error_report(sk);
@@ -5699,11 +5701,9 @@
 
 				/* tcp_ack considers this ACK as duplicate
 				 * and does not calculate rtt.
-				 * Fix it at least with timestamps.
+				 * Force it here.
 				 */
-				if (tp->rx_opt.saw_tstamp &&
-				    tp->rx_opt.rcv_tsecr && !tp->srtt)
-					tcp_ack_saw_tstamp(sk, 0);
+				tcp_ack_update_rtt(sk, 0, 0);
 
 				if (tp->rx_opt.tstamp_ok)
 					tp->advmss -= TCPOLEN_TSTAMP_ALIGNED;
--- linux-mvl-dove-2.6.32.orig/net/ipv4/ip_gre.c
+++ linux-mvl-dove-2.6.32/net/ipv4/ip_gre.c
@@ -1665,14 +1665,15 @@
 
 	printk(KERN_INFO "GRE over IPv4 tunneling driver\n");
 
-	if (inet_add_protocol(&ipgre_protocol, IPPROTO_GRE) < 0) {
-		printk(KERN_INFO "ipgre init: can't add protocol\n");
-		return -EAGAIN;
-	}
-
 	err = register_pernet_gen_device(&ipgre_net_id, &ipgre_net_ops);
 	if (err < 0)
-		goto gen_device_failed;
+		return err;
+
+	err = inet_add_protocol(&ipgre_protocol, IPPROTO_GRE);
+	if (err < 0) {
+		printk(KERN_INFO "ipgre init: can't add protocol\n");
+		goto add_proto_failed;
+	}
 
 	err = rtnl_link_register(&ipgre_link_ops);
 	if (err < 0)
@@ -1688,9 +1689,9 @@
 tap_ops_failed:
 	rtnl_link_unregister(&ipgre_link_ops);
 rtnl_link_failed:
-	unregister_pernet_gen_device(ipgre_net_id, &ipgre_net_ops);
-gen_device_failed:
 	inet_del_protocol(&ipgre_protocol, IPPROTO_GRE);
+add_proto_failed:
+	unregister_pernet_gen_device(ipgre_net_id, &ipgre_net_ops);
 	goto out;
 }
 
@@ -1698,9 +1699,9 @@
 {
 	rtnl_link_unregister(&ipgre_tap_ops);
 	rtnl_link_unregister(&ipgre_link_ops);
-	unregister_pernet_gen_device(ipgre_net_id, &ipgre_net_ops);
 	if (inet_del_protocol(&ipgre_protocol, IPPROTO_GRE) < 0)
 		printk(KERN_INFO "ipgre close: can't remove protocol\n");
+	unregister_pernet_gen_device(ipgre_net_id, &ipgre_net_ops);
 }
 
 module_init(ipgre_init);
@@ -1708,3 +1709,4 @@
 MODULE_LICENSE("GPL");
 MODULE_ALIAS_RTNL_LINK("gre");
 MODULE_ALIAS_RTNL_LINK("gretap");
+MODULE_ALIAS_NETDEV("gre0");
--- linux-mvl-dove-2.6.32.orig/net/ipv4/fib_frontend.c
+++ linux-mvl-dove-2.6.32/net/ipv4/fib_frontend.c
@@ -251,6 +251,8 @@
 	if (in_dev) {
 		no_addr = in_dev->ifa_list == NULL;
 		rpf = IN_DEV_RPFILTER(in_dev);
+		if (mark && !IN_DEV_SRC_VMARK(in_dev))
+			fl.mark = 0;
 	}
 	rcu_read_unlock();
 
--- linux-mvl-dove-2.6.32.orig/net/ipv4/route.c
+++ linux-mvl-dove-2.6.32/net/ipv4/route.c
@@ -2712,6 +2712,11 @@
 
 EXPORT_SYMBOL_GPL(__ip_route_output_key);
 
+static struct dst_entry *ipv4_blackhole_dst_check(struct dst_entry *dst, u32 cookie)
+{
+	return NULL;
+}
+
 static void ipv4_rt_blackhole_update_pmtu(struct dst_entry *dst, u32 mtu)
 {
 }
@@ -2720,7 +2725,7 @@
 	.family			=	AF_INET,
 	.protocol		=	cpu_to_be16(ETH_P_IP),
 	.destroy		=	ipv4_dst_destroy,
-	.check			=	ipv4_dst_check,
+	.check			=	ipv4_blackhole_dst_check,
 	.update_pmtu		=	ipv4_rt_blackhole_update_pmtu,
 	.entries		=	ATOMIC_INIT(0),
 };
--- linux-mvl-dove-2.6.32.orig/net/ipv4/tcp.c
+++ linux-mvl-dove-2.6.32/net/ipv4/tcp.c
@@ -386,8 +386,6 @@
 	 */
 
 	mask = 0;
-	if (sk->sk_err)
-		mask = POLLERR;
 
 	/*
 	 * POLLHUP is certainly not done right. But poll() doesn't
@@ -451,11 +449,17 @@
 				if (sk_stream_wspace(sk) >= sk_stream_min_wspace(sk))
 					mask |= POLLOUT | POLLWRNORM;
 			}
-		}
+		} else
+			mask |= POLLOUT | POLLWRNORM;
 
 		if (tp->urg_data & TCP_URG_VALID)
 			mask |= POLLPRI;
 	}
+	/* This barrier is coupled with smp_wmb() in tcp_reset() */
+	smp_rmb();
+	if (sk->sk_err)
+		mask |= POLLERR;
+
 	return mask;
 }
 
@@ -934,7 +938,7 @@
 		goto out_err;
 
 	while (--iovlen >= 0) {
-		int seglen = iov->iov_len;
+		size_t seglen = iov->iov_len;
 		unsigned char __user *from = iov->iov_base;
 
 		iov++;
@@ -1334,6 +1338,7 @@
 		sk_eat_skb(sk, skb, 0);
 		if (!desc->count)
 			break;
+		tp->copied_seq = seq;
 	}
 	tp->copied_seq = seq;
 
@@ -1975,11 +1980,8 @@
 		}
 	}
 	if (sk->sk_state != TCP_CLOSE) {
-		int orphan_count = percpu_counter_read_positive(
-						sk->sk_prot->orphan_count);
-
 		sk_mem_reclaim(sk);
-		if (tcp_too_many_orphans(sk, orphan_count)) {
+		if (tcp_too_many_orphans(sk, 0)) {
 			if (net_ratelimit())
 				printk(KERN_INFO "TCP: too many of orphaned "
 				       "sockets\n");
@@ -2115,7 +2117,7 @@
 		/* Values greater than interface MTU won't take effect. However
 		 * at the point when this call is done we typically don't yet
 		 * know which interface is going to be used */
-		if (val < 8 || val > MAX_TCP_WINDOW) {
+		if (val < TCP_MIN_MSS || val > MAX_TCP_WINDOW) {
 			err = -EINVAL;
 			break;
 		}
@@ -2880,7 +2882,7 @@
 {
 	struct sk_buff *skb = NULL;
 	unsigned long nr_pages, limit;
-	int order, i, max_share;
+	int i, max_share, cnt;
 
 	BUILD_BUG_ON(sizeof(struct tcp_skb_cb) > sizeof(skb->cb));
 
@@ -2929,31 +2931,23 @@
 		INIT_HLIST_HEAD(&tcp_hashinfo.bhash[i].chain);
 	}
 
-	/* Try to be a bit smarter and adjust defaults depending
-	 * on available memory.
-	 */
-	for (order = 0; ((1 << order) << PAGE_SHIFT) <
-			(tcp_hashinfo.bhash_size * sizeof(struct inet_bind_hashbucket));
-			order++)
-		;
-	if (order >= 4) {
-		tcp_death_row.sysctl_max_tw_buckets = 180000;
-		sysctl_tcp_max_orphans = 4096 << (order - 4);
-		sysctl_max_syn_backlog = 1024;
-	} else if (order < 3) {
-		tcp_death_row.sysctl_max_tw_buckets >>= (3 - order);
-		sysctl_tcp_max_orphans >>= (3 - order);
-		sysctl_max_syn_backlog = 128;
-	}
+
+	cnt = tcp_hashinfo.ehash_size;
+
+	tcp_death_row.sysctl_max_tw_buckets = cnt / 2;
+	sysctl_tcp_max_orphans = cnt / 2;
+	sysctl_max_syn_backlog = max(128, cnt / 256);
 
 	/* Set the pressure threshold to be a fraction of global memory that
 	 * is up to 1/2 at 256 MB, decreasing toward zero with the amount of
-	 * memory, with a floor of 128 pages.
+	 * memory, with a floor of 128 pages, and a ceiling that prevents an
+	 * integer overflow.
 	 */
 	nr_pages = totalram_pages - totalhigh_pages;
 	limit = min(nr_pages, 1UL<<(28-PAGE_SHIFT)) >> (20-PAGE_SHIFT);
 	limit = (limit * (nr_pages >> (20-PAGE_SHIFT))) >> (PAGE_SHIFT-11);
 	limit = max(limit, 128UL);
+	limit = min(limit, INT_MAX * 4UL / 3 / 2);
 	sysctl_tcp_mem[0] = limit / 4 * 3;
 	sysctl_tcp_mem[1] = limit;
 	sysctl_tcp_mem[2] = sysctl_tcp_mem[0] * 2;
--- linux-mvl-dove-2.6.32.orig/net/ipv4/tcp_ipv4.c
+++ linux-mvl-dove-2.6.32/net/ipv4/tcp_ipv4.c
@@ -1634,8 +1634,10 @@
 			if (!tcp_prequeue(sk, skb))
 				ret = tcp_v4_do_rcv(sk, skb);
 		}
-	} else
-		sk_add_backlog(sk, skb);
+	} else if (sk_add_backlog(sk, skb)) {
+		bh_unlock_sock(sk);
+		goto discard_and_relse;
+	}
 	bh_unlock_sock(sk);
 
 	sock_put(sk);
@@ -1884,6 +1886,37 @@
 
 EXPORT_SYMBOL(tcp_v4_destroy_sock);
 
+/*
+ * tcp_v4_nuke_addr - destroy all sockets on the given local address
+ */
+void tcp_v4_nuke_addr(__u32 saddr)
+{
+	unsigned int bucket;
+
+	for (bucket = 0; bucket < tcp_hashinfo.ehash_size; bucket++) {
+		struct hlist_nulls_node *node;
+		struct sock *sk;
+		spinlock_t *lock = inet_ehash_lockp(&tcp_hashinfo, bucket);
+
+		spin_lock_bh(lock);
+		sk_nulls_for_each(sk, node, &tcp_hashinfo.ehash[bucket].chain) {
+			struct inet_sock *inet = inet_sk(sk);
+
+			if (inet->rcv_saddr != saddr)
+				continue;
+			if (sysctl_ip_dynaddr && sk->sk_state == TCP_SYN_SENT)
+				continue;
+			if (sock_flag(sk, SOCK_DEAD))
+				continue;
+
+			sk->sk_err = ETIMEDOUT;
+			sk->sk_error_report(sk);
+			tcp_done(sk);
+		}
+		spin_unlock_bh(lock);
+	}
+}
+
 #ifdef CONFIG_PROC_FS
 /* Proc filesystem TCP sock list dumping. */
 
--- linux-mvl-dove-2.6.32.orig/net/ipv4/af_inet.c
+++ linux-mvl-dove-2.6.32/net/ipv4/af_inet.c
@@ -116,6 +116,21 @@
 #include <linux/mroute.h>
 #endif
 
+#ifdef CONFIG_ANDROID_PARANOID_NETWORK
+#include <linux/android_aid.h>
+
+static inline int current_has_network(void)
+{
+	return in_egroup_p(AID_INET) || capable(CAP_NET_RAW);
+}
+#else
+static inline int current_has_network(void)
+{
+	return 1;
+}
+#endif
+
+extern void ip_mc_drop_socket(struct sock *sk);
 
 /* The inetsw table contains everything that inet_create needs to
  * build a new socket.
@@ -258,6 +273,7 @@
 	return ipprot->netns_ok;
 }
 
+
 /*
  *	Create an inet socket.
  */
@@ -273,6 +289,9 @@
 	int try_loading_module = 0;
 	int err;
 
+	if (!current_has_network())
+		return -EACCES;
+
 	if (unlikely(!inet_ehash_secret))
 		if (sock->type != SOCK_RAW && sock->type != SOCK_DGRAM)
 			build_ehash_secret();
@@ -460,6 +479,9 @@
 	if (addr_len < sizeof(struct sockaddr_in))
 		goto out;
 
+	if (addr->sin_family != AF_INET)
+		goto out;
+
 	chk_addr_ret = inet_addr_type(sock_net(sk), addr->sin_addr.s_addr);
 
 	/* Not specified by any standard per-se, however it breaks too
--- linux-mvl-dove-2.6.32.orig/net/ipv4/igmp.c
+++ linux-mvl-dove-2.6.32/net/ipv4/igmp.c
@@ -946,7 +946,6 @@
 		break;
 	case IGMP_HOST_MEMBERSHIP_REPORT:
 	case IGMPV2_HOST_MEMBERSHIP_REPORT:
-	case IGMPV3_HOST_MEMBERSHIP_REPORT:
 		/* Is it our report looped back? */
 		if (skb_rtable(skb)->fl.iif == 0)
 			break;
@@ -960,6 +959,7 @@
 		in_dev_put(in_dev);
 		return pim_rcv_v1(skb);
 #endif
+	case IGMPV3_HOST_MEMBERSHIP_REPORT:
 	case IGMP_DVMRP:
 	case IGMP_TRACE:
 	case IGMP_HOST_LEAVE_MESSAGE:
--- linux-mvl-dove-2.6.32.orig/net/ipv4/ipip.c
+++ linux-mvl-dove-2.6.32/net/ipv4/ipip.c
@@ -830,15 +830,14 @@
 
 	printk(banner);
 
-	if (xfrm4_tunnel_register(&ipip_handler, AF_INET)) {
+	err = register_pernet_gen_device(&ipip_net_id, &ipip_net_ops);
+	if (err < 0)
+		return err;
+	err = xfrm4_tunnel_register(&ipip_handler, AF_INET);
+	if (err < 0) {
+		unregister_pernet_device(&ipip_net_ops);
 		printk(KERN_INFO "ipip init: can't register tunnel\n");
-		return -EAGAIN;
 	}
-
-	err = register_pernet_gen_device(&ipip_net_id, &ipip_net_ops);
-	if (err)
-		xfrm4_tunnel_deregister(&ipip_handler, AF_INET);
-
 	return err;
 }
 
@@ -853,3 +852,4 @@
 module_init(ipip_init);
 module_exit(ipip_fini);
 MODULE_LICENSE("GPL");
+MODULE_ALIAS_NETDEV("tunl0");
--- linux-mvl-dove-2.6.32.orig/net/ipv4/sysfs_net_ipv4.c
+++ linux-mvl-dove-2.6.32/net/ipv4/sysfs_net_ipv4.c
@@ -0,0 +1,88 @@
+/*
+ * net/ipv4/sysfs_net_ipv4.c
+ *
+ * sysfs-based networking knobs (so we can, unlike with sysctl, control perms)
+ *
+ * Copyright (C) 2008 Google, Inc.
+ *
+ * Robert Love <rlove@google.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kobject.h>
+#include <linux/string.h>
+#include <linux/sysfs.h>
+#include <linux/init.h>
+#include <net/tcp.h>
+
+#define CREATE_IPV4_FILE(_name, _var) \
+static ssize_t _name##_show(struct kobject *kobj, \
+			    struct kobj_attribute *attr, char *buf) \
+{ \
+	return sprintf(buf, "%d\n", _var); \
+} \
+static ssize_t _name##_store(struct kobject *kobj, \
+			     struct kobj_attribute *attr, \
+			     const char *buf, size_t count) \
+{ \
+	int val, ret; \
+	ret = sscanf(buf, "%d", &val); \
+	if (ret != 1) \
+		return -EINVAL; \
+	if (val < 0) \
+		return -EINVAL; \
+	_var = val; \
+	return count; \
+} \
+static struct kobj_attribute _name##_attr = \
+	__ATTR(_name, 0644, _name##_show, _name##_store)
+
+CREATE_IPV4_FILE(tcp_wmem_min, sysctl_tcp_wmem[0]);
+CREATE_IPV4_FILE(tcp_wmem_def, sysctl_tcp_wmem[1]);
+CREATE_IPV4_FILE(tcp_wmem_max, sysctl_tcp_wmem[2]);
+
+CREATE_IPV4_FILE(tcp_rmem_min, sysctl_tcp_rmem[0]);
+CREATE_IPV4_FILE(tcp_rmem_def, sysctl_tcp_rmem[1]);
+CREATE_IPV4_FILE(tcp_rmem_max, sysctl_tcp_rmem[2]);
+
+static struct attribute *ipv4_attrs[] = {
+	&tcp_wmem_min_attr.attr,
+	&tcp_wmem_def_attr.attr,
+	&tcp_wmem_max_attr.attr,
+	&tcp_rmem_min_attr.attr,
+	&tcp_rmem_def_attr.attr,
+	&tcp_rmem_max_attr.attr,
+	NULL
+};
+
+static struct attribute_group ipv4_attr_group = {
+	.attrs = ipv4_attrs,
+};
+
+static __init int sysfs_ipv4_init(void)
+{
+	struct kobject *ipv4_kobject;
+	int ret;
+
+	ipv4_kobject = kobject_create_and_add("ipv4", kernel_kobj);
+	if (!ipv4_kobject)
+		return -ENOMEM;
+
+	ret = sysfs_create_group(ipv4_kobject, &ipv4_attr_group);
+	if (ret) {
+		kobject_put(ipv4_kobject);
+		return ret;
+	}
+
+	return 0;
+}
+
+subsys_initcall(sysfs_ipv4_init);
--- linux-mvl-dove-2.6.32.orig/net/ipv4/netfilter/nf_conntrack_l3proto_ipv4.c
+++ linux-mvl-dove-2.6.32/net/ipv4/netfilter/nf_conntrack_l3proto_ipv4.c
@@ -213,7 +213,7 @@
 	{
 		.ctl_name	= NET_IPV4_NF_CONNTRACK_BUCKETS,
 		.procname	= "ip_conntrack_buckets",
-		.data		= &nf_conntrack_htable_size,
+		.data		= &init_net.ct.htable_size,
 		.maxlen		= sizeof(unsigned int),
 		.mode		= 0444,
 		.proc_handler	= proc_dointvec,
--- linux-mvl-dove-2.6.32.orig/net/ipv4/netfilter/arp_tables.c
+++ linux-mvl-dove-2.6.32/net/ipv4/netfilter/arp_tables.c
@@ -925,10 +925,10 @@
 	if (t && !IS_ERR(t)) {
 		struct arpt_getinfo info;
 		const struct xt_table_info *private = t->private;
-
 #ifdef CONFIG_COMPAT
+		struct xt_table_info tmp;
+
 		if (compat) {
-			struct xt_table_info tmp;
 			ret = compat_table_info(private, &tmp);
 			xt_compat_flush_offsets(NFPROTO_ARP);
 			private = &tmp;
@@ -1086,6 +1086,7 @@
 	/* overflow check */
 	if (tmp.num_counters >= INT_MAX / sizeof(struct xt_counters))
 		return -ENOMEM;
+	tmp.name[sizeof(tmp.name)-1] = 0;
 
 	newinfo = xt_alloc_table_info(tmp.size);
 	if (!newinfo)
@@ -1508,6 +1509,7 @@
 		return -ENOMEM;
 	if (tmp.num_counters >= INT_MAX / sizeof(struct xt_counters))
 		return -ENOMEM;
+	tmp.name[sizeof(tmp.name)-1] = 0;
 
 	newinfo = xt_alloc_table_info(tmp.size);
 	if (!newinfo)
@@ -1763,6 +1765,7 @@
 			ret = -EFAULT;
 			break;
 		}
+		rev.name[sizeof(rev.name)-1] = 0;
 
 		try_then_request_module(xt_find_revision(NFPROTO_ARP, rev.name,
 							 rev.revision, 1, &ret),
--- linux-mvl-dove-2.6.32.orig/net/ipv4/netfilter/nf_defrag_ipv4.c
+++ linux-mvl-dove-2.6.32/net/ipv4/netfilter/nf_defrag_ipv4.c
@@ -14,6 +14,7 @@
 #include <net/route.h>
 #include <net/ip.h>
 
+#include <linux/netfilter_bridge.h>
 #include <linux/netfilter_ipv4.h>
 #include <net/netfilter/ipv4/nf_defrag_ipv4.h>
 
@@ -34,6 +35,20 @@
 	return err;
 }
 
+static enum ip_defrag_users nf_ct_defrag_user(unsigned int hooknum,
+					      struct sk_buff *skb)
+{
+#ifdef CONFIG_BRIDGE_NETFILTER
+	if (skb->nf_bridge &&
+	    skb->nf_bridge->mask & BRNF_NF_BRIDGE_PREROUTING)
+		return IP_DEFRAG_CONNTRACK_BRIDGE_IN;
+#endif
+	if (hooknum == NF_INET_PRE_ROUTING)
+		return IP_DEFRAG_CONNTRACK_IN;
+	else
+		return IP_DEFRAG_CONNTRACK_OUT;
+}
+
 static unsigned int ipv4_conntrack_defrag(unsigned int hooknum,
 					  struct sk_buff *skb,
 					  const struct net_device *in,
@@ -50,10 +65,8 @@
 #endif
 	/* Gather fragments. */
 	if (ip_hdr(skb)->frag_off & htons(IP_MF | IP_OFFSET)) {
-		if (nf_ct_ipv4_gather_frags(skb,
-					    hooknum == NF_INET_PRE_ROUTING ?
-					    IP_DEFRAG_CONNTRACK_IN :
-					    IP_DEFRAG_CONNTRACK_OUT))
+		enum ip_defrag_users user = nf_ct_defrag_user(hooknum, skb);
+		if (nf_ct_ipv4_gather_frags(skb, user))
 			return NF_STOLEN;
 	}
 	return NF_ACCEPT;
--- linux-mvl-dove-2.6.32.orig/net/ipv4/netfilter/ip_tables.c
+++ linux-mvl-dove-2.6.32/net/ipv4/netfilter/ip_tables.c
@@ -1132,10 +1132,10 @@
 	if (t && !IS_ERR(t)) {
 		struct ipt_getinfo info;
 		const struct xt_table_info *private = t->private;
-
 #ifdef CONFIG_COMPAT
+		struct xt_table_info tmp;
+
 		if (compat) {
-			struct xt_table_info tmp;
 			ret = compat_table_info(private, &tmp);
 			xt_compat_flush_offsets(AF_INET);
 			private = &tmp;
@@ -1290,6 +1290,7 @@
 	/* overflow check */
 	if (tmp.num_counters >= INT_MAX / sizeof(struct xt_counters))
 		return -ENOMEM;
+	tmp.name[sizeof(tmp.name)-1] = 0;
 
 	newinfo = xt_alloc_table_info(tmp.size);
 	if (!newinfo)
@@ -1820,6 +1821,7 @@
 		return -ENOMEM;
 	if (tmp.num_counters >= INT_MAX / sizeof(struct xt_counters))
 		return -ENOMEM;
+	tmp.name[sizeof(tmp.name)-1] = 0;
 
 	newinfo = xt_alloc_table_info(tmp.size);
 	if (!newinfo)
@@ -2044,6 +2046,7 @@
 			ret = -EFAULT;
 			break;
 		}
+		rev.name[sizeof(rev.name)-1] = 0;
 
 		if (cmd == IPT_SO_GET_REVISION_TARGET)
 			target = 1;
--- linux-mvl-dove-2.6.32.orig/net/ipv4/netfilter/nf_nat_core.c
+++ linux-mvl-dove-2.6.32/net/ipv4/netfilter/nf_nat_core.c
@@ -35,9 +35,6 @@
 
 static struct nf_conntrack_l3proto *l3proto __read_mostly;
 
-/* Calculated at init based on memory size */
-static unsigned int nf_nat_htable_size __read_mostly;
-
 #define MAX_IP_NAT_PROTO 256
 static const struct nf_nat_protocol *nf_nat_protos[MAX_IP_NAT_PROTO]
 						__read_mostly;
@@ -72,7 +69,7 @@
 
 /* We keep an extra hash for each conntrack, for fast searching. */
 static inline unsigned int
-hash_by_src(const struct nf_conntrack_tuple *tuple)
+hash_by_src(const struct net *net, const struct nf_conntrack_tuple *tuple)
 {
 	unsigned int hash;
 
@@ -80,7 +77,7 @@
 	hash = jhash_3words((__force u32)tuple->src.u3.ip,
 			    (__force u32)tuple->src.u.all,
 			    tuple->dst.protonum, 0);
-	return ((u64)hash * nf_nat_htable_size) >> 32;
+	return ((u64)hash * net->ipv4.nat_htable_size) >> 32;
 }
 
 /* Is this tuple already taken? (not by us) */
@@ -147,7 +144,7 @@
 		     struct nf_conntrack_tuple *result,
 		     const struct nf_nat_range *range)
 {
-	unsigned int h = hash_by_src(tuple);
+	unsigned int h = hash_by_src(net, tuple);
 	const struct nf_conn_nat *nat;
 	const struct nf_conn *ct;
 	const struct hlist_node *n;
@@ -330,7 +327,7 @@
 	if (have_to_hash) {
 		unsigned int srchash;
 
-		srchash = hash_by_src(&ct->tuplehash[IP_CT_DIR_ORIGINAL].tuple);
+		srchash = hash_by_src(net, &ct->tuplehash[IP_CT_DIR_ORIGINAL].tuple);
 		spin_lock_bh(&nf_nat_lock);
 		/* nf_conntrack_alter_reply might re-allocate exntension aera */
 		nat = nfct_nat(ct);
@@ -679,8 +676,10 @@
 
 static int __net_init nf_nat_net_init(struct net *net)
 {
-	net->ipv4.nat_bysource = nf_ct_alloc_hashtable(&nf_nat_htable_size,
-						      &net->ipv4.nat_vmalloced, 0);
+	/* Leave them the same for the moment. */
+	net->ipv4.nat_htable_size = net->ct.htable_size;
+	net->ipv4.nat_bysource = nf_ct_alloc_hashtable(&net->ipv4.nat_htable_size,
+						       &net->ipv4.nat_vmalloced, 0);
 	if (!net->ipv4.nat_bysource)
 		return -ENOMEM;
 	return 0;
@@ -703,7 +702,7 @@
 	nf_ct_iterate_cleanup(net, &clean_nat, NULL);
 	synchronize_rcu();
 	nf_ct_free_hashtable(net->ipv4.nat_bysource, net->ipv4.nat_vmalloced,
-			     nf_nat_htable_size);
+			     net->ipv4.nat_htable_size);
 }
 
 static struct pernet_operations nf_nat_net_ops = {
@@ -724,9 +723,6 @@
 		return ret;
 	}
 
-	/* Leave them the same for the moment. */
-	nf_nat_htable_size = nf_conntrack_htable_size;
-
 	ret = register_pernet_subsys(&nf_nat_net_ops);
 	if (ret < 0)
 		goto cleanup_extend;
--- linux-mvl-dove-2.6.32.orig/net/ipv4/netfilter/nf_conntrack_l3proto_ipv4_compat.c
+++ linux-mvl-dove-2.6.32/net/ipv4/netfilter/nf_conntrack_l3proto_ipv4_compat.c
@@ -32,7 +32,7 @@
 	struct hlist_nulls_node *n;
 
 	for (st->bucket = 0;
-	     st->bucket < nf_conntrack_htable_size;
+	     st->bucket < net->ct.htable_size;
 	     st->bucket++) {
 		n = rcu_dereference(net->ct.hash[st->bucket].first);
 		if (!is_a_nulls(n))
@@ -50,7 +50,7 @@
 	head = rcu_dereference(head->next);
 	while (is_a_nulls(head)) {
 		if (likely(get_nulls_value(head) == st->bucket)) {
-			if (++st->bucket >= nf_conntrack_htable_size)
+			if (++st->bucket >= net->ct.htable_size)
 				return NULL;
 		}
 		head = rcu_dereference(net->ct.hash[st->bucket].first);
--- linux-mvl-dove-2.6.32.orig/net/ipv4/netfilter/ipt_CLUSTERIP.c
+++ linux-mvl-dove-2.6.32/net/ipv4/netfilter/ipt_CLUSTERIP.c
@@ -666,8 +666,11 @@
 	struct clusterip_config *c = pde->data;
 	unsigned long nodenum;
 
-	if (copy_from_user(buffer, input, PROC_WRITELEN))
+	if (size > PROC_WRITELEN)
+		return -EIO;
+	if (copy_from_user(buffer, input, size))
 		return -EFAULT;
+	buffer[size] = 0;
 
 	if (*buffer == '+') {
 		nodenum = simple_strtoul(buffer+1, NULL, 10);
--- linux-mvl-dove-2.6.32.orig/net/sunrpc/rpcb_clnt.c
+++ linux-mvl-dove-2.6.32/net/sunrpc/rpcb_clnt.c
@@ -533,7 +533,7 @@
 	u32 bind_version;
 	struct rpc_xprt *xprt;
 	struct rpc_clnt	*rpcb_clnt;
-	static struct rpcbind_args *map;
+	struct rpcbind_args *map;
 	struct rpc_task	*child;
 	struct sockaddr_storage addr;
 	struct sockaddr *sap = (struct sockaddr *)&addr;
--- linux-mvl-dove-2.6.32.orig/net/sunrpc/xprtsock.c
+++ linux-mvl-dove-2.6.32/net/sunrpc/xprtsock.c
@@ -238,7 +238,8 @@
 	 * State of TCP reply receive
 	 */
 	__be32			tcp_fraghdr,
-				tcp_xid;
+				tcp_xid,
+				tcp_calldir;
 
 	u32			tcp_offset,
 				tcp_reclen;
@@ -742,6 +743,8 @@
 	if (sk == NULL)
 		return;
 
+	transport->srcport = 0;
+
 	write_lock_bh(&sk->sk_callback_lock);
 	transport->inet = NULL;
 	transport->sock = NULL;
@@ -961,7 +964,7 @@
 {
 	size_t len, used;
 	u32 offset;
-	__be32	calldir;
+	char *p;
 
 	/*
 	 * We want transport->tcp_offset to be 8 at the end of this routine
@@ -970,26 +973,33 @@
 	 * transport->tcp_offset is 4 (after having already read the xid).
 	 */
 	offset = transport->tcp_offset - sizeof(transport->tcp_xid);
-	len = sizeof(calldir) - offset;
+	len = sizeof(transport->tcp_calldir) - offset;
 	dprintk("RPC:       reading CALL/REPLY flag (%Zu bytes)\n", len);
-	used = xdr_skb_read_bits(desc, &calldir, len);
+	p = ((char *) &transport->tcp_calldir) + offset;
+	used = xdr_skb_read_bits(desc, p, len);
 	transport->tcp_offset += used;
 	if (used != len)
 		return;
 	transport->tcp_flags &= ~TCP_RCV_READ_CALLDIR;
-	transport->tcp_flags |= TCP_RCV_COPY_CALLDIR;
-	transport->tcp_flags |= TCP_RCV_COPY_DATA;
 	/*
 	 * We don't yet have the XDR buffer, so we will write the calldir
 	 * out after we get the buffer from the 'struct rpc_rqst'
 	 */
-	if (ntohl(calldir) == RPC_REPLY)
+	switch (ntohl(transport->tcp_calldir)) {
+	case RPC_REPLY:
+		transport->tcp_flags |= TCP_RCV_COPY_CALLDIR;
+		transport->tcp_flags |= TCP_RCV_COPY_DATA;
 		transport->tcp_flags |= TCP_RPC_REPLY;
-	else
+		break;
+	case RPC_CALL:
+		transport->tcp_flags |= TCP_RCV_COPY_CALLDIR;
+		transport->tcp_flags |= TCP_RCV_COPY_DATA;
 		transport->tcp_flags &= ~TCP_RPC_REPLY;
-	dprintk("RPC:       reading %s CALL/REPLY flag %08x\n",
-			(transport->tcp_flags & TCP_RPC_REPLY) ?
-				"reply for" : "request with", calldir);
+		break;
+	default:
+		dprintk("RPC:       invalid request message type\n");
+		xprt_force_disconnect(&transport->xprt);
+	}
 	xs_tcp_check_fraghdr(transport);
 }
 
@@ -1009,12 +1019,10 @@
 		/*
 		 * Save the RPC direction in the XDR buffer
 		 */
-		__be32	calldir = transport->tcp_flags & TCP_RPC_REPLY ?
-					htonl(RPC_REPLY) : 0;
-
 		memcpy(rcvbuf->head[0].iov_base + transport->tcp_copied,
-			&calldir, sizeof(calldir));
-		transport->tcp_copied += sizeof(calldir);
+			&transport->tcp_calldir,
+			sizeof(transport->tcp_calldir));
+		transport->tcp_copied += sizeof(transport->tcp_calldir);
 		transport->tcp_flags &= ~TCP_RCV_COPY_CALLDIR;
 	}
 
@@ -1335,10 +1343,11 @@
 	if (!(xprt = xprt_from_sock(sk)))
 		goto out;
 	dprintk("RPC:       xs_tcp_state_change client %p...\n", xprt);
-	dprintk("RPC:       state %x conn %d dead %d zapped %d\n",
+	dprintk("RPC:       state %x conn %d dead %d zapped %d sk_shutdown %d\n",
 			sk->sk_state, xprt_connected(xprt),
 			sock_flag(sk, SOCK_DEAD),
-			sock_flag(sk, SOCK_ZAPPED));
+			sock_flag(sk, SOCK_ZAPPED),
+			sk->sk_shutdown);
 
 	switch (sk->sk_state) {
 	case TCP_ESTABLISHED:
@@ -1372,7 +1381,6 @@
 	case TCP_CLOSE_WAIT:
 		/* The server initiated a shutdown of the socket */
 		xprt_force_disconnect(xprt);
-	case TCP_SYN_SENT:
 		xprt->connect_cookie++;
 	case TCP_CLOSING:
 		/*
@@ -1809,16 +1817,32 @@
 {
 	unsigned int state = transport->inet->sk_state;
 
-	if (state == TCP_CLOSE && transport->sock->state == SS_UNCONNECTED)
-		return;
-	if ((1 << state) & (TCPF_ESTABLISHED|TCPF_SYN_SENT))
-		return;
+	if (state == TCP_CLOSE && transport->sock->state == SS_UNCONNECTED) {
+		/* we don't need to abort the connection if the socket
+		 * hasn't undergone a shutdown
+		 */
+		if (transport->inet->sk_shutdown == 0)
+			return;
+		dprintk("RPC:       %s: TCP_CLOSEd and sk_shutdown set to %d\n",
+				__func__, transport->inet->sk_shutdown);
+	}
+	if ((1 << state) & (TCPF_ESTABLISHED|TCPF_SYN_SENT)) {
+		/* we don't need to abort the connection if the socket
+		 * hasn't undergone a shutdown
+		 */
+		if (transport->inet->sk_shutdown == 0)
+			return;
+		dprintk("RPC:       %s: ESTABLISHED/SYN_SENT "
+				"sk_shutdown set to %d\n",
+				__func__, transport->inet->sk_shutdown);
+	}
 	xs_abort_connection(xprt, transport);
 }
 
 static int xs_tcp_finish_connecting(struct rpc_xprt *xprt, struct socket *sock)
 {
 	struct sock_xprt *transport = container_of(xprt, struct sock_xprt, xprt);
+	int ret = -ENOTCONN;
 
 	if (!transport->inet) {
 		struct sock *sk = sock->sk;
@@ -1850,12 +1874,22 @@
 	}
 
 	if (!xprt_bound(xprt))
-		return -ENOTCONN;
+		goto out;
 
 	/* Tell the socket layer to start connecting... */
 	xprt->stat.connect_count++;
 	xprt->stat.connect_start = jiffies;
-	return kernel_connect(sock, xs_addr(xprt), xprt->addrlen, O_NONBLOCK);
+	ret = kernel_connect(sock, xs_addr(xprt), xprt->addrlen, O_NONBLOCK);
+	switch (ret) {
+	case 0:
+	case -EINPROGRESS:
+		/* SYN_SENT! */
+		xprt->connect_cookie++;
+		if (xprt->reestablish_timeout < XS_TCP_INIT_REEST_TO)
+			xprt->reestablish_timeout = XS_TCP_INIT_REEST_TO;
+	}
+out:
+	return ret;
 }
 
 /**
@@ -1926,6 +1960,11 @@
 	case -EALREADY:
 		xprt_clear_connecting(xprt);
 		return;
+	case -EINVAL:
+		/* Happens, for instance, if the user specified a link
+		 * local IPv6 address without a scope-id.
+		 */
+		goto out;
 	}
 out_eagain:
 	status = -EAGAIN;
--- linux-mvl-dove-2.6.32.orig/net/sunrpc/cache.c
+++ linux-mvl-dove-2.6.32/net/sunrpc/cache.c
@@ -1234,8 +1234,10 @@
 	if (!cd || !try_module_get(cd->owner))
 		return -EACCES;
 	han = __seq_open_private(file, &cache_content_op, sizeof(*han));
-	if (han == NULL)
+	if (han == NULL) {
+		module_put(cd->owner);
 		return -ENOMEM;
+	}
 
 	han->cd = cd;
 	return 0;
--- linux-mvl-dove-2.6.32.orig/net/sunrpc/clnt.c
+++ linux-mvl-dove-2.6.32/net/sunrpc/clnt.c
@@ -938,7 +938,7 @@
 
 	dprintk("RPC: %5u rpc_buffer allocation failed\n", task->tk_pid);
 
-	if (RPC_IS_ASYNC(task) || !signalled()) {
+	if (RPC_IS_ASYNC(task) || !fatal_signal_pending(current)) {
 		task->tk_action = call_allocate;
 		rpc_delay(task, HZ>>4);
 		return;
--- linux-mvl-dove-2.6.32.orig/net/sunrpc/rpc_pipe.c
+++ linux-mvl-dove-2.6.32/net/sunrpc/rpc_pipe.c
@@ -47,7 +47,7 @@
 		return;
 	do {
 		msg = list_entry(head->next, struct rpc_pipe_msg, list);
-		list_del(&msg->list);
+		list_del_init(&msg->list);
 		msg->errno = err;
 		destroy_msg(msg);
 	} while (!list_empty(head));
@@ -207,7 +207,7 @@
 	if (msg != NULL) {
 		spin_lock(&inode->i_lock);
 		msg->errno = -EAGAIN;
-		list_del(&msg->list);
+		list_del_init(&msg->list);
 		spin_unlock(&inode->i_lock);
 		rpci->ops->destroy_msg(msg);
 	}
@@ -267,7 +267,7 @@
 	if (res < 0 || msg->len == msg->copied) {
 		filp->private_data = NULL;
 		spin_lock(&inode->i_lock);
-		list_del(&msg->list);
+		list_del_init(&msg->list);
 		spin_unlock(&inode->i_lock);
 		rpci->ops->destroy_msg(msg);
 	}
@@ -587,6 +587,8 @@
 	struct dentry *dentry;
 
 	dentry = __rpc_lookup_create(parent, name);
+	if (IS_ERR(dentry))
+		return dentry;
 	if (dentry->d_inode == NULL)
 		return dentry;
 	dput(dentry);
--- linux-mvl-dove-2.6.32.orig/net/sunrpc/svcsock.c
+++ linux-mvl-dove-2.6.32/net/sunrpc/svcsock.c
@@ -968,6 +968,7 @@
 	return len;
  err_delete:
 	set_bit(XPT_CLOSE, &svsk->sk_xprt.xpt_flags);
+	svc_xprt_received(&svsk->sk_xprt);
  err_again:
 	return -EAGAIN;
 }
--- linux-mvl-dove-2.6.32.orig/net/sunrpc/sched.c
+++ linux-mvl-dove-2.6.32/net/sunrpc/sched.c
@@ -613,32 +613,25 @@
 	BUG_ON(RPC_IS_QUEUED(task));
 
 	for (;;) {
+		void (*do_action)(struct rpc_task *);
 
 		/*
-		 * Execute any pending callback.
+		 * Execute any pending callback first.
 		 */
-		if (task->tk_callback) {
-			void (*save_callback)(struct rpc_task *);
-
+		do_action = task->tk_callback;
+		task->tk_callback = NULL;
+		if (do_action == NULL) {
 			/*
-			 * We set tk_callback to NULL before calling it,
-			 * in case it sets the tk_callback field itself:
+			 * Perform the next FSM step.
+			 * tk_action may be NULL if the task has been killed.
+			 * In particular, note that rpc_killall_tasks may
+			 * do this at any time, so beware when dereferencing.
 			 */
-			save_callback = task->tk_callback;
-			task->tk_callback = NULL;
-			save_callback(task);
-		}
-
-		/*
-		 * Perform the next FSM step.
-		 * tk_action may be NULL when the task has been killed
-		 * by someone else.
-		 */
-		if (!RPC_IS_QUEUED(task)) {
-			if (task->tk_action == NULL)
+			do_action = task->tk_action;
+			if (do_action == NULL)
 				break;
-			task->tk_action(task);
 		}
+		do_action(task);
 
 		/*
 		 * Lockless check for whether task is sleeping or not.
--- linux-mvl-dove-2.6.32.orig/net/sunrpc/svcauth_unix.c
+++ linux-mvl-dove-2.6.32/net/sunrpc/svcauth_unix.c
@@ -655,23 +655,25 @@
 		return NULL;
 }
 
-static int unix_gid_find(uid_t uid, struct group_info **gip,
-			 struct svc_rqst *rqstp)
+static struct group_info *unix_gid_find(uid_t uid, struct svc_rqst *rqstp)
 {
-	struct unix_gid *ug = unix_gid_lookup(uid);
+	struct unix_gid *ug;
+	struct group_info *gi;
+	int ret;
+
+	ug = unix_gid_lookup(uid);
 	if (!ug)
-		return -EAGAIN;
-	switch (cache_check(&unix_gid_cache, &ug->h, &rqstp->rq_chandle)) {
+		return ERR_PTR(-EAGAIN);
+	ret = cache_check(&unix_gid_cache, &ug->h, &rqstp->rq_chandle);
+	switch (ret) {
 	case -ENOENT:
-		*gip = NULL;
-		return 0;
+		return ERR_PTR(-ENOENT);
 	case 0:
-		*gip = ug->gi;
-		get_group_info(*gip);
+		gi = get_group_info(ug->gi);
 		cache_put(&ug->h, &unix_gid_cache);
-		return 0;
+		return gi;
 	default:
-		return -EAGAIN;
+		return ERR_PTR(-EAGAIN);
 	}
 }
 
@@ -681,6 +683,8 @@
 	struct sockaddr_in *sin;
 	struct sockaddr_in6 *sin6, sin6_storage;
 	struct ip_map *ipm;
+	struct group_info *gi;
+	struct svc_cred *cred = &rqstp->rq_cred;
 
 	switch (rqstp->rq_addr.ss_family) {
 	case AF_INET:
@@ -722,6 +726,17 @@
 			ip_map_cached_put(rqstp, ipm);
 			break;
 	}
+
+	gi = unix_gid_find(cred->cr_uid, rqstp);
+	switch (PTR_ERR(gi)) {
+	case -EAGAIN:
+		return SVC_DROP;
+	case -ENOENT:
+		break;
+	default:
+		put_group_info(cred->cr_group_info);
+		cred->cr_group_info = gi;
+	}
 	return SVC_OK;
 }
 
@@ -818,19 +833,11 @@
 	slen = svc_getnl(argv);			/* gids length */
 	if (slen > 16 || (len -= (slen + 2)*4) < 0)
 		goto badcred;
-	if (unix_gid_find(cred->cr_uid, &cred->cr_group_info, rqstp)
-	    == -EAGAIN)
+	cred->cr_group_info = groups_alloc(slen);
+	if (cred->cr_group_info == NULL)
 		return SVC_DROP;
-	if (cred->cr_group_info == NULL) {
-		cred->cr_group_info = groups_alloc(slen);
-		if (cred->cr_group_info == NULL)
-			return SVC_DROP;
-		for (i = 0; i < slen; i++)
-			GROUP_AT(cred->cr_group_info, i) = svc_getnl(argv);
-	} else {
-		for (i = 0; i < slen ; i++)
-			svc_getnl(argv);
-	}
+	for (i = 0; i < slen; i++)
+		GROUP_AT(cred->cr_group_info, i) = svc_getnl(argv);
 	if (svc_getu32(argv) != htonl(RPC_AUTH_NULL) || svc_getu32(argv) != 0) {
 		*authp = rpc_autherr_badverf;
 		return SVC_DENIED;
--- linux-mvl-dove-2.6.32.orig/net/sunrpc/svc_xprt.c
+++ linux-mvl-dove-2.6.32/net/sunrpc/svc_xprt.c
@@ -209,6 +209,7 @@
 	spin_lock(&svc_xprt_class_lock);
 	list_for_each_entry(xcl, &svc_xprt_class_list, xcl_list) {
 		struct svc_xprt *newxprt;
+		unsigned short newport;
 
 		if (strcmp(xprt_name, xcl->xcl_name))
 			continue;
@@ -227,8 +228,9 @@
 		spin_lock_bh(&serv->sv_lock);
 		list_add(&newxprt->xpt_list, &serv->sv_permsocks);
 		spin_unlock_bh(&serv->sv_lock);
+		newport = svc_xprt_local_port(newxprt);
 		clear_bit(XPT_BUSY, &newxprt->xpt_flags);
-		return svc_xprt_local_port(newxprt);
+		return newport;
 	}
  err:
 	spin_unlock(&svc_xprt_class_lock);
@@ -430,8 +432,13 @@
 {
 	BUG_ON(!test_bit(XPT_BUSY, &xprt->xpt_flags));
 	xprt->xpt_pool = NULL;
+	/* As soon as we clear busy, the xprt could be closed and
+	 * 'put', so we need a reference to call svc_xprt_enqueue with:
+	 */
+	svc_xprt_get(xprt);
 	clear_bit(XPT_BUSY, &xprt->xpt_flags);
 	svc_xprt_enqueue(xprt);
+	svc_xprt_put(xprt);
 }
 EXPORT_SYMBOL_GPL(svc_xprt_received);
 
@@ -711,7 +718,10 @@
 	spin_unlock_bh(&pool->sp_lock);
 
 	len = 0;
-	if (test_bit(XPT_LISTENER, &xprt->xpt_flags)) {
+	if (test_bit(XPT_CLOSE, &xprt->xpt_flags)) {
+		dprintk("svc_recv: found XPT_CLOSE\n");
+		svc_delete_xprt(xprt);
+	} else if (test_bit(XPT_LISTENER, &xprt->xpt_flags)) {
 		struct svc_xprt *newxpt;
 		newxpt = xprt->xpt_ops->xpo_accept(xprt);
 		if (newxpt) {
@@ -737,7 +747,7 @@
 			svc_xprt_received(newxpt);
 		}
 		svc_xprt_received(xprt);
-	} else if (!test_bit(XPT_CLOSE, &xprt->xpt_flags)) {
+	} else {
 		dprintk("svc: server %p, pool %u, transport %p, inuse=%d\n",
 			rqstp, pool->sp_id, xprt,
 			atomic_read(&xprt->xpt_ref.refcount));
@@ -750,11 +760,6 @@
 		dprintk("svc: got len=%d\n", len);
 	}
 
-	if (test_bit(XPT_CLOSE, &xprt->xpt_flags)) {
-		dprintk("svc_recv: found XPT_CLOSE\n");
-		svc_delete_xprt(xprt);
-	}
-
 	/* No data, incomplete (TCP) read, or accept() */
 	if (len == 0 || len == -EAGAIN) {
 		rqstp->rq_res.len = 0;
@@ -891,20 +896,18 @@
 	if (!test_and_set_bit(XPT_DETACHED, &xprt->xpt_flags))
 		list_del_init(&xprt->xpt_list);
 	/*
-	 * We used to delete the transport from whichever list
-	 * it's sk_xprt.xpt_ready node was on, but we don't actually
-	 * need to.  This is because the only time we're called
-	 * while still attached to a queue, the queue itself
-	 * is about to be destroyed (in svc_destroy).
+	 * The only time we're called while xpt_ready is still on a list
+	 * is while the list itself is about to be destroyed (in
+	 * svc_destroy).  BUT svc_xprt_enqueue could still be attempting
+	 * to add new entries to the sp_sockets list, so we can't leave
+	 * a freed xprt on it.
 	 */
+	list_del_init(&xprt->xpt_ready);
 	if (test_bit(XPT_TEMP, &xprt->xpt_flags))
 		serv->sv_tmpcnt--;
 
-	for (dr = svc_deferred_dequeue(xprt); dr;
-	     dr = svc_deferred_dequeue(xprt)) {
-		svc_xprt_put(xprt);
+	while ((dr = svc_deferred_dequeue(xprt)) != NULL)
 		kfree(dr);
-	}
 
 	svc_xprt_put(xprt);
 	spin_unlock_bh(&serv->sv_lock);
--- linux-mvl-dove-2.6.32.orig/net/sunrpc/auth_gss/auth_gss.c
+++ linux-mvl-dove-2.6.32/net/sunrpc/auth_gss/auth_gss.c
@@ -485,7 +485,7 @@
 	dprintk("RPC: %5u gss_refresh_upcall for uid %u\n", task->tk_pid,
 								cred->cr_uid);
 	gss_msg = gss_setup_upcall(task->tk_client, gss_auth, cred);
-	if (IS_ERR(gss_msg) == -EAGAIN) {
+	if (PTR_ERR(gss_msg) == -EAGAIN) {
 		/* XXX: warning on the first, under the assumption we
 		 * shouldn't normally hit this case on a refresh. */
 		warn_gssd();
@@ -548,13 +548,13 @@
 	}
 	inode = &gss_msg->inode->vfs_inode;
 	for (;;) {
-		prepare_to_wait(&gss_msg->waitqueue, &wait, TASK_INTERRUPTIBLE);
+		prepare_to_wait(&gss_msg->waitqueue, &wait, TASK_KILLABLE);
 		spin_lock(&inode->i_lock);
 		if (gss_msg->ctx != NULL || gss_msg->msg.errno < 0) {
 			break;
 		}
 		spin_unlock(&inode->i_lock);
-		if (signalled()) {
+		if (fatal_signal_pending(current)) {
 			err = -ERESTARTSYS;
 			goto out_intr;
 		}
@@ -644,7 +644,22 @@
 	p = gss_fill_context(p, end, ctx, gss_msg->auth->mech);
 	if (IS_ERR(p)) {
 		err = PTR_ERR(p);
-		gss_msg->msg.errno = (err == -EAGAIN) ? -EAGAIN : -EACCES;
+		switch (err) {
+		case -EACCES:
+			gss_msg->msg.errno = err;
+			err = mlen;
+			break;
+		case -EFAULT:
+		case -ENOMEM:
+		case -EINVAL:
+		case -ENOSYS:
+			gss_msg->msg.errno = -EAGAIN;
+			break;
+		default:
+			printk(KERN_CRIT "%s: bad return from "
+				"gss_fill_context: %ld\n", __func__, err);
+			BUG();
+		}
 		goto err_release_msg;
 	}
 	gss_msg->ctx = gss_get_ctx(ctx);
@@ -702,17 +717,18 @@
 	struct rpc_inode *rpci = RPC_I(inode);
 	struct gss_upcall_msg *gss_msg;
 
+restart:
 	spin_lock(&inode->i_lock);
-	while (!list_empty(&rpci->in_downcall)) {
+	list_for_each_entry(gss_msg, &rpci->in_downcall, list) {
 
-		gss_msg = list_entry(rpci->in_downcall.next,
-				struct gss_upcall_msg, list);
+		if (!list_empty(&gss_msg->msg.list))
+			continue;
 		gss_msg->msg.errno = -EPIPE;
 		atomic_inc(&gss_msg->count);
 		__gss_unhash_msg(gss_msg);
 		spin_unlock(&inode->i_lock);
 		gss_release_msg(gss_msg);
-		spin_lock(&inode->i_lock);
+		goto restart;
 	}
 	spin_unlock(&inode->i_lock);
 
@@ -1258,9 +1274,8 @@
 	rqstp->rq_release_snd_buf = priv_release_snd_buf;
 	return 0;
 out_free:
-	for (i--; i >= 0; i--) {
-		__free_page(rqstp->rq_enc_pages[i]);
-	}
+	rqstp->rq_enc_pages_num = i;
+	priv_release_snd_buf(rqstp);
 out:
 	return -EAGAIN;
 }
--- linux-mvl-dove-2.6.32.orig/net/sunrpc/auth_gss/gss_mech_switch.c
+++ linux-mvl-dove-2.6.32/net/sunrpc/auth_gss/gss_mech_switch.c
@@ -252,7 +252,7 @@
 		       struct gss_ctx		**ctx_id)
 {
 	if (!(*ctx_id = kzalloc(sizeof(**ctx_id), GFP_KERNEL)))
-		return GSS_S_FAILURE;
+		return -ENOMEM;
 	(*ctx_id)->mech_type = gss_mech_get(mech);
 
 	return mech->gm_ops
--- linux-mvl-dove-2.6.32.orig/net/sunrpc/auth_gss/gss_krb5_mech.c
+++ linux-mvl-dove-2.6.32/net/sunrpc/auth_gss/gss_krb5_mech.c
@@ -131,8 +131,10 @@
 	struct	krb5_ctx *ctx;
 	int tmp;
 
-	if (!(ctx = kzalloc(sizeof(*ctx), GFP_NOFS)))
+	if (!(ctx = kzalloc(sizeof(*ctx), GFP_NOFS))) {
+		p = ERR_PTR(-ENOMEM);
 		goto out_err;
+	}
 
 	p = simple_get_bytes(p, end, &ctx->initiate, sizeof(ctx->initiate));
 	if (IS_ERR(p))
--- linux-mvl-dove-2.6.32.orig/net/x25/x25_link.c
+++ linux-mvl-dove-2.6.32/net/x25/x25_link.c
@@ -391,8 +391,12 @@
 	write_lock_bh(&x25_neigh_list_lock);
 
 	list_for_each_safe(entry, tmp, &x25_neigh_list) {
+		struct net_device *dev;
+
 		nb = list_entry(entry, struct x25_neigh, node);
+		dev = nb->dev;
 		__x25_remove_neigh(nb);
+		dev_put(dev);
 	}
 	write_unlock_bh(&x25_neigh_list_lock);
 }
--- linux-mvl-dove-2.6.32.orig/net/x25/af_x25.c
+++ linux-mvl-dove-2.6.32/net/x25/af_x25.c
@@ -81,6 +81,41 @@
 };
 #endif
 
+
+int x25_parse_address_block(struct sk_buff *skb,
+		struct x25_address *called_addr,
+		struct x25_address *calling_addr)
+{
+	unsigned char len;
+	int needed;
+	int rc;
+
+	if (skb->len < 1) {
+		/* packet has no address block */
+		rc = 0;
+		goto empty;
+	}
+
+	len = *skb->data;
+	needed = 1 + (len >> 4) + (len & 0x0f);
+
+	if (skb->len < needed) {
+		/* packet is too short to hold the addresses it claims
+		   to hold */
+		rc = -1;
+		goto empty;
+	}
+
+	return x25_addr_ntoa(skb->data, called_addr, calling_addr);
+
+empty:
+	*called_addr->x25_addr = 0;
+	*calling_addr->x25_addr = 0;
+
+	return rc;
+}
+
+
 int x25_addr_ntoa(unsigned char *p, struct x25_address *called_addr,
 		  struct x25_address *calling_addr)
 {
@@ -871,16 +906,26 @@
 	/*
 	 *	Extract the X.25 addresses and convert them to ASCII strings,
 	 *	and remove them.
+	 *
+	 *	Address block is mandatory in call request packets
 	 */
-	addr_len = x25_addr_ntoa(skb->data, &source_addr, &dest_addr);
+	addr_len = x25_parse_address_block(skb, &source_addr, &dest_addr);
+	if (addr_len <= 0)
+		goto out_clear_request;
 	skb_pull(skb, addr_len);
 
 	/*
 	 *	Get the length of the facilities, skip past them for the moment
 	 *	get the call user data because this is needed to determine
 	 *	the correct listener
+	 *
+	 *	Facilities length is mandatory in call request packets
 	 */
+	if (skb->len < 1)
+		goto out_clear_request;
 	len = skb->data[0] + 1;
+	if (skb->len < len)
+		goto out_clear_request;
 	skb_pull(skb,len);
 
 	/*
--- linux-mvl-dove-2.6.32.orig/net/x25/x25_in.c
+++ linux-mvl-dove-2.6.32/net/x25/x25_in.c
@@ -89,6 +89,7 @@
 static int x25_state1_machine(struct sock *sk, struct sk_buff *skb, int frametype)
 {
 	struct x25_address source_addr, dest_addr;
+	int len;
 
 	switch (frametype) {
 		case X25_CALL_ACCEPTED: {
@@ -106,11 +107,19 @@
 			 *	Parse the data in the frame.
 			 */
 			skb_pull(skb, X25_STD_MIN_LEN);
-			skb_pull(skb, x25_addr_ntoa(skb->data, &source_addr, &dest_addr));
-			skb_pull(skb,
-				 x25_parse_facilities(skb, &x25->facilities,
+
+			len = x25_parse_address_block(skb, &source_addr,
+						&dest_addr);
+			if (len > 0)
+				skb_pull(skb, len);
+
+			len = x25_parse_facilities(skb, &x25->facilities,
 						&x25->dte_facilities,
-						&x25->vc_facil_mask));
+						&x25->vc_facil_mask);
+			if (len > 0)
+				skb_pull(skb, len);
+			else
+				return -1;
 			/*
 			 *	Copy any Call User Data.
 			 */
--- linux-mvl-dove-2.6.32.orig/net/x25/x25_dev.c
+++ linux-mvl-dove-2.6.32/net/x25/x25_dev.c
@@ -53,7 +53,7 @@
 		if (!sock_owned_by_user(sk)) {
 			queued = x25_process_rx_frame(sk, skb);
 		} else {
-			sk_add_backlog(sk, skb);
+			queued = !sk_add_backlog(sk, skb);
 		}
 		bh_unlock_sock(sk);
 		sock_put(sk);
--- linux-mvl-dove-2.6.32.orig/net/x25/x25_facilities.c
+++ linux-mvl-dove-2.6.32/net/x25/x25_facilities.c
@@ -35,7 +35,7 @@
 		struct x25_dte_facilities *dte_facs, unsigned long *vc_fac_mask)
 {
 	unsigned char *p = skb->data;
-	unsigned int len = *p++;
+	unsigned int len;
 
 	*vc_fac_mask = 0;
 
@@ -50,9 +50,19 @@
 	memset(dte_facs->called_ae, '\0', sizeof(dte_facs->called_ae));
 	memset(dte_facs->calling_ae, '\0', sizeof(dte_facs->calling_ae));
 
+	if (skb->len < 1)
+		return 0;
+
+	len = *p++;
+
+	if (len >= skb->len)
+		return -1;
+
 	while (len > 0) {
 		switch (*p & X25_FAC_CLASS_MASK) {
 		case X25_FAC_CLASS_A:
+			if (len < 2)
+				return 0;
 			switch (*p) {
 			case X25_FAC_REVERSE:
 				if((p[1] & 0x81) == 0x81) {
@@ -96,6 +106,8 @@
 			len -= 2;
 			break;
 		case X25_FAC_CLASS_B:
+			if (len < 3)
+				return 0;
 			switch (*p) {
 			case X25_FAC_PACKET_SIZE:
 				facilities->pacsize_in  = p[1];
@@ -117,6 +129,8 @@
 			len -= 3;
 			break;
 		case X25_FAC_CLASS_C:
+			if (len < 4)
+				return 0;
 			printk(KERN_DEBUG "X.25: unknown facility %02X, "
 			       "values %02X, %02X, %02X\n",
 			       p[0], p[1], p[2], p[3]);
@@ -124,26 +138,26 @@
 			len -= 4;
 			break;
 		case X25_FAC_CLASS_D:
+			if (len < p[1] + 2)
+				return 0;
 			switch (*p) {
 			case X25_FAC_CALLING_AE:
-				if (p[1] > X25_MAX_DTE_FACIL_LEN)
-					break;
+				if (p[1] > X25_MAX_DTE_FACIL_LEN || p[1] <= 1)
+					return 0;
 				dte_facs->calling_len = p[2];
 				memcpy(dte_facs->calling_ae, &p[3], p[1] - 1);
 				*vc_fac_mask |= X25_MASK_CALLING_AE;
 				break;
 			case X25_FAC_CALLED_AE:
-				if (p[1] > X25_MAX_DTE_FACIL_LEN)
-					break;
+				if (p[1] > X25_MAX_DTE_FACIL_LEN || p[1] <= 1)
+					return 0;
 				dte_facs->called_len = p[2];
 				memcpy(dte_facs->called_ae, &p[3], p[1] - 1);
 				*vc_fac_mask |= X25_MASK_CALLED_AE;
 				break;
 			default:
 				printk(KERN_DEBUG "X.25: unknown facility %02X,"
-					"length %d, values %02X, %02X, "
-					"%02X, %02X\n",
-					p[0], p[1], p[2], p[3], p[4], p[5]);
+					"length %d\n", p[0], p[1]);
 				break;
 			}
 			len -= p[1] + 2;
@@ -247,6 +261,8 @@
 	memcpy(new, ours, sizeof(*new));
 
 	len = x25_parse_facilities(skb, &theirs, dte, &x25->vc_facil_mask);
+	if (len < 0)
+		return len;
 
 	/*
 	 *	They want reverse charging, we won't accept it.
--- linux-mvl-dove-2.6.32.orig/net/9p/trans_fd.c
+++ linux-mvl-dove-2.6.32/net/9p/trans_fd.c
@@ -948,7 +948,7 @@
 
 	csocket = NULL;
 
-	if (strlen(addr) > UNIX_PATH_MAX) {
+	if (strlen(addr) >= UNIX_PATH_MAX) {
 		P9_EPRINTK(KERN_ERR, "p9_trans_unix: address too long: %s\n",
 			addr);
 		err = -ENAMETOOLONG;
--- linux-mvl-dove-2.6.32.orig/net/ipv6/udp.c
+++ linux-mvl-dove-2.6.32/net/ipv6/udp.c
@@ -304,8 +304,11 @@
 	}
 	release_sock(sk);
 
-	if (flags & MSG_DONTWAIT)
+	if (noblock)
 		return -EAGAIN;
+
+	/* starting over for a new packet */
+	msg->msg_flags &= ~MSG_TRUNC;
 	goto try_again;
 }
 
@@ -440,6 +443,41 @@
 	return NULL;
 }
 
+static void flush_stack(struct sock **stack, unsigned int count,
+			struct sk_buff *skb, unsigned int final)
+{
+	unsigned int i;
+	struct sock *sk;
+	struct sk_buff *skb1;
+
+	for (i = 0; i < count; i++) {
+		skb1 = (i == final) ? skb : skb_clone(skb, GFP_ATOMIC);
+
+		sk = stack[i];
+		if (skb1) {
+			if (sk_rcvqueues_full(sk, skb)) {
+				kfree_skb(skb1);
+				goto drop;
+			}
+			bh_lock_sock(sk);
+			if (!sock_owned_by_user(sk))
+				udpv6_queue_rcv_skb(sk, skb1);
+			else if (sk_add_backlog(sk, skb1)) {
+				kfree_skb(skb1);
+				bh_unlock_sock(sk);
+				goto drop;
+			}
+			bh_unlock_sock(sk);
+			continue;
+		}
+drop:
+		atomic_inc(&sk->sk_drops);
+		UDP6_INC_STATS_BH(sock_net(sk),
+				UDP_MIB_RCVBUFERRORS, IS_UDPLITE(sk));
+		UDP6_INC_STATS_BH(sock_net(sk),
+				UDP_MIB_INERRORS, IS_UDPLITE(sk));
+	}
+}
 /*
  * Note: called only from the BH handler context,
  * so we don't need to lock the hashes.
@@ -448,41 +486,43 @@
 		struct in6_addr *saddr, struct in6_addr *daddr,
 		struct udp_table *udptable)
 {
-	struct sock *sk, *sk2;
+	struct sock *sk, *stack[256 / sizeof(struct sock *)];
 	const struct udphdr *uh = udp_hdr(skb);
 	struct udp_hslot *hslot = &udptable->hash[udp_hashfn(net, ntohs(uh->dest))];
 	int dif;
+	unsigned int i, count = 0;
 
 	spin_lock(&hslot->lock);
 	sk = sk_nulls_head(&hslot->head);
 	dif = inet6_iif(skb);
 	sk = udp_v6_mcast_next(net, sk, uh->dest, daddr, uh->source, saddr, dif);
-	if (!sk) {
-		kfree_skb(skb);
-		goto out;
-	}
-
-	sk2 = sk;
-	while ((sk2 = udp_v6_mcast_next(net, sk_nulls_next(sk2), uh->dest, daddr,
-					uh->source, saddr, dif))) {
-		struct sk_buff *buff = skb_clone(skb, GFP_ATOMIC);
-		if (buff) {
-			bh_lock_sock(sk2);
-			if (!sock_owned_by_user(sk2))
-				udpv6_queue_rcv_skb(sk2, buff);
-			else
-				sk_add_backlog(sk2, buff);
-			bh_unlock_sock(sk2);
+	while (sk) {
+		stack[count++] = sk;
+		sk = udp_v6_mcast_next(net, sk_nulls_next(sk), uh->dest, daddr,
+				       uh->source, saddr, dif);
+		if (unlikely(count == ARRAY_SIZE(stack))) {
+			if (!sk)
+				break;
+			flush_stack(stack, count, skb, ~0);
+			count = 0;
 		}
 	}
-	bh_lock_sock(sk);
-	if (!sock_owned_by_user(sk))
-		udpv6_queue_rcv_skb(sk, skb);
-	else
-		sk_add_backlog(sk, skb);
-	bh_unlock_sock(sk);
-out:
+	/*
+	 * before releasing the lock, we must take reference on sockets
+	 */
+	for (i = 0; i < count; i++)
+		sock_hold(stack[i]);
+
 	spin_unlock(&hslot->lock);
+
+	if (count) {
+		flush_stack(stack, count, skb, count - 1);
+
+		for (i = 0; i < count; i++)
+			sock_put(stack[i]);
+	} else {
+		kfree_skb(skb);
+	}
 	return 0;
 }
 
@@ -595,11 +635,19 @@
 
 	/* deliver */
 
+	if (sk_rcvqueues_full(sk, skb)) {
+		sock_put(sk);
+		goto discard;
+	}
 	bh_lock_sock(sk);
 	if (!sock_owned_by_user(sk))
 		udpv6_queue_rcv_skb(sk, skb);
-	else
-		sk_add_backlog(sk, skb);
+	else if (sk_add_backlog(sk, skb)) {
+		atomic_inc(&sk->sk_drops);
+		bh_unlock_sock(sk);
+		sock_put(sk);
+		goto discard;
+	}
 	bh_unlock_sock(sk);
 	sock_put(sk);
 	return 0;
--- linux-mvl-dove-2.6.32.orig/net/ipv6/ip6_output.c
+++ linux-mvl-dove-2.6.32/net/ipv6/ip6_output.c
@@ -643,7 +643,7 @@
 
 	if (skb_has_frags(skb)) {
 		int first_len = skb_pagelen(skb);
-		int truesizes = 0;
+		struct sk_buff *frag2;
 
 		if (first_len - hlen > mtu ||
 		    ((first_len - hlen) & 7) ||
@@ -655,18 +655,18 @@
 			if (frag->len > mtu ||
 			    ((frag->len & 7) && frag->next) ||
 			    skb_headroom(frag) < hlen)
-			    goto slow_path;
+				goto slow_path_clean;
 
 			/* Partially cloned skb? */
 			if (skb_shared(frag))
-				goto slow_path;
+				goto slow_path_clean;
 
 			BUG_ON(frag->sk);
 			if (skb->sk) {
 				frag->sk = skb->sk;
 				frag->destructor = sock_wfree;
-				truesizes += frag->truesize;
 			}
+			skb->truesize -= frag->truesize;
 		}
 
 		err = 0;
@@ -697,7 +697,6 @@
 
 		first_len = skb_pagelen(skb);
 		skb->data_len = first_len - skb_headlen(skb);
-		skb->truesize -= truesizes;
 		skb->len = first_len;
 		ipv6_hdr(skb)->payload_len = htons(first_len -
 						   sizeof(struct ipv6hdr));
@@ -760,6 +759,15 @@
 			      IPSTATS_MIB_FRAGFAILS);
 		dst_release(&rt->u.dst);
 		return err;
+
+slow_path_clean:
+		skb_walk_frags(skb, frag2) {
+			if (frag2 == frag)
+				break;
+			frag2->sk = NULL;
+			frag2->destructor = NULL;
+			skb->truesize += frag2->truesize;
+		}
 	}
 
 slow_path:
--- linux-mvl-dove-2.6.32.orig/net/ipv6/af_inet6.c
+++ linux-mvl-dove-2.6.32/net/ipv6/af_inet6.c
@@ -62,6 +62,20 @@
 #include <asm/system.h>
 #include <linux/mroute6.h>
 
+#ifdef CONFIG_ANDROID_PARANOID_NETWORK
+#include <linux/android_aid.h>
+
+static inline int current_has_network(void)
+{
+	return in_egroup_p(AID_INET) || capable(CAP_NET_RAW);
+}
+#else
+static inline int current_has_network(void)
+{
+	return 1;
+}
+#endif
+
 MODULE_AUTHOR("Cast of dozens");
 MODULE_DESCRIPTION("IPv6 protocol stack for Linux");
 MODULE_LICENSE("GPL");
@@ -107,6 +121,9 @@
 	int try_loading_module = 0;
 	int err;
 
+	if (!current_has_network())
+		return -EACCES;
+
 	if (sock->type != SOCK_RAW &&
 	    sock->type != SOCK_DGRAM &&
 	    !inet_ehash_secret)
--- linux-mvl-dove-2.6.32.orig/net/ipv6/ip6_tunnel.c
+++ linux-mvl-dove-2.6.32/net/ipv6/ip6_tunnel.c
@@ -56,6 +56,7 @@
 MODULE_AUTHOR("Ville Nuorvala");
 MODULE_DESCRIPTION("IPv6 tunneling device");
 MODULE_LICENSE("GPL");
+MODULE_ALIAS_NETDEV("ip6tnl0");
 
 #define IPV6_TLV_TEL_DST_SIZE 8
 
@@ -1465,27 +1466,29 @@
 {
 	int  err;
 
-	if (xfrm6_tunnel_register(&ip4ip6_handler, AF_INET)) {
+	err = register_pernet_device(&ip6_tnl_net_ops);
+	if (err < 0)
+		goto out_pernet;
+
+	err = xfrm6_tunnel_register(&ip4ip6_handler, AF_INET);
+	if (err < 0) {
 		printk(KERN_ERR "ip6_tunnel init: can't register ip4ip6\n");
-		err = -EAGAIN;
-		goto out;
+		goto out_ip4ip6;
 	}
 
-	if (xfrm6_tunnel_register(&ip6ip6_handler, AF_INET6)) {
+	err = xfrm6_tunnel_register(&ip6ip6_handler, AF_INET6);
+	if (err < 0) {
 		printk(KERN_ERR "ip6_tunnel init: can't register ip6ip6\n");
-		err = -EAGAIN;
-		goto unreg_ip4ip6;
+		goto out_ip6ip6;
 	}
 
-	err = register_pernet_gen_device(&ip6_tnl_net_id, &ip6_tnl_net_ops);
-	if (err < 0)
-		goto err_pernet;
 	return 0;
-err_pernet:
-	xfrm6_tunnel_deregister(&ip6ip6_handler, AF_INET6);
-unreg_ip4ip6:
+
+out_ip6ip6:
 	xfrm6_tunnel_deregister(&ip4ip6_handler, AF_INET);
-out:
+out_ip4ip6:
+	unregister_pernet_device(&ip6_tnl_net_ops);
+out_pernet:
 	return err;
 }
 
--- linux-mvl-dove-2.6.32.orig/net/ipv6/addrconf.c
+++ linux-mvl-dove-2.6.32/net/ipv6/addrconf.c
@@ -407,9 +407,6 @@
 	    dev->type == ARPHRD_TUNNEL6 ||
 	    dev->type == ARPHRD_SIT ||
 	    dev->type == ARPHRD_NONE) {
-		printk(KERN_INFO
-		       "%s: Disabled Privacy Extensions\n",
-		       dev->name);
 		ndev->cnf.use_tempaddr = -1;
 	} else {
 		in6_dev_hold(ndev);
@@ -504,8 +501,11 @@
 	if (p == &net->ipv6.devconf_dflt->forwarding)
 		return 0;
 
-	if (!rtnl_trylock())
+	if (!rtnl_trylock()) {
+		/* Restore the original values before restarting */
+		*p = old;
 		return restart_syscall();
+	}
 
 	if (p == &net->ipv6.devconf_all->forwarding) {
 		__s32 newf = net->ipv6.devconf_all->forwarding;
@@ -3991,12 +3991,15 @@
 {
 	int *valp = ctl->data;
 	int val = *valp;
+	loff_t pos = *ppos;
 	int ret;
 
 	ret = proc_dointvec(ctl, write, buffer, lenp, ppos);
 
 	if (write)
 		ret = addrconf_fixup_forwarding(ctl, valp, val);
+	if (ret)
+		*ppos = pos;
 	return ret;
 }
 
@@ -4075,8 +4078,11 @@
 	if (p == &net->ipv6.devconf_dflt->disable_ipv6)
 		return 0;
 
-	if (!rtnl_trylock())
+	if (!rtnl_trylock()) {
+		/* Restore the original values before restarting */
+		*p = old;
 		return restart_syscall();
+	}
 
 	if (p == &net->ipv6.devconf_all->disable_ipv6) {
 		__s32 newf = net->ipv6.devconf_all->disable_ipv6;
@@ -4095,12 +4101,15 @@
 {
 	int *valp = ctl->data;
 	int val = *valp;
+	loff_t pos = *ppos;
 	int ret;
 
 	ret = proc_dointvec(ctl, write, buffer, lenp, ppos);
 
 	if (write)
 		ret = addrconf_disable_ipv6(ctl, valp, val);
+	if (ret)
+		*ppos = pos;
 	return ret;
 }
 
--- linux-mvl-dove-2.6.32.orig/net/ipv6/reassembly.c
+++ linux-mvl-dove-2.6.32/net/ipv6/reassembly.c
@@ -72,6 +72,7 @@
 	struct inet_frag_queue	q;
 
 	__be32			id;		/* fragment id		*/
+	u32			user;
 	struct in6_addr		saddr;
 	struct in6_addr		daddr;
 
@@ -141,7 +142,7 @@
 	struct ip6_create_arg *arg = a;
 
 	fq = container_of(q, struct frag_queue, q);
-	return (fq->id == arg->id &&
+	return (fq->id == arg->id && fq->user == arg->user &&
 			ipv6_addr_equal(&fq->saddr, arg->src) &&
 			ipv6_addr_equal(&fq->daddr, arg->dst));
 }
@@ -163,6 +164,7 @@
 	struct ip6_create_arg *arg = a;
 
 	fq->id = arg->id;
+	fq->user = arg->user;
 	ipv6_addr_copy(&fq->saddr, arg->src);
 	ipv6_addr_copy(&fq->daddr, arg->dst);
 }
@@ -244,6 +246,7 @@
 	unsigned int hash;
 
 	arg.id = id;
+	arg.user = IP6_DEFRAG_LOCAL_DELIVER;
 	arg.src = src;
 	arg.dst = dst;
 
--- linux-mvl-dove-2.6.32.orig/net/ipv6/sit.c
+++ linux-mvl-dove-2.6.32/net/ipv6/sit.c
@@ -1086,19 +1086,18 @@
 
 	printk(KERN_INFO "IPv6 over IPv4 tunneling driver\n");
 
-	if (xfrm4_tunnel_register(&sit_handler, AF_INET6) < 0) {
-		printk(KERN_INFO "sit init: Can't add protocol\n");
-		return -EAGAIN;
-	}
-
 	err = register_pernet_gen_device(&sit_net_id, &sit_net_ops);
 	if (err < 0)
-		xfrm4_tunnel_deregister(&sit_handler, AF_INET6);
-
+		return err;
+	err = xfrm4_tunnel_register(&sit_handler, AF_INET6);
+	if (err < 0) {
+		unregister_pernet_device(&sit_net_ops);
+		printk(KERN_INFO "sit init: Can't add protocol\n");
+	}
 	return err;
 }
 
 module_init(sit_init);
 module_exit(sit_cleanup);
 MODULE_LICENSE("GPL");
-MODULE_ALIAS("sit0");
+MODULE_ALIAS_NETDEV("sit0");
--- linux-mvl-dove-2.6.32.orig/net/ipv6/tcp_ipv6.c
+++ linux-mvl-dove-2.6.32/net/ipv6/tcp_ipv6.c
@@ -1685,8 +1685,10 @@
 			if (!tcp_prequeue(sk, skb))
 				ret = tcp_v6_do_rcv(sk, skb);
 		}
-	} else
-		sk_add_backlog(sk, skb);
+	} else if (sk_add_backlog(sk, skb)) {
+		bh_unlock_sock(sk);
+		goto discard_and_relse;
+	}
 	bh_unlock_sock(sk);
 
 	sock_put(sk);
--- linux-mvl-dove-2.6.32.orig/net/ipv6/xfrm6_tunnel.c
+++ linux-mvl-dove-2.6.32/net/ipv6/xfrm6_tunnel.c
@@ -344,32 +344,38 @@
 
 static int __init xfrm6_tunnel_init(void)
 {
-	if (xfrm_register_type(&xfrm6_tunnel_type, AF_INET6) < 0)
+	int rv;
+
+	rv = xfrm6_tunnel_spi_init();
+	if (rv < 0)
 		goto err;
-	if (xfrm6_tunnel_register(&xfrm6_tunnel_handler, AF_INET6))
-		goto unreg;
-	if (xfrm6_tunnel_register(&xfrm46_tunnel_handler, AF_INET))
-		goto dereg6;
-	if (xfrm6_tunnel_spi_init() < 0)
-		goto dereg46;
+	rv = xfrm_register_type(&xfrm6_tunnel_type, AF_INET6);
+	if (rv < 0)
+		goto out_type;
+	rv = xfrm6_tunnel_register(&xfrm6_tunnel_handler, AF_INET6);
+	if (rv < 0)
+		goto out_xfrm6;
+	rv = xfrm6_tunnel_register(&xfrm46_tunnel_handler, AF_INET);
+	if (rv < 0)
+		goto out_xfrm46;
 	return 0;
 
-dereg46:
-	xfrm6_tunnel_deregister(&xfrm46_tunnel_handler, AF_INET);
-dereg6:
+out_xfrm46:
 	xfrm6_tunnel_deregister(&xfrm6_tunnel_handler, AF_INET6);
-unreg:
+out_xfrm6:
 	xfrm_unregister_type(&xfrm6_tunnel_type, AF_INET6);
+out_type:
+	xfrm6_tunnel_spi_fini();
 err:
-	return -EAGAIN;
+	return rv;
 }
 
 static void __exit xfrm6_tunnel_fini(void)
 {
-	xfrm6_tunnel_spi_fini();
 	xfrm6_tunnel_deregister(&xfrm46_tunnel_handler, AF_INET);
 	xfrm6_tunnel_deregister(&xfrm6_tunnel_handler, AF_INET6);
 	xfrm_unregister_type(&xfrm6_tunnel_type, AF_INET6);
+	xfrm6_tunnel_spi_fini();
 }
 
 module_init(xfrm6_tunnel_init);
--- linux-mvl-dove-2.6.32.orig/net/ipv6/route.c
+++ linux-mvl-dove-2.6.32/net/ipv6/route.c
@@ -1561,14 +1561,13 @@
  *	i.e. Path MTU discovery
  */
 
-void rt6_pmtu_discovery(struct in6_addr *daddr, struct in6_addr *saddr,
-			struct net_device *dev, u32 pmtu)
+static void rt6_do_pmtu_disc(struct in6_addr *daddr, struct in6_addr *saddr,
+			     struct net *net, u32 pmtu, int ifindex)
 {
 	struct rt6_info *rt, *nrt;
-	struct net *net = dev_net(dev);
 	int allfrag = 0;
 
-	rt = rt6_lookup(net, daddr, saddr, dev->ifindex, 0);
+	rt = rt6_lookup(net, daddr, saddr, ifindex, 0);
 	if (rt == NULL)
 		return;
 
@@ -1636,6 +1635,27 @@
 	dst_release(&rt->u.dst);
 }
 
+void rt6_pmtu_discovery(struct in6_addr *daddr, struct in6_addr *saddr,
+			struct net_device *dev, u32 pmtu)
+{
+	struct net *net = dev_net(dev);
+
+	/*
+	 * RFC 1981 states that a node "MUST reduce the size of the packets it
+	 * is sending along the path" that caused the Packet Too Big message.
+	 * Since it's not possible in the general case to determine which
+	 * interface was used to send the original packet, we update the MTU
+	 * on the interface that will be used to send future packets. We also
+	 * update the MTU on the interface that received the Packet Too Big in
+	 * case the original packet was forced out that interface with
+	 * SO_BINDTODEVICE or similar. This is the next best thing to the
+	 * correct behaviour, which would be to update the MTU on all
+	 * interfaces.
+	 */
+	rt6_do_pmtu_disc(daddr, saddr, net, pmtu, 0);
+	rt6_do_pmtu_disc(daddr, saddr, net, pmtu, dev->ifindex);
+}
+
 /*
  *	Misc support functions
  */
--- linux-mvl-dove-2.6.32.orig/net/ipv6/exthdrs.c
+++ linux-mvl-dove-2.6.32/net/ipv6/exthdrs.c
@@ -559,6 +559,11 @@
 	return skb_dst(skb) ? ip6_dst_idev(skb_dst(skb)) : __in6_dev_get(skb->dev);
 }
 
+static inline struct net *ipv6_skb_net(struct sk_buff *skb)
+{
+	return skb_dst(skb) ? dev_net(skb_dst(skb)->dev) : dev_net(skb->dev);
+}
+
 /* Router Alert as of RFC 2711 */
 
 static int ipv6_hop_ra(struct sk_buff *skb, int optoff)
@@ -580,8 +585,8 @@
 static int ipv6_hop_jumbo(struct sk_buff *skb, int optoff)
 {
 	const unsigned char *nh = skb_network_header(skb);
+	struct net *net = ipv6_skb_net(skb);
 	u32 pkt_len;
-	struct net *net = dev_net(skb_dst(skb)->dev);
 
 	if (nh[optoff + 1] != 4 || (optoff & 3) != 2) {
 		LIMIT_NETDEBUG(KERN_DEBUG "ipv6_hop_jumbo: wrong jumbo opt length/alignment %d\n",
--- linux-mvl-dove-2.6.32.orig/net/ipv6/netfilter/ip6_tables.c
+++ linux-mvl-dove-2.6.32/net/ipv6/netfilter/ip6_tables.c
@@ -1164,10 +1164,10 @@
 	if (t && !IS_ERR(t)) {
 		struct ip6t_getinfo info;
 		const struct xt_table_info *private = t->private;
-
 #ifdef CONFIG_COMPAT
+		struct xt_table_info tmp;
+
 		if (compat) {
-			struct xt_table_info tmp;
 			ret = compat_table_info(private, &tmp);
 			xt_compat_flush_offsets(AF_INET6);
 			private = &tmp;
@@ -1323,6 +1323,7 @@
 	/* overflow check */
 	if (tmp.num_counters >= INT_MAX / sizeof(struct xt_counters))
 		return -ENOMEM;
+	tmp.name[sizeof(tmp.name)-1] = 0;
 
 	newinfo = xt_alloc_table_info(tmp.size);
 	if (!newinfo)
@@ -1855,6 +1856,7 @@
 		return -ENOMEM;
 	if (tmp.num_counters >= INT_MAX / sizeof(struct xt_counters))
 		return -ENOMEM;
+	tmp.name[sizeof(tmp.name)-1] = 0;
 
 	newinfo = xt_alloc_table_info(tmp.size);
 	if (!newinfo)
@@ -2079,6 +2081,7 @@
 			ret = -EFAULT;
 			break;
 		}
+		rev.name[sizeof(rev.name)-1] = 0;
 
 		if (cmd == IP6T_SO_GET_REVISION_TARGET)
 			target = 1;
--- linux-mvl-dove-2.6.32.orig/net/ipv6/netfilter/nf_conntrack_reasm.c
+++ linux-mvl-dove-2.6.32/net/ipv6/netfilter/nf_conntrack_reasm.c
@@ -63,6 +63,7 @@
 	struct inet_frag_queue	q;
 
 	__be32			id;		/* fragment id		*/
+	u32			user;
 	struct in6_addr		saddr;
 	struct in6_addr		daddr;
 
@@ -170,13 +171,14 @@
 /* Creation primitives. */
 
 static __inline__ struct nf_ct_frag6_queue *
-fq_find(__be32 id, struct in6_addr *src, struct in6_addr *dst)
+fq_find(__be32 id, u32 user, struct in6_addr *src, struct in6_addr *dst)
 {
 	struct inet_frag_queue *q;
 	struct ip6_create_arg arg;
 	unsigned int hash;
 
 	arg.id = id;
+	arg.user = user;
 	arg.src = src;
 	arg.dst = dst;
 
@@ -472,7 +474,7 @@
 
 	/* all original skbs are linked into the NFCT_FRAG6_CB(head).orig */
 	fp = skb_shinfo(head)->frag_list;
-	if (NFCT_FRAG6_CB(fp)->orig == NULL)
+	if (fp && NFCT_FRAG6_CB(fp)->orig == NULL)
 		/* at above code, head skb is divided into two skbs. */
 		fp = fp->next;
 
@@ -561,7 +563,7 @@
 	return 0;
 }
 
-struct sk_buff *nf_ct_frag6_gather(struct sk_buff *skb)
+struct sk_buff *nf_ct_frag6_gather(struct sk_buff *skb, u32 user)
 {
 	struct sk_buff *clone;
 	struct net_device *dev = skb->dev;
@@ -598,16 +600,10 @@
 	hdr = ipv6_hdr(clone);
 	fhdr = (struct frag_hdr *)skb_transport_header(clone);
 
-	if (!(fhdr->frag_off & htons(0xFFF9))) {
-		pr_debug("Invalid fragment offset\n");
-		/* It is not a fragmented frame */
-		goto ret_orig;
-	}
-
 	if (atomic_read(&nf_init_frags.mem) > nf_init_frags.high_thresh)
 		nf_ct_frag6_evictor();
 
-	fq = fq_find(fhdr->identification, &hdr->saddr, &hdr->daddr);
+	fq = fq_find(fhdr->identification, user, &hdr->saddr, &hdr->daddr);
 	if (fq == NULL) {
 		pr_debug("Can't find and can't create new queue\n");
 		goto ret_orig;
--- linux-mvl-dove-2.6.32.orig/net/ipv6/netfilter/ip6t_REJECT.c
+++ linux-mvl-dove-2.6.32/net/ipv6/netfilter/ip6t_REJECT.c
@@ -43,6 +43,8 @@
 	int tcphoff, needs_ack;
 	const struct ipv6hdr *oip6h = ipv6_hdr(oldskb);
 	struct ipv6hdr *ip6h;
+#define DEFAULT_TOS_VALUE	0x0U
+	const __u8 tclass = DEFAULT_TOS_VALUE;
 	struct dst_entry *dst = NULL;
 	u8 proto;
 	struct flowi fl;
@@ -95,9 +97,11 @@
 	fl.fl_ip_dport = otcph.source;
 	security_skb_classify_flow(oldskb, &fl);
 	dst = ip6_route_output(net, NULL, &fl);
-	if (dst == NULL)
+	if (dst == NULL || dst->error) {
+		dst_release(dst);
 		return;
-	if (dst->error || xfrm_lookup(net, &dst, &fl, NULL, 0))
+	}
+	if (xfrm_lookup(net, &dst, &fl, NULL, 0))
 		return;
 
 	hh_len = (dst->dev->hard_header_len + 15)&~15;
@@ -119,7 +123,7 @@
 	skb_put(nskb, sizeof(struct ipv6hdr));
 	skb_reset_network_header(nskb);
 	ip6h = ipv6_hdr(nskb);
-	ip6h->version = 6;
+	*(__be32 *)ip6h =  htonl(0x60000000 | (tclass << 20));
 	ip6h->hop_limit = dst_metric(dst, RTAX_HOPLIMIT);
 	ip6h->nexthdr = IPPROTO_TCP;
 	ipv6_addr_copy(&ip6h->saddr, &oip6h->daddr);
--- linux-mvl-dove-2.6.32.orig/net/ipv6/netfilter/nf_conntrack_l3proto_ipv6.c
+++ linux-mvl-dove-2.6.32/net/ipv6/netfilter/nf_conntrack_l3proto_ipv6.c
@@ -20,6 +20,7 @@
 #include <net/ipv6.h>
 #include <net/inet_frag.h>
 
+#include <linux/netfilter_bridge.h>
 #include <linux/netfilter_ipv6.h>
 #include <net/netfilter/nf_conntrack.h>
 #include <net/netfilter/nf_conntrack_helper.h>
@@ -187,6 +188,21 @@
 	return nf_conntrack_confirm(skb);
 }
 
+static enum ip6_defrag_users nf_ct6_defrag_user(unsigned int hooknum,
+						struct sk_buff *skb)
+{
+#ifdef CONFIG_BRIDGE_NETFILTER
+	if (skb->nf_bridge &&
+	    skb->nf_bridge->mask & BRNF_NF_BRIDGE_PREROUTING)
+		return IP6_DEFRAG_CONNTRACK_BRIDGE_IN;
+#endif
+	if (hooknum == NF_INET_PRE_ROUTING)
+		return IP6_DEFRAG_CONNTRACK_IN;
+	else
+		return IP6_DEFRAG_CONNTRACK_OUT;
+
+}
+
 static unsigned int ipv6_defrag(unsigned int hooknum,
 				struct sk_buff *skb,
 				const struct net_device *in,
@@ -199,8 +215,7 @@
 	if (skb->nfct)
 		return NF_ACCEPT;
 
-	reasm = nf_ct_frag6_gather(skb);
-
+	reasm = nf_ct_frag6_gather(skb, nf_ct6_defrag_user(hooknum, skb));
 	/* queued */
 	if (reasm == NULL)
 		return NF_STOLEN;
--- linux-mvl-dove-2.6.32.orig/net/wireless/nl80211.c
+++ linux-mvl-dove-2.6.32/net/wireless/nl80211.c
@@ -1562,39 +1562,6 @@
 	return 0;
 }
 
-static u16 nl80211_calculate_bitrate(struct rate_info *rate)
-{
-	int modulation, streams, bitrate;
-
-	if (!(rate->flags & RATE_INFO_FLAGS_MCS))
-		return rate->legacy;
-
-	/* the formula below does only work for MCS values smaller than 32 */
-	if (rate->mcs >= 32)
-		return 0;
-
-	modulation = rate->mcs & 7;
-	streams = (rate->mcs >> 3) + 1;
-
-	bitrate = (rate->flags & RATE_INFO_FLAGS_40_MHZ_WIDTH) ?
-			13500000 : 6500000;
-
-	if (modulation < 4)
-		bitrate *= (modulation + 1);
-	else if (modulation == 4)
-		bitrate *= (modulation + 2);
-	else
-		bitrate *= (modulation + 3);
-
-	bitrate *= streams;
-
-	if (rate->flags & RATE_INFO_FLAGS_SHORT_GI)
-		bitrate = (bitrate / 9) * 10;
-
-	/* do NOT round down here */
-	return (bitrate + 50000) / 100000;
-}
-
 static int nl80211_send_station(struct sk_buff *msg, u32 pid, u32 seq,
 				int flags, struct net_device *dev,
 				u8 *mac_addr, struct station_info *sinfo)
@@ -1641,8 +1608,8 @@
 		if (!txrate)
 			goto nla_put_failure;
 
-		/* nl80211_calculate_bitrate will return 0 for mcs >= 32 */
-		bitrate = nl80211_calculate_bitrate(&sinfo->txrate);
+		/* cfg80211_calculate_bitrate will return 0 for mcs >= 32 */
+		bitrate = cfg80211_calculate_bitrate(&sinfo->txrate);
 		if (bitrate > 0)
 			NLA_PUT_U16(msg, NL80211_RATE_INFO_BITRATE, bitrate);
 
@@ -3028,12 +2995,12 @@
 	i = 0;
 	if (info->attrs[NL80211_ATTR_SCAN_SSIDS]) {
 		nla_for_each_nested(attr, info->attrs[NL80211_ATTR_SCAN_SSIDS], tmp) {
+			request->ssids[i].ssid_len = nla_len(attr);
 			if (request->ssids[i].ssid_len > IEEE80211_MAX_SSID_LEN) {
 				err = -EINVAL;
 				goto out_free;
 			}
 			memcpy(request->ssids[i].ssid, nla_data(attr), nla_len(attr));
-			request->ssids[i].ssid_len = nla_len(attr);
 			i++;
 		}
 	}
--- linux-mvl-dove-2.6.32.orig/net/wireless/wext.c
+++ linux-mvl-dove-2.6.32/net/wireless/wext.c
@@ -854,6 +854,22 @@
 		}
 	}
 
+	if (IW_IS_GET(cmd) && !(descr->flags & IW_DESCR_FLAG_NOMAX)) {
+		/*
+		 * If this is a GET, but not NOMAX, it means that the extra
+		 * data is not bounded by userspace, but by max_tokens. Thus
+		 * set the length to max_tokens. This matches the extra data
+		 * allocation.
+		 * The driver should fill it with the number of tokens it
+		 * provided, and it may check iwp->length rather than having
+		 * knowledge of max_tokens. If the driver doesn't change the
+		 * iwp->length, this ioctl just copies back max_token tokens
+		 * filled with zeroes. Hopefully the driver isn't claiming
+		 * them to be valid data.
+		 */
+		iwp->length = descr->max_tokens;
+	}
+
 	err = handler(dev, info, (union iwreq_data *) iwp, extra);
 
 	iwp->length += essid_compat;
@@ -1013,7 +1029,7 @@
 	} else if (!iwp->pointer)
 		return -EFAULT;
 
-	extra = kmalloc(extra_size, GFP_KERNEL);
+	extra = kzalloc(extra_size, GFP_KERNEL);
 	if (!extra)
 		return -ENOMEM;
 
--- linux-mvl-dove-2.6.32.orig/net/wireless/sme.c
+++ linux-mvl-dove-2.6.32/net/wireless/sme.c
@@ -655,6 +655,7 @@
 	memset(&wrqu, 0, sizeof(wrqu));
 	wrqu.ap_addr.sa_family = ARPHRD_ETHER;
 	wireless_send_event(dev, SIOCGIWAP, &wrqu, NULL);
+	wdev->wext.connect.ssid_len = 0;
 #endif
 }
 
--- linux-mvl-dove-2.6.32.orig/net/wireless/mlme.c
+++ linux-mvl-dove-2.6.32/net/wireless/mlme.c
@@ -43,10 +43,10 @@
 		}
 	}
 
-	WARN_ON(!done);
-
-	nl80211_send_rx_auth(rdev, dev, buf, len, GFP_KERNEL);
-	cfg80211_sme_rx_auth(dev, buf, len);
+	if (done) {
+		nl80211_send_rx_auth(rdev, dev, buf, len, GFP_KERNEL);
+		cfg80211_sme_rx_auth(dev, buf, len);
+	}
 
 	wdev_unlock(wdev);
 }
@@ -94,7 +94,18 @@
 			}
 		}
 
-		WARN_ON(!bss);
+		/*
+		 * We might be coming here because the driver reported
+		 * a successful association at the same time as the
+		 * user requested a deauth. In that case, we will have
+		 * removed the BSS from the auth_bsses list due to the
+		 * deauth request when the assoc response makes it. If
+		 * the two code paths acquire the lock the other way
+		 * around, that's just the standard situation of a
+		 * deauth being requested while connected.
+		 */
+		if (!bss)
+			goto out;
 	} else if (wdev->conn) {
 		cfg80211_sme_failed_assoc(wdev);
 		need_connect_result = false;
--- linux-mvl-dove-2.6.32.orig/net/wireless/reg.c
+++ linux-mvl-dove-2.6.32/net/wireless/reg.c
@@ -1714,7 +1714,7 @@
 	request->wiphy_idx = WIPHY_IDX_STALE;
 	request->alpha2[0] = alpha2[0];
 	request->alpha2[1] = alpha2[1];
-	request->initiator = NL80211_REGDOM_SET_BY_USER,
+	request->initiator = NL80211_REGDOM_SET_BY_USER;
 
 	queue_regulatory_request(request);
 
--- linux-mvl-dove-2.6.32.orig/net/wireless/core.h
+++ linux-mvl-dove-2.6.32/net/wireless/core.h
@@ -385,6 +385,8 @@
 		  struct wireless_dev *for_wdev,
 		  int freq, enum nl80211_channel_type channel_type);
 
+u16 cfg80211_calculate_bitrate(struct rate_info *rate);
+
 #ifdef CONFIG_CFG80211_DEVELOPER_WARNINGS
 #define CFG80211_DEV_WARN_ON(cond)	WARN_ON(cond)
 #else
--- linux-mvl-dove-2.6.32.orig/net/wireless/util.c
+++ linux-mvl-dove-2.6.32/net/wireless/util.c
@@ -682,3 +682,36 @@
 
 	return err;
 }
+
+u16 cfg80211_calculate_bitrate(struct rate_info *rate)
+{
+	int modulation, streams, bitrate;
+
+	if (!(rate->flags & RATE_INFO_FLAGS_MCS))
+		return rate->legacy;
+
+	/* the formula below does only work for MCS values smaller than 32 */
+	if (rate->mcs >= 32)
+		return 0;
+
+	modulation = rate->mcs & 7;
+	streams = (rate->mcs >> 3) + 1;
+
+	bitrate = (rate->flags & RATE_INFO_FLAGS_40_MHZ_WIDTH) ?
+			13500000 : 6500000;
+
+	if (modulation < 4)
+		bitrate *= (modulation + 1);
+	else if (modulation == 4)
+		bitrate *= (modulation + 2);
+	else
+		bitrate *= (modulation + 3);
+
+	bitrate *= streams;
+
+	if (rate->flags & RATE_INFO_FLAGS_SHORT_GI)
+		bitrate = (bitrate / 9) * 10;
+
+	/* do NOT round down here */
+	return (bitrate + 50000) / 100000;
+}
--- linux-mvl-dove-2.6.32.orig/net/wireless/scan.c
+++ linux-mvl-dove-2.6.32/net/wireless/scan.c
@@ -270,6 +270,7 @@
 {
 	struct cfg80211_registered_device *dev = wiphy_to_dev(wiphy);
 	struct cfg80211_internal_bss *bss, *res = NULL;
+	unsigned long now = jiffies;
 
 	spin_lock_bh(&dev->bss_lock);
 
@@ -278,6 +279,10 @@
 			continue;
 		if (channel && bss->pub.channel != channel)
 			continue;
+		/* Don't get expired BSS structs */
+		if (time_after(now, bss->ts + IEEE80211_SCAN_RESULT_EXPIRE) &&
+		    !atomic_read(&bss->hold))
+			continue;
 		if (is_bss(&bss->pub, bssid, ssid, ssid_len)) {
 			res = bss;
 			kref_get(&res->ref);
--- linux-mvl-dove-2.6.32.orig/net/wireless/wext-compat.c
+++ linux-mvl-dove-2.6.32/net/wireless/wext-compat.c
@@ -1227,10 +1227,7 @@
 	if (!(sinfo.filled & STATION_INFO_TX_BITRATE))
 		return -EOPNOTSUPP;
 
-	rate->value = 0;
-
-	if (!(sinfo.txrate.flags & RATE_INFO_FLAGS_MCS))
-		rate->value = 100000 * sinfo.txrate.legacy;
+	rate->value = 100000 * cfg80211_calculate_bitrate(&sinfo.txrate);
 
 	return 0;
 }
@@ -1361,6 +1358,9 @@
 {
 	struct wireless_dev *wdev = dev->ieee80211_ptr;
 
+	data->flags = 0;
+	data->length = 0;
+
 	switch (wdev->iftype) {
 	case NL80211_IFTYPE_ADHOC:
 		return cfg80211_ibss_wext_giwessid(dev, info, data, ssid);
--- linux-mvl-dove-2.6.32.orig/net/econet/af_econet.c
+++ linux-mvl-dove-2.6.32/net/econet/af_econet.c
@@ -30,6 +30,7 @@
 #include <linux/wireless.h>
 #include <linux/skbuff.h>
 #include <linux/udp.h>
+#include <linux/vmalloc.h>
 #include <net/sock.h>
 #include <net/inet_common.h>
 #include <linux/stat.h>
@@ -275,12 +276,12 @@
 #endif
 #ifdef CONFIG_ECONET_AUNUDP
 	struct msghdr udpmsg;
-	struct iovec iov[msg->msg_iovlen+1];
+	struct iovec iov[2];
 	struct aunhdr ah;
 	struct sockaddr_in udpdest;
 	__kernel_size_t size;
-	int i;
 	mm_segment_t oldfs;
+	char *userbuf;
 #endif
 
 	/*
@@ -296,23 +297,14 @@
 
 	mutex_lock(&econet_mutex);
 
-	if (saddr == NULL) {
-		struct econet_sock *eo = ec_sk(sk);
-
-		addr.station = eo->station;
-		addr.net     = eo->net;
-		port	     = eo->port;
-		cb	     = eo->cb;
-	} else {
-		if (msg->msg_namelen < sizeof(struct sockaddr_ec)) {
-			mutex_unlock(&econet_mutex);
-			return -EINVAL;
-		}
-		addr.station = saddr->addr.station;
-		addr.net = saddr->addr.net;
-		port = saddr->port;
-		cb = saddr->cb;
-	}
+        if (saddr == NULL || msg->msg_namelen < sizeof(struct sockaddr_ec)) {
+                mutex_unlock(&econet_mutex);
+                return -EINVAL;
+        }
+        addr.station = saddr->addr.station;
+        addr.net = saddr->addr.net;
+        port = saddr->port;
+        cb = saddr->cb;
 
 	/* Look for a device with the right network number. */
 	dev = net2dev_map[addr.net];
@@ -327,17 +319,17 @@
 		}
 	}
 
-	if (len + 15 > dev->mtu) {
-		mutex_unlock(&econet_mutex);
-		return -EMSGSIZE;
-	}
-
 	if (dev->type == ARPHRD_ECONET) {
 		/* Real hardware Econet.  We're not worthy etc. */
 #ifdef CONFIG_ECONET_NATIVE
 		unsigned short proto = 0;
 		int res;
 
+		if (len + 15 > dev->mtu) {
+			mutex_unlock(&econet_mutex);
+			return -EMSGSIZE;
+		}
+
 		dev_hold(dev);
 
 		skb = sock_alloc_send_skb(sk, len+LL_ALLOCATED_SPACE(dev),
@@ -350,7 +342,6 @@
 
 		eb = (struct ec_cb *)&skb->cb;
 
-		/* BUG: saddr may be NULL */
 		eb->cookie = saddr->cookie;
 		eb->sec = *saddr;
 		eb->sent = ec_tx_done;
@@ -414,6 +405,11 @@
 		return -ENETDOWN;		/* No socket - can't send */
 	}
 
+	if (len > 32768) {
+		err = -E2BIG;
+		goto error;
+	}
+
 	/* Make up a UDP datagram and hand it off to some higher intellect. */
 
 	memset(&udpdest, 0, sizeof(udpdest));
@@ -438,43 +434,33 @@
 		udpdest.sin_addr.s_addr = htonl(network | addr.station);
 	}
 
+	memset(&ah, 0, sizeof(ah));
 	ah.port = port;
 	ah.cb = cb & 0x7f;
 	ah.code = 2;		/* magic */
-	ah.pad = 0;
 
 	/* tack our header on the front of the iovec */
 	size = sizeof(struct aunhdr);
-	/*
-	 * XXX: that is b0rken.  We can't mix userland and kernel pointers
-	 * in iovec, since on a lot of platforms copy_from_user() will
-	 * *not* work with the kernel and userland ones at the same time,
-	 * regardless of what we do with set_fs().  And we are talking about
-	 * econet-over-ethernet here, so "it's only ARM anyway" doesn't
-	 * apply.  Any suggestions on fixing that code?		-- AV
-	 */
 	iov[0].iov_base = (void *)&ah;
 	iov[0].iov_len = size;
-	for (i = 0; i < msg->msg_iovlen; i++) {
-		void __user *base = msg->msg_iov[i].iov_base;
-		size_t len = msg->msg_iov[i].iov_len;
-		/* Check it now since we switch to KERNEL_DS later. */
-		if (!access_ok(VERIFY_READ, base, len)) {
-			mutex_unlock(&econet_mutex);
-			return -EFAULT;
-		}
-		iov[i+1].iov_base = base;
-		iov[i+1].iov_len = len;
-		size += len;
+
+	userbuf = vmalloc(len);
+	if (userbuf == NULL) {
+		err = -ENOMEM;
+		goto error;
 	}
 
+	iov[1].iov_base = userbuf;
+	iov[1].iov_len = len;
+	err = memcpy_fromiovec(userbuf, msg->msg_iov, len);
+	if (err)
+		goto error_free_buf;
+
 	/* Get a skbuff (no data, just holds our cb information) */
 	if ((skb = sock_alloc_send_skb(sk, 0,
 				       msg->msg_flags & MSG_DONTWAIT,
-				       &err)) == NULL) {
-		mutex_unlock(&econet_mutex);
-		return err;
-	}
+				       &err)) == NULL)
+		goto error_free_buf;
 
 	eb = (struct ec_cb *)&skb->cb;
 
@@ -490,7 +476,7 @@
 	udpmsg.msg_name = (void *)&udpdest;
 	udpmsg.msg_namelen = sizeof(udpdest);
 	udpmsg.msg_iov = &iov[0];
-	udpmsg.msg_iovlen = msg->msg_iovlen + 1;
+	udpmsg.msg_iovlen = 2;
 	udpmsg.msg_control = NULL;
 	udpmsg.msg_controllen = 0;
 	udpmsg.msg_flags=0;
@@ -498,9 +484,13 @@
 	oldfs = get_fs(); set_fs(KERNEL_DS);	/* More privs :-) */
 	err = sock_sendmsg(udpsock, &udpmsg, size);
 	set_fs(oldfs);
+
+error_free_buf:
+	vfree(userbuf);
 #else
 	err = -EPROTOTYPE;
 #endif
+	error:
 	mutex_unlock(&econet_mutex);
 
 	return err;
@@ -669,6 +659,9 @@
 	err = 0;
 	switch (cmd) {
 	case SIOCSIFADDR:
+		if (!capable(CAP_NET_ADMIN))
+			return -EPERM;
+
 		edev = dev->ec_ptr;
 		if (edev == NULL) {
 			/* Magic up a new one. */
@@ -851,8 +844,12 @@
 	struct iphdr *ip = ip_hdr(skb);
 	unsigned char stn = ntohl(ip->saddr) & 0xff;
 	struct sock *sk;
+	struct dst_entry *dst = skb_dst(skb);
+	struct ec_device *edev = NULL;
 	struct sk_buff *newskb;
-	struct ec_device *edev = skb->dev->ec_ptr;
+
+	if (dst)
+		edev = dst->dev->ec_ptr;
 
 	if (! edev)
 		goto bad;
--- linux-mvl-dove-2.6.32.orig/net/bluetooth/sco.c
+++ linux-mvl-dove-2.6.32/net/bluetooth/sco.c
@@ -700,6 +700,7 @@
 			break;
 		}
 
+		memset(&cinfo, 0, sizeof(cinfo));
 		cinfo.hci_handle = sco_pi(sk)->conn->hcon->handle;
 		memcpy(cinfo.dev_class, sco_pi(sk)->conn->hcon->dev_class, 3);
 
@@ -957,13 +958,22 @@
 	struct sock *sk;
 	struct hlist_node *node;
 	char *str = buf;
+	int size = PAGE_SIZE;
 
 	read_lock_bh(&sco_sk_list.lock);
 
 	sk_for_each(sk, node, &sco_sk_list.head) {
-		str += sprintf(str, "%s %s %d\n",
+		int len;
+
+		len = snprintf(str, size, "%s %s %d\n",
 				batostr(&bt_sk(sk)->src), batostr(&bt_sk(sk)->dst),
 				sk->sk_state);
+
+		size -= len;
+		if (size <= 0)
+			break;
+
+		str += len;
 	}
 
 	read_unlock_bh(&sco_sk_list.lock);
--- linux-mvl-dove-2.6.32.orig/net/bluetooth/l2cap.c
+++ linux-mvl-dove-2.6.32/net/bluetooth/l2cap.c
@@ -1886,6 +1886,7 @@
 			break;
 		}
 
+		memset(&cinfo, 0, sizeof(cinfo));
 		cinfo.hci_handle = l2cap_pi(sk)->conn->hcon->handle;
 		memcpy(cinfo.dev_class, l2cap_pi(sk)->conn->hcon->dev_class, 3);
 
@@ -2813,6 +2814,11 @@
 			int len = cmd->len - sizeof(*rsp);
 			char req[64];
 
+			if (len > sizeof(req) - sizeof(struct l2cap_conf_req)) {
+				l2cap_send_disconn_req(conn, sk);
+				goto done;
+			}
+
 			/* throw out any old stored conf requests */
 			result = L2CAP_CONF_SUCCESS;
 			len = l2cap_parse_conf_rsp(sk, rsp->data,
@@ -3885,16 +3891,24 @@
 	struct sock *sk;
 	struct hlist_node *node;
 	char *str = buf;
+	int size = PAGE_SIZE;
 
 	read_lock_bh(&l2cap_sk_list.lock);
 
 	sk_for_each(sk, node, &l2cap_sk_list.head) {
 		struct l2cap_pinfo *pi = l2cap_pi(sk);
+		int len;
 
-		str += sprintf(str, "%s %s %d %d 0x%4.4x 0x%4.4x %d %d %d\n",
+		len = snprintf(str, size, "%s %s %d %d 0x%4.4x 0x%4.4x %d %d %d\n",
 				batostr(&bt_sk(sk)->src), batostr(&bt_sk(sk)->dst),
 				sk->sk_state, __le16_to_cpu(pi->psm), pi->scid,
 				pi->dcid, pi->imtu, pi->omtu, pi->sec_level);
+
+		size -= len;
+		if (size <= 0)
+			break;
+
+		str += len;
 	}
 
 	read_unlock_bh(&l2cap_sk_list.lock);
--- linux-mvl-dove-2.6.32.orig/net/bluetooth/af_bluetooth.c
+++ linux-mvl-dove-2.6.32/net/bluetooth/af_bluetooth.c
@@ -41,6 +41,15 @@
 
 #include <net/bluetooth/bluetooth.h>
 
+#ifdef CONFIG_ANDROID_PARANOID_NETWORK
+#include <linux/android_aid.h>
+#endif
+
+#ifndef CONFIG_BT_SOCK_DEBUG
+#undef  BT_DBG
+#define BT_DBG(D...)
+#endif
+
 #define VERSION "2.15"
 
 /* Bluetooth sockets */
@@ -126,10 +135,39 @@
 }
 EXPORT_SYMBOL(bt_sock_unregister);
 
+#ifdef CONFIG_ANDROID_PARANOID_NETWORK
+static inline int current_has_bt_admin(void)
+{
+	return (!current_euid() || in_egroup_p(AID_NET_BT_ADMIN));
+}
+
+static inline int current_has_bt(void)
+{
+	return (current_has_bt_admin() || in_egroup_p(AID_NET_BT));
+}
+# else
+static inline int current_has_bt_admin(void)
+{
+	return 1;
+}
+
+static inline int current_has_bt(void)
+{
+	return 1;
+}
+#endif
+
 static int bt_sock_create(struct net *net, struct socket *sock, int proto)
 {
 	int err;
 
+	if (proto == BTPROTO_RFCOMM || proto == BTPROTO_SCO ||
+			proto == BTPROTO_L2CAP) {
+		if (!current_has_bt())
+			return -EPERM;
+	} else if (!current_has_bt_admin())
+		return -EPERM;
+
 	if (net != &init_net)
 		return -EAFNOSUPPORT;
 
--- linux-mvl-dove-2.6.32.orig/net/bluetooth/bnep/sock.c
+++ linux-mvl-dove-2.6.32/net/bluetooth/bnep/sock.c
@@ -88,6 +88,7 @@
 			sockfd_put(nsock);
 			return -EBADFD;
 		}
+		ca.device[sizeof(ca.device)-1] = 0;
 
 		err = bnep_add_connection(&ca, nsock);
 		if (!err) {
--- linux-mvl-dove-2.6.32.orig/net/bluetooth/rfcomm/sock.c
+++ linux-mvl-dove-2.6.32/net/bluetooth/rfcomm/sock.c
@@ -878,6 +878,7 @@
 
 		l2cap_sk = rfcomm_pi(sk)->dlc->session->sock->sk;
 
+		memset(&cinfo, 0, sizeof(cinfo));
 		cinfo.hci_handle = l2cap_pi(l2cap_sk)->conn->hcon->handle;
 		memcpy(cinfo.dev_class, l2cap_pi(l2cap_sk)->conn->hcon->dev_class, 3);
 
@@ -1065,13 +1066,22 @@
 	struct sock *sk;
 	struct hlist_node *node;
 	char *str = buf;
+	int size = PAGE_SIZE;
 
 	read_lock_bh(&rfcomm_sk_list.lock);
 
 	sk_for_each(sk, node, &rfcomm_sk_list.head) {
-		str += sprintf(str, "%s %s %d %d\n",
+		int len;
+
+		len = snprintf(str, size, "%s %s %d %d\n",
 				batostr(&bt_sk(sk)->src), batostr(&bt_sk(sk)->dst),
 				sk->sk_state, rfcomm_pi(sk)->channel);
+
+		size -= len;
+		if (size <= 0)
+			break;
+
+		str += len;
 	}
 
 	read_unlock_bh(&rfcomm_sk_list.lock);
--- linux-mvl-dove-2.6.32.orig/net/bluetooth/rfcomm/core.c
+++ linux-mvl-dove-2.6.32/net/bluetooth/rfcomm/core.c
@@ -251,7 +251,6 @@
 	BT_DBG("session %p state %ld", s, s->state);
 
 	set_bit(RFCOMM_TIMED_OUT, &s->flags);
-	rfcomm_session_put(s);
 	rfcomm_schedule(RFCOMM_SCHED_TIMEO);
 }
 
@@ -1917,6 +1916,7 @@
 		if (test_and_clear_bit(RFCOMM_TIMED_OUT, &s->flags)) {
 			s->state = BT_DISCONN;
 			rfcomm_send_disc(s, 0);
+			rfcomm_session_put(s);
 			continue;
 		}
 
@@ -2096,6 +2096,7 @@
 	struct rfcomm_session *s;
 	struct list_head *pp, *p;
 	char *str = buf;
+	int size = PAGE_SIZE;
 
 	rfcomm_lock();
 
@@ -2104,11 +2105,21 @@
 		list_for_each(pp, &s->dlcs) {
 			struct sock *sk = s->sock->sk;
 			struct rfcomm_dlc *d = list_entry(pp, struct rfcomm_dlc, list);
+			int len;
 
-			str += sprintf(str, "%s %s %ld %d %d %d %d\n",
+			len = snprintf(str, size, "%s %s %ld %d %d %d %d\n",
 					batostr(&bt_sk(sk)->src), batostr(&bt_sk(sk)->dst),
 					d->state, d->dlci, d->mtu, d->rx_credits, d->tx_credits);
+
+			size -= len;
+			if (size <= 0)
+				break;
+
+			str += len;
 		}
+
+		if (size <= 0)
+			break;
 	}
 
 	rfcomm_unlock();
--- linux-mvl-dove-2.6.32.orig/net/bluetooth/rfcomm/tty.c
+++ linux-mvl-dove-2.6.32/net/bluetooth/rfcomm/tty.c
@@ -844,10 +844,6 @@
 		BT_DBG("TIOCMIWAIT");
 		break;
 
-	case TIOCGICOUNT:
-		BT_DBG("TIOCGICOUNT");
-		break;
-
 	case TIOCGSERIAL:
 		BT_ERR("TIOCGSERIAL is not supported");
 		return -ENOIOCTLCMD;
--- linux-mvl-dove-2.6.32.orig/net/atm/atm_sysfs.c
+++ linux-mvl-dove-2.6.32/net/atm/atm_sysfs.c
@@ -57,6 +57,14 @@
 	return pos - buf;
 }
 
+static ssize_t show_atmindex(struct device *cdev,
+			     struct device_attribute *attr, char *buf)
+{
+	struct atm_dev *adev = to_atm_dev(cdev);
+
+	return sprintf(buf, "%d\n", adev->number);
+}
+
 static ssize_t show_carrier(struct device *cdev,
 			    struct device_attribute *attr, char *buf)
 {
@@ -97,6 +105,7 @@
 
 static DEVICE_ATTR(address, S_IRUGO, show_address, NULL);
 static DEVICE_ATTR(atmaddress, S_IRUGO, show_atmaddress, NULL);
+static DEVICE_ATTR(atmindex, S_IRUGO, show_atmindex, NULL);
 static DEVICE_ATTR(carrier, S_IRUGO, show_carrier, NULL);
 static DEVICE_ATTR(type, S_IRUGO, show_type, NULL);
 static DEVICE_ATTR(link_rate, S_IRUGO, show_link_rate, NULL);
@@ -104,6 +113,7 @@
 static struct device_attribute *atm_attrs[] = {
 	&dev_attr_atmaddress,
 	&dev_attr_address,
+	&dev_attr_atmindex,
 	&dev_attr_carrier,
 	&dev_attr_type,
 	&dev_attr_link_rate,
--- linux-mvl-dove-2.6.32.orig/net/atm/br2684.c
+++ linux-mvl-dove-2.6.32/net/atm/br2684.c
@@ -554,6 +554,12 @@
 	.ndo_validate_addr	= eth_validate_addr,
 };
 
+static const struct net_device_ops br2684_netdev_ops_routed = {
+	.ndo_start_xmit 	= br2684_start_xmit,
+	.ndo_set_mac_address	= br2684_mac_addr,
+	.ndo_change_mtu		= eth_change_mtu
+};
+
 static void br2684_setup(struct net_device *netdev)
 {
 	struct br2684_dev *brdev = BRPRIV(netdev);
@@ -569,11 +575,10 @@
 static void br2684_setup_routed(struct net_device *netdev)
 {
 	struct br2684_dev *brdev = BRPRIV(netdev);
-	brdev->net_dev = netdev;
 
+	brdev->net_dev = netdev;
 	netdev->hard_header_len = 0;
-
-	netdev->netdev_ops = &br2684_netdev_ops;
+	netdev->netdev_ops = &br2684_netdev_ops_routed;
 	netdev->addr_len = 0;
 	netdev->mtu = 1500;
 	netdev->type = ARPHRD_PPP;
--- linux-mvl-dove-2.6.32.orig/net/tipc/net.c
+++ linux-mvl-dove-2.6.32/net/tipc/net.c
@@ -116,7 +116,8 @@
 */
 
 DEFINE_RWLOCK(tipc_net_lock);
-struct network tipc_net = { NULL };
+struct _zone *tipc_zones[256] = { NULL, };
+struct network tipc_net = { tipc_zones };
 
 struct tipc_node *tipc_net_select_remote_node(u32 addr, u32 ref)
 {
@@ -158,28 +159,12 @@
 	}
 }
 
-static int net_init(void)
-{
-	memset(&tipc_net, 0, sizeof(tipc_net));
-	tipc_net.zones = kcalloc(tipc_max_zones + 1, sizeof(struct _zone *), GFP_ATOMIC);
-	if (!tipc_net.zones) {
-		return -ENOMEM;
-	}
-	return 0;
-}
-
 static void net_stop(void)
 {
 	u32 z_num;
 
-	if (!tipc_net.zones)
-		return;
-
-	for (z_num = 1; z_num <= tipc_max_zones; z_num++) {
+	for (z_num = 1; z_num <= tipc_max_zones; z_num++)
 		tipc_zone_delete(tipc_net.zones[z_num]);
-	}
-	kfree(tipc_net.zones);
-	tipc_net.zones = NULL;
 }
 
 static void net_route_named_msg(struct sk_buff *buf)
@@ -282,9 +267,7 @@
 	tipc_named_reinit();
 	tipc_port_reinit();
 
-	if ((res = tipc_bearer_init()) ||
-	    (res = net_init()) ||
-	    (res = tipc_cltr_init()) ||
+	if ((res = tipc_cltr_init()) ||
 	    (res = tipc_bclink_init())) {
 		return res;
 	}
--- linux-mvl-dove-2.6.32.orig/net/tipc/bearer.c
+++ linux-mvl-dove-2.6.32/net/tipc/bearer.c
@@ -45,10 +45,10 @@
 
 #define MAX_ADDR_STR 32
 
-static struct media *media_list = NULL;
+static struct media media_list[MAX_MEDIA];
 static u32 media_count = 0;
 
-struct bearer *tipc_bearers = NULL;
+struct bearer tipc_bearers[MAX_BEARERS];
 
 /**
  * media_name_valid - validate media name
@@ -108,9 +108,11 @@
 	int res = -EINVAL;
 
 	write_lock_bh(&tipc_net_lock);
-	if (!media_list)
-		goto exit;
 
+	if (tipc_mode != TIPC_NET_MODE) {
+		warn("Media <%s> rejected, not in networked mode yet\n", name);
+		goto exit;
+	}
 	if (!media_name_valid(name)) {
 		warn("Media <%s> rejected, illegal name\n", name);
 		goto exit;
@@ -660,33 +662,10 @@
 
 
 
-int tipc_bearer_init(void)
-{
-	int res;
-
-	write_lock_bh(&tipc_net_lock);
-	tipc_bearers = kcalloc(MAX_BEARERS, sizeof(struct bearer), GFP_ATOMIC);
-	media_list = kcalloc(MAX_MEDIA, sizeof(struct media), GFP_ATOMIC);
-	if (tipc_bearers && media_list) {
-		res = 0;
-	} else {
-		kfree(tipc_bearers);
-		kfree(media_list);
-		tipc_bearers = NULL;
-		media_list = NULL;
-		res = -ENOMEM;
-	}
-	write_unlock_bh(&tipc_net_lock);
-	return res;
-}
-
 void tipc_bearer_stop(void)
 {
 	u32 i;
 
-	if (!tipc_bearers)
-		return;
-
 	for (i = 0; i < MAX_BEARERS; i++) {
 		if (tipc_bearers[i].active)
 			tipc_bearers[i].publ.blocked = 1;
@@ -695,10 +674,6 @@
 		if (tipc_bearers[i].active)
 			bearer_disable(tipc_bearers[i].publ.name);
 	}
-	kfree(tipc_bearers);
-	kfree(media_list);
-	tipc_bearers = NULL;
-	media_list = NULL;
 	media_count = 0;
 }
 
--- linux-mvl-dove-2.6.32.orig/net/tipc/bearer.h
+++ linux-mvl-dove-2.6.32/net/tipc/bearer.h
@@ -114,7 +114,7 @@
 
 struct link;
 
-extern struct bearer *tipc_bearers;
+extern struct bearer tipc_bearers[];
 
 void tipc_media_addr_printf(struct print_buf *pb, struct tipc_media_addr *a);
 struct sk_buff *tipc_media_get_names(void);
--- linux-mvl-dove-2.6.32.orig/net/tipc/socket.c
+++ linux-mvl-dove-2.6.32/net/tipc/socket.c
@@ -393,6 +393,7 @@
 	struct sockaddr_tipc *addr = (struct sockaddr_tipc *)uaddr;
 	struct tipc_sock *tsock = tipc_sk(sock->sk);
 
+	memset(addr, 0, sizeof(*addr));
 	if (peer) {
 		if ((sock->state != SS_CONNECTED) &&
 			((peer != 2) || (sock->state != SS_DISCONNECTING)))
@@ -1322,8 +1323,10 @@
 	if (!sock_owned_by_user(sk)) {
 		res = filter_rcv(sk, buf);
 	} else {
-		sk_add_backlog(sk, buf);
-		res = TIPC_OK;
+		if (sk_add_backlog(sk, buf))
+			res = TIPC_ERR_OVERLOAD;
+		else
+			res = TIPC_OK;
 	}
 	bh_unlock_sock(sk);
 
--- linux-mvl-dove-2.6.32.orig/net/rose/rose_subr.c
+++ linux-mvl-dove-2.6.32/net/rose/rose_subr.c
@@ -141,7 +141,7 @@
 		*dptr++ = ROSE_GFI | lci1;
 		*dptr++ = lci2;
 		*dptr++ = frametype;
-		*dptr++ = 0xAA;
+		*dptr++ = ROSE_CALL_REQ_ADDR_LEN_VAL;
 		memcpy(dptr, &rose->dest_addr,  ROSE_ADDR_LEN);
 		dptr   += ROSE_ADDR_LEN;
 		memcpy(dptr, &rose->source_addr, ROSE_ADDR_LEN);
@@ -245,12 +245,16 @@
 	do {
 		switch (*p & 0xC0) {
 		case 0x00:
+			if (len < 2)
+				return -1;
 			p   += 2;
 			n   += 2;
 			len -= 2;
 			break;
 
 		case 0x40:
+			if (len < 3)
+				return -1;
 			if (*p == FAC_NATIONAL_RAND)
 				facilities->rand = ((p[1] << 8) & 0xFF00) + ((p[2] << 0) & 0x00FF);
 			p   += 3;
@@ -259,40 +263,61 @@
 			break;
 
 		case 0x80:
+			if (len < 4)
+				return -1;
 			p   += 4;
 			n   += 4;
 			len -= 4;
 			break;
 
 		case 0xC0:
+			if (len < 2)
+				return -1;
 			l = p[1];
+			if (len < 2 + l)
+				return -1;
 			if (*p == FAC_NATIONAL_DEST_DIGI) {
 				if (!fac_national_digis_received) {
+					if (l < AX25_ADDR_LEN)
+						return -1;
 					memcpy(&facilities->source_digis[0], p + 2, AX25_ADDR_LEN);
 					facilities->source_ndigis = 1;
 				}
 			}
 			else if (*p == FAC_NATIONAL_SRC_DIGI) {
 				if (!fac_national_digis_received) {
+					if (l < AX25_ADDR_LEN)
+						return -1;
 					memcpy(&facilities->dest_digis[0], p + 2, AX25_ADDR_LEN);
 					facilities->dest_ndigis = 1;
 				}
 			}
 			else if (*p == FAC_NATIONAL_FAIL_CALL) {
+				if (l < AX25_ADDR_LEN)
+					return -1;
 				memcpy(&facilities->fail_call, p + 2, AX25_ADDR_LEN);
 			}
 			else if (*p == FAC_NATIONAL_FAIL_ADD) {
+				if (l < 1 + ROSE_ADDR_LEN)
+					return -1;
 				memcpy(&facilities->fail_addr, p + 3, ROSE_ADDR_LEN);
 			}
 			else if (*p == FAC_NATIONAL_DIGIS) {
+				if (l % AX25_ADDR_LEN)
+					return -1;
 				fac_national_digis_received = 1;
 				facilities->source_ndigis = 0;
 				facilities->dest_ndigis   = 0;
 				for (pt = p + 2, lg = 0 ; lg < l ; pt += AX25_ADDR_LEN, lg += AX25_ADDR_LEN) {
-					if (pt[6] & AX25_HBIT)
+					if (pt[6] & AX25_HBIT) {
+						if (facilities->dest_ndigis >= ROSE_MAX_DIGIS)
+							return -1;
 						memcpy(&facilities->dest_digis[facilities->dest_ndigis++], pt, AX25_ADDR_LEN);
-					else
+					} else {
+						if (facilities->source_ndigis >= ROSE_MAX_DIGIS)
+							return -1;
 						memcpy(&facilities->source_digis[facilities->source_ndigis++], pt, AX25_ADDR_LEN);
+					}
 				}
 			}
 			p   += l + 2;
@@ -313,25 +338,38 @@
 	do {
 		switch (*p & 0xC0) {
 		case 0x00:
+			if (len < 2)
+				return -1;
 			p   += 2;
 			n   += 2;
 			len -= 2;
 			break;
 
 		case 0x40:
+			if (len < 3)
+				return -1;
 			p   += 3;
 			n   += 3;
 			len -= 3;
 			break;
 
 		case 0x80:
+			if (len < 4)
+				return -1;
 			p   += 4;
 			n   += 4;
 			len -= 4;
 			break;
 
 		case 0xC0:
+			if (len < 2)
+				return -1;
 			l = p[1];
+
+			/* Prevent overflows*/
+			if (l < 10 || l > 20)
+				return -1;
+
 			if (*p == FAC_CCITT_DEST_NSAP) {
 				memcpy(&facilities->source_addr, p + 7, ROSE_ADDR_LEN);
 				memcpy(callsign, p + 12,   l - 10);
@@ -354,45 +392,44 @@
 	return n;
 }
 
-int rose_parse_facilities(unsigned char *p,
+int rose_parse_facilities(unsigned char *p, unsigned packet_len,
 	struct rose_facilities_struct *facilities)
 {
 	int facilities_len, len;
 
 	facilities_len = *p++;
 
-	if (facilities_len == 0)
+	if (facilities_len == 0 || (unsigned)facilities_len > packet_len)
 		return 0;
 
-	while (facilities_len > 0) {
-		if (*p == 0x00) {
-			facilities_len--;
-			p++;
-
-			switch (*p) {
-			case FAC_NATIONAL:		/* National */
-				len = rose_parse_national(p + 1, facilities, facilities_len - 1);
-				facilities_len -= len + 1;
-				p += len + 1;
-				break;
-
-			case FAC_CCITT:		/* CCITT */
-				len = rose_parse_ccitt(p + 1, facilities, facilities_len - 1);
-				facilities_len -= len + 1;
-				p += len + 1;
-				break;
-
-			default:
-				printk(KERN_DEBUG "ROSE: rose_parse_facilities - unknown facilities family %02X\n", *p);
-				facilities_len--;
-				p++;
-				break;
-			}
-		} else
-			break;	/* Error in facilities format */
+	while (facilities_len >= 3 && *p == 0x00) {
+		facilities_len--;
+		p++;
+
+		switch (*p) {
+		case FAC_NATIONAL:		/* National */
+			len = rose_parse_national(p + 1, facilities, facilities_len - 1);
+			break;
+
+		case FAC_CCITT:		/* CCITT */
+			len = rose_parse_ccitt(p + 1, facilities, facilities_len - 1);
+			break;
+
+		default:
+			printk(KERN_DEBUG "ROSE: rose_parse_facilities - unknown facilities family %02X\n", *p);
+			len = 1;
+			break;
+		}
+
+		if (len < 0)
+			return 0;
+		if (WARN_ON(len >= facilities_len))
+			return 0;
+		facilities_len -= len + 1;
+		p += len + 1;
 	}
 
-	return 1;
+	return facilities_len == 0;
 }
 
 static int rose_create_facilities(unsigned char *buffer, struct rose_sock *rose)
--- linux-mvl-dove-2.6.32.orig/net/rose/rose_link.c
+++ linux-mvl-dove-2.6.32/net/rose/rose_link.c
@@ -101,13 +101,17 @@
 static int rose_send_frame(struct sk_buff *skb, struct rose_neigh *neigh)
 {
 	ax25_address *rose_call;
+	ax25_cb *ax25s;
 
 	if (ax25cmp(&rose_callsign, &null_ax25_address) == 0)
 		rose_call = (ax25_address *)neigh->dev->dev_addr;
 	else
 		rose_call = &rose_callsign;
 
+	ax25s = neigh->ax25;
 	neigh->ax25 = ax25_send_frame(skb, 260, rose_call, &neigh->callsign, neigh->digipeat, neigh->dev);
+	if (ax25s)
+		ax25_cb_put(ax25s);
 
 	return (neigh->ax25 != NULL);
 }
@@ -120,13 +124,17 @@
 static int rose_link_up(struct rose_neigh *neigh)
 {
 	ax25_address *rose_call;
+	ax25_cb *ax25s;
 
 	if (ax25cmp(&rose_callsign, &null_ax25_address) == 0)
 		rose_call = (ax25_address *)neigh->dev->dev_addr;
 	else
 		rose_call = &rose_callsign;
 
+	ax25s = neigh->ax25;
 	neigh->ax25 = ax25_find_cb(rose_call, &neigh->callsign, neigh->digipeat, neigh->dev);
+	if (ax25s)
+		ax25_cb_put(ax25s);
 
 	return (neigh->ax25 != NULL);
 }
--- linux-mvl-dove-2.6.32.orig/net/rose/rose_route.c
+++ linux-mvl-dove-2.6.32/net/rose/rose_route.c
@@ -234,6 +234,8 @@
 
 	if ((s = rose_neigh_list) == rose_neigh) {
 		rose_neigh_list = rose_neigh->next;
+		if (rose_neigh->ax25)
+			ax25_cb_put(rose_neigh->ax25);
 		kfree(rose_neigh->digipeat);
 		kfree(rose_neigh);
 		return;
@@ -242,6 +244,8 @@
 	while (s != NULL && s->next != NULL) {
 		if (s->next == rose_neigh) {
 			s->next = rose_neigh->next;
+			if (rose_neigh->ax25)
+				ax25_cb_put(rose_neigh->ax25);
 			kfree(rose_neigh->digipeat);
 			kfree(rose_neigh);
 			return;
@@ -810,6 +814,7 @@
 
 	if (rose_neigh != NULL) {
 		rose_neigh->ax25 = NULL;
+		ax25_cb_put(ax25);
 
 		rose_del_route_by_neigh(rose_neigh);
 		rose_kill_by_neigh(rose_neigh);
@@ -847,7 +852,7 @@
 	unsigned int lci, new_lci;
 	unsigned char cause, diagnostic;
 	struct net_device *dev;
-	int len, res = 0;
+	int res = 0;
 	char buf[11];
 
 #if 0
@@ -855,10 +860,17 @@
 		return res;
 #endif
 
+	if (skb->len < ROSE_MIN_LEN)
+		return res;
 	frametype = skb->data[2];
 	lci = ((skb->data[0] << 8) & 0xF00) + ((skb->data[1] << 0) & 0x0FF);
-	src_addr  = (rose_address *)(skb->data + 9);
-	dest_addr = (rose_address *)(skb->data + 4);
+	if (frametype == ROSE_CALL_REQUEST &&
+	    (skb->len <= ROSE_CALL_REQ_FACILITIES_OFF ||
+	     skb->data[ROSE_CALL_REQ_ADDR_LEN_OFF] !=
+	     ROSE_CALL_REQ_ADDR_LEN_VAL))
+		return res;
+	src_addr  = (rose_address *)(skb->data + ROSE_CALL_REQ_SRC_ADDR_OFF);
+	dest_addr = (rose_address *)(skb->data + ROSE_CALL_REQ_DEST_ADDR_OFF);
 
 	spin_lock_bh(&rose_neigh_list_lock);
 	spin_lock_bh(&rose_route_list_lock);
@@ -996,12 +1008,11 @@
 		goto out;
 	}
 
-	len  = (((skb->data[3] >> 4) & 0x0F) + 1) >> 1;
-	len += (((skb->data[3] >> 0) & 0x0F) + 1) >> 1;
-
 	memset(&facilities, 0x00, sizeof(struct rose_facilities_struct));
 
-	if (!rose_parse_facilities(skb->data + len + 4, &facilities)) {
+	if (!rose_parse_facilities(skb->data + ROSE_CALL_REQ_FACILITIES_OFF,
+				   skb->len - ROSE_CALL_REQ_FACILITIES_OFF,
+				   &facilities)) {
 		rose_transmit_clear_request(rose_neigh, lci, ROSE_INVALID_FACILITY, 76);
 		goto out;
 	}
--- linux-mvl-dove-2.6.32.orig/net/rose/rose_loopback.c
+++ linux-mvl-dove-2.6.32/net/rose/rose_loopback.c
@@ -72,10 +72,21 @@
 	unsigned int lci_i, lci_o;
 
 	while ((skb = skb_dequeue(&loopback_queue)) != NULL) {
+		if (skb->len < ROSE_MIN_LEN) {
+			kfree_skb(skb);
+			continue;
+		}
 		lci_i     = ((skb->data[0] << 8) & 0xF00) + ((skb->data[1] << 0) & 0x0FF);
 		frametype = skb->data[2];
-		dest      = (rose_address *)(skb->data + 4);
-		lci_o     = 0xFFF - lci_i;
+		if (frametype == ROSE_CALL_REQUEST &&
+		    (skb->len <= ROSE_CALL_REQ_FACILITIES_OFF ||
+		     skb->data[ROSE_CALL_REQ_ADDR_LEN_OFF] !=
+		     ROSE_CALL_REQ_ADDR_LEN_VAL)) {
+			kfree_skb(skb);
+			continue;
+		}
+		dest      = (rose_address *)(skb->data + ROSE_CALL_REQ_DEST_ADDR_OFF);
+		lci_o     = ROSE_DEFAULT_MAXVC + 1 - lci_i;
 
 		skb_reset_transport_header(skb);
 
--- linux-mvl-dove-2.6.32.orig/net/rose/af_rose.c
+++ linux-mvl-dove-2.6.32/net/rose/af_rose.c
@@ -677,7 +677,7 @@
 	if (addr_len == sizeof(struct sockaddr_rose) && addr->srose_ndigis > 1)
 		return -EINVAL;
 
-	if (addr->srose_ndigis > ROSE_MAX_DIGIS)
+	if ((unsigned int) addr->srose_ndigis > ROSE_MAX_DIGIS)
 		return -EINVAL;
 
 	if ((dev = rose_dev_get(&addr->srose_addr)) == NULL) {
@@ -737,7 +737,7 @@
 	if (addr_len == sizeof(struct sockaddr_rose) && addr->srose_ndigis > 1)
 		return -EINVAL;
 
-	if (addr->srose_ndigis > ROSE_MAX_DIGIS)
+	if ((unsigned int) addr->srose_ndigis > ROSE_MAX_DIGIS)
 		return -EINVAL;
 
 	/* Source + Destination digis should not exceed ROSE_MAX_DIGIS */
@@ -983,7 +983,7 @@
 	struct sock *make;
 	struct rose_sock *make_rose;
 	struct rose_facilities_struct facilities;
-	int n, len;
+	int n;
 
 	skb->sk = NULL;		/* Initially we don't know who it's for */
 
@@ -992,9 +992,9 @@
 	 */
 	memset(&facilities, 0x00, sizeof(struct rose_facilities_struct));
 
-	len  = (((skb->data[3] >> 4) & 0x0F) + 1) >> 1;
-	len += (((skb->data[3] >> 0) & 0x0F) + 1) >> 1;
-	if (!rose_parse_facilities(skb->data + len + 4, &facilities)) {
+	if (!rose_parse_facilities(skb->data + ROSE_CALL_REQ_FACILITIES_OFF,
+				   skb->len - ROSE_CALL_REQ_FACILITIES_OFF,
+				   &facilities)) {
 		rose_transmit_clear_request(neigh, lci, ROSE_INVALID_FACILITY, 76);
 		return 0;
 	}
--- linux-mvl-dove-2.6.32.orig/net/can/raw.c
+++ linux-mvl-dove-2.6.32/net/can/raw.c
@@ -280,7 +280,12 @@
 static int raw_release(struct socket *sock)
 {
 	struct sock *sk = sock->sk;
-	struct raw_sock *ro = raw_sk(sk);
+	struct raw_sock *ro;
+
+	if (!sk)
+		return 0;
+
+	ro = raw_sk(sk);
 
 	unregister_netdevice_notifier(&ro->notifier);
 
--- linux-mvl-dove-2.6.32.orig/net/can/bcm.c
+++ linux-mvl-dove-2.6.32/net/can/bcm.c
@@ -59,6 +59,13 @@
 #include <net/sock.h>
 #include <net/net_namespace.h>
 
+/*
+ * To send multiple CAN frame content within TX_SETUP or to filter
+ * CAN messages with multiplex index within RX_SETUP, the number of
+ * different filters is limited to 256 due to the one byte index value.
+ */
+#define MAX_NFRAMES 256
+
 /* use of last_frames[index].can_dlc */
 #define RX_RECV    0x40 /* received data for this element */
 #define RX_THR     0x80 /* element not been sent due to throttle feature */
@@ -88,16 +95,16 @@
 	struct list_head list;
 	int ifindex;
 	canid_t can_id;
-	int flags;
+	u32 flags;
 	unsigned long frames_abs, frames_filtered;
 	struct timeval ival1, ival2;
 	struct hrtimer timer, thrtimer;
 	struct tasklet_struct tsklet, thrtsklet;
 	ktime_t rx_stamp, kt_ival1, kt_ival2, kt_lastmsg;
 	int rx_ifindex;
-	int count;
-	int nframes;
-	int currframe;
+	u32 count;
+	u32 nframes;
+	u32 currframe;
 	struct can_frame *frames;
 	struct can_frame *last_frames;
 	struct can_frame sframe;
@@ -117,7 +124,7 @@
 	struct list_head tx_ops;
 	unsigned long dropped_usr_msgs;
 	struct proc_dir_entry *bcm_proc_read;
-	char procname [9]; /* pointer printed in ASCII with \0 */
+	char procname [32]; /* inode number in decimal with \0 */
 };
 
 static inline struct bcm_sock *bcm_sk(const struct sock *sk)
@@ -174,7 +181,7 @@
 
 		seq_printf(m, "rx_op: %03X %-5s ",
 				op->can_id, bcm_proc_getifname(ifname, op->ifindex));
-		seq_printf(m, "[%d]%c ", op->nframes,
+		seq_printf(m, "[%u]%c ", op->nframes,
 				(op->flags & RX_CHECK_DLC)?'d':' ');
 		if (op->kt_ival1.tv64)
 			seq_printf(m, "timeo=%lld ",
@@ -197,7 +204,7 @@
 
 	list_for_each_entry(op, &bo->tx_ops, list) {
 
-		seq_printf(m, "tx_op: %03X %s [%d] ",
+		seq_printf(m, "tx_op: %03X %s [%u] ",
 				op->can_id,
 				bcm_proc_getifname(ifname, op->ifindex),
 				op->nframes);
@@ -282,7 +289,7 @@
 	struct can_frame *firstframe;
 	struct sockaddr_can *addr;
 	struct sock *sk = op->sk;
-	int datalen = head->nframes * CFSIZ;
+	unsigned int datalen = head->nframes * CFSIZ;
 	int err;
 
 	skb = alloc_skb(sizeof(*head) + datalen, gfp_any());
@@ -467,7 +474,7 @@
  * bcm_rx_cmp_to_index - (bit)compares the currently received data to formerly
  *                       received data stored in op->last_frames[]
  */
-static void bcm_rx_cmp_to_index(struct bcm_op *op, int index,
+static void bcm_rx_cmp_to_index(struct bcm_op *op, unsigned int index,
 				const struct can_frame *rxdata)
 {
 	/*
@@ -553,7 +560,8 @@
 /*
  * bcm_rx_do_flush - helper for bcm_rx_thr_flush
  */
-static inline int bcm_rx_do_flush(struct bcm_op *op, int update, int index)
+static inline int bcm_rx_do_flush(struct bcm_op *op, int update,
+				  unsigned int index)
 {
 	if ((op->last_frames) && (op->last_frames[index].can_dlc & RX_THR)) {
 		if (update)
@@ -574,7 +582,7 @@
 	int updated = 0;
 
 	if (op->nframes > 1) {
-		int i;
+		unsigned int i;
 
 		/* for MUX filter we start at index 1 */
 		for (i = 1; i < op->nframes; i++)
@@ -623,7 +631,7 @@
 {
 	struct bcm_op *op = (struct bcm_op *)data;
 	const struct can_frame *rxframe = (struct can_frame *)skb->data;
-	int i;
+	unsigned int i;
 
 	/* disable timeout */
 	hrtimer_cancel(&op->timer);
@@ -823,14 +831,15 @@
 {
 	struct bcm_sock *bo = bcm_sk(sk);
 	struct bcm_op *op;
-	int i, err;
+	unsigned int i;
+	int err;
 
 	/* we need a real device to send frames */
 	if (!ifindex)
 		return -ENODEV;
 
-	/* we need at least one can_frame */
-	if (msg_head->nframes < 1)
+	/* check nframes boundaries - we need at least one can_frame */
+	if (msg_head->nframes < 1 || msg_head->nframes > MAX_NFRAMES)
 		return -EINVAL;
 
 	/* check the given can_id */
@@ -994,6 +1003,10 @@
 		msg_head->nframes = 0;
 	}
 
+	/* the first element contains the mux-mask => MAX_NFRAMES + 1  */
+	if (msg_head->nframes > MAX_NFRAMES + 1)
+		return -EINVAL;
+
 	if ((msg_head->flags & RX_RTR_FRAME) &&
 	    ((msg_head->nframes != 1) ||
 	     (!(msg_head->can_id & CAN_RTR_FLAG))))
@@ -1412,9 +1425,14 @@
 static int bcm_release(struct socket *sock)
 {
 	struct sock *sk = sock->sk;
-	struct bcm_sock *bo = bcm_sk(sk);
+	struct bcm_sock *bo;
 	struct bcm_op *op, *next;
 
+	if (sk == NULL)
+		return 0;
+
+	bo = bcm_sk(sk);
+
 	/* remove bcm_ops, timer, rx_unregister(), etc. */
 
 	unregister_netdevice_notifier(&bo->notifier);
@@ -1506,7 +1524,7 @@
 
 	if (proc_dir) {
 		/* unique socket address as filename */
-		sprintf(bo->procname, "%p", sock);
+		sprintf(bo->procname, "%lu", sock_i_ino(sk));
 		bo->bcm_proc_read = proc_create_data(bo->procname, 0644,
 						     proc_dir,
 						     &bcm_proc_fops, sk);
--- linux-mvl-dove-2.6.32.orig/net/phonet/pep.c
+++ linux-mvl-dove-2.6.32/net/phonet/pep.c
@@ -224,12 +224,13 @@
 static int pipe_rcv_status(struct sock *sk, struct sk_buff *skb)
 {
 	struct pep_sock *pn = pep_sk(sk);
-	struct pnpipehdr *hdr = pnp_hdr(skb);
+	struct pnpipehdr *hdr;
 	int wake = 0;
 
 	if (!pskb_may_pull(skb, sizeof(*hdr) + 4))
 		return -EINVAL;
 
+	hdr = pnp_hdr(skb);
 	if (hdr->data[0] != PN_PEP_TYPE_COMMON) {
 		LIMIT_NETDEBUG(KERN_DEBUG"Phonet unknown PEP type: %u\n",
 				(unsigned)hdr->data[0]);
--- linux-mvl-dove-2.6.32.orig/net/phonet/pn_dev.c
+++ linux-mvl-dove-2.6.32/net/phonet/pn_dev.c
@@ -225,6 +225,9 @@
 {
 	struct net_device *dev = arg;
 
+	if (!net_eq(dev_net(dev), &init_net))
+		return 0;
+
 	switch (what) {
 	case NETDEV_REGISTER:
 		if (dev->type == ARPHRD_PHONET)
@@ -246,7 +249,11 @@
 /* Per-namespace Phonet devices handling */
 static int phonet_init_net(struct net *net)
 {
-	struct phonet_net *pnn = kmalloc(sizeof(*pnn), GFP_KERNEL);
+	struct phonet_net *pnn;
+
+	if (!net_eq(net, &init_net))
+		return 0;
+	pnn = kmalloc(sizeof(*pnn), GFP_KERNEL);
 	if (!pnn)
 		return -ENOMEM;
 
@@ -263,9 +270,13 @@
 
 static void phonet_exit_net(struct net *net)
 {
-	struct phonet_net *pnn = net_generic(net, phonet_net_id);
+	struct phonet_net *pnn;
 	struct net_device *dev;
 
+	if (!net_eq(net, &init_net))
+		return;
+	pnn = net_generic(net, phonet_net_id);
+
 	rtnl_lock();
 	for_each_netdev(net, dev)
 		phonet_device_destroy(dev);
--- linux-mvl-dove-2.6.32.orig/net/phonet/pn_netlink.c
+++ linux-mvl-dove-2.6.32/net/phonet/pn_netlink.c
@@ -68,6 +68,8 @@
 	int err;
 	u8 pnaddr;
 
+	if (!net_eq(net, &init_net))
+		return -EOPNOTSUPP;
 	if (!capable(CAP_SYS_ADMIN))
 		return -EPERM;
 
@@ -124,12 +126,16 @@
 
 static int getaddr_dumpit(struct sk_buff *skb, struct netlink_callback *cb)
 {
+	struct net *net = sock_net(skb->sk);
 	struct phonet_device_list *pndevs;
 	struct phonet_device *pnd;
 	int dev_idx = 0, dev_start_idx = cb->args[0];
 	int addr_idx = 0, addr_start_idx = cb->args[1];
 
-	pndevs = phonet_device_list(sock_net(skb->sk));
+	if (!net_eq(net, &init_net))
+		goto skip;
+
+	pndevs = phonet_device_list(net);
 	spin_lock_bh(&pndevs->lock);
 	list_for_each_entry(pnd, &pndevs->list, list) {
 		u8 addr;
@@ -154,6 +160,7 @@
 
 out:
 	spin_unlock_bh(&pndevs->lock);
+skip:
 	cb->args[0] = dev_idx;
 	cb->args[1] = addr_idx;
 
--- linux-mvl-dove-2.6.32.orig/net/phonet/af_phonet.c
+++ linux-mvl-dove-2.6.32/net/phonet/af_phonet.c
@@ -67,6 +67,8 @@
 	struct phonet_protocol *pnp;
 	int err;
 
+	if (!net_eq(net, &init_net))
+		return -EAFNOSUPPORT;
 	if (!capable(CAP_SYS_ADMIN))
 		return -EPERM;
 
@@ -353,6 +355,8 @@
 	struct sockaddr_pn sa;
 	u16 len;
 
+	if (!net_eq(net, &init_net))
+		goto out;
 	/* check we have at least a full Phonet header */
 	if (!pskb_pull(skb, sizeof(struct phonethdr)))
 		goto out;
--- linux-mvl-dove-2.6.32.orig/net/dccp/minisocks.c
+++ linux-mvl-dove-2.6.32/net/dccp/minisocks.c
@@ -254,7 +254,7 @@
 		 * in main socket hash table and lock on listening
 		 * socket does not protect us more.
 		 */
-		sk_add_backlog(child, skb);
+		__sk_add_backlog(child, skb);
 	}
 
 	bh_unlock_sock(child);
--- linux-mvl-dove-2.6.32.orig/net/dccp/options.c
+++ linux-mvl-dove-2.6.32/net/dccp/options.c
@@ -131,6 +131,8 @@
 		case DCCPO_CHANGE_L ... DCCPO_CONFIRM_R:
 			if (pkt_type == DCCP_PKT_DATA)      /* RFC 4340, 6 */
 				break;
+			if (len == 0)
+				goto out_invalid_option;
 			rc = dccp_feat_parse_options(sk, dreq, mandatory, opt,
 						    *value, value + 1, len - 1);
 			if (rc)
--- linux-mvl-dove-2.6.32.orig/net/dccp/probe.c
+++ linux-mvl-dove-2.6.32/net/dccp/probe.c
@@ -164,7 +164,8 @@
 	if (!proc_net_fops_create(&init_net, procname, S_IRUSR, &dccpprobe_fops))
 		goto err0;
 
-	ret = register_jprobe(&dccp_send_probe);
+	ret = try_then_request_module((register_jprobe(&dccp_send_probe) == 0),
+					"dccp");
 	if (ret)
 		goto err1;
 
--- linux-mvl-dove-2.6.32.orig/net/dccp/input.c
+++ linux-mvl-dove-2.6.32/net/dccp/input.c
@@ -616,6 +616,9 @@
 		/* Caller (dccp_v4_do_rcv) will send Reset */
 		dcb->dccpd_reset_code = DCCP_RESET_CODE_NO_CONNECTION;
 		return 1;
+	} else if (sk->sk_state == DCCP_CLOSED) {
+		dcb->dccpd_reset_code = DCCP_RESET_CODE_NO_CONNECTION;
+		return 1;
 	}
 
 	if (sk->sk_state != DCCP_REQUESTING && sk->sk_state != DCCP_RESPOND) {
@@ -678,10 +681,6 @@
 	}
 
 	switch (sk->sk_state) {
-	case DCCP_CLOSED:
-		dcb->dccpd_reset_code = DCCP_RESET_CODE_NO_CONNECTION;
-		return 1;
-
 	case DCCP_REQUESTING:
 		queued = dccp_rcv_request_sent_state_process(sk, skb, dh, len);
 		if (queued >= 0)
--- linux-mvl-dove-2.6.32.orig/net/ax25/af_ax25.c
+++ linux-mvl-dove-2.6.32/net/ax25/af_ax25.c
@@ -1391,6 +1391,7 @@
 	ax25_cb *ax25;
 	int err = 0;
 
+	memset(fsa, 0, sizeof(*fsa));
 	lock_sock(sk);
 	ax25 = ax25_sk(sk);
 
@@ -1402,7 +1403,6 @@
 
 		fsa->fsa_ax25.sax25_family = AF_AX25;
 		fsa->fsa_ax25.sax25_call   = ax25->dest_addr;
-		fsa->fsa_ax25.sax25_ndigis = 0;
 
 		if (ax25->digipeat != NULL) {
 			ndigi = ax25->digipeat->ndigi;
--- linux-mvl-dove-2.6.32.orig/net/ax25/ax25_out.c
+++ linux-mvl-dove-2.6.32/net/ax25/ax25_out.c
@@ -92,6 +92,12 @@
 #endif
 	}
 
+	/*
+	 * There is one ref for the state machine; a caller needs
+	 * one more to put it back, just like with the existing one.
+	 */
+	ax25_cb_hold(ax25);
+
 	ax25_cb_add(ax25);
 
 	ax25->state = AX25_STATE_1;
--- linux-mvl-dove-2.6.32.orig/net/core/sock.c
+++ linux-mvl-dove-2.6.32/net/core/sock.c
@@ -323,6 +323,10 @@
 
 	skb->dev = NULL;
 
+	if (sk_rcvqueues_full(sk, skb)) {
+		atomic_inc(&sk->sk_drops);
+		goto discard_and_relse;
+	}
 	if (nested)
 		bh_lock_sock_nested(sk);
 	else
@@ -336,8 +340,12 @@
 		rc = sk_backlog_rcv(sk, skb);
 
 		mutex_release(&sk->sk_lock.dep_map, 1, _RET_IP_);
-	} else
-		sk_add_backlog(sk, skb);
+	} else if (sk_add_backlog(sk, skb)) {
+		bh_unlock_sock(sk);
+		atomic_inc(&sk->sk_drops);
+		goto discard_and_relse;
+	}
+
 	bh_unlock_sock(sk);
 out:
 	sock_put(sk);
@@ -1114,6 +1122,7 @@
 		sock_lock_init(newsk);
 		bh_lock_sock(newsk);
 		newsk->sk_backlog.head	= newsk->sk_backlog.tail = NULL;
+		newsk->sk_backlog.len = 0;
 
 		atomic_set(&newsk->sk_rmem_alloc, 0);
 		/*
@@ -1181,6 +1190,10 @@
 
 		if (newsk->sk_prot->sockets_allocated)
 			percpu_counter_inc(newsk->sk_prot->sockets_allocated);
+
+		if (sock_flag(newsk, SOCK_TIMESTAMP) ||
+		    sock_flag(newsk, SOCK_TIMESTAMPING_RX_SOFTWARE))
+			net_enable_timestamp();
 	}
 out:
 	return newsk;
@@ -1513,6 +1526,12 @@
 
 		bh_lock_sock(sk);
 	} while ((skb = sk->sk_backlog.head) != NULL);
+
+	/*
+	 * Doing the zeroing here guarantee we can not loop forever
+	 * while a wild producer attempts to flood us.
+	 */
+	sk->sk_backlog.len = 0;
 }
 
 /**
--- linux-mvl-dove-2.6.32.orig/net/core/ethtool.c
+++ linux-mvl-dove-2.6.32/net/core/ethtool.c
@@ -216,22 +216,34 @@
 	return 0;
 }
 
-static int ethtool_set_rxnfc(struct net_device *dev, void __user *useraddr)
+static int ethtool_set_rxnfc(struct net_device *dev,
+			     u32 cmd, void __user *useraddr)
 {
-	struct ethtool_rxnfc cmd;
+	struct ethtool_rxnfc info;
+	size_t info_size = sizeof(info);
 
 	if (!dev->ethtool_ops->set_rxnfc)
 		return -EOPNOTSUPP;
 
-	if (copy_from_user(&cmd, useraddr, sizeof(cmd)))
+	/* struct ethtool_rxnfc was originally defined for
+	 * ETHTOOL_{G,S}RXFH with only the cmd, flow_type and data
+	 * members.  User-space might still be using that
+	 * definition. */
+	if (cmd == ETHTOOL_SRXFH)
+		info_size = (offsetof(struct ethtool_rxnfc, data) +
+			     sizeof(info.data));
+
+	if (copy_from_user(&info, useraddr, info_size))
 		return -EFAULT;
 
-	return dev->ethtool_ops->set_rxnfc(dev, &cmd);
+	return dev->ethtool_ops->set_rxnfc(dev, &info);
 }
 
-static int ethtool_get_rxnfc(struct net_device *dev, void __user *useraddr)
+static int ethtool_get_rxnfc(struct net_device *dev,
+			     u32 cmd, void __user *useraddr)
 {
 	struct ethtool_rxnfc info;
+	size_t info_size = sizeof(info);
 	const struct ethtool_ops *ops = dev->ethtool_ops;
 	int ret;
 	void *rule_buf = NULL;
@@ -239,13 +251,22 @@
 	if (!ops->get_rxnfc)
 		return -EOPNOTSUPP;
 
-	if (copy_from_user(&info, useraddr, sizeof(info)))
+	/* struct ethtool_rxnfc was originally defined for
+	 * ETHTOOL_{G,S}RXFH with only the cmd, flow_type and data
+	 * members.  User-space might still be using that
+	 * definition. */
+	if (cmd == ETHTOOL_GRXFH)
+		info_size = (offsetof(struct ethtool_rxnfc, data) +
+			     sizeof(info.data));
+
+	if (copy_from_user(&info, useraddr, info_size))
 		return -EFAULT;
 
 	if (info.cmd == ETHTOOL_GRXCLSRLALL) {
 		if (info.rule_cnt > 0) {
-			rule_buf = kmalloc(info.rule_cnt * sizeof(u32),
-					   GFP_USER);
+			if (info.rule_cnt <= KMALLOC_MAX_SIZE / sizeof(u32))
+				rule_buf = kzalloc(info.rule_cnt * sizeof(u32),
+						   GFP_USER);
 			if (!rule_buf)
 				return -ENOMEM;
 		}
@@ -256,7 +277,7 @@
 		goto err_out;
 
 	ret = -EFAULT;
-	if (copy_to_user(useraddr, &info, sizeof(info)))
+	if (copy_to_user(useraddr, &info, info_size))
 		goto err_out;
 
 	if (rule_buf) {
@@ -290,7 +311,7 @@
 	if (regs.len > reglen)
 		regs.len = reglen;
 
-	regbuf = kmalloc(reglen, GFP_USER);
+	regbuf = kzalloc(reglen, GFP_USER);
 	if (!regbuf)
 		return -ENOMEM;
 
@@ -309,6 +330,26 @@
 	return ret;
 }
 
+static int ethtool_reset(struct net_device *dev, char __user *useraddr)
+{
+	struct ethtool_value reset;
+	int ret;
+
+	if (!dev->ethtool_ops->reset)
+		return -EOPNOTSUPP;
+
+	if (copy_from_user(&reset, useraddr, sizeof(reset)))
+		return -EFAULT;
+
+	ret = dev->ethtool_ops->reset(dev, &reset.data);
+	if (ret)
+		return ret;
+
+	if (copy_to_user(useraddr, &reset, sizeof(reset)))
+		return -EFAULT;
+	return 0;
+}
+
 static int ethtool_get_wol(struct net_device *dev, char __user *useraddr)
 {
 	struct ethtool_wolinfo wol = { ETHTOOL_GWOL };
@@ -1111,12 +1152,12 @@
 	case ETHTOOL_GRXCLSRLCNT:
 	case ETHTOOL_GRXCLSRULE:
 	case ETHTOOL_GRXCLSRLALL:
-		rc = ethtool_get_rxnfc(dev, useraddr);
+		rc = ethtool_get_rxnfc(dev, ethcmd, useraddr);
 		break;
 	case ETHTOOL_SRXFH:
 	case ETHTOOL_SRXCLSRLDEL:
 	case ETHTOOL_SRXCLSRLINS:
-		rc = ethtool_set_rxnfc(dev, useraddr);
+		rc = ethtool_set_rxnfc(dev, ethcmd, useraddr);
 		break;
 	case ETHTOOL_GGRO:
 		rc = ethtool_get_gro(dev, useraddr);
@@ -1127,6 +1168,9 @@
 	case ETHTOOL_FLASHDEV:
 		rc = ethtool_flash_device(dev, useraddr);
 		break;
+	case ETHTOOL_RESET:
+		rc = ethtool_reset(dev, useraddr);
+		break;
 	default:
 		rc = -EOPNOTSUPP;
 	}
--- linux-mvl-dove-2.6.32.orig/net/core/scm.c
+++ linux-mvl-dove-2.6.32/net/core/scm.c
@@ -156,6 +156,8 @@
 		switch (cmsg->cmsg_type)
 		{
 		case SCM_RIGHTS:
+			if (!sock->ops || sock->ops->family != PF_UNIX)
+				goto error;
 			err=scm_fp_copy(cmsg, &p->fp);
 			if (err<0)
 				goto error;
--- linux-mvl-dove-2.6.32.orig/net/core/dst.c
+++ linux-mvl-dove-2.6.32/net/core/dst.c
@@ -17,6 +17,7 @@
 #include <linux/string.h>
 #include <linux/types.h>
 #include <net/net_namespace.h>
+#include <linux/sched.h>
 
 #include <net/dst.h>
 
@@ -79,6 +80,7 @@
 	while ((dst = next) != NULL) {
 		next = dst->next;
 		prefetch(&next->next);
+		cond_resched();
 		if (likely(atomic_read(&dst->__refcnt))) {
 			last->next = dst;
 			last = dst;
--- linux-mvl-dove-2.6.32.orig/net/core/skbuff.c
+++ linux-mvl-dove-2.6.32/net/core/skbuff.c
@@ -2575,6 +2575,10 @@
 		__copy_skb_header(nskb, skb);
 		nskb->mac_len = skb->mac_len;
 
+		/* nskb and skb might have different headroom */
+		if (nskb->ip_summed == CHECKSUM_PARTIAL)
+			nskb->csum_start += skb_headroom(nskb) - headroom;
+
 		skb_reset_mac_header(nskb);
 		skb_set_network_header(nskb, skb->mac_len);
 		nskb->transport_header = (nskb->network_header +
@@ -2705,7 +2709,7 @@
 		return -E2BIG;
 
 	headroom = skb_headroom(p);
-	nskb = netdev_alloc_skb(p->dev, headroom + skb_gro_offset(p));
+	nskb = alloc_skb(headroom + skb_gro_offset(p), GFP_ATOMIC);
 	if (unlikely(!nskb))
 		return -ENOMEM;
 
@@ -2726,6 +2730,7 @@
 	*NAPI_GRO_CB(nskb) = *NAPI_GRO_CB(p);
 	skb_shinfo(nskb)->frag_list = p;
 	skb_shinfo(nskb)->gso_size = pinfo->gso_size;
+	pinfo->gso_size = 0;
 	skb_header_release(p);
 	nskb->prev = p;
 
--- linux-mvl-dove-2.6.32.orig/net/core/dev.c
+++ linux-mvl-dove-2.6.32/net/core/dev.c
@@ -1037,13 +1037,21 @@
 void dev_load(struct net *net, const char *name)
 {
 	struct net_device *dev;
+	int no_module;
 
 	read_lock(&dev_base_lock);
 	dev = __dev_get_by_name(net, name);
 	read_unlock(&dev_base_lock);
 
-	if (!dev && capable(CAP_NET_ADMIN))
-		request_module("%s", name);
+	no_module = !dev;
+	if (no_module && capable(CAP_NET_ADMIN))
+		no_module = request_module("netdev-%s", name);
+	if (no_module && capable(CAP_SYS_MODULE)) {
+		if (!request_module("%s", name))
+			pr_err("Loading kernel module for a network device "
+"with CAP_SYS_MODULE (deprecated).  Use CAP_NET_ADMIN and alias netdev-%s "
+"instead\n", name);
+	}
 }
 EXPORT_SYMBOL(dev_load);
 
@@ -1484,10 +1492,10 @@
 
 static bool can_checksum_protocol(unsigned long features, __be16 protocol)
 {
-	return ((features & NETIF_F_GEN_CSUM) ||
-		((features & NETIF_F_IP_CSUM) &&
+	return ((features & NETIF_F_NO_CSUM) ||
+		((features & NETIF_F_V4_CSUM) &&
 		 protocol == htons(ETH_P_IP)) ||
-		((features & NETIF_F_IPV6_CSUM) &&
+		((features & NETIF_F_V6_CSUM) &&
 		 protocol == htons(ETH_P_IPV6)) ||
 		((features & NETIF_F_FCOE_CRC) &&
 		 protocol == htons(ETH_P_FCOE)));
@@ -1747,6 +1755,14 @@
 
 		skb->next = nskb->next;
 		nskb->next = NULL;
+
+		/*
+		 * If device doesnt need nskb->dst, release it right now while
+		 * its hot in this cpu cache
+		 */
+		if (dev->priv_flags & IFF_XMIT_DST_RELEASE)
+			skb_dst_drop(nskb);
+
 		rc = ops->ndo_start_xmit(nskb, dev);
 		if (unlikely(rc != NETDEV_TX_OK)) {
 			nskb->next = skb->next;
@@ -2440,7 +2456,7 @@
 }
 EXPORT_SYMBOL(napi_gro_flush);
 
-int dev_gro_receive(struct napi_struct *napi, struct sk_buff *skb)
+enum gro_result dev_gro_receive(struct napi_struct *napi, struct sk_buff *skb)
 {
 	struct sk_buff **pp = NULL;
 	struct packet_type *ptype;
@@ -2448,7 +2464,7 @@
 	struct list_head *head = &ptype_base[ntohs(type) & PTYPE_HASH_MASK];
 	int same_flow;
 	int mac_len;
-	int ret;
+	enum gro_result ret;
 
 	if (!(skb->dev->features & NETIF_F_GRO))
 		goto normal;
@@ -2519,7 +2535,7 @@
 			put_page(skb_shinfo(skb)->frags[0].page);
 			memmove(skb_shinfo(skb)->frags,
 				skb_shinfo(skb)->frags + 1,
-				--skb_shinfo(skb)->nr_frags);
+				--skb_shinfo(skb)->nr_frags * sizeof(skb_frag_t));
 		}
 	}
 
@@ -2532,7 +2548,8 @@
 }
 EXPORT_SYMBOL(dev_gro_receive);
 
-static int __napi_gro_receive(struct napi_struct *napi, struct sk_buff *skb)
+static gro_result_t
+__napi_gro_receive(struct napi_struct *napi, struct sk_buff *skb)
 {
 	struct sk_buff *p;
 
@@ -2549,24 +2566,25 @@
 	return dev_gro_receive(napi, skb);
 }
 
-int napi_skb_finish(int ret, struct sk_buff *skb)
+gro_result_t napi_skb_finish(gro_result_t ret, struct sk_buff *skb)
 {
-	int err = NET_RX_SUCCESS;
-
 	switch (ret) {
 	case GRO_NORMAL:
-		return netif_receive_skb(skb);
+		if (netif_receive_skb(skb))
+			ret = GRO_DROP;
+		break;
 
 	case GRO_DROP:
-		err = NET_RX_DROP;
-		/* fall through */
-
 	case GRO_MERGED_FREE:
 		kfree_skb(skb);
 		break;
+
+	case GRO_HELD:
+	case GRO_MERGED:
+		break;
 	}
 
-	return err;
+	return ret;
 }
 EXPORT_SYMBOL(napi_skb_finish);
 
@@ -2586,7 +2604,7 @@
 }
 EXPORT_SYMBOL(skb_gro_reset_offset);
 
-int napi_gro_receive(struct napi_struct *napi, struct sk_buff *skb)
+gro_result_t napi_gro_receive(struct napi_struct *napi, struct sk_buff *skb)
 {
 	skb_gro_reset_offset(skb);
 
@@ -2598,6 +2616,8 @@
 {
 	__skb_pull(skb, skb_headlen(skb));
 	skb_reserve(skb, NET_IP_ALIGN - skb_headroom(skb));
+	skb->dev = napi->dev;
+	skb->iif = 0;
 
 	napi->skb = skb;
 }
@@ -2623,31 +2643,30 @@
 }
 EXPORT_SYMBOL(napi_get_frags);
 
-int napi_frags_finish(struct napi_struct *napi, struct sk_buff *skb, int ret)
+gro_result_t napi_frags_finish(struct napi_struct *napi, struct sk_buff *skb,
+			       gro_result_t ret)
 {
-	int err = NET_RX_SUCCESS;
-
 	switch (ret) {
 	case GRO_NORMAL:
 	case GRO_HELD:
-		skb->protocol = eth_type_trans(skb, napi->dev);
+		skb->protocol = eth_type_trans(skb, skb->dev);
 
-		if (ret == GRO_NORMAL)
-			return netif_receive_skb(skb);
-
-		skb_gro_pull(skb, -ETH_HLEN);
+		if (ret == GRO_HELD)
+			skb_gro_pull(skb, -ETH_HLEN);
+		else if (netif_receive_skb(skb))
+			ret = GRO_DROP;
 		break;
 
 	case GRO_DROP:
-		err = NET_RX_DROP;
-		/* fall through */
-
 	case GRO_MERGED_FREE:
 		napi_reuse_skb(napi, skb);
 		break;
+
+	case GRO_MERGED:
+		break;
 	}
 
-	return err;
+	return ret;
 }
 EXPORT_SYMBOL(napi_frags_finish);
 
@@ -2688,12 +2707,12 @@
 }
 EXPORT_SYMBOL(napi_frags_skb);
 
-int napi_gro_frags(struct napi_struct *napi)
+gro_result_t napi_gro_frags(struct napi_struct *napi)
 {
 	struct sk_buff *skb = napi_frags_skb(napi);
 
 	if (!skb)
-		return NET_RX_DROP;
+		return GRO_DROP;
 
 	return napi_frags_finish(napi, skb, __napi_gro_receive(napi, skb));
 }
@@ -4860,6 +4879,11 @@
 		rollback_registered(dev);
 		dev->reg_state = NETREG_UNREGISTERED;
 	}
+	/*
+	 *	Prevent userspace races by waiting until the network
+	 *	device is fully setup before sending notifications.
+	 */
+	rtmsg_ifinfo(RTM_NEWLINK, dev, ~0U);
 
 out:
 	return ret;
@@ -5398,6 +5422,12 @@
 	/* Notify protocols, that a new device appeared. */
 	call_netdevice_notifiers(NETDEV_REGISTER, dev);
 
+	/*
+	 *	Prevent userspace races by waiting until the network
+	 *	device is fully setup before sending notifications.
+	 */
+	rtmsg_ifinfo(RTM_NEWLINK, dev, ~0U);
+
 	synchronize_net();
 	err = 0;
 out:
--- linux-mvl-dove-2.6.32.orig/net/core/net-sysfs.c
+++ linux-mvl-dove-2.6.32/net/core/net-sysfs.c
@@ -366,7 +366,8 @@
 	const struct iw_statistics *iw;
 	ssize_t ret = -EINVAL;
 
-	rtnl_lock();
+	if (!rtnl_trylock())
+		return restart_syscall();
 	if (dev_isalive(dev)) {
 		iw = get_wireless_stats(dev);
 		if (iw)
--- linux-mvl-dove-2.6.32.orig/net/core/pktgen.c
+++ linux-mvl-dove-2.6.32/net/core/pktgen.c
@@ -3516,6 +3516,7 @@
 			wait_event_interruptible_timeout(t->queue,
 							 t->control != 0,
 							 HZ/10);
+			try_to_freeze();
 			continue;
 		}
 
--- linux-mvl-dove-2.6.32.orig/net/core/filter.c
+++ linux-mvl-dove-2.6.32/net/core/filter.c
@@ -111,39 +111,41 @@
  */
 unsigned int sk_run_filter(struct sk_buff *skb, struct sock_filter *filter, int flen)
 {
-	struct sock_filter *fentry;	/* We walk down these */
 	void *ptr;
 	u32 A = 0;			/* Accumulator */
 	u32 X = 0;			/* Index Register */
 	u32 mem[BPF_MEMWORDS];		/* Scratch Memory Store */
+	unsigned long memvalid = 0;
 	u32 tmp;
 	int k;
 	int pc;
 
+	BUILD_BUG_ON(BPF_MEMWORDS > BITS_PER_LONG);
 	/*
 	 * Process array of filter instructions.
 	 */
 	for (pc = 0; pc < flen; pc++) {
-		fentry = &filter[pc];
+		const struct sock_filter *fentry = &filter[pc];
+		u32 f_k = fentry->k;
 
 		switch (fentry->code) {
 		case BPF_ALU|BPF_ADD|BPF_X:
 			A += X;
 			continue;
 		case BPF_ALU|BPF_ADD|BPF_K:
-			A += fentry->k;
+			A += f_k;
 			continue;
 		case BPF_ALU|BPF_SUB|BPF_X:
 			A -= X;
 			continue;
 		case BPF_ALU|BPF_SUB|BPF_K:
-			A -= fentry->k;
+			A -= f_k;
 			continue;
 		case BPF_ALU|BPF_MUL|BPF_X:
 			A *= X;
 			continue;
 		case BPF_ALU|BPF_MUL|BPF_K:
-			A *= fentry->k;
+			A *= f_k;
 			continue;
 		case BPF_ALU|BPF_DIV|BPF_X:
 			if (X == 0)
@@ -151,49 +153,49 @@
 			A /= X;
 			continue;
 		case BPF_ALU|BPF_DIV|BPF_K:
-			A /= fentry->k;
+			A /= f_k;
 			continue;
 		case BPF_ALU|BPF_AND|BPF_X:
 			A &= X;
 			continue;
 		case BPF_ALU|BPF_AND|BPF_K:
-			A &= fentry->k;
+			A &= f_k;
 			continue;
 		case BPF_ALU|BPF_OR|BPF_X:
 			A |= X;
 			continue;
 		case BPF_ALU|BPF_OR|BPF_K:
-			A |= fentry->k;
+			A |= f_k;
 			continue;
 		case BPF_ALU|BPF_LSH|BPF_X:
 			A <<= X;
 			continue;
 		case BPF_ALU|BPF_LSH|BPF_K:
-			A <<= fentry->k;
+			A <<= f_k;
 			continue;
 		case BPF_ALU|BPF_RSH|BPF_X:
 			A >>= X;
 			continue;
 		case BPF_ALU|BPF_RSH|BPF_K:
-			A >>= fentry->k;
+			A >>= f_k;
 			continue;
 		case BPF_ALU|BPF_NEG:
 			A = -A;
 			continue;
 		case BPF_JMP|BPF_JA:
-			pc += fentry->k;
+			pc += f_k;
 			continue;
 		case BPF_JMP|BPF_JGT|BPF_K:
-			pc += (A > fentry->k) ? fentry->jt : fentry->jf;
+			pc += (A > f_k) ? fentry->jt : fentry->jf;
 			continue;
 		case BPF_JMP|BPF_JGE|BPF_K:
-			pc += (A >= fentry->k) ? fentry->jt : fentry->jf;
+			pc += (A >= f_k) ? fentry->jt : fentry->jf;
 			continue;
 		case BPF_JMP|BPF_JEQ|BPF_K:
-			pc += (A == fentry->k) ? fentry->jt : fentry->jf;
+			pc += (A == f_k) ? fentry->jt : fentry->jf;
 			continue;
 		case BPF_JMP|BPF_JSET|BPF_K:
-			pc += (A & fentry->k) ? fentry->jt : fentry->jf;
+			pc += (A & f_k) ? fentry->jt : fentry->jf;
 			continue;
 		case BPF_JMP|BPF_JGT|BPF_X:
 			pc += (A > X) ? fentry->jt : fentry->jf;
@@ -208,7 +210,7 @@
 			pc += (A & X) ? fentry->jt : fentry->jf;
 			continue;
 		case BPF_LD|BPF_W|BPF_ABS:
-			k = fentry->k;
+			k = f_k;
 load_w:
 			ptr = load_pointer(skb, k, 4, &tmp);
 			if (ptr != NULL) {
@@ -217,7 +219,7 @@
 			}
 			break;
 		case BPF_LD|BPF_H|BPF_ABS:
-			k = fentry->k;
+			k = f_k;
 load_h:
 			ptr = load_pointer(skb, k, 2, &tmp);
 			if (ptr != NULL) {
@@ -226,7 +228,7 @@
 			}
 			break;
 		case BPF_LD|BPF_B|BPF_ABS:
-			k = fentry->k;
+			k = f_k;
 load_b:
 			ptr = load_pointer(skb, k, 1, &tmp);
 			if (ptr != NULL) {
@@ -241,32 +243,34 @@
 			X = skb->len;
 			continue;
 		case BPF_LD|BPF_W|BPF_IND:
-			k = X + fentry->k;
+			k = X + f_k;
 			goto load_w;
 		case BPF_LD|BPF_H|BPF_IND:
-			k = X + fentry->k;
+			k = X + f_k;
 			goto load_h;
 		case BPF_LD|BPF_B|BPF_IND:
-			k = X + fentry->k;
+			k = X + f_k;
 			goto load_b;
 		case BPF_LDX|BPF_B|BPF_MSH:
-			ptr = load_pointer(skb, fentry->k, 1, &tmp);
+			ptr = load_pointer(skb, f_k, 1, &tmp);
 			if (ptr != NULL) {
 				X = (*(u8 *)ptr & 0xf) << 2;
 				continue;
 			}
 			return 0;
 		case BPF_LD|BPF_IMM:
-			A = fentry->k;
+			A = f_k;
 			continue;
 		case BPF_LDX|BPF_IMM:
-			X = fentry->k;
+			X = f_k;
 			continue;
 		case BPF_LD|BPF_MEM:
-			A = mem[fentry->k];
+			A = (memvalid & (1UL << f_k)) ?
+				mem[f_k] : 0;
 			continue;
 		case BPF_LDX|BPF_MEM:
-			X = mem[fentry->k];
+			X = (memvalid & (1UL << f_k)) ?
+				mem[f_k] : 0;
 			continue;
 		case BPF_MISC|BPF_TAX:
 			X = A;
@@ -275,17 +279,21 @@
 			A = X;
 			continue;
 		case BPF_RET|BPF_K:
-			return fentry->k;
+			return f_k;
 		case BPF_RET|BPF_A:
 			return A;
 		case BPF_ST:
-			mem[fentry->k] = A;
+			memvalid |= 1UL << f_k;
+			mem[f_k] = A;
 			continue;
 		case BPF_STX:
-			mem[fentry->k] = X;
+			memvalid |= 1UL << f_k;
+			mem[f_k] = X;
 			continue;
 		default:
-			WARN_ON(1);
+			WARN_RATELIMIT(1, "Unknown code:%u jt:%u tf:%u k:%u\n",
+				       fentry->code, fentry->jt,
+				       fentry->jf, fentry->k);
 			return 0;
 		}
 
--- linux-mvl-dove-2.6.32.orig/net/core/rtnetlink.c
+++ linux-mvl-dove-2.6.32/net/core/rtnetlink.c
@@ -1334,13 +1334,11 @@
 	case NETDEV_UNREGISTER:
 		rtmsg_ifinfo(RTM_DELLINK, dev, ~0U);
 		break;
-	case NETDEV_REGISTER:
-		rtmsg_ifinfo(RTM_NEWLINK, dev, ~0U);
-		break;
 	case NETDEV_UP:
 	case NETDEV_DOWN:
 		rtmsg_ifinfo(RTM_NEWLINK, dev, IFF_UP|IFF_RUNNING);
 		break;
+	case NETDEV_REGISTER:
 	case NETDEV_CHANGE:
 	case NETDEV_GOING_DOWN:
 		break;
--- linux-mvl-dove-2.6.32.orig/net/core/iovec.c
+++ linux-mvl-dove-2.6.32/net/core/iovec.c
@@ -38,7 +38,7 @@
 
 int verify_iovec(struct msghdr *m, struct iovec *iov, struct sockaddr *address, int mode)
 {
-	int size, err, ct;
+	int size, ct, err;
 
 	if (m->msg_namelen) {
 		if (mode == VERIFY_READ) {
@@ -60,14 +60,13 @@
 	err = 0;
 
 	for (ct = 0; ct < m->msg_iovlen; ct++) {
-		err += iov[ct].iov_len;
-		/*
-		 * Goal is not to verify user data, but to prevent returning
-		 * negative value, which is interpreted as errno.
-		 * Overflow is still possible, but it is harmless.
-		 */
-		if (err < 0)
-			return -EMSGSIZE;
+		size_t len = iov[ct].iov_len;
+
+		if (len > INT_MAX - err) {
+			len = INT_MAX - err;
+			iov[ct].iov_len = len;
+		}
+		err += len;
 	}
 
 	return err;
--- linux-mvl-dove-2.6.32.orig/net/core/neighbour.c
+++ linux-mvl-dove-2.6.32/net/core/neighbour.c
@@ -945,7 +945,10 @@
 {
 	struct hh_cache *hh;
 	void (*update)(struct hh_cache*, const struct net_device*, const unsigned char *)
-		= neigh->dev->header_ops->cache_update;
+		= NULL;
+
+	if (neigh->dev->header_ops)
+		update = neigh->dev->header_ops->cache_update;
 
 	if (update) {
 		for (hh = neigh->hh; hh; hh = hh->hh_next) {
--- linux-mvl-dove-2.6.32.orig/net/core/stream.c
+++ linux-mvl-dove-2.6.32/net/core/stream.c
@@ -140,10 +140,10 @@
 
 		set_bit(SOCK_NOSPACE, &sk->sk_socket->flags);
 		sk->sk_write_pending++;
-		sk_wait_event(sk, &current_timeo, !sk->sk_err &&
-						  !(sk->sk_shutdown & SEND_SHUTDOWN) &&
-						  sk_stream_memory_free(sk) &&
-						  vm_wait);
+		sk_wait_event(sk, &current_timeo, sk->sk_err ||
+						  (sk->sk_shutdown & SEND_SHUTDOWN) ||
+						  (sk_stream_memory_free(sk) &&
+						  !vm_wait));
 		sk->sk_write_pending--;
 
 		if (vm_wait) {
--- linux-mvl-dove-2.6.32.orig/tools/Makefile
+++ linux-mvl-dove-2.6.32/tools/Makefile
@@ -0,0 +1,44 @@
+# kernel sources 
+TOPDIR  := $(shell /bin/pwd)
+
+ifndef KSRC
+KSRC  := $(TOPDIR)/..
+endif
+
+include $(KSRC)/.config
+
+CFLAGS  := $(EXTRA_CFLAGS)
+
+ifndef CROSS_COMPILE
+CROSS_COMPILE := arm-marvell-linux-gnueabi-
+endif
+
+CC := $(CROSS_COMPILE)gcc
+LD := $(CROSS_COMPILE)ld
+
+SUBDIRS += network
+SUBDIRS += devmem2
+SUBDIRS += cesa
+SUBDIRS += usb
+
+TARGETS=
+
+ifeq ($(CONFIG_MV_GATEWAY),y)
+CFLAGS += -DCONFIG_MV_GATEWAY
+endif
+
+ifeq ($(CONFIG_MV_ETHERNET),y)
+CFLAGS += -DCONFIG_MV_ETHERNET
+endif
+
+all : Makefile $(TARGETS)
+	@for subdir in $(SUBDIRS); do \
+                (cd $$subdir && $(MAKE) $@) || exit 1; \
+        done
+	
+clean:
+	rm -f $(TARGETS) *.o
+	@for subdir in $(SUBDIRS); do \
+                (cd $$subdir && $(MAKE) $@) || exit 1; \
+        done
+
--- linux-mvl-dove-2.6.32.orig/tools/perf/Makefile
+++ linux-mvl-dove-2.6.32/tools/perf/Makefile
@@ -2,6 +2,7 @@
 all::
 
 # Define V=1 to have a more verbose compile.
+# Define V=2 to have an even more verbose compile.
 #
 # Define SNPRINTF_RETURNS_BOGUS if your are on a system which snprintf()
 # or vsnprintf() return -1 instead of number of characters which would
@@ -145,6 +146,10 @@
 # Define NO_EXTERNAL_GREP if you don't want "perf grep" to ever call
 # your external grep (e.g., if your system lacks grep, if its grep is
 # broken, or spawning external process is slower than built-in grep perf has).
+#
+# Define LDFLAGS=-static to build a static binary.
+#
+# Define EXTRA_CFLAGS=-m64 or EXTRA_CFLAGS=-m32 as appropriate for cross-builds.
 
 PERF-VERSION-FILE: .FORCE-PERF-VERSION-FILE
 	@$(SHELL_PATH) util/PERF-VERSION-GEN
@@ -157,20 +162,6 @@
 uname_P := $(shell sh -c 'uname -p 2>/dev/null || echo not')
 uname_V := $(shell sh -c 'uname -v 2>/dev/null || echo not')
 
-#
-# Add -m32 for cross-builds:
-#
-ifdef NO_64BIT
-  MBITS := -m32
-else
-  #
-  # If we're on a 64-bit kernel, use -m64:
-  #
-  ifneq ($(patsubst %64,%,$(uname_M)),$(uname_M))
-    MBITS := -m64
-  endif
-endif
-
 # CFLAGS and LDFLAGS are for the users to override from the command line.
 
 #
@@ -200,8 +191,15 @@
 EXTRA_WARNINGS := $(EXTRA_WARNINGS) -Wstrict-prototypes
 EXTRA_WARNINGS := $(EXTRA_WARNINGS) -Wdeclaration-after-statement
 
-CFLAGS = $(MBITS) -ggdb3 -Wall -Wextra -std=gnu99 -Werror -O6 -fstack-protector-all -D_FORTIFY_SOURCE=2 $(EXTRA_WARNINGS)
-LDFLAGS = -lpthread -lrt -lelf -lm
+ifeq ("$(origin DEBUG)", "command line")
+  PERF_DEBUG = $(DEBUG)
+endif
+ifndef PERF_DEBUG
+  CFLAGS_OPTIMIZE = -O6
+endif
+
+CFLAGS = -ggdb3 -Wall -Wextra -std=gnu99 -Werror $(CFLAGS_OPTIMIZE) -D_FORTIFY_SOURCE=2 $(EXTRA_WARNINGS) $(EXTRA_CFLAGS)
+EXTLIBS = -lpthread -lrt -lelf -lm
 ALL_CFLAGS = $(CFLAGS)
 ALL_LDFLAGS = $(LDFLAGS)
 STRIP ?= strip
@@ -218,7 +216,10 @@
 # runtime figures out where they are based on the path to the executable.
 # This can help installing the suite in a relocatable way.
 
+# Make the path relative to DESTDIR, not to prefix
+ifndef DESTDIR
 prefix = $(HOME)
+endif
 bindir_relative = bin
 bindir = $(prefix)/$(bindir_relative)
 mandir = share/man
@@ -235,7 +236,6 @@
 ETC_PERFCONFIG = etc/perfconfig
 endif
 lib = lib
-# DESTDIR=
 
 export prefix bindir sharedir sysconfdir
 
@@ -252,6 +252,21 @@
 # explicitly what architecture to check for. Fix this up for yours..
 SPARSE_FLAGS = -D__BIG_ENDIAN__ -D__powerpc__
 
+ifeq ($(V), 2)
+	QUIET_STDERR = ">/dev/null"
+else
+	QUIET_STDERR = ">/dev/null 2>&1"
+endif
+
+BITBUCKET = "/dev/null"
+
+ifneq ($(shell sh -c "(echo '\#include <stdio.h>'; echo 'int main(void) { return puts(\"hi\"); }') | $(CC) -x c - $(ALL_CFLAGS) -o $(BITBUCKET) "$(QUIET_STDERR)" && echo y"), y)
+	BITBUCKET = .perf.dev.null
+endif
+
+ifeq ($(shell sh -c "echo 'int foo(void) {char X[2]; return 3;}' | $(CC) -x c -c -Werror -fstack-protector-all - -o $(BITBUCKET) "$(QUIET_STDERR)" && echo y"), y)
+  CFLAGS := $(CFLAGS) -fstack-protector-all
+endif
 
 
 ### --- END CONFIGURATION SECTION ---
@@ -421,36 +436,43 @@
 	PTHREAD_LIBS =
 endif
 
-ifeq ($(shell sh -c "(echo '\#include <libelf.h>'; echo 'int main(void) { Elf * elf = elf_begin(0, ELF_C_READ, 0); return (long)elf; }') | $(CC) -x c - $(ALL_CFLAGS) -D_LARGEFILE64_SOURCE -D_FILE_OFFSET_BITS=64 -o /dev/null $(ALL_LDFLAGS) > /dev/null 2>&1 && echo y"), y)
-	ifneq ($(shell sh -c "(echo '\#include <libelf.h>'; echo 'int main(void) { Elf * elf = elf_begin(0, ELF_C_READ_MMAP, 0); return (long)elf; }') | $(CC) -x c - $(ALL_CFLAGS) -D_LARGEFILE64_SOURCE -D_FILE_OFFSET_BITS=64 -o /dev/null $(ALL_LDFLAGS) > /dev/null 2>&1 && echo y"), y)
+ifneq ($(shell sh -c "(echo '\#include <gnu/libc-version.h>'; echo 'int main(void) { const char * version = gnu_get_libc_version(); return (long)version; }') | $(CC) -x c - $(ALL_CFLAGS) -D_LARGEFILE64_SOURCE -D_FILE_OFFSET_BITS=64 -o $(BITBUCKET) $(ALL_LDFLAGS) $(EXTLIBS) "$(QUIET_STDERR)" && echo y"), y)
+	msg := $(error No gnu/libc-version.h found, please install glibc-dev[el]/glibc-static);
+endif
+
+ifeq ($(shell sh -c "(echo '\#include <libelf.h>'; echo 'int main(void) { Elf * elf = elf_begin(0, ELF_C_READ, 0); return (long)elf; }') | $(CC) -x c - $(ALL_CFLAGS) -D_LARGEFILE64_SOURCE -D_FILE_OFFSET_BITS=64 -o $(BITBUCKET) $(ALL_LDFLAGS) $(EXTLIBS) "$(QUIET_STDERR)" && echo y"), y)
+	ifneq ($(shell sh -c "(echo '\#include <libelf.h>'; echo 'int main(void) { Elf * elf = elf_begin(0, ELF_C_READ_MMAP, 0); return (long)elf; }') | $(CC) -x c - $(ALL_CFLAGS) -D_LARGEFILE64_SOURCE -D_FILE_OFFSET_BITS=64 -o $(BITBUCKET) $(ALL_LDFLAGS) $(EXTLIBS) "$(QUIET_STDERR)" && echo y"), y)
 		BASIC_CFLAGS += -DLIBELF_NO_MMAP
 	endif
 else
-	msg := $(error No libelf.h/libelf found, please install libelf-dev/elfutils-libelf-devel and glibc-dev[el]);
+	msg := $(error No libelf.h/libelf found, please install libelf-dev/elfutils-libelf-devel);
 endif
 
 ifdef NO_DEMANGLE
 	BASIC_CFLAGS += -DNO_DEMANGLE
+else ifdef HAVE_CPLUS_DEMANGLE
+	EXTLIBS += -liberty
+	BASIC_CFLAGS += -DHAVE_CPLUS_DEMANGLE
 else
-	has_bfd := $(shell sh -c "(echo '\#include <bfd.h>'; echo 'int main(void) { bfd_demangle(0, 0, 0); return 0; }') | $(CC) -x c - $(ALL_CFLAGS) -o /dev/null $(ALL_LDFLAGS) -lbfd > /dev/null 2>&1 && echo y")
+	has_bfd := $(shell sh -c "(echo '\#include <bfd.h>'; echo 'int main(void) { bfd_demangle(0, 0, 0); return 0; }') | $(CC) -x c - $(ALL_CFLAGS) -o $(BITBUCKET) $(ALL_LDFLAGS) $(EXTLIBS) -lbfd "$(QUIET_STDERR)" && echo y")
 
 	ifeq ($(has_bfd),y)
 		EXTLIBS += -lbfd
 	else
-		has_bfd_iberty := $(shell sh -c "(echo '\#include <bfd.h>'; echo 'int main(void) { bfd_demangle(0, 0, 0); return 0; }') | $(CC) -x c - $(ALL_CFLAGS) -o /dev/null $(ALL_LDFLAGS) -lbfd -liberty > /dev/null 2>&1 && echo y")
+		has_bfd_iberty := $(shell sh -c "(echo '\#include <bfd.h>'; echo 'int main(void) { bfd_demangle(0, 0, 0); return 0; }') | $(CC) -x c - $(ALL_CFLAGS) -o $(BITBUCKET) $(ALL_LDFLAGS) $(EXTLIBS) -lbfd -liberty "$(QUIET_STDERR)" && echo y")
 		ifeq ($(has_bfd_iberty),y)
 			EXTLIBS += -lbfd -liberty
 		else
-			has_bfd_iberty_z := $(shell sh -c "(echo '\#include <bfd.h>'; echo 'int main(void) { bfd_demangle(0, 0, 0); return 0; }') | $(CC) -x c - $(ALL_CFLAGS) -o /dev/null $(ALL_LDFLAGS) -lbfd -liberty -lz > /dev/null 2>&1 && echo y")
+			has_bfd_iberty_z := $(shell sh -c "(echo '\#include <bfd.h>'; echo 'int main(void) { bfd_demangle(0, 0, 0); return 0; }') | $(CC) -x c - $(ALL_CFLAGS) -o $(BITBUCKET) $(ALL_LDFLAGS) $(EXTLIBS) -lbfd -liberty -lz "$(QUIET_STDERR)" && echo y")
 			ifeq ($(has_bfd_iberty_z),y)
 				EXTLIBS += -lbfd -liberty -lz
 			else
-				has_cplus_demangle := $(shell sh -c "(echo 'extern char *cplus_demangle(const char *, int);'; echo 'int main(void) { cplus_demangle(0, 0); return 0; }') | $(CC) -x c - $(ALL_CFLAGS) -o /dev/null $(ALL_LDFLAGS) -liberty > /dev/null 2>&1 && echo y")
+				has_cplus_demangle := $(shell sh -c "(echo 'extern char *cplus_demangle(const char *, int);'; echo 'int main(void) { cplus_demangle(0, 0); return 0; }') | $(CC) -x c - $(ALL_CFLAGS) -o $(BITBUCKET) $(ALL_LDFLAGS) $(EXTLIBS) -liberty "$(QUIET_STDERR)" && echo y")
 				ifeq ($(has_cplus_demangle),y)
 					EXTLIBS += -liberty
 					BASIC_CFLAGS += -DHAVE_CPLUS_DEMANGLE
 				else
-					msg := $(warning No bfd.h/libbfd found, install binutils-dev[el] to gain symbol demangling)
+					msg := $(warning No bfd.h/libbfd found, install binutils-dev[el]/zlib-static to gain symbol demangling)
 					BASIC_CFLAGS += -DNO_DEMANGLE
 				endif
 			endif
@@ -693,7 +715,7 @@
 
 SHELL = $(SHELL_PATH)
 
-all:: shell_compatibility_test $(ALL_PROGRAMS) $(BUILT_INS) $(OTHER_PROGRAMS) PERF-BUILD-OPTIONS
+all:: .perf.dev.null shell_compatibility_test $(ALL_PROGRAMS) $(BUILT_INS) $(OTHER_PROGRAMS) PERF-BUILD-OPTIONS
 ifneq (,$X)
 	$(foreach p,$(patsubst %$X,%,$(filter %$X,$(ALL_PROGRAMS) $(BUILT_INS) perf$X)), test '$p' -ef '$p$X' || $(RM) '$p';)
 endif
@@ -996,6 +1018,11 @@
 .PHONY: .FORCE-PERF-VERSION-FILE TAGS tags cscope .FORCE-PERF-CFLAGS
 .PHONY: .FORCE-PERF-BUILD-OPTIONS
 
+.perf.dev.null:
+		touch .perf.dev.null
+
+.INTERMEDIATE:	.perf.dev.null
+
 ### Make sure built-ins do not have dups and listed in perf.c
 #
 check-builtins::
--- linux-mvl-dove-2.6.32.orig/tools/perf/builtin-timechart.c
+++ linux-mvl-dove-2.6.32/tools/perf/builtin-timechart.c
@@ -275,7 +275,7 @@
 static int
 process_comm_event(event_t *event)
 {
-	pid_set_comm(event->comm.pid, event->comm.comm);
+	pid_set_comm(event->comm.tid, event->comm.comm);
 	return 0;
 }
 static int
--- linux-mvl-dove-2.6.32.orig/tools/perf/util/callchain.h
+++ linux-mvl-dove-2.6.32/tools/perf/util/callchain.h
@@ -48,6 +48,10 @@
 	INIT_LIST_HEAD(&node->brothers);
 	INIT_LIST_HEAD(&node->children);
 	INIT_LIST_HEAD(&node->val);
+
+	node->children_hit = 0;
+	node->parent = NULL;
+	node->hit = 0;
 }
 
 static inline u64 cumul_hits(struct callchain_node *node)
--- linux-mvl-dove-2.6.32.orig/tools/perf/Documentation/Makefile
+++ linux-mvl-dove-2.6.32/tools/perf/Documentation/Makefile
@@ -24,7 +24,10 @@
 DOC_MAN5=$(patsubst %.txt,%.5,$(MAN5_TXT))
 DOC_MAN7=$(patsubst %.txt,%.7,$(MAN7_TXT))
 
+# Make the path relative to DESTDIR, not prefix
+ifndef DESTDIR
 prefix?=$(HOME)
+endif
 bindir?=$(prefix)/bin
 htmldir?=$(prefix)/share/doc/perf-doc
 pdfdir?=$(prefix)/share/doc/perf-doc
@@ -32,7 +35,6 @@
 man1dir=$(mandir)/man1
 man5dir=$(mandir)/man5
 man7dir=$(mandir)/man7
-# DESTDIR=
 
 ASCIIDOC=asciidoc
 ASCIIDOC_EXTRA = --unsafe
--- linux-mvl-dove-2.6.32.orig/tools/cesa/mv_cesa_tool.c
+++ linux-mvl-dove-2.6.32/tools/cesa/mv_cesa_tool.c
@@ -0,0 +1,244 @@
+#include <stdio.h>
+#include <string.h>
+#include <errno.h>
+#include <fcntl.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <sys/ioctl.h>
+#include <sys/poll.h>
+
+#include "cesa_dev.h"
+
+
+
+void show_usage(int badarg)
+{
+        fprintf(stderr,
+                "Usage:                                                                                 \n"
+                " mv_cesa_tool -h                                                                       \n"
+                "   Display this help.                                                                  \n"
+                "                                                                                       \n"
+		" mv_cesa_tool -test  <test_mode> <iter> <req_size> <checkmode>				\n"
+		"	(can be used only in Test Mode)							\n"
+		"	test_mode: Multi, Size AES, DES, 3DES MD5 SHA1     				\n"
+		"	iter	 : number of iteration to run						\n"
+		"	req_size : size of the buffer to be encrypt/decrypt/HASING			\n"
+		"	checkmode: 0 - Fast verify 							\n"
+		"		   1 - Full verify						        \n"
+		"		   2 - without verify (for performence)					\n"
+		"											\n"
+		" mv_cesa_tool -test -s <iter> <req_size> <session_id> <data_id>			\n"
+		"       (can be used only in Test Mode)                                                 \n"
+		"	+++ for debug usage only +++							\n"
+		"	req_size  : size of the buffer to be encrypt/decrypt/HASING                     \n"
+		"	iter      : number of iteration to run 						\n"
+		"	session_id: which session to open out of the cesa_test session see in kernel.	\n"
+		"	data_id   : which data pattern to use out of the cesa_test session see in kernel\n"
+		"       checkmode : 0 - Fast verify                                                     \n"
+                "                   1 - Full verify                                                     \n"
+                "                   2 - without verify (for performence)                                \n"
+		"											\n"
+		" mv_cesa_tool -debug <debug_mode> [-i index] [-v] [-s size]				\n"
+		"	(Tst_req, Tst_stats and Tst_ses can be used only in Test Mode)			\n"
+		"	debug_mode: Sts       - display general status 					\n"
+		"		    Chan      - display channel index status 				\n"
+		"		    Q         - display SW Q 						\n"
+		"		    SA        - display SA index 					\n"
+		"		    SAD       - display entire SAD					\n"
+		"		    Sram - display SRAM contents					\n"
+		"		    Tst_req - display request index with buffer of size size		\n"
+		"                   Tst_stats - display test statistics                                 \n"
+		"		    Tst_ses - display session index					\n"
+		"	-i index  : index (only relevant for: Chan, SA, Tst_req and Tst_ses  \n"
+		"	-v        : verbose mode							\n"
+		"	-s size	  : buffer size (only relevant for Tst_req)				\n\n"
+	);
+
+	exit(badarg);
+}
+
+static void get_index(int argc, char **argv, CESA_DEBUG *cesa_debug)
+{
+	int j;
+	for(j = 3; j < argc; j++) {
+      		if(!strcmp(argv[j], "-i")) {
+           		j++;
+       			break;
+		}
+       	}
+  	if(!(j < argc)) {
+		fprintf(stderr,"missing/ illegal index. \n");
+		exit(1);
+	}
+     	cesa_debug->index = atoi(argv[j]);
+}
+
+static void parse_debug_cmdline(int argc, char **argv, CESA_DEBUG *cesa_debug)
+{
+	unsigned int i = 2,j;
+
+        cesa_debug->mode = 0;
+	for(j = i; j < argc; j++) {
+		if(!strcmp(argv[j], "-v"))
+			cesa_debug->mode++; 
+	}
+
+	if(argc < 3) {
+                fprintf(stderr,"missing arguments\n");
+		exit(1);
+	}
+
+	if(!strcmp(argv[i], "Sts")) 
+        	cesa_debug->debug = STATUS;
+	else if(!strcmp(argv[i], "Chan")) {
+                cesa_debug->debug = CHAN;
+		get_index(argc, argv, cesa_debug);
+	}
+        else if(!strcmp(argv[i], "Q"))
+                cesa_debug->debug = QUEUE;
+        else if(!strcmp(argv[i], "SA")) {
+                cesa_debug->debug = SA;
+		get_index(argc, argv, cesa_debug);
+	}
+        else if(!strcmp(argv[i], "Cache_idx")) {
+                cesa_debug->debug = CACHE_IDX;
+		get_index(argc, argv, cesa_debug);
+	}
+        else if(!strcmp(argv[i], "Sram"))
+                cesa_debug->debug = SRAM;
+        else if(!strcmp(argv[i], "SAD"))
+                cesa_debug->debug = SAD;
+        else if(!strcmp(argv[i], "Tst_req")) {
+                cesa_debug->debug = TST_REQ;
+        	for(j = i; j < argc; j++) {
+                	if(!strcmp(argv[j], "-s")) {
+				j++;
+                        	break;
+			}
+		}
+		if(!(j < argc)) {
+			fprintf(stderr,"missing/illegal size\n");
+			exit(1);
+		}
+		cesa_debug->size = atoi(argv[j]);
+		get_index(argc, argv, cesa_debug);
+	}
+        else if(!strcmp(argv[i], "Tst_ses")) {
+                cesa_debug->debug = TST_SES;
+		get_index(argc, argv, cesa_debug);
+	}
+	else if(!strcmp(argv[i], "Tst_stats")) {
+		cesa_debug->debug = TST_STATS;
+        }
+	else{
+		fprintf(stderr,"illegal debug option\n");
+		exit(1);
+	}
+
+}
+
+static void parse_test_cmdline(int argc, char **argv, CESA_TEST *cesa_test)
+{
+        unsigned int i = 2;
+
+	if(argc < 6) {
+        	fprintf(stderr,"missing arguments\n");
+		exit(1);
+	}
+
+	if(!strcmp(argv[i], "-s")) { /* single test */
+		i++;
+		if(argc != 8)
+                	show_usage(1);
+		cesa_test->test = SINGLE;
+		cesa_test->iter = atoi(argv[i++]);
+		cesa_test->req_size = atoi(argv[i++]);
+		cesa_test->session_id = atoi(argv[i++]);
+		cesa_test->data_id = atoi(argv[i++]);
+                cesa_test->checkmode = atoi(argv[i++]);
+	}
+        else {
+		if(argc != 6)
+                        show_usage(1);
+		if (!strcmp(argv[i], "Multi"))
+                	cesa_test->test = MULTI;
+                else if (!strcmp(argv[i], "Size"))
+                        cesa_test->test = SIZE;
+		else if(!strcmp(argv[i], "AES"))
+                        cesa_test->test = AES;
+                else if(!strcmp(argv[i], "DES"))
+                        cesa_test->test = DES;
+                else if(!strcmp(argv[i], "3DES"))
+                        cesa_test->test = TRI_DES;
+                else if(!strcmp(argv[i], "MD5"))
+                        cesa_test->test = MD5;
+                else if(!strcmp(argv[i], "SHA1"))
+                        cesa_test->test = SHA1;
+		else {
+			fprintf(stderr,"illegal test option\n");	
+			exit(1);
+		}
+		i++;	
+		cesa_test->iter = atoi(argv[i++]);
+		cesa_test->req_size = atoi(argv[i++]);
+		cesa_test->checkmode = atoi(argv[i++]);
+        }
+}
+
+
+
+int main(int argc, char *argv[])
+{
+        char *name = "/dev/cesa";
+        int fd, t, i, fdflags;
+        int rc = 0;
+	CESA_TEST	cesa_test;
+	CESA_DEBUG	cesa_debug;
+
+	memset(&cesa_test, 0, sizeof(CESA_TEST));
+	memset(&cesa_debug, 0, sizeof(CESA_DEBUG));
+
+        /* open the device */
+        fd = open(name, O_RDWR);
+        if (fd <= 0) {
+                printf("## Cannot open %s device.##\n",name);
+                exit(2);
+        }
+
+        /* set some flags */
+        fdflags = fcntl(fd,F_GETFL,0);
+        fdflags |= O_NONBLOCK;
+        fcntl(fd,F_SETFL,fdflags);
+
+        if(argc < 2) {
+                fprintf(stderr,"missing arguments\n");
+		show_usage(1);
+		exit(1);
+        }
+
+	i = 1;
+
+        if (!strcmp(argv[i], "-h")) {
+                show_usage(0);
+        }
+
+        else if (!strcmp(argv[i], "-test")) { /* test */
+		parse_test_cmdline(argc, argv, &cesa_test);
+		printf("test %d iter %d req_size %d checkmode %d sess_id %d data_id %d \n", 
+			cesa_test.test, cesa_test.iter, cesa_test.req_size, cesa_test.checkmode,
+			cesa_test.session_id, cesa_test.data_id );
+
+        	rc = ioctl(fd, CIOCTEST, &cesa_test);
+	}
+	else { /* debug */
+                parse_debug_cmdline(argc, argv, &cesa_debug);
+		printf("debug %d index %d mode %d size %d \n",
+			cesa_debug.debug, cesa_debug.index, cesa_debug.mode, cesa_debug.size);
+                rc = ioctl(fd, CIOCDEBUG, &cesa_debug);
+	}
+	if(rc < 0) printf("Cesa Tool failed to perform action!\n");
+
+	close(fd);
+
+	return 0;
+}
--- linux-mvl-dove-2.6.32.orig/tools/cesa/Makefile
+++ linux-mvl-dove-2.6.32/tools/cesa/Makefile
@@ -0,0 +1,28 @@
+# kernel sources 
+TOPDIR  := $(shell /bin/pwd)
+
+ifndef KSRC
+KSRC  := $(TOPDIR)/../..
+endif
+
+include $(KSRC)/.config
+
+CFLAGS  := $(EXTRA_CFLAGS)
+CFLAGS  += -I$(KSRC)/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_cesa
+
+ifndef CROSS_COMPILE
+CROSS_COMPILE := arm-none-linux-gnueabi-
+endif
+
+CC := $(CROSS_COMPILE)gcc
+LD := $(CROSS_COMPILE)ld
+
+TARGETS=mv_cesa_tool
+
+all : Makefile $(TARGETS)
+	
+mv_cesa_tool:mv_cesa_tool.c
+	$(CC) $(CFLAGS) mv_cesa_tool.c -o mv_cesa_tool 
+clean:
+	rm -f $(TARGETS) *.o
+
--- linux-mvl-dove-2.6.32.orig/tools/network/mv_eth_tool.c
+++ linux-mvl-dove-2.6.32/tools/network/mv_eth_tool.c
@@ -0,0 +1,487 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include "mv_eth_proc.h"
+
+extern char **environ; /* all environments */
+
+static unsigned int port = 0, q = 0, weight = 0, status = 0, mac[6] = {0,};
+static unsigned int policy =0, command = 0, packet = 0;
+static unsigned int value = 0;
+static unsigned int inport, outport, dip, sip, da[6] = {0, }, sa[6] = {0, };
+static unsigned int db_type = 0;
+
+void show_usage(int badarg)
+{
+        fprintf(stderr,
+	"Usage: 										\n"
+	" mv_eth_tool -h		       Display this help				\n"
+	"                                                                                       \n"
+	" --- Global commands ---								\n"
+        " mv_eth_tool -txdone <quota>          Set threshold to start tx_done operations       	\n"
+	" mv_eth_tool -skb <0|1>               SKB reuse support: 0 - disabled, 1 - enabled    	\n"
+        "                                                                                       \n"
+	" --- Port commands ---                                                                 \n"
+        " mv_eth_tool -rxcoal <port> <usec>    Set RX interrupt coalescing value               	\n"
+        " mv_eth_tool -txcoal <port> <usec>    Set TX interrupt coalescing value               	\n"
+	" mv_eth_tool -txen   <port> <deep>    Set deep of lookup for TX enable race.          	\n"
+        "                                      0 - means disable.                              	\n"
+	" mv_eth_tool -ejp    <port> <0|1>     Set EJP mode: 0 - Disable, 1 - Enable           	\n"
+	" mv_eth_tool -tx_noq <idx> <0|1>      Set queuing discipline mode: 0 - Disable, 1 - Enable \n"
+	"                                                                                       \n"
+	" --- Port/Queue commands ---                                                           \n"
+	" mv_eth_tool -tos <port> <rxq> <tos>  Map TOS field to RX queue number                 \n" 
+	"                                                                                       \n"
+	" mv_eth_tool -srq <port> <rxq> <bpdu|arp|tcp|udp>                                     	\n"
+        "                                      Set RX queue number for different packet types. 	\n"
+	"                                      rxq==8 means no special treatment.		\n"
+	"		                       rxq==8 for Arp packets means drop.      		\n"
+	"                                                                                       \n"
+	" mv_eth_tool -sq <port> <rxq> <%%2x:%%2x:%%2x:%%2x:%%2x:%%2x> 				\n"
+	"                                      Set RX queue number for a Multicast MAC         	\n"
+	"                                      rxq==8 indicates delete entry.		        \n"
+        " mv_eth_tool -srp <port> <WRR|FIXED>  Set the Rx Policy to WRR or Fixed 		\n"
+	"											\n"
+	" --- NFP commands ---                                                                  \n"
+        " mv_eth_tool -fprs <inp> <outp> <DIP> <SIP> <DA> <SA>					\n"
+        "                                      Set NFP rule for IPv4 routing			\n"
+        "                                      where DA, SA - MAC addresses xx:xx:xx:xx:xx:xx   \n"
+	" mv_eth_tool -fprd <DIP> <SIP>        Delete NFP Rule for IPv4 routing			\n"
+	" mv_eth_tool -fp_dis                  Disable Network Fast Processing			\n"
+	" mv_eth_tool -fp_en                   Enable Network Fast Processing			\n"
+	" mv_eth_tool -fp_st                   Display NFP Status (enabled/disabled)		\n"
+	" mv_eth_tool -fp_print <DB>           Print NFP Rule Database,                        	\n"
+        "                                      where DB is routing, nat or bridge              	\n"
+	"											\n"
+	" mv_eth_tool -St <option> <port>			       		                \n"
+	"   Display different status information of the port through the kernel printk.		\n"
+	"   OPTIONS:										\n"
+	"   p                                   Display General port information.		\n"
+        "   mac                                 Display MAC addresses information               \n"
+	"   q   <0..7>                          Display specific q information.			\n"
+	"   rxp                                 Display Rx Policy information.			\n"
+	"   txp                                 Display Tx Policy information.			\n"
+	"   cntrs                               Display the HW MIB counters			\n"
+	"   regs                                Display a dump of the giga registers		\n"
+	"   stats                               Display port statistics information. 		\n"
+	"   netdev                              Display net_device status information.          \n"
+	"   nfp                                 Display port NFP statistics                     \n"
+	"   tos                                 Display port TOS to RXQ mapping                 \n"
+	"   switch				Display switch statistics                 	\n"
+        "\n"	
+        );
+        exit(badarg);
+}
+
+static void parse_pt(char *src)
+{
+        if (!strcmp(src, "bpdu"))
+        	packet = PT_BPDU;
+	else if(!strcmp(src, "arp"))
+        	packet = PT_ARP;
+	else if(!strcmp(src, "tcp"))
+        	packet = PT_TCP;
+	else if(!strcmp(src, "udp"))
+        	packet = PT_UDP;
+	else {
+		fprintf(stderr, "Illegall packet type, packet type should be bpdu/arp/tcp/udp. \n");	
+                exit(-1);
+        }
+        return;
+}
+
+static void parse_db_name(char *src)
+{
+	if (!strcmp(src, "routing"))
+		db_type = DB_ROUTING;
+	else if (!strcmp(src, "nat"))
+		db_type = DB_NAT;
+	else if (!strcmp(src, "fdb") || !strcmp(src, "bridge"))
+		db_type = DB_FDB;
+	else {
+		fprintf(stderr, "Illegall DB name, expected routing | nat | bridge. \n");
+		exit(-1);
+	}
+	return;
+}
+
+static void parse_port(char *src)
+{
+	int count;
+
+        count = sscanf(src, "%x",&port);
+
+        if (count != 1)  {
+		fprintf(stderr, "Port parsing error: count=%d\n", count);	
+                exit(-1);
+        }
+        return;
+}
+
+
+static void parse_q(char *src)
+{
+	int count;
+
+        count = sscanf(src, "%x",&q);
+
+        if (count != 1) {
+		fprintf(stderr, "Queue parsing error: count=%d\n", count);	
+                exit(-1);
+        }
+        return;
+}
+
+static void parse_policy(char *src)
+{
+
+        if (!strcmp(src, "WRR"))
+        	policy = WRR;
+	else if (!strcmp(src, "FIXED"))
+        	policy = FIXED;
+	else {
+		fprintf(stderr, "Illegall policy, policy can be WRR or Fixed.\n");	
+                exit(-1);
+        }
+        return;
+}
+
+static void parse_status(char *src)
+{
+    	if (!strcmp(src, "p")) {
+      		status = STS_PORT;
+      	}
+        else if (!strcmp(src, "mac")) {
+                status = STS_PORT_MAC;
+        }
+     	else if(!strcmp(src, "q")) {
+       		status = STS_PORT_Q;
+     	}
+   	else if(!strcmp(src, "rxp")) {
+          	status = STS_PORT_RXP;
+      	}
+     	else if(!strcmp(src, "txp")) {
+           	status = STS_PORT_TXP;
+      	}
+        else if(!strcmp(src, "cntrs")) {
+                status = STS_PORT_MIB;
+        }
+        else if(!strcmp(src, "regs")) {
+                status = STS_PORT_REGS;
+        }
+      	else if(!strcmp(src, "stats")) {
+             	status = STS_PORT_STATS;
+        }
+        else if(!strcmp(src, "nfp")) {
+                status = STS_PORT_NFP_STATS;
+        }
+	else if(!strcmp(src, "netdev")) {
+                status = STS_NETDEV;
+        }
+        else if(!strcmp(src, "tos")) {
+                status = STS_PORT_TOS_MAP;
+        }
+        else if(!strcmp(src, "switch")) {
+                status = STS_SWITCH_STATS;
+        }
+        else {
+                fprintf(stderr, "Illegall ststus %d.\n");
+                exit(-1);
+        }
+        return;
+}
+static void parse_dec_val(char *src, unsigned int* val_ptr)
+{
+    int i, count;
+
+    count = sscanf(src, "%d", val_ptr);
+    if(count != 1) {
+        fprintf(stderr, "Illegall value - should be decimal.\n");
+        exit(-1);
+    }
+    return;
+}
+
+static void parse_hex_val(char *src, unsigned int* hex_val_ptr)
+{
+    int i, count;
+
+    count = sscanf(src, "%x", hex_val_ptr);
+    if(count != 1) {
+        fprintf(stderr, "Illegall value - should be hex.\n");
+        exit(-1);
+    }
+    return;
+}
+
+static int parse_mac(char *src, unsigned int macaddr[])
+{
+        int count;
+        int i;
+        int buf[6];
+
+        count = sscanf(src, "%2x:%2x:%2x:%2x:%2x:%2x",
+                &buf[0], &buf[1], &buf[2], &buf[3], &buf[4], &buf[5]);
+
+        if (count != 6) {
+		fprintf(stderr, "MAC parsing error: Expected %%2x:%%2x:%%2x:%%2x:%%2x:%%2x.\n");
+                exit(-1);
+        }
+
+        for (i = 0; i < count; i++) {
+                macaddr[i] = buf[i];
+        }
+        return 0;
+}
+
+static int parse_ip(char *src, unsigned int* ip)
+{
+    int count, i;
+    int buf[4];
+
+    count = sscanf(src, "%d.%d.%d.%d",
+                &buf[0], &buf[1], &buf[2], &buf[3]);
+
+    if (count != 4) {
+        fprintf(stderr, "Illegall IP address (should be %%d.%%d.%%d.%%d)\n");
+        exit(-1);
+    }
+    *ip = (((buf[0] & 0xFF) << 24) | ((buf[1] & 0xFF) << 16) |
+           ((buf[2] & 0xFF) << 8) | ((buf[3] & 0xFF) << 0));
+    return 0;
+}
+
+static void parse_cmdline(int argc, char **argp)
+{
+	unsigned int i = 1;
+
+	if(argc < 2) {
+		show_usage(1);
+	}
+
+	if (!strcmp(argp[i], "-h")) {
+		show_usage(0);
+	}
+	else if (!strcmp(argp[i], "-srq")) {
+		command = COM_SRQ;
+		i++;	
+		if(argc != 5)
+			show_usage(1); 
+		parse_port(argp[i++]);
+		parse_q(argp[i++]);
+		parse_pt(argp[i++]);
+	}
+	else if (!strcmp(argp[i], "-sq")) {
+		command = COM_SQ;
+		i++;
+		if(argc != 6)
+			show_usage(1); 
+		parse_port(argp[i++]);
+		parse_q(argp[i++]);
+		parse_mac(argp[i++], mac);
+	}
+	else if (!strcmp(argp[i], "-srp")) {
+		command = COM_SRP;
+		i++;
+		if(argc != 4)
+			show_usage(1); 
+		parse_port(argp[i++]);
+		parse_policy(argp[i++]);
+	}
+	else if (!strcmp(argp[i], "-srqw")) {
+		command = COM_SRQW;
+		i++;
+		if(argc != 5)
+			show_usage(1); 
+		parse_port(argp[i++]);
+		parse_q(argp[i++]);
+		parse_hex_val(argp[i++], &weight);
+	}
+    	else if (!strcmp(argp[i], "-stp")) {
+        	command = COM_STP;
+        	i++;
+        	if(argc != 6)
+            		show_usage(1);
+		parse_port(argp[i++]);
+        	parse_q(argp[i++]);
+		parse_hex_val(argp[i++], &weight);
+		parse_policy(argp[i++]);
+    	}
+    	else if (!strcmp(argp[i], "-fprs")) {
+        	command = COM_IP_RULE_SET;
+        	i++;
+        	if(argc != 8)
+            		show_usage(1);
+		parse_dec_val(argp[i++], &inport);
+        	parse_dec_val(argp[i++], &outport);
+		parse_ip(argp[i++], &dip);
+		parse_ip(argp[i++], &sip);
+        	parse_mac(argp[i++], da);
+		parse_mac(argp[i++], sa);
+    	}
+	else if (!strcmp(argp[i], "-fprd")) {
+		command = COM_IP_RULE_DEL;
+		i++;
+		if(argc != 4)
+			show_usage(1);
+		parse_ip(argp[i++], &dip);
+		parse_ip(argp[i++], &sip);
+	}
+	else if (!strcmp(argp[i], "-fp_dis")) {
+		command = COM_FP_DISABLE;
+		if(argc != 2)
+			show_usage(1);
+	}
+	else if (!strcmp(argp[i], "-fp_en")) {
+		command = COM_FP_ENABLE;
+		if(argc != 2)
+			show_usage(1);
+	}
+	else if (!strcmp(argp[i], "-fp_st")) {
+		command = COM_FP_STATUS;
+		if(argc != 2)
+			show_usage(1);
+	}
+	else if (!strcmp(argp[i], "-fp_print")) {
+		command = COM_FP_PRINT;
+		i++;
+		if (argc != 3)
+			show_usage(1);
+		parse_db_name(argp[i++]);
+	}
+    	else if (!strcmp(argp[i], "-txdone")) {
+        	command = COM_TXDONE_Q;
+        	i++;
+		if(argc != 3)
+			show_usage(1);
+        	parse_dec_val(argp[i++], &value);
+    	}
+    	else if (!strcmp(argp[i], "-txen")) {
+                command = COM_TX_EN;
+                i++;
+		if(argc != 4)
+			show_usage(1);
+		parse_port(argp[i++]);
+                parse_dec_val(argp[i++], &value);
+        }
+        else if (!strcmp(argp[i], "-skb")) {
+                command = COM_SKB_REUSE;
+                i++;
+		if(argc != 3)
+			show_usage(1);
+                parse_dec_val(argp[i++], &value);
+        }
+	else if (!strcmp(argp[i], "-rxcoal")) {
+        	command = COM_RX_COAL;
+        	i++;
+		if(argc != 4)
+			show_usage(1);
+        	parse_port(argp[i++]);
+        	parse_dec_val(argp[i++], &value);
+    	}
+    	else if (!strcmp(argp[i], "-txcoal")) {
+        	command = COM_TX_COAL;
+        	i++;
+		if(argc != 4)
+			show_usage(1);
+        	parse_port(argp[i++]);
+        	parse_dec_val(argp[i++], &value);
+    	}
+        else if (!strcmp(argp[i], "-ejp")) {
+                command = COM_EJP_MODE;
+                i++;
+                if(argc != 4)
+                        show_usage(1);
+                parse_port(argp[i++]);
+                parse_dec_val(argp[i++], &value);
+	}
+        else if (!strcmp(argp[i], "-tos")) {
+                command = COM_TOS_MAP;
+                i++;
+                if(argc != 5)
+                        show_usage(1);
+                parse_port(argp[i++]);
+		parse_q(argp[i++]);
+                parse_hex_val(argp[i++], &value);
+        }
+		else if (!strcmp(argp[i], "-tx_noq")) {
+				command = COM_TX_NOQUEUE;
+				i++;
+				if(argc != 4)
+						show_usage(1);
+				parse_port(argp[i++]);
+				parse_dec_val(argp[i++], &value);
+	}
+    	else if (!strcmp(argp[i], "-St")) {
+        	command = COM_STS;
+        	i++;
+		if(argc < 4)
+			show_usage(1);
+		parse_status(argp[i++]);
+		if( status == STS_PORT_Q ) {
+            		if(argc != 5)
+                		show_usage(1);
+               		parse_q(argp[i++]);
+	    	}
+            	else if(argc != 4)
+                	show_usage(1);
+	
+		parse_port(argp[i++]);
+        }	
+	else {
+		show_usage(i++);
+	}
+}
+
+static int procit(void)
+{
+  	FILE *mvethproc;
+  	mvethproc = fopen(FILE_PATH FILE_NAME, "w");
+  	if (!mvethproc) {
+    		printf ("Eror opening file %s/%s\n",FILE_PATH,FILE_NAME);
+    		exit(-1);
+  	}
+
+	switch (command) {
+		case COM_TXDONE_Q:
+		case COM_SKB_REUSE:
+			fprintf (mvethproc, ETH_CMD_STRING, ETH_PRINTF_LIST);
+			break;
+		case COM_RX_COAL:
+		case COM_TX_COAL:
+		case COM_TX_EN:
+		case COM_EJP_MODE:
+		case COM_TX_NOQUEUE:
+			fprintf (mvethproc, PORT_CMD_STRING, PORT_PRINTF_LIST);
+			break;
+		case COM_TOS_MAP:
+			fprintf (mvethproc, QUEUE_CMD_STRING, QUEUE_PRINTF_LIST);
+			break;
+		case COM_IP_RULE_SET:
+			fprintf(mvethproc, IP_RULE_STRING, IP_RULE_PRINT_LIST);
+			break;
+		case COM_IP_RULE_DEL:
+			fprintf(mvethproc, IP_RULE_DEL_STRING, IP_RULE_DEL_PRINT_LIST);
+			break;
+		case COM_FP_DISABLE:
+		case COM_FP_ENABLE:
+		case COM_FP_STATUS:
+			fprintf(mvethproc, FP_EN_DIS_STRING, FP_EN_DIS_PRINT_LIST);
+			break;
+		case COM_FP_PRINT:
+			fprintf(mvethproc, FP_DB_PRINT_STRING, FP_DB_PRINT_PRINT_LIST);
+			break;
+		default:
+			fprintf (mvethproc, PROC_STRING, PROC_PRINT_LIST);
+			break;
+	}
+
+	fclose (mvethproc);
+	return 0;
+}
+
+int main(int argc, char **argp, char **envp)
+{
+        parse_cmdline(argc, argp);
+        return procit();
+}
+
--- linux-mvl-dove-2.6.32.orig/tools/network/phy_reg.c
+++ linux-mvl-dove-2.6.32/tools/network/phy_reg.c
@@ -0,0 +1,112 @@
+#define _GNU_SOURCE
+
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+
+#include <getopt.h>
+#include <string.h>
+#include <unistd.h>
+
+#include <linux/mii.h>
+#include <linux/sockios.h>
+
+#include <net/if.h>
+
+#include <sys/ioctl.h>
+#include <sys/socket.h>
+
+#define READING 0
+#define WRITING 1
+
+void use()
+{
+    fprintf(stderr, "\nphy [OPTIONS]\n\n");
+    fprintf(stderr, "  -a address (register within phy to access)\n");
+    fprintf(stderr, "  -d device (something like eth0, eth1, etc.)\n");
+    fprintf(stderr, "  -r (read the register)\n");
+    fprintf(stderr, "  -w (write the register)\n");
+    fprintf(stderr, "  -v value (the value to write)\n");
+    fprintf(stderr, "  -h (this help message)\n");
+}
+
+int
+main(int argc, char *argv[])
+{
+    int             fd;
+    struct ifreq    request;
+//    struct mii_ioctl_data data;
+	uint16_t *data;
+    int             opt;
+    int             dir = READING;
+    char            *pDev = "eth0";
+    uint32_t        addr = 0;
+    uint32_t        value = 0;
+
+    while((opt = getopt(argc, argv, "a:d:hrv:w")) != -1) {
+        switch(opt) {
+            case 'a':
+                addr = strtoul(optarg, NULL, 16);
+                break;
+
+            case 'd':
+                pDev = optarg;
+                break;
+
+            case 'h':
+                use();
+                exit(0);
+
+            case 'r':
+                dir = READING;
+                break;
+
+            case 'v':
+                value = strtoul(optarg, NULL, 16);
+                break;
+
+            case 'w':
+                dir = WRITING;
+                break;
+
+            default:
+                fprintf(stderr, "bad option\n");
+                use();
+                exit(1);
+        }
+    }
+
+    fd = socket(AF_INET, SOCK_DGRAM, 0);
+    if(fd < 0) {
+        fprintf(stderr, "no sock\n");
+        exit(1);
+    }
+
+    memset(&request, 0, sizeof(request));
+    memset(&data, 0, sizeof(data));
+    strncpy(request.ifr_name, pDev, sizeof(request.ifr_name));
+	data = (uint16_t *)(&request.ifr_data);
+//    data[0] = 1;
+    data[1] = addr; 
+//	request.ifr_data = (__caddr_t)&data;
+
+    if(dir == READING) {
+        if(ioctl(fd, SIOCGMIIREG, &request) < 0) {
+            fprintf(stderr, "SIOCGMIIREG failed\n");
+            exit(1);
+        }
+
+//        printf("%d: %04x\n", addr, data.val_out);
+	printf("%d: %04x\n", addr, data[3]);
+    } else {
+//        data.val_in = value;
+	data[2] = value;
+        if(ioctl(fd, SIOCSMIIREG, &request) < 0) {
+            fprintf(stderr, "SIOCSMIIREG failed\n");
+            exit(1);
+        }
+    }
+
+    exit(0);
+}
+
--- linux-mvl-dove-2.6.32.orig/tools/network/Makefile
+++ linux-mvl-dove-2.6.32/tools/network/Makefile
@@ -0,0 +1,43 @@
+# kernel sources 
+TOPDIR  := $(shell /bin/pwd)
+
+ifndef KSRC
+KSRC  := $(TOPDIR)/../..
+endif
+
+have_config := $(wildcard $(KSRC)/.config)
+
+ifneq ($(strip $(have_config)),) 
+include $(KSRC)/.config
+endif
+
+CFLAGS  := $(EXTRA_CFLAGS)
+CFLAGS  += -I$(KSRC)/arch/arm/plat-orion/mv_hal_drivers/mv_drivers_lsp/mv_network/mv_ethernet/
+
+ifndef CROSS_COMPILE
+CROSS_COMPILE := arm-none-linux-gnueabi-
+endif
+
+CC := $(CROSS_COMPILE)gcc
+LD := $(CROSS_COMPILE)ld
+
+TARGETS=mv_eth_tool phy_reg
+
+ifeq ($(CONFIG_MV_GATEWAY),y)
+CFLAGS += -DCONFIG_MV_GATEWAY
+endif
+
+ifeq ($(CONFIG_MV_ETHERNET),y)
+CFLAGS += -DCONFIG_MV_ETHERNET
+endif
+
+all : Makefile $(TARGETS)
+	
+mv_eth_tool: mv_eth_tool.c
+	$(CC) $(CFLAGS) mv_eth_tool.c -o mv_eth_tool
+phy_reg: phy_reg.c
+	 $(CC)  phy_reg.c -o phy_reg
+
+clean:
+	rm -f $(TARGETS) *.o
+
--- linux-mvl-dove-2.6.32.orig/tools/devmem2/Makefile
+++ linux-mvl-dove-2.6.32/tools/devmem2/Makefile
@@ -0,0 +1,26 @@
+# kernel sources 
+TOPDIR  := $(shell /bin/pwd)
+
+ifndef KSRC
+KSRC  := $(TOPDIR)/../..
+endif
+
+#include $(KSRC)/.config
+
+ifndef CROSS_COMPILE
+CROSS_COMPILE := arm-none-linux-gnueabi-
+endif
+
+CC := $(CROSS_COMPILE)gcc
+LD := $(CROSS_COMPILE)ld
+
+TARGETS=devmem2
+
+all : Makefile $(TARGETS)
+	
+devmem2: devmem2.c
+	$(CC) $(CFLAGS) devmem2.c -o devmem2
+
+clean:
+	rm -f $(TARGETS) *.o
+
--- linux-mvl-dove-2.6.32.orig/tools/devmem2/devmem2.c
+++ linux-mvl-dove-2.6.32/tools/devmem2/devmem2.c
@@ -0,0 +1,121 @@
+/*
+ * devmem2.c: Simple program to read/write from/to any location in memory.
+ *
+ *  Copyright (C) 2000, Jan-Derk Bakker (jdb@lartmaker.nl)
+ *
+ *
+ * This software has been developed for the LART computing board
+ * (http://www.lart.tudelft.nl/). The development has been sponsored by
+ * the Mobile MultiMedia Communications (http://www.mmc.tudelft.nl/)
+ * and Ubiquitous Communications (http://www.ubicom.tudelft.nl/)
+ * projects.
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <string.h>
+#include <errno.h>
+#include <signal.h>
+#include <fcntl.h>
+#include <ctype.h>
+#include <termios.h>
+#include <sys/types.h>
+#include <sys/mman.h>
+  
+#define FATAL do { fprintf(stderr, "Error at line %d, file %s (%d) [%s]\n", \
+  __LINE__, __FILE__, errno, strerror(errno)); exit(1); } while(0)
+ 
+#define MAP_SIZE 4096UL
+#define MAP_MASK (MAP_SIZE - 1)
+
+int main(int argc, char **argv) {
+    int fd;
+    void *map_base, *virt_addr; 
+	unsigned long read_result, writeval;
+	off_t target;
+	int access_type = 'w';
+	
+	if(argc < 2) {
+		fprintf(stderr, "\nUsage:\t%s { address } [ type [ data ] ]\n"
+			"\taddress : memory address to act upon\n"
+			"\ttype    : access operation type : [b]yte, [h]alfword, [w]ord\n"
+			"\tdata    : data to be written\n\n",
+			argv[0]);
+		exit(1);
+	}
+	target = strtoul(argv[1], 0, 0);
+
+	if(argc > 2)
+		access_type = tolower(argv[2][0]);
+
+
+    if((fd = open("/dev/mem", O_RDWR | O_SYNC)) == -1) FATAL;
+//    printf("/dev/mem opened.\n"); 
+//    fflush(stdout);
+    
+    /* Map one page */
+    map_base = mmap(0, MAP_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, fd, target & ~MAP_MASK);
+    if(map_base == (void *) -1) FATAL;
+//    printf("Memory mapped at address %p.\n", map_base); 
+//    fflush(stdout);
+    
+    virt_addr = map_base + (target & MAP_MASK);
+    switch(access_type) {
+		case 'b':
+			read_result = *((unsigned char *) virt_addr);
+			break;
+		case 'h':
+			read_result = *((unsigned short *) virt_addr);
+			break;
+		case 'w':
+			read_result = *((unsigned long *) virt_addr);
+			break;
+		default:
+			fprintf(stderr, "Illegal data type '%c'.\n", access_type);
+			exit(2);
+	}
+    printf("Value at address 0x%X (%p): 0x%X\n", target, virt_addr, read_result); 
+    fflush(stdout);
+
+	if(argc > 3) {
+		writeval = strtoul(argv[3], 0, 0);
+		switch(access_type) {
+			case 'b':
+				*((unsigned char *) virt_addr) = writeval;
+				read_result = *((unsigned char *) virt_addr);
+				break;
+			case 'h':
+				*((unsigned short *) virt_addr) = writeval;
+				read_result = *((unsigned short *) virt_addr);
+				break;
+			case 'w':
+				*((unsigned long *) virt_addr) = writeval;
+				read_result = *((unsigned long *) virt_addr);
+				break;
+		}
+		printf("Written 0x%X; readback 0x%X\n", writeval, read_result); 
+		fflush(stdout);
+	}
+	
+	if(munmap(map_base, MAP_SIZE) == -1) FATAL;
+    close(fd);
+    return 0;
+}
+
--- linux-mvl-dove-2.6.32.orig/tools/usb/Makefile
+++ linux-mvl-dove-2.6.32/tools/usb/Makefile
@@ -0,0 +1,26 @@
+# kernel sources 
+TOPDIR  := $(shell /bin/pwd)
+
+ifndef KSRC
+KSRC  := $(TOPDIR)/../..
+endif
+
+#include $(KSRC)/.config
+
+ifndef CROSS_COMPILE
+CROSS_COMPILE := arm-none-linux-gnueabi-
+endif
+
+CC := $(CROSS_COMPILE)gcc
+LD := $(CROSS_COMPILE)ld
+
+TARGETS=testusb
+
+all : Makefile $(TARGETS)
+	
+testusb: testusb.c
+	$(CC) $(CFLAGS) -static testusb.c -o testusb -lpthread 
+
+clean:
+	rm -f $(TARGETS) *.o
+
--- linux-mvl-dove-2.6.32.orig/tools/usb/testusb.c
+++ linux-mvl-dove-2.6.32/tools/usb/testusb.c
@@ -0,0 +1,429 @@
+/* $(CROSS_COMPILE)cc -Wall -g -lpthread -o testusb testusb.c */
+
+/*
+ * Copyright (c) 2002 by David Brownell
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software Foundation,
+ * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#define __user
+
+#include <stdio.h>
+#include <string.h>
+#include <ftw.h>
+#include <stdlib.h>
+#include <pthread.h>
+#include <unistd.h>
+#include <errno.h>
+
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <fcntl.h>
+
+#include <sys/ioctl.h>
+#include <linux/usbdevice_fs.h>
+
+/*-------------------------------------------------------------------------*/
+
+#define	TEST_CASES	30
+
+// FIXME make these public somewhere; usbdevfs.h?
+
+struct usbtest_param {
+	// inputs
+	unsigned		test_num;	/* 0..(TEST_CASES-1) */
+	unsigned		iterations;
+	unsigned		length;
+	unsigned		vary;
+	unsigned		sglen;
+
+	// outputs
+	struct timeval		duration;
+};
+#define USBTEST_REQUEST	_IOWR('U', 100, struct usbtest_param)
+
+/*-------------------------------------------------------------------------*/
+
+/* #include <linux/usb_ch9.h> */
+
+struct usb_device_descriptor {
+	__u8  bLength;
+	__u8  bDescriptorType;
+	__u16 bcdUSB;
+	__u8  bDeviceClass;
+	__u8  bDeviceSubClass;
+	__u8  bDeviceProtocol;
+	__u8  bMaxPacketSize0;
+	__u16 idVendor;
+	__u16 idProduct;
+	__u16 bcdDevice;
+	__u8  iManufacturer;
+	__u8  iProduct;
+	__u8  iSerialNumber;
+	__u8  bNumConfigurations;
+} __attribute__ ((packed));
+
+enum usb_device_speed {
+	USB_SPEED_UNKNOWN = 0,			/* enumerating */
+	USB_SPEED_LOW, USB_SPEED_FULL,		/* usb 1.1 */
+	USB_SPEED_HIGH				/* usb 2.0 */
+};
+
+/*-------------------------------------------------------------------------*/
+
+static char *speed (enum usb_device_speed s)
+{
+	switch (s) {
+	case USB_SPEED_UNKNOWN:	return "unknown";
+	case USB_SPEED_LOW:	return "low";
+	case USB_SPEED_FULL:	return "full";
+	case USB_SPEED_HIGH:	return "high";
+	default:		return "??";
+	}
+}
+
+struct testdev {
+	struct testdev		*next;
+	char			*name;
+	pthread_t		thread;
+	enum usb_device_speed	speed;
+	unsigned		ifnum : 8;
+	unsigned		forever : 1;
+	int			test;
+
+	struct usbtest_param	param;
+};
+static struct testdev		*testdevs;
+
+static int is_testdev (struct usb_device_descriptor *dev)
+{
+	/* FX2 with (tweaked) bulksrc firmware */
+	if (dev->idVendor == 0x0547 && dev->idProduct == 0x1002)
+		return 1;
+
+	/*----------------------------------------------------*/
+
+	/* devices that start up using the EZ-USB default device and
+	 * which we can use after loading simple firmware.  hotplug
+	 * can fxload it, and then run this test driver.
+	 *
+	 * we return false positives in two cases:
+	 * - the device has a "real" driver (maybe usb-serial) that
+	 *   renumerates.  the device should vanish quickly.
+	 * - the device doesn't have the test firmware installed.
+	 */
+
+	/* generic EZ-USB FX controller */
+	if (dev->idVendor == 0x0547 && dev->idProduct == 0x2235)
+		return 1;
+
+	/* generic EZ-USB FX2 controller */
+	if (dev->idVendor == 0x04b4 && dev->idProduct == 0x8613)
+		return 1;
+
+	/* CY3671 development board with EZ-USB FX */
+	if (dev->idVendor == 0x0547 && dev->idProduct == 0x0080)
+		return 1;
+
+	/* Keyspan 19Qi uses an21xx (original EZ-USB) */
+	if (dev->idVendor == 0x06cd && dev->idProduct == 0x010b)
+		return 1;
+
+	/*----------------------------------------------------*/
+
+	/* "gadget zero", Linux-USB test software */
+	if (dev->idVendor == 0x0525 && dev->idProduct == 0xa4a0)
+		return 1;
+
+	/* user mode subset of that */
+	if (dev->idVendor == 0x0525 && dev->idProduct == 0xa4a4)
+		return 1;
+
+	/* iso version of usermode code */
+	if (dev->idVendor == 0x0525 && dev->idProduct == 0xa4a3)
+		return 1;
+
+	/* some GPL'd test firmware uses these IDs */
+
+	if (dev->idVendor == 0xfff0 && dev->idProduct == 0xfff0)
+		return 1;
+
+	/*----------------------------------------------------*/
+
+	/* iBOT2 high speed webcam */
+	if (dev->idVendor == 0x0b62 && dev->idProduct == 0x0059)
+		return 1;
+
+	return 0;
+}
+
+static int find_testdev (const char *name, const struct stat *sb, int flag)
+{
+	int				fd;
+	struct usb_device_descriptor	dev;
+
+	if (flag != FTW_F)
+		return 0;
+	/* ignore /proc/bus/usb/{devices,drivers} */
+	if (strrchr (name, '/')[1] == 'd')
+		return 0;
+
+	if ((fd = open (name, O_RDONLY)) < 0) {
+		perror ("can't open dev file r/o");
+		return 0;
+	}
+	if (read (fd, &dev, sizeof dev) != sizeof dev)
+		fputs ("short devfile read!\n", stderr);
+	else if (is_testdev (&dev)) {
+		struct testdev		*entry;
+
+		if ((entry = calloc (1, sizeof *entry)) == 0) {
+			fputs ("no mem!\n", stderr);
+			goto done;
+		}
+		entry->name = strdup (name);
+		if (!entry->name) {
+			free (entry);
+			goto done;
+		}
+
+		// FIXME better to look at each interface and ask if it's
+		// bound to 'usbtest', rather than assume interface 0
+		entry->ifnum = 0;
+
+		// FIXME ask usbfs what speed; update USBDEVFS_CONNECTINFO
+		// so it tells about high speed etc
+
+		fprintf (stderr, "%s speed\t%s\n",
+				speed (entry->speed), entry->name);
+
+		entry->next = testdevs;
+		testdevs = entry;
+	}
+
+done:
+	close (fd);
+	return 0;
+}
+
+static int
+usbdev_ioctl (int fd, int ifno, unsigned request, void *param)
+{
+	struct usbdevfs_ioctl	wrapper;
+
+	wrapper.ifno = ifno;
+	wrapper.ioctl_code = request;
+	wrapper.data = param;
+
+	return ioctl (fd, USBDEVFS_IOCTL, &wrapper);
+}
+
+static void *handle_testdev (void *arg)
+{
+	struct testdev		*dev = arg;
+	int			fd, i;
+	int			status;
+
+	if ((fd = open (dev->name, O_RDWR)) < 0) {
+		perror ("can't open dev file r/w");
+		return 0;
+	}
+
+restart:
+	for (i = 0; i < TEST_CASES; i++) {
+		if (dev->test != -1 && dev->test != i)
+			continue;
+		dev->param.test_num = i;
+
+		status = usbdev_ioctl (fd, dev->ifnum,
+				USBTEST_REQUEST, &dev->param);
+		if (status < 0 && errno == EOPNOTSUPP)
+			continue;
+
+		/* FIXME need a "syslog it" option for background testing */
+
+		/* NOTE: each thread emits complete lines; no fragments! */
+		if (status < 0) {
+			char	buf [80];
+			int	err = errno;
+
+			if (strerror_r (errno, buf, sizeof buf)) {
+				snprintf (buf, sizeof buf, "error %d", err);
+				errno = err;
+			}
+			printf ("%s test %d --> %d (%s)\n",
+				dev->name, i, errno, buf);
+		} else
+			printf ("%s test %d, %4d.%.06d secs\n", dev->name, i,
+				(int) dev->param.duration.tv_sec,
+				(int) dev->param.duration.tv_usec);
+
+		fflush (stdout);
+	}
+	if (dev->forever)
+		goto restart;
+
+	close (fd);
+	return arg;
+}
+
+int main (int argc, char **argv)
+{
+	int			c;
+	struct testdev		*entry;
+	char			*device;
+	int			all = 0, forever = 0, not = 0;
+	int			test = -1 /* all */;
+	struct usbtest_param	param;
+
+	/* pick defaults that works with all speeds, without short packets.
+	 *
+	 * Best per-frame data rates:
+	 *     high speed, bulk       512 * 13 * 8 = 53248
+	 *                 interrupt 1024 *  3 * 8 = 24576
+	 *     full speed, bulk/intr   64 * 19     =  1216
+	 *                 interrupt   64 *  1     =    64
+	 *      low speed, interrupt    8 *  1     =     8
+	 */
+	param.iterations = 1000;
+	param.length = 512;
+	param.vary = 512;
+	param.sglen = 32;
+
+	/* for easy use when hotplugging */
+	device = getenv ("DEVICE");
+
+	while ((c = getopt (argc, argv, "D:ac:g:hns:t:v:")) != EOF)
+	switch (c) {
+	case 'D':	/* device, if only one */
+		device = optarg;
+		continue;
+	case 'a':	/* use all devices */
+		device = 0;
+		all = 1;
+		continue;
+	case 'c':	/* count iterations */
+		param.iterations = atoi (optarg);
+		if (param.iterations < 0)
+			goto usage;
+		continue;
+	case 'g':	/* scatter/gather entries */
+		param.sglen = atoi (optarg);
+		if (param.sglen < 0)
+			goto usage;
+		continue;
+	case 'l':	/* loop forever */
+		forever = 1;
+		continue;
+	case 'n':	/* no test running! */
+		not = 1;
+		continue;
+	case 's':	/* size of packet */
+		param.length = atoi (optarg);
+		if (param.length < 0)
+			goto usage;
+		continue;
+	case 't':	/* run just one test */
+		test = atoi (optarg);
+		if (test < 0)
+			goto usage;
+		continue;
+	case 'v':	/* vary packet size by ... */
+		param.vary = atoi (optarg);
+		if (param.vary < 0)
+			goto usage;
+		continue;
+	case '?':
+	case 'h':
+	default:
+usage:
+		fprintf (stderr, "usage: %s [-an] [-D dev]\n"
+			"\t[-c iterations]  [-t testnum]\n"
+			"\t[-s packetsize] [-g sglen] [-v vary]\n",
+			argv [0]);
+		return 1;
+	}
+	if (optind != argc)
+		goto usage;
+	if (!all && !device) {
+		fprintf (stderr, "must specify '-a' or '-D dev', "
+			"or DEVICE=/proc/bus/usb/BBB/DDD in env\n");
+		goto usage;
+	}
+
+	if ((c = open ("/proc/bus/usb/devices", O_RDONLY)) < 0) {
+		fputs ("usbfs files are missing\n", stderr);
+		return -1;
+	}
+
+	/* collect and list the test devices */
+	if (ftw ("/proc/bus/usb", find_testdev, 3) != 0) {
+		fputs ("ftw failed; is usbfs missing?\n", stderr);
+		return -1;
+	}
+
+	/* quit, run single test, or create test threads */
+	if (!testdevs && !device) {
+		fputs ("no test devices recognized\n", stderr);
+		return -1;
+	}
+	if (not)
+		return 0;
+	if (testdevs && testdevs->next == 0 && !device)
+		device = testdevs->name;
+	for (entry = testdevs; entry; entry = entry->next) {
+		int	status;
+
+		entry->param = param;
+		entry->forever = forever;
+		entry->test = test;
+
+		if (device) {
+			if (strcmp (entry->name, device))
+				continue;
+			return handle_testdev (entry) != entry;
+		}
+		status = pthread_create (&entry->thread, 0, handle_testdev, entry);
+		if (status) {
+			perror ("pthread_create");
+			continue;
+		}
+	}
+	if (device) {
+		struct testdev		dev;
+
+		/* kernel can recognize test devices we don't */
+		fprintf (stderr, "%s: %s may see only control tests\n",
+				argv [0], device);
+
+		memset (&dev, 0, sizeof dev);
+		dev.name = device;
+		dev.param = param;
+		dev.forever = forever;
+		dev.test = test;
+		return handle_testdev (&dev) != &dev;
+	}
+
+	/* wait for tests to complete */
+	for (entry = testdevs; entry; entry = entry->next) {
+		void	*retval;
+
+		if (pthread_join (entry->thread, &retval))
+			perror ("pthread_join");
+		/* testing errors discarded! */
+	}
+
+	return 0;
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/Kconfig
+++ linux-mvl-dove-2.6.32/ubuntu/Kconfig
@@ -0,0 +1,14 @@
+menu "Ubuntu Supplied Third-Party Device Drivers"
+
+source "ubuntu/aufs/Kconfig"
+source "ubuntu/compcache/Kconfig"
+source "ubuntu/dm-raid4-5/Kconfig"
+source "ubuntu/fsam7400/Kconfig"
+source "ubuntu/iscsitarget/Kconfig"
+source "ubuntu/lirc/Kconfig"
+source "ubuntu/ndiswrapper/Kconfig"
+source "ubuntu/omnibook/Kconfig"
+source "ubuntu/rtl8192se/Kconfig"
+source "ubuntu/rfkill/Kconfig"
+
+endmenu
--- linux-mvl-dove-2.6.32.orig/ubuntu/Makefile
+++ linux-mvl-dove-2.6.32/ubuntu/Makefile
@@ -0,0 +1,17 @@
+#
+# Makefile for the Linux kernel ubuntu supplied third-party device drivers.
+#
+
+obj-$(CONFIG_AUFS_FS)		+= aufs/
+obj-$(CONFIG_BLK_DEV_COMPCACHE)	+= compcache/
+obj-$(CONFIG_DM_RAID45)		+= dm-raid4-5/
+obj-$(CONFIG_FSAM7400)		+= fsam7400/
+obj-$(CONFIG_SCSI_ISCSITARGET)	+= iscsitarget/
+obj-$(CONFIG_LIRC_DEV)          += lirc/
+obj-$(CONFIG_NDISWRAPPER)	+= ndiswrapper/
+obj-$(CONFIG_OMNIBOOK)		+= omnibook/
+obj-$(CONFIG_RTL8192SE)		+= rtl8192se/
+obj-m				+= rfkill/
+
+# This is a stupid trick to get kbuild to create ubuntu/built-in.o
+obj- += foo.o
--- linux-mvl-dove-2.6.32.orig/ubuntu/iscsitarget/target_disk.c
+++ linux-mvl-dove-2.6.32/ubuntu/iscsitarget/target_disk.c
@@ -0,0 +1,572 @@
+/*
+ * (C) 2004 - 2005 FUJITA Tomonori <tomof@acm.org>
+ * This code is licenced under the GPL.
+ *
+ * heavily based on code from kernel/iscsi.c:
+ *   Copyright (C) 2002-2003 Ardis Technolgies <roman@ardistech.com>,
+ *   licensed under the terms of the GNU GPL v2.0,
+ */
+
+#include <linux/ctype.h>
+#include <scsi/scsi.h>
+
+#include "iscsi.h"
+#include "iscsi_dbg.h"
+
+static int insert_disconnect_pg(u8 *ptr)
+{
+	unsigned char disconnect_pg[] = {0x02, 0x0e, 0x80, 0x80, 0x00, 0x0a, 0x00, 0x00,
+                                         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
+
+	memcpy(ptr, disconnect_pg, sizeof(disconnect_pg));
+	return sizeof(disconnect_pg);
+}
+
+static int insert_caching_pg(u8 *ptr, int wcache, int rcache)
+{
+	unsigned char caching_pg[] = {0x08, 0x12, 0x10, 0x00, 0xff, 0xff, 0x00, 0x00,
+				      0xff, 0xff, 0xff, 0xff, 0x80, 0x14, 0x00, 0x00,
+				      0x00, 0x00, 0x00, 0x00};
+
+	memcpy(ptr, caching_pg, sizeof(caching_pg));
+	if (wcache)
+		ptr[2] |= 0x04;	/* set WCE bit if we're caching writes */
+	if (!rcache)
+		ptr[2] |= 0x01; /* Read Cache Disable */
+
+	return sizeof(caching_pg);
+}
+
+static int insert_ctrl_m_pg(u8 *ptr)
+{
+	unsigned char ctrl_m_pg[] = {0x0a, 0x0a, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
+				     0x00, 0x00, 0x02, 0x4b};
+
+	memcpy(ptr, ctrl_m_pg, sizeof(ctrl_m_pg));
+	return sizeof(ctrl_m_pg);
+}
+
+static int insert_iec_m_pg(u8 *ptr)
+{
+	unsigned char iec_m_pg[] = {0x1c, 0xa, 0x08, 0x00, 0x00, 0x00, 0x00,
+				    0x00, 0x00, 0x00, 0x00, 0x00};
+
+	memcpy(ptr, iec_m_pg, sizeof(iec_m_pg));
+	return sizeof(iec_m_pg);
+}
+
+static int insert_format_m_pg(u8 *ptr, u32 sector_size)
+{
+	unsigned char format_m_pg[] = {0x03, 0x16, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+				       0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 0x00, 0x00,
+				       0x00, 0x00, 0x00, 0x00, 0x0c, 0x00, 0x00, 0x00};
+
+	memcpy(ptr, format_m_pg, sizeof(format_m_pg));
+	ptr[12] = (sector_size >> 8) & 0xff;
+	ptr[13] = sector_size & 0xff;
+	return sizeof(format_m_pg);
+}
+
+static int insert_geo_m_pg(u8 *ptr, u64 sec)
+{
+	unsigned char geo_m_pg[] = {0x04, 0x16, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00,
+				    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+				    0x00, 0x00, 0x00, 0x00, 0x3a, 0x98, 0x00, 0x00};
+	u32 ncyl;
+	u32 n;
+
+	/* assume 0xff heads, 15krpm. */
+	memcpy(ptr, geo_m_pg, sizeof(geo_m_pg));
+	ncyl = sec >> 14; /* 256 * 64 */
+	memcpy(&n, ptr+1, sizeof(u32));
+	n = n | cpu_to_be32(ncyl);
+	memcpy(ptr+1, &n, sizeof(u32));
+	return sizeof(geo_m_pg);
+}
+
+static void build_mode_sense_response(struct iscsi_cmnd *cmnd)
+{
+	struct iscsi_scsi_cmd_hdr *req = cmnd_hdr(cmnd);
+	struct tio *tio = cmnd->tio;
+	u8 *data, *scb = req->scb;
+	int len = 4, err = 0;
+	u8 pcode;
+
+	/* changeable parameter mode pages are unsupported */
+	if ((scb[2] & 0xc0) >> 6 == 0x1)
+		goto set_sense;
+
+	pcode = req->scb[2] & 0x3f;
+
+	assert(!tio);
+	tio = cmnd->tio = tio_alloc(1);
+	data = page_address(tio->pvec[0]);
+	assert(data);
+	clear_page(data);
+
+	if (LUReadonly(cmnd->lun))
+		data[2] = 0x80;
+
+	if ((scb[1] & 0x8))
+		data[3] = 0;
+	else {
+		data[3] = 8;
+		len += 8;
+		*(u32 *)(data + 4) = (cmnd->lun->blk_cnt >> 32) ?
+			cpu_to_be32(0xffffffff) : cpu_to_be32(cmnd->lun->blk_cnt);
+		*(u32 *)(data + 8) = cpu_to_be32(1 << cmnd->lun->blk_shift);
+	}
+
+	switch (pcode) {
+	case 0x0:
+		break;
+	case 0x2:
+		len += insert_disconnect_pg(data + len);
+		break;
+	case 0x3:
+		len += insert_format_m_pg(data + len, 1 << cmnd->lun->blk_shift);
+		break;
+	case 0x4:
+		len += insert_geo_m_pg(data + len, cmnd->lun->blk_cnt);
+		break;
+	case 0x8:
+		len += insert_caching_pg(data + len, LUWCache(cmnd->lun),
+					 LURCache(cmnd->lun));
+		break;
+	case 0xa:
+		len += insert_ctrl_m_pg(data + len);
+		break;
+	case 0x1c:
+		len += insert_iec_m_pg(data + len);
+		break;
+	case 0x3f:
+		len += insert_disconnect_pg(data + len);
+		len += insert_format_m_pg(data + len, 1 << cmnd->lun->blk_shift);
+		len += insert_geo_m_pg(data + len, cmnd->lun->blk_cnt);
+		len += insert_caching_pg(data + len, LUWCache(cmnd->lun),
+					 LURCache(cmnd->lun));
+		len += insert_ctrl_m_pg(data + len);
+		len += insert_iec_m_pg(data + len);
+		break;
+	default:
+		err = -1;
+	}
+
+	if (!err) {
+		data[0] = len - 1;
+		tio_set(tio, len, 0);
+		return;
+	}
+
+	tio_put(tio);
+	cmnd->tio = NULL;
+ set_sense:
+	/* Invalid Field In CDB */
+	iscsi_cmnd_set_sense(cmnd, ILLEGAL_REQUEST, 0x24, 0x0);
+}
+
+static void build_inquiry_response(struct iscsi_cmnd *cmnd)
+{
+	struct iscsi_scsi_cmd_hdr *req = cmnd_hdr(cmnd);
+	struct tio *tio = cmnd->tio;
+	u8 *data;
+	u8 *scb = req->scb;
+	int err = -1;
+
+	/*
+	 * - CmdDt and EVPD both set or EVPD and Page Code set: illegal
+	 * - CmdDt set: not supported
+	 */
+	if ((scb[1] & 0x3) > 0x1 || (!(scb[1] & 0x3) && scb[2]))
+		goto set_sense;
+
+	assert(!tio);
+	tio = cmnd->tio = tio_alloc(1);
+	data = page_address(tio->pvec[0]);
+	assert(data);
+	clear_page(data);
+
+	if (!(scb[1] & 0x3)) {
+		data[2] = 4;
+		data[3] = 0x52;
+		data[4] = 59;
+		data[7] = 0x02;
+		memset(data + 8, 0x20, 28);
+		memcpy(data + 8,
+		       VENDOR_ID, min_t(size_t, strlen(VENDOR_ID), 8));
+		memcpy(data + 16,
+		       PRODUCT_ID, min_t(size_t, strlen(PRODUCT_ID), 16));
+		memcpy(data + 32,
+		       PRODUCT_REV, min_t(size_t, strlen(PRODUCT_REV), 4));
+		data[58] = 0x03;
+		data[59] = 0x20;
+		data[60] = 0x09;
+		data[61] = 0x60;
+		data[62] = 0x03;
+		data[63] = 0x00;
+		tio_set(tio, 64, 0);
+		err = 0;
+	} else if (scb[1] & 0x1) {
+		/* EVPD bit set */
+		if (scb[2] == 0x0) {
+			data[1] = 0x0;
+			data[3] = 3;
+			data[4] = 0x0;
+			data[5] = 0x80;
+			data[6] = 0x83;
+			tio_set(tio, 7, 0);
+			err = 0;
+		} else if (scb[2] == 0x80) {
+			int len = (cmnd->lun && strlen(cmnd->lun->scsi_sn)) ?
+				SCSI_SN_LEN : 4;
+
+			data[1] = 0x80;
+			data[3] = len;
+			memset(data + 4, 0x20, len);
+			tio_set(tio, len + 4, 0);
+			err = 0;
+
+			if (len == SCSI_SN_LEN) {
+				char *p, *q;
+
+				p = data + 4 + len - 1;
+				q = cmnd->lun->scsi_sn + len - 1;
+
+				for (; len > 0; len--, q--)
+					if (isascii(*q) && isprint(*q))
+						*(p--) = *q;
+			}
+		} else if (scb[2] == 0x83) {
+			u32 len = SCSI_ID_LEN * sizeof(u8);
+
+			data[1] = 0x83;
+			data[3] = len + 4;
+			data[4] = 0x1;
+			data[5] = 0x1;
+			data[7] = len;
+			if (cmnd->lun) /* We need this ? */
+				memcpy(data + 8, cmnd->lun->scsi_id, len);
+			tio_set(tio, len + 8, 0);
+			err = 0;
+		}
+	}
+
+	if (!err) {
+		tio_set(tio, min_t(u8, tio->size, scb[4]), 0);
+		if (!cmnd->lun)
+			data[0] = TYPE_NO_LUN;
+		return;
+	}
+
+	tio_put(tio);
+	cmnd->tio = NULL;
+ set_sense:
+	/* Invalid Field In CDB */
+	iscsi_cmnd_set_sense(cmnd, ILLEGAL_REQUEST, 0x24, 0x0);
+}
+
+static void build_report_luns_response(struct iscsi_cmnd *cmnd)
+{
+	struct iscsi_scsi_cmd_hdr *req = cmnd_hdr(cmnd);
+	struct tio *tio = cmnd->tio;
+	u32 *data, size, len;
+	struct iet_volume *lun;
+	int rest, idx = 0;
+
+	size = (u32)req->scb[6] << 24 | (u32)req->scb[7] << 16 |
+		(u32)req->scb[8] << 8 | (u32)req->scb[9];
+	if (size < 16) {
+		/* Invalid Field In CDB */
+		iscsi_cmnd_set_sense(cmnd, ILLEGAL_REQUEST, 0x24, 0x0);
+		return;
+	}
+
+	len = atomic_read(&cmnd->conn->session->target->nr_volumes) * 8;
+	size = min(size & ~(8 - 1), len + 8);
+
+	assert(!tio);
+	tio = cmnd->tio = tio_alloc(get_pgcnt(size, 0));
+	tio_set(tio, size, 0);
+
+	data = page_address(tio->pvec[idx]);
+	assert(data);
+	*data++ = cpu_to_be32(len);
+	*data++ = 0;
+	size -= 8;
+	rest = PAGE_CACHE_SIZE - 8;
+	list_for_each_entry(lun, &cmnd->conn->session->target->volumes, list) {
+		if (lun->l_state != IDEV_RUNNING)
+			continue;
+
+		*data++ = cpu_to_be32((0x3ff & lun->lun) << 16 |
+				      ((lun->lun > 0xff) ? (0x1 << 30) : 0));
+		*data++ = 0;
+		if ((size -= 8) == 0)
+			break;
+		if ((rest -= 8) == 0) {
+			idx++;
+			data = page_address(tio->pvec[idx]);
+			rest = PAGE_CACHE_SIZE;
+		}
+	}
+}
+
+static void build_read_capacity_response(struct iscsi_cmnd *cmnd)
+{
+	struct tio *tio = cmnd->tio;
+	u32 *data;
+
+	assert(!tio);
+	tio = cmnd->tio = tio_alloc(1);
+	data = page_address(tio->pvec[0]);
+	assert(data);
+	clear_page(data);
+
+	data[0] = (cmnd->lun->blk_cnt >> 32) ?
+		cpu_to_be32(0xffffffff) : cpu_to_be32(cmnd->lun->blk_cnt - 1);
+	data[1] = cpu_to_be32(1U << cmnd->lun->blk_shift);
+
+	tio_set(tio, 8, 0);
+}
+
+static void build_request_sense_response(struct iscsi_cmnd *cmnd)
+{
+	struct tio *tio = cmnd->tio;
+	u8 *data;
+
+	assert(!tio);
+	tio = cmnd->tio = tio_alloc(1);
+	data = page_address(tio->pvec[0]);
+	assert(data);
+	memset(data, 0, 18);
+	data[0] = 0xf0;
+	data[1] = 0;
+	data[2] = NO_SENSE;
+	data[7] = 10;
+	tio_set(tio, 18, 0);
+}
+
+static void build_service_action_in_response(struct iscsi_cmnd *cmnd)
+{
+	struct tio *tio = cmnd->tio;
+	u32 *data;
+	u64 *data64;
+
+	assert(!tio);
+
+	/* only READ_CAPACITY_16 service action is currently supported */
+	if ((cmnd_hdr(cmnd)->scb[1] & 0x1F) != 0x10) {
+		/* Invalid Field In CDB */
+		iscsi_cmnd_set_sense(cmnd, ILLEGAL_REQUEST, 0x24, 0x0);
+		return;
+	}
+
+	tio = cmnd->tio = tio_alloc(1);
+	data = page_address(tio->pvec[0]);
+	assert(data);
+	clear_page(data);
+	data64 = (u64*) data;
+	data64[0] = cpu_to_be64(cmnd->lun->blk_cnt - 1);
+	data[2] = cpu_to_be32(1UL << cmnd->lun->blk_shift);
+
+	tio_set(tio, 12, 0);
+}
+
+static void build_read_response(struct iscsi_cmnd *cmnd)
+{
+	struct tio *tio = cmnd->tio;
+
+	assert(tio);
+	assert(cmnd->lun);
+
+	if (tio_read(cmnd->lun, tio))
+		/* Medium Error/Unrecovered Read Error */
+		iscsi_cmnd_set_sense(cmnd, MEDIUM_ERROR, 0x11, 0x0);
+}
+
+static void build_write_response(struct iscsi_cmnd *cmnd)
+{
+	int err;
+	struct tio *tio = cmnd->tio;
+
+	assert(tio);
+	assert(cmnd->lun);
+
+	list_del_init(&cmnd->list);
+	err = tio_write(cmnd->lun, tio);
+	if (!err && !LUWCache(cmnd->lun))
+		err = tio_sync(cmnd->lun, tio);
+
+	if (err)
+		/* Medium Error/Write Fault */
+		iscsi_cmnd_set_sense(cmnd, MEDIUM_ERROR, 0x03, 0x0);
+}
+
+static void build_sync_cache_response(struct iscsi_cmnd *cmnd)
+{
+	assert(cmnd->lun);
+	if (tio_sync(cmnd->lun, NULL))
+		/* Medium Error/Write Fault */
+		iscsi_cmnd_set_sense(cmnd, MEDIUM_ERROR, 0x03, 0x0);
+}
+
+static void build_generic_response(struct iscsi_cmnd *cmnd)
+{
+	return;
+}
+
+static void build_reserve_response(struct iscsi_cmnd *cmnd)
+{
+	switch (volume_reserve(cmnd->lun, cmnd->conn->session->sid)) {
+	case -ENOENT:
+		/* Logical Unit Not Supported (?) */
+		iscsi_cmnd_set_sense(cmnd, ILLEGAL_REQUEST, 0x25, 0x0);
+		break;
+	case -EBUSY:
+		cmnd->status = SAM_STAT_RESERVATION_CONFLICT;
+		break;
+	default:
+		break;
+	}
+}
+
+static void build_release_response(struct iscsi_cmnd *cmnd)
+{
+	if (volume_release(cmnd->lun,
+			   cmnd->conn->session->sid, 0))
+		cmnd->status = SAM_STAT_RESERVATION_CONFLICT;
+}
+
+static void build_reservation_conflict_response(struct iscsi_cmnd *cmnd)
+{
+	cmnd->status = SAM_STAT_RESERVATION_CONFLICT;
+}
+
+static int disk_check_ua(struct iscsi_cmnd *cmnd)
+{
+	struct iscsi_scsi_cmd_hdr *req = cmnd_hdr(cmnd);
+	struct ua_entry *ua;
+
+	if (cmnd->lun && ua_pending(cmnd->conn->session, cmnd->lun->lun)) {
+		switch(req->scb[0]){
+		case INQUIRY:
+		case REQUEST_SENSE:
+			break;
+		case REPORT_LUNS:
+			ua = ua_get_match(cmnd->conn->session,
+					  cmnd->lun->lun,
+					  /* reported luns data has changed */
+					  0x3f, 0x0e);
+			ua_free(ua);
+			break;
+		default:
+			ua = ua_get_first(cmnd->conn->session, cmnd->lun->lun);
+			iscsi_cmnd_set_sense(cmnd, UNIT_ATTENTION, ua->asc,
+					     ua->ascq);
+			ua_free(ua);
+			send_scsi_rsp(cmnd, build_generic_response);
+			return 1;
+		}
+	}
+	return 0;
+}
+
+static int disk_check_reservation(struct iscsi_cmnd *cmnd)
+{
+	struct iscsi_scsi_cmd_hdr *req = cmnd_hdr(cmnd);
+
+	if (is_volume_reserved(cmnd->lun,
+			       cmnd->conn->session->sid)) {
+		switch (req->scb[0]) {
+		case INQUIRY:
+		case RELEASE:
+		case REPORT_LUNS:
+		case REQUEST_SENSE:
+		case READ_CAPACITY:
+			/* allowed commands when reserved */
+			break;
+		case SERVICE_ACTION_IN:
+			if ((cmnd_hdr(cmnd)->scb[1] & 0x1F) == 0x10)
+				break;
+			/* fall through */
+		default:
+			/* return reservation conflict for all others */
+			send_scsi_rsp(cmnd,
+				      build_reservation_conflict_response);
+			return 1;
+		}
+	}
+
+	return 0;
+}
+
+static int disk_execute_cmnd(struct iscsi_cmnd *cmnd)
+{
+	struct iscsi_scsi_cmd_hdr *req = cmnd_hdr(cmnd);
+
+	req->opcode &= ISCSI_OPCODE_MASK;
+
+	if (disk_check_ua(cmnd))
+		return 0;
+
+	if (disk_check_reservation(cmnd))
+		return 0;
+
+	switch (req->scb[0]) {
+	case INQUIRY:
+		send_data_rsp(cmnd, build_inquiry_response);
+		break;
+	case REPORT_LUNS:
+		send_data_rsp(cmnd, build_report_luns_response);
+		break;
+	case READ_CAPACITY:
+		send_data_rsp(cmnd, build_read_capacity_response);
+		break;
+	case MODE_SENSE:
+		send_data_rsp(cmnd, build_mode_sense_response);
+		break;
+	case REQUEST_SENSE:
+		send_data_rsp(cmnd, build_request_sense_response);
+		break;
+	case SERVICE_ACTION_IN:
+		send_data_rsp(cmnd, build_service_action_in_response);
+		break;
+	case READ_6:
+	case READ_10:
+	case READ_16:
+		send_data_rsp(cmnd, build_read_response);
+		break;
+	case WRITE_6:
+	case WRITE_10:
+	case WRITE_16:
+	case WRITE_VERIFY:
+		send_scsi_rsp(cmnd, build_write_response);
+		break;
+	case SYNCHRONIZE_CACHE:
+		send_scsi_rsp(cmnd, build_sync_cache_response);
+		break;
+	case RESERVE:
+		send_scsi_rsp(cmnd, build_reserve_response);
+		break;
+	case RELEASE:
+		send_scsi_rsp(cmnd, build_release_response);
+		break;
+	case START_STOP:
+	case TEST_UNIT_READY:
+	case VERIFY:
+	case VERIFY_16:
+		send_scsi_rsp(cmnd, build_generic_response);
+		break;
+	default:
+		eprintk("%s\n", "we should not come here!");
+		break;
+	}
+
+	return 0;
+}
+
+struct target_type disk_ops =
+{
+	.id = 0,
+	.execute_cmnd = disk_execute_cmnd,
+};
--- linux-mvl-dove-2.6.32.orig/ubuntu/iscsitarget/iscsi_dbg.h
+++ linux-mvl-dove-2.6.32/ubuntu/iscsitarget/iscsi_dbg.h
@@ -0,0 +1,137 @@
+#ifndef ISCSI_DBG_H
+#define ISCSI_DBG_H
+
+#define D_SETUP		(1UL << 0)
+#define D_EXIT		(1UL << 1)
+#define D_GENERIC	(1UL << 2)
+#define D_READ		(1UL << 3)
+#define D_WRITE 	(1UL << 4)
+#define D_IOD		(1UL << 5)
+#define D_THREAD	(1UL << 6)
+#define D_TASK_MGT	(1UL << 7)
+#define D_IOMODE	(1UL << 8)
+#define D_UAC           (1UL << 9)
+
+#define D_DATA		(D_READ | D_WRITE)
+
+extern unsigned long debug_enable_flags;
+
+#define PFX "iscsi_trgt: "
+
+#define dprintk(debug, fmt, args...) do {			\
+	if ((debug) & debug_enable_flags) {			\
+		printk(KERN_DEBUG PFX "%s(%d) " fmt, __FUNCTION__,\
+						__LINE__, args);\
+	}							\
+} while (0)
+
+#define dprintk_ua(ua, sess, lun)					\
+	dprintk(D_UAC, "sess %llu, lun %u: %p %x %x\n",			\
+		(sess)->sid, lun, ua,					\
+		(ua) ? (ua)->asc : 0,					\
+		(ua) ? (ua)->ascq : 0)
+
+#define eprintk(fmt, args...) do {				\
+	printk(KERN_ERR PFX "%s(%d) " fmt, __FUNCTION__,	\
+						__LINE__, args);\
+} while (0)
+
+#define iprintk(X...) printk(KERN_INFO PFX X)
+
+#define assert(p) do {						\
+	if (!(p)) {						\
+		printk(KERN_CRIT PFX "BUG at %s:%d assert(%s)\n",\
+		       __FILE__, __LINE__, #p);			\
+		dump_stack();					\
+		BUG();						\
+	}							\
+} while (0)
+
+#ifdef D_IOV
+static inline void iscsi_dump_iov(struct msghdr *msg)
+{
+	int i;
+	printk(PFX "%p, %d\n", msg->msg_iov, msg->msg_iovlen);
+	for (i = 0; i < min_t(size_t, msg->msg_iovlen, ISCSI_CONN_IOV_MAX); i++)
+		printk(PFX "%d: %p,%d\n", i, msg->msg_iov[i].iov_base,
+						msg->msg_iov[i].iov_len);
+}
+#else
+#define iscsi_dump_iov(x) do {} while (0)
+#endif
+
+#ifdef D_DUMP_PDU
+static void iscsi_dump_char(int ch)
+{
+	static unsigned char text[16];
+	static int i = 0;
+
+	if (ch < 0) {
+		while ((i % 16) != 0) {
+			printk("   ");
+			text[i] = ' ';
+			i++;
+			if ((i % 16) == 0)
+				printk(" | %.16s |\n", text);
+			else if ((i % 4) == 0)
+				printk(" |");
+		}
+		i = 0;
+		return;
+	}
+
+	text[i] = (ch < 0x20 || (ch >= 0x80 && ch <= 0xa0)) ? ' ' : ch;
+	printk(" %02x", ch);
+	i++;
+	if ((i % 16) == 0) {
+		printk(" | %.16s |\n", text);
+		i = 0;
+	} else if ((i % 4) == 0)
+		printk(" |");
+}
+
+static inline void iscsi_dump_pdu(struct iscsi_pdu *pdu)
+{
+	unsigned char *buf;
+	int i;
+
+	buf = (void *)&pdu->bhs;
+	printk(PFX "BHS: (%p,%d)\n", buf, sizeof(pdu->bhs));
+	for (i = 0; i < sizeof(pdu->bhs); i++)
+		iscsi_dump_char(*buf++);
+	iscsi_dump_char(-1);
+
+	buf = (void *)pdu->ahs;
+	printk(PFX "AHS: (%p,%d)\n", buf, pdu->ahssize);
+	for (i = 0; i < pdu->ahssize; i++)
+		iscsi_dump_char(*buf++);
+	iscsi_dump_char(-1);
+
+	printk(PFX "Data: (%d)\n", pdu->datasize);
+}
+
+#else
+#define iscsi_dump_pdu(x) do {} while (0)
+#endif
+
+#define show_param(param)\
+{\
+	dprintk(D_SETUP, "%d %d %d %d %d %d %d %d %d %d %d %d %d %d %d\n",\
+		(param)->initial_r2t,\
+		(param)->immediate_data,\
+		(param)->max_connections,\
+		(param)->max_recv_data_length,\
+		(param)->max_xmit_data_length,\
+		(param)->max_burst_length,\
+		(param)->first_burst_length,\
+		(param)->default_wait_time,\
+		(param)->default_retain_time,\
+		(param)->max_outstanding_r2t,\
+		(param)->data_pdu_inorder,\
+		(param)->data_sequence_inorder,\
+		(param)->error_recovery_level,\
+		(param)->header_digest,\
+		(param)->data_digest);\
+}
+
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/iscsitarget/Kconfig
+++ linux-mvl-dove-2.6.32/ubuntu/iscsitarget/Kconfig
@@ -0,0 +1,3 @@
+config SCSI_ISCSITARGET
+	tristate "iSCSI Target Driver"
+	depends on SCSI
--- linux-mvl-dove-2.6.32.orig/ubuntu/iscsitarget/BOM
+++ linux-mvl-dove-2.6.32/ubuntu/iscsitarget/BOM
@@ -0,0 +1,2 @@
+Downloaded from:	svn://svn.berlios.de/iscsitarget/trunk
+Current Version:	1.4.19
--- linux-mvl-dove-2.6.32.orig/ubuntu/iscsitarget/session.c
+++ linux-mvl-dove-2.6.32/ubuntu/iscsitarget/session.c
@@ -0,0 +1,190 @@
+/*
+ * Copyright (C) 2002-2003 Ardis Technolgies <roman@ardistech.com>
+ *
+ * Released under the terms of the GNU GPL v2.0.
+ */
+
+#include "iscsi.h"
+#include "iscsi_dbg.h"
+
+struct iscsi_session *session_lookup(struct iscsi_target *target, u64 sid)
+{
+	struct iscsi_session *session;
+
+	list_for_each_entry(session, &target->session_list, list) {
+		if (session->sid == sid)
+			return session;
+	}
+	return NULL;
+}
+
+static struct iscsi_session *
+iet_session_alloc(struct iscsi_target *target, struct session_info *info)
+{
+	int i;
+	struct iscsi_session *session;
+	struct iet_volume *vol;
+
+	dprintk(D_SETUP, "%p %u %#Lx\n", target, target->tid,
+		(unsigned long long) info->sid);
+
+	session = kzalloc(sizeof(*session), GFP_KERNEL);
+	if (!session)
+		return NULL;
+
+	session->target = target;
+	session->sid = info->sid;
+	memcpy(&session->param, &target->sess_param, sizeof(session->param));
+	session->max_queued_cmnds = target->trgt_param.queued_cmnds;
+
+	session->exp_cmd_sn = info->exp_cmd_sn;
+	session->max_cmd_sn = info->max_cmd_sn;
+
+	session->initiator = kstrdup(info->initiator_name, GFP_KERNEL);
+	if (!session->initiator) {
+		kfree(session);
+		return NULL;
+	}
+
+	INIT_LIST_HEAD(&session->conn_list);
+	INIT_LIST_HEAD(&session->pending_list);
+
+	spin_lock_init(&session->cmnd_hash_lock);
+	for (i = 0; i < ARRAY_SIZE(session->cmnd_hash); i++)
+		INIT_LIST_HEAD(&session->cmnd_hash[i]);
+
+	spin_lock_init(&session->ua_hash_lock);
+	for (i = 0; i < ARRAY_SIZE(session->ua_hash); i++)
+		INIT_LIST_HEAD(&session->ua_hash[i]);
+
+	list_for_each_entry(vol, &target->volumes, list)
+		/* power-on, reset, or bus device reset occurred */
+		ua_establish_for_session(session, vol->lun, 0x29, 0x0);
+
+	session->next_ttt = 1;
+
+	spin_lock(&target->session_list_lock);
+	list_add(&session->list, &target->session_list);
+	spin_unlock(&target->session_list_lock);
+
+	return session;
+}
+
+static int session_free(struct iscsi_session *session)
+{
+	int i;
+	struct ua_entry *ua, *tmp;
+	struct list_head *l;
+	struct iscsi_target *target = session->target;
+
+	dprintk(D_SETUP, "%#Lx\n", (unsigned long long) session->sid);
+
+	spin_lock(&target->session_list_lock);
+
+	assert(list_empty(&session->conn_list));
+
+	for (i = 0; i < ARRAY_SIZE(session->cmnd_hash); i++) {
+		if (!list_empty(&session->cmnd_hash[i]))
+			BUG();
+	}
+
+	for (i = 0; i < ARRAY_SIZE(session->ua_hash); i++) {
+		l = &session->ua_hash[i];
+		list_for_each_entry_safe(ua, tmp, l, entry) {
+			list_del_init(&ua->entry);
+			ua_free(ua);
+		}
+	}
+
+	list_del(&session->list);
+
+	kfree(session->initiator);
+	kfree(session);
+
+	spin_unlock(&target->session_list_lock);
+
+	return 0;
+}
+
+int session_add(struct iscsi_target *target, struct session_info *info)
+{
+	struct iscsi_session *session;
+
+	session = session_lookup(target, info->sid);
+	if (session)
+		return -EEXIST;
+
+	session = iet_session_alloc(target, info);
+	if (!session)
+		return -ENOMEM;
+
+	return 0;
+}
+
+int session_del(struct iscsi_target *target, u64 sid)
+{
+	struct iscsi_session *session;
+
+	session = session_lookup(target, sid);
+	if (!session)
+		return -ENOENT;
+
+	if (!list_empty(&session->conn_list)) {
+		eprintk("%llu still have connections\n", (unsigned long long) session->sid);
+		return -EBUSY;
+	}
+
+	return session_free(session);
+}
+
+void session_del_all(struct iscsi_target *target)
+{
+	DECLARE_COMPLETION_ONSTACK(done);
+	struct iscsi_session *sess;
+
+	while (!list_empty(&target->session_list)) {
+		init_completion(&done);
+		target_lock(target, 0);
+		sess = list_entry(target->session_list.next, struct
+				  iscsi_session, list);
+		sess->done = &done;
+		conn_del_all(sess);
+		target_unlock(target);
+		wait_for_completion(&done);
+		target_lock(target, 0);
+		session_free(sess);
+		target_unlock(target);
+	}
+
+	if (target->done)
+		complete(target->done);
+}
+
+static void iet_session_info_show(struct seq_file *seq, struct iscsi_target *target)
+{
+	struct iscsi_session *session;
+
+	list_for_each_entry(session, &target->session_list, list) {
+		seq_printf(seq, "\tsid:%llu initiator:%s\n",
+			   (unsigned long long) session->sid, session->initiator);
+		conn_info_show(seq, session);
+	}
+}
+
+static int iet_session_seq_open(struct inode *inode, struct file *file)
+{
+	int res;
+	res = seq_open(file, &iet_seq_op);
+	if (!res)
+		((struct seq_file *)file->private_data)->private =
+			iet_session_info_show;
+	return res;
+}
+
+struct file_operations session_seq_fops = {
+	.owner		= THIS_MODULE,
+	.open		= iet_session_seq_open,
+	.read		= seq_read,
+	.llseek		= seq_lseek,
+	.release	= seq_release,
+};
--- linux-mvl-dove-2.6.32.orig/ubuntu/iscsitarget/digest.c
+++ linux-mvl-dove-2.6.32/ubuntu/iscsitarget/digest.c
@@ -0,0 +1,279 @@
+/*
+ * iSCSI digest handling.
+ * (C) 2004 - 2006 Xiranet Communications GmbH <arne.redlich@xiranet.com>
+ * This code is licensed under the GPL.
+ */
+
+#include <linux/types.h>
+
+#include "iscsi.h"
+#include "digest.h"
+#include "iscsi_dbg.h"
+
+void digest_alg_available(unsigned int *val)
+{
+	if (*val & DIGEST_CRC32C &&
+	    !crypto_has_alg("crc32c", 0, CRYPTO_ALG_ASYNC)) {
+		printk("CRC32C digest algorithm not available in kernel\n");
+		*val |= ~DIGEST_CRC32C;
+	}
+}
+
+/**
+ * initialize support for digest calculation.
+ *
+ * digest_init -
+ * @conn: ptr to connection to make use of digests
+ *
+ * @return: 0 on success, < 0 on error
+ */
+int digest_init(struct iscsi_conn *conn)
+{
+	int err = 0;
+
+	if (!(conn->hdigest_type & DIGEST_ALL))
+		conn->hdigest_type = DIGEST_NONE;
+
+	if (!(conn->ddigest_type & DIGEST_ALL))
+		conn->ddigest_type = DIGEST_NONE;
+
+	if (conn->hdigest_type & DIGEST_CRC32C ||
+	    conn->ddigest_type & DIGEST_CRC32C) {
+		conn->rx_hash.tfm = crypto_alloc_hash("crc32c", 0,
+						      CRYPTO_ALG_ASYNC);
+		conn->rx_hash.flags = 0;
+		if (IS_ERR(conn->rx_hash.tfm)) {
+			conn->rx_hash.tfm = NULL;
+			err = -ENOMEM;
+			goto out;
+		}
+
+		conn->tx_hash.tfm = crypto_alloc_hash("crc32c", 0,
+						      CRYPTO_ALG_ASYNC);
+		conn->tx_hash.flags = 0;
+		if (IS_ERR(conn->tx_hash.tfm)) {
+			conn->tx_hash.tfm = NULL;
+			err = -ENOMEM;
+			goto out;
+		}
+	}
+
+out:
+	if (err)
+		digest_cleanup(conn);
+
+	return err;
+}
+
+/**
+ * free resources used for digest calculation.
+ *
+ * digest_cleanup -
+ * @conn: ptr to connection that made use of digests
+ */
+void digest_cleanup(struct iscsi_conn *conn)
+{
+	if (conn->tx_hash.tfm)
+		crypto_free_hash(conn->tx_hash.tfm);
+	if (conn->rx_hash.tfm)
+		crypto_free_hash(conn->rx_hash.tfm);
+}
+
+/**
+ * debug handling of header digest errors:
+ * simulates a digest error after n PDUs / every n-th PDU of type
+ * HDIGEST_ERR_CORRUPT_PDU_TYPE.
+ */
+static inline void __dbg_simulate_header_digest_error(struct iscsi_cmnd *cmnd)
+{
+#define HDIGEST_ERR_AFTER_N_CMNDS 1000
+#define HDIGEST_ERR_ONLY_ONCE     1
+#define HDIGEST_ERR_CORRUPT_PDU_TYPE ISCSI_OP_SCSI_CMD
+#define HDIGEST_ERR_CORRUPT_PDU_WITH_DATA_ONLY 0
+
+	static int num_cmnds = 0;
+	static int num_errs = 0;
+
+	if (cmnd_opcode(cmnd) == HDIGEST_ERR_CORRUPT_PDU_TYPE) {
+		if (HDIGEST_ERR_CORRUPT_PDU_WITH_DATA_ONLY) {
+			if (cmnd->pdu.datasize)
+				num_cmnds++;
+		} else
+			num_cmnds++;
+	}
+
+	if ((num_cmnds == HDIGEST_ERR_AFTER_N_CMNDS)
+	    && (!(HDIGEST_ERR_ONLY_ONCE && num_errs))) {
+		printk("*** Faking header digest error ***\n");
+		printk("\tcmnd: 0x%x, itt 0x%x, sn 0x%x\n",
+		       cmnd_opcode(cmnd),
+		       be32_to_cpu(cmnd->pdu.bhs.itt),
+		       be32_to_cpu(cmnd->pdu.bhs.sn));
+		cmnd->hdigest = ~cmnd->hdigest;
+		/* make things even worse by manipulating header fields */
+		cmnd->pdu.datasize += 8;
+		num_errs++;
+		num_cmnds = 0;
+	}
+	return;
+}
+
+/**
+ * debug handling of data digest errors:
+ * simulates a digest error after n PDUs / every n-th PDU of type
+ * DDIGEST_ERR_CORRUPT_PDU_TYPE.
+ */
+static inline void __dbg_simulate_data_digest_error(struct iscsi_cmnd *cmnd)
+{
+#define DDIGEST_ERR_AFTER_N_CMNDS 50
+#define DDIGEST_ERR_ONLY_ONCE     1
+#define DDIGEST_ERR_CORRUPT_PDU_TYPE   ISCSI_OP_SCSI_DATA_OUT
+#define DDIGEST_ERR_CORRUPT_UNSOL_DATA_ONLY 0
+
+	static int num_cmnds = 0;
+	static int num_errs = 0;
+
+	if ((cmnd->pdu.datasize)
+	    && (cmnd_opcode(cmnd) == DDIGEST_ERR_CORRUPT_PDU_TYPE)) {
+		switch (cmnd_opcode(cmnd)) {
+		case ISCSI_OP_SCSI_DATA_OUT:
+			if ((DDIGEST_ERR_CORRUPT_UNSOL_DATA_ONLY)
+			    && (cmnd->pdu.bhs.ttt != ISCSI_RESERVED_TAG))
+				break;
+		default:
+			num_cmnds++;
+		}
+	}
+
+	if ((num_cmnds == DDIGEST_ERR_AFTER_N_CMNDS)
+	    && (!(DDIGEST_ERR_ONLY_ONCE && num_errs))
+	    && (cmnd->pdu.datasize)
+	    && (!cmnd->conn->read_overflow)) {
+		printk("*** Faking data digest error: ***");
+		printk("\tcmnd 0x%x, itt 0x%x, sn 0x%x\n",
+		       cmnd_opcode(cmnd),
+		       be32_to_cpu(cmnd->pdu.bhs.itt),
+		       be32_to_cpu(cmnd->pdu.bhs.sn));
+		cmnd->ddigest = ~cmnd->ddigest;
+		num_errs++;
+		num_cmnds = 0;
+	}
+}
+
+static void digest_header(struct hash_desc *hash, struct iscsi_pdu *pdu,
+			  u8 *crc)
+{
+	struct scatterlist sg[2];
+	unsigned int nbytes = sizeof(struct iscsi_hdr);
+
+	sg_init_table(sg, pdu->ahssize ? 2 : 1);
+
+	sg_set_buf(&sg[0], &pdu->bhs, nbytes);
+	if (pdu->ahssize) {
+		sg_set_buf(&sg[1], pdu->ahs, pdu->ahssize);
+		nbytes += pdu->ahssize;
+	}
+
+	crypto_hash_init(hash);
+	crypto_hash_update(hash, sg, nbytes);
+	crypto_hash_final(hash, crc);
+}
+
+int digest_rx_header(struct iscsi_cmnd *cmnd)
+{
+	u32 crc;
+
+	digest_header(&cmnd->conn->rx_hash, &cmnd->pdu, (u8 *) &crc);
+	if (crc != cmnd->hdigest)
+		return -EIO;
+
+	return 0;
+}
+
+void digest_tx_header(struct iscsi_cmnd *cmnd)
+{
+	digest_header(&cmnd->conn->tx_hash, &cmnd->pdu, (u8 *) &cmnd->hdigest);
+}
+
+static void digest_data(struct hash_desc *hash, struct iscsi_cmnd *cmnd,
+			struct tio *tio, u32 offset, u8 *crc)
+{
+	struct scatterlist *sg = cmnd->conn->hash_sg;
+	u32 size, length;
+	int i, idx, count;
+	unsigned int nbytes;
+
+	size = cmnd->pdu.datasize;
+	nbytes = size = (size + 3) & ~3;
+
+	offset += tio->offset;
+	idx = offset >> PAGE_CACHE_SHIFT;
+	offset &= ~PAGE_CACHE_MASK;
+	count = get_pgcnt(size, offset);
+	assert(idx + count <= tio->pg_cnt);
+
+	assert(count <= ISCSI_CONN_IOV_MAX);
+
+	sg_init_table(sg, ARRAY_SIZE(cmnd->conn->hash_sg));
+	crypto_hash_init(hash);
+
+	for (i = 0; size; i++) {
+		if (offset + size > PAGE_CACHE_SIZE)
+			length = PAGE_CACHE_SIZE - offset;
+		else
+			length = size;
+
+		sg_set_page(&sg[i], tio->pvec[idx + i], length, offset);
+		size -= length;
+		offset = 0;
+	}
+
+	sg_mark_end(&sg[i - 1]);
+
+	crypto_hash_update(hash, sg, nbytes);
+	crypto_hash_final(hash, crc);
+}
+
+int digest_rx_data(struct iscsi_cmnd *cmnd)
+{
+	struct tio *tio;
+	struct iscsi_cmnd *scsi_cmnd;
+	struct iscsi_data_out_hdr *req;
+	u32 offset, crc;
+
+	switch (cmnd_opcode(cmnd)) {
+	case ISCSI_OP_SCSI_REJECT:
+	case ISCSI_OP_PDU_REJECT:
+	case ISCSI_OP_DATA_REJECT:
+		return 0;
+	case ISCSI_OP_SCSI_DATA_OUT:
+		scsi_cmnd = cmnd->req;
+		req = (struct iscsi_data_out_hdr *) &cmnd->pdu.bhs;
+		tio = scsi_cmnd->tio;
+		offset = be32_to_cpu(req->buffer_offset);
+		break;
+	default:
+		tio = cmnd->tio;
+		offset = 0;
+	}
+
+	digest_data(&cmnd->conn->rx_hash, cmnd, tio, offset, (u8 *) &crc);
+
+	if (!cmnd->conn->read_overflow &&
+	    (cmnd_opcode(cmnd) != ISCSI_OP_PDU_REJECT)) {
+		if (crc != cmnd->ddigest)
+			return -EIO;
+	}
+
+	return 0;
+}
+
+void digest_tx_data(struct iscsi_cmnd *cmnd)
+{
+	struct tio *tio = cmnd->tio;
+	struct iscsi_data_out_hdr *req = (struct iscsi_data_out_hdr *)&cmnd->pdu.bhs;
+
+	assert(tio);
+	digest_data(&cmnd->conn->tx_hash, cmnd, tio,
+		    be32_to_cpu(req->buffer_offset), (u8 *) &cmnd->ddigest);
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/iscsitarget/block-io.c
+++ linux-mvl-dove-2.6.32/ubuntu/iscsitarget/block-io.c
@@ -0,0 +1,391 @@
+/*
+ * Target device block I/O.
+ *
+ * Based on file I/O driver from FUJITA Tomonori
+ * (C) 2004 - 2005 FUJITA Tomonori <tomof@acm.org>
+ * (C) 2006 Andre Brinkmann <brinkman at hni dot upb dot de>
+ * (C) 2007 Ross Walker <rswwalker at hotmail dot com>
+ * (C) 2007 Ming Zhang <blackmagic02881 at gmail dot com>
+ * This code is licenced under the GPL.
+ */
+
+#include <linux/types.h>
+#include <linux/blkdev.h>
+#include <linux/parser.h>
+#include <linux/buffer_head.h>
+
+#include "iscsi.h"
+#include "iscsi_dbg.h"
+#include "iotype.h"
+
+struct blockio_data {
+	char *path;
+	struct block_device *bdev;
+};
+
+struct tio_work {
+	atomic_t error;
+	atomic_t bios_remaining;
+	struct completion tio_complete;
+};
+
+static void blockio_bio_endio(struct bio *bio, int error)
+{
+	struct tio_work *tio_work = bio->bi_private;
+
+	error = test_bit(BIO_UPTODATE, &bio->bi_flags) ? error : -EIO;
+
+	if (error)
+		atomic_set(&tio_work->error, error);
+
+	/* If last bio signal completion */
+	if (atomic_dec_and_test(&tio_work->bios_remaining))
+		complete(&tio_work->tio_complete);
+
+	bio_put(bio);
+}
+
+/*
+ * Blockio_make_request(): The function translates an iscsi-request into
+ * a number of requests to the corresponding block device.
+ */
+static int
+blockio_make_request(struct iet_volume *volume, struct tio *tio, int rw)
+{
+	struct blockio_data *bio_data = volume->private;
+	struct request_queue *bdev_q = bdev_get_queue(bio_data->bdev);
+	struct tio_work *tio_work;
+	struct bio *tio_bio = NULL, *bio = NULL, *biotail = NULL;
+
+	u32 offset = tio->offset;
+	u32 size = tio->size;
+	u32 tio_index = 0;
+
+	int max_pages = 1;
+	int err = 0;
+
+	loff_t ppos = ((loff_t) tio->idx << PAGE_SHIFT) + offset;
+
+	/* Calculate max_pages for bio_alloc (memory saver) */
+	if (bdev_q)
+		max_pages = bio_get_nr_vecs(bio_data->bdev);
+
+	tio_work = kzalloc(sizeof (*tio_work), GFP_KERNEL);
+	if (!tio_work)
+		return -ENOMEM;
+
+	atomic_set(&tio_work->error, 0);
+	atomic_set(&tio_work->bios_remaining, 0);
+	init_completion(&tio_work->tio_complete);
+
+	/* Main processing loop, allocate and fill all bios */
+	while (tio_index < tio->pg_cnt) {
+		bio = bio_alloc(GFP_KERNEL, min(max_pages, BIO_MAX_PAGES));
+		if (!bio) {
+			err = -ENOMEM;
+			goto out;
+		}
+
+		bio->bi_sector = ppos >> volume->blk_shift;
+		bio->bi_bdev = bio_data->bdev;
+		bio->bi_end_io = blockio_bio_endio;
+		bio->bi_private = tio_work;
+
+		if (tio_bio)
+			biotail = biotail->bi_next = bio;
+		else
+			tio_bio = biotail = bio;
+
+		atomic_inc(&tio_work->bios_remaining);
+
+		/* Loop for filling bio */
+		while (tio_index < tio->pg_cnt) {
+			unsigned int bytes = PAGE_SIZE - offset;
+
+			if (bytes > size)
+				bytes = size;
+
+			if (!bio_add_page(bio, tio->pvec[tio_index], bytes, offset))
+				break;
+
+			size -= bytes;
+			ppos += bytes;
+
+			offset = 0;
+
+			tio_index++;
+		}
+	}
+
+	/* Walk the list, submitting bios 1 by 1 */
+	while (tio_bio) {
+		bio = tio_bio;
+		tio_bio = tio_bio->bi_next;
+		bio->bi_next = NULL;
+
+		submit_bio(rw, bio);
+	}
+
+	if (bdev_q && bdev_q->unplug_fn)
+		bdev_q->unplug_fn(bdev_q);
+
+	wait_for_completion(&tio_work->tio_complete);
+
+	err = atomic_read(&tio_work->error);
+
+	kfree(tio_work);
+
+	return err;
+out:
+	while (tio_bio) {
+		bio = tio_bio;
+		tio_bio = tio_bio->bi_next;
+
+		bio_put(bio);
+	}
+
+	kfree(tio_work);
+
+	return err;
+}
+
+static int
+blockio_open_path(struct iet_volume *volume, const char *path)
+{
+	struct blockio_data *bio_data = volume->private;
+	struct block_device *bdev;
+	int flags = FMODE_READ | (LUReadonly(volume) ? 0 : FMODE_WRITE);
+	int err = 0;
+
+	bio_data->path = kstrdup(path, GFP_KERNEL);
+	if (!bio_data->path)
+		return -ENOMEM;
+
+	bdev = open_bdev_exclusive(path, flags, THIS_MODULE);
+	if (IS_ERR(bdev)) {
+		err = PTR_ERR(bdev);
+		eprintk("Can't open device %s, error %d\n", path, err);
+		bio_data->bdev = NULL;
+	} else {
+		bio_data->bdev = bdev;
+		fsync_bdev(bio_data->bdev);
+	}
+
+	return err;
+}
+
+static int
+set_scsiid(struct iet_volume *volume, const char *id)
+{
+	size_t len;
+
+	if ((len = strlen(id)) > SCSI_ID_LEN - VENDOR_ID_LEN) {
+		eprintk("SCSI ID too long, %zd provided, %u max\n", len,
+			SCSI_ID_LEN - VENDOR_ID_LEN);
+		return -EINVAL;
+	}
+
+	memcpy(volume->scsi_id + VENDOR_ID_LEN, id, len);
+
+	return 0;
+}
+
+static void
+gen_scsiid(struct iet_volume *volume, struct inode *inode)
+{
+	int i;
+	u32 *p;
+
+	strlcpy(volume->scsi_id, VENDOR_ID, VENDOR_ID_LEN);
+
+	for (i = VENDOR_ID_LEN; i < SCSI_ID_LEN; i++)
+		if (volume->scsi_id[i])
+			return;
+
+	/* If a scsi id doesn't exist generate a 16 byte one:
+	 * Bytes   1-4: target type
+	 * Bytes   5-8: target id
+	 * Bytes  9-12: inode number
+	 * Bytes 13-16: device type
+	 */
+	p = (u32 *) (volume->scsi_id + VENDOR_ID_LEN);
+	*(p + 0) = volume->target->trgt_param.target_type;
+	*(p + 1) = volume->target->tid;
+	*(p + 2) = volume->lun;
+	*(p + 3) = (unsigned int) inode->i_sb->s_dev;
+}
+
+static int
+set_scsisn(struct iet_volume *volume, const char *sn)
+{
+	size_t len;
+
+	if ((len = strlen(sn)) > SCSI_SN_LEN) {
+		eprintk("SCSI SN too long, %zd provided, %u max\n", len,
+			SCSI_SN_LEN);
+		return -EINVAL;
+	}
+
+	memcpy(volume->scsi_sn, sn, len);
+
+	return 0;
+}
+
+/* Create an enumeration of our accepted actions */
+enum
+{
+	Opt_scsiid, Opt_scsisn, Opt_path, Opt_ignore, Opt_err,
+};
+
+/* Create a match table using our action enums and their matching options */
+static match_table_t tokens = {
+	{Opt_scsiid, "ScsiId=%s"},
+	{Opt_scsisn, "ScsiSN=%s"},
+	{Opt_path, "Path=%s"},
+	{Opt_ignore, "Type=%s"},
+	{Opt_ignore, "IOMode=%s"},
+	{Opt_err, NULL},
+};
+
+static int
+parse_blockio_params(struct iet_volume *volume, char *params)
+{
+	struct blockio_data *info = volume->private;
+	int err = 0;
+	char *p, *q;
+
+	/* Loop through parameters separated by commas, look up our
+	 * parameter in match table, return enumeration and arguments
+	 * select case based on the returned enum and run the action */
+	while ((p = strsep(&params, ",")) != NULL) {
+		substring_t args[MAX_OPT_ARGS];
+		int token;
+		if (!*p)
+			continue;
+		token = match_token(p, tokens, args);
+		switch (token) {
+		case Opt_scsiid:
+			if (!(q = match_strdup(&args[0]))) {
+				err = -ENOMEM;
+				goto out;
+			}
+			err = set_scsiid(volume, q);
+			kfree(q);
+			if (err < 0)
+				goto out;
+			break;
+		case Opt_scsisn:
+			if (!(q = match_strdup(&args[0]))) {
+				err = -ENOMEM;
+				goto out;
+			}
+			err = set_scsisn(volume, q);
+			kfree(q);
+			if (err < 0)
+				goto out;
+			break;
+		case Opt_path:
+			if (info->path) {
+				iprintk("Target %s, LUN %u: "
+					"duplicate \"Path\" param\n",
+					volume->target->name, volume->lun);
+				err = -EINVAL;
+				goto out;
+			}
+			if (!(q = match_strdup(&args[0]))) {
+				err = -ENOMEM;
+				goto out;
+			}
+			err = blockio_open_path(volume, q);
+			kfree(q);
+			if (err < 0)
+				goto out;
+			break;
+		case Opt_ignore:
+			break;
+		default:
+			iprintk("Target %s, LUN %u: unknown param %s\n",
+				volume->target->name, volume->lun, p);
+			return -EINVAL;
+		}
+	}
+
+	if (!info->path) {
+		iprintk("Target %s, LUN %u: missing \"Path\" param\n",
+			volume->target->name, volume->lun);
+		err = -EINVAL;
+	}
+  out:
+	return err;
+}
+
+static void
+blockio_detach(struct iet_volume *volume)
+{
+	struct blockio_data *bio_data = volume->private;
+	int flags = FMODE_READ | (LUReadonly(volume) ? 0 : FMODE_WRITE);
+
+	if (bio_data->bdev)
+		close_bdev_exclusive(bio_data->bdev, flags);
+	kfree(bio_data->path);
+
+	kfree(volume->private);
+}
+
+static int
+blockio_attach(struct iet_volume *volume, char *args)
+{
+	struct blockio_data *bio_data;
+	int err = 0;
+
+	if (volume->private) {
+		eprintk("Lun %u already attached on Target %s \n",
+			volume->lun, volume->target->name);
+		return -EBUSY;
+	}
+
+	bio_data = kzalloc(sizeof (*bio_data), GFP_KERNEL);
+	if (!bio_data)
+		return -ENOMEM;
+
+	volume->private = bio_data;
+
+	if ((err = parse_blockio_params(volume, args)) < 0) {
+		eprintk("Error attaching Lun %u to Target %s \n",
+			volume->lun, volume->target->name);
+		goto out;
+	}
+
+	/* Assign a vendor id, generate scsi id if none exists */
+	gen_scsiid(volume, bio_data->bdev->bd_inode);
+
+	/* Offer neither write nor read caching */
+	ClearLURCache(volume);
+	ClearLUWCache(volume);
+
+	volume->blk_shift = SECTOR_SIZE_BITS;
+	volume->blk_cnt = bio_data->bdev->bd_inode->i_size >> volume->blk_shift;
+
+  out:
+	if (err < 0)
+		blockio_detach(volume);
+
+	return err;
+}
+
+static void
+blockio_show(struct iet_volume *volume, struct seq_file *seq)
+{
+	struct blockio_data *bio_data = volume->private;
+
+	/* Used to display blockio volume info in /proc/net/iet/volumes */
+	seq_printf(seq, " path:%s\n", bio_data->path);
+}
+
+struct iotype blockio = {
+	.name = "blockio",
+	.attach = blockio_attach,
+	.make_request = blockio_make_request,
+	.detach = blockio_detach,
+	.show = blockio_show,
+};
--- linux-mvl-dove-2.6.32.orig/ubuntu/iscsitarget/iscsi.c
+++ linux-mvl-dove-2.6.32/ubuntu/iscsitarget/iscsi.c
@@ -0,0 +1,1924 @@
+/*
+ * Copyright (C) 2002-2003 Ardis Technolgies <roman@ardistech.com>
+ * Copyright (C) 2008 Arne Redlich <agr@powerkom-dd.de>
+ *
+ * Released under the terms of the GNU GPL v2.0.
+ */
+
+#include <linux/module.h>
+#include <linux/hash.h>
+#include <net/tcp.h>
+#include <scsi/scsi.h>
+
+#include "iscsi.h"
+#include "iscsi_dbg.h"
+#include "iotype.h"
+
+unsigned long debug_enable_flags;
+unsigned long worker_thread_pool_size;
+
+static struct kmem_cache *iscsi_cmnd_cache;
+static u8 dummy_data[PAGE_SIZE];
+
+static int ctr_major;
+static char ctr_name[] = "ietctl";
+extern struct file_operations ctr_fops;
+
+static u32 cmnd_write_size(struct iscsi_cmnd *cmnd)
+{
+	struct iscsi_scsi_cmd_hdr *hdr = cmnd_hdr(cmnd);
+
+	if (hdr->flags & ISCSI_CMD_WRITE)
+		return be32_to_cpu(hdr->data_length);
+	return 0;
+}
+
+static u32 cmnd_read_size(struct iscsi_cmnd *cmnd)
+{
+	struct iscsi_scsi_cmd_hdr *hdr = cmnd_hdr(cmnd);
+
+	if (hdr->flags & ISCSI_CMD_READ) {
+		struct iscsi_rlength_ahdr *ahdr =
+			(struct iscsi_rlength_ahdr *)cmnd->pdu.ahs;
+
+		if (!(hdr->flags & ISCSI_CMD_WRITE))
+			return be32_to_cpu(hdr->data_length);
+		if (ahdr && ahdr->ahstype == ISCSI_AHSTYPE_RLENGTH)
+			return be32_to_cpu(ahdr->read_length);
+	}
+	return 0;
+}
+
+static void iscsi_device_queue_cmnd(struct iscsi_cmnd *cmnd)
+{
+	set_cmnd_waitio(cmnd);
+	wthread_queue(cmnd);
+}
+
+static void iscsi_scsi_queuecmnd(struct iscsi_cmnd *cmnd)
+{
+	struct iscsi_queue *queue = &cmnd->lun->queue;
+
+	dprintk(D_GENERIC, "%p\n", cmnd);
+
+	if ((cmnd->pdu.bhs.flags & ISCSI_CMD_ATTR_MASK) != ISCSI_CMD_UNTAGGED &&
+	    (cmnd->pdu.bhs.flags & ISCSI_CMD_ATTR_MASK) != ISCSI_CMD_SIMPLE) {
+		cmnd->pdu.bhs.flags &= ~ISCSI_CMD_ATTR_MASK;
+		cmnd->pdu.bhs.flags |= ISCSI_CMD_UNTAGGED;
+	}
+
+	spin_lock(&queue->queue_lock);
+
+	set_cmnd_queued(cmnd);
+
+	switch (cmnd->pdu.bhs.flags & ISCSI_CMD_ATTR_MASK) {
+	case ISCSI_CMD_UNTAGGED:
+	case ISCSI_CMD_SIMPLE:
+		if (!list_empty(&queue->wait_list) || queue->ordered_cmnd)
+			goto pending;
+		queue->active_cnt++;
+		break;
+
+	default:
+		BUG();
+	}
+	spin_unlock(&queue->queue_lock);
+
+	iscsi_device_queue_cmnd(cmnd);
+	return;
+ pending:
+	assert(list_empty(&cmnd->list));
+
+	list_add_tail(&cmnd->list, &queue->wait_list);
+	spin_unlock(&queue->queue_lock);
+	return;
+}
+
+static void iscsi_scsi_dequeuecmnd(struct iscsi_cmnd *cmnd)
+{
+	struct iscsi_queue *queue;
+
+	if (!cmnd->lun)
+		return;
+	queue = &cmnd->lun->queue;
+	spin_lock(&queue->queue_lock);
+	switch (cmnd->pdu.bhs.flags & ISCSI_CMD_ATTR_MASK) {
+	case ISCSI_CMD_UNTAGGED:
+	case ISCSI_CMD_SIMPLE:
+		--queue->active_cnt;
+		break;
+	case ISCSI_CMD_ORDERED:
+	case ISCSI_CMD_HEAD_OF_QUEUE:
+	case ISCSI_CMD_ACA:
+		BUG();
+	default:
+		/* Should the iscsi_scsi_queuecmnd func reject this ? */
+		break;
+	}
+
+	while (!list_empty(&queue->wait_list)) {
+		cmnd = list_entry(queue->wait_list.next, struct iscsi_cmnd, list);
+		switch ((cmnd->pdu.bhs.flags & ISCSI_CMD_ATTR_MASK)) {
+		case ISCSI_CMD_UNTAGGED:
+		case ISCSI_CMD_SIMPLE:
+			list_del_init(&cmnd->list);
+			queue->active_cnt++;
+			iscsi_device_queue_cmnd(cmnd);
+			break;
+		case ISCSI_CMD_ORDERED:
+		case ISCSI_CMD_HEAD_OF_QUEUE:
+		case ISCSI_CMD_ACA:
+			BUG();
+		}
+	}
+
+	spin_unlock(&queue->queue_lock);
+
+	return;
+}
+
+/**
+ * create a new command.
+ *
+ * iscsi_cmnd_create -
+ * @conn: ptr to connection (for i/o)
+ *
+ * @return    ptr to command or NULL
+ */
+
+struct iscsi_cmnd *cmnd_alloc(struct iscsi_conn *conn, int req)
+{
+	struct iscsi_cmnd *cmnd;
+
+	/* TODO: async interface is necessary ? */
+	cmnd = kmem_cache_alloc(iscsi_cmnd_cache, GFP_KERNEL|__GFP_NOFAIL);
+
+	memset(cmnd, 0, sizeof(*cmnd));
+	INIT_LIST_HEAD(&cmnd->list);
+	INIT_LIST_HEAD(&cmnd->pdu_list);
+	INIT_LIST_HEAD(&cmnd->conn_list);
+	INIT_LIST_HEAD(&cmnd->hash_list);
+	cmnd->conn = conn;
+	spin_lock(&conn->list_lock);
+	atomic_inc(&conn->nr_cmnds);
+	if (req)
+		list_add_tail(&cmnd->conn_list, &conn->pdu_list);
+	spin_unlock(&conn->list_lock);
+	cmnd->tio = NULL;
+
+	dprintk(D_GENERIC, "%p:%p\n", conn, cmnd);
+
+	return cmnd;
+}
+
+/**
+ * create a new command used as response.
+ *
+ * iscsi_cmnd_create_rsp_cmnd -
+ * @cmnd: ptr to request command
+ *
+ * @return    ptr to response command or NULL
+ */
+
+static struct iscsi_cmnd *iscsi_cmnd_create_rsp_cmnd(struct iscsi_cmnd *cmnd, int final)
+{
+	struct iscsi_cmnd *rsp = cmnd_alloc(cmnd->conn, 0);
+
+	if (final)
+		set_cmnd_final(rsp);
+	list_add_tail(&rsp->pdu_list, &cmnd->pdu_list);
+	rsp->req = cmnd;
+	return rsp;
+}
+
+static struct iscsi_cmnd *get_rsp_cmnd(struct iscsi_cmnd *req)
+{
+	return list_entry(req->pdu_list.prev, struct iscsi_cmnd, pdu_list);
+}
+
+static void iscsi_cmnds_init_write(struct list_head *send)
+{
+	struct iscsi_cmnd *cmnd = list_entry(send->next, struct iscsi_cmnd, list);
+	struct iscsi_conn *conn = cmnd->conn;
+	struct list_head *pos, *next;
+
+	spin_lock(&conn->list_lock);
+
+	list_for_each_safe(pos, next, send) {
+		cmnd = list_entry(pos, struct iscsi_cmnd, list);
+
+		dprintk(D_GENERIC, "%p:%x\n", cmnd, cmnd_opcode(cmnd));
+
+		list_del_init(&cmnd->list);
+		assert(conn == cmnd->conn);
+		list_add_tail(&cmnd->list, &conn->write_list);
+	}
+
+	spin_unlock(&conn->list_lock);
+
+	nthread_wakeup(conn->session->target);
+}
+
+static void iscsi_cmnd_init_write(struct iscsi_cmnd *cmnd)
+{
+	LIST_HEAD(head);
+
+	if (!list_empty(&cmnd->list)) {
+		eprintk("%x %x %x %x %lx %u %u %u %u %u %u %u %d %d\n",
+			cmnd_itt(cmnd), cmnd_ttt(cmnd), cmnd_opcode(cmnd),
+			cmnd_scsicode(cmnd), cmnd->flags, cmnd->r2t_sn,
+			cmnd->r2t_length, cmnd->is_unsolicited_data,
+			cmnd->target_task_tag, cmnd->outstanding_r2t,
+			cmnd->hdigest, cmnd->ddigest,
+			list_empty(&cmnd->pdu_list), list_empty(&cmnd->hash_list));
+
+		assert(list_empty(&cmnd->list));
+	}
+	list_add(&cmnd->list, &head);
+	iscsi_cmnds_init_write(&head);
+}
+
+static void do_send_data_rsp(struct iscsi_cmnd *cmnd)
+{
+	struct iscsi_conn *conn = cmnd->conn;
+	struct iscsi_cmnd *data_cmnd;
+	struct tio *tio = cmnd->tio;
+	struct iscsi_scsi_cmd_hdr *req = cmnd_hdr(cmnd);
+	struct iscsi_data_in_hdr *rsp;
+	u32 pdusize, expsize, scsisize, size, offset, sn;
+	LIST_HEAD(send);
+
+	dprintk(D_GENERIC, "%p\n", cmnd);
+	pdusize = conn->session->param.max_xmit_data_length;
+	expsize = cmnd_read_size(cmnd);
+	size = min(expsize, tio->size);
+	offset = 0;
+	sn = 0;
+
+	while (1) {
+		data_cmnd = iscsi_cmnd_create_rsp_cmnd(cmnd, size <= pdusize);
+		tio_get(tio);
+		data_cmnd->tio = tio;
+		rsp = (struct iscsi_data_in_hdr *)&data_cmnd->pdu.bhs;
+
+		rsp->opcode = ISCSI_OP_SCSI_DATA_IN;
+		rsp->itt = req->itt;
+		rsp->ttt = cpu_to_be32(ISCSI_RESERVED_TAG);
+		rsp->buffer_offset = offset;
+		rsp->data_sn = cpu_to_be32(sn);
+
+		if (size <= pdusize) {
+			data_cmnd->pdu.datasize = size;
+			rsp->flags = ISCSI_FLG_FINAL | ISCSI_FLG_STATUS;
+
+			scsisize = tio->size;
+			if (scsisize < expsize) {
+				rsp->flags |= ISCSI_FLG_RESIDUAL_UNDERFLOW;
+				size = expsize - scsisize;
+			} else if (scsisize > expsize) {
+				rsp->flags |= ISCSI_FLG_RESIDUAL_OVERFLOW;
+				size = scsisize - expsize;
+			} else
+				size = 0;
+			rsp->residual_count = cpu_to_be32(size);
+			list_add_tail(&data_cmnd->list, &send);
+
+			break;
+		}
+
+		data_cmnd->pdu.datasize = pdusize;
+
+		size -= pdusize;
+		offset += pdusize;
+		sn++;
+
+		list_add_tail(&data_cmnd->list, &send);
+	}
+
+	iscsi_cmnds_init_write(&send);
+}
+
+static struct iscsi_cmnd *create_scsi_rsp(struct iscsi_cmnd *req)
+{
+	struct iscsi_cmnd *rsp;
+	struct iscsi_scsi_cmd_hdr *req_hdr = cmnd_hdr(req);
+	struct iscsi_scsi_rsp_hdr *rsp_hdr;
+	struct iscsi_sense_data *sense;
+
+	rsp = iscsi_cmnd_create_rsp_cmnd(req, 1);
+
+	rsp_hdr = (struct iscsi_scsi_rsp_hdr *)&rsp->pdu.bhs;
+	rsp_hdr->opcode = ISCSI_OP_SCSI_RSP;
+	rsp_hdr->flags = ISCSI_FLG_FINAL;
+	rsp_hdr->response = ISCSI_RESPONSE_COMMAND_COMPLETED;
+	rsp_hdr->cmd_status = req->status;
+	rsp_hdr->itt = req_hdr->itt;
+
+	if (req->status == SAM_STAT_CHECK_CONDITION) {
+		assert(!rsp->tio);
+		rsp->tio = tio_alloc(1);
+		sense = (struct iscsi_sense_data *)
+			page_address(rsp->tio->pvec[0]);
+
+		assert(sense);
+		clear_page(sense);
+		sense->length = cpu_to_be16(IET_SENSE_BUF_SIZE);
+
+		memcpy(sense->data, req->sense_buf, IET_SENSE_BUF_SIZE);
+		rsp->pdu.datasize = sizeof(struct iscsi_sense_data) +
+			IET_SENSE_BUF_SIZE;
+
+		rsp->tio->size = (rsp->pdu.datasize + 3) & -4;
+		rsp->tio->offset = 0;
+	}
+
+	return rsp;
+}
+
+void iscsi_cmnd_set_sense(struct iscsi_cmnd *cmnd, u8 sense_key, u8 asc,
+			  u8 ascq)
+{
+	cmnd->status = SAM_STAT_CHECK_CONDITION;
+
+	cmnd->sense_buf[0] = 0xf0;
+	cmnd->sense_buf[2] = sense_key;
+	cmnd->sense_buf[7] = 6;	// Additional sense length
+	cmnd->sense_buf[12] = asc;
+	cmnd->sense_buf[13] = ascq;
+}
+
+static struct iscsi_cmnd *create_sense_rsp(struct iscsi_cmnd *req,
+					   u8 sense_key, u8 asc, u8 ascq)
+{
+	iscsi_cmnd_set_sense(req, sense_key, asc, ascq);
+	return create_scsi_rsp(req);
+}
+
+void send_scsi_rsp(struct iscsi_cmnd *req, void (*func)(struct iscsi_cmnd *))
+{
+	struct iscsi_cmnd *rsp;
+	struct iscsi_scsi_rsp_hdr *rsp_hdr;
+	u32 size;
+
+	func(req);
+	rsp = create_scsi_rsp(req);
+
+	switch (req->status) {
+	case SAM_STAT_GOOD:
+	case SAM_STAT_RESERVATION_CONFLICT:
+		rsp_hdr = (struct iscsi_scsi_rsp_hdr *) &rsp->pdu.bhs;
+		if ((size = cmnd_read_size(req)) != 0) {
+			rsp_hdr->flags |= ISCSI_FLG_RESIDUAL_UNDERFLOW;
+			rsp_hdr->residual_count = cpu_to_be32(size);
+		}
+		break;
+	default:
+		break;
+	}
+
+	iscsi_cmnd_init_write(rsp);
+}
+
+void send_data_rsp(struct iscsi_cmnd *req, void (*func)(struct iscsi_cmnd *))
+{
+	struct iscsi_cmnd *rsp;
+
+	func(req);
+
+	if (req->status == SAM_STAT_GOOD)
+		do_send_data_rsp(req);
+	else {
+		rsp = create_scsi_rsp(req);
+		iscsi_cmnd_init_write(rsp);
+	}
+}
+
+/**
+ * Free a command.
+ * Also frees the additional header.
+ *
+ * iscsi_cmnd_remove -
+ * @cmnd: ptr to command
+ */
+
+static void iscsi_cmnd_remove(struct iscsi_cmnd *cmnd)
+{
+	struct iscsi_conn *conn;
+
+	if (!cmnd)
+		return;
+
+	if (cmnd_timer_active(cmnd)) {
+		clear_cmnd_timer_active(cmnd);
+		del_timer_sync(&cmnd->timer);
+	}
+
+	dprintk(D_GENERIC, "%p\n", cmnd);
+	conn = cmnd->conn;
+	kfree(cmnd->pdu.ahs);
+
+	if (!list_empty(&cmnd->list)) {
+		struct iscsi_scsi_cmd_hdr *req = cmnd_hdr(cmnd);
+
+		eprintk("cmnd %p still on some list?, %x, %x, %x, %x, %x, %x, %x %lx\n",
+			cmnd, req->opcode, req->scb[0], req->flags, req->itt,
+			be32_to_cpu(req->data_length),
+			req->cmd_sn, be32_to_cpu(cmnd->pdu.datasize),
+			conn->state);
+
+		if (cmnd->req) {
+			struct iscsi_scsi_cmd_hdr *req = cmnd_hdr(cmnd->req);
+			eprintk("%p %x %u\n", req, req->opcode, req->scb[0]);
+		}
+		dump_stack();
+		BUG();
+	}
+	list_del(&cmnd->list);
+	spin_lock(&conn->list_lock);
+	atomic_dec(&conn->nr_cmnds);
+	list_del(&cmnd->conn_list);
+	spin_unlock(&conn->list_lock);
+
+	if (cmnd->tio)
+		tio_put(cmnd->tio);
+
+	kmem_cache_free(iscsi_cmnd_cache, cmnd);
+}
+
+static void cmnd_skip_pdu(struct iscsi_cmnd *cmnd)
+{
+	struct iscsi_conn *conn = cmnd->conn;
+	struct tio *tio = cmnd->tio;
+	char *addr;
+	u32 size;
+	int i;
+
+	eprintk("%x %x %x %u\n", cmnd_itt(cmnd), cmnd_opcode(cmnd),
+		cmnd_hdr(cmnd)->scb[0], cmnd->pdu.datasize);
+
+	if (!(size = cmnd->pdu.datasize))
+		return;
+
+	if (tio)
+		assert(tio->pg_cnt > 0);
+	else
+		tio = cmnd->tio = tio_alloc(1);
+
+	addr = page_address(tio->pvec[0]);
+	assert(addr);
+	size = (size + 3) & -4;
+	conn->read_size = size;
+	for (i = 0; size > PAGE_CACHE_SIZE; i++, size -= PAGE_CACHE_SIZE) {
+		assert(i < ISCSI_CONN_IOV_MAX);
+		conn->read_iov[i].iov_base = addr;
+		conn->read_iov[i].iov_len = PAGE_CACHE_SIZE;
+	}
+	conn->read_iov[i].iov_base = addr;
+	conn->read_iov[i].iov_len = size;
+	conn->read_msg.msg_iov = conn->read_iov;
+	conn->read_msg.msg_iovlen = ++i;
+}
+
+static void iscsi_cmnd_reject(struct iscsi_cmnd *req, int reason)
+{
+	struct iscsi_cmnd *rsp;
+	struct iscsi_reject_hdr *rsp_hdr;
+	struct tio *tio;
+	char *addr;
+
+	rsp = iscsi_cmnd_create_rsp_cmnd(req, 1);
+	rsp_hdr = (struct iscsi_reject_hdr *)&rsp->pdu.bhs;
+
+	rsp_hdr->opcode = ISCSI_OP_REJECT;
+	rsp_hdr->ffffffff = ISCSI_RESERVED_TAG;
+	rsp_hdr->reason = reason;
+
+	rsp->tio = tio = tio_alloc(1);
+	addr = page_address(tio->pvec[0]);
+	clear_page(addr);
+	memcpy(addr, &req->pdu.bhs, sizeof(struct iscsi_hdr));
+	tio->size = rsp->pdu.datasize = sizeof(struct iscsi_hdr);
+	cmnd_skip_pdu(req);
+
+	req->pdu.bhs.opcode = ISCSI_OP_PDU_REJECT;
+}
+
+static void cmnd_set_sn(struct iscsi_cmnd *cmnd, int set_stat_sn)
+{
+	struct iscsi_conn *conn = cmnd->conn;
+	struct iscsi_session *sess = conn->session;
+
+	if (set_stat_sn)
+		cmnd->pdu.bhs.sn = cpu_to_be32(conn->stat_sn++);
+	cmnd->pdu.bhs.exp_sn = cpu_to_be32(sess->exp_cmd_sn);
+	cmnd->pdu.bhs.max_sn = cpu_to_be32(sess->exp_cmd_sn + sess->max_queued_cmnds);
+}
+
+static void update_stat_sn(struct iscsi_cmnd *cmnd)
+{
+	struct iscsi_conn *conn = cmnd->conn;
+	u32 exp_stat_sn;
+
+	cmnd->pdu.bhs.exp_sn = exp_stat_sn = be32_to_cpu(cmnd->pdu.bhs.exp_sn);
+	dprintk(D_GENERIC, "%x,%x\n", cmnd_opcode(cmnd), exp_stat_sn);
+	if ((int)(exp_stat_sn - conn->exp_stat_sn) > 0 &&
+	    (int)(exp_stat_sn - conn->stat_sn) <= 0) {
+		// free pdu resources
+		cmnd->conn->exp_stat_sn = exp_stat_sn;
+	}
+}
+
+static int check_cmd_sn(struct iscsi_cmnd *cmnd)
+{
+	struct iscsi_session *session = cmnd->conn->session;
+	u32 cmd_sn;
+
+	cmnd->pdu.bhs.sn = cmd_sn = be32_to_cpu(cmnd->pdu.bhs.sn);
+	dprintk(D_GENERIC, "%d(%d)\n", cmd_sn, session->exp_cmd_sn);
+	if ((s32)(cmd_sn - session->exp_cmd_sn) >= 0)
+		return 0;
+	eprintk("sequence error (%x,%x)\n", cmd_sn, session->exp_cmd_sn);
+	return -ISCSI_REASON_PROTOCOL_ERROR;
+}
+
+static struct iscsi_cmnd *__cmnd_find_hash(struct iscsi_session *session, u32 itt, u32 ttt)
+{
+	struct list_head *head;
+	struct iscsi_cmnd *cmnd;
+
+	head = &session->cmnd_hash[cmnd_hashfn(itt)];
+
+	list_for_each_entry(cmnd, head, hash_list) {
+		if (cmnd->pdu.bhs.itt == itt) {
+			if ((ttt != ISCSI_RESERVED_TAG) && (ttt != cmnd->target_task_tag))
+				continue;
+			return cmnd;
+		}
+	}
+
+	return NULL;
+}
+
+static struct iscsi_cmnd *cmnd_find_hash(struct iscsi_session *session, u32 itt, u32 ttt)
+{
+	struct iscsi_cmnd *cmnd;
+
+	spin_lock(&session->cmnd_hash_lock);
+
+	cmnd = __cmnd_find_hash(session, itt, ttt);
+
+	spin_unlock(&session->cmnd_hash_lock);
+
+	return cmnd;
+}
+
+static int cmnd_insert_hash_ttt(struct iscsi_cmnd *cmnd, u32 ttt)
+{
+	struct iscsi_session *session = cmnd->conn->session;
+	struct iscsi_cmnd *tmp;
+	struct list_head *head;
+	int err = 0;
+	u32 itt = cmnd->pdu.bhs.itt;
+
+	head = &session->cmnd_hash[cmnd_hashfn(itt)];
+
+	spin_lock(&session->cmnd_hash_lock);
+
+	tmp = __cmnd_find_hash(session, itt, ttt);
+	if (!tmp) {
+		list_add_tail(&cmnd->hash_list, head);
+		set_cmnd_hashed(cmnd);
+	} else
+		err = -ISCSI_REASON_TASK_IN_PROGRESS;
+
+	spin_unlock(&session->cmnd_hash_lock);
+
+	return err;
+}
+
+static int cmnd_insert_hash(struct iscsi_cmnd *cmnd)
+{
+	int err;
+
+	dprintk(D_GENERIC, "%p:%x\n", cmnd, cmnd->pdu.bhs.itt);
+
+	if (cmnd->pdu.bhs.itt == ISCSI_RESERVED_TAG)
+		return -ISCSI_REASON_PROTOCOL_ERROR;
+
+	err = cmnd_insert_hash_ttt(cmnd, ISCSI_RESERVED_TAG);
+	if (!err) {
+		update_stat_sn(cmnd);
+		err = check_cmd_sn(cmnd);
+	}
+
+	return err;
+}
+
+static void __cmnd_remove_hash(struct iscsi_cmnd *cmnd)
+{
+	list_del(&cmnd->hash_list);
+}
+
+static void cmnd_remove_hash(struct iscsi_cmnd *cmnd)
+{
+	struct iscsi_session *session = cmnd->conn->session;
+	struct iscsi_cmnd *tmp;
+
+	spin_lock(&session->cmnd_hash_lock);
+
+	tmp = __cmnd_find_hash(session, cmnd->pdu.bhs.itt,
+			       cmnd->target_task_tag);
+	if (tmp && tmp == cmnd)
+		__cmnd_remove_hash(tmp);
+	else
+		eprintk("%p:%x not found\n", cmnd, cmnd_itt(cmnd));
+
+	spin_unlock(&session->cmnd_hash_lock);
+}
+
+static void cmnd_skip_data(struct iscsi_cmnd *req)
+{
+	struct iscsi_cmnd *rsp;
+	struct iscsi_scsi_rsp_hdr *rsp_hdr;
+	u32 size;
+
+	rsp = get_rsp_cmnd(req);
+	rsp_hdr = (struct iscsi_scsi_rsp_hdr *)&rsp->pdu.bhs;
+	if (cmnd_opcode(rsp) != ISCSI_OP_SCSI_RSP) {
+		eprintk("unexpected response command %u\n", cmnd_opcode(rsp));
+		return;
+	}
+
+	size = cmnd_write_size(req);
+	if (size) {
+		rsp_hdr->flags |= ISCSI_FLG_RESIDUAL_UNDERFLOW;
+		rsp_hdr->residual_count = cpu_to_be32(size);
+	}
+	size = cmnd_read_size(req);
+	if (size) {
+		if (cmnd_hdr(req)->flags & ISCSI_CMD_WRITE) {
+			rsp_hdr->flags |= ISCSI_FLG_BIRESIDUAL_UNDERFLOW;
+			rsp_hdr->bi_residual_count = cpu_to_be32(size);
+		} else {
+			rsp_hdr->flags |= ISCSI_FLG_RESIDUAL_UNDERFLOW;
+			rsp_hdr->residual_count = cpu_to_be32(size);
+		}
+	}
+	req->pdu.bhs.opcode =
+		(req->pdu.bhs.opcode & ~ISCSI_OPCODE_MASK) | ISCSI_OP_SCSI_REJECT;
+
+	cmnd_skip_pdu(req);
+}
+
+static int cmnd_recv_pdu(struct iscsi_conn *conn, struct tio *tio, u32 offset, u32 size)
+{
+	int idx, i;
+	char *addr;
+
+	dprintk(D_GENERIC, "%p %u,%u\n", tio, offset, size);
+	offset += tio->offset;
+
+	if (!(offset < tio->offset + tio->size) ||
+	    !(offset + size <= tio->offset + tio->size)) {
+		eprintk("%u %u %u %u", offset, size, tio->offset, tio->size);
+		return -EIO;
+	}
+	assert(offset < tio->offset + tio->size);
+	assert(offset + size <= tio->offset + tio->size);
+
+	idx = offset >> PAGE_CACHE_SHIFT;
+	offset &= ~PAGE_CACHE_MASK;
+
+	conn->read_msg.msg_iov = conn->read_iov;
+	conn->read_size = size = (size + 3) & -4;
+	conn->read_overflow = 0;
+
+	i = 0;
+	while (1) {
+		assert(tio->pvec[idx]);
+		addr = page_address(tio->pvec[idx]);
+		assert(addr);
+		conn->read_iov[i].iov_base =  addr + offset;
+		if (offset + size <= PAGE_CACHE_SIZE) {
+			conn->read_iov[i].iov_len = size;
+			conn->read_msg.msg_iovlen = ++i;
+			break;
+		}
+		conn->read_iov[i].iov_len = PAGE_CACHE_SIZE - offset;
+		size -= conn->read_iov[i].iov_len;
+		offset = 0;
+		if (++i >= ISCSI_CONN_IOV_MAX) {
+			conn->read_msg.msg_iovlen = i;
+			conn->read_overflow = size;
+			conn->read_size -= size;
+			break;
+		}
+
+		idx++;
+	}
+
+	return 0;
+}
+
+static void set_offset_and_length(struct iet_volume *lu, u8 *cmd, loff_t *off, u32 *len)
+{
+	assert(lu);
+
+	switch (cmd[0]) {
+	case READ_6:
+	case WRITE_6:
+		*off = ((cmd[1] & 0x1f) << 16) + (cmd[2] << 8) + cmd[3];
+		*len = cmd[4];
+		if (!*len)
+			*len = 256;
+		break;
+	case READ_10:
+	case WRITE_10:
+	case WRITE_VERIFY:
+		*off = (u32)cmd[2] << 24 | (u32)cmd[3] << 16 |
+			(u32)cmd[4] << 8 | (u32)cmd[5];
+		*len = (cmd[7] << 8) + cmd[8];
+		break;
+	case READ_16:
+	case WRITE_16:
+		*off = (u64)cmd[2] << 56 | (u64)cmd[3] << 48 |
+			(u64)cmd[4] << 40 | (u64)cmd[5] << 32 |
+			(u64)cmd[6] << 24 | (u64)cmd[7] << 16 |
+			(u64)cmd[8] << 8 | (u64)cmd[9];
+		*len = (u32)cmd[10] << 24 | (u32)cmd[11] << 16 |
+			(u32)cmd[12] << 8 | (u32)cmd[13];
+		break;
+	default:
+		BUG();
+	}
+
+	*off <<= lu->blk_shift;
+	*len <<= lu->blk_shift;
+}
+
+static u32 translate_lun(u16 * data)
+{
+	u8 *p = (u8 *) data;
+	u32 lun = ~0U;
+
+	switch (*p >> 6) {
+	case 0:
+		lun = p[1];
+		break;
+	case 1:
+		lun = (0x3f & p[0]) << 8 | p[1];
+		break;
+	case 2:
+	case 3:
+	default:
+		eprintk("%u %u %u %u\n", data[0], data[1], data[2], data[3]);
+		break;
+	}
+
+	return lun;
+}
+
+static void send_r2t(struct iscsi_cmnd *req)
+{
+	struct iscsi_cmnd *rsp;
+	struct iscsi_r2t_hdr *rsp_hdr;
+	u32 length, offset, burst;
+	LIST_HEAD(send);
+
+	length = req->r2t_length;
+	burst = req->conn->session->param.max_burst_length;
+	offset = be32_to_cpu(cmnd_hdr(req)->data_length) - length;
+
+	do {
+		rsp = iscsi_cmnd_create_rsp_cmnd(req, 0);
+		rsp->pdu.bhs.ttt = req->target_task_tag;
+
+		rsp_hdr = (struct iscsi_r2t_hdr *)&rsp->pdu.bhs;
+		rsp_hdr->opcode = ISCSI_OP_R2T;
+		rsp_hdr->flags = ISCSI_FLG_FINAL;
+		memcpy(rsp_hdr->lun, cmnd_hdr(req)->lun, 8);
+		rsp_hdr->itt = cmnd_hdr(req)->itt;
+		rsp_hdr->r2t_sn = cpu_to_be32(req->r2t_sn++);
+		rsp_hdr->buffer_offset = cpu_to_be32(offset);
+		if (length > burst) {
+			rsp_hdr->data_length = cpu_to_be32(burst);
+			length -= burst;
+			offset += burst;
+		} else {
+			rsp_hdr->data_length = cpu_to_be32(length);
+			length = 0;
+		}
+
+		dprintk(D_WRITE, "%x %u %u %u %u\n", cmnd_itt(req),
+			be32_to_cpu(rsp_hdr->data_length),
+			be32_to_cpu(rsp_hdr->buffer_offset),
+			be32_to_cpu(rsp_hdr->r2t_sn), req->outstanding_r2t);
+
+		list_add_tail(&rsp->list, &send);
+
+		if (++req->outstanding_r2t >= req->conn->session->param.max_outstanding_r2t)
+			break;
+
+	} while (length);
+
+	iscsi_cmnds_init_write(&send);
+}
+
+static void scsi_cmnd_exec(struct iscsi_cmnd *cmnd)
+{
+	if (cmnd->r2t_length) {
+		if (!cmnd->is_unsolicited_data)
+			send_r2t(cmnd);
+	} else {
+		if (cmnd->lun) {
+			iscsi_scsi_queuecmnd(cmnd);
+		} else {
+			iscsi_device_queue_cmnd(cmnd);
+		}
+	}
+}
+
+static int nop_out_start(struct iscsi_conn *conn, struct iscsi_cmnd *cmnd)
+{
+	u32 size, tmp;
+	int i, err = 0;
+
+	if (cmnd_ttt(cmnd) != cpu_to_be32(ISCSI_RESERVED_TAG)) {
+		cmnd->req = cmnd_find_hash(conn->session, cmnd->pdu.bhs.itt,
+					   cmnd->pdu.bhs.ttt);
+		if (!cmnd->req) {
+			/*
+			 * We didn't request this NOP-Out (by sending a
+			 * NOP-In, see 10.18.2 of the RFC) or our fake NOP-Out
+			 * timed out.
+			 */
+			eprintk("initiator bug %x\n", cmnd_itt(cmnd));
+			err = -ISCSI_REASON_PROTOCOL_ERROR;
+			goto out;
+		}
+
+		del_timer_sync(&cmnd->req->timer);
+		clear_cmnd_timer_active(cmnd->req);
+		dprintk(D_GENERIC, "NOP-Out: %p, ttt %x, timer %p\n",
+			cmnd->req, cmnd_ttt(cmnd->req), &cmnd->req->timer);
+	}
+
+	if (cmnd_itt(cmnd) == cpu_to_be32(ISCSI_RESERVED_TAG)) {
+		if (!(cmnd->pdu.bhs.opcode & ISCSI_OP_IMMEDIATE))
+			eprintk("%s\n", "initiator bug!");
+		update_stat_sn(cmnd);
+		err = check_cmd_sn(cmnd);
+		if (err)
+			goto out;
+	} else if ((err = cmnd_insert_hash(cmnd)) < 0) {
+		eprintk("ignore this request %x\n", cmnd_itt(cmnd));
+		goto out;
+	}
+
+	if ((size = cmnd->pdu.datasize)) {
+		size = (size + 3) & -4;
+		conn->read_msg.msg_iov = conn->read_iov;
+		if (cmnd->pdu.bhs.itt != cpu_to_be32(ISCSI_RESERVED_TAG)) {
+			struct tio *tio;
+			int pg_cnt = get_pgcnt(size, 0);
+
+			assert(pg_cnt < ISCSI_CONN_IOV_MAX);
+			cmnd->tio = tio = tio_alloc(pg_cnt);
+			tio_set(tio, size, 0);
+
+			for (i = 0; i < pg_cnt; i++) {
+				conn->read_iov[i].iov_base
+					= page_address(tio->pvec[i]);
+				tmp = min_t(u32, size, PAGE_CACHE_SIZE);
+				conn->read_iov[i].iov_len = tmp;
+				conn->read_size += tmp;
+				size -= tmp;
+			}
+		} else {
+			for (i = 0; i < ISCSI_CONN_IOV_MAX; i++) {
+				conn->read_iov[i].iov_base = dummy_data;
+				tmp = min_t(u32, size, sizeof(dummy_data));
+				conn->read_iov[i].iov_len = tmp;
+				conn->read_size += tmp;
+				size -= tmp;
+			}
+		}
+		assert(!size);
+		conn->read_overflow = size;
+		conn->read_msg.msg_iovlen = i;
+	}
+
+out:
+	return err;
+}
+
+static u32 get_next_ttt(struct iscsi_session *session)
+{
+	u32 ttt;
+
+	if (session->next_ttt == ISCSI_RESERVED_TAG)
+		session->next_ttt++;
+	ttt = session->next_ttt++;
+
+	return cpu_to_be32(ttt);
+}
+
+static void scsi_cmnd_start(struct iscsi_conn *conn, struct iscsi_cmnd *req)
+{
+	struct iscsi_scsi_cmd_hdr *req_hdr = cmnd_hdr(req);
+
+	dprintk(D_GENERIC, "scsi command: %02x\n", req_hdr->scb[0]);
+
+	req->lun = volume_get(conn->session->target, translate_lun(req_hdr->lun));
+	if (!req->lun) {
+		switch (req_hdr->scb[0]) {
+		case INQUIRY:
+		case REPORT_LUNS:
+			break;
+		default:
+			eprintk("%x %x\n", cmnd_itt(req), req_hdr->scb[0]);
+			create_sense_rsp(req, ILLEGAL_REQUEST, 0x25, 0x0);
+			cmnd_skip_data(req);
+			goto out;
+		}
+	} else
+		set_cmnd_lunit(req);
+
+	switch (req_hdr->scb[0]) {
+	case SERVICE_ACTION_IN:
+		if ((req_hdr->scb[1] & 0x1f) != 0x10)
+			goto error;
+	case INQUIRY:
+	case REPORT_LUNS:
+	case TEST_UNIT_READY:
+	case SYNCHRONIZE_CACHE:
+	case VERIFY:
+	case VERIFY_16:
+	case START_STOP:
+	case READ_CAPACITY:
+	case MODE_SENSE:
+	case REQUEST_SENSE:
+	case RESERVE:
+	case RELEASE:
+	{
+		if (!(req_hdr->flags & ISCSI_CMD_FINAL) || req->pdu.datasize) {
+			/* unexpected unsolicited data */
+			eprintk("%x %x\n", cmnd_itt(req), req_hdr->scb[0]);
+			create_sense_rsp(req, ABORTED_COMMAND, 0xc, 0xc);
+			cmnd_skip_data(req);
+		}
+		break;
+	}
+	case READ_6:
+	case READ_10:
+	case READ_16:
+	{
+		loff_t offset;
+		u32 length;
+
+		if (!(req_hdr->flags & ISCSI_CMD_FINAL) || req->pdu.datasize) {
+			/* unexpected unsolicited data */
+			eprintk("%x %x\n", cmnd_itt(req), req_hdr->scb[0]);
+			create_sense_rsp(req, ABORTED_COMMAND, 0xc, 0xc);
+			cmnd_skip_data(req);
+			break;
+		}
+
+		set_offset_and_length(req->lun, req_hdr->scb, &offset, &length);
+		req->tio = tio_alloc(get_pgcnt(length, offset));
+		tio_set(req->tio, length, offset);
+		break;
+	}
+	case WRITE_6:
+	case WRITE_10:
+	case WRITE_16:
+	case WRITE_VERIFY:
+	{
+		struct iscsi_sess_param *param = &conn->session->param;
+		loff_t offset;
+		u32 length;
+
+		req->r2t_length = be32_to_cpu(req_hdr->data_length) - req->pdu.datasize;
+		req->is_unsolicited_data = !(req_hdr->flags & ISCSI_CMD_FINAL);
+		req->target_task_tag = get_next_ttt(conn->session);
+
+		if (LUReadonly(req->lun)) {
+			create_sense_rsp(req, DATA_PROTECT, 0x27, 0x0);
+			cmnd_skip_data(req);
+			break;
+		}
+
+		if (!param->immediate_data && req->pdu.datasize)
+			eprintk("%x %x\n", cmnd_itt(req), req_hdr->scb[0]);
+
+		if (param->initial_r2t && !(req_hdr->flags & ISCSI_CMD_FINAL))
+			eprintk("%x %x\n", cmnd_itt(req), req_hdr->scb[0]);
+
+		if (req_hdr->scb[0] == WRITE_VERIFY && req_hdr->scb[1] & 0x02)
+			eprintk("Verification is ignored %x\n", cmnd_itt(req));
+
+		set_offset_and_length(req->lun, req_hdr->scb, &offset, &length);
+		if (cmnd_write_size(req) != length)
+			eprintk("%x %u %u\n", cmnd_itt(req), cmnd_write_size(req), length);
+
+		req->tio = tio_alloc(get_pgcnt(length, offset));
+		tio_set(req->tio, length, offset);
+
+		if (req->pdu.datasize) {
+			if (cmnd_recv_pdu(conn, req->tio, 0, req->pdu.datasize) < 0)
+				assert(0);
+		}
+		break;
+	}
+	error:
+	default:
+		eprintk("Unsupported %x\n", req_hdr->scb[0]);
+		create_sense_rsp(req, ILLEGAL_REQUEST, 0x20, 0x0);
+		cmnd_skip_data(req);
+		break;
+	}
+
+out:
+	return;
+}
+
+static void data_out_start(struct iscsi_conn *conn, struct iscsi_cmnd *cmnd)
+{
+	struct iscsi_data_out_hdr *req = (struct iscsi_data_out_hdr *)&cmnd->pdu.bhs;
+	struct iscsi_cmnd *scsi_cmnd = NULL;
+	u32 offset = be32_to_cpu(req->buffer_offset);
+
+	update_stat_sn(cmnd);
+
+	cmnd->req = scsi_cmnd = cmnd_find_hash(conn->session, req->itt, req->ttt);
+	if (!scsi_cmnd) {
+		eprintk("unable to find scsi task %x %x\n",
+			cmnd_itt(cmnd), cmnd_ttt(cmnd));
+		goto skip_data;
+	}
+
+	if (scsi_cmnd->r2t_length < cmnd->pdu.datasize) {
+		eprintk("invalid data len %x %u %u\n",
+			cmnd_itt(scsi_cmnd), cmnd->pdu.datasize, scsi_cmnd->r2t_length);
+		goto skip_data;
+	}
+
+	if (scsi_cmnd->r2t_length + offset != cmnd_write_size(scsi_cmnd)) {
+		eprintk("%x %u %u %u\n", cmnd_itt(scsi_cmnd), scsi_cmnd->r2t_length,
+			offset,	cmnd_write_size(scsi_cmnd));
+		goto skip_data;
+	}
+
+	scsi_cmnd->r2t_length -= cmnd->pdu.datasize;
+
+	if (req->ttt == cpu_to_be32(ISCSI_RESERVED_TAG)) {
+		/* unsolicited burst data */
+		if (scsi_cmnd->pdu.bhs.flags & ISCSI_FLG_FINAL) {
+			eprintk("unexpected data from %x %x\n",
+				cmnd_itt(cmnd), cmnd_ttt(cmnd));
+			goto skip_data;
+		}
+	}
+
+	dprintk(D_WRITE, "%u %p %p %p %u %u\n", req->ttt, cmnd, scsi_cmnd,
+		scsi_cmnd->tio, offset, cmnd->pdu.datasize);
+
+	if (cmnd_recv_pdu(conn, scsi_cmnd->tio, offset, cmnd->pdu.datasize) < 0)
+		goto skip_data;
+	return;
+
+skip_data:
+	cmnd->pdu.bhs.opcode = ISCSI_OP_DATA_REJECT;
+	cmnd_skip_pdu(cmnd);
+	return;
+}
+
+static void data_out_end(struct iscsi_conn *conn, struct iscsi_cmnd *cmnd)
+{
+	struct iscsi_data_out_hdr *req = (struct iscsi_data_out_hdr *) &cmnd->pdu.bhs;
+	struct iscsi_cmnd *scsi_cmnd;
+	u32 offset;
+
+	assert(cmnd);
+	scsi_cmnd = cmnd->req;
+	assert(scsi_cmnd);
+
+	if (conn->read_overflow) {
+		eprintk("%x %u\n", cmnd_itt(cmnd), conn->read_overflow);
+		assert(scsi_cmnd->tio);
+		offset = be32_to_cpu(req->buffer_offset);
+		offset += cmnd->pdu.datasize - conn->read_overflow;
+		if (cmnd_recv_pdu(conn, scsi_cmnd->tio, offset, conn->read_overflow) < 0)
+			assert(0);
+		return;
+	}
+
+	if (req->ttt == cpu_to_be32(ISCSI_RESERVED_TAG)) {
+		if (req->flags & ISCSI_FLG_FINAL) {
+			scsi_cmnd->is_unsolicited_data = 0;
+			if (!cmnd_pending(scsi_cmnd))
+				scsi_cmnd_exec(scsi_cmnd);
+		}
+	} else {
+		/* TODO : proper error handling */
+		if (!(req->flags & ISCSI_FLG_FINAL) && scsi_cmnd->r2t_length == 0)
+			eprintk("initiator error %x\n", cmnd_itt(scsi_cmnd));
+
+		if (!(req->flags & ISCSI_FLG_FINAL))
+			goto out;
+
+		scsi_cmnd->outstanding_r2t--;
+
+		if (scsi_cmnd->r2t_length == 0)
+			assert(list_empty(&scsi_cmnd->pdu_list));
+
+		scsi_cmnd_exec(scsi_cmnd);
+	}
+
+out:
+	iscsi_cmnd_remove(cmnd);
+	return;
+}
+
+static int __cmnd_abort(struct iscsi_cmnd *cmnd)
+{
+	if (cmnd_waitio(cmnd))
+		return -ISCSI_RESPONSE_UNKNOWN_TASK;
+
+	if (cmnd->conn->read_cmnd != cmnd)
+		cmnd_release(cmnd, 1);
+	else if (cmnd_rxstart(cmnd))
+		set_cmnd_tmfabort(cmnd);
+	else
+		return -ISCSI_RESPONSE_UNKNOWN_TASK;
+
+	return 0;
+}
+
+static int cmnd_abort(struct iscsi_session *session, u32 itt)
+{
+	struct iscsi_cmnd *cmnd;
+	int err =  -ISCSI_RESPONSE_UNKNOWN_TASK;
+
+	if ((cmnd = cmnd_find_hash(session, itt, ISCSI_RESERVED_TAG))) {
+		eprintk("%x %x %x %u %u %u %u\n", cmnd_itt(cmnd), cmnd_opcode(cmnd),
+			cmnd->r2t_length, cmnd_scsicode(cmnd),
+			cmnd_write_size(cmnd), cmnd->is_unsolicited_data,
+			cmnd->outstanding_r2t);
+		err = __cmnd_abort(cmnd);
+	}
+
+	return err;
+}
+
+static int target_reset(struct iscsi_cmnd *req, u32 lun, int all)
+{
+	struct iscsi_target *target = req->conn->session->target;
+	struct iscsi_session *session;
+	struct iscsi_conn *conn;
+	struct iscsi_cmnd *cmnd, *tmp;
+	struct iet_volume *volume;
+
+	list_for_each_entry(session, &target->session_list, list) {
+		list_for_each_entry(conn, &session->conn_list, list) {
+			list_for_each_entry_safe(cmnd, tmp, &conn->pdu_list, conn_list) {
+				if (cmnd == req)
+					continue;
+
+				if (all)
+					__cmnd_abort(cmnd);
+				else if (translate_lun(cmnd_hdr(cmnd)->lun) == lun)
+					__cmnd_abort(cmnd);
+			}
+		}
+	}
+
+	list_for_each_entry(volume, &target->volumes, list) {
+		if (all || volume->lun == lun) {
+			/* force release */
+			volume_release(volume, 0, 1);
+			/* power-on, reset, or bus device reset occurred */
+			ua_establish_for_all_sessions(target, volume->lun,
+						      0x29, 0x0);
+		}
+	}
+
+	return 0;
+}
+
+static void task_set_abort(struct iscsi_cmnd *req)
+{
+	struct iscsi_session *session = req->conn->session;
+	struct iscsi_conn *conn;
+	struct iscsi_cmnd *cmnd, *tmp;
+
+	list_for_each_entry(conn, &session->conn_list, list) {
+		list_for_each_entry_safe(cmnd, tmp, &conn->pdu_list, conn_list) {
+			if (cmnd != req)
+				__cmnd_abort(cmnd);
+		}
+	}
+}
+
+static inline char *tmf_desc(int fun)
+{
+	static char *tmf_desc[] = {
+		"Unknown Function",
+		"Abort Task",
+		"Abort Task Set",
+		"Clear ACA",
+		"Clear Task Set",
+		"Logical Unit Reset",
+		"Target Warm Reset",
+		"Target Cold Reset",
+		"Task Reassign",
+        };
+
+	if ((fun < ISCSI_FUNCTION_ABORT_TASK) ||
+				(fun > ISCSI_FUNCTION_TASK_REASSIGN))
+		fun = 0;
+
+	return tmf_desc[fun];
+}
+
+static inline char *rsp_desc(int rsp)
+{
+	static char *rsp_desc[] = {
+		"Function Complete",
+		"Unknown Task",
+		"Unknown LUN",
+		"Task Allegiant",
+		"Failover Unsupported",
+		"Function Unsupported",
+		"No Authorization",
+		"Function Rejected",
+		"Unknown Response",
+	};
+
+	if (((rsp < ISCSI_RESPONSE_FUNCTION_COMPLETE) ||
+			(rsp > ISCSI_RESPONSE_NO_AUTHORIZATION)) &&
+			(rsp != ISCSI_RESPONSE_FUNCTION_REJECTED))
+		rsp = 8;
+	else if (rsp == ISCSI_RESPONSE_FUNCTION_REJECTED)
+		rsp = 7;
+
+	return rsp_desc[rsp];
+}
+
+static void execute_task_management(struct iscsi_cmnd *req)
+{
+	struct iscsi_conn *conn = req->conn;
+	struct iscsi_session *session = conn->session;
+	struct iscsi_target *target = session->target;
+	struct iscsi_cmnd *rsp;
+	struct iscsi_task_mgt_hdr *req_hdr = (struct iscsi_task_mgt_hdr *)&req->pdu.bhs;
+	struct iscsi_task_rsp_hdr *rsp_hdr;
+	u32 lun;
+	int err, function = req_hdr->function & ISCSI_FUNCTION_MASK;
+
+	rsp = iscsi_cmnd_create_rsp_cmnd(req, 1);
+	rsp_hdr = (struct iscsi_task_rsp_hdr *)&rsp->pdu.bhs;
+
+	rsp_hdr->opcode = ISCSI_OP_SCSI_TASK_MGT_RSP;
+	rsp_hdr->flags = ISCSI_FLG_FINAL;
+	rsp_hdr->itt = req_hdr->itt;
+	rsp_hdr->response = ISCSI_RESPONSE_FUNCTION_COMPLETE;
+
+	switch (function) {
+	case ISCSI_FUNCTION_ABORT_TASK:
+	case ISCSI_FUNCTION_ABORT_TASK_SET:
+	case ISCSI_FUNCTION_CLEAR_ACA:
+	case ISCSI_FUNCTION_CLEAR_TASK_SET:
+	case ISCSI_FUNCTION_LOGICAL_UNIT_RESET:
+		lun = translate_lun(req_hdr->lun);
+		if (!volume_lookup(target, lun)) {
+			rsp_hdr->response = ISCSI_RESPONSE_UNKNOWN_LUN;
+			goto out;
+		}
+	}
+
+	switch (function) {
+	case ISCSI_FUNCTION_ABORT_TASK:
+		if ((err = cmnd_abort(conn->session, req_hdr->rtt)) < 0)
+			rsp_hdr->response = -err;
+		break;
+	case ISCSI_FUNCTION_ABORT_TASK_SET:
+		task_set_abort(req);
+		break;
+	case ISCSI_FUNCTION_CLEAR_ACA:
+		rsp_hdr->response = ISCSI_RESPONSE_FUNCTION_UNSUPPORTED;
+		break;
+	case ISCSI_FUNCTION_CLEAR_TASK_SET:
+		rsp_hdr->response = ISCSI_RESPONSE_FUNCTION_UNSUPPORTED;
+		break;
+	case ISCSI_FUNCTION_LOGICAL_UNIT_RESET:
+		target_reset(req, translate_lun(req_hdr->lun), 0);
+		break;
+	case ISCSI_FUNCTION_TARGET_WARM_RESET:
+	case ISCSI_FUNCTION_TARGET_COLD_RESET:
+		target_reset(req, 0, 1);
+		if (function == ISCSI_FUNCTION_TARGET_COLD_RESET)
+			set_cmnd_close(rsp);
+		break;
+	case ISCSI_FUNCTION_TASK_REASSIGN:
+		rsp_hdr->response = ISCSI_RESPONSE_FUNCTION_UNSUPPORTED;
+		break;
+	default:
+		rsp_hdr->response = ISCSI_RESPONSE_FUNCTION_REJECTED;
+		break;
+	}
+out:
+	iprintk("%s (%02x) issued on tid:%d lun:%d by sid:%llu (%s)\n",
+				tmf_desc(function), function, target->tid,
+				translate_lun(req_hdr->lun), session->sid,
+				rsp_desc(rsp_hdr->response));
+
+	iscsi_cmnd_init_write(rsp);
+}
+
+static void nop_hdr_setup(struct iscsi_hdr *hdr, u8 opcode, __be32 itt,
+			  __be32 ttt)
+{
+	hdr->opcode = opcode;
+	hdr->flags = ISCSI_FLG_FINAL;
+	hdr->itt = itt;
+	hdr->ttt = ttt;
+}
+
+static void nop_out_exec(struct iscsi_cmnd *req)
+{
+	struct iscsi_cmnd *rsp;
+
+	if (cmnd_itt(req) != cpu_to_be32(ISCSI_RESERVED_TAG)) {
+		rsp = iscsi_cmnd_create_rsp_cmnd(req, 1);
+
+		nop_hdr_setup(&rsp->pdu.bhs, ISCSI_OP_NOP_IN, req->pdu.bhs.itt,
+			      cpu_to_be32(ISCSI_RESERVED_TAG));
+
+		if (req->pdu.datasize)
+			assert(req->tio);
+		else
+			assert(!req->tio);
+
+		if (req->tio) {
+			tio_get(req->tio);
+			rsp->tio = req->tio;
+		}
+
+		assert(get_pgcnt(req->pdu.datasize, 0) < ISCSI_CONN_IOV_MAX);
+		rsp->pdu.datasize = req->pdu.datasize;
+		iscsi_cmnd_init_write(rsp);
+	} else {
+		if (req->req) {
+			dprintk(D_GENERIC, "releasing NOP-Out %p, ttt %x; "
+				"removing NOP-In %p, ttt %x\n", req->req,
+				cmnd_ttt(req->req), req, cmnd_ttt(req));
+			cmnd_release(req->req, 0);
+		}
+		iscsi_cmnd_remove(req);
+	}
+}
+
+static void nop_in_timeout(unsigned long data)
+{
+	struct iscsi_cmnd *req = (struct iscsi_cmnd *)data;
+
+	printk(KERN_INFO "NOP-In ping timed out - closing sid:cid %llu:%u\n",
+	       req->conn->session->sid, req->conn->cid);
+	clear_cmnd_timer_active(req);
+	conn_close(req->conn);
+}
+
+/* create a fake NOP-Out req and treat the NOP-In as our rsp to it */
+void send_nop_in(struct iscsi_conn *conn)
+{
+	struct iscsi_cmnd *req = cmnd_alloc(conn, 1);
+	struct iscsi_cmnd *rsp = iscsi_cmnd_create_rsp_cmnd(req, 0);
+
+	req->target_task_tag = get_next_ttt(conn->session);
+
+
+	nop_hdr_setup(&req->pdu.bhs, ISCSI_OP_NOP_OUT,
+		      cpu_to_be32(ISCSI_RESERVED_TAG), req->target_task_tag);
+	nop_hdr_setup(&rsp->pdu.bhs, ISCSI_OP_NOP_IN,
+		      cpu_to_be32(ISCSI_RESERVED_TAG), req->target_task_tag);
+
+	dprintk(D_GENERIC, "NOP-Out: %p, ttt %x, timer %p; "
+		"NOP-In: %p, ttt %x;\n", req, cmnd_ttt(req), &req->timer, rsp,
+		cmnd_ttt(rsp));
+
+	init_timer(&req->timer);
+	req->timer.data = (unsigned long)req;
+	req->timer.function = nop_in_timeout;
+
+	if (cmnd_insert_hash_ttt(req, req->target_task_tag)) {
+		eprintk("%s\n",
+			"failed to insert fake NOP-Out into hash table");
+		cmnd_release(rsp, 0);
+		cmnd_release(req, 0);
+	} else
+		iscsi_cmnd_init_write(rsp);
+}
+
+static void nop_in_tx_end(struct iscsi_cmnd *cmnd)
+{
+	struct iscsi_conn *conn = cmnd->conn;
+	u32 t;
+
+	if (cmnd->pdu.bhs.ttt == cpu_to_be32(ISCSI_RESERVED_TAG))
+		return;
+
+	/*
+	 * NOP-In ping issued by the target.
+	 * FIXME: Sanitize the NOP timeout earlier, during configuration
+	 */
+	t = conn->session->target->trgt_param.nop_timeout;
+
+	if (!t || t > conn->session->target->trgt_param.nop_interval) {
+		eprintk("Adjusting NOPTimeout of tid %u from %u to %u "
+			"(== NOPInterval)\n", conn->session->target->tid,
+			t,
+			conn->session->target->trgt_param.nop_interval);
+		t = conn->session->target->trgt_param.nop_interval;
+		conn->session->target->trgt_param.nop_timeout = t;
+	}
+
+	dprintk(D_GENERIC, "NOP-In %p, %x: timer %p\n",	cmnd, cmnd_ttt(cmnd),
+		&cmnd->req->timer);
+
+	set_cmnd_timer_active(cmnd->req);
+	mod_timer(&cmnd->req->timer, jiffies + HZ * t);
+}
+
+static void logout_exec(struct iscsi_cmnd *req)
+{
+	struct iscsi_logout_req_hdr *req_hdr;
+	struct iscsi_cmnd *rsp;
+	struct iscsi_logout_rsp_hdr *rsp_hdr;
+
+	req_hdr = (struct iscsi_logout_req_hdr *)&req->pdu.bhs;
+	rsp = iscsi_cmnd_create_rsp_cmnd(req, 1);
+	rsp_hdr = (struct iscsi_logout_rsp_hdr *)&rsp->pdu.bhs;
+	rsp_hdr->opcode = ISCSI_OP_LOGOUT_RSP;
+	rsp_hdr->flags = ISCSI_FLG_FINAL;
+	rsp_hdr->itt = req_hdr->itt;
+	set_cmnd_close(rsp);
+	iscsi_cmnd_init_write(rsp);
+}
+
+static void iscsi_cmnd_exec(struct iscsi_cmnd *cmnd)
+{
+	dprintk(D_GENERIC, "%p,%x,%u\n", cmnd, cmnd_opcode(cmnd), cmnd->pdu.bhs.sn);
+
+	switch (cmnd_opcode(cmnd)) {
+	case ISCSI_OP_NOP_OUT:
+		nop_out_exec(cmnd);
+		break;
+	case ISCSI_OP_SCSI_CMD:
+		scsi_cmnd_exec(cmnd);
+		break;
+	case ISCSI_OP_SCSI_TASK_MGT_MSG:
+		execute_task_management(cmnd);
+		break;
+	case ISCSI_OP_LOGOUT_CMD:
+		logout_exec(cmnd);
+		break;
+	case ISCSI_OP_SCSI_REJECT:
+		iscsi_cmnd_init_write(get_rsp_cmnd(cmnd));
+		break;
+	case ISCSI_OP_TEXT_CMD:
+	case ISCSI_OP_SNACK_CMD:
+		break;
+	default:
+		eprintk("unexpected cmnd op %x\n", cmnd_opcode(cmnd));
+		break;
+	}
+}
+
+static void __cmnd_send_pdu(struct iscsi_conn *conn, struct tio *tio, u32 offset, u32 size)
+{
+	dprintk(D_GENERIC, "%p %u,%u\n", tio, offset, size);
+	offset += tio->offset;
+
+	assert(offset <= tio->offset + tio->size);
+	assert(offset + size <= tio->offset + tio->size);
+
+	conn->write_tcmnd = tio;
+	conn->write_offset = offset;
+	conn->write_size += size;
+}
+
+static void cmnd_send_pdu(struct iscsi_conn *conn, struct iscsi_cmnd *cmnd)
+{
+	u32 size;
+	struct tio *tio;
+
+	if (!cmnd->pdu.datasize)
+		return;
+
+	size = (cmnd->pdu.datasize + 3) & -4;
+	tio = cmnd->tio;
+	assert(tio);
+	assert(tio->size == size);
+	__cmnd_send_pdu(conn, tio, 0, size);
+}
+
+static void set_cork(struct socket *sock, int on)
+{
+	int opt = on;
+	mm_segment_t oldfs;
+
+	oldfs = get_fs();
+	set_fs(get_ds());
+	sock->ops->setsockopt(sock, SOL_TCP, TCP_CORK, (void *)&opt, sizeof(opt));
+	set_fs(oldfs);
+}
+
+void cmnd_release(struct iscsi_cmnd *cmnd, int force)
+{
+	struct iscsi_cmnd *req, *rsp;
+	int is_last = 0;
+
+	if (!cmnd)
+		return;
+
+/* 	eprintk("%x %lx %d\n", cmnd_opcode(cmnd), cmnd->flags, force); */
+
+	req = cmnd->req;
+	is_last = cmnd_final(cmnd);
+
+	if (force) {
+		while (!list_empty(&cmnd->pdu_list)) {
+			rsp = list_entry(cmnd->pdu_list.next, struct iscsi_cmnd, pdu_list);
+			list_del_init(&rsp->list);
+			list_del(&rsp->pdu_list);
+			iscsi_cmnd_remove(rsp);
+		}
+		list_del_init(&cmnd->list);
+	} else
+		if (cmnd_queued(cmnd))
+			iscsi_scsi_dequeuecmnd(cmnd);
+
+	if (cmnd_hashed(cmnd))
+		cmnd_remove_hash(cmnd);
+
+	if (cmnd_lunit(cmnd)) {
+		assert(cmnd->lun);
+		volume_put(cmnd->lun);
+	}
+
+	list_del_init(&cmnd->pdu_list);
+	iscsi_cmnd_remove(cmnd);
+
+	if (is_last) {
+		assert(!force);
+		assert(req);
+		cmnd_release(req, 0);
+	}
+
+	return;
+}
+
+void cmnd_tx_start(struct iscsi_cmnd *cmnd)
+{
+	struct iscsi_conn *conn = cmnd->conn;
+	struct iovec *iop;
+
+	dprintk(D_GENERIC, "%p:%x\n", cmnd, cmnd_opcode(cmnd));
+	assert(cmnd);
+	iscsi_cmnd_set_length(&cmnd->pdu);
+
+	set_cork(conn->sock, 1);
+
+	conn->write_iop = iop = conn->write_iov;
+	iop->iov_base = &cmnd->pdu.bhs;
+	iop->iov_len = sizeof(cmnd->pdu.bhs);
+	iop++;
+	conn->write_size = sizeof(cmnd->pdu.bhs);
+
+	switch (cmnd_opcode(cmnd)) {
+	case ISCSI_OP_NOP_IN:
+		if (cmnd->pdu.bhs.itt == ISCSI_RESERVED_TAG) {
+			/* NOP-In ping generated by us. Don't advance StatSN. */
+			cmnd_set_sn(cmnd, 0);
+			cmnd_set_sn(cmnd->req, 0);
+			cmnd->pdu.bhs.sn = cpu_to_be32(conn->stat_sn);
+			cmnd->req->pdu.bhs.sn = cpu_to_be32(conn->stat_sn);
+		} else
+			cmnd_set_sn(cmnd, 1);
+		cmnd_send_pdu(conn, cmnd);
+		break;
+	case ISCSI_OP_SCSI_RSP:
+		cmnd_set_sn(cmnd, 1);
+		cmnd_send_pdu(conn, cmnd);
+		break;
+	case ISCSI_OP_SCSI_TASK_MGT_RSP:
+		cmnd_set_sn(cmnd, 1);
+		break;
+	case ISCSI_OP_TEXT_RSP:
+		cmnd_set_sn(cmnd, 1);
+		break;
+	case ISCSI_OP_SCSI_DATA_IN:
+	{
+		struct iscsi_data_in_hdr *rsp = (struct iscsi_data_in_hdr *)&cmnd->pdu.bhs;
+		u32 offset;
+
+		cmnd_set_sn(cmnd, (rsp->flags & ISCSI_FLG_FINAL) ? 1 : 0);
+		offset = rsp->buffer_offset;
+		rsp->buffer_offset = cpu_to_be32(offset);
+		__cmnd_send_pdu(conn, cmnd->tio, offset, cmnd->pdu.datasize);
+		break;
+	}
+	case ISCSI_OP_LOGOUT_RSP:
+		cmnd_set_sn(cmnd, 1);
+		break;
+	case ISCSI_OP_R2T:
+		cmnd_set_sn(cmnd, 0);
+		cmnd->pdu.bhs.sn = cpu_to_be32(conn->stat_sn);
+		break;
+	case ISCSI_OP_ASYNC_MSG:
+		cmnd_set_sn(cmnd, 1);
+		break;
+	case ISCSI_OP_REJECT:
+		cmnd_set_sn(cmnd, 1);
+		cmnd_send_pdu(conn, cmnd);
+		break;
+	default:
+		eprintk("unexpected cmnd op %x\n", cmnd_opcode(cmnd));
+		break;
+	}
+
+	iop->iov_len = 0;
+	// move this?
+	conn->write_size = (conn->write_size + 3) & -4;
+	iscsi_dump_pdu(&cmnd->pdu);
+}
+
+void cmnd_tx_end(struct iscsi_cmnd *cmnd)
+{
+	struct iscsi_conn *conn = cmnd->conn;
+
+	dprintk(D_GENERIC, "%p:%x\n", cmnd, cmnd_opcode(cmnd));
+	switch (cmnd_opcode(cmnd)) {
+	case ISCSI_OP_NOP_IN:
+		nop_in_tx_end(cmnd);
+		break;
+	case ISCSI_OP_SCSI_RSP:
+	case ISCSI_OP_SCSI_TASK_MGT_RSP:
+	case ISCSI_OP_TEXT_RSP:
+	case ISCSI_OP_R2T:
+	case ISCSI_OP_ASYNC_MSG:
+	case ISCSI_OP_REJECT:
+	case ISCSI_OP_SCSI_DATA_IN:
+	case ISCSI_OP_LOGOUT_RSP:
+		break;
+	default:
+		eprintk("unexpected cmnd op %x\n", cmnd_opcode(cmnd));
+		assert(0);
+		break;
+	}
+
+	if (cmnd_close(cmnd))
+		conn_close(conn);
+
+	list_del_init(&cmnd->list);
+	set_cork(cmnd->conn->sock, 0);
+}
+
+/**
+ * Push the command for execution.
+ * This functions reorders the commands.
+ * Called from the read thread.
+ *
+ * iscsi_session_push_cmnd -
+ * @cmnd: ptr to command
+ */
+
+static void iscsi_session_push_cmnd(struct iscsi_cmnd *cmnd)
+{
+	struct iscsi_session *session = cmnd->conn->session;
+	struct list_head *entry;
+	u32 cmd_sn;
+
+	dprintk(D_GENERIC, "%p:%x %u,%u\n",
+		cmnd, cmnd_opcode(cmnd), cmnd->pdu.bhs.sn, session->exp_cmd_sn);
+
+	if (cmnd->pdu.bhs.opcode & ISCSI_OP_IMMEDIATE) {
+		iscsi_cmnd_exec(cmnd);
+		return;
+	}
+
+	cmd_sn = cmnd->pdu.bhs.sn;
+	if (cmd_sn == session->exp_cmd_sn) {
+		while (1) {
+			session->exp_cmd_sn = ++cmd_sn;
+			iscsi_cmnd_exec(cmnd);
+
+			if (list_empty(&session->pending_list))
+				break;
+			cmnd = list_entry(session->pending_list.next, struct iscsi_cmnd, list);
+			if (cmnd->pdu.bhs.sn != cmd_sn)
+				break;
+/* 			eprintk("find out-of-order %x %u %u\n", */
+/* 				cmnd_itt(cmnd), cmd_sn, cmnd->pdu.bhs.sn); */
+			list_del_init(&cmnd->list);
+			clear_cmnd_pending(cmnd);
+		}
+	} else {
+/* 		eprintk("out-of-order %x %u %u\n", */
+/* 			cmnd_itt(cmnd), cmd_sn, session->exp_cmd_sn); */
+
+		set_cmnd_pending(cmnd);
+		if (before(cmd_sn, session->exp_cmd_sn)) /* close the conn */
+			eprintk("unexpected cmd_sn (%u,%u)\n", cmd_sn, session->exp_cmd_sn);
+
+		if (after(cmd_sn, session->exp_cmd_sn + session->max_queued_cmnds))
+			eprintk("too large cmd_sn (%u,%u)\n", cmd_sn, session->exp_cmd_sn);
+
+		list_for_each(entry, &session->pending_list) {
+			struct iscsi_cmnd *tmp = list_entry(entry, struct iscsi_cmnd, list);
+			if (before(cmd_sn, tmp->pdu.bhs.sn))
+				break;
+		}
+
+		assert(list_empty(&cmnd->list));
+
+		list_add_tail(&cmnd->list, entry);
+	}
+}
+
+static int check_segment_length(struct iscsi_cmnd *cmnd)
+{
+	struct iscsi_conn *conn = cmnd->conn;
+	struct iscsi_sess_param *param = &conn->session->param;
+
+	if (cmnd->pdu.datasize > param->max_recv_data_length) {
+		eprintk("data too long %x %u %u\n", cmnd_itt(cmnd),
+			cmnd->pdu.datasize, param->max_recv_data_length);
+
+		if (get_pgcnt(cmnd->pdu.datasize, 0) > ISCSI_CONN_IOV_MAX) {
+			conn_close(conn);
+			return -EINVAL;
+		}
+	}
+
+	return 0;
+}
+
+void cmnd_rx_start(struct iscsi_cmnd *cmnd)
+{
+	struct iscsi_conn *conn = cmnd->conn;
+	int err = 0;
+
+	iscsi_dump_pdu(&cmnd->pdu);
+
+	set_cmnd_rxstart(cmnd);
+	if (check_segment_length(cmnd) < 0)
+		return;
+
+	switch (cmnd_opcode(cmnd)) {
+	case ISCSI_OP_NOP_OUT:
+		err = nop_out_start(conn, cmnd);
+		break;
+	case ISCSI_OP_SCSI_CMD:
+		if (!(err = cmnd_insert_hash(cmnd)))
+			scsi_cmnd_start(conn, cmnd);
+		break;
+	case ISCSI_OP_SCSI_TASK_MGT_MSG:
+		err = cmnd_insert_hash(cmnd);
+		break;
+	case ISCSI_OP_SCSI_DATA_OUT:
+		data_out_start(conn, cmnd);
+		break;
+	case ISCSI_OP_LOGOUT_CMD:
+		err = cmnd_insert_hash(cmnd);
+		break;
+	case ISCSI_OP_TEXT_CMD:
+	case ISCSI_OP_SNACK_CMD:
+		err = -ISCSI_REASON_UNSUPPORTED_COMMAND;
+		break;
+	default:
+		err = -ISCSI_REASON_UNSUPPORTED_COMMAND;
+		break;
+	}
+
+	if (err < 0) {
+		eprintk("%x %x %d\n", cmnd_opcode(cmnd), cmnd_itt(cmnd), err);
+		iscsi_cmnd_reject(cmnd, -err);
+	}
+}
+
+void cmnd_rx_end(struct iscsi_cmnd *cmnd)
+{
+	struct iscsi_conn *conn = cmnd->conn;
+
+	if (cmnd_tmfabort(cmnd)) {
+		cmnd_release(cmnd, 1);
+		return;
+	}
+
+	dprintk(D_GENERIC, "%p:%x\n", cmnd, cmnd_opcode(cmnd));
+	switch (cmnd_opcode(cmnd)) {
+	case ISCSI_OP_SCSI_REJECT:
+	case ISCSI_OP_NOP_OUT:
+	case ISCSI_OP_SCSI_CMD:
+	case ISCSI_OP_SCSI_TASK_MGT_MSG:
+	case ISCSI_OP_TEXT_CMD:
+	case ISCSI_OP_LOGOUT_CMD:
+		iscsi_session_push_cmnd(cmnd);
+		break;
+	case ISCSI_OP_SCSI_DATA_OUT:
+		data_out_end(conn, cmnd);
+		break;
+	case ISCSI_OP_SNACK_CMD:
+		break;
+	case ISCSI_OP_PDU_REJECT:
+		iscsi_cmnd_init_write(get_rsp_cmnd(cmnd));
+		break;
+	case ISCSI_OP_DATA_REJECT:
+		cmnd_release(cmnd, 0);
+		break;
+	default:
+		eprintk("unexpected cmnd op %x\n", cmnd_opcode(cmnd));
+		BUG();
+		break;
+	}
+}
+
+static void iscsi_exit(void)
+{
+	wthread_module_exit();
+
+	unregister_chrdev(ctr_major, ctr_name);
+
+	iet_procfs_exit();
+
+	event_exit();
+
+	tio_exit();
+
+	iotype_exit();
+
+	ua_exit();
+
+	if (iscsi_cmnd_cache)
+		kmem_cache_destroy(iscsi_cmnd_cache);
+}
+
+static int iscsi_init(void)
+{
+	int err = -ENOMEM;
+
+	printk("iSCSI Enterprise Target Software - version %s\n", IET_VERSION_STRING);
+
+	if ((ctr_major = register_chrdev(0, ctr_name, &ctr_fops)) < 0) {
+		eprintk("failed to register the control device %d\n", ctr_major);
+		return ctr_major;
+	}
+
+	if ((err = iet_procfs_init()) < 0)
+		goto err;
+
+	if ((err = event_init()) < 0)
+		goto err;
+
+	iscsi_cmnd_cache = KMEM_CACHE(iscsi_cmnd, 0);
+	if (!iscsi_cmnd_cache)
+		goto err;
+
+	err = ua_init();
+	if (err < 0)
+		goto err;
+
+	if ((err = tio_init()) < 0)
+		goto err;
+
+	if ((err = iotype_init()) < 0)
+		goto err;
+
+	if ((err = wthread_module_init()) < 0)
+		goto err;
+
+	return 0;
+
+err:
+	iscsi_exit();
+	return err;
+}
+
+module_param(worker_thread_pool_size, ulong, S_IRUGO);
+MODULE_PARM_DESC(worker_thread_pool_size,
+		 "Size of the worker thread pool "
+		 "(0 = dedicated threads per target (default))");
+
+module_param(debug_enable_flags, ulong, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(debug_enable_flags,
+		 "debug bitmask, low bits (0 ... 8) used, see iscsi_dbg.h");
+
+module_init(iscsi_init);
+module_exit(iscsi_exit);
+
+MODULE_VERSION(IET_VERSION_STRING);
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("iSCSI Enterprise Target");
+MODULE_AUTHOR("IET development team <iscsitarget-devel@lists.sourceforge.net>");
--- linux-mvl-dove-2.6.32.orig/ubuntu/iscsitarget/config.c
+++ linux-mvl-dove-2.6.32/ubuntu/iscsitarget/config.c
@@ -0,0 +1,322 @@
+/*
+ * (C) 2004 - 2005 FUJITA Tomonori <tomof@acm.org>
+ *
+ * This code is licenced under the GPL.
+ */
+
+#include <linux/proc_fs.h>
+
+#include "iscsi.h"
+#include "iscsi_dbg.h"
+
+struct proc_entries {
+	const char *name;
+	struct file_operations *fops;
+};
+
+static struct proc_entries iet_proc_entries[] =
+{
+	{"volume", &volume_seq_fops},
+	{"session", &session_seq_fops},
+};
+
+static struct proc_dir_entry *proc_iet_dir;
+
+void iet_procfs_exit(void)
+{
+	int i;
+
+	if (!proc_iet_dir)
+		return;
+
+	for (i = 0; i < ARRAY_SIZE(iet_proc_entries); i++)
+		remove_proc_entry(iet_proc_entries[i].name, proc_iet_dir);
+
+	remove_proc_entry(proc_iet_dir->name, proc_iet_dir->parent);
+}
+
+int iet_procfs_init(void)
+{
+	int i;
+	struct proc_dir_entry *ent;
+
+	if (!(proc_iet_dir = proc_mkdir("iet", init_net.proc_net)))
+		goto err;
+
+	for (i = 0; i < ARRAY_SIZE(iet_proc_entries); i++) {
+		ent = create_proc_entry(iet_proc_entries[i].name, 0, proc_iet_dir);
+		if (ent)
+			ent->proc_fops = iet_proc_entries[i].fops;
+		else
+			goto err;
+	}
+
+	return 0;
+
+err:
+	if (proc_iet_dir)
+		iet_procfs_exit();
+
+	return -ENOMEM;
+}
+
+static int get_conn_info(struct iscsi_target *target, unsigned long ptr)
+{
+	int err;
+	struct iscsi_session *session;
+	struct conn_info info;
+	struct iscsi_conn *conn;
+
+	if ((err = copy_from_user(&info, (void *) ptr, sizeof(info))) < 0)
+		return err;
+
+	session = session_lookup(target, info.sid);
+	if (!session)
+		return -ENOENT;
+	conn = conn_lookup(session, info.cid);
+
+	info.cid = conn->cid;
+	info.stat_sn = conn->stat_sn;
+	info.exp_stat_sn = conn->exp_stat_sn;
+
+	if (copy_to_user((void *) ptr, &info, sizeof(info)))
+		return -EFAULT;
+
+	return 0;
+}
+
+static int add_conn(struct iscsi_target *target, unsigned long ptr)
+{
+	int err;
+	struct iscsi_session *session;
+	struct conn_info info;
+
+	if ((err = copy_from_user(&info, (void *) ptr, sizeof(info))) < 0)
+		return err;
+
+	if (!(session = session_lookup(target, info.sid)))
+		return -ENOENT;
+
+	return conn_add(session, &info);
+}
+
+static int del_conn(struct iscsi_target *target, unsigned long ptr)
+{
+	int err;
+	struct iscsi_session *session;
+	struct conn_info info;
+
+	if ((err = copy_from_user(&info, (void *) ptr, sizeof(info))) < 0)
+		return err;
+
+	if (!(session = session_lookup(target, info.sid)))
+		return -ENOENT;
+
+	return conn_del(session, &info);
+}
+
+static int get_session_info(struct iscsi_target *target, unsigned long ptr)
+{
+	int err;
+	struct iscsi_session *session;
+	struct session_info info;
+
+	if ((err = copy_from_user(&info, (void *) ptr, sizeof(info))) < 0)
+		return err;
+
+	session = session_lookup(target, info.sid);
+
+	if (!session)
+		return -ENOENT;
+
+	info.exp_cmd_sn = session->exp_cmd_sn;
+	info.max_cmd_sn = session->max_cmd_sn;
+
+	if (copy_to_user((void *) ptr, &info, sizeof(info)))
+		return -EFAULT;
+
+	return 0;
+}
+
+static int add_session(struct iscsi_target *target, unsigned long ptr)
+{
+	int err;
+	struct session_info info;
+
+	if ((err = copy_from_user(&info, (void *) ptr, sizeof(info))) < 0)
+		return err;
+
+	return session_add(target, &info);
+}
+
+static int del_session(struct iscsi_target *target, unsigned long ptr)
+{
+	int err;
+	struct session_info info;
+
+	if ((err = copy_from_user(&info, (void *) ptr, sizeof(info))) < 0)
+		return err;
+
+	return session_del(target, info.sid);
+}
+
+static int add_volume(struct iscsi_target *target, unsigned long ptr)
+{
+	int err;
+	struct volume_info info;
+
+	if ((err = copy_from_user(&info, (void *) ptr, sizeof(info))) < 0)
+		return err;
+
+	return volume_add(target, &info);
+}
+
+static int del_volume(struct iscsi_target *target, unsigned long ptr)
+{
+	int err;
+	struct volume_info info;
+
+	if ((err = copy_from_user(&info, (void *) ptr, sizeof(info))) < 0)
+		return err;
+
+	return iscsi_volume_del(target, &info);
+}
+
+static int iscsi_param_config(struct iscsi_target *target, unsigned long ptr, int set)
+{
+	int err;
+	struct iscsi_param_info info;
+
+	if ((err = copy_from_user(&info, (void *) ptr, sizeof(info))) < 0)
+		goto out;
+
+	if ((err = iscsi_param_set(target, &info, set)) < 0)
+		goto out;
+
+	if (!set)
+		err = copy_to_user((void *) ptr, &info, sizeof(info));
+
+out:
+	return err;
+}
+
+static int add_target(unsigned long ptr)
+{
+	int err;
+	struct target_info info;
+
+	if ((err = copy_from_user(&info, (void *) ptr, sizeof(info))) < 0)
+		return err;
+
+	if (!(err = target_add(&info)))
+		err = copy_to_user((void *) ptr, &info, sizeof(info));
+
+	return err;
+}
+
+static long ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+	struct iscsi_target *target = NULL;
+	long err;
+	u32 id;
+
+	if ((err = get_user(id, (u32 *) arg)) != 0)
+		goto done;
+
+	if (cmd == DEL_TARGET) {
+		err = target_del(id);
+		goto done;
+	}
+
+	target = target_lookup_by_id(id);
+
+	if (cmd == ADD_TARGET)
+		if (target) {
+			err = -EEXIST;
+			eprintk("Target %u already exist!\n", id);
+			goto done;
+		}
+
+	switch (cmd) {
+	case ADD_TARGET:
+		assert(!target);
+		err = add_target(arg);
+		goto done;
+	}
+
+	if (!target) {
+		eprintk("can't find the target %u\n", id);
+		err = -EINVAL;
+		goto done;
+	}
+
+	if ((err = target_lock(target, 1)) < 0) {
+		eprintk("interrupted %ld %d\n", err, cmd);
+		goto done;
+	}
+
+	switch (cmd) {
+	case ADD_VOLUME:
+		err = add_volume(target, arg);
+		break;
+
+	case DEL_VOLUME:
+		err = del_volume(target, arg);
+		break;
+
+	case ADD_SESSION:
+		err = add_session(target, arg);
+		break;
+
+	case DEL_SESSION:
+		err = del_session(target, arg);
+		break;
+
+	case GET_SESSION_INFO:
+		err = get_session_info(target, arg);
+		break;
+
+	case ISCSI_PARAM_SET:
+		err = iscsi_param_config(target, arg, 1);
+		break;
+
+	case ISCSI_PARAM_GET:
+		err = iscsi_param_config(target, arg, 0);
+		break;
+
+	case ADD_CONN:
+		err = add_conn(target, arg);
+		break;
+
+	case DEL_CONN:
+		err = del_conn(target, arg);
+		break;
+
+	case GET_CONN_INFO:
+		err = get_conn_info(target, arg);
+		break;
+	default:
+		eprintk("invalid ioctl cmd %x\n", cmd);
+		err = -EINVAL;
+	}
+
+	if (target)
+		target_unlock(target);
+
+done:
+	return err;
+}
+
+static int release(struct inode *i __attribute__((unused)),
+		   struct file *f __attribute__((unused)))
+{
+	target_del_all();
+	return 0;
+}
+
+struct file_operations ctr_fops = {
+	.owner		= THIS_MODULE,
+	.unlocked_ioctl	= ioctl,
+	.compat_ioctl	= ioctl,
+	.release	= release
+};
--- linux-mvl-dove-2.6.32.orig/ubuntu/iscsitarget/digest.h
+++ linux-mvl-dove-2.6.32/ubuntu/iscsitarget/digest.h
@@ -0,0 +1,20 @@
+/*
+ * iSCSI digest handling.
+ * (C) 2004 Xiranet Communications GmbH <arne.redlich@xiranet.com>
+ * This code is licensed under the GPL.
+ */
+
+#ifndef __IET_DIGEST_H__
+#define __IET_DIGEST_H__
+
+extern void digest_alg_available(unsigned int *val);
+extern int digest_init(struct iscsi_conn *conn);
+extern void digest_cleanup(struct iscsi_conn *conn);
+
+extern int digest_rx_header(struct iscsi_cmnd *cmnd);
+extern int digest_rx_data(struct iscsi_cmnd *cmnd);
+
+extern void digest_tx_header(struct iscsi_cmnd *cmnd);
+extern void digest_tx_data(struct iscsi_cmnd *cmnd);
+
+#endif /* __IET_DIGEST_H__ */
--- linux-mvl-dove-2.6.32.orig/ubuntu/iscsitarget/iscsi.h
+++ linux-mvl-dove-2.6.32/ubuntu/iscsitarget/iscsi.h
@@ -0,0 +1,520 @@
+/*
+ * Copyright (C) 2002-2003 Ardis Technolgies <roman@ardistech.com>
+ * Copyright (C) 2008 Arne Redlich <agr@powerkom-dd.de>
+ *
+ * Released under the terms of the GNU GPL v2.0.
+ */
+
+#ifndef __ISCSI_H__
+#define __ISCSI_H__
+
+#include <linux/completion.h>
+#include <linux/pagemap.h>
+#include <linux/seq_file.h>
+#include <linux/mm.h>
+#include <linux/crypto.h>
+#include <linux/scatterlist.h>
+#include <net/sock.h>
+
+#include "iscsi_hdr.h"
+#include "iet_u.h"
+
+#define IET_SENSE_BUF_SIZE      18
+
+struct iscsi_sess_param {
+	int initial_r2t;
+	int immediate_data;
+	int max_connections;
+	int max_recv_data_length;
+	int max_xmit_data_length;
+	int max_burst_length;
+	int first_burst_length;
+	int default_wait_time;
+	int default_retain_time;
+	int max_outstanding_r2t;
+	int data_pdu_inorder;
+	int data_sequence_inorder;
+	int error_recovery_level;
+	int header_digest;
+	int data_digest;
+	int ofmarker;
+	int ifmarker;
+	int ofmarkint;
+	int ifmarkint;
+};
+
+struct iscsi_trgt_param {
+	int wthreads;
+	int target_type;
+	int queued_cmnds;
+	int nop_interval;
+	int nop_timeout;
+};
+
+struct tio {
+	u32 pg_cnt;
+
+	pgoff_t idx;
+	u32 offset;
+	u32 size;
+
+	struct page **pvec;
+
+	atomic_t count;
+};
+
+struct network_thread_info {
+	struct task_struct *task;
+	unsigned long flags;
+	struct list_head active_conns;
+
+	spinlock_t nthread_lock;
+
+	void (*old_state_change)(struct sock *);
+	void (*old_data_ready)(struct sock *, int);
+	void (*old_write_space)(struct sock *);
+};
+
+struct worker_thread_info;
+
+struct worker_thread {
+	struct task_struct *w_task;
+	struct list_head w_list;
+	struct worker_thread_info *w_info;
+};
+
+struct worker_thread_info {
+	spinlock_t wthread_lock;
+
+	u32 nr_running_wthreads;
+
+	struct list_head wthread_list;
+	struct list_head work_queue;
+
+	wait_queue_head_t wthread_sleep;
+};
+
+struct iscsi_cmnd;
+
+struct target_type {
+	int id;
+	int (*execute_cmnd) (struct iscsi_cmnd *);
+};
+
+enum iscsi_device_state {
+	IDEV_RUNNING,
+	IDEV_DEL,
+};
+
+struct iscsi_target {
+	struct list_head t_list;
+	u32 tid;
+
+	char name[ISCSI_NAME_LEN];
+
+	struct iscsi_sess_param sess_param;
+	struct iscsi_trgt_param trgt_param;
+
+	atomic_t nr_volumes;
+	struct list_head volumes;
+	struct list_head session_list;
+
+	/* Prevents races between add/del session and adding UAs */
+	spinlock_t session_list_lock;
+
+	struct network_thread_info nthread_info;
+	/* Points either to own list or global pool */
+	struct worker_thread_info * wthread_info;
+
+	struct semaphore target_sem;
+	struct completion *done;
+};
+
+struct iscsi_queue {
+	spinlock_t queue_lock;
+	struct iscsi_cmnd *ordered_cmnd;
+	struct list_head wait_list;
+	int active_cnt;
+};
+
+struct iet_volume {
+	u32 lun;
+
+	enum iscsi_device_state l_state;
+	atomic_t l_count;
+
+	struct iscsi_target *target;
+	struct list_head list;
+
+	struct iscsi_queue queue;
+
+	u8 scsi_id[SCSI_ID_LEN];
+	u8 scsi_sn[SCSI_SN_LEN];
+
+	u32 blk_shift;
+	u64 blk_cnt;
+
+	u64 reserve_sid;
+	spinlock_t reserve_lock;
+
+	unsigned long flags;
+
+	struct iotype *iotype;
+	void *private;
+};
+
+enum lu_flags {
+	LU_READONLY,
+	LU_WCACHE,
+	LU_RCACHE,
+};
+
+#define LUReadonly(lu) test_bit(LU_READONLY, &(lu)->flags)
+#define SetLUReadonly(lu) set_bit(LU_READONLY, &(lu)->flags)
+
+#define LUWCache(lu) test_bit(LU_WCACHE, &(lu)->flags)
+#define SetLUWCache(lu) set_bit(LU_WCACHE, &(lu)->flags)
+#define ClearLUWCache(lu) clear_bit(LU_WCACHE, &(lu)->flags)
+
+#define LURCache(lu) test_bit(LU_RCACHE, &(lu)->flags)
+#define SetLURCache(lu) set_bit(LU_RCACHE, &(lu)->flags)
+#define ClearLURCache(lu) clear_bit(LU_RCACHE, &(lu)->flags)
+
+#define IET_HASH_ORDER		8
+#define	cmnd_hashfn(itt)	hash_long((itt), IET_HASH_ORDER)
+
+#define UA_HASH_LEN 8
+
+struct iscsi_session {
+	struct list_head list;
+	struct iscsi_target *target;
+	struct completion *done;
+	char *initiator;
+	u64 sid;
+
+	u32 exp_cmd_sn;
+	u32 max_cmd_sn;
+
+	struct iscsi_sess_param param;
+	u32 max_queued_cmnds;
+
+	struct list_head conn_list;
+
+	struct list_head pending_list;
+
+	spinlock_t cmnd_hash_lock;
+	struct list_head cmnd_hash[1 << IET_HASH_ORDER];
+
+	spinlock_t ua_hash_lock;
+	struct list_head ua_hash[UA_HASH_LEN];
+
+	u32 next_ttt;
+};
+
+enum connection_state_bit {
+	CONN_ACTIVE,
+	CONN_CLOSING,
+	CONN_WSPACE_WAIT,
+	CONN_NEED_NOP_IN,
+};
+
+#define ISCSI_CONN_IOV_MAX	(((256 << 10) >> PAGE_SHIFT) + 1)
+
+struct iscsi_conn {
+	struct list_head list;			/* list entry in session list */
+	struct iscsi_session *session;		/* owning session */
+
+	u16 cid;
+	unsigned long state;
+
+	u32 stat_sn;
+	u32 exp_stat_sn;
+
+	int hdigest_type;
+	int ddigest_type;
+
+	struct list_head poll_list;
+
+	struct file *file;
+	struct socket *sock;
+	spinlock_t list_lock;
+	atomic_t nr_cmnds;
+	atomic_t nr_busy_cmnds;
+	struct list_head pdu_list;		/* in/outcoming pdus */
+	struct list_head write_list;		/* list of data pdus to be sent */
+	struct timer_list nop_timer;
+
+	struct iscsi_cmnd *read_cmnd;
+	struct msghdr read_msg;
+	struct iovec read_iov[ISCSI_CONN_IOV_MAX];
+	u32 read_size;
+	u32 read_overflow;
+	int read_state;
+
+	struct iscsi_cmnd *write_cmnd;
+	struct iovec write_iov[ISCSI_CONN_IOV_MAX];
+	struct iovec *write_iop;
+	struct tio *write_tcmnd;
+	u32 write_size;
+	u32 write_offset;
+	int write_state;
+
+	struct hash_desc rx_hash;
+	struct hash_desc tx_hash;
+	struct scatterlist hash_sg[ISCSI_CONN_IOV_MAX];
+};
+
+struct iscsi_pdu {
+	struct iscsi_hdr bhs;
+	void *ahs;
+	unsigned int ahssize;
+	unsigned int datasize;
+};
+
+typedef void (iet_show_info_t)(struct seq_file *seq, struct iscsi_target *target);
+
+struct iscsi_cmnd {
+	struct list_head list;
+	struct list_head conn_list;
+	unsigned long flags;
+	struct iscsi_conn *conn;
+	struct iet_volume *lun;
+
+	struct iscsi_pdu pdu;
+	struct list_head pdu_list;
+
+	struct list_head hash_list;
+
+	struct tio *tio;
+
+	u8 status;
+
+	struct timer_list timer;
+
+	u32 r2t_sn;
+	u32 r2t_length;
+	u32 is_unsolicited_data;
+	u32 target_task_tag;
+	u32 outstanding_r2t;
+
+	u32 hdigest;
+	u32 ddigest;
+
+	struct iscsi_cmnd *req;
+
+	unsigned char sense_buf[IET_SENSE_BUF_SIZE];
+};
+
+struct ua_entry {
+	struct list_head entry;
+	struct iscsi_session *session; /* only used for debugging ATM */
+	u32 lun;
+	u8 asc;
+	u8 ascq;
+};
+
+#define ISCSI_OP_SCSI_REJECT	ISCSI_OP_VENDOR1_CMD
+#define ISCSI_OP_PDU_REJECT	ISCSI_OP_VENDOR2_CMD
+#define ISCSI_OP_DATA_REJECT	ISCSI_OP_VENDOR3_CMD
+#define ISCSI_OP_SCSI_ABORT	ISCSI_OP_VENDOR4_CMD
+
+/* iscsi.c */
+extern unsigned long worker_thread_pool_size;
+extern struct iscsi_cmnd *cmnd_alloc(struct iscsi_conn *, int);
+extern void cmnd_rx_start(struct iscsi_cmnd *);
+extern void cmnd_rx_end(struct iscsi_cmnd *);
+extern void cmnd_tx_start(struct iscsi_cmnd *);
+extern void cmnd_tx_end(struct iscsi_cmnd *);
+extern void cmnd_release(struct iscsi_cmnd *, int);
+extern void send_data_rsp(struct iscsi_cmnd *, void (*)(struct iscsi_cmnd *));
+extern void send_scsi_rsp(struct iscsi_cmnd *, void (*)(struct iscsi_cmnd *));
+extern void iscsi_cmnd_set_sense(struct iscsi_cmnd *, u8 sense_key, u8 asc,
+				 u8 ascq);
+extern void send_nop_in(struct iscsi_conn *);
+
+/* conn.c */
+extern struct iscsi_conn *conn_lookup(struct iscsi_session *, u16);
+extern int conn_add(struct iscsi_session *, struct conn_info *);
+extern int conn_del(struct iscsi_session *, struct conn_info *);
+extern void conn_del_all(struct iscsi_session *);
+extern int conn_free(struct iscsi_conn *);
+extern void conn_close(struct iscsi_conn *);
+extern void conn_info_show(struct seq_file *, struct iscsi_session *);
+
+/* nthread.c */
+extern int nthread_init(struct iscsi_target *);
+extern int nthread_start(struct iscsi_target *);
+extern int nthread_stop(struct iscsi_target *);
+extern void __nthread_wakeup(struct network_thread_info *);
+extern void nthread_wakeup(struct iscsi_target *);
+
+/* wthread.c */
+extern int wthread_init(struct worker_thread_info *info);
+extern int wthread_start(struct worker_thread_info *info, int wthreads, u32 tid);
+extern int wthread_stop(struct worker_thread_info *info);
+extern void wthread_queue(struct iscsi_cmnd *);
+extern struct target_type *target_type_array[];
+extern int wthread_module_init(void);
+extern void wthread_module_exit(void);
+extern struct worker_thread_info *worker_thread_pool;
+
+/* target.c */
+extern int target_lock(struct iscsi_target *, int);
+extern void target_unlock(struct iscsi_target *);
+struct iscsi_target *target_lookup_by_id(u32);
+extern int target_add(struct target_info *);
+extern int target_del(u32 id);
+extern void target_del_all(void);
+extern struct seq_operations iet_seq_op;
+
+/* config.c */
+extern int iet_procfs_init(void);
+extern void iet_procfs_exit(void);
+extern int iet_info_show(struct seq_file *, iet_show_info_t *);
+
+/* session.c */
+extern struct file_operations session_seq_fops;
+extern struct iscsi_session *session_lookup(struct iscsi_target *, u64);
+extern int session_add(struct iscsi_target *, struct session_info *);
+extern int session_del(struct iscsi_target *, u64);
+extern void session_del_all(struct iscsi_target *);
+
+/* volume.c */
+extern struct file_operations volume_seq_fops;
+extern int volume_add(struct iscsi_target *, struct volume_info *);
+extern int iscsi_volume_del(struct iscsi_target *, struct volume_info *);
+extern void iscsi_volume_destroy(struct iet_volume *);
+extern struct iet_volume *volume_lookup(struct iscsi_target *, u32);
+extern struct iet_volume *volume_get(struct iscsi_target *, u32);
+extern void volume_put(struct iet_volume *);
+extern int volume_reserve(struct iet_volume *volume, u64 sid);
+extern int volume_release(struct iet_volume *volume, u64 sid, int force);
+extern int is_volume_reserved(struct iet_volume *volume, u64 sid);
+
+/* tio.c */
+extern int tio_init(void);
+extern void tio_exit(void);
+extern struct tio *tio_alloc(int);
+extern void tio_get(struct tio *);
+extern void tio_put(struct tio *);
+extern void tio_set(struct tio *, u32, loff_t);
+extern int tio_read(struct iet_volume *, struct tio *);
+extern int tio_write(struct iet_volume *, struct tio *);
+extern int tio_sync(struct iet_volume *, struct tio *);
+
+/* iotype.c */
+extern struct iotype *get_iotype(const char *name);
+extern void put_iotype(struct iotype *iot);
+
+/* params.c */
+extern int iscsi_param_set(struct iscsi_target *, struct iscsi_param_info *, int);
+
+/* target_disk.c */
+extern struct target_type disk_ops;
+
+/* event.c */
+extern int event_send(u32, u64, u32, u32, int);
+extern int event_init(void);
+extern void event_exit(void);
+
+/* ua.c */
+int ua_init(void);
+void ua_exit(void);
+struct ua_entry * ua_get_first(struct iscsi_session *, u32 lun);
+struct ua_entry * ua_get_match(struct iscsi_session *, u32 lun, u8 asc,
+			       u8 ascq);
+void ua_free(struct ua_entry *);
+int ua_pending(struct iscsi_session *, u32 lun);
+void ua_establish_for_session(struct iscsi_session *, u32 lun, u8 asc,
+			     u8 ascq);
+void ua_establish_for_other_sessions(struct iscsi_session *, u32 lun, u8 asc,
+				     u8 ascq);
+void ua_establish_for_all_sessions(struct iscsi_target *, u32 lun, u8 asc,
+				   u8 ascq);
+
+#define get_pgcnt(size, offset)	((((size) + ((offset) & ~PAGE_CACHE_MASK)) + PAGE_CACHE_SIZE - 1) >> PAGE_CACHE_SHIFT)
+
+static inline void iscsi_cmnd_get_length(struct iscsi_pdu *pdu)
+{
+#if defined(__BIG_ENDIAN)
+	pdu->ahssize = pdu->bhs.length.ahslength * 4;
+	pdu->datasize = pdu->bhs.length.datalength;
+#elif defined(__LITTLE_ENDIAN)
+	pdu->ahssize = (pdu->bhs.length & 0xff) * 4;
+	pdu->datasize = be32_to_cpu(pdu->bhs.length & ~0xff);
+#else
+#error
+#endif
+}
+
+static inline void iscsi_cmnd_set_length(struct iscsi_pdu *pdu)
+{
+#if defined(__BIG_ENDIAN)
+	pdu->bhs.length.ahslength = pdu->ahssize / 4;
+	pdu->bhs.length.datalength = pdu->datasize;
+#elif defined(__LITTLE_ENDIAN)
+	pdu->bhs.length = cpu_to_be32(pdu->datasize) | (pdu->ahssize / 4);
+#else
+#error
+#endif
+}
+
+#define cmnd_hdr(cmnd) ((struct iscsi_scsi_cmd_hdr *) (&((cmnd)->pdu.bhs)))
+#define cmnd_ttt(cmnd) cpu_to_be32((cmnd)->pdu.bhs.ttt)
+#define cmnd_itt(cmnd) cpu_to_be32((cmnd)->pdu.bhs.itt)
+#define cmnd_opcode(cmnd) ((cmnd)->pdu.bhs.opcode & ISCSI_OPCODE_MASK)
+#define cmnd_scsicode(cmnd) cmnd_hdr(cmnd)->scb[0]
+
+#define	SECTOR_SIZE_BITS	9
+
+enum cmnd_flags {
+	CMND_hashed,
+	CMND_queued,
+	CMND_final,
+	CMND_waitio,
+	CMND_close,
+	CMND_lunit,
+	CMND_pending,
+	CMND_tmfabort,
+	CMND_rxstart,
+	CMND_timer_active,
+};
+
+#define set_cmnd_hashed(cmnd)	set_bit(CMND_hashed, &(cmnd)->flags)
+#define cmnd_hashed(cmnd)	test_bit(CMND_hashed, &(cmnd)->flags)
+
+#define set_cmnd_queued(cmnd)	set_bit(CMND_queued, &(cmnd)->flags)
+#define cmnd_queued(cmnd)	test_bit(CMND_queued, &(cmnd)->flags)
+
+#define set_cmnd_final(cmnd)	set_bit(CMND_final, &(cmnd)->flags)
+#define cmnd_final(cmnd)	test_bit(CMND_final, &(cmnd)->flags)
+
+#define set_cmnd_waitio(cmnd)	set_bit(CMND_waitio, &(cmnd)->flags)
+#define cmnd_waitio(cmnd)	test_bit(CMND_waitio, &(cmnd)->flags)
+
+#define set_cmnd_close(cmnd)	set_bit(CMND_close, &(cmnd)->flags)
+#define cmnd_close(cmnd)	test_bit(CMND_close, &(cmnd)->flags)
+
+#define set_cmnd_lunit(cmnd)	set_bit(CMND_lunit, &(cmnd)->flags)
+#define cmnd_lunit(cmnd)	test_bit(CMND_lunit, &(cmnd)->flags)
+
+#define set_cmnd_pending(cmnd)	set_bit(CMND_pending, &(cmnd)->flags)
+#define clear_cmnd_pending(cmnd)	clear_bit(CMND_pending, &(cmnd)->flags)
+#define cmnd_pending(cmnd)	test_bit(CMND_pending, &(cmnd)->flags)
+
+#define set_cmnd_tmfabort(cmnd)	set_bit(CMND_tmfabort, &(cmnd)->flags)
+#define cmnd_tmfabort(cmnd)	test_bit(CMND_tmfabort, &(cmnd)->flags)
+
+#define set_cmnd_rxstart(cmnd)	set_bit(CMND_rxstart, &(cmnd)->flags)
+#define cmnd_rxstart(cmnd)	test_bit(CMND_rxstart, &(cmnd)->flags)
+
+#define set_cmnd_timer_active(cmnd)  set_bit(CMND_timer_active, &(cmnd)->flags)
+#define clear_cmnd_timer_active(cmnd) \
+	                        clear_bit(CMND_timer_active, &(cmnd)->flags)
+#define cmnd_timer_active(cmnd) test_bit(CMND_timer_active, &(cmnd)->flags)
+
+#define VENDOR_ID	"IET"
+#define PRODUCT_ID	"VIRTUAL-DISK"
+#define PRODUCT_REV	"0"
+
+#endif	/* __ISCSI_H__ */
--- linux-mvl-dove-2.6.32.orig/ubuntu/iscsitarget/target.c
+++ linux-mvl-dove-2.6.32/ubuntu/iscsitarget/target.c
@@ -0,0 +1,357 @@
+/*
+ * Copyright (C) 2002-2003 Ardis Technolgies <roman@ardistech.com>
+ *
+ * Released under the terms of the GNU GPL v2.0.
+ */
+
+#include "iscsi.h"
+#include "digest.h"
+#include "iscsi_dbg.h"
+
+#define	MAX_NR_TARGETS	(1UL << 30)
+
+static LIST_HEAD(target_list);
+static DECLARE_MUTEX(target_list_sem);
+static u32 next_target_id;
+static u32 nr_targets;
+
+static struct iscsi_sess_param default_session_param = {
+	.initial_r2t = 1,
+	.immediate_data = 1,
+	.max_connections = 1,
+	.max_recv_data_length = 8192,
+	.max_xmit_data_length = 8192,
+	.max_burst_length = 262144,
+	.first_burst_length = 65536,
+	.default_wait_time = 2,
+	.default_retain_time = 20,
+	.max_outstanding_r2t = 1,
+	.data_pdu_inorder = 1,
+	.data_sequence_inorder = 1,
+	.error_recovery_level = 0,
+	.header_digest = DIGEST_NONE,
+	.data_digest = DIGEST_NONE,
+	.ofmarker = 0,
+	.ifmarker = 0,
+	.ofmarkint = 2048,
+	.ifmarkint = 2048,
+};
+
+static struct iscsi_trgt_param default_target_param = {
+	.wthreads = DEFAULT_NR_WTHREADS,
+	.target_type = 0,
+	.queued_cmnds = DEFAULT_NR_QUEUED_CMNDS,
+};
+
+inline int target_lock(struct iscsi_target *target, int interruptible)
+{
+	int err = 0;
+
+	if (interruptible)
+		err = down_interruptible(&target->target_sem);
+	else
+		down(&target->target_sem);
+
+	return err;
+}
+
+inline void target_unlock(struct iscsi_target *target)
+{
+	up(&target->target_sem);
+}
+
+static struct iscsi_target *__target_lookup_by_id(u32 id)
+{
+	struct iscsi_target *target;
+
+	list_for_each_entry(target, &target_list, t_list) {
+		if (target->tid == id)
+			return target;
+	}
+	return NULL;
+}
+
+static struct iscsi_target *__target_lookup_by_name(char *name)
+{
+	struct iscsi_target *target;
+
+	list_for_each_entry(target, &target_list, t_list) {
+		if (!strcmp(target->name, name))
+			return target;
+	}
+	return NULL;
+}
+
+struct iscsi_target *target_lookup_by_id(u32 id)
+{
+	struct iscsi_target *target;
+
+	down(&target_list_sem);
+	target = __target_lookup_by_id(id);
+	up(&target_list_sem);
+
+	return target;
+}
+
+static int target_thread_start(struct iscsi_target *target)
+{
+	int err;
+
+	if ((err = nthread_start(target)) < 0)
+		return err;
+
+	if (!worker_thread_pool) {
+		err = wthread_start(target->wthread_info,
+				    target->trgt_param.wthreads, target->tid);
+		if (err)
+			nthread_stop(target);
+	}
+
+	return err;
+}
+
+static void target_thread_stop(struct iscsi_target *target)
+{
+	if (!worker_thread_pool)
+		wthread_stop(target->wthread_info);
+
+	nthread_stop(target);
+}
+
+static int iscsi_target_create(struct target_info *info, u32 tid)
+{
+	int err = -EINVAL, len;
+	char *name = info->name;
+	struct iscsi_target *target;
+
+	dprintk(D_SETUP, "%u %s\n", tid, name);
+
+	if (!(len = strlen(name))) {
+		eprintk("The length of the target name is zero %u\n", tid);
+		return err;
+	}
+
+	if (!try_module_get(THIS_MODULE)) {
+		eprintk("Fail to get module %u\n", tid);
+		return err;
+	}
+
+	target = kzalloc(sizeof(*target), GFP_KERNEL);
+	if (!target) {
+		err = -ENOMEM;
+		goto out;
+	}
+
+	if (!worker_thread_pool) {
+		target->wthread_info = kmalloc(sizeof(struct worker_thread_info), GFP_KERNEL);
+		if (!target->wthread_info) {
+			err = -ENOMEM;
+			goto out;
+		}
+	}
+
+	target->tid = info->tid = tid;
+
+	memcpy(&target->sess_param, &default_session_param, sizeof(default_session_param));
+	memcpy(&target->trgt_param, &default_target_param, sizeof(default_target_param));
+
+	strncpy(target->name, name, sizeof(target->name) - 1);
+
+	init_MUTEX(&target->target_sem);
+	spin_lock_init(&target->session_list_lock);
+
+	INIT_LIST_HEAD(&target->session_list);
+	INIT_LIST_HEAD(&target->volumes);
+
+	atomic_set(&target->nr_volumes, 0);
+
+	nthread_init(target);
+
+	if (!worker_thread_pool)
+		wthread_init(target->wthread_info);
+	else
+		target->wthread_info = worker_thread_pool;
+
+
+	if ((err = target_thread_start(target)) < 0) {
+		target_thread_stop(target);
+		goto out;
+	}
+
+	list_add(&target->t_list, &target_list);
+
+	return 0;
+out:
+	if (!worker_thread_pool)
+		kfree(target->wthread_info);
+	kfree(target);
+	module_put(THIS_MODULE);
+
+	return err;
+}
+
+int target_add(struct target_info *info)
+{
+	int err = -EEXIST;
+	u32 tid = info->tid;
+
+	down(&target_list_sem);
+
+	if (nr_targets > MAX_NR_TARGETS) {
+		err = -EBUSY;
+		goto out;
+	}
+
+	if (__target_lookup_by_name(info->name))
+		goto out;
+
+	if (tid && __target_lookup_by_id(tid))
+		goto out;
+
+	if (!tid) {
+		do {
+			if (!++next_target_id)
+				++next_target_id;
+		} while (__target_lookup_by_id(next_target_id));
+
+		tid = next_target_id;
+	}
+
+	if (!(err = iscsi_target_create(info, tid)))
+		nr_targets++;
+out:
+	up(&target_list_sem);
+
+	return err;
+}
+
+static void target_destroy(struct iscsi_target *target)
+{
+	dprintk(D_SETUP, "%u\n", target->tid);
+
+	target_thread_stop(target);
+
+	while (!list_empty(&target->volumes)) {
+		struct iet_volume *volume;
+		volume = list_entry(target->volumes.next, struct iet_volume, list);
+		volume->l_state = IDEV_DEL;
+		iscsi_volume_destroy(volume);
+	}
+
+	if (!worker_thread_pool)
+		kfree(target->wthread_info);
+	kfree(target);
+
+	module_put(THIS_MODULE);
+}
+
+/* @locking: target_list_sem must be locked */
+int __target_del(struct iscsi_target *target)
+{
+	target_lock(target, 0);
+
+	if (!list_empty(&target->session_list)) {
+		target_unlock(target);
+		return -EBUSY;
+	}
+
+	list_del(&target->t_list);
+	nr_targets--;
+
+	target_unlock(target);
+	target_destroy(target);
+	return 0;
+}
+
+int target_del(u32 id)
+{
+	struct iscsi_target *target;
+	int err = down_interruptible(&target_list_sem);
+	if (err < 0)
+		return err;
+
+	target = __target_lookup_by_id(id);
+	if (!target) {
+		err = -ENOENT;
+		goto out;
+	}
+
+	err = __target_del(target);
+ out:
+	up(&target_list_sem);
+	return err;
+}
+
+void target_del_all(void)
+{
+	DECLARE_COMPLETION_ONSTACK(done);
+	struct iscsi_target *target, *tmp;
+
+	down(&target_list_sem);
+
+	if (!list_empty(&target_list))
+		iprintk("Removing all connections, sessions and targets\n");
+
+	list_for_each_entry_safe(target, tmp, &target_list, t_list) {
+		init_completion(&done);
+		target->done = &done;
+		session_del_all(target);
+		wait_for_completion(&done);
+		__target_del(target);
+	}
+
+	next_target_id = 0;
+
+	up(&target_list_sem);
+}
+
+static void *iet_seq_start(struct seq_file *m, loff_t *pos)
+{
+	int err;
+
+	/* are you sure this is to be interruptible? */
+	err = down_interruptible(&target_list_sem);
+	if (err < 0)
+		return ERR_PTR(err);
+
+	return seq_list_start(&target_list, *pos);
+}
+
+static void *iet_seq_next(struct seq_file *m, void *v, loff_t *pos)
+{
+	return seq_list_next(v, &target_list, pos);
+}
+
+static void iet_seq_stop(struct seq_file *m, void *v)
+{
+	up(&target_list_sem);
+}
+
+static int iet_seq_show(struct seq_file *m, void *p)
+{
+	iet_show_info_t *func = (iet_show_info_t *)m->private;
+	struct iscsi_target *target =
+		list_entry(p, struct iscsi_target, t_list);
+	int err;
+
+	/* relly, interruptible?  I'd think target_lock(target, 0)
+	 * would be more appropriate. --lge */
+	err = target_lock(target, 1);
+	if (err < 0)
+		return err;
+
+	seq_printf(m, "tid:%u name:%s\n", target->tid, target->name);
+
+	func(m, target);
+
+	target_unlock(target);
+
+	return 0;
+}
+
+struct seq_operations iet_seq_op = {
+	.start = iet_seq_start,
+	.next = iet_seq_next,
+	.stop = iet_seq_stop,
+	.show = iet_seq_show,
+};
--- linux-mvl-dove-2.6.32.orig/ubuntu/iscsitarget/Makefile
+++ linux-mvl-dove-2.6.32/ubuntu/iscsitarget/Makefile
@@ -0,0 +1,17 @@
+#
+# Makefile for the Linux kernel device drivers.
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (not a .c file).
+#
+# Note 2! The CFLAGS definitions are now in the main makefile.
+
+EXTRA_CFLAGS += -I$(src)/include 
+
+obj-m		+= iscsi_trgt.o
+iscsi_trgt-objs	:= tio.o iscsi.o nthread.o wthread.o config.o digest.o \
+			conn.o session.o target.o volume.o iotype.o \
+			file-io.o null-io.o target_disk.o event.o param.o \
+			block-io.o ua.o
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/iscsitarget/file-io.c
+++ linux-mvl-dove-2.6.32/ubuntu/iscsitarget/file-io.c
@@ -0,0 +1,324 @@
+/*
+ * Target device file I/O.
+ * (C) 2004 - 2005 FUJITA Tomonori <tomof@acm.org>
+ * This code is licenced under the GPL.
+ */
+
+#include <linux/types.h>
+#include <linux/blkdev.h>
+#include <linux/parser.h>
+#include <linux/writeback.h>
+
+#include "iscsi.h"
+#include "iscsi_dbg.h"
+#include "iotype.h"
+
+struct fileio_data {
+	char *path;
+	struct file *filp;
+};
+
+static int fileio_make_request(struct iet_volume *lu, struct tio *tio, int rw)
+{
+	struct fileio_data *p = lu->private;
+	struct file *filp;
+	mm_segment_t oldfs;
+	struct page *page;
+	u32 offset, size;
+	loff_t ppos, count;
+	char *buf;
+	int i, err = 0;
+	ssize_t ret;
+
+	assert(p);
+	filp = p->filp;
+	size = tio->size;
+	offset= tio->offset;
+
+	ppos = (loff_t) tio->idx << PAGE_CACHE_SHIFT;
+	ppos += offset;
+
+	for (i = 0; i < tio->pg_cnt; i++) {
+		page = tio->pvec[i];
+		assert(page);
+		buf = page_address(page);
+		buf += offset;
+
+		if (offset + size > PAGE_CACHE_SIZE)
+			count = PAGE_CACHE_SIZE - offset;
+		else
+			count = size;
+
+		oldfs = get_fs();
+		set_fs(get_ds());
+
+		if (rw == READ)
+			ret = do_sync_read(filp, buf, count, &ppos);
+		else
+			ret = do_sync_write(filp, buf, count, &ppos);
+
+		set_fs(oldfs);
+
+		if (ret != count) {
+			eprintk("I/O error %lld, %ld\n", count, (long) ret);
+			err = -EIO;
+		}
+
+		size -= count;
+		offset = 0;
+	}
+	assert(!size);
+
+	return err;
+}
+
+static int fileio_sync(struct iet_volume *lu, struct tio *tio)
+{
+	struct fileio_data *p = lu->private;
+	struct inode *inode = p->filp->f_dentry->d_inode;
+	struct address_space *mapping = inode->i_mapping;
+	loff_t ppos, count;
+	int res;
+
+	if (tio) {
+		ppos = (loff_t) tio->idx << PAGE_CACHE_SHIFT;
+		count = tio->size;
+	} else {
+		ppos = 0;
+		count = lu->blk_cnt << lu->blk_shift;
+	}
+
+	res = filemap_write_and_wait_range(mapping, ppos, ppos + count - 1);
+	if (res) {
+		eprintk("I/O error: syncing pages failed: %d\n", res);
+		return -EIO;
+	} else
+		return 0;
+}
+
+static int open_path(struct iet_volume *volume, const char *path)
+{
+	int err = 0;
+	struct fileio_data *info = volume->private;
+	struct file *filp;
+	mm_segment_t oldfs;
+	int flags;
+
+	info->path = kstrdup(path, GFP_KERNEL);
+	if (!info->path)
+		return -ENOMEM;
+
+	oldfs = get_fs();
+	set_fs(get_ds());
+	flags = (LUReadonly(volume) ? O_RDONLY : O_RDWR) | O_LARGEFILE;
+	filp = filp_open(path, flags, 0);
+	set_fs(oldfs);
+
+	if (IS_ERR(filp)) {
+		err = PTR_ERR(filp);
+		eprintk("Can't open %s %d\n", path, err);
+		info->filp = NULL;
+	} else
+		info->filp = filp;
+
+	return err;
+}
+
+static int set_scsiid(struct iet_volume *volume, const char *id)
+{
+	size_t len;
+
+	if ((len = strlen(id)) > SCSI_ID_LEN - VENDOR_ID_LEN) {
+		eprintk("SCSI ID too long, %zd provided, %u max\n", len,
+			SCSI_ID_LEN - VENDOR_ID_LEN);
+		return -EINVAL;
+	}
+
+	memcpy(volume->scsi_id + VENDOR_ID_LEN, id, len);
+
+	return 0;
+}
+
+static void gen_scsiid(struct iet_volume *volume, struct inode *inode)
+{
+	int i;
+	u32 *p;
+
+	strlcpy(volume->scsi_id, VENDOR_ID, VENDOR_ID_LEN);
+
+	for (i = VENDOR_ID_LEN; i < SCSI_ID_LEN; i++)
+		if (volume->scsi_id[i])
+			return;
+
+	p = (u32 *) (volume->scsi_id + VENDOR_ID_LEN);
+	*(p + 0) = volume->target->trgt_param.target_type;
+	*(p + 1) = volume->target->tid;
+	*(p + 2) = (unsigned int) inode->i_ino;
+	*(p + 3) = (unsigned int) inode->i_sb->s_dev;
+}
+
+static int set_scsisn(struct iet_volume *volume, const char *sn)
+{
+	size_t len;
+
+	if ((len = strlen(sn)) > SCSI_SN_LEN) {
+		eprintk("SCSI SN too long, %zd provided, %u max\n", len,
+			SCSI_SN_LEN);
+		return -EINVAL;
+	}
+	memcpy(volume->scsi_sn, sn, len);
+	return 0;
+}
+
+enum {
+	Opt_scsiid, Opt_scsisn, Opt_path, Opt_ignore, Opt_err,
+};
+
+static match_table_t tokens = {
+	{Opt_scsiid, "ScsiId=%s"},
+	{Opt_scsisn, "ScsiSN=%s"},
+	{Opt_path, "Path=%s"},
+	{Opt_ignore, "Type=%s"},
+	{Opt_ignore, "IOMode=%s"},
+	{Opt_err, NULL},
+};
+
+static int parse_fileio_params(struct iet_volume *volume, char *params)
+{
+	struct fileio_data *info = volume->private;
+	int err = 0;
+	char *p, *q;
+
+	while ((p = strsep(&params, ",")) != NULL) {
+		substring_t args[MAX_OPT_ARGS];
+		int token;
+		if (!*p)
+			continue;
+		token = match_token(p, tokens, args);
+		switch (token) {
+		case Opt_scsiid:
+			if (!(q = match_strdup(&args[0]))) {
+				err = -ENOMEM;
+				goto out;
+			}
+			err = set_scsiid(volume, q);
+			kfree(q);
+			if (err < 0)
+				goto out;
+			break;
+		case Opt_scsisn:
+			if (!(q = match_strdup(&args[0]))) {
+				err = -ENOMEM;
+				goto out;
+			}
+			err = set_scsisn(volume, q);
+			kfree(q);
+			if (err < 0)
+				goto out;
+			break;
+		case Opt_path:
+			if (info->path) {
+				iprintk("Target %s, LUN %u: "
+					"duplicate \"Path\" param\n",
+					volume->target->name, volume->lun);
+				err = -EINVAL;
+				goto out;
+			}
+			if (!(q = match_strdup(&args[0]))) {
+				err = -ENOMEM;
+				goto out;
+			}
+			err = open_path(volume, q);
+			kfree(q);
+			if (err < 0)
+				goto out;
+			break;
+		case Opt_ignore:
+			break;
+		default:
+			iprintk("Target %s, LUN %u: unknown param %s\n",
+				volume->target->name, volume->lun, p);
+			return -EINVAL;
+		}
+	}
+
+	if (!info->path) {
+		iprintk("Target %s, LUN %u: missing \"Path\" param\n",
+			volume->target->name, volume->lun);
+		err = -EINVAL;
+	}
+out:
+	return err;
+}
+
+static void fileio_detach(struct iet_volume *lu)
+{
+	struct fileio_data *p = lu->private;
+
+	kfree(p->path);
+	if (p->filp)
+		filp_close(p->filp, NULL);
+	kfree(p);
+	lu->private = NULL;
+}
+
+static int fileio_attach(struct iet_volume *lu, char *args)
+{
+	int err = 0;
+	struct fileio_data *p;
+	struct inode *inode;
+
+	if (lu->private) {
+		printk("already attached ? %d\n", lu->lun);
+		return -EBUSY;
+	}
+
+	p = kzalloc(sizeof(*p), GFP_KERNEL);
+	if (!p)
+		return -ENOMEM;
+
+	lu->private = p;
+
+	if ((err = parse_fileio_params(lu, args)) < 0) {
+		eprintk("%d\n", err);
+		goto out;
+	}
+	inode = p->filp->f_dentry->d_inode;
+
+	gen_scsiid(lu, inode);
+
+	if (S_ISREG(inode->i_mode))
+		;
+	else if (S_ISBLK(inode->i_mode))
+		inode = inode->i_bdev->bd_inode;
+	else {
+		err = -EINVAL;
+		goto out;
+	}
+
+	lu->blk_shift = SECTOR_SIZE_BITS;
+	lu->blk_cnt = inode->i_size >> lu->blk_shift;
+
+	/* we're using the page cache */
+	SetLURCache(lu);
+out:
+	if (err < 0)
+		fileio_detach(lu);
+	return err;
+}
+
+static void fileio_show(struct iet_volume *lu, struct seq_file *seq)
+{
+	struct fileio_data *p = lu->private;
+	seq_printf(seq, " path:%s\n", p->path);
+}
+
+struct iotype fileio =
+{
+	.name = "fileio",
+	.attach = fileio_attach,
+	.make_request = fileio_make_request,
+	.sync = fileio_sync,
+	.detach = fileio_detach,
+	.show = fileio_show,
+};
--- linux-mvl-dove-2.6.32.orig/ubuntu/iscsitarget/iscsi_hdr.h
+++ linux-mvl-dove-2.6.32/ubuntu/iscsitarget/iscsi_hdr.h
@@ -0,0 +1,509 @@
+/*
+ * Copyright (C) 2002-2003 Ardis Technolgies <roman@ardistech.com>
+ *
+ * Released under the terms of the GNU GPL v2.0.
+ */
+
+#ifndef __ISCSI_HDR_H__
+#define __ISCSI_HDR_H__
+
+#include <linux/types.h>
+#include <asm/byteorder.h>
+
+#define ISCSI_VERSION			0
+
+#ifndef __packed
+#define __packed __attribute__ ((packed))
+#endif
+
+struct iscsi_hdr {
+	u8  opcode;			/* 0 */
+	u8  flags;
+	u8  spec1[2];
+#if defined(__BIG_ENDIAN_BITFIELD)
+	struct {			/* 4 */
+		unsigned ahslength : 8;
+		unsigned datalength : 24;
+	} length;
+#elif defined(__LITTLE_ENDIAN_BITFIELD)
+	u32 length;			/* 4 */
+#endif
+	u16 lun[4];			/* 8 */
+	u32 itt;			/* 16 */
+	u32 ttt;			/* 20 */
+	u32 sn;				/* 24 */
+	u32 exp_sn;			/* 28 */
+	u32 max_sn;			/* 32 */
+	u32 spec3[3];			/* 36 */
+} __packed;				/* 48 */
+
+/* Opcode encoding bits */
+#define ISCSI_OP_RETRY			0x80
+#define ISCSI_OP_IMMEDIATE		0x40
+#define ISCSI_OPCODE_MASK		0x3F
+
+/* Client to Server Message Opcode values */
+#define ISCSI_OP_NOP_OUT		0x00
+#define ISCSI_OP_SCSI_CMD		0x01
+#define ISCSI_OP_SCSI_TASK_MGT_MSG	0x02
+#define ISCSI_OP_LOGIN_CMD		0x03
+#define ISCSI_OP_TEXT_CMD		0x04
+#define ISCSI_OP_SCSI_DATA_OUT		0x05
+#define ISCSI_OP_LOGOUT_CMD		0x06
+#define ISCSI_OP_SNACK_CMD		0x10
+
+#define ISCSI_OP_VENDOR1_CMD		0x1c
+#define ISCSI_OP_VENDOR2_CMD		0x1d
+#define ISCSI_OP_VENDOR3_CMD		0x1e
+#define ISCSI_OP_VENDOR4_CMD		0x1f
+
+/* Server to Client Message Opcode values */
+#define ISCSI_OP_NOP_IN 		0x20
+#define ISCSI_OP_SCSI_RSP		0x21
+#define ISCSI_OP_SCSI_TASK_MGT_RSP	0x22
+#define ISCSI_OP_LOGIN_RSP		0x23
+#define ISCSI_OP_TEXT_RSP		0x24
+#define ISCSI_OP_SCSI_DATA_IN		0x25
+#define ISCSI_OP_LOGOUT_RSP		0x26
+#define ISCSI_OP_R2T			0x31
+#define ISCSI_OP_ASYNC_MSG		0x32
+#define ISCSI_OP_REJECT			0x3f
+
+struct iscsi_ahs_hdr {
+	u16 ahslength;
+	u8 ahstype;
+} __packed;
+
+#define ISCSI_AHSTYPE_CDB		1
+#define ISCSI_AHSTYPE_RLENGTH		2
+
+union iscsi_sid {
+	struct {
+		u8 isid[6];		/* Initiator Session ID */
+		u16 tsih;		/* Target Session ID */
+	} id;
+	u64 id64;
+} __packed;
+
+struct iscsi_scsi_cmd_hdr {
+	u8  opcode;
+	u8  flags;
+	u16 rsvd1;
+	u8  ahslength;
+	u8  datalength[3];
+	u16 lun[4];
+	u32 itt;
+	u32 data_length;
+	u32 cmd_sn;
+	u32 exp_stat_sn;
+	u8  scb[16];
+} __packed;
+
+#define ISCSI_CMD_FINAL		0x80
+#define ISCSI_CMD_READ		0x40
+#define ISCSI_CMD_WRITE		0x20
+#define ISCSI_CMD_ATTR_MASK	0x07
+#define ISCSI_CMD_UNTAGGED	0x00
+#define ISCSI_CMD_SIMPLE	0x01
+#define ISCSI_CMD_ORDERED	0x02
+#define ISCSI_CMD_HEAD_OF_QUEUE	0x03
+#define ISCSI_CMD_ACA		0x04
+
+struct iscsi_cdb_ahdr {
+	u16 ahslength;
+	u8  ahstype;
+	u8  reserved;
+	u8  cdb[0];
+} __packed;
+
+struct iscsi_rlength_ahdr {
+	u16 ahslength;
+	u8  ahstype;
+	u8  reserved;
+	u32 read_length;
+} __packed;
+
+struct iscsi_scsi_rsp_hdr {
+	u8  opcode;
+	u8  flags;
+	u8  response;
+	u8  cmd_status;
+	u8  ahslength;
+	u8  datalength[3];
+	u32 rsvd1[2];
+	u32 itt;
+	u32 snack;
+	u32 stat_sn;
+	u32 exp_cmd_sn;
+	u32 max_cmd_sn;
+	u32 exp_data_sn;
+	u32 bi_residual_count;
+	u32 residual_count;
+} __packed;
+
+#define ISCSI_FLG_RESIDUAL_UNDERFLOW		0x02
+#define ISCSI_FLG_RESIDUAL_OVERFLOW		0x04
+#define ISCSI_FLG_BIRESIDUAL_UNDERFLOW		0x08
+#define ISCSI_FLG_BIRESIDUAL_OVERFLOW		0x10
+
+#define ISCSI_RESPONSE_COMMAND_COMPLETED	0x00
+#define ISCSI_RESPONSE_TARGET_FAILURE		0x01
+
+struct iscsi_sense_data {
+	u16 length;
+	u8  data[0];
+} __packed;
+
+struct iscsi_task_mgt_hdr {
+	u8  opcode;
+	u8  function;
+	u16 rsvd1;
+	u8  ahslength;
+	u8  datalength[3];
+	u16 lun[4];
+	u32 itt;
+	u32 rtt;
+	u32 cmd_sn;
+	u32 exp_stat_sn;
+	u32 ref_cmd_sn;
+	u32 exp_data_sn;
+	u32 rsvd2[2];
+} __packed;
+
+#define ISCSI_FUNCTION_MASK			0x7f
+
+#define ISCSI_FUNCTION_ABORT_TASK		1
+#define ISCSI_FUNCTION_ABORT_TASK_SET		2
+#define ISCSI_FUNCTION_CLEAR_ACA		3
+#define ISCSI_FUNCTION_CLEAR_TASK_SET		4
+#define ISCSI_FUNCTION_LOGICAL_UNIT_RESET	5
+#define ISCSI_FUNCTION_TARGET_WARM_RESET	6
+#define ISCSI_FUNCTION_TARGET_COLD_RESET	7
+#define ISCSI_FUNCTION_TASK_REASSIGN		8
+
+struct iscsi_task_rsp_hdr {
+	u8  opcode;
+	u8  flags;
+	u8  response;
+	u8  rsvd1;
+	u8  ahslength;
+	u8  datalength[3];
+	u32 rsvd2[2];
+	u32 itt;
+	u32 rsvd3;
+	u32 stat_sn;
+	u32 exp_cmd_sn;
+	u32 max_cmd_sn;
+	u32 rsvd4[3];
+} __packed;
+
+#define ISCSI_RESPONSE_FUNCTION_COMPLETE	0
+#define ISCSI_RESPONSE_UNKNOWN_TASK		1
+#define ISCSI_RESPONSE_UNKNOWN_LUN		2
+#define ISCSI_RESPONSE_TASK_ALLEGIANT		3
+#define ISCSI_RESPONSE_FAILOVER_UNSUPPORTED	4
+#define ISCSI_RESPONSE_FUNCTION_UNSUPPORTED	5
+#define ISCSI_RESPONSE_NO_AUTHORIZATION		6
+#define ISCSI_RESPONSE_FUNCTION_REJECTED	255
+
+struct iscsi_data_out_hdr {
+	u8  opcode;
+	u8  flags;
+	u16 rsvd1;
+	u8  ahslength;
+	u8  datalength[3];
+	u16 lun[4];
+	u32 itt;
+	u32 ttt;
+	u32 rsvd2;
+	u32 exp_stat_sn;
+	u32 rsvd3;
+	u32 data_sn;
+	u32 buffer_offset;
+	u32 rsvd4;
+} __packed;
+
+struct iscsi_data_in_hdr {
+	u8  opcode;
+	u8  flags;
+	u8  rsvd1;
+	u8  cmd_status;
+	u8  ahslength;
+	u8  datalength[3];
+	u32 rsvd2[2];
+	u32 itt;
+	u32 ttt;
+	u32 stat_sn;
+	u32 exp_cmd_sn;
+	u32 max_cmd_sn;
+	u32 data_sn;
+	u32 buffer_offset;
+	u32 residual_count;
+} __packed;
+
+#define ISCSI_FLG_STATUS		0x01
+
+struct iscsi_r2t_hdr {
+	u8  opcode;
+	u8  flags;
+	u16 rsvd1;
+	u8  ahslength;
+	u8  datalength[3];
+	u16 lun[4];
+	u32 itt;
+	u32 ttt;
+	u32 stat_sn;
+	u32 exp_cmd_sn;
+	u32 max_cmd_sn;
+	u32 r2t_sn;
+	u32 buffer_offset;
+	u32 data_length;
+} __packed;
+
+struct iscsi_async_msg_hdr {
+	u8  opcode;
+	u8  flags;
+	u16 rsvd1;
+	u8  ahslength;
+	u8  datalength[3];
+	u16 lun[4];
+	u32 ffffffff;
+	u32 rsvd2;
+	u32 stat_sn;
+	u32 exp_cmd_sn;
+	u32 max_cmd_sn;
+	u8  async_event;
+	u8  async_vcode;
+	u16 param1;
+	u16 param2;
+	u16 param3;
+	u32 rsvd3;
+} __packed;
+
+#define ISCSI_ASYNC_SCSI		0
+#define ISCSI_ASYNC_LOGOUT		1
+#define ISCSI_ASYNC_DROP_CONNECTION	2
+#define ISCSI_ASYNC_DROP_SESSION	3
+#define ISCSI_ASYNC_PARAM_REQUEST	4
+#define ISCSI_ASYNC_VENDOR		255
+
+struct iscsi_text_req_hdr {
+	u8  opcode;
+	u8  flags;
+	u16 rsvd1;
+	u8  ahslength;
+	u8  datalength[3];
+	u32 rsvd2[2];
+	u32 itt;
+	u32 ttt;
+	u32 cmd_sn;
+	u32 exp_stat_sn;
+	u32 rsvd3[4];
+} __packed;
+
+struct iscsi_text_rsp_hdr {
+	u8  opcode;
+	u8  flags;
+	u16 rsvd1;
+	u8  ahslength;
+	u8  datalength[3];
+	u32 rsvd2[2];
+	u32 itt;
+	u32 ttt;
+	u32 stat_sn;
+	u32 exp_cmd_sn;
+	u32 max_cmd_sn;
+	u32 rsvd3[3];
+} __packed;
+
+struct iscsi_login_req_hdr {
+	u8  opcode;
+	u8  flags;
+	u8  max_version;		/* Max. version supported */
+	u8  min_version;		/* Min. version supported */
+	u8  ahslength;
+	u8  datalength[3];
+	union iscsi_sid sid;
+	u32 itt;			/* Initiator Task Tag */
+	u16 cid;			/* Connection ID */
+	u16 rsvd1;
+	u32 cmd_sn;
+	u32 exp_stat_sn;
+	u32 rsvd2[4];
+} __packed;
+
+struct iscsi_login_rsp_hdr {
+	u8  opcode;
+	u8  flags;
+	u8  max_version;		/* Max. version supported */
+	u8  active_version;		/* Active version */
+	u8  ahslength;
+	u8  datalength[3];
+	union iscsi_sid sid;
+	u32 itt;			/* Initiator Task Tag */
+	u32 rsvd1;
+	u32 stat_sn;
+	u32 exp_cmd_sn;
+	u32 max_cmd_sn;
+	u8  status_class;		/* see Login RSP ststus classes below */
+	u8  status_detail;		/* see Login RSP Status details below */
+	u8  rsvd2[10];
+} __packed;
+
+#define ISCSI_FLG_FINAL			0x80
+#define ISCSI_FLG_TRANSIT		0x80
+#define ISCSI_FLG_CSG_SECURITY		0x00
+#define ISCSI_FLG_CSG_LOGIN		0x04
+#define ISCSI_FLG_CSG_FULL_FEATURE	0x0c
+#define ISCSI_FLG_CSG_MASK		0x0c
+#define ISCSI_FLG_NSG_SECURITY		0x00
+#define ISCSI_FLG_NSG_LOGIN		0x01
+#define ISCSI_FLG_NSG_FULL_FEATURE	0x03
+#define ISCSI_FLG_NSG_MASK		0x03
+
+/* Login Status response classes */
+#define ISCSI_STATUS_SUCCESS		0x00
+#define ISCSI_STATUS_REDIRECT		0x01
+#define ISCSI_STATUS_INITIATOR_ERR	0x02
+#define ISCSI_STATUS_TARGET_ERR		0x03
+
+/* Login Status response detail codes */
+/* Class-0 (Success) */
+#define ISCSI_STATUS_ACCEPT		0x00
+
+/* Class-1 (Redirection) */
+#define ISCSI_STATUS_TGT_MOVED_TEMP	0x01
+#define ISCSI_STATUS_TGT_MOVED_PERM	0x02
+
+/* Class-2 (Initiator Error) */
+#define ISCSI_STATUS_INIT_ERR		0x00
+#define ISCSI_STATUS_AUTH_FAILED	0x01
+#define ISCSI_STATUS_TGT_FORBIDDEN	0x02
+#define ISCSI_STATUS_TGT_NOT_FOUND	0x03
+#define ISCSI_STATUS_TGT_REMOVED	0x04
+#define ISCSI_STATUS_NO_VERSION		0x05
+#define ISCSI_STATUS_TOO_MANY_CONN	0x06
+#define ISCSI_STATUS_MISSING_FIELDS	0x07
+#define ISCSI_STATUS_CONN_ADD_FAILED	0x08
+#define ISCSI_STATUS_INV_SESSION_TYPE	0x09
+#define ISCSI_STATUS_SESSION_NOT_FOUND	0x0a
+#define ISCSI_STATUS_INV_REQ_TYPE	0x0b
+
+/* Class-3 (Target Error) */
+#define ISCSI_STATUS_TARGET_ERROR	0x00
+#define ISCSI_STATUS_SVC_UNAVAILABLE	0x01
+#define ISCSI_STATUS_NO_RESOURCES	0x02
+
+struct iscsi_logout_req_hdr {
+	u8  opcode;
+	u8  flags;
+	u16 rsvd1;
+	u8  ahslength;
+	u8  datalength[3];
+	u32 rsvd2[2];
+	u32 itt;
+	u16 cid;
+	u16 rsvd3;
+	u32 cmd_sn;
+	u32 exp_stat_sn;
+	u32 rsvd4[4];
+} __packed;
+
+struct iscsi_logout_rsp_hdr {
+	u8  opcode;
+	u8  flags;
+	u8  response;
+	u8  rsvd1;
+	u8  ahslength;
+	u8  datalength[3];
+	u32 rsvd2[2];
+	u32 itt;
+	u32 rsvd3;
+	u32 stat_sn;
+	u32 exp_cmd_sn;
+	u32 max_cmd_sn;
+	u32 rsvd4;
+	u16 time2wait;
+	u16 time2retain;
+	u32 rsvd5;
+} __packed;
+
+struct iscsi_snack_req_hdr {
+	u8  opcode;
+	u8  flags;
+	u16 rsvd1;
+	u8  ahslength;
+	u8  datalength[3];
+	u32 rsvd2[2];
+	u32 itt;
+	u32 ttt;
+	u32 rsvd3;
+	u32 exp_stat_sn;
+	u32 rsvd4[2];
+	u32 beg_run;
+	u32 run_length;
+} __packed;
+
+struct iscsi_reject_hdr {
+	u8  opcode;
+	u8  flags;
+	u8  reason;
+	u8  rsvd1;
+	u8  ahslength;
+	u8  datalength[3];
+	u32 rsvd2[2];
+	u32 ffffffff;
+	u32 rsvd3;
+	u32 stat_sn;
+	u32 exp_cmd_sn;
+	u32 max_cmd_sn;
+	u32 data_sn;
+	u32 rsvd4[2];
+} __packed;
+
+#define ISCSI_REASON_NO_FULL_FEATURE_PHASE	0x01
+#define ISCSI_REASON_DATA_DIGEST_ERROR		0x02
+#define ISCSI_REASON_DATA_SNACK_REJECT		0x03
+#define ISCSI_REASON_PROTOCOL_ERROR		0x04
+#define ISCSI_REASON_UNSUPPORTED_COMMAND	0x05
+#define ISCSI_REASON_IMMEDIATE_COMMAND_REJECT	0x06
+#define ISCSI_REASON_TASK_IN_PROGRESS		0x07
+#define ISCSI_REASON_INVALID_SNACK		0x08
+#define ISCSI_REASON_NO_BOOKMARK		0x09
+#define ISCSI_REASON_BOOKMARK_REJECT		0x0a
+#define ISCSI_REASON_NEGOTIATION_RESET		0x0b
+#define ISCSI_REASON_WAITING_LOGOUT		0x0c
+
+
+struct iscsi_nop_out_hdr {
+	u8  opcode;
+	u8  flags;
+	u16 rsvd1;
+	u8  ahslength;
+	u8  datalength[3];
+	u16 lun[4];
+	u32 itt;
+	u32 ttt;
+	u32 cmd_sn;
+	u32 exp_stat_sn;
+	u32 rsvd2[4];
+} __packed;
+
+struct iscsi_nop_in_hdr {
+	u8  opcode;
+	u8  flags;
+	u16 rsvd1;
+	u8  ahslength;
+	u8  datalength[3];
+	u16 lun[4];
+	u32 itt;
+	u32 ttt;
+	u32 stat_sn;
+	u32 exp_cmd_sn;
+	u32 max_cmd_sn;
+	u32 rsvd2[3];
+} __packed;
+
+#define ISCSI_RESERVED_TAG	(0xffffffffU)
+
+#endif	/* __ISCSI_HDR_H__ */
--- linux-mvl-dove-2.6.32.orig/ubuntu/iscsitarget/null-io.c
+++ linux-mvl-dove-2.6.32/ubuntu/iscsitarget/null-io.c
@@ -0,0 +1,114 @@
+/*
+ * Target device null I/O.
+ * (C) 2005 MING Zhang <mingz@ele.uri.edu>
+ * This code is licenced under the GPL.
+ *
+ * The nullio mode will not return any meaningful or previous written
+ * data. It is only for performance measurement purpose.
+ */
+
+#include <linux/types.h>
+#include <linux/blkdev.h>
+#include <linux/parser.h>
+#include <linux/writeback.h>
+
+#include "iscsi.h"
+#include "iscsi_dbg.h"
+#include "iotype.h"
+
+struct nullio_data {
+	u64 sectors;
+};
+
+enum {
+	Opt_sectors, Opt_ignore, Opt_err,
+};
+
+static match_table_t tokens = {
+	{Opt_sectors, "Sectors=%u"},
+	{Opt_ignore, "Type=%s"},
+	{Opt_err, NULL},
+};
+
+static int parse_nullio_params(struct iet_volume *volume, char *params)
+{
+	int err = 0;
+	char *p, *q;
+	struct nullio_data *data = volume->private;
+
+	while ((p = strsep(&params, ",")) != NULL) {
+		substring_t args[MAX_OPT_ARGS];
+		int token;
+		if (!*p)
+			continue;
+		token = match_token(p, tokens, args);
+		switch (token) {
+		case Opt_sectors:
+			q = match_strdup(&args[0]);
+			if (!q)
+				return -ENOMEM;
+			data->sectors = simple_strtoull(q, NULL, 10);
+			kfree(q);
+			break;
+		case Opt_ignore:
+			break;
+		default:
+			eprintk("Unknown %s\n", p);
+			return -EINVAL;
+			break;
+		}
+	}
+	return err;
+}
+
+static void nullio_detach(struct iet_volume *lu)
+{
+	struct nullio_data *p = lu->private;
+
+	kfree(p);
+	lu->private = NULL;
+}
+
+static int nullio_attach(struct iet_volume *lu, char *args)
+{
+	int err = 0;
+	struct nullio_data *p;
+
+	if (lu->private) {
+		printk("already attached ? %d\n", lu->lun);
+		return -EBUSY;
+	}
+
+	p = kzalloc(sizeof(*p), GFP_KERNEL);
+	if (!p)
+		return -ENOMEM;
+
+	lu->private = p;
+
+	if ((err = parse_nullio_params(lu, args)) < 0) {
+		eprintk("%d\n", err);
+		goto out;
+	}
+
+	lu->blk_shift = SECTOR_SIZE_BITS;
+	lu->blk_cnt = (p->sectors = p->sectors ? : 1 << 27); /* 64 GB */
+
+out:
+	if (err < 0)
+		nullio_detach(lu);
+	return err;
+}
+
+void nullio_show(struct iet_volume *lu, struct seq_file *seq)
+{
+	struct nullio_data *p = lu->private;
+	seq_printf(seq, " sectors:%llu\n", p->sectors);
+}
+
+struct iotype nullio =
+{
+	.name = "nullio",
+	.attach = nullio_attach,
+	.detach = nullio_detach,
+	.show = nullio_show,
+};
--- linux-mvl-dove-2.6.32.orig/ubuntu/iscsitarget/tio.c
+++ linux-mvl-dove-2.6.32/ubuntu/iscsitarget/tio.c
@@ -0,0 +1,121 @@
+/*
+ * Target I/O.
+ * (C) 2005 FUJITA Tomonori <tomof@acm.org>
+ * This code is licenced under the GPL.
+ */
+
+#include "iscsi.h"
+#include "iscsi_dbg.h"
+#include "iotype.h"
+
+static int tio_add_pages(struct tio *tio, int count)
+{
+	int i;
+	struct page *page;
+
+	dprintk(D_GENERIC, "%p %d (%d)\n", tio, count, tio->pg_cnt);
+
+	tio->pg_cnt = count;
+
+	count *= sizeof(struct page *);
+
+	do {
+		tio->pvec = kzalloc(count, GFP_KERNEL);
+		if (!tio->pvec)
+			yield();
+	} while (!tio->pvec);
+
+	for (i = 0; i < tio->pg_cnt; i++) {
+		do {
+			if (!(page = alloc_page(GFP_KERNEL)))
+				yield();
+		} while (!page);
+		tio->pvec[i] = page;
+	}
+	return 0;
+}
+
+static struct kmem_cache *tio_cache;
+
+struct tio *tio_alloc(int count)
+{
+	struct tio *tio;
+
+	tio = kmem_cache_alloc(tio_cache, GFP_KERNEL | __GFP_NOFAIL);
+
+	tio->pg_cnt = 0;
+	tio->idx = 0;
+	tio->offset = 0;
+	tio->size = 0;
+	tio->pvec = NULL;
+
+	atomic_set(&tio->count, 1);
+
+	if (count)
+		tio_add_pages(tio, count);
+
+	return tio;
+}
+
+static void tio_free(struct tio *tio)
+{
+	int i;
+	for (i = 0; i < tio->pg_cnt; i++) {
+		assert(tio->pvec[i]);
+		__free_page(tio->pvec[i]);
+	}
+	kfree(tio->pvec);
+	kmem_cache_free(tio_cache, tio);
+}
+
+void tio_put(struct tio *tio)
+{
+	assert(atomic_read(&tio->count));
+	if (atomic_dec_and_test(&tio->count))
+		tio_free(tio);
+}
+
+void tio_get(struct tio *tio)
+{
+	atomic_inc(&tio->count);
+}
+
+void tio_set(struct tio *tio, u32 size, loff_t offset)
+{
+	tio->idx = offset >> PAGE_CACHE_SHIFT;
+	tio->offset = offset & ~PAGE_CACHE_MASK;
+	tio->size = size;
+}
+
+int tio_read(struct iet_volume *lu, struct tio *tio)
+{
+	struct iotype *iot = lu->iotype;
+	assert(iot);
+	return iot->make_request ? iot->make_request(lu, tio, READ) : 0;
+}
+
+int tio_write(struct iet_volume *lu, struct tio *tio)
+{
+	struct iotype *iot = lu->iotype;
+	assert(iot);
+	return iot->make_request ? iot->make_request(lu, tio, WRITE) : 0;
+}
+
+int tio_sync(struct iet_volume *lu, struct tio *tio)
+{
+	struct iotype *iot = lu->iotype;
+	assert(iot);
+	return iot->sync ? iot->sync(lu, tio) : 0;
+}
+
+int tio_init(void)
+{
+	tio_cache = KMEM_CACHE(tio, 0);
+	return  tio_cache ? 0 : -ENOMEM;
+}
+
+void tio_exit(void)
+{
+	if (tio_cache)
+		kmem_cache_destroy(tio_cache);
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/iscsitarget/iotype.c
+++ linux-mvl-dove-2.6.32/ubuntu/iscsitarget/iotype.c
@@ -0,0 +1,110 @@
+/*
+ * Manager for various I/O types.
+ * (C) 2004 - 2005 FUJITA Tomonori <tomof@acm.org>
+ * This code is licenced under the GPL.
+ */
+
+#include "iscsi.h"
+#include "iotype.h"
+#include "iscsi_dbg.h"
+
+static LIST_HEAD(iotypes);
+static rwlock_t iotypes_lock = RW_LOCK_UNLOCKED;
+
+static struct iotype *find_iotype(const char *name)
+{
+	struct iotype *iot = NULL;
+
+	list_for_each_entry(iot, &iotypes, iot_list) {
+		if (strcmp(iot->name, name) == 0)
+			return iot;
+	}
+	return NULL;
+}
+
+struct iotype *get_iotype(const char *name)
+{
+	struct iotype *iot;
+
+	read_lock(&iotypes_lock);
+	iot = find_iotype(name);
+	read_unlock(&iotypes_lock);
+
+	return iot;
+}
+
+void put_iotype(struct iotype *iot)
+{
+	if (!iot)
+		return;
+	return;
+}
+
+static int register_iotype(struct iotype *iot)
+{
+	int err = 0;
+	struct iotype *p;
+
+	write_lock(&iotypes_lock);
+
+	p = find_iotype(iot->name);
+	if (p)
+		err = -EBUSY;
+	else
+		list_add_tail(&iot->iot_list, &iotypes);
+
+	write_unlock(&iotypes_lock);
+
+	return err;
+}
+
+static int unregister_iotype(struct iotype *iot)
+{
+	int err = 0;
+	struct iotype *p;
+
+	write_lock(&iotypes_lock);
+
+	p = find_iotype(iot->name);
+	if (p && p == iot)
+		list_del_init(&iot->iot_list);
+	else
+		err = -EINVAL;
+
+	write_unlock(&iotypes_lock);
+
+
+	return err;
+}
+
+struct iotype *iotype_array[] = {
+	&fileio,
+	&blockio,
+	&nullio,
+};
+
+int iotype_init(void)
+{
+	int i, err;
+
+	for (i = 0; i < ARRAY_SIZE(iotype_array); i++) {
+		if (!(err = register_iotype(iotype_array[i])))
+			iprintk("Registered io type %s\n",
+						iotype_array[i]->name);
+		else {
+			eprintk("Failed to register io type %s\n",
+						iotype_array[i]->name);
+			break;
+		}
+	}
+
+	return err;
+}
+
+void iotype_exit(void)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(iotype_array); i++)
+		unregister_iotype(iotype_array[i]);
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/iscsitarget/ua.c
+++ linux-mvl-dove-2.6.32/ubuntu/iscsitarget/ua.c
@@ -0,0 +1,164 @@
+/*
+ * IET Unit Attention support
+ *
+ * Copyright (C) 2009 Xie Gang <xiegang112@gmail.com>
+ * Copyright (C) 2009 Arne Redlich <arne.redlich@googlemail.com>
+ *
+ * Released under the terms of the GNU GPL v2.0.
+ */
+
+#include <scsi/scsi.h>
+
+#include "iscsi.h"
+#include "iscsi_dbg.h"
+
+#define ua_hashfn(lun) ((lun % UA_HASH_LEN))
+
+static struct kmem_cache *ua_cache;
+
+int ua_init(void)
+{
+	ua_cache = KMEM_CACHE(ua_entry, 0);
+	if (!ua_cache) {
+		eprintk("%s", "Failed to create ua cache\n");
+		return -ENOMEM;
+	}
+
+	return 0;
+}
+
+void ua_exit(void)
+{
+	if (ua_cache)
+		kmem_cache_destroy(ua_cache);
+}
+
+/* sess->ua_hash_lock needs to be held */
+static struct ua_entry * ua_find_hash(struct iscsi_session *sess, u32 lun,
+				      u8 asc, u8 ascq, int match)
+{
+	struct ua_entry *ua;
+	struct list_head *h = &sess->ua_hash[ua_hashfn(lun)];
+
+	list_for_each_entry(ua, h, entry) {
+		if (ua->lun == lun) {
+			if (!match)
+				return ua;
+			if (ua->asc == asc && ua->ascq == ascq)
+				return ua;
+		}
+	}
+
+	return NULL;
+}
+
+int ua_pending(struct iscsi_session *sess, u32 lun)
+{
+	struct ua_entry *ua;
+
+	spin_lock(&sess->ua_hash_lock);
+	ua = ua_find_hash(sess, lun, 0, 0, 0);
+	spin_unlock(&sess->ua_hash_lock);
+
+	dprintk_ua(ua, sess, lun);
+
+	return ua ? 1 : 0;
+}
+
+/* sess->ua_hash_lock needs to be held */
+static struct ua_entry * __ua_get_hash(struct iscsi_session *sess, u32 lun,
+				       u8 asc, u8 ascq, int match)
+{
+	struct ua_entry *ua = ua_find_hash(sess, lun, asc, ascq, match);
+
+	if (ua)
+		list_del_init(&ua->entry);
+
+	return ua;
+}
+
+struct ua_entry * ua_get_first(struct iscsi_session *sess, u32 lun)
+{
+	struct ua_entry *ua;
+
+	spin_lock(&sess->ua_hash_lock);
+	ua = __ua_get_hash(sess, lun, 0, 0, 0);
+	spin_unlock(&sess->ua_hash_lock);
+
+	dprintk_ua(ua, sess, lun);
+
+	return ua;
+}
+
+struct ua_entry * ua_get_match(struct iscsi_session *sess, u32 lun,
+			       u8 asc, u8 ascq)
+{
+	struct ua_entry *ua;
+
+	spin_lock(&sess->ua_hash_lock);
+	ua = __ua_get_hash(sess, lun, asc, ascq, 1);
+	spin_unlock(&sess->ua_hash_lock);
+
+	dprintk_ua(ua, sess, lun);
+
+	return ua;
+}
+
+void ua_establish_for_session(struct iscsi_session *sess, u32 lun,
+			      u8 asc, u8 ascq)
+{
+	struct list_head *l = &sess->ua_hash[ua_hashfn(lun)];
+	struct ua_entry *ua = kmem_cache_alloc(ua_cache, GFP_KERNEL);
+
+	if (!ua) {
+		eprintk("%s", "Failed to alloc ua");
+		return;
+	}
+
+	ua->asc = asc;
+	ua->ascq = ascq;
+	ua->lun = lun;
+	ua->session = sess;
+
+	spin_lock(&sess->ua_hash_lock);
+	list_add_tail(&ua->entry, l);
+	spin_unlock(&sess->ua_hash_lock);
+
+	dprintk_ua(ua, sess, lun);
+}
+
+void ua_establish_for_other_sessions(struct iscsi_session *sess, u32 lun,
+				     u8 asc, u8 ascq)
+{
+	struct list_head *l = &sess->target->session_list;
+	struct iscsi_session *s;
+
+	spin_lock(&sess->target->session_list_lock);
+	list_for_each_entry(s, l, list)
+		if (s->sid != sess->sid)
+			ua_establish_for_session(s, lun, asc, ascq);
+	spin_unlock(&sess->target->session_list_lock);
+}
+
+void ua_establish_for_all_sessions(struct iscsi_target *target, u32 lun,
+				   u8 asc, u8 ascq)
+{
+	struct list_head *l = &target->session_list;
+	struct iscsi_session *s;
+
+	spin_lock(&target->session_list_lock);
+	list_for_each_entry(s, l, list)
+		ua_establish_for_session(s, lun, asc, ascq);
+	spin_unlock(&target->session_list_lock);
+
+}
+
+void ua_free(struct ua_entry *ua)
+{
+	if (!ua)
+		return;
+
+	dprintk_ua(ua, ua->session, ua->lun);
+	BUG_ON(!list_empty(&ua->entry));
+	kmem_cache_free(ua_cache, ua);
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/iscsitarget/volume.c
+++ linux-mvl-dove-2.6.32/ubuntu/iscsitarget/volume.c
@@ -0,0 +1,264 @@
+/*
+ * Volume manager
+ * (C) 2004 - 2005 FUJITA Tomonori <tomof@acm.org>
+ * This code is licenced under the GPL.
+ */
+
+#include <linux/types.h>
+#include <linux/parser.h>
+
+#include "iscsi.h"
+#include "iscsi_dbg.h"
+#include "iotype.h"
+
+struct iet_volume *volume_lookup(struct iscsi_target *target, u32 lun)
+{
+	struct iet_volume *volume;
+
+	list_for_each_entry(volume, &target->volumes, list) {
+		if (volume->lun == lun)
+			return volume;
+	}
+	return NULL;
+}
+
+enum {
+	Opt_type,
+	Opt_iomode,
+	Opt_err,
+};
+
+static match_table_t tokens = {
+	{Opt_type, "Type=%s"},
+	{Opt_iomode, "IOMode=%s"},
+	{Opt_err, NULL},
+};
+
+static int set_iotype(struct iet_volume *volume, char *params)
+{
+	int err = 0;
+	substring_t args[MAX_OPT_ARGS];
+	char *p, *argp = NULL, *buf = (char *) get_zeroed_page(GFP_USER);
+
+	if (!buf)
+		return -ENOMEM;
+	strncpy(buf, params, PAGE_CACHE_SIZE);
+
+	while ((p = strsep(&buf, ",")) != NULL) {
+		int token;
+
+		if (!*p)
+			continue;
+		token = match_token(p, tokens, args);
+		switch (token) {
+		case Opt_type:
+			if (!(argp = match_strdup(&args[0])))
+				err = -ENOMEM;
+			if (argp && !(volume->iotype = get_iotype(argp)))
+				err = -ENOENT;
+			kfree(argp);
+			break;
+		case Opt_iomode:
+			if (!(argp = match_strdup(&args[0])))
+				err = -ENOMEM;
+			if (argp && !strcmp(argp, "ro"))
+				SetLUReadonly(volume);
+			else if (argp && !strcmp(argp, "wb"))
+				SetLUWCache(volume);
+			kfree(argp);
+			break;
+		default:
+			break;
+		}
+	}
+
+	if (!err && !volume->iotype && !(volume->iotype = get_iotype("fileio"))) {
+		eprintk("%s\n", "Cannot find fileio");
+		err = -EINVAL;
+	}
+
+	free_page((unsigned long) buf);
+
+	return err;
+}
+
+int volume_add(struct iscsi_target *target, struct volume_info *info)
+{
+	int ret;
+	struct iet_volume *volume;
+	char *args;
+
+	volume = volume_lookup(target, info->lun);
+	if (volume)
+		return -EEXIST;
+
+	if (info->lun > 0x3fff)
+		return -EINVAL;
+
+	volume = kzalloc(sizeof(*volume), GFP_KERNEL);
+	if (!volume)
+		return -ENOMEM;
+
+	volume->target = target;
+	volume->lun = info->lun;
+
+	args = kzalloc(info->args_len + 1, GFP_KERNEL);
+	if (!args) {
+		ret = -ENOMEM;
+		goto free_volume;
+	}
+
+	ret = copy_from_user(args, (void *)(unsigned long)info->args_ptr,
+			     info->args_len);
+	if (ret) {
+		ret = -EFAULT;
+		goto free_args;
+	}
+
+	ret = set_iotype(volume, args);
+	if (ret < 0)
+		goto free_args;
+
+	ret = volume->iotype->attach(volume, args);
+	if (ret < 0)
+		goto free_args;
+
+	INIT_LIST_HEAD(&volume->queue.wait_list);
+	spin_lock_init(&volume->queue.queue_lock);
+	spin_lock_init(&volume->reserve_lock);
+
+	volume->l_state = IDEV_RUNNING;
+	atomic_set(&volume->l_count, 0);
+
+	list_add_tail(&volume->list, &target->volumes);
+	atomic_inc(&target->nr_volumes);
+
+	kfree(args);
+
+	return 0;
+free_args:
+	kfree(args);
+free_volume:
+	put_iotype(volume->iotype);
+	kfree(volume);
+
+	return ret;
+}
+
+void iscsi_volume_destroy(struct iet_volume *volume)
+{
+	assert(volume->l_state == IDEV_DEL);
+	assert(!atomic_read(&volume->l_count));
+
+	volume->iotype->detach(volume);
+	put_iotype(volume->iotype);
+	list_del(&volume->list);
+	kfree(volume);
+}
+
+int iscsi_volume_del(struct iscsi_target *target, struct volume_info *info)
+{
+	struct iet_volume *volume;
+
+	eprintk("%x %x\n", target->tid, info->lun);
+	if (!(volume = volume_lookup(target, info->lun)))
+		return -ENOENT;
+
+	volume->l_state = IDEV_DEL;
+	atomic_dec(&target->nr_volumes);
+	if (!atomic_read(&volume->l_count))
+		iscsi_volume_destroy(volume);
+
+	return 0;
+}
+
+struct iet_volume *volume_get(struct iscsi_target *target, u32 lun)
+{
+	struct iet_volume *volume;
+
+	if ((volume = volume_lookup(target, lun))) {
+		if (volume->l_state == IDEV_RUNNING)
+			atomic_inc(&volume->l_count);
+		else
+			volume = NULL;
+	}
+	return volume;
+}
+
+void volume_put(struct iet_volume *volume)
+{
+	if (atomic_dec_and_test(&volume->l_count) && volume->l_state == IDEV_DEL)
+		iscsi_volume_destroy(volume);
+}
+
+int volume_reserve(struct iet_volume *volume, u64 sid)
+{
+	if (!volume)
+		return -ENOENT;
+
+	spin_lock(&volume->reserve_lock);
+	if (volume->reserve_sid && volume->reserve_sid != sid) {
+		spin_unlock(&volume->reserve_lock);
+		return -EBUSY;
+	}
+
+	volume->reserve_sid = sid;
+	spin_unlock(&volume->reserve_lock);
+
+	return 0;
+}
+
+int is_volume_reserved(struct iet_volume *volume, u64 sid)
+{
+	if (!volume || !volume->reserve_sid || volume->reserve_sid == sid)
+		return 0;
+
+	return -EBUSY;
+}
+
+int volume_release(struct iet_volume *volume, u64 sid, int force)
+{
+	if (force || volume->reserve_sid == sid)
+		volume->reserve_sid = 0;
+
+	return 0;
+}
+
+static void iet_volume_info_show(struct seq_file *seq, struct iscsi_target *target)
+{
+	struct iet_volume *volume;
+
+	list_for_each_entry(volume, &target->volumes, list) {
+		seq_printf(seq, "\tlun:%u state:%x iotype:%s",
+			   volume->lun, volume->l_state, volume->iotype->name);
+		if (LUReadonly(volume))
+			seq_printf(seq, " iomode:ro");
+		else if (LUWCache(volume))
+			seq_printf(seq, " iomode:wb");
+		else
+			seq_printf(seq, " iomode:wt");
+
+		if (volume->iotype->show)
+			volume->iotype->show(volume, seq);
+		else
+			seq_printf(seq, "\n");
+	}
+}
+
+static int iet_volume_seq_open(struct inode *inode, struct file *file)
+{
+	int res;
+	res = seq_open(file, &iet_seq_op);
+	if (!res)
+		((struct seq_file *)file->private_data)->private =
+			iet_volume_info_show;
+	return res;
+}
+
+struct file_operations volume_seq_fops = {
+	.owner		= THIS_MODULE,
+	.open		= iet_volume_seq_open,
+	.read		= seq_read,
+	.llseek		= seq_lseek,
+	.release	= seq_release,
+};
--- linux-mvl-dove-2.6.32.orig/ubuntu/iscsitarget/conn.c
+++ linux-mvl-dove-2.6.32/ubuntu/iscsitarget/conn.c
@@ -0,0 +1,253 @@
+/*
+ * Copyright (C) 2002-2003 Ardis Technolgies <roman@ardistech.com>
+ *
+ * Released under the terms of the GNU GPL v2.0.
+ */
+
+#include <linux/file.h>
+#include <linux/ip.h>
+#include <net/tcp.h>
+
+#include "iscsi.h"
+#include "iscsi_dbg.h"
+#include "digest.h"
+
+static void print_conn_state(char *p, size_t size, unsigned long state)
+{
+	if (test_bit(CONN_ACTIVE, &state))
+		snprintf(p, size, "%s", "active");
+	else if (test_bit(CONN_CLOSING, &state))
+		snprintf(p, size, "%s", "closing");
+	else
+		snprintf(p, size, "%s", "unknown");
+}
+
+static void print_digest_state(char *p, size_t size, unsigned long flags)
+{
+	if (DIGEST_NONE & flags)
+		snprintf(p, size, "%s", "none");
+	else if (DIGEST_CRC32C & flags)
+		snprintf(p, size, "%s", "crc32c");
+	else
+		snprintf(p, size, "%s", "unknown");
+}
+
+void conn_info_show(struct seq_file *seq, struct iscsi_session *session)
+{
+	struct iscsi_conn *conn;
+	struct sock *sk;
+	char buf[64];
+
+	list_for_each_entry(conn, &session->conn_list, list) {
+		sk = conn->sock->sk;
+		switch (sk->sk_family) {
+		case AF_INET:
+			snprintf(buf, sizeof(buf),
+				 "%u.%u.%u.%u", NIPQUAD(inet_sk(sk)->daddr));
+			break;
+		case AF_INET6:
+			snprintf(buf, sizeof(buf), "[%pI6]",
+				 &inet6_sk(sk)->daddr);
+			break;
+		default:
+			break;
+		}
+		seq_printf(seq, "\t\tcid:%u ip:%s ", conn->cid, buf);
+		print_conn_state(buf, sizeof(buf), conn->state);
+		seq_printf(seq, "state:%s ", buf);
+		print_digest_state(buf, sizeof(buf), conn->hdigest_type);
+		seq_printf(seq, "hd:%s ", buf);
+		print_digest_state(buf, sizeof(buf), conn->ddigest_type);
+		seq_printf(seq, "dd:%s\n", buf);
+	}
+}
+
+struct iscsi_conn *conn_lookup(struct iscsi_session *session, u16 cid)
+{
+	struct iscsi_conn *conn;
+
+	list_for_each_entry(conn, &session->conn_list, list) {
+		if (conn->cid == cid)
+			return conn;
+	}
+	return NULL;
+}
+
+static void iet_state_change(struct sock *sk)
+{
+	struct iscsi_conn *conn = sk->sk_user_data;
+	struct iscsi_target *target = conn->session->target;
+
+	if (sk->sk_state != TCP_ESTABLISHED)
+		conn_close(conn);
+	else
+		nthread_wakeup(target);
+
+	target->nthread_info.old_state_change(sk);
+}
+
+static void iet_data_ready(struct sock *sk, int len)
+{
+	struct iscsi_conn *conn = sk->sk_user_data;
+	struct iscsi_target *target = conn->session->target;
+
+	nthread_wakeup(target);
+	target->nthread_info.old_data_ready(sk, len);
+}
+
+/*
+ * @locking: grabs the target's nthread_lock to protect it from races with
+ * set_conn_wspace_wait()
+ */
+static void iet_write_space(struct sock *sk)
+{
+	struct iscsi_conn *conn = sk->sk_user_data;
+	struct network_thread_info *info = &conn->session->target->nthread_info;
+
+	spin_lock_bh(&info->nthread_lock);
+
+	if (sk_stream_wspace(sk) >= sk_stream_min_wspace(sk) &&
+	    test_bit(CONN_WSPACE_WAIT, &conn->state)) {
+		clear_bit(CONN_WSPACE_WAIT, &conn->state);
+		__nthread_wakeup(info);
+	}
+
+	spin_unlock_bh(&info->nthread_lock);
+
+	info->old_write_space(sk);
+}
+
+static void iet_socket_bind(struct iscsi_conn *conn)
+{
+	int opt = 1;
+	mm_segment_t oldfs;
+	struct iscsi_session *session = conn->session;
+	struct iscsi_target *target = session->target;
+
+	dprintk(D_GENERIC, "%llu\n", (unsigned long long) session->sid);
+
+	conn->sock = SOCKET_I(conn->file->f_dentry->d_inode);
+	conn->sock->sk->sk_user_data = conn;
+
+	write_lock_bh(&conn->sock->sk->sk_callback_lock);
+	target->nthread_info.old_state_change = conn->sock->sk->sk_state_change;
+	conn->sock->sk->sk_state_change = iet_state_change;
+
+	target->nthread_info.old_data_ready = conn->sock->sk->sk_data_ready;
+	conn->sock->sk->sk_data_ready = iet_data_ready;
+
+	target->nthread_info.old_write_space = conn->sock->sk->sk_write_space;
+	conn->sock->sk->sk_write_space = iet_write_space;
+	write_unlock_bh(&conn->sock->sk->sk_callback_lock);
+
+	oldfs = get_fs();
+	set_fs(get_ds());
+	conn->sock->ops->setsockopt(conn->sock, SOL_TCP, TCP_NODELAY, (void *)&opt, sizeof(opt));
+	set_fs(oldfs);
+}
+
+int conn_free(struct iscsi_conn *conn)
+{
+	dprintk(D_GENERIC, "%p %#Lx %u\n", conn->session,
+		(unsigned long long) conn->session->sid, conn->cid);
+
+	assert(atomic_read(&conn->nr_cmnds) == 0);
+	assert(list_empty(&conn->pdu_list));
+	assert(list_empty(&conn->write_list));
+
+	list_del(&conn->list);
+	list_del(&conn->poll_list);
+
+	del_timer_sync(&conn->nop_timer);
+	digest_cleanup(conn);
+	kfree(conn);
+
+	return 0;
+}
+
+static int iet_conn_alloc(struct iscsi_session *session, struct conn_info *info)
+{
+	struct iscsi_conn *conn;
+
+	dprintk(D_SETUP, "%#Lx:%u\n", (unsigned long long) session->sid, info->cid);
+
+	conn = kzalloc(sizeof(*conn), GFP_KERNEL);
+	if (!conn)
+		return -ENOMEM;
+
+	conn->session = session;
+	conn->cid = info->cid;
+	conn->stat_sn = info->stat_sn;
+	conn->exp_stat_sn = info->exp_stat_sn;
+
+	conn->hdigest_type = info->header_digest;
+	conn->ddigest_type = info->data_digest;
+	if (digest_init(conn) < 0) {
+		kfree(conn);
+		return -ENOMEM;
+	}
+
+	spin_lock_init(&conn->list_lock);
+	atomic_set(&conn->nr_cmnds, 0);
+	atomic_set(&conn->nr_busy_cmnds, 0);
+	INIT_LIST_HEAD(&conn->pdu_list);
+	INIT_LIST_HEAD(&conn->write_list);
+	INIT_LIST_HEAD(&conn->poll_list);
+	init_timer(&conn->nop_timer);
+
+	list_add(&conn->list, &session->conn_list);
+
+	set_bit(CONN_ACTIVE, &conn->state);
+
+	conn->file = fget(info->fd);
+	iet_socket_bind(conn);
+
+	list_add(&conn->poll_list, &session->target->nthread_info.active_conns);
+
+	nthread_wakeup(conn->session->target);
+
+	return 0;
+}
+
+void conn_close(struct iscsi_conn *conn)
+{
+	if (test_and_clear_bit(CONN_ACTIVE, &conn->state))
+		set_bit(CONN_CLOSING, &conn->state);
+
+	nthread_wakeup(conn->session->target);
+}
+
+int conn_add(struct iscsi_session *session, struct conn_info *info)
+{
+	struct iscsi_conn *conn;
+	int err = -EEXIST;
+
+	conn = conn_lookup(session, info->cid);
+	if (conn)
+		return err;
+
+	return iet_conn_alloc(session, info);
+}
+
+int conn_del(struct iscsi_session *session, struct conn_info *info)
+{
+	struct iscsi_conn *conn;
+	int err = -EEXIST;
+
+	conn = conn_lookup(session, info->cid);
+	if (!conn)
+		return err;
+
+	conn_close(conn);
+
+	return 0;
+}
+
+/* target_lock() supposed to be held */
+void conn_del_all(struct iscsi_session *session)
+{
+	struct iscsi_conn *conn;
+
+	list_for_each_entry(conn, &session->conn_list, list)
+		conn_close(conn);
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/iscsitarget/wthread.c
+++ linux-mvl-dove-2.6.32/ubuntu/iscsitarget/wthread.c
@@ -0,0 +1,222 @@
+/*
+ * Worker thread.
+ * (C) 2004 - 2005 FUJITA Tomonori <tomof@acm.org>
+ * This code is licenced under the GPL.
+ */
+
+#include <linux/kthread.h>
+
+#include "iscsi.h"
+#include "iscsi_dbg.h"
+
+struct worker_thread_info *worker_thread_pool;
+
+void wthread_queue(struct iscsi_cmnd *cmnd)
+{
+	struct worker_thread_info *info = cmnd->conn->session->target->wthread_info;
+
+	if (!list_empty(&cmnd->list)) {
+		struct iscsi_scsi_cmd_hdr *req = cmnd_hdr(cmnd);
+		eprintk("%x %p %x %x %x %x %lx %x\n",
+			cmnd_itt(cmnd), req, req->opcode, req->scb[0], cmnd->pdu.datasize,
+			be32_to_cpu(req->data_length), cmnd->flags, req->flags);
+
+		if (cmnd->lun)
+			eprintk("%u\n", cmnd->lun->lun);
+		assert(list_empty(&cmnd->list));
+	}
+
+	spin_lock(&info->wthread_lock);
+	list_add_tail(&cmnd->list, &info->work_queue);
+	spin_unlock(&info->wthread_lock);
+
+	atomic_inc(&cmnd->conn->nr_busy_cmnds);
+
+	wake_up(&info->wthread_sleep);
+}
+
+static struct iscsi_cmnd * get_ready_cmnd(struct worker_thread_info *info)
+{
+	struct iscsi_cmnd *cmnd = NULL;
+
+	spin_lock(&info->wthread_lock);
+	if (!list_empty(&info->work_queue)) {
+		cmnd = list_entry(info->work_queue.next, struct iscsi_cmnd, list);
+		list_del_init(&cmnd->list);
+
+		assert(cmnd->conn);
+	}
+	spin_unlock(&info->wthread_lock);
+
+	return cmnd;
+}
+
+static int cmnd_execute(struct iscsi_cmnd *cmnd)
+{
+	int type = cmnd->conn->session->target->trgt_param.target_type;
+
+	assert(target_type_array[type]->execute_cmnd);
+	return target_type_array[type]->execute_cmnd(cmnd);
+}
+
+static int worker_thread(void *arg)
+{
+	struct worker_thread *wt = (struct worker_thread *) arg;
+	struct worker_thread_info *info = wt->w_info;
+	struct iscsi_cmnd *cmnd;
+	struct iscsi_conn *conn;
+	DECLARE_WAITQUEUE(wait, current);
+
+	add_wait_queue(&info->wthread_sleep, &wait);
+
+	__set_current_state(TASK_RUNNING);
+	do {
+		while (!list_empty(&info->work_queue) &&
+		       (cmnd = get_ready_cmnd(info))) {
+			conn = cmnd->conn;
+			cmnd_execute(cmnd);
+			assert(conn);
+			atomic_dec(&conn->nr_busy_cmnds);
+		}
+
+		__set_current_state(TASK_INTERRUPTIBLE);
+		if (list_empty(&info->work_queue))
+			schedule();
+
+		__set_current_state(TASK_RUNNING);
+	} while (!kthread_should_stop());
+
+	remove_wait_queue(&info->wthread_sleep, &wait);
+
+	return 0;
+}
+
+static int start_one_worker_thread(struct worker_thread_info *info, u32 tid)
+{
+	struct worker_thread *wt;
+	struct task_struct *task;
+
+	if (!(wt = kmalloc(sizeof(struct worker_thread), GFP_KERNEL)))
+		return -ENOMEM;
+
+	wt->w_info = info;
+	task = kthread_create(worker_thread, wt, "istiod%d", tid);
+	if (IS_ERR(task)) {
+		kfree(wt);
+		return PTR_ERR(task);
+	}
+
+	wt->w_task = task;
+	list_add(&wt->w_list, &info->wthread_list);
+	info->nr_running_wthreads++;
+
+	wake_up_process(task);
+
+	return 0;
+}
+
+static int stop_one_worker_thread(struct worker_thread *wt)
+{
+	struct worker_thread_info *info = wt->w_info;
+	int err;
+
+	assert(wt->w_task);
+	err = kthread_stop(wt->w_task);
+
+	if (err < 0 && err != -EINTR)
+		return err;
+
+	list_del(&wt->w_list);
+	kfree(wt);
+	info->nr_running_wthreads--;
+
+	return 0;
+}
+
+int wthread_init(struct worker_thread_info *info)
+{
+	spin_lock_init(&info->wthread_lock);
+
+	info->nr_running_wthreads = 0;
+
+	INIT_LIST_HEAD(&info->work_queue);
+	INIT_LIST_HEAD(&info->wthread_list);
+
+	init_waitqueue_head(&info->wthread_sleep);
+
+	return 0;
+}
+
+int wthread_start(struct worker_thread_info *info, int wthreads, u32 tid)
+{
+	int err = 0;
+
+	while (info->nr_running_wthreads < wthreads) {
+		if ((err = start_one_worker_thread(info, tid)) < 0) {
+			eprintk("Fail to create a worker thread %d\n", err);
+			goto out;
+		}
+	}
+
+	while (info->nr_running_wthreads > wthreads) {
+		struct worker_thread *wt;
+		wt = list_entry(info->wthread_list.next, struct worker_thread, w_list);
+		if ((err = stop_one_worker_thread(wt)) < 0) {
+			eprintk("Fail to stop a worker thread %d\n", err);
+			break;
+		}
+	}
+out:
+	return err;
+}
+
+int wthread_stop(struct worker_thread_info *info)
+{
+	struct worker_thread *wt, *tmp;
+	int err = 0;
+
+	list_for_each_entry_safe(wt, tmp, &info->wthread_list, w_list) {
+		if ((err = stop_one_worker_thread(wt)) < 0) {
+			eprintk("Fail to stop a worker thread %d\n", err);
+			return err;
+		}
+	}
+
+	return err;
+}
+
+int wthread_module_init()
+{
+	int err;
+
+	if (!worker_thread_pool_size)
+		return 0;
+
+	worker_thread_pool = kmalloc(sizeof(struct worker_thread_info),
+				     GFP_KERNEL);
+	if (!worker_thread_pool)
+		return -ENOMEM;
+
+	wthread_init(worker_thread_pool);
+
+	err = wthread_start(worker_thread_pool, worker_thread_pool_size, 0);
+	if (err) {
+		kfree(worker_thread_pool);
+		worker_thread_pool = NULL;
+		return err;
+	}
+
+	iprintk("iscsi_trgt using worker thread pool; size = %ld\n",
+		worker_thread_pool_size);
+
+	return 0;
+}
+
+void wthread_module_exit()
+{
+	if (!worker_thread_pool_size)
+		return;
+
+	wthread_stop(worker_thread_pool);
+	kfree(worker_thread_pool);
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/iscsitarget/param.c
+++ linux-mvl-dove-2.6.32/ubuntu/iscsitarget/param.c
@@ -0,0 +1,205 @@
+/*
+ * (C) 2005 FUJITA Tomonori <tomof@acm.org>
+ *
+ * This code is licenced under the GPL.
+ */
+
+#include "iscsi.h"
+#include "iscsi_dbg.h"
+#include "digest.h"
+
+struct target_type *target_type_array[] = {
+	&disk_ops,
+};
+
+#define	CHECK_PARAM(info, iparam, word, min, max)			\
+do {									\
+	if (!info->partial || (info->partial & 1 << key_##word))	\
+		if (iparam[key_##word] < min ||				\
+			iparam[key_##word] > max) {			\
+			eprintk("%s: %u is out of range (%u %u)\n",	\
+				#word, iparam[key_##word], min, max);	\
+			iparam[key_##word] = min;			\
+		}							\
+} while (0)
+
+#define	SET_PARAM(param, info, iparam, word)				\
+({									\
+	int changed = 0;						\
+	if (!info->partial || (info->partial & 1 << key_##word)) {	\
+		if (param->word != iparam[key_##word])			\
+			changed = 1;					\
+		param->word = iparam[key_##word];			\
+	}								\
+	changed;							\
+})
+
+#define	GET_PARAM(param, info, iparam, word)				\
+do {									\
+	iparam[key_##word] = param->word;				\
+} while (0)
+
+static void sess_param_check(struct iscsi_param_info *info)
+{
+	u32 *iparam = info->session_param;
+
+	CHECK_PARAM(info, iparam, max_connections, 1, 1);
+	CHECK_PARAM(info, iparam, max_recv_data_length, 512,
+		    (u32) ((ISCSI_CONN_IOV_MAX - 1) * PAGE_CACHE_SIZE));
+	CHECK_PARAM(info, iparam, max_xmit_data_length, 512,
+		    (u32) ((ISCSI_CONN_IOV_MAX - 1) * PAGE_CACHE_SIZE));
+	CHECK_PARAM(info, iparam, error_recovery_level, 0, 0);
+	CHECK_PARAM(info, iparam, data_pdu_inorder, 1, 1);
+	CHECK_PARAM(info, iparam, data_sequence_inorder, 1, 1);
+
+	digest_alg_available(&iparam[key_header_digest]);
+	digest_alg_available(&iparam[key_data_digest]);
+
+	CHECK_PARAM(info, iparam, ofmarker, 0, 0);
+	CHECK_PARAM(info, iparam, ifmarker, 0, 0);
+}
+
+static void sess_param_set(struct iscsi_sess_param *param, struct iscsi_param_info *info)
+{
+	u32 *iparam = info->session_param;
+
+	SET_PARAM(param, info, iparam, initial_r2t);
+	SET_PARAM(param, info, iparam, immediate_data);
+	SET_PARAM(param, info, iparam, max_connections);
+	SET_PARAM(param, info, iparam, max_recv_data_length);
+	SET_PARAM(param, info, iparam, max_xmit_data_length);
+	SET_PARAM(param, info, iparam, max_burst_length);
+	SET_PARAM(param, info, iparam, first_burst_length);
+	SET_PARAM(param, info, iparam, default_wait_time);
+	SET_PARAM(param, info, iparam, default_retain_time);
+	SET_PARAM(param, info, iparam, max_outstanding_r2t);
+	SET_PARAM(param, info, iparam, data_pdu_inorder);
+	SET_PARAM(param, info, iparam, data_sequence_inorder);
+	SET_PARAM(param, info, iparam, error_recovery_level);
+	SET_PARAM(param, info, iparam, header_digest);
+	SET_PARAM(param, info, iparam, data_digest);
+	SET_PARAM(param, info, iparam, ofmarker);
+	SET_PARAM(param, info, iparam, ifmarker);
+	SET_PARAM(param, info, iparam, ofmarkint);
+	SET_PARAM(param, info, iparam, ifmarkint);
+}
+
+static void sess_param_get(struct iscsi_sess_param *param, struct iscsi_param_info *info)
+{
+	u32 *iparam = info->session_param;
+
+	GET_PARAM(param, info, iparam, initial_r2t);
+	GET_PARAM(param, info, iparam, immediate_data);
+	GET_PARAM(param, info, iparam, max_connections);
+	GET_PARAM(param, info, iparam, max_recv_data_length);
+	GET_PARAM(param, info, iparam, max_xmit_data_length);
+	GET_PARAM(param, info, iparam, max_burst_length);
+	GET_PARAM(param, info, iparam, first_burst_length);
+	GET_PARAM(param, info, iparam, default_wait_time);
+	GET_PARAM(param, info, iparam, default_retain_time);
+	GET_PARAM(param, info, iparam, max_outstanding_r2t);
+	GET_PARAM(param, info, iparam, data_pdu_inorder);
+	GET_PARAM(param, info, iparam, data_sequence_inorder);
+	GET_PARAM(param, info, iparam, error_recovery_level);
+	GET_PARAM(param, info, iparam, header_digest);
+	GET_PARAM(param, info, iparam, data_digest);
+	GET_PARAM(param, info, iparam, ofmarker);
+	GET_PARAM(param, info, iparam, ifmarker);
+	GET_PARAM(param, info, iparam, ofmarkint);
+	GET_PARAM(param, info, iparam, ifmarkint);
+}
+
+static void trgt_param_check(struct iscsi_param_info *info)
+{
+	u32 *iparam = info->target_param;
+
+	CHECK_PARAM(info, iparam, wthreads, MIN_NR_WTHREADS, MAX_NR_WTHREADS);
+	CHECK_PARAM(info, iparam, target_type, 0,
+		    (unsigned int) ARRAY_SIZE(target_type_array) - 1);
+	CHECK_PARAM(info, iparam, queued_cmnds, MIN_NR_QUEUED_CMNDS,
+		    MAX_NR_QUEUED_CMNDS);
+	CHECK_PARAM(info, iparam, nop_interval, MIN_NOP_INTERVAL,
+		    MAX_NOP_INTERVAL);
+	CHECK_PARAM(info, iparam, nop_timeout, MIN_NOP_TIMEOUT,
+		    MAX_NOP_TIMEOUT);
+}
+
+static void trgt_param_set(struct iscsi_target *target, struct iscsi_param_info *info)
+{
+	struct iscsi_trgt_param *param = &target->trgt_param;
+	u32 *iparam = info->target_param;
+
+	if (!worker_thread_pool &&
+	    SET_PARAM(param, info, iparam, wthreads))
+		wthread_start(target->wthread_info,
+			      target->trgt_param.wthreads, target->tid);
+	SET_PARAM(param, info, iparam, target_type);
+	SET_PARAM(param, info, iparam, queued_cmnds);
+	SET_PARAM(param, info, iparam, nop_interval);
+	SET_PARAM(param, info, iparam, nop_timeout);
+}
+
+static void trgt_param_get(struct iscsi_trgt_param *param, struct iscsi_param_info *info)
+{
+	u32 *iparam = info->target_param;
+
+	GET_PARAM(param, info, iparam, wthreads);
+	GET_PARAM(param, info, iparam, target_type);
+	GET_PARAM(param, info, iparam, queued_cmnds);
+	GET_PARAM(param, info, iparam, nop_interval);
+	GET_PARAM(param, info, iparam, nop_timeout);
+}
+
+static int trgt_param(struct iscsi_target *target, struct iscsi_param_info *info, int set)
+{
+
+	if (set) {
+		trgt_param_check(info);
+		trgt_param_set(target, info);
+	} else
+		trgt_param_get(&target->trgt_param, info);
+
+	return 0;
+}
+
+static int sess_param(struct iscsi_target *target, struct iscsi_param_info *info, int set)
+{
+	struct iscsi_session *session = NULL;
+	struct iscsi_sess_param *param;
+	int err = -ENOENT;
+
+	if (set)
+		sess_param_check(info);
+
+	if (info->sid) {
+		if (!(session = session_lookup(target, info->sid)))
+			goto out;
+		param = &session->param;
+	} else {
+		param = &target->sess_param;
+	}
+
+	if (set) {
+		sess_param_set(param, info);
+		show_param(param);
+	} else
+		sess_param_get(param, info);
+
+	err = 0;
+out:
+	return err;
+}
+
+int iscsi_param_set(struct iscsi_target *target, struct iscsi_param_info *info, int set)
+{
+	int err;
+
+	if (info->param_type == key_session)
+		err = sess_param(target, info, set);
+	else if (info->param_type == key_target)
+		err = trgt_param(target, info, set);
+	else
+		err = -EINVAL;
+
+	return err;
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/iscsitarget/event.c
+++ linux-mvl-dove-2.6.32/ubuntu/iscsitarget/event.c
@@ -0,0 +1,96 @@
+/*
+ * Event notification code.
+ * (C) 2005 FUJITA Tomonori <tomof@acm.org>
+ * This code is licenced under the GPL.
+ *
+ * Some functions are based on audit code.
+ */
+
+#include <net/tcp.h>
+#include "iet_u.h"
+#include "iscsi_dbg.h"
+
+static struct sock *nl;
+static u32 ietd_pid;
+
+static int event_recv_msg(struct sk_buff *skb, struct nlmsghdr *nlh)
+{
+	u32 uid, pid, seq;
+	char *data;
+
+	pid  = NETLINK_CREDS(skb)->pid;
+	uid  = NETLINK_CREDS(skb)->uid;
+	seq  = nlh->nlmsg_seq;
+	data = NLMSG_DATA(nlh);
+
+	ietd_pid = pid;
+
+	return 0;
+}
+
+static void event_recv_skb(struct sk_buff *skb)
+{
+	int err;
+	struct nlmsghdr	*nlh;
+	u32 rlen;
+
+	while (skb->len >= NLMSG_SPACE(0)) {
+		nlh = (struct nlmsghdr *)skb->data;
+		if (nlh->nlmsg_len < sizeof(*nlh) || skb->len < nlh->nlmsg_len)
+			break;
+		rlen = NLMSG_ALIGN(nlh->nlmsg_len);
+		if (rlen > skb->len)
+			rlen = skb->len;
+		if ((err = event_recv_msg(skb, nlh))) {
+			netlink_ack(skb, nlh, -err);
+		} else if (nlh->nlmsg_flags & NLM_F_ACK)
+			netlink_ack(skb, nlh, 0);
+		skb_pull(skb, rlen);
+	}
+}
+
+static int notify(void *data, int len, int gfp_mask)
+{
+	struct sk_buff *skb;
+	struct nlmsghdr *nlh;
+	static u32 seq = 0;
+
+	if (!(skb = alloc_skb(NLMSG_SPACE(len), gfp_mask)))
+		return -ENOMEM;
+
+	nlh = __nlmsg_put(skb, ietd_pid, seq++, NLMSG_DONE, len - sizeof(*nlh), 0);
+
+	memcpy(NLMSG_DATA(nlh), data, len);
+
+	return netlink_unicast(nl, skb, ietd_pid, 0);
+}
+
+int event_send(u32 tid, u64 sid, u32 cid, u32 state, int atomic)
+{
+	int err;
+	struct iet_event event;
+
+	event.tid = tid;
+	event.sid = sid;
+	event.cid = cid;
+	event.state = state;
+
+	err = notify(&event, NLMSG_SPACE(sizeof(struct iet_event)), 0);
+
+	return err;
+}
+
+int event_init(void)
+{
+	nl = netlink_kernel_create(&init_net, NETLINK_IET, 1, event_recv_skb,
+				   NULL, THIS_MODULE);
+	if (!nl)
+		return -ENOMEM;
+	else
+		return 0;
+}
+
+void event_exit(void)
+{
+	netlink_kernel_release(nl);
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/iscsitarget/iotype.h
+++ linux-mvl-dove-2.6.32/ubuntu/iscsitarget/iotype.h
@@ -0,0 +1,29 @@
+/*
+ * (C) 2004 - 2005 FUJITA Tomonori <tomof@acm.org>
+ * This code is licenced under the GPL.
+ */
+
+#include "iscsi.h"
+
+#ifndef __IOTYPE_H__
+#define __IOTYPE_H__
+
+struct iotype {
+	const char *name;
+	struct list_head iot_list;
+
+	int (*attach)(struct iet_volume *dev, char *args);
+	int (*make_request)(struct iet_volume *dev, struct tio *tio, int rw);
+	int (*sync)(struct iet_volume *dev, struct tio *tio);
+	void (*detach)(struct iet_volume *dev);
+	void (*show)(struct iet_volume *dev, struct seq_file *seq);
+};
+
+extern struct iotype fileio;
+extern struct iotype nullio;
+extern struct iotype blockio;
+
+extern int iotype_init(void);
+extern void iotype_exit(void);
+
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/iscsitarget/nthread.c
+++ linux-mvl-dove-2.6.32/ubuntu/iscsitarget/nthread.c
@@ -0,0 +1,788 @@
+/*
+ * Network thread.
+ * (C) 2004 - 2005 FUJITA Tomonori <tomof@acm.org>
+ * (C) 2008 Arne Redlich <agr@powerkom-dd.de>
+ *
+ * This code is licenced under the GPL.
+ */
+
+#include <linux/sched.h>
+#include <linux/file.h>
+#include <linux/kthread.h>
+#include <asm/ioctls.h>
+
+#include "iscsi.h"
+#include "iscsi_dbg.h"
+#include "digest.h"
+
+enum daemon_state_bit {
+	D_ACTIVE,
+	D_DATA_READY,
+};
+
+void __nthread_wakeup(struct network_thread_info *info)
+{
+	set_bit(D_DATA_READY, &info->flags);
+	wake_up_process(info->task);
+}
+
+void nthread_wakeup(struct iscsi_target *target)
+{
+	struct network_thread_info *info = &target->nthread_info;
+
+	spin_lock_bh(&info->nthread_lock);
+	__nthread_wakeup(info);
+	spin_unlock_bh(&info->nthread_lock);
+}
+
+static inline void iscsi_conn_init_read(struct iscsi_conn *conn, void *data, size_t len)
+{
+	len = (len + 3) & -4; // XXX ???
+	conn->read_iov[0].iov_base = data;
+	conn->read_iov[0].iov_len = len;
+	conn->read_msg.msg_iov = conn->read_iov;
+	conn->read_msg.msg_iovlen = 1;
+	conn->read_size = (len + 3) & -4;
+}
+
+static void iscsi_conn_read_ahs(struct iscsi_conn *conn, struct iscsi_cmnd *cmnd)
+{
+	cmnd->pdu.ahs = kmalloc(cmnd->pdu.ahssize, __GFP_NOFAIL|GFP_KERNEL);
+	assert(cmnd->pdu.ahs);
+	iscsi_conn_init_read(conn, cmnd->pdu.ahs, cmnd->pdu.ahssize);
+}
+
+static struct iscsi_cmnd * iscsi_get_send_cmnd(struct iscsi_conn *conn)
+{
+	struct iscsi_cmnd *cmnd = NULL;
+
+	spin_lock(&conn->list_lock);
+	if (!list_empty(&conn->write_list)) {
+		cmnd = list_entry(conn->write_list.next, struct iscsi_cmnd, list);
+		list_del_init(&cmnd->list);
+	}
+	spin_unlock(&conn->list_lock);
+
+	return cmnd;
+}
+
+static int is_data_available(struct iscsi_conn *conn)
+{
+	int avail, res;
+	mm_segment_t oldfs;
+	struct socket *sock = conn->sock;
+
+	oldfs = get_fs();
+	set_fs(get_ds());
+	res = sock->ops->ioctl(sock, SIOCINQ, (unsigned long) &avail);
+	set_fs(oldfs);
+	return (res >= 0) ? avail : res;
+}
+
+static void forward_iov(struct msghdr *msg, int len)
+{
+	while (msg->msg_iov->iov_len <= len) {
+		len -= msg->msg_iov->iov_len;
+		msg->msg_iov++;
+		msg->msg_iovlen--;
+	}
+
+	msg->msg_iov->iov_base = (char *) msg->msg_iov->iov_base + len;
+	msg->msg_iov->iov_len -= len;
+}
+
+static int do_recv(struct iscsi_conn *conn, int state)
+{
+	mm_segment_t oldfs;
+	struct msghdr msg;
+	struct iovec iov[ISCSI_CONN_IOV_MAX];
+	int i, len, res;
+
+	if (!test_bit(CONN_ACTIVE, &conn->state)) {
+		res = -EIO;
+		goto out;
+	}
+
+	if (is_data_available(conn) <= 0) {
+		res = -EAGAIN;
+		goto out;
+	}
+
+	msg.msg_iov = iov;
+	msg.msg_iovlen = min_t(size_t, conn->read_msg.msg_iovlen, ISCSI_CONN_IOV_MAX);
+	for (i = 0, len = 0; i < msg.msg_iovlen; i++) {
+		iov[i] = conn->read_msg.msg_iov[i];
+		len += iov[i].iov_len;
+	}
+
+	oldfs = get_fs();
+	set_fs(get_ds());
+	res = sock_recvmsg(conn->sock, &msg, len, MSG_DONTWAIT | MSG_NOSIGNAL);
+	set_fs(oldfs);
+
+	if (res <= 0) {
+		switch (res) {
+		case -EAGAIN:
+		case -ERESTARTSYS:
+			break;
+		default:
+			eprintk("%d\n", res);
+			conn_close(conn);
+			break;
+		}
+	} else {
+		conn->read_size -= res;
+		if (conn->read_size)
+			forward_iov(&conn->read_msg, res);
+		else
+			conn->read_state = state;
+	}
+
+out:
+	dprintk(D_IOD, "%d\n", res);
+
+	return res;
+}
+
+enum rx_state {
+	RX_INIT_BHS, /* Must be zero. */
+	RX_BHS,
+
+	RX_INIT_AHS,
+	RX_AHS,
+
+	RX_INIT_HDIGEST,
+	RX_HDIGEST,
+	RX_CHECK_HDIGEST,
+
+	RX_INIT_DATA,
+	RX_DATA,
+
+	RX_INIT_DDIGEST,
+	RX_DDIGEST,
+	RX_CHECK_DDIGEST,
+
+	RX_END,
+};
+
+static void rx_ddigest(struct iscsi_conn *conn, int state)
+{
+	struct iscsi_cmnd *cmnd = conn->read_cmnd;
+	int res = digest_rx_data(cmnd);
+
+	if (!res)
+		conn->read_state = state;
+	else
+		conn_close(conn);
+}
+
+static void rx_hdigest(struct iscsi_conn *conn, int state)
+{
+	struct iscsi_cmnd *cmnd = conn->read_cmnd;
+	int res = digest_rx_header(cmnd);
+
+	if (!res)
+		conn->read_state = state;
+	else
+		conn_close(conn);
+}
+
+static struct iscsi_cmnd *create_cmnd(struct iscsi_conn *conn)
+{
+	struct iscsi_cmnd *cmnd;
+
+	cmnd = cmnd_alloc(conn, 1);
+	iscsi_conn_init_read(cmnd->conn, &cmnd->pdu.bhs, sizeof(cmnd->pdu.bhs));
+	conn->read_state = RX_BHS;
+
+	return cmnd;
+}
+
+static int recv(struct iscsi_conn *conn)
+{
+	struct iscsi_cmnd *cmnd = conn->read_cmnd;
+	int hdigest, ddigest, res = 1;
+
+	if (!test_bit(CONN_ACTIVE, &conn->state))
+		return -EIO;
+
+	hdigest = conn->hdigest_type & DIGEST_NONE ? 0 : 1;
+	ddigest = conn->ddigest_type & DIGEST_NONE ? 0 : 1;
+
+	switch (conn->read_state) {
+	case RX_INIT_BHS:
+		assert(!cmnd);
+		cmnd = conn->read_cmnd = create_cmnd(conn);
+	case RX_BHS:
+		res = do_recv(conn, RX_INIT_AHS);
+		if (res <= 0 || conn->read_state != RX_INIT_AHS)
+			break;
+	case RX_INIT_AHS:
+		iscsi_cmnd_get_length(&cmnd->pdu);
+		if (cmnd->pdu.ahssize) {
+			iscsi_conn_read_ahs(conn, cmnd);
+			conn->read_state = RX_AHS;
+		} else
+			conn->read_state = hdigest ? RX_INIT_HDIGEST : RX_INIT_DATA;
+
+		if (conn->read_state != RX_AHS)
+			break;
+	case RX_AHS:
+		res = do_recv(conn, hdigest ? RX_INIT_HDIGEST : RX_INIT_DATA);
+		if (res <= 0 || conn->read_state != RX_INIT_HDIGEST)
+			break;
+	case RX_INIT_HDIGEST:
+		iscsi_conn_init_read(conn, &cmnd->hdigest, sizeof(u32));
+		conn->read_state = RX_HDIGEST;
+	case RX_HDIGEST:
+		res = do_recv(conn, RX_CHECK_HDIGEST);
+		if (res <= 0 || conn->read_state != RX_CHECK_HDIGEST)
+			break;
+	case RX_CHECK_HDIGEST:
+		rx_hdigest(conn, RX_INIT_DATA);
+		if (conn->read_state != RX_INIT_DATA)
+			break;
+	case RX_INIT_DATA:
+		cmnd_rx_start(cmnd);
+		conn->read_state = cmnd->pdu.datasize ? RX_DATA : RX_END;
+		if (conn->read_state != RX_DATA)
+			break;
+	case RX_DATA:
+		res = do_recv(conn, ddigest ? RX_INIT_DDIGEST : RX_END);
+		if (res <= 0 || conn->read_state != RX_INIT_DDIGEST)
+			break;
+	case RX_INIT_DDIGEST:
+		iscsi_conn_init_read(conn, &cmnd->ddigest, sizeof(u32));
+		conn->read_state = RX_DDIGEST;
+	case RX_DDIGEST:
+		res = do_recv(conn, RX_CHECK_DDIGEST);
+		if (res <= 0 || conn->read_state != RX_CHECK_DDIGEST)
+			break;
+	case RX_CHECK_DDIGEST:
+		rx_ddigest(conn, RX_END);
+		break;
+	default:
+		eprintk("%d %d %x\n", res, conn->read_state, cmnd_opcode(cmnd));
+		assert(0);
+	}
+
+	if (res <= 0)
+		return res;
+
+	if (conn->read_state != RX_END)
+		return res;
+
+	if (conn->read_size) {
+		eprintk("%d %x %d\n", res, cmnd_opcode(cmnd), conn->read_size);
+		assert(0);
+	}
+
+	cmnd_rx_end(cmnd);
+	if (conn->read_size) {
+		eprintk("%x %d\n", cmnd_opcode(cmnd), conn->read_size);
+		conn->read_state = RX_DATA;
+		return 1;
+	}
+
+	conn->read_cmnd = NULL;
+	conn->read_state = RX_INIT_BHS;
+
+	return 0;
+}
+
+/*
+ * @locking: grabs the target's nthread_lock to protect it from races with
+ * iet_write_space()
+ */
+static void set_conn_wspace_wait(struct iscsi_conn *conn)
+{
+	struct network_thread_info *info = &conn->session->target->nthread_info;
+	struct sock *sk = conn->sock->sk;
+
+	spin_lock_bh(&info->nthread_lock);
+
+	if (sk_stream_wspace(sk) < sk_stream_min_wspace(sk))
+		set_bit(CONN_WSPACE_WAIT, &conn->state);
+
+	spin_unlock_bh(&info->nthread_lock);
+}
+
+/* This is taken from the Ardis code. */
+static int write_data(struct iscsi_conn *conn)
+{
+	mm_segment_t oldfs;
+	struct file *file;
+	struct socket *sock;
+	ssize_t (*sendpage)(struct socket *, struct page *, int, size_t, int);
+	struct tio *tio;
+	struct iovec *iop;
+	int saved_size, size, sendsize;
+	int offset, idx;
+	int flags, res;
+
+	file = conn->file;
+	saved_size = size = conn->write_size;
+	iop = conn->write_iop;
+
+	if (iop) while (1) {
+		loff_t off = 0;
+		unsigned long count;
+		struct iovec *vec;
+		int rest;
+
+		vec = iop;
+		for (count = 0; vec->iov_len; count++, vec++)
+			;
+		oldfs = get_fs();
+		set_fs(KERNEL_DS);
+		res = vfs_writev(file, (struct iovec __user *) iop, count, &off);
+		set_fs(oldfs);
+		dprintk(D_DATA, "%#Lx:%u: %d(%ld)\n",
+			(unsigned long long) conn->session->sid, conn->cid,
+			res, (long) iop->iov_len);
+		if (unlikely(res <= 0)) {
+			if (res == -EAGAIN || res == -EINTR) {
+				conn->write_iop = iop;
+				goto out_iov;
+			}
+			goto err;
+		}
+
+		rest = res;
+		size -= res;
+		while (iop->iov_len <= rest && rest) {
+			rest -= iop->iov_len;
+			iop++;
+		}
+		iop->iov_base += rest;
+		iop->iov_len -= rest;
+
+		if (!iop->iov_len) {
+			conn->write_iop = NULL;
+			if (size)
+				break;
+			goto out_iov;
+		}
+	}
+
+	if (!(tio = conn->write_tcmnd)) {
+		eprintk("%s\n", "warning data missing!");
+		return 0;
+	}
+	offset = conn->write_offset;
+	idx = offset >> PAGE_CACHE_SHIFT;
+	offset &= ~PAGE_CACHE_MASK;
+
+	sock = conn->sock;
+	sendpage = sock->ops->sendpage ? : sock_no_sendpage;
+	flags = MSG_DONTWAIT;
+
+	while (1) {
+		sendsize = PAGE_CACHE_SIZE - offset;
+		if (size <= sendsize) {
+			res = sendpage(sock, tio->pvec[idx], offset, size, flags);
+			dprintk(D_DATA, "%s %#Lx:%u: %d(%lu,%u,%u)\n",
+				sock->ops->sendpage ? "sendpage" : "writepage",
+				(unsigned long long ) conn->session->sid, conn->cid,
+				res, tio->pvec[idx]->index, offset, size);
+			if (unlikely(res <= 0)) {
+				if (res == -EAGAIN || res == -EINTR) {
+					goto out;
+				}
+				goto err;
+			}
+			if (res == size) {
+				conn->write_tcmnd = NULL;
+				conn->write_size = 0;
+				return saved_size;
+			}
+			offset += res;
+			size -= res;
+			continue;
+		}
+
+		res = sendpage(sock, tio->pvec[idx], offset,sendsize, flags | MSG_MORE);
+		dprintk(D_DATA, "%s %#Lx:%u: %d(%lu,%u,%u)\n",
+			sock->ops->sendpage ? "sendpage" : "writepage",
+			(unsigned long long ) conn->session->sid, conn->cid,
+			res, tio->pvec[idx]->index, offset, sendsize);
+		if (unlikely(res <= 0)) {
+			if (res == -EAGAIN || res == -EINTR) {
+				goto out;
+			}
+			goto err;
+		}
+		if (res == sendsize) {
+			idx++;
+			offset = 0;
+		} else
+			offset += res;
+		size -= res;
+	}
+ out:
+	conn->write_offset = (idx << PAGE_CACHE_SHIFT) + offset;
+ out_iov:
+	conn->write_size = size;
+	if (res == -EAGAIN) {
+		set_conn_wspace_wait(conn);
+		if (saved_size == size)
+			return res;
+	}
+
+	return saved_size - size;
+
+ err:
+	eprintk("error %d at %#Lx:%u\n", res,
+		(unsigned long long) conn->session->sid, conn->cid);
+	return res;
+}
+
+static void exit_tx(struct iscsi_conn *conn, int res)
+{
+	if (res > 0)
+		return;
+
+	switch (res) {
+	case -EAGAIN:
+	case -ERESTARTSYS:
+		break;
+	default:
+		eprintk("%d %d %d\n", conn->write_size, conn->write_state, res);
+		conn_close(conn);
+		break;
+	}
+}
+
+static int tx_ddigest(struct iscsi_cmnd *cmnd, int state)
+{
+	int res, rest = cmnd->conn->write_size;
+	struct msghdr msg = {.msg_flags = MSG_NOSIGNAL | MSG_DONTWAIT};
+	struct kvec iov;
+
+	iov.iov_base = (char *) (&cmnd->ddigest) + (sizeof(u32) - rest);
+	iov.iov_len = rest;
+
+	res = kernel_sendmsg(cmnd->conn->sock, &msg, &iov, 1, rest);
+
+	if (res > 0) {
+		cmnd->conn->write_size -= res;
+		if (!cmnd->conn->write_size)
+			cmnd->conn->write_state = state;
+	} else
+		exit_tx(cmnd->conn, res);
+
+	return res;
+}
+
+static void init_tx_hdigest(struct iscsi_cmnd *cmnd)
+{
+	struct iscsi_conn *conn = cmnd->conn;
+	struct iovec *iop;
+
+	if (conn->hdigest_type & DIGEST_NONE)
+		return;
+
+	digest_tx_header(cmnd);
+
+	for (iop = conn->write_iop; iop->iov_len; iop++)
+		;
+	iop->iov_base = &(cmnd->hdigest);
+	iop->iov_len = sizeof(u32);
+	conn->write_size += sizeof(u32);
+	iop++;
+	iop->iov_len = 0;
+
+	return;
+}
+
+enum tx_state {
+	TX_INIT, /* Must be zero. */
+	TX_BHS_DATA,
+	TX_INIT_DDIGEST,
+	TX_DDIGEST,
+	TX_END,
+};
+
+static int do_send(struct iscsi_conn *conn, int state)
+{
+	int res;
+
+	res = write_data(conn);
+
+	if (res > 0) {
+		if (!conn->write_size)
+			conn->write_state = state;
+	} else
+		exit_tx(conn, res);
+
+	return res;
+}
+
+static int send(struct iscsi_conn *conn)
+{
+	struct iscsi_cmnd *cmnd = conn->write_cmnd;
+	int ddigest, res = 0;
+
+	ddigest = conn->ddigest_type != DIGEST_NONE ? 1 : 0;
+
+	switch (conn->write_state) {
+	case TX_INIT:
+		assert(!cmnd);
+		cmnd = conn->write_cmnd = iscsi_get_send_cmnd(conn);
+		if (!cmnd)
+			return 0;
+		cmnd_tx_start(cmnd);
+		init_tx_hdigest(cmnd);
+		conn->write_state = TX_BHS_DATA;
+	case TX_BHS_DATA:
+		res = do_send(conn, ddigest && cmnd->pdu.datasize ? TX_INIT_DDIGEST : TX_END);
+		if (res <= 0 || conn->write_state != TX_INIT_DDIGEST)
+			break;
+	case TX_INIT_DDIGEST:
+		digest_tx_data(cmnd);
+		assert(!cmnd->conn->write_size);
+		cmnd->conn->write_size += sizeof(u32);
+		conn->write_state = TX_DDIGEST;
+	case TX_DDIGEST:
+		res = tx_ddigest(cmnd, TX_END);
+		break;
+	default:
+		eprintk("%d %d %x\n", res, conn->write_state, cmnd_opcode(cmnd));
+		assert(0);
+	}
+
+	if (res <= 0)
+		return res;
+
+	if (conn->write_state != TX_END)
+		return res;
+
+	if (conn->write_size) {
+		eprintk("%d %x %u\n", res, cmnd_opcode(cmnd), conn->write_size);
+		assert(!conn->write_size);
+	}
+	cmnd_tx_end(cmnd);
+	cmnd_release(cmnd, 0);
+	conn->write_cmnd = NULL;
+	conn->write_state = TX_INIT;
+
+	return 0;
+}
+
+static void conn_nop_timeout(unsigned long data)
+{
+	struct iscsi_conn *conn = (struct iscsi_conn *)data;
+
+	if (test_bit(CONN_ACTIVE, &conn->state))
+		set_bit(CONN_NEED_NOP_IN, &conn->state);
+
+	dprintk(D_THREAD, "conn %llu:%hu, NOP timer %p\n", conn->session->sid,
+		conn->cid, &conn->nop_timer);
+
+	nthread_wakeup(conn->session->target);
+}
+
+static void conn_reset_nop_timer(struct iscsi_conn *conn)
+{
+	struct iscsi_target *target = conn->session->target;
+
+	if (target->trgt_param.nop_interval)
+		mod_timer(&conn->nop_timer,
+			  jiffies + HZ * target->trgt_param.nop_interval);
+}
+
+static void conn_start_nop_timer(struct iscsi_conn *conn)
+{
+	struct iscsi_target *target = conn->session->target;
+
+	if (!target->trgt_param.nop_interval || timer_pending(&conn->nop_timer))
+		return;
+
+	conn->nop_timer.data = (unsigned long)conn;
+	conn->nop_timer.function = conn_nop_timeout;
+
+	dprintk(D_THREAD, "conn %llu:%hu, NOP timer %p\n", conn->session->sid,
+		conn->cid, &conn->nop_timer);
+
+	mod_timer(&conn->nop_timer,
+		  jiffies + HZ * target->trgt_param.nop_interval);
+}
+
+static void process_io(struct iscsi_conn *conn)
+{
+	struct iscsi_target *target = conn->session->target;
+	int res, wakeup = 0;
+
+	res = recv(conn);
+
+	if (is_data_available(conn) > 0 || res > 0) {
+		conn_reset_nop_timer(conn);
+		wakeup = 1;
+	}
+
+	if (!test_bit(CONN_ACTIVE, &conn->state)) {
+		wakeup = 1;
+		goto out;
+	}
+
+	if (test_bit(CONN_WSPACE_WAIT, &conn->state))
+		goto out;
+
+	res = send(conn);
+
+	if (!list_empty(&conn->write_list) || conn->write_cmnd) {
+		conn_reset_nop_timer(conn);
+		wakeup = 1;
+	}
+
+out:
+	if (wakeup)
+		nthread_wakeup(target);
+	else if (test_and_clear_bit(CONN_NEED_NOP_IN, &conn->state)) {
+		send_nop_in(conn);
+		nthread_wakeup(target);
+	} else
+		conn_start_nop_timer(conn);
+
+	return;
+}
+
+static void close_conn(struct iscsi_conn *conn)
+{
+	struct iscsi_session *session = conn->session;
+	struct iscsi_target *target = conn->session->target;
+	struct iscsi_cmnd *cmnd;
+
+	if (target->trgt_param.nop_interval)
+		del_timer_sync(&conn->nop_timer);
+
+	conn->sock->ops->shutdown(conn->sock, 2);
+
+	write_lock_bh(&conn->sock->sk->sk_callback_lock);
+	conn->sock->sk->sk_state_change = target->nthread_info.old_state_change;
+	conn->sock->sk->sk_data_ready = target->nthread_info.old_data_ready;
+	conn->sock->sk->sk_write_space = target->nthread_info.old_write_space;
+	write_unlock_bh(&conn->sock->sk->sk_callback_lock);
+
+	fput(conn->file);
+	conn->file = NULL;
+	conn->sock = NULL;
+
+	while (atomic_read(&conn->nr_busy_cmnds))
+		yield();
+
+	while (!list_empty(&conn->pdu_list)) {
+		cmnd = list_entry(conn->pdu_list.next, struct iscsi_cmnd, conn_list);
+
+		list_del_init(&cmnd->list);
+		cmnd_release(cmnd, 1);
+	}
+
+	if (atomic_read(&conn->nr_cmnds)) {
+		eprintk("%u\n", atomic_read(&conn->nr_cmnds));
+		list_for_each_entry(cmnd, &conn->pdu_list, conn_list)
+			eprintk("%x %x\n", cmnd_opcode(cmnd), cmnd_itt(cmnd));
+		assert(0);
+	}
+
+	event_send(target->tid, session->sid, conn->cid, E_CONN_CLOSE, 0);
+	conn_free(conn);
+
+	if (list_empty(&session->conn_list)) {
+		if (session->done)
+			complete(session->done);
+		else
+			session_del(target, session->sid);
+	}
+}
+
+static int istd(void *arg)
+{
+	struct iscsi_target *target = arg;
+	struct network_thread_info *info = &target->nthread_info;
+	struct iscsi_conn *conn, *tmp;
+
+	__set_current_state(TASK_RUNNING);
+	do {
+		spin_lock_bh(&info->nthread_lock);
+		__set_current_state(TASK_INTERRUPTIBLE);
+
+		if (!test_bit(D_DATA_READY, &info->flags)) {
+			spin_unlock_bh(&info->nthread_lock);
+			schedule();
+			spin_lock_bh(&info->nthread_lock);
+		}
+		__set_current_state(TASK_RUNNING);
+		clear_bit(D_DATA_READY, &info->flags);
+		spin_unlock_bh(&info->nthread_lock);
+
+		target_lock(target, 0);
+		list_for_each_entry_safe(conn, tmp, &info->active_conns, poll_list) {
+			if (test_bit(CONN_ACTIVE, &conn->state))
+				process_io(conn);
+			else
+				close_conn(conn);
+		}
+		target_unlock(target);
+
+	} while (!kthread_should_stop());
+
+	return 0;
+}
+
+int nthread_init(struct iscsi_target *target)
+{
+	struct network_thread_info *info = &target->nthread_info;
+
+	info->flags = 0;
+	info->task = NULL;
+
+	info->old_state_change = NULL;
+	info->old_data_ready = NULL;
+	info->old_write_space = NULL;
+
+	INIT_LIST_HEAD(&info->active_conns);
+
+	spin_lock_init(&info->nthread_lock);
+
+	return 0;
+}
+
+int nthread_start(struct iscsi_target *target)
+{
+	int err = 0;
+	struct network_thread_info *info = &target->nthread_info;
+	struct task_struct *task;
+
+	if (info->task) {
+		eprintk("Target (%u) already runs\n", target->tid);
+		return -EALREADY;
+	}
+
+	task = kthread_run(istd, target, "istd%d", target->tid);
+
+	if (IS_ERR(task))
+		err = PTR_ERR(task);
+	else
+		info->task = task;
+
+	return err;
+}
+
+int nthread_stop(struct iscsi_target *target)
+{
+	int err;
+	struct network_thread_info *info = &target->nthread_info;
+
+	if (!info->task)
+		return -ESRCH;
+
+	err = kthread_stop(info->task);
+
+	if (err < 0 && err != -EINTR)
+		return err;
+
+	info->task = NULL;
+
+	return 0;
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/iscsitarget/include/iet_u.h
+++ linux-mvl-dove-2.6.32/ubuntu/iscsitarget/include/iet_u.h
@@ -0,0 +1,149 @@
+#ifndef _IET_U_H
+#define _IET_U_H
+
+#define IET_VERSION_STRING	"1.4.19"
+
+/* The maximum length of 223 bytes in the RFC. */
+#define ISCSI_NAME_LEN	256
+#define ISCSI_ARGS_LEN	2048
+
+#define ISCSI_LISTEN_PORT	3260
+
+#define VENDOR_ID_LEN	8
+#define SCSI_ID_LEN	24
+#define SCSI_SN_LEN	16
+
+#ifndef aligned_u64
+#define aligned_u64 unsigned long long __attribute__((aligned(8)))
+#endif
+
+struct target_info {
+	u32 tid;
+	char name[ISCSI_NAME_LEN];
+};
+
+struct volume_info {
+	u32 tid;
+	u32 lun;
+	aligned_u64 args_ptr;
+	u32 args_len;
+};
+
+struct session_info {
+	u32 tid;
+
+	aligned_u64 sid;
+	char initiator_name[ISCSI_NAME_LEN];
+	u32 exp_cmd_sn;
+	u32 max_cmd_sn;
+};
+
+#define DIGEST_ALL	(DIGEST_NONE | DIGEST_CRC32C)
+#define DIGEST_NONE		(1 << 0)
+#define DIGEST_CRC32C           (1 << 1)
+
+struct conn_info {
+	u32 tid;
+	aligned_u64 sid;
+
+	u32 cid;
+	u32 stat_sn;
+	u32 exp_stat_sn;
+	int header_digest;
+	int data_digest;
+	int fd;
+};
+
+enum {
+	key_initial_r2t,
+	key_immediate_data,
+	key_max_connections,
+	key_max_recv_data_length,
+	key_max_xmit_data_length,
+	key_max_burst_length,
+	key_first_burst_length,
+	key_default_wait_time,
+	key_default_retain_time,
+	key_max_outstanding_r2t,
+	key_data_pdu_inorder,
+	key_data_sequence_inorder,
+	key_error_recovery_level,
+	key_header_digest,
+	key_data_digest,
+	key_ofmarker,
+	key_ifmarker,
+	key_ofmarkint,
+	key_ifmarkint,
+	session_key_last,
+};
+
+enum {
+	key_wthreads,
+	key_target_type,
+	key_queued_cmnds,
+	key_nop_interval,
+	key_nop_timeout,
+	target_key_last,
+};
+
+enum {
+	key_session,
+	key_target,
+};
+
+struct iscsi_param_info {
+	u32 tid;
+	aligned_u64 sid;
+
+	u32 param_type;
+	u32 partial;
+
+	u32 session_param[session_key_last];
+	u32 target_param[target_key_last];
+};
+
+enum iet_event_state {
+	E_CONN_CLOSE,
+};
+
+struct iet_event {
+	u32 tid;
+	aligned_u64 sid;
+	u32 cid;
+	u32 state;
+};
+
+#define	DEFAULT_NR_WTHREADS	8
+#define	MIN_NR_WTHREADS		1
+#define	MAX_NR_WTHREADS		128
+
+#define	DEFAULT_NR_QUEUED_CMNDS	32
+#define	MIN_NR_QUEUED_CMNDS	1
+#define	MAX_NR_QUEUED_CMNDS	256
+
+#define DEFAULT_NOP_INTERVAL 	0
+#define MIN_NOP_INTERVAL 	0
+#define MAX_NOP_INTERVAL 	90
+
+#define	DEFAULT_NOP_TIMEOUT 	0
+#define MIN_NOP_TIMEOUT 	0
+#define MAX_NOP_TIMEOUT		90
+
+#define NETLINK_IET	21
+
+#define ADD_TARGET _IOW('i', 0, struct target_info)
+#define DEL_TARGET _IOW('i', 1, struct target_info)
+#define START_TARGET _IO('i', 2)
+#define STOP_TARGET _IO('i', 3)
+#define ADD_VOLUME _IOW('i', 4, struct volume_info)
+#define DEL_VOLUME _IOW('i', 5, struct volume_info)
+#define ADD_SESSION _IOW('i', 6, struct session_info)
+#define DEL_SESSION _IOW('i', 7, struct session_info)
+#define GET_SESSION_INFO _IOWR('i', 8, struct session_info)
+#define ADD_CONN _IOW('i', 9, struct conn_info)
+#define DEL_CONN _IOW('i', 10, struct conn_info)
+#define GET_CONN_INFO _IOWR('i', 11, struct conn_info)
+#define ISCSI_PARAM_SET _IOW('i', 12, struct iscsi_param_info)
+#define ISCSI_PARAM_GET _IOWR('i', 13, struct iscsi_param_info)
+
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/Kconfig
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/Kconfig
@@ -0,0 +1,88 @@
+config LIRC_DEV
+	tristate "LIRC Device support"
+	default m
+
+config LIRC_ATIUSB
+	tristate "LIRC ATI RF Remote"
+	default m
+	depends on LIRC_DEV
+
+config LIRC_BT829
+	tristate "LIRC BT829"
+	default m
+	depends on LIRC_DEV
+
+config LIRC_ENE0100
+	tristate "LIRC ENE0100"
+	default m
+	depends on LIRC_DEV
+
+config LIRC_I2C
+	tristate "LIRC I2C interface remote"
+	default m
+	depends on LIRC_DEV
+
+config LIRC_IGORPLUGUSB
+	tristate "LIRC IGOR custom remote"
+	default m
+	depends on LIRC_DEV
+
+config LIRC_IMON
+	tristate "LIRC Imon remote or pad"
+	default m
+	depends on LIRC_DEV
+
+config LIRC_IT87
+	tristate "LIRC IT87"
+	default m
+	depends on LIRC_DEV
+
+config LIRC_ITE8709
+	tristate "LIRC ITE8709"
+	default m
+	depends on LIRC_DEV
+
+config LIRC_MCEUSB
+	tristate "LIRC Microsoft Media Center Remote"
+	default m
+	depends on LIRC_DEV
+
+config LIRC_PARALLEL
+	tristate "LIRC Parallel port custom remote"
+	default n
+	depends on LIRC_DEV
+
+config LIRC_SASEM
+	tristate "LIRC Sasem"
+	default m
+	depends on LIRC_DEV
+
+config LIRC_SERIAL
+	tristate "LIRC Serial port remote"
+	default m
+	depends on LIRC_DEV
+
+config LIRC_SIR
+	tristate "LIRC Laptop port IR (SIR))"
+	default m
+	depends on LIRC_DEV
+
+config LIRC_STREAMZAP
+	tristate "LIRC Streamzap remote"
+	default m
+	depends on LIRC_DEV
+
+config LIRC_TTUSBIR
+	tristate "LIRC TT USB IR device"
+	default m
+	depends on LIRC_DEV
+
+config LIRC_CONFIG_LIRC_WPC8769L
+	tristate "LIRC WPC8769L device"
+	default m
+	depends on LIRC_DEV
+
+config LIRC_GPIO
+	tristate "LIRC TV Card GPIO remote"
+	default n
+	depends on LIRC_DEV
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/Makefile
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/Makefile
@@ -0,0 +1,23 @@
+#include $(src)/../../.config
+
+EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)
+
+obj-$(CONFIG_LIRC_DEV)		+= lirc_dev/
+obj-$(CONFIG_LIRC_ATIUSB)	+= lirc_atiusb/
+obj-$(CONFIG_LIRC_BT829)	+= lirc_bt829/
+obj-$(CONFIG_LIRC_ENE0100)	+= lirc_ene0100/
+obj-$(CONFIG_LIRC_I2C)		+= lirc_i2c/
+obj-$(CONFIG_LIRC_IGORPLUGUSB)	+= lirc_igorplugusb/
+obj-$(CONFIG_LIRC_IMON)		+= lirc_imon/
+obj-$(CONFIG_LIRC_IT87)		+= lirc_it87/
+obj-$(CONFIG_LIRC_ITE8709)	+= lirc_ite8709/
+obj-$(CONFIG_LIRC_MCEUSB)	+= lirc_mceusb/
+obj-$(CONFIG_LIRC_PARALLEL)	+= lirc_parallel/
+obj-$(CONFIG_LIRC_SASEM)	+= lirc_sasem/
+obj-$(CONFIG_LIRC_SERIAL)	+= lirc_serial/
+obj-$(CONFIG_LIRC_SIR)		+= lirc_sir/
+obj-$(CONFIG_LIRC_STREAMZAP)	+= lirc_streamzap/
+obj-$(CONFIG_LIRC_TTUSBIR)	+= lirc_ttusbir/
+obj-$(CONFIG_LIRC_GPIO)		+= lirc_gpio/
+obj-$(CONFIG_LIRC_TTUSBIR)	+= lirc_ttusbir/
+obj-$(CONFIG_LIRC_WPC8769L)	+= lirc_wpc8769l/
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/kcompat.h
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/kcompat.h
@@ -0,0 +1,402 @@
+/*      $Id: kcompat.h,v 5.44 2009/03/22 08:45:47 lirc Exp $      */
+
+#ifndef _KCOMPAT_H
+#define _KCOMPAT_H
+
+#include <linux/version.h>
+
+#ifndef __func__
+#define __func__ __FUNCTION__
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 16)
+#define LIRC_THIS_MODULE(x) x,
+#else /* >= 2.6.16 */
+#define LIRC_THIS_MODULE(x)
+#endif
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 0)
+
+#include <linux/device.h>
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18)
+#define LIRC_HAVE_DEVFS
+#define LIRC_HAVE_DEVFS_26
+#endif
+
+#define LIRC_HAVE_SYSFS
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 13)
+
+typedef struct class_simple lirc_class_t;
+
+static inline lirc_class_t *class_create(struct module *owner, char *name)
+{
+	return class_simple_create(owner, name);
+}
+
+static inline void class_destroy(lirc_class_t *cls)
+{
+	class_simple_destroy(cls);
+}
+
+#define lirc_device_create(cs, parent, dev, drvdata, fmt, args...) \
+	class_simple_device_add(cs, dev, parent, fmt, ## args)
+
+static inline void lirc_device_destroy(lirc_class_t *cls, dev_t devt)
+{
+	class_simple_device_remove(devt);
+}
+
+#else /* >= 2.6.13 */
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 15)
+
+#define lirc_device_create(cs, parent, dev, drvdata, fmt, args...) \
+	class_device_create(cs, dev, parent, fmt, ## args)
+
+#else /* >= 2.6.15 */
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 26)
+
+#define lirc_device_create(cs, parent, dev, drvdata, fmt, args...) \
+	class_device_create(cs, NULL, dev, parent, fmt, ## args)
+
+#else /* >= 2.6.26 */
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 27)
+
+#define lirc_device_create(cs, parent, dev, drvdata, fmt, args...) \
+	device_create(cs, parent, dev, fmt, ## args)
+
+#else /* >= 2.6.27 */
+
+#define lirc_device_create device_create
+
+#endif /* >= 2.6.27 */
+
+#endif /* >= 2.6.26 */
+
+#define LIRC_DEVFS_PREFIX
+
+#endif /* >= 2.6.15 */
+
+typedef struct class lirc_class_t;
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 26)
+
+#define lirc_device_destroy class_device_destroy
+
+#else
+
+#define lirc_device_destroy device_destroy
+
+#endif
+
+#endif /* >= 2.6.13 */
+
+#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2, 4, 0)
+#define LIRC_HAVE_DEVFS
+#define LIRC_HAVE_DEVFS_24
+#endif
+
+#ifndef LIRC_DEVFS_PREFIX
+#define LIRC_DEVFS_PREFIX "usb/"
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 3, 0)
+#include <linux/timer.h>
+#include <linux/interrupt.h>
+static inline void del_timer_sync(struct timer_list *timerlist)
+{
+	start_bh_atomic();
+	del_timer(timerlist);
+	end_bh_atomic();
+}
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 0)
+#ifdef daemonize
+#undef daemonize
+#endif
+#define daemonize(name) do {		\
+					\
+	lock_kernel();			\
+					\
+	exit_mm(current);		\
+	exit_files(current);		\
+	exit_fs(current);		\
+	current->session = 1;		\
+	current->pgrp = 1;		\
+	current->euid = 0;		\
+	current->tty = NULL;		\
+	sigfillset(&current->blocked);	\
+					\
+	strcpy(current->comm, name);	\
+					\
+	unlock_kernel();		\
+					\
+} while (0)
+
+/* Not sure when this was introduced, sometime during 2.5.X */
+#define MODULE_PARM_int(x) MODULE_PARM(x, "i")
+#define MODULE_PARM_bool(x) MODULE_PARM(x, "i")
+#define MODULE_PARM_long(x) MODULE_PARM(x, "l")
+#define module_param(x, y, z) MODULE_PARM_##y(x)
+#else
+#include <linux/moduleparam.h>
+#endif /* Linux < 2.6.0 */
+
+/* DevFS header */
+#if defined(LIRC_HAVE_DEVFS)
+#include <linux/devfs_fs_kernel.h>
+#endif
+
+#ifdef LIRC_HAVE_DEVFS_24
+#ifdef register_chrdev
+#undef register_chrdev
+#endif
+#define register_chrdev devfs_register_chrdev
+#ifdef unregister_chrdev
+#undef unregister_chrdev
+#endif
+#define unregister_chrdev devfs_unregister_chrdev
+#endif /* DEVFS 2.4 */
+
+#ifndef LIRC_HAVE_SYSFS
+#define class_destroy(x) do { } while (0)
+#define class_create(x, y) NULL
+#define lirc_device_destroy(x, y) do { } while (0)
+#define lirc_device_create(x, y, z, xx, yy, zz) 0
+#define IS_ERR(x) 0
+typedef struct class_simple
+{
+	int notused;
+} lirc_class_t;
+#endif /* No SYSFS */
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 5, 0)
+#define KERNEL_2_5
+
+/*
+ * We still are using MOD_INC_USE_COUNT/MOD_DEC_USE_COUNT in the set_use_inc
+ * function of all modules for 2.4 kernel compatibility.
+ *
+ * For 2.6 kernels reference counting is done in lirc_dev by
+ * try_module_get()/module_put() because the old approach is racy.
+ *
+ */
+#ifdef MOD_INC_USE_COUNT
+#undef MOD_INC_USE_COUNT
+#endif
+#define MOD_INC_USE_COUNT
+
+#ifdef MOD_DEC_USE_COUNT
+#undef MOD_DEC_USE_COUNT
+#endif
+#define MOD_DEC_USE_COUNT
+
+#ifdef EXPORT_NO_SYMBOLS
+#undef EXPORT_NO_SYMBOLS
+#endif
+#define EXPORT_NO_SYMBOLS
+
+#else  /* Kernel < 2.5.0 */
+
+static inline int try_module_get(struct module *module)
+{
+	return 1;
+}
+
+static inline void module_put(struct module *module)
+{
+}
+
+#endif /* Kernel >= 2.5.0 */
+
+#ifndef MODULE_LICENSE
+#define MODULE_LICENSE(x)
+#endif
+
+#ifndef MODULE_PARM_DESC
+#define MODULE_PARM_DESC(x, y)
+#endif
+
+#ifndef MODULE_ALIAS_CHARDEV_MAJOR
+#define MODULE_ALIAS_CHARDEV_MAJOR(x)
+#endif
+
+#ifndef MODULE_DEVICE_TABLE
+#define MODULE_DEVICE_TABLE(x, y)
+#endif
+
+#include <linux/interrupt.h>
+#ifndef IRQ_RETVAL
+typedef void irqreturn_t;
+#define IRQ_NONE
+#define IRQ_HANDLED
+#define IRQ_RETVAL(x)
+#endif
+
+#ifndef MOD_IN_USE
+#ifdef CONFIG_MODULE_UNLOAD
+#define MOD_IN_USE module_refcount(THIS_MODULE)
+#else
+#error "LIRC modules currently require"
+#error "  'Loadable module support  --->  Module unloading'"
+#error "to be enabled in the kernel"
+#endif
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18)
+#if !defined(local_irq_save)
+#define local_irq_save(flags) do { save_flags(flags); cli(); } while (0)
+#endif
+#if !defined(local_irq_restore)
+#define local_irq_restore(flags) do { restore_flags(flags); } while (0)
+#endif
+#endif
+
+#if KERNEL_VERSION(2, 4, 0) <= LINUX_VERSION_CODE
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 4, 22)
+#include <linux/pci.h>
+static inline char *pci_name(struct pci_dev *pdev)
+{
+	return pdev->slot_name;
+}
+#endif /* kernel < 2.4.22 */
+#endif /* kernel >= 2.4.0 */
+
+/*************************** I2C specific *****************************/
+#include <linux/i2c.h>
+
+#ifndef I2C_CLIENT_END
+#error "********************************************************"
+#error " Sorry, this driver needs the new I2C stack.            "
+#error " You can get it at http://www2.lm-sensors.nu/~lm78/.    "
+#error "********************************************************"
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 5, 0)
+
+#undef i2c_get_clientdata
+#define i2c_get_clientdata(client) ((client)->data)
+
+
+#undef i2c_set_clientdata
+#define i2c_set_clientdata(client_ptr, new_data) do { \
+	(client_ptr)->data = new_data; \
+} while (0)
+
+
+#endif
+
+/* removed in 2.6.14 */
+#ifndef I2C_ALGO_BIT
+#   define I2C_ALGO_BIT 0
+#endif
+
+/* removed in 2.6.16 */
+#ifndef I2C_DRIVERID_EXP3
+#  define I2C_DRIVERID_EXP3 0xf003
+#endif
+
+/*************************** USB specific *****************************/
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 4, 0)
+#include <linux/usb.h>
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 8)
+static inline int usb_kill_urb(struct urb *urb)
+{
+	return usb_unlink_urb(urb);
+}
+#endif
+
+/* removed in 2.6.14 */
+#ifndef URB_ASYNC_UNLINK
+#define URB_ASYNC_UNLINK 0
+#endif
+#endif
+
+/*************************** bttv specific ****************************/
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 15) /* BTTV_* -> BTTV_BOARD_* */
+#define BTTV_BOARD_UNKNOWN         BTTV_UNKNOWN
+#define BTTV_BOARD_PXELVWPLTVPAK   BTTV_PXELVWPLTVPAK
+#define BTTV_BOARD_PXELVWPLTVPRO   BTTV_PXELVWPLTVPRO
+#define BTTV_BOARD_PV_BT878P_9B    BTTV_PV_BT878P_9B
+#define BTTV_BOARD_PV_BT878P_PLUS  BTTV_PV_BT878P_PLUS
+#define BTTV_BOARD_AVERMEDIA       BTTV_AVERMEDIA
+#define BTTV_BOARD_AVPHONE98       BTTV_AVPHONE98
+#define BTTV_BOARD_AVERMEDIA98     BTTV_AVERMEDIA98
+#define BTTV_BOARD_CHRONOS_VS2     BTTV_CHRONOS_VS2
+#define BTTV_BOARD_MIRO            BTTV_MIRO
+#define BTTV_BOARD_DYNALINK        BTTV_DYNALINK
+#define BTTV_BOARD_WINVIEW_601     BTTV_WINVIEW_601
+#ifdef BTTV_KWORLD
+#define BTTV_BOARD_KWORLD          BTTV_KWORLD
+#endif
+#define BTTV_BOARD_MAGICTVIEW061   BTTV_MAGICTVIEW061
+#define BTTV_BOARD_MAGICTVIEW063   BTTV_MAGICTVIEW063
+#define BTTV_BOARD_PHOEBE_TVMAS    BTTV_PHOEBE_TVMAS
+#ifdef BTTV_BESTBUY_EASYTV2
+#define BTTV_BOARD_BESTBUY_EASYTV  BTTV_BESTBUY_EASYTV
+#define BTTV_BOARD_BESTBUY_EASYTV2 BTTV_BESTBUY_EASYTV2
+#endif
+#define BTTV_BOARD_FLYVIDEO        BTTV_FLYVIDEO
+#define BTTV_BOARD_FLYVIDEO_98     BTTV_FLYVIDEO_98
+#define BTTV_BOARD_TYPHOON_TVIEW   BTTV_TYPHOON_TVIEW
+#ifdef BTTV_FLYVIDEO_98FM
+#define BTTV_BOARD_FLYVIDEO_98FM   BTTV_FLYVIDEO_98FM
+#endif
+#define BTTV_BOARD_WINFAST2000     BTTV_WINFAST2000
+#ifdef BTTV_GVBCTV5PCI
+#define BTTV_BOARD_GVBCTV5PCI      BTTV_GVBCTV5PCI
+#endif
+#endif  /* end BTTV_* -> BTTV_BOARD_* */
+
+
+/******************************* pm.h *********************************/
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 0)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 11)
+typedef u32 pm_message_t;
+#endif /* kernel < 2.6.11 */
+#endif /* kernel >= 2.6.0 */
+
+/*************************** interrupt.h ******************************/
+/* added in 2.6.18, old defines removed in 2.6.24 */
+#ifndef IRQF_DISABLED
+#define IRQF_DISABLED SA_INTERRUPT
+#endif
+#ifndef IRQF_SHARED
+#define IRQF_SHARED SA_SHIRQ
+#endif
+
+/*************************** spinlock.h *******************************/
+/* added in 2.6.11 */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 11)
+#define DEFINE_SPINLOCK(x) spinlock_t x = SPIN_LOCK_UNLOCKED
+#endif
+
+/***************************** slab.h *********************************/
+/* added in 2.6.14 */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 14)
+static inline void *kzalloc(size_t size, gfp_t flags)
+{
+        void *ret = kmalloc(size, flags);
+        if (ret)
+                memset(ret, 0, size);
+        return ret;
+}
+#endif
+
+/****************************** fs.h **********************************/
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 0)
+static inline unsigned iminor(struct inode *inode)
+{
+	return MINOR(inode->i_rdev);
+}
+#endif
+
+#endif /* _KCOMPAT_H */
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc.h
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc.h
@@ -0,0 +1,105 @@
+/*      $Id: lirc.h,v 5.19 2009/08/29 07:52:41 lirc Exp $      */
+
+#ifndef _LINUX_LIRC_H
+#define _LINUX_LIRC_H
+
+#if defined(__linux__)
+#include <linux/ioctl.h>
+#elif defined(_NetBSD_)
+#include <sys/ioctl.h> 
+#elif defined(_CYGWIN_)
+#define __USE_LINUX_IOCTL_DEFS
+#include <sys/ioctl.h>
+#endif
+
+#define PULSE_BIT  0x01000000
+#define PULSE_MASK 0x00FFFFFF
+
+typedef int lirc_t;
+
+/*** lirc compatible hardware features ***/
+
+#define LIRC_MODE2SEND(x) (x)
+#define LIRC_SEND2MODE(x) (x)
+#define LIRC_MODE2REC(x) ((x) << 16)
+#define LIRC_REC2MODE(x) ((x) >> 16)
+
+#define LIRC_MODE_RAW                  0x00000001
+#define LIRC_MODE_PULSE                0x00000002
+#define LIRC_MODE_MODE2                0x00000004
+#define LIRC_MODE_CODE                 0x00000008
+#define LIRC_MODE_LIRCCODE             0x00000010
+#define LIRC_MODE_STRING               0x00000020
+
+
+#define LIRC_CAN_SEND_RAW              LIRC_MODE2SEND(LIRC_MODE_RAW)
+#define LIRC_CAN_SEND_PULSE            LIRC_MODE2SEND(LIRC_MODE_PULSE)
+#define LIRC_CAN_SEND_MODE2            LIRC_MODE2SEND(LIRC_MODE_MODE2)
+#define LIRC_CAN_SEND_CODE             LIRC_MODE2SEND(LIRC_MODE_CODE)
+#define LIRC_CAN_SEND_LIRCCODE         LIRC_MODE2SEND(LIRC_MODE_LIRCCODE)
+#define LIRC_CAN_SEND_STRING           LIRC_MODE2SEND(LIRC_MODE_STRING)
+
+#define LIRC_CAN_SEND_MASK             0x0000003f
+
+#define LIRC_CAN_SET_SEND_CARRIER      0x00000100
+#define LIRC_CAN_SET_SEND_DUTY_CYCLE   0x00000200
+#define LIRC_CAN_SET_TRANSMITTER_MASK  0x00000400
+
+#define LIRC_CAN_REC_RAW               LIRC_MODE2REC(LIRC_MODE_RAW)
+#define LIRC_CAN_REC_PULSE             LIRC_MODE2REC(LIRC_MODE_PULSE)
+#define LIRC_CAN_REC_MODE2             LIRC_MODE2REC(LIRC_MODE_MODE2)
+#define LIRC_CAN_REC_CODE              LIRC_MODE2REC(LIRC_MODE_CODE)
+#define LIRC_CAN_REC_LIRCCODE          LIRC_MODE2REC(LIRC_MODE_LIRCCODE)
+#define LIRC_CAN_REC_STRING            LIRC_MODE2REC(LIRC_MODE_STRING)
+
+#define LIRC_CAN_REC_MASK              LIRC_MODE2REC(LIRC_CAN_SEND_MASK)
+
+#define LIRC_CAN_SET_REC_CARRIER       (LIRC_CAN_SET_SEND_CARRIER << 16)
+#define LIRC_CAN_SET_REC_DUTY_CYCLE    (LIRC_CAN_SET_SEND_DUTY_CYCLE << 16)
+
+#define LIRC_CAN_SET_REC_DUTY_CYCLE_RANGE 0x40000000
+#define LIRC_CAN_SET_REC_CARRIER_RANGE    0x80000000
+#define LIRC_CAN_GET_REC_RESOLUTION       0x20000000
+
+#define LIRC_CAN_SEND(x) ((x)&LIRC_CAN_SEND_MASK)
+#define LIRC_CAN_REC(x) ((x)&LIRC_CAN_REC_MASK)
+
+#define LIRC_CAN_NOTIFY_DECODE            0x01000000
+
+/*** IOCTL commands for lirc driver ***/
+
+#define LIRC_GET_FEATURES              _IOR('i', 0x00000000, unsigned long)
+
+#define LIRC_GET_SEND_MODE             _IOR('i', 0x00000001, unsigned long)
+#define LIRC_GET_REC_MODE              _IOR('i', 0x00000002, unsigned long)
+#define LIRC_GET_SEND_CARRIER          _IOR('i', 0x00000003, unsigned int)
+#define LIRC_GET_REC_CARRIER           _IOR('i', 0x00000004, unsigned int)
+#define LIRC_GET_SEND_DUTY_CYCLE       _IOR('i', 0x00000005, unsigned int)
+#define LIRC_GET_REC_DUTY_CYCLE        _IOR('i', 0x00000006, unsigned int)
+#define LIRC_GET_REC_RESOLUTION        _IOR('i', 0x00000007, unsigned int)
+
+/* code length in bits, currently only for LIRC_MODE_LIRCCODE */
+#define LIRC_GET_LENGTH                _IOR('i', 0x0000000f, unsigned long)
+
+#define LIRC_SET_SEND_MODE             _IOW('i', 0x00000011, unsigned long)
+#define LIRC_SET_REC_MODE              _IOW('i', 0x00000012, unsigned long)
+/* Note: these can reset the according pulse_width */
+#define LIRC_SET_SEND_CARRIER          _IOW('i', 0x00000013, unsigned int)
+#define LIRC_SET_REC_CARRIER           _IOW('i', 0x00000014, unsigned int)
+#define LIRC_SET_SEND_DUTY_CYCLE       _IOW('i', 0x00000015, unsigned int)
+#define LIRC_SET_REC_DUTY_CYCLE        _IOW('i', 0x00000016, unsigned int)
+#define LIRC_SET_TRANSMITTER_MASK      _IOW('i', 0x00000017, unsigned int)
+
+/*
+ * to set a range use
+ * LIRC_SET_REC_DUTY_CYCLE_RANGE/LIRC_SET_REC_CARRIER_RANGE with the
+ * lower bound first and later
+ * LIRC_SET_REC_DUTY_CYCLE/LIRC_SET_REC_CARRIER with the upper bound
+ */
+
+#define LIRC_SET_REC_DUTY_CYCLE_RANGE  _IOW('i', 0x0000001e, unsigned int)
+#define LIRC_SET_REC_CARRIER_RANGE     _IOW('i', 0x0000001f, unsigned int)
+
+#define LIRC_NOTIFY_DECODE             _IO('i', 0x00000020)
+
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_gpio/Makefile
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_gpio/Makefile
@@ -0,0 +1,3 @@
+EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)/..
+
+obj-$(CONFIG_LIRC_GPIO)		+= lirc_gpio.o
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_gpio/lirc_gpio.c
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_gpio/lirc_gpio.c
@@ -0,0 +1,613 @@
+/*
+ * Remote control driver for the TV-card
+ * key codes are obtained from GPIO port
+ *
+ * (L) by Artur Lipowski <alipowski@interia.pl>
+ *     patch for the AverMedia by Santiago Garcia Mantinan <manty@i.am>
+ *			    and Christoph Bartelmus <lirc@bartelmus.de>
+ *     patch for the BestBuy by Miguel Angel Alvarez <maacruz@navegalia.com>
+ *     patch for the Winfast TV2000 by Juan Toledo
+ *     <toledo@users.sourceforge.net>
+ *     patch for the I-O Data GV-BCTV5/PCI by Jens C. Rasmussen
+ *     <jens.rasmussen@ieee.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ * $Id: lirc_gpio.c,v 1.57 2009/02/14 19:35:52 lirc Exp $
+ *
+ */
+
+#include <linux/version.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 2, 4)
+#error "*******************************************************"
+#error "Sorry, this driver needs kernel version 2.2.4 or higher"
+#error "*******************************************************"
+#endif
+
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/kmod.h>
+#include <linux/sched.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 0)
+#include <linux/wrapper.h>
+#endif
+#include <linux/errno.h>
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 4, 0)
+#include "../drivers/char/bttv.h"
+#include "../drivers/char/bttvp.h"
+#elif LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 17)
+#include "../drivers/media/video/bttv.h"
+#include "../drivers/media/video/bttvp.h"
+#else
+#include "../drivers/media/video/bt8xx/bttv.h"
+#include "../drivers/media/video/bt8xx/bttvp.h"
+#endif
+
+#if BTTV_VERSION_CODE < KERNEL_VERSION(0, 7, 45)
+#error "*******************************************************"
+#error " Sorry, this driver needs bttv version 0.7.45 or       "
+#error " higher. If you are using the bttv package, copy it to "
+#error " the kernel					    "
+#error "*******************************************************"
+#endif
+
+#include "../kcompat.h"
+#include "../lirc_dev/lirc_dev.h"
+
+/* insmod parameters */
+static int debug;
+static int card;
+static int minor = -1;
+static int bttv_id = BTTV_BOARD_UNKNOWN;
+static unsigned long gpio_mask;
+static unsigned long gpio_enable;
+static unsigned long gpio_lock_mask;
+static unsigned long gpio_xor_mask;
+static int soft_gap;
+static int sample_rate = 10;
+
+#define dprintk(fmt, args...)					\
+	do {							\
+		if (debug)					\
+			printk(KERN_DEBUG fmt, ## args);	\
+	} while (0)
+
+struct rcv_info {
+	int bttv_id;
+	int card_id;
+	unsigned long gpio_mask;
+	unsigned long gpio_enable;
+	unsigned long gpio_lock_mask;
+	unsigned long gpio_xor_mask;
+	int soft_gap;
+	int sample_rate;
+	unsigned char code_length;
+};
+
+static struct rcv_info rcv_infos[] = {
+	{BTTV_BOARD_UNKNOWN,
+		0, 0, 0, 0, 0, 0, 1, 0},
+	{BTTV_BOARD_PXELVWPLTVPAK,
+		0, 0x00003e00, 0, 0x0010000, 0, 0, 15, 32},
+	{BTTV_BOARD_PXELVWPLTVPRO,
+		0, 0x00001f00, 0, 0x0008000, 0, 500, 12, 32},
+	{BTTV_BOARD_PV_BT878P_9B,
+		0, 0x00001f00, 0, 0x0008000, 0, 500, 12, 32},
+	{BTTV_BOARD_PV_BT878P_PLUS,
+		0, 0x00001f00, 0, 0x0008000, 0, 500, 12, 32},
+#ifdef BTTV_BOARD_PV_M4900
+	{BTTV_BOARD_PV_M4900,
+		0, 0x00001f00, 0, 0x0008000, 0, 500, 12, 32},
+#endif
+	{BTTV_BOARD_AVERMEDIA,
+		0, 0x00f88000, 0, 0x0010000, 0x00010000, 0, 10, 32},
+
+	/* mapped to Capture98 */
+	{BTTV_BOARD_AVPHONE98,
+		0x00011461, 0x003b8000, 0x00004000,
+		0x0800000, 0x00800000, 0, 10, 0},
+	{BTTV_BOARD_AVERMEDIA98,
+		0x00021461, 0x003b8000, 0x00004000,
+		0x0800000, 0x00800000, 0, 10, 0},
+
+	/* mapped to Phone98 */
+	{BTTV_BOARD_AVPHONE98,
+		0x00031461, 0x00f88000, 0, 0x0010000, 0x00010000, 0, 10, 32},
+	/* is this one correct? */
+	{BTTV_BOARD_AVERMEDIA98,
+		0x00041461, 0x00f88000, 0, 0x0010000, 0x00010000, 0, 10, 32},
+	/* work-around for VDOMATE */
+	{BTTV_BOARD_AVERMEDIA98,
+		0x03001461, 0x00f88000, 0, 0x0010000, 0x00010000, 0, 10, 32},
+	/* reported by Danijel Korzinek, AVerTV GOw/FM */
+	{BTTV_BOARD_AVERMEDIA98,
+		0x00000000, 0x00f88000, 0, 0x0010000, 0x00010000, 0, 10, 32},
+
+	{BTTV_BOARD_CHRONOS_VS2,
+		0, 0x000000f8,	0, 0x0000100, 0, 0, 20, 0},
+	/* CPH031 and CPH033 cards (?) */
+	/* MIRO was just a work-around */
+	{BTTV_BOARD_MIRO,
+		0, 0x00001f00, 0, 0x0004000, 0, 0, 10, 32},
+	{BTTV_BOARD_DYNALINK,
+		0, 0x00001f00, 0, 0x0004000, 0, 0, 10, 32},
+#ifdef BTTV_BOARD_ASKEY_CPH03X
+	{BTTV_BOARD_ASKEY_CPH03X,
+		0, 0x00001f00, 0, 0x0004000, 0, 0, 10, 32},
+#endif
+	{BTTV_BOARD_WINVIEW_601,
+		0, 0x00001f00, 0, 0x0004000, 0, 0, 0, 32},
+#ifdef BTTV_BOARD_KWORLD
+	{BTTV_BOARD_KWORLD,
+		0, 0x00007f00, 0, 0x0004000, 0, 0, 12, 32},
+#endif
+	/* just a guess */
+	{BTTV_BOARD_MAGICTVIEW061,
+		0, 0x0028e000, 0, 0x0020000, 0, 0, 20, 32},
+	{BTTV_BOARD_MAGICTVIEW063,
+		0, 0x0028e000, 0, 0x0020000, 0, 0, 20, 32},
+	{BTTV_BOARD_PHOEBE_TVMAS,
+		0, 0x0028e000, 0, 0x0020000, 0, 0, 20, 32},
+#ifdef BTTV_BOARD_BESTBUY_EASYTV2
+	{BTTV_BOARD_BESTBUY_EASYTV,
+		0, 0x00007F00, 0, 0x0004000, 0, 0, 10, 8},
+	{BTTV_BOARD_BESTBUY_EASYTV2,
+		0, 0x00007F00, 0, 0x0008000, 0, 0, 10, 8},
+#endif
+	/* lock_mask probably also 0x100, or maybe it is 0x0 for all others? */
+	{BTTV_BOARD_FLYVIDEO,
+		0, 0x000000f8, 0, 0, 0, 0, 0, 42},
+	{BTTV_BOARD_FLYVIDEO_98,
+		0, 0x000000f8,	0, 0x0000100, 0, 0, 0, 42},
+	{BTTV_BOARD_TYPHOON_TVIEW,
+		0, 0x000000f8, 0, 0x0000100, 0, 0, 0, 42},
+#ifdef BTTV_BOARD_FLYVIDEO_98FM
+	/* smorar@alfonzo.smuts.uct.ac.za */
+	{BTTV_BOARD_FLYVIDEO_98FM,
+		0, 0x000000f8, 0, 0x0000100, 0, 0, 0, 42},
+#endif
+	/* The Leadtek WinFast TV 2000 XP card (id 0x6606107d) uses an
+	 * extra gpio bit compared to the original TV 2000 card (id
+	 * 0x217d6606); as the bttv-0.7.100 driver does not
+	 * distinguish between the two cards, we enable the extra bit
+	 * based on the card id: */
+	{BTTV_BOARD_WINFAST2000,
+		0x6606107d, 0x000008f8, 0, 0x0000100, 0, 0, 0, 32},
+	{BTTV_BOARD_WINFAST2000,
+		0x6609107d, 0x000008f8, 0, 0x0000100, 0, 0, 0, 32},
+	{BTTV_BOARD_WINFAST2000,
+		0xff06107d, 0x000008f8, 0, 0x0000100, 0, 0, 0, 32},
+	/* default: */
+	{BTTV_BOARD_WINFAST2000,
+		0, 0x000000f8,	0, 0x0000100, 0, 0, 0, 32},
+#ifdef BTTV_BOARD_GVBCTV5PCI
+	{BTTV_BOARD_GVBCTV5PCI,
+		0, 0x00f0b000, 0, 0, 0, 0, 20, 8},
+#endif
+};
+
+static unsigned char code_length;
+static unsigned char code_bytes = 1;
+
+#define MAX_BYTES 8
+
+#define LOGHEAD "lirc_gpio (%d): "
+
+/* how many bits GPIO value can be shifted right before processing
+ * it is computed from the value of gpio_mask_parameter
+ */
+static unsigned char gpio_pre_shift;
+
+static int reverse(int data, int bits)
+{
+	int i;
+	int c;
+
+	for (c = 0, i = 0; i < bits; i++)
+		c |= (((data & (1<<i)) ? 1:0)) << (bits-1-i);
+
+	return c;
+}
+
+static int build_key(unsigned long gpio_val, unsigned char codes[MAX_BYTES])
+{
+	unsigned long mask = gpio_mask;
+	unsigned char shift = 0;
+
+	dprintk(LOGHEAD "gpio_val is %lx\n", card, (unsigned long) gpio_val);
+
+	gpio_val ^= gpio_xor_mask;
+
+	if (gpio_lock_mask && (gpio_val & gpio_lock_mask))
+		return -EBUSY;
+
+	switch (bttv_id) {
+	case BTTV_BOARD_AVERMEDIA98:
+		if (bttv_write_gpio(card, gpio_enable, gpio_enable)) {
+			dprintk(LOGHEAD "cannot write to GPIO\n", card);
+			return -EIO;
+		}
+		if (bttv_read_gpio(card, &gpio_val)) {
+			dprintk(LOGHEAD "cannot read GPIO\n", card);
+			return -EIO;
+		}
+		if (bttv_write_gpio(card, gpio_enable, 0)) {
+			dprintk(LOGHEAD "cannot write to GPIO\n", card);
+			return -EIO;
+		}
+		break;
+	default:
+		break;
+	}
+
+	/* extract bits from "raw" GPIO value using gpio_mask */
+	codes[0] = 0;
+	gpio_val >>= gpio_pre_shift;
+	while (mask) {
+		if (mask & 1u)
+			codes[0] |= (gpio_val & 1u) << shift++;
+		mask >>= 1;
+		gpio_val >>= 1;
+	}
+
+	dprintk(LOGHEAD "code is %lx\n", card, (unsigned long) codes[0]);
+	switch (bttv_id) {
+	case BTTV_BOARD_AVERMEDIA:
+		codes[2] = (codes[0]<<2)&0xff;
+		codes[3] = (~codes[2])&0xff;
+		codes[0] = 0x02;
+		codes[1] = 0xFD;
+		break;
+	case BTTV_BOARD_AVPHONE98:
+		codes[2] = ((codes[0]&(~0x1))<<2)&0xff;
+		codes[3] = (~codes[2])&0xff;
+		if (codes[0]&0x1) {
+			codes[0] = 0xc0;
+			codes[1] = 0x3f;
+		} else {
+			codes[0] = 0x40;
+			codes[1] = 0xbf;
+		}
+		break;
+	case BTTV_BOARD_AVERMEDIA98:
+		break;
+	case BTTV_BOARD_FLYVIDEO:
+	case BTTV_BOARD_FLYVIDEO_98:
+	case BTTV_BOARD_TYPHOON_TVIEW:
+#ifdef BTTV_BOARD_FLYVIDEO_98FM
+	case BTTV_BOARD_FLYVIDEO_98FM:
+#endif
+		codes[4] = codes[0]<<3;
+		codes[5] = ((~codes[4])&0xff);
+
+		codes[0] = 0x00;
+		codes[1] = 0x1A;
+		codes[2] = 0x1F;
+		codes[3] = 0x2F;
+		break;
+	case BTTV_BOARD_MAGICTVIEW061:
+	case BTTV_BOARD_MAGICTVIEW063:
+	case BTTV_BOARD_PHOEBE_TVMAS:
+		codes[0] = (codes[0]&0x01)
+			| ((codes[0]&0x02)<<1)
+			| ((codes[0]&0x04)<<2)
+			| ((codes[0]&0x08)>>2)
+			| ((codes[0]&0x10)>>1);
+		/* FALLTHROUGH */
+	case BTTV_BOARD_MIRO:
+	case BTTV_BOARD_DYNALINK:
+#ifdef BTTV_BOARD_ASKEY_CPH03X
+	case BTTV_BOARD_ASKEY_CPH03X:
+#endif
+	case BTTV_BOARD_PXELVWPLTVPAK:
+	case BTTV_BOARD_PXELVWPLTVPRO:
+	case BTTV_BOARD_PV_BT878P_9B:
+	case BTTV_BOARD_PV_BT878P_PLUS:
+#ifdef BTTV_BOARD_PV_M4900
+	case BTTV_BOARD_PV_M4900:
+#endif
+#ifdef BTTV_BOARD_KWORLD
+	case BTTV_BOARD_KWORLD:
+#endif
+		codes[2] = reverse(codes[0], 8);
+		codes[3] = (~codes[2])&0xff;
+		codes[0] = 0x61;
+		codes[1] = 0xD6;
+		break;
+#if 0
+		/* derived from e-tech config file */
+		/* 26 + 16 bits */
+		/* won't apply it until it's confirmed with a fly98 */
+	case BTTV_BOARD_FLYVIDEO_98:
+	case BTTV_BOARD_FLYVIDEO_98FM:
+		codes[4] = codes[0]<<3;
+		codes[5] = (~codes[4])&0xff;
+
+		codes[0] = 0x00;
+		codes[1] = 0x1A;
+		codes[2] = 0x1F;
+		codes[3] = 0x2F;
+		break;
+#endif
+	case BTTV_BOARD_WINFAST2000:
+		/* shift extra bit */
+		codes[0] = (codes[0]&0x1f) | ((codes[0]&0x20) << 1);
+	case BTTV_BOARD_WINVIEW_601:
+		codes[2] = reverse(codes[0], 8);
+		codes[3] = (~codes[2])&0xff;
+		codes[0] = 0xC0;
+		codes[1] = 0x3F;
+		break;
+	default:
+		break;
+	}
+
+	return 0;
+}
+
+/* add_to_buf - copy a code to the buffer */
+static int add_to_buf(void *data, struct lirc_buffer *buf)
+{
+	static unsigned long next_time;
+	static unsigned char prev_codes[MAX_BYTES];
+	unsigned long code = 0;
+	unsigned char cur_codes[MAX_BYTES];
+
+	if (bttv_read_gpio(card, &code)) {
+		dprintk(LOGHEAD "cannot read GPIO\n", card);
+		return -EIO;
+	}
+
+	if (build_key(code, cur_codes))
+		return -EFAULT;
+
+	if (soft_gap) {
+		if (!memcmp(prev_codes, cur_codes, code_bytes) &&
+			jiffies < next_time)
+			return -EAGAIN;
+
+		next_time = jiffies + soft_gap;
+	}
+	memcpy(prev_codes, cur_codes, code_bytes);
+
+	lirc_buffer_write(buf, cur_codes);
+
+	return 0;
+}
+
+static int set_use_inc(void *data)
+{
+	MOD_INC_USE_COUNT;
+	return 0;
+}
+
+static void set_use_dec(void *data)
+{
+	MOD_DEC_USE_COUNT;
+}
+
+static wait_queue_head_t *get_queue(void *data)
+{
+	return bttv_get_gpio_queue(card);
+}
+
+static struct lirc_driver driver = {
+	.name		= "lirc_gpio  ",
+	.add_to_buf	= add_to_buf,
+	.get_queue	= get_queue,
+	.set_use_inc	= set_use_inc,
+	.set_use_dec	= set_use_dec,
+	.dev		= NULL,
+	.owner		= THIS_MODULE,
+};
+
+/*
+ *
+ */
+static int gpio_remote_init(void)
+{
+	int ret;
+	unsigned int mask;
+
+	/* "normalize" gpio_mask
+	 * this means shift it right until first bit is set
+	 */
+	while (!(gpio_mask & 1u)) {
+		gpio_pre_shift++;
+		gpio_mask >>= 1;
+	}
+
+	if (code_length)
+		driver.code_length = code_length;
+	else {
+		/* calculate scan code length in bits if needed */
+		driver.code_length = 1;
+		mask = gpio_mask >> 1;
+		while (mask) {
+			if (mask & 1u)
+				driver.code_length++;
+			mask >>= 1;
+		}
+	}
+
+	code_bytes = (driver.code_length/8) + (driver.code_length % 8 ? 1 : 0);
+	if (MAX_BYTES < code_bytes) {
+		printk(LOGHEAD "scan code too long (%d bytes)\n",
+			minor, code_bytes);
+		return -EBADRQC;
+	}
+
+	if (gpio_enable) {
+		if (bttv_gpio_enable(card, gpio_enable, gpio_enable)) {
+			printk(LOGHEAD "gpio_enable failure\n", minor);
+			return -EIO;
+		}
+	}
+
+
+	/* translate ms to jiffies */
+	soft_gap = (soft_gap*HZ) / 1000;
+
+	driver.minor = minor;
+	driver.sample_rate = sample_rate;
+
+	ret = lirc_register_driver(&driver);
+
+	if (0 > ret) {
+		printk(LOGHEAD "device registration failed with %d\n",
+			minor, ret);
+		return ret;
+	}
+
+	minor = ret;
+	printk(LOGHEAD "driver registered\n", minor);
+
+	return 0;
+}
+
+#ifdef MODULE
+/*
+ *
+ */
+int init_module(void)
+{
+	int type, cardid, card_type;
+
+	if (MAX_IRCTL_DEVICES < minor) {
+		printk(KERN_INFO "lirc_gpio: parameter minor (%d) "
+		       "must be less than %d!\n",
+		       minor, MAX_IRCTL_DEVICES - 1);
+		return -EBADRQC;
+	}
+
+	/* if gpio_mask not zero then use module parameters
+	 * instead of autodetecting TV card
+	 */
+	if (gpio_mask) {
+		if (sample_rate != 0 &&
+		    (2 > sample_rate || HZ < sample_rate)) {
+			printk(LOGHEAD "parameter sample_rate "
+			       "must be between 2 and %d!\n", minor, HZ);
+			return -EBADRQC;
+		}
+
+		if (sample_rate != 0 && soft_gap &&
+		    ((2000/sample_rate) > soft_gap || 1000 < soft_gap)) {
+			printk(LOGHEAD "parameter soft_gap "
+			       "must be between %d and 1000!\n",
+			       minor, 2000/sample_rate);
+			return -EBADRQC;
+		}
+	} else {
+		if (bttv_get_cardinfo(card, &type, &cardid) == -1) {
+			printk(LOGHEAD "could not get card type\n", minor);
+			return -EBADRQC;
+		}
+		printk(LOGHEAD "card type 0x%x, id 0x%x\n", minor,
+		       type, cardid);
+
+		if (type == BTTV_BOARD_UNKNOWN) {
+			printk(LOGHEAD "cannot detect TV card nr %d!\n",
+			       minor, card);
+			return -EBADRQC;
+		}
+		for (card_type = 1;
+		     card_type < sizeof(rcv_infos)/sizeof(struct rcv_info);
+		     card_type++) {
+			if (rcv_infos[card_type].bttv_id == type &&
+			    (rcv_infos[card_type].card_id == 0 ||
+			     rcv_infos[card_type].card_id == cardid)) {
+				bttv_id = rcv_infos[card_type].bttv_id;
+				gpio_mask = rcv_infos[card_type].gpio_mask;
+				gpio_enable = rcv_infos[card_type].gpio_enable;
+				gpio_lock_mask =
+					rcv_infos[card_type].gpio_lock_mask;
+				gpio_xor_mask =
+					rcv_infos[card_type].gpio_xor_mask;
+				soft_gap = rcv_infos[card_type].soft_gap;
+				sample_rate = rcv_infos[card_type].sample_rate;
+				code_length = rcv_infos[card_type].code_length;
+				break;
+			}
+		}
+		if (type == BTTV_BOARD_AVPHONE98 && cardid == 0x00011461)
+			bttv_id = BTTV_BOARD_AVERMEDIA98;
+
+		if (type == BTTV_BOARD_AVERMEDIA98 && cardid == 0x00041461)
+			bttv_id = BTTV_BOARD_AVPHONE98;
+
+		if (type == BTTV_BOARD_AVERMEDIA98 && cardid == 0x03001461)
+			bttv_id = BTTV_BOARD_AVPHONE98;
+
+		if (type == BTTV_BOARD_AVERMEDIA98 && cardid == 0x00000000)
+			bttv_id = BTTV_BOARD_AVPHONE98;
+
+		if (card_type == sizeof(rcv_infos)/sizeof(struct rcv_info)) {
+			printk(LOGHEAD "TV card type 0x%x not supported!\n",
+			       minor, type);
+			return -EBADRQC;
+		}
+	}
+
+	return gpio_remote_init();
+}
+
+/*
+ *
+ */
+void cleanup_module(void)
+{
+	lirc_unregister_driver(minor);
+
+	dprintk(LOGHEAD "module successfully unloaded\n", minor);
+}
+
+/* Dont try to use it as a static version !  */
+MODULE_DESCRIPTION("Driver module for remote control (data "
+		   "from bt848 GPIO port)");
+MODULE_AUTHOR("Artur Lipowski");
+MODULE_LICENSE("GPL");
+
+module_param(minor, int, S_IRUGO);
+MODULE_PARM_DESC(minor, "Preferred minor device number");
+
+module_param(card, int, S_IRUGO);
+MODULE_PARM_DESC(card, "TV card number to attach to");
+
+module_param(gpio_mask, long, S_IRUGO);
+MODULE_PARM_DESC(gpio_mask, "gpio_mask");
+
+module_param(gpio_lock_mask, long, S_IRUGO);
+MODULE_PARM_DESC(gpio_lock_mask, "gpio_lock_mask");
+
+module_param(gpio_xor_mask, long, S_IRUGO);
+MODULE_PARM_DESC(gpio_xor_mask, "gpio_xor_mask");
+
+module_param(soft_gap, int, S_IRUGO);
+MODULE_PARM_DESC(soft_gap, "Time between keypresses (in ms)");
+
+module_param(sample_rate, int, S_IRUGO);
+MODULE_PARM_DESC(sample_rate, "Sample rate (between 2 and HZ)");
+
+module_param(bttv_id, int, S_IRUGO);
+MODULE_PARM_DESC(bttv_id, "BTTV card type");
+
+module_param(debug, bool, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(debug, "Enable debugging messages");
+
+EXPORT_NO_SYMBOLS;
+
+#endif /* MODULE */
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_bt829/lirc_bt829.c
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_bt829/lirc_bt829.c
@@ -0,0 +1,399 @@
+/*
+ * Remote control driver for the TV-card based on bt829
+ *
+ *  by Leonid Froenchenko <lfroen@galileo.co.il>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+*/
+
+#include <linux/version.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 4, 0)
+#error "This driver needs kernel version 2.4.0 or higher"
+#endif
+#include <linux/autoconf.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/threads.h>
+#include <linux/sched.h>
+#include <linux/ioport.h>
+#include <linux/pci.h>
+#include <linux/delay.h>
+
+#include "../kcompat.h"
+#include "../lirc_dev/lirc_dev.h"
+
+static int poll_main(void);
+static int atir_init_start(void);
+
+static void write_index(unsigned char index, unsigned int value);
+static unsigned int read_index(unsigned char index);
+
+static void do_i2c_start(void);
+static void do_i2c_stop(void);
+
+static void seems_wr_byte(unsigned char al);
+static unsigned char seems_rd_byte(void);
+
+static unsigned int read_index(unsigned char al);
+static void write_index(unsigned char ah, unsigned int edx);
+
+static void cycle_delay(int cycle);
+
+static void do_set_bits(unsigned char bl);
+static unsigned char do_get_bits(void);
+
+#define DATA_PCI_OFF 0x7FFC00
+#define WAIT_CYCLE   20
+
+#define DRIVER_NAME "lirc_bt829"
+
+static int debug;
+#define dprintk(fmt, args...)					\
+	do {							\
+		if (debug)					\
+			printk(KERN_DEBUG DRIVER_NAME ": " fmt, ## args); \
+	} while (0)
+
+static int atir_minor;
+static unsigned long pci_addr_phys;
+static unsigned char *pci_addr_lin;
+
+static struct lirc_driver atir_driver;
+
+static struct pci_dev *do_pci_probe(void)
+{
+	struct pci_dev *my_dev;
+#ifndef KERNEL_2_5
+	/* unnecessary with recent kernels */
+	if (!pci_present())
+		printk(KERN_ERR DRIVER_NAME ": no pci in this kernel\n");
+#endif
+	my_dev = pci_get_device(PCI_VENDOR_ID_ATI,
+				PCI_DEVICE_ID_ATI_264VT, NULL);
+	if (my_dev) {
+		printk(KERN_ERR DRIVER_NAME ": Using device: %s\n",
+		       pci_name(my_dev));
+		pci_addr_phys = 0;
+		if (my_dev->resource[0].flags & IORESOURCE_MEM) {
+			pci_addr_phys = my_dev->resource[0].start;
+			printk(KERN_INFO DRIVER_NAME ": memory at 0x%08X\n",
+			       (unsigned int)pci_addr_phys);
+		}
+		if (pci_addr_phys == 0) {
+			printk(KERN_ERR DRIVER_NAME ": no memory resource ?\n");
+			return NULL;
+		}
+	} else {
+		printk(KERN_ERR DRIVER_NAME ": pci_probe failed\n");
+		return NULL;
+	}
+	return my_dev;
+}
+
+static int atir_add_to_buf(void *data, struct lirc_buffer *buf)
+{
+	unsigned char key;
+	int status;
+	status = poll_main();
+	key = (status >> 8) & 0xFF;
+	if (status & 0xFF) {
+		dprintk("reading key %02X\n", key);
+		lirc_buffer_write(buf, &key);
+		return 0;
+	}
+	return -ENODATA;
+}
+
+static int atir_set_use_inc(void *data)
+{
+	MOD_INC_USE_COUNT;
+	dprintk("driver is opened\n");
+	return 0;
+}
+
+static void atir_set_use_dec(void *data)
+{
+	MOD_DEC_USE_COUNT;
+	dprintk("driver is closed\n");
+}
+
+int init_module(void)
+{
+	struct pci_dev *pdev;
+
+	pdev = do_pci_probe();
+	if (pdev == NULL)
+		return 1;
+
+	if (!atir_init_start())
+		return 1;
+
+	strcpy(atir_driver.name, "ATIR");
+	atir_driver.minor       = -1;
+	atir_driver.code_length = 8;
+	atir_driver.sample_rate = 10;
+	atir_driver.data        = 0;
+	atir_driver.add_to_buf  = atir_add_to_buf;
+	atir_driver.set_use_inc = atir_set_use_inc;
+	atir_driver.set_use_dec = atir_set_use_dec;
+#ifdef LIRC_HAVE_SYSFS
+	atir_driver.dev         = &pdev->dev;
+#endif
+	atir_driver.owner       = THIS_MODULE;
+
+	atir_minor = lirc_register_driver(&atir_driver);
+	if (atir_minor < 0) {
+		printk(KERN_ERR DRIVER_NAME ": failed to register driver!\n");
+		return atir_minor;
+	}
+	dprintk("driver is registered on minor %d\n", atir_minor);
+
+	return 0;
+}
+
+
+void cleanup_module(void)
+{
+	lirc_unregister_driver(atir_minor);
+}
+
+
+static int atir_init_start(void)
+{
+	pci_addr_lin = ioremap(pci_addr_phys + DATA_PCI_OFF, 0x400);
+	if (pci_addr_lin == 0) {
+		printk(KERN_INFO DRIVER_NAME ": pci mem must be mapped\n");
+		return 0;
+	}
+	return 1;
+}
+
+static void cycle_delay(int cycle)
+{
+	udelay(WAIT_CYCLE*cycle);
+}
+
+
+static int poll_main()
+{
+	unsigned char status_high, status_low;
+
+	do_i2c_start();
+
+	seems_wr_byte(0xAA);
+	seems_wr_byte(0x01);
+
+	do_i2c_start();
+
+	seems_wr_byte(0xAB);
+
+	status_low = seems_rd_byte();
+	status_high = seems_rd_byte();
+
+	do_i2c_stop();
+
+	return (status_high << 8) | status_low;
+}
+
+static void do_i2c_start(void)
+{
+	do_set_bits(3);
+	cycle_delay(4);
+
+	do_set_bits(1);
+	cycle_delay(7);
+
+	do_set_bits(0);
+	cycle_delay(2);
+}
+
+static void do_i2c_stop(void)
+{
+	unsigned char bits;
+	bits =  do_get_bits() & 0xFD;
+	do_set_bits(bits);
+	cycle_delay(1);
+
+	bits |= 1;
+	do_set_bits(bits);
+	cycle_delay(2);
+
+	bits |= 2;
+	do_set_bits(bits);
+	bits = 3;
+	do_set_bits(bits);
+	cycle_delay(2);
+}
+
+static void seems_wr_byte(unsigned char value)
+{
+	int i;
+	unsigned char reg;
+
+	reg = do_get_bits();
+	for (i = 0; i < 8; i++) {
+		if (value & 0x80)
+			reg |= 0x02;
+		else
+			reg &= 0xFD;
+
+		do_set_bits(reg);
+		cycle_delay(1);
+
+		reg |= 1;
+		do_set_bits(reg);
+		cycle_delay(1);
+
+		reg &= 0xFE;
+		do_set_bits(reg);
+		cycle_delay(1);
+		value <<= 1;
+	}
+	cycle_delay(2);
+
+	reg |= 2;
+	do_set_bits(reg);
+
+	reg |= 1;
+	do_set_bits(reg);
+
+	cycle_delay(1);
+	do_get_bits();
+
+	reg &= 0xFE;
+	do_set_bits(reg);
+	cycle_delay(3);
+}
+
+static unsigned char seems_rd_byte(void)
+{
+	int i;
+	int rd_byte;
+	unsigned char bits_2, bits_1;
+
+	bits_1 = do_get_bits() | 2;
+	do_set_bits(bits_1);
+
+	rd_byte = 0;
+	for (i = 0; i < 8; i++) {
+		bits_1 &= 0xFE;
+		do_set_bits(bits_1);
+		cycle_delay(2);
+
+		bits_1 |= 1;
+		do_set_bits(bits_1);
+		cycle_delay(1);
+
+		bits_2 = do_get_bits();
+		if (bits_2 & 2)
+			rd_byte |= 1;
+
+		rd_byte <<= 1;
+	}
+
+	bits_1 = 0;
+	if (bits_2 == 0)
+		bits_1 |= 2;
+
+	do_set_bits(bits_1);
+	cycle_delay(2);
+
+	bits_1 |= 1;
+	do_set_bits(bits_1);
+	cycle_delay(3);
+
+	bits_1 &= 0xFE;
+	do_set_bits(bits_1);
+	cycle_delay(2);
+
+	rd_byte >>= 1;
+	rd_byte &= 0xFF;
+	return rd_byte;
+}
+
+static void do_set_bits(unsigned char new_bits)
+{
+	int reg_val;
+	reg_val = read_index(0x34);
+	if (new_bits & 2) {
+		reg_val &= 0xFFFFFFDF;
+		reg_val |= 1;
+	} else {
+		reg_val &= 0xFFFFFFFE;
+		reg_val |= 0x20;
+	}
+	reg_val |= 0x10;
+	write_index(0x34, reg_val);
+
+	reg_val = read_index(0x31);
+	if (new_bits & 1)
+		reg_val |= 0x1000000;
+	else
+		reg_val &= 0xFEFFFFFF;
+
+	reg_val |= 0x8000000;
+	write_index(0x31, reg_val);
+}
+
+static unsigned char do_get_bits(void)
+{
+	unsigned char bits;
+	int reg_val;
+
+	reg_val = read_index(0x34);
+	reg_val |= 0x10;
+	reg_val &= 0xFFFFFFDF;
+	write_index(0x34, reg_val);
+
+	reg_val = read_index(0x34);
+	bits = 0;
+	if (reg_val & 8)
+		bits |= 2;
+	else
+		bits &= 0xFD;
+
+	reg_val = read_index(0x31);
+	if (reg_val & 0x1000000)
+		bits |= 1;
+	else
+		bits &= 0xFE;
+
+	return bits;
+}
+
+static unsigned int read_index(unsigned char index)
+{
+	unsigned char *addr;
+	unsigned int value;
+	/*  addr = pci_addr_lin + DATA_PCI_OFF + ((index & 0xFF) << 2); */
+	addr = pci_addr_lin + ((index & 0xFF) << 2);
+	value = readl(addr);
+	return value;
+}
+
+static void write_index(unsigned char index, unsigned int reg_val)
+{
+	unsigned char *addr;
+	addr = pci_addr_lin + ((index & 0xFF) << 2);
+	writel(reg_val, addr);
+}
+
+MODULE_AUTHOR("Froenchenko Leonid");
+MODULE_DESCRIPTION("IR remote driver for bt829 based TV cards");
+MODULE_LICENSE("GPL");
+
+module_param(debug, bool, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(debug, "Debug enabled or not");
+EXPORT_NO_SYMBOLS;
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_bt829/Makefile
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_bt829/Makefile
@@ -0,0 +1,3 @@
+EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)/..
+
+obj-$(CONFIG_LIRC_ATIUSB)	+= lirc_bt829.o
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_i2c/lirc_i2c.c
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_i2c/lirc_i2c.c
@@ -0,0 +1,778 @@
+/*      $Id: lirc_i2c.c,v 1.70 2009/08/30 16:59:53 jarodwilson Exp $      */
+
+/*
+ * lirc_i2c.c
+ *
+ * i2c IR driver for the onboard IR port on many TV tuner cards, including:
+ *  -Flavors of the Hauppauge PVR-150/250/350
+ *  -Hauppauge HVR-1300
+ *  -PixelView (BT878P+W/FM)
+ *  -KNC ONE TV Station/Anubis Typhoon TView Tuner
+ *  -Asus TV-Box and Creative/VisionTek BreakOut-Box
+ *  -Leadtek Winfast PVR2000
+ *
+ * Copyright (c) 2000 Gerd Knorr <kraxel@goldbach.in-berlin.de>
+ * modified for PixelView (BT878P+W/FM) by
+ *      Michal Kochanowicz <mkochano@pld.org.pl>
+ *      Christoph Bartelmus <lirc@bartelmus.de>
+ * modified for KNC ONE TV Station/Anubis Typhoon TView Tuner by
+ *      Ulrich Mueller <ulrich.mueller42@web.de>
+ * modified for Asus TV-Box and Creative/VisionTek BreakOut-Box by
+ *      Stefan Jahn <stefan@lkcc.org>
+ * modified for inclusion into kernel sources by
+ *      Jerome Brock <jbrock@users.sourceforge.net>
+ * modified for Leadtek Winfast PVR2000 by
+ *      Thomas Reitmayr (treitmayr@yahoo.com)
+ * modified for Hauppauge HVR-1300 by
+ *      Jan Frey (jfrey@gmx.de)
+ *
+ * parts are cut&pasted from the old lirc_haup.c driver
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+
+#ifdef HAVE_CONFIG_H
+#include <config.h>
+#endif
+
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/kmod.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/string.h>
+#include <linux/timer.h>
+#include <linux/delay.h>
+#include <linux/errno.h>
+#include <linux/slab.h>
+#include <linux/i2c.h>
+#include <linux/i2c-algo-bit.h>
+
+#include "../kcompat.h"
+#include "../lirc_dev/lirc_dev.h"
+
+struct IR {
+	struct lirc_driver l;
+	struct i2c_client  c;
+	int nextkey;
+	unsigned char b[3];
+	unsigned char bits;
+	unsigned char flag;
+};
+
+#define DEVICE_NAME "lirc_i2c"
+
+/* module parameters */
+static int debug;	/* debug output */
+static int minor = -1;	/* minor number */
+
+#define dprintk(fmt, args...)						\
+	do {								\
+		if (debug)						\
+			printk(KERN_DEBUG DEVICE_NAME ": " fmt,		\
+			       ## args);				\
+	} while (0)
+
+static int reverse(int data, int bits)
+{
+	int i;
+	int c;
+
+	for (c = 0, i = 0; i < bits; i++)
+		c |= ((data & (1<<i)) ? 1 : 0) << (bits-1-i);
+
+	return c;
+}
+
+static int add_to_buf_adap(void *data, struct lirc_buffer *buf)
+{
+	struct IR *ir = data;
+	unsigned char keybuf[4];
+
+	keybuf[0] = 0x00;
+	i2c_master_send(&ir->c, keybuf, 1);
+	/* poll IR chip */
+	if (i2c_master_recv(&ir->c, keybuf, sizeof(keybuf)) != sizeof(keybuf)) {
+		dprintk("read error\n");
+		return -EIO;
+	}
+
+	dprintk("key (0x%02x%02x%02x%02x)\n",
+		keybuf[0], keybuf[1], keybuf[2], keybuf[3]);
+
+	/* key pressed ? */
+	if (keybuf[2] == 0xff)
+		return -ENODATA;
+
+	/* remove repeat bit */
+	keybuf[2] &= 0x7f;
+	keybuf[3] |= 0x80;
+
+	lirc_buffer_write(buf, keybuf);
+	return 0;
+}
+
+static int add_to_buf_pcf8574(void *data, struct lirc_buffer *buf)
+{
+	struct IR *ir = data;
+	int rc;
+	unsigned char all, mask;
+	unsigned char key;
+
+	/* compute all valid bits (key code + pressed/release flag) */
+	all = ir->bits | ir->flag;
+
+	/* save IR writable mask bits */
+	mask = i2c_smbus_read_byte(&ir->c) & ~all;
+
+	/* send bit mask */
+	rc = i2c_smbus_write_byte(&ir->c, (0xff & all) | mask);
+
+	/* receive scan code */
+	rc = i2c_smbus_read_byte(&ir->c);
+
+	if (rc == -1) {
+		dprintk("%s read error\n", ir->c.name);
+		return -EIO;
+	}
+
+	/* drop duplicate polls */
+	if (ir->b[0] == (rc & all))
+		return -ENODATA;
+
+	ir->b[0] = rc & all;
+
+	dprintk("%s key 0x%02X %s\n", ir->c.name, rc & ir->bits,
+		(rc & ir->flag) ? "released" : "pressed");
+
+	/* ignore released buttons */
+	if (rc & ir->flag)
+		return -ENODATA;
+
+	/* set valid key code */
+	key  = rc & ir->bits;
+	lirc_buffer_write(buf, &key);
+	return 0;
+}
+
+/* common for Hauppauge IR receivers */
+static int add_to_buf_haup_common(void *data, struct lirc_buffer *buf,
+		unsigned char *keybuf, int size, int offset)
+{
+	struct IR *ir = data;
+	__u16 code;
+	unsigned char codes[2];
+	int ret;
+
+	/* poll IR chip */
+	ret = i2c_master_recv(&ir->c, keybuf, size);
+	if (ret == size) {
+		ir->b[0] = keybuf[offset];
+		ir->b[1] = keybuf[offset+1];
+		ir->b[2] = keybuf[offset+2];
+		if (ir->b[0] != 0x00 && ir->b[1] != 0x00)
+			dprintk("key (0x%02x/0x%02x)\n", ir->b[0], ir->b[1]);
+	} else {
+		dprintk("read error (ret=%d)\n", ret);
+		/* keep last successful read buffer */
+	}
+
+	/* key pressed ? */
+	if ((ir->b[0] & 0x80) == 0)
+		return -ENODATA;
+
+	/* look what we have */
+	code = (((__u16)ir->b[0]&0x7f)<<6) | (ir->b[1]>>2);
+
+	codes[0] = (code >> 8) & 0xff;
+	codes[1] = code & 0xff;
+
+	/* return it */
+	dprintk("sending code 0x%02x%02x to lirc\n", codes[0], codes[1]);
+	lirc_buffer_write(buf, codes);
+	return 0;
+}
+
+/* specific for the Hauppauge PVR150 IR receiver */
+static int add_to_buf_haup_pvr150(void *data, struct lirc_buffer *buf)
+{
+	unsigned char keybuf[6];
+	/* fetch 6 bytes, first relevant is at offset 3 */
+	return add_to_buf_haup_common(data, buf, keybuf, 6, 3);
+}
+
+/* used for all Hauppauge IR receivers but the PVR150 */
+static int add_to_buf_haup(void *data, struct lirc_buffer *buf)
+{
+	unsigned char keybuf[3];
+	/* fetch 3 bytes, first relevant is at offset 0 */
+	return add_to_buf_haup_common(data, buf, keybuf, 3, 0);
+}
+
+
+static int add_to_buf_pvr2000(void *data, struct lirc_buffer *buf)
+{
+	struct IR *ir = data;
+	unsigned char key;
+	s32 flags;
+	s32 code;
+
+	/* poll IR chip */
+	flags = i2c_smbus_read_byte_data(&ir->c, 0x10);
+	if (-1 == flags) {
+		dprintk("read error\n");
+		return -ENODATA;
+	}
+	/* key pressed ? */
+	if (0 == (flags & 0x80))
+		return -ENODATA;
+
+	/* read actual key code */
+	code = i2c_smbus_read_byte_data(&ir->c, 0x00);
+	if (-1 == code) {
+		dprintk("read error\n");
+		return -ENODATA;
+	}
+
+	key = code & 0xFF;
+
+	dprintk("IR Key/Flags: (0x%02x/0x%02x)\n", key, flags & 0xFF);
+
+	/* return it */
+	lirc_buffer_write(buf, &key);
+	return 0;
+}
+
+static int add_to_buf_pixelview(void *data, struct lirc_buffer *buf)
+{
+	struct IR *ir = data;
+	unsigned char key;
+
+	/* poll IR chip */
+	if (1 != i2c_master_recv(&ir->c, &key, 1)) {
+		dprintk("read error\n");
+		return -1;
+	}
+	dprintk("key %02x\n", key);
+
+	/* return it */
+	lirc_buffer_write(buf, &key);
+	return 0;
+}
+
+static int add_to_buf_pv951(void *data, struct lirc_buffer *buf)
+{
+	struct IR *ir = data;
+	unsigned char key;
+	unsigned char codes[4];
+
+	/* poll IR chip */
+	if (1 != i2c_master_recv(&ir->c, &key, 1)) {
+		dprintk("read error\n");
+		return -ENODATA;
+	}
+	/* ignore 0xaa */
+	if (key == 0xaa)
+		return -ENODATA;
+	dprintk("key %02x\n", key);
+
+	codes[0] = 0x61;
+	codes[1] = 0xD6;
+	codes[2] = reverse(key, 8);
+	codes[3] = (~codes[2])&0xff;
+
+	lirc_buffer_write(buf, codes);
+	return 0;
+}
+
+static int add_to_buf_knc1(void *data, struct lirc_buffer *buf)
+{
+	static unsigned char last_key = 0xFF;
+	struct IR *ir = data;
+	unsigned char key;
+
+	/* poll IR chip */
+	if (1 != i2c_master_recv(&ir->c, &key, 1)) {
+		dprintk("read error\n");
+		return -ENODATA;
+	}
+
+	/*
+	 * it seems that 0xFE indicates that a button is still held
+	 * down, while 0xFF indicates that no button is held
+	 * down. 0xFE sequences are sometimes interrupted by 0xFF
+	 */
+
+	dprintk("key %02x\n", key);
+
+	if (key == 0xFF)
+		return -ENODATA;
+
+	if (key == 0xFE)
+		key = last_key;
+
+	last_key = key;
+	lirc_buffer_write(buf, &key);
+
+	return 0;
+}
+
+static int set_use_inc(void *data)
+{
+	struct IR *ir = data;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 25)
+	int ret;
+#endif
+
+	dprintk("%s called\n", __func__);
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 25)
+	i2c_use_client(&ir->c);
+#else
+	/* lock bttv in memory while /dev/lirc is in use  */
+	ret = i2c_use_client(&ir->c);
+	if (ret != 0)
+		return ret;
+#endif
+
+	MOD_INC_USE_COUNT;
+	return 0;
+}
+
+static void set_use_dec(void *data)
+{
+	struct IR *ir = data;
+
+	dprintk("%s called\n", __func__);
+
+	i2c_release_client(&ir->c);
+	MOD_DEC_USE_COUNT;
+}
+
+static struct lirc_driver lirc_template = {
+	.name		= "lirc_i2c",
+	.set_use_inc	= set_use_inc,
+	.set_use_dec	= set_use_dec,
+	.dev		= NULL,
+	.owner		= THIS_MODULE,
+};
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 31)
+static int ir_attach(struct i2c_adapter *adap, int addr,
+		      unsigned short flags, int kind);
+static int ir_probe(struct i2c_adapter *adap);
+# else
+static int ir_probe(struct i2c_client *client, const struct i2c_device_id *id);
+#endif
+static int ir_remove(struct i2c_client *client);
+static int ir_command(struct i2c_client *client, unsigned int cmd, void *arg);
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 30)
+static const struct i2c_device_id ir_receiver_id[] = {
+	/* Generic entry for any IR receiver */
+	{ "ir_video", 0 },
+	/* IR device specific entries could be added here */
+	{ }
+};
+#endif
+
+static struct i2c_driver driver = {
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 16)
+	.name		= "i2c ir driver",
+	.flags		= I2C_DF_NOTIFY,
+#else
+	.driver = {
+		.owner	= THIS_MODULE,
+		.name	= "i2c ir driver",
+	},
+#endif
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 31)
+	.attach_adapter	= ir_probe,
+	.detach_client	= ir_remove,
+#else
+	.probe		= ir_probe,
+	.remove		= ir_remove,
+	.id_table	= ir_receiver_id,
+#endif
+	.command	= ir_command,
+};
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 31)
+static struct i2c_client client_template = {
+	.name		= "unset",
+	.driver		= &driver
+};
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 31)
+static int ir_attach(struct i2c_adapter *adap, int addr,
+		     unsigned short flags, int kind)
+#else
+static void pcf_probe(struct i2c_client *client, struct IR *ir)
+{
+	int ret1, ret2, ret3, ret4;
+
+	ret1 = i2c_smbus_write_byte(client, 0xff);
+	ret2 = i2c_smbus_read_byte(client);
+	ret3 = i2c_smbus_write_byte(client, 0x00);
+	ret4 = i2c_smbus_read_byte(client);
+
+	/* in the Asus TV-Box: bit 1-0 */
+	if (((ret2 & 0x03) == 0x03) && ((ret4 & 0x03) == 0x00)) {
+		ir->bits = (unsigned char) ~0x07;
+		ir->flag = 0x04;
+	/* in the Creative/VisionTek BreakOut-Box: bit 7-6 */
+	} else if (((ret2 & 0xc0) == 0xc0) && ((ret4 & 0xc0) == 0x00)) {
+		ir->bits = (unsigned char) ~0xe0;
+		ir->flag = 0x20;
+	}
+
+	return;
+}
+
+static int ir_probe(struct i2c_client *client, const struct i2c_device_id *id)
+#endif
+{
+	struct IR *ir;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 31)
+	int err, retval;
+
+	client_template.adapter = adap;
+	client_template.addr = addr;
+#else
+	struct i2c_adapter *adap = client->adapter;
+	unsigned short addr = client->addr;
+	int retval;
+#endif
+
+	ir = kmalloc(sizeof(struct IR), GFP_KERNEL);
+	if (!ir)
+		return -ENOMEM;
+	memcpy(&ir->l, &lirc_template, sizeof(struct lirc_driver));
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 31)
+	memcpy(&ir->c, &client_template, sizeof(struct i2c_client));
+
+	ir->c.adapter = adap;
+	ir->c.addr    = addr;
+	i2c_set_clientdata(&ir->c, ir);
+#else
+	memcpy(&ir->c, client, sizeof(struct i2c_client));
+
+	i2c_set_clientdata(client, ir);
+#endif
+	ir->l.data    = ir;
+	ir->l.minor   = minor;
+	ir->l.sample_rate = 10;
+	ir->l.dev     = &ir->c.dev;
+	ir->nextkey   = -1;
+
+	switch (addr) {
+	case 0x64:
+		strlcpy(ir->c.name, "Pixelview IR", I2C_NAME_SIZE);
+		ir->l.code_length = 8;
+		ir->l.add_to_buf = add_to_buf_pixelview;
+		break;
+	case 0x4b:
+		strlcpy(ir->c.name, "PV951 IR", I2C_NAME_SIZE);
+		ir->l.code_length = 32;
+		ir->l.add_to_buf = add_to_buf_pv951;
+		break;
+	case 0x71:
+#ifdef I2C_HW_B_CX2341X
+		if (adap->id == (I2C_ALGO_BIT | I2C_HW_B_BT848) ||
+		    adap->id == (I2C_ALGO_BIT | I2C_HW_B_CX2341X)) {
+#else
+		if (adap->id == (I2C_ALGO_BIT | I2C_HW_B_BT848)) {
+#endif
+			/*
+			 * The PVR150 IR receiver uses the same protocol as
+			 * other Hauppauge cards, but the data flow is
+			 * different, so we need to deal with it by its own.
+			 */
+			strlcpy(ir->c.name, "Hauppauge PVR150", I2C_NAME_SIZE);
+		} else /* I2C_HW_B_CX2388x */
+			strlcpy(ir->c.name, "Hauppauge HVR1300", I2C_NAME_SIZE);
+		ir->l.code_length = 13;
+		ir->l.add_to_buf = add_to_buf_haup_pvr150;
+		break;
+	case 0x6b:
+		strlcpy(ir->c.name, "Adaptec IR", I2C_NAME_SIZE);
+		ir->l.code_length = 32;
+		ir->l.add_to_buf = add_to_buf_adap;
+		break;
+	case 0x18:
+	case 0x1a:
+#ifdef I2C_HW_B_CX2341X
+		if (adap->id == (I2C_ALGO_BIT | I2C_HW_B_BT848) ||
+		    adap->id == (I2C_ALGO_BIT | I2C_HW_B_CX2341X)) {
+#else
+		if (adap->id == (I2C_ALGO_BIT | I2C_HW_B_BT848)) {
+#endif
+			strlcpy(ir->c.name, "Hauppauge IR", I2C_NAME_SIZE);
+			ir->l.code_length = 13;
+			ir->l.add_to_buf = add_to_buf_haup;
+		} else { /* I2C_HW_B_CX2388x */
+			strlcpy(ir->c.name, "Leadtek IR", I2C_NAME_SIZE);
+			ir->l.code_length = 8;
+			ir->l.add_to_buf = add_to_buf_pvr2000;
+		}
+		break;
+	case 0x30:
+		strlcpy(ir->c.name, "KNC ONE IR", I2C_NAME_SIZE);
+		ir->l.code_length = 8;
+		ir->l.add_to_buf = add_to_buf_knc1;
+		break;
+	case 0x21:
+	case 0x23:
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 31)
+		ir->bits = flags & 0xff;
+		ir->flag = (flags >> 8) & 0xff;
+#else
+		pcf_probe(client, ir);
+#endif
+		strlcpy(ir->c.name, "TV-Box IR", I2C_NAME_SIZE);
+		ir->l.code_length = 8;
+		ir->l.add_to_buf = add_to_buf_pcf8574;
+		break;
+	default:
+		/* shouldn't happen */
+		printk("lirc_i2c: Huh? unknown i2c address (0x%02x)?\n", addr);
+		kfree(ir);
+		return -EINVAL;
+	}
+	printk(KERN_INFO "lirc_i2c: chip 0x%x found @ 0x%02x (%s)\n",
+	       adap->id, addr, ir->c.name);
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 31)
+	/* register device */
+	err = i2c_attach_client(&ir->c);
+	if (err) {
+		kfree(ir);
+		return err;
+	}
+#endif
+
+	retval = lirc_register_driver(&ir->l);
+
+	if (retval < 0) {
+		printk(KERN_ERR "lirc_i2c: failed to register driver!\n");
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 31)
+		i2c_detach_client(&ir->c);
+#endif
+		kfree(ir);
+		return retval;
+	}
+
+	ir->l.minor = retval;
+
+	return 0;
+}
+
+static int ir_remove(struct i2c_client *client)
+{
+	struct IR *ir = i2c_get_clientdata(client);
+
+	/* unregister device */
+	lirc_unregister_driver(ir->l.minor);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 31)
+	i2c_detach_client(&ir->c);
+#endif
+
+	/* free memory */
+	kfree(ir);
+	return 0;
+}
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 31)
+static int ir_probe(struct i2c_adapter *adap)
+{
+	/*
+	 * The external IR receiver is at i2c address 0x34 (0x35 for
+	 * reads).  Future Hauppauge cards will have an internal
+	 * receiver at 0x30 (0x31 for reads).  In theory, both can be
+	 * fitted, and Hauppauge suggest an external overrides an
+	 * internal.
+	 *
+	 * That's why we probe 0x1a (~0x34) first. CB
+	 *
+	 * The i2c address for the Hauppauge PVR-150 card is 0xe2,
+	 * so we need to probe 0x71 as well.
+	 */
+
+	static const int probe[] = {
+		0x1a, /* Hauppauge IR external */
+		0x18, /* Hauppauge IR internal */
+		0x71, /* Hauppauge IR (PVR150) */
+		0x4b, /* PV951 IR */
+		0x64, /* Pixelview IR */
+		0x30, /* KNC ONE IR */
+		0x6b, /* Adaptec IR */
+		-1};
+
+#ifdef I2C_HW_B_CX2388x
+	static const int probe_cx88[] = {
+		0x18, /* Leadtek Winfast PVR2000 */
+		0x71, /* Hauppauge HVR-IR */
+		-1};
+#endif
+
+	struct i2c_client c;
+	char buf;
+	int i, rc;
+
+	memset(&c, 0, sizeof(c));
+#ifdef I2C_HW_B_CX2341X
+	if (adap->id == (I2C_ALGO_BIT | I2C_HW_B_BT848) ||
+	    adap->id == (I2C_ALGO_BIT | I2C_HW_B_CX2341X)) {
+#else
+	if (adap->id == (I2C_ALGO_BIT | I2C_HW_B_BT848)) {
+#endif
+		c.adapter = adap;
+		for (i = 0; -1 != probe[i]; i++) {
+			c.addr = probe[i];
+			rc = i2c_master_recv(&c, &buf, 1);
+			dprintk("probe 0x%02x @ %s: %s\n",
+				probe[i], adap->name,
+				(1 == rc) ? "yes" : "no");
+			if (1 == rc) {
+				rc = ir_attach(adap, probe[i], 0, 0);
+				if (rc < 0)
+					goto attach_fail;
+			}
+		}
+	}
+
+#ifdef I2C_HW_B_CX2388x
+	/* Leadtek Winfast PVR2000 or Hauppauge HVR-1300 */
+	else if (adap->id == (I2C_ALGO_BIT | I2C_HW_B_CX2388x)) {
+		c.adapter = adap;
+		for (i = 0; -1 != probe_cx88[i]; i++) {
+			c.addr = probe_cx88[i];
+			rc = i2c_master_recv(&c, &buf, 1);
+			dprintk("probe 0x%02x @ %s: %s\n",
+				c.addr, adap->name,
+				(1 == rc) ? "yes" : "no");
+			if (1 == rc) {
+				rc = ir_attach(adap, c.addr, 0, 0);
+				if (rc < 0)
+					goto attach_fail;
+			}
+		}
+	}
+#endif
+
+	/* Asus TV-Box and Creative/VisionTek BreakOut-Box (PCF8574) */
+	else if (adap->id == (I2C_ALGO_BIT | I2C_HW_B_RIVA)) {
+		/*
+		 * addresses to probe;
+		 * leave 0x24 and 0x25 because SAA7113H possibly uses it
+		 * 0x21 and 0x22 possibly used by SAA7108E
+		 * Asus:      0x21 is a correct address (channel 1 of PCF8574)
+		 * Creative:  0x23 is a correct address (channel 3 of PCF8574)
+		 * VisionTek: 0x23 is a correct address (channel 3 of PCF8574)
+		 */
+		static const int pcf_probe[] = { 0x20, 0x21, 0x22, 0x23,
+						 0x24, 0x25, 0x26, 0x27, -1 };
+		int ret1, ret2, ret3, ret4;
+		unsigned char bits = 0, flag = 0;
+
+		c.adapter = adap;
+		for (i = 0; -1 != pcf_probe[i]; i++) {
+			c.addr = pcf_probe[i];
+			ret1 = i2c_smbus_write_byte(&c, 0xff);
+			ret2 = i2c_smbus_read_byte(&c);
+			ret3 = i2c_smbus_write_byte(&c, 0x00);
+			ret4 = i2c_smbus_read_byte(&c);
+
+			/* ensure that the writable bitmask works correctly */
+			rc = 0;
+			if (ret1 != -1 && ret2 != -1 &&
+			    ret3 != -1 && ret4 != -1) {
+				/* in the Asus TV-Box: bit 1-0 */
+				if (((ret2 & 0x03) == 0x03) &&
+				    ((ret4 & 0x03) == 0x00)) {
+					bits = (unsigned char) ~0x07;
+					flag = 0x04;
+					rc = 1;
+				}
+			/* in the Creative/VisionTek BreakOut-Box: bit 7-6 */
+				if (((ret2 & 0xc0) == 0xc0) &&
+				    ((ret4 & 0xc0) == 0x00)) {
+					bits = (unsigned char) ~0xe0;
+					flag = 0x20;
+					rc = 1;
+				}
+			}
+			dprintk("probe 0x%02x @ %s: %s\n",
+				c.addr, adap->name, rc ? "yes" : "no");
+			if (rc) {
+				rc = ir_attach(adap, pcf_probe[i],
+					       bits | (flag << 8), 0);
+				if (rc < 0)
+					goto attach_fail;
+			}
+		}
+	}
+
+	return 0;
+
+attach_fail:
+	printk(KERN_ERR "lirc_i2c: %s: ir_attach failed!\n", __func__);
+	return rc;
+
+}
+#endif
+
+static int ir_command(struct i2c_client *client, unsigned int cmd, void *arg)
+{
+	/* nothing */
+	return 0;
+}
+
+#ifdef MODULE
+
+static int __init lirc_i2c_init(void)
+{
+	request_module("bttv");
+	request_module("rivatv");
+	request_module("ivtv");
+	request_module("cx8800");
+	i2c_add_driver(&driver);
+	return 0;
+}
+
+static void __exit lirc_i2c_exit(void)
+{
+	i2c_del_driver(&driver);
+}
+
+MODULE_DESCRIPTION("Infrared receiver driver for Hauppauge and "
+		   "Pixelview cards (i2c stack)");
+MODULE_AUTHOR("Gerd Knorr, Michal Kochanowicz, Christoph Bartelmus, "
+	      "Ulrich Mueller, Stefan Jahn, Jerome Brock");
+MODULE_LICENSE("GPL");
+
+module_param(minor, int, S_IRUGO);
+MODULE_PARM_DESC(minor, "Preferred minor device number");
+
+module_param(debug, bool, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(debug, "Enable debugging messages");
+
+module_init(lirc_i2c_init);
+module_exit(lirc_i2c_exit);
+EXPORT_NO_SYMBOLS;
+
+#endif /* MODULE */
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_i2c/Makefile
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_i2c/Makefile
@@ -0,0 +1,3 @@
+EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)/..
+
+obj-$(CONFIG_LIRC_I2C)		+= lirc_i2c.o
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_imon/Makefile
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_imon/Makefile
@@ -0,0 +1,3 @@
+EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)/..
+
+obj-$(CONFIG_LIRC_IMON)		+= lirc_imon.o
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_imon/lirc_imon.c
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_imon/lirc_imon.c
@@ -0,0 +1,2370 @@
+/*
+ *   lirc_imon.c:  LIRC/VFD/LCD driver for SoundGraph iMON IR/VFD/LCD
+ *		   including the iMON PAD model
+ *
+ *   $Id: lirc_imon.c,v 1.111 2009/09/11 04:56:18 jarodwilson Exp $
+ *
+ *   Copyright(C) 2004  Venky Raju(dev@venky.ws)
+ *
+ *   lirc_imon is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/version.h>
+
+#ifdef HAVE_CONFIG_H
+#include <config.h>
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 0)
+#error "*** Sorry, this driver requires a 2.6 kernel"
+#endif
+
+#include <linux/autoconf.h>
+
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18)
+#include <asm/uaccess.h>
+#else
+#include <linux/uaccess.h>
+#endif
+#include <linux/usb.h>
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18)
+#include <linux/usb/input.h>
+#else
+#include <linux/input.h>
+#endif
+#include <linux/time.h>
+#include <linux/timer.h>
+
+#include "../kcompat.h"
+#include "../lirc.h"
+#include "../lirc_dev/lirc_dev.h"
+
+
+#define MOD_AUTHOR	"Venky Raju <dev@venky.ws>"
+#define MOD_DESC	"Driver for SoundGraph iMON MultiMedia IR/Display"
+#define MOD_NAME	"lirc_imon"
+#define MOD_VERSION	"0.6"
+
+#define DISPLAY_MINOR_BASE	144
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 15)
+#define DEVFS_MODE	(S_IFCHR | S_IRUSR | S_IWUSR | \
+			 S_IRGRP | S_IWGRP | S_IROTH)
+#endif
+#define DEVICE_NAME	LIRC_DEVFS_PREFIX "lcd%d"
+
+#define BUF_CHUNK_SIZE	4
+#define BUF_SIZE	128
+
+#define BIT_DURATION	250	/* each bit received is 250us */
+
+#define IMON_CLOCK_ENABLE_PACKETS	2
+
+#define dprintk(fmt, args...)						\
+	do {								\
+		if (debug)						\
+			printk(KERN_INFO MOD_NAME ": " fmt, ## args);	\
+	} while (0)
+
+/*** P R O T O T Y P E S ***/
+
+/* USB Callback prototypes */
+static int imon_probe(struct usb_interface *interface,
+		      const struct usb_device_id *id);
+static void imon_disconnect(struct usb_interface *interface);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19)
+static void usb_rx_callback_intf0(struct urb *urb, struct pt_regs *regs);
+static void usb_rx_callback_intf1(struct urb *urb, struct pt_regs *regs);
+static void usb_tx_callback(struct urb *urb, struct pt_regs *regs);
+#else
+static void usb_rx_callback_intf0(struct urb *urb);
+static void usb_rx_callback_intf1(struct urb *urb);
+static void usb_tx_callback(struct urb *urb);
+#endif
+
+/* suspend/resume support */
+static int imon_resume(struct usb_interface *intf);
+static int imon_suspend(struct usb_interface *intf, pm_message_t message);
+
+/* Display file_operations function prototypes */
+static int display_open(struct inode *inode, struct file *file);
+static int display_close(struct inode *inode, struct file *file);
+
+/* VFD write operation */
+static ssize_t vfd_write(struct file *file, const char *buf,
+			 size_t n_bytes, loff_t *pos);
+
+/* LCD file_operations override function prototypes */
+static ssize_t lcd_write(struct file *file, const char *buf,
+			 size_t n_bytes, loff_t *pos);
+
+/* LIRC driver function prototypes */
+static int ir_open(void *data);
+static void ir_close(void *data);
+
+/* Driver init/exit prototypes */
+static int __init imon_init(void);
+static void __exit imon_exit(void);
+
+/*** G L O B A L S ***/
+
+struct imon_context {
+	struct usb_device *usbdev_intf0;
+	/* Newer devices have two interfaces */
+	struct usb_device *usbdev_intf1;
+	int display_supported;		/* not all controllers do */
+	int display_isopen;		/* display port has been opened */
+	int ir_isopen;			/* IR port open	*/
+	int ir_isassociating;		/* IR port open for association */
+	int dev_present_intf0;		/* USB device presence, interface 0 */
+	int dev_present_intf1;		/* USB device presence, interface 1 */
+	struct mutex lock;		/* to lock this object */
+	wait_queue_head_t remove_ok;	/* For unexpected USB disconnects */
+
+	int vfd_proto_6p;		/* some VFD require a 6th packet */
+	int ir_onboard_decode;		/* IR signals decoded onboard */
+
+	struct lirc_driver *driver;
+	struct usb_endpoint_descriptor *rx_endpoint_intf0;
+	struct usb_endpoint_descriptor *rx_endpoint_intf1;
+	struct usb_endpoint_descriptor *tx_endpoint;
+	struct urb *rx_urb_intf0;
+	struct urb *rx_urb_intf1;
+	struct urb *tx_urb;
+	int tx_control;
+	unsigned char usb_rx_buf[8];
+	unsigned char usb_tx_buf[8];
+
+	struct rx_data {
+		int count;		/* length of 0 or 1 sequence */
+		int prev_bit;		/* logic level of sequence */
+		int initial_space;	/* initial space flag */
+	} rx;
+
+	struct tx_t {
+		unsigned char data_buf[35];	/* user data buffer */
+		struct completion finished;	/* wait for write to finish */
+		atomic_t busy;			/* write in progress */
+		int status;			/* status of tx completion */
+	} tx;
+
+	int ffdc_dev;			/* is this the overused ffdc ID? */
+	int ir_protocol;		/* iMON or MCE (RC6) IR protocol? */
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18)
+	struct input_dev *mouse;	/* input device for iMON PAD remote */
+	struct input_dev *touch;	/* input device for touchscreen */
+#endif
+	int display_type;		/* store the display type */
+	int pad_mouse;			/* toggle kbd(0)/mouse(1) mode */
+	int touch_x;			/* x coordinate on touchscreen */
+	int touch_y;			/* y coordinate on touchscreen */
+	char name_mouse[128];
+	char phys_mouse[64];
+	char name_touch[128];
+	char phys_touch[64];
+	struct timer_list timer;
+};
+
+#define TOUCH_TIMEOUT	(HZ/30)
+
+/* display file operations. Nb: lcd_write will be subbed in as needed later */
+static struct file_operations display_fops = {
+	.owner		= THIS_MODULE,
+	.open		= &display_open,
+	.write		= &vfd_write,
+	.release	= &display_close
+};
+
+enum {
+	IMON_DISPLAY_TYPE_AUTO = 0,
+	IMON_DISPLAY_TYPE_VFD  = 1,
+	IMON_DISPLAY_TYPE_LCD  = 2,
+	IMON_DISPLAY_TYPE_VGA  = 3,
+	IMON_DISPLAY_TYPE_NONE = 4,
+};
+
+enum {
+	IMON_IR_PROTOCOL_IMON       = 0,
+	IMON_IR_PROTOCOL_MCE        = 1,
+	IMON_IR_PROTOCOL_IMON_NOPAD = 2,
+};
+/*
+ * USB Device ID for iMON USB Control Boards
+ *
+ * The Windows drivers contain 6 different inf files, more or less one for
+ * each new device until the 0x0034-0x0046 devices, which all use the same
+ * driver. Some of the devices in the 34-46 range haven't been definitively
+ * identified yet. Early devices have either a TriGem Computer, Inc. or a
+ * Samsung vendor ID (0x0aa8 and 0x04e8 respectively), while all later
+ * devices use the SoundGraph vendor ID (0x15c2).
+ */
+static struct usb_device_id imon_usb_id_table[] = {
+	/* TriGem iMON (IR only) -- TG_iMON.inf */
+	{ USB_DEVICE(0x0aa8, 0x8001) },
+
+	/* SoundGraph iMON (IR only) -- sg_imon.inf */
+	{ USB_DEVICE(0x04e8, 0xff30) },
+
+	/* SoundGraph iMON VFD (IR & VFD) -- iMON_VFD.inf */
+	{ USB_DEVICE(0x0aa8, 0xffda) },
+
+	/* SoundGraph iMON SS (IR & VFD) -- iMON_SS.inf */
+	{ USB_DEVICE(0x15c2, 0xffda) },
+
+	/*
+	 * Several devices with this same device ID, all use iMON_PAD.inf
+	 * SoundGraph iMON PAD (IR & VFD)
+	 * SoundGraph iMON PAD (IR & LCD)
+	 * SoundGraph iMON Knob (IR only)
+	 */
+	/* SoundGraph iMON PAD (IR & VFD/LCD), iMON Knob */
+	{ USB_DEVICE(0x15c2, 0xffdc) },
+
+	/*
+	 * Newer devices, all driven by the latest iMON Windows driver, full
+	 * list of device IDs extracted via 'strings Setup/data1.hdr |grep 15c2'
+	 * Need user input to fill in details on unknown devices.
+	 */
+	/* SoundGraph iMON OEM Touch LCD (IR & 7" VGA LCD) */
+	{ USB_DEVICE(0x15c2, 0x0034) },
+	/* SoundGraph iMON OEM Touch LCD (IR & 4.3" VGA LCD) */
+	{ USB_DEVICE(0x15c2, 0x0035) },
+	/* SoundGraph iMON OEM VFD (IR & VFD) */
+	{ USB_DEVICE(0x15c2, 0x0036) },
+	/* device specifics unknown */
+	{ USB_DEVICE(0x15c2, 0x0037) },
+	/* SoundGraph iMON OEM LCD (IR & LCD) */
+	{ USB_DEVICE(0x15c2, 0x0038) },
+	/* device specifics unknown */
+	{ USB_DEVICE(0x15c2, 0x0039) },
+	/* device specifics unknown */
+	{ USB_DEVICE(0x15c2, 0x003a) },
+	/* device specifics unknown */
+	{ USB_DEVICE(0x15c2, 0x003b) },
+	/* SoundGraph iMON OEM Inside (IR only) */
+	{ USB_DEVICE(0x15c2, 0x003c) },
+	/* device specifics unknown */
+	{ USB_DEVICE(0x15c2, 0x003d) },
+	/* device specifics unknown */
+	{ USB_DEVICE(0x15c2, 0x003e) },
+	/* device specifics unknown */
+	{ USB_DEVICE(0x15c2, 0x003f) },
+	/* device specifics unknown */
+	{ USB_DEVICE(0x15c2, 0x0040) },
+	/* SoundGraph iMON MINI (IR only) */
+	{ USB_DEVICE(0x15c2, 0x0041) },
+	/* Antec Veris Multimedia Station EZ External (IR only) */
+	{ USB_DEVICE(0x15c2, 0x0042) },
+	/* Antec Veris Multimedia Station Basic Internal (IR only) */
+	{ USB_DEVICE(0x15c2, 0x0043) },
+	/* Antec Veris Multimedia Station Elite (IR & VFD) */
+	{ USB_DEVICE(0x15c2, 0x0044) },
+	/* Antec Veris Multimedia Station Premiere (IR & LCD) */
+	{ USB_DEVICE(0x15c2, 0x0045) },
+	/* device specifics unknown */
+	{ USB_DEVICE(0x15c2, 0x0046) },
+	{}
+};
+
+/* Some iMON VFD models requires a 6th packet for VFD writes */
+static struct usb_device_id vfd_proto_6p_list[] = {
+	{ USB_DEVICE(0x15c2, 0xffda) },
+	{ USB_DEVICE(0x15c2, 0xffdc) },
+	{ USB_DEVICE(0x15c2, 0x0036) },
+	{ USB_DEVICE(0x15c2, 0x0044) },
+	{}
+};
+
+/* newer iMON models use control endpoints */
+static struct usb_device_id ctl_ep_device_list[] = {
+	{ USB_DEVICE(0x15c2, 0x0034) },
+	{ USB_DEVICE(0x15c2, 0x0035) },
+	{ USB_DEVICE(0x15c2, 0x0036) },
+	{ USB_DEVICE(0x15c2, 0x0037) },
+	{ USB_DEVICE(0x15c2, 0x0038) },
+	{ USB_DEVICE(0x15c2, 0x0039) },
+	{ USB_DEVICE(0x15c2, 0x003a) },
+	{ USB_DEVICE(0x15c2, 0x003b) },
+	{ USB_DEVICE(0x15c2, 0x003c) },
+	{ USB_DEVICE(0x15c2, 0x003d) },
+	{ USB_DEVICE(0x15c2, 0x003e) },
+	{ USB_DEVICE(0x15c2, 0x003f) },
+	{ USB_DEVICE(0x15c2, 0x0040) },
+	{ USB_DEVICE(0x15c2, 0x0041) },
+	{ USB_DEVICE(0x15c2, 0x0042) },
+	{ USB_DEVICE(0x15c2, 0x0043) },
+	{ USB_DEVICE(0x15c2, 0x0044) },
+	{ USB_DEVICE(0x15c2, 0x0045) },
+	{ USB_DEVICE(0x15c2, 0x0046) },
+	{}
+};
+
+/* iMON LCD models use a different write op */
+static struct usb_device_id lcd_device_list[] = {
+	{ USB_DEVICE(0x15c2, 0xffdc) },
+	{ USB_DEVICE(0x15c2, 0x0038) },
+	{ USB_DEVICE(0x15c2, 0x0045) },
+	{}
+};
+
+/* iMON devices with front panel buttons or touchscreen need a larger buffer */
+static struct usb_device_id large_buffer_list[] = {
+	{ USB_DEVICE(0x15c2, 0x0034) },
+	{ USB_DEVICE(0x15c2, 0x0035) },
+	{ USB_DEVICE(0x15c2, 0x0038) },
+	{ USB_DEVICE(0x15c2, 0x0045) },
+};
+
+/* Newer iMON models decode the signal onboard */
+static struct usb_device_id ir_onboard_decode_list[] = {
+	{ USB_DEVICE(0x15c2, 0xffdc) },
+	{ USB_DEVICE(0x15c2, 0x0034) },
+	{ USB_DEVICE(0x15c2, 0x0035) },
+	{ USB_DEVICE(0x15c2, 0x0036) },
+	{ USB_DEVICE(0x15c2, 0x0037) },
+	{ USB_DEVICE(0x15c2, 0x0038) },
+	{ USB_DEVICE(0x15c2, 0x0039) },
+	{ USB_DEVICE(0x15c2, 0x003a) },
+	{ USB_DEVICE(0x15c2, 0x003b) },
+	{ USB_DEVICE(0x15c2, 0x003c) },
+	{ USB_DEVICE(0x15c2, 0x003d) },
+	{ USB_DEVICE(0x15c2, 0x003e) },
+	{ USB_DEVICE(0x15c2, 0x003f) },
+	{ USB_DEVICE(0x15c2, 0x0040) },
+	{ USB_DEVICE(0x15c2, 0x0041) },
+	{ USB_DEVICE(0x15c2, 0x0042) },
+	{ USB_DEVICE(0x15c2, 0x0043) },
+	{ USB_DEVICE(0x15c2, 0x0044) },
+	{ USB_DEVICE(0x15c2, 0x0045) },
+	{ USB_DEVICE(0x15c2, 0x0046) },
+	{}
+};
+
+/* Some iMON devices have no lcd/vfd, don't set one up */
+static struct usb_device_id ir_only_list[] = {
+	{ USB_DEVICE(0x0aa8, 0x8001) },
+	{ USB_DEVICE(0x04e8, 0xff30) },
+	/* the first imon lcd and the knob share this device id. :\ */
+	/*{ USB_DEVICE(0x15c2, 0xffdc) },*/
+	{ USB_DEVICE(0x15c2, 0x003c) },
+	{ USB_DEVICE(0x15c2, 0x0041) },
+	{ USB_DEVICE(0x15c2, 0x0042) },
+	{ USB_DEVICE(0x15c2, 0x0043) },
+	{}
+};
+
+/* iMON devices with VGA touchscreens */
+static struct usb_device_id imon_touchscreen_list[] = {
+	{ USB_DEVICE(0x15c2, 0x0034) },
+	{ USB_DEVICE(0x15c2, 0x0035) },
+	{}
+};
+
+/* USB Device data */
+static struct usb_driver imon_driver = {
+	LIRC_THIS_MODULE(.owner = THIS_MODULE)
+	.name		= MOD_NAME,
+	.probe		= imon_probe,
+	.disconnect	= imon_disconnect,
+	.suspend	= imon_suspend,
+	.resume		= imon_resume,
+	.id_table	= imon_usb_id_table,
+};
+
+static struct usb_class_driver imon_class = {
+	.name		= DEVICE_NAME,
+	.fops		= &display_fops,
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 15)
+	.mode		= DEVFS_MODE,
+#endif
+	.minor_base	= DISPLAY_MINOR_BASE,
+};
+
+/* to prevent races between open() and disconnect(), probing, etc */
+static DEFINE_MUTEX(driver_lock);
+
+static int debug;
+
+/* lcd, vfd, vga or none? should be auto-detected, but can be overridden... */
+static int display_type;
+
+/* IR protocol: native iMON, Windows MCE (RC-6), or iMON w/o PAD stabilize */
+static int ir_protocol;
+
+/*
+ * In certain use cases, mouse mode isn't really helpful, and could actually
+ * cause confusion, so allow disabling it when the IR device is open.
+ */
+static int nomouse;
+
+/* threshold at which a pad push registers as an arrow key in kbd mode */
+static int pad_thresh;
+
+
+/***  M O D U L E   C O D E ***/
+
+MODULE_AUTHOR(MOD_AUTHOR);
+MODULE_DESCRIPTION(MOD_DESC);
+MODULE_VERSION(MOD_VERSION);
+MODULE_LICENSE("GPL");
+MODULE_DEVICE_TABLE(usb, imon_usb_id_table);
+module_param(debug, int, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(debug, "Debug messages: 0=no, 1=yes(default: no)");
+module_param(display_type, int, S_IRUGO);
+MODULE_PARM_DESC(display_type, "Type of attached display. 0=autodetect, "
+		 "1=vfd, 2=lcd, 3=vga, 4=none (default: autodetect)");
+module_param(ir_protocol, int, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(ir_protocol, "Which IR protocol to use. 0=native iMON, "
+		 "1=Windows Media Center Ed. (RC-6), 2=iMON w/o PAD stabilize "
+		 "(default: native iMON)");
+module_param(nomouse, int, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(nomouse, "Disable mouse input device mode when IR device is "
+		 "open. 0=don't disable, 1=disable. (default: don't disable)");
+module_param(pad_thresh, int, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(pad_thresh, "Threshold at which a pad push registers as an "
+		 "arrow key in kbd mode (default: 28)");
+
+static void free_imon_context(struct imon_context *context)
+{
+	usb_free_urb(context->tx_urb);
+	usb_free_urb(context->rx_urb_intf0);
+	usb_free_urb(context->rx_urb_intf1);
+	lirc_buffer_free(context->driver->rbuf);
+	kfree(context->driver->rbuf);
+	kfree(context->driver);
+	kfree(context);
+
+	dprintk("%s: iMON context freed\n", __func__);
+}
+
+static void deregister_from_lirc(struct imon_context *context)
+{
+	int retval;
+	int minor = context->driver->minor;
+
+	retval = lirc_unregister_driver(minor);
+	if (retval)
+		err("%s: unable to deregister from lirc(%d)",
+			__func__, retval);
+	else
+		printk(KERN_INFO MOD_NAME ": Deregistered iMON driver "
+		       "(minor:%d)\n", minor);
+
+}
+
+/**
+ * Called when the Display device (e.g. /dev/lcd0)
+ * is opened by the application.
+ */
+static int display_open(struct inode *inode, struct file *file)
+{
+	struct usb_interface *interface;
+	struct imon_context *context = NULL;
+	int subminor;
+	int retval = 0;
+
+	/* prevent races with disconnect */
+	mutex_lock(&driver_lock);
+
+	subminor = iminor(inode);
+	interface = usb_find_interface(&imon_driver, subminor);
+	if (!interface) {
+		err("%s: could not find interface for minor %d",
+		    __func__, subminor);
+		retval = -ENODEV;
+		goto exit;
+	}
+	context = usb_get_intfdata(interface);
+
+	if (!context) {
+		err("%s: no context found for minor %d",
+					__func__, subminor);
+		retval = -ENODEV;
+		goto exit;
+	}
+
+	mutex_lock(&context->lock);
+
+	if (!context->display_supported) {
+		err("%s: display not supported by device", __func__);
+		retval = -ENODEV;
+	} else if (context->display_isopen) {
+		err("%s: display port is already open", __func__);
+		retval = -EBUSY;
+	} else {
+		MOD_INC_USE_COUNT;
+		context->display_isopen = 1;
+		file->private_data = context;
+		printk(KERN_INFO "display port opened\n");
+	}
+
+	mutex_unlock(&context->lock);
+
+exit:
+	mutex_unlock(&driver_lock);
+	return retval;
+}
+
+/**
+ * Called when the display device (e.g. /dev/lcd0)
+ * is closed by the application.
+ */
+static int display_close(struct inode *inode, struct file *file)
+{
+	struct imon_context *context = NULL;
+	int retval = 0;
+
+	context = (struct imon_context *)file->private_data;
+
+	if (!context) {
+		err("%s: no context for device", __func__);
+		return -ENODEV;
+	}
+
+	mutex_lock(&context->lock);
+
+	if (!context->display_supported) {
+		err("%s: display not supported by device", __func__);
+		retval = -ENODEV;
+	} else if (!context->display_isopen) {
+		err("%s: display is not open", __func__);
+		retval = -EIO;
+	} else {
+		context->display_isopen = 0;
+		MOD_DEC_USE_COUNT;
+		printk(KERN_INFO "display port closed\n");
+		if (!context->dev_present_intf0 && !context->ir_isopen) {
+			/*
+			 * Device disconnected before close and IR port is not
+			 * open. If IR port is open, context will be deleted by
+			 * ir_close.
+			 */
+			mutex_unlock(&context->lock);
+			free_imon_context(context);
+			return retval;
+		}
+	}
+
+	mutex_unlock(&context->lock);
+	return retval;
+}
+
+/**
+ * Sends a packet to the device
+ */
+static int send_packet(struct imon_context *context)
+{
+	unsigned int pipe;
+	int interval = 0;
+	int retval = 0;
+	struct usb_ctrlrequest *control_req = NULL;
+
+	/* Check if we need to use control or interrupt urb */
+	if (!context->tx_control) {
+		pipe = usb_sndintpipe(context->usbdev_intf0,
+				      context->tx_endpoint->bEndpointAddress);
+		interval = context->tx_endpoint->bInterval;
+
+		usb_fill_int_urb(context->tx_urb, context->usbdev_intf0, pipe,
+				 context->usb_tx_buf,
+				 sizeof(context->usb_tx_buf),
+				 usb_tx_callback, context, interval);
+
+		context->tx_urb->actual_length = 0;
+	} else {
+		/* fill request into kmalloc'ed space: */
+		control_req = kmalloc(sizeof(struct usb_ctrlrequest),
+				      GFP_KERNEL);
+		if (control_req == NULL)
+			return -ENOMEM;
+
+		/* setup packet is '21 09 0200 0001 0008' */
+		control_req->bRequestType = 0x21;
+		control_req->bRequest = 0x09;
+		control_req->wValue = cpu_to_le16(0x0200);
+		control_req->wIndex = cpu_to_le16(0x0001);
+		control_req->wLength = cpu_to_le16(0x0008);
+
+		/* control pipe is endpoint 0x00 */
+		pipe = usb_sndctrlpipe(context->usbdev_intf0, 0);
+
+		/* build the control urb */
+		usb_fill_control_urb(context->tx_urb, context->usbdev_intf0, pipe,
+				     (unsigned char *)control_req,
+				     context->usb_tx_buf,
+				     sizeof(context->usb_tx_buf),
+				     usb_tx_callback, context);
+		context->tx_urb->actual_length = 0;
+	}
+
+	init_completion(&context->tx.finished);
+	atomic_set(&(context->tx.busy), 1);
+
+	retval = usb_submit_urb(context->tx_urb, GFP_KERNEL);
+	if (retval) {
+		atomic_set(&(context->tx.busy), 0);
+		err("%s: error submitting urb(%d)", __func__, retval);
+	} else {
+		/* Wait for transmission to complete (or abort) */
+		mutex_unlock(&context->lock);
+		retval = wait_for_completion_interruptible(
+				&context->tx.finished);
+		if (retval)
+			err("%s: task interrupted", __func__);
+		mutex_lock(&context->lock);
+
+		retval = context->tx.status;
+		if (retval)
+			err("%s: packet tx failed (%d)", __func__, retval);
+	}
+
+	kfree(control_req);
+
+	return retval;
+}
+
+/**
+ * Sends an associate packet to the iMON 2.4G.
+ *
+ * This might not be such a good idea, since it has an id collision with
+ * some versions of the "IR & VFD" combo. The only way to determine if it
+ * is an RF version is to look at the product description string. (Which
+ * we currently do not fetch).
+ */
+static int send_associate_24g(struct imon_context *context)
+{
+	int retval;
+	const unsigned char packet[8] = { 0x01, 0x00, 0x00, 0x00,
+					  0x00, 0x00, 0x00, 0x20 };
+
+	if (!context) {
+		err("%s: no context for device", __func__);
+		return -ENODEV;
+	}
+
+	if (!context->dev_present_intf0) {
+		err("%s: no iMON device present", __func__);
+		return -ENODEV;
+	}
+
+	memcpy(context->usb_tx_buf, packet, sizeof(packet));
+	retval = send_packet(context);
+
+	return retval;
+}
+
+/**
+ * Sends packets to setup and show clock on iMON display
+ *
+ * Arguments: year - last 2 digits of year, month - 1..12,
+ * day - 1..31, dow - day of the week (0-Sun...6-Sat),
+ * hour - 0..23, minute - 0..59, second - 0..59
+ */
+static int send_set_imon_clock(struct imon_context *context,
+			       unsigned int year, unsigned int month,
+			       unsigned int day, unsigned int dow,
+			       unsigned int hour, unsigned int minute,
+			       unsigned int second)
+{
+	unsigned char clock_enable_pkt[IMON_CLOCK_ENABLE_PACKETS][8];
+	int retval = 0;
+	int i;
+
+	if (!context) {
+		err("%s: no context for device", __func__);
+		return -ENODEV;
+	}
+
+	switch(context->display_type) {
+	case IMON_DISPLAY_TYPE_LCD:
+		clock_enable_pkt[0][0] = 0x80;
+		clock_enable_pkt[0][1] = year;
+		clock_enable_pkt[0][2] = month-1;
+		clock_enable_pkt[0][3] = day;
+		clock_enable_pkt[0][4] = hour;
+		clock_enable_pkt[0][5] = minute;
+		clock_enable_pkt[0][6] = second;
+
+		clock_enable_pkt[1][0] = 0x80;
+		clock_enable_pkt[1][1] = 0;
+		clock_enable_pkt[1][2] = 0;
+		clock_enable_pkt[1][3] = 0;
+		clock_enable_pkt[1][4] = 0;
+		clock_enable_pkt[1][5] = 0;
+		clock_enable_pkt[1][6] = 0;
+
+		if (context->ffdc_dev) {
+			clock_enable_pkt[0][7] = 0x50;
+			clock_enable_pkt[1][7] = 0x51;
+		} else {
+			clock_enable_pkt[0][7] = 0x88;
+			clock_enable_pkt[1][7] = 0x8a;
+		}
+
+		break;
+
+	case IMON_DISPLAY_TYPE_VFD:
+		clock_enable_pkt[0][0] = year;
+		clock_enable_pkt[0][1] = month-1;
+		clock_enable_pkt[0][2] = day;
+		clock_enable_pkt[0][3] = dow;
+		clock_enable_pkt[0][4] = hour;
+		clock_enable_pkt[0][5] = minute;
+		clock_enable_pkt[0][6] = second;
+		clock_enable_pkt[0][7] = 0x40;
+
+		clock_enable_pkt[1][0] = 0;
+		clock_enable_pkt[1][1] = 0;
+		clock_enable_pkt[1][2] = 1;
+		clock_enable_pkt[1][3] = 0;
+		clock_enable_pkt[1][4] = 0;
+		clock_enable_pkt[1][5] = 0;
+		clock_enable_pkt[1][6] = 0;
+		clock_enable_pkt[1][7] = 0x42;
+
+		break;
+
+	default:
+		return -ENODEV;
+	}
+
+
+	for (i = 0; i < IMON_CLOCK_ENABLE_PACKETS; i++) {
+		memcpy(context->usb_tx_buf, clock_enable_pkt[i], 8);
+		retval = send_packet(context);
+		if (retval) {
+			err("%s: send_packet failed for packet %d",
+			    __func__, i);
+			break;
+		}
+	}
+
+	return retval;
+
+}
+
+/**
+ * These are the sysfs functions to handle the association on the iMON 2.4G LT.
+ */
+static ssize_t show_associate_remote(struct device *d,
+				     struct device_attribute *attr,
+				     char *buf)
+{
+	struct imon_context *context = dev_get_drvdata(d);
+
+	if (!context)
+		return -ENODEV;
+
+	mutex_lock(&context->lock);
+	if (context->ir_isassociating) {
+		strcpy(buf, "associating\n");
+	} else if (context->ir_isopen) {
+		strcpy(buf, "open\n");
+	} else {
+		strcpy(buf, "closed\n");
+	}
+	printk(KERN_INFO "Visit http://www.lirc.org/html/imon-24g.html for "
+	       "instructions on how to associate your iMON 2.4G DT/LT "
+	       "remote\n");
+	mutex_unlock(&context->lock);
+	return strlen(buf);
+}
+
+static ssize_t store_associate_remote(struct device *d,
+				      struct device_attribute *attr,
+				      const char *buf, size_t count)
+{
+	struct imon_context *context;
+
+	context = dev_get_drvdata(d);
+
+	if (!context)
+		return -ENODEV;
+
+	mutex_lock(&context->lock);
+	if (!context->ir_isopen) {
+		mutex_unlock(&context->lock);
+		return -EINVAL;
+	}
+
+	if (context->ir_isopen) {
+		context->ir_isassociating = 1;
+		send_associate_24g(context);
+	}
+	mutex_unlock(&context->lock);
+
+	return count;
+}
+
+/**
+ * sysfs functions to control internal imon clock
+ */
+static ssize_t show_imon_clock(struct device *d,
+			       struct device_attribute *attr, char *buf)
+{
+	struct imon_context *context = dev_get_drvdata(d);
+	size_t len;
+
+	if (!context)
+		return -ENODEV;
+
+	mutex_lock(&context->lock);
+
+	if (!context->display_supported) {
+		len = snprintf(buf, PAGE_SIZE, "Not supported.");
+	} else {
+		len = snprintf(buf, PAGE_SIZE,
+			"To set the clock on your iMON display:\n"
+			"# date \"+%%y %%m %%d %%w %%H %%M %%S\" > imon_clock\n"
+			"%s", context->display_isopen ?
+			"\nNOTE: imon device must be closed\n" : "");
+	}
+
+	mutex_unlock(&context->lock);
+
+	return len;
+}
+
+static ssize_t store_imon_clock(struct device *d,
+				struct device_attribute *attr,
+				const char *buf, size_t count)
+{
+	struct imon_context *context = dev_get_drvdata(d);
+	ssize_t retval;
+	unsigned int year, month, day, dow, hour, minute, second;
+
+	if (!context)
+		return -ENODEV;
+
+	mutex_lock(&context->lock);
+
+	if (!context->display_supported) {
+		retval = -ENODEV;
+		goto exit;
+	} else if (context->display_isopen) {
+		retval = -EBUSY;
+		goto exit;
+	}
+
+	if (sscanf(buf, "%u %u %u %u %u %u %u",	&year, &month, &day, &dow,
+		   &hour, &minute, &second) != 7) {
+		retval = -EINVAL;
+		goto exit;
+	}
+
+	if ((month < 1 || month > 12) ||
+	    (day < 1 || day > 31) || (dow > 6) ||
+	    (hour > 23) || (minute > 59) || (second > 59)) {
+		retval = -EINVAL;
+		goto exit;
+	}
+
+	retval = send_set_imon_clock(context, year, month, day, dow,
+				     hour, minute, second);
+	if (retval)
+		goto exit;
+
+	retval = count;
+exit:
+	mutex_unlock(&context->lock);
+
+	return retval;
+}
+
+
+static DEVICE_ATTR(imon_clock, S_IWUSR | S_IRUGO, show_imon_clock,
+		   store_imon_clock);
+
+static DEVICE_ATTR(associate_remote, S_IWUSR | S_IRUGO, show_associate_remote,
+		   store_associate_remote);
+
+static struct attribute *imon_display_sysfs_entries[] = {
+	&dev_attr_imon_clock.attr,
+	NULL
+};
+
+static struct attribute_group imon_display_attribute_group = {
+	.attrs = imon_display_sysfs_entries
+};
+
+static struct attribute *imon_rf_sysfs_entries[] = {
+	&dev_attr_associate_remote.attr,
+	NULL
+};
+
+static struct attribute_group imon_rf_attribute_group = {
+	.attrs = imon_rf_sysfs_entries
+};
+
+/**
+ * Writes data to the VFD.  The iMON VFD is 2x16 characters
+ * and requires data in 5 consecutive USB interrupt packets,
+ * each packet but the last carrying 7 bytes.
+ *
+ * I don't know if the VFD board supports features such as
+ * scrolling, clearing rows, blanking, etc. so at
+ * the caller must provide a full screen of data.  If fewer
+ * than 32 bytes are provided spaces will be appended to
+ * generate a full screen.
+ */
+static ssize_t vfd_write(struct file *file, const char *buf,
+			 size_t n_bytes, loff_t *pos)
+{
+	int i;
+	int offset;
+	int seq;
+	int retval = 0;
+	struct imon_context *context;
+	const unsigned char vfd_packet6[] = {
+		0x01, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF };
+
+	context = (struct imon_context *)file->private_data;
+	if (!context) {
+		err("%s: no context for device", __func__);
+		return -ENODEV;
+	}
+
+	mutex_lock(&context->lock);
+
+	if (!context->dev_present_intf0) {
+		err("%s: no iMON device present", __func__);
+		retval = -ENODEV;
+		goto exit;
+	}
+
+	if (n_bytes <= 0 || n_bytes > 32) {
+		err("%s: invalid payload size", __func__);
+		retval = -EINVAL;
+		goto exit;
+	}
+
+	if (copy_from_user(context->tx.data_buf, buf, n_bytes)) {
+		retval = -EFAULT;
+		goto exit;
+	}
+
+	/* Pad with spaces */
+	for (i = n_bytes; i < 32; ++i)
+		context->tx.data_buf[i] = ' ';
+
+	for (i = 32; i < 35; ++i)
+		context->tx.data_buf[i] = 0xFF;
+
+	offset = 0;
+	seq = 0;
+
+	do {
+		memcpy(context->usb_tx_buf, context->tx.data_buf + offset, 7);
+		context->usb_tx_buf[7] = (unsigned char) seq;
+
+		retval = send_packet(context);
+		if (retval) {
+			err("%s: send packet failed for packet #%d",
+					__func__, seq/2);
+			goto exit;
+		} else {
+			seq += 2;
+			offset += 7;
+		}
+
+	} while (offset < 35);
+
+	if (context->vfd_proto_6p) {
+		/* Send packet #6 */
+		memcpy(context->usb_tx_buf, &vfd_packet6, sizeof(vfd_packet6));
+		context->usb_tx_buf[7] = (unsigned char) seq;
+		retval = send_packet(context);
+		if (retval)
+			err("%s: send packet failed for packet #%d",
+					__func__, seq/2);
+	}
+
+exit:
+	mutex_unlock(&context->lock);
+
+	return (!retval) ? n_bytes : retval;
+}
+
+/**
+ * Writes data to the LCD.  The iMON OEM LCD screen excepts 8-byte
+ * packets. We accept data as 16 hexadecimal digits, followed by a
+ * newline (to make it easy to drive the device from a command-line
+ * -- even though the actual binary data is a bit complicated).
+ *
+ * The device itself is not a "traditional" text-mode display. It's
+ * actually a 16x96 pixel bitmap display. That means if you want to
+ * display text, you've got to have your own "font" and translate the
+ * text into bitmaps for display. This is really flexible (you can
+ * display whatever diacritics you need, and so on), but it's also
+ * a lot more complicated than most LCDs...
+ */
+static ssize_t lcd_write(struct file *file, const char *buf,
+			 size_t n_bytes, loff_t *pos)
+{
+	int retval = 0;
+	struct imon_context *context;
+
+	context = (struct imon_context *)file->private_data;
+	if (!context) {
+		err("%s: no context for device", __func__);
+		return -ENODEV;
+	}
+
+	mutex_lock(&context->lock);
+
+	if (!context->display_supported) {
+		err("%s: no iMON display present", __func__);
+		retval = -ENODEV;
+		goto exit;
+	}
+
+	if (n_bytes != 8) {
+		err("%s: invalid payload size: %d (expecting 8)",
+		    __func__, (int) n_bytes);
+		retval = -EINVAL;
+		goto exit;
+	}
+
+	if (copy_from_user(context->usb_tx_buf, buf, 8)) {
+		retval = -EFAULT;
+		goto exit;
+	}
+
+	retval = send_packet(context);
+	if (retval) {
+		err("%s: send packet failed!", __func__);
+		goto exit;
+	} else {
+		dprintk("%s: write %d bytes to LCD\n", __func__, (int) n_bytes);
+	}
+exit:
+	mutex_unlock(&context->lock);
+	return (!retval) ? n_bytes : retval;
+}
+
+/**
+ * Callback function for USB core API: transmit data
+ */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19)
+static void usb_tx_callback(struct urb *urb, struct pt_regs *regs)
+#else
+static void usb_tx_callback(struct urb *urb)
+#endif
+{
+	struct imon_context *context;
+
+	if (!urb)
+		return;
+	context = (struct imon_context *)urb->context;
+	if (!context)
+		return;
+
+	context->tx.status = urb->status;
+
+	/* notify waiters that write has finished */
+	atomic_set(&context->tx.busy, 0);
+	complete(&context->tx.finished);
+
+	return;
+}
+
+/**
+ * iMON IR receivers support two different signal sets -- those used by
+ * the iMON remotes, and those used by the Windows MCE remotes (which is
+ * really just RC-6), but only one or the other at a time, as the signals
+ * are decoded onboard the receiver.
+ */
+static void imon_set_ir_protocol(struct imon_context *context)
+{
+	int retval;
+	unsigned char ir_proto_packet[] =
+		{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x86 };
+
+	switch (ir_protocol) {
+	case IMON_IR_PROTOCOL_MCE:
+		/* MCE proto not supported on devices without tx control */
+		if (!context->tx_control) {
+			printk(KERN_INFO "%s: MCE IR protocol not supported on "
+			       "this device, using iMON protocol\n", __func__);
+			context->ir_protocol = IMON_IR_PROTOCOL_IMON;
+			return;
+		}
+		dprintk("Configuring IR receiver for MCE protocol\n");
+		ir_proto_packet[0] = 0x01;
+		context->ir_protocol = IMON_IR_PROTOCOL_MCE;
+		break;
+	case IMON_IR_PROTOCOL_IMON:
+		dprintk("Configuring IR receiver for iMON protocol\n");
+		/* ir_proto_packet[0] = 0x00; // already the default */
+		context->ir_protocol = IMON_IR_PROTOCOL_IMON;
+		break;
+	case IMON_IR_PROTOCOL_IMON_NOPAD:
+		dprintk("Configuring IR receiver for iMON protocol without "
+			"PAD stabilize function enabled\n");
+		/* ir_proto_packet[0] = 0x00; // already the default */
+		context->ir_protocol = IMON_IR_PROTOCOL_IMON_NOPAD;
+		break;
+	default:
+		printk(KERN_INFO "%s: unknown IR protocol specified, will "
+		       "just default to iMON protocol\n", __func__);
+		context->ir_protocol = IMON_IR_PROTOCOL_IMON;
+		break;
+	}
+	memcpy(context->usb_tx_buf, &ir_proto_packet,
+	       sizeof(ir_proto_packet));
+	retval = send_packet(context);
+	if (retval)
+		printk(KERN_INFO "%s: failed to set remote type\n", __func__);
+}
+
+
+/**
+ * Called by lirc_dev when the application opens /dev/lirc
+ */
+static int ir_open(void *data)
+{
+	int retval = 0;
+	struct imon_context *context;
+
+	/* prevent races with disconnect */
+	mutex_lock(&driver_lock);
+
+	context = (struct imon_context *)data;
+
+	/* initial IR protocol decode variables */
+	context->rx.count = 0;
+	context->rx.initial_space = 1;
+	context->rx.prev_bit = 0;
+
+	/* set new IR protocol if it has changed since init or last open */
+	if (ir_protocol != context->ir_protocol)
+		imon_set_ir_protocol(context);
+
+	context->ir_isopen = 1;
+	printk(KERN_INFO MOD_NAME ": IR port opened\n");
+
+	mutex_unlock(&driver_lock);
+	return retval;
+}
+
+/**
+ * Called by lirc_dev when the application closes /dev/lirc
+ */
+static void ir_close(void *data)
+{
+	struct imon_context *context;
+
+	context = (struct imon_context *)data;
+	if (!context) {
+		err("%s: no context for device", __func__);
+		return;
+	}
+
+	mutex_lock(&context->lock);
+
+	context->ir_isopen = 0;
+	context->ir_isassociating = 0;
+	MOD_DEC_USE_COUNT;
+	printk(KERN_INFO MOD_NAME ": IR port closed\n");
+
+	if (!context->dev_present_intf0) {
+		/*
+		 * Device disconnected while IR port was still open. Driver
+		 * was not deregistered at disconnect time, so do it now.
+		 */
+		deregister_from_lirc(context);
+
+		if (!context->display_isopen) {
+			mutex_unlock(&context->lock);
+			free_imon_context(context);
+			return;
+		}
+		/*
+		 * If display port is open, context will be deleted by
+		 * display_close
+		 */
+	}
+
+	mutex_unlock(&context->lock);
+	return;
+}
+
+/**
+ * Convert bit count to time duration (in us) and submit
+ * the value to lirc_dev.
+ */
+static void submit_data(struct imon_context *context)
+{
+	unsigned char buf[4];
+	int value = context->rx.count;
+	int i;
+
+	dprintk("submitting data to LIRC\n");
+
+	value *= BIT_DURATION;
+	value &= PULSE_MASK;
+	if (context->rx.prev_bit)
+		value |= PULSE_BIT;
+
+	for (i = 0; i < 4; ++i)
+		buf[i] = value>>(i*8);
+
+	lirc_buffer_write(context->driver->rbuf, buf);
+	wake_up(&context->driver->rbuf->wait_poll);
+	return;
+}
+
+static inline int tv2int(const struct timeval *a, const struct timeval *b)
+{
+	int usecs = 0;
+	int sec   = 0;
+
+	if (b->tv_usec > a->tv_usec) {
+		usecs = 1000000;
+		sec--;
+	}
+
+	usecs += a->tv_usec - b->tv_usec;
+
+	sec += a->tv_sec - b->tv_sec;
+	sec *= 1000;
+	usecs /= 1000;
+	sec += usecs;
+
+	if (sec < 0)
+		sec = 1000;
+
+	return sec;
+}
+
+/**
+ * The directional pad behaves a bit differently, depending on whether this is
+ * one of the older ffdc devices or a newer device. Newer devices appear to
+ * have a higher resolution matrix for more precise mouse movement, but it
+ * makes things overly sensitive in keyboard mode, so we do some interesting
+ * contortions to make it less touchy. Older devices run through the same
+ * routine with shorter timeout and a smaller threshold.
+ */
+static int stabilize(int a, int b, u16 timeout, u16 threshold)
+{
+	struct timeval ct;
+	static struct timeval prev_time = {0, 0};
+	static struct timeval hit_time  = {0, 0};
+	static int x, y, prev_result, hits;
+	int result = 0;
+	int msec, msec_hit;
+
+	do_gettimeofday(&ct);
+	msec = tv2int(&ct, &prev_time);
+	msec_hit = tv2int(&ct, &hit_time);
+
+	if (msec > 100) {
+		x = 0;
+		y = 0;
+		hits = 0;
+	}
+
+	x += a;
+	y += b;
+
+	prev_time = ct;
+
+	if (abs(x) > threshold || abs(y) > threshold) {
+		if (abs(y) > abs(x))
+			result = (y > 0) ? 0x7F : 0x80;
+		else
+			result = (x > 0) ? 0x7F00 : 0x8000;
+
+		x = 0;
+		y = 0;
+
+		if (result == prev_result) {
+			hits++;
+
+			if (hits > 3) {
+				switch (result) {
+				case 0x7F:
+					y = 17 * threshold / 30;
+					break;
+				case 0x80:
+					y -= 17 * threshold / 30;
+					break;
+				case 0x7F00:
+					x = 17 * threshold / 30;
+					break;
+				case 0x8000:
+					x -= 17 * threshold / 30;
+					break;
+				}
+			}
+
+			if (hits == 2 && msec_hit < timeout) {
+				result = 0;
+				hits = 1;
+			}
+		} else {
+			prev_result = result;
+			hits = 1;
+			hit_time = ct;
+		}
+	}
+
+	return result;
+}
+
+/**
+ * Process the incoming packet
+ */
+static void imon_incoming_packet(struct imon_context *context,
+				 struct urb *urb, int intf)
+{
+	int len = urb->actual_length;
+	unsigned char *buf = urb->transfer_buffer;
+	char rel_x = 0x00, rel_y = 0x00;
+	int octet, bit;
+	unsigned char mask;
+	int i, chunk_num;
+	int ts_input = 0;
+	int dir = 0;
+	u16 timeout, threshold;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18)
+	int mouse_input;
+	int right_shift = 1;
+	struct input_dev *mouse = NULL;
+	struct input_dev *touch = NULL;
+	const unsigned char toggle_button1[] = { 0x29, 0x91, 0x15, 0xb7 };
+	const unsigned char toggle_button2[] = { 0x29, 0x91, 0x35, 0xb7 };
+	const unsigned char ch_up[]   = { 0x28, 0x93, 0x95, 0xb7 };
+	const unsigned char ch_down[] = { 0x28, 0x87, 0x95, 0xb7 };
+#endif
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18)
+	mouse = context->mouse;
+	if (context->display_type == IMON_DISPLAY_TYPE_VGA)
+		touch = context->touch;
+
+	/* keyboard/mouse mode toggle button */
+	if (memcmp(buf, toggle_button1, 4) == 0 ||
+	    memcmp(buf, toggle_button2, 4) == 0) {
+		if (!nomouse) {
+			context->pad_mouse = ~(context->pad_mouse) & 0x1;
+			dprintk("toggling to %s mode\n",
+				context->pad_mouse ? "mouse" : "keyboard");
+		} else {
+			context->pad_mouse = 0;
+			dprintk("mouse mode was disabled by modparam\n");
+		}
+		return;
+	}
+
+	/* send touchscreen events through input subsystem if touchpad data */
+	if (context->display_type == IMON_DISPLAY_TYPE_VGA && len == 8 &&
+	    buf[7] == 0x86) {
+		if (touch == NULL) {
+			printk(KERN_WARNING "%s: touchscreen input device is "
+			       "NULL!\n", __func__);
+			return;
+		}
+		mod_timer(&context->timer, jiffies + TOUCH_TIMEOUT);
+		context->touch_x = (buf[0] << 4) | (buf[1] >> 4);
+		context->touch_y = 0xfff - ((buf[2] << 4) | (buf[1] & 0xf));
+		input_report_abs(touch, ABS_X, context->touch_x);
+		input_report_abs(touch, ABS_Y, context->touch_y);
+		input_report_key(touch, BTN_TOUCH, 0x01);
+		input_sync(touch);
+		ts_input = 1;
+
+	/* send mouse events through input subsystem in mouse mode */
+	} else if (context->pad_mouse || !context->ir_isopen) {
+		/* newer iMON device PAD or mouse button */
+		if (!context->ffdc_dev && (buf[0] & 0x01) && len == 5) {
+			mouse_input = 1;
+			rel_x = buf[2];
+			rel_y = buf[3];
+			right_shift = 1;
+		/* 0xffdc iMON PAD or mouse button input */
+		} else if (context->ffdc_dev && (buf[0] & 0x40) &&
+			   !((buf[1] & 0x01) || ((buf[1] >> 2) & 0x01))) {
+			mouse_input = 1;
+			rel_x = (buf[1] & 0x08) | (buf[1] & 0x10) >> 2 |
+				(buf[1] & 0x20) >> 4 | (buf[1] & 0x40) >> 6;
+			if (buf[0] & 0x02)
+				rel_x |= ~0x0f;
+			rel_x = rel_x + rel_x / 2;
+			rel_y = (buf[2] & 0x08) | (buf[2] & 0x10) >> 2 |
+				(buf[2] & 0x20) >> 4 | (buf[2] & 0x40) >> 6;
+			if (buf[0] & 0x01)
+				rel_y |= ~0x0f;
+			rel_y = rel_y + rel_y / 2;
+			right_shift = 2;
+		/* some ffdc devices decode mouse buttons differently... */
+		} else if (context->ffdc_dev && (buf[0] == 0x68)) {
+			mouse_input = 1;
+			right_shift = 2;
+		/* ch+/- buttons, which we use for an emulated scroll wheel */
+		} else if (!memcmp(buf, ch_up, 4)) {
+			mouse_input = 1;
+			dir = 1;
+		} else if (!memcmp(buf, ch_down, 4)) {
+			mouse_input = 1;
+			dir = -1;
+		} else
+			mouse_input = 0;
+
+		if (mouse_input) {
+			if (mouse == NULL) {
+				printk(KERN_WARNING "%s: mouse input device "
+				       "is NULL!\n", __func__);
+				return;
+			}
+			dprintk("sending mouse data via input subsystem\n");
+
+			if (dir) {
+				input_report_rel(mouse, REL_WHEEL, dir);
+			} else if (rel_x || rel_y) {
+				input_report_rel(mouse, REL_X, rel_x);
+				input_report_rel(mouse, REL_Y, rel_y);
+			} else {
+				input_report_key(mouse, BTN_LEFT, buf[1] & 0x1);
+				input_report_key(mouse, BTN_RIGHT,
+						 buf[1] >> right_shift & 0x1);
+			}
+			input_sync(mouse);
+			return;
+		}
+	}
+#endif
+
+	/*
+	 * at this point, mouse and touchscreen input has been handled, so
+	 * anything else goes to lirc -- bail out if no listening IR client
+	 */
+	if (!context->ir_isopen)
+		return;
+
+	/*
+	 * we need to add some special handling for
+	 * the imon's IR mouse events
+	 */
+	if ((len == 5) && (buf[0] == 0x01) && (buf[4] == 0x00)) {
+		/* first, pad to 8 bytes so it conforms with everything else */
+		buf[5] = buf[6] = buf[7] = 0;
+		len = 8;
+		timeout = 500;	/* in msecs */
+		/* (2*threshold) x (2*threshold) square */
+		threshold = pad_thresh ? pad_thresh : 28;
+		rel_x = buf[2];
+		rel_y = buf[3];
+
+		/*
+		 * the imon directional pad functions more like a touchpad.
+		 * Bytes 3 & 4 contain a position coordinate (x,y), with each
+		 * component ranging from -14 to 14. Since this doesn't
+		 * cooperate well with the way lirc works (it would appear to
+		 * lirc as more than 100 different buttons) we need to map it
+		 * to 4 discrete values. Also, when you get too close to
+		 * diagonals, it has a tendancy to jump back and forth, so lets
+		 * try to ignore when they get too close
+		 */
+		if (context->ir_protocol == IMON_IR_PROTOCOL_IMON) {
+			if ((buf[1] == 0) && ((rel_x != 0) || (rel_y != 0))) {
+				dir = stabilize((int)rel_x, (int)rel_y,
+						timeout, threshold);
+				if (!dir)
+					return;
+				buf[2] = dir & 0xFF;
+				buf[3] = (dir >> 8) & 0xFF;
+			}
+		} else {
+			if (abs(rel_y) > abs(rel_x)) {
+				buf[2] = (rel_y > 0) ? 0x7F : 0x80;
+				buf[3] = 0;
+			} else {
+				buf[2] = 0;
+				buf[3] = (rel_x > 0) ? 0x7F : 0x80;
+			}
+		}
+
+	} else if ((len == 8) && (buf[0] & 0x40) &&
+		   !(buf[1] & 0x01 || buf[1] >> 2 & 0x01)) {
+		/*
+		 * Handle on-board decoded pad events for e.g. older
+		 * VFD/iMON-Pad (15c2:ffdc). The remote generates various codes
+		 * from 0x68nnnnB7 to 0x6AnnnnB7, the left mouse button
+		 * generates 0x688301b7 and the right one 0x688481b7. All other
+		 * keys generate 0x2nnnnnnn. Length has been padded to 8
+		 * already, position coordinate is encoded in buf[1] and buf[2]
+		 * with reversed endianess. Extract direction from buffer,
+		 * rotate endianess, adjust sign and feed the values into
+		 * stabilize(). The resulting codes will be 0x01008000,
+		 * 0x01007F00, ..., so one can use the normal imon-pad config
+		 * from the remotes dir.
+		 */
+		timeout = 10;	/* in msecs */
+		/* (2*threshold) x (2*threshold) square */
+		threshold = pad_thresh ? pad_thresh : 15;
+
+		/* buf[1] is x */
+		rel_x = (buf[1] & 0x08) | (buf[1] & 0x10) >> 2 |
+			(buf[1] & 0x20) >> 4 | (buf[1] & 0x40) >> 6;
+		if(buf[0] & 0x02)
+			rel_x |= ~0x10+1;
+		/* buf[2] is y */
+		rel_y = (buf[2] & 0x08) | (buf[2] & 0x10) >> 2 |
+			(buf[2] & 0x20) >> 4 | (buf[2] & 0x40) >> 6;
+		if(buf[0] & 0x01)
+			rel_y |= ~0x10+1;
+
+		buf[0] = 0x01;
+		buf[1] = buf[4] = buf[5] = buf[6] = buf[7] = 0;
+
+		if (context->ir_protocol == IMON_IR_PROTOCOL_IMON) {
+			dir = stabilize((int)rel_x, (int)rel_y,
+					timeout, threshold);
+			if (!dir)
+				return;
+			buf[2] = dir & 0xFF;
+			buf[3] = (dir >> 8) & 0xFF;
+		} else {
+			if (abs(rel_y) > abs(rel_x)) {
+				buf[2] = (rel_y > 0) ? 0x7F : 0x80;
+				buf[3] = 0;
+			} else {
+				buf[2] = 0;
+				buf[3] = (rel_x > 0) ? 0x7F : 0x80;
+			}
+		}
+
+	} else if (ts_input) {
+		/*
+		 * this is touchscreen input, which we need to down-sample
+		 * to a 64 button matrix at the moment...
+		 */
+		buf[0] = buf[0] >> 5;
+		buf[1] = 0x00;
+		buf[2] = buf[2] >> 5;
+		buf[3] = 0x00;
+		buf[4] = 0x00;
+		buf[5] = 0x00;
+		buf[6] = 0x14;
+		buf[7] = 0xff;
+	}
+
+	if (len != 8) {
+		printk(KERN_WARNING "imon %s: invalid incoming packet "
+		       "size (len = %d, intf%d)\n", __func__, len, intf);
+		return;
+	}
+
+	/* iMON 2.4G associate frame */
+	if (buf[0] == 0x00 &&
+	    buf[2] == 0xFF &&				/* REFID */
+	    buf[3] == 0xFF &&
+	    buf[4] == 0xFF &&
+	    buf[5] == 0xFF &&				/* iMON 2.4G */
+	   ((buf[6] == 0x4E && buf[7] == 0xDF) ||	/* LT */
+	    (buf[6] == 0x5E && buf[7] == 0xDF))) {	/* DT */
+		printk(KERN_WARNING "%s: remote associated refid=%02X\n",
+		       __func__, buf[1]);
+		context->ir_isassociating = 0;
+	}
+
+	chunk_num = buf[7];
+
+	if (chunk_num == 0xFF && !ts_input)
+		return;		/* filler frame, no data here */
+
+	if (buf[0] == 0xFF &&
+	    buf[1] == 0xFF &&
+	    buf[2] == 0xFF &&
+	    buf[3] == 0xFF &&
+	    buf[4] == 0xFF &&
+	    buf[5] == 0xFF &&				/* iMON 2.4G */
+	    ((buf[6] == 0x4E && buf[7] == 0xAF) ||	/* LT */
+	     (buf[6] == 0x5E && buf[7] == 0xAF)))	/* DT */
+		return;		/* filler frame, no data here */
+
+	if (debug) {
+		if (context->ir_onboard_decode)
+			printk("intf%d decoded packet: ", intf);
+		else
+			printk("raw packet: ");
+		for (i = 0; i < len; ++i)
+			printk("%02x ", buf[i]);
+		printk("\n");
+	}
+
+	if (context->ir_onboard_decode) {
+		/* The signals have been decoded onboard the iMON controller */
+		lirc_buffer_write(context->driver->rbuf, buf);
+		wake_up(&context->driver->rbuf->wait_poll);
+		return;
+	}
+
+	/*
+	 * Translate received data to pulse and space lengths.
+	 * Received data is active low, i.e. pulses are 0 and
+	 * spaces are 1.
+	 *
+	 * My original algorithm was essentially similar to
+	 * Changwoo Ryu's with the exception that he switched
+	 * the incoming bits to active high and also fed an
+	 * initial space to LIRC at the start of a new sequence
+	 * if the previous bit was a pulse.
+	 *
+	 * I've decided to adopt his algorithm.
+	 */
+
+	if (chunk_num == 1 && context->rx.initial_space) {
+		/* LIRC requires a leading space */
+		context->rx.prev_bit = 0;
+		context->rx.count = 4;
+		submit_data(context);
+		context->rx.count = 0;
+	}
+
+	for (octet = 0; octet < 5; ++octet) {
+		mask = 0x80;
+		for (bit = 0; bit < 8; ++bit) {
+			int curr_bit = !(buf[octet] & mask);
+			if (curr_bit != context->rx.prev_bit) {
+				if (context->rx.count) {
+					submit_data(context);
+					context->rx.count = 0;
+				}
+				context->rx.prev_bit = curr_bit;
+			}
+			++context->rx.count;
+			mask >>= 1;
+		}
+	}
+
+	if (chunk_num == 10) {
+		if (context->rx.count) {
+			submit_data(context);
+			context->rx.count = 0;
+		}
+		context->rx.initial_space = context->rx.prev_bit;
+	}
+}
+
+/**
+ * report touchscreen input
+ */
+static void imon_touch_display_timeout(unsigned long data)
+{
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18)
+	struct imon_context *context = (struct imon_context *)data;
+	struct input_dev *touch;
+
+	if (!context->display_type == IMON_DISPLAY_TYPE_VGA)
+		return;
+
+	touch = context->touch;
+	input_report_abs(touch, ABS_X, context->touch_x);
+	input_report_abs(touch, ABS_Y, context->touch_y);
+	input_report_key(touch, BTN_TOUCH, 0x00);
+	input_sync(touch);
+#endif
+
+	return;
+}
+
+/**
+ * Callback function for USB core API: receive data
+ */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19)
+static void usb_rx_callback_intf0(struct urb *urb, struct pt_regs *regs)
+#else
+static void usb_rx_callback_intf0(struct urb *urb)
+#endif
+{
+	struct imon_context *context;
+	unsigned char *buf;
+	int len;
+	int intfnum = 0;
+
+	if (!urb)
+		return;
+
+	context = (struct imon_context *)urb->context;
+	if (!context)
+		return;
+
+	buf = urb->transfer_buffer;
+	len = urb->actual_length;
+
+	switch (urb->status) {
+	case -ENOENT:		/* usbcore unlink successful! */
+		return;
+
+	case 0:
+		imon_incoming_packet(context, urb, intfnum);
+		break;
+
+	default:
+		printk(KERN_WARNING "imon %s: status(%d): ignored\n",
+		       __func__, urb->status);
+		break;
+	}
+
+	usb_submit_urb(context->rx_urb_intf0, GFP_ATOMIC);
+
+	return;
+}
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19)
+static void usb_rx_callback_intf1(struct urb *urb, struct pt_regs *regs)
+#else
+static void usb_rx_callback_intf1(struct urb *urb)
+#endif
+{
+	struct imon_context *context;
+	unsigned char *buf;
+	int len;
+	int intfnum = 1;
+
+	if (!urb)
+		return;
+
+	context = (struct imon_context *)urb->context;
+	if (!context)
+		return;
+
+	buf = urb->transfer_buffer;
+	len = urb->actual_length;
+
+	switch (urb->status) {
+	case -ENOENT:		/* usbcore unlink successful! */
+		return;
+
+	case 0:
+		imon_incoming_packet(context, urb, intfnum);
+		break;
+
+	default:
+		printk(KERN_WARNING "imon %s: status(%d): ignored\n",
+		       __func__, urb->status);
+		break;
+	}
+
+	usb_submit_urb(context->rx_urb_intf1, GFP_ATOMIC);
+
+	return;
+}
+
+/**
+ * Callback function for USB core API: Probe
+ */
+static int imon_probe(struct usb_interface *interface,
+		      const struct usb_device_id *id)
+{
+	struct usb_device *usbdev = NULL;
+	struct usb_host_interface *iface_desc = NULL;
+	struct usb_endpoint_descriptor *rx_endpoint = NULL;
+	struct usb_endpoint_descriptor *tx_endpoint = NULL;
+	struct urb *rx_urb = NULL;
+	struct urb *tx_urb = NULL;
+	struct lirc_driver *driver = NULL;
+	struct lirc_buffer *rbuf = NULL;
+	struct usb_interface *first_if;
+	int ifnum;
+	int lirc_minor = 0;
+	int num_endpts;
+	int retval = 0;
+	int display_ep_found = 0;
+	int ir_ep_found = 0;
+	int alloc_status = 0;
+	int vfd_proto_6p = 0;
+	int ir_onboard_decode = 0;
+	int buf_chunk_size = BUF_CHUNK_SIZE;
+	int code_length;
+	int tx_control = 0;
+	struct imon_context *context = NULL;
+	struct imon_context *first_if_context = NULL;
+	int i, sysfs_err;
+	int configured_display_type = IMON_DISPLAY_TYPE_VFD;
+	u16 vendor, product;
+	const unsigned char fp_packet[] = { 0x40, 0x00, 0x00, 0x00,
+					    0x00, 0x00, 0x00, 0x88 };
+
+	/*
+	 * Try to auto-detect the type of display if the user hasn't set
+	 * it by hand via the display_type modparam. Default is VFD.
+	 */
+	if (display_type == IMON_DISPLAY_TYPE_AUTO) {
+		if (usb_match_id(interface, lcd_device_list))
+			configured_display_type = IMON_DISPLAY_TYPE_LCD;
+		else if (usb_match_id(interface, imon_touchscreen_list))
+			configured_display_type = IMON_DISPLAY_TYPE_VGA;
+		else if (usb_match_id(interface, ir_only_list))
+			configured_display_type = IMON_DISPLAY_TYPE_NONE;
+		else
+			configured_display_type = IMON_DISPLAY_TYPE_VFD;
+	} else {
+		configured_display_type = display_type;
+		dprintk("%s: overriding display type to %d via modparam\n",
+			__func__, display_type);
+	}
+
+	/*
+	 * If it's the LCD, as opposed to the VFD, we just need to replace
+	 * the "write" file op.
+	 */
+	if (configured_display_type == IMON_DISPLAY_TYPE_LCD)
+		display_fops.write = &lcd_write;
+
+	/*
+	 * To get front panel buttons working properly for newer LCD devices,
+	 * we really do need a larger buffer.
+	 */
+	if (usb_match_id(interface, large_buffer_list))
+		buf_chunk_size = 2 * BUF_CHUNK_SIZE;
+
+	code_length = buf_chunk_size * 8;
+
+	usbdev     = usb_get_dev(interface_to_usbdev(interface));
+	iface_desc = interface->cur_altsetting;
+	num_endpts = iface_desc->desc.bNumEndpoints;
+	ifnum      = iface_desc->desc.bInterfaceNumber;
+	vendor     = le16_to_cpu(usbdev->descriptor.idVendor);
+	product    = le16_to_cpu(usbdev->descriptor.idProduct);
+
+	dprintk("%s: found iMON device (%04x:%04x, intf%d)\n",
+		__func__, vendor, product, ifnum);
+
+	/* prevent races probing devices w/multiple interfaces */
+	mutex_lock(&driver_lock);
+
+	first_if = usb_ifnum_to_if(usbdev, 0);
+	first_if_context = (struct imon_context *)usb_get_intfdata(first_if);
+
+	/*
+	 * Scan the endpoint list and set:
+	 *	first input endpoint = IR endpoint
+	 *	first output endpoint = display endpoint
+	 */
+	for (i = 0; i < num_endpts && !(ir_ep_found && display_ep_found); ++i) {
+		struct usb_endpoint_descriptor *ep;
+		int ep_dir;
+		int ep_type;
+		ep = &iface_desc->endpoint[i].desc;
+		ep_dir = ep->bEndpointAddress & USB_ENDPOINT_DIR_MASK;
+		ep_type = ep->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
+
+		if (!ir_ep_found &&
+			ep_dir == USB_DIR_IN &&
+			ep_type == USB_ENDPOINT_XFER_INT) {
+
+			rx_endpoint = ep;
+			ir_ep_found = 1;
+			dprintk("%s: found IR endpoint\n", __func__);
+
+		} else if (!display_ep_found &&
+			   ep_dir == USB_DIR_OUT &&
+			   ep_type == USB_ENDPOINT_XFER_INT) {
+			tx_endpoint = ep;
+			display_ep_found = 1;
+			dprintk("%s: found display endpoint\n", __func__);
+		}
+	}
+
+	/*
+	 * If we didn't find a display endpoint, this is probably one of the
+	 * newer iMON devices that use control urb instead of interrupt
+	 */
+	if (!display_ep_found) {
+		if (usb_match_id(interface, ctl_ep_device_list)) {
+			tx_control = 1;
+			display_ep_found = 1;
+			dprintk("%s: device uses control endpoint, not "
+				"interface OUT endpoint\n", __func__);
+		}
+	}
+
+	/*
+	 * Some iMON receivers have no display. Unfortunately, it seems
+	 * that SoundGraph recycles device IDs between devices both with
+	 * and without... :\
+	 */
+	if (configured_display_type == IMON_DISPLAY_TYPE_NONE) {
+		display_ep_found = 0;
+		dprintk("%s: device has no display\n", __func__);
+	}
+
+	/*
+	 * iMON Touch devices have a VGA touchscreen, but no "display", as
+	 * that refers to e.g. /dev/lcd0 (a character device LCD or VFD).
+	 */
+	if (configured_display_type == IMON_DISPLAY_TYPE_VGA) {
+		display_ep_found = 0;
+		dprintk("%s: iMON Touch device found\n", __func__);
+	}
+
+	/* Input endpoint is mandatory */
+	if (!ir_ep_found) {
+		err("%s: no valid input (IR) endpoint found.", __func__);
+		retval = -ENODEV;
+		goto exit;
+	} else {
+		/* Determine if the IR signals are decoded onboard */
+		if (usb_match_id(interface, ir_onboard_decode_list))
+			ir_onboard_decode = 1;
+
+		dprintk("%s: ir_onboard_decode: %d\n",
+			__func__, ir_onboard_decode);
+	}
+
+	/* Determine if display requires 6 packets */
+	if (display_ep_found) {
+		if (usb_match_id(interface, vfd_proto_6p_list))
+			vfd_proto_6p = 1;
+
+		dprintk("%s: vfd_proto_6p: %d\n",
+			__func__, vfd_proto_6p);
+	}
+
+	if (ifnum == 0) {
+		context = kzalloc(sizeof(struct imon_context), GFP_KERNEL);
+		if (!context) {
+			err("%s: kzalloc failed for context", __func__);
+			alloc_status = 1;
+			goto alloc_status_switch;
+		}
+		driver = kzalloc(sizeof(struct lirc_driver), GFP_KERNEL);
+		if (!driver) {
+			err("%s: kzalloc failed for lirc_driver", __func__);
+			alloc_status = 2;
+			goto alloc_status_switch;
+		}
+		rbuf = kmalloc(sizeof(struct lirc_buffer), GFP_KERNEL);
+		if (!rbuf) {
+			err("%s: kmalloc failed for lirc_buffer", __func__);
+			alloc_status = 3;
+			goto alloc_status_switch;
+		}
+		if (lirc_buffer_init(rbuf, buf_chunk_size, BUF_SIZE)) {
+			err("%s: lirc_buffer_init failed", __func__);
+			alloc_status = 4;
+			goto alloc_status_switch;
+		}
+		rx_urb = usb_alloc_urb(0, GFP_KERNEL);
+		if (!rx_urb) {
+			err("%s: usb_alloc_urb failed for IR urb", __func__);
+			alloc_status = 5;
+			goto alloc_status_switch;
+		}
+		tx_urb = usb_alloc_urb(0, GFP_KERNEL);
+		if (!tx_urb) {
+			err("%s: usb_alloc_urb failed for display urb",
+			    __func__);
+			alloc_status = 6;
+			goto alloc_status_switch;
+		}
+
+		mutex_init(&context->lock);
+		context->vfd_proto_6p = vfd_proto_6p;
+		context->ir_onboard_decode = ir_onboard_decode;
+
+		strcpy(driver->name, MOD_NAME);
+		driver->minor = -1;
+		driver->code_length = ir_onboard_decode ?
+			code_length : sizeof(int) * 8;
+		driver->sample_rate = 0;
+		driver->features = (ir_onboard_decode) ?
+			LIRC_CAN_REC_LIRCCODE : LIRC_CAN_REC_MODE2;
+		driver->data = context;
+		driver->rbuf = rbuf;
+		driver->set_use_inc = ir_open;
+		driver->set_use_dec = ir_close;
+#ifdef LIRC_HAVE_SYSFS
+		driver->dev = &interface->dev;
+#endif
+		driver->owner = THIS_MODULE;
+
+		mutex_lock(&context->lock);
+
+		context->driver = driver;
+		/* start out in keyboard mode */
+		context->pad_mouse = 0;
+
+		init_timer(&context->timer);
+		context->timer.data = (unsigned long)context;
+		context->timer.function = imon_touch_display_timeout;
+
+		lirc_minor = lirc_register_driver(driver);
+		if (lirc_minor < 0) {
+			err("%s: lirc_register_driver failed", __func__);
+			alloc_status = 7;
+			goto alloc_status_switch;
+		} else
+			printk(KERN_INFO MOD_NAME ": Registered iMON driver "
+			       "(lirc minor: %d)\n", lirc_minor);
+
+		/* Needed while unregistering! */
+		driver->minor = lirc_minor;
+
+	} else {
+	/* this is the secondary interface on the device */
+		if (first_if_context->driver) {
+			rx_urb = usb_alloc_urb(0, GFP_KERNEL);
+			if (!rx_urb) {
+				err("%s: usb_alloc_urb failed for IR urb",
+				    __func__);
+				alloc_status = 5;
+				goto alloc_status_switch;
+			}
+
+			context = first_if_context;
+		}
+		mutex_lock(&context->lock);
+	}
+
+	if (ifnum == 0) {
+		context->usbdev_intf0 = usbdev;
+		context->dev_present_intf0 = 1;
+		context->rx_endpoint_intf0 = rx_endpoint;
+		context->rx_urb_intf0 = rx_urb;
+
+		/*
+		 * tx is used to send characters to lcd/vfd, associate RF
+		 * remotes, set IR protocol, and maybe more...
+		 */
+		context->tx_endpoint = tx_endpoint;
+		context->tx_urb = tx_urb;
+		context->tx_control = tx_control;
+
+		if (display_ep_found)
+			context->display_supported = 1;
+
+		if (product == 0xffdc)
+			context->ffdc_dev = 1;
+
+		context->display_type = configured_display_type;
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18)
+		context->mouse = input_allocate_device();
+
+		snprintf(context->name_mouse, sizeof(context->name_mouse),
+			 "iMON PAD IR Mouse (%04x:%04x)",
+			 vendor, product);
+		context->mouse->name = context->name_mouse;
+
+		usb_make_path(usbdev, context->phys_mouse, sizeof(context->phys_mouse));
+		strlcat(context->phys_mouse, "/input0", sizeof(context->phys_mouse));
+		context->mouse->phys = context->phys_mouse;
+
+		context->mouse->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_REL);
+		context->mouse->keybit[BIT_WORD(BTN_MOUSE)] =
+			BIT_MASK(BTN_LEFT) | BIT_MASK(BTN_RIGHT) |
+			BIT_MASK(BTN_MIDDLE) | BIT_MASK(BTN_SIDE) |
+			BIT_MASK(BTN_EXTRA);
+		context->mouse->relbit[0] = BIT_MASK(REL_X) | BIT_MASK(REL_Y) |
+			BIT_MASK(REL_WHEEL);
+
+		input_set_drvdata(context->mouse, context);
+
+		usb_to_input_id(usbdev, &context->mouse->id);
+		context->mouse->dev.parent = &interface->dev;
+		retval = input_register_device(context->mouse);
+		if (retval)
+			printk(KERN_INFO "%s: pad mouse input device setup failed\n",
+			       __func__);
+#endif
+
+		usb_fill_int_urb(context->rx_urb_intf0, context->usbdev_intf0,
+			usb_rcvintpipe(context->usbdev_intf0,
+					context->rx_endpoint_intf0->bEndpointAddress),
+			context->usb_rx_buf, sizeof(context->usb_rx_buf),
+			usb_rx_callback_intf0, context,
+			context->rx_endpoint_intf0->bInterval);
+
+		retval = usb_submit_urb(context->rx_urb_intf0, GFP_KERNEL);
+
+		if (retval) {
+			err("%s: usb_submit_urb failed for intf0 (%d)",
+			    __func__, retval);
+			mutex_unlock(&context->lock);
+			goto exit;
+		}
+
+	} else {
+		context->usbdev_intf1 = usbdev;
+		context->dev_present_intf1 = 1;
+		context->rx_endpoint_intf1 = rx_endpoint;
+		context->rx_urb_intf1 = rx_urb;
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18)
+		if (context->display_type == IMON_DISPLAY_TYPE_VGA) {
+			context->touch = input_allocate_device();
+
+			snprintf(context->name_touch, sizeof(context->name_touch),
+				 "iMON USB Touchscreen (%04x:%04x)",
+				 vendor, product);
+			context->touch->name = context->name_touch;
+
+			usb_make_path(usbdev, context->phys_touch,
+				      sizeof(context->phys_touch));
+			strlcat(context->phys_touch, "/input1",
+				sizeof(context->phys_touch));
+			context->touch->phys = context->phys_touch;
+
+			context->touch->evbit[0] =
+				BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS);
+			context->touch->keybit[BIT_WORD(BTN_TOUCH)] =
+				BIT_MASK(BTN_TOUCH);
+			input_set_abs_params(context->touch, ABS_X,
+					     0x00, 0xfff, 0, 0);
+			input_set_abs_params(context->touch, ABS_Y,
+					     0x00, 0xfff, 0, 0);
+
+			input_set_drvdata(context->touch, context);
+
+			usb_to_input_id(usbdev, &context->touch->id);
+			context->touch->dev.parent = &interface->dev;
+			retval = input_register_device(context->touch);
+			if (retval)
+				printk(KERN_INFO "%s: touchscreen input device setup failed\n",
+				       __func__);
+		} else
+			context->touch = NULL;
+#endif
+
+		usb_fill_int_urb(context->rx_urb_intf1, context->usbdev_intf1,
+			usb_rcvintpipe(context->usbdev_intf1,
+				context->rx_endpoint_intf1->bEndpointAddress),
+			context->usb_rx_buf, sizeof(context->usb_rx_buf),
+			usb_rx_callback_intf1, context,
+			context->rx_endpoint_intf1->bInterval);
+
+		retval = usb_submit_urb(context->rx_urb_intf1, GFP_KERNEL);
+
+		if (retval) {
+			err("%s: usb_submit_urb failed for intf1 (%d)",
+			    __func__, retval);
+			mutex_unlock(&context->lock);
+			goto exit;
+		}
+	}
+
+	usb_set_intfdata(interface, context);
+
+	/* RF products *also* use 0xffdc... sigh... */
+	if (context->ffdc_dev) {
+		sysfs_err = sysfs_create_group(&interface->dev.kobj,
+					       &imon_rf_attribute_group);
+		if (sysfs_err)
+			err("%s: Could not create RF sysfs entries(%d)",
+			    __func__, sysfs_err);
+	}
+
+	if (context->display_supported && ifnum == 0) {
+		dprintk("%s: Registering iMON display with sysfs\n", __func__);
+
+		/* set up sysfs entry for built-in clock */
+		sysfs_err = sysfs_create_group(&interface->dev.kobj,
+					       &imon_display_attribute_group);
+		if (sysfs_err)
+			err("%s: Could not create display sysfs entries(%d)",
+			    __func__, sysfs_err);
+
+		if (usb_register_dev(interface, &imon_class)) {
+			/* Not a fatal error, so ignore */
+			printk(KERN_INFO "%s: could not get a minor number for "
+			       "display\n", __func__);
+		}
+
+		/* Enable front-panel buttons and/or knobs */
+		memcpy(context->usb_tx_buf, &fp_packet, sizeof(fp_packet));
+		retval = send_packet(context);
+		/* Not fatal, but warn about it */
+		if (retval)
+			printk(KERN_INFO "%s: failed to enable front-panel "
+			       "buttons and/or knobs\n", __func__);
+	}
+
+	/* set IR protocol/remote type */
+	imon_set_ir_protocol(context);
+
+	printk(KERN_INFO MOD_NAME ": iMON device (%04x:%04x, intf%d) on "
+	       "usb<%d:%d> initialized\n", vendor, product, ifnum,
+	       usbdev->bus->busnum, usbdev->devnum);
+
+alloc_status_switch:
+	mutex_unlock(&context->lock);
+
+	switch (alloc_status) {
+	case 7:
+		usb_free_urb(tx_urb);
+	case 6:
+		usb_free_urb(rx_urb);
+	case 5:
+		if (rbuf)
+			lirc_buffer_free(rbuf);
+	case 4:
+		kfree(rbuf);
+	case 3:
+		kfree(driver);
+	case 2:
+		kfree(context);
+		context = NULL;
+	case 1:
+		retval = -ENOMEM;
+		break;
+	case 0:
+		retval = 0;
+	}
+
+exit:
+	mutex_unlock(&driver_lock);
+
+	return retval;
+}
+
+/**
+ * Callback function for USB core API: disconnect
+ */
+static void imon_disconnect(struct usb_interface *interface)
+{
+	struct imon_context *context;
+	int ifnum;
+
+	/* prevent races with ir_open()/display_open() */
+	mutex_lock(&driver_lock);
+
+	context = usb_get_intfdata(interface);
+	ifnum = interface->cur_altsetting->desc.bInterfaceNumber;
+
+	mutex_lock(&context->lock);
+
+	/*
+	 * sysfs_remove_group is safe to call even if sysfs_create_group
+	 * hasn't been called
+	 */
+	sysfs_remove_group(&interface->dev.kobj,
+			   &imon_display_attribute_group);
+	sysfs_remove_group(&interface->dev.kobj,
+			   &imon_rf_attribute_group);
+
+	usb_set_intfdata(interface, NULL);
+
+	/* Abort ongoing write */
+	if (atomic_read(&context->tx.busy)) {
+		usb_kill_urb(context->tx_urb);
+		complete_all(&context->tx.finished);
+	}
+
+	if (ifnum == 0) {
+		context->dev_present_intf0 = 0;
+		usb_kill_urb(context->rx_urb_intf0);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18)
+		input_unregister_device(context->mouse);
+#endif
+		if (context->display_supported)
+			usb_deregister_dev(interface, &imon_class);
+	} else {
+		context->dev_present_intf1 = 0;
+		usb_kill_urb(context->rx_urb_intf1);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18)
+		if (context->display_type == IMON_DISPLAY_TYPE_VGA)
+			input_unregister_device(context->touch);
+#endif
+	}
+
+	if (!context->ir_isopen && !context->dev_present_intf0 &&
+	    !context->dev_present_intf1) {
+		del_timer_sync(&context->timer);
+		deregister_from_lirc(context);
+		mutex_unlock(&context->lock);
+		if (!context->display_isopen)
+			free_imon_context(context);
+	} else
+		mutex_unlock(&context->lock);
+
+	mutex_unlock(&driver_lock);
+
+	printk(KERN_INFO "%s: iMON device (intf%d) disconnected\n",
+	       __func__, ifnum);
+}
+
+static int imon_suspend(struct usb_interface *intf, pm_message_t message)
+{
+	struct imon_context *context = usb_get_intfdata(intf);
+	int ifnum = intf->cur_altsetting->desc.bInterfaceNumber;
+
+	if (ifnum == 0)
+		usb_kill_urb(context->rx_urb_intf0);
+	else
+		usb_kill_urb(context->rx_urb_intf1);
+
+	return 0;
+}
+
+static int imon_resume(struct usb_interface *intf)
+{
+	int rc = 0;
+	struct imon_context *context = usb_get_intfdata(intf);
+	int ifnum = intf->cur_altsetting->desc.bInterfaceNumber;
+
+	if (ifnum == 0) {
+		usb_fill_int_urb(context->rx_urb_intf0, context->usbdev_intf0,
+			usb_rcvintpipe(context->usbdev_intf0,
+					context->rx_endpoint_intf0->bEndpointAddress),
+			context->usb_rx_buf, sizeof(context->usb_rx_buf),
+			usb_rx_callback_intf0, context,
+			context->rx_endpoint_intf0->bInterval);
+
+		rc = usb_submit_urb(context->rx_urb_intf0, GFP_ATOMIC);
+
+	} else {
+		usb_fill_int_urb(context->rx_urb_intf1, context->usbdev_intf1,
+			usb_rcvintpipe(context->usbdev_intf1,
+				context->rx_endpoint_intf1->bEndpointAddress),
+			context->usb_rx_buf, sizeof(context->usb_rx_buf),
+			usb_rx_callback_intf1, context,
+			context->rx_endpoint_intf1->bInterval);
+
+		rc = usb_submit_urb(context->rx_urb_intf1, GFP_ATOMIC);
+	}
+
+	return rc;
+}
+
+static int __init imon_init(void)
+{
+	int rc;
+
+	printk(KERN_INFO MOD_NAME ": " MOD_DESC ", v" MOD_VERSION "\n");
+
+	rc = usb_register(&imon_driver);
+	if (rc) {
+		err("%s: usb register failed(%d)", __func__, rc);
+		return -ENODEV;
+	}
+
+	return 0;
+}
+
+static void __exit imon_exit(void)
+{
+	usb_deregister(&imon_driver);
+	printk(KERN_INFO MOD_NAME ": module removed. Goodbye!\n");
+}
+
+module_init(imon_init);
+module_exit(imon_exit);
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_ttusbir/Makefile
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_ttusbir/Makefile
@@ -0,0 +1,3 @@
+EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)/..
+
+obj-$(CONFIG_LIRC_TTUSBIR)	+= lirc_ttusbir.o
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_ttusbir/lirc_ttusbir.c
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_ttusbir/lirc_ttusbir.c
@@ -0,0 +1,410 @@
+/*
+ * lirc_ttusbir.c
+ *
+ * lirc_ttusbir - LIRC device driver for the TechnoTrend USB IR Receiver
+ *
+ * Copyright (C) 2007 Stefan Macher <st_maker-lirc@yahoo.de>
+ *
+ * This LIRC driver provides access to the TechnoTrend USB IR Receiver.
+ * The receiver delivers the IR signal as raw sampled true/false data in
+ * isochronous USB packets each of size 128 byte.
+ * Currently the driver reduces the sampling rate by factor of 8 as this
+ * is still more than enough to decode RC-5 - others should be analyzed.
+ * But the driver does not rely on RC-5 it should be able to decode every
+ * IR signal that is not too fast.
+ */
+
+/*
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/version.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/errno.h>
+#include <linux/slab.h>
+#include <linux/usb.h>
+
+#include "../lirc.h"
+#include "../kcompat.h"
+#include "../lirc_dev/lirc_dev.h"
+
+MODULE_DESCRIPTION("TechnoTrend USB IR device driver for LIRC");
+MODULE_AUTHOR("Stefan Macher (st_maker-lirc@yahoo.de)");
+MODULE_LICENSE("GPL");
+
+/* #define DEBUG */
+#ifdef DEBUG
+#define DPRINTK printk
+#else
+#define DPRINTK(_x_, a...)
+#endif
+
+/* function declarations */
+static int probe(struct usb_interface *intf, const struct usb_device_id *id);
+static void disconnect(struct usb_interface *intf);
+#if defined(KERNEL_2_5) && LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19)
+static void urb_complete(struct urb *urb, struct pt_regs *pt_regs);
+#else
+static void urb_complete(struct urb *urb);
+#endif
+static int set_use_inc(void *data);
+static void set_use_dec(void *data);
+
+static int num_urbs = 2;
+module_param(num_urbs, int, S_IRUGO);
+MODULE_PARM_DESC(num_urbs,
+		 "Number of URBs in queue. Try to increase to 4 in case "
+		 "of problems (default: 2; minimum: 2)");
+
+/* table of devices that work with this driver */
+static struct usb_device_id device_id_table[] = {
+	/* TechnoTrend USB IR Receiver */
+	{ USB_DEVICE(0x0B48, 0x2003) },
+	/* Terminating entry */
+	{ }
+};
+MODULE_DEVICE_TABLE(usb, device_id_table);
+
+/* USB driver definition */
+static struct usb_driver usb_driver = {
+	.name = "TTUSBIR",
+	.id_table = &(device_id_table[0]),
+	.probe = probe,
+	.disconnect = disconnect,
+};
+
+/* USB device definition */
+struct ttusbir_device {
+	struct usb_driver *usb_driver;
+	struct usb_device *udev;
+	struct usb_interface *interf;
+	struct usb_class_driver class_driver;
+	unsigned int ifnum; /* Interface number to use */
+	unsigned int alt_setting; /* alternate setting to use */
+	unsigned int endpoint; /* Endpoint to use */
+	struct urb **urb; /* num_urb URB pointers*/
+	char **buffer; /* 128 byte buffer for each URB */
+	struct lirc_buffer rbuf; /* Buffer towards LIRC */
+	struct lirc_driver driver;
+	int minor;
+	int last_pulse; /* remembers if last received byte was pulse or space */
+	int last_num; /* remembers how many last bytes appeared */
+	int opened;
+};
+
+/*** LIRC specific functions ***/
+static int set_use_inc(void *data)
+{
+	int i, retval;
+	struct ttusbir_device *ttusbir = data;
+
+	DPRINTK("Sending first URBs\n");
+	/* @TODO Do I need to check if I am already opened */
+	ttusbir->opened = 1;
+
+	for (i = 0; i < num_urbs; i++) {
+		retval = usb_submit_urb(ttusbir->urb[i], GFP_KERNEL);
+		if (retval) {
+			err("%s: usb_submit_urb failed on urb %d",
+			    __func__, i);
+			return retval;
+		}
+	}
+	return 0;
+}
+
+static void set_use_dec(void *data)
+{
+	struct ttusbir_device *ttusbir = data;
+
+	DPRINTK("Device closed\n");
+
+	ttusbir->opened = 0;
+}
+
+/*** USB specific functions ***/
+
+/*
+ * This mapping table is used to do a very simple filtering of the
+ * input signal.
+ * For a value with at least 4 bits set it returns 0xFF otherwise
+ * 0x00.  For faster IR signals this can not be used. But for RC-5 we
+ * still have about 14 samples per pulse/space, i.e. we sample with 14
+ * times higher frequency than the signal frequency
+ */
+const unsigned char map_table[] =
+{
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF,
+	0x00, 0x00, 0x00, 0xFF, 0x00, 0xFF, 0xFF, 0xFF,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF,
+	0x00, 0x00, 0x00, 0xFF, 0x00, 0xFF, 0xFF, 0xFF,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF,
+	0x00, 0x00, 0x00, 0xFF, 0x00, 0xFF, 0xFF, 0xFF,
+	0x00, 0x00, 0x00, 0xFF, 0x00, 0xFF, 0xFF, 0xFF,
+	0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF,
+	0x00, 0x00, 0x00, 0xFF, 0x00, 0xFF, 0xFF, 0xFF,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF,
+	0x00, 0x00, 0x00, 0xFF, 0x00, 0xFF, 0xFF, 0xFF,
+	0x00, 0x00, 0x00, 0xFF, 0x00, 0xFF, 0xFF, 0xFF,
+	0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF,
+	0x00, 0x00, 0x00, 0xFF, 0x00, 0xFF, 0xFF, 0xFF,
+	0x00, 0x00, 0x00, 0xFF, 0x00, 0xFF, 0xFF, 0xFF,
+	0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+	0x00, 0x00, 0x00, 0xFF, 0x00, 0xFF, 0xFF, 0xFF,
+	0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+	0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+	0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF
+};
+
+#if defined(KERNEL_2_5) && LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19)
+static void urb_complete(struct urb *urb, struct pt_regs *pt_regs)
+#else
+static void urb_complete(struct urb *urb)
+#endif
+{
+	struct ttusbir_device *ttusbir;
+	unsigned char *buf;
+	int i;
+	lirc_t l;
+
+	ttusbir = urb->context;
+
+	if (!ttusbir->opened)
+		return;
+
+	buf = (unsigned char *)urb->transfer_buffer;
+
+	for (i = 0; i < 128; i++) {
+		/* Here we do the filtering and some kind of down sampling */
+		buf[i] = ~map_table[buf[i]];
+		if (ttusbir->last_pulse == buf[i]) {
+			if (ttusbir->last_num < PULSE_MASK/63)
+				ttusbir->last_num++;
+		/*
+		 * else we are in a idle period and do not need to
+		 * increment any longer
+		 */
+		} else {
+			l = ttusbir->last_num * 62; /* about 62 = us/byte */
+			if (ttusbir->last_pulse) /* pulse or space? */
+				l |= PULSE_BIT;
+			if (!lirc_buffer_full(&ttusbir->rbuf)) {
+				lirc_buffer_write(&ttusbir->rbuf, (void *)&l);
+				wake_up_interruptible(&ttusbir->rbuf.wait_poll);
+			}
+			ttusbir->last_num = 0;
+			ttusbir->last_pulse = buf[i];
+		}
+	}
+	usb_submit_urb(urb, GFP_ATOMIC); /* keep data rolling :-) */
+}
+
+/*
+ * Called whenever the USB subsystem thinks we could be the right driver
+ * to handle this device
+ */
+static int probe(struct usb_interface *intf, const struct usb_device_id *id)
+{
+	int alt_set, endp;
+	int found = 0;
+	int i, j;
+	int struct_size;
+	struct usb_host_interface *host_interf;
+	struct usb_interface_descriptor *interf_desc;
+	struct usb_host_endpoint *host_endpoint;
+	struct ttusbir_device *ttusbir;
+
+	DPRINTK("Module ttusbir probe\n");
+
+	/* To reduce memory fragmentation we use only one allocation */
+	struct_size =  sizeof(struct ttusbir_device) +
+		(sizeof(struct urb *) * num_urbs) +
+		(sizeof(char *) * num_urbs) +
+		(num_urbs * 128);
+	ttusbir = kzalloc(struct_size, GFP_KERNEL);
+	if (!ttusbir)
+		return -ENOMEM;
+
+	ttusbir->urb = (struct urb **)((char *)ttusbir +
+				      sizeof(struct ttusbir_device));
+	ttusbir->buffer = (char **)((char *)ttusbir->urb +
+				   (sizeof(struct urb *) * num_urbs));
+	for (i = 0; i < num_urbs; i++)
+		ttusbir->buffer[i] = (char *)ttusbir->buffer +
+			(sizeof(char *)*num_urbs) + (i * 128);
+
+	ttusbir->usb_driver = &usb_driver;
+	ttusbir->alt_setting = -1;
+	/* @TODO check if error can be returned */
+	ttusbir->udev = usb_get_dev(interface_to_usbdev(intf));
+	ttusbir->interf = intf;
+	ttusbir->last_pulse = 0x00;
+	ttusbir->last_num = 0;
+
+	/*
+	 * Now look for interface setting we can handle
+	 * We are searching for the alt setting where end point
+	 * 0x82 has max packet size 16
+	 */
+	for (alt_set = 0; alt_set < intf->num_altsetting && !found; alt_set++) {
+		host_interf = &intf->altsetting[alt_set];
+		interf_desc = &host_interf->desc;
+		for (endp = 0; endp < interf_desc->bNumEndpoints; endp++) {
+			host_endpoint = &host_interf->endpoint[endp];
+			if ((host_endpoint->desc.bEndpointAddress == 0x82) &&
+			    (host_endpoint->desc.wMaxPacketSize == 0x10)) {
+				ttusbir->alt_setting = alt_set;
+				ttusbir->endpoint = endp;
+				found = 1;
+				break;
+			}
+		}
+	}
+	if (ttusbir->alt_setting != -1)
+		DPRINTK("alt setting: %d\n", ttusbir->alt_setting);
+	else {
+		err("Could not find alternate setting\n");
+		kfree(ttusbir);
+		return -EINVAL;
+	}
+
+	/* OK lets setup this interface setting */
+	usb_set_interface(ttusbir->udev, 0, ttusbir->alt_setting);
+
+	/* Store device info in interface structure */
+	usb_set_intfdata(intf, ttusbir);
+
+	/* Register as a LIRC driver */
+	if (lirc_buffer_init(&ttusbir->rbuf, sizeof(lirc_t), 256) < 0) {
+		err("Could not get memory for LIRC data buffer\n");
+		usb_set_intfdata(intf, NULL);
+		kfree(ttusbir);
+		return -ENOMEM;
+	}
+	strcpy(ttusbir->driver.name, "TTUSBIR");
+	ttusbir->driver.minor = -1;
+	ttusbir->driver.code_length = 1;
+	ttusbir->driver.sample_rate = 0;
+	ttusbir->driver.data = ttusbir;
+	ttusbir->driver.add_to_buf = NULL;
+#ifndef LIRC_REMOVE_DURING_EXPORT
+	ttusbir->driver.get_queue = NULL;
+#endif
+	ttusbir->driver.rbuf = &ttusbir->rbuf;
+	ttusbir->driver.set_use_inc = set_use_inc;
+	ttusbir->driver.set_use_dec = set_use_dec;
+	ttusbir->driver.fops = NULL;
+	ttusbir->driver.dev = &intf->dev;
+	ttusbir->driver.owner = THIS_MODULE;
+	ttusbir->driver.features = LIRC_CAN_REC_MODE2;
+	ttusbir->minor = lirc_register_driver(&ttusbir->driver);
+	if (ttusbir->minor < 0) {
+		err("Error registering as LIRC driver\n");
+		usb_set_intfdata(intf, NULL);
+		lirc_buffer_free(&ttusbir->rbuf);
+		kfree(ttusbir);
+		return -EIO;
+	}
+
+	/* Allocate and setup the URB that we will use to talk to the device */
+	for (i = 0; i < num_urbs; i++) {
+		ttusbir->urb[i] = usb_alloc_urb(8, GFP_KERNEL);
+		if (!ttusbir->urb[i]) {
+			err("Could not allocate memory for the URB\n");
+			for (j = i - 1; j >= 0; j--)
+				kfree(ttusbir->urb[j]);
+			lirc_buffer_free(&ttusbir->rbuf);
+			lirc_unregister_driver(ttusbir->minor);
+			kfree(ttusbir);
+			usb_set_intfdata(intf, NULL);
+			return -ENOMEM;
+		}
+		ttusbir->urb[i]->dev = ttusbir->udev;
+		ttusbir->urb[i]->context = ttusbir;
+		ttusbir->urb[i]->pipe = usb_rcvisocpipe(ttusbir->udev,
+							ttusbir->endpoint);
+		ttusbir->urb[i]->interval = 1;
+		ttusbir->urb[i]->transfer_flags = URB_ISO_ASAP;
+		ttusbir->urb[i]->transfer_buffer = &ttusbir->buffer[i][0];
+		ttusbir->urb[i]->complete = urb_complete;
+		ttusbir->urb[i]->number_of_packets = 8;
+		ttusbir->urb[i]->transfer_buffer_length = 128;
+		for (j = 0; j < 8; j++) {
+			ttusbir->urb[i]->iso_frame_desc[j].offset = j*16;
+			ttusbir->urb[i]->iso_frame_desc[j].length = 16;
+		}
+	}
+	return 0;
+}
+
+/**
+ * Called when the driver is unloaded or the device is unplugged
+ */
+static void disconnect(struct usb_interface *intf)
+{
+	int i;
+	struct ttusbir_device *ttusbir;
+
+	DPRINTK("Module ttusbir disconnect\n");
+
+	ttusbir = (struct ttusbir_device *) usb_get_intfdata(intf);
+	usb_set_intfdata(intf, NULL);
+	lirc_unregister_driver(ttusbir->minor);
+	DPRINTK("unregistered\n");
+
+	for (i = 0; i < num_urbs; i++) {
+		usb_kill_urb(ttusbir->urb[i]);
+		usb_free_urb(ttusbir->urb[i]);
+	}
+	DPRINTK("URBs killed\n");
+	lirc_buffer_free(&ttusbir->rbuf);
+	kfree(ttusbir);
+}
+
+static int ttusbir_init_module(void)
+{
+	int result;
+
+	DPRINTK(KERN_DEBUG "Module ttusbir init\n");
+
+	/* register this driver with the USB subsystem */
+	result = usb_register(&usb_driver);
+	if (result)
+		err("usb_register failed. Error number %d", result);
+	return result;
+}
+
+static void ttusbir_exit_module(void)
+{
+	printk(KERN_DEBUG "Module ttusbir exit\n");
+	usb_deregister(&usb_driver);
+}
+
+module_init(ttusbir_init_module);
+module_exit(ttusbir_exit_module);
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_mceusb/lirc_mceusb.c
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_mceusb/lirc_mceusb.c
@@ -0,0 +1,1289 @@
+/*
+ * LIRC driver for Windows Media Center Edition USB Infrared Transceivers
+ *
+ * (C) by Martin A. Blatter <martin_a_blatter@yahoo.com>
+ *
+ * Transmitter support and reception code cleanup.
+ * (C) by Daniel Melander <lirc@rajidae.se>
+ *
+ * Original lirc_mceusb driver for 1st-gen device:
+ * Copyright (c) 2003-2004 Dan Conti <dconti@acm.wwu.edu>
+ *
+ * Original lirc_mceusb driver deprecated in favor of this driver, which
+ * supports the 1st-gen device now too. Transmitting on the 1st-gen device
+ * only functions on port #2 at the moment.
+ *
+ * Support for 1st-gen device added June 2009,
+ * by Jarod Wilson <jarod@wilsonet.com>
+ *
+ * Initial transmission support for 1st-gen device added August 2009,
+ * by Patrick Calhoun <phineas@ou.edu>
+ *
+ * Derived from ATI USB driver by Paul Miller and the original
+ * MCE USB driver by Dan Conti ((and now including chunks of the latter
+ * relevant to the 1st-gen device initialization)
+ *
+ * This driver will only work reliably with kernel version 2.6.10
+ * or higher, probably because of differences in USB device enumeration
+ * in the kernel code. Device initialization fails most of the time
+ * with earlier kernel versions.
+ *
+ **********************************************************************
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#include <linux/version.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 5)
+#error "*******************************************************"
+#error "Sorry, this driver needs kernel version 2.6.5 or higher"
+#error "*******************************************************"
+#endif
+#include <linux/autoconf.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/module.h>
+#include <linux/kmod.h>
+#include <linux/smp_lock.h>
+#include <linux/completion.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18)
+#include <asm/uaccess.h>
+#else
+#include <linux/uaccess.h>
+#endif
+#include <linux/usb.h>
+#include <linux/wait.h>
+#include <linux/time.h>
+
+#include "../lirc.h"
+#include "../kcompat.h"
+#include "../lirc_dev/lirc_dev.h"
+
+#define DRIVER_VERSION	"1.90"
+#define DRIVER_AUTHOR	"Daniel Melander <lirc@rajidae.se>, " \
+			"Martin Blatter <martin_a_blatter@yahoo.com>, " \
+			"Dan Conti <dconti@acm.wwu.edu>"
+#define DRIVER_DESC	"Windows Media Center Edition USB IR Transceiver " \
+			"driver for LIRC"
+#define DRIVER_NAME	"lirc_mceusb"
+
+#define USB_BUFLEN	32	/* USB reception buffer length */
+#define LIRCBUF_SIZE	256	/* LIRC work buffer length */
+
+/* MCE constants */
+#define MCE_CMDBUF_SIZE	384 /* MCE Command buffer length */
+#define MCE_TIME_UNIT	50 /* Approx 50us resolution */
+#define MCE_CODE_LENGTH	5 /* Normal length of packet (with header) */
+#define MCE_PACKET_SIZE	4 /* Normal length of packet (without header) */
+#define MCE_PACKET_HEADER 0x84 /* Actual header format is 0x80 + num_bytes */
+#define MCE_CONTROL_HEADER 0x9F /* MCE status header */
+#define MCE_TX_HEADER_LENGTH 3 /* # of bytes in the initializing tx header */
+#define MCE_MAX_CHANNELS 2 /* Two transmitters, hardware dependent? */
+#define MCE_DEFAULT_TX_MASK 0x03 /* Val opts: TX1=0x01, TX2=0x02, ALL=0x03 */
+#define MCE_PULSE_BIT	0x80 /* Pulse bit, MSB set == PULSE else SPACE */
+#define MCE_PULSE_MASK	0x7F /* Pulse mask */
+#define MCE_MAX_PULSE_LENGTH 0x7F /* Longest transmittable pulse symbol */
+#define MCE_PACKET_LENGTH_MASK  0x7F /* Pulse mask */
+
+
+/* module parameters */
+#ifdef CONFIG_USB_DEBUG
+static int debug = 1;
+#else
+static int debug;
+#endif
+#define dprintk(fmt, args...)					\
+	do {							\
+		if (debug)					\
+			printk(KERN_DEBUG fmt, ## args);	\
+	} while (0)
+
+/* general constants */
+#define SEND_FLAG_IN_PROGRESS	1
+#define SEND_FLAG_COMPLETE	2
+#define RECV_FLAG_IN_PROGRESS	3
+#define RECV_FLAG_COMPLETE	4
+
+#define MCEUSB_INBOUND		1
+#define MCEUSB_OUTBOUND		2
+
+#define VENDOR_PHILIPS		0x0471
+#define VENDOR_SMK		0x0609
+#define VENDOR_TATUNG		0x1460
+#define VENDOR_GATEWAY		0x107b
+#define VENDOR_SHUTTLE		0x1308
+#define VENDOR_SHUTTLE2		0x051c
+#define VENDOR_MITSUMI		0x03ee
+#define VENDOR_TOPSEED		0x1784
+#define VENDOR_RICAVISION	0x179d
+#define VENDOR_ITRON		0x195d
+#define VENDOR_FIC		0x1509
+#define VENDOR_LG		0x043e
+#define VENDOR_MICROSOFT	0x045e
+#define VENDOR_FORMOSA		0x147a
+#define VENDOR_FINTEK		0x1934
+#define VENDOR_PINNACLE		0x2304
+#define VENDOR_ECS		0x1019
+#define VENDOR_WISTRON		0x0fb8
+#define VENDOR_COMPRO		0x185b
+#define VENDOR_NORTHSTAR	0x04eb
+
+static struct usb_device_id mceusb_dev_table[] = {
+	/* Original Microsoft MCE IR Transceiver (often HP-branded) */
+	{ USB_DEVICE(VENDOR_MICROSOFT, 0x006d) },
+	/* Philips Infrared Transceiver - Sahara branded */
+	{ USB_DEVICE(VENDOR_PHILIPS, 0x0608) },
+	/* Philips Infrared Transceiver - HP branded */
+	{ USB_DEVICE(VENDOR_PHILIPS, 0x060c) },
+	/* Philips SRM5100 */
+	{ USB_DEVICE(VENDOR_PHILIPS, 0x060d) },
+	/* Philips Infrared Transceiver - Omaura */
+	{ USB_DEVICE(VENDOR_PHILIPS, 0x060f) },
+	/* Philips Infrared Transceiver - Spinel plus */
+	{ USB_DEVICE(VENDOR_PHILIPS, 0x0613) },
+	/* Philips eHome Infrared Transceiver */
+	{ USB_DEVICE(VENDOR_PHILIPS, 0x0815) },
+	/* SMK/Toshiba G83C0004D410 */
+	{ USB_DEVICE(VENDOR_SMK, 0x031d) },
+	/* SMK eHome Infrared Transceiver (Sony VAIO) */
+	{ USB_DEVICE(VENDOR_SMK, 0x0322) },
+	/* bundled with Hauppauge PVR-150 */
+	{ USB_DEVICE(VENDOR_SMK, 0x0334) },
+	/* Tatung eHome Infrared Transceiver */
+	{ USB_DEVICE(VENDOR_TATUNG, 0x9150) },
+	/* Shuttle eHome Infrared Transceiver */
+	{ USB_DEVICE(VENDOR_SHUTTLE, 0xc001) },
+	/* Shuttle eHome Infrared Transceiver */
+	{ USB_DEVICE(VENDOR_SHUTTLE2, 0xc001) },
+	/* Gateway eHome Infrared Transceiver */
+	{ USB_DEVICE(VENDOR_GATEWAY, 0x3009) },
+	/* Mitsumi */
+	{ USB_DEVICE(VENDOR_MITSUMI, 0x2501) },
+	/* Topseed eHome Infrared Transceiver */
+	{ USB_DEVICE(VENDOR_TOPSEED, 0x0001) },
+	/* Topseed HP eHome Infrared Transceiver */
+	{ USB_DEVICE(VENDOR_TOPSEED, 0x0006) },
+	/* Topseed eHome Infrared Transceiver */
+	{ USB_DEVICE(VENDOR_TOPSEED, 0x0007) },
+	/* Topseed eHome Infrared Transceiver */
+	{ USB_DEVICE(VENDOR_TOPSEED, 0x0008) },
+	/* Topseed eHome Infrared Transceiver */
+	{ USB_DEVICE(VENDOR_TOPSEED, 0x000a) },
+	/* Ricavision internal Infrared Transceiver */
+	{ USB_DEVICE(VENDOR_RICAVISION, 0x0010) },
+	/* Itron ione Libra Q-11 */
+	{ USB_DEVICE(VENDOR_ITRON, 0x7002) },
+	/* FIC eHome Infrared Transceiver */
+	{ USB_DEVICE(VENDOR_FIC, 0x9242) },
+	/* LG eHome Infrared Transceiver */
+	{ USB_DEVICE(VENDOR_LG, 0x9803) },
+	/* Microsoft MCE Infrared Transceiver */
+	{ USB_DEVICE(VENDOR_MICROSOFT, 0x00a0) },
+	/* Formosa eHome Infrared Transceiver */
+	{ USB_DEVICE(VENDOR_FORMOSA, 0xe015) },
+	/* Formosa21 / eHome Infrared Receiver */
+	{ USB_DEVICE(VENDOR_FORMOSA, 0xe016) },
+	/* Formosa aim / Trust MCE Infrared Receiver */
+	{ USB_DEVICE(VENDOR_FORMOSA, 0xe017) },
+	/* Formosa Industrial Computing / Beanbag Emulation Device */
+	{ USB_DEVICE(VENDOR_FORMOSA, 0xe018) },
+	/* Formosa21 / eHome Infrared Receiver */
+	{ USB_DEVICE(VENDOR_FORMOSA, 0xe03a) },
+	/* Formosa Industrial Computing AIM IR605/A */
+	{ USB_DEVICE(VENDOR_FORMOSA, 0xe03c) },
+	/* Fintek eHome Infrared Transceiver */
+	{ USB_DEVICE(VENDOR_FINTEK, 0x0602) },
+	/* Fintek eHome Infrared Transceiver (in the AOpen MP45) */
+	{ USB_DEVICE(VENDOR_FINTEK, 0x0702) },
+	/* Pinnacle Remote Kit */
+	{ USB_DEVICE(VENDOR_PINNACLE, 0x0225) },
+	/* Elitegroup Computer Systems IR */
+	{ USB_DEVICE(VENDOR_ECS, 0x0f38) },
+	/* Wistron Corp. eHome Infrared Receiver */
+	{ USB_DEVICE(VENDOR_WISTRON, 0x0002) },
+	/* Compro K100 */
+	{ USB_DEVICE(VENDOR_COMPRO, 0x3020) },
+	/* Compro K100 v2 */
+	{ USB_DEVICE(VENDOR_COMPRO, 0x3082) },
+	/* Northstar Systems eHome Infrared Transceiver */
+	{ USB_DEVICE(VENDOR_NORTHSTAR, 0xe004) },
+	/* Terminating entry */
+	{ }
+};
+
+static struct usb_device_id pinnacle_list[] = {
+	{ USB_DEVICE(VENDOR_PINNACLE, 0x0225) },
+	{}
+};
+
+static struct usb_device_id microsoft_gen1_list[] = {
+	{ USB_DEVICE(VENDOR_MICROSOFT, 0x006d) },
+	{}
+};
+
+static struct usb_device_id transmitter_mask_list[] = {
+	{ USB_DEVICE(VENDOR_SMK, 0x031d) },
+	{ USB_DEVICE(VENDOR_SMK, 0x0322) },
+	{ USB_DEVICE(VENDOR_SMK, 0x0334) },
+	{ USB_DEVICE(VENDOR_TOPSEED, 0x0001) },
+	{ USB_DEVICE(VENDOR_TOPSEED, 0x0006) },
+	{ USB_DEVICE(VENDOR_TOPSEED, 0x0007) },
+	{ USB_DEVICE(VENDOR_TOPSEED, 0x0008) },
+	{ USB_DEVICE(VENDOR_TOPSEED, 0x000a) },
+	{ USB_DEVICE(VENDOR_PINNACLE, 0x0225) },
+	{}
+};
+
+/* data structure for each usb transceiver */
+struct mceusb_dev {
+
+	/* usb */
+	struct usb_device *usbdev;
+	struct urb *urb_in;
+	int devnum;
+	struct usb_endpoint_descriptor *usb_ep_in;
+	struct usb_endpoint_descriptor *usb_ep_out;
+
+	/* buffers and dma */
+	unsigned char *buf_in;
+	unsigned int len_in;
+	dma_addr_t dma_in;
+	dma_addr_t dma_out;
+	unsigned int overflow_len;
+
+	/* lirc */
+	struct lirc_driver *d;
+	lirc_t lircdata;
+	unsigned char is_pulse;
+	struct {
+		u32 connected:1;
+		u32 pinnacle:1;
+		u32 transmitter_mask_inverted:1;
+		u32 microsoft_gen1:1;
+		u32 reserved:28;
+	} flags;
+
+	unsigned char transmitter_mask;
+	unsigned int carrier_freq;
+
+	/* handle sending (init strings) */
+	int send_flags;
+	wait_queue_head_t wait_out;
+
+	struct mutex lock;
+};
+
+/* init strings */
+static char init1[] = {0x00, 0xff, 0xaa, 0xff, 0x0b};
+static char init2[] = {0xff, 0x18};
+
+static char pin_init1[] = { 0x9f, 0x07};
+static char pin_init2[] = { 0x9f, 0x13};
+static char pin_init3[] = { 0x9f, 0x0d};
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 11)
+static unsigned long usecs_to_jiffies(const unsigned int u)
+{
+	if (u > jiffies_to_usecs(MAX_JIFFY_OFFSET))
+		return MAX_JIFFY_OFFSET;
+#if HZ <= USEC_PER_SEC && !(USEC_PER_SEC % HZ)
+	return (u + (USEC_PER_SEC / HZ) - 1) / (USEC_PER_SEC / HZ);
+#elif HZ > USEC_PER_SEC && !(HZ % USEC_PER_SEC)
+	return u * (HZ / USEC_PER_SEC);
+#else
+	return (u * HZ + USEC_PER_SEC - 1) / USEC_PER_SEC;
+#endif
+}
+#endif
+static void mceusb_dev_printdata(struct mceusb_dev *ir, char *buf, int len)
+{
+	char codes[USB_BUFLEN * 3 + 1];
+	int i;
+
+	if (len <= 0)
+		return;
+
+	if (ir->flags.microsoft_gen1 && len <= 2)
+		return;
+
+	for (i = 0; i < len && i < USB_BUFLEN; i++)
+		snprintf(codes + i * 3, 4, "%02x ", buf[i] & 0xFF);
+
+	printk(KERN_INFO "" DRIVER_NAME "[%d]: data received %s (length=%d)\n",
+		ir->devnum, codes, len);
+}
+
+static void usb_async_callback(struct urb *urb, struct pt_regs *regs)
+{
+	struct mceusb_dev *ir;
+	int len;
+
+	if (!urb)
+		return;
+
+	ir = urb->context;
+	if (ir) {
+		len = urb->actual_length;
+
+		dprintk(DRIVER_NAME
+			"[%d]: callback called (status=%d len=%d)\n",
+			ir->devnum, urb->status, len);
+
+		if (debug)
+			mceusb_dev_printdata(ir, urb->transfer_buffer, len);
+	}
+
+}
+
+/* request incoming or send outgoing usb packet - used to initialize remote */
+static void request_packet_async(struct mceusb_dev *ir,
+				 struct usb_endpoint_descriptor *ep,
+				 unsigned char *data, int size, int urb_type)
+{
+	int res;
+	struct urb *async_urb;
+	unsigned char *async_buf;
+
+	if (urb_type) {
+		async_urb = usb_alloc_urb(0, GFP_KERNEL);
+		if (unlikely(!async_urb))
+			return;
+
+		async_buf = kmalloc(size, GFP_KERNEL);
+		if (!async_buf) {
+			usb_free_urb(async_urb);
+			return;
+		}
+
+		if (urb_type == MCEUSB_OUTBOUND) {
+			/* outbound data */
+			usb_fill_int_urb(async_urb, ir->usbdev,
+				usb_sndintpipe(ir->usbdev,
+					ep->bEndpointAddress),
+				async_buf, size,
+				(usb_complete_t) usb_async_callback,
+				ir, ep->bInterval);
+			memcpy(async_buf, data, size);
+		} else {
+			/* inbound data */
+			usb_fill_int_urb(async_urb, ir->usbdev,
+				usb_rcvintpipe(ir->usbdev,
+					ep->bEndpointAddress),
+				async_buf, size,
+				(usb_complete_t) usb_async_callback,
+				ir, ep->bInterval);
+		}
+		async_urb->transfer_flags = URB_ASYNC_UNLINK;
+	} else {
+		/* standard request */
+		async_urb = ir->urb_in;
+		ir->send_flags = RECV_FLAG_IN_PROGRESS;
+	}
+
+	dprintk(DRIVER_NAME "[%d]: receive request called (size=%#x)\n",
+		ir->devnum, size);
+
+	async_urb->transfer_buffer_length = size;
+	async_urb->dev = ir->usbdev;
+
+	res = usb_submit_urb(async_urb, GFP_ATOMIC);
+	if (res) {
+		dprintk(DRIVER_NAME "[%d]: receive request FAILED! (res=%d)\n",
+			ir->devnum, res);
+		return;
+	}
+	dprintk(DRIVER_NAME "[%d]: receive request complete (res=%d)\n",
+		ir->devnum, res);
+}
+
+static int unregister_from_lirc(struct mceusb_dev *ir)
+{
+	struct lirc_driver *d = ir->d;
+	int devnum;
+	int rtn;
+
+	devnum = ir->devnum;
+	dprintk(DRIVER_NAME "[%d]: unregister from lirc called\n", devnum);
+
+	rtn = lirc_unregister_driver(d->minor);
+	if (rtn > 0) {
+		printk(DRIVER_NAME "[%d]: error in lirc_unregister minor: %d\n"
+			"Trying again...\n", devnum, d->minor);
+		if (rtn == -EBUSY) {
+			printk(DRIVER_NAME
+				"[%d]: device is opened, will unregister"
+				" on close\n", devnum);
+			return -EAGAIN;
+		}
+		set_current_state(TASK_INTERRUPTIBLE);
+		schedule_timeout(HZ);
+
+		rtn = lirc_unregister_driver(d->minor);
+		if (rtn > 0)
+			printk(DRIVER_NAME "[%d]: lirc_unregister failed\n",
+			devnum);
+	}
+
+	if (rtn) {
+		printk(DRIVER_NAME "[%d]: didn't free resources\n", devnum);
+		return -EAGAIN;
+	}
+
+	printk(DRIVER_NAME "[%d]: usb remote disconnected\n", devnum);
+
+	lirc_buffer_free(d->rbuf);
+	kfree(d->rbuf);
+	kfree(d);
+	kfree(ir);
+	return 0;
+}
+
+static int mceusb_ir_open(void *data)
+{
+	struct mceusb_dev *ir = data;
+
+	if (!ir) {
+		printk(DRIVER_NAME "[?]: %s called with no context\n",
+		       __func__);
+		return -EIO;
+	}
+	dprintk(DRIVER_NAME "[%d]: mceusb IR device opened\n", ir->devnum);
+
+	MOD_INC_USE_COUNT;
+	if (!ir->flags.connected) {
+		if (!ir->usbdev)
+			return -ENOENT;
+		ir->flags.connected = 1;
+	}
+
+	return 0;
+}
+
+static void mceusb_ir_close(void *data)
+{
+	struct mceusb_dev *ir = data;
+
+	if (!ir) {
+		printk(DRIVER_NAME "[?]: %s called with no context\n",
+		       __func__);
+		return;
+	}
+	dprintk(DRIVER_NAME "[%d]: mceusb IR device closed\n", ir->devnum);
+
+	if (ir->flags.connected) {
+		mutex_lock(&ir->lock);
+		ir->flags.connected = 0;
+		mutex_unlock(&ir->lock);
+	}
+	MOD_DEC_USE_COUNT;
+}
+
+static void send_packet_to_lirc(struct mceusb_dev *ir)
+{
+	if (ir->lircdata) {
+		lirc_buffer_write(ir->d->rbuf,
+				  (unsigned char *) &ir->lircdata);
+		wake_up(&ir->d->rbuf->wait_poll);
+		ir->lircdata = 0;
+	}
+}
+
+static void mceusb_process_ir_data(struct mceusb_dev *ir, int buf_len)
+{
+	int i, j;
+	int packet_len = 0;
+	int start_index = 0;
+
+	/* skip meaningless 0xb1 0x60 header bytes on orig receiver */
+	if (ir->flags.microsoft_gen1)
+		start_index = 2;
+
+	/* this should only trigger w/the 1st-gen mce receiver */
+	for (i = start_index; i < (start_index + ir->overflow_len) &&
+	     i < buf_len; i++) {
+		/* rising/falling flank */
+		if (ir->is_pulse != (ir->buf_in[i] & MCE_PULSE_BIT)) {
+			send_packet_to_lirc(ir);
+			ir->is_pulse = ir->buf_in[i] & MCE_PULSE_BIT;
+		}
+
+		/* accumulate mce pulse/space values */
+		ir->lircdata += (ir->buf_in[i] & MCE_PULSE_MASK) *
+				MCE_TIME_UNIT;
+		ir->lircdata |= (ir->is_pulse ? PULSE_BIT : 0);
+	}
+	start_index += ir->overflow_len;
+	ir->overflow_len = 0;
+
+	for (i = start_index; i < buf_len; i++) {
+		/* decode mce packets of the form (84),AA,BB,CC,DD */
+		if (ir->buf_in[i] >= 0x80 && ir->buf_in[i] <= 0x9e) {
+			/* data headers */
+			/* decode packet data */
+			packet_len = ir->buf_in[i] & MCE_PACKET_LENGTH_MASK;
+			ir->overflow_len = i + 1 + packet_len - buf_len;
+			for (j = 1; j <= packet_len && (i + j < buf_len); j++) {
+				/* rising/falling flank */
+				if (ir->is_pulse !=
+				    (ir->buf_in[i + j] & MCE_PULSE_BIT)) {
+					send_packet_to_lirc(ir);
+					ir->is_pulse =
+						ir->buf_in[i + j] &
+							MCE_PULSE_BIT;
+				}
+
+				/* accumulate mce pulse/space values */
+				ir->lircdata +=
+					(ir->buf_in[i + j] & MCE_PULSE_MASK) *
+						MCE_TIME_UNIT;
+				ir->lircdata |= (ir->is_pulse ? PULSE_BIT : 0);
+			}
+
+			i += packet_len;
+		} else if (ir->buf_in[i] == MCE_CONTROL_HEADER) {
+			/* status header (0x9F) */
+			/*
+			 * A transmission containing one or more consecutive ir
+			 * commands always ends with a GAP of 100ms followed by
+			 * the sequence 0x9F 0x01 0x01 0x9F 0x15 0x00 0x00 0x80
+			 */
+
+#if 0
+	Uncomment this if the last 100ms "infinity"-space should be transmitted
+	to lirc directly instead of at the beginning of the next transmission.
+	Changes pulse/space order.
+
+			if (++i < buf_len && ir->buf_in[i]==0x01)
+				send_packet_to_lirc(ir);
+
+#endif
+
+			/* end decode loop */
+			dprintk(DRIVER_NAME "[%d] %s: found control header\n",
+				ir->devnum, __func__);
+			ir->overflow_len = 0;
+			break;
+		} else {
+			dprintk(DRIVER_NAME "[%d] %s: stray packet?\n",
+				ir->devnum, __func__);
+			ir->overflow_len = 0;
+		}
+	}
+
+	return;
+}
+
+static void mceusb_dev_recv(struct urb *urb, struct pt_regs *regs)
+{
+	struct mceusb_dev *ir;
+	int buf_len;
+
+	if (!urb)
+		return;
+
+	ir = urb->context;
+	if (!ir) {
+		urb->transfer_flags |= URB_ASYNC_UNLINK;
+		usb_unlink_urb(urb);
+		return;
+	}
+
+	buf_len = urb->actual_length;
+
+	if (debug)
+		mceusb_dev_printdata(ir, urb->transfer_buffer, buf_len);
+
+	if (ir->send_flags == RECV_FLAG_IN_PROGRESS) {
+		ir->send_flags = SEND_FLAG_COMPLETE;
+		dprintk(DRIVER_NAME "[%d]: setup answer received %d bytes\n",
+			ir->devnum, buf_len);
+	}
+
+	switch (urb->status) {
+	/* success */
+	case 0:
+		mceusb_process_ir_data(ir, buf_len);
+		break;
+
+	case -ECONNRESET:
+	case -ENOENT:
+	case -ESHUTDOWN:
+		urb->transfer_flags |= URB_ASYNC_UNLINK;
+		usb_unlink_urb(urb);
+		return;
+
+	case -EPIPE:
+	default:
+		break;
+	}
+
+	usb_submit_urb(urb, GFP_ATOMIC);
+}
+
+
+static ssize_t mceusb_transmit_ir(struct file *file, const char *buf,
+				  size_t n, loff_t *ppos)
+{
+	int i, count = 0, cmdcount = 0;
+	struct mceusb_dev *ir = NULL;
+	lirc_t wbuf[LIRCBUF_SIZE]; /* Workbuffer with values from lirc */
+	unsigned char cmdbuf[MCE_CMDBUF_SIZE]; /* MCE command buffer */
+	unsigned long signal_duration = 0; /* Singnal length in us */
+	struct timeval start_time, end_time;
+
+	do_gettimeofday(&start_time);
+
+	/* Retrieve lirc_driver data for the device */
+	ir = lirc_get_pdata(file);
+	if (!ir || !ir->usb_ep_out)
+		return -EFAULT;
+
+	if (n % sizeof(lirc_t))
+		return -EINVAL;
+	count = n / sizeof(lirc_t);
+
+	/* Check if command is within limits */
+	if (count > LIRCBUF_SIZE || count%2 == 0)
+		return -EINVAL;
+	if (copy_from_user(wbuf, buf, n))
+		return -EFAULT;
+
+	/* MCE tx init header */
+	cmdbuf[cmdcount++] = MCE_CONTROL_HEADER;
+	cmdbuf[cmdcount++] = 0x08;
+	cmdbuf[cmdcount++] = ir->transmitter_mask;
+
+	/* Generate mce packet data */
+	for (i = 0; (i < count) && (cmdcount < MCE_CMDBUF_SIZE); i++) {
+		signal_duration += wbuf[i];
+		wbuf[i] = wbuf[i] / MCE_TIME_UNIT;
+
+		do { /* loop to support long pulses/spaces > 127*50us=6.35ms */
+
+			/* Insert mce packet header every 4th entry */
+			if ((cmdcount < MCE_CMDBUF_SIZE) &&
+			    (cmdcount - MCE_TX_HEADER_LENGTH) %
+			     MCE_CODE_LENGTH == 0)
+				cmdbuf[cmdcount++] = MCE_PACKET_HEADER;
+
+			/* Insert mce packet data */
+			if (cmdcount < MCE_CMDBUF_SIZE)
+				cmdbuf[cmdcount++] =
+					(wbuf[i] < MCE_PULSE_BIT ?
+					 wbuf[i] : MCE_MAX_PULSE_LENGTH) |
+					 (i & 1 ? 0x00 : MCE_PULSE_BIT);
+			else
+				return -EINVAL;
+		} while ((wbuf[i] > MCE_MAX_PULSE_LENGTH) &&
+			 (wbuf[i] -= MCE_MAX_PULSE_LENGTH));
+	}
+
+	/* Fix packet length in last header */
+	cmdbuf[cmdcount - (cmdcount - MCE_TX_HEADER_LENGTH) % MCE_CODE_LENGTH] =
+		0x80 + (cmdcount - MCE_TX_HEADER_LENGTH) % MCE_CODE_LENGTH - 1;
+
+	/* Check if we have room for the empty packet at the end */
+	if (cmdcount >= MCE_CMDBUF_SIZE)
+		return -EINVAL;
+
+	/* All mce commands end with an empty packet (0x80) */
+	cmdbuf[cmdcount++] = 0x80;
+
+	/* Transmit the command to the mce device */
+	request_packet_async(ir, ir->usb_ep_out, cmdbuf,
+			     cmdcount, MCEUSB_OUTBOUND);
+
+	/*
+	 * The lircd gap calculation expects the write function to
+	 * wait the time it takes for the ircommand to be sent before
+	 * it returns.
+	 */
+	do_gettimeofday(&end_time);
+	signal_duration -= (end_time.tv_usec - start_time.tv_usec) +
+			   (end_time.tv_sec - start_time.tv_sec) * 1000000;
+
+	/* delay with the closest number of ticks */
+	set_current_state(TASK_INTERRUPTIBLE);
+	schedule_timeout(usecs_to_jiffies(signal_duration));
+
+	return n;
+}
+
+static void set_transmitter_mask(struct mceusb_dev *ir, unsigned int mask)
+{
+	if (ir->flags.transmitter_mask_inverted)
+		/*
+		 * The mask begins at 0x02 and has an inverted
+		 * numbering scheme
+		 */
+		ir->transmitter_mask =
+			(mask != 0x03 ? mask ^ 0x03 : mask) << 1;
+	else
+		ir->transmitter_mask = mask;
+}
+
+
+/* Sets the send carrier frequency */
+static int set_send_carrier(struct mceusb_dev *ir, int carrier)
+{
+	int clk = 10000000;
+	int prescaler = 0, divisor = 0;
+	unsigned char cmdbuf[] = { 0x9F, 0x06, 0x01, 0x80 };
+
+	/* Carrier is changed */
+	if (ir->carrier_freq != carrier) {
+
+		if (carrier <= 0) {
+			ir->carrier_freq = carrier;
+			dprintk(DRIVER_NAME "[%d]: SET_CARRIER disabling "
+				"carrier modulation\n", ir->devnum);
+			request_packet_async(ir, ir->usb_ep_out,
+					     cmdbuf, sizeof(cmdbuf),
+					     MCEUSB_OUTBOUND);
+			return carrier;
+		}
+
+		for (prescaler = 0; prescaler < 4; ++prescaler) {
+			divisor = (clk >> (2 * prescaler)) / carrier;
+			if (divisor <= 0xFF) {
+				ir->carrier_freq = carrier;
+				cmdbuf[2] = prescaler;
+				cmdbuf[3] = divisor;
+				dprintk(DRIVER_NAME "[%d]: SET_CARRIER "
+					"requesting %d Hz\n",
+					ir->devnum, carrier);
+
+				/* Transmit new carrier to mce device */
+				request_packet_async(ir, ir->usb_ep_out,
+						     cmdbuf, sizeof(cmdbuf),
+						     MCEUSB_OUTBOUND);
+				return carrier;
+			}
+		}
+
+		return -EINVAL;
+
+	}
+
+	return carrier;
+}
+
+
+static int mceusb_lirc_ioctl(struct inode *node, struct file *filep,
+			     unsigned int cmd, unsigned long arg)
+{
+	int result;
+	unsigned int ivalue;
+	unsigned long lvalue;
+	struct mceusb_dev *ir = NULL;
+
+	/* Retrieve lirc_driver data for the device */
+	ir = lirc_get_pdata(filep);
+	if (!ir || !ir->usb_ep_out)
+		return -EFAULT;
+
+
+	switch (cmd) {
+	case LIRC_SET_TRANSMITTER_MASK:
+
+		result = get_user(ivalue, (unsigned int *) arg);
+		if (result)
+			return result;
+		switch (ivalue) {
+		case 0x01: /* Transmitter 1     => 0x04 */
+		case 0x02: /* Transmitter 2     => 0x02 */
+		case 0x03: /* Transmitter 1 & 2 => 0x06 */
+			set_transmitter_mask(ir, ivalue);
+			break;
+
+		default: /* Unsupported transmitter mask */
+			return MCE_MAX_CHANNELS;
+		}
+
+		dprintk(DRIVER_NAME ": SET_TRANSMITTERS mask=%d\n", ivalue);
+		break;
+
+	case LIRC_GET_SEND_MODE:
+
+		result = put_user(LIRC_SEND2MODE(LIRC_CAN_SEND_PULSE &
+						 LIRC_CAN_SEND_MASK),
+				  (unsigned long *) arg);
+
+		if (result)
+			return result;
+		break;
+
+	case LIRC_SET_SEND_MODE:
+
+		result = get_user(lvalue, (unsigned long *) arg);
+
+		if (result)
+			return result;
+		if (lvalue != (LIRC_MODE_PULSE&LIRC_CAN_SEND_MASK))
+			return -EINVAL;
+		break;
+
+	case LIRC_SET_SEND_CARRIER:
+
+		result = get_user(ivalue, (unsigned int *) arg);
+		if (result)
+			return result;
+
+		set_send_carrier(ir, ivalue);
+		break;
+
+	default:
+		return -ENOIOCTLCMD;
+	}
+
+	return 0;
+}
+
+static struct file_operations lirc_fops = {
+	.owner	= THIS_MODULE,
+	.write	= mceusb_transmit_ir,
+	.ioctl	= mceusb_lirc_ioctl,
+};
+
+static int mceusb_gen1_init(struct mceusb_dev *ir)
+{
+	int i, ret;
+	char junk[64], data[8];
+	int partial = 0;
+
+	/*
+	 * Clear off the first few messages. These look like calibration
+	 * or test data, I can't really tell. This also flushes in case
+	 * we have random ir data queued up.
+	 */
+	for (i = 0; i < 40; i++)
+		usb_bulk_msg(ir->usbdev,
+			usb_rcvbulkpipe(ir->usbdev,
+				ir->usb_ep_in->bEndpointAddress),
+			junk, 64, &partial, HZ * 10);
+
+	ir->is_pulse = 1;
+
+	memset(data, 0, 8);
+
+	/* Get Status */
+	ret = usb_control_msg(ir->usbdev, usb_rcvctrlpipe(ir->usbdev, 0),
+			      USB_REQ_GET_STATUS, USB_DIR_IN,
+			      0, 0, data, 2, HZ * 3);
+
+	/*    ret = usb_get_status( ir->usbdev, 0, 0, data ); */
+	dprintk("%s - ret = %d status = 0x%x 0x%x\n", __func__,
+		ret, data[0], data[1]);
+
+	/*
+	 * This is a strange one. They issue a set address to the device
+	 * on the receive control pipe and expect a certain value pair back
+	 */
+	memset(data, 0, 8);
+
+	ret = usb_control_msg(ir->usbdev, usb_rcvctrlpipe(ir->usbdev, 0),
+			      USB_REQ_SET_ADDRESS, USB_TYPE_VENDOR, 0, 0,
+			      data, 2, HZ * 3);
+	dprintk("%s - ret = %d, devnum = %d\n",
+		__func__, ret, ir->usbdev->devnum);
+	dprintk("%s - data[0] = %d, data[1] = %d\n",
+		__func__, data[0], data[1]);
+
+	/* set feature */
+	ret = usb_control_msg(ir->usbdev, usb_sndctrlpipe(ir->usbdev, 0),
+			      USB_REQ_SET_FEATURE, USB_TYPE_VENDOR,
+			      0xc04e, 0x0000, NULL, 0, HZ * 3);
+
+	dprintk("%s - ret = %d\n", __func__, ret);
+
+	/* strange: bRequest == 4 */
+	ret = usb_control_msg(ir->usbdev, usb_sndctrlpipe(ir->usbdev, 0),
+			      4, USB_TYPE_VENDOR,
+			      0x0808, 0x0000, NULL, 0, HZ * 3);
+	dprintk("%s - retB = %d\n", __func__, ret);
+
+	/* strange: bRequest == 2 */
+	ret = usb_control_msg(ir->usbdev, usb_sndctrlpipe(ir->usbdev, 0),
+			      2, USB_TYPE_VENDOR,
+			      0x0000, 0x0100, NULL, 0, HZ * 3);
+	dprintk("%s - retC = %d\n", __func__, ret);
+
+	return ret;
+
+};
+
+static int mceusb_dev_probe(struct usb_interface *intf,
+				const struct usb_device_id *id)
+{
+	struct usb_device *dev = interface_to_usbdev(intf);
+	struct usb_host_interface *idesc;
+	struct usb_endpoint_descriptor *ep = NULL;
+	struct usb_endpoint_descriptor *ep_in = NULL;
+	struct usb_endpoint_descriptor *ep_out = NULL;
+	struct usb_host_config *config;
+	struct mceusb_dev *ir = NULL;
+	struct lirc_driver *driver = NULL;
+	struct lirc_buffer *rbuf = NULL;
+	int devnum, pipe, maxp;
+	int minor = 0;
+	int i;
+	char buf[63], name[128] = "";
+	int mem_failure = 0;
+	int is_pinnacle;
+	int is_microsoft_gen1;
+
+	dprintk(DRIVER_NAME ": %s called\n", __func__);
+
+	usb_reset_device(dev);
+
+	config = dev->actconfig;
+
+	idesc = intf->cur_altsetting;
+
+	is_pinnacle = usb_match_id(intf, pinnacle_list) ? 1 : 0;
+
+	is_microsoft_gen1 = usb_match_id(intf, microsoft_gen1_list) ? 1 : 0;
+
+	/* step through the endpoints to find first bulk in and out endpoint */
+	for (i = 0; i < idesc->desc.bNumEndpoints; ++i) {
+		ep = &idesc->endpoint[i].desc;
+
+		if ((ep_in == NULL)
+			&& ((ep->bEndpointAddress & USB_ENDPOINT_DIR_MASK)
+			    == USB_DIR_IN)
+			&& (((ep->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK)
+			    == USB_ENDPOINT_XFER_BULK)
+			|| ((ep->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK)
+			    == USB_ENDPOINT_XFER_INT))) {
+
+			dprintk(DRIVER_NAME ": acceptable inbound endpoint "
+				"found\n");
+			ep_in = ep;
+			ep_in->bmAttributes = USB_ENDPOINT_XFER_INT;
+			if (is_pinnacle)
+				/*
+				 * setting seems to 1 seem to cause issues with
+				 * Pinnacle timing out on transfer.
+				 */
+				ep_in->bInterval = ep->bInterval;
+			else
+				ep_in->bInterval = 1;
+		}
+
+		if ((ep_out == NULL)
+			&& ((ep->bEndpointAddress & USB_ENDPOINT_DIR_MASK)
+			    == USB_DIR_OUT)
+			&& (((ep->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK)
+			    == USB_ENDPOINT_XFER_BULK)
+			|| ((ep->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK)
+			    == USB_ENDPOINT_XFER_INT))) {
+
+			dprintk(DRIVER_NAME ": acceptable outbound endpoint "
+				"found\n");
+			ep_out = ep;
+			ep_out->bmAttributes = USB_ENDPOINT_XFER_INT;
+			if (is_pinnacle)
+				/*
+				 * setting seems to 1 seem to cause issues with
+				 * Pinnacle timing out on transfer.
+				 */
+				ep_out->bInterval = ep->bInterval;
+			else
+				ep_out->bInterval = 1;
+		}
+	}
+	if (ep_in == NULL || ep_out == NULL) {
+		dprintk(DRIVER_NAME ": inbound and/or "
+			"outbound endpoint not found\n");
+		return -ENODEV;
+	}
+
+	devnum = dev->devnum;
+	pipe = usb_rcvintpipe(dev, ep_in->bEndpointAddress);
+	maxp = usb_maxpacket(dev, pipe, usb_pipeout(pipe));
+
+	mem_failure = 0;
+	ir = kzalloc(sizeof(struct mceusb_dev), GFP_KERNEL);
+	if (!ir) {
+		mem_failure = 1;
+		goto mem_failure_switch;
+	}
+
+	driver = kzalloc(sizeof(struct lirc_driver), GFP_KERNEL);
+	if (!driver) {
+		mem_failure = 2;
+		goto mem_failure_switch;
+	}
+
+	rbuf = kmalloc(sizeof(struct lirc_buffer), GFP_KERNEL);
+	if (!rbuf) {
+		mem_failure = 3;
+		goto mem_failure_switch;
+	}
+
+	if (lirc_buffer_init(rbuf, sizeof(lirc_t), LIRCBUF_SIZE)) {
+		mem_failure = 4;
+		goto mem_failure_switch;
+	}
+
+	ir->buf_in = usb_buffer_alloc(dev, maxp, GFP_ATOMIC, &ir->dma_in);
+	if (!ir->buf_in) {
+		mem_failure = 5;
+		goto mem_failure_switch;
+	}
+
+	ir->urb_in = usb_alloc_urb(0, GFP_KERNEL);
+	if (!ir->urb_in) {
+		mem_failure = 7;
+		goto mem_failure_switch;
+	}
+
+	strcpy(driver->name, DRIVER_NAME " ");
+	driver->minor = -1;
+	driver->features = LIRC_CAN_SEND_PULSE |
+		LIRC_CAN_SET_TRANSMITTER_MASK |
+		LIRC_CAN_REC_MODE2 |
+		LIRC_CAN_SET_SEND_CARRIER;
+	driver->data = ir;
+	driver->rbuf = rbuf;
+	driver->set_use_inc = &mceusb_ir_open;
+	driver->set_use_dec = &mceusb_ir_close;
+	driver->code_length = sizeof(lirc_t) * 8;
+	driver->fops  = &lirc_fops;
+	driver->dev   = &intf->dev;
+	driver->owner = THIS_MODULE;
+
+	mutex_init(&ir->lock);
+	init_waitqueue_head(&ir->wait_out);
+
+	minor = lirc_register_driver(driver);
+	if (minor < 0)
+		mem_failure = 9;
+
+mem_failure_switch:
+
+	switch (mem_failure) {
+	case 9:
+		usb_free_urb(ir->urb_in);
+	case 7:
+		usb_buffer_free(dev, maxp, ir->buf_in, ir->dma_in);
+	case 5:
+		lirc_buffer_free(rbuf);
+	case 4:
+		kfree(rbuf);
+	case 3:
+		kfree(driver);
+	case 2:
+		kfree(ir);
+	case 1:
+		printk(DRIVER_NAME "[%d]: out of memory (code=%d)\n",
+			devnum, mem_failure);
+		return -ENOMEM;
+	}
+
+	driver->minor = minor;
+	ir->d = driver;
+	ir->devnum = devnum;
+	ir->usbdev = dev;
+	ir->len_in = maxp;
+	ir->overflow_len = 0;
+	ir->flags.connected = 0;
+	ir->flags.pinnacle = is_pinnacle;
+	ir->flags.microsoft_gen1 = is_microsoft_gen1;
+	ir->flags.transmitter_mask_inverted =
+		usb_match_id(intf, transmitter_mask_list) ? 0 : 1;
+
+	ir->lircdata = PULSE_MASK;
+	ir->is_pulse = 0;
+
+	/* ir->flags.transmitter_mask_inverted must be set */
+	set_transmitter_mask(ir, MCE_DEFAULT_TX_MASK);
+	/* Saving usb interface data for use by the transmitter routine */
+	ir->usb_ep_in = ep_in;
+	ir->usb_ep_out = ep_out;
+
+	if (dev->descriptor.iManufacturer
+	    && usb_string(dev, dev->descriptor.iManufacturer,
+			  buf, sizeof(buf)) > 0)
+		strlcpy(name, buf, sizeof(name));
+	if (dev->descriptor.iProduct
+	    && usb_string(dev, dev->descriptor.iProduct,
+			  buf, sizeof(buf)) > 0)
+		snprintf(name + strlen(name), sizeof(name) - strlen(name),
+			 " %s", buf);
+	printk(DRIVER_NAME "[%d]: %s on usb%d:%d\n", devnum, name,
+	       dev->bus->busnum, devnum);
+
+	/* inbound data */
+	usb_fill_int_urb(ir->urb_in, dev, pipe, ir->buf_in,
+		maxp, (usb_complete_t) mceusb_dev_recv, ir, ep_in->bInterval);
+	ir->urb_in->transfer_dma = ir->dma_in;
+	ir->urb_in->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;
+
+	/* initialize device */
+	if (ir->flags.pinnacle) {
+		int usbret;
+
+		/*
+		 * I have no idea why but this reset seems to be crucial to
+		 * getting the device to do outbound IO correctly - without
+		 * this the device seems to hang, ignoring all input - although
+		 * IR signals are correctly sent from the device, no input is
+		 * interpreted by the device and the host never does the
+		 * completion routine
+		 */
+
+		usbret = usb_reset_configuration(dev);
+		printk(DRIVER_NAME "[%d]: usb reset config ret %x\n",
+		       devnum, usbret);
+
+		/*
+		 * its possible we really should wait for a return
+		 * for each of these...
+		 */
+		request_packet_async(ir, ep_in, NULL, maxp, MCEUSB_INBOUND);
+		request_packet_async(ir, ep_out, pin_init1, sizeof(pin_init1),
+				     MCEUSB_OUTBOUND);
+		request_packet_async(ir, ep_in, NULL, maxp, MCEUSB_INBOUND);
+		request_packet_async(ir, ep_out, pin_init2, sizeof(pin_init2),
+				     MCEUSB_OUTBOUND);
+		request_packet_async(ir, ep_in, NULL, maxp, MCEUSB_INBOUND);
+		request_packet_async(ir, ep_out, pin_init3, sizeof(pin_init3),
+				     MCEUSB_OUTBOUND);
+	} else if (ir->flags.microsoft_gen1) {
+		/* original ms mce device requires some additional setup */
+		mceusb_gen1_init(ir);
+	} else {
+
+		request_packet_async(ir, ep_in, NULL, maxp, MCEUSB_INBOUND);
+		request_packet_async(ir, ep_in, NULL, maxp, MCEUSB_INBOUND);
+		request_packet_async(ir, ep_out, init1,
+				     sizeof(init1), MCEUSB_OUTBOUND);
+		request_packet_async(ir, ep_in, NULL, maxp, MCEUSB_INBOUND);
+		request_packet_async(ir, ep_out, init2,
+				     sizeof(init2), MCEUSB_OUTBOUND);
+	}
+
+	/*
+	 * if we don't issue the correct number of receives (MCEUSB_INBOUND)
+	 * for each outbound, then the first few ir pulses will be interpreted
+	 * by the usb_async_callback routine - we should ensure we have the
+	 * right amount OR less - as the meusb_dev_recv routine will handle
+	 * the control packets OK - they start with 0x9f - but the async
+	 * callback doesn't handle ir pulse packets
+	 */
+	request_packet_async(ir, ep_in, NULL, maxp, 0);
+
+	usb_set_intfdata(intf, ir);
+
+	return 0;
+}
+
+
+static void mceusb_dev_disconnect(struct usb_interface *intf)
+{
+	struct usb_device *dev = interface_to_usbdev(intf);
+	struct mceusb_dev *ir = usb_get_intfdata(intf);
+
+	usb_set_intfdata(intf, NULL);
+
+	if (!ir || !ir->d)
+		return;
+
+	ir->usbdev = NULL;
+	wake_up_all(&ir->wait_out);
+
+	mutex_lock(&ir->lock);
+	usb_kill_urb(ir->urb_in);
+	usb_free_urb(ir->urb_in);
+	usb_buffer_free(dev, ir->len_in, ir->buf_in, ir->dma_in);
+	mutex_unlock(&ir->lock);
+
+	unregister_from_lirc(ir);
+}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 0)
+static int mceusb_dev_suspend(struct usb_interface *intf, pm_message_t message)
+{
+	struct mceusb_dev *ir = usb_get_intfdata(intf);
+	printk(DRIVER_NAME "[%d]: suspend\n", ir->devnum);
+	usb_kill_urb(ir->urb_in);
+	return 0;
+}
+
+static int mceusb_dev_resume(struct usb_interface *intf)
+{
+	struct mceusb_dev *ir = usb_get_intfdata(intf);
+	printk(DRIVER_NAME "[%d]: resume\n", ir->devnum);
+	if (usb_submit_urb(ir->urb_in, GFP_ATOMIC))
+		return -EIO;
+	return 0;
+}
+#endif
+
+static struct usb_driver mceusb_dev_driver = {
+	LIRC_THIS_MODULE(.owner = THIS_MODULE)
+	.name =		DRIVER_NAME,
+	.probe =	mceusb_dev_probe,
+	.disconnect =	mceusb_dev_disconnect,
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 0)
+	.suspend =	mceusb_dev_suspend,
+	.resume =	mceusb_dev_resume,
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 23)
+	.reset_resume =	mceusb_dev_resume,
+#endif
+#endif
+	.id_table =	mceusb_dev_table
+};
+
+static int __init mceusb_dev_init(void)
+{
+	int i;
+
+	printk(KERN_INFO DRIVER_NAME ": " DRIVER_DESC " " DRIVER_VERSION "\n");
+	printk(KERN_INFO DRIVER_NAME ": " DRIVER_AUTHOR "\n");
+	dprintk(DRIVER_NAME ": debug mode enabled\n");
+
+	i = usb_register(&mceusb_dev_driver);
+	if (i < 0) {
+		printk(DRIVER_NAME ": usb register failed, result = %d\n", i);
+		return -ENODEV;
+	}
+
+	return 0;
+}
+
+static void __exit mceusb_dev_exit(void)
+{
+	usb_deregister(&mceusb_dev_driver);
+}
+
+module_init(mceusb_dev_init);
+module_exit(mceusb_dev_exit);
+
+MODULE_DESCRIPTION(DRIVER_DESC);
+MODULE_AUTHOR(DRIVER_AUTHOR);
+MODULE_LICENSE("GPL");
+MODULE_DEVICE_TABLE(usb, mceusb_dev_table);
+/* this was originally lirc_mceusb2, lirc_mceusb and lirc_mceusb2 merged now */
+MODULE_ALIAS("lirc_mceusb2");
+
+module_param(debug, bool, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(debug, "Debug enabled or not");
+
+EXPORT_NO_SYMBOLS;
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_mceusb/Makefile
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_mceusb/Makefile
@@ -0,0 +1,3 @@
+EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)/..
+
+obj-$(CONFIG_LIRC_MCEUSB)	+= lirc_mceusb.o
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_atiusb/lirc_atiusb.c
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_atiusb/lirc_atiusb.c
@@ -0,0 +1,1452 @@
+/*
+ * lirc_atiusb - USB remote support for LIRC
+ * (currently only supports X10 USB remotes)
+ * (supports ATI Remote Wonder and ATI Remote Wonder II, too)
+ *
+ * Copyright (C) 2003-2004 Paul Miller <pmiller9@users.sourceforge.net>
+ *
+ * This driver was derived from:
+ *   Vladimir Dergachev <volodya@minspring.com>'s 2002
+ *      "USB ATI Remote support" (input device)
+ *   Adrian Dewhurst <sailor-lk@sailorfrag.net>'s 2002
+ *      "USB StreamZap remote driver" (LIRC)
+ *   Artur Lipowski <alipowski@kki.net.pl>'s 2002
+ *      "lirc_dev" and "lirc_gpio" LIRC modules
+ *   Michael Wojciechowski
+ *      initial xbox support
+ *   Vassilis Virvilis <vasvir@iit.demokritos.gr> 2006
+ *      reworked the patch for lirc submission
+ *
+ * $Id: lirc_atiusb.c,v 1.85 2009/03/11 00:21:46 jarodwilson Exp $
+ */
+
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <linux/version.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 4, 0)
+#error "*******************************************************"
+#error "Sorry, this driver needs kernel version 2.4.0 or higher"
+#error "*******************************************************"
+#endif
+
+#include <linux/autoconf.h>
+
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/module.h>
+#include <linux/kmod.h>
+#include <linux/smp_lock.h>
+#include <linux/completion.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18)
+#include <asm/uaccess.h>
+#else
+#include <linux/uaccess.h>
+#endif
+#include <linux/usb.h>
+#include <linux/poll.h>
+#include <linux/wait.h>
+#include <linux/list.h>
+
+#include "../lirc.h"
+#include "../kcompat.h"
+#include "../lirc_dev/lirc_dev.h"
+
+#define DRIVER_VERSION		"$Revision: 1.85 $"
+#define DRIVER_AUTHOR		"Paul Miller <pmiller9@users.sourceforge.net>"
+#define DRIVER_DESC		"USB remote driver for LIRC"
+#define DRIVER_NAME		"lirc_atiusb"
+
+#define CODE_LENGTH		(code_length[ir->remote_type])
+#define CODE_MIN_LENGTH		(code_min_length[ir->remote_type])
+#define DECODE_LENGTH		(decode_length[ir->remote_type])
+
+#define RW2_MODENAV_KEYCODE	0x3F
+#define RW2_NULL_MODE		0xFF
+/* Fake (virtual) keycode indicating compass mouse usage */
+#define RW2_MOUSE_KEYCODE	0xFF
+#define RW2_PRESSRELEASE_KEYCODE	0xFE
+
+#define RW2_PRESS_CODE		1
+#define RW2_HOLD_CODE		2
+#define RW2_RELEASE_CODE	0
+
+/* module parameters */
+#ifdef CONFIG_USB_DEBUG
+static int debug = 1;
+#else
+static int debug;
+#endif
+#define dprintk(fmt, args...)					\
+	do {							\
+		if (debug)					\
+			printk(KERN_DEBUG fmt, ## args);	\
+	} while (0)
+
+/* ATI, ATI2, XBOX */
+static const int code_length[] = {5, 3, 6};
+static const int code_min_length[] = {3, 3, 6};
+static const int decode_length[] = {5, 3, 1};
+/*
+ * USB_BUFF_LEN must be the maximum value of the code_length array.
+ * It is used for static arrays.
+ */
+#define USB_BUFF_LEN 6
+
+static int mask = 0xFFFF;	/* channel acceptance bit mask */
+static int unique;		/* enable channel-specific codes */
+static int repeat = 10;		/* repeat time in 1/100 sec */
+static int emit_updown;		/* send separate press/release codes (rw2) */
+static int emit_modekeys;	/* send keycodes for aux1-4, pc, mouse (rw2) */
+static unsigned long repeat_jiffies; /* repeat timeout */
+static int mdeadzone;		/* mouse sensitivity >= 0 */
+static int mgradient = 375;	/* 1000*gradient from cardinal direction */
+
+/* get hi and low bytes of a 16-bits int */
+#define HI(a)			((unsigned char)((a) >> 8))
+#define LO(a)			((unsigned char)((a) & 0xff))
+
+/* general constants */
+#define SEND_FLAG_IN_PROGRESS	1
+#define SEND_FLAG_COMPLETE	2
+#define FREE_ALL		0xFF
+
+/* endpoints */
+#define EP_KEYS			0
+#define EP_MOUSE		1
+#define EP_MOUSE_ADDR		0x81
+#define EP_KEYS_ADDR		0x82
+
+#define VENDOR_ATI1		0x0bc7
+#define VENDOR_ATI2		0x0471
+#define VENDOR_MS1		0x040b
+#define VENDOR_MS2		0x045e
+#define VENDOR_MS3		0xFFFF
+
+static struct usb_device_id usb_remote_table[] = {
+	/* X10 USB Firecracker Interface */
+	{ USB_DEVICE(VENDOR_ATI1, 0x0002) },
+
+	/* X10 VGA Video Sender */
+	{ USB_DEVICE(VENDOR_ATI1, 0x0003) },
+
+	/* ATI Wireless Remote Receiver */
+	{ USB_DEVICE(VENDOR_ATI1, 0x0004) },
+
+	/* NVIDIA Wireless Remote Receiver */
+	{ USB_DEVICE(VENDOR_ATI1, 0x0005) },
+
+	/* ATI Wireless Remote Receiver */
+	{ USB_DEVICE(VENDOR_ATI1, 0x0006) },
+
+	/* X10 USB Wireless Transceivers */
+	{ USB_DEVICE(VENDOR_ATI1, 0x0007) },
+	{ USB_DEVICE(VENDOR_ATI1, 0x0008) },
+	{ USB_DEVICE(VENDOR_ATI1, 0x0009) },
+	{ USB_DEVICE(VENDOR_ATI1, 0x000A) },
+	{ USB_DEVICE(VENDOR_ATI1, 0x000B) },
+	{ USB_DEVICE(VENDOR_ATI1, 0x000C) },
+	{ USB_DEVICE(VENDOR_ATI1, 0x000D) },
+	{ USB_DEVICE(VENDOR_ATI1, 0x000E) },
+	{ USB_DEVICE(VENDOR_ATI1, 0x000F) },
+
+	/* ATI Remote Wonder 2: Input Device */
+	{ USB_DEVICE(VENDOR_ATI2, 0x0602) },
+
+	/* ATI Remote Wonder 2: Controller (???) */
+	{ USB_DEVICE(VENDOR_ATI2, 0x0603) },
+
+	/* Gamester Xbox DVD Movie Playback Kit IR */
+	{ USB_DEVICE(VENDOR_MS1, 0x6521) },
+
+	/* Microsoft Xbox DVD Movie Playback Kit IR */
+	{ USB_DEVICE(VENDOR_MS2, 0x0284) },
+
+	/*
+	 * Some Chinese manufacturer -- conflicts with the joystick from the
+	 * same manufacturer
+	 */
+	{ USB_DEVICE(VENDOR_MS3, 0xFFFF) },
+
+	/* Terminating entry */
+	{ }
+};
+
+
+/* init strings */
+#define USB_OUTLEN		7
+
+static char init1[] = {0x01, 0x00, 0x20, 0x14};
+static char init2[] = {0x01, 0x00, 0x20, 0x14, 0x20, 0x20, 0x20};
+
+struct in_endpt {
+	/* inner link in list of endpoints for the remote specified by ir */
+	struct list_head iep_list_link;
+	struct atirf_dev *ir;
+	struct urb *urb;
+	struct usb_endpoint_descriptor *ep;
+	int type;
+
+	/* buffers and dma */
+	unsigned char *buf;
+	unsigned int len;
+#ifdef KERNEL_2_5
+	dma_addr_t dma;
+#endif
+
+	/* handle repeats */
+	unsigned char old[USB_BUFF_LEN];
+	unsigned long old_jiffies;
+};
+
+struct out_endpt {
+	struct atirf_dev *ir;
+	struct urb *urb;
+	struct usb_endpoint_descriptor *ep;
+
+	/* buffers and dma */
+	unsigned char *buf;
+#ifdef KERNEL_2_5
+	dma_addr_t dma;
+#endif
+
+	/* handle sending (init strings) */
+	int send_flags;
+	wait_queue_head_t wait;
+};
+
+
+/* data structure for each usb remote */
+struct atirf_dev {
+	/* inner link in list of all remotes managed by this module */
+	struct list_head remote_list_link;
+	/* Number of usb interfaces associated with this device */
+	int dev_refcount;
+
+	/* usb */
+	struct usb_device *usbdev;
+	/* Head link to list of all inbound endpoints in this remote */
+	struct list_head iep_listhead;
+	struct out_endpt *out_init;
+	int devnum;
+
+	/* remote type based on usb_device_id tables */
+	enum {
+		ATI1_COMPATIBLE,
+		ATI2_COMPATIBLE,
+		XBOX_COMPATIBLE
+	} remote_type;
+
+	/* rw2 current mode (mirrors the state of the remote) */
+	int mode;
+
+	/* lirc */
+	struct lirc_driver *d;
+	int connected;
+
+	/* locking */
+	struct mutex lock;
+};
+
+/* list of all registered devices via the remote_list_link in atirf_dev */
+static struct list_head remote_list;
+
+/*
+ * Convenience macros to retrieve a pointer to the surrounding struct from
+ * the given list_head reference within, pointed at by link.
+ */
+#define get_iep_from_link(link) \
+		list_entry((link), struct in_endpt, iep_list_link);
+#define get_irctl_from_link(link) \
+		list_entry((link), struct atirf_dev, remote_list_link);
+
+/* send packet - used to initialize remote */
+static void send_packet(struct out_endpt *oep, u16 cmd, unsigned char *data)
+{
+	struct atirf_dev *ir = oep->ir;
+	DECLARE_WAITQUEUE(wait, current);
+	int timeout = HZ; /* 1 second */
+	unsigned char buf[USB_OUTLEN];
+
+	dprintk(DRIVER_NAME "[%d]: send called (%#x)\n", ir->devnum, cmd);
+
+	mutex_lock(&ir->lock);
+	oep->urb->transfer_buffer_length = LO(cmd) + 1;
+	oep->urb->dev = oep->ir->usbdev;
+	oep->send_flags = SEND_FLAG_IN_PROGRESS;
+
+	memcpy(buf+1, data, LO(cmd));
+	buf[0] = HI(cmd);
+	memcpy(oep->buf, buf, LO(cmd)+1);
+
+	set_current_state(TASK_INTERRUPTIBLE);
+	add_wait_queue(&oep->wait, &wait);
+
+#ifdef KERNEL_2_5
+	if (usb_submit_urb(oep->urb, GFP_ATOMIC)) {
+#else
+	if (usb_submit_urb(oep->urb)) {
+#endif
+		set_current_state(TASK_RUNNING);
+		remove_wait_queue(&oep->wait, &wait);
+		mutex_unlock(&ir->lock);
+		return;
+	}
+	mutex_unlock(&ir->lock);
+
+	while (timeout && (oep->urb->status == -EINPROGRESS)
+	       && !(oep->send_flags & SEND_FLAG_COMPLETE)) {
+		timeout = schedule_timeout(timeout);
+		rmb();
+	}
+
+	dprintk(DRIVER_NAME "[%d]: send complete (%#x)\n", ir->devnum, cmd);
+
+	set_current_state(TASK_RUNNING);
+	remove_wait_queue(&oep->wait, &wait);
+#ifdef KERNEL_2_5
+	oep->urb->transfer_flags |= URB_ASYNC_UNLINK;
+#endif
+	usb_unlink_urb(oep->urb);
+}
+
+static int unregister_from_lirc(struct atirf_dev *ir)
+{
+	struct lirc_driver *d = ir->d;
+	int devnum;
+
+	devnum = ir->devnum;
+	dprintk(DRIVER_NAME "[%d]: unregister from lirc called\n", devnum);
+
+	lirc_unregister_driver(d->minor);
+
+	printk(DRIVER_NAME "[%d]: usb remote disconnected\n", devnum);
+	return 0;
+}
+
+
+static int set_use_inc(void *data)
+{
+	struct atirf_dev *ir = data;
+	struct list_head *pos, *n;
+	struct in_endpt *iep;
+	int rtn;
+
+	if (!ir) {
+		printk(DRIVER_NAME "[?]: set_use_inc called with no context\n");
+		return -EIO;
+	}
+	dprintk(DRIVER_NAME "[%d]: set use inc\n", ir->devnum);
+
+	MOD_INC_USE_COUNT;
+
+	mutex_lock(&ir->lock);
+	if (!ir->connected) {
+		if (!ir->usbdev) {
+			mutex_unlock(&ir->lock);
+			dprintk(DRIVER_NAME "[%d]: !ir->usbdev\n", ir->devnum);
+			return -ENOENT;
+		}
+
+		/* Iterate through the inbound endpoints */
+		list_for_each_safe(pos, n, &ir->iep_listhead) {
+			/* extract the current in_endpt */
+			iep = get_iep_from_link(pos);
+			iep->urb->dev = ir->usbdev;
+			dprintk(DRIVER_NAME "[%d]: linking iep 0x%02x (%p)\n",
+				ir->devnum, iep->ep->bEndpointAddress, iep);
+#ifdef KERNEL_2_5
+			rtn = usb_submit_urb(iep->urb, GFP_ATOMIC);
+#else
+			rtn = usb_submit_urb(iep->urb);
+#endif
+			if (rtn) {
+				printk(DRIVER_NAME "[%d]: open result = %d "
+				       "error submitting urb\n",
+				       ir->devnum, rtn);
+				mutex_unlock(&ir->lock);
+				MOD_DEC_USE_COUNT;
+				return -EIO;
+			}
+		}
+		ir->connected = 1;
+	}
+	mutex_unlock(&ir->lock);
+
+	return 0;
+}
+
+static void set_use_dec(void *data)
+{
+	struct atirf_dev *ir = data;
+	struct list_head *pos, *n;
+	struct in_endpt *iep;
+
+	if (!ir) {
+		printk(DRIVER_NAME "[?]: set_use_dec called with no context\n");
+		return;
+	}
+	dprintk(DRIVER_NAME "[%d]: set use dec\n", ir->devnum);
+
+	mutex_lock(&ir->lock);
+	if (ir->connected) {
+		/* Free inbound usb urbs */
+		list_for_each_safe(pos, n, &ir->iep_listhead) {
+			iep = get_iep_from_link(pos);
+			dprintk(DRIVER_NAME "[%d]: unlinking iep 0x%02x (%p)\n",
+				ir->devnum, iep->ep->bEndpointAddress, iep);
+			usb_kill_urb(iep->urb);
+		}
+		ir->connected = 0;
+	}
+	mutex_unlock(&ir->lock);
+	MOD_DEC_USE_COUNT;
+}
+
+static void print_data(struct in_endpt *iep, char *buf, int len)
+{
+	const int clen = code_length[iep->ir->remote_type];
+	char codes[clen * 3 + 1];
+	int i;
+
+	if (len <= 0)
+		return;
+
+	for (i = 0; i < len && i < clen; i++)
+		snprintf(codes+i*3, 4, "%02x ", buf[i] & 0xFF);
+	printk(DRIVER_NAME "[%d]: data received %s (ep=0x%x length=%d)\n",
+		iep->ir->devnum, codes, iep->ep->bEndpointAddress, len);
+}
+
+static int code_check_ati1(struct in_endpt *iep, int len)
+{
+	struct atirf_dev *ir = iep->ir;
+	int i, chan;
+
+	/* ATI RW1: some remotes emit both 4 and 5 byte length codes. */
+	/* ATI RW2: emit 3 byte codes */
+	if (len < CODE_MIN_LENGTH || len > CODE_LENGTH)
+		return -1;
+
+	/* *** channel not tested with 4/5-byte Dutch remotes *** */
+	chan = ((iep->buf[len-1]>>4) & 0x0F);
+
+	/* strip channel code */
+	if (!unique) {
+		iep->buf[len-1] &= 0x0F;
+		iep->buf[len-3] -= (chan<<4);
+	}
+
+	if (!((1U<<chan) & mask)) {
+		dprintk(DRIVER_NAME "[%d]: ignore channel %d\n",
+			ir->devnum, chan+1);
+		return -1;
+	}
+	dprintk(DRIVER_NAME "[%d]: accept channel %d\n", ir->devnum, chan+1);
+
+	if (ir->remote_type == ATI1_COMPATIBLE) {
+		for (i = len; i < CODE_LENGTH; i++)
+			iep->buf[i] = 0;
+		/* check for repeats */
+		if (memcmp(iep->old, iep->buf, len) == 0) {
+			if (iep->old_jiffies + repeat_jiffies > jiffies)
+				return -1;
+		} else
+			memcpy(iep->old, iep->buf, CODE_LENGTH);
+		iep->old_jiffies = jiffies;
+	}
+
+	return 0;
+}
+
+/*
+ * Since the ATI Remote Wonder II has quite a different structure from the
+ * prior version, this function was separated out to clarify the sanitization
+ * process.
+ *
+ * Here is a summary of the main differences:
+ *
+ * a. The rw2 has no sense of a transmission channel.  But, it does have an
+ *    auxiliary mode state, which is set by the mode buttons Aux1 through
+ *    Aux4 and "PC".  These map respectively to 0-4 in the first byte of the
+ *    recv buffer.  Any subsequent button press sends this mode number as its
+ *    "channel code."  Annoyingly enough, the mode setting buttons all send
+ *    the same key code (0x3f), and can only be distinguished via their mode
+ *    byte.
+ *
+ *    Because of this, old-style "unique"-parameter-enabled channel squashing
+ *    kills the functionality of the aux1-aux4 and PC buttons.  However, to
+ *    not do so would cause each remote key to send a different code depending
+ *    on the active aux.  Further complicating matters, using the mouse norb
+ *    also sends an identical code as would pushing the active aux button.  To
+ *    handle this we need a separate parameter, like rw2modes, with the
+ *    following values and meanings:
+ *
+ *	0: Don't squash any channel info
+ *	1: Only squash channel data for non-mode setting keys
+ *	2: Ignore aux keypresses, but don't squash channel
+ *	3: Ignore aux keypresses and squash channel data
+ *
+ *    Option 1 may seem useless since the mouse sends the same code, but one
+ *    need only ignore in userspace any press of a mode-setting code that only
+ *    reaffirms the current mode.  The 3rd party lirccd should be able to
+ *    handle this easily enough, but lircd doesn't keep the state necessary
+ *    for this.  TODO We could work around this in the driver by emitting a
+ *    single 02 (press) code for a mode key only if that mode is not currently
+ *    active.
+ *
+ *    Option 2 would be useful for those wanting super configurability,
+ *    offering the ability to program 5 times the number actions based on the
+ *    current mode.
+ *
+ * b. The rw2 has its own built in repeat handling; the keys endpoint
+ *    encodes this in the second byte as 1 for press, 2 for hold, and 0 for
+ *    release.  This is generally much more responsive than lirc's built-in
+ *    timeout handling.
+ *
+ *    The problem is that the remote can send the release-receive pair
+ *    (0,1) while one is still holding down the same button if the
+ *    transmission is momentarily interrupted.  (It seems that the receiver
+ *    manages this count instead of the remote.)  By default, this information
+ *    is squashed to 2.
+ *
+ *    In order to expose the built-in repeat code, set the emit_updown
+ *    parameter as described below.
+ *
+ * c. The mouse norb is much more sensitive than on the rw1.  It emulates
+ *    a joystick-like controller with the second byte representing the x-axis
+ *    and the third, the y-axis.  Treated as signed integers, these axes range
+ *    approximately as follows:
+ *
+ *	x: (left) -46 ... 46 (right) (0xd2..0x2e)
+ *	y: (up)   -46 ... 46 (down)  (0xd2..0x2e)
+ *
+ *    NB these values do not correspond to the pressure with which the mouse
+ *    norb is pushed in a given direction, but rather seems to indicate the
+ *    duration for which a given direction is held.
+ *
+ *    These are normalized to 8 cardinal directions for easy configuration via
+ *    lircd.conf.  The normalization can be fined tuned with the mdeadzone and
+ *    mgradient parameters as described below.
+ *
+ * d. The interrupt rate of the mouse vs. the normal keys is different.
+ *
+ *	mouse: ~27Hz (37ms between interrupts)
+ *	keys:  ~10Hz (100ms between interrupts)
+ *
+ *    This means that the normal gap mechanism for lircd won't work as
+ *    expected; is emit_updown>0 if you can get away with it.
+ */
+static int code_check_ati2(struct in_endpt *iep, int len)
+{
+	struct atirf_dev *ir = iep->ir;
+	int mode, i;
+	char *buf = iep->buf;
+
+	if (len != CODE_LENGTH) {
+		dprintk(DRIVER_NAME
+			"[%d]: Huh?  Abnormal length (%d) buffer received.\n",
+			ir->devnum, len);
+		return -1;
+	}
+	for (i = len; i < CODE_LENGTH; i++)
+		iep->buf[i] = 0;
+
+	mode = buf[0];
+
+	/* Squash the mode indicator if unique wasn't set non-zero */
+	if (!unique)
+		buf[0] = 0;
+
+	if (iep->ep->bEndpointAddress == EP_KEYS_ADDR) {
+		/* ignore mouse nav indicator key and mode-set (aux) keys */
+		if (buf[2] == RW2_MODENAV_KEYCODE) {
+			if (emit_modekeys >= 2) /* emit raw */
+				buf[0] = mode;
+			else if (emit_modekeys == 1) {
+				/* translate */
+				buf[0] = mode;
+				if (ir->mode != mode) {
+					buf[1] = 0x03;
+					ir->mode = mode;
+					return 0;
+				}
+			} else {
+				dprintk(DRIVER_NAME
+					"[%d]: ignore dummy code 0x%x "
+					"(ep=0x%x)\n", ir->devnum,
+					buf[2], iep->ep->bEndpointAddress);
+				return -1;
+			}
+		}
+
+		if (buf[1] != 2) {
+			/* handle press/release codes */
+			if (emit_updown == 0) /* ignore */
+				return -1;
+			else if (emit_updown == 1) /* normalize keycode */
+				 buf[2] = RW2_PRESSRELEASE_KEYCODE;
+			/* else emit raw */
+		}
+
+	} else {
+		int x = (signed char)buf[1];
+		int y = (signed char)buf[2];
+		int code = 0x00;
+		int dir_ew, dir_ns;
+
+		buf[2] = RW2_MOUSE_KEYCODE;
+
+		/* sensitivity threshold (use L2norm^2) */
+		if (mdeadzone > (x*x+y*y)) {
+			buf[1] = 0x00;
+			return 0;
+		}
+
+/* Nybble encoding: xy, 2 is -1 (S or W); 1 (N or E) */
+#define MOUSE_N		0x01
+#define MOUSE_NE	0x11
+#define MOUSE_E		0x10
+#define MOUSE_SE	0x12
+#define MOUSE_S		0x02
+#define MOUSE_SW	0x22
+#define MOUSE_W		0x20
+#define MOUSE_NW	0x21
+
+		/* cardinal leanings: positive x -> E, positive y -> S */
+		dir_ew = (x > 0) ? MOUSE_E : MOUSE_W;
+		dir_ns = (y > 0) ? MOUSE_S : MOUSE_N;
+
+		/* convert coordinates(angle) into compass direction */
+		if (x == 0)
+			code = dir_ns;
+		else if (y == 0)
+			code = dir_ew;
+		else {
+			if (abs(1000*y/x) > mgradient)
+				code = dir_ns;
+			if (abs(1000*x/y) > mgradient)
+				code |= dir_ew;
+		}
+
+		buf[1] = code;
+		dprintk(DRIVER_NAME "[%d]: mouse compass=0x%x %s%s (%d,%d)\n",
+			ir->devnum, code,
+			(code & MOUSE_S ? "S" : (code & MOUSE_N ? "N" : "")),
+			(code & MOUSE_E ? "E" : (code & MOUSE_W ? "W" : "")),
+			x, y);
+	}
+
+	return 0;
+}
+
+static int code_check_xbox(struct in_endpt *iep, int len)
+{
+	struct atirf_dev *ir = iep->ir;
+	const int clen = CODE_LENGTH;
+
+	if (len != clen) {
+		dprintk(DRIVER_NAME ": We got %d instead of %d bytes from xbox "
+			"ir.. ?\n", len, clen);
+		return -1;
+	}
+
+	/* check for repeats */
+	if (memcmp(iep->old, iep->buf, len) == 0) {
+		if (iep->old_jiffies + repeat_jiffies > jiffies)
+			return -1;
+	} else {
+		/*
+		 * the third byte of xbox ir packet seems to contain key info
+		 * the last two bytes are.. some kind of clock?
+		 */
+		iep->buf[0] = iep->buf[2];
+		memset(iep->buf + 1, 0, len - 1);
+		memcpy(iep->old, iep->buf, len);
+	}
+	iep->old_jiffies = jiffies;
+
+	return 0;
+}
+
+#if defined(KERNEL_2_5) && LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19)
+static void usb_remote_recv(struct urb *urb, struct pt_regs *regs)
+#else
+static void usb_remote_recv(struct urb *urb)
+#endif
+{
+	struct in_endpt *iep;
+	int len, result = -1;
+
+	if (!urb)
+		return;
+	iep = urb->context;
+	if (!iep) {
+#ifdef KERNEL_2_5
+		urb->transfer_flags |= URB_ASYNC_UNLINK;
+#endif
+		usb_unlink_urb(urb);
+		return;
+	}
+	if (!iep->ir->usbdev)
+		return;
+
+	len = urb->actual_length;
+	if (debug)
+		print_data(iep, urb->transfer_buffer, len);
+
+	switch (urb->status) {
+
+	case 0:
+		switch (iep->ir->remote_type) {
+		case XBOX_COMPATIBLE:
+			result = code_check_xbox(iep, len);
+			break;
+		case ATI2_COMPATIBLE:
+			result = code_check_ati2(iep, len);
+			break;
+		case ATI1_COMPATIBLE:
+		default:
+			result = code_check_ati1(iep, len);
+		}
+		if (result < 0)
+			break;
+		lirc_buffer_write(iep->ir->d->rbuf, iep->buf);
+		wake_up(&iep->ir->d->rbuf->wait_poll);
+		break;
+
+	case -ECONNRESET:
+	case -ENOENT:
+	case -ESHUTDOWN:
+#ifdef KERNEL_2_5
+		urb->transfer_flags |= URB_ASYNC_UNLINK;
+#endif
+		usb_unlink_urb(urb);
+		return;
+
+	case -EPIPE:
+	default:
+		break;
+	}
+
+#ifdef KERNEL_2_5
+	usb_submit_urb(urb, GFP_ATOMIC);
+#endif
+}
+
+#if defined(KERNEL_2_5) && LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19)
+static void usb_remote_send(struct urb *urb, struct pt_regs *regs)
+#else
+static void usb_remote_send(struct urb *urb)
+#endif
+{
+	struct out_endpt *oep;
+
+	if (!urb)
+		return;
+	oep = urb->context;
+	if (!oep) {
+#ifdef KERNEL_2_5
+		urb->transfer_flags |= URB_ASYNC_UNLINK;
+#endif
+		usb_unlink_urb(urb);
+		return;
+	}
+	if (!oep->ir->usbdev)
+		return;
+
+	dprintk(DRIVER_NAME "[%d]: usb out called\n", oep->ir->devnum);
+
+	if (urb->status)
+		return;
+
+	oep->send_flags |= SEND_FLAG_COMPLETE;
+	wmb();
+	if (waitqueue_active(&oep->wait))
+		wake_up(&oep->wait);
+}
+
+
+/*
+ * Initialization and removal
+ */
+
+/*
+ * Free iep according to mem_failure which specifies a checkpoint into the
+ * initialization sequence for rollback recovery.
+ */
+static void free_in_endpt(struct in_endpt *iep, int mem_failure)
+{
+	struct atirf_dev *ir;
+	dprintk(DRIVER_NAME ": free_in_endpt(%p, %d)\n", iep, mem_failure);
+	if (!iep)
+		return;
+
+	ir = iep->ir;
+	if (!ir) {
+		dprintk(DRIVER_NAME ": free_in_endpt: WARNING! null ir\n");
+		return;
+	}
+	mutex_lock(&ir->lock);
+	switch (mem_failure) {
+	case FREE_ALL:
+	case 5:
+		list_del(&iep->iep_list_link);
+		dprintk(DRIVER_NAME "[%d]: free_in_endpt removing ep=0x%0x "
+			"from list\n", ir->devnum, iep->ep->bEndpointAddress);
+	case 4:
+		if (iep->urb) {
+#ifdef KERNEL_2_5
+			iep->urb->transfer_flags |= URB_ASYNC_UNLINK;
+#endif
+			usb_unlink_urb(iep->urb);
+			usb_free_urb(iep->urb);
+			iep->urb = 0;
+		} else
+			dprintk(DRIVER_NAME "[%d]: free_in_endpt null urb!\n",
+				ir->devnum);
+	case 3:
+#ifdef KERNEL_2_5
+		usb_buffer_free(iep->ir->usbdev, iep->len, iep->buf, iep->dma);
+#else
+		kfree(iep->buf);
+#endif
+		iep->buf = 0;
+	case 2:
+		kfree(iep);
+	}
+	mutex_unlock(&ir->lock);
+}
+
+/*
+ * Construct a new inbound endpoint for this remote, and add it to the list of
+ * in_epts in ir.
+ */
+static struct in_endpt *new_in_endpt(struct atirf_dev *ir,
+				     struct usb_endpoint_descriptor *ep)
+{
+	struct usb_device *dev = ir->usbdev;
+	struct in_endpt *iep;
+	int pipe, maxp, len, addr;
+	int mem_failure;
+
+	addr = ep->bEndpointAddress;
+	pipe = usb_rcvintpipe(dev, addr);
+	maxp = usb_maxpacket(dev, pipe, usb_pipeout(pipe));
+
+/*	len = (maxp > USB_BUFLEN) ? USB_BUFLEN : maxp;
+ *	len -= (len % CODE_LENGTH); */
+	len = CODE_LENGTH;
+
+	dprintk(DRIVER_NAME "[%d]: acceptable inbound endpoint (0x%x) found "
+		"(maxp=%d len=%d)\n", ir->devnum, addr, maxp, len);
+
+	mem_failure = 0;
+	iep = kzalloc(sizeof(*iep), GFP_KERNEL);
+	if (!iep) {
+		mem_failure = 1;
+		goto new_in_endpt_failure_check;
+	}
+	iep->ir = ir;
+	iep->ep = ep;
+	iep->len = len;
+
+#ifdef KERNEL_2_5
+	iep->buf = usb_buffer_alloc(dev, len, GFP_ATOMIC, &iep->dma);
+#else
+	iep->buf = kmalloc(len, GFP_KERNEL);
+#endif
+	if (!iep->buf) {
+		mem_failure = 2;
+		goto new_in_endpt_failure_check;
+	}
+
+#ifdef KERNEL_2_5
+	iep->urb = usb_alloc_urb(0, GFP_KERNEL);
+#else
+	iep->urb = usb_alloc_urb(0);
+#endif
+	if (!iep->urb)
+		mem_failure = 3;
+
+new_in_endpt_failure_check:
+
+	if (mem_failure) {
+		free_in_endpt(iep, mem_failure);
+		printk(DRIVER_NAME "[%d]: ep=0x%x out of memory (code=%d)\n",
+		       ir->devnum, addr, mem_failure);
+		return NULL;
+	}
+	list_add_tail(&iep->iep_list_link, &ir->iep_listhead);
+	dprintk(DRIVER_NAME "[%d]: adding ep=0x%0x to list\n",
+		ir->devnum, iep->ep->bEndpointAddress);
+	return iep;
+}
+
+static void free_out_endpt(struct out_endpt *oep, int mem_failure)
+{
+	struct atirf_dev *ir;
+	dprintk(DRIVER_NAME ": free_out_endpt(%p, %d)\n", oep, mem_failure);
+	if (!oep)
+		return;
+
+	wake_up_all(&oep->wait);
+
+	ir = oep->ir;
+	if (!ir) {
+		dprintk(DRIVER_NAME ": free_out_endpt: WARNING! null ir\n");
+		return;
+	}
+	mutex_lock(&ir->lock);
+	switch (mem_failure) {
+	case FREE_ALL:
+	case 4:
+		if (oep->urb) {
+#ifdef KERNEL_2_5
+			oep->urb->transfer_flags |= URB_ASYNC_UNLINK;
+#endif
+			usb_unlink_urb(oep->urb);
+			usb_free_urb(oep->urb);
+			oep->urb = 0;
+		} else {
+			dprintk(DRIVER_NAME "[%d]: free_out_endpt: null urb!\n",
+				ir->devnum);
+		}
+	case 3:
+#ifdef KERNEL_2_5
+		usb_buffer_free(oep->ir->usbdev, USB_OUTLEN,
+				oep->buf, oep->dma);
+#else
+		kfree(oep->buf);
+#endif
+		oep->buf = 0;
+	case 2:
+		kfree(oep);
+	}
+	mutex_unlock(&ir->lock);
+}
+
+static struct out_endpt *new_out_endpt(struct atirf_dev *ir,
+				       struct usb_endpoint_descriptor *ep)
+{
+#ifdef KERNEL_2_5
+	struct usb_device *dev = ir->usbdev;
+#endif
+	struct out_endpt *oep;
+	int mem_failure;
+
+	dprintk(DRIVER_NAME "[%d]: acceptable outbound endpoint (0x%x) found\n",
+		ir->devnum, ep->bEndpointAddress);
+
+	mem_failure = 0;
+	oep = kzalloc(sizeof(*oep), GFP_KERNEL);
+	if (!oep)
+		mem_failure = 1;
+	else {
+		oep->ir = ir;
+		oep->ep = ep;
+		init_waitqueue_head(&oep->wait);
+
+#ifdef KERNEL_2_5
+		oep->buf = usb_buffer_alloc(dev, USB_OUTLEN,
+					    GFP_ATOMIC, &oep->dma);
+#else
+		oep->buf = kmalloc(USB_OUTLEN, GFP_KERNEL);
+#endif
+		if (!oep->buf)
+			mem_failure = 2;
+		else {
+#ifdef KERNEL_2_5
+			oep->urb = usb_alloc_urb(0, GFP_KERNEL);
+#else
+			oep->urb = usb_alloc_urb(0);
+#endif
+			if (!oep->urb)
+				mem_failure = 3;
+		}
+	}
+	if (mem_failure) {
+		free_out_endpt(oep, mem_failure);
+		printk(DRIVER_NAME "[%d]: ep=0x%x out of memory (code=%d)\n",
+		       ir->devnum, ep->bEndpointAddress, mem_failure);
+		return NULL;
+	}
+	return oep;
+}
+
+static void free_irctl(struct atirf_dev *ir, int mem_failure)
+{
+	struct list_head *pos, *n;
+	struct in_endpt *in;
+	dprintk(DRIVER_NAME ": free_irctl(%p, %d)\n", ir, mem_failure);
+
+	if (!ir)
+		return;
+
+	list_for_each_safe(pos, n, &ir->iep_listhead) {
+		in = get_iep_from_link(pos);
+		free_in_endpt(in, FREE_ALL);
+	}
+	if (ir->out_init) {
+		free_out_endpt(ir->out_init, FREE_ALL);
+		ir->out_init = NULL;
+	}
+
+	mutex_lock(&ir->lock);
+	switch (mem_failure) {
+	case FREE_ALL:
+	case 6:
+		if (!--ir->dev_refcount) {
+			list_del(&ir->remote_list_link);
+			dprintk(DRIVER_NAME "[%d]: free_irctl: removing "
+				"remote from list\n", ir->devnum);
+		} else {
+			dprintk(DRIVER_NAME "[%d]: free_irctl: refcount at %d,"
+				"aborting free_irctl\n",
+				ir->devnum, ir->dev_refcount);
+			mutex_unlock(&ir->lock);
+			return;
+		}
+	case 5:
+	case 4:
+	case 3:
+		if (ir->d) {
+			switch (mem_failure) {
+			case 5:
+				lirc_buffer_free(ir->d->rbuf);
+			case 4:
+				kfree(ir->d->rbuf);
+			case 3:
+				kfree(ir->d);
+			}
+		} else
+			printk(DRIVER_NAME "[%d]: ir->d is a null pointer!\n",
+			       ir->devnum);
+	case 2:
+		mutex_unlock(&ir->lock);
+		kfree(ir);
+		return;
+	}
+	mutex_unlock(&ir->lock);
+}
+
+static struct atirf_dev *new_irctl(struct usb_interface *intf)
+{
+	struct usb_device *dev = interface_to_usbdev(intf);
+	struct atirf_dev *ir;
+	struct lirc_driver *driver;
+	int type, devnum, dclen;
+	int mem_failure;
+
+	devnum = dev->devnum;
+
+	switch (cpu_to_le16(dev->descriptor.idVendor)) {
+	case VENDOR_ATI1:
+		type = ATI1_COMPATIBLE;
+		break;
+	case VENDOR_ATI2:
+		type = ATI2_COMPATIBLE;
+		break;
+	case VENDOR_MS1:
+	case VENDOR_MS2:
+	case VENDOR_MS3:
+		type = XBOX_COMPATIBLE;
+		break;
+	default:
+		dprintk(DRIVER_NAME "[%d]: unknown type\n", devnum);
+		return NULL;
+	}
+	dprintk(DRIVER_NAME "[%d]: remote type = %d\n", devnum, type);
+
+	mem_failure = 0;
+	ir = kzalloc(sizeof(*ir), GFP_KERNEL);
+	if (!ir) {
+		mem_failure = 1;
+		goto new_irctl_failure_check;
+	}
+
+	/*
+	 * at this stage we cannot use the macro [DE]CODE_LENGTH: ir
+	 * is not yet setup
+	 */
+	dclen = decode_length[type];
+	/*
+	 * add this infrared remote struct to remote_list, keeping track
+	 * of the number of drivers registered.
+	 */
+	dprintk(DRIVER_NAME "[%d]: adding remote to list\n", devnum);
+	list_add_tail(&ir->remote_list_link, &remote_list);
+	ir->dev_refcount = 1;
+
+	driver = kzalloc(sizeof(*driver), GFP_KERNEL);
+	if (!driver) {
+		mem_failure = 2;
+		goto new_irctl_failure_check;
+	}
+
+	ir->d = driver;
+	driver->rbuf = kmalloc(sizeof(*(driver->rbuf)), GFP_KERNEL);
+	if (!driver->rbuf) {
+		mem_failure = 3;
+		goto new_irctl_failure_check;
+	}
+
+	if (lirc_buffer_init(driver->rbuf, dclen, 1)) {
+		mem_failure = 4;
+		goto new_irctl_failure_check;
+	}
+
+	strcpy(driver->name, DRIVER_NAME " ");
+	driver->minor = -1;
+	driver->code_length = dclen * 8;
+	driver->features = LIRC_CAN_REC_LIRCCODE;
+	driver->data = ir;
+	driver->set_use_inc = &set_use_inc;
+	driver->set_use_dec = &set_use_dec;
+#ifdef LIRC_HAVE_SYSFS
+	driver->dev = &intf->dev;
+#endif
+	driver->owner = THIS_MODULE;
+	ir->usbdev = dev;
+	ir->remote_type = type;
+	ir->devnum = devnum;
+	ir->mode = RW2_NULL_MODE;
+
+	mutex_init(&ir->lock);
+	INIT_LIST_HEAD(&ir->iep_listhead);
+
+new_irctl_failure_check:
+
+	if (mem_failure) {
+		free_irctl(ir, mem_failure);
+		printk(DRIVER_NAME "[%d]: out of memory (code=%d)\n",
+		       devnum, mem_failure);
+		return NULL;
+	}
+	return ir;
+}
+
+
+/*
+ * Scan the global list of remotes to see if the device listed is one of them.
+ * If it is, the corresponding atirf_dev is returned, with its dev_refcount
+ * incremented.  Otherwise, returns null.
+ */
+static struct atirf_dev *get_prior_reg_ir(struct usb_device *dev)
+{
+	struct list_head *pos;
+	struct atirf_dev *ir = NULL;
+
+	dprintk(DRIVER_NAME "[%d]: scanning remote_list...\n", dev->devnum);
+	list_for_each(pos, &remote_list) {
+		ir = get_irctl_from_link(pos);
+		if (ir->usbdev != dev) {
+			dprintk(DRIVER_NAME "[%d]: device %d isn't it...",
+				dev->devnum, ir->devnum);
+		    ir = NULL;
+		} else {
+			dprintk(DRIVER_NAME "[%d]: prior instance found.\n",
+				dev->devnum);
+			ir->dev_refcount++;
+			break;
+		}
+	}
+	return ir;
+}
+
+/*
+ * If the USB interface has an out endpoint for control (eg, the first Remote
+ * Wonder) send the appropriate initialization packets.
+ */
+static void send_outbound_init(struct atirf_dev *ir)
+{
+	if (ir->out_init) {
+		struct out_endpt *oep = ir->out_init;
+		dprintk(DRIVER_NAME "[%d]: usb_remote_probe: initializing "
+			"outbound ep\n", ir->devnum);
+		usb_fill_int_urb(oep->urb, ir->usbdev,
+			usb_sndintpipe(ir->usbdev, oep->ep->bEndpointAddress),
+			oep->buf, USB_OUTLEN, usb_remote_send,
+			oep, oep->ep->bInterval);
+#ifdef KERNEL_2_5
+		oep->urb->transfer_dma = oep->dma;
+		oep->urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;
+#endif
+
+		send_packet(oep, 0x8004, init1);
+		send_packet(oep, 0x8007, init2);
+	}
+}
+
+/* Log driver and usb info */
+static void log_usb_dev_info(struct usb_device *dev)
+{
+	char buf[63], name[128] = "";
+
+	if (dev->descriptor.iManufacturer
+	    && usb_string(dev, dev->descriptor.iManufacturer,
+			  buf, sizeof(buf)) > 0)
+		strlcpy(name, buf, sizeof(name));
+	if (dev->descriptor.iProduct
+	    && usb_string(dev, dev->descriptor.iProduct, buf, sizeof(buf)) > 0)
+		snprintf(name + strlen(name), sizeof(name) - strlen(name),
+			 " %s", buf);
+	printk(DRIVER_NAME "[%d]: %s on usb%d:%d\n", dev->devnum, name,
+	       dev->bus->busnum, dev->devnum);
+}
+
+
+#ifdef KERNEL_2_5
+static int usb_remote_probe(struct usb_interface *intf,
+				const struct usb_device_id *id)
+{
+	struct usb_device *dev = interface_to_usbdev(intf);
+	struct usb_host_interface *idesc;
+#else
+static void *usb_remote_probe(struct usb_device *dev, unsigned int ifnum,
+				const struct usb_device_id *id)
+{
+	struct usb_interface *intf = &dev->actconfig->interface[ifnum];
+	struct usb_interface_descriptor *idesc;
+#endif
+	struct usb_endpoint_descriptor *ep;
+	struct in_endpt *iep;
+	struct atirf_dev *ir;
+	int i, type;
+
+	dprintk(DRIVER_NAME "[%d]: usb_remote_probe: dev:%p, intf:%p, id:%p)\n",
+		dev->devnum, dev, intf, id);
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 5)
+	idesc = &intf->altsetting[intf->act_altsetting];
+#else
+	idesc = intf->cur_altsetting;
+#endif
+
+	/* Check if a usb remote has already been registered for this device */
+	ir = get_prior_reg_ir(dev);
+
+	if (!ir) {
+		ir = new_irctl(intf);
+		if (!ir)
+#ifdef KERNEL_2_5
+			return -ENOMEM;
+#else
+			return NULL;
+#endif
+	}
+	type = ir->remote_type;
+
+	/*
+	 * step through the endpoints to find first in and first out endpoint
+	 * of type interrupt transfer
+	 */
+#ifdef KERNEL_2_5
+	for (i = 0; i < idesc->desc.bNumEndpoints; ++i) {
+		ep = &idesc->endpoint[i].desc;
+#else
+	for (i = 0; i < idesc->bNumEndpoints; ++i) {
+		ep = &idesc->endpoint[i];
+#endif
+		dprintk(DRIVER_NAME "[%d]: processing endpoint %d\n",
+			dev->devnum, i);
+		if (((ep->bEndpointAddress & USB_ENDPOINT_DIR_MASK) ==
+		     USB_DIR_IN) &&
+		     ((ep->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) ==
+		      USB_ENDPOINT_XFER_INT)) {
+
+			iep = new_in_endpt(ir, ep);
+			if (iep)
+			{
+				usb_fill_int_urb(iep->urb, dev,
+					usb_rcvintpipe(dev,
+						iep->ep->bEndpointAddress),
+					iep->buf, iep->len, usb_remote_recv,
+					iep, iep->ep->bInterval);
+#ifdef KERNEL_2_5
+				iep->urb->transfer_dma = iep->dma;
+				iep->urb->transfer_flags |=
+					URB_NO_TRANSFER_DMA_MAP;
+#endif
+			}
+		}
+
+		if (((ep->bEndpointAddress & USB_ENDPOINT_DIR_MASK) ==
+		     USB_DIR_OUT) &&
+		     ((ep->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) ==
+		      USB_ENDPOINT_XFER_INT) &&
+		      (ir->out_init == NULL))
+			ir->out_init = new_out_endpt(ir, ep);
+	}
+	if (list_empty(&ir->iep_listhead)) {
+		printk(DRIVER_NAME "[%d]: inbound endpoint not found\n",
+		       ir->devnum);
+		free_irctl(ir, FREE_ALL);
+#ifdef KERNEL_2_5
+		return -ENODEV;
+#else
+		return NULL;
+#endif
+	}
+	if (ir->dev_refcount == 1) {
+		ir->d->minor = lirc_register_driver(ir->d);
+		if (ir->d->minor < 0) {
+			free_irctl(ir, FREE_ALL);
+#ifdef KERNEL_2_5
+			return -ENODEV;
+#else
+			return NULL;
+#endif
+		}
+
+		/* Note new driver registration in kernel logs */
+		log_usb_dev_info(dev);
+
+		/* outbound data (initialization) */
+		send_outbound_init(ir);
+	}
+
+#ifdef KERNEL_2_5
+	usb_set_intfdata(intf, ir);
+	return 0;
+#else
+	return ir;
+#endif
+}
+
+#ifdef KERNEL_2_5
+static void usb_remote_disconnect(struct usb_interface *intf)
+{
+	/* struct usb_device *dev = interface_to_usbdev(intf); */
+	struct atirf_dev *ir = usb_get_intfdata(intf);
+	usb_set_intfdata(intf, NULL);
+#else
+static void usb_remote_disconnect(struct usb_device *dev, void *ptr)
+{
+	struct atirf_dev *ir = ptr;
+#endif
+
+	dprintk(DRIVER_NAME ": disconnecting remote %d:\n",
+		(ir ? ir->devnum : -1));
+	if (!ir || !ir->d)
+		return;
+
+	if (ir->usbdev) {
+		/* Only unregister once */
+		ir->usbdev = NULL;
+		unregister_from_lirc(ir);
+	}
+
+	/* This also removes the current remote from remote_list */
+	free_irctl(ir, FREE_ALL);
+}
+
+static struct usb_driver usb_remote_driver = {
+	LIRC_THIS_MODULE(.owner = THIS_MODULE)
+	.name		= DRIVER_NAME,
+	.probe		= usb_remote_probe,
+	.disconnect	= usb_remote_disconnect,
+	.id_table	= usb_remote_table
+};
+
+static int __init usb_remote_init(void)
+{
+	int i;
+
+	INIT_LIST_HEAD(&remote_list);
+
+	printk(KERN_INFO "\n" DRIVER_NAME ": " DRIVER_DESC " "
+	       DRIVER_VERSION "\n");
+	printk(DRIVER_NAME ": " DRIVER_AUTHOR "\n");
+	dprintk(DRIVER_NAME ": debug mode enabled: "
+		"$Id: lirc_atiusb.c,v 1.85 2009/03/11 00:21:46 jarodwilson Exp $\n");
+
+	repeat_jiffies = repeat*HZ/100;
+
+	i = usb_register(&usb_remote_driver);
+	if (i) {
+		printk(DRIVER_NAME ": usb register failed, result = %d\n", i);
+		return -ENODEV;
+	}
+
+	return 0;
+}
+
+static void __exit usb_remote_exit(void)
+{
+	usb_deregister(&usb_remote_driver);
+}
+
+module_init(usb_remote_init);
+module_exit(usb_remote_exit);
+
+MODULE_DESCRIPTION(DRIVER_DESC);
+MODULE_AUTHOR(DRIVER_AUTHOR);
+MODULE_LICENSE("GPL");
+MODULE_DEVICE_TABLE(usb, usb_remote_table);
+
+module_param(debug, bool, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(debug, "Debug enabled or not (default: 0)");
+
+module_param(mask, int, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(mask, "Set channel acceptance bit mask (default: 0xFFFF)");
+
+module_param(unique, bool, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(unique, "Enable channel-specific codes (default: 0)");
+
+module_param(repeat, int, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(repeat, "Repeat timeout (1/100 sec) (default: 10)");
+
+module_param(mdeadzone, int, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(mdeadzone, "rw2 mouse sensitivity threshold (default: 0)");
+
+/*
+ * Enabling this will cause the built-in Remote Wonder II repeat coding to
+ * not be squashed.  The second byte of the keys output will then be:
+ *
+ *	1 initial press (button down)
+ *	2 holding (button remains pressed)
+ *	0 release (button up)
+ *
+ * By default, the driver emits 2 for both 1 and 2, and emits nothing for 0.
+ * This is good for people having trouble getting their rw2 to send a good
+ * consistent signal to the receiver.
+ *
+ * However, if you have no troubles with the driver outputting up-down pairs
+ * at random points while you're still holding a button, then you can enable
+ * this parameter to get finer grain repeat control out of your remote:
+ *
+ *	1 Emit a single (per-channel) virtual code for all up/down events
+ *	2 Emit the actual rw2 output
+ *
+ * 1 is easier to write lircd configs for; 2 allows full control.
+ */
+module_param(emit_updown, int, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(emit_updown, "emit press/release codes (rw2): 0:don't "
+		 "(default), 1:emit 2 codes only, 2:code for each button");
+
+module_param(emit_modekeys, int, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(emit_modekeys, "emit keycodes for aux1-aux4, pc, and mouse "
+		 "(rw2): 0:don't (default), 1:emit translated codes: one for "
+		 "mode switch, one for same mode, 2:raw codes");
+
+module_param(mgradient, int, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(mgradient, "rw2 mouse: 1000*gradient from E to NE (default: "
+		 "500 => .5 => ~27 degrees)");
+
+EXPORT_NO_SYMBOLS;
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_atiusb/Makefile
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_atiusb/Makefile
@@ -0,0 +1,3 @@
+EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)/..
+
+obj-$(CONFIG_LIRC_ATIUSB)	+= lirc_atiusb.o
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_dev/lirc_dev.h
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_dev/lirc_dev.h
@@ -0,0 +1,342 @@
+/*
+ * LIRC base driver
+ *
+ * (L) by Artur Lipowski <alipowski@interia.pl>
+ *        This code is licensed under GNU GPL
+ *
+ * $Id: lirc_dev.h,v 1.37 2009/03/15 09:34:00 lirc Exp $
+ *
+ */
+
+#ifndef _LINUX_LIRC_DEV_H
+#define _LINUX_LIRC_DEV_H
+
+#ifndef LIRC_REMOVE_DURING_EXPORT
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 11)
+/* when was it really introduced? */
+#define LIRC_HAVE_KFIFO
+#endif
+#endif
+#define MAX_IRCTL_DEVICES 4
+#define BUFLEN            16
+
+#define mod(n, div) ((n) % (div))
+
+#include <linux/slab.h>
+#include <linux/fs.h>
+#ifdef LIRC_HAVE_KFIFO
+#include <linux/kfifo.h>
+#endif
+
+struct lirc_buffer {
+	wait_queue_head_t wait_poll;
+	spinlock_t lock;
+	unsigned int chunk_size;
+	unsigned int size; /* in chunks */
+	/* Using chunks instead of bytes pretends to simplify boundary checking
+	 * And should allow for some performance fine tunning later */
+#ifdef LIRC_HAVE_KFIFO
+	struct kfifo *fifo;
+#else
+	unsigned int fill; /* in chunks */
+	int head, tail;    /* in chunks */
+	unsigned char *data;
+#endif
+};
+#ifndef LIRC_HAVE_KFIFO
+static inline void lirc_buffer_lock(struct lirc_buffer *buf,
+				    unsigned long *flags)
+{
+	spin_lock_irqsave(&buf->lock, *flags);
+}
+static inline void lirc_buffer_unlock(struct lirc_buffer *buf,
+				      unsigned long *flags)
+{
+	spin_unlock_irqrestore(&buf->lock, *flags);
+}
+static inline void _lirc_buffer_clear(struct lirc_buffer *buf)
+{
+	buf->head = 0;
+	buf->tail = 0;
+	buf->fill = 0;
+}
+#endif
+static inline void lirc_buffer_clear(struct lirc_buffer *buf)
+{
+#ifdef LIRC_HAVE_KFIFO
+	if (buf->fifo)
+		kfifo_reset(buf->fifo);
+#else
+	unsigned long flags;
+	lirc_buffer_lock(buf, &flags);
+	_lirc_buffer_clear(buf);
+	lirc_buffer_unlock(buf, &flags);
+#endif
+}
+static inline int lirc_buffer_init(struct lirc_buffer *buf,
+				    unsigned int chunk_size,
+				    unsigned int size)
+{
+	init_waitqueue_head(&buf->wait_poll);
+	spin_lock_init(&buf->lock);
+#ifndef LIRC_HAVE_KFIFO
+	_lirc_buffer_clear(buf);
+#endif
+	buf->chunk_size = chunk_size;
+	buf->size = size;
+#ifdef LIRC_HAVE_KFIFO
+	buf->fifo = kfifo_alloc(size*chunk_size, GFP_KERNEL, &buf->lock);
+	if (!buf->fifo)
+		return -ENOMEM;
+#else
+	buf->data = kmalloc(size*chunk_size, GFP_KERNEL);
+	if (buf->data == NULL)
+		return -ENOMEM;
+	memset(buf->data, 0, size*chunk_size);
+#endif
+	return 0;
+}
+static inline void lirc_buffer_free(struct lirc_buffer *buf)
+{
+#ifdef LIRC_HAVE_KFIFO
+	if (buf->fifo)
+		kfifo_free(buf->fifo);
+#else
+	kfree(buf->data);
+	buf->data = NULL;
+	buf->head = 0;
+	buf->tail = 0;
+	buf->fill = 0;
+	buf->chunk_size = 0;
+	buf->size = 0;
+#endif
+}
+#ifndef LIRC_HAVE_KFIFO
+static inline int  _lirc_buffer_full(struct lirc_buffer *buf)
+{
+	return (buf->fill >= buf->size);
+}
+#endif
+static inline int  lirc_buffer_full(struct lirc_buffer *buf)
+{
+#ifdef LIRC_HAVE_KFIFO
+	return kfifo_len(buf->fifo) == buf->size * buf->chunk_size;
+#else
+	unsigned long flags;
+	int ret;
+	lirc_buffer_lock(buf, &flags);
+	ret = _lirc_buffer_full(buf);
+	lirc_buffer_unlock(buf, &flags);
+	return ret;
+#endif
+}
+#ifndef LIRC_HAVE_KFIFO
+static inline int  _lirc_buffer_empty(struct lirc_buffer *buf)
+{
+	return !(buf->fill);
+}
+#endif
+static inline int  lirc_buffer_empty(struct lirc_buffer *buf)
+{
+#ifdef LIRC_HAVE_KFIFO
+	return !kfifo_len(buf->fifo);
+#else
+	unsigned long flags;
+	int ret;
+	lirc_buffer_lock(buf, &flags);
+	ret = _lirc_buffer_empty(buf);
+	lirc_buffer_unlock(buf, &flags);
+	return ret;
+#endif
+}
+#ifndef LIRC_HAVE_KFIFO
+static inline int  _lirc_buffer_available(struct lirc_buffer *buf)
+{
+	return (buf->size - buf->fill);
+}
+#endif
+static inline int  lirc_buffer_available(struct lirc_buffer *buf)
+{
+#ifdef LIRC_HAVE_KFIFO
+	return buf->size - (kfifo_len(buf->fifo) / buf->chunk_size);
+#else
+	unsigned long flags;
+	int ret;
+	lirc_buffer_lock(buf, &flags);
+	ret = _lirc_buffer_available(buf);
+	lirc_buffer_unlock(buf, &flags);
+	return ret;
+#endif
+}
+#ifndef LIRC_HAVE_KFIFO
+static inline void _lirc_buffer_read_1(struct lirc_buffer *buf,
+				       unsigned char *dest)
+{
+	memcpy(dest, &buf->data[buf->head*buf->chunk_size], buf->chunk_size);
+	buf->head = mod(buf->head+1, buf->size);
+	buf->fill -= 1;
+}
+#endif
+static inline void lirc_buffer_read(struct lirc_buffer *buf,
+				    unsigned char *dest)
+{
+#ifdef LIRC_HAVE_KFIFO
+	if (kfifo_len(buf->fifo) >= buf->chunk_size)
+		kfifo_get(buf->fifo, dest, buf->chunk_size);
+#else
+	unsigned long flags;
+	lirc_buffer_lock(buf, &flags);
+	_lirc_buffer_read_1(buf, dest);
+	lirc_buffer_unlock(buf, &flags);
+#endif
+}
+#ifndef LIRC_HAVE_KFIFO
+static inline void _lirc_buffer_write_1(struct lirc_buffer *buf,
+				      unsigned char *orig)
+{
+	memcpy(&buf->data[buf->tail*buf->chunk_size], orig, buf->chunk_size);
+	buf->tail = mod(buf->tail+1, buf->size);
+	buf->fill++;
+}
+#endif
+static inline void lirc_buffer_write(struct lirc_buffer *buf,
+				     unsigned char *orig)
+{
+#ifdef LIRC_HAVE_KFIFO
+	kfifo_put(buf->fifo, orig, buf->chunk_size);
+#else
+	unsigned long flags;
+	lirc_buffer_lock(buf, &flags);
+	_lirc_buffer_write_1(buf, orig);
+	lirc_buffer_unlock(buf, &flags);
+#endif
+}
+#ifndef LIRC_HAVE_KFIFO
+static inline void _lirc_buffer_write_n(struct lirc_buffer *buf,
+					unsigned char *orig, int count)
+{
+	int space1;
+	if (buf->head > buf->tail)
+		space1 = buf->head - buf->tail;
+	else
+		space1 = buf->size - buf->tail;
+
+	if (count > space1) {
+		memcpy(&buf->data[buf->tail * buf->chunk_size], orig,
+		       space1 * buf->chunk_size);
+		memcpy(&buf->data[0], orig + (space1 * buf->chunk_size),
+		       (count - space1) * buf->chunk_size);
+	} else {
+		memcpy(&buf->data[buf->tail * buf->chunk_size], orig,
+		       count * buf->chunk_size);
+	}
+	buf->tail = mod(buf->tail + count, buf->size);
+	buf->fill += count;
+}
+#endif
+static inline void lirc_buffer_write_n(struct lirc_buffer *buf,
+				       unsigned char *orig, int count)
+{
+#ifdef LIRC_HAVE_KFIFO
+	kfifo_put(buf->fifo, orig, count * buf->chunk_size);
+#else
+	unsigned long flags;
+	lirc_buffer_lock(buf, &flags);
+	_lirc_buffer_write_n(buf, orig, count);
+	lirc_buffer_unlock(buf, &flags);
+#endif
+}
+
+struct lirc_driver {
+	char name[40];
+	int minor;
+	unsigned long code_length;
+	unsigned int buffer_size; /* in chunks holding one code each */
+	int sample_rate;
+	unsigned long features;
+	void *data;
+	int (*add_to_buf) (void *data, struct lirc_buffer *buf);
+#ifndef LIRC_REMOVE_DURING_EXPORT
+	wait_queue_head_t* (*get_queue) (void *data);
+#endif
+	struct lirc_buffer *rbuf;
+	int (*set_use_inc) (void *data);
+	void (*set_use_dec) (void *data);
+	struct file_operations *fops;
+	struct device *dev;
+	struct module *owner;
+};
+/* name:
+ * this string will be used for logs
+ *
+ * minor:
+ * indicates minor device (/dev/lirc) number for registered driver
+ * if caller fills it with negative value, then the first free minor
+ * number will be used (if available)
+ *
+ * code_length:
+ * length of the remote control key code expressed in bits
+ *
+ * sample_rate:
+ * sample_rate equal to 0 means that no polling will be performed and
+ * add_to_buf will be triggered by external events (through task queue
+ * returned by get_queue)
+ *
+ * data:
+ * it may point to any driver data and this pointer will be passed to
+ * all callback functions
+ *
+ * add_to_buf:
+ * add_to_buf will be called after specified period of the time or
+ * triggered by the external event, this behavior depends on value of
+ * the sample_rate this function will be called in user context. This
+ * routine should return 0 if data was added to the buffer and
+ * -ENODATA if none was available. This should add some number of bits
+ * evenly divisible by code_length to the buffer
+ *
+ * get_queue:
+ * this callback should return a pointer to the task queue which will
+ * be used for external event waiting
+ *
+ * rbuf:
+ * if not NULL, it will be used as a read buffer, you will have to
+ * write to the buffer by other means, like irq's (see also
+ * lirc_serial.c).
+ *
+ * set_use_inc:
+ * set_use_inc will be called after device is opened
+ *
+ * set_use_dec:
+ * set_use_dec will be called after device is closed
+ *
+ * fops:
+ * file_operations for drivers which don't fit the current driver model.
+ *
+ * Some ioctl's can be directly handled by lirc_dev if the driver's
+ * ioctl function is NULL or if it returns -ENOIOCTLCMD (see also
+ * lirc_serial.c).
+ *
+ * owner:
+ * the module owning this struct
+ *
+ */
+
+
+/* following functions can be called ONLY from user context
+ *
+ * returns negative value on error or minor number
+ * of the registered device if success
+ * contents of the structure pointed by d is copied
+ */
+extern int lirc_register_driver(struct lirc_driver *d);
+
+/* returns negative value on error or 0 if success
+*/
+extern int lirc_unregister_driver(int minor);
+
+/* Returns the private data stored in the lirc_driver
+ * associated with the given device file pointer.
+ */
+void *lirc_get_pdata(struct file *file);
+
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_dev/Makefile
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_dev/Makefile
@@ -0,0 +1,3 @@
+EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)/..
+
+obj-$(CONFIG_LIRC_DEV)		+= lirc_dev.o
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_dev/lirc_dev.c
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_dev/lirc_dev.c
@@ -0,0 +1,1025 @@
+/*
+ * LIRC base driver
+ *
+ * (L) by Artur Lipowski <alipowski@interia.pl>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ * $Id: lirc_dev.c,v 1.96 2009/08/31 16:57:55 lirc Exp $
+ *
+ */
+
+#ifdef HAVE_CONFIG_H
+# include <config.h>
+#endif
+
+#include <linux/version.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 2, 18)
+#error "**********************************************************"
+#error " Sorry, this driver needs kernel version 2.2.18 or higher "
+#error "**********************************************************"
+#endif
+
+#include <linux/autoconf.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/errno.h>
+#include <linux/ioctl.h>
+#include <linux/fs.h>
+#include <linux/poll.h>
+#include <linux/smp_lock.h>
+#include <linux/completion.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18)
+#include <asm/uaccess.h>
+#include <asm/errno.h>
+#else
+#include <linux/uaccess.h>
+#include <linux/errno.h>
+#endif
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 0)
+#include <linux/wrapper.h>
+#endif
+#define __KERNEL_SYSCALLS__
+#include <linux/unistd.h>
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 23)
+#include <linux/kthread.h>
+#endif
+#ifdef CONFIG_COMPAT
+#include <linux/compat.h>
+#endif
+
+#include "../kcompat.h"
+
+/* SysFS header */
+#if defined(LIRC_HAVE_SYSFS)
+#include <linux/device.h>
+#endif
+
+#include "../lirc.h"
+#include "lirc_dev.h"
+
+static int debug;
+#define dprintk(fmt, args...)					\
+	do {							\
+		if (debug)					\
+			printk(KERN_DEBUG fmt, ## args);	\
+	} while (0)
+
+#define IRCTL_DEV_NAME    "BaseRemoteCtl"
+#define NOPLUG            -1
+#define LOGHEAD           "lirc_dev (%s[%d]): "
+
+struct irctl {
+	struct lirc_driver d;
+	int attached;
+	int open;
+
+	struct mutex buffer_lock;
+	struct lirc_buffer *buf;
+	unsigned int chunk_size;
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 23)
+	int tpid;
+	struct completion *t_notify;
+	struct completion *t_notify2;
+	int shutdown;
+#else
+	struct task_struct *task;
+#endif
+	long jiffies_to_wait;
+
+#ifdef LIRC_HAVE_DEVFS_24
+	devfs_handle_t devfs_handle;
+#endif
+};
+
+static DEFINE_MUTEX(lirc_dev_lock);
+
+static struct irctl *irctls[MAX_IRCTL_DEVICES];
+static struct file_operations fops;
+
+/* Only used for sysfs but defined to void otherwise */
+static lirc_class_t *lirc_class;
+
+/*  helper function
+ *  initializes the irctl structure
+ */
+static void init_irctl(struct irctl *ir)
+{
+	mutex_init(&ir->buffer_lock);
+	ir->d.minor = NOPLUG;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 23)
+	ir->tpid = -1;
+#endif
+}
+
+static void cleanup(struct irctl *ir)
+{
+	dprintk(LOGHEAD "cleaning up\n", ir->d.name, ir->d.minor);
+
+	if (ir->buf != ir->d.rbuf) {
+		lirc_buffer_free(ir->buf);
+		kfree(ir->buf);
+	}
+	ir->buf = NULL;
+}
+
+/*  helper function
+ *  reads key codes from driver and puts them into buffer
+ *  returns 0 on success
+ */
+static int add_to_buf(struct irctl *ir)
+{
+	if (ir->d.add_to_buf) {
+		int res = -ENODATA;
+		int got_data = 0;
+
+		/*
+		 * service the device as long as it is returning
+		 * data and we have space
+		 */
+		while ((res = ir->d.add_to_buf(ir->d.data, ir->buf)) == 0) {
+			got_data++;
+		}
+
+		if (res == -ENODEV)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 23)
+			ir->shutdown = 1;
+#else
+			kthread_stop(ir->task);
+#endif
+
+		return got_data ? 0 : res;
+	}
+
+	return 0;
+}
+
+/* main function of the polling thread */
+static int lirc_thread(void *irctl)
+{
+	struct irctl *ir = irctl;
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 23)
+	/*
+	 * This thread doesn't need any user-level access, so get rid
+	 * of all our resources
+	 */
+	daemonize("lirc_dev");
+
+	if (ir->t_notify != NULL)
+		complete(ir->t_notify);
+	
+#endif
+	dprintk(LOGHEAD "poll thread started\n", ir->d.name, ir->d.minor);
+
+	do {
+		if (ir->open) {
+			if (ir->jiffies_to_wait) {
+				set_current_state(TASK_INTERRUPTIBLE);
+				schedule_timeout(ir->jiffies_to_wait);
+#ifndef LIRC_REMOVE_DURING_EXPORT
+			} else {
+				interruptible_sleep_on(
+					ir->d.get_queue(ir->d.data));
+#endif
+			}
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 23)
+			if (ir->shutdown)
+#else
+			if (kthread_should_stop())
+#endif
+				break;
+			if (!add_to_buf(ir))
+				wake_up_interruptible(&ir->buf->wait_poll);
+		} else {
+			set_current_state(TASK_INTERRUPTIBLE);
+			schedule();
+		}
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 23)
+	} while (!ir->shutdown);
+
+	if (ir->t_notify2 != NULL)
+		wait_for_completion(ir->t_notify2);
+
+	ir->tpid = -1;
+	if (ir->t_notify != NULL)
+		complete(ir->t_notify);
+#else
+	} while (!kthread_should_stop());
+#endif
+
+	dprintk(LOGHEAD "poll thread ended\n", ir->d.name, ir->d.minor);
+
+	return 0;
+}
+
+int lirc_register_driver(struct lirc_driver *d)
+{
+	struct irctl *ir;
+	int minor;
+	int bytes_in_key;
+	unsigned int buffer_size;
+	int err;
+#ifdef LIRC_HAVE_DEVFS_24
+	char name[16];
+#endif
+	DECLARE_COMPLETION(tn);
+
+	if (!d) {
+		printk(KERN_ERR "lirc_dev: lirc_register_driver: "
+		       "driver pointer must be not NULL!\n");
+		err = -EBADRQC;
+		goto out;
+	}
+
+	if (MAX_IRCTL_DEVICES <= d->minor) {
+		printk(KERN_ERR "lirc_dev: lirc_register_driver: "
+		       "\"minor\" must be between 0 and %d (%d)!\n",
+		       MAX_IRCTL_DEVICES-1, d->minor);
+		err = -EBADRQC;
+		goto out;
+	}
+
+	if (1 > d->code_length || (BUFLEN * 8) < d->code_length) {
+		printk(KERN_ERR "lirc_dev: lirc_register_driver: "
+		       "code length in bits for minor (%d) "
+		       "must be less than %d!\n",
+		       d->minor, BUFLEN * 8);
+		err = -EBADRQC;
+		goto out;
+	}
+
+	printk(KERN_INFO "lirc_dev: lirc_register_driver: sample_rate: %d\n",
+		d->sample_rate);
+	if (d->sample_rate) {
+		if (2 > d->sample_rate || HZ < d->sample_rate) {
+			printk(KERN_ERR "lirc_dev: lirc_register_driver: "
+			       "sample_rate must be between 2 and %d!\n", HZ);
+			err = -EBADRQC;
+			goto out;
+		}
+		if (!d->add_to_buf) {
+			printk(KERN_ERR "lirc_dev: lirc_register_driver: "
+			       "add_to_buf cannot be NULL when "
+			       "sample_rate is set\n");
+			err = -EBADRQC;
+			goto out;
+		}
+#ifndef LIRC_REMOVE_DURING_EXPORT
+	} else if (!(d->fops && d->fops->read) && !d->get_queue && !d->rbuf) {
+#else
+	} else if (!(d->fops && d->fops->read) && !d->rbuf) {
+#endif
+		printk(KERN_ERR "lirc_dev: lirc_register_driver: "
+#ifndef LIRC_REMOVE_DURING_EXPORT
+		       "fops->read, get_queue and rbuf "
+#else
+		       "fops->read and rbuf "
+#endif
+		       "cannot all be NULL!\n");
+		err = -EBADRQC;
+		goto out;
+#ifndef LIRC_REMOVE_DURING_EXPORT
+	} else if (!d->get_queue && !d->rbuf) {
+#else
+	} else if (!d->rbuf) {
+#endif
+		if (!(d->fops && d->fops->read && d->fops->poll &&
+		      d->fops->ioctl)) {
+			printk(KERN_ERR "lirc_dev: lirc_register_driver: "
+			       "neither read, poll nor ioctl can be NULL!\n");
+			err = -EBADRQC;
+			goto out;
+		}
+	}
+
+	mutex_lock(&lirc_dev_lock);
+
+	minor = d->minor;
+
+	if (minor < 0) {
+		/* find first free slot for driver */
+		for (minor = 0; minor < MAX_IRCTL_DEVICES; minor++)
+			if (!irctls[minor])
+				break;
+		if (MAX_IRCTL_DEVICES == minor) {
+			printk(KERN_ERR "lirc_dev: lirc_register_driver: "
+			       "no free slots for drivers!\n");
+			err = -ENOMEM;
+			goto out_lock;
+		}
+	} else if (irctls[minor]) {
+		printk(KERN_ERR "lirc_dev: lirc_register_driver: "
+		       "minor (%d) just registered!\n", minor);
+		err = -EBUSY;
+		goto out_lock;
+	}
+
+	ir = kzalloc(sizeof(struct irctl), GFP_KERNEL);
+	if (!ir) {
+		err = -ENOMEM;
+		goto out_lock;
+	}
+	init_irctl(ir);
+	irctls[minor] = ir;
+
+	if (d->sample_rate) {
+		ir->jiffies_to_wait = HZ / d->sample_rate;
+	} else {
+		/* it means - wait for external event in task queue */
+		ir->jiffies_to_wait = 0;
+	}
+
+	/* some safety check 8-) */
+	d->name[sizeof(d->name)-1] = '\0';
+
+	bytes_in_key = d->code_length/8 + (d->code_length%8 ? 1 : 0);
+	buffer_size = d->buffer_size ? d->buffer_size : BUFLEN / bytes_in_key;
+
+	if (d->rbuf) {
+		ir->buf = d->rbuf;
+	} else {
+		ir->buf = kmalloc(sizeof(struct lirc_buffer), GFP_KERNEL);
+		if (!ir->buf) {
+			err = -ENOMEM;
+			goto out_lock;
+		}
+		err = lirc_buffer_init(ir->buf, bytes_in_key, buffer_size);
+		if (err) {
+			kfree(ir->buf);
+			goto out_lock;
+		}
+	}
+	ir->chunk_size = ir->buf->chunk_size;
+
+	if (d->features == 0)
+		d->features = (d->code_length > 8) ?
+			LIRC_CAN_REC_LIRCCODE : LIRC_CAN_REC_CODE;
+
+	ir->d = *d;
+	ir->d.minor = minor;
+
+#if defined(LIRC_HAVE_DEVFS_24)
+	sprintf(name, DEV_LIRC "/%d", ir->d.minor);
+	ir->devfs_handle = devfs_register(NULL, name, DEVFS_FL_DEFAULT,
+					  IRCTL_DEV_MAJOR, ir->d.minor,
+					  S_IFCHR | S_IRUSR | S_IWUSR,
+					  &fops, NULL);
+#elif defined(LIRC_HAVE_DEVFS_26)
+	devfs_mk_cdev(MKDEV(IRCTL_DEV_MAJOR, ir->d.minor),
+			S_IFCHR|S_IRUSR|S_IWUSR,
+			DEV_LIRC "/%u", ir->d.minor);
+#endif
+	(void) lirc_device_create(lirc_class, ir->d.dev,
+				  MKDEV(IRCTL_DEV_MAJOR, ir->d.minor), NULL,
+				  "lirc%u", ir->d.minor);
+
+#ifndef LIRC_REMOVE_DURING_EXPORT
+	if (d->sample_rate || d->get_queue) {
+#else
+	if (d->sample_rate) {
+#endif
+		/* try to fire up polling thread */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 23)
+		ir->t_notify = &tn;
+		ir->tpid = kernel_thread(lirc_thread, (void *)ir, 0);
+		if (ir->tpid < 0) {
+#else
+		ir->task = kthread_run(lirc_thread, (void *)ir, "lirc_dev");
+		if (IS_ERR(ir->task)) {
+#endif
+			printk(KERN_ERR "lirc_dev: lirc_register_driver: "
+			       "cannot run poll thread for minor = %d\n",
+			       d->minor);
+			err = -ECHILD;
+			goto out_sysfs;
+		}
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 23)
+		wait_for_completion(&tn);
+		ir->t_notify = NULL;
+#endif
+	}
+	ir->attached = 1;
+	mutex_unlock(&lirc_dev_lock);
+
+/*
+ * Recent kernels should handle this autmatically by increasing/decreasing
+ * use count when a dependant module is loaded/unloaded.
+ */
+#ifndef KERNEL_2_5
+	MOD_INC_USE_COUNT;
+#endif
+	dprintk("lirc_dev: driver %s registered at minor number = %d\n",
+		ir->d.name, ir->d.minor);
+	d->minor = minor;
+	return minor;
+
+out_sysfs:
+	lirc_device_destroy(lirc_class,
+			    MKDEV(IRCTL_DEV_MAJOR, ir->d.minor));
+#ifdef LIRC_HAVE_DEVFS_24
+	devfs_unregister(ir->devfs_handle);
+#endif
+#ifdef LIRC_HAVE_DEVFS_26
+	devfs_remove(DEV_LIRC "/%i", ir->d.minor);
+#endif
+out_lock:
+	mutex_unlock(&lirc_dev_lock);
+out:
+	return err;
+}
+EXPORT_SYMBOL(lirc_register_driver);
+
+int lirc_unregister_driver(int minor)
+{
+	struct irctl *ir;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 23)
+	DECLARE_COMPLETION(tn);
+	DECLARE_COMPLETION(tn2);
+#endif
+
+	if (minor < 0 || minor >= MAX_IRCTL_DEVICES) {
+		printk(KERN_ERR "lirc_dev: lirc_unregister_driver: "
+		       "\"minor\" must be between 0 and %d!\n",
+		       MAX_IRCTL_DEVICES-1);
+		return -EBADRQC;
+	}
+
+	ir = irctls[minor];
+
+	mutex_lock(&lirc_dev_lock);
+
+	if (ir->d.minor != minor) {
+		printk(KERN_ERR "lirc_dev: lirc_unregister_driver: "
+		       "minor (%d) device not registered!", minor);
+		mutex_unlock(&lirc_dev_lock);
+		return -ENOENT;
+	}
+
+	/* end up polling thread */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 23)
+	if (ir->tpid >= 0) {
+		ir->t_notify = &tn;
+		ir->t_notify2 = &tn2;
+		ir->shutdown = 1;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 4, 0)
+		{
+			struct task_struct *p;
+
+			p = find_task_by_pid(ir->tpid);
+			wake_up_process(p);
+		}
+#else
+		/* 2.2.x does not export wake_up_process() */
+		wake_up_interruptible(ir->d.get_queue(ir->d.data));
+#endif
+		complete(&tn2);
+		wait_for_completion(&tn);
+		ir->t_notify = NULL;
+		ir->t_notify2 = NULL;
+	}
+#else /* kernel >= 2.6.23 */
+	if (ir->task)
+		kthread_stop(ir->task);
+#endif
+
+	dprintk("lirc_dev: driver %s unregistered from minor number = %d\n",
+		ir->d.name, ir->d.minor);
+
+	ir->attached = 0;
+	if (ir->open) {
+		dprintk(LOGHEAD "releasing opened driver\n",
+			ir->d.name, ir->d.minor);
+		wake_up_interruptible(&ir->buf->wait_poll);
+		mutex_lock(&ir->buffer_lock);
+		ir->d.set_use_dec(ir->d.data);
+		module_put(ir->d.owner);
+		mutex_unlock(&ir->buffer_lock);
+	} else {
+		cleanup(ir);
+		irctls[minor] = NULL;
+		kfree(ir);
+	}
+
+#ifdef LIRC_HAVE_DEVFS_24
+	devfs_unregister(ir->devfs_handle);
+#endif
+#ifdef LIRC_HAVE_DEVFS_26
+	devfs_remove(DEV_LIRC "/%u", ir->d.minor);
+#endif
+	lirc_device_destroy(lirc_class,
+			    MKDEV(IRCTL_DEV_MAJOR, ir->d.minor));
+
+	mutex_unlock(&lirc_dev_lock);
+
+/*
+ * Recent kernels should handle this autmatically by increasing/decreasing
+ * use count when a dependant module is loaded/unloaded.
+ */
+#ifndef KERNEL_2_5
+	MOD_DEC_USE_COUNT;
+#endif
+
+	return 0;
+}
+EXPORT_SYMBOL(lirc_unregister_driver);
+
+static int irctl_open(struct inode *inode, struct file *file)
+{
+	struct irctl *ir;
+	int retval;
+
+	if (iminor(inode) >= MAX_IRCTL_DEVICES || !irctls[iminor(inode)]) {
+		dprintk("lirc_dev [%d]: open result = -ENODEV\n",
+			iminor(inode));
+		return -ENODEV;
+	}
+
+	ir = irctls[iminor(inode)];
+
+	dprintk(LOGHEAD "open called\n", ir->d.name, ir->d.minor);
+
+	/* if the driver has an open function use it instead */
+	if (ir->d.fops && ir->d.fops->open)
+		return ir->d.fops->open(inode, file);
+
+	if (mutex_lock_interruptible(&lirc_dev_lock))
+		return -ERESTARTSYS;
+
+	if (ir->d.minor == NOPLUG) {
+		retval = -ENODEV;
+		goto error;
+	}
+
+	if (ir->open) {
+		retval = -EBUSY;
+		goto error;
+	}
+
+	if (try_module_get(ir->d.owner)) {
+		++ir->open;
+		retval = ir->d.set_use_inc(ir->d.data);
+
+		if (retval) {
+			module_put(ir->d.owner);
+			--ir->open;
+		} else {
+			lirc_buffer_clear(ir->buf);
+		}
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 23)
+		if (ir->tpid >= 0) {
+			struct task_struct *p;
+
+			p = find_task_by_pid(ir->tpid);
+			wake_up_process(p);
+		}
+#else
+		if (ir->task)
+			wake_up_process(ir->task);
+#endif
+	}
+ error:
+	if (ir)
+		dprintk(LOGHEAD "open result = %d\n", ir->d.name, ir->d.minor,
+			retval);
+
+	mutex_unlock(&lirc_dev_lock);
+
+	return retval;
+}
+
+static int irctl_close(struct inode *inode, struct file *file)
+{
+	struct irctl *ir = irctls[iminor(inode)];
+
+	dprintk(LOGHEAD "close called\n", ir->d.name, ir->d.minor);
+
+	/* if the driver has a close function use it instead */
+	if (ir->d.fops && ir->d.fops->release)
+		return ir->d.fops->release(inode, file);
+
+	if (mutex_lock_interruptible(&lirc_dev_lock))
+		return -ERESTARTSYS;
+
+	--ir->open;
+	if (ir->attached) {
+		ir->d.set_use_dec(ir->d.data);
+		module_put(ir->d.owner);
+	} else {
+		cleanup(ir);
+		irctls[ir->d.minor] = NULL;
+		kfree(ir);
+	}
+
+	mutex_unlock(&lirc_dev_lock);
+
+	return 0;
+}
+
+static unsigned int irctl_poll(struct file *file, poll_table *wait)
+{
+	struct irctl *ir = irctls[iminor(file->f_dentry->d_inode)];
+	unsigned int ret;
+
+	dprintk(LOGHEAD "poll called\n", ir->d.name, ir->d.minor);
+
+	/* if the driver has a poll function use it instead */
+	if (ir->d.fops && ir->d.fops->poll)
+		return ir->d.fops->poll(file, wait);
+
+	mutex_lock(&ir->buffer_lock);
+	if (!ir->attached) {
+		mutex_unlock(&ir->buffer_lock);
+		return POLLERR;
+	}
+
+	poll_wait(file, &ir->buf->wait_poll, wait);
+
+	dprintk(LOGHEAD "poll result = %s\n",
+		ir->d.name, ir->d.minor,
+		lirc_buffer_empty(ir->buf) ? "0" : "POLLIN|POLLRDNORM");
+
+	ret = lirc_buffer_empty(ir->buf) ? 0 : (POLLIN|POLLRDNORM);
+
+	mutex_unlock(&ir->buffer_lock);
+	return ret;
+}
+
+/*
+ *
+ */
+static int irctl_ioctl(struct inode *inode, struct file *file,
+		       unsigned int cmd, unsigned long arg)
+{
+	unsigned long mode;
+	int result;
+	struct irctl *ir = irctls[iminor(inode)];
+
+	dprintk(LOGHEAD "ioctl called (0x%x)\n",
+		ir->d.name, ir->d.minor, cmd);
+
+	/* if the driver has a ioctl function use it instead */
+	if (ir->d.fops && ir->d.fops->ioctl) {
+		result = ir->d.fops->ioctl(inode, file, cmd, arg);
+		if (result != -ENOIOCTLCMD)
+			return result;
+	}
+
+	if (ir->d.minor == NOPLUG || !ir->attached) {
+		dprintk(LOGHEAD "ioctl result = -ENODEV\n",
+			ir->d.name, ir->d.minor);
+		return -ENODEV;
+	}
+
+	/* The driver can't handle cmd */
+	result = 0;
+
+	switch (cmd) {
+	case LIRC_GET_FEATURES:
+		result = put_user(ir->d.features, (unsigned long *)arg);
+		break;
+	case LIRC_GET_REC_MODE:
+		if (!(ir->d.features & LIRC_CAN_REC_MASK))
+			return -ENOSYS;
+
+		result = put_user(LIRC_REC2MODE
+				  (ir->d.features & LIRC_CAN_REC_MASK),
+				  (unsigned long *)arg);
+		break;
+	case LIRC_SET_REC_MODE:
+		if (!(ir->d.features & LIRC_CAN_REC_MASK))
+			return -ENOSYS;
+
+		result = get_user(mode, (unsigned long *)arg);
+		if (!result && !(LIRC_MODE2REC(mode) & ir->d.features))
+			result = -EINVAL;
+		/*
+		 * FIXME: We should actually set the mode somehow but
+		 * for now, lirc_serial doesn't support mode changing either
+		 */
+		break;
+	case LIRC_GET_LENGTH:
+		result = put_user(ir->d.code_length, (unsigned long *) arg);
+		break;
+	default:
+		result = -EINVAL;
+	}
+
+	dprintk(LOGHEAD "ioctl result = %d\n",
+		ir->d.name, ir->d.minor, result);
+
+	return result;
+}
+
+#ifdef CONFIG_COMPAT
+#define LIRC_GET_FEATURES_COMPAT32     _IOR('i', 0x00000000, __u32)
+
+#define LIRC_GET_SEND_MODE_COMPAT32    _IOR('i', 0x00000001, __u32)
+#define LIRC_GET_REC_MODE_COMPAT32     _IOR('i', 0x00000002, __u32)
+
+#define LIRC_GET_LENGTH_COMPAT32       _IOR('i', 0x0000000f, __u32)
+
+#define LIRC_SET_SEND_MODE_COMPAT32    _IOW('i', 0x00000011, __u32)
+#define LIRC_SET_REC_MODE_COMPAT32     _IOW('i', 0x00000012, __u32)
+
+static long irctl_compat_ioctl(struct file *file,
+			       unsigned int cmd32,
+			       unsigned long arg)
+{
+	mm_segment_t old_fs;
+	int ret;
+	unsigned long val;
+	unsigned int cmd;
+
+	switch (cmd32) {
+	case LIRC_GET_FEATURES_COMPAT32:
+	case LIRC_GET_SEND_MODE_COMPAT32:
+	case LIRC_GET_REC_MODE_COMPAT32:
+	case LIRC_GET_LENGTH_COMPAT32:
+	case LIRC_SET_SEND_MODE_COMPAT32:
+	case LIRC_SET_REC_MODE_COMPAT32:
+		/*
+		 * These commands expect (unsigned long *) arg
+		 * but the 32-bit app supplied (__u32 *).
+		 * Conversion is required.
+		 */
+		if (get_user(val, (__u32 *)compat_ptr(arg)))
+			return -EFAULT;
+		lock_kernel();
+		/*
+		 * tell irctl_ioctl that it's safe to use the pointer
+		 * to val which is in kernel address space and not in
+		 * user address space
+		 */
+		old_fs = get_fs();
+		set_fs(KERNEL_DS);
+
+		cmd = _IOC(_IOC_DIR(cmd32), _IOC_TYPE(cmd32), _IOC_NR(cmd32),
+			   (_IOC_TYPECHECK(unsigned long)));
+		ret = irctl_ioctl(file->f_dentry->d_inode, file,
+				  cmd, (unsigned long)(&val));
+
+		set_fs(old_fs);
+		unlock_kernel();
+		switch (cmd) {
+		case LIRC_GET_FEATURES:
+		case LIRC_GET_SEND_MODE:
+		case LIRC_GET_REC_MODE:
+		case LIRC_GET_LENGTH:
+			if (!ret && put_user(val, (__u32 *)compat_ptr(arg)))
+				return -EFAULT;
+			break;
+		}
+		return ret;
+
+	case LIRC_GET_SEND_CARRIER:
+	case LIRC_GET_REC_CARRIER:
+	case LIRC_GET_SEND_DUTY_CYCLE:
+	case LIRC_GET_REC_DUTY_CYCLE:
+	case LIRC_GET_REC_RESOLUTION:
+	case LIRC_SET_SEND_CARRIER:
+	case LIRC_SET_REC_CARRIER:
+	case LIRC_SET_SEND_DUTY_CYCLE:
+	case LIRC_SET_REC_DUTY_CYCLE:
+	case LIRC_SET_TRANSMITTER_MASK:
+	case LIRC_SET_REC_DUTY_CYCLE_RANGE:
+	case LIRC_SET_REC_CARRIER_RANGE:
+		/*
+		 * These commands expect (unsigned int *)arg
+		 * so no problems here. Just handle the locking.
+		 */
+		lock_kernel();
+		cmd = cmd32;
+		ret = irctl_ioctl(file->f_dentry->d_inode,
+				  file, cmd, arg);
+		unlock_kernel();
+		return ret;
+	default:
+		/* unknown */
+		printk(KERN_ERR "lirc_dev: %s(%s:%d): Unknown cmd %08x\n",
+		       __func__, current->comm, current->pid, cmd32);
+		return -ENOIOCTLCMD;
+	}
+}
+#endif
+
+static ssize_t irctl_read(struct file *file,
+			  char *buffer,
+			  size_t length,
+			  loff_t *ppos)
+{
+	struct irctl *ir = irctls[iminor(file->f_dentry->d_inode)];
+	unsigned char buf[ir->chunk_size];
+	int ret = 0, written = 0;
+	int unlock = 1;
+	DECLARE_WAITQUEUE(wait, current);
+
+	dprintk(LOGHEAD "read called\n", ir->d.name, ir->d.minor);
+
+	/* if the driver has a specific read function use it instead */
+	if (ir->d.fops && ir->d.fops->read)
+		return ir->d.fops->read(file, buffer, length, ppos);
+
+	if (mutex_lock_interruptible(&ir->buffer_lock))
+		return -ERESTARTSYS;
+	if (!ir->attached) {
+		mutex_unlock(&ir->buffer_lock);
+		return -ENODEV;
+	}
+
+	if (length % ir->buf->chunk_size) {
+		dprintk(LOGHEAD "read result = -EINVAL\n",
+			ir->d.name, ir->d.minor);
+		mutex_unlock(&ir->buffer_lock);
+		return -EINVAL;
+	}
+
+	/*
+	 * we add ourselves to the task queue before buffer check
+	 * to avoid losing scan code (in case when queue is awaken somewhere
+	 * between while condition checking and scheduling)
+	 */
+	add_wait_queue(&ir->buf->wait_poll, &wait);
+	set_current_state(TASK_INTERRUPTIBLE);
+
+	/*
+	 * while we didn't provide 'length' bytes, device is opened in blocking
+	 * mode and 'copy_to_user' is happy, wait for data.
+	 */
+	while (written < length && ret == 0) {
+		if (lirc_buffer_empty(ir->buf)) {
+			/* According to the read(2) man page, 'written' can be
+			 * returned as less than 'length', instead of blocking
+			 * again, returning -EWOULDBLOCK, or returning
+			 * -ERESTARTSYS */
+			if (written)
+				break;
+			if (file->f_flags & O_NONBLOCK) {
+				ret = -EWOULDBLOCK;
+				break;
+			}
+			if (signal_pending(current)) {
+				ret = -ERESTARTSYS;
+				break;
+			}
+
+			mutex_unlock(&ir->buffer_lock);
+			schedule();
+			set_current_state(TASK_INTERRUPTIBLE);
+
+			if (mutex_lock_interruptible(&ir->buffer_lock)) {
+				unlock = 0;
+				ret = -ERESTARTSYS;
+				break;
+			}
+
+			if (!ir->attached) {
+				ret = -ENODEV;
+				break;
+			}
+		} else {
+			lirc_buffer_read(ir->buf, buf);
+			ret = copy_to_user((void *)buffer+written, buf,
+					   ir->buf->chunk_size);
+			written += ir->buf->chunk_size;
+		}
+	}
+
+	remove_wait_queue(&ir->buf->wait_poll, &wait);
+	set_current_state(TASK_RUNNING);
+	if(unlock) mutex_unlock(&ir->buffer_lock);
+
+	dprintk(LOGHEAD "read result = %s (%d)\n",
+		ir->d.name, ir->d.minor, ret ? "-EFAULT" : "OK", ret);
+
+	return ret ? ret : written;
+}
+
+
+void *lirc_get_pdata(struct file *file)
+{
+	void *data = NULL;
+
+	if (file && file->f_dentry && file->f_dentry->d_inode &&
+	    file->f_dentry->d_inode->i_rdev) {
+		struct irctl *ir;
+		ir = irctls[iminor(file->f_dentry->d_inode)];
+		data = ir->d.data;
+	}
+
+	return data;
+}
+EXPORT_SYMBOL(lirc_get_pdata);
+
+
+static ssize_t irctl_write(struct file *file, const char *buffer,
+			   size_t length, loff_t *ppos)
+{
+	struct irctl *ir = irctls[iminor(file->f_dentry->d_inode)];
+
+	dprintk(LOGHEAD "write called\n", ir->d.name, ir->d.minor);
+
+	/* if the driver has a specific read function use it instead */
+	if (ir->d.fops && ir->d.fops->write)
+		return ir->d.fops->write(file, buffer, length, ppos);
+
+	if (!ir->attached)
+		return -ENODEV;
+
+	return -EINVAL;
+}
+
+
+static struct file_operations fops = {
+	.owner		= THIS_MODULE,
+	.read		= irctl_read,
+	.write		= irctl_write,
+	.poll		= irctl_poll,
+	.ioctl		= irctl_ioctl,
+#ifdef CONFIG_COMPAT
+	.compat_ioctl	= irctl_compat_ioctl,
+#endif
+	.open		= irctl_open,
+	.release	= irctl_close
+};
+
+/* For now don't try to use it as a static version !  */
+#ifdef MODULE
+
+static int __init lirc_dev_init(void)
+{
+	if (register_chrdev(IRCTL_DEV_MAJOR, IRCTL_DEV_NAME, &fops)) {
+		printk(KERN_ERR "lirc_dev: register_chrdev failed\n");
+		goto out;
+	}
+
+	lirc_class = class_create(THIS_MODULE, "lirc");
+	if (IS_ERR(lirc_class)) {
+		printk(KERN_ERR "lirc_dev: class_create failed\n");
+		goto out_unregister;
+	}
+
+	printk(KERN_INFO "lirc_dev: IR Remote Control driver registered, "
+	       "major %d \n", IRCTL_DEV_MAJOR);
+
+	return 0;
+
+out_unregister:
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 23)
+	if (unregister_chrdev(IRCTL_DEV_MAJOR, IRCTL_DEV_NAME))
+		printk(KERN_ERR "lirc_dev: unregister_chrdev failed!\n");
+#else
+	/* unregister_chrdev returns void now */
+	unregister_chrdev(IRCTL_DEV_MAJOR, IRCTL_DEV_NAME);
+#endif
+out:
+	return -1;
+}
+
+static void __exit lirc_dev_exit(void)
+{
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 23)
+	int ret;
+
+	ret = unregister_chrdev(IRCTL_DEV_MAJOR, IRCTL_DEV_NAME);
+	class_destroy(lirc_class);
+
+	if (ret)
+		printk(KERN_ERR "lirc_dev: error in "
+		       "module_unregister_chrdev: %d\n", ret);
+	else
+		dprintk("lirc_dev: module successfully unloaded\n");
+#else
+	/* unregister_chrdev returns void now */
+	unregister_chrdev(IRCTL_DEV_MAJOR, IRCTL_DEV_NAME);
+	class_destroy(lirc_class);
+	dprintk("lirc_dev: module unloaded\n");
+#endif
+}
+
+module_init(lirc_dev_init);
+module_exit(lirc_dev_exit);
+
+MODULE_DESCRIPTION("LIRC base driver module");
+MODULE_AUTHOR("Artur Lipowski");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS_CHARDEV_MAJOR(IRCTL_DEV_MAJOR);
+
+module_param(debug, bool, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(debug, "Enable debugging messages");
+
+#endif /* MODULE */
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_igorplugusb/lirc_igorplugusb.c
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_igorplugusb/lirc_igorplugusb.c
@@ -0,0 +1,637 @@
+/*
+ * lirc_igorplugusb - USB remote support for LIRC
+ *
+ * Supports the standard homebrew IgorPlugUSB receiver with Igor's firmware.
+ * See http://www.cesko.host.sk/IgorPlugUSB/IgorPlug-USB%20(AVR)_eng.htm
+ *
+ * The device can only record bursts of up to 36 pulses/spaces.
+ * Works fine with RC5. Longer commands lead to device buffer overrun.
+ * (Maybe a better firmware or a microcontroller with more ram can help?)
+ *
+ * Version 0.1  [beta status]
+ *
+ * Copyright (C) 2004 Jan M. Hochstein
+ *	<hochstein@algo.informatik.tu-darmstadt.de>
+ *
+ * This driver was derived from:
+ *   Paul Miller <pmiller9@users.sourceforge.net>
+ *      "lirc_atiusb" module
+ *   Vladimir Dergachev <volodya@minspring.com>'s 2002
+ *      "USB ATI Remote support" (input device)
+ *   Adrian Dewhurst <sailor-lk@sailorfrag.net>'s 2002
+ *      "USB StreamZap remote driver" (LIRC)
+ *   Artur Lipowski <alipowski@kki.net.pl>'s 2002
+ *      "lirc_dev" and "lirc_gpio" LIRC modules
+ */
+
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <linux/version.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 4, 0)
+#error "*******************************************************"
+#error "Sorry, this driver needs kernel version 2.4.0 or higher"
+#error "*******************************************************"
+#endif
+
+#include <linux/autoconf.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/kmod.h>
+#include <linux/sched.h>
+#include <linux/errno.h>
+#include <linux/ioctl.h>
+#include <linux/fs.h>
+#include <linux/usb.h>
+#include <linux/poll.h>
+#include <linux/smp_lock.h>
+#include <linux/time.h>
+
+#include "../kcompat.h"
+#include "../lirc.h"
+#include "../lirc_dev/lirc_dev.h"
+
+#if !defined(KERNEL_2_5)
+#define USB_CTRL_GET_TIMEOUT    5
+#endif
+
+/* module identification */
+#define DRIVER_VERSION		"0.2"
+#define DRIVER_AUTHOR		\
+	"Jan M. Hochstein <hochstein@algo.informatik.tu-darmstadt.de>"
+#define DRIVER_DESC		"USB remote driver for LIRC"
+#define DRIVER_NAME		"lirc_igorplugusb"
+
+/* debugging support */
+#ifdef CONFIG_USB_DEBUG
+static int debug = 1;
+#else
+static int debug;
+#endif
+
+#define dprintk(fmt, args...)					\
+	do {							\
+		if (debug)					\
+			printk(KERN_DEBUG DRIVER_NAME fmt, ## args);	\
+	} while (0)
+
+/* One mode2 pulse/space has 4 bytes. */
+#define CODE_LENGTH	     sizeof(lirc_t)
+
+/* Igor's firmware cannot record bursts longer than 36. */
+#define DEVICE_BUFLEN	   36
+
+/*
+ * Header at the beginning of the device's buffer:
+ *	unsigned char data_length
+ *	unsigned char data_start    (!=0 means ring-buffer overrun)
+ *	unsigned char counter       (incremented by each burst)
+ */
+#define DEVICE_HEADERLEN	3
+
+/* This is for the gap */
+#define ADDITIONAL_LIRC_BYTES   2
+
+/* times to poll per second */
+#define SAMPLE_RATE	     100
+static int sample_rate = SAMPLE_RATE;
+
+
+/**** Igor's USB Request Codes */
+
+#define SET_INFRABUFFER_EMPTY   1
+/**
+ * Params: none
+ * Answer: empty
+ */
+
+#define GET_INFRACODE	   2
+/**
+ * Params:
+ *   wValue: offset to begin reading infra buffer
+ *
+ * Answer: infra data
+ */
+
+#define SET_DATAPORT_DIRECTION  3
+/**
+ * Params:
+ *   wValue: (byte) 1 bit for each data port pin (0=in, 1=out)
+ *
+ * Answer: empty
+ */
+
+#define GET_DATAPORT_DIRECTION  4
+/**
+ * Params: none
+ *
+ * Answer: (byte) 1 bit for each data port pin (0=in, 1=out)
+ */
+
+#define SET_OUT_DATAPORT	5
+/**
+ * Params:
+ *   wValue: byte to write to output data port
+ *
+ * Answer: empty
+ */
+
+#define GET_OUT_DATAPORT	6
+/**
+ * Params: none
+ *
+ * Answer: least significant 3 bits read from output data port
+ */
+
+#define GET_IN_DATAPORT	 7
+/**
+ * Params: none
+ *
+ * Answer: least significant 3 bits read from input data port
+ */
+
+#define READ_EEPROM	     8
+/**
+ * Params:
+ *   wValue: offset to begin reading EEPROM
+ *
+ * Answer: EEPROM bytes
+ */
+
+#define WRITE_EEPROM	    9
+/**
+ * Params:
+ *   wValue: offset to EEPROM byte
+ *   wIndex: byte to write
+ *
+ * Answer: empty
+ */
+
+#define SEND_RS232	      10
+/**
+ * Params:
+ *   wValue: byte to send
+ *
+ * Answer: empty
+ */
+
+#define RECV_RS232	      11
+/**
+ * Params: none
+ *
+ * Answer: byte received
+ */
+
+#define SET_RS232_BAUD	  12
+/**
+ * Params:
+ *   wValue: byte to write to UART bit rate register (UBRR)
+ *
+ * Answer: empty
+ */
+
+#define GET_RS232_BAUD	  13
+/**
+ * Params: none
+ *
+ * Answer: byte read from UART bit rate register (UBRR)
+ */
+
+
+/* data structure for each usb remote */
+struct igorplug {
+
+	/* usb */
+	struct usb_device *usbdev;
+	struct urb *urb_in;
+	int devnum;
+
+	unsigned char *buf_in;
+	unsigned int len_in;
+	int in_space;
+	struct timeval last_time;
+
+#if defined(KERNEL_2_5)
+	dma_addr_t dma_in;
+#endif
+
+	/* lirc */
+	struct lirc_driver *d;
+
+	/* handle sending (init strings) */
+	int send_flags;
+};
+
+static int set_use_inc(void *data)
+{
+	struct igorplug *ir = data;
+
+	if (!ir) {
+		printk(KERN_ERR DRIVER_NAME
+		       "[?]: set_use_inc called with no context\n");
+		return -EIO;
+	}
+	dprintk("[%d]: set use inc\n", ir->devnum);
+
+	MOD_INC_USE_COUNT;
+
+	if (!ir->usbdev)
+		return -ENODEV;
+
+	return 0;
+}
+
+static void set_use_dec(void *data)
+{
+	struct igorplug *ir = data;
+
+	if (!ir) {
+		printk(KERN_ERR DRIVER_NAME
+		       "[?]: set_use_dec called with no context\n");
+		return;
+	}
+	dprintk("[%d]: set use dec\n", ir->devnum);
+
+	MOD_DEC_USE_COUNT;
+}
+
+static void send_fragment(struct igorplug *ir, struct lirc_buffer *buf,
+			   int i, int max)
+{
+	/* MODE2: pulse/space (PULSE_BIT) in 1us units */
+	while (i < max) {
+		/* 1 Igor-tick = 85.333333 us */
+		lirc_t code = (unsigned int)ir->buf_in[i] * 85 +
+			(unsigned int)ir->buf_in[i] / 3;
+		ir->last_time.tv_usec += code;
+		if (ir->in_space)
+			code |= PULSE_BIT;
+		lirc_buffer_write_n(buf, (unsigned char *)&code, 1);
+		/* 1 chunk = CODE_LENGTH bytes */
+		ir->in_space ^= 1;
+		++i;
+	}
+}
+
+/**
+ * Called in user context.
+ * return 0 if data was added to the buffer and
+ * -ENODATA if none was available. This should add some number of bits
+ * evenly divisible by code_length to the buffer
+ */
+static int usb_remote_poll(void *data, struct lirc_buffer *buf)
+{
+	int ret;
+	struct igorplug *ir = (struct igorplug *)data;
+
+	if (!ir->usbdev)  /* Has the device been removed? */
+		return -ENODEV;
+
+	memset(ir->buf_in, 0, ir->len_in);
+
+	ret = usb_control_msg(
+	      ir->usbdev, usb_rcvctrlpipe(ir->usbdev, 0),
+	      GET_INFRACODE, USB_TYPE_VENDOR|USB_DIR_IN,
+	      0/* offset */, /*unused*/0,
+	      ir->buf_in, ir->len_in,
+	      /*timeout*/HZ * USB_CTRL_GET_TIMEOUT);
+	if (ret > 0) {
+		lirc_t code, timediff;
+		struct timeval now;
+
+		/* ACK packet has 1 byte --> ignore */
+		if (ret < DEVICE_HEADERLEN)
+			return -ENODATA;
+
+		dprintk(": Got %d bytes. Header: %02x %02x %02x\n",
+			ret, ir->buf_in[0], ir->buf_in[1], ir->buf_in[2]);
+
+		do_gettimeofday(&now);
+		timediff = now.tv_sec - ir->last_time.tv_sec;
+		if (timediff + 1 > PULSE_MASK / 1000000)
+			timediff = PULSE_MASK;
+		else {
+			timediff *= 1000000;
+			timediff += now.tv_usec - ir->last_time.tv_usec;
+		}
+		ir->last_time.tv_sec = now.tv_sec;
+		ir->last_time.tv_usec = now.tv_usec;
+
+		/* create leading gap  */
+		code = timediff;
+		lirc_buffer_write(buf, (unsigned char *)&code);
+		ir->in_space = 1;   /* next comes a pulse */
+
+		if (ir->buf_in[2] == 0)
+			send_fragment(ir, buf, DEVICE_HEADERLEN, ret);
+		else {
+			printk(KERN_WARNING DRIVER_NAME
+			       "[%d]: Device buffer overrun.\n", ir->devnum);
+			/* HHHNNNNNNNNNNNOOOOOOOO H = header
+			      <---[2]--->         N = newer
+			   <---------ret--------> O = older */
+			ir->buf_in[2] %= ret - DEVICE_HEADERLEN; /* sanitize */
+			/* keep even-ness to not desync pulse/pause */
+			send_fragment(ir, buf, DEVICE_HEADERLEN +
+				      ir->buf_in[2] - (ir->buf_in[2] & 1),
+				      ret);
+			send_fragment(ir, buf, DEVICE_HEADERLEN,
+				      DEVICE_HEADERLEN + ir->buf_in[2]);
+		}
+
+		ret = usb_control_msg(
+		      ir->usbdev, usb_rcvctrlpipe(ir->usbdev, 0),
+		      SET_INFRABUFFER_EMPTY, USB_TYPE_VENDOR|USB_DIR_IN,
+		      /*unused*/0, /*unused*/0,
+		      /*dummy*/ir->buf_in, /*dummy*/ir->len_in,
+		      /*timeout*/HZ * USB_CTRL_GET_TIMEOUT);
+		if (ret < 0)
+			printk(KERN_WARNING DRIVER_NAME
+			       "[%d]: SET_INFRABUFFER_EMPTY: error %d\n",
+			       ir->devnum, ret);
+		return 0;
+	} else
+		printk(KERN_WARNING DRIVER_NAME
+		       "[%d]: GET_INFRACODE: error %d\n",
+			ir->devnum, ret);
+
+	return -ENODATA;
+}
+
+
+
+#if defined(KERNEL_2_5)
+static int usb_remote_probe(struct usb_interface *intf,
+				const struct usb_device_id *id)
+{
+	struct usb_device *dev = NULL;
+	struct usb_host_interface *idesc = NULL;
+	struct usb_host_endpoint *ep_ctl2;
+#else
+static void *usb_remote_probe(struct usb_device *dev, unsigned int ifnum,
+				const struct usb_device_id *id)
+{
+	struct usb_interface *intf;
+	struct usb_interface_descriptor *idesc;
+	struct usb_endpoint_descriptor *ep_ctl2;
+#endif
+	struct igorplug *ir = NULL;
+	struct lirc_driver *driver = NULL;
+	int devnum, pipe, maxp;
+	int minor = 0;
+	char buf[63], name[128] = "";
+	int mem_failure = 0;
+	int ret;
+
+	dprintk(": usb probe called.\n");
+
+#if defined(KERNEL_2_5)
+	dev = interface_to_usbdev(intf);
+
+#  if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 5)
+	idesc = &intf->altsetting[intf->act_altsetting];  /* in 2.6.4 */
+#  else
+	idesc = intf->cur_altsetting;  /* in 2.6.6 */
+#  endif
+
+	if (idesc->desc.bNumEndpoints != 1)
+		return -ENODEV;
+	ep_ctl2 = idesc->endpoint;
+	if (((ep_ctl2->desc.bEndpointAddress & USB_ENDPOINT_DIR_MASK)
+	    != USB_DIR_IN)
+	    || (ep_ctl2->desc.bmAttributes & USB_ENDPOINT_XFERTYPE_MASK)
+	    != USB_ENDPOINT_XFER_CONTROL)
+		return -ENODEV;
+	pipe = usb_rcvctrlpipe(dev, ep_ctl2->desc.bEndpointAddress);
+#else
+	intf = &dev->actconfig->interface[ifnum];
+	idesc = &intf->altsetting[intf->act_altsetting];
+	if (idesc->bNumEndpoints != 1)
+		return NULL;
+	ep_ctl2 = idesc->endpoint;
+	if (((ep_ctl2->bEndpointAddress & USB_ENDPOINT_DIR_MASK)
+	    != USB_DIR_IN)
+	    || (ep_ctl2->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK)
+	    != USB_ENDPOINT_XFER_CONTROL)
+		return NULL;
+	pipe = usb_rcvctrlpipe(dev, ep_ctl2->bEndpointAddress);
+#endif
+	devnum = dev->devnum;
+	maxp = usb_maxpacket(dev, pipe, usb_pipeout(pipe));
+
+	dprintk(DRIVER_NAME "[%d]: bytes_in_key=%d maxp=%d\n",
+		devnum, CODE_LENGTH, maxp);
+
+
+	mem_failure = 0;
+	ir = kzalloc(sizeof(struct igorplug), GFP_KERNEL);
+	if (!ir) {
+		mem_failure = 1;
+		goto mem_failure_switch;
+	}
+
+	driver = kzalloc(sizeof(struct lirc_driver), GFP_KERNEL);
+	if (!driver) {
+		mem_failure = 2;
+		goto mem_failure_switch;
+	}
+
+#if defined(KERNEL_2_5)
+	ir->buf_in = usb_buffer_alloc(dev,
+			      DEVICE_BUFLEN+DEVICE_HEADERLEN,
+			      GFP_ATOMIC, &ir->dma_in);
+#else
+	ir->buf_in = kmalloc(DEVICE_BUFLEN+DEVICE_HEADERLEN,
+			     GFP_KERNEL);
+#endif
+	if (!ir->buf_in) {
+		mem_failure = 3;
+		goto mem_failure_switch;
+	}
+
+	strcpy(driver->name, DRIVER_NAME " ");
+	driver->minor = -1;
+	driver->code_length = CODE_LENGTH * 8; /* in bits */
+	driver->features = LIRC_CAN_REC_MODE2;
+	driver->data = ir;
+	driver->buffer_size = DEVICE_BUFLEN + ADDITIONAL_LIRC_BYTES;
+	driver->set_use_inc = &set_use_inc;
+	driver->set_use_dec = &set_use_dec;
+	driver->sample_rate = sample_rate;    /* per second */
+	driver->add_to_buf = &usb_remote_poll;
+#ifdef LIRC_HAVE_SYSFS
+	driver->dev = &intf->dev;
+#endif
+	driver->owner = THIS_MODULE;
+
+	minor = lirc_register_driver(driver);
+	if (minor < 0)
+		mem_failure = 9;
+
+mem_failure_switch:
+
+	switch (mem_failure) {
+	case 9:
+#if defined(KERNEL_2_5)
+		usb_buffer_free(dev, DEVICE_BUFLEN+DEVICE_HEADERLEN,
+			ir->buf_in, ir->dma_in);
+#else
+		kfree(ir->buf_in);
+#endif
+	case 3:
+		kfree(driver);
+	case 2:
+		kfree(ir);
+	case 1:
+		printk(KERN_ERR DRIVER_NAME "[%d]: out of memory (code=%d)\n",
+			devnum, mem_failure);
+#if defined(KERNEL_2_5)
+		return -ENOMEM;
+#else
+		return NULL;
+#endif
+	}
+
+	driver->minor = minor;
+	ir->d = driver;
+	ir->devnum = devnum;
+	ir->usbdev = dev;
+	ir->len_in = DEVICE_BUFLEN+DEVICE_HEADERLEN;
+	ir->in_space = 1; /* First mode2 event is a space. */
+	do_gettimeofday(&ir->last_time);
+
+	if (dev->descriptor.iManufacturer
+	    && usb_string(dev, dev->descriptor.iManufacturer,
+			  buf, sizeof(buf)) > 0)
+		strlcpy(name, buf, sizeof(name));
+	if (dev->descriptor.iProduct
+	    && usb_string(dev, dev->descriptor.iProduct, buf, sizeof(buf)) > 0)
+		snprintf(name + strlen(name), sizeof(name) - strlen(name),
+			 " %s", buf);
+	printk(KERN_INFO DRIVER_NAME "[%d]: %s on usb%d:%d\n", devnum, name,
+	       dev->bus->busnum, devnum);
+
+	/* clear device buffer */
+	ret = usb_control_msg(ir->usbdev, usb_rcvctrlpipe(ir->usbdev, 0),
+		SET_INFRABUFFER_EMPTY, USB_TYPE_VENDOR|USB_DIR_IN,
+		/*unused*/0, /*unused*/0,
+		/*dummy*/ir->buf_in, /*dummy*/ir->len_in,
+		/*timeout*/HZ * USB_CTRL_GET_TIMEOUT);
+	if (ret < 0)
+		printk(KERN_WARNING DRIVER_NAME
+		       "[%d]: SET_INFRABUFFER_EMPTY: error %d\n",
+			devnum, ret);
+
+#if defined(KERNEL_2_5)
+	usb_set_intfdata(intf, ir);
+	return 0;
+#else
+	return ir;
+#endif
+}
+
+
+#if defined(KERNEL_2_5)
+static void usb_remote_disconnect(struct usb_interface *intf)
+{
+	struct usb_device *dev = interface_to_usbdev(intf);
+	struct igorplug *ir = usb_get_intfdata(intf);
+#else
+static void usb_remote_disconnect(struct usb_device *dev, void *ptr)
+{
+	struct igorplug *ir = ptr;
+#endif
+
+	if (!ir || !ir->d)
+		return;
+
+	printk(KERN_INFO DRIVER_NAME
+	       "[%d]: usb remote disconnected\n", ir->devnum);
+
+	lirc_unregister_driver(ir->d->minor);
+
+	lirc_buffer_free(ir->d->rbuf);
+	kfree(ir->d->rbuf);
+	kfree(ir->d);
+
+
+#if defined(KERNEL_2_5)
+	usb_buffer_free(dev, ir->len_in, ir->buf_in, ir->dma_in);
+#else
+	kfree(ir->buf_in);
+#endif
+
+	kfree(ir);
+}
+
+static struct usb_device_id usb_remote_id_table [] = {
+	/* Igor Plug USB (Atmel's Manufact. ID) */
+	{ USB_DEVICE(0x03eb, 0x0002) },
+	/* Fit PC2 Infrared Adapter */
+	{ USB_DEVICE(0x03eb, 0x21fe) },
+
+	/* Terminating entry */
+	{ }
+};
+
+static struct usb_driver usb_remote_driver = {
+	LIRC_THIS_MODULE(.owner = THIS_MODULE)
+	.name =		DRIVER_NAME,
+	.probe =	usb_remote_probe,
+	.disconnect =	usb_remote_disconnect,
+	.id_table =	usb_remote_id_table
+};
+
+static int __init usb_remote_init(void)
+{
+	int i;
+
+	printk(KERN_INFO DRIVER_NAME ": " DRIVER_DESC " v" DRIVER_VERSION "\n");
+	printk(KERN_INFO DRIVER_NAME ": " DRIVER_AUTHOR "\n");
+	dprintk(": debug mode enabled\n");
+
+	i = usb_register(&usb_remote_driver);
+	if (i < 0) {
+		printk(KERN_ERR DRIVER_NAME
+		       ": usb register failed, result = %d\n", i);
+		return -ENODEV;
+	}
+
+	return 0;
+}
+
+static void __exit usb_remote_exit(void)
+{
+	usb_deregister(&usb_remote_driver);
+}
+
+module_init(usb_remote_init);
+module_exit(usb_remote_exit);
+
+#if defined(KERNEL_2_5)
+#include <linux/vermagic.h>
+MODULE_INFO(vermagic, VERMAGIC_STRING);
+#endif
+
+MODULE_DESCRIPTION(DRIVER_DESC);
+MODULE_AUTHOR(DRIVER_AUTHOR);
+MODULE_LICENSE("GPL");
+MODULE_DEVICE_TABLE(usb, usb_remote_id_table);
+
+module_param(sample_rate, int, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(sample_rate, "Sampling rate in Hz (default: 100)");
+
+EXPORT_NO_SYMBOLS;
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_igorplugusb/Makefile
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_igorplugusb/Makefile
@@ -0,0 +1,3 @@
+EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)/..
+
+obj-$(CONFIG_LIRC_IGORPLUGUSB)	+= lirc_igorplugusb.o
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_parallel/Makefile
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_parallel/Makefile
@@ -0,0 +1,3 @@
+EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)/..
+
+obj-$(CONFIG_LIRC_PARALLEL)	+= lirc_parallel.o
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_parallel/lirc_parallel.h
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_parallel/lirc_parallel.h
@@ -0,0 +1,26 @@
+/*      $Id: lirc_parallel.h,v 5.2 2007/01/25 04:32:05 lirc Exp $      */
+
+#ifndef _LIRC_PARALLEL_H
+#define _LIRC_PARALLEL_H
+
+#include <linux/lp.h>
+
+#define LIRC_PORT_LEN 3
+
+#define LIRC_LP_BASE    0
+#define LIRC_LP_STATUS  1
+#define LIRC_LP_CONTROL 2
+
+#define LIRC_PORT_DATA           LIRC_LP_BASE    /* base */
+#define LIRC_PORT_TIMER        LIRC_LP_STATUS    /* status port */
+#define LIRC_PORT_TIMER_BIT          LP_PBUSY    /* busy signal */
+#define LIRC_PORT_SIGNAL       LIRC_LP_STATUS    /* status port */
+#define LIRC_PORT_SIGNAL_BIT          LP_PACK    /* ack signal */
+#define LIRC_PORT_IRQ         LIRC_LP_CONTROL    /* control port */
+
+#define LIRC_SFH506_DELAY 0             /* delay t_phl in usecs */
+
+#define LIRC_PARALLEL_MAX_TRANSMITTERS 8
+#define LIRC_PARALLEL_TRANSMITTER_MASK ((1<<LIRC_PARALLEL_MAX_TRANSMITTERS) - 1)
+
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_parallel/lirc_parallel.c
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_parallel/lirc_parallel.c
@@ -0,0 +1,764 @@
+/*      $Id: lirc_parallel.c,v 5.53 2009/03/08 19:22:28 lirc Exp $      */
+/*
+ * lirc_parallel.c
+ *
+ * lirc_parallel - device driver for infra-red signal receiving and
+ *                 transmitting unit built by the author
+ *
+ * Copyright (C) 1998 Christoph Bartelmus <lirc@bartelmus.de>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+
+/*** Includes ***/
+#ifdef HAVE_CONFIG_H
+# include <config.h>
+#endif
+#include <linux/version.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 2, 18)
+#error "**********************************************************"
+#error " Sorry, this driver needs kernel version 2.2.18 or higher "
+#error "**********************************************************"
+#endif
+
+#include <linux/autoconf.h>
+#ifdef CONFIG_SMP
+#error "--- Sorry, this driver is not SMP safe. ---"
+#endif
+
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/errno.h>
+#include <linux/signal.h>
+#include <linux/autoconf.h>
+#include <linux/fs.h>
+#include <linux/kernel.h>
+#include <linux/ioport.h>
+#include <linux/time.h>
+#include <linux/mm.h>
+#include <linux/delay.h>
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18)
+#include <asm/io.h>
+#include <asm/signal.h>
+#include <asm/irq.h>
+#include <asm/uaccess.h>
+#else
+#include <linux/io.h>
+#include <linux/signal.h>
+#include <linux/irq.h>
+#include <linux/uaccess.h>
+#endif
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 4, 0)
+#include <asm/div64.h>
+#endif
+
+#include <linux/poll.h>
+#include <linux/parport.h>
+
+#include "../lirc.h"
+#include "../kcompat.h"
+#include "../lirc_dev/lirc_dev.h"
+
+#include "lirc_parallel.h"
+
+#define LIRC_DRIVER_NAME "lirc_parallel"
+
+#ifndef LIRC_IRQ
+#define LIRC_IRQ 7
+#endif
+#ifndef LIRC_PORT
+#define LIRC_PORT 0x378
+#endif
+#ifndef LIRC_TIMER
+#define LIRC_TIMER 65536
+#endif
+
+/*** Global Variables ***/
+
+static int debug;
+static int check_pselecd;
+
+unsigned int irq = LIRC_IRQ;
+unsigned int io = LIRC_PORT;
+#ifdef LIRC_TIMER
+unsigned int timer;
+unsigned int default_timer = LIRC_TIMER;
+#endif
+
+#define WBUF_SIZE (256)
+#define RBUF_SIZE (256) /* this must be a power of 2 larger than 1 */
+
+static lirc_t wbuf[WBUF_SIZE];
+static lirc_t rbuf[RBUF_SIZE];
+
+DECLARE_WAIT_QUEUE_HEAD(lirc_wait);
+
+unsigned int rptr;
+unsigned int wptr;
+unsigned int lost_irqs;
+int is_open;
+
+struct parport *pport;
+struct pardevice *ppdevice;
+int is_claimed;
+
+unsigned int tx_mask = 1;
+
+/*** Internal Functions ***/
+
+static unsigned int in(int offset)
+{
+	switch (offset) {
+	case LIRC_LP_BASE:
+		return parport_read_data(pport);
+	case LIRC_LP_STATUS:
+		return parport_read_status(pport);
+	case LIRC_LP_CONTROL:
+		return parport_read_control(pport);
+	}
+	return 0; /* make compiler happy */
+}
+
+static void out(int offset, int value)
+{
+	switch (offset) {
+	case LIRC_LP_BASE:
+		parport_write_data(pport, value);
+		break;
+	case LIRC_LP_CONTROL:
+		parport_write_control(pport, value);
+		break;
+	case LIRC_LP_STATUS:
+		printk(KERN_INFO "%s: attempt to write to status register\n",
+		       LIRC_DRIVER_NAME);
+		break;
+	}
+}
+
+static unsigned int lirc_get_timer(void)
+{
+	return in(LIRC_PORT_TIMER) & LIRC_PORT_TIMER_BIT;
+}
+
+static unsigned int lirc_get_signal(void)
+{
+	return in(LIRC_PORT_SIGNAL) & LIRC_PORT_SIGNAL_BIT;
+}
+
+static void lirc_on(void)
+{
+	out(LIRC_PORT_DATA, tx_mask);
+}
+
+static void lirc_off(void)
+{
+	out(LIRC_PORT_DATA, 0);
+}
+
+static unsigned int init_lirc_timer(void)
+{
+	struct timeval tv, now;
+	unsigned int level, newlevel, timeelapsed, newtimer;
+	int count = 0;
+
+	do_gettimeofday(&tv);
+	tv.tv_sec++;                     /* wait max. 1 sec. */
+	level = lirc_get_timer();
+	do {
+		newlevel = lirc_get_timer();
+		if (level == 0 && newlevel != 0)
+			count++;
+		level = newlevel;
+		do_gettimeofday(&now);
+	} while (count < 1000 && (now.tv_sec < tv.tv_sec
+			     || (now.tv_sec == tv.tv_sec
+				 && now.tv_usec < tv.tv_usec)));
+
+	timeelapsed = ((now.tv_sec + 1 - tv.tv_sec)*1000000
+		     + (now.tv_usec - tv.tv_usec));
+	if (count >= 1000 && timeelapsed > 0) {
+		if (default_timer == 0) {
+			/* autodetect timer */
+			newtimer = (1000000*count)/timeelapsed;
+			printk(KERN_INFO "%s: %u Hz timer detected\n",
+			       LIRC_DRIVER_NAME, newtimer);
+			return newtimer;
+		}  else {
+			newtimer = (1000000*count)/timeelapsed;
+			if (abs(newtimer - default_timer) > default_timer/10) {
+				/* bad timer */
+				printk(KERN_NOTICE "%s: bad timer: %u Hz\n",
+				       LIRC_DRIVER_NAME, newtimer);
+				printk(KERN_NOTICE "%s: using default timer: "
+				       "%u Hz\n",
+				       LIRC_DRIVER_NAME, default_timer);
+				return default_timer;
+			} else {
+				printk(KERN_INFO "%s: %u Hz timer detected\n",
+				       LIRC_DRIVER_NAME, newtimer);
+				return newtimer; /* use detected value */
+			}
+		}
+	} else {
+		printk(KERN_NOTICE "%s: no timer detected\n", LIRC_DRIVER_NAME);
+		return 0;
+	}
+}
+
+static int lirc_claim(void)
+{
+	if (parport_claim(ppdevice) != 0) {
+		printk(KERN_WARNING "%s: could not claim port\n",
+		       LIRC_DRIVER_NAME);
+		printk(KERN_WARNING "%s: waiting for port becoming available"
+		       "\n", LIRC_DRIVER_NAME);
+		if (parport_claim_or_block(ppdevice) < 0) {
+			printk(KERN_NOTICE "%s: could not claim port, giving"
+			       " up\n", LIRC_DRIVER_NAME);
+			return 0;
+		}
+	}
+	out(LIRC_LP_CONTROL, LP_PSELECP|LP_PINITP);
+	is_claimed = 1;
+	return 1;
+}
+
+/*** interrupt handler ***/
+
+static void rbuf_write(lirc_t signal)
+{
+	unsigned int nwptr;
+
+	nwptr = (wptr + 1) & (RBUF_SIZE - 1);
+	if (nwptr == rptr) {
+		/* no new signals will be accepted */
+		lost_irqs++;
+		printk(KERN_NOTICE "%s: buffer overrun\n", LIRC_DRIVER_NAME);
+		return;
+	}
+	rbuf[wptr] = signal;
+	wptr = nwptr;
+}
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19)
+static void irq_handler(int i, void *blah, struct pt_regs *regs)
+#elif LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24)
+static void irq_handler(int i, void *blah)
+#else
+static void irq_handler(void *blah)
+#endif
+{
+	struct timeval tv;
+	static struct timeval lasttv;
+	static int init;
+	long signal;
+	lirc_t data;
+	unsigned int level, newlevel;
+	unsigned int timeout;
+
+	if (!MOD_IN_USE)
+		return;
+
+	if (!is_claimed)
+		return;
+
+#if 0
+	/* disable interrupt */
+	disable_irq(irq);
+	out(LIRC_PORT_IRQ, in(LIRC_PORT_IRQ) & (~LP_PINTEN));
+#endif
+	if (check_pselecd && (in(1) & LP_PSELECD))
+		return;
+
+#ifdef LIRC_TIMER
+	if (init) {
+		do_gettimeofday(&tv);
+
+		signal = tv.tv_sec - lasttv.tv_sec;
+		if (signal > 15)
+			/* really long time */
+			data = PULSE_MASK;
+		else
+			data = (lirc_t) (signal*1000000 +
+					 tv.tv_usec - lasttv.tv_usec +
+					 LIRC_SFH506_DELAY);
+
+		rbuf_write(data); /* space */
+	} else {
+		if (timer == 0) {
+			/*
+			 * wake up; we'll lose this signal, but it will be
+			 * garbage if the device is turned on anyway
+			 */
+			timer = init_lirc_timer();
+			/* enable_irq(irq); */
+			return;
+		}
+		init = 1;
+	}
+
+	timeout = timer/10;	/* timeout after 1/10 sec. */
+	signal = 1;
+	level = lirc_get_timer();
+	do {
+		newlevel = lirc_get_timer();
+		if (level == 0 && newlevel != 0)
+			signal++;
+		level = newlevel;
+
+		/* giving up */
+		if (signal > timeout
+		    || (check_pselecd && (in(1) & LP_PSELECD))) {
+			signal = 0;
+			printk(KERN_NOTICE "%s: timeout\n", LIRC_DRIVER_NAME);
+			break;
+		}
+	} while (lirc_get_signal());
+
+	if (signal != 0) {
+		/* adjust value to usecs */
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 4, 0)
+		unsigned long long helper;
+
+		helper = ((unsigned long long) signal)*1000000;
+		do_div(helper, timer);
+		signal = (long) helper;
+#else
+		signal = (long) ((((double) signal)*1000000)/timer);
+#endif
+
+		if (signal > LIRC_SFH506_DELAY)
+			data = signal - LIRC_SFH506_DELAY;
+		else
+			data = 1;
+		rbuf_write(PULSE_BIT|data); /* pulse */
+	}
+	do_gettimeofday(&lasttv);
+#else
+	/* add your code here */
+#endif
+
+	wake_up_interruptible(&lirc_wait);
+
+	/* enable interrupt */
+	/*
+	  enable_irq(irq);
+	  out(LIRC_PORT_IRQ, in(LIRC_PORT_IRQ)|LP_PINTEN);
+	*/
+}
+
+/*** file operations ***/
+
+static loff_t lirc_lseek(struct file *filep, loff_t offset, int orig)
+{
+	return -ESPIPE;
+}
+
+static ssize_t lirc_read(struct file *filep, char *buf, size_t n, loff_t *ppos)
+{
+	int result = 0;
+	int count = 0;
+	DECLARE_WAITQUEUE(wait, current);
+
+	if (n % sizeof(lirc_t))
+		return -EINVAL;
+
+	add_wait_queue(&lirc_wait, &wait);
+	set_current_state(TASK_INTERRUPTIBLE);
+	while (count < n) {
+		if (rptr != wptr) {
+			if (copy_to_user(buf+count, (char *) &rbuf[rptr],
+					 sizeof(lirc_t))) {
+				result = -EFAULT;
+				break;
+			}
+			rptr = (rptr + 1) & (RBUF_SIZE - 1);
+			count += sizeof(lirc_t);
+		} else {
+			if (filep->f_flags & O_NONBLOCK) {
+				result = -EAGAIN;
+				break;
+			}
+			if (signal_pending(current)) {
+				result = -ERESTARTSYS;
+				break;
+			}
+			schedule();
+			set_current_state(TASK_INTERRUPTIBLE);
+		}
+	}
+	remove_wait_queue(&lirc_wait, &wait);
+	set_current_state(TASK_RUNNING);
+	return count ? count : result;
+}
+
+static ssize_t lirc_write(struct file *filep, const char *buf, size_t n,
+			  loff_t *ppos)
+{
+	int count;
+	unsigned int i;
+	unsigned int level, newlevel;
+	unsigned long flags;
+	lirc_t counttimer;
+
+	if (!is_claimed)
+		return -EBUSY;
+
+	if (n % sizeof(lirc_t))
+		return -EINVAL;
+
+	count = n / sizeof(lirc_t);
+
+	if (count > WBUF_SIZE || count % 2 == 0)
+		return -EINVAL;
+
+	if (copy_from_user(wbuf, buf, n))
+		return -EFAULT;
+
+#ifdef LIRC_TIMER
+	if (timer == 0) {
+		/* try again if device is ready */
+		timer = init_lirc_timer();
+		if (timer == 0)
+			return -EIO;
+	}
+
+	/* adjust values from usecs */
+	for (i = 0; i < count; i++) {
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 4, 0)
+		unsigned long long helper;
+
+		helper = ((unsigned long long) wbuf[i])*timer;
+		do_div(helper, 1000000);
+		wbuf[i] = (lirc_t) helper;
+#else
+		wbuf[i] = (lirc_t) (((double) wbuf[i])*timer/1000000);
+#endif
+	}
+
+	local_irq_save(flags);
+	i = 0;
+	while (i < count) {
+		level = lirc_get_timer();
+		counttimer = 0;
+		lirc_on();
+		do {
+			newlevel = lirc_get_timer();
+			if (level == 0 && newlevel != 0)
+				counttimer++;
+			level = newlevel;
+			if (check_pselecd && (in(1) & LP_PSELECD)) {
+				lirc_off();
+				local_irq_restore(flags);
+				return -EIO;
+			}
+		} while (counttimer < wbuf[i]);
+		i++;
+
+		lirc_off();
+		if (i == count)
+			break;
+		counttimer = 0;
+		do {
+			newlevel = lirc_get_timer();
+			if (level == 0 && newlevel != 0)
+				counttimer++;
+			level = newlevel;
+			if (check_pselecd && (in(1) & LP_PSELECD)) {
+				local_irq_restore(flags);
+				return -EIO;
+			}
+		} while (counttimer < wbuf[i]);
+		i++;
+	}
+	local_irq_restore(flags);
+#else
+	/* place code that handles write without external timer here */
+#endif
+	return n;
+}
+
+static unsigned int lirc_poll(struct file *file, poll_table *wait)
+{
+	poll_wait(file, &lirc_wait, wait);
+	if (rptr != wptr)
+		return POLLIN | POLLRDNORM;
+	return 0;
+}
+
+static int lirc_ioctl(struct inode *node, struct file *filep, unsigned int cmd,
+		      unsigned long arg)
+{
+	int result;
+	unsigned long features = LIRC_CAN_SET_TRANSMITTER_MASK |
+				 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2;
+	unsigned long mode;
+	unsigned int ivalue;
+
+	switch (cmd) {
+	case LIRC_GET_FEATURES:
+		result = put_user(features, (unsigned long *) arg);
+		if (result)
+			return result;
+		break;
+	case LIRC_GET_SEND_MODE:
+		result = put_user(LIRC_MODE_PULSE, (unsigned long *) arg);
+		if (result)
+			return result;
+		break;
+	case LIRC_GET_REC_MODE:
+		result = put_user(LIRC_MODE_MODE2, (unsigned long *) arg);
+		if (result)
+			return result;
+		break;
+	case LIRC_SET_SEND_MODE:
+		result = get_user(mode, (unsigned long *) arg);
+		if (result)
+			return result;
+		if (mode != LIRC_MODE_PULSE)
+			return -EINVAL;
+		break;
+	case LIRC_SET_REC_MODE:
+		result = get_user(mode, (unsigned long *) arg);
+		if (result)
+			return result;
+		if (mode != LIRC_MODE_MODE2)
+			return -ENOSYS;
+		break;
+	case LIRC_SET_TRANSMITTER_MASK:
+		result = get_user(ivalue, (unsigned int *) arg);
+		if (result)
+			return result;
+		if ((ivalue & LIRC_PARALLEL_TRANSMITTER_MASK) != ivalue)
+			return LIRC_PARALLEL_MAX_TRANSMITTERS;
+		tx_mask = ivalue;
+		break;
+	default:
+		return -ENOIOCTLCMD;
+	}
+	return 0;
+}
+
+static int lirc_open(struct inode *node, struct file *filep)
+{
+	if (MOD_IN_USE || !lirc_claim())
+		return -EBUSY;
+
+	parport_enable_irq(pport);
+
+	/* init read ptr */
+	rptr = 0;
+	wptr = 0;
+	lost_irqs = 0;
+
+	MOD_INC_USE_COUNT;
+	is_open = 1;
+	return 0;
+}
+
+static int lirc_close(struct inode *node, struct file *filep)
+{
+	if (is_claimed) {
+		is_claimed = 0;
+		parport_release(ppdevice);
+	}
+	is_open = 0;
+	MOD_DEC_USE_COUNT;
+	return 0;
+}
+
+static struct file_operations lirc_fops = {
+	.owner		= THIS_MODULE,
+	.llseek		= lirc_lseek,
+	.read		= lirc_read,
+	.write		= lirc_write,
+	.poll		= lirc_poll,
+	.ioctl		= lirc_ioctl,
+	.open		= lirc_open,
+	.release	= lirc_close
+};
+
+static int set_use_inc(void *data)
+{
+	return 0;
+}
+
+static void set_use_dec(void *data)
+{
+}
+
+static struct lirc_driver driver = {
+       .name		= LIRC_DRIVER_NAME,
+       .minor		= -1,
+       .code_length	= 1,
+       .sample_rate	= 0,
+       .data		= NULL,
+       .add_to_buf	= NULL,
+#ifndef LIRC_REMOVE_DURING_EXPORT
+       .get_queue	= NULL,
+#endif
+       .set_use_inc	= set_use_inc,
+       .set_use_dec	= set_use_dec,
+       .fops		= &lirc_fops,
+       .dev		= NULL,
+       .owner		= THIS_MODULE,
+};
+
+#ifdef MODULE
+static int pf(void *handle);
+static void kf(void *handle);
+
+static struct timer_list poll_timer;
+static void poll_state(unsigned long ignored);
+
+static void poll_state(unsigned long ignored)
+{
+	printk(KERN_NOTICE "%s: time\n",
+	       LIRC_DRIVER_NAME);
+	del_timer(&poll_timer);
+	if (is_claimed)
+		return;
+	kf(NULL);
+	if (!is_claimed) {
+		printk(KERN_NOTICE "%s: could not claim port, giving up\n",
+		       LIRC_DRIVER_NAME);
+		init_timer(&poll_timer);
+		poll_timer.expires = jiffies + HZ;
+		poll_timer.data = (unsigned long)current;
+		poll_timer.function = poll_state;
+		add_timer(&poll_timer);
+	}
+}
+
+static int pf(void *handle)
+{
+	parport_disable_irq(pport);
+	is_claimed = 0;
+	return 0;
+}
+
+static void kf(void *handle)
+{
+	if (!is_open)
+		return;
+	if (!lirc_claim())
+		return;
+	parport_enable_irq(pport);
+	lirc_off();
+	/* this is a bit annoying when you actually print...*/
+	/*
+	printk(KERN_INFO "%s: reclaimed port\n", LIRC_DRIVER_NAME);
+	*/
+}
+
+/*** module initialization and cleanup ***/
+
+static int __init lirc_parallel_init(void)
+{
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 3)
+	pport = parport_find_base(io);
+#else
+	pport = parport_enumerate();
+	while (pport != NULL) {
+		if (pport->base == io)
+			break;
+		pport = pport->next;
+	}
+#endif
+	if (pport == NULL) {
+		printk(KERN_NOTICE "%s: no port at %x found\n",
+		       LIRC_DRIVER_NAME, io);
+		return -ENXIO;
+	}
+	ppdevice = parport_register_device(pport, LIRC_DRIVER_NAME,
+					   pf, kf, irq_handler, 0, NULL);
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 3)
+	parport_put_port(pport);
+#endif
+	if (ppdevice == NULL) {
+		printk(KERN_NOTICE "%s: parport_register_device() failed\n",
+		       LIRC_DRIVER_NAME);
+		return -ENXIO;
+	}
+	if (parport_claim(ppdevice) != 0)
+		goto skip_init;
+	is_claimed = 1;
+	out(LIRC_LP_CONTROL, LP_PSELECP|LP_PINITP);
+
+#ifdef LIRC_TIMER
+	if (debug)
+		out(LIRC_PORT_DATA, tx_mask);
+
+	timer = init_lirc_timer();
+
+#if 0	/* continue even if device is offline */
+	if (timer == 0) {
+		is_claimed = 0;
+		parport_release(pport);
+		parport_unregister_device(ppdevice);
+		return -EIO;
+	}
+
+#endif
+	if (debug)
+		out(LIRC_PORT_DATA, 0);
+#endif
+
+	is_claimed = 0;
+	parport_release(ppdevice);
+ skip_init:
+	driver.minor = lirc_register_driver(&driver);
+	if (driver.minor < 0) {
+		printk(KERN_NOTICE "%s: register_chrdev() failed\n",
+		       LIRC_DRIVER_NAME);
+		parport_unregister_device(ppdevice);
+		return -EIO;
+	}
+	printk(KERN_INFO "%s: installed using port 0x%04x irq %d\n",
+	       LIRC_DRIVER_NAME, io, irq);
+	return 0;
+}
+
+static void __exit lirc_parallel_exit(void)
+{
+	parport_unregister_device(ppdevice);
+	lirc_unregister_driver(driver.minor);
+}
+
+module_init(lirc_parallel_init);
+module_exit(lirc_parallel_exit);
+
+MODULE_DESCRIPTION("Infrared receiver driver for parallel ports.");
+MODULE_AUTHOR("Christoph Bartelmus");
+MODULE_LICENSE("GPL");
+
+module_param(io, int, S_IRUGO);
+MODULE_PARM_DESC(io, "I/O address base (0x3bc, 0x378 or 0x278)");
+
+module_param(irq, int, S_IRUGO);
+MODULE_PARM_DESC(irq, "Interrupt (7 or 5)");
+
+module_param(tx_mask, int, S_IRUGO);
+MODULE_PARM_DESC(tx_maxk, "Transmitter mask (default: 0x01)");
+
+module_param(debug, bool, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(debug, "Enable debugging messages");
+
+module_param(check_pselecd, bool, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(debug, "Check for printer (default: 0)");
+EXPORT_NO_SYMBOLS;
+#endif /* MODULE */
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_sasem/lirc_sasem.c
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_sasem/lirc_sasem.c
@@ -0,0 +1,1108 @@
+/*      $Id: lirc_sasem.c,v 1.40 2009/02/28 10:27:10 lirc Exp $      */
+/*
+ * lirc_sasem.c - USB remote support for LIRC
+ * Version 0.5
+ *
+ * Copyright (C) 2004-2005 Oliver Stabel <oliver.stabel@gmx.de>
+ *			 Tim Davies <tim@opensystems.net.au>
+ *
+ * This driver was derived from:
+ *   Venky Raju <dev@venky.ws>
+ *      "lirc_imon - "LIRC/VFD driver for Ahanix/Soundgraph IMON IR/VFD"
+ *   Paul Miller <pmiller9@users.sourceforge.net>'s 2003-2004
+ *      "lirc_atiusb - USB remote support for LIRC"
+ *   Culver Consulting Services <henry@culcon.com>'s 2003
+ *      "Sasem OnAir VFD/IR USB driver"
+ *
+ *
+ * NOTE - The LCDproc iMon driver should work with this module.  More info at
+ *	http://www.frogstorm.info/sasem
+ */
+
+/*
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/version.h>
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 4, 22)
+#error "*** Sorry, this driver requires kernel version 2.4.22 or higher"
+#endif
+
+#include <linux/autoconf.h>
+
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18)
+#include <asm/uaccess.h>
+#else
+#include <linux/uaccess.h>
+#endif
+#include <linux/usb.h>
+
+#include "../kcompat.h"
+#include "../lirc.h"
+#include "../lirc_dev/lirc_dev.h"
+
+
+#define MOD_AUTHOR	"Oliver Stabel <oliver.stabel@gmx.de>, " \
+			"Tim Davies <tim@opensystems.net.au>"
+#define MOD_DESC	"USB Driver for Sasem Remote Controller V1.1"
+#define MOD_NAME	"lirc_sasem"
+#define MOD_VERSION	"0.5"
+
+#define VFD_MINOR_BASE	144	/* Same as LCD */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 15)
+#define DEVFS_MODE S_IFCHR | S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP | S_IROTH
+#endif
+#define DEVFS_NAME	LIRC_DEVFS_PREFIX "lcd%d"
+
+#define BUF_CHUNK_SIZE	8
+#define BUF_SIZE	128
+
+#define IOCTL_LCD_CONTRAST 1
+
+/*** P R O T O T Y P E S ***/
+
+/* USB Callback prototypes */
+#ifdef KERNEL_2_5
+static int sasem_probe(struct usb_interface *interface,
+			const struct usb_device_id *id);
+static void sasem_disconnect(struct usb_interface *interface);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19)
+static void usb_rx_callback(struct urb *urb, struct pt_regs *regs);
+static void usb_tx_callback(struct urb *urb, struct pt_regs *regs);
+#else
+static void usb_rx_callback(struct urb *urb);
+static void usb_tx_callback(struct urb *urb);
+#endif
+#else
+static void *sasem_probe(struct usb_device *dev, unsigned int intf,
+				const struct usb_device_id *id);
+static void sasem_disconnect(struct usb_device *dev, void *data);
+static void usb_rx_callback(struct urb *urb);
+static void usb_tx_callback(struct urb *urb);
+#endif
+
+/* VFD file_operations function prototypes */
+static int vfd_open(struct inode *inode, struct file *file);
+static int vfd_ioctl(struct inode *inode, struct file *file,
+				unsigned cmd, unsigned long arg);
+static int vfd_close(struct inode *inode, struct file *file);
+static ssize_t vfd_write(struct file *file, const char *buf,
+				size_t n_bytes, loff_t *pos);
+
+/* LIRC driver function prototypes */
+static int ir_open(void *data);
+static void ir_close(void *data);
+
+/* Driver init/exit prototypes */
+static int __init sasem_init(void);
+static void __exit sasem_exit(void);
+
+/*** G L O B A L S ***/
+
+struct sasem_context {
+
+	struct usb_device *dev;
+	int vfd_isopen;			/* VFD port has been opened       */
+	unsigned int vfd_contrast;	/* VFD contrast		   */
+#if !defined(KERNEL_2_5)
+	int subminor;			/* index into minor_table	 */
+	devfs_handle_t devfs;
+#endif
+	int ir_isopen;			/* IR port has been opened	*/
+	int dev_present;		/* USB device presence	    */
+	struct mutex lock;		/* to lock this object	    */
+	wait_queue_head_t remove_ok;	/* For unexpected USB disconnects */
+
+	struct lirc_driver *driver;
+	struct usb_endpoint_descriptor *rx_endpoint;
+	struct usb_endpoint_descriptor *tx_endpoint;
+	struct urb *rx_urb;
+	struct urb *tx_urb;
+	unsigned char usb_rx_buf[8];
+	unsigned char usb_tx_buf[8];
+
+	struct tx_t {
+		unsigned char data_buf[32];  /* user data buffer	  */
+		struct completion finished;  /* wait for write to finish  */
+		atomic_t busy;		     /* write in progress	 */
+		int status;		     /* status of tx completion   */
+	} tx;
+
+	/* for dealing with repeat codes (wish there was a toggle bit!) */
+	struct timeval presstime;
+	char lastcode[8];
+	int codesaved;
+};
+
+/* VFD file operations */
+static struct file_operations vfd_fops = {
+
+	.owner		= THIS_MODULE,
+	.open		= &vfd_open,
+	.write		= &vfd_write,
+	.ioctl		= &vfd_ioctl,
+	.release	= &vfd_close
+};
+
+/* USB Device ID for Sasem USB Control Board */
+static struct usb_device_id sasem_usb_id_table [] = {
+	/* Sasem USB Control Board */
+	{ USB_DEVICE(0x11ba, 0x0101) },
+	/* Terminating entry */
+	{}
+};
+
+/* USB Device data */
+static struct usb_driver sasem_driver = {
+	LIRC_THIS_MODULE(.owner = THIS_MODULE)
+	.name		= MOD_NAME,
+	.probe		= sasem_probe,
+	.disconnect	= sasem_disconnect,
+	.id_table	= sasem_usb_id_table,
+#if !defined(KERNEL_2_5)
+	.fops		= &vfd_fops,
+	.minor		= VFD_MINOR_BASE,
+#endif
+};
+
+#ifdef KERNEL_2_5
+static struct usb_class_driver sasem_class = {
+	.name		= DEVFS_NAME,
+	.fops		= &vfd_fops,
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 15)
+	.mode		= DEVFS_MODE,
+#endif
+	.minor_base	= VFD_MINOR_BASE,
+};
+#endif
+
+/* to prevent races between open() and disconnect() */
+static DEFINE_MUTEX(disconnect_lock);
+
+static int debug;
+
+#if !defined(KERNEL_2_5)
+
+#define MAX_DEVICES	4	/* In case there's more than one Sasem device */
+static struct sasem_context *minor_table [MAX_DEVICES];
+
+/* the global usb devfs handle */
+extern devfs_handle_t usb_devfs_handle;
+
+#endif
+
+/*** M O D U L E   C O D E ***/
+
+MODULE_AUTHOR(MOD_AUTHOR);
+MODULE_DESCRIPTION(MOD_DESC);
+MODULE_LICENSE("GPL");
+module_param(debug, int, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(debug, "Debug messages: 0=no, 1=yes (default: no)");
+
+static void delete_context(struct sasem_context *context)
+{
+	usb_free_urb(context->tx_urb);  /* VFD */
+	usb_free_urb(context->rx_urb);  /* IR */
+	lirc_buffer_free(context->driver->rbuf);
+	kfree(context->driver->rbuf);
+	kfree(context->driver);
+	kfree(context);
+
+	if (debug)
+		printk(KERN_INFO "%s: context deleted\n", __func__);
+}
+
+static void deregister_from_lirc(struct sasem_context *context)
+{
+	int retval;
+	int minor = context->driver->minor;
+
+	retval = lirc_unregister_driver(minor);
+	if (retval)
+		err("%s: unable to deregister from lirc (%d)",
+			__func__, retval);
+	else
+		printk(KERN_INFO "Deregistered Sasem driver (minor:%d)\n",
+		       minor);
+
+}
+
+/**
+ * Called when the VFD device (e.g. /dev/usb/lcd)
+ * is opened by the application.
+ */
+static int vfd_open(struct inode *inode, struct file *file)
+{
+#ifdef KERNEL_2_5
+	struct usb_interface *interface;
+#endif
+	struct sasem_context *context = NULL;
+	int subminor;
+	int retval = 0;
+
+	/* prevent races with disconnect */
+	mutex_lock(&disconnect_lock);
+
+#ifdef KERNEL_2_5
+	subminor = iminor(inode);
+	interface = usb_find_interface(&sasem_driver, subminor);
+	if (!interface) {
+		err("%s: could not find interface for minor %d",
+		    __func__, subminor);
+		retval = -ENODEV;
+		goto exit;
+	}
+	context = usb_get_intfdata(interface);
+#else
+	subminor = MINOR(inode->i_rdev) - VFD_MINOR_BASE;
+	if (subminor < 0 || subminor >= MAX_DEVICES) {
+		err("%s: no record of minor %d", __func__, subminor);
+		retval = -ENODEV;
+		goto exit;
+	}
+	context = minor_table [subminor];
+#endif
+
+	if (!context) {
+		err("%s: no context found for minor %d",
+					__func__, subminor);
+		retval = -ENODEV;
+		goto exit;
+	}
+
+	mutex_lock(&context->lock);
+
+	if (context->vfd_isopen) {
+		err("%s: VFD port is already open", __func__);
+		retval = -EBUSY;
+	} else {
+		MOD_INC_USE_COUNT;
+		context->vfd_isopen = 1;
+		file->private_data = context;
+		printk(KERN_INFO "VFD port opened\n");
+	}
+
+	mutex_unlock(&context->lock);
+
+exit:
+	mutex_unlock(&disconnect_lock);
+	return retval;
+}
+
+/**
+ * Called when the VFD device (e.g. /dev/usb/lcd)
+ * is closed by the application.
+ */
+static int vfd_ioctl(struct inode *inode, struct file *file,
+		     unsigned cmd, unsigned long arg)
+{
+	struct sasem_context *context = NULL;
+
+	context = (struct sasem_context *) file->private_data;
+
+	if (!context) {
+		err("%s: no context for device", __func__);
+		return -ENODEV;
+	}
+
+	mutex_lock(&context->lock);
+
+	switch (cmd) {
+	case IOCTL_LCD_CONTRAST:
+		if (arg > 1000)
+			arg = 1000;
+		context->vfd_contrast = (unsigned int)arg;
+		break;
+	default:
+		printk(KERN_INFO "Unknown IOCTL command\n");
+		mutex_unlock(&context->lock);
+		return -ENOIOCTLCMD;  /* not supported */
+	}
+
+	mutex_unlock(&context->lock);
+	return 0;
+}
+
+/**
+ * Called when the VFD device (e.g. /dev/usb/lcd)
+ * is closed by the application.
+ */
+static int vfd_close(struct inode *inode, struct file *file)
+{
+	struct sasem_context *context = NULL;
+	int retval = 0;
+
+	context = (struct sasem_context *) file->private_data;
+
+	if (!context) {
+		err("%s: no context for device", __func__);
+		return -ENODEV;
+	}
+
+	mutex_lock(&context->lock);
+
+	if (!context->vfd_isopen) {
+		err("%s: VFD is not open", __func__);
+		retval = -EIO;
+	} else {
+		context->vfd_isopen = 0;
+		MOD_DEC_USE_COUNT;
+		printk(KERN_INFO "VFD port closed\n");
+		if (!context->dev_present && !context->ir_isopen) {
+
+			/* Device disconnected before close and IR port is
+			 * not open. If IR port is open, context will be
+			 * deleted by ir_close. */
+			mutex_unlock(&context->lock);
+			delete_context(context);
+			return retval;
+		}
+	}
+
+	mutex_unlock(&context->lock);
+	return retval;
+}
+
+/**
+ * Sends a packet to the VFD.
+ */
+static int send_packet(struct sasem_context *context)
+{
+	unsigned int pipe;
+	int interval = 0;
+	int retval = 0;
+
+	pipe = usb_sndintpipe(context->dev,
+			context->tx_endpoint->bEndpointAddress);
+#ifdef KERNEL_2_5
+	interval = context->tx_endpoint->bInterval;
+#endif	/* Use 0 for 2.4 kernels */
+
+	usb_fill_int_urb(context->tx_urb, context->dev, pipe,
+		context->usb_tx_buf, sizeof(context->usb_tx_buf),
+		usb_tx_callback, context, interval);
+
+	context->tx_urb->actual_length = 0;
+
+	init_completion(&context->tx.finished);
+	atomic_set(&(context->tx.busy), 1);
+
+#ifdef KERNEL_2_5
+	retval =  usb_submit_urb(context->tx_urb, GFP_KERNEL);
+#else
+	retval =  usb_submit_urb(context->tx_urb);
+#endif
+	if (retval) {
+		atomic_set(&(context->tx.busy), 0);
+		err("%s: error submitting urb (%d)", __func__, retval);
+	} else {
+		/* Wait for transmission to complete (or abort) */
+		mutex_unlock(&context->lock);
+		wait_for_completion(&context->tx.finished);
+		mutex_lock(&context->lock);
+
+		retval = context->tx.status;
+		if (retval)
+			err("%s: packet tx failed (%d)", __func__, retval);
+	}
+
+	return retval;
+}
+
+/**
+ * Writes data to the VFD.  The Sasem VFD is 2x16 characters
+ * and requires data in 9 consecutive USB interrupt packets,
+ * each packet carrying 8 bytes.
+ */
+static ssize_t vfd_write(struct file *file, const char *buf,
+				size_t n_bytes, loff_t *pos)
+{
+	int i;
+	int retval = 0;
+	struct sasem_context *context;
+
+	context = (struct sasem_context *) file->private_data;
+	if (!context) {
+		err("%s: no context for device", __func__);
+		return -ENODEV;
+	}
+
+	mutex_lock(&context->lock);
+
+	if (!context->dev_present) {
+		err("%s: no Sasem device present", __func__);
+		retval = -ENODEV;
+		goto exit;
+	}
+
+	if (n_bytes <= 0 || n_bytes > 32) {
+		err("%s: invalid payload size", __func__);
+		retval = -EINVAL;
+		goto exit;
+	}
+
+	retval = copy_from_user(context->tx.data_buf, buf, n_bytes);
+	if (retval < 0)
+		goto exit;
+
+	/* Pad with spaces */
+	for (i = n_bytes; i < 32; ++i)
+		context->tx.data_buf[i] = ' ';
+
+	/* Nine 8 byte packets to be sent */
+	/* NOTE: "\x07\x01\0\0\0\0\0\0" or "\x0c\0\0\0\0\0\0\0"
+	 *       will clear the VFD */
+	for (i = 0; i < 9; i++) {
+		switch (i) {
+		case 0:
+			memcpy(context->usb_tx_buf, "\x07\0\0\0\0\0\0\0", 8);
+			context->usb_tx_buf[1] = (context->vfd_contrast) ?
+				(0x2B - (context->vfd_contrast - 1) / 250)
+				: 0x2B;
+			break;
+		case 1:
+			memcpy(context->usb_tx_buf, "\x09\x01\0\0\0\0\0\0", 8);
+			break;
+		case 2:
+			memcpy(context->usb_tx_buf, "\x0b\x01\0\0\0\0\0\0", 8);
+			break;
+		case 3:
+			memcpy(context->usb_tx_buf, context->tx.data_buf, 8);
+			break;
+		case 4:
+			memcpy(context->usb_tx_buf,
+			       context->tx.data_buf + 8, 8);
+			break;
+		case 5:
+			memcpy(context->usb_tx_buf, "\x09\x01\0\0\0\0\0\0", 8);
+			break;
+		case 6:
+			memcpy(context->usb_tx_buf, "\x0b\x02\0\0\0\0\0\0", 8);
+			break;
+		case 7:
+			memcpy(context->usb_tx_buf,
+			       context->tx.data_buf + 16, 8);
+			break;
+		case 8:
+			memcpy(context->usb_tx_buf,
+			       context->tx.data_buf + 24, 8);
+			break;
+		}
+		retval = send_packet(context);
+		if (retval) {
+
+			err("%s: send packet failed for packet #%d",
+					__func__, i);
+			goto exit;
+		}
+	}
+exit:
+
+	mutex_unlock(&context->lock);
+
+	return (!retval) ? n_bytes : retval;
+}
+
+/**
+ * Callback function for USB core API: transmit data
+ */
+#if defined(KERNEL_2_5) && LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19)
+static void usb_tx_callback(struct urb *urb, struct pt_regs *regs)
+#else
+static void usb_tx_callback(struct urb *urb)
+#endif
+{
+	struct sasem_context *context;
+
+	if (!urb)
+		return;
+	context = (struct sasem_context *) urb->context;
+	if (!context)
+		return;
+
+	context->tx.status = urb->status;
+
+	/* notify waiters that write has finished */
+	atomic_set(&context->tx.busy, 0);
+	complete(&context->tx.finished);
+
+	return;
+}
+
+/**
+ * Called by lirc_dev when the application opens /dev/lirc
+ */
+static int ir_open(void *data)
+{
+	int retval = 0;
+	struct sasem_context *context;
+
+	/* prevent races with disconnect */
+	mutex_lock(&disconnect_lock);
+
+	context = (struct sasem_context *) data;
+
+	mutex_lock(&context->lock);
+
+	if (context->ir_isopen) {
+		err("%s: IR port is already open", __func__);
+		retval = -EBUSY;
+		goto exit;
+	}
+
+	usb_fill_int_urb(context->rx_urb, context->dev,
+		usb_rcvintpipe(context->dev,
+				context->rx_endpoint->bEndpointAddress),
+		context->usb_rx_buf, sizeof(context->usb_rx_buf),
+		usb_rx_callback, context, context->rx_endpoint->bInterval);
+
+#ifdef KERNEL_2_5
+	retval = usb_submit_urb(context->rx_urb, GFP_KERNEL);
+#else
+	retval = usb_submit_urb(context->rx_urb);
+#endif
+
+	if (retval)
+		err("%s: usb_submit_urb failed for ir_open (%d)",
+		    __func__, retval);
+	else {
+		MOD_INC_USE_COUNT;
+		context->ir_isopen = 1;
+		printk(KERN_INFO "IR port opened\n");
+	}
+
+exit:
+	mutex_unlock(&context->lock);
+
+	mutex_unlock(&disconnect_lock);
+	return 0;
+}
+
+/**
+ * Called by lirc_dev when the application closes /dev/lirc
+ */
+static void ir_close(void *data)
+{
+	struct sasem_context *context;
+
+	context = (struct sasem_context *)data;
+	if (!context) {
+		err("%s: no context for device", __func__);
+		return;
+	}
+
+	mutex_lock(&context->lock);
+
+	usb_kill_urb(context->rx_urb);
+	context->ir_isopen = 0;
+	MOD_DEC_USE_COUNT;
+	printk(KERN_INFO "IR port closed\n");
+
+	if (!context->dev_present) {
+
+		/*
+		 * Device disconnected while IR port was
+		 * still open. Driver was not deregistered
+		 * at disconnect time, so do it now.
+		 */
+		deregister_from_lirc(context);
+
+		if (!context->vfd_isopen) {
+
+			mutex_unlock(&context->lock);
+			delete_context(context);
+			return;
+		}
+		/* If VFD port is open, context will be deleted by vfd_close */
+	}
+
+	mutex_unlock(&context->lock);
+	return;
+}
+
+/**
+ * Process the incoming packet
+ */
+static void incoming_packet(struct sasem_context *context,
+				   struct urb *urb)
+{
+	int len = urb->actual_length;
+	unsigned char *buf = urb->transfer_buffer;
+	long ms;
+	struct timeval tv;
+
+	if (len != 8) {
+		printk(KERN_WARNING "%s: invalid incoming packet size (%d)\n",
+		     __func__, len);
+		return;
+	}
+
+#ifdef DEBUG
+	int i;
+	for (i = 0; i < 8; ++i)
+		printk(KERN_INFO "%02x ", buf [i]);
+	printk(KERN_INFO "\n");
+#endif
+
+	/*
+	 * Lirc could deal with the repeat code, but we really need to block it
+	 * if it arrives too late.  Otherwise we could repeat the wrong code.
+	 */
+
+	/* get the time since the last button press */
+	do_gettimeofday(&tv);
+	ms = (tv.tv_sec - context->presstime.tv_sec) * 1000 +
+	     (tv.tv_usec - context->presstime.tv_usec) / 1000;
+
+	if (memcmp(buf, "\x08\0\0\0\0\0\0\0", 8) == 0) {
+		/*
+		 * the repeat code is being sent, so we copy
+		 * the old code to LIRC
+		 */
+
+		/*
+		 * NOTE: Only if the last code was less than 250ms ago
+		 * - no one should be able to push another (undetected) button
+		 *   in that time and then get a false repeat of the previous
+		 *   press but it is long enough for a genuine repeat
+		 */
+		if ((ms < 250) && (context->codesaved != 0)) {
+			memcpy(buf, &context->lastcode, 8);
+			context->presstime.tv_sec = tv.tv_sec;
+			context->presstime.tv_usec = tv.tv_usec;
+		}
+	} else {
+		/* save the current valid code for repeats */
+		memcpy(&context->lastcode, buf, 8);
+		/*
+		 * set flag to signal a valid code was save;
+		 * just for safety reasons
+		 */
+		context->codesaved = 1;
+		context->presstime.tv_sec = tv.tv_sec;
+		context->presstime.tv_usec = tv.tv_usec;
+	}
+
+	lirc_buffer_write(context->driver->rbuf, buf);
+	wake_up(&context->driver->rbuf->wait_poll);
+}
+
+/**
+ * Callback function for USB core API: receive data
+ */
+#if defined(KERNEL_2_5) && LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19)
+static void usb_rx_callback(struct urb *urb, struct pt_regs *regs)
+#else
+static void usb_rx_callback(struct urb *urb)
+#endif
+{
+	struct sasem_context *context;
+
+	if (!urb)
+		return;
+	context = (struct sasem_context *) urb->context;
+	if (!context)
+		return;
+
+	switch (urb->status) {
+
+	case -ENOENT: 		/* usbcore unlink successful! */
+		return;
+
+	case 0:
+		if (context->ir_isopen)
+			incoming_packet(context, urb);
+		break;
+
+	default:
+		printk(KERN_WARNING "%s: status (%d): ignored\n",
+		       __func__, urb->status);
+		break;
+	}
+
+#ifdef KERNEL_2_5
+	usb_submit_urb(context->rx_urb, GFP_ATOMIC);
+#endif
+	return;
+}
+
+
+
+/**
+ * Callback function for USB core API: Probe
+ */
+#ifdef KERNEL_2_5
+static int sasem_probe(struct usb_interface *interface,
+			const struct usb_device_id *id)
+#else
+static void *sasem_probe(struct usb_device *dev, unsigned int intf,
+			const struct usb_device_id *id)
+#endif
+{
+#ifdef KERNEL_2_5
+	struct usb_device *dev = NULL;
+	struct usb_host_interface *iface_desc = NULL;
+#else
+	struct usb_interface *interface = NULL;
+	struct usb_interface_descriptor *iface_desc = NULL;
+	char name [10];
+	int subminor = 0;
+#endif
+	struct usb_endpoint_descriptor *rx_endpoint = NULL;
+	struct usb_endpoint_descriptor *tx_endpoint = NULL;
+	struct urb *rx_urb = NULL;
+	struct urb *tx_urb = NULL;
+	struct lirc_driver *driver = NULL;
+	struct lirc_buffer *rbuf = NULL;
+	int lirc_minor = 0;
+	int num_endpoints;
+	int retval = 0;
+	int vfd_ep_found;
+	int ir_ep_found;
+	int alloc_status;
+	struct sasem_context *context = NULL;
+	int i;
+
+	printk(KERN_INFO "%s: found Sasem device\n", __func__);
+
+#if !defined(KERNEL_2_5)
+	for (subminor = 0; subminor < MAX_DEVICES; ++subminor) {
+		if (minor_table [subminor] == NULL)
+			break;
+	}
+	if (subminor == MAX_DEVICES) {
+		err("%s: allowed number of devices already present",
+		    __func__);
+		retval = -ENOMEM;
+		goto exit;
+	}
+#endif
+
+#ifdef KERNEL_2_5
+	dev = usb_get_dev(interface_to_usbdev(interface));
+	iface_desc = interface->cur_altsetting;
+	num_endpoints = iface_desc->desc.bNumEndpoints;
+#else
+	interface = &dev->actconfig->interface [intf];
+	iface_desc = &interface->altsetting [interface->act_altsetting];
+	num_endpoints = iface_desc->bNumEndpoints;
+#endif
+
+	/*
+	 * Scan the endpoint list and set:
+	 *	first input endpoint = IR endpoint
+	 *	first output endpoint = VFD endpoint
+	 */
+
+	ir_ep_found = 0;
+	vfd_ep_found = 0;
+
+	for (i = 0; i < num_endpoints && !(ir_ep_found && vfd_ep_found); ++i) {
+
+		struct usb_endpoint_descriptor *ep;
+		int ep_dir;
+		int ep_type;
+#ifdef KERNEL_2_5
+		ep = &iface_desc->endpoint [i].desc;
+#else
+		ep = &iface_desc->endpoint [i];
+#endif
+		ep_dir = ep->bEndpointAddress & USB_ENDPOINT_DIR_MASK;
+		ep_type = ep->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
+
+		if (!ir_ep_found &&
+			ep_dir == USB_DIR_IN &&
+			ep_type == USB_ENDPOINT_XFER_INT) {
+
+			rx_endpoint = ep;
+			ir_ep_found = 1;
+			if (debug)
+				printk(KERN_INFO "%s: found IR endpoint\n",
+				       __func__);
+
+		} else if (!vfd_ep_found &&
+			ep_dir == USB_DIR_OUT &&
+			ep_type == USB_ENDPOINT_XFER_INT) {
+
+			tx_endpoint = ep;
+			vfd_ep_found = 1;
+			if (debug)
+				printk(KERN_INFO "%s: found VFD endpoint\n",
+				       __func__);
+		}
+	}
+
+	/* Input endpoint is mandatory */
+	if (!ir_ep_found) {
+
+		err("%s: no valid input (IR) endpoint found.", __func__);
+		retval = -ENODEV;
+		goto exit;
+	}
+
+	if (!vfd_ep_found)
+		printk(KERN_INFO "%s: no valid output (VFD) endpoint found.\n",
+		       __func__);
+
+
+	/* Allocate memory */
+	alloc_status = 0;
+
+	context = kzalloc(sizeof(struct sasem_context), GFP_KERNEL);
+	if (!context) {
+		err("%s: kzalloc failed for context", __func__);
+		alloc_status = 1;
+		goto alloc_status_switch;
+	}
+	driver = kzalloc(sizeof(struct lirc_driver), GFP_KERNEL);
+	if (!driver) {
+		err("%s: kzalloc failed for lirc_driver", __func__);
+		alloc_status = 2;
+		goto alloc_status_switch;
+	}
+	rbuf = kmalloc(sizeof(struct lirc_buffer), GFP_KERNEL);
+	if (!rbuf) {
+		err("%s: kmalloc failed for lirc_buffer", __func__);
+		alloc_status = 3;
+		goto alloc_status_switch;
+	}
+	if (lirc_buffer_init(rbuf, BUF_CHUNK_SIZE, BUF_SIZE)) {
+		err("%s: lirc_buffer_init failed", __func__);
+		alloc_status = 4;
+		goto alloc_status_switch;
+	}
+#ifdef KERNEL_2_5
+	rx_urb = usb_alloc_urb(0, GFP_KERNEL);
+#else
+	rx_urb = usb_alloc_urb(0);
+#endif
+	if (!rx_urb) {
+		err("%s: usb_alloc_urb failed for IR urb", __func__);
+		alloc_status = 5;
+		goto alloc_status_switch;
+	}
+	if (vfd_ep_found) {
+#ifdef KERNEL_2_5
+		tx_urb = usb_alloc_urb(0, GFP_KERNEL);
+#else
+		tx_urb = usb_alloc_urb(0);
+#endif
+		if (!tx_urb) {
+			err("%s: usb_alloc_urb failed for VFD urb", __func__);
+			alloc_status = 6;
+			goto alloc_status_switch;
+		}
+	}
+
+	mutex_init(&context->lock);
+
+	strcpy(driver->name, MOD_NAME);
+	driver->minor = -1;
+	driver->code_length = 64;
+	driver->sample_rate = 0;
+	driver->features = LIRC_CAN_REC_LIRCCODE;
+	driver->data = context;
+	driver->rbuf = rbuf;
+	driver->set_use_inc = ir_open;
+	driver->set_use_dec = ir_close;
+#ifdef LIRC_HAVE_SYSFS
+	driver->dev   = &interface->dev;
+#endif
+	driver->owner = THIS_MODULE;
+
+	mutex_lock(&context->lock);
+
+	lirc_minor = lirc_register_driver(driver);
+	if (lirc_minor < 0) {
+		err("%s: lirc_register_driver failed", __func__);
+		alloc_status = 7;
+		mutex_unlock(&context->lock);
+	} else
+		printk(KERN_INFO "%s: Registered Sasem driver (minor:%d)\n",
+			__func__, lirc_minor);
+
+alloc_status_switch:
+
+	switch (alloc_status) {
+
+	case 7:
+		if (vfd_ep_found)
+			usb_free_urb(tx_urb);
+	case 6:
+		usb_free_urb(rx_urb);
+	case 5:
+		lirc_buffer_free(rbuf);
+	case 4:
+		kfree(rbuf);
+	case 3:
+		kfree(driver);
+	case 2:
+		kfree(context);
+		context = NULL;
+	case 1:
+		retval = -ENOMEM;
+		goto exit;
+	}
+
+	/* Needed while unregistering! */
+	driver->minor = lirc_minor;
+
+	context->dev = dev;
+	context->dev_present = 1;
+	context->rx_endpoint = rx_endpoint;
+	context->rx_urb = rx_urb;
+	if (vfd_ep_found) {
+		context->tx_endpoint = tx_endpoint;
+		context->tx_urb = tx_urb;
+		context->vfd_contrast = 1000;   /* range 0 - 1000 */
+	}
+	context->driver = driver;
+
+#ifdef KERNEL_2_5
+	usb_set_intfdata(interface, context);
+#else
+	minor_table [subminor] = context;
+	context->subminor = subminor;
+#endif
+
+	if (vfd_ep_found) {
+
+#ifdef KERNEL_2_5
+		if (debug)
+			printk(KERN_INFO "Registering VFD with sysfs\n");
+		if (usb_register_dev(interface, &sasem_class))
+			/* Not a fatal error, so ignore */
+			printk(KERN_INFO "%s: could not get a minor number "
+			       "for VFD\n", __func__);
+#else
+		if (debug)
+			printk(KERN_INFO "Registering VFD with devfs\n");
+		sprintf(name, DEVFS_NAME, subminor);
+		context->devfs = devfs_register(usb_devfs_handle, name,
+				 DEVFS_FL_DEFAULT,
+				 USB_MAJOR, VFD_MINOR_BASE + subminor,
+				 DEVFS_MODE, &vfd_fops, NULL);
+		if (!context->devfs)
+			/* not a fatal error so ignore */
+			printk(KERN_INFO "%s: devfs register failed for VFD\n",
+					__func__);
+#endif
+	}
+
+	printk(KERN_INFO "%s: Sasem device on usb<%d:%d> initialized\n",
+			__func__, dev->bus->busnum, dev->devnum);
+
+	mutex_unlock(&context->lock);
+exit:
+#ifdef KERNEL_2_5
+	return retval;
+#else
+	return (!retval) ? context : NULL;
+#endif
+}
+
+/**
+ * Callback function for USB core API: disonnect
+ */
+#ifdef KERNEL_2_5
+static void sasem_disconnect(struct usb_interface *interface)
+#else
+static void sasem_disconnect(struct usb_device *dev, void *data)
+#endif
+{
+	struct sasem_context *context;
+
+	/* prevent races with ir_open()/vfd_open() */
+	mutex_lock(&disconnect_lock);
+
+#ifdef KERNEL_2_5
+	context = usb_get_intfdata(interface);
+#else
+	context = (struct sasem_context *)data;
+#endif
+	mutex_lock(&context->lock);
+
+	printk(KERN_INFO "%s: Sasem device disconnected\n", __func__);
+
+#ifdef KERNEL_2_5
+	usb_set_intfdata(interface, NULL);
+#else
+	minor_table [context->subminor] = NULL;
+#endif
+	context->dev_present = 0;
+
+	/* Stop reception */
+	usb_kill_urb(context->rx_urb);
+
+	/* Abort ongoing write */
+	if (atomic_read(&context->tx.busy)) {
+
+		usb_kill_urb(context->tx_urb);
+		wait_for_completion(&context->tx.finished);
+	}
+
+	/* De-register from lirc_dev if IR port is not open */
+	if (!context->ir_isopen)
+		deregister_from_lirc(context);
+
+#ifdef KERNEL_2_5
+	usb_deregister_dev(interface, &sasem_class);
+#else
+	if (context->devfs)
+		devfs_unregister(context->devfs);
+#endif
+
+	mutex_unlock(&context->lock);
+
+	if (!context->ir_isopen && !context->vfd_isopen)
+		delete_context(context);
+
+	mutex_unlock(&disconnect_lock);
+}
+
+static int __init sasem_init(void)
+{
+	int rc;
+
+	printk(KERN_INFO MOD_DESC ", v" MOD_VERSION "\n");
+	printk(KERN_INFO MOD_AUTHOR "\n");
+
+	rc = usb_register(&sasem_driver);
+	if (rc < 0) {
+		err("%s: usb register failed (%d)", __func__, rc);
+		return -ENODEV;
+	}
+	return 0;
+}
+
+static void __exit sasem_exit(void)
+{
+	usb_deregister(&sasem_driver);
+	printk(KERN_INFO "module removed. Goodbye!\n");
+}
+
+
+module_init(sasem_init);
+module_exit(sasem_exit);
+
+#if !defined(KERNEL_2_5)
+EXPORT_NO_SYMBOLS;
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_sasem/Makefile
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_sasem/Makefile
@@ -0,0 +1,2 @@
+EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)/..
+obj-$(CONFIG_LIRC_SASEM)	+= lirc_sasem.o
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_sir/Makefile
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_sir/Makefile
@@ -0,0 +1,3 @@
+EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)/..
+
+obj-$(CONFIG_LIRC_SIR)		+= lirc_sir.o
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_sir/lirc_sir.c
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_sir/lirc_sir.c
@@ -0,0 +1,1347 @@
+/*
+ * LIRC SIR driver, (C) 2000 Milan Pikula <www@fornax.sk>
+ *
+ * lirc_sir - Device driver for use with SIR (serial infra red)
+ * mode of IrDA on many notebooks.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ *
+ * 2000/09/16 Frank Przybylski <mail@frankprzybylski.de> :
+ *  added timeout and relaxed pulse detection, removed gap bug
+ *
+ * 2000/12/15 Christoph Bartelmus <lirc@bartelmus.de> :
+ *   added support for Tekram Irmate 210 (sending does not work yet,
+ *   kind of disappointing that nobody was able to implement that
+ *   before),
+ *   major clean-up
+ *
+ * 2001/02/27 Christoph Bartelmus <lirc@bartelmus.de> :
+ *   added support for StrongARM SA1100 embedded microprocessor
+ *   parts cut'n'pasted from sa1100_ir.c (C) 2000 Russell King
+ */
+
+#include <linux/version.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 2, 18)
+#error "**********************************************************"
+#error " Sorry, this driver needs kernel version 2.2.18 or higher "
+#error "**********************************************************"
+#endif
+#include <linux/module.h>
+
+#ifdef HAVE_CONFIG_H
+# include <config.h>
+#endif
+
+#include <linux/autoconf.h>
+
+#include <linux/sched.h>
+#include <linux/errno.h>
+#include <linux/signal.h>
+#include <linux/fs.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/kernel.h>
+#include <linux/serial_reg.h>
+#include <linux/time.h>
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/wait.h>
+#include <linux/mm.h>
+#include <linux/delay.h>
+#include <linux/poll.h>
+#include <asm/system.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18)
+#include <asm/uaccess.h>
+#endif
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 16)
+#include <asm/io.h>
+#else
+#include <linux/io.h>
+#endif
+#include <asm/irq.h>
+#include <linux/fcntl.h>
+#ifdef LIRC_ON_SA1100
+#include <asm/hardware.h>
+#ifdef CONFIG_SA1100_COLLIE
+#include <asm/arch/tc35143.h>
+#include <asm/ucb1200.h>
+#endif
+#endif
+
+#include <linux/timer.h>
+
+#include "../lirc.h"
+#include "../lirc_dev/lirc_dev.h"
+#include "../kcompat.h"
+
+/* SECTION: Definitions */
+
+/*** Tekram dongle ***/
+#ifdef LIRC_SIR_TEKRAM
+/* stolen from kernel source */
+/* definitions for Tekram dongle */
+#define TEKRAM_115200 0x00
+#define TEKRAM_57600  0x01
+#define TEKRAM_38400  0x02
+#define TEKRAM_19200  0x03
+#define TEKRAM_9600   0x04
+#define TEKRAM_2400   0x08
+
+#define TEKRAM_PW 0x10 /* Pulse select bit */
+
+/* 10bit * 1s/115200bit in milliseconds = 87ms*/
+#define TIME_CONST (10000000ul/115200ul)
+
+#endif
+
+#ifdef LIRC_SIR_ACTISYS_ACT200L
+static void init_act200(void);
+#elif defined(LIRC_SIR_ACTISYS_ACT220L)
+static void init_act220(void);
+#endif
+
+/*** SA1100 ***/
+#ifdef LIRC_ON_SA1100
+struct sa1100_ser2_registers {
+	/* HSSP control register */
+	unsigned char hscr0;
+	/* UART registers */
+	unsigned char utcr0;
+	unsigned char utcr1;
+	unsigned char utcr2;
+	unsigned char utcr3;
+	unsigned char utcr4;
+	unsigned char utdr;
+	unsigned char utsr0;
+	unsigned char utsr1;
+} sr;
+
+static int irq = IRQ_Ser2ICP;
+
+#define LIRC_ON_SA1100_TRANSMITTER_LATENCY 0
+
+/* pulse/space ratio of 50/50 */
+static unsigned long pulse_width = (13-LIRC_ON_SA1100_TRANSMITTER_LATENCY);
+/* 1000000/freq-pulse_width */
+static unsigned long space_width = (13-LIRC_ON_SA1100_TRANSMITTER_LATENCY);
+static unsigned int freq = 38000;      /* modulation frequency */
+static unsigned int duty_cycle = 50;   /* duty cycle of 50% */
+
+#endif
+
+#define RBUF_LEN 1024
+#define WBUF_LEN 1024
+
+#define LIRC_DRIVER_NAME "lirc_sir"
+
+#define PULSE '['
+
+#ifndef LIRC_SIR_TEKRAM
+/* 9bit * 1s/115200bit in milli seconds = 78.125ms*/
+#define TIME_CONST (9000000ul/115200ul)
+#endif
+
+
+/* timeout for sequences in jiffies (=5/100s), must be longer than TIME_CONST */
+#define SIR_TIMEOUT	(HZ*5/100)
+
+#ifndef LIRC_ON_SA1100
+#ifndef LIRC_IRQ
+#define LIRC_IRQ 4
+#endif
+#ifndef LIRC_PORT
+/* for external dongles, default to com1 */
+#if defined(LIRC_SIR_ACTISYS_ACT200L) || \
+    defined(LIRC_SIR_ACTISYS_ACT220L) || \
+    defined(LIRC_SIR_TEKRAM)
+#define LIRC_PORT 0x3f8
+#else
+/* onboard sir ports are typically com3 */
+#define LIRC_PORT 0x3e8
+#endif
+#endif
+
+static int io = LIRC_PORT;
+static int irq = LIRC_IRQ;
+static int threshold = 3;
+#endif
+
+static DEFINE_SPINLOCK(timer_lock);
+static struct timer_list timerlist;
+/* time of last signal change detected */
+static struct timeval last_tv = {0, 0};
+/* time of last UART data ready interrupt */
+static struct timeval last_intr_tv = {0, 0};
+static int last_value;
+
+static DECLARE_WAIT_QUEUE_HEAD(lirc_read_queue);
+
+static DEFINE_SPINLOCK(hardware_lock);
+static DEFINE_SPINLOCK(dev_lock);
+
+static lirc_t rx_buf[RBUF_LEN];
+static unsigned int rx_tail, rx_head;
+static lirc_t tx_buf[WBUF_LEN];
+
+static int debug;
+#define dprintk(fmt, args...)						\
+	do {								\
+		if (debug)						\
+			printk(KERN_DEBUG LIRC_DRIVER_NAME ": "		\
+				fmt, ## args);				\
+	} while (0)
+
+/* SECTION: Prototypes */
+
+/* Communication with user-space */
+static int lirc_open(struct inode *inode, struct file *file);
+static int lirc_close(struct inode *inode, struct file *file);
+static unsigned int lirc_poll(struct file *file, poll_table *wait);
+static ssize_t lirc_read(struct file *file, char *buf, size_t count,
+		loff_t *ppos);
+static ssize_t lirc_write(struct file *file, const char *buf, size_t n,
+		loff_t *pos);
+static int lirc_ioctl(struct inode *node, struct file *filep, unsigned int cmd,
+		unsigned long arg);
+static void add_read_queue(int flag, unsigned long val);
+#ifdef MODULE
+static int init_chrdev(void);
+static void drop_chrdev(void);
+#endif
+/* Hardware */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19)
+static irqreturn_t sir_interrupt(int irq, void *dev_id,
+				 struct pt_regs *regs);
+#else
+static irqreturn_t sir_interrupt(int irq, void *dev_id);
+#endif
+static void send_space(unsigned long len);
+static void send_pulse(unsigned long len);
+static int init_hardware(void);
+static void drop_hardware(void);
+/* Initialisation */
+static int init_port(void);
+static void drop_port(void);
+
+#ifdef LIRC_ON_SA1100
+static void on(void)
+{
+	PPSR |= PPC_TXD2;
+}
+
+static void off(void)
+{
+	PPSR &= ~PPC_TXD2;
+}
+#else
+static unsigned int sinp(int offset)
+{
+	return inb(io + offset);
+}
+
+static void soutp(int offset, int value)
+{
+	outb(value, io + offset);
+}
+#endif
+
+#ifndef MAX_UDELAY_MS
+#define MAX_UDELAY_US 5000
+#else
+#define MAX_UDELAY_US (MAX_UDELAY_MS*1000)
+#endif
+
+static void safe_udelay(unsigned long usecs)
+{
+	while (usecs > MAX_UDELAY_US) {
+		udelay(MAX_UDELAY_US);
+		usecs -= MAX_UDELAY_US;
+	}
+	udelay(usecs);
+}
+
+/* SECTION: Communication with user-space */
+
+static int lirc_open(struct inode *inode, struct file *file)
+{
+	spin_lock(&dev_lock);
+	if (MOD_IN_USE) {
+		spin_unlock(&dev_lock);
+		return -EBUSY;
+	}
+	MOD_INC_USE_COUNT;
+	spin_unlock(&dev_lock);
+	return 0;
+}
+
+static int lirc_close(struct inode *inode, struct file *file)
+{
+	MOD_DEC_USE_COUNT;
+	return 0;
+}
+
+static unsigned int lirc_poll(struct file *file, poll_table *wait)
+{
+	poll_wait(file, &lirc_read_queue, wait);
+	if (rx_head != rx_tail)
+		return POLLIN | POLLRDNORM;
+	return 0;
+}
+
+static ssize_t lirc_read(struct file *file, char *buf, size_t count,
+		loff_t *ppos)
+{
+	int n = 0;
+	int retval = 0;
+	DECLARE_WAITQUEUE(wait, current);
+
+	if (count % sizeof(lirc_t))
+		return -EINVAL;
+
+	add_wait_queue(&lirc_read_queue, &wait);
+	set_current_state(TASK_INTERRUPTIBLE);
+	while (n < count) {
+		if (rx_head != rx_tail) {
+			if (copy_to_user((void *) buf + n,
+					(void *) (rx_buf + rx_head),
+					sizeof(lirc_t))) {
+				retval = -EFAULT;
+				break;
+			}
+			rx_head = (rx_head + 1) & (RBUF_LEN - 1);
+			n += sizeof(lirc_t);
+		} else {
+			if (file->f_flags & O_NONBLOCK) {
+				retval = -EAGAIN;
+				break;
+			}
+			if (signal_pending(current)) {
+				retval = -ERESTARTSYS;
+				break;
+			}
+			schedule();
+			set_current_state(TASK_INTERRUPTIBLE);
+		}
+	}
+	remove_wait_queue(&lirc_read_queue, &wait);
+	set_current_state(TASK_RUNNING);
+	return n ? n : retval;
+}
+static ssize_t lirc_write(struct file *file, const char *buf, size_t n,
+				loff_t *pos)
+{
+	unsigned long flags;
+	int i;
+
+	if (n % sizeof(lirc_t) || (n / sizeof(lirc_t)) > WBUF_LEN)
+		return -EINVAL;
+	if (copy_from_user(tx_buf, buf, n))
+		return -EFAULT;
+	i = 0;
+	n /= sizeof(lirc_t);
+#ifdef LIRC_ON_SA1100
+	/* disable receiver */
+	Ser2UTCR3 = 0;
+#endif
+	local_irq_save(flags);
+	while (1) {
+		if (i >= n)
+			break;
+		if (tx_buf[i])
+			send_pulse(tx_buf[i]);
+		i++;
+		if (i >= n)
+			break;
+		if (tx_buf[i])
+			send_space(tx_buf[i]);
+		i++;
+	}
+	local_irq_restore(flags);
+#ifdef LIRC_ON_SA1100
+	off();
+	udelay(1000); /* wait 1ms for IR diode to recover */
+	Ser2UTCR3 = 0;
+	/* clear status register to prevent unwanted interrupts */
+	Ser2UTSR0 &= (UTSR0_RID | UTSR0_RBB | UTSR0_REB);
+	/* enable receiver */
+	Ser2UTCR3 = UTCR3_RXE|UTCR3_RIE;
+#endif
+	return n;
+}
+
+static int lirc_ioctl(struct inode *node, struct file *filep, unsigned int cmd,
+		unsigned long arg)
+{
+	int retval = 0;
+	unsigned long value = 0;
+#ifdef LIRC_ON_SA1100
+	unsigned int ivalue;
+
+	if (cmd == LIRC_GET_FEATURES)
+		value = LIRC_CAN_SEND_PULSE |
+			LIRC_CAN_SET_SEND_DUTY_CYCLE |
+			LIRC_CAN_SET_SEND_CARRIER |
+			LIRC_CAN_REC_MODE2;
+	else if (cmd == LIRC_GET_SEND_MODE)
+		value = LIRC_MODE_PULSE;
+	else if (cmd == LIRC_GET_REC_MODE)
+		value = LIRC_MODE_MODE2;
+#else
+	if (cmd == LIRC_GET_FEATURES)
+		value = LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2;
+	else if (cmd == LIRC_GET_SEND_MODE)
+		value = LIRC_MODE_PULSE;
+	else if (cmd == LIRC_GET_REC_MODE)
+		value = LIRC_MODE_MODE2;
+#endif
+
+	switch (cmd) {
+	case LIRC_GET_FEATURES:
+	case LIRC_GET_SEND_MODE:
+	case LIRC_GET_REC_MODE:
+		retval = put_user(value, (unsigned long *) arg);
+		break;
+
+	case LIRC_SET_SEND_MODE:
+	case LIRC_SET_REC_MODE:
+		retval = get_user(value, (unsigned long *) arg);
+		break;
+#ifdef LIRC_ON_SA1100
+	case LIRC_SET_SEND_DUTY_CYCLE:
+		retval = get_user(ivalue, (unsigned int *) arg);
+		if (retval)
+			return reetval;
+		if (ivalue <= 0 || ivalue > 100)
+			return -EINVAL;
+		/* (ivalue/100)*(1000000/freq) */
+		duty_cycle = ivalue;
+		pulse_width = (unsigned long) duty_cycle*10000/freq;
+		space_width = (unsigned long) 1000000L/freq-pulse_width;
+		if (pulse_width >= LIRC_ON_SA1100_TRANSMITTER_LATENCY)
+			pulse_width -= LIRC_ON_SA1100_TRANSMITTER_LATENCY;
+		if (space_width >= LIRC_ON_SA1100_TRANSMITTER_LATENCY)
+			space_width -= LIRC_ON_SA1100_TRANSMITTER_LATENCY;
+		break;
+	case LIRC_SET_SEND_CARRIER:
+		retval = get_user(ivalue, (unsigned int *) arg);
+		if (retval)
+			return retval;
+		if (ivalue > 500000 || ivalue < 20000)
+			return -EINVAL;
+		freq = ivalue;
+		pulse_width = (unsigned long) duty_cycle*10000/freq;
+		space_width = (unsigned long) 1000000L/freq-pulse_width;
+		if (pulse_width >= LIRC_ON_SA1100_TRANSMITTER_LATENCY)
+			pulse_width -= LIRC_ON_SA1100_TRANSMITTER_LATENCY;
+		if (space_width >= LIRC_ON_SA1100_TRANSMITTER_LATENCY)
+			space_width -= LIRC_ON_SA1100_TRANSMITTER_LATENCY;
+		break;
+#endif
+	default:
+		retval = -ENOIOCTLCMD;
+
+	}
+
+	if (retval)
+		return retval;
+	if (cmd == LIRC_SET_REC_MODE) {
+		if (value != LIRC_MODE_MODE2)
+			retval = -ENOSYS;
+	} else if (cmd == LIRC_SET_SEND_MODE) {
+		if (value != LIRC_MODE_PULSE)
+			retval = -ENOSYS;
+	}
+
+	return retval;
+}
+
+static void add_read_queue(int flag, unsigned long val)
+{
+	unsigned int new_rx_tail;
+	lirc_t newval;
+
+	dprintk("add flag %d with val %lu\n", flag, val);
+
+	newval = val & PULSE_MASK;
+
+	/*
+	 * statistically, pulses are ~TIME_CONST/2 too long. we could
+	 * maybe make this more exact, but this is good enough
+	 */
+	if (flag) {
+		/* pulse */
+		if (newval > TIME_CONST/2)
+			newval -= TIME_CONST/2;
+		else /* should not ever happen */
+			newval = 1;
+		newval |= PULSE_BIT;
+	} else {
+		newval += TIME_CONST/2;
+	}
+	new_rx_tail = (rx_tail + 1) & (RBUF_LEN - 1);
+	if (new_rx_tail == rx_head) {
+		dprintk("Buffer overrun.\n");
+		return;
+	}
+	rx_buf[rx_tail] = newval;
+	rx_tail = new_rx_tail;
+	wake_up_interruptible(&lirc_read_queue);
+}
+
+static struct file_operations lirc_fops = {
+	.owner		= THIS_MODULE,
+	.read		= lirc_read,
+	.write		= lirc_write,
+	.poll		= lirc_poll,
+	.ioctl		= lirc_ioctl,
+	.open		= lirc_open,
+	.release	= lirc_close,
+};
+
+static int set_use_inc(void *data)
+{
+       return 0;
+}
+
+static void set_use_dec(void *data)
+{
+}
+
+static struct lirc_driver driver = {
+       .name		= LIRC_DRIVER_NAME,
+       .minor		= -1,
+       .code_length	= 1,
+       .sample_rate	= 0,
+       .data		= NULL,
+       .add_to_buf	= NULL,
+#ifndef LIRC_REMOVE_DURING_EXPORT
+       .get_queue	= NULL,
+#endif
+       .set_use_inc	= set_use_inc,
+       .set_use_dec	= set_use_dec,
+       .fops		= &lirc_fops,
+       .dev		= NULL,
+       .owner		= THIS_MODULE,
+};
+
+
+#ifdef MODULE
+static int init_chrdev(void)
+{
+	driver.minor = lirc_register_driver(&driver);
+	if (driver.minor < 0) {
+		printk(KERN_ERR LIRC_DRIVER_NAME ": init_chrdev() failed.\n");
+		return -EIO;
+	}
+	return 0;
+}
+
+static void drop_chrdev(void)
+{
+	lirc_unregister_driver(driver.minor);
+}
+#endif
+
+/* SECTION: Hardware */
+static long delta(struct timeval *tv1, struct timeval *tv2)
+{
+	unsigned long deltv;
+
+	deltv = tv2->tv_sec - tv1->tv_sec;
+	if (deltv > 15)
+		deltv = 0xFFFFFF;
+	else
+		deltv = deltv*1000000 +
+			tv2->tv_usec -
+			tv1->tv_usec;
+	return deltv;
+}
+
+static void sir_timeout(unsigned long data)
+{
+	/*
+	 * if last received signal was a pulse, but receiving stopped
+	 * within the 9 bit frame, we need to finish this pulse and
+	 * simulate a signal change to from pulse to space. Otherwise
+	 * upper layers will receive two sequences next time.
+	 */
+
+	unsigned long flags;
+	unsigned long pulse_end;
+
+	/* avoid interference with interrupt */
+	spin_lock_irqsave(&timer_lock, flags);
+	if (last_value) {
+#ifndef LIRC_ON_SA1100
+		/* clear unread bits in UART and restart */
+		outb(UART_FCR_CLEAR_RCVR, io + UART_FCR);
+#endif
+		/* determine 'virtual' pulse end: */
+		pulse_end = delta(&last_tv, &last_intr_tv);
+		dprintk("timeout add %d for %lu usec\n", last_value, pulse_end);
+		add_read_queue(last_value, pulse_end);
+		last_value = 0;
+		last_tv = last_intr_tv;
+	}
+	spin_unlock_irqrestore(&timer_lock, flags);
+}
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19)
+static irqreturn_t sir_interrupt(int irq, void *dev_id,
+				 struct pt_regs *regs)
+#else
+static irqreturn_t sir_interrupt(int irq, void *dev_id)
+#endif
+{
+	unsigned char data;
+	struct timeval curr_tv;
+	static unsigned long deltv;
+#ifdef LIRC_ON_SA1100
+	int status;
+	static int n;
+
+	status = Ser2UTSR0;
+	/*
+	 * Deal with any receive errors first.  The bytes in error may be
+	 * the only bytes in the receive FIFO, so we do this first.
+	 */
+	while (status & UTSR0_EIF) {
+		int bstat;
+
+		if (debug) {
+			dprintk("EIF\n");
+			bstat = Ser2UTSR1;
+
+			if (bstat & UTSR1_FRE)
+				dprintk("frame error\n");
+			if (bstat & UTSR1_ROR)
+				dprintk("receive fifo overrun\n");
+			if (bstat & UTSR1_PRE)
+				dprintk("parity error\n");
+		}
+
+		bstat = Ser2UTDR;
+		n++;
+		status = Ser2UTSR0;
+	}
+
+	if (status & (UTSR0_RFS | UTSR0_RID)) {
+		do_gettimeofday(&curr_tv);
+		deltv = delta(&last_tv, &curr_tv);
+		do {
+			data = Ser2UTDR;
+			dprintk("%d data: %u\n", n, (unsigned int) data);
+			n++;
+		} while (status & UTSR0_RID && /* do not empty fifo in order to
+						* get UTSR0_RID in any case */
+		      Ser2UTSR1 & UTSR1_RNE); /* data ready */
+
+		if (status&UTSR0_RID) {
+			add_read_queue(0 , deltv - n * TIME_CONST); /*space*/
+			add_read_queue(1, n * TIME_CONST); /*pulse*/
+			n = 0;
+			last_tv = curr_tv;
+		}
+	}
+
+	if (status & UTSR0_TFS)
+		printk(KERN_ERR "transmit fifo not full, shouldn't happen\n");
+
+	/* We must clear certain bits. */
+	status &= (UTSR0_RID | UTSR0_RBB | UTSR0_REB);
+	if (status)
+		Ser2UTSR0 = status;
+#else
+	unsigned long deltintrtv;
+	unsigned long flags;
+	int iir, lsr;
+
+	while ((iir = inb(io + UART_IIR) & UART_IIR_ID)) {
+		switch (iir&UART_IIR_ID) { /* FIXME toto treba preriedit */
+		case UART_IIR_MSI:
+			(void) inb(io + UART_MSR);
+			break;
+		case UART_IIR_RLSI:
+			(void) inb(io + UART_LSR);
+			break;
+		case UART_IIR_THRI:
+#if 0
+			if (lsr & UART_LSR_THRE) /* FIFO is empty */
+				outb(data, io + UART_TX)
+#endif
+			break;
+		case UART_IIR_RDI:
+			/* avoid interference with timer */
+			spin_lock_irqsave(&timer_lock, flags);
+			do {
+				del_timer(&timerlist);
+				data = inb(io + UART_RX);
+				do_gettimeofday(&curr_tv);
+				deltv = delta(&last_tv, &curr_tv);
+				deltintrtv = delta(&last_intr_tv, &curr_tv);
+				dprintk("t %lu, d %d\n", deltintrtv, (int)data);
+				/*
+				 * if nothing came in last X cycles,
+				 * it was gap
+				 */
+				if (deltintrtv > TIME_CONST * threshold) {
+					if (last_value) {
+						dprintk("GAP\n");
+						/* simulate signal change */
+						add_read_queue(last_value,
+							       deltv -
+							       deltintrtv);
+						last_value = 0;
+						last_tv.tv_sec =
+							last_intr_tv.tv_sec;
+						last_tv.tv_usec =
+							last_intr_tv.tv_usec;
+						deltv = deltintrtv;
+					}
+				}
+				data = 1;
+				if (data ^ last_value) {
+					/*
+					 * deltintrtv > 2*TIME_CONST, remember?
+					 * the other case is timeout
+					 */
+					add_read_queue(last_value,
+						       deltv-TIME_CONST);
+					last_value = data;
+					last_tv = curr_tv;
+					if (last_tv.tv_usec >= TIME_CONST) {
+						last_tv.tv_usec -= TIME_CONST;
+					} else {
+						last_tv.tv_sec--;
+						last_tv.tv_usec += 1000000 -
+							TIME_CONST;
+					}
+				}
+				last_intr_tv = curr_tv;
+				if (data) {
+					/*
+					 * start timer for end of
+					 * sequence detection
+					 */
+					timerlist.expires = jiffies +
+								SIR_TIMEOUT;
+					add_timer(&timerlist);
+				}
+
+				lsr = inb(io + UART_LSR);
+			} while (lsr & UART_LSR_DR); /* data ready */
+			spin_unlock_irqrestore(&timer_lock, flags);
+			break;
+		default:
+			break;
+		}
+	}
+#endif
+	return IRQ_RETVAL(IRQ_HANDLED);
+}
+
+#ifdef LIRC_ON_SA1100
+static void send_pulse(unsigned long length)
+{
+	unsigned long k, delay;
+	int flag;
+
+	if (length == 0)
+		return;
+	/*
+	 * this won't give us the carrier frequency we really want
+	 * due to integer arithmetic, but we can accept this inaccuracy
+	 */
+
+	for (k = flag = 0; k < length; k += delay, flag = !flag) {
+		if (flag) {
+			off();
+			delay = space_width;
+		} else {
+			on();
+			delay = pulse_width;
+		}
+		safe_udelay(delay);
+	}
+	off();
+}
+
+static void send_space(unsigned long length)
+{
+	if (length == 0)
+		return;
+	off();
+	safe_udelay(length);
+}
+#else
+static void send_space(unsigned long len)
+{
+	safe_udelay(len);
+}
+
+static void send_pulse(unsigned long len)
+{
+	long bytes_out = len / TIME_CONST;
+	long time_left;
+
+	time_left = (long)len - (long)bytes_out * (long)TIME_CONST;
+	if (bytes_out == 0) {
+		bytes_out++;
+		time_left = 0;
+	}
+	while (bytes_out--) {
+		outb(PULSE, io + UART_TX);
+		/* FIXME treba seriozne cakanie z drivers/char/serial.c */
+		while (!(inb(io + UART_LSR) & UART_LSR_THRE))
+			;
+	}
+#if 0
+	if (time_left > 0)
+		safe_udelay(time_left);
+#endif
+}
+#endif
+
+#ifdef CONFIG_SA1100_COLLIE
+static int sa1100_irda_set_power_collie(int state)
+{
+	if (state) {
+		/*
+		 *  0 - off
+		 *  1 - short range, lowest power
+		 *  2 - medium range, medium power
+		 *  3 - maximum range, high power
+		 */
+		ucb1200_set_io_direction(TC35143_GPIO_IR_ON,
+					 TC35143_IODIR_OUTPUT);
+		ucb1200_set_io(TC35143_GPIO_IR_ON, TC35143_IODAT_LOW);
+		udelay(100);
+	} else {
+		/* OFF */
+		ucb1200_set_io_direction(TC35143_GPIO_IR_ON,
+					 TC35143_IODIR_OUTPUT);
+		ucb1200_set_io(TC35143_GPIO_IR_ON, TC35143_IODAT_HIGH);
+	}
+	return 0;
+}
+#endif
+
+static int init_hardware(void)
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&hardware_lock, flags);
+	/* reset UART */
+#ifdef LIRC_ON_SA1100
+#ifdef CONFIG_SA1100_BITSY
+	if (machine_is_bitsy()) {
+		printk(KERN_INFO "Power on IR module\n");
+		set_bitsy_egpio(EGPIO_BITSY_IR_ON);
+	}
+#endif
+#ifdef CONFIG_SA1100_COLLIE
+	sa1100_irda_set_power_collie(3);	/* power on */
+#endif
+	sr.hscr0 = Ser2HSCR0;
+
+	sr.utcr0 = Ser2UTCR0;
+	sr.utcr1 = Ser2UTCR1;
+	sr.utcr2 = Ser2UTCR2;
+	sr.utcr3 = Ser2UTCR3;
+	sr.utcr4 = Ser2UTCR4;
+
+	sr.utdr = Ser2UTDR;
+	sr.utsr0 = Ser2UTSR0;
+	sr.utsr1 = Ser2UTSR1;
+
+	/* configure GPIO */
+	/* output */
+	PPDR |= PPC_TXD2;
+	PSDR |= PPC_TXD2;
+	/* set output to 0 */
+	off();
+
+	/* Enable HP-SIR modulation, and ensure that the port is disabled. */
+	Ser2UTCR3 = 0;
+	Ser2HSCR0 = sr.hscr0 & (~HSCR0_HSSP);
+
+	/* clear status register to prevent unwanted interrupts */
+	Ser2UTSR0 &= (UTSR0_RID | UTSR0_RBB | UTSR0_REB);
+
+	/* 7N1 */
+	Ser2UTCR0 = UTCR0_1StpBit|UTCR0_7BitData;
+	/* 115200 */
+	Ser2UTCR1 = 0;
+	Ser2UTCR2 = 1;
+	/* use HPSIR, 1.6 usec pulses */
+	Ser2UTCR4 = UTCR4_HPSIR|UTCR4_Z1_6us;
+
+	/* enable receiver, receive fifo interrupt */
+	Ser2UTCR3 = UTCR3_RXE|UTCR3_RIE;
+
+	/* clear status register to prevent unwanted interrupts */
+	Ser2UTSR0 &= (UTSR0_RID | UTSR0_RBB | UTSR0_REB);
+
+#elif defined(LIRC_SIR_TEKRAM)
+	/* disable FIFO */
+	soutp(UART_FCR,
+	      UART_FCR_CLEAR_RCVR|
+	      UART_FCR_CLEAR_XMIT|
+	      UART_FCR_TRIGGER_1);
+
+	/* Set DLAB 0. */
+	soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
+
+	/* First of all, disable all interrupts */
+	soutp(UART_IER, sinp(UART_IER) &
+	      (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
+
+	/* Set DLAB 1. */
+	soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB);
+
+	/* Set divisor to 12 => 9600 Baud */
+	soutp(UART_DLM, 0);
+	soutp(UART_DLL, 12);
+
+	/* Set DLAB 0. */
+	soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
+
+	/* power supply */
+	soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
+	safe_udelay(50*1000);
+
+	/* -DTR low -> reset PIC */
+	soutp(UART_MCR, UART_MCR_RTS|UART_MCR_OUT2);
+	udelay(1*1000);
+
+	soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
+	udelay(100);
+
+
+	/* -RTS low -> send control byte */
+	soutp(UART_MCR, UART_MCR_DTR|UART_MCR_OUT2);
+	udelay(7);
+	soutp(UART_TX, TEKRAM_115200|TEKRAM_PW);
+
+	/* one byte takes ~1042 usec to transmit at 9600,8N1 */
+	udelay(1500);
+
+	/* back to normal operation */
+	soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
+	udelay(50);
+
+	udelay(1500);
+
+	/* read previous control byte */
+	printk(KERN_INFO LIRC_DRIVER_NAME
+	       ": 0x%02x\n", sinp(UART_RX));
+
+	/* Set DLAB 1. */
+	soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB);
+
+	/* Set divisor to 1 => 115200 Baud */
+	soutp(UART_DLM, 0);
+	soutp(UART_DLL, 1);
+
+	/* Set DLAB 0, 8 Bit */
+	soutp(UART_LCR, UART_LCR_WLEN8);
+	/* enable interrupts */
+	soutp(UART_IER, sinp(UART_IER)|UART_IER_RDI);
+#else
+	outb(0, io + UART_MCR);
+	outb(0, io + UART_IER);
+	/* init UART */
+	/* set DLAB, speed = 115200 */
+	outb(UART_LCR_DLAB | UART_LCR_WLEN7, io + UART_LCR);
+	outb(1, io + UART_DLL); outb(0, io + UART_DLM);
+	/* 7N1+start = 9 bits at 115200 ~ 3 bits at 44000 */
+	outb(UART_LCR_WLEN7, io + UART_LCR);
+	/* FIFO operation */
+	outb(UART_FCR_ENABLE_FIFO, io + UART_FCR);
+	/* interrupts */
+	/* outb(UART_IER_RLSI|UART_IER_RDI|UART_IER_THRI, io + UART_IER); */
+	outb(UART_IER_RDI, io + UART_IER);
+	/* turn on UART */
+	outb(UART_MCR_DTR|UART_MCR_RTS|UART_MCR_OUT2, io + UART_MCR);
+#ifdef LIRC_SIR_ACTISYS_ACT200L
+	init_act200();
+#elif defined(LIRC_SIR_ACTISYS_ACT220L)
+	init_act220();
+#endif
+#endif
+	spin_unlock_irqrestore(&hardware_lock, flags);
+	return 0;
+}
+
+static void drop_hardware(void)
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&hardware_lock, flags);
+
+#ifdef LIRC_ON_SA1100
+	Ser2UTCR3 = 0;
+
+	Ser2UTCR0 = sr.utcr0;
+	Ser2UTCR1 = sr.utcr1;
+	Ser2UTCR2 = sr.utcr2;
+	Ser2UTCR4 = sr.utcr4;
+	Ser2UTCR3 = sr.utcr3;
+
+	Ser2HSCR0 = sr.hscr0;
+#ifdef CONFIG_SA1100_BITSY
+	if (machine_is_bitsy())
+		clr_bitsy_egpio(EGPIO_BITSY_IR_ON);
+#endif
+#ifdef CONFIG_SA1100_COLLIE
+	sa1100_irda_set_power_collie(0);	/* power off */
+#endif
+#else
+	/* turn off interrupts */
+	outb(0, io + UART_IER);
+#endif
+	spin_unlock_irqrestore(&hardware_lock, flags);
+}
+
+/* SECTION: Initialisation */
+
+static int init_port(void)
+{
+	int retval;
+
+	/* get I/O port access and IRQ line */
+#ifndef LIRC_ON_SA1100
+	if (request_region(io, 8, LIRC_DRIVER_NAME) == NULL) {
+		printk(KERN_ERR LIRC_DRIVER_NAME
+		       ": i/o port 0x%.4x already in use.\n", io);
+		return -EBUSY;
+	}
+#endif
+	retval = request_irq(irq, sir_interrupt, IRQF_DISABLED,
+			     LIRC_DRIVER_NAME, NULL);
+	if (retval < 0) {
+#               ifndef LIRC_ON_SA1100
+		release_region(io, 8);
+#               endif
+		printk(KERN_ERR LIRC_DRIVER_NAME
+			": IRQ %d already in use.\n",
+			irq);
+		return retval;
+	}
+#ifndef LIRC_ON_SA1100
+	printk(KERN_INFO LIRC_DRIVER_NAME
+		": I/O port 0x%.4x, IRQ %d.\n",
+		io, irq);
+#endif
+
+	init_timer(&timerlist);
+	timerlist.function = sir_timeout;
+	timerlist.data = 0xabadcafe;
+
+	return 0;
+}
+
+static void drop_port(void)
+{
+	free_irq(irq, NULL);
+	del_timer_sync(&timerlist);
+#ifndef LIRC_ON_SA1100
+	release_region(io, 8);
+#endif
+}
+
+#ifdef LIRC_SIR_ACTISYS_ACT200L
+/* Crystal/Cirrus CS8130 IR transceiver, used in Actisys Act200L dongle */
+/* some code borrowed from Linux IRDA driver */
+
+/* Register 0: Control register #1 */
+#define ACT200L_REG0    0x00
+#define ACT200L_TXEN    0x01 /* Enable transmitter */
+#define ACT200L_RXEN    0x02 /* Enable receiver */
+#define ACT200L_ECHO    0x08 /* Echo control chars */
+
+/* Register 1: Control register #2 */
+#define ACT200L_REG1    0x10
+#define ACT200L_LODB    0x01 /* Load new baud rate count value */
+#define ACT200L_WIDE    0x04 /* Expand the maximum allowable pulse */
+
+/* Register 3: Transmit mode register #2 */
+#define ACT200L_REG3    0x30
+#define ACT200L_B0      0x01 /* DataBits, 0=6, 1=7, 2=8, 3=9(8P)  */
+#define ACT200L_B1      0x02 /* DataBits, 0=6, 1=7, 2=8, 3=9(8P)  */
+#define ACT200L_CHSY    0x04 /* StartBit Synced 0=bittime, 1=startbit */
+
+/* Register 4: Output Power register */
+#define ACT200L_REG4    0x40
+#define ACT200L_OP0     0x01 /* Enable LED1C output */
+#define ACT200L_OP1     0x02 /* Enable LED2C output */
+#define ACT200L_BLKR    0x04
+
+/* Register 5: Receive Mode register */
+#define ACT200L_REG5    0x50
+#define ACT200L_RWIDL   0x01 /* fixed 1.6us pulse mode */
+    /*.. other various IRDA bit modes, and TV remote modes..*/
+
+/* Register 6: Receive Sensitivity register #1 */
+#define ACT200L_REG6    0x60
+#define ACT200L_RS0     0x01 /* receive threshold bit 0 */
+#define ACT200L_RS1     0x02 /* receive threshold bit 1 */
+
+/* Register 7: Receive Sensitivity register #2 */
+#define ACT200L_REG7    0x70
+#define ACT200L_ENPOS   0x04 /* Ignore the falling edge */
+
+/* Register 8,9: Baud Rate Divider register #1,#2 */
+#define ACT200L_REG8    0x80
+#define ACT200L_REG9    0x90
+
+#define ACT200L_2400    0x5f
+#define ACT200L_9600    0x17
+#define ACT200L_19200   0x0b
+#define ACT200L_38400   0x05
+#define ACT200L_57600   0x03
+#define ACT200L_115200  0x01
+
+/* Register 13: Control register #3 */
+#define ACT200L_REG13   0xd0
+#define ACT200L_SHDW    0x01 /* Enable access to shadow registers */
+
+/* Register 15: Status register */
+#define ACT200L_REG15   0xf0
+
+/* Register 21: Control register #4 */
+#define ACT200L_REG21   0x50
+#define ACT200L_EXCK    0x02 /* Disable clock output driver */
+#define ACT200L_OSCL    0x04 /* oscillator in low power, medium accuracy mode */
+
+static void init_act200(void)
+{
+	int i;
+	__u8 control[] = {
+		ACT200L_REG15,
+		ACT200L_REG13 | ACT200L_SHDW,
+		ACT200L_REG21 | ACT200L_EXCK | ACT200L_OSCL,
+		ACT200L_REG13,
+		ACT200L_REG7  | ACT200L_ENPOS,
+		ACT200L_REG6  | ACT200L_RS0  | ACT200L_RS1,
+		ACT200L_REG5  | ACT200L_RWIDL,
+		ACT200L_REG4  | ACT200L_OP0  | ACT200L_OP1 | ACT200L_BLKR,
+		ACT200L_REG3  | ACT200L_B0,
+		ACT200L_REG0  | ACT200L_TXEN | ACT200L_RXEN,
+		ACT200L_REG8 |  (ACT200L_115200       & 0x0f),
+		ACT200L_REG9 | ((ACT200L_115200 >> 4) & 0x0f),
+		ACT200L_REG1 | ACT200L_LODB | ACT200L_WIDE
+	};
+
+	/* Set DLAB 1. */
+	soutp(UART_LCR, UART_LCR_DLAB | UART_LCR_WLEN8);
+
+	/* Set divisor to 12 => 9600 Baud */
+	soutp(UART_DLM, 0);
+	soutp(UART_DLL, 12);
+
+	/* Set DLAB 0. */
+	soutp(UART_LCR, UART_LCR_WLEN8);
+	/* Set divisor to 12 => 9600 Baud */
+
+	/* power supply */
+	soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
+	for (i = 0; i < 50; i++)
+		safe_udelay(1000);
+
+		/* Reset the dongle : set RTS low for 25 ms */
+	soutp(UART_MCR, UART_MCR_DTR|UART_MCR_OUT2);
+	for (i = 0; i < 25; i++)
+		udelay(1000);
+
+	soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
+	udelay(100);
+
+	/* Clear DTR and set RTS to enter command mode */
+	soutp(UART_MCR, UART_MCR_RTS|UART_MCR_OUT2);
+	udelay(7);
+
+	/* send out the control register settings for 115K 7N1 SIR operation */
+	for (i = 0; i < sizeof(control); i++) {
+		soutp(UART_TX, control[i]);
+		/* one byte takes ~1042 usec to transmit at 9600,8N1 */
+		udelay(1500);
+	}
+
+	/* back to normal operation */
+	soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
+	udelay(50);
+
+	udelay(1500);
+	soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB);
+
+	/* Set DLAB 1. */
+	soutp(UART_LCR, UART_LCR_DLAB | UART_LCR_WLEN7);
+
+	/* Set divisor to 1 => 115200 Baud */
+	soutp(UART_DLM, 0);
+	soutp(UART_DLL, 1);
+
+	/* Set DLAB 0. */
+	soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
+
+	/* Set DLAB 0, 7 Bit */
+	soutp(UART_LCR, UART_LCR_WLEN7);
+
+	/* enable interrupts */
+	soutp(UART_IER, sinp(UART_IER)|UART_IER_RDI);
+}
+#endif
+
+#ifdef LIRC_SIR_ACTISYS_ACT220L
+/*
+ * Derived from linux IrDA driver (net/irda/actisys.c)
+ * Drop me a mail for any kind of comment: maxx@spaceboyz.net
+ */
+
+void init_act220(void)
+{
+	int i;
+
+	/* DLAB 1 */
+	soutp(UART_LCR, UART_LCR_DLAB|UART_LCR_WLEN7);
+
+	/* 9600 baud */
+	soutp(UART_DLM, 0);
+	soutp(UART_DLL, 12);
+
+	/* DLAB 0 */
+	soutp(UART_LCR, UART_LCR_WLEN7);
+
+	/* reset the dongle, set DTR low for 10us */
+	soutp(UART_MCR, UART_MCR_RTS|UART_MCR_OUT2);
+	udelay(10);
+
+	/* back to normal (still 9600) */
+	soutp(UART_MCR, UART_MCR_DTR|UART_MCR_RTS|UART_MCR_OUT2);
+
+	/*
+	 * send RTS pulses until we reach 115200
+	 * i hope this is really the same for act220l/act220l+
+	 */
+	for (i = 0; i < 3; i++) {
+		udelay(10);
+		/* set RTS low for 10 us */
+		soutp(UART_MCR, UART_MCR_DTR|UART_MCR_OUT2);
+		udelay(10);
+		/* set RTS high for 10 us */
+		soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
+	}
+
+	/* back to normal operation */
+	udelay(1500); /* better safe than sorry ;) */
+
+	/* Set DLAB 1. */
+	soutp(UART_LCR, UART_LCR_DLAB | UART_LCR_WLEN7);
+
+	/* Set divisor to 1 => 115200 Baud */
+	soutp(UART_DLM, 0);
+	soutp(UART_DLL, 1);
+
+	/* Set DLAB 0, 7 Bit */
+	/* The dongle doesn't seem to have any problems with operation at 7N1 */
+	soutp(UART_LCR, UART_LCR_WLEN7);
+
+	/* enable interrupts */
+	soutp(UART_IER, UART_IER_RDI);
+}
+#endif
+
+static int init_lirc_sir(void)
+{
+	int retval;
+
+	init_waitqueue_head(&lirc_read_queue);
+	retval = init_port();
+	if (retval < 0)
+		return retval;
+	init_hardware();
+	printk(KERN_INFO LIRC_DRIVER_NAME
+		": Installed.\n");
+	return 0;
+}
+
+#ifdef MODULE
+
+static int __init lirc_sir_init(void)
+{
+	int retval;
+
+	retval = init_chrdev();
+	if (retval < 0)
+		return retval;
+	retval = init_lirc_sir();
+	if (retval) {
+		drop_chrdev();
+		return retval;
+	}
+	return 0;
+}
+
+static void __exit lirc_sir_exit(void)
+{
+	drop_hardware();
+	drop_chrdev();
+	drop_port();
+	printk(KERN_INFO LIRC_DRIVER_NAME ": Uninstalled.\n");
+}
+
+module_init(lirc_sir_init);
+module_exit(lirc_sir_exit);
+
+#ifdef LIRC_SIR_TEKRAM
+MODULE_DESCRIPTION("Infrared receiver driver for Tekram Irmate 210");
+MODULE_AUTHOR("Christoph Bartelmus");
+#elif defined(LIRC_ON_SA1100)
+MODULE_DESCRIPTION("LIRC driver for StrongARM SA1100 embedded microprocessor");
+MODULE_AUTHOR("Christoph Bartelmus");
+#elif defined(LIRC_SIR_ACTISYS_ACT200L)
+MODULE_DESCRIPTION("LIRC driver for Actisys Act200L");
+MODULE_AUTHOR("Karl Bongers");
+#elif defined(LIRC_SIR_ACTISYS_ACT220L)
+MODULE_DESCRIPTION("LIRC driver for Actisys Act220L(+)");
+MODULE_AUTHOR("Jan Roemisch");
+#else
+MODULE_DESCRIPTION("Infrared receiver driver for SIR type serial ports");
+MODULE_AUTHOR("Milan Pikula");
+#endif
+MODULE_LICENSE("GPL");
+
+#ifdef LIRC_ON_SA1100
+module_param(irq, int, S_IRUGO);
+MODULE_PARM_DESC(irq, "Interrupt (16)");
+#else
+module_param(io, int, S_IRUGO);
+MODULE_PARM_DESC(io, "I/O address base (0x3f8 or 0x2f8)");
+
+module_param(irq, int, S_IRUGO);
+MODULE_PARM_DESC(irq, "Interrupt (4 or 3)");
+
+module_param(threshold, int, S_IRUGO);
+MODULE_PARM_DESC(threshold, "space detection threshold (3)");
+#endif
+
+module_param(debug, bool, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(debug, "Enable debugging messages");
+
+EXPORT_NO_SYMBOLS;
+
+#endif /* MODULE */
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_ene0100/lirc_ene0100.h
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_ene0100/lirc_ene0100.h
@@ -0,0 +1,170 @@
+/*
+ * driver for ENE KB3926 B/C/D CIR (also known as ENE0100)
+ *
+ * Copyright (C) 2009 Maxim Levitsky <maximlevitsky@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
+ * USA
+ */
+
+#include "../kcompat.h"
+#include "../lirc.h"
+#include "../lirc_dev/lirc_dev.h"
+
+/* hardware address */
+#define ENE_STATUS		0	 /* hardware status - unused */
+#define ENE_ADDR_HI 		1	 /* hi byte of register address */
+#define ENE_ADDR_LO 		2	 /* low byte of register address */
+#define ENE_IO 			3	 /* read/write window */
+#define ENE_MAX_IO		4
+
+/* 8 bytes of samples, divided in 2 halfs*/
+#define ENE_SAMPLE_BUFFER 	0xF8F0	 /* regular sample buffer */
+#define ENE_SAMPLE_SPC_MASK 	(1 << 7) /* sample is space */
+#define ENE_SAMPLE_VALUE_MASK	0x7F
+#define ENE_SAMPLE_OVERFLOW	0x7F
+#define ENE_SAMPLES_SIZE	4
+
+/* fan input sample buffer */
+#define ENE_SAMPLE_BUFFER_FAN	0xF8FB	 /* this buffer holds high byte of */
+					 /* each sample of normal buffer */
+
+#define ENE_FAN_SMPL_PULS_MSK	0x8000	 /* this bit of combined sample */
+					 /* if set, says that sample is pulse */
+#define ENE_FAN_VALUE_MASK	0x0FFF   /* mask for valid bits of the value */
+
+/* first firmware register */
+#define ENE_FW1			0xF8F8
+#define	ENE_FW1_ENABLE		(1 << 0) /* enable fw processing */
+#define ENE_FW1_TXIRQ		(1 << 1) /* TX interrupt pending */
+#define ENE_FW1_WAKE		(1 << 6) /* enable wake from S3 */
+#define ENE_FW1_IRQ		(1 << 7) /* enable interrupt */
+
+/* second firmware register */
+#define ENE_FW2			0xF8F9
+#define ENE_FW2_BUF_HIGH	(1 << 0) /* which half of the buffer to read */
+#define ENE_FW2_IRQ_CLR		(1 << 2) /* clear this on IRQ */
+#define ENE_FW2_GP40_AS_LEARN	(1 << 4) /* normal input is used as */
+					 /* learning input */
+#define ENE_FW2_FAN_AS_NRML_IN	(1 << 6) /* fan is used as normal input */
+#define ENE_FW2_LEARNING	(1 << 7) /* hardware supports learning and TX */
+
+/* fan as input settings - only if learning capable */
+#define ENE_FAN_AS_IN1		0xFE30   /* fan init reg 1 */
+#define ENE_FAN_AS_IN1_EN	0xCD
+#define ENE_FAN_AS_IN2		0xFE31   /* fan init reg 2 */
+#define ENE_FAN_AS_IN2_EN	0x03
+#define ENE_SAMPLE_PERIOD_FAN   61	 /* fan input has fixed sample period */
+
+/* IRQ registers block (for revision B) */
+#define ENEB_IRQ		0xFD09	 /* IRQ number */
+#define ENEB_IRQ_UNK1		0xFD17	 /* unknown setting = 1 */
+#define ENEB_IRQ_STATUS		0xFD80	 /* irq status */
+#define ENEB_IRQ_STATUS_IR	(1 << 5) /* IR irq */
+
+/* IRQ registers block (for revision C,D) */
+#define ENEC_IRQ		0xFE9B	 /* new irq settings register */
+#define ENEC_IRQ_MASK		0x0F	 /* irq number mask */
+#define ENEC_IRQ_UNK_EN		(1 << 4) /* always enabled */
+#define ENEC_IRQ_STATUS		(1 << 5) /* irq status and ACK */
+
+/* CIR block settings */
+#define ENE_CIR_CONF1		0xFEC0
+#define ENE_CIR_CONF1_ADC_ON	0x7	 /* reciever on gpio40 enabled */
+#define ENE_CIR_CONF1_LEARN1	(1 << 3) /* enabled on learning mode */
+#define ENE_CIR_CONF1_TX_ON	0x30	 /* enabled on transmit */
+#define ENE_CIR_CONF1_TX_CARR	(1 << 7) /* send TX carrier or not */
+
+#define ENE_CIR_CONF2		0xFEC1	 /* unknown setting = 0 */
+#define ENE_CIR_CONF2_LEARN2	(1 << 4) /* set on enable learning */
+#define ENE_CIR_CONF2_GPIO40DIS	(1 << 5) /* disable normal input via gpio40 */
+
+#define ENE_CIR_SAMPLE_PERIOD	0xFEC8	 /* sample period in us */
+#define ENE_CIR_SAMPLE_OVERFLOW	(1 << 7) /* interrupt on overflows if set */
+
+
+/* transmitter - not implemented yet */
+/* KB3926C and higher */
+/* transmission is very similiar to recieving, a byte is written to */
+/* ENE_TX_INPUT, in same manner as it is read from sample buffer */
+/* sample period is fixed*/
+
+
+/* transmitter ports */
+#define ENE_TX_PORT1		0xFC01	 /* this enables one or both */
+#define ENE_TX_PORT1_EN		(1 << 5) /* TX ports */
+#define ENE_TX_PORT2		0xFC08
+#define ENE_TX_PORT2_EN		(1 << 1)
+
+#define ENE_TX_INPUT		0xFEC9	 /* next byte to transmit */
+#define ENE_TX_SPC_MASK 	(1 << 7) /* Transmitted sample is space */
+#define ENE_TX_UNK1		0xFECB	 /* set to 0x63 */
+#define ENE_TX_SMPL_PERIOD	50	 /* transmit sample period */
+
+
+#define ENE_TX_CARRIER		0xFECE	 /* TX carrier * 2 (khz) */
+#define ENE_TX_CARRIER_UNKBIT	0x80	 /* This bit set on transmit */
+#define ENE_TX_CARRIER_LOW	0xFECF	 /* TX carrier / 2 */
+
+/* Hardware versions */
+#define ENE_HW_VERSION		0xFF00	 /* hardware revision */
+#define ENE_HW_UNK 		0xFF1D
+#define ENE_HW_UNK_CLR		(1 << 2)
+#define ENE_HW_VER_MAJOR	0xFF1E	 /* chip version */
+#define ENE_HW_VER_MINOR	0xFF1F
+#define ENE_HW_VER_OLD		0xFD00
+
+#define same_sign(a, b) ((((a) > 0) && (b) > 0) || ((a) < 0 && (b) < 0))
+
+#define ENE_DRIVER_NAME 	"enecir"
+#define ENE_MAXGAP 		250000	 /* this is amount of time we wait
+					 before turning the sampler, chosen
+					 arbitry */
+
+#define space(len) 	       (-(len))	 /* add a space */
+
+/* software defines */
+#define ENE_IRQ_RX		1
+#define ENE_IRQ_TX		2
+
+#define  ENE_HW_B		1	/* 3926B */
+#define  ENE_HW_C		2	/* 3926C */
+#define  ENE_HW_D		3	/* 3926D */
+
+#define ene_printk(level, text, ...) \
+	printk(level ENE_DRIVER_NAME ": " text, ## __VA_ARGS__)
+
+struct ene_device {
+	struct pnp_dev *pnp_dev;
+	struct lirc_driver *lirc_driver;
+
+	/* hw settings */
+	unsigned long hw_io;
+	int irq;
+
+	int hw_revision;			/* hardware revision */
+	int hw_learning_and_tx_capable;		/* learning capable */
+	int hw_gpio40_learning;			/* gpio40 is learning */
+	int hw_fan_as_normal_input;	/* fan input is used as regular input */
+
+	/* device data */
+	int idle;
+	int fan_input_inuse;
+
+	int sample;
+	int in_use;
+
+	struct timeval gap_start;
+};
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_ene0100/Makefile
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_ene0100/Makefile
@@ -0,0 +1,3 @@
+EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)/..
+
+obj-$(CONFIG_LIRC_ENE0100)		+= lirc_ene0100.o
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_ene0100/lirc_ene0100.c
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_ene0100/lirc_ene0100.c
@@ -0,0 +1,653 @@
+/*
+ * driver for ENE KB3926 B/C/D CIR (also known as ENE0100)
+ *
+ * Copyright (C) 2009 Maxim Levitsky <maximlevitsky@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
+ * USA
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/pnp.h>
+#include <linux/io.h>
+#include <linux/interrupt.h>
+#include "lirc_ene0100.h"
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 16)
+#error "Sorry, this driver needs kernel version 2.6.16 or higher"
+#else
+
+static int sample_period = 75;
+static int enable_idle = 1;
+static int enable_learning;
+
+static void ene_set_idle(struct ene_device *dev, int idle);
+static void ene_set_inputs(struct ene_device *dev, int enable);
+
+/* read a hardware register */
+static u8 ene_hw_read_reg(struct ene_device *dev, u16 reg)
+{
+	outb(reg >> 8, dev->hw_io + ENE_ADDR_HI);
+	outb(reg & 0xFF, dev->hw_io + ENE_ADDR_LO);
+	return inb(dev->hw_io + ENE_IO);
+}
+
+/* write a hardware register */
+static void ene_hw_write_reg(struct ene_device *dev, u16 reg, u8 value)
+{
+	outb(reg >> 8, dev->hw_io + ENE_ADDR_HI);
+	outb(reg & 0xFF, dev->hw_io + ENE_ADDR_LO);
+	outb(value, dev->hw_io + ENE_IO);
+}
+
+/* change specific bits in hardware register */
+static void ene_hw_write_reg_mask(struct ene_device *dev,
+				  u16 reg, u8 value, u8 mask)
+{
+	u8 regvalue;
+
+	outb(reg >> 8, dev->hw_io + ENE_ADDR_HI);
+	outb(reg & 0xFF, dev->hw_io + ENE_ADDR_LO);
+
+	regvalue = inb(dev->hw_io + ENE_IO) & ~mask;
+	regvalue |= (value & mask);
+	outb(regvalue, dev->hw_io + ENE_IO);
+}
+
+/* read irq status and ack it */
+static int ene_hw_irq_status(struct ene_device *dev, int *buffer_pointer)
+{
+	u8 irq_status;
+	u8 fw_flags1, fw_flags2;
+
+	fw_flags2 = ene_hw_read_reg(dev, ENE_FW2);
+
+	if (buffer_pointer)
+		*buffer_pointer = 4 * (fw_flags2 & ENE_FW2_BUF_HIGH);
+
+	if (dev->hw_revision < ENE_HW_C) {
+		irq_status = ene_hw_read_reg(dev, ENEB_IRQ_STATUS);
+
+		if (!irq_status & ENEB_IRQ_STATUS_IR)
+			return 0;
+		ene_hw_write_reg(dev, ENEB_IRQ_STATUS,
+				 irq_status & ~ENEB_IRQ_STATUS_IR);
+
+		/* rev B support only recieving */
+		return ENE_IRQ_RX;
+	}
+
+	irq_status = ene_hw_read_reg(dev, ENEC_IRQ);
+
+	if (!irq_status && ENEC_IRQ_STATUS)
+		return 0;
+
+	/* original driver does that twice - a workaround ? */
+	ene_hw_write_reg(dev, ENEC_IRQ, irq_status & ~ENEC_IRQ_STATUS);
+	ene_hw_write_reg(dev, ENEC_IRQ, irq_status & ~ENEC_IRQ_STATUS);
+
+	/* clear unknown flag in F8F9 */
+	if (fw_flags2 & ENE_FW2_IRQ_CLR)
+		ene_hw_write_reg(dev, ENE_FW2, fw_flags2 & ~ENE_FW2_IRQ_CLR);
+
+	/* check if this is a TX interrupt */
+	fw_flags1 = ene_hw_read_reg(dev, ENE_FW1);
+
+	if (fw_flags1 & ENE_FW1_TXIRQ) {
+		ene_hw_write_reg(dev, ENE_FW1, fw_flags1 & ~ENE_FW1_TXIRQ);
+		return ENE_IRQ_TX;
+	} else
+		return ENE_IRQ_RX;
+}
+
+static int ene_hw_detect(struct ene_device *dev)
+{
+	u8 chip_major, chip_minor;
+	u8 hw_revision, old_ver;
+	u8 tmp;
+	u8 fw_capabilities;
+
+	tmp = ene_hw_read_reg(dev, ENE_HW_UNK);
+	ene_hw_write_reg(dev, ENE_HW_UNK, tmp & ~ENE_HW_UNK_CLR);
+
+	chip_major = ene_hw_read_reg(dev, ENE_HW_VER_MAJOR);
+	chip_minor = ene_hw_read_reg(dev, ENE_HW_VER_MINOR);
+
+	ene_hw_write_reg(dev, ENE_HW_UNK, tmp);
+	hw_revision = ene_hw_read_reg(dev, ENE_HW_VERSION);
+	old_ver = ene_hw_read_reg(dev, ENE_HW_VER_OLD);
+
+	if (hw_revision == 0xFF) {
+
+		ene_printk(KERN_WARNING, "device seems to be disabled\n");
+		ene_printk(KERN_WARNING,
+			"send a mail to lirc-list@lists.sourceforge.net\n");
+		ene_printk(KERN_WARNING, "please attach output of acpidump\n");
+
+		return -ENODEV;
+	}
+
+	if (chip_major == 0x33) {
+		ene_printk(KERN_WARNING, "chips 0x33xx aren't supported yet\n");
+		return -ENODEV;
+	}
+
+	if (chip_major == 0x39 && chip_minor == 0x26 && hw_revision == 0xC0) {
+		dev->hw_revision = ENE_HW_C;
+		ene_printk(KERN_WARNING,
+		       "KB3926C detected, driver support is not complete!\n");
+
+	} else if (old_ver == 0x24 && hw_revision == 0xC0) {
+		dev->hw_revision = ENE_HW_B;
+		ene_printk(KERN_NOTICE, "KB3926B detected\n");
+	} else {
+		dev->hw_revision = ENE_HW_D;
+		ene_printk(KERN_WARNING,
+			"unknown ENE chip detected, assuming KB3926D\n");
+		ene_printk(KERN_WARNING, "driver support incomplete");
+
+	}
+
+	ene_printk(KERN_DEBUG, "chip is 0x%02x%02x - 0x%02x, 0x%02x\n",
+		chip_major, chip_minor, old_ver, hw_revision);
+
+
+	/* detect features hardware supports */
+
+	if (dev->hw_revision < ENE_HW_C)
+		return 0;
+
+	fw_capabilities = ene_hw_read_reg(dev, ENE_FW2);
+
+	dev->hw_gpio40_learning = fw_capabilities & ENE_FW2_GP40_AS_LEARN;
+	dev->hw_learning_and_tx_capable = fw_capabilities & ENE_FW2_LEARNING;
+
+	dev->hw_fan_as_normal_input = dev->hw_learning_and_tx_capable &&
+	    fw_capabilities & ENE_FW2_FAN_AS_NRML_IN;
+
+	ene_printk(KERN_NOTICE, "hardware features:\n");
+	ene_printk(KERN_NOTICE,
+		"learning and tx %s, gpio40_learn %s, fan_in %s\n",
+	       dev->hw_learning_and_tx_capable ? "on" : "off",
+	       dev->hw_gpio40_learning ? "on" : "off",
+	       dev->hw_fan_as_normal_input ? "on" : "off");
+
+	if (!dev->hw_learning_and_tx_capable && enable_learning)
+		enable_learning = 0;
+
+	if (dev->hw_learning_and_tx_capable) {
+		ene_printk(KERN_WARNING,
+		"Device supports transmitting, but the driver doesn't\n");
+		ene_printk(KERN_WARNING,
+		"due to lack of hardware to test against.\n");
+		ene_printk(KERN_WARNING,
+		"Send a mail to: lirc-list@lists.sourceforge.net\n");
+	}
+	return 0;
+}
+
+/* hardware initialization */
+static int ene_hw_init(void *data)
+{
+	u8 reg_value;
+	struct ene_device *dev = (struct ene_device *)data;
+	dev->in_use = 1;
+
+	if (dev->hw_revision < ENE_HW_C) {
+		ene_hw_write_reg(dev, ENEB_IRQ, dev->irq << 1);
+		ene_hw_write_reg(dev, ENEB_IRQ_UNK1, 0x01);
+	} else {
+		reg_value = ene_hw_read_reg(dev, ENEC_IRQ) & 0xF0;
+		reg_value |= ENEC_IRQ_UNK_EN;
+		reg_value &= ~ENEC_IRQ_STATUS;
+		reg_value |= (dev->irq & ENEC_IRQ_MASK);
+		ene_hw_write_reg(dev, ENEC_IRQ, reg_value);
+		ene_hw_write_reg(dev, ENE_TX_UNK1, 0x63);
+	}
+
+	ene_hw_write_reg(dev, ENE_CIR_CONF2, 0x00);
+	ene_set_inputs(dev, enable_learning);
+
+	/* set sampling period */
+	ene_hw_write_reg(dev, ENE_CIR_SAMPLE_PERIOD, sample_period);
+
+	/* ack any pending irqs - just in case */
+	ene_hw_irq_status(dev, NULL);
+
+	/* enter idle mode */
+	ene_set_idle(dev, 1);
+
+	/* enable firmware bits */
+	ene_hw_write_reg_mask(dev, ENE_FW1,
+			      ENE_FW1_ENABLE | ENE_FW1_IRQ,
+			      ENE_FW1_ENABLE | ENE_FW1_IRQ);
+	/* clear stats */
+	dev->sample = 0;
+	return 0;
+}
+
+/* this enables gpio40 signal, used if connected to wide band input*/
+static void ene_enable_gpio40(struct ene_device *dev, int enable)
+{
+	ene_hw_write_reg_mask(dev, ENE_CIR_CONF1, enable ?
+			      0 : ENE_CIR_CONF2_GPIO40DIS,
+			      ENE_CIR_CONF2_GPIO40DIS);
+}
+
+/* this enables the classic sampler */
+static void ene_enable_normal_recieve(struct ene_device *dev, int enable)
+{
+	ene_hw_write_reg(dev, ENE_CIR_CONF1, enable ? ENE_CIR_CONF1_ADC_ON : 0);
+}
+
+/* this enables recieve via fan input */
+static void ene_enable_fan_recieve(struct ene_device *dev, int enable)
+{
+	if (!enable)
+		ene_hw_write_reg(dev, ENE_FAN_AS_IN1, 0);
+	else {
+		ene_hw_write_reg(dev, ENE_FAN_AS_IN1, ENE_FAN_AS_IN1_EN);
+		ene_hw_write_reg(dev, ENE_FAN_AS_IN2, ENE_FAN_AS_IN2_EN);
+	}
+	dev->fan_input_inuse = enable;
+}
+
+/* determine which input to use*/
+static void ene_set_inputs(struct ene_device *dev, int learning_enable)
+{
+	ene_enable_normal_recieve(dev, 1);
+
+	/* old hardware doesn't support learning mode for sure */
+	if (dev->hw_revision <= ENE_HW_B)
+		return;
+
+	/* reciever not learning capable, still set gpio40 correctly */
+	if (!dev->hw_learning_and_tx_capable) {
+		ene_enable_gpio40(dev, !dev->hw_gpio40_learning);
+		return;
+	}
+
+	/* enable learning mode */
+	if (learning_enable) {
+		ene_enable_gpio40(dev, dev->hw_gpio40_learning);
+
+		/* fan input is not used for learning */
+		if (dev->hw_fan_as_normal_input)
+			ene_enable_fan_recieve(dev, 0);
+
+	/* disable learning mode */
+	} else {
+		if (dev->hw_fan_as_normal_input) {
+			ene_enable_fan_recieve(dev, 1);
+			ene_enable_normal_recieve(dev, 0);
+		} else
+			ene_enable_gpio40(dev, !dev->hw_gpio40_learning);
+	}
+
+	/* set few additional settings for this mode */
+	ene_hw_write_reg_mask(dev, ENE_CIR_CONF1, learning_enable ?
+			      ENE_CIR_CONF1_LEARN1 : 0, ENE_CIR_CONF1_LEARN1);
+
+	ene_hw_write_reg_mask(dev, ENE_CIR_CONF2, learning_enable ?
+			      ENE_CIR_CONF2_LEARN2 : 0, ENE_CIR_CONF2_LEARN2);
+}
+
+/* deinitialization */
+static void ene_hw_deinit(void *data)
+{
+	struct ene_device *dev = (struct ene_device *)data;
+
+	/* disable samplers */
+	ene_enable_normal_recieve(dev, 0);
+
+	if (dev->hw_fan_as_normal_input)
+		ene_enable_fan_recieve(dev, 0);
+
+	/* disable hardware IRQ and firmware flag */
+	ene_hw_write_reg_mask(dev, ENE_FW1, 0, ENE_FW1_ENABLE | ENE_FW1_IRQ);
+
+	ene_set_idle(dev, 1);
+	dev->in_use = 0;
+}
+
+/*  sends current sample to userspace */
+static void send_sample(struct ene_device *dev)
+{
+	int value = abs(dev->sample) & PULSE_MASK;
+
+	if (dev->sample > 0)
+		value |= PULSE_BIT;
+
+	if (!lirc_buffer_full(dev->lirc_driver->rbuf)) {
+		lirc_buffer_write(dev->lirc_driver->rbuf, (void *)&value);
+		wake_up(&dev->lirc_driver->rbuf->wait_poll);
+	}
+	dev->sample = 0;
+}
+
+/*  this updates current sample */
+static void update_sample(struct ene_device *dev, int sample)
+{
+	if (!dev->sample)
+		dev->sample = sample;
+	else if (same_sign(dev->sample, sample))
+		dev->sample += sample;
+	else {
+		send_sample(dev);
+		dev->sample = sample;
+	}
+}
+
+/* enable or disable idle mode */
+static void ene_set_idle(struct ene_device *dev, int idle)
+{
+	struct timeval now;
+	int disable = idle && enable_idle && (dev->hw_revision < ENE_HW_C);
+
+	ene_hw_write_reg_mask(dev, ENE_CIR_SAMPLE_PERIOD,
+			      disable ? 0 : ENE_CIR_SAMPLE_OVERFLOW,
+			      ENE_CIR_SAMPLE_OVERFLOW);
+	dev->idle = idle;
+
+	/* remember when we have entered the idle mode */
+	if (idle) {
+		do_gettimeofday(&dev->gap_start);
+		return;
+	}
+
+	/* send the gap between keypresses now */
+	do_gettimeofday(&now);
+
+	if (now.tv_sec - dev->gap_start.tv_sec > 16)
+		dev->sample = space(PULSE_MASK);
+	else
+		dev->sample = dev->sample +
+		    space(1000000ull * (now.tv_sec - dev->gap_start.tv_sec))
+		    + space(now.tv_usec - dev->gap_start.tv_usec);
+
+	if (abs(dev->sample) > PULSE_MASK)
+		dev->sample = space(PULSE_MASK);
+	send_sample(dev);
+}
+
+/* interrupt handler */
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 19)
+static irqreturn_t ene_hw_irq(int irq, void *data)
+#else
+static irqreturn_t ene_hw_irq(int irq, void *data, struct pt_regs *regs)
+#endif
+{
+	u16 hw_value;
+	int i, hw_sample;
+	int space;
+	int buffer_pointer;
+	int irq_status;
+
+	struct ene_device *dev = (struct ene_device *)data;
+	irq_status = ene_hw_irq_status(dev, &buffer_pointer);
+
+	if (!irq_status)
+		return IRQ_NONE;
+
+	/* TODO: only RX for now */
+	if (irq_status == ENE_IRQ_TX)
+		return IRQ_HANDLED;
+
+	for (i = 0; i < ENE_SAMPLES_SIZE; i++) {
+
+		hw_value = ene_hw_read_reg(dev,
+				ENE_SAMPLE_BUFFER + buffer_pointer + i);
+
+		if (dev->fan_input_inuse) {
+			/* read high part of the sample */
+			hw_value |= ene_hw_read_reg(dev,
+			    ENE_SAMPLE_BUFFER_FAN + buffer_pointer + i) << 8;
+
+			/* test for _space_ bit */
+			space = !(hw_value & ENE_FAN_SMPL_PULS_MSK);
+
+			/* clear space bit, and other unused bits */
+			hw_value &= ENE_FAN_VALUE_MASK;
+			hw_sample = hw_value * ENE_SAMPLE_PERIOD_FAN;
+
+		} else {
+			space = hw_value & ENE_SAMPLE_SPC_MASK;
+			hw_value &= ENE_SAMPLE_VALUE_MASK;
+			hw_sample = hw_value * sample_period;
+		}
+
+		/* no more data */
+		if (!(hw_value))
+			break;
+
+		if (space)
+			hw_sample *= -1;
+
+		/* overflow sample recieved, handle it */
+
+		if (!dev->fan_input_inuse && hw_value == ENE_SAMPLE_OVERFLOW) {
+
+			if (dev->idle)
+				continue;
+
+			if (dev->sample > 0 || abs(dev->sample) <= ENE_MAXGAP)
+				update_sample(dev, hw_sample);
+			else
+				ene_set_idle(dev, 1);
+
+			continue;
+		}
+
+		/* normal first sample recieved */
+		if (!dev->fan_input_inuse && dev->idle) {
+			ene_set_idle(dev, 0);
+
+			/* discard first recieved value, its random
+			   since its the time signal was off before
+			   first pulse if idle mode is enabled, HW
+			   does that for us */
+
+			if (!enable_idle)
+				continue;
+		}
+		update_sample(dev, hw_sample);
+		send_sample(dev);
+	}
+	return IRQ_HANDLED;
+}
+
+static int ene_probe(struct pnp_dev *pnp_dev,
+		     const struct pnp_device_id *dev_id)
+{
+	struct ene_device *dev;
+	struct lirc_driver *lirc_driver;
+	int error = -ENOMEM;
+
+	dev = kzalloc(sizeof(struct ene_device), GFP_KERNEL);
+
+	if (!dev)
+		goto err1;
+
+	dev->pnp_dev = pnp_dev;
+	pnp_set_drvdata(pnp_dev, dev);
+
+
+	/* prepare lirc interface */
+	error = -ENOMEM;
+	lirc_driver = kzalloc(sizeof(struct lirc_driver), GFP_KERNEL);
+
+	if (!lirc_driver)
+		goto err2;
+
+	dev->lirc_driver = lirc_driver;
+
+	strcpy(lirc_driver->name, ENE_DRIVER_NAME);
+	lirc_driver->minor = -1;
+	lirc_driver->code_length = sizeof(int) * 8;
+	lirc_driver->features = LIRC_CAN_REC_MODE2;
+	lirc_driver->data = dev;
+	lirc_driver->set_use_inc = ene_hw_init;
+	lirc_driver->set_use_dec = ene_hw_deinit;
+	lirc_driver->dev = &pnp_dev->dev;
+	lirc_driver->owner = THIS_MODULE;
+
+	lirc_driver->rbuf = kzalloc(sizeof(struct lirc_buffer), GFP_KERNEL);
+
+	if (!lirc_driver->rbuf)
+		goto err3;
+
+	if (lirc_buffer_init(lirc_driver->rbuf, sizeof(int), sizeof(int) * 256))
+		goto err4;
+
+	error = -ENODEV;
+	if (lirc_register_driver(lirc_driver))
+		goto err5;
+
+	/* validate resources */
+	if (!pnp_port_valid(pnp_dev, 0) || pnp_port_len(pnp_dev, 0) < ENE_MAX_IO)
+		goto err6;
+
+	if (!pnp_irq_valid(pnp_dev, 0))
+		goto err6;
+
+	dev->hw_io = pnp_port_start(pnp_dev, 0);
+	dev->irq = pnp_irq(pnp_dev, 0);
+
+	/* claim the resources */
+	error = -EBUSY;
+	if (!request_region(dev->hw_io, ENE_MAX_IO, ENE_DRIVER_NAME))
+		goto err6;
+
+	if (request_irq(dev->irq, ene_hw_irq,
+			IRQF_SHARED, ENE_DRIVER_NAME, (void *)dev))
+		goto err7;
+
+	/* detect hardware version and features */
+	error = ene_hw_detect(dev);
+	if (error)
+		goto err8;
+
+	ene_printk(KERN_NOTICE, "driver has been succesfully loaded\n");
+	return 0;
+
+err8:
+	free_irq(dev->irq, dev);
+err7:
+	release_region(dev->hw_io, ENE_MAX_IO);
+err6:
+	lirc_unregister_driver(lirc_driver->minor);
+err5:
+	lirc_buffer_free(lirc_driver->rbuf);
+err4:
+	kfree(lirc_driver->rbuf);
+err3:
+	kfree(lirc_driver);
+err2:
+	kfree(dev);
+err1:
+	return error;
+}
+
+static void ene_remove(struct pnp_dev *pnp_dev)
+{
+	struct ene_device *dev = pnp_get_drvdata(pnp_dev);
+	ene_hw_deinit(dev);
+	free_irq(dev->irq, dev);
+	release_region(dev->hw_io, ENE_MAX_IO);
+	lirc_unregister_driver(dev->lirc_driver->minor);
+	lirc_buffer_free(dev->lirc_driver->rbuf);
+	kfree(dev->lirc_driver);
+	kfree(dev);
+}
+
+#ifdef CONFIG_PM
+
+/* TODO: make 'wake on IR' configurable and add .shutdown */
+/* currently impossible due to lack of kernel support */
+
+static int ene_suspend(struct pnp_dev *pnp_dev, pm_message_t state)
+{
+	struct ene_device *dev = pnp_get_drvdata(pnp_dev);
+	ene_hw_write_reg_mask(dev, ENE_FW1, ENE_FW1_WAKE, ENE_FW1_WAKE);
+	return 0;
+}
+
+static int ene_resume(struct pnp_dev *pnp_dev)
+{
+	struct ene_device *dev = pnp_get_drvdata(pnp_dev);
+	if (dev->in_use)
+		ene_hw_init(dev);
+
+	ene_hw_write_reg_mask(dev, ENE_FW1, 0, ENE_FW1_WAKE);
+	return 0;
+}
+
+#endif
+
+static const struct pnp_device_id ene_ids[] = {
+	{.id = "ENE0100",},
+	{},
+};
+
+static struct pnp_driver ene_driver = {
+	.name = ENE_DRIVER_NAME,
+	.id_table = ene_ids,
+	.flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
+
+	.probe = ene_probe,
+	.remove = __devexit_p(ene_remove),
+
+#ifdef CONFIG_PM
+	.suspend = ene_suspend,
+	.resume = ene_resume,
+#endif
+};
+
+static int __init ene_init(void)
+{
+	if (sample_period < 5) {
+		ene_printk(KERN_ERR, "sample period must be at\n");
+		ene_printk(KERN_ERR, "least 5 us, (at least 30 recommended)\n");
+		return -EINVAL;
+	}
+	return pnp_register_driver(&ene_driver);
+}
+
+static void ene_exit(void)
+{
+	pnp_unregister_driver(&ene_driver);
+}
+
+module_param(sample_period, int, S_IRUGO);
+MODULE_PARM_DESC(sample_period, "Hardware sample period (75 us default)");
+
+module_param(enable_idle, bool, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(enable_idle,
+	"Enables turning off signal sampling after long inactivity time; "
+	"if disabled might help detecting input signal (default: enabled)");
+
+module_param(enable_learning, bool, S_IRUGO);
+MODULE_PARM_DESC(enable_learning, "Use wide band (learning) reciever");
+
+MODULE_DEVICE_TABLE(pnp, ene_ids);
+MODULE_DESCRIPTION
+    ("LIRC driver for KB3926B/KB3926C/KB3926D (aka ENE0100) CIR port");
+MODULE_AUTHOR("Maxim Levitsky");
+MODULE_LICENSE("GPL");
+
+module_init(ene_init);
+module_exit(ene_exit);
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_it87/Makefile
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_it87/Makefile
@@ -0,0 +1,3 @@
+EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)/..
+
+obj-$(CONFIG_LIRC_IT87)		+= lirc_it87.o
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_it87/lirc_it87.h
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_it87/lirc_it87.h
@@ -0,0 +1,116 @@
+/* lirc_it87.h */
+/* SECTION: Definitions */
+
+/********************************* ITE IT87xx ************************/
+
+/* based on the following documentation from ITE:
+   a) IT8712F Preliminary CIR Programming Guide V0.1
+   b) IT8705F Simple LPC I/O Preliminary Specification V0.3
+   c) IT8712F EC-LPC I/O Preliminary Specification V0.5
+*/
+
+/* IT8712/05 Ports: */
+#define IT87_ADRPORT      0x2e
+#define IT87_DATAPORT     0x2f
+#define IT87_INIT         {0x87, 0x01, 0x55, 0x55}
+
+/* alternate Ports: */
+/*
+#define IT87_ADRPORT      0x4e
+#define IT87_DATAPORT     0x4f
+#define IT87_INIT         {0x87, 0x01, 0x55, 0xaa}
+ */
+
+/* IT8712/05 Registers */
+#define IT87_CFGCTRL      0x2
+#define IT87_LDN          0x7
+#define IT87_CHIP_ID1     0x20
+#define IT87_CHIP_ID2     0x21
+#define IT87_CFG_VERSION  0x22
+#define IT87_SWSUSPEND    0x23
+
+#define IT8712_CIR_LDN    0xa
+#define IT8705_CIR_LDN    0x7
+
+/* CIR Configuration Registers: */
+#define IT87_CIR_ACT      0x30
+#define IT87_CIR_BASE_MSB 0x60
+#define IT87_CIR_BASE_LSB 0x61
+#define IT87_CIR_IRQ      0x70
+#define IT87_CIR_CONFIG   0xf0
+
+/* List of IT87_CIR registers: offset to BaseAddr */
+#define IT87_CIR_DR   0
+#define IT87_CIR_IER  1
+#define IT87_CIR_RCR  2
+#define IT87_CIR_TCR1 3
+#define IT87_CIR_TCR2 4
+#define IT87_CIR_TSR  5
+#define IT87_CIR_RSR  6
+#define IT87_CIR_BDLR 5
+#define IT87_CIR_BDHR 6
+#define IT87_CIR_IIR  7
+
+/* Bit Definition */
+/* IER: */
+#define IT87_CIR_IER_TM_EN   0x80
+#define IT87_CIR_IER_RESEVED 0x40
+#define IT87_CIR_IER_RESET   0x20
+#define IT87_CIR_IER_BR      0x10
+#define IT87_CIR_IER_IEC     0x8
+#define IT87_CIR_IER_RFOIE   0x4
+#define IT87_CIR_IER_RDAIE   0x2
+#define IT87_CIR_IER_TLDLIE  0x1
+
+/* RCR: */
+#define IT87_CIR_RCR_RDWOS  0x80
+#define IT87_CIR_RCR_HCFS   0x40
+#define IT87_CIR_RCR_RXEN   0x20
+#define IT87_CIR_RCR_RXEND  0x10
+#define IT87_CIR_RCR_RXACT  0x8
+#define IT87_CIR_RCR_RXDCR  0x7
+
+/* TCR1: */
+#define IT87_CIR_TCR1_FIFOCLR 0x80
+#define IT87_CIR_TCR1_ILE     0x40
+#define IT87_CIR_TCR1_FIFOTL  0x30
+#define IT87_CIR_TCR1_TXRLE   0x8
+#define IT87_CIR_TCR1_TXENDF  0x4
+#define IT87_CIR_TCR1_TXMPM   0x3
+
+/* TCR2: */
+#define IT87_CIR_TCR2_CFQ   0xf8
+#define IT87_CIR_TCR2_TXMPW 0x7
+
+/* TSR: */
+#define IT87_CIR_TSR_RESERVED 0xc0
+#define IT87_CIR_TSR_TXFBC    0x3f
+
+/* RSR: */
+#define IT87_CIR_RSR_RXFTO    0x80
+#define IT87_CIR_RSR_RESERVED 0x40
+#define IT87_CIR_RSR_RXFBC    0x3f
+
+/* IIR: */
+#define IT87_CIR_IIR_RESERVED 0xf8
+#define IT87_CIR_IIR_IID      0x6
+#define IT87_CIR_IIR_IIP      0x1
+
+/* TM: */
+#define IT87_CIR_TM_IL_SEL    0x80
+#define IT87_CIR_TM_RESERVED  0x40
+#define IT87_CIR_TM_TM_REG    0x3f
+
+#define IT87_CIR_FIFO_SIZE 32
+
+/* Baudratedivisor for IT87: power of 2: only 1,2,4 or 8) */
+#define IT87_CIR_BAUDRATE_DIVISOR 0x1
+#define IT87_CIR_DEFAULT_IOBASE 0x310
+#define IT87_CIR_DEFAULT_IRQ    0x7
+#define IT87_CIR_SPACE 0x00
+#define IT87_CIR_PULSE 0xff
+#define IT87_CIR_FREQ_MIN 27
+#define IT87_CIR_FREQ_MAX 58
+#define TIME_CONST (IT87_CIR_BAUDRATE_DIVISOR * 8000000ul / 115200ul)
+
+/********************************* ITE IT87xx ************************/
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_it87/lirc_it87.c
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_it87/lirc_it87.c
@@ -0,0 +1,1012 @@
+/*
+ * LIRC driver for ITE IT8712/IT8705/IT8720 CIR port
+ *
+ * Copyright (C) 2001 Hans-Günter Lütke Uphues <hg_lu@web.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
+ * USA
+ *
+ * ITE IT8705, IT8712(not tested) and IT8720 CIR-port support for lirc based
+ * via cut and paste from lirc_sir.c (C) 2000 Milan Pikula
+ *
+ * Attention: Sendmode only tested with debugging logs
+ *
+ * 2001/02/27 Christoph Bartelmus <lirc@bartelmus.de> :
+ *   reimplemented read function
+ * 2005/06/05 Andrew Calkin implemented support for Asus Digimatrix,
+ *   based on work of the following member of the Outertrack Digimatrix
+ *   Forum: Art103 <r_tay@hotmail.com>
+ */
+
+#ifdef HAVE_CONFIG_H
+#include <config.h>
+#endif
+
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/autoconf.h>
+#include <linux/sched.h>
+#include <linux/errno.h>
+#include <linux/signal.h>
+#include <linux/fs.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/kernel.h>
+#include <linux/serial_reg.h>
+#include <linux/time.h>
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/wait.h>
+#include <linux/mm.h>
+#include <linux/delay.h>
+#include <linux/poll.h>
+#include <asm/system.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19)
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/fcntl.h>
+#else
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/fcntl.h>
+#endif
+
+#include <linux/timer.h>
+
+#include "../lirc.h"
+#include "../lirc_dev/lirc_dev.h"
+#include "../kcompat.h"
+
+#include "lirc_it87.h"
+
+#ifdef LIRC_IT87_DIGIMATRIX
+static int digimatrix = 1;
+static int it87_freq = 36; /* kHz */
+static int irq = 9;
+#else
+static int digimatrix;
+static int it87_freq = 38; /* kHz */
+static int irq = IT87_CIR_DEFAULT_IRQ;
+#endif
+
+static unsigned long it87_bits_in_byte_out;
+static unsigned long it87_send_counter;
+static unsigned char it87_RXEN_mask = IT87_CIR_RCR_RXEN;
+
+#define RBUF_LEN 1024
+#define WBUF_LEN 1024
+
+#define LIRC_DRIVER_NAME "lirc_it87"
+
+/* timeout for sequences in jiffies (=5/100s) */
+/* must be longer than TIME_CONST */
+#define IT87_TIMEOUT	(HZ*5/100)
+
+/* module parameters */
+static int debug;
+#define dprintk(fmt, args...)					\
+	do {							\
+		if (debug)					\
+			printk(KERN_DEBUG LIRC_DRIVER_NAME ": "	\
+			       fmt, ## args);			\
+	} while (0)
+
+static int io = IT87_CIR_DEFAULT_IOBASE;
+/* receiver demodulator default: off */
+static int it87_enable_demodulator;
+
+static int timer_enabled;
+static DEFINE_SPINLOCK(timer_lock);
+static struct timer_list timerlist;
+/* time of last signal change detected */
+static struct timeval last_tv = {0, 0};
+/* time of last UART data ready interrupt */
+static struct timeval last_intr_tv = {0, 0};
+static int last_value;
+
+static DECLARE_WAIT_QUEUE_HEAD(lirc_read_queue);
+
+static DEFINE_SPINLOCK(hardware_lock);
+static DEFINE_SPINLOCK(dev_lock);
+
+static lirc_t rx_buf[RBUF_LEN];
+unsigned int rx_tail, rx_head;
+static lirc_t tx_buf[WBUF_LEN];
+
+/* SECTION: Prototypes */
+
+/* Communication with user-space */
+static int lirc_open(struct inode *inode, struct file *file);
+static int lirc_close(struct inode *inode, struct file *file);
+static unsigned int lirc_poll(struct file *file, poll_table *wait);
+static ssize_t lirc_read(struct file *file, char *buf,
+			 size_t count, loff_t *ppos);
+static ssize_t lirc_write(struct file *file, const char *buf,
+			  size_t n, loff_t *pos);
+static int lirc_ioctl(struct inode *node, struct file *filep,
+		      unsigned int cmd, unsigned long arg);
+static void add_read_queue(int flag, unsigned long val);
+static int init_chrdev(void);
+static void drop_chrdev(void);
+	/* Hardware */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19)
+static irqreturn_t it87_interrupt(int irq, void *dev_id,
+				  struct pt_regs *regs);
+#else
+static irqreturn_t it87_interrupt(int irq, void *dev_id);
+#endif
+static void send_space(unsigned long len);
+static void send_pulse(unsigned long len);
+static void init_send(void);
+static void terminate_send(unsigned long len);
+static int init_hardware(void);
+static void drop_hardware(void);
+/* Initialisation */
+static int init_port(void);
+static void drop_port(void);
+
+
+/* SECTION: Communication with user-space */
+
+static int lirc_open(struct inode *inode, struct file *file)
+{
+	spin_lock(&dev_lock);
+	if (MOD_IN_USE) {
+		spin_unlock(&dev_lock);
+		return -EBUSY;
+	}
+	MOD_INC_USE_COUNT;
+	spin_unlock(&dev_lock);
+	return 0;
+}
+
+
+static int lirc_close(struct inode *inode, struct file *file)
+{
+	MOD_DEC_USE_COUNT;
+	return 0;
+}
+
+
+static unsigned int lirc_poll(struct file *file, poll_table *wait)
+{
+	poll_wait(file, &lirc_read_queue, wait);
+	if (rx_head != rx_tail)
+		return POLLIN | POLLRDNORM;
+	return 0;
+}
+
+
+static ssize_t lirc_read(struct file *file, char *buf,
+			 size_t count, loff_t *ppos)
+{
+	int n = 0;
+	int retval = 0;
+
+	while (n < count) {
+		if (file->f_flags & O_NONBLOCK && rx_head == rx_tail) {
+			retval = -EAGAIN;
+			break;
+		}
+		retval = wait_event_interruptible(lirc_read_queue,
+						  rx_head != rx_tail);
+		if (retval)
+			break;
+
+		if (copy_to_user((void *) buf + n, (void *) (rx_buf + rx_head),
+				 sizeof(lirc_t))) {
+			retval = -EFAULT;
+			break;
+		}
+		rx_head = (rx_head + 1) & (RBUF_LEN - 1);
+		n += sizeof(lirc_t);
+	}
+	if (n)
+		return n;
+	return retval;
+}
+
+
+static ssize_t lirc_write(struct file *file, const char *buf,
+			  size_t n, loff_t *pos)
+{
+	int i = 0;
+
+	if (n % sizeof(lirc_t) || (n / sizeof(lirc_t)) > WBUF_LEN)
+		return -EINVAL;
+	if (copy_from_user(tx_buf, buf, n))
+		return -EFAULT;
+	n /= sizeof(lirc_t);
+	init_send();
+	while (1) {
+		if (i >= n)
+			break;
+		if (tx_buf[i])
+			send_pulse(tx_buf[i]);
+		i++;
+		if (i >= n)
+			break;
+		if (tx_buf[i])
+			send_space(tx_buf[i]);
+		i++;
+	}
+	terminate_send(tx_buf[i - 1]);
+	return n;
+}
+
+
+static int lirc_ioctl(struct inode *node, struct file *filep,
+		      unsigned int cmd, unsigned long arg)
+{
+	int retval = 0;
+	unsigned long value = 0;
+	unsigned int ivalue;
+	unsigned long hw_flags;
+
+	if (cmd == LIRC_GET_FEATURES)
+		value = LIRC_CAN_SEND_PULSE |
+			LIRC_CAN_SET_SEND_CARRIER |
+			LIRC_CAN_REC_MODE2;
+	else if (cmd == LIRC_GET_SEND_MODE)
+		value = LIRC_MODE_PULSE;
+	else if (cmd == LIRC_GET_REC_MODE)
+		value = LIRC_MODE_MODE2;
+
+	switch (cmd) {
+	case LIRC_GET_FEATURES:
+	case LIRC_GET_SEND_MODE:
+	case LIRC_GET_REC_MODE:
+		retval = put_user(value, (unsigned long *) arg);
+		break;
+
+	case LIRC_SET_SEND_MODE:
+	case LIRC_SET_REC_MODE:
+		retval = get_user(value, (unsigned long *) arg);
+		break;
+
+	case LIRC_SET_SEND_CARRIER:
+		retval = get_user(ivalue, (unsigned int *) arg);
+		if (retval)
+			return retval;
+		ivalue /= 1000;
+		if (ivalue > IT87_CIR_FREQ_MAX ||
+		    ivalue < IT87_CIR_FREQ_MIN)
+			return -EINVAL;
+
+		it87_freq = ivalue;
+
+		spin_lock_irqsave(&hardware_lock, hw_flags);
+		outb(((inb(io + IT87_CIR_TCR2) & IT87_CIR_TCR2_TXMPW) |
+		      (it87_freq - IT87_CIR_FREQ_MIN) << 3),
+		      io + IT87_CIR_TCR2);
+		spin_unlock_irqrestore(&hardware_lock, hw_flags);
+		dprintk("demodulation frequency: %d kHz\n", it87_freq);
+
+		break;
+
+	default:
+		retval = -EINVAL;
+	}
+
+	if (retval)
+		return retval;
+
+	if (cmd == LIRC_SET_REC_MODE) {
+		if (value != LIRC_MODE_MODE2)
+			retval = -ENOSYS;
+	} else if (cmd == LIRC_SET_SEND_MODE) {
+		if (value != LIRC_MODE_PULSE)
+			retval = -ENOSYS;
+	}
+	return retval;
+}
+
+static void add_read_queue(int flag, unsigned long val)
+{
+	unsigned int new_rx_tail;
+	lirc_t newval;
+
+	dprintk("add flag %d with val %lu\n", flag, val);
+
+	newval = val & PULSE_MASK;
+
+	/*
+	 * statistically, pulses are ~TIME_CONST/2 too long. we could
+	 * maybe make this more exact, but this is good enough
+	 */
+	if (flag) {
+		/* pulse */
+		if (newval > TIME_CONST / 2)
+			newval -= TIME_CONST / 2;
+		else /* should not ever happen */
+			newval = 1;
+		newval |= PULSE_BIT;
+	} else
+		newval += TIME_CONST / 2;
+	new_rx_tail = (rx_tail + 1) & (RBUF_LEN - 1);
+	if (new_rx_tail == rx_head) {
+		dprintk("Buffer overrun.\n");
+		return;
+	}
+	rx_buf[rx_tail] = newval;
+	rx_tail = new_rx_tail;
+	wake_up_interruptible(&lirc_read_queue);
+}
+
+
+static struct file_operations lirc_fops = {
+	.owner		= THIS_MODULE,
+	.read		= lirc_read,
+	.write		= lirc_write,
+	.poll		= lirc_poll,
+	.ioctl		= lirc_ioctl,
+	.open		= lirc_open,
+	.release	= lirc_close,
+};
+
+static int set_use_inc(void *data)
+{
+       return 0;
+}
+
+static void set_use_dec(void *data)
+{
+}
+
+static struct lirc_driver driver = {
+       .name		= LIRC_DRIVER_NAME,
+       .minor		= -1,
+       .code_length	= 1,
+       .sample_rate	= 0,
+       .data		= NULL,
+       .add_to_buf	= NULL,
+#ifndef LIRC_REMOVE_DURING_EXPORT
+       .get_queue	= NULL,
+#endif
+       .set_use_inc	= set_use_inc,
+       .set_use_dec	= set_use_dec,
+       .fops		= &lirc_fops,
+       .dev		= NULL,
+       .owner		= THIS_MODULE,
+};
+
+
+static int init_chrdev(void)
+{
+	driver.minor = lirc_register_driver(&driver);
+
+	if (driver.minor < 0) {
+		printk(KERN_ERR LIRC_DRIVER_NAME ": init_chrdev() failed.\n");
+		return -EIO;
+	}
+	return 0;
+}
+
+
+static void drop_chrdev(void)
+{
+	lirc_unregister_driver(driver.minor);
+}
+
+
+/* SECTION: Hardware */
+static long delta(struct timeval *tv1, struct timeval *tv2)
+{
+	unsigned long deltv;
+
+	deltv = tv2->tv_sec - tv1->tv_sec;
+	if (deltv > 15)
+		deltv = 0xFFFFFF;
+	else
+		deltv = deltv*1000000 + tv2->tv_usec - tv1->tv_usec;
+	return deltv;
+}
+
+static void it87_timeout(unsigned long data)
+{
+	unsigned long flags;
+
+	/* avoid interference with interrupt */
+	spin_lock_irqsave(&timer_lock, flags);
+
+	if (digimatrix) {
+		/* We have timed out. Disable the RX mechanism. */
+
+		outb((inb(io + IT87_CIR_RCR) & ~IT87_CIR_RCR_RXEN) |
+		     IT87_CIR_RCR_RXACT, io + IT87_CIR_RCR);
+		if (it87_RXEN_mask)
+			outb(inb(io + IT87_CIR_RCR) | IT87_CIR_RCR_RXEN,
+			     io + IT87_CIR_RCR);
+		dprintk(" TIMEOUT\n");
+		timer_enabled = 0;
+
+		/* fifo clear */
+		outb(inb(io + IT87_CIR_TCR1) | IT87_CIR_TCR1_FIFOCLR,
+		     io+IT87_CIR_TCR1);
+
+	} else {
+		/*
+		 * if last received signal was a pulse, but receiving stopped
+		 * within the 9 bit frame, we need to finish this pulse and
+		 * simulate a signal change to from pulse to space. Otherwise
+		 * upper layers will receive two sequences next time.
+		 */
+
+		if (last_value) {
+			unsigned long pulse_end;
+
+			/* determine 'virtual' pulse end: */
+			pulse_end = delta(&last_tv, &last_intr_tv);
+			dprintk("timeout add %d for %lu usec\n",
+				last_value, pulse_end);
+			add_read_queue(last_value, pulse_end);
+			last_value = 0;
+			last_tv = last_intr_tv;
+		}
+	}
+	spin_unlock_irqrestore(&timer_lock, flags);
+}
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19)
+static irqreturn_t it87_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+#else
+static irqreturn_t it87_interrupt(int irq, void *dev_id)
+#endif
+{
+	unsigned char data;
+	struct timeval curr_tv;
+	static unsigned long deltv;
+	unsigned long deltintrtv;
+	unsigned long flags, hw_flags;
+	int iir, lsr;
+	int fifo = 0;
+	static char lastbit;
+	char bit;
+
+	/* Bit duration in microseconds */
+	const unsigned long bit_duration = 1000000ul /
+		(115200 / IT87_CIR_BAUDRATE_DIVISOR);
+
+
+	iir = inb(io + IT87_CIR_IIR);
+
+	switch (iir & IT87_CIR_IIR_IID) {
+	case 0x4:
+	case 0x6:
+		lsr = inb(io + IT87_CIR_RSR) & (IT87_CIR_RSR_RXFTO |
+						IT87_CIR_RSR_RXFBC);
+		fifo = lsr & IT87_CIR_RSR_RXFBC;
+		dprintk("iir: 0x%x fifo: 0x%x\n", iir, lsr);
+
+		/* avoid interference with timer */
+		spin_lock_irqsave(&timer_lock, flags);
+		spin_lock_irqsave(&hardware_lock, hw_flags);
+		if (digimatrix) {
+			static unsigned long acc_pulse;
+			static unsigned long acc_space;
+
+			do {
+				data = inb(io + IT87_CIR_DR);
+				data = ~data;
+				fifo--;
+				if (data != 0x00) {
+					if (timer_enabled)
+						del_timer(&timerlist);
+					/*
+					 * start timer for end of
+					 * sequence detection
+					 */
+					timerlist.expires = jiffies +
+							    IT87_TIMEOUT;
+					add_timer(&timerlist);
+					timer_enabled = 1;
+				}
+				/* Loop through */
+				for (bit = 0; bit < 8; ++bit) {
+					if ((data >> bit) & 1) {
+						++acc_pulse;
+						if (lastbit == 0) {
+							add_read_queue(0,
+								acc_space *
+								 bit_duration);
+							acc_space = 0;
+						}
+					} else {
+						++acc_space;
+						if (lastbit == 1) {
+							add_read_queue(1,
+								acc_pulse *
+								 bit_duration);
+							acc_pulse = 0;
+						}
+					}
+					lastbit = (data >> bit) & 1;
+				}
+
+			} while (fifo != 0);
+		} else { /* Normal Operation */
+			do {
+				del_timer(&timerlist);
+				data = inb(io + IT87_CIR_DR);
+
+				dprintk("data=%.2x\n", data);
+				do_gettimeofday(&curr_tv);
+				deltv = delta(&last_tv, &curr_tv);
+				deltintrtv = delta(&last_intr_tv, &curr_tv);
+
+				dprintk("t %lu , d %d\n",
+					deltintrtv, (int)data);
+
+				/*
+				 * if nothing came in last 2 cycles,
+				 * it was gap
+				 */
+				if (deltintrtv > TIME_CONST * 2) {
+					if (last_value) {
+						dprintk("GAP\n");
+
+						/* simulate signal change */
+						add_read_queue(last_value,
+							       deltv -
+							       deltintrtv);
+						last_value = 0;
+						last_tv.tv_sec =
+							last_intr_tv.tv_sec;
+						last_tv.tv_usec =
+							last_intr_tv.tv_usec;
+						deltv = deltintrtv;
+					}
+				}
+				data = 1;
+				if (data ^ last_value) {
+					/*
+					 * deltintrtv > 2*TIME_CONST,
+					 * remember ? the other case is
+					 * timeout
+					 */
+					add_read_queue(last_value,
+						       deltv-TIME_CONST);
+					last_value = data;
+					last_tv = curr_tv;
+					if (last_tv.tv_usec >= TIME_CONST)
+						last_tv.tv_usec -= TIME_CONST;
+					else {
+						last_tv.tv_sec--;
+						last_tv.tv_usec += 1000000 -
+							TIME_CONST;
+					}
+				}
+				last_intr_tv = curr_tv;
+				if (data) {
+					/*
+					 * start timer for end of
+					 * sequence detection
+					 */
+					timerlist.expires =
+						jiffies + IT87_TIMEOUT;
+					add_timer(&timerlist);
+				}
+				outb((inb(io + IT87_CIR_RCR) &
+				     ~IT87_CIR_RCR_RXEN) |
+				     IT87_CIR_RCR_RXACT,
+				     io + IT87_CIR_RCR);
+				if (it87_RXEN_mask)
+					outb(inb(io + IT87_CIR_RCR) |
+					     IT87_CIR_RCR_RXEN,
+					     io + IT87_CIR_RCR);
+				fifo--;
+			} while (fifo != 0);
+		}
+		spin_unlock_irqrestore(&hardware_lock, hw_flags);
+		spin_unlock_irqrestore(&timer_lock, flags);
+
+		return IRQ_RETVAL(IRQ_HANDLED);
+
+	default:
+		/* not our irq */
+		dprintk("unknown IRQ (shouldn't happen) !!\n");
+		return IRQ_RETVAL(IRQ_NONE);
+	}
+}
+
+
+static void send_it87(unsigned long len, unsigned long stime,
+		      unsigned char send_byte, unsigned int count_bits)
+{
+	long count = len / stime;
+	long time_left = 0;
+	static unsigned char byte_out;
+	unsigned long hw_flags;
+
+	dprintk("%s: len=%ld, sb=%d\n", __func__, len, send_byte);
+
+	time_left = (long)len - (long)count * (long)stime;
+	count += ((2 * time_left) / stime);
+	while (count) {
+		long i = 0;
+		for (i = 0; i < count_bits; i++) {
+			byte_out = (byte_out << 1) | (send_byte & 1);
+			it87_bits_in_byte_out++;
+		}
+		if (it87_bits_in_byte_out == 8) {
+			dprintk("out=0x%x, tsr_txfbc: 0x%x\n",
+				byte_out,
+				inb(io + IT87_CIR_TSR) &
+				IT87_CIR_TSR_TXFBC);
+
+			while ((inb(io + IT87_CIR_TSR) &
+				IT87_CIR_TSR_TXFBC) >= IT87_CIR_FIFO_SIZE)
+				;
+
+			spin_lock_irqsave(&hardware_lock, hw_flags);
+			outb(byte_out, io + IT87_CIR_DR);
+			spin_unlock_irqrestore(&hardware_lock, hw_flags);
+
+			it87_bits_in_byte_out = 0;
+			it87_send_counter++;
+			byte_out = 0;
+		}
+		count--;
+	}
+}
+
+
+/*TODO: maybe exchange space and pulse because it8705 only modulates 0-bits */
+
+static void send_space(unsigned long len)
+{
+	send_it87(len, TIME_CONST, IT87_CIR_SPACE, IT87_CIR_BAUDRATE_DIVISOR);
+}
+
+static void send_pulse(unsigned long len)
+{
+	send_it87(len, TIME_CONST, IT87_CIR_PULSE, IT87_CIR_BAUDRATE_DIVISOR);
+}
+
+
+static void init_send()
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&hardware_lock, flags);
+	/* RXEN=0: receiver disable */
+	it87_RXEN_mask = 0;
+	outb(inb(io + IT87_CIR_RCR) & ~IT87_CIR_RCR_RXEN,
+	     io + IT87_CIR_RCR);
+	spin_unlock_irqrestore(&hardware_lock, flags);
+	it87_bits_in_byte_out = 0;
+	it87_send_counter = 0;
+}
+
+
+static void terminate_send(unsigned long len)
+{
+	unsigned long flags;
+	unsigned long last = 0;
+
+	last = it87_send_counter;
+	/* make sure all necessary data has been sent */
+	while (last == it87_send_counter)
+		send_space(len);
+	/* wait until all data sent */
+	while ((inb(io + IT87_CIR_TSR) & IT87_CIR_TSR_TXFBC) != 0)
+		;
+	/* then re-enable receiver */
+	spin_lock_irqsave(&hardware_lock, flags);
+	it87_RXEN_mask = IT87_CIR_RCR_RXEN;
+	outb(inb(io + IT87_CIR_RCR) | IT87_CIR_RCR_RXEN,
+	     io + IT87_CIR_RCR);
+	spin_unlock_irqrestore(&hardware_lock, flags);
+}
+
+
+static int init_hardware(void)
+{
+	unsigned long flags;
+	unsigned char it87_rcr = 0;
+
+	spin_lock_irqsave(&hardware_lock, flags);
+	/* init cir-port */
+	/* enable r/w-access to Baudrate-Register */
+	outb(IT87_CIR_IER_BR, io + IT87_CIR_IER);
+	outb(IT87_CIR_BAUDRATE_DIVISOR % 0x100, io+IT87_CIR_BDLR);
+	outb(IT87_CIR_BAUDRATE_DIVISOR / 0x100, io+IT87_CIR_BDHR);
+	/* Baudrate Register off, define IRQs: Input only */
+	if (digimatrix) {
+		outb(IT87_CIR_IER_IEC | IT87_CIR_IER_RFOIE, io + IT87_CIR_IER);
+		/* RX: HCFS=0, RXDCR = 001b (33,75..38,25 kHz), RXEN=1 */
+	} else {
+		outb(IT87_CIR_IER_IEC | IT87_CIR_IER_RDAIE, io + IT87_CIR_IER);
+		/* RX: HCFS=0, RXDCR = 001b (35,6..40,3 kHz), RXEN=1 */
+	}
+	it87_rcr = (IT87_CIR_RCR_RXEN & it87_RXEN_mask) | 0x1;
+	if (it87_enable_demodulator)
+		it87_rcr |= IT87_CIR_RCR_RXEND;
+	outb(it87_rcr, io + IT87_CIR_RCR);
+	if (digimatrix) {
+		/* Set FIFO depth to 1 byte, and disable TX */
+		outb(inb(io + IT87_CIR_TCR1) |  0x00,
+		     io + IT87_CIR_TCR1);
+
+		/*
+		 * TX: it87_freq (36kHz), 'reserved' sensitivity
+		 * setting (0x00)
+		 */
+		outb(((it87_freq - IT87_CIR_FREQ_MIN) << 3) | 0x00,
+		     io + IT87_CIR_TCR2);
+	} else {
+		/* TX: 38kHz, 13,3us (pulse-width) */
+		outb(((it87_freq - IT87_CIR_FREQ_MIN) << 3) | 0x06,
+		     io + IT87_CIR_TCR2);
+	}
+	spin_unlock_irqrestore(&hardware_lock, flags);
+	return 0;
+}
+
+
+static void drop_hardware(void)
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&hardware_lock, flags);
+	disable_irq(irq);
+	/* receiver disable */
+	it87_RXEN_mask = 0;
+	outb(0x1, io + IT87_CIR_RCR);
+	/* turn off irqs */
+	outb(0, io + IT87_CIR_IER);
+	/* fifo clear */
+	outb(IT87_CIR_TCR1_FIFOCLR, io+IT87_CIR_TCR1);
+	/* reset */
+	outb(IT87_CIR_IER_RESET, io+IT87_CIR_IER);
+	enable_irq(irq);
+	spin_unlock_irqrestore(&hardware_lock, flags);
+}
+
+
+static unsigned char it87_read(unsigned char port)
+{
+	outb(port, IT87_ADRPORT);
+	return inb(IT87_DATAPORT);
+}
+
+
+static void it87_write(unsigned char port, unsigned char data)
+{
+	outb(port, IT87_ADRPORT);
+	outb(data, IT87_DATAPORT);
+}
+
+
+/* SECTION: Initialisation */
+
+static int init_port(void)
+{
+	unsigned long hw_flags;
+	int retval = 0;
+
+	unsigned char init_bytes[4] = IT87_INIT;
+	unsigned char it87_chipid = 0;
+	unsigned char ldn = 0;
+	unsigned int  it87_io = 0;
+	unsigned int  it87_irq = 0;
+
+	/* Enter MB PnP Mode */
+	outb(init_bytes[0], IT87_ADRPORT);
+	outb(init_bytes[1], IT87_ADRPORT);
+	outb(init_bytes[2], IT87_ADRPORT);
+	outb(init_bytes[3], IT87_ADRPORT);
+
+	/* 8712 or 8705 ? */
+	it87_chipid = it87_read(IT87_CHIP_ID1);
+	if (it87_chipid != 0x87) {
+		retval = -ENXIO;
+		return retval;
+	}
+	it87_chipid = it87_read(IT87_CHIP_ID2);
+	if ((it87_chipid != 0x12) &&
+		(it87_chipid != 0x05) &&
+		(it87_chipid != 0x20)) {
+		printk(KERN_INFO LIRC_DRIVER_NAME
+		       ": no IT8705/12/20 found, exiting..\n");
+		retval = -ENXIO;
+		return retval;
+	}
+	printk(KERN_INFO LIRC_DRIVER_NAME
+	       ": found IT87%.2x.\n",
+	       it87_chipid);
+
+	/* get I/O-Port and IRQ */
+	if (it87_chipid == 0x12)
+		ldn = IT8712_CIR_LDN;
+	else
+		ldn = IT8705_CIR_LDN;
+	it87_write(IT87_LDN, ldn);
+
+	it87_io = it87_read(IT87_CIR_BASE_MSB) * 256 +
+		  it87_read(IT87_CIR_BASE_LSB);
+	if (it87_io == 0) {
+		if (io == 0)
+			io = IT87_CIR_DEFAULT_IOBASE;
+		printk(KERN_INFO LIRC_DRIVER_NAME
+		       ": set default io 0x%x\n",
+		       io);
+		it87_write(IT87_CIR_BASE_MSB, io / 0x100);
+		it87_write(IT87_CIR_BASE_LSB, io % 0x100);
+	} else
+		io = it87_io;
+
+	it87_irq = it87_read(IT87_CIR_IRQ);
+	if (digimatrix || it87_irq == 0) {
+		if (irq == 0)
+			irq = IT87_CIR_DEFAULT_IRQ;
+		printk(KERN_INFO LIRC_DRIVER_NAME
+		       ": set default irq 0x%x\n",
+		       irq);
+		it87_write(IT87_CIR_IRQ, irq);
+	} else
+		irq = it87_irq;
+
+	spin_lock_irqsave(&hardware_lock, hw_flags);
+	/* reset */
+	outb(IT87_CIR_IER_RESET, io+IT87_CIR_IER);
+	/* fifo clear */
+	outb(IT87_CIR_TCR1_FIFOCLR |
+	     /*	     IT87_CIR_TCR1_ILE | */
+	     IT87_CIR_TCR1_TXRLE |
+	     IT87_CIR_TCR1_TXENDF, io+IT87_CIR_TCR1);
+	spin_unlock_irqrestore(&hardware_lock, hw_flags);
+
+	/* get I/O port access and IRQ line */
+	if (request_region(io, 8, LIRC_DRIVER_NAME) == NULL) {
+		printk(KERN_ERR LIRC_DRIVER_NAME
+		       ": i/o port 0x%.4x already in use.\n", io);
+		/* Leaving MB PnP Mode */
+		it87_write(IT87_CFGCTRL, 0x2);
+		return -EBUSY;
+	}
+
+	/* activate CIR-Device */
+	it87_write(IT87_CIR_ACT, 0x1);
+
+	/* Leaving MB PnP Mode */
+	it87_write(IT87_CFGCTRL, 0x2);
+
+	retval = request_irq(irq, it87_interrupt, 0 /*IRQF_DISABLED*/,
+			     LIRC_DRIVER_NAME, NULL);
+	if (retval < 0) {
+		printk(KERN_ERR LIRC_DRIVER_NAME
+		       ": IRQ %d already in use.\n",
+		       irq);
+		release_region(io, 8);
+		return retval;
+	}
+
+	printk(KERN_INFO LIRC_DRIVER_NAME
+	       ": I/O port 0x%.4x, IRQ %d.\n", io, irq);
+
+	init_timer(&timerlist);
+	timerlist.function = it87_timeout;
+	timerlist.data = 0xabadcafe;
+
+	return 0;
+}
+
+
+static void drop_port(void)
+{
+#if 0
+	unsigned char init_bytes[4] = IT87_INIT;
+
+	/* Enter MB PnP Mode */
+	outb(init_bytes[0], IT87_ADRPORT);
+	outb(init_bytes[1], IT87_ADRPORT);
+	outb(init_bytes[2], IT87_ADRPORT);
+	outb(init_bytes[3], IT87_ADRPORT);
+
+	/* deactivate CIR-Device */
+	it87_write(IT87_CIR_ACT, 0x0);
+
+	/* Leaving MB PnP Mode */
+	it87_write(IT87_CFGCTRL, 0x2);
+#endif
+
+	del_timer_sync(&timerlist);
+	free_irq(irq, NULL);
+	release_region(io, 8);
+}
+
+
+static int init_lirc_it87(void)
+{
+	int retval;
+
+	init_waitqueue_head(&lirc_read_queue);
+	retval = init_port();
+	if (retval < 0)
+		return retval;
+	init_hardware();
+	printk(KERN_INFO LIRC_DRIVER_NAME ": Installed.\n");
+	return 0;
+}
+
+
+static int __init lirc_it87_init(void)
+{
+	int retval;
+
+	retval = init_chrdev();
+	if (retval < 0)
+		return retval;
+	retval = init_lirc_it87();
+	if (retval) {
+		drop_chrdev();
+		return retval;
+	}
+	return 0;
+}
+
+
+static void __exit lirc_it87_exit(void)
+{
+	drop_hardware();
+	drop_chrdev();
+	drop_port();
+	printk(KERN_INFO LIRC_DRIVER_NAME ": Uninstalled.\n");
+}
+
+module_init(lirc_it87_init);
+module_exit(lirc_it87_exit);
+
+MODULE_DESCRIPTION("LIRC driver for ITE IT8712/IT8705 CIR port");
+MODULE_AUTHOR("Hans-Günter Lütke Uphues");
+MODULE_LICENSE("GPL");
+
+module_param(io, int, S_IRUGO);
+MODULE_PARM_DESC(io, "I/O base address (default: 0x310)");
+
+module_param(irq, int, S_IRUGO);
+#ifdef LIRC_IT87_DIGIMATRIX
+MODULE_PARM_DESC(irq, "Interrupt (1,3-12) (default: 9)");
+#else
+MODULE_PARM_DESC(irq, "Interrupt (1,3-12) (default: 7)");
+#endif
+
+module_param(it87_enable_demodulator, bool, S_IRUGO);
+MODULE_PARM_DESC(it87_enable_demodulator,
+		 "Receiver demodulator enable/disable (1/0), default: 0");
+
+module_param(debug, bool, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(debug, "Enable debugging messages");
+
+module_param(digimatrix, bool, S_IRUGO | S_IWUSR);
+#ifdef LIRC_IT87_DIGIMATRIX
+MODULE_PARM_DESC(digimatrix,
+	"Asus Digimatrix it87 compat. enable/disable (1/0), default: 1");
+#else
+MODULE_PARM_DESC(digimatrix,
+	"Asus Digimatrix it87 compat. enable/disable (1/0), default: 0");
+#endif
+
+
+module_param(it87_freq, int, S_IRUGO);
+#ifdef LIRC_IT87_DIGIMATRIX
+MODULE_PARM_DESC(it87_freq,
+    "Carrier demodulator frequency (kHz), (default: 36)");
+#else
+MODULE_PARM_DESC(it87_freq,
+    "Carrier demodulator frequency (kHz), (default: 38)");
+#endif
+EXPORT_NO_SYMBOLS;
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_it87/README
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_it87/README
@@ -0,0 +1,46 @@
+This is the README using the ITE IT8705 and IT8712 CIR port for LIRC.
+
+The IT8705 for example can be found on the ECS K7S5A.
+
+The driver supports receiving (MODE2) and sending (PULSE). It seems
+sending 'LIRC_CAN_SEND_PULSE' isn't optimal for this type of hardware.
+But because I don't know how to implement 'LIRC_CAN_SEND_CODE', I did
+it this way.
+
+Attention:
+Because of missing hardware, the following hasn't been tested:
+a) receiving with demodulator enabled,
+b) sending (debugging output looks good) and
+c) using IT8712
+
+Any help and/or additions etc. is welcome.
+
+lirc_it87 knows about the following module-parameters:
+MODULE_DESCRIPTION("LIRC driver for ITE IT8712/IT8705 CIR port");
+MODULE_PARM(io, "i");
+MODULE_PARM_DESC(io, "I/O base address (default: 0x310)");
+MODULE_PARM(irq, "i");
+MODULE_PARM_DESC(irq, "Interrupt (1,3-12) (default: 7)");
+MODULE_PARM(it87_enable_demodulator, "i");
+MODULE_PARM_DESC(it87_enable_demodulator, "Receiver demodulator
+	enable/disable (1/0), default: 0");
+
+
+Usage:
+
+a) io and irq:
+
+If the driver finds the IT8705/12-CIR port initialized, io and irq of
+the preinitialized hardware is used by the driver. If both values are
+read 0x0 from the hardware, the default or given value is used.
+Note: I experienced using irq=3. The driver initialized without any
+problems, but no irqs are recognized by the system. I had to switch
+back to default, irq 7.
+      
+b) it87_enable_demodulator:
+
+The demodulator for the receiver can be switched off (default within
+the driver). If you need the demodulator simple enable it by the
+following way: it87_enable_demodulator=1.
+
+Hans-Günter Lütke Uphues
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_it87/TODO
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_it87/TODO
@@ -0,0 +1,5 @@
+This is my todo-list for lirc_it87:
+
+1. enabling/using shared IRQ
+2. init/drop IRQ-usage in lirc_open/lirc_close
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_ite8709/lirc_ite8709.c
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_ite8709/lirc_ite8709.c
@@ -0,0 +1,552 @@
+/*
+ * LIRC driver for ITE8709 CIR port
+ *
+ * Copyright (C) 2008 Grégory Lardière <spmf2004-lirc@yahoo.fr>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
+ * USA
+ */
+
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/pnp.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19)
+#include <asm/io.h>
+#else
+#include <linux/io.h>
+#endif
+
+#include "../lirc.h"
+#include "../lirc_dev/lirc_dev.h"
+#include "../kcompat.h"
+
+#define LIRC_DRIVER_NAME "lirc_ite8709"
+
+#define BUF_CHUNK_SIZE	sizeof(lirc_t)
+#define BUF_SIZE	(128*BUF_CHUNK_SIZE)
+
+/*
+ * The ITE8709 device seems to be the combination of IT8512 superIO chip and
+ * a specific firmware running on the IT8512's embedded micro-controller.
+ * In addition of the embedded micro-controller, the IT8512 chip contains a
+ * CIR module and several other modules. A few modules are directly accessible
+ * by the host CPU, but most of them are only accessible by the
+ * micro-controller. The CIR module is only accessible by the micro-controller.
+ * The battery-backed SRAM module is accessible by the host CPU and the
+ * micro-controller. So one of the MC's firmware role is to act as a bridge
+ * between the host CPU and the CIR module. The firmware implements a kind of
+ * communication protocol using the SRAM module as a shared memory. The IT8512
+ * specification is publicly available on ITE's web site, but the communication
+ * protocol is not, so it was reverse-engineered.
+ */
+
+/* ITE8709 Registers addresses and values (reverse-engineered) */
+#define ITE8709_MODE		0x1a
+#define ITE8709_REG_ADR		0x1b
+#define ITE8709_REG_VAL		0x1c
+#define ITE8709_IIR		0x1e  /* Interrupt identification register */
+#define ITE8709_RFSR		0x1f  /* Receiver FIFO status register */
+#define ITE8709_FIFO_START	0x20
+
+#define ITE8709_MODE_READY	0X00
+#define ITE8709_MODE_WRITE	0X01
+#define ITE8709_MODE_READ	0X02
+#define ITE8709_IIR_RDAI	0x02  /* Receiver data available interrupt */
+#define ITE8709_IIR_RFOI	0x04  /* Receiver FIFO overrun interrupt */
+#define ITE8709_RFSR_MASK	0x3f  /* FIFO byte count mask */
+
+/*
+ * IT8512 CIR-module registers addresses and values
+ * (from IT8512 E/F specification v0.4.1)
+ */
+#define IT8512_REG_MSTCR	0x01  /* Master control register */
+#define IT8512_REG_IER		0x02  /* Interrupt enable register */
+#define IT8512_REG_CFR		0x04  /* Carrier frequency register */
+#define IT8512_REG_RCR		0x05  /* Receive control register */
+#define IT8512_REG_BDLR		0x08  /* Baud rate divisor low byte register */
+#define IT8512_REG_BDHR		0x09  /* Baud rate divisor high byte register */
+
+#define IT8512_MSTCR_RESET	0x01  /* Reset registers to default value */
+#define IT8512_MSTCR_FIFOCLR	0x02  /* Clear FIFO */
+#define IT8512_MSTCR_FIFOTL_7	0x04  /* FIFO threshold level : 7 */
+#define IT8512_MSTCR_FIFOTL_25	0x0c  /* FIFO threshold level : 25 */
+#define IT8512_IER_RDAIE	0x02  /* Enable data interrupt request */
+#define IT8512_IER_RFOIE	0x04  /* Enable FIFO overrun interrupt req */
+#define IT8512_IER_IEC		0x80  /* Enable interrupt request */
+#define IT8512_CFR_CF_36KHZ	0x09  /* Carrier freq : low speed, 36kHz */
+#define IT8512_RCR_RXDCR_1	0x01  /* Demodulation carrier range : 1 */
+#define IT8512_RCR_RXACT	0x08  /* Receiver active */
+#define IT8512_RCR_RXEN		0x80  /* Receiver enable */
+#define IT8512_BDR_6		6     /* Baud rate divisor : 6 */
+
+/* Actual values used by this driver */
+#define CFG_FIFOTL	IT8512_MSTCR_FIFOTL_25
+#define CFG_CR_FREQ	IT8512_CFR_CF_36KHZ
+#define CFG_DCR		IT8512_RCR_RXDCR_1
+#define CFG_BDR		IT8512_BDR_6
+#define CFG_TIMEOUT	100000 /* Rearm interrupt when a space is > 100 ms */
+
+static int debug;
+
+struct ite8709_device {
+	int use_count;
+	int io;
+	int irq;
+	spinlock_t hardware_lock;
+	unsigned long long acc_pulse;
+	unsigned long long acc_space;
+	char lastbit;
+	struct timeval last_tv;
+	struct lirc_driver driver;
+	struct lirc_buffer buffer;
+	struct tasklet_struct tasklet;
+	char force_rearm;
+	char rearmed;
+	char device_busy;
+};
+
+#define dprintk(fmt, args...)					\
+	do {							\
+		if (debug)					\
+			printk(KERN_DEBUG LIRC_DRIVER_NAME ": "	\
+				fmt, ## args);			\
+	} while (0)
+
+
+static unsigned char ite8709_read(struct ite8709_device *dev,
+					unsigned char port)
+{
+	outb(port, dev->io);
+	return inb(dev->io+1);
+}
+
+static void ite8709_write(struct ite8709_device *dev, unsigned char port,
+				unsigned char data)
+{
+	outb(port, dev->io);
+	outb(data, dev->io+1);
+}
+
+static void ite8709_wait_device(struct ite8709_device *dev)
+{
+	int i = 0;
+	/*
+	 * loop until device tells it's ready to continue
+	 * iterations count is usually ~750 but can sometimes achieve 13000
+	 */
+	for (i = 0; i < 15000; i++) {
+		udelay(2);
+		if (ite8709_read(dev, ITE8709_MODE) == ITE8709_MODE_READY)
+			break;
+	}
+}
+
+static void ite8709_write_register(struct ite8709_device *dev,
+				unsigned char reg_adr, unsigned char reg_value)
+{
+	ite8709_wait_device(dev);
+
+	ite8709_write(dev, ITE8709_REG_VAL, reg_value);
+	ite8709_write(dev, ITE8709_REG_ADR, reg_adr);
+	ite8709_write(dev, ITE8709_MODE, ITE8709_MODE_WRITE);
+}
+
+static void ite8709_init_hardware(struct ite8709_device *dev)
+{
+	spin_lock_irq(&dev->hardware_lock);
+	dev->device_busy = 1;
+	spin_unlock_irq(&dev->hardware_lock);
+
+	ite8709_write_register(dev, IT8512_REG_BDHR, (CFG_BDR >> 8) & 0xff);
+	ite8709_write_register(dev, IT8512_REG_BDLR, CFG_BDR & 0xff);
+	ite8709_write_register(dev, IT8512_REG_CFR, CFG_CR_FREQ);
+	ite8709_write_register(dev, IT8512_REG_IER,
+			IT8512_IER_IEC | IT8512_IER_RFOIE | IT8512_IER_RDAIE);
+	ite8709_write_register(dev, IT8512_REG_RCR, CFG_DCR);
+	ite8709_write_register(dev, IT8512_REG_MSTCR,
+					CFG_FIFOTL | IT8512_MSTCR_FIFOCLR);
+	ite8709_write_register(dev, IT8512_REG_RCR,
+				IT8512_RCR_RXEN | IT8512_RCR_RXACT | CFG_DCR);
+
+	spin_lock_irq(&dev->hardware_lock);
+	dev->device_busy = 0;
+	spin_unlock_irq(&dev->hardware_lock);
+
+	tasklet_enable(&dev->tasklet);
+}
+
+static void ite8709_drop_hardware(struct ite8709_device *dev)
+{
+	tasklet_disable(&dev->tasklet);
+
+	spin_lock_irq(&dev->hardware_lock);
+	dev->device_busy = 1;
+	spin_unlock_irq(&dev->hardware_lock);
+
+	ite8709_write_register(dev, IT8512_REG_RCR, 0);
+	ite8709_write_register(dev, IT8512_REG_MSTCR,
+				IT8512_MSTCR_RESET | IT8512_MSTCR_FIFOCLR);
+
+	spin_lock_irq(&dev->hardware_lock);
+	dev->device_busy = 0;
+	spin_unlock_irq(&dev->hardware_lock);
+}
+
+static int ite8709_set_use_inc(void *data)
+{
+	struct ite8709_device *dev;
+	MOD_INC_USE_COUNT;
+	dev = data;
+	if (dev->use_count == 0)
+		ite8709_init_hardware(dev);
+	dev->use_count++;
+	return 0;
+}
+
+static void ite8709_set_use_dec(void *data)
+{
+	struct ite8709_device *dev;
+	MOD_DEC_USE_COUNT;
+	dev = data;
+	dev->use_count--;
+	if (dev->use_count == 0)
+		ite8709_drop_hardware(dev);
+}
+
+static void ite8709_add_read_queue(struct ite8709_device *dev, int flag,
+					unsigned long long val)
+{
+	lirc_t value;
+
+	dprintk("add a %llu usec %s\n", val, flag ? "pulse" : "space");
+
+	value = (val > PULSE_MASK) ? PULSE_MASK : val;
+	if (flag)
+		value |= PULSE_BIT;
+
+	if (!lirc_buffer_full(&dev->buffer)) {
+		lirc_buffer_write(&dev->buffer, (void *) &value);
+		wake_up(&dev->buffer.wait_poll);
+	}
+}
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19)
+static irqreturn_t ite8709_interrupt(int irq, void *dev_id,
+					struct pt_regs *regs)
+#else
+static irqreturn_t ite8709_interrupt(int irq, void *dev_id)
+#endif
+{
+	unsigned char data;
+	int iir, rfsr, i;
+	int fifo = 0;
+	char bit;
+	struct timeval curr_tv;
+
+	/* Bit duration in microseconds */
+	const unsigned long bit_duration = 1000000ul / (115200 / CFG_BDR);
+
+	struct ite8709_device *dev;
+	dev = dev_id;
+
+	/*
+	 * If device is busy, we simply discard data because we are in one of
+	 * these two cases : shutting down or rearming the device, so this
+	 * doesn't really matter and this avoids waiting too long in IRQ ctx
+	 */
+	spin_lock(&dev->hardware_lock);
+	if (dev->device_busy) {
+		spin_unlock(&dev->hardware_lock);
+		return IRQ_RETVAL(IRQ_HANDLED);
+	}
+
+	iir = ite8709_read(dev, ITE8709_IIR);
+
+	switch (iir) {
+	case ITE8709_IIR_RFOI:
+		dprintk("fifo overrun, scheduling forced rearm just in case\n");
+		dev->force_rearm = 1;
+		tasklet_schedule(&dev->tasklet);
+		spin_unlock(&dev->hardware_lock);
+		return IRQ_RETVAL(IRQ_HANDLED);
+
+	case ITE8709_IIR_RDAI:
+		rfsr = ite8709_read(dev, ITE8709_RFSR);
+		fifo = rfsr & ITE8709_RFSR_MASK;
+		if (fifo > 32)
+			fifo = 32;
+		dprintk("iir: 0x%x rfsr: 0x%x fifo: %d\n", iir, rfsr, fifo);
+
+		if (dev->rearmed) {
+			do_gettimeofday(&curr_tv);
+			dev->acc_space += 1000000ull
+				* (curr_tv.tv_sec - dev->last_tv.tv_sec)
+				+ (curr_tv.tv_usec - dev->last_tv.tv_usec);
+			dev->rearmed = 0;
+		}
+		for (i = 0; i < fifo; i++) {
+			data = ite8709_read(dev, i+ITE8709_FIFO_START);
+			data = ~data;
+			/* Loop through */
+			for (bit = 0; bit < 8; ++bit) {
+				if ((data >> bit) & 1) {
+					dev->acc_pulse += bit_duration;
+					if (dev->lastbit == 0) {
+						ite8709_add_read_queue(dev, 0,
+							dev->acc_space);
+						dev->acc_space = 0;
+					}
+				} else {
+					dev->acc_space += bit_duration;
+					if (dev->lastbit == 1) {
+						ite8709_add_read_queue(dev, 1,
+							dev->acc_pulse);
+						dev->acc_pulse = 0;
+					}
+				}
+				dev->lastbit = (data >> bit) & 1;
+			}
+		}
+		ite8709_write(dev, ITE8709_RFSR, 0);
+
+		if (dev->acc_space > CFG_TIMEOUT) {
+			dprintk("scheduling rearm IRQ\n");
+			do_gettimeofday(&dev->last_tv);
+			dev->force_rearm = 0;
+			tasklet_schedule(&dev->tasklet);
+		}
+
+		spin_unlock(&dev->hardware_lock);
+		return IRQ_RETVAL(IRQ_HANDLED);
+
+	default:
+		/* not our irq */
+		dprintk("unknown IRQ (shouldn't happen) !!\n");
+		spin_unlock(&dev->hardware_lock);
+		return IRQ_RETVAL(IRQ_NONE);
+	}
+}
+
+static void ite8709_rearm_irq(unsigned long data)
+{
+	struct ite8709_device *dev;
+	unsigned long flags;
+	dev = (struct ite8709_device *) data;
+
+	spin_lock_irqsave(&dev->hardware_lock, flags);
+	dev->device_busy = 1;
+	spin_unlock_irqrestore(&dev->hardware_lock, flags);
+
+	if (dev->force_rearm || dev->acc_space > CFG_TIMEOUT) {
+		dprintk("rearming IRQ\n");
+		ite8709_write_register(dev, IT8512_REG_RCR,
+						IT8512_RCR_RXACT | CFG_DCR);
+		ite8709_write_register(dev, IT8512_REG_MSTCR,
+					CFG_FIFOTL | IT8512_MSTCR_FIFOCLR);
+		ite8709_write_register(dev, IT8512_REG_RCR,
+				IT8512_RCR_RXEN | IT8512_RCR_RXACT | CFG_DCR);
+		if (!dev->force_rearm)
+			dev->rearmed = 1;
+		dev->force_rearm = 0;
+	}
+
+	spin_lock_irqsave(&dev->hardware_lock, flags);
+	dev->device_busy = 0;
+	spin_unlock_irqrestore(&dev->hardware_lock, flags);
+}
+
+static int ite8709_cleanup(struct ite8709_device *dev, int stage, int errno,
+				char *msg)
+{
+	if (msg != NULL)
+		printk(KERN_ERR LIRC_DRIVER_NAME ": %s\n", msg);
+
+	switch (stage) {
+	case 6:
+		if (dev->use_count > 0)
+			ite8709_drop_hardware(dev);
+	case 5:
+		free_irq(dev->irq, dev);
+	case 4:
+		release_region(dev->io, 2);
+	case 3:
+		lirc_unregister_driver(dev->driver.minor);
+	case 2:
+		lirc_buffer_free(dev->driver.rbuf);
+	case 1:
+		kfree(dev);
+	case 0:
+		;
+	}
+
+	return errno;
+}
+
+static int __devinit ite8709_pnp_probe(struct pnp_dev *dev,
+					const struct pnp_device_id *dev_id)
+{
+	struct lirc_driver *driver;
+	struct ite8709_device *ite8709_dev;
+	int ret;
+
+	/* Check resources validity */
+	if (!pnp_irq_valid(dev, 0))
+		return ite8709_cleanup(NULL, 0, -ENODEV, "invalid IRQ");
+	if (!pnp_port_valid(dev, 2))
+		return ite8709_cleanup(NULL, 0, -ENODEV, "invalid IO port");
+
+	/* Allocate memory for device struct */
+	ite8709_dev = kzalloc(sizeof(struct ite8709_device), GFP_KERNEL);
+	if (ite8709_dev == NULL)
+		return ite8709_cleanup(NULL, 0, -ENOMEM, "kzalloc failed");
+	pnp_set_drvdata(dev, ite8709_dev);
+
+	/* Initialize device struct */
+	ite8709_dev->use_count = 0;
+	ite8709_dev->irq = pnp_irq(dev, 0);
+	ite8709_dev->io = pnp_port_start(dev, 2);
+	ite8709_dev->hardware_lock = __SPIN_LOCK_UNLOCKED(
+					ite8709_dev->hardware_lock);
+	ite8709_dev->acc_pulse = 0;
+	ite8709_dev->acc_space = 0;
+	ite8709_dev->lastbit = 0;
+	do_gettimeofday(&ite8709_dev->last_tv);
+	tasklet_init(&ite8709_dev->tasklet, ite8709_rearm_irq,
+							(long) ite8709_dev);
+	ite8709_dev->force_rearm = 0;
+	ite8709_dev->rearmed = 0;
+	ite8709_dev->device_busy = 0;
+
+	/* Initialize driver struct */
+	driver = &ite8709_dev->driver;
+	strcpy(driver->name, LIRC_DRIVER_NAME);
+	driver->minor = -1;
+	driver->code_length = sizeof(lirc_t) * 8;
+	driver->sample_rate = 0;
+	driver->features = LIRC_CAN_REC_MODE2;
+	driver->data = ite8709_dev;
+	driver->add_to_buf = NULL;
+#ifndef LIRC_REMOVE_DURING_EXPORT
+	driver->get_queue = NULL;
+#endif
+	driver->rbuf = &ite8709_dev->buffer;
+	driver->set_use_inc = ite8709_set_use_inc;
+	driver->set_use_dec = ite8709_set_use_dec;
+	driver->fops = NULL;
+	driver->dev = &dev->dev;
+	driver->owner = THIS_MODULE;
+
+	/* Initialize LIRC buffer */
+	if (lirc_buffer_init(driver->rbuf, BUF_CHUNK_SIZE, BUF_SIZE))
+		return ite8709_cleanup(ite8709_dev, 1, -ENOMEM,
+				       "lirc_buffer_init() failed");
+
+	/* Register LIRC driver */
+	ret = lirc_register_driver(driver);
+	if (ret < 0)
+		return ite8709_cleanup(ite8709_dev, 2, ret,
+					"lirc_register_driver() failed");
+
+	/* Reserve I/O port access */
+	if (!request_region(ite8709_dev->io, 2, LIRC_DRIVER_NAME))
+		return ite8709_cleanup(ite8709_dev, 3, -EBUSY,
+						"i/o port already in use");
+
+	/* Reserve IRQ line */
+	ret = request_irq(ite8709_dev->irq, ite8709_interrupt, 0,
+					LIRC_DRIVER_NAME, ite8709_dev);
+	if (ret < 0)
+		return ite8709_cleanup(ite8709_dev, 4, ret,
+						"IRQ already in use");
+
+	/* Initialize hardware */
+	ite8709_drop_hardware(ite8709_dev); /* Shutdown hw until first use */
+
+	printk(KERN_INFO LIRC_DRIVER_NAME ": device found : irq=%d io=0x%x\n",
+					ite8709_dev->irq, ite8709_dev->io);
+
+	return 0;
+}
+
+static void __devexit ite8709_pnp_remove(struct pnp_dev *dev)
+{
+	struct ite8709_device *ite8709_dev;
+	ite8709_dev = pnp_get_drvdata(dev);
+
+	ite8709_cleanup(ite8709_dev, 6, 0, NULL);
+
+	printk(KERN_INFO LIRC_DRIVER_NAME ": device removed\n");
+}
+
+#ifdef CONFIG_PM
+static int ite8709_pnp_suspend(struct pnp_dev *dev, pm_message_t state)
+{
+	struct ite8709_device *ite8709_dev;
+	ite8709_dev = pnp_get_drvdata(dev);
+
+	if (ite8709_dev->use_count > 0)
+		ite8709_drop_hardware(ite8709_dev);
+
+	return 0;
+}
+
+static int ite8709_pnp_resume(struct pnp_dev *dev)
+{
+	struct ite8709_device *ite8709_dev;
+	ite8709_dev = pnp_get_drvdata(dev);
+
+	if (ite8709_dev->use_count > 0)
+		ite8709_init_hardware(ite8709_dev);
+
+	return 0;
+}
+#else
+#define ite8709_pnp_suspend NULL
+#define ite8709_pnp_resume NULL
+#endif
+
+static const struct pnp_device_id pnp_dev_table[] = {
+	{"ITE8709", 0},
+	{}
+};
+
+MODULE_DEVICE_TABLE(pnp, pnp_dev_table);
+
+static struct pnp_driver ite8709_pnp_driver = {
+	.name           = LIRC_DRIVER_NAME,
+	.probe          = ite8709_pnp_probe,
+	.remove         = __devexit_p(ite8709_pnp_remove),
+	.suspend        = ite8709_pnp_suspend,
+	.resume         = ite8709_pnp_resume,
+	.id_table       = pnp_dev_table,
+};
+
+int init_module(void)
+{
+	return pnp_register_driver(&ite8709_pnp_driver);
+}
+
+void cleanup_module(void)
+{
+	pnp_unregister_driver(&ite8709_pnp_driver);
+}
+
+MODULE_DESCRIPTION("LIRC driver for ITE8709 CIR port");
+MODULE_AUTHOR("Grégory Lardière");
+MODULE_LICENSE("GPL");
+
+module_param(debug, bool, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(debug, "Enable debugging messages");
+EXPORT_NO_SYMBOLS;
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_ite8709/Makefile
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_ite8709/Makefile
@@ -0,0 +1,3 @@
+EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)/..
+
+obj-$(CONFIG_LIRC_ITE8709)	+= lirc_ite8709.o
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_wpc8769l/lirc_wpc8769l.c
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_wpc8769l/lirc_wpc8769l.c
@@ -0,0 +1,1179 @@
+/*      $Id: lirc_wpc8769l.c,v 1.8 2009/03/15 09:34:01 lirc Exp $      */
+
+/****************************************************************************
+ ** lirc_wpc8769l.c ****************************************************
+ ****************************************************************************
+ *
+ * lirc_wpc8769l - Device driver for the integrated CIR receiver found in
+ *                 Acer Aspire 6530G (and probably other models), based on
+ *                 the Winbond 8769L embedded controller.
+ *                 (Written using the lirc_serial driver as a guide).
+ *
+ * Copyright (C) 2008, 2009 Juan J. Garcia de Soria <skandalfo@gmail.com>
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+
+#ifdef HAVE_CONFIG_H
+# include <config.h>
+#endif
+
+#include <linux/version.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 2, 18)
+#error "**********************************************************"
+#error " Sorry, this driver needs kernel version 2.2.18 or higher "
+#error "**********************************************************"
+#endif
+
+#include <linux/autoconf.h>
+
+#include <linux/module.h>
+#include <linux/errno.h>
+#include <linux/fs.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/time.h>
+#include <linux/timer.h>
+#include <linux/types.h>
+#include <linux/poll.h>
+
+#include <linux/bitops.h>
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 16)
+#include <asm/io.h>
+#else
+#include <linux/io.h>
+#endif
+#include <linux/irq.h>
+
+#include <linux/acpi.h>
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18)
+#include <linux/platform_device.h>
+#endif
+
+#include "../lirc.h"
+#include "../kcompat.h"
+#include "../lirc_dev/lirc_dev.h"
+
+#include "lirc_wpc8769l.h"
+
+/* Name of the lirc device. */
+#define LIRC_DRIVER_NAME "lirc_wpc8769l"
+
+#define dprintk(fmt, args...)					\
+	do {							\
+		if (debug)					\
+			printk(KERN_DEBUG LIRC_DRIVER_NAME ": "	\
+			       fmt, ## args);			\
+	} while (0)
+
+#define wprintk(fmt, args...)					\
+	do {							\
+			printk(KERN_WARN LIRC_DRIVER_NAME ": "	\
+			       fmt, ## args);			\
+	} while (0)
+
+#define eprintk(fmt, args...)					\
+	do {							\
+			printk(KERN_ERR LIRC_DRIVER_NAME ": "	\
+			       fmt, ## args);			\
+	} while (0)
+
+#define iprintk(fmt, args...)					\
+	do {							\
+			printk(KERN_INFO LIRC_DRIVER_NAME ": "	\
+			       fmt, ## args);			\
+	} while (0)
+
+/* Number of driver->lirc-dev buffer elements. */
+#define RBUF_LEN 256
+
+/* Number of 0xff bytes received in a row. */
+static unsigned int wpc8769l_ff_bytes_in_a_row;
+
+/* Hardware resource parameters. */
+static unsigned int baseport1;
+static unsigned int baseport2;
+static unsigned int irq;
+
+/* Debugging flag. */
+static int debug;
+
+/* If true, we skip ACPI autodetection and use the parameter-supplied I/O and
+ * IRQ. */
+static int skip_probe;
+
+/* Whether the device is open or not. */
+static int lirc_wpc8769l_is_open;
+
+/* Code disabled since it didn't seem to work with the test hardware. */
+/*#define LIRC_WPC8769L_WAKEUP*/
+#ifdef LIRC_WPC8769L_WAKEUP
+/* These parameters are taken from the driver for MS Windows Vista.
+ * The specific values used for your hardware may be found at this registry
+ * key:
+ *
+ * HKEY_LOCAL_MACHINE/CurrentControlSet/Services/Winbond CIR/PowerKey
+ */
+static int protocol_select = 2;
+static int max_info_bits = 24;
+static unsigned int rc_wakeup_code = 0x7ffffbf3;
+static unsigned int rc_wakeup_mask = 0xff000fff;
+#endif
+
+/* Resource allocation pointers. */
+static struct resource *wpc8769l_portblock1_resource;
+static struct resource *wpc8769l_portblock2_resource;
+
+/* Hardware related spinlock. */
+static DEFINE_SPINLOCK(wpc8769l_hw_spinlock);
+
+/* The buffer for ISR to bottom half data transfer. */
+static struct lirc_buffer rbuf;
+
+/* Bit-to-MODE2 coalescing helper variables. */
+static int last_was_pulse;
+static lirc_t last_counter;
+
+/* Microseconds after a timeout-triggered pulse. */
+static s64 lastus;
+
+/* Microseconds when the timer was started. */
+static s64 timerstartus;
+
+/* Put another pulse/space to the queue, checking for overruns. */
+static void put_item(lirc_t data)
+{
+	if (lirc_buffer_full(&rbuf)) {
+		if (printk_ratelimit())
+			eprintk("RX buffer overrun.\n");
+		return;
+	}
+	lirc_buffer_write(&rbuf, (void *) &data);
+}
+
+/* Put any accumulated pulse/space to userspace. */
+static void put_span(void)
+{
+	lirc_t data;
+	if (last_counter) {
+		/* Take the usecs length. */
+		data = last_counter;
+
+		/* Mark pulse or space. */
+		if (last_was_pulse)
+			data |= PULSE_BIT;
+
+		/* Put the span to the buffer. */
+		put_item(data);
+
+		/* Reset counter, in order to avoid emitting duplicate data. */
+		last_counter = 0;
+	}
+}
+
+/* Aggregate pulse time. */
+static void put_pulse_bit(lirc_t n)
+{
+	if (last_was_pulse) {
+		last_counter += n;
+		if (last_counter > PULSE_MASK)
+			last_counter = PULSE_MASK;
+	} else {
+		put_span();
+		last_was_pulse = 1;
+		last_counter = n;
+		if (last_counter > PULSE_MASK)
+			last_counter = PULSE_MASK;
+	}
+}
+
+/* Aggregate space time. */
+static void put_space_bit(lirc_t n)
+{
+	if (!last_was_pulse) {
+		last_counter += n;
+		if (last_counter > PULSE_MASK)
+			last_counter = PULSE_MASK;
+	} else {
+		put_span();
+		last_was_pulse = 0;
+		last_counter = n;
+		if (last_counter > PULSE_MASK)
+			last_counter = PULSE_MASK;
+	}
+}
+
+/* Timeout function for last pulse part. */
+static void wpc8769l_last_timeout(unsigned long l)
+{
+	struct timeval currenttv;
+
+	unsigned long flags;
+	spin_lock_irqsave(&wpc8769l_hw_spinlock, flags);
+
+	/* Mark the time at which we inserted the timeout span. */
+	do_gettimeofday(&currenttv);
+	lastus = ((s64) currenttv.tv_sec) * 1000000ll + currenttv.tv_usec;
+
+	/* Emit the timeout as a space. */
+	put_space_bit(lastus - timerstartus);
+
+	/* Signal the bottom half wait queue
+	 * that there's data available. */
+	wake_up_interruptible(&rbuf.wait_poll);
+
+	spin_unlock_irqrestore(&wpc8769l_hw_spinlock, flags);
+}
+
+/* Timer for end-of-code pulse timeout. */
+static struct timer_list last_span_timer =
+	TIMER_INITIALIZER(wpc8769l_last_timeout, 0, 0);
+
+/* Interrupt handler, doing the bit sample to mode2 conversion.
+ * Perhaps this work should be taken outside of the ISR... */
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 19)
+static irqreturn_t irq_handler(int irqno, void *blah)
+#else
+static irqreturn_t irq_handler(int irqno, void *blah, struct pt_regs *regs)
+#endif
+{
+	unsigned int data;
+	int handled = 0;
+	int count, more;
+	struct timeval currenttv;
+	s64 currentus, span;
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 25)
+	unsigned char data_buf[WPC8769L_BYTE_BUFFER_SIZE];
+	unsigned char *data_ptr;
+	unsigned long *ldata;
+	unsigned int next_one, next_zero, size;
+#else
+	unsigned int mask;
+#endif
+
+	unsigned long flags;
+	spin_lock_irqsave(&wpc8769l_hw_spinlock, flags);
+
+	/* Check whether there's any data available. */
+	outb(WPC8769L_BANK_00, baseport1 + WPC8769L_SELECT_REG);
+	data = inb(baseport1 + WPC8769L_DATA_STATUS_REG);
+
+	if (data & WPC8769L_DATA_READY_MASK) {
+		/* Get current timestamp. */
+		do_gettimeofday(&currenttv);
+		currentus = ((s64) currenttv.tv_sec) * 1000000ll +
+			currenttv.tv_usec;
+
+		/* If we had a timeout before we might need to fill
+		 * in additional space time. */
+		if (lastus) {
+			/* Calculate the difference, compensating
+			 * the time for the data successfully
+			 * received (estimated to be
+			 * WPC8769L_BYTES_PER_BURST bytes). */
+			span = currentus - lastus
+					- WPC8769L_BYTES_PER_BURST
+					* WPC8769L_USECS_PER_BYTE;
+
+			/* Only insert positive spans. */
+			if (span > 0) {
+				/* Emit the extended gap as a space. */
+				put_space_bit(span);
+			}
+
+			/* Mark that we had the last timeout into account. */
+			lastus = 0;
+		}
+
+		count = 0;
+		more = 1;
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 25)
+		data_ptr = data_buf;
+#endif
+		do {
+			/* Read the next byte of data. */
+			outb(WPC8769L_BANK_00, baseport1 + WPC8769L_SELECT_REG);
+			data = inb(baseport1 + WPC8769L_DATA_REG);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 25)
+			*data_ptr++ = data;
+#else
+			for (mask = 0x01 ; mask < 0x100; mask <<= 1) {
+				if (data & mask)
+					put_space_bit(WPC8769L_USECS_PER_BIT);
+				else
+					put_pulse_bit(WPC8769L_USECS_PER_BIT);
+			}
+#endif
+
+			/* Check for 0xff in a row. */
+			if (data == 0xff)
+				wpc8769l_ff_bytes_in_a_row++;
+			else
+				wpc8769l_ff_bytes_in_a_row = 0;
+
+			outb(WPC8769L_BANK_00, baseport1 + WPC8769L_SELECT_REG);
+			data = inb(baseport1 + WPC8769L_DATA_ACK_REG);
+			if (data & WPC8769L_DATA_ACK_REG) {
+				outb(WPC8769L_BANK_E0,
+					baseport1 + WPC8769L_SELECT_REG);
+				data = inb(baseport1 +
+					WPC8769L_REMAINING_RX_DATA_REG);
+				if (!data)
+					more = 0;
+			} else
+				more = 0;
+
+			count++;
+		} while (more && count < WPC8769L_BYTES_PER_BURST);
+
+		if (wpc8769l_ff_bytes_in_a_row
+			>= WPC8769L_FF_BYTES_BEFORE_RESET) {
+
+			/* Put in another 0xff byte. */
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 25)
+			*data_ptr++ = 0xff;
+			count++;
+#else
+			put_space_bit(8 * WPC8769L_USECS_PER_BIT);
+#endif
+
+			/* Reset the hardware in the case of too many
+			 * 0xff bytes in a row. */
+			outb(WPC8769L_BANK_00, baseport1 + WPC8769L_SELECT_REG);
+			outb(WPC8769L_TIMEOUT_RESET_MASK,
+				baseport1 + WPC8769L_TIMEOUT_RESET_REG);
+		}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 25)
+		/* Emit the data. */
+		size = count << 3;
+
+		ldata = (unsigned long *) data_buf;
+		next_one = generic_find_next_le_bit(ldata, size, 0);
+
+		if (next_one > 0)
+			put_pulse_bit(next_one
+				* WPC8769L_USECS_PER_BIT);
+
+		while (next_one < size) {
+			next_zero = generic_find_next_zero_le_bit(ldata,
+				size, next_one + 1);
+
+			put_space_bit(
+				(next_zero - next_one)
+				* WPC8769L_USECS_PER_BIT);
+
+			if (next_zero < size) {
+				next_one = generic_find_next_le_bit(ldata,
+					size, next_zero + 1);
+
+				put_pulse_bit(
+					(next_one - next_zero)
+					* WPC8769L_USECS_PER_BIT);
+			} else {
+				next_one = size;
+			}
+		}
+#endif
+
+		/* Mark the IRQ as handled. */
+		handled = 1;
+
+		/* Signal the bottom half wait queue
+		 * that there's data available. */
+		wake_up_interruptible(&rbuf.wait_poll);
+
+		/* Set up timeout handling. */
+		mod_timer(&last_span_timer,
+			jiffies + WPC8769L_LAST_TIMEOUT_JIFFIES);
+
+		/* Set up last timer us mark. */
+		timerstartus = currentus;
+	}
+
+	spin_unlock_irqrestore(&wpc8769l_hw_spinlock, flags);
+	return IRQ_RETVAL(handled);
+}
+
+/* Prepare the hardware on module load. */
+static void wpc8769l_prepare_hardware(void)
+{
+	unsigned long flags;
+	spin_lock_irqsave(&wpc8769l_hw_spinlock, flags);
+
+	/* I don't know why this needs reading. */
+	outb(WPC8769L_BANK_E4, baseport1 + WPC8769L_SELECT_REG);
+	inb(baseport1 + WPC8769L_READ_ON_STARTUP_REG);
+
+	spin_unlock_irqrestore(&wpc8769l_hw_spinlock, flags);
+}
+
+
+/* Wake up device from power down and check whether it was the
+ * device that woke us up.
+ */
+static int wpc8769l_power_up_and_check_if_we_woke_us_up(void)
+{
+	unsigned int data;
+	int res;
+
+	unsigned long flags;
+	spin_lock_irqsave(&wpc8769l_hw_spinlock, flags);
+
+	if (baseport2) {
+		data = inb(baseport2 + WPC8769L_BANK2_CLOCK_REG);
+		data &= ~WPC8769L_CLOCK_OFF_MASK;
+		data |= WPC8769L_CLOCK_ON_MASK;
+		outb(data, baseport2 + WPC8769L_BANK2_CLOCK_REG);
+
+		res = inb(baseport2 + WPC8769L_WAKEUP_STATUS_REG)
+			& WPC8769L_WAKEUP_WOKE_UP_MASK;
+
+		data = inb(baseport2 + WPC8769L_BANK2_CLOCK_REG);
+		data &= ~WPC8769L_CLOCK_OFF_MASK;
+		data |= WPC8769L_CLOCK_ON_MASK;
+		outb(data, baseport2 + WPC8769L_BANK2_CLOCK_REG);
+
+		outb(WPC8769L_WAKEUP_WOKE_UP_MASK,
+			baseport2 + WPC8769L_WAKEUP_STATUS_REG);
+
+		outb(WPC8769L_WAKEUP_ACK_MASK,
+			baseport2 + WPC8769L_WAKEUP_ACK_REG);
+	} else {
+		outb(WPC8769L_BANK_F0, baseport1 + WPC8769L_SELECT_REG);
+		res = (inb(baseport1 + WPC8769L_WAKEUP_STATUS_LEG_REG)
+			& WPC8769L_WAKEUP_STATUS_LEG_MASK) ? 1 : 0;
+	}
+
+	spin_unlock_irqrestore(&wpc8769l_hw_spinlock, flags);
+
+	return res;
+}
+
+/* Disable interrupts from device. */
+static void wpc8769l_disable_interrupts(void)
+{
+	unsigned long flags;
+	spin_lock_irqsave(&wpc8769l_hw_spinlock, flags);
+
+	outb(WPC8769L_BANK_00, baseport1 + WPC8769L_SELECT_REG);
+	outb(WPC8769L_BANK_00, baseport1 + WPC8769L_SELECT_REG);
+	outb(inb(baseport1 + WPC8769L_INTERRUPT_REG)
+		& ~WPC8769L_INTERRUPT_1_MASK,
+		baseport1 + WPC8769L_INTERRUPT_REG);
+	outb(WPC8769L_BANK_00, baseport1 + WPC8769L_SELECT_REG);
+	outb(WPC8769L_BANK_00, baseport1 + WPC8769L_SELECT_REG);
+	outb(inb(baseport1 + WPC8769L_INTERRUPT_REG)
+		& ~WPC8769L_INTERRUPT_1_MASK,
+		baseport1 + WPC8769L_INTERRUPT_REG);
+
+	spin_unlock_irqrestore(&wpc8769l_hw_spinlock, flags);
+}
+
+#ifdef LIRC_WPC8769L_WAKEUP
+/* Expand value nibble for configuration of wake up parameters.
+ * This seems to manchester-encode a nibble into a byte. */
+static unsigned int wpc8769l_expand_value_nibble(unsigned int nibble)
+{
+	int i;
+	unsigned int tmp, tmp2, res;
+
+	res = 0;
+
+	for (i = 0; i < 4; i += 2) {
+		tmp = (nibble >> i) & 0x3;
+		switch (tmp) {
+		case 3:
+			tmp2 = 5;
+			break;
+		case 2:
+			tmp2 = 6;
+			break;
+		case 1:
+			tmp2 = 9;
+			break;
+		case 0:
+			tmp2 = 0x0a;
+			break;
+		default:
+			return 0;
+			break;
+		}
+		res |= ((tmp2 << i) << i);
+	}
+
+	return res;
+}
+
+/* Expand mask nibble for configuration of wake up parameters. */
+static unsigned int wpc8769l_expand_mask_nibble(unsigned int nibble)
+{
+	int i;
+	unsigned int tmp, tmp2, res;
+
+	res = 0;
+
+	for (i = 0; i < 4; i += 2) {
+		tmp = (nibble >> i) & 0x3;
+		switch (tmp) {
+		case 0:
+			tmp2 = 0;
+			break;
+		case 1:
+			tmp2 = 3;
+			break;
+		case 2:
+			tmp2 = 0x0c;
+			break;
+		case 3:
+			tmp2 = 0x0f;
+			break;
+		default:
+			return 0;
+			break;
+		}
+		res |= ((tmp2 << i) << i);
+	}
+
+	return res;
+}
+
+/* Configure wake up triggers for the hardware that supports it.
+ * THE CALLER MUST HAVE ACQUIRED wpc8769l_hw_spinlock BEFORE CALLING.
+ */
+static void wpc8769l_configure_wakeup_triggers(void)
+{
+	unsigned int x;
+	unsigned int data, data2;
+
+	int i, j;
+
+	x = inb(baseport2 + WPC8769L_WAKEUP_ENABLE_REG)
+		& WPC8769L_WAKEUP_ENABLE_MASK;
+	outb(inb(baseport2 + WPC8769L_WAKEUP_ENABLE_REG)
+		& ~WPC8769L_WAKEUP_ENABLE_MASK,
+		baseport2 + WPC8769L_WAKEUP_ENABLE_REG);
+
+	data = inb(baseport2 + WPC8769L_BANK2_CLOCK_REG);
+	data &= ~WPC8769L_CLOCK_OFF_MASK;
+	data |= WPC8769L_CLOCK_ON_MASK;
+	outb(data, baseport2 + WPC8769L_BANK2_CLOCK_REG);
+
+	outb(WPC8769L_WAKEUP_CONFIGURING_MASK,
+		baseport2 + WPC8769L_WAKEUP_STATUS_REG);
+	outb(WPC8769L_WAKEUP_ACK_MASK,
+		baseport2 + WPC8769L_WAKEUP_ACK_REG);
+
+	data = inb(baseport2 + WPC8769L_BANK2_CLOCK_REG);
+	data &= ~WPC8769L_CLOCK_OFF_MASK;
+	data |= WPC8769L_CLOCK_ON_MASK;
+	outb(data, baseport2 + WPC8769L_BANK2_CLOCK_REG);
+
+	data = inb(baseport2 + WPC8769L_BANK2_CLOCK_REG);
+	data &= ~WPC8769L_CLOCK_OFF_MASK;
+	data |= WPC8769L_CLOCK_ON_MASK;
+	outb(data, baseport2 + WPC8769L_BANK2_CLOCK_REG);
+
+	data = inb(baseport2 + WPC8769L_WAKEUP_CONFIG_REG);
+	data &= WPC8769L_WAKEUP_CONFIG_PRE_MASK;
+	data |= (max_info_bits + WPC8769L_MAX_INFO_BITS_BIAS)
+		<< WPC8769L_MAX_INFO_BITS_SHIFT;
+	outb(data, baseport2 + WPC8769L_WAKEUP_CONFIG_REG);
+
+	i = j = 0;
+
+	/* Program values. */
+	while (j < WPC8769L_WAKEUP_DATA_BITS) {
+		data = inb(baseport2 + WPC8769L_BANK2_CLOCK_REG);
+		data &= ~WPC8769L_CLOCK_OFF_MASK;
+		data |= WPC8769L_CLOCK_ON_MASK;
+		outb(data, baseport2 + WPC8769L_BANK2_CLOCK_REG);
+
+		outb(i + WPC8769L_WAKEUP_DATA_BASE,
+			baseport2 + WPC8769L_WAKEUP_DATA_PTR_REG);
+
+		data = inb(baseport2 + WPC8769L_BANK2_CLOCK_REG);
+		data &= ~WPC8769L_CLOCK_OFF_MASK;
+		data |= WPC8769L_CLOCK_ON_MASK;
+		outb(data, baseport2 + WPC8769L_BANK2_CLOCK_REG);
+
+		data = (rc_wakeup_code >> j) & 0x0f;
+		data = wpc8769l_expand_value_nibble(data);
+		outb(data, baseport2 + WPC8769L_WAKEUP_DATA_REG);
+
+		i++;
+		j += 4;
+	}
+
+	/* Program masks. */
+	while (j < WPC8769L_WAKEUP_DATA_BITS) {
+		data = inb(baseport2 + WPC8769L_BANK2_CLOCK_REG);
+		data &= ~WPC8769L_CLOCK_OFF_MASK;
+		data |= WPC8769L_CLOCK_ON_MASK;
+		outb(data, baseport2 + WPC8769L_BANK2_CLOCK_REG);
+
+		outb(i + WPC8769L_WAKEUP_MASK_BASE,
+			baseport2 + WPC8769L_WAKEUP_DATA_PTR_REG);
+
+		data = inb(baseport2 + WPC8769L_BANK2_CLOCK_REG);
+		data &= ~WPC8769L_CLOCK_OFF_MASK;
+		data |= WPC8769L_CLOCK_ON_MASK;
+		outb(data, baseport2 + WPC8769L_BANK2_CLOCK_REG);
+
+		data = (rc_wakeup_mask >> j) & 0x0f;
+		data = wpc8769l_expand_mask_nibble(data);
+		outb(data, baseport2 + WPC8769L_WAKEUP_DATA_REG);
+
+		i++;
+		j += 4;
+	}
+
+	data = inb(baseport2 + WPC8769L_BANK2_CLOCK_REG);
+	data &= ~WPC8769L_CLOCK_OFF_MASK;
+	data |= WPC8769L_CLOCK_ON_MASK;
+	outb(data, baseport2 + WPC8769L_BANK2_CLOCK_REG);
+
+	data2 = inb(baseport2 + WPC8769L_WAKEUP_CONFIG2_REG);
+	data2 &= WPC8769L_WAKEUP_CONFIG2_AND_MASK;
+	data2 |= WPC8769L_WAKEUP_CONFIG2_OR_MASK;
+
+	data = inb(baseport2 + WPC8769L_BANK2_CLOCK_REG);
+	data &= ~WPC8769L_CLOCK_OFF_MASK;
+	data |= WPC8769L_CLOCK_ON_MASK;
+	outb(data, baseport2 + WPC8769L_BANK2_CLOCK_REG);
+
+	outb(data2, baseport2 + WPC8769L_WAKEUP_CONFIG2_REG);
+
+	if (x != WPC8769L_WAKEUP_ENABLE_MASK)
+		outb(inb(baseport2 + WPC8769L_WAKEUP_ENABLE_REG)
+		| WPC8769L_WAKEUP_ENABLE_MASK,
+		baseport2 + WPC8769L_WAKEUP_ENABLE_REG);
+}
+#endif
+
+/* Enable interrupts from device. */
+static void wpc8769l_enable_interrupts(void)
+{
+	unsigned int data, data2, data_save;
+
+	unsigned int a, b;
+
+	unsigned long flags;
+	spin_lock_irqsave(&wpc8769l_hw_spinlock, flags);
+
+	outb(WPC8769L_BANK_F0, baseport1 + WPC8769L_SELECT_REG);
+	data_save = inb(baseport1 + WPC8769L_WAKEUP_STATUS_LEG_REG);
+
+	outb(WPC8769L_BANK_E0, baseport1 + WPC8769L_SELECT_REG);
+	outb(0, baseport1 + WPC8769L_HARDWARE_ENABLE1_REG);
+
+	outb(WPC8769L_BANK_E0, baseport1 + WPC8769L_SELECT_REG);
+	outb(WPC8769L_BANK_E0, baseport1 + WPC8769L_SELECT_REG);
+	outb(inb(baseport1 + WPC8769L_HARDWARE_ENABLE1_REG)
+		| WPC8769L_HARDWARE_ENABLE1_MASK,
+		baseport1 + WPC8769L_HARDWARE_ENABLE1_REG);
+
+	outb(WPC8769L_BANK_00, baseport1 + WPC8769L_SELECT_REG);
+	outb(0, baseport1 + WPC8769L_CONFIG_REG);
+
+	outb(WPC8769L_BANK_00, baseport1 + WPC8769L_SELECT_REG);
+	outb(WPC8769L_BANK_00, baseport1 + WPC8769L_SELECT_REG);
+	data = inb(baseport1 + WPC8769L_CONFIG_REG);
+	data &= ~WPC8769L_CONFIG_OFF_MASK;
+	data |= WPC8769L_CONFIG_ON_MASK;
+	outb(data, baseport1 + WPC8769L_CONFIG_REG);
+
+	outb(WPC8769L_BANK_00, baseport1 + WPC8769L_SELECT_REG);
+	outb(WPC8769L_DATA_STATUS_MASK_1, baseport1 + WPC8769L_DATA_STATUS_REG);
+
+	outb(WPC8769L_BANK_00, baseport1 + WPC8769L_SELECT_REG);
+	outb(WPC8769L_DATA_STATUS_MASK_2, baseport1 + WPC8769L_DATA_STATUS_REG);
+
+	outb(WPC8769L_BANK_F4, baseport1 + WPC8769L_SELECT_REG);
+	outb(WPC8769L_BANK_F4, baseport1 + WPC8769L_SELECT_REG);
+	outb(inb(baseport1 + WPC8769L_CONFIG2_REG)
+		& ~WPC8769L_CONFIG2_OFF_MASK,
+		baseport1 + WPC8769L_CONFIG2_REG);
+
+	outb(WPC8769L_BANK_EC, baseport1 + WPC8769L_SELECT_REG);
+	outb(WPC8769L_BANK_EC, baseport1 + WPC8769L_SELECT_REG);
+	outb(inb(baseport1 + WPC8769L_CONFIG3_REG)
+		| WPC8769L_CONFIG3_ON_MASK,
+		baseport1 + WPC8769L_CONFIG3_REG);
+
+	outb(WPC8769L_BANK_F4, baseport1 + WPC8769L_SELECT_REG);
+	data = inb(baseport1 + WPC8769L_CONFIG4_REG);
+	data &= WPC8769L_CONFIG4_AND_MASK;
+	data |= WPC8769L_CONFIG4_ON_MASK;
+
+	outb(WPC8769L_BANK_F4, baseport1 + WPC8769L_SELECT_REG);
+	outb(data, baseport1 + WPC8769L_CONFIG4_REG);
+
+	outb(WPC8769L_BANK_E0, baseport1 + WPC8769L_SELECT_REG);
+	outb(WPC8769L_BANK_E0, baseport1 + WPC8769L_SELECT_REG);
+	outb(inb(baseport1 + WPC8769L_CONFIG5_REG)
+		| WPC8769L_CONFIG5_ON_MASK,
+		baseport1 + WPC8769L_CONFIG5_REG);
+
+	outb(WPC8769L_BANK_E0, baseport1 + WPC8769L_SELECT_REG);
+	outb(WPC8769L_CONFIG6_MASK, baseport1 + WPC8769L_CONFIG6_REG);
+
+	outb(WPC8769L_BANK_E0, baseport1 + WPC8769L_SELECT_REG);
+	outb(0, baseport1 + WPC8769L_CONFIG7_REG);
+
+	if (baseport2) {
+		/*
+		 * This has to do with wake-up support, which is
+		 * disabled when the second I/O range doesn't
+		 * exist.
+		 */
+		/* -- internal subroutine -- */
+		data = inb(baseport2 + WPC8769L_BANK2_CLOCK_REG);
+		data &= ~WPC8769L_CLOCK_OFF_MASK;
+		data |= WPC8769L_CLOCK_ON_MASK;
+		outb(data, baseport2 + WPC8769L_BANK2_CLOCK_REG);
+
+		data2 = inb(baseport2 + WPC8769L_WAKEUP_CONFIG3_REG);
+		a = (data2 >> WPC8769L_WAKEUP_CONFIG3_A_SHIFT)
+			& WPC8769L_WAKEUP_CONFIG3_A_MASK;
+		b = (data2 >> WPC8769L_WAKEUP_CONFIG3_B_SHIFT)
+			& WPC8769L_WAKEUP_CONFIG3_B_MASK;
+
+		data = inb(baseport2 + WPC8769L_BANK2_CLOCK_REG);
+		data &= ~WPC8769L_CLOCK_OFF_MASK;
+		data |= WPC8769L_CLOCK_ON_MASK;
+		outb(data, baseport2 + WPC8769L_BANK2_CLOCK_REG);
+
+		data2 &= ~WPC8769L_WAKEUP_CONFIG3_OFF_MASK;
+		data2 |= WPC8769L_WAKEUP_CONFIG3_ON_MASK;
+		outb(data2, baseport2 + WPC8769L_WAKEUP_CONFIG3_REG);
+		/* -- end internal subroutine -- */
+
+#ifdef LIRC_WPC8769L_WAKEUP
+		/* Call for setting wake up filters */
+		wpc8769l_configure_wakeup_triggers();
+#endif
+	} else {
+		/* No second port range. Take these defaults. */
+		a = (data_save & WPC8769L_WAKEUP_STATUS_LEG_MASK_A)
+			? 0 : 1;
+		b = (data_save & WPC8769L_WAKEUP_STATUS_LEG_MASK_B)
+			? 1 : 0;
+	}
+
+	outb(WPC8769L_BANK_EC, baseport1 + WPC8769L_SELECT_REG);
+	outb(WPC8769L_BANK_EC, baseport1 + WPC8769L_SELECT_REG);
+
+	data = inb(baseport1 + WPC8769L_CONFIG3_REG);
+	data = (a == 1)
+		? (data & ~WPC8769L_CONFIG3_MASK_1)
+		: (data | WPC8769L_CONFIG3_MASK_1);
+	outb(data, baseport1 + WPC8769L_CONFIG3_REG);
+
+	outb(WPC8769L_BANK_F4, baseport1 + WPC8769L_SELECT_REG);
+	outb(WPC8769L_BANK_F4, baseport1 + WPC8769L_SELECT_REG);
+
+	data = inb(baseport1 + WPC8769L_CONFIG2_REG);
+	data = (b == 0)
+		? (data & ~WPC8769L_CONFIG2_MASK_1)
+		: (data | WPC8769L_CONFIG2_MASK_1);
+	outb(data, baseport1 + WPC8769L_CONFIG2_REG);
+
+	outb(0, baseport1 + WPC8769L_CONFIG8_REG);
+
+	outb(0, baseport1 + WPC8769L_CONFIG9_REG);
+
+	outb(WPC8769L_BANK_00, baseport1 + WPC8769L_SELECT_REG);
+	outb(WPC8769L_BANK_00, baseport1 + WPC8769L_SELECT_REG);
+	outb(inb(baseport1 + WPC8769L_INTERRUPT_REG)
+		| WPC8769L_INTERRUPT_1_MASK,
+		baseport1 + WPC8769L_INTERRUPT_REG);
+
+	spin_unlock_irqrestore(&wpc8769l_hw_spinlock, flags);
+}
+
+/* Called when the device is opened. */
+static int set_use_inc(void *data)
+{
+	int result;
+
+	/* Reset pulse values. */
+	last_was_pulse = 0;
+	last_counter = 0;
+
+	/* Reset last timeout value. */
+	lastus = 0;
+
+	/* Init the read buffer. */
+	if (lirc_buffer_init(&rbuf, sizeof(lirc_t), RBUF_LEN) < 0)
+		return -ENOMEM;
+
+	/* Acquire the IRQ. */
+	result = request_irq(irq, irq_handler,
+			   IRQF_DISABLED | IRQF_SHARED,
+			   LIRC_DRIVER_NAME, THIS_MODULE);
+
+	switch (result) {
+	case -EBUSY:
+		eprintk("IRQ %d busy\n", irq);
+		lirc_buffer_free(&rbuf);
+		return -EBUSY;
+	case -EINVAL:
+		eprintk("Bad irq number or handler\n");
+		lirc_buffer_free(&rbuf);
+		return -EINVAL;
+	default:
+		dprintk("IRQ %d obtained.\n", irq);
+		break;
+	};
+
+	/* Mark the device as open. */
+	lirc_wpc8769l_is_open = 1;
+
+	/* Enable hardware interrupts. */
+	wpc8769l_enable_interrupts();
+
+	MOD_INC_USE_COUNT;
+	return 0;
+}
+
+/* Called when the device is released. */
+static void set_use_dec(void *data)
+{
+	/* Mark the device as closed. */
+	lirc_wpc8769l_is_open = 0;
+
+	/* Cancel the timeout if pending. */
+	del_timer_sync(&last_span_timer);
+
+	/* Disable the hardware interrupts. */
+	wpc8769l_disable_interrupts();
+
+	/* Free the IRQ. */
+	free_irq(irq, THIS_MODULE);
+	dprintk("Freed IRQ %d\n", irq);
+
+	/* Free the RX buffer. */
+	lirc_buffer_free(&rbuf);
+
+	MOD_DEC_USE_COUNT;
+}
+
+static struct lirc_driver driver = {
+	.name		= LIRC_DRIVER_NAME,
+	.minor		= -1,
+	.code_length	= 1,
+	.sample_rate	= 0,
+	.data		= NULL,
+	.add_to_buf	= NULL,
+	.get_queue	= NULL,
+	.rbuf		= &rbuf,
+	.set_use_inc	= set_use_inc,
+	.set_use_dec	= set_use_dec,
+	.fops		= NULL,
+	.dev		= NULL,
+	.owner		= THIS_MODULE,
+};
+
+static acpi_status wec_parse_resources(struct acpi_resource *resource,
+	void *context)
+{
+	if (resource->type == ACPI_RESOURCE_TYPE_IO) {
+		/* Read the two I/O ranges. */
+		if (!baseport1)
+			baseport1 = resource->data.io.minimum;
+		else if (!baseport2)
+			baseport2 = resource->data.io.minimum;
+	} else if (resource->type == ACPI_RESOURCE_TYPE_IRQ) {
+		/* Read the rx IRQ number. */
+		if (!irq)
+			irq = resource->data.irq.interrupts[0];
+	}
+	return AE_OK;
+}
+
+static acpi_status wec_parse_device(acpi_handle handle, u32 level,
+	void *context, void **return_value)
+{
+	acpi_status status;
+	iprintk("Found %s device via ACPI.\n", WPC8769L_ACPI_HID);
+
+	status = acpi_walk_resources(handle, METHOD_NAME__CRS,
+		wec_parse_resources, NULL);
+	if (ACPI_FAILURE(status))
+		return status;
+
+	return AE_OK;
+}
+
+/* Find the device I/O ranges and IRQ number by searching for the
+ * CIR ACPI entry. */
+static int wpc8769l_acpi_detect(void)
+{
+	acpi_status status;
+	status = acpi_get_devices(WPC8769L_ACPI_HID, wec_parse_device, NULL,
+		NULL);
+	if (ACPI_FAILURE(status))
+		return -ENOENT;
+	else
+		return 0;
+}
+
+#ifdef MODULE
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18)
+static struct platform_device *lirc_wpc8769l_platform_dev;
+
+static int __devinit lirc_wpc8769l_probe(struct platform_device *dev)
+{
+	return 0;
+}
+
+static int __devexit lirc_wpc8769l_remove(struct platform_device *dev)
+{
+	return 0;
+}
+
+static int lirc_wpc8769l_suspend(struct platform_device *dev,
+			       pm_message_t state)
+{
+	if (lirc_wpc8769l_is_open)
+		/* Disable all interrupts. */
+		wpc8769l_disable_interrupts();
+	return 0;
+}
+
+static int lirc_wpc8769l_resume(struct platform_device *dev)
+{
+	if (lirc_wpc8769l_is_open) {
+		/* Check if we caused resuming; we still do nothing about it. */
+		wpc8769l_power_up_and_check_if_we_woke_us_up();
+
+		/* Enable interrupts again. */
+		wpc8769l_enable_interrupts();
+	}
+	return 0;
+}
+
+static struct platform_driver lirc_wpc8769l_platform_driver = {
+	.probe		= lirc_wpc8769l_probe,
+	.remove		= __devexit_p(lirc_wpc8769l_remove),
+	.suspend	= lirc_wpc8769l_suspend,
+	.resume		= lirc_wpc8769l_resume,
+	.driver		= {
+		.name	= LIRC_DRIVER_NAME,
+		.owner	= THIS_MODULE,
+	},
+};
+
+static int __init lirc_wpc8769l_platform_init(void)
+{
+	int result;
+
+	result = platform_driver_register(&lirc_wpc8769l_platform_driver);
+	if (result) {
+		eprintk("Platform driver register returned %d.\n", result);
+		return result;
+	}
+
+	lirc_wpc8769l_platform_dev = platform_device_alloc(LIRC_DRIVER_NAME, 0);
+	if (!lirc_wpc8769l_platform_dev) {
+		result = -ENOMEM;
+		goto exit_driver_unregister;
+	}
+
+	result = platform_device_add(lirc_wpc8769l_platform_dev);
+	if (result)
+		goto exit_device_put;
+
+	return 0;
+
+exit_device_put:
+	platform_device_put(lirc_wpc8769l_platform_dev);
+
+exit_driver_unregister:
+	platform_driver_unregister(&lirc_wpc8769l_platform_driver);
+	return result;
+}
+
+static void __exit lirc_wpc8769l_platform_exit(void)
+{
+	platform_device_unregister(lirc_wpc8769l_platform_dev);
+	platform_driver_unregister(&lirc_wpc8769l_platform_driver);
+}
+#endif
+
+static int __init lirc_wpc8769l_module_init(void)
+{
+	int rc;
+
+	/* If needed, read the resource information for the ACPI device
+	 * description. */
+	if (!skip_probe) {
+		rc = wpc8769l_acpi_detect();
+		if (rc) {
+			eprintk("Error when looking for %s ACPI device.\n",
+				WPC8769L_ACPI_HID);
+			return rc;
+		}
+	}
+
+	/* Check that we got some resource info to work with. */
+	if (!baseport1 || !irq) {
+		rc = -ENODEV;
+		eprintk("Not all required resources found for %s device.\n",
+			LIRC_DRIVER_NAME);
+		return rc;
+	}
+
+	dprintk("%s device found to use 0x%04x, 0x%04x I/O bases, IRQ #%d.\n",
+		LIRC_DRIVER_NAME, baseport1, baseport2, irq);
+
+	/* Request the two I/O regions. */
+	wpc8769l_portblock1_resource = request_region(baseport1,
+		WPC8769L_IO_REGION_1_SIZE, LIRC_DRIVER_NAME);
+	if (!wpc8769l_portblock1_resource) {
+		rc = -EBUSY;
+		eprintk("Could not allocate I/O range at 0x%04x", baseport1);
+		return rc;
+	}
+	if (baseport2) {
+		wpc8769l_portblock2_resource = request_region(baseport2,
+			WPC8769L_IO_REGION_2_SIZE, LIRC_DRIVER_NAME);
+		if (!wpc8769l_portblock2_resource) {
+			rc = -EBUSY;
+			printk(KERN_ERR "Could not allocate I/O range "
+			       "at 0x%04x",
+				baseport2);
+			goto exit_release_region_1;
+		}
+	}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18)
+	/* Register the platform driver and device. */
+	rc = lirc_wpc8769l_platform_init();
+	if (rc)
+		goto exit_release_region_2;
+#endif
+
+	/* Prepare the hardware. */
+	wpc8769l_prepare_hardware();
+
+	/* Do load-time checks. */
+	wpc8769l_power_up_and_check_if_we_woke_us_up();
+
+	/* Configure the driver hooks. */
+	driver.features = LIRC_CAN_REC_MODE2;
+	driver.minor = lirc_register_driver(&driver);
+	if (driver.minor < 0) {
+		eprintk("lirc_register_driver failed!\n");
+		rc = -EIO;
+		goto exit_platform_exit;
+	}
+
+	iprintk("Driver loaded.\n");
+
+	return 0; /* Everything OK. */
+
+exit_platform_exit:
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18)
+	lirc_wpc8769l_platform_exit();
+
+exit_release_region_2:
+#endif
+	if (baseport2)
+		release_region(baseport2, WPC8769L_IO_REGION_2_SIZE);
+
+exit_release_region_1:
+	release_region(baseport1, WPC8769L_IO_REGION_1_SIZE);
+
+	return rc;
+}
+
+module_init(lirc_wpc8769l_module_init);
+
+static void __exit lirc_wpc8769l_module_exit(void)
+{
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18)
+	/* Unregister the platform driver and device. */
+	lirc_wpc8769l_platform_exit();
+#endif
+
+	/* Unregister the LIRC driver. */
+	lirc_unregister_driver(driver.minor);
+
+	/* Release the second range. */
+	if (baseport2)
+		release_region(baseport2, WPC8769L_IO_REGION_2_SIZE);
+
+	/* Release the first range. */
+	release_region(baseport1, WPC8769L_IO_REGION_1_SIZE);
+
+	iprintk("Driver unloaded.\n");
+}
+
+module_exit(lirc_wpc8769l_module_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Juan J. Garcia de Soria");
+MODULE_DESCRIPTION("Driver for the integrated Winbond WPC8769L-based IR\
+ receiver found in Acer laptops.");
+MODULE_VERSION("0.0");
+
+module_param(debug, bool, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(debug, "Enable debugging messages");
+
+module_param(baseport1, uint, S_IRUGO);
+MODULE_PARM_DESC(baseport1,
+	"First I/O range base address (default: ACPI autodetect).");
+
+module_param(baseport2, uint, S_IRUGO);
+MODULE_PARM_DESC(baseport2,
+	"Second I/O range base address (default: ACPI autodetect).");
+
+module_param(irq, uint, S_IRUGO);
+MODULE_PARM_DESC(irq, "IRQ number (default: ACPI autodetect).");
+
+module_param(skip_probe, bool, S_IRUGO);
+MODULE_PARM_DESC(skip_probe,
+	"Skip ACPI-based device detection \
+(default: false for ACPI autodetect).");
+
+#ifdef LIRC_WPC8769L_WAKEUP
+module_param(protocol_select, int, S_IRUGO);
+MODULE_PARM_DESC(protocol_select,
+	"Define the protocol for wake up functions (default: 2).");
+
+module_param(max_info_bits, int, S_IRUGO);
+MODULE_PARM_DESC(max_info_bits,
+	"Define the maximum info bits for wake up functions (default: 24).");
+
+module_param(rc_wakeup_code, uint, S_IRUGO);
+MODULE_PARM_DESC(rc_wakeup_code,
+	"Define the RC code value for wake up functions\
+ (default: 0x7ffffbf3).");
+
+module_param(rc_wakeup_mask, uint, S_IRUGO);
+MODULE_PARM_DESC(rc_wakeup_mask,
+	"Define the RC code mask for wake up functions (default: 0xff000fff).");
+#endif
+
+EXPORT_NO_SYMBOLS;
+
+#endif /* MODULE */
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_wpc8769l/Makefile
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_wpc8769l/Makefile
@@ -0,0 +1,3 @@
+EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)/..
+
+obj-$(CONFIG_LIRC_WPC8769l)	+= lirc_wpc8769l.o
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_wpc8769l/lirc_wpc8769l.h
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_wpc8769l/lirc_wpc8769l.h
@@ -0,0 +1,186 @@
+/*      $Id: lirc_wpc8769l.h,v 1.5 2009/06/15 15:11:39 jarodwilson Exp $      */
+
+/****************************************************************************
+ ** lirc_wpc8769l.h ****************************************************
+ ****************************************************************************
+ *
+ * lirc_wpc8769l - Device driver for the integrated CIR receiver found in
+ *                 Acer Aspire 6530G (and probably other models), based on
+ *                 the Winbond 8769L embedded controller.
+ *                 (Written using the lirc_serial driver as a guide).
+ *
+ * Copyright (C) 2008, 2009 Juan J. Garcia de Soria <skandalfo@gmail.com>
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+
+#include <linux/types.h>
+
+/* Name of the ACPI resource used to autodetect the receiver. */
+#define WPC8769L_ACPI_HID "WEC1020"
+
+/* Number of microseconds for a whole byte of samples. */
+/* This is assuming 20 kHz bit sampling frequency.     */
+#define WPC8769L_USECS_PER_BYTE 400
+
+/* Number of microseconds for a bit sample. */
+#define WPC8769L_USECS_PER_BIT (WPC8769L_USECS_PER_BYTE >> 3)
+
+/* Number of bytes in each data burst. */
+#define WPC8769L_BYTES_PER_BURST 14
+
+/* Number of 0xff bytes before reset. */
+#define WPC8769L_FF_BYTES_BEFORE_RESET 250
+
+/* Microseconds timeout for last part of code. */
+#define WPC8769L_LAST_TIMEOUT_JIFFIES (HZ / 20)
+
+/* Microseconds timeout for last part of code. */
+#define WPC8769L_LAST_TIMEOUT_JIFFIES (HZ / 20)
+
+/* Size of I/O region 1. */
+#define WPC8769L_IO_REGION_1_SIZE 0x08
+
+/* Size of I/O region 2. */
+#define WPC8769L_IO_REGION_2_SIZE 0x20
+
+/* Size of a byte array for a complete burst, rounded
+ * up to an integral number of unsigned longs. */
+#define WPC8769L_BYTE_BUFFER_SIZE \
+	(((WPC8769L_BYTES_PER_BURST + 1 + BITS_PER_LONG / 8 - 1) \
+	/ (BITS_PER_LONG / 8)) * (BITS_PER_LONG / 8))
+
+
+
+/* WPC8769L register set definitions. Note that these are all wild guesses.*/
+
+/* Registers for I/O range 1. */
+#define WPC8769L_SELECT_REG			0x03
+
+/*------------*/
+#define WPC8769L_BANK_00			0x00
+
+#define WPC8769L_DATA_REG			0x00
+
+#define WPC8769L_INTERRUPT_REG			0x01
+#define WPC8769L_INTERRUPT_1_MASK		0x01
+#define WPC8769L_INTERRUPT_2_MASK		0x01
+
+#define WPC8769L_DATA_STATUS_REG		0x02
+#define WPC8769L_DATA_READY_MASK		0x01
+#define WPC8769L_DATA_STATUS_MASK_1		0x02
+#define WPC8769L_DATA_STATUS_MASK_2		0xd0
+
+#define WPC8769L_CONFIG_REG			0x04
+#define WPC8769L_CONFIG_OFF_MASK		0xe0
+#define WPC8769L_CONFIG_ON_MASK			0xc0
+
+#define WPC8769L_DATA_ACK_REG			0x05
+#define WPC8769L_DATA_ACK_MASK			0x01
+
+#define WPC8769L_TIMEOUT_RESET_REG		0x07
+#define WPC8769L_TIMEOUT_RESET_MASK		0x20
+
+/*------------*/
+#define WPC8769L_BANK_E0			0xe0
+
+#define WPC8769L_CONFIG6_REG			0x00
+#define WPC8769L_CONFIG6_MASK			0x4b
+
+#define WPC8769L_CONFIG7_REG			0x01
+
+#define WPC8769L_HARDWARE_ENABLE1_REG		0x02
+#define WPC8769L_HARDWARE_ENABLE1_MASK		0x01
+
+#define WPC8769L_CONFIG5_REG			0x04
+#define WPC8769L_CONFIG5_ON_MASK		0x30
+
+#define WPC8769L_REMAINING_RX_DATA_REG		0x07
+
+/*------------*/
+#define WPC8769L_BANK_E4			0xe4
+
+#define WPC8769L_READ_ON_STARTUP_REG		0x00
+
+/*------------*/
+#define WPC8769L_BANK_EC			0xec
+
+#define WPC8769L_CONFIG3_REG			0x04
+#define WPC8769L_CONFIG3_ON_MASK		0x01
+#define WPC8769L_CONFIG3_MASK_1			0x10
+
+/*------------*/
+#define WPC8769L_BANK_F0			0xf0
+
+#define WPC8769L_WAKEUP_STATUS_LEG_REG		0x02
+#define WPC8769L_WAKEUP_STATUS_LEG_MASK		0x04
+#define WPC8769L_WAKEUP_STATUS_LEG_MASK_A	0x02
+#define WPC8769L_WAKEUP_STATUS_LEG_MASK_B	0x08
+
+/*------------*/
+#define WPC8769L_BANK_F4			0xf4
+
+#define WPC8769L_CONFIG9_REG			0x01
+
+#define WPC8769L_CONFIG4_REG			0x02
+#define WPC8769L_CONFIG4_AND_MASK		0x0f
+#define WPC8769L_CONFIG4_ON_MASK		0x50
+
+#define WPC8769L_CONFIG8_REG			0x04
+
+#define WPC8769L_CONFIG2_REG			0x07
+#define WPC8769L_CONFIG2_OFF_MASK		0x20
+#define WPC8769L_CONFIG2_MASK_1			0x10
+
+
+/* Registers for I/O range 2. */
+#define WPC8769L_WAKEUP_ACK_REG			0x00
+#define WPC8769L_WAKEUP_ACK_MASK		0x10
+
+#define WPC8769L_WAKEUP_ENABLE_REG		0x02
+#define WPC8769L_WAKEUP_ENABLE_MASK		0x10
+
+#define WPC8769L_BANK2_CLOCK_REG		0x04
+#define WPC8769L_CLOCK_OFF_MASK			0x02
+#define WPC8769L_CLOCK_ON_MASK			0x01
+
+#define WPC8769L_WAKEUP_CONFIG_REG		0x1a
+#define WPC8769L_WAKEUP_CONFIG_PRE_MASK		0x80
+#define WPC8769L_MAX_INFO_BITS_BIAS		0x0e
+#define WPC8769L_MAX_INFO_BITS_SHIFT		0x01
+
+#define WPC8769L_WAKEUP_CONFIG3_REG		0x13
+#define WPC8769L_WAKEUP_CONFIG3_OFF_MASK	0x10
+#define WPC8769L_WAKEUP_CONFIG3_ON_MASK		0x21
+#define WPC8769L_WAKEUP_CONFIG3_A_SHIFT		0x01
+#define WPC8769L_WAKEUP_CONFIG3_A_MASK		0x03
+#define WPC8769L_WAKEUP_CONFIG3_B_SHIFT		0x03
+#define WPC8769L_WAKEUP_CONFIG3_B_MASK		0x01
+
+#define WPC8769L_WAKEUP_STATUS_REG		0x14
+#define WPC8769L_WAKEUP_WOKE_UP_MASK		0x01
+#define WPC8769L_WAKEUP_CONFIGURING_MASK	0x17
+
+#define WPC8769L_WAKEUP_CONFIG2_REG		0x15
+#define WPC8769L_WAKEUP_CONFIG2_AND_MASK	0xf9
+#define WPC8769L_WAKEUP_CONFIG2_OR_MASK		0x01
+
+#define WPC8769L_WAKEUP_DATA_PTR_REG		0x18
+#define WPC8769L_WAKEUP_DATA_BITS		0x20
+#define WPC8769L_WAKEUP_DATA_BASE		0x10
+#define WPC8769L_WAKEUP_MASK_BASE		0x20
+
+#define WPC8769L_WAKEUP_DATA_REG		0x19
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_serial/lirc_serial.c
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_serial/lirc_serial.c
@@ -0,0 +1,1422 @@
+/*      $Id: lirc_serial.c,v 5.104 2009/03/15 09:34:00 lirc Exp $      */
+/*
+ * lirc_serial.c
+ *
+ * lirc_serial - Device driver that records pulse- and pause-lengths
+ *	       (space-lengths) between DDCD event on a serial port.
+ *
+ * Copyright (C) 1996,97 Ralph Metzler <rjkm@thp.uni-koeln.de>
+ * Copyright (C) 1998 Trent Piepho <xyzzy@u.washington.edu>
+ * Copyright (C) 1998 Ben Pfaff <blp@gnu.org>
+ * Copyright (C) 1999 Christoph Bartelmus <lirc@bartelmus.de>
+ * Copyright (C) 2007 Andrei Tanas <andrei@tanas.ca> (suspend/resume support)
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+
+/*
+ * Steve's changes to improve transmission fidelity:
+ *   - for systems with the rdtsc instruction and the clock counter, a
+ *     send_pule that times the pulses directly using the counter.
+ *     This means that the LIRC_SERIAL_TRANSMITTER_LATENCY fudge is
+ *     not needed. Measurement shows very stable waveform, even where
+ *     PCI activity slows the access to the UART, which trips up other
+ *     versions.
+ *   - For other system, non-integer-microsecond pulse/space lengths,
+ *     done using fixed point binary. So, much more accurate carrier
+ *     frequency.
+ *   - fine tuned transmitter latency, taking advantage of fractional
+ *     microseconds in previous change
+ *   - Fixed bug in the way transmitter latency was accounted for by
+ *     tuning the pulse lengths down - the send_pulse routine ignored
+ *     this overhead as it timed the overall pulse length - so the
+ *     pulse frequency was right but overall pulse length was too
+ *     long. Fixed by accounting for latency on each pulse/space
+ *     iteration.
+ *
+ * Steve Davies <steve@daviesfam.org>  July 2001
+ */
+
+#ifdef HAVE_CONFIG_H
+# include <config.h>
+#endif
+
+#include <linux/version.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 2, 18)
+#error "**********************************************************"
+#error " Sorry, this driver needs kernel version 2.2.18 or higher "
+#error "**********************************************************"
+#endif
+
+#include <linux/autoconf.h>
+
+#include <linux/module.h>
+#include <linux/errno.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/fs.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/kernel.h>
+#include <linux/major.h>
+#include <linux/serial_reg.h>
+#include <linux/time.h>
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/wait.h>
+#include <linux/mm.h>
+#include <linux/delay.h>
+#include <linux/poll.h>
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18)
+#include <linux/platform_device.h>
+#endif
+
+#include <asm/system.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18)
+#include <asm/uaccess.h>
+#else
+#include <linux/uaccess.h>
+#endif
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 16)
+#include <asm/io.h>
+#else
+#include <linux/io.h>
+#endif
+#include <linux/irq.h>
+#include <linux/fcntl.h>
+
+#if defined(LIRC_SERIAL_NSLU2)
+#include <asm/hardware.h>
+/* From Intel IXP42X Developer's Manual (#252480-005): */
+/* ftp://download.intel.com/design/network/manuals/25248005.pdf */
+#define UART_IE_IXP42X_UUE   0x40 /* IXP42X UART Unit enable */
+#define UART_IE_IXP42X_RTOIE 0x10 /* IXP42X Receiver Data Timeout int.enable */
+#ifndef NSLU2_LED_GRN_GPIO
+/* added in 2.6.22 */
+#define NSLU2_LED_GRN_GPIO NSLU2_LED_GRN
+#endif
+#endif
+
+#include "../lirc.h"
+#include "../kcompat.h"
+#include "../lirc_dev/lirc_dev.h"
+
+#if defined(LIRC_SERIAL_SOFTCARRIER) && !defined(LIRC_SERIAL_TRANSMITTER)
+#warning "Software carrier only affects transmitting"
+#endif
+
+#if defined(rdtscl)
+
+#define USE_RDTSC
+#warning "Note: using rdtsc instruction"
+#endif
+
+#ifdef LIRC_SERIAL_ANIMAX
+#ifdef LIRC_SERIAL_TRANSMITTER
+#warning "******************************************"
+#warning " This receiver does not have a	    "
+#warning " transmitter diode			"
+#warning "******************************************"
+#endif
+#endif
+
+#define LIRC_DRIVER_VERSION "$Revision: 5.104 $"
+#define LIRC_DRIVER_NAME "lirc_serial"
+
+struct lirc_serial {
+	int signal_pin;
+	int signal_pin_change;
+	int on;
+	int off;
+	long (*send_pulse)(unsigned long length);
+	void (*send_space)(long length);
+	int features;
+};
+
+#define LIRC_HOMEBREW		0
+#define LIRC_IRDEO		1
+#define LIRC_IRDEO_REMOTE	2
+#define LIRC_ANIMAX		3
+#define LIRC_IGOR		4
+#define LIRC_NSLU2		5
+
+#ifdef LIRC_SERIAL_IRDEO
+static int type = LIRC_IRDEO;
+#elif defined(LIRC_SERIAL_IRDEO_REMOTE)
+static int type = LIRC_IRDEO_REMOTE;
+#elif defined(LIRC_SERIAL_ANIMAX)
+static int type = LIRC_ANIMAX;
+#elif defined(LIRC_SERIAL_IGOR)
+static int type = LIRC_IGOR;
+#elif defined(LIRC_SERIAL_NSLU2)
+static int type = LIRC_NSLU2;
+#else
+static int type = LIRC_HOMEBREW;
+#endif
+
+/* Set defaults for NSLU2 */
+#if defined(LIRC_SERIAL_NSLU2)
+#ifndef LIRC_IRQ
+#define LIRC_IRQ IRQ_IXP4XX_UART2
+#endif
+#ifndef LIRC_PORT
+#define LIRC_PORT (IXP4XX_UART2_BASE_VIRT + REG_OFFSET)
+#endif
+#ifndef LIRC_IOMMAP
+#define LIRC_IOMMAP IXP4XX_UART2_BASE_PHYS
+#endif
+#ifndef LIRC_IOSHIFT
+#define LIRC_IOSHIFT 2
+#endif
+#ifndef LIRC_ALLOW_MMAPPED_IO
+#define LIRC_ALLOW_MMAPPED_IO
+#endif
+#endif
+
+#if defined(LIRC_ALLOW_MMAPPED_IO)
+#ifndef LIRC_IOMMAP
+#define LIRC_IOMMAP 0
+#endif
+#ifndef LIRC_IOSHIFT
+#define LIRC_IOSHIFT 0
+#endif
+static int iommap = LIRC_IOMMAP;
+static int ioshift = LIRC_IOSHIFT;
+#endif
+
+#ifdef LIRC_SERIAL_SOFTCARRIER
+static int softcarrier = 1;
+#else
+static int softcarrier;
+#endif
+
+static int share_irq;
+static int debug;
+
+#define dprintk(fmt, args...)					\
+	do {							\
+		if (debug)					\
+			printk(KERN_DEBUG LIRC_DRIVER_NAME ": "	\
+			       fmt, ## args);			\
+	} while (0)
+
+/* forward declarations */
+static long send_pulse_irdeo(unsigned long length);
+static long send_pulse_homebrew(unsigned long length);
+static void send_space_irdeo(long length);
+static void send_space_homebrew(long length);
+
+static struct lirc_serial hardware[] = {
+	[LIRC_HOMEBREW] = {
+		.signal_pin        = UART_MSR_DCD,
+		.signal_pin_change = UART_MSR_DDCD,
+		.on  = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
+		.off = (UART_MCR_RTS | UART_MCR_OUT2),
+		.send_pulse = send_pulse_homebrew,
+		.send_space = send_space_homebrew,
+#ifdef LIRC_SERIAL_TRANSMITTER
+		.features    = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
+				LIRC_CAN_SET_SEND_CARRIER |
+				LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
+#else
+		.features    = LIRC_CAN_REC_MODE2
+#endif
+	},
+
+	[LIRC_IRDEO] = {
+		.signal_pin        = UART_MSR_DSR,
+		.signal_pin_change = UART_MSR_DDSR,
+		.on  = UART_MCR_OUT2,
+		.off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
+		.send_pulse  = send_pulse_irdeo,
+		.send_space  = send_space_irdeo,
+		.features    = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
+				LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
+	},
+
+	[LIRC_IRDEO_REMOTE] = {
+		.signal_pin        = UART_MSR_DSR,
+		.signal_pin_change = UART_MSR_DDSR,
+		.on  = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
+		.off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
+		.send_pulse  = send_pulse_irdeo,
+		.send_space  = send_space_irdeo,
+		.features    = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
+				LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
+	},
+
+	[LIRC_ANIMAX] = {
+		.signal_pin        = UART_MSR_DCD,
+		.signal_pin_change = UART_MSR_DDCD,
+		.on  = 0,
+		.off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
+		.send_pulse = NULL,
+		.send_space = NULL,
+		.features   = LIRC_CAN_REC_MODE2
+	},
+
+	[LIRC_IGOR] = {
+		.signal_pin        = UART_MSR_DSR,
+		.signal_pin_change = UART_MSR_DDSR,
+		.on  = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
+		.off = (UART_MCR_RTS | UART_MCR_OUT2),
+		.send_pulse = send_pulse_homebrew,
+		.send_space = send_space_homebrew,
+#ifdef LIRC_SERIAL_TRANSMITTER
+		.features    = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
+				LIRC_CAN_SET_SEND_CARRIER |
+				LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
+#else
+		.features    = LIRC_CAN_REC_MODE2
+#endif
+	},
+
+#if defined(LIRC_SERIAL_NSLU2)
+	/*
+	 * Modified Linksys Network Storage Link USB 2.0 (NSLU2):
+	 * We receive on CTS of the 2nd serial port (R142,LHS), we
+	 * transmit with a IR diode between GPIO[1] (green status LED),
+	 * and ground (Matthias Goebl <matthias.goebl@goebl.net>).
+	 * See also http://www.nslu2-linux.org for this device
+	 */
+	[LIRC_NSLU2] = {
+		.signal_pin        = UART_MSR_CTS,
+		.signal_pin_change = UART_MSR_DCTS,
+		.on  = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
+		.off = (UART_MCR_RTS | UART_MCR_OUT2),
+		.send_pulse = send_pulse_homebrew,
+		.send_space = send_space_homebrew,
+#ifdef LIRC_SERIAL_TRANSMITTER
+		.features    = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
+				LIRC_CAN_SET_SEND_CARRIER |
+				LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
+#else
+		.features    = LIRC_CAN_REC_MODE2
+#endif
+	},
+#endif
+
+};
+
+#define RS_ISR_PASS_LIMIT 256
+
+/*
+ * A long pulse code from a remote might take up to 300 bytes.  The
+ * daemon should read the bytes as soon as they are generated, so take
+ * the number of keys you think you can push before the daemon runs
+ * and multiply by 300.  The driver will warn you if you overrun this
+ * buffer.  If you have a slow computer or non-busmastering IDE disks,
+ * maybe you will need to increase this.
+ */
+
+/* This MUST be a power of two!  It has to be larger than 1 as well. */
+
+#define RBUF_LEN 256
+#define WBUF_LEN 256
+
+static int sense = -1;	/* -1 = auto, 0 = active high, 1 = active low */
+static int txsense;     /* 0 = active high, 1 = active low */
+
+#ifndef LIRC_IRQ
+#define LIRC_IRQ 4
+#endif
+#ifndef LIRC_PORT
+#define LIRC_PORT 0x3f8
+#endif
+
+static int io = LIRC_PORT;
+static int irq = LIRC_IRQ;
+
+static struct timeval lasttv = {0, 0};
+
+static struct lirc_buffer rbuf;
+
+static lirc_t wbuf[WBUF_LEN];
+
+static unsigned int freq = 38000;
+static unsigned int duty_cycle = 50;
+
+/* Initialized in init_timing_params() */
+static unsigned long period;
+static unsigned long pulse_width;
+static unsigned long space_width;
+
+#if defined(__i386__)
+/*
+ * From:
+ * Linux I/O port programming mini-HOWTO
+ * Author: Riku Saikkonen <Riku.Saikkonen@hut.fi>
+ * v, 28 December 1997
+ *
+ * [...]
+ * Actually, a port I/O instruction on most ports in the 0-0x3ff range
+ * takes almost exactly 1 microsecond, so if you're, for example, using
+ * the parallel port directly, just do additional inb()s from that port
+ * to delay.
+ * [...]
+ */
+/* transmitter latency 1.5625us 0x1.90 - this figure arrived at from
+ * comment above plus trimming to match actual measured frequency.
+ * This will be sensitive to cpu speed, though hopefully most of the 1.5us
+ * is spent in the uart access.  Still - for reference test machine was a
+ * 1.13GHz Athlon system - Steve
+ */
+
+/*
+ * changed from 400 to 450 as this works better on slower machines;
+ * faster machines will use the rdtsc code anyway
+ */
+#define LIRC_SERIAL_TRANSMITTER_LATENCY 450
+
+#else
+
+/* does anybody have information on other platforms ? */
+/* 256 = 1<<8 */
+#define LIRC_SERIAL_TRANSMITTER_LATENCY 256
+
+#endif  /* __i386__ */
+
+static unsigned int sinp(int offset)
+{
+#if defined(LIRC_ALLOW_MMAPPED_IO)
+	if (iommap != 0) {
+		/* the register is memory-mapped */
+		offset <<= ioshift;
+		return readb(io + offset);
+	}
+#endif
+	return inb(io + offset);
+}
+
+static void soutp(int offset, int value)
+{
+#if defined(LIRC_ALLOW_MMAPPED_IO)
+	if (iommap != 0) {
+		/* the register is memory-mapped */
+		offset <<= ioshift;
+		writeb(value, io + offset);
+	}
+#endif
+	outb(value, io + offset);
+}
+
+static void on(void)
+{
+#if defined(LIRC_SERIAL_NSLU2)
+	/*
+	 * On NSLU2, we put the transmit diode between the output of the green
+	 * status LED and ground
+	 */
+	if (type == LIRC_NSLU2) {
+		gpio_line_set(NSLU2_LED_GRN_GPIO, IXP4XX_GPIO_LOW);
+		return;
+	}
+#endif
+	if (txsense)
+		soutp(UART_MCR, hardware[type].off);
+	else
+		soutp(UART_MCR, hardware[type].on);
+}
+
+static void off(void)
+{
+#if defined(LIRC_SERIAL_NSLU2)
+	if (type == LIRC_NSLU2) {
+		gpio_line_set(NSLU2_LED_GRN_GPIO, IXP4XX_GPIO_HIGH);
+		return;
+	}
+#endif
+	if (txsense)
+		soutp(UART_MCR, hardware[type].on);
+	else
+		soutp(UART_MCR, hardware[type].off);
+}
+
+#ifndef MAX_UDELAY_MS
+#define MAX_UDELAY_US 5000
+#else
+#define MAX_UDELAY_US (MAX_UDELAY_MS*1000)
+#endif
+
+static void safe_udelay(unsigned long usecs)
+{
+	while (usecs > MAX_UDELAY_US) {
+		udelay(MAX_UDELAY_US);
+		usecs -= MAX_UDELAY_US;
+	}
+	udelay(usecs);
+}
+
+#ifdef USE_RDTSC
+/*
+ * This is an overflow/precision juggle, complicated in that we can't
+ * do long long divide in the kernel
+ */
+
+/*
+ * When we use the rdtsc instruction to measure clocks, we keep the
+ * pulse and space widths as clock cycles.  As this is CPU speed
+ * dependent, the widths must be calculated in init_port and ioctl
+ * time
+ */
+
+/* So send_pulse can quickly convert microseconds to clocks */
+static unsigned long conv_us_to_clocks;
+
+static int init_timing_params(unsigned int new_duty_cycle,
+		unsigned int new_freq)
+{
+	unsigned long long loops_per_sec, work;
+
+	duty_cycle = new_duty_cycle;
+	freq = new_freq;
+
+	loops_per_sec = current_cpu_data.loops_per_jiffy;
+	loops_per_sec *= HZ;
+
+	/* How many clocks in a microsecond?, avoiding long long divide */
+	work = loops_per_sec;
+	work *= 4295;  /* 4295 = 2^32 / 1e6 */
+	conv_us_to_clocks = (work >> 32);
+
+	/*
+	 * Carrier period in clocks, approach good up to 32GHz clock,
+	 * gets carrier frequency within 8Hz
+	 */
+	period = loops_per_sec >> 3;
+	period /= (freq >> 3);
+
+	/* Derive pulse and space from the period */
+	pulse_width = period * duty_cycle / 100;
+	space_width = period - pulse_width;
+	dprintk("in init_timing_params, freq=%d, duty_cycle=%d, "
+		"clk/jiffy=%ld, pulse=%ld, space=%ld, "
+		"conv_us_to_clocks=%ld\n",
+		freq, duty_cycle, current_cpu_data.loops_per_jiffy,
+		pulse_width, space_width, conv_us_to_clocks);
+	return 0;
+}
+#else /* ! USE_RDTSC */
+static int init_timing_params(unsigned int new_duty_cycle,
+		unsigned int new_freq)
+{
+/*
+ * period, pulse/space width are kept with 8 binary places -
+ * IE multiplied by 256.
+ */
+	if (256 * 1000000L / new_freq * new_duty_cycle / 100 <=
+	    LIRC_SERIAL_TRANSMITTER_LATENCY)
+		return -EINVAL;
+	if (256 * 1000000L / new_freq * (100 - new_duty_cycle) / 100 <=
+	    LIRC_SERIAL_TRANSMITTER_LATENCY)
+		return -EINVAL;
+	duty_cycle = new_duty_cycle;
+	freq = new_freq;
+	period = 256 * 1000000L / freq;
+	pulse_width = period * duty_cycle / 100;
+	space_width = period - pulse_width;
+	dprintk("in init_timing_params, freq=%d pulse=%ld, "
+		"space=%ld\n", freq, pulse_width, space_width);
+	return 0;
+}
+#endif /* USE_RDTSC */
+
+
+/* return value: space length delta */
+
+static long send_pulse_irdeo(unsigned long length)
+{
+	long rawbits, ret;
+	int i;
+	unsigned char output;
+	unsigned char chunk, shifted;
+
+	/* how many bits have to be sent ? */
+	rawbits = length * 1152 / 10000;
+	if (duty_cycle > 50)
+		chunk = 3;
+	else
+		chunk = 1;
+	for (i = 0, output = 0x7f; rawbits > 0; rawbits -= 3) {
+		shifted = chunk << (i * 3);
+		shifted >>= 1;
+		output &= (~shifted);
+		i++;
+		if (i == 3) {
+			soutp(UART_TX, output);
+			while (!(sinp(UART_LSR) & UART_LSR_THRE))
+				;
+			output = 0x7f;
+			i = 0;
+		}
+	}
+	if (i != 0) {
+		soutp(UART_TX, output);
+		while (!(sinp(UART_LSR) & UART_LSR_TEMT))
+			;
+	}
+
+	if (i == 0)
+		ret = (-rawbits) * 10000 / 1152;
+	else
+		ret = (3 - i) * 3 *10000 / 1152 + (-rawbits) * 10000 / 1152;
+
+	return ret;
+}
+
+#ifdef USE_RDTSC
+/* Version that uses Pentium rdtsc instruction to measure clocks */
+
+/*
+ * This version does sub-microsecond timing using rdtsc instruction,
+ * and does away with the fudged LIRC_SERIAL_TRANSMITTER_LATENCY
+ * Implicitly i586 architecture...  - Steve
+ */
+
+static long send_pulse_homebrew_softcarrier(unsigned long length)
+{
+	int flag;
+	unsigned long target, start, now;
+
+	/* Get going quick as we can */
+	rdtscl(start);
+	on();
+	/* Convert length from microseconds to clocks */
+	length *= conv_us_to_clocks;
+	/* And loop till time is up - flipping at right intervals */
+	now = start;
+	target = pulse_width;
+	flag = 1;
+	while ((now - start) < length) {
+		/* Delay till flip time */
+		do {
+			rdtscl(now);
+		} while ((now - start) < target);
+
+		/* flip */
+		if (flag) {
+			rdtscl(now);
+			off();
+			target += space_width;
+		} else {
+			rdtscl(now); on();
+			target += pulse_width;
+		}
+		flag = !flag;
+	}
+	rdtscl(now);
+	return ((now - start) - length) / conv_us_to_clocks;
+}
+#else /* ! USE_RDTSC */
+/* Version using udelay() */
+
+/*
+ * here we use fixed point arithmetic, with 8
+ * fractional bits.  that gets us within 0.1% or so of the right average
+ * frequency, albeit with some jitter in pulse length - Steve
+ */
+
+/* To match 8 fractional bits used for pulse/space length */
+
+static long send_pulse_homebrew_softcarrier(unsigned long length)
+{
+	int flag;
+	unsigned long actual, target, d;
+	length <<= 8;
+
+	actual = 0; target = 0; flag = 0;
+	while (actual < length) {
+		if (flag) {
+			off();
+			target += space_width;
+		} else {
+			on();
+			target += pulse_width;
+		}
+		d = (target - actual -
+		     LIRC_SERIAL_TRANSMITTER_LATENCY + 128) >> 8;
+		/*
+		 * Note - we've checked in ioctl that the pulse/space
+		 * widths are big enough so that d is > 0
+		 */
+		udelay(d);
+		actual += (d << 8) + LIRC_SERIAL_TRANSMITTER_LATENCY;
+		flag = !flag;
+	}
+	return (actual-length) >> 8;
+}
+#endif /* USE_RDTSC */
+
+static long send_pulse_homebrew(unsigned long length)
+{
+	if (length <= 0)
+		return 0;
+
+	if (softcarrier)
+		return send_pulse_homebrew_softcarrier(length);
+	else {
+		on();
+		safe_udelay(length);
+		return 0;
+	}
+}
+
+static void send_space_irdeo(long length)
+{
+	if (length <= 0)
+		return;
+
+	safe_udelay(length);
+}
+
+static void send_space_homebrew(long length)
+{
+	off();
+	if (length <= 0)
+		return;
+	safe_udelay(length);
+}
+
+static void rbwrite(lirc_t l)
+{
+	if (lirc_buffer_full(&rbuf)) {
+		/* no new signals will be accepted */
+		dprintk("Buffer overrun\n");
+		return;
+	}
+	lirc_buffer_write(&rbuf, (void *)&l);
+}
+
+static void frbwrite(lirc_t l)
+{
+	/* simple noise filter */
+	static lirc_t pulse = 0L, space = 0L;
+	static unsigned int ptr;
+
+	if (ptr > 0 && (l & PULSE_BIT)) {
+		pulse += l & PULSE_MASK;
+		if (pulse > 250) {
+			rbwrite(space);
+			rbwrite(pulse | PULSE_BIT);
+			ptr = 0;
+			pulse = 0;
+		}
+		return;
+	}
+	if (!(l & PULSE_BIT)) {
+		if (ptr == 0) {
+			if (l > 20000) {
+				space = l;
+				ptr++;
+				return;
+			}
+		} else {
+			if (l > 20000) {
+				space += pulse;
+				if (space > PULSE_MASK)
+					space = PULSE_MASK;
+				space += l;
+				if (space > PULSE_MASK)
+					space = PULSE_MASK;
+				pulse = 0;
+				return;
+			}
+			rbwrite(space);
+			rbwrite(pulse | PULSE_BIT);
+			ptr = 0;
+			pulse = 0;
+		}
+	}
+	rbwrite(l);
+}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 19)
+static irqreturn_t irq_handler(int i, void *blah)
+#else
+static irqreturn_t irq_handler(int i, void *blah, struct pt_regs *regs)
+#endif
+{
+	struct timeval tv;
+	int status, counter, dcd;
+	long deltv;
+	lirc_t data;
+	static int last_dcd = -1;
+
+	if ((sinp(UART_IIR) & UART_IIR_NO_INT)) {
+		/* not our interrupt */
+		return IRQ_RETVAL(IRQ_NONE);
+	}
+
+	counter = 0;
+	do {
+		counter++;
+		status = sinp(UART_MSR);
+		if (counter > RS_ISR_PASS_LIMIT) {
+			printk(KERN_WARNING LIRC_DRIVER_NAME ": AIEEEE: "
+			       "We're caught!\n");
+			break;
+		}
+		if ((status & hardware[type].signal_pin_change)
+		    && sense != -1) {
+			/* get current time */
+			do_gettimeofday(&tv);
+
+			/* New mode, written by Trent Piepho
+			   <xyzzy@u.washington.edu>. */
+
+			/*
+			 * The old format was not very portable.
+			 * We now use an int to pass pulses
+			 * and spaces to user space.
+			 *
+			 * If PULSE_BIT is set a pulse has been
+			 * received, otherwise a space has been
+			 * received.  The driver needs to know if your
+			 * receiver is active high or active low, or
+			 * the space/pulse sense could be
+			 * inverted. The bits denoted by PULSE_MASK are
+			 * the length in microseconds. Lengths greater
+			 * than or equal to 16 seconds are clamped to
+			 * PULSE_MASK.  All other bits are unused.
+			 * This is a much simpler interface for user
+			 * programs, as well as eliminating "out of
+			 * phase" errors with space/pulse
+			 * autodetection.
+			 */
+
+			/* calc time since last interrupt in microseconds */
+			dcd = (status & hardware[type].signal_pin) ? 1 : 0;
+
+			if (dcd == last_dcd) {
+				printk(KERN_WARNING LIRC_DRIVER_NAME
+				": ignoring spike: %d %d %lx %lx %lx %lx\n",
+				dcd, sense,
+				tv.tv_sec, lasttv.tv_sec,
+				tv.tv_usec, lasttv.tv_usec);
+				continue;
+			}
+
+			deltv = tv.tv_sec-lasttv.tv_sec;
+			if (tv.tv_sec < lasttv.tv_sec ||
+			    (tv.tv_sec == lasttv.tv_sec &&
+			     tv.tv_usec < lasttv.tv_usec)) {
+				printk(KERN_WARNING LIRC_DRIVER_NAME
+				       ": AIEEEE: your clock just jumped "
+				       "backwards\n");
+				printk(KERN_WARNING LIRC_DRIVER_NAME
+				       ": %d %d %lx %lx %lx %lx\n",
+				       dcd, sense,
+				       tv.tv_sec, lasttv.tv_sec,
+				       tv.tv_usec, lasttv.tv_usec);
+				data = PULSE_MASK;
+			} else if (deltv > 15) {
+				data = PULSE_MASK; /* really long time */
+				if (!(dcd^sense)) {
+					/* sanity check */
+					printk(KERN_WARNING LIRC_DRIVER_NAME
+					       ": AIEEEE: "
+					       "%d %d %lx %lx %lx %lx\n",
+					       dcd, sense,
+					       tv.tv_sec, lasttv.tv_sec,
+					       tv.tv_usec, lasttv.tv_usec);
+					/*
+					 * detecting pulse while this
+					 * MUST be a space!
+					 */
+					sense = sense ? 0 : 1;
+				}
+			} else
+				data = (lirc_t) (deltv*1000000 +
+					       tv.tv_usec -
+					       lasttv.tv_usec);
+			frbwrite(dcd^sense ? data : (data|PULSE_BIT));
+			lasttv = tv;
+			last_dcd = dcd;
+			wake_up_interruptible(&rbuf.wait_poll);
+		}
+	} while (!(sinp(UART_IIR) & UART_IIR_NO_INT)); /* still pending ? */
+	return IRQ_RETVAL(IRQ_HANDLED);
+}
+
+static void hardware_init_port(void)
+{
+	unsigned long flags;
+	local_irq_save(flags);
+
+	/* Set DLAB 0. */
+	soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
+
+	/* First of all, disable all interrupts */
+	soutp(UART_IER, sinp(UART_IER) &
+	      (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
+
+	/* Clear registers. */
+	sinp(UART_LSR);
+	sinp(UART_RX);
+	sinp(UART_IIR);
+	sinp(UART_MSR);
+
+#if defined(LIRC_SERIAL_NSLU2)
+	if (type == LIRC_NSLU2) {
+		/* Setup NSLU2 UART */
+
+		/* Enable UART */
+		soutp(UART_IER, sinp(UART_IER) | UART_IE_IXP42X_UUE);
+		/* Disable Receiver data Time out interrupt */
+		soutp(UART_IER, sinp(UART_IER) & ~UART_IE_IXP42X_RTOIE);
+		/* set out2 = interrupt unmask; off() doesn't set MCR
+		   on NSLU2 */
+		soutp(UART_MCR, UART_MCR_RTS|UART_MCR_OUT2);
+	}
+#endif
+
+	/* Set line for power source */
+	off();
+
+	/* Clear registers again to be sure. */
+	sinp(UART_LSR);
+	sinp(UART_RX);
+	sinp(UART_IIR);
+	sinp(UART_MSR);
+
+	switch (type) {
+	case LIRC_IRDEO:
+	case LIRC_IRDEO_REMOTE:
+		/* setup port to 7N1 @ 115200 Baud */
+		/* 7N1+start = 9 bits at 115200 ~ 3 bits at 38kHz */
+
+		/* Set DLAB 1. */
+		soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB);
+		/* Set divisor to 1 => 115200 Baud */
+		soutp(UART_DLM, 0);
+		soutp(UART_DLL, 1);
+		/* Set DLAB 0 +  7N1 */
+		soutp(UART_LCR, UART_LCR_WLEN7);
+		/* THR interrupt already disabled at this point */
+		break;
+	default:
+		break;
+	}
+
+	local_irq_restore(flags);
+}
+
+static int init_port(void)
+{
+	int i, nlow, nhigh;
+
+	/* Reserve io region. */
+#if defined(LIRC_ALLOW_MMAPPED_IO)
+	/*
+	 * Future MMAP-Developers: Attention!
+	 * For memory mapped I/O you *might* need to use ioremap() first,
+	 * for the NSLU2 it's done in boot code.
+	 */
+	if (((iommap != 0)
+	     && (request_mem_region(iommap, 8 << ioshift,
+				    LIRC_DRIVER_NAME) == NULL))
+	   || ((iommap == 0)
+	       && (request_region(io, 8, LIRC_DRIVER_NAME) == NULL))) {
+#else
+	if (request_region(io, 8, LIRC_DRIVER_NAME) == NULL) {
+#endif
+		printk(KERN_ERR  LIRC_DRIVER_NAME
+		       ": port %04x already in use\n", io);
+		printk(KERN_WARNING LIRC_DRIVER_NAME
+		       ": use 'setserial /dev/ttySX uart none'\n");
+		printk(KERN_WARNING LIRC_DRIVER_NAME
+		       ": or compile the serial port driver as module and\n");
+		printk(KERN_WARNING LIRC_DRIVER_NAME
+		       ": make sure this module is loaded first\n");
+		return -EBUSY;
+	}
+
+	hardware_init_port();
+
+	/* Initialize pulse/space widths */
+	init_timing_params(duty_cycle, freq);
+
+	/* If pin is high, then this must be an active low receiver. */
+	if (sense == -1) {
+		/* wait 1/2 sec for the power supply */
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 11)
+		msleep(500);
+#else
+		set_current_state(TASK_INTERRUPTIBLE);
+		schedule_timeout(HZ/2);
+#endif
+
+		/*
+		 * probe 9 times every 0.04s, collect "votes" for
+		 * active high/low
+		 */
+		nlow = 0;
+		nhigh = 0;
+		for (i = 0; i < 9; i++) {
+			if (sinp(UART_MSR) & hardware[type].signal_pin)
+				nlow++;
+			else
+				nhigh++;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 11)
+			msleep(40);
+#else
+			schedule_timeout(HZ/25);
+#endif
+		}
+		sense = (nlow >= nhigh ? 1 : 0);
+		printk(KERN_INFO  LIRC_DRIVER_NAME  ": auto-detected active "
+		       "%s receiver\n", sense ? "low" : "high");
+	} else
+		printk(KERN_INFO  LIRC_DRIVER_NAME  ": Manually using active "
+		       "%s receiver\n", sense ? "low" : "high");
+
+	return 0;
+}
+
+static int set_use_inc(void *data)
+{
+	int result;
+	unsigned long flags;
+
+	/* Init read buffer. */
+	if (lirc_buffer_init(&rbuf, sizeof(lirc_t), RBUF_LEN) < 0)
+		return -ENOMEM;
+
+	/* initialize timestamp */
+	do_gettimeofday(&lasttv);
+
+	result = request_irq(irq, irq_handler,
+			     IRQF_DISABLED | (share_irq ? IRQF_SHARED : 0),
+			     LIRC_DRIVER_NAME, (void *)&hardware);
+
+	switch (result) {
+	case -EBUSY:
+		printk(KERN_ERR LIRC_DRIVER_NAME ": IRQ %d busy\n", irq);
+		lirc_buffer_free(&rbuf);
+		return -EBUSY;
+	case -EINVAL:
+		printk(KERN_ERR LIRC_DRIVER_NAME
+		       ": Bad irq number or handler\n");
+		lirc_buffer_free(&rbuf);
+		return -EINVAL;
+	default:
+		dprintk("Interrupt %d, port %04x obtained\n", irq, io);
+		break;
+	};
+
+	local_irq_save(flags);
+
+	/* Set DLAB 0. */
+	soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
+
+	soutp(UART_IER, sinp(UART_IER)|UART_IER_MSI);
+
+	local_irq_restore(flags);
+
+	MOD_INC_USE_COUNT;
+	return 0;
+}
+
+static void set_use_dec(void *data)
+{	unsigned long flags;
+
+	local_irq_save(flags);
+
+	/* Set DLAB 0. */
+	soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
+
+	/* First of all, disable all interrupts */
+	soutp(UART_IER, sinp(UART_IER) &
+	      (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
+	local_irq_restore(flags);
+
+	free_irq(irq, (void *)&hardware);
+
+	dprintk("freed IRQ %d\n", irq);
+	lirc_buffer_free(&rbuf);
+
+	MOD_DEC_USE_COUNT;
+}
+
+static ssize_t lirc_write(struct file *file, const char *buf,
+			 size_t n, loff_t *ppos)
+{
+	int i, count;
+	unsigned long flags;
+	long delta = 0;
+
+	if (!(hardware[type].features&LIRC_CAN_SEND_PULSE))
+		return -EBADF;
+
+	if (n % sizeof(lirc_t))
+		return -EINVAL;
+	count = n / sizeof(lirc_t);
+	if (count > WBUF_LEN || count % 2 == 0)
+		return -EINVAL;
+	if (copy_from_user(wbuf, buf, n))
+		return -EFAULT;
+	local_irq_save(flags);
+	if (type == LIRC_IRDEO) {
+		/* DTR, RTS down */
+		on();
+	}
+	for (i = 0; i < count; i++) {
+		if (i%2)
+			hardware[type].send_space(wbuf[i]-delta);
+		else
+			delta = hardware[type].send_pulse(wbuf[i]);
+	}
+	off();
+	local_irq_restore(flags);
+	return n;
+}
+
+static int lirc_ioctl(struct inode *node, struct file *filep, unsigned int cmd,
+		      unsigned long arg)
+{
+	int result;
+	unsigned long value;
+	unsigned int ivalue;
+
+	switch (cmd) {
+	case LIRC_GET_SEND_MODE:
+		if (!(hardware[type].features&LIRC_CAN_SEND_MASK))
+			return -ENOIOCTLCMD;
+
+		result = put_user(LIRC_SEND2MODE
+				  (hardware[type].features&LIRC_CAN_SEND_MASK),
+				  (unsigned long *) arg);
+		if (result)
+			return result;
+		break;
+
+	case LIRC_SET_SEND_MODE:
+		if (!(hardware[type].features&LIRC_CAN_SEND_MASK))
+			return -ENOIOCTLCMD;
+
+		result = get_user(value, (unsigned long *) arg);
+		if (result)
+			return result;
+		/* only LIRC_MODE_PULSE supported */
+		if (value != LIRC_MODE_PULSE)
+			return -ENOSYS;
+		break;
+
+	case LIRC_GET_LENGTH:
+		return -ENOSYS;
+		break;
+
+	case LIRC_SET_SEND_DUTY_CYCLE:
+		dprintk("SET_SEND_DUTY_CYCLE\n");
+		if (!(hardware[type].features&LIRC_CAN_SET_SEND_DUTY_CYCLE))
+			return -ENOIOCTLCMD;
+
+		result = get_user(ivalue, (unsigned int *) arg);
+		if (result)
+			return result;
+		if (ivalue <= 0 || ivalue > 100)
+			return -EINVAL;
+		return init_timing_params(ivalue, freq);
+		break;
+
+	case LIRC_SET_SEND_CARRIER:
+		dprintk("SET_SEND_CARRIER\n");
+		if (!(hardware[type].features&LIRC_CAN_SET_SEND_CARRIER))
+			return -ENOIOCTLCMD;
+
+		result = get_user(ivalue, (unsigned int *) arg);
+		if (result)
+			return result;
+		if (ivalue > 500000 || ivalue < 20000)
+			return -EINVAL;
+		return init_timing_params(duty_cycle, ivalue);
+		break;
+
+	default:
+		return -ENOIOCTLCMD;
+	}
+	return 0;
+}
+
+static struct file_operations lirc_fops = {
+	.owner	= THIS_MODULE,
+	.write	= lirc_write,
+	.ioctl	= lirc_ioctl,
+};
+
+static struct lirc_driver driver = {
+	.name		= LIRC_DRIVER_NAME,
+	.minor		= -1,
+	.code_length	= 1,
+	.sample_rate	= 0,
+	.data		= NULL,
+	.add_to_buf	= NULL,
+#ifndef LIRC_REMOVE_DURING_EXPORT
+	.get_queue	= NULL,
+#endif
+	.rbuf		= &rbuf,
+	.set_use_inc	= set_use_inc,
+	.set_use_dec	= set_use_dec,
+	.fops		= &lirc_fops,
+	.dev		= NULL,
+	.owner		= THIS_MODULE,
+};
+
+#ifdef MODULE
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18)
+static struct platform_device *lirc_serial_dev;
+
+static int __devinit lirc_serial_probe(struct platform_device *dev)
+{
+	return 0;
+}
+
+static int __devexit lirc_serial_remove(struct platform_device *dev)
+{
+	return 0;
+}
+
+static int lirc_serial_suspend(struct platform_device *dev,
+			       pm_message_t state)
+{
+	/* Set DLAB 0. */
+	soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
+
+	/* Disable all interrupts */
+	soutp(UART_IER, sinp(UART_IER) &
+	      (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
+
+	/* Clear registers. */
+	sinp(UART_LSR);
+	sinp(UART_RX);
+	sinp(UART_IIR);
+	sinp(UART_MSR);
+
+	return 0;
+}
+
+static int lirc_serial_resume(struct platform_device *dev)
+{
+	unsigned long flags;
+
+	hardware_init_port();
+
+	local_irq_save(flags);
+	/* Enable Interrupt */
+	do_gettimeofday(&lasttv);
+	soutp(UART_IER, sinp(UART_IER)|UART_IER_MSI);
+	off();
+
+	lirc_buffer_clear(&rbuf);
+
+	local_irq_restore(flags);
+
+	return 0;
+}
+
+static struct platform_driver lirc_serial_driver = {
+	.probe		= lirc_serial_probe,
+	.remove		= __devexit_p(lirc_serial_remove),
+	.suspend	= lirc_serial_suspend,
+	.resume		= lirc_serial_resume,
+	.driver		= {
+		.name	= "lirc_serial",
+		.owner	= THIS_MODULE,
+	},
+};
+
+static int __init lirc_serial_init(void)
+{
+	int result;
+
+	result = platform_driver_register(&lirc_serial_driver);
+	if (result) {
+		printk("lirc register returned %d\n", result);
+		return result;
+	}
+
+	lirc_serial_dev = platform_device_alloc("lirc_serial", 0);
+	if (!lirc_serial_dev) {
+		result = -ENOMEM;
+		goto exit_driver_unregister;
+	}
+
+	result = platform_device_add(lirc_serial_dev);
+	if (result)
+		goto exit_device_put;
+
+	return 0;
+
+exit_device_put:
+	platform_device_put(lirc_serial_dev);
+exit_driver_unregister:
+	platform_driver_unregister(&lirc_serial_driver);
+	return result;
+}
+
+static void __exit lirc_serial_exit(void)
+{
+	platform_device_unregister(lirc_serial_dev);
+	platform_driver_unregister(&lirc_serial_driver);
+}
+#endif
+
+static int __init lirc_serial_init_module(void)
+{
+	int result;
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18)
+	result = lirc_serial_init();
+	if (result)
+		return result;
+#endif
+	switch (type) {
+	case LIRC_HOMEBREW:
+	case LIRC_IRDEO:
+	case LIRC_IRDEO_REMOTE:
+	case LIRC_ANIMAX:
+	case LIRC_IGOR:
+#if defined(LIRC_SERIAL_NSLU2)
+	case LIRC_NSLU2:
+#endif
+		break;
+	default:
+		result = -EINVAL;
+		goto exit_serial_exit;
+	}
+	if (!softcarrier) {
+		switch (type) {
+		case LIRC_HOMEBREW:
+		case LIRC_IGOR:
+		case LIRC_NSLU2:
+			hardware[type].features &=
+				~(LIRC_CAN_SET_SEND_DUTY_CYCLE|
+				  LIRC_CAN_SET_SEND_CARRIER);
+			break;
+		}
+	}
+
+	result = init_port();
+	if (result < 0)
+		goto exit_serial_exit;
+	driver.features = hardware[type].features;
+	driver.minor = lirc_register_driver(&driver);
+	if (driver.minor < 0) {
+		printk(KERN_ERR  LIRC_DRIVER_NAME
+		       ": register_chrdev failed!\n");
+		result = -EIO;
+		goto exit_release;
+	}
+
+	printk(KERN_INFO
+	       LIRC_DRIVER_NAME " " LIRC_DRIVER_VERSION " registered\n");
+	dprintk("type = %d\n", type);
+	dprintk("IRQ = %d, port = %04x\n", irq, io);
+	dprintk("share_irq = %d\n", share_irq);
+#ifdef LIRC_SERIAL_TRANSMITTER
+	dprintk("txsense = %d\n", txsense);
+#endif
+	dprintk("softcarrier = %d\n", softcarrier);
+
+	return 0;
+exit_release:
+	release_region(io, 8);
+exit_serial_exit:
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18)
+	lirc_serial_exit();
+#endif
+	return result;
+}
+
+static void __exit lirc_serial_exit_module(void)
+{
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18)
+	lirc_serial_exit();
+#endif
+#if defined(LIRC_ALLOW_MMAPPED_IO)
+	if (iommap != 0)
+		release_mem_region(iommap, 8 << ioshift);
+	else
+		release_region(io, 8);
+#else
+	release_region(io, 8);
+#endif
+	lirc_unregister_driver(driver.minor);
+	dprintk("cleaned up module\n");
+}
+
+
+module_init(lirc_serial_init_module);
+module_exit(lirc_serial_exit_module);
+
+MODULE_DESCRIPTION("Infra-red receiver driver for serial ports.");
+MODULE_AUTHOR("Ralph Metzler, Trent Piepho, Ben Pfaff, "
+	      "Christoph Bartelmus, Andrei Tanas");
+MODULE_LICENSE("GPL");
+
+module_param(type, int, S_IRUGO);
+#if defined(LIRC_SERIAL_NSLU2)
+MODULE_PARM_DESC(type, "Hardware type (0 = home-brew, 1 = IRdeo,"
+		 " 2 = IRdeo Remote, 3 = AnimaX, 4 = IgorPlug,"
+		 " 5 = NSLU2 RX:CTS2/TX:GreenLED)");
+#else
+MODULE_PARM_DESC(type, "Hardware type (0 = home-brew, 1 = IRdeo,"
+		 " 2 = IRdeo Remote, 3 = AnimaX, 4 = IgorPlug)");
+#endif
+
+module_param(io, int, S_IRUGO);
+MODULE_PARM_DESC(io, "I/O address base (0x3f8 or 0x2f8)");
+
+#if defined(LIRC_ALLOW_MMAPPED_IO)
+/* some architectures (e.g. intel xscale) have memory mapped registers */
+module_param(iommap, bool, S_IRUGO);
+MODULE_PARM_DESC(iommap, "physical base for memory mapped I/O"
+		" (0 = no memory mapped io)");
+
+/*
+ * some architectures (e.g. intel xscale) align the 8bit serial registers
+ * on 32bit word boundaries.
+ * See linux-kernel/serial/8250.c serial_in()/out()
+ */
+module_param(ioshift, int, S_IRUGO);
+MODULE_PARM_DESC(ioshift, "shift I/O register offset (0 = no shift)");
+#endif
+
+module_param(irq, int, S_IRUGO);
+MODULE_PARM_DESC(irq, "Interrupt (4 or 3)");
+
+module_param(share_irq, bool, S_IRUGO);
+MODULE_PARM_DESC(share_irq, "Share interrupts (0 = off, 1 = on)");
+
+module_param(sense, bool, S_IRUGO);
+MODULE_PARM_DESC(sense, "Override autodetection of IR receiver circuit"
+		 " (0 = active high, 1 = active low )");
+
+#ifdef LIRC_SERIAL_TRANSMITTER
+module_param(txsense, bool, S_IRUGO);
+MODULE_PARM_DESC(txsense, "Sense of transmitter circuit"
+		 " (0 = active high, 1 = active low )");
+#endif
+
+module_param(softcarrier, bool, S_IRUGO);
+MODULE_PARM_DESC(softcarrier, "Software carrier (0 = off, 1 = on)");
+
+module_param(debug, bool, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(debug, "Enable debugging messages");
+
+EXPORT_NO_SYMBOLS;
+
+#endif /* MODULE */
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_serial/Makefile
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_serial/Makefile
@@ -0,0 +1,3 @@
+EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)/..
+
+obj-$(CONFIG_LIRC_SERIAL)	+= lirc_serial.o
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_streamzap/lirc_streamzap.c
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_streamzap/lirc_streamzap.c
@@ -0,0 +1,889 @@
+/*      $Id: lirc_streamzap.c,v 1.48 2009/03/15 09:34:00 lirc Exp $      */
+/*
+ * Streamzap Remote Control driver
+ *
+ * Copyright (c) 2005 Christoph Bartelmus <lirc@bartelmus.de>
+ *
+ * This driver was based on the work of Greg Wickham and Adrian
+ * Dewhurst. It was substantially rewritten to support correct signal
+ * gaps and now maintains a delay buffer, which is used to present
+ * consistent timing behaviour to user space applications. Without the
+ * delay buffer an ugly hack would be required in lircd, which can
+ * cause sluggish signal decoding in certain situations.
+ *
+ * This driver is based on the USB skeleton driver packaged with the
+ * kernel; copyright (C) 2001-2003 Greg Kroah-Hartman (greg@kroah.com)
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/version.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 4, 0)
+#error "*******************************************************"
+#error "Sorry, this driver needs kernel version 2.4.0 or higher"
+#error "*******************************************************"
+#endif
+#include <linux/autoconf.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/module.h>
+#include <linux/smp_lock.h>
+#include <linux/completion.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18)
+#include <asm/uaccess.h>
+#else
+#include <linux/uaccess.h>
+#endif
+#include <linux/usb.h>
+
+#include "../lirc.h"
+#include "../kcompat.h"
+#include "../lirc_dev/lirc_dev.h"
+
+#define DRIVER_VERSION	"$Revision: 1.48 $"
+#define DRIVER_NAME	"lirc_streamzap"
+#define DRIVER_DESC	"Streamzap Remote Control driver"
+
+static int debug;
+
+#define USB_STREAMZAP_VENDOR_ID		0x0e9c
+#define USB_STREAMZAP_PRODUCT_ID	0x0000
+
+/* Use our own dbg macro */
+#define dprintk(fmt, args...)					\
+	do {							\
+		if (debug)					\
+			printk(KERN_DEBUG DRIVER_NAME "[%d]: "	\
+			       fmt "\n", ## args);		\
+	} while (0)
+
+/* table of devices that work with this driver */
+static struct usb_device_id streamzap_table[] = {
+	/* Streamzap Remote Control */
+	{ USB_DEVICE(USB_STREAMZAP_VENDOR_ID, USB_STREAMZAP_PRODUCT_ID) },
+	/* Terminating entry */
+	{ }
+};
+
+MODULE_DEVICE_TABLE(usb, streamzap_table);
+
+#define STREAMZAP_PULSE_MASK 0xf0
+#define STREAMZAP_SPACE_MASK 0x0f
+#define STREAMZAP_RESOLUTION 256
+
+/* number of samples buffered */
+#define STREAMZAP_BUFFER_SIZE 128
+
+enum StreamzapDecoderState {
+	PulseSpace,
+	FullPulse,
+	FullSpace,
+	IgnorePulse
+};
+
+/* Structure to hold all of our device specific stuff
+ *
+ * some remarks regarding locking:
+ * theoretically this struct can be accessed from three threads:
+ *
+ * - from lirc_dev through set_use_inc/set_use_dec
+ *
+ * - from the USB layer throuh probe/disconnect/irq
+ *
+ *   Careful placement of lirc_register_driver/lirc_unregister_driver
+ *   calls will prevent conflicts. lirc_dev makes sure that
+ *   set_use_inc/set_use_dec are not being executed and will not be
+ *   called after lirc_unregister_driver returns.
+ *
+ * - by the timer callback
+ *
+ *   The timer is only running when the device is connected and the
+ *   LIRC device is open. Making sure the timer is deleted by
+ *   set_use_dec will make conflicts impossible.
+ */
+struct usb_streamzap {
+
+	/* usb */
+	/* save off the usb device pointer */
+	struct usb_device	*udev;
+	/* the interface for this device */
+	struct usb_interface	*interface;
+
+	/* buffer & dma */
+	unsigned char		*buf_in;
+	dma_addr_t		dma_in;
+	unsigned int		buf_in_len;
+
+	struct usb_endpoint_descriptor *endpoint;
+
+	/* IRQ */
+	struct urb		*urb_in;
+
+	/* lirc */
+	struct lirc_driver	driver;
+	struct lirc_buffer	delay_buf;
+	struct lirc_buffer	lirc_buf;
+
+	/* timer used to support delay buffering */
+	struct timer_list	delay_timer;
+	int			timer_running;
+	spinlock_t		timer_lock;
+
+	/* tracks whether we are currently receiving some signal */
+	int			idle;
+	/* sum of signal lengths received since signal start */
+	unsigned long		sum;
+	/* start time of signal; necessary for gap tracking */
+	struct timeval		signal_last;
+	struct timeval		signal_start;
+	enum StreamzapDecoderState decoder_state;
+	struct timer_list	flush_timer;
+	int			flush;
+	int			in_use;
+};
+
+
+/* local function prototypes */
+#ifdef KERNEL_2_5
+static int streamzap_probe(struct usb_interface *interface,
+			   const struct usb_device_id *id);
+static void streamzap_disconnect(struct usb_interface *interface);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19)
+static void usb_streamzap_irq(struct urb *urb, struct pt_regs *regs);
+#else
+static void usb_streamzap_irq(struct urb *urb);
+#endif
+#else
+static void *streamzap_probe(struct usb_device *udev, unsigned int ifnum,
+			     const struct usb_device_id *id);
+static void streamzap_disconnect(struct usb_device *dev, void *ptr);
+static void usb_streamzap_irq(struct urb *urb);
+#endif
+static int streamzap_use_inc(void *data);
+static void streamzap_use_dec(void *data);
+static int streamzap_ioctl(struct inode *node, struct file *filep,
+			   unsigned int cmd, unsigned long arg);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 0)
+static int streamzap_suspend(struct usb_interface *intf, pm_message_t message);
+static int streamzap_resume(struct usb_interface *intf);
+#endif
+
+/* usb specific object needed to register this driver with the usb subsystem */
+
+static struct usb_driver streamzap_driver = {
+	LIRC_THIS_MODULE(.owner = THIS_MODULE)
+	.name =		DRIVER_NAME,
+	.probe =	streamzap_probe,
+	.disconnect =	streamzap_disconnect,
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 0)
+	.suspend =	streamzap_suspend,
+	.resume =	streamzap_resume,
+#endif
+	.id_table =	streamzap_table,
+};
+
+static void stop_timer(struct usb_streamzap *sz)
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&sz->timer_lock, flags);
+	if (sz->timer_running) {
+		sz->timer_running = 0;
+		spin_unlock_irqrestore(&sz->timer_lock, flags);
+		del_timer_sync(&sz->delay_timer);
+	} else {
+		spin_unlock_irqrestore(&sz->timer_lock, flags);
+	}
+}
+
+static void flush_timeout(unsigned long arg)
+{
+	struct usb_streamzap *sz = (struct usb_streamzap *) arg;
+
+	/* finally start accepting data */
+	sz->flush = 0;
+}
+static void delay_timeout(unsigned long arg)
+{
+	unsigned long flags;
+	/* deliver data every 10 ms */
+	static unsigned long timer_inc =
+		(10000/(1000000/HZ)) == 0 ? 1 : (10000/(1000000/HZ));
+	struct usb_streamzap *sz = (struct usb_streamzap *) arg;
+	lirc_t data;
+
+	spin_lock_irqsave(&sz->timer_lock, flags);
+
+	if (!lirc_buffer_empty(&sz->delay_buf) &&
+	    !lirc_buffer_full(&sz->lirc_buf)) {
+		lirc_buffer_read(&sz->delay_buf, (unsigned char *) &data);
+		lirc_buffer_write(&sz->lirc_buf, (unsigned char *) &data);
+	}
+	if (!lirc_buffer_empty(&sz->delay_buf)) {
+		while (lirc_buffer_available(&sz->delay_buf) <
+		      STREAMZAP_BUFFER_SIZE/2 &&
+		      !lirc_buffer_full(&sz->lirc_buf)) {
+			lirc_buffer_read(&sz->delay_buf,
+					 (unsigned char *) &data);
+			lirc_buffer_write(&sz->lirc_buf,
+					  (unsigned char *) &data);
+		}
+		if (sz->timer_running) {
+			sz->delay_timer.expires = jiffies + timer_inc;
+			add_timer(&sz->delay_timer);
+		}
+	} else {
+		sz->timer_running = 0;
+	}
+
+	if (!lirc_buffer_empty(&sz->lirc_buf))
+		wake_up(&sz->lirc_buf.wait_poll);
+
+	spin_unlock_irqrestore(&sz->timer_lock, flags);
+}
+
+static void flush_delay_buffer(struct usb_streamzap *sz)
+{
+	lirc_t data;
+	int empty = 1;
+
+	while (!lirc_buffer_empty(&sz->delay_buf)) {
+		empty = 0;
+		lirc_buffer_read(&sz->delay_buf, (unsigned char *) &data);
+		if (!lirc_buffer_full(&sz->lirc_buf)) {
+			lirc_buffer_write(&sz->lirc_buf,
+					    (unsigned char *) &data);
+		} else {
+			dprintk("buffer overflow", sz->driver.minor);
+		}
+	}
+	if (!empty)
+		wake_up(&sz->lirc_buf.wait_poll);
+}
+
+static void push(struct usb_streamzap *sz, unsigned char *data)
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&sz->timer_lock, flags);
+	if (lirc_buffer_full(&sz->delay_buf)) {
+		lirc_t data;
+
+		lirc_buffer_read(&sz->delay_buf, (unsigned char *) &data);
+		if (!lirc_buffer_full(&sz->lirc_buf)) {
+			lirc_buffer_write(&sz->lirc_buf,
+					  (unsigned char *) &data);
+		} else {
+			dprintk("buffer overflow", sz->driver.minor);
+		}
+	}
+
+	lirc_buffer_write(&sz->delay_buf, data);
+
+	if (!sz->timer_running) {
+		sz->delay_timer.expires = jiffies + HZ/10;
+		add_timer(&sz->delay_timer);
+		sz->timer_running = 1;
+	}
+
+	spin_unlock_irqrestore(&sz->timer_lock, flags);
+}
+
+static void push_full_pulse(struct usb_streamzap *sz,
+				   unsigned char value)
+{
+	lirc_t pulse;
+
+	if (sz->idle) {
+		long deltv;
+		lirc_t tmp;
+
+		sz->signal_last = sz->signal_start;
+		do_gettimeofday(&sz->signal_start);
+
+		deltv = sz->signal_start.tv_sec-sz->signal_last.tv_sec;
+		if (deltv > 15) {
+			tmp = PULSE_MASK; /* really long time */
+		} else {
+			tmp = (lirc_t) (deltv*1000000+
+					sz->signal_start.tv_usec -
+					sz->signal_last.tv_usec);
+			tmp -= sz->sum;
+		}
+		dprintk("ls %u", sz->driver.minor, tmp);
+		push(sz, (char *)&tmp);
+
+		sz->idle = 0;
+		sz->sum = 0;
+	}
+
+	pulse = ((lirc_t) value)*STREAMZAP_RESOLUTION;
+	pulse += STREAMZAP_RESOLUTION/2;
+	sz->sum += pulse;
+	pulse |= PULSE_BIT;
+
+	dprintk("p %u", sz->driver.minor, pulse&PULSE_MASK);
+	push(sz, (char *)&pulse);
+}
+
+static void push_half_pulse(struct usb_streamzap *sz,
+				   unsigned char value)
+{
+	push_full_pulse(sz, (value & STREAMZAP_PULSE_MASK)>>4);
+}
+
+static void push_full_space(struct usb_streamzap *sz,
+				   unsigned char value)
+{
+	lirc_t space;
+
+	space = ((lirc_t) value)*STREAMZAP_RESOLUTION;
+	space += STREAMZAP_RESOLUTION/2;
+	sz->sum += space;
+	dprintk("s %u", sz->driver.minor, space);
+	push(sz, (char *)&space);
+}
+
+static void push_half_space(struct usb_streamzap *sz,
+				   unsigned char value)
+{
+	push_full_space(sz, value & STREAMZAP_SPACE_MASK);
+}
+
+/**
+ * usb_streamzap_irq - IRQ handler
+ *
+ * This procedure is invoked on reception of data from
+ * the usb remote.
+ */
+#if defined(KERNEL_2_5) && LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19)
+static void usb_streamzap_irq(struct urb *urb, struct pt_regs *regs)
+#else
+static void usb_streamzap_irq(struct urb *urb)
+#endif
+{
+	struct usb_streamzap *sz;
+	int		len;
+	unsigned int	i = 0;
+
+	if (!urb)
+		return;
+
+	sz = urb->context;
+	len = urb->actual_length;
+
+	switch (urb->status) {
+	case -ECONNRESET:
+	case -ENOENT:
+	case -ESHUTDOWN:
+		/*
+		 * this urb is terminated, clean up.
+		 * sz might already be invalid at this point
+		 */
+		dprintk("urb status: %d", -1, urb->status);
+		return;
+	default:
+		break;
+	}
+
+	dprintk("received %d", sz->driver.minor, urb->actual_length);
+	if (!sz->flush) {
+		for (i = 0; i < urb->actual_length; i++) {
+			dprintk("%d: %x", sz->driver.minor,
+				i, (unsigned char) sz->buf_in[i]);
+			switch (sz->decoder_state) {
+			case PulseSpace:
+				if ((sz->buf_in[i]&STREAMZAP_PULSE_MASK) ==
+				    STREAMZAP_PULSE_MASK) {
+					sz->decoder_state = FullPulse;
+					continue;
+				} else if ((sz->buf_in[i]&STREAMZAP_SPACE_MASK)
+					   == STREAMZAP_SPACE_MASK) {
+					push_half_pulse(sz, sz->buf_in[i]);
+					sz->decoder_state = FullSpace;
+					continue;
+				} else {
+					push_half_pulse(sz, sz->buf_in[i]);
+					push_half_space(sz, sz->buf_in[i]);
+				}
+				break;
+			case FullPulse:
+				push_full_pulse(sz, sz->buf_in[i]);
+				sz->decoder_state = IgnorePulse;
+				break;
+			case FullSpace:
+				if (sz->buf_in[i] == 0xff) {
+					sz->idle = 1;
+					stop_timer(sz);
+					flush_delay_buffer(sz);
+				} else
+					push_full_space(sz, sz->buf_in[i]);
+				sz->decoder_state = PulseSpace;
+				break;
+			case IgnorePulse:
+				if ((sz->buf_in[i]&STREAMZAP_SPACE_MASK) ==
+				    STREAMZAP_SPACE_MASK) {
+					sz->decoder_state = FullSpace;
+					continue;
+				}
+				push_half_space(sz, sz->buf_in[i]);
+				sz->decoder_state = PulseSpace;
+				break;
+			}
+		}
+	}
+
+#ifdef KERNEL_2_5
+	usb_submit_urb(urb, GFP_ATOMIC);
+#endif
+
+	return;
+}
+
+static struct file_operations streamzap_fops = {
+	.owner		= THIS_MODULE,
+	.ioctl		= streamzap_ioctl,
+};
+
+
+/**
+ *	streamzap_probe
+ *
+ *	Called by usb-core to associated with a candidate device
+ *	On any failure the return value is the ERROR
+ *	On success return 0
+ */
+#ifdef KERNEL_2_5
+static int streamzap_probe(struct usb_interface *interface,
+			   const struct usb_device_id *id)
+{
+	struct usb_device *udev = interface_to_usbdev(interface);
+	struct usb_host_interface *iface_host;
+#else
+static void *streamzap_probe(struct usb_device *udev, unsigned int ifnum,
+			     const struct usb_device_id *id)
+{
+	struct usb_interface *interface = &udev->actconfig->interface[ifnum];
+	struct usb_interface_descriptor *iface_host;
+#endif
+	int retval = -ENOMEM;
+	struct usb_streamzap *sz = NULL;
+	char buf[63], name[128] = "";
+
+	/* Allocate space for device driver specific data */
+	sz = kzalloc(sizeof(struct usb_streamzap), GFP_KERNEL);
+	if (sz == NULL)
+		goto error;
+
+	sz->udev = udev;
+	sz->interface = interface;
+
+	/* Check to ensure endpoint information matches requirements */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 5)
+	iface_host = &interface->altsetting[interface->act_altsetting];
+#else
+	iface_host = interface->cur_altsetting;
+#endif
+
+#ifdef KERNEL_2_5
+	if (iface_host->desc.bNumEndpoints != 1) {
+#else
+	if (iface_host->bNumEndpoints != 1) {
+#endif
+#ifdef KERNEL_2_5
+		err("%s: Unexpected desc.bNumEndpoints (%d)", __func__,
+		    iface_host->desc.bNumEndpoints);
+#else
+		err("%s: Unexpected desc.bNumEndpoints (%d)", __func__,
+		    iface_host->bNumEndpoints);
+#endif
+		retval = -ENODEV;
+		goto error;
+	}
+
+#ifdef KERNEL_2_5
+	sz->endpoint = &(iface_host->endpoint[0].desc);
+#else
+	sz->endpoint = &(iface_host->endpoint[0]);
+#endif
+	if ((sz->endpoint->bEndpointAddress & USB_ENDPOINT_DIR_MASK)
+	    != USB_DIR_IN) {
+		err("%s: endpoint doesn't match input device 02%02x",
+		    __func__, sz->endpoint->bEndpointAddress);
+		retval = -ENODEV;
+		goto error;
+	}
+
+	if ((sz->endpoint->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK)
+	    != USB_ENDPOINT_XFER_INT) {
+		err("%s: endpoint attributes don't match xfer 02%02x",
+		    __func__, sz->endpoint->bmAttributes);
+		retval = -ENODEV;
+		goto error;
+	}
+
+	if (sz->endpoint->wMaxPacketSize == 0) {
+		err("%s: endpoint message size==0? ", __func__);
+		retval = -ENODEV;
+		goto error;
+	}
+
+	/* Allocate the USB buffer and IRQ URB */
+
+	sz->buf_in_len = sz->endpoint->wMaxPacketSize;
+#ifdef KERNEL_2_5
+	sz->buf_in = usb_buffer_alloc(sz->udev, sz->buf_in_len,
+				      GFP_ATOMIC, &sz->dma_in);
+#else
+	sz->buf_in = kmalloc(sz->buf_in_len, GFP_KERNEL);
+#endif
+	if (sz->buf_in == NULL)
+		goto error;
+
+#ifdef KERNEL_2_5
+	sz->urb_in = usb_alloc_urb(0, GFP_KERNEL);
+#else
+
+	sz->urb_in = usb_alloc_urb(0);
+#endif
+	if (sz->urb_in == NULL)
+		goto error;
+
+	/* Connect this device to the LIRC sub-system */
+
+	if (lirc_buffer_init(&sz->lirc_buf, sizeof(lirc_t),
+			     STREAMZAP_BUFFER_SIZE))
+		goto error;
+
+	if (lirc_buffer_init(&sz->delay_buf, sizeof(lirc_t),
+			     STREAMZAP_BUFFER_SIZE)) {
+		lirc_buffer_free(&sz->lirc_buf);
+		goto error;
+	}
+
+	strcpy(sz->driver.name, DRIVER_NAME);
+	sz->driver.minor = -1;
+	sz->driver.sample_rate = 0;
+	sz->driver.code_length = sizeof(lirc_t) * 8;
+	sz->driver.features = LIRC_CAN_REC_MODE2 | LIRC_CAN_GET_REC_RESOLUTION;
+	sz->driver.data = sz;
+	sz->driver.rbuf = &sz->lirc_buf;
+	sz->driver.set_use_inc = &streamzap_use_inc;
+	sz->driver.set_use_dec = &streamzap_use_dec;
+	sz->driver.fops = &streamzap_fops;
+#ifdef LIRC_HAVE_SYSFS
+	sz->driver.dev = &interface->dev;
+#endif
+	sz->driver.owner = THIS_MODULE;
+
+	sz->idle = 1;
+	sz->decoder_state = PulseSpace;
+	init_timer(&sz->delay_timer);
+	sz->delay_timer.function = delay_timeout;
+	sz->delay_timer.data = (unsigned long) sz;
+	sz->timer_running = 0;
+	spin_lock_init(&sz->timer_lock);
+
+	init_timer(&sz->flush_timer);
+	sz->flush_timer.function = flush_timeout;
+	sz->flush_timer.data = (unsigned long) sz;
+	/* Complete final initialisations */
+
+	usb_fill_int_urb(sz->urb_in, udev,
+		usb_rcvintpipe(udev, sz->endpoint->bEndpointAddress),
+		sz->buf_in, sz->buf_in_len, usb_streamzap_irq, sz,
+		sz->endpoint->bInterval);
+#ifdef KERNEL_2_5
+	sz->urb_in->transfer_dma = sz->dma_in;
+	sz->urb_in->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;
+#endif
+
+	if (udev->descriptor.iManufacturer
+	    && usb_string(udev, udev->descriptor.iManufacturer,
+			  buf, sizeof(buf)) > 0)
+		strlcpy(name, buf, sizeof(name));
+
+	if (udev->descriptor.iProduct
+	    && usb_string(udev,  udev->descriptor.iProduct,
+			  buf, sizeof(buf)) > 0)
+		snprintf(name + strlen(name), sizeof(name) - strlen(name),
+			 " %s", buf);
+
+	printk(KERN_INFO DRIVER_NAME "[%d]: %s on usb%d:%d attached\n",
+	       sz->driver.minor, name,
+	       udev->bus->busnum, sz->udev->devnum);
+
+#ifdef KERNEL_2_5
+	usb_set_intfdata(interface, sz);
+#endif
+
+	if (lirc_register_driver(&sz->driver) < 0) {
+		lirc_buffer_free(&sz->delay_buf);
+		lirc_buffer_free(&sz->lirc_buf);
+		goto error;
+	}
+
+#ifdef KERNEL_2_5
+	return 0;
+#else
+	return sz;
+#endif
+
+error:
+
+	/*
+	 * Premise is that a 'goto error' can be invoked from inside the
+	 * probe function and all necessary cleanup actions will be taken
+	 * including freeing any necessary memory blocks
+	 */
+
+	if (retval == -ENOMEM)
+		err("Out of memory");
+
+	if (sz) {
+		usb_free_urb(sz->urb_in);
+#ifdef KERNEL_2_5
+		usb_buffer_free(udev, sz->buf_in_len, sz->buf_in, sz->dma_in);
+#else
+		if (sz->buf_in) {
+			kfree(sz->buf_in);
+		}
+#endif
+		kfree(sz);
+	}
+
+#ifdef KERNEL_2_5
+	return retval;
+#else
+	return NULL;
+#endif
+}
+
+static int streamzap_use_inc(void *data)
+{
+	struct usb_streamzap *sz = data;
+
+	if (!sz) {
+		dprintk("%s called with no context", -1, __func__);
+		return -EINVAL;
+	}
+	dprintk("set use inc", sz->driver.minor);
+	MOD_INC_USE_COUNT;
+
+	lirc_buffer_clear(&sz->lirc_buf);
+	lirc_buffer_clear(&sz->delay_buf);
+
+	sz->flush_timer.expires = jiffies + HZ;
+	sz->flush = 1;
+	add_timer(&sz->flush_timer);
+
+	sz->urb_in->dev = sz->udev;
+#ifdef KERNEL_2_5
+	if (usb_submit_urb(sz->urb_in, GFP_ATOMIC)) {
+#else
+	if (usb_submit_urb(sz->urb_in)) {
+#endif
+		dprintk("open result = -EIO error submitting urb",
+			sz->driver.minor);
+		MOD_DEC_USE_COUNT;
+		return -EIO;
+	}
+	sz->in_use++;
+
+	return 0;
+}
+
+static void streamzap_use_dec(void *data)
+{
+	struct usb_streamzap *sz = data;
+
+	if (!sz) {
+		dprintk("%s called with no context", -1, __func__);
+		return;
+	}
+	dprintk("set use dec", sz->driver.minor);
+
+	if (sz->flush) {
+		sz->flush = 0;
+		del_timer_sync(&sz->flush_timer);
+	}
+
+	usb_kill_urb(sz->urb_in);
+
+	stop_timer(sz);
+
+	MOD_DEC_USE_COUNT;
+	sz->in_use--;
+}
+
+static int streamzap_ioctl(struct inode *node, struct file *filep,
+			   unsigned int cmd, unsigned long arg)
+{
+	int result;
+
+	switch (cmd) {
+	case LIRC_GET_REC_RESOLUTION:
+		result = put_user(STREAMZAP_RESOLUTION, (unsigned int *) arg);
+		if (result)
+			return result;
+		break;
+	default:
+		return -ENOIOCTLCMD;
+	}
+	return 0;
+}
+
+/**
+ * streamzap_disconnect
+ *
+ * Called by the usb core when the device is removed from the system.
+ *
+ * This routine guarantees that the driver will not submit any more urbs
+ * by clearing dev->udev.  It is also supposed to terminate any currently
+ * active urbs.  Unfortunately, usb_bulk_msg(), used in streamzap_read(),
+ * does not provide any way to do this.
+ */
+#ifdef KERNEL_2_5
+static void streamzap_disconnect(struct usb_interface *interface)
+#else
+static void streamzap_disconnect(struct usb_device *dev, void *ptr)
+#endif
+{
+	struct usb_streamzap *sz;
+	int errnum;
+	int minor;
+
+#ifdef KERNEL_2_5
+	sz = usb_get_intfdata(interface);
+#else
+	sz = ptr;
+#endif
+
+	/* unregister from the LIRC sub-system */
+
+	errnum = lirc_unregister_driver(sz->driver.minor);
+	if (errnum != 0)
+		dprintk("error in lirc_unregister: (returned %d)",
+			sz->driver.minor, errnum);
+
+	lirc_buffer_free(&sz->delay_buf);
+	lirc_buffer_free(&sz->lirc_buf);
+
+	/* unregister from the USB sub-system */
+
+	usb_free_urb(sz->urb_in);
+
+#ifdef KERNEL_2_5
+	usb_buffer_free(sz->udev, sz->buf_in_len, sz->buf_in, sz->dma_in);
+#else
+	kfree(sz->buf_in);
+#endif
+
+	minor = sz->driver.minor;
+	kfree(sz);
+
+	printk(KERN_INFO DRIVER_NAME "[%d]: disconnected\n", minor);
+}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 0)
+static int streamzap_suspend(struct usb_interface *intf, pm_message_t message)
+{
+	struct usb_streamzap *sz = usb_get_intfdata(intf);
+
+	printk(KERN_INFO DRIVER_NAME "[%d]: suspend\n", sz->driver.minor);
+	if (sz->in_use) {
+		if (sz->flush) {
+			sz->flush = 0;
+			del_timer_sync(&sz->flush_timer);
+		}
+
+		stop_timer(sz);
+
+		usb_kill_urb(sz->urb_in);
+	}
+	return 0;
+}
+
+static int streamzap_resume(struct usb_interface *intf)
+{
+	struct usb_streamzap *sz = usb_get_intfdata(intf);
+
+	lirc_buffer_clear(&sz->lirc_buf);
+	lirc_buffer_clear(&sz->delay_buf);
+
+	if (sz->in_use) {
+		sz->flush_timer.expires = jiffies + HZ;
+		sz->flush = 1;
+		add_timer(&sz->flush_timer);
+
+		sz->urb_in->dev = sz->udev;
+#ifdef KERNEL_2_5
+		if (usb_submit_urb(sz->urb_in, GFP_ATOMIC)) {
+#else
+		if (usb_submit_urb(sz->urb_in)) {
+#endif
+			dprintk("open result = -EIO error submitting urb",
+				sz->driver.minor);
+			MOD_DEC_USE_COUNT;
+			return -EIO;
+		}
+	}
+	return 0;
+}
+#endif
+
+#ifdef MODULE
+/**
+ *	usb_streamzap_init
+ */
+static int __init usb_streamzap_init(void)
+{
+	int result;
+
+	/* register this driver with the USB subsystem */
+	result = usb_register(&streamzap_driver);
+
+	if (result) {
+		err("usb_register failed. Error number %d",
+		    result);
+		return result;
+	}
+
+	printk(KERN_INFO DRIVER_NAME " " DRIVER_VERSION " registered\n");
+	return 0;
+}
+
+/**
+ *	usb_streamzap_exit
+ */
+static void __exit usb_streamzap_exit(void)
+{
+	usb_deregister(&streamzap_driver);
+}
+
+
+module_init(usb_streamzap_init);
+module_exit(usb_streamzap_exit);
+
+MODULE_AUTHOR("Christoph Bartelmus, Greg Wickham, Adrian Dewhurst");
+MODULE_DESCRIPTION(DRIVER_DESC);
+MODULE_LICENSE("GPL");
+
+module_param(debug, bool, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(debug, "Enable debugging messages");
+EXPORT_NO_SYMBOLS;
+#endif /* MODULE */
--- linux-mvl-dove-2.6.32.orig/ubuntu/lirc/lirc_streamzap/Makefile
+++ linux-mvl-dove-2.6.32/ubuntu/lirc/lirc_streamzap/Makefile
@@ -0,0 +1,2 @@
+EXTRA_CFLAGS =-DIRCTL_DEV_MAJOR=61 -DLIRC_SERIAL_TRANSMITTER -DLIRC_SERIAL_SOFTCARRIER -I$(src)/..
+obj-$(CONFIG_LIRC_STREAMZAP)	+= lirc_streamzap.o
--- linux-mvl-dove-2.6.32.orig/ubuntu/include/README
+++ linux-mvl-dove-2.6.32/ubuntu/include/README
@@ -0,0 +1,4 @@
+Only use this directory for things which need to share their headers with
+other parts of the kernel or other modules in ubuntu/
+
+Otherwise, keep them local to the module directory.
--- linux-mvl-dove-2.6.32.orig/ubuntu/include/linux/aufs_type.h
+++ linux-mvl-dove-2.6.32/ubuntu/include/linux/aufs_type.h
@@ -0,0 +1,195 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#ifndef __AUFS_TYPE_H__
+#define __AUFS_TYPE_H__
+
+#include <linux/ioctl.h>
+#include <linux/limits.h>
+#include <linux/types.h>
+
+#define AUFS_VERSION	"2-standalone.tree-20091207"
+
+/* todo? move this to linux-2.6.19/include/magic.h */
+#define AUFS_SUPER_MAGIC	('a' << 24 | 'u' << 16 | 'f' << 8 | 's')
+
+/* ---------------------------------------------------------------------- */
+
+#ifdef CONFIG_AUFS_BRANCH_MAX_127
+typedef __s8 aufs_bindex_t;
+#define AUFS_BRANCH_MAX 127
+#else
+typedef __s16 aufs_bindex_t;
+#ifdef CONFIG_AUFS_BRANCH_MAX_511
+#define AUFS_BRANCH_MAX 511
+#elif defined(CONFIG_AUFS_BRANCH_MAX_1023)
+#define AUFS_BRANCH_MAX 1023
+#elif defined(CONFIG_AUFS_BRANCH_MAX_32767)
+#define AUFS_BRANCH_MAX 32767
+#endif
+#endif
+
+#ifdef __KERNEL__
+#ifndef AUFS_BRANCH_MAX
+#error unknown CONFIG_AUFS_BRANCH_MAX value
+#endif
+#endif /* __KERNEL__ */
+
+/* ---------------------------------------------------------------------- */
+
+#define AUFS_NAME		"aufs"
+#define AUFS_FSTYPE		AUFS_NAME
+
+#define AUFS_ROOT_INO		2
+#define AUFS_FIRST_INO		11
+
+#define AUFS_WH_PFX		".wh."
+#define AUFS_WH_PFX_LEN		((int)sizeof(AUFS_WH_PFX) - 1)
+#define AUFS_WH_TMP_LEN		4
+/* a limit for rmdir/rename a dir */
+#define AUFS_MAX_NAMELEN	(NAME_MAX \
+				- AUFS_WH_PFX_LEN * 2	/* doubly whiteouted */\
+				- 1			/* dot */\
+				- AUFS_WH_TMP_LEN)	/* hex */
+#define AUFS_XINO_FNAME		"." AUFS_NAME ".xino"
+#define AUFS_XINO_DEFPATH	"/tmp/" AUFS_XINO_FNAME
+#define AUFS_XINO_TRUNC_INIT	64 /* blocks */
+#define AUFS_XINO_TRUNC_STEP	4  /* blocks */
+#define AUFS_DIRWH_DEF		3
+#define AUFS_RDCACHE_DEF	10 /* seconds */
+#define AUFS_RDBLK_DEF		512 /* bytes */
+#define AUFS_RDHASH_DEF		32
+#define AUFS_WKQ_NAME		AUFS_NAME "d"
+#define AUFS_NWKQ_DEF		4
+#define AUFS_MFS_SECOND_DEF	30 /* seconds */
+#define AUFS_PLINK_WARN		100 /* number of plinks */
+
+#define AUFS_DIROPQ_NAME	AUFS_WH_PFX ".opq" /* whiteouted doubly */
+#define AUFS_WH_DIROPQ		AUFS_WH_PFX AUFS_DIROPQ_NAME
+
+#define AUFS_BASE_NAME		AUFS_WH_PFX AUFS_NAME
+#define AUFS_PLINKDIR_NAME	AUFS_WH_PFX "plnk"
+#define AUFS_ORPHDIR_NAME	AUFS_WH_PFX "orph"
+
+/* doubly whiteouted */
+#define AUFS_WH_BASE		AUFS_WH_PFX AUFS_BASE_NAME
+#define AUFS_WH_PLINKDIR	AUFS_WH_PFX AUFS_PLINKDIR_NAME
+#define AUFS_WH_ORPHDIR		AUFS_WH_PFX AUFS_ORPHDIR_NAME
+
+/* branch permission */
+#define AUFS_BRPERM_RW		"rw"
+#define AUFS_BRPERM_RO		"ro"
+#define AUFS_BRPERM_RR		"rr"
+#define AUFS_BRPERM_WH		"wh"
+#define AUFS_BRPERM_NLWH	"nolwh"
+#define AUFS_BRPERM_ROWH	AUFS_BRPERM_RO "+" AUFS_BRPERM_WH
+#define AUFS_BRPERM_RRWH	AUFS_BRPERM_RR "+" AUFS_BRPERM_WH
+#define AUFS_BRPERM_RWNLWH	AUFS_BRPERM_RW "+" AUFS_BRPERM_NLWH
+
+/* ---------------------------------------------------------------------- */
+
+/* ioctl */
+enum {
+	AuCtl_PLINK_MAINT,
+	AuCtl_PLINK_CLEAN,
+
+	/* readdir in userspace */
+	AuCtl_RDU,
+	AuCtl_RDU_INO,
+
+	/* pathconf wrapper */
+	AuCtl_WBR_FD
+};
+
+/* borrowed from linux/include/linux/kernel.h */
+#ifndef ALIGN
+#define ALIGN(x, a)		__ALIGN_MASK(x, (typeof(x))(a)-1)
+#define __ALIGN_MASK(x, mask)	(((x)+(mask))&~(mask))
+#endif
+
+/* borrowed from linux/include/linux/compiler-gcc3.h */
+#ifndef __aligned
+#define __aligned(x)			__attribute__((aligned(x)))
+#define __packed			__attribute__((packed))
+#endif
+
+struct au_rdu_cookie {
+	__u64		h_pos;
+	__s16		bindex;
+	__u8		flags;
+	__u8		pad;
+	__u32		generation;
+} __aligned(8);
+
+struct au_rdu_ent {
+	__u64		ino;
+	__s16		bindex;
+	__u8		type;
+	__u8		nlen;
+	__u8		wh;
+	char		name[0];
+} __aligned(8);
+
+static inline int au_rdu_len(int nlen)
+{
+	/* include the terminating NULL */
+	return ALIGN(sizeof(struct au_rdu_ent) + nlen + 1,
+		     sizeof(__u64));
+}
+
+union au_rdu_ent_ul {
+	struct au_rdu_ent __user	*e;
+	unsigned long			ul;
+};
+
+enum {
+	AufsCtlRduV_SZ,
+	AufsCtlRduV_SZ_PTR,
+	AufsCtlRduV_End
+};
+
+struct aufs_rdu {
+	/* input */
+	union {
+		__u64		sz;	/* AuCtl_RDU */
+		__u64		nent;	/* AuCtl_RDU_INO */
+	};
+	union au_rdu_ent_ul	ent;
+	__u16			verify[AufsCtlRduV_End];
+
+	/* input/output */
+	__u32			blk;
+
+	/* output */
+	union au_rdu_ent_ul	tail;
+	/* number of entries which were added in a single call */
+	__u64			rent;
+	__u8			full;
+	__u8			shwh;
+
+	struct au_rdu_cookie	cookie;
+} __aligned(8);
+
+#define AuCtlType		'A'
+#define AUFS_CTL_PLINK_MAINT	_IO(AuCtlType, AuCtl_PLINK_MAINT)
+#define AUFS_CTL_PLINK_CLEAN	_IO(AuCtlType, AuCtl_PLINK_CLEAN)
+#define AUFS_CTL_RDU		_IOWR(AuCtlType, AuCtl_RDU, struct aufs_rdu)
+#define AUFS_CTL_RDU_INO	_IOWR(AuCtlType, AuCtl_RDU_INO, struct aufs_rdu)
+#define AUFS_CTL_WBR_FD		_IO(AuCtlType, AuCtl_WBR_FD)
+
+#endif /* __AUFS_TYPE_H__ */
--- linux-mvl-dove-2.6.32.orig/ubuntu/compcache/Kconfig
+++ linux-mvl-dove-2.6.32/ubuntu/compcache/Kconfig
@@ -0,0 +1,31 @@
+menu "Compcache options"
+
+config BLK_DEV_COMPCACHE
+	tristate "Compressed RAM based swap device"
+	default m
+	select LZO_COMPRESS
+	select LZO_DECOMPRESS
+	depends on BLOCK
+	help
+	  This creates RAM based block device which acts as swap disk. Pages
+	  swapped to this disk are compressed and stored in memory itself.
+	  Project Home: http://code.google.com/p/compcache/
+
+config BLK_DEV_COMPCACHE_DEBUG
+	default n
+	depends on BLK_DEV_COMPCACHE
+	bool "Enable debugging"
+	help
+	  This causes negligible performance loss and size increase.
+	  If unsure, say Y.
+
+config BLK_DEV_COMPCACHE_STATS
+	default n
+	depends on BLK_DEV_COMPCACHE
+	bool "Enable statistics"
+	help
+	  Creates /proc/compcache to export various statistics.
+	  This adds about 4K to size with negligible performance loss.
+	  If unsure, say Y.
+ 
+endmenu
--- linux-mvl-dove-2.6.32.orig/ubuntu/compcache/BOM
+++ linux-mvl-dove-2.6.32/ubuntu/compcache/BOM
@@ -0,0 +1,2 @@
+Downloaded from:	http://code.google.com/p/compcache/
+Current Version:	0.5.3
--- linux-mvl-dove-2.6.32.orig/ubuntu/compcache/xvmalloc.c
+++ linux-mvl-dove-2.6.32/ubuntu/compcache/xvmalloc.c
@@ -0,0 +1,557 @@
+/*
+ * xvmalloc.c
+ *
+ * Copyright (C) 2008, 2009  Nitin Gupta
+ *
+ * This code is released using a dual license strategy: GPL/LGPL
+ * You can choose the licence that better fits your requirements.
+ *
+ * Released under the terms of GNU General Public License Version 2.0
+ * Released under the terms of GNU Lesser General Public License Version 2.1
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/bitops.h>
+#include <linux/errno.h>
+#include <linux/highmem.h>
+#include <linux/init.h>
+#include <linux/string.h>
+#include <linux/slab.h>
+
+#include "xvmalloc.h"
+#include "xvmalloc_int.h"
+
+static void stat_inc(u64 *value)
+{
+	*value = *value + 1;
+}
+
+static void stat_dec(u64 *value)
+{
+	*value = *value - 1;
+}
+
+static int test_flag(struct block_header *block, enum blockflags flag)
+{
+	return block->prev & BIT(flag);
+}
+
+static void set_flag(struct block_header *block, enum blockflags flag)
+{
+	block->prev |= BIT(flag);
+}
+
+static void clear_flag(struct block_header *block, enum blockflags flag)
+{
+	block->prev &= ~BIT(flag);
+}
+
+/*
+ * Given <pagenum, offset> pair, provide a derefrencable pointer.
+ * This is called from xv_malloc/xv_free path, so it needs to be fast.
+ */
+static void *get_ptr_atomic(u32 pagenum, u16 offset, enum km_type type)
+{
+	unsigned char *base;
+
+	base = kmap_atomic(pfn_to_page(pagenum), type);
+	return base + offset;
+}
+
+static void put_ptr_atomic(void *ptr, enum km_type type)
+{
+	kunmap_atomic(ptr, type);
+}
+
+static u32 get_blockprev(struct block_header *block)
+{
+	return block->prev & PREV_MASK;
+}
+
+static void set_blockprev(struct block_header *block, u16 new_offset)
+{
+	block->prev = new_offset | (block->prev & FLAGS_MASK);
+}
+
+static struct block_header *BLOCK_NEXT(struct block_header *block)
+{
+	return (struct block_header *)((char *)block + block->size + XV_ALIGN);
+}
+
+/*
+ * Get index of free list containing blocks of maximum size
+ * which is less than or equal to given size.
+ */
+static u32 get_index_for_insert(u32 size)
+{
+	if (unlikely(size > XV_MAX_ALLOC_SIZE))
+		size = XV_MAX_ALLOC_SIZE;
+	size &= ~FL_DELTA_MASK;
+	return (size - XV_MIN_ALLOC_SIZE) >> FL_DELTA_SHIFT;
+}
+
+/*
+ * Get index of free list having blocks of size greater than
+ * or equal to requested size.
+ */
+static u32 get_index(u32 size)
+{
+	if (unlikely(size < XV_MIN_ALLOC_SIZE))
+		size = XV_MIN_ALLOC_SIZE;
+	size = ALIGN(size, FL_DELTA);
+	return (size - XV_MIN_ALLOC_SIZE) >> FL_DELTA_SHIFT;
+}
+
+/*
+ * Allocate a memory page. Called when a pool needs to grow.
+ */
+static u32 xv_alloc_page(gfp_t flags)
+{
+	struct page *page;
+
+	//page = alloc_page(GFP_NOIO | __GFP_HIGHMEM);
+	page = alloc_page(flags);
+	if (unlikely(!page))
+		return 0;
+
+	return page_to_pfn(page);
+}
+
+/*
+ * Called when all objects in a page are freed.
+ */
+static void xv_free_page(u32 pagenum)
+{
+	__free_page(pfn_to_page(pagenum));
+}
+
+/**
+ * find_block - find block of at least given size
+ * @pool: memory pool to search from
+ * @size: size of block required
+ * @pagenum: page no. containing required block
+ * @offset: offset within the page where block is located.
+ *
+ * Searches two level bitmap to locate block of at least
+ * the given size. If such a block is found, it provides
+ * <pagenum, offset> to identify this block and returns index
+ * in freelist where we found this block.
+ * Otherwise, returns 0 and <pagenum, offset> params are not touched.
+ */
+static u32 find_block(struct xv_pool *pool, u32 size,
+			u32 *pagenum, u32 *offset)
+{
+	ulong flbitmap, slbitmap;
+	u32 flindex, slindex, slbitstart;
+
+	/* There are no free blocks in this pool */
+	if (!pool->flbitmap)
+		return 0;
+
+	/* Get freelist index correspoding to this size */
+	slindex = get_index(size);
+	slbitmap = pool->slbitmap[slindex / BITS_PER_LONG];
+	slbitstart = slindex % BITS_PER_LONG;
+
+	/*
+	 * If freelist is not empty at this index, we found the
+	 * block - head of this list. This is approximate best-fit match.
+	 */
+	if (test_bit(slbitstart, &slbitmap)) {
+		*pagenum = pool->freelist[slindex].pagenum;
+		*offset = pool->freelist[slindex].offset;
+		return slindex;
+	}
+
+	/*
+	 * No best-fit found. Search a bit further in bitmap for a free block.
+	 * Second level bitmap consists of series of 32-bit chunks. Search
+	 * further in the chunk where we expected a best-fit, starting from
+	 * index location found above.
+	 */
+	slbitstart++;
+	slbitmap >>= slbitstart;
+
+	/* Skip this search if we were already at end of this bitmap chunk */
+	if ((slbitstart != BITS_PER_LONG) && slbitmap) {
+		slindex += __ffs(slbitmap) + 1;
+		*pagenum = pool->freelist[slindex].pagenum;
+		*offset = pool->freelist[slindex].offset;
+		return slindex;
+	}
+
+	/* Now do a full two-level bitmap search to find next nearest fit */
+	flindex = slindex / BITS_PER_LONG;
+
+	flbitmap = (pool->flbitmap) >> (flindex + 1);
+	if (!flbitmap)
+		return 0;
+
+	flindex += __ffs(flbitmap) + 1;
+	slbitmap = pool->slbitmap[flindex];
+	slindex = (flindex * BITS_PER_LONG) + __ffs(slbitmap);
+	*pagenum = pool->freelist[slindex].pagenum;
+	*offset = pool->freelist[slindex].offset;
+
+	return slindex;
+}
+
+/*
+ * Insert block at <pagenum, offset> in freelist of given pool.
+ * freelist used depends on block size.
+ */
+static void insert_block(struct xv_pool *pool, u32 pagenum, u32 offset,
+			struct block_header *block)
+{
+	u32 flindex, slindex;
+	struct block_header *nextblock;
+
+	slindex = get_index_for_insert(block->size);
+	flindex = slindex / BITS_PER_LONG;
+
+	block->link.prev_pagenum = 0;
+	block->link.prev_offset = 0;
+	block->link.next_pagenum = pool->freelist[slindex].pagenum;
+	block->link.next_offset = pool->freelist[slindex].offset;
+	pool->freelist[slindex].pagenum = pagenum;
+	pool->freelist[slindex].offset = offset;
+
+	if (block->link.next_pagenum) {
+		nextblock = get_ptr_atomic(block->link.next_pagenum,
+					block->link.next_offset, KM_USER1);
+		nextblock->link.prev_pagenum = pagenum;
+		nextblock->link.prev_offset = offset;
+		put_ptr_atomic(nextblock, KM_USER1);
+	}
+
+	__set_bit(slindex % BITS_PER_LONG, &pool->slbitmap[flindex]);
+	__set_bit(flindex, &pool->flbitmap);
+}
+
+/*
+ * Remove block from head of freelist. Index 'slindex' identifies the freelist.
+ */
+static void remove_block_head(struct xv_pool *pool,
+			struct block_header *block, u32 slindex)
+{
+	struct block_header *tmpblock;
+	u32 flindex = slindex / BITS_PER_LONG;
+
+	pool->freelist[slindex].pagenum = block->link.next_pagenum;
+	pool->freelist[slindex].offset = block->link.next_offset;
+	block->link.prev_pagenum = 0;
+	block->link.prev_offset = 0;
+
+	if (!pool->freelist[slindex].pagenum) {
+		__clear_bit(slindex % BITS_PER_LONG, &pool->slbitmap[flindex]);
+		if (!pool->slbitmap[flindex])
+			__clear_bit(flindex, &pool->flbitmap);
+	} else {
+		/*
+		 * DEBUG ONLY: We need not reinitialize freelist head previous
+		 * pointer to 0 - we never depend on its value. But just for
+		 * sanity, lets do it.
+		 */
+		tmpblock = get_ptr_atomic(pool->freelist[slindex].pagenum,
+				pool->freelist[slindex].offset, KM_USER1);
+		tmpblock->link.prev_pagenum = 0;
+		tmpblock->link.prev_offset = 0;
+		put_ptr_atomic(tmpblock, KM_USER1);
+	}
+}
+
+/*
+ * Remove block from freelist. Index 'slindex' identifies the freelist.
+ */
+static void remove_block(struct xv_pool *pool, u32 pagenum, u32 offset,
+			struct block_header *block, u32 slindex)
+{
+	u32 flindex;
+	struct block_header *tmpblock;
+
+	if (pool->freelist[slindex].pagenum == pagenum
+	   && pool->freelist[slindex].offset == offset) {
+		remove_block_head(pool, block, slindex);
+		return;
+	}
+
+	flindex = slindex / BITS_PER_LONG;
+
+	if (block->link.prev_pagenum) {
+		tmpblock = get_ptr_atomic(block->link.prev_pagenum,
+				block->link.prev_offset, KM_USER1);
+		tmpblock->link.next_pagenum = block->link.next_pagenum;
+		tmpblock->link.next_offset = block->link.next_offset;
+		put_ptr_atomic(tmpblock, KM_USER1);
+	}
+
+	if (block->link.next_pagenum) {
+		tmpblock = get_ptr_atomic(block->link.next_pagenum,
+				block->link.next_offset, KM_USER1);
+		tmpblock->link.prev_pagenum = block->link.prev_pagenum;
+		tmpblock->link.prev_offset = block->link.prev_offset;
+		put_ptr_atomic(tmpblock, KM_USER1);
+	}
+
+	return;
+}
+
+/*
+ * Allocate a page and add it freelist of given pool.
+ */
+static int grow_pool(struct xv_pool *pool, gfp_t flags)
+{
+	u32 pagenum;
+	struct block_header *block;
+
+	pagenum = xv_alloc_page(flags);
+	if (unlikely(!pagenum))
+		return -ENOMEM;
+
+	stat_inc(&pool->total_pages);
+
+	spin_lock(&pool->lock);
+	block = get_ptr_atomic(pagenum, 0, KM_USER0);
+
+	block->size = PAGE_SIZE - XV_ALIGN;
+	set_flag(block, BLOCK_FREE);
+	clear_flag(block, PREV_FREE);
+	set_blockprev(block, 0);
+
+	insert_block(pool, pagenum, 0, block);
+
+	put_ptr_atomic(block, KM_USER0);
+	spin_unlock(&pool->lock);
+
+	return 0;
+}
+
+/*
+ * Create a memory pool. Allocates freelist, bitmaps and other
+ * per-pool metadata.
+ */
+struct xv_pool *xv_create_pool(void)
+{
+	u32 ovhd_size;
+	struct xv_pool *pool;
+
+	ovhd_size = roundup(sizeof(*pool), PAGE_SIZE);
+	pool = kzalloc(ovhd_size, GFP_KERNEL);
+	if (!pool)
+		return NULL;
+
+	spin_lock_init(&pool->lock);
+
+	return pool;
+}
+EXPORT_SYMBOL_GPL(xv_create_pool);
+
+void xv_destroy_pool(struct xv_pool *pool)
+{
+	kfree(pool);
+}
+EXPORT_SYMBOL_GPL(xv_destroy_pool);
+
+/**
+ * xv_malloc - Allocate block of given size from pool.
+ * @pool: pool to allocate from
+ * @size: size of block to allocate
+ * @pagenum: page no. that holds the object
+ * @offset: location of object within pagenum
+ *
+ * On success, <pagenum, offset> identifies block allocated
+ * and 0 is returned. On failure, <pagenum, offset> is set to
+ * 0 and -ENOMEM is returned.
+ *
+ * Allocation requests with size > XV_MAX_ALLOC_SIZE will fail.
+ */
+int xv_malloc(struct xv_pool *pool, u32 size, u32 *pagenum, u32 *offset,
+							gfp_t flags)
+{
+	int error;
+	u32 index, tmpsize, origsize, tmpoffset;
+	struct block_header *block, *tmpblock;
+
+	*pagenum = 0;
+	*offset = 0;
+	origsize = size;
+
+	if (unlikely(!size || size > XV_MAX_ALLOC_SIZE))
+		return -ENOMEM;
+
+	size = ALIGN(size, XV_ALIGN);
+
+	spin_lock(&pool->lock);
+
+	index = find_block(pool, size, pagenum, offset);
+
+	if (!*pagenum) {
+		spin_unlock(&pool->lock);
+		if (flags & GFP_NOWAIT)
+			return -ENOMEM;
+		error = grow_pool(pool, flags);
+		if (unlikely(error))
+			return -ENOMEM;
+
+		spin_lock(&pool->lock);
+		index = find_block(pool, size, pagenum, offset);
+	}
+
+	if (!*pagenum) {
+		spin_unlock(&pool->lock);
+		return -ENOMEM;
+	}
+
+	block = get_ptr_atomic(*pagenum, *offset, KM_USER0);
+
+	remove_block_head(pool, block, index);
+
+	/* Split the block if required */
+	tmpoffset = *offset + size + XV_ALIGN;
+	tmpsize = block->size - size;
+	tmpblock = (struct block_header *)((char *)block + size + XV_ALIGN);
+	if (tmpsize) {
+		tmpblock->size = tmpsize - XV_ALIGN;
+		set_flag(tmpblock, BLOCK_FREE);
+		clear_flag(tmpblock, PREV_FREE);
+
+		set_blockprev(tmpblock, *offset);
+		if (tmpblock->size >= XV_MIN_ALLOC_SIZE)
+			insert_block(pool, *pagenum, tmpoffset, tmpblock);
+
+		if (tmpoffset + XV_ALIGN + tmpblock->size != PAGE_SIZE) {
+			tmpblock = BLOCK_NEXT(tmpblock);
+			set_blockprev(tmpblock, tmpoffset);
+		}
+	} else {
+		/* This block is exact fit */
+		if (tmpoffset != PAGE_SIZE)
+			clear_flag(tmpblock, PREV_FREE);
+	}
+
+	block->size = origsize;
+	clear_flag(block, BLOCK_FREE);
+
+	put_ptr_atomic(block, KM_USER0);
+	spin_unlock(&pool->lock);
+
+	*offset += XV_ALIGN;
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(xv_malloc);
+
+/*
+ * Free block identified with <pagenum, offset>
+ */
+void xv_free(struct xv_pool *pool, u32 pagenum, u32 offset)
+{
+	void *page;
+	struct block_header *block, *tmpblock;
+
+	offset -= XV_ALIGN;
+
+	spin_lock(&pool->lock);
+
+	page = get_ptr_atomic(pagenum, 0, KM_USER0);
+	block = (struct block_header *)((char *)page + offset);
+
+	/* Catch double free bugs */
+	BUG_ON(test_flag(block, BLOCK_FREE));
+
+	block->size = ALIGN(block->size, XV_ALIGN);
+
+	tmpblock = BLOCK_NEXT(block);
+	if (offset + block->size + XV_ALIGN == PAGE_SIZE)
+		tmpblock = NULL;
+
+	/* Merge next block if its free */
+	if (tmpblock && test_flag(tmpblock, BLOCK_FREE)) {
+		/*
+		 * Blocks smaller than XV_MIN_ALLOC_SIZE
+		 * are not inserted in any free list.
+		 */
+		if (tmpblock->size >= XV_MIN_ALLOC_SIZE) {
+			remove_block(pool, pagenum,
+				    offset + block->size + XV_ALIGN, tmpblock,
+				    get_index_for_insert(tmpblock->size));
+		}
+		block->size += tmpblock->size + XV_ALIGN;
+	}
+
+	/* Merge previous block if its free */
+	if (test_flag(block, PREV_FREE)) {
+		tmpblock = (struct block_header *)((char *)(page) +
+						get_blockprev(block));
+		offset = offset - tmpblock->size - XV_ALIGN;
+
+		if (tmpblock->size >= XV_MIN_ALLOC_SIZE)
+			remove_block(pool, pagenum, offset, tmpblock,
+				    get_index_for_insert(tmpblock->size));
+
+		tmpblock->size += block->size + XV_ALIGN;
+		block = tmpblock;
+	}
+
+	/* No used objects in this page. Free it. */
+	if (block->size == PAGE_SIZE - XV_ALIGN) {
+		put_ptr_atomic(page, KM_USER0);
+		spin_unlock(&pool->lock);
+
+		xv_free_page(pagenum);
+		stat_dec(&pool->total_pages);
+		return;
+	}
+
+	set_flag(block, BLOCK_FREE);
+	if (block->size >= XV_MIN_ALLOC_SIZE)
+		insert_block(pool, pagenum, offset, block);
+
+	if (offset + block->size + XV_ALIGN != PAGE_SIZE) {
+		tmpblock = BLOCK_NEXT(block);
+		set_flag(tmpblock, PREV_FREE);
+		set_blockprev(tmpblock, offset);
+	}
+
+	put_ptr_atomic(page, KM_USER0);
+	spin_unlock(&pool->lock);
+
+	return;
+}
+EXPORT_SYMBOL_GPL(xv_free);
+
+u32 xv_get_object_size(void *obj)
+{
+	struct block_header *blk;
+
+	blk = (struct block_header *)((char *)(obj) - XV_ALIGN);
+	return blk->size;
+}
+EXPORT_SYMBOL_GPL(xv_get_object_size);
+
+/*
+ * Returns total memory used by allocator (userdata + metadata)
+ */
+u64 xv_get_total_size_bytes(struct xv_pool *pool)
+{
+	return pool->total_pages << PAGE_SHIFT;
+}
+EXPORT_SYMBOL_GPL(xv_get_total_size_bytes);
+
+static int __init xv_malloc_init(void)
+{
+	return 0;
+}
+
+static void __exit xv_malloc_exit(void)
+{
+	return;
+}
+
+module_init(xv_malloc_init);
+module_exit(xv_malloc_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Nitin Gupta <ngupta@vflare.org>");
+MODULE_DESCRIPTION("xvmalloc memory allocator");
--- linux-mvl-dove-2.6.32.orig/ubuntu/compcache/ramzswap.h
+++ linux-mvl-dove-2.6.32/ubuntu/compcache/ramzswap.h
@@ -0,0 +1,159 @@
+/*
+ * Compressed RAM based swap device
+ *
+ * Copyright (C) 2008, 2009  Nitin Gupta
+ *
+ * This RAM based block device acts as swap disk.
+ * Pages swapped to this device are compressed and
+ * stored in memory.
+ *
+ * Released under the terms of GNU General Public License Version 2.0
+ *
+ * Project home: http://compcache.googlecode.com
+ */
+
+#ifndef _RAMZSWAP_H_
+#define _RAMZSWAP_H_
+
+#include "xvmalloc.h"
+
+/*
+ * Stored at beginning of each compressed object.
+ *
+ * It stores back-reference to table entry which points to this
+ * object. This is required to support memory defragmentation or
+ * migrating compressed pages to backing swap disk.
+ */
+struct zobj_header {
+#if 0
+	u32 table_idx;
+#endif
+};
+
+/*-- Configurable parameters */
+
+/* Default ramzswap disk size: 25% of total RAM */
+#define DEFAULT_DISKSIZE_PERC_RAM	25
+#define DEFAULT_MEMLIMIT_PERC_RAM	15
+
+/*
+ * Max compressed page size when backing device is provided.
+ * Pages that compress to size greater than this are sent to
+ * physical swap disk.
+ */
+#define MAX_CPAGE_SIZE_BDEV	(PAGE_SIZE / 2)
+
+/*
+ * Max compressed page size when there is no backing dev.
+ * Pages that compress to size greater than this are stored
+ * uncompressed in memory.
+ */
+#define MAX_CPAGE_SIZE_NOBDEV	(PAGE_SIZE / 4 * 3)
+
+/*
+ * NOTE: MAX_CPAGE_SIZE_{BDEV,NOBDEV} sizes must be
+ * less than or equal to:
+ *   XV_MAX_ALLOC_SIZE - sizeof(struct zobj_header)
+ * since otherwise xvMalloc would always return failure.
+ */
+
+/*-- End of configurable params */
+
+#define SECTOR_SHIFT		9
+#define SECTOR_SIZE		(1 << SECTOR_SHIFT)
+#define SECTORS_PER_PAGE_SHIFT	(PAGE_SHIFT - SECTOR_SHIFT)
+#define SECTORS_PER_PAGE	(1 << SECTORS_PER_PAGE_SHIFT)
+
+/* Message prefix */
+#define C "ramzswap: "
+
+/* Debugging and Stats */
+#define NOP	do { } while (0)
+
+#if defined(CONFIG_BLK_DEV_RAMZSWAP_STATS)
+#define STATS
+#endif
+
+#if defined(STATS)
+#define stat_inc(stat)			((stat)++)
+#define stat_dec(stat)			((stat)--)
+#define stat_inc_if_less(stat, val1, val2) \
+				((stat) += ((val1) < (val2) ? 1 : 0))
+#define stat_dec_if_less(stat, val1, val2) \
+				((stat) -= ((val1) < (val2) ? 1 : 0))
+#else	/* STATS */
+#define stat_inc(x)			NOP
+#define stat_dec(x)			NOP
+#define stat_inc_if_less(x, v1, v2)	NOP
+#define stat_dec_if_less(x, v1, v2)	NOP
+#endif	/* STATS */
+
+/* Flags for ramzswap pages (table[page_no].flags) */
+enum rzs_pageflags {
+	/* Page is stored uncompressed */
+	RZS_UNCOMPRESSED,
+
+	/* Page consists entirely of zeros */
+	RZS_ZERO,
+
+	__NR_RZS_PAGEFLAGS,
+};
+
+/*-- Data structures */
+
+/* Indexed by page no. */
+struct table {
+	u32 pagenum;
+	u16 offset;
+	u8 count;	/* object ref count (not yet used) */
+	u8 flags;
+};
+
+struct ramzswap {
+	struct xv_pool *mem_pool;
+	void *compress_workmem;
+	void *compress_buffer;
+	struct table *table;
+	struct mutex lock;
+	struct gendisk *disk;
+	/*
+	 * This is limit on compressed data size (stats.compr_size)
+	 * Its applicable only when backing swap device is present.
+	 */
+	size_t memlimit;	/* bytes */
+	/*
+	 * This is limit on amount of *uncompressed* worth of data
+	 * we can hold. When backing swap device is provided, it is
+	 * set equal to device size.
+	 */
+	size_t disksize;	/* bytes */
+
+	/* backing swap device info */
+	struct block_device *backing_swap;
+	struct file *swap_file;
+	int old_block_size;
+};
+
+struct ramzswap_stats {
+	/* basic stats */
+	size_t compr_size;	/* compressed size of pages stored -
+				 * needed to enforce memlimit */
+	/* more stats */
+#if defined(STATS)
+	u64 num_reads;		/* failed + successful */
+	u64 num_writes;		/* --do-- */
+	u64 failed_reads;	/* can happen when memory is too low */
+	u64 failed_writes;	/* should NEVER! happen */
+	u64 invalid_io;		/* non-swap I/O requests */
+	u64 pages_discard;	/* no. of pages freed by discard callback */
+	u32 pages_zero;		/* no. of zero filled pages */
+	u32 pages_stored;	/* no. of pages currently stored */
+	u32 good_compress;	/* no. of pages with compression ratio<=50% */
+	u32 pages_expand;	/* no. of incompressible pages */
+	u64 bdev_num_reads;	/* no. of reads on backing dev */
+	u64 bdev_num_writes;	/* no. of writes on backing dev */
+#endif
+};
+/*-- */
+
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/compcache/LGPL-2.1.txt
+++ linux-mvl-dove-2.6.32/ubuntu/compcache/LGPL-2.1.txt
@@ -0,0 +1,510 @@
+
+                  GNU LESSER GENERAL PUBLIC LICENSE
+                       Version 2.1, February 1999
+
+ Copyright (C) 1991, 1999 Free Software Foundation, Inc.
+	51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+[This is the first released version of the Lesser GPL.  It also counts
+ as the successor of the GNU Library Public License, version 2, hence
+ the version number 2.1.]
+
+                            Preamble
+
+  The licenses for most software are designed to take away your
+freedom to share and change it.  By contrast, the GNU General Public
+Licenses are intended to guarantee your freedom to share and change
+free software--to make sure the software is free for all its users.
+
+  This license, the Lesser General Public License, applies to some
+specially designated software packages--typically libraries--of the
+Free Software Foundation and other authors who decide to use it.  You
+can use it too, but we suggest you first think carefully about whether
+this license or the ordinary General Public License is the better
+strategy to use in any particular case, based on the explanations
+below.
+
+  When we speak of free software, we are referring to freedom of use,
+not price.  Our General Public Licenses are designed to make sure that
+you have the freedom to distribute copies of free software (and charge
+for this service if you wish); that you receive source code or can get
+it if you want it; that you can change the software and use pieces of
+it in new free programs; and that you are informed that you can do
+these things.
+
+  To protect your rights, we need to make restrictions that forbid
+distributors to deny you these rights or to ask you to surrender these
+rights.  These restrictions translate to certain responsibilities for
+you if you distribute copies of the library or if you modify it.
+
+  For example, if you distribute copies of the library, whether gratis
+or for a fee, you must give the recipients all the rights that we gave
+you.  You must make sure that they, too, receive or can get the source
+code.  If you link other code with the library, you must provide
+complete object files to the recipients, so that they can relink them
+with the library after making changes to the library and recompiling
+it.  And you must show them these terms so they know their rights.
+
+  We protect your rights with a two-step method: (1) we copyright the
+library, and (2) we offer you this license, which gives you legal
+permission to copy, distribute and/or modify the library.
+
+  To protect each distributor, we want to make it very clear that
+there is no warranty for the free library.  Also, if the library is
+modified by someone else and passed on, the recipients should know
+that what they have is not the original version, so that the original
+author's reputation will not be affected by problems that might be
+introduced by others.
+
+  Finally, software patents pose a constant threat to the existence of
+any free program.  We wish to make sure that a company cannot
+effectively restrict the users of a free program by obtaining a
+restrictive license from a patent holder.  Therefore, we insist that
+any patent license obtained for a version of the library must be
+consistent with the full freedom of use specified in this license.
+
+  Most GNU software, including some libraries, is covered by the
+ordinary GNU General Public License.  This license, the GNU Lesser
+General Public License, applies to certain designated libraries, and
+is quite different from the ordinary General Public License.  We use
+this license for certain libraries in order to permit linking those
+libraries into non-free programs.
+
+  When a program is linked with a library, whether statically or using
+a shared library, the combination of the two is legally speaking a
+combined work, a derivative of the original library.  The ordinary
+General Public License therefore permits such linking only if the
+entire combination fits its criteria of freedom.  The Lesser General
+Public License permits more lax criteria for linking other code with
+the library.
+
+  We call this license the "Lesser" General Public License because it
+does Less to protect the user's freedom than the ordinary General
+Public License.  It also provides other free software developers Less
+of an advantage over competing non-free programs.  These disadvantages
+are the reason we use the ordinary General Public License for many
+libraries.  However, the Lesser license provides advantages in certain
+special circumstances.
+
+  For example, on rare occasions, there may be a special need to
+encourage the widest possible use of a certain library, so that it
+becomes a de-facto standard.  To achieve this, non-free programs must
+be allowed to use the library.  A more frequent case is that a free
+library does the same job as widely used non-free libraries.  In this
+case, there is little to gain by limiting the free library to free
+software only, so we use the Lesser General Public License.
+
+  In other cases, permission to use a particular library in non-free
+programs enables a greater number of people to use a large body of
+free software.  For example, permission to use the GNU C Library in
+non-free programs enables many more people to use the whole GNU
+operating system, as well as its variant, the GNU/Linux operating
+system.
+
+  Although the Lesser General Public License is Less protective of the
+users' freedom, it does ensure that the user of a program that is
+linked with the Library has the freedom and the wherewithal to run
+that program using a modified version of the Library.
+
+  The precise terms and conditions for copying, distribution and
+modification follow.  Pay close attention to the difference between a
+"work based on the library" and a "work that uses the library".  The
+former contains code derived from the library, whereas the latter must
+be combined with the library in order to run.
+
+                  GNU LESSER GENERAL PUBLIC LICENSE
+   TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
+
+  0. This License Agreement applies to any software library or other
+program which contains a notice placed by the copyright holder or
+other authorized party saying it may be distributed under the terms of
+this Lesser General Public License (also called "this License").
+Each licensee is addressed as "you".
+
+  A "library" means a collection of software functions and/or data
+prepared so as to be conveniently linked with application programs
+(which use some of those functions and data) to form executables.
+
+  The "Library", below, refers to any such software library or work
+which has been distributed under these terms.  A "work based on the
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+
+  "Source code" for a work means the preferred form of the work for
+making modifications to it.  For a library, complete source code means
+all the source code for all modules it contains, plus any associated
+interface definition files, plus the scripts used to control
+compilation and installation of the library.
+
+  Activities other than copying, distribution and modification are not
+covered by this License; they are outside its scope.  The act of
+running a program using the Library is not restricted, and output from
+such a program is covered only if its contents constitute a work based
+on the Library (independent of the use of the Library in a tool for
+writing it).  Whether that is true depends on what the Library does
+and what the program that uses the Library does.
+
+  1. You may copy and distribute verbatim copies of the Library's
+complete source code as you receive it, in any medium, provided that
+you conspicuously and appropriately publish on each copy an
+appropriate copyright notice and disclaimer of warranty; keep intact
+all the notices that refer to this License and to the absence of any
+warranty; and distribute a copy of this License along with the
+Library.
+
+  You may charge a fee for the physical act of transferring a copy,
+and you may at your option offer warranty protection in exchange for a
+fee.
+
+  2. You may modify your copy or copies of the Library or any portion
+of it, thus forming a work based on the Library, and copy and
+distribute such modifications or work under the terms of Section 1
+above, provided that you also meet all of these conditions:
+
+    a) The modified work must itself be a software library.
+
+    b) You must cause the files modified to carry prominent notices
+    stating that you changed the files and the date of any change.
+
+    c) You must cause the whole of the work to be licensed at no
+    charge to all third parties under the terms of this License.
+
+    d) If a facility in the modified Library refers to a function or a
+    table of data to be supplied by an application program that uses
+    the facility, other than as an argument passed when the facility
+    is invoked, then you must make a good faith effort to ensure that,
+    in the event an application does not supply such function or
+    table, the facility still operates, and performs whatever part of
+    its purpose remains meaningful.
+
+    (For example, a function in a library to compute square roots has
+    a purpose that is entirely well-defined independent of the
+    application.  Therefore, Subsection 2d requires that any
+    application-supplied function or table used by this function must
+    be optional: if the application does not supply it, the square
+    root function must still compute square roots.)
+
+These requirements apply to the modified work as a whole.  If
+identifiable sections of that work are not derived from the Library,
+and can be reasonably considered independent and separate works in
+themselves, then this License, and its terms, do not apply to those
+sections when you distribute them as separate works.  But when you
+distribute the same sections as part of a whole which is a work based
+on the Library, the distribution of the whole must be on the terms of
+this License, whose permissions for other licensees extend to the
+entire whole, and thus to each and every part regardless of who wrote
+it.
+
+Thus, it is not the intent of this section to claim rights or contest
+your rights to work written entirely by you; rather, the intent is to
+exercise the right to control the distribution of derivative or
+collective works based on the Library.
+
+In addition, mere aggregation of another work not based on the Library
+with the Library (or with a work based on the Library) on a volume of
+a storage or distribution medium does not bring the other work under
+the scope of this License.
+
+  3. You may opt to apply the terms of the ordinary GNU General Public
+License instead of this License to a given copy of the Library.  To do
+this, you must alter all the notices that refer to this License, so
+that they refer to the ordinary GNU General Public License, version 2,
+instead of to this License.  (If a newer version than version 2 of the
+ordinary GNU General Public License has appeared, then you can specify
+that version instead if you wish.)  Do not make any other change in
+these notices.
+
+  Once this change is made in a given copy, it is irreversible for
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+That's all there is to it!
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+
--- linux-mvl-dove-2.6.32.orig/ubuntu/compcache/Makefile
+++ linux-mvl-dove-2.6.32/ubuntu/compcache/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_BLK_DEV_COMPCACHE) := ramzswap.o xvmalloc.o
--- linux-mvl-dove-2.6.32.orig/ubuntu/compcache/xvmalloc_int.h
+++ linux-mvl-dove-2.6.32/ubuntu/compcache/xvmalloc_int.h
@@ -0,0 +1,86 @@
+/*
+ * xvmalloc_int.c
+ *
+ * Copyright (C) 2008, 2009  Nitin Gupta
+ *
+ * This code is released using a dual license strategy: GPL/LGPL
+ * You can choose the licence that better fits your requirements.
+ *
+ * Released under the terms of GNU General Public License Version 2.0
+ * Released under the terms of GNU Lesser General Public License Version 2.1
+ */
+
+#ifndef _XVMALLOC_INT_H_
+#define _XVMALLOC_INT_H_
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+
+/* User configurable params */
+
+/* This must be greater than sizeof(LinkFree) */
+#define XV_MIN_ALLOC_SIZE       32
+#define XV_MAX_ALLOC_SIZE       (PAGE_SIZE - XV_ALIGN)
+
+/* Must be power of two */
+#define XV_ALIGN_SHIFT	2
+#define XV_ALIGN	(1 << XV_ALIGN_SHIFT)
+#define XV_ALIGN_MASK	(XV_ALIGN - 1)
+
+/* Free lists are separated by FL_DELTA bytes */
+#define FL_DELTA_SHIFT	3
+#define FL_DELTA	(1 << FL_DELTA_SHIFT)
+#define FL_DELTA_MASK	(FL_DELTA - 1)
+#define NUM_FREE_LISTS	((XV_MAX_ALLOC_SIZE - XV_MIN_ALLOC_SIZE) \
+				/ FL_DELTA + 1)
+
+#define MAX_FLI		DIV_ROUND_UP(NUM_FREE_LISTS, BITS_PER_LONG)
+
+/* End of user params */
+
+enum blockflags {
+	BLOCK_FREE,
+	PREV_FREE,
+	__NR_BLOCKFLAGS,
+};
+
+#define FLAGS_MASK	XV_ALIGN_MASK
+#define PREV_MASK	(~FLAGS_MASK)
+
+struct freelist_entry {
+	u32 pagenum;
+	u16 offset;
+	u16 pad;
+};
+
+struct link_free {
+	u32 prev_pagenum;
+	u32 next_pagenum;
+	u16 prev_offset;
+	u16 next_offset;
+};
+
+struct block_header {
+	union {
+		/* This common header must be ALIGN bytes */
+		u8 common[XV_ALIGN];
+		struct {
+			u16 size;
+			u16 prev;
+		};
+	};
+	struct link_free link;
+};
+
+struct xv_pool {
+	ulong flbitmap;
+	ulong slbitmap[MAX_FLI];
+	spinlock_t lock;
+
+	struct freelist_entry freelist[NUM_FREE_LISTS];
+
+	/* stats */
+	u64 total_pages;
+};
+
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/compcache/compat.h
+++ linux-mvl-dove-2.6.32/ubuntu/compcache/compat.h
@@ -0,0 +1,34 @@
+#ifndef _CCACHE_COMPAT_H_
+#define _CCACHE_COMPAT_H_
+
+#include <linux/version.h>
+
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,23)
+#define BIO_IO_ERROR(bio)	bio_io_error(bio, PAGE_SIZE)
+#define BIO_ENDIO(bio, error)	bio_endio(bio, PAGE_SIZE, error)
+#else
+#define BIO_IO_ERROR(bio)	bio_io_error(bio)
+#define BIO_ENDIO(bio, error)	bio_endio(bio, error)
+#endif
+
+#ifndef pr_err
+#define pr_err(fmt, arg...) \
+	printk(KERN_ERR fmt, ##arg)
+#endif
+
+#ifndef pr_warning
+#define pr_warning(fmt, arg...) \
+	printk(KERN_WARNING fmt, ##arg)
+#endif
+
+#ifndef pr_info
+#define pr_info(fmt, arg...) \
+	printk(KERN_ERR fmt, ##arg)
+#endif
+
+#ifdef bio_discard
+#define SWAP_DISCARD_SUPPORTED
+#endif
+
+#endif
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/compcache/xvmalloc.h
+++ linux-mvl-dove-2.6.32/ubuntu/compcache/xvmalloc.h
@@ -0,0 +1,30 @@
+/*
+ * xvmalloc.h
+ *
+ * Copyright (C) 2008, 2009  Nitin Gupta
+ *
+ * This code is released using a dual license strategy: GPL/LGPL
+ * You can choose the licence that better fits your requirements.
+ *
+ * Released under the terms of GNU General Public License Version 2.0
+ * Released under the terms of GNU Lesser General Public License Version 2.1
+ */
+
+#ifndef _XVMALLOC_H_
+#define _XVMALLOC_H_
+
+#include <linux/types.h>
+
+struct xv_pool;
+
+struct xv_pool *xv_create_pool(void);
+void xv_destroy_pool(struct xv_pool *pool);
+
+int xv_malloc(struct xv_pool *pool, u32 size, u32 *pagenum, u32 *offset,
+							gfp_t flags);
+void xv_free(struct xv_pool *pool, u32 pagenum, u32 offset);
+
+u32 xv_get_object_size(void *obj);
+u64 xv_get_total_size_bytes(struct xv_pool *pool);
+
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/compcache/GPL.txt
+++ linux-mvl-dove-2.6.32/ubuntu/compcache/GPL.txt
@@ -0,0 +1,280 @@
+		    GNU GENERAL PUBLIC LICENSE
+		       Version 2, June 1991
+
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.
+                       59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
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+  4. You may not copy, modify, sublicense, or distribute the Program
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+modifying or distributing the Program (or any work based on the
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+
+  6. Each time you redistribute the Program (or any work based on the
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+  7. If, as a consequence of a court judgment or allegation of patent
+infringement or for any other reason (not limited to patent issues),
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+
+If any portion of this section is held invalid or unenforceable under
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+
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+
+This section is intended to make thoroughly clear what is believed to
+be a consequence of the rest of this License.
+
+  8. If the distribution and/or use of the Program is restricted in
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+original copyright holder who places the Program under this License
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+
+  9. The Free Software Foundation may publish revised and/or new versions
+of the General Public License from time to time.  Such new versions will
+be similar in spirit to the present version, but may differ in detail to
+address new problems or concerns.
+
+Each version is given a distinguishing version number.  If the Program
+specifies a version number of this License which applies to it and "any
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+
+  10. If you wish to incorporate parts of the Program into other free
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+			    NO WARRANTY
+
+  11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
+FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW.  EXCEPT WHEN
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+  12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
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+YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
+PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGES.
+
+		     END OF TERMS AND CONDITIONS
--- linux-mvl-dove-2.6.32.orig/ubuntu/compcache/Changelog
+++ linux-mvl-dove-2.6.32/ubuntu/compcache/Changelog
@@ -0,0 +1,82 @@
+version 0.5.3	(8/4/2009)
+ - Major cleanups.
+ - Rename module: compcache.ko -> ramzswap.ko
+ - Rename params: backing_dev -> backing_swap
+ - Updated use_compcache.sh script with detailed
+   documentation on parameters.
+ - LZO de/compress modules are no longer packaged
+   with compcache. Most distros now include these.
+
+version 0.5.2	(11/3/2009)
+ - Can forward incompressible pages to physical swap disk.
+ - New module params:
+ 	- memlimit_kb
+	- disksize_kb
+	- backing_dev
+   See use_compcache.sh for documentation on these params.
+ - Modified use_compcache.sh script to handle new params.
+ - Detect zero-filled pages and don't allocate any memory
+   for them.
+
+version 0.5.1	(22/1/2009)
+ - Fix crash on x86 systems with higmem (mem > ~1G).
+   This required minor changes to atomic (un)map functions (see Issue #20).
+
+version 0.5	(16/1/2009)
+ - Fix crash in case compcache init fails.
+
+version 0.5pre4	(10/1/2009)
+ - Support discarding pages for freed swap blocks (requires 2.6.28-git14).
+   This feature will be disabled if compiled for older kernel.
+ - Mark ramzswap as "solid-state" block device (requires 2.6.26-git14).
+ - Fixed incorrect stats reporting in /proc/compcache (some
+   new stats added too).
+
+version 0.5pre3	(5/1/2009)
+ - Use kmap_atomic() in xvMalloc. This fixes issue #19
+ - Remove xvMapPage() and xvUnmapMap() from xvMalloc.
+
+version 0.5pre2 (28/10/2008)
+ - Alloc full page for uncompressible pages instead
+   of returning I/O error.
+ - Warn users when using ramzswap > (2 x RAM size)
+
+version 0.5pre1 (15/10/2008)
+ - Replaced TLSF with xvMalloc memory allocator
+   http://code.google.com/p/compcache/wiki/xvMalloc
+
+version 0.4	(13/8/2008)
+ - Enable debug and stats option for compcache and tlsf by default
+   proc nodes: /proc/{tlsfinfo,compcache}
+ - Fix crash when reading /proc/tlsfinfo
+ - Lots of cleanups: clean compile on x64
+ 
+version 0.3	(17/3/2008)
+ - Fix spurious swap read failures
+ - Better swap request filtering
+ - Swap device again renamed to /dev/ramzswap0
+   This is to prevent Ubuntu installer from presenting
+   this device as possible installation target (see Issue #5)
+ - use_compcache.sh script now waits for disk node to be created
+   instead of arbitrary sleep (see Issue #6).
+ - Modified scripts: use_compcache.sh and unuse_compcache.sh
+   to now use new device name (compcache0 -> ramzswap0).
+
+version 0.2	(3/3/2008)
+ - Fixed bug on systems with highmem
+ - Better filtering-out of non-swap requests
+ - Export statistics through proc nodes:
+   - /proc/compcache
+   - /proc/tlsfinfo
+ - Debug and Statistics support for allocator
+   and compcache can now be individually turned
+   on/off by setting DEBUG, STATS to 0/1 in
+   respective header files
+ - Swap device now renamed to /dev/compcache0
+ - Added scripts: use_compcache.sh and unuse_compcache.sh
+   See README for usage
+ - Default compcache size set to 25% of RAM
+ - Lots of code cleanups
+ - Updated README
+ - Created Changelog :)
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/compcache/README
+++ linux-mvl-dove-2.6.32/ubuntu/compcache/README
@@ -0,0 +1,45 @@
+ramzswap: Compressed RAM based swap device
+-------------------------------------------
+
+Project home: http://compcache.googlecode.com
+
+* Introduction
+This is a RAM based block device which acts as swap disk.
+Pages swapped to this device are compressed and stored in
+memory itself. See project home for use cases, performance
+numbers and lot more.
+
+* Compiling
+ - Run 'make': this will compile all modules against your kernel.
+
+ - Following kernel modules are created:
+   - xvmalloc.ko
+   - ramzswap.ko
+
+* Using
+ - Following scipts are included
+   - use_ramzswap.sh [<disksize(KB)|<memlimit(KB)>] [<backing_swap>]
+     This loads all required modules and sets up swap device.
+     NOTE: script contains detailed documentation on parameters.
+
+   - unuse_ramzswap.sh
+     Unloads all modules and turns off ramzswap swap device.
+
+* Common Problems
+ - If you get lots of compile errors, make sure you have package for
+   kernel source installed. For e.g., on Fedora its 'kernel-devel' package.
+
+ - If (un)use_ramzswap scripts fail to work, refer to wiki:
+   http://code.google.com/p/compcache/wiki/CompilingAndUsing
+
+* Notes
+ - Statistics are exported via /proc/ramzswap
+
+Please consider using Issue Tracker:
+http://code.google.com/p/compcache/issues/list
+for reporting any bugs/feature requests.
+
+Cheers!
+Nitin Gupta
+EMail: ngupta at vflare dot org
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/compcache/ramzswap.c
+++ linux-mvl-dove-2.6.32/ubuntu/compcache/ramzswap.c
@@ -0,0 +1,1049 @@
+/*
+ * Compressed RAM based swap device
+ *
+ * Copyright (C) 2008, 2009  Nitin Gupta
+ *
+ * This RAM based block device acts as swap disk.
+ * Pages swapped to this device are compressed and
+ * stored in memory.
+ *
+ * Released under the terms of GNU General Public License Version 2.0
+ *
+ * Project home: http://compcache.googlecode.com
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/bitops.h>
+#include <linux/blkdev.h>
+#include <linux/buffer_head.h>
+#include <linux/device.h>
+#include <linux/genhd.h>
+#include <linux/highmem.h>
+#include <linux/lzo.h>
+#include <linux/mutex.h>
+#include <linux/proc_fs.h>
+#include <linux/string.h>
+#include <linux/swap.h>
+#include <linux/swapops.h>
+#include <linux/vmalloc.h>
+
+#include "compat.h"
+#include "ramzswap.h"
+
+/* Globals */
+static struct ramzswap rzs;
+static struct ramzswap_stats stats;
+/*
+ * Pages that compress to larger than this size are
+ * forwarded to backing swap, if present or stored
+ * uncompressed in memory otherwise.
+ */
+static unsigned int MAX_CPAGE_SIZE;
+
+/* Module params (documentation at end) */
+static unsigned long disksize_kb;
+static unsigned long memlimit_kb;
+static char *backing_swap;
+
+static int __init ramzswap_init(void);
+static struct block_device_operations ramzswap_devops = {
+	.owner = THIS_MODULE,
+};
+
+static int test_flag(u32 index, enum rzs_pageflags flag)
+{
+	return rzs.table[index].flags & BIT(flag);
+}
+
+static void set_flag(u32 index, enum rzs_pageflags flag)
+{
+	rzs.table[index].flags |= BIT(flag);
+}
+
+static void clear_flag(u32 index, enum rzs_pageflags flag)
+{
+	rzs.table[index].flags &= ~BIT(flag);
+}
+
+static int page_zero_filled(void *ptr)
+{
+	u32 pos;
+	u64 *page;
+
+	page = (u64 *)ptr;
+
+	for (pos = 0; pos != PAGE_SIZE / sizeof(*page); pos++) {
+		if (page[pos])
+			return 0;
+	}
+
+	return 1;
+}
+
+/*
+ * Given <pagenum, offset> pair, provide a dereferencable pointer.
+ */
+static void *get_ptr_atomic(u32 pagenum, u16 offset, enum km_type type)
+{
+	unsigned char *page;
+
+	page = kmap_atomic(pfn_to_page(pagenum), type);
+	return page + offset;
+}
+
+static void put_ptr_atomic(void *ptr, enum km_type type)
+{
+	kunmap_atomic(ptr, type);
+}
+
+#if defined(STATS)
+static struct proc_dir_entry *proc;
+
+static int proc_ramzswap_read(char *page, char **start, off_t off,
+				int count, int *eof, void *data)
+{
+	int len;
+	size_t succ_writes, mem_used;
+	unsigned int good_compress_perc = 0, no_compress_perc = 0;
+
+	mem_used = xv_get_total_size_bytes(rzs.mem_pool)
+			+ (stats.pages_expand << PAGE_SHIFT);
+
+	if (off > 0) {
+		*eof = 1;
+		return 0;
+	}
+
+#define K(x)	((x) >> 10)
+	/* Basic stats */
+	len = sprintf(page,
+		"DiskSize:	%8zu kB\n",
+		(size_t)(K(rzs.disksize)));
+
+	if (rzs.backing_swap) {
+		/* This must always be less than ComprDataSize */
+		len += sprintf(page + len,
+			"MemLimit:	%8zu kB\n",
+			K(rzs.memlimit));
+	}
+
+	succ_writes = stats.num_writes - stats.failed_writes;
+
+	if (succ_writes && stats.pages_stored) {
+		good_compress_perc = stats.good_compress * 100
+					/ stats.pages_stored;
+		no_compress_perc = stats.pages_expand * 100
+					/ stats.pages_stored;
+	}
+
+	/* Extended stats */
+	len += sprintf(page + len,
+		"NumReads:	%8llu\n"
+		"NumWrites:	%8llu\n"
+		"FailedReads:	%8llu\n"
+		"FailedWrites:	%8llu\n"
+		"InvalidIO:	%8llu\n"
+		"PagesDiscard:	%8llu\n"
+		"ZeroPages:	%8u\n"
+		"GoodCompress:	%8u %%\n"
+		"NoCompress:	%8u %%\n"
+		"PagesStored:	%8u\n"
+		"PagesUsed:	%8zu\n"
+		"OrigDataSize:	%8zu kB\n"
+		"ComprDataSize:	%8zu kB\n"
+		"MemUsedTotal:	%8zu kB\n",
+		stats.num_reads,
+		stats.num_writes,
+		stats.failed_reads,
+		stats.failed_writes,
+		stats.invalid_io,
+		stats.pages_discard,
+		stats.pages_zero,
+		good_compress_perc,
+		no_compress_perc,
+		stats.pages_stored,
+		mem_used >> PAGE_SHIFT,
+		(size_t)(K(stats.pages_stored << PAGE_SHIFT)),
+		(size_t)(K(stats.compr_size)),
+		(size_t)(K(mem_used)));
+
+	if (rzs.backing_swap) {
+		/* This must always be less than ComprDataSize */
+		len += sprintf(page + len,
+			"BDevNumReads:	%8llu\n"
+			"BDevNumWrites:	%8llu\n",
+			stats.bdev_num_reads,
+			stats.bdev_num_writes);
+	}
+
+	return len;
+}
+#endif	/* STATS */
+
+/*
+ * Check if value of backing_swap module param is sane.
+ * Claim this device and set ramzswap size equal to
+ * size of this block device.
+ */
+static int setup_backing_swap(void)
+{
+	int error = 0;
+	struct inode *inode;
+	struct file *swap_file;
+	struct address_space *mapping;
+	struct block_device *bdev = NULL;
+
+	if (backing_swap == NULL) {
+		pr_debug(C "backing_swap param not given\n");
+		goto out;
+	}
+
+	pr_info(C "Using backing swap device: %s\n", backing_swap);
+
+	swap_file = filp_open(backing_swap, O_RDWR | O_LARGEFILE, 0);
+	if (IS_ERR(swap_file)) {
+		pr_err(C "Error opening backing device: %s\n", backing_swap);
+		error = -EINVAL;
+		goto out;
+	}
+
+	mapping = swap_file->f_mapping;
+	inode = mapping->host;
+
+	if (S_ISBLK(inode->i_mode)) {
+		bdev = I_BDEV(inode);
+		error = bd_claim(bdev, ramzswap_init);
+		if (error < 0) {
+			bdev = NULL;
+			goto bad_param;
+		}
+		rzs.old_block_size = block_size(bdev);
+		error = set_blocksize(bdev, PAGE_SIZE);
+		if (error < 0)
+			goto bad_param;
+	} else {
+		/* TODO: support for regular file as backing swap */
+		pr_info(C "%s is not a block device.\n", backing_swap);
+		error = -EINVAL;
+		goto out;
+	}
+
+	rzs.swap_file = swap_file;
+	rzs.backing_swap = bdev;
+	rzs.disksize = i_size_read(inode);
+	BUG_ON(!rzs.disksize);
+
+	return 0;
+
+bad_param:
+	if (bdev) {
+		set_blocksize(bdev, rzs.old_block_size);
+		bd_release(bdev);
+	}
+	filp_close(swap_file, NULL);
+
+out:
+	rzs.backing_swap = NULL;
+	return error;
+}
+
+/*
+ * Check if request is within bounds and page aligned.
+ */
+static inline int valid_swap_request(struct bio *bio)
+{
+	if (unlikely(
+		(bio->bi_sector >= (rzs.disksize >> SECTOR_SHIFT)) ||
+		(bio->bi_sector & (SECTORS_PER_PAGE - 1)) ||
+		(bio->bi_vcnt != 1) ||
+		(bio->bi_size != PAGE_SIZE) ||
+		(bio->bi_io_vec[0].bv_offset != 0))) {
+
+		return 0;
+	}
+
+	/* swap request is valid */
+	return 1;
+}
+
+static void ramzswap_free_page(size_t index)
+{
+	u32 clen;
+	void *obj;
+
+	u32 pagenum = rzs.table[index].pagenum;
+	u32 offset = rzs.table[index].offset;
+
+	if (unlikely(test_flag(index, RZS_UNCOMPRESSED))) {
+		clen = PAGE_SIZE;
+		__free_page(pfn_to_page(pagenum));
+		clear_flag(index, RZS_UNCOMPRESSED);
+		stat_dec(stats.pages_expand);
+		goto out;
+	}
+
+	obj = get_ptr_atomic(pagenum, offset, KM_USER0);
+	clen = xv_get_object_size(obj) - sizeof(struct zobj_header);
+	put_ptr_atomic(obj, KM_USER0);
+
+	xv_free(rzs.mem_pool, pagenum, offset);
+	stat_dec_if_less(stats.good_compress, clen, PAGE_SIZE / 2 + 1);
+
+out:
+	stats.compr_size -= clen;
+	stat_dec(stats.pages_stored);
+
+	rzs.table[index].pagenum = 0;
+	rzs.table[index].offset = 0;
+}
+
+#ifdef SWAP_DISCARD_SUPPORTED
+static int ramzswap_prepare_discard(struct request_queue *q,
+					struct request *req)
+{
+	return 0;
+}
+
+/*
+ * Called by main I/O handler function. This helper
+ * function handles 'discard' I/O requests which means
+ * that  some swap pages are no longer required, so
+ * swap device can take needed action -- we free memory
+ * allocated for these pages.
+ */
+static int ramzswap_discard(struct bio *bio)
+{
+	size_t index, start_page, num_pages;
+
+	start_page = bio->bi_sector >> SECTORS_PER_PAGE_SHIFT;
+	num_pages = bio->bi_size >> (SECTOR_SHIFT + SECTORS_PER_PAGE_SHIFT);
+
+	for (index = start_page; index < start_page + num_pages; index++) {
+		if (rzs.table[index].pagenum) {
+			ramzswap_free_page(index);
+			stat_inc(stats.pages_discard);
+		}
+	}
+
+	set_bit(BIO_UPTODATE, &bio->bi_flags);
+	BIO_ENDIO(bio, 0);
+	return 0;
+}
+#endif
+
+int handle_zero_page(struct bio *bio)
+{
+	void *user_mem;
+	struct page *page = bio->bi_io_vec[0].bv_page;
+
+	user_mem = get_ptr_atomic(page_to_pfn(page), 0, KM_USER0);
+	memset(user_mem, 0, PAGE_SIZE);
+	put_ptr_atomic(user_mem, KM_USER0);
+
+	set_bit(BIO_UPTODATE, &bio->bi_flags);
+	BIO_ENDIO(bio, 0);
+	return 0;
+}
+
+int handle_uncompressed_page(struct bio *bio)
+{
+	u32 index;
+	struct page *page;
+	unsigned char *user_mem, *cmem;
+
+	page = bio->bi_io_vec[0].bv_page;
+	index = bio->bi_sector >>SECTORS_PER_PAGE_SHIFT;
+
+	user_mem = get_ptr_atomic(page_to_pfn(page), 0, KM_USER0);
+	cmem = get_ptr_atomic(rzs.table[index].pagenum,
+			rzs.table[index].offset, KM_USER1);
+
+	memcpy(user_mem, cmem, PAGE_SIZE);
+	put_ptr_atomic(user_mem, KM_USER0);
+	put_ptr_atomic(cmem, KM_USER1);
+
+	set_bit(BIO_UPTODATE, &bio->bi_flags);
+	BIO_ENDIO(bio, 0);
+	return 0;
+}
+
+
+/*
+ * Called when request page is not present in ramzswap.
+ * Its either in backing swap device (if present) or
+ * this is an attempt to read before any previous write
+ * to this location - this happens due to readahead when
+ * swap device is read from user-space (e.g. during swapon)
+ */
+int handle_ramzswap_fault(struct bio *bio)
+{
+	void *user_mem;
+	struct page *page = bio->bi_io_vec[0].bv_page;
+
+	/*
+	 * Always forward such requests to backing swap
+	 * device (if present)
+	 */
+	if (rzs.backing_swap) {
+		stat_dec(stats.num_reads);
+		stat_inc(stats.bdev_num_reads);
+		bio->bi_bdev = rzs.backing_swap;
+		return 1;
+	}
+
+	/*
+	 * Its unlikely event in case backing dev is
+	 * not present
+	 */
+	pr_debug(C "Read before write on swap device: "
+		"sector=%lu, size=%u, offset=%u\n",
+		(ulong)(bio->bi_sector), bio->bi_size,
+		bio->bi_io_vec[0].bv_offset);
+	user_mem = kmap(page);
+	memset(user_mem, 0, PAGE_SIZE);
+	kunmap(page);
+
+	set_bit(BIO_UPTODATE, &bio->bi_flags);
+	BIO_ENDIO(bio, 0);
+	return 0;
+}
+
+int ramzswap_read(struct bio *bio)
+{
+	int ret;
+	u32 index;
+	size_t clen;
+	struct page *page;
+	struct zobj_header *zheader;
+	unsigned char *user_mem, *cmem;
+
+	stat_inc(stats.num_reads);
+
+	page = bio->bi_io_vec[0].bv_page;
+	index = bio->bi_sector >> SECTORS_PER_PAGE_SHIFT;
+
+	if (test_flag(index, RZS_ZERO))
+		return handle_zero_page(bio);
+
+	/* Requested page is not present in compressed area */
+	if (!rzs.table[index].pagenum)
+		return handle_ramzswap_fault(bio);
+
+	/* Page is stored uncompressed since its incompressible */
+	if (unlikely(test_flag(index, RZS_UNCOMPRESSED)))
+		return handle_uncompressed_page(bio);
+
+	user_mem = get_ptr_atomic(page_to_pfn(page), 0, KM_USER0);
+	clen = PAGE_SIZE;
+
+	cmem = get_ptr_atomic(rzs.table[index].pagenum,
+			rzs.table[index].offset, KM_USER1);
+
+	ret = lzo1x_decompress_safe(
+		cmem + sizeof(*zheader),
+		xv_get_object_size(cmem) - sizeof(*zheader),
+		user_mem, &clen);
+
+	put_ptr_atomic(user_mem, KM_USER0);
+	put_ptr_atomic(cmem, KM_USER1);
+
+	/* should NEVER happen */
+	if (unlikely(ret != LZO_E_OK)) {
+		pr_err(C "Decompression failed! err=%d, page=%u\n",
+			ret, index);
+		stat_inc(stats.failed_reads);
+		goto out;
+	}
+
+	set_bit(BIO_UPTODATE, &bio->bi_flags);
+	BIO_ENDIO(bio, 0);
+	return 0;
+
+out:
+	BIO_IO_ERROR(bio);
+	return 0;
+}
+
+int ramzswap_write(struct bio *bio)
+{
+	int ret, fwd_write_request = 0;
+	u32 offset;
+	size_t clen, index;
+	struct zobj_header *zheader;
+	struct page *page, *page_store;
+	unsigned char *user_mem, *cmem, *src;
+
+	stat_inc(stats.num_writes);
+
+	page = bio->bi_io_vec[0].bv_page;
+	index = bio->bi_sector >> SECTORS_PER_PAGE_SHIFT;
+
+	src = rzs.compress_buffer;
+
+	/*
+	 * System swaps to same sector again when the stored page
+	 * is no longer referenced by any process. So, its now safe
+	 * to free the memory that was allocated for this page.
+	 */
+	if (rzs.table[index].pagenum)
+		ramzswap_free_page(index);
+
+	/*
+	 * No memory ia allocated for zero filled pages.
+	 * Simply clear zero page flag.
+	 */
+	if (test_flag(index, RZS_ZERO)) {
+		stat_dec(stats.pages_zero);
+		clear_flag(index, RZS_ZERO);
+	}
+
+	mutex_lock(&rzs.lock);
+
+	user_mem = get_ptr_atomic(page_to_pfn(page), 0, KM_USER0);
+	if (page_zero_filled(user_mem)) {
+		put_ptr_atomic(user_mem, KM_USER0);
+		mutex_unlock(&rzs.lock);
+		stat_inc(stats.pages_zero);
+		set_flag(index, RZS_ZERO);
+
+		set_bit(BIO_UPTODATE, &bio->bi_flags);
+		BIO_ENDIO(bio, 0);
+		return 0;
+	}
+
+	if (rzs.backing_swap &&
+		(stats.compr_size > rzs.memlimit - PAGE_SIZE)) {
+		put_ptr_atomic(user_mem, KM_USER0);
+		mutex_unlock(&rzs.lock);
+		fwd_write_request = 1;
+		goto out;
+	}
+
+	ret = lzo1x_1_compress(user_mem, PAGE_SIZE, src, &clen,
+				rzs.compress_workmem);
+
+	put_ptr_atomic(user_mem, KM_USER0);
+
+	if (unlikely(ret != LZO_E_OK)) {
+		mutex_unlock(&rzs.lock);
+		pr_err(C "Compression failed! err=%d\n", ret);
+		stat_inc(stats.failed_writes);
+		goto out;
+	}
+
+	/*
+	 * Page is incompressible. Forward it to backing swap
+	 * if present. Otherwise, store it as-is (uncompressed)
+	 * since we do not want to return too many swap write
+	 * errors which has side effect of hanging the system.
+	 */
+	if (unlikely(clen > MAX_CPAGE_SIZE)) {
+		if (rzs.backing_swap) {
+			mutex_unlock(&rzs.lock);
+			fwd_write_request = 1;
+			goto out;
+		}
+
+		clen = PAGE_SIZE;
+		page_store = alloc_page(GFP_NOIO | __GFP_HIGHMEM);
+		if (unlikely(!page_store)) {
+			mutex_unlock(&rzs.lock);
+			stat_inc(stats.failed_writes);
+			goto out;
+		}
+
+		offset = 0;
+		set_flag(index, RZS_UNCOMPRESSED);
+		stat_inc(stats.pages_expand);
+		rzs.table[index].pagenum = page_to_pfn(page_store);
+		src = get_ptr_atomic(page_to_pfn(page), 0, KM_USER0);
+		goto memstore;
+	}
+
+	if (xv_malloc(rzs.mem_pool, clen + sizeof(*zheader),
+			&rzs.table[index].pagenum, &offset,
+			GFP_NOIO | __GFP_HIGHMEM)) {
+		mutex_unlock(&rzs.lock);
+		pr_info(C "Error allocating memory for compressed "
+			"page: %zu, size=%zu\n", index, clen);
+		stat_inc(stats.failed_writes);
+		if (rzs.backing_swap)
+			fwd_write_request = 1;
+		goto out;
+	}
+
+memstore:
+	rzs.table[index].offset = offset;
+
+	cmem = get_ptr_atomic(rzs.table[index].pagenum,
+			rzs.table[index].offset, KM_USER1);
+
+#if 0
+	/* Back-reference needed for memory defragmentation */
+	if (!test_flag(index, RZS_UNCOMPRESSED)) {
+		zheader = (struct zobj_header *)cmem;
+		zheader->table_idx = index;
+		cmem += sizeof(*zheader);
+	}
+#endif
+
+	memcpy(cmem, src, clen);
+
+	put_ptr_atomic(cmem, KM_USER1);
+	if (unlikely(test_flag(index, RZS_UNCOMPRESSED)))
+		put_ptr_atomic(src, KM_USER0);
+
+	/* Update stats */
+	stats.compr_size += clen;
+	stat_inc(stats.pages_stored);
+	stat_inc_if_less(stats.good_compress, clen, PAGE_SIZE / 2 + 1);
+
+	mutex_unlock(&rzs.lock);
+
+	set_bit(BIO_UPTODATE, &bio->bi_flags);
+	BIO_ENDIO(bio, 0);
+	return 0;
+
+out:
+	if (fwd_write_request) {
+		stat_inc(stats.bdev_num_writes);
+		bio->bi_bdev = rzs.backing_swap;
+		return 1;
+	}
+
+	BIO_IO_ERROR(bio);
+	return 0;
+}
+
+/*
+ * Handler function for all ramzswap I/O requests.
+ */
+static int ramzswap_make_request(struct request_queue *queue, struct bio *bio)
+{
+	int ret = 0;
+
+#ifdef SWAP_DISCARD_SUPPORTED
+	if (bio_discard(bio))
+		return ramzswap_discard(bio);
+#endif
+
+	if (!valid_swap_request(bio)) {
+		stat_inc(stats.invalid_io);
+		BIO_IO_ERROR(bio);
+		return 0;
+	}
+
+	switch (bio_data_dir(bio)) {
+	case READ:
+		ret = ramzswap_read(bio);
+		break;
+
+	case WRITE:
+		ret = ramzswap_write(bio);
+		break;
+	}
+
+	return ret;
+}
+
+/*
+ * Swap header (1st page of swap device) contains information
+ * to indentify it as a swap partition. Prepare such a header
+ * for ramzswap device (ramzswap0) so that swapon can identify
+ * it as swap partition. In case backing swap device is provided,
+ * copy its swap header.
+ */
+static int setup_swap_header(union swap_header *s)
+{
+	int ret = 0;
+	struct page *page;
+	struct address_space *mapping;
+	union swap_header *backing_swap_header;
+
+	/*
+	 * There is no backing swap device. Create a swap header
+	 * that is acceptable by swapon.
+	 */
+	if (rzs.backing_swap == NULL) {
+		s->info.version = 1;
+		s->info.last_page = rzs.disksize >> PAGE_SHIFT;
+		s->info.nr_badpages = 0;
+		memcpy(s->magic.magic, "SWAPSPACE2", 10);
+		return 0;
+	}
+
+	/*
+	 * We have a backing swap device. Copy its swap header
+	 * to ramzswap device header. If this header contains
+	 * invalid information (backing device not a swap
+	 * partition, etc.), swapon will fail for ramzswap
+	 * which is correct behavior - we don't want to swap
+	 * over filesystem partition!
+	 */
+
+	/* Read the backing swap header (code from sys_swapon) */
+	mapping = rzs.swap_file->f_mapping;
+	if (!mapping->a_ops->readpage) {
+		ret = -EINVAL;
+		goto out;
+	}
+
+	page = read_mapping_page(mapping, 0, rzs.swap_file);
+	if (IS_ERR(page)) {
+		ret = PTR_ERR(page);
+		goto out;
+	}
+
+	backing_swap_header = kmap(page);
+	*s = *backing_swap_header;
+	kunmap(page);
+
+out:
+	return ret;
+}
+
+static void ramzswap_set_disksize(size_t totalram_bytes)
+{
+	rzs.disksize = disksize_kb << 10;
+
+	if (!disksize_kb) {
+		pr_info(C
+		"disk size not provided. You can use disksize_kb module "
+		"param to specify size.\nUsing default: (%u%% of RAM).\n",
+		DEFAULT_DISKSIZE_PERC_RAM
+		);
+		rzs.disksize = DEFAULT_DISKSIZE_PERC_RAM *
+					(totalram_bytes / 100);
+	}
+
+	if (disksize_kb > 2 * (totalram_bytes >> 10)) {
+		pr_info(C
+		"There is little point creating a ramzswap of greater than "
+		"twice the size of memory since we expect a 2:1 compression "
+		"ratio. Note that ramzswap uses about 0.1%% of the size of "
+		"the swap device when not in use so a huge ramzswap is "
+		"wasteful.\n"
+		"\tMemory Size: %zu kB\n"
+		"\tSize you selected: %lu kB\n"
+		"Continuing anyway ...\n",
+		totalram_bytes >> 10, disksize_kb
+		);
+	}
+
+	rzs.disksize &= PAGE_MASK;
+	pr_info(C "disk size set to %zu kB\n", rzs.disksize >> 10);
+}
+
+/*
+ * memlimit cannot be greater than backing disk size.
+ */
+static void ramzswap_set_memlimit(size_t totalram_bytes)
+{
+	int memlimit_valid = 1;
+	rzs.memlimit = memlimit_kb << 10;
+
+	if (!rzs.memlimit) {
+		pr_info(C "memory limit not set. You can use "
+			"memlimit_kb module param to specify limit.");
+		memlimit_valid = 0;
+	}
+
+	if (rzs.memlimit > rzs.disksize) {
+		pr_info(C "memory limit cannot be greater than "
+			"disksize: limit=%zu, disksize=%zu",
+			rzs.memlimit, rzs.disksize);
+		memlimit_valid = 0;
+	}
+
+	if (!memlimit_valid) {
+		size_t mempart, disksize;
+		pr_info(C "\nUsing default: MIN[(%u%% of RAM), "
+			"(backing disk size)].\n",
+			DEFAULT_MEMLIMIT_PERC_RAM);
+		mempart = DEFAULT_MEMLIMIT_PERC_RAM * (totalram_bytes / 100);
+		disksize = rzs.disksize;
+		rzs.memlimit = mempart > disksize ? disksize : mempart;
+	}
+
+	if (rzs.memlimit > totalram_bytes / 2) {
+		pr_info(C
+		"Its not advisable setting limit more than half of "
+		"size of memory since we expect a 2:1 compression ratio. "
+		"Limit represents amount of *compressed* data we can keep "
+		"in memory!\n"
+		"\tMemory Size: %zu kB\n"
+		"\tLimit you selected: %lu kB\n"
+		"Continuing anyway ...\n",
+		totalram_bytes >> 10, memlimit_kb
+		);
+	}
+
+	rzs.memlimit &= PAGE_MASK;
+	BUG_ON(!rzs.memlimit);
+
+	pr_info(C "memory limit set to %zu kB\n", rzs.memlimit >> 10);
+}
+
+static int __init ramzswap_init(void)
+{
+	int ret;
+	size_t num_pages, totalram_bytes;
+	struct sysinfo i;
+	struct page *page;
+	void *swap_header;
+
+	mutex_init(&rzs.lock);
+
+	ret = setup_backing_swap();
+	if (ret)
+		goto fail;
+
+	si_meminfo(&i);
+	/* Here is a trivia: guess unit used for i.totalram !! */
+	totalram_bytes = i.totalram << PAGE_SHIFT;
+
+	if (rzs.backing_swap)
+		ramzswap_set_memlimit(totalram_bytes);
+	else
+		ramzswap_set_disksize(totalram_bytes);
+
+	rzs.compress_workmem = kmalloc(LZO1X_MEM_COMPRESS, GFP_KERNEL);
+	if (rzs.compress_workmem == NULL) {
+		pr_err(C "Error allocating compressor working memory\n");
+		ret = -ENOMEM;
+		goto fail;
+	}
+
+	rzs.compress_buffer = kmalloc(2 * PAGE_SIZE, GFP_KERNEL);
+	if (rzs.compress_buffer == NULL) {
+		pr_err(C "Error allocating compressor buffer space\n");
+		ret = -ENOMEM;
+		goto fail;
+	}
+
+	num_pages = rzs.disksize >> PAGE_SHIFT;
+	rzs.table = vmalloc(num_pages * sizeof(*rzs.table));
+	if (rzs.table == NULL) {
+		pr_err(C "Error allocating ramzswap address table\n");
+		ret = -ENOMEM;
+		goto fail;
+	}
+	memset(rzs.table, 0, num_pages * sizeof(*rzs.table));
+
+	page = alloc_page(__GFP_ZERO);
+	if (page == NULL) {
+		pr_err(C "Error allocating swap header page\n");
+		ret = -ENOMEM;
+		goto fail;
+	}
+	rzs.table[0].pagenum = page_to_pfn(page);
+	set_flag(0, RZS_UNCOMPRESSED);
+
+	swap_header = kmap(page);
+	ret = setup_swap_header((union swap_header *)(swap_header));
+	kunmap(page);
+	if (ret) {
+		pr_err(C "Error setting swap header\n");
+		goto fail;
+	}
+
+	rzs.disk = alloc_disk(1);
+	if (rzs.disk == NULL) {
+		pr_err(C "Error allocating disk structure\n");
+		ret = -ENOMEM;
+		goto fail;
+	}
+
+	rzs.disk->first_minor = 0;
+	rzs.disk->fops = &ramzswap_devops;
+	/*
+	 * It is named like this to prevent distro installers
+	 * from offering ramzswap as installation target. They
+	 * seem to ignore all devices beginning with 'ram'
+	 */
+	strcpy(rzs.disk->disk_name, "ramzswap0");
+
+	rzs.disk->major = register_blkdev(0, rzs.disk->disk_name);
+	if (rzs.disk->major < 0) {
+		pr_err(C "Cannot register block device\n");
+		ret = -EFAULT;
+		goto fail;
+	}
+
+	rzs.disk->queue = blk_alloc_queue(GFP_KERNEL);
+	if (rzs.disk->queue == NULL) {
+		pr_err(C "Cannot register disk queue\n");
+		ret = -EFAULT;
+		goto fail;
+	}
+
+	set_capacity(rzs.disk, rzs.disksize >> SECTOR_SHIFT);
+	blk_queue_make_request(rzs.disk->queue, ramzswap_make_request);
+
+#ifdef QUEUE_FLAG_NONROT
+	/*
+	 * Assuming backing device is "rotational" type.
+	 * TODO: check if its actually "non-rotational" (SSD).
+	 *
+	 * We have ident mapping of sectors for ramzswap and
+	 * and the backing swap device. So, this queue flag
+	 * should be according to backing dev.
+	 */
+	if (!rzs.backing_swap)
+		queue_flag_set_unlocked(QUEUE_FLAG_NONROT, rzs.disk->queue);
+#endif
+#ifdef SWAP_DISCARD_SUPPORTED
+	blk_queue_set_discard(rzs.disk->queue, ramzswap_prepare_discard);
+#endif
+	blk_queue_logical_block_size(rzs.disk->queue, PAGE_SIZE);
+	add_disk(rzs.disk);
+
+	rzs.mem_pool = xv_create_pool();
+	if (!rzs.mem_pool) {
+		pr_err(C "Error creating memory pool\n");
+		ret = -ENOMEM;
+		goto fail;
+	}
+
+#if defined(STATS)
+	proc = create_proc_entry("ramzswap", S_IRUGO, NULL);
+	if (proc)
+		proc->read_proc = &proc_ramzswap_read;
+	else {
+		ret = -ENOMEM;
+		pr_warning(C "Error creating proc entry\n");
+		goto fail;
+	}
+#endif
+
+	/*
+	 * Pages that compress to size greater than this are forwarded
+	 * to physical swap disk (if backing dev is provided)
+	 */
+	if (rzs.backing_swap)
+		MAX_CPAGE_SIZE = MAX_CPAGE_SIZE_BDEV;
+	else
+		MAX_CPAGE_SIZE = MAX_CPAGE_SIZE_NOBDEV;
+
+	pr_debug(C "Max compressed page size: %u bytes\n", MAX_CPAGE_SIZE);
+
+	pr_debug(C "Initialization done!\n");
+	return 0;
+
+fail:
+	if (rzs.disk != NULL) {
+		if (rzs.disk->major > 0)
+			unregister_blkdev(rzs.disk->major, rzs.disk->disk_name);
+		del_gendisk(rzs.disk);
+	}
+
+	if (rzs.table && rzs.table[0].pagenum)
+		__free_page(pfn_to_page(rzs.table[0].pagenum));
+	kfree(rzs.compress_workmem);
+	kfree(rzs.compress_buffer);
+	vfree(rzs.table);
+	xv_destroy_pool(rzs.mem_pool);
+#if defined(STATS)
+	if (proc)
+		remove_proc_entry("ramzswap", proc->parent);
+#endif
+	pr_err(C "Initialization failed: err=%d\n", ret);
+	return ret;
+}
+
+static void __exit ramzswap_exit(void)
+{
+	size_t index, num_pages;
+	num_pages = rzs.disksize >> PAGE_SHIFT;
+
+	unregister_blkdev(rzs.disk->major, rzs.disk->disk_name);
+	del_gendisk(rzs.disk);
+
+	/* Close backing swap device (if present) */
+	if (rzs.backing_swap) {
+		set_blocksize(rzs.backing_swap, rzs.old_block_size);
+		bd_release(rzs.backing_swap);
+		filp_close(rzs.swap_file, NULL);
+	}
+
+	__free_page(pfn_to_page(rzs.table[0].pagenum));
+	kfree(rzs.compress_workmem);
+	kfree(rzs.compress_buffer);
+
+	/* Free all pages that are still in ramzswap */
+	for (index = 1; index < num_pages; index++) {
+		u32 pagenum, offset;
+
+		pagenum = rzs.table[index].pagenum;
+		offset = rzs.table[index].offset;
+
+		if (!pagenum)
+			continue;
+
+		if (unlikely(test_flag(index, RZS_UNCOMPRESSED)))
+			__free_page(pfn_to_page(pagenum));
+		else
+			xv_free(rzs.mem_pool, pagenum, offset);
+	}
+
+	vfree(rzs.table);
+	xv_destroy_pool(rzs.mem_pool);
+
+#if defined(STATS)
+	remove_proc_entry("ramzswap", proc->parent);
+#endif
+	pr_debug(C "cleanup done!\n");
+}
+
+/*
+ * This param is applicable only when there is no backing swap device.
+ * We ignore this param in case backing dev is provided since then its
+ * always equal to size of the backing swap device.
+ *
+ * This size refers to amount of (uncompressed) data it can hold.
+ * For e.g. disksize_kb=1024 means it can hold 1024kb worth of
+ * uncompressed data even if this data compresses to just, say, 100kb.
+ *
+ * Default value is used if this param is missing or 0 (if its applicable).
+ * Default: [DEFAULT_DISKSIZE_PERC_RAM]% of RAM
+ */
+module_param(disksize_kb, ulong, 0);
+MODULE_PARM_DESC(disksize_kb, "ramzswap device size (kB)");
+
+/*
+ * This param is applicable only when backing swap device is provided.
+ * This refers to limit on amount of (compressed) data it can hold in
+ * memory. Note that total amount of memory used (MemUsedTotal) can
+ * exceed this memlimit since that includes memory wastage due to
+ * fragmentation and metadata overhead.
+ *
+ * Any additional data beyond this limit is forwarded to backing
+ * swap device. TODO: allow changing memlimit at runtime.
+ *
+ * Default value is used if this param is missing or 0 (if its applicable).
+ * Default: MIN([DEFAULT_MEMLIMIT_PERC_RAM]% of RAM, Backing Device Size)
+ */
+module_param(memlimit_kb, ulong, 0);
+MODULE_PARM_DESC(memlimit_kb, "ramzswap memory limit (kB)");
+
+/*
+ * This is block device to be used as backing store for ramzswap.
+ * When pages more than memlimit_kb as swapped to ramzswap, we store
+ * any additional pages in this device. We may also move some pages
+ * from ramzswap to this device in case system is really low on
+ * memory (TODO).
+ *
+ * This device is not directly visible to kernel as a swap device
+ * (/proc/swaps will only show /dev/ramzswap0 and not this device).
+ * Managing this backing device is the job of ramzswap module.
+ */
+module_param(backing_swap, charp, 0);
+MODULE_PARM_DESC(backing_swap, "Backing swap partition");
+
+module_init(ramzswap_init);
+module_exit(ramzswap_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Nitin Gupta <ngupta@vflare.org>");
+MODULE_DESCRIPTION("Compressed RAM Based Swap Device");
--- linux-mvl-dove-2.6.32.orig/ubuntu/rfkill/Kconfig
+++ linux-mvl-dove-2.6.32/ubuntu/rfkill/Kconfig
@@ -0,0 +1,9 @@
+config AVERATEC_5100P
+	tristate "Software kill switch for Averatec 5100P"
+	depends on X86
+	default m
+
+config PACKARDBELL_E5
+	tristate "Software kill switch for Packard Bell EasyNote E5"
+	depends on X86
+	default m
--- linux-mvl-dove-2.6.32.orig/ubuntu/rfkill/BOM
+++ linux-mvl-dove-2.6.32/ubuntu/rfkill/BOM
@@ -0,0 +1,6 @@
+Downloaded from:	http://sourceforge.net/project/showfiles.php?group_id=108766
+Current Version:	1.3
+Comments:
+
+Had to change &proc_root to NULL due to changes in create/remove proc
+entry usage.
--- linux-mvl-dove-2.6.32.orig/ubuntu/rfkill/pbe5.c
+++ linux-mvl-dove-2.6.32/ubuntu/rfkill/pbe5.c
@@ -0,0 +1,205 @@
+/*******************************************************************************
+  
+  This program is free software; you can redistribute it and/or modify it 
+  under the terms of version 2 of the GNU General Public License as 
+  published by the Free Software Foundation.
+  
+  This program is distributed in the hope that it will be useful, but WITHOUT 
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for 
+  more details.
+  
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc., 59 
+  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
+  
+  The full GNU General Public License is included in this distribution in the
+  file called LICENSE.
+  
+  Author:
+  Pedro Ramalhais <pmr09313@students.fct.unl.pt>
+  
+  Based on:
+  av5100.c from http://ipw2100.sourceforge.net/
+
+*******************************************************************************/
+
+#include <linux/compiler.h>
+#include <linux/errno.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/netdevice.h>
+#include <linux/version.h>
+#include <linux/proc_fs.h>
+#include <linux/ioport.h>
+#include <asm/uaccess.h>
+#include <asm/io.h>
+
+#define DRV_NAME		"pbe5"
+#define DRV_VERSION		"1.3"
+#define DRV_DESCRIPTION		"SW RF kill switch for Packard Bell EasyNote E5"
+#define DRV_AUTHOR		"Pedro Ramalhais"
+#define DRV_LICENSE		"GPL"
+
+static int radio = 1;
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+
+MODULE_PARM(radio, "i");
+
+#else /* LINUX_VERSION_CODE < 2.6.0 */
+
+#include <linux/moduleparam.h>
+module_param(radio, int, 1);
+
+#endif /* LINUX_VERSION_CODE < 2.6.0 */
+
+MODULE_PARM_DESC(radio, "controls state of radio (1=on, 0=off)");
+
+MODULE_DESCRIPTION(DRV_DESCRIPTION);
+MODULE_AUTHOR(DRV_AUTHOR);
+MODULE_LICENSE(DRV_LICENSE);
+
+/*
+ * NOTE: These values were obtained from disassembling the Icon.exe program
+ * installed in the Packard Bell EasyNote E5 laptop. The names were guessed,
+ * so don't rely on them.
+ */
+#define PBE5_PORT_TOGGLE	0x0b3
+#define PBE5_VALUE_TOGGLE_ON	0x01
+#define PBE5_VALUE_TOGGLE_OFF	0x00
+#define PBE5_PORT_APPLY		0x0b2
+#define PBE5_VALUE_APPLY	0xef
+
+// Some "booleans" =;-)
+#define PBE5_RADIO_OFF	0
+#define PBE5_RADIO_ON	1
+
+static int pbe5_radio_status = PBE5_RADIO_ON;
+
+unsigned char pbe5_get_radio(void)
+{
+	unsigned char val = 0x00;
+
+	val = inb(PBE5_PORT_TOGGLE);
+
+	return val;
+}
+
+static void pbe5_set_radio(int state_set)
+{
+	pbe5_radio_status = pbe5_get_radio();
+
+	if (pbe5_radio_status != state_set) {
+		// Set the radio toggle register
+		outb(PBE5_VALUE_TOGGLE_ON, PBE5_PORT_TOGGLE);
+		// Commit the radio toggle register value
+		outb(PBE5_VALUE_APPLY, PBE5_PORT_APPLY);
+		// Update the radio status
+		pbe5_radio_status = pbe5_get_radio();
+
+		printk(KERN_INFO DRV_NAME ": Radio turned %s\n",
+			(state_set  == PBE5_RADIO_ON) ? "ON" : "OFF");
+	} else {
+		printk(KERN_INFO DRV_NAME ": Radio already %s\n",
+			(state_set  == PBE5_RADIO_ON) ? "ON" : "OFF");
+	}
+}
+
+
+/*
+ * proc stuff
+ */
+static struct proc_dir_entry *dir_base = NULL;
+
+static int proc_set_radio(struct file *file, const char *buffer, 
+			  unsigned long count, void *data)
+{
+	pbe5_set_radio(buffer[0] == '0' ? PBE5_RADIO_OFF : PBE5_RADIO_ON);
+
+	return count;
+}
+
+static int proc_get_radio(char *page, char **start, off_t offset,
+			  int count, int *eof, void *data)
+{
+	int len = 0;
+
+	len += snprintf(page, count, DRV_NAME ": %d\n", 
+			pbe5_radio_status == PBE5_RADIO_OFF ? 0 : 1);
+
+	*eof = 1;
+	return len;
+}
+
+
+static void pbe5_proc_cleanup(void)
+{
+	if (dir_base) {
+		remove_proc_entry("radio", dir_base);
+		remove_proc_entry(DRV_NAME, NULL);
+		dir_base = NULL;
+	}
+}
+
+
+static int pbe5_proc_init(void)
+{
+	struct proc_dir_entry *ent;
+	int err = 0;
+
+	dir_base = create_proc_entry(DRV_NAME, S_IFDIR, NULL);
+	if (dir_base == NULL) {
+		printk(KERN_ERR DRV_NAME ": Unable to initialise /proc/"
+		       DRV_NAME "\n");
+		err = -ENOMEM;
+		goto fail;
+	}
+
+
+	ent = create_proc_entry("radio", S_IFREG | S_IRUGO | S_IWUSR,
+				dir_base);
+	if (ent) {
+		ent->read_proc = proc_get_radio;
+		ent->write_proc = proc_set_radio;
+	} else {
+		printk(KERN_ERR
+		       "Unable to initialize /proc/" DRV_NAME "/radio\n");
+		err = -ENOMEM;
+		goto fail;
+	}
+
+	return 0;
+
+ fail:
+	pbe5_proc_cleanup();
+	return err;
+}
+
+/*
+ * module stuff
+ */
+static int __init pbe5_init(void)
+{
+	pbe5_proc_init();
+
+	pbe5_set_radio((radio == 1) ? PBE5_RADIO_ON : PBE5_RADIO_OFF);
+
+	return 0;
+}
+
+static void __exit pbe5_exit(void)
+{
+	pbe5_set_radio(PBE5_RADIO_OFF);
+
+	pbe5_proc_cleanup();
+}
+
+module_init(pbe5_init);
+module_exit(pbe5_exit);
+
+/*
+         1         2         3         4         5         6         7
+12345678901234567890123456789012345678901234567890123456789012345678901234567890
+*/
--- linux-mvl-dove-2.6.32.orig/ubuntu/rfkill/Makefile
+++ linux-mvl-dove-2.6.32/ubuntu/rfkill/Makefile
@@ -0,0 +1,6 @@
+#
+# Makefile for Ubuntu additional drivers
+#
+
+obj-$(CONFIG_AVERATEC_5100P)	+= av5100.o
+obj-$(CONFIG_PACKARDBELL_E5)	+= pbe5.o
--- linux-mvl-dove-2.6.32.orig/ubuntu/rfkill/av5100.c
+++ linux-mvl-dove-2.6.32/ubuntu/rfkill/av5100.c
@@ -0,0 +1,174 @@
+/*******************************************************************************
+  
+  Copyright(c) 2003 - 2004 Intel Corporation. All rights reserved.
+  
+  This program is free software; you can redistribute it and/or modify it 
+  under the terms of version 2 of the GNU General Public License as 
+  published by the Free Software Foundation.
+  
+  This program is distributed in the hope that it will be useful, but WITHOUT 
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for 
+  more details.
+  
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc., 59 
+  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
+  
+  The full GNU General Public License is included in this distribution in the
+  file called LICENSE.
+  
+  Contact Information:
+  James P. Ketrenos <ipw2100-admin@linux.intel.com>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+#include <linux/compiler.h>
+#include <linux/errno.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/netdevice.h>
+#include <linux/version.h>
+#include <linux/proc_fs.h>
+#include <linux/ioport.h>
+#include <asm/uaccess.h>
+#include <asm/io.h>
+
+
+#define DRV_NAME		"av5100"
+#define DRV_VERSION		"1.3"
+#define DRV_DESCRIPTION		"SW RF kill switch for Averatec 5100P"
+#define DRV_COPYRIGHT		"Copyright(c) 2003-2004 Intel Corporation"
+
+static int radio = 1;
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+
+MODULE_PARM(radio, "i");
+
+#else /* LINUX_VERSION_CODE < 2.6.0 */
+
+#include <linux/moduleparam.h>
+module_param(radio, int, 1);
+
+#endif /* LINUX_VERSION_CODE < 2.6.0 */
+
+MODULE_PARM_DESC(radio, "controls state of radio (1=on, 0=off)");
+
+MODULE_DESCRIPTION(DRV_DESCRIPTION);
+MODULE_AUTHOR(DRV_COPYRIGHT);
+MODULE_LICENSE("GPL");
+
+#define AV5100_RADIO_ON (0xe0)
+#define AV5100_RADIO_OFF (0xe1)
+
+static int av5100_radio = AV5100_RADIO_OFF;
+
+static void av5100_set_radio(int state)
+{
+	printk(KERN_INFO DRV_NAME ": Radio being turned %s\n",
+	       (state  == AV5100_RADIO_ON) ? "ON" : "OFF");
+	outl(0x80020800, 0xcf8);
+	outb(0x6f, 0x0072);
+	outl(0x1800ffff, 0x1184); 
+	outb(state, 0x00b2);
+	av5100_radio = state;
+}
+
+
+/*
+ * proc stuff
+ */
+static struct proc_dir_entry *dir_base = NULL;
+
+static int proc_set_radio(struct file *file, const char *buffer, 
+			  unsigned long count, void *data)
+{
+	av5100_set_radio(buffer[0] == '0' ? AV5100_RADIO_OFF : AV5100_RADIO_ON);
+	
+	return count;
+}
+
+static int proc_get_radio(char *page, char **start, off_t offset,
+			  int count, int *eof, void *data)
+{
+	int len = 0;
+	
+	len += snprintf(page, count, DRV_NAME ": %d\n", 
+			av5100_radio == AV5100_RADIO_OFF ? 0 : 1);
+	
+	*eof = 1;
+	return len;
+}
+
+
+static void av5100_proc_cleanup(void)
+{
+	if (dir_base) {
+		remove_proc_entry("radio", dir_base);
+		remove_proc_entry(DRV_NAME, NULL);
+		dir_base = NULL;
+	}
+}
+
+
+static int av5100_proc_init(void)
+{
+	struct proc_dir_entry *ent;
+	int err = 0;
+
+	dir_base = create_proc_entry(DRV_NAME, S_IFDIR, NULL);
+	if (dir_base == NULL) {
+		printk(KERN_ERR DRV_NAME ": Unable to initialise /proc/" 
+		       DRV_NAME "\n");
+		err = -ENOMEM;
+		goto fail;
+	}
+
+
+	ent = create_proc_entry("radio", S_IFREG | S_IRUGO | S_IWUSR, 
+				dir_base);
+	if (ent) {
+		ent->read_proc = proc_get_radio;
+		ent->write_proc = proc_set_radio;
+	} else {
+		printk(KERN_ERR
+		       "Unable to initialize /proc/" DRV_NAME "/radio\n");
+		err = -ENOMEM;
+		goto fail;
+	}
+
+	return 0;
+
+ fail:
+	av5100_proc_cleanup();
+	return err;
+}
+
+/*
+ * module stuff
+ */
+static int __init av5100_init(void)
+{
+	av5100_proc_init();
+
+	av5100_set_radio((radio == 1) ? AV5100_RADIO_ON : AV5100_RADIO_OFF);
+	
+	return 0;
+}
+
+static void __exit av5100_exit(void)
+{
+	av5100_set_radio(AV5100_RADIO_OFF);
+
+	av5100_proc_cleanup();
+}
+
+module_init(av5100_init);
+module_exit(av5100_exit);
+
+/*
+         1         2         3         4         5         6         7
+12345678901234567890123456789012345678901234567890123456789012345678901234567890
+*/
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/wireless.c
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/wireless.c
@@ -0,0 +1,108 @@
+/*
+ * wireless.c Wifi feature
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2, or (at your option) any
+ * later version.
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * Written by Mathieu Bérard <mathieu.berard@crans.org>, 2006
+ *
+ */
+
+#include "omnibook.h"
+#include "hardware.h"
+
+static int omnibook_wifi_read(char *buffer, struct omnibook_operation *io_op)
+{
+	int len = 0;
+	int retval;
+	unsigned int state;
+
+	if ((retval = backend_aerial_get(io_op, &state)))
+		return retval;
+
+	len +=
+	    sprintf(buffer + len, "Wifi adapter is %s", (state & WIFI_EX) ? "present" : "absent");
+	if (state & WIFI_EX)
+		len +=
+		    sprintf(buffer + len, " and %s", (state & WIFI_STA) ? "enabled" : "disabled");
+	len += sprintf(buffer + len, ".\n");
+	len +=
+	    sprintf(buffer + len, "Wifi Kill switch is %s.\n", (state & KILLSWITCH) ? "on" : "off");
+
+	return len;
+
+}
+
+static int omnibook_wifi_write(char *buffer, struct omnibook_operation *io_op)
+{
+	int retval = 0;
+	unsigned int state;
+
+	if(mutex_lock_interruptible(&io_op->backend->mutex))
+		return -ERESTARTSYS;	
+
+	if ((retval = __backend_aerial_get(io_op, &state)))
+		goto out;
+
+	if (*buffer == '0')
+		state &= ~WIFI_STA;
+	else if (*buffer == '1')
+		state |= WIFI_STA;
+	else {
+		retval = -EINVAL;
+		goto out;
+	}
+
+	if ((retval = __backend_aerial_set(io_op, state)))
+		return retval;
+
+	out:		
+	mutex_unlock(&io_op->backend->mutex);
+	return retval;
+}
+
+static struct omnibook_feature wifi_driver;
+
+static int __init omnibook_wifi_init(struct omnibook_operation *io_op)
+{
+	int retval = 0;
+	unsigned int state;
+
+/*
+ *  Refuse enabling/disabling a non-existent device
+ */
+
+	if ((retval = backend_aerial_get(io_op, &state)))
+		return retval;
+
+	if (!(state & WIFI_EX))
+		wifi_driver.write = NULL;
+
+	return retval;
+}
+
+static struct omnibook_tbl wireless_table[] __initdata = {
+	{TSM70 | TSX205, {ACPI,}},	/* stubs to select backend */
+	{TSM40, {SMI,}},		/* stubs to select backend */
+	{0,}
+};
+
+static struct omnibook_feature __declared_feature wifi_driver = {
+	.name = "wifi",
+	.enabled = 1,
+	.read = omnibook_wifi_read,
+	.write = omnibook_wifi_write,
+	.init = omnibook_wifi_init,
+	.ectypes = TSM70 | TSM40 | TSX205,
+	.tbl = wireless_table,
+};
+
+module_param_named(wifi, wifi_driver.enabled, int, S_IRUGO);
+MODULE_PARM_DESC(wifi, "Use 0 to disable, 1 to enable Wifi adapter control");
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/init.c
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/init.c
@@ -0,0 +1,535 @@
+/*
+ * init.c -- module initialization code
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2, or (at your option) any
+ * later version.
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * Written by Soós Péter <sp@osb.hu>, 2002-2004
+ * Modified by Mathieu Bérard <mathieu.berard@crans.org>, 2006
+ */
+
+#include "omnibook.h"
+
+#include <linux/proc_fs.h>
+#include <linux/dmi.h>
+#include <linux/version.h>
+#include <asm/uaccess.h>
+
+#include "hardware.h"
+#include "laptop.h"
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,15))
+#include <linux/platform_device.h>
+#else
+#include <linux/device.h>
+#endif
+
+/*
+ * For compatibility with kernel older than 2.6.11
+ */
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11))
+typedef u32 pm_message_t;
+#endif
+
+static int __init omnibook_probe(struct platform_device *dev);
+static int __exit omnibook_remove(struct platform_device *dev);
+static int omnibook_suspend(struct platform_device *dev, pm_message_t state);
+static int omnibook_resume(struct platform_device *dev);
+
+/*
+ * For compatibility with kernel older than 2.6.15
+ */
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,15))
+
+#define to_platform_device(x) container_of((x), struct platform_device, dev)
+
+static int __init compat_omnibook_probe(struct device *dev)
+{
+	struct platform_device *pdev = to_platform_device(dev);
+	return omnibook_probe(pdev);
+}
+
+static int __exit compat_omnibook_remove(struct device *dev)
+{
+	struct platform_device *pdev = to_platform_device(dev);
+	return omnibook_remove(pdev);
+}
+
+static int compat_omnibook_suspend(struct device *dev, pm_message_t state, u32 level)
+{
+	struct platform_device *pdev = to_platform_device(dev);
+	return omnibook_suspend(pdev, state);
+}
+
+static int compat_omnibook_resume(struct device *dev, u32 level)
+{
+	struct platform_device *pdev = to_platform_device(dev);
+	return omnibook_resume(pdev);
+}
+
+#endif
+
+static struct proc_dir_entry *omnibook_proc_root = NULL;
+
+enum omnibook_ectype_t omnibook_ectype = NONE;
+
+static const char *laptop_model __initdata;
+
+static int omnibook_userset = 0;
+
+/*
+ * The platform_driver interface was added in linux 2.6.15
+ */
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,15))
+
+static struct platform_device *omnibook_device;
+
+static struct platform_driver omnibook_driver = {
+	.probe = omnibook_probe,
+	.remove = omnibook_remove,
+#ifdef CONFIG_PM
+	.suspend = omnibook_suspend,
+	.resume = omnibook_resume,
+#endif
+	.driver = {
+		   .name = OMNIBOOK_MODULE_NAME,
+		   .owner = THIS_MODULE,
+		   },
+};
+
+#else				/* 2.6.15 */
+
+static struct device_driver omnibook_driver = {
+	.name = OMNIBOOK_MODULE_NAME,
+	.bus = &platform_bus_type,
+	.probe = compat_omnibook_probe,
+	.remove = compat_omnibook_remove,
+#ifdef CONFIG_PM
+	.suspend = compat_omnibook_suspend,
+	.resume = compat_omnibook_resume,
+#endif
+};
+
+static struct platform_device omnibook_device = {
+	.name = OMNIBOOK_MODULE_NAME,
+};
+
+#endif				/* 2.6.15 */
+
+/* Linked list of all enabled features */
+static struct omnibook_feature *omnibook_available_feature;
+
+/* Delimiters of the .features section wich holds all the omnibook_feature structs */
+extern struct omnibook_feature _start_features_driver[];
+extern struct omnibook_feature _end_features_driver[];
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
+static int __init dmi_matched(struct dmi_system_id *dmi)
+#else
+static int __init dmi_matched(const struct dmi_system_id *dmi)
+#endif
+{
+	omnibook_ectype = (enum omnibook_ectype_t)dmi->driver_data;
+	if (dmi->ident)
+		laptop_model = (char *)dmi->ident;
+	else
+		laptop_model = dmi_get_system_info(DMI_PRODUCT_VERSION);
+	return 1;		/* return non zero means we stop the parsing selecting this entry */
+}
+
+/* 
+ * Callback function for procfs file reading: the name of the file read was stored in *data 
+ */
+static int procfile_read_dispatch(char *page, char **start, off_t off, int count, int *eof,
+				  void *data)
+{
+	struct omnibook_feature *feature = (struct omnibook_feature *)data;
+	int len = 0;
+
+	if (!feature || !feature->read)
+		return -EINVAL;
+
+	if(off)
+		goto out;
+
+	len = feature->read(page, feature->io_op);
+	if (len < 0)
+		return len;
+
+	out:
+	*eof = 1;
+	return len;
+}
+
+/* 
+ * Callback function for procfs file writing: the name of the file written was stored in *data 
+ */
+static int procfile_write_dispatch(struct file *file, const char __user * userbuf,
+				   unsigned long count, void *data)
+{
+	struct omnibook_feature *feature = (struct omnibook_feature *)data;
+	char *kernbuf;
+	int retval;
+
+	if (!feature || !feature->write)
+		return -EINVAL;
+
+	kernbuf = kmalloc(count + 1, GFP_KERNEL);
+	if (!kernbuf)
+		return -ENOMEM;
+
+	if (copy_from_user(kernbuf, userbuf, count)) {
+		kfree(kernbuf);
+		return -EFAULT;
+	}
+
+	/* Make sure the string is \0 terminated */
+	kernbuf[count] = '\0';
+
+	retval = feature->write(kernbuf, feature->io_op);
+	if (retval == 0)
+		retval = count;
+
+	kfree(kernbuf);
+
+	return retval;
+}
+
+/*
+ * Match an ectype and return pointer to corresponding omnibook_operation.
+ * Also make corresponding backend initialisation if necessary, and skip
+ * to the next entry if it fails.
+ */
+static struct omnibook_operation *omnibook_backend_match(struct omnibook_tbl *tbl)
+{
+	int i;
+	struct omnibook_operation *matched = NULL;
+
+	for (i = 0; tbl[i].ectypes; i++) {
+		if (omnibook_ectype & tbl[i].ectypes) {
+			if (tbl[i].io_op.backend->init && tbl[i].io_op.backend->init(&tbl[i].io_op)) {
+				dprintk("Backend %s init failed, skipping entry.\n",
+					tbl[i].io_op.backend->name);
+				continue;
+			}
+			matched = &tbl[i].io_op;
+			dprintk("Returning table entry nr %i.\n", i);
+			break;
+		}
+	}
+	return matched;
+}
+
+/* 
+ * Initialise a feature and add it to the linked list of active features
+ */
+static int __init omnibook_init(struct omnibook_feature *feature)
+{
+	int retval = 0;
+	mode_t pmode;
+	struct proc_dir_entry *proc_entry;
+	struct omnibook_operation *op;
+
+	if (!feature)
+		return -EINVAL;
+
+/*
+ * Select appropriate backend for feature operations
+ * We copy the io_op field so the tbl can be initdata
+ */
+	if (feature->tbl) {
+		dprintk("Begin table match of %s feature.\n", feature->name);
+		op = omnibook_backend_match(feature->tbl);
+		if (!op) {
+			dprintk("Match failed: disabling %s.\n", feature->name);
+			return -ENODEV;
+		}
+		feature->io_op = kmalloc(sizeof(struct omnibook_operation), GFP_KERNEL);
+		if (!feature->io_op)
+			return -ENOMEM;
+		memcpy(feature->io_op, op, sizeof(struct omnibook_operation));
+	} else
+		dprintk("%s feature has no backend table, io_op not initialized.\n", feature->name);
+
+/*
+ * Specific feature init code
+ */
+	if (feature->init && (retval = feature->init(feature->io_op))) {
+		printk(O_ERR "Init function of %s failed with error %i.\n", feature->name, retval);
+		goto err;
+	}
+/*
+ * procfs file setup
+ */
+	if (feature->name && feature->read) {
+		pmode = S_IFREG | S_IRUGO;
+		if (feature->write) {
+			pmode |= S_IWUSR;
+			if (omnibook_userset)
+				pmode |= S_IWUGO;
+		}
+
+		proc_entry = create_proc_entry(feature->name, pmode, omnibook_proc_root);
+
+		if (!proc_entry) {
+			printk(O_ERR "Unable to create proc entry %s\n", feature->name);
+			if (feature->exit)
+				feature->exit(feature->io_op);
+			retval = -ENOENT;
+			goto err;
+		}
+		proc_entry->data = feature;
+		proc_entry->read_proc = &procfile_read_dispatch;
+		if (feature->write)
+			proc_entry->write_proc = &procfile_write_dispatch;
+		#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30)
+			proc_entry->owner = THIS_MODULE;
+		#endif
+	}
+	list_add_tail(&feature->list, &omnibook_available_feature->list);
+	return 0;
+      err:
+	if (feature->io_op && feature->io_op->backend->exit)
+		feature->io_op->backend->exit(feature->io_op);
+	kfree(feature->io_op);
+	return retval;
+}
+
+/* 
+ * Callback function for driver registering :
+ * Initialize the linked list of enabled features and call omnibook_init to populate it
+ */
+static int __init omnibook_probe(struct platform_device *dev)
+{
+	int i;
+	struct omnibook_feature *feature;
+
+	/* temporary hack */
+	mutex_init(&kbc_backend.mutex);
+	mutex_init(&pio_backend.mutex);
+	mutex_init(&ec_backend.mutex);
+
+	omnibook_available_feature = kzalloc(sizeof(struct omnibook_feature), GFP_KERNEL);
+	if (!omnibook_available_feature)
+		return -ENOMEM;
+	INIT_LIST_HEAD(&omnibook_available_feature->list);
+
+	for (i = 0; i < _end_features_driver - _start_features_driver; i++) {
+
+		feature = &_start_features_driver[i];
+
+		if (!feature->enabled)
+			continue;
+
+		if ((omnibook_ectype & feature->ectypes) || (!feature->ectypes))
+			omnibook_init(feature);
+	}
+
+	printk(O_INFO "Enabled features:");
+	list_for_each_entry(feature, &omnibook_available_feature->list, list) {
+		if (feature->name)
+			printk(" %s", feature->name);
+	}
+	printk(".\n");
+
+	return 0;
+}
+
+/* 
+ * Callback function for driver removal
+ */
+static int __exit omnibook_remove(struct platform_device *dev)
+{
+	struct omnibook_feature *feature, *temp;
+
+	list_for_each_entry_safe(feature, temp, &omnibook_available_feature->list, list) {
+		list_del(&feature->list);
+		/* Feature specific cleanup */
+		if (feature->exit)
+			feature->exit(feature->io_op);
+		/* Generic backend cleanup */
+		if (feature->io_op && feature->io_op->backend->exit)
+			feature->io_op->backend->exit(feature->io_op);
+		if (feature->name)
+			remove_proc_entry(feature->name, omnibook_proc_root);
+		kfree(feature->io_op);
+	}
+	kfree(omnibook_available_feature);
+
+	return 0;
+}
+
+/* 
+ * Callback function for system suspend 
+ */
+static int omnibook_suspend(struct platform_device *dev, pm_message_t state)
+{
+	int retval;
+	struct omnibook_feature *feature;
+
+	list_for_each_entry(feature, &omnibook_available_feature->list, list) {
+		if (feature->suspend) {
+			retval = feature->suspend(feature->io_op);
+			if (retval)
+				printk(O_ERR "Unable to suspend the %s feature (error %i).\n", feature->name, retval);
+		}
+	}
+	return 0;
+}
+
+/* 
+ * Callback function for system resume
+ */
+static int omnibook_resume(struct platform_device *dev)
+{
+	int retval;
+	struct omnibook_feature *feature;
+
+	list_for_each_entry(feature, &omnibook_available_feature->list, list) {
+		if (feature->resume) {
+			retval = feature->resume(feature->io_op);
+			if (retval)
+				printk(O_ERR "Unable to resume the %s feature (error %i).\n", feature->name, retval);
+		}
+	}
+	return 0;
+}
+
+/* 
+ * Find a given available feature by its name
+ */
+struct omnibook_feature *omnibook_find_feature(char *name)
+{
+	struct omnibook_feature *feature;
+
+	list_for_each_entry(feature, &omnibook_available_feature->list, list) {
+		if (!strcmp(feature->name, name))
+			return feature;
+	}
+	return NULL;
+}
+
+/*
+ * Maintain compatibility with the old ectype numbers:
+ * ex: The user set/get ectype=12 for TSM70=2^(12-1)
+ */
+static int __init set_ectype_param(const char *val, struct kernel_param *kp)
+{
+	char *endp;
+	int value;
+
+	if (!val)
+		return -EINVAL;
+
+	value = simple_strtol(val, &endp, 10);
+	if (endp == val)	/* No match */
+		return -EINVAL;
+	omnibook_ectype = 1 << (value - 1);
+	return 0;
+}
+
+static int get_ectype_param(char *buffer, struct kernel_param *kp)
+{
+	return sprintf(buffer, "%i", ffs(omnibook_ectype));
+}
+
+static int __init omnibook_module_init(void)
+{
+	int retval;
+
+	printk(O_INFO "Driver version %s.\n", OMNIBOOK_MODULE_VERSION);
+
+	if (omnibook_ectype != NONE)
+		printk(O_WARN "Forced load with EC type %i.\n", ffs(omnibook_ectype));
+	else if (dmi_check_system(omnibook_ids))
+		printk(O_INFO "%s detected.\n", laptop_model);
+	else
+		printk(O_INFO "Unknown model.\n");
+
+	omnibook_proc_root = proc_mkdir(OMNIBOOK_MODULE_NAME, NULL);
+	if (!omnibook_proc_root) {
+		printk(O_ERR "Unable to create /proc/%s.\n", OMNIBOOK_MODULE_NAME);
+		return -ENOENT;
+	}
+
+/*
+ * The platform_driver interface was added in linux 2.6.15
+ */
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,15))
+
+	retval = platform_driver_register(&omnibook_driver);
+	if (retval < 0)
+		return retval;
+
+	omnibook_device = platform_device_alloc(OMNIBOOK_MODULE_NAME, -1);
+	if (!omnibook_device) {
+		platform_driver_unregister(&omnibook_driver);
+		return -ENOMEM;
+	}
+
+	retval = platform_device_add(omnibook_device);
+	if (retval) {
+		platform_device_put(omnibook_device);
+		platform_driver_unregister(&omnibook_driver);
+		return retval;
+	}
+#else				/* 2.6.15 */
+
+	retval = driver_register(&omnibook_driver);
+	if (retval < 0)
+		return retval;
+
+	retval = platform_device_register(&omnibook_device);
+
+	if (retval) {
+		driver_unregister(&omnibook_driver);
+		return retval;
+	}
+#endif
+	return 0;
+}
+
+static void __exit omnibook_module_cleanup(void)
+{
+
+/*
+ * The platform_driver interface was added in linux 2.6.15
+ */
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,15))
+	platform_device_unregister(omnibook_device);
+	platform_driver_unregister(&omnibook_driver);
+#else
+	platform_device_unregister(&omnibook_device);
+	driver_unregister(&omnibook_driver);
+#endif
+
+	if (omnibook_proc_root)
+		remove_proc_entry("omnibook", NULL);
+	printk(O_INFO "Module is unloaded.\n");
+}
+
+module_init(omnibook_module_init);
+module_exit(omnibook_module_cleanup);
+
+MODULE_AUTHOR("Soós Péter, Mathieu Bérard");
+MODULE_VERSION(OMNIBOOK_MODULE_VERSION);
+MODULE_DESCRIPTION
+    ("Kernel interface for HP OmniBook, HP Pavilion, Toshiba Satellite and Compal ACL00 laptops");
+MODULE_LICENSE("GPL");
+module_param_call(ectype, set_ectype_param, get_ectype_param, NULL, S_IRUGO);
+module_param_named(userset, omnibook_userset, int, S_IRUGO);
+MODULE_PARM_DESC(ectype, "Type of embedded controller firmware");
+MODULE_PARM_DESC(userset, "Use 0 to disable, 1 to enable users to set parameters");
+
+/* End of file */
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/pio.c
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/pio.c
@@ -0,0 +1,173 @@
+/*
+ * pio.c -- low level functions I/O ports
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2, or (at your option) any
+ * later version.
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * Written by Soós Péter <sp@osb.hu>, 2002-2004
+ * Modified by Mathieu Bérard <mathieu.berard@crans.org>, 2006
+ */
+
+#include "omnibook.h"
+
+#include <linux/types.h>
+#include <linux/delay.h>
+#include <linux/sched.h>
+#include <linux/spinlock.h>
+#include <linux/ioport.h>
+
+#include <asm/io.h>
+#include "hardware.h"
+
+/*
+ * IO port backend. Only support single or dual ports operations
+ * private data structure: it's the linked list of requested ports
+ * 
+ * Race condition issue: omnibook_pio_init/exit functions are only called from
+ * omnibook_backend_match and omnibook_remove from init.c, this should happen
+ * only at module init/exit time so there is no need for a lock.
+ */
+
+struct pio_priv_data_t {
+	unsigned long addr;
+	struct kref refcount;
+	struct list_head list;
+};
+
+static struct pio_priv_data_t pio_priv_data = {
+	.addr = 0,
+	.list = LIST_HEAD_INIT(pio_priv_data.list),
+};
+
+/*
+ * Match an entry in the linked list helper function: see if we have and entry
+ * whose addr field match maddr
+ */
+static struct pio_priv_data_t *omnibook_match_port(struct pio_priv_data_t *data,
+						      unsigned long maddr)
+{
+	struct pio_priv_data_t *cursor;
+
+	list_for_each_entry(cursor, &data->list, list) {
+		if (cursor->addr == maddr) {
+			return cursor;
+		}
+	}
+	return NULL;
+}
+
+/*
+ * See if we have to request raddr
+ */
+static int omnibook_claim_port(struct pio_priv_data_t *data, unsigned long raddr)
+{
+	struct pio_priv_data_t *match, *new;
+
+	match = omnibook_match_port(data, raddr);
+	if (match) {
+		/* Already requested by us: increment kref and quit */
+		kref_get(&match->refcount);
+		return 0;
+	}
+
+	/* there was no match: request the region and add to list */
+	if (!request_region(raddr, 1, OMNIBOOK_MODULE_NAME)) {
+		printk(O_ERR "Request I/O port error\n");
+		return -ENODEV;
+	}
+
+	new = kmalloc(sizeof(struct pio_priv_data_t), GFP_KERNEL);
+	if (!new) {
+		release_region(raddr, 1);
+		return -ENOMEM;
+	}
+
+	kref_init(&new->refcount);
+	new->addr = raddr;
+	list_add(&new->list, &data->list);
+
+	return 0;
+}
+
+/*
+ * Register read_addr and write_addr
+ */
+static int omnibook_pio_init(const struct omnibook_operation *io_op)
+{
+	int retval = 0;
+
+	if (io_op->read_addr
+	    && (retval = omnibook_claim_port(io_op->backend->data, io_op->read_addr)))
+		goto out;
+
+	if (io_op->write_addr && (io_op->write_addr != io_op->read_addr))
+		retval = omnibook_claim_port(io_op->backend->data, io_op->write_addr);
+
+      out:
+	return retval;
+}
+
+/*
+ * REALLY release a port
+ */
+static void omnibook_free_port(struct kref *ref)
+{
+	struct pio_priv_data_t *data;
+
+	data = container_of(ref, struct pio_priv_data_t, refcount);
+	release_region(data->addr, 1);
+	list_del(&data->list);
+	kfree(data);
+}
+
+/*
+ * Unregister read_addr and write_addr
+ */
+static void omnibook_pio_exit(const struct omnibook_operation *io_op)
+{
+	struct pio_priv_data_t *match;
+
+	match = omnibook_match_port(io_op->backend->data, io_op->read_addr);
+	if (match)
+		kref_put(&match->refcount, omnibook_free_port);
+
+	match = omnibook_match_port(io_op->backend->data, io_op->write_addr);
+	if (match)
+		kref_put(&match->refcount, omnibook_free_port);
+
+}
+
+static int omnibook_io_read(const struct omnibook_operation *io_op, u8 * value)
+{
+	*value = inb(io_op->read_addr);
+	if (io_op->read_mask)
+		*value &= io_op->read_mask;
+	return 0;
+}
+
+static int omnibook_io_write(const struct omnibook_operation *io_op, u8 value)
+{
+	outb(io_op->write_addr, value);
+	return 0;
+}
+
+/*
+ * Backend interface declarations
+ */
+struct omnibook_backend pio_backend = {
+	.name = "pio",
+	.data = &pio_priv_data,
+	.init = omnibook_pio_init,
+	.exit = omnibook_pio_exit,
+	.byte_read = omnibook_io_read,
+	.byte_write = omnibook_io_write,
+};
+
+/* End of file */
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/kbc.c
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/kbc.c
@@ -0,0 +1,152 @@
+/*
+ * kbc.c -- low level functions to access Keyboard Controller
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2, or (at your option) any
+ * later version.
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * Written by Soós Péter <sp@osb.hu>, 2002-2004
+ * Modified by Mathieu Bérard <mathieu.berard@crans.org>, 2006
+ */
+
+#include "omnibook.h"
+
+#include <linux/types.h>
+#include <linux/delay.h>
+#include <linux/sched.h>
+#include <linux/spinlock.h>
+#include <linux/ioport.h>
+
+#include <asm/io.h>
+#include "hardware.h"
+
+extern int omnibook_key_polling_enable(void);
+extern int omnibook_key_polling_disable(void);
+
+/*
+ * Registers of the keyboard controller
+ */
+
+#define OMNIBOOK_KBC_DATA		0x60
+#define OMNIBOOK_KBC_SC			0x64
+
+/*
+ * Keyboard controller status register bits
+ */
+
+#define OMNIBOOK_KBC_STAT_OBF		0x01	/* Output buffer full */
+#define OMNIBOOK_KBC_STAT_IBF		0x02	/* Input buffer full */
+
+
+/*
+ * Interrupt control
+ */
+
+static DEFINE_SPINLOCK(omnibook_kbc_lock);
+
+/*
+ * Wait for keyboard buffer
+ */
+
+static int omnibook_kbc_wait(u8 event)
+{
+	int timeout = OMNIBOOK_TIMEOUT;
+
+	switch (event) {
+	case OMNIBOOK_KBC_STAT_OBF:
+		while (!(inb(OMNIBOOK_KBC_SC) & event) && timeout--)
+			mdelay(1);
+		break;
+	case OMNIBOOK_KBC_STAT_IBF:
+		while ((inb(OMNIBOOK_KBC_SC) & event) && timeout--)
+			mdelay(1);
+		break;
+	default:
+		return -EINVAL;
+	}
+	if (timeout > 0)
+		return 0;
+	return -ETIME;
+}
+
+/*
+ * Write to the keyboard command register
+ */
+
+static int omnibook_kbc_write_command(u8 cmd)
+{
+	int retval;
+
+	spin_lock_irq(&omnibook_kbc_lock);
+	retval = omnibook_kbc_wait(OMNIBOOK_KBC_STAT_IBF);
+	if (retval)
+		goto end;
+	outb(cmd, OMNIBOOK_KBC_SC);
+	retval = omnibook_kbc_wait(OMNIBOOK_KBC_STAT_IBF);
+      end:
+	spin_unlock_irq(&omnibook_kbc_lock);
+	return retval;
+}
+
+/*
+ * Write to the keyboard data register
+ */
+
+static int omnibook_kbc_write_data(u8 data)
+{
+	int retval;
+
+	spin_lock_irq(&omnibook_kbc_lock);
+	retval = omnibook_kbc_wait(OMNIBOOK_KBC_STAT_IBF);
+	if (retval)
+		goto end;
+	outb(data, OMNIBOOK_KBC_DATA);
+	retval = omnibook_kbc_wait(OMNIBOOK_KBC_STAT_IBF);
+      end:
+	spin_unlock_irq(&omnibook_kbc_lock);
+	return retval;
+}
+
+/*
+ * Send a command to keyboard controller
+ */
+
+static int omnibook_kbc_command(const struct omnibook_operation *io_op, u8 data)
+{
+	int retval;
+
+	if ((retval = omnibook_kbc_write_command(OMNIBOOK_KBC_CONTROL_CMD)))
+		return retval;
+
+	retval = omnibook_kbc_write_data(data);
+	return retval;
+}
+
+/*
+ * Onetouch button hotkey handler
+ */
+static int omnibook_kbc_hotkeys(const struct omnibook_operation *io_op, unsigned int state)
+{
+	int retval;
+
+	retval = __omnibook_toggle(io_op, !!(state & HKEY_ONETOUCH));
+	return retval;
+}
+
+/*
+ * Backend interface declarations
+ */
+struct omnibook_backend kbc_backend = {
+	.name = "i8042",
+	.hotkeys_write_cap = HKEY_ONETOUCH,
+	.byte_write = omnibook_kbc_command,
+	.hotkeys_set = omnibook_kbc_hotkeys,
+};
+
+/* End of file */
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/blank.c
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/blank.c
@@ -0,0 +1,138 @@
+/*
+ * blank.c -- blanking lcd console
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2, or (at your option) any
+ * later version.
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * Written by Soós Péter <sp@osb.hu>, 2002-2004
+ * Modified by Mathieu Bérard <mathieu.berard@crans.org>, 2006
+ */
+
+#include "omnibook.h"
+
+#include <asm/io.h>
+#include "hardware.h"
+
+static struct omnibook_feature blank_driver;
+
+/* 
+ * console_blank_hook pointer manipulation is lock protected
+ */
+extern int (*console_blank_hook) (int);
+static DEFINE_SPINLOCK(blank_spinlock);
+
+
+int omnibook_lcd_blank(int blank)
+{
+	struct omnibook_feature *blank_feature = omnibook_find_feature("blank");
+
+	if(!blank_feature)
+		return -ENODEV;
+
+	return omnibook_apply_write_mask(blank_feature->io_op, blank);
+}
+
+static int console_blank_register_hook(void)
+{
+	spin_lock(&blank_spinlock);
+	if (console_blank_hook != omnibook_lcd_blank) {
+		if (console_blank_hook == NULL) {
+			console_blank_hook = omnibook_lcd_blank;
+			printk(O_INFO "LCD backlight turn off at console blanking is enabled.\n");
+		} else 
+			printk(O_INFO "There is a console blanking solution already registered.\n");
+	}
+	spin_unlock(&blank_spinlock);
+	return 0;
+}
+
+static int console_blank_unregister_hook(void)
+{
+	int retval;
+	spin_lock(&blank_spinlock);
+	if (console_blank_hook == omnibook_lcd_blank) {
+		console_blank_hook = NULL;
+		printk(O_INFO "LCD backlight turn off at console blanking is disabled.\n");
+	} else if (console_blank_hook) {
+		printk(O_WARN "You can not disable another console blanking solution.\n");
+		retval = -EBUSY;
+	} else {
+		printk(O_INFO "Console blanking already disabled.\n");
+	}
+	spin_unlock(&blank_spinlock);
+	return retval;
+}
+
+static int omnibook_console_blank_read(char *buffer, struct omnibook_operation *io_op)
+{
+	int len = 0;
+
+	spin_lock(&blank_spinlock);
+
+	len +=
+	    sprintf(buffer + len, "LCD console blanking hook is %s\n",
+		    (console_blank_hook == omnibook_lcd_blank) ? "enabled" : "disabled");
+
+	spin_unlock(&blank_spinlock);
+
+	return len;
+}
+
+static int omnibook_console_blank_write(char *buffer, struct omnibook_operation *io_op)
+{
+	int retval;
+
+	switch (*buffer) {
+	case '0':
+		retval = console_blank_unregister_hook();
+		break;
+	case '1':
+		retval = console_blank_register_hook();
+		break;
+	default:
+		retval = -EINVAL;
+	}
+	return retval;
+}
+
+static int __init omnibook_console_blank_init(struct omnibook_operation *io_op)
+{	
+	return console_blank_register_hook();
+}
+
+static void __exit omnibook_console_blank_cleanup(struct omnibook_operation *io_op)
+{
+	console_blank_unregister_hook();
+}
+
+static struct omnibook_tbl blank_table[] __initdata = {
+	{TSM70 | TSX205, {CDI, 0, TSM100_BLANK_INDEX, 0, TSM100_LCD_OFF, TSM100_LCD_ON}},
+	{XE3GF | XE3GC | AMILOD | TSP10 | TSM70 | TSM30X,
+	 COMMAND(KBC, OMNIBOOK_KBC_CMD_LCD_OFF, OMNIBOOK_KBC_CMD_LCD_ON)},
+	{OB500 | OB6000 | XE2, {PIO, OB500_GPO1, OB500_GPO1, 0, -OB500_BKLT_MASK, OB500_BKLT_MASK}},
+	{OB510 | OB6100, {PIO, OB510_GPO2, OB510_GPO2, 0, -OB510_BKLT_MASK, OB510_BKLT_MASK}},
+	{0,}
+};
+
+static struct omnibook_feature __declared_feature blank_driver = {
+	.name = "blank",
+	.enabled = 1,
+	.read = omnibook_console_blank_read,
+	.write = omnibook_console_blank_write,
+	.init = omnibook_console_blank_init,
+	.exit = omnibook_console_blank_cleanup,
+	.ectypes =
+	    XE3GF | XE3GC | OB500 | OB510 | OB6000 | OB6100 | XE2 | AMILOD | TSP10 | TSM70 | TSM30X | TSX205,
+	.tbl = blank_table,
+};
+
+module_param_named(blank, blank_driver.enabled, int, S_IRUGO);
+MODULE_PARM_DESC(blank, "Use 0 to disable, 1 to enable lcd console blanking");
+/* End of file */
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/muteled.c
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/muteled.c
@@ -0,0 +1,109 @@
+/*
+ * mutled.c -- MUTE LED control
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2, or (at your option) any
+ * later version.
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * Written by Thomas Perl <thp@perli.net>, 2006
+ * Modified by Mathieu Bérard <mathieu.berard@crans.org>, 2006
+ */
+
+#include "omnibook.h"
+#include "hardware.h"
+
+static int omnibook_muteled_set(struct omnibook_operation *io_op, int status)
+{
+	int retval = 0;
+
+	if(mutex_lock_interruptible(&io_op->backend->mutex))
+		return -ERESTARTSYS;
+
+	if((retval = __omnibook_toggle(io_op, !!status))) {
+		printk(O_ERR "Failed muteled %s command.\n", status ? "on" : "off");
+		goto out;
+	}
+
+	io_op->backend->muteled_state = !!status;
+
+	out:
+	mutex_unlock(&io_op->backend->mutex);
+	return retval;
+}
+
+/*
+ * Hardware query is unsupported, reading is unreliable.
+ */
+static int omnibook_muteled_read(char *buffer, struct omnibook_operation *io_op)
+{
+	int len = 0;
+
+	if(mutex_lock_interruptible(&io_op->backend->mutex))
+		return -ERESTARTSYS;
+	len +=
+	    sprintf(buffer + len, "Last mute LED action was an %s command.\n",
+		    io_op->backend->touchpad_state ? "on" : "off");
+
+	mutex_unlock(&io_op->backend->mutex);
+	return len;
+}
+
+static int omnibook_muteled_write(char *buffer, struct omnibook_operation *io_op)
+{
+	int cmd;
+
+	if (*buffer == '0' || *buffer == '1') {
+		cmd = *buffer - '0';
+		if (!omnibook_muteled_set(io_op, cmd)) {
+			dprintk("Switching mute LED to %s state.\n", cmd ? "on" : "off");
+		}
+	} else {
+		return -EINVAL;
+	}
+	return 0;
+}
+
+/*
+ * May re-enable muteled upon resume
+ */
+static int omnibook_muteled_resume(struct omnibook_operation *io_op)
+{	
+	int retval;
+	mutex_lock(&io_op->backend->mutex);
+	retval = __omnibook_toggle(io_op, !!io_op->backend->touchpad_state);
+	mutex_unlock(&io_op->backend->mutex);
+	return retval;
+}
+
+/*
+ * Switch muteled off upon exit
+ */
+static void __exit omnibook_muteled_cleanup(struct omnibook_operation *io_op)
+{
+	omnibook_muteled_set(io_op, 0);
+}
+
+static struct omnibook_tbl muteled_table[] __initdata = {
+	{XE4500, COMMAND(KBC, OMNIBOOK_KBC_CMD_MUTELED_ON, OMNIBOOK_KBC_CMD_MUTELED_OFF)},
+	{0,}
+};
+
+static struct omnibook_feature __declared_feature muteled_driver = {
+	.name = "muteled",
+	.enabled = 1,
+	.read = omnibook_muteled_read,
+	.write = omnibook_muteled_write,
+	.exit = omnibook_muteled_cleanup,
+	.resume = omnibook_muteled_resume,
+	.ectypes = XE4500,
+	.tbl = muteled_table,
+};
+
+module_param_named(muteled, muteled_driver.enabled, int, S_IRUGO);
+MODULE_PARM_DESC(muteled, "Use 0 to disable, 1 to enable 'Audo Mute' LED control");
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/acpi.c
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/acpi.c
@@ -0,0 +1,1158 @@
+/*
+ * acpi.c -- ACPI methods low-level access code for TSM70 class laptops
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2, or (at your option) any
+ * later version.
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * Written by Mathieu Bérard <mathieu.berard@crans.org>, 2006
+ *
+ */
+
+#include "omnibook.h"
+#include "hardware.h"
+
+#ifdef CONFIG_ACPI
+
+#include <acpi/acpi_drivers.h>
+#include <linux/workqueue.h>
+
+/* copied from drivers/input/serio/i8042-io.h */
+#define I8042_KBD_PHYS_DESC "isa0060/serio0"
+
+/*
+ * ACPI backend masks and strings
+ */
+
+#define GET_WIRELESS_METHOD "ANTR"
+#define SET_WIRELESS_METHOD "ANTW"
+#define WLEX_MASK	0x4
+#define WLAT_MASK	0x1
+#define BTEX_MASK	0x8
+#define BTAT_MASK	0x2
+#define KLSW_MASK	0x10
+
+#define GET_DISPLAY_METHOD "DOSS"
+#define SET_DISPLAY_METHOD "DOSW"
+/* Display reading masks CADL = detected, CSTE = enabled */
+#define	LCD_CADL	0x10
+#define	CRT_CADL	0x20
+#define	TVO_CADL	0x40
+#define	DVI_CADL	0x80
+#define	LCD_CSTE	0x1
+#define	CRT_CSTE	0x2
+#define	TVO_CSTE	0x4
+#define DVI_CSTE	0x8
+
+/* TSX205 Video-Out methods and return values */
+#define TSX205_SET_DISPLAY_METHOD "STBL"
+#define TSX205_SLI_DISPLAY_METHOD "SL01.VGA1.STBL"
+/* NOTE: Method DSSW seems to be some sort of auto-detect method */
+#define TSX205_AUTO_DISPLAY_METHOD "DSSW"
+#define TSX205_DSPY_DE	0x1F	/* DE - Detected and Enabled */
+#define TSX205_DSPY_DN	0x1D	/* DN - Detected and Not enabled */
+#define TSX205_DSPY_NE	0x0F	/* NE - Not detected and Enabled */
+#define TSX205_DSPY_NN	0x0D	/* NN - Not detected and Not enabled */
+
+#define GET_THROTTLE_METHOD "THRO"
+#define	SET_THROTTLE_METHOD "CLCK"
+
+static char ec_dev_list[][20] = {
+	"\\_SB.PCI0.LPCB.EC0",
+	"\\_SB.PCI0.LPC0.EC0",
+};
+
+/* TSX205 HCI and display handles */
+static char tsx205_dev_list[][20] = {
+	"\\_SB.VALZ",
+	"\\_SB.PCI0.PEGP.VGA"
+};
+
+/* TSX205 GET video-out methods */
+static char tsx205_video_list[][20] = {
+	"LCD._DCS",
+	"CRT._DCS",
+	"TV._DCS",
+	"DVI._DCS",
+	"SL01.VGA1.LCD._DCS",
+	"SL01.VGA1.CRT._DCS",
+	"SL01.VGA1.TV._DCS",
+	"SL01.VGA1.DVI._DCS",
+};
+
+#define TOSHIBA_ACPI_BT_CLASS "bluetooth"
+#define TOSHIBA_ACPI_DEVICE_NAME "bluetooth adapter"
+
+#define TOSH_BT_ACTIVATE_USB	"AUSB"
+#define TOSH_BT_DISABLE_USB	"DUSB"
+#define TOSH_BT_POWER_ON	"BTPO"
+#define TOSH_BT_POWER_OFF	"BTPF"
+#define TOSH_BT_STATUS		"BTST"
+#define	TOSH_BT_KSST_MASK	0x1
+#define	TOSH_BT_USB_MASK	0x40
+#define	TOSH_BT_POWER_MASK	0x80
+
+/*
+ * ACPI driver for Toshiba Bluetooth device
+ */
+static int omnibook_acpi_bt_add(struct acpi_device *device);
+static int omnibook_acpi_bt_remove(struct acpi_device *device, int type);
+
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,23)
+static const struct acpi_device_id omnibook_bt_ids[] = {
+	{"TOS6205", 0},
+	{"", 0},
+};
+
+static struct acpi_driver omnibook_bt_driver = {
+	.name	= OMNIBOOK_MODULE_NAME,
+	.class	= TOSHIBA_ACPI_BT_CLASS,
+	.ids	= omnibook_bt_ids,
+	.ops	= {
+			.add	=  omnibook_acpi_bt_add,
+			.remove	=  omnibook_acpi_bt_remove,
+		  },
+};
+#else /* 2.6.23 */
+static struct acpi_driver omnibook_bt_driver = {
+	.name	= OMNIBOOK_MODULE_NAME,
+	.class	= TOSHIBA_ACPI_BT_CLASS,
+	.ids	= "TOS6205",
+	.ops	= {
+			.add	=  omnibook_acpi_bt_add,
+			.remove	=  omnibook_acpi_bt_remove,
+		  },
+};
+#endif /* 2.6.23 */
+
+
+/*
+ * ACPI backend private data structure
+ */
+struct acpi_backend_data {
+	acpi_handle ec_handle;  /* Handle on ACPI EC device */
+	acpi_handle bt_handle;  /* Handle on ACPI BT device */
+	acpi_handle hci_handle; /* Handle on ACPI HCI device */
+	acpi_handle dis_handle; /* Handle on ACPI Display device */
+	unsigned has_antr_antw:1; /* Are there ANTR/ANTW methods in the EC device ? */
+	unsigned has_doss_dosw:1; /* Are there DOSS/DOSW methods in the EC device ? */
+	unsigned has_sli:1; /* Does the laptop has SLI enabled ? */
+	struct input_dev *acpi_input_dev;
+	struct work_struct fnkey_work;
+};
+
+/*
+ * Hotkeys workflow:
+ * 1. Fn+Foo pressed
+ * 2. Scancode 0x6e generated by kbd controller
+ * 3. Scancode 0x6e caught by omnibook input handler
+ * 4. INFO method has keycode of last actually pressed Fn key
+ * 5. acpi_scan_table used to associate a detected keycode with a generated one
+ * 6. Generated keycode issued using the omnibook input device
+ */
+
+/*
+ * The input handler should only bind with the standard AT keyboard.
+ * XXX: Scancode 0x6e won't be detected if the keyboard has already been
+ * grabbed (the Xorg event input driver do that)
+ */
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,21))
+static int hook_connect(struct input_handler *handler,
+					 struct input_dev *dev,
+					 const struct input_device_id *id)
+#elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18))
+static struct input_handle *hook_connect(struct input_handler *handler,
+					 struct input_dev *dev,
+					 const struct input_device_id *id)
+#else
+static struct input_handle *hook_connect(struct input_handler *handler,
+					 struct input_dev *dev,
+					 struct input_device_id *id)
+#endif
+{
+	struct input_handle *handle;
+	int error;
+
+	/* the 0x0001 vendor magic number is found in atkbd.c */
+	if(!(dev->id.bustype == BUS_I8042 && dev->id.vendor == 0x0001))
+		goto out_nobind;
+
+	if(!strstr(dev->phys, I8042_KBD_PHYS_DESC))
+		goto out_nobind;
+
+	dprintk("hook_connect for device %s.\n", dev->name);
+
+	if(dev->grab)
+		printk(O_WARN "Input device is grabbed by %s, Fn hotkeys won't work.\n",
+			dev->grab->name);
+
+	handle = kzalloc(sizeof(struct input_handle), GFP_KERNEL);
+	if (!handle)
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,21))
+		return -ENOMEM;
+#else
+		return NULL;
+#endif
+
+	handle->dev = dev;
+	handle->handler = handler;
+	handle->name = "omnibook_scancode_hook";
+	handle->private = handler->private;
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,21))
+	error = input_register_handle(handle);
+	if (error) {
+		dprintk("register_handle failed\n");
+		goto out_nobind_free;
+	} 
+	error = input_open_device(handle);
+	if (error) {
+		dprintk("register_handle failed\n");
+		input_unregister_handle(handle);
+		goto out_nobind_free;
+	} 
+	
+#else
+	status=input_open_device(handle);
+	if (error==0) dprintk("Input device opened\n");
+	else { 
+		dprintk("opening input device failed\n");
+		goto out_nobind_free;
+	}
+#endif
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,21))
+	return 0;
+out_nobind_free:
+	kfree(handle);
+out_nobind:
+	return -ENODEV;
+#else
+	return handle;
+out_nobind_free:
+	kfree(handle);
+out_nobind:
+	return NULL;
+#endif	
+}
+
+static void hook_disconnect(struct input_handle *handle)
+{
+	dprintk("hook_disconnect.\n");
+	input_close_device(handle);
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,21))
+	input_unregister_handle(handle);
+#endif
+	kfree(handle);
+}
+
+/*
+ * Hook for scancode 0x6e. Actual handling is done in a workqueue.
+ */
+static void hook_event(struct input_handle *handle, unsigned int event_type,
+		      unsigned int event_code, int value)
+{
+	if (event_type == EV_MSC && event_code == MSC_SCAN && value == ACPI_FN_SCAN)
+		schedule_work(&((struct acpi_backend_data *)handle->private)->fnkey_work);
+}
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18))
+static const struct input_device_id hook_ids[] = {
+#else
+static struct input_device_id hook_ids[] = {
+#endif
+	{
+                .flags = INPUT_DEVICE_ID_MATCH_EVBIT,
+                .evbit = { BIT(EV_KEY) },
+        },
+	{ },    /* Terminating entry */
+};
+
+static struct input_handler hook_handler = {
+	.event		= hook_event,
+	.connect	= hook_connect,
+	.disconnect	= hook_disconnect,
+	.name		= OMNIBOOK_MODULE_NAME,
+	.id_table	= hook_ids,
+};
+
+/*
+ * Detected scancode to keycode table
+ */
+static const struct {
+	unsigned int scancode;
+	unsigned int keycode;
+} acpi_scan_table[] = {
+	{ HCI_FN_RELEASED,    KEY_FN},
+	{ HCI_MUTE,           KEY_MUTE},
+	{ HCI_BREAK,          KEY_COFFEE},
+	{ HCI_1,              KEY_ZOOMOUT},
+	{ HCI_2,              KEY_ZOOMIN},
+	{ HCI_SPACE,          KEY_ZOOMRESET},
+	{ HCI_BSM,            KEY_BATTERY},
+	{ HCI_SUSPEND,        KEY_SLEEP},
+	{ HCI_HIBERNATE,      KEY_SUSPEND},
+	{ HCI_VIDEOOUT,       KEY_SWITCHVIDEOMODE},
+	{ HCI_BRIGHTNESSDOWN, KEY_BRIGHTNESSDOWN},
+	{ HCI_BRIGHTNESSUP,   KEY_BRIGHTNESSUP},
+	{ HCI_WLAN,           KEY_WLAN},
+	{ HCI_TOUCHPAD,       KEY_PROG1},
+	{ HCI_FN_PRESSED,     KEY_FN},
+	{ 0, 0},
+};
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,19))
+static void omnibook_handle_fnkey(struct work_struct *work);
+#else
+static void omnibook_handle_fnkey(void* data);
+#endif
+
+/*
+ * Register the input handler and the input device in the input subsystem
+ */
+static int register_input_subsystem(struct acpi_backend_data *priv_data)
+{
+	int i, retval = 0;
+	struct input_dev *acpi_input_dev;
+
+	acpi_input_dev = input_allocate_device();
+	if (!acpi_input_dev) {
+		retval = -ENOMEM;
+		goto out;
+	}
+
+	acpi_input_dev->name = "Omnibook ACPI scancode generator";
+	acpi_input_dev->phys = "omnibook/input0";
+	acpi_input_dev->id.bustype = BUS_HOST;
+	
+	set_bit(EV_KEY, acpi_input_dev->evbit);
+	
+	for(i=0 ; i < ARRAY_SIZE(acpi_scan_table); i++)
+		set_bit(acpi_scan_table[i].keycode, acpi_input_dev->keybit);
+
+	retval = input_register_device(acpi_input_dev);
+	if (retval) {
+		input_free_device(acpi_input_dev);
+		goto out;
+	}
+
+	priv_data->acpi_input_dev = acpi_input_dev;
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,19))
+	INIT_WORK(&priv_data->fnkey_work, *omnibook_handle_fnkey);
+#else
+	INIT_WORK(&priv_data->fnkey_work, *omnibook_handle_fnkey, priv_data);
+#endif
+
+
+	hook_handler.private = priv_data;
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18))
+	retval = input_register_handler(&hook_handler);	
+#else
+	input_register_handler(&hook_handler);
+#endif
+
+	out:	
+	return retval;
+}
+
+/*
+ * Execute an ACPI method which return either an integer or nothing
+ * and that require 0 or 1 numerical argument
+ * (acpi_evaluate_object wrapper)
+ */
+static int omnibook_acpi_execute(acpi_handle dev_handle, char *method, const int *param, int *result)
+{
+
+	struct acpi_object_list args_list;
+	struct acpi_buffer buff;
+	union acpi_object arg, out_objs[1];
+	
+	if (param) {
+		args_list.count = 1;
+		args_list.pointer = &arg;
+		arg.type = ACPI_TYPE_INTEGER;
+		arg.integer.value = *param;
+	} else
+		args_list.count = 0;
+
+	buff.length = sizeof(out_objs);
+	buff.pointer = out_objs;
+
+	if (acpi_evaluate_object(dev_handle, method, &args_list, &buff) != AE_OK) {
+		printk(O_ERR "ACPI method execution failed\n");
+		return -EIO;
+	}
+
+	if (!result)		/* We don't care what the method returned here */
+		return 0;
+
+	if (out_objs[0].type != ACPI_TYPE_INTEGER) {
+		printk(O_ERR "ACPI method result is not a number\n");
+		return -EINVAL;
+	}
+
+	*result = out_objs[0].integer.value;
+	return 0;
+}
+
+/*
+ * Probe for expected ACPI devices
+ */
+static int omnibook_acpi_init(const struct omnibook_operation *io_op)
+{
+	int retval = 0;	
+	acpi_handle dev_handle, method_handle, hci_handle, dis_handle;
+	int i;
+	int has_sli = 0;
+	struct acpi_backend_data *priv_data;
+	
+	if (unlikely(acpi_disabled)) {
+		printk(O_ERR "ACPI is disabled: feature unavailable.\n");
+		return -ENODEV;
+	}
+
+	if (!io_op->backend->data) {
+		dprintk("Try to init ACPI backend\n");
+		mutex_init(&io_op->backend->mutex);
+		mutex_lock(&io_op->backend->mutex);
+		kref_init(&io_op->backend->kref);
+		priv_data = kzalloc(sizeof(struct acpi_backend_data), GFP_KERNEL);
+		if (!priv_data) {
+			retval = -ENOMEM;
+			goto error0;
+		}
+
+		/* Locate ACPI EC device, acpi_get_handle set dev_handle to NULL if not found */
+		for (i = 0; i < ARRAY_SIZE(ec_dev_list); i++) {
+			if (acpi_get_handle(NULL, ec_dev_list[i], &dev_handle) == AE_OK) {
+				dprintk("ACPI EC device found\n");
+				priv_data->ec_handle = dev_handle;
+				break;
+			}
+		}
+		
+		if (!dev_handle) {
+			printk(O_ERR "Can't get handle on ACPI EC device.\n");
+			retval = -ENODEV;
+			goto error1;
+		}
+
+		/* Probe for HCI and Display devices only on TSX205 models */
+		if (omnibook_ectype & TSX205) {
+			if (acpi_get_handle(NULL, tsx205_dev_list[0], &hci_handle) == AE_OK) {
+				dprintk("Toshiba X205 HCI device found\n");
+				priv_data->hci_handle = hci_handle;
+			}
+
+			if (!hci_handle) {
+				printk(O_ERR "Couldn't get HCI handle.\n");
+				retval = -ENODEV;
+				goto error1;
+			}
+
+			if (acpi_get_handle(NULL, tsx205_dev_list[1], &dis_handle) == AE_OK)
+				priv_data->dis_handle = dis_handle;
+
+			if (!dis_handle) {
+				printk(O_ERR "Couldn't get X205 Display handle.\n");
+				retval = -ENODEV;
+				goto error1;
+			}
+
+			/* Does the laptop has SLI enabled? */
+			omnibook_acpi_execute(dis_handle, (char *)TSX205_SLIVDO_METHOD, NULL, &has_sli);
+			if (has_sli)
+				dprintk("Toshiba X205 Display device found (SLI).\n");
+			else
+				dprintk("Toshiba X205 Display device found.\n");
+
+			priv_data->has_sli = has_sli;
+		}
+
+		if ((acpi_get_handle( dev_handle, GET_WIRELESS_METHOD, &method_handle) == AE_OK) &&
+		    (acpi_get_handle( dev_handle, SET_WIRELESS_METHOD, &method_handle) == AE_OK))
+			priv_data->has_antr_antw = 1;
+
+		if (omnibook_ectype & TSX205) {
+			if ((acpi_get_handle(dis_handle, TSX205_AUTO_DISPLAY_METHOD, &method_handle) ==  AE_OK) &&
+			    (acpi_get_handle(dis_handle, TSX205_AUTO_DISPLAY_METHOD, &method_handle) ==  AE_OK))
+				priv_data->has_doss_dosw = 1;
+		} else {
+			if ((acpi_get_handle( dev_handle, GET_DISPLAY_METHOD, &method_handle) == AE_OK) &&
+			    (acpi_get_handle( dev_handle, SET_DISPLAY_METHOD, &method_handle) == AE_OK))
+				priv_data->has_doss_dosw = 1;
+		}
+
+		retval = register_input_subsystem(priv_data);
+		if(retval)
+			goto error1;
+
+		io_op->backend->data = (void *) priv_data;
+		
+		mutex_unlock(&io_op->backend->mutex);
+		
+		/* attempt to register Toshiba bluetooth ACPI driver */
+		acpi_bus_register_driver(&omnibook_bt_driver);
+
+		dprintk("ACPI backend init OK\n");
+		
+		return 0;
+
+	} else {
+		dprintk("ACPI backend has already been initialized\n");
+		kref_get(&io_op->backend->kref);
+		return 0;
+	}
+		
+	error1:
+	kfree(priv_data);
+	io_op->backend->data = NULL;
+	error0:
+	mutex_unlock(&io_op->backend->mutex);
+	mutex_destroy(&io_op->backend->mutex);
+	return retval;
+}
+
+static void omnibook_acpi_free(struct kref *ref)
+{
+	struct omnibook_backend *backend;
+	struct acpi_backend_data *priv_data;
+
+	backend = container_of(ref, struct omnibook_backend, kref);
+	priv_data = backend->data;
+
+	dprintk("ACPI backend not used anymore: disposing\n");
+
+	
+	dprintk("ptr addr: %p driver name: %s\n",&omnibook_bt_driver, omnibook_bt_driver.name);
+	acpi_bus_unregister_driver(&omnibook_bt_driver);
+
+	flush_scheduled_work();
+	input_unregister_handler(&hook_handler);
+	input_unregister_device(priv_data->acpi_input_dev);
+	
+	mutex_lock(&backend->mutex);
+	kfree(backend->data);
+	backend->data = NULL;
+	mutex_unlock(&backend->mutex);
+	mutex_destroy(&backend->mutex);
+}
+
+static void omnibook_acpi_exit(const struct omnibook_operation *io_op)
+{
+	dprintk("Trying to dispose ACPI backend\n");
+	kref_put(&io_op->backend->kref, omnibook_acpi_free);
+}
+
+/* forward declaration */
+struct omnibook_backend acpi_backend;
+
+/* Function taken from toshiba_acpi */
+static acpi_status hci_raw(const u32 in[HCI_WORDS], u32 out[HCI_WORDS])
+{
+	struct acpi_backend_data *priv_data = acpi_backend.data;
+	struct acpi_object_list params;
+	union acpi_object in_objs[HCI_WORDS];
+	struct acpi_buffer results;
+	union acpi_object out_objs[HCI_WORDS + 1];
+	acpi_status status;
+	int i;
+
+	params.count = HCI_WORDS;
+	params.pointer = in_objs;
+	for (i = 0; i < HCI_WORDS; ++i) {
+		in_objs[i].type = ACPI_TYPE_INTEGER;
+		in_objs[i].integer.value = in[i];
+	}
+
+	results.length = sizeof(out_objs);
+	results.pointer = out_objs;
+
+	status = acpi_evaluate_object(priv_data->hci_handle, (char *)HCI_METHOD, &params,
+				      &results);
+	if ((status == AE_OK) && (out_objs->package.count <= HCI_WORDS)) {
+		for (i = 0; i < out_objs->package.count; ++i) {
+			out[i] = out_objs->package.elements[i].integer.value;
+		}
+	}
+
+	return status;
+}
+
+/*
+ * Set Bluetooth device state using the Toshiba BT device
+ */
+static int set_bt_status(const struct acpi_backend_data *priv_data, unsigned int state)
+{
+	int retval = 0;
+
+	if (state) {
+		retval = omnibook_acpi_execute(priv_data->bt_handle, TOSH_BT_ACTIVATE_USB, NULL, NULL);
+		if (retval)
+			goto out;
+		retval = omnibook_acpi_execute(priv_data->bt_handle, TOSH_BT_POWER_ON, NULL, NULL);
+		if (retval)
+			goto out;
+	} else {
+		retval = omnibook_acpi_execute(priv_data->bt_handle, TOSH_BT_DISABLE_USB, NULL, NULL);
+		if (retval)
+			goto out;
+		retval = omnibook_acpi_execute(priv_data->bt_handle, TOSH_BT_POWER_OFF, NULL, NULL);
+		if (retval)
+			goto out;
+	}
+	out:
+	return retval;
+}
+
+static int omnibook_acpi_bt_add(struct acpi_device *device)
+{
+	int retval;
+	struct acpi_backend_data *priv_data = acpi_backend.data;
+	
+	dprintk("Enabling Toshiba Bluetooth ACPI device.\n");
+	strcpy(acpi_device_name(device), TOSHIBA_ACPI_DEVICE_NAME);
+	strcpy(acpi_device_class(device), TOSHIBA_ACPI_BT_CLASS);
+
+	/* Save handle in backend private data structure. ugly. */
+
+	mutex_lock(&acpi_backend.mutex);
+	priv_data->bt_handle = device->handle;
+	retval = set_bt_status(priv_data, 1);
+	mutex_unlock(&acpi_backend.mutex);
+
+	return retval;
+}
+
+static int omnibook_acpi_bt_remove(struct acpi_device *device, int type)
+{
+	int retval;
+	struct acpi_backend_data *priv_data = acpi_backend.data;
+
+	mutex_lock(&acpi_backend.mutex);
+	dprintk("Disabling Toshiba Bluetooth ACPI device.\n");
+	retval = set_bt_status(priv_data, 0);
+	priv_data->bt_handle = NULL;
+	mutex_unlock(&acpi_backend.mutex);
+	
+	return retval;
+}
+
+/*
+ * Get Bluetooth status using the BTST method
+ */
+static int get_bt_status(const struct acpi_backend_data *priv_data, unsigned int *state)
+{
+	int retval = 0;
+	int raw_state;
+
+	if ((retval = omnibook_acpi_execute(priv_data->bt_handle, TOSH_BT_STATUS, NULL, &raw_state)))
+		return retval;
+
+	dprintk("BTST raw_state: %x\n", raw_state);
+
+	*state = BT_EX;
+	*state |= ((raw_state & TOSH_BT_USB_MASK) && (raw_state & TOSH_BT_POWER_MASK)) ? BT_STA : 0;
+
+	return retval;
+}
+
+/*
+ * Get the Bluetooth + Wireless status using the ANTR method
+ * FIXME: what if ANTR and BTST disagree ? we thrust ANTR for now
+ */
+static int get_wireless_status(const struct acpi_backend_data *priv_data, unsigned int *state)
+{
+	int retval = 0;
+	int raw_state;
+
+	if ((retval = omnibook_acpi_execute(priv_data->ec_handle, GET_WIRELESS_METHOD, NULL, &raw_state)))
+		return retval;
+
+	dprintk("get_wireless raw_state: %x\n", raw_state);
+
+	*state = (raw_state & WLEX_MASK) ? WIFI_EX : 0;
+	*state |= (raw_state & WLAT_MASK) ? WIFI_STA : 0;
+	*state |= (raw_state & KLSW_MASK) ? KILLSWITCH : 0;
+	*state |= (raw_state & BTEX_MASK) ? BT_EX : 0;
+	*state |= (raw_state & BTAT_MASK) ? BT_STA : 0;
+
+	return retval;
+}
+
+static int get_tsx205_wireless_status(const struct acpi_backend_data *priv_data, unsigned int *state)
+{
+	int retval = 0;
+	int raw_state;
+	u32 in[HCI_WORDS] = { HCI_GET, HCI_RF_CONTROL, 0, HCI_WIRELESS_CHECK, 0, 0 };
+	u32 out[HCI_WORDS];
+
+	hci_raw(in, out);
+
+	/* Now let's check the killswitch */
+	if ((retval = omnibook_acpi_execute(priv_data->ec_handle, TSX205_KILLSW_METHOD, NULL, &raw_state)))
+		return retval;
+
+	dprintk("get_wireless raw_state: %x\n", out[2]);
+
+	*state = ((out[2] & 0xff)) ? WIFI_EX : 0;
+	*state |= (raw_state) ? WIFI_STA : 0;
+	*state |= (!raw_state) ? KILLSWITCH : 0;
+
+	/* And finally BT */
+	if ((retval = omnibook_acpi_execute(priv_data->bt_handle, TOSH_BT_STATUS, NULL, &raw_state)))
+		return retval;
+	
+	*state |= BT_EX;
+	*state |= ((raw_state & TOSH_BT_USB_MASK) && (raw_state & TOSH_BT_POWER_MASK)) ? BT_STA : 0;
+
+	return retval;
+}
+
+static int omnibook_acpi_get_wireless(const struct omnibook_operation *io_op, unsigned int *state)
+{
+	int retval;
+	struct acpi_backend_data *priv_data = io_op->backend->data;
+
+	/* use BTST (BT device) if we don't have ANTR/ANTW (EC device) */
+	if (omnibook_ectype & TSX205)
+		retval = get_tsx205_wireless_status(priv_data, state);
+	else if (priv_data->has_antr_antw)
+		retval = get_wireless_status(priv_data, state);
+	else if(priv_data->bt_handle)
+		retval = get_bt_status(priv_data, state);
+	else
+		retval = -ENODEV;
+
+	return retval;
+}
+
+/*
+ * Set the Bluetooth + Wireless status using the ANTW method
+ */
+static int set_wireless_status(const struct acpi_backend_data *priv_data, unsigned int state)
+{
+	int retval;
+	int raw_state;
+
+	raw_state = !!(state & WIFI_STA);	/* bit 0 */
+	raw_state |= !!(state & BT_STA) << 0x1;	/* bit 1 */
+
+	dprintk("set_wireless raw_state: %x\n", raw_state);
+
+	retval = omnibook_acpi_execute(priv_data->ec_handle, SET_WIRELESS_METHOD, &raw_state, NULL);
+
+	return retval;
+}
+
+static int set_tsx205_wireless_status(const struct acpi_backend_data *priv_data, unsigned int state)
+{
+	int retval;
+	int raw_state = !!(state & WIFI_STA);
+
+	dprintk("set_wireless raw_state: %x\n", raw_state);
+
+	u32 in[HCI_WORDS] = { HCI_SET, HCI_RF_CONTROL, raw_state, HCI_WIRELESS_POWER, 0, 0 };
+	u32 out[HCI_WORDS];
+	hci_raw(in, out);
+
+	raw_state |= !!(state & BT_STA) << 0x1;	/* bit 1 */
+
+	/* BT status */
+	retval = set_bt_status(priv_data->bt_handle, state);
+
+	return retval;
+}
+
+static int omnibook_acpi_set_wireless(const struct omnibook_operation *io_op, unsigned int state)
+{
+	int retval = -ENODEV;
+	struct acpi_backend_data *priv_data = io_op->backend->data;
+
+	/* First try the TSX205 methods */
+	if(omnibook_ectype & TSX205)
+		retval = set_tsx205_wireless_status(priv_data, state);
+
+	/* Then try the ANTR/ANTW methods */
+	if(priv_data->has_antr_antw)
+		retval = set_wireless_status(priv_data, state);
+	
+	/* Then try the bluetooth ACPI device if present */
+	if(priv_data->bt_handle)
+		retval = set_bt_status(priv_data, (state & BT_STA));
+
+	return retval;
+}
+
+static int tsx205_get_display(const struct acpi_backend_data *priv_data, unsigned int *state, unsigned int device)
+{
+	int retval = 0;
+	int raw_state = 0;
+
+	retval = omnibook_acpi_execute(priv_data->dis_handle, tsx205_video_list[device], NULL, &raw_state);
+	if (retval < 0) {
+		dprintk(O_ERR "Failed to get video device (%d) state.\n", device);
+		return retval;
+	}
+
+	/* Ugly, but better than nothing... */
+	switch (device) {
+	case 0:
+	case 4:	/* LCD device */
+		dprintk("get_display LCD (%d) raw_state: %x\n", device, raw_state);
+		if (raw_state == TSX205_DSPY_DE) {
+			*state |= DISPLAY_LCD_DET;
+			*state |= DISPLAY_LCD_ON;
+		} else
+		if (raw_state == TSX205_DSPY_DN)
+			*state |= DISPLAY_LCD_DET;
+		else if (raw_state == TSX205_DSPY_NE)
+			*state |= DISPLAY_LCD_ON;
+		break;
+	case 1:
+	case 5:	/* CRT device */
+		dprintk("get_display CRT (%d) raw_state: %x\n", device, raw_state);
+		if (raw_state == TSX205_DSPY_DE) {
+			*state |= DISPLAY_CRT_DET;
+			*state |= DISPLAY_CRT_ON;
+		} else
+		if (raw_state == TSX205_DSPY_DN)
+			*state |= DISPLAY_CRT_DET;
+		else if (raw_state == TSX205_DSPY_NE)
+			*state |= DISPLAY_CRT_ON;
+		break;
+	case 2:
+	case 6:	/* TV-OUT device */
+		dprintk("get_display TV-OUT (%d) raw_state: %x\n", device, raw_state);
+		if (raw_state == TSX205_DSPY_DE) {
+			*state |= DISPLAY_TVO_DET;
+			*state |= DISPLAY_TVO_ON;
+		} else
+		if (raw_state == TSX205_DSPY_DN)
+			*state |= DISPLAY_TVO_DET;
+		else if (raw_state == TSX205_DSPY_NE)
+			*state |= DISPLAY_TVO_ON;
+		break;
+	case 3:
+	case 7:	/* DVI device */
+		dprintk("get_display DVI (%d) raw_state: %x\n", device, raw_state);
+		if (raw_state == TSX205_DSPY_DE) {
+			*state |= DISPLAY_DVI_DET;
+			*state |= DISPLAY_DVI_ON;
+		} else
+		if (raw_state == TSX205_DSPY_DN)
+			*state |= DISPLAY_DVI_DET;
+		else if (raw_state == TSX205_DSPY_NE)
+			*state |= DISPLAY_DVI_ON;
+		break;
+	}
+
+	return retval;
+}
+
+static int omnibook_acpi_get_display(const struct omnibook_operation *io_op, unsigned int *state)
+{
+	int retval = 0;
+	int raw_state = 0;
+	struct acpi_backend_data *priv_data = io_op->backend->data;
+	
+	if(!priv_data->has_doss_dosw)
+		return -ENODEV;
+
+	if (omnibook_ectype & TSX205) {
+		int i;
+
+		/* Loop 'tru the different Video-Out devices */
+		if (priv_data->has_sli)
+			for (i = 4; i < ARRAY_SIZE(tsx205_video_list); i++)
+				retval = tsx205_get_display(priv_data, state, i);
+		else
+			for (i = 0; i < 4; i++)
+				retval = tsx205_get_display(priv_data, state, i);
+
+		if (retval < 0)
+			return -EIO;
+	
+		goto vidout;
+	}
+
+	retval = omnibook_acpi_execute(priv_data->ec_handle, GET_DISPLAY_METHOD, NULL, &raw_state);
+	if (retval < 0)
+		return retval;
+
+	dprintk("get_display raw_state: %x\n", raw_state);
+
+	/* Backend specific to backend-neutral conversion */
+	*state = (raw_state & LCD_CSTE) ? DISPLAY_LCD_ON : 0;
+	*state |= (raw_state & CRT_CSTE) ? DISPLAY_CRT_ON : 0;
+	*state |= (raw_state & TVO_CSTE) ? DISPLAY_TVO_ON : 0;
+	*state |= (raw_state & DVI_CSTE) ? DISPLAY_DVI_ON : 0;
+
+	*state |= (raw_state & LCD_CADL) ? DISPLAY_LCD_DET : 0;
+	*state |= (raw_state & CRT_CADL) ? DISPLAY_CRT_DET : 0;
+	*state |= (raw_state & TVO_CADL) ? DISPLAY_TVO_DET : 0;
+	*state |= (raw_state & DVI_CADL) ? DISPLAY_DVI_DET : 0;
+
+vidout:
+	return DISPLAY_LCD_ON | DISPLAY_CRT_ON | DISPLAY_TVO_ON | DISPLAY_DVI_ON
+	    | DISPLAY_LCD_DET | DISPLAY_CRT_DET | DISPLAY_TVO_DET | DISPLAY_DVI_DET;
+}
+
+static const unsigned int acpi_display_mode_list[] = {
+	DISPLAY_LCD_ON,
+	DISPLAY_CRT_ON,
+	DISPLAY_LCD_ON | DISPLAY_CRT_ON,
+	DISPLAY_TVO_ON,
+	DISPLAY_LCD_ON | DISPLAY_TVO_ON,
+	DISPLAY_CRT_ON | DISPLAY_TVO_ON,
+	DISPLAY_LCD_ON | DISPLAY_CRT_ON | DISPLAY_TVO_ON,
+	DISPLAY_DVI_ON,
+	DISPLAY_LCD_ON | DISPLAY_DVI_ON,
+};
+
+static int omnibook_acpi_set_display(const struct omnibook_operation *io_op, unsigned int state)
+{
+	int retval = 0;
+	int i; 
+	int matched = -1;
+	struct acpi_backend_data *priv_data = io_op->backend->data;
+
+	if(!priv_data->has_doss_dosw)
+		return -ENODEV;
+
+	for (i = 0; i < ARRAY_SIZE(acpi_display_mode_list); i++) {
+		if (acpi_display_mode_list[i] == state) {
+			matched = i + 1;	/* raw state is array row number + 1 */
+			break;
+		}
+	}
+	if (matched == -1) {
+		printk("Display mode %x is unsupported.\n", state);
+		return -EINVAL;
+	}
+
+	dprintk("set_display raw_state: %x\n", matched);
+
+	if (omnibook_ectype & TSX205) {
+		if (priv_data->has_sli)
+			retval = omnibook_acpi_execute(priv_data->dis_handle, TSX205_SLI_DISPLAY_METHOD, &matched, NULL);
+		else
+			retval = omnibook_acpi_execute(priv_data->dis_handle, TSX205_SET_DISPLAY_METHOD, &matched, NULL);
+	} else
+		retval = omnibook_acpi_execute(priv_data->ec_handle, SET_DISPLAY_METHOD, &matched, NULL);
+	if (retval < 0)
+		return retval;
+
+	return DISPLAY_LCD_ON | DISPLAY_CRT_ON | DISPLAY_TVO_ON | DISPLAY_DVI_ON;
+}
+
+static int omnibook_acpi_get_throttle(const struct omnibook_operation *io_op, unsigned int *state)
+{
+	int retval;
+	int thtl_en = 0, thtl_dty = 0;
+	int param;
+	struct acpi_backend_data *priv_data = io_op->backend->data;
+	
+	param = 0;
+	/* Read THEN aka THTL_EN in ICH6M datasheets */
+	retval = omnibook_acpi_execute(priv_data->ec_handle, GET_THROTTLE_METHOD, &param, &thtl_en); 
+	if ( thtl_en == 0 ) {
+		*state = 0;
+		return retval;
+	}
+	param = 1;
+	/* Read DUTY aka THTL_DTY in ICH6M datasheets */
+	retval = omnibook_acpi_execute(priv_data->ec_handle, GET_THROTTLE_METHOD, &param, &thtl_dty);
+	WARN_ON(thtl_dty > 7); /* We shouldn't encounter more than 7 throttling level */
+	*state = 8 - thtl_dty; /* THTL_DTY and ACPI T-state are reverse mapped */
+	return retval;
+}
+
+static int omnibook_acpi_set_throttle(const struct omnibook_operation *io_op, unsigned int state)
+{
+	struct acpi_backend_data *priv_data = io_op->backend->data;
+	/* THTL_DTY and ACPI T-state are reverse mapped */
+	/* throttling.c already clamped state between 0 and 7 */
+	if (state) 
+		state = 8 - state;
+
+	return omnibook_acpi_execute(priv_data->ec_handle, SET_THROTTLE_METHOD, &state, NULL);
+}
+
+/*
+ * Fn+foo hotkeys handling
+ */
+static int omnibook_hci_get_hotkeys(const struct omnibook_operation *io_op, unsigned int *state)
+{
+	u32 in[HCI_WORDS] = { HCI_GET, HCI_HOTKEY_EVENT, 0, 0, 0, 0 };
+	u32 out[HCI_WORDS];
+	acpi_status status = hci_raw(in, out);
+
+	if (status != AE_OK)
+		return HCI_FAILURE;
+
+	dprintk("get_hotkeys raw_state: %x\n", out[2]);
+
+	*state = (out[2] & ACPI_FN_MASK) ? HKEY_FN : 0;
+
+	return 0;
+}
+
+static int omnibook_hci_set_hotkeys(const struct omnibook_operation *io_op, unsigned int state)
+{
+	u32 in[HCI_WORDS] = { 0, 0, 0, 0, 0, 0 };
+	u32 out[HCI_WORDS];
+	in[0] = HCI_SET;
+	in[1] = HCI_HOTKEY_EVENT;
+	in[2] = (state & HKEY_FN) ? 1 : 0;
+	acpi_status status = hci_raw(in, out);
+
+	dprintk("set_hotkeys (Fn interface) raw_state: %x\n", in[2]);
+
+	return (status == AE_OK) ? out[0] : HCI_FAILURE;
+}
+
+static int omnibook_acpi_get_events(unsigned int *state)
+{
+	acpi_status status;
+	struct acpi_backend_data *priv_data = acpi_backend.data;
+  
+	/* We need to call the NTFY method first so it can activate the TECF variable */
+	status = omnibook_acpi_execute(priv_data->ec_handle, TSX205_NOTIFY_METHOD, NULL, NULL);
+	if (status != AE_OK) {
+		dprintk(O_ERR "Failed to activate NTFY method.\n");
+		return -EIO;
+	}
+
+	/* Now we can poll the INFO method to get last pressed hotkey */
+	status = omnibook_acpi_execute(priv_data->hci_handle, TSX205_EVENTS_METHOD, NULL, state);
+	if (status != AE_OK) {
+		dprintk(O_ERR "Failed to get Hotkey event.\n");
+		return -EIO;
+	}
+
+	/* We only care about a key press, so just report the Fn key Press/Release */
+	if ( ((*state & ~0x80) == 0x100) || ((*state & ~0x80) == 0x17f) )
+		*state &= ~0x80;
+
+	return status;
+}
+
+/*
+ * Adjust the lcd backlight level by delta.
+ * Used for Fn+F6/F7 keypress
+ */
+static int adjust_brighness(int delta)
+{
+	struct omnibook_feature *lcd_feature = omnibook_find_feature("lcd");
+	struct omnibook_operation *io_op;
+	int retval = 0;
+	u8 brgt;
+
+	if(!lcd_feature)
+		return -ENODEV;
+
+	io_op = lcd_feature->io_op;
+
+	mutex_lock(&io_op->backend->mutex);
+
+	if(( retval = __backend_byte_read(io_op, &brgt)))
+		goto out;	
+
+	dprintk("Fn-F6/F7 pressed: adjusting brightness.\n");
+
+	if (((int) brgt + delta) < 0)
+		brgt = 0;
+	else if ((brgt + delta) > omnibook_max_brightness)
+		brgt = omnibook_max_brightness;
+	else
+		brgt += delta;
+
+	retval = __backend_byte_write(io_op, brgt);
+
+	out:
+	mutex_unlock(&io_op->backend->mutex);
+	return retval;
+}
+
+/*
+ * Workqueue handler for Fn hotkeys
+ */
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,19))
+static void omnibook_handle_fnkey(struct work_struct *work)
+#else
+static void omnibook_handle_fnkey(void* data)
+#endif
+{
+	int i;
+	u32 gen_scan;
+	struct input_dev *input_dev;
+	acpi_status status;
+
+	status = omnibook_acpi_get_events(&gen_scan);
+	if (status != AE_OK)
+		return;
+
+	dprintk("detected scancode 0x%x.\n", gen_scan);
+	switch(gen_scan) {
+	case HCI_BRIGHTNESSDOWN:
+		adjust_brighness(-1);
+		break;
+	case HCI_BRIGHTNESSUP:
+		adjust_brighness(+1);
+		break;
+	}
+
+	for (i = 0 ; i < ARRAY_SIZE(acpi_scan_table); i++) {
+		if (gen_scan == acpi_scan_table[i].scancode) {
+			dprintk("generating keycode %i.\n", acpi_scan_table[i].keycode);
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,19))
+			input_dev = container_of(work, struct acpi_backend_data, fnkey_work)->acpi_input_dev;
+#else
+			input_dev = ((struct acpi_backend_data *) data)->acpi_input_dev;
+#endif
+			omnibook_report_key(input_dev, acpi_scan_table[i].keycode);
+			break;
+		}
+	}
+}
+
+struct omnibook_backend acpi_backend = {
+	.name = "acpi",
+	.hotkeys_read_cap = HKEY_FN,
+	.hotkeys_write_cap = HKEY_FN,
+	.init = omnibook_acpi_init,
+	.exit = omnibook_acpi_exit,
+	.aerial_get = omnibook_acpi_get_wireless,
+	.aerial_set = omnibook_acpi_set_wireless,
+	.display_get = omnibook_acpi_get_display,
+	.display_set = omnibook_acpi_set_display,
+	.throttle_get = omnibook_acpi_get_throttle,
+	.throttle_set = omnibook_acpi_set_throttle,
+	.hotkeys_get = omnibook_hci_get_hotkeys,
+	.hotkeys_set = omnibook_hci_set_hotkeys,
+};
+
+#else				/* CONFIG_ACPI */
+
+/* dummy backend for non-ACPI systems */
+static int _fail_probe(const struct omnibook_operation *io_op)
+{
+	return -ENODEV;
+}
+
+struct omnibook_backend acpi_backend = {
+	.name = "acpi",
+	.init = _fail_probe,
+};
+
+#endif				/* CONFIG_ACPI */
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/display.c
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/display.c
@@ -0,0 +1,114 @@
+/*
+ * display.c -- External display (LCD,VGA,TV-OUT) feature
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2, or (at your option) any
+ * later version.
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * Written by Soós Péter <sp@osb.hu>, 2002-2004
+ * Modified by Mathieu Bérard <mathieu.berard@crans.org>, 2006
+ */
+
+#include "omnibook.h"
+#include "hardware.h"
+
+static const char display_name[][16] = {
+	"Internal LCD",
+	"External VGA",
+	"External TV-OUT",
+	"External DVI",
+};
+
+static int omnibook_display_read(char *buffer, struct omnibook_operation *io_op)
+{
+	int len = 0;
+	int retval;
+	unsigned int sta, en_mask, det_mask;
+
+	retval = backend_display_get(io_op, &sta);
+	if (retval < 0)
+		return retval;
+
+	for (en_mask = DISPLAY_LCD_ON; en_mask <= DISPLAY_DVI_ON; en_mask = en_mask << 1) {
+		det_mask = en_mask << 4;	/* see display masks in omnibook.h */
+		if (!(retval & en_mask) && !(retval & det_mask))
+			continue;	/* not supported */
+		len += sprintf(buffer + len, "%s:", display_name[ffs(en_mask) - 1]);
+		if (retval & det_mask)
+			len +=
+			    sprintf(buffer + len, " display %s",
+				    (sta & det_mask) ? "present" : "absent");
+		if (retval & en_mask)
+			len +=
+			    sprintf(buffer + len, " port %s",
+				    (sta & en_mask) ? "enabled" : "disabled");
+		len += sprintf(buffer + len, "\n");
+	}
+
+	return len;
+}
+
+static int omnibook_display_write(char *buffer, struct omnibook_operation *io_op)
+{
+	int retval;
+	unsigned int state;
+	char *endp;
+
+	state = simple_strtoul(buffer, &endp, 16);
+	if (endp == buffer)
+		return -EINVAL;
+	else
+		retval = backend_display_set(io_op, state);
+
+	return retval;
+}
+
+static struct omnibook_feature display_driver;
+
+static int __init omnibook_display_init(struct omnibook_operation *io_op)
+{
+	int retval;
+	unsigned int state;
+	
+	/* Disable file writing if unsuported by backend */
+	if (!io_op->backend->display_set)
+		display_driver.write = NULL;
+		
+	retval = backend_display_get(io_op, &state);
+	if (retval < 0)
+		return retval;
+	else
+		return 0;
+}
+
+static struct omnibook_tbl display_table[] __initdata = {
+	{TSM70 | TSX205, {ACPI,}},
+	{TSM40, {SMI, SMI_GET_DISPLAY_STATE, SMI_SET_DISPLAY_STATE, 0, 0, 0}},
+	{XE3GF | TSP10 | TSM70 | TSM30X | TSM40, SIMPLE_BYTE(EC, XE3GF_STA1, XE3GF_SHDD_MASK)},
+	{XE3GC, SIMPLE_BYTE(EC, XE3GC_STA1, XE3GC_CRTI_MASK)},
+	{OB500 | OB510 | OB6000 | OB6100 | XE4500, SIMPLE_BYTE(EC, OB500_STA1, OB500_CRTS_MASK)},
+	{OB4150, SIMPLE_BYTE(EC, OB4150_STA2, OB4150_CRST_MASK)},
+	{0,}
+};
+
+static struct omnibook_feature __declared_feature display_driver = {
+	.name = "display",
+	.enabled = 1,
+	.init = omnibook_display_init,
+	.read = omnibook_display_read,
+	.write = omnibook_display_write,
+	.ectypes =
+	    XE3GF | XE3GC | OB500 | OB510 | OB6000 | OB6100 | XE4500 | OB4150 | TSP10 | TSM70 | TSM30X |
+	    TSM40 | TSX205,
+	.tbl = display_table,
+};
+
+module_param_named(display, display_driver.enabled, int, S_IRUGO);
+MODULE_PARM_DESC(display, "Use 0 to disable, 1 to enable display status handling");
+/* End of file */
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/ac.c
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/ac.c
@@ -0,0 +1,60 @@
+/*
+ * ac.c -- AC adapter related functions
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2, or (at your option) any
+ * later version.
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * Written by Soós Péter <sp@osb.hu>, 2002-2004
+ * Modified by Mathieu Bérard <mathieu.berard@crans.org>, 2006
+ */
+
+#include "omnibook.h"
+#include "hardware.h"
+
+static int omnibook_ac_read(char *buffer, struct omnibook_operation *io_op)
+{
+	int len = 0;
+	u8 ac;
+	int retval;
+
+	retval = backend_byte_read(io_op, &ac);
+	if (retval < 0)
+		return retval;
+
+	len += sprintf(buffer + len, "AC %s\n", (!!ac) ? "on-line" : "off-line");
+
+	return len;
+}
+
+static struct omnibook_tbl ac_table[] __initdata = {
+	{XE3GF | TSP10 | TSM30X | TSM70, SIMPLE_BYTE(EC, XE3GF_ADP, XE3GF_ADP_MASK)},
+	{XE3GC | AMILOD, SIMPLE_BYTE(EC, XE3GC_STA1, XE3GC_ADP_MASK)},
+	{OB500 | OB510 | OB6000 | OB6100 | XE4500, SIMPLE_BYTE(EC, OB500_STA2, OB500_ADP_MASK)},
+	{OB4150, SIMPLE_BYTE(EC, OB4150_ADP, OB4150_ADP_MASK)},
+	{XE2, SIMPLE_BYTE(EC, XE2_STA1, XE2_ADP_MASK)},
+	{0,}
+};
+
+struct omnibook_feature __declared_feature ac_driver = {
+	.name = "ac",
+#ifdef CONFIG_OMNIBOOK_LEGACY
+	.enabled = 1,
+#else
+	.enabled = 0,
+#endif
+	.read = omnibook_ac_read,
+	.ectypes = XE3GF | XE3GC | OB500 | OB510 | OB6000 | OB6100 | XE4500 | OB4150 | XE2 | AMILOD | TSP10 | TSM70 | TSM30X,
+	.tbl = ac_table,
+};
+
+module_param_named(ac, ac_driver.enabled, int, S_IRUGO);
+MODULE_PARM_DESC(ac, "Use 0 to disable, 1 to enable AC adapter status monitoring");
+
+/* End of file */
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/bluetooth.c
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/bluetooth.c
@@ -0,0 +1,104 @@
+/*
+ * wireless.c Bluetooth feature
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2, or (at your option) any
+ * later version.
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * Written by Mathieu Bérard <mathieu.berard@crans.org>, 2006
+ *
+ */
+
+#include "omnibook.h"
+#include "hardware.h"
+
+static int omnibook_bt_read(char *buffer, struct omnibook_operation *io_op)
+{
+	int len = 0;
+	int retval;
+	unsigned int state;
+
+	if ((retval = backend_aerial_get(io_op, &state)))
+		return retval;
+
+	len +=
+	    sprintf(buffer + len, "Bluetooth adapter is %s",
+		    (state & BT_EX) ? "present" : "absent");
+	if (state & BT_EX)
+		len += sprintf(buffer + len, " and %s", (state & BT_STA) ? "enabled" : "disabled");
+	len += sprintf(buffer + len, ".\n");
+	return len;
+
+}
+
+static int omnibook_bt_write(char *buffer, struct omnibook_operation *io_op)
+{
+	int retval = 0;
+	unsigned int state;
+
+	if(mutex_lock_interruptible(&io_op->backend->mutex))
+		return -ERESTARTSYS;	
+
+	if ((retval = __backend_aerial_get(io_op, &state)))
+		goto out;
+
+	if (*buffer == '0')
+		state &= ~BT_STA;
+	else if (*buffer == '1')
+		state |= BT_STA;
+	else {
+		retval = -EINVAL;
+		goto out;
+	}
+
+	retval = __backend_aerial_set(io_op, state);
+
+	out:		
+	mutex_unlock(&io_op->backend->mutex);
+	return retval;
+}
+
+static struct omnibook_feature bt_driver;
+
+static int __init omnibook_bt_init(struct omnibook_operation *io_op)
+{
+	int retval = 0;
+	unsigned int state;
+
+/*
+ *  Refuse enabling/disabling a non-existent device
+ */
+
+	if ((retval = backend_aerial_get(io_op, &state)))
+		return retval;
+
+	if (!(state & BT_EX))
+		bt_driver.write = NULL;
+
+	return retval;
+}
+
+static struct omnibook_tbl wireless_table[] __initdata = {
+	{TSM70 | TSA105 | TSX205, {ACPI,}},	/* stubs to select backend */
+	{TSM40, {SMI,}},			/* stubs to select backend */
+	{0,}
+};
+
+static struct omnibook_feature __declared_feature bt_driver = {
+	.name = "bluetooth",
+	.enabled = 1,
+	.read = omnibook_bt_read,
+	.write = omnibook_bt_write,
+	.init = omnibook_bt_init,
+	.ectypes = TSM70 | TSM40 | TSA105 | TSX205,
+	.tbl = wireless_table,
+};
+
+module_param_named(bluetooth, bt_driver.enabled, int, S_IRUGO);
+MODULE_PARM_DESC(bluetooth, "Use 0 to disable, 1 to enable bluetooth adapter control");
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/fan.c
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/fan.c
@@ -0,0 +1,183 @@
+/*
+ * fan.c -- fan status/control
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2, or (at your option) any
+ * later version.
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * Written by Soós Péter <sp@osb.hu>, 2002-2004
+ * Modified by Mathieu Bérard <mathieu.berard@crans.org>, 2006
+ */
+
+#include "omnibook.h"
+
+#include <linux/delay.h>
+#include <asm/io.h>
+#include "hardware.h"
+
+static const struct omnibook_operation ctmp_io_op = { EC, XE3GF_CTMP, 0, 0, 0, 0 };
+static const struct omnibook_operation fot_io_op = { EC, XE3GF_FOT, XE3GF_FOT, 0, 0, 0 };
+
+static int omnibook_get_fan(struct omnibook_operation *io_op)
+{
+	u8 fan;
+	int retval;
+
+	if ((retval = backend_byte_read(io_op, &fan)))
+		return retval;
+
+	/*
+	 * For most models the reading is a bool
+	 * It as to be inverted on all but OB6000|OB6100|OB4150|AMILOD
+	 * TSP10|XE3GF|TSX205 return an integer
+	 */
+
+	if (omnibook_ectype & (TSP10 | XE3GF | TSX205))
+		retval = fan;
+	else if (omnibook_ectype & (OB6000 | OB6100 | OB4150 | AMILOD))
+		retval = !!fan;
+	else
+		retval = !fan;
+
+	return retval;
+}
+
+static int omnibook_fan_on(struct omnibook_operation *io_op)
+{
+	return omnibook_apply_write_mask(io_op, 1);
+}
+
+static int omnibook_fan_off(struct omnibook_operation *io_op)
+{
+	int i, retval = 0;
+
+	if (!(omnibook_ectype & (XE3GF | TSP10 | TSX205))) {
+		retval = omnibook_apply_write_mask(io_op, 0);
+		return retval;
+	} else {
+	/*
+ 	 * Special handling for XE3GF & TSP10
+	 */
+		u8 fot, temp, fan;
+
+		if(mutex_lock_interruptible(&io_op->backend->mutex))
+			return -ERESTARTSYS;	
+
+		retval = __backend_byte_read(io_op, &fan);
+
+		/* error or fan is already off */
+		if (retval || !fan)
+			goto out;
+
+		/* now we set FOT to current temp, then reset to initial value */
+		if ((retval = __backend_byte_read(&fot_io_op, &fot)))
+			goto out;
+		if ((retval = __backend_byte_read(&ctmp_io_op, &temp)))
+			goto out;
+
+		/* Wait for no longer than 250ms (this is arbitrary). */
+		for (i = 0; i < 250; i++) {
+			__backend_byte_write(&fot_io_op, temp);
+			mdelay(1);
+			__backend_byte_read(io_op, &fan);
+			if (!fan) /* Fan is off */
+				break;
+		}
+		__backend_byte_write(&fot_io_op, fot);
+
+		if(i == 250 ) {
+			printk(O_ERR "Attempt to switch off the fan failed.\n");
+			retval = -EIO;
+		}
+
+		out:		
+		mutex_unlock(&io_op->backend->mutex);
+	}
+		
+
+	return retval;
+}
+
+static int omnibook_fan_read(char *buffer, struct omnibook_operation *io_op)
+{
+	int fan;
+	int len = 0;
+	char *str;
+
+	fan = omnibook_get_fan(io_op);
+	if (fan < 0)
+		return fan;
+	str = (fan) ? "on" : "off";
+
+	if (fan > 1)
+		len += sprintf(buffer + len, "Fan is %s (level %d)\n", str, fan);
+	else
+		len += sprintf(buffer + len, "Fan is %s\n", str);
+
+	return len;
+}
+
+static int omnibook_fan_write(char *buffer, struct omnibook_operation *io_op)
+{
+	int retval;
+
+	switch (*buffer) {
+	case '0':
+		retval = omnibook_fan_off(io_op);
+		break;
+	case '1':
+		retval = omnibook_fan_on(io_op);
+		break;
+	default:
+		retval = -EINVAL;
+	}
+	return retval;
+}
+
+static struct omnibook_feature fan_driver;
+
+static int __init omnibook_fan_init(struct omnibook_operation *io_op)
+{
+	/*
+	 * OB4150
+	 * XE2
+	 * AMILOD
+	 * They only support fan reading 
+	 */
+	if (omnibook_ectype & (OB4150 | XE2 | AMILOD))
+		fan_driver.write = NULL;
+	return 0;
+}
+
+static struct omnibook_tbl fan_table[] __initdata = {
+	{XE3GF | TSP10 | TSM70 | TSX205, {EC, XE3GF_FSRD, XE3GF_FSRD, 0, XE3GF_FAN_ON_MASK, 0}},
+	{OB500,
+	 {PIO, OB500_GPO1, OB500_GPO1, OB500_FAN_OFF_MASK, -OB500_FAN_ON_MASK, OB500_FAN_OFF_MASK}},
+	{OB510,
+	 {PIO, OB510_GPIO, OB510_GPIO, OB510_FAN_OFF_MASK, -OB510_FAN_ON_MASK, OB510_FAN_OFF_MASK}},
+	{OB6000 | OB6100,
+	 {EC, OB6000_STA1, OB6000_STA1, OB6000_FAN_MASK, OB6000_FAN_MASK, -OB6000_FAN_MASK}},
+	{OB4150 | AMILOD, {EC, OB4150_STA1, 0, OB4150_FAN_MASK, 0, 0}},
+	{XE2, {PIO, OB500_GPO1, 0, XE2_FAN_MASK, 0, 0}},
+	{0,}
+};
+
+static struct omnibook_feature __declared_feature fan_driver = {
+	.name = "fan",
+	.enabled = 1,
+	.read = omnibook_fan_read,
+	.write = omnibook_fan_write,
+	.init = omnibook_fan_init,
+	.ectypes = XE3GF | OB500 | OB510 | OB6000 | OB6100 | OB4150 | XE2 | AMILOD | TSP10 | TSX205,
+	.tbl = fan_table,
+};
+
+module_param_named(fan, fan_driver.enabled, int, S_IRUGO);
+MODULE_PARM_DESC(fan, "Use 0 to disable, 1 to enable fan status monitor and control");
+/* End of file */
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/touchpad.c
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/touchpad.c
@@ -0,0 +1,126 @@
+/*
+ * touchpad.c -- enable/disable touchpad
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2, or (at your option) any
+ * later version.
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * Written by Soós Péter <sp@osb.hu>, 2002-2004
+ * Modified by Mathieu Bérard <mathieu.berard@crans.org>, 2006
+ */
+
+#include "omnibook.h"
+#include "hardware.h"
+
+static int omnibook_touchpad_set(struct omnibook_operation *io_op, int status)
+{
+	int retval = 0;
+
+	if(mutex_lock_interruptible(&io_op->backend->mutex))
+		return -ERESTARTSYS;
+
+	if ((retval = __omnibook_toggle(io_op, !!status))) {
+		printk(O_ERR "Failed touchpad %sable command.\n", status ? "en" : "dis");
+		goto out;
+	}
+
+	io_op->backend->touchpad_state = !!status;
+
+	out:
+	mutex_unlock(&io_op->backend->mutex);
+	return retval;
+}
+
+/*
+ * Power management handlers: redisable touchpad on resume (if necessary)
+ */
+static int omnibook_touchpad_resume(struct omnibook_operation *io_op)
+{
+	int retval;
+	mutex_lock(&io_op->backend->mutex);
+	retval = __omnibook_toggle(io_op, !!io_op->backend->touchpad_state);
+	mutex_unlock(&io_op->backend->mutex);
+	return retval;
+}
+
+/*
+ * Hardware query is unsupported, so reading is unreliable.
+ */
+static int omnibook_touchpad_read(char *buffer, struct omnibook_operation *io_op)
+{
+	int len = 0;
+
+	if(mutex_lock_interruptible(&io_op->backend->mutex))
+		return -ERESTARTSYS;
+
+	len +=
+	    sprintf(buffer + len, "Last touchpad action was an %s command.\n",
+		    io_op->backend->touchpad_state ? "enable" : "disable");
+
+	mutex_unlock(&io_op->backend->mutex);
+	return len;
+}
+
+static int omnibook_touchpad_write(char *buffer, struct omnibook_operation *io_op)
+{
+	int cmd;
+
+	if (*buffer == '0' || *buffer == '1') {
+		cmd = *buffer - '0';
+		if (!omnibook_touchpad_set(io_op, cmd)) {
+			dprintk("%sabling touchpad.\n", cmd ? "En" : "Dis");
+		}
+	} else {
+		return -EINVAL;
+	}
+	return 0;
+}
+
+
+static int __init omnibook_touchpad_init(struct omnibook_operation *io_op)
+{
+	mutex_lock(&io_op->backend->mutex);
+	/* Touchpad is assumed to be enabled by default */
+	io_op->backend->touchpad_state = 1;
+	mutex_unlock(&io_op->backend->mutex);
+	return 0;
+}
+
+/*
+ * Reenable touchpad upon exit
+ */
+static void __exit omnibook_touchpad_cleanup(struct omnibook_operation *io_op)
+{
+	omnibook_touchpad_set(io_op, 1);
+	printk(O_INFO "Enabling touchpad.\n");
+}
+
+static struct omnibook_tbl touchpad_table[] __initdata = {
+	{XE3GF | XE3GC | TSP10,
+	 COMMAND(KBC, OMNIBOOK_KBC_CMD_TOUCHPAD_ENABLE, OMNIBOOK_KBC_CMD_TOUCHPAD_DISABLE)},
+	{TSM70, {CDI, 0, TSM70_FN_INDEX, 0, TSM70_TOUCHPAD_ON, TSM70_TOUCHPAD_OFF}},
+	{0,}
+};
+
+static struct omnibook_feature __declared_feature touchpad_driver = {
+	.name = "touchpad",
+	.enabled = 1,
+	.read = omnibook_touchpad_read,
+	.write = omnibook_touchpad_write,
+	.init = omnibook_touchpad_init,
+	.exit = omnibook_touchpad_cleanup,
+	.resume = omnibook_touchpad_resume,
+	.ectypes = XE3GF | XE3GC | TSP10 | TSM70,
+	.tbl = touchpad_table,
+};
+
+module_param_named(touchpad, touchpad_driver.enabled, int, S_IRUGO);
+MODULE_PARM_DESC(touchpad, "Use 0 to disable, 1 to enable touchpad handling");
+
+/* End of file */
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/Kconfig
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/Kconfig
@@ -0,0 +1,5 @@
+config OMNIBOOK
+	tristate "Kernel module for HP and Toshiba laptops"
+	depends on X86
+	default m
+	---help---
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/BOM
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/BOM
@@ -0,0 +1,2 @@
+Downloaded from:	http://sourceforge.net/projects/omke/
+Current Version:	2.20070211
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/nbsmi.c
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/nbsmi.c
@@ -0,0 +1,968 @@
+/*
+ * nbsmi.c -- Toshiba SMI low-level acces code
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2, or (at your option) any
+ * later version.
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * Written by Mathieu Bérard <mathieu.berard@crans.org>, 2006
+ *
+ * Sources of inspirations for this code were:
+ * -Toshiba via provided hardware specification
+ * -Thorsten Zachmann with the 's1bl' project
+ * -Frederico Munoz with the 'tecra_acpi' project
+ * Thanks to them
+ */
+
+#include "omnibook.h"
+#include "hardware.h"
+#include <linux/preempt.h>
+#include <linux/pci.h>
+#include <linux/kref.h>
+#include <asm/io.h>
+#include <asm/mc146818rtc.h>
+#include <linux/workqueue.h>
+#include <linux/delay.h>
+
+/* copied from drivers/input/serio/i8042-io.h */
+#define I8042_KBD_PHYS_DESC "isa0060/serio0"
+
+/*
+ * ATI's IXP PCI-LPC bridge
+ */
+#define INTEL_PMBASE	0x40
+#define INTEL_GPE0_EN	0x2c
+
+#define BUFFER_SIZE	0x20
+#define INTEL_OFFSET	0x60
+#define	INTEL_SMI_PORT	0xb2	/* APM_CNT port in INTEL ICH specs */
+
+/*
+ * Toshiba Specs state 0xef here but:
+ * -this would overflow (ef + 19 > ff)
+ * -code from Toshiba use e0, which make much more sense
+ */
+
+#define ATI_OFFSET	0xe0
+#define	ATI_SMI_PORT	0xb0
+
+#define	EC_INDEX_PORT	0x300
+#define EC_DATA_PORT	0x301
+
+/* Masks decode for GetAeral */
+#define WLEX_MASK 	0x4
+#define WLAT_MASK	0x8
+#define BTEX_MASK	0x1
+#define BTAT_MASK	0x2
+
+/*
+ * Private data of this backend
+ */
+struct nbsmi_backend_data {
+	struct pci_dev *lpc_bridge;	/* Southbridge chip ISA bridge/LPC interface PCI device */
+	u8 start_offset;		/* Start offset in CMOS memory */
+	struct input_dev *nbsmi_input_dev;
+	struct work_struct fnkey_work;
+};
+
+/*
+ * Possible list of supported southbridges
+ * Here mostly to implement a more or less clean PCI probing
+ * Works only because of previous DMI probing.
+ * It's in compal.c
+ */
+extern const struct pci_device_id lpc_bridge_table[];
+
+/*
+ * Since we are going to trigger an SMI, all registers (I assume this does not
+ * include esp and maybe ebp) and eflags may be mangled in the
+ * process. 
+ * We also disable preemtion and IRQs upon SMI call.
+ */
+static inline u32 ati_do_smi_call(u16 function)
+{
+	unsigned long flags;
+	u32 retval = 0;
+
+	local_irq_save(flags);
+	preempt_disable();
+	
+/*
+ * eflags, eax, ebx, ecx, edx, esi and edi are clobbered upon writing to SMI_PORT
+ * thus the clobber list.
+ *
+ * Equivalent pseudocode:
+ *
+ * eax = function; [non null]
+ * outw(eax, ATI_SMI_PORT); <- This Trigger an SMI
+ * if( eax == 0 ) [success if eax has been cleared]
+ * 	goto out;
+ * if( inb(ATI_SMI_PORT + 1) == 0) [if not in eax, success maybe be stored here]
+ *	goto out;
+ * retval = -EIO; [too bad]
+ * out:
+ */
+	__asm__ __volatile__("outw  %%ax, %2;	\
+			      orw %%ax, %%ax;	\
+			      jz 1f;		\
+			      inw %3, %%ax;	\
+			      orw %%ax, %%ax;	\
+			      jz 1f;		\
+			      movl %4, %0;	\
+			      1:;"
+			     : "=m" (retval)
+			     : "a"(function), "N"(ATI_SMI_PORT), "N"(ATI_SMI_PORT+1), "i"(-EIO)
+			     : "memory", "ebx", "ecx", "edx", "esi", "edi", "cc");
+
+	local_irq_restore(flags);
+	preempt_enable_no_resched();
+	return retval;
+}
+
+static inline u32 intel_do_smi_call(u16 function, struct pci_dev *lpc_bridge)
+{
+	u32 state;
+	unsigned long flags;
+	u32 retval = 0;
+	u32 sci_en = 0;
+
+	local_irq_save(flags);
+	preempt_disable();
+
+/* 
+ * We get the PMBASE offset ( bits 15:7 at 0x40 offset of PCI config space )
+ * And we access offset 2c (GPE0_EN), save the state, disable all SCI
+ * and restore the state after the SMI call
+ */			
+	pci_read_config_dword(lpc_bridge, INTEL_PMBASE, &sci_en);
+	sci_en = sci_en & 0xff80; /* Keep bits 15:7 */
+	sci_en += INTEL_GPE0_EN;  /* GPEO_EN offset */
+	state = inl(sci_en);
+	outl(0, sci_en);
+
+/*
+ * eflags, eax, ebx, ecx, edx, esi and edi are clobbered upon writing to SMI_PORT
+ * thus the clobber list.
+ *
+ * Equivalent pseudocode:
+ *
+ * eax = function; [non null]
+ * outw(eax, INTEL_SMI_PORT); <- This Trigger an SMI
+ * if( eax == 0 ) [success if eax has been cleared]
+ * 	goto out; 
+ * retval = -EIO; [too bad]
+ * out:
+ */
+	__asm__ __volatile__("outw %%ax, %2;	\
+			      orw %%ax, %%ax;	\
+			      jz 1f;		\
+			      movl %3, %0;	\
+			      1:;"
+			     : "=m" (retval)
+			     : "a"(function), "N"(INTEL_SMI_PORT), "i"(-EIO)
+			     : "memory", "ebx", "ecx", "edx", "esi", "edi", "cc");
+
+	outl(state, sci_en);
+	local_irq_restore(flags);
+	preempt_enable_no_resched();
+	return retval;
+}
+
+static int nbsmi_smi_command(u16 function, 
+			     const u8 * inputbuffer,
+			     u8 * outputbuffer,
+			     const struct nbsmi_backend_data *priv_data)
+{
+	int count;
+	u32 retval = 0;
+	
+
+	for (count = 0; count < BUFFER_SIZE; count++) {
+		outb(count + priv_data->start_offset, RTC_PORT(2));
+		outb(*(inputbuffer + count), RTC_PORT(3));
+	}
+
+/* 
+ * We have to write 0xe4XX to smi_port
+ * where XX is the SMI function code
+ */
+	function = (function & 0xff) << 8;
+	function |= 0xe4;
+
+	switch (priv_data->lpc_bridge->vendor) {
+	case PCI_VENDOR_ID_INTEL:
+		retval = intel_do_smi_call(function, priv_data->lpc_bridge);
+		break;
+	case PCI_VENDOR_ID_ATI:
+		retval = ati_do_smi_call(function);
+		break;
+	default:
+		BUG();
+	}
+
+	if (retval)
+		printk(O_ERR "smi_command failed with error %u.\n", retval);
+
+	for (count = 0; count < BUFFER_SIZE; count++) {
+		outb(count + priv_data->start_offset, RTC_PORT(2));
+		*(outputbuffer + count) = inb(RTC_PORT(3));
+	}
+
+	return retval;
+}
+
+static int nbsmi_smi_read_command(const struct omnibook_operation *io_op, u8 * data)
+{
+	int retval;
+	u8 *inputbuffer;
+	u8 *outputbuffer;
+	struct nbsmi_backend_data *priv_data = io_op->backend->data;
+
+	if (!priv_data)
+		return -ENODEV;
+
+	inputbuffer = kcalloc(BUFFER_SIZE, sizeof(u8), GFP_KERNEL);
+	if (!inputbuffer) {
+		retval = -ENOMEM;
+		goto error1;
+	}
+
+	outputbuffer = kcalloc(BUFFER_SIZE, sizeof(u8), GFP_KERNEL);
+	if (!outputbuffer) {
+		retval = -ENOMEM;
+		goto error2;
+	}
+
+	retval = nbsmi_smi_command((u16) io_op->read_addr, inputbuffer, outputbuffer, priv_data);
+	if (retval)
+		goto out;
+
+	*data = outputbuffer[0];
+
+	if (io_op->read_mask)
+		*data &= io_op->read_mask;
+
+      out:
+	kfree(outputbuffer);
+      error2:
+	kfree(inputbuffer);
+      error1:
+	return retval;
+}
+
+static int nbsmi_smi_write_command(const struct omnibook_operation *io_op, u8 data)
+{
+	int retval;
+	u8 *inputbuffer;
+	u8 *outputbuffer;
+	struct nbsmi_backend_data *priv_data = io_op->backend->data;
+
+	if (!priv_data)
+		return -ENODEV;
+
+	inputbuffer = kcalloc(BUFFER_SIZE, sizeof(u8), GFP_KERNEL);
+	if (!inputbuffer) {
+		retval = -ENOMEM;
+		goto error1;
+	}
+
+	outputbuffer = kcalloc(BUFFER_SIZE, sizeof(u8), GFP_KERNEL);
+	if (!outputbuffer) {
+		retval = -ENOMEM;
+		goto error2;
+	}
+
+	inputbuffer[0] = data;
+
+	retval = nbsmi_smi_command((u16) io_op->write_addr, inputbuffer, outputbuffer, priv_data);
+
+	kfree(outputbuffer);
+      error2:
+	kfree(inputbuffer);
+      error1:
+	return retval;
+}
+
+/*
+ * Read/Write to INDEX/DATA interface at port 0x300 (SMSC Mailbox registers)
+ */
+static inline void nbsmi_ec_read_command(u8 index, u8 * data)
+{
+	outb(index, EC_INDEX_PORT);
+	*data = inb(EC_DATA_PORT);
+}
+
+#if 0
+static inline void nbsmi_ec_write_command(u8 index, u8 data)
+{
+	outb(index, EC_INDEX_PORT);
+	outb(data, EC_DATA_PORT);
+}
+#endif
+
+
+/*
+ * Hotkeys workflow:
+ * 1. Fn+Foo pressed
+ * 2. Scancode 0x6d generated by kbd controller
+ * 3. Scancode 0x6d caught by omnibook input handler
+ * 4. SMI Call issued -> Got keycode of last actually pressed Fn key
+ * 5. nbsmi_scan_table used to associate a detected keycode with a generated one
+ * 6. Generated keycode issued using the omnibook input device
+ */
+
+/*
+ * The input handler should only bind with the standard AT keyboard.
+ * XXX: Scancode 0x6d won't be detected if the keyboard has already been
+ * grabbed (the Xorg event input driver do that)
+ */
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,21))
+static int hook_connect(struct input_handler *handler,
+					 struct input_dev *dev,
+					 const struct input_device_id *id)
+#elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18))
+static struct input_handle *hook_connect(struct input_handler *handler,
+					 struct input_dev *dev,
+					 const struct input_device_id *id)
+#else
+static struct input_handle *hook_connect(struct input_handler *handler,
+					 struct input_dev *dev,
+					 struct input_device_id *id)
+#endif
+{
+	struct input_handle *handle;
+	int error;
+
+	/* the 0x0001 vendor magic number is found in atkbd.c */
+	if(!(dev->id.bustype == BUS_I8042 && dev->id.vendor == 0x0001))
+		goto out_nobind;
+
+	if(!strstr(dev->phys, I8042_KBD_PHYS_DESC))
+		goto out_nobind;
+
+	dprintk("hook_connect for device %s.\n", dev->name);
+
+	if(dev->grab)
+		printk(O_WARN "Input device is grabbed by %s, Fn hotkeys won't work.\n",
+			dev->grab->name);
+
+	handle = kzalloc(sizeof(struct input_handle), GFP_KERNEL);
+	if (!handle)
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,21))
+		return -ENOMEM;
+#else
+		return NULL;
+#endif
+
+	handle->dev = dev;
+	handle->handler = handler;
+	handle->name = "omnibook_scancode_hook";
+	handle->private = handler->private;
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,21))
+	error = input_register_handle(handle);
+	if (error) {
+		dprintk("register_handle failed\n");
+		goto out_nobind_free;
+	} 
+	error = input_open_device(handle);
+	if (error) {
+		dprintk("register_handle failed\n");
+		input_unregister_handle(handle);
+		goto out_nobind_free;
+	} 
+	
+#else
+	error = input_open_device(handle);
+	if (error==0) dprintk("Input device opened\n");
+	else { 
+		dprintk("opening input device failed\n");
+		goto out_nobind_free;
+	}
+#endif
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,21))
+	return 0;
+out_nobind_free:
+	kfree(handle);
+out_nobind:
+	return -ENODEV;
+#else
+	return handle;
+out_nobind_free:
+	kfree(handle);
+out_nobind:
+	return NULL;
+#endif	
+}
+
+static void hook_disconnect(struct input_handle *handle)
+{
+	dprintk("hook_disconnect.\n");
+	input_close_device(handle);
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,21))
+	input_unregister_handle(handle);
+#endif
+	kfree(handle);
+}
+
+/*
+ * Hook for scancode 0x6d. Actual handling is done in a workqueue as 
+ * the nbsmi backend might sleep.
+ */
+
+static void hook_event(struct input_handle *handle, unsigned int event_type,
+		      unsigned int event_code, int value)
+{
+	if (event_type == EV_MSC && event_code == MSC_SCAN && value == SMI_FN_SCAN)
+		schedule_work(&((struct nbsmi_backend_data *)handle->private)->fnkey_work);
+}
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18))
+static const struct input_device_id hook_ids[] = {
+#else
+static struct input_device_id hook_ids[] = {
+#endif
+	{
+                .flags = INPUT_DEVICE_ID_MATCH_EVBIT,
+                .evbit = { BIT(EV_KEY) },
+        },
+	{ },    /* Terminating entry */
+};
+
+static struct input_handler hook_handler = {
+	.event		= hook_event,
+	.connect	= hook_connect,
+	.disconnect	= hook_disconnect,
+	.name		= OMNIBOOK_MODULE_NAME,
+	.id_table	= hook_ids,
+};
+
+/*
+ * Define some KEY_ that may be missing in input.h for some kernel versions
+ */
+#ifndef KEY_WLAN
+#define KEY_WLAN 238
+#endif 
+
+/*
+ * Detected scancode to keycode table
+ */
+static const struct {
+	unsigned int scancode;
+	unsigned int keycode;
+} nbsmi_scan_table[] = {
+	{ KEY_ESC, KEY_MUTE},
+	{ KEY_F1, KEY_FN_F1},
+	{ KEY_F2, KEY_PROG1},
+	{ KEY_F3, KEY_SLEEP},
+	{ KEY_F4, KEY_SUSPEND},
+	{ KEY_F5, KEY_SWITCHVIDEOMODE},
+	{ KEY_F6, KEY_BRIGHTNESSDOWN},
+	{ KEY_F7, KEY_BRIGHTNESSUP},
+	{ KEY_F8, KEY_WLAN},
+	{ KEY_F9, KEY_FN_F9},
+	{ KEY_SPACE, KEY_ZOOM},
+	{ 0,0},
+};
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,19))
+static void omnibook_handle_fnkey(struct work_struct *work);
+#else
+static void omnibook_handle_fnkey(void* data);
+#endif
+
+/*
+ * Register the input handler and the input device in the input subsystem
+ */
+static int register_input_subsystem(struct nbsmi_backend_data *priv_data)
+{
+	int i, retval = 0;
+	struct input_dev *nbsmi_input_dev;
+
+	nbsmi_input_dev = input_allocate_device();
+	if (!nbsmi_input_dev) {
+		retval = -ENOMEM;
+		goto out;
+	}
+
+	nbsmi_input_dev->name = "Omnibook NbSMI scancode generator";
+	nbsmi_input_dev->phys = "omnibook/input0";
+	nbsmi_input_dev->id.bustype = BUS_HOST;
+	
+	set_bit(EV_KEY, nbsmi_input_dev->evbit);
+	
+	for(i=0 ; i < ARRAY_SIZE(nbsmi_scan_table); i++)
+		set_bit(nbsmi_scan_table[i].keycode, nbsmi_input_dev->keybit);
+
+	retval = input_register_device(nbsmi_input_dev);
+	if(retval) {
+		input_free_device(nbsmi_input_dev);
+		goto out;
+	}
+
+	priv_data->nbsmi_input_dev = nbsmi_input_dev;
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,19))
+	INIT_WORK(&priv_data->fnkey_work, *omnibook_handle_fnkey);
+#else
+	INIT_WORK(&priv_data->fnkey_work, *omnibook_handle_fnkey, priv_data);
+#endif
+
+
+	hook_handler.private = priv_data;
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18))
+	retval = input_register_handler(&hook_handler);	
+#else
+	input_register_handler(&hook_handler);
+#endif
+
+	out:	
+	return retval;
+}
+
+/*
+ * Try to init the backend
+ * This function can be called blindly as it use a kref
+ * to check if the init sequence was already done.
+ */
+static int omnibook_nbsmi_init(const struct omnibook_operation *io_op)
+{
+	int retval = 0;
+	int i;
+	u8 ec_data;
+	u32 smi_port = 0;
+	struct nbsmi_backend_data *priv_data;
+
+	/* ectypes other than TSM40 have no business with this backend */
+	if (!(omnibook_ectype & TSM40))
+		return -ENODEV;
+
+	if (io_op->backend->already_failed) {
+		dprintk("NbSmi backend init already failed, skipping.\n");
+		return -ENODEV;
+	}
+
+	if (!io_op->backend->data) {
+		/* Fist use of the backend */
+		dprintk("Try to init NbSmi\n");
+		mutex_init(&io_op->backend->mutex);
+		mutex_lock(&io_op->backend->mutex);
+		kref_init(&io_op->backend->kref);
+
+		priv_data = kzalloc(sizeof(struct nbsmi_backend_data), GFP_KERNEL);
+		if (!priv_data) {
+			retval = -ENOMEM;
+			goto error0;
+		}
+
+		/* PCI probing: find the LPC Super I/O bridge PCI device */
+		for (i = 0; !priv_data->lpc_bridge && lpc_bridge_table[i].vendor; ++i)
+			priv_data->lpc_bridge =
+			    pci_get_device(lpc_bridge_table[i].vendor, lpc_bridge_table[i].device,
+					   NULL);
+
+		if (!priv_data->lpc_bridge) {
+			printk(O_ERR "Fail to find a supported LPC I/O bridge, please report\n");
+			retval = -ENODEV;
+			goto error1;
+		}
+
+		if ((retval = pci_enable_device(priv_data->lpc_bridge))) {
+			printk(O_ERR "Unable to enable PCI device.\n");
+			goto error2;
+		}
+
+		switch (priv_data->lpc_bridge->vendor) {
+		case PCI_VENDOR_ID_INTEL:
+			priv_data->start_offset = INTEL_OFFSET;
+			smi_port = INTEL_SMI_PORT;
+			break;
+		case PCI_VENDOR_ID_ATI:
+			priv_data->start_offset = ATI_OFFSET;
+			smi_port = ATI_SMI_PORT;
+			break;
+		default:
+			BUG();
+		}
+
+		if (!request_region(smi_port, 2, OMNIBOOK_MODULE_NAME)) {
+			printk(O_ERR "Request SMI I/O region error\n");
+			retval = -ENODEV;
+			goto error2;
+		}
+
+		if (!request_region(EC_INDEX_PORT, 2, OMNIBOOK_MODULE_NAME)) {
+			printk(O_ERR "Request EC I/O region error\n");
+			retval = -ENODEV;
+			goto error3;
+		}
+
+		/*
+		 * Try some heuristic tests to avoid enabling this interface on unsuported laptops:
+		 * See what a port 300h read index 8f gives. Guess there is nothing if read 0xff
+		 */
+
+		nbsmi_ec_read_command(SMI_FN_PRESSED, &ec_data);
+		dprintk("NbSmi test probe read: %x\n", ec_data);
+		if (ec_data == 0xff) {
+			printk(O_ERR "Probing at SMSC Mailbox registers failed, disabling NbSmi\n");
+			retval = -ENODEV;
+			goto error4;
+		}
+
+		retval = register_input_subsystem(priv_data);
+		if(retval)
+			goto error4;
+
+		io_op->backend->data = priv_data;
+
+		dprintk("NbSmi init ok\n");
+		mutex_unlock(&io_op->backend->mutex);
+		return 0;
+	} else {
+		dprintk("NbSmi has already been initialized\n");
+		kref_get(&io_op->backend->kref);
+		return 0;
+	}
+      error4:
+	release_region(EC_INDEX_PORT, 2);
+      error3:
+	release_region(smi_port, 2);
+      error2:
+	pci_dev_put(priv_data->lpc_bridge);
+      error1:
+	kfree(priv_data);
+	io_op->backend->data = NULL;
+      error0:
+	io_op->backend->already_failed = 1;
+	mutex_unlock(&io_op->backend->mutex);
+	mutex_destroy(&io_op->backend->mutex);
+	return retval;
+}
+
+/*
+ * Free all allocated stuff and unregister from the input subsystem
+ */
+static void nbsmi_free(struct kref *ref)
+{
+	u32 smi_port = 0;
+	struct omnibook_backend *backend;
+	struct nbsmi_backend_data *priv_data;
+
+	dprintk("NbSmi not used anymore: disposing\n");
+
+	backend = container_of(ref, struct omnibook_backend, kref);
+	priv_data = backend->data;
+
+	flush_scheduled_work();
+	input_unregister_handler(&hook_handler);
+	input_unregister_device(priv_data->nbsmi_input_dev);
+
+	mutex_lock(&backend->mutex);
+
+	switch (priv_data->lpc_bridge->vendor) {
+	case PCI_VENDOR_ID_INTEL:
+		smi_port = INTEL_SMI_PORT;
+		break;
+	case PCI_VENDOR_ID_ATI:
+		smi_port = ATI_SMI_PORT;
+		break;
+	default:
+		BUG();
+	}
+
+	pci_dev_put(priv_data->lpc_bridge);
+	release_region(smi_port, 2);
+	release_region(EC_INDEX_PORT, 2);
+	kfree(priv_data);
+	backend->data = NULL;
+	mutex_unlock(&backend->mutex);
+	mutex_destroy(&backend->mutex);
+}
+
+static void omnibook_nbsmi_exit(const struct omnibook_operation *io_op)
+{
+	/* ectypes other than TSM40 have no business with this backend */
+	BUG_ON(!(omnibook_ectype & TSM40));
+	dprintk("Trying to dispose NbSmi\n");
+	kref_put(&io_op->backend->kref, nbsmi_free);
+}
+
+/*
+ * Adjust the lcd backlight level by delta.
+ * Used for Fn+F6/F7 keypress
+ */
+static int adjust_brighness(int delta)
+{
+	struct omnibook_feature *lcd_feature = omnibook_find_feature("lcd");
+	struct omnibook_operation *io_op;
+	int retval = 0;
+	u8 brgt;
+
+	if(!lcd_feature)
+		return -ENODEV;
+
+	io_op = lcd_feature->io_op;
+
+	mutex_lock(&io_op->backend->mutex);
+
+	if(( retval = __backend_byte_read(io_op, &brgt)))
+		goto out;	
+
+	dprintk("FnF6/F7 pressed: adjusting britghtnes.\n");
+
+	if (((int) brgt + delta) < 0)
+		brgt = 0;
+	else if ((brgt + delta) > omnibook_max_brightness)
+		brgt = omnibook_max_brightness;
+	else
+		brgt += delta;
+
+	retval = __backend_byte_write(io_op, brgt);
+
+	out:
+	mutex_unlock(&io_op->backend->mutex);
+	return retval;
+}
+
+static const struct omnibook_operation last_scan_op = SIMPLE_BYTE(SMI,SMI_GET_FN_LAST_SCAN,0);
+
+/*
+ * Workqueue handler for Fn hotkeys
+ */
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,19))
+static void omnibook_handle_fnkey(struct work_struct *work)
+#else
+static void omnibook_handle_fnkey(void* data)
+#endif
+{
+	int i;
+	u8 gen_scan;
+	struct input_dev *input_dev;
+
+	if(backend_byte_read(&last_scan_op, &gen_scan))
+		return;
+
+	dprintk("detected scancode %x.\n", gen_scan);
+	switch(gen_scan) {
+	case KEY_F6:
+		adjust_brighness(-1);
+		break;
+	case KEY_F7:
+		adjust_brighness(+1);
+		break;
+	}
+
+	for(i = 0 ; i < ARRAY_SIZE(nbsmi_scan_table); i++) {
+		if( gen_scan == nbsmi_scan_table[i].scancode) {
+			dprintk("generating keycode %i.\n", nbsmi_scan_table[i].keycode);
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,19))
+			input_dev = container_of(work, struct nbsmi_backend_data, fnkey_work)->nbsmi_input_dev;
+#else
+			input_dev = ((struct nbsmi_backend_data *) data)->nbsmi_input_dev;
+#endif
+			omnibook_report_key(input_dev, nbsmi_scan_table[i].keycode);
+			break;
+		}
+	}
+}
+
+static int omnibook_nbsmi_get_wireless(const struct omnibook_operation *io_op, unsigned int *state)
+{
+	int retval = 0;
+	struct omnibook_operation aerial_op = SIMPLE_BYTE(SMI, SMI_GET_KILL_SWITCH, 0);
+	u8 data;
+
+	if ((retval = nbsmi_smi_read_command(&aerial_op, &data)))
+		goto out;
+
+	dprintk("get_wireless (kill switch) raw_state: %x\n", data);
+
+	*state = data ? KILLSWITCH : 0;
+
+	aerial_op.read_addr = SMI_GET_AERIAL;
+
+	if ((retval = nbsmi_smi_read_command(&aerial_op, &data)))
+		goto out;
+
+	dprintk("get_wireless (aerial) raw_state: %x\n", data);
+
+	*state |= (data & WLEX_MASK) ? WIFI_EX : 0;
+	*state |= (data & WLAT_MASK) ? WIFI_STA : 0;
+	*state |= (data & BTEX_MASK) ? BT_EX : 0;
+	*state |= (data & BTAT_MASK) ? BT_STA : 0;
+
+      out:
+	return retval;
+}
+
+static int omnibook_nbsmi_set_wireless(const struct omnibook_operation *io_op, unsigned int state)
+{
+	int retval = 0;
+	u8 data;
+	struct omnibook_operation aerial_op = SIMPLE_BYTE(SMI, SMI_SET_AERIAL, 0);
+
+	data = !!(state & BT_STA);
+	data |= !!(state & WIFI_STA) << 0x1;
+
+	dprintk("set_wireless raw_state: %x\n", data);
+
+	retval = nbsmi_smi_write_command(&aerial_op, data);
+
+	return retval;
+}
+
+static int omnibook_nbmsi_hotkeys_get(const struct omnibook_operation *io_op, unsigned int *state)
+{
+	int retval;
+	u8 data = 0;
+	struct omnibook_operation hotkeys_op = SIMPLE_BYTE(SMI, SMI_GET_FN_INTERFACE, 0);
+
+	retval = nbsmi_smi_read_command(&hotkeys_op, &data);
+	if (retval < 0)
+		return retval;
+
+	dprintk("get_hotkeys raw_state: %x\n", data);
+
+	*state = (data & SMI_FN_KEYS_MASK) ? HKEY_FN : 0;
+	*state |= (data & SMI_STICK_KEYS_MASK) ? HKEY_STICK : 0;
+	*state |= (data & SMI_FN_TWICE_LOCK_MASK) ? HKEY_TWICE_LOCK : 0;
+	*state |= (data & SMI_FN_DOCK_MASK) ? HKEY_DOCK : 0;
+
+	return 0;
+}
+
+
+static int omnibook_nbmsi_hotkeys_set(const struct omnibook_operation *io_op, unsigned int state)
+{
+	int i, retval;
+	u8 data, rdata;
+	struct omnibook_operation hotkeys_op = SIMPLE_BYTE(SMI, SMI_SET_FN_F5_INTERFACE, 0);	
+	u8* data_array;
+
+	data = !!(state & HKEY_FNF5);
+
+	dprintk("set_hotkeys (Fn F5) raw_state: %x\n", data);
+
+	retval = nbsmi_smi_write_command(&hotkeys_op, data);
+	if (retval < 0)
+		return retval;
+
+	hotkeys_op.write_addr = SMI_SET_FN_INTERFACE;
+	hotkeys_op.read_addr =	SMI_GET_FN_INTERFACE;
+
+	data = (state & HKEY_FN) ? SMI_FN_KEYS_MASK : 0;
+	data |= (state & HKEY_STICK) ? SMI_STICK_KEYS_MASK : 0;
+	data |= (state & HKEY_TWICE_LOCK) ? SMI_FN_TWICE_LOCK_MASK : 0;
+	data |= (state & HKEY_DOCK) ? SMI_FN_DOCK_MASK : 0;
+
+	dprintk("set_hotkeys (Fn interface) raw_state: %x\n", data);
+
+	/*
+	 * Hardware seems to be quite stubborn and multiple retries may be
+	 * required. The criteria here is simple: retry until probed state match
+	 * the requested one (with timeout).
+	 */
+
+	data_array = kcalloc(250, sizeof(u8), GFP_KERNEL);
+	if(!data_array)
+		return -ENODEV;
+
+	for (i = 0; i < 250; i++) {
+		retval = nbsmi_smi_write_command(&hotkeys_op, data);
+		if (retval)
+			goto out;
+		mdelay(1);
+		retval = nbsmi_smi_read_command(&hotkeys_op, &rdata);
+		if(retval)
+			goto out;
+		data_array[i] = rdata;
+		if(rdata == data) {
+			dprintk("check loop ok after %i iters\n.",i);
+			retval = 0;
+			goto out;
+		}
+	}
+	dprintk("error or check loop timeout !!\n");
+	dprintk("forensics datas: ");
+	for (i = 0; i < 250; i++)
+		dprintk_simple("%x ", data_array[i]);
+	dprintk_simple("\n");
+out:
+	kfree(data_array);
+	return retval;
+}
+
+static const unsigned int nbsmi_display_mode_list[] = {
+	DISPLAY_LCD_ON,
+	DISPLAY_LCD_ON | DISPLAY_CRT_ON,
+	DISPLAY_CRT_ON,
+	DISPLAY_LCD_ON | DISPLAY_TVO_ON,
+	DISPLAY_TVO_ON,
+};
+
+static int omnibook_nbmsi_display_get(const struct omnibook_operation *io_op, unsigned int *state)
+{
+	int retval = 0;
+	u8 data;
+
+	retval = nbsmi_smi_read_command(io_op, &data);
+	if (retval < 0)
+		return retval;
+
+	if (data > (ARRAY_SIZE(nbsmi_display_mode_list) - 1))
+		return -EIO;
+
+	*state = nbsmi_display_mode_list[data];
+
+	return DISPLAY_LCD_ON | DISPLAY_CRT_ON | DISPLAY_TVO_ON;
+}
+
+static int omnibook_nbmsi_display_set(const struct omnibook_operation *io_op, unsigned int state)
+{
+	int retval;
+	int i;
+	u8 matched = 255;
+
+	for (i = 0; i < ARRAY_SIZE(nbsmi_display_mode_list); i++) {
+		if (nbsmi_display_mode_list[i] == state) {
+			matched = i;
+			break;
+		}
+	}
+
+	if(matched == 255) {
+		printk(O_ERR "Display mode %x is unsupported.\n", state);
+		return -EINVAL;
+	}
+
+	retval = nbsmi_smi_write_command(io_op, matched);
+	if (retval < 0)
+		return retval;
+
+	return DISPLAY_LCD_ON | DISPLAY_CRT_ON | DISPLAY_TVO_ON;
+}
+
+struct omnibook_backend nbsmi_backend = {
+	.name = "nbsmi",
+	.hotkeys_read_cap = HKEY_FN | HKEY_STICK | HKEY_TWICE_LOCK | HKEY_DOCK,
+	.hotkeys_write_cap = HKEY_FN | HKEY_STICK | HKEY_TWICE_LOCK | HKEY_DOCK | HKEY_FNF5,
+	.init = omnibook_nbsmi_init,
+	.exit = omnibook_nbsmi_exit,
+	.byte_read = nbsmi_smi_read_command,
+	.byte_write = nbsmi_smi_write_command,
+	.aerial_get = omnibook_nbsmi_get_wireless,
+	.aerial_set = omnibook_nbsmi_set_wireless,
+	.hotkeys_get = omnibook_nbmsi_hotkeys_get,
+	.hotkeys_set = omnibook_nbmsi_hotkeys_set,
+	.display_get = omnibook_nbmsi_display_get,
+	.display_set = omnibook_nbmsi_display_set,
+};
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/compal.c
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/compal.c
@@ -0,0 +1,526 @@
+/*
+ * compal.c -- EC PIO Command/Data/Index mode low-level access code
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2, or (at your option) any
+ * later version.
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * Written by Mathieu Bérard <mathieu.berard@crans.org>, 2006
+ *
+ */
+
+#include "omnibook.h"
+
+#include <linux/delay.h>
+#include <linux/ioport.h>
+#include <linux/pci.h>
+#include <linux/kref.h>
+
+#include <asm/io.h>
+#include "hardware.h"
+
+/*
+ * ATI's IXP PCI-LPC bridge
+ */
+#define PCI_DEVICE_ID_ATI_SB400 0x4377
+
+/* 
+ * PCI Config space regiser
+ * Laptop with Intel ICH Chipset
+ * See ICH6M and ICH7M spec
+ */
+#define INTEL_LPC_GEN1_DEC	0x84
+#define INTEL_LPC_GEN4_DEC	0x90
+#define INTEL_IOPORT_BASE 	0xff2c
+
+/* 
+ * PCI Config space regiser
+ * Laptop with ATI Chipset
+ * FIXME Untested, name unknown
+ */
+#define ATI_LPC_REG		0x4a
+#define ATI_IOPORT_BASE 	0xfd60
+
+/* 
+ *This interface uses 2 ports for command and 1 port for data
+ *These are relative to the ioport_base address
+ */
+
+#define PIO_PORT_COMMAND1	0x1
+#define PIO_PORT_COMMAND2	0x2
+#define PIO_PORT_DATA		0x3
+
+/*
+ * Private data of this backend
+ */
+static struct pci_dev *lpc_bridge;	/* Southbridge chip ISA bridge/LPC interface PCI device */
+static u32 ioport_base;		/* PIO base adress */
+static union {
+	u16 word;
+	u32 dword;
+} pci_reg_state;		/* Saved state of register in PCI config spave */
+
+/*
+ * Possible list of supported southbridges
+ * Here mostly to implement a more or less clean PCI probing
+ * Works only because of previous DMI probing.
+ * Shared with nbsmi backend
+ */
+const struct pci_device_id lpc_bridge_table[] = {
+	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_0, PCI_ANY_ID, PCI_ANY_ID, 0, 0,},
+	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_0, PCI_ANY_ID, PCI_ANY_ID, 0, 0,},
+	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_0, PCI_ANY_ID, PCI_ANY_ID, 0, 0,},
+	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_10, PCI_ANY_ID, PCI_ANY_ID, 0, 0,},
+	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_0, PCI_ANY_ID, PCI_ANY_ID, 0, 0,},
+	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_12, PCI_ANY_ID, PCI_ANY_ID, 0, 0,},
+	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_0, PCI_ANY_ID, PCI_ANY_ID, 0, 0,},
+	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_12, PCI_ANY_ID, PCI_ANY_ID, 0, 0,},
+	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801E_0, PCI_ANY_ID, PCI_ANY_ID, 0, 0,},
+	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_0, PCI_ANY_ID, PCI_ANY_ID, 0, 0,},
+	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0,},
+	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_0, PCI_ANY_ID, PCI_ANY_ID, 0, 0,},
+	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0,},
+	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_2, PCI_ANY_ID, PCI_ANY_ID, 0, 0,},
+	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_0, PCI_ANY_ID, PCI_ANY_ID, 0, 0,},
+	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0,},
+	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_30, PCI_ANY_ID, PCI_ANY_ID, 0, 0,},
+	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_31, PCI_ANY_ID, PCI_ANY_ID, 0, 0,},
+        {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_4, PCI_ANY_ID, PCI_ANY_ID, 0, 0,},
+	{PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SB400, PCI_ANY_ID, PCI_ANY_ID, 0, 0,},
+	{0,},			/* End of list */
+};
+
+/*
+ * Low-level Read function:
+ * Write a 2-bytes wide command to the COMMAND ports
+ * Read the result in the DATA port
+ */
+static unsigned char lowlevel_read(u16 command)
+{
+	unsigned char data;
+	outb((command & 0xff00) >> 8, ioport_base + PIO_PORT_COMMAND1);
+	outb(command & 0x00ff, ioport_base + PIO_PORT_COMMAND2);
+	data = inb(ioport_base + PIO_PORT_DATA);
+	return data;
+}
+
+/*
+ * Low-level Write function:
+ * Write a 2-bytes wide command to the COMMAND ports
+ * Write the result in the DATA port
+ */
+static void lowlevel_write(u16 command, u8 data)
+{
+	outb((command & 0xff00) >> 8, ioport_base + PIO_PORT_COMMAND1);
+	outb(command & 0x00ff, ioport_base + PIO_PORT_COMMAND2);
+	outb(data, ioport_base + PIO_PORT_DATA);
+}
+
+/*
+ * Probe for a state of the PIO Command/Data/Index interface
+ * Give some time for the controler to settle in the desired state
+ * mode significance:
+ * 0: Waiting for command
+ * 1,2,3: I am confused FIXME
+ */
+static int check_cdimode_flag(unsigned int mode)
+{
+	int i;
+	int retval;
+
+	/*dprintk("Index mode:");*/
+	for (i = 1; i <= 250; i++) {
+		retval = lowlevel_read(0xfbfc);
+		/*dprintk_simple(" [%i]", retval);*/
+		if (retval == mode) {
+			/*dprintk_simple(".\n");
+			dprintk("Index Mode Ok (%i) after %i iter\n", mode, i);*/
+			return 0;
+		}
+		udelay(100);
+	}
+	printk(O_ERR "check_cdimode_flag timeout.\n");
+	return -ETIME;
+}
+
+/*
+ * Check for conventional default (0xf432) state in Commad ports
+ */
+static int check_default_state(void)
+{
+	int i;
+
+	for (i = 1; i <= 250; i++) {
+		if ((inb(ioport_base + PIO_PORT_COMMAND1) == 0xf4)
+		    && (inb(ioport_base + PIO_PORT_COMMAND2) == 0x32))
+			return 0;
+		udelay(100);
+	}
+	printk(O_ERR "check_default_state timeout.\n");
+	return -ETIME;
+}
+
+/*
+ * Enable EC Command/Data/Index PIO Access and then check EC state.
+ * Enabling is done in PCI config space of the LPC bridge.
+ *
+ * Just after Enabling, the EC should be in a precisly defined state:
+ * - PIO should be in a conventional default state (0xf432 in the Command ports)
+ * - Command/Data/Index interface waiting for command
+ * The EC is expected to be in that state prior to any attempt to use the interface.
+ *
+ */
+static int enable_cdimode(void)
+{
+	union {
+		u16 word;
+		u32 dword;
+	} value;
+
+	switch (lpc_bridge->vendor) {
+	case PCI_VENDOR_ID_INTEL:
+		switch (lpc_bridge->device) {
+		case PCI_DEVICE_ID_INTEL_ICH7_0:	/* ICH7 */
+		case PCI_DEVICE_ID_INTEL_ICH7_1:
+		case PCI_DEVICE_ID_INTEL_ICH7_30:
+		case PCI_DEVICE_ID_INTEL_ICH7_31:
+		case PCI_DEVICE_ID_INTEL_ICH8_4:	/* ICH8 */
+			pci_read_config_dword(lpc_bridge, INTEL_LPC_GEN4_DEC, &(value.dword));
+			pci_reg_state.dword = value.dword;
+			value.dword = 0x3CFF21;
+			pci_write_config_dword(lpc_bridge, INTEL_LPC_GEN4_DEC, value.dword);
+			break;
+		default:	/* All other Intel chipset */
+			pci_read_config_word(lpc_bridge, INTEL_LPC_GEN1_DEC, &(value.word));
+			pci_reg_state.word = value.word;
+			value.word = (INTEL_IOPORT_BASE & 0xfff1) | 0x1;
+			pci_write_config_word(lpc_bridge, INTEL_LPC_GEN1_DEC, value.word);
+		}
+		break;
+	case PCI_VENDOR_ID_ATI:
+		pci_read_config_dword(lpc_bridge, ATI_LPC_REG, &(value.dword));
+		pci_reg_state.dword = value.dword;
+		value.dword = ((pci_reg_state.dword & 0x7f) | 0x80) << 0x10;
+		pci_write_config_dword(lpc_bridge, ATI_LPC_REG, value.dword);
+		break;
+	default:
+		BUG();
+	}
+	dprintk("Saved state of PCI register: [%x].\n", pci_reg_state.dword);
+
+	if (check_default_state() || check_cdimode_flag(0)) {
+		printk(O_ERR "EC state check failure, please report.\n");
+		return -EIO;
+	}
+
+	return 0;
+
+}
+
+/*
+ * Send a write command and associated data code to be written
+ * Known commands an associated code significance:
+ * 0xfbfd: Select Index with 'code' ordinal
+ * 0xfbfe: Set to 'code' a previously selected Index
+ * 0xfbfc: Set CDI mode flag
+ */
+static int send_ec_cmd(unsigned int command, u8 code)
+{
+	lowlevel_write(0xfbfc, 0x2);
+	lowlevel_write(command, code);
+	lowlevel_write(0xfbfc, 0x1);
+	if (check_cdimode_flag(2))
+		return -ETIME;
+	return 0;
+}
+
+/*
+ * Send a read command
+ * Known commands an associated code significance:
+ * 0xfbfe: Read a previously selected Index
+ * 0xfbfc: Set CDI mode flag
+ */
+static int read_ec_cmd(unsigned int command, u8 * value)
+{
+	*value = lowlevel_read(command);
+	lowlevel_write(0xfbfc, 0x1);
+	if (check_cdimode_flag(2))
+		return -ETIME;
+	return 0;
+}
+
+/*
+ * Disable EC Command/Data/Index PIO Access 
+ * Step 1: clear_cdimode
+ * Send Disable command
+ * Revert PIO interface to conventional default state (0xf432 in the Command ports)
+ * Step 2: clear_cdimode_pci
+ * Disable the interface in the PCI config space of the Southbridge
+ * These steps are separated due to constrains in error path treatement
+ */
+static void clear_cdimode(void)
+{
+	lowlevel_write(0xfbfc, 0x0);
+	outb(0xf4, ioport_base + PIO_PORT_COMMAND1);
+	outb(0x32, ioport_base + PIO_PORT_COMMAND2);
+}
+
+static void clear_cdimode_pci(void)
+{
+	switch (lpc_bridge->vendor) {
+	case PCI_VENDOR_ID_INTEL:
+		switch (lpc_bridge->device) {
+		case PCI_DEVICE_ID_INTEL_ICH7_0:	/* ICH7 */
+		case PCI_DEVICE_ID_INTEL_ICH7_1:
+		case PCI_DEVICE_ID_INTEL_ICH7_30:
+		case PCI_DEVICE_ID_INTEL_ICH7_31:
+		case PCI_DEVICE_ID_INTEL_ICH8_4:	/* ICH8 */
+			pci_write_config_dword(lpc_bridge, INTEL_LPC_GEN4_DEC, pci_reg_state.dword);
+			break;
+		default:	/* All other Intel chipset */
+			pci_write_config_word(lpc_bridge, INTEL_LPC_GEN1_DEC, pci_reg_state.word);
+		}
+		break;
+	case PCI_VENDOR_ID_ATI:
+		pci_write_config_dword(lpc_bridge, ATI_LPC_REG, pci_reg_state.dword);
+		break;
+	default:
+		BUG();
+	}
+}
+
+/*
+ * Try to init the backend
+ * This function can be called blindly as it use a kref
+ * to check if the init sequence was already done.
+ */
+static int omnibook_cdimode_init(const struct omnibook_operation *io_op)
+{
+	int retval = 0;
+	int i;
+
+	/* ectypes other than TSM70 have no business with this backend */
+	if (!(omnibook_ectype & (TSM70 | TSX205)))
+		return -ENODEV;
+
+	if (io_op->backend->already_failed) {
+		dprintk("CDI backend init already failed, skipping.\n");
+		return -ENODEV;
+	}
+
+	if (!lpc_bridge) {
+		/* Fist use of the backend */
+		dprintk("Try to init cdimode\n");
+		mutex_init(&io_op->backend->mutex);
+		mutex_lock(&io_op->backend->mutex);
+		kref_init(&io_op->backend->kref);
+
+		/* PCI probing: find the LPC Super I/O bridge PCI device */
+		for (i = 0; !lpc_bridge && lpc_bridge_table[i].vendor; ++i)
+			lpc_bridge =
+			    pci_get_device(lpc_bridge_table[i].vendor, lpc_bridge_table[i].device,
+					   NULL);
+
+		if (!lpc_bridge) {
+			printk(O_ERR "Fail to find a supported LPC I/O bridge, please report\n");
+			retval = -ENODEV;
+			goto error1;
+		}
+
+		if ((retval = pci_enable_device(lpc_bridge))) {
+			printk(O_ERR "Unable to enable PCI device.\n");
+			goto error2;
+		}
+
+		switch (lpc_bridge->vendor) {
+		case PCI_VENDOR_ID_INTEL:
+			ioport_base = INTEL_IOPORT_BASE;
+			break;
+		case PCI_VENDOR_ID_ATI:
+			ioport_base = ATI_IOPORT_BASE;
+			break;
+		default:
+			BUG();
+		}
+
+		if (!request_region(ioport_base, 4, OMNIBOOK_MODULE_NAME)) {
+			printk(O_ERR "Request I/O region error\n");
+			retval = -ENODEV;
+			goto error2;
+		}
+
+		/*
+		 * Make an enable-check disable cycle for testing purpose
+		 */
+
+		retval = enable_cdimode();
+		if (retval)
+			goto error3;
+
+		clear_cdimode();
+		clear_cdimode_pci();
+
+		dprintk("Cdimode init ok\n");
+		mutex_unlock(&io_op->backend->mutex);
+		return 0;
+	} else {
+		dprintk("Cdimode has already been initialized\n");
+		kref_get(&io_op->backend->kref);
+		return 0;
+	}
+
+      error3:
+	clear_cdimode_pci();
+	release_region(ioport_base, 4);
+      error2:
+	pci_dev_put(lpc_bridge);
+	lpc_bridge = NULL;
+      error1:
+	io_op->backend->already_failed = 1;
+	mutex_unlock(&io_op->backend->mutex);
+	mutex_destroy(&io_op->backend->mutex);
+	return retval;
+}
+
+static void cdimode_free(struct kref *ref)
+{
+	struct omnibook_backend *backend;
+	
+	dprintk("Cdimode not used anymore: disposing\n");
+
+	backend = container_of(ref, struct omnibook_backend, kref);
+
+	mutex_lock(&backend->mutex);
+	pci_dev_put(lpc_bridge);
+	release_region(ioport_base, 4);
+	lpc_bridge = NULL;
+	mutex_unlock(&backend->mutex);
+	mutex_destroy(&backend->mutex);
+}
+
+static void omnibook_cdimode_exit(const struct omnibook_operation *io_op)
+{
+	/* ectypes other than TSM70 have no business with this backend */
+	BUG_ON(!(omnibook_ectype & (TSM70 | TSX205)));
+	dprintk("Trying to dispose cdimode\n");
+	kref_put(&io_op->backend->kref, cdimode_free);
+}
+
+/* 
+ * Read EC index and write result to value 
+ * 'EC index' here is unrelated to an index in the EC registers
+ */
+static int omnibook_cdimode_read(const struct omnibook_operation *io_op, u8 * value)
+{
+	int retval = 0;
+
+	if (!lpc_bridge)
+		return -ENODEV;
+
+	retval = enable_cdimode();
+	if (retval)
+		goto out;
+	retval = send_ec_cmd(0xfbfd, (unsigned int)io_op->read_addr);
+	if (retval)
+		goto error;
+	retval = read_ec_cmd(0xfbfe, value);
+
+	if (io_op->read_mask)
+		*value &= io_op->read_mask;
+
+      error:
+	clear_cdimode();
+      out:
+	clear_cdimode_pci();
+	return retval;
+}
+
+/* 
+ * Write value 
+ * 'EC index' here is unrelated to an index in the EC registers
+ */
+static int omnibook_cdimode_write(const struct omnibook_operation *io_op, u8 value)
+{
+	int retval = 0;
+
+	if (!lpc_bridge)
+		return -ENODEV;
+
+	retval = enable_cdimode();
+	if (retval)
+		goto out;
+	retval = send_ec_cmd(0xfbfd, (unsigned int)io_op->write_addr);
+	if (retval)
+		goto error;
+	retval = send_ec_cmd(0xfbfe, value);
+      error:
+	clear_cdimode();
+      out:
+	clear_cdimode_pci();
+	return retval;
+
+}
+
+/*
+ * Fn+foo and multimedia hotkeys handling
+ */
+static int omnibook_cdimode_hotkeys(const struct omnibook_operation *io_op, unsigned int state)
+{
+	int retval;
+
+	struct omnibook_operation hotkeys_op = 
+		{ CDI, 0, TSM70_FN_INDEX, 0, TSM70_FN_ENABLE, TSM70_FN_DISABLE};
+
+	/* Fn+foo handling */
+	retval = __omnibook_toggle(&hotkeys_op, !!(state & HKEY_FN));
+	if (retval < 0)
+		return retval;
+
+	/* Multimedia keys handling */
+	hotkeys_op.write_addr = TSM70_HOTKEYS_INDEX;
+	hotkeys_op.on_mask = TSM70_HOTKEYS_ENABLE;
+	hotkeys_op.off_mask = TSM70_HOTKEYS_DISABLE;
+	retval = __omnibook_toggle(&hotkeys_op, !!(state & HKEY_MULTIMEDIA));
+
+	return retval;
+}
+
+/* Scan index space, this hard locks my machine */
+#if 0
+static int compal_scan(char *buffer)
+{
+	int len = 0;
+	int i, j;
+	u8 v;
+
+	for (i = 0; i < 255; i += 16) {
+		for (j = 0; j < 16; j++) {
+			omnibook_compal_read(i + j, &v);
+			len += sprintf(buffer + len, "Read index %02x: %02x\n", i + j, v);
+			mdelay(500);
+		}
+		if (j != 16)
+			break;
+	}
+
+	return len;
+}
+#endif
+
+struct omnibook_backend compal_backend = {
+	.name = "compal",
+	.hotkeys_write_cap = HKEY_MULTIMEDIA | HKEY_FN,
+	.init = omnibook_cdimode_init,
+	.exit = omnibook_cdimode_exit,
+	.byte_read = omnibook_cdimode_read,
+	.byte_write = omnibook_cdimode_write,
+	.hotkeys_set = omnibook_cdimode_hotkeys,
+};
+
+/* End of file */
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/dock.c
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/dock.c
@@ -0,0 +1,84 @@
+/*
+ * dock.c -- docking station/port replicator support
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2, or (at your option) any
+ * later version.
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * Written by Soós Péter <sp@osb.hu>, 2002-2004
+ * Modified by Mathieu Bérard <mathieu.berard@crans.org>, 2006
+ */
+
+#include "omnibook.h"
+#include "hardware.h"
+
+static int omnibook_dock_read(char *buffer, struct omnibook_operation *io_op)
+{
+	int len = 0;
+	u8 dock;
+	int retval;
+
+	if ((retval = backend_byte_read(io_op, &dock)))
+		return retval;
+
+	len += sprintf(buffer + len, "Laptop is %s\n", (dock) ? "docked" : "undocked");
+
+	return len;
+}
+
+static int omnibook_dock_write(char *buffer, struct omnibook_operation *io_op)
+{
+	int retval;
+
+	switch (*buffer) {
+	case '0':
+		retval = backend_byte_write(io_op, 0);
+		break;
+	case '1':
+		retval = backend_byte_write(io_op, 1);
+		break;
+	default:
+		retval = -EINVAL;
+	}
+
+	return retval;
+}
+
+static struct omnibook_feature dock_driver;
+
+static int __init omnibook_dock_init(struct omnibook_operation *io_op)
+{
+	/* writing is only supported on ectype 13 */
+	if(!(omnibook_ectype & TSM40))
+		dock_driver.write = NULL;
+	
+	return 0;
+}
+
+static struct omnibook_tbl dock_table[] __initdata = {
+	{XE3GF, SIMPLE_BYTE(EC, XE3GF_CSPR, XE3GF_CSPR_MASK)},
+	{OB500 | OB510 | OB6000 | OB6100, SIMPLE_BYTE(EC, OB500_STA1, OB500_DCKS_MASK)},
+	{OB4150, SIMPLE_BYTE(EC, OB4150_DCID, 0)},
+	{TSM40, {SMI, SMI_GET_DOCK, SMI_SET_DOCK, 0, 0, 0}},
+	{0,}
+};
+
+static struct omnibook_feature __declared_feature dock_driver = {
+	.name = "dock",
+	.enabled = 0,
+	.init = omnibook_dock_init,
+	.read = omnibook_dock_read,
+	.write = omnibook_dock_write,
+	.ectypes = XE3GF | OB500 | OB510 | OB6000 | OB6100 | OB4150 | TSM40,
+	.tbl = dock_table,
+};
+
+module_param_named(dock, dock_driver.enabled, int, S_IRUGO);
+MODULE_PARM_DESC(dock, "Use 0 to disable, 1 to enable docking station support");
+/* End of file */
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/throttling.c
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/throttling.c
@@ -0,0 +1,83 @@
+/*
+ * throttling.c --CPU throttling control feature
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2, or (at your option) any
+ * later version.
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * Written by Mathieu Bérard <mathieu.berard@crans.org>, 2007
+ */
+
+#include "omnibook.h"
+#include "hardware.h"
+
+/*
+ * Throttling level/rate mapping found in ICH6M datasheets
+ * the output is set to mimic the one of /proc/acpi/cpu/CPU0/throttling
+ * XXX: We always assume that there are 8 T-States and one processor.
+ */
+static const int trate[8] = { 0, 12, 25, 37, 50, 62, 75, 87 };
+
+static int omnibook_throttle_read(char *buffer, struct omnibook_operation *io_op)
+{
+	int len = 0;
+	int tstate = 0;
+	int retval, i;
+
+	retval = backend_throttle_get(io_op, &tstate);
+	if (retval < 0)
+		return retval;
+
+	len += sprintf(buffer + len, "state count:             8\n");
+        len += sprintf(buffer + len, "active state:            T%d\n", tstate);
+	for (i = 0; i < 8; i += 1)
+	{
+		len += sprintf(buffer + len, "   %cT%d:                  %02d%%\n",
+			(i == tstate ? '*' : ' '),
+			i,
+			trate[i]);
+	}
+
+	return len;
+}
+
+static int omnibook_throttle_write(char *buffer, struct omnibook_operation *io_op)
+{
+	int retval = 0;
+	int data;
+	char *endp;
+
+	data = simple_strtoul(buffer, &endp, 10);
+	if ((endp == buffer) || (data > 7)) /* There are 8 throttling levels */
+		return -EINVAL;
+	else
+		retval = backend_throttle_set(io_op, data);
+	
+	return retval;
+}
+
+
+static struct omnibook_tbl throttle_table[] __initdata = {
+	{TSM70 | TSX205, {ACPI,}},
+	{0,}
+};
+
+struct omnibook_feature __declared_feature throttle_driver = {
+	.name = "throttling",
+	.enabled = 1,
+	.read = omnibook_throttle_read,
+	.write = omnibook_throttle_write,
+	.ectypes = TSM70 | TSX205,
+	.tbl = throttle_table,
+};
+
+module_param_named(throttle, throttle_driver.enabled, int, S_IRUGO);
+MODULE_PARM_DESC(throttle, "Use 0 to disable, 1 to enable CPU throttling control");
+
+/* End of file */
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/hotkeys.c
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/hotkeys.c
@@ -0,0 +1,193 @@
+/*
+ * hotkeys.c -- code to handling Hotkey/E-Key/EasyAccess buttons
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2, or (at your option) any
+ * later version.
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * Written by Soós Péter <sp@osb.hu>, 2002-2004
+ * Modified by Mathieu Bérard <mathieu.berard@crans.org>, 2006
+ */
+
+#include "omnibook.h"
+#include "hardware.h"
+
+/* Predefined convinient on/off states */
+#define HKEY_ON  HKEY_ONETOUCH|HKEY_MULTIMEDIA|HKEY_FN|HKEY_DOCK|HKEY_FNF5
+#define HKEY_OFF 0
+
+/*
+ * Set hotkeys status and update recorded saved state
+ */
+static int hotkeys_set_save(struct omnibook_operation *io_op, unsigned int state)
+{
+	int retval;
+
+	if(mutex_lock_interruptible(&io_op->backend->mutex))
+		return -ERESTARTSYS;
+
+	retval = __backend_hotkeys_set(io_op, state);
+	if (retval < 0)
+		goto out;
+
+	/* Update saved state */
+	io_op->backend->hotkeys_state = state & io_op->backend->hotkeys_write_cap;
+
+	out:
+	mutex_unlock(&io_op->backend->mutex);
+	return retval;
+}
+
+/*
+ * Read hotkeys status, fallback to reading saved state if real probing is not
+ * supported.
+ */
+static int hotkeys_get_save(struct omnibook_operation *io_op, unsigned int *state)
+{
+	unsigned int read_state = 0;
+	int retval = 0;
+
+	if(mutex_lock_interruptible(&io_op->backend->mutex))
+		return -ERESTARTSYS;
+
+	if (io_op->backend->hotkeys_get)
+		retval = __backend_hotkeys_get(io_op, &read_state);
+	if (retval < 0)
+		goto out;
+
+	/* Return previously set state for the fields that are write only */
+	*state = (read_state & io_op->backend->hotkeys_read_cap) + 
+		 (io_op->backend->hotkeys_state & ~io_op->backend->hotkeys_read_cap);
+
+	out:
+	mutex_unlock(&io_op->backend->mutex);
+	return 0;
+}
+
+/*
+ * Power management handlers
+ */
+
+/*
+ * Restore previously saved state
+ */
+static int omnibook_hotkeys_resume(struct omnibook_operation *io_op)
+{
+	int retval;
+	mutex_lock(&io_op->backend->mutex);
+	retval = __backend_hotkeys_set(io_op, io_op->backend->hotkeys_state);
+	mutex_unlock(&io_op->backend->mutex);
+	return retval;
+}
+
+/*
+ * Disable hotkeys upon suspend (FIXME is the disabling required ?)
+ */
+static int omnibook_hotkeys_suspend(struct omnibook_operation *io_op)
+{
+	int retval = 0;
+	retval = backend_hotkeys_set(io_op, HKEY_OFF);
+	return retval;
+}
+
+static const char pretty_name[][27] = {
+	"Onetouch buttons are",
+	"Multimedia hotkeys are",
+	"Fn hotkeys are",
+	"Stick key is",
+	"Press Fn twice to lock is",
+	"Dock events are",
+	"Fn + F5 hotkey is",
+};
+
+static int omnibook_hotkeys_read(char *buffer, struct omnibook_operation *io_op)
+{
+	int len = 0;
+	int retval;
+	unsigned int read_state = 0; /* buggy gcc 4.1 warning fix */
+	unsigned int shift, mask;
+
+	retval = hotkeys_get_save(io_op, &read_state);
+
+	if (retval < 0)
+		return retval;
+
+	for (shift = 0; shift <= HKEY_LAST_SHIFT ; shift++) {
+		mask = 1 << shift;
+		/* we assume write capability or read capability imply support */
+		if ((io_op->backend->hotkeys_read_cap | io_op->backend->hotkeys_write_cap) & mask)
+			len +=
+			    sprintf(buffer + len, "%s %s.\n", pretty_name[shift],
+				    (read_state & mask) ? "enabled" : "disabled");
+	}
+
+	return len;
+}
+
+static int omnibook_hotkeys_write(char *buffer, struct omnibook_operation *io_op)
+{
+	unsigned int state;
+	char *endp;
+
+	if (strncmp(buffer, "off", 3) == 0)
+		hotkeys_set_save(io_op, HKEY_OFF);
+	else if (strncmp(buffer, "on", 2) == 0)
+		hotkeys_set_save(io_op, HKEY_ON);
+	else {
+		state = simple_strtoul(buffer, &endp, 16);
+		if (endp == buffer)
+			return -EINVAL;
+		else
+			hotkeys_set_save(io_op, state);
+	}
+	return 0;
+}
+
+static int __init omnibook_hotkeys_init(struct omnibook_operation *io_op)
+{
+	int retval;
+
+	printk(O_INFO "Enabling all hotkeys.\n");
+	retval = hotkeys_set_save(io_op, HKEY_ON);
+	return retval < 0 ? retval : 0;
+}
+
+static void __exit omnibook_hotkeys_cleanup(struct omnibook_operation *io_op)
+{
+	printk(O_INFO "Disabling all hotkeys.\n");
+	hotkeys_set_save(io_op, HKEY_OFF);
+}
+
+static struct omnibook_tbl hotkeys_table[] __initdata = {
+	{XE3GF | XE3GC | OB500 | OB510 | OB6000 | OB6100 | XE4500 | AMILOD | TSP10 | TSM30X, 
+	COMMAND(KBC,OMNIBOOK_KBC_CMD_ONETOUCH_ENABLE,OMNIBOOK_KBC_CMD_ONETOUCH_DISABLE)},
+	{TSM70, {CDI,}},
+	{TSM40, {SMI,}},
+	{TSX205, {ACPI,}},
+	{0,}
+};
+
+static struct omnibook_feature __declared_feature hotkeys_driver = {
+	.name = "hotkeys",
+	.enabled = 1,
+	.read = omnibook_hotkeys_read,
+	.write = omnibook_hotkeys_write,
+	.init = omnibook_hotkeys_init,
+	.exit = omnibook_hotkeys_cleanup,
+	.suspend = omnibook_hotkeys_suspend,
+	.resume = omnibook_hotkeys_resume,
+	.ectypes =
+	    XE3GF | XE3GC | OB500 | OB510 | OB6000 | OB6100 | XE4500 | AMILOD | TSP10 | TSM70 | TSM30X |
+	    TSM40 | TSX205,
+	.tbl = hotkeys_table,
+};
+
+module_param_named(hotkeys, hotkeys_driver.enabled, int, S_IRUGO);
+MODULE_PARM_DESC(hotkeys, "Use 0 to disable, 1 to enable hotkeys handling");
+/* End of file */
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/polling.c
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/polling.c
@@ -0,0 +1,259 @@
+/*
+ * polling.c -- scancode emulation for volume buttons
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2, or (at your option) any
+ * later version.
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * Written by Soós Péter <sp@osb.hu>, 2002-2004
+ * Modified by Mathieu Bérard <mathieu.berard@crans.org>, 2006
+ */
+
+#include "omnibook.h"
+#include "hardware.h"
+#include <linux/workqueue.h>
+#include <linux/jiffies.h>
+
+/*
+ * XE3GC type key_polling polling:
+ *
+ * Polling interval for keys (100 ms)
+ */
+
+#define OMNIBOOK_POLL	msecs_to_jiffies(100)
+
+/*
+ * workqueue manipulations are mutex protected and thus kept in sync with key_polling_enabled
+ */
+static struct workqueue_struct *omnibook_wq;  
+static int key_polling_enabled;
+static DEFINE_MUTEX(poll_mutex);
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,19))
+static void omnibook_key_poller(struct work_struct *work);
+DECLARE_DELAYED_WORK(omnibook_poll_work, *omnibook_key_poller);
+#else
+static void omnibook_key_poller(void *data);
+DECLARE_WORK(omnibook_poll_work, *omnibook_key_poller, NULL);
+#endif
+
+static struct omnibook_feature key_polling_driver;
+static struct input_dev *poll_input_dev;
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,19))
+	static void omnibook_key_poller(struct work_struct *work)
+#else
+	static void omnibook_key_poller(void *data)
+#endif
+{
+	u8 q0a;
+	int retval;
+
+	mutex_lock(&key_polling_driver.io_op->backend->mutex);
+	__backend_byte_read(key_polling_driver.io_op, &q0a);
+	__backend_byte_write(key_polling_driver.io_op, 0);
+	mutex_unlock(&key_polling_driver.io_op->backend->mutex);
+
+#ifdef CONFIG_OMNIBOOK_DEBUG
+	if (unlikely(q0a & XE3GC_SLPB_MASK))
+		dprintk("Sleep button pressed.\n");
+	if (unlikely(q0a & XE3GC_F5_MASK))
+		dprintk("Fn-F5 - LCD/CRT switch pressed.\n");
+	if (unlikely(q0a & XE3GC_CNTR_MASK))
+		dprintk("Fn+F3/Fn+F4 - Contrast up or down pressed.\n");
+	if (unlikely(q0a & XE3GC_BRGT_MASK))
+		dprintk("Fn+F1/Fn+F2 - Brightness up or down pressed.\n");
+#endif
+
+	/*
+	 * Volume button scancode emulaton
+	 * It emulates a key press and a release without repeat as other OneTouch buttons do.
+	 */
+
+	if (unlikely(q0a & XE3GC_VOLD_MASK)) {
+		dprintk("Fn-down arrow or Volume down pressed.\n");
+		omnibook_report_key(poll_input_dev, KEY_VOLUMEDOWN);
+	}
+	if (unlikely(q0a & XE3GC_VOLU_MASK)) {
+		dprintk("Fn-up arrow or Volume up pressed.\n");
+		omnibook_report_key(poll_input_dev, KEY_VOLUMEUP);
+	}
+	if (unlikely(q0a & XE3GC_MUTE_MASK)) {
+		dprintk("Fn+F7 - Volume mute pressed.\n");
+		omnibook_report_key(poll_input_dev, KEY_MUTE);
+	}
+
+	retval = queue_delayed_work(omnibook_wq, &omnibook_poll_work, OMNIBOOK_POLL);
+	if(unlikely(!retval)) /* here non-zero on success */
+		printk(O_ERR "Key_poller failed to rearm.\n");
+}
+
+static int omnibook_key_polling_enable(void)
+{
+	int retval = 0;
+
+	if(mutex_lock_interruptible(&poll_mutex))
+		return -ERESTARTSYS;
+
+	if(key_polling_enabled)
+		goto out;
+
+	retval = !queue_delayed_work(omnibook_wq, &omnibook_poll_work, OMNIBOOK_POLL);
+	if(retval)
+		printk(O_ERR "Key_poller enabling failed.\n");
+	else {	
+		dprintk("Scancode emulation for volume buttons enabled.\n");
+		key_polling_enabled = 1;
+	}
+
+	out:
+	mutex_unlock(&poll_mutex);
+	return retval;
+}
+	
+static int omnibook_key_polling_disable(void)
+{
+	if(mutex_lock_interruptible(&poll_mutex))
+		return -ERESTARTSYS;
+
+	if(!key_polling_enabled)
+		goto out;
+
+	cancel_rearming_delayed_workqueue(omnibook_wq, &omnibook_poll_work);
+	dprintk("Scancode emulation for volume buttons disabled.\n");
+	key_polling_enabled = 0;
+
+	out:
+	mutex_unlock(&poll_mutex);
+	return 0;
+}
+
+
+static int omnibook_key_polling_read(char *buffer, struct omnibook_operation *io_op)
+{
+	int len = 0;
+	
+	if(mutex_lock_interruptible(&poll_mutex))
+		return -ERESTARTSYS;
+
+	len += sprintf(buffer + len, "Volume buttons polling is %s.\n",
+		(key_polling_enabled) ? "enabled" : "disabled");
+#ifdef CONFIG_OMNIBOOK_DEBUG
+	if(key_polling_enabled)	
+		len += sprintf(buffer + len, "Will poll in %i msec.\n",
+		jiffies_to_msecs(omnibook_poll_work.timer.expires - jiffies));
+#endif
+	mutex_unlock(&poll_mutex);
+	return len;
+}
+
+static int omnibook_key_polling_write(char *buffer, struct omnibook_operation *io_op)
+{
+	int retval;
+	switch (*buffer) {
+	case '0':
+		retval = omnibook_key_polling_disable();
+		break;
+	case '1':
+		retval = omnibook_key_polling_enable();
+		break;
+	default:
+		retval = -EINVAL;
+	}
+	return retval;
+}
+
+
+/*
+ * Stop polling upon suspend an restore it upon resume
+ */
+static int omnibook_key_polling_resume(struct omnibook_operation *io_op)
+{
+	int retval = 0;
+
+	mutex_lock(&poll_mutex);
+	if(key_polling_enabled)
+		retval = !queue_delayed_work(omnibook_wq, &omnibook_poll_work, OMNIBOOK_POLL);
+	mutex_unlock(&poll_mutex);
+	return retval;	
+}
+
+static int omnibook_key_polling_suspend(struct omnibook_operation *io_op)
+{
+	mutex_lock(&poll_mutex);
+	if(key_polling_enabled)
+		cancel_rearming_delayed_workqueue(omnibook_wq, &omnibook_poll_work);
+	mutex_unlock(&poll_mutex);
+	return 0;
+}
+
+static int __init omnibook_key_polling_init(struct omnibook_operation *io_op)
+{
+	int retval = 0;	
+	
+	poll_input_dev = input_allocate_device();
+	if (!poll_input_dev) {
+		retval = -ENOMEM;
+		goto out;
+	}
+
+	poll_input_dev->name = "Omnibook legacy laptop scancode generator";
+	poll_input_dev->phys = "omnibook/input0";
+	poll_input_dev->id.bustype = BUS_HOST;
+	
+	/* this device has three keys */
+	set_bit(EV_KEY, poll_input_dev->evbit);
+	set_bit(KEY_VOLUMEDOWN, poll_input_dev->keybit);
+	set_bit(KEY_VOLUMEUP, poll_input_dev->keybit);
+	set_bit(KEY_MUTE, poll_input_dev->keybit);
+
+	retval = input_register_device(poll_input_dev);
+	if (retval) {
+		input_free_device(poll_input_dev);
+		goto out;
+	}
+
+	omnibook_wq = create_singlethread_workqueue("omnibook");
+	if(!omnibook_wq)
+		retval = -ENOMEM;
+	else
+		retval = omnibook_key_polling_enable();
+
+out:
+	return retval;
+}
+
+static void __exit omnibook_key_polling_cleanup(struct omnibook_operation *io_op)
+{
+	omnibook_key_polling_disable();	
+	destroy_workqueue(omnibook_wq);
+	input_unregister_device(poll_input_dev);
+}
+
+static struct omnibook_tbl key_polling_table[] __initdata = {
+	{XE3GC, SIMPLE_BYTE(EC, XE3GC_Q0A, 0)},
+	{0,}
+};
+
+static struct omnibook_feature __declared_feature key_polling_driver = {
+	.name = "key_polling",
+	.enabled = 0, /* dangerous */
+	.read = omnibook_key_polling_read,
+	.write = omnibook_key_polling_write,
+	.init = omnibook_key_polling_init,
+	.exit = omnibook_key_polling_cleanup,
+	.suspend = omnibook_key_polling_suspend,
+	.resume = omnibook_key_polling_resume,
+	.ectypes = XE3GC,
+	.tbl = key_polling_table,
+};
+
+module_param_named(key_polling, key_polling_driver.enabled, int, S_IRUGO);
+MODULE_PARM_DESC(key_polling, "Use 0 to disable, 1 to enable key polling");
+/* End of file */
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/laptop.h
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/laptop.h
@@ -0,0 +1,1077 @@
+/*
+ * laptop.h -- Various structures about supported hardware
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2, or (at your option) any
+ * later version.
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * Written by Soós Péter <sp@osb.hu>, 2002-2004
+ * Written by Mathieu Bérard <mathieu.berard@crans.org>, 2006
+ */
+
+
+#define HP_SIGNATURE	"Hewlett-Packard"
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
+static int __init dmi_matched(struct dmi_system_id *dmi);
+#else
+static int __init dmi_matched(const struct dmi_system_id *dmi);
+#endif
+
+static struct  dmi_system_id omnibook_ids[] __initdata = {
+	{
+		.callback = dmi_matched,
+		.ident = "HP OmniBook XE3 GF",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_NAME, "HP OmniBook PC"),
+			DMI_MATCH(DMI_PRODUCT_VERSION, "HP OmniBook XE3 GF"),
+		},
+		.driver_data = (void *) XE3GF
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP OmniBook XT1000",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_NAME, "HP OmniBook PC"),
+			DMI_MATCH(DMI_PRODUCT_VERSION, "HP OmniBook XT1000"),
+		},
+		.driver_data = (void *) XE3GF
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP OmniBook XE2 DC",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_NAME, "HP OmniBook PC"),
+			DMI_MATCH(DMI_PRODUCT_VERSION, "HP OmniBook XE2 DC"),
+		},
+		.driver_data = (void *) XE2
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP OmniBook XE3 GC",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_NAME, "HP OmniBook PC"),
+			DMI_MATCH(DMI_PRODUCT_VERSION, "HP OmniBook XE3 GC"),
+		},
+		.driver_data = (void*) XE3GC
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP OmniBook XE3 GD / Pavilion N5430",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_NAME, "HP OmniBook PC"),
+			DMI_MATCH(DMI_PRODUCT_VERSION, "HP OmniBook XE3 GD"),
+		},
+		.driver_data = (void*) XE3GC
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP OmniBook XE3 GE / Pavilion N5415",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_NAME, "HP OmniBook PC"),
+			DMI_MATCH(DMI_PRODUCT_VERSION, "HP OmniBook XE3 GE"),
+		},
+		.driver_data = (void*) XE3GC
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP OmniBook 500 FA",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_NAME, "HP OmniBook PC"),
+			DMI_MATCH(DMI_PRODUCT_VERSION, "HP OmniBook 500 FA"),
+		},
+		.driver_data = (void*) OB500
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP OmniBook 510 FB",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_NAME, "HP OmniBook PC"),
+			DMI_MATCH(DMI_PRODUCT_VERSION, "HP OmniBook 510 FB"),
+		},
+		.driver_data = (void*) OB510
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP OmniBook 4150",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_NAME, "HP OmniBook PC"),
+			DMI_MATCH(DMI_PRODUCT_VERSION, "HP OmniBook 4150"),
+		},
+		.driver_data = (void*) OB4150
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP OmniBook 900 B",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_NAME, "HP OmniBook PC"),
+			DMI_MATCH(DMI_PRODUCT_VERSION, "HP OmniBook 900 B"),
+		},
+		.driver_data = (void*) OB4150
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP OmniBook 6000 EA",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_NAME, "HP OmniBook PC"),
+			DMI_MATCH(DMI_PRODUCT_VERSION, "HP OmniBook 6000 EA"),
+		},
+		.driver_data = (void*) OB6000
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP OmniBook 6100 EB",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_NAME, "HP OmniBook PC"),
+			DMI_MATCH(DMI_PRODUCT_VERSION, "HP OmniBook 6100 EB"),
+		},
+		.driver_data = (void*) OB6100
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP OmniBook xe4000/xe4100",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_NAME, "HP OmniBook PC"),
+			DMI_MATCH(DMI_PRODUCT_VERSION, "HP OmniBook xe4000"),
+		},
+		.driver_data = (void*) XE4500
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP OmniBook xe4400",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_NAME, "HP OmniBook PC"),
+			DMI_MATCH(DMI_PRODUCT_VERSION, "HP OmniBook xe4400"),
+		},
+		.driver_data = (void*) XE4500
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP OmniBook xe4500",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_NAME, "HP OmniBook PC"),
+			DMI_MATCH(DMI_PRODUCT_VERSION, "HP OmniBook xe4500"),
+		},
+		.driver_data = (void*) XE4500
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP OmniBook 6200 EG / vt6200 / xt 6200",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_NAME, "HP OmniBook PC"),
+			DMI_MATCH(DMI_PRODUCT_VERSION, "HP OmniBook 6200 EG"),
+		},
+		.driver_data = (void*) XE4500
+	},
+	/* There are no model specific strings of some HP OmniBook XT1500 */
+	{
+		.callback = dmi_matched,
+		.ident = "HP OmniBook XT1500",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_NAME, "HP OmniBook PC"),
+			DMI_MATCH(DMI_PRODUCT_VERSION, "HP OmniBook"),
+		},
+		.driver_data = (void*) XE3GF
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP Pavilion ze4000 / ze4125",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_NAME, "HP NoteBook PC"),
+			DMI_MATCH(DMI_PRODUCT_VERSION, "HP NoteBook ze4000"),
+		},
+		.driver_data = (void*) XE4500
+	},
+	/* There are no model specific strings of some HP Pavilion xt155 and some HP Pavilion ze4100 
+	 * There are no model specific strings of some HP nx9000 */
+	{
+		.callback = dmi_matched,
+		.ident = "HP Pavilion xt155 / ze4100 / nx9000",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_NAME, "HP NoteBook PC"),
+			DMI_MATCH(DMI_PRODUCT_VERSION, "HP NoteBook PC"),
+		},
+		.driver_data = (void*) XE4500
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP Pavilion ZU1000 FA / ZU1000 FA / ZU1175",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion Notebook PC"),
+			DMI_MATCH(DMI_PRODUCT_VERSION, "HP Pavilion ZU1000 FA"),
+		},
+		.driver_data = (void*) OB500
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP Pavilion Notebook XE3 GC / N5290",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion Notebook PC"),
+			DMI_MATCH(DMI_PRODUCT_VERSION, "HP Pavilion Notebook XE3 GC"),
+		},
+		.driver_data = (void*) XE3GC
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP Pavilion Notebook GD / N5441",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion Notebook PC"),
+			DMI_MATCH(DMI_PRODUCT_VERSION, "HP Pavilion Notebook Model GD"),
+		},
+		.driver_data = (void*) XE3GC
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP Pavilion Notebook GE / XH545",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion Notebook PC"),
+			DMI_MATCH(DMI_PRODUCT_VERSION, "HP Pavilion Notebook Model GE"),
+		},
+		.driver_data = (void*) XE3GC
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP Pavilion Notebook ZT1000 / ZT1141",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion Notebook PC"),
+			DMI_MATCH(DMI_PRODUCT_VERSION, "HP Pavilion Notebook ZT1000"),
+		},
+		.driver_data = (void*) XE3GF
+	},
+	/* There are no model specific strings of some HP Pavilion ZT1175 and ZT1195 notebooks */
+	{
+		.callback = dmi_matched,
+		.ident = "HP Pavilion ZT1175 / ZT1195",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion Notebook PC"),
+			DMI_MATCH(DMI_PRODUCT_VERSION, "HP Pavilion Notebook"),
+		},
+		.driver_data = (void*) XE3GF
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP Pavilion ze4200 series",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_NAME, "Pavilion ze4200"),
+		},
+		.driver_data = (void*) XE4500
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP Pavilion ze4300 series",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_NAME, "Pavilion ze4300"),
+		},
+		.driver_data = (void*) XE4500
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP Pavilion ze4500 series",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_NAME, "Pavilion ze4500"),
+		},
+		.driver_data = (void*) XE4500
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP Pavilion ze8500 series",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_NAME, "Pavilion ze8500"),
+		},
+		.driver_data = (void*) XE4500
+	},
+	/* Compaq nx9000 */
+	{
+		.callback = dmi_matched,
+		.ident = "HP Compaq nx9000",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_NAME, "HP nx9000"),
+		},
+		.driver_data = (void*) XE4500
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP Compaq nx9005",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_NAME, "HP nx9005"),
+		},
+		.driver_data = (void*) XE4500
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP Compaq nx9010",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_NAME, "HP nx9010"),
+		},
+		.driver_data = (void*) XE4500
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite 1000",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "S1000"),
+		},
+		.driver_data = (void*) XE3GF
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite 1005",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "S1005"),
+		},
+		.driver_data = (void*) XE3GF
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite 1110",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "S1110"),
+		},
+		.driver_data = (void*) XE3GF
+	},	
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite 1115",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "S1115"),
+		},
+		.driver_data = (void*) XE3GF
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite 1130",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Satellite 1130"),
+		},
+		.driver_data = (void*) XE3GF
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite 1700-100",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "S1700-100"),
+		},
+		.driver_data = (void*) AMILOD
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite 1700-200",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "S1700-200"),
+		},
+		.driver_data = (void*) AMILOD
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite 1700-300",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "S1700-300"),
+		},
+		.driver_data = (void*) AMILOD
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite 1700-400",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "S1700-400"),
+		},
+		.driver_data = (void*) AMILOD
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite 1700-500",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "S1700-500"),
+		},
+		.driver_data = (void*) AMILOD
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite 1900",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "S1900"),
+		},
+		.driver_data = (void*) XE3GF
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite 1905",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "S1905"),
+		},
+		.driver_data = (void*) XE3GF
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite 1950",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "S1950"),
+		},
+		.driver_data = (void*) XE3GF
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite 1955",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "S1955"),
+		},
+		.driver_data = (void*) XE3GF
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite 2430",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "S2430"),
+		},
+		.driver_data = (void*) XE3GF
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite 2435",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "S2435"),
+		},
+		.driver_data = (void*) XE3GF
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite 3000",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "S3000"),
+		},
+		.driver_data = (void*) XE3GF
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite 3005",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "S3005"),
+		},
+		.driver_data = (void*) XE3GF
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite 1000",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Satellite 1000"),
+		},
+		.driver_data = (void*) XE3GF
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite 1005",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Satellite 1005"),
+		},
+		.driver_data = (void*) XE3GF
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite 1110",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Satellite 1110"),
+		},
+		.driver_data = (void*) XE3GF
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite 1115",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Satellite 1115"),
+		},
+		.driver_data = (void*) XE3GF
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite 1115",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Toshiba 1115"),
+		},
+		.driver_data = (void*) XE3GF
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite 1900",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Satellite 1900"),
+		},
+		.driver_data = (void*) XE3GF
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite 1905",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Satellite 1905"),
+		},
+		.driver_data = (void*) XE3GF
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite 1950",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Satellite 1950"),
+		},
+		.driver_data = (void*) XE3GF
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite 1955",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Satellite 1955"),
+		},
+		.driver_data = (void*) XE3GF
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite 2430",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Satellite 2430"),
+		},
+		.driver_data = (void*) XE3GF
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite 2435",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Satellite 2435"),
+		},
+		.driver_data = (void*) XE3GF
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite 3000",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Satellite 3000"),
+		},
+		.driver_data = (void*) XE3GF
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite 3005",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Satellite 3005"),
+		},
+		.driver_data = (void*) XE3GF,
+	},
+	{
+                .callback = dmi_matched,
+                .ident = "Toshiba Satellite A70",
+                .matches = {
+                        DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+                        DMI_MATCH(DMI_PRODUCT_NAME, "Satellite A70"),
+                },
+                .driver_data = (void*) TSM70
+        },
+	{
+                .callback = dmi_matched,
+                .ident = "Toshiba Satellite A75",
+                .matches = {
+                        DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+                        DMI_MATCH(DMI_PRODUCT_NAME, "Satellite A75"),
+                },
+                .driver_data = (void*) TSM70
+        },
+	{
+                .callback = dmi_matched,
+                .ident = "Toshiba Satellite A80",
+                .matches = {
+                        DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+                        DMI_MATCH(DMI_PRODUCT_NAME, "Satellite A80"),
+                },
+                .driver_data = (void*) TSM70
+        },
+        {
+                .callback = dmi_matched,
+                .ident = "Toshiba Satellite A105",
+                .matches = {
+                        DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+                        DMI_MATCH(DMI_PRODUCT_NAME, "Satellite A105"),
+                },
+                .driver_data = (void*) TSA105
+        },
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite A100",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Satellite A100"),
+		},
+		.driver_data = (void*) TSA105
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite P100",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Satellite P100"),
+		},
+		.driver_data = (void*) TSA105
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite P10",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Satellite P10"),
+		},
+		.driver_data = (void*) TSP10
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite P15",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Satellite P15"),
+		},
+		.driver_data = (void*) TSP10
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite P20",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Satellite P20"),
+		},
+		.driver_data = (void*) TSP10
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite P25",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Satellite P25"),
+		},
+		.driver_data = (void*) TSM70
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite M30X",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Satellite M30X"),
+		},
+		.driver_data = (void*) TSM30X
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite M35X",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Satellite M35X"),
+		},
+		.driver_data = (void*) TSM70
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite M50",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Satellite M50"),
+		},
+		.driver_data = (void*) TSM70
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite M60",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Satellite M60"),
+		},
+		.driver_data = (void*) TSM70
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite M70",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Satellite M70"),
+		},
+		.driver_data = (void*) TSM70
+	},
+        {
+                .callback = dmi_matched,
+                .ident = "Toshiba Satellite M100",
+                .matches = {
+                        DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+                        DMI_MATCH(DMI_PRODUCT_NAME, "SATELLITE M100"),
+                },
+                .driver_data = (void*) TSM70
+        },
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite M100",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Satellite M100"),
+		},
+		.driver_data = (void*) TSM70
+	},
+		{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite M115",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Satellite M115"),
+		},
+		.driver_data = (void*) TSA105
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite M40X",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Satellite M40X"),
+		},
+		.driver_data = (void*) TSM70
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite M40",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Satellite M40"),
+		},
+		.driver_data = (void*) TSM40
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite M45",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Satellite M45"),
+		},
+		.driver_data = (void*) TSM40
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Satellite X205-S9800",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Satellite X205"),
+		},
+		.driver_data = (void*) TSX205
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Tecra S1",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "TECRA S1"),
+		},
+		.driver_data = (void*) TSM40
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Tecra S1",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Tecra S1"),
+		},
+		.driver_data = (void*) TSM40
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Tecra S2",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Tecra S2"),
+		},
+		.driver_data = (void*) TSM70
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Tecra A4",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Tecra A4"),
+		},
+		.driver_data = (void*) TSM40
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Toshiba Tecra A6",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A6"),
+		},
+		.driver_data = (void*) TSM70
+	},
+	{
+                .callback = dmi_matched,
+                .ident = "Toshiba Equium A110",
+                .matches = {
+                        DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+                        DMI_MATCH(DMI_PRODUCT_NAME, "EQUIUM A110"),
+                },
+                .driver_data = (void*) TSM30X /* FIXME: provisional */
+        },
+	{
+		.callback = dmi_matched,
+		.ident = "Compal ACL00",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "COMPAL"),
+			DMI_MATCH(DMI_BOARD_NAME, "ACL00"),
+		},
+		.driver_data = (void*) XE3GF
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Compal ACL10",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "COMPAL"),
+			DMI_MATCH(DMI_BOARD_NAME, "ACL10"),
+		},
+		.driver_data = (void*) XE3GF
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "Fujitsu-Siemens Amilo D series",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Amilo D-Series"),
+		},
+		.driver_data = (void*) AMILOD
+	},
+/* HP Technology code Matching:
+ * Technology code appears in the first two chracters of BIOS version string
+ * ended by a dot, but it prefixed a space character on some models and BIOS
+ * versions.
+ * New HP/Compaq models use more characters (eg. KF_KH.).
+ */
+	{
+		.callback = dmi_matched,
+		.ident = "HP model with technology code CI",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, HP_SIGNATURE),
+			DMI_MATCH(DMI_BIOS_VERSION, "CI."),
+		},
+		.driver_data = (void*) OB4150
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP model with technology code CL",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, HP_SIGNATURE),
+			DMI_MATCH(DMI_BIOS_VERSION, "CL."),
+		},
+		.driver_data = (void*) OB4150
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP model with technology code DC",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, HP_SIGNATURE),
+			DMI_MATCH(DMI_BIOS_VERSION, "DC."),
+		},
+		.driver_data = (void*) XE2
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP model with technology code EA",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, HP_SIGNATURE),
+			DMI_MATCH(DMI_BIOS_VERSION, "EA."),
+		},
+		.driver_data = (void*) OB6000
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP model with technology code EB",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, HP_SIGNATURE),
+			DMI_MATCH(DMI_BIOS_VERSION, "EB."),
+		},
+		.driver_data = (void*) OB6100
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP model with technology code EG",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, HP_SIGNATURE),
+			DMI_MATCH(DMI_BIOS_VERSION, "EG."),
+		},
+		.driver_data = (void*) XE4500
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP model with technology code FA",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, HP_SIGNATURE),
+			DMI_MATCH(DMI_BIOS_VERSION, "FA."),
+		},
+		.driver_data = (void*) OB500
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP model with technology code FB",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, HP_SIGNATURE),
+			DMI_MATCH(DMI_BIOS_VERSION, "FB."),
+		},
+		.driver_data = (void*) OB510
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP model with technology code GC",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, HP_SIGNATURE),
+			DMI_MATCH(DMI_BIOS_VERSION, "GC."),
+		},
+		.driver_data = (void*) XE3GC
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP model with technology code GD",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, HP_SIGNATURE),
+			DMI_MATCH(DMI_BIOS_VERSION, "GD."),
+		},
+		.driver_data = (void*) XE3GC
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP model with technology code GE",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, HP_SIGNATURE),
+			DMI_MATCH(DMI_BIOS_VERSION, "GE."),
+		},
+		.driver_data = (void*) XE3GC
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP model with technology code GF",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, HP_SIGNATURE),
+			DMI_MATCH(DMI_BIOS_VERSION, "GF."),
+		},
+		.driver_data = (void*) XE3GF
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP model with technology code IB",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, HP_SIGNATURE),
+			DMI_MATCH(DMI_BIOS_VERSION, "IB."),
+		},
+		.driver_data = (void*) XE3GF
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP model with technology code IC",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, HP_SIGNATURE),
+			DMI_MATCH(DMI_BIOS_VERSION, "IC."),
+		},
+		.driver_data = (void*) XE3GF
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP model with technology code ID",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, HP_SIGNATURE),
+			DMI_MATCH(DMI_BIOS_VERSION, "ID."),
+		},
+		.driver_data = (void*) XE3GF
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP model with technology code KA",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, HP_SIGNATURE),
+			DMI_MATCH(DMI_BIOS_VERSION, "KA."),
+		},
+		.driver_data = (void*) XE4500
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP model with technology code KB",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, HP_SIGNATURE),
+			DMI_MATCH(DMI_BIOS_VERSION, "KB."),
+		},
+		.driver_data = (void*) XE4500
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP model with technology code KC",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, HP_SIGNATURE),
+			DMI_MATCH(DMI_BIOS_VERSION, "KC."),
+		},
+		.driver_data = (void*) XE4500
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP model with technology code KD",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, HP_SIGNATURE),
+			DMI_MATCH(DMI_BIOS_VERSION, "KD."),
+		},
+		.driver_data = (void*) XE4500
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP model with technology code KE",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, HP_SIGNATURE),
+			DMI_MATCH(DMI_BIOS_VERSION, "KE."),
+		},
+		.driver_data = (void*) XE4500
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP model with technology code KE_KG",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, HP_SIGNATURE),
+			DMI_MATCH(DMI_BIOS_VERSION, "KE_KG."),
+		},
+		.driver_data = (void*) XE4500
+	},
+	{
+		.callback = dmi_matched,
+		.ident = "HP model with technology code KF_KH",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, HP_SIGNATURE),
+			DMI_MATCH(DMI_BIOS_VERSION, "KF_KH."),
+		},
+		.driver_data = (void*) XE4500
+	},
+	{ NULL, }
+};
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/dump.c
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/dump.c
@@ -0,0 +1,107 @@
+/*
+ *  dump.c - Raw dump of EC register, stolen from ibm_acpi.c
+ *
+ *
+ *  Copyright (C) 2004-2005 Borislav Deianov <borislav@users.sf.net>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include "omnibook.h"
+#include "hardware.h"
+
+static u8 ecdump_regs[256];
+
+static int ecdump_read(char *buffer, struct omnibook_operation *io_op)
+{
+	int len = 0;
+	int i, j;
+	u8 v;
+
+	len +=
+	    sprintf(buffer + len,
+		    "EC      " " +00 +01 +02 +03 +04 +05 +06 +07"
+		    " +08 +09 +0a +0b +0c +0d +0e +0f\n");
+
+	if(mutex_lock_interruptible(&io_op->backend->mutex))
+			return -ERESTARTSYS;
+
+	for (i = 0; i < 255; i += 16) {
+		len += sprintf(buffer + len, "EC 0x%02x:", i);
+		for (j = 0; j < 16; j++) {
+			io_op->read_addr = i +j;
+			if (__backend_byte_read(io_op, &v))
+				break;
+			if (v != ecdump_regs[i + j])
+				len += sprintf(buffer + len, " *%02x", v);
+			else
+				len += sprintf(buffer + len, "  %02x", v);
+			ecdump_regs[i + j] = v;
+		}
+		len += sprintf(buffer + len, "\n");
+		if (j != 16)
+			break;
+	}
+
+	mutex_unlock(&io_op->backend->mutex);
+
+	/* These are way too dangerous to advertise openly... */
+#if 0
+	len +=
+	    sprintf(buffer + len,
+		    "commands:\t0x<offset> 0x<value>" " (<offset> is 00-ff, <value> is 00-ff)\n");
+	len +=
+	    sprintf(buffer + len,
+		    "commands:\t0x<offset> <value>  " " (<offset> is 00-ff, <value> is 0-255)\n");
+#endif
+	return len;
+}
+
+static int ecdump_write(char *buffer, struct omnibook_operation *io_op)
+{
+
+	int i, v;
+
+	if (sscanf(buffer, "0x%x 0x%x", &i, &v) == 2) {
+		/* i and v set */
+	} else if (sscanf(buffer, "0x%x %u", &i, &v) == 2) {
+		/* i and v set */
+	} else
+		return -EINVAL;
+	if (i >= 0 && i < 256 && v >= 0 && v < 256) {
+		io_op->write_addr = i;
+		return backend_byte_write(io_op, v);
+	} else
+		return -EINVAL;
+
+	return 0;
+}
+
+static struct omnibook_tbl dump_table[] __initdata = {
+	{ALL_ECTYPES, {EC,}},
+	{0,}
+};
+
+static struct omnibook_feature __declared_feature dump_driver = {
+	.name = "dump",
+	.enabled = 0,
+	.read = ecdump_read,
+	.write = ecdump_write,
+	.tbl = dump_table,
+};
+
+module_param_named(dump, dump_driver.enabled, int, S_IRUGO);
+MODULE_PARM_DESC(dump, "Use 0 to disable, 1 to enable embedded controller register dump support");
+/* End of file */
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/hardware.h
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/hardware.h
@@ -0,0 +1,582 @@
+/*
+ * hardware.h -- low level definitions to access Embedded Controller and co.
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2, or (at your option) any
+ * later version.
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * Written by Soós Péter <sp@osb.hu>, 2002-2004
+ * Modified by Mathieu Bérard <mathieu.berard@crans.org>, 2006-2007
+ */
+
+#include <linux/acpi.h>
+#include "compat.h"
+
+/*
+ * Quite ugly:
+ * on_mask and off_maks are also used to store the i8042 data for kbc backend.
+ * an union seemed overkilled
+ */
+
+struct omnibook_backend;
+
+struct omnibook_operation {
+		struct omnibook_backend *backend;
+		unsigned long read_addr; /* address for data reading */
+		unsigned long write_addr; /* address for data writing */
+		u8 read_mask; /* read mask */
+		int on_mask; /* mask to set (pos value) or unset (neg value) to put feature in on state */
+		int off_mask; /* mask to set (pos value) or unset (neg value) to put feature in off state */
+};
+
+#define COMMAND(backend,data_on,data_off) { backend, 0, 0, 0, data_on, data_off }
+#define SIMPLE_BYTE(backend,addr,mask) { backend, addr, addr, mask, 0, 0 }
+
+struct omnibook_tbl {
+	enum omnibook_ectype_t ectypes;
+	struct omnibook_operation io_op;
+};
+
+/*
+ * Backend interface definition
+ */
+
+struct omnibook_backend {
+	const char *name;	/* backend name */
+	struct mutex mutex;	/* serializes all access to backend functions */
+	const unsigned int hotkeys_read_cap; /* hotkey probing mask */
+	const unsigned int hotkeys_write_cap; /* hotkey setting mask */
+
+	/* Public data fields, access with mutex held */
+	unsigned int hotkeys_state;	/* saved hotkeys state */
+	unsigned int touchpad_state;	/* saved touchpad state */
+	unsigned int muteled_state;	/* saved muteled state */
+	unsigned int cooling_state;	/* saved cooling method state */
+
+	/* Public function pointers */
+	int (*init) (const struct omnibook_operation *); 
+	void (*exit) (const struct omnibook_operation *);
+	int (*byte_read) (const struct omnibook_operation *, u8 *); 
+	int (*byte_write) (const struct omnibook_operation *, u8);
+	int (*aerial_get) (const struct omnibook_operation *, unsigned int *);
+	int (*aerial_set) (const struct omnibook_operation *, unsigned int);
+	int (*hotkeys_get) (const struct omnibook_operation *, unsigned int *);
+	int (*hotkeys_set) (const struct omnibook_operation *, unsigned int);
+	int (*display_get) (const struct omnibook_operation *, unsigned int *);
+	int (*display_set) (const struct omnibook_operation *, unsigned int);
+	int (*throttle_get) (const struct omnibook_operation *, unsigned int *);
+	int (*throttle_set) (const struct omnibook_operation *, unsigned int);
+
+	/* Private fields, never to be accessed outside backend code */
+	struct kref kref;	/* Reference counter of this backend */
+	void *data;		/* private data pointer */
+	int already_failed;	/* Backend init already failed at least once */
+};
+
+extern struct omnibook_backend kbc_backend;
+extern struct omnibook_backend pio_backend;
+extern struct omnibook_backend ec_backend;
+extern struct omnibook_backend acpi_backend;
+extern struct omnibook_backend nbsmi_backend;
+extern struct omnibook_backend compal_backend;
+
+#define KBC   &kbc_backend
+#define PIO   &pio_backend
+#define EC    &ec_backend
+#define ACPI  &acpi_backend
+#define SMI   &nbsmi_backend
+#define CDI   &compal_backend
+
+int __omnibook_apply_write_mask(const struct omnibook_operation *io_op, int toggle);
+int __omnibook_toggle(const struct omnibook_operation *io_op, int toggle);
+
+/*
+ * Lock helper functions. Defines locking and __prefixed non locking variants.
+ */
+
+#define helper_func(func) \
+static inline int backend_##func##_get(const struct omnibook_operation *io_op, unsigned int *data) \
+{ \
+	int retval; \
+	if(mutex_lock_interruptible(&io_op->backend->mutex)) \
+		return -ERESTARTSYS; \
+	retval = io_op->backend->func##_get(io_op, data); \
+	mutex_unlock(&io_op->backend->mutex); \
+	return retval; \
+} \
+static inline int backend_##func##_set(const struct omnibook_operation *io_op, unsigned int data) \
+{ \
+	int retval; \
+	if(mutex_lock_interruptible(&io_op->backend->mutex)) \
+		return -ERESTARTSYS; \
+	retval = io_op->backend->func##_set(io_op, data); \
+	mutex_unlock(&io_op->backend->mutex); \
+	return retval; \
+}\
+static inline int __backend_##func##_get(const struct omnibook_operation *io_op, unsigned int *data) \
+{ \
+	int retval; \
+	WARN_ON(!mutex_is_locked(&io_op->backend->mutex)); \
+	retval = io_op->backend->func##_get(io_op, data); \
+	return retval; \
+} \
+static inline int __backend_##func##_set(const struct omnibook_operation *io_op, unsigned int data) \
+{ \
+	int retval; \
+	WARN_ON(!mutex_is_locked(&io_op->backend->mutex)); \
+	retval = io_op->backend->func##_set(io_op, data); \
+	return retval; \
+}
+
+helper_func(aerial)
+helper_func(hotkeys)
+helper_func(display)
+helper_func(throttle)
+
+static inline int backend_byte_read(const struct omnibook_operation *io_op, u8 *data)
+{
+	int retval;
+	if(mutex_lock_interruptible(&io_op->backend->mutex))
+		return -ERESTARTSYS;
+	retval = io_op->backend->byte_read(io_op, data);
+	mutex_unlock(&io_op->backend->mutex);
+	return retval;
+}
+
+static inline int backend_byte_write(const struct omnibook_operation *io_op, u8 data)
+{
+	int retval;
+	if(mutex_lock_interruptible(&io_op->backend->mutex))
+		return -ERESTARTSYS;
+	retval = io_op->backend->byte_write(io_op, data);
+	mutex_unlock(&io_op->backend->mutex);
+	return retval;
+}
+
+static inline int __backend_byte_read(const struct omnibook_operation *io_op, u8 *data)
+{
+	int retval;
+	WARN_ON(!mutex_is_locked(&io_op->backend->mutex));
+	retval = io_op->backend->byte_read(io_op, data);
+	return retval;
+}
+
+static inline int __backend_byte_write(const struct omnibook_operation *io_op, u8 data)
+{
+	int retval;
+	WARN_ON(!mutex_is_locked(&io_op->backend->mutex));
+	retval = io_op->backend->byte_write(io_op, data);
+	return retval;
+}
+
+static inline int omnibook_apply_write_mask(const struct omnibook_operation *io_op, int toggle)
+{
+	int retval;
+	if(mutex_lock_interruptible(&io_op->backend->mutex))
+		return -ERESTARTSYS;
+	retval = __omnibook_apply_write_mask(io_op, toggle);
+	mutex_unlock(&io_op->backend->mutex);
+	return retval;
+}
+
+static inline int omnibook_toggle(const struct omnibook_operation *io_op, int toggle)
+{
+	int retval;
+	if(mutex_lock_interruptible(&io_op->backend->mutex))
+		return -ERESTARTSYS;
+	retval = __omnibook_toggle(io_op, toggle);
+	mutex_unlock(&io_op->backend->mutex);
+	return retval;
+}
+
+/*
+ * Timeout in ms for sending to controller
+ */
+
+#define OMNIBOOK_TIMEOUT                250
+
+
+/*
+ *	Embedded controller adresses
+ */
+
+#define XE3GF_CHGM	0x90	/* , 16 bit */
+#define XE3GF_CHGS	0x92	/* , 16 bit */
+#define XE3GF_CHGC	0x94	/* Current charge of board, 16 bit */
+#define XE3GF_CHGV	0x96	/* Current voltage, 16 bit */
+#define XE3GF_CHGA	0x98	/* Current intensity, 16 bit */
+#define XE3GF_BAL	0x9A	/* Battery present status */
+#define XE3GF_STA1	0x9C	/* Various status bits */
+#define XE3GF_CSPR	0xA1	/* Port replicator status, 1 bit */
+#define XE3GF_ADP	0xA3	/* AC acapter status, 1 bit */
+#define XE3GF_FOT	0xA5	/* Fan off temperature, 8 bit */
+#define XE3GF_FSD1	0xA6	/* Fan on temperature, 8 bit */
+#define XE3GF_FSD2	0xA7	/* Fan level 2 temperature, 8 bit */
+#define XE3GF_FSD3	0xA8	/* Fan level 3 temperature, 8 bit */
+#define XE3GF_FSD4	0xA9	/* Fan level 4 temperature, 8 bit */
+#define XE3GF_FSD5	0xAA	/* Fan level 5 temperature, 8 bit */
+#define XE3GF_FSD6	0xAB	/* Fan level 6 temperature, 8 bit */
+#define XE3GF_FSD7	0xAC	/* Fan level 7 temperature, 8 bit */
+#define XE3GF_FSRD	0xAD	/* Fan status, 8 bit */
+#define XE3GF_CTMP	0xB0	/* CPU tempetature, 8 bit */
+#define XE3GF_BRTS	0xB9	/* LCD brightness, 4 bit */
+#define XE3GF_BTY0	0xC0	/* Battery 0 type, 1 bit */
+#define XE3GF_BST0	0xC1	/* Battery 0 status, 3 bit */
+#define XE3GF_BRC0	0xC2	/* Battery 0 remaining capacity, 16 bit */
+#define XE3GF_BSN0	0xC4	/* Battery 0 serial number 16 bit */
+#define XE3GF_BPV0	0xC6	/* Battery 0 present voltage, 16 bit */
+#define XE3GF_BDV0	0xC8	/* Battery 0 design voltage 16 bit */
+#define XE3GF_BDC0	0xCA	/* Battery 0 design capacity 16 bit */
+#define XE3GF_BFC0	0xCC	/* Battery 0 last full capacity 16 bit */
+#define XE3GF_GAU0	0xCE	/* Battery 0 gauge, 8 bit */
+#define XE3GF_BTY1	0xD0	/* Battery 1 type, 1 bit */
+#define XE3GF_BST1	0xD1	/* Battery 1 status, 3 bit */
+#define XE3GF_BRC1	0xD2	/* Battery 1 remaining capacity, 16 bit */
+#define XE3GF_BSN1	0xD4	/* Battery 1 serial number, 16 bit */
+#define XE3GF_BPV1	0xD6	/* Battery 1 present voltage, 16 bit */
+#define XE3GF_BDV1	0xD8	/* Battery 1 design voltage 16 bit */
+#define XE3GF_BDC1	0xDA	/* Battery 1 design capacity 16 bit */
+#define XE3GF_BFC1	0xDC	/* Battery 1 last full capacity 16 bit */
+#define XE3GF_GAU1	0xDE	/* Battery 1 gauge, 8 bit */
+
+/*
+ * Bitmasks for sub byte values
+ */
+
+#define XE3GF_SHDD_MASK		0x40	/* External display status */
+#define XE3GF_CSPR_MASK		0x01	/* Port replicator status */
+#define XE3GF_ADP_MASK		0x20	/* AC acapter status */
+#define XE3GF_BAL0_MASK		0x01	/* Battery 0 present */
+#define XE3GF_BAL1_MASK		0x02	/* Battery 1 present */
+#define XE3GF_BMF_MASK		0x70	/* Model code */
+#define XE3GF_BTY_MASK		0x80	/* Type: Ni-MH or Li-Ion */
+#define XE3GF_BST_MASK_DSC	0x01	/* Discarging */
+#define XE3GF_BST_MASK_CHR	0x02	/* Charging */
+#define XE3GF_BST_MASK_CRT	0x04	/* Critical */
+#define XE3GF_FSRD_MASK_S1	0x01	/* Fan level 1 */
+#define XE3GF_FSRD_MASK_S2	0x02	/* Fan level 2 */
+#define XE3GF_FSRD_MASK_S3	0x04	/* Fan level 3 */
+#define XE3GF_FSRD_MASK_S4	0x08	/* Fan level 4 */
+#define XE3GF_FSRD_MASK_S5	0x10	/* Fan level 5 */
+#define XE3GF_FSRD_MASK_S6	0x20	/* Fan level 6 */
+#define XE3GF_FSRD_MASK_S7	0x40	/* Fan level 7 */
+#define XE3GF_BRTS_MASK		0x0F	/* LCD brightness */
+#define XE3GF_FAN_ON_MASK	0x02	/* Fan on */
+
+/*
+ * OmniBook XE3 GC values
+ */
+
+#define XE3GC_CTMP	0x28	/* CPU tempetature, 8 bit */
+#define XE3GC_STA1	0x30	/* Various status bits */
+#define XE3GC_Q0A	0x31	/* Various status bits */
+#define XE3GC_CCUR	0x38	/* Current charge of board, 16 bit ? */
+#define XE3GC_CVOL	0x3A	/* Current voltage, 16 bit ? */
+#define XE3GC_CARM	0x3C	/* Current intensity, 16 bit ? */
+#define XE3GC_BAT	0x3E	/* Battery present status */
+#define XE3GC_BST0	0x40	/* Battery 0 status, 3 bit */
+#define XE3GC_BPR0	0x41	/* Battery 0 present rate, 16 bit ? */
+#define XE3GC_BRC0	0x43	/* Battery 0 remaining capacity, 16 bit */
+#define XE3GC_BPV0	0x45	/* Battery 0 present voltage, 16 bit */
+#define XE3GC_BDV0	0x47	/* Battery 0 design voltage 16 bit */
+#define XE3GC_BDC0	0x49	/* Battery 0 design capacity 16 bit */
+#define XE3GC_BTY0	0x4A	/* Battery 0 type, 1 bit ? */
+#define XE3GC_BTP0	0x4B	/* Battery 0 ?, 1 bit */
+#define XE3GC_BSN0	0x4C	/* Battery 0 serial number, 8 bit ? */
+#define XE3GC_BMF0	0x4D	/* Battery 0 ?,8 bit */
+#define XE3GC_BST1	0x50	/* Battery 1 status, 3 bit */
+#define XE3GC_BPR1	0x51	/* Battery 1 present rate, 16 bit ? */
+#define XE3GC_BRC1	0x53	/* Battery 1 remaining capacity, 16 bit */
+#define XE3GC_BPV1	0x55	/* Battery 1 present voltage, 16 bit */
+#define XE3GC_BDV1	0x57	/* Battery 1 design voltage 16 bit */
+#define XE3GC_BDC1	0x59	/* Battery 1 design capacity 16 bit */
+#define XE3GC_BTY1	0x5A	/* Battery 1 type, 1 bit ? */
+#define XE3GC_BTP1	0x5B	/* Battery 1 ?, 1 bit */
+#define XE3GC_BSN1	0x5C	/* Battery 1 serial number, 8 bit ? */
+#define XE3GC_BMF1	0x5D	/* Battery 1 ?,8 bit */
+#define XE3GC_STA2	0x61	/* Various status bits */
+#define XE3GC_BTVL	0x6A	/* LCD brightness, 4 bit */
+
+/*
+ * Bitmasks for sub byte values
+ */
+
+#define XE3GC_ADP_MASK		0x40	/* AC acapter status */
+#define XE3GC_BAT0_MASK		0x01	/* Battery 0 present */
+#define XE3GC_BAT1_MASK		0x02	/* Battery 1 present */
+#define XE3GC_BTY_MASK		0x01	/* Type: Ni-MH or Li-Ion */
+#define XE3GC_BST_MASK_DSC	0x01	/* Discarging */
+#define XE3GC_BST_MASK_CHR	0x02	/* Charging */
+#define XE3GC_BST_MASK_CRT	0x04	/* Critical */
+#define XE3GC_CRTI_MASK		0x04	/* External display status */
+#define XE3GC_SLPB_MASK		0x01	/* Sleep button pressed */
+#define XE3GC_F5_MASK		0x02	/* Fn-F5 - LCD/CRT switch pressed */
+#define XE3GC_VOLD_MASK		0x04	/* Fn-down arrow or Volume down pressed */
+#define XE3GC_VOLU_MASK		0x08	/* Fn-up arrow or Volume up pressed */
+#define XE3GC_MUTE_MASK		0x10	/* Fn+F7 - Volume mute pressed */
+#define XE3GC_CNTR_MASK		0x20	/* Fn+F3/Fn+F4 - Contrast up or down pressed */
+#define XE3GC_BRGT_MASK		0x40	/* Fn+F1/Fn+F2 - Brightness up or down pressed */
+#define XE3GC_BTVL_MASK		0x0F	/* LCD brightness */
+
+/*
+ * Toshiba Satellite A105 values and mask
+ */
+
+#define A105_BNDT				0xA3	/* LCD brightness */
+#define A105_BNDT_MASK				0x0F
+
+/*
+ * Fujitsu Amilo D values
+ */
+
+#define AMILOD_TMP	0x28	/* CPU tempetature, 8 bit */
+#define AMILOD_STA1	0x30	/* Various status bits */
+#define AMILOD_BAT	0x3E	/* Battery present status */
+#define AMILOD_BDC0	0x40	/* Battery 0 design capacity 16 bit */
+#define AMILOD_BDV0	0x42	/* Battery 0 design voltage 16 bit */
+#define AMILOD_BTY0	0x44	/* Battery 0 type, 1 bit ? */
+#define AMILOD_BST0	0x45	/* Battery 0 status, 3 bit */
+#define AMILOD_BPR0	0x46	/* Battery 0 present rate, 16 bit ? */
+#define AMILOD_BRC0	0x48	/* Battery 0 remaining capacity, 16 bit */
+#define AMILOD_BPV0	0x4A	/* Battery 0 present voltage, 16 bit */
+#define AMILOD_BTP0	0x4C	/* Battery 0 ?, 1 bit */
+#define AMILOD_BDC1	0x50	/* Battery 1 design capacity 16 bit */
+#define AMILOD_BDV1	0x52	/* Battery 1 design voltage 16 bit */
+#define AMILOD_BTY1	0x54	/* Battery 1 type, 1 bit ? */
+#define AMILOD_BST1	0x55	/* Battery 1 status, 3 bit */
+#define AMILOD_BPR1	0x56	/* Battery 1 present rate, 16 bit ? */
+#define AMILOD_BRC1	0x58	/* Battery 1 remaining capacity, 16 bit */
+#define AMILOD_BPV1	0x5A	/* Battery 1 present voltage, 16 bit */
+#define AMILOD_BTP1	0x5C	/* Battery 1 ?, 1 bit */
+#define AMILOD_CBRG	0x6F	/* LCD brightness, 4 bit */
+
+/*
+ * Bitmasks for sub byte values
+ */
+
+#define AMILOD_ADP_MASK		0x40	/* AC acapter status */
+#define AMILOD_BAT0_MASK	0x01	/* Battery 0 present */
+#define AMILOD_BAT1_MASK	0x02	/* Battery 1 present */
+#define AMILOD_BTY_MASK		0x01	/* Type: Ni-MH or Li-Ion */
+#define AMILOD_BST_MASK_DSC	0x01	/* Discarging */
+#define AMILOD_BST_MASK_CHR	0x02	/* Charging */
+#define AMILOD_BST_MASK_CRT	0x04	/* Critical */
+#define AMILOD_CBRG_MASK	0x0F	/* LCD brightness */
+
+/*
+ * OmniBook 500, 510, 6000, 6100, XE2 values
+ */
+
+#define OB500_STA1	0x44	/* Various status bits */
+#define OB500_STA2	0x50	/* Various status bits */
+#define OB500_CTMP	0x55	/* CPU tempetature, 8 bit */
+#define OB500_BT1I	0x58	/* Battery 1 ? 16 bit */
+#define OB500_BT1C	0x5A	/* Battery 1 remaining capacity 16 bit ? */
+#define OB500_BT1V	0x5C	/* Battery 1 present voltage 16 bit ? */
+#define OB500_BT1S	0x5E	/* Battery 1 status 3 bit ? */
+#define OB500_BT2I	0x6A	/* Battery 2 ? 16 bit */
+#define OB500_BT2C	0x6C	/* Battery 2 remaining capacity 16 bit ? */
+#define OB500_BT2V	0x6E	/* Battery 2 present voltage 16 bit ? */
+#define OB500_BT2S	0x70	/* Battery 2 status 3 bit ? */
+#define OB500_BT3I	0x5F	/* Battery 3 ? 16 bit */
+#define OB500_BT3C	0x61	/* Battery 3 remaining capacity 16 bit ? */
+#define OB500_BT3V	0x63	/* Battery 3 present voltage 16 bit ? */
+#define OB500_BT3S	0x65	/* Battery 3 status 3 bit ? */
+
+#define OB6000_STA1	0x77	/* Various status bits */
+
+#define XE2_STA1	0x50	/* Various status bits */
+
+/*
+ * Bitmasks for sub byte values
+ */
+
+#define OB500_LIDS_MASK		0x01	/* LID status */
+#define OB500_CRTS_MASK		0x20	/* External display status */
+#define OB500_SLPS_MASK		0x40	/* Sleep button status */
+#define OB500_DCKS_MASK		0x80	/* Docking status */
+#define OB500_ADP_MASK		0x02	/* AC acapter status */
+#define OB500_BST_MASK_DSC	0x01	/* Discarging */
+#define OB500_BST_MASK_CHR	0x02	/* Charging */
+#define OB500_BST_MASK_CRT	0x04	/* Critical */
+
+#define OB6000_FAN_MASK		0x10	/* Fan status */
+
+#define XE2_ADP_MASK		0x02	/* AC acapter status */
+
+/*
+ * OmniBook 4150
+ */
+
+#define OB4150_TMP		0x28	/* CPU tempetature, 8 bit */
+#define OB4150_STA1		0x2E	/* Various status bits */
+#define OB4150_STA2		0x2F	/* Various status bits */
+#define OB4150_ADP		0x30	/* AC acapter status, 1 bit */
+#define OB4150_DCID		0x2C	/* Port replicator */
+
+/*
+ * Bitmasks for sub byte values
+ */
+
+#define OB4150_FAN_MASK		0x01	/* Fan status */
+#define OB4150_ADP_MASK		0x40	/* AC acapter status */
+#define OB4150_CRST_MASK	0x20	/* External display status */
+
+/*
+ *	Keyboard controller command for some laptop functions
+ */
+
+#define OMNIBOOK_KBC_CONTROL_CMD		0x59
+
+/*
+ *	Keyboard controller command parameters for functions available via kbc
+ */
+
+#define OMNIBOOK_KBC_CMD_ONETOUCH_ENABLE	0x90	/* Enables OneTouch buttons */
+#define OMNIBOOK_KBC_CMD_ONETOUCH_DISABLE	0x91	/* Disables OneTouch buttons */
+#define OMNIBOOK_KBC_CMD_TOUCHPAD_ENABLE	0xAA	/* Enables touchpad */
+#define OMNIBOOK_KBC_CMD_TOUCHPAD_DISABLE	0xA9	/* Disables touchpad */
+#define OMNIBOOK_KBC_CMD_LCD_ON			0xE1	/* Turns LCD display on */
+#define OMNIBOOK_KBC_CMD_LCD_OFF		0xE2	/* Turns LCD display off */
+#define OMNIBOOK_KBC_CMD_MUTELED_ON     	0x94	/* Turns (xe4500) Mute LED on */
+#define OMNIBOOK_KBC_CMD_MUTELED_OFF    	0x95	/* Turns (xe4500) Mute LED off */
+#define OMNIBOOK_KBC_CMD_AC_POWER_ENABLE	0xC2	/* Enable AC power */
+#define OMNIBOOK_KBC_CMD_AC_POWER_DISABLE	0xC1	/* Disable AC power */
+
+/*
+ * Other I/O ports
+ */
+
+#define ACL00_AC_STAT		0x11B9	/* AC adapter status on ACL00 */
+#define ACL00_AC_MASK		0x04	/* Bitmask for AC adapter status on ACL00 */
+#define TOSH3K_AC_STAT		0x102D	/* AC adapter status on Toshiba 3000 */
+#define TOSH3K_AC_MASK		0x08	/* Bitmask for AC adapter status on Toshiba 3000 */
+#define XE3GF_AC_STAT		0x11B9	/* AC adapter status on XE3 GF */
+#define XE3GF_AC_MASK		0x04	/* Bitmask for AC adapter status on XE3 GF */
+#define XE3GF_LID_STAT		0x11AD	/* LID switch status on XE3 GF */
+#define XE3GF_LID_MASK		0x20	/* Bitmask for LID switch status on XE3 GF */
+#define XE3GC_SMIC		0xFE00
+
+#define OB500_GPO1		0x8034	/* Fan control */
+#define OB510_GPO2		0x11B9	/* LCD backlight */
+#define OB510_GPIO		0x118F	/* Fan control */
+
+#define OB500_FAN_ON_MASK	0x0A	/* Turn fan on with zero bits */
+#define OB500_FAN_OFF_MASK	0x08	/* Fan status/off */
+#define OB500_BKLT_MASK		0x40	/* LCD backlight */
+#define OB510_FAN_ON_MASK	0x18	/* Turn fan on with zero bits */
+#define OB510_FAN_OFF_MASK	0x10	/* Turn fan on */
+#define OB510_BKLT_MASK		0x01	/* LCD backlight */
+
+#define XE2_FAN_MASK		0x02	/* Turn fan on with zero bit */
+
+/*
+ * Memory adresses
+ */
+
+#define XE3GC_BCMD		0xFFFFEBC
+
+/*
+ * Toshiba Satellite A105 values and mask
+ */
+
+#define A105_BNDT		0xA3	/* LCD brightness */
+#define A105_BNDT_MASK		0x0F
+
+/*
+ * Index and values for Command/Data/Index interface
+ * Notice similitudes with commands code for kbc
+ */
+
+#define TSM70_FN_INDEX		0x45
+#define TSM70_FN_ENABLE		0x75
+#define TSM70_FN_DISABLE	0x74
+#define TSM70_HOTKEYS_INDEX	0x59
+#define TSM70_HOTKEYS_ENABLE	0x90
+#define TSM70_HOTKEYS_DISABLE	0x91
+#define TSM70_LCD_READ		0x5C
+#define TSM70_LCD_WRITE		0x5D
+#define TSM70_TOUCHPAD_ON 	0x80
+#define TSM70_TOUCHPAD_OFF	0x81
+#define TSM100_BLANK_INDEX	0x59
+#define	TSM100_LCD_ON		0xe1
+#define	TSM100_LCD_OFF		0xe2
+#define TSM70_COOLING_OFFSET	0xb0
+#define TSM70_COOLING_POWERSAVE	0x0
+#define TSM70_COOLING_PERF	0x2
+
+/* Toshiba SMI funtions and constants*/
+#define SMI_FN_PRESSED		0x8f
+#define SMI_SET_LCD_BRIGHTNESS	0xa2
+#define SMI_GET_LCD_BRIGHTNESS	0xa3
+#define SMI_GET_KILL_SWITCH	0xa4
+#define SMI_SET_AERIAL		0xa5
+#define SMI_GET_AERIAL		0xa6
+#define SMI_SET_DISPLAY_STATE	0xa7
+#define SMI_GET_DISPLAY_STATE	0xa8
+#define SMI_SET_FN_INTERFACE	0xa9
+#define SMI_GET_FN_INTERFACE	0xaa
+#define SMI_GET_FN_LAST_SCAN	0xab
+#define SMI_SET_DOCK		0xac	/* Undocumented */
+#define SMI_GET_DOCK		0xad	/* Undocumented */
+#define SMI_SET_FN_F5_INTERFACE	0xc2
+
+#define SMI_FN_KEYS_MASK	0x01
+#define SMI_STICK_KEYS_MASK	0x02
+#define SMI_FN_TWICE_LOCK_MASK	0x04
+#define SMI_FN_DOCK_MASK	0x08
+
+#define SMI_FN_SCAN		0x6d	/* Fn key scancode */
+#define	SMI_DOCK_SCAN		0x6e	/* Dock scancode */
+
+/* Toshiba HCI method and constants */
+#define HCI_METHOD		"SPFC"
+#define HCI_WORDS		6
+
+#define HCI_GET			0xfe00
+#define HCI_SET			0xff00
+
+#define HCI_HOTKEY_EVENT	0x001e
+#define HCI_RF_CONTROL		0x0056
+
+#define HCI_ENABLE		0x0001
+#define HCI_DISABLE		0x0000
+
+#define HCI_WIRELESS_CHECK	0x0001
+#define HCI_WIRELESS_POWER	0x0200
+
+#define HCI_SUCCESS		0x0000
+#define HCI_FAILURE		0x1000
+#define HCI_NOT_SUPPORTED	0x8000
+
+/* Toshiba Satellite X205 methods */
+#define TSX205_EVENTS_METHOD	"INFO"
+#define TSX205_NOTIFY_METHOD	"NTFY"
+#define TSX205_KILLSW_METHOD	"KLSW"
+#define TSX205_SLIVDO_METHOD	"CSLI"
+
+#define ACPI_FN_MASK		0x01
+#define ACPI_FN_SCAN		0x6e	/* Fn key scancode */
+
+/* HCI key definitions */
+#define HCI_FN_RELEASED		0x100
+#define HCI_MUTE		0x101
+#define HCI_1			0x102
+#define HCI_2			0x103
+#define HCI_SPACE		0x139
+#define HCI_BREAK		0x13b
+#define HCI_BSM			0x13c
+#define HCI_SUSPEND		0x13d
+#define HCI_HIBERNATE		0x13e
+#define HCI_VIDEOOUT		0x13f
+#define HCI_BRIGHTNESSDOWN	0x140
+#define HCI_BRIGHTNESSUP	0x141
+#define HCI_WLAN		0x142
+#define HCI_TOUCHPAD		0x143
+#define HCI_FN_PRESSED		0x17f
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/Makefile
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/Makefile
@@ -0,0 +1,171 @@
+#
+# Makefile -- makefile for the HP OmniBook support module
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the
+# Free Software Foundation; either version 2, or (at your option) any
+# later version.
+#
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License for more details.
+#
+# Written by Soós Péter <sp@osb.hu>, 2002-2004
+# Modified by Mathieu Bérard <mathieu.berard@crans.org>, 2006-2007
+#
+
+#Module informations
+
+MODULE_NAME = omnibook
+MODULE_VERSION = 2.20090707
+MODULE_BRANCH = trunk
+
+# Out-of-tree configuration
+ifndef CONFIG_OMNIBOOK
+OMNIBOOK_STANDALONE=y
+CONFIG_OMNIBOOK=m
+
+#Uncomment and set to force debug behavior
+#NOTE:	Default (commented) behavior is to enable debug in trunk or branch svn 
+#	snapshot and to disable it for release
+#OMNIBOOK_WANT_DEBUG=n
+
+#comment to disable backlight device support
+OMNIBOOK_WANT_BACKLIGHT=y
+
+#Uncomment to force legacy (pre-ACPI system) features support
+#OMNIBOOK_WANT_LEGACY=y
+
+endif
+
+ifeq ($(KERNELRELEASE),)
+# Support for direct Makefile invocation
+
+DESTDIR	= 
+MODDIR	= $(DESTDIR)/lib/modules
+KVERS	= $(shell uname -r)
+KVER	= $(KVERS)
+VMODDIR = $(MODDIR)/$(KVER)
+INSTDIR	= extra
+#KSRC	= /usr/src/linux
+KSRC	= $(VMODDIR)/build
+KMODDIR	= $(KSRC)/drivers/misc/omnibook
+KDOCDIR	= $(KSRC)/Documentation/omnibook
+PWD	= $(shell pwd)
+TODAY	= $(shell date +%Y%m%d)
+DEPMOD	= /sbin/depmod -aq
+RMMOD	= /sbin/modprobe -r
+INSMOD	= /sbin/modprobe
+INSTALL	= install -m 644
+MKDIR	= mkdir -p
+RM	= rm -f
+FIND	= find
+
+all:		 $(MODULE_NAME).ko
+
+clean:
+		make -C $(KSRC) M=$(PWD) clean
+		$(RM) -r *~ "#*#" .swp
+		$(RM) -r debian/omnibook-source *-stamp
+		$(RM) -r Module.symvers Modules.symvers
+
+install:	all
+		# Removing module from locations used by previous versions
+		$(RM) $(VMODDIR)/kernel/drivers/char/$(MODULE_NAME).ko
+		$(RM) $(VMODDIR)/kernel/drivers/misc/$(MODULE_NAME).ko
+		make INSTALL_MOD_PATH=$(DESTDIR) INSTALL_MOD_DIR=$(INSTDIR) -C $(KSRC) M=$(PWD) modules_install
+
+unload:
+		$(RMMOD) $(MODULE_NAME) || :
+
+load:		install unload
+		$(DEPMOD)
+		$(INSMOD) $(MODULE_NAME)
+
+uninstall:	unload
+		$(FIND) $(VMODDIR) -name "$(MODULE_NAME).ko" -exec $(RM) {} \;
+		$(DEPMOD)
+
+$(MODULE_NAME).ko:
+		$(MAKE) -C $(KSRC) SUBDIRS=$(PWD) modules
+
+kinstall:
+		$(RM) -r $(KMODDIR)
+		$(MKDIR) $(KMODDIR)
+		$(INSTALL) *.h *.c sections.lds $(KMODDIR)
+		$(MKDIR) $(KDOCDIR)
+		$(INSTALL) doc/README $(KDOCDIR)
+		
+kpatch:		kinstall
+		(cd $(KSRC); patch -p1 < $(PWD)/misc/omnibook-integration.patch)
+
+version:	
+		sed -i "s|^\(MODULE_VERSION = \).*|\1 2.$(TODAY)|" Makefile
+		sed -i "s|^\(MODULE_BRANCH = \).*|\1 release|" Makefile
+		sed -i "s|^\(2\.\)X\{8\}|\1$(TODAY)|" doc/ChangeLog
+		
+
+release:	clean version
+		mkdir -p ../$(MODULE_NAME)-2.$(TODAY)
+		cp -a *.h *.c *.lds Makefile doc misc ../$(MODULE_NAME)-2.$(TODAY)
+		rm -f ../$(MODULE_NAME)-2.$(TODAY).tar ../$(MODULE_NAME)-2.$(TODAY).tar.gz
+		(cd ..; tar cvf $(MODULE_NAME)-2.$(TODAY).tar $(MODULE_NAME)-2.$(TODAY); gzip -9 $(MODULE_NAME)-2.$(TODAY).tar)
+
+else
+# Support for kernel build system invocation
+
+ifneq ($(MODULE_BRANCH), release)
+EXTRA_CFLAGS += -DOMNIBOOK_MODULE_VERSION='"$(MODULE_VERSION)-$(MODULE_BRANCH)"'
+else
+EXTRA_CFLAGS += -DOMNIBOOK_MODULE_VERSION='"$(MODULE_VERSION)"'
+endif
+
+ifeq ($(OMNIBOOK_STANDALONE),y)
+
+ifeq ($(OMNIBOOK_WANT_BACKLIGHT),y)
+ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
+# we support backlight interface only after 2.6.16
+ifeq ($(shell if [ $(SUBLEVEL) -gt 16 ] ; then echo -n 'y'; fi),y)
+EXTRA_CFLAGS += -DCONFIG_OMNIBOOK_BACKLIGHT
+else
+$(warning "Backlight support in only supported for kernel version newer than 2.6.16")
+$(warning "Disabling backlight sysfs interface")
+endif
+endif
+endif
+
+ifeq ($(OMNIBOOK_WANT_LEGACY),y)
+EXTRA_CFLAGS += -DCONFIG_OMNIBOOK_LEGACY
+endif
+
+ifndef CONFIG_ACPI_EC
+EXTRA_CFLAGS += -DCONFIG_OMNIBOOK_LEGACY
+endif
+
+ifneq ($(MODULE_BRANCH), release)
+ifneq ($(OMNIBOOK_WANT_DEBUG),n)	
+EXTRA_CFLAGS += -DCONFIG_OMNIBOOK_DEBUG # -Wa -g0
+endif
+else
+ifeq ($(OMNIBOOK_WANT_DEBUG),y)	
+EXTRA_CFLAGS += -DCONFIG_OMNIBOOK_DEBUG # -Wa -g0
+endif
+
+endif
+
+endif
+
+EXTRA_CFLAGS += -DOMNIBOOK_MODULE_NAME='"$(MODULE_NAME)"'
+#EXTRA_LDFLAGS +=  $(src)/sections.lds
+EXTRA_LDFLAGS += $(PWD)/ubuntu/omnibook/sections.lds
+
+obj-$(CONFIG_OMNIBOOK) += $(MODULE_NAME).o
+omnibook-objs := init.o lib.o ec.o kbc.o pio.o compal.o acpi.o nbsmi.o \
+          ac.o battery.o blank.o bluetooth.o cooling.o display.o dock.o \
+	  dump.o fan.o fan_policy.o hotkeys.o info.o lcd.o muteled.o \
+	  polling.o temperature.o touchpad.o wireless.o throttling.o 
+
+endif # End of kernel build system part
+
+# End of file
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/info.c
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/info.c
@@ -0,0 +1,68 @@
+/*
+ * info.c -- trivial informational features
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2, or (at your option) any
+ * later version.
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * Written by Soós Péter <sp@osb.hu>, 2002-2004
+ * Modified by Mathieu Bérard <mathieu.berard@crans.org>, 2006
+ */
+
+#include "omnibook.h"
+
+#include <linux/dmi.h>
+#include <linux/version.h>
+
+static int omnibook_version_read(char *buffer, struct omnibook_operation *io_op)
+{
+	int len = 0;
+
+	len += sprintf(buffer + len, "%s\n", OMNIBOOK_MODULE_VERSION);
+
+	return len;
+}
+
+static int omnibook_dmi_read(char *buffer, struct omnibook_operation *io_op)
+{
+	int len = 0;
+
+	len += sprintf(buffer + len, "BIOS Vendor:   %s\n", dmi_get_system_info(DMI_BIOS_VENDOR));
+	len += sprintf(buffer + len, "BIOS Version:  %s\n", dmi_get_system_info(DMI_BIOS_VERSION));
+	len += sprintf(buffer + len, "BIOS Release:  %s\n", dmi_get_system_info(DMI_BIOS_DATE));
+	len += sprintf(buffer + len, "System Vendor: %s\n", dmi_get_system_info(DMI_SYS_VENDOR));
+	len += sprintf(buffer + len, "Product Name:  %s\n", dmi_get_system_info(DMI_PRODUCT_NAME));
+	len +=
+	    sprintf(buffer + len, "Version:       %s\n", dmi_get_system_info(DMI_PRODUCT_VERSION));
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,15))
+	len +=
+	    sprintf(buffer + len, "Serial Number: %s\n", dmi_get_system_info(DMI_PRODUCT_SERIAL));
+#endif
+	len += sprintf(buffer + len, "Board Vendor:  %s\n", dmi_get_system_info(DMI_BOARD_VENDOR));
+	len += sprintf(buffer + len, "Board Name:    %s\n", dmi_get_system_info(DMI_BOARD_VERSION));
+
+	return len;
+}
+
+static struct omnibook_feature __declared_feature version_driver = {
+	.name = "version",
+	.enabled = 1,
+	.read = omnibook_version_read,
+};
+
+static struct omnibook_feature __declared_feature dmi_driver = {
+	.name = "dmi",
+	.enabled = 1,
+	.read = omnibook_dmi_read,
+};
+
+module_param_named(dmi, dmi_driver.enabled, int, S_IRUGO);
+MODULE_PARM_DESC(dmi, "Use 0 to disable, 1 to enable DMI informations display support");
+
+/* End of file */
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/lib.c
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/lib.c
@@ -0,0 +1,81 @@
+/*
+ * lib.c -- Generic helpers functions
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2, or (at your option) any
+ * later version.
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * Written by Soós Péter <sp@osb.hu>, 2002-2004
+ * Modified by Mathieu Bérard <mathieu.berard@crans.org>, 2006
+ */
+
+#include "omnibook.h"
+
+#include "hardware.h"
+#include "compat.h"
+#include <linux/input.h>
+
+/*
+ * Generic funtion for applying a mask on a value
+ * Hack: degenerate to omnibook_toggle if there is no read method 
+ * of if the read address is 0, this is used in blank.c 
+ */
+int __omnibook_apply_write_mask(const struct omnibook_operation *io_op, int toggle)
+{
+	int retval = 0;
+	int mask;
+	u8 data;
+
+	if(!(io_op->backend->byte_read  && io_op->read_addr))
+		return __omnibook_toggle(io_op,toggle);
+
+	if ((retval = __backend_byte_read(io_op, &data)))
+		return retval;
+
+	if (toggle == 1)
+		mask = io_op->on_mask;
+	else if (toggle == 0)
+		mask = io_op->off_mask;
+	else
+		return -EINVAL;
+
+	if (mask > 0)
+		data |= (u8) mask;
+	else if (mask < 0)
+		data &= ~((u8) (-mask));
+	else
+		return -EINVAL;
+
+	retval = __backend_byte_write(io_op, data);
+
+	return retval;
+}
+
+/*
+ * Helper for toggle like operations
+ */
+int __omnibook_toggle(const struct omnibook_operation *io_op, int toggle)
+{
+	int retval;
+	u8 data;
+
+	data = toggle ? io_op->on_mask : io_op->off_mask;
+	retval = __backend_byte_write(io_op, data);
+	return retval;
+}
+
+void omnibook_report_key( struct input_dev *dev, unsigned int keycode)
+{
+	input_report_key(dev, keycode, 1);
+	input_sync(dev);
+	input_report_key(dev, keycode, 0);
+	input_sync(dev);
+}
+
+/* End of file */
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/lcd.c
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/lcd.c
@@ -0,0 +1,207 @@
+/*
+ * lcd.c -- LCD brightness and on/off
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2, or (at your option) any
+ * later version.
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * Written by Maciek Górniak <mago@acn.waw.pl>, 2002
+ * Modified by Soós Péter <sp@osb.hu>, 2002-2004
+ * Modified by Mathieu Bérard <mathieu.berard@crans.org>, 2006
+ */
+
+#include "omnibook.h"
+#include <linux/err.h>
+
+#ifdef CONFIG_OMNIBOOK_BACKLIGHT
+#include <linux/backlight.h>
+#endif
+
+#include "hardware.h"
+
+unsigned int omnibook_max_brightness;
+
+#ifdef CONFIG_OMNIBOOK_BACKLIGHT
+static struct backlight_device *omnibook_backlight_device;
+
+static int omnibook_get_backlight(struct backlight_device *bd);
+static int omnibook_set_backlight(struct backlight_device *bd);
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21)
+static struct backlight_ops omnibookbl_ops = {
+#else /* 2.6.21 */
+static struct backlight_properties omnibookbl_data = {
+	.owner = THIS_MODULE,
+#endif /* 2.6.21 */
+	.get_brightness = omnibook_get_backlight,
+	.update_status = omnibook_set_backlight,
+};
+
+static int omnibook_get_backlight(struct backlight_device *bd)
+{
+	int retval = 0;
+	struct omnibook_operation *io_op;
+	u8 brgt;
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,23)
+	io_op = bl_get_data(bd);
+#else /* 2.6.23 */	
+	io_op = class_get_devdata(&bd->class_dev);
+#endif /* 2.6.23 */
+	retval = backend_byte_read(io_op, &brgt);
+	if (!retval)
+		retval = brgt;
+
+	return retval;
+}
+
+static int omnibook_set_backlight(struct backlight_device *bd)
+{
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21)
+	u8 intensity = bd->props.brightness;
+#else /* 2.6.21 */
+	u8 intensity = bd->props->brightness;
+#endif /* 2.6.21 */	
+	struct omnibook_operation *io_op;
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,23)
+	io_op = bl_get_data(bd);
+#else /* 2.6.23 */	
+	io_op = class_get_devdata(&bd->class_dev);
+#endif /* 2.6.23 */
+	return backend_byte_write(io_op, intensity);
+}
+#endif /* CONFIG_OMNIBOOK_BACKLIGHT */
+
+static int omnibook_brightness_read(char *buffer, struct omnibook_operation *io_op)
+{
+	int len = 0;
+	u8 brgt;
+
+	backend_byte_read(io_op, &brgt);
+
+	len +=
+	    sprintf(buffer + len, "LCD brightness: %2d (max value: %d)\n", brgt,
+		    omnibook_max_brightness);
+
+	return len;
+}
+
+static int omnibook_brightness_write(char *buffer, struct omnibook_operation *io_op)
+{
+	unsigned int brgt = 0;
+	char *endp;
+
+	if (strncmp(buffer, "off", 3) == 0)
+		omnibook_lcd_blank(1);
+	else if (strncmp(buffer, "on", 2) == 0)
+		omnibook_lcd_blank(0);
+	else {
+		brgt = simple_strtoul(buffer, &endp, 10);
+		if ((endp == buffer) || (brgt > omnibook_max_brightness))
+			return -EINVAL;
+		else {
+			backend_byte_write(io_op, brgt);
+#ifdef CONFIG_OMNIBOOK_BACKLIGHT
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21)
+			omnibook_backlight_device->props.brightness = brgt;
+#else /* 2.6.21 */
+			omnibookbl_data.brightness = brgt;
+#endif
+#endif	
+		}
+	}
+	return 0;
+}
+
+static int __init omnibook_brightness_init(struct omnibook_operation *io_op)
+{
+	/*
+	 * FIXME: What is exactly the max value for each model ?
+	 * I know that it's 7 for the TSM30X, TSM70, TSM40 and TSA105
+	 * and previous versions of this driver (wrongly) assumed it was 10 for
+	 * all models.
+	 * 
+	 * XE3GF
+	 * TSM30X
+	 * TSM70
+	 * TSM40
+	 * TSA105
+	 * TSX205
+	 */
+	if (omnibook_ectype & (XE3GF | TSM70 | TSM30X | TSM40 | TSA105 | TSX205))
+		omnibook_max_brightness = 7;
+	else {
+		omnibook_max_brightness = 10;
+		printk(O_WARN "Assuming that LCD brightness is between 0 and %i,\n",
+		       omnibook_max_brightness);
+		printk(O_WARN
+		       "please contact http://sourceforge.net/projects/omnibook to confirm.\n");
+	}
+
+#ifdef CONFIG_OMNIBOOK_BACKLIGHT
+	
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21)
+	omnibook_backlight_device =
+	    backlight_device_register(OMNIBOOK_MODULE_NAME, NULL, (void *)io_op, &omnibookbl_ops);
+#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
+	omnibook_backlight_device =
+	    backlight_device_register(OMNIBOOK_MODULE_NAME, NULL, (void *)io_op, &omnibookbl_data);
+#else /*  < 2.6.20 */
+	omnibook_backlight_device =
+	    backlight_device_register(OMNIBOOK_MODULE_NAME, (void *)io_op, &omnibookbl_data);
+#endif
+	if (IS_ERR(omnibook_backlight_device)) {
+		printk(O_ERR "Unable to register as backlight device.\n");
+		return -ENODEV;
+	}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21)
+	omnibook_backlight_device->props.max_brightness = omnibook_max_brightness;
+	backend_byte_read(io_op, (u8*) &omnibook_backlight_device->props.brightness);
+#else /* < 2.6.21 */
+	omnibookbl_data.max_brightness = omnibook_max_brightness;
+	backend_byte_read(io_op, (u8*) &omnibookbl_data.brightness);
+#endif
+ 
+#endif /* CONFIG_OMNIBOOK_BACKLIGHT */
+	return 0;
+}
+static void __exit omnibook_brightness_cleanup(struct omnibook_operation *io_op)
+{
+#ifdef CONFIG_OMNIBOOK_BACKLIGHT
+	backlight_device_unregister(omnibook_backlight_device);
+#endif
+}
+
+static struct omnibook_tbl lcd_table[] __initdata = {
+	{TSM70 | TSX205, {CDI, TSM70_LCD_READ, TSM70_LCD_WRITE, 0, 0, 0}},
+	{TSM40, {SMI, SMI_GET_LCD_BRIGHTNESS, SMI_SET_LCD_BRIGHTNESS, 0, 0, 0}},
+	{XE3GF | TSP10 | TSM70 | TSM30X, SIMPLE_BYTE(EC, XE3GF_BRTS, XE3GF_BRTS_MASK)},
+	{XE3GC, SIMPLE_BYTE(EC, XE3GC_BTVL, XE3GC_BTVL_MASK)},
+	{AMILOD, SIMPLE_BYTE(EC, AMILOD_CBRG, XE3GC_BTVL_MASK)},
+	{TSA105, SIMPLE_BYTE(EC, A105_BNDT, A105_BNDT_MASK)},
+	{0,}
+};
+
+static struct omnibook_feature __declared_feature lcd_driver = {
+	.name = "lcd",
+	.enabled = 1,
+	.read = omnibook_brightness_read,
+	.write = omnibook_brightness_write,
+	.init = omnibook_brightness_init,
+	.exit = omnibook_brightness_cleanup,
+	.ectypes = XE3GF | XE3GC | AMILOD | TSP10 | TSM70 | TSM30X | TSM40 | TSA105 | TSX205,
+	.tbl = lcd_table,
+};
+
+module_param_named(lcd, lcd_driver.enabled, int, S_IRUGO);
+MODULE_PARM_DESC(lcd, "Use 0 to disable, 1 to enable to LCD brightness support");
+
+/* End of file */
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/temperature.c
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/temperature.c
@@ -0,0 +1,55 @@
+/*
+ * temperature.c -- CPU temprature monitoring
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2, or (at your option) any
+ * later version.
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * Written by Soós Péter <sp@osb.hu>, 2002-2004
+ * Modified by Mathieu Bérard <mathieu.berard@crans.org>, 2006
+ */
+
+#include "omnibook.h"
+#include "hardware.h"
+
+static int omnibook_temperature_read(char *buffer, struct omnibook_operation *io_op)
+{
+	int len = 0;
+	int retval;
+	u8 temp;
+
+	if ((retval = backend_byte_read(io_op, &temp)))
+		return retval;
+
+	len += sprintf(buffer + len, "CPU temperature:            %2d C\n", temp);
+
+	return len;
+}
+
+static struct omnibook_tbl temp_table[] __initdata = {
+	{XE3GF | TSP10 | TSM70 | TSM30X | TSX205, SIMPLE_BYTE(EC, XE3GF_CTMP, 0)},
+	{XE3GC | AMILOD, SIMPLE_BYTE(EC, XE3GC_CTMP, 0)},
+	{OB500 | OB510 | OB6000 | OB6100 | XE4500 | XE2, SIMPLE_BYTE(EC, OB500_CTMP, 0)},
+	{OB4150, SIMPLE_BYTE(EC, OB4150_TMP, 0)},
+	{0,}
+};
+
+static struct omnibook_feature __declared_feature temperature_driver = {
+	.name = "temperature",
+	.enabled = 1,
+	.read = omnibook_temperature_read,
+	.ectypes =
+	    XE3GF | XE3GC | OB500 | OB510 | OB6000 | OB6100 | XE4500 | OB4150 | XE2 | AMILOD | TSP10
+	    | TSM70 | TSM30X | TSX205,
+	.tbl = temp_table,
+};
+
+module_param_named(temperature, temperature_driver.enabled, int, S_IRUGO);
+MODULE_PARM_DESC(temperature, "Use 0 to disable, 1 to enable thermal status and policy support");
+/* End of file */
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/compat.h
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/compat.h
@@ -0,0 +1,71 @@
+/*
+ * compat.h -- Older kernel (=> 2.6.11) support 
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2, or (at your option) any
+ * later version.
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * Written by Mathieu Bérard <mathieu.berard@crans.org>, 2006
+ */
+
+#include <linux/version.h>
+
+/*
+ * For compatibility with kernel older than 2.6.16
+ * Mutex to Semaphore fallback
+ */
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,16))
+#include <asm/semaphore.h>
+#define DEFINE_MUTEX(lock)		DECLARE_MUTEX(lock)
+#define	mutex_init(lock)		init_MUTEX(lock)
+#define mutex_lock(lock)		down(lock)
+#define mutex_lock_interruptible(lock)	down_interruptible(lock)
+#define mutex_unlock(lock)		up(lock)
+#define mutex_destroy(lock)		do { } while(0)
+#else
+#include <linux/mutex.h>
+#endif
+
+/*
+ * For compatibility with kernel older than 2.6.14
+ */
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,14))
+static void inline *kzalloc(size_t size, int flags)
+{
+	void *ret = kmalloc(size, flags);
+	if (ret)
+		memset(ret, 0, size);
+	return ret;
+}
+#endif
+
+/*
+ * For compatibility with kernel older than 2.6.11
+ */
+
+#ifndef DEFINE_SPINLOCK
+#define DEFINE_SPINLOCK(s)              spinlock_t s = SPIN_LOCK_UNLOCKED
+#endif
+
+/*
+ * Those kernel don't have ICH7 southbridge pcids
+ */
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11))
+#define PCI_DEVICE_ID_INTEL_ICH7_0      0x27b8
+#define PCI_DEVICE_ID_INTEL_ICH7_1      0x27b9
+#define PCI_DEVICE_ID_INTEL_ICH7_30	0x27b0
+#define PCI_DEVICE_ID_INTEL_ICH7_31     0x27bd
+#endif
+
+
+
+/* End of file */
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/battery.c
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/battery.c
@@ -0,0 +1,557 @@
+/*
+ * battery.c -- battery related functions
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2, or (at your option) any
+ * later version.
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * Written by Soós Péter <sp@osb.hu>, 2002-2004
+ * Modified by Mathieu Bérard <mathieu.berard@crans.org>, 2006
+ */
+
+#include "omnibook.h"
+#include "hardware.h"
+
+struct omnibook_battery_info {
+	u8 type;		/* 1 - Li-Ion, 2 NiMH */
+	u16 sn;			/* Serial number */
+	u16 dv;			/* Design Voltage */
+	u16 dc;			/* Design Capacity */
+};
+
+struct omnibook_battery_state {
+	u16 pv;			/* Present Voltage */
+	u16 rc;			/* Remaining Capacity */
+	u16 lc;			/* Last Full Capacity */
+	u8 gauge;		/* Gauge in % */
+	u8 status;		/* 0 - unknown, 1 - charged, 2 - discharging, 3 - charging, 4 - critical) */
+};
+
+enum {
+	OMNIBOOK_BATTSTAT_UNKNOWN,
+	OMNIBOOK_BATTSTAT_CHARGED,
+	OMNIBOOK_BATTSTAT_DISCHARGING,
+	OMNIBOOK_BATTSTAT_CHARGING,
+	OMNIBOOK_BATTSTAT_CRITICAL
+};
+
+#define BAT_OFFSET 0x10
+
+static int __backend_u16_read(struct omnibook_operation *io_op, u16 *data)
+{
+	int retval;
+	u8 byte;
+
+	retval = __backend_byte_read(io_op, &byte);
+	if (retval)
+		return retval;
+	*data = byte;
+	io_op->read_addr += 1;
+	retval = __backend_byte_read(io_op, &byte);
+	*data += (byte << 8);
+	return retval;
+}
+
+static int omnibook_battery_present(struct omnibook_operation *io_op, int num)
+{
+	int retval;
+	u8 bat;
+	int i;
+
+	/*
+	 * XE3GF
+	 * TSP10
+	 * TSM30X
+	 * TSM70
+	 */
+	if (omnibook_ectype & (XE3GF | TSP10 | TSM70 | TSM30X)) {
+		io_op->read_addr = XE3GF_BAL;
+		io_op->read_mask = XE3GF_BAL0_MASK;
+		for (i = 0; i < num; i++)
+			io_op->read_mask = io_op->read_mask << 1;
+		retval = __backend_byte_read(io_op, &bat);
+	/*
+	 * XE3GC
+	 * AMILOD
+	 */
+	} else if (omnibook_ectype & (XE3GC | AMILOD)) {
+		io_op->read_addr = XE3GC_BAT;
+		io_op->read_mask = XE3GC_BAT0_MASK;
+		for (i = 0; i < num; i++)
+			io_op->read_mask = io_op->read_mask << 1;
+		retval = __backend_byte_read(io_op, &bat);
+	} else
+		retval = -ENODEV;
+
+	/* restore default read_mask */
+	io_op->read_mask = 0;
+
+	return !!bat;
+}
+
+/*
+ * Get static battery information
+ * All info have to be reread every time because battery sould be cahnged
+ * when laptop is on AC power 
+ * return values:
+ *  < 0 - ERROR
+ *    0 - OK
+ *    1 - Battery is not present
+ *    2 - Not supported
+ */
+static int omnibook_get_battery_info(struct omnibook_operation *io_op,
+				     int num,
+				     struct omnibook_battery_info *battinfo)
+{
+	int retval;
+	/*
+	 * XE3GF
+	 * TSP10
+	 * TSM70
+         * TSM30X
+	 */
+	if (omnibook_ectype & (XE3GF | TSP10 | TSM70 | TSM30X)) {
+		retval = omnibook_battery_present(io_op, num);
+		if (retval < 0)
+			return retval;
+		if (retval) {
+			io_op->read_addr = XE3GF_BTY0 + (BAT_OFFSET * num);
+			if ((retval = __backend_byte_read(io_op, &(*battinfo).type)))
+				return retval;
+			io_op->read_addr = XE3GF_BSN0 + (BAT_OFFSET * num);
+			if ((retval = __backend_u16_read(io_op, &(*battinfo).sn)))
+				return retval;
+			io_op->read_addr = XE3GF_BDV0 + (BAT_OFFSET * num);
+			if ((retval = __backend_u16_read(io_op, &(*battinfo).dv)))
+				return retval;
+			io_op->read_addr = XE3GF_BDC0 + (BAT_OFFSET * num);
+			if ((retval = __backend_u16_read(io_op, &(*battinfo).dc)))
+				return retval;
+
+			(*battinfo).type = ((*battinfo).type & XE3GF_BTY_MASK) ? 1 : 0;
+		} else
+			return 1;
+	/*
+	 * XE3GC
+	 */
+	} else if (omnibook_ectype & (XE3GC)) {
+		retval = omnibook_battery_present(io_op, num);
+		if (retval < 0)
+			return retval;
+		if (retval) {
+			io_op->read_addr = XE3GC_BDV0 + (BAT_OFFSET * num);
+			if ((retval = __backend_u16_read(io_op, &(*battinfo).dv)))
+				return retval;
+			io_op->read_addr = XE3GC_BDC0 + (BAT_OFFSET * num);
+			if ((retval = __backend_u16_read(io_op, &(*battinfo).dc)))
+				return retval;
+			io_op->read_addr = XE3GC_BTY0 + (BAT_OFFSET * num);
+			if ((retval = __backend_byte_read(io_op, &(*battinfo).type)))
+				return retval;
+
+			(*battinfo).type = ((*battinfo).type & XE3GC_BTY_MASK) ? 1 : 0;
+			(*battinfo).sn = 0;	/* Unknown */
+		} else
+			return 1;
+		/*
+		 * AMILOD
+		 */
+	} else if (omnibook_ectype & (AMILOD)) {
+		retval = omnibook_battery_present(io_op, num);
+		if (retval < 0)
+			return retval;
+		if (retval) {
+			io_op->read_addr = AMILOD_BDV0 + (BAT_OFFSET * num);
+			if ((retval = __backend_u16_read(io_op, &(*battinfo).dv)))
+				return retval;
+			io_op->read_addr = AMILOD_BDC0 + (BAT_OFFSET * num);
+			if ((retval = __backend_u16_read(io_op, &(*battinfo).dc)))
+				return retval;
+			io_op->read_addr = AMILOD_BTY0 + (BAT_OFFSET * num);
+			if ((retval = __backend_byte_read(io_op, &(*battinfo).type)))
+				return retval;
+
+			(*battinfo).type = ((*battinfo).type & AMILOD_BTY_MASK) ? 1 : 0;
+			(*battinfo).sn = 0;	/* Unknown */
+		} else
+			return 1;
+		/*
+		 * FIXME
+		 * OB500
+		 * OB510
+		 */
+	} else if (omnibook_ectype & (OB500 | OB510)) {
+		switch (num) {
+		case 0:
+		case 1:
+		case 2:
+			break;
+		default:
+			return -EINVAL;
+		}
+		/*
+		 * OB6000
+		 * OB6100
+		 * XE4500
+		 */
+	} else if (omnibook_ectype & (OB6000 | OB6100 | XE4500)) {
+		switch (num) {
+		case 0:
+		case 1:
+			break;
+		default:
+			return -EINVAL;
+		}
+	} else
+		return 2;
+
+	return 0;
+}
+
+/*
+ * Get battery status
+ * return values:
+ *  < 0 - ERROR
+ *    0 - OK
+ *    1 - Battery is not present
+ *    2 - Not supported
+ */
+static int omnibook_get_battery_status(struct omnibook_operation *io_op, 
+				       int num,
+				       struct omnibook_battery_state *battstat)
+{
+	int retval;
+	u8 status;
+	u16 dc;
+	int gauge;
+
+	/*
+	 * XE3GF
+	 * TSP10
+	 * TSM70
+	 */
+	if (omnibook_ectype & (XE3GF | TSP10 | TSM70 | TSM30X)) {
+		retval = omnibook_battery_present(io_op, num);
+		if (retval < 0)
+			return retval;
+		if (retval) {
+			io_op->read_addr = XE3GF_BST0 + (BAT_OFFSET * num);
+			if ((retval = __backend_byte_read(io_op, &status)))
+				return retval;
+			io_op->read_addr = XE3GF_BRC0 + (BAT_OFFSET * num);
+			if ((retval = __backend_u16_read(io_op, &(*battstat).rc)))
+				return retval;
+			io_op->read_addr = XE3GF_BPV0 + (BAT_OFFSET * num);
+			if ((retval = __backend_u16_read(io_op, &(*battstat).pv)))
+				return retval;
+			io_op->read_addr = XE3GF_BFC0 + (BAT_OFFSET * num);
+			if ((retval = __backend_u16_read(io_op, &(*battstat).lc)))
+				return retval;
+			io_op->read_addr = XE3GF_GAU0 + (BAT_OFFSET * num);
+			if ((retval = __backend_byte_read(io_op, &(*battstat).gauge)))
+				return retval;
+
+			if (status & XE3GF_BST_MASK_CRT)
+				(*battstat).status = OMNIBOOK_BATTSTAT_CRITICAL;
+			else if (status & XE3GF_BST_MASK_CHR)
+				(*battstat).status = OMNIBOOK_BATTSTAT_CHARGING;
+			else if (status & XE3GF_BST_MASK_DSC)
+				(*battstat).status = OMNIBOOK_BATTSTAT_DISCHARGING;
+			else if (status & (XE3GF_BST_MASK_CHR | XE3GF_BST_MASK_DSC))
+				(*battstat).status = OMNIBOOK_BATTSTAT_UNKNOWN;
+			else {
+				(*battstat).status = OMNIBOOK_BATTSTAT_CHARGED;
+			}
+		} else
+			return 1;
+	/*
+	 * XE3GC
+	 */
+	} else if (omnibook_ectype & (XE3GC)) {
+		retval = omnibook_battery_present(io_op, num);
+		if (retval < 0)
+			return retval;
+		if (retval) {
+			io_op->read_addr = XE3GC_BST0 + (BAT_OFFSET * num);
+			if ((retval = __backend_byte_read(io_op, &status)))
+				return retval;
+			io_op->read_addr = XE3GC_BRC0 + (BAT_OFFSET * num);
+			if ((retval = __backend_u16_read(io_op, &(*battstat).rc)))
+				return retval;
+			io_op->read_addr = XE3GC_BPV0 + (BAT_OFFSET * num);
+			if ((retval = __backend_u16_read(io_op, &(*battstat).pv)))
+				return retval;
+			io_op->read_addr = XE3GC_BDC0 + (BAT_OFFSET * num);
+			if ((retval = __backend_u16_read(io_op, &dc)))
+				return retval;
+
+			if (status & XE3GC_BST_MASK_CRT)
+				(*battstat).status = OMNIBOOK_BATTSTAT_CRITICAL;
+			else if (status & XE3GC_BST_MASK_CHR)
+				(*battstat).status = OMNIBOOK_BATTSTAT_CHARGING;
+			else if (status & XE3GC_BST_MASK_DSC)
+				(*battstat).status = OMNIBOOK_BATTSTAT_DISCHARGING;
+			else if (status & (XE3GC_BST_MASK_CHR | XE3GC_BST_MASK_DSC))
+				(*battstat).status = OMNIBOOK_BATTSTAT_UNKNOWN;
+			else {
+				(*battstat).status = OMNIBOOK_BATTSTAT_CHARGED;
+			}
+			gauge = ((*battstat).rc * 100) / dc;
+			(*battstat).gauge = gauge;
+			(*battstat).lc = 0;	/* Unknown */
+		} else
+			return 1;
+	/*
+	 * AMILOD
+	 */
+	} else if (omnibook_ectype & (AMILOD)) {
+		retval = omnibook_battery_present(io_op, num);
+		if (retval < 0)
+			return retval;
+		if (retval) {
+			io_op->read_addr = AMILOD_BST0 + (BAT_OFFSET * num);
+			if ((retval = __backend_byte_read(io_op, &status)))
+				return retval;
+			io_op->read_addr = AMILOD_BRC0 + (BAT_OFFSET * num);
+			if ((retval = __backend_u16_read(io_op, &(*battstat).rc)))
+				return retval;
+			io_op->read_addr = AMILOD_BPV0 + (BAT_OFFSET * num);
+			if ((retval = __backend_u16_read(io_op, &(*battstat).pv)))
+				return retval;
+			io_op->read_addr = AMILOD_BDC0 + (BAT_OFFSET * num);
+			if ((retval = __backend_u16_read(io_op, &dc)))
+				return retval;
+
+			if (status & AMILOD_BST_MASK_CRT)
+				(*battstat).status = OMNIBOOK_BATTSTAT_CRITICAL;
+			else if (status & AMILOD_BST_MASK_CHR)
+				(*battstat).status = OMNIBOOK_BATTSTAT_CHARGING;
+			else if (status & AMILOD_BST_MASK_DSC)
+				(*battstat).status = OMNIBOOK_BATTSTAT_DISCHARGING;
+			else if (status & (AMILOD_BST_MASK_CHR | AMILOD_BST_MASK_DSC))
+				(*battstat).status = OMNIBOOK_BATTSTAT_UNKNOWN;
+			else {
+				(*battstat).status = OMNIBOOK_BATTSTAT_CHARGED;
+			}
+			gauge = ((*battstat).rc * 100) / dc;
+			(*battstat).gauge = gauge;
+			(*battstat).lc = 0;	/* Unknown */
+		} else
+			return 1;
+		/*
+		 * OB500
+		 * OB510
+		 */
+	} else if (omnibook_ectype & (OB500 | OB510)) {
+		switch (num) {
+		case 0:
+			io_op->read_addr = OB500_BT1S;
+			if ((retval = __backend_byte_read(io_op, &status)))
+				return retval;
+			io_op->read_addr = OB500_BT1C;
+			if ((retval = __backend_u16_read(io_op, &(*battstat).rc)))
+				return retval;
+			io_op->read_addr = OB500_BT1V;
+			if ((retval = __backend_u16_read(io_op, &(*battstat).pv)))
+				return retval;
+			break;
+		case 1:
+			io_op->read_addr = OB500_BT2S;
+			if ((retval = __backend_byte_read(io_op, &status)))
+				return retval;
+			io_op->read_addr = OB500_BT2C;
+			if ((retval = __backend_u16_read(io_op, &(*battstat).rc)))
+				return retval;
+			io_op->read_addr = OB500_BT2V;
+			if ((retval = __backend_u16_read(io_op, &(*battstat).pv)))
+				return retval;
+			break;
+		case 2:
+			io_op->read_addr = OB500_BT3S;
+			if ((retval = __backend_byte_read(io_op, &status)))
+				return retval;
+			io_op->read_addr = OB500_BT3C;
+			if ((retval = __backend_u16_read(io_op, &(*battstat).rc)))
+				return retval;
+			io_op->read_addr = OB500_BT3V;
+			if ((retval = __backend_u16_read(io_op, &(*battstat).pv)))
+				return retval;
+			break;
+		default:
+			return -EINVAL;
+		}
+		if (status & OB500_BST_MASK_CRT)
+			(*battstat).status = OMNIBOOK_BATTSTAT_CRITICAL;
+		else if (status & OB500_BST_MASK_CHR)
+			(*battstat).status = OMNIBOOK_BATTSTAT_CHARGING;
+		else if (status & OB500_BST_MASK_DSC)
+			(*battstat).status = OMNIBOOK_BATTSTAT_DISCHARGING;
+		else if (status & (OB500_BST_MASK_CHR | OB500_BST_MASK_DSC))
+			(*battstat).status = OMNIBOOK_BATTSTAT_UNKNOWN;
+		else {
+			(*battstat).status = OMNIBOOK_BATTSTAT_CHARGED;
+		}
+		/*
+		 * OB6000
+		 * OB6100
+		 * XE4500
+		 */
+	} else if (omnibook_ectype & (OB6000 | OB6100 | XE4500)) {
+		switch (num) {
+		case 0:
+			io_op->read_addr = OB500_BT1S;
+			if ((retval = __backend_byte_read(io_op, &status)))
+				return retval;
+			io_op->read_addr = OB500_BT1C;
+			if ((retval = __backend_u16_read(io_op, &(*battstat).rc)))
+				return retval;
+			io_op->read_addr = OB500_BT1V;
+			if ((retval = __backend_u16_read(io_op, &(*battstat).pv)))
+				return retval;
+			break;
+		case 1:
+			io_op->read_addr = OB500_BT3S;
+			if ((retval = __backend_byte_read(io_op, &status)))
+				return retval;
+			io_op->read_addr = OB500_BT3C;
+			if ((retval = __backend_u16_read(io_op, &(*battstat).rc)))
+				return retval;
+			io_op->read_addr = OB500_BT3V;
+			if ((retval = __backend_u16_read(io_op, &(*battstat).pv)))
+				return retval;
+			break;
+		default:
+			return -EINVAL;
+		}
+		if (status & OB500_BST_MASK_CRT)
+			(*battstat).status = OMNIBOOK_BATTSTAT_CRITICAL;
+		else if (status & OB500_BST_MASK_CHR)
+			(*battstat).status = OMNIBOOK_BATTSTAT_CHARGING;
+		else if (status & OB500_BST_MASK_DSC)
+			(*battstat).status = OMNIBOOK_BATTSTAT_DISCHARGING;
+		else if (status & (OB500_BST_MASK_CHR | OB500_BST_MASK_DSC))
+			(*battstat).status = OMNIBOOK_BATTSTAT_UNKNOWN;
+		else {
+			(*battstat).status = OMNIBOOK_BATTSTAT_CHARGED;
+		}
+	} else {
+		return 2;
+	}
+	return 0;
+}
+
+static int omnibook_battery_read(char *buffer, struct omnibook_operation *io_op)
+{
+	char *statustr;
+	char *typestr;
+	int max = 0;
+	int num = 0;
+	int len = 0;
+	int retval;
+	int i;
+	struct omnibook_battery_info battinfo;
+	struct omnibook_battery_state battstat;
+	/*
+	 * XE3GF
+	 * XE3GC
+	 * 0B6000
+	 * 0B6100
+	 * XE4500
+	 * AMILOD
+	 * TSP10
+	 */
+	if (omnibook_ectype & (XE3GF | XE3GC | OB6000 | OB6100 | XE4500 | AMILOD | TSP10))
+		max = 2;
+	/*
+	 * OB500
+	 * 0B510
+	 */
+	else if (omnibook_ectype & (OB500 | OB510))
+		max = 3;
+	/*
+	 * TSM30X
+	 * TSM70
+	 */
+	else if (omnibook_ectype & (TSM70 | TSM30X))
+		max = 1;
+
+	if(mutex_lock_interruptible(&io_op->backend->mutex))
+			return -ERESTARTSYS;
+
+	for (i = 0; i < max; i++) {
+		retval = omnibook_get_battery_info(io_op, i, &battinfo);
+		if (retval == 0) {
+			num++;
+			omnibook_get_battery_status(io_op, i, &battstat);
+			typestr = (battinfo.type) ? "Li-Ion" : "NiMH";
+			switch (battstat.status) {
+			case OMNIBOOK_BATTSTAT_CHARGED:
+				statustr = "charged";
+				break;
+			case OMNIBOOK_BATTSTAT_DISCHARGING:
+				statustr = "discharging";
+				break;
+			case OMNIBOOK_BATTSTAT_CHARGING:
+				statustr = "charging";
+				break;
+			case OMNIBOOK_BATTSTAT_CRITICAL:
+				statustr = "critical";
+				break;
+			default:
+				statustr = "unknown";
+			}
+
+			len += sprintf(buffer + len, "Battery:            %11d\n", i);
+			len += sprintf(buffer + len, "Type:               %11s\n", typestr);
+			if (battinfo.sn)
+				len +=
+				    sprintf(buffer + len, "Serial Number:      %11d\n",
+					    battinfo.sn);
+			len += sprintf(buffer + len, "Present Voltage:    %11d mV\n", battstat.pv);
+			len += sprintf(buffer + len, "Design Voltage:     %11d mV\n", battinfo.dv);
+			len += sprintf(buffer + len, "Remaining Capacity: %11d mAh\n", battstat.rc);
+			if (battstat.lc)
+				len +=
+				    sprintf(buffer + len, "Last Full Capacity: %11d mAh\n",
+					    battstat.lc);
+			len += sprintf(buffer + len, "Design Capacity:    %11d mAh\n", battinfo.dc);
+			len +=
+			    sprintf(buffer + len, "Gauge:              %11d %%\n", battstat.gauge);
+			len += sprintf(buffer + len, "Status:             %11s\n", statustr);
+			len += sprintf(buffer + len, "\n");
+		}
+	}
+	if (num == 0)
+		len += sprintf(buffer + len, "No battery present\n");
+
+	mutex_unlock(&io_op->backend->mutex);
+
+	return len;
+}
+
+static struct omnibook_tbl battery_table[] __initdata = {
+	{XE3GF | XE3GC | AMILOD | TSP10 | TSM70 | TSM30X, {EC,}},
+	{0,}
+};
+
+static struct omnibook_feature __declared_feature battery_driver = {
+	.name = "battery",
+#ifdef CONFIG_OMNIBOOK_LEGACY
+	.enabled = 1,
+#else
+	.enabled = 0,
+#endif
+	.read = omnibook_battery_read,
+	.ectypes = XE3GF | XE3GC | AMILOD | TSP10 | TSM70 | TSM30X,	/* FIXME: OB500|OB6000|OB6100|XE4500 */
+	.tbl = battery_table,
+};
+
+module_param_named(battery, battery_driver.enabled, int, S_IRUGO);
+MODULE_PARM_DESC(battery, "Use 0 to disable, 1 to enable battery status monitoring");
+/* End of file */
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/ec.c
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/ec.c
@@ -0,0 +1,188 @@
+/*
+ * ec.c -- low level functions to access Embedded Controller,
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2, or (at your option) any
+ * later version.
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * Written by Soós Péter <sp@osb.hu>, 2002-2004
+ * Modified by Mathieu Bérard <mathieu.berard@crans.org>, 2006
+ */
+
+#include "omnibook.h"
+
+#include <linux/types.h>
+#include <linux/delay.h>
+#include <linux/sched.h>
+#include <linux/spinlock.h>
+#include <linux/ioport.h>
+
+#include <asm/io.h>
+#include "hardware.h"
+
+/*
+ * Interrupt control
+ */
+
+static DEFINE_SPINLOCK(omnibook_ec_lock);
+
+/*
+ * Registers of the embedded controller
+ */
+
+#define OMNIBOOK_EC_DATA		0x62
+#define OMNIBOOK_EC_SC			0x66
+
+/*
+ * Embedded controller status register bits
+ */
+
+#define OMNIBOOK_EC_STAT_OBF		0x01	/* Output buffer full */
+#define OMNIBOOK_EC_STAT_IBF		0x02	/* Input buffer full */
+
+
+/*
+ * Embedded controller commands
+ */
+
+#define OMNIBOOK_EC_CMD_READ		0x80
+#define OMNIBOOK_EC_CMD_WRITE		0x81
+
+/*
+ * Wait for embedded controller buffer
+ */
+
+static int omnibook_ec_wait(u8 event)
+{
+	int timeout = OMNIBOOK_TIMEOUT;
+
+	switch (event) {
+	case OMNIBOOK_EC_STAT_OBF:
+		while (!(inb(OMNIBOOK_EC_SC) & event) && timeout--)
+			mdelay(1);
+		break;
+	case OMNIBOOK_EC_STAT_IBF:
+		while ((inb(OMNIBOOK_EC_SC) & event) && timeout--)
+			mdelay(1);
+		break;
+	default:
+		return -EINVAL;
+	}
+	if (timeout > 0)
+		return 0;
+	return -ETIME;
+}
+
+/*
+ * Read from the embedded controller
+ * Decide at run-time if we can use the much cleaner ACPI EC driver instead of
+ * this implementation, this is the case if ACPI has been compiled and is not
+ * disabled.
+ */
+
+static int omnibook_ec_read(const struct omnibook_operation *io_op, u8 * data)
+{
+	int retval;
+
+#ifdef CONFIG_ACPI_EC
+	if (likely(!acpi_disabled)) {
+		retval = ec_read((u8) io_op->read_addr, data);
+		if (io_op->read_mask)
+			*data &= io_op->read_mask;
+//		dprintk("ACPI EC read at %lx success %i.\n", io_op->read_addr, retval);
+		return retval;
+	}
+#endif
+	spin_lock_irq(&omnibook_ec_lock);
+	retval = omnibook_ec_wait(OMNIBOOK_EC_STAT_IBF);
+	if (retval)
+		goto end;
+	outb(OMNIBOOK_EC_CMD_READ, OMNIBOOK_EC_SC);
+	retval = omnibook_ec_wait(OMNIBOOK_EC_STAT_IBF);
+	if (retval)
+		goto end;
+	outb((u8) io_op->read_addr, OMNIBOOK_EC_DATA);
+	retval = omnibook_ec_wait(OMNIBOOK_EC_STAT_OBF);
+	if (retval)
+		goto end;
+	*data = inb(OMNIBOOK_EC_DATA);
+	if (io_op->read_mask)
+		*data &= io_op->read_mask;
+      end:
+	spin_unlock_irq(&omnibook_ec_lock);
+//	dprintk("Custom EC read at %lx success %i.\n", io_op->read_addr, retval);
+	return retval;
+}
+
+/*
+ * Write to the embedded controller:
+ * If OMNIBOOK_LEGACY is set, decide at run-time if we can use the much cleaner 
+ * ACPI EC driver instead of this legacy implementation. 
+ * This is the case if ACPI has been compiled and is not
+ * disabled.
+ * If OMNIBOOK_LEGACY is unset, we drop our custoim implementation
+ */
+
+static int omnibook_ec_write(const struct omnibook_operation *io_op, u8 data)
+{
+	int retval;
+
+#ifdef CONFIG_ACPI_EC
+	if (likely(!acpi_disabled)) {
+		retval = ec_write((u8) io_op->write_addr, data);
+//		dprintk("ACPI EC write at %lx success %i.\n", io_op->write_addr, retval);
+		return retval;
+	}
+#endif
+
+	spin_lock_irq(&omnibook_ec_lock);
+	retval = omnibook_ec_wait(OMNIBOOK_EC_STAT_IBF);
+	if (retval)
+		goto end;
+	outb(OMNIBOOK_EC_CMD_WRITE, OMNIBOOK_EC_SC);
+	retval = omnibook_ec_wait(OMNIBOOK_EC_STAT_IBF);
+	if (retval)
+		goto end;
+	outb((u8) io_op->write_addr, OMNIBOOK_EC_DATA);
+	retval = omnibook_ec_wait(OMNIBOOK_EC_STAT_IBF);
+	if (retval)
+		goto end;
+	outb(data, OMNIBOOK_EC_DATA);
+      end:
+	spin_unlock_irq(&omnibook_ec_lock);
+//	dprintk("Custom EC write at %lx success %i.\n", io_op->write_addr, retval);
+	return retval;
+}
+
+static int omnibook_ec_display(const struct omnibook_operation *io_op, unsigned int *state)
+{
+	int retval;
+	u8 raw_state;
+
+	retval = __backend_byte_read(io_op, &raw_state);
+	if (retval < 0)
+		return retval;
+
+	*state = !!(raw_state) & DISPLAY_CRT_DET;
+
+	return DISPLAY_CRT_DET;
+}
+
+/*
+ * Backend interface declarations
+ */
+
+struct omnibook_backend ec_backend = {
+	.name = "ec",
+	.byte_read = omnibook_ec_read,
+	.byte_write = omnibook_ec_write,
+	.display_get = omnibook_ec_display,
+};
+
+/* End of file */
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/sections.lds
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/sections.lds
@@ -0,0 +1,11 @@
+SECTIONS
+{
+  .data :
+    {
+      . = ALIGN(32);
+      _start_features_driver = .;
+      *(.features)
+      _end_features_driver = .;
+      *(.data)
+    } 
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/cooling.c
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/cooling.c
@@ -0,0 +1,97 @@
+/*
+ * colling.c -- cooling methods feature
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2, or (at your option) any
+ * later version.
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * Written by Mathieu Bérard <mathieu.berard@crans.org>, 2007
+ */
+
+#include "omnibook.h"
+#include "hardware.h"
+
+static int omnibook_cooling_read(char *buffer, struct omnibook_operation *io_op)
+{
+	int len = 0;
+
+	if(mutex_lock_interruptible(&io_op->backend->mutex))
+		return -ERESTARTSYS;
+
+	len += sprintf(buffer + len, "Cooling method : %s\n", 
+			io_op->backend->cooling_state ? "Performance"  : "Powersave" );
+
+	mutex_unlock(&io_op->backend->mutex);
+	return len;
+}
+
+static int omnibook_cooling_write(char *buffer, struct omnibook_operation *io_op)
+{
+	int retval = 0;
+
+	if(mutex_lock_interruptible(&io_op->backend->mutex))
+		return -ERESTARTSYS;
+
+
+	if (*buffer == '0') {
+		retval = __backend_byte_write(io_op, 
+				TSM70_COOLING_OFFSET + TSM70_COOLING_POWERSAVE);
+	} else if (*buffer == '1') {
+		retval = __backend_byte_write(io_op,
+				TSM70_COOLING_OFFSET + TSM70_COOLING_PERF);
+	} else {
+		retval = -EINVAL;
+		goto out;
+	}
+
+	/* *buffer is either '0' or '1' here */
+	if (!retval)
+		io_op->backend->cooling_state = *buffer - '0' ;
+
+	mutex_unlock(&io_op->backend->mutex);
+
+	out:
+	return retval;
+}
+
+static int __init omnibook_cooling_init(struct omnibook_operation *io_op)
+{
+	mutex_lock(&io_op->backend->mutex);
+	/* XXX: Assumed default cooling method: performance */
+	io_op->backend->cooling_state = TSM70_COOLING_PERF;
+	mutex_unlock(&io_op->backend->mutex);
+	return 0;
+}
+
+static void __exit omnibook_cooling_exit(struct omnibook_operation *io_op)
+{
+	/* Set back cooling method to performance */	
+	backend_byte_write(io_op, TSM70_COOLING_OFFSET + TSM70_COOLING_PERF);
+}
+
+static struct omnibook_tbl cooling_table[] __initdata = {
+	{TSM70 | TSX205, {CDI, 0, TSM70_FN_INDEX, 0, 0, 0 }},
+	{0,}
+};
+
+struct omnibook_feature __declared_feature cooling_driver = {
+	.name = "cooling",
+	.enabled = 1,
+	.read = omnibook_cooling_read,
+	.write = omnibook_cooling_write,
+	.init = omnibook_cooling_init,
+	.exit = omnibook_cooling_exit,
+	.ectypes = TSM70 | TSX205,
+	.tbl = cooling_table,
+};
+
+module_param_named(cooling, cooling_driver.enabled, int, S_IRUGO);
+MODULE_PARM_DESC(cooling, "Use 0 to disable, 1 to enable CPU cooling method control");
+
+/* End of file */
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/fan_policy.c
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/fan_policy.c
@@ -0,0 +1,188 @@
+/*
+ * fan_policy.c -- fan policy support
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2, or (at your option) any
+ * later version.
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * Written by Soós Péter <sp@osb.hu>, 2002-2004
+ * Modified by Mathieu Bérard <mathieu.berard@crans.org>, 2006
+ */
+
+#include "omnibook.h"
+
+#include <linux/ctype.h>
+#include "hardware.h"
+
+/*
+ * Default temperature limits.
+ * Danger! You may overheat your CPU!
+ * Do not change these values unless you exactly know what you do.
+ */
+
+#define OMNIBOOK_FAN_LEVELS			8
+#define OMNIBOOK_FAN_MIN			25	/* Minimal value of fan off temperature */
+#define OMNIBOOK_FOT_MAX			75	/* Maximal value of fan off temperature */
+#define OMNIBOOK_FAN_MAX			95	/* Maximal value of fan on temperature */
+#define OMNIBOOK_FOT_DEFAULT			60	/* Default value of fan off temperature */
+#define OMNIBOOK_FAN1_DEFAULT			75	/* Default value of fan on temperature */
+#define OMNIBOOK_FAN2_DEFAULT			85	/* Default value of fan level 2 temperature */
+#define OMNIBOOK_FAN3_DEFAULT			90	/* Default value of fan level 3 temperature */
+#define OMNIBOOK_FAN4_DEFAULT			95	/* Default value of fan level 4 temperature */
+#define OMNIBOOK_FAN5_DEFAULT			95	/* Default value of fan level 5 temperature */
+#define OMNIBOOK_FAN6_DEFAULT			95	/* Default value of fan level 6 temperature */
+#define OMNIBOOK_FAN7_DEFAULT			95	/* Default value of fan level 7 temperature */
+
+static const u8 fan_defaults[] = {
+		OMNIBOOK_FOT_DEFAULT,
+		OMNIBOOK_FAN1_DEFAULT,
+		OMNIBOOK_FAN2_DEFAULT,
+		OMNIBOOK_FAN3_DEFAULT,
+		OMNIBOOK_FAN4_DEFAULT,
+		OMNIBOOK_FAN5_DEFAULT,
+		OMNIBOOK_FAN6_DEFAULT,
+		OMNIBOOK_FAN7_DEFAULT,
+};
+
+static int omnibook_get_fan_policy(struct omnibook_operation *io_op, u8 *fan_policy)
+{
+	int retval ;
+	int i;
+
+	for (i = 0; i < OMNIBOOK_FAN_LEVELS; i++) {
+		io_op->read_addr = XE3GF_FOT + i;
+		if ((retval = __backend_byte_read(io_op, &fan_policy[i])))
+			return retval;
+	}
+
+	return 0;
+}
+
+static int omnibook_set_fan_policy(struct omnibook_operation *io_op, const u8 *fan_policy)
+{
+	int retval;
+	int i;
+
+	if (fan_policy[0] > OMNIBOOK_FOT_MAX)
+		return -EINVAL;
+
+	for (i = 0; i < OMNIBOOK_FAN_LEVELS; i++) {
+		if ((fan_policy[i] > fan_policy[i + 1])
+		    || (fan_policy[i] < OMNIBOOK_FAN_MIN)
+		    || (fan_policy[i] > OMNIBOOK_FAN_MAX))
+			return -EINVAL;
+	}
+	for (i = 0; i < OMNIBOOK_FAN_LEVELS; i++) {
+		io_op->write_addr = XE3GF_FOT + i;
+		if ((retval = __backend_byte_write(io_op, fan_policy[i])))
+			return retval;
+	}
+
+	return 0;
+}
+
+static int omnibook_fan_policy_read(char *buffer, struct omnibook_operation *io_op)
+{
+	int retval;
+	int len = 0;
+	u8 i;
+	u8 fan_policy[OMNIBOOK_FAN_LEVELS];
+
+	if(mutex_lock_interruptible(&io_op->backend->mutex))
+		return -ERESTARTSYS;
+
+	retval = omnibook_get_fan_policy(io_op, &fan_policy[0]);
+
+	mutex_unlock(&io_op->backend->mutex);
+
+	if(retval)
+		return retval;
+
+	len += sprintf(buffer + len, "Fan off temperature:        %2d C\n", fan_policy[0]);
+	len += sprintf(buffer + len, "Fan on temperature:         %2d C\n", fan_policy[1]);
+	for (i = 2; i < OMNIBOOK_FAN_LEVELS; i++) {
+		len +=
+		    sprintf(buffer + len, "Fan level %1d temperature:    %2d C\n", i,
+			    fan_policy[i]);
+	}
+	len += sprintf(buffer + len, "Minimal temperature to set: %2d C\n", OMNIBOOK_FAN_MIN);
+	len += sprintf(buffer + len, "Maximal temperature to set: %2d C\n", OMNIBOOK_FAN_MAX);
+
+	return len;
+}
+
+static int omnibook_fan_policy_write(char *buffer, struct omnibook_operation *io_op)
+{
+	int n = 0;
+	char *b;
+	char *endp;
+	int retval;
+	int temp;
+	u8 fan_policy[OMNIBOOK_FAN_LEVELS];
+
+	if(mutex_lock_interruptible(&io_op->backend->mutex))
+		return -ERESTARTSYS;
+
+	if ((retval = omnibook_get_fan_policy(io_op, &fan_policy[0])))
+		goto out;
+
+	/* 
+	 * Could also be done much simpler using sscanf(,"%u %u ... 
+	 * but this would hardcode OMNIBOOK_FAN_LEVELS.
+	 * The parsed format is "%u " repeated OMNIBOOK_FAN_LEVELS+1 times
+	 */
+
+	b = buffer;
+	do {
+		dprintk("n=[%i] b=[%s]\n", n, b);
+		if (n > OMNIBOOK_FAN_LEVELS) {
+			retval = -EINVAL;
+			goto out;
+		}
+		if (!isspace(*b)) {
+			temp = simple_strtoul(b, &endp, 10);
+			if (endp != b) {	/* there was a match */
+				fan_policy[n++] = temp;
+				b = endp;
+			} else {
+				retval = -EINVAL;
+				goto out;
+			}
+		} else
+			b++;
+	} while ((*b != '\0') && (*b != '\n'));
+
+	/* A zero value set the defaults */
+	if ((fan_policy[0] == 0) && (n == 1))
+		retval = omnibook_set_fan_policy(io_op, &fan_defaults[0]);
+	else
+		retval = omnibook_set_fan_policy(io_op, &fan_policy[0]);
+
+	out:
+	mutex_unlock(&io_op->backend->mutex);
+	return retval;
+}
+
+static struct omnibook_tbl fan_policy_table[] __initdata = {
+	{XE3GF, {EC,}},
+	{0,}
+};
+
+static struct omnibook_feature __declared_feature fan_policy_driver = {
+	.name = "fan_policy",
+	.enabled = 1,
+	.read = omnibook_fan_policy_read,
+	.write = omnibook_fan_policy_write,
+	.ectypes = XE3GF,
+	.tbl = fan_policy_table,
+};
+
+module_param_named(fan_policy, fan_policy_driver.enabled, int, S_IRUGO);
+MODULE_PARM_DESC(fan_policy, "Use 0 to disable, 1 to enable fan control policy support");
+/* End of file */
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/omnibook.h
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/omnibook.h
@@ -0,0 +1,145 @@
+/*
+ * omnibook.h -- High level data structures and functions of omnibook
+ *               support code
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2, or (at your option) any
+ * later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * Written by Soós Péter <sp@osb.hu>, 2002-2004
+ * Modified by Mathieu Bérard <mathieu.berard@crans.org>, 2006-2007
+ */
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/input.h>
+#include <linux/version.h>
+
+/*
+ * EC types
+ */
+
+extern enum omnibook_ectype_t {
+	NONE   = 0,	  /* 0  Default/unknown EC type */ 
+	XE3GF  = (1<<0),  /* 1  HP OmniBook XE3 GF, most old Toshiba Satellites */
+	XE3GC  = (1<<1),  /* 2  HP OmniBook XE3 GC, GD, GE and compatible */
+	OB500  = (1<<2),  /* 3  HP OmniBook 500 and compatible */
+	OB510  = (1<<3),  /* 4  HP OmniBook 510 */
+	OB6000 = (1<<4),  /* 5  HP OmniBook 6000 */
+	OB6100 = (1<<5),  /* 6  HP OmniBook 6100 */
+	XE4500 = (1<<6),  /* 7  HP OmniBook xe4500 and compatible */
+	OB4150 = (1<<7),  /* 8  HP OmniBook 4150 */
+	XE2    = (1<<8),  /* 9  HP OmniBook XE2 */
+	AMILOD = (1<<9),  /* 10 Fujitsu Amilo D */
+	TSP10  = (1<<10), /* 11 Toshiba Satellite P10, P15, P20 and compatible */
+	TSM70  = (1<<11), /* 12 Toshiba Satellite M40X, M70 and compatible */
+	TSM40  = (1<<12), /* 13 Toshiba Satellite M40, M45 and Tecra S1 */
+	TSA105 = (1<<13), /* 14 Toshiba Satellite A105 and compatible (Real support is MISSING) */
+	TSM30X = (1<<14), /* 15 Toshiba Stallite M30X and compatible */
+	TSX205 = (1<<15)  /* 16 Toshiba Stallite X205 and compatible */
+} omnibook_ectype;
+
+#define ALL_ECTYPES XE3GF|XE3GC|OB500|OB510|OB6000|OB6100|XE4500|OB4150|XE2|AMILOD|TSP10|TSM70|TSM40|TSA105|TSM30X|TSX205
+
+/*
+ * This represent a feature provided by this module
+ */
+
+struct omnibook_operation;
+
+struct omnibook_feature {
+	char *name;						/* Name */
+	int enabled;						/* Set from module parameter */
+	int (*read) (char *,struct omnibook_operation *);	/* Procfile read function */
+	int (*write) (char *,struct omnibook_operation *);	/* Procfile write function */
+	int (*init) (struct omnibook_operation *);		/* Specific Initialization function */
+	void (*exit) (struct omnibook_operation *);		/* Specific Cleanup function */
+	int (*suspend) (struct omnibook_operation *);		/* PM Suspend function */
+	int (*resume) (struct omnibook_operation *);		/* PM Resume function */
+	int ectypes;						/* Type(s) of EC we support for this feature (bitmask) */
+	struct omnibook_tbl *tbl;
+	struct omnibook_operation *io_op;
+	struct list_head list;
+};
+
+/*
+ * State of a Wifi/Bluetooth adapter
+ */
+enum {
+	WIFI_EX = (1<<0),	/* 1 1=present 0=absent */
+	WIFI_STA = (1<<1),	/* 2 1=enabled 0=disabled */
+	KILLSWITCH = (1<<2),	/* 4 1=radio on 0=radio off */
+	BT_EX = (1<<3),		/* 8 1=present 0=absent */
+	BT_STA = (1<<4),	/* 16 1=enabled 0=disabled */
+};
+
+/*
+ * Hotkeys state backend neutral masks
+ */
+enum {
+	HKEY_ONETOUCH = (1<<0),		/* 1   Ontetouch button scancode generation */
+	HKEY_MULTIMEDIA = (1<<1),	/* 2   "Multimedia hotkeys" scancode generation */	
+	HKEY_FN = (1<<2),		/* 4   Fn + foo hotkeys scancode generation */
+	HKEY_STICK = (1<<3),		/* 8   Stick key (Fn locked/unlocked on keypress)  */
+	HKEY_TWICE_LOCK = (1<<4),	/* 16  Press Fn twice to lock */
+	HKEY_DOCK = (1<<5),		/* 32  (Un)Dock events scancode generation */
+	HKEY_FNF5 = (1<<6),		/* 64  Fn + F5 (toggle display) is enabled */
+};
+
+#define HKEY_LAST_SHIFT 6
+
+/*
+ * Display state backend neutral masks
+ * _ON masks = port is powered up and running
+ * _DET masks = a plugged display have been detected 
+ */
+
+enum {	
+	DISPLAY_LCD_ON = (1<<0),	/* 1 Internal LCD panel */
+	DISPLAY_CRT_ON = (1<<1),	/* 2 External VGA port */
+	DISPLAY_TVO_ON = (1<<2),	/* 4 External TV-OUT port */
+	DISPLAY_DVI_ON = (1<<3),	/* 8 External DVI port */
+	DISPLAY_LCD_DET = (1<<4),	/* 16 Internal LCD panel */
+	DISPLAY_CRT_DET = (1<<5),	/* 32 External VGA port */
+	DISPLAY_TVO_DET = (1<<6),	/* 64 External TV-OUT port */
+	DISPLAY_DVI_DET = (1<<7),	/* 128 External DVI port */
+};
+
+extern unsigned int omnibook_max_brightness;
+int set_omnibook_param(const char *val, struct kernel_param *kp);
+int omnibook_lcd_blank(int blank);
+struct omnibook_feature *omnibook_find_feature(char *name);
+void omnibook_report_key(struct input_dev *dev, unsigned int keycode);
+
+/* 
+ * __attribute_used__ is not defined anymore in 2.6.24
+ * but __used appeared only in 2.6.22
+ */
+#ifndef __used
+#define __used	__attribute_used__
+#endif
+
+#define __declared_feature __attribute__ (( __section__(".features"),  __aligned__(__alignof__ (struct omnibook_feature)))) __used
+
+/*
+ * yet another printk wrapper
+ */
+#define O_INFO	KERN_INFO OMNIBOOK_MODULE_NAME ": "
+#define O_WARN	KERN_WARNING OMNIBOOK_MODULE_NAME ": "
+#define O_ERR	KERN_ERR OMNIBOOK_MODULE_NAME ": "
+
+#ifdef CONFIG_OMNIBOOK_DEBUG
+#define dprintk(fmt, args...) printk(KERN_INFO "%s: " fmt, OMNIBOOK_MODULE_NAME, ## args)
+#define dprintk_simple(fmt, args...) printk(fmt, ## args)
+#else
+#define dprintk(fmt, args...)	do { } while(0)
+#define dprintk_simple(fmt, args...) do { } while(0)
+#endif
+
+/* End of file */
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/misc/dmi_strings.txt
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/misc/dmi_strings.txt
@@ -0,0 +1,857 @@
+HP OmniBook XT1000 -------------------------
+
+BIOS Vendor:   Insyde Software
+BIOS Version:  IB.M1.05
+BIOS Release:  02/28/2002
+System Vendor: Hewlett-Packard
+Product Name:  HP OmniBook PC
+Version:       HP OmniBook XT1000
+Board Vendor:  Hewlett-Packard
+Board Name:    HP OmniBook PC
+Board Version: HP OmniBook XT1000
+
+---------------------------------------------
+HP OmniBook XT1500 --------------------------
+
+BIOS Vendor:   Insyde Software
+BIOS Version:  IC.M1.05
+BIOS Release:  08/13/2002
+System Vendor: Hewlett-Packard
+Product Name:  HP OmniBook PC
+Version:       HP OmniBook
+Board Vendor:  Hewlett-Packard
+Board Name:    HP OmniBook PC
+Board Version: HP OmniBook
+
+---------------------------------------------
+HP OmniBook XT1500 -------------------------
+
+BIOS Vendor:   Phoenix Technologies LTD
+BIOS Version:  ID.M1.04
+BIOS Release:  08/14/2002
+System Vendor: Hewlett-Packard
+Product Name:  HP OmniBook PC
+Version:       HP OmniBook XE3 GF
+Board Vendor:  Hewlett-Packard
+Board Name:    N/A
+Board Version: OmniBook Zinfandel 4.5
+
+---------------------------------------------
+HP OmniBook XE3 GC --------------------------
+
+BIOS Vendor:   Phoenix Technologies LTD
+BIOS Version:  GC.M1.63
+BIOS Release:  01/01/1992
+System Vendor: Hewlett-Packard
+Product Name:  HP OmniBook PC
+Version:       HP OmniBook XE3 GC
+Board Vendor:  Hewlett-Packard
+Board Name:    N/A
+Board Version: OmniBook N32N-733
+
+---------------------------------------------
+HP OmniBook XE3 GF --------------------------
+
+BIOS Vendor:   Phoenix Technologies LTD
+BIOS Version:  GF.M1.07
+BIOS Release:  03/05/2002
+System Vendor: Hewlett-Packard
+Product Name:  HP OmniBook PC
+Version:       HP OmniBook XE3 GF
+Board Vendor:  Hewlett-Packard
+Board Name:    N/A
+Board Version: OmniBook N32N-101
+
+---------------------------------------------
+HP OmniBook 500 FA --------------------------
+
+BIOS Vendor:   Phoenix Technologies Ltd
+BIOS Version:  FA.M2.62
+BIOS Release:  11/30/1999
+System Vendor: Hewlett-Packard
+Product Name:  HP OmniBook PC
+Version:       HP OmniBook 500 FA
+Board Vendor:  Hewlett-Packard
+Board Name:    HP OmniBook PC
+Board Version: 500 FA
+
+---------------------------------------------
+HP OmniBook 510 FB --------------------------
+
+BIOS Vendor:   Phoenix Technologies Ltd.
+BIOS Version:  FB.M1.20
+BIOS Release:  04/12/02
+System Vendor: Hewlett-Packard
+Product Name:  HP OmniBook PC
+Version:       HP OmniBook 510 FB
+Board Vendor:  Hewlett-Packard
+Board Name:    HP OmniBook PC
+Board Version: 510FB
+
+---------------------------------------------
+Toshiba Satellite 3000-100 ------------------
+
+BIOS Vendor:   TOSHIBA
+BIOS Version:  V2.20
+BIOS Release:  10/12/01
+System Vendor: TOSHIBA
+Product Name:  S3000-100
+Version:       PS300E-03EKL-FR
+Board Vendor:  Null
+Board Name:    888M1
+Board Version: Null
+
+---------------------------------------------
+Toshiba Satellite 1115-s103------------------
+
+BIOS Vendor:   TOSHIBA
+BIOS Version:  V1.20
+BIOS Release:  09/11/2002
+System Vendor: TOSHIBA
+Product Name:  Satellite 1115
+Version:       PS111U-001FUV
+Board Vendor:  TOSHIBA
+Board Name:    BTK20
+Board Version: Null
+
+---------------------------------------------
+Toshiba Satellite 1110 ----------------------
+
+BIOS Vendor:   TOSHIBA
+BIOS Version:  V1.20
+BIOS Release:  09/11/2002
+System Vendor: TOSHIBA
+Product Name:  S1110
+Version:       PS111E-003DN-GR
+Board Vendor:  TOSHIBA
+Board Name:    BTK20
+Board Version: Null
+
+---------------------------------------------
+Toshiba Satellite 1130 ----------------------
+
+BIOS Vendor: TOSHIBA
+BIOS Version: V1.70A
+BIOS Release: 09/02/2003
+System Vendor: TOSHIBA
+Product Name: Satellite 1130
+Version: PS113E-05ZYF-GR
+Board Vendor: TOSHIBA
+Board Name: BTW30
+Board Version: Null
+
+---------------------------------------------
+Toshiba Satellite 1900-704 ------------------
+
+BIOS Vendor:   TOSHIBA
+BIOS Version:  V1.50
+BIOS Release:  11/25/2002
+System Vendor: TOSHIBA
+Product Name:  Satellite 1950
+Version:       PS195E-008QY-DU
+Board Vendor:  TOSHIBA
+Board Name:    ATR60
+
+---------------------------------------------
+Toshiba Satellite 1955-s805 -----------------
+
+BIOS Vendor:   TOSHIBA
+BIOS Version:  V1.00
+BIOS Release:  01/17/2003
+System Vendor: TOSHIBA
+Product Name:  Satellite 1955
+Version:       PS197U-000LEV
+Board Vendor:  TOSHIBA
+Board Name:    BTR80
+Board Version: Null
+
+---------------------------------------------
+Toshiba Satellite A70 -----------------------
+
+BIOS Vendor: TOSHIBA 
+BIOS Version: V1.50 
+BIOS Release: 11/16/2004 
+System Vendor: TOSHIBA 
+Product Name: Satellite A70 
+Version: PSA70C-KL100E 
+Serial Number: X4451615K 
+Board Vendor: TOSHIBA 
+Board Name: EDW10 
+Board Version: Null 
+
+---------------------------------------------
+Toshiba Satellite A80 -----------------------
+
+BIOS Vendor: TOSHIBA
+BIOS Version: V2.50
+BIOS Release: 01/11/2006
+System Vendor: TOSHIBA
+Product Name: Satellite A80
+Version: PSA80E-03T00JSP
+Board Vendor: TOSHIBA
+Board Name: Null
+
+---------------------------------------------
+Toshiba Satellite A105 ----------------------
+
+BIOS Vendor:   Phoenix Technologies LTD
+BIOS Version:  1.30
+BIOS Release:  02/09/2006
+System Vendor: TOSHIBA
+Product Name:  Satellite A105
+Version:       PSAA8U-02000U
+Board Vendor:  Intel Corporation
+Board Name:    Not Applicable
+
+---------------------------------------------
+Toshiba Satellite P10 -----------------------
+
+BIOS Vendor:   TOSHIBA
+BIOS Version:  V1.20
+BIOS Release:  09/12/2003
+System Vendor: TOSHIBA
+Product Name:  Satellite P10
+Version:       PSP10E-34FJR
+Board Vendor:  TOSHIBA
+Board Name:    DAL00
+Board Version: Null
+
+---------------------------------------------
+Toshiba Satellite P15 -----------------------
+
+BIOS Vendor:   TOSHIBA
+BIOS Version:  V1.20
+BIOS Release:  09/12/2003
+System Vendor: TOSHIBA
+Product Name:  Satellite P15
+Version:       PSP10U-0DUJPV
+Board Vendor:  TOSHIBA
+Board Name:    DAL00
+Board Version: Null
+
+---------------------------------------------
+Toshiba Satellite P25 -----------------------
+
+BIOS Vendor:   TOSHIBA
+BIOS Version:  V2.10
+BIOS Release:  12/27/2004
+System Vendor: TOSHIBA
+Product Name:  Satellite P25
+Version:       PSP20U-19PS8R
+Board Vendor:  TOSHIBA
+Board Name:    Null
+
+---------------------------------------------
+Toshiba Satellite P100 ----------------------
+
+BIOS Vendor:   TOSHIBA
+BIOS Version:  V3.30  
+BIOS Release:  12/22/2006
+System Vendor: TOSHIBA
+Product Name:  Satellite P100
+Version:       PSPA3E-02E013G3                   
+Board Vendor:  TOSHIBA
+Board Name:    Not Applicable                 
+
+---------------------------------------------
+Toshiba Satellite M40 -----------------------
+
+BIOS Vendor:   Phoenix Technologies LTD
+BIOS Version:  1.10
+BIOS Release:  08/24/05
+System Vendor: TOSHIBA
+Product Name:  Satellite M40
+Version:       PSM44E-00U00EFR
+Board Vendor:  ATI
+Board Name:    SB400
+Board Version: Rev0.4b
+
+---------------------------------------------
+Toshiba Satellite M45 (S355) ----------------
+
+BIOS Vendor:   TOSHIBA
+BIOS Version:  Version 2.00
+BIOS Release:  02/07/2006
+System Vendor: TOSHIBA
+Product Name:  Satellite M45
+Version:       PSM40U-073001
+Board Vendor:  TOSHIBA
+Board Name:    Version A0
+
+---------------------------------------------
+Toshiba Satellite M40X (-131)----------------
+
+BIOS Vendor:   TOSHIBA
+BIOS Version:  V1.60
+BIOS Release:  06/09/2005
+System Vendor: TOSHIBA
+Product Name:  Satellite M40X
+Version:       PSM4XE-01400GFR
+Board Vendor:  TOSHIBA
+Board Name:    EAL30
+Board Version: Null
+
+---------------------------------------------
+Toshiba Satellite M50------------------------
+
+BIOS Vendor: TOSHIBA
+BIOS Version: V2.10
+BIOS Release: 05/08/2006
+System Vendor: TOSHIBA
+Product Name: Satellite M50
+Version: PSM51E-01C011IT
+Board Vendor: TOSHIBA
+Board Name: Null
+
+---------------------------------------------
+Toshiba Satellite M60 -----------------------
+
+BIOS Vendor:   TOSHIBA
+BIOS Version:  V1.60
+BIOS Release:  03/16/2006
+System Vendor: TOSHIBA
+Product Name:  Satellite M60
+Version:       PSM60E-0CD01FIT
+Board Vendor:  TOSHIBA
+Board Name:    Null
+
+---------------------------------------------
+Toshiba Satellite M70 -----------------------
+
+BIOS Vendor:	TOSHIBA
+BIOS Version:	V1.10
+BIOS Release:	09/15/2005
+System Vendor:	TOSHIBA
+Product Name:	Satellite M70
+Version:	PSM71E-01100KFR
+Board Vendor:	TOSHIBA
+Board Name:	HTW00
+Board Version:	Null
+
+---------------------------------------------
+Toshiba Satellite A75 -----------------------
+
+IOS Vendor:    TOSHIBA
+BIOS Version:  V1.50
+BIOS Release:  11/16/2004
+System Vendor: TOSHIBA
+Product Name:  Satellite A75
+Version:       PSA70U-004004B
+Board Vendor:  TOSHIBA
+Board Name:    Null
+
+---------------------------------------------
+Toshiba Satellite M100 ----------------------
+
+BIOS Vendor:    TOSHIBA
+BIOS Version:   V1.90
+BIOS Release:   07/20/2006
+System Vendor:  TOSHIBA
+Product Name:   SATELLITE M100
+Version:        PSMA0E-030019TE
+Board Vendor:   TOSHIBA
+Board Name:     HAQAA
+Board Version:  Null
+
+---------------------------------------------
+Toshiba Satellite M100 ----------------------
+
+BIOS Vendor:   TOSHIBA
+BIOS Version:  V1.00
+BIOS Release:  03/30/2006
+System Vendor: TOSHIBA
+Product Name:  Satellite M100
+Version:       PSMA2U-00T00G
+Board Vendor:  TOSHIBA
+Board Name:    HAWAA
+Board Version: None
+
+---------------------------------------------
+Toshiba Satellite M115 ----------------------
+
+Bios vender: Phoenix Tech. LTD
+Bios version: 1.00
+Bios release: 08/31/2006
+System Vendor: Toshiba
+Product Name: Satellite M115
+Version: PSMBOU-015007
+Board vendor Intel
+Board name: N/a
+
+---------------------------------------------
+Toshiba Equium A110 -------------------------
+
+BIOS Vendor:   TOSHIBA
+BIOS Version:  V1.30
+BIOS Release:  07/20/2006
+System Vendor: TOSHIBA
+Product Name:  EQUIUM A110
+Version:       PSAB2E-002006AV
+Board Vendor:  TOSHIBA
+Board Name:    Null
+
+---------------------------------------------
+Toshiba Tecra A4 ----------------------------
+
+
+BIOS Vendor:   TOSHIBA
+BIOS Version:  Version 1.70
+BIOS Release:  10/14/2005
+System Vendor: TOSHIBA
+Product Name:  Tecra A4
+Version:       PTA40E-0UN00FSP
+Board Vendor:  TOSHIBA
+Board Name:    Version A0
+
+---------------------------------------------
+Toshiba Tecra A6 ----------------------------
+
+BIOS Vendor: TOSHIBA
+BIOS Version: V2.70
+BIOS Release: 04/26/2007
+System Vendor: TOSHIBA
+Product Name: TECRA A6
+Version: PTA60U-0FK00D
+Board Vendor: TOSHIBA
+Board Name: Null
+
+---------------------------------------------
+Toshiba Tecra S2 ----------------------------
+
+BIOS Vendor:   TOSHIBA
+BIOS Version:  V2.50
+BIOS Release:  01/11/2006
+System Vendor: TOSHIBA
+Product Name:  Tecra S2
+Version:       PTS20E-1FE04Q8M
+Board Vendor:  TOSHIBA
+Board Name:    Null
+
+---------------------------------------------
+Compal ACL00 --------------------------------
+
+BIOS Vendor:   COMPAL
+BIOS Version:  V2.10C
+BIOS Release:  03/25/02
+System Vendor: COMPAL
+Product Name:  *
+Version:       *
+Board Vendor:  Null
+Board Name:    ACL00
+Board Version: Null
+
+---------------------------------------------
+Compal ACL10 --------------------------------
+
+BIOS Vendor:   COMPAL
+BIOS Version:  V1.10
+BIOS Release:  04/12/2001
+System Vendor: *
+Product Name:  *
+Version:       *
+Board Vendor:  COMPAL
+Board Name:    ACL10
+Board Version: Null
+
+---------------------------------------------
+HP Pavilion ZT1195 --------------------------
+
+BIOS Vendor:   Insyde Software
+BIOS Version:  IC.M1.00
+BIOS Release:  03/20/2002
+System Vendor: Hewlett-Packard
+Product Name:  HP Pavilion Notebook PC
+Version:       HP Pavilion Notebook
+Board Vendor:  Hewlett-Packard
+Board Name:    HP Pavilion Notebook PC
+Board Version: HP Pavilion Notebook
+
+---------------------------------------------
+HP Pavilion ZT1141 --------------------------
+
+BIOS Vendor:   Insyde Software
+BIOS Version:  IB.M1.05
+BIOS Release:  02/28/2002
+System Vendor: Hewlett-Packard
+Product Name:  HP Pavilion Notebook PC
+Version:       HP Pavilion Notebook ZT1000
+Board Vendor:  Hewlett-Packard
+Board Name:    HP Pavilion Notebook PC
+Board Version: HP Pavilion Notebook ZT1000
+
+---------------------------------------------
+HP OmniBook 6100 EB -------------------------
+
+BIOS Vendor:   Phoenix Technologies Ltd.
+BIOS Version:  EB.M2.20
+BIOS Release:  02/27/02
+System Vendor: Hewlett-Packard
+Product Name:  HP OmniBook PC
+Version:       HP OmniBook 6100 EB
+Board Vendor:  Hewlett-Packard
+Board Name:    HP OmniBook PC
+Board Version: 6100EB
+
+---------------------------------------------
+HP OmniBook 6000 EA -------------------------
+
+BIOS Vendor:   Phoenix Technologies Ltd.
+BIOS Version:  EA.M1.81
+BIOS Release:  02/22/2002
+System Vendor: Hewlett-Packard
+Product Name:  HP OmniBook PC
+Version:       HP OmniBook 6000 EA
+Board Vendor:  Hewlett-Packard
+Board Name:    HP OmniBook PC
+Board Version: 6000EA
+
+---------------------------------------------
+HP OmniBook xe4500 --------------------------
+
+BIOS Vendor:   Phoenix Technologies Ltd.
+BIOS Version:  KB.M1.30
+BIOS Release:  08/05/20022
+System Vendor: Hewlett-Packard.
+Product Name:  HP OmniBook PC
+Version:       HP OmniBook xe4500
+Board Vendor:  Hewlett-Packard
+Board Name:    HP OmniBook PC
+Board Version: xe4500
+
+---------------------------------------------
+HP Pavilion N5441 ---------------------------
+
+BIOS Vendor:   Phoenix Technologies LTD
+BIOS Version:  GD.M1.08
+BIOS Release:  09/27/2001
+System Vendor: Hewlett-Packard
+Product Name:  HP Pavilion Notebook PC
+Version:       HP Pavilion Notebook Model GD
+Board Vendor:  Hewlett-Packard
+Board Name:    N/A
+Board Version: OmniBook N32N-736
+
+---------------------------------------------
+HP Pavilion N5430 ---------------------------
+
+BIOS Vendor:   Phoenix Technologies LTD
+BIOS Version:  GD.M1.08
+BIOS Release:  09/27/2001
+System Vendor: Hewlett-Packard
+Product Name:  HP OmniBook PC
+Version:       HP OmniBook XE3 GD
+Board Vendor:  Hewlett-Packard
+Board Name:    N/A
+Board Version: OmniBook N32N-736
+
+---------------------------------------------
+HP Pavilion N5415 ---------------------------
+
+BIOS Vendor:   Phoenix Technologies LTD
+BIOS Version:  GE.M1.04
+BIOS Release:  07/30/2002
+System Vendor: Hewlett-Packard
+Product Name:  HP OmniBook PC
+Version:       HP OmniBook XE3 GE
+Board Vendor:  Hewlett-Packard
+Board Name:    N/A
+Board Version: OmniBook N32N-736
+
+---------------------------------------------
+HP Pavilion N5290 ---------------------------
+
+BIOS Vendor:   Phoenix Technologies LTD
+BIOS Version:  GC.M1.63
+BIOS Release:  01/01/1992
+System Vendor: Hewlett-Packard
+Product Name:  HP Pavilion Notebook PC
+Version:       HP Pavilion Notebook XE3 GC
+Board Vendor:  Hewlett-Packard
+Board Name:    N/A
+Board Version: OmniBook N32N-733
+
+---------------------------------------------
+HP OmniBook vt6200 -------------------------
+
+BIOS Vendor:   Phoenix Technologies Ltd.
+BIOS Version:  EG.M2.10
+BIOS Release:  09/19/02
+System Vendor: Hewlett-Packard
+Product Name:  HP OmniBook PC
+Version:       HP OmniBook 6200 EG
+Board Vendor:  Hewlett-Packard
+Board Name:    HP OmniBook PC
+Board Version: 6200EG
+
+---------------------------------------------
+HP OmniBook 4150 ----------------------------
+
+BIOS Vendor:   Phoenix Technologies LTD
+BIOS Version:  CI.M2.250
+BIOS Release:  06/10/99
+System Vendor: Hewlett-Packard
+Product Name:  HP OmniBook PC
+Version:       HP OmniBook 4150
+Board Vendor:  Hewlett-Packard
+Board Name:    N/A
+Board Version: OmniBook TS32T2
+
+---------------------------------------------
+HP OmniBook xt6200 --------------------------
+
+BIOS Vendor:   Phoenix Technologies Ltd
+BIOS Version:  EG.M2.10
+BIOS Release:  09/19/02
+System Vendor: Hewlett-Packard
+Product Name:  HP OmniBook PC
+Version:       HP OmniBook 6200 EG
+Board Vendor:  Hewlett-Packard
+Board Name:    HP OmniBook PC
+Board Version: 6200EG
+
+---------------------------------------------
+HP Pavilion ze4125 --------------------------
+
+BIOS Vendor:   Phoenix Technologies Ltd
+BIOS Version:  KA.M1.20
+BIOS Release:  09/13/2002
+System Vendor: Hewlett-Packard
+Product Name:  HP NoteBook PC
+Version:       HP NoteBook ze4000
+Board Vendor:  Hewlett-Packard
+Board Name:    HP NoteBook PC
+Board Version: HP NoteBook ze4000
+
+---------------------------------------------
+HP OmniBook xt155 ---------------------------
+
+BIOS Vendor:   Phoenix Technologies Ltd.
+BIOS Version:  KE.M1.40
+BIOS Release:  10/11/20022
+System Vendor: Hewlett-Packard
+Product Name:  HP NoteBook PC
+Version:       HP Notebook PC
+Board Vendor:  Hewlett-Packard
+Board Name:    HP NoteBook PC
+Board Version: HP Notebook PC
+
+---------------------------------------------
+HP OmniBook xe4100 --------------------------
+
+BIOS Vendor:   Phoenix Technologies Ltd.
+BIOS Version:  KC.M1.10
+BIOS Release:  07/11/2002
+System Vendor: Hewlett-Packard
+Product Name:  HP OmniBook PC
+Version:       HP OmniBook xe4000
+Board Vendor:  Hewlett-Packard
+Board Name:    HP OmniBook PC
+Board Version: 4000KC
+
+---------------------------------------------
+HP Omnibook xe4400 --------------------------
+
+BIOS Vendor:   Phoenix Technologies Ltd.
+BIOS Version:  KD.M1.60
+BIOS Release:  09/19/20022
+System Vendor: Hewlett-Packard
+Product Name:  HP OmniBook PC
+Version:       HP Omnibook xe4400
+Board Vendor:  Hewlett-Packard
+Board Name:    HP OmniBook PC
+Board Version: xe4400
+
+---------------------------------------------
+HP Pavilion ze4100 --------------------------
+
+BIOS Vendor:   Phoenix Technologies Ltd.
+BIOS Version:  KE.M1.40
+BIOS Release:  10/11/20022
+System Vendor: Hewlett-Packard
+Product Name:  HP NoteBook PC         
+Version:       HP Notebook PC
+Board Vendor:  Hewlett-Packard
+Board Name:    HP NoteBook PC         
+Board Version: HP Notebook PC
+
+---------------------------------------------
+Acer Aspire 1350 ----------------------------
+BIOS Vendor:   Acer   
+BIOS Version:  3A24
+BIOS Release:  12/01/2003
+System Vendor: Acer,Inc.
+Product Name:  Aspire 1350
+Version:       3A24
+Board Vendor:  Acer,Inc.
+Board Name:    Aspire 1350
+Board Version: Rev.A
+
+---------------------------------------------
+Acer Aspire 1406 LC -------------------------
+
+BIOS Vendor:   Acer
+BIOS Version:  V2.30
+BIOS Release:  10/04/02
+System Vendor: Acer
+Product Name:  Aspire 1400 series
+Version:       *
+Board Vendor:  Null
+Board Name:    BR20
+Board Version: Null
+
+---------------------------------------------
+HP Pavilion ze4200 --------------------------
+
+BIOS Vendor:   Phoenix Technologies Ltd.
+BIOS Version:  KE.M1.53
+BIOS Release:  12/10/20022
+System Vendor: Hewlett-Packard
+Product Name:  Pavilion ze4200
+Version:       KE.M1.53
+Board Vendor:  Hewlett-Packard
+Board Name:    002A
+Board Version: NS570 Version PQ1A74
+
+---------------------------------------------
+HP Pavilion ze4500 --------------------------
+
+BIOS Vendor:   Phoenix Technologies Ltd.
+BIOS Version:  KAM1.57  
+BIOS Release:  02/19/2004
+System Vendor: Hewlett-Packard          
+Product Name:  Pavilion ze4500 (DP793E) 
+Version:       KAM1.57  
+Board Vendor:  Hewlett-Packard          
+Board Name:    PQ1A83
+
+---------------------------------------------
+HP Pavilion ZU1175 --------------------------
+
+BIOS Vendor:   Phoenix Technologies Ltd.
+BIOS Version:  FA.M2.60
+BIOS Release:  11/30/1999
+System Vendor: Hewlett-Packard
+Product Name:  HP Pavilion Notebook PC
+Version:       HP Pavilion ZU1000 FA
+Board Vendor:  Hewlett-Packard
+Board Name:    HP Pavilion Notebook PC
+Board Version: 1000FA
+
+---------------------------------------------
+HP Pavilion XH545 ---------------------------
+
+BIOS Vendor:   Phoenix Technologies LTD
+BIOS Version:  GE.M1.03
+BIOS Release:  11/08/2001
+System Vendor: Hewlett-Packard
+Product Name:  HP Pavilion Notebook PC
+Version:       HP Pavilion Notebook Model GE
+Board Vendor:  Hewlett-Packard
+Board Name:    N/A
+Board Version: OmniBook N32N-736
+
+---------------------------------------------
+Toshiba Satellite 2430-402 ------------------
+
+BIOS Vendor:   TOSHIBA
+BIOS Version:  V1.30
+BIOS Release:  01/16/2003
+System Vendor: TOSHIBA
+Product Name:  Satellite 2430
+Version:       PS243E-06P4S-4V
+Board Vendor:  TOSHIBA
+Board Name:    BTS88
+Board Version: Null
+
+---------------------------------------------
+HP OmniBook 900 B ---------------------------
+
+BIOS Vendor:   Phoenix Technologies LTD
+BIOS Version:  CL.M3.13
+BIOS Release:  11/11/99
+System Vendor: Hewlett-Packard
+Product Name:  HP OmniBook PC
+Version:       HP OmniBook 900 B
+Board Vendor:  Hewlett-Packard
+Board Name:    N/A
+Board Version: OmniBook TS32U2
+
+---------------------------------------------
+HP Compaq nx9000 ----------------------------
+
+BIOS Vendor:   Phoenix Technologies Ltd.
+BIOS Version:  KE_KG.M1.06
+BIOS Release:  05/16/2003
+System Vendor: Hewlett-Packard        
+Product Name:  HP nx9000 (DG223T)       
+Version:       KG.M1.06
+Board Vendor:  Hewlett-Packard        
+Board Name:    002A                   
+Board Version: NS570 Version PQ1A78   
+
+---------------------------------------------
+HP Compaq nx9000 ----------------------------
+
+BIOS Vendor:   Phoenix Technologies Ltd.
+BIOS Version:  KE_KG.M1.15
+BIOS Release:  12/19/2003
+System Vendor: Hewlett-Packard
+Product Name:  HP Notebook PC
+Version:       HP Notebook PC
+Board Vendor:  <NULL>
+Board Name:    <NULL>
+Board Version: <NULL>
+
+---------------------------------------------
+HP Compaq nx9005 ----------------------------
+
+BIOS Vendor:   Phoenix Technologies Ltd.
+BIOS Version:  KAM1.46
+BIOS Release:  07/21/200392
+System Vendor: Hewlett-Packard
+Product Name:  HP nx9005 (DJ163A)
+Version:       KAM1.46
+Board Vendor:  Hewlett-Packard
+Board Name:    0024
+Board Version: PQ1A78
+
+----------------------------------------------
+HP Compaq nx9010 -----------------------------
+
+BIOS Vendor:   Phoenix Technologies Ltd.
+BIOS Version:  KF_KH.F.08
+BIOS Release:  06/06/2003
+System Vendor: Hewlett-Packard
+Product Name:  HP nx9010 (DJ123A)
+Version:       KH.F.08
+Board Vendor:  Hewlett-Packard
+Board Name:    0850
+Board Version: NS570 Version PQ1B56
+
+----------------------------------------------
+HP Pavilion ze8500 --------------------------
+
+BIOS Vendor:   Phoenix Technologies Ltd.
+BIOS Version:  KF_KH.F.18
+BIOS Release:  11/13/2003
+System Vendor: Hewlett-Packard
+Product Name:  Pavilion ze8500 (DJ317A)
+Version:       KH.F.18
+Board Vendor:  Hewlett-Packard
+Board Name:    0850
+Board Version: NS570 Version PQ1B60
+
+---------------------------------------------
+Fujitsu-Siemens Amilo D ---------------------
+
+BIOS Vendor:   Phoenix
+BIOS Version:  V1.20
+BIOS Release:  11/14/2001
+System Vendor: FUJITSU SIEMENS
+Product Name:  Amilo D-Series
+Version:       DESKTOP CPU ONLY
+Board Vendor:  CY23
+Board Name:    8606-686B
+Board Version: None
+
+---------------------------------------------
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/misc/README.mmkeys
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/misc/README.mmkeys
@@ -0,0 +1,9 @@
+This patch maps some extra Fn+key combinations to keycodes for multimedia
+keyboards and only works for the nbsmi-backend. It might be useful if you
+want to control some mediaplayer while working with other applications.
+
+Following combinations are mapped:
+Fn+Y => Previous song
+Fn+X => Play/pause
+Fn+V => Stop CD
+Fn+B => Next song
\ No newline at end of file
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/misc/hotkeys/ob5xx.def
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/misc/hotkeys/ob5xx.def
@@ -0,0 +1,30 @@
+<?xml version="1.0"?>
+<definition>
+	<config model="HP OmniBook 5xx">
+
+	<!--
+		Multimedia keys are disabled by default on HP OmniBook
+		laptops. For enabling them see the project at URL
+		http://sourceforge.net/projects/omke
+	-->
+
+		<Shell		keycode="244"/>
+		<Help		keycode="243"/>
+
+		<!-- Keys below available on the docking station only -->
+
+		<PrevTrack	keycode="144"/>
+		<Play		keycode="162"/>
+		<Stop		keycode="164"/>
+		<NextTrack	keycode="153"/>
+
+		<VolUp		keycode="176" adj="1"/>
+		<VolDown	keycode="174" adj="1"/>
+
+	</config>
+
+	<contributor>
+		<name>Soos, Peter</name>
+		<email>sp@osb.hu</email>
+	</contributor>
+</definition>
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/misc/hotkeys/xt155.def
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/misc/hotkeys/xt155.def
@@ -0,0 +1,23 @@
+<?xml version="1.0"?>
+<definition>
+	<config model="HP OmniBook xt155">
+
+	<!--
+		Multimedia keys are disabled by default on HP OmniBook
+		laptops. For enabling them see the project at URL
+		http://sourceforge.net/projects/omke
+	-->
+
+		<Email		keycode="236"/>
+		<WebBrowser	keycode="178"/>
+		<Shell		keycode="243"/>
+		<ScreenSaver	keycode="241"/>
+		<Help		keycode="240"/>
+
+	</config>
+
+	<contributor>
+		<name>Soos, Peter</name>
+		<email>sp@osb.hu</email>
+	</contributor>
+</definition>
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/misc/hotkeys/README.hotkeys
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/misc/hotkeys/README.hotkeys
@@ -0,0 +1,22 @@
+HotKeys is a program to use the special keys on internet/multimedia
+keyboards.
+
+The HotKeys daemon listens for the "special" hotkeys that you won't
+normally use on your Internet/Multimedia keyboards. The buttons
+perform their intended behaviors, such as volume up and down, mute the
+speaker, or launch applications.  It has On-screen display (OSD) to
+show the volume, program that's being started, etc.  It features an
+XML-based keycode configuration file format, which makes it possible
+to define the hotkeys to launch any programs you want.
+
+You may reach it at http://ypwong.org/hotkeys/
+
+Files in this directory provide examles for hotkeys definition files
+for certain laptop models supported by omnibook module:
+
+ob5xx.def:	HP OmniBook 5xx
+xe3gc.def:	HP OmniBook XE3 GC, GD, GE and HP Pavilion N5xxx
+xe3gf.def:	HP OmniBook XE3 GF
+xe4xxx.def:	HP OmniBook xe4xxx and ze4xxx
+xt155.def:	HP OmniBook xt155
+nx9xxx.def:	HP/Compaq nx9xxx
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/misc/hotkeys/xe3gf.def
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/misc/hotkeys/xe3gf.def
@@ -0,0 +1,32 @@
+<?xml version="1.0"?>
+<definition>
+	<config model="HP OmniBook XE3 GF">
+
+	<!--
+		Multimedia keys are disabled by default on HP OmniBook
+		laptops. For enabling them see the project at URL
+		http://sourceforge.net/projects/omke
+	-->
+
+		<PrevTrack	keycode="144"/>
+		<Play		keycode="162"/>
+		<Stop		keycode="164"/>
+		<NextTrack	keycode="153"/>
+
+		<VolUp		keycode="176" adj="1"/>
+		<VolDown	keycode="174" adj="1"/>
+
+		<Email		keycode="236"/>
+		<WebBrowser	keycode="178"/>
+		<Shell		keycode="244"/>
+		<Help		keycode="243"/>
+
+		<userdef keycode="160" command="aumix -vM">Sound muted</userdef>
+
+	</config>
+
+	<contributor>
+		<name>Soos, Peter</name>
+		<email>sp@osb.hu</email>
+	</contributor>
+</definition>
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/misc/hotkeys/xe4xxx.def
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/misc/hotkeys/xe4xxx.def
@@ -0,0 +1,28 @@
+<?xml version="1.0"?>
+<definition>
+	<config model="HP OmniBook xe4xxx and ze4xxx">
+
+	<!--
+		Multimedia keys are disabled by default on HP OmniBook
+		laptops. For enabling them see the project at URL
+		http://sourceforge.net/projects/omke
+	-->
+
+		<Email		keycode="236"/>
+		<WebBrowser	keycode="178"/>
+		<Shell		keycode="243"/>
+		<ScreenSaver	keycode="241"/>
+		<Help		keycode="240"/>
+
+		<VolUp		keycode="176" adj="1"/>
+		<VolDown	keycode="174" adj="1"/>
+
+		<userdef keycode="160" command="aumix -vM">Sound muted</userdef>
+
+	</config>
+
+	<contributor>
+		<name>Soos, Peter</name>
+		<email>sp@osb.hu</email>
+	</contributor>
+</definition>
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/misc/hotkeys/xe3gc.def
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/misc/hotkeys/xe3gc.def
@@ -0,0 +1,32 @@
+<?xml version="1.0"?>
+<definition>
+	<config model="HP OmniBook XE3 GC, GD, GE and HP Pavilion N5xxx">
+
+	<!--
+		Multimedia keys are disabled by default on HP OmniBook
+		laptops. For enabling them see the project at URL
+		http://sourceforge.net/projects/omke
+	-->
+
+		<PrevTrack	keycode="144"/>
+		<Play		keycode="162"/>
+		<Stop		keycode="164"/>
+		<NextTrack	keycode="153"/>
+
+		<VolUp		keycode="176" adj="1"/>
+		<VolDown	keycode="174" adj="1"/>
+
+		<WebBrowser	keycode="243"/>
+		<Email		keycode="244"/>
+		<Shell		keycode="242"/>
+		<Help		keycode="241"/>
+
+		<userdef keycode="160" command="aumix -vM">Sound muted</userdef>
+
+	</config>
+
+	<contributor>
+		<name>Soos, Peter</name>
+		<email>sp@osb.hu</email>
+	</contributor>
+</definition>
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/misc/hotkeys/nx9xxx.def
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/misc/hotkeys/nx9xxx.def
@@ -0,0 +1,28 @@
+<?xml version="1.0"?>
+<definition>
+	<config model="HP/Compaq nx9xxx laptops">
+
+	<!--
+		Multimedia keys are disabled by default on HP laptops.
+		For enabling them see the project at URL
+		http://sourceforge.net/projects/omke
+	-->
+
+		<Email		keycode="236"/>
+		<WebBrowser	keycode="178"/>
+		<Shell		keycode="243"/>
+		<ScreenSaver	keycode="241"/>
+		<Help		keycode="240"/>
+
+		<VolUp		keycode="176" adj="1"/>
+		<VolDown	keycode="174" adj="1"/>
+
+		<userdef keycode="160" command="aumix -vM">Sound muted</userdef>
+
+	</config>
+
+	<contributor>
+		<name>Soos, Peter</name>
+		<email>sp@osb.hu</email>
+	</contributor>
+</definition>
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/doc/ChangeLog
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/doc/ChangeLog
@@ -0,0 +1,521 @@
+Changelog file for omnibook package:
+------------------------------------
+
+2.XXXXXXXX Mathieu Bérard <math_b@users.sourceforge.net>
+* DMI signature added:
+	Toshiba Satellite P25 (ectype 11)
+	Toshiba Satellite M60 (ectype 12)
+* Applied patch from Danny Kukawka <dkukawka@suse.de> to
+  fix compiler warning about use uninitialized variable
+* Applied patch from Danny Kukawka <dkukawka@suse.de> to
+  fix build the driver on older kernel versions
+* Applied patches from Azael Avalos <coproscefalo@gmail.com>
+  to add support to Satellite X205 and other laptops based on
+  ICH8
+* Fix build with kernel >= 2.6.30
+
+2.20070211 Mathieu Bérard <math_b@users.sourceforge.net>
+* Disable Acer support, acerhk module should provided better
+  support with a far more complete autodetection database
+  (see http://www2.informatik.hu-berlin.de/~tauber/acerhk/)
+* Fix and improve bluetooth handling for TSM30X class laptops
+  bluetooth now also works for TSA105
+* Implement Volume down,up and Mute buttons polling for ectype 2
+   It was the last missing part from the "omke" module which never
+   got ported to linux 2.6
+* Implement ectype 13 Fn hotkeys handling.
+* DMI signature added:
+	HP Pavilion ze4500 (ectype 7)
+	Toshiba Satellite 1130 (ectype 1)
+	Toshiba Satellite A75 (ectype 12)
+	Toshiba Tecra A4 (ectype 13)
+	Toshiba Satellite A80 (ectype 12)
+	Toshiba Satellite P100 (ectype 14)
+* Split TSM30X (ectype 12) : this ectype was reimplemented and if the
+  new implementation works with Toshiba M40X, M70, M100... it does not
+  (and will never, due to hardware) with Toshiba M30X, the only way
+  to fix this is to split TSM30X (ectype 12) in :
+  -TSM70 (ectype 12) => new implementation (compal.c & acpi.c backends)
+  -TSM30X (ectype 15) => old implementation (legacy backends)
+  This is done by renaming TSM30X to TSM40 and restore old TSM30X
+  The state of the Toshiba M35X is unknown and is assigned to TSM70, one
+  should send a bug report if that fail.
+  Fix bugs 1617818 and 1605278
+* New features for TSM70 class laptops:
+  -Cooling method control (can tune fan behaviour to 'Save power' or
+   to 'Maximize performance') provided in /proc/omnibook/cooling 
+  -CPU Throttling status&control (also known as ACPI T-States) should
+   be supported out of the box via /proc/acpi/processor/CPU0/throttling
+   but at least Toshiba Satellite M70 as a deficient ACPI FADT table
+   which prevent than, thus a custom access to ACPI Throttling is 
+   provided in /proc/omnibook/throttling
+
+2.20060921 Mathieu Bérard <math_b@users.sourceforge.net>
+* The minimal required kernel version is now 2.6.9 (kref API)
+* Convert semaphore to mutex with fallback for pre 2.6.16 kernel
+* Kill CONFIG_OMNIBOOK_APMEMU and introduce OMNIBOOK_LEGACY:
+  pre-ACPI features now depends on it.
+  Default enabling of ac and battery features also
+  depends on it. It is _disabled_ by default.
+* Introduce ACPI methods execution backend: TSM70 needs it
+  for Display and Wifi/Bluetooth features
+* Expand display and hotkeys features
+* Introduce experimental NbSmi backend for TSM40. It is
+  based on technical documentation provided by Toshiba.
+  Thanks Toshiba !
+* Kill unused omnibook_mem_read/write function for mmio
+  access
+* Cleanup in blank.c fan.c temperature.c
+* Unbreak Pio backend: use request/release_region
+* Introduce bluetooth and wifi frontend features : they allow
+  adapter state querry and control (existence probing, wifi
+  kill switch probing and adapter enabling/disabling).
+  Supported by TSM30X and TSM40
+* Introduce omnibook_backend struct as a uniform way of 
+  communication between backend and frontend, this
+  kill omnibook_io_{read/write} and friends.
+* Modify ombibook_feature struct to incorporate pointers
+  to an omnibook_table table and to a omnibook_operation
+  struct which is picked-up from the ectype matching
+  omnibook_table entry upon feature initialization
+* Add muteled resume handler
+* Add touchpad handling for TSM30X
+* Add proper display handling for TSM30X
+* Change all features struct name from foo_feature to
+  foo_driver to kept modpost section mismatch detection
+  silent. Put tbl, init and exit entries to their relevant
+  sections.
+* Many bugfix and dock support for TSM40 by Holger Nelson.
+* Add DMI Signature for Toshiba Satellite 1700-Series, with ectype 10.
+  LCD does not work.
+* Add DMI Signature for Toshiba Equium A110, added with
+  ectype 1, until implementation of a better backend
+* Add DMI Signature for Toshiba _Satellite_ M100, Satellite A70 
+  and Tecra S2. added with ectype 12
+* Add DMI Signature for Toshiba Tecra S1, added with
+  ectype 13
+
+2.200608017 Mathieu Bérard <math_b@users.sourceforge.net>
+* Fix bug un omnibook_io_match
+* Fix DMI handling behaviour: we stop on the FIRST matched
+  DMI entry. This is restoring pre-20060806 behaviour.
+  Invert M40 vs. M40X entry position.
+
+2.20060816 Mathieu Bérard <math_b@users.sourceforge.net>
+* Merge from the new-backend branch: Add new backend code 
+  (in compal.c) used with TSM30X class laptops:
+  Used for lcd access
+  Used for hotkeys support: now most Fn+key generate a scancode,
+  as well as the wifi kill switch.
+  Warning: tested only on TSM40X an TSM70 laptops.
+* Create omnibook_io_operation struct and omnibook_io_{read/write}
+  funtions to simplify implementation of some simple features.
+  Used with ac display dock and led features.
+* Rename onetouch feature to "hotkeys" which is a vendor neutral name.
+* The minimal required kernel version is now 2.6.9 (kref API)
+* Convert semaphore to mutex with fallback for pre 2.6.16 kernel
+* Kill CONFIG_OMNIBOOK_APMEMU and introduce OMNIBOOK_LEGACY:
+  pre-ACPI features now depends on it.
+  Default enabling of ac and battery features also
+  depends on it. It is _disabled_ by default.
+* Introduce ACPI methods execution backend: TSM70 needs it
+  for Display and Wifi/Bluetooth features
+* Expand display and hotkeys features
+* Introduce experimental NbSmi backend for TSM40. It is
+  based on technical documentation provided by Toshiba.
+  Thanks Toshiba !
+* Kill unused omnibook_mem_read/write function for mmio
+  access
+* Cleanup in blank.c fan.c temperature.c
+* Unbreak Pio backend: use request/release_region
+* Introduce bluetooth and wifi frontend features : they allow
+  adapter state querry and control (existence probing, wifi 
+  kill switch probing and adapter enabling/disabling).
+  Supported by TSM30X and TSM40
+* Introduce omnibook_backend struct as a uniform way of 
+  communication between backend and frontend, this
+  kill omnibook_io_{read/write} and friends.
+* Modify ombibook_feature struct to incorporate pointers
+  to an omnibook_table table and to a omnibook_operation
+  struct which is picked-up from the ectype matching
+  omnibook_table entry upon feature initialization
+* Add muteled resume handler
+* Add touchpad handling for TSM30X
+* Add proper display handling for TSM30X
+* Change all features struct name from foo_feature to
+  foo_driver to kept modpost section mismatch detection
+  silent. Put tbl, init and exit entries to their relevant
+  sections.
+
+2.20060809 Mathieu Bérard <math_b@users.sourceforge.net>
+* Add dmi info for Toshiba Satellite M40X (Thanks Julien Valroff) 
+* Fix two brown paper bag bugs in Debian/Ubuntu support 
+
+2.20060806 Mathieu Bérard <math_b@users.sourceforge.net>
+* Make the module linux 2.6 only
+  Kernel versions from 2.6.8 to a least 2.6.17 are supported
+  Code for compatibility with kernels older than 2.6.17 is 
+  mostly implemented in compat.h
+* Integrate with Driver Model:
+  register as a platform device and optional
+  registration as a backlight device (2.6.17+ required here)
+* Get rid of deprecated pm_legacy functions
+* Use kernel-provided DMI information:
+  Use kernel-provided dmi_check_system for system identification
+  omnibook_tc_t and omnibook_models_t are merged and converted into a
+  dmi_system_id struct and moved from init.c to laptop.h
+* MODULE_PARAM -> 2.6-style module_parm_*
+* Move some code from "feature".c files back to init.c
+  Interface is provided by the new omnibook_feature struct
+  Enabled features are now in placed in a linked list
+  This eliminate util.c
+  Rationale: Reduce code duplication and create a standard template for features
+* Move dmi and version display into their own file: info.c
+* Remove all (as unneeded) EXPORT_SYMBOL
+* Misc fixes in Makefile
+  Also make more use of Kbuild
+* Use sscanf and simple_stro{u}l for strings parsing instead of custom code
+* Run lindent for better conformance with kernel coding style
+* Add very limited support for some Toshiba M40 (more info needed)
+* Use bitmasks for EC types matching, this change is transparent for the user
+  (e.g. one can still use ectype=num module parameter)
+  Rationale: Reduce the size of the omnibook_feature struct
+* Polish Debian support: Use module-assistant and fix all Lintian warning
+  Fix building against non-running kernel (Thanks to Daniel Gimpelevich)
+* Update documentation and omnibook-integration.patch
+* Fix spinlock usage: they can be used unconditionally as they are automatically
+  optimized out at build-time on UP. This should improve PREEMPT safety
+* Spinlock protect omnibook_mem_* and use ioread8 and iowrite8
+* Fix: Custom EC access function are also used if ACPI is compiled but disabled
+* Cleanup: remove lots of unneeded #ifdef
+* Add a new feature for testers: dump
+  Dump was stolen from the ibm_acpi driver
+  It is disabled by default
+* Bump version to 2.YYYYMMDD
+
+2006-05-15 Thomas Perl <thp@perli.net>
+* Added support for xe4500's "audio mute" led
+
+2006-01-26 Soós Péter <sp@osb.hu>
+* Added support for kernels >= 2.6.15 (pm_legacy.h)
+* Added Toshiba Satellite M30X
+* Added support for Toshiba Satellite M70
+* Added support for HP Pavilion ze4300 series
+* Fixed module unloading on 2.6 series kernels (thanks to
+  math_b@users.sourceforge.net)
+* Changed version number to +%Y%m%d format
+* Added Debian support
+
+2005-02-17 Soós Péter <sp@osb.hu> 
+* Fixed Makefile
+* Updated Toshiba 1115 information
+
+2004-12-15 Scott Barnes <reeve@users.sourceforge.net>
+* Added Toshiba Satellite M35X
+
+2004-09-16 Soós Péter <sp@osb.hu>
+* Added INSTALL-2.6 file
+* Little spelling fixes in documentation
+* Little bugfixes
+* Added Compal ACL10
+
+2004-07-01 Soós Péter <sp@osb.hu>
+* Added new technology codes
+* Added some new HP nx9000 detection string
+* Added Toshiba Satellite P20
+
+2004-06-07 Chris Green <cmg@dok.org>
+* Added Toshiba Satellite P15
+
+2004-06-01 Soós Péter <sp@osb.hu>
+* Added Toshiba Satellite 1955
+* Added Toshiba Satellite 2435
+* Added Toshiba Satellite P10 (new ectype)
+* Acer Aspire 1350
+
+2004-01-23 Soós Péter <sp@osb.hu>
+* Added HP Pavilion ze8500 (HP nx9010)
+* fixed PM handler for OneTouch keys and touchpad
+
+2004-01-20 Soós Péter <sp@osb.hu>
+* Only fan status supported on HP OmniBook 4150, XE2 and
+  Fujitsu-Siemens Amilo D, fan control is unsupported
+* #include fixes in ec.c
+
+2004-01-16 Soós Péter <sp@osb.hu>
+* Added fan support for Fujitsu-Siemens Amilo D series laptops
+
+2004-01-14 Soós Péter <sp@osb.hu>
+* Fixed Makefile for kernels 2.6
+* Added Fujitsu-Siemens Amilo D series laptops (new ectype)
+
+2003-12-08 Soós Péter <sp@osb.hu>
+
+* Fixed tecnology code detection
+* Added HP/Compaq nx9005
+* Fixed Makefile for kernel 2.4
+
+2003-11-12 Soós Péter <sp@osb.hu>
+
+* Fixed KERNEL_WARNING in init.c
+
+2003-11-10 Soós Péter <sp@osb.hu>
+
+* Fixed timeout bugs in ec.c
+* Fixed touchpad dependency code for kernel 2.6
+* Added Compaq nx9000
+
+2003-11-10 Mark Chappell <mark@nslm.fsnet.co.uk>
+
+* Added kernel 2.6 support to Makefile
+
+2003-10-23 Soós Péter <sp@osb.hu>
+
+* Totally removed key polling code for kernels >= 2.5.0 but 2.5/2.6 kernels
+  is unsuported yet
+* proc_battery is static
+* Added HP OmniBook 900 B support
+* Added HP OmniBook XE2 support (added new ectype value for it)
+* Added Compaq nx9010
+* Reversed ChangeLog
+* Some documentation changes
+
+2003-08-28 Soós Péter <sp@osb.hu>
+
+* Added Toshiba Satellite 2430
+* Documentation enhancements
+
+2003-04-03 Soós Péter <sp@osb.hu>
+
+* Really fixed __init bug in user parameter code
+* Fixed omnibook_dmi_ident (it was static)
+
+2003-03-31 Soós Péter <sp@osb.hu>
+
+* Fixed HP technology code detection
+* Key polling is disabled by default on XE3GC style machines
+* Fixed PM code in polling.c
+* Added util.c
+* Fixed __init bug in user parameter code
+* Cleaned up ec.h
+* Added Toshiba Satellite 1950 detection
+* Documentation enhancements
+
+2003-03-13 Soós Péter <sp@osb.hu>
+
+* Added HP Pavilion ZU1155 and ZU1175 detection
+
+2003-03-11 Soós Péter <sp@osb.hu>
+
+* Fixed bogus version information
+
+2003-03-06 Ducrot Bruno <ducrot@poupinou.org>
+
+* Fan off hack for XE3GF style machines
+
+2003-03-04 Ducrot Bruno <ducrot@poupinou.org>
+
+* Fixed spinlock problem
+
+2003-02-28 Soós Péter <sp@osb.hu>
+
+* Added /proc/omnibook/version
+* Added OMNIBOOK_ prefix to MODULE_NAME and MODULE_VERSION definitions
+* Fixed bugs in lcd.c (thanks to Bernhard Kaindl <bernhard.kaindl@gmx.de>)
+* Some code tuning and cosmetic changes
+* Fixed OmniBook 4150 support
+
+2003-02-26 Soós Péter <sp@osb.hu>
+
+* Fixed kernel Oops in technology code identification
+* Some minor changes in logging
+
+2003-02-25 Soós Péter <sp@osb.hu>
+
+* Try to identify HP laptops by technology code if machine is unsupported
+* Fixed dmi identification code
+
+2003-02-14 Soós Péter <sp@osb.hu>
+
+* Added HP Pavilion ze4100 support
+* Added HP Pavilion ze4200 support
+* Fixed HP Pavilion xt155 detection
+* Added Acer Aspire 1400 series laptop support
+* Fixed APM status detection bug
+* Cleaned up dmi identification code
+* Removed "Asset Tag:" field from dmi string structure
+
+2003-01-27 Soós Péter <sp@osb.hu>
+
+* Added HP Pavilion N5430 support
+* EC functions are work even if boot parameter acpi=off is given
+* Improved error handling in externally callable functions
+* Fixed kernel integration patch
+* Removed unreliable undocking feature for OB500
+* Fixed HP Pavilion N5415 support
+* Added new format hotkeys sample files
+
+2003-01-09 Ducrot Bruno <ducrot@poupinou.org>
+
+* Added to use ACPI_EC if available
+
+2003-01-09 Soós Péter <sp@osb.hu>
+
+* Fixed reverse console blanking bug on OB5xx and OB6xxx
+* Disabled unreliable undocking feature on OB500
+
+2003-01-08 Ducrot Bruno <ducrot@poupinou.org>
+
+* Added Toshiba Satellite 3000, 3005, 1000, 1005, 1110, 1115, 1900, 1905
+  support
+
+2003-01-08 Soós Péter <sp@osb.hu>
+
+* The ectype values changed again! See the README!
+* Fixed new ectypes detection bug
+* Added OmniBook xe4400 support
+* Added LCD display turn off at console blanking on OB5xx and OB6xxx
+* Documentation fixes
+
+2003-01-07 Soós Péter <sp@osb.hu>
+
+* Fixed bit level negation bug in fan.c
+* Added turn fan on for Toshiba 3000
+* Corrected OmniBook 4150 support code
+
+2003-01-06 Soós Péter <sp@osb.hu>
+
+* Changed ectype values! See the README!
+* Fixed some bugs in obtest utility
+* Fixed second battery status bug in battery.c
+* Added textual descriptions to some functions in /proc/omnibook
+* Fix APM emulation to work when APM support is present but APM power
+  status reporting flagged broken
+* Added docking station support
+* Added fan support
+* Added module parameter: user
+* Added OmniBook xe155, xe4100 and ze4125 support
+* Fan policy moved to /proc/omnibook/fan_policy
+* Reorganized scancode emulation code for XE3 GC
+* Polling of volume buttons on XE3CG style models can be enabled/disabled
+  via /proc/omnibook/key_polling
+* Finished abstraction layer
+* Some minor changes in Rick's model detection code
+* New kernel integration code
+
+2002-12-22 Rick Richardson <rickr@mn.rr.com>
+
+* Added on and off as valid input to /proc/omnibook/lcd, to turn
+  the LCD backlight on and off.
+
+2002-12-15 Rick Richardson <rickr@mn.rr.com>
+
+* Reimplemented model detection so you only have to modify one file
+  to add a new model. features.h is now deprecated.
+* Added the Toshiba Satellite 1115/S103 to the supported models
+* Fixed bug in apmemu.c which caused /proc/apm to report the battery
+  status as critical when the battery was charging.
+
+2002-10-16 Soós Péter <sp@osb.hu>
+
+* Added HP Pavilion N5415 support
+* Corrected HP Pavilion N5441 support
+* Fix values of OB500 type machines in ec.h
+* LCD brightness support added for XE3GC and XE3GF style machines
+* Added HP OmniBook 510 FB support
+* AC adapter status monitoring is working on all machines
+* External display status monitoring is working on all machines
+* CPU temperature monitoring is working on all machines
+* __init functions gone to init.h
+* Added an abstraction layer between the low level, hardware dependent
+  functions and the applications (not yet finished). See omnibook.h for
+  details.
+
+2002-09-20 Soós Péter <sp@osb.hu>
+
+* Using save_flags()/cli() instead spinlocks in ec.c because of laptops do
+  not have more than one CPU (yet ;)). This improves performance and
+  eliminates packet loss in ppp stack
+* The previous version of XE3 GC scancode emulation was buggy: it worked only
+  when ACPI enabled. Current version is working ACPI independent way
+
+2002-09-05 Soós Péter <sp@osb.hu>
+
+* Added secondary battery support (untested, please report!)
+* Added ectype module parameter to specify the type of embedded
+  controller firmware
+* Added some OmniBook XE3 GC support code
+* Added some OmniBook 500 style embedded controller firmware support code
+  (OmniBook 5xx, 6xxx and some Pavilions)
+* Reorganized features matrix (again): the features depends on the embedded
+  controller firmware, not the model
+* Added external display status monitoring on some machine
+* Added scancode emulation on OmniBook XE3 GC
+
+2002-08-14 Soós Péter <sp@osb.hu>
+
+* Added HP OmniBook 6000 EA support (OneTouch only)
+* Added HP OmniBook 6100 EB support (OneTouch only)
+* Fixed Toshiba Satellite 3000-100 detection
+* Fixed timeout and locking bugs in ec.c
+* Added HP Pavilion Notebook ZT1141
+* Reorganized the feature matrix and parameter detection code to make easy
+  to add new features differents machine by machine
+
+2002-08-11 Soós Péter <sp@osb.hu>
+
+* Fixed removing of procfs entries
+* Fixed APM detection
+* Added kernel source integration
+* Fixed __initdata bugs
+* Handling difference between untesed and unsupported features
+
+2002-08-09 Soós Péter <sp@osb.hu>
+
+* Added Compal ACL00 laptop support
+* Updated documentation
+* Added touchpad support
+* Some bugfixes
+* /proc/apm emulation added
+
+2002-08-06 Soós Péter <sp@osb.hu>
+
+* Corrected full charged battery info
+* Added OneTouch handling via procfs
+* Added console blank handling via procfs
+* Added temperature policy handling via procfs
+* Corrected the bug in DMI code to report the serial number
+* Added module parameter support
+* Added HP Pavilion Notebook N5490, ZT1195 (and probably other Pavilions)
+
+2002-07-17 Soós Péter <sp@osb.hu>
+
+* Improved error handling
+* Some text corrections
+* Added Toshiba Satellite 3000-100 support
+* Some code tuning
+* Added omnibook prefix for variables and functions to prevent conflicts
+  with another code
+* Added /proc filesystem support
+* Added battery status monitoring
+* Added CPU temperature monitoring
+
+2002-06-03 Soós Péter <sp@osb.hu>
+
+* Some code tuning
+
+2002-05-07 Soós Péter <sp@osb.hu>
+
+* Added missing #include <linux/sched.h> to main.c
+* Some text corrections
+* Added HP OmniBook 500 FA support (OneTouch only)
+
+2002-05-06 Soós Péter <sp@osb.hu>
+
+* LCD display turn off at console blanking added
+* Code cleanup
+
+2002-05-02 Soós Péter <sp@osb.hu>
+
+* The first release of omnibook module
+* OneTouch button support
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/doc/COPYING
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/doc/COPYING
@@ -0,0 +1,340 @@
+		    GNU GENERAL PUBLIC LICENSE
+		       Version 2, June 1991
+
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.
+     59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+			    Preamble
+
+  The licenses for most software are designed to take away your
+freedom to share and change it.  By contrast, the GNU General Public
+License is intended to guarantee your freedom to share and change free
+software--to make sure the software is free for all its users.  This
+General Public License applies to most of the Free Software
+Foundation's software and to any other program whose authors commit to
+using it.  (Some other Free Software Foundation software is covered by
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+
+  When we speak of free software, we are referring to freedom, not
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+
+  For example, if you distribute copies of such a program, whether
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+you have.  You must make sure that they, too, receive or can get the
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+rights.
+
+  We protect your rights with two steps: (1) copyright the software, and
+(2) offer you this license which gives you legal permission to copy,
+distribute and/or modify the software.
+
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+
+  Finally, any free program is threatened constantly by software
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+
+  The precise terms and conditions for copying, distribution and
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+
+		    GNU GENERAL PUBLIC LICENSE
+   TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
+
+  0. This License applies to any program or other work which contains
+a notice placed by the copyright holder saying it may be distributed
+under the terms of this General Public License.  The "Program", below,
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+
+Activities other than copying, distribution and modification are not
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+is covered only if its contents constitute a work based on the
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+Whether that is true depends on what the Program does.
+
+  1. You may copy and distribute verbatim copies of the Program's
+source code as you receive it, in any medium, provided that you
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+
+You may charge a fee for the physical act of transferring a copy, and
+you may at your option offer warranty protection in exchange for a fee.
+
+  2. You may modify your copy or copies of the Program or any portion
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+
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+
+    b) You must cause any work that you distribute or publish, that in
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+
+    c) If the modified program normally reads commands interactively
+    when run, you must cause it, when started running for such
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+
+These requirements apply to the modified work as a whole.  If
+identifiable sections of that work are not derived from the Program,
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+In addition, mere aggregation of another work not based on the Program
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+a storage or distribution medium does not bring the other work under
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+
+  3. You may copy and distribute the Program (or a work based on it,
+under Section 2) in object code or executable form under the terms of
+Sections 1 and 2 above provided that you also do one of the following:
+
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+distribution of the source code, even though third parties are not
+compelled to copy the source along with the object code.
+
+  4. You may not copy, modify, sublicense, or distribute the Program
+except as expressly provided under this License.  Any attempt
+otherwise to copy, modify, sublicense or distribute the Program is
+void, and will automatically terminate your rights under this License.
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+
+  5. You are not required to accept this License, since you have not
+signed it.  However, nothing else grants you permission to modify or
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+prohibited by law if you do not accept this License.  Therefore, by
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+Program), you indicate your acceptance of this License to do so, and
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+
+  6. Each time you redistribute the Program (or any work based on the
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+
+  7. If, as a consequence of a court judgment or allegation of patent
+infringement or for any other reason (not limited to patent issues),
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+license would not permit royalty-free redistribution of the Program by
+all those who receive copies directly or indirectly through you, then
+the only way you could satisfy both it and this License would be to
+refrain entirely from distribution of the Program.
+
+If any portion of this section is held invalid or unenforceable under
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+
+It is not the purpose of this section to induce you to infringe any
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+
+This section is intended to make thoroughly clear what is believed to
+be a consequence of the rest of this License.
+
+  8. If the distribution and/or use of the Program is restricted in
+certain countries either by patents or by copyrighted interfaces, the
+original copyright holder who places the Program under this License
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+
+  9. The Free Software Foundation may publish revised and/or new versions
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+
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+
+  10. If you wish to incorporate parts of the Program into other free
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+
+			    NO WARRANTY
+
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+FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW.  EXCEPT WHEN
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+PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGES.
+
+		     END OF TERMS AND CONDITIONS
+
+	    How to Apply These Terms to Your New Programs
+
+  If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these terms.
+
+  To do so, attach the following notices to the program.  It is safest
+to attach them to the start of each source file to most effectively
+convey the exclusion of warranty; and each file should have at least
+the "copyright" line and a pointer to where the full notice is found.
+
+    <one line to give the program's name and a brief idea of what it does.>
+    Copyright (C) <year>  <name of author>
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program; if not, write to the Free Software
+    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+
+Also add information on how to contact you by electronic and paper mail.
+
+If the program is interactive, make it output a short notice like this
+when it starts in an interactive mode:
+
+    Gnomovision version 69, Copyright (C) year  name of author
+    Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+    This is free software, and you are welcome to redistribute it
+    under certain conditions; type `show c' for details.
+
+The hypothetical commands `show w' and `show c' should show the appropriate
+parts of the General Public License.  Of course, the commands you use may
+be called something other than `show w' and `show c'; they could even be
+mouse-clicks or menu items--whatever suits your program.
+
+You should also get your employer (if you work as a programmer) or your
+school, if any, to sign a "copyright disclaimer" for the program, if
+necessary.  Here is a sample; alter the names:
+
+  Yoyodyne, Inc., hereby disclaims all copyright interest in the program
+  `Gnomovision' (which makes passes at compilers) written by James Hacker.
+
+  <signature of Ty Coon>, 1 April 1989
+  Ty Coon, President of Vice
+
+This General Public License does not permit incorporating your program into
+proprietary programs.  If your program is a subroutine library, you may
+consider it more useful to permit linking proprietary applications with the
+library.  If this is what you want to do, use the GNU Library General
+Public License instead of this License.
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/doc/CREDITS
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/doc/CREDITS
@@ -0,0 +1,39 @@
+The module was originally written by
+
+* Soós Péter <sp@osb.hu>
+
+Special thanks to the following persons and/or organisations (without
+particular order):
+
+* Al Stone <ahs3@fc.hp.com> and Linux Systems Operation at HP for lending
+  an HP OmniBook 500 for the project purposes.
+* Pavel Mihaylov <bin@bash.info> for his omke project discovering a lot of
+  OmniBook features, providing some code for XE3 GC machines and testing.
+* Ducrot Bruno <ducrot@poupinou.org> sharing lots of information about
+  embedded controller and related code, added lots of Toshiba support,
+  writing tosh3k code, sending patches etc.
+
+Thanks to the following people (without particular order):
+
+* Al Stone <ahs3@fc.hp.com> for sharing some programming information.
+* Guido Guenther <agx@sigxcpu.org> for initial OneTouch enabling code.
+* Jens Thoms Toerring <Jens.Toerring@physik.fu-berlin.de> for initial
+  OneTouch power management code.
+* Maciek Gorniak <mago@acn.waw.pl> for initial HP Pavilion N5415 detecting
+  code and initial lcd brighness code.
+* Rick Richardson <rickr@mn.rr.com> for some bugfixes and useful patches.
+* Bob McElrath <mcelrath@draal.physics.wisc.edu> for initial Compal ACL00
+  code.
+* Luisimi Moya <luismimoya@eresmas.net> for Acer Aspire 1400 support.
+* Bernhard Kaindl <bernhard.kaindl@gmx.de> for bugfixes and patches
+* Gabriele Vivinetto <gabriele.mailing@rvmgroup.it> for documentation
+  enhancements and testing.
+* Mark Chappell <nslm@nslm.fsnet.co.uk> for building on kernel 2.6.
+* Massimo Dal Zotto <dz@debian.org> for his i8k code.
+* Jonathan A. Buzzard <jonathan@buzzard.org.uk> for his toshiba code.
+* Some others on OmniBook mailing list at
+  http://zurich.ai.mit.edu/mailman/listinfo/omnibook
+  for providing information and testing.
+
+Last but not least thanks to Linus Torvald and more for creating and
+maintaining the Linux kernel.
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/doc/BUGS
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/doc/BUGS
@@ -0,0 +1,17 @@
+Bugs and problems in omnibook module code
+=========================================
+
+* Volume Control buttons on machine (not on docking station) do not generate
+  scancodes on OB500 style models. It is unhandled yet.
+* Setting the LCD brightness on HP OmniBook XE3 GF via /proc/omnibook/lcd
+  is working if you press one of the brightness control keys once after
+  writing the value into /proc/omnibook/lcd.
+* I'm not a native English speaker so text corrections are welcome.
+* obtest can BADLY confuse the in-kernel ACPI code due to its racy 
+  implementation.
+* Reenabling wifi adapter after previous disabling is broken on 
+  Toshiba Satellite M100 (ipw3945)
+* Real support of ectype 14 is still missing 
+* See http://sourceforge.net/tracker/?atid=868542&group_id=174260&func=browse
+  for sf.net bug tracking system.
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/doc/README
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/doc/README
@@ -0,0 +1,42 @@
+===============================================================
+Kernel Support for HP OmniBooks, Pavilions and Compal laptops
+===============================================================
+
+This package is intended to provide Linux kernel support for many laptops such as:
+- HP OmniBook and Pavilion
+- Toshiba Satellite and Tecra which are not supported by the toshiba_acpi module
+- Compal ACL00
+- Many laptops manufactured by Compal Electronics, Inc as ODM
+
+Supported features depends on the exact laptop model but may include:
+- Enabling hotkey buttons
+- Console (LCD display) blanking
+- Battery status monitoring.
+- Fan and fan policy support
+- Touchpad control
+- AC Adapter status monitoring
+- External display monitors status monitoring and control
+- LCD brightness (backlight) monitoring and control
+- Docking station/port replicator status
+- CPU temperature monitoring
+- Mute LED monitoring and control
+- Wifi and Bluetooth adapters monitoring and control
+- Cooling method control
+- CPU Throttling control
+
+Useful links:
+
+Full documentation (HOWTO, Installation instructions, Supported laptops list... ):
+http://omnibook.sourceforge.net/doku.php?id=start
+
+Sourceforge project page:
+http://sourceforge.net/projects/omnibook
+
+Other links not related to the project:
+
+For HP Omnibook specific issues ou can see the OmniBook mailing list:
+http://zurich.ai.mit.edu/mailman/listinfo/omnibook
+
+or the Toshiba linux mailing list:
+http://linux.toshiba-dme.co.jp/linux/
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/debian/README.Debian
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/debian/README.Debian
@@ -0,0 +1,30 @@
+omnibook for Debian
+-------------------
+
+Please see docs/README for a description of the omnibook kernel module.
+
+The Debian omnibook source package provides omnibook-source, package
+which provides the source for the kernel module.
+
+The omnibook-source package can be used in several ways,
+
+ - Using the make-kpkg(1) command provided by the kernel-package Debian
+   package. This will produce a corresponding omnibook-modules package for
+   the Debian kernel-image package that you are using.
+   See the "modules_image" section of the make-kpkg(1) man page.
+ 
+ - Using module-assistant. Simply issue the following command (as root):
+   $ module-assistant auto-install omnibook
+   Please see the module-assistant documentation for futher details.
+
+ - Changing to the /usr/src/modules/omnibook/ directory and building as
+   the README file instructs using "make; make install". This will build
+   and install a module specific to the system you are building on and is
+   not under control of the packaging system.
+
+If your are not using module-assisatant, you have to unpack 
+/usr/src/omnibook-source.tar.bz2 to /usr/src.
+
+ -- Peter Soos <sp@osb.hu>, Wed, 25 Jan 2006 21:06:28 +0100
+ -- Julien Valroff <julien@kirya.net>  Sun, 07 Oct 2007 10:38:07 +0200
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/debian/copyright
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/debian/copyright
@@ -0,0 +1,32 @@
+This package was debianized by Peter Soos <sp@osb.hu> on
+Wed, 25 Jan 2006 21:06:28 +0100.
+Debian package was improved by Julien Valroff <julien@kirya.net>
+
+It was downloaded from http://sourceforge.net/projects/omnibook
+
+Copyright Holder: 2006-2007 Mathieu Bérard <math_b@users.sourceforge.net>
+
+dump.c:
+   Copyright (C) 2004-2005 Borislav Deianov <borislav@users.sf.net>
+
+License:
+
+   This package is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This package is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+The Debian packaging is
+  Copyright (C) 2006 Peter Soos <sp@osb.hu>
+  Copyright (C) 2006-2009 Julien Valroff <julien@kirya.net>
+It is licensed under the GPL, version 2.
+
+You should have received a copy of the GNU General Public License with
+the Debian GNU/Linux distribution in file /usr/share/common-licenses/GPL-2;
+if not, write to the  Free Software Foundation, Inc., 51 Franklin St,
+Fifth Floor, Boston, MA 02110-1301, USA.
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/debian/changelog
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/debian/changelog
@@ -0,0 +1,170 @@
+omnibook (2:2.20070211+svn20090714b-1) unstable; urgency=low
+
+  * New SVN snapshot:
+    + fix build issue induced by previous patches
+    + fix build with kernel >= 2.6.30
+
+ -- Julien Valroff <julien@kirya.net>  Tue, 14 Jul 2009 18:17:49 +0200
+
+omnibook (2:2.20070211+svn20090714-1) unstable; urgency=low
+
+  * New SVN snapshot:
+    + Applied patches from Azael Avalos <coproscefalo@gmail.com>
+    to add support to Satellite X205 and other laptops based on
+    ICH8
+  * New Standards version 3.8.2
+  * Bumped DH compat to 7
+  * Updated copyright information
+  * Now use dh_prep instead of dh_clean -k
+
+ -- Julien Valroff <julien@kirya.net>  Tue, 14 Jul 2009 10:03:00 +0200
+
+omnibook (2:2.20070211+svn20090227-1) unstable; urgency=low
+
+  * New SVN snapshot
+    + Applied patch from Danny Kukawka <dkukawka@suse.de> to
+    fix compiler warning about use uninitialized variable
+    + Applied patch from Danny Kukawka <dkukawka@suse.de> to
+    fix build the driver on older kernel versions
+
+  * New Standards version 3.8.0 - no further changes needed
+  * Updated copryight information
+
+ -- Julien Valroff <julien@kirya.net>  Fri, 27 Feb 2009 19:57:35 +0100
+
+omnibook (2:2.20070211+svn20071217-1) unstable; urgency=low
+
+  * New SVN snapshot (r271)
+  * Added amd64 as a compatible architecture for the module
+  * New Standards version 3.7.3 - no further changes needed
+
+ -- Julien Valroff <julien@kirya.net>  Mon, 17 Dec 2007 18:00:29 +0100
+
+omnibook (2:2.20070211+svn20071006-1) unstable; urgency=low
+
+  * New SVN snapshot (r264):
+    + Update for acpi and backlight API changes in linux 2.6.23
+  * First upload to Debian (Closes: #445602):
+    + Improved debian/copyright
+    + Bumped debhelper compat to version 5
+    + Added myself as maintainer
+    + Updated README.Debian
+  * debian/control:
+    + Moved Homepage to own field (from pseudo-field in long description)
+    + Added Vcs-* fields
+
+ -- Julien Valroff <julien@kirya.net>  Thu, 29 Nov 2007 18:30:27 +0100
+
+omnibook (2:2.20070211+svn20070905-1) unstable; urgency=low
+
+  * Added dependency on dpatch
+  * [debian/rules]:
+    - Fixed lintian warning in the clean target
+
+ -- Julien Valroff <julien@kirya.net>  Wed, 05 Sep 2007 20:25:13 +0200
+
+omnibook (2:2.20070211+svn20070526-1) unstable; urgency=low
+
+  * New SVN snapshot (r259):
+    + Fixed compilation issue with kernel 2.6.21
+    + DMI signature added:
+        Toshiba Satellite P25 (ectype 11)
+        Toshiba Satellite M60 (ectype 12)
+  * Added patch to disable debug for SVN snasphot
+
+ -- Julien Valroff <julien@kirya.net>  Sat, 26 May 2007 15:19:57 +0200
+
+omnibook (2:2.20070211-1) unstable; urgency=low
+
+  * New upstream release:
+    + For ectype 12 (Satellite M40X, M70, M100, ...):
+      - improved bluetooth control
+      - cooling method control
+      - CPU throttling ( ACPI T-States)
+    + Full hotkeys support for Tecra S1
+    + Bluetooth control for Ectype 14 (Satellite A100, A105, M115, ...)
+  * Updated homepage in long description
+
+ -- Julien Valroff <julien@kirya.net>  Mon, 12 Feb 2007 18:50:05 +0100
+
+omnibook (2:2.20060921+svn20061202-1) unstable; urgency=low
+
+  * New SVN snapshot (r228)
+
+ -- Julien Valroff <julien@kirya.net>  Sat,  2 Dec 2006 10:17:07 +0100
+
+omnibook (2:2.20060921+svn20061112-1) unstable; urgency=low
+
+  * SVN snapshot:
+    + Disabled Acer support
+    + Fixed and improved bluetooth handling for TSM30X class laptop
+    + DMI signature added:
+      HP Pavilion ze4500 (ectype 7)
+      Toshiba Satellite 1130 (ectype 1)
+      Toshiba Satellite A75 (ectype 12)
+      Toshiba Tecra A4 (ectype 13)
+    + Implemented Volume down,up and Mute buttons polling for ectype 2
+    + Implemented ectype 13 Fn hotkeys handling.
+  * changed compression of the sources in /usr/src/ to bzip2
+
+ -- Julien Valroff <julien@kirya.net>  Sat, 11 Nov 2006 14:08:47 +0100
+
+omnibook (2:2.20060921-1) unstable; urgency=low
+
+  * New upstream release:
+    + Expand display and hotkeys features
+    + Added support for more laptops
+    + Code cleanups
+    + Minor bug fixes
+
+ -- Julien Valroff <julien@kirya.net>  Mon, 25 Sep 2006 08:14:59 +0200
+
+omnibook (2:2.20060817-1) unstable; urgency=low
+
+  * New upstream release
+  * [01_makfefile.dpatch] Removed - fixed upstream
+  * Changed defaut STEM value to linux (follows kernel-package)
+  * Uses dh_installmodules for maintainance scripts
+
+ -- Julien Valroff <julien@kirya.net>  Mon, 11 Sep 2006 18:00:50 +0200
+
+omnibook (2:2.20060809-2) unstable; urgency=low
+
+  * Include copyright and Debian changelog in omnibook-module
+  * Fix Makefile issue in a more elegant way
+
+ -- Julien Valroff <julien@kirya.net>  Thu, 10 Aug 2006 10:16:47 +0200
+
+omnibook (2:2.20060809-1) unstable; urgency=low
+
+  * New upstream release:
+    + Addeed autodetection of the Toshiba Satellite M40X laptop
+
+ -- Julien Valroff <julien@kirya.net>  Thu, 10 Aug 2006 09:40:45 +0200
+
+omnibook (2:2.20060806-1) unstable; urgency=low
+
+  * New upstream branch - Mathieu Bérard launched new project
+  * Added myself as co-maintainer
+  * Bumped upstream version and use epoch to ensure upgrades
+  * [debian/rules]:
+    + Clean-ups
+    + Recommends linux-image or kernel-image
+  * [debian/control] Improved long description
+  * [debian/post*.modules.in] Fixed bashisms
+  * Added patch to fix install target in Makefile
+
+ -- Julien Valroff <julien@kirya.net>  Thu, 10 Aug 2006 01:35:38 +0200
+
+omnibook (20060126-1) unstable; urgency=low
+
+  * Minor build inconveniences corrected.
+
+ -- Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>  Sun, 18 Jun 2006 12:28:55 -0700
+
+omnibook (20060126-0) unstable; urgency=low
+
+  * Locally built.
+
+ -- Péter Soós <sp@osb.hu>  Wed, 25 Jan 2006 21:06:28 +0100
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/debian/docs
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/debian/docs
@@ -0,0 +1,4 @@
+doc/BUGS
+doc/CREDITS
+doc/README
+misc/hotkeys
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/debian/rules
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/debian/rules
@@ -0,0 +1,135 @@
+#!/usr/bin/make -f
+# -*- makefile -*-
+
+# Uncomment this to turn on verbose mode. 
+#export DH_VERBOSE=1
+
+include /usr/share/dpatch/dpatch.make
+
+CFLAGS = -Wall -g
+
+ifneq (,$(findstring noopt,$(DEB_BUILD_OPTIONS)))
+	CFLAGS += -O0
+else
+	CFLAGS += -O2
+endif
+
+# Name of the source package
+psource	:= omnibook-source
+
+# The short upstream name, used for the module source directory
+sname	:= omnibook
+
+# prefix of the target package name
+PACKAGE=omnibook-module
+
+### end  KERNEL SETUP
+
+configure: configure-stamp
+configure-stamp:
+	dh_testdir
+	touch configure-stamp
+
+
+build-arch: configure-stamp  build-arch-stamp
+build-arch-stamp:
+	dh_testdir
+	touch build-arch-stamp
+
+build-indep: patch configure-stamp build-indep-stamp
+build-indep-stamp:
+	dh_testdir
+
+	touch build-indep-stamp
+
+build: patch build-arch build-indep
+
+clean: unpatch
+	dh_testdir
+	rm -f build-arch-stamp build-indep-stamp configure-stamp
+
+	dh_clean
+
+install: DH_OPTIONS=
+install: patch build
+	dh_testdir
+	dh_testroot
+	dh_prep
+	dh_installdirs
+
+	# Create the directories to install the source into
+	dh_installdirs -p$(psource)  usr/src/modules/$(sname)/debian
+	cp debian/compat debian/rules debian/changelog \
+		debian/control debian/copyright debian/*.modules.in \
+		debian/$(psource)/usr/src/modules/$(sname)/debian
+	cp Makefile *.c *.h *.lds debian/$(psource)/usr/src/modules/$(sname)
+
+	cd debian/$(psource)/usr/src && tar c modules | bzip2 -9 > $(sname).tar.bz2 && rm -rf modules
+	dh_install
+
+# Build architecture-independent files here.
+# Pass -i to all debhelper commands in this target to reduce clutter.
+binary-indep: build install
+	dh_testdir -i
+	dh_testroot -i
+	dh_installchangelogs -i doc/ChangeLog
+	dh_installdocs -i
+	dh_installexamples -i
+	dh_installman -i
+	dh_link -i
+	dh_compress -i
+	dh_fixperms -i
+	dh_installdeb -i
+	dh_installdeb -i
+	dh_shlibdeps -i
+	dh_gencontrol -i
+	dh_md5sums -i
+	dh_builddeb -i
+ 
+# Build architecture-dependent files here.
+binary-arch: build install
+
+# modifieable for experiments or debugging m-a
+MA_DIR ?= /usr/share/modass
+# load generic variable handling
+-include $(MA_DIR)/include/generic.make
+# load default rules, including kdist, kdist_image, ...
+-include $(MA_DIR)/include/common-rules.make
+
+ifndef KPKG_STEM
+STEM:=linux
+else
+STEM:=${KPKG_STEM}
+endif
+
+kdist_clean: prep-deb-files
+	[ ! -f Makefile ] || $(MAKE) KSRC=$(KSRC) clean
+	dh_clean
+
+kdist_config: prep-deb-files
+	sed -i -e 's/_STEM_/$(STEM)/g' debian/control
+
+binary-modules: kdist_config prep-deb-files
+	dh_testroot
+	dh_prep
+	dh_installdirs lib/modules/$(KVERS)/extra
+
+	# Build the module
+	$(MAKE) KSRC=$(KSRC) KVERS=$(KVERS)
+
+	# Install the module
+	$(MAKE) install KSRC=$(KSRC) DESTDIR=$(CURDIR)/debian/$(PKGNAME) INSTDIR=extra DEPMOD="/bin/true"
+
+	dh_installdocs
+	dh_compress
+	dh_installmodules
+	dh_installchangelogs
+	dh_fixperms
+	dh_installdeb
+	dh_gencontrol -- -v$(VERSION)
+	dh_md5sums
+	dh_builddeb --destdir=$(DEB_DESTDIR)
+	dh_prep
+
+binary: binary-indep binary-arch
+.PHONY: build clean binary-indep binary-arch binary install configure binary-modules kdist kdist_config kdist_image kdist_clean
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/debian/control
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/debian/control
@@ -0,0 +1,21 @@
+Source: omnibook
+Section: misc
+Priority: optional
+Maintainer: Julien Valroff <julien@kirya.net>
+Build-Depends: debhelper (>> 7.0.0), dpatch, bzip2
+Standards-Version: 3.8.2
+Homepage: http://omnibook.sf.net
+Vcs-Svn: https://omnibook.svn.sourceforge.net/svnroot/omnibook/omnibook/trunk
+Vcs-Browser: http://omnibook.svn.sourceforge.net/viewvc/omnibook/
+
+Package: omnibook-source
+Architecture: all
+Depends: debhelper (>= 4.0.0), make, module-assistant, kernel-package, bzip2, dpatch
+Description: Source for the omnibook driver
+ This package contains the loadable kernel modules for the HP OmniBooks,
+ Pavilions, Toshiba Satellites and some other laptops manufactured by
+ Compal Electronics, Inc as ODM.
+ .
+ This module is only compatible with Linux kernels >= 2.6.9
+ .
+ Kernel source is required to compile this module.
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/debian/control.modules.in
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/debian/control.modules.in
@@ -0,0 +1,23 @@
+Source: omnibook
+Section: misc
+Priority: optional
+Maintainer: Julien Valroff <julien@kirya.net>
+Build-Depends: debhelper (>> 7.0.0)
+Standards-Version: 3.8.2
+
+Package: omnibook-module-_KVERS_
+Architecture: i386 amd64
+Recommends: _STEM_-image-_KVERS_
+Provides: omnibook-module
+Description: omnibook module for Linux (kernel _KVERS_)
+ This package contains the loadable kernel modules for the HP OmniBooks,
+ Pavilions, Toshiba Satellites and some other laptops manufactured by
+ Compal Electronics, Inc as ODM.
+ .
+ This package contains the compiled kernel modules for _KVERS_
+ .
+ If you have compiled your own kernel, you will most likely need to build
+ your own omnibook-module.  The omnibook-source package has been
+ provided for use with the Debian kernel-package utility to produce a version
+ of omnibook-module for your kernel.
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/omnibook/debian/compat
+++ linux-mvl-dove-2.6.32/ubuntu/omnibook/debian/compat
@@ -0,0 +1 @@
+7
--- linux-mvl-dove-2.6.32.orig/ubuntu/ndiswrapper/ntoskernel_io.c
+++ linux-mvl-dove-2.6.32/ubuntu/ndiswrapper/ntoskernel_io.c
@@ -0,0 +1,1106 @@
+/*
+ *  Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *  GNU General Public License for more details.
+ *
+ */
+
+#include "ntoskernel.h"
+#include "ndis.h"
+#include "wrapndis.h"
+#include "usb.h"
+#include "loader.h"
+#include "ntoskernel_io_exports.h"
+
+wstdcall void WIN_FUNC(IoAcquireCancelSpinLock,1)
+	(KIRQL *irql) __acquires(irql)
+{
+	spin_lock_bh(&irp_cancel_lock);
+	*irql = 0;
+}
+
+wstdcall void WIN_FUNC(IoReleaseCancelSpinLock,1)
+	(KIRQL irql) __releases(irql)
+{
+	spin_unlock_bh(&irp_cancel_lock);
+}
+
+wstdcall int WIN_FUNC(IoIsWdmVersionAvailable,2)
+	(UCHAR major, UCHAR minor)
+{
+	IOENTER("%d, %x", major, minor);
+	if (major == 1 &&
+	    (minor == 0x30 || // Windows 2003
+	     minor == 0x20 || // Windows XP
+	     minor == 0x10)) // Windows 2000
+		IOEXIT(return TRUE);
+	IOEXIT(return FALSE);
+}
+
+wstdcall BOOLEAN WIN_FUNC(IoIs32bitProcess,1)
+	(struct irp *irp)
+{
+#ifdef CONFIG_X86_64
+	return FALSE;
+#else
+	return TRUE;
+#endif
+}
+
+wstdcall void WIN_FUNC(IoInitializeIrp,3)
+	(struct irp *irp, USHORT size, CCHAR stack_count)
+{
+	IOENTER("irp: %p, %d, %d", irp, size, stack_count);
+
+	memset(irp, 0, size);
+	irp->size = size;
+	irp->stack_count = stack_count;
+	irp->current_location = stack_count;
+	IoGetCurrentIrpStackLocation(irp) = IRP_SL(irp, stack_count);
+	IOEXIT(return);
+}
+
+wstdcall void WIN_FUNC(IoReuseIrp,2)
+	(struct irp *irp, NTSTATUS status)
+{
+	IOENTER("%p, %d", irp, status);
+	if (irp) {
+		UCHAR alloc_flags;
+
+		alloc_flags = irp->alloc_flags;
+		IoInitializeIrp(irp, irp->size, irp->stack_count);
+		irp->alloc_flags = alloc_flags;
+		irp->io_status.status = status;
+	}
+	IOEXIT(return);
+}
+
+wstdcall struct irp *WIN_FUNC(IoAllocateIrp,2)
+	(char stack_count, BOOLEAN charge_quota)
+{
+	struct irp *irp;
+	int irp_size;
+
+	IOENTER("count: %d", stack_count);
+	stack_count++;
+	irp_size = IoSizeOfIrp(stack_count);
+	irp = kmalloc(irp_size, irql_gfp());
+	if (irp)
+		IoInitializeIrp(irp, irp_size, stack_count);
+	IOTRACE("irp %p", irp);
+	IOEXIT(return irp);
+}
+
+wstdcall BOOLEAN WIN_FUNC(IoCancelIrp,1)
+	(struct irp *irp)
+{
+	typeof(irp->cancel_routine) cancel_routine;
+
+	/* NB: this function may be called at DISPATCH_LEVEL */
+	IOTRACE("irp: %p", irp);
+	if (!irp)
+		return FALSE;
+	DUMP_IRP(irp);
+	IoAcquireCancelSpinLock(&irp->cancel_irql);
+	cancel_routine = xchg(&irp->cancel_routine, NULL);
+	IOTRACE("%p", cancel_routine);
+	irp->cancel = TRUE;
+	if (cancel_routine) {
+		struct io_stack_location *irp_sl;
+		irp_sl = IoGetCurrentIrpStackLocation(irp);
+		IOTRACE("%p, %p", irp_sl, irp_sl->dev_obj);
+		/* cancel_routine will release the spin lock */
+		__release(irp->cancel_irql);
+		LIN2WIN2(cancel_routine, irp_sl->dev_obj, irp);
+		/* in usb's cancel, irp->cancel is set to indicate
+		 * status of cancel */
+		IOEXIT(return xchg(&irp->cancel, TRUE));
+	} else {
+		IOTRACE("irp %p already canceled", irp);
+		IoReleaseCancelSpinLock(irp->cancel_irql);
+		IOEXIT(return FALSE);
+	}
+}
+
+wstdcall void IoQueueThreadIrp(struct irp *irp)
+{
+	struct nt_thread *thread;
+	KIRQL irql;
+
+	thread = get_current_nt_thread();
+	if (thread) {
+		IOTRACE("thread: %p, task: %p", thread, thread->task);
+		irp->flags |= IRP_SYNCHRONOUS_API;
+		irql = nt_spin_lock_irql(&thread->lock, DISPATCH_LEVEL);
+		InsertTailList(&thread->irps, &irp->thread_list);
+		IoIrpThread(irp) = thread;
+		nt_spin_unlock_irql(&thread->lock, irql);
+	} else
+		IoIrpThread(irp) = NULL;
+}
+
+wstdcall void IoDequeueThreadIrp(struct irp *irp)
+{
+	struct nt_thread *thread;
+	KIRQL irql;
+
+	thread = IoIrpThread(irp);
+	if (thread) {
+		irql = nt_spin_lock_irql(&thread->lock, DISPATCH_LEVEL);
+		RemoveEntryList(&irp->thread_list);
+		nt_spin_unlock_irql(&thread->lock, irql);
+	}
+}
+
+wstdcall void WIN_FUNC(IoFreeIrp,1)
+	(struct irp *irp)
+{
+	IOENTER("irp = %p", irp);
+	if (irp->flags & IRP_SYNCHRONOUS_API)
+		IoDequeueThreadIrp(irp);
+	kfree(irp);
+
+	IOEXIT(return);
+}
+
+wstdcall struct irp *WIN_FUNC(IoBuildAsynchronousFsdRequest,6)
+	(ULONG major_fn, struct device_object *dev_obj, void *buffer,
+	 ULONG length, LARGE_INTEGER *offset,
+	 struct io_status_block *user_status)
+{
+	struct irp *irp;
+	struct io_stack_location *irp_sl;
+
+	IOENTER("%p", dev_obj);
+	if (!dev_obj)
+		IOEXIT(return NULL);
+	irp = IoAllocateIrp(dev_obj->stack_count, FALSE);
+	if (irp == NULL) {
+		WARNING("couldn't allocate irp");
+		IOEXIT(return NULL);
+	}
+
+	irp_sl = IoGetNextIrpStackLocation(irp);
+	irp_sl->major_fn = major_fn;
+	IOTRACE("major_fn: %d", major_fn);
+	irp_sl->minor_fn = 0;
+	irp_sl->flags = 0;
+	irp_sl->control = 0;
+	irp_sl->dev_obj = dev_obj;
+	irp_sl->file_obj = NULL;
+	irp_sl->completion_routine = NULL;
+
+	if (dev_obj->flags & DO_DIRECT_IO) {
+		irp->mdl = IoAllocateMdl(buffer, length, FALSE, FALSE, irp);
+		if (irp->mdl == NULL) {
+			IoFreeIrp(irp);
+			return NULL;
+		}
+		MmProbeAndLockPages(irp->mdl, KernelMode,
+				    major_fn == IRP_MJ_WRITE ?
+				    IoReadAccess : IoWriteAccess);
+		IOTRACE("mdl: %p", irp->mdl);
+	} else if (dev_obj->flags & DO_BUFFERED_IO) {
+		irp->associated_irp.system_buffer = buffer;
+		irp->flags = IRP_BUFFERED_IO;
+		irp->mdl = NULL;
+		IOTRACE("buffer: %p", buffer);
+	}
+	if (major_fn == IRP_MJ_READ) {
+		irp_sl->params.read.length = length;
+		irp_sl->params.read.byte_offset = *offset;
+	} else if (major_fn == IRP_MJ_WRITE) {
+		irp_sl->params.write.length = length;
+		irp_sl->params.write.byte_offset = *offset;
+	}
+	irp->user_status = user_status;
+	IOTRACE("irp: %p", irp);
+	return irp;
+}
+
+wstdcall struct irp *WIN_FUNC(IoBuildSynchronousFsdRequest,7)
+	(ULONG major_fn, struct device_object *dev_obj, void *buf,
+	 ULONG length, LARGE_INTEGER *offset, struct nt_event *event,
+	 struct io_status_block *user_status)
+{
+	struct irp *irp;
+
+	irp = IoBuildAsynchronousFsdRequest(major_fn, dev_obj, buf, length,
+					    offset, user_status);
+	if (irp == NULL)
+		return NULL;
+	irp->user_event = event;
+	IoQueueThreadIrp(irp);
+	return irp;
+}
+
+wstdcall struct irp *WIN_FUNC(IoBuildDeviceIoControlRequest,9)
+	(ULONG ioctl, struct device_object *dev_obj,
+	 void *input_buf, ULONG input_buf_len, void *output_buf,
+	 ULONG output_buf_len, BOOLEAN internal_ioctl,
+	 struct nt_event *event, struct io_status_block *io_status)
+{
+	struct irp *irp;
+	struct io_stack_location *irp_sl;
+	ULONG buf_len;
+
+	IOENTER("%p, 0x%08x, %d", dev_obj, ioctl, internal_ioctl);
+	if (!dev_obj)
+		IOEXIT(return NULL);
+	irp = IoAllocateIrp(dev_obj->stack_count, FALSE);
+	if (irp == NULL) {
+		WARNING("couldn't allocate irp");
+		return NULL;
+	}
+	irp_sl = IoGetNextIrpStackLocation(irp);
+	irp_sl->params.dev_ioctl.code = ioctl;
+	irp_sl->params.dev_ioctl.input_buf_len = input_buf_len;
+	irp_sl->params.dev_ioctl.output_buf_len = output_buf_len;
+	irp_sl->major_fn = (internal_ioctl) ?
+		IRP_MJ_INTERNAL_DEVICE_CONTROL : IRP_MJ_DEVICE_CONTROL;
+	IOTRACE("%d", IO_METHOD_FROM_CTL_CODE(ioctl));
+
+	switch (IO_METHOD_FROM_CTL_CODE(ioctl)) {
+	case METHOD_BUFFERED:
+		buf_len = max(input_buf_len, output_buf_len);
+		if (buf_len) {
+			irp->associated_irp.system_buffer =
+				ExAllocatePoolWithTag(NonPagedPool, buf_len, 0);
+			if (!irp->associated_irp.system_buffer) {
+				IoFreeIrp(irp);
+				IOEXIT(return NULL);
+			}
+			irp->associated_irp.system_buffer = input_buf;
+			if (input_buf)
+				memcpy(irp->associated_irp.system_buffer,
+				       input_buf, input_buf_len);
+			irp->flags = IRP_BUFFERED_IO | IRP_DEALLOCATE_BUFFER;
+			if (output_buf)
+				irp->flags = IRP_INPUT_OPERATION;
+			irp->user_buf = output_buf;
+		} else
+			irp->user_buf = NULL;
+		break;
+	case METHOD_IN_DIRECT:
+	case METHOD_OUT_DIRECT:
+		if (input_buf) {
+			irp->associated_irp.system_buffer =
+				ExAllocatePoolWithTag(NonPagedPool,
+						      input_buf_len, 0);
+			if (!irp->associated_irp.system_buffer) {
+				IoFreeIrp(irp);
+				IOEXIT(return NULL);
+			}
+			memcpy(irp->associated_irp.system_buffer,
+			       input_buf, input_buf_len);
+			irp->flags = IRP_BUFFERED_IO | IRP_DEALLOCATE_BUFFER;
+		}
+		/* TODO: we are supposed to setup MDL, but USB layer
+		 * doesn't use MDLs. Moreover, USB layer mirrors
+		 * non-DMAable buffers, so no need to allocate
+		 * DMAable buffer here */
+		if (output_buf) {
+			irp->associated_irp.system_buffer =
+				ExAllocatePoolWithTag(NonPagedPool,
+						      output_buf_len, 0);
+			if (!irp->associated_irp.system_buffer) {
+				IoFreeIrp(irp);
+				IOEXIT(return NULL);
+			}
+			irp->flags = IRP_BUFFERED_IO | IRP_DEALLOCATE_BUFFER;
+		}
+		break;
+	case METHOD_NEITHER:
+		irp->user_buf = output_buf;
+		irp_sl->params.dev_ioctl.type3_input_buf = input_buf;
+		break;
+	}
+
+	irp->user_status = io_status;
+	irp->user_event = event;
+	IoQueueThreadIrp(irp);
+
+	IOTRACE("irp: %p", irp);
+	IOEXIT(return irp);
+}
+
+wfastcall NTSTATUS WIN_FUNC(IofCallDriver,2)
+	(struct device_object *dev_obj, struct irp *irp)
+{
+	struct io_stack_location *irp_sl;
+	NTSTATUS status;
+	driver_dispatch_t *major_func;
+	struct driver_object *drv_obj;
+
+	if (irp->current_location <= 0) {
+		ERROR("invalid irp: %p, %d", irp, irp->current_location);
+		return STATUS_INVALID_PARAMETER;
+	}
+	IOTRACE("%p, %p, %p, %d, %d, %p", dev_obj, irp, dev_obj->drv_obj,
+		irp->current_location, irp->stack_count,
+		IoGetCurrentIrpStackLocation(irp));
+	IoSetNextIrpStackLocation(irp);
+	DUMP_IRP(irp);
+	irp_sl = IoGetCurrentIrpStackLocation(irp);
+	drv_obj = dev_obj->drv_obj;
+	irp_sl->dev_obj = dev_obj;
+	major_func = drv_obj->major_func[irp_sl->major_fn];
+	IOTRACE("major_func: %p, dev_obj: %p", major_func, dev_obj);
+	if (major_func)
+		status = LIN2WIN2(major_func, dev_obj, irp);
+	else {
+		ERROR("major_function %d is not implemented",
+		      irp_sl->major_fn);
+		status = STATUS_NOT_SUPPORTED;
+	}
+	IOEXIT(return status);
+}
+
+wfastcall void WIN_FUNC(IofCompleteRequest,2)
+	(struct irp *irp, CHAR prio_boost)
+{
+	struct io_stack_location *irp_sl;
+
+#ifdef IO_DEBUG
+	DUMP_IRP(irp);
+	if (irp->io_status.status == STATUS_PENDING) {
+		ERROR("invalid irp: %p, STATUS_PENDING", irp);
+		return;
+	}
+	if (irp->current_location < 0 ||
+	    irp->current_location >= irp->stack_count) {
+		ERROR("invalid irp: %p, %d", irp, irp->current_location);
+		return;
+	}
+#endif
+	for (irp_sl = IoGetCurrentIrpStackLocation(irp);
+	     irp->current_location < irp->stack_count; irp_sl++) {
+		struct device_object *dev_obj;
+		NTSTATUS status;
+
+		DUMP_IRP(irp);
+		if (irp_sl->control & SL_PENDING_RETURNED)
+			irp->pending_returned = TRUE;
+
+		/* current_location and dev_obj must be same as when
+		 * driver called IoSetCompletionRoutine, which sets
+		 * completion routine at next (lower) location, which
+		 * is what we are going to call below; so we set
+		 * current_location and dev_obj for the previous
+		 * (higher) location */
+		IoSkipCurrentIrpStackLocation(irp);
+		if (irp->current_location < irp->stack_count)
+			dev_obj = IoGetCurrentIrpStackLocation(irp)->dev_obj;
+		else
+			dev_obj = NULL;
+
+		IOTRACE("%d, %d, %p", irp->current_location, irp->stack_count,
+			dev_obj);
+		if (irp_sl->completion_routine &&
+		    ((irp->io_status.status == STATUS_SUCCESS &&
+		      irp_sl->control & SL_INVOKE_ON_SUCCESS) ||
+		     (irp->io_status.status != STATUS_SUCCESS &&
+		      irp_sl->control & SL_INVOKE_ON_ERROR) ||
+		     (irp->cancel == TRUE &&
+		      irp_sl->control & SL_INVOKE_ON_CANCEL))) {
+			IOTRACE("calling completion_routine at: %p, %p",
+				irp_sl->completion_routine, irp_sl->context);
+			status = LIN2WIN3(irp_sl->completion_routine,
+					  dev_obj, irp, irp_sl->context);
+			IOTRACE("status: %08X", status);
+			if (status == STATUS_MORE_PROCESSING_REQUIRED)
+				IOEXIT(return);
+		} else {
+			/* propagate pending status to next irp_sl */
+			if (irp->pending_returned &&
+			    irp->current_location < irp->stack_count)
+				IoMarkIrpPending(irp);
+		}
+	}
+
+	if (irp->user_status) {
+		irp->user_status->status = irp->io_status.status;
+		irp->user_status->info = irp->io_status.info;
+	}
+
+	if (irp->user_event) {
+		IOTRACE("setting event %p", irp->user_event);
+		KeSetEvent(irp->user_event, prio_boost, FALSE);
+	}
+
+	if (irp->associated_irp.system_buffer &&
+	    (irp->flags & IRP_DEALLOCATE_BUFFER))
+		ExFreePool(irp->associated_irp.system_buffer);
+	else {
+		struct mdl *mdl;
+		while ((mdl = irp->mdl)) {
+			irp->mdl = mdl->next;
+			MmUnlockPages(mdl);
+			IoFreeMdl(mdl);
+		}
+	}
+	IOTRACE("freeing irp %p", irp);
+	IoFreeIrp(irp);
+	IOEXIT(return);
+}
+
+wstdcall NTSTATUS IoPassIrpDown(struct device_object *dev_obj, struct irp *irp)
+{
+	IoSkipCurrentIrpStackLocation(irp);
+	IOEXIT(return IoCallDriver(dev_obj, irp));
+}
+
+wstdcall NTSTATUS IoIrpSyncComplete(struct device_object *dev_obj,
+				    struct irp *irp, void *context)
+{
+	if (irp->pending_returned == TRUE)
+		KeSetEvent(context, IO_NO_INCREMENT, FALSE);
+	IOEXIT(return STATUS_MORE_PROCESSING_REQUIRED);
+}
+WIN_FUNC_DECL(IoIrpSyncComplete,3)
+
+wstdcall NTSTATUS IoSyncForwardIrp(struct device_object *dev_obj,
+				   struct irp *irp)
+{
+	struct nt_event event;
+	NTSTATUS status;
+
+	IoCopyCurrentIrpStackLocationToNext(irp);
+	KeInitializeEvent(&event, SynchronizationEvent, FALSE);
+	/* completion function is called as Windows function */
+	IoSetCompletionRoutine(irp, WIN_FUNC_PTR(IoIrpSyncComplete,3), &event,
+			       TRUE, TRUE, TRUE);
+	status = IoCallDriver(dev_obj, irp);
+	IOTRACE("%08X", status);
+	if (status == STATUS_PENDING) {
+		KeWaitForSingleObject(&event, Executive, KernelMode, FALSE,
+				      NULL);
+		status = irp->io_status.status;
+	}
+	IOTRACE("%08X", status);
+	IOEXIT(return status);
+}
+WIN_FUNC_DECL(IoSyncForwardIrp,2)
+
+wstdcall NTSTATUS IoAsyncForwardIrp(struct device_object *dev_obj,
+				    struct irp *irp)
+{
+	NTSTATUS status;
+
+	IoCopyCurrentIrpStackLocationToNext(irp);
+	status = IoCallDriver(dev_obj, irp);
+	IOEXIT(return status);
+}
+WIN_FUNC_DECL(IoAsyncForwardIrp,2)
+
+wstdcall NTSTATUS IoInvalidDeviceRequest(struct device_object *dev_obj,
+					 struct irp *irp)
+{
+	struct io_stack_location *irp_sl;
+	NTSTATUS status;
+
+	irp_sl = IoGetCurrentIrpStackLocation(irp);
+	WARNING("%d:%d not implemented", irp_sl->major_fn, irp_sl->minor_fn);
+	irp->io_status.status = STATUS_SUCCESS;
+	irp->io_status.info = 0;
+	status = irp->io_status.status;
+	IoCompleteRequest(irp, IO_NO_INCREMENT);
+	IOEXIT(return status);
+}
+WIN_FUNC_DECL(IoInvalidDeviceRequest,2)
+
+static irqreturn_t io_irq_isr(int irq, void *data ISR_PT_REGS_PARAM_DECL)
+{
+	struct kinterrupt *interrupt = data;
+	BOOLEAN ret;
+
+#ifdef CONFIG_DEBUG_SHIRQ
+	if (!interrupt->u.enabled)
+		EXIT1(return IRQ_NONE);
+#endif
+	TRACE6("%p", interrupt);
+	nt_spin_lock(interrupt->actual_lock);
+	ret = LIN2WIN2(interrupt->isr, interrupt, interrupt->isr_ctx);
+	nt_spin_unlock(interrupt->actual_lock);
+	if (ret == TRUE)
+		EXIT6(return IRQ_HANDLED);
+	else
+		EXIT6(return IRQ_NONE);
+}
+
+wstdcall NTSTATUS WIN_FUNC(IoConnectInterrupt,11)
+	(struct kinterrupt **kinterrupt, PKSERVICE_ROUTINE isr, void *isr_ctx,
+	 NT_SPIN_LOCK *lock, ULONG vector, KIRQL irql, KIRQL synch_irql,
+	 enum kinterrupt_mode mode, BOOLEAN shared, KAFFINITY cpu_mask,
+	 BOOLEAN save_fp)
+{
+	struct kinterrupt *interrupt;
+	IOENTER("");
+	interrupt = kzalloc(sizeof(*interrupt), GFP_KERNEL);
+	if (!interrupt)
+		IOEXIT(return STATUS_INSUFFICIENT_RESOURCES);
+	interrupt->vector = vector;
+	interrupt->cpu_mask = cpu_mask;
+	nt_spin_lock_init(&interrupt->lock);
+	if (lock)
+		interrupt->actual_lock = lock;
+	else
+		interrupt->actual_lock = &interrupt->lock;
+	interrupt->shared = shared;
+	interrupt->save_fp = save_fp;
+	interrupt->isr = isr;
+	interrupt->isr_ctx = isr_ctx;
+	InitializeListHead(&interrupt->list);
+	interrupt->irql = irql;
+	interrupt->synch_irql = synch_irql;
+	interrupt->mode = mode;
+	if (request_irq(vector, io_irq_isr, shared ? IRQF_SHARED : 0,
+			"ndiswrapper", interrupt)) {
+		WARNING("request for irq %d failed", vector);
+		kfree(interrupt);
+		IOEXIT(return STATUS_INSUFFICIENT_RESOURCES);
+	}
+	*kinterrupt = interrupt;
+#ifdef CONFIG_DEBUG_SHIRQ
+	interrupt->u.enabled = 1;
+#endif
+	IOEXIT(return STATUS_SUCCESS);
+}
+
+wstdcall void WIN_FUNC(IoDisconnectInterrupt,1)
+	(struct kinterrupt *interrupt)
+{
+#ifdef CONFIG_DEBUG_SHIRQ
+	interrupt->u.enabled = 0;
+#endif
+	free_irq(interrupt->vector, interrupt);
+	kfree(interrupt);
+}
+
+wstdcall struct mdl *WIN_FUNC(IoAllocateMdl,5)
+	(void *virt, ULONG length, BOOLEAN second_buf, BOOLEAN charge_quota,
+	 struct irp *irp)
+{
+	struct mdl *mdl;
+	mdl = allocate_init_mdl(virt, length);
+	if (!mdl)
+		return NULL;
+	if (irp) {
+		if (second_buf == TRUE) {
+			struct mdl *last;
+
+			last = irp->mdl;
+			while (last->next)
+				last = last->next;
+			last->next = mdl;
+		} else
+			irp->mdl = mdl;
+	}
+	IOTRACE("%p", mdl);
+	return mdl;
+}
+
+wstdcall void WIN_FUNC(IoFreeMdl,1)
+	(struct mdl *mdl)
+{
+	IOTRACE("%p", mdl);
+	free_mdl(mdl);
+}
+
+wstdcall struct io_workitem *WIN_FUNC(IoAllocateWorkItem,1)
+	(struct device_object *dev_obj)
+{
+	struct io_workitem *io_workitem;
+
+	IOENTER("%p", dev_obj);
+	io_workitem = kmalloc(sizeof(*io_workitem), irql_gfp());
+	if (!io_workitem)
+		IOEXIT(return NULL);
+	io_workitem->dev_obj = dev_obj;
+	IOEXIT(return io_workitem);
+}
+
+wstdcall void WIN_FUNC(IoFreeWorkItem,1)
+	(struct io_workitem *io_workitem)
+{
+	kfree(io_workitem);
+	IOEXIT(return);
+}
+
+wstdcall void WIN_FUNC(IoQueueWorkItem,4)
+	(struct io_workitem *io_workitem, void *func,
+	 enum work_queue_type queue_type, void *context)
+{
+	IOENTER("%p, %p", io_workitem, io_workitem->dev_obj);
+	io_workitem->worker_routine = func;
+	io_workitem->context = context;
+	schedule_ntos_work_item(func, io_workitem->dev_obj, context);
+	IOEXIT(return);
+}
+
+wstdcall void WIN_FUNC(ExQueueWorkItem,2)
+	(struct io_workitem *io_workitem, enum work_queue_type queue_type)
+{
+	IOENTER("%p", io_workitem);
+	schedule_ntos_work_item(io_workitem->worker_routine,
+				io_workitem->dev_obj, io_workitem->context);
+}
+
+wstdcall NTSTATUS WIN_FUNC(IoAllocateDriverObjectExtension,4)
+	(struct driver_object *drv_obj, void *client_id, ULONG extlen,
+	 void **ext)
+{
+	struct custom_ext *ce;
+
+	IOENTER("%p, %p", drv_obj, client_id);
+	ce = kmalloc(sizeof(*ce) + extlen, irql_gfp());
+	if (ce == NULL)
+		return STATUS_INSUFFICIENT_RESOURCES;
+
+	IOTRACE("custom_ext: %p", ce);
+	ce->client_id = client_id;
+	spin_lock_bh(&ntoskernel_lock);
+	InsertTailList(&drv_obj->drv_ext->custom_ext, &ce->list);
+	spin_unlock_bh(&ntoskernel_lock);
+
+	*ext = (void *)ce + sizeof(*ce);
+	IOTRACE("ext: %p", *ext);
+	IOEXIT(return STATUS_SUCCESS);
+}
+
+wstdcall void *WIN_FUNC(IoGetDriverObjectExtension,2)
+	(struct driver_object *drv_obj, void *client_id)
+{
+	struct custom_ext *ce;
+	void *ret;
+
+	IOENTER("drv_obj: %p, client_id: %p", drv_obj, client_id);
+	ret = NULL;
+	spin_lock_bh(&ntoskernel_lock);
+	nt_list_for_each_entry(ce, &drv_obj->drv_ext->custom_ext, list) {
+		if (ce->client_id == client_id) {
+			ret = (void *)ce + sizeof(*ce);
+			break;
+		}
+	}
+	spin_unlock_bh(&ntoskernel_lock);
+	IOTRACE("ret: %p", ret);
+	return ret;
+}
+
+void free_custom_extensions(struct driver_extension *drv_ext)
+{
+	struct nt_list *ent;
+
+	IOENTER("%p", drv_ext);
+	spin_lock_bh(&ntoskernel_lock);
+	while ((ent = RemoveHeadList(&drv_ext->custom_ext)))
+		kfree(ent);
+	spin_unlock_bh(&ntoskernel_lock);
+	IOEXIT(return);
+}
+
+wstdcall NTSTATUS WIN_FUNC(IoCreateDevice,7)
+	(struct driver_object *drv_obj, ULONG dev_ext_length,
+	 struct unicode_string *dev_name, DEVICE_TYPE dev_type,
+	 ULONG dev_chars, BOOLEAN exclusive, struct device_object **newdev)
+{
+	struct device_object *dev;
+	struct dev_obj_ext *dev_obj_ext;
+	int size;
+
+	IOENTER("%p, %u, %p", drv_obj, dev_ext_length, dev_name);
+
+	size = sizeof(*dev) + dev_ext_length + sizeof(*dev_obj_ext);
+	dev = allocate_object(size, OBJECT_TYPE_DEVICE, dev_name);
+	if (!dev)
+		IOEXIT(return STATUS_INSUFFICIENT_RESOURCES);
+	if (dev_ext_length)
+		dev->dev_ext = dev + 1;
+	else
+		dev->dev_ext = NULL;
+
+	dev_obj_ext = ((void *)(dev + 1)) + dev_ext_length;
+	dev_obj_ext->dev_obj = dev;
+	dev_obj_ext->size = 0;
+	dev_obj_ext->type = IO_TYPE_DEVICE;
+	dev->dev_obj_ext = dev_obj_ext;
+
+	dev->type = dev_type;
+	dev->flags = 0;
+	dev->size = sizeof(*dev) + dev_ext_length;
+	dev->ref_count = 1;
+	dev->attached = NULL;
+	dev->stack_count = 1;
+
+	dev->drv_obj = drv_obj;
+	dev->next = drv_obj->dev_obj;
+	drv_obj->dev_obj = dev;
+
+	dev->align_req = 1;
+	dev->characteristics = dev_chars;
+	dev->io_timer = NULL;
+	KeInitializeEvent(&dev->lock, SynchronizationEvent, TRUE);
+	dev->vpb = NULL;
+
+	IOTRACE("dev: %p, ext: %p", dev, dev->dev_ext);
+	*newdev = dev;
+	IOEXIT(return STATUS_SUCCESS);
+}
+
+wstdcall NTSTATUS WIN_FUNC(IoCreateUnprotectedSymbolicLink,2)
+	(struct unicode_string *link, struct unicode_string *dev_name)
+{
+	struct ansi_string ansi;
+
+	IOENTER("%p, %p", dev_name, link);
+	if (dev_name && (RtlUnicodeStringToAnsiString(&ansi, dev_name, TRUE) ==
+			 STATUS_SUCCESS)) {
+		IOTRACE("dev_name: %s", ansi.buf);
+		RtlFreeAnsiString(&ansi);
+	}
+	if (link && (RtlUnicodeStringToAnsiString(&ansi, link, TRUE) ==
+		     STATUS_SUCCESS)) {
+		IOTRACE("link: %s", ansi.buf);
+		RtlFreeAnsiString(&ansi);
+	}
+//	TODO();
+	IOEXIT(return STATUS_SUCCESS);
+}
+
+wstdcall NTSTATUS WIN_FUNC(IoCreateSymbolicLink,2)
+	(struct unicode_string *link, struct unicode_string *dev_name)
+{
+	IOEXIT(return IoCreateUnprotectedSymbolicLink(link, dev_name));
+}
+
+wstdcall NTSTATUS WIN_FUNC(IoDeleteSymbolicLink,1)
+	(struct unicode_string *link)
+{
+	struct ansi_string ansi;
+
+	IOENTER("%p", link);
+	if (link && (RtlUnicodeStringToAnsiString(&ansi, link, TRUE) ==
+		     STATUS_SUCCESS)) {
+		IOTRACE("dev_name: %s", ansi.buf);
+		RtlFreeAnsiString(&ansi);
+	}
+	IOEXIT(return STATUS_SUCCESS);
+}
+
+wstdcall void WIN_FUNC(IoDeleteDevice,1)
+	(struct device_object *dev)
+{
+	IOENTER("%p", dev);
+	if (dev == NULL)
+		IOEXIT(return);
+	IOTRACE("drv_obj: %p", dev->drv_obj);
+	if (dev->drv_obj) {
+		struct device_object *prev;
+
+		prev = dev->drv_obj->dev_obj;
+		IOTRACE("dev_obj: %p", prev);
+		if (prev == dev)
+			dev->drv_obj->dev_obj = dev->next;
+		else if (prev) {
+			while (prev->next != dev)
+				prev = prev->next;
+			prev->next = dev->next;
+		}
+	}
+	ObDereferenceObject(dev);
+	IOEXIT(return);
+}
+
+wstdcall void WIN_FUNC(IoDetachDevice,1)
+	(struct device_object *tgt)
+{
+	struct device_object *tail;
+
+	IOENTER("%p", tgt);
+	if (!tgt)
+		IOEXIT(return);
+	tail = tgt->attached;
+	if (!tail)
+		IOEXIT(return);
+	IOTRACE("tail: %p", tail);
+
+	spin_lock_bh(&ntoskernel_lock);
+	tgt->attached = tail->attached;
+	IOTRACE("attached:%p", tgt->attached);
+	for ( ; tail; tail = tail->attached) {
+		IOTRACE("tail:%p", tail);
+		tail->stack_count--;
+	}
+	spin_unlock_bh(&ntoskernel_lock);
+	IOEXIT(return);
+}
+
+wstdcall struct device_object *WIN_FUNC(IoGetAttachedDevice,1)
+	(struct device_object *dev)
+{
+	IOENTER("%p", dev);
+	if (!dev)
+		IOEXIT(return NULL);
+	spin_lock_bh(&ntoskernel_lock);
+	while (dev->attached)
+		dev = dev->attached;
+	spin_unlock_bh(&ntoskernel_lock);
+	IOEXIT(return dev);
+}
+
+wstdcall struct device_object *WIN_FUNC(IoGetAttachedDeviceReference,1)
+	(struct device_object *dev)
+{
+	IOENTER("%p", dev);
+	if (!dev)
+		IOEXIT(return NULL);
+	dev = IoGetAttachedDevice(dev);
+	ObReferenceObject(dev);
+	IOEXIT(return dev);
+}
+
+wstdcall struct device_object *WIN_FUNC(IoAttachDeviceToDeviceStack,2)
+	(struct device_object *src, struct device_object *tgt)
+{
+	struct device_object *attached;
+	struct dev_obj_ext *src_dev_ext;
+
+	IOENTER("%p, %p", src, tgt);
+	attached = IoGetAttachedDevice(tgt);
+	IOTRACE("%p", attached);
+	src_dev_ext = src->dev_obj_ext;
+	spin_lock_bh(&ntoskernel_lock);
+	if (attached)
+		attached->attached = src;
+	src->attached = NULL;
+	src->stack_count = attached->stack_count + 1;
+	src_dev_ext->attached_to = attached;
+	spin_unlock_bh(&ntoskernel_lock);
+	IOTRACE("stack_count: %d -> %d", attached->stack_count,
+		src->stack_count);
+	IOEXIT(return attached);
+}
+
+wstdcall NTSTATUS WIN_FUNC(IoGetDeviceProperty,5)
+	(struct device_object *pdo, enum device_registry_property dev_property,
+	 ULONG buffer_len, void *buffer, ULONG *result_len)
+{
+	struct ansi_string ansi;
+	struct unicode_string unicode;
+	struct wrap_device *wd;
+	ULONG need;
+
+	IOENTER("dev_obj = %p, dev_property = %d, buffer_len = %u, "
+		"buffer = %p, result_len = %p", pdo, dev_property,
+		buffer_len, buffer, result_len);
+
+	wd = pdo->reserved;
+	switch (dev_property) {
+	case DevicePropertyDeviceDescription:
+	case DevicePropertyFriendlyName:
+	case DevicePropertyDriverKeyName:
+		if (wrap_is_pci_bus(wd->dev_bus))
+			RtlInitAnsiString(&ansi, "PCI");
+		else // if (wrap_is_usb_bus(wd->dev_bus))
+			RtlInitAnsiString(&ansi, "USB");
+		need = sizeof(wchar_t) * (ansi.max_length + 1);
+		if (buffer_len < need) {
+			*result_len = need;
+			IOEXIT(return STATUS_BUFFER_TOO_SMALL);
+		}
+		unicode.max_length = buffer_len;
+		unicode.buf = buffer;
+		if (RtlAnsiStringToUnicodeString(&unicode, &ansi,
+						 FALSE) != STATUS_SUCCESS) {
+			*result_len = unicode.length;
+			IOEXIT(return STATUS_BUFFER_TOO_SMALL);
+		}
+		IOEXIT(return STATUS_SUCCESS);
+	default:
+		WARNING("%d not implemented", dev_property);
+		IOEXIT(return STATUS_INVALID_PARAMETER_2);
+	}
+}
+
+wstdcall NTSTATUS WIN_FUNC(IoGetDeviceObjectPointer,4)
+	(struct unicode_string *name, ACCESS_MASK desired_access,
+	 void *file_obj, struct device_object *dev_obj)
+{
+	struct common_object_header *coh;
+
+	dev_obj = NULL;
+	/* TODO: access is not checked and file_obj is set to NULL */
+	file_obj = NULL;
+	spin_lock_bh(&ntoskernel_lock);
+	nt_list_for_each_entry(coh, &object_list, list) {
+		TRACE5("header: %p, type: %d", coh, coh->type);
+		if (coh->type != OBJECT_TYPE_DEVICE)
+			continue;
+		if (!RtlCompareUnicodeString(&coh->name, name, TRUE)) {
+			dev_obj = HEADER_TO_OBJECT(coh);
+			TRACE5("dev_obj: %p", dev_obj);
+			break;
+		}
+	}
+	spin_unlock_bh(&ntoskernel_lock);
+	if (dev_obj)
+		IOEXIT(return STATUS_SUCCESS);
+	else
+		IOEXIT(return STATUS_OBJECT_NAME_INVALID);
+}
+
+/* NOTE: Make sure to compile with -freg-struct-return, so gcc will
+ * return union in register, like Windows */
+wstdcall union power_state WIN_FUNC(PoSetPowerState,3)
+	(struct device_object *dev_obj, enum power_state_type type,
+	 union power_state state)
+{
+	IOEXIT(return state);
+}
+
+wstdcall NTSTATUS WIN_FUNC(PoCallDriver,2)
+	(struct device_object *dev_obj, struct irp *irp)
+{
+	return IoCallDriver(dev_obj, irp);
+}
+
+wstdcall NTSTATUS WIN_FUNC(PoRequestPowerIrp,6)
+	(struct device_object *dev_obj, UCHAR minor_fn,
+	 union power_state power_state, void *completion_func,
+	 void *context, struct irp **pirp)
+{
+	struct irp *irp;
+	struct io_stack_location *irp_sl;
+
+	TRACE1("%p, %d, %p", dev_obj, dev_obj->stack_count, dev_obj->drv_obj);
+	irp = IoAllocateIrp(dev_obj->stack_count, FALSE);
+	if (!irp)
+		return STATUS_INSUFFICIENT_RESOURCES;
+	irp_sl = IoGetNextIrpStackLocation(irp);
+	irp_sl->major_fn = IRP_MJ_POWER;
+	irp_sl->minor_fn = minor_fn;
+	if (minor_fn == IRP_MN_WAIT_WAKE)
+		irp_sl->params.power.type = SystemPowerState;
+	else
+		irp_sl->params.power.type = DevicePowerState;
+	irp_sl->params.power.state = power_state;
+	irp_sl->completion_routine = completion_func;
+	irp->io_status.status = STATUS_NOT_SUPPORTED;
+	*pirp = irp;
+	return PoCallDriver(dev_obj, irp);
+}
+
+wstdcall void WIN_FUNC(PoStartNextPowerIrp,1)
+	(struct irp *irp)
+{
+	IOENTER("irp = %p", irp);
+	IOEXIT(return);
+}
+
+wstdcall void WIN_FUNC(IoInitializeRemoveLockEx,5)
+	(struct io_remove_lock *lock, ULONG alloc_tag, ULONG max_locked_min,
+	 ULONG high_mark, ULONG lock_size)
+{
+	TODO();
+}
+
+wstdcall void *WIN_FUNC(IoAllocateErrorLogEntry,2)
+	(void *io_object, UCHAR entry_size)
+{
+	/* not implemented fully */
+	void *ret = kmalloc(sizeof(struct io_error_log_packet) + entry_size,
+			    irql_gfp());
+	TRACE2("%p", ret);
+	if (ret)
+		return ret + sizeof(struct io_error_log_packet);
+	else
+		return NULL;
+}
+
+wstdcall void WIN_FUNC(IoWriteErrorLogEntry,1)
+	(void *entry)
+{
+	/* TODO: log error with codes and message */
+	ERROR("");
+}
+
+wstdcall void WIN_FUNC(IoFreeErrorLogEntry,1)
+	(void *entry)
+{
+	TRACE2("%p", entry);
+	kfree(entry - sizeof(struct io_error_log_packet));
+}
+
+wstdcall NTSTATUS WIN_FUNC(IoAcquireRemoveLockEx,5)
+	(struct io_remove_lock lock, void *tag, char *file, ULONG line,
+	 ULONG lock_size)
+{
+	TODO();
+	IOEXIT(return STATUS_SUCCESS);
+}
+
+wstdcall NTSTATUS WIN_FUNC(IoReleaseRemoveLockEx,3)
+	(struct io_remove_lock lock, void *tag, ULONG lock_size)
+{
+	TODO();
+	IOEXIT(return STATUS_SUCCESS);
+}
+
+wstdcall NTSTATUS WIN_FUNC(IoRegisterDeviceInterface,4)
+	(struct device_object *pdo, struct guid *guid_class,
+	 struct unicode_string *reference, struct unicode_string *link)
+{
+	struct ansi_string ansi;
+
+	/* TODO: check if pdo is valid */
+	RtlInitAnsiString(&ansi, "ndis");
+	ENTER1("pdo: %p, ref: %p, link: %p, %x, %x, %x", pdo, reference, link,
+	       guid_class->data1, guid_class->data2, guid_class->data3);
+	return RtlAnsiStringToUnicodeString(link, &ansi, TRUE);
+}
+
+wstdcall NTSTATUS WIN_FUNC(IoSetDeviceInterfaceState,2)
+	(struct unicode_string *link, BOOLEAN enable)
+{
+	ENTER1("link: %p, enable: %d", link, enable);
+	return STATUS_SUCCESS;
+}
+
+wstdcall NTSTATUS WIN_FUNC(IoOpenDeviceRegistryKey,4)
+	(struct device_object *dev_obj, ULONG type, ACCESS_MASK mask,
+	 void **handle)
+{
+	ENTER1("dev_obj: %p", dev_obj);
+	*handle = dev_obj;
+	return STATUS_SUCCESS;
+}
+
+wstdcall NTSTATUS WIN_FUNC(IoWMIRegistrationControl,2)
+	(struct device_object *dev_obj, ULONG action)
+{
+	ENTER2("%p, %d", dev_obj, action);
+	EXIT2(return STATUS_SUCCESS);
+}
+
+wstdcall void WIN_FUNC(IoInvalidateDeviceRelations,2)
+	(struct device_object *dev_obj, enum device_relation_type type)
+{
+	INFO("%p, %d", dev_obj, type);
+	TODO();
+}
+
+wstdcall void WIN_FUNC(IoInvalidateDeviceState,1)
+	(struct device_object *pdo)
+{
+	INFO("%p", pdo);
+	TODO();
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/ndiswrapper/wrapndis.h
+++ linux-mvl-dove-2.6.32/ubuntu/ndiswrapper/wrapndis.h
@@ -0,0 +1,90 @@
+/*
+ *  Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *  GNU General Public License for more details.
+ *
+ */
+
+#ifndef _WRAPNDIS_H_
+#define _WRAPNDIS_H_
+
+#include "ndis.h"
+#include "pnp.h"
+
+int wrapndis_init(void);
+void wrapndis_exit(void);
+
+NDIS_STATUS mp_reset(struct ndis_device *wnd);
+
+NDIS_STATUS mp_request(enum ndis_request_type request,
+		       struct ndis_device *wnd, ndis_oid oid,
+		       void *buf, ULONG buflen, ULONG *written, ULONG *needed);
+
+static inline NDIS_STATUS mp_query_info(struct ndis_device *wnd,
+					ndis_oid oid, void *buf, ULONG buflen,
+					ULONG *written, ULONG *needed)
+{
+	return mp_request(NdisRequestQueryInformation, wnd, oid,
+			  buf, buflen, written, needed);
+}
+
+static inline NDIS_STATUS mp_set_info(struct ndis_device *wnd,
+				      ndis_oid oid, void *buf, ULONG buflen,
+				      ULONG *written, ULONG *needed)
+{
+	return mp_request(NdisRequestSetInformation, wnd, oid,
+			  buf, buflen, written, needed);
+}
+
+static inline NDIS_STATUS mp_query(struct ndis_device *wnd, ndis_oid oid,
+				   void *buf, ULONG buflen)
+{
+	return mp_request(NdisRequestQueryInformation, wnd, oid,
+			  buf, buflen, NULL, NULL);
+}
+
+static inline NDIS_STATUS mp_query_int(struct ndis_device *wnd,
+				       ndis_oid oid, ULONG *data)
+{
+	return mp_request(NdisRequestQueryInformation, wnd, oid,
+			  data, sizeof(ULONG), NULL, NULL);
+}
+
+static inline NDIS_STATUS mp_set(struct ndis_device *wnd, ndis_oid oid,
+				 void *buf, ULONG buflen)
+{
+	return mp_request(NdisRequestSetInformation, wnd, oid,
+			  buf, buflen, NULL, NULL);
+}
+
+static inline NDIS_STATUS mp_set_int(struct ndis_device *wnd,
+				     ndis_oid oid, ULONG data)
+{
+	return mp_request(NdisRequestSetInformation, wnd, oid,
+			  &data, sizeof(ULONG), NULL, NULL);
+}
+
+void free_tx_packet(struct ndis_device *wnd, struct ndis_packet *packet,
+		    NDIS_STATUS status);
+int init_ndis_driver(struct driver_object *drv_obj);
+NDIS_STATUS ndis_reinit(struct ndis_device *wnd);
+void set_media_state(struct ndis_device *wnd, enum ndis_media_state state);
+
+void hangcheck_add(struct ndis_device *wnd);
+void hangcheck_del(struct ndis_device *wnd);
+
+driver_dispatch_t winNdisDispatchPnp;
+driver_dispatch_t winNdisDispatchPower;
+driver_dispatch_t winNdisDispatchDeviceControl;
+
+struct iw_statistics *get_iw_stats(struct net_device *dev);
+
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/ndiswrapper/crt.c
+++ linux-mvl-dove-2.6.32/ubuntu/ndiswrapper/crt.c
@@ -0,0 +1,578 @@
+/*
+ *  Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *  GNU General Public License for more details.
+ *
+ */
+
+#include "ntoskernel.h"
+#include "crt_exports.h"
+
+#ifdef CONFIG_X86_64
+/* Windows long is 32-bit, so strip single 'l' in integer formats */
+static void strip_l_modifier(char *str)
+{
+	char *ptr = str;
+	int in_format = 0;
+	char *lptr = NULL;
+	char last = 0;
+	char *end_ptr;
+	char *wptr;
+
+	/* Replace single 'l' inside integer formats with '\0' */
+	for (ptr = str; *ptr; ptr++) {
+		if (!in_format) {
+			if (*ptr == '%')
+				in_format = 1;
+			last = *ptr;
+			continue;
+		}
+		switch (*ptr) {
+		case 'd':
+		case 'i':
+		case 'o':
+		case 'u':
+		case 'x':
+		case 'X':
+		case 'p':
+		case 'n':
+		case 'm':
+			if (lptr) {
+				*lptr = '\0';
+				lptr = NULL;
+			}
+			in_format = 0;
+			break;
+		case 'c':
+		case 'C':
+		case 's':
+		case 'S':
+		case 'f':
+		case 'e':
+		case 'E':
+		case 'g':
+		case 'G':
+		case 'a':
+		case 'A':
+			lptr = NULL;
+			in_format = 0;
+			break;
+		case '%':
+			lptr = NULL;
+			if (last == '%')
+				in_format = 0;
+			else
+				in_format = 1;	/* ignore previous junk */
+			break;
+		case 'l':
+			if (last == 'l')
+				lptr = NULL;
+			else
+				lptr = ptr;
+			break;
+		default:
+			break;
+		}
+		last = *ptr;
+	}
+
+	/* Purge zeroes from the resulting string */
+	end_ptr = ptr;
+	wptr = str;
+	for (ptr = str; ptr < end_ptr; ptr++)
+		if (*ptr != 0)
+			*(wptr++) = *ptr;
+	*wptr = 0;
+}
+
+/*
+ * va_list on x86_64 Linux is designed to allow passing arguments in registers
+ * even to variadic functions.  va_list is a structure holding pointers to the
+ * register save area, which holds the arguments passed in registers, and to
+ * the stack, which may have the arguments that did not fit the registers.
+ * va_list also holds offsets in the register save area for the next general
+ * purpose and floating point registers that the next va_arg() would fetch.
+ *
+ * Unlike Linux, the Windows va_list is just a pointer to the stack.  No
+ * arguments are passed in the registers.  That's why we construct the Linux
+ * va_list so that the register save area is never used.  For that goal, we set
+ * the offsets to the maximal allowed values, meaning that the arguments passed
+ * in the registers have been exhausted.  The values are 48 for general purpose
+ * registers (6 registers, 8 bytes each) and 304 for floating point registers
+ * (16 registers, 16 bytes each, on top of general purpose register).
+ */
+
+struct x86_64_va_list {
+	int gp_offset;
+	int fp_offset;
+	void *overflow_arg_area;
+	void *reg_save_area;
+};
+
+#define VA_LIST_DECL(_args) \
+	va_list _args##new; \
+	struct x86_64_va_list *_args##x;
+#define VA_LIST_PREP(_args) \
+do { \
+	_args##x = (struct x86_64_va_list *)&_args##new; \
+	_args##x->gp_offset = 6 * 8;		/* GP registers exhausted */ \
+	_args##x->fp_offset = 6 * 8 + 16 * 16;	/* FP registers exhausted */ \
+	_args##x->overflow_arg_area = (void *)_args; \
+	_args##x->reg_save_area = NULL; \
+} while (0)
+#define VA_LIST_CONV(_args) (_args##new)
+#define VA_LIST_FREE(_args)
+#define FMT_DECL(_fmt) \
+	char *_fmt##copy; \
+	int _fmt##len;
+#define FMT_PREP(_fmt) \
+do { \
+	_fmt##len = strlen(format) + 1; \
+	_fmt##copy = kmalloc(_fmt##len, GFP_KERNEL); \
+	if (_fmt##copy) { \
+		memcpy(_fmt##copy, format, _fmt##len); \
+		strip_l_modifier(_fmt##copy); \
+	} \
+} while (0)
+#define FMT_CONV(_fmt) (_fmt##copy ? _fmt##copy : format)
+#define FMT_FREE(_fmt) kfree(_fmt##copy)
+
+#else /* !CONFIG_X86_64 */
+
+#define VA_LIST_DECL(_args)
+#define VA_LIST_PREP(_args)
+#define VA_LIST_CONV(_args) (_args)
+#define VA_LIST_FREE(_args)
+#define FMT_DECL(_fmt)
+#define FMT_PREP(_fmt)
+#define FMT_CONV(_fmt) (format)
+#define FMT_FREE(_fmt)
+
+#endif /* !CONFIG_X86_64 */
+
+noregparm INT WIN_FUNC(_win_sprintf,12)
+	(char *buf, const char *format, ...)
+{
+	va_list args;
+	int res;
+	FMT_DECL(format)
+
+	FMT_PREP(format);
+	va_start(args, format);
+	res = vsprintf(buf, FMT_CONV(format), args);
+	va_end(args);
+	FMT_FREE(format);
+
+	TRACE2("buf: %p: %s", buf, buf);
+	return res;
+}
+
+noregparm INT WIN_FUNC(swprintf,12)
+	(wchar_t *buf, const wchar_t *format, ...)
+{
+	TODO();
+	EXIT2(return 0);
+}
+
+noregparm INT WIN_FUNC(_win_vsprintf,3)
+	(char *str, const char *format, va_list ap)
+{
+	INT i;
+	VA_LIST_DECL(ap)
+	FMT_DECL(format)
+
+	VA_LIST_PREP(ap);
+	FMT_PREP(format);
+
+	i = vsprintf(str, FMT_CONV(format), VA_LIST_CONV(ap));
+	TRACE2("str: %p: %s", str, str);
+
+	FMT_FREE(format);
+	VA_LIST_FREE(ap);
+	EXIT2(return i);
+}
+
+noregparm INT WIN_FUNC(_win_snprintf,12)
+	(char *buf, SIZE_T count, const char *format, ...)
+{
+	va_list args;
+	int res;
+	FMT_DECL(format)
+
+	FMT_PREP(format);
+	va_start(args, format);
+	res = vsnprintf(buf, count, FMT_CONV(format), args);
+	va_end(args);
+	TRACE2("buf: %p: %s", buf, buf);
+
+	FMT_FREE(format);
+	return res;
+}
+
+noregparm INT WIN_FUNC(_win__snprintf,12)
+	(char *buf, SIZE_T count, const char *format, ...)
+{
+	va_list args;
+	int res;
+	FMT_DECL(format)
+
+	FMT_PREP(format);
+	va_start(args, format);
+	res = vsnprintf(buf, count, FMT_CONV(format), args);
+	va_end(args);
+	TRACE2("buf: %p: %s", buf, buf);
+
+	FMT_FREE(format);
+	return res;
+}
+
+noregparm INT WIN_FUNC(_win_vsnprintf,4)
+	(char *str, SIZE_T size, const char *format, va_list ap)
+{
+	INT i;
+	VA_LIST_DECL(ap)
+	FMT_DECL(format)
+
+	VA_LIST_PREP(ap);
+	FMT_PREP(format);
+
+	i = vsnprintf(str, size, FMT_CONV(format), VA_LIST_CONV(ap));
+	TRACE2("str: %p: %s", str, str);
+
+	FMT_FREE(format);
+	VA_LIST_FREE(ap);
+	EXIT2(return i);
+}
+
+noregparm INT WIN_FUNC(_win__vsnprintf,4)
+	(char *str, SIZE_T size, const char *format, va_list ap)
+{
+	INT i;
+	VA_LIST_DECL(ap)
+	FMT_DECL(format)
+
+	VA_LIST_PREP(ap);
+	FMT_PREP(format);
+
+	i = vsnprintf(str, size, FMT_CONV(format), VA_LIST_CONV(ap));
+	TRACE2("str: %p: %s", str, str);
+
+	FMT_FREE(format);
+	VA_LIST_FREE(ap);
+	EXIT2(return i);
+}
+
+noregparm char *WIN_FUNC(_win_strncpy,3)
+	(char *dst, char *src, SIZE_T n)
+{
+	return strncpy(dst, src, n);
+}
+
+noregparm SIZE_T WIN_FUNC(_win_strlen,1)
+	(const char *s)
+{
+	return strlen(s);
+}
+
+noregparm INT WIN_FUNC(_win_strncmp,3)
+	(const char *s1, const char *s2, SIZE_T n)
+{
+	return strncmp(s1, s2, n);
+}
+
+noregparm INT WIN_FUNC(_win_strcmp,2)
+	(const char *s1, const char *s2)
+{
+	return strcmp(s1, s2);
+}
+
+noregparm INT WIN_FUNC(_win_stricmp,2)
+	(const char *s1, const char *s2)
+{
+	return stricmp(s1, s2);
+}
+
+noregparm char *WIN_FUNC(_win_strncat,3)
+	(char *dest, const char *src, SIZE_T n)
+{
+	return strncat(dest, src, n);
+}
+
+noregparm INT WIN_FUNC(_win_wcscmp,2)
+	(const wchar_t *s1, const wchar_t *s2)
+{
+	while (*s1 && *s1 == *s2) {
+		s1++;
+		s2++;
+	}
+	return *s1 - *s2;
+}
+
+noregparm INT WIN_FUNC(_win_wcsicmp,2)
+	(const wchar_t *s1, const wchar_t *s2)
+{
+	while (*s1 && tolower((char)*s1) == tolower((char)*s2)) {
+		s1++;
+		s2++;
+	}
+	return tolower((char)*s1) - tolower((char)*s2);
+}
+
+noregparm SIZE_T WIN_FUNC(_win_wcslen,1)
+	(const wchar_t *s)
+{
+	const wchar_t *t = s;
+	while (*t)
+		t++;
+	return t - s;
+}
+
+noregparm wchar_t *WIN_FUNC(_win_wcsncpy,3)
+	(wchar_t *dest, const wchar_t *src, SIZE_T n)
+{
+	const wchar_t *s;
+	wchar_t *d;
+	s = src + n;
+	d = dest;
+	while (src < s && (*d++ = *src++))
+		;
+	if (s > src)
+		memset(d, 0, (s - src) * sizeof(wchar_t));
+	return dest;
+}
+
+noregparm wchar_t *WIN_FUNC(_win_wcscpy,2)
+	(wchar_t *dest, const wchar_t *src)
+{
+	wchar_t *d = dest;
+	while ((*d++ = *src++))
+	       ;
+	return dest;
+}
+
+noregparm wchar_t *WIN_FUNC(_win_wcscat,2)
+	(wchar_t *dest, const wchar_t *src)
+{
+	wchar_t *d;
+	d = dest;
+	while (*d)
+		d++;
+	while ((*d++ = *src++))
+		;
+	return dest;
+}
+
+noregparm INT WIN_FUNC(_win_towupper,1)
+	(wchar_t c)
+{
+	return toupper(c);
+}
+
+noregparm INT WIN_FUNC(_win_towlower,1)
+	(wchar_t c)
+{
+	return tolower(c);
+}
+
+noregparm INT WIN_FUNC(_win_tolower,1)
+	(INT c)
+{
+	return tolower(c);
+}
+
+noregparm INT WIN_FUNC(_win_toupper,1)
+	(INT c)
+{
+	return toupper(c);
+}
+
+noregparm void *WIN_FUNC(_win_strcpy,2)
+	(void *to, const void *from)
+{
+	return strcpy(to, from);
+}
+
+noregparm char *WIN_FUNC(_win_strstr,2)
+	(const char *s1, const char *s2)
+{
+	return strstr(s1, s2);
+}
+
+noregparm char *WIN_FUNC(_win_strchr,2)
+	(const char *s, int c)
+{
+	return strchr(s, c);
+}
+
+noregparm char *WIN_FUNC(_win_strrchr,2)
+	(const char *s, int c)
+{
+	return strrchr(s, c);
+}
+
+noregparm void *WIN_FUNC(_win_memmove,3)
+	(void *to, void *from, SIZE_T count)
+{
+	return memmove(to, from, count);
+}
+
+noregparm void *WIN_FUNC(_win_memchr,3)
+	(const void *s, INT c, SIZE_T n)
+{
+	return memchr(s, c, n);
+}
+
+noregparm void *WIN_FUNC(_win_memcpy,3)
+	(void *to, const void *from, SIZE_T n)
+{
+	return memcpy(to, from, n);
+}
+
+noregparm void *WIN_FUNC(_win_memset,3)
+	(void *s, char c, SIZE_T count)
+{
+	return memset(s, c, count);
+}
+
+noregparm int WIN_FUNC(_win_memcmp,3)
+	(void *s1, void *s2, SIZE_T n)
+{
+	return memcmp(s1, s2, n);
+}
+
+noregparm void WIN_FUNC(_win_srand,1)
+	(UINT seed)
+{
+	net_srandom(seed);
+}
+
+noregparm int WIN_FUNC(rand,0)
+	(void)
+{
+	char buf[6];
+	int i, n;
+
+	get_random_bytes(buf, sizeof(buf));
+	for (n = i = 0; i < sizeof(buf) ; i++)
+		n += buf[i];
+	return n;
+}
+
+noregparm int WIN_FUNC(_win_atoi,1)
+	(const char *ptr)
+{
+	int i = simple_strtol(ptr, NULL, 10);
+	return i;
+}
+
+noregparm int WIN_FUNC(_win_isprint,1)
+	(int c)
+{
+	return isprint(c);
+}
+
+wstdcall s64 WIN_FUNC(_alldiv,2)
+	(s64 a, s64 b)
+{
+	return a / b;
+}
+
+wstdcall u64 WIN_FUNC(_aulldiv,2)
+	(u64 a, u64 b)
+{
+	return a / b;
+}
+
+wstdcall s64 WIN_FUNC(_allmul,2)
+	(s64 a, s64 b)
+{
+	return a * b;
+}
+
+wstdcall u64 WIN_FUNC(_aullmul,2)
+	(u64 a, u64 b)
+{
+	return a * b;
+}
+
+wstdcall s64 WIN_FUNC(_allrem,2)
+	(s64 a, s64 b)
+{
+	return a % b;
+}
+
+wstdcall u64 WIN_FUNC(_aullrem,2)
+	(u64 a, u64 b)
+{
+	return a % b;
+}
+
+__attribute__((regparm(3))) s64 WIN_FUNC(_allshl,2)
+	(s64 a, u8 b)
+{
+	return a << b;
+}
+
+__attribute__((regparm(3))) u64 WIN_FUNC(_aullshl,2)
+	(u64 a, u8 b)
+{
+	return a << b;
+}
+
+__attribute__((regparm(3))) s64 WIN_FUNC(_allshr,2)
+	(s64 a, u8 b)
+{
+	return a >> b;
+}
+
+__attribute__((regparm(3))) u64 WIN_FUNC(_aullshr,2)
+	(u64 a, u8 b)
+{
+	return a >> b;
+}
+
+int stricmp(const char *s1, const char *s2)
+{
+	while (*s1 && tolower(*s1) == tolower(*s2)) {
+		s1++;
+		s2++;
+	}
+	return *s1 - *s2;
+}
+
+void dump_bytes(const char *ctx, const u8 *from, int len)
+{
+	int i, j;
+	u8 *buf;
+
+	buf = kmalloc(len * 3 + 1, irql_gfp());
+	if (!buf) {
+		ERROR("couldn't allocate memory");
+		return;
+	}
+	for (i = j = 0; i < len; i++, j += 3) {
+		sprintf(&buf[j], "%02x ", from[i]);
+	}
+	buf[j] = 0;
+	printk(KERN_DEBUG "%s: %p: %s\n", ctx, from, buf);
+	kfree(buf);
+}
+
+int crt_init(void)
+{
+	return 0;
+}
+
+/* called when module is being removed */
+void crt_exit(void)
+{
+	EXIT4(return);
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/ndiswrapper/pe_linker.c
+++ linux-mvl-dove-2.6.32/ubuntu/ndiswrapper/pe_linker.c
@@ -0,0 +1,609 @@
+/*
+ *  Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *  GNU General Public License for more details.
+ *
+ */
+
+#ifdef TEST_LOADER
+
+#include "usr_linker.h"
+
+#else
+
+#include <linux/types.h>
+#include <asm/errno.h>
+
+//#define DEBUGLINKER 2
+
+#include "ntoskernel.h"
+
+#endif
+
+struct pe_exports {
+	char *dll;
+	char *name;
+	generic_func addr;
+};
+
+static struct pe_exports pe_exports[40];
+static int num_pe_exports;
+
+#define RVA2VA(image, rva, type) (type)(ULONG_PTR)((void *)image + rva)
+#define CHECK_SZ(a,b) { if (sizeof(a) != b) {				\
+			ERROR("%s is bad, got %zd, expected %d",	\
+			      #a , sizeof(a), (b)); return -EINVAL; } }
+
+#if defined(DEBUGLINKER) && DEBUGLINKER > 0
+#define DBGLINKER(fmt, ...) printk(KERN_INFO "%s (%s:%d): " fmt "\n",	\
+				   DRIVER_NAME, __func__,		\
+				   __LINE__ , ## __VA_ARGS__);
+static const char *image_directory_name[] = {
+	"EXPORT",
+	"IMPORT",
+	"RESOURCE",
+	"EXCEPTION",
+	"SECURITY",
+	"BASERELOC",
+	"DEBUG",
+	"COPYRIGHT",
+	"GLOBALPTR",
+	"TLS",
+	"LOAD_CONFIG",
+	"BOUND_IMPORT",
+	"IAT",
+	"DELAY_IMPORT",
+	"COM_DESCRIPTOR" };
+#else
+#define DBGLINKER(fmt, ...) do { } while (0)
+#endif
+
+#ifndef TEST_LOADER
+extern struct wrap_export ntoskernel_exports[], ntoskernel_io_exports[],
+	ndis_exports[], crt_exports[], hal_exports[], rtl_exports[];
+#ifdef ENABLE_USB
+extern struct wrap_export usb_exports[];
+#endif
+
+static char *get_export(char *name)
+{
+	int i;
+
+	for (i = 0 ; ntoskernel_exports[i].name != NULL; i++)
+		if (strcmp(ntoskernel_exports[i].name, name) == 0)
+			return (char *)ntoskernel_exports[i].func;
+
+	for (i = 0 ; ntoskernel_io_exports[i].name != NULL; i++)
+		if (strcmp(ntoskernel_io_exports[i].name, name) == 0)
+			return (char *)ntoskernel_io_exports[i].func;
+
+	for (i = 0 ; ndis_exports[i].name != NULL; i++)
+		if (strcmp(ndis_exports[i].name, name) == 0)
+			return (char *)ndis_exports[i].func;
+
+	for (i = 0 ; crt_exports[i].name != NULL; i++)
+		if (strcmp(crt_exports[i].name, name) == 0)
+			return (char *)crt_exports[i].func;
+
+	for (i = 0 ; hal_exports[i].name != NULL; i++)
+		if (strcmp(hal_exports[i].name, name) == 0)
+			return (char *)hal_exports[i].func;
+
+	for (i = 0 ; rtl_exports[i].name != NULL; i++)
+		if (strcmp(rtl_exports[i].name, name) == 0)
+			return (char *)rtl_exports[i].func;
+
+#ifdef ENABLE_USB
+	for (i = 0 ; usb_exports[i].name != NULL; i++)
+		if (strcmp(usb_exports[i].name, name) == 0)
+			return (char *)usb_exports[i].func;
+#endif
+
+	for (i = 0; i < num_pe_exports; i++)
+		if (strcmp(pe_exports[i].name, name) == 0)
+			return (char *)pe_exports[i].addr;
+
+	return NULL;
+}
+#endif // TEST_LOADER
+
+static void *get_dll_init(char *name)
+{
+	int i;
+	for (i = 0; i < num_pe_exports; i++)
+		if ((strcmp(pe_exports[i].dll, name) == 0) &&
+		    (strcmp(pe_exports[i].name, "DllInitialize") == 0))
+			return (void *)pe_exports[i].addr;
+	return NULL;
+}
+
+/*
+ * Find and validate the coff header
+ *
+ */
+static int check_nt_hdr(IMAGE_NT_HEADERS *nt_hdr)
+{
+	int i;
+	WORD attr;
+	PIMAGE_OPTIONAL_HEADER opt_hdr;
+
+	/* Validate the "PE\0\0" signature */
+	if (nt_hdr->Signature != IMAGE_NT_SIGNATURE) {
+		ERROR("is this driver file? bad signature %08x",
+		      nt_hdr->Signature);
+		return -EINVAL;
+	}
+
+	opt_hdr = &nt_hdr->OptionalHeader;
+	/* Make sure Image is PE32 or PE32+ */
+#ifdef CONFIG_X86_64
+	if (opt_hdr->Magic != IMAGE_NT_OPTIONAL_HDR64_MAGIC) {
+		ERROR("kernel is 64-bit, but Windows driver is not 64-bit;"
+		      "bad magic: %04X", opt_hdr->Magic);
+		return -EINVAL;
+	}
+#else
+	if (opt_hdr->Magic != IMAGE_NT_OPTIONAL_HDR32_MAGIC) {
+		ERROR("kernel is 32-bit, but Windows driver is not 32-bit;"
+		      "bad magic: %04X", opt_hdr->Magic);
+		return -EINVAL;
+	}
+#endif
+
+	/* Validate the image for the current architecture. */
+#ifdef CONFIG_X86_64
+	if (nt_hdr->FileHeader.Machine != IMAGE_FILE_MACHINE_AMD64) {
+		ERROR("kernel is 64-bit, but Windows driver is not 64-bit;"
+		      " (PE signature is %04X)", nt_hdr->FileHeader.Machine);
+		return -EINVAL;
+	}
+#else
+	if (nt_hdr->FileHeader.Machine != IMAGE_FILE_MACHINE_I386) {
+		ERROR("kernel is 32-bit, but Windows driver is not 32-bit;"
+		      " (PE signature is %04X)", nt_hdr->FileHeader.Machine);
+		return -EINVAL;
+	}
+#endif
+
+	/* Must have attributes */
+#ifdef CONFIG_X86_64
+	attr = IMAGE_FILE_EXECUTABLE_IMAGE | IMAGE_FILE_LARGE_ADDRESS_AWARE;
+#else
+	attr = IMAGE_FILE_EXECUTABLE_IMAGE | IMAGE_FILE_32BIT_MACHINE;
+#endif
+	if ((nt_hdr->FileHeader.Characteristics & attr) != attr)
+		return -EINVAL;
+
+	/* Must be relocatable */
+	attr = IMAGE_FILE_RELOCS_STRIPPED;
+	if ((nt_hdr->FileHeader.Characteristics & attr))
+		return -EINVAL;
+
+	/* Make sure we have at least one section */
+	if (nt_hdr->FileHeader.NumberOfSections == 0)
+		return -EINVAL;
+
+	if (opt_hdr->SectionAlignment < opt_hdr->FileAlignment) {
+		ERROR("alignment mismatch: secion: 0x%x, file: 0x%x",
+		      opt_hdr->SectionAlignment, opt_hdr->FileAlignment);
+		return -EINVAL;
+	}
+
+	DBGLINKER("number of datadictionary entries %d",
+		  opt_hdr->NumberOfRvaAndSizes);
+	for (i = 0; i < opt_hdr->NumberOfRvaAndSizes; i++) {
+		DBGLINKER("datadirectory %s RVA:%X Size:%d",
+			  (i<=IMAGE_DIRECTORY_ENTRY_COM_DESCRIPTOR)?
+			  image_directory_name[i] : "unknown",
+			  opt_hdr->DataDirectory[i].VirtualAddress,
+			  opt_hdr->DataDirectory[i].Size);
+	}
+
+	if ((nt_hdr->FileHeader.Characteristics & IMAGE_FILE_EXECUTABLE_IMAGE))
+		return IMAGE_FILE_EXECUTABLE_IMAGE;
+	if ((nt_hdr->FileHeader.Characteristics & IMAGE_FILE_DLL))
+		return IMAGE_FILE_DLL;
+	return -EINVAL;
+}
+
+static int import(void *image, IMAGE_IMPORT_DESCRIPTOR *dirent, char *dll)
+{
+	ULONG_PTR *lookup_tbl, *address_tbl;
+	char *symname = NULL;
+	int i;
+	int ret = 0;
+	void *adr;
+
+	lookup_tbl  = RVA2VA(image, dirent->u.OriginalFirstThunk, ULONG_PTR *);
+	address_tbl = RVA2VA(image, dirent->FirstThunk, ULONG_PTR *);
+
+	for (i = 0; lookup_tbl[i]; i++) {
+		if (IMAGE_SNAP_BY_ORDINAL(lookup_tbl[i])) {
+			ERROR("ordinal import not supported: %Lu",
+			      (uint64_t)lookup_tbl[i]);
+			return -1;
+		}
+		else {
+			symname = RVA2VA(image,
+					 ((lookup_tbl[i] &
+					   ~IMAGE_ORDINAL_FLAG) + 2), char *);
+		}
+
+		adr = get_export(symname);
+		if (adr == NULL) {
+			ERROR("unknown symbol: %s:'%s'", dll, symname);
+			ret = -1;
+		} else {
+			DBGLINKER("found symbol: %s:%s: addr: %p, rva = %Lu",
+				  dll, symname, adr, (uint64_t)address_tbl[i]);
+			address_tbl[i] = (ULONG_PTR)adr;
+		}
+	}
+	return ret;
+}
+
+static int read_exports(struct pe_image *pe)
+{
+	IMAGE_EXPORT_DIRECTORY *export_dir_table;
+	uint32_t *export_addr_table;
+	int i;
+	uint32_t *name_table;
+	PIMAGE_OPTIONAL_HEADER opt_hdr;
+	IMAGE_DATA_DIRECTORY *export_data_dir;
+
+	opt_hdr = &pe->nt_hdr->OptionalHeader;
+	export_data_dir =
+		&opt_hdr->DataDirectory[IMAGE_DIRECTORY_ENTRY_EXPORT];
+
+	if (export_data_dir->Size == 0) {
+		DBGLINKER("no exports");
+		return 0;
+	}
+
+	export_dir_table =
+		RVA2VA(pe->image, export_data_dir->VirtualAddress,
+		       IMAGE_EXPORT_DIRECTORY *);
+
+	name_table = (unsigned int *)(pe->image +
+				      export_dir_table->AddressOfNames);
+	export_addr_table = (uint32_t *)
+		(pe->image + export_dir_table->AddressOfFunctions);
+
+	for (i = 0; i < export_dir_table->NumberOfNames; i++) {
+
+		if (export_data_dir->VirtualAddress <= *export_addr_table ||
+		    *export_addr_table >= (export_data_dir->VirtualAddress +
+					   export_data_dir->Size))
+			DBGLINKER("forwarder rva");
+
+		DBGLINKER("export symbol: %s, at %p",
+			  (char *)(pe->image + *name_table),
+			  pe->image + *export_addr_table);
+
+		pe_exports[num_pe_exports].dll = pe->name;
+		pe_exports[num_pe_exports].name = pe->image + *name_table;
+		pe_exports[num_pe_exports].addr =
+			pe->image + *export_addr_table;
+
+		num_pe_exports++;
+		name_table++;
+		export_addr_table++;
+	}
+	return 0;
+}
+
+static int fixup_imports(void *image, IMAGE_NT_HEADERS *nt_hdr)
+{
+	int i;
+	char *name;
+	int ret = 0;
+	IMAGE_IMPORT_DESCRIPTOR *dirent;
+	IMAGE_DATA_DIRECTORY *import_data_dir;
+	PIMAGE_OPTIONAL_HEADER opt_hdr;
+
+	opt_hdr = &nt_hdr->OptionalHeader;
+	import_data_dir =
+		&opt_hdr->DataDirectory[IMAGE_DIRECTORY_ENTRY_IMPORT];
+	dirent = RVA2VA(image, import_data_dir->VirtualAddress,
+			IMAGE_IMPORT_DESCRIPTOR *);
+
+	for (i = 0; dirent[i].Name; i++) {
+		name = RVA2VA(image, dirent[i].Name, char*);
+
+		DBGLINKER("imports from dll: %s", name);
+		ret += import(image, &dirent[i], name);
+	}
+	return ret;
+}
+
+static int fixup_reloc(void *image, IMAGE_NT_HEADERS *nt_hdr)
+{
+	ULONG_PTR base;
+	ULONG_PTR size;
+	IMAGE_BASE_RELOCATION *fixup_block;
+	IMAGE_DATA_DIRECTORY *base_reloc_data_dir;
+	PIMAGE_OPTIONAL_HEADER opt_hdr;
+
+	opt_hdr = &nt_hdr->OptionalHeader;
+	base = opt_hdr->ImageBase;
+	base_reloc_data_dir =
+		&opt_hdr->DataDirectory[IMAGE_DIRECTORY_ENTRY_BASERELOC];
+	if (base_reloc_data_dir->Size == 0)
+		return 0;
+
+	fixup_block = RVA2VA(image, base_reloc_data_dir->VirtualAddress,
+			     IMAGE_BASE_RELOCATION *);
+	DBGLINKER("fixup_block=%p, image=%p", fixup_block, image);
+	DBGLINKER("fixup_block info: %x %d",
+		  fixup_block->VirtualAddress, fixup_block->SizeOfBlock);
+
+	while (fixup_block->SizeOfBlock) {
+		int i;
+		WORD fixup, offset;
+
+		size = (fixup_block->SizeOfBlock -
+			sizeof(IMAGE_BASE_RELOCATION)) / sizeof(WORD);
+		DBGLINKER("found %Lu relocations in this block",
+			  (uint64_t)size);
+
+		for (i = 0; i < size; i++) {
+			fixup = fixup_block->TypeOffset[i];
+			offset = fixup & 0xfff;
+			switch ((fixup >> 12) & 0x0f) {
+			case IMAGE_REL_BASED_ABSOLUTE:
+				break;
+
+			case IMAGE_REL_BASED_HIGHLOW: {
+				uint32_t addr;
+				uint32_t *loc =
+					RVA2VA(image,
+					       fixup_block->VirtualAddress +
+					       offset, uint32_t *);
+				addr = RVA2VA(image, (*loc - base), uint32_t);
+				DBGLINKER("relocation: *%p (Val:%X)= %X",
+					  loc, *loc, addr);
+				*loc = addr;
+			}
+				break;
+
+			case IMAGE_REL_BASED_DIR64: {
+				uint64_t addr;
+				uint64_t *loc =
+					RVA2VA(image,
+					       fixup_block->VirtualAddress +
+					       offset, uint64_t *);
+				addr = RVA2VA(image, (*loc - base), uint64_t);
+				DBGLINKER("relocation: *%p (Val:%llX)= %llx",
+					  loc, *loc, addr);
+				*loc = addr;
+			}
+				break;
+
+			default:
+				ERROR("unknown fixup: %08X",
+				      (fixup >> 12) & 0x0f);
+				return -EOPNOTSUPP;
+				break;
+			}
+		}
+		DBGLINKER("finished relocating block");
+
+		fixup_block = (IMAGE_BASE_RELOCATION *)
+			((void *)fixup_block + fixup_block->SizeOfBlock);
+	};
+	DBGLINKER("done relocating all");
+
+	return 0;
+}
+
+/* Expand the image in memroy if necessary. The image on disk does not
+ * necessarily maps the image of the driver in memory, so we have to
+ * re-write it in order to fullfill the sections alignements. The
+ * advantage to do that is that rva_to_va becomes a simple
+ * addition. */
+static int fix_pe_image(struct pe_image *pe)
+{
+	void *image;
+	IMAGE_SECTION_HEADER *sect_hdr;
+	int i, sections;
+	int image_size;
+
+	if (pe->size == pe->opt_hdr->SizeOfImage) {
+		/* Nothing to do */
+		return 0;
+	}
+
+	image_size = pe->opt_hdr->SizeOfImage;
+#ifdef CONFIG_X86_64
+#ifdef PAGE_KERNEL_EXECUTABLE
+	image = __vmalloc(image_size, GFP_KERNEL | __GFP_HIGHMEM,
+			  PAGE_KERNEL_EXECUTABLE);
+#elif defined PAGE_KERNEL_EXEC
+	image = __vmalloc(image_size, GFP_KERNEL | __GFP_HIGHMEM,
+			  PAGE_KERNEL_EXEC);
+#else
+#error x86_64 should have either PAGE_KERNEL_EXECUTABLE or PAGE_KERNEL_EXEC
+#endif
+#else
+#ifdef cpu_has_nx
+	/* hate to play with kernel macros, but PAGE_KERNEL_EXEC is
+	 * not available to modules! */
+	if (cpu_has_nx)
+		image = __vmalloc(image_size, GFP_KERNEL | __GFP_HIGHMEM,
+				  __pgprot(__PAGE_KERNEL & ~_PAGE_NX));
+	else
+		image = vmalloc(image_size);
+#else
+		image = vmalloc(image_size);
+#endif
+#endif
+	if (image == NULL) {
+		ERROR("failed to allocate enough space for new image:"
+		      " %d bytes", image_size);
+		return -ENOMEM;
+	}
+
+	/* Copy all the headers, ie everything before the first section. */
+
+	sections = pe->nt_hdr->FileHeader.NumberOfSections;
+	sect_hdr = IMAGE_FIRST_SECTION(pe->nt_hdr);
+
+	DBGLINKER("copying headers: %u bytes", sect_hdr->PointerToRawData);
+
+	memcpy(image, pe->image, sect_hdr->PointerToRawData);
+
+	/* Copy all the sections */
+	for (i = 0; i < sections; i++) {
+		DBGLINKER("Copy section %s from %x to %x",
+			  sect_hdr->Name, sect_hdr->PointerToRawData,
+			  sect_hdr->VirtualAddress);
+		if (sect_hdr->VirtualAddress+sect_hdr->SizeOfRawData >
+		    image_size) {
+			ERROR("Invalid section %s in driver", sect_hdr->Name);
+			vfree(image);
+			return -EINVAL;
+		}
+
+		memcpy(image+sect_hdr->VirtualAddress,
+		       pe->image + sect_hdr->PointerToRawData,
+		       sect_hdr->SizeOfRawData);
+		sect_hdr++;
+	}
+
+	vfree(pe->image);
+	pe->image = image;
+	pe->size = image_size;
+
+	/* Update our internal pointers */
+	pe->nt_hdr = (IMAGE_NT_HEADERS *)
+		(pe->image + ((IMAGE_DOS_HEADER *)pe->image)->e_lfanew);
+	pe->opt_hdr = &pe->nt_hdr->OptionalHeader;
+
+	DBGLINKER("set nt headers: nt_hdr=%p, opt_hdr=%p, image=%p",
+		  pe->nt_hdr, pe->opt_hdr, pe->image);
+
+	return 0;
+}
+
+#if defined(CONFIG_X86_64)
+static void fix_user_shared_data_addr(char *driver, unsigned long length)
+{
+	unsigned long i, n, max_addr, *addr;
+
+	n = length - sizeof(unsigned long);
+	max_addr = KI_USER_SHARED_DATA + sizeof(kuser_shared_data);
+	for (i = 0; i < n; i++) {
+		addr = (unsigned long *)(driver + i);
+		if (*addr >= KI_USER_SHARED_DATA && *addr < max_addr) {
+			*addr -= KI_USER_SHARED_DATA;
+			*addr += (unsigned long)&kuser_shared_data;
+			kuser_shared_data.reserved1 = 1;
+		}
+	}
+}
+#endif
+
+int link_pe_images(struct pe_image *pe_image, unsigned short n)
+{
+	int i;
+	struct pe_image *pe;
+
+#ifdef DEBUG
+	/* Sanity checkings */
+	CHECK_SZ(IMAGE_SECTION_HEADER, IMAGE_SIZEOF_SECTION_HEADER);
+	CHECK_SZ(IMAGE_FILE_HEADER, IMAGE_SIZEOF_FILE_HEADER);
+	CHECK_SZ(IMAGE_OPTIONAL_HEADER, IMAGE_SIZEOF_NT_OPTIONAL_HEADER);
+	CHECK_SZ(IMAGE_NT_HEADERS, 4 + IMAGE_SIZEOF_FILE_HEADER +
+		 IMAGE_SIZEOF_NT_OPTIONAL_HEADER);
+	CHECK_SZ(IMAGE_DOS_HEADER, 0x40);
+	CHECK_SZ(IMAGE_EXPORT_DIRECTORY, 40);
+	CHECK_SZ(IMAGE_BASE_RELOCATION, 8);
+	CHECK_SZ(IMAGE_IMPORT_DESCRIPTOR, 20);
+#endif
+
+	for (i = 0; i < n; i++) {
+		IMAGE_DOS_HEADER *dos_hdr;
+		pe = &pe_image[i];
+		dos_hdr = pe->image;
+
+		if (pe->size < sizeof(IMAGE_DOS_HEADER)) {
+			TRACE1("image too small: %d", pe->size);
+			return -EINVAL;
+		}
+
+		pe->nt_hdr =
+			(IMAGE_NT_HEADERS *)(pe->image + dos_hdr->e_lfanew);
+		pe->opt_hdr = &pe->nt_hdr->OptionalHeader;
+
+		pe->type = check_nt_hdr(pe->nt_hdr);
+		if (pe->type <= 0) {
+			TRACE1("type <= 0");
+			return -EINVAL;
+		}
+
+		if (fix_pe_image(pe)) {
+			TRACE1("bad PE image");
+			return -EINVAL;
+		}
+
+		if (read_exports(pe)) {
+			TRACE1("read exports failed");
+			return -EINVAL;
+		}
+	}
+
+	for (i = 0; i < n; i++) {
+	        pe = &pe_image[i];
+
+		if (fixup_reloc(pe->image, pe->nt_hdr)) {
+			TRACE1("fixup reloc failed");
+			return -EINVAL;
+		}
+		if (fixup_imports(pe->image, pe->nt_hdr)) {
+			TRACE1("fixup imports failed");
+			return -EINVAL;
+		}
+#if defined(CONFIG_X86_64)
+		INFO("fixing KI_USER_SHARED_DATA address in the driver");
+		fix_user_shared_data_addr(pe_image[i].image, pe_image[i].size);
+#endif
+		flush_icache_range(pe->image, pe->size);
+
+		pe->entry =
+			RVA2VA(pe->image,
+			       pe->opt_hdr->AddressOfEntryPoint, void *);
+		TRACE1("entry is at %p, rva at %08X", pe->entry,
+		       pe->opt_hdr->AddressOfEntryPoint);
+	}
+
+	for (i = 0; i < n; i++) {
+	        pe = &pe_image[i];
+
+		if (pe->type == IMAGE_FILE_DLL) {
+			struct unicode_string ustring;
+			char *buf = "0/0t0m0p00";
+			int (*dll_entry)(struct unicode_string *ustring)
+				wstdcall;
+
+			memset(&ustring, 0, sizeof(ustring));
+			ustring.buf = (wchar_t *)buf;
+			dll_entry = (void *)get_dll_init(pe->name);
+
+			TRACE1("calling dll_init at %p", dll_entry);
+			if (!dll_entry || dll_entry(&ustring))
+				ERROR("DLL initialize failed for %s",
+				      pe->name);
+		}
+		else if (pe->type != IMAGE_FILE_EXECUTABLE_IMAGE)
+			ERROR("illegal image type: %d", pe->type);
+	}
+	return 0;
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/ndiswrapper/wrapmem.h
+++ linux-mvl-dove-2.6.32/ubuntu/ndiswrapper/wrapmem.h
@@ -0,0 +1,94 @@
+/*
+ *  Copyright (C) 2006 Giridhar Pemmasani
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *  GNU General Public License for more details.
+ *
+ */
+
+#ifndef _WRAPMEM_H_
+
+/* set ALLOC_DEBUG to 1 to get information about memory used by both
+ * ndiswrapper and Windows driver by reading
+ * /proc/net/ndiswrapper/debug; this will also show memory leaks
+ * (memory allocated but not freed) when ndiswrapper module is
+ * unloaded.
+
+ * ALLOC_DEBUG=2: details about individual allocations leaking is printed
+ * ALLOC_DEBUG=3: tags in ExAllocatePoolWithTag leaking printed
+*/
+
+//#ifndef ALLOC_DEBUG
+//#define ALLOC_DEBUG 1
+//#endif
+
+enum alloc_type { ALLOC_TYPE_KMALLOC_ATOMIC, ALLOC_TYPE_KMALLOC_NON_ATOMIC,
+		  ALLOC_TYPE_VMALLOC_ATOMIC, ALLOC_TYPE_VMALLOC_NON_ATOMIC,
+		  ALLOC_TYPE_SLACK, ALLOC_TYPE_PAGES, ALLOC_TYPE_MAX };
+
+int wrapmem_init(void);
+void wrapmem_exit(void);
+void *slack_kmalloc(size_t size);
+void slack_kfree(void *ptr);
+void wrapmem_info(void);
+
+#ifdef ALLOC_DEBUG
+void *wrap_kmalloc(size_t size, gfp_t flags, const char *file, int line);
+void *wrap_kzalloc(size_t size, gfp_t flags, const char *file, int line);
+void wrap_kfree(void *ptr);
+void *wrap_vmalloc(unsigned long size, const char *file, int line);
+void *wrap__vmalloc(unsigned long size, gfp_t flags, pgprot_t prot,
+		    const char *file, int line);
+void wrap_vfree(void *ptr);
+void *wrap_alloc_pages(gfp_t flags, unsigned int size,
+		       const char *file, int line);
+void wrap_free_pages(unsigned long ptr, int order);
+int alloc_size(enum alloc_type type);
+
+#ifndef _WRAPMEM_C_
+#undef kmalloc
+#undef kzalloc
+#undef kfree
+#undef vmalloc
+#undef __vmalloc
+#undef vfree
+#define kmalloc(size, flags)				\
+	wrap_kmalloc(size, flags, __FILE__, __LINE__)
+#define kzalloc(size, flags)				\
+	wrap_kzalloc(size, flags, __FILE__, __LINE__)
+#define vmalloc(size)				\
+	wrap_vmalloc(size, __FILE__, __LINE__)
+#define __vmalloc(size, flags, prot)				\
+	wrap__vmalloc(size, flags, prot, __FILE__, __LINE__)
+#define kfree(ptr) wrap_kfree(ptr)
+#define vfree(ptr) wrap_vfree(ptr)
+
+#define wrap_get_free_pages(flags, size)			\
+	wrap_alloc_pages(flags, size, __FILE__, __LINE__)
+#undef free_pages
+#define free_pages(ptr, order) wrap_free_pages(ptr, order)
+
+#if ALLOC_DEBUG > 1
+void *wrap_ExAllocatePoolWithTag(enum pool_type pool_type, SIZE_T size,
+				 ULONG tag, const char *file, int line);
+#define ExAllocatePoolWithTag(pool_type, size, tag)			\
+	wrap_ExAllocatePoolWithTag(pool_type, size, tag, __FILE__, __LINE__)
+#endif
+
+#endif // _WRAPMEM_C_
+
+#else
+
+#define wrap_get_free_pages(flags, size)			\
+	(void *)__get_free_pages(flags, get_order(size))
+
+#endif // ALLOC_DEBUG
+
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/ndiswrapper/win2lin_stubs.S
+++ linux-mvl-dove-2.6.32/ubuntu/ndiswrapper/win2lin_stubs.S
@@ -0,0 +1,288 @@
+/*
+ *  Copyright (C) 2005 Karl Vogel, Giridhar Pemmasani
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *  GNU General Public License for more details.
+ *
+ */
+
+#include <linux/linkage.h>
+
+#ifdef CONFIG_X86_64
+
+/*
+# Windows <---> Linux register usage conversion when calling functions
+# V = Volatile
+# NV = Non Volatile (needs to be saved)
+#
+#         Win                     Lin
+# ---------------------------------------
+# Rax    Return           V       Return          V
+# Rbx                     NV                      NV
+# Rcx     Arg1            V       Arg4            V
+# Rdx     Arg2            V       Arg3            V
+# Rsi                     NV      Arg2            V
+# Rdi                     NV      Arg1            V
+# Rsp                     NV                      NV
+# Rbp                     NV                      NV
+# R8      Arg3            V       Arg5            V
+# R9      Arg4            V       Arg6            V
+# R10                     V                       V
+# R11                     V                       V
+# R12                     NV                      NV
+# R13                     NV                      NV
+# R14                     NV                      NV
+# R15                     NV                      NV
+#
+# In addition, Linux uses %rax to indicate number of SSE registers used
+# when variadic functions are called. Since there is no way to obtain this
+# from Windows, for now, we just assume this is 0 (hence %rax is cleared).
+#
+# Windows pushes arguments 5 and higher onto stack in case of integer
+# variables and 4 and higher in case of floating point variabes (passed
+# in SSE registers).
+
+In a windows function, the stackframe/registers look like this:
+
+# 0x0048 ....
+# 0x0040 arg8
+# 0x0038 arg7
+# 0x0030 arg6
+# 0x0028 arg5
+# 0x0020 shadow/spill space for arg4
+# 0x0018 shadow/spill space for arg3
+# 0x0010 shadow/spill space for arg2
+# 0x0008 shadow/spill space for arg1
+# 0x0000 ret
+
+# register spill space is same irrespective of number of arguments - even
+# if Windows function takes less than 4 arguments, 32 bytes above return
+# address is reserved for the function
+
+In Linux it should look like:
+
+# 0x0018 ....
+# 0x0010 arg8
+# 0x0008 arg7
+# 0x0000 ret
+
+*/
+
+#
+# setup for Windows to Linux function call
+#
+
+	.text
+
+.macro win2lin_prolog
+	push	%rsi
+	push	%rdi
+.endm
+
+.macro win2lin_epilog
+	pop	%rdi
+	pop	%rsi
+.endm
+
+# when Windows function calls Linux function, the function address is in %r10
+
+.macro call_lin_func
+	xor	%rax, %rax	# rax indicates number of SSE regs
+	call	*%r10
+.endm
+
+# before prolog, 0(%rsp) is return address, 8(%rsp) would be arg1
+# (but it is in register) and so on, so n'th arg would be at n*8(%rsp)
+# for n > 4. But in prolog, we push 2 registers that are non-volaile in
+# Windows, but volatile in Linux. So after prolog, args are at (n+2)*8(%rsp)
+
+#define win2lin_win_arg(n) (n+2)*8(%rsp)
+
+#define win2lin_arg1 mov %rcx, %rdi
+#define win2lin_arg2 mov %rdx, %rsi
+#define win2lin_arg3 mov %r8, %rdx
+#define win2lin_arg4 mov %r9, %rcx
+#define win2lin_arg5 mov win2lin_win_arg(5), %r8
+#define win2lin_arg6 mov win2lin_win_arg(6), %r9
+
+	.type	win2lin0, @function
+win2lin0:
+	win2lin_prolog
+	call_lin_func
+	win2lin_epilog
+	ret
+	.size	win2lin0, .-win2lin0
+
+	.type	win2lin1, @function
+win2lin1:
+	win2lin_prolog
+	win2lin_arg1
+	call_lin_func
+	win2lin_epilog
+	ret
+	.size	win2lin1, .-win2lin1
+
+	.type	win2lin2, @function
+win2lin2:
+	win2lin_prolog
+	win2lin_arg1
+	win2lin_arg2
+	call_lin_func
+	win2lin_epilog
+	ret
+	.size	win2lin2, .-win2lin2
+
+	.type	win2lin3, @function
+win2lin3:
+	win2lin_prolog
+	win2lin_arg1
+	win2lin_arg2
+	win2lin_arg3
+	call_lin_func
+	win2lin_epilog
+	ret
+	.size	win2lin3, .-win2lin3
+
+	.type	win2lin4, @function
+win2lin4:
+	win2lin_prolog
+	win2lin_arg1
+	win2lin_arg2
+	win2lin_arg3
+	win2lin_arg4
+	call_lin_func
+	win2lin_epilog
+	ret
+	.size	win2lin4, .-win2lin4
+
+	.type	win2lin5, @function
+win2lin5:
+	win2lin_prolog
+	win2lin_arg1
+	win2lin_arg2
+	win2lin_arg3
+	win2lin_arg4
+	win2lin_arg5
+	call_lin_func
+	win2lin_epilog
+	ret
+	.size	win2lin5, .-win2lin5
+
+	.type	win2lin6, @function
+win2lin6:
+	win2lin_prolog
+	win2lin_arg1
+	win2lin_arg2
+	win2lin_arg3
+	win2lin_arg4
+	win2lin_arg5
+	win2lin_arg6
+	call_lin_func
+	win2lin_epilog
+	ret
+	.size	win2lin6, .-win2lin6
+
+# Allocate stack frame for Linux arguments before calling function.
+# First 6 args are passed through registers, so we need space for 7 and above.
+# The arguments should have been copied onto stack already.
+
+.macro call_lin_func_args n
+	sub $(\n-6)*8, %rsp
+	call_lin_func
+	add $(\n-6)*8, %rsp
+	.endm
+
+# m is index of Linux arg required, n is total number of args to function
+# After stack frame is allocated, Linux arg 7 should be at 0(%rsp),
+# arg 8 should be at 1*8(%rsp) and so on. So Linux arg m should be at (m-7)*8
+# Stack frame starts at -(n-6)*8(%rsp), so before stack frame is allocated
+# Linux arg m should be at (6-n+m-7)*8(%rsp)
+
+#define win2lin_lin_arg(m,n) (m-1-n)*8(%rsp)
+
+	.type	win2lin7, @function
+win2lin7:
+	win2lin_prolog
+
+	win2lin_arg1
+	win2lin_arg2
+	win2lin_arg3
+	win2lin_arg4
+	win2lin_arg5
+	win2lin_arg6
+
+	# copy windows argument 7 onto stack for Linux function
+	mov	win2lin_win_arg(7), %r11
+	mov	%r11, win2lin_lin_arg(7,7)
+
+	call_lin_func_args(7)
+	win2lin_epilog
+	ret
+	.size	win2lin7, .-win2lin7
+
+	.type	win2lin8, @function
+win2lin8:
+	win2lin_prolog
+
+	win2lin_arg1
+	win2lin_arg2
+	win2lin_arg3
+	win2lin_arg4
+	win2lin_arg5
+	win2lin_arg6
+
+	# copy windows arguments 7 and 8 onto stack for Linux function
+	mov	win2lin_win_arg(7), %r11
+	mov	%r11, win2lin_lin_arg(7,8)
+	mov	win2lin_win_arg(8), %r11
+	mov	%r11, win2lin_lin_arg(8,8)
+
+	call_lin_func_args(8)
+	win2lin_epilog
+	ret
+	.size	win2lin8, .-win2lin8
+
+	.type	win2lin9, @function
+win2lin9:
+win2lin10:
+win2lin11:
+win2lin12:
+	win2lin_prolog
+
+	# since we destroy rsi and rdi here, first copy windows
+	# arguments 7 through 12 onto stack for Linux function
+	mov	%rcx, %r11		# save rcx
+	lea	win2lin_win_arg(7), %rsi	# source (windows arg 7 and up)
+	lea	win2lin_lin_arg(7,12), %rdi	# = destination
+	mov	$6, %rcx			# 6 arguments
+	rep
+	movsq
+	mov	%r11, %rcx		# restore rcx
+
+	win2lin_arg1
+	win2lin_arg2
+	win2lin_arg3
+	win2lin_arg4
+	win2lin_arg5
+	win2lin_arg6
+
+	call_lin_func_args(12)
+	win2lin_epilog
+	ret
+	.size	win2lin9, .-win2lin9
+
+#define win2lin(name, argc)			\
+ENTRY(win2lin_ ## name ## _ ## argc)		\
+	lea	name(%rip), %r10 ; 		\
+	jmp	win2lin ## argc
+
+#include "win2lin_stubs.h"
+
+#endif // CONFIG_X86_64
--- linux-mvl-dove-2.6.32.orig/ubuntu/ndiswrapper/ndis.c
+++ linux-mvl-dove-2.6.32/ubuntu/ndiswrapper/ndis.c
@@ -0,0 +1,2974 @@
+/*
+ *  Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *  GNU General Public License for more details.
+ *
+ */
+
+#include "ndis.h"
+#include "iw_ndis.h"
+#include "wrapndis.h"
+#include "pnp.h"
+#include "loader.h"
+#include <linux/kernel_stat.h>
+#include <asm/dma.h>
+#include "ndis_exports.h"
+
+#define MAX_ALLOCATED_NDIS_PACKETS TX_RING_SIZE
+#define MAX_ALLOCATED_NDIS_BUFFERS TX_RING_SIZE
+
+static void ndis_worker(worker_param_t dummy);
+static work_struct_t ndis_work;
+static struct nt_list ndis_work_list;
+static spinlock_t ndis_work_list_lock;
+
+workqueue_struct_t *ndis_wq;
+static struct nt_thread *ndis_worker_thread;
+
+static void *ndis_get_routine_address(char *name);
+
+wstdcall void WIN_FUNC(NdisInitializeWrapper,4)
+	(void **driver_handle, struct driver_object *driver,
+	 struct unicode_string *reg_path, void *unused)
+{
+	ENTER1("handle: %p, driver: %p", driver_handle, driver);
+	*driver_handle = driver;
+	EXIT1(return);
+}
+
+wstdcall void WIN_FUNC(NdisTerminateWrapper,2)
+	(struct device_object *dev_obj, void *system_specific)
+{
+	EXIT1(return);
+}
+
+wstdcall NDIS_STATUS WIN_FUNC(NdisMRegisterMiniport,3)
+	(struct driver_object *drv_obj, struct miniport *mp, UINT length)
+{
+	int min_length;
+	struct wrap_driver *wrap_driver;
+	struct ndis_driver *ndis_driver;
+
+	min_length = ((char *)&mp->co_create_vc) - ((char *)mp);
+
+	ENTER1("%p %p %d", drv_obj, mp, length);
+
+	if (mp->major_version < 4) {
+		ERROR("Driver is using ndis version %d which is too old.",
+		      mp->major_version);
+		EXIT1(return NDIS_STATUS_BAD_VERSION);
+	}
+
+	if (length < min_length) {
+		ERROR("Characteristics length %d is too small", length);
+		EXIT1(return NDIS_STATUS_BAD_CHARACTERISTICS);
+	}
+
+	TRACE1("%d.%d, %d, %u", mp->major_version, mp->minor_version, length,
+	       (u32)sizeof(struct miniport));
+	wrap_driver = IoGetDriverObjectExtension(drv_obj,
+						 (void *)WRAP_DRIVER_CLIENT_ID);
+	if (!wrap_driver) {
+		ERROR("couldn't get wrap_driver");
+		EXIT1(return NDIS_STATUS_RESOURCES);
+	}
+	if (IoAllocateDriverObjectExtension(
+		    drv_obj, (void *)NDIS_DRIVER_CLIENT_ID,
+		    sizeof(*ndis_driver), (void **)&ndis_driver) !=
+	    STATUS_SUCCESS)
+		EXIT1(return NDIS_STATUS_RESOURCES);
+	wrap_driver->ndis_driver = ndis_driver;
+	TRACE1("driver: %p", ndis_driver);
+	memcpy(&ndis_driver->mp, mp, min_t(int, sizeof(*mp), length));
+
+	DBG_BLOCK(2) {
+		int i;
+		void **func;
+		char *mp_funcs[] = {
+			"queryinfo", "reconfig", "reset", "send", "setinfo",
+			"tx_data", "return_packet", "send_packets",
+			"alloc_complete", "co_create_vc", "co_delete_vc",
+			"co_activate_vc", "co_deactivate_vc",
+			"co_send_packets", "co_request", "cancel_send_packets",
+			"pnp_event_notify", "shutdown",
+		};
+		func = (void **)&ndis_driver->mp.queryinfo;
+		for (i = 0; i < (sizeof(mp_funcs) / sizeof(mp_funcs[0])); i++)
+			TRACE2("function '%s' is at %p", mp_funcs[i], func[i]);
+	}
+	EXIT1(return NDIS_STATUS_SUCCESS);
+}
+
+wstdcall NDIS_STATUS WIN_FUNC(NdisMRegisterDevice,6)
+	(struct driver_object *drv_obj, struct unicode_string *dev_name,
+	 struct unicode_string *link, void **funcs,
+	 struct device_object **dev_obj, void **dev_obj_handle)
+{
+	NTSTATUS status;
+	struct device_object *tmp;
+	int i;
+
+	ENTER1("%p, %p, %p", drv_obj, dev_name, link);
+	status = IoCreateDevice(drv_obj, 0, dev_name, FILE_DEVICE_NETWORK, 0,
+				FALSE, &tmp);
+
+	if (status != STATUS_SUCCESS)
+		EXIT1(return NDIS_STATUS_RESOURCES);
+	if (link)
+		status = IoCreateSymbolicLink(link, dev_name);
+	if (status != STATUS_SUCCESS) {
+		IoDeleteDevice(tmp);
+		EXIT1(return NDIS_STATUS_RESOURCES);
+	}
+
+	*dev_obj = tmp;
+	*dev_obj_handle = *dev_obj;
+	for (i = 0; i < IRP_MJ_MAXIMUM_FUNCTION; i++)
+		if (funcs[i] && i != IRP_MJ_PNP && i != IRP_MJ_POWER) {
+			drv_obj->major_func[i] = funcs[i];
+			TRACE1("mj_fn for 0x%x is at %p", i, funcs[i]);
+		}
+	EXIT1(return NDIS_STATUS_SUCCESS);
+}
+
+wstdcall NDIS_STATUS WIN_FUNC(NdisMDeregisterDevice,1)
+	(struct device_object *dev_obj)
+{
+	ENTER2("%p", dev_obj);
+	IoDeleteDevice(dev_obj);
+	return NDIS_STATUS_SUCCESS;
+}
+
+wstdcall NDIS_STATUS WIN_FUNC(NdisAllocateMemoryWithTag,3)
+	(void **dest, UINT length, ULONG tag)
+{
+	void *addr;
+
+	assert_irql(_irql_ <= DISPATCH_LEVEL);
+	addr = ExAllocatePoolWithTag(NonPagedPool, length, tag);
+	TRACE4("%p", addr);
+	if (addr) {
+		*dest = addr;
+		EXIT4(return NDIS_STATUS_SUCCESS);
+	} else
+		EXIT4(return NDIS_STATUS_FAILURE);
+}
+
+wstdcall NDIS_STATUS WIN_FUNC(NdisAllocateMemory,4)
+	(void **dest, UINT length, UINT flags, NDIS_PHY_ADDRESS highest_address)
+{
+	return NdisAllocateMemoryWithTag(dest, length, 0);
+}
+
+/* length_tag is either length or tag, depending on if
+ * NdisAllocateMemory or NdisAllocateMemoryTag is used to allocate
+ * memory */
+wstdcall void WIN_FUNC(NdisFreeMemory,3)
+	(void *addr, UINT length_tag, UINT flags)
+{
+	TRACE4("%p", addr);
+	ExFreePool(addr);
+}
+
+noregparm void WIN_FUNC(NdisWriteErrorLogEntry,12)
+	(struct driver_object *drv_obj, ULONG error, ULONG count, ...)
+{
+	va_list args;
+	int i;
+	ULONG code;
+
+	va_start(args, count);
+	ERROR("log: %08X, count: %d, return_address: %p",
+	      error, count, __builtin_return_address(0));
+	for (i = 0; i < count; i++) {
+		code = va_arg(args, ULONG);
+		ERROR("code: 0x%x", code);
+	}
+	va_end(args);
+	EXIT2(return);
+}
+
+wstdcall void WIN_FUNC(NdisOpenConfiguration,3)
+	(NDIS_STATUS *status, struct ndis_mp_block **conf_handle,
+	 struct ndis_mp_block *handle)
+{
+	ENTER2("%p", conf_handle);
+	*conf_handle = handle;
+	*status = NDIS_STATUS_SUCCESS;
+	EXIT2(return);
+}
+
+wstdcall void WIN_FUNC(NdisOpenProtocolConfiguration,3)
+	(NDIS_STATUS *status, void **confhandle,
+	 struct unicode_string *section)
+{
+	ENTER2("%p", confhandle);
+	*status = NDIS_STATUS_SUCCESS;
+	EXIT2(return);
+}
+
+wstdcall void WIN_FUNC(NdisOpenConfigurationKeyByName,4)
+	(NDIS_STATUS *status, void *handle,
+	 struct unicode_string *key, void **subkeyhandle)
+{
+	struct ansi_string ansi;
+	ENTER2("");
+	if (RtlUnicodeStringToAnsiString(&ansi, key, TRUE) == STATUS_SUCCESS) {
+		TRACE2("%s", ansi.buf);
+		RtlFreeAnsiString(&ansi);
+	}
+	*subkeyhandle = handle;
+	*status = NDIS_STATUS_SUCCESS;
+	EXIT2(return);
+}
+
+wstdcall void WIN_FUNC(NdisOpenConfigurationKeyByIndex,5)
+	(NDIS_STATUS *status, void *handle, ULONG index,
+	 struct unicode_string *key, void **subkeyhandle)
+{
+	ENTER2("%u", index);
+//	*subkeyhandle = handle;
+	*status = NDIS_STATUS_FAILURE;
+	EXIT2(return);
+}
+
+wstdcall void WIN_FUNC(NdisCloseConfiguration,1)
+	(void *handle)
+{
+	/* instead of freeing all configuration parameters as we are
+	 * supposed to do here, we free them when the device is
+	 * removed */
+	ENTER2("%p", handle);
+	return;
+}
+
+wstdcall void WIN_FUNC(NdisOpenFile,5)
+	(NDIS_STATUS *status, struct wrap_bin_file **file,
+	 UINT *filelength, struct unicode_string *filename,
+	 NDIS_PHY_ADDRESS highest_address)
+{
+	struct ansi_string ansi;
+	struct wrap_bin_file *bin_file;
+
+	ENTER2("%p, %d, %llx, %p", status, *filelength, highest_address, *file);
+	if (RtlUnicodeStringToAnsiString(&ansi, filename, TRUE) !=
+	    STATUS_SUCCESS) {
+		*status = NDIS_STATUS_RESOURCES;
+		EXIT2(return);
+	}
+	TRACE2("%s", ansi.buf);
+	bin_file = get_bin_file(ansi.buf);
+	if (bin_file) {
+		*file = bin_file;
+		*filelength = bin_file->size;
+		*status = NDIS_STATUS_SUCCESS;
+	} else
+		*status = NDIS_STATUS_FILE_NOT_FOUND;
+
+	RtlFreeAnsiString(&ansi);
+	EXIT2(return);
+}
+
+wstdcall void WIN_FUNC(NdisMapFile,3)
+	(NDIS_STATUS *status, void **mappedbuffer, struct wrap_bin_file *file)
+{
+	ENTER2("%p", file);
+
+	if (!file) {
+		*status = NDIS_STATUS_ALREADY_MAPPED;
+		EXIT2(return);
+	}
+
+	*status = NDIS_STATUS_SUCCESS;
+	*mappedbuffer = file->data;
+	EXIT2(return);
+}
+
+wstdcall void WIN_FUNC(NdisUnmapFile,1)
+	(struct wrap_bin_file *file)
+{
+	ENTER2("%p", file);
+	EXIT2(return);
+}
+
+wstdcall void WIN_FUNC(NdisCloseFile,1)
+	(struct wrap_bin_file *file)
+{
+	ENTER2("%p", file);
+	free_bin_file(file);
+	EXIT2(return);
+}
+
+wstdcall void WIN_FUNC(NdisGetSystemUpTime,1)
+	(ULONG *ms)
+{
+	*ms = 1000 * jiffies / HZ;
+	EXIT5(return);
+}
+
+wstdcall ULONG WIN_FUNC(NDIS_BUFFER_TO_SPAN_PAGES,1)
+	(ndis_buffer *buffer)
+{
+	ULONG n, length;
+
+	if (buffer == NULL)
+		EXIT2(return 0);
+	if (MmGetMdlByteCount(buffer) == 0)
+		EXIT2(return 1);
+
+	length = MmGetMdlByteCount(buffer);
+	n = SPAN_PAGES(MmGetMdlVirtualAddress(buffer), length);
+	TRACE4("%p, %p, %d, %d", buffer->startva, buffer->mappedsystemva,
+	       length, n);
+	EXIT3(return n);
+}
+
+wstdcall void WIN_FUNC(NdisGetBufferPhysicalArraySize,2)
+	(ndis_buffer *buffer, UINT *arraysize)
+{
+	ENTER3("%p", buffer);
+	*arraysize = NDIS_BUFFER_TO_SPAN_PAGES(buffer);
+	EXIT3(return);
+}
+
+static struct ndis_configuration_parameter *
+ndis_encode_setting(struct wrap_device_setting *setting,
+		    enum ndis_parameter_type type)
+{
+	struct ansi_string ansi;
+	struct ndis_configuration_parameter *param;
+
+	param = setting->encoded;
+	if (param) {
+		if (param->type == type)
+			EXIT2(return param);
+		if (param->type == NdisParameterString)
+			RtlFreeUnicodeString(&param->data.string);
+		setting->encoded = NULL;
+	} else
+		param = ExAllocatePoolWithTag(NonPagedPool, sizeof(*param), 0);
+	if (!param) {
+		ERROR("couldn't allocate memory");
+		return NULL;
+	}
+	switch(type) {
+	case NdisParameterInteger:
+		param->data.integer = simple_strtol(setting->value, NULL, 0);
+		TRACE2("0x%x", (ULONG)param->data.integer);
+		break;
+	case NdisParameterHexInteger:
+		param->data.integer = simple_strtol(setting->value, NULL, 16);
+		TRACE2("0x%x", (ULONG)param->data.integer);
+		break;
+	case NdisParameterString:
+		RtlInitAnsiString(&ansi, setting->value);
+		TRACE2("'%s'", ansi.buf);
+		if (RtlAnsiStringToUnicodeString(&param->data.string,
+						 &ansi, TRUE)) {
+			ExFreePool(param);
+			EXIT2(return NULL);
+		}
+		break;
+	case NdisParameterBinary:
+		param->data.integer = simple_strtol(setting->value, NULL, 2);
+		TRACE2("0x%x", (ULONG)param->data.integer);
+		break;
+	default:
+		ERROR("unknown type: %d", type);
+		ExFreePool(param);
+		return NULL;
+	}
+	param->type = type;
+	setting->encoded = param;
+	EXIT2(return param);
+}
+
+static int ndis_decode_setting(struct wrap_device_setting *setting,
+			       struct ndis_configuration_parameter *param)
+{
+	struct ansi_string ansi;
+	struct ndis_configuration_parameter *prev;
+
+	ENTER2("%p, %p", setting, param);
+	prev = setting->encoded;
+	if (prev && prev->type == NdisParameterString) {
+		RtlFreeUnicodeString(&prev->data.string);
+		setting->encoded = NULL;
+	}
+	switch(param->type) {
+	case NdisParameterInteger:
+		snprintf(setting->value, sizeof(u32), "%u",
+			 param->data.integer);
+		setting->value[sizeof(ULONG)] = 0;
+		break;
+	case NdisParameterHexInteger:
+		snprintf(setting->value, sizeof(u32), "%x",
+			 param->data.integer);
+		setting->value[sizeof(ULONG)] = 0;
+		break;
+	case NdisParameterString:
+		ansi.buf = setting->value;
+		ansi.max_length = MAX_SETTING_VALUE_LEN;
+		if ((RtlUnicodeStringToAnsiString(&ansi, &param->data.string,
+						  FALSE) != STATUS_SUCCESS)
+		    || ansi.length >= MAX_SETTING_VALUE_LEN) {
+			EXIT1(return -1);
+		}
+		if (ansi.length == ansi.max_length)
+			ansi.length--;
+		setting->value[ansi.length] = 0;
+		break;
+	case NdisParameterBinary:
+		snprintf(setting->value, sizeof(u32), "%u",
+			 param->data.integer);
+		setting->value[sizeof(ULONG)] = 0;
+		break;
+	default:
+		TRACE2("unknown setting type: %d", param->type);
+		return -1;
+	}
+	TRACE2("setting changed %s='%s', %d", setting->name, setting->value,
+	       ansi.length);
+	return 0;
+}
+
+static int read_setting(struct nt_list *setting_list, char *keyname, int length,
+			struct ndis_configuration_parameter **param,
+			enum ndis_parameter_type type)
+{
+	struct wrap_device_setting *setting;
+	if (down_interruptible(&loader_mutex))
+		WARNING("couldn't obtain loader_mutex");
+	nt_list_for_each_entry(setting, setting_list, list) {
+		if (strnicmp(keyname, setting->name, length) == 0) {
+			TRACE2("setting %s='%s'", keyname, setting->value);
+			up(&loader_mutex);
+			*param = ndis_encode_setting(setting, type);
+			if (*param)
+				EXIT2(return 0);
+			else
+				EXIT2(return -1);
+		}
+	}
+	up(&loader_mutex);
+	EXIT2(return -1);
+}
+
+wstdcall void WIN_FUNC(NdisReadConfiguration,5)
+	(NDIS_STATUS *status, struct ndis_configuration_parameter **param,
+	 struct ndis_mp_block *nmb, struct unicode_string *key,
+	 enum ndis_parameter_type type)
+{
+	struct ansi_string ansi;
+	int ret;
+
+	ENTER2("nmb: %p", nmb);
+	ret = RtlUnicodeStringToAnsiString(&ansi, key, TRUE);
+	if (ret != STATUS_SUCCESS || ansi.buf == NULL) {
+		*param = NULL;
+		*status = NDIS_STATUS_FAILURE;
+		RtlFreeAnsiString(&ansi);
+		EXIT2(return);
+	}
+	TRACE2("%d, %s", type, ansi.buf);
+
+	if (read_setting(&nmb->wnd->wd->settings, ansi.buf,
+			 ansi.length, param, type) == 0 ||
+	    read_setting(&nmb->wnd->wd->driver->settings, ansi.buf,
+			 ansi.length, param, type) == 0)
+		*status = NDIS_STATUS_SUCCESS;
+	else {
+		TRACE2("setting %s not found (type:%d)", ansi.buf, type);
+		*status = NDIS_STATUS_FAILURE;
+	}
+	RtlFreeAnsiString(&ansi);
+	EXIT2(return);
+
+}
+
+wstdcall void WIN_FUNC(NdisWriteConfiguration,4)
+	(NDIS_STATUS *status, struct ndis_mp_block *nmb,
+	 struct unicode_string *key, struct ndis_configuration_parameter *param)
+{
+	struct ansi_string ansi;
+	char *keyname;
+	struct wrap_device_setting *setting;
+
+	ENTER2("nmb: %p", nmb);
+	if (RtlUnicodeStringToAnsiString(&ansi, key, TRUE)) {
+		*status = NDIS_STATUS_FAILURE;
+		EXIT2(return);
+	}
+	keyname = ansi.buf;
+	TRACE2("%s", keyname);
+
+	if (down_interruptible(&loader_mutex))
+		WARNING("couldn't obtain loader_mutex");
+	nt_list_for_each_entry(setting, &nmb->wnd->wd->settings, list) {
+		if (strnicmp(keyname, setting->name, ansi.length) == 0) {
+			up(&loader_mutex);
+			if (ndis_decode_setting(setting, param))
+				*status = NDIS_STATUS_FAILURE;
+			else
+				*status = NDIS_STATUS_SUCCESS;
+			RtlFreeAnsiString(&ansi);
+			EXIT2(return);
+		}
+	}
+	up(&loader_mutex);
+	setting = kzalloc(sizeof(*setting), GFP_KERNEL);
+	if (setting) {
+		if (ansi.length == ansi.max_length)
+			ansi.length--;
+		memcpy(setting->name, keyname, ansi.length);
+		setting->name[ansi.length] = 0;
+		if (ndis_decode_setting(setting, param))
+			*status = NDIS_STATUS_FAILURE;
+		else {
+			*status = NDIS_STATUS_SUCCESS;
+			if (down_interruptible(&loader_mutex))
+				WARNING("couldn't obtain loader_mutex");
+			InsertTailList(&nmb->wnd->wd->settings, &setting->list);
+			up(&loader_mutex);
+		}
+	} else
+		*status = NDIS_STATUS_RESOURCES;
+
+	RtlFreeAnsiString(&ansi);
+	EXIT2(return);
+}
+
+wstdcall void WIN_FUNC(NdisReadNetworkAddress,4)
+	(NDIS_STATUS *status, void **addr, UINT *len,
+	 struct ndis_mp_block *nmb)
+{
+	struct ndis_device *wnd = nmb->wnd;
+	struct ndis_configuration_parameter *param;
+	struct unicode_string key;
+	struct ansi_string ansi;
+	typeof(wnd->mac) mac;
+	int i, ret;
+
+	ENTER2("%p", nmb);
+	RtlInitAnsiString(&ansi, "NetworkAddress");
+	*status = NDIS_STATUS_FAILURE;
+	if (RtlAnsiStringToUnicodeString(&key, &ansi, TRUE) != STATUS_SUCCESS)
+		EXIT1(return);
+
+	NdisReadConfiguration(&ret, &param, nmb, &key, NdisParameterString);
+	RtlFreeUnicodeString(&key);
+	if (ret != NDIS_STATUS_SUCCESS)
+		EXIT1(return);
+	ret = RtlUnicodeStringToAnsiString(&ansi, &param->data.string, TRUE);
+	if (ret != STATUS_SUCCESS)
+		EXIT1(return);
+
+	i = 0;
+	if (ansi.length >= 2 * sizeof(mac)) {
+		for (i = 0; i < sizeof(mac); i++) {
+			char c[3];
+			int x;
+			c[0] = ansi.buf[i*2];
+			c[1] = ansi.buf[i*2+1];
+			c[2] = 0;
+			ret = sscanf(c, "%x", &x);
+			if (ret != 1)
+				break;
+			mac[i] = x;
+		}
+	}
+	TRACE2("%s, %d, " MACSTR, ansi.buf, i, MAC2STR(mac));
+	RtlFreeAnsiString(&ansi);
+	if (i == sizeof(mac)) {
+		memcpy(wnd->mac, mac, sizeof(wnd->mac));
+		*len = sizeof(mac);
+		*addr = wnd->mac;
+		*status = NDIS_STATUS_SUCCESS;
+	}
+	EXIT1(return);
+}
+
+wstdcall void WIN_FUNC(NdisInitializeString,2)
+	(struct unicode_string *dest, UCHAR *src)
+{
+	struct ansi_string ansi;
+
+	ENTER2("");
+	if (src == NULL) {
+		dest->length = dest->max_length = 0;
+		dest->buf = NULL;
+	} else {
+		RtlInitAnsiString(&ansi, src);
+		/* the string is freed with NdisFreeMemory */
+		RtlAnsiStringToUnicodeString(dest, &ansi, TRUE);
+	}
+	EXIT2(return);
+}
+
+wstdcall void WIN_FUNC(NdisInitAnsiString,2)
+	(struct ansi_string *dst, CHAR *src)
+{
+	RtlInitAnsiString(dst, src);
+	EXIT2(return);
+}
+
+wstdcall void WIN_FUNC(NdisInitUnicodeString,2)
+	(struct unicode_string *dest, const wchar_t *src)
+{
+	RtlInitUnicodeString(dest, src);
+	return;
+}
+
+wstdcall NDIS_STATUS WIN_FUNC(NdisAnsiStringToUnicodeString,2)
+	(struct unicode_string *dst, struct ansi_string *src)
+{
+	ENTER2("");
+	if (dst == NULL || src == NULL)
+		EXIT2(return NDIS_STATUS_FAILURE);
+	if (RtlAnsiStringToUnicodeString(dst, src, FALSE) == STATUS_SUCCESS)
+		return NDIS_STATUS_SUCCESS;
+	else
+		return NDIS_STATUS_FAILURE;
+}
+
+wstdcall NDIS_STATUS WIN_FUNC(NdisUnicodeStringToAnsiString,2)
+	(struct ansi_string *dst, struct unicode_string *src)
+{
+	ENTER2("");
+	if (dst == NULL || src == NULL)
+		EXIT2(return NDIS_STATUS_FAILURE);
+	if (RtlUnicodeStringToAnsiString(dst, src, FALSE) == STATUS_SUCCESS)
+		return NDIS_STATUS_SUCCESS;
+	else
+		return NDIS_STATUS_FAILURE;
+}
+
+wstdcall NTSTATUS WIN_FUNC(NdisUpcaseUnicodeString,2)
+	(struct unicode_string *dst, struct unicode_string *src)
+{
+	EXIT2(return RtlUpcaseUnicodeString(dst, src, FALSE));
+}
+
+wstdcall void WIN_FUNC(NdisMSetAttributesEx,5)
+	(struct ndis_mp_block *nmb, void *mp_ctx,
+	 UINT hangcheck_interval, UINT attributes, ULONG adaptertype)
+{
+	struct ndis_device *wnd;
+
+	ENTER1("%p, %p, %d, %08x, %d", nmb, mp_ctx, hangcheck_interval,
+	       attributes, adaptertype);
+	wnd = nmb->wnd;
+	nmb->mp_ctx = mp_ctx;
+	wnd->attributes = attributes;
+
+	if ((attributes & NDIS_ATTRIBUTE_BUS_MASTER) &&
+	    wrap_is_pci_bus(wnd->wd->dev_bus))
+		pci_set_master(wnd->wd->pci.pdev);
+
+	if (hangcheck_interval > 0)
+		wnd->hangcheck_interval = 2 * hangcheck_interval * HZ;
+	else
+		wnd->hangcheck_interval = 2 * HZ;
+
+	EXIT1(return);
+}
+
+wstdcall ULONG WIN_FUNC(NdisReadPciSlotInformation,5)
+	(struct ndis_mp_block *nmb, ULONG slot,
+	 ULONG offset, char *buf, ULONG len)
+{
+	struct wrap_device *wd = nmb->wnd->wd;
+	ULONG i;
+	for (i = 0; i < len; i++)
+		if (pci_read_config_byte(wd->pci.pdev, offset + i, &buf[i]) !=
+		    PCIBIOS_SUCCESSFUL)
+			break;
+	DBG_BLOCK(2) {
+		if (i != len)
+			WARNING("%u, %u", i, len);
+	}
+	return i;
+}
+
+wstdcall ULONG WIN_FUNC(NdisImmediateReadPciSlotInformation,5)
+	(struct ndis_mp_block *nmb, ULONG slot,
+	 ULONG offset, char *buf, ULONG len)
+{
+	return NdisReadPciSlotInformation(nmb, slot, offset, buf, len);
+}
+
+wstdcall ULONG WIN_FUNC(NdisWritePciSlotInformation,5)
+	(struct ndis_mp_block *nmb, ULONG slot,
+	 ULONG offset, char *buf, ULONG len)
+{
+	struct wrap_device *wd = nmb->wnd->wd;
+	ULONG i;
+	for (i = 0; i < len; i++)
+		if (pci_write_config_byte(wd->pci.pdev, offset + i, buf[i]) !=
+		    PCIBIOS_SUCCESSFUL)
+			break;
+	DBG_BLOCK(2) {
+		if (i != len)
+			WARNING("%u, %u", i, len);
+	}
+	return i;
+}
+
+wstdcall NDIS_STATUS WIN_FUNC(NdisMRegisterIoPortRange,4)
+	(void **virt, struct ndis_mp_block *nmb, UINT start, UINT len)
+{
+	ENTER3("%08x %08x", start, len);
+	*virt = (void *)(ULONG_PTR)start;
+	return NDIS_STATUS_SUCCESS;
+}
+
+wstdcall void WIN_FUNC(NdisMDeregisterIoPortRange,4)
+	(struct ndis_mp_block *nmb, UINT start, UINT len, void* virt)
+{
+	ENTER1("%08x %08x", start, len);
+}
+
+wstdcall void WIN_FUNC(NdisReadPortUchar,3)
+	(struct ndis_mp_block *nmb, ULONG port, char *data)
+{
+	*data = inb(port);
+}
+
+wstdcall void WIN_FUNC(NdisImmediateReadPortUchar,3)
+	(struct ndis_mp_block *nmb, ULONG port, char *data)
+{
+	*data = inb(port);
+}
+
+wstdcall void WIN_FUNC(NdisWritePortUchar,3)
+	(struct ndis_mp_block *nmb, ULONG port, char data)
+{
+	outb(data, port);
+}
+
+wstdcall void WIN_FUNC(NdisImmediateWritePortUchar,3)
+	(struct ndis_mp_block *nmb, ULONG port, char data)
+{
+	outb(data, port);
+}
+
+wstdcall void WIN_FUNC(NdisMQueryAdapterResources,4)
+	(NDIS_STATUS *status, struct ndis_mp_block *nmb,
+	 NDIS_RESOURCE_LIST *resource_list, UINT *size)
+{
+	struct ndis_device *wnd = nmb->wnd;
+	NDIS_RESOURCE_LIST *list;
+	UINT resource_length;
+
+	list = &wnd->wd->resource_list->list->partial_resource_list;
+	resource_length = sizeof(struct cm_partial_resource_list) +
+		sizeof(struct cm_partial_resource_descriptor) *
+		(list->count - 1);
+	TRACE2("%p, %p,%d (%d), %p %d %d", wnd, resource_list, *size,
+	       resource_length, &list->partial_descriptors[list->count-1],
+	       list->partial_descriptors[list->count-1].u.interrupt.level,
+	       list->partial_descriptors[list->count-1].u.interrupt.vector);
+	if (*size < sizeof(*list)) {
+		*size = resource_length;
+		*status = NDIS_STATUS_BUFFER_TOO_SHORT;
+	} else {
+		ULONG count;
+		if (*size >= resource_length) {
+			*size = resource_length;
+			count = list->count;
+		} else {
+			UINT n = sizeof(*list);
+			count = 1;
+			while (count++ < list->count && n < *size)
+				n += sizeof(list->partial_descriptors);
+			*size = n;
+		}
+		memcpy(resource_list, list, *size);
+		resource_list->count = count;
+		*status = NDIS_STATUS_SUCCESS;
+	}
+	EXIT2(return);
+}
+
+wstdcall NDIS_STATUS WIN_FUNC(NdisMPciAssignResources,3)
+	(struct ndis_mp_block *nmb, ULONG slot_number,
+	 NDIS_RESOURCE_LIST **resources)
+{
+	struct ndis_device *wnd = nmb->wnd;
+
+	ENTER2("%p, %p", wnd, wnd->wd->resource_list);
+	*resources = &wnd->wd->resource_list->list->partial_resource_list;
+	EXIT2(return NDIS_STATUS_SUCCESS);
+}
+
+wstdcall NDIS_STATUS WIN_FUNC(NdisMMapIoSpace,4)
+	(void __iomem **virt, struct ndis_mp_block *nmb,
+	 NDIS_PHY_ADDRESS phy_addr, UINT len)
+{
+	struct ndis_device *wnd = nmb->wnd;
+
+	ENTER2("%Lx, %d", phy_addr, len);
+	*virt = MmMapIoSpace(phy_addr, len, MmCached);
+	if (*virt == NULL) {
+		ERROR("ioremap failed");
+		EXIT2(return NDIS_STATUS_FAILURE);
+	}
+	wnd->mem_start = phy_addr;
+	wnd->mem_end = phy_addr + len;
+	TRACE2("%p", *virt);
+	EXIT2(return NDIS_STATUS_SUCCESS);
+}
+
+wstdcall void WIN_FUNC(NdisMUnmapIoSpace,3)
+	(struct ndis_mp_block *nmb, void __iomem *virt, UINT len)
+{
+	ENTER2("%p, %d", virt, len);
+	MmUnmapIoSpace(virt, len);
+	EXIT2(return);
+}
+
+wstdcall void WIN_FUNC(NdisAllocateSpinLock,1)
+	(struct ndis_spinlock *lock)
+{
+	TRACE4("lock %p, %p", lock, &lock->klock);
+	KeInitializeSpinLock(&lock->klock);
+	lock->irql = PASSIVE_LEVEL;
+	return;
+}
+
+wstdcall void WIN_FUNC(NdisFreeSpinLock,1)
+	(struct ndis_spinlock *lock)
+{
+	TRACE4("lock %p, %p", lock, &lock->klock);
+	return;
+}
+
+wstdcall void WIN_FUNC(NdisAcquireSpinLock,1)
+	(struct ndis_spinlock *lock)
+{
+	ENTER6("lock %p, %p", lock, &lock->klock);
+//	assert_irql(_irql_ <= DISPATCH_LEVEL);
+	lock->irql = nt_spin_lock_irql(&lock->klock, DISPATCH_LEVEL);
+	return;
+}
+
+wstdcall void WIN_FUNC(NdisReleaseSpinLock,1)
+	(struct ndis_spinlock *lock)
+{
+	ENTER6("lock %p, %p", lock, &lock->klock);
+//	assert_irql(_irql_ == DISPATCH_LEVEL);
+	nt_spin_unlock_irql(&lock->klock, lock->irql);
+	return;
+}
+
+wstdcall void WIN_FUNC(NdisDprAcquireSpinLock,1)
+	(struct ndis_spinlock *lock)
+{
+	ENTER6("lock %p", &lock->klock);
+//	assert_irql(_irql_ == DISPATCH_LEVEL);
+	nt_spin_lock(&lock->klock);
+	return;
+}
+
+wstdcall void WIN_FUNC(NdisDprReleaseSpinLock,1)
+	(struct ndis_spinlock *lock)
+{
+	ENTER6("lock %p", &lock->klock);
+//	assert_irql(_irql_ == DISPATCH_LEVEL);
+	nt_spin_unlock(&lock->klock);
+	return;
+}
+
+wstdcall void WIN_FUNC(NdisInitializeReadWriteLock,1)
+	(struct ndis_rw_lock *rw_lock)
+{
+	ENTER3("%p", rw_lock);
+	memset(rw_lock, 0, sizeof(*rw_lock));
+	KeInitializeSpinLock(&rw_lock->klock);
+	return;
+}
+
+/* read/write locks are implemented in a rather simplisitic way - we
+ * should probably use Linux's rw_lock implementation */
+
+wstdcall void WIN_FUNC(NdisAcquireReadWriteLock,3)
+	(struct ndis_rw_lock *rw_lock, BOOLEAN write,
+	 struct lock_state *lock_state)
+{
+	if (write) {
+		while (1) {
+			if (cmpxchg(&rw_lock->count, 0, -1) == 0)
+				return;
+			while (rw_lock->count)
+				cpu_relax();
+		}
+		return;
+	}
+	while (1) {
+		typeof(rw_lock->count) count;
+		while ((count = rw_lock->count) < 0)
+			cpu_relax();
+		if (cmpxchg(&rw_lock->count, count, count + 1) == count)
+			return;
+	}
+}
+
+wstdcall void WIN_FUNC(NdisReleaseReadWriteLock,2)
+	(struct ndis_rw_lock *rw_lock, struct lock_state *lock_state)
+{
+	if (rw_lock->count > 0)
+		pre_atomic_add(rw_lock->count, -1);
+	else if (rw_lock->count == -1)
+		rw_lock->count = 0;
+	else
+		WARNING("invalid state: %d", rw_lock->count);
+}
+
+wstdcall NDIS_STATUS WIN_FUNC(NdisMAllocateMapRegisters,5)
+	(struct ndis_mp_block *nmb, UINT dmachan,
+	 NDIS_DMA_SIZE dmasize, ULONG basemap, ULONG max_buf_size)
+{
+	struct ndis_device *wnd = nmb->wnd;
+
+	ENTER2("%p, %d %d %d %d", wnd, dmachan, dmasize, basemap, max_buf_size);
+	if (wnd->dma_map_count > 0) {
+		WARNING("%s: map registers already allocated: %u",
+			wnd->net_dev->name, wnd->dma_map_count);
+		EXIT2(return NDIS_STATUS_RESOURCES);
+	}
+	if (dmasize == NDIS_DMA_24BITS) {
+		if (pci_set_dma_mask(wnd->wd->pci.pdev, DMA_BIT_MASK(24)) ||
+		    pci_set_consistent_dma_mask(wnd->wd->pci.pdev,
+						DMA_BIT_MASK(24)))
+			WARNING("setting dma mask failed");
+	} else if (dmasize == NDIS_DMA_32BITS) {
+		/* consistent dma is in low 32-bits by default */
+		if (pci_set_dma_mask(wnd->wd->pci.pdev, DMA_BIT_MASK(32)))
+			WARNING("setting dma mask failed");
+#ifdef CONFIG_X86_64
+	} else if (dmasize == NDIS_DMA_64BITS) {
+		if (pci_set_dma_mask(wnd->wd->pci.pdev, DMA_BIT_MASK(64)) ||
+		    pci_set_consistent_dma_mask(wnd->wd->pci.pdev,
+						DMA_BIT_MASK(64)))
+			WARNING("setting dma mask failed");
+		else
+			wnd->net_dev->features |= NETIF_F_HIGHDMA;
+#endif
+	}
+	/* since memory for buffer is allocated with kmalloc, buffer
+	 * is physically contiguous, so entire map will fit in one
+	 * register */
+	if (basemap > 64) {
+		WARNING("Windows driver %s requesting too many (%u) "
+			"map registers", wnd->wd->driver->name, basemap);
+		/* As per NDIS, NDIS_STATUS_RESOURCES should be
+		 * returned, but with that Atheros PCI driver fails -
+		 * for now tolerate it */
+//		EXIT2(return NDIS_STATUS_RESOURCES);
+	}
+
+	wnd->dma_map_addr = kmalloc(basemap * sizeof(*(wnd->dma_map_addr)),
+				    GFP_KERNEL);
+	if (!wnd->dma_map_addr)
+		EXIT2(return NDIS_STATUS_RESOURCES);
+	memset(wnd->dma_map_addr, 0, basemap * sizeof(*(wnd->dma_map_addr)));
+	wnd->dma_map_count = basemap;
+	TRACE2("%u", wnd->dma_map_count);
+	EXIT2(return NDIS_STATUS_SUCCESS);
+}
+
+wstdcall void WIN_FUNC(NdisMFreeMapRegisters,1)
+	(struct ndis_mp_block *nmb)
+{
+	struct ndis_device *wnd = nmb->wnd;
+	int i;
+
+	ENTER2("wnd: %p", wnd);
+	if (wnd->dma_map_addr) {
+		for (i = 0; i < wnd->dma_map_count; i++) {
+			if (wnd->dma_map_addr[i])
+				WARNING("%s: dma addr %p not freed by "
+					"Windows driver", wnd->net_dev->name,
+					(void *)wnd->dma_map_addr[i]);
+		}
+		kfree(wnd->dma_map_addr);
+		wnd->dma_map_addr = NULL;
+	} else
+		WARNING("map registers already freed?");
+	wnd->dma_map_count = 0;
+	EXIT2(return);
+}
+
+wstdcall void WIN_FUNC(NdisMStartBufferPhysicalMapping,6)
+	(struct ndis_mp_block *nmb, ndis_buffer *buf,
+	 ULONG index, BOOLEAN write_to_dev,
+	 struct ndis_phy_addr_unit *phy_addr_array, UINT *array_size)
+{
+	struct ndis_device *wnd = nmb->wnd;
+
+	ENTER3("%p, %p, %u, %u", wnd, buf, index, wnd->dma_map_count);
+	if (unlikely(wnd->sg_dma_size || !write_to_dev ||
+		     index >= wnd->dma_map_count)) {
+		WARNING("invalid request: %d, %d, %d, %d", wnd->sg_dma_size,
+			write_to_dev, index, wnd->dma_map_count);
+		phy_addr_array[0].phy_addr = 0;
+		phy_addr_array[0].length = 0;
+		*array_size = 0;
+		return;
+	}
+	if (wnd->dma_map_addr[index]) {
+		TRACE2("buffer %p at %d is already mapped: %lx", buf, index,
+		       (unsigned long)wnd->dma_map_addr[index]);
+//		*array_size = 1;
+		return;
+	}
+	TRACE3("%p, %p, %u", buf, MmGetSystemAddressForMdl(buf),
+	       MmGetMdlByteCount(buf));
+	DBG_BLOCK(4) {
+		dump_bytes(__func__, MmGetSystemAddressForMdl(buf),
+			   MmGetMdlByteCount(buf));
+	}
+	wnd->dma_map_addr[index] =
+		PCI_DMA_MAP_SINGLE(wnd->wd->pci.pdev,
+				   MmGetSystemAddressForMdl(buf),
+				   MmGetMdlByteCount(buf), PCI_DMA_TODEVICE);
+	phy_addr_array[0].phy_addr = wnd->dma_map_addr[index];
+	phy_addr_array[0].length = MmGetMdlByteCount(buf);
+	TRACE4("%Lx, %d, %d", phy_addr_array[0].phy_addr,
+	       phy_addr_array[0].length, index);
+	*array_size = 1;
+}
+
+wstdcall void WIN_FUNC(NdisMCompleteBufferPhysicalMapping,3)
+	(struct ndis_mp_block *nmb, ndis_buffer *buf, ULONG index)
+{
+	struct ndis_device *wnd = nmb->wnd;
+
+	ENTER3("%p, %p %u (%u)", wnd, buf, index, wnd->dma_map_count);
+
+	if (unlikely(wnd->sg_dma_size))
+		WARNING("buffer %p may have been unmapped already", buf);
+	if (index >= wnd->dma_map_count) {
+		ERROR("invalid map register (%u >= %u)",
+		      index, wnd->dma_map_count);
+		return;
+	}
+	TRACE4("%lx", (unsigned long)wnd->dma_map_addr[index]);
+	if (wnd->dma_map_addr[index]) {
+		PCI_DMA_UNMAP_SINGLE(wnd->wd->pci.pdev, wnd->dma_map_addr[index],
+				     MmGetMdlByteCount(buf), PCI_DMA_TODEVICE);
+		wnd->dma_map_addr[index] = 0;
+	} else
+		WARNING("map registers at %u not used", index);
+}
+
+wstdcall void WIN_FUNC(NdisMAllocateSharedMemory,5)
+	(struct ndis_mp_block *nmb, ULONG size,
+	 BOOLEAN cached, void **virt, NDIS_PHY_ADDRESS *phys)
+{
+	dma_addr_t dma_addr;
+	struct wrap_device *wd = nmb->wnd->wd;
+
+	ENTER3("size: %u, cached: %d", size, cached);
+	*virt = PCI_DMA_ALLOC_COHERENT(wd->pci.pdev, size, &dma_addr);
+	if (*virt)
+		*phys = dma_addr;
+	else
+		WARNING("couldn't allocate %d bytes of %scached DMA memory",
+			size, cached ? "" : "un-");
+	EXIT3(return);
+}
+
+wstdcall void WIN_FUNC(NdisMFreeSharedMemory,5)
+	(struct ndis_mp_block *nmb, ULONG size, BOOLEAN cached,
+	 void *virt, NDIS_PHY_ADDRESS addr)
+{
+	struct wrap_device *wd = nmb->wnd->wd;
+	ENTER3("%p, %Lx, %u", virt, addr, size);
+	PCI_DMA_FREE_COHERENT(wd->pci.pdev, size, virt, addr);
+	EXIT3(return);
+}
+
+wstdcall void alloc_shared_memory_async(void *arg1, void *arg2)
+{
+	struct ndis_device *wnd;
+	struct alloc_shared_mem *alloc_shared_mem;
+	struct miniport *mp;
+	void *virt;
+	NDIS_PHY_ADDRESS phys;
+	KIRQL irql;
+
+	wnd = arg1;
+	alloc_shared_mem = arg2;
+	mp = &wnd->wd->driver->ndis_driver->mp;
+	NdisMAllocateSharedMemory(wnd->nmb, alloc_shared_mem->size,
+				  alloc_shared_mem->cached, &virt, &phys);
+	irql = serialize_lock_irql(wnd);
+	assert_irql(_irql_ == DISPATCH_LEVEL);
+	LIN2WIN5(mp->alloc_complete, wnd->nmb, virt,
+		 &phys, alloc_shared_mem->size, alloc_shared_mem->ctx);
+	serialize_unlock_irql(wnd, irql);
+	kfree(alloc_shared_mem);
+}
+WIN_FUNC_DECL(alloc_shared_memory_async,2)
+
+wstdcall NDIS_STATUS WIN_FUNC(NdisMAllocateSharedMemoryAsync,4)
+	(struct ndis_mp_block *nmb, ULONG size, BOOLEAN cached, void *ctx)
+{
+	struct ndis_device *wnd = nmb->wnd;
+	struct alloc_shared_mem *alloc_shared_mem;
+
+	ENTER3("wnd: %p", wnd);
+	alloc_shared_mem = kmalloc(sizeof(*alloc_shared_mem), irql_gfp());
+	if (!alloc_shared_mem) {
+		WARNING("couldn't allocate memory");
+		return NDIS_STATUS_FAILURE;
+	}
+
+	alloc_shared_mem->size = size;
+	alloc_shared_mem->cached = cached;
+	alloc_shared_mem->ctx = ctx;
+	if (schedule_ntos_work_item(WIN_FUNC_PTR(alloc_shared_memory_async,2),
+				    wnd, alloc_shared_mem))
+		EXIT3(return NDIS_STATUS_FAILURE);
+	EXIT3(return NDIS_STATUS_PENDING);
+}
+
+/* Some drivers allocate NDIS_BUFFER (aka MDL) very often; instead of
+ * allocating and freeing with kernel functions, we chain them into
+ * ndis_buffer_pool. When an MDL is freed, it is added to the list of
+ * free MDLs. When allocated, we first check if there is one in free
+ * list and if so just return it; otherwise, we allocate a new one and
+ * return that. This reduces memory fragmentation. Windows DDK says
+ * that the driver itself shouldn't check what is returned in
+ * pool_handle, presumably because buffer pools are not used in
+ * XP. However, as long as driver follows rest of the semantics - that
+ * it should indicate maximum number of MDLs used with num_descr and
+ * pass the same pool_handle in other buffer functions, this should
+ * work. Sadly, though, NdisFreeBuffer doesn't pass the pool_handle,
+ * so we use 'process' field of MDL to store pool_handle. */
+
+wstdcall void WIN_FUNC(NdisAllocateBufferPool,3)
+	(NDIS_STATUS *status, struct ndis_buffer_pool **pool_handle,
+	 UINT num_descr)
+{
+	struct ndis_buffer_pool *pool;
+
+	ENTER1("buffers: %d", num_descr);
+	pool = kmalloc(sizeof(*pool), irql_gfp());
+	if (!pool) {
+		*status = NDIS_STATUS_RESOURCES;
+		EXIT3(return);
+	}
+	spin_lock_init(&pool->lock);
+	pool->max_descr = num_descr;
+	pool->num_allocated_descr = 0;
+	pool->free_descr = NULL;
+	*pool_handle = pool;
+	*status = NDIS_STATUS_SUCCESS;
+	TRACE1("pool: %p, num_descr: %d", pool, num_descr);
+	EXIT1(return);
+}
+
+wstdcall void WIN_FUNC(NdisAllocateBuffer,5)
+	(NDIS_STATUS *status, ndis_buffer **buffer,
+	 struct ndis_buffer_pool *pool, void *virt, UINT length)
+{
+	ndis_buffer *descr;
+
+	ENTER4("pool: %p (%d)", pool, pool->num_allocated_descr);
+	/* NDIS drivers should call this at DISPATCH_LEVEL, but
+	 * alloc_tx_packet calls at SOFT_IRQL */
+	assert_irql(_irql_ <= SOFT_LEVEL);
+	if (!pool) {
+		*status = NDIS_STATUS_FAILURE;
+		*buffer = NULL;
+		EXIT4(return);
+	}
+	spin_lock_bh(&pool->lock);
+	if ((descr = pool->free_descr))
+		pool->free_descr = descr->next;
+	spin_unlock_bh(&pool->lock);
+	if (descr) {
+		typeof(descr->flags) flags;
+		flags = descr->flags;
+		memset(descr, 0, sizeof(*descr));
+		MmInitializeMdl(descr, virt, length);
+		if (flags & MDL_CACHE_ALLOCATED)
+			descr->flags |= MDL_CACHE_ALLOCATED;
+	} else {
+		if (pool->num_allocated_descr > pool->max_descr) {
+			TRACE2("pool %p is full: %d(%d)", pool,
+			       pool->num_allocated_descr, pool->max_descr);
+#ifndef ALLOW_POOL_OVERFLOW
+			*status = NDIS_STATUS_FAILURE;
+			*buffer = NULL;
+			return;
+#endif
+		}
+		descr = allocate_init_mdl(virt, length);
+		if (!descr) {
+			WARNING("couldn't allocate buffer");
+			*status = NDIS_STATUS_FAILURE;
+			*buffer = NULL;
+			EXIT4(return);
+		}
+		TRACE4("buffer %p for %p, %d", descr, virt, length);
+		atomic_inc_var(pool->num_allocated_descr);
+	}
+	/* TODO: make sure this mdl can map given buffer */
+	MmBuildMdlForNonPagedPool(descr);
+//	descr->flags |= MDL_ALLOCATED_FIXED_SIZE |
+//		MDL_MAPPED_TO_SYSTEM_VA | MDL_PAGES_LOCKED;
+	descr->pool = pool;
+	*buffer = descr;
+	*status = NDIS_STATUS_SUCCESS;
+	TRACE4("buffer: %p", descr);
+	EXIT4(return);
+}
+
+wstdcall void WIN_FUNC(NdisFreeBuffer,1)
+	(ndis_buffer *buffer)
+{
+	struct ndis_buffer_pool *pool;
+
+	ENTER4("%p", buffer);
+	if (!buffer || !buffer->pool) {
+		ERROR("invalid buffer");
+		EXIT4(return);
+	}
+	pool = buffer->pool;
+	if (pool->num_allocated_descr > MAX_ALLOCATED_NDIS_BUFFERS) {
+		/* NB NB NB: set mdl's 'pool' field to NULL before
+		 * calling free_mdl; otherwise free_mdl calls
+		 * NdisFreeBuffer back */
+		atomic_dec_var(pool->num_allocated_descr);
+		buffer->pool = NULL;
+		free_mdl(buffer);
+	} else {
+		spin_lock_bh(&pool->lock);
+		buffer->next = pool->free_descr;
+		pool->free_descr = buffer;
+		spin_unlock_bh(&pool->lock);
+	}
+	EXIT4(return);
+}
+
+wstdcall void WIN_FUNC(NdisFreeBufferPool,1)
+	(struct ndis_buffer_pool *pool)
+{
+	ndis_buffer *cur, *next;
+
+	TRACE3("pool: %p", pool);
+	if (!pool) {
+		WARNING("invalid pool");
+		EXIT3(return);
+	}
+	spin_lock_bh(&pool->lock);
+	cur = pool->free_descr;
+	while (cur) {
+		next = cur->next;
+		cur->pool = NULL;
+		free_mdl(cur);
+		cur = next;
+	}
+	spin_unlock_bh(&pool->lock);
+	kfree(pool);
+	pool = NULL;
+	EXIT3(return);
+}
+
+wstdcall void WIN_FUNC(NdisAdjustBufferLength,2)
+	(ndis_buffer *buffer, UINT length)
+{
+	ENTER4("%p, %d", buffer, length);
+	buffer->bytecount = length;
+}
+
+wstdcall void WIN_FUNC(NdisQueryBuffer,3)
+	(ndis_buffer *buffer, void **virt, UINT *length)
+{
+	ENTER4("buffer: %p", buffer);
+	if (virt)
+		*virt = MmGetSystemAddressForMdl(buffer);
+	*length = MmGetMdlByteCount(buffer);
+	TRACE4("%p, %u", virt? *virt : NULL, *length);
+	return;
+}
+
+wstdcall void WIN_FUNC(NdisQueryBufferSafe,4)
+	(ndis_buffer *buffer, void **virt, UINT *length,
+	 enum mm_page_priority priority)
+{
+	ENTER4("%p, %p, %p, %d", buffer, virt, length, priority);
+	if (virt)
+		*virt = MmGetSystemAddressForMdlSafe(buffer, priority);
+	*length = MmGetMdlByteCount(buffer);
+	TRACE4("%p, %u", virt? *virt : NULL, *length);
+}
+
+wstdcall void *WIN_FUNC(NdisBufferVirtualAddress,1)
+	(ndis_buffer *buffer)
+{
+	ENTER3("%p", buffer);
+	return MmGetSystemAddressForMdl(buffer);
+}
+
+wstdcall ULONG WIN_FUNC(NdisBufferLength,1)
+	(ndis_buffer *buffer)
+{
+	ENTER3("%p", buffer);
+	return MmGetMdlByteCount(buffer);
+}
+
+wstdcall void WIN_FUNC(NdisQueryBufferOffset,3)
+	(ndis_buffer *buffer, UINT *offset, UINT *length)
+{
+	ENTER3("%p", buffer);
+	*offset = MmGetMdlByteOffset(buffer);
+	*length = MmGetMdlByteCount(buffer);
+	TRACE3("%d, %d", *offset, *length);
+}
+
+wstdcall void WIN_FUNC(NdisUnchainBufferAtBack,2)
+	(struct ndis_packet *packet, ndis_buffer **buffer)
+{
+	ndis_buffer *b, *btail;
+
+	ENTER3("%p", packet);
+	b = packet->private.buffer_head;
+	if (!b) {
+		/* no buffer in packet */
+		*buffer = NULL;
+		EXIT3(return);
+	}
+	btail = packet->private.buffer_tail;
+	*buffer = btail;
+	if (b == btail) {
+		/* one buffer in packet */
+		packet->private.buffer_head = NULL;
+		packet->private.buffer_tail = NULL;
+	} else {
+		while (b->next != btail)
+			b = b->next;
+		packet->private.buffer_tail = b;
+		b->next = NULL;
+	}
+	packet->private.valid_counts = FALSE;
+	EXIT3(return);
+}
+
+wstdcall void WIN_FUNC(NdisUnchainBufferAtFront,2)
+	(struct ndis_packet *packet, ndis_buffer **buffer)
+{
+	ENTER3("%p", packet);
+	if (packet->private.buffer_head == NULL) {
+		/* no buffer in packet */
+		*buffer = NULL;
+		EXIT3(return);
+	}
+
+	*buffer = packet->private.buffer_head;
+	if (packet->private.buffer_head == packet->private.buffer_tail) {
+		/* one buffer in packet */
+		packet->private.buffer_head = NULL;
+		packet->private.buffer_tail = NULL;
+	} else
+		packet->private.buffer_head = (*buffer)->next;
+
+	packet->private.valid_counts = FALSE;
+	EXIT3(return);
+}
+
+wstdcall void WIN_FUNC(NdisGetFirstBufferFromPacketSafe,6)
+	(struct ndis_packet *packet, ndis_buffer **first_buffer,
+	 void **first_buffer_va, UINT *first_buffer_length,
+	 UINT *total_buffer_length, enum mm_page_priority priority)
+{
+	ndis_buffer *b = packet->private.buffer_head;
+
+	ENTER3("%p(%p)", packet, b);
+	*first_buffer = b;
+	if (b) {
+		*first_buffer_va = MmGetSystemAddressForMdlSafe(b, priority);
+		*first_buffer_length = *total_buffer_length =
+			MmGetMdlByteCount(b);
+		for (b = b->next; b; b = b->next)
+			*total_buffer_length += MmGetMdlByteCount(b);
+	} else {
+		*first_buffer_va = NULL;
+		*first_buffer_length = 0;
+		*total_buffer_length = 0;
+	}
+	TRACE3("%p, %d, %d", *first_buffer_va, *first_buffer_length,
+	       *total_buffer_length);
+	EXIT3(return);
+}
+
+wstdcall void WIN_FUNC(NdisGetFirstBufferFromPacket,6)
+	(struct ndis_packet *packet, ndis_buffer **first_buffer,
+	 void **first_buffer_va, UINT *first_buffer_length,
+	 UINT *total_buffer_length, enum mm_page_priority priority)
+{
+	NdisGetFirstBufferFromPacketSafe(packet, first_buffer,
+					 first_buffer_va, first_buffer_length,
+					 total_buffer_length,
+					 NormalPagePriority);
+}
+
+wstdcall void WIN_FUNC(NdisAllocatePacketPoolEx,5)
+	(NDIS_STATUS *status, struct ndis_packet_pool **pool_handle,
+	 UINT num_descr, UINT overflowsize, UINT proto_rsvd_length)
+{
+	struct ndis_packet_pool *pool;
+
+	ENTER3("buffers: %d, length: %d", num_descr, proto_rsvd_length);
+	pool = kzalloc(sizeof(*pool), irql_gfp());
+	if (!pool) {
+		*status = NDIS_STATUS_RESOURCES;
+		EXIT3(return);
+	}
+	spin_lock_init(&pool->lock);
+	pool->max_descr = num_descr;
+	pool->num_allocated_descr = 0;
+	pool->num_used_descr = 0;
+	pool->free_descr = NULL;
+	pool->proto_rsvd_length = proto_rsvd_length;
+	*pool_handle = pool;
+	*status = NDIS_STATUS_SUCCESS;
+	TRACE3("pool: %p", pool);
+	EXIT3(return);
+}
+
+wstdcall void WIN_FUNC(NdisAllocatePacketPool,4)
+	(NDIS_STATUS *status, struct ndis_packet_pool **pool_handle,
+	 UINT num_descr, UINT proto_rsvd_length)
+{
+	NdisAllocatePacketPoolEx(status, pool_handle, num_descr, 0,
+				 proto_rsvd_length);
+	EXIT3(return);
+}
+
+wstdcall void WIN_FUNC(NdisFreePacketPool,1)
+	(struct ndis_packet_pool *pool)
+{
+	struct ndis_packet *packet, *next;
+
+	ENTER3("pool: %p", pool);
+	if (!pool) {
+		WARNING("invalid pool");
+		EXIT3(return);
+	}
+	spin_lock_bh(&pool->lock);
+	packet = pool->free_descr;
+	while (packet) {
+		next = (struct ndis_packet *)packet->reserved[0];
+		kfree(packet);
+		packet = next;
+	}
+	pool->num_allocated_descr = 0;
+	pool->num_used_descr = 0;
+	pool->free_descr = NULL;
+	spin_unlock_bh(&pool->lock);
+	kfree(pool);
+	EXIT3(return);
+}
+
+wstdcall UINT WIN_FUNC(NdisPacketPoolUsage,1)
+	(struct ndis_packet_pool *pool)
+{
+	EXIT4(return pool->num_used_descr);
+}
+
+wstdcall void WIN_FUNC(NdisAllocatePacket,3)
+	(NDIS_STATUS *status, struct ndis_packet **ndis_packet,
+	 struct ndis_packet_pool *pool)
+{
+	struct ndis_packet *packet;
+	int packet_length;
+
+	ENTER4("pool: %p", pool);
+	if (!pool) {
+		*status = NDIS_STATUS_RESOURCES;
+		*ndis_packet = NULL;
+		EXIT4(return);
+	}
+	assert_irql(_irql_ <= SOFT_LEVEL);
+	if (pool->num_used_descr > pool->max_descr) {
+		TRACE3("pool %p is full: %d(%d)", pool,
+		       pool->num_used_descr, pool->max_descr);
+#ifndef ALLOW_POOL_OVERFLOW
+		*status = NDIS_STATUS_RESOURCES;
+		*ndis_packet = NULL;
+		return;
+#endif
+	}
+	/* packet has space for 1 byte in protocol_reserved field */
+	packet_length = sizeof(*packet) - 1 + pool->proto_rsvd_length +
+		sizeof(struct ndis_packet_oob_data);
+	spin_lock_bh(&pool->lock);
+	if ((packet = pool->free_descr))
+		pool->free_descr = (void *)packet->reserved[0];
+	spin_unlock_bh(&pool->lock);
+	if (!packet) {
+		packet = kmalloc(packet_length, irql_gfp());
+		if (!packet) {
+			WARNING("couldn't allocate packet");
+			*status = NDIS_STATUS_RESOURCES;
+			*ndis_packet = NULL;
+			return;
+		}
+		atomic_inc_var(pool->num_allocated_descr);
+	}
+	TRACE4("%p, %p", pool, packet);
+	atomic_inc_var(pool->num_used_descr);
+	memset(packet, 0, packet_length);
+	packet->private.oob_offset =
+		packet_length - sizeof(struct ndis_packet_oob_data);
+	packet->private.packet_flags = fPACKET_ALLOCATED_BY_NDIS;
+	packet->private.pool = pool;
+	*ndis_packet = packet;
+	*status = NDIS_STATUS_SUCCESS;
+	EXIT4(return);
+}
+
+wstdcall void WIN_FUNC(NdisDprAllocatePacket,3)
+	(NDIS_STATUS *status, struct ndis_packet **packet,
+	 struct ndis_packet_pool *pool)
+{
+	NdisAllocatePacket(status, packet, pool);
+}
+
+wstdcall void WIN_FUNC(NdisFreePacket,1)
+	(struct ndis_packet *packet)
+{
+	struct ndis_packet_pool *pool;
+
+	ENTER4("%p, %p", packet, packet->private.pool);
+	pool = packet->private.pool;
+	if (!pool) {
+		ERROR("invalid pool %p", packet);
+		EXIT4(return);
+	}
+	assert((int)pool->num_used_descr > 0);
+	atomic_dec_var(pool->num_used_descr);
+	if (packet->reserved[1]) {
+		TRACE3("%p, %p", packet, (void *)packet->reserved[1]);
+		kfree((void *)packet->reserved[1]);
+		packet->reserved[1] = 0;
+	}
+	if (pool->num_allocated_descr > MAX_ALLOCATED_NDIS_PACKETS) {
+		TRACE3("%p", pool);
+		atomic_dec_var(pool->num_allocated_descr);
+		kfree(packet);
+	} else {
+		TRACE4("%p, %p, %p", pool, packet, pool->free_descr);
+		spin_lock_bh(&pool->lock);
+		packet->reserved[0] =
+			(typeof(packet->reserved[0]))pool->free_descr;
+		pool->free_descr = packet;
+		spin_unlock_bh(&pool->lock);
+	}
+	EXIT4(return);
+}
+
+wstdcall struct ndis_packet_stack *WIN_FUNC(NdisIMGetCurrentPacketStack,2)
+	(struct ndis_packet *packet, BOOLEAN *stacks_remain)
+{
+	struct ndis_packet_stack *stack;
+
+	if (!packet->reserved[1]) {
+		stack = kzalloc(2 * sizeof(*stack), irql_gfp());
+		TRACE3("%p, %p", packet, stack);
+		packet->reserved[1] = (typeof(packet->reserved[1]))stack;
+	} else {
+		stack = (void *)packet->reserved[1];;
+		if (xchg(&stack->ndis_reserved[0], 1)) {
+			stack++;
+			if (xchg(&stack->ndis_reserved[0], 1))
+				stack = NULL;
+		}
+		TRACE3("%p", stack);
+	}
+	if (stack)
+		*stacks_remain = TRUE;
+	else
+		*stacks_remain = FALSE;
+
+	EXIT3(return stack);
+}
+
+wstdcall void WIN_FUNC(NdisCopyFromPacketToPacketSafe,7)
+	(struct ndis_packet *dst, UINT dst_offset, UINT num_to_copy,
+	 struct ndis_packet *src, UINT src_offset, UINT *num_copied,
+	 enum mm_page_priority priority)
+{
+	UINT dst_n, src_n, n, left;
+	ndis_buffer *dst_buf;
+	ndis_buffer *src_buf;
+
+	ENTER4("");
+	if (!dst || !src) {
+		*num_copied = 0;
+		EXIT4(return);
+	}
+
+	dst_buf = dst->private.buffer_head;
+	src_buf = src->private.buffer_head;
+
+	if (!dst_buf || !src_buf) {
+		*num_copied = 0;
+		EXIT4(return);
+	}
+	dst_n = MmGetMdlByteCount(dst_buf) - dst_offset;
+	src_n = MmGetMdlByteCount(src_buf) - src_offset;
+
+	n = min(src_n, dst_n);
+	n = min(n, num_to_copy);
+	memcpy(MmGetSystemAddressForMdl(dst_buf) + dst_offset,
+	       MmGetSystemAddressForMdl(src_buf) + src_offset, n);
+
+	left = num_to_copy - n;
+	while (left > 0) {
+		src_offset += n;
+		dst_offset += n;
+		dst_n -= n;
+		src_n -= n;
+		if (dst_n == 0) {
+			dst_buf = dst_buf->next;
+			if (!dst_buf)
+				break;
+			dst_n = MmGetMdlByteCount(dst_buf);
+			dst_offset = 0;
+		}
+		if (src_n == 0) {
+			src_buf = src_buf->next;
+			if (!src_buf)
+				break;
+			src_n = MmGetMdlByteCount(src_buf);
+			src_offset = 0;
+		}
+
+		n = min(src_n, dst_n);
+		n = min(n, left);
+		memcpy(MmGetSystemAddressForMdl(dst_buf) + dst_offset,
+		       MmGetSystemAddressForMdl(src_buf) + src_offset, n);
+		left -= n;
+	}
+	*num_copied = num_to_copy - left;
+	EXIT4(return);
+}
+
+wstdcall void WIN_FUNC(NdisCopyFromPacketToPacket,6)
+	(struct ndis_packet *dst, UINT dst_offset, UINT num_to_copy,
+	 struct ndis_packet *src, UINT src_offset, UINT *num_copied)
+{
+	NdisCopyFromPacketToPacketSafe(dst, dst_offset, num_to_copy,
+				       src, src_offset, num_copied,
+				       NormalPagePriority);
+	return;
+}
+
+wstdcall void WIN_FUNC(NdisIMCopySendPerPacketInfo,2)
+	(struct ndis_packet *dst, struct ndis_packet *src)
+{
+	struct ndis_packet_oob_data *dst_oob, *src_oob;
+	dst_oob = NDIS_PACKET_OOB_DATA(dst);
+	src_oob = NDIS_PACKET_OOB_DATA(src);
+	memcpy(&dst_oob->ext, &src_oob->ext, sizeof(dst_oob->ext));
+	return;
+}
+
+wstdcall void WIN_FUNC(NdisSend,3)
+	(NDIS_STATUS *status, struct ndis_mp_block *nmb,
+	 struct ndis_packet *packet)
+{
+	struct ndis_device *wnd = nmb->wnd;
+	struct miniport *mp;
+	KIRQL irql;
+
+	mp = &wnd->wd->driver->ndis_driver->mp;
+	if (mp->send_packets) {
+		irql = serialize_lock_irql(wnd);
+		assert_irql(_irql_ == DISPATCH_LEVEL);
+		LIN2WIN3(mp->send_packets, wnd->nmb->mp_ctx, &packet, 1);
+		serialize_unlock_irql(wnd, irql);
+		if (deserialized_driver(wnd))
+			*status = NDIS_STATUS_PENDING;
+		else {
+			struct ndis_packet_oob_data *oob_data;
+			oob_data = NDIS_PACKET_OOB_DATA(packet);
+			*status = oob_data->status;
+			switch (*status) {
+			case NDIS_STATUS_SUCCESS:
+				free_tx_packet(wnd, packet, *status);
+				break;
+			case NDIS_STATUS_PENDING:
+				break;
+			case NDIS_STATUS_RESOURCES:
+				wnd->tx_ok = 0;
+				break;
+			case NDIS_STATUS_FAILURE:
+			default:
+				free_tx_packet(wnd, packet, *status);
+				break;
+			}
+		}
+	} else {
+		irql = serialize_lock_irql(wnd);
+		assert_irql(_irql_ == DISPATCH_LEVEL);
+		*status = LIN2WIN3(mp->send, wnd->nmb->mp_ctx, packet, 0);
+		serialize_unlock_irql(wnd, irql);
+		switch (*status) {
+		case NDIS_STATUS_SUCCESS:
+			free_tx_packet(wnd, packet, *status);
+			break;
+		case NDIS_STATUS_PENDING:
+			break;
+		case NDIS_STATUS_RESOURCES:
+			wnd->tx_ok = 0;
+			break;
+		case NDIS_STATUS_FAILURE:
+		default:
+			free_tx_packet(wnd, packet, *status);
+			break;
+		}
+	}
+	EXIT3(return);
+}
+
+/* called for serialized drivers only */
+wstdcall void mp_timer_dpc(struct kdpc *kdpc, void *ctx, void *arg1, void *arg2)
+{
+	struct ndis_mp_timer *timer;
+	struct ndis_mp_block *nmb;
+
+	timer = ctx;
+	TIMERENTER("%p, %p, %p, %p", timer, timer->func, timer->ctx, timer->nmb);
+	assert_irql(_irql_ == DISPATCH_LEVEL);
+	nmb = timer->nmb;
+	serialize_lock(nmb->wnd);
+	LIN2WIN4(timer->func, NULL, timer->ctx, NULL, NULL);
+	serialize_unlock(nmb->wnd);
+	TIMEREXIT(return);
+}
+WIN_FUNC_DECL(mp_timer_dpc,4)
+
+wstdcall void WIN_FUNC(NdisMInitializeTimer,4)
+	(struct ndis_mp_timer *timer, struct ndis_mp_block *nmb,
+	 DPC func, void *ctx)
+{
+	TIMERENTER("%p, %p, %p, %p", timer, func, ctx, nmb);
+	assert_irql(_irql_ == PASSIVE_LEVEL);
+	timer->func = func;
+	timer->ctx = ctx;
+	timer->nmb = nmb;
+	if (deserialized_driver(nmb->wnd))
+		KeInitializeDpc(&timer->kdpc, func, ctx);
+	else
+		KeInitializeDpc(&timer->kdpc, WIN_FUNC_PTR(mp_timer_dpc,4),
+				timer);
+	wrap_init_timer(&timer->nt_timer, NotificationTimer, nmb);
+	TIMEREXIT(return);
+}
+
+wstdcall void WIN_FUNC(NdisMSetPeriodicTimer,2)
+	(struct ndis_mp_timer *timer, UINT period_ms)
+{
+	unsigned long expires = MSEC_TO_HZ(period_ms);
+
+	TIMERENTER("%p, %u, %ld", timer, period_ms, expires);
+	assert_irql(_irql_ <= DISPATCH_LEVEL);
+	wrap_set_timer(&timer->nt_timer, expires, expires, &timer->kdpc);
+	TIMEREXIT(return);
+}
+
+wstdcall void WIN_FUNC(NdisMCancelTimer,2)
+	(struct ndis_mp_timer *timer, BOOLEAN *canceled)
+{
+	TIMERENTER("%p", timer);
+	assert_irql(_irql_ <= DISPATCH_LEVEL);
+	*canceled = KeCancelTimer(&timer->nt_timer);
+	TIMERTRACE("%d", *canceled);
+	return;
+}
+
+wstdcall void WIN_FUNC(NdisInitializeTimer,3)
+	(struct ndis_timer *timer, void *func, void *ctx)
+{
+	TIMERENTER("%p, %p, %p", timer, func, ctx);
+	assert_irql(_irql_ == PASSIVE_LEVEL);
+	KeInitializeDpc(&timer->kdpc, func, ctx);
+	wrap_init_timer(&timer->nt_timer, NotificationTimer, NULL);
+	TIMEREXIT(return);
+}
+
+/* NdisMSetTimer is a macro that calls NdisSetTimer with
+ * ndis_mp_timer typecast to ndis_timer */
+
+wstdcall void WIN_FUNC(NdisSetTimer,2)
+	(struct ndis_timer *timer, UINT duetime_ms)
+{
+	unsigned long expires = MSEC_TO_HZ(duetime_ms);
+
+	TIMERENTER("%p, %p, %u, %ld", timer, timer->nt_timer.wrap_timer,
+		   duetime_ms, expires);
+	assert_irql(_irql_ <= DISPATCH_LEVEL);
+	wrap_set_timer(&timer->nt_timer, expires, 0, &timer->kdpc);
+	TIMEREXIT(return);
+}
+
+wstdcall void WIN_FUNC(NdisCancelTimer,2)
+	(struct ndis_timer *timer, BOOLEAN *canceled)
+{
+	TIMERENTER("%p", timer);
+	assert_irql(_irql_ <= DISPATCH_LEVEL);
+	*canceled = KeCancelTimer(&timer->nt_timer);
+	TIMEREXIT(return);
+}
+
+wstdcall void WIN_FUNC(NdisMRegisterAdapterShutdownHandler,3)
+	(struct ndis_mp_block *nmb, void *ctx, void *func)
+{
+	struct ndis_device *wnd = nmb->wnd;
+	ENTER1("%p", func);
+	wnd->wd->driver->ndis_driver->mp.shutdown = func;
+	wnd->shutdown_ctx = ctx;
+}
+
+wstdcall void WIN_FUNC(NdisMDeregisterAdapterShutdownHandler,1)
+	(struct ndis_mp_block *nmb)
+{
+	struct ndis_device *wnd = nmb->wnd;
+	wnd->wd->driver->ndis_driver->mp.shutdown = NULL;
+	wnd->shutdown_ctx = NULL;
+}
+
+/* TODO: rt61 (serialized) driver doesn't want MiniportEnableInterrupt
+ * to be called in irq handler, but mrv800c (deserialized) driver
+ * wants. NDIS is confusing about when to call MiniportEnableInterrupt
+ * For now, handle these cases with two separate irq handlers based on
+ * observation of these two drivers. However, it is likely not
+ * correct. */
+wstdcall void deserialized_irq_handler(struct kdpc *kdpc, void *ctx,
+				       void *arg1, void *arg2)
+{
+	struct ndis_device *wnd = ctx;
+	ndis_interrupt_handler irq_handler = arg1;
+	struct miniport *mp = arg2;
+
+	TRACE6("%p", irq_handler);
+	assert_irql(_irql_ == DISPATCH_LEVEL);
+	LIN2WIN1(irq_handler, wnd->nmb->mp_ctx);
+	if (mp->enable_interrupt)
+		LIN2WIN1(mp->enable_interrupt, wnd->nmb->mp_ctx);
+	EXIT6(return);
+}
+WIN_FUNC_DECL(deserialized_irq_handler,4)
+
+wstdcall void serialized_irq_handler(struct kdpc *kdpc, void *ctx,
+				     void *arg1, void *arg2)
+{
+	struct ndis_device *wnd = ctx;
+	ndis_interrupt_handler irq_handler = arg1;
+
+	TRACE6("%p, %p, %p", wnd, irq_handler, arg2);
+	assert_irql(_irql_ == DISPATCH_LEVEL);
+	serialize_lock(wnd);
+	LIN2WIN1(irq_handler, arg2);
+	serialize_unlock(wnd);
+	EXIT6(return);
+}
+WIN_FUNC_DECL(serialized_irq_handler,4)
+
+wstdcall BOOLEAN ndis_isr(struct kinterrupt *kinterrupt, void *ctx)
+{
+	struct ndis_mp_interrupt *mp_interrupt = ctx;
+	struct ndis_device *wnd = mp_interrupt->nmb->wnd;
+	BOOLEAN recognized = TRUE, queue_handler = TRUE;
+
+	TRACE6("%p", wnd);
+	/* kernel may call ISR when registering interrupt, in
+	 * the same context if DEBUG_SHIRQ is enabled */
+	assert_irql(_irql_ == DIRQL || _irql_ == PASSIVE_LEVEL);
+	if (mp_interrupt->shared)
+		LIN2WIN3(mp_interrupt->isr, &recognized, &queue_handler,
+			 wnd->nmb->mp_ctx);
+	else {
+		struct miniport *mp;
+		mp = &wnd->wd->driver->ndis_driver->mp;
+		LIN2WIN1(mp->disable_interrupt, wnd->nmb->mp_ctx);
+		/* it is not shared interrupt, so handler must be called */
+		recognized = queue_handler = TRUE;
+	}
+	if (recognized) {
+		if (queue_handler) {
+			TRACE5("%p", &wnd->irq_kdpc);
+			queue_kdpc(&wnd->irq_kdpc);
+		}
+		EXIT6(return TRUE);
+	}
+	EXIT6(return FALSE);
+}
+WIN_FUNC_DECL(ndis_isr,2)
+
+wstdcall NDIS_STATUS WIN_FUNC(NdisMRegisterInterrupt,7)
+	(struct ndis_mp_interrupt *mp_interrupt,
+	 struct ndis_mp_block *nmb, UINT vector, UINT level,
+	 BOOLEAN req_isr, BOOLEAN shared, enum kinterrupt_mode mode)
+{
+	struct ndis_device *wnd = nmb->wnd;
+	struct miniport *mp;
+
+	ENTER1("%p, vector:%d, level:%d, req_isr:%d, shared:%d, mode:%d",
+	       mp_interrupt, vector, level, req_isr, shared, mode);
+
+	mp = &wnd->wd->driver->ndis_driver->mp;
+	nt_spin_lock_init(&mp_interrupt->lock);
+	mp_interrupt->irq = vector;
+	mp_interrupt->isr = mp->isr;
+	mp_interrupt->mp_dpc = mp->handle_interrupt;
+	mp_interrupt->nmb = nmb;
+	mp_interrupt->req_isr = req_isr;
+	if (shared && !req_isr)
+		WARNING("shared but dynamic interrupt!");
+	mp_interrupt->shared = shared;
+	wnd->mp_interrupt = mp_interrupt;
+	if (mp->enable_interrupt)
+		mp_interrupt->enable = TRUE;
+	else
+		mp_interrupt->enable = FALSE;
+
+	if (deserialized_driver(wnd)) {
+		KeInitializeDpc(&wnd->irq_kdpc,
+				WIN_FUNC_PTR(deserialized_irq_handler,4),
+				nmb->wnd);
+		wnd->irq_kdpc.arg1 = mp->handle_interrupt;
+		wnd->irq_kdpc.arg2 = mp;
+		TRACE2("%p, %p, %p, %p", wnd->irq_kdpc.arg1, wnd->irq_kdpc.arg2,
+		       nmb->wnd, nmb->mp_ctx);
+	} else {
+		KeInitializeDpc(&wnd->irq_kdpc,
+				WIN_FUNC_PTR(serialized_irq_handler,4),
+				nmb->wnd);
+		wnd->irq_kdpc.arg1 = mp->handle_interrupt;
+		wnd->irq_kdpc.arg2 = nmb->mp_ctx;
+		TRACE2("%p, %p, %p", wnd->irq_kdpc.arg1, wnd->irq_kdpc.arg2,
+		       nmb->wnd);
+	}
+
+	if (IoConnectInterrupt(&mp_interrupt->kinterrupt,
+			       WIN_FUNC_PTR(ndis_isr,2), mp_interrupt, NULL,
+			       vector, DIRQL, DIRQL, mode, shared, 0, FALSE) !=
+	    STATUS_SUCCESS) {
+		printk(KERN_WARNING "%s: request for IRQ %d failed\n",
+		       DRIVER_NAME, vector);
+		return NDIS_STATUS_RESOURCES;
+	}
+	printk(KERN_INFO "%s: using IRQ %d\n", DRIVER_NAME, vector);
+	EXIT1(return NDIS_STATUS_SUCCESS);
+}
+
+wstdcall void WIN_FUNC(NdisMDeregisterInterrupt,1)
+	(struct ndis_mp_interrupt *mp_interrupt)
+{
+	struct ndis_mp_block *nmb;
+
+	ENTER1("%p", mp_interrupt);
+	nmb = xchg(&mp_interrupt->nmb, NULL);
+	TRACE1("%p", nmb);
+	if (!nmb) {
+		WARNING("interrupt already freed?");
+		return;
+	}
+	nmb->wnd->mp_interrupt = NULL;
+	if (dequeue_kdpc(&nmb->wnd->irq_kdpc))
+		TRACE2("interrupt kdpc was pending");
+	flush_workqueue(wrapndis_wq);
+	IoDisconnectInterrupt(mp_interrupt->kinterrupt);
+	EXIT1(return);
+}
+
+wstdcall BOOLEAN WIN_FUNC(NdisMSynchronizeWithInterrupt,3)
+	(struct ndis_mp_interrupt *mp_interrupt,
+	 PKSYNCHRONIZE_ROUTINE sync_func, void *ctx)
+{
+	return KeSynchronizeExecution(mp_interrupt->kinterrupt, sync_func, ctx);
+}
+
+/* called via function pointer; but 64-bit RNDIS driver calls directly */
+wstdcall void WIN_FUNC(NdisMIndicateStatus,4)
+	(struct ndis_mp_block *nmb, NDIS_STATUS status, void *buf, UINT len)
+{
+	struct ndis_device *wnd = nmb->wnd;
+	struct ndis_status_indication *si;
+
+	ENTER2("status=0x%x len=%d", status, len);
+	switch (status) {
+	case NDIS_STATUS_MEDIA_CONNECT:
+		set_media_state(wnd, NdisMediaStateConnected);
+		break;
+	case NDIS_STATUS_MEDIA_DISCONNECT:
+		set_media_state(wnd, NdisMediaStateDisconnected);
+		break;
+	case NDIS_STATUS_MEDIA_SPECIFIC_INDICATION:
+		if (!buf)
+			break;
+		si = buf;
+		TRACE2("status_type=%d", si->status_type);
+		switch (si->status_type) {
+		case Ndis802_11StatusType_MediaStreamMode:
+			break;
+#ifdef CONFIG_WIRELESS_EXT
+		case Ndis802_11StatusType_Authentication:
+			buf = (char *)buf + sizeof(*si);
+			len -= sizeof(*si);
+			while (len > 0) {
+				int pairwise_error = 0, group_error = 0;
+				struct ndis_auth_req *auth_req =
+					(struct ndis_auth_req *)buf;
+				TRACE1(MACSTRSEP, MAC2STR(auth_req->bssid));
+				if (auth_req->flags & 0x01)
+					TRACE2("reauth request");
+				if (auth_req->flags & 0x02)
+					TRACE2("key update request");
+				if (auth_req->flags & 0x06) {
+					pairwise_error = 1;
+					TRACE2("pairwise_error");
+				}
+				if (auth_req->flags & 0x0E) {
+					group_error = 1;
+					TRACE2("group_error");
+				}
+				if (pairwise_error || group_error) {
+					union iwreq_data wrqu;
+					struct iw_michaelmicfailure micfailure;
+
+					memset(&micfailure, 0, sizeof(micfailure));
+					if (pairwise_error)
+						micfailure.flags |=
+							IW_MICFAILURE_PAIRWISE;
+					if (group_error)
+						micfailure.flags |=
+							IW_MICFAILURE_GROUP;
+					memcpy(micfailure.src_addr.sa_data,
+					       auth_req->bssid, ETH_ALEN);
+					memset(&wrqu, 0, sizeof(wrqu));
+					wrqu.data.length = sizeof(micfailure);
+					wireless_send_event(wnd->net_dev,
+							    IWEVMICHAELMICFAILURE,
+							    &wrqu, (u8 *)&micfailure);
+				}
+				len -= auth_req->length;
+				buf = (char *)buf + auth_req->length;
+			}
+			break;
+		case Ndis802_11StatusType_PMKID_CandidateList:
+		{
+			u8 *end;
+			unsigned long i;
+			struct ndis_pmkid_candidate_list *cand;
+
+			cand = buf + sizeof(struct ndis_status_indication);
+			if (len < sizeof(struct ndis_status_indication) +
+			    sizeof(struct ndis_pmkid_candidate_list) ||
+				cand->version != 1) {
+				WARNING("unrecognized PMKID ignored");
+				EXIT1(return);
+			}
+
+			end = (u8 *)buf + len;
+			TRACE2("PMKID ver %d num_cand %d",
+			       cand->version, cand->num_candidates);
+			for (i = 0; i < cand->num_candidates; i++) {
+				struct iw_pmkid_cand pcand;
+				union iwreq_data wrqu;
+				struct ndis_pmkid_candidate *c =
+					&cand->candidates[i];
+				if ((u8 *)(c + 1) > end) {
+					TRACE2("truncated PMKID");
+					break;
+				}
+				TRACE2("%ld: " MACSTRSEP " 0x%x",
+				       i, MAC2STR(c->bssid), c->flags);
+				memset(&pcand, 0, sizeof(pcand));
+				if (c->flags & 0x01)
+					pcand.flags |= IW_PMKID_CAND_PREAUTH;
+				pcand.index = i;
+				memcpy(pcand.bssid.sa_data, c->bssid, ETH_ALEN);
+
+				memset(&wrqu, 0, sizeof(wrqu));
+				wrqu.data.length = sizeof(pcand);
+				wireless_send_event(wnd->net_dev, IWEVPMKIDCAND,
+						    &wrqu, (u8 *)&pcand);
+			}
+			break;
+		}
+		case Ndis802_11StatusType_RadioState:
+		{
+			struct ndis_radio_status_indication *radio_status = buf;
+			if (radio_status->radio_state ==
+			    Ndis802_11RadioStatusOn)
+				INFO("radio is turned on");
+			else if (radio_status->radio_state ==
+				 Ndis802_11RadioStatusHardwareOff)
+				INFO("radio is turned off by hardware");
+			else if (radio_status->radio_state ==
+				 Ndis802_11RadioStatusSoftwareOff)
+				INFO("radio is turned off by software");
+			break;
+		}
+#endif
+		default:
+			/* is this RSSI indication? */
+			TRACE2("unknown indication: %x", si->status_type);
+			break;
+		}
+		break;
+	default:
+		TRACE2("unknown status: %08X", status);
+		break;
+	}
+
+	EXIT2(return);
+}
+
+/* called via function pointer; but 64-bit RNDIS driver calls directly */
+wstdcall void WIN_FUNC(NdisMIndicateStatusComplete,1)
+	(struct ndis_mp_block *nmb)
+{
+	struct ndis_device *wnd = nmb->wnd;
+	ENTER2("%p", wnd);
+	if (wnd->tx_ok)
+		schedule_wrapndis_work(&wnd->tx_work);
+}
+
+/* called via function pointer */
+wstdcall void NdisMSendComplete(struct ndis_mp_block *nmb,
+				struct ndis_packet *packet, NDIS_STATUS status)
+{
+	struct ndis_device *wnd = nmb->wnd;
+	ENTER4("%p, %08X", packet, status);
+	assert_irql(_irql_ <= DISPATCH_LEVEL);
+	if (deserialized_driver(wnd))
+		free_tx_packet(wnd, packet, status);
+	else {
+		struct ndis_packet_oob_data *oob_data;
+		NDIS_STATUS pkt_status;
+		TRACE3("%p, %08x", packet, status);
+		oob_data = NDIS_PACKET_OOB_DATA(packet);
+		switch ((pkt_status = xchg(&oob_data->status, status))) {
+		case NDIS_STATUS_NOT_RECOGNIZED:
+			free_tx_packet(wnd, packet, status);
+			break;
+		case NDIS_STATUS_PENDING:
+		case 0:
+			break;
+		default:
+			WARNING("%p: invalid status: %08X", packet, pkt_status);
+			break;
+		}
+		/* In case a serialized driver has earlier requested a
+		 * pause by returning NDIS_STATUS_RESOURCES during
+		 * MiniportSend(Packets), wakeup tx worker now.
+		 */
+		if (xchg(&wnd->tx_ok, 1) == 0) {
+			TRACE3("%d, %d", wnd->tx_ring_start, wnd->tx_ring_end);
+			schedule_wrapndis_work(&wnd->tx_work);
+		}
+	}
+	EXIT3(return);
+}
+
+/* called via function pointer */
+wstdcall void NdisMSendResourcesAvailable(struct ndis_mp_block *nmb)
+{
+	struct ndis_device *wnd = nmb->wnd;
+	ENTER3("%d, %d", wnd->tx_ring_start, wnd->tx_ring_end);
+	wnd->tx_ok = 1;
+	schedule_wrapndis_work(&wnd->tx_work);
+	EXIT3(return);
+}
+
+wstdcall void return_packet(void *arg1, void *arg2)
+{
+	struct ndis_device *wnd;
+	struct ndis_packet *packet;
+	struct miniport *mp;
+	KIRQL irql;
+
+	wnd = arg1;
+	packet = arg2;
+	ENTER4("%p, %p", wnd, packet);
+	mp = &wnd->wd->driver->ndis_driver->mp;
+	irql = serialize_lock_irql(wnd);
+	assert_irql(_irql_ == DISPATCH_LEVEL);
+	LIN2WIN2(mp->return_packet, wnd->nmb->mp_ctx, packet);
+	serialize_unlock_irql(wnd, irql);
+	EXIT4(return);
+}
+WIN_FUNC_DECL(return_packet,2)
+
+/* called via function pointer */
+wstdcall void NdisMIndicateReceivePacket(struct ndis_mp_block *nmb,
+					 struct ndis_packet **packets,
+					 UINT nr_packets)
+{
+	struct ndis_device *wnd;
+	ndis_buffer *buffer;
+	struct ndis_packet *packet;
+	struct sk_buff *skb;
+	ULONG i, length, total_length;
+	struct ndis_packet_oob_data *oob_data;
+	void *virt;
+	struct ndis_tcp_ip_checksum_packet_info csum;
+
+	ENTER3("%p, %d", nmb, nr_packets);
+	assert_irql(_irql_ <= DISPATCH_LEVEL);
+	wnd = nmb->wnd;
+	for (i = 0; i < nr_packets; i++) {
+		packet = packets[i];
+		if (!packet) {
+			WARNING("empty packet ignored");
+			continue;
+		}
+		wnd->net_dev->last_rx = jiffies;
+		/* get total number of bytes in packet */
+		NdisGetFirstBufferFromPacketSafe(packet, &buffer, &virt,
+						 &length, &total_length,
+						 NormalPagePriority);
+		TRACE3("%d, %d", length, total_length);
+		oob_data = NDIS_PACKET_OOB_DATA(packet);
+		TRACE3("0x%x, 0x%x, %Lu", packet->private.flags,
+		       packet->private.packet_flags, oob_data->time_rxed);
+		skb = dev_alloc_skb(total_length);
+		if (skb) {
+			while (buffer) {
+				memcpy_skb(skb, MmGetSystemAddressForMdl(buffer),
+					   MmGetMdlByteCount(buffer));
+				buffer = buffer->next;
+			}
+			skb->dev = wnd->net_dev;
+			skb->protocol = eth_type_trans(skb, wnd->net_dev);
+			pre_atomic_add(wnd->net_stats.rx_bytes, total_length);
+			atomic_inc_var(wnd->net_stats.rx_packets);
+			csum.value = (typeof(csum.value))(ULONG_PTR)
+				oob_data->ext.info[TcpIpChecksumPacketInfo];
+			TRACE3("0x%05x", csum.value);
+			if (wnd->rx_csum.value &&
+			    (csum.rx.tcp_succeeded || csum.rx.udp_succeeded ||
+			     csum.rx.ip_succeeded))
+				skb->ip_summed = CHECKSUM_UNNECESSARY;
+			else
+				skb->ip_summed = CHECKSUM_NONE;
+
+			if (in_interrupt())
+				netif_rx(skb);
+			else
+				netif_rx_ni(skb);
+		} else {
+			WARNING("couldn't allocate skb; packet dropped");
+			atomic_inc_var(wnd->net_stats.rx_dropped);
+		}
+
+		/* serialized drivers check the status upon return
+		 * from this function */
+		if (!deserialized_driver(wnd)) {
+			oob_data->status = NDIS_STATUS_SUCCESS;
+			continue;
+		}
+
+		/* if a deserialized driver sets
+		 * NDIS_STATUS_RESOURCES, then it reclaims the packet
+		 * upon return from this function */
+		if (oob_data->status == NDIS_STATUS_RESOURCES)
+			continue;
+
+		assert(oob_data->status == NDIS_STATUS_SUCCESS);
+		/* deserialized driver doesn't check the status upon
+		 * return from this function; we need to call
+		 * MiniportReturnPacket later for this packet. Calling
+		 * MiniportReturnPacket from here is not correct - the
+		 * driver doesn't expect it (at least Centrino driver
+		 * crashes) */
+		schedule_ntos_work_item(WIN_FUNC_PTR(return_packet,2),
+					wnd, packet);
+	}
+	EXIT3(return);
+}
+
+/* called via function pointer (by NdisMEthIndicateReceive macro); the
+ * first argument is nmb->eth_db */
+wstdcall void EthRxIndicateHandler(struct ndis_mp_block *nmb, void *rx_ctx,
+				   char *header1, char *header, UINT header_size,
+				   void *look_ahead, UINT look_ahead_size,
+				   UINT packet_size)
+{
+	struct sk_buff *skb = NULL;
+	struct ndis_device *wnd;
+	unsigned int skb_size = 0;
+	KIRQL irql;
+	struct ndis_packet_oob_data *oob_data;
+
+	ENTER3("nmb = %p, rx_ctx = %p, buf = %p, size = %d, buf = %p, "
+	       "size = %d, packet = %d", nmb, rx_ctx, header, header_size,
+	       look_ahead, look_ahead_size, packet_size);
+
+	wnd = nmb->wnd;
+	TRACE3("wnd = %p", wnd);
+	if (!wnd) {
+		ERROR("nmb is NULL");
+		EXIT3(return);
+	}
+	wnd->net_dev->last_rx = jiffies;
+
+	if (look_ahead_size < packet_size) {
+		struct ndis_packet *packet;
+		struct miniport *mp;
+		unsigned int bytes_txed;
+		NDIS_STATUS res;
+
+		NdisAllocatePacket(&res, &packet, wnd->tx_packet_pool);
+		if (res != NDIS_STATUS_SUCCESS) {
+			atomic_inc_var(wnd->net_stats.rx_dropped);
+			EXIT3(return);
+		}
+		oob_data = NDIS_PACKET_OOB_DATA(packet);
+		mp = &wnd->wd->driver->ndis_driver->mp;
+		irql = serialize_lock_irql(wnd);
+		assert_irql(_irql_ == DISPATCH_LEVEL);
+		res = LIN2WIN6(mp->tx_data, packet, &bytes_txed, nmb,
+			       rx_ctx, look_ahead_size, packet_size);
+		serialize_unlock_irql(wnd, irql);
+		TRACE3("%d, %d, %d", header_size, look_ahead_size, bytes_txed);
+		if (res == NDIS_STATUS_SUCCESS) {
+			ndis_buffer *buffer;
+			struct ndis_tcp_ip_checksum_packet_info csum;
+			skb = dev_alloc_skb(header_size + look_ahead_size +
+					    bytes_txed);
+			if (!skb) {
+				ERROR("couldn't allocate skb; packet dropped");
+				atomic_inc_var(wnd->net_stats.rx_dropped);
+				NdisFreePacket(packet);
+				return;
+			}
+			memcpy_skb(skb, header, header_size);
+			memcpy_skb(skb, look_ahead, look_ahead_size);
+			buffer = packet->private.buffer_head;
+			while (buffer) {
+				memcpy_skb(skb,
+					   MmGetSystemAddressForMdl(buffer),
+					   MmGetMdlByteCount(buffer));
+				buffer = buffer->next;
+			}
+			skb_size = header_size + look_ahead_size + bytes_txed;
+			csum.value = (typeof(csum.value))(ULONG_PTR)
+				oob_data->ext.info[TcpIpChecksumPacketInfo];
+			TRACE3("0x%05x", csum.value);
+			if (wnd->rx_csum.value &&
+			    (csum.rx.tcp_succeeded || csum.rx.udp_succeeded))
+				skb->ip_summed = CHECKSUM_UNNECESSARY;
+			else
+				skb->ip_summed = CHECKSUM_NONE;
+			NdisFreePacket(packet);
+		} else if (res == NDIS_STATUS_PENDING) {
+			/* driver will call td_complete */
+			oob_data->look_ahead = kmalloc(look_ahead_size,
+						       GFP_ATOMIC);
+			if (!oob_data->look_ahead) {
+				NdisFreePacket(packet);
+				ERROR("packet dropped");
+				atomic_inc_var(wnd->net_stats.rx_dropped);
+				EXIT3(return);
+			}
+			assert(sizeof(oob_data->header) == header_size);
+			memcpy(oob_data->header, header,
+			       sizeof(oob_data->header));
+			memcpy(oob_data->look_ahead, look_ahead,
+			       look_ahead_size);
+			oob_data->look_ahead_size = look_ahead_size;
+			EXIT3(return);
+		} else {
+			WARNING("packet dropped: %08X", res);
+			atomic_inc_var(wnd->net_stats.rx_dropped);
+			NdisFreePacket(packet);
+			EXIT3(return);
+		}
+	} else {
+		skb_size = header_size + packet_size;
+		skb = dev_alloc_skb(skb_size);
+		if (skb) {
+			memcpy_skb(skb, header, header_size);
+			memcpy_skb(skb, look_ahead, packet_size);
+		}
+	}
+
+	if (skb) {
+		skb->dev = wnd->net_dev;
+		skb->protocol = eth_type_trans(skb, wnd->net_dev);
+		pre_atomic_add(wnd->net_stats.rx_bytes, skb_size);
+		atomic_inc_var(wnd->net_stats.rx_packets);
+		if (in_interrupt())
+			netif_rx(skb);
+		else
+			netif_rx_ni(skb);
+	}
+
+	EXIT3(return);
+}
+
+/* called via function pointer */
+wstdcall void NdisMTransferDataComplete(struct ndis_mp_block *nmb,
+					struct ndis_packet *packet,
+					NDIS_STATUS status, UINT bytes_txed)
+{
+	struct ndis_device *wnd = nmb->wnd;
+	struct sk_buff *skb;
+	unsigned int skb_size;
+	struct ndis_packet_oob_data *oob_data;
+	ndis_buffer *buffer;
+	struct ndis_tcp_ip_checksum_packet_info csum;
+
+	ENTER3("wnd = %p, packet = %p, bytes_txed = %d",
+	       wnd, packet, bytes_txed);
+	if (!packet) {
+		WARNING("illegal packet");
+		EXIT3(return);
+	}
+	wnd->net_dev->last_rx = jiffies;
+	oob_data = NDIS_PACKET_OOB_DATA(packet);
+	skb_size = sizeof(oob_data->header) + oob_data->look_ahead_size +
+		bytes_txed;
+	skb = dev_alloc_skb(skb_size);
+	if (!skb) {
+		kfree(oob_data->look_ahead);
+		NdisFreePacket(packet);
+		ERROR("couldn't allocate skb; packet dropped");
+		atomic_inc_var(wnd->net_stats.rx_dropped);
+		EXIT3(return);
+	}
+	memcpy_skb(skb, oob_data->header, sizeof(oob_data->header));
+	memcpy_skb(skb, oob_data->look_ahead, oob_data->look_ahead_size);
+	buffer = packet->private.buffer_head;
+	while (buffer) {
+		memcpy_skb(skb, MmGetSystemAddressForMdl(buffer),
+			   MmGetMdlByteCount(buffer));
+		buffer = buffer->next;
+	}
+	kfree(oob_data->look_ahead);
+	NdisFreePacket(packet);
+	skb->dev = wnd->net_dev;
+	skb->protocol = eth_type_trans(skb, wnd->net_dev);
+	pre_atomic_add(wnd->net_stats.rx_bytes, skb_size);
+	atomic_inc_var(wnd->net_stats.rx_packets);
+
+	csum.value = (typeof(csum.value))(ULONG_PTR)
+		oob_data->ext.info[TcpIpChecksumPacketInfo];
+	TRACE3("0x%05x", csum.value);
+	if (wnd->rx_csum.value &&
+	    (csum.rx.tcp_succeeded || csum.rx.udp_succeeded))
+		skb->ip_summed = CHECKSUM_UNNECESSARY;
+	else
+		skb->ip_summed = CHECKSUM_NONE;
+
+	if (in_interrupt())
+		netif_rx(skb);
+	else
+		netif_rx_ni(skb);
+}
+
+/* called via function pointer */
+wstdcall void EthRxComplete(struct ndis_mp_block *nmb)
+{
+	TRACE3("");
+}
+
+/* called via function pointer */
+wstdcall void NdisMQueryInformationComplete(struct ndis_mp_block *nmb,
+					    NDIS_STATUS status)
+{
+	struct ndis_device *wnd = nmb->wnd;
+	typeof(wnd->ndis_req_task) task;
+
+	ENTER2("nmb: %p, wnd: %p, %08X", nmb, wnd, status);
+	wnd->ndis_req_status = status;
+	wnd->ndis_req_done = 1;
+	if ((task = xchg(&wnd->ndis_req_task, NULL)))
+		wake_up_process(task);
+	else
+		WARNING("invalid task");
+	EXIT2(return);
+}
+
+/* called via function pointer */
+wstdcall void NdisMSetInformationComplete(struct ndis_mp_block *nmb,
+					  NDIS_STATUS status)
+{
+	struct ndis_device *wnd = nmb->wnd;
+	typeof(wnd->ndis_req_task) task;
+
+	ENTER2("status = %08X", status);
+	wnd->ndis_req_status = status;
+	wnd->ndis_req_done = 1;
+	if ((task = xchg(&wnd->ndis_req_task, NULL)))
+		wake_up_process(task);
+	else
+		WARNING("invalid task");
+	EXIT2(return);
+}
+
+/* called via function pointer */
+wstdcall void NdisMResetComplete(struct ndis_mp_block *nmb,
+				 NDIS_STATUS status, BOOLEAN address_reset)
+{
+	struct ndis_device *wnd = nmb->wnd;
+	typeof(wnd->ndis_req_task) task;
+
+	ENTER2("status: %08X, %u", status, address_reset);
+	wnd->ndis_req_status = status;
+	wnd->ndis_req_done = address_reset + 1;
+	if ((task = xchg(&wnd->ndis_req_task, NULL)))
+		wake_up_process(task);
+	else
+		WARNING("invalid task");
+	EXIT2(return);
+}
+
+wstdcall void WIN_FUNC(NdisMSleep,1)
+	(ULONG us)
+{
+	unsigned long delay;
+
+	ENTER4("%p: us: %u", current, us);
+	delay = USEC_TO_HZ(us);
+	sleep_hz(delay);
+	TRACE4("%p: done", current);
+}
+
+wstdcall void WIN_FUNC(NdisGetCurrentSystemTime,1)
+	(LARGE_INTEGER *time)
+{
+	*time = ticks_1601();
+	TRACE5("%Lu, %lu", *time, jiffies);
+}
+
+wstdcall LONG WIN_FUNC(NdisInterlockedDecrement,1)
+	(LONG *val)
+{
+	return InterlockedDecrement(val);
+}
+
+wstdcall LONG WIN_FUNC(NdisInterlockedIncrement,1)
+	(LONG *val)
+{
+	return InterlockedIncrement(val);
+}
+
+wstdcall struct nt_list *WIN_FUNC(NdisInterlockedInsertHeadList,3)
+	(struct nt_list *head, struct nt_list *entry,
+	 struct ndis_spinlock *lock)
+{
+	return ExInterlockedInsertHeadList(head, entry, &lock->klock);
+}
+
+wstdcall struct nt_list *WIN_FUNC(NdisInterlockedInsertTailList,3)
+	(struct nt_list *head, struct nt_list *entry,
+	 struct ndis_spinlock *lock)
+{
+	return ExInterlockedInsertTailList(head, entry, &lock->klock);
+}
+
+wstdcall struct nt_list *WIN_FUNC(NdisInterlockedRemoveHeadList,2)
+	(struct nt_list *head, struct ndis_spinlock *lock)
+{
+	return ExInterlockedRemoveHeadList(head, &lock->klock);
+}
+
+wstdcall NDIS_STATUS WIN_FUNC(NdisMInitializeScatterGatherDma,3)
+	(struct ndis_mp_block *nmb, BOOLEAN dma_size, ULONG max_phy_map)
+{
+	struct ndis_device *wnd = nmb->wnd;
+	ENTER2("dma_size=%d, maxtransfer=%u", dma_size, max_phy_map);
+#ifdef CONFIG_X86_64
+	if (dma_size != NDIS_DMA_64BITS) {
+		TRACE1("DMA size is not 64-bits");
+		if (pci_set_dma_mask(wnd->wd->pci.pdev, DMA_BIT_MASK(32)) ||
+		    pci_set_consistent_dma_mask(wnd->wd->pci.pdev,
+						DMA_BIT_MASK(32)))
+			WARNING("setting dma mask failed");
+	}
+#endif
+	if ((wnd->attributes & NDIS_ATTRIBUTE_BUS_MASTER) &&
+	    wrap_is_pci_bus(wnd->wd->dev_bus)) {
+		wnd->sg_dma_size = max_phy_map;
+		return NDIS_STATUS_SUCCESS;
+	} else
+		EXIT1(return NDIS_STATUS_NOT_SUPPORTED);
+}
+
+wstdcall ULONG WIN_FUNC(NdisMGetDmaAlignment,1)
+	(struct ndis_mp_block *nmb)
+{
+	ENTER3("");
+	return dma_get_cache_alignment();
+}
+
+wstdcall CHAR WIN_FUNC(NdisSystemProcessorCount,0)
+	(void)
+{
+	return (CHAR)NR_CPUS;
+}
+
+wstdcall void WIN_FUNC(NdisGetCurrentProcessorCounts,3)
+	(ULONG *idle, ULONG *kernel_user, ULONG *index)
+{
+	int cpu = smp_processor_id();
+	*idle = kstat_cpu(cpu).cpustat.idle;
+	*kernel_user = kstat_cpu(cpu).cpustat.system +
+		kstat_cpu(cpu).cpustat.user;
+	*index = cpu;
+}
+
+wstdcall void WIN_FUNC(NdisInitializeEvent,1)
+	(struct ndis_event *ndis_event)
+{
+	EVENTENTER("%p", ndis_event);
+	KeInitializeEvent(&ndis_event->nt_event, NotificationEvent, 0);
+}
+
+wstdcall BOOLEAN WIN_FUNC(NdisWaitEvent,2)
+	(struct ndis_event *ndis_event, UINT ms)
+{
+	LARGE_INTEGER ticks;
+	NTSTATUS res;
+
+	EVENTENTER("%p %u", ndis_event, ms);
+	ticks = -((LARGE_INTEGER)ms * TICKSPERMSEC);
+	res = KeWaitForSingleObject(&ndis_event->nt_event, 0, 0, TRUE,
+				    ms == 0 ? NULL : &ticks);
+	if (res == STATUS_SUCCESS)
+		EXIT3(return TRUE);
+	else
+		EXIT3(return FALSE);
+}
+
+wstdcall void WIN_FUNC(NdisSetEvent,1)
+	(struct ndis_event *ndis_event)
+{
+	EVENTENTER("%p", ndis_event);
+	KeSetEvent(&ndis_event->nt_event, 0, 0);
+}
+
+wstdcall void WIN_FUNC(NdisResetEvent,1)
+	(struct ndis_event *ndis_event)
+{
+	EVENTENTER("%p", ndis_event);
+	KeResetEvent(&ndis_event->nt_event);
+}
+
+static void ndis_worker(worker_param_t dummy)
+{
+	struct nt_list *ent;
+	struct ndis_work_item *ndis_work_item;
+
+	WORKENTER("");
+	while (1) {
+		spin_lock_bh(&ndis_work_list_lock);
+		ent = RemoveHeadList(&ndis_work_list);
+		spin_unlock_bh(&ndis_work_list_lock);
+		if (!ent)
+			break;
+		ndis_work_item = container_of(ent, struct ndis_work_item, list);
+		WORKTRACE("%p: %p, %p", ndis_work_item,
+			  ndis_work_item->func, ndis_work_item->ctx);
+		LIN2WIN2(ndis_work_item->func, ndis_work_item,
+			 ndis_work_item->ctx);
+		WORKTRACE("%p done", ndis_work_item);
+	}
+	WORKEXIT(return);
+}
+
+wstdcall NDIS_STATUS WIN_FUNC(NdisScheduleWorkItem,1)
+	(struct ndis_work_item *ndis_work_item)
+{
+	ENTER3("%p", ndis_work_item);
+	spin_lock_bh(&ndis_work_list_lock);
+	InsertTailList(&ndis_work_list, &ndis_work_item->list);
+	spin_unlock_bh(&ndis_work_list_lock);
+	WORKTRACE("scheduling %p", ndis_work_item);
+	schedule_ndis_work(&ndis_work);
+	EXIT3(return NDIS_STATUS_SUCCESS);
+}
+
+wstdcall void WIN_FUNC(NdisMGetDeviceProperty,6)
+	(struct ndis_mp_block *nmb, void **phy_dev, void **func_dev,
+	 void **next_dev, void **alloc_res, void**trans_res)
+{
+	ENTER2("nmb: %p, phy_dev = %p, func_dev = %p, next_dev = %p, "
+	       "alloc_res = %p, trans_res = %p", nmb, phy_dev, func_dev,
+	       next_dev, alloc_res, trans_res);
+	if (phy_dev)
+		*phy_dev = nmb->pdo;
+	if (func_dev)
+		*func_dev = nmb->fdo;
+	if (next_dev)
+		*next_dev = nmb->next_device;
+}
+
+wstdcall void WIN_FUNC(NdisMRegisterUnloadHandler,2)
+	(struct driver_object *drv_obj, void *unload)
+{
+	if (drv_obj)
+		drv_obj->unload = unload;
+	return;
+}
+
+wstdcall UINT WIN_FUNC(NdisGetVersion,0)
+	(void)
+{
+	return 0x00050001;
+}
+
+wstdcall NDIS_STATUS WIN_FUNC(NdisMQueryAdapterInstanceName,2)
+	(struct unicode_string *name, struct ndis_mp_block *nmb)
+{
+	struct ndis_device *wnd = nmb->wnd;
+	struct ansi_string ansi;
+
+	if (wrap_is_pci_bus(wnd->wd->dev_bus))
+		RtlInitAnsiString(&ansi, "PCI Ethernet Adapter");
+	else
+		RtlInitAnsiString(&ansi, "USB Ethernet Adapter");
+
+	if (RtlAnsiStringToUnicodeString(name, &ansi, TRUE))
+		EXIT2(return NDIS_STATUS_RESOURCES);
+	else
+		EXIT2(return NDIS_STATUS_SUCCESS);
+}
+
+wstdcall NDIS_STATUS WIN_FUNC(NdisWriteEventLogEntry,7)
+	(void *handle, NDIS_STATUS code, ULONG value, USHORT n,
+	 void *strings, ULONG datasize, void *data)
+{
+	TRACE1("0x%x, 0x%x, %u, %u", code, value, n, datasize);
+	return NDIS_STATUS_SUCCESS;
+}
+
+wstdcall void *WIN_FUNC(NdisGetRoutineAddress,1)
+	(struct unicode_string *unicode_string)
+{
+	struct ansi_string ansi_string;
+	void *address;
+
+	if (RtlUnicodeStringToAnsiString(&ansi_string, unicode_string, TRUE) !=
+	    STATUS_SUCCESS)
+		EXIT1(return NULL);
+	INFO("%s", ansi_string.buf);
+	address = ndis_get_routine_address(ansi_string.buf);
+	RtlFreeAnsiString(&ansi_string);
+	return address;
+}
+
+wstdcall ULONG WIN_FUNC(NdisReadPcmciaAttributeMemory,4)
+	(struct ndis_mp_block *nmb, ULONG offset, void *buffer,
+	 ULONG length)
+{
+	TODO();
+	return 0;
+}
+
+wstdcall ULONG WIN_FUNC(NdisWritePcmciaAttributeMemory,4)
+	(struct ndis_mp_block *nmb, ULONG offset, void *buffer,
+	 ULONG length)
+{
+	TODO();
+	return 0;
+}
+
+wstdcall void WIN_FUNC(NdisMCoIndicateReceivePacket,3)
+	(struct ndis_mp_block *nmb, struct ndis_packet **packets,
+	 UINT nr_packets)
+{
+	ENTER3("nmb = %p", nmb);
+	NdisMIndicateReceivePacket(nmb, packets, nr_packets);
+	EXIT3(return);
+}
+
+wstdcall void WIN_FUNC(NdisMCoSendComplete,3)
+	(NDIS_STATUS status, struct ndis_mp_block *nmb,
+	 struct ndis_packet *packet)
+{
+	ENTER3("%08x", status);
+	NdisMSendComplete(nmb, packet, status);
+	EXIT3(return);
+}
+
+wstdcall void WIN_FUNC(NdisMCoRequestComplete,3)
+	(NDIS_STATUS status, struct ndis_mp_block *nmb,
+	 struct ndis_request *ndis_request)
+{
+	struct ndis_device *wnd = nmb->wnd;
+	typeof(wnd->ndis_req_task) task;
+
+	ENTER3("%08X", status);
+	wnd->ndis_req_status = status;
+	wnd->ndis_req_done = 1;
+	if ((task = xchg(&wnd->ndis_req_task, NULL)))
+		wake_up_process(task);
+	else
+		WARNING("invalid task");
+	EXIT3(return);
+}
+
+wstdcall NDIS_STATUS WIN_FUNC(NdisIMNotifiyPnPEvent,2)
+	(struct ndis_mp_block *nmb, struct net_pnp_event *event)
+{
+	ENTER2("%p, %d", nmb, event->code);
+	/* NdisWrapper never calls protocol's pnp event notifier, so
+	 * nothing to do here */
+	EXIT2(return NDIS_STATUS_SUCCESS);
+}
+
+wstdcall void WIN_FUNC(NdisCompletePnPEvent,2)
+	(NDIS_STATUS status, void *handle, struct net_pnp_event *event)
+{
+	ENTER2("%d, %p, %d", status, handle, event->code);
+	/* NdisWrapper never calls protocol's pnp event notifier, so
+	 * nothing to do here */
+	EXIT2(return);
+}
+
+wstdcall NDIS_STATUS WIN_FUNC(NdisMSetMiniportSecondary,2)
+	(struct ndis_mp_block *nmb2, struct ndis_mp_block *nmb1)
+{
+	ENTER3("%p, %p", nmb1, nmb2);
+	TODO();
+	EXIT3(return NDIS_STATUS_SUCCESS);
+}
+
+wstdcall NDIS_STATUS WIN_FUNC(NdisMPromoteMiniport,1)
+	(struct ndis_mp_block *nmb)
+{
+	ENTER3("%p", nmb);
+	TODO();
+	EXIT3(return NDIS_STATUS_SUCCESS);
+}
+
+wstdcall void WIN_FUNC(NdisMCoActivateVcComplete,3)
+	(NDIS_STATUS status, void *handle, void *params)
+{
+	TODO();
+}
+
+wstdcall void WIN_FUNC(NdisMCoDeactivateVcComplete,2)
+	(NDIS_STATUS status, void *handle)
+{
+	TODO();
+}
+
+wstdcall void WIN_FUNC(NdisMRemoveMiniport,1)
+	(void *handle)
+{
+	TODO();
+}
+
+static void *ndis_get_routine_address(char *name)
+{
+	int i;
+	ENTER2("%p", name);
+	for (i = 0; i < sizeof(ndis_exports) / sizeof(ndis_exports[0]); i++) {
+		if (strcmp(name, ndis_exports[i].name) == 0) {
+			TRACE2("%p", ndis_exports[i].func);
+			return ndis_exports[i].func;
+		}
+	}
+	EXIT2(return NULL);
+}
+
+/* ndis_init_device is called for each device */
+int ndis_init_device(struct ndis_device *wnd)
+{
+	struct ndis_mp_block *nmb = wnd->nmb;
+
+	KeInitializeSpinLock(&nmb->lock);
+	wnd->mp_interrupt = NULL;
+	wnd->wrap_timer_slist.next = NULL;
+	if (wnd->wd->driver->ndis_driver)
+		wnd->wd->driver->ndis_driver->mp.shutdown = NULL;
+
+	nmb->filterdbs.eth_db = nmb;
+	nmb->filterdbs.tr_db = nmb;
+	nmb->filterdbs.fddi_db = nmb;
+	nmb->filterdbs.arc_db = nmb;
+
+	nmb->rx_packet = WIN_FUNC_PTR(NdisMIndicateReceivePacket,3);
+	nmb->send_complete = WIN_FUNC_PTR(NdisMSendComplete,3);
+	nmb->send_resource_avail = WIN_FUNC_PTR(NdisMSendResourcesAvailable,1);
+	nmb->status = WIN_FUNC_PTR(NdisMIndicateStatus,4);
+	nmb->status_complete = WIN_FUNC_PTR(NdisMIndicateStatusComplete,1);
+	nmb->queryinfo_complete = WIN_FUNC_PTR(NdisMQueryInformationComplete,2);
+	nmb->setinfo_complete = WIN_FUNC_PTR(NdisMSetInformationComplete,2);
+	nmb->reset_complete = WIN_FUNC_PTR(NdisMResetComplete,3);
+	nmb->eth_rx_indicate = WIN_FUNC_PTR(EthRxIndicateHandler,8);
+	nmb->eth_rx_complete = WIN_FUNC_PTR(EthRxComplete,1);
+	nmb->td_complete = WIN_FUNC_PTR(NdisMTransferDataComplete,4);
+	return 0;
+}
+
+/* ndis_exit_device is called for each device */
+void ndis_exit_device(struct ndis_device *wnd)
+{
+	struct wrap_device_setting *setting;
+	ENTER2("%p", wnd);
+	if (down_interruptible(&loader_mutex))
+		WARNING("couldn't obtain loader_mutex");
+	nt_list_for_each_entry(setting, &wnd->wd->settings, list) {
+		struct ndis_configuration_parameter *param;
+		param = setting->encoded;
+		if (param) {
+			if (param->type == NdisParameterString)
+				RtlFreeUnicodeString(&param->data.string);
+			ExFreePool(param);
+			setting->encoded = NULL;
+		}
+	}
+	up(&loader_mutex);
+}
+
+/* ndis_init is called once when module is loaded */
+int ndis_init(void)
+{
+	InitializeListHead(&ndis_work_list);
+	spin_lock_init(&ndis_work_list_lock);
+	initialize_work(&ndis_work, ndis_worker, NULL);
+
+	ndis_wq = create_singlethread_workqueue("ndis_wq");
+	if (!ndis_wq) {
+		WARNING("couldn't create worker thread");
+		EXIT1(return -ENOMEM);
+	}
+
+	ndis_worker_thread = wrap_worker_init(ndis_wq);
+	TRACE1("%p", ndis_worker_thread);
+	return 0;
+}
+
+/* ndis_exit is called once when module is removed */
+void ndis_exit(void)
+{
+	ENTER1("");
+	if (ndis_wq)
+		destroy_workqueue(ndis_wq);
+	TRACE1("%p", ndis_worker_thread);
+	if (ndis_worker_thread)
+		ObDereferenceObject(ndis_worker_thread);
+	EXIT1(return);
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/ndiswrapper/Kconfig
+++ linux-mvl-dove-2.6.32/ubuntu/ndiswrapper/Kconfig
@@ -0,0 +1,4 @@
+config NDISWRAPPER
+	tristate "Wrapper for Windows NDIS network drivers"
+	depends on NET
+	default m
--- linux-mvl-dove-2.6.32.orig/ubuntu/ndiswrapper/BOM
+++ linux-mvl-dove-2.6.32/ubuntu/ndiswrapper/BOM
@@ -0,0 +1,2 @@
+Downloaded from:	http://sourceforge.net/project/showfiles.php?group_id=93482
+Current Version:	1.55
--- linux-mvl-dove-2.6.32.orig/ubuntu/ndiswrapper/ndiswrapper.h
+++ linux-mvl-dove-2.6.32/ubuntu/ndiswrapper/ndiswrapper.h
@@ -0,0 +1,219 @@
+/*
+ *  Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *  GNU General Public License for more details.
+ *
+ */
+
+#ifndef _NDISWRAPPER_H_
+#define _NDISWRAPPER_H_
+
+#define DRIVER_VERSION "1.55"
+#define UTILS_VERSION "1.9"
+
+#define DRIVER_NAME "ndiswrapper"
+#define DRIVER_CONFIG_DIR "/etc/ndiswrapper"
+
+#define SSID_MAX_WPA_IE_LEN 40
+#define NDIS_ESSID_MAX_SIZE 32
+#define NDIS_ENCODING_TOKEN_MAX 32
+#define MAX_ENCR_KEYS 4
+#define TX_RING_SIZE 16
+#define NDIS_MAX_RATES 8
+#define NDIS_MAX_RATES_EX 16
+#define WLAN_EID_GENERIC 221
+#define MAX_WPA_IE_LEN 64
+#define MAX_STR_LEN 512
+
+#define WRAP_PCI_BUS 5
+#define WRAP_PCMCIA_BUS 8
+/* some USB devices, e.g., DWL-G120 have BusType as 0 */
+#define WRAP_INTERNAL_BUS 0
+/* documentation at msdn says 15 is PNP bus, but inf files from all
+ * vendors say 15 is USB; which is correct? */
+#define WRAP_USB_BUS 15
+
+/* NDIS device must be 0, for compatability with old versions of
+ * ndiswrapper where device type for NDIS drivers is 0 */
+#define WRAP_NDIS_DEVICE 0
+#define WRAP_USB_DEVICE 1
+#define WRAP_BLUETOOTH_DEVICE1 2
+#define WRAP_BLUETOOTH_DEVICE2 3
+
+#define WRAP_DEVICE_BUS(dev, bus) ((dev) << 8 | (bus))
+#define WRAP_BUS(dev_bus) ((dev_bus) & 0x000FF)
+#define WRAP_DEVICE(dev_bus) ((dev_bus) >> 8)
+
+#define MAX_DRIVER_NAME_LEN 32
+#define MAX_VERSION_STRING_LEN 64
+#define MAX_SETTING_NAME_LEN 128
+#define MAX_SETTING_VALUE_LEN 256
+
+#define MAX_DRIVER_PE_IMAGES 4
+#define MAX_DRIVER_BIN_FILES 5
+#define MAX_DEVICE_SETTINGS 512
+
+#define MAX_ALLOCATED_URBS 15
+
+#define DEV_ANY_ID -1
+
+#define MAC2STR(a) (a)[0], (a)[1], (a)[2], (a)[3], (a)[4], (a)[5]
+#define MACSTRSEP "%02x:%02x:%02x:%02x:%02x:%02x"
+#define MACSTR "%02x%02x%02x%02x%02x%02x"
+#define MACINTADR(a) (int*)&((a)[0]), (int*)&((a)[1]), (int*)&((a)[2]), \
+		(int*)&((a)[3]), (int*)&((a)[4]), (int*)&((a)[5])
+
+#ifdef __KERNEL__
+/* DEBUG macros */
+
+#define MSG(level, fmt, ...)				\
+	printk(level "ndiswrapper (%s:%d): " fmt "\n",	\
+	       __func__, __LINE__ , ## __VA_ARGS__)
+
+#define WARNING(fmt, ...) MSG(KERN_WARNING, fmt, ## __VA_ARGS__)
+#define ERROR(fmt, ...) MSG(KERN_ERR, fmt , ## __VA_ARGS__)
+#define INFO(fmt, ...) MSG(KERN_INFO, fmt , ## __VA_ARGS__)
+#define TODO() WARNING("not fully implemented (yet)")
+
+#define TRACE(fmt, ...) do { } while (0)
+#define TRACE1(fmt, ...) do { } while (0)
+#define TRACE2(fmt, ...) do { } while (0)
+#define TRACE3(fmt, ...) do { }  while (0)
+#define TRACE4(fmt, ...) do { } while (0)
+#define TRACE5(fmt, ...) do { } while (0)
+#define TRACE6(fmt, ...) do { } while (0)
+
+/* for a block of code */
+#define DBG_BLOCK(level) while (0)
+
+extern int debug;
+
+#if defined DEBUG
+#undef TRACE
+#define TRACE(level, fmt, ...)				       \
+do {								       \
+	if (debug >= level)					       \
+		printk(KERN_INFO "%s (%s:%d): " fmt "\n", DRIVER_NAME, \
+		       __func__, __LINE__ , ## __VA_ARGS__);       \
+} while (0)
+#undef DBG_BLOCK
+#define DBG_BLOCK(level) if (debug >= level)
+#endif
+
+#if defined(DEBUG) && DEBUG >= 1
+#undef TRACE1
+#define TRACE1(fmt, ...) TRACE(1, fmt , ## __VA_ARGS__)
+#endif
+
+#if defined(DEBUG) && DEBUG >= 2
+#undef TRACE2
+#define TRACE2(fmt, ...) TRACE(2, fmt , ## __VA_ARGS__)
+#endif
+
+#if defined(DEBUG) && DEBUG >= 3
+#undef TRACE3
+#define TRACE3(fmt, ...) TRACE(3, fmt , ## __VA_ARGS__)
+#endif
+
+#if defined(DEBUG) && DEBUG >= 4
+#undef TRACE4
+#define TRACE4(fmt, ...) TRACE(4, fmt , ## __VA_ARGS__)
+#endif
+
+#if defined(DEBUG) && DEBUG >= 5
+#undef TRACE5
+#define TRACE5(fmt, ...) TRACE(5, fmt , ## __VA_ARGS__)
+#endif
+
+#if defined(DEBUG) && DEBUG >= 6
+#undef TRACE6
+#define TRACE6(fmt, ...) TRACE(6, fmt , ## __VA_ARGS__)
+#endif
+
+#define ENTER1(fmt, ...) TRACE1("Enter " fmt , ## __VA_ARGS__)
+#define ENTER2(fmt, ...) TRACE2("Enter " fmt , ## __VA_ARGS__)
+#define ENTER3(fmt, ...) TRACE3("Enter " fmt , ## __VA_ARGS__)
+#define ENTER4(fmt, ...) TRACE4("Enter " fmt , ## __VA_ARGS__)
+#define ENTER5(fmt, ...) TRACE5("Enter " fmt , ## __VA_ARGS__)
+#define ENTER6(fmt, ...) TRACE6("Enter " fmt , ## __VA_ARGS__)
+
+#define EXIT1(stmt) do { TRACE1("Exit"); stmt; } while(0)
+#define EXIT2(stmt) do { TRACE2("Exit"); stmt; } while(0)
+#define EXIT3(stmt) do { TRACE3("Exit"); stmt; } while(0)
+#define EXIT4(stmt) do { TRACE4("Exit"); stmt; } while(0)
+#define EXIT5(stmt) do { TRACE5("Exit"); stmt; } while(0)
+#define EXIT6(stmt) do { TRACE6("Exit"); stmt; } while(0)
+
+#if defined(USB_DEBUG)
+#define USBTRACE TRACE1
+#define USBENTER ENTER1
+#define USBEXIT EXIT1
+#else
+#define USBTRACE(fmt, ...)
+#define USBENTER(fmt, ...)
+#define USBEXIT(stmt) stmt
+#endif
+
+#if defined(EVENT_DEBUG)
+#define EVENTTRACE TRACE1
+#define EVENTENTER ENTER1
+#define EVENTEXIT EXIT1
+#else
+#define EVENTTRACE(fmt, ...)
+#define EVENTENTER(fmt, ...)
+#define EVENTEXIT(stmt) stmt
+#endif
+
+#if defined(TIMER_DEBUG)
+#define TIMERTRACE TRACE1
+#define TIMERENTER ENTER1
+#define TIMEREXIT EXIT1
+#else
+#define TIMERTRACE(fmt, ...)
+#define TIMERENTER(fmt, ...)
+#define TIMEREXIT(stmt) stmt
+#endif
+
+#if defined(IO_DEBUG)
+#define IOTRACE TRACE1
+#define IOENTER ENTER1
+#define IOEXIT EXIT1
+#else
+#define IOTRACE(fmt, ...)
+#define IOENTER(fmt, ...)
+#define IOEXIT(stmt) stmt
+#endif
+
+#if defined(WORK_DEBUG)
+#define WORKTRACE TRACE1
+#define WORKENTER ENTER1
+#define WORKEXIT EXIT1
+#else
+#define WORKTRACE(fmt, ...)
+#define WORKENTER(fmt, ...)
+#define WORKEXIT(stmt) stmt
+#endif
+
+#ifdef DEBUG
+#define assert(expr)							\
+do {									\
+	if (!(expr)) {							\
+		ERROR("assertion '%s' failed", #expr);			\
+		dump_stack();						\
+	}								\
+} while (0)
+#else
+#define assert(expr) do { } while (0)
+#endif
+
+#endif // __KERNEL__
+
+#endif // NDISWRAPPER_H
--- linux-mvl-dove-2.6.32.orig/ubuntu/ndiswrapper/proc.c
+++ linux-mvl-dove-2.6.32/ubuntu/ndiswrapper/proc.c
@@ -0,0 +1,565 @@
+/*
+ *  Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *  GNU General Public License for more details.
+ *
+ */
+#include <linux/proc_fs.h>
+#include <linux/module.h>
+#include <asm/uaccess.h>
+
+#include "ndis.h"
+#include "iw_ndis.h"
+#include "wrapndis.h"
+#include "pnp.h"
+#include "wrapper.h"
+
+#define MAX_PROC_STR_LEN 32
+
+static struct proc_dir_entry *wrap_procfs_entry;
+
+static int procfs_read_ndis_stats(char *page, char **start, off_t off,
+				  int count, int *eof, void *data)
+{
+	char *p = page;
+	struct ndis_device *wnd = (struct ndis_device *)data;
+	struct ndis_wireless_stats stats;
+	NDIS_STATUS res;
+	ndis_rssi rssi;
+
+	if (off != 0) {
+		*eof = 1;
+		return 0;
+	}
+
+	res = mp_query(wnd, OID_802_11_RSSI, &rssi, sizeof(rssi));
+	if (!res)
+		p += sprintf(p, "signal_level=%d dBm\n", (s32)rssi);
+
+	res = mp_query(wnd, OID_802_11_STATISTICS, &stats, sizeof(stats));
+	if (!res) {
+
+		p += sprintf(p, "tx_frames=%Lu\n", stats.tx_frag);
+		p += sprintf(p, "tx_multicast_frames=%Lu\n",
+			     stats.tx_multi_frag);
+		p += sprintf(p, "tx_failed=%Lu\n", stats.failed);
+		p += sprintf(p, "tx_retry=%Lu\n", stats.retry);
+		p += sprintf(p, "tx_multi_rerty=%Lu\n", stats.multi_retry);
+		p += sprintf(p, "tx_rtss_success=%Lu\n", stats.rtss_succ);
+		p += sprintf(p, "tx_rtss_fail=%Lu\n", stats.rtss_fail);
+		p += sprintf(p, "ack_fail=%Lu\n", stats.ack_fail);
+		p += sprintf(p, "frame_duplicates=%Lu\n", stats.frame_dup);
+		p += sprintf(p, "rx_frames=%Lu\n", stats.rx_frag);
+		p += sprintf(p, "rx_multicast_frames=%Lu\n",
+			     stats.rx_multi_frag);
+		p += sprintf(p, "fcs_errors=%Lu\n", stats.fcs_err);
+	}
+
+	if (p - page > count) {
+		ERROR("wrote %lu bytes (limit is %u)\n",
+		      (unsigned long)(p - page), count);
+		*eof = 1;
+	}
+
+	return p - page;
+}
+
+static int procfs_read_ndis_encr(char *page, char **start, off_t off,
+				 int count, int *eof, void *data)
+{
+	char *p = page;
+	struct ndis_device *wnd = (struct ndis_device *)data;
+	int i, encr_status, auth_mode, infra_mode;
+	NDIS_STATUS res;
+	struct ndis_essid essid;
+	mac_address ap_address;
+
+	if (off != 0) {
+		*eof = 1;
+		return 0;
+	}
+
+	res = mp_query(wnd, OID_802_11_BSSID,
+		       &ap_address, sizeof(ap_address));
+	if (res)
+		memset(ap_address, 0, ETH_ALEN);
+	p += sprintf(p, "ap_address=%2.2X", ap_address[0]);
+	for (i = 1 ; i < ETH_ALEN ; i++)
+		p += sprintf(p, ":%2.2X", ap_address[i]);
+	p += sprintf(p, "\n");
+
+	res = mp_query(wnd, OID_802_11_SSID, &essid, sizeof(essid));
+	if (!res)
+		p += sprintf(p, "essid=%.*s\n", essid.length, essid.essid);
+
+	res = mp_query_int(wnd, OID_802_11_ENCRYPTION_STATUS, &encr_status);
+	if (!res) {
+		typeof(&wnd->encr_info.keys[0]) tx_key;
+		p += sprintf(p, "tx_key=%u\n", wnd->encr_info.tx_key_index);
+		p += sprintf(p, "key=");
+		tx_key = &wnd->encr_info.keys[wnd->encr_info.tx_key_index];
+		if (tx_key->length > 0)
+			for (i = 0; i < tx_key->length; i++)
+				p += sprintf(p, "%2.2X", tx_key->key[i]);
+		else
+			p += sprintf(p, "off");
+		p += sprintf(p, "\n");
+		p += sprintf(p, "encr_mode=%d\n", encr_status);
+	}
+	res = mp_query_int(wnd, OID_802_11_AUTHENTICATION_MODE, &auth_mode);
+	if (!res)
+		p += sprintf(p, "auth_mode=%d\n", auth_mode);
+	res = mp_query_int(wnd, OID_802_11_INFRASTRUCTURE_MODE, &infra_mode);
+	p += sprintf(p, "mode=%s\n", (infra_mode == Ndis802_11IBSS) ?
+		     "adhoc" : (infra_mode == Ndis802_11Infrastructure) ?
+		     "managed" : "auto");
+	if (p - page > count) {
+		WARNING("wrote %lu bytes (limit is %u)",
+			(unsigned long)(p - page), count);
+		*eof = 1;
+	}
+
+	return p - page;
+}
+
+static int procfs_read_ndis_hw(char *page, char **start, off_t off,
+			       int count, int *eof, void *data)
+{
+	char *p = page;
+	struct ndis_device *wnd = (struct ndis_device *)data;
+	struct ndis_configuration config;
+	unsigned int power_mode;
+	NDIS_STATUS res;
+	ndis_tx_power_level tx_power;
+	ULONG bit_rate;
+	ndis_rts_threshold rts_threshold;
+	ndis_fragmentation_threshold frag_threshold;
+	ndis_antenna antenna;
+	ULONG packet_filter;
+	int n;
+	mac_address mac;
+	char *hw_status[] = {"ready", "initializing", "resetting", "closing",
+			     "not ready"};
+
+	if (off != 0) {
+		*eof = 1;
+		return 0;
+	}
+
+	res = mp_query_int(wnd, OID_GEN_HARDWARE_STATUS, &n);
+	if (res == NDIS_STATUS_SUCCESS &&
+	    n >= 0 && n < sizeof(hw_status) / sizeof(hw_status[0]))
+		p += sprintf(p, "status=%s\n", hw_status[n]);
+
+	res = mp_query(wnd, OID_802_3_CURRENT_ADDRESS, mac, sizeof(mac));
+	if (!res)
+		p += sprintf(p, "mac: " MACSTRSEP "\n", MAC2STR(mac));
+	res = mp_query(wnd, OID_802_11_CONFIGURATION, &config, sizeof(config));
+	if (!res) {
+		p += sprintf(p, "beacon_period=%u msec\n",
+			     config.beacon_period);
+		p += sprintf(p, "atim_window=%u msec\n", config.atim_window);
+		p += sprintf(p, "frequency=%u kHZ\n", config.ds_config);
+		p += sprintf(p, "hop_pattern=%u\n",
+			     config.fh_config.hop_pattern);
+		p += sprintf(p, "hop_set=%u\n",
+			     config.fh_config.hop_set);
+		p += sprintf(p, "dwell_time=%u msec\n",
+			     config.fh_config.dwell_time);
+	}
+
+	res = mp_query(wnd, OID_802_11_TX_POWER_LEVEL,
+		       &tx_power, sizeof(tx_power));
+	if (!res)
+		p += sprintf(p, "tx_power=%u mW\n", tx_power);
+
+	res = mp_query(wnd, OID_GEN_LINK_SPEED, &bit_rate, sizeof(bit_rate));
+	if (!res)
+		p += sprintf(p, "bit_rate=%u kBps\n", (u32)bit_rate / 10);
+
+	res = mp_query(wnd, OID_802_11_RTS_THRESHOLD,
+		       &rts_threshold, sizeof(rts_threshold));
+	if (!res)
+		p += sprintf(p, "rts_threshold=%u bytes\n", rts_threshold);
+
+	res = mp_query(wnd, OID_802_11_FRAGMENTATION_THRESHOLD,
+		       &frag_threshold, sizeof(frag_threshold));
+	if (!res)
+		p += sprintf(p, "frag_threshold=%u bytes\n", frag_threshold);
+
+	res = mp_query_int(wnd, OID_802_11_POWER_MODE, &power_mode);
+	if (!res)
+		p += sprintf(p, "power_mode=%s\n",
+			     (power_mode == NDIS_POWER_OFF) ? "always_on" :
+			     (power_mode == NDIS_POWER_MAX) ?
+			     "max_savings" : "min_savings");
+
+	res = mp_query(wnd, OID_802_11_NUMBER_OF_ANTENNAS,
+		       &antenna, sizeof(antenna));
+	if (!res)
+		p += sprintf(p, "num_antennas=%u\n", antenna);
+
+	res = mp_query(wnd, OID_802_11_TX_ANTENNA_SELECTED,
+		       &antenna, sizeof(antenna));
+	if (!res)
+		p += sprintf(p, "tx_antenna=%u\n", antenna);
+
+	res = mp_query(wnd, OID_802_11_RX_ANTENNA_SELECTED,
+		       &antenna, sizeof(antenna));
+	if (!res)
+		p += sprintf(p, "rx_antenna=%u\n", antenna);
+
+	p += sprintf(p, "encryption_modes=%s%s%s%s%s%s%s\n",
+		     test_bit(Ndis802_11Encryption1Enabled, &wnd->capa.encr) ?
+		     "WEP" : "none",
+
+		     test_bit(Ndis802_11Encryption2Enabled, &wnd->capa.encr) ?
+		     "; TKIP with WPA" : "",
+		     test_bit(Ndis802_11AuthModeWPA2, &wnd->capa.auth) ?
+		     ", WPA2" : "",
+		     test_bit(Ndis802_11AuthModeWPA2PSK, &wnd->capa.auth) ?
+		     ", WPA2PSK" : "",
+
+		     test_bit(Ndis802_11Encryption3Enabled, &wnd->capa.encr) ?
+		     "; AES/CCMP with WPA" : "",
+		     test_bit(Ndis802_11AuthModeWPA2, &wnd->capa.auth) ?
+		     ", WPA2" : "",
+		     test_bit(Ndis802_11AuthModeWPA2PSK, &wnd->capa.auth) ?
+		     ", WPA2PSK" : "");
+
+	res = mp_query_int(wnd, OID_GEN_CURRENT_PACKET_FILTER, &packet_filter);
+	if (!res) {
+		if (packet_filter != wnd->packet_filter)
+			WARNING("wrong packet_filter? 0x%08x, 0x%08x\n",
+				packet_filter, wnd->packet_filter);
+		p += sprintf(p, "packet_filter: 0x%08x\n", packet_filter);
+	}
+	if (p - page > count) {
+		WARNING("wrote %lu bytes (limit is %u)",
+			(unsigned long)(p - page), count);
+		*eof = 1;
+	}
+
+	return p - page;
+}
+
+static int procfs_read_ndis_settings(char *page, char **start, off_t off,
+				     int count, int *eof, void *data)
+{
+	char *p = page;
+	struct ndis_device *wnd = (struct ndis_device *)data;
+	struct wrap_device_setting *setting;
+
+	if (off != 0) {
+		*eof = 1;
+		return 0;
+	}
+
+	p += sprintf(p, "hangcheck_interval=%d\n",
+		     hangcheck_interval == 0 ?
+		     (int)(wnd->hangcheck_interval / HZ) : -1);
+
+	list_for_each_entry(setting, &wnd->wd->settings, list) {
+		p += sprintf(p, "%s=%s\n", setting->name, setting->value);
+	}
+
+	list_for_each_entry(setting, &wnd->wd->driver->settings, list) {
+		p += sprintf(p, "%s=%s\n", setting->name, setting->value);
+	}
+
+	return p - page;
+}
+
+static int procfs_write_ndis_settings(struct file *file, const char __user *buf,
+				      unsigned long count, void *data)
+{
+	struct ndis_device *wnd = (struct ndis_device *)data;
+	char setting[MAX_PROC_STR_LEN], *p;
+	unsigned int i;
+	NDIS_STATUS res;
+
+	if (count > MAX_PROC_STR_LEN)
+		return -EINVAL;
+
+	memset(setting, 0, sizeof(setting));
+	if (copy_from_user(setting, buf, count))
+		return -EFAULT;
+
+	if ((p = strchr(setting, '\n')))
+		*p = 0;
+
+	if ((p = strchr(setting, '=')))
+		*p = 0;
+
+	if (!strcmp(setting, "hangcheck_interval")) {
+		if (!p)
+			return -EINVAL;
+		p++;
+		i = simple_strtol(p, NULL, 10);
+		hangcheck_del(wnd);
+		if (i > 0) {
+			wnd->hangcheck_interval = i * HZ;
+			hangcheck_add(wnd);
+		}
+	} else if (!strcmp(setting, "suspend")) {
+		if (!p)
+			return -EINVAL;
+		p++;
+		i = simple_strtol(p, NULL, 10);
+		if (i <= 0 || i > 3)
+			return -EINVAL;
+		if (wrap_is_pci_bus(wnd->wd->dev_bus))
+			i = wrap_pnp_suspend_pci_device(wnd->wd->pci.pdev,
+							PMSG_SUSPEND);
+		else
+#ifdef ENABLE_USB
+			i = wrap_pnp_suspend_usb_device(wnd->wd->usb.intf,
+							PMSG_SUSPEND);
+#else
+		i = -1;
+#endif
+		if (i)
+			return -EINVAL;
+	} else if (!strcmp(setting, "resume")) {
+		if (wrap_is_pci_bus(wnd->wd->dev_bus))
+			i = wrap_pnp_resume_pci_device(wnd->wd->pci.pdev);
+		else
+#ifdef ENABLE_USB
+			i = wrap_pnp_resume_usb_device(wnd->wd->usb.intf);
+#else
+		i = -1;
+#endif
+		if (i)
+			return -EINVAL;
+	} else if (!strcmp(setting, "stats_enabled")) {
+		if (!p)
+			return -EINVAL;
+		p++;
+		i = simple_strtol(p, NULL, 10);
+		if (i > 0)
+			wnd->iw_stats_enabled = TRUE;
+		else
+			wnd->iw_stats_enabled = FALSE;
+	} else if (!strcmp(setting, "packet_filter")) {
+		if (!p)
+			return -EINVAL;
+		p++;
+		i = simple_strtol(p, NULL, 10);
+		res = mp_set_int(wnd, OID_GEN_CURRENT_PACKET_FILTER, i);
+		if (res)
+			WARNING("setting packet_filter failed: %08X", res);
+	} else if (!strcmp(setting, "reinit")) {
+		if (ndis_reinit(wnd) != NDIS_STATUS_SUCCESS)
+			return -EFAULT;
+	} else {
+		struct ndis_configuration_parameter param;
+		struct unicode_string key;
+		struct ansi_string ansi;
+
+		if (!p)
+			return -EINVAL;
+		p++;
+		RtlInitAnsiString(&ansi, p);
+		if (RtlAnsiStringToUnicodeString(&param.data.string, &ansi,
+						 TRUE) != STATUS_SUCCESS)
+			EXIT1(return -EFAULT);
+		param.type = NdisParameterString;
+		RtlInitAnsiString(&ansi, setting);
+		if (RtlAnsiStringToUnicodeString(&key, &ansi,
+						 TRUE) != STATUS_SUCCESS) {
+			RtlFreeUnicodeString(&param.data.string);
+			EXIT1(return -EINVAL);
+		}
+		NdisWriteConfiguration(&res, wnd->nmb, &key, &param);
+		RtlFreeUnicodeString(&key);
+		RtlFreeUnicodeString(&param.data.string);
+		if (res != NDIS_STATUS_SUCCESS)
+			return -EFAULT;
+	}
+	return count;
+}
+
+int wrap_procfs_add_ndis_device(struct ndis_device *wnd)
+{
+	struct proc_dir_entry *procfs_entry;
+
+	if (wrap_procfs_entry == NULL)
+		return -ENOMEM;
+
+	if (wnd->procfs_iface) {
+		ERROR("%s already registered?", wnd->netdev_name);
+		return -EINVAL;
+	}
+	wnd->procfs_iface = proc_mkdir(wnd->netdev_name, wrap_procfs_entry);
+	if (wnd->procfs_iface == NULL) {
+		ERROR("couldn't create proc directory");
+		return -ENOMEM;
+	}
+	wnd->procfs_iface->uid = proc_uid;
+	wnd->procfs_iface->gid = proc_gid;
+
+	procfs_entry = create_proc_entry("hw", S_IFREG | S_IRUSR | S_IRGRP,
+					 wnd->procfs_iface);
+	if (procfs_entry == NULL) {
+		ERROR("couldn't create proc entry for 'hw'");
+		goto err_hw;
+	} else {
+		procfs_entry->uid = proc_uid;
+		procfs_entry->gid = proc_gid;
+		procfs_entry->data = wnd;
+		procfs_entry->read_proc = procfs_read_ndis_hw;
+	}
+
+	procfs_entry = create_proc_entry("stats", S_IFREG | S_IRUSR | S_IRGRP,
+					 wnd->procfs_iface);
+	if (procfs_entry == NULL) {
+		ERROR("couldn't create proc entry for 'stats'");
+		goto err_stats;
+	} else {
+		procfs_entry->uid = proc_uid;
+		procfs_entry->gid = proc_gid;
+		procfs_entry->data = wnd;
+		procfs_entry->read_proc = procfs_read_ndis_stats;
+	}
+
+	procfs_entry = create_proc_entry("encr", S_IFREG | S_IRUSR | S_IRGRP,
+					 wnd->procfs_iface);
+	if (procfs_entry == NULL) {
+		ERROR("couldn't create proc entry for 'encr'");
+		goto err_encr;
+	} else {
+		procfs_entry->uid = proc_uid;
+		procfs_entry->gid = proc_gid;
+		procfs_entry->data = wnd;
+		procfs_entry->read_proc = procfs_read_ndis_encr;
+	}
+
+	procfs_entry = create_proc_entry("settings", S_IFREG |
+					 S_IRUSR | S_IRGRP |
+					 S_IWUSR | S_IWGRP, wnd->procfs_iface);
+	if (procfs_entry == NULL) {
+		ERROR("couldn't create proc entry for 'settings'");
+		goto err_settings;
+	} else {
+		procfs_entry->uid = proc_uid;
+		procfs_entry->gid = proc_gid;
+		procfs_entry->data = wnd;
+		procfs_entry->read_proc = procfs_read_ndis_settings;
+		procfs_entry->write_proc = procfs_write_ndis_settings;
+	}
+	return 0;
+
+err_settings:
+	remove_proc_entry("encr", wnd->procfs_iface);
+err_encr:
+	remove_proc_entry("stats", wnd->procfs_iface);
+err_stats:
+	remove_proc_entry("hw", wnd->procfs_iface);
+err_hw:
+	remove_proc_entry(wnd->netdev_name, wrap_procfs_entry);
+	wnd->procfs_iface = NULL;
+	return -ENOMEM;
+}
+
+void wrap_procfs_remove_ndis_device(struct ndis_device *wnd)
+{
+	struct proc_dir_entry *procfs_iface = xchg(&wnd->procfs_iface, NULL);
+
+	if (procfs_iface == NULL)
+		return;
+	remove_proc_entry("hw", procfs_iface);
+	remove_proc_entry("stats", procfs_iface);
+	remove_proc_entry("encr", procfs_iface);
+	remove_proc_entry("settings", procfs_iface);
+	if (wrap_procfs_entry)
+		remove_proc_entry(wnd->netdev_name, wrap_procfs_entry);
+}
+
+static int procfs_read_debug(char *page, char **start, off_t off,
+			     int count, int *eof, void *data)
+{
+	char *p = page;
+	enum alloc_type type;
+
+	if (off != 0) {
+		*eof = 1;
+		return 0;
+	}
+	p += sprintf(p, "%d\n", debug);
+	type = 0;
+#ifdef ALLOC_DEBUG
+	for (type = 0; type < ALLOC_TYPE_MAX; type++)
+		p += sprintf(p, "total size of allocations in %d: %d\n",
+			     type, alloc_size(type));
+#endif
+	return p - page;
+}
+
+static int procfs_write_debug(struct file *file, const char __user *buf,
+			      unsigned long count, void *data)
+{
+	int i;
+	char setting[MAX_PROC_STR_LEN], *p;
+
+	if (count > MAX_PROC_STR_LEN)
+		return -EINVAL;
+
+	memset(setting, 0, sizeof(setting));
+	if (copy_from_user(setting, buf, count))
+		return -EFAULT;
+
+	if ((p = strchr(setting, '\n')))
+		*p = 0;
+
+	if ((p = strchr(setting, '=')))
+		*p = 0;
+
+	i = simple_strtol(setting, NULL, 10);
+	if (i >= 0 && i < 10)
+		debug = i;
+	else
+		return -EINVAL;
+	return count;
+}
+
+int wrap_procfs_init(void)
+{
+	struct proc_dir_entry *procfs_entry;
+
+	wrap_procfs_entry = proc_mkdir(DRIVER_NAME, proc_net_root);
+	if (wrap_procfs_entry == NULL) {
+		ERROR("couldn't create procfs directory");
+		return -ENOMEM;
+	}
+	wrap_procfs_entry->uid = proc_uid;
+	wrap_procfs_entry->gid = proc_gid;
+
+	procfs_entry = create_proc_entry("debug", S_IFREG | S_IRUSR | S_IRGRP,
+					 wrap_procfs_entry);
+	if (procfs_entry == NULL) {
+		ERROR("couldn't create proc entry for 'debug'");
+		return -ENOMEM;
+	} else {
+		procfs_entry->uid = proc_uid;
+		procfs_entry->gid = proc_gid;
+		procfs_entry->read_proc  = procfs_read_debug;
+		procfs_entry->write_proc = procfs_write_debug;
+	}
+	return 0;
+}
+
+void wrap_procfs_remove(void)
+{
+	if (wrap_procfs_entry == NULL)
+		return;
+	remove_proc_entry("debug", wrap_procfs_entry);
+	remove_proc_entry(DRIVER_NAME, proc_net_root);
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/ndiswrapper/mkstubs.sh
+++ linux-mvl-dove-2.6.32/ubuntu/ndiswrapper/mkstubs.sh
@@ -0,0 +1,12 @@
+#! /bin/sh
+
+for file in "$@"; do
+	echo
+	echo "# automatically generated from $file"
+	sed -n \
+		-e 's/.*WIN_FUNC(\([^\,]\+\) *\, *\([0-9]\+\)).*/\
+		   win2lin(\1, \2)/p'   \
+		-e 's/.*WIN_FUNC_PTR(\([^\,]\+\) *\, *\([0-9]\+\)).*/\
+		   win2lin(\1, \2)/p'   \
+	   $file | sed -e 's/[ \t	]\+//' | sort -u; \
+done
--- linux-mvl-dove-2.6.32.orig/ubuntu/ndiswrapper/wrapndis.c
+++ linux-mvl-dove-2.6.32/ubuntu/ndiswrapper/wrapndis.c
@@ -0,0 +1,2133 @@
+/*
+ *  Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *  GNU General Public License for more details.
+ *
+ */
+
+#include "ndis.h"
+#include "iw_ndis.h"
+#include "pnp.h"
+#include "loader.h"
+#include "wrapndis.h"
+#include <linux/inetdevice.h>
+#include <linux/ip.h>
+#include <linux/tcp.h>
+#include <linux/udp.h>
+#include <linux/in.h>
+#include "wrapper.h"
+
+/* Functions callable from the NDIS driver */
+wstdcall NTSTATUS NdisDispatchDeviceControl(struct device_object *fdo,
+					    struct irp *irp);
+wstdcall NTSTATUS NdisDispatchPnp(struct device_object *fdo, struct irp *irp);
+wstdcall NTSTATUS NdisDispatchPower(struct device_object *fdo, struct irp *irp);
+
+workqueue_struct_t *wrapndis_wq;
+static struct nt_thread *wrapndis_worker_thread;
+
+static int set_packet_filter(struct ndis_device *wnd,
+			     ULONG packet_filter);
+static void add_iw_stats_timer(struct ndis_device *wnd);
+static void del_iw_stats_timer(struct ndis_device *wnd);
+static NDIS_STATUS ndis_start_device(struct ndis_device *wnd);
+static int ndis_remove_device(struct ndis_device *wnd);
+static void set_multicast_list(struct ndis_device *wnd);
+static int ndis_net_dev_open(struct net_device *net_dev);
+static int ndis_net_dev_close(struct net_device *net_dev);
+
+/* MiniportReset */
+NDIS_STATUS mp_reset(struct ndis_device *wnd)
+{
+	NDIS_STATUS res;
+	struct miniport *mp;
+	BOOLEAN reset_address;
+	KIRQL irql;
+
+	ENTER2("wnd: %p", wnd);
+	if (down_interruptible(&wnd->tx_ring_mutex))
+		EXIT3(return NDIS_STATUS_FAILURE);
+	if (down_interruptible(&wnd->ndis_req_mutex)) {
+		up(&wnd->tx_ring_mutex);
+		EXIT3(return NDIS_STATUS_FAILURE);
+	}
+	mp = &wnd->wd->driver->ndis_driver->mp;
+	prepare_wait_condition(wnd->ndis_req_task, wnd->ndis_req_done, 0);
+	WARNING("%s is being reset", wnd->net_dev->name);
+	irql = serialize_lock_irql(wnd);
+	assert_irql(_irql_ == DISPATCH_LEVEL);
+	res = LIN2WIN2(mp->reset, &reset_address, wnd->nmb->mp_ctx);
+	serialize_unlock_irql(wnd, irql);
+
+	TRACE2("%08X, %08X", res, reset_address);
+	if (res == NDIS_STATUS_PENDING) {
+		/* wait for NdisMResetComplete */
+		if (wait_condition((wnd->ndis_req_done > 0), 0,
+				   TASK_INTERRUPTIBLE) < 0)
+			res = NDIS_STATUS_FAILURE;
+		else {
+			res = wnd->ndis_req_status;
+			reset_address = wnd->ndis_req_done - 1;
+		}
+		TRACE2("%08X, %08X", res, reset_address);
+	}
+	up(&wnd->ndis_req_mutex);
+	if (res == NDIS_STATUS_SUCCESS && reset_address) {
+		set_packet_filter(wnd, wnd->packet_filter);
+		set_multicast_list(wnd);
+	}
+	up(&wnd->tx_ring_mutex);
+	EXIT3(return res);
+}
+
+/* MiniportRequest(Query/Set)Information */
+NDIS_STATUS mp_request(enum ndis_request_type request,
+		       struct ndis_device *wnd, ndis_oid oid,
+		       void *buf, ULONG buflen, ULONG *written, ULONG *needed)
+{
+	NDIS_STATUS res;
+	ULONG w, n;
+	struct miniport *mp;
+	KIRQL irql;
+
+	if (down_interruptible(&wnd->ndis_req_mutex))
+		EXIT3(return NDIS_STATUS_FAILURE);
+	if (!written)
+		written = &w;
+	if (!needed)
+		needed = &n;
+	mp = &wnd->wd->driver->ndis_driver->mp;
+	prepare_wait_condition(wnd->ndis_req_task, wnd->ndis_req_done, 0);
+	irql = serialize_lock_irql(wnd);
+	assert_irql(_irql_ == DISPATCH_LEVEL);
+	switch (request) {
+	case NdisRequestQueryInformation:
+		TRACE2("%p, %08X, %p", mp->queryinfo, oid, wnd->nmb->mp_ctx);
+		res = LIN2WIN6(mp->queryinfo, wnd->nmb->mp_ctx, oid, buf,
+			       buflen, written, needed);
+		break;
+	case NdisRequestSetInformation:
+		TRACE2("%p, %08X, %p", mp->setinfo, oid, wnd->nmb->mp_ctx);
+		res = LIN2WIN6(mp->setinfo, wnd->nmb->mp_ctx, oid, buf,
+			       buflen, written, needed);
+		break;
+	default:
+		WARNING("invalid request %d, %08X", request, oid);
+		res = NDIS_STATUS_NOT_SUPPORTED;
+		break;
+	}
+	serialize_unlock_irql(wnd, irql);
+	TRACE2("%08X, %08X", res, oid);
+	if (res == NDIS_STATUS_PENDING) {
+		/* wait for NdisMQueryInformationComplete */
+		if (wait_condition((wnd->ndis_req_done > 0), 0,
+				   TASK_INTERRUPTIBLE) < 0)
+			res = NDIS_STATUS_FAILURE;
+		else
+			res = wnd->ndis_req_status;
+		TRACE2("%08X, %08X", res, oid);
+	}
+	up(&wnd->ndis_req_mutex);
+	DBG_BLOCK(2) {
+		if (res || needed)
+			TRACE2("%08X, %d, %d, %d", res, buflen, *written,
+			       *needed);
+	}
+	EXIT3(return res);
+}
+
+/* MiniportPnPEventNotify */
+static NDIS_STATUS mp_pnp_event(struct ndis_device *wnd,
+				enum ndis_device_pnp_event event,
+				ULONG power_profile)
+{
+	struct miniport *mp;
+
+	ENTER1("%p, %d", wnd, event);
+	mp = &wnd->wd->driver->ndis_driver->mp;
+	if (!mp->pnp_event_notify) {
+		TRACE1("Windows driver %s doesn't support "
+		       "MiniportPnpEventNotify", wnd->wd->driver->name);
+		return NDIS_STATUS_FAILURE;
+	}
+	/* RNDIS driver doesn't like to be notified if device is
+	 * already halted */
+	if (!test_bit(HW_INITIALIZED, &wnd->wd->hw_status))
+		EXIT1(return NDIS_STATUS_SUCCESS);
+	switch (event) {
+	case NdisDevicePnPEventSurpriseRemoved:
+		TRACE1("%u, %p",
+		       (wnd->attributes & NDIS_ATTRIBUTE_SURPRISE_REMOVE_OK),
+		       mp->pnp_event_notify);
+		if ((wnd->attributes & NDIS_ATTRIBUTE_SURPRISE_REMOVE_OK) &&
+		    !test_bit(HW_PRESENT, &wnd->wd->hw_status) &&
+		    mp->pnp_event_notify) {
+			TRACE1("calling surprise_removed");
+			LIN2WIN4(mp->pnp_event_notify, wnd->nmb->mp_ctx,
+				 NdisDevicePnPEventSurpriseRemoved, NULL, 0);
+		} else
+			TRACE1("Windows driver %s doesn't support "
+			       "MiniportPnpEventNotify for safe unplugging",
+			       wnd->wd->driver->name);
+		return NDIS_STATUS_SUCCESS;
+	case NdisDevicePnPEventPowerProfileChanged:
+		if (power_profile)
+			power_profile = NdisPowerProfileAcOnLine;
+		LIN2WIN4(mp->pnp_event_notify, wnd->nmb->mp_ctx,
+			 NdisDevicePnPEventPowerProfileChanged,
+			 &power_profile, (ULONG)sizeof(power_profile));
+		return NDIS_STATUS_SUCCESS;
+	default:
+		WARNING("event %d not yet implemented", event);
+		return NDIS_STATUS_SUCCESS;
+	}
+}
+
+/* MiniportInitialize */
+static NDIS_STATUS mp_init(struct ndis_device *wnd)
+{
+	NDIS_STATUS error_status, status;
+	UINT medium_index;
+	enum ndis_medium medium_array[] = {NdisMedium802_3};
+	struct miniport *mp;
+
+	ENTER1("irql: %d", current_irql());
+	if (test_bit(HW_INITIALIZED, &wnd->wd->hw_status)) {
+		WARNING("device %p already initialized!", wnd);
+		return NDIS_STATUS_FAILURE;
+	}
+
+	if (!wnd->wd->driver->ndis_driver ||
+	    !wnd->wd->driver->ndis_driver->mp.init) {
+		WARNING("assuming WDM (non-NDIS) driver");
+		EXIT1(return NDIS_STATUS_NOT_RECOGNIZED);
+	}
+	mp = &wnd->wd->driver->ndis_driver->mp;
+	status = LIN2WIN6(mp->init, &error_status, &medium_index, medium_array,
+			  sizeof(medium_array) / sizeof(medium_array[0]),
+			  wnd->nmb, wnd->nmb);
+	TRACE1("init returns: %08X, irql: %d", status, current_irql());
+	if (status != NDIS_STATUS_SUCCESS) {
+		WARNING("couldn't initialize device: %08X", status);
+		EXIT1(return NDIS_STATUS_FAILURE);
+	}
+
+	/* Wait a little to let card power up otherwise ifup might
+	 * fail after boot */
+	sleep_hz(HZ / 5);
+	status = mp_pnp_event(wnd, NdisDevicePnPEventPowerProfileChanged,
+			      NdisPowerProfileAcOnLine);
+	if (status != NDIS_STATUS_SUCCESS)
+		TRACE1("setting power failed: %08X", status);
+	set_bit(HW_INITIALIZED, &wnd->wd->hw_status);
+	/* the description about NDIS_ATTRIBUTE_NO_HALT_ON_SUSPEND is
+	 * misleading/confusing */
+	status = mp_query(wnd, OID_PNP_CAPABILITIES,
+			  &wnd->pnp_capa, sizeof(wnd->pnp_capa));
+	if (status == NDIS_STATUS_SUCCESS) {
+		TRACE1("%d, %d", wnd->pnp_capa.wakeup.min_magic_packet_wakeup,
+		       wnd->pnp_capa.wakeup.min_pattern_wakeup);
+		wnd->attributes |= NDIS_ATTRIBUTE_NO_HALT_ON_SUSPEND;
+		status = mp_query_int(wnd, OID_PNP_ENABLE_WAKE_UP,
+				      &wnd->ndis_wolopts);
+		TRACE1("%08X, %x", status, wnd->ndis_wolopts);
+	} else if (status == NDIS_STATUS_NOT_SUPPORTED)
+		wnd->attributes &= ~NDIS_ATTRIBUTE_NO_HALT_ON_SUSPEND;
+	TRACE1("%d", wnd->pnp_capa.wakeup.min_magic_packet_wakeup);
+	/* although some NDIS drivers support suspend, Linux kernel
+	 * has issues with suspending USB devices */
+	if (wrap_is_usb_bus(wnd->wd->dev_bus)) {
+		wnd->attributes &= ~NDIS_ATTRIBUTE_NO_HALT_ON_SUSPEND;
+		wnd->ndis_wolopts = 0;
+	}
+	mp_set_int(wnd, OID_802_11_POWER_MODE, NDIS_POWER_OFF);
+	EXIT1(return NDIS_STATUS_SUCCESS);
+}
+
+/* MiniportHalt */
+static void mp_halt(struct ndis_device *wnd)
+{
+	struct miniport *mp;
+
+	ENTER1("%p", wnd);
+	if (!test_and_clear_bit(HW_INITIALIZED, &wnd->wd->hw_status)) {
+		WARNING("device %p is not initialized - not halting", wnd);
+		return;
+	}
+	hangcheck_del(wnd);
+	del_iw_stats_timer(wnd);
+	if (wnd->physical_medium == NdisPhysicalMediumWirelessLan &&
+	    wrap_is_pci_bus(wnd->wd->dev_bus)) {
+		up(&wnd->ndis_req_mutex);
+		disassociate(wnd, 0);
+		if (down_interruptible(&wnd->ndis_req_mutex))
+			WARNING("couldn't obtain ndis_req_mutex");
+	}
+	mp = &wnd->wd->driver->ndis_driver->mp;
+	TRACE1("halt: %p", mp->mp_halt);
+	LIN2WIN1(mp->mp_halt, wnd->nmb->mp_ctx);
+	/* if a driver doesn't call NdisMDeregisterInterrupt during
+	 * halt, deregister it now */
+	if (wnd->mp_interrupt)
+		NdisMDeregisterInterrupt(wnd->mp_interrupt);
+	/* cancel any timers left by bugyy windows driver; also free
+	 * the memory for timers */
+	while (1) {
+		struct nt_slist *slist;
+		struct wrap_timer *wrap_timer;
+
+		spin_lock_bh(&ntoskernel_lock);
+		if ((slist = wnd->wrap_timer_slist.next))
+			wnd->wrap_timer_slist.next = slist->next;
+		spin_unlock_bh(&ntoskernel_lock);
+		TIMERTRACE("%p", slist);
+		if (!slist)
+			break;
+		wrap_timer = container_of(slist, struct wrap_timer, slist);
+		wrap_timer->repeat = 0;
+		/* ktimer that this wrap_timer is associated to can't
+		 * be touched, as it may have been freed by the driver
+		 * already */
+		if (del_timer_sync(&wrap_timer->timer))
+			WARNING("Buggy Windows driver left timer %p "
+				"running", wrap_timer->nt_timer);
+		memset(wrap_timer, 0, sizeof(*wrap_timer));
+		kfree(wrap_timer);
+	}
+	EXIT1(return);
+}
+
+static NDIS_STATUS mp_set_power_state(struct ndis_device *wnd,
+				      enum ndis_power_state state)
+{
+	NDIS_STATUS status;
+
+	TRACE1("%d", state);
+	if (state == NdisDeviceStateD0) {
+		status = NDIS_STATUS_SUCCESS;
+		up(&wnd->ndis_req_mutex);
+		if (test_and_clear_bit(HW_HALTED, &wnd->wd->hw_status)) {
+			status = mp_init(wnd);
+			if (status == NDIS_STATUS_SUCCESS) {
+				set_packet_filter(wnd, wnd->packet_filter);
+				set_multicast_list(wnd);
+			}
+		} else if (test_and_clear_bit(HW_SUSPENDED,
+					      &wnd->wd->hw_status)) {
+			status = mp_set_int(wnd, OID_PNP_SET_POWER, state);
+			if (status != NDIS_STATUS_SUCCESS)
+				WARNING("%s: setting power to state %d failed? "
+					"%08X", wnd->net_dev->name, state,
+					status);
+		} else
+			return NDIS_STATUS_FAILURE;
+
+		if (wrap_is_pci_bus(wnd->wd->dev_bus)) {
+			pci_enable_wake(wnd->wd->pci.pdev, PCI_D3hot, 0);
+			pci_enable_wake(wnd->wd->pci.pdev, PCI_D3cold, 0);
+		}
+		if (status == NDIS_STATUS_SUCCESS) {
+			up(&wnd->tx_ring_mutex);
+			netif_device_attach(wnd->net_dev);
+			hangcheck_add(wnd);
+			add_iw_stats_timer(wnd);
+		} else
+			WARNING("%s: couldn't set power to state %d; device not"
+				" resumed", wnd->net_dev->name, state);
+		EXIT1(return status);
+	} else {
+		if (down_interruptible(&wnd->tx_ring_mutex))
+			EXIT1(return NDIS_STATUS_FAILURE);
+		netif_device_detach(wnd->net_dev);
+		hangcheck_del(wnd);
+		del_iw_stats_timer(wnd);
+		status = NDIS_STATUS_NOT_SUPPORTED;
+		if (wnd->attributes & NDIS_ATTRIBUTE_NO_HALT_ON_SUSPEND) {
+			status = mp_set_int(wnd, OID_PNP_ENABLE_WAKE_UP,
+					    wnd->ndis_wolopts);
+			TRACE2("0x%x, 0x%x", status, wnd->ndis_wolopts);
+			if (status == NDIS_STATUS_SUCCESS) {
+				if (wnd->ndis_wolopts)
+					wnd->wd->pci.wake_state =
+						PowerDeviceD3;
+				else
+					wnd->wd->pci.wake_state =
+						PowerDeviceUnspecified;
+			} else
+				WARNING("couldn't set wake-on-lan options: "
+					"0x%x, %08X", wnd->ndis_wolopts, status);
+			status = mp_set_int(wnd, OID_PNP_SET_POWER, state);
+			if (status == NDIS_STATUS_SUCCESS)
+				set_bit(HW_SUSPENDED, &wnd->wd->hw_status);
+			else
+				WARNING("suspend failed: %08X", status);
+		}
+		if (status != NDIS_STATUS_SUCCESS) {
+			WARNING("%s does not support power management; "
+				"halting the device", wnd->net_dev->name);
+			mp_halt(wnd);
+			set_bit(HW_HALTED, &wnd->wd->hw_status);
+			status = STATUS_SUCCESS;
+		}
+		if (down_interruptible(&wnd->ndis_req_mutex))
+			WARNING("couldn't lock ndis_req_mutex");
+		EXIT1(return status);
+	}
+}
+
+static int ndis_set_mac_address(struct net_device *dev, void *p)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	struct sockaddr *addr = p;
+	struct ndis_configuration_parameter param;
+	struct unicode_string key;
+	struct ansi_string ansi;
+	NDIS_STATUS res;
+	unsigned char mac_string[2 * ETH_ALEN + 1];
+	mac_address mac;
+
+	memcpy(mac, addr->sa_data, sizeof(mac));
+	memset(mac_string, 0, sizeof(mac_string));
+	res = snprintf(mac_string, sizeof(mac_string), MACSTR, MAC2STR(mac));
+	if (res != (sizeof(mac_string) - 1))
+		EXIT1(return -EINVAL);
+	TRACE1("new mac: %s", mac_string);
+
+	RtlInitAnsiString(&ansi, mac_string);
+	if (RtlAnsiStringToUnicodeString(&param.data.string, &ansi,
+					 TRUE) != STATUS_SUCCESS)
+		EXIT1(return -EINVAL);
+
+	param.type = NdisParameterString;
+	RtlInitAnsiString(&ansi, "NetworkAddress");
+	if (RtlAnsiStringToUnicodeString(&key, &ansi, TRUE) != STATUS_SUCCESS) {
+		RtlFreeUnicodeString(&param.data.string);
+		EXIT1(return -EINVAL);
+	}
+	NdisWriteConfiguration(&res, wnd->nmb, &key, &param);
+	RtlFreeUnicodeString(&key);
+	RtlFreeUnicodeString(&param.data.string);
+
+	if (res != NDIS_STATUS_SUCCESS)
+		EXIT1(return -EFAULT);
+	if (ndis_reinit(wnd) == NDIS_STATUS_SUCCESS) {
+		res = mp_query(wnd, OID_802_3_CURRENT_ADDRESS,
+			       mac, sizeof(mac));
+		if (res == NDIS_STATUS_SUCCESS) {
+			TRACE1("mac:" MACSTRSEP, MAC2STR(mac));
+			memcpy(dev->dev_addr, mac, sizeof(mac));
+		} else
+			ERROR("couldn't get mac address: %08X", res);
+	}
+	EXIT1(return 0);
+}
+
+static int setup_tx_sg_list(struct ndis_device *wnd, struct sk_buff *skb,
+			    struct ndis_packet_oob_data *oob_data)
+{
+	struct ndis_sg_element *sg_element;
+	struct ndis_sg_list *sg_list;
+	int i;
+
+	ENTER3("%p, %d", skb, skb_shinfo(skb)->nr_frags);
+	if (skb_shinfo(skb)->nr_frags <= 1) {
+		sg_element = &oob_data->wrap_tx_sg_list.elements[0];
+		sg_element->address =
+			PCI_DMA_MAP_SINGLE(wnd->wd->pci.pdev, skb->data,
+					   skb->len, PCI_DMA_TODEVICE);
+		sg_element->length = skb->len;
+		oob_data->wrap_tx_sg_list.nent = 1;
+		oob_data->ext.info[ScatterGatherListPacketInfo] =
+			&oob_data->wrap_tx_sg_list;
+		TRACE3("%Lx, %u", sg_element->address, sg_element->length);
+		return 0;
+	}
+	sg_list = kmalloc(sizeof(*sg_list) +
+			  (skb_shinfo(skb)->nr_frags + 1) * sizeof(*sg_element),
+			  GFP_ATOMIC);
+	if (!sg_list)
+		return -ENOMEM;
+	sg_list->nent = skb_shinfo(skb)->nr_frags + 1;
+	TRACE3("%p, %d", sg_list, sg_list->nent);
+	sg_element = sg_list->elements;
+	sg_element->length = skb_headlen(skb);
+	sg_element->address =
+		PCI_DMA_MAP_SINGLE(wnd->wd->pci.pdev, skb->data,
+				   skb_headlen(skb), PCI_DMA_TODEVICE);
+	for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
+		skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
+		sg_element++;
+		sg_element->length = frag->size;
+		sg_element->address =
+			pci_map_page(wnd->wd->pci.pdev, frag->page,
+				     frag->page_offset, frag->size,
+				     PCI_DMA_TODEVICE);
+		TRACE3("%Lx, %u", sg_element->address, sg_element->length);
+	}
+	oob_data->ext.info[ScatterGatherListPacketInfo] = sg_list;
+	return 0;
+}
+
+static void free_tx_sg_list(struct ndis_device *wnd,
+			    struct ndis_packet_oob_data *oob_data)
+{
+	int i;
+	struct ndis_sg_element *sg_element;
+	struct ndis_sg_list *sg_list =
+		oob_data->ext.info[ScatterGatherListPacketInfo];
+	sg_element = sg_list->elements;
+	TRACE3("%p, %d", sg_list, sg_list->nent);
+	PCI_DMA_UNMAP_SINGLE(wnd->wd->pci.pdev, sg_element->address,
+			     sg_element->length, PCI_DMA_TODEVICE);
+	if (sg_list->nent == 1)
+		EXIT3(return);
+	for (i = 1; i < sg_list->nent; i++, sg_element++) {
+		TRACE3("%Lx, %u", sg_element->address, sg_element->length);
+		pci_unmap_page(wnd->wd->pci.pdev, sg_element->address,
+			       sg_element->length, PCI_DMA_TODEVICE);
+	}
+	TRACE3("%p", sg_list);
+	kfree(sg_list);
+}
+
+static struct ndis_packet *alloc_tx_packet(struct ndis_device *wnd,
+					   struct sk_buff *skb)
+{
+	struct ndis_packet *packet;
+	ndis_buffer *buffer;
+	struct ndis_packet_oob_data *oob_data;
+	NDIS_STATUS status;
+
+	NdisAllocatePacket(&status, &packet, wnd->tx_packet_pool);
+	if (status != NDIS_STATUS_SUCCESS)
+		return NULL;
+	NdisAllocateBuffer(&status, &buffer, wnd->tx_buffer_pool,
+			   skb->data, skb->len);
+	if (status != NDIS_STATUS_SUCCESS) {
+		NdisFreePacket(packet);
+		return NULL;
+	}
+	packet->private.buffer_head = buffer;
+	packet->private.buffer_tail = buffer;
+
+	oob_data = NDIS_PACKET_OOB_DATA(packet);
+	oob_data->tx_skb = skb;
+	if (wnd->sg_dma_size) {
+		if (setup_tx_sg_list(wnd, skb, oob_data)) {
+			NdisFreeBuffer(buffer);
+			NdisFreePacket(packet);
+			return NULL;
+		}
+	}
+	if (skb->ip_summed == CHECKSUM_PARTIAL) {
+		struct ndis_tcp_ip_checksum_packet_info csum;
+		int protocol;
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,21)
+		protocol = ntohs(skb->protocol);
+#else
+		protocol = skb->nh.iph->protocol;
+#endif
+		csum.value = 0;
+		csum.tx.v4 = 1;
+		if (protocol == IPPROTO_TCP)
+			csum.tx.tcp = 1;
+		else if (protocol == IPPROTO_UDP)
+			csum.tx.udp = 1;
+//		csum->tx.ip = 1;
+		packet->private.flags |= NDIS_PROTOCOL_ID_TCP_IP;
+		oob_data->ext.info[TcpIpChecksumPacketInfo] =
+			(void *)(ULONG_PTR)csum.value;
+	}
+	DBG_BLOCK(4) {
+		dump_bytes(__func__, skb->data, skb->len);
+	}
+	TRACE4("%p, %p, %p", packet, buffer, skb);
+	return packet;
+}
+
+void free_tx_packet(struct ndis_device *wnd, struct ndis_packet *packet,
+		    NDIS_STATUS status)
+{
+	ndis_buffer *buffer;
+	struct ndis_packet_oob_data *oob_data;
+	struct sk_buff *skb;
+	struct ndis_packet_pool *pool;
+
+	assert_irql(_irql_ <= DISPATCH_LEVEL);
+	assert(packet->private.packet_flags);
+	oob_data = NDIS_PACKET_OOB_DATA(packet);
+	skb = oob_data->tx_skb;
+	buffer = packet->private.buffer_head;
+	TRACE4("%p, %p, %p, %08X", packet, buffer, skb, status);
+	if (status == NDIS_STATUS_SUCCESS) {
+		pre_atomic_add(wnd->net_stats.tx_bytes, packet->private.len);
+		atomic_inc_var(wnd->net_stats.tx_packets);
+	} else {
+		TRACE1("packet dropped: %08X", status);
+		atomic_inc_var(wnd->net_stats.tx_dropped);
+	}
+	if (wnd->sg_dma_size)
+		free_tx_sg_list(wnd, oob_data);
+	NdisFreeBuffer(buffer);
+	dev_kfree_skb_any(skb);
+	pool = packet->private.pool;
+	NdisFreePacket(packet);
+	if (netif_queue_stopped(wnd->net_dev) &&
+	    ((pool->max_descr - pool->num_used_descr) >=
+	     (wnd->max_tx_packets / 4))) {
+		set_bit(NETIF_WAKEQ, &wnd->ndis_pending_work);
+		schedule_wrapndis_work(&wnd->ndis_work);
+	}
+	EXIT4(return);
+}
+
+/* MiniportSend and MiniportSendPackets */
+/* this function is called holding tx_ring_mutex. start and n are such
+ * that start + n < TX_RING_SIZE; i.e., packets don't wrap around
+ * ring */
+static u8 mp_tx_packets(struct ndis_device *wnd, u8 start, u8 n)
+{
+	NDIS_STATUS res;
+	struct miniport *mp;
+	struct ndis_packet *packet;
+	u8 sent;
+	KIRQL irql;
+
+	ENTER3("%d, %d", start, n);
+	mp = &wnd->wd->driver->ndis_driver->mp;
+	if (mp->send_packets) {
+		if (deserialized_driver(wnd)) {
+			LIN2WIN3(mp->send_packets, wnd->nmb->mp_ctx,
+				 &wnd->tx_ring[start], n);
+			sent = n;
+		} else {
+			irql = serialize_lock_irql(wnd);
+			LIN2WIN3(mp->send_packets, wnd->nmb->mp_ctx,
+				 &wnd->tx_ring[start], n);
+			serialize_unlock_irql(wnd, irql);
+			for (sent = 0; sent < n && wnd->tx_ok; sent++) {
+				struct ndis_packet_oob_data *oob_data;
+				packet = wnd->tx_ring[start + sent];
+				oob_data = NDIS_PACKET_OOB_DATA(packet);
+				switch ((res =
+					 xchg(&oob_data->status,
+					      NDIS_STATUS_NOT_RECOGNIZED))) {
+				case NDIS_STATUS_SUCCESS:
+					free_tx_packet(wnd, packet,
+						       NDIS_STATUS_SUCCESS);
+					break;
+				case NDIS_STATUS_PENDING:
+					break;
+				case NDIS_STATUS_RESOURCES:
+					wnd->tx_ok = 0;
+					/* resubmit this packet and
+					 * the rest when resources
+					 * become available */
+					sent--;
+					break;
+				case NDIS_STATUS_FAILURE:
+					free_tx_packet(wnd, packet,
+						       NDIS_STATUS_FAILURE);
+					break;
+				default:
+					ERROR("%p: invalid status: %08X",
+					      packet, res);
+					free_tx_packet(wnd, packet,
+						       oob_data->status);
+					break;
+				}
+				TRACE3("%p, %d", packet, res);
+			}
+		}
+		TRACE3("sent: %d(%d)", sent, n);
+	} else {
+		for (sent = 0; sent < n && wnd->tx_ok; sent++) {
+			struct ndis_packet_oob_data *oob_data;
+			packet = wnd->tx_ring[start + sent];
+			oob_data = NDIS_PACKET_OOB_DATA(packet);
+			oob_data->status = NDIS_STATUS_NOT_RECOGNIZED;
+			irql = serialize_lock_irql(wnd);
+			res = LIN2WIN3(mp->send, wnd->nmb->mp_ctx,
+				       packet, packet->private.flags);
+			serialize_unlock_irql(wnd, irql);
+			switch (res) {
+			case NDIS_STATUS_SUCCESS:
+				free_tx_packet(wnd, packet, res);
+				break;
+			case NDIS_STATUS_PENDING:
+				break;
+			case NDIS_STATUS_RESOURCES:
+				wnd->tx_ok = 0;
+				/* resend this packet when resources
+				 * become available */
+				sent--;
+				break;
+			case NDIS_STATUS_FAILURE:
+				free_tx_packet(wnd, packet, res);
+				break;
+			default:
+				ERROR("packet %p: invalid status: %08X",
+				      packet, res);
+				break;
+			}
+		}
+	}
+	EXIT3(return sent);
+}
+
+static void tx_worker(worker_param_t param)
+{
+	struct ndis_device *wnd;
+	s8 n;
+
+	wnd = worker_param_data(param, struct ndis_device, tx_work);
+	ENTER3("tx_ok %d", wnd->tx_ok);
+	while (wnd->tx_ok) {
+		if (down_interruptible(&wnd->tx_ring_mutex))
+			break;
+		spin_lock_bh(&wnd->tx_ring_lock);
+		n = wnd->tx_ring_end - wnd->tx_ring_start;
+		TRACE3("%d, %d, %d", wnd->tx_ring_start, wnd->tx_ring_end, n);
+		/* end == start if either ring is empty or full; in
+		 * the latter case is_tx_ring_full is set */
+		if (n == 0) {
+			if (wnd->is_tx_ring_full)
+				n = TX_RING_SIZE - wnd->tx_ring_start;
+			else {
+				spin_unlock_bh(&wnd->tx_ring_lock);
+				up(&wnd->tx_ring_mutex);
+				break;
+			}
+		} else if (n < 0)
+			n = TX_RING_SIZE - wnd->tx_ring_start;
+		spin_unlock_bh(&wnd->tx_ring_lock);
+		if (unlikely(n > wnd->max_tx_packets))
+			n = wnd->max_tx_packets;
+		n = mp_tx_packets(wnd, wnd->tx_ring_start, n);
+		if (n) {
+			wnd->net_dev->trans_start = jiffies;
+			wnd->tx_ring_start =
+				(wnd->tx_ring_start + n) % TX_RING_SIZE;
+			wnd->is_tx_ring_full = 0;
+		}
+		up(&wnd->tx_ring_mutex);
+		TRACE3("%d, %d, %d", wnd->tx_ring_start, wnd->tx_ring_end, n);
+	}
+	EXIT3(return);
+}
+
+static int tx_skbuff(struct sk_buff *skb, struct net_device *dev)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	struct ndis_packet *packet;
+
+	packet = alloc_tx_packet(wnd, skb);
+	if (!packet) {
+		TRACE2("couldn't allocate packet");
+		netif_tx_lock(dev);
+		netif_stop_queue(dev);
+		netif_tx_unlock(dev);
+		return NETDEV_TX_BUSY;
+	}
+	spin_lock(&wnd->tx_ring_lock);
+	wnd->tx_ring[wnd->tx_ring_end++] = packet;
+	if (wnd->tx_ring_end == TX_RING_SIZE)
+		wnd->tx_ring_end = 0;
+	if (wnd->tx_ring_end == wnd->tx_ring_start) {
+		netif_tx_lock(dev);
+		wnd->is_tx_ring_full = 1;
+		netif_stop_queue(dev);
+		netif_tx_unlock(dev);
+	}
+	spin_unlock(&wnd->tx_ring_lock);
+	TRACE4("ring: %d, %d", wnd->tx_ring_start, wnd->tx_ring_end);
+	schedule_wrapndis_work(&wnd->tx_work);
+	return NETDEV_TX_OK;
+}
+
+static int set_packet_filter(struct ndis_device *wnd, ULONG packet_filter)
+{
+	NDIS_STATUS res;
+
+	while (1) {
+		res = mp_set_int(wnd, OID_GEN_CURRENT_PACKET_FILTER,
+				 packet_filter);
+		if (res == NDIS_STATUS_SUCCESS)
+			break;
+		TRACE2("couldn't set filter 0x%08x", packet_filter);
+		/* NDIS_PACKET_TYPE_PROMISCUOUS may not work with 802.11 */
+		if (packet_filter & NDIS_PACKET_TYPE_PROMISCUOUS) {
+			packet_filter &= ~NDIS_PACKET_TYPE_PROMISCUOUS;
+			continue;
+		}
+		if (packet_filter & NDIS_PACKET_TYPE_ALL_LOCAL) {
+			packet_filter &= ~NDIS_PACKET_TYPE_ALL_LOCAL;
+			continue;
+		}
+		if (packet_filter & NDIS_PACKET_TYPE_ALL_FUNCTIONAL) {
+			packet_filter &= ~NDIS_PACKET_TYPE_ALL_FUNCTIONAL;
+			continue;
+		}
+		if (packet_filter & NDIS_PACKET_TYPE_MULTICAST) {
+			packet_filter &= ~NDIS_PACKET_TYPE_MULTICAST;
+			packet_filter |= NDIS_PACKET_TYPE_ALL_MULTICAST;
+			continue;
+		}
+		if (packet_filter & NDIS_PACKET_TYPE_ALL_MULTICAST) {
+			packet_filter &= ~NDIS_PACKET_TYPE_ALL_MULTICAST;
+			continue;
+		}
+		break;
+	}
+
+	wnd->packet_filter = packet_filter;
+	res = mp_query_int(wnd, OID_GEN_CURRENT_PACKET_FILTER, &packet_filter);
+	if (packet_filter != wnd->packet_filter) {
+		WARNING("filter not set: 0x%08x, 0x%08x",
+			packet_filter, wnd->packet_filter);
+		wnd->packet_filter = packet_filter;
+	}
+	if (wnd->packet_filter)
+		EXIT3(return 0);
+	else
+		EXIT3(return -1);
+}
+
+void set_media_state(struct ndis_device *wnd, enum ndis_media_state state)
+{
+	ENTER2("state: 0x%x", state);
+	if (state == NdisMediaStateConnected) {
+		netif_carrier_on(wnd->net_dev);
+		wnd->tx_ok = 1;
+		if (netif_queue_stopped(wnd->net_dev))
+			netif_wake_queue(wnd->net_dev);
+		if (wnd->physical_medium == NdisPhysicalMediumWirelessLan) {
+			set_bit(LINK_STATUS_ON, &wnd->ndis_pending_work);
+			schedule_wrapndis_work(&wnd->ndis_work);
+		}
+	} else if (state == NdisMediaStateDisconnected) {
+		netif_carrier_off(wnd->net_dev);
+		netif_stop_queue(wnd->net_dev);
+		wnd->tx_ok = 0;
+		if (wnd->physical_medium == NdisPhysicalMediumWirelessLan) {
+			memset(&wnd->essid, 0, sizeof(wnd->essid));
+			set_bit(LINK_STATUS_OFF, &wnd->ndis_pending_work);
+			schedule_wrapndis_work(&wnd->ndis_work);
+		}
+	} else {
+		WARNING("invalid media state: 0x%x", state);
+	}
+}
+
+static int ndis_net_dev_open(struct net_device *net_dev)
+{
+	ENTER1("%p", netdev_priv(net_dev));
+	netif_start_queue(net_dev);
+	netif_poll_enable(net_dev);
+	EXIT1(return 0);
+}
+
+static int ndis_net_dev_close(struct net_device *net_dev)
+{
+	ENTER1("%p", netdev_priv(net_dev));
+	netif_poll_disable(net_dev);
+	netif_tx_disable(net_dev);
+	EXIT1(return 0);
+}
+
+static int ndis_change_mtu(struct net_device *net_dev, int mtu)
+{
+	struct ndis_device *wnd = netdev_priv(net_dev);
+	int max;
+
+	if (mtu < ETH_ZLEN)
+		return -EINVAL;
+	if (mp_query_int(wnd, OID_GEN_MAXIMUM_TOTAL_SIZE, &max) !=
+	    NDIS_STATUS_SUCCESS)
+		return -EOPNOTSUPP;
+	TRACE1("%d", max);
+	max -= ETH_HLEN;
+	if (max <= ETH_ZLEN)
+		return -EINVAL;
+	if (mtu + ETH_HLEN > max)
+		return -EINVAL;
+	net_dev->mtu = mtu;
+	return 0;
+}
+
+#ifdef CONFIG_NET_POLL_CONTROLLER
+static void ndis_poll_controller(struct net_device *dev)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+
+	disable_irq(dev->irq);
+	ndis_isr(wnd->mp_interrupt->kinterrupt, wnd->mp_interrupt);
+	enable_irq(dev->irq);
+}
+#endif
+
+/* called from BH context */
+static struct net_device_stats *ndis_get_stats(struct net_device *dev)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	return &wnd->net_stats;
+}
+
+/* called from BH context */
+static void ndis_set_multicast_list(struct net_device *dev)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	set_bit(SET_MULTICAST_LIST, &wnd->ndis_pending_work);
+	schedule_wrapndis_work(&wnd->ndis_work);
+}
+
+/* called from BH context */
+struct iw_statistics *get_iw_stats(struct net_device *dev)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	return &wnd->iw_stats;
+}
+
+static void update_iw_stats(struct ndis_device *wnd)
+{
+	struct iw_statistics *iw_stats = &wnd->iw_stats;
+	struct ndis_wireless_stats ndis_stats;
+	NDIS_STATUS res;
+	ndis_rssi rssi;
+	int qual;
+
+	ENTER2("%p", wnd);
+	if (wnd->iw_stats_enabled == FALSE || !netif_carrier_ok(wnd->net_dev)) {
+		memset(iw_stats, 0, sizeof(*iw_stats));
+		EXIT2(return);
+	}
+	res = mp_query(wnd, OID_802_11_RSSI, &rssi, sizeof(rssi));
+	if (res == NDIS_STATUS_SUCCESS)
+		iw_stats->qual.level = rssi;
+
+	qual = 100 * (rssi - WL_NOISE) / (WL_SIGMAX - WL_NOISE);
+	if (qual < 0)
+		qual = 0;
+	else if (qual > 100)
+		qual = 100;
+
+	iw_stats->qual.noise = WL_NOISE;
+	iw_stats->qual.qual  = qual;
+
+	res = mp_query(wnd, OID_802_11_STATISTICS,
+		       &ndis_stats, sizeof(ndis_stats));
+	if (res != NDIS_STATUS_SUCCESS)
+		EXIT2(return);
+	iw_stats->discard.retries = (unsigned long)ndis_stats.retry +
+		(unsigned long)ndis_stats.multi_retry;
+	iw_stats->discard.misc = (unsigned long)ndis_stats.fcs_err +
+		(unsigned long)ndis_stats.rtss_fail +
+		(unsigned long)ndis_stats.ack_fail +
+		(unsigned long)ndis_stats.frame_dup;
+
+	EXIT2(return);
+}
+
+static void set_multicast_list(struct ndis_device *wnd)
+{
+	struct net_device *net_dev;
+	ULONG packet_filter;
+	NDIS_STATUS res;
+
+	net_dev = wnd->net_dev;
+	packet_filter = wnd->packet_filter;
+
+	TRACE2("0x%08x", packet_filter);
+	if (net_dev->flags & IFF_PROMISC) {
+		packet_filter |= NDIS_PACKET_TYPE_PROMISCUOUS |
+			NDIS_PACKET_TYPE_ALL_LOCAL;
+	} else if (net_dev->flags & IFF_ALLMULTI ||
+		   net_dev->mc_count > wnd->multicast_size) {
+		packet_filter |= NDIS_PACKET_TYPE_ALL_MULTICAST;
+		TRACE2("0x%08x", packet_filter);
+	} else if (net_dev->mc_count > 0) {
+		int i, size;
+		char *buf;
+		struct dev_mc_list *mclist;
+		size = min(wnd->multicast_size, net_dev->mc_count);
+		TRACE2("%d, %d", wnd->multicast_size, net_dev->mc_count);
+		buf = kmalloc(size * ETH_ALEN, GFP_KERNEL);
+		if (!buf) {
+			WARNING("couldn't allocate memory");
+			EXIT2(return);
+		}
+		mclist = net_dev->mc_list;
+		for (i = 0; i < size && mclist; mclist = mclist->next) {
+			if (mclist->dmi_addrlen != ETH_ALEN)
+				continue;
+			memcpy(buf + i * ETH_ALEN, mclist->dmi_addr, ETH_ALEN);
+			TRACE2(MACSTRSEP, MAC2STR(mclist->dmi_addr));
+			i++;
+		}
+		res = mp_set(wnd, OID_802_3_MULTICAST_LIST, buf, i * ETH_ALEN);
+		if (res == NDIS_STATUS_SUCCESS && i > 0)
+			packet_filter |= NDIS_PACKET_TYPE_MULTICAST;
+		else
+			packet_filter |= NDIS_PACKET_TYPE_ALL_MULTICAST;
+		kfree(buf);
+	}
+	TRACE2("0x%08x", packet_filter);
+	res = set_packet_filter(wnd, packet_filter);
+	if (res)
+		TRACE1("couldn't set packet filter (%08X)", res);
+	EXIT2(return);
+}
+
+static void link_status_off(struct ndis_device *wnd)
+{
+#ifdef CONFIG_WIRELESS_EXT
+	union iwreq_data wrqu;
+
+	memset(&wrqu, 0, sizeof(wrqu));
+	wrqu.ap_addr.sa_family = ARPHRD_ETHER;
+	wireless_send_event(wnd->net_dev, SIOCGIWAP, &wrqu, NULL);
+#endif
+	EXIT2(return);
+}
+
+static void link_status_on(struct ndis_device *wnd)
+{
+#ifdef CONFIG_WIRELESS_EXT
+	struct ndis_assoc_info *ndis_assoc_info;
+	union iwreq_data wrqu;
+	NDIS_STATUS res;
+	const int assoc_size = sizeof(*ndis_assoc_info) + IW_CUSTOM_MAX + 32;
+#endif
+
+	ENTER2("");
+#ifdef CONFIG_WIRELESS_EXT
+	memset(&wrqu, 0, sizeof(wrqu));
+	ndis_assoc_info = kzalloc(assoc_size, GFP_KERNEL);
+	if (!ndis_assoc_info) {
+		ERROR("couldn't allocate memory");
+		goto send_assoc_event;
+	}
+	res = mp_query(wnd, OID_802_11_ASSOCIATION_INFORMATION,
+		       ndis_assoc_info, assoc_size);
+	if (res) {
+		TRACE2("query assoc_info failed (%08X)", res);
+		kfree(ndis_assoc_info);
+		goto send_assoc_event;
+	}
+	TRACE2("%u, 0x%x, %u, 0x%x, %u", ndis_assoc_info->length,
+	       ndis_assoc_info->req_ies, ndis_assoc_info->req_ie_length,
+	       ndis_assoc_info->resp_ies, ndis_assoc_info->resp_ie_length);
+	if (ndis_assoc_info->req_ie_length > 0) {
+		wrqu.data.length = ndis_assoc_info->req_ie_length;
+		wireless_send_event(wnd->net_dev, IWEVASSOCREQIE, &wrqu,
+				    ((char *)ndis_assoc_info) +
+				    ndis_assoc_info->offset_req_ies);
+	}
+	if (ndis_assoc_info->resp_ie_length > 0) {
+		wrqu.data.length = ndis_assoc_info->resp_ie_length;
+		wireless_send_event(wnd->net_dev, IWEVASSOCRESPIE, &wrqu,
+				    ((char *)ndis_assoc_info) +
+				    ndis_assoc_info->offset_resp_ies);
+	}
+	kfree(ndis_assoc_info);
+
+send_assoc_event:
+	get_ap_address(wnd, wrqu.ap_addr.sa_data);
+	wrqu.ap_addr.sa_family = ARPHRD_ETHER;
+	TRACE2(MACSTRSEP, MAC2STR(wrqu.ap_addr.sa_data));
+	wireless_send_event(wnd->net_dev, SIOCGIWAP, &wrqu, NULL);
+#endif
+	EXIT2(return);
+}
+
+static void iw_stats_timer_proc(unsigned long data)
+{
+	struct ndis_device *wnd = (struct ndis_device *)data;
+
+	ENTER2("%d", wnd->iw_stats_interval);
+	if (wnd->iw_stats_interval > 0) {
+		set_bit(COLLECT_IW_STATS, &wnd->ndis_pending_work);
+		schedule_wrapndis_work(&wnd->ndis_work);
+	}
+	mod_timer(&wnd->iw_stats_timer, jiffies + wnd->iw_stats_interval);
+}
+
+static void add_iw_stats_timer(struct ndis_device *wnd)
+{
+	if (wnd->physical_medium != NdisPhysicalMediumWirelessLan)
+		return;
+	if (wnd->iw_stats_interval < 0)
+		wnd->iw_stats_interval *= -1;
+	wnd->iw_stats_timer.data = (unsigned long)wnd;
+	wnd->iw_stats_timer.function = iw_stats_timer_proc;
+	mod_timer(&wnd->iw_stats_timer, jiffies + wnd->iw_stats_interval);
+}
+
+static void del_iw_stats_timer(struct ndis_device *wnd)
+{
+	ENTER2("%d", wnd->iw_stats_interval);
+	wnd->iw_stats_interval *= -1;
+	del_timer_sync(&wnd->iw_stats_timer);
+	EXIT2(return);
+}
+
+static void hangcheck_proc(unsigned long data)
+{
+	struct ndis_device *wnd = (struct ndis_device *)data;
+
+	ENTER3("%d", wnd->hangcheck_interval);
+	if (wnd->hangcheck_interval > 0) {
+		set_bit(HANGCHECK, &wnd->ndis_pending_work);
+		schedule_wrapndis_work(&wnd->ndis_work);
+	}
+	mod_timer(&wnd->hangcheck_timer, jiffies + wnd->hangcheck_interval);
+	EXIT3(return);
+}
+
+void hangcheck_add(struct ndis_device *wnd)
+{
+	if (!wnd->wd->driver->ndis_driver->mp.hangcheck ||
+	    hangcheck_interval < 0)
+		EXIT2(return);
+
+	if (hangcheck_interval > 0)
+		wnd->hangcheck_interval = hangcheck_interval * HZ;
+	if (wnd->hangcheck_interval < 0)
+		wnd->hangcheck_interval *= -1;
+	wnd->hangcheck_timer.data = (unsigned long)wnd;
+	wnd->hangcheck_timer.function = hangcheck_proc;
+	mod_timer(&wnd->hangcheck_timer, jiffies + wnd->hangcheck_interval);
+	EXIT2(return);
+}
+
+void hangcheck_del(struct ndis_device *wnd)
+{
+	ENTER2("%d", wnd->hangcheck_interval);
+	if (wnd->hangcheck_interval > 0)
+		wnd->hangcheck_interval *= -1;
+	del_timer_sync(&wnd->hangcheck_timer);
+	EXIT2(return);
+}
+
+/* worker procedure to take care of setting/checking various states */
+static void ndis_worker(worker_param_t param)
+{
+	struct ndis_device *wnd;
+
+	wnd = worker_param_data(param, struct ndis_device, ndis_work);
+	WORKTRACE("0x%lx", wnd->ndis_pending_work);
+
+	if (test_and_clear_bit(NETIF_WAKEQ, &wnd->ndis_pending_work)) {
+		netif_tx_lock_bh(wnd->net_dev);
+		netif_wake_queue(wnd->net_dev);
+		netif_tx_unlock_bh(wnd->net_dev);
+	}
+
+	if (test_and_clear_bit(LINK_STATUS_OFF, &wnd->ndis_pending_work))
+		link_status_off(wnd);
+
+	if (test_and_clear_bit(LINK_STATUS_ON, &wnd->ndis_pending_work))
+		link_status_on(wnd);
+
+	if (test_and_clear_bit(COLLECT_IW_STATS, &wnd->ndis_pending_work))
+		update_iw_stats(wnd);
+
+	if (test_and_clear_bit(SET_MULTICAST_LIST,
+			       &wnd->ndis_pending_work))
+		set_multicast_list(wnd);
+
+	if (test_and_clear_bit(HANGCHECK, &wnd->ndis_pending_work)) {
+		struct miniport *mp;
+		BOOLEAN reset;
+		KIRQL irql;
+
+		mp = &wnd->wd->driver->ndis_driver->mp;
+		irql = serialize_lock_irql(wnd);
+		reset = LIN2WIN1(mp->hangcheck, wnd->nmb->mp_ctx);
+		serialize_unlock_irql(wnd, irql);
+		if (reset) {
+			TRACE2("%s needs reset", wnd->net_dev->name);
+			mp_reset(wnd);
+		}
+	}
+	WORKEXIT(return);
+}
+
+NDIS_STATUS ndis_reinit(struct ndis_device *wnd)
+{
+	NDIS_STATUS status;
+
+	wnd->attributes &= ~NDIS_ATTRIBUTE_NO_HALT_ON_SUSPEND;
+	status = mp_set_power_state(wnd, NdisDeviceStateD3);
+	if (status != NDIS_STATUS_SUCCESS) {
+		ERROR("halting device %s failed: %08X", wnd->net_dev->name,
+		      status);
+		return status;
+	}
+	status = mp_set_power_state(wnd, NdisDeviceStateD0);
+	if (status != NDIS_STATUS_SUCCESS)
+		ERROR("starting device %s failed: %08X", wnd->net_dev->name,
+		      status);
+	return status;
+}
+
+static void get_encryption_capa(struct ndis_device *wnd, char *buf,
+				const int buf_len)
+{
+	int i, mode;
+	NDIS_STATUS res;
+	struct ndis_assoc_info ndis_assoc_info;
+	struct ndis_add_key ndis_key;
+	struct ndis_capability *c;
+
+	ENTER1("%p", wnd);
+	/* set network type to g, b, or a, in that order */
+	res = mp_query(wnd, OID_802_11_NETWORK_TYPES_SUPPORTED, buf, buf_len);
+	if (res == NDIS_STATUS_SUCCESS) {
+		struct network_type_list *net_types;
+		unsigned long types = 0;
+		net_types = (typeof(net_types))buf;
+		for (i = 0; i < net_types->num; i++) {
+			TRACE2("%d", net_types->types[i]);
+			set_bit(net_types->types[i], &types);
+		}
+		if (types & Ndis802_11OFDM24)
+			mode = Ndis802_11OFDM24;
+		else if (types & Ndis802_11DS)
+			mode = Ndis802_11DS;
+		else if (types & Ndis802_11OFDM5)
+			mode = Ndis802_11OFDM5;
+		else
+			mode = Ndis802_11DS;
+		mp_set_int(wnd, OID_802_11_NETWORK_TYPE_IN_USE, mode);
+	}
+	/* check if WEP is supported */
+	if (set_iw_encr_mode(wnd, IW_AUTH_CIPHER_WEP104,
+			     IW_AUTH_CIPHER_NONE) == 0 &&
+	    get_ndis_encr_mode(wnd) == Ndis802_11Encryption1KeyAbsent)
+		set_bit(Ndis802_11Encryption1Enabled, &wnd->capa.encr);
+
+	/* check if WPA is supported */
+	if (set_ndis_auth_mode(wnd, Ndis802_11AuthModeWPA) == 0 &&
+	    get_ndis_auth_mode(wnd) == Ndis802_11AuthModeWPA)
+		set_bit(Ndis802_11AuthModeWPA, &wnd->capa.encr);
+	else
+		EXIT1(return);
+
+	if (set_ndis_auth_mode(wnd, Ndis802_11AuthModeWPAPSK) == 0 &&
+	    get_ndis_auth_mode(wnd) == Ndis802_11AuthModeWPAPSK)
+		set_bit(Ndis802_11AuthModeWPAPSK, &wnd->capa.encr);
+
+	/* check for highest encryption */
+	mode = 0;
+	if (set_iw_encr_mode(wnd, IW_AUTH_CIPHER_CCMP,
+			     IW_AUTH_CIPHER_NONE) == 0 &&
+	    (i = get_ndis_encr_mode(wnd)) > 0 &&
+	    (i == Ndis802_11Encryption3KeyAbsent ||
+	     i == Ndis802_11Encryption3Enabled))
+		mode = Ndis802_11Encryption3Enabled;
+	else if (set_iw_encr_mode(wnd, IW_AUTH_CIPHER_TKIP,
+				  IW_AUTH_CIPHER_NONE) == 0 &&
+		 (i = get_ndis_encr_mode(wnd)) > 0 &&
+		 (i == Ndis802_11Encryption2KeyAbsent ||
+		  i == Ndis802_11Encryption2Enabled))
+		mode = Ndis802_11Encryption2Enabled;
+	else if (set_iw_encr_mode(wnd, IW_AUTH_CIPHER_WEP104,
+				  IW_AUTH_CIPHER_NONE) == 0 &&
+		 (i = get_ndis_encr_mode(wnd)) > 0 &&
+		 (i == Ndis802_11Encryption1KeyAbsent ||
+		  i == Ndis802_11Encryption1Enabled))
+		mode = Ndis802_11Encryption1Enabled;
+
+	TRACE1("mode: %d", mode);
+	if (mode == 0)
+		EXIT1(return);
+	set_bit(Ndis802_11Encryption1Enabled, &wnd->capa.encr);
+	if (mode == Ndis802_11Encryption1Enabled)
+		EXIT1(return);
+
+	ndis_key.length = 32;
+	ndis_key.index = 0xC0000001;
+	ndis_key.struct_size = sizeof(ndis_key);
+	res = mp_set(wnd, OID_802_11_ADD_KEY, &ndis_key, ndis_key.struct_size);
+	TRACE2("%08X, %lu", res, (unsigned long)sizeof(ndis_key));
+	if (res && res != NDIS_STATUS_INVALID_DATA)
+		EXIT1(return);
+	res = mp_query(wnd, OID_802_11_ASSOCIATION_INFORMATION,
+		       &ndis_assoc_info, sizeof(ndis_assoc_info));
+	TRACE1("%08X", res);
+	if (res == NDIS_STATUS_NOT_SUPPORTED)
+		EXIT1(return);
+
+	set_bit(Ndis802_11Encryption2Enabled, &wnd->capa.encr);
+	if (mode == Ndis802_11Encryption3Enabled)
+		set_bit(Ndis802_11Encryption3Enabled, &wnd->capa.encr);
+	/* not all drivers support OID_802_11_CAPABILITY, so we don't
+	 * know for sure if driver support WPA or WPAPSK; assume
+	 * WPAPSK */
+	set_bit(Ndis802_11AuthModeWPAPSK, &wnd->capa.auth);
+	wnd->max_pmkids = 1;
+
+	memset(buf, 0, buf_len);
+	c = (struct ndis_capability *)buf;
+	res = mp_query(wnd, OID_802_11_CAPABILITY, buf, buf_len);
+	if (!(res == NDIS_STATUS_SUCCESS && c->version == 2))
+		EXIT1(return);
+	wnd->max_pmkids = c->num_PMKIDs;
+
+	for (i = 0; i < c->num_auth_encr_pair; i++) {
+		struct ndis_auth_encr_pair *ae;
+
+		ae = &c->auth_encr_pair[i];
+		if ((char *)(ae + 1) > buf + buf_len)
+			break;
+		switch (ae->auth_mode) {
+		case Ndis802_11AuthModeOpen:
+		case Ndis802_11AuthModeShared:
+		case Ndis802_11AuthModeWPA:
+		case Ndis802_11AuthModeWPAPSK:
+		case Ndis802_11AuthModeWPANone:
+		case Ndis802_11AuthModeWPA2:
+		case Ndis802_11AuthModeWPA2PSK:
+			set_bit(ae->auth_mode, &wnd->capa.auth);
+			break;
+		default:
+			WARNING("unknown auth_mode: %d", ae->auth_mode);
+			break;
+		}
+		switch (ae->encr_mode) {
+		case Ndis802_11EncryptionDisabled:
+		case Ndis802_11Encryption1Enabled:
+		case Ndis802_11Encryption2Enabled:
+		case Ndis802_11Encryption3Enabled:
+			set_bit(ae->encr_mode, &wnd->capa.encr);
+			break;
+		default:
+			WARNING("unknown encr_mode: %d", ae->encr_mode);
+			break;
+		}
+	}
+	EXIT1(return);
+}
+
+wstdcall NTSTATUS NdisDispatchDeviceControl(struct device_object *fdo,
+					    struct irp *irp)
+{
+	struct ndis_device *wnd;
+
+	TRACE3("fdo: %p", fdo);
+	/* for now, we don't have anything intresting here, so pass it
+	 * down to bus driver */
+	wnd = fdo->reserved;
+	return IoPassIrpDown(wnd->nmb->pdo, irp);
+}
+WIN_FUNC_DECL(NdisDispatchDeviceControl,2)
+
+wstdcall NTSTATUS NdisDispatchPower(struct device_object *fdo, struct irp *irp)
+{
+	struct io_stack_location *irp_sl;
+	struct ndis_device *wnd;
+	enum ndis_power_state state;
+	NTSTATUS status;
+	NDIS_STATUS ndis_status;
+
+	irp_sl = IoGetCurrentIrpStackLocation(irp);
+	wnd = fdo->reserved;
+	IOTRACE("fdo: %p, fn: %d:%d, wnd: %p", fdo, irp_sl->major_fn,
+		irp_sl->minor_fn, wnd);
+	if ((irp_sl->params.power.type == SystemPowerState &&
+	     irp_sl->params.power.state.system_state > PowerSystemWorking) ||
+	    (irp_sl->params.power.type == DevicePowerState &&
+	     irp_sl->params.power.state.device_state > PowerDeviceD0))
+		state = NdisDeviceStateD3;
+	else
+		state = NdisDeviceStateD0;
+	switch (irp_sl->minor_fn) {
+	case IRP_MN_SET_POWER:
+		if (state == NdisDeviceStateD0) {
+			status = IoSyncForwardIrp(wnd->nmb->pdo, irp);
+			if (status != STATUS_SUCCESS)
+				break;
+			ndis_status = mp_set_power_state(wnd, state);
+			if (ndis_status != NDIS_STATUS_SUCCESS)
+				WARNING("couldn't set power to %d: %08X",
+					state, ndis_status);
+			TRACE2("%s: device resumed", wnd->net_dev->name);
+			irp->io_status.status = status = STATUS_SUCCESS;
+			IoCompleteRequest(irp, IO_NO_INCREMENT);
+			break;
+		} else {
+			ndis_status = mp_set_power_state(wnd, state);
+			/* TODO: handle error case */
+			if (ndis_status != NDIS_STATUS_SUCCESS)
+				WARNING("setting power to %d failed: %08X",
+					state, ndis_status);
+			status = IoAsyncForwardIrp(wnd->nmb->pdo, irp);
+		}
+		break;
+	case IRP_MN_QUERY_POWER:
+		if (wnd->attributes & NDIS_ATTRIBUTE_NO_HALT_ON_SUSPEND) {
+			ndis_status = mp_query(wnd, OID_PNP_QUERY_POWER,
+					       &state, sizeof(state));
+			TRACE2("%d, %08X", state, ndis_status);
+			/* this OID must always succeed */
+			if (ndis_status != NDIS_STATUS_SUCCESS)
+				TRACE1("query power returns %08X", ndis_status);
+			irp->io_status.status = STATUS_SUCCESS;
+		} else
+			irp->io_status.status = STATUS_SUCCESS;
+		status = IoPassIrpDown(wnd->nmb->pdo, irp);
+		break;
+	case IRP_MN_WAIT_WAKE:
+	case IRP_MN_POWER_SEQUENCE:
+		/* TODO: implement WAIT_WAKE */
+		status = IoPassIrpDown(wnd->nmb->pdo, irp);
+		break;
+	default:
+		status = IoPassIrpDown(wnd->nmb->pdo, irp);
+		break;
+	}
+	IOEXIT(return status);
+}
+WIN_FUNC_DECL(NdisDispatchPower,2)
+
+wstdcall NTSTATUS NdisDispatchPnp(struct device_object *fdo, struct irp *irp)
+{
+	struct io_stack_location *irp_sl;
+	struct ndis_device *wnd;
+	struct device_object *pdo;
+	NTSTATUS status;
+
+	IOTRACE("fdo: %p, irp: %p", fdo, irp);
+	irp_sl = IoGetCurrentIrpStackLocation(irp);
+	wnd = fdo->reserved;
+	pdo = wnd->nmb->pdo;
+	switch (irp_sl->minor_fn) {
+	case IRP_MN_START_DEVICE:
+		status = IoSyncForwardIrp(pdo, irp);
+		if (status != STATUS_SUCCESS)
+			break;
+		if (ndis_start_device(wnd) == NDIS_STATUS_SUCCESS)
+			status = STATUS_SUCCESS;
+		else
+			status = STATUS_FAILURE;
+		irp->io_status.status = status;
+		IoCompleteRequest(irp, IO_NO_INCREMENT);
+		break;
+	case IRP_MN_QUERY_STOP_DEVICE:
+		/* TODO: implement in NDIS */
+		status = IoPassIrpDown(wnd->nmb->pdo, irp);
+		break;
+	case IRP_MN_STOP_DEVICE:
+		mp_halt(wnd);
+		irp->io_status.status = STATUS_SUCCESS;
+		status = IoAsyncForwardIrp(pdo, irp);
+		break;
+	case IRP_MN_REMOVE_DEVICE:
+		TRACE1("%s", wnd->net_dev->name);
+		mp_pnp_event(wnd, NdisDevicePnPEventSurpriseRemoved, 0);
+		if (ndis_remove_device(wnd)) {
+			status = STATUS_FAILURE;
+			break;
+		}
+		/* wnd is already freed */
+		status = IoAsyncForwardIrp(pdo, irp);
+		IoDetachDevice(fdo);
+		IoDeleteDevice(fdo);
+		break;
+	default:
+		status = IoAsyncForwardIrp(pdo, irp);
+		break;
+	}
+	IOTRACE("status: %08X", status);
+	IOEXIT(return status);
+}
+WIN_FUNC_DECL(NdisDispatchPnp,2)
+
+static void set_task_offload(struct ndis_device *wnd, void *buf,
+			     const int buf_size)
+{
+	struct ndis_task_offload_header *task_offload_header;
+	struct ndis_task_offload *task_offload;
+	struct ndis_task_tcp_ip_checksum *csum = NULL;
+	struct ndis_task_tcp_large_send *tso = NULL;
+	NDIS_STATUS status;
+
+	memset(buf, 0, buf_size);
+	task_offload_header = buf;
+	task_offload_header->version = NDIS_TASK_OFFLOAD_VERSION;
+	task_offload_header->size = sizeof(*task_offload_header);
+	task_offload_header->encap_format.flags.fixed_header_size = 1;
+	task_offload_header->encap_format.header_size = sizeof(struct ethhdr);
+	task_offload_header->encap_format.encap = IEEE_802_3_Encapsulation;
+	status = mp_query(wnd, OID_TCP_TASK_OFFLOAD, buf, buf_size);
+	TRACE1("%08X", status);
+	if (status != NDIS_STATUS_SUCCESS)
+		EXIT1(return);
+	if (task_offload_header->offset_first_task == 0)
+		EXIT1(return);
+	task_offload = ((void *)task_offload_header +
+			task_offload_header->offset_first_task);
+	while (1) {
+		TRACE1("%d, %d", task_offload->version, task_offload->task);
+		switch(task_offload->task) {
+		case TcpIpChecksumNdisTask:
+			csum = (void *)task_offload->task_buf;
+			break;
+		case TcpLargeSendNdisTask:
+			tso = (void *)task_offload->task_buf;
+			break;
+		default:
+			TRACE1("%d", task_offload->task);
+			break;
+		}
+		if (task_offload->offset_next_task == 0)
+			break;
+		task_offload = (void *)task_offload +
+			task_offload->offset_next_task;
+	}
+	if (tso)
+		TRACE1("%u, %u, %d, %d", tso->max_size, tso->min_seg_count,
+		       tso->tcp_opts, tso->ip_opts);
+	if (!csum)
+		EXIT1(return);
+	TRACE1("%08x, %08x", csum->v4_tx.value, csum->v4_rx.value);
+	task_offload_header->encap_format.flags.fixed_header_size = 1;
+	task_offload_header->encap_format.header_size = sizeof(struct ethhdr);
+	task_offload_header->offset_first_task = sizeof(*task_offload_header);
+	task_offload = ((void *)task_offload_header +
+			task_offload_header->offset_first_task);
+	task_offload->offset_next_task = 0;
+	task_offload->size = sizeof(*task_offload);
+	task_offload->task = TcpIpChecksumNdisTask;
+	memcpy(task_offload->task_buf, csum, sizeof(*csum));
+	task_offload->task_buf_length = sizeof(*csum);
+	status = mp_set(wnd, OID_TCP_TASK_OFFLOAD, task_offload_header,
+			sizeof(*task_offload_header) +
+			sizeof(*task_offload) + sizeof(*csum));
+	TRACE1("%08X", status);
+	if (status != NDIS_STATUS_SUCCESS)
+		EXIT2(return);
+	wnd->tx_csum = csum->v4_tx;
+	if (csum->v4_tx.tcp_csum && csum->v4_tx.udp_csum) {
+		if (csum->v4_tx.ip_csum) {
+			wnd->net_dev->features |= NETIF_F_HW_CSUM;
+			TRACE1("hw checksum enabled");
+		} else {
+			wnd->net_dev->features |= NETIF_F_IP_CSUM;
+			TRACE1("IP checksum enabled");
+		}
+		if (wnd->sg_dma_size)
+			wnd->net_dev->features |= NETIF_F_SG;
+	}
+	wnd->rx_csum = csum->v4_rx;
+	EXIT1(return);
+}
+
+static void get_supported_oids(struct ndis_device *wnd)
+{
+	NDIS_STATUS res;
+	int i, n, needed;
+	ndis_oid *oids;
+
+	res = mp_query_info(wnd, OID_GEN_SUPPORTED_LIST, NULL, 0, NULL,
+			    &needed);
+	if (!(res == NDIS_STATUS_BUFFER_TOO_SHORT ||
+	      res == NDIS_STATUS_INVALID_LENGTH))
+		EXIT1(return);
+	oids = kmalloc(needed, GFP_KERNEL);
+	if (!oids) {
+		TRACE1("couldn't allocate memory");
+		EXIT1(return);
+	}
+	res = mp_query(wnd, OID_GEN_SUPPORTED_LIST, oids, needed);
+	if (res) {
+		TRACE1("failed: %08X", res);
+		kfree(oids);
+		EXIT1(return);
+	}
+	for (i = 0, n = needed / sizeof(*oids); i < n; i++) {
+		TRACE1("oid: %08X", oids[i]);
+		/* if a wireless device didn't say so for
+		 * OID_GEN_PHYSICAL_MEDIUM (they should, but in case) */
+		if (wnd->physical_medium != NdisPhysicalMediumWirelessLan &&
+		    oids[i] == OID_802_11_SSID)
+			wnd->physical_medium = NdisPhysicalMediumWirelessLan;
+	}
+	kfree(oids);
+	EXIT1(return);
+}
+
+static void ndis_get_drvinfo(struct net_device *dev,
+			     struct ethtool_drvinfo *info)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	strncpy(info->driver, DRIVER_NAME, sizeof(info->driver) - 2);
+	strcat(info->driver, "+");
+	strncat(info->driver, wnd->wd->driver->name,
+		sizeof(info->driver) - strlen(DRIVER_NAME) - 1);
+	strncpy(info->version, DRIVER_VERSION, sizeof(info->version) - 2);
+	strcat(info->version, "+");
+	strncat(info->version, wnd->wd->driver->version,
+		sizeof(info->version) - strlen(DRIVER_VERSION) - 1);
+	if (wrap_is_pci_bus(wnd->wd->dev_bus))
+		strncpy(info->bus_info, pci_name(wnd->wd->pci.pdev),
+			sizeof(info->bus_info) - 1);
+#ifdef ENABLE_USB
+	else
+		usb_make_path(wnd->wd->usb.udev, info->bus_info,
+			      sizeof(info->bus_info) - 1);
+#endif
+	return;
+}
+
+static u32 ndis_get_link(struct net_device *dev)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	return netif_carrier_ok(wnd->net_dev);
+}
+
+static void ndis_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+
+	wol->supported = 0;
+	wol->wolopts = 0;
+	if (!(wnd->attributes & NDIS_ATTRIBUTE_NO_HALT_ON_SUSPEND))
+		EXIT2(return);
+	if (!wrap_is_pci_bus(wnd->wd->dev_bus))
+		EXIT2(return);
+	/* we always suspend to D3 */
+	if (wnd->pnp_capa.wakeup.min_magic_packet_wakeup < NdisDeviceStateD3)
+		return;
+	wol->supported |= WAKE_MAGIC;
+	if (wnd->ndis_wolopts & NDIS_PNP_WAKE_UP_MAGIC_PACKET)
+		wol->wolopts |= WAKE_MAGIC;
+	return;
+}
+
+static int ndis_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+
+	if (!(wnd->attributes & NDIS_ATTRIBUTE_NO_HALT_ON_SUSPEND))
+		return -EOPNOTSUPP;
+	if (wnd->pnp_capa.wakeup.min_magic_packet_wakeup < NdisDeviceStateD3)
+		EXIT2(return -EOPNOTSUPP);
+	TRACE2("0x%x", wol->wolopts);
+	if (wol->wolopts & WAKE_MAGIC) {
+		wnd->ndis_wolopts |= NDIS_PNP_WAKE_UP_MAGIC_PACKET;
+		if (wol->wolopts != WAKE_MAGIC)
+			WARNING("ignored wake-on-lan options: 0x%x",
+				wol->wolopts & ~WAKE_MAGIC);
+	} else if (!wol->wolopts)
+		wnd->ndis_wolopts = 0;
+	else
+		return -EOPNOTSUPP;
+	TRACE2("0x%x", wnd->ndis_wolopts);
+	return 0;
+}
+
+static u32 ndis_get_tx_csum(struct net_device *dev)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	if (wnd->tx_csum.tcp_csum && wnd->tx_csum.udp_csum)
+		return 1;
+	else
+		return 0;
+}
+
+static u32 ndis_get_rx_csum(struct net_device *dev)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	if (wnd->rx_csum.value)
+		return 1;
+	else
+		return 0;
+}
+
+static int ndis_set_tx_csum(struct net_device *dev, u32 data)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+
+	if (data && (wnd->tx_csum.value == 0))
+		return -EOPNOTSUPP;
+
+	if (wnd->tx_csum.ip_csum)
+		ethtool_op_set_tx_hw_csum(dev, data);
+	else
+		ethtool_op_set_tx_csum(dev, data);
+	return 0;
+}
+
+static int ndis_set_rx_csum(struct net_device *dev, u32 data)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+
+	if (data && (wnd->tx_csum.value == 0))
+		return -EOPNOTSUPP;
+
+	/* TODO: enable/disable rx csum through NDIS */
+	return 0;
+}
+
+static u32 ndis_get_sg(struct net_device *dev)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	if (wnd->sg_dma_size)
+		return ethtool_op_get_sg(dev);
+	else
+		return 0;
+}
+
+static int ndis_set_sg(struct net_device *dev, u32 data)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	if (wnd->sg_dma_size)
+		return ethtool_op_set_sg(dev, data);
+	else
+		return -EOPNOTSUPP;
+}
+
+static struct ethtool_ops ndis_ethtool_ops = {
+	.get_drvinfo	= ndis_get_drvinfo,
+	.get_link	= ndis_get_link,
+	.get_wol	= ndis_get_wol,
+	.set_wol	= ndis_set_wol,
+	.get_tx_csum	= ndis_get_tx_csum,
+	.get_rx_csum	= ndis_get_rx_csum,
+	.set_tx_csum	= ndis_set_tx_csum,
+	.set_rx_csum	= ndis_set_rx_csum,
+	.get_sg		= ndis_get_sg,
+	.set_sg		= ndis_set_sg,
+};
+
+static int notifier_event(struct notifier_block *notifier, unsigned long event,
+			  void *ptr)
+{
+	struct net_device *net_dev = ptr;
+
+	ENTER2("0x%lx", event);
+	if (net_dev->ethtool_ops == &ndis_ethtool_ops
+	    && event == NETDEV_CHANGENAME) {
+		struct ndis_device *wnd = netdev_priv(net_dev);
+		/* called with rtnl lock held, so no need to lock */
+		wrap_procfs_remove_ndis_device(wnd);
+		printk(KERN_INFO "%s: changing interface name from '%s' to "
+		       "'%s'\n", DRIVER_NAME, wnd->netdev_name, net_dev->name);
+		memcpy(wnd->netdev_name, net_dev->name,
+		       sizeof(wnd->netdev_name));
+		wrap_procfs_add_ndis_device(wnd);
+	}
+	return NOTIFY_DONE;
+}
+
+static struct notifier_block netdev_notifier = {
+	.notifier_call = notifier_event,
+};
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29)
+static const struct net_device_ops ndis_netdev_ops = {
+	.ndo_open = ndis_net_dev_open,
+	.ndo_stop = ndis_net_dev_close,
+	.ndo_start_xmit = tx_skbuff,
+	.ndo_change_mtu = ndis_change_mtu,
+	.ndo_set_multicast_list = ndis_set_multicast_list,
+	.ndo_set_mac_address = ndis_set_mac_address,
+	.ndo_get_stats = ndis_get_stats,
+#ifdef CONFIG_NET_POLL_CONTROLLER
+	.ndo_poll_controller = ndis_poll_controller,
+#endif
+};
+#endif
+
+static NDIS_STATUS ndis_start_device(struct ndis_device *wnd)
+{
+	struct wrap_device *wd;
+	struct net_device *net_dev;
+	NDIS_STATUS status;
+	char *buf;
+	const int buf_len = 256;
+	mac_address mac;
+	struct transport_header_offset *tx_header_offset;
+	int n;
+
+	ENTER2("%d", in_atomic());
+	status = mp_init(wnd);
+	if (status == NDIS_STATUS_NOT_RECOGNIZED)
+		EXIT1(return NDIS_STATUS_SUCCESS);
+	if (status != NDIS_STATUS_SUCCESS)
+		EXIT1(return status);
+	wd = wnd->wd;
+	net_dev = wnd->net_dev;
+
+	get_supported_oids(wnd);
+	memset(mac, 0, sizeof(mac));
+	status = mp_query(wnd, OID_802_3_CURRENT_ADDRESS, mac, sizeof(mac));
+	if (memcmp(mac, "\x00\x00\x00\x00\x00\x00", sizeof(mac)) == 0) {
+		status = mp_query(wnd, OID_802_3_PERMANENT_ADDRESS, mac,
+				  sizeof(mac));
+		if (status != NDIS_STATUS_SUCCESS) {
+			ERROR("couldn't get mac address: %08X", status);
+			goto err_start;
+		}
+	}
+	TRACE1("mac:" MACSTRSEP, MAC2STR(mac));
+	memcpy(net_dev->dev_addr, mac, ETH_ALEN);
+
+	strncpy(net_dev->name, if_name, IFNAMSIZ - 1);
+	net_dev->name[IFNAMSIZ - 1] = 0;
+
+	wnd->packet_filter = NDIS_PACKET_TYPE_DIRECTED |
+		NDIS_PACKET_TYPE_BROADCAST | NDIS_PACKET_TYPE_MULTICAST;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29)
+	net_dev->netdev_ops = &ndis_netdev_ops;
+#else
+	net_dev->open = ndis_net_dev_open;
+	net_dev->hard_start_xmit = tx_skbuff;
+	net_dev->stop = ndis_net_dev_close;
+	net_dev->get_stats = ndis_get_stats;
+	net_dev->change_mtu = ndis_change_mtu;
+	net_dev->set_multicast_list = ndis_set_multicast_list;
+	net_dev->set_mac_address = ndis_set_mac_address;
+#ifdef CONFIG_NET_POLL_CONTROLLER
+	net_dev->poll_controller = ndis_poll_controller;
+#endif
+#endif
+	if (wnd->physical_medium == NdisPhysicalMediumWirelessLan) {
+		net_dev->wireless_handlers = &ndis_handler_def;
+	}
+	net_dev->ethtool_ops = &ndis_ethtool_ops;
+	if (wnd->mp_interrupt)
+		net_dev->irq = wnd->mp_interrupt->irq;
+	net_dev->mem_start = wnd->mem_start;
+	net_dev->mem_end = wnd->mem_end;
+	status = mp_query_int(wnd, OID_802_3_MAXIMUM_LIST_SIZE,
+			      &wnd->multicast_size);
+	if (status != NDIS_STATUS_SUCCESS || wnd->multicast_size < 0)
+		wnd->multicast_size = 0;
+	if (wnd->multicast_size > 0)
+		net_dev->flags |= IFF_MULTICAST;
+	else
+		net_dev->flags &= ~IFF_MULTICAST;
+
+	buf = kmalloc(buf_len, GFP_KERNEL);
+	if (!buf) {
+		WARNING("couldn't allocate memory");
+		goto err_start;
+	}
+
+	set_task_offload(wnd, buf, buf_len);
+#ifdef NETIF_F_LLTX
+	net_dev->features |= NETIF_F_LLTX;
+#endif
+
+	if (register_netdev(net_dev)) {
+		ERROR("cannot register net device %s", net_dev->name);
+		goto err_register;
+	}
+	memcpy(wnd->netdev_name, net_dev->name, sizeof(wnd->netdev_name));
+	memset(buf, 0, buf_len);
+	status = mp_query(wnd, OID_GEN_VENDOR_DESCRIPTION, buf, buf_len);
+	if (status != NDIS_STATUS_SUCCESS) {
+		WARNING("couldn't get vendor information: 0x%x", status);
+		buf[0] = 0;
+	}
+	wnd->drv_ndis_version = n = 0;
+	mp_query_int(wnd, OID_GEN_DRIVER_VERSION, &wnd->drv_ndis_version);
+	mp_query_int(wnd, OID_GEN_VENDOR_DRIVER_VERSION, &n);
+
+	printk(KERN_INFO "%s: ethernet device " MACSTRSEP " using %sNDIS "
+	       "driver: %s, version: 0x%x, NDIS version: 0x%x, vendor: '%s', "
+	       "%s\n", net_dev->name, MAC2STR(net_dev->dev_addr),
+	       deserialized_driver(wnd) ? "" : "serialized ",
+	       wnd->wd->driver->name, n, wnd->drv_ndis_version, buf,
+	       wnd->wd->conf_file_name);
+
+	if (deserialized_driver(wnd)) {
+		/* deserialized drivers don't have a limit, but we
+		 * keep max at TX_RING_SIZE */
+		wnd->max_tx_packets = TX_RING_SIZE;
+	} else {
+		status = mp_query_int(wnd, OID_GEN_MAXIMUM_SEND_PACKETS,
+				      &wnd->max_tx_packets);
+		if (status != NDIS_STATUS_SUCCESS)
+			wnd->max_tx_packets = 1;
+		if (wnd->max_tx_packets > TX_RING_SIZE)
+			wnd->max_tx_packets = TX_RING_SIZE;
+	}
+	TRACE2("maximum send packets: %d", wnd->max_tx_packets);
+	NdisAllocatePacketPoolEx(&status, &wnd->tx_packet_pool,
+				 wnd->max_tx_packets, 0,
+				 PROTOCOL_RESERVED_SIZE_IN_PACKET);
+	if (status != NDIS_STATUS_SUCCESS) {
+		ERROR("couldn't allocate packet pool");
+		goto packet_pool_err;
+	}
+	NdisAllocateBufferPool(&status, &wnd->tx_buffer_pool,
+			       wnd->max_tx_packets + 4);
+	if (status != NDIS_STATUS_SUCCESS) {
+		ERROR("couldn't allocate buffer pool");
+		goto buffer_pool_err;
+	}
+	TRACE1("pool: %p", wnd->tx_buffer_pool);
+
+	if (mp_query_int(wnd, OID_GEN_MAXIMUM_TOTAL_SIZE, &n) ==
+	    NDIS_STATUS_SUCCESS && n > ETH_HLEN)
+		ndis_change_mtu(wnd->net_dev, n - ETH_HLEN);
+
+	if (mp_query_int(wnd, OID_GEN_MAC_OPTIONS, &n) == NDIS_STATUS_SUCCESS)
+		TRACE2("mac options supported: 0x%x", n);
+
+	tx_header_offset = (typeof(tx_header_offset))buf;
+	tx_header_offset->protocol_type = NDIS_PROTOCOL_ID_TCP_IP;
+	tx_header_offset->header_offset = sizeof(ETH_HLEN);
+	status = mp_set(wnd, OID_GEN_TRANSPORT_HEADER_OFFSET,
+			tx_header_offset, sizeof(*tx_header_offset));
+	TRACE2("%08X", status);
+
+	status = mp_query_int(wnd, OID_GEN_PHYSICAL_MEDIUM,
+			      &wnd->physical_medium);
+	if (status != NDIS_STATUS_SUCCESS)
+		wnd->physical_medium = NdisPhysicalMediumUnspecified;
+
+	if (wnd->physical_medium == NdisPhysicalMediumWirelessLan) {
+		mp_set_int(wnd, OID_802_11_POWER_MODE, NDIS_POWER_OFF);
+		get_encryption_capa(wnd, buf, buf_len);
+		TRACE1("capbilities = %ld", wnd->capa.encr);
+		printk(KERN_INFO "%s: encryption modes supported: "
+		       "%s%s%s%s%s%s%s\n", net_dev->name,
+		       test_bit(Ndis802_11Encryption1Enabled, &wnd->capa.encr) ?
+		       "WEP" : "none",
+
+		       test_bit(Ndis802_11Encryption2Enabled, &wnd->capa.encr) ?
+		       "; TKIP with WPA" : "",
+		       test_bit(Ndis802_11AuthModeWPA2, &wnd->capa.auth) ?
+		       ", WPA2" : "",
+		       test_bit(Ndis802_11AuthModeWPA2PSK, &wnd->capa.auth) ?
+		       ", WPA2PSK" : "",
+
+		       test_bit(Ndis802_11Encryption3Enabled, &wnd->capa.encr) ?
+		       "; AES/CCMP with WPA" : "",
+		       test_bit(Ndis802_11AuthModeWPA2, &wnd->capa.auth) ?
+		       ", WPA2" : "",
+		       test_bit(Ndis802_11AuthModeWPA2PSK, &wnd->capa.auth) ?
+		       ", WPA2PSK" : "");
+
+		set_default_iw_params(wnd);
+	}
+	status = mp_query_int(wnd, OID_GEN_MEDIA_CONNECT_STATUS, (int *)buf);
+	if (status == NDIS_STATUS_SUCCESS)
+		set_media_state(wnd, *((int *)buf));
+	kfree(buf);
+	wrap_procfs_add_ndis_device(wnd);
+	hangcheck_add(wnd);
+	add_iw_stats_timer(wnd);
+	EXIT1(return NDIS_STATUS_SUCCESS);
+
+buffer_pool_err:
+	wnd->tx_buffer_pool = NULL;
+	if (wnd->tx_packet_pool) {
+		NdisFreePacketPool(wnd->tx_packet_pool);
+		wnd->tx_packet_pool = NULL;
+	}
+packet_pool_err:
+err_register:
+	kfree(buf);
+err_start:
+	ndis_remove_device(wnd);
+	EXIT1(return NDIS_STATUS_FAILURE);
+}
+
+static int ndis_remove_device(struct ndis_device *wnd)
+{
+	s8 tx_pending;
+
+	/* prevent setting essid during disassociation */
+	memset(&wnd->essid, 0, sizeof(wnd->essid));
+	wnd->tx_ok = 0;
+	if (wnd->max_tx_packets)
+		unregister_netdev(wnd->net_dev);
+	netif_carrier_off(wnd->net_dev);
+	/* if device is suspended, but resume failed, tx_ring_mutex
+	 * may already be locked */
+	if (down_trylock(&wnd->tx_ring_mutex))
+		WARNING("couldn't obtain tx_ring_mutex");
+	spin_lock_bh(&wnd->tx_ring_lock);
+	tx_pending = wnd->tx_ring_end - wnd->tx_ring_start;
+	if (tx_pending < 0)
+		tx_pending += TX_RING_SIZE;
+	else if (tx_pending == 0 && wnd->is_tx_ring_full)
+		tx_pending = TX_RING_SIZE - 1;
+	wnd->is_tx_ring_full = 0;
+	/* throw away pending packets */
+	while (tx_pending-- > 0) {
+		struct ndis_packet *packet;
+
+		packet = wnd->tx_ring[wnd->tx_ring_start];
+		free_tx_packet(wnd, packet, NDIS_STATUS_CLOSING);
+		wnd->tx_ring_start = (wnd->tx_ring_start + 1) % TX_RING_SIZE;
+	}
+	spin_unlock_bh(&wnd->tx_ring_lock);
+	up(&wnd->tx_ring_mutex);
+	wrap_procfs_remove_ndis_device(wnd);
+	mp_halt(wnd);
+	ndis_exit_device(wnd);
+
+	if (wnd->tx_packet_pool) {
+		NdisFreePacketPool(wnd->tx_packet_pool);
+		wnd->tx_packet_pool = NULL;
+	}
+	if (wnd->tx_buffer_pool) {
+		NdisFreeBufferPool(wnd->tx_buffer_pool);
+		wnd->tx_buffer_pool = NULL;
+	}
+	if (wnd->pmkids)
+		kfree(wnd->pmkids);
+	printk(KERN_INFO "%s: device %s removed\n", DRIVER_NAME,
+	       wnd->net_dev->name);
+	kfree(wnd->nmb);
+	free_netdev(wnd->net_dev);
+	EXIT2(return 0);
+}
+
+static wstdcall NTSTATUS NdisAddDevice(struct driver_object *drv_obj,
+				       struct device_object *pdo)
+{
+	struct device_object *fdo;
+	struct ndis_mp_block *nmb;
+	NTSTATUS status;
+	struct ndis_device *wnd;
+	struct net_device *net_dev;
+	struct wrap_device *wd;
+	unsigned long i;
+
+	ENTER2("%p, %p", drv_obj, pdo);
+	if (strlen(if_name) >= IFNAMSIZ) {
+		ERROR("interface name '%s' is too long", if_name);
+		return STATUS_INVALID_PARAMETER;
+	}
+	net_dev = alloc_etherdev(sizeof(*wnd));
+	if (!net_dev) {
+		ERROR("couldn't allocate device");
+		return STATUS_RESOURCES;
+	}
+	wd = pdo->reserved;
+	if (wrap_is_pci_bus(wd->dev_bus))
+		SET_NETDEV_DEV(net_dev, &wd->pci.pdev->dev);
+	if (wrap_is_usb_bus(wd->dev_bus))
+		SET_NETDEV_DEV(net_dev, &wd->usb.intf->dev);
+	status = IoCreateDevice(drv_obj, 0, NULL, FILE_DEVICE_UNKNOWN, 0,
+				FALSE, &fdo);
+	if (status != STATUS_SUCCESS) {
+		free_netdev(net_dev);
+		EXIT2(return status);
+	}
+	wnd = netdev_priv(net_dev);
+	TRACE1("wnd: %p", wnd);
+
+	nmb = kmalloc(sizeof(*nmb), GFP_KERNEL);
+	if (!nmb) {
+		WARNING("couldn't allocate memory");
+		IoDeleteDevice(fdo);
+		free_netdev(net_dev);
+		return STATUS_RESOURCES;
+	}
+#if defined(DEBUG) && DEBUG >= 6
+	/* poison nmb so if a driver accesses uninitialized pointers, we
+	 * know what it is */
+	for (i = 0; i < sizeof(*nmb) / sizeof(unsigned long); i++)
+		((unsigned long *)nmb)[i] = i + 0x8a3fc1;
+#endif
+
+	wnd->nmb = nmb;
+	nmb->wnd = wnd;
+	nmb->pdo = pdo;
+	wd->wnd = wnd;
+	wnd->wd = wd;
+	wnd->net_dev = net_dev;
+	fdo->reserved = wnd;
+	nmb->fdo = fdo;
+	if (ndis_init_device(wnd)) {
+		IoDeleteDevice(fdo);
+		kfree(nmb);
+		free_netdev(net_dev);
+		EXIT1(return STATUS_RESOURCES);
+	}
+	nmb->next_device = IoAttachDeviceToDeviceStack(fdo, pdo);
+	spin_lock_init(&wnd->tx_ring_lock);
+	init_MUTEX(&wnd->tx_ring_mutex);
+	init_MUTEX(&wnd->ndis_req_mutex);
+	wnd->ndis_req_done = 0;
+	initialize_work(&wnd->tx_work, tx_worker, wnd);
+	wnd->tx_ring_start = 0;
+	wnd->tx_ring_end = 0;
+	wnd->is_tx_ring_full = 0;
+	wnd->capa.encr = 0;
+	wnd->capa.auth = 0;
+	wnd->attributes = 0;
+	wnd->dma_map_count = 0;
+	wnd->dma_map_addr = NULL;
+	wnd->nick[0] = 0;
+	init_timer(&wnd->hangcheck_timer);
+	wnd->scan_timestamp = 0;
+	init_timer(&wnd->iw_stats_timer);
+	wnd->iw_stats_interval = 10 * HZ;
+	wnd->ndis_pending_work = 0;
+	memset(&wnd->essid, 0, sizeof(wnd->essid));
+	memset(&wnd->encr_info, 0, sizeof(wnd->encr_info));
+	wnd->infrastructure_mode = Ndis802_11Infrastructure;
+	initialize_work(&wnd->ndis_work, ndis_worker, wnd);
+	wnd->iw_stats_enabled = TRUE;
+
+	TRACE1("nmb: %p, pdo: %p, fdo: %p, attached: %p, next: %p",
+	       nmb, pdo, fdo, fdo->attached, nmb->next_device);
+
+	/* dispatch routines are called as Windows functions */
+	for (i = 0; i <= IRP_MJ_MAXIMUM_FUNCTION; i++)
+		drv_obj->major_func[i] = WIN_FUNC_PTR(IoPassIrpDown,2);
+
+	drv_obj->major_func[IRP_MJ_PNP] = WIN_FUNC_PTR(NdisDispatchPnp,2);
+	drv_obj->major_func[IRP_MJ_POWER] = WIN_FUNC_PTR(NdisDispatchPower,2);
+	drv_obj->major_func[IRP_MJ_INTERNAL_DEVICE_CONTROL] =
+		WIN_FUNC_PTR(NdisDispatchDeviceControl,2);
+//	drv_obj->major_func[IRP_MJ_DEVICE_CONTROL] =
+//		WIN_FUNC_PTR(NdisDispatchDeviceControl,2);
+	EXIT2(return STATUS_SUCCESS);
+}
+
+int init_ndis_driver(struct driver_object *drv_obj)
+{
+	ENTER1("%p", drv_obj);
+	drv_obj->drv_ext->add_device = NdisAddDevice;
+	return 0;
+}
+
+int wrapndis_init(void)
+{
+	wrapndis_wq = create_singlethread_workqueue("wrapndis_wq");
+	if (!wrapndis_wq)
+		EXIT1(return -ENOMEM);
+	wrapndis_worker_thread = wrap_worker_init(wrapndis_wq);
+	TRACE1("%p", wrapndis_worker_thread);
+	register_netdevice_notifier(&netdev_notifier);
+	return 0;
+}
+
+void wrapndis_exit(void)
+{
+	unregister_netdevice_notifier(&netdev_notifier);
+	if (wrapndis_wq)
+		destroy_workqueue(wrapndis_wq);
+	TRACE1("%p", wrapndis_worker_thread);
+	if (wrapndis_worker_thread)
+		ObDereferenceObject(wrapndis_worker_thread);
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/ndiswrapper/wrapper.h
+++ linux-mvl-dove-2.6.32/ubuntu/ndiswrapper/wrapper.h
@@ -0,0 +1,24 @@
+/*
+ *  Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *  GNU General Public License for more details.
+ *
+ */
+
+#ifndef WRAPPER_H
+#define WRAPPER_H
+
+extern char *if_name;
+extern int proc_uid;
+extern int proc_gid;
+extern int hangcheck_interval;
+
+#endif /* WRAPPER_H */
--- linux-mvl-dove-2.6.32.orig/ubuntu/ndiswrapper/usb.h
+++ linux-mvl-dove-2.6.32/ubuntu/ndiswrapper/usb.h
@@ -0,0 +1,376 @@
+/*
+ *  Copyright (C) 2004 Jan Kiszka
+ *  Copyright (C) 2005 Giridhar Pemmasani
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *  GNU General Public License for more details.
+ *
+ */
+
+#ifndef _USB_H_
+#define _USB_H_
+
+#include "ntoskernel.h"
+
+#define IOCTL_INTERNAL_USB_SUBMIT_URB			0x00220003
+#define IOCTL_INTERNAL_USB_RESET_PORT			0x00220007
+#define IOCTL_INTERNAL_USB_GET_PORT_STATUS		0x00220013
+#define IOCTL_INTERNAL_USB_CYCLE_PORT			0x0022001F
+#define IOCTL_INTERNAL_USB_SUBMIT_IDLE_NOTIFICATION	0x00220027
+
+#define URB_FUNCTION_SELECT_CONFIGURATION            0x0000
+#define URB_FUNCTION_SELECT_INTERFACE                0x0001
+#define URB_FUNCTION_ABORT_PIPE                      0x0002
+#define URB_FUNCTION_TAKE_FRAME_LENGTH_CONTROL       0x0003
+#define URB_FUNCTION_RELEASE_FRAME_LENGTH_CONTROL    0x0004
+#define URB_FUNCTION_GET_FRAME_LENGTH                0x0005
+#define URB_FUNCTION_SET_FRAME_LENGTH                0x0006
+#define URB_FUNCTION_GET_CURRENT_FRAME_NUMBER        0x0007
+#define URB_FUNCTION_CONTROL_TRANSFER                0x0008
+#define URB_FUNCTION_BULK_OR_INTERRUPT_TRANSFER      0x0009
+#define URB_FUNCTION_ISOCH_TRANSFER                  0x000A
+#define URB_FUNCTION_GET_DESCRIPTOR_FROM_DEVICE      0x000B
+#define URB_FUNCTION_SET_DESCRIPTOR_TO_DEVICE        0x000C
+#define URB_FUNCTION_SET_FEATURE_TO_DEVICE           0x000D
+#define URB_FUNCTION_SET_FEATURE_TO_INTERFACE        0x000E
+#define URB_FUNCTION_SET_FEATURE_TO_ENDPOINT         0x000F
+#define URB_FUNCTION_CLEAR_FEATURE_TO_DEVICE         0x0010
+#define URB_FUNCTION_CLEAR_FEATURE_TO_INTERFACE      0x0011
+#define URB_FUNCTION_CLEAR_FEATURE_TO_ENDPOINT       0x0012
+#define URB_FUNCTION_GET_STATUS_FROM_DEVICE          0x0013
+#define URB_FUNCTION_GET_STATUS_FROM_INTERFACE       0x0014
+#define URB_FUNCTION_GET_STATUS_FROM_ENDPOINT        0x0015
+#define URB_FUNCTION_RESERVED_0X0016                 0x0016
+#define URB_FUNCTION_VENDOR_DEVICE                   0x0017
+#define URB_FUNCTION_VENDOR_INTERFACE                0x0018
+#define URB_FUNCTION_VENDOR_ENDPOINT                 0x0019
+#define URB_FUNCTION_CLASS_DEVICE                    0x001A
+#define URB_FUNCTION_CLASS_INTERFACE                 0x001B
+#define URB_FUNCTION_CLASS_ENDPOINT                  0x001C
+#define URB_FUNCTION_RESERVE_0X001D                  0x001D
+#define URB_FUNCTION_SYNC_RESET_PIPE_AND_CLEAR_STALL 0x001E
+#define URB_FUNCTION_CLASS_OTHER                     0x001F
+#define URB_FUNCTION_VENDOR_OTHER                    0x0020
+#define URB_FUNCTION_GET_STATUS_FROM_OTHER           0x0021
+#define URB_FUNCTION_CLEAR_FEATURE_TO_OTHER          0x0022
+#define URB_FUNCTION_SET_FEATURE_TO_OTHER            0x0023
+#define URB_FUNCTION_GET_DESCRIPTOR_FROM_ENDPOINT    0x0024
+#define URB_FUNCTION_SET_DESCRIPTOR_TO_ENDPOINT      0x0025
+#define URB_FUNCTION_GET_CONFIGURATION               0x0026
+#define URB_FUNCTION_GET_INTERFACE                   0x0027
+#define URB_FUNCTION_GET_DESCRIPTOR_FROM_INTERFACE   0x0028
+#define URB_FUNCTION_SET_DESCRIPTOR_TO_INTERFACE     0x0029
+#define URB_FUNCTION_GET_MS_FEATURE_DESCRIPTOR       0x002A
+#define URB_FUNCTION_RESERVE_0X002B                  0x002B
+#define URB_FUNCTION_RESERVE_0X002C                  0x002C
+#define URB_FUNCTION_RESERVE_0X002D                  0x002D
+#define URB_FUNCTION_RESERVE_0X002E                  0x002E
+#define URB_FUNCTION_RESERVE_0X002F                  0x002F
+// USB 2.0 calls start at 0x0030
+#define URB_FUNCTION_SYNC_RESET_PIPE                 0x0030
+#define URB_FUNCTION_SYNC_CLEAR_STALL                0x0031
+#define URB_FUNCTION_CONTROL_TRANSFER_EX             0x0032
+
+#define USBD_PF_CHANGE_MAX_PACKET		0x00000001
+
+#define USBD_TRANSFER_DIRECTION_OUT		0
+#define USBD_TRANSFER_DIRECTION_IN		1
+
+#define USBD_SHORT_TRANSFER_OK			0x00000002
+#define USBD_START_ISO_TRANSFER_ASAP		0x00000004
+#define USBD_DEFAULT_PIPE_TRANSFER		0x00000008
+
+#define USBD_TRANSFER_DIRECTION(flags)		\
+	((flags) & USBD_TRANSFER_DIRECTION_IN)
+
+enum pipe_type {UsbdPipeTypeControl = USB_ENDPOINT_XFER_CONTROL,
+		UsbdPipeTypeIsochronous = USB_ENDPOINT_XFER_ISOC,
+		UsbdPipeTypeBulk = USB_ENDPOINT_XFER_BULK,
+		UsbdPipeTypeInterrupt = USB_ENDPOINT_XFER_INT};
+
+#define USBD_IS_BULK_PIPE(pipe_handle)					\
+	(((pipe_handle)->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK)	\
+	 == USB_ENDPOINT_XFER_BULK)
+
+#define USBD_IS_INT_PIPE(pipe_handle)					\
+	(((pipe_handle)->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK)	\
+	 == USB_ENDPOINT_XFER_INT)
+
+#define USBD_PORT_ENABLED			0x00000001
+#define USBD_PORT_CONNECTED			0x00000002
+
+typedef LONG USBD_STATUS;
+
+#define USBD_STATUS_SUCCESS			0x0
+#define USBD_STATUS_PENDING			0x40000000
+#define USBD_STATUS_CANCELED			0x00010000
+
+#define USBD_STATUS_CRC				0xC0000001
+#define USBD_STATUS_BTSTUFF			0xC0000002
+#define USBD_STATUS_DATA_TOGGLE_MISMATCH	0xC0000003
+#define USBD_STATUS_STALL_PID			0xC0000004
+#define USBD_STATUS_DEV_NOT_RESPONDING		0xC0000005
+#define USBD_STATUS_PID_CHECK_FAILURE		0xC0000006
+#define USBD_STATUS_UNEXPECTED_PID	     	0xC0000007
+#define USBD_STATUS_DATA_OVERRUN		0xC0000008
+#define USBD_STATUS_DATA_UNDERRUN		0xC0000009
+#define USBD_STATUS_RESERVED1			0xC000000A
+#define USBD_STATUS_RESERVED2			0xC000000B
+#define USBD_STATUS_BUFFER_OVERRUN		0xC000000C
+#define USBD_STATUS_BUFFER_UNDERRUN		0xC000000D
+#define USBD_STATUS_NOT_ACCESSED		0xC000000F
+#define USBD_STATUS_FIFO			0xC0000010
+#define USBD_STATUS_XACT_ERROR			0xC0000011
+#define USBD_STATUS_BABBLE_DETECTED		0xC0000012
+#define USBD_STATUS_DATA_BUFFER_ERROR		0xC0000013
+
+#define USBD_STATUS_NOT_SUPPORTED		0xC0000E00
+#define USBD_STATUS_BUFFER_TOO_SMALL		0xC0003000
+#define USBD_STATUS_TIMEOUT			0xC0006000
+#define USBD_STATUS_DEVICE_GONE			0xC0007000
+
+#define USBD_STATUS_NO_MEMORY			0x80000100
+#define USBD_STATUS_INVALID_URB_FUNCTION	0x80000200
+#define USBD_STATUS_INVALID_PARAMETER		0x80000300
+#define USBD_STATUS_REQUEST_FAILED		0x80000500
+#define USBD_STATUS_INVALID_PIPE_HANDLE		0x80000600
+#define USBD_STATUS_ERROR_SHORT_TRANSFER	0x80000900
+
+#define USBD_DEFAULT_MAXIMUM_TRANSFER_SIZE	PAGE_SIZE
+
+struct urb_hcd_area {
+	void *reserved8[8];
+};
+
+typedef struct usb_endpoint_descriptor *usbd_pipe_handle;
+typedef struct usb_descriptor_header usb_common_descriptor_t;
+
+struct usbd_pipe_information {
+	USHORT wMaxPacketSize;
+	UCHAR bEndpointAddress;
+	UCHAR bInterval;
+	enum pipe_type type;
+	usbd_pipe_handle handle;
+	ULONG max_tx_size;
+	ULONG flags;
+};
+
+struct usbd_interface_information {
+	USHORT bLength;
+	UCHAR bInterfaceNumber;
+	UCHAR bAlternateSetting;
+	UCHAR bInterfaceClass;
+	UCHAR bInterfaceSubClass;
+	UCHAR bInterfaceProtocol;
+	UCHAR reserved;
+	void *handle;
+	ULONG bNumEndpoints;
+	struct usbd_pipe_information pipes[1];
+};
+
+struct usbd_interface_list_entry {
+	struct usb_interface_descriptor *intf_desc;
+	struct usbd_interface_information *intf;
+};
+
+struct nt_urb_header {
+	USHORT length;
+	USHORT function;
+	USBD_STATUS status;
+	void *usbd_dev_handle;
+	ULONG usbd_flags;
+};
+
+struct usbd_select_interface {
+	struct nt_urb_header header;
+	void *handle;
+	struct usbd_interface_information intf;
+};
+
+struct usbd_select_configuration {
+	struct nt_urb_header header;
+	struct usb_config_descriptor *config;
+	void *handle;
+	struct usbd_interface_information intf;
+};
+
+struct usbd_control_descriptor_request {
+	struct nt_urb_header header;
+	void *reserved;
+	ULONG reserved0;
+	ULONG transfer_buffer_length;
+	void *transfer_buffer;
+	struct mdl *mdl;
+	union nt_urb *urb_link;
+	struct urb_hcd_area hca;
+	USHORT reserved1;
+	UCHAR index;
+	UCHAR desc_type;
+	USHORT language_id;
+	USHORT reserved2;
+};
+
+struct usbd_bulk_or_intr_transfer {
+	struct nt_urb_header header;
+	usbd_pipe_handle pipe_handle;
+	ULONG transfer_flags;
+	ULONG transfer_buffer_length;
+	void *transfer_buffer;
+	struct mdl *mdl;
+	union nt_urb *urb_link;
+	struct urb_hcd_area hca;
+};
+
+struct usbd_pipe_request {
+	struct nt_urb_header header;
+	usbd_pipe_handle pipe_handle;
+};
+
+struct usbd_vendor_or_class_request {
+	struct nt_urb_header header;
+	void *reserved;
+	ULONG transfer_flags;
+	ULONG transfer_buffer_length;
+	void *transfer_buffer;
+	struct mdl *mdl;
+	union nt_urb *link;
+	struct urb_hcd_area hca;
+	UCHAR reserved_bits;
+	UCHAR request;
+	USHORT value;
+	USHORT index;
+	USHORT reserved1;
+};
+
+struct urb_control_feature_request {
+	struct nt_urb_header header;
+	void *reserved;
+	ULONG reserved2;
+	ULONG reserved3;
+	void *reserved4;
+	struct mdl *reserved5;
+	union nt_urb *link;
+	struct urb_hcd_area hca;
+	USHORT reserved0;
+	USHORT feature_selector;
+	USHORT index;
+	USHORT reserved1;
+};
+
+struct urb_control_get_status_request {
+	struct nt_urb_header header;
+	void *reserved;
+	ULONG reserved0;
+	ULONG transfer_buffer_length;
+	void *transfer_buffer;
+	struct mdl *mdl;
+	union nt_urb *link;
+	struct urb_hcd_area hca;
+	UCHAR reserved1[4];
+	USHORT index;
+	USHORT reserved2;
+};
+
+struct usbd_iso_packet_desc {
+	ULONG offset;
+	ULONG length;
+	USBD_STATUS status;
+};
+
+struct usbd_isochronous_transfer {
+	struct nt_urb_header header;
+	usbd_pipe_handle pipe_handle;
+	ULONG transfer_flags;
+	ULONG transfer_buffer_length;
+	void *transfer_buffer;
+	struct mdl *mdl;
+	union nt_urb *urb_link;
+	struct urb_hcd_area hca;
+	ULONG start_frame;
+	ULONG number_of_packets;
+	ULONG error_count;
+	struct usbd_iso_packet_desc iso_packet[1];
+};
+
+union nt_urb {
+	struct nt_urb_header header;
+	struct usbd_select_interface select_intf;
+	struct usbd_select_configuration select_conf;
+	struct usbd_bulk_or_intr_transfer bulk_int_transfer;
+	struct usbd_control_descriptor_request control_desc;
+	struct usbd_vendor_or_class_request vendor_class_request;
+	struct usbd_isochronous_transfer isochronous;
+	struct usbd_pipe_request pipe_req;
+	struct urb_control_feature_request feat_req;
+	struct urb_control_get_status_request status_req;
+};
+
+struct usbd_bus_interface_usbdi {
+	USHORT Size;
+	USHORT Version;
+	void *Context;
+	void *InterfaceReference;
+	void *InterfaceDereference;
+	void *GetUSBDIVersion;
+	void *QueryBusTime;
+	void *SubmitIsoOutUrb;
+	void *QueryBusInformation;
+	/* version 1 and above have following field */
+	void *IsDeviceHighSpeed;
+	/* version 2 (and above) have following field */
+	void *LogEntry;
+};
+
+struct usbd_bus_information_level {
+	ULONG TotalBandwidth;
+	ULONG ConsumedBandwidth;
+	/* level 1 and above have following fields */
+	ULONG ControllerNameLength;
+	wchar_t ControllerName[1];
+};
+
+#define USBDI_VERSION_XP			0x00000500 // Windows XP
+#define USB_HCD_CAPS_SUPPORTS_RT_THREADS	0x00000001
+#define USB_BUSIF_USBDI_VERSION_0		0x0000
+#define USB_BUSIF_USBDI_VERSION_1		0x0001
+#define USB_BUSIF_USBDI_VERSION_2		0x0002
+
+struct usbd_version_info {
+	ULONG usbdi_version;
+	ULONG supported_usb_version;
+};
+
+struct usbd_idle_callback {
+	void *callback;
+	void *context;
+};
+
+#define NT_URB_STATUS(nt_urb) ((nt_urb)->header.status)
+
+NTSTATUS wrap_submit_irp(struct device_object *pdo, struct irp *irp);
+void wrap_suspend_urbs(struct wrap_device *wd);
+void wrap_resume_urbs(struct wrap_device *wd);
+
+void USBD_InterfaceGetUSBDIVersion(void *context,
+				   struct usbd_version_info *version_info,
+				   ULONG *hcd_capa) wstdcall;
+BOOLEAN USBD_InterfaceIsDeviceHighSpeed(void *context) wstdcall;
+void USBD_InterfaceReference(void *context) wstdcall;
+void USBD_InterfaceDereference(void *context) wstdcall;
+NTSTATUS USBD_InterfaceQueryBusTime(void *context, ULONG *frame) wstdcall;
+NTSTATUS USBD_InterfaceSubmitIsoOutUrb(void *context,
+				       union nt_urb *nt_urb) wstdcall;
+NTSTATUS USBD_InterfaceQueryBusInformation(void *context, ULONG level, void *buf,
+					   ULONG *buf_length,
+					   ULONG *buf_actual_length) wstdcall;
+NTSTATUS USBD_InterfaceLogEntry(void *context, ULONG driver_tag, ULONG enum_tag,
+				ULONG p1, ULONG p2) wstdcall;
+
+#endif /* USB_H */
--- linux-mvl-dove-2.6.32.orig/ubuntu/ndiswrapper/winnt_types.h
+++ linux-mvl-dove-2.6.32/ubuntu/ndiswrapper/winnt_types.h
@@ -0,0 +1,1702 @@
+/*
+ *  Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *  GNU General Public License for more details.
+ *
+ */
+
+#ifndef _WINNT_TYPES_H_
+#define _WINNT_TYPES_H_
+
+#define TRUE				1
+#define FALSE				0
+
+#define PASSIVE_LEVEL			0
+#define APC_LEVEL			1
+#define DISPATCH_LEVEL			2
+#define DEVICE_LEVEL_BASE		4
+
+/* soft interrupts / bottom-half's are disabled at SOFT_IRQL */
+#define SOFT_IRQL			(DEVICE_LEVEL_BASE + 1)
+#define DIRQL				(DEVICE_LEVEL_BASE + 2)
+
+#define STATUS_WAIT_0			0
+#define STATUS_SUCCESS                  0
+#define STATUS_ALERTED                  0x00000101
+#define STATUS_TIMEOUT                  0x00000102
+#define STATUS_PENDING                  0x00000103
+#define STATUS_FAILURE                  0xC0000001
+#define STATUS_NOT_IMPLEMENTED		0xC0000002
+#define STATUS_INVALID_PARAMETER        0xC000000D
+#define STATUS_INVALID_DEVICE_REQUEST	0xC0000010
+#define STATUS_MORE_PROCESSING_REQUIRED 0xC0000016
+#define STATUS_ACCESS_DENIED            0xC0000022
+#define STATUS_BUFFER_TOO_SMALL         0xC0000023
+#define STATUS_OBJECT_NAME_INVALID      0xC0000023
+#define STATUS_MUTANT_NOT_OWNED		0xC0000046
+#define STATUS_RESOURCES                0xC000009A
+#define STATUS_DELETE_PENDING		0xC0000056
+#define STATUS_INSUFFICIENT_RESOURCES	0xC000009A
+#define STATUS_NOT_SUPPORTED            0xC00000BB
+#define STATUS_INVALID_PARAMETER_2      0xC00000F0
+#define STATUS_NO_MEMORY		0xC0000017
+#define STATUS_CANCELLED                0xC0000120
+#define STATUS_DEVICE_REMOVED		0xC00002B6
+#define STATUS_DEVICE_NOT_CONNECTED	0xC000009D
+
+#define STATUS_BUFFER_OVERFLOW		0x80000005
+
+#define SL_PENDING_RETURNED		0x01
+#define SL_INVOKE_ON_CANCEL		0x20
+#define SL_INVOKE_ON_SUCCESS		0x40
+#define SL_INVOKE_ON_ERROR		0x80
+
+#define IRP_MJ_CREATE			0x00
+#define IRP_MJ_CREATE_NAMED_PIPE	0x01
+#define IRP_MJ_CLOSE			0x02
+#define IRP_MJ_READ			0x03
+#define IRP_MJ_WRITE			0x04
+
+#define IRP_MJ_DEVICE_CONTROL		0x0E
+#define IRP_MJ_INTERNAL_DEVICE_CONTROL	0x0F
+#define IRP_MJ_POWER			0x16
+#define IRP_MJ_SYSTEM_CONTROL		0x0E
+#define IRP_MJ_PNP			0x1b
+#define IRP_MJ_MAXIMUM_FUNCTION		0x1b
+
+#define IRP_MN_WAIT_WAKE		0x00
+#define IRP_MN_POWER_SEQUENCE		0x01
+#define IRP_MN_SET_POWER		0x02
+#define IRP_MN_QUERY_POWER		0x03
+
+#define IRP_MN_REGINFO			0x08
+#define IRP_MN_REGINFO_EX		0x0b
+
+#define IRP_MN_START_DEVICE		0x00
+#define IRP_MN_QUERY_REMOVE_DEVICE	0x01
+#define IRP_MN_REMOVE_DEVICE		0x02
+#define IRP_MN_CANCEL_REMOVE_DEVICE	0x03
+#define IRP_MN_STOP_DEVICE		0x04
+#define IRP_MN_QUERY_STOP_DEVICE	0x05
+#define IRP_MN_CANCEL_STOP_DEVICE	0x06
+#define IRP_MN_QUERY_DEVICE_RELATIONS	0x07
+#define IRP_MN_QUERY_INTERFACE		0x08
+
+#define IRP_BUFFERED_IO			0x00000010
+#define IRP_DEALLOCATE_BUFFER		0x00000020
+#define IRP_INPUT_OPERATION		0x00000040
+
+#define IRP_DEFFER_IO_COMPLETION	0x00000800
+
+#define THREAD_WAIT_OBJECTS		3
+#define MAX_WAIT_OBJECTS		64
+
+#define LOW_PRIORITY			0
+#define LOW_REALTIME_PRIORITY		16
+#define HIGH_PRIORITY			31
+#define MAXIMUM_PRIORITY		32
+
+#define PROCESSOR_FEATURE_MAX		64
+
+#define IO_NO_INCREMENT			0
+
+#define WMIREG_ACTION_REGISTER		1
+#define WMIREG_ACTION_DEREGISTER	2
+#define WMIREG_ACTION_REREGISTER	3
+#define WMIREG_ACTION_UPDATE_GUIDS	4
+
+#define WMIREGISTER			0
+#define WMIUPDATE			1
+
+#ifdef CONFIG_X86_64
+#define wstdcall
+#define wfastcall
+#define noregparm
+
+#define KI_USER_SHARED_DATA 0xfffff78000000000UL
+
+#else
+
+#define noregparm __attribute__((regparm(0)))
+#define wstdcall __attribute__((__stdcall__, regparm(0)))
+#if defined(__GNUC__) && ((__GNUC__ == 3 && __GNUC_MINOR__ > 3) || __GNUC__ > 3)
+#undef fastcall
+#define wfastcall __attribute__((fastcall))
+#else
+#error "gcc 3.4 or newer should be used for compiling this module"
+#endif
+
+#define KI_USER_SHARED_DATA 0xffdf0000
+
+#endif
+
+#define packed __attribute__((packed))
+#define no_warn_unused __attribute__((unused))
+
+typedef u8	BOOLEAN;
+typedef u8	BYTE;
+typedef u8	*LPBYTE;
+typedef s8	CHAR;
+typedef u8	UCHAR;
+typedef s16	SHORT;
+typedef u16	USHORT;
+typedef u16	WORD;
+typedef s32	INT;
+typedef u32	UINT;
+typedef u32	DWORD;
+typedef s32	LONG;
+typedef u32	ULONG;
+typedef s64	LONGLONG;
+typedef u64	ULONGLONG;
+typedef u64	ULONGULONG;
+typedef u64	ULONG64;
+
+typedef CHAR CCHAR;
+typedef USHORT wchar_t;
+typedef SHORT CSHORT;
+typedef LONGLONG LARGE_INTEGER;
+
+typedef LONG NTSTATUS;
+
+typedef LONG KPRIORITY;
+typedef LARGE_INTEGER PHYSICAL_ADDRESS;
+typedef UCHAR KIRQL;
+typedef CHAR KPROCESSOR_MODE;
+
+/* ULONG_PTR is 32 bits on 32-bit platforms and 64 bits on 64-bit
+ * platform, which is same as 'unsigned long' in Linux */
+typedef unsigned long ULONG_PTR;
+
+typedef ULONG_PTR SIZE_T;
+typedef ULONG_PTR KAFFINITY;
+typedef ULONG ACCESS_MASK;
+
+typedef ULONG_PTR PFN_NUMBER;
+typedef ULONG SECURITY_INFORMATION;
+
+/* non-negative numbers indicate success */
+#define NT_SUCCESS(status)  ((NTSTATUS)(status) >= 0)
+
+struct ansi_string {
+	USHORT length;
+	USHORT max_length;
+	char *buf;
+};
+
+struct unicode_string {
+	USHORT length;
+	USHORT max_length;
+	wchar_t *buf;
+};
+
+struct nt_slist {
+	struct nt_slist *next;
+};
+
+#ifdef CONFIG_X86_64
+/* it is not clear how nt_slist_head is used to store pointer to
+ * slists and depth; here we assume 'align' field is used to store
+ * depth and 'region' field is used to store slist pointers */
+struct nt_slist_head {
+	union {
+		USHORT depth;
+		ULONGLONG align;
+	};
+	union {
+		ULONGLONG region;
+		struct nt_slist *next;
+	};
+} __attribute__((aligned(16)));
+typedef struct nt_slist_head nt_slist_header;
+#else
+union nt_slist_head {
+	ULONGLONG align;
+	struct {
+		struct nt_slist *next;
+		USHORT depth;
+		USHORT sequence;
+	};
+};
+typedef union nt_slist_head nt_slist_header;
+#endif
+
+struct nt_list {
+	struct nt_list *next;
+	struct nt_list *prev;
+};
+
+typedef ULONG_PTR NT_SPIN_LOCK;
+
+enum kdpc_importance {LowImportance, MediumImportance, HighImportance};
+
+struct kdpc;
+typedef void (*DPC)(struct kdpc *kdpc, void *ctx, void *arg1,
+		    void *arg2) wstdcall;
+struct kdpc {
+	SHORT type;
+	UCHAR nr_cpu;
+	UCHAR importance;
+	struct nt_list list;
+	DPC func;
+	void *ctx;
+	void *arg1;
+	void *arg2;
+	union {
+		NT_SPIN_LOCK *lock;
+		/* 'lock' is not used; 'queued' represents whether
+		 * kdpc is queued or not */
+		int queued;
+	};
+};
+
+enum pool_type {
+	NonPagedPool, PagedPool, NonPagedPoolMustSucceed, DontUseThisType,
+	NonPagedPoolCacheAligned, PagedPoolCacheAligned,
+	NonPagedPoolCacheAlignedMustS, MaxPoolType,
+	NonPagedPoolSession = 32,
+	PagedPoolSession = NonPagedPoolSession + 1,
+	NonPagedPoolMustSucceedSession = PagedPoolSession + 1,
+	DontUseThisTypeSession = NonPagedPoolMustSucceedSession + 1,
+	NonPagedPoolCacheAlignedSession = DontUseThisTypeSession + 1,
+	PagedPoolCacheAlignedSession = NonPagedPoolCacheAlignedSession + 1,
+	NonPagedPoolCacheAlignedMustSSession = PagedPoolCacheAlignedSession + 1
+};
+
+enum memory_caching_type_orig {
+	MmFrameBufferCached = 2
+};
+
+enum memory_caching_type {
+	MmNonCached = FALSE, MmCached = TRUE,
+	MmWriteCombined = MmFrameBufferCached, MmHardwareCoherentCached,
+	MmNonCachedUnordered, MmUSWCCached, MmMaximumCacheType
+};
+
+enum lock_operation {
+	IoReadAccess, IoWriteAccess, IoModifyAccess
+};
+
+enum mode {
+	KernelMode, UserMode, MaximumMode
+};
+
+struct mdl {
+	struct mdl *next;
+	CSHORT size;
+	CSHORT flags;
+	/* NdisFreeBuffer doesn't pass pool, so we store pool in
+	 * unused field 'process' */
+	union {
+		void *process;
+		void *pool;
+	};
+	void *mappedsystemva;
+	void *startva;
+	ULONG bytecount;
+	ULONG byteoffset;
+};
+
+#define MDL_MAPPED_TO_SYSTEM_VA		0x0001
+#define MDL_PAGES_LOCKED		0x0002
+#define MDL_SOURCE_IS_NONPAGED_POOL	0x0004
+#define MDL_ALLOCATED_FIXED_SIZE	0x0008
+#define MDL_PARTIAL			0x0010
+#define MDL_PARTIAL_HAS_BEEN_MAPPED	0x0020
+#define MDL_IO_PAGE_READ		0x0040
+#define MDL_WRITE_OPERATION		0x0080
+#define MDL_PARENT_MAPPED_SYSTEM_VA	0x0100
+#define MDL_FREE_EXTRA_PTES		0x0200
+#define MDL_IO_SPACE			0x0800
+#define MDL_NETWORK_HEADER		0x1000
+#define MDL_MAPPING_CAN_FAIL		0x2000
+#define MDL_ALLOCATED_MUST_SUCCEED	0x4000
+
+#define MDL_POOL_ALLOCATED		0x0400
+#define MDL_CACHE_ALLOCATED		0x8000
+
+#define PAGE_START(ptr) ((void *)((ULONG_PTR)(ptr) & ~(PAGE_SIZE - 1)))
+#define BYTE_OFFSET(ptr) ((ULONG)((ULONG_PTR)(ptr) & (PAGE_SIZE - 1)))
+
+#define MmGetMdlByteCount(mdl) ((mdl)->bytecount)
+#define MmGetMdlVirtualAddress(mdl) ((mdl)->startva + (mdl)->byteoffset)
+#define MmGetMdlByteOffset(mdl) ((mdl)->byteoffset)
+#define MmGetSystemAddressForMdl(mdl) ((mdl)->mappedsystemva)
+#define MmGetSystemAddressForMdlSafe(mdl, priority) ((mdl)->mappedsystemva)
+#define MmGetMdlPfnArray(mdl) ((PFN_NUMBER *)(mdl + 1))
+#define MmInitializeMdl(mdl, baseva, length)				\
+do {									\
+	(mdl)->next = NULL;						\
+	(mdl)->size = MmSizeOfMdl(baseva, length);			\
+	(mdl)->flags = 0;						\
+	(mdl)->startva = PAGE_START(baseva);				\
+	(mdl)->byteoffset = BYTE_OFFSET(baseva);			\
+	(mdl)->bytecount = length;					\
+	(mdl)->mappedsystemva = baseva;					\
+	TRACE4("%p %p %p %d %d", (mdl), baseva, (mdl)->startva,	\
+		  (mdl)->byteoffset, length);				\
+} while (0)
+
+struct kdevice_queue_entry {
+	struct nt_list list;
+	ULONG sort_key;
+	BOOLEAN inserted;
+};
+
+struct kdevice_queue {
+	USHORT type;
+	USHORT size;
+	struct nt_list list;
+	NT_SPIN_LOCK lock;
+	BOOLEAN busy;
+};
+
+struct wait_context_block {
+	struct kdevice_queue_entry wait_queue_entry;
+	void *device_routine;
+	void *device_context;
+	ULONG num_regs;
+	void *device_object;
+	void *current_irp;
+	void *buffer_chaining_dpc;
+};
+
+struct wait_block {
+	struct nt_list list;
+	struct task_struct *thread;
+	void *object;
+	int *wait_done;
+	USHORT wait_key;
+	USHORT wait_type;
+};
+
+struct dispatcher_header {
+	UCHAR type;
+	UCHAR absolute;
+	UCHAR size;
+	UCHAR inserted;
+	LONG signal_state;
+	struct nt_list wait_blocks;
+};
+
+enum event_type {
+	NotificationEvent,
+	SynchronizationEvent,
+};
+
+enum timer_type {
+	NotificationTimer = NotificationEvent,
+	SynchronizationTimer = SynchronizationEvent,
+};
+
+enum dh_type {
+	NotificationObject = NotificationEvent,
+	SynchronizationObject = SynchronizationEvent,
+	MutexObject,
+	SemaphoreObject,
+	ThreadObject,
+};
+
+enum wait_type {
+	WaitAll, WaitAny
+};
+
+/* objects that use dispatcher_header have it as the first field, so
+ * whenever we need to initialize dispatcher_header, we can convert
+ * that object into a nt_event and access dispatcher_header */
+struct nt_event {
+	struct dispatcher_header dh;
+};
+
+struct wrap_timer;
+
+#define WRAP_TIMER_MAGIC 47697249
+
+struct nt_timer {
+	struct dispatcher_header dh;
+	/* We can't fit Linux timer in this structure. Instead of
+	 * padding the nt_timer structure, we replace due_time field
+	 * with *wrap_timer and allocate memory for it when nt_timer is
+	 * initialized */
+	union {
+		ULONGLONG due_time;
+		struct wrap_timer *wrap_timer;
+	};
+	struct nt_list nt_timer_list;
+	struct kdpc *kdpc;
+	union {
+		LONG period;
+		LONG wrap_timer_magic;
+	};
+};
+
+struct nt_mutex {
+	struct dispatcher_header dh;
+	struct nt_list list;
+	struct task_struct *owner_thread;
+	BOOLEAN abandoned;
+	BOOLEAN apc_disable;
+};
+
+struct nt_semaphore {
+	struct dispatcher_header dh;
+	LONG limit;
+};
+
+struct nt_thread {
+	struct dispatcher_header dh;
+	/* the rest in Windows is a long structure; since this
+	 * structure is opaque to drivers, we just define what we
+	 * need */
+	int pid;
+	NTSTATUS status;
+	struct task_struct *task;
+	struct nt_list irps;
+	NT_SPIN_LOCK lock;
+	KPRIORITY prio;
+};
+
+#define set_object_type(dh, type)	((dh)->type = (type))
+#define is_notify_object(dh)		((dh)->type == NotificationObject)
+#define is_synch_object(dh)		((dh)->type == SynchronizationObject)
+#define is_mutex_object(dh)		((dh)->type == MutexObject)
+#define is_semaphore_object(dh)		((dh)->type == SemaphoreObject)
+#define is_nt_thread_object(dh)		((dh)->type == ThreadObject)
+
+#define IO_TYPE_ADAPTER				1
+#define IO_TYPE_CONTROLLER			2
+#define IO_TYPE_DEVICE				3
+#define IO_TYPE_DRIVER				4
+#define IO_TYPE_FILE				5
+#define IO_TYPE_IRP				6
+#define IO_TYPE_DEVICE_OBJECT_EXTENSION		13
+
+struct irp;
+struct dev_obj_ext;
+struct driver_object;
+
+struct device_object {
+	CSHORT type;
+	USHORT size;
+	LONG ref_count;
+	struct driver_object *drv_obj;
+	struct device_object *next;
+	struct device_object *attached;
+	struct irp *current_irp;
+	void *io_timer;
+	ULONG flags;
+	ULONG characteristics;
+	void *vpb;
+	void *dev_ext;
+	CCHAR stack_count;
+	union {
+		struct nt_list queue_list;
+		struct wait_context_block wcb;
+	} queue;
+	ULONG align_req;
+	struct kdevice_queue dev_queue;
+	struct kdpc dpc;
+	ULONG active_threads;
+	void *security_desc;
+	struct nt_event lock;
+	USHORT sector_size;
+	USHORT spare1;
+	struct dev_obj_ext *dev_obj_ext;
+	void *reserved;
+};
+
+struct dev_obj_ext {
+	CSHORT type;
+	CSHORT size;
+	struct device_object *dev_obj;
+	struct device_object *attached_to;
+};
+
+struct io_status_block {
+	union {
+		NTSTATUS status;
+		void *pointer;
+	};
+	ULONG_PTR info;
+};
+
+#ifdef CONFIG_X86_64
+struct io_status_block32 {
+	NTSTATUS status;
+	ULONG info;
+};
+#endif
+
+#define DEVICE_TYPE ULONG
+
+struct driver_extension;
+
+typedef NTSTATUS driver_dispatch_t(struct device_object *dev_obj,
+				   struct irp *irp) wstdcall;
+
+struct driver_object {
+	CSHORT type;
+	CSHORT size;
+	struct device_object *dev_obj;
+	ULONG flags;
+	void *start;
+	ULONG driver_size;
+	void *section;
+	struct driver_extension *drv_ext;
+	struct unicode_string name;
+	struct unicode_string *hardware_database;
+	void *fast_io_dispatch;
+	void *init;
+	void *start_io;
+	void (*unload)(struct driver_object *driver) wstdcall;
+	driver_dispatch_t *major_func[IRP_MJ_MAXIMUM_FUNCTION + 1];
+};
+
+struct driver_extension {
+	struct driver_object *drv_obj;
+	NTSTATUS (*add_device)(struct driver_object *drv_obj,
+			       struct device_object *dev_obj) wstdcall;
+	ULONG count;
+	struct unicode_string service_key_name;
+	struct nt_list custom_ext;
+};
+
+struct custom_ext {
+	struct nt_list list;
+	void *client_id;
+};
+
+struct wrap_bin_file;
+
+struct file_object {
+	CSHORT type;
+	CSHORT size;
+	struct device_object *dev_obj;
+	void *volume_parameter_block;
+	void *fs_context;
+	void *fs_context2;
+	void *section_object_pointer;
+	void *private_cache_map;
+	NTSTATUS final_status;
+	union {
+		struct file_object *related_file_object;
+		struct wrap_bin_file *wrap_bin_file;
+	};
+	BOOLEAN lock_operation;
+	BOOLEAN delete_pending;
+	BOOLEAN read_access;
+	BOOLEAN write_access;
+	BOOLEAN delete_access;
+	BOOLEAN shared_read;
+	BOOLEAN shared_write;
+	BOOLEAN shared_delete;
+	ULONG flags;
+	struct unicode_string _name_;
+	LARGE_INTEGER current_byte_offset;
+	ULONG waiters;
+	ULONG busy;
+	void *last_lock;
+	struct nt_event lock;
+	struct nt_event event;
+	void *completion_context;
+};
+
+#ifdef CONFIG_X86_64
+#define POINTER_ALIGN __attribute__((aligned(8)))
+#else
+#define POINTER_ALIGN
+#endif
+
+#define CACHE_ALIGN __attribute__((aligned(128)))
+
+enum system_power_state {
+	PowerSystemUnspecified = 0,
+	PowerSystemWorking, PowerSystemSleeping1, PowerSystemSleeping2,
+	PowerSystemSleeping3, PowerSystemHibernate, PowerSystemShutdown,
+	PowerSystemMaximum,
+};
+
+enum device_power_state {
+	PowerDeviceUnspecified = 0,
+	PowerDeviceD0, PowerDeviceD1, PowerDeviceD2, PowerDeviceD3,
+	PowerDeviceMaximum,
+};
+
+union power_state {
+	enum system_power_state system_state;
+	enum device_power_state device_state;
+};
+
+enum power_state_type {
+	SystemPowerState = 0, DevicePowerState,
+};
+
+enum power_action {
+	PowerActionNone = 0,
+	PowerActionReserved, PowerActionSleep, PowerActionHibernate,
+	PowerActionShutdown, PowerActionShutdownReset, PowerActionShutdownOff,
+	PowerActionWarmEject,
+};
+
+struct guid {
+	ULONG data1;
+	USHORT data2;
+	USHORT data3;
+	UCHAR data4[8];
+};
+
+struct nt_interface {
+	USHORT size;
+	USHORT version;
+	void *context;
+	void (*reference)(void *context) wstdcall;
+	void (*dereference)(void *context) wstdcall;
+};
+
+enum interface_type {
+	InterfaceTypeUndefined = -1, Internal, Isa, Eisa, MicroChannel,
+	TurboChannel, PCIBus, VMEBus, NuBus, PCMCIABus, CBus, MPIBus,
+	MPSABus, ProcessorInternal, InternalPowerBus, PNPISABus,
+	PNPBus, MaximumInterfaceType,
+};
+
+#define CmResourceTypeNull		0
+#define CmResourceTypePort		1
+#define CmResourceTypeInterrupt		2
+#define CmResourceTypeMemory		3
+#define CmResourceTypeDma		4
+#define CmResourceTypeDeviceSpecific	5
+#define CmResourceTypeBusNumber		6
+#define CmResourceTypeMaximum		7
+
+#define CmResourceTypeNonArbitrated	128
+#define CmResourceTypeConfigData	128
+#define CmResourceTypeDevicePrivate	129
+#define CmResourceTypePcCardConfig	130
+#define CmResourceTypeMfCardConfig	131
+
+enum cm_share_disposition {
+	CmResourceShareUndetermined = 0, CmResourceShareDeviceExclusive,
+	CmResourceShareDriverExclusive, CmResourceShareShared
+};
+
+#define CM_RESOURCE_INTERRUPT_LEVEL_SENSITIVE	0
+#define CM_RESOURCE_INTERRUPT_LATCHED		1
+#define CM_RESOURCE_MEMORY_READ_WRITE		0x0000
+#define CM_RESOURCE_MEMORY_READ_ONLY		0x0001
+#define CM_RESOURCE_MEMORY_WRITE_ONLY		0x0002
+#define CM_RESOURCE_MEMORY_PREFETCHABLE		0x0004
+
+#define CM_RESOURCE_MEMORY_COMBINEDWRITE	0x0008
+#define CM_RESOURCE_MEMORY_24			0x0010
+#define CM_RESOURCE_MEMORY_CACHEABLE		0x0020
+
+#define CM_RESOURCE_PORT_MEMORY			0x0000
+#define CM_RESOURCE_PORT_IO			0x0001
+#define CM_RESOURCE_PORT_10_BIT_DECODE		0x0004
+#define CM_RESOURCE_PORT_12_BIT_DECODE		0x0008
+#define CM_RESOURCE_PORT_16_BIT_DECODE		0x0010
+#define CM_RESOURCE_PORT_POSITIVE_DECODE	0x0020
+#define CM_RESOURCE_PORT_PASSIVE_DECODE		0x0040
+#define CM_RESOURCE_PORT_WINDOW_DECODE		0x0080
+
+#define CM_RESOURCE_DMA_8			0x0000
+#define CM_RESOURCE_DMA_16			0x0001
+#define CM_RESOURCE_DMA_32			0x0002
+#define CM_RESOURCE_DMA_8_AND_16		0x0004
+#define CM_RESOURCE_DMA_BUS_MASTER		0x0008
+#define CM_RESOURCE_DMA_TYPE_A			0x0010
+#define CM_RESOURCE_DMA_TYPE_B			0x0020
+#define CM_RESOURCE_DMA_TYPE_F			0x0040
+
+#define MAX_RESOURCES 20
+
+#pragma pack(push,4)
+struct cm_partial_resource_descriptor {
+	UCHAR type;
+	UCHAR share;
+	USHORT flags;
+	union {
+		struct {
+			PHYSICAL_ADDRESS start;
+			ULONG length;
+		} generic;
+		struct {
+			PHYSICAL_ADDRESS start;
+			ULONG length;
+		} port;
+		struct {
+			ULONG level;
+			ULONG vector;
+			KAFFINITY affinity;
+		} interrupt;
+		struct {
+			PHYSICAL_ADDRESS start;
+			ULONG length;
+		} memory;
+		struct {
+			ULONG channel;
+			ULONG port;
+			ULONG reserved1;
+		} dma;
+		struct {
+			ULONG data[3];
+		} device_private;
+		struct {
+			ULONG start;
+			ULONG length;
+			ULONG reserved;
+		} bus_number;
+		struct {
+			ULONG data_size;
+			ULONG reserved1;
+			ULONG reserved2;
+		} device_specific_data;
+	} u;
+};
+#pragma pack(pop)
+
+struct cm_partial_resource_list {
+	USHORT version;
+	USHORT revision;
+	ULONG count;
+	struct cm_partial_resource_descriptor partial_descriptors[1];
+};
+
+struct cm_full_resource_descriptor {
+	enum interface_type interface_type;
+	ULONG bus_number;
+	struct cm_partial_resource_list partial_resource_list;
+};
+
+struct cm_resource_list {
+	ULONG count;
+	struct cm_full_resource_descriptor list[1];
+};
+
+enum file_info_class {
+	FileDirectoryInformation = 1,
+	FileBasicInformation = 4,
+	FileStandardInformation = 5,
+	FileNameInformation = 9,
+	FilePositionInformation = 14,
+	FileAlignmentInformation = 17,
+	FileNetworkOpenInformation = 34,
+	FileAttributeTagInformation = 35,
+	FileMaximumInformation = 41,
+};
+
+enum fs_info_class {
+	FileFsVolumeInformation = 1,
+	/* ... */
+	FileFsMaximumInformation = 9,
+};
+
+enum device_relation_type {
+	BusRelations, EjectionRelations, PowerRelations, RemovalRelations,
+	TargetDeviceRelation, SingleBusRelations,
+};
+
+enum bus_query_id_type {
+	BusQueryDeviceID = 0, BusQueryHardwareIDs = 1,
+	BusQueryCompatibleIDs = 2, BusQueryInstanceID = 3,
+	BusQueryDeviceSerialNumber = 4,
+};
+
+enum device_text_type {
+	DeviceTextDescription = 0, DeviceTextLocationInformation = 1,
+};
+
+enum device_usage_notification_type {
+	DeviceUsageTypeUndefined, DeviceUsageTypePaging,
+	DeviceUsageTypeHibernation, DevbiceUsageTypeDumpFile,
+};
+
+#define METHOD_BUFFERED		0
+#define METHOD_IN_DIRECT	1
+#define METHOD_OUT_DIRECT	2
+#define METHOD_NEITHER		3
+
+#define CTL_CODE(dev_type, func, method, access)			\
+	(((dev_type) << 16) | ((access) << 14) | ((func) << 2) | (method))
+
+#define IO_METHOD_FROM_CTL_CODE(code) (code & 0x3)
+
+#ifndef CONFIG_X86_64
+#pragma pack(push,4)
+#endif
+struct io_stack_location {
+	UCHAR major_fn;
+	UCHAR minor_fn;
+	UCHAR flags;
+	UCHAR control;
+	union {
+		struct {
+			void *security_context;
+			ULONG options;
+			USHORT POINTER_ALIGN file_attributes;
+			USHORT share_access;
+			ULONG POINTER_ALIGN ea_length;
+		} create;
+		struct {
+			ULONG length;
+			ULONG POINTER_ALIGN key;
+			LARGE_INTEGER byte_offset;
+		} read;
+		struct {
+			ULONG length;
+			ULONG POINTER_ALIGN key;
+			LARGE_INTEGER byte_offset;
+		} write;
+		struct {
+			ULONG length;
+			enum file_info_class POINTER_ALIGN file_info_class;
+		} query_file;
+		struct {
+			ULONG length;
+			enum file_info_class POINTER_ALIGN file_info_class;
+			struct file_object *file_object;
+			union {
+				struct {
+					BOOLEAN replace_if_exists;
+					BOOLEAN advance_only;
+				};
+				ULONG cluster_count;
+				void *delete_handle;
+			};
+		} set_file;
+		struct {
+			ULONG length;
+			enum fs_info_class POINTER_ALIGN fs_info_class;
+		} query_volume;
+		struct {
+			ULONG output_buf_len;
+			ULONG POINTER_ALIGN input_buf_len;
+			ULONG POINTER_ALIGN code;
+			void *type3_input_buf;
+		} dev_ioctl;
+		struct {
+			SECURITY_INFORMATION security_info;
+			ULONG POINTER_ALIGN length;
+		} query_security;
+		struct {
+			SECURITY_INFORMATION security_info;
+			void *security_descriptor;
+		} set_security;
+		struct {
+			void *vpb;
+			struct device_object *device_object;
+		} mount_volume;
+		struct {
+			void *vpb;
+			struct device_object *device_object;
+		} verify_volume;
+		struct {
+			void *srb;
+		} scsi;
+		struct {
+			enum device_relation_type type;
+		} query_device_relations;
+		struct {
+			const struct guid *type;
+			USHORT size;
+			USHORT version;
+			struct nt_interface *intf;
+			void *intf_data;
+		} query_intf;
+		struct {
+			void *capabilities;
+		} device_capabilities;
+		struct {
+			void *io_resource_requirement_list;
+		} filter_resource_requirements;
+		struct {
+			ULONG which_space;
+			void *buffer;
+			ULONG offset;
+			ULONG POINTER_ALIGN length;
+		} read_write_config;
+		struct {
+			BOOLEAN lock;
+		} set_lock;
+		struct {
+			enum bus_query_id_type id_type;
+		} query_id;
+		struct {
+			enum device_text_type device_text_type;
+			ULONG POINTER_ALIGN locale_id;
+		} query_device_text;
+		struct {
+			BOOLEAN in_path;
+			BOOLEAN reserved[3];
+			enum device_usage_notification_type POINTER_ALIGN type;
+		} usage_notification;
+		struct {
+			enum system_power_state power_state;
+		} wait_wake;
+		struct {
+			void *power_sequence;
+		} power_sequence;
+		struct {
+			ULONG sys_context;
+			enum power_state_type POINTER_ALIGN type;
+			union power_state POINTER_ALIGN state;
+			enum power_action POINTER_ALIGN shutdown_type;
+		} power;
+		struct {
+			struct cm_resource_list *allocated_resources;
+			struct cm_resource_list *allocated_resources_translated;
+		} start_device;
+		struct {
+			ULONG_PTR provider_id;
+			void *data_path;
+			ULONG buf_len;
+			void *buf;
+		} wmi;
+		struct {
+			void *arg1;
+			void *arg2;
+			void *arg3;
+			void *arg4;
+		} others;
+	} params;
+	struct device_object *dev_obj;
+	struct file_object *file_obj;
+	NTSTATUS (*completion_routine)(struct device_object *,
+				       struct irp *, void *) wstdcall;
+	void *context;
+};
+#ifndef CONFIG_X86_64
+#pragma pack(pop)
+#endif
+
+struct kapc {
+	CSHORT type;
+	CSHORT size;
+	ULONG spare0;
+	struct nt_thread *thread;
+	struct nt_list list;
+	void *kernele_routine;
+	void *rundown_routine;
+	void *normal_routine;
+	void *normal_context;
+	void *sys_arg1;
+	void *sys_arg2;
+	CCHAR apc_state_index;
+	KPROCESSOR_MODE apc_mode;
+	BOOLEAN inserted;
+};
+
+#define IRP_NOCACHE			0x00000001
+#define IRP_SYNCHRONOUS_API		0x00000004
+#define IRP_ASSOCIATED_IRP		0x00000008
+
+enum urb_state {
+	URB_INVALID = 1, URB_ALLOCATED, URB_SUBMITTED,
+	URB_COMPLETED, URB_FREE, URB_SUSPEND, URB_INT_UNLINKED };
+
+struct wrap_urb {
+	struct nt_list list;
+	enum urb_state state;
+	struct nt_list complete_list;
+	unsigned int flags;
+	struct urb *urb;
+	struct irp *irp;
+#ifdef USB_DEBUG
+	unsigned int id;
+#endif
+};
+
+struct irp {
+	SHORT type;
+	USHORT size;
+	struct mdl *mdl;
+	ULONG flags;
+	union {
+		struct irp *master_irp;
+		LONG irp_count;
+		void *system_buffer;
+	} associated_irp;
+	struct nt_list thread_list;
+	struct io_status_block io_status;
+	KPROCESSOR_MODE requestor_mode;
+	BOOLEAN pending_returned;
+	CHAR stack_count;
+	CHAR current_location;
+	BOOLEAN cancel;
+	KIRQL cancel_irql;
+	CCHAR apc_env;
+	UCHAR alloc_flags;
+	struct io_status_block *user_status;
+	struct nt_event *user_event;
+	union {
+		struct {
+			void *user_apc_routine;
+			void *user_apc_context;
+		} async_params;
+		LARGE_INTEGER alloc_size;
+	} overlay;
+	void (*cancel_routine)(struct device_object *, struct irp *) wstdcall;
+	void *user_buf;
+	union {
+		struct {
+			union {
+				struct kdevice_queue_entry dev_q_entry;
+				struct {
+					void *driver_context[4];
+				};
+			};
+			void *thread;
+			char *aux_buf;
+			struct {
+				struct nt_list list;
+				union {
+					struct io_stack_location *csl;
+					ULONG packet_type;
+				};
+			};
+			struct file_object *file_object;
+		} overlay;
+		union {
+			struct kapc apc;
+			/* space for apc is used for ndiswrapper
+			 * specific fields */
+			struct {
+				struct wrap_urb *wrap_urb;
+				struct wrap_device *wrap_device;
+			};
+		};
+		void *completion_key;
+	} tail;
+};
+
+#define IoSizeOfIrp(stack_count)					\
+	((USHORT)(sizeof(struct irp) +					\
+		  ((stack_count) * sizeof(struct io_stack_location))))
+#define IoGetCurrentIrpStackLocation(irp)	\
+	(irp)->tail.overlay.csl
+#define IoGetNextIrpStackLocation(irp)		\
+	(IoGetCurrentIrpStackLocation(irp) - 1)
+#define IoGetPreviousIrpStackLocation(irp)	\
+	(IoGetCurrentIrpStackLocation(irp) + 1)
+
+#define IoSetNextIrpStackLocation(irp)				\
+do {								\
+	KIRQL _irql_;						\
+	IoAcquireCancelSpinLock(&_irql_);			\
+	(irp)->current_location--;				\
+	IoGetCurrentIrpStackLocation(irp)--;			\
+	IoReleaseCancelSpinLock(_irql_);			\
+} while (0)
+
+#define IoSkipCurrentIrpStackLocation(irp) 			\
+do {								\
+	KIRQL _irql_;						\
+	IoAcquireCancelSpinLock(&_irql_);			\
+	(irp)->current_location++;				\
+	IoGetCurrentIrpStackLocation(irp)++;			\
+	IoReleaseCancelSpinLock(_irql_);			\
+} while (0)
+
+static inline void
+IoCopyCurrentIrpStackLocationToNext(struct irp *irp)
+{
+	struct io_stack_location *next;
+	next = IoGetNextIrpStackLocation(irp);
+	memcpy(next, IoGetCurrentIrpStackLocation(irp),
+	       offsetof(struct io_stack_location, completion_routine));
+	next->control = 0;
+}
+
+static inline void
+IoSetCompletionRoutine(struct irp *irp, void *routine, void *context,
+		       BOOLEAN success, BOOLEAN error, BOOLEAN cancel)
+{
+	struct io_stack_location *irp_sl = IoGetNextIrpStackLocation(irp);
+	irp_sl->completion_routine = routine;
+	irp_sl->context = context;
+	irp_sl->control = 0;
+	if (success)
+		irp_sl->control |= SL_INVOKE_ON_SUCCESS;
+	if (error)
+		irp_sl->control |= SL_INVOKE_ON_ERROR;
+	if (cancel)
+		irp_sl->control |= SL_INVOKE_ON_CANCEL;
+}
+
+#define IoMarkIrpPending(irp)						\
+	(IoGetCurrentIrpStackLocation((irp))->control |= SL_PENDING_RETURNED)
+#define IoUnmarkIrpPending(irp)						\
+	(IoGetCurrentIrpStackLocation((irp))->control &= ~SL_PENDING_RETURNED)
+
+#define IRP_SL(irp, n) (((struct io_stack_location *)((irp) + 1)) + (n))
+#define IRP_DRIVER_CONTEXT(irp) (irp)->tail.overlay.driver_context
+#define IoIrpThread(irp) ((irp)->tail.overlay.thread)
+
+#define IRP_URB(irp)							\
+	(union nt_urb *)(IoGetCurrentIrpStackLocation(irp)->params.others.arg1)
+
+#define IRP_WRAP_DEVICE(irp) (irp)->tail.wrap_device
+#define IRP_WRAP_URB(irp) (irp)->tail.wrap_urb
+
+struct wmi_guid_reg_info {
+	struct guid *guid;
+	ULONG instance_count;
+	ULONG flags;
+};
+
+struct wmilib_context {
+	ULONG guid_count;
+	struct wmi_guid_reg_info *guid_list;
+	void *query_wmi_reg_info;
+	void *query_wmi_data_block;
+	void *set_wmi_data_block;
+	void *set_wmi_data_item;
+	void *execute_wmi_method;
+	void *wmi_function_control;
+};
+
+enum key_value_information_class {
+	KeyValueBasicInformation, KeyValueFullInformation,
+	KeyValuePartialInformation, KeyValueFullInformationAlign64,
+	KeyValuePartialInformationAlign64
+};
+
+struct file_name_info {
+	ULONG length;
+	wchar_t *name;
+};
+
+struct file_std_info {
+	LARGE_INTEGER alloc_size;
+	LARGE_INTEGER eof;
+	ULONG num_links;
+	BOOLEAN delete_pending;
+	BOOLEAN dir;
+};
+
+enum nt_obj_type {
+	NT_OBJ_EVENT = 10, NT_OBJ_MUTEX, NT_OBJ_THREAD, NT_OBJ_TIMER,
+	NT_OBJ_SEMAPHORE,
+};
+
+enum common_object_type {
+	OBJECT_TYPE_NONE, OBJECT_TYPE_DEVICE, OBJECT_TYPE_DRIVER,
+	OBJECT_TYPE_NT_THREAD, OBJECT_TYPE_FILE, OBJECT_TYPE_CALLBACK,
+};
+
+struct common_object_header {
+	struct nt_list list;
+	enum common_object_type type;
+	UINT size;
+	UINT ref_count;
+	BOOLEAN close_in_process;
+	BOOLEAN permanent;
+	struct unicode_string name;
+};
+
+#define OBJECT_TO_HEADER(object)					\
+	(struct common_object_header *)((void *)(object) -		\
+					sizeof(struct common_object_header))
+#define OBJECT_SIZE(size)				\
+	((size) + sizeof(struct common_object_header))
+#define HEADER_TO_OBJECT(hdr)					\
+	((void *)(hdr) + sizeof(struct common_object_header))
+#define HANDLE_TO_OBJECT(handle) HEADER_TO_OBJECT(handle)
+#define HANDLE_TO_HEADER(handle) (handle)
+
+enum work_queue_type {
+	CriticalWorkQueue, DelayedWorkQueue, HyperCriticalWorkQueue,
+	MaximumWorkQueue
+};
+
+typedef void (*NTOS_WORK_FUNC)(void *arg1, void *arg2) wstdcall;
+
+struct io_workitem {
+	enum work_queue_type type;
+	struct device_object *dev_obj;
+	NTOS_WORK_FUNC worker_routine;
+	void *context;
+};
+
+struct io_workitem_entry {
+	struct nt_list list;
+	struct io_workitem *io_workitem;
+};
+
+enum mm_page_priority {
+	LowPagePriority, NormalPagePriority = 16, HighPagePriority = 32
+};
+
+enum kinterrupt_mode {
+	LevelSensitive, Latched
+};
+
+enum ntos_wait_reason {
+	Executive, FreePage, PageIn, PoolAllocation, DelayExecution,
+	Suspended, UserRequest, WrExecutive, WrFreePage, WrPageIn,
+	WrPoolAllocation, WrDelayExecution, WrSuspended, WrUserRequest,
+	WrEventPair, WrQueue, WrLpcReceive, WrLpcReply, WrVirtualMemory,
+	WrPageOut, WrRendezvous, Spare2, Spare3, Spare4, Spare5, Spare6,
+	WrKernel, MaximumWaitReason
+};
+
+typedef enum ntos_wait_reason KWAIT_REASON;
+
+typedef void *LOOKASIDE_ALLOC_FUNC(enum pool_type pool_type,
+				   SIZE_T size, ULONG tag) wstdcall;
+typedef void LOOKASIDE_FREE_FUNC(void *) wstdcall;
+
+struct npaged_lookaside_list {
+	nt_slist_header head;
+	USHORT depth;
+	USHORT maxdepth;
+	ULONG totalallocs;
+	union {
+		ULONG allocmisses;
+		ULONG allochits;
+	} u1;
+	ULONG totalfrees;
+	union {
+		ULONG freemisses;
+		ULONG freehits;
+	} u2;
+	enum pool_type pool_type;
+	ULONG tag;
+	ULONG size;
+	LOOKASIDE_ALLOC_FUNC *alloc_func;
+	LOOKASIDE_FREE_FUNC *free_func;
+	struct nt_list list;
+	ULONG lasttotallocs;
+	union {
+		ULONG lastallocmisses;
+		ULONG lastallochits;
+	} u3;
+	ULONG pad[2];
+#ifndef CONFIG_X86_64
+	NT_SPIN_LOCK obsolete;
+#endif
+}
+#ifdef CONFIG_X86_64
+CACHE_ALIGN
+#endif
+;
+
+enum device_registry_property {
+	DevicePropertyDeviceDescription, DevicePropertyHardwareID,
+	DevicePropertyCompatibleIDs, DevicePropertyBootConfiguration,
+	DevicePropertyBootConfigurationTranslated,
+	DevicePropertyClassName, DevicePropertyClassGuid,
+	DevicePropertyDriverKeyName, DevicePropertyManufacturer,
+	DevicePropertyFriendlyName, DevicePropertyLocationInformation,
+	DevicePropertyPhysicalDeviceObjectName, DevicePropertyBusTypeGuid,
+	DevicePropertyLegacyBusType, DevicePropertyBusNumber,
+	DevicePropertyEnumeratorName, DevicePropertyAddress,
+	DevicePropertyUINumber, DevicePropertyInstallState,
+	DevicePropertyRemovalPolicy
+};
+
+enum trace_information_class {
+	TraceIdClass, TraceHandleClass, TraceEnableFlagsClass,
+	TraceEnableLevelClass, GlobalLoggerHandleClass, EventLoggerHandleClass,
+	AllLoggerHandlesClass, TraceHandleByNameClass
+};
+
+struct kinterrupt;
+typedef BOOLEAN (*PKSERVICE_ROUTINE)(struct kinterrupt *interrupt,
+				     void *context) wstdcall;
+typedef BOOLEAN (*PKSYNCHRONIZE_ROUTINE)(void *context) wstdcall;
+
+struct kinterrupt {
+	ULONG vector;
+	KAFFINITY cpu_mask;
+	NT_SPIN_LOCK lock;
+	NT_SPIN_LOCK *actual_lock;
+	BOOLEAN shared;
+	BOOLEAN save_fp;
+	union {
+		CHAR processor_number;
+#ifdef CONFIG_DEBUG_SHIRQ
+		CHAR enabled;
+#endif
+	} u;
+	PKSERVICE_ROUTINE isr;
+	void *isr_ctx;
+	struct nt_list list;
+	KIRQL irql;
+	KIRQL synch_irql;
+	enum kinterrupt_mode mode;
+};
+
+struct time_fields {
+	CSHORT year;
+	CSHORT month;
+	CSHORT day;
+	CSHORT hour;
+	CSHORT minute;
+	CSHORT second;
+	CSHORT milliseconds;
+	CSHORT weekday;
+};
+
+struct object_attributes {
+	ULONG length;
+	void *root_dir;
+	struct unicode_string *name;
+	ULONG attributes;
+	void *security_descr;
+	void *security_qos;
+};
+
+typedef void (*PCALLBACK_FUNCTION)(void *context, void *arg1,
+				   void *arg2) wstdcall;
+
+struct callback_object;
+struct callback_func {
+	PCALLBACK_FUNCTION func;
+	void *context;
+	struct nt_list list;
+	struct callback_object *object;
+};
+
+struct callback_object {
+	NT_SPIN_LOCK lock;
+	struct nt_list list;
+	struct nt_list callback_funcs;
+	BOOLEAN allow_multiple_callbacks;
+	struct object_attributes *attributes;
+};
+
+enum section_inherit {
+	ViewShare = 1, ViewUnmap = 2
+};
+
+struct ksystem_time {
+	ULONG low_part;
+	LONG high1_time;
+	LONG high2_time;
+};
+
+enum nt_product_type {
+	nt_product_win_nt = 1, nt_product_lan_man_nt, nt_product_server
+};
+
+enum alt_arch_type {
+	arch_type_standard, arch_type_nex98x86, end_alternatives
+};
+
+struct kuser_shared_data {
+	ULONG tick_count;
+	ULONG tick_count_multiplier;
+	volatile struct ksystem_time interrupt_time;
+	volatile struct ksystem_time system_time;
+	volatile struct ksystem_time time_zone_bias;
+	USHORT image_number_low;
+	USHORT image_number_high;
+	wchar_t nt_system_root[260];
+	ULONG max_stack_trace_depth;
+	ULONG crypto_exponent;
+	ULONG time_zone_id;
+	ULONG large_page_min;
+	ULONG reserved2[7];
+	enum nt_product_type nt_product_type;
+	BOOLEAN product_type_is_valid;
+	ULONG nt_major_version;
+	ULONG nt_minor_version;
+	BOOLEAN processor_features[PROCESSOR_FEATURE_MAX];
+	ULONG reserved1;
+	ULONG reserved3;
+	volatile LONG time_slip;
+	enum alt_arch_type alt_arch_type;
+	LARGE_INTEGER system_expiration_date;
+	ULONG suite_mask;
+	BOOLEAN kdbg_enabled;
+	volatile ULONG active_console;
+	volatile ULONG dismount_count;
+	ULONG com_plus_package;
+	ULONG last_system_rite_event_tick_count;
+	ULONG num_phys_pages;
+	BOOLEAN safe_boot_mode;
+	ULONG trace_log;
+	ULONGLONG fill0;
+	ULONGLONG sys_call[4];
+	union {
+		volatile struct ksystem_time tick_count;
+		volatile ULONG64 tick_count_quad;
+	} tick;
+};
+
+#define REG_NONE			(0)
+#define REG_SZ				(1)
+#define REG_EXPAND_SZ			(2)
+#define REG_BINARY			(3)
+#define REG_DWORD			(4)
+
+#define RTL_REGISTRY_ABSOLUTE		0
+#define RTL_REGISTRY_SERVICES		1
+#define RTL_REGISTRY_CONTROL		2
+#define RTL_REGISTRY_WINDOWS_NT		3
+#define RTL_REGISTRY_DEVICEMAP		4
+#define RTL_REGISTRY_USER		5
+#define RTL_REGISTRY_MAXIMUM		6
+#define RTL_REGISTRY_HANDLE		0x40000000
+#define RTL_REGISTRY_OPTIONAL		0x80000000
+
+#define RTL_QUERY_REGISTRY_SUBKEY	0x00000001
+#define RTL_QUERY_REGISTRY_TOPKEY	0x00000002
+#define RTL_QUERY_REGISTRY_REQUIRED	0x00000004
+#define RTL_QUERY_REGISTRY_NOVALUE	0x00000008
+#define RTL_QUERY_REGISTRY_NOEXPAND	0x00000010
+#define RTL_QUERY_REGISTRY_DIRECT	0x00000020
+#define RTL_QUERY_REGISTRY_DELETE	0x00000040
+
+typedef NTSTATUS (*PRTL_QUERY_REGISTRY_ROUTINE)(wchar_t *name, ULONG type,
+						void *data, ULONG length,
+						void *context,
+						void *entry) wstdcall;
+
+struct rtl_query_registry_table {
+	PRTL_QUERY_REGISTRY_ROUTINE query_func;
+	ULONG flags;
+	wchar_t *name;
+	void *context;
+	ULONG def_type;
+	void *def_data;
+	ULONG def_length;
+};
+
+struct io_remove_lock {
+	BOOLEAN removed;
+	BOOLEAN reserved[3];
+	LONG io_count;
+	struct nt_event remove_event;
+};
+
+struct io_error_log_packet {
+	UCHAR major_fn_code;
+	UCHAR retry_count;
+	USHORT dump_data_size;
+	USHORT nr_of_strings;
+	USHORT string_offset;
+	USHORT event_category;
+	NTSTATUS error_code;
+	ULONG unique_error_value;
+	NTSTATUS final_status;
+	ULONG sequence_number;
+	ULONG io_control_code;
+	LARGE_INTEGER device_offset;
+	ULONG dump_data[1];
+};
+
+/* some of the functions below are slightly different from DDK's
+ * implementation; e.g., Insert functions return appropriate
+ * pointer */
+
+/* instead of using Linux's lists, we implement list manipulation
+ * functions because nt_list is used by drivers and we don't want to
+ * worry about Linux's list being different from nt_list (right now
+ * they are same, but in future they could be different) */
+
+static inline void InitializeListHead(struct nt_list *head)
+{
+	head->next = head->prev = head;
+}
+
+static inline BOOLEAN IsListEmpty(struct nt_list *head)
+{
+	if (head == head->next)
+		return TRUE;
+	else
+		return FALSE;
+}
+
+static inline void RemoveEntryList(struct nt_list *entry)
+{
+	entry->prev->next = entry->next;
+	entry->next->prev = entry->prev;
+}
+
+static inline struct nt_list *RemoveHeadList(struct nt_list *head)
+{
+	struct nt_list *entry;
+
+	entry = head->next;
+	if (entry == head)
+		return NULL;
+	else {
+		RemoveEntryList(entry);
+		return entry;
+	}
+}
+
+static inline struct nt_list *RemoveTailList(struct nt_list *head)
+{
+	struct nt_list *entry;
+
+	entry = head->prev;
+	if (entry == head)
+		return NULL;
+	else {
+		RemoveEntryList(entry);
+		return entry;
+	}
+}
+
+static inline void InsertListEntry(struct nt_list *entry, struct nt_list *prev,
+				   struct nt_list *next)
+{
+	next->prev = entry;
+	entry->next = next;
+	entry->prev = prev;
+	prev->next = entry;
+}
+
+static inline struct nt_list *InsertHeadList(struct nt_list *head,
+					     struct nt_list *entry)
+{
+	struct nt_list *ret;
+
+	if (IsListEmpty(head))
+		ret = NULL;
+	else
+		ret = head->next;
+
+	InsertListEntry(entry, head, head->next);
+	return ret;
+}
+
+static inline struct nt_list *InsertTailList(struct nt_list *head,
+					     struct nt_list *entry)
+{
+	struct nt_list *ret;
+
+	if (IsListEmpty(head))
+		ret = NULL;
+	else
+		ret = head->prev;
+
+	InsertListEntry(entry, head->prev, head);
+	return ret;
+}
+
+#define nt_list_for_each(pos, head)					\
+	for (pos = (head)->next; pos != (head); pos = pos->next)
+
+#define nt_list_for_each_entry(pos, head, member)			\
+	for (pos = container_of((head)->next, typeof(*pos), member);	\
+	     &pos->member != (head);					\
+	     pos = container_of(pos->member.next, typeof(*pos), member))
+
+#define nt_list_for_each_safe(pos, n, head)		       \
+	for (pos = (head)->next, n = pos->next; pos != (head); \
+	     pos = n, n = pos->next)
+
+/* device object flags */
+#define DO_VERIFY_VOLUME		0x00000002
+#define DO_BUFFERED_IO			0x00000004
+#define DO_EXCLUSIVE			0x00000008
+#define DO_DIRECT_IO			0x00000010
+#define DO_MAP_IO_BUFFER		0x00000020
+#define DO_DEVICE_HAS_NAME		0x00000040
+#define DO_DEVICE_INITIALIZING		0x00000080
+#define DO_SYSTEM_BOOT_PARTITION	0x00000100
+#define DO_LONG_TERM_REQUESTS		0x00000200
+#define DO_NEVER_LAST_DEVICE		0x00000400
+#define DO_SHUTDOWN_REGISTERED		0x00000800
+#define DO_BUS_ENUMERATED_DEVICE	0x00001000
+#define DO_POWER_PAGABLE		0x00002000
+#define DO_POWER_INRUSH			0x00004000
+#define DO_LOW_PRIORITY_FILESYSTEM	0x00010000
+
+/* Various supported device types (used with IoCreateDevice()) */
+
+#define FILE_DEVICE_BEEP		0x00000001
+#define FILE_DEVICE_CD_ROM		0x00000002
+#define FILE_DEVICE_CD_ROM_FILE_SYSTEM	0x00000003
+#define FILE_DEVICE_CONTROLLER		0x00000004
+#define FILE_DEVICE_DATALINK		0x00000005
+#define FILE_DEVICE_DFS			0x00000006
+#define FILE_DEVICE_DISK		0x00000007
+#define FILE_DEVICE_DISK_FILE_SYSTEM	0x00000008
+#define FILE_DEVICE_FILE_SYSTEM		0x00000009
+#define FILE_DEVICE_INPORT_PORT		0x0000000A
+#define FILE_DEVICE_KEYBOARD		0x0000000B
+#define FILE_DEVICE_MAILSLOT		0x0000000C
+#define FILE_DEVICE_MIDI_IN		0x0000000D
+#define FILE_DEVICE_MIDI_OUT		0x0000000E
+#define FILE_DEVICE_MOUSE		0x0000000F
+#define FILE_DEVICE_MULTI_UNC_PROVIDER	0x00000010
+#define FILE_DEVICE_NAMED_PIPE		0x00000011
+#define FILE_DEVICE_NETWORK		0x00000012
+#define FILE_DEVICE_NETWORK_BROWSER	0x00000013
+#define FILE_DEVICE_NETWORK_FILE_SYSTEM	0x00000014
+#define FILE_DEVICE_NULL		0x00000015
+#define FILE_DEVICE_PARALLEL_PORT	0x00000016
+#define FILE_DEVICE_PHYSICAL_NETCARD	0x00000017
+#define FILE_DEVICE_PRINTER		0x00000018
+#define FILE_DEVICE_SCANNER		0x00000019
+#define FILE_DEVICE_SERIAL_MOUSE_PORT	0x0000001A
+#define FILE_DEVICE_SERIAL_PORT		0x0000001B
+#define FILE_DEVICE_SCREEN		0x0000001C
+#define FILE_DEVICE_SOUND		0x0000001D
+#define FILE_DEVICE_STREAMS		0x0000001E
+#define FILE_DEVICE_TAPE		0x0000001F
+#define FILE_DEVICE_TAPE_FILE_SYSTEM	0x00000020
+#define FILE_DEVICE_TRANSPORT		0x00000021
+#define FILE_DEVICE_UNKNOWN		0x00000022
+#define FILE_DEVICE_VIDEO		0x00000023
+#define FILE_DEVICE_VIRTUAL_DISK	0x00000024
+#define FILE_DEVICE_WAVE_IN		0x00000025
+#define FILE_DEVICE_WAVE_OUT		0x00000026
+#define FILE_DEVICE_8042_PORT		0x00000027
+#define FILE_DEVICE_NETWORK_REDIRECTOR	0x00000028
+#define FILE_DEVICE_BATTERY		0x00000029
+#define FILE_DEVICE_BUS_EXTENDER	0x0000002A
+#define FILE_DEVICE_MODEM		0x0000002B
+#define FILE_DEVICE_VDM			0x0000002C
+#define FILE_DEVICE_MASS_STORAGE	0x0000002D
+#define FILE_DEVICE_SMB			0x0000002E
+#define FILE_DEVICE_KS			0x0000002F
+#define FILE_DEVICE_CHANGER		0x00000030
+#define FILE_DEVICE_SMARTCARD		0x00000031
+#define FILE_DEVICE_ACPI		0x00000032
+#define FILE_DEVICE_DVD			0x00000033
+#define FILE_DEVICE_FULLSCREEN_VIDEO	0x00000034
+#define FILE_DEVICE_DFS_FILE_SYSTEM	0x00000035
+#define FILE_DEVICE_DFS_VOLUME		0x00000036
+#define FILE_DEVICE_SERENUM		0x00000037
+#define FILE_DEVICE_TERMSRV		0x00000038
+#define FILE_DEVICE_KSEC		0x00000039
+#define FILE_DEVICE_FIPS		0x0000003A
+
+/* Device characteristics */
+
+#define FILE_REMOVABLE_MEDIA		0x00000001
+#define FILE_READ_ONLY_DEVICE		0x00000002
+#define FILE_FLOPPY_DISKETTE		0x00000004
+#define FILE_WRITE_ONCE_MEDIA		0x00000008
+#define FILE_REMOTE_DEVICE		0x00000010
+#define FILE_DEVICE_IS_MOUNTED		0x00000020
+#define FILE_VIRTUAL_VOLUME		0x00000040
+#define FILE_AUTOGENERATED_DEVICE_NAME	0x00000080
+#define FILE_DEVICE_SECURE_OPEN		0x00000100
+
+#define FILE_READ_DATA			0x0001
+#define FILE_WRITE_DATA			0x0002
+
+#define FILE_SUPERSEDED			0x00000000
+#define FILE_OPENED			0x00000001
+#define FILE_CREATED			0x00000002
+#define FILE_OVERWRITTEN		0x00000003
+#define FILE_EXISTS			0x00000004
+#define FILE_DOES_NOT_EXIST		0x00000005
+
+
+#endif /* WINNT_TYPES_H */
--- linux-mvl-dove-2.6.32.orig/ubuntu/ndiswrapper/mkexport.sh
+++ linux-mvl-dove-2.6.32/ubuntu/ndiswrapper/mkexport.sh
@@ -0,0 +1,42 @@
+#! /bin/sh
+
+# Generate exports symbol table from C files
+
+input="$1"
+output="$2"
+exports=$(basename "$output" .h)
+exec >"$output"
+
+echo "/* automatically generated from src */";
+
+sed -n -e '/^\(wstdcall\|wfastcall\|noregparm\|__attribute__\)/{
+:more
+N
+s/\([^{]\)$/\1/
+t more
+s/\n{$/;/
+p
+}' $input
+
+echo "#ifdef CONFIG_X86_64";
+
+sed -n \
+	-e 's/.*WIN_FUNC(\([^\,]\+\) *\, *\([0-9]\+\)).*/'\
+'WIN_FUNC_DECL(\1, \2)/p' \
+	-e 's/.*WIN_FUNC_PTR(\([^\,]\+\) *\, *\([0-9]\+\)).*/'\
+'WIN_FUNC_DECL(\1, \2)/p' $input | sort -u
+
+echo "#endif"
+echo "extern struct wrap_export $exports[];"
+echo "struct wrap_export $exports[] = {"
+
+sed -n \
+	-e 's/.*WIN_FUNC(_win_\([^\,]\+\) *\, *\([0-9]\+\)).*/'\
+'	WIN_WIN_SYMBOL(\1, \2),/p' \
+	-e 's/.*WIN_FUNC(\([^\,]\+\) *\, *\([0-9]\+\)).*/'\
+'	WIN_SYMBOL(\1, \2),/p' \
+	-e 's/.*WIN_SYMBOL_MAP(\("[^"]\+"\)[ ,\n]\+\([^)]\+\)).*/'\
+'	{\1, (generic_func)\2},/p' $input | sort -u
+
+echo "	{NULL, NULL}"
+echo "};"
--- linux-mvl-dove-2.6.32.orig/ubuntu/ndiswrapper/hal.c
+++ linux-mvl-dove-2.6.32/ubuntu/ndiswrapper/hal.c
@@ -0,0 +1,157 @@
+/*
+ *  Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *  GNU General Public License for more details.
+ *
+ */
+
+#include "ntoskernel.h"
+#include "hal_exports.h"
+
+wstdcall void WIN_FUNC(WRITE_PORT_ULONG,2)
+	(ULONG_PTR port, ULONG value)
+{
+	outl(value, port);
+}
+
+wstdcall ULONG WIN_FUNC(READ_PORT_ULONG,1)
+	(ULONG_PTR port)
+{
+	return inl(port);
+}
+
+wstdcall void WIN_FUNC(WRITE_PORT_USHORT,2)
+	(ULONG_PTR port, USHORT value)
+{
+	outw(value, port);
+}
+
+wstdcall USHORT WIN_FUNC(READ_PORT_USHORT,1)
+	(ULONG_PTR port)
+{
+	return inw(port);
+}
+
+wstdcall void WIN_FUNC(WRITE_PORT_UCHAR,2)
+	(ULONG_PTR port, UCHAR value)
+{
+	outb(value, port);
+}
+
+wstdcall UCHAR WIN_FUNC(READ_PORT_UCHAR,1)
+	(ULONG_PTR port)
+{
+	return inb(port);
+}
+
+wstdcall void WIN_FUNC(WRITE_PORT_BUFFER_USHORT,3)
+	(ULONG_PTR port, USHORT *buf, ULONG count)
+{
+	outsw(port, buf, count);
+}
+
+wstdcall void WIN_FUNC(READ_PORT_BUFFER_USHORT,3)
+	(ULONG_PTR port, USHORT *buf, ULONG count)
+{
+	insw(port, buf, count);
+}
+
+wstdcall void WIN_FUNC(WRITE_PORT_BUFFER_ULONG,3)
+	(ULONG_PTR port, ULONG *buf, ULONG count)
+{
+	outsl(port, buf, count);
+}
+
+wstdcall void WIN_FUNC(READ_PORT_BUFFER_ULONG,3)
+	(ULONG_PTR port, ULONG *buf, ULONG count)
+{
+	insl(port, buf, count);
+}
+
+wstdcall USHORT WIN_FUNC(READ_REGISTER_USHORT,1)
+	(void __iomem *reg)
+{
+	return readw(reg);
+}
+
+wstdcall void WIN_FUNC(WRITE_REGISTER_ULONG,2)
+	(void __iomem *reg, UINT val)
+{
+	writel(val, reg);
+}
+
+wstdcall void WIN_FUNC(WRITE_REGISTER_USHORT,2)
+	(void __iomem *reg, USHORT val)
+{
+	writew(val, reg);
+}
+
+wstdcall void WIN_FUNC(WRITE_REGISTER_UCHAR,2)
+	(void __iomem *reg, UCHAR val)
+{
+	writeb(val, reg);
+}
+
+wstdcall void WIN_FUNC(KeStallExecutionProcessor,1)
+	(ULONG usecs)
+{
+	udelay(usecs);
+}
+
+wstdcall KIRQL WIN_FUNC(KeGetCurrentIrql,0)
+	(void)
+{
+	return current_irql();
+}
+
+wfastcall KIRQL WIN_FUNC(KfRaiseIrql,1)
+	(KIRQL newirql)
+{
+	return raise_irql(newirql);
+}
+
+wfastcall void WIN_FUNC(KfLowerIrql,1)
+	(KIRQL oldirql)
+{
+	lower_irql(oldirql);
+}
+
+wfastcall KIRQL WIN_FUNC(KfAcquireSpinLock,1)
+	(NT_SPIN_LOCK *lock)
+{
+	return nt_spin_lock_irql(lock, DISPATCH_LEVEL);
+}
+
+wfastcall void WIN_FUNC(KfReleaseSpinLock,2)
+	(NT_SPIN_LOCK *lock, KIRQL oldirql)
+{
+	nt_spin_unlock_irql(lock, oldirql);
+}
+
+wfastcall void WIN_FUNC(KefAcquireSpinLockAtDpcLevel,1)
+	(NT_SPIN_LOCK *lock)
+{
+#ifdef DEBUG_IRQL
+	if (current_irql() != DISPATCH_LEVEL)
+		ERROR("irql != DISPATCH_LEVEL");
+#endif
+	nt_spin_lock(lock);
+}
+
+wfastcall void WIN_FUNC(KefReleaseSpinLockFromDpcLevel,1)
+	(NT_SPIN_LOCK *lock)
+{
+#ifdef DEBUG_IRQL
+	if (current_irql() != DISPATCH_LEVEL)
+		ERROR("irql != DISPATCH_LEVEL");
+#endif
+	nt_spin_unlock(lock);
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/ndiswrapper/loader.h
+++ linux-mvl-dove-2.6.32/ubuntu/ndiswrapper/loader.h
@@ -0,0 +1,90 @@
+/*
+ *  Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *  GNU General Public License for more details.
+ *
+ */
+
+#ifndef _LOADER_H_
+#define _LOADER_H_
+
+#include "ndiswrapper.h"
+
+#ifndef __KERNEL__
+#define __user
+#endif
+
+struct load_driver_file {
+	char driver_name[MAX_DRIVER_NAME_LEN];
+	char name[MAX_DRIVER_NAME_LEN];
+	size_t size;
+	void __user *data;
+};
+
+struct load_device_setting {
+	char name[MAX_SETTING_NAME_LEN];
+	char value[MAX_SETTING_VALUE_LEN];
+};
+
+struct load_device {
+	int bus;
+	int vendor;
+	int device;
+	int subvendor;
+	int subdevice;
+	char conf_file_name[MAX_DRIVER_NAME_LEN];
+	char driver_name[MAX_DRIVER_NAME_LEN];
+};
+
+struct load_devices {
+	int count;
+	struct load_device *devices;
+};
+
+struct load_driver {
+	char name[MAX_DRIVER_NAME_LEN];
+	char conf_file_name[MAX_DRIVER_NAME_LEN];
+	unsigned int num_sys_files;
+	struct load_driver_file sys_files[MAX_DRIVER_PE_IMAGES];
+	unsigned int num_settings;
+	struct load_device_setting settings[MAX_DEVICE_SETTINGS];
+	unsigned int num_bin_files;
+	struct load_driver_file bin_files[MAX_DRIVER_BIN_FILES];
+};
+
+#define WRAP_IOCTL_LOAD_DEVICE _IOW(('N' + 'd' + 'i' + 'S'), 0,	\
+				    struct load_device *)
+#define WRAP_IOCTL_LOAD_DRIVER _IOW(('N' + 'd' + 'i' + 'S'), 1,	\
+				    struct load_driver *)
+#define WRAP_IOCTL_LOAD_BIN_FILE _IOW(('N' + 'd' + 'i' + 'S'), 2,	\
+				      struct load_driver_file *)
+
+#define WRAP_CMD_LOAD_DEVICE "load_device"
+#define WRAP_CMD_LOAD_DRIVER "load_driver"
+#define WRAP_CMD_LOAD_BIN_FILE "load_bin_file"
+
+int loader_init(void);
+void loader_exit(void);
+
+#ifdef __KERNEL__
+struct wrap_device *load_wrap_device(struct load_device *load_device);
+struct wrap_driver *load_wrap_driver(struct wrap_device *device);
+struct wrap_bin_file *get_bin_file(char *bin_file_name);
+void free_bin_file(struct wrap_bin_file *bin_file);
+void unload_wrap_driver(struct wrap_driver *driver);
+void unload_wrap_device(struct wrap_device *wd);
+struct wrap_device *get_wrap_device(void *dev, int bus_type);
+
+extern struct semaphore loader_mutex;
+#endif
+
+#endif /* LOADER_H */
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/ndiswrapper/wrapper.c
+++ linux-mvl-dove-2.6.32/ubuntu/ndiswrapper/wrapper.c
@@ -0,0 +1,121 @@
+/*
+ *  Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *  GNU General Public License for more details.
+ *
+ */
+
+#include "ndis.h"
+#include "iw_ndis.h"
+#include "loader.h"
+#include "pnp.h"
+#include "wrapper.h"
+
+char *if_name = "wlan%d";
+int proc_uid, proc_gid;
+int hangcheck_interval;
+static char *utils_version = UTILS_VERSION;
+
+#if defined(DEBUG) && (DEBUG > 0)
+int debug = DEBUG;
+#else
+int debug = 0;
+#endif
+
+WRAP_MODULE_PARM_STRING(if_name, 0400);
+MODULE_PARM_DESC(if_name, "Network interface name or template "
+		 "(default: wlan%d)");
+WRAP_MODULE_PARM_INT(proc_uid, 0600);
+MODULE_PARM_DESC(proc_uid, "The uid of the files created in /proc "
+		 "(default: 0).");
+WRAP_MODULE_PARM_INT(proc_gid, 0600);
+MODULE_PARM_DESC(proc_gid, "The gid of the files created in /proc "
+		 "(default: 0).");
+WRAP_MODULE_PARM_INT(debug, 0600);
+MODULE_PARM_DESC(debug, "debug level");
+
+/* 0 - default value provided by NDIS driver,
+ * positive value - force hangcheck interval to that many seconds
+ * negative value - disable hangcheck
+ */
+WRAP_MODULE_PARM_INT(hangcheck_interval, 0600);
+MODULE_PARM_DESC(hangcheck_interval, "The interval, in seconds, for checking"
+		 " if driver is hung. (default: 0)");
+
+WRAP_MODULE_PARM_STRING(utils_version, 0400);
+MODULE_PARM_DESC(utils_version, "Compatible version of utils "
+		 "(read only: " UTILS_VERSION ")");
+
+MODULE_AUTHOR("ndiswrapper team <ndiswrapper-general@lists.sourceforge.net>");
+#ifdef MODULE_DESCRIPTION
+MODULE_DESCRIPTION("NDIS wrapper driver");
+#endif
+#ifdef MODULE_VERSION
+MODULE_VERSION(DRIVER_VERSION);
+#endif
+MODULE_LICENSE("GPL");
+
+static void module_cleanup(void)
+{
+	loader_exit();
+#ifdef ENABLE_USB
+	usb_exit();
+#endif
+
+	wrap_procfs_remove();
+	wrapndis_exit();
+	ndis_exit();
+	rtl_exit();
+	crt_exit();
+	ntoskernel_exit();
+	wrapmem_exit();
+}
+
+static int __init wrapper_init(void)
+{
+	printk(KERN_INFO "%s version %s loaded (smp=%s, preempt=%s)\n",
+	       DRIVER_NAME, DRIVER_VERSION,
+#ifdef CONFIG_SMP
+	       "yes"
+#else
+	       "no"
+#endif
+		,
+#ifdef CONFIG_PREEMPT_RT
+		"rt"
+#elif defined(CONFIG_PREEMPT)
+		"yes"
+#else
+		"no"
+#endif
+		);
+
+	if (wrapmem_init() || ntoskernel_init() || crt_init() ||
+	    rtl_init() || ndis_init() || wrapndis_init() ||
+#ifdef ENABLE_USB
+	    usb_init() ||
+#endif
+	    wrap_procfs_init() || loader_init()) {
+		module_cleanup();
+		ERROR("%s: initialization failed", DRIVER_NAME);
+		return -EINVAL;
+	}
+	EXIT1(return 0);
+}
+
+static void __exit wrapper_exit(void)
+{
+	ENTER1("");
+	module_cleanup();
+}
+
+module_init(wrapper_init);
+module_exit(wrapper_exit);
--- linux-mvl-dove-2.6.32.orig/ubuntu/ndiswrapper/pe_linker.h
+++ linux-mvl-dove-2.6.32/ubuntu/ndiswrapper/pe_linker.h
@@ -0,0 +1,993 @@
+/*
+ * This file is an excerpt of winnt.h from WINE, which bears the
+ * following copyright:
+ *
+ * Win32 definitions for Windows NT
+ *
+ * Copyright 1996 Alexandre Julliard
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ */
+
+/*
+ * File formats definitions
+ */
+typedef struct _IMAGE_DOS_HEADER {
+    WORD  e_magic;      /* 00: MZ Header signature */
+    WORD  e_cblp;       /* 02: Bytes on last page of file */
+    WORD  e_cp;         /* 04: Pages in file */
+    WORD  e_crlc;       /* 06: Relocations */
+    WORD  e_cparhdr;    /* 08: Size of header in paragraphs */
+    WORD  e_minalloc;   /* 0a: Minimum extra paragraphs needed */
+    WORD  e_maxalloc;   /* 0c: Maximum extra paragraphs needed */
+    WORD  e_ss;         /* 0e: Initial (relative) SS value */
+    WORD  e_sp;         /* 10: Initial SP value */
+    WORD  e_csum;       /* 12: Checksum */
+    WORD  e_ip;         /* 14: Initial IP value */
+    WORD  e_cs;         /* 16: Initial (relative) CS value */
+    WORD  e_lfarlc;     /* 18: File address of relocation table */
+    WORD  e_ovno;       /* 1a: Overlay number */
+    WORD  e_res[4];     /* 1c: Reserved words */
+    WORD  e_oemid;      /* 24: OEM identifier (for e_oeminfo) */
+    WORD  e_oeminfo;    /* 26: OEM information; e_oemid specific */
+    WORD  e_res2[10];   /* 28: Reserved words */
+    DWORD e_lfanew;     /* 3c: Offset to extended header */
+} IMAGE_DOS_HEADER, *PIMAGE_DOS_HEADER;
+
+#define IMAGE_DOS_SIGNATURE    0x5A4D     /* MZ   */
+#define IMAGE_OS2_SIGNATURE    0x454E     /* NE   */
+#define IMAGE_OS2_SIGNATURE_LE 0x454C     /* LE   */
+#define IMAGE_OS2_SIGNATURE_LX 0x584C     /* LX */
+#define IMAGE_VXD_SIGNATURE    0x454C     /* LE   */
+#define IMAGE_NT_SIGNATURE     0x00004550 /* PE00 */
+
+/*
+ * This is the Windows executable (NE) header.
+ * the name IMAGE_OS2_HEADER is misleading, but in the SDK this way.
+ */
+typedef struct
+{
+    WORD  ne_magic;             /* 00 NE signature 'NE' */
+    BYTE  ne_ver;               /* 02 Linker version number */
+    BYTE  ne_rev;               /* 03 Linker revision number */
+    WORD  ne_enttab;            /* 04 Offset to entry table relative to NE */
+    WORD  ne_cbenttab;          /* 06 Length of entry table in bytes */
+    LONG  ne_crc;               /* 08 Checksum */
+    WORD  ne_flags;             /* 0c Flags about segments in this file */
+    WORD  ne_autodata;          /* 0e Automatic data segment number */
+    WORD  ne_heap;              /* 10 Initial size of local heap */
+    WORD  ne_stack;             /* 12 Initial size of stack */
+    DWORD ne_csip;              /* 14 Initial CS:IP */
+    DWORD ne_sssp;              /* 18 Initial SS:SP */
+    WORD  ne_cseg;              /* 1c # of entries in segment table */
+    WORD  ne_cmod;              /* 1e # of entries in module reference tab. */
+    WORD  ne_cbnrestab;         /* 20 Length of nonresident-name table */
+    WORD  ne_segtab;            /* 22 Offset to segment table */
+    WORD  ne_rsrctab;           /* 24 Offset to resource table */
+    WORD  ne_restab;            /* 26 Offset to resident-name table */
+    WORD  ne_modtab;            /* 28 Offset to module reference table */
+    WORD  ne_imptab;            /* 2a Offset to imported name table */
+    DWORD ne_nrestab;           /* 2c Offset to nonresident-name table */
+    WORD  ne_cmovent;           /* 30 # of movable entry points */
+    WORD  ne_align;             /* 32 Logical sector alignment shift count */
+    WORD  ne_cres;              /* 34 # of resource segments */
+    BYTE  ne_exetyp;            /* 36 Flags indicating target OS */
+    BYTE  ne_flagsothers;       /* 37 Additional information flags */
+    WORD  ne_pretthunks;        /* 38 Offset to return thunks */
+    WORD  ne_psegrefbytes;      /* 3a Offset to segment ref. bytes */
+    WORD  ne_swaparea;          /* 3c Reserved by Microsoft */
+    WORD  ne_expver;            /* 3e Expected Windows version number */
+} IMAGE_OS2_HEADER, *PIMAGE_OS2_HEADER;
+
+typedef struct _IMAGE_VXD_HEADER {
+  WORD  e32_magic;
+  BYTE  e32_border;
+  BYTE  e32_worder;
+  DWORD e32_level;
+  WORD  e32_cpu;
+  WORD  e32_os;
+  DWORD e32_ver;
+  DWORD e32_mflags;
+  DWORD e32_mpages;
+  DWORD e32_startobj;
+  DWORD e32_eip;
+  DWORD e32_stackobj;
+  DWORD e32_esp;
+  DWORD e32_pagesize;
+  DWORD e32_lastpagesize;
+  DWORD e32_fixupsize;
+  DWORD e32_fixupsum;
+  DWORD e32_ldrsize;
+  DWORD e32_ldrsum;
+  DWORD e32_objtab;
+  DWORD e32_objcnt;
+  DWORD e32_objmap;
+  DWORD e32_itermap;
+  DWORD e32_rsrctab;
+  DWORD e32_rsrccnt;
+  DWORD e32_restab;
+  DWORD e32_enttab;
+  DWORD e32_dirtab;
+  DWORD e32_dircnt;
+  DWORD e32_fpagetab;
+  DWORD e32_frectab;
+  DWORD e32_impmod;
+  DWORD e32_impmodcnt;
+  DWORD e32_impproc;
+  DWORD e32_pagesum;
+  DWORD e32_datapage;
+  DWORD e32_preload;
+  DWORD e32_nrestab;
+  DWORD e32_cbnrestab;
+  DWORD e32_nressum;
+  DWORD e32_autodata;
+  DWORD e32_debuginfo;
+  DWORD e32_debuglen;
+  DWORD e32_instpreload;
+  DWORD e32_instdemand;
+  DWORD e32_heapsize;
+  BYTE  e32_res3[12];
+  DWORD e32_winresoff;
+  DWORD e32_winreslen;
+  WORD  e32_devid;
+  WORD  e32_ddkver;
+} IMAGE_VXD_HEADER, *PIMAGE_VXD_HEADER;
+
+/* These defines describe the meanings of the bits in the
+   Characteristics field */
+
+#define IMAGE_FILE_RELOCS_STRIPPED	0x0001 /* No relocation info */
+#define IMAGE_FILE_EXECUTABLE_IMAGE	0x0002
+#define IMAGE_FILE_LINE_NUMS_STRIPPED   0x0004
+#define IMAGE_FILE_LOCAL_SYMS_STRIPPED  0x0008
+#define IMAGE_FILE_AGGRESIVE_WS_TRIM	0x0010
+#define IMAGE_FILE_LARGE_ADDRESS_AWARE	0x0020
+#define IMAGE_FILE_16BIT_MACHINE	0x0040
+#define IMAGE_FILE_BYTES_REVERSED_LO	0x0080
+#define IMAGE_FILE_32BIT_MACHINE	0x0100
+#define IMAGE_FILE_DEBUG_STRIPPED	0x0200
+#define IMAGE_FILE_REMOVABLE_RUN_FROM_SWAP	0x0400
+#define IMAGE_FILE_NET_RUN_FROM_SWAP	0x0800
+#define IMAGE_FILE_SYSTEM		0x1000
+#define IMAGE_FILE_DLL			0x2000
+#define IMAGE_FILE_UP_SYSTEM_ONLY	0x4000
+#define IMAGE_FILE_BYTES_REVERSED_HI	0x8000
+
+/* These are the settings of the Machine field. */
+#define	IMAGE_FILE_MACHINE_UNKNOWN	0
+#define	IMAGE_FILE_MACHINE_I860		0x014d
+#define	IMAGE_FILE_MACHINE_I386		0x014c
+#define	IMAGE_FILE_MACHINE_R3000	0x0162
+#define	IMAGE_FILE_MACHINE_R4000	0x0166
+#define	IMAGE_FILE_MACHINE_R10000	0x0168
+#define	IMAGE_FILE_MACHINE_WCEMIPSV2	0x0169
+#define	IMAGE_FILE_MACHINE_ALPHA	0x0184
+#define	IMAGE_FILE_MACHINE_SH3		0x01a2
+#define	IMAGE_FILE_MACHINE_SH3DSP	0x01a3
+#define	IMAGE_FILE_MACHINE_SH3E		0x01a4
+#define	IMAGE_FILE_MACHINE_SH4		0x01a6
+#define	IMAGE_FILE_MACHINE_SH5		0x01a8
+#define	IMAGE_FILE_MACHINE_ARM		0x01c0
+#define	IMAGE_FILE_MACHINE_THUMB	0x01c2
+#define	IMAGE_FILE_MACHINE_AM33		0x01d3
+#define	IMAGE_FILE_MACHINE_POWERPC	0x01f0
+#define	IMAGE_FILE_MACHINE_POWERPCFP	0x01f1
+#define	IMAGE_FILE_MACHINE_IA64		0x0200
+#define	IMAGE_FILE_MACHINE_MIPS16	0x0266
+#define	IMAGE_FILE_MACHINE_ALPHA64	0x0284
+#define	IMAGE_FILE_MACHINE_MIPSFPU	0x0366
+#define	IMAGE_FILE_MACHINE_MIPSFPU16	0x0466
+#define	IMAGE_FILE_MACHINE_AXP64	IMAGE_FILE_MACHINE_ALPHA64
+#define	IMAGE_FILE_MACHINE_TRICORE	0x0520
+#define	IMAGE_FILE_MACHINE_CEF		0x0cef
+#define	IMAGE_FILE_MACHINE_EBC		0x0ebc
+#define	IMAGE_FILE_MACHINE_AMD64	0x8664
+#define	IMAGE_FILE_MACHINE_M32R		0x9041
+#define	IMAGE_FILE_MACHINE_CEE		0xc0ee
+
+#define	IMAGE_SIZEOF_FILE_HEADER		20
+#define IMAGE_SIZEOF_ROM_OPTIONAL_HEADER	56
+#define IMAGE_SIZEOF_STD_OPTIONAL_HEADER	28
+#define IMAGE_SIZEOF_NT_OPTIONAL_HEADER32 	224
+#define IMAGE_SIZEOF_NT_OPTIONAL_HEADER64 	240
+#define IMAGE_SIZEOF_SHORT_NAME 		8
+#define IMAGE_SIZEOF_SECTION_HEADER 		40
+#define IMAGE_SIZEOF_SYMBOL 			18
+#define IMAGE_SIZEOF_AUX_SYMBOL 		18
+#define IMAGE_SIZEOF_RELOCATION 		10
+#define IMAGE_SIZEOF_BASE_RELOCATION 		8
+#define IMAGE_SIZEOF_LINENUMBER 		6
+#define IMAGE_SIZEOF_ARCHIVE_MEMBER_HDR 	60
+
+/* Possible Magic values */
+#define IMAGE_NT_OPTIONAL_HDR32_MAGIC        0x010b
+#define IMAGE_NT_OPTIONAL_HDR64_MAGIC        0x020b
+#define IMAGE_ROM_OPTIONAL_HDR_MAGIC       0x0107
+
+#ifdef CONFIG_X86_64
+#define IMAGE_SIZEOF_NT_OPTIONAL_HEADER IMAGE_SIZEOF_NT_OPTIONAL_HEADER64
+#define IMAGE_NT_OPTIONAL_HDR_MAGIC IMAGE_NT_OPTIONAL_HDR64_MAGIC
+#else
+#define IMAGE_SIZEOF_NT_OPTIONAL_HEADER IMAGE_SIZEOF_NT_OPTIONAL_HEADER32
+#define IMAGE_NT_OPTIONAL_HDR_MAGIC IMAGE_NT_OPTIONAL_HDR32_MAGIC
+#endif
+
+/* These are indexes into the DataDirectory array */
+#define IMAGE_FILE_EXPORT_DIRECTORY		0
+#define IMAGE_FILE_IMPORT_DIRECTORY		1
+#define IMAGE_FILE_RESOURCE_DIRECTORY		2
+#define IMAGE_FILE_EXCEPTION_DIRECTORY		3
+#define IMAGE_FILE_SECURITY_DIRECTORY		4
+#define IMAGE_FILE_BASE_RELOCATION_TABLE	5
+#define IMAGE_FILE_DEBUG_DIRECTORY		6
+#define IMAGE_FILE_DESCRIPTION_STRING		7
+#define IMAGE_FILE_MACHINE_VALUE		8  /* Mips */
+#define IMAGE_FILE_THREAD_LOCAL_STORAGE		9
+#define IMAGE_FILE_CALLBACK_DIRECTORY		10
+
+/* Directory Entries, indices into the DataDirectory array */
+
+#define	IMAGE_DIRECTORY_ENTRY_EXPORT		0
+#define	IMAGE_DIRECTORY_ENTRY_IMPORT		1
+#define	IMAGE_DIRECTORY_ENTRY_RESOURCE		2
+#define	IMAGE_DIRECTORY_ENTRY_EXCEPTION		3
+#define	IMAGE_DIRECTORY_ENTRY_SECURITY		4
+#define	IMAGE_DIRECTORY_ENTRY_BASERELOC		5
+#define	IMAGE_DIRECTORY_ENTRY_DEBUG		6
+#define	IMAGE_DIRECTORY_ENTRY_COPYRIGHT		7
+#define	IMAGE_DIRECTORY_ENTRY_GLOBALPTR		8  /* (MIPS GP) */
+#define	IMAGE_DIRECTORY_ENTRY_TLS		9
+#define	IMAGE_DIRECTORY_ENTRY_LOAD_CONFIG	10
+#define	IMAGE_DIRECTORY_ENTRY_BOUND_IMPORT	11
+#define	IMAGE_DIRECTORY_ENTRY_IAT		12  /* Import Address Table */
+#define	IMAGE_DIRECTORY_ENTRY_DELAY_IMPORT	13
+#define	IMAGE_DIRECTORY_ENTRY_COM_DESCRIPTOR	14
+
+/* Subsystem Values */
+
+#define	IMAGE_SUBSYSTEM_UNKNOWN			0
+#define	IMAGE_SUBSYSTEM_NATIVE			1
+#define	IMAGE_SUBSYSTEM_WINDOWS_GUI		2  /* Windows GUI subsystem */
+#define	IMAGE_SUBSYSTEM_WINDOWS_CUI		3  /* Windows character subsystem */
+#define	IMAGE_SUBSYSTEM_OS2_CUI			5
+#define	IMAGE_SUBSYSTEM_POSIX_CUI		7
+#define	IMAGE_SUBSYSTEM_NATIVE_WINDOWS		8  /* native Win9x driver */
+#define	IMAGE_SUBSYSTEM_WINDOWS_CE_GUI		9  /* Windows CE subsystem */
+#define	IMAGE_SUBSYSTEM_EFI_APPLICATION		10
+#define	IMAGE_SUBSYSTEM_EFI_BOOT_SERVICE_DRIVER	11
+#define	IMAGE_SUBSYSTEM_EFI_RUNTIME_DRIVER	12
+#define	IMAGE_SUBSYSTEM_EFI_ROM			13
+#define	IMAGE_SUBSYSTEM_XBOX			14
+
+typedef struct _IMAGE_FILE_HEADER {
+  WORD  Machine;
+  WORD  NumberOfSections;
+  DWORD TimeDateStamp;
+  DWORD PointerToSymbolTable;
+  DWORD NumberOfSymbols;
+  WORD  SizeOfOptionalHeader;
+  WORD  Characteristics;
+} IMAGE_FILE_HEADER, *PIMAGE_FILE_HEADER;
+
+typedef struct _IMAGE_DATA_DIRECTORY {
+  DWORD VirtualAddress;
+  DWORD Size;
+} IMAGE_DATA_DIRECTORY, *PIMAGE_DATA_DIRECTORY;
+
+#define IMAGE_NUMBEROF_DIRECTORY_ENTRIES 16
+
+typedef struct _IMAGE_OPTIONAL_HEADER32 {
+
+  /* Standard fields */
+
+  WORD  Magic;
+  BYTE  MajorLinkerVersion;
+  BYTE  MinorLinkerVersion;
+  DWORD SizeOfCode;
+  DWORD SizeOfInitializedData;
+  DWORD SizeOfUninitializedData;
+  DWORD AddressOfEntryPoint;
+  DWORD BaseOfCode;
+  DWORD BaseOfData;
+
+  /* NT additional fields */
+  DWORD ImageBase;
+  DWORD SectionAlignment;
+  DWORD FileAlignment;
+  WORD  MajorOperatingSystemVersion;
+  WORD  MinorOperatingSystemVersion;
+  WORD  MajorImageVersion;
+  WORD  MinorImageVersion;
+  WORD  MajorSubsystemVersion;
+  WORD  MinorSubsystemVersion;
+  DWORD Win32VersionValue;
+  DWORD SizeOfImage;
+  DWORD SizeOfHeaders;
+  DWORD CheckSum;
+  WORD  Subsystem;
+  WORD  DllCharacteristics;
+  DWORD SizeOfStackReserve;
+  DWORD SizeOfStackCommit;
+  DWORD SizeOfHeapReserve;
+  DWORD SizeOfHeapCommit;
+  DWORD LoaderFlags;
+  DWORD NumberOfRvaAndSizes;
+  IMAGE_DATA_DIRECTORY DataDirectory[IMAGE_NUMBEROF_DIRECTORY_ENTRIES];
+} IMAGE_OPTIONAL_HEADER32, *PIMAGE_OPTIONAL_HEADER32;
+
+typedef struct _IMAGE_OPTIONAL_HEADER64 {
+
+  /* Standard fields */
+
+  WORD  Magic;
+  BYTE  MajorLinkerVersion;
+  BYTE  MinorLinkerVersion;
+  DWORD SizeOfCode;
+  DWORD SizeOfInitializedData;
+  DWORD SizeOfUninitializedData;
+  DWORD AddressOfEntryPoint;
+  DWORD BaseOfCode;
+
+  /* NT additional fields */
+  ULONGLONG ImageBase;
+  DWORD SectionAlignment;
+  DWORD FileAlignment;
+  WORD  MajorOperatingSystemVersion;
+  WORD  MinorOperatingSystemVersion;
+  WORD  MajorImageVersion;
+  WORD  MinorImageVersion;
+  WORD  MajorSubsystemVersion;
+  WORD  MinorSubsystemVersion;
+  DWORD Win32VersionValue;
+  DWORD SizeOfImage;
+  DWORD SizeOfHeaders;
+  DWORD CheckSum;
+  WORD  Subsystem;
+  WORD  DllCharacteristics;
+  ULONGLONG SizeOfStackReserve;
+  ULONGLONG SizeOfStackCommit;
+  ULONGLONG SizeOfHeapReserve;
+  ULONGLONG SizeOfHeapCommit;
+  DWORD LoaderFlags;
+  DWORD NumberOfRvaAndSizes;
+  IMAGE_DATA_DIRECTORY DataDirectory[IMAGE_NUMBEROF_DIRECTORY_ENTRIES];
+} IMAGE_OPTIONAL_HEADER64, *PIMAGE_OPTIONAL_HEADER64;
+
+#ifdef CONFIG_X86_64
+typedef IMAGE_OPTIONAL_HEADER64 IMAGE_OPTIONAL_HEADER;
+typedef PIMAGE_OPTIONAL_HEADER64 PIMAGE_OPTIONAL_HEADER;
+#else
+typedef IMAGE_OPTIONAL_HEADER32 IMAGE_OPTIONAL_HEADER;
+typedef PIMAGE_OPTIONAL_HEADER32 PIMAGE_OPTIONAL_HEADER;
+#endif
+
+typedef struct _IMAGE_NT_HEADERS32 {
+  DWORD Signature; /* "PE"\0\0 */	/* 0x00 */
+  IMAGE_FILE_HEADER FileHeader;		/* 0x04 */
+  IMAGE_OPTIONAL_HEADER32 OptionalHeader;	/* 0x18 */
+} IMAGE_NT_HEADERS32, *PIMAGE_NT_HEADERS32;
+
+typedef struct _IMAGE_NT_HEADERS64 {
+  DWORD Signature; /* "PE"\0\0 */	/* 0x00 */
+  IMAGE_FILE_HEADER FileHeader;		/* 0x04 */
+  IMAGE_OPTIONAL_HEADER64 OptionalHeader;	/* 0x18 */
+} IMAGE_NT_HEADERS64, *PIMAGE_NT_HEADERS64;
+
+#ifdef CONFIG_X86_64
+typedef IMAGE_NT_HEADERS64 IMAGE_NT_HEADERS;
+typedef PIMAGE_NT_HEADERS64 PIMAGE_NT_HEADERS;
+#else
+typedef IMAGE_NT_HEADERS32 IMAGE_NT_HEADERS;
+typedef PIMAGE_NT_HEADERS32 PIMAGE_NT_HEADERS;
+#endif
+
+#define IMAGE_SIZEOF_SHORT_NAME 8
+
+typedef struct _IMAGE_SECTION_HEADER {
+  BYTE  Name[IMAGE_SIZEOF_SHORT_NAME];
+  union {
+    DWORD PhysicalAddress;
+    DWORD VirtualSize;
+  } Misc;
+  DWORD VirtualAddress;
+  DWORD SizeOfRawData;
+  DWORD PointerToRawData;
+  DWORD PointerToRelocations;
+  DWORD PointerToLinenumbers;
+  WORD  NumberOfRelocations;
+  WORD  NumberOfLinenumbers;
+  DWORD Characteristics;
+} IMAGE_SECTION_HEADER, *PIMAGE_SECTION_HEADER;
+
+#define	IMAGE_SIZEOF_SECTION_HEADER 40
+
+#define IMAGE_FIRST_SECTION(ntheader) \
+((PIMAGE_SECTION_HEADER)((LPBYTE)&((PIMAGE_NT_HEADERS)(ntheader))->OptionalHeader + \
+((PIMAGE_NT_HEADERS)(ntheader))->FileHeader.SizeOfOptionalHeader))
+
+/* These defines are for the Characteristics bitfield. */
+/* #define IMAGE_SCN_TYPE_REG			0x00000000 - Reserved */
+/* #define IMAGE_SCN_TYPE_DSECT			0x00000001 - Reserved */
+/* #define IMAGE_SCN_TYPE_NOLOAD		0x00000002 - Reserved */
+/* #define IMAGE_SCN_TYPE_GROUP			0x00000004 - Reserved */
+#define IMAGE_SCN_TYPE_NO_PAD			0x00000008 /* Reserved */
+/* #define IMAGE_SCN_TYPE_COPY			0x00000010 - Reserved */
+
+#define IMAGE_SCN_CNT_CODE			0x00000020
+#define IMAGE_SCN_CNT_INITIALIZED_DATA		0x00000040
+#define IMAGE_SCN_CNT_UNINITIALIZED_DATA	0x00000080
+
+#define	IMAGE_SCN_LNK_OTHER			0x00000100
+#define	IMAGE_SCN_LNK_INFO			0x00000200
+/* #define IMAGE_SCN_TYPE_OVER		0x00000400 - Reserved */
+#define	IMAGE_SCN_LNK_REMOVE			0x00000800
+#define	IMAGE_SCN_LNK_COMDAT			0x00001000
+
+/* 						0x00002000 - Reserved */
+/* #define IMAGE_SCN_MEM_PROTECTED 		0x00004000 - Obsolete */
+#define	IMAGE_SCN_MEM_FARDATA			0x00008000
+
+/* #define IMAGE_SCN_MEM_SYSHEAP		0x00010000 - Obsolete */
+#define	IMAGE_SCN_MEM_PURGEABLE			0x00020000
+#define	IMAGE_SCN_MEM_16BIT			0x00020000
+#define	IMAGE_SCN_MEM_LOCKED			0x00040000
+#define	IMAGE_SCN_MEM_PRELOAD			0x00080000
+
+#define	IMAGE_SCN_ALIGN_1BYTES			0x00100000
+#define	IMAGE_SCN_ALIGN_2BYTES			0x00200000
+#define	IMAGE_SCN_ALIGN_4BYTES			0x00300000
+#define	IMAGE_SCN_ALIGN_8BYTES			0x00400000
+#define	IMAGE_SCN_ALIGN_16BYTES			0x00500000  /* Default */
+#define	IMAGE_SCN_ALIGN_32BYTES			0x00600000
+#define	IMAGE_SCN_ALIGN_64BYTES			0x00700000
+#define	IMAGE_SCN_ALIGN_128BYTES		0x00800000
+#define	IMAGE_SCN_ALIGN_256BYTES		0x00900000
+#define	IMAGE_SCN_ALIGN_512BYTES		0x00A00000
+#define	IMAGE_SCN_ALIGN_1024BYTES		0x00B00000
+#define	IMAGE_SCN_ALIGN_2048BYTES		0x00C00000
+#define	IMAGE_SCN_ALIGN_4096BYTES		0x00D00000
+#define	IMAGE_SCN_ALIGN_8192BYTES		0x00E00000
+/* 						0x00F00000 - Unused */
+#define	IMAGE_SCN_ALIGN_MASK			0x00F00000
+
+#define IMAGE_SCN_LNK_NRELOC_OVFL		0x01000000
+
+
+#define IMAGE_SCN_MEM_DISCARDABLE		0x02000000
+#define IMAGE_SCN_MEM_NOT_CACHED		0x04000000
+#define IMAGE_SCN_MEM_NOT_PAGED			0x08000000
+#define IMAGE_SCN_MEM_SHARED			0x10000000
+#define IMAGE_SCN_MEM_EXECUTE			0x20000000
+#define IMAGE_SCN_MEM_READ			0x40000000
+#define IMAGE_SCN_MEM_WRITE			0x80000000
+
+typedef struct _IMAGE_SYMBOL {
+    union {
+        BYTE    ShortName[8];
+        struct {
+            DWORD   Short;
+            DWORD   Long;
+        } Name;
+        DWORD   LongName[2];
+    } N;
+    DWORD   Value;
+    SHORT   SectionNumber;
+    WORD    Type;
+    BYTE    StorageClass;
+    BYTE    NumberOfAuxSymbols;
+} IMAGE_SYMBOL;
+typedef IMAGE_SYMBOL *PIMAGE_SYMBOL;
+
+#define IMAGE_SIZEOF_SYMBOL 18
+
+typedef struct _IMAGE_LINENUMBER {
+    union {
+        DWORD   SymbolTableIndex;
+        DWORD   VirtualAddress;
+    } Type;
+    WORD    Linenumber;
+} IMAGE_LINENUMBER;
+typedef IMAGE_LINENUMBER *PIMAGE_LINENUMBER;
+
+#define IMAGE_SIZEOF_LINENUMBER  6
+
+typedef union _IMAGE_AUX_SYMBOL {
+    struct {
+        DWORD    TagIndex;
+        union {
+            struct {
+                WORD    Linenumber;
+                WORD    Size;
+            } LnSz;
+           DWORD    TotalSize;
+        } Misc;
+        union {
+            struct {
+                DWORD    PointerToLinenumber;
+                DWORD    PointerToNextFunction;
+            } Function;
+            struct {
+                WORD     Dimension[4];
+            } Array;
+        } FcnAry;
+        WORD    TvIndex;
+    } Sym;
+    struct {
+        BYTE    Name[IMAGE_SIZEOF_SYMBOL];
+    } File;
+    struct {
+        DWORD   Length;
+        WORD    NumberOfRelocations;
+        WORD    NumberOfLinenumbers;
+        DWORD   CheckSum;
+        SHORT   Number;
+        BYTE    Selection;
+    } Section;
+} IMAGE_AUX_SYMBOL;
+typedef IMAGE_AUX_SYMBOL *PIMAGE_AUX_SYMBOL;
+
+#define IMAGE_SIZEOF_AUX_SYMBOL 18
+
+#define IMAGE_SYM_UNDEFINED           (SHORT)0
+#define IMAGE_SYM_ABSOLUTE            (SHORT)-1
+#define IMAGE_SYM_DEBUG               (SHORT)-2
+
+#define IMAGE_SYM_TYPE_NULL                 0x0000
+#define IMAGE_SYM_TYPE_VOID                 0x0001
+#define IMAGE_SYM_TYPE_CHAR                 0x0002
+#define IMAGE_SYM_TYPE_SHORT                0x0003
+#define IMAGE_SYM_TYPE_INT                  0x0004
+#define IMAGE_SYM_TYPE_LONG                 0x0005
+#define IMAGE_SYM_TYPE_FLOAT                0x0006
+#define IMAGE_SYM_TYPE_DOUBLE               0x0007
+#define IMAGE_SYM_TYPE_STRUCT               0x0008
+#define IMAGE_SYM_TYPE_UNION                0x0009
+#define IMAGE_SYM_TYPE_ENUM                 0x000A
+#define IMAGE_SYM_TYPE_MOE                  0x000B
+#define IMAGE_SYM_TYPE_BYTE                 0x000C
+#define IMAGE_SYM_TYPE_WORD                 0x000D
+#define IMAGE_SYM_TYPE_UINT                 0x000E
+#define IMAGE_SYM_TYPE_DWORD                0x000F
+#define IMAGE_SYM_TYPE_PCODE                0x8000
+
+#define IMAGE_SYM_DTYPE_NULL                0
+#define IMAGE_SYM_DTYPE_POINTER             1
+#define IMAGE_SYM_DTYPE_FUNCTION            2
+#define IMAGE_SYM_DTYPE_ARRAY               3
+
+#define IMAGE_SYM_CLASS_END_OF_FUNCTION     (BYTE )-1
+#define IMAGE_SYM_CLASS_NULL                0x0000
+#define IMAGE_SYM_CLASS_AUTOMATIC           0x0001
+#define IMAGE_SYM_CLASS_EXTERNAL            0x0002
+#define IMAGE_SYM_CLASS_STATIC              0x0003
+#define IMAGE_SYM_CLASS_REGISTER            0x0004
+#define IMAGE_SYM_CLASS_EXTERNAL_DEF        0x0005
+#define IMAGE_SYM_CLASS_LABEL               0x0006
+#define IMAGE_SYM_CLASS_UNDEFINED_LABEL     0x0007
+#define IMAGE_SYM_CLASS_MEMBER_OF_STRUCT    0x0008
+#define IMAGE_SYM_CLASS_ARGUMENT            0x0009
+#define IMAGE_SYM_CLASS_STRUCT_TAG          0x000A
+#define IMAGE_SYM_CLASS_MEMBER_OF_UNION     0x000B
+#define IMAGE_SYM_CLASS_UNION_TAG           0x000C
+#define IMAGE_SYM_CLASS_TYPE_DEFINITION     0x000D
+#define IMAGE_SYM_CLASS_UNDEFINED_STATIC    0x000E
+#define IMAGE_SYM_CLASS_ENUM_TAG            0x000F
+#define IMAGE_SYM_CLASS_MEMBER_OF_ENUM      0x0010
+#define IMAGE_SYM_CLASS_REGISTER_PARAM      0x0011
+#define IMAGE_SYM_CLASS_BIT_FIELD           0x0012
+
+#define IMAGE_SYM_CLASS_FAR_EXTERNAL        0x0044
+#define IMAGE_SYM_CLASS_BLOCK               0x0064
+#define IMAGE_SYM_CLASS_FUNCTION            0x0065
+#define IMAGE_SYM_CLASS_END_OF_STRUCT       0x0066
+#define IMAGE_SYM_CLASS_FILE                0x0067
+#define IMAGE_SYM_CLASS_SECTION             0x0068
+#define IMAGE_SYM_CLASS_WEAK_EXTERNAL       0x0069
+
+#define N_BTMASK                            0x000F
+#define N_TMASK                             0x0030
+#define N_TMASK1                            0x00C0
+#define N_TMASK2                            0x00F0
+#define N_BTSHFT                            4
+#define N_TSHIFT                            2
+
+#define BTYPE(x) ((x) & N_BTMASK)
+
+#ifndef ISPTR
+#define ISPTR(x) (((x) & N_TMASK) == (IMAGE_SYM_DTYPE_POINTER << N_BTSHFT))
+#endif
+
+#ifndef ISFCN
+#define ISFCN(x) (((x) & N_TMASK) == (IMAGE_SYM_DTYPE_FUNCTION << N_BTSHFT))
+#endif
+
+#ifndef ISARY
+#define ISARY(x) (((x) & N_TMASK) == (IMAGE_SYM_DTYPE_ARRAY << N_BTSHFT))
+#endif
+
+#ifndef ISTAG
+#define ISTAG(x) ((x)==IMAGE_SYM_CLASS_STRUCT_TAG || (x)==IMAGE_SYM_CLASS_UNION_TAG || (x)==IMAGE_SYM_CLASS_ENUM_TAG)
+#endif
+
+#ifndef INCREF
+#define INCREF(x) ((((x)&~N_BTMASK)<<N_TSHIFT)|(IMAGE_SYM_DTYPE_POINTER<<N_BTSHFT)|((x)&N_BTMASK))
+#endif
+#ifndef DECREF
+#define DECREF(x) ((((x)>>N_TSHIFT)&~N_BTMASK)|((x)&N_BTMASK))
+#endif
+
+#define IMAGE_COMDAT_SELECT_NODUPLICATES    1
+#define IMAGE_COMDAT_SELECT_ANY             2
+#define IMAGE_COMDAT_SELECT_SAME_SIZE       3
+#define IMAGE_COMDAT_SELECT_EXACT_MATCH     4
+#define IMAGE_COMDAT_SELECT_ASSOCIATIVE     5
+#define IMAGE_COMDAT_SELECT_LARGEST         6
+#define IMAGE_COMDAT_SELECT_NEWEST          7
+
+#define IMAGE_WEAK_EXTERN_SEARCH_NOLIBRARY  1
+#define IMAGE_WEAK_EXTERN_SEARCH_LIBRARY    2
+#define IMAGE_WEAK_EXTERN_SEARCH_ALIAS      3
+
+/* Export module directory */
+
+typedef struct _IMAGE_EXPORT_DIRECTORY {
+	DWORD	Characteristics;
+	DWORD	TimeDateStamp;
+	WORD	MajorVersion;
+	WORD	MinorVersion;
+	DWORD	Name;
+	DWORD	Base;
+	DWORD	NumberOfFunctions;
+	DWORD	NumberOfNames;
+	DWORD	AddressOfFunctions;
+	DWORD	AddressOfNames;
+	DWORD	AddressOfNameOrdinals;
+} IMAGE_EXPORT_DIRECTORY,*PIMAGE_EXPORT_DIRECTORY;
+
+/* Import name entry */
+typedef struct _IMAGE_IMPORT_BY_NAME {
+	WORD	Hint;
+	BYTE	Name[1];
+} IMAGE_IMPORT_BY_NAME,*PIMAGE_IMPORT_BY_NAME;
+
+/* Import thunk */
+typedef struct _IMAGE_THUNK_DATA32 {
+	union {
+		DWORD    ForwarderString;
+		DWORD    Function;
+		DWORD    Ordinal;
+		DWORD	AddressOfData;
+	} u1;
+} IMAGE_THUNK_DATA32,*PIMAGE_THUNK_DATA32;
+
+typedef struct _IMAGE_THUNK_DATA64 {
+	union {
+		ULONGLONG    ForwarderString;
+		ULONGLONG    Function;
+		ULONGLONG    Ordinal;
+		ULONGLONG    AddressOfData;
+	} u1;
+} IMAGE_THUNK_DATA64,*PIMAGE_THUNK_DATA64;
+
+#ifdef CONFIG_X86_64
+typedef IMAGE_THUNK_DATA32 IMAGE_THUNK_DATA;
+typedef PIMAGE_THUNK_DATA32 PIMAGE_THUNK_DATA;
+#else
+typedef IMAGE_THUNK_DATA64 IMAGE_THUNK_DATA;
+typedef PIMAGE_THUNK_DATA64 PIMAGE_THUNK_DATA;
+#endif
+
+/* Import module directory */
+
+typedef struct packed _IMAGE_IMPORT_DESCRIPTOR {
+	union {
+		DWORD	Characteristics; /* 0 for terminating null
+					  * import descriptor */
+		DWORD   OriginalFirstThunk; /* RVA to original unbound
+					     * IAT */
+	} u;
+	DWORD	TimeDateStamp;	/* 0 if not bound,
+				 * -1 if bound, and real date\time stamp
+				 *    in IMAGE_DIRECTORY_ENTRY_BOUND_IMPORT
+				 * (new BIND)
+				 * otherwise date/time stamp of DLL bound to
+				 * (Old BIND)
+				 */
+	DWORD	ForwarderChain;	/* -1 if no forwarders */
+	DWORD	Name;
+	/* RVA to IAT (if bound this IAT has actual addresses) */
+	DWORD   FirstThunk;
+} IMAGE_IMPORT_DESCRIPTOR,*PIMAGE_IMPORT_DESCRIPTOR;
+
+#define	IMAGE_ORDINAL_FLAG32		0x80000000
+#define	IMAGE_ORDINAL_FLAG64		0x8000000000000000UL
+#define	IMAGE_SNAP_BY_ORDINAL32(Ordinal) ((Ordinal & IMAGE_ORDINAL_FLAG32) != 0)
+#define	IMAGE_SNAP_BY_ORDINAL64(Ordinal) ((Ordinal & IMAGE_ORDINAL_FLAG64) != 0)
+#define	IMAGE_ORDINAL(Ordinal) (Ordinal & 0xffff)
+
+#ifdef CONFIG_X86_64
+#define IMAGE_ORDINAL_FLAG IMAGE_ORDINAL_FLAG64
+#define IMAGE_SNAP_BY_ORDINAL IMAGE_SNAP_BY_ORDINAL64
+#else
+#define IMAGE_ORDINAL_FLAG IMAGE_ORDINAL_FLAG32
+#define IMAGE_SNAP_BY_ORDINAL IMAGE_SNAP_BY_ORDINAL32
+#endif
+
+typedef struct _IMAGE_BOUND_IMPORT_DESCRIPTOR
+{
+    DWORD   TimeDateStamp;
+    WORD    OffsetModuleName;
+    WORD    NumberOfModuleForwarderRefs;
+/* Array of zero or more IMAGE_BOUND_FORWARDER_REF follows */
+} IMAGE_BOUND_IMPORT_DESCRIPTOR,  *PIMAGE_BOUND_IMPORT_DESCRIPTOR;
+
+typedef struct _IMAGE_BOUND_FORWARDER_REF
+{
+    DWORD   TimeDateStamp;
+    WORD    OffsetModuleName;
+    WORD    Reserved;
+} IMAGE_BOUND_FORWARDER_REF, *PIMAGE_BOUND_FORWARDER_REF;
+
+typedef struct _IMAGE_BASE_RELOCATION
+{
+	DWORD	VirtualAddress;
+	DWORD	SizeOfBlock;
+	WORD	TypeOffset[0];
+} IMAGE_BASE_RELOCATION,*PIMAGE_BASE_RELOCATION;
+
+typedef struct _IMAGE_RELOCATION
+{
+    union {
+        DWORD   VirtualAddress;
+        DWORD   RelocCount;
+    } DUMMYUNIONNAME;
+    DWORD   SymbolTableIndex;
+    WORD    Type;
+} IMAGE_RELOCATION, *PIMAGE_RELOCATION;
+
+#define IMAGE_SIZEOF_RELOCATION 10
+
+/* generic relocation types */
+#define IMAGE_REL_BASED_ABSOLUTE 		0
+#define IMAGE_REL_BASED_HIGH			1
+#define IMAGE_REL_BASED_LOW			2
+#define IMAGE_REL_BASED_HIGHLOW			3
+#define IMAGE_REL_BASED_HIGHADJ			4
+#define IMAGE_REL_BASED_MIPS_JMPADDR		5
+#define IMAGE_REL_BASED_SECTION			6
+#define	IMAGE_REL_BASED_REL			7
+#define IMAGE_REL_BASED_MIPS_JMPADDR16		9
+#define IMAGE_REL_BASED_IA64_IMM64		9 /* yes, 9 too */
+#define IMAGE_REL_BASED_DIR64			10
+#define IMAGE_REL_BASED_HIGH3ADJ		11
+
+/* I386 relocation types */
+#define	IMAGE_REL_I386_ABSOLUTE			0
+#define	IMAGE_REL_I386_DIR16			1
+#define	IMAGE_REL_I386_REL16			2
+#define	IMAGE_REL_I386_DIR32			6
+#define	IMAGE_REL_I386_DIR32NB			7
+#define	IMAGE_REL_I386_SEG12			9
+#define	IMAGE_REL_I386_SECTION			10
+#define	IMAGE_REL_I386_SECREL			11
+#define	IMAGE_REL_I386_REL32			20
+
+/* MIPS relocation types */
+#define IMAGE_REL_MIPS_ABSOLUTE		0x0000
+#define IMAGE_REL_MIPS_REFHALF		0x0001
+#define IMAGE_REL_MIPS_REFWORD		0x0002
+#define IMAGE_REL_MIPS_JMPADDR		0x0003
+#define IMAGE_REL_MIPS_REFHI		0x0004
+#define IMAGE_REL_MIPS_REFLO		0x0005
+#define IMAGE_REL_MIPS_GPREL		0x0006
+#define IMAGE_REL_MIPS_LITERAL		0x0007
+#define IMAGE_REL_MIPS_SECTION		0x000A
+#define IMAGE_REL_MIPS_SECREL		0x000B
+#define IMAGE_REL_MIPS_SECRELLO		0x000C
+#define IMAGE_REL_MIPS_SECRELHI		0x000D
+#define	IMAGE_REL_MIPS_JMPADDR16	0x0010
+#define IMAGE_REL_MIPS_REFWORDNB	0x0022
+#define IMAGE_REL_MIPS_PAIR		0x0025
+
+/* ALPHA relocation types */
+#define IMAGE_REL_ALPHA_ABSOLUTE	0x0000
+#define IMAGE_REL_ALPHA_REFLONG		0x0001
+#define IMAGE_REL_ALPHA_REFQUAD		0x0002
+#define IMAGE_REL_ALPHA_GPREL		0x0003
+#define IMAGE_REL_ALPHA_LITERAL		0x0004
+#define IMAGE_REL_ALPHA_LITUSE		0x0005
+#define IMAGE_REL_ALPHA_GPDISP		0x0006
+#define IMAGE_REL_ALPHA_BRADDR		0x0007
+#define IMAGE_REL_ALPHA_HINT		0x0008
+#define IMAGE_REL_ALPHA_INLINE_REFLONG	0x0009
+#define IMAGE_REL_ALPHA_REFHI		0x000A
+#define IMAGE_REL_ALPHA_REFLO		0x000B
+#define IMAGE_REL_ALPHA_PAIR		0x000C
+#define IMAGE_REL_ALPHA_MATCH		0x000D
+#define IMAGE_REL_ALPHA_SECTION		0x000E
+#define IMAGE_REL_ALPHA_SECREL		0x000F
+#define IMAGE_REL_ALPHA_REFLONGNB	0x0010
+#define IMAGE_REL_ALPHA_SECRELLO	0x0011
+#define IMAGE_REL_ALPHA_SECRELHI	0x0012
+#define IMAGE_REL_ALPHA_REFQ3		0x0013
+#define IMAGE_REL_ALPHA_REFQ2		0x0014
+#define IMAGE_REL_ALPHA_REFQ1		0x0015
+#define IMAGE_REL_ALPHA_GPRELLO		0x0016
+#define IMAGE_REL_ALPHA_GPRELHI		0x0017
+
+/* PowerPC relocation types */
+#define IMAGE_REL_PPC_ABSOLUTE          0x0000
+#define IMAGE_REL_PPC_ADDR64            0x0001
+#define IMAGE_REL_PPC_ADDR            0x0002
+#define IMAGE_REL_PPC_ADDR24            0x0003
+#define IMAGE_REL_PPC_ADDR16            0x0004
+#define IMAGE_REL_PPC_ADDR14            0x0005
+#define IMAGE_REL_PPC_REL24             0x0006
+#define IMAGE_REL_PPC_REL14             0x0007
+#define IMAGE_REL_PPC_TOCREL16          0x0008
+#define IMAGE_REL_PPC_TOCREL14          0x0009
+#define IMAGE_REL_PPC_ADDR32NB          0x000A
+#define IMAGE_REL_PPC_SECREL            0x000B
+#define IMAGE_REL_PPC_SECTION           0x000C
+#define IMAGE_REL_PPC_IFGLUE            0x000D
+#define IMAGE_REL_PPC_IMGLUE            0x000E
+#define IMAGE_REL_PPC_SECREL16          0x000F
+#define IMAGE_REL_PPC_REFHI             0x0010
+#define IMAGE_REL_PPC_REFLO             0x0011
+#define IMAGE_REL_PPC_PAIR              0x0012
+#define IMAGE_REL_PPC_SECRELLO          0x0013
+#define IMAGE_REL_PPC_SECRELHI          0x0014
+#define IMAGE_REL_PPC_GPREL		0x0015
+#define IMAGE_REL_PPC_TYPEMASK          0x00FF
+/* modifier bits */
+#define IMAGE_REL_PPC_NEG               0x0100
+#define IMAGE_REL_PPC_BRTAKEN           0x0200
+#define IMAGE_REL_PPC_BRNTAKEN          0x0400
+#define IMAGE_REL_PPC_TOCDEFN           0x0800
+
+/* SH3 ? relocation type */
+#define IMAGE_REL_SH3_ABSOLUTE          0x0000
+#define IMAGE_REL_SH3_DIRECT16          0x0001
+#define IMAGE_REL_SH3_DIRECT          0x0002
+#define IMAGE_REL_SH3_DIRECT8           0x0003
+#define IMAGE_REL_SH3_DIRECT8_WORD      0x0004
+#define IMAGE_REL_SH3_DIRECT8_LONG      0x0005
+#define IMAGE_REL_SH3_DIRECT4           0x0006
+#define IMAGE_REL_SH3_DIRECT4_WORD      0x0007
+#define IMAGE_REL_SH3_DIRECT4_LONG      0x0008
+#define IMAGE_REL_SH3_PCREL8_WORD       0x0009
+#define IMAGE_REL_SH3_PCREL8_LONG       0x000A
+#define IMAGE_REL_SH3_PCREL12_WORD      0x000B
+#define IMAGE_REL_SH3_STARTOF_SECTION   0x000C
+#define IMAGE_REL_SH3_SIZEOF_SECTION    0x000D
+#define IMAGE_REL_SH3_SECTION           0x000E
+#define IMAGE_REL_SH3_SECREL            0x000F
+#define IMAGE_REL_SH3_DIRECT32_NB       0x0010
+
+/* ARM (Archimedes?) relocation types */
+#define IMAGE_REL_ARM_ABSOLUTE		0x0000
+#define IMAGE_REL_ARM_ADDR		0x0001
+#define IMAGE_REL_ARM_ADDR32NB		0x0002
+#define IMAGE_REL_ARM_BRANCH24		0x0003
+#define IMAGE_REL_ARM_BRANCH11		0x0004
+#define IMAGE_REL_ARM_SECTION		0x000E
+#define IMAGE_REL_ARM_SECREL		0x000F
+
+/* IA64 relocation types */
+#define IMAGE_REL_IA64_ABSOLUTE		0x0000
+#define IMAGE_REL_IA64_IMM14		0x0001
+#define IMAGE_REL_IA64_IMM22		0x0002
+#define IMAGE_REL_IA64_IMM64		0x0003
+#define IMAGE_REL_IA64_DIR		0x0004
+#define IMAGE_REL_IA64_DIR64		0x0005
+#define IMAGE_REL_IA64_PCREL21B		0x0006
+#define IMAGE_REL_IA64_PCREL21M		0x0007
+#define IMAGE_REL_IA64_PCREL21F		0x0008
+#define IMAGE_REL_IA64_GPREL22		0x0009
+#define IMAGE_REL_IA64_LTOFF22		0x000A
+#define IMAGE_REL_IA64_SECTION		0x000B
+#define IMAGE_REL_IA64_SECREL22		0x000C
+#define IMAGE_REL_IA64_SECREL64I	0x000D
+#define IMAGE_REL_IA64_SECREL		0x000E
+#define IMAGE_REL_IA64_LTOFF64		0x000F
+#define IMAGE_REL_IA64_DIR32NB		0x0010
+#define IMAGE_REL_IA64_RESERVED_11	0x0011
+#define IMAGE_REL_IA64_RESERVED_12	0x0012
+#define IMAGE_REL_IA64_RESERVED_13	0x0013
+#define IMAGE_REL_IA64_RESERVED_14	0x0014
+#define IMAGE_REL_IA64_RESERVED_15	0x0015
+#define IMAGE_REL_IA64_RESERVED_16	0x0016
+#define IMAGE_REL_IA64_ADDEND		0x001F
+
+/* archive format */
+
+#define IMAGE_ARCHIVE_START_SIZE             8
+#define IMAGE_ARCHIVE_START                  "!<arch>\n"
+#define IMAGE_ARCHIVE_END                    "`\n"
+#define IMAGE_ARCHIVE_PAD                    "\n"
+#define IMAGE_ARCHIVE_LINKER_MEMBER          "/               "
+#define IMAGE_ARCHIVE_LONGNAMES_MEMBER       "//              "
+
+typedef struct _IMAGE_ARCHIVE_MEMBER_HEADER
+{
+    BYTE     Name[16];
+    BYTE     Date[12];
+    BYTE     UserID[6];
+    BYTE     GroupID[6];
+    BYTE     Mode[8];
+    BYTE     Size[10];
+    BYTE     EndHeader[2];
+} IMAGE_ARCHIVE_MEMBER_HEADER, *PIMAGE_ARCHIVE_MEMBER_HEADER;
+
+#define IMAGE_SIZEOF_ARCHIVE_MEMBER_HDR 60
+
+/*
+ * Resource directory stuff
+ */
+typedef struct _IMAGE_RESOURCE_DIRECTORY {
+	DWORD	Characteristics;
+	DWORD	TimeDateStamp;
+	WORD	MajorVersion;
+	WORD	MinorVersion;
+	WORD	NumberOfNamedEntries;
+	WORD	NumberOfIdEntries;
+	/*  IMAGE_RESOURCE_DIRECTORY_ENTRY DirectoryEntries[]; */
+} IMAGE_RESOURCE_DIRECTORY,*PIMAGE_RESOURCE_DIRECTORY;
+
+#define	IMAGE_RESOURCE_NAME_IS_STRING		0x80000000
+#define	IMAGE_RESOURCE_DATA_IS_DIRECTORY	0x80000000
+
+typedef struct _IMAGE_RESOURCE_DIRECTORY_ENTRY {
+	union {
+		struct {
+#ifdef BITFIELDS_BIGENDIAN
+			unsigned NameIsString:1;
+			unsigned NameOffset:31;
+#else
+			unsigned NameOffset:31;
+			unsigned NameIsString:1;
+#endif
+		} DUMMYSTRUCTNAME1;
+		DWORD   Name;
+                struct {
+#ifdef WORDS_BIGENDIAN
+			WORD    __pad;
+			WORD    Id;
+#else
+			WORD    Id;
+			WORD    __pad;
+#endif
+		} DUMMYSTRUCTNAME2;
+	} DUMMYUNIONNAME1;
+	union {
+		DWORD   OffsetToData;
+		struct {
+#ifdef BITFIELDS_BIGENDIAN
+			unsigned DataIsDirectory:1;
+			unsigned OffsetToDirectory:31;
+#else
+			unsigned OffsetToDirectory:31;
+			unsigned DataIsDirectory:1;
+#endif
+		} DUMMYSTRUCTNAME3;
+	} DUMMYUNIONNAME2;
+} IMAGE_RESOURCE_DIRECTORY_ENTRY,*PIMAGE_RESOURCE_DIRECTORY_ENTRY;
+
+
+typedef struct _IMAGE_RESOURCE_DIRECTORY_STRING {
+	WORD	Length;
+	CHAR	NameString[ 1 ];
+} IMAGE_RESOURCE_DIRECTORY_STRING,*PIMAGE_RESOURCE_DIRECTORY_STRING;
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/ndiswrapper/loader.c
+++ linux-mvl-dove-2.6.32/ubuntu/ndiswrapper/loader.c
@@ -0,0 +1,877 @@
+/*
+ *  Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *  GNU General Public License for more details.
+ *
+ */
+
+#include "ndis.h"
+#include "loader.h"
+#include "wrapndis.h"
+#include "pnp.h"
+
+#include <linux/module.h>
+#include <linux/kmod.h>
+#include <linux/miscdevice.h>
+#include <asm/uaccess.h>
+
+/*
+  Network adapter: ClassGuid = {4d36e972-e325-11ce-bfc1-08002be10318}
+  Network client: ClassGuid = {4d36e973-e325-11ce-bfc1-08002be10318}
+  PCMCIA adapter: ClassGuid = {4d36e977-e325-11ce-bfc1-08002be10318}
+  USB: ClassGuid = {36fc9e60-c465-11cf-8056-444553540000}
+*/
+
+/* the indices used here must match macros WRAP_NDIS_DEVICE etc. */
+static struct guid class_guids[] = {
+	/* Network */
+	{0x4d36e972, 0xe325, 0x11ce, },
+	/* USB WDM */
+	{0x36fc9e60, 0xc465, 0x11cf, },
+	/* Bluetooth */
+	{0xe0cbf06c, 0xcd8b, 0x4647, },
+	/* ivtcorporatino.com's bluetooth device claims this is
+	 * bluetooth guid */
+	{0xf12d3cf8, 0xb11d, 0x457e, },
+};
+
+struct semaphore loader_mutex;
+static struct completion loader_complete;
+
+static struct nt_list wrap_devices;
+static struct nt_list wrap_drivers;
+
+static int wrap_device_type(int data1)
+{
+	int i;
+	for (i = 0; i < sizeof(class_guids) / sizeof(class_guids[0]); i++)
+		if (data1 == class_guids[i].data1)
+			return i;
+	ERROR("unknown device: 0x%x\n", data1);
+	return -1;
+}
+
+/* load driver for given device, if not already loaded */
+struct wrap_driver *load_wrap_driver(struct wrap_device *wd)
+{
+	int ret;
+	struct nt_list *cur;
+	struct wrap_driver *wrap_driver;
+
+	ENTER1("device: %04X:%04X:%04X:%04X", wd->vendor, wd->device,
+	       wd->subvendor, wd->subdevice);
+	if (down_interruptible(&loader_mutex)) {
+		WARNING("couldn't obtain loader_mutex");
+		EXIT1(return NULL);
+	}
+	wrap_driver = NULL;
+	nt_list_for_each(cur, &wrap_drivers) {
+		wrap_driver = container_of(cur, struct wrap_driver, list);
+		if (!stricmp(wrap_driver->name, wd->driver_name)) {
+			TRACE1("driver %s already loaded", wrap_driver->name);
+			break;
+		} else
+			wrap_driver = NULL;
+	}
+	up(&loader_mutex);
+
+	if (!wrap_driver) {
+		char *argv[] = {"loadndisdriver", WRAP_CMD_LOAD_DRIVER,
+#if defined(DEBUG) && DEBUG >= 1
+				"1",
+#else
+				"0",
+#endif
+				UTILS_VERSION, wd->driver_name,
+				wd->conf_file_name, NULL};
+		char *env[] = {NULL};
+
+		TRACE1("loading driver %s", wd->driver_name);
+		if (down_interruptible(&loader_mutex)) {
+			WARNING("couldn't obtain loader_mutex");
+			EXIT1(return NULL);
+		}
+		INIT_COMPLETION(loader_complete);
+		ret = call_usermodehelper("/sbin/loadndisdriver", argv, env, 1);
+		if (ret) {
+			up(&loader_mutex);
+			ERROR("couldn't load driver %s; check system log "
+			      "for messages from 'loadndisdriver'",
+			      wd->driver_name);
+			EXIT1(return NULL);
+		}
+		wait_for_completion(&loader_complete);
+		TRACE1("%s", wd->driver_name);
+		wrap_driver = NULL;
+		nt_list_for_each(cur, &wrap_drivers) {
+			wrap_driver = container_of(cur, struct wrap_driver,
+						   list);
+			if (!stricmp(wrap_driver->name, wd->driver_name)) {
+				wd->driver = wrap_driver;
+				break;
+			} else
+				wrap_driver = NULL;
+		}
+		up(&loader_mutex);
+		if (wrap_driver)
+			TRACE1("driver %s is loaded", wrap_driver->name);
+		else
+			ERROR("couldn't load driver '%s'", wd->driver_name);
+	}
+	EXIT1(return wrap_driver);
+}
+
+/* load the driver files from userspace. */
+static int load_sys_files(struct wrap_driver *driver,
+			  struct load_driver *load_driver)
+{
+	int i, err;
+
+	TRACE1("num_pe_images = %d", load_driver->num_sys_files);
+	TRACE1("loading driver: %s", load_driver->name);
+	strncpy(driver->name, load_driver->name, sizeof(driver->name));
+	driver->name[sizeof(driver->name)-1] = 0;
+	TRACE1("driver: %s", driver->name);
+	err = 0;
+	driver->num_pe_images = 0;
+	for (i = 0; i < load_driver->num_sys_files; i++) {
+		struct pe_image *pe_image;
+		pe_image = &driver->pe_images[driver->num_pe_images];
+
+		strncpy(pe_image->name, load_driver->sys_files[i].name,
+			sizeof(pe_image->name));
+		pe_image->name[sizeof(pe_image->name)-1] = 0;
+		TRACE1("image size: %lu bytes",
+		       (unsigned long)load_driver->sys_files[i].size);
+
+#ifdef CONFIG_X86_64
+#ifdef PAGE_KERNEL_EXECUTABLE
+		pe_image->image =
+			__vmalloc(load_driver->sys_files[i].size,
+				  GFP_KERNEL | __GFP_HIGHMEM,
+				  PAGE_KERNEL_EXECUTABLE);
+#elif defined PAGE_KERNEL_EXEC
+		pe_image->image =
+			__vmalloc(load_driver->sys_files[i].size,
+				  GFP_KERNEL | __GFP_HIGHMEM,
+				  PAGE_KERNEL_EXEC);
+#else
+#error x86_64 should have either PAGE_KERNEL_EXECUTABLE or PAGE_KERNEL_EXEC
+#endif
+#else
+		/* hate to play with kernel macros, but PAGE_KERNEL_EXEC is
+		 * not available to modules! */
+#ifdef cpu_has_nx
+		if (cpu_has_nx)
+			pe_image->image =
+				__vmalloc(load_driver->sys_files[i].size,
+					  GFP_KERNEL | __GFP_HIGHMEM,
+					  __pgprot(__PAGE_KERNEL & ~_PAGE_NX));
+		else
+			pe_image->image =
+				vmalloc(load_driver->sys_files[i].size);
+#else
+			pe_image->image =
+				vmalloc(load_driver->sys_files[i].size);
+#endif
+#endif
+		if (!pe_image->image) {
+			ERROR("couldn't allocate memory");
+			err = -ENOMEM;
+			break;
+		}
+		TRACE1("image is at %p", pe_image->image);
+
+		if (copy_from_user(pe_image->image,
+				   load_driver->sys_files[i].data,
+				   load_driver->sys_files[i].size)) {
+			ERROR("couldn't load file %s",
+			      load_driver->sys_files[i].name);
+			err = -EFAULT;
+			break;
+		}
+		pe_image->size = load_driver->sys_files[i].size;
+		driver->num_pe_images++;
+	}
+
+	if (!err && link_pe_images(driver->pe_images, driver->num_pe_images)) {
+		ERROR("couldn't prepare driver '%s'", load_driver->name);
+		err = -EINVAL;
+	}
+
+	if (driver->num_pe_images < load_driver->num_sys_files || err) {
+		for (i = 0; i < driver->num_pe_images; i++)
+			if (driver->pe_images[i].image)
+				vfree(driver->pe_images[i].image);
+		driver->num_pe_images = 0;
+		EXIT1(return err);
+	} else
+		EXIT1(return 0);
+}
+
+struct wrap_bin_file *get_bin_file(char *bin_file_name)
+{
+	int i = 0;
+	struct wrap_driver *driver, *cur;
+
+	ENTER1("%s", bin_file_name);
+	if (down_interruptible(&loader_mutex)) {
+		WARNING("couldn't obtain loader_mutex");
+		EXIT1(return NULL);
+	}
+	driver = NULL;
+	nt_list_for_each_entry(cur, &wrap_drivers, list) {
+		for (i = 0; i < cur->num_bin_files; i++)
+			if (!stricmp(cur->bin_files[i].name, bin_file_name)) {
+				driver = cur;
+				break;
+			}
+		if (driver)
+			break;
+	}
+	up(&loader_mutex);
+	if (!driver) {
+		TRACE1("coudln't find bin file '%s'", bin_file_name);
+		return NULL;
+	}
+
+	if (!driver->bin_files[i].data) {
+		char *argv[] = {"loadndisdriver", WRAP_CMD_LOAD_BIN_FILE,
+#if defined(DEBUG) && DEBUG >= 1
+				"1",
+#else
+				"0",
+#endif
+				UTILS_VERSION, driver->name,
+				driver->bin_files[i].name, NULL};
+		char *env[] = {NULL};
+		int ret;
+
+		TRACE1("loading bin file %s/%s", driver->name,
+		       driver->bin_files[i].name);
+		if (down_interruptible(&loader_mutex)) {
+			WARNING("couldn't obtain loader_mutex");
+			EXIT1(return NULL);
+		}
+		INIT_COMPLETION(loader_complete);
+		ret = call_usermodehelper("/sbin/loadndisdriver", argv, env, 1);
+		if (ret) {
+			up(&loader_mutex);
+			ERROR("couldn't load file %s/%s; check system log "
+			      "for messages from 'loadndisdriver' (%d)",
+			      driver->name, driver->bin_files[i].name, ret);
+			EXIT1(return NULL);
+		}
+		wait_for_completion(&loader_complete);
+		up(&loader_mutex);
+		if (!driver->bin_files[i].data) {
+			WARNING("couldn't load binary file %s",
+				driver->bin_files[i].name);
+			EXIT1(return NULL);
+		}
+	}
+	EXIT2(return &(driver->bin_files[i]));
+}
+
+/* called with loader_mutex down */
+static int add_bin_file(struct load_driver_file *driver_file)
+{
+	struct wrap_driver *driver, *cur;
+	struct wrap_bin_file *bin_file;
+	int i = 0;
+
+	driver = NULL;
+	nt_list_for_each_entry(cur, &wrap_drivers, list) {
+		for (i = 0; i < cur->num_bin_files; i++)
+			if (!stricmp(cur->bin_files[i].name,
+				     driver_file->name)) {
+				driver = cur;
+				break;
+			}
+		if (driver)
+			break;
+	}
+	if (!driver) {
+		ERROR("couldn't find %s", driver_file->name);
+		return -EINVAL;
+	}
+	bin_file = &driver->bin_files[i];
+	strncpy(bin_file->name, driver_file->name, sizeof(bin_file->name));
+	bin_file->name[sizeof(bin_file->name)-1] = 0;
+	bin_file->data = vmalloc(driver_file->size);
+	if (!bin_file->data) {
+		ERROR("couldn't allocate memory");
+		return -ENOMEM;
+	}
+	bin_file->size = driver_file->size;
+	if (copy_from_user(bin_file->data, driver_file->data, bin_file->size)) {
+		ERROR("couldn't copy data");
+		free_bin_file(bin_file);
+		return -EFAULT;
+	}
+	return 0;
+}
+
+void free_bin_file(struct wrap_bin_file *bin_file)
+{
+	TRACE2("unloading %s", bin_file->name);
+	if (bin_file->data)
+		vfree(bin_file->data);
+	bin_file->data = NULL;
+	bin_file->size = 0;
+	EXIT2(return);
+}
+
+/* load firmware files from userspace */
+static int load_bin_files_info(struct wrap_driver *driver,
+			       struct load_driver *load_driver)
+{
+	struct wrap_bin_file *bin_files;
+	int i;
+
+	ENTER1("%s, %d", load_driver->name, load_driver->num_bin_files);
+	driver->num_bin_files = 0;
+	driver->bin_files = NULL;
+	if (load_driver->num_bin_files == 0)
+		EXIT1(return 0);
+	bin_files = kzalloc(load_driver->num_bin_files * sizeof(*bin_files),
+			    GFP_KERNEL);
+	if (!bin_files) {
+		ERROR("couldn't allocate memory");
+		EXIT1(return -ENOMEM);
+	}
+
+	for (i = 0; i < load_driver->num_bin_files; i++) {
+		strncpy(bin_files[i].name, load_driver->bin_files[i].name,
+			sizeof(bin_files[i].name));
+		bin_files[i].name[sizeof(bin_files[i].name)-1] = 0;
+		TRACE2("loaded bin file %s", bin_files[i].name);
+	}
+	driver->num_bin_files = load_driver->num_bin_files;
+	driver->bin_files = bin_files;
+	EXIT1(return 0);
+}
+
+/* load settnigs for a device. called with loader_mutex down */
+static int load_settings(struct wrap_driver *wrap_driver,
+			 struct load_driver *load_driver)
+{
+	int i, num_settings;
+
+	ENTER1("%p, %p", wrap_driver, load_driver);
+
+	num_settings = 0;
+	for (i = 0; i < load_driver->num_settings; i++) {
+		struct load_device_setting *load_setting =
+			&load_driver->settings[i];
+		struct wrap_device_setting *setting;
+		ULONG data1;
+
+		setting = kzalloc(sizeof(*setting), GFP_KERNEL);
+		if (!setting) {
+			ERROR("couldn't allocate memory");
+			break;
+		}
+		strncpy(setting->name, load_setting->name,
+			sizeof(setting->name));
+		setting->name[sizeof(setting->name)-1] = 0;
+		strncpy(setting->value, load_setting->value,
+		       sizeof(setting->value));
+		setting->value[sizeof(setting->value)-1] = 0;
+		TRACE2("%p: %s=%s", setting, setting->name, setting->value);
+
+		if (strcmp(setting->name, "driver_version") == 0) {
+			strncpy(wrap_driver->version, setting->value,
+				sizeof(wrap_driver->version));
+			wrap_driver->version[sizeof(wrap_driver->version)-1] = 0;
+		} else if (strcmp(setting->name, "class_guid") == 0 &&
+			   sscanf(setting->value, "%x", &data1) == 1) {
+			wrap_driver->dev_type = wrap_device_type(data1);
+			if (wrap_driver->dev_type < 0) {
+				WARNING("unknown guid: %x", data1);
+				wrap_driver->dev_type = 0;
+			}
+		}
+		InsertTailList(&wrap_driver->settings, &setting->list);
+		num_settings++;
+	}
+	/* it is not a fatal error if some settings couldn't be loaded */
+	if (num_settings > 0)
+		EXIT1(return 0);
+	else
+		EXIT1(return -EINVAL);
+}
+
+void unload_wrap_device(struct wrap_device *wd)
+{
+	struct nt_list *cur;
+	ENTER1("unloading device %p (%04X:%04X:%04X:%04X), driver %s", wd,
+	       wd->vendor, wd->device, wd->subvendor, wd->subdevice,
+	       wd->driver_name);
+	if (down_interruptible(&loader_mutex))
+		WARNING("couldn't obtain loader_mutex");
+	while ((cur = RemoveHeadList(&wd->settings))) {
+		struct wrap_device_setting *setting;
+		setting = container_of(cur, struct wrap_device_setting, list);
+		kfree(setting);
+	}
+	RemoveEntryList(&wd->list);
+	up(&loader_mutex);
+	kfree(wd);
+	EXIT1(return);
+}
+
+/* should be called with loader_mutex down */
+void unload_wrap_driver(struct wrap_driver *driver)
+{
+	int i;
+	struct driver_object *drv_obj;
+	struct nt_list *cur, *next;
+
+	ENTER1("unloading driver: %s (%p)", driver->name, driver);
+	TRACE1("freeing %d images", driver->num_pe_images);
+	drv_obj = driver->drv_obj;
+	for (i = 0; i < driver->num_pe_images; i++)
+		if (driver->pe_images[i].image) {
+			TRACE1("freeing image at %p",
+			       driver->pe_images[i].image);
+			vfree(driver->pe_images[i].image);
+		}
+
+	TRACE1("freeing %d bin files", driver->num_bin_files);
+	for (i = 0; i < driver->num_bin_files; i++) {
+		TRACE1("freeing image at %p", driver->bin_files[i].data);
+		if (driver->bin_files[i].data)
+			vfree(driver->bin_files[i].data);
+	}
+	if (driver->bin_files)
+		kfree(driver->bin_files);
+	RtlFreeUnicodeString(&drv_obj->name);
+	RemoveEntryList(&driver->list);
+	nt_list_for_each_safe(cur, next, &driver->settings) {
+		struct wrap_device_setting *setting;
+		struct ndis_configuration_parameter *param;
+
+		setting = container_of(cur, struct wrap_device_setting, list);
+		TRACE2("%p", setting);
+		param = setting->encoded;
+		if (param) {
+			TRACE2("%p", param);
+			if (param->type == NdisParameterString)
+				RtlFreeUnicodeString(&param->data.string);
+			ExFreePool(param);
+		}
+		kfree(setting);
+	}
+	/* this frees driver */
+	free_custom_extensions(drv_obj->drv_ext);
+	kfree(drv_obj->drv_ext);
+	TRACE1("drv_obj: %p", drv_obj);
+
+	EXIT1(return);
+}
+
+/* call the entry point of the driver */
+static int start_wrap_driver(struct wrap_driver *driver)
+{
+	int i;
+	NTSTATUS ret, res;
+	struct driver_object *drv_obj;
+	typeof(driver->pe_images[0].entry) entry;
+
+	ENTER1("%s", driver->name);
+	drv_obj = driver->drv_obj;
+	for (ret = res = 0, i = 0; i < driver->num_pe_images; i++)
+		/* dlls are already started by loader */
+		if (driver->pe_images[i].type == IMAGE_FILE_EXECUTABLE_IMAGE) {
+			entry = driver->pe_images[i].entry;
+			drv_obj->start = driver->pe_images[i].entry;
+			drv_obj->driver_size = driver->pe_images[i].size;
+			TRACE1("entry: %p, %p, drv_obj: %p",
+			       entry, *entry, drv_obj);
+			res = LIN2WIN2(entry, drv_obj, &drv_obj->name);
+			ret |= res;
+			TRACE1("entry returns %08X", res);
+			break;
+		}
+	if (ret) {
+		ERROR("driver initialization failed: %08X", ret);
+		RtlFreeUnicodeString(&drv_obj->name);
+		/* this frees ndis_driver */
+		free_custom_extensions(drv_obj->drv_ext);
+		kfree(drv_obj->drv_ext);
+		TRACE1("drv_obj: %p", drv_obj);
+		ObDereferenceObject(drv_obj);
+		EXIT1(return -EINVAL);
+	}
+	EXIT1(return 0);
+}
+
+/*
+ * add driver to list of loaded driver but make sure this driver is
+ * not loaded before. called with loader_mutex down
+ */
+static int add_wrap_driver(struct wrap_driver *driver)
+{
+	struct wrap_driver *tmp;
+
+	ENTER1("name: %s", driver->name);
+	nt_list_for_each_entry(tmp, &wrap_drivers, list) {
+		if (stricmp(tmp->name, driver->name) == 0) {
+			ERROR("cannot add duplicate driver");
+			EXIT1(return -EBUSY);
+		}
+	}
+	InsertHeadList(&wrap_drivers, &driver->list);
+	EXIT1(return 0);
+}
+
+/* load a driver from userspace and initialize it. called with
+ * loader_mutex down */
+static int load_user_space_driver(struct load_driver *load_driver)
+{
+	struct driver_object *drv_obj;
+	struct ansi_string ansi_reg;
+	struct wrap_driver *wrap_driver = NULL;
+
+	ENTER1("%p", load_driver);
+	drv_obj = allocate_object(sizeof(*drv_obj), OBJECT_TYPE_DRIVER, NULL);
+	if (!drv_obj) {
+		ERROR("couldn't allocate memory");
+		EXIT1(return -ENOMEM);
+	}
+	TRACE1("drv_obj: %p", drv_obj);
+	drv_obj->drv_ext = kzalloc(sizeof(*(drv_obj->drv_ext)), GFP_KERNEL);
+	if (!drv_obj->drv_ext) {
+		ERROR("couldn't allocate memory");
+		ObDereferenceObject(drv_obj);
+		EXIT1(return -ENOMEM);
+	}
+	InitializeListHead(&drv_obj->drv_ext->custom_ext);
+	if (IoAllocateDriverObjectExtension(drv_obj,
+					    (void *)WRAP_DRIVER_CLIENT_ID,
+					    sizeof(*wrap_driver),
+					    (void **)&wrap_driver) !=
+	    STATUS_SUCCESS)
+		EXIT1(return -ENOMEM);
+	TRACE1("driver: %p", wrap_driver);
+	memset(wrap_driver, 0, sizeof(*wrap_driver));
+	InitializeListHead(&wrap_driver->list);
+	InitializeListHead(&wrap_driver->settings);
+	InitializeListHead(&wrap_driver->wrap_devices);
+	wrap_driver->drv_obj = drv_obj;
+	RtlInitAnsiString(&ansi_reg, "/tmp");
+	if (RtlAnsiStringToUnicodeString(&drv_obj->name, &ansi_reg, TRUE) !=
+	    STATUS_SUCCESS) {
+		ERROR("couldn't initialize registry path");
+		free_custom_extensions(drv_obj->drv_ext);
+		kfree(drv_obj->drv_ext);
+		TRACE1("drv_obj: %p", drv_obj);
+		ObDereferenceObject(drv_obj);
+		EXIT1(return -EINVAL);
+	}
+	strncpy(wrap_driver->name, load_driver->name, sizeof(wrap_driver->name));
+	wrap_driver->name[sizeof(wrap_driver->name)-1] = 0;
+	if (load_sys_files(wrap_driver, load_driver) ||
+	    load_bin_files_info(wrap_driver, load_driver) ||
+	    load_settings(wrap_driver, load_driver) ||
+	    start_wrap_driver(wrap_driver) ||
+	    add_wrap_driver(wrap_driver)) {
+		unload_wrap_driver(wrap_driver);
+		EXIT1(return -EINVAL);
+	} else {
+		printk(KERN_INFO "%s: driver %s (%s) loaded\n",
+		       DRIVER_NAME, wrap_driver->name, wrap_driver->version);
+		add_taint(TAINT_PROPRIETARY_MODULE);
+		EXIT1(return 0);
+	}
+}
+
+static struct pci_device_id wrap_pci_id_table[] = {
+	{PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID},
+};
+
+static struct pci_driver wrap_pci_driver = {
+	.name		= DRIVER_NAME,
+	.id_table	= wrap_pci_id_table,
+	.probe		= wrap_pnp_start_pci_device,
+	.remove		= __devexit_p(wrap_pnp_remove_pci_device),
+	.suspend	= wrap_pnp_suspend_pci_device,
+	.resume		= wrap_pnp_resume_pci_device,
+};
+
+#ifdef ENABLE_USB
+static struct usb_device_id wrap_usb_id_table[] = {
+	{
+		.driver_info = 1
+	},
+};
+
+static struct usb_driver wrap_usb_driver = {
+	.name = DRIVER_NAME,
+	.id_table = wrap_usb_id_table,
+	.probe = wrap_pnp_start_usb_device,
+	.disconnect = __devexit_p(wrap_pnp_remove_usb_device),
+	.suspend = wrap_pnp_suspend_usb_device,
+	.resume = wrap_pnp_resume_usb_device,
+};
+#endif
+
+/* register drivers for pci and usb */
+static void register_devices(void)
+{
+	int res;
+
+	res = pci_register_driver(&wrap_pci_driver);
+	if (res < 0) {
+		ERROR("couldn't register pci driver: %d", res);
+		wrap_pci_driver.name = NULL;
+	}
+
+#ifdef ENABLE_USB
+	res = usb_register(&wrap_usb_driver);
+	if (res < 0) {
+		ERROR("couldn't register usb driver: %d", res);
+		wrap_usb_driver.name = NULL;
+	}
+#endif
+	EXIT1(return);
+}
+
+static void unregister_devices(void)
+{
+	struct nt_list *cur, *next;
+
+	if (down_interruptible(&loader_mutex))
+		WARNING("couldn't obtain loader_mutex");
+	nt_list_for_each_safe(cur, next, &wrap_devices) {
+		struct wrap_device *wd;
+		wd = container_of(cur, struct wrap_device, list);
+		set_bit(HW_PRESENT, &wd->hw_status);
+	}
+	up(&loader_mutex);
+
+	if (wrap_pci_driver.name)
+		pci_unregister_driver(&wrap_pci_driver);
+#ifdef ENABLE_USB
+	if (wrap_usb_driver.name)
+		usb_deregister(&wrap_usb_driver);
+#endif
+}
+
+struct wrap_device *load_wrap_device(struct load_device *load_device)
+{
+	int ret;
+	struct nt_list *cur;
+	struct wrap_device *wd = NULL;
+	char vendor[5], device[5], subvendor[5], subdevice[5], bus[5];
+
+	ENTER1("%04x, %04x, %04x, %04x", load_device->vendor,
+	       load_device->device, load_device->subvendor,
+	       load_device->subdevice);
+	if (sprintf(vendor, "%04x", load_device->vendor) == 4 &&
+	    sprintf(device, "%04x", load_device->device) == 4 &&
+	    sprintf(subvendor, "%04x", load_device->subvendor) == 4 &&
+	    sprintf(subdevice, "%04x", load_device->subdevice) == 4 &&
+	    sprintf(bus, "%04x", load_device->bus) == 4) {
+		char *argv[] = {"loadndisdriver", WRAP_CMD_LOAD_DEVICE,
+#if defined(DEBUG) && DEBUG >= 1
+				"1",
+#else
+				"0",
+#endif
+				UTILS_VERSION, vendor, device,
+				subvendor, subdevice, bus, NULL};
+		char *env[] = {NULL};
+		TRACE2("%s, %s, %s, %s, %s", vendor, device,
+		       subvendor, subdevice, bus);
+		if (down_interruptible(&loader_mutex)) {
+			WARNING("couldn't obtain loader_mutex");
+			EXIT1(return NULL);
+		}
+		INIT_COMPLETION(loader_complete);
+		ret = call_usermodehelper("/sbin/loadndisdriver", argv, env, 1);
+		if (ret) {
+			up(&loader_mutex);
+			TRACE1("couldn't load device %04x:%04x; check system "
+			       "log for messages from 'loadndisdriver'",
+			       load_device->vendor, load_device->device);
+			EXIT1(return NULL);
+		}
+		wait_for_completion(&loader_complete);
+		wd = NULL;
+		nt_list_for_each(cur, &wrap_devices) {
+			wd = container_of(cur, struct wrap_device, list);
+			TRACE2("%p, %04x, %04x, %04x, %04x", wd, wd->vendor,
+			       wd->device, wd->subvendor, wd->subdevice);
+			if (wd->vendor == load_device->vendor &&
+			    wd->device == load_device->device)
+				break;
+			else
+				wd = NULL;
+		}
+		up(&loader_mutex);
+	} else
+		wd = NULL;
+	EXIT1(return wd);
+}
+
+struct wrap_device *get_wrap_device(void *dev, int bus)
+{
+	struct nt_list *cur;
+	struct wrap_device *wd;
+
+	if (down_interruptible(&loader_mutex)) {
+		WARNING("couldn't obtain loader_mutex");
+		return NULL;
+	}
+	wd = NULL;
+	nt_list_for_each(cur, &wrap_devices) {
+		wd = container_of(cur, struct wrap_device, list);
+		if (bus == WRAP_PCI_BUS &&
+		    wrap_is_pci_bus(wd->dev_bus) && wd->pci.pdev == dev)
+			break;
+		else if (bus == WRAP_USB_BUS &&
+			 wrap_is_usb_bus(wd->dev_bus) && wd->usb.udev == dev)
+			break;
+		else
+			wd = NULL;
+	}
+	up(&loader_mutex);
+	return wd;
+}
+
+/* called with loader_mutex is down */
+static int wrapper_ioctl(struct inode *inode, struct file *file,
+			 unsigned int cmd, unsigned long arg)
+{
+	struct load_driver *load_driver;
+	struct load_device load_device;
+	struct load_driver_file load_bin_file;
+	int ret;
+	void __user *addr = (void __user *)arg;
+
+	ENTER1("cmd: %u", cmd);
+
+	ret = 0;
+	switch (cmd) {
+	case WRAP_IOCTL_LOAD_DEVICE:
+		if (copy_from_user(&load_device, addr, sizeof(load_device))) {
+			ret = -EFAULT;
+			break;
+		}
+		TRACE2("%04x, %04x, %04x, %04x", load_device.vendor,
+		       load_device.device, load_device.subvendor,
+		       load_device.subdevice);
+		if (load_device.vendor) {
+			struct wrap_device *wd;
+			wd = kzalloc(sizeof(*wd), GFP_KERNEL);
+			if (!wd) {
+				ret = -ENOMEM;
+				break;
+			}
+			InitializeListHead(&wd->settings);
+			wd->dev_bus = WRAP_BUS(load_device.bus);
+			wd->vendor = load_device.vendor;
+			wd->device = load_device.device;
+			wd->subvendor = load_device.subvendor;
+			wd->subdevice = load_device.subdevice;
+			strncpy(wd->conf_file_name, load_device.conf_file_name,
+				sizeof(wd->conf_file_name));
+			wd->conf_file_name[sizeof(wd->conf_file_name)-1] = 0;
+			strncpy(wd->driver_name, load_device.driver_name,
+			       sizeof(wd->driver_name));
+			wd->driver_name[sizeof(wd->driver_name)-1] = 0;
+			InsertHeadList(&wrap_devices, &wd->list);
+			ret = 0;
+		} else
+			ret = -EINVAL;
+		break;
+	case WRAP_IOCTL_LOAD_DRIVER:
+		TRACE1("loading driver at %p", addr);
+		load_driver = vmalloc(sizeof(*load_driver));
+		if (!load_driver) {
+			ret = -ENOMEM;
+			break;
+		}
+		if (copy_from_user(load_driver, addr, sizeof(*load_driver)))
+			ret = -EFAULT;
+		else
+			ret = load_user_space_driver(load_driver);
+		vfree(load_driver);
+		break;
+	case WRAP_IOCTL_LOAD_BIN_FILE:
+		if (copy_from_user(&load_bin_file, addr, sizeof(load_bin_file)))
+			ret = -EFAULT;
+		else
+			ret = add_bin_file(&load_bin_file);
+		break;
+	default:
+		ERROR("unknown ioctl %u", cmd);
+		ret = -EINVAL;
+		break;
+	}
+	complete(&loader_complete);
+	EXIT1(return ret);
+}
+
+static int wrapper_ioctl_release(struct inode *inode, struct file *file)
+{
+	ENTER1("");
+	return 0;
+}
+
+static struct file_operations wrapper_fops = {
+	.owner          = THIS_MODULE,
+	.ioctl		= wrapper_ioctl,
+	.release	= wrapper_ioctl_release,
+};
+
+static struct miscdevice wrapper_misc = {
+	.name   = DRIVER_NAME,
+	.minor	= MISC_DYNAMIC_MINOR,
+	.fops   = &wrapper_fops
+};
+
+int loader_init(void)
+{
+	int err;
+
+	InitializeListHead(&wrap_drivers);
+	InitializeListHead(&wrap_devices);
+	init_MUTEX(&loader_mutex);
+	init_completion(&loader_complete);
+	if ((err = misc_register(&wrapper_misc)) < 0 ) {
+		ERROR("couldn't register module (%d)", err);
+		unregister_devices();
+		EXIT1(return err);
+	}
+	register_devices();
+	EXIT1(return 0);
+}
+
+void loader_exit(void)
+{
+	struct nt_list *cur, *next;
+
+	ENTER1("");
+	misc_deregister(&wrapper_misc);
+	unregister_devices();
+	if (down_interruptible(&loader_mutex))
+		WARNING("couldn't obtain loader_mutex");
+	nt_list_for_each_safe(cur, next, &wrap_drivers) {
+		struct wrap_driver *driver;
+		driver = container_of(cur, struct wrap_driver, list);
+		unload_wrap_driver(driver);
+	}
+	up(&loader_mutex);
+	EXIT1(return);
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/ndiswrapper/usb.c
+++ linux-mvl-dove-2.6.32/ubuntu/ndiswrapper/usb.c
@@ -0,0 +1,1457 @@
+/*
+ *  Copyright (C) 2004 Jan Kiszka
+ *  Copyright (C) 2005 Giridhar Pemmasani
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *  GNU General Public License for more details.
+ *
+ */
+
+#include "ndis.h"
+#include "usb.h"
+#include "usb_exports.h"
+
+#ifdef USB_DEBUG
+static unsigned int urb_id = 0;
+
+#define DUMP_WRAP_URB(wrap_urb, dir)					\
+	USBTRACE("urb %p (%d) %s: buf: %p, len: %d, pipe: 0x%x, %d",	\
+		 (wrap_urb)->urb, (wrap_urb)->id,			\
+		 (dir == USB_DIR_OUT) ? "going down" : "coming back",	\
+		 (wrap_urb)->urb->transfer_buffer,			\
+		 (wrap_urb)->urb->transfer_buffer_length,		\
+		 (wrap_urb)->urb->pipe, (wrap_urb)->urb->status)
+
+#define DUMP_URB_BUFFER(urb, dir)					\
+	while (debug >= 2) {						\
+		int i;							\
+		char msg[20], *t;					\
+		if (!urb->transfer_buffer)				\
+			break;						\
+		if (!((usb_pipein(urb->pipe) && dir == USB_DIR_IN) ||	\
+		      (usb_pipeout(urb->pipe) && dir == USB_DIR_OUT)))	\
+			break;						\
+		t = msg;						\
+		t += sprintf(t, "%d: ", (urb)->actual_length);		\
+		for (i = 0; i < urb->actual_length &&			\
+			     t < &msg[sizeof(msg) - 4]; i++)		\
+			t += sprintf(t, "%02X ",			\
+				     ((char *)urb->transfer_buffer)[i]); \
+		*t = 0;							\
+		USBTRACE("%s", msg);					\
+		break;							\
+	}
+
+#else
+
+#define DUMP_WRAP_URB(wrap_urb, dir) (void)0
+#define DUMP_URB_BUFFER(urb, dir) (void)0
+
+#endif
+
+#define CUR_ALT_SETTING(intf) (intf)->cur_altsetting
+
+#ifndef USB_CTRL_SET_TIMEOUT
+#define USB_CTRL_SET_TIMEOUT 5000
+#endif
+
+#ifndef USB_CTRL_GET_TIMEOUT
+#define USB_CTRL_GET_TIMEOUT 5000
+#endif
+
+#ifndef URB_NO_TRANSFER_DMA_MAP
+#define URB_NO_TRANSFER_DMA_MAP 0
+#endif
+
+/* wrap_urb->flags */
+/* transfer_buffer for urb is allocated; free it in wrap_free_urb */
+#define WRAP_URB_COPY_BUFFER 0x01
+
+static int inline wrap_cancel_urb(struct wrap_urb *wrap_urb)
+{
+	int ret;
+	USBTRACE("%p, %p, %d", wrap_urb, wrap_urb->urb, wrap_urb->state);
+	if (wrap_urb->state != URB_SUBMITTED)
+		USBEXIT(return -1);
+	ret = usb_unlink_urb(wrap_urb->urb);
+	USBTRACE("ret: %d", ret);
+	if (ret == -EINPROGRESS)
+		return 0;
+	else {
+		WARNING("unlink failed: %d", ret);
+		return ret;
+	}
+}
+
+#define URB_STATUS(wrap_urb) (wrap_urb->urb->status)
+
+static struct nt_list wrap_urb_complete_list;
+static spinlock_t wrap_urb_complete_list_lock;
+
+static work_struct_t wrap_urb_complete_work;
+static void wrap_urb_complete_worker(worker_param_t dummy);
+
+static void kill_all_urbs(struct wrap_device *wd, int complete)
+{
+	struct nt_list *ent;
+	struct wrap_urb *wrap_urb;
+	KIRQL irql;
+
+	USBTRACE("%d", wd->usb.num_alloc_urbs);
+	while (1) {
+		IoAcquireCancelSpinLock(&irql);
+		ent = RemoveHeadList(&wd->usb.wrap_urb_list);
+		IoReleaseCancelSpinLock(irql);
+		if (!ent)
+			break;
+		wrap_urb = container_of(ent, struct wrap_urb, list);
+		if (wrap_urb->state == URB_SUBMITTED) {
+			WARNING("Windows driver %s didn't free urb: %p",
+				wd->driver->name, wrap_urb->urb);
+			if (!complete)
+				wrap_urb->urb->complete = NULL;
+			usb_kill_urb(wrap_urb->urb);
+		}
+		USBTRACE("%p, %p", wrap_urb, wrap_urb->urb);
+		usb_free_urb(wrap_urb->urb);
+		kfree(wrap_urb);
+	}
+	wd->usb.num_alloc_urbs = 0;
+}
+
+/* for a given Linux urb status code, return corresponding NT urb status */
+static USBD_STATUS wrap_urb_status(int urb_status)
+{
+	switch (urb_status) {
+	case 0:
+		return USBD_STATUS_SUCCESS;
+	case -EPROTO:
+		return USBD_STATUS_TIMEOUT;
+	case -EILSEQ:
+		return USBD_STATUS_CRC;
+	case -EPIPE:
+		return USBD_STATUS_INVALID_PIPE_HANDLE;
+	case -ECOMM:
+		return USBD_STATUS_DATA_OVERRUN;
+	case -ENOSR:
+		return USBD_STATUS_DATA_UNDERRUN;
+	case -EOVERFLOW:
+		return USBD_STATUS_BABBLE_DETECTED;
+	case -EREMOTEIO:
+		return USBD_STATUS_ERROR_SHORT_TRANSFER;;
+	case -ENODEV:
+	case -ESHUTDOWN:
+	case -ENOENT:
+		return USBD_STATUS_DEVICE_GONE;
+	case -ENOMEM:
+		return USBD_STATUS_NO_MEMORY;
+	case -EINVAL:
+		return USBD_STATUS_REQUEST_FAILED;
+	default:
+		return USBD_STATUS_NOT_SUPPORTED;
+	}
+}
+
+/* for a given USBD_STATUS, return its corresponding NTSTATUS (for irp) */
+static NTSTATUS nt_urb_irp_status(USBD_STATUS nt_urb_status)
+{
+	switch (nt_urb_status) {
+	case USBD_STATUS_SUCCESS:
+		return STATUS_SUCCESS;
+	case USBD_STATUS_DEVICE_GONE:
+		return STATUS_DEVICE_REMOVED;
+	case USBD_STATUS_PENDING:
+		return STATUS_PENDING;
+	case USBD_STATUS_NOT_SUPPORTED:
+		return STATUS_NOT_IMPLEMENTED;
+	case USBD_STATUS_NO_MEMORY:
+		return STATUS_NO_MEMORY;
+	case USBD_STATUS_REQUEST_FAILED:
+		return STATUS_NOT_SUPPORTED;
+	default:
+		return STATUS_FAILURE;
+	}
+}
+
+static void wrap_free_urb(struct urb *urb)
+{
+	struct irp *irp;
+	struct wrap_urb *wrap_urb;
+
+	USBTRACE("freeing urb: %p", urb);
+	wrap_urb = urb->context;
+	irp = wrap_urb->irp;
+	if (wrap_urb->flags & WRAP_URB_COPY_BUFFER) {
+		USBTRACE("freeing DMA buffer for URB: %p %p",
+			 urb, urb->transfer_buffer);
+		usb_buffer_free(IRP_WRAP_DEVICE(irp)->usb.udev,
+				urb->transfer_buffer_length,
+				urb->transfer_buffer, urb->transfer_dma);
+	}
+	if (urb->setup_packet)
+		kfree(urb->setup_packet);
+	if (IRP_WRAP_DEVICE(irp)->usb.num_alloc_urbs > MAX_ALLOCATED_URBS) {
+		IoAcquireCancelSpinLock(&irp->cancel_irql);
+		RemoveEntryList(&wrap_urb->list);
+		IRP_WRAP_DEVICE(irp)->usb.num_alloc_urbs--;
+		IoReleaseCancelSpinLock(irp->cancel_irql);
+		usb_free_urb(urb);
+		kfree(wrap_urb);
+	} else {
+		wrap_urb->state = URB_FREE;
+		wrap_urb->flags = 0;
+		wrap_urb->irp = NULL;
+	}
+	return;
+}
+
+void wrap_suspend_urbs(struct wrap_device *wd)
+{
+	/* TODO: do we need to cancel urbs? */
+	USBTRACE("%p, %d", wd, wd->usb.num_alloc_urbs);
+}
+
+void wrap_resume_urbs(struct wrap_device *wd)
+{
+	/* TODO: do we need to resubmit urbs? */
+	USBTRACE("%p, %d", wd, wd->usb.num_alloc_urbs);
+}
+
+wstdcall void wrap_cancel_irp(struct device_object *dev_obj, struct irp *irp)
+{
+	struct urb *urb;
+
+	/* NB: this function is called holding Cancel spinlock */
+	USBENTER("irp: %p", irp);
+	urb = IRP_WRAP_URB(irp)->urb;
+	USBTRACE("canceling urb %p", urb);
+	if (wrap_cancel_urb(IRP_WRAP_URB(irp))) {
+		irp->cancel = FALSE;
+		ERROR("urb %p can't be canceld: %d", urb,
+		      IRP_WRAP_URB(irp)->state);
+	} else
+		USBTRACE("urb %p canceled", urb);
+	IoReleaseCancelSpinLock(irp->cancel_irql);
+	return;
+}
+WIN_FUNC_DECL(wrap_cancel_irp,2)
+
+static struct urb *wrap_alloc_urb(struct irp *irp, unsigned int pipe,
+				  void *buf, unsigned int buf_len)
+{
+	struct urb *urb;
+	gfp_t alloc_flags;
+	struct wrap_urb *wrap_urb;
+	struct wrap_device *wd;
+
+	USBENTER("irp: %p", irp);
+	wd = IRP_WRAP_DEVICE(irp);
+	alloc_flags = irql_gfp();
+	IoAcquireCancelSpinLock(&irp->cancel_irql);
+	urb = NULL;
+	nt_list_for_each_entry(wrap_urb, &wd->usb.wrap_urb_list, list) {
+		if (cmpxchg(&wrap_urb->state, URB_FREE,
+			    URB_ALLOCATED) == URB_FREE) {
+			urb = wrap_urb->urb;
+			usb_init_urb(urb);
+			break;
+		}
+	}
+	if (!urb) {
+		IoReleaseCancelSpinLock(irp->cancel_irql);
+		wrap_urb = kzalloc(sizeof(*wrap_urb), alloc_flags);
+		if (!wrap_urb) {
+			WARNING("couldn't allocate memory");
+			return NULL;
+		}
+		urb = usb_alloc_urb(0, alloc_flags);
+		if (!urb) {
+			WARNING("couldn't allocate urb");
+			kfree(wrap_urb);
+			return NULL;
+		}
+		IoAcquireCancelSpinLock(&irp->cancel_irql);
+		wrap_urb->urb = urb;
+		wrap_urb->state = URB_ALLOCATED;
+		InsertTailList(&wd->usb.wrap_urb_list, &wrap_urb->list);
+		wd->usb.num_alloc_urbs++;
+	}
+
+#ifdef URB_ASYNC_UNLINK
+	urb->transfer_flags |= URB_ASYNC_UNLINK;
+#elif defined(USB_ASYNC_UNLINK)
+	urb->transfer_flags |= USB_ASYNC_UNLINK;
+#endif
+	urb->context = wrap_urb;
+	wrap_urb->irp = irp;
+	IRP_WRAP_URB(irp) = wrap_urb;
+	/* called as Windows function */
+	irp->cancel_routine = WIN_FUNC_PTR(wrap_cancel_irp,2);
+	IoReleaseCancelSpinLock(irp->cancel_irql);
+	USBTRACE("urb: %p", urb);
+
+	urb->transfer_buffer_length = buf_len;
+	if (buf_len && buf && (!virt_addr_valid(buf)
+#if defined(CONFIG_HIGHMEM) || defined(CONFIG_HIGHMEM4G)
+			       || PageHighMem(virt_to_page(buf))
+#endif
+		    )) {
+		urb->transfer_buffer =
+			usb_buffer_alloc(wd->usb.udev, buf_len, alloc_flags,
+					 &urb->transfer_dma);
+		if (!urb->transfer_buffer) {
+			WARNING("couldn't allocate dma buf");
+			IoAcquireCancelSpinLock(&irp->cancel_irql);
+			wrap_urb->state = URB_FREE;
+			wrap_urb->irp = NULL;
+			IRP_WRAP_URB(irp) = NULL;
+			IoReleaseCancelSpinLock(irp->cancel_irql);
+			return NULL;
+		}
+		if (urb->transfer_dma)
+			urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;
+		wrap_urb->flags |= WRAP_URB_COPY_BUFFER;
+		if (usb_pipeout(pipe))
+			memcpy(urb->transfer_buffer, buf, buf_len);
+		USBTRACE("DMA buf for urb %p: %p", urb, urb->transfer_buffer);
+	} else
+		urb->transfer_buffer = buf;
+	return urb;
+}
+
+static USBD_STATUS wrap_submit_urb(struct irp *irp)
+{
+	int ret;
+	struct urb *urb;
+	union nt_urb *nt_urb;
+
+	urb = IRP_WRAP_URB(irp)->urb;
+	nt_urb = IRP_URB(irp);
+#ifdef USB_DEBUG
+	if (IRP_WRAP_URB(irp)->state != URB_ALLOCATED) {
+		ERROR("urb %p is in wrong state: %d",
+		      urb, IRP_WRAP_URB(irp)->state);
+		NT_URB_STATUS(nt_urb) = USBD_STATUS_REQUEST_FAILED;
+		return NT_URB_STATUS(nt_urb);
+	}
+	IRP_WRAP_URB(irp)->id = pre_atomic_add(urb_id, 1);
+#endif
+	DUMP_WRAP_URB(IRP_WRAP_URB(irp), USB_DIR_OUT);
+	irp->io_status.status = STATUS_PENDING;
+	irp->io_status.info = 0;
+	NT_URB_STATUS(nt_urb) = USBD_STATUS_PENDING;
+	IoMarkIrpPending(irp);
+	DUMP_URB_BUFFER(urb, USB_DIR_OUT);
+	USBTRACE("%p", urb);
+	IRP_WRAP_URB(irp)->state = URB_SUBMITTED;
+	ret = usb_submit_urb(urb, irql_gfp());
+	if (ret) {
+		USBTRACE("ret: %d", ret);
+		wrap_free_urb(urb);
+		/* we assume that IRP was not in pending state before */
+		IoUnmarkIrpPending(irp);
+		NT_URB_STATUS(nt_urb) = wrap_urb_status(ret);
+		USBEXIT(return NT_URB_STATUS(nt_urb));
+	} else
+		USBEXIT(return USBD_STATUS_PENDING);
+}
+
+static void wrap_urb_complete(struct urb *urb ISR_PT_REGS_PARAM_DECL)
+{
+	struct irp *irp;
+	struct wrap_urb *wrap_urb;
+
+	wrap_urb = urb->context;
+	USBTRACE("%p (%p) completed", wrap_urb, urb);
+	irp = wrap_urb->irp;
+	DUMP_WRAP_URB(wrap_urb, USB_DIR_IN);
+	irp->cancel_routine = NULL;
+#ifdef USB_DEBUG
+	if (wrap_urb->state != URB_SUBMITTED) {
+		WARNING("urb %p in wrong state: %d (%d)", urb, wrap_urb->state,
+			urb->status);
+		return;
+	}
+#endif
+	wrap_urb->state = URB_COMPLETED;
+	spin_lock(&wrap_urb_complete_list_lock);
+	InsertTailList(&wrap_urb_complete_list, &wrap_urb->complete_list);
+	spin_unlock(&wrap_urb_complete_list_lock);
+	schedule_ntos_work(&wrap_urb_complete_work);
+}
+
+/* one worker for all devices */
+static void wrap_urb_complete_worker(worker_param_t dummy)
+{
+	struct irp *irp;
+	struct urb *urb;
+	struct usbd_bulk_or_intr_transfer *bulk_int_tx;
+	struct usbd_vendor_or_class_request *vc_req;
+	union nt_urb *nt_urb;
+	struct wrap_urb *wrap_urb;
+	struct nt_list *ent;
+	unsigned long flags;
+
+	USBENTER("");
+	while (1) {
+		spin_lock_irqsave(&wrap_urb_complete_list_lock, flags);
+		ent = RemoveHeadList(&wrap_urb_complete_list);
+		spin_unlock_irqrestore(&wrap_urb_complete_list_lock, flags);
+		if (!ent)
+			break;
+		wrap_urb = container_of(ent, struct wrap_urb, complete_list);
+		urb = wrap_urb->urb;
+#ifdef USB_DEBUG
+		if (wrap_urb->state != URB_COMPLETED &&
+		    wrap_urb->state != URB_INT_UNLINKED)
+			WARNING("urb %p in wrong state: %d",
+				urb, wrap_urb->state);
+#endif
+		irp = wrap_urb->irp;
+		DUMP_IRP(irp);
+		nt_urb = IRP_URB(irp);
+		USBTRACE("urb: %p, nt_urb: %p, status: %d",
+			 urb, nt_urb, urb->status);
+		switch (urb->status) {
+		case 0:
+			/* succesfully transferred */
+			irp->io_status.info = urb->actual_length;
+			if (nt_urb->header.function ==
+			    URB_FUNCTION_BULK_OR_INTERRUPT_TRANSFER) {
+				bulk_int_tx = &nt_urb->bulk_int_transfer;
+				bulk_int_tx->transfer_buffer_length =
+					urb->actual_length;
+				DUMP_URB_BUFFER(urb, USB_DIR_IN);
+				if ((wrap_urb->flags & WRAP_URB_COPY_BUFFER) &&
+				    usb_pipein(urb->pipe))
+					memcpy(bulk_int_tx->transfer_buffer,
+					       urb->transfer_buffer,
+					       urb->actual_length);
+			} else { // vendor or class request
+				vc_req = &nt_urb->vendor_class_request;
+				vc_req->transfer_buffer_length =
+					urb->actual_length;
+				DUMP_URB_BUFFER(urb, USB_DIR_IN);
+				if ((wrap_urb->flags & WRAP_URB_COPY_BUFFER) &&
+				    usb_pipein(urb->pipe))
+					memcpy(vc_req->transfer_buffer,
+					       urb->transfer_buffer,
+					       urb->actual_length);
+			}
+			NT_URB_STATUS(nt_urb) = USBD_STATUS_SUCCESS;
+			irp->io_status.status = STATUS_SUCCESS;
+			break;
+		case -ENOENT:
+		case -ECONNRESET:
+			/* urb canceled */
+			irp->io_status.info = 0;
+			TRACE2("urb %p canceled", urb);
+			NT_URB_STATUS(nt_urb) = USBD_STATUS_SUCCESS;
+			irp->io_status.status = STATUS_CANCELLED;
+			break;
+		default:
+			TRACE2("irp: %p, urb: %p, status: %d/%d",
+				 irp, urb, urb->status, wrap_urb->state);
+			irp->io_status.info = 0;
+			NT_URB_STATUS(nt_urb) = wrap_urb_status(urb->status);
+			irp->io_status.status =
+				nt_urb_irp_status(NT_URB_STATUS(nt_urb));
+			break;
+		}
+		wrap_free_urb(urb);
+		IoCompleteRequest(irp, IO_NO_INCREMENT);
+	}
+	USBEXIT(return);
+}
+
+static USBD_STATUS wrap_bulk_or_intr_trans(struct irp *irp)
+{
+	usbd_pipe_handle pipe_handle;
+	struct urb *urb;
+	unsigned int pipe;
+	struct usbd_bulk_or_intr_transfer *bulk_int_tx;
+	USBD_STATUS status;
+	struct usb_device *udev;
+	union nt_urb *nt_urb;
+
+	nt_urb = IRP_URB(irp);
+	udev = IRP_WRAP_DEVICE(irp)->usb.udev;
+	bulk_int_tx = &nt_urb->bulk_int_transfer;
+	pipe_handle = bulk_int_tx->pipe_handle;
+	USBTRACE("flags: 0x%x, length: %u, buffer: %p, handle: %p",
+		 bulk_int_tx->transfer_flags,
+		 bulk_int_tx->transfer_buffer_length,
+		 bulk_int_tx->transfer_buffer, pipe_handle);
+
+	if (USBD_IS_BULK_PIPE(pipe_handle)) {
+		if (bulk_int_tx->transfer_flags & USBD_TRANSFER_DIRECTION_IN)
+			pipe = usb_rcvbulkpipe(udev,
+					       pipe_handle->bEndpointAddress);
+		else
+			pipe = usb_sndbulkpipe(udev,
+					       pipe_handle->bEndpointAddress);
+	} else {
+		if (bulk_int_tx->transfer_flags & USBD_TRANSFER_DIRECTION_IN)
+			pipe = usb_rcvintpipe(udev,
+					      pipe_handle->bEndpointAddress);
+		else
+			pipe = usb_sndintpipe(udev,
+					      pipe_handle->bEndpointAddress);
+	}
+
+	DUMP_IRP(irp);
+	urb = wrap_alloc_urb(irp, pipe, bulk_int_tx->transfer_buffer,
+			     bulk_int_tx->transfer_buffer_length);
+	if (!urb) {
+		ERROR("couldn't allocate urb");
+		return USBD_STATUS_NO_MEMORY;
+	}
+	if (usb_pipein(pipe) &&
+	    (!(bulk_int_tx->transfer_flags & USBD_SHORT_TRANSFER_OK))) {
+		USBTRACE("short not ok");
+		urb->transfer_flags |= URB_SHORT_NOT_OK;
+	}
+	if (usb_pipebulk(pipe)) {
+		usb_fill_bulk_urb(urb, udev, pipe, urb->transfer_buffer,
+				  bulk_int_tx->transfer_buffer_length,
+				  wrap_urb_complete, urb->context);
+		USBTRACE("submitting bulk urb %p on pipe 0x%x (ep 0x%x)",
+			 urb, urb->pipe, pipe_handle->bEndpointAddress);
+	} else {
+		usb_fill_int_urb(urb, udev, pipe, urb->transfer_buffer,
+				 bulk_int_tx->transfer_buffer_length,
+				 wrap_urb_complete, urb->context,
+				 pipe_handle->bInterval);
+		USBTRACE("submitting interrupt urb %p on pipe 0x%x (ep 0x%x), "
+			 "intvl: %d", urb, urb->pipe,
+			 pipe_handle->bEndpointAddress, pipe_handle->bInterval);
+	}
+	status = wrap_submit_urb(irp);
+	USBTRACE("status: %08X", status);
+	USBEXIT(return status);
+}
+
+static USBD_STATUS wrap_vendor_or_class_req(struct irp *irp)
+{
+	u8 req_type;
+	unsigned int pipe;
+	struct usbd_vendor_or_class_request *vc_req;
+	struct usb_device *udev;
+	union nt_urb *nt_urb;
+	USBD_STATUS status;
+	struct urb *urb;
+	struct usb_ctrlrequest *dr;
+
+	nt_urb = IRP_URB(irp);
+	udev = IRP_WRAP_DEVICE(irp)->usb.udev;
+	vc_req = &nt_urb->vendor_class_request;
+	USBTRACE("bits: %x, req: %x, val: %08x, index: %08x, flags: %x,"
+		 "buf: %p, len: %d", vc_req->reserved_bits, vc_req->request,
+		 vc_req->value, vc_req->index, vc_req->transfer_flags,
+		 vc_req->transfer_buffer, vc_req->transfer_buffer_length);
+
+	USBTRACE("%x", nt_urb->header.function);
+	switch (nt_urb->header.function) {
+	case URB_FUNCTION_VENDOR_DEVICE:
+		req_type = USB_TYPE_VENDOR | USB_RECIP_DEVICE;
+		break;
+	case URB_FUNCTION_VENDOR_INTERFACE:
+		req_type = USB_TYPE_VENDOR | USB_RECIP_INTERFACE;
+		break;
+	case URB_FUNCTION_VENDOR_ENDPOINT:
+		req_type = USB_TYPE_VENDOR | USB_RECIP_ENDPOINT;
+		break;
+	case URB_FUNCTION_VENDOR_OTHER:
+		req_type = USB_TYPE_VENDOR | USB_RECIP_OTHER;
+		break;
+	case URB_FUNCTION_CLASS_DEVICE:
+		req_type = USB_TYPE_CLASS | USB_RECIP_DEVICE;
+		break;
+	case URB_FUNCTION_CLASS_INTERFACE:
+		req_type = USB_TYPE_CLASS | USB_RECIP_INTERFACE;
+		break;
+	case URB_FUNCTION_CLASS_ENDPOINT:
+		req_type = USB_TYPE_CLASS | USB_RECIP_ENDPOINT;
+		break;
+	case URB_FUNCTION_CLASS_OTHER:
+		req_type = USB_TYPE_CLASS | USB_RECIP_OTHER;
+		break;
+	default:
+		ERROR("unknown request type: %x", nt_urb->header.function);
+		req_type = 0;
+		break;
+	}
+
+	req_type |= vc_req->reserved_bits;
+	USBTRACE("req type: %08x", req_type);
+
+	if (vc_req->transfer_flags & USBD_TRANSFER_DIRECTION_IN) {
+		pipe = usb_rcvctrlpipe(udev, 0);
+		req_type |= USB_DIR_IN;
+		USBTRACE("pipe: %x, dir in", pipe);
+	} else {
+		pipe = usb_sndctrlpipe(udev, 0);
+		req_type |= USB_DIR_OUT;
+		USBTRACE("pipe: %x, dir out", pipe);
+	}
+	urb = wrap_alloc_urb(irp, pipe, vc_req->transfer_buffer,
+			     vc_req->transfer_buffer_length);
+	if (!urb) {
+		ERROR("couldn't allocate urb");
+		return USBD_STATUS_NO_MEMORY;
+	}
+
+	if (usb_pipein(pipe) &&
+	    (!(vc_req->transfer_flags & USBD_SHORT_TRANSFER_OK))) {
+		USBTRACE("short not ok");
+		urb->transfer_flags |= URB_SHORT_NOT_OK;
+	}
+
+	dr = kzalloc(sizeof(*dr), GFP_ATOMIC);
+	if (!dr) {
+		ERROR("couldn't allocate memory");
+		wrap_free_urb(urb);
+		return USBD_STATUS_NO_MEMORY;
+	}
+	dr->bRequestType = req_type;
+	dr->bRequest = vc_req->request;
+	dr->wValue = cpu_to_le16(vc_req->value);
+	dr->wIndex = cpu_to_le16((u16)vc_req->index);
+	dr->wLength = cpu_to_le16((u16)urb->transfer_buffer_length);
+
+	usb_fill_control_urb(urb, udev, pipe, (unsigned char *)dr,
+			     urb->transfer_buffer, urb->transfer_buffer_length,
+			     wrap_urb_complete, urb->context);
+	status = wrap_submit_urb(irp);
+	USBTRACE("status: %08X", status);
+	USBEXIT(return status);
+}
+
+static USBD_STATUS wrap_reset_pipe(struct usb_device *udev, struct irp *irp)
+{
+	int ret;
+	union nt_urb *nt_urb;
+	usbd_pipe_handle pipe_handle;
+	unsigned int pipe1, pipe2;
+
+	nt_urb = IRP_URB(irp);
+	pipe_handle = nt_urb->pipe_req.pipe_handle;
+	/* TODO: not clear if both directions should be cleared? */
+	if (USBD_IS_BULK_PIPE(pipe_handle)) {
+		pipe1 = usb_rcvbulkpipe(udev, pipe_handle->bEndpointAddress);
+		pipe2 = usb_sndbulkpipe(udev, pipe_handle->bEndpointAddress);
+	} else if (USBD_IS_INT_PIPE(pipe_handle)) {
+		pipe1 = usb_rcvintpipe(udev, pipe_handle->bEndpointAddress);
+		pipe2 = pipe1;
+	} else {
+		WARNING("invalid pipe %d", pipe_handle->bEndpointAddress);
+		return USBD_STATUS_INVALID_PIPE_HANDLE;
+	}
+	USBTRACE("ep: %d, pipe: 0x%x", pipe_handle->bEndpointAddress, pipe1);
+	ret = usb_clear_halt(udev, pipe1);
+	if (ret)
+		USBTRACE("resetting pipe %d failed: %d", pipe1, ret);
+	if (pipe2 != pipe1) {
+		ret = usb_clear_halt(udev, pipe2);
+		if (ret)
+			USBTRACE("resetting pipe %d failed: %d", pipe2, ret);
+	}
+//	return wrap_urb_status(ret);
+	return USBD_STATUS_SUCCESS;
+}
+
+static USBD_STATUS wrap_abort_pipe(struct usb_device *udev, struct irp *irp)
+{
+	union nt_urb *nt_urb;
+	usbd_pipe_handle pipe_handle;
+	struct wrap_urb *wrap_urb;
+	struct wrap_device *wd;
+	KIRQL irql;
+
+	wd = IRP_WRAP_DEVICE(irp);
+	nt_urb = IRP_URB(irp);
+	pipe_handle = nt_urb->pipe_req.pipe_handle;
+	USBENTER("%p, %x", irp, pipe_handle->bEndpointAddress);
+	IoAcquireCancelSpinLock(&irql);
+	nt_list_for_each_entry(wrap_urb, &wd->usb.wrap_urb_list, list) {
+		USBTRACE("%p, %p, %d, %x, %x", wrap_urb, wrap_urb->urb,
+			 wrap_urb->state, wrap_urb->urb->pipe,
+			 usb_pipeendpoint(wrap_urb->urb->pipe));
+		/* for WG111T driver, urbs for endpoint 0 should also
+		 * be canceled */
+		if ((usb_pipeendpoint(wrap_urb->urb->pipe) ==
+		     pipe_handle->bEndpointAddress) ||
+		    (usb_pipeendpoint(wrap_urb->urb->pipe) == 0)) {
+			if (wrap_cancel_urb(wrap_urb) == 0)
+				USBTRACE("canceled wrap_urb: %p", wrap_urb);
+		}
+	}
+	IoReleaseCancelSpinLock(irql);
+	NT_URB_STATUS(nt_urb) = USBD_STATUS_CANCELED;
+	USBEXIT(return USBD_STATUS_SUCCESS);
+}
+
+static USBD_STATUS wrap_set_clear_feature(struct usb_device *udev,
+					  struct irp *irp)
+{
+	union nt_urb *nt_urb;
+	struct urb_control_feature_request *feat_req;
+	int ret = 0;
+	__u8 request, type;
+	__u16 feature;
+
+	nt_urb = IRP_URB(irp);
+	feat_req = &nt_urb->feat_req;
+	feature = feat_req->feature_selector;
+	switch (nt_urb->header.function) {
+	case URB_FUNCTION_SET_FEATURE_TO_DEVICE:
+		request = USB_REQ_SET_FEATURE;
+		type = USB_DT_DEVICE;
+		break;
+	case URB_FUNCTION_SET_FEATURE_TO_INTERFACE:
+		request = USB_REQ_SET_FEATURE;
+		type =  USB_DT_INTERFACE;
+		break;
+	case URB_FUNCTION_SET_FEATURE_TO_ENDPOINT:
+		request = USB_REQ_SET_FEATURE;
+		type =  USB_DT_ENDPOINT;
+		break;
+	case URB_FUNCTION_CLEAR_FEATURE_TO_DEVICE:
+		request = USB_REQ_CLEAR_FEATURE;
+		type =  USB_DT_DEVICE;
+		break;
+	case URB_FUNCTION_CLEAR_FEATURE_TO_INTERFACE:
+		request = USB_REQ_CLEAR_FEATURE;
+		type =  USB_DT_INTERFACE;
+		break;
+	case URB_FUNCTION_CLEAR_FEATURE_TO_ENDPOINT:
+		request = USB_REQ_CLEAR_FEATURE;
+		type =  USB_DT_ENDPOINT;
+		break;
+	default:
+		WARNING("invalid function: %x", nt_urb->header.function);
+		NT_URB_STATUS(nt_urb) = USBD_STATUS_NOT_SUPPORTED;
+		return NT_URB_STATUS(nt_urb);
+	}
+	ret = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), request, type,
+			      feature, feat_req->index, NULL, 0, 1000);
+	NT_URB_STATUS(nt_urb) = wrap_urb_status(ret);
+	USBEXIT(return NT_URB_STATUS(nt_urb));
+}
+
+static USBD_STATUS wrap_get_status_request(struct usb_device *udev,
+					   struct irp *irp)
+{
+	union nt_urb *nt_urb;
+	struct urb_control_get_status_request *status_req;
+	int ret = 0;
+	__u8 type;
+
+	nt_urb = IRP_URB(irp);
+	status_req = &nt_urb->status_req;
+	switch (nt_urb->header.function) {
+	case URB_FUNCTION_GET_STATUS_FROM_DEVICE:
+		type = USB_RECIP_DEVICE;
+		break;
+	case URB_FUNCTION_GET_STATUS_FROM_INTERFACE:
+		type = USB_RECIP_INTERFACE;
+		break;
+	case URB_FUNCTION_GET_STATUS_FROM_ENDPOINT:
+		type = USB_RECIP_ENDPOINT;
+		break;
+	default:
+		WARNING("invalid function: %x", nt_urb->header.function);
+		NT_URB_STATUS(nt_urb) = USBD_STATUS_NOT_SUPPORTED;
+		return NT_URB_STATUS(nt_urb);
+	}
+	assert(status_req->transfer_buffer_length == sizeof(u16));
+	ret = usb_get_status(udev, type, status_req->index,
+			     status_req->transfer_buffer);
+	if (ret >= 0) {
+		assert(ret <= status_req->transfer_buffer_length);
+		status_req->transfer_buffer_length = ret;
+		NT_URB_STATUS(nt_urb) = USBD_STATUS_SUCCESS;
+	} else
+		NT_URB_STATUS(nt_urb) = wrap_urb_status(ret);
+	USBEXIT(return NT_URB_STATUS(nt_urb));
+}
+
+static void set_intf_pipe_info(struct wrap_device *wd,
+			       struct usb_interface *usb_intf,
+			       struct usbd_interface_information *intf)
+{
+	int i;
+	struct usb_endpoint_descriptor *ep;
+	struct usbd_pipe_information *pipe;
+
+	for (i = 0; i < CUR_ALT_SETTING(usb_intf)->desc.bNumEndpoints; i++) {
+		ep = &(CUR_ALT_SETTING(usb_intf)->endpoint[i]).desc;
+		if (i >= intf->bNumEndpoints) {
+			ERROR("intf %p has only %d endpoints, "
+			      "ignoring endpoints above %d",
+			      intf, intf->bNumEndpoints, i);
+			break;
+		}
+		pipe = &intf->pipes[i];
+
+		if (pipe->flags & USBD_PF_CHANGE_MAX_PACKET)
+			USBTRACE("pkt_sz: %d: %d", pipe->wMaxPacketSize,
+				 pipe->max_tx_size);
+		USBTRACE("driver wants max_tx_size to %d",
+			 pipe->max_tx_size);
+
+		pipe->wMaxPacketSize = le16_to_cpu(ep->wMaxPacketSize);
+		pipe->bEndpointAddress = ep->bEndpointAddress;
+		pipe->type = ep->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
+		if (pipe->type == UsbdPipeTypeInterrupt) {
+			/* Windows and Linux differ in how the
+			 * bInterval is interpretted */
+			/* for low speed:
+			   interval (Windows) -> frames per ms (Linux)
+			   0 to 15    -> 8
+			   16 to 35   -> 16
+			   36 to 255  -> 32
+
+			   for full speed: interval -> frames per ms
+			   1          -> 1
+			   2 to 3     -> 2
+			   4 to 7     -> 4
+			   8 to 15    -> 8
+			   16 to 31   -> 16
+			   32 to 255  -> 32
+
+			   for high speed: interval -> microframes
+			   1          -> 1
+			   2          -> 2
+			   3          -> 4
+			   4          -> 8
+			   5          -> 16
+			   6          -> 32
+			   7 to 255   -> 32
+			*/
+			if (wd->usb.udev->speed == USB_SPEED_LOW)
+				pipe->bInterval = ep->bInterval + 5;
+			else if (wd->usb.udev->speed == USB_SPEED_FULL)
+				pipe->bInterval = ep->bInterval;
+			else {
+				int j, k;
+				for (j = k = 1; j < ep->bInterval; k++)
+					j *= 2;
+				pipe->bInterval = k;
+			}
+		}
+		pipe->handle = ep;
+		USBTRACE("%d: ep 0x%x, type %d, pkt_sz %d, intv %d (%d),"
+			 "type: %d, handle %p", i, ep->bEndpointAddress,
+			 ep->bmAttributes, pipe->wMaxPacketSize, ep->bInterval,
+			 pipe->bInterval, pipe->type, pipe->handle);
+	}
+}
+
+static USBD_STATUS wrap_select_configuration(struct wrap_device *wd,
+					     union nt_urb *nt_urb,
+					     struct irp *irp)
+{
+	int i, ret;
+	struct usbd_select_configuration *sel_conf;
+	struct usb_device *udev;
+	struct usbd_interface_information *intf;
+	struct usb_config_descriptor *config;
+	struct usb_interface *usb_intf;
+
+	udev = wd->usb.udev;
+	sel_conf = &nt_urb->select_conf;
+	config = sel_conf->config;
+	USBTRACE("%p", config);
+	if (config == NULL) {
+		kill_all_urbs(wd, 1);
+		ret = usb_reset_configuration(udev);
+		return wrap_urb_status(ret);
+	}
+
+	USBTRACE("conf: %d, type: %d, length: %d, numif: %d, attr: %08x",
+		 config->bConfigurationValue, config->bDescriptorType,
+		 config->wTotalLength, config->bNumInterfaces,
+		 config->bmAttributes);
+	ret = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
+			      USB_REQ_SET_CONFIGURATION, 0,
+			      config->bConfigurationValue, 0,
+			      NULL, 0, USB_CTRL_SET_TIMEOUT);
+	if (ret < 0) {
+		ERROR("ret: %d", ret);
+		return wrap_urb_status(ret);
+	}
+	sel_conf->handle = udev->actconfig;
+	intf = &sel_conf->intf;
+	for (i = 0; i < config->bNumInterfaces && intf->bLength > 0;
+	     i++, intf = (((void *)intf) + intf->bLength)) {
+
+		USBTRACE("intf: %d, alt setting: %d",
+			 intf->bInterfaceNumber, intf->bAlternateSetting);
+		ret = usb_set_interface(udev, intf->bInterfaceNumber,
+					intf->bAlternateSetting);
+		if (ret < 0) {
+			ERROR("failed with %d", ret);
+			return wrap_urb_status(ret);
+		}
+		usb_intf = usb_ifnum_to_if(udev, intf->bInterfaceNumber);
+		if (!usb_intf) {
+			ERROR("couldn't obtain ifnum");
+			return USBD_STATUS_REQUEST_FAILED;
+		}
+		USBTRACE("intf: %p, num ep: %d", intf, intf->bNumEndpoints);
+		set_intf_pipe_info(wd, usb_intf, intf);
+	}
+	return USBD_STATUS_SUCCESS;
+}
+
+static USBD_STATUS wrap_select_interface(struct wrap_device *wd,
+					 union nt_urb *nt_urb,
+					 struct irp *irp)
+{
+	int ret;
+	struct usbd_select_interface *sel_intf;
+	struct usb_device *udev;
+	struct usbd_interface_information *intf;
+	struct usb_interface *usb_intf;
+
+	udev = wd->usb.udev;
+	sel_intf = &nt_urb->select_intf;
+	intf = &sel_intf->intf;
+
+	ret = usb_set_interface(udev, intf->bInterfaceNumber,
+				intf->bAlternateSetting);
+	if (ret < 0) {
+		ERROR("failed with %d", ret);
+		return wrap_urb_status(ret);
+	}
+	usb_intf = usb_ifnum_to_if(udev, intf->bInterfaceNumber);
+	if (!usb_intf) {
+		ERROR("couldn't get interface information");
+		return USBD_STATUS_REQUEST_FAILED;
+	}
+	USBTRACE("intf: %p, num ep: %d", usb_intf, intf->bNumEndpoints);
+	set_intf_pipe_info(wd, usb_intf, intf);
+	return USBD_STATUS_SUCCESS;
+}
+
+static int wrap_usb_get_string(struct usb_device *udev, unsigned short langid,
+			       unsigned char index, void *buf, int size)
+{
+	int i, ret;
+	/* if langid is 0, return array of langauges supported in
+	 * buf */
+	for (i = 0; i < 3; i++) {
+		ret = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
+				      USB_REQ_GET_DESCRIPTOR, USB_DIR_IN,
+				      (USB_DT_STRING << 8) + index, langid,
+				      buf, size, USB_CTRL_GET_TIMEOUT);
+		if (ret > 0 || ret == -EPIPE)
+			break;
+	}
+	return ret;
+}
+
+static USBD_STATUS wrap_get_descriptor(struct wrap_device *wd,
+				       union nt_urb *nt_urb, struct irp *irp)
+{
+	struct usbd_control_descriptor_request *control_desc;
+	int ret = 0;
+	struct usb_device *udev;
+
+	udev = wd->usb.udev;
+	control_desc = &nt_urb->control_desc;
+	USBTRACE("desctype = %d, descindex = %d, transfer_buffer = %p,"
+		 "transfer_buffer_length = %d", control_desc->desc_type,
+		 control_desc->index, control_desc->transfer_buffer,
+		 control_desc->transfer_buffer_length);
+
+	if (control_desc->desc_type == USB_DT_STRING) {
+		USBTRACE("langid: %x", control_desc->language_id);
+		ret = wrap_usb_get_string(udev, control_desc->language_id,
+					  control_desc->index,
+					  control_desc->transfer_buffer,
+					  control_desc->transfer_buffer_length);
+	} else {
+		ret = usb_get_descriptor(udev, control_desc->desc_type,
+					 control_desc->index,
+					 control_desc->transfer_buffer,
+					 control_desc->transfer_buffer_length);
+	}
+	if (ret < 0) {
+		USBTRACE("request %d failed: %d", control_desc->desc_type, ret);
+		control_desc->transfer_buffer_length = 0;
+		return wrap_urb_status(ret);
+	} else {
+		USBTRACE("ret: %08x", ret);
+		control_desc->transfer_buffer_length = ret;
+		irp->io_status.info = ret;
+		return USBD_STATUS_SUCCESS;
+	}
+}
+
+static USBD_STATUS wrap_process_nt_urb(struct irp *irp)
+{
+	union nt_urb *nt_urb;
+	struct usb_device *udev;
+	USBD_STATUS status;
+	struct wrap_device *wd;
+
+	wd = IRP_WRAP_DEVICE(irp);
+	udev = wd->usb.udev;
+	nt_urb = IRP_URB(irp);
+	USBENTER("nt_urb = %p, irp = %p, length = %d, function = %x",
+		 nt_urb, irp, nt_urb->header.length, nt_urb->header.function);
+
+	DUMP_IRP(irp);
+	switch (nt_urb->header.function) {
+		/* bulk/int and vendor/class urbs are submitted to
+		 * Linux USB core; if the call is sucessful, urb's
+		 * completion worker will return IRP later */
+	case URB_FUNCTION_BULK_OR_INTERRUPT_TRANSFER:
+		USBTRACE("submitting bulk/int irp: %p", irp);
+		status = wrap_bulk_or_intr_trans(irp);
+		break;
+
+	case URB_FUNCTION_VENDOR_DEVICE:
+	case URB_FUNCTION_VENDOR_INTERFACE:
+	case URB_FUNCTION_VENDOR_ENDPOINT:
+	case URB_FUNCTION_VENDOR_OTHER:
+	case URB_FUNCTION_CLASS_DEVICE:
+	case URB_FUNCTION_CLASS_INTERFACE:
+	case URB_FUNCTION_CLASS_ENDPOINT:
+	case URB_FUNCTION_CLASS_OTHER:
+		USBTRACE("submitting vendor/class irp: %p", irp);
+		status = wrap_vendor_or_class_req(irp);
+		break;
+
+		/* rest are synchronous */
+	case URB_FUNCTION_SELECT_CONFIGURATION:
+		status = wrap_select_configuration(wd, nt_urb, irp);
+		NT_URB_STATUS(nt_urb) = status;
+		break;
+
+	case URB_FUNCTION_SELECT_INTERFACE:
+		status = wrap_select_interface(wd, nt_urb, irp);
+		NT_URB_STATUS(nt_urb) = status;
+		break;
+
+	case URB_FUNCTION_GET_DESCRIPTOR_FROM_DEVICE:
+		status = wrap_get_descriptor(wd, nt_urb, irp);
+		NT_URB_STATUS(nt_urb) = status;
+		break;
+
+	case URB_FUNCTION_SYNC_RESET_PIPE_AND_CLEAR_STALL:
+		status = wrap_reset_pipe(udev, irp);
+		NT_URB_STATUS(nt_urb) = status;
+		break;
+
+	case URB_FUNCTION_ABORT_PIPE:
+		status = wrap_abort_pipe(udev, irp);
+		break;
+
+	case URB_FUNCTION_SET_FEATURE_TO_DEVICE:
+	case URB_FUNCTION_SET_FEATURE_TO_INTERFACE:
+	case URB_FUNCTION_SET_FEATURE_TO_ENDPOINT:
+	case URB_FUNCTION_CLEAR_FEATURE_TO_DEVICE:
+	case URB_FUNCTION_CLEAR_FEATURE_TO_INTERFACE:
+	case URB_FUNCTION_CLEAR_FEATURE_TO_ENDPOINT:
+		status = wrap_set_clear_feature(udev, irp);
+		break;
+
+	case URB_FUNCTION_GET_STATUS_FROM_DEVICE:
+	case URB_FUNCTION_GET_STATUS_FROM_INTERFACE:
+	case URB_FUNCTION_GET_STATUS_FROM_ENDPOINT:
+		status = wrap_get_status_request(udev, irp);
+		break;
+
+	default:
+		ERROR("function %x not implemented", nt_urb->header.function);
+		status = NT_URB_STATUS(nt_urb) = USBD_STATUS_NOT_SUPPORTED;
+		break;
+	}
+	USBTRACE("status: %08X", status);
+	return status;
+}
+
+static USBD_STATUS wrap_reset_port(struct irp *irp)
+{
+	no_warn_unused int ret, lock = 0;
+	struct wrap_device *wd;
+
+	wd = IRP_WRAP_DEVICE(irp);
+	USBENTER("%p, %p", wd, wd->usb.udev);
+	lock = usb_lock_device_for_reset(wd->usb.udev, wd->usb.intf);
+	if (lock < 0) {
+		WARNING("locking failed: %d", lock);
+//		return wrap_urb_status(lock);
+		return USBD_STATUS_SUCCESS;
+	}
+	ret = usb_reset_device(wd->usb.udev);
+	if (ret < 0)
+		USBTRACE("reset failed: %d", ret);
+	/* TODO: should reconfigure? */
+	if (lock)
+		usb_unlock_device(wd->usb.udev);
+//	return wrap_urb_status(ret);
+	return USBD_STATUS_SUCCESS;
+}
+
+static USBD_STATUS wrap_get_port_status(struct irp *irp)
+{
+	struct wrap_device *wd;
+	ULONG *status;
+	enum usb_device_state state;
+
+	wd = IRP_WRAP_DEVICE(irp);
+	USBENTER("%p, %p", wd, wd->usb.udev);
+	status = IoGetCurrentIrpStackLocation(irp)->params.others.arg1;
+	state = wd->usb.udev->state;
+	if (state != USB_STATE_NOTATTACHED &&
+	    state != USB_STATE_SUSPENDED) {
+		*status |= USBD_PORT_CONNECTED;
+		if (state == USB_STATE_CONFIGURED)
+			*status |= USBD_PORT_ENABLED;
+	}
+	USBTRACE("state: %d, *status: %08X", state, *status);
+	return USBD_STATUS_SUCCESS;
+}
+
+NTSTATUS wrap_submit_irp(struct device_object *pdo, struct irp *irp)
+{
+	struct io_stack_location *irp_sl;
+	struct wrap_device *wd;
+	USBD_STATUS status;
+	struct usbd_idle_callback *idle_callback;
+
+	USBENTER("%p, %p", pdo, irp);
+	wd = pdo->reserved;
+	if (wd->usb.intf == NULL) {
+		USBTRACE("%p", irp);
+		irp->io_status.status = STATUS_DEVICE_REMOVED;
+		irp->io_status.info = 0;
+		USBEXIT(return STATUS_DEVICE_REMOVED);
+	}
+	IRP_WRAP_DEVICE(irp) = wd;
+	irp_sl = IoGetCurrentIrpStackLocation(irp);
+	switch (irp_sl->params.dev_ioctl.code) {
+	case IOCTL_INTERNAL_USB_SUBMIT_URB:
+		status = wrap_process_nt_urb(irp);
+		break;
+	case IOCTL_INTERNAL_USB_RESET_PORT:
+		status = wrap_reset_port(irp);
+		break;
+	case IOCTL_INTERNAL_USB_GET_PORT_STATUS:
+		status = wrap_get_port_status(irp);
+		break;
+	case IOCTL_INTERNAL_USB_SUBMIT_IDLE_NOTIFICATION:
+		idle_callback = irp_sl->params.dev_ioctl.type3_input_buf;
+		USBTRACE("suspend function: %p", idle_callback->callback);
+		status = USBD_STATUS_NOT_SUPPORTED;
+		break;
+	default:
+		ERROR("ioctl %08X NOT IMPLEMENTED",
+		      irp_sl->params.dev_ioctl.code);
+		status = USBD_STATUS_NOT_SUPPORTED;
+		break;
+	}
+
+	USBTRACE("status: %08X", status);
+	if (status == USBD_STATUS_PENDING) {
+		/* don't touch this IRP - it may have been already
+		 * completed/returned */
+		return STATUS_PENDING;
+	} else {
+		irp->io_status.status = nt_urb_irp_status(status);
+		if (status != USBD_STATUS_SUCCESS)
+			irp->io_status.info = 0;
+		USBEXIT(return irp->io_status.status);
+	}
+}
+
+/* TODO: The example on msdn in reference section suggests that second
+ * argument should be an array of usbd_interface_information, but
+ * description and examples elsewhere suggest that it should be
+ * usbd_interface_list_entry structre. Which is correct? */
+
+wstdcall union nt_urb *WIN_FUNC(USBD_CreateConfigurationRequestEx,2)
+	(struct usb_config_descriptor *config,
+	 struct usbd_interface_list_entry *intf_list)
+{
+	int size, i, n;
+	struct usbd_interface_information *intf;
+	struct usbd_pipe_information *pipe;
+	struct usb_interface_descriptor *intf_desc;
+	struct usbd_select_configuration *select_conf;
+
+	USBENTER("config = %p, intf_list = %p", config, intf_list);
+
+	/* calculate size required; select_conf already has space for
+	 * one intf structure */
+	size = sizeof(*select_conf) - sizeof(*intf);
+	for (n = 0; n < config->bNumInterfaces; n++) {
+		i = intf_list[n].intf_desc->bNumEndpoints;
+		/* intf already has space for one pipe */
+		size += sizeof(*intf) + (i - 1) * sizeof(*pipe);
+	}
+	/* don't use kmalloc - driver frees it with ExFreePool */
+	select_conf = ExAllocatePoolWithTag(NonPagedPool, size,
+					    POOL_TAG('L', 'U', 'S', 'B'));
+	if (!select_conf) {
+		WARNING("couldn't allocate memory");
+		return NULL;
+	}
+	memset(select_conf, 0, size);
+	intf = &select_conf->intf;
+	select_conf->handle = config;
+	for (n = 0; n < config->bNumInterfaces && intf_list[n].intf_desc; n++) {
+		/* initialize 'intf' fields in intf_list so they point
+		 * to appropriate entry; these may be read/written by
+		 * driver after this function returns */
+		intf_list[n].intf = intf;
+		intf_desc = intf_list[n].intf_desc;
+
+		i = intf_desc->bNumEndpoints;
+		intf->bLength = sizeof(*intf) + (i - 1) * sizeof(*pipe);
+
+		intf->bInterfaceNumber = intf_desc->bInterfaceNumber;
+		intf->bAlternateSetting = intf_desc->bAlternateSetting;
+		intf->bInterfaceClass = intf_desc->bInterfaceClass;
+		intf->bInterfaceSubClass = intf_desc->bInterfaceSubClass;
+		intf->bInterfaceProtocol = intf_desc->bInterfaceProtocol;
+		intf->bNumEndpoints = intf_desc->bNumEndpoints;
+
+		pipe = &intf->pipes[0];
+		for (i = 0; i < intf->bNumEndpoints; i++) {
+			memset(&pipe[i], 0, sizeof(*pipe));
+			pipe[i].max_tx_size =
+				USBD_DEFAULT_MAXIMUM_TRANSFER_SIZE;
+		}
+		intf->handle = intf_desc;
+		intf = (((void *)intf) + intf->bLength);
+	}
+	select_conf->header.function = URB_FUNCTION_SELECT_CONFIGURATION;
+	select_conf->header.length = size;
+	select_conf->config = config;
+	USBEXIT(return (union nt_urb *)select_conf);
+}
+
+WIN_SYMBOL_MAP("_USBD_CreateConfigurationRequestEx@8", USBD_CreateConfigurationRequestEx)
+
+wstdcall struct usb_interface_descriptor *
+WIN_FUNC(USBD_ParseConfigurationDescriptorEx,7)
+	(struct usb_config_descriptor *config, void *start,
+	 LONG bInterfaceNumber, LONG bAlternateSetting, LONG bInterfaceClass,
+	 LONG bInterfaceSubClass, LONG bInterfaceProtocol)
+{
+	void *pos;
+	struct usb_interface_descriptor *intf;
+
+	USBENTER("config = %p, start = %p, ifnum = %d, alt_setting = %d,"
+		 " class = %d, subclass = %d, proto = %d", config, start,
+		 bInterfaceNumber, bAlternateSetting, bInterfaceClass,
+		 bInterfaceSubClass, bInterfaceProtocol);
+
+	for (pos = start;
+	     pos < ((void *)config + le16_to_cpu(config->wTotalLength));
+	     pos += intf->bLength) {
+
+		intf = pos;
+
+		if ((intf->bDescriptorType == USB_DT_INTERFACE) &&
+		    ((bInterfaceNumber == -1) ||
+		     (intf->bInterfaceNumber == bInterfaceNumber)) &&
+		    ((bAlternateSetting == -1) ||
+		     (intf->bAlternateSetting == bAlternateSetting)) &&
+		    ((bInterfaceClass == -1) ||
+		     (intf->bInterfaceClass == bInterfaceClass)) &&
+		    ((bInterfaceSubClass == -1) ||
+		     (intf->bInterfaceSubClass == bInterfaceSubClass)) &&
+		    ((bInterfaceProtocol == -1) ||
+		     (intf->bInterfaceProtocol == bInterfaceProtocol))) {
+			USBTRACE("selected interface = %p", intf);
+			USBEXIT(return intf);
+		}
+	}
+	USBEXIT(return NULL);
+}
+
+WIN_SYMBOL_MAP("_USBD_ParseConfigurationDescriptorEx@28", USBD_ParseConfigurationDescriptorEx)
+
+wstdcall union nt_urb *WIN_FUNC(USBD_CreateConfigurationRequest,2)
+	(struct usb_config_descriptor *config, USHORT *size)
+{
+	union nt_urb *nt_urb;
+	struct usbd_interface_list_entry intf_list[2];
+	struct usb_interface_descriptor *intf_desc;
+
+	USBENTER("config = %p, urb_size = %p", config, size);
+
+	intf_desc = USBD_ParseConfigurationDescriptorEx(config, config, -1, -1,
+							-1, -1, -1);
+	intf_list[0].intf_desc = intf_desc;
+	intf_list[0].intf = NULL;
+	intf_list[1].intf_desc = NULL;
+	intf_list[1].intf = NULL;
+	nt_urb = USBD_CreateConfigurationRequestEx(config, intf_list);
+	if (!nt_urb)
+		return NULL;
+
+	*size = nt_urb->select_conf.header.length;
+	USBEXIT(return nt_urb);
+}
+
+wstdcall struct usb_interface_descriptor *
+WIN_FUNC(USBD_ParseConfigurationDescriptor,3)
+	(struct usb_config_descriptor *config, UCHAR bInterfaceNumber,
+	 UCHAR bAlternateSetting)
+{
+	return USBD_ParseConfigurationDescriptorEx(config, config,
+						   bInterfaceNumber,
+						   bAlternateSetting,
+						   -1, -1, -1);
+}
+
+wstdcall usb_common_descriptor_t *WIN_FUNC(USBD_ParseDescriptors,4)
+	(void *buf, ULONG length, void *start, LONG type)
+{
+	usb_common_descriptor_t *descr = start;
+
+	while ((void *)descr < buf + length) {
+		if (descr->bDescriptorType == type)
+			return descr;
+		if (descr->bLength == 0)
+			break;
+		descr = (void *)descr + descr->bLength;
+	}
+	USBEXIT(return NULL);
+}
+
+WIN_SYMBOL_MAP("_USBD_ParseDescriptors@16", USBD_ParseDescriptors)
+
+wstdcall void WIN_FUNC(USBD_GetUSBDIVersion,1)
+	(struct usbd_version_info *version_info)
+{
+	/* this function is obsolete in Windows XP */
+	if (version_info) {
+		version_info->usbdi_version = USBDI_VERSION_XP;
+		/* TODO: how do we get this correctly? */
+		version_info->supported_usb_version = 0x110;
+	}
+	USBEXIT(return);
+}
+
+wstdcall void
+USBD_InterfaceGetUSBDIVersion(void *context,
+			      struct usbd_version_info *version_info,
+			      ULONG *hcd_capa)
+{
+	struct wrap_device *wd = context;
+
+	if (version_info) {
+		version_info->usbdi_version = USBDI_VERSION_XP;
+		if (wd->usb.udev->speed == USB_SPEED_HIGH)
+			version_info->supported_usb_version = 0x200;
+		else
+			version_info->supported_usb_version = 0x110;
+	}
+	*hcd_capa = USB_HCD_CAPS_SUPPORTS_RT_THREADS;
+	USBEXIT(return);
+}
+
+wstdcall BOOLEAN USBD_InterfaceIsDeviceHighSpeed(void *context)
+{
+	struct wrap_device *wd = context;
+
+	USBTRACE("wd: %p", wd);
+	if (wd->usb.udev->speed == USB_SPEED_HIGH)
+		USBEXIT(return TRUE);
+	else
+		USBEXIT(return FALSE);
+}
+
+wstdcall void USBD_InterfaceReference(void *context)
+{
+	USBTRACE("%p", context);
+	TODO();
+}
+
+wstdcall void USBD_InterfaceDereference(void *context)
+{
+	USBTRACE("%p", context);
+	TODO();
+}
+
+wstdcall NTSTATUS USBD_InterfaceQueryBusTime(void *context, ULONG *frame)
+{
+	struct wrap_device *wd = context;
+
+	*frame = usb_get_current_frame_number(wd->usb.udev);
+	USBEXIT(return STATUS_SUCCESS);
+}
+
+wstdcall NTSTATUS USBD_InterfaceSubmitIsoOutUrb(void *context,
+					       union nt_urb *nt_urb)
+{
+	/* TODO: implement this */
+	TODO();
+	USBEXIT(return STATUS_NOT_IMPLEMENTED);
+}
+
+wstdcall NTSTATUS
+USBD_InterfaceQueryBusInformation(void *context, ULONG level, void *buf,
+				  ULONG *buf_length, ULONG *buf_actual_length)
+{
+	struct wrap_device *wd = context;
+	struct usb_bus_information_level *bus_info;
+	struct usb_bus *bus;
+
+	bus = wd->usb.udev->bus;
+	bus_info = buf;
+	TODO();
+	USBEXIT(return STATUS_NOT_IMPLEMENTED);
+}
+
+wstdcall NTSTATUS
+USBD_InterfaceLogEntry(void *context, ULONG driver_tag, ULONG enum_tag,
+		       ULONG p1, ULONG p2)
+{
+	ERROR("%p, %x, %x, %x, %x", context, driver_tag, enum_tag, p1, p2);
+	USBEXIT(return STATUS_SUCCESS);
+}
+
+int usb_init(void)
+{
+	InitializeListHead(&wrap_urb_complete_list);
+	spin_lock_init(&wrap_urb_complete_list_lock);
+	initialize_work(&wrap_urb_complete_work, wrap_urb_complete_worker, NULL);
+#ifdef USB_DEBUG
+	urb_id = 0;
+#endif
+	return 0;
+}
+
+void usb_exit(void)
+{
+	USBEXIT(return);
+}
+
+int usb_init_device(struct wrap_device *wd)
+{
+	InitializeListHead(&wd->usb.wrap_urb_list);
+	wd->usb.num_alloc_urbs = 0;
+	USBEXIT(return 0);
+}
+
+void usb_exit_device(struct wrap_device *wd)
+{
+	kill_all_urbs(wd, 0);
+	USBEXIT(return);
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/ndiswrapper/ntoskernel.h
+++ linux-mvl-dove-2.6.32/ubuntu/ndiswrapper/ntoskernel.h
@@ -0,0 +1,1157 @@
+/*
+ *  Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *  GNU General Public License for more details.
+ *
+ */
+
+#ifndef _NTOSKERNEL_H_
+#define _NTOSKERNEL_H_
+
+#include <linux/types.h>
+#include <linux/timer.h>
+#include <linux/time.h>
+#include <linux/module.h>
+#include <linux/kmod.h>
+
+#include <linux/netdevice.h>
+#include <linux/wireless.h>
+#include <linux/pci.h>
+#include <linux/wait.h>
+#include <linux/pm.h>
+#include <linux/delay.h>
+#include <linux/mm.h>
+#include <linux/random.h>
+#include <linux/ctype.h>
+#include <linux/list.h>
+#include <linux/sched.h>
+#include <linux/usb.h>
+#include <linux/spinlock.h>
+#include <asm/mman.h>
+#include <linux/version.h>
+#include <linux/etherdevice.h>
+#include <net/iw_handler.h>
+#include <linux/ethtool.h>
+#include <linux/if_arp.h>
+#include <linux/rtnetlink.h>
+#include <linux/highmem.h>
+#include <linux/percpu.h>
+#include <linux/kthread.h>
+#include <linux/workqueue.h>
+
+#if !defined(CONFIG_X86) && !defined(CONFIG_X86_64)
+#error "this module is for x86 or x86_64 architectures only"
+#endif
+
+/* Interrupt backwards compatibility stuff */
+#include <linux/interrupt.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)
+#ifndef IRQ_HANDLED
+#define IRQ_HANDLED
+#define IRQ_NONE
+#define irqreturn_t void
+#endif
+#endif /* Linux < 2.6.29 */
+
+/* pci functions in 2.6 kernels have problems allocating dma buffers,
+ * but seem to work fine with dma functions
+ */
+#include <asm/dma-mapping.h>
+
+#define PCI_DMA_ALLOC_COHERENT(pci_dev,size,dma_handle)			\
+	dma_alloc_coherent(&pci_dev->dev,size,dma_handle,		\
+			   GFP_KERNEL | __GFP_REPEAT)
+#define PCI_DMA_FREE_COHERENT(pci_dev,size,cpu_addr,dma_handle)		\
+	dma_free_coherent(&pci_dev->dev,size,cpu_addr,dma_handle)
+#define PCI_DMA_MAP_SINGLE(pci_dev,addr,size,direction)		\
+	dma_map_single(&pci_dev->dev,addr,size,direction)
+#define PCI_DMA_UNMAP_SINGLE(pci_dev,dma_handle,size,direction)		\
+	dma_unmap_single(&pci_dev->dev,dma_handle,size,direction)
+#define MAP_SG(pci_dev, sglist, nents, direction)		\
+	dma_map_sg(&pci_dev->dev, sglist, nents, direction)
+#define UNMAP_SG(pci_dev, sglist, nents, direction)		\
+	dma_unmap_sg(&pci_dev->dev, sglist, nents, direction)
+#define PCI_DMA_MAP_ERROR(dma_addr) dma_mapping_error(dma_addr)
+
+
+#if defined(CONFIG_NET_RADIO) && !defined(CONFIG_WIRELESS_EXT)
+#define CONFIG_WIRELESS_EXT
+#endif
+
+#define prepare_wait_condition(task, var, value)	\
+do {							\
+	var = value;					\
+	task = current;					\
+	barrier();					\
+} while (0)
+
+/* Wait in wait_state (e.g., TASK_INTERRUPTIBLE) for condition to
+ * become true; timeout is either jiffies (> 0) to wait or 0 to wait
+ * forever.
+ * When timeout == 0, return value is
+ *    > 0 if condition becomes true, or
+ *    < 0 if signal is pending on the thread.
+ * When timeout > 0, return value is
+ *    > 0 if condition becomes true before timeout,
+ *    < 0 if signal is pending on the thread before timeout, or
+ *    0 if timedout (condition may have become true at the same time)
+ */
+
+#define wait_condition(condition, timeout, wait_state)		\
+({								\
+	long ret = timeout ? timeout : 1;			\
+	while (1) {						\
+		if (signal_pending(current)) {			\
+			ret = -ERESTARTSYS;			\
+			break;					\
+		}						\
+		set_current_state(wait_state);			\
+		if (condition) {				\
+			__set_current_state(TASK_RUNNING);	\
+			break;					\
+		}						\
+		if (timeout) {					\
+			ret = schedule_timeout(ret);		\
+			if (!ret)				\
+				break;				\
+		} else						\
+			schedule();				\
+	}							\
+	ret;							\
+})
+
+#ifdef WRAP_WQ
+
+struct workqueue_struct;
+
+struct workqueue_thread {
+	spinlock_t lock;
+	struct task_struct *task;
+	struct completion *completion;
+	char name[16];
+	int pid;
+	/* whether any work_structs pending? <0 implies quit */
+	s8 pending;
+	/* list of work_structs pending */
+	struct list_head work_list;
+};
+
+typedef struct workqueue_struct {
+	u8 singlethread;
+	u8 qon;
+	int num_cpus;
+	struct workqueue_thread threads[0];
+} workqueue_struct_t;
+
+typedef struct {
+	struct list_head list;
+	void (*func)(void *data);
+	void *data;
+	/* whether/on which thread scheduled */
+	struct workqueue_thread *thread;
+} work_struct_t;
+
+#define initialize_work(work, pfunc, pdata)			\
+	do {							\
+		(work)->func = (pfunc);				\
+		(work)->data = (pdata);				\
+		(work)->thread = NULL;				\
+	} while (0)
+
+#undef create_singlethread_workqueue
+#define create_singlethread_workqueue(name) wrap_create_wq(name, 1, 0)
+#undef create_workqueue
+#define create_workqueue(name) wrap_create_wq(name, 0, 0)
+#undef destroy_workqueue
+#define destroy_workqueue wrap_destroy_wq
+#undef queue_work
+#define queue_work wrap_queue_work
+#undef flush_workqueue
+#define flush_workqueue wrap_flush_wq
+
+workqueue_struct_t *wrap_create_wq(const char *name, u8 singlethread, u8 freeze);
+void wrap_destroy_wq_on(workqueue_struct_t *workq, int cpu);
+void wrap_destroy_wq(workqueue_struct_t *workq);
+int wrap_queue_work_on(workqueue_struct_t *workq, work_struct_t *work,
+		       int cpu);
+int wrap_queue_work(workqueue_struct_t *workq, work_struct_t *work);
+void wrap_cancel_work(work_struct_t *work);
+void wrap_flush_wq_on(workqueue_struct_t *workq, int cpu);
+void wrap_flush_wq(workqueue_struct_t *workq);
+typedef void *worker_param_t;
+#define worker_param_data(param, type, member) param
+
+#else // WRAP_WQ
+
+typedef struct workqueue_struct workqueue_struct_t;
+typedef struct work_struct work_struct_t;
+
+#if defined(INIT_WORK_NAR) || defined(INIT_DELAYED_WORK_DEFERRABLE)
+#define initialize_work(work, func, data) INIT_WORK(work, func)
+typedef struct work_struct *worker_param_t;
+#define worker_param_data(param, type, member)	\
+	container_of(param, type, member)
+#else
+#define initialize_work(work, func, data) INIT_WORK(work, func, data)
+typedef void *worker_param_t;
+#define worker_param_data(param, type, member) param
+#endif // INIT_WORK_NAR
+
+#endif // WRAP_WQ
+
+struct nt_thread *wrap_worker_init(workqueue_struct_t *wq);
+
+#ifdef module_param
+#define WRAP_MODULE_PARM_INT(name, perm) module_param(name, int, perm)
+#define WRAP_MODULE_PARM_STRING(name, perm) module_param(name, charp, perm)
+#else
+#define WRAP_MODULE_PARM_INT(name, perm) MODULE_PARM(name, "i")
+#define WRAP_MODULE_PARM_STRING(name, perm) MODULE_PARM(name, "s")
+#endif
+
+#ifndef LOCK_PREFIX
+#ifdef LOCK
+#define LOCK_PREFIX LOCK
+#else
+#ifdef CONFIG_SMP
+#define LOCK_PREFIX "lock ; "
+#else
+#define LOCK_PREFIX ""
+#endif
+#endif
+#endif
+
+#ifndef NETDEV_TX_OK
+#define NETDEV_TX_OK 0
+#endif
+
+#ifndef NETDEV_TX_BUSY
+#define NETDEV_TX_BUSY 1
+#endif
+
+#ifndef CHECKSUM_HW
+#define CHECKSUM_HW CHECKSUM_PARTIAL
+#endif
+
+#ifndef offset_in_page
+#define offset_in_page(p) ((unsigned long)(p) & ~PAGE_MASK)
+#endif
+
+#ifndef PMSG_SUSPEND
+#ifdef PM_SUSPEND
+/* this is not correct - the value of PM_SUSPEND is different from
+ * PMSG_SUSPEND, but ndiswrapper doesn't care about the value when
+ * suspending */
+#define PMSG_SUSPEND PM_SUSPEND
+#define PSMG_ON PM_ON
+#else
+typedef u32 pm_message_t;
+#define PMSG_SUSPEND 2
+#define PMSG_ON 0
+#endif
+#endif
+
+#ifndef PCI_D0
+#define PCI_D0 0
+#endif
+
+#ifndef PCI_D3hot
+#define PCI_D3hot 3
+#endif
+
+#ifndef PCI_D3cold
+#define PCI_D3cold 3
+#endif
+
+#ifndef PM_EVENT_SUSPEND
+#define PM_EVENT_SUSPEND 2
+#endif
+
+#if !defined(HAVE_NETDEV_PRIV)
+#define netdev_priv(dev)  ((dev)->priv)
+#endif
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18)
+#define ISR_PT_REGS_PARAM_DECL
+#define ISR_PT_REGS_ARG
+#else
+#define ISR_PT_REGS_PARAM_DECL , struct pt_regs *regs
+#define ISR_PT_REGS_ARG , NULL
+#endif
+
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,16)
+#define for_each_possible_cpu(_cpu) for_each_cpu(_cpu)
+#endif
+
+#ifndef flush_icache_range
+#define flush_icache_range(start, end) do { } while (0)
+#endif
+
+#ifndef CHECKSUM_PARTIAL
+#define CHECKSUM_PARTIAL CHECKSUM_HW
+#endif
+
+#ifndef IRQF_SHARED
+#define IRQF_SHARED SA_SHIRQ
+#endif
+
+#define memcpy_skb(skb, from, length)			\
+	memcpy(skb_put(skb, length), from, length)
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
+#ifndef DMA_BIT_MASK
+#define DMA_BIT_MASK(n)	(((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
+#endif
+#endif
+
+#ifndef __GFP_DMA32
+#define __GFP_DMA32 GFP_DMA
+#endif
+
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,22)
+#define wrap_kmem_cache_create(name, size, align, flags)	\
+	kmem_cache_create(name, size, align, flags, NULL, NULL)
+#else
+#define wrap_kmem_cache_create(name, size, align, flags)	\
+	kmem_cache_create(name, size, align, flags, NULL)
+#endif
+
+#include "winnt_types.h"
+#include "ndiswrapper.h"
+#include "pe_linker.h"
+#include "wrapmem.h"
+#include "lin2win.h"
+#include "loader.h"
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)
+static inline void netif_tx_lock(struct net_device *dev)
+{
+	spin_lock(&dev->xmit_lock);
+}
+static inline void netif_tx_unlock(struct net_device *dev)
+{
+	spin_unlock(&dev->xmit_lock);
+}
+static inline void netif_tx_lock_bh(struct net_device *dev)
+{
+	spin_lock_bh(&dev->xmit_lock);
+}
+static inline void netif_tx_unlock_bh(struct net_device *dev)
+{
+	spin_unlock_bh(&dev->xmit_lock);
+}
+#endif
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
+static inline void netif_poll_enable(struct net_device *dev)
+{
+}
+static inline void netif_poll_disable(struct net_device *dev)
+{
+}
+#endif
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
+#define proc_net_root init_net.proc_net
+#else
+#define proc_net_root proc_net
+#endif
+
+/* TICK is 100ns */
+#define TICKSPERSEC		10000000
+#define TICKSPERMSEC		10000
+#define SECSPERDAY		86400
+#define TICKSPERJIFFY		((TICKSPERSEC + HZ - 1) / HZ)
+
+#define int_div_round(x, y) (((x) + (y - 1)) / (y))
+
+/* 1601 to 1970 is 369 years plus 89 leap days */
+#define SECS_1601_TO_1970	((369 * 365 + 89) * (u64)SECSPERDAY)
+#define TICKS_1601_TO_1970	(SECS_1601_TO_1970 * TICKSPERSEC)
+
+/* 100ns units to HZ; if sys_time is negative, relative to current
+ * clock, otherwise from year 1601 */
+#define SYSTEM_TIME_TO_HZ(sys_time)					\
+	(((sys_time) <= 0) ? \
+	 int_div_round(((u64)HZ * (-(sys_time))), TICKSPERSEC) :	\
+	 int_div_round(((s64)HZ * ((sys_time) - ticks_1601())), TICKSPERSEC))
+
+#define MSEC_TO_HZ(ms) int_div_round((ms * HZ), 1000)
+#define USEC_TO_HZ(us) int_div_round((us * HZ), 1000000)
+
+extern u64 wrap_ticks_to_boot;
+
+static inline u64 ticks_1601(void)
+{
+	return wrap_ticks_to_boot + (u64)jiffies * TICKSPERJIFFY;
+}
+
+typedef void (*generic_func)(void);
+
+struct wrap_export {
+	const char *name;
+	generic_func func;
+};
+
+#ifdef CONFIG_X86_64
+
+#define WIN_SYMBOL(name, argc)					\
+	{#name, (generic_func) win2lin_ ## name ## _ ## argc}
+#define WIN_WIN_SYMBOL(name, argc)					\
+	{#name, (generic_func) win2lin__win_ ## name ## _ ## argc}
+#define WIN_FUNC_DECL(name, argc)			\
+	extern typeof(name) win2lin_ ## name ## _ ## argc;
+#define WIN_FUNC_PTR(name, argc) win2lin_ ## name ## _ ## argc
+
+#else
+
+#define WIN_SYMBOL(name, argc) {#name, (generic_func)name}
+#define WIN_WIN_SYMBOL(name, argc) {#name, (generic_func)_win_ ## name}
+#define WIN_FUNC_DECL(name, argc)
+#define WIN_FUNC_PTR(name, argc) name
+
+#endif
+
+#define WIN_FUNC(name, argc) name
+/* map name s to f - if f is different from s */
+#define WIN_SYMBOL_MAP(s, f)
+
+#define POOL_TAG(A, B, C, D)					\
+	((ULONG)((A) + ((B) << 8) + ((C) << 16) + ((D) << 24)))
+
+struct pe_image {
+	char name[MAX_DRIVER_NAME_LEN];
+	UINT (*entry)(struct driver_object *, struct unicode_string *) wstdcall;
+	void *image;
+	int size;
+	int type;
+
+	IMAGE_NT_HEADERS *nt_hdr;
+	IMAGE_OPTIONAL_HEADER *opt_hdr;
+};
+
+struct ndis_mp_block;
+
+struct wrap_timer {
+	struct nt_slist slist;
+	struct timer_list timer;
+	struct nt_timer *nt_timer;
+	long repeat;
+#ifdef TIMER_DEBUG
+	unsigned long wrap_timer_magic;
+#endif
+};
+
+struct ntos_work_item {
+	struct nt_list list;
+	void *arg1;
+	void *arg2;
+	NTOS_WORK_FUNC func;
+};
+
+struct wrap_device_setting {
+	struct nt_list list;
+	char name[MAX_SETTING_NAME_LEN];
+	char value[MAX_SETTING_VALUE_LEN];
+	void *encoded;
+};
+
+struct wrap_bin_file {
+	char name[MAX_DRIVER_NAME_LEN];
+	size_t size;
+	void *data;
+};
+
+#define WRAP_DRIVER_CLIENT_ID 1
+
+struct wrap_driver {
+	struct nt_list list;
+	struct driver_object *drv_obj;
+	char name[MAX_DRIVER_NAME_LEN];
+	char version[MAX_SETTING_VALUE_LEN];
+	unsigned short num_pe_images;
+	struct pe_image pe_images[MAX_DRIVER_PE_IMAGES];
+	unsigned short num_bin_files;
+	struct wrap_bin_file *bin_files;
+	struct nt_list wrap_devices;
+	struct nt_list settings;
+	int dev_type;
+	struct ndis_driver *ndis_driver;
+};
+
+enum hw_status {
+	HW_INITIALIZED = 1, HW_SUSPENDED, HW_HALTED, HW_PRESENT,
+};
+
+struct wrap_device {
+	/* first part is (de)initialized once by loader */
+	struct nt_list list;
+	int dev_bus;
+	int vendor;
+	int device;
+	int subvendor;
+	int subdevice;
+	char conf_file_name[MAX_DRIVER_NAME_LEN];
+	char driver_name[MAX_DRIVER_NAME_LEN];
+	struct wrap_driver *driver;
+	struct nt_list settings;
+
+	/* rest should be (de)initialized when a device is
+	 * (un)plugged */
+	struct cm_resource_list *resource_list;
+	unsigned long hw_status;
+	struct device_object *pdo;
+	union {
+		struct {
+			struct pci_dev *pdev;
+			enum device_power_state wake_state;
+		} pci;
+		struct {
+			struct usb_device *udev;
+			struct usb_interface *intf;
+			int num_alloc_urbs;
+			struct nt_list wrap_urb_list;
+		} usb;
+	};
+	union {
+		struct ndis_device *wnd;
+	};
+};
+
+#define wrap_is_pci_bus(dev_bus)			\
+	(WRAP_BUS(dev_bus) == WRAP_PCI_BUS ||		\
+	 WRAP_BUS(dev_bus) == WRAP_PCMCIA_BUS)
+#ifdef ENABLE_USB
+/* earlier versions of ndiswrapper used 0 as USB_BUS */
+#define wrap_is_usb_bus(dev_bus)			\
+	(WRAP_BUS(dev_bus) == WRAP_USB_BUS ||		\
+	 WRAP_BUS(dev_bus) == WRAP_INTERNAL_BUS)
+#else
+#define wrap_is_usb_bus(dev_bus) 0
+#endif
+#define wrap_is_bluetooth_device(dev_bus)			\
+	(WRAP_DEVICE(dev_bus) == WRAP_BLUETOOTH_DEVICE1 ||	\
+	 WRAP_DEVICE(dev_bus) == WRAP_BLUETOOTH_DEVICE2)
+
+extern workqueue_struct_t *ntos_wq;
+#define schedule_ntos_work(work_struct) queue_work(ntos_wq, work_struct)
+#define schedule_work(work_struct) queue_work(ntos_wq, work_struct)
+
+extern workqueue_struct_t *ndis_wq;
+#define schedule_ndis_work(work_struct) queue_work(ndis_wq, work_struct)
+
+extern workqueue_struct_t *wrapndis_wq;
+#define schedule_wrapndis_work(work_struct) queue_work(wrapndis_wq, work_struct)
+
+#define atomic_unary_op(var, size, oper)				\
+do {									\
+	if (size == 1)							\
+		__asm__ __volatile__(					\
+			LOCK_PREFIX oper "b %b0\n\t" : "+m" (var));	\
+	else if (size == 2)						\
+		__asm__ __volatile__(					\
+			LOCK_PREFIX oper "w %w0\n\t" : "+m" (var));	\
+	else if (size == 4)						\
+		__asm__ __volatile__(					\
+			LOCK_PREFIX oper "l %0\n\t" : "+m" (var));	\
+	else if (size == 8)						\
+		__asm__ __volatile__(					\
+			LOCK_PREFIX oper "q %q0\n\t" : "+m" (var));	\
+	else {								\
+		extern void _invalid_op_size_(void);			\
+		_invalid_op_size_();					\
+	}								\
+} while (0)
+
+#define atomic_inc_var_size(var, size) atomic_unary_op(var, size, "inc")
+
+#define atomic_inc_var(var) atomic_inc_var_size(var, sizeof(var))
+
+#define atomic_dec_var_size(var, size) atomic_unary_op(var, size, "dec")
+
+#define atomic_dec_var(var) atomic_dec_var_size(var, sizeof(var))
+
+#define pre_atomic_add(var, i)					\
+({								\
+	typeof(var) pre;					\
+	__asm__ __volatile__(					\
+		LOCK_PREFIX "xadd %0, %1\n\t"			\
+		: "=r"(pre), "+m"(var)				\
+		: "0"(i));					\
+	pre;							\
+})
+
+#define post_atomic_add(var, i) (pre_atomic_add(var, i) + i)
+
+#ifndef in_atomic
+#define in_atomic() in_interrupt()
+#endif
+
+#ifndef preempt_enable_no_resched
+#define preempt_enable_no_resched() preempt_enable()
+#endif
+
+//#define DEBUG_IRQL 1
+
+#ifdef DEBUG_IRQL
+#define assert_irql(cond)						\
+do {									\
+	KIRQL _irql_ = current_irql();					\
+	if (!(cond)) {							\
+		WARNING("assertion '%s' failed: %d", #cond, _irql_);	\
+		DBG_BLOCK(4) {						\
+			dump_stack();					\
+		}							\
+	}								\
+} while (0)
+#else
+#define assert_irql(cond) do { } while (0)
+#endif
+
+/* When preempt is enabled, we should preempt_disable to raise IRQL to
+ * DISPATCH_LEVEL, to be consistent with the semantics. However, using
+ * a mutex instead, so that only ndiswrapper threads run one at a time
+ * on a processor when at DISPATCH_LEVEL seems to be enough. So that
+ * is what we will use until we learn otherwise. If
+ * preempt_(en|dis)able is required for some reason, comment out
+ * following #define. */
+
+#define WRAP_PREEMPT 1
+
+#if !defined(CONFIG_PREEMPT) || defined(CONFIG_PREEMPT_RT)
+#ifndef WRAP_PREEMPT
+#define WRAP_PREEMPT 1
+#endif
+#endif
+
+//#undef WRAP_PREEMPT
+
+#ifdef WRAP_PREEMPT
+
+typedef struct {
+	int count;
+	struct mutex lock;
+#ifdef CONFIG_SMP
+	typeof(current->cpus_allowed) cpus_allowed;
+#endif
+	struct task_struct *task;
+} irql_info_t;
+
+DECLARE_PER_CPU(irql_info_t, irql_info);
+
+static inline KIRQL raise_irql(KIRQL newirql)
+{
+	irql_info_t *info;
+
+	assert(newirql == DISPATCH_LEVEL);
+	info = &get_cpu_var(irql_info);
+	if (info->task == current) {
+		assert(info->count > 0);
+		assert(mutex_is_locked(&info->lock));
+#if defined(CONFIG_SMP) && defined(DEBUG)
+		do {
+			cpumask_t cpumask;
+			cpumask = cpumask_of_cpu(smp_processor_id());
+			cpus_xor(cpumask, cpumask, current->cpus_allowed);
+			assert(cpus_empty(cpumask));
+		} while (0);
+#endif
+		info->count++;
+		put_cpu_var(irql_info);
+		return DISPATCH_LEVEL;
+	}
+	/* TODO: is this enough to pin down to current cpu? */
+#ifdef CONFIG_SMP
+	assert(task_cpu(current) == smp_processor_id());
+	info->cpus_allowed = current->cpus_allowed;
+	current->cpus_allowed = cpumask_of_cpu(smp_processor_id());
+#endif
+	put_cpu_var(irql_info);
+	mutex_lock(&info->lock);
+	assert(info->count == 0);
+	assert(info->task == NULL);
+	info->count = 1;
+	info->task = current;
+	return PASSIVE_LEVEL;
+}
+
+static inline void lower_irql(KIRQL oldirql)
+{
+	irql_info_t *info;
+
+	assert(oldirql <= DISPATCH_LEVEL);
+	info = &get_cpu_var(irql_info);
+	assert(info->task == current);
+	assert(mutex_is_locked(&info->lock));
+	assert(info->count > 0);
+	if (--info->count == 0) {
+		info->task = NULL;
+#ifdef CONFIG_SMP
+		current->cpus_allowed = info->cpus_allowed;
+#endif
+		mutex_unlock(&info->lock);
+	}
+	put_cpu_var(irql_info);
+}
+
+static inline KIRQL current_irql(void)
+{
+	int count;
+	if (in_irq() || irqs_disabled())
+		EXIT4(return DIRQL);
+	if (in_atomic() || in_interrupt())
+		EXIT4(return SOFT_IRQL);
+	count = get_cpu_var(irql_info).count;
+	put_cpu_var(irql_info);
+	if (count)
+		EXIT6(return DISPATCH_LEVEL);
+	else
+		EXIT6(return PASSIVE_LEVEL);
+}
+
+#else
+
+static inline KIRQL current_irql(void)
+{
+	if (in_irq() || irqs_disabled())
+		EXIT4(return DIRQL);
+	if (in_interrupt())
+		EXIT4(return SOFT_IRQL);
+	if (in_atomic())
+		EXIT6(return DISPATCH_LEVEL);
+	else
+		EXIT6(return PASSIVE_LEVEL);
+}
+
+static inline KIRQL raise_irql(KIRQL newirql)
+{
+	KIRQL ret = in_atomic() ? DISPATCH_LEVEL : PASSIVE_LEVEL;
+	assert(newirql == DISPATCH_LEVEL);
+	assert(current_irql() <= DISPATCH_LEVEL);
+	preempt_disable();
+	return ret;
+}
+
+static inline void lower_irql(KIRQL oldirql)
+{
+	assert(current_irql() == DISPATCH_LEVEL);
+	preempt_enable();
+}
+
+#endif
+
+#define irql_gfp() (in_atomic() ? GFP_ATOMIC : GFP_KERNEL)
+
+/* Windows spinlocks are of type ULONG_PTR which is not big enough to
+ * store Linux spinlocks; so we implement Windows spinlocks using
+ * ULONG_PTR space with our own functions/macros */
+
+/* Windows seems to use 0 for unlocked state of spinlock - if Linux
+ * convention of 1 for unlocked state is used, at least prism54 driver
+ * crashes */
+
+#define NT_SPIN_LOCK_UNLOCKED 0
+#define NT_SPIN_LOCK_LOCKED 1
+
+static inline void  nt_spin_lock_init(NT_SPIN_LOCK *lock)
+{
+	*lock = NT_SPIN_LOCK_UNLOCKED;
+}
+
+#ifdef CONFIG_SMP
+
+static inline void nt_spin_lock(NT_SPIN_LOCK *lock)
+{
+	__asm__ __volatile__(
+		"1:\t"
+		"  xchgl %1, %0\n\t"
+		"  testl %1, %1\n\t"
+		"  jz 3f\n"
+		"2:\t"
+		"  rep; nop\n\t"
+		"  cmpl %2, %0\n\t"
+		"  je 1b\n\t"
+		"  jmp 2b\n"
+		"3:\n\t"
+		: "+m" (*lock)
+		: "r" (NT_SPIN_LOCK_LOCKED), "i" (NT_SPIN_LOCK_UNLOCKED));
+}
+
+static inline void nt_spin_unlock(NT_SPIN_LOCK *lock)
+{
+	*lock = NT_SPIN_LOCK_UNLOCKED;
+}
+
+#else // CONFIG_SMP
+
+#define nt_spin_lock(lock) do { } while (0)
+
+#define nt_spin_unlock(lock)  do { } while (0)
+
+#endif // CONFIG_SMP
+
+/* When kernel would've disabled preempt (e.g., in interrupt
+ * handlers), we need to fake preempt so driver thinks it is running
+ * at right IRQL */
+
+/* raise IRQL to given (higher) IRQL if necessary before locking */
+static inline KIRQL nt_spin_lock_irql(NT_SPIN_LOCK *lock, KIRQL newirql)
+{
+	KIRQL oldirql = raise_irql(newirql);
+	nt_spin_lock(lock);
+	return oldirql;
+}
+
+/* lower IRQL to given (lower) IRQL if necessary after unlocking */
+static inline void nt_spin_unlock_irql(NT_SPIN_LOCK *lock, KIRQL oldirql)
+{
+	nt_spin_unlock(lock);
+	lower_irql(oldirql);
+}
+
+#define nt_spin_lock_irqsave(lock, flags)				\
+do {									\
+	local_irq_save(flags);						\
+	preempt_disable();						\
+	nt_spin_lock(lock);						\
+} while (0)
+
+#define nt_spin_unlock_irqrestore(lock, flags)				\
+do {									\
+	nt_spin_unlock(lock);						\
+	preempt_enable_no_resched();					\
+	local_irq_restore(flags);					\
+	preempt_check_resched();					\
+} while (0)
+
+static inline ULONG SPAN_PAGES(void *ptr, SIZE_T length)
+{
+	return PAGE_ALIGN(((unsigned long)ptr & (PAGE_SIZE - 1)) + length)
+		>> PAGE_SHIFT;
+}
+
+#ifdef CONFIG_X86_64
+
+/* TODO: can these be implemented without using spinlock? */
+
+static inline struct nt_slist *PushEntrySList(nt_slist_header *head,
+					      struct nt_slist *entry,
+					      NT_SPIN_LOCK *lock)
+{
+	KIRQL irql = nt_spin_lock_irql(lock, DISPATCH_LEVEL);
+	entry->next = head->next;
+	head->next = entry;
+	head->depth++;
+	nt_spin_unlock_irql(lock, irql);
+	TRACE4("%p, %p, %p", head, entry, entry->next);
+	return entry->next;
+}
+
+static inline struct nt_slist *PopEntrySList(nt_slist_header *head,
+					     NT_SPIN_LOCK *lock)
+{
+	struct nt_slist *entry;
+	KIRQL irql = nt_spin_lock_irql(lock, DISPATCH_LEVEL);
+	entry = head->next;
+	if (entry) {
+		head->next = entry->next;
+		head->depth--;
+	}
+	nt_spin_unlock_irql(lock, irql);
+	TRACE4("%p, %p", head, entry);
+	return entry;
+}
+
+#else
+
+#define u64_low_32(x) ((u32)x)
+#define u64_high_32(x) ((u32)(x >> 32))
+
+static inline u64 cmpxchg8b(volatile u64 *ptr, u64 old, u64 new)
+{
+	u64 prev;
+
+	__asm__ __volatile__(
+		"\n"
+		LOCK_PREFIX "cmpxchg8b %0\n"
+		: "+m" (*ptr), "=A" (prev)
+		: "A" (old), "b" (u64_low_32(new)), "c" (u64_high_32(new)));
+	return prev;
+}
+
+/* slist routines below update slist atomically - no need for
+ * spinlocks */
+
+static inline struct nt_slist *PushEntrySList(nt_slist_header *head,
+					      struct nt_slist *entry,
+					      NT_SPIN_LOCK *lock)
+{
+	nt_slist_header old, new;
+	do {
+		old.align = head->align;
+		entry->next = old.next;
+		new.next = entry;
+		new.depth = old.depth + 1;
+	} while (cmpxchg8b(&head->align, old.align, new.align) != old.align);
+	TRACE4("%p, %p, %p", head, entry, old.next);
+	return old.next;
+}
+
+static inline struct nt_slist *PopEntrySList(nt_slist_header *head,
+					     NT_SPIN_LOCK *lock)
+{
+	struct nt_slist *entry;
+	nt_slist_header old, new;
+	do {
+		old.align = head->align;
+		entry = old.next;
+		if (!entry)
+			break;
+		new.next = entry->next;
+		new.depth = old.depth - 1;
+	} while (cmpxchg8b(&head->align, old.align, new.align) != old.align);
+	TRACE4("%p, %p", head, entry);
+	return entry;
+}
+
+#endif
+
+#define sleep_hz(n)					\
+do {							\
+	set_current_state(TASK_INTERRUPTIBLE);		\
+	schedule_timeout(n);				\
+} while (0)
+
+int ntoskernel_init(void);
+void ntoskernel_exit(void);
+int ntoskernel_init_device(struct wrap_device *wd);
+void ntoskernel_exit_device(struct wrap_device *wd);
+void *allocate_object(ULONG size, enum common_object_type type,
+		      struct unicode_string *name);
+void free_object(void *object);
+
+int usb_init(void);
+void usb_exit(void);
+int usb_init_device(struct wrap_device *wd);
+void usb_exit_device(struct wrap_device *wd);
+void usb_cancel_pending_urbs(void);
+
+int crt_init(void);
+void crt_exit(void);
+int rtl_init(void);
+void rtl_exit(void);
+int wrap_procfs_init(void);
+void wrap_procfs_remove(void);
+
+int link_pe_images(struct pe_image *pe_image, unsigned short n);
+
+int stricmp(const char *s1, const char *s2);
+void dump_bytes(const char *name, const u8 *from, int len);
+struct mdl *allocate_init_mdl(void *virt, ULONG length);
+void free_mdl(struct mdl *mdl);
+struct driver_object *find_bus_driver(const char *name);
+void free_custom_extensions(struct driver_extension *drv_obj_ext);
+struct nt_thread *get_current_nt_thread(void);
+u64 ticks_1601(void);
+int schedule_ntos_work_item(NTOS_WORK_FUNC func, void *arg1, void *arg2);
+void wrap_init_timer(struct nt_timer *nt_timer, enum timer_type type,
+		     struct ndis_mp_block *nmb);
+BOOLEAN wrap_set_timer(struct nt_timer *nt_timer, unsigned long expires_hz,
+		       unsigned long repeat_hz, struct kdpc *kdpc);
+
+LONG InterlockedDecrement(LONG volatile *val) wfastcall;
+LONG InterlockedIncrement(LONG volatile *val) wfastcall;
+struct nt_list *ExInterlockedInsertHeadList
+	(struct nt_list *head, struct nt_list *entry,
+	 NT_SPIN_LOCK *lock) wfastcall;
+struct nt_list *ExInterlockedInsertTailList
+	(struct nt_list *head, struct nt_list *entry,
+	 NT_SPIN_LOCK *lock) wfastcall;
+struct nt_list *ExInterlockedRemoveHeadList
+	(struct nt_list *head, NT_SPIN_LOCK *lock) wfastcall;
+NTSTATUS IofCallDriver(struct device_object *dev_obj, struct irp *irp) wfastcall;
+KIRQL KfRaiseIrql(KIRQL newirql) wfastcall;
+void KfLowerIrql(KIRQL oldirql) wfastcall;
+KIRQL KfAcquireSpinLock(NT_SPIN_LOCK *lock) wfastcall;
+void KfReleaseSpinLock(NT_SPIN_LOCK *lock, KIRQL oldirql) wfastcall;
+void IofCompleteRequest(struct irp *irp, CHAR prio_boost) wfastcall;
+void KefReleaseSpinLockFromDpcLevel(NT_SPIN_LOCK *lock) wfastcall;
+
+LONG ObfReferenceObject(void *object) wfastcall;
+void ObfDereferenceObject(void *object) wfastcall;
+
+#define ObReferenceObject(object) ObfReferenceObject(object)
+#define ObDereferenceObject(object) ObfDereferenceObject(object)
+
+void WRITE_PORT_UCHAR(ULONG_PTR port, UCHAR value) wstdcall;
+UCHAR READ_PORT_UCHAR(ULONG_PTR port) wstdcall;
+
+#undef ExAllocatePoolWithTag
+void *ExAllocatePoolWithTag(enum pool_type pool_type, SIZE_T size,
+			    ULONG tag) wstdcall;
+#if defined(ALLOC_DEBUG) && ALLOC_DEBUG > 1
+#define ExAllocatePoolWithTag(pool_type, size, tag)			\
+	wrap_ExAllocatePoolWithTag(pool_type, size, tag, __FILE__, __LINE__)
+#endif
+
+void ExFreePool(void *p) wstdcall;
+ULONG MmSizeOfMdl(void *base, ULONG length) wstdcall;
+void __iomem *MmMapIoSpace(PHYSICAL_ADDRESS phys_addr, SIZE_T size,
+		   enum memory_caching_type cache) wstdcall;
+void MmUnmapIoSpace(void __iomem *addr, SIZE_T size) wstdcall;
+void MmProbeAndLockPages(struct mdl *mdl, KPROCESSOR_MODE access_mode,
+			 enum lock_operation operation) wstdcall;
+void MmUnlockPages(struct mdl *mdl) wstdcall;
+void KeInitializeEvent(struct nt_event *nt_event,
+		       enum event_type type, BOOLEAN state) wstdcall;
+LONG KeSetEvent(struct nt_event *nt_event, KPRIORITY incr,
+		BOOLEAN wait) wstdcall;
+LONG KeResetEvent(struct nt_event *nt_event) wstdcall;
+void KeClearEvent(struct nt_event *nt_event) wstdcall;
+void KeInitializeDpc(struct kdpc *kdpc, void *func, void *ctx) wstdcall;
+BOOLEAN queue_kdpc(struct kdpc *kdpc);
+BOOLEAN dequeue_kdpc(struct kdpc *kdpc);
+
+void KeFlushQueuedDpcs(void) wstdcall;
+NTSTATUS IoConnectInterrupt(struct kinterrupt **kinterrupt,
+			    PKSERVICE_ROUTINE service_routine,
+			    void *service_context, NT_SPIN_LOCK *lock,
+			    ULONG vector, KIRQL irql, KIRQL synch_irql,
+			    enum kinterrupt_mode interrupt_mode,
+			    BOOLEAN shareable, KAFFINITY processor_enable_mask,
+			    BOOLEAN floating_save) wstdcall;
+void IoDisconnectInterrupt(struct kinterrupt *interrupt) wstdcall;
+BOOLEAN KeSynchronizeExecution(struct kinterrupt *interrupt,
+			       PKSYNCHRONIZE_ROUTINE synch_routine,
+			       void *ctx) wstdcall;
+
+NTSTATUS KeWaitForSingleObject(void *object, KWAIT_REASON reason,
+			       KPROCESSOR_MODE waitmode, BOOLEAN alertable,
+			       LARGE_INTEGER *timeout) wstdcall;
+struct mdl *IoAllocateMdl(void *virt, ULONG length, BOOLEAN second_buf,
+			  BOOLEAN charge_quota, struct irp *irp) wstdcall;
+void MmBuildMdlForNonPagedPool(struct mdl *mdl) wstdcall;
+void IoFreeMdl(struct mdl *mdl) wstdcall;
+NTSTATUS IoCreateDevice(struct driver_object *driver, ULONG dev_ext_length,
+			struct unicode_string *dev_name, DEVICE_TYPE dev_type,
+			ULONG dev_chars, BOOLEAN exclusive,
+			struct device_object **dev_obj) wstdcall;
+NTSTATUS IoCreateSymbolicLink(struct unicode_string *link,
+			      struct unicode_string *dev_name) wstdcall;
+void IoDeleteDevice(struct device_object *dev) wstdcall;
+void IoDetachDevice(struct device_object *topdev) wstdcall;
+struct device_object *IoGetAttachedDevice(struct device_object *dev) wstdcall;
+struct device_object *IoGetAttachedDeviceReference
+	(struct device_object *dev) wstdcall;
+NTSTATUS IoAllocateDriverObjectExtension
+	(struct driver_object *drv_obj, void *client_id, ULONG extlen,
+	 void **ext) wstdcall;
+void *IoGetDriverObjectExtension(struct driver_object *drv,
+				 void *client_id) wstdcall;
+struct device_object *IoAttachDeviceToDeviceStack
+	(struct device_object *src, struct device_object *dst) wstdcall;
+void KeInitializeEvent(struct nt_event *nt_event, enum event_type type,
+		       BOOLEAN state) wstdcall;
+struct irp *IoAllocateIrp(char stack_count, BOOLEAN charge_quota) wstdcall;
+void IoFreeIrp(struct irp *irp) wstdcall;
+BOOLEAN IoCancelIrp(struct irp *irp) wstdcall;
+struct irp *IoBuildSynchronousFsdRequest
+	(ULONG major_func, struct device_object *dev_obj, void *buf,
+	 ULONG length, LARGE_INTEGER *offset, struct nt_event *event,
+	 struct io_status_block *status) wstdcall;
+struct irp *IoBuildAsynchronousFsdRequest
+	(ULONG major_func, struct device_object *dev_obj, void *buf,
+	 ULONG length, LARGE_INTEGER *offset,
+	 struct io_status_block *status) wstdcall;
+NTSTATUS PoCallDriver(struct device_object *dev_obj, struct irp *irp) wstdcall;
+
+NTSTATUS IoPassIrpDown(struct device_object *dev_obj, struct irp *irp) wstdcall;
+WIN_FUNC_DECL(IoPassIrpDown,2);
+NTSTATUS IoSyncForwardIrp(struct device_object *dev_obj,
+			  struct irp *irp) wstdcall;
+NTSTATUS IoAsyncForwardIrp(struct device_object *dev_obj,
+			   struct irp *irp) wstdcall;
+NTSTATUS IoInvalidDeviceRequest(struct device_object *dev_obj,
+				struct irp *irp) wstdcall;
+
+KIRQL KeGetCurrentIrql(void) wstdcall;
+void KeInitializeSpinLock(NT_SPIN_LOCK *lock) wstdcall;
+void KeAcquireSpinLock(NT_SPIN_LOCK *lock, KIRQL *irql) wstdcall;
+void KeReleaseSpinLock(NT_SPIN_LOCK *lock, KIRQL oldirql) wstdcall;
+KIRQL KeAcquireSpinLockRaiseToDpc(NT_SPIN_LOCK *lock) wstdcall;
+
+void IoAcquireCancelSpinLock(KIRQL *irql) wstdcall;
+void IoReleaseCancelSpinLock(KIRQL irql) wstdcall;
+
+void RtlCopyMemory(void *dst, const void *src, SIZE_T length) wstdcall;
+NTSTATUS RtlUnicodeStringToAnsiString
+	(struct ansi_string *dst, const struct unicode_string *src,
+	 BOOLEAN dup) wstdcall;
+NTSTATUS RtlAnsiStringToUnicodeString
+	(struct unicode_string *dst, const struct ansi_string *src,
+	 BOOLEAN dup) wstdcall;
+void RtlInitAnsiString(struct ansi_string *dst, const char *src) wstdcall;
+void RtlInitString(struct ansi_string *dst, const char *src) wstdcall;
+void RtlInitUnicodeString(struct unicode_string *dest,
+			  const wchar_t *src) wstdcall;
+void RtlFreeUnicodeString(struct unicode_string *string) wstdcall;
+void RtlFreeAnsiString(struct ansi_string *string) wstdcall;
+LONG RtlCompareUnicodeString(const struct unicode_string *s1,
+			     const struct unicode_string *s2,
+			     BOOLEAN case_insensitive) wstdcall;
+void RtlCopyUnicodeString(struct unicode_string *dst,
+			  struct unicode_string *src) wstdcall;
+NTSTATUS RtlUpcaseUnicodeString(struct unicode_string *dst,
+				struct unicode_string *src,
+				BOOLEAN alloc) wstdcall;
+void KeInitializeTimer(struct nt_timer *nt_timer) wstdcall;
+void KeInitializeTimerEx(struct nt_timer *nt_timer,
+			 enum timer_type type) wstdcall;
+BOOLEAN KeSetTimerEx(struct nt_timer *nt_timer, LARGE_INTEGER duetime_ticks,
+		     LONG period_ms, struct kdpc *kdpc) wstdcall;
+BOOLEAN KeSetTimer(struct nt_timer *nt_timer, LARGE_INTEGER duetime_ticks,
+		   struct kdpc *kdpc) wstdcall;
+BOOLEAN KeCancelTimer(struct nt_timer *nt_timer) wstdcall;
+void KeInitializeDpc(struct kdpc *kdpc, void *func, void *ctx) wstdcall;
+struct nt_thread *KeGetCurrentThread(void) wstdcall;
+NTSTATUS ObReferenceObjectByHandle(void *handle, ACCESS_MASK desired_access,
+				   void *obj_type, KPROCESSOR_MODE access_mode,
+				   void **object, void *handle_info) wstdcall;
+
+void adjust_user_shared_data_addr(char *driver, unsigned long length);
+
+extern spinlock_t ntoskernel_lock;
+extern spinlock_t irp_cancel_lock;
+extern struct nt_list object_list;
+#ifdef CONFIG_X86_64
+extern struct kuser_shared_data kuser_shared_data;
+#endif
+
+#define IoCompleteRequest(irp, prio) IofCompleteRequest(irp, prio)
+#define IoCallDriver(dev, irp) IofCallDriver(dev, irp)
+
+#if defined(IO_DEBUG)
+#define DUMP_IRP(_irp)							\
+do {									\
+	struct io_stack_location *_irp_sl;				\
+	_irp_sl = IoGetCurrentIrpStackLocation(_irp);			\
+	IOTRACE("irp: %p, stack size: %d, cl: %d, sl: %p, dev_obj: %p, " \
+		"mj_fn: %d, minor_fn: %d, nt_urb: %p, event: %p",	\
+		_irp, _irp->stack_count, (_irp)->current_location,	\
+		_irp_sl, _irp_sl->dev_obj, _irp_sl->major_fn,		\
+		_irp_sl->minor_fn, IRP_URB(_irp),			\
+		(_irp)->user_event);					\
+} while (0)
+#else
+#define DUMP_IRP(_irp) do { } while (0)
+#endif
+
+#endif // _NTOSKERNEL_H_
--- linux-mvl-dove-2.6.32.orig/ubuntu/ndiswrapper/Makefile
+++ linux-mvl-dove-2.6.32/ubuntu/ndiswrapper/Makefile
@@ -0,0 +1,38 @@
+ndiswrapper-objs := crt.o hal.o iw_ndis.o loader.o ndis.o ntoskernel.o ntoskernel_io.o \
+	pe_linker.o pnp.o proc.o rtl.o wrapmem.o wrapndis.o wrapper.o usb.o
+
+EXPORTS = crt_exports.h hal_exports.h ndis_exports.h ntoskernel_exports.h \
+	ntoskernel_io_exports.h rtl_exports.h usb_exports.h
+
+STUB_SRCS = crt.c hal.c ndis.c ntoskernel.c ntoskernel_io.c \
+	pnp.c rtl.c wrapndis.c usb.c
+
+
+EXTRA_CFLAGS += -DENABLE_USB -I$(obj)
+EXTRA_AFLAGS += -I$(obj)
+
+# generate exports symbol table from C files
+quiet_cmd_mkexport = MKEXPORT $@
+cmd_mkexport = $(SHELL) $(srctree)/$(src)/mkexport.sh $< $@
+
+%_exports.h: %.c $(srctree)/$(src)/mkexport.sh FORCE
+	$(call if_changed,mkexport)
+
+$(addprefix $(obj)/,$(EXPORTS:_exports.h=.o)): %.o: %_exports.h
+extra-y += $(EXPORTS)
+
+ifeq ($(CONFIG_X86_64),y)
+quiet_cmd_mkstubs = MKSTUBS $@
+cmd_mkstubs = $(SHELL) $(srctree)/$(src)/mkstubs.sh $(addprefix $(srctree)/$(src)/,$(STUB_SRCS)) >$@
+
+$(obj)/win2lin_stubs.h: $(addprefix $(srctree)/$(src)/,$(STUB_SRCS)) FORCE
+	$(call if_changed,mkstubs)
+
+$(obj)/win2lin_stubs.o: $(obj)/win2lin_stubs.h
+extra-y += win2lin_stubs.h
+ndiswrapper-objs += win2lin_stubs.o
+else
+ndiswrapper-objs += divdi3.o
+endif
+
+obj-$(CONFIG_NDISWRAPPER) := ndiswrapper.o
--- linux-mvl-dove-2.6.32.orig/ubuntu/ndiswrapper/pnp.c
+++ linux-mvl-dove-2.6.32/ubuntu/ndiswrapper/pnp.c
@@ -0,0 +1,742 @@
+/*
+ *  Copyright (C) 2005 Giridhar Pemmasani
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *  GNU General Public License for more details.
+ *
+ */
+
+#include "usb.h"
+#include "pnp.h"
+#include "wrapndis.h"
+#include "loader.h"
+
+/* Functions callable from the NDIS driver */
+wstdcall NTSTATUS pdoDispatchDeviceControl(struct device_object *pdo,
+					   struct irp *irp);
+wstdcall NTSTATUS pdoDispatchPnp(struct device_object *pdo, struct irp *irp);
+wstdcall NTSTATUS pdoDispatchPower(struct device_object *pdo, struct irp *irp);
+
+static NTSTATUS start_pdo(struct device_object *pdo)
+{
+	int i, ret, count, resources_size;
+	struct wrap_device *wd;
+	struct pci_dev *pdev;
+	struct cm_partial_resource_descriptor *entry;
+	struct cm_partial_resource_list *partial_resource_list;
+
+	ENTER1("%p, %p", pdo, pdo->reserved);
+	wd = pdo->reserved;
+	if (ntoskernel_init_device(wd))
+		EXIT1(return STATUS_FAILURE);
+	if (wrap_is_usb_bus(wd->dev_bus)) {
+#ifdef ENABLE_USB
+		if (usb_init_device(wd)) {
+			ntoskernel_exit_device(wd);
+			EXIT1(return STATUS_FAILURE);
+		}
+#endif
+		EXIT1(return STATUS_SUCCESS);
+	}
+	if (!wrap_is_pci_bus(wd->dev_bus))
+		EXIT1(return STATUS_SUCCESS);
+	pdev = wd->pci.pdev;
+	ret = pci_enable_device(pdev);
+	if (ret) {
+		ERROR("couldn't enable PCI device: %x", ret);
+		return STATUS_FAILURE;
+	}
+	ret = pci_request_regions(pdev, DRIVER_NAME);
+	if (ret) {
+		ERROR("couldn't request PCI regions: %x", ret);
+		goto err_enable;
+	}
+	pci_set_power_state(pdev, PCI_D0);
+#ifdef CONFIG_X86_64
+	/* 64-bit broadcom driver doesn't work if DMA is allocated
+	 * from over 1GB */
+	if (wd->vendor == 0x14e4) {
+		if (pci_set_dma_mask(pdev, DMA_BIT_MASK(30)) ||
+		    pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(30)))
+			WARNING("couldn't set DMA mask; this driver "
+				"may not work with more than 1GB RAM");
+	}
+#endif
+	/* IRQ resource entry is filled in from pdev, instead of
+	 * pci_resource macros */
+	for (i = count = 0; pci_resource_start(pdev, i); i++)
+		if ((pci_resource_flags(pdev, i) & IORESOURCE_MEM) ||
+		    (pci_resource_flags(pdev, i) & IORESOURCE_IO))
+			count++;
+	/* space for entry for IRQ is already in
+	 * cm_partial_resource_list */
+	resources_size = sizeof(struct cm_resource_list) +
+		sizeof(struct cm_partial_resource_descriptor) * count;
+	TRACE2("resources: %d, %d", count, resources_size);
+	wd->resource_list = kzalloc(resources_size, GFP_KERNEL);
+	if (!wd->resource_list) {
+		WARNING("couldn't allocate memory");
+		goto err_regions;
+	}
+	wd->resource_list->count = 1;
+	wd->resource_list->list[0].interface_type = PCIBus;
+	/* bus_number is not used by WDM drivers */
+	wd->resource_list->list[0].bus_number = pdev->bus->number;
+
+	partial_resource_list =
+		&wd->resource_list->list->partial_resource_list;
+	partial_resource_list->version = 1;
+	partial_resource_list->revision = 1;
+	partial_resource_list->count = count + 1;
+
+	for (i = count = 0; pci_resource_start(pdev, i); i++) {
+		entry = &partial_resource_list->partial_descriptors[count];
+		TRACE2("%d", count);
+		if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
+			entry->type = CmResourceTypeMemory;
+			entry->flags = CM_RESOURCE_MEMORY_READ_WRITE;
+			entry->share = CmResourceShareDeviceExclusive;
+		} else if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
+			entry->type = CmResourceTypePort;
+			entry->flags = CM_RESOURCE_PORT_IO;
+			entry->share = CmResourceShareDeviceExclusive;
+#if 0
+		} else if (pci_resource_flags(pdev, i) & IORESOURCE_DMA) {
+			/* it looks like no driver uses this resource */
+			typeof(pci_resource_flags(pdev, 0)) flags;
+			entry->type = CmResourceTypeDma;
+			flags = pci_resource_flags(pdev, i);
+			if (flags & IORESOURCE_DMA_TYPEA)
+				entry->flags |= CM_RESOURCE_DMA_TYPE_A;
+			else if (flags & IORESOURCE_DMA_TYPEB)
+				entry->flags |= CM_RESOURCE_DMA_TYPE_B;
+			else if (flags & IORESOURCE_DMA_TYPEF)
+				entry->flags |= CM_RESOURCE_DMA_TYPE_F;
+			if (flags & IORESOURCE_DMA_8BIT)
+				entry->flags |= CM_RESOURCE_DMA_8;
+			else if (flags & IORESOURCE_DMA_16BIT)
+				entry->flags |= CM_RESOURCE_DMA_16;
+			/* what about 32bit DMA? */
+			else if (flags & IORESOURCE_DMA_8AND16BIT)
+				entry->flags |= CM_RESOURCE_DMA_8_AND_16;
+			if (flags & IORESOURCE_DMA_MASTER)
+				entry->flags |= CM_RESOURCE_DMA_BUS_MASTER;
+			entry->u.dma.channel = pci_resource_start(pdev, i);
+			/* what should this be? */
+			entry->u.dma.port = 1;
+#endif
+		} else
+			continue;
+		/* TODO: Add other resource types? */
+		entry->u.generic.start =
+			(ULONG_PTR)pci_resource_start(pdev, i);
+		entry->u.generic.length = pci_resource_len(pdev, i);
+		count++;
+	}
+
+	/* put IRQ resource at the end */
+	entry = &partial_resource_list->partial_descriptors[count++];
+	entry->type = CmResourceTypeInterrupt;
+	entry->flags = CM_RESOURCE_INTERRUPT_LEVEL_SENSITIVE;
+	/* we assume all devices use shared IRQ */
+	entry->share = CmResourceShareShared;
+	/* as per documentation, interrupt level should be DIRQL, but
+	 * examples from DDK as well some drivers, such as AR5211,
+	 * RT8180L use interrupt level as interrupt vector also in
+	 * NdisMRegisterInterrupt */
+	entry->u.interrupt.level = pdev->irq;
+	entry->u.interrupt.vector = pdev->irq;
+	entry->u.interrupt.affinity = -1;
+
+	TRACE2("resource list count %d, irq: %d",
+	       partial_resource_list->count, pdev->irq);
+	pci_set_drvdata(pdev, wd);
+	EXIT1(return STATUS_SUCCESS);
+err_regions:
+	pci_release_regions(pdev);
+err_enable:
+	pci_disable_device(pdev);
+	wd->pci.pdev = NULL;
+	wd->pdo = NULL;
+	EXIT1(return STATUS_FAILURE);
+}
+
+static void remove_pdo(struct device_object *pdo)
+{
+	struct wrap_device *wd = pdo->reserved;
+
+	ntoskernel_exit_device(wd);
+	if (wrap_is_pci_bus(wd->dev_bus)) {
+		struct pci_dev *pdev = wd->pci.pdev;
+		pci_release_regions(pdev);
+		pci_disable_device(pdev);
+		wd->pci.pdev = NULL;
+		pci_set_drvdata(pdev, NULL);
+	} else if (wrap_is_usb_bus(wd->dev_bus)) {
+#ifdef ENABLE_USB
+		usb_exit_device(wd);
+#endif
+	}
+	if (wd->resource_list)
+		kfree(wd->resource_list);
+	wd->resource_list = NULL;
+	return;
+}
+
+static NTSTATUS IoSendIrpTopDev(struct device_object *dev_obj, ULONG major_fn,
+				ULONG minor_fn, struct io_stack_location *sl)
+{
+	NTSTATUS status;
+	struct nt_event event;
+	struct irp *irp;
+	struct io_stack_location *irp_sl;
+	struct device_object *top_dev = IoGetAttachedDeviceReference(dev_obj);
+
+	KeInitializeEvent(&event, NotificationEvent, FALSE);
+	irp = IoBuildSynchronousFsdRequest(IRP_MJ_PNP, top_dev, NULL, 0, NULL,
+					   &event, NULL);
+	irp->io_status.status = STATUS_NOT_IMPLEMENTED;
+	irp->io_status.info = 0;
+	irp_sl = IoGetNextIrpStackLocation(irp);
+	if (sl)
+		memcpy(irp_sl, sl, sizeof(*irp_sl));
+	irp_sl->major_fn = major_fn;
+	irp_sl->minor_fn = minor_fn;
+	status = IoCallDriver(top_dev, irp);
+	if (status == STATUS_PENDING) {
+		KeWaitForSingleObject(&event, Executive, KernelMode,
+				      FALSE, NULL);
+		status = irp->io_status.status;
+	}
+	ObDereferenceObject(top_dev);
+	return status;
+}
+
+wstdcall NTSTATUS pdoDispatchDeviceControl(struct device_object *pdo,
+					   struct  irp *irp)
+{
+	struct io_stack_location *irp_sl;
+	NTSTATUS status;
+
+	DUMP_IRP(irp);
+	irp_sl = IoGetCurrentIrpStackLocation(irp);
+#ifdef ENABLE_USB
+	status = wrap_submit_irp(pdo, irp);
+	IOTRACE("status: %08X", status);
+	if (status != STATUS_PENDING)
+		IoCompleteRequest(irp, IO_NO_INCREMENT);
+#else
+	status = irp->io_status.status = STATUS_NOT_IMPLEMENTED;
+	IoCompleteRequest(irp, IO_NO_INCREMENT);
+#endif
+	IOEXIT(return status);
+}
+WIN_FUNC_DECL(pdoDispatchDeviceControl,2)
+
+wstdcall NTSTATUS pdoDispatchPnp(struct device_object *pdo, struct irp *irp)
+{
+	struct io_stack_location *irp_sl;
+	struct wrap_device *wd;
+	NTSTATUS status;
+#ifdef ENABLE_USB
+	struct usbd_bus_interface_usbdi *usb_intf;
+#endif
+
+	irp_sl = IoGetCurrentIrpStackLocation(irp);
+	TRACE2("%p %d:%d", pdo, irp_sl->major_fn, irp_sl->minor_fn);
+	wd = pdo->reserved;
+	switch (irp_sl->minor_fn) {
+	case IRP_MN_START_DEVICE:
+		status = start_pdo(pdo);
+		break;
+	case IRP_MN_QUERY_STOP_DEVICE:
+	case IRP_MN_STOP_DEVICE:
+	case IRP_MN_QUERY_REMOVE_DEVICE:
+		status = STATUS_SUCCESS;
+		break;
+	case IRP_MN_REMOVE_DEVICE:
+		remove_pdo(pdo);
+		status = STATUS_SUCCESS;
+		break;
+	case IRP_MN_QUERY_INTERFACE:
+#ifdef ENABLE_USB
+		if (!wrap_is_usb_bus(wd->dev_bus)) {
+			status = STATUS_NOT_IMPLEMENTED;
+			break;
+		}
+		TRACE2("type: %x, size: %d, version: %d",
+		       irp_sl->params.query_intf.type->data1,
+		       irp_sl->params.query_intf.size,
+		       irp_sl->params.query_intf.version);
+		usb_intf = (struct usbd_bus_interface_usbdi *)
+			irp_sl->params.query_intf.intf;
+		usb_intf->Context = wd;
+		usb_intf->InterfaceReference = USBD_InterfaceReference;
+		usb_intf->InterfaceDereference = USBD_InterfaceDereference;
+		usb_intf->GetUSBDIVersion = USBD_InterfaceGetUSBDIVersion;
+		usb_intf->QueryBusTime = USBD_InterfaceQueryBusTime;
+		usb_intf->SubmitIsoOutUrb = USBD_InterfaceSubmitIsoOutUrb;
+		usb_intf->QueryBusInformation =
+			USBD_InterfaceQueryBusInformation;
+		if (irp_sl->params.query_intf.version >=
+		    USB_BUSIF_USBDI_VERSION_1)
+			usb_intf->IsDeviceHighSpeed =
+				USBD_InterfaceIsDeviceHighSpeed;
+		if (irp_sl->params.query_intf.version >=
+		    USB_BUSIF_USBDI_VERSION_2)
+			usb_intf->LogEntry = USBD_InterfaceLogEntry;
+		status = STATUS_SUCCESS;
+#else
+		status = STATUS_NOT_IMPLEMENTED;
+#endif
+		break;
+	default:
+		TRACE2("fn %d not implemented", irp_sl->minor_fn);
+		status = STATUS_SUCCESS;
+		break;
+	}
+	irp->io_status.status = status;
+	TRACE2("status: %08X", status);
+	IoCompleteRequest(irp, IO_NO_INCREMENT);
+	IOEXIT(return status);
+}
+WIN_FUNC_DECL(pdoDispatchPnp,2)
+
+wstdcall NTSTATUS pdoDispatchPower(struct device_object *pdo, struct irp *irp)
+{
+	struct io_stack_location *irp_sl;
+	struct wrap_device *wd;
+	union power_state power_state;
+	struct pci_dev *pdev;
+	NTSTATUS status;
+
+	irp_sl = IoGetCurrentIrpStackLocation(irp);
+	wd = pdo->reserved;
+	TRACE2("pdo: %p, fn: %d:%d, wd: %p",
+	       pdo, irp_sl->major_fn, irp_sl->minor_fn, wd);
+	switch (irp_sl->minor_fn) {
+	case IRP_MN_WAIT_WAKE:
+		/* TODO: this is not complete/correct */
+		TRACE2("state: %d, completion: %p",
+			  irp_sl->params.power.state.system_state,
+			  irp_sl->completion_routine);
+		IoMarkIrpPending(irp);
+		status = STATUS_PENDING;
+		break;
+	case IRP_MN_SET_POWER:
+		power_state = irp_sl->params.power.state;
+		if (power_state.device_state == PowerDeviceD0) {
+			TRACE2("resuming %p", wd);
+			if (wrap_is_pci_bus(wd->dev_bus)) {
+				pdev = wd->pci.pdev;
+				pci_restore_state(pdev);
+				if (wd->pci.wake_state == PowerDeviceD3) {
+					pci_enable_wake(wd->pci.pdev,
+							PCI_D3hot, 0);
+					pci_enable_wake(wd->pci.pdev,
+							PCI_D3cold, 0);
+				}
+				pci_set_power_state(pdev, PCI_D0);
+			} else { // usb device
+#ifdef ENABLE_USB
+				wrap_resume_urbs(wd);
+#endif
+			}
+		} else {
+			TRACE2("suspending device %p", wd);
+			if (wrap_is_pci_bus(wd->dev_bus)) {
+				pdev = wd->pci.pdev;
+				pci_save_state(pdev);
+				TRACE2("%d", wd->pci.wake_state);
+				if (wd->pci.wake_state == PowerDeviceD3) {
+					pci_enable_wake(wd->pci.pdev,
+							PCI_D3hot, 1);
+					pci_enable_wake(wd->pci.pdev,
+							PCI_D3cold, 1);
+				}
+				pci_set_power_state(pdev, PCI_D3hot);
+			} else { // usb device
+#ifdef ENABLE_USB
+				wrap_suspend_urbs(wd);
+#endif
+			}
+		}
+		status = STATUS_SUCCESS;
+		break;
+	case IRP_MN_QUERY_POWER:
+		status = STATUS_SUCCESS;
+		break;
+	default:
+		TRACE2("fn %d not implemented", irp_sl->minor_fn);
+		status = STATUS_SUCCESS;
+		break;
+	}
+	irp->io_status.status = status;
+	IoCompleteRequest(irp, IO_NO_INCREMENT);
+	return status;
+}
+WIN_FUNC_DECL(pdoDispatchPower,2)
+
+static NTSTATUS pnp_set_device_power_state(struct wrap_device *wd,
+					   enum device_power_state state)
+{
+	NTSTATUS status;
+	struct device_object *pdo;
+	struct io_stack_location irp_sl;
+
+	pdo = wd->pdo;
+	IOTRACE("%p, %p", pdo, IoGetAttachedDevice(pdo));
+	memset(&irp_sl, 0, sizeof(irp_sl));
+	irp_sl.params.power.state.device_state = state;
+	irp_sl.params.power.type = DevicePowerState;
+	if (state > PowerDeviceD0) {
+		status = IoSendIrpTopDev(pdo, IRP_MJ_POWER, IRP_MN_QUERY_POWER,
+					 &irp_sl);
+		if (status != STATUS_SUCCESS) {
+			TRACE1("query of power to %d returns %08X",
+			       state, status);
+			EXIT1(return status);
+		}
+	}
+	status = IoSendIrpTopDev(pdo, IRP_MJ_POWER, IRP_MN_SET_POWER, &irp_sl);
+	if (status != STATUS_SUCCESS)
+		WARNING("setting power to %d failed: %08X", state, status);
+	EXIT1(return status);
+}
+
+NTSTATUS pnp_start_device(struct wrap_device *wd)
+{
+	struct device_object *fdo;
+	struct device_object *pdo;
+	struct io_stack_location irp_sl;
+	NTSTATUS status;
+
+	pdo = wd->pdo;
+	/* TODO: for now we use same resources for both translated
+	 * resources and raw resources */
+	memset(&irp_sl, 0, sizeof(irp_sl));
+	irp_sl.params.start_device.allocated_resources =
+		wd->resource_list;
+	irp_sl.params.start_device.allocated_resources_translated =
+		wd->resource_list;
+	status = IoSendIrpTopDev(pdo, IRP_MJ_PNP, IRP_MN_START_DEVICE, &irp_sl);
+	fdo = IoGetAttachedDevice(pdo);
+	if (status == STATUS_SUCCESS)
+		fdo->drv_obj->drv_ext->count++;
+	else
+		WARNING("Windows driver couldn't initialize the device (%08X)",
+			status);
+	EXIT1(return status);
+}
+
+NTSTATUS pnp_stop_device(struct wrap_device *wd)
+{
+	struct device_object *pdo;
+	NTSTATUS status;
+
+	pdo = wd->pdo;
+	status = IoSendIrpTopDev(pdo, IRP_MJ_PNP, IRP_MN_QUERY_STOP_DEVICE,
+				 NULL);
+	if (status != STATUS_SUCCESS)
+		WARNING("status: %08X", status);
+	/* for now we ignore query status */
+	status = IoSendIrpTopDev(pdo, IRP_MJ_PNP, IRP_MN_STOP_DEVICE, NULL);
+	if (status != STATUS_SUCCESS)
+		WARNING("status: %08X", status);
+	if (status != STATUS_SUCCESS)
+		WARNING("status: %08X", status);
+	EXIT2(return status);
+}
+
+NTSTATUS pnp_remove_device(struct wrap_device *wd)
+{
+	struct device_object *pdo, *fdo;
+	struct driver_object *fdo_drv_obj;
+	NTSTATUS status;
+
+	pdo = wd->pdo;
+	fdo = IoGetAttachedDevice(pdo);
+	fdo_drv_obj = fdo->drv_obj;
+	TRACE2("%p, %p, %p", pdo, fdo, fdo_drv_obj);
+	status = IoSendIrpTopDev(pdo, IRP_MJ_PNP, IRP_MN_QUERY_REMOVE_DEVICE,
+				 NULL);
+	if (status != STATUS_SUCCESS)
+		WARNING("status: %08X", status);
+
+	status = IoSendIrpTopDev(pdo, IRP_MJ_PNP, IRP_MN_REMOVE_DEVICE, NULL);
+	if (status != STATUS_SUCCESS)
+		WARNING("status: %08X", status);
+	/* TODO: should we use count in drv_ext or driver's Object
+	 * header reference count to keep count of devices associated
+	 * with a driver? */
+	if (status == STATUS_SUCCESS)
+		fdo_drv_obj->drv_ext->count--;
+	TRACE1("count: %d", fdo_drv_obj->drv_ext->count);
+	if (fdo_drv_obj->drv_ext->count < 0)
+		WARNING("wrong count: %d", fdo_drv_obj->drv_ext->count);
+	if (fdo_drv_obj->drv_ext->count == 0) {
+		struct wrap_driver *wrap_driver;
+		TRACE1("unloading driver: %p", fdo_drv_obj);
+		wrap_driver =
+			IoGetDriverObjectExtension(fdo_drv_obj,
+					   (void *)WRAP_DRIVER_CLIENT_ID);
+		if (fdo_drv_obj->unload)
+			LIN2WIN1(fdo_drv_obj->unload, fdo_drv_obj);
+		if (wrap_driver) {
+			if (down_interruptible(&loader_mutex))
+				WARNING("couldn't obtain loader_mutex");
+			unload_wrap_driver(wrap_driver);
+			up(&loader_mutex);
+		} else
+			ERROR("couldn't get wrap_driver");
+		ObDereferenceObject(fdo_drv_obj);
+	}
+	IoDeleteDevice(pdo);
+	unload_wrap_device(wd);
+	EXIT1(return status);
+}
+
+WIN_FUNC_DECL(IoInvalidDeviceRequest,2)
+
+static struct device_object *alloc_pdo(struct driver_object *drv_obj)
+{
+	struct device_object *pdo;
+	NTSTATUS status ;
+	int i;
+	struct ansi_string ansi_name;
+	struct unicode_string unicode_name;
+
+	RtlInitAnsiString(&ansi_name, "NDISpdo");
+	if (RtlAnsiStringToUnicodeString(&unicode_name, &ansi_name, TRUE) ==
+	    STATUS_SUCCESS) {
+		status = IoCreateDevice(drv_obj, 0, &unicode_name,
+					FILE_DEVICE_UNKNOWN,
+					FILE_AUTOGENERATED_DEVICE_NAME,
+					FALSE, &pdo);
+		RtlFreeUnicodeString(&unicode_name);
+	} else {
+		status = IoCreateDevice(drv_obj, 0, NULL,
+					FILE_DEVICE_UNKNOWN,
+					FILE_AUTOGENERATED_DEVICE_NAME,
+					FALSE, &pdo);
+	}
+	TRACE1("%p, %d, %p", drv_obj, status, pdo);
+	if (status != STATUS_SUCCESS)
+		return NULL;
+	/* dispatch routines are called as Windows functions */
+	for (i = 0; i <= IRP_MJ_MAXIMUM_FUNCTION; i++)
+		drv_obj->major_func[i] = WIN_FUNC_PTR(IoInvalidDeviceRequest,2);
+	drv_obj->major_func[IRP_MJ_INTERNAL_DEVICE_CONTROL] =
+		WIN_FUNC_PTR(pdoDispatchDeviceControl,2);
+	drv_obj->major_func[IRP_MJ_DEVICE_CONTROL] =
+		WIN_FUNC_PTR(pdoDispatchDeviceControl,2);
+	drv_obj->major_func[IRP_MJ_POWER] = WIN_FUNC_PTR(pdoDispatchPower,2);
+	drv_obj->major_func[IRP_MJ_PNP] = WIN_FUNC_PTR(pdoDispatchPnp,2);
+	return pdo;
+}
+
+static int wrap_pnp_start_device(struct wrap_device *wd)
+{
+	struct wrap_driver *driver;
+	struct device_object *pdo;
+	struct driver_object *pdo_drv_obj;
+
+	ENTER1("wd: %p", wd);
+
+	if (!((wrap_is_pci_bus(wd->dev_bus)) ||
+	      (wrap_is_usb_bus(wd->dev_bus)))) {
+		ERROR("bus type %d (%d) not supported",
+		      WRAP_BUS(wd->dev_bus), wd->dev_bus);
+		EXIT1(return -EINVAL);
+	}
+	driver = load_wrap_driver(wd);
+	if (!driver)
+		return -ENODEV;
+
+	wd->driver = driver;
+	wd->dev_bus = WRAP_DEVICE_BUS(driver->dev_type, WRAP_BUS(wd->dev_bus));
+	TRACE1("dev type: %d, bus type: %d, %d", WRAP_DEVICE(wd->dev_bus),
+	       WRAP_BUS(wd->dev_bus), wd->dev_bus);
+	TRACE1("%d, %d", driver->dev_type, wrap_is_usb_bus(wd->dev_bus));
+	/* first create pdo */
+	if (wrap_is_pci_bus(wd->dev_bus))
+		pdo_drv_obj = find_bus_driver("PCI");
+	else // if (wrap_is_usb_bus(wd->dev_bus))
+		pdo_drv_obj = find_bus_driver("USB");
+	if (!pdo_drv_obj)
+		return -EINVAL;
+	pdo = alloc_pdo(pdo_drv_obj);
+	if (!pdo)
+		return -ENOMEM;
+	wd->pdo = pdo;
+	pdo->reserved = wd;
+	if (WRAP_DEVICE(wd->dev_bus) == WRAP_NDIS_DEVICE) {
+		if (init_ndis_driver(driver->drv_obj)) {
+			IoDeleteDevice(pdo);
+			return -EINVAL;
+		}
+	}
+	TRACE1("%p", driver->drv_obj->drv_ext->add_device);
+	if (driver->drv_obj->drv_ext->add_device(driver->drv_obj, pdo) !=
+	    STATUS_SUCCESS) {
+		IoDeleteDevice(pdo);
+		return -ENOMEM;
+	}
+	if (pnp_start_device(wd) != STATUS_SUCCESS) {
+		/* TODO: we need proper cleanup, to deallocate memory,
+		 * for example */
+		pnp_remove_device(wd);
+		return -EINVAL;
+	}
+	return 0;
+}
+
+/*
+ * This function should not be marked __devinit because PCI IDs are
+ * added dynamically.
+ */
+int wrap_pnp_start_pci_device(struct pci_dev *pdev,
+			      const struct pci_device_id *ent)
+{
+	struct load_device load_device;
+	struct wrap_device *wd;
+
+	ENTER1("called for %04x:%04x:%04x:%04x", pdev->vendor, pdev->device,
+	       pdev->subsystem_vendor, pdev->subsystem_device);
+
+	load_device.bus = WRAP_PCI_BUS;
+	load_device.vendor = pdev->vendor;
+	load_device.device = pdev->device;
+	load_device.subvendor = pdev->subsystem_vendor;
+	load_device.subdevice = pdev->subsystem_device;
+	wd = load_wrap_device(&load_device);
+	if (!wd)
+		EXIT1(return -ENODEV);
+	wd->pci.pdev = pdev;
+	return wrap_pnp_start_device(wd);
+}
+
+void wrap_pnp_remove_pci_device(struct pci_dev *pdev)
+{
+	struct wrap_device *wd;
+
+	wd = (struct wrap_device *)pci_get_drvdata(pdev);
+	ENTER1("%p, %p", pdev, wd);
+	if (!wd)
+		EXIT1(return);
+	pnp_remove_device(wd);
+}
+
+int wrap_pnp_suspend_pci_device(struct pci_dev *pdev, pm_message_t state)
+{
+	struct wrap_device *wd;
+
+	wd = (struct wrap_device *)pci_get_drvdata(pdev);
+	return pnp_set_device_power_state(wd, PowerDeviceD3);
+}
+
+int wrap_pnp_resume_pci_device(struct pci_dev *pdev)
+{
+	struct wrap_device *wd;
+
+	wd = (struct wrap_device *)pci_get_drvdata(pdev);
+	return pnp_set_device_power_state(wd, PowerDeviceD0);
+}
+
+#ifdef ENABLE_USB
+int wrap_pnp_start_usb_device(struct usb_interface *intf,
+			      const struct usb_device_id *usb_id)
+{
+	struct wrap_device *wd;
+	int ret;
+	struct usb_device *udev = interface_to_usbdev(intf);
+	ENTER1("%04x, %04x, %04x", udev->descriptor.idVendor,
+	       udev->descriptor.idProduct, udev->descriptor.bDeviceClass);
+
+	/* USB device (e.g., RNDIS) may have multiple interfaces;
+	  initialize one interface only (is there a way to know which
+	  of these interfaces is for network?) */
+
+	if ((wd = get_wrap_device(udev, WRAP_USB_BUS))) {
+		TRACE1("device already initialized: %p", wd);
+		usb_set_intfdata(intf, NULL);
+		ret = 0;
+	} else {
+		struct load_device load_device;
+
+		load_device.bus = WRAP_USB_BUS;
+		load_device.vendor = le16_to_cpu(udev->descriptor.idVendor);
+		load_device.device = le16_to_cpu(udev->descriptor.idProduct);
+		load_device.subvendor = 0;
+		load_device.subdevice = 0;
+		wd = load_wrap_device(&load_device);
+		TRACE2("%p", wd);
+		if (wd) {
+			/* some devices (e.g., TI 4150, RNDIS) need
+			 * full reset */
+			ret = usb_reset_device(udev);
+			if (ret)
+				WARNING("reset failed: %d", ret);
+			usb_set_intfdata(intf, wd);
+			wd->usb.intf = intf;
+			wd->usb.udev = udev;
+			ret = wrap_pnp_start_device(wd);
+		} else
+			ret = -ENODEV;
+	}
+
+	TRACE2("ret: %d", ret);
+	if (ret)
+		EXIT1(return ret);
+	else
+		return 0;
+}
+
+void __devexit wrap_pnp_remove_usb_device(struct usb_interface *intf)
+{
+	struct wrap_device *wd;
+
+	wd = (struct wrap_device *)usb_get_intfdata(intf);
+	TRACE1("%p, %p", intf, wd);
+	if (wd == NULL)
+		EXIT1(return);
+	usb_set_intfdata(intf, NULL);
+	wd->usb.intf = NULL;
+	pnp_remove_device(wd);
+}
+
+int wrap_pnp_suspend_usb_device(struct usb_interface *intf, pm_message_t state)
+{
+	struct wrap_device *wd;
+	struct device_object *pdo;
+
+	wd = usb_get_intfdata(intf);
+	ENTER1("%p, %p", intf, wd);
+	if (!wd)
+		EXIT1(return 0);
+	pdo = wd->pdo;
+	if (pnp_set_device_power_state(wd, PowerDeviceD3))
+		return -1;
+	return 0;
+}
+
+int wrap_pnp_resume_usb_device(struct usb_interface *intf)
+{
+	struct wrap_device *wd;
+	wd = usb_get_intfdata(intf);
+	ENTER1("%p, %p", intf, wd);
+	if (!wd)
+		EXIT1(return 0);
+	if (pnp_set_device_power_state(wd, PowerDeviceD0))
+		return -1;
+	return 0;
+}
+
+#endif // USB
--- linux-mvl-dove-2.6.32.orig/ubuntu/ndiswrapper/rtl.c
+++ linux-mvl-dove-2.6.32/ubuntu/ndiswrapper/rtl.c
@@ -0,0 +1,716 @@
+/*
+ *  Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *  GNU General Public License for more details.
+ *
+ */
+
+#include "ntoskernel.h"
+#include "rtl_exports.h"
+
+wstdcall SIZE_T WIN_FUNC(RtlCompareMemory,3)
+	(const void *a, const void *b, SIZE_T len)
+{
+	size_t i;
+	char *x, *y;
+
+	x = (char *)a;
+	y = (char *)b;
+	/* MSDN says this should return number of bytes that compare as
+	 * equal. This can be interpretted as either all bytes that are
+	 * equal in 'len' bytes or that only until the bytes compare as
+	 * not equal. Initially we had it the former way, but Realtek driver
+	 * doesn't like it that way - it takes many attempts to associate
+	 * with WPA. ReactOS returns the number of bytes that are equal
+	 * upto when they compare as not equal.
+	 * According to lords at #reactos, that is the way it should be
+	 * and that msdn is wrong about it!
+	 */
+	for (i = 0; i < len && x[i] == y[i]; i++)
+		;
+	return i;
+}
+
+wstdcall void WIN_FUNC(RtlCopyMemory,3)
+	(void *dst, const void *src, SIZE_T length)
+{
+	memcpy(dst, src, length);
+}
+
+wstdcall void WIN_FUNC(RtlZeroMemory,2)
+	(void *dst, SIZE_T length)
+{
+	memset(dst, 0, length);
+}
+
+wstdcall void WIN_FUNC(RtlSecureZeroMemory,2)
+	(void *dst, SIZE_T length)
+{
+	memset(dst, 0, length);
+}
+
+wstdcall void WIN_FUNC(RtlFillMemory,3)
+	(void *dest, SIZE_T length, UCHAR fill)
+{
+	memset(dest, fill, length);
+}
+
+wstdcall void WIN_FUNC(RtlMoveMemory,3)
+	(void *dest, const void *src, SIZE_T length)
+{
+	memmove(dest, src, length);
+}
+
+wstdcall LONG WIN_FUNC(RtlCompareString,3)
+	(const struct ansi_string *s1, const struct ansi_string *s2,
+	 BOOLEAN case_insensitive)
+{
+	unsigned int len;
+	LONG ret = 0;
+	const char *p1, *p2;
+
+	ENTER2("");
+	len = min(s1->length, s2->length);
+	p1 = s1->buf;
+	p2 = s2->buf;
+	if (case_insensitive)
+		while (!ret && len--)
+			ret = toupper(*p1++) - toupper(*p2++);
+	else
+		while (!ret && len--)
+			ret = *p1++ - *p2++;
+	if (!ret)
+		ret = s1->length - s2->length;
+	EXIT2(return ret);
+}
+
+wstdcall LONG WIN_FUNC(RtlCompareUnicodeString,3)
+	(const struct unicode_string *s1, const struct unicode_string *s2,
+	 BOOLEAN case_insensitive)
+{
+	unsigned int len;
+	LONG ret = 0;
+	const wchar_t *p1, *p2;
+
+	ENTER2("");
+
+	len = min(s1->length, s2->length) / sizeof(wchar_t);
+	p1 = s1->buf;
+	p2 = s2->buf;
+	if (case_insensitive)
+		while (!ret && len--)
+			ret = toupper((u8)*p1++) - toupper((u8)*p2++);
+	else
+		while (!ret && len--)
+			ret = (u8)*p1++ - (u8)*p2++;
+	if (!ret)
+		ret = s1->length - s2->length;
+	TRACE2("len: %d, ret: %d", len, ret);
+	EXIT2(return ret);
+}
+
+wstdcall BOOLEAN WIN_FUNC(RtlEqualString,3)
+	(const struct ansi_string *s1, const struct ansi_string *s2,
+	 BOOLEAN case_insensitive)
+{
+	ENTER1("");
+	if (s1->length != s2->length)
+		return FALSE;
+	return !RtlCompareString(s1, s2, case_insensitive);
+}
+
+wstdcall BOOLEAN WIN_FUNC(RtlEqualUnicodeString,3)
+	(const struct unicode_string *s1, const struct unicode_string *s2,
+	 BOOLEAN case_insensitive)
+{
+	if (s1->length != s2->length)
+		return FALSE;
+	return !RtlCompareUnicodeString(s1, s2, case_insensitive);
+}
+
+wstdcall void WIN_FUNC(RtlCopyUnicodeString,2)
+	(struct unicode_string *dst, struct unicode_string *src)
+{
+	ENTER1("%p, %p", dst, src);
+	if (src && src->buf && dst->buf) {
+		dst->length = min(src->length, dst->max_length);
+		memcpy(dst->buf, src->buf, dst->length);
+		if (dst->length < dst->max_length)
+			dst->buf[dst->length / sizeof(dst->buf[0])] = 0;
+	} else
+		dst->length = 0;
+	EXIT1(return);
+}
+
+wstdcall void WIN_FUNC(RtlCopyString,2)
+	(struct ansi_string *dst, struct ansi_string *src)
+{
+	ENTER1("%p, %p", dst, src);
+	if (src && src->buf && dst->buf) {
+		dst->length = min(src->length, dst->max_length);
+		memcpy(dst->buf, src->buf, dst->length);
+		if (dst->length < dst->max_length)
+			dst->buf[dst->length] = 0;
+	} else
+		dst->length = 0;
+	EXIT1(return);
+}
+
+wstdcall NTSTATUS WIN_FUNC(RtlAppendUnicodeToString,2)
+	(struct unicode_string *dst, wchar_t *src)
+{
+	if (src) {
+		int len;
+		for (len = 0; src[len]; len++)
+			;
+		if (dst->length + (len * sizeof(dst->buf[0])) > dst->max_length)
+			return STATUS_BUFFER_TOO_SMALL;
+		memcpy(&dst->buf[dst->length], src, len * sizeof(dst->buf[0]));
+		dst->length += len * sizeof(dst->buf[0]);
+		if (dst->max_length > dst->length)
+			dst->buf[dst->length / sizeof(dst->buf[0])] = 0;
+	}
+	return STATUS_SUCCESS;
+}
+
+wstdcall NTSTATUS WIN_FUNC(RtlAppendUnicodeStringToString,2)
+	(struct unicode_string *dst, struct unicode_string *src)
+{
+	if (dst->max_length < src->length + dst->length)
+		return STATUS_BUFFER_TOO_SMALL;
+	if (src->length) {
+		memcpy(&dst->buf[dst->length], src->buf, src->length);
+		dst->length += src->length;
+		if (dst->max_length > dst->length)
+			dst->buf[dst->length / sizeof(dst->buf[0])] = 0;
+	}
+	EXIT2(return STATUS_SUCCESS);
+}
+
+wstdcall ULONG WIN_FUNC(RtlxAnsiStringToUnicodeSize,1)
+	(const struct ansi_string *string)
+{
+	int i;
+
+	for (i = 0; i < string->max_length && string->buf[i]; i++)
+		;
+	return i * sizeof(wchar_t);
+}
+
+wstdcall ULONG WIN_FUNC(RtlxUnicodeStringToAnsiSize,1)
+	(const struct unicode_string *string)
+{
+	int i;
+
+	for (i = 0; i < string->max_length && string->buf[i]; i++)
+		;
+	return i;
+}
+
+wstdcall NTSTATUS WIN_FUNC(RtlAnsiStringToUnicodeString,3)
+	(struct unicode_string *dst, const struct ansi_string *src,
+	 BOOLEAN alloc)
+{
+	int i, n;
+
+	n = RtlxAnsiStringToUnicodeSize(src);
+	TRACE2("%d, %d, %d, %d, %p", n, dst->max_length, src->length,
+	       src->max_length, src->buf);
+	if (alloc == TRUE) {
+#if 0
+		if (n == 0) {
+			dst->length = dst->max_length = 0;
+			dst->buf = NULL;
+			EXIT2(return STATUS_SUCCESS);
+		}
+#endif
+		dst->max_length = n + sizeof(dst->buf[0]);
+		dst->buf = ExAllocatePoolWithTag(NonPagedPool,
+						 dst->max_length, 0);
+		if (!dst->buf) {
+			dst->max_length = dst->length = 0;
+			EXIT2(return STATUS_NO_MEMORY);
+		}
+	} else if (dst->max_length < n)
+		EXIT2(return STATUS_BUFFER_TOO_SMALL);
+
+	dst->length = n;
+	n /= sizeof(dst->buf[0]);
+	for (i = 0; i < n; i++)
+		dst->buf[i] = src->buf[i];
+	if (i * sizeof(dst->buf[0]) < dst->max_length)
+		dst->buf[i] = 0;
+	TRACE2("dst: length: %d, max_length: %d, string: %p",
+	       dst->length, dst->max_length, src->buf);
+	EXIT2(return STATUS_SUCCESS);
+}
+
+wstdcall NTSTATUS WIN_FUNC(RtlUnicodeStringToAnsiString,3)
+	(struct ansi_string *dst, const struct unicode_string *src,
+	 BOOLEAN alloc)
+{
+	int i, n;
+
+	n = RtlxUnicodeStringToAnsiSize(src);
+	TRACE2("%d, %d, %d, %d, %p", n, dst->max_length, src->length,
+	       src->max_length, src->buf);
+	if (alloc == TRUE) {
+#if 0
+		if (n == 0) {
+			dst->length = dst->max_length = 0;
+			dst->buf = NULL;
+			EXIT2(return STATUS_SUCCESS);
+		}
+#endif
+		dst->max_length = n + sizeof(dst->buf[0]);
+		dst->buf = ExAllocatePoolWithTag(NonPagedPool,
+						 dst->max_length, 0);
+		if (!dst->buf) {
+			dst->max_length = dst->length = 0;
+			EXIT1(return STATUS_NO_MEMORY);
+		}
+	} else if (dst->max_length < n)
+		EXIT2(return STATUS_BUFFER_TOO_SMALL);
+
+	dst->length = n;
+	for (i = 0; i < n; i++)
+		dst->buf[i] = src->buf[i];
+	if (i < dst->max_length)
+		dst->buf[i] = 0;
+	TRACE2("string: %p, len: %d(%d)", dst->buf, dst->length,
+	       dst->max_length);
+	EXIT2(return STATUS_SUCCESS);
+}
+
+wstdcall NTSTATUS WIN_FUNC(RtlUnicodeStringToInteger,3)
+	(struct unicode_string *ustring, ULONG base, ULONG *value)
+{
+	int i, sign = 1;
+	ULONG res;
+	typeof(ustring->buf) string;
+
+	if (ustring->length == 0) {
+		*value = 0;
+		return STATUS_SUCCESS;
+	}
+
+	string = ustring->buf;
+	i = 0;
+	while (i < (ustring->length / sizeof(*string)) && string[i] == ' ')
+		i++;
+	if (string[i] == '+')
+		i++;
+	else if (string[i] == '-') {
+		i++;
+		sign = -1;
+	}
+	if (base == 0) {
+		base = 10;
+		if (i <= ((ustring->length / sizeof(*string)) - 2) &&
+		    string[i] == '0') {
+			i++;
+			if (string[i] == 'b') {
+				base = 2;
+				i++;
+			} else if (string[i] == 'o') {
+				base = 8;
+				i++;
+			} else if (string[i] == 'x') {
+				base = 16;
+				i++;
+			}
+		}
+	}
+	if (!(base == 2 || base == 8 || base == 10 || base == 16))
+		EXIT2(return STATUS_INVALID_PARAMETER);
+
+	for (res = 0; i < (ustring->length / sizeof(*string)); i++) {
+		int v;
+		if (isdigit((char)string[i]))
+			v = string[i] - '0';
+		else if (isxdigit((char)string[i]))
+			v = tolower((char)string[i]) - 'a' + 10;
+		else
+			v = base;
+		if (v >= base)
+			EXIT2(return STATUS_INVALID_PARAMETER);
+		res = res * base + v;
+	}
+	*value = sign * res;
+	EXIT3(return STATUS_SUCCESS);
+}
+
+wstdcall NTSTATUS WIN_FUNC(RtlCharToInteger,3)
+	(const char *string, ULONG base, ULONG *value)
+{
+	int sign = 1;
+	ULONG res;
+
+	if (!string || !value)
+		EXIT2(return STATUS_INVALID_PARAMETER);
+	while (*string == ' ')
+		string++;
+	if (*string == '+')
+		string++;
+	else if (*string == '-') {
+		string++;
+		sign = -1;
+	}
+	if (base == 0) {
+		base = 10;
+		if (*string == '0') {
+			string++;
+			if (*string == 'b') {
+				base = 2;
+				string++;
+			} else if (*string == 'o') {
+				base = 8;
+				string++;
+			} else if (*string == 'x') {
+				base = 16;
+				string++;
+			}
+		}
+	}
+	if (!(base == 2 || base == 8 || base == 10 || base == 16))
+		EXIT2(return STATUS_INVALID_PARAMETER);
+
+	for (res = 0; *string; string++) {
+		int v;
+		if (isdigit(*string))
+			v = *string - '0';
+		else if (isxdigit(*string))
+			v = tolower(*string) - 'a' + 10;
+		else
+			v = base;
+		if (v >= base)
+			EXIT2(return STATUS_INVALID_PARAMETER);
+		res = res * base + v;
+	}
+	*value = sign * res;
+	EXIT3(return STATUS_SUCCESS);
+}
+
+wstdcall NTSTATUS WIN_FUNC(RtlIntegerToUnicodeString,3)
+	(ULONG value, ULONG base, struct unicode_string *ustring)
+{
+	typeof(ustring->buf) buf = ustring->buf;
+	int i;
+
+	if (base == 0)
+		base = 10;
+	if (!(base == 2 || base == 8 || base == 10 || base == 16))
+		return STATUS_INVALID_PARAMETER;
+	for (i = 0; value && i < ustring->max_length / sizeof(*buf); i++) {
+		int r;
+		r = value % base;
+		value /= base;
+		if (r < 10)
+			buf[i] = r + '0';
+		else
+			buf[i] = r + 'a' - 10;
+	}
+	if (value)
+		return STATUS_BUFFER_OVERFLOW;
+	ustring->length = i * sizeof(*buf);
+	return STATUS_SUCCESS;
+}
+
+wstdcall LARGE_INTEGER WIN_FUNC(RtlConvertUlongToLargeInteger,1)
+	(ULONG ul)
+{
+	LARGE_INTEGER li = ul;
+	return li;
+}
+
+wfastcall USHORT WIN_FUNC(RtlUshortByteSwap,1)
+	(USHORT src)
+{
+	return __swab16(src);
+}
+
+wfastcall ULONG WIN_FUNC(RtlUlongByteSwap,1)
+	(ULONG src)
+{
+	/* ULONG is 32 bits for both 32-bit and 64-bit architectures */
+	return __swab32(src);
+}
+
+wstdcall NTSTATUS WIN_FUNC(RtlUpcaseUnicodeString,3)
+	(struct unicode_string *dst, struct unicode_string *src, BOOLEAN alloc)
+{
+	USHORT i, n;
+
+	if (alloc) {
+		dst->buf = ExAllocatePoolWithTag(NonPagedPool, src->length, 0);
+		if (dst->buf)
+			dst->max_length = src->length;
+		else
+			EXIT2(return STATUS_NO_MEMORY);
+	} else {
+		if (dst->max_length < src->length)
+			EXIT2(return STATUS_BUFFER_OVERFLOW);
+	}
+
+	n = src->length / sizeof(src->buf[0]);
+	for (i = 0; i < n; i++)
+		dst->buf[i] = toupper(src->buf[i]);
+
+	dst->length = src->length;
+	EXIT3(return STATUS_SUCCESS);
+}
+
+wstdcall void WIN_FUNC(RtlInitUnicodeString,2)
+	(struct unicode_string *dst, const wchar_t *src)
+{
+	ENTER2("%p", dst);
+	if (dst == NULL)
+		EXIT1(return);
+	if (src == NULL) {
+		dst->max_length = dst->length = 0;
+		dst->buf = NULL;
+	} else {
+		int i;
+		for (i = 0; (char)src[i]; i++)
+			;
+		dst->buf = (typeof(dst->buf))src;
+		dst->length = i * sizeof(dst->buf[0]);
+		dst->max_length = (i + 1) * sizeof(dst->buf[0]);
+	}
+	EXIT1(return);
+}
+
+wstdcall void WIN_FUNC(RtlInitAnsiString,2)
+	(struct ansi_string *dst, const char *src)
+{
+	ENTER2("%p", dst);
+	if (dst == NULL)
+		EXIT2(return);
+	if (src == NULL) {
+		dst->max_length = dst->length = 0;
+		dst->buf = NULL;
+	} else {
+		int i;
+		for (i = 0; src[i]; i++)
+			;
+		dst->buf = (typeof(dst->buf))src;
+		dst->length = i;
+		dst->max_length = i + 1;
+	}
+	TRACE2("%p", dst->buf);
+	EXIT2(return);
+}
+
+wstdcall void WIN_FUNC(RtlInitString,2)
+	(struct ansi_string *dst, const char *src)
+{
+	ENTER2("%p", dst);
+	RtlInitAnsiString(dst, src);
+	EXIT2(return);
+}
+
+wstdcall void WIN_FUNC(RtlFreeUnicodeString,1)
+	(struct unicode_string *string)
+{
+	ENTER2("%p", string);
+	if (string == NULL)
+		return;
+	if (string->buf)
+		ExFreePool(string->buf);
+	string->length = string->max_length = 0;
+	string->buf = NULL;
+	return;
+}
+
+wstdcall void WIN_FUNC(RtlFreeAnsiString,1)
+	(struct ansi_string *string)
+{
+	ENTER2("%p", string);
+	if (string == NULL)
+		return;
+	if (string->buf)
+		ExFreePool(string->buf);
+	string->length = string->max_length = 0;
+	string->buf = NULL;
+	return;
+}
+
+/* guid string is of the form: {XXXXXXXX-XXXX-XXXX-XXXX-XXXXXXXXXXXX} */
+wstdcall NTSTATUS WIN_FUNC(RtlGUIDFromString,2)
+	(struct unicode_string *guid_string, struct guid *guid)
+{
+	struct ansi_string ansi;
+	NTSTATUS ret;
+	int i, j, k, l, m;
+
+	ret = RtlUnicodeStringToAnsiString(&ansi, guid_string, TRUE);
+	if (ret != STATUS_SUCCESS)
+		return ret;
+	if (ansi.length != 37 || ansi.buf[0] != '{' ||
+	    ansi.buf[36] != '}' || ansi.buf[9] != '-' ||
+	    ansi.buf[14] != '-' || ansi.buf[19] != '-' ||
+	    ansi.buf[24] != '-') {
+		RtlFreeAnsiString(&ansi);
+		EXIT2(return STATUS_INVALID_PARAMETER);
+	}
+	memcpy(&guid->data4, &ansi.buf[29], sizeof(guid->data3));
+	/* set end of data3 for scanf */
+	ansi.buf[29] = 0;
+	if (sscanf(&ansi.buf[1], "%x", &i) == 1 &&
+	    sscanf(&ansi.buf[10], "%x", &j) == 1 &&
+	    sscanf(&ansi.buf[15], "%x", &k) == 1 &&
+	    sscanf(&ansi.buf[20], "%x", &l) == 1 &&
+	    sscanf(&ansi.buf[25], "%x", &m) == 1) {
+		guid->data1 = (i << 16) | (j < 8) | k;
+		guid->data2 = l;
+		guid->data3 = m;
+		ret = STATUS_SUCCESS;
+	} else
+		ret = STATUS_INVALID_PARAMETER;
+	RtlFreeAnsiString(&ansi);
+	return ret;
+}
+
+wstdcall NTSTATUS WIN_FUNC(RtlQueryRegistryValues,5)
+	(ULONG relative, wchar_t *path, struct rtl_query_registry_table *tbl,
+	 void *context, void *env)
+{
+	struct ansi_string ansi;
+	struct unicode_string unicode;
+	NTSTATUS status, ret;
+	static int i = 0;
+
+	ENTER3("%x, %p", relative, tbl);
+//	TODO();
+
+	RtlInitUnicodeString(&unicode, path);
+	if (RtlUnicodeStringToAnsiString(&ansi, &unicode, TRUE) ==
+	    STATUS_SUCCESS) {
+		TRACE2("%s", ansi.buf);
+		RtlFreeAnsiString(&ansi);
+	}
+	ret = STATUS_SUCCESS;
+	for (; tbl->name; tbl++) {
+		RtlInitUnicodeString(&unicode, tbl->name);
+		if (RtlUnicodeStringToAnsiString(&ansi, &unicode, TRUE) ==
+		    STATUS_SUCCESS) {
+			TRACE2("name: %s", ansi.buf);
+			RtlFreeAnsiString(&ansi);
+		}
+		TRACE2("flags: %08X", tbl->flags);
+		if (tbl->flags == RTL_QUERY_REGISTRY_DIRECT) {
+			TRACE2("type: %08X", tbl->def_type);
+			if (tbl->def_type == REG_DWORD) {
+				/* Atheros USB driver needs this, but
+				 * don't know where and how to get its
+				 * value */
+				if (tbl->def_data) {
+					TRACE2("def_data: %x",
+					       *(int *)tbl->def_data);
+					*(DWORD *)tbl->context = 0x5f292a + i++;
+//						*(DWORD *)tbl->def_data;
+				} else
+					*(DWORD *)tbl->context = 0x2345dbe;
+			}
+		} else {
+			void *data;
+			ULONG type, length;
+
+			if (!tbl->query_func) {
+				ERROR("oops: no query_func");
+				ret = STATUS_INVALID_PARAMETER;
+				break;
+			}
+			if (tbl->flags & RTL_QUERY_REGISTRY_NOVALUE) {
+				data = NULL;
+				type = REG_NONE;
+				length = 0;
+			} else {
+				data = tbl->def_data;
+				type = tbl->def_type;
+				length = tbl->def_length;;
+			}
+			TRACE2("calling query_func: %p", tbl->query_func);
+			status = LIN2WIN6(tbl->query_func, tbl->name, type,
+					  data, length, context, env);
+			TRACE2("status: %08X", status);
+			if (status) {
+				if (status == STATUS_BUFFER_TOO_SMALL)
+					ret = STATUS_BUFFER_TOO_SMALL;
+				else
+					EXIT2(return STATUS_INVALID_PARAMETER);
+			}
+		}
+	}
+	EXIT3(return ret);
+}
+
+wstdcall NTSTATUS WIN_FUNC(RtlWriteRegistryValue,6)
+	(ULONG relative, wchar_t *path, wchar_t *name, ULONG type,
+	 void *data, ULONG length)
+{
+	struct ansi_string ansi;
+	struct unicode_string unicode;
+
+	ENTER3("%d", relative);
+	TODO();
+
+	RtlInitUnicodeString(&unicode, path);
+	if (RtlUnicodeStringToAnsiString(&ansi, &unicode, TRUE) ==
+	    STATUS_SUCCESS) {
+		TRACE2("%s", ansi.buf);
+		RtlFreeAnsiString(&ansi);
+	}
+	RtlInitUnicodeString(&unicode, name);
+	if (RtlUnicodeStringToAnsiString(&ansi, &unicode, TRUE) ==
+	    STATUS_SUCCESS) {
+		TRACE2("%s", ansi.buf);
+		RtlFreeAnsiString(&ansi);
+	}
+	EXIT5(return STATUS_SUCCESS);
+}
+
+wstdcall NTSTATUS WIN_FUNC(RtlDeleteRegistryValue,3)
+	(ULONG relative, wchar_t *path, wchar_t *name)
+{
+	return STATUS_SUCCESS;
+}
+
+wstdcall void WIN_FUNC(RtlAssert,4)
+	(char *failed_assertion, char *file_name, ULONG line_num, char *message)
+{
+	ERROR("assertion '%s' failed at %s line %d%s",
+	      failed_assertion, file_name, line_num, message ? message : "");
+	return;
+}
+
+wstdcall void WIN_FUNC(RtlUnwind,0)
+	(void)
+{
+	TODO();
+}
+
+wstdcall void WIN_FUNC(RtlRaiseException,1)
+	(void *exception_record)
+{
+	TODO();
+}
+
+int rtl_init(void)
+{
+	return 0;
+}
+
+/* called when module is being removed */
+void rtl_exit(void)
+{
+	EXIT4(return);
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/ndiswrapper/pnp.h
+++ linux-mvl-dove-2.6.32/ubuntu/ndiswrapper/pnp.h
@@ -0,0 +1,42 @@
+/*
+ *  Copyright (C) 2005 Giridhar Pemmasani
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *  GNU General Public License for more details.
+ *
+ */
+
+#ifndef _PNP_H_
+#define _PNP_H_
+
+#include "ntoskernel.h"
+#include "ndis.h"
+#include "wrapndis.h"
+
+NTSTATUS pnp_start_device(struct wrap_device *wd);
+NTSTATUS pnp_stop_device(struct wrap_device *wd);
+NTSTATUS pnp_remove_device(struct wrap_device *wd);
+
+int wrap_pnp_start_pci_device(struct pci_dev *pdev,
+			      const struct pci_device_id *ent);
+void __devexit wrap_pnp_remove_pci_device(struct pci_dev *pdev);
+int wrap_pnp_suspend_pci_device(struct pci_dev *pdev, pm_message_t state);
+int wrap_pnp_resume_pci_device(struct pci_dev *pdev);
+
+#ifdef ENABLE_USB
+int wrap_pnp_start_usb_device(struct usb_interface *intf,
+			      const struct usb_device_id *usb_id);
+void wrap_pnp_remove_usb_device(struct usb_interface *intf);
+int wrap_pnp_suspend_usb_device(struct usb_interface *intf,
+				pm_message_t state);
+int wrap_pnp_resume_usb_device(struct usb_interface *intf);
+#endif
+
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/ndiswrapper/lin2win.h
+++ linux-mvl-dove-2.6.32/ubuntu/ndiswrapper/lin2win.h
@@ -0,0 +1,202 @@
+/*
+ *  Copyright (C) 2006 Giridhar Pemmasani
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *  GNU General Public License for more details.
+ *
+ */
+
+#ifdef CONFIG_X86_64
+
+/* Windows functions must have 32 bytes of shadow space for arguments
+ * above return address, irrespective of number of args. So argc >= 4
+ */
+
+#define alloc_win_stack_frame(argc)		\
+	"sub $(" #argc "+1)*8, %%rsp\n\t"
+#define free_win_stack_frame(argc)		\
+	"add $(" #argc "+1)*8, %%rsp\n\t"
+
+/* m is index of Windows arg required; Windows arg 1 should be at
+ * 0(%rsp), arg 2 at 8(%rsp) and so on after the frame is allocated.
+*/
+
+#define lin2win_win_arg(m) "(" #m "-1)*8(%%rsp)"
+
+/* args for Windows function must be in clobber / output list */
+
+#define outputs()							\
+	"=a" (_ret), "=c" (_dummy), "=d" (_dummy),			\
+		"=r" (r8), "=r" (r9), "=r" (r10), "=r" (r11)
+
+#define clobbers() "cc"
+
+#define LIN2WIN0(func)							\
+({									\
+	u64 _ret, _dummy;						\
+	register u64 r8 __asm__("r8");					\
+	register u64 r9 __asm__("r9");					\
+	register u64 r10 __asm__("r10");				\
+	register u64 r11 __asm__("r11");				\
+	__asm__ __volatile__(						\
+		alloc_win_stack_frame(4)				\
+		"callq *%[fptr]\n\t"					\
+		free_win_stack_frame(4)					\
+		: outputs()						\
+		: [fptr] "r" (func)					\
+		: clobbers());						\
+	_ret;								\
+})
+
+#define LIN2WIN1(func, arg1)						\
+({									\
+	u64 _ret, _dummy;						\
+	register u64 r8 __asm__("r8");					\
+	register u64 r9 __asm__("r9");					\
+	register u64 r10 __asm__("r10");				\
+	register u64 r11 __asm__("r11");				\
+	__asm__ __volatile__(						\
+		alloc_win_stack_frame(4)				\
+		"callq *%[fptr]\n\t"					\
+		free_win_stack_frame(4)					\
+		: outputs()						\
+		: "c" (arg1), [fptr] "r" (func)				\
+		: clobbers());						\
+	_ret;								\
+})
+
+#define LIN2WIN2(func, arg1, arg2)					\
+({									\
+	u64 _ret, _dummy;						\
+	register u64 r8 __asm__("r8");					\
+	register u64 r9 __asm__("r9");					\
+	register u64 r10 __asm__("r10");				\
+	register u64 r11 __asm__("r11");				\
+	__asm__ __volatile__(						\
+		alloc_win_stack_frame(4)				\
+		"callq *%[fptr]\n\t"					\
+		free_win_stack_frame(4)					\
+		: outputs()						\
+		: "c" (arg1), "d" (arg2), [fptr] "r" (func)		\
+		: clobbers());						\
+	_ret;								\
+})
+
+#define LIN2WIN3(func, arg1, arg2, arg3)				\
+({									\
+	u64 _ret, _dummy;						\
+	register u64 r8 __asm__("r8") = (u64)arg3;			\
+	register u64 r9 __asm__("r9");					\
+	register u64 r10 __asm__("r10");				\
+	register u64 r11 __asm__("r11");				\
+	__asm__ __volatile__(						\
+		alloc_win_stack_frame(4)				\
+		"callq *%[fptr]\n\t"					\
+		free_win_stack_frame(4)					\
+		: outputs()						\
+		: "c" (arg1), "d" (arg2), "r" (r8),			\
+		  [fptr] "r" (func)					\
+		: clobbers());						\
+	_ret;								\
+})
+
+#define LIN2WIN4(func, arg1, arg2, arg3, arg4)				\
+({									\
+	u64 _ret, _dummy;						\
+	register u64 r8 __asm__("r8") = (u64)arg3;			\
+	register u64 r9 __asm__("r9") = (u64)arg4;			\
+	register u64 r10 __asm__("r10");				\
+	register u64 r11 __asm__("r11");				\
+	__asm__ __volatile__(						\
+		alloc_win_stack_frame(4)				\
+		"callq *%[fptr]\n\t"					\
+		free_win_stack_frame(4)					\
+		: outputs()						\
+		: "c" (arg1), "d" (arg2), "r" (r8), "r" (r9),		\
+		  [fptr] "r" (func)					\
+		: clobbers());						\
+	_ret;								\
+})
+
+#define LIN2WIN5(func, arg1, arg2, arg3, arg4, arg5)			\
+({									\
+	u64 _ret, _dummy;						\
+	register u64 r8 __asm__("r8") = (u64)arg3;			\
+	register u64 r9 __asm__("r9") = (u64)arg4;			\
+	register u64 r10 __asm__("r10");				\
+	register u64 r11 __asm__("r11");				\
+	__asm__ __volatile__(						\
+		alloc_win_stack_frame(5)				\
+		"movq %[rarg5], " lin2win_win_arg(5) "\n\t"		\
+		"callq *%[fptr]\n\t"					\
+		free_win_stack_frame(5)					\
+		: outputs()						\
+		: "c" (arg1), "d" (arg2), "r" (r8), "r" (r9),		\
+		  [rarg5] "ri" ((u64)arg5),				\
+		  [fptr] "r" (func)					\
+		: clobbers());						\
+	_ret;								\
+})
+
+#define LIN2WIN6(func, arg1, arg2, arg3, arg4, arg5, arg6)		\
+({									\
+	u64 _ret, _dummy;						\
+	register u64 r8 __asm__("r8") = (u64)arg3;			\
+	register u64 r9 __asm__("r9") = (u64)arg4;			\
+	register u64 r10 __asm__("r10");				\
+	register u64 r11 __asm__("r11");				\
+	__asm__ __volatile__(						\
+		alloc_win_stack_frame(6)				\
+		"movq %[rarg5], " lin2win_win_arg(5) "\n\t"		\
+		"movq %[rarg6], " lin2win_win_arg(6) "\n\t"		\
+		"callq *%[fptr]\n\t"					\
+		free_win_stack_frame(6)					\
+		: outputs()						\
+		: "c" (arg1), "d" (arg2), "r" (r8), "r" (r9),		\
+		  [rarg5] "ri" ((u64)arg5), [rarg6] "ri" ((u64)arg6),	\
+		  [fptr] "r" (func)					\
+		: clobbers());						\
+	_ret;								\
+})
+
+#else // CONFIG_X86_64
+
+#define LIN2WIN1(func, arg1)						\
+({									\
+	TRACE6("calling %p", func);					\
+	func(arg1);							\
+})
+#define LIN2WIN2(func, arg1, arg2)					\
+({									\
+	TRACE6("calling %p", func);					\
+	func(arg1, arg2);						\
+})
+#define LIN2WIN3(func, arg1, arg2, arg3)				\
+({									\
+	TRACE6("calling %p", func);					\
+	func(arg1, arg2, arg3);						\
+})
+#define LIN2WIN4(func, arg1, arg2, arg3, arg4)				\
+({									\
+	TRACE6("calling %p", func);					\
+	func(arg1, arg2, arg3, arg4);					\
+})
+#define LIN2WIN5(func, arg1, arg2, arg3, arg4, arg5)			\
+({									\
+	TRACE6("calling %p", func);					\
+	func(arg1, arg2, arg3, arg4, arg5);				\
+})
+#define LIN2WIN6(func, arg1, arg2, arg3, arg4, arg5, arg6)		\
+({									\
+	TRACE6("calling %p", func);					\
+	func(arg1, arg2, arg3, arg4, arg5, arg6);			\
+})
+
+#endif // CONFIG_X86_64
--- linux-mvl-dove-2.6.32.orig/ubuntu/ndiswrapper/iw_ndis.c
+++ linux-mvl-dove-2.6.32/ubuntu/ndiswrapper/iw_ndis.c
@@ -0,0 +1,1973 @@
+ /*
+ *  Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *  GNU General Public License for more details.
+ *
+ */
+
+#include <linux/version.h>
+#include <linux/wireless.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/ethtool.h>
+#include <linux/if_arp.h>
+#include <linux/usb.h>
+#include <linux/random.h>
+
+#include <net/iw_handler.h>
+#include <linux/rtnetlink.h>
+#include <asm/uaccess.h>
+
+#include "iw_ndis.h"
+#include "wrapndis.h"
+
+static int freq_chan[] = { 2412, 2417, 2422, 2427, 2432, 2437, 2442,
+			   2447, 2452, 2457, 2462, 2467, 2472, 2484 };
+
+static const char *network_names[] = {"IEEE 802.11FH", "IEEE 802.11b",
+				      "IEEE 802.11a", "IEEE 802.11g", "Auto"};
+
+int set_essid(struct ndis_device *wnd, const char *ssid, int ssid_len)
+{
+	NDIS_STATUS res;
+	struct ndis_essid req;
+
+	if (ssid_len > NDIS_ESSID_MAX_SIZE)
+		return -EINVAL;
+
+	memset(&req, 0, sizeof(req));
+	req.length = ssid_len;
+	if (ssid_len)
+		memcpy(&req.essid, ssid, ssid_len);
+
+	res = mp_set(wnd, OID_802_11_SSID, &req, sizeof(req));
+	if (res) {
+		WARNING("setting essid failed (%08X)", res);
+		EXIT2(return -EINVAL);
+	}
+	memcpy(&wnd->essid, &req, sizeof(req));
+	EXIT2(return 0);
+}
+
+static int set_assoc_params(struct ndis_device *wnd)
+{
+	TRACE2("wpa_version=0x%x auth_alg=0x%x key_mgmt=0x%x "
+	       "cipher_pairwise=0x%x cipher_group=0x%x",
+	       wnd->iw_auth_wpa_version, wnd->iw_auth_80211_alg,
+	       wnd->iw_auth_key_mgmt, wnd->iw_auth_cipher_pairwise,
+	       wnd->iw_auth_cipher_group);
+	set_auth_mode(wnd);
+	set_priv_filter(wnd);
+	set_encr_mode(wnd);
+	return 0;
+}
+
+static int iw_set_essid(struct net_device *dev, struct iw_request_info *info,
+			union iwreq_data *wrqu, char *extra)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	char ssid[NDIS_ESSID_MAX_SIZE];
+	int length;
+
+	ENTER2("");
+	memset(ssid, 0, sizeof(ssid));
+	/* there is no way to turn off essid other than to set to
+	 * random bytes; instead, we use off to mean any */
+	if (wrqu->essid.flags) {
+		/* wireless-tools prior to version 20 add extra 1, and
+		 * later than 20 don't! Deal with that mess */
+		length = wrqu->essid.length - 1;
+		if (length > 0)
+			length--;
+		while (length < wrqu->essid.length && extra[length])
+			length++;
+		TRACE2("%d", length);
+		if (length <= 0 || length > NDIS_ESSID_MAX_SIZE)
+			EXIT2(return -EINVAL);
+	} else
+		length = 0;
+
+	set_assoc_params(wnd);
+
+	memcpy(ssid, extra, length);
+	if (set_essid(wnd, ssid, length))
+		EXIT2(return -EINVAL);
+
+	EXIT2(return 0);
+}
+
+static int iw_get_essid(struct net_device *dev, struct iw_request_info *info,
+			union iwreq_data *wrqu, char *extra)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	NDIS_STATUS res;
+	struct ndis_essid req;
+
+	ENTER2("");
+	memset(&req, 0, sizeof(req));
+	res = mp_query(wnd, OID_802_11_SSID, &req, sizeof(req));
+	if (res) {
+		WARNING("getting essid failed (%08X)", res);
+		EXIT2(return -EOPNOTSUPP);
+	}
+	memcpy(extra, req.essid, req.length);
+	if (req.length > 0)
+		wrqu->essid.flags  = 1;
+	else
+		wrqu->essid.flags = 0;
+	wrqu->essid.length = req.length;
+	EXIT2(return 0);
+}
+
+int set_infra_mode(struct ndis_device *wnd,
+		   enum ndis_infrastructure_mode mode)
+{
+	NDIS_STATUS res;
+	unsigned int i;
+
+	ENTER2("%d", mode);
+	res = mp_query_int(wnd, OID_802_11_INFRASTRUCTURE_MODE,
+			   &wnd->infrastructure_mode);
+	if (res != NDIS_STATUS_SUCCESS) {
+		WARNING("getting operating mode to failed (%08X)", res);
+		EXIT2(return -EINVAL);
+	}
+	if (wnd->infrastructure_mode == mode)
+		EXIT2(return 0);
+	res = mp_set_int(wnd, OID_802_11_INFRASTRUCTURE_MODE, mode);
+	if (res) {
+		WARNING("setting operating mode to %d failed (%08X)",
+			mode, res);
+		EXIT2(return -EINVAL);
+	}
+	/* NDIS drivers clear keys when infrastructure mode is
+	 * changed. But Linux tools assume otherwise. So set the
+	 * keys */
+	if (wnd->iw_auth_key_mgmt == 0 ||
+	    wnd->iw_auth_key_mgmt == IW_AUTH_KEY_MGMT_802_1X) {
+		for (i = 0; i < MAX_ENCR_KEYS; i++) {
+			if (wnd->encr_info.keys[i].length > 0)
+				add_wep_key(wnd, wnd->encr_info.keys[i].key,
+					    wnd->encr_info.keys[i].length, i);
+		}
+	}
+	wnd->infrastructure_mode = mode;
+	EXIT2(return 0);
+}
+
+static int iw_set_infra_mode(struct net_device *dev,
+			     struct iw_request_info *info,
+			     union iwreq_data *wrqu, char *extra)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	enum ndis_infrastructure_mode ndis_mode;
+
+	ENTER2("%d", wrqu->mode);
+	switch (wrqu->mode) {
+	case IW_MODE_ADHOC:
+		ndis_mode = Ndis802_11IBSS;
+		break;
+	case IW_MODE_INFRA:
+		ndis_mode = Ndis802_11Infrastructure;
+		break;
+	case IW_MODE_AUTO:
+		ndis_mode = Ndis802_11AutoUnknown;
+		break;
+	default:
+		EXIT2(return -EINVAL);
+	}
+
+	if (set_infra_mode(wnd, ndis_mode))
+		EXIT2(return -EINVAL);
+
+	EXIT2(return 0);
+}
+
+static int iw_get_infra_mode(struct net_device *dev,
+			     struct iw_request_info *info,
+			     union iwreq_data *wrqu, char *extra)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	int ndis_mode, iw_mode;
+	NDIS_STATUS res;
+
+	ENTER2("");
+	res = mp_query_int(wnd, OID_802_11_INFRASTRUCTURE_MODE, &ndis_mode);
+	if (res) {
+		WARNING("getting operating mode failed (%08X)", res);
+		EXIT2(return -EOPNOTSUPP);
+	}
+
+	switch(ndis_mode) {
+	case Ndis802_11IBSS:
+		iw_mode = IW_MODE_ADHOC;
+		break;
+	case Ndis802_11Infrastructure:
+		iw_mode = IW_MODE_INFRA;
+		break;
+	case Ndis802_11AutoUnknown:
+		iw_mode = IW_MODE_AUTO;
+		break;
+	default:
+		ERROR("invalid operating mode (%u)", ndis_mode);
+		EXIT2(return -EINVAL);
+	}
+	wrqu->mode = iw_mode;
+	EXIT2(return 0);
+}
+
+static const char *network_type_to_name(int net_type)
+{
+	if (net_type >= 0 &&
+	    net_type < (sizeof(network_names)/sizeof(network_names[0])))
+		return network_names[net_type];
+	else
+		return network_names[sizeof(network_names) /
+				     sizeof(network_names[0]) - 1];
+}
+
+static int iw_get_network_type(struct net_device *dev,
+			       struct iw_request_info *info,
+			       union iwreq_data *wrqu, char *extra)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	unsigned int network_type;
+	NDIS_STATUS res;
+
+	ENTER2("");
+	res = mp_query_int(wnd, OID_802_11_NETWORK_TYPE_IN_USE,
+			   &network_type);
+	if (res) {
+		WARNING("getting network type failed: %08X", res);
+		network_type = -1;
+	}
+	strncpy(wrqu->name, network_type_to_name(network_type),
+	        sizeof(wrqu->name) - 1);
+	wrqu->name[sizeof(wrqu->name)-1] = 0;
+	return 0;
+}
+
+static int iw_get_freq(struct net_device *dev, struct iw_request_info *info,
+		       union iwreq_data *wrqu, char *extra)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	NDIS_STATUS res;
+	struct ndis_configuration req;
+
+	ENTER2("");
+	memset(&req, 0, sizeof(req));
+	res = mp_query(wnd, OID_802_11_CONFIGURATION, &req, sizeof(req));
+	if (res) {
+		WARNING("getting configuration failed (%08X)", res);
+		EXIT2(return -EOPNOTSUPP);
+	}
+
+	memset(&(wrqu->freq), 0, sizeof(struct iw_freq));
+
+	/* see comment in wireless.h above the "struct iw_freq"
+	   definition for an explanation of this if
+	   NOTE: 1000000 is due to the kHz
+	*/
+	if (req.ds_config > 1000000) {
+		wrqu->freq.m = req.ds_config / 10;
+		wrqu->freq.e = 1;
+	}
+	else
+		wrqu->freq.m = req.ds_config;
+
+	/* convert from kHz to Hz */
+	wrqu->freq.e += 3;
+
+	return 0;
+}
+
+static int iw_set_freq(struct net_device *dev, struct iw_request_info *info,
+		       union iwreq_data *wrqu, char *extra)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	NDIS_STATUS res;
+	struct ndis_configuration req;
+
+	ENTER2("");
+	/* this OID is valid only when not associated */
+	if (netif_carrier_ok(wnd->net_dev))
+		EXIT2(return 0);
+	memset(&req, 0, sizeof(req));
+	res = mp_query(wnd, OID_802_11_CONFIGURATION, &req, sizeof(req));
+	if (res) {
+		WARNING("getting configuration failed (%08X)", res);
+		EXIT2(return 0);
+	}
+
+	if (wrqu->freq.m < 1000 && wrqu->freq.e == 0) {
+		if (wrqu->freq.m >= 1 &&
+		    wrqu->freq.m <= (sizeof(freq_chan) / sizeof(freq_chan[0])))
+			req.ds_config = freq_chan[wrqu->freq.m - 1] * 1000;
+		else
+			return -EINVAL;
+	} else {
+		int i;
+		req.ds_config = wrqu->freq.m;
+		for (i = wrqu->freq.e; i > 0; i--)
+			req.ds_config *= 10;
+		req.ds_config /= 1000;
+	}
+	res = mp_set(wnd, OID_802_11_CONFIGURATION, &req, sizeof(req));
+	if (res)
+		WARNING("setting configuration failed (%08X)", res);
+	return 0;
+}
+
+static int iw_get_tx_power(struct net_device *dev, struct iw_request_info *info,
+			   union iwreq_data *wrqu, char *extra)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	ndis_tx_power_level ndis_power;
+	NDIS_STATUS res;
+
+	ENTER2("");
+	res = mp_query(wnd, OID_802_11_TX_POWER_LEVEL,
+		       &ndis_power, sizeof(ndis_power));
+	if (res)
+		return -EOPNOTSUPP;
+	wrqu->txpower.flags = IW_TXPOW_MWATT;
+	wrqu->txpower.disabled = 0;
+	wrqu->txpower.fixed = 0;
+	wrqu->txpower.value = ndis_power;
+	return 0;
+}
+
+static int iw_set_tx_power(struct net_device *dev, struct iw_request_info *info,
+			   union iwreq_data *wrqu, char *extra)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	ndis_tx_power_level ndis_power;
+	NDIS_STATUS res;
+
+	ENTER2("");
+	if (wrqu->txpower.disabled)
+		ndis_power = 0;
+	else {
+		if (wrqu->txpower.flags == IW_TXPOW_MWATT)
+			ndis_power = wrqu->txpower.value;
+		else { // wrqu->txpower.flags == IW_TXPOW_DBM
+			if (wrqu->txpower.value > 20)
+				ndis_power = 128;
+			else if (wrqu->txpower.value < -43)
+				ndis_power = 127;
+			else {
+				signed char tmp;
+				tmp = wrqu->txpower.value;
+				tmp = -12 - tmp;
+				tmp <<= 2;
+				ndis_power = (unsigned char)tmp;
+			}
+		}
+	}
+	TRACE2("%d", ndis_power);
+	res = mp_set(wnd, OID_802_11_TX_POWER_LEVEL,
+		     &ndis_power, sizeof(ndis_power));
+	if (res)
+		EXIT2(return -EOPNOTSUPP);
+	if (ndis_power == 0)
+		res = disassociate(wnd, 0);
+	EXIT2(return 0);
+}
+
+static int iw_get_bitrate(struct net_device *dev, struct iw_request_info *info,
+			  union iwreq_data *wrqu, char *extra)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	ULONG ndis_rate;
+	int res;
+
+	ENTER2("");
+	res = mp_query(wnd, OID_GEN_LINK_SPEED, &ndis_rate, sizeof(ndis_rate));
+	if (res) {
+		WARNING("getting bitrate failed (%08X)", res);
+		ndis_rate = 0;
+	}
+
+	wrqu->bitrate.value = ndis_rate * 100;
+	return 0;
+}
+
+static int iw_set_bitrate(struct net_device *dev, struct iw_request_info *info,
+			  union iwreq_data *wrqu, char *extra)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	int i, n;
+	NDIS_STATUS res;
+	ndis_rates_ex rates;
+
+	ENTER2("");
+	if (wrqu->bitrate.fixed == 0)
+		EXIT2(return 0);
+
+	res = mp_query_info(wnd, OID_802_11_SUPPORTED_RATES, &rates,
+			    sizeof(rates), &n, NULL);
+	if (res) {
+		WARNING("getting bit rate failed (%08X)", res);
+		EXIT2(return 0);
+	}
+	for (i = 0; i < n; i++) {
+		if (rates[i] & 0x80)
+			continue;
+		if ((rates[i] & 0x7f) * 500000 > wrqu->bitrate.value) {
+			TRACE2("setting rate %d to 0",
+			       (rates[i] & 0x7f) * 500000);
+			rates[i] = 0;
+		}
+	}
+
+	res = mp_set(wnd, OID_802_11_DESIRED_RATES, &rates, n);
+	if (res) {
+		WARNING("setting bit rate failed (%08X)", res);
+		EXIT2(return 0);
+	}
+
+	return 0;
+}
+
+static int iw_set_dummy(struct net_device *dev, struct iw_request_info *info,
+			union iwreq_data *wrqu, char *extra)
+{
+	/* Do nothing. Used for ioctls that are not implemented. */
+	return 0;
+}
+
+static int iw_get_rts_threshold(struct net_device *dev,
+				struct iw_request_info *info,
+				union iwreq_data *wrqu, char *extra)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	ndis_rts_threshold threshold;
+	NDIS_STATUS res;
+
+	ENTER2("");
+	res = mp_query(wnd, OID_802_11_RTS_THRESHOLD,
+		       &threshold, sizeof(threshold));
+	if (res)
+		return -EOPNOTSUPP;
+
+	wrqu->rts.value = threshold;
+	return 0;
+}
+
+static int iw_set_rts_threshold(struct net_device *dev,
+				struct iw_request_info *info,
+				union iwreq_data *wrqu, char *extra)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	ndis_rts_threshold threshold;
+	NDIS_STATUS res;
+
+	ENTER2("");
+	threshold = wrqu->rts.value;
+	res = mp_set(wnd, OID_802_11_RTS_THRESHOLD,
+		     &threshold, sizeof(threshold));
+	if (res == NDIS_STATUS_INVALID_DATA)
+		return -EINVAL;
+	if (res)
+		return -EOPNOTSUPP;
+
+	return 0;
+}
+
+static int iw_get_frag_threshold(struct net_device *dev,
+				 struct iw_request_info *info,
+				 union iwreq_data *wrqu, char *extra)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	ndis_fragmentation_threshold frag_threshold;
+	NDIS_STATUS res;
+
+	ENTER2("");
+	res = mp_query(wnd, OID_802_11_FRAGMENTATION_THRESHOLD,
+		       &frag_threshold, sizeof(frag_threshold));
+	if (res)
+		return -ENOTSUPP;
+
+	wrqu->frag.value = frag_threshold;
+	return 0;
+}
+
+static int iw_set_frag_threshold(struct net_device *dev,
+				 struct iw_request_info *info,
+				 union iwreq_data *wrqu, char *extra)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	ndis_rts_threshold threshold;
+	NDIS_STATUS res;
+
+	ENTER2("");
+	threshold = wrqu->frag.value;
+	res = mp_set(wnd, OID_802_11_FRAGMENTATION_THRESHOLD,
+		     &threshold, sizeof(threshold));
+	if (res == NDIS_STATUS_INVALID_DATA)
+		return -EINVAL;
+	if (res)
+		return -EOPNOTSUPP;
+	return 0;
+}
+
+int get_ap_address(struct ndis_device *wnd, mac_address ap_addr)
+{
+	NDIS_STATUS res;
+
+	res = mp_query(wnd, OID_802_11_BSSID, ap_addr, ETH_ALEN);
+	TRACE2(MACSTRSEP, MAC2STR(ap_addr));
+	if (res) {
+		TRACE2("res: %08X", res);
+		memset(ap_addr, 0x0, ETH_ALEN);
+		EXIT2(return -EOPNOTSUPP);
+	}
+	EXIT2(return 0);
+}
+
+static int iw_get_ap_address(struct net_device *dev,
+			     struct iw_request_info *info,
+			     union iwreq_data *wrqu, char *extra)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	mac_address ap_addr;
+
+	ENTER2("");
+	get_ap_address(wnd, ap_addr);
+	memcpy(wrqu->ap_addr.sa_data, ap_addr, ETH_ALEN);
+	wrqu->ap_addr.sa_family = ARPHRD_ETHER;
+	EXIT2(return 0);
+}
+
+static int iw_set_ap_address(struct net_device *dev,
+			     struct iw_request_info *info,
+			     union iwreq_data *wrqu, char *extra)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	NDIS_STATUS res;
+	mac_address ap_addr;
+
+	ENTER2("");
+	memcpy(ap_addr, wrqu->ap_addr.sa_data, ETH_ALEN);
+	TRACE2(MACSTRSEP, MAC2STR(ap_addr));
+	res = mp_set(wnd, OID_802_11_BSSID, ap_addr, ETH_ALEN);
+	/* user apps may set ap's mac address, which is not required;
+	 * they may fail to work if this function fails, so return
+	 * success */
+	if (res)
+		WARNING("setting AP mac address failed (%08X)", res);
+
+	EXIT2(return 0);
+}
+
+int set_iw_auth_mode(struct ndis_device *wnd, int wpa_version,
+		     int auth_80211_alg)
+{
+	NDIS_STATUS res;
+	ULONG auth_mode;
+
+	ENTER2("%d, %d", wpa_version, auth_80211_alg);
+	if (wpa_version & IW_AUTH_WPA_VERSION_WPA2) {
+		if (wnd->iw_auth_key_mgmt & IW_AUTH_KEY_MGMT_802_1X)
+			auth_mode = Ndis802_11AuthModeWPA2;
+		else
+			auth_mode = Ndis802_11AuthModeWPA2PSK;
+	} else if (wpa_version & IW_AUTH_WPA_VERSION_WPA) {
+		if (wnd->iw_auth_key_mgmt & IW_AUTH_KEY_MGMT_802_1X)
+			auth_mode = Ndis802_11AuthModeWPA;
+		else if (wnd->iw_auth_key_mgmt & IW_AUTH_KEY_MGMT_PSK)
+			auth_mode = Ndis802_11AuthModeWPAPSK;
+		else
+			auth_mode = Ndis802_11AuthModeWPANone;
+	} else if (auth_80211_alg & IW_AUTH_ALG_SHARED_KEY) {
+		if (auth_80211_alg & IW_AUTH_ALG_OPEN_SYSTEM)
+			auth_mode = Ndis802_11AuthModeAutoSwitch;
+		else
+			auth_mode = Ndis802_11AuthModeShared;
+	} else
+		auth_mode = Ndis802_11AuthModeOpen;
+
+	res = mp_set_int(wnd, OID_802_11_AUTHENTICATION_MODE, auth_mode);
+	if (res) {
+		WARNING("setting auth mode to %u failed (%08X)",
+			auth_mode, res);
+		if (res == NDIS_STATUS_INVALID_DATA)
+			EXIT2(return -EINVAL);
+		return -EOPNOTSUPP;
+	}
+	wnd->iw_auth_wpa_version = wpa_version;
+	wnd->iw_auth_80211_alg = auth_80211_alg;
+	EXIT2(return 0);
+}
+
+int set_ndis_auth_mode(struct ndis_device *wnd, ULONG auth_mode)
+{
+	NDIS_STATUS res;
+
+	ENTER2("%d", auth_mode);
+	res = mp_set_int(wnd, OID_802_11_AUTHENTICATION_MODE, auth_mode);
+	if (res) {
+		WARNING("setting auth mode to %u failed (%08X)",
+			auth_mode, res);
+		if (res == NDIS_STATUS_INVALID_DATA)
+			EXIT2(return -EINVAL);
+		return -EOPNOTSUPP;
+	}
+	switch (auth_mode) {
+	case Ndis802_11AuthModeWPA:
+		wnd->iw_auth_wpa_version = IW_AUTH_WPA_VERSION_WPA;
+		wnd->iw_auth_key_mgmt = IW_AUTH_KEY_MGMT_802_1X;
+		break;
+	case Ndis802_11AuthModeWPAPSK:
+		wnd->iw_auth_wpa_version = IW_AUTH_WPA_VERSION_WPA;
+		wnd->iw_auth_key_mgmt = IW_AUTH_KEY_MGMT_PSK;
+	case Ndis802_11AuthModeWPANone:
+		wnd->iw_auth_wpa_version = IW_AUTH_WPA_VERSION_DISABLED;
+		wnd->iw_auth_key_mgmt = IW_AUTH_KEY_MGMT_PSK;
+		break;
+	case Ndis802_11AuthModeWPA2:
+		wnd->iw_auth_wpa_version = IW_AUTH_WPA_VERSION_WPA2;
+		wnd->iw_auth_key_mgmt = IW_AUTH_KEY_MGMT_802_1X;
+		break;
+	case Ndis802_11AuthModeWPA2PSK:
+		wnd->iw_auth_wpa_version = IW_AUTH_WPA_VERSION_WPA2;
+		wnd->iw_auth_key_mgmt = IW_AUTH_KEY_MGMT_PSK;
+		break;
+	case Ndis802_11AuthModeOpen:
+		wnd->iw_auth_wpa_version = IW_AUTH_WPA_VERSION_DISABLED;
+		wnd->iw_auth_80211_alg = IW_AUTH_ALG_OPEN_SYSTEM;
+		break;
+	case Ndis802_11AuthModeShared:
+		wnd->iw_auth_wpa_version = IW_AUTH_WPA_VERSION_DISABLED;
+		wnd->iw_auth_80211_alg = IW_AUTH_ALG_SHARED_KEY;
+		break;
+	case Ndis802_11AuthModeAutoSwitch:
+		wnd->iw_auth_wpa_version = IW_AUTH_WPA_VERSION_DISABLED;
+		wnd->iw_auth_80211_alg = IW_AUTH_ALG_SHARED_KEY;
+		wnd->iw_auth_80211_alg |= IW_AUTH_ALG_OPEN_SYSTEM;
+		break;
+	default:
+		WARNING("invalid authentication algorithm: %d", auth_mode);
+		break;
+	}
+	EXIT2(return 0);
+}
+
+int set_auth_mode(struct ndis_device *wnd)
+{
+	return set_iw_auth_mode(wnd, wnd->iw_auth_wpa_version,
+				wnd->iw_auth_80211_alg);
+}
+
+int get_ndis_auth_mode(struct ndis_device *wnd)
+{
+	ULONG mode;
+	NDIS_STATUS res;
+
+	res = mp_query_int(wnd, OID_802_11_AUTHENTICATION_MODE, &mode);
+	if (res) {
+		WARNING("getting authentication mode failed (%08X)", res);
+		EXIT2(return -EOPNOTSUPP);
+	}
+	TRACE2("%d", mode);
+	return mode;
+}
+
+int set_iw_encr_mode(struct ndis_device *wnd, int cipher_pairwise,
+		     int cipher_groupwise)
+{
+	NDIS_STATUS res;
+	ULONG ndis_mode;
+
+	ENTER2("%d, %d", cipher_pairwise, cipher_groupwise);
+	if (cipher_pairwise & IW_AUTH_CIPHER_CCMP)
+		ndis_mode = Ndis802_11Encryption3Enabled;
+	else if (cipher_pairwise & IW_AUTH_CIPHER_TKIP)
+		ndis_mode = Ndis802_11Encryption2Enabled;
+	else if (cipher_pairwise &
+		 (IW_AUTH_CIPHER_WEP40 | IW_AUTH_CIPHER_WEP104))
+		ndis_mode = Ndis802_11Encryption1Enabled;
+	else if (cipher_groupwise & IW_AUTH_CIPHER_CCMP)
+		ndis_mode = Ndis802_11Encryption3Enabled;
+	else if (cipher_groupwise & IW_AUTH_CIPHER_TKIP)
+		ndis_mode = Ndis802_11Encryption2Enabled;
+	else
+		ndis_mode = Ndis802_11EncryptionDisabled;
+
+	res = mp_set_int(wnd, OID_802_11_ENCRYPTION_STATUS, ndis_mode);
+	if (res) {
+		WARNING("setting encryption mode to %u failed (%08X)",
+			ndis_mode, res);
+		if (res == NDIS_STATUS_INVALID_DATA)
+			EXIT2(return -EINVAL);
+		return -EOPNOTSUPP;
+	}
+	wnd->iw_auth_cipher_pairwise = cipher_pairwise;
+	wnd->iw_auth_cipher_group = cipher_groupwise;
+	EXIT2(return 0);
+}
+
+int set_encr_mode(struct ndis_device *wnd)
+{
+	return set_iw_encr_mode(wnd, wnd->iw_auth_cipher_pairwise,
+				wnd->iw_auth_cipher_group);
+}
+
+int get_ndis_encr_mode(struct ndis_device *wnd)
+{
+	ULONG mode;
+	NDIS_STATUS res;
+
+	ENTER2("");
+	res = mp_query_int(wnd, OID_802_11_ENCRYPTION_STATUS, &mode);
+	if (res) {
+		WARNING("getting encryption status failed (%08X)", res);
+		EXIT2(return -EOPNOTSUPP);
+	} else
+		EXIT2(return mode);
+}
+
+static int iw_get_encr(struct net_device *dev, struct iw_request_info *info,
+		       union iwreq_data *wrqu, char *extra)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	int index, mode;
+	struct encr_info *encr_info = &wnd->encr_info;
+
+	ENTER2("wnd = %p", wnd);
+	wrqu->data.length = 0;
+	extra[0] = 0;
+
+	index = (wrqu->encoding.flags & IW_ENCODE_INDEX);
+	TRACE2("index = %u", index);
+	if (index > 0)
+		index--;
+	else
+		index = encr_info->tx_key_index;
+
+	if (index < 0 || index >= MAX_ENCR_KEYS) {
+		WARNING("encryption index out of range (%u)", index);
+		EXIT2(return -EINVAL);
+	}
+
+	if (index != encr_info->tx_key_index) {
+		if (encr_info->keys[index].length > 0) {
+			wrqu->data.flags |= IW_ENCODE_ENABLED;
+			wrqu->data.length = encr_info->keys[index].length;
+			memcpy(extra, encr_info->keys[index].key,
+			       encr_info->keys[index].length);
+		}
+		else
+			wrqu->data.flags |= IW_ENCODE_DISABLED;
+
+		EXIT2(return 0);
+	}
+
+	/* transmit key */
+	mode = get_ndis_encr_mode(wnd);
+	if (mode < 0)
+		EXIT2(return -EOPNOTSUPP);
+
+	if (mode == Ndis802_11EncryptionDisabled ||
+	    mode == Ndis802_11EncryptionNotSupported)
+		wrqu->data.flags |= IW_ENCODE_DISABLED;
+	else {
+		if (mode == Ndis802_11Encryption1KeyAbsent ||
+		    mode == Ndis802_11Encryption2KeyAbsent ||
+		    mode == Ndis802_11Encryption3KeyAbsent)
+			wrqu->data.flags |= IW_ENCODE_NOKEY;
+		else {
+			wrqu->data.flags |= IW_ENCODE_ENABLED;
+			wrqu->encoding.flags |= index+1;
+			wrqu->data.length = encr_info->keys[index].length;
+			memcpy(extra, encr_info->keys[index].key,
+			       encr_info->keys[index].length);
+		}
+	}
+	mode = get_ndis_auth_mode(wnd);
+	if (mode < 0)
+		EXIT2(return -EOPNOTSUPP);
+
+	if (mode == Ndis802_11AuthModeOpen)
+		wrqu->data.flags |= IW_ENCODE_OPEN;
+	else if (mode == Ndis802_11AuthModeAutoSwitch)
+		wrqu->data.flags |= IW_ENCODE_RESTRICTED;
+	else // Ndis802_11AuthModeAutoSwitch, Ndis802_11AuthModeWPA etc.
+		wrqu->data.flags |= IW_ENCODE_RESTRICTED;
+
+	EXIT2(return 0);
+}
+
+/* index must be 0 - N, as per NDIS  */
+int add_wep_key(struct ndis_device *wnd, char *key, int key_len,
+		int index)
+{
+	struct ndis_encr_key ndis_key;
+	NDIS_STATUS res;
+
+	ENTER2("key index: %d, length: %d", index, key_len);
+	if (key_len <= 0 || key_len > NDIS_ENCODING_TOKEN_MAX) {
+		WARNING("invalid key length (%d)", key_len);
+		EXIT2(return -EINVAL);
+	}
+	if (index < 0 || index >= MAX_ENCR_KEYS) {
+		WARNING("invalid key index (%d)", index);
+		EXIT2(return -EINVAL);
+	}
+	ndis_key.struct_size = sizeof(ndis_key);
+	ndis_key.length = key_len;
+	memcpy(&ndis_key.key, key, key_len);
+	ndis_key.index = index;
+
+	if (index == wnd->encr_info.tx_key_index) {
+		ndis_key.index |= (1 << 31);
+		res = set_iw_encr_mode(wnd, IW_AUTH_CIPHER_WEP104,
+				       IW_AUTH_CIPHER_NONE);
+		if (res)
+			WARNING("encryption couldn't be enabled (%08X)", res);
+	}
+	TRACE2("key %d: " MACSTRSEP, index, MAC2STR(key));
+	res = mp_set(wnd, OID_802_11_ADD_WEP, &ndis_key, sizeof(ndis_key));
+	if (res) {
+		WARNING("adding encryption key %d failed (%08X)",
+			index+1, res);
+		EXIT2(return -EINVAL);
+	}
+
+	/* Atheros driver messes up ndis_key during ADD_WEP, so
+	 * don't rely on that; instead use info in key and key_len */
+	wnd->encr_info.keys[index].length = key_len;
+	memcpy(&wnd->encr_info.keys[index].key, key, key_len);
+
+	EXIT2(return 0);
+}
+
+/* remove_key is for both wep and wpa */
+static int remove_key(struct ndis_device *wnd, int index,
+		      mac_address bssid)
+{
+	NDIS_STATUS res;
+	if (wnd->encr_info.keys[index].length == 0)
+		EXIT2(return 0);
+	wnd->encr_info.keys[index].length = 0;
+	memset(&wnd->encr_info.keys[index].key, 0,
+	       sizeof(wnd->encr_info.keys[index].length));
+	if (wnd->iw_auth_cipher_pairwise == IW_AUTH_CIPHER_TKIP ||
+	    wnd->iw_auth_cipher_pairwise == IW_AUTH_CIPHER_CCMP ||
+	    wnd->iw_auth_cipher_group == IW_AUTH_CIPHER_TKIP ||
+	    wnd->iw_auth_cipher_group == IW_AUTH_CIPHER_CCMP) {
+		struct ndis_remove_key remove_key;
+		remove_key.struct_size = sizeof(remove_key);
+		remove_key.index = index;
+		if (bssid) {
+			/* pairwise key */
+			if (memcmp(bssid, "\xff\xff\xff\xff\xff\xff",
+				   ETH_ALEN) != 0)
+				remove_key.index |= (1 << 30);
+			memcpy(remove_key.bssid, bssid,
+			       sizeof(remove_key.bssid));
+		} else
+			memset(remove_key.bssid, 0xff,
+			       sizeof(remove_key.bssid));
+		if (mp_set(wnd, OID_802_11_REMOVE_KEY,
+			   &remove_key, sizeof(remove_key)))
+			EXIT2(return -EINVAL);
+	} else {
+		ndis_key_index keyindex = index;
+		res = mp_set_int(wnd, OID_802_11_REMOVE_WEP, keyindex);
+		if (res) {
+			WARNING("removing encryption key %d failed (%08X)",
+				keyindex, res);
+			EXIT2(return -EINVAL);
+		}
+	}
+	/* if it is transmit key, disable encryption */
+	if (index == wnd->encr_info.tx_key_index) {
+		res = set_iw_encr_mode(wnd, IW_AUTH_CIPHER_NONE,
+				       IW_AUTH_CIPHER_NONE);
+		if (res)
+			WARNING("changing encr status failed (%08X)", res);
+	}
+	TRACE2("key %d removed", index);
+	EXIT2(return 0);
+}
+
+static int iw_set_wep(struct net_device *dev, struct iw_request_info *info,
+		      union iwreq_data *wrqu, char *extra)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	NDIS_STATUS res;
+	unsigned int index, key_len;
+	struct encr_info *encr_info = &wnd->encr_info;
+	unsigned char *key;
+
+	ENTER2("");
+	index = (wrqu->encoding.flags & IW_ENCODE_INDEX);
+	TRACE2("index = %u", index);
+
+	/* iwconfig gives index as 1 - N */
+	if (index > 0)
+		index--;
+	else
+		index = encr_info->tx_key_index;
+
+	if (index < 0 || index >= MAX_ENCR_KEYS) {
+		WARNING("encryption index out of range (%u)", index);
+		EXIT2(return -EINVAL);
+	}
+
+	/* remove key if disabled */
+	if (wrqu->data.flags & IW_ENCODE_DISABLED) {
+		if (remove_key(wnd, index, NULL))
+			EXIT2(return -EINVAL);
+		else
+			EXIT2(return 0);
+	}
+
+	/* global encryption state (for all keys) */
+	if (wrqu->data.flags & IW_ENCODE_OPEN)
+		res = set_ndis_auth_mode(wnd, Ndis802_11AuthModeOpen);
+	else // if (wrqu->data.flags & IW_ENCODE_RESTRICTED)
+		res = set_ndis_auth_mode(wnd, Ndis802_11AuthModeShared);
+	if (res) {
+		WARNING("setting authentication mode failed (%08X)", res);
+		EXIT2(return -EINVAL);
+	}
+
+	TRACE2("key length: %d", wrqu->data.length);
+
+	if (wrqu->data.length > 0) {
+		key_len = wrqu->data.length;
+		key = extra;
+	} else { // must be set as tx key
+		if (encr_info->keys[index].length == 0) {
+			WARNING("key %d is not set", index+1);
+			EXIT2(return -EINVAL);
+		}
+		key_len = encr_info->keys[index].length;
+		key = encr_info->keys[index].key;
+		encr_info->tx_key_index = index;
+	}
+
+	if (add_wep_key(wnd, key, key_len, index))
+		EXIT2(return -EINVAL);
+
+	if (index == encr_info->tx_key_index) {
+		/* if transmit key is at index other than 0, some
+		 * drivers, at least Atheros and TI, want another
+		 * (global) non-transmit key to be set; don't know why */
+		if (index != 0) {
+			int i;
+			for (i = 0; i < MAX_ENCR_KEYS; i++)
+				if (i != index &&
+				    encr_info->keys[i].length != 0)
+					break;
+			if (i == MAX_ENCR_KEYS) {
+				if (index == 0)
+					i = index + 1;
+				else
+					i = index - 1;
+				if (add_wep_key(wnd, key, key_len, i))
+					WARNING("couldn't add broadcast key"
+						" at %d", i);
+			}
+		}
+		/* ndis drivers want essid to be set after setting encr */
+		set_essid(wnd, wnd->essid.essid, wnd->essid.length);
+	}
+	EXIT2(return 0);
+}
+
+static int iw_set_nick(struct net_device *dev, struct iw_request_info *info,
+		       union iwreq_data *wrqu, char *extra)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+
+	if (wrqu->data.length >= IW_ESSID_MAX_SIZE || wrqu->data.length <= 0)
+		return -EINVAL;
+	memcpy(wnd->nick, extra, wrqu->data.length);
+	wnd->nick[wrqu->data.length] = 0;
+	return 0;
+}
+
+static int iw_get_nick(struct net_device *dev, struct iw_request_info *info,
+		       union iwreq_data *wrqu, char *extra)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+
+	wrqu->data.length = strlen(wnd->nick);
+	memcpy(extra, wnd->nick, wrqu->data.length);
+	return 0;
+}
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 27) && !defined(IW_REQUEST_FLAG_COMPAT)
+#define	iwe_stream_add_event(a, b, c, d, e)	iwe_stream_add_event(b, c, d, e)
+#define	iwe_stream_add_point(a, b, c, d, e)	iwe_stream_add_point(b, c, d, e)
+#define	iwe_stream_add_value(a, b, c, d, e, f)	\
+	iwe_stream_add_value(b, c, d, e, f)
+#define	iwe_stream_lcp_len(a)			IW_EV_LCP_LEN
+#endif
+
+static char *ndis_translate_scan(struct net_device *dev,
+				 struct iw_request_info *info, char *event,
+				 char *end_buf, void *item)
+{
+	struct iw_event iwe;
+	char *current_val;
+	int i, nrates;
+	unsigned char buf[MAX_WPA_IE_LEN * 2 + 30];
+	struct ndis_wlan_bssid *bssid;
+	struct ndis_wlan_bssid_ex *bssid_ex;
+
+	ENTER2("%p, %p", event, item);
+	bssid = item;
+	bssid_ex = item;
+	/* add mac address */
+	memset(&iwe, 0, sizeof(iwe));
+	iwe.cmd = SIOCGIWAP;
+	iwe.u.ap_addr.sa_family = ARPHRD_ETHER;
+	iwe.len = IW_EV_ADDR_LEN;
+	memcpy(iwe.u.ap_addr.sa_data, bssid->mac, ETH_ALEN);
+	event = iwe_stream_add_event(info, event, end_buf, &iwe,
+				     IW_EV_ADDR_LEN);
+
+	/* add essid */
+	memset(&iwe, 0, sizeof(iwe));
+	iwe.cmd = SIOCGIWESSID;
+	iwe.u.data.length = bssid->ssid.length;
+	if (iwe.u.data.length > IW_ESSID_MAX_SIZE)
+		iwe.u.data.length = IW_ESSID_MAX_SIZE;
+	iwe.u.data.flags = 1;
+	iwe.len = IW_EV_POINT_LEN + iwe.u.data.length;
+	event = iwe_stream_add_point(info, event, end_buf, &iwe,
+				     bssid->ssid.essid);
+
+	/* add protocol name */
+	memset(&iwe, 0, sizeof(iwe));
+	iwe.cmd = SIOCGIWNAME;
+	strncpy(iwe.u.name, network_type_to_name(bssid->net_type), IFNAMSIZ);
+	event = iwe_stream_add_event(info, event, end_buf, &iwe,
+				     IW_EV_CHAR_LEN);
+
+	/* add mode */
+	memset(&iwe, 0, sizeof(iwe));
+	iwe.cmd = SIOCGIWMODE;
+	if (bssid->mode == Ndis802_11IBSS)
+		iwe.u.mode = IW_MODE_ADHOC;
+	else if (bssid->mode == Ndis802_11Infrastructure)
+		iwe.u.mode = IW_MODE_INFRA;
+	else // if (bssid->mode == Ndis802_11AutoUnknown)
+		iwe.u.mode = IW_MODE_AUTO;
+	event = iwe_stream_add_event(info, event, end_buf, &iwe,
+				     IW_EV_UINT_LEN);
+
+	/* add freq */
+	memset(&iwe, 0, sizeof(iwe));
+	iwe.cmd = SIOCGIWFREQ;
+	iwe.u.freq.m = bssid->config.ds_config;
+	if (bssid->config.ds_config > 1000000) {
+		iwe.u.freq.m = bssid->config.ds_config / 10;
+		iwe.u.freq.e = 1;
+	}
+	else
+		iwe.u.freq.m = bssid->config.ds_config;
+	/* convert from kHz to Hz */
+	iwe.u.freq.e += 3;
+	iwe.len = IW_EV_FREQ_LEN;
+	event = iwe_stream_add_event(info, event, end_buf, &iwe,
+				     IW_EV_FREQ_LEN);
+
+	/* add qual */
+	memset(&iwe, 0, sizeof(iwe));
+	iwe.cmd = IWEVQUAL;
+	i = 100 * (bssid->rssi - WL_NOISE) / (WL_SIGMAX - WL_NOISE);
+	if (i < 0)
+		i = 0;
+	else if (i > 100)
+		i = 100;
+	iwe.u.qual.level = bssid->rssi;
+	iwe.u.qual.noise = WL_NOISE;
+	iwe.u.qual.qual  = i;
+	iwe.len = IW_EV_QUAL_LEN;
+	event = iwe_stream_add_event(info, event, end_buf, &iwe,
+				     IW_EV_QUAL_LEN);
+
+	/* add key info */
+	memset(&iwe, 0, sizeof(iwe));
+	iwe.cmd = SIOCGIWENCODE;
+	if (bssid->privacy == Ndis802_11PrivFilterAcceptAll)
+		iwe.u.data.flags = IW_ENCODE_DISABLED;
+	else
+		iwe.u.data.flags = IW_ENCODE_ENABLED | IW_ENCODE_NOKEY;
+	iwe.u.data.length = 0;
+	iwe.len = IW_EV_POINT_LEN;
+	event = iwe_stream_add_point(info, event, end_buf, &iwe,
+				     bssid->ssid.essid);
+
+	/* add rate */
+	memset(&iwe, 0, sizeof(iwe));
+	current_val = event + iwe_stream_lcp_len(info);
+	iwe.cmd = SIOCGIWRATE;
+	if (bssid->length > sizeof(*bssid))
+		nrates = NDIS_MAX_RATES_EX;
+	else
+		nrates = NDIS_MAX_RATES;
+	for (i = 0 ; i < nrates ; i++) {
+		if (bssid->rates[i] & 0x7f) {
+			iwe.u.bitrate.value = ((bssid->rates[i] & 0x7f) *
+					       500000);
+			current_val = iwe_stream_add_value(info, event,
+							   current_val,
+							   end_buf, &iwe,
+							   IW_EV_PARAM_LEN);
+		}
+	}
+
+	if ((current_val - event) > iwe_stream_lcp_len(info))
+		event = current_val;
+
+	memset(&iwe, 0, sizeof(iwe));
+	iwe.cmd = IWEVCUSTOM;
+	sprintf(buf, "bcn_int=%d", bssid->config.beacon_period);
+	iwe.u.data.length = strlen(buf);
+	event = iwe_stream_add_point(info, event, end_buf, &iwe, buf);
+
+	memset(&iwe, 0, sizeof(iwe));
+	iwe.cmd = IWEVCUSTOM;
+	sprintf(buf, "atim=%u", bssid->config.atim_window);
+	iwe.u.data.length = strlen(buf);
+	event = iwe_stream_add_point(info, event, end_buf, &iwe, buf);
+
+	TRACE2("%d, %u", bssid->length, (unsigned int)sizeof(*bssid));
+	if (bssid->length > sizeof(*bssid)) {
+		unsigned char *iep = (unsigned char *)bssid_ex->ies +
+			sizeof(struct ndis_fixed_ies);
+		no_warn_unused unsigned char *end = iep + bssid_ex->ie_length;
+
+		while (iep + 1 < end && iep + 2 + iep[1] <= end) {
+			unsigned char ielen = 2 + iep[1];
+
+			if (ielen > SSID_MAX_WPA_IE_LEN) {
+				iep += ielen;
+				continue;
+			}
+			if ((iep[0] == WLAN_EID_GENERIC && iep[1] >= 4 &&
+			     memcmp(iep + 2, "\x00\x50\xf2\x01", 4) == 0) ||
+			    iep[0] == RSN_INFO_ELEM) {
+				memset(&iwe, 0, sizeof(iwe));
+				iwe.cmd = IWEVGENIE;
+				iwe.u.data.length = ielen;
+				event = iwe_stream_add_point(info, event,
+							     end_buf, &iwe,
+							     iep);
+			}
+			iep += ielen;
+		}
+	}
+	TRACE2("event = %p, current_val = %p", event, current_val);
+	EXIT2(return event);
+}
+
+int set_scan(struct ndis_device *wnd)
+{
+	NDIS_STATUS res;
+
+	ENTER2("");
+	res = mp_set(wnd, OID_802_11_BSSID_LIST_SCAN, NULL, 0);
+	if (res) {
+		WARNING("scanning failed (%08X)", res);
+		EXIT2(return -EOPNOTSUPP);
+	}
+	wnd->scan_timestamp = jiffies;
+	EXIT2(return 0);
+}
+
+static int iw_set_scan(struct net_device *dev, struct iw_request_info *info,
+		       union iwreq_data *wrqu, char *extra)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	return set_scan(wnd);
+}
+
+static int iw_get_scan(struct net_device *dev, struct iw_request_info *info,
+		       union iwreq_data *wrqu, char *extra)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	unsigned int i, list_len, needed;
+	NDIS_STATUS res;
+	struct ndis_bssid_list *bssid_list = NULL;
+	char *event = extra;
+	struct ndis_wlan_bssid *cur_item ;
+
+	ENTER2("");
+	if (time_before(jiffies, wnd->scan_timestamp + 3 * HZ))
+		return -EAGAIN;
+	/* try with space for a few scan items */
+	list_len = sizeof(ULONG) + sizeof(struct ndis_wlan_bssid_ex) * 8;
+	bssid_list = kmalloc(list_len, GFP_KERNEL);
+	if (!bssid_list) {
+		ERROR("couldn't allocate memory");
+		return -ENOMEM;
+	}
+	/* some drivers don't set bssid_list->num_items to 0 if
+	   OID_802_11_BSSID_LIST returns no items (prism54 driver, e.g.,) */
+	memset(bssid_list, 0, list_len);
+
+	needed = 0;
+	res = mp_query_info(wnd, OID_802_11_BSSID_LIST,
+			    bssid_list, list_len, NULL, &needed);
+	if (res == NDIS_STATUS_INVALID_LENGTH ||
+	    res == NDIS_STATUS_BUFFER_TOO_SHORT) {
+		/* now try with required space */
+		kfree(bssid_list);
+		list_len = needed;
+		bssid_list = kmalloc(list_len, GFP_KERNEL);
+		if (!bssid_list) {
+			ERROR("couldn't allocate memory");
+			return -ENOMEM;
+		}
+		memset(bssid_list, 0, list_len);
+
+		res = mp_query(wnd, OID_802_11_BSSID_LIST,
+			       bssid_list, list_len);
+	}
+	if (res) {
+		WARNING("getting BSSID list failed (%08X)", res);
+		kfree(bssid_list);
+		EXIT2(return -EOPNOTSUPP);
+	}
+	TRACE2("%d", bssid_list->num_items);
+	cur_item = &bssid_list->bssid[0];
+	for (i = 0; i < bssid_list->num_items; i++) {
+		event = ndis_translate_scan(dev, info, event,
+					    extra + IW_SCAN_MAX_DATA, cur_item);
+		cur_item = (struct ndis_wlan_bssid *)((char *)cur_item +
+						      cur_item->length);
+	}
+	wrqu->data.length = event - extra;
+	wrqu->data.flags = 0;
+	kfree(bssid_list);
+	EXIT2(return 0);
+}
+
+static int iw_set_power_mode(struct net_device *dev,
+			     struct iw_request_info *info,
+			     union iwreq_data *wrqu, char *extra)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	NDIS_STATUS res;
+	ULONG power_mode;
+
+	if (wrqu->power.disabled == 1)
+		power_mode = NDIS_POWER_OFF;
+	else if (wrqu->power.flags & IW_POWER_MIN)
+		power_mode = NDIS_POWER_MIN;
+	else // if (wrqu->power.flags & IW_POWER_MAX)
+		power_mode = NDIS_POWER_MAX;
+
+	TRACE2("%d", power_mode);
+	res = mp_set(wnd, OID_802_11_POWER_MODE,
+		     &power_mode, sizeof(power_mode));
+	if (res)
+		WARNING("setting power mode failed (%08X)", res);
+	return 0;
+}
+
+static int iw_get_power_mode(struct net_device *dev,
+			     struct iw_request_info *info,
+			     union iwreq_data *wrqu, char *extra)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	NDIS_STATUS res;
+	ULONG power_mode;
+
+	ENTER2("");
+	res = mp_query(wnd, OID_802_11_POWER_MODE,
+		       &power_mode, sizeof(power_mode));
+	if (res)
+		return -ENOTSUPP;
+
+	if (power_mode == NDIS_POWER_OFF)
+		wrqu->power.disabled = 1;
+	else {
+		if (wrqu->power.flags != 0)
+			return 0;
+		wrqu->power.flags |= IW_POWER_ALL_R;
+		wrqu->power.flags |= IW_POWER_TIMEOUT;
+		wrqu->power.value = 0;
+		wrqu->power.disabled = 0;
+
+		if (power_mode == NDIS_POWER_MIN)
+			wrqu->power.flags |= IW_POWER_MIN;
+		else // if (power_mode == NDIS_POWER_MAX)
+			wrqu->power.flags |= IW_POWER_MAX;
+	}
+	return 0;
+}
+
+static int iw_get_sensitivity(struct net_device *dev,
+			      struct iw_request_info *info,
+			      union iwreq_data *wrqu, char *extra)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	NDIS_STATUS res;
+	ndis_rssi rssi_trigger;
+
+	ENTER2("");
+	res = mp_query(wnd, OID_802_11_RSSI_TRIGGER,
+		       &rssi_trigger, sizeof(rssi_trigger));
+	if (res)
+		return -EOPNOTSUPP;
+	wrqu->param.value = rssi_trigger;
+	wrqu->param.disabled = (rssi_trigger == 0);
+	wrqu->param.fixed = 1;
+	return 0;
+}
+
+static int iw_set_sensitivity(struct net_device *dev,
+			      struct iw_request_info *info,
+			      union iwreq_data *wrqu, char *extra)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	NDIS_STATUS res;
+	ndis_rssi rssi_trigger;
+
+	ENTER2("");
+	if (wrqu->param.disabled)
+		rssi_trigger = 0;
+	else
+		rssi_trigger = wrqu->param.value;
+	res = mp_set(wnd, OID_802_11_RSSI_TRIGGER,
+		     &rssi_trigger, sizeof(rssi_trigger));
+	if (res == NDIS_STATUS_INVALID_DATA)
+		return -EINVAL;
+	if (res)
+		return -EOPNOTSUPP;
+	return 0;
+}
+
+static int iw_get_ndis_stats(struct net_device *dev,
+			     struct iw_request_info *info,
+			     union iwreq_data *wrqu, char *extra)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	struct iw_statistics *stats = &wnd->iw_stats;
+	memcpy(&wrqu->qual, &stats->qual, sizeof(stats->qual));
+	return 0;
+}
+
+static int iw_get_range(struct net_device *dev, struct iw_request_info *info,
+			union iwreq_data *wrqu, char *extra)
+{
+	struct iw_range *range = (struct iw_range *)extra;
+	struct iw_point *data = &wrqu->data;
+	struct ndis_device *wnd = netdev_priv(dev);
+	unsigned int i, n;
+	NDIS_STATUS res;
+	ndis_rates_ex rates;
+	ndis_tx_power_level tx_power;
+
+	ENTER2("");
+	data->length = sizeof(struct iw_range);
+	memset(range, 0, sizeof(struct iw_range));
+
+	range->txpower_capa = IW_TXPOW_MWATT;
+	range->num_txpower = 0;
+
+	res = mp_query(wnd, OID_802_11_TX_POWER_LEVEL,
+		       &tx_power, sizeof(tx_power));
+	if (!res) {
+		range->num_txpower = 1;
+		range->txpower[0] = tx_power;
+	}
+
+	range->we_version_compiled = WIRELESS_EXT;
+	range->we_version_source = 18;
+
+	range->retry_capa = IW_RETRY_LIMIT;
+	range->retry_flags = IW_RETRY_LIMIT;
+	range->min_retry = 0;
+	range->max_retry = 255;
+
+	range->num_channels = 1;
+
+	range->max_qual.qual = 100;
+	range->max_qual.level = 154;
+	range->max_qual.noise = 154;
+	range->sensitivity = 3;
+
+	range->max_encoding_tokens = 4;
+	range->num_encoding_sizes = 2;
+	range->encoding_size[0] = 5;
+	range->encoding_size[1] = 13;
+
+	range->num_bitrates = 0;
+	memset(&rates, 0, sizeof(rates));
+	res = mp_query_info(wnd, OID_802_11_SUPPORTED_RATES,
+			    &rates, sizeof(rates), &n, NULL);
+	if (res)
+		WARNING("getting bit rates failed: %08X", res);
+	else {
+		for (i = 0; i < n && range->num_bitrates < IW_MAX_BITRATES; i++)
+			if (rates[i] & 0x80)
+				continue;
+			else if (rates[i] & 0x7f) {
+				range->bitrate[range->num_bitrates] =
+					(rates[i] & 0x7f) * 500000;
+				range->num_bitrates++;
+			}
+	}
+
+	range->num_channels = (sizeof(freq_chan)/sizeof(freq_chan[0]));
+
+	for (i = 0; i < (sizeof(freq_chan)/sizeof(freq_chan[0])) &&
+		    i < IW_MAX_FREQUENCIES; i++) {
+		range->freq[i].i = i + 1;
+		range->freq[i].m = freq_chan[i] * 100000;
+		range->freq[i].e = 1;
+	}
+	range->num_frequency = i;
+
+	range->min_rts = 0;
+	range->max_rts = 2347;
+	range->min_frag = 256;
+	range->max_frag = 2346;
+
+	/* Event capability (kernel + driver) */
+	range->event_capa[0] = (IW_EVENT_CAPA_K_0 |
+				IW_EVENT_CAPA_MASK(SIOCGIWTHRSPY) |
+				IW_EVENT_CAPA_MASK(SIOCGIWAP) |
+				IW_EVENT_CAPA_MASK(SIOCGIWSCAN));
+	range->event_capa[1] = IW_EVENT_CAPA_K_1;
+	range->event_capa[4] = (IW_EVENT_CAPA_MASK(IWEVTXDROP) |
+				IW_EVENT_CAPA_MASK(IWEVCUSTOM) |
+				IW_EVENT_CAPA_MASK(IWEVREGISTERED) |
+				IW_EVENT_CAPA_MASK(IWEVEXPIRED));
+
+	range->enc_capa = 0;
+
+	if (test_bit(Ndis802_11Encryption2Enabled, &wnd->capa.encr))
+		range->enc_capa |= IW_ENC_CAPA_CIPHER_TKIP;
+	if (test_bit(Ndis802_11Encryption3Enabled, &wnd->capa.encr))
+		range->enc_capa |= IW_ENC_CAPA_CIPHER_CCMP;
+
+	if (test_bit(Ndis802_11AuthModeWPA, &wnd->capa.auth) ||
+	    test_bit(Ndis802_11AuthModeWPAPSK, &wnd->capa.auth))
+		range->enc_capa |= IW_ENC_CAPA_WPA;
+	if (test_bit(Ndis802_11AuthModeWPA2, &wnd->capa.auth) ||
+	    test_bit(Ndis802_11AuthModeWPA2PSK, &wnd->capa.auth))
+		range->enc_capa |= IW_ENC_CAPA_WPA2;
+
+	return 0;
+}
+
+void set_default_iw_params(struct ndis_device *wnd)
+{
+	wnd->iw_auth_key_mgmt = 0;
+	wnd->iw_auth_wpa_version = 0;
+	set_infra_mode(wnd, Ndis802_11Infrastructure);
+	set_ndis_auth_mode(wnd, Ndis802_11AuthModeOpen);
+	set_priv_filter(wnd);
+	set_iw_encr_mode(wnd, IW_AUTH_CIPHER_NONE, IW_AUTH_CIPHER_NONE);
+}
+
+static int deauthenticate(struct ndis_device *wnd)
+{
+	int ret;
+
+	ENTER2("");
+	ret = disassociate(wnd, 1);
+	set_default_iw_params(wnd);
+	EXIT2(return ret);
+}
+
+NDIS_STATUS disassociate(struct ndis_device *wnd, int reset_ssid)
+{
+	NDIS_STATUS res;
+	u8 buf[NDIS_ESSID_MAX_SIZE];
+	int i;
+
+	TRACE2("");
+	res = mp_set(wnd, OID_802_11_DISASSOCIATE, NULL, 0);
+	/* disassociate causes radio to be turned off; if reset_ssid
+	 * is given, set ssid to random to enable radio */
+	if (reset_ssid) {
+		get_random_bytes(buf, sizeof(buf));
+		for (i = 0; i < sizeof(buf); i++)
+			buf[i] = 'a' + (buf[i] % 26);
+		set_essid(wnd, buf, sizeof(buf));
+	}
+	return res;
+}
+
+static ULONG ndis_priv_mode(struct ndis_device *wnd)
+{
+	if (wnd->iw_auth_wpa_version & IW_AUTH_WPA_VERSION_WPA2 ||
+	    wnd->iw_auth_wpa_version & IW_AUTH_WPA_VERSION_WPA)
+		return Ndis802_11PrivFilter8021xWEP;
+	else
+		return Ndis802_11PrivFilterAcceptAll;
+}
+
+int set_priv_filter(struct ndis_device *wnd)
+{
+	NDIS_STATUS res;
+	ULONG flags;
+
+	flags = ndis_priv_mode(wnd);
+	ENTER2("filter: %d", flags);
+	res = mp_set_int(wnd, OID_802_11_PRIVACY_FILTER, flags);
+	if (res)
+		TRACE2("setting privacy filter to %d failed (%08X)",
+		       flags, res);
+	EXIT2(return 0);
+}
+
+static int iw_set_mlme(struct net_device *dev, struct iw_request_info *info,
+		       union iwreq_data *wrqu, char *extra)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	struct iw_mlme *mlme = (struct iw_mlme *)extra;
+
+	ENTER2("");
+	switch (mlme->cmd) {
+	case IW_MLME_DEAUTH:
+		return deauthenticate(wnd);
+	case IW_MLME_DISASSOC:
+		TRACE2("cmd=%d reason_code=%d", mlme->cmd, mlme->reason_code);
+		return disassociate(wnd, 1);
+	default:
+		return -EOPNOTSUPP;
+	}
+
+	return 0;
+}
+
+static int iw_set_genie(struct net_device *dev,
+			struct iw_request_info *info,
+			union iwreq_data *wrqu, char *extra)
+{
+	/*
+	 * NDIS drivers do not allow IEs to be configured; this is
+	 * done by the driver based on other configuration. Return 0
+	 * to avoid causing issues with user space programs that
+	 * expect this function to succeed.
+	 */
+	return 0;
+}
+
+static int iw_set_auth(struct net_device *dev,
+		       struct iw_request_info *info,
+		       union iwreq_data *wrqu, char *extra)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	TRACE2("index=%d value=%d", wrqu->param.flags & IW_AUTH_INDEX,
+	       wrqu->param.value);
+	switch (wrqu->param.flags & IW_AUTH_INDEX) {
+	case IW_AUTH_WPA_VERSION:
+		wnd->iw_auth_wpa_version = wrqu->param.value;
+		break;
+	case IW_AUTH_CIPHER_PAIRWISE:
+		wnd->iw_auth_cipher_pairwise = wrqu->param.value;
+		break;
+	case IW_AUTH_CIPHER_GROUP:
+		wnd->iw_auth_cipher_group = wrqu->param.value;
+		break;
+	case IW_AUTH_KEY_MGMT:
+		wnd->iw_auth_key_mgmt = wrqu->param.value;
+		break;
+	case IW_AUTH_80211_AUTH_ALG:
+		wnd->iw_auth_80211_alg = wrqu->param.value;
+		break;
+	case IW_AUTH_WPA_ENABLED:
+		if (wrqu->param.value)
+			deauthenticate(wnd);
+		break;
+	case IW_AUTH_TKIP_COUNTERMEASURES:
+	case IW_AUTH_DROP_UNENCRYPTED:
+	case IW_AUTH_RX_UNENCRYPTED_EAPOL:
+	case IW_AUTH_PRIVACY_INVOKED:
+		TRACE2("%d not implemented: %d",
+		       wrqu->param.flags & IW_AUTH_INDEX, wrqu->param.value);
+		break;
+	default:
+		WARNING("invalid cmd %d", wrqu->param.flags & IW_AUTH_INDEX);
+		return -EOPNOTSUPP;
+	}
+	return 0;
+}
+
+static int iw_get_auth(struct net_device *dev,
+		       struct iw_request_info *info,
+		       union iwreq_data *wrqu, char *extra)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+
+	ENTER2("index=%d", wrqu->param.flags & IW_AUTH_INDEX);
+	switch (wrqu->param.flags & IW_AUTH_INDEX) {
+	case IW_AUTH_WPA_VERSION:
+		wrqu->param.value = wnd->iw_auth_wpa_version;
+		break;
+	case IW_AUTH_CIPHER_PAIRWISE:
+		wrqu->param.value = wnd->iw_auth_cipher_pairwise;
+		break;
+	case IW_AUTH_CIPHER_GROUP:
+		wrqu->param.value = wnd->iw_auth_cipher_group;
+		break;
+	case IW_AUTH_KEY_MGMT:
+		wrqu->param.value = wnd->iw_auth_key_mgmt;
+		break;
+	case IW_AUTH_80211_AUTH_ALG:
+		wrqu->param.value = wnd->iw_auth_80211_alg;
+		break;
+	default:
+		WARNING("invalid cmd %d", wrqu->param.flags & IW_AUTH_INDEX);
+		return -EOPNOTSUPP;
+	}
+	return 0;
+}
+
+static int iw_set_encodeext(struct net_device *dev,
+			    struct iw_request_info *info,
+			    union iwreq_data *wrqu, char *extra)
+{
+	struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
+	struct ndis_device *wnd = netdev_priv(dev);
+	struct ndis_add_key ndis_key;
+	int i, keyidx;
+	NDIS_STATUS res;
+	u8 *addr;
+
+	keyidx = wrqu->encoding.flags & IW_ENCODE_INDEX;
+	ENTER2("%d", keyidx);
+	if (keyidx)
+		keyidx--;
+	else
+		keyidx = wnd->encr_info.tx_key_index;
+
+	if (keyidx < 0 || keyidx >= MAX_ENCR_KEYS)
+		return -EINVAL;
+
+	if (ext->alg == WPA_ALG_WEP) {
+		if (!test_bit(Ndis802_11Encryption1Enabled, &wnd->capa.encr))
+			EXIT2(return -1);
+		if (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY)
+			wnd->encr_info.tx_key_index = keyidx;
+		if (add_wep_key(wnd, ext->key, ext->key_len, keyidx))
+			EXIT2(return -1);
+		else
+			EXIT2(return 0);
+	}
+	if ((wrqu->encoding.flags & IW_ENCODE_DISABLED) ||
+	    ext->alg == IW_ENCODE_ALG_NONE || ext->key_len == 0)
+		EXIT2(return remove_key(wnd, keyidx, ndis_key.bssid));
+
+	if (ext->key_len > sizeof(ndis_key.key)) {
+		TRACE2("incorrect key length (%u)", ext->key_len);
+		EXIT2(return -1);
+	}
+
+	memset(&ndis_key, 0, sizeof(ndis_key));
+
+	ndis_key.struct_size =
+		sizeof(ndis_key) - sizeof(ndis_key.key) + ext->key_len;
+	ndis_key.length = ext->key_len;
+	ndis_key.index = keyidx;
+
+	if (ext->ext_flags & IW_ENCODE_EXT_RX_SEQ_VALID) {
+		for (i = 0; i < 6 ; i++)
+			ndis_key.rsc |= (((u64)ext->rx_seq[i]) << (i * 8));
+		TRACE2("0x%Lx", ndis_key.rsc);
+		ndis_key.index |= 1 << 29;
+	}
+
+	addr = ext->addr.sa_data;
+	if (ext->ext_flags & IW_ENCODE_EXT_GROUP_KEY) {
+		/* group key */
+		if (wnd->infrastructure_mode == Ndis802_11IBSS)
+			memset(ndis_key.bssid, 0xff, ETH_ALEN);
+		else
+			get_ap_address(wnd, ndis_key.bssid);
+	} else {
+		/* pairwise key */
+		ndis_key.index |= (1 << 30);
+		memcpy(ndis_key.bssid, addr, ETH_ALEN);
+	}
+	TRACE2(MACSTRSEP, MAC2STR(ndis_key.bssid));
+
+	if (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY)
+		ndis_key.index |= (1 << 31);
+
+	if (ext->alg == IW_ENCODE_ALG_TKIP && ext->key_len == 32) {
+		/* wpa_supplicant gives us the Michael MIC RX/TX keys in
+		 * different order than NDIS spec, so swap the order here. */
+		memcpy(ndis_key.key, ext->key, 16);
+		memcpy(ndis_key.key + 16, ext->key + 24, 8);
+		memcpy(ndis_key.key + 24, ext->key + 16, 8);
+	} else
+		memcpy(ndis_key.key, ext->key, ext->key_len);
+
+	res = mp_set(wnd, OID_802_11_ADD_KEY, &ndis_key, ndis_key.struct_size);
+	if (res) {
+		TRACE2("adding key failed (%08X), %u",
+		       res, ndis_key.struct_size);
+		EXIT2(return -1);
+	}
+	wnd->encr_info.keys[keyidx].length = ext->key_len;
+	memcpy(&wnd->encr_info.keys[keyidx].key, ndis_key.key, ext->key_len);
+	if (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY)
+		wnd->encr_info.tx_key_index = keyidx;
+	TRACE2("key %d added", keyidx);
+
+	EXIT2(return 0);
+}
+
+static int iw_get_encodeext(struct net_device *dev,
+			    struct iw_request_info *info,
+			    union iwreq_data *wrqu, char *extra)
+{
+	/* struct iw_encode_ext *ext = (struct iw_encode_ext *) extra; */
+	/* TODO */
+	ENTER2("");
+	return 0;
+}
+
+static int iw_set_pmksa(struct net_device *dev, struct iw_request_info *info,
+			union iwreq_data *wrqu, char *extra)
+{
+	struct iw_pmksa *pmksa = (struct iw_pmksa *)extra;
+	struct ndis_pmkid pmkid;
+	NDIS_STATUS res;
+	struct ndis_device *wnd = netdev_priv(dev);
+
+	/* TODO: must keep local list of PMKIDs since NDIS drivers
+	 * expect that all PMKID entries are included whenever a new
+	 * one is added. */
+
+	ENTER2("%d", pmksa->cmd);
+	if ((pmksa->cmd == IW_PMKSA_ADD || pmksa->cmd == IW_PMKSA_REMOVE) &&
+	    (!(wnd->iw_auth_wpa_version & IW_AUTH_WPA_VERSION_WPA2)))
+		EXIT2(return -EOPNOTSUPP);
+
+	memset(&pmkid, 0, sizeof(pmkid));
+	if (pmksa->cmd == IW_PMKSA_ADD) {
+		pmkid.bssid_info_count = 1;
+		memcpy(pmkid.bssid_info[0].bssid, pmksa->bssid.sa_data,
+		       ETH_ALEN);
+		memcpy(pmkid.bssid_info[0].pmkid, pmksa->pmkid, IW_PMKID_LEN);
+	}
+	pmkid.length = sizeof(pmkid);
+
+	res = mp_set(wnd, OID_802_11_PMKID, &pmkid, pmkid.length);
+	if (res == NDIS_STATUS_FAILURE)
+		EXIT2(return -EOPNOTSUPP);
+	TRACE2("OID_802_11_PMKID -> %d", res);
+	if (res)
+		return -EINVAL;
+
+	return 0;
+}
+
+#define WEXT(id) [id - SIOCIWFIRST]
+
+static const iw_handler	ndis_handler[] = {
+	WEXT(SIOCGIWNAME)	 = iw_get_network_type,
+	WEXT(SIOCSIWESSID)	 = iw_set_essid,
+	WEXT(SIOCGIWESSID)	 = iw_get_essid,
+	WEXT(SIOCSIWMODE)	 = iw_set_infra_mode,
+	WEXT(SIOCGIWMODE)	 = iw_get_infra_mode,
+	WEXT(SIOCGIWFREQ)	 = iw_get_freq,
+	WEXT(SIOCSIWFREQ)	 = iw_set_freq,
+	WEXT(SIOCGIWTXPOW)	 = iw_get_tx_power,
+	WEXT(SIOCSIWTXPOW)	 = iw_set_tx_power,
+	WEXT(SIOCGIWRATE)	 = iw_get_bitrate,
+	WEXT(SIOCSIWRATE)	 = iw_set_bitrate,
+	WEXT(SIOCGIWRTS)	 = iw_get_rts_threshold,
+	WEXT(SIOCSIWRTS)	 = iw_set_rts_threshold,
+	WEXT(SIOCGIWFRAG)	 = iw_get_frag_threshold,
+	WEXT(SIOCSIWFRAG)	 = iw_set_frag_threshold,
+	WEXT(SIOCGIWAP)		 = iw_get_ap_address,
+	WEXT(SIOCSIWAP)		 = iw_set_ap_address,
+	WEXT(SIOCSIWENCODE)	 = iw_set_wep,
+	WEXT(SIOCGIWENCODE)	 = iw_get_encr,
+	WEXT(SIOCSIWSCAN)	 = iw_set_scan,
+	WEXT(SIOCGIWSCAN)	 = iw_get_scan,
+	WEXT(SIOCGIWPOWER)	 = iw_get_power_mode,
+	WEXT(SIOCSIWPOWER)	 = iw_set_power_mode,
+	WEXT(SIOCGIWRANGE)	 = iw_get_range,
+	WEXT(SIOCGIWSTATS)	 = iw_get_ndis_stats,
+	WEXT(SIOCGIWSENS)	 = iw_get_sensitivity,
+	WEXT(SIOCSIWSENS)	 = iw_set_sensitivity,
+	WEXT(SIOCGIWNICKN)	 = iw_get_nick,
+	WEXT(SIOCSIWNICKN)	 = iw_set_nick,
+	WEXT(SIOCSIWCOMMIT)	 = iw_set_dummy,
+	WEXT(SIOCSIWMLME)	 = iw_set_mlme,
+	WEXT(SIOCSIWGENIE)	 = iw_set_genie,
+	WEXT(SIOCSIWAUTH)	 = iw_set_auth,
+	WEXT(SIOCGIWAUTH)	 = iw_get_auth,
+	WEXT(SIOCSIWENCODEEXT)	 = iw_set_encodeext,
+	WEXT(SIOCGIWENCODEEXT)	 = iw_get_encodeext,
+	WEXT(SIOCSIWPMKSA)	 = iw_set_pmksa,
+};
+
+/* private ioctl's */
+
+static int priv_reset(struct net_device *dev, struct iw_request_info *info,
+		      union iwreq_data *wrqu, char *extra)
+{
+	int res;
+	ENTER2("");
+	res = mp_reset(netdev_priv(dev));
+	if (res) {
+		WARNING("reset failed: %08X", res);
+		return -EOPNOTSUPP;
+	}
+	return 0;
+}
+
+static int priv_deauthenticate(struct net_device *dev,
+			       struct iw_request_info *info,
+			       union iwreq_data *wrqu, char *extra)
+{
+	int res;
+	ENTER2("");
+	res = deauthenticate(netdev_priv(dev));
+	return res;
+}
+
+static int priv_power_profile(struct net_device *dev,
+			      struct iw_request_info *info,
+			      union iwreq_data *wrqu, char *extra)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	struct miniport *mp;
+	ULONG profile_inf;
+
+	ENTER2("");
+	mp = &wnd->wd->driver->ndis_driver->mp;
+	if (!mp->pnp_event_notify)
+		EXIT2(return -EOPNOTSUPP);
+
+	/* 1 for AC and 0 for Battery */
+	if (wrqu->param.value)
+		profile_inf = NdisPowerProfileAcOnLine;
+	else
+		profile_inf = NdisPowerProfileBattery;
+
+	LIN2WIN4(mp->pnp_event_notify, wnd->nmb->mp_ctx,
+		 NdisDevicePnPEventPowerProfileChanged,
+		 &profile_inf, sizeof(profile_inf));
+	EXIT2(return 0);
+}
+
+static int priv_network_type(struct net_device *dev,
+			     struct iw_request_info *info,
+			     union iwreq_data *wrqu, char *extra)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	enum network_type network_type;
+	NDIS_STATUS res;
+	char type;
+
+	ENTER2("");
+	type = wrqu->param.value;
+	if (type == 'f')
+		network_type = Ndis802_11FH;
+	else if (type == 'b')
+		network_type = Ndis802_11DS;
+	else if (type == 'a')
+		network_type = Ndis802_11OFDM5;
+	else if (type == 'g' || type == 'n')
+		network_type = Ndis802_11OFDM24;
+	else
+		network_type = Ndis802_11Automode;
+
+	res = mp_set_int(wnd, OID_802_11_NETWORK_TYPE_IN_USE, network_type);
+	if (res) {
+		WARNING("setting network type to %d failed (%08X)",
+			network_type, res);
+		EXIT2(return -EINVAL);
+	}
+
+	EXIT2(return 0);
+}
+
+static int priv_media_stream_mode(struct net_device *dev,
+				  struct iw_request_info *info,
+				  union iwreq_data *wrqu, char *extra)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	NDIS_STATUS res;
+	int mode;
+
+	ENTER2("");
+	if (wrqu->param.value > 0)
+		mode = Ndis802_11MediaStreamOn;
+	else
+		mode = Ndis802_11MediaStreamOff;
+	res = mp_set_int(wnd, OID_802_11_MEDIA_STREAM_MODE, mode);
+	if (res) {
+		WARNING("oid failed (%08X)", res);
+		EXIT2(return -EINVAL);
+	}
+	EXIT2(return 0);
+}
+
+static int priv_reload_defaults(struct net_device *dev,
+				struct iw_request_info *info,
+				union iwreq_data *wrqu, char *extra)
+{
+	struct ndis_device *wnd = netdev_priv(dev);
+	int res;
+	ENTER2("");
+	res = mp_set_int(wnd, OID_802_11_RELOAD_DEFAULTS,
+			 Ndis802_11ReloadWEPKeys);
+	if (res) {
+		WARNING("reloading defaults failed: %08X", res);
+		return -EOPNOTSUPP;
+	}
+	return 0;
+}
+
+static const struct iw_priv_args priv_args[] = {
+	{PRIV_RESET, 0, 0, "ndis_reset"},
+	{PRIV_POWER_PROFILE, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0,
+	 "power_profile"},
+	{PRIV_DEAUTHENTICATE, 0, 0, "deauthenticate"},
+	{PRIV_NETWORK_TYPE, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | 1, 0,
+	 "network_type"},
+	{PRIV_MEDIA_STREAM_MODE, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0,
+	 "media_stream"},
+
+	{PRIV_RELOAD_DEFAULTS, 0, 0, "reload_defaults"},
+};
+
+#define WEPRIV(id) [id - SIOCIWFIRSTPRIV]
+
+static const iw_handler priv_handler[] = {
+	WEPRIV(PRIV_RESET)		 = priv_reset,
+	WEPRIV(PRIV_POWER_PROFILE)	 = priv_power_profile,
+	WEPRIV(PRIV_DEAUTHENTICATE)	 = priv_deauthenticate,
+	WEPRIV(PRIV_NETWORK_TYPE)	 = priv_network_type,
+	WEPRIV(PRIV_MEDIA_STREAM_MODE)	 = priv_media_stream_mode,
+	WEPRIV(PRIV_RELOAD_DEFAULTS)	 = priv_reload_defaults,
+};
+
+const struct iw_handler_def ndis_handler_def = {
+	.num_standard	= sizeof(ndis_handler) / sizeof(ndis_handler[0]),
+	.num_private	= sizeof(priv_handler) / sizeof(priv_handler[0]),
+	.num_private_args = sizeof(priv_args) / sizeof(priv_args[0]),
+
+	.standard	= (iw_handler *)ndis_handler,
+	.private	= (iw_handler *)priv_handler,
+	.private_args	= (struct iw_priv_args *)priv_args,
+	.get_wireless_stats = get_iw_stats,
+};
--- linux-mvl-dove-2.6.32.orig/ubuntu/ndiswrapper/iw_ndis.h
+++ linux-mvl-dove-2.6.32/ubuntu/ndiswrapper/iw_ndis.h
@@ -0,0 +1,208 @@
+/*
+ *  Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *  GNU General Public License for more details.
+ *
+ */
+
+#ifndef _IW_NDIS_H_
+#define _IW_NDIS_H_
+
+#include "ndis.h"
+
+#define	WL_NOISE	-96	/* typical noise level in dBm */
+#define	WL_SIGMAX	-32	/* typical maximum signal level in dBm */
+
+struct ndis_encr_key {
+	ULONG struct_size;
+	ULONG index;
+	ULONG length;
+	UCHAR key[NDIS_ENCODING_TOKEN_MAX];
+};
+
+struct ndis_add_key {
+	ULONG struct_size;
+	ndis_key_index index;
+	ULONG length;
+	mac_address bssid;
+	UCHAR pad[6];
+	ndis_key_rsc rsc;
+	UCHAR key[NDIS_ENCODING_TOKEN_MAX];
+};
+
+struct ndis_remove_key {
+	ULONG struct_size;
+	ndis_key_index index;
+	mac_address bssid;
+};
+
+struct ndis_fixed_ies {
+	UCHAR time_stamp[8];
+	USHORT beacon_interval;
+	USHORT capa;
+};
+
+struct ndis_variable_ies {
+	ULONG elem_id;
+	UCHAR length;
+	UCHAR data[1];
+};
+
+enum ndis_reload_defaults { Ndis802_11ReloadWEPKeys };
+
+struct ndis_assoc_info {
+	ULONG length;
+	USHORT req_ies;
+	struct req_ie {
+		USHORT capa;
+		USHORT listen_interval;
+		mac_address cur_ap_address;
+	} req_ie;
+	ULONG req_ie_length;
+	ULONG offset_req_ies;
+	USHORT resp_ies;
+	struct resp_ie {
+		USHORT capa;
+		USHORT status_code;
+		USHORT assoc_id;
+	} resp_ie;
+	ULONG resp_ie_length;
+	ULONG offset_resp_ies;
+};
+
+struct ndis_configuration_fh {
+	ULONG length;
+	ULONG hop_pattern;
+	ULONG hop_set;
+	ULONG dwell_time;
+};
+
+struct ndis_configuration {
+	ULONG length;
+	ULONG beacon_period;
+	ULONG atim_window;
+	ULONG ds_config;
+	struct ndis_configuration_fh fh_config;
+};
+
+struct ndis_wlan_bssid {
+	ULONG length;
+	mac_address mac;
+	UCHAR reserved[2];
+	struct ndis_essid ssid;
+	ULONG privacy;
+	ndis_rssi rssi;
+	UINT net_type;
+	struct ndis_configuration config;
+	UINT mode;
+	ndis_rates rates;
+};
+
+struct ndis_wlan_bssid_ex {
+	ULONG length;
+	mac_address mac;
+	UCHAR reserved[2];
+	struct ndis_essid ssid;
+	ULONG privacy;
+	ndis_rssi rssi;
+	UINT net_type;
+	struct ndis_configuration config;
+	UINT mode;
+	ndis_rates_ex rates_ex;
+	ULONG ie_length;
+	UCHAR ies[1];
+};
+
+/* we use bssid_list as bssid_list_ex also */
+struct ndis_bssid_list {
+	ULONG num_items;
+	struct ndis_wlan_bssid bssid[1];
+};
+
+enum ndis_priv_filter {
+	Ndis802_11PrivFilterAcceptAll, Ndis802_11PrivFilter8021xWEP
+};
+
+enum network_type {
+	Ndis802_11FH, Ndis802_11DS, Ndis802_11OFDM5, Ndis802_11OFDM24,
+	/* MSDN site uses Ndis802_11Automode, which is not mentioned
+	 * in DDK, so add one and assign it to
+	 * Ndis802_11NetworkTypeMax */
+	Ndis802_11Automode, Ndis802_11NetworkTypeMax = Ndis802_11Automode
+};
+
+struct network_type_list {
+	ULONG num;
+	enum network_type types[1];
+};
+
+enum ndis_power {
+	NDIS_POWER_OFF = 0, NDIS_POWER_MAX, NDIS_POWER_MIN,
+};
+
+struct ndis_auth_req {
+	ULONG length;
+	mac_address bssid;
+	ULONG flags;
+};
+
+struct ndis_bssid_info {
+	mac_address bssid;
+	ndis_pmkid_vavlue pmkid;
+};
+
+struct ndis_pmkid {
+	ULONG length;
+	ULONG bssid_info_count;
+	struct ndis_bssid_info bssid_info[1];
+};
+
+int add_wep_key(struct ndis_device *wnd, char *key, int key_len,
+		int index);
+int set_essid(struct ndis_device *wnd, const char *ssid, int ssid_len);
+int set_infra_mode(struct ndis_device *wnd,
+		   enum ndis_infrastructure_mode mode);
+int get_ap_address(struct ndis_device *wnd, mac_address mac);
+int set_ndis_auth_mode(struct ndis_device *wnd, ULONG auth_mode);
+int set_iw_auth_mode(struct ndis_device *wnd, int wpa_version,
+		     int auth_80211_alg);
+int set_auth_mode(struct ndis_device *wnd);
+int set_ndis_encr_mode(struct ndis_device *wnd, int cipher_pairwise,
+		       int cipher_groupwise);
+int get_ndis_encr_mode(struct ndis_device *wnd);
+int set_encr_mode(struct ndis_device *wnd);
+int set_iw_encr_mode(struct ndis_device *wnd, int cipher_pairwise,
+		     int cipher_groupwise);
+int get_ndis_auth_mode(struct ndis_device *wnd);
+int set_priv_filter(struct ndis_device *wnd);
+int set_scan(struct ndis_device *wnd);
+NDIS_STATUS disassociate(struct ndis_device *wnd, int reset_ssid);
+void set_default_iw_params(struct ndis_device *wnd);
+extern const struct iw_handler_def ndis_handler_def;
+
+#define PRIV_RESET	 		SIOCIWFIRSTPRIV+16
+#define PRIV_POWER_PROFILE	 	SIOCIWFIRSTPRIV+17
+#define PRIV_NETWORK_TYPE	 	SIOCIWFIRSTPRIV+18
+#define PRIV_DEAUTHENTICATE 		SIOCIWFIRSTPRIV+19
+#define PRIV_MEDIA_STREAM_MODE 		SIOCIWFIRSTPRIV+20
+#define PRIV_RELOAD_DEFAULTS		SIOCIWFIRSTPRIV+23
+
+#define RSN_INFO_ELEM		0x30
+
+/* these have to match what is in wpa_supplicant */
+
+typedef enum { WPA_ALG_NONE, WPA_ALG_WEP, WPA_ALG_TKIP, WPA_ALG_CCMP } wpa_alg;
+typedef enum { CIPHER_NONE, CIPHER_WEP40, CIPHER_TKIP, CIPHER_CCMP,
+	       CIPHER_WEP104 } wpa_cipher;
+typedef enum { KEY_MGMT_802_1X, KEY_MGMT_PSK, KEY_MGMT_NONE,
+	       KEY_MGMT_802_1X_NO_WPA, KEY_MGMT_WPA_NONE } wpa_key_mgmt;
+
+#endif // IW_NDIS_H
--- linux-mvl-dove-2.6.32.orig/ubuntu/ndiswrapper/wrapmem.c
+++ linux-mvl-dove-2.6.32/ubuntu/ndiswrapper/wrapmem.c
@@ -0,0 +1,360 @@
+/*
+ *  Copyright (C) 2006 Giridhar Pemmasani
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *  GNU General Public License for more details.
+ *
+ */
+
+#define _WRAPMEM_C_
+
+#include "ntoskernel.h"
+
+struct slack_alloc_info {
+	struct nt_list list;
+	size_t size;
+};
+
+static struct nt_list allocs;
+static struct nt_list slack_allocs;
+static spinlock_t alloc_lock;
+
+struct vmem_block {
+	struct nt_list list;
+	int size;
+};
+
+static struct nt_list vmem_list;
+
+#if defined(ALLOC_DEBUG)
+struct alloc_info {
+	enum alloc_type type;
+	size_t size;
+#if ALLOC_DEBUG > 1
+	struct nt_list list;
+	const char *file;
+	int line;
+	ULONG tag;
+#endif
+};
+
+static atomic_t alloc_sizes[ALLOC_TYPE_MAX];
+#endif
+
+void wrapmem_info(void)
+{
+#ifdef ALLOC_DEBUG
+	enum alloc_type type;
+	for (type = 0; type < ALLOC_TYPE_MAX; type++)
+		INFO("total size of allocations in %d: %d",
+		       type, atomic_read(&alloc_sizes[type]));
+#endif
+}
+
+/* allocate memory and add it to list of allocated pointers; if a
+ * driver doesn't free this memory for any reason (buggy driver or we
+ * allocate space behind driver's back since we need more space than
+ * corresponding Windows structure provides etc.), this gets freed
+ * automatically when module is unloaded
+ */
+void *slack_kmalloc(size_t size)
+{
+	struct slack_alloc_info *info;
+	gfp_t flags;
+
+	ENTER4("size = %lu", (unsigned long)size);
+
+	if (irql_gfp() & GFP_ATOMIC)
+		flags = GFP_ATOMIC;
+	else
+		flags = GFP_KERNEL;
+	info = kmalloc(size + sizeof(*info), flags);
+	if (!info)
+		return NULL;
+	info->size = size;
+	spin_lock_bh(&alloc_lock);
+	InsertTailList(&slack_allocs, &info->list);
+	spin_unlock_bh(&alloc_lock);
+#ifdef ALLOC_DEBUG
+	atomic_add(size, &alloc_sizes[ALLOC_TYPE_SLACK]);
+#endif
+	TRACE4("%p, %p", info, info + 1);
+	EXIT4(return info + 1);
+}
+
+/* free pointer and remove from list of allocated pointers */
+void slack_kfree(void *ptr)
+{
+	struct slack_alloc_info *info;
+
+	ENTER4("%p", ptr);
+	info = ptr - sizeof(*info);
+	spin_lock_bh(&alloc_lock);
+	RemoveEntryList(&info->list);
+	spin_unlock_bh(&alloc_lock);
+#ifdef ALLOC_DEBUG
+	atomic_sub(info->size, &alloc_sizes[ALLOC_TYPE_SLACK]);
+#endif
+	kfree(info);
+	EXIT4(return);
+}
+
+#if defined(ALLOC_DEBUG)
+void *wrap_kmalloc(size_t size, gfp_t flags, const char *file, int line)
+{
+	struct alloc_info *info;
+
+	info = kmalloc(size + sizeof(*info), flags);
+	if (!info)
+		return NULL;
+	if (flags & GFP_ATOMIC)
+		info->type = ALLOC_TYPE_KMALLOC_ATOMIC;
+	else
+		info->type = ALLOC_TYPE_KMALLOC_NON_ATOMIC;
+	info->size = size;
+	atomic_add(size, &alloc_sizes[info->type]);
+#if ALLOC_DEBUG > 1
+	info->file = file;
+	info->line = line;
+	info->tag = 0;
+	spin_lock_bh(&alloc_lock);
+	InsertTailList(&allocs, &info->list);
+	spin_unlock_bh(&alloc_lock);
+#endif
+	TRACE4("%p", info + 1);
+	return info + 1;
+}
+
+void *wrap_kzalloc(size_t size, gfp_t flags, const char *file, int line)
+{
+	void *ptr = wrap_kmalloc(size, flags, file, line);
+	if (ptr)
+		memset(ptr, 0, size);
+	return ptr;
+}
+
+void wrap_kfree(void *ptr)
+{
+	struct alloc_info *info;
+
+	TRACE4("%p", ptr);
+	if (!ptr)
+		return;
+	info = ptr - sizeof(*info);
+	atomic_sub(info->size, &alloc_sizes[info->type]);
+#if ALLOC_DEBUG > 1
+	spin_lock_bh(&alloc_lock);
+	RemoveEntryList(&info->list);
+	spin_unlock_bh(&alloc_lock);
+	if (!(info->type == ALLOC_TYPE_KMALLOC_ATOMIC ||
+	      info->type == ALLOC_TYPE_KMALLOC_NON_ATOMIC))
+		WARNING("invliad type: %d", info->type);
+#endif
+	kfree(info);
+}
+
+void *wrap_vmalloc(unsigned long size, const char *file, int line)
+{
+	struct alloc_info *info;
+
+	info = vmalloc(size + sizeof(*info));
+	if (!info)
+		return NULL;
+	info->type = ALLOC_TYPE_VMALLOC_NON_ATOMIC;
+	info->size = size;
+	atomic_add(size, &alloc_sizes[info->type]);
+#if ALLOC_DEBUG > 1
+	info->file = file;
+	info->line = line;
+	info->tag = 0;
+	spin_lock_bh(&alloc_lock);
+	InsertTailList(&allocs, &info->list);
+	spin_unlock_bh(&alloc_lock);
+#endif
+	return info + 1;
+}
+
+void *wrap__vmalloc(unsigned long size, gfp_t gfp_mask, pgprot_t prot,
+		    const char *file, int line)
+{
+	struct alloc_info *info;
+
+	info = __vmalloc(size + sizeof(*info), gfp_mask, prot);
+	if (!info)
+		return NULL;
+	if (gfp_mask & GFP_ATOMIC)
+		info->type = ALLOC_TYPE_VMALLOC_ATOMIC;
+	else
+		info->type = ALLOC_TYPE_VMALLOC_NON_ATOMIC;
+	info->size = size;
+	atomic_add(size, &alloc_sizes[info->type]);
+#if ALLOC_DEBUG > 1
+	info->file = file;
+	info->line = line;
+	info->tag = 0;
+	spin_lock_bh(&alloc_lock);
+	InsertTailList(&allocs, &info->list);
+	spin_unlock_bh(&alloc_lock);
+#endif
+	return info + 1;
+}
+
+void wrap_vfree(void *ptr)
+{
+	struct alloc_info *info;
+
+	info = ptr - sizeof(*info);
+	atomic_sub(info->size, &alloc_sizes[info->type]);
+#if ALLOC_DEBUG > 1
+	spin_lock_bh(&alloc_lock);
+	RemoveEntryList(&info->list);
+	spin_unlock_bh(&alloc_lock);
+	if (!(info->type == ALLOC_TYPE_VMALLOC_ATOMIC ||
+	      info->type == ALLOC_TYPE_VMALLOC_NON_ATOMIC))
+		WARNING("invliad type: %d", info->type);
+#endif
+	vfree(info);
+}
+
+void *wrap_alloc_pages(gfp_t flags, unsigned int size,
+		       const char *file, int line)
+{
+	struct alloc_info *info;
+
+	size += sizeof(*info);
+	info = (struct alloc_info *)__get_free_pages(flags, get_order(size));
+	if (!info)
+		return NULL;
+	info->type = ALLOC_TYPE_PAGES;
+	info->size = size;
+	atomic_add(size, &alloc_sizes[info->type]);
+#if ALLOC_DEBUG > 1
+	info->file = file;
+	info->line = line;
+	info->tag = 0;
+	spin_lock_bh(&alloc_lock);
+	InsertTailList(&allocs, &info->list);
+	spin_unlock_bh(&alloc_lock);
+#endif
+	return info + 1;
+}
+
+void wrap_free_pages(unsigned long ptr, int order)
+{
+	struct alloc_info *info;
+
+	info = (void *)ptr - sizeof(*info);
+	atomic_sub(info->size, &alloc_sizes[info->type]);
+#if ALLOC_DEBUG > 1
+	spin_lock_bh(&alloc_lock);
+	RemoveEntryList(&info->list);
+	spin_unlock_bh(&alloc_lock);
+	if (info->type != ALLOC_TYPE_PAGES)
+		WARNING("invliad type: %d", info->type);
+#endif
+	free_pages((unsigned long)info, get_order(info->size));
+}
+
+#if ALLOC_DEBUG > 1
+#undef ExAllocatePoolWithTag
+void *wrap_ExAllocatePoolWithTag(enum pool_type pool_type, SIZE_T size,
+				 ULONG tag, const char *file, int line)
+{
+	void *addr;
+	struct alloc_info *info;
+
+	ENTER4("pool_type: %d, size: %lu, tag: %u", pool_type, size, tag);
+	addr = ExAllocatePoolWithTag(pool_type, size, tag);
+	if (!addr)
+		return NULL;
+	info = addr - sizeof(*info);
+	info->file = file;
+	info->line = line;
+	info->tag = tag;
+	EXIT4(return addr);
+}
+#endif
+
+int alloc_size(enum alloc_type type)
+{
+	if (type >= 0 && type < ALLOC_TYPE_MAX)
+		return atomic_read(&alloc_sizes[type]);
+	else
+		return -EINVAL;
+}
+
+#endif // ALLOC_DEBUG
+
+int wrapmem_init(void)
+{
+	InitializeListHead(&allocs);
+	InitializeListHead(&slack_allocs);
+	InitializeListHead(&vmem_list);
+	spin_lock_init(&alloc_lock);
+	return 0;
+}
+
+void wrapmem_exit(void)
+{
+	enum alloc_type type;
+	struct nt_list *ent;
+
+	/* free all pointers on the slack list */
+	while (1) {
+		struct slack_alloc_info *info;
+		spin_lock_bh(&alloc_lock);
+		ent = RemoveHeadList(&slack_allocs);
+		spin_unlock_bh(&alloc_lock);
+		if (!ent)
+			break;
+		info = container_of(ent, struct slack_alloc_info, list);
+#ifdef ALLOC_DEBUG
+		atomic_sub(info->size, &alloc_sizes[ALLOC_TYPE_SLACK]);
+#endif
+		kfree(info);
+	}
+	type = 0;
+#ifdef ALLOC_DEBUG
+	for (type = 0; type < ALLOC_TYPE_MAX; type++) {
+		int n = atomic_read(&alloc_sizes[type]);
+		if (n)
+			WARNING("%d bytes of memory in %d leaking", n, type);
+	}
+
+#if ALLOC_DEBUG > 1
+	while (1) {
+		struct alloc_info *info;
+
+		spin_lock_bh(&alloc_lock);
+		ent = RemoveHeadList(&allocs);
+		spin_unlock_bh(&alloc_lock);
+		if (!ent)
+			break;
+		info = container_of(ent, struct alloc_info, list);
+		atomic_sub(info->size, &alloc_sizes[ALLOC_TYPE_SLACK]);
+		WARNING("%p in %d of size %zu allocated at %s(%d) "
+			"with tag 0x%08X leaking; freeing it now",
+			info + 1, info->type, info->size, info->file,
+			info->line, info->tag);
+		if (info->type == ALLOC_TYPE_KMALLOC_ATOMIC ||
+		    info->type == ALLOC_TYPE_KMALLOC_NON_ATOMIC)
+			kfree(info);
+		else if (info->type == ALLOC_TYPE_VMALLOC_ATOMIC ||
+			 info->type == ALLOC_TYPE_VMALLOC_NON_ATOMIC)
+			vfree(info);
+		else if (info->type == ALLOC_TYPE_PAGES)
+			free_pages((unsigned long)info, get_order(info->size));
+		else
+			WARNING("invalid type: %d; not freed", info->type);
+	}
+#endif
+#endif
+	return;
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/ndiswrapper/ndis.h
+++ linux-mvl-dove-2.6.32/ubuntu/ndiswrapper/ndis.h
@@ -0,0 +1,1314 @@
+/*
+ *  Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *  GNU General Public License for more details.
+ *
+ */
+
+#ifndef _NDIS_H_
+#define _NDIS_H_
+
+#include "ntoskernel.h"
+
+//#define ALLOW_POOL_OVERFLOW 1
+
+#define NDIS_DMA_24BITS 0
+#define NDIS_DMA_32BITS 1
+#define NDIS_DMA_64BITS 2
+
+#ifdef CONFIG_X86_64
+#define MAXIMUM_PROCESSORS  64
+#else
+#define MAXIMUM_PROCESSORS  32
+#endif
+
+typedef UINT NDIS_STATUS;
+typedef UCHAR NDIS_DMA_SIZE;
+typedef LONG ndis_rssi;
+typedef ULONG ndis_key_index;
+typedef ULONG ndis_tx_power_level;
+typedef ULONGULONG ndis_key_rsc;
+typedef UCHAR ndis_rates[NDIS_MAX_RATES];
+typedef UCHAR ndis_rates_ex[NDIS_MAX_RATES_EX];
+typedef UCHAR mac_address[ETH_ALEN];
+typedef ULONG ndis_fragmentation_threshold;
+typedef ULONG ndis_rts_threshold;
+typedef ULONG ndis_antenna;
+typedef ULONG ndis_oid;
+
+typedef UCHAR ndis_pmkid_vavlue[16];
+
+typedef uint64_t NDIS_PHY_ADDRESS;
+
+struct ndis_sg_element {
+	PHYSICAL_ADDRESS address;
+	ULONG length;
+	ULONG_PTR reserved;
+};
+
+struct ndis_sg_list {
+	ULONG nent;
+	ULONG_PTR reserved;
+	struct ndis_sg_element elements[];
+};
+
+/* when sending packets, ndiswrapper associates exactly one sg element
+ * in sg list */
+struct wrap_tx_sg_list {
+	ULONG nent;
+	ULONG_PTR reserved;
+	struct ndis_sg_element elements[1];
+};
+
+struct ndis_phy_addr_unit {
+	NDIS_PHY_ADDRESS phy_addr;
+	UINT length;
+};
+
+typedef struct mdl ndis_buffer;
+
+struct ndis_buffer_pool {
+	ndis_buffer *free_descr;
+//	NT_SPIN_LOCK lock;
+	spinlock_t lock;
+	UINT max_descr;
+	UINT num_allocated_descr;
+};
+
+#define NDIS_PROTOCOL_ID_DEFAULT	0x00
+#define NDIS_PROTOCOL_ID_TCP_IP		0x02
+#define NDIS_PROTOCOL_ID_IPX		0x06
+#define NDIS_PROTOCOL_ID_NBF		0x07
+#define NDIS_PROTOCOL_ID_MAX		0x0F
+#define NDIS_PROTOCOL_ID_MASK		0x0F
+
+#define fPACKET_WRAPPER_RESERVED		0x3F
+#define fPACKET_CONTAINS_MEDIA_SPECIFIC_INFO	0x40
+#define fPACKET_ALLOCATED_BY_NDIS		0x80
+
+#define PROTOCOL_RESERVED_SIZE_IN_PACKET (4 * sizeof(void *))
+
+struct transport_header_offset {
+	USHORT protocol_type;
+	USHORT header_offset;
+};
+
+struct ndis_network_address {
+	USHORT length;
+	USHORT type;
+	UCHAR address[1];
+};
+
+struct ndis_network_address_list {
+	LONG count;
+	USHORT type;
+	struct ndis_network_address address[1];
+};
+
+struct ndis_tcp_ip_checksum_packet_info {
+	union {
+		struct {
+			ULONG v4:1;
+			ULONG v6:1;
+			ULONG tcp:1;
+			ULONG udp:1;
+			ULONG ip:1;
+		} tx;
+		struct {
+			ULONG tcp_failed:1;
+			ULONG udp_failed:1;
+			ULONG ip_failed:1;
+			ULONG tcp_succeeded:1;
+			ULONG udp_succeeded:1;
+			ULONG ip_succeeded:1;
+			ULONG loopback:1;
+		} rx;
+		ULONG value;
+	};
+};
+
+enum ndis_task {
+	TcpIpChecksumNdisTask, IpSecNdisTask, TcpLargeSendNdisTask, MaxNdisTask
+};
+
+enum ndis_encapsulation {
+	UNSPECIFIED_Encapsulation, NULL_Encapsulation,
+	IEEE_802_3_Encapsulation, IEEE_802_5_Encapsulation,
+	LLC_SNAP_ROUTED_Encapsulation, LLC_SNAP_BRIDGED_Encapsulation
+};
+
+#define NDIS_TASK_OFFLOAD_VERSION 1
+
+struct ndis_encapsulation_format {
+	enum ndis_encapsulation encap;
+	struct {
+		ULONG fixed_header_size:1;
+		ULONG reserved:31;
+	} flags;
+	ULONG header_size;
+};
+
+struct ndis_task_offload_header {
+	ULONG version;
+	ULONG size;
+	ULONG reserved;
+	ULONG offset_first_task;
+	struct ndis_encapsulation_format encap_format;
+};
+
+struct ndis_task_offload {
+	ULONG version;
+	ULONG size;
+	enum ndis_task task;
+	ULONG offset_next_task;
+	ULONG task_buf_length;
+	UCHAR task_buf[1];
+};
+
+struct v4_checksum {
+	union {
+		struct {
+			ULONG ip_opts:1;
+			ULONG tcp_opts:1;
+			ULONG tcp_csum:1;
+			ULONG udp_csum:1;
+			ULONG ip_csum:1;
+		};
+		ULONG value;
+	};
+};
+
+struct v6_checksum {
+	ULONG ip_supported:1;
+	ULONG tcp_supported:1;
+	ULONG tcp_csum:1;
+	ULONG udp_csum:1;
+};
+
+struct ndis_task_tcp_ip_checksum {
+	struct v4_checksum v4_tx;
+	struct v4_checksum v4_rx;
+	struct v6_checksum v6_tx;
+	struct v6_checksum v6_rx;
+};
+
+struct ndis_task_tcp_large_send {
+	ULONG version;
+	ULONG max_size;
+	ULONG min_seg_count;
+	BOOLEAN tcp_opts;
+	BOOLEAN ip_opts;
+};
+
+struct ndis_packet;
+
+struct ndis_packet_pool {
+	struct ndis_packet *free_descr;
+//	NT_SPIN_LOCK lock;
+	spinlock_t lock;
+	UINT max_descr;
+	UINT num_allocated_descr;
+	UINT num_used_descr;
+	UINT proto_rsvd_length;
+};
+
+struct ndis_packet_stack {
+	ULONG_PTR IM_reserved[2];
+	ULONG_PTR ndis_reserved[4];
+};
+
+enum ndis_per_packet_info {
+	TcpIpChecksumPacketInfo, IpSecPacketInfo, TcpLargeSendPacketInfo,
+	ClassificationHandlePacketInfo, NdisReserved,
+	ScatterGatherListPacketInfo, Ieee8021QInfo, OriginalPacketInfo,
+	PacketCancelId, MaxPerPacketInfo
+};
+
+struct ndis_packet_extension {
+	void *info[MaxPerPacketInfo];
+};
+
+struct ndis_packet_private {
+	UINT nr_pages;
+	UINT len;
+	ndis_buffer *buffer_head;
+	ndis_buffer *buffer_tail;
+	struct ndis_packet_pool *pool;
+	UINT count;
+	ULONG flags;
+	BOOLEAN valid_counts;
+	UCHAR packet_flags;
+	USHORT oob_offset;
+};
+
+struct ndis_packet {
+	struct ndis_packet_private private;
+	/* for use by miniport */
+	union {
+		/* for connectionless mininports */
+		struct {
+			UCHAR miniport_reserved[2 * sizeof(void *)];
+			UCHAR wrapper_reserved[2 * sizeof(void *)];
+		} cl_reserved;
+		/* for deserialized miniports */
+		struct {
+			UCHAR miniport_reserved_ex[3 * sizeof(void *)];
+			UCHAR wrapper_reserved_ex[sizeof(void *)];
+		} deserailized_reserved;
+		struct {
+			UCHAR mac_reserved[4 * sizeof(void *)];
+		} mac_reserved;
+	};
+	ULONG_PTR reserved[2];
+	UCHAR protocol_reserved[1];
+};
+
+/* OOB data */
+struct ndis_packet_oob_data {
+	union {
+		ULONGLONG time_to_tx;
+		ULONGLONG time_txed;
+	};
+	ULONGLONG time_rxed;
+	UINT header_size;
+	UINT media_size;
+	void *media;
+	NDIS_STATUS status;
+
+	/* ndiswrapper specific info; extension should be right after
+	 * ndis's oob_data */
+	struct ndis_packet_extension ext;
+	union {
+		/* used for tx only */
+		struct {
+			struct sk_buff *tx_skb;
+			union {
+				struct wrap_tx_sg_list wrap_tx_sg_list;
+				struct ndis_sg_list *tx_sg_list;
+			};
+		};
+		/* used for rx only */
+		struct {
+			unsigned char header[ETH_HLEN];
+			unsigned char *look_ahead;
+			UINT look_ahead_size;
+		};
+	};
+};
+
+#define NDIS_PACKET_OOB_DATA(packet)					\
+	(struct ndis_packet_oob_data *)(((void *)(packet)) +		\
+					(packet)->private.oob_offset)
+
+enum ndis_device_pnp_event {
+	NdisDevicePnPEventQueryRemoved, NdisDevicePnPEventRemoved,
+	NdisDevicePnPEventSurpriseRemoved, NdisDevicePnPEventQueryStopped,
+	NdisDevicePnPEventStopped, NdisDevicePnPEventPowerProfileChanged,
+	NdisDevicePnPEventMaximum
+};
+
+enum ndis_request_type {
+	NdisRequestQueryInformation, NdisRequestSetInformation,
+	NdisRequestQueryStatistics, NdisRequestOpen, NdisRequestClose,
+	NdisRequestSend, NdisRequestTransferData, NdisRequestReset,
+	NdisRequestGeneric1, NdisRequestGeneric2, NdisRequestGeneric3,
+	NdisRequestGeneric4
+};
+
+struct ndis_request {
+	mac_address mac;
+	enum ndis_request_type request_type;
+	union data {
+		struct query_info {
+			UINT oid;
+			void *buf;
+			UINT buf_len;
+			UINT written;
+			UINT needed;
+		} query_info;
+		struct set_info {
+			UINT oid;
+			void *buf;
+			UINT buf_len;
+			UINT written;
+			UINT needed;
+		} set_info;
+	} data;
+};
+
+enum ndis_medium {
+	NdisMedium802_3, NdisMedium802_5, NdisMediumFddi, NdisMediumWan,
+	NdisMediumLocalTalk, NdisMediumDix, NdisMediumArcnetRaw,
+	NdisMediumArcnet878_2, NdisMediumAtm, NdisMediumWirelessWan,
+	NdisMediumIrda, NdisMediumBpc, NdisMediumCoWan,
+	NdisMedium1394, NdisMediumMax
+};
+
+enum ndis_physical_medium {
+	NdisPhysicalMediumUnspecified, NdisPhysicalMediumWirelessLan,
+	NdisPhysicalMediumCableModem, NdisPhysicalMediumPhoneLine,
+	NdisPhysicalMediumPowerLine, NdisPhysicalMediumDSL,
+	NdisPhysicalMediumFibreChannel, NdisPhysicalMedium1394,
+	NdisPhysicalMediumWirelessWan, NdisPhysicalMediumMax
+};
+
+enum ndis_power_state {
+	NdisDeviceStateUnspecified = 0,
+	NdisDeviceStateD0, NdisDeviceStateD1, NdisDeviceStateD2,
+	NdisDeviceStateD3, NdisDeviceStateMaximum
+};
+
+enum ndis_power_profile {
+	NdisPowerProfileBattery, NdisPowerProfileAcOnLine
+};
+
+struct ndis_pm_wakeup_capabilities {
+	enum ndis_power_state min_magic_packet_wakeup;
+	enum ndis_power_state min_pattern_wakeup;
+	enum ndis_power_state min_link_change_wakeup;
+};
+
+#define NDIS_PNP_WAKE_UP_MAGIC_PACKET			0x00000001
+#define NDIS_PNP_WAKE_UP_PATTERN_MATCH			0x00000002
+#define NDIS_PNP_WAKE_UP_LINK_CHANGE			0x00000004
+
+enum net_pnp_event_code {
+	NetEventSetPower, NetEventQueryPower, NetEventQueryRemoveDevice,
+	NetEventCancelRemoveDevice, NetEventReconfigure, NetEventBindList,
+	NetEventBindsComplete, NetEventPnPCapabilities, NetEventMaximum
+};
+
+struct net_pnp_event {
+	enum net_pnp_event_code code;
+	void *buf;
+	ULONG buf_length;
+	ULONG_PTR ndis_reserved[4];
+	ULONG_PTR transport_reserved[4];
+	ULONG_PTR tdi_reserved[4];
+	ULONG_PTR tdi_client_reserved[4];
+};
+
+struct ndis_pnp_capabilities {
+	ULONG flags;
+	struct ndis_pm_wakeup_capabilities wakeup;
+};
+
+typedef void (*ndis_isr_handler)(BOOLEAN *recognized, BOOLEAN *queue_handler,
+				 void *handle) wstdcall;
+typedef void (*ndis_interrupt_handler)(void *ctx) wstdcall;
+
+struct miniport {
+	/* NDIS 3.0 */
+	UCHAR major_version;
+	UCHAR minor_version;
+	USHORT filler;
+	UINT reserved;
+	BOOLEAN (*hangcheck)(void *ctx) wstdcall;
+	void (*disable_interrupt)(void *ctx) wstdcall;
+	void (*enable_interrupt)(void *ctx) wstdcall;
+	void (*mp_halt)(void *ctx) wstdcall;
+	ndis_interrupt_handler handle_interrupt;
+	NDIS_STATUS (*init)(NDIS_STATUS *error_status, UINT *medium_index,
+			    enum ndis_medium medium[], UINT medium_array_size,
+			    void *handle, void *conf_handle) wstdcall;
+	ndis_isr_handler isr;
+	NDIS_STATUS (*queryinfo)(void *ctx, ndis_oid oid, void *buffer,
+			     ULONG buflen, ULONG *written,
+			     ULONG *needed) wstdcall;
+	void *reconfig;
+	NDIS_STATUS (*reset)(BOOLEAN *reset_address, void *ctx) wstdcall;
+	NDIS_STATUS (*send)(void *ctx, struct ndis_packet *packet,
+			    UINT flags) wstdcall;
+	NDIS_STATUS (*setinfo)(void *ctx, ndis_oid oid, void *buffer,
+			       ULONG buflen, ULONG *written,
+			       ULONG *needed) wstdcall;
+	NDIS_STATUS (*tx_data)(struct ndis_packet *ndis_packet,
+			       UINT *bytes_txed, void *mp_ctx, void *rx_ctx,
+			       UINT offset, UINT bytes_to_tx) wstdcall;
+	/* NDIS 4.0 extensions */
+	void (*return_packet)(void *ctx, void *packet) wstdcall;
+	void (*send_packets)(void *ctx, struct ndis_packet **packets,
+			     INT nr_of_packets) wstdcall;
+	void (*alloc_complete)(void *handle, void *virt,
+			       NDIS_PHY_ADDRESS *phys,
+			       ULONG size, void *ctx) wstdcall;
+	/* NDIS 5.0 extensions */
+	NDIS_STATUS (*co_create_vc)(void *ctx, void *vc_handle,
+				    void *vc_ctx) wstdcall;
+	NDIS_STATUS (*co_delete_vc)(void *vc_ctx) wstdcall;
+	NDIS_STATUS (*co_activate_vc)(void *vc_ctx, void *call_params) wstdcall;
+	NDIS_STATUS (*co_deactivate_vc)(void *vc_ctx) wstdcall;
+	NDIS_STATUS (*co_send_packets)(void *vc_ctx, void **packets,
+				       UINT nr_of_packets) wstdcall;
+	NDIS_STATUS (*co_request)(void *ctx, void *vc_ctx, UINT *req) wstdcall;
+	/* NDIS 5.1 extensions */
+	void (*cancel_send_packets)(void *ctx, void *id) wstdcall;
+	void (*pnp_event_notify)(void *ctx, enum ndis_device_pnp_event event,
+				 void *inf_buf, ULONG inf_buf_len) wstdcall;
+	void (*shutdown)(void *ctx) wstdcall;
+	void *reserved1;
+	void *reserved2;
+	void *reserved3;
+	void *reserved4;
+};
+
+struct ndis_spinlock {
+	NT_SPIN_LOCK klock;
+	KIRQL irql;
+};
+
+union ndis_rw_lock_refcount {
+	UCHAR cache_line[16];
+};
+
+struct ndis_rw_lock {
+	union {
+		struct {
+			NT_SPIN_LOCK klock;
+			void *context;
+		};
+		UCHAR reserved[16];
+	};
+	union {
+		union ndis_rw_lock_refcount ref_count[MAXIMUM_PROCESSORS];
+		/* ndiswrapper specific */
+		volatile int count;
+	};
+};
+
+struct lock_state {
+	USHORT state;
+	KIRQL irql;
+};
+
+struct ndis_work_item;
+typedef void (*NDIS_PROC)(struct ndis_work_item *, void *) wstdcall;
+
+struct ndis_work_item {
+	void *ctx;
+	NDIS_PROC func;
+	union {
+		UCHAR reserved[8 * sizeof(void *)];
+		/* ndiswrapper specific */
+		struct nt_list list;
+	};
+};
+
+struct alloc_shared_mem {
+	void *ctx;
+	ULONG size;
+	BOOLEAN cached;
+};
+
+struct ndis_mp_block;
+
+/* this is opaque to drivers, so we can use it as we please */
+struct ndis_mp_interrupt {
+	struct kinterrupt *kinterrupt;
+	NT_SPIN_LOCK lock;
+	union {
+		void *reserved;
+		unsigned int irq;
+	};
+	ndis_isr_handler isr;
+	ndis_interrupt_handler mp_dpc;
+	struct kdpc intr_dpc;
+	struct ndis_mp_block *nmb;
+	UCHAR dpc_count;
+	BOOLEAN enable;
+	struct nt_event dpc_completed_event;
+	BOOLEAN shared;
+	BOOLEAN req_isr;
+};
+
+struct ndis_binary_data {
+	USHORT len;
+	void *buf;
+};
+
+enum ndis_parameter_type {
+	NdisParameterInteger, NdisParameterHexInteger,
+	NdisParameterString, NdisParameterMultiString, NdisParameterBinary,
+};
+
+typedef struct unicode_string NDIS_STRING;
+
+struct ndis_configuration_parameter {
+	enum ndis_parameter_type type;
+	union {
+		ULONG integer;
+		NDIS_STRING string;
+	} data;
+};
+
+struct ndis_driver {
+	struct miniport mp;
+};
+
+/* IDs used to store extensions in driver_object's custom extension */
+#define NDIS_DRIVER_CLIENT_ID 10
+
+struct ndis_wireless_stats {
+	ULONG length;
+	LARGE_INTEGER tx_frag;
+	LARGE_INTEGER tx_multi_frag;
+	LARGE_INTEGER failed;
+	LARGE_INTEGER retry;
+	LARGE_INTEGER multi_retry;
+	LARGE_INTEGER rtss_succ;
+	LARGE_INTEGER rtss_fail;
+	LARGE_INTEGER ack_fail;
+	LARGE_INTEGER frame_dup;
+	LARGE_INTEGER rx_frag;
+	LARGE_INTEGER rx_multi_frag;
+	LARGE_INTEGER fcs_err;
+	LARGE_INTEGER tkip_local_mic_failures;
+	LARGE_INTEGER tkip_icv_errors;
+	LARGE_INTEGER tkip_counter_measures_invoked;
+	LARGE_INTEGER tkip_replays;
+	LARGE_INTEGER ccmp_format_errors;
+	LARGE_INTEGER ccmp_replays;
+	LARGE_INTEGER ccmp_decrypt_errors;
+	LARGE_INTEGER fourway_handshake_failures;
+	LARGE_INTEGER wep_undecryptable_count;
+	LARGE_INTEGER wep_icv_errorcount;
+	LARGE_INTEGER decrypt_success_count;
+	LARGE_INTEGER decrypt_failure_count;
+};
+
+enum ndis_status_type {
+	Ndis802_11StatusType_Authentication,
+	Ndis802_11StatusType_MediaStreamMode,
+	Ndis802_11StatusType_PMKID_CandidateList,
+	Ndis802_11StatusType_RadioState,
+};
+
+struct ndis_status_indication {
+	enum ndis_status_type status_type;
+};
+
+enum ndis_radio_status {
+	Ndis802_11RadioStatusOn, Ndis802_11RadioStatusHardwareOff,
+	Ndis802_11RadioStatusSoftwareOff,
+};
+
+struct ndis_radio_status_indication
+{
+	enum ndis_status_type status_type;
+	enum ndis_radio_status radio_state;
+};
+
+enum ndis_media_state {
+	NdisMediaStateConnected,
+	NdisMediaStateDisconnected,
+};
+
+enum ndis_media_stream_mode {
+	Ndis802_11MediaStreamOff, Ndis802_11MediaStreamOn
+};
+
+enum wrapper_work {
+	LINK_STATUS_OFF, LINK_STATUS_ON, SET_MULTICAST_LIST, COLLECT_IW_STATS,
+	HANGCHECK, NETIF_WAKEQ,
+};
+
+struct encr_info {
+	struct encr_key {
+		ULONG length;
+		UCHAR key[NDIS_ENCODING_TOKEN_MAX];
+	} keys[MAX_ENCR_KEYS];
+	unsigned short tx_key_index;
+};
+
+struct ndis_essid {
+	ULONG length;
+	UCHAR essid[NDIS_ESSID_MAX_SIZE];
+};
+
+enum ndis_infrastructure_mode {
+	Ndis802_11IBSS, Ndis802_11Infrastructure, Ndis802_11AutoUnknown,
+	Ndis802_11InfrastructureMax
+};
+
+enum authentication_mode {
+	Ndis802_11AuthModeOpen, Ndis802_11AuthModeShared,
+	Ndis802_11AuthModeAutoSwitch, Ndis802_11AuthModeWPA,
+	Ndis802_11AuthModeWPAPSK, Ndis802_11AuthModeWPANone,
+	Ndis802_11AuthModeWPA2, Ndis802_11AuthModeWPA2PSK,
+	Ndis802_11AuthModeMax
+};
+
+enum encryption_status {
+	Ndis802_11WEPEnabled,
+	Ndis802_11Encryption1Enabled = Ndis802_11WEPEnabled,
+	Ndis802_11WEPDisabled,
+	Ndis802_11EncryptionDisabled = Ndis802_11WEPDisabled,
+	Ndis802_11WEPKeyAbsent,
+	Ndis802_11Encryption1KeyAbsent = Ndis802_11WEPKeyAbsent,
+	Ndis802_11WEPNotSupported,
+	Ndis802_11EncryptionNotSupported = Ndis802_11WEPNotSupported,
+	Ndis802_11Encryption2Enabled, Ndis802_11Encryption2KeyAbsent,
+	Ndis802_11Encryption3Enabled, Ndis802_11Encryption3KeyAbsent
+};
+
+struct ndis_auth_encr_pair {
+	enum authentication_mode auth_mode;
+	enum encryption_status encr_mode;
+};
+
+struct ndis_capability {
+	ULONG length;
+	ULONG version;
+	ULONG num_PMKIDs;
+	ULONG num_auth_encr_pair;
+	struct ndis_auth_encr_pair auth_encr_pair[1];
+};
+
+struct ndis_guid {
+	struct guid guid;
+	union {
+		ndis_oid oid;
+		NDIS_STATUS status;
+	};
+	ULONG size;
+	ULONG flags;
+};
+
+struct ndis_timer {
+	struct nt_timer nt_timer;
+	struct kdpc kdpc;
+};
+
+struct ndis_mp_timer {
+	struct nt_timer nt_timer;
+	struct kdpc kdpc;
+	DPC func;
+	void *ctx;
+	struct ndis_mp_block *nmb;
+	struct ndis_mp_timer *next;
+};
+
+typedef struct cm_partial_resource_list NDIS_RESOURCE_LIST;
+
+struct ndis_event {
+	struct nt_event nt_event;
+};
+
+struct ndis_bind_paths {
+	UINT number;
+	struct unicode_string paths[1];
+};
+
+struct ndis_reference {
+	NT_SPIN_LOCK lock;
+	USHORT ref_count;
+	BOOLEAN closing;
+};
+
+struct ndis_filterdbs {
+	union {
+		void *eth_db;
+		void *null_db;
+	};
+	void *tr_db;
+	void *fddi_db;
+	void *arc_db;
+};
+
+enum ndis_interface_type {
+	NdisInterfaceInternal, NdisInterfaceIsa, NdisInterfaceEisa,
+	NdisInterfaceMca, NdisInterfaceTurboChannel, NdisInterfacePci,
+	NdisInterfacePcMcia,
+};
+
+struct auth_encr_capa {
+	unsigned long auth;
+	unsigned long encr;
+};
+
+struct ndis_pmkid_candidate {
+	mac_address bssid;
+	DWORD flags;
+};
+
+struct ndis_pmkid_candidate_list {
+	ULONG version;
+	ULONG num_candidates;
+	struct ndis_pmkid_candidate candidates[1];
+};
+
+/*
+ * This struct contains function pointers that the drivers references
+ * directly via macros, so it's important that they are at the correct
+ * position.
+ */
+struct ndis_mp_block {
+	void *signature;
+	struct ndis_mp_block *next;
+	struct driver_object *drv_obj;
+	void *mp_ctx;
+	struct unicode_string name;
+	struct ndis_bind_paths *bindpaths;
+	void *openqueue;
+	struct ndis_reference reference;
+	void *device_ctx;
+	UCHAR padding;
+	UCHAR lock_acquired;
+	UCHAR pmode_opens;
+	UCHAR assigned_cpu;
+	NT_SPIN_LOCK lock;
+	enum ndis_request_type *mediarequest;
+	struct ndis_mp_interrupt *interrupt;
+	ULONG flags;
+	ULONG pnp_flags;
+	struct nt_list packet_list;
+	struct ndis_packet *first_pending_tx_packet;
+	struct ndis_packet *return_packet_queue;
+	ULONG request_buffer;
+	void *set_mcast_buffer;
+	struct ndis_mp_block *primary_mp;
+	void *wrapper_ctx;
+	void *bus_data_ctx;
+	ULONG pnp_capa;
+	void *resources;
+	struct ndis_timer wakeup_dpc_timer;
+	struct unicode_string basename;
+	struct unicode_string symlink_name;
+	ULONG ndis_hangcheck_interval;
+	USHORT hanghcheck_ticks;
+	USHORT hangcheck_tick;
+	NDIS_STATUS ndis_reset_status;
+	void *resetopen;
+	struct ndis_filterdbs filterdbs;
+	void *rx_packet;
+	void *send_complete;
+	void *send_resource_avail;
+	void *reset_complete;
+
+	enum ndis_medium media_type;
+	ULONG bus_number;
+	enum ndis_interface_type bus_type;
+	enum ndis_interface_type adapter_type;
+	struct device_object *fdo;
+	struct device_object *pdo;
+	struct device_object *next_device;
+	void *mapreg;
+	void *call_mgraflist;
+	void *mp_thread;
+	void *setinfobuf;
+	USHORT setinfo_buf_len;
+	USHORT max_send_pkts;
+	NDIS_STATUS fake_status;
+	void *lock_handler;
+	struct unicode_string *adapter_instance_name;
+	void *timer_queue;
+	UINT mac_options;
+	void *pending_req;
+	UINT max_long_addrs;
+	UINT max_short_addrs;
+	UINT cur_lookahead;
+	UINT max_lookahead;
+
+	ndis_interrupt_handler irq_bh;
+	void *disable_intr;
+	void *enable_intr;
+	void *send_pkts;
+	void *deferred_send;
+	void *eth_rx_indicate;
+	void *tr_rx_indicate;
+	void *fddi_rx_indicate;
+	void *eth_rx_complete;
+	void *tr_rx_complete;
+	void *fddi_rx_complete;
+
+	void *status;
+	void *status_complete;
+	void *td_complete;
+
+	void *queryinfo_complete;
+	void *setinfo_complete;
+	void *wan_tx_complete;
+	void *wan_rx;
+	void *wan_rx_complete;
+	/* ndiswrapper specific */
+	struct ndis_device *wnd;
+};
+
+struct ndis_device {
+	struct ndis_mp_block *nmb;
+	struct wrap_device *wd;
+	struct net_device *net_dev;
+	void *shutdown_ctx;
+	struct ndis_mp_interrupt *mp_interrupt;
+	struct kdpc irq_kdpc;
+	unsigned long mem_start;
+	unsigned long mem_end;
+
+	struct net_device_stats net_stats;
+	struct iw_statistics iw_stats;
+	BOOLEAN iw_stats_enabled;
+	struct ndis_wireless_stats ndis_stats;
+
+	work_struct_t tx_work;
+	struct ndis_packet *tx_ring[TX_RING_SIZE];
+	u8 tx_ring_start;
+	u8 tx_ring_end;
+	u8 is_tx_ring_full;
+	u8 tx_ok;
+	spinlock_t tx_ring_lock;
+	struct semaphore tx_ring_mutex;
+	unsigned int max_tx_packets;
+	struct semaphore ndis_req_mutex;
+	struct task_struct *ndis_req_task;
+	int ndis_req_done;
+	NDIS_STATUS ndis_req_status;
+	ULONG packet_filter;
+
+	ULONG sg_dma_size;
+	ULONG dma_map_count;
+	dma_addr_t *dma_map_addr;
+
+	int hangcheck_interval;
+	struct timer_list hangcheck_timer;
+	int iw_stats_interval;
+	struct timer_list iw_stats_timer;
+	unsigned long scan_timestamp;
+	struct encr_info encr_info;
+	char nick[IW_ESSID_MAX_SIZE + 1];
+	struct ndis_essid essid;
+	struct auth_encr_capa capa;
+	enum ndis_infrastructure_mode infrastructure_mode;
+	int max_pmkids;
+	int num_pmkids;
+	struct ndis_pmkid *pmkids;
+	mac_address mac;
+	struct proc_dir_entry *procfs_iface;
+
+	work_struct_t ndis_work;
+	unsigned long ndis_pending_work;
+	UINT attributes;
+	int iw_auth_wpa_version;
+	int iw_auth_cipher_pairwise;
+	int iw_auth_cipher_group;
+	int iw_auth_key_mgmt;
+	int iw_auth_80211_alg;
+	struct ndis_packet_pool *tx_packet_pool;
+	struct ndis_buffer_pool *tx_buffer_pool;
+	int multicast_size;
+	struct v4_checksum rx_csum;
+	struct v4_checksum tx_csum;
+	enum ndis_physical_medium physical_medium;
+	ULONG ndis_wolopts;
+	struct nt_slist wrap_timer_slist;
+	int drv_ndis_version;
+	struct ndis_pnp_capabilities pnp_capa;
+	char netdev_name[IFNAMSIZ];
+};
+
+BOOLEAN ndis_isr(struct kinterrupt *kinterrupt, void *ctx) wstdcall;
+
+int ndis_init(void);
+void ndis_exit(void);
+int ndis_init_device(struct ndis_device *wnd);
+void ndis_exit_device(struct ndis_device *wnd);
+
+int wrap_procfs_add_ndis_device(struct ndis_device *wnd);
+void wrap_procfs_remove_ndis_device(struct ndis_device *wnd);
+
+void NdisAllocatePacketPoolEx(NDIS_STATUS *status,
+			      struct ndis_packet_pool **pool_handle,
+			      UINT num_descr, UINT overflowsize,
+			      UINT proto_rsvd_length) wstdcall;
+void NdisFreePacketPool(struct ndis_packet_pool *pool) wstdcall;
+void NdisAllocatePacket(NDIS_STATUS *status, struct ndis_packet **packet,
+			struct ndis_packet_pool *pool) wstdcall;
+void NdisFreePacket(struct ndis_packet *descr) wstdcall;
+void NdisAllocateBufferPool(NDIS_STATUS *status,
+			    struct ndis_buffer_pool **pool_handle,
+			    UINT num_descr) wstdcall;
+void NdisFreeBufferPool(struct ndis_buffer_pool *pool) wstdcall;
+void NdisAllocateBuffer(NDIS_STATUS *status, ndis_buffer **buffer,
+			struct ndis_buffer_pool *pool, void *virt,
+			UINT length) wstdcall;
+void NdisFreeBuffer(ndis_buffer *descr) wstdcall;
+void NdisMIndicateReceivePacket(struct ndis_mp_block *nmb,
+				struct ndis_packet **packets,
+				UINT nr_packets) wstdcall;
+void NdisMSendComplete(struct ndis_mp_block *nmb, struct ndis_packet *packet,
+		       NDIS_STATUS status) wstdcall;
+void NdisMSendResourcesAvailable(struct ndis_mp_block *nmb) wstdcall;
+void NdisMIndicateStatus(struct ndis_mp_block *nmb,
+			 NDIS_STATUS status, void *buf, UINT len) wstdcall;
+void NdisMIndicateStatusComplete(struct ndis_mp_block *nmb) wstdcall;
+void NdisMQueryInformationComplete(struct ndis_mp_block *nmb,
+				   NDIS_STATUS status) wstdcall;
+void NdisMSetInformationComplete(struct ndis_mp_block *nmb,
+				 NDIS_STATUS status) wstdcall;
+void NdisMResetComplete(struct ndis_mp_block *nmb, NDIS_STATUS status,
+			BOOLEAN address_reset) wstdcall;
+ULONG NDIS_BUFFER_TO_SPAN_PAGES(ndis_buffer *buffer) wstdcall;
+BOOLEAN NdisWaitEvent(struct ndis_event *event, UINT timeout) wstdcall;
+void NdisSetEvent(struct ndis_event *event) wstdcall;
+void NdisMDeregisterInterrupt(struct ndis_mp_interrupt *mp_interrupt) wstdcall;
+void EthRxIndicateHandler(struct ndis_mp_block *nmb, void *rx_ctx,
+			  char *header1, char *header, UINT header_size,
+			  void *look_ahead, UINT look_ahead_size,
+			  UINT packet_size) wstdcall;
+void EthRxComplete(struct ndis_mp_block *nmb) wstdcall;
+void NdisMTransferDataComplete(struct ndis_mp_block *nmb,
+			       struct ndis_packet *packet, NDIS_STATUS status,
+			       UINT bytes_txed) wstdcall;
+void NdisWriteConfiguration(NDIS_STATUS *status, struct ndis_mp_block *nmb,
+			    struct unicode_string *key,
+			    struct ndis_configuration_parameter *param) wstdcall;
+void NdisReadConfiguration(NDIS_STATUS *status,
+			   struct ndis_configuration_parameter **param,
+			   struct ndis_mp_block *nmb,
+			   struct unicode_string *key,
+			   enum ndis_parameter_type type) wstdcall;
+
+/* Required OIDs */
+#define OID_GEN_SUPPORTED_LIST			0x00010101
+#define OID_GEN_HARDWARE_STATUS			0x00010102
+#define OID_GEN_MEDIA_SUPPORTED			0x00010103
+#define OID_GEN_MEDIA_IN_USE			0x00010104
+#define OID_GEN_MAXIMUM_LOOKAHEAD		0x00010105
+#define OID_GEN_MAXIMUM_FRAME_SIZE		0x00010106
+#define OID_GEN_LINK_SPEED			0x00010107
+#define OID_GEN_TRANSMIT_BUFFER_SPACE		0x00010108
+#define OID_GEN_RECEIVE_BUFFER_SPACE		0x00010109
+#define OID_GEN_TRANSMIT_BLOCK_SIZE		0x0001010A
+#define OID_GEN_RECEIVE_BLOCK_SIZE		0x0001010B
+#define OID_GEN_VENDOR_ID			0x0001010C
+#define OID_GEN_VENDOR_DESCRIPTION		0x0001010D
+#define OID_GEN_CURRENT_PACKET_FILTER		0x0001010E
+#define OID_GEN_CURRENT_LOOKAHEAD		0x0001010F
+#define OID_GEN_DRIVER_VERSION			0x00010110
+#define OID_GEN_MAXIMUM_TOTAL_SIZE		0x00010111
+#define OID_GEN_PROTOCOL_OPTIONS		0x00010112
+#define OID_GEN_MAC_OPTIONS			0x00010113
+#define OID_GEN_MEDIA_CONNECT_STATUS		0x00010114
+#define OID_GEN_MAXIMUM_SEND_PACKETS		0x00010115
+#define OID_GEN_VENDOR_DRIVER_VERSION		0x00010116
+#define OID_GEN_SUPPORTED_GUIDS			0x00010117
+#define OID_GEN_NETWORK_LAYER_ADDRESSES		0x00010118	/* Set only */
+#define OID_GEN_TRANSPORT_HEADER_OFFSET		0x00010119	/* Set only */
+#define OID_GEN_MACHINE_NAME			0x0001021A
+#define OID_GEN_RNDIS_CONFIG_PARAMETER		0x0001021B	/* Set only */
+#define OID_GEN_VLAN_ID				0x0001021C
+
+/* Optional OIDs. */
+#define OID_GEN_MEDIA_CAPABILITIES		0x00010201
+#define OID_GEN_PHYSICAL_MEDIUM			0x00010202
+
+/* Required statistics OIDs. */
+#define OID_GEN_XMIT_OK				0x00020101
+#define OID_GEN_RCV_OK				0x00020102
+#define OID_GEN_XMIT_ERROR			0x00020103
+#define OID_GEN_RCV_ERROR			0x00020104
+#define OID_GEN_RCV_NO_BUFFER			0x00020105
+
+/* Optional OID statistics */
+#define OID_GEN_DIRECTED_BYTES_XMIT		0x00020201
+#define OID_GEN_DIRECTED_FRAMES_XMIT		0x00020202
+#define OID_GEN_MULTICAST_BYTES_XMIT		0x00020203
+#define OID_GEN_MULTICAST_FRAMES_XMIT		0x00020204
+#define OID_GEN_BROADCAST_BYTES_XMIT		0x00020205
+#define OID_GEN_BROADCAST_FRAMES_XMIT		0x00020206
+#define OID_GEN_DIRECTED_BYTES_RCV		0x00020207
+#define OID_GEN_DIRECTED_FRAMES_RCV		0x00020208
+#define OID_GEN_MULTICAST_BYTES_RCV		0x00020209
+#define OID_GEN_MULTICAST_FRAMES_RCV		0x0002020A
+#define OID_GEN_BROADCAST_BYTES_RCV		0x0002020B
+#define OID_GEN_BROADCAST_FRAMES_RCV		0x0002020C
+#define OID_GEN_RCV_CRC_ERROR			0x0002020D
+#define OID_GEN_TRANSMIT_QUEUE_LENGTH		0x0002020E
+#define OID_GEN_GET_TIME_CAPS			0x0002020F
+#define OID_GEN_GET_NETCARD_TIME		0x00020210
+#define OID_GEN_NETCARD_LOAD			0x00020211
+#define OID_GEN_DEVICE_PROFILE			0x00020212
+
+/* 802.3 (ethernet) OIDs */
+#define OID_802_3_PERMANENT_ADDRESS		0x01010101
+#define OID_802_3_CURRENT_ADDRESS		0x01010102
+#define OID_802_3_MULTICAST_LIST		0x01010103
+#define OID_802_3_MAXIMUM_LIST_SIZE		0x01010104
+#define OID_802_3_MAC_OPTIONS			0x01010105
+#define NDIS_802_3_MAC_OPTION_PRIORITY		0x00000001
+#define OID_802_3_RCV_ERROR_ALIGNMENT		0x01020101
+#define OID_802_3_XMIT_ONE_COLLISION		0x01020102
+#define OID_802_3_XMIT_MORE_COLLISIONS		0x01020103
+#define OID_802_3_XMIT_DEFERRED			0x01020201
+#define OID_802_3_XMIT_MAX_COLLISIONS		0x01020202
+#define OID_802_3_RCV_OVERRUN			0x01020203
+#define OID_802_3_XMIT_UNDERRUN			0x01020204
+#define OID_802_3_XMIT_HEARTBEAT_FAILURE	0x01020205
+#define OID_802_3_XMIT_TIMES_CRS_LOST		0x01020206
+#define OID_802_3_XMIT_LATE_COLLISIONS		0x01020207
+
+/* PnP and power management OIDs */
+#define OID_PNP_CAPABILITIES			0xFD010100
+#define OID_PNP_SET_POWER			0xFD010101
+#define OID_PNP_QUERY_POWER			0xFD010102
+#define OID_PNP_ADD_WAKE_UP_PATTERN		0xFD010103
+#define OID_PNP_REMOVE_WAKE_UP_PATTERN		0xFD010104
+#define OID_PNP_WAKE_UP_PATTERN_LIST		0xFD010105
+#define OID_PNP_ENABLE_WAKE_UP			0xFD010106
+
+/* PnP/PM Statistics (Optional). */
+#define OID_PNP_WAKE_UP_OK			0xFD020200
+#define OID_PNP_WAKE_UP_ERROR			0xFD020201
+
+/* The following bits are defined for OID_PNP_ENABLE_WAKE_UP */
+#define NDIS_PNP_WAKE_UP_MAGIC_PACKET		0x00000001
+#define NDIS_PNP_WAKE_UP_PATTERN_MATCH		0x00000002
+#define NDIS_PNP_WAKE_UP_LINK_CHANGE		0x00000004
+
+/* 802.11 OIDs */
+#define OID_802_11_BSSID			0x0D010101
+#define OID_802_11_SSID				0x0D010102
+#define OID_802_11_NETWORK_TYPES_SUPPORTED	0x0D010203
+#define OID_802_11_NETWORK_TYPE_IN_USE		0x0D010204
+#define OID_802_11_TX_POWER_LEVEL		0x0D010205
+#define OID_802_11_RSSI				0x0D010206
+#define OID_802_11_RSSI_TRIGGER			0x0D010207
+#define OID_802_11_INFRASTRUCTURE_MODE		0x0D010108
+#define OID_802_11_FRAGMENTATION_THRESHOLD	0x0D010209
+#define OID_802_11_RTS_THRESHOLD		0x0D01020A
+#define OID_802_11_NUMBER_OF_ANTENNAS		0x0D01020B
+#define OID_802_11_RX_ANTENNA_SELECTED		0x0D01020C
+#define OID_802_11_TX_ANTENNA_SELECTED		0x0D01020D
+#define OID_802_11_SUPPORTED_RATES		0x0D01020E
+#define OID_802_11_DESIRED_RATES		0x0D010210
+#define OID_802_11_CONFIGURATION		0x0D010211
+#define OID_802_11_STATISTICS			0x0D020212
+#define OID_802_11_ADD_WEP			0x0D010113
+#define OID_802_11_REMOVE_WEP			0x0D010114
+#define OID_802_11_DISASSOCIATE			0x0D010115
+#define OID_802_11_POWER_MODE			0x0D010216
+#define OID_802_11_BSSID_LIST			0x0D010217
+#define OID_802_11_AUTHENTICATION_MODE		0x0D010118
+#define OID_802_11_PRIVACY_FILTER		0x0D010119
+#define OID_802_11_BSSID_LIST_SCAN		0x0D01011A
+#define OID_802_11_WEP_STATUS			0x0D01011B
+#define OID_802_11_ENCRYPTION_STATUS		OID_802_11_WEP_STATUS
+#define OID_802_11_RELOAD_DEFAULTS		0x0D01011C
+#define OID_802_11_ADD_KEY			0x0D01011D
+#define OID_802_11_REMOVE_KEY			0x0D01011E
+#define OID_802_11_ASSOCIATION_INFORMATION	0x0D01011F
+#define OID_802_11_TEST				0x0D010120
+#define OID_802_11_MEDIA_STREAM_MODE		0x0D010121
+#define OID_802_11_CAPABILITY			0x0D010122
+#define OID_802_11_PMKID			0x0D010123
+
+#define NDIS_STATUS_SUCCESS		0
+#define NDIS_STATUS_PENDING		0x00000103
+#define NDIS_STATUS_NOT_RECOGNIZED	0x00010001
+#define NDIS_STATUS_NOT_COPIED		0x00010002
+#define NDIS_STATUS_NOT_ACCEPTED	0x00010003
+#define NDIS_STATUS_CALL_ACTIVE		0x00010007
+#define NDIS_STATUS_ONLINE		0x40010003
+#define NDIS_STATUS_RESET_START		0x40010004
+#define NDIS_STATUS_RESET_END		0x40010005
+#define NDIS_STATUS_RING_STATUS		0x40010006
+#define NDIS_STATUS_CLOSED		0x40010007
+#define NDIS_STATUS_WAN_LINE_UP		0x40010008
+#define NDIS_STATUS_WAN_LINE_DOWN	0x40010009
+#define NDIS_STATUS_WAN_FRAGMENT	0x4001000A
+#define NDIS_STATUS_MEDIA_CONNECT	0x4001000B
+#define NDIS_STATUS_MEDIA_DISCONNECT	0x4001000C
+#define NDIS_STATUS_HARDWARE_LINE_UP	0x4001000D
+#define NDIS_STATUS_HARDWARE_LINE_DOWN	0x4001000E
+#define NDIS_STATUS_INTERFACE_UP	0x4001000F
+#define NDIS_STATUS_INTERFACE_DOWN	0x40010010
+#define NDIS_STATUS_MEDIA_BUSY		0x40010011
+#define NDIS_STATUS_MEDIA_SPECIFIC_INDICATION	0x40010012
+#define NDIS_STATUS_WW_INDICATION NDIS_STATUS_MEDIA_SPECIFIC_INDICATION
+#define NDIS_STATUS_LINK_SPEED_CHANGE	0x40010013
+#define NDIS_STATUS_WAN_GET_STATS	0x40010014
+#define NDIS_STATUS_WAN_CO_FRAGMENT	0x40010015
+#define NDIS_STATUS_WAN_CO_LINKPARAMS	0x40010016
+#define NDIS_STATUS_NOT_RESETTABLE	0x80010001
+#define NDIS_STATUS_SOFT_ERRORS		0x80010003
+#define NDIS_STATUS_HARD_ERRORS		0x80010004
+#define NDIS_STATUS_BUFFER_OVERFLOW	0x80000005
+#define NDIS_STATUS_FAILURE		0xC0000001
+#define NDIS_STATUS_INVALID_PARAMETER 0xC000000D
+#define NDIS_STATUS_RESOURCES		0xC000009A
+#define NDIS_STATUS_CLOSING		0xC0010002
+#define NDIS_STATUS_BAD_VERSION		0xC0010004
+#define NDIS_STATUS_BAD_CHARACTERISTICS	0xC0010005
+#define NDIS_STATUS_ADAPTER_NOT_FOUND	0xC0010006
+#define NDIS_STATUS_OPEN_FAILED		0xC0010007
+#define NDIS_STATUS_DEVICE_FAILED	0xC0010008
+#define NDIS_STATUS_MULTICAST_FULL	0xC0010009
+#define NDIS_STATUS_MULTICAST_EXISTS	0xC001000A
+#define NDIS_STATUS_MULTICAST_NOT_FOUND	0xC001000B
+#define NDIS_STATUS_REQUEST_ABORTED	0xC001000C
+#define NDIS_STATUS_RESET_IN_PROGRESS	0xC001000D
+#define NDIS_STATUS_CLOSING_INDICATING	0xC001000E
+#define NDIS_STATUS_BAD_VERSION		0xC0010004
+#define NDIS_STATUS_NOT_SUPPORTED	0xC00000BB
+#define NDIS_STATUS_INVALID_PACKET	0xC001000F
+#define NDIS_STATUS_OPEN_LIST_FULL	0xC0010010
+#define NDIS_STATUS_ADAPTER_NOT_READY	0xC0010011
+#define NDIS_STATUS_ADAPTER_NOT_OPEN	0xC0010012
+#define NDIS_STATUS_NOT_INDICATING	0xC0010013
+#define NDIS_STATUS_INVALID_LENGTH	0xC0010014
+#define NDIS_STATUS_INVALID_DATA	0xC0010015
+#define NDIS_STATUS_BUFFER_TOO_SHORT	0xC0010016
+#define NDIS_STATUS_INVALID_OID		0xC0010017
+#define NDIS_STATUS_ADAPTER_REMOVED	0xC0010018
+#define NDIS_STATUS_UNSUPPORTED_MEDIA	0xC0010019
+#define NDIS_STATUS_GROUP_ADDRESS_IN_USE	0xC001001A
+#define NDIS_STATUS_FILE_NOT_FOUND	0xC001001B
+#define NDIS_STATUS_ERROR_READING_FILE	0xC001001C
+#define NDIS_STATUS_ALREADY_MAPPED	0xC001001D
+#define NDIS_STATUS_RESOURCE_CONFLICT	0xC001001E
+#define NDIS_STATUS_NO_CABLE		0xC001001F
+#define NDIS_STATUS_INVALID_SAP		0xC0010020
+#define NDIS_STATUS_SAP_IN_USE		0xC0010021
+#define NDIS_STATUS_INVALID_ADDRESS	0xC0010022
+#define NDIS_STATUS_VC_NOT_ACTIVATED	0xC0010023
+#define NDIS_STATUS_DEST_OUT_OF_ORDER	0xC0010024
+#define NDIS_STATUS_VC_NOT_AVAILABLE	0xC0010025
+#define NDIS_STATUS_CELLRATE_NOT_AVAILABLE	0xC0010026
+#define NDIS_STATUS_INCOMPATABLE_QOS	0xC0010027
+#define NDIS_STATUS_AAL_PARAMS_UNSUPPORTED	0xC0010028
+#define NDIS_STATUS_NO_ROUTE_TO_DESTINATION	0xC0010029
+#define NDIS_STATUS_TOKEN_RING_OPEN_ERROR	0xC0011000
+#define NDIS_STATUS_INVALID_DEVICE_REQUEST	0xC0000010
+#define NDIS_STATUS_NETWORK_UNREACHABLE         0xC000023C
+
+/* Event codes */
+
+#define EVENT_NDIS_RESOURCE_CONFLICT	0xC0001388
+#define EVENT_NDIS_OUT_OF_RESOURCE	0xC0001389
+#define EVENT_NDIS_HARDWARE_FAILURE	0xC000138A
+#define EVENT_NDIS_ADAPTER_NOT_FOUND	0xC000138B
+#define EVENT_NDIS_INTERRUPT_CONNECT	0xC000138C
+#define EVENT_NDIS_DRIVER_FAILURE	0xC000138D
+#define EVENT_NDIS_BAD_VERSION		0xC000138E
+#define EVENT_NDIS_TIMEOUT		0x8000138F
+#define EVENT_NDIS_NETWORK_ADDRESS	0xC0001390
+#define EVENT_NDIS_UNSUPPORTED_CONFIGURATION	0xC0001391
+#define EVENT_NDIS_INVALID_VALUE_FROM_ADAPTER	0xC0001392
+#define EVENT_NDIS_MISSING_CONFIGURATION_PARAMETER	0xC0001393
+#define EVENT_NDIS_BAD_IO_BASE_ADDRESS	0xC0001394
+#define EVENT_NDIS_RECEIVE_SPACE_SMALL	0x40001395
+#define EVENT_NDIS_ADAPTER_DISABLED	0x80001396
+#define EVENT_NDIS_IO_PORT_CONFLICT	0x80001397
+#define EVENT_NDIS_PORT_OR_DMA_CONFLICT	0x80001398
+#define EVENT_NDIS_MEMORY_CONFLICT	0x80001399
+#define EVENT_NDIS_INTERRUPT_CONFLICT	0x8000139A
+#define EVENT_NDIS_DMA_CONFLICT		0x8000139B
+#define EVENT_NDIS_INVALID_DOWNLOAD_FILE_ERROR	0xC000139C
+#define EVENT_NDIS_MAXRECEIVES_ERROR	0x8000139D
+#define EVENT_NDIS_MAXTRANSMITS_ERROR	0x8000139E
+#define EVENT_NDIS_MAXFRAMESIZE_ERROR	0x8000139F
+#define EVENT_NDIS_MAXINTERNALBUFS_ERROR	0x800013A0
+#define EVENT_NDIS_MAXMULTICAST_ERROR	0x800013A1
+#define EVENT_NDIS_PRODUCTID_ERROR	0x800013A2
+#define EVENT_NDIS_LOBE_FAILUE_ERROR	0x800013A3
+#define EVENT_NDIS_SIGNAL_LOSS_ERROR	0x800013A4
+#define EVENT_NDIS_REMOVE_RECEIVED_ERROR	0x800013A5
+#define EVENT_NDIS_TOKEN_RING_CORRECTION	0x400013A6
+#define EVENT_NDIS_ADAPTER_CHECK_ERROR	0xC00013A7
+#define EVENT_NDIS_RESET_FAILURE_ERROR	0x800013A8
+#define EVENT_NDIS_CABLE_DISCONNECTED_ERROR	0x800013A9
+#define EVENT_NDIS_RESET_FAILURE_CORRECTION	0x800013AA
+
+/* packet filter bits used by NDIS_OID_PACKET_FILTER */
+#define NDIS_PACKET_TYPE_DIRECTED               0x00000001
+#define NDIS_PACKET_TYPE_MULTICAST              0x00000002
+#define NDIS_PACKET_TYPE_ALL_MULTICAST          0x00000004
+#define NDIS_PACKET_TYPE_BROADCAST              0x00000008
+#define NDIS_PACKET_TYPE_SOURCE_ROUTING         0x00000010
+#define NDIS_PACKET_TYPE_PROMISCUOUS            0x00000020
+#define NDIS_PACKET_TYPE_SMT                    0x00000040
+#define NDIS_PACKET_TYPE_ALL_LOCAL              0x00000080
+#define NDIS_PACKET_TYPE_GROUP                  0x00001000
+#define NDIS_PACKET_TYPE_ALL_FUNCTIONAL         0x00002000
+#define NDIS_PACKET_TYPE_FUNCTIONAL             0x00004000
+#define NDIS_PACKET_TYPE_MAC_FRAME              0x00008000
+
+/* memory allocation flags */
+#define NDIS_MEMORY_CONTIGUOUS			0x00000001
+#define NDIS_MEMORY_NONCACHED			0x00000002
+
+/* Atrribute flags to NdisMSetAtrributesEx */
+#define NDIS_ATTRIBUTE_IGNORE_PACKET_TIMEOUT    0x00000001
+#define NDIS_ATTRIBUTE_IGNORE_REQUEST_TIMEOUT   0x00000002
+#define NDIS_ATTRIBUTE_IGNORE_TOKEN_RING_ERRORS 0x00000004
+#define NDIS_ATTRIBUTE_BUS_MASTER               0x00000008
+#define NDIS_ATTRIBUTE_INTERMEDIATE_DRIVER      0x00000010
+#define NDIS_ATTRIBUTE_DESERIALIZE              0x00000020
+#define NDIS_ATTRIBUTE_NO_HALT_ON_SUSPEND       0x00000040
+#define NDIS_ATTRIBUTE_SURPRISE_REMOVE_OK       0x00000080
+#define NDIS_ATTRIBUTE_NOT_CO_NDIS              0x00000100
+#define NDIS_ATTRIBUTE_USES_SAFE_BUFFER_APIS    0x00000200
+
+#define OID_TCP_TASK_OFFLOAD			0xFC010201
+
+#define NDIS_MAC_OPTION_COPY_LOOKAHEAD_DATA	0x00000001
+#define NDIS_MAC_OPTION_RECEIVE_SERIALIZED	0x00000002
+#define NDIS_MAC_OPTION_TRANSFERS_NOT_PEND	0x00000004
+#define NDIS_MAC_OPTION_NO_LOOPBACK		0x00000008
+#define NDIS_MAC_OPTION_FULL_DUPLEX		0x00000010
+#define NDIS_MAC_OPTION_EOTX_INDICATION		0x00000020
+#define NDIS_MAC_OPTION_8021P_PRIORITY		0x00000040
+#define NDIS_MAC_OPTION_SUPPORTS_MAC_ADDRESS_OVERWRITE	0x00000080
+#define NDIS_MAC_OPTION_RECEIVE_AT_DPC		0x00000100
+#define NDIS_MAC_OPTION_8021Q_VLAN		0x00000200
+#define NDIS_MAC_OPTION_RESERVED		0x80000000
+
+#define deserialized_driver(wnd) (wnd->attributes & NDIS_ATTRIBUTE_DESERIALIZE)
+
+static inline void serialize_lock(struct ndis_device *wnd)
+{
+	nt_spin_lock(&wnd->nmb->lock);
+}
+
+static inline void serialize_unlock(struct ndis_device *wnd)
+{
+	nt_spin_unlock(&wnd->nmb->lock);
+}
+
+static inline KIRQL serialize_lock_irql(struct ndis_device *wnd)
+{
+	if (deserialized_driver(wnd))
+		return raise_irql(DISPATCH_LEVEL);
+	else
+		return nt_spin_lock_irql(&wnd->nmb->lock, DISPATCH_LEVEL);
+}
+
+static inline void serialize_unlock_irql(struct ndis_device *wnd,
+					 KIRQL irql)
+{
+	if (deserialized_driver(wnd))
+		lower_irql(irql);
+	else
+		nt_spin_unlock_irql(&wnd->nmb->lock, irql);
+}
+
+static inline void if_serialize_lock(struct ndis_device *wnd)
+{
+	if (!deserialized_driver(wnd))
+		nt_spin_lock(&wnd->nmb->lock);
+}
+
+static inline void if_serialize_unlock(struct ndis_device *wnd)
+{
+	if (!deserialized_driver(wnd))
+		nt_spin_unlock(&wnd->nmb->lock);
+}
+
+#endif /* NDIS_H */
--- linux-mvl-dove-2.6.32.orig/ubuntu/ndiswrapper/ntoskernel.c
+++ linux-mvl-dove-2.6.32/ubuntu/ndiswrapper/ntoskernel.c
@@ -0,0 +1,2683 @@
+/*
+ *  Copyright (C) 2003-2005 Pontus Fuchs, Giridhar Pemmasani
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *  GNU General Public License for more details.
+ *
+ */
+
+#include "ntoskernel.h"
+#include "ndis.h"
+#include "usb.h"
+#include "pnp.h"
+#include "loader.h"
+#include "ntoskernel_exports.h"
+
+/* MDLs describe a range of virtual address with an array of physical
+ * pages right after the header. For different ranges of virtual
+ * addresses, the number of entries of physical pages may be different
+ * (depending on number of entries required). If we want to allocate
+ * MDLs from a pool, the size has to be constant. So we assume that
+ * maximum range used by a driver is MDL_CACHE_PAGES; if a driver
+ * requests an MDL for a bigger region, we allocate it with kmalloc;
+ * otherwise, we allocate from the pool */
+
+#define MDL_CACHE_PAGES 3
+#define MDL_CACHE_SIZE (sizeof(struct mdl) + \
+			(sizeof(PFN_NUMBER) * MDL_CACHE_PAGES))
+struct wrap_mdl {
+	struct nt_list list;
+	struct mdl mdl[0];
+};
+
+/* everything here is for all drivers/devices - not per driver/device */
+static spinlock_t dispatcher_lock;
+spinlock_t ntoskernel_lock;
+static void *mdl_cache;
+static struct nt_list wrap_mdl_list;
+
+static work_struct_t kdpc_work;
+static void kdpc_worker(worker_param_t dummy);
+
+static struct nt_list kdpc_list;
+static spinlock_t kdpc_list_lock;
+
+static struct nt_list callback_objects;
+
+struct nt_list object_list;
+
+struct bus_driver {
+	struct nt_list list;
+	char name[MAX_DRIVER_NAME_LEN];
+	struct driver_object drv_obj;
+};
+
+static struct nt_list bus_driver_list;
+
+static work_struct_t ntos_work;
+static struct nt_list ntos_work_list;
+static spinlock_t ntos_work_lock;
+static void ntos_work_worker(worker_param_t dummy);
+static struct nt_thread *ntos_worker_thread;
+spinlock_t irp_cancel_lock;
+static NT_SPIN_LOCK nt_list_lock;
+static struct nt_slist wrap_timer_slist;
+
+/* compute ticks (100ns) since 1601 until when system booted into
+ * wrap_ticks_to_boot */
+u64 wrap_ticks_to_boot;
+
+#if defined(CONFIG_X86_64)
+static struct timer_list shared_data_timer;
+struct kuser_shared_data kuser_shared_data;
+static void update_user_shared_data_proc(unsigned long data);
+#endif
+
+WIN_SYMBOL_MAP("KeTickCount", &jiffies)
+
+WIN_SYMBOL_MAP("NlsMbCodePageTag", FALSE)
+
+workqueue_struct_t *ntos_wq;
+
+#ifdef WRAP_PREEMPT
+DEFINE_PER_CPU(irql_info_t, irql_info);
+#endif
+
+#if defined(CONFIG_X86_64)
+static void update_user_shared_data_proc(unsigned long data)
+{
+	/* timer is supposed to be scheduled every 10ms, but bigger
+	 * intervals seem to work (tried upto 50ms) */
+	*((ULONG64 *)&kuser_shared_data.system_time) = ticks_1601();
+	*((ULONG64 *)&kuser_shared_data.interrupt_time) =
+		jiffies * TICKSPERSEC / HZ;
+	*((ULONG64 *)&kuser_shared_data.tick) = jiffies;
+
+	mod_timer(&shared_data_timer, jiffies + MSEC_TO_HZ(30));
+}
+#endif
+
+void *allocate_object(ULONG size, enum common_object_type type,
+		      struct unicode_string *name)
+{
+	struct common_object_header *hdr;
+	void *body;
+
+	/* we pad header as prefix to body */
+	hdr = ExAllocatePoolWithTag(NonPagedPool, OBJECT_SIZE(size), 0);
+	if (!hdr) {
+		WARNING("couldn't allocate memory");
+		return NULL;
+	}
+	memset(hdr, 0, OBJECT_SIZE(size));
+	if (name) {
+		hdr->name.buf = ExAllocatePoolWithTag(NonPagedPool,
+						      name->max_length, 0);
+		if (!hdr->name.buf) {
+			ExFreePool(hdr);
+			return NULL;
+		}
+		memcpy(hdr->name.buf, name->buf, name->max_length);
+		hdr->name.length = name->length;
+		hdr->name.max_length = name->max_length;
+	}
+	hdr->type = type;
+	hdr->ref_count = 1;
+	spin_lock_bh(&ntoskernel_lock);
+	/* threads are looked up often (in KeWaitForXXX), so optimize
+	 * for fast lookups of threads */
+	if (type == OBJECT_TYPE_NT_THREAD)
+		InsertHeadList(&object_list, &hdr->list);
+	else
+		InsertTailList(&object_list, &hdr->list);
+	spin_unlock_bh(&ntoskernel_lock);
+	body = HEADER_TO_OBJECT(hdr);
+	TRACE3("allocated hdr: %p, body: %p", hdr, body);
+	return body;
+}
+
+void free_object(void *object)
+{
+	struct common_object_header *hdr;
+
+	hdr = OBJECT_TO_HEADER(object);
+	spin_lock_bh(&ntoskernel_lock);
+	RemoveEntryList(&hdr->list);
+	spin_unlock_bh(&ntoskernel_lock);
+	TRACE3("freed hdr: %p, body: %p", hdr, object);
+	if (hdr->name.buf)
+		ExFreePool(hdr->name.buf);
+	ExFreePool(hdr);
+}
+
+static int add_bus_driver(const char *name)
+{
+	struct bus_driver *bus_driver;
+
+	bus_driver = kzalloc(sizeof(*bus_driver), GFP_KERNEL);
+	if (!bus_driver) {
+		ERROR("couldn't allocate memory");
+		return -ENOMEM;
+	}
+	strncpy(bus_driver->name, name, sizeof(bus_driver->name));
+	bus_driver->name[sizeof(bus_driver->name)-1] = 0;
+	spin_lock_bh(&ntoskernel_lock);
+	InsertTailList(&bus_driver_list, &bus_driver->list);
+	spin_unlock_bh(&ntoskernel_lock);
+	TRACE1("bus driver %s is at %p", name, &bus_driver->drv_obj);
+	return STATUS_SUCCESS;
+}
+
+struct driver_object *find_bus_driver(const char *name)
+{
+	struct bus_driver *bus_driver;
+	struct driver_object *drv_obj;
+
+	spin_lock_bh(&ntoskernel_lock);
+	drv_obj = NULL;
+	nt_list_for_each_entry(bus_driver, &bus_driver_list, list) {
+		if (strcmp(bus_driver->name, name) == 0) {
+			drv_obj = &bus_driver->drv_obj;
+			break;
+		}
+	}
+	spin_unlock_bh(&ntoskernel_lock);
+	return drv_obj;
+}
+
+wfastcall struct nt_list *WIN_FUNC(ExfInterlockedInsertHeadList,3)
+	(struct nt_list *head, struct nt_list *entry, NT_SPIN_LOCK *lock)
+{
+	struct nt_list *first;
+	unsigned long flags;
+
+	ENTER5("head = %p, entry = %p", head, entry);
+	nt_spin_lock_irqsave(lock, flags);
+	first = InsertHeadList(head, entry);
+	nt_spin_unlock_irqrestore(lock, flags);
+	TRACE5("head = %p, old = %p", head, first);
+	return first;
+}
+
+wfastcall struct nt_list *WIN_FUNC(ExInterlockedInsertHeadList,3)
+	(struct nt_list *head, struct nt_list *entry, NT_SPIN_LOCK *lock)
+{
+	ENTER5("%p", head);
+	return ExfInterlockedInsertHeadList(head, entry, lock);
+}
+
+wfastcall struct nt_list *WIN_FUNC(ExfInterlockedInsertTailList,3)
+	(struct nt_list *head, struct nt_list *entry, NT_SPIN_LOCK *lock)
+{
+	struct nt_list *last;
+	unsigned long flags;
+
+	ENTER5("head = %p, entry = %p", head, entry);
+	nt_spin_lock_irqsave(lock, flags);
+	last = InsertTailList(head, entry);
+	nt_spin_unlock_irqrestore(lock, flags);
+	TRACE5("head = %p, old = %p", head, last);
+	return last;
+}
+
+wfastcall struct nt_list *WIN_FUNC(ExInterlockedInsertTailList,3)
+	(struct nt_list *head, struct nt_list *entry, NT_SPIN_LOCK *lock)
+{
+	ENTER5("%p", head);
+	return ExfInterlockedInsertTailList(head, entry, lock);
+}
+
+wfastcall struct nt_list *WIN_FUNC(ExfInterlockedRemoveHeadList,2)
+	(struct nt_list *head, NT_SPIN_LOCK *lock)
+{
+	struct nt_list *ret;
+	unsigned long flags;
+
+	ENTER5("head = %p", head);
+	nt_spin_lock_irqsave(lock, flags);
+	ret = RemoveHeadList(head);
+	nt_spin_unlock_irqrestore(lock, flags);
+	TRACE5("head = %p, ret = %p", head, ret);
+	return ret;
+}
+
+wfastcall struct nt_list *WIN_FUNC(ExInterlockedRemoveHeadList,2)
+	(struct nt_list *head, NT_SPIN_LOCK *lock)
+{
+	ENTER5("%p", head);
+	return ExfInterlockedRemoveHeadList(head, lock);
+}
+
+wfastcall struct nt_list *WIN_FUNC(ExfInterlockedRemoveTailList,2)
+	(struct nt_list *head, NT_SPIN_LOCK *lock)
+{
+	struct nt_list *ret;
+	unsigned long flags;
+
+	ENTER5("head = %p", head);
+	nt_spin_lock_irqsave(lock, flags);
+	ret = RemoveTailList(head);
+	nt_spin_unlock_irqrestore(lock, flags);
+	TRACE5("head = %p, ret = %p", head, ret);
+	return ret;
+}
+
+wfastcall struct nt_list *WIN_FUNC(ExInterlockedRemoveTailList,2)
+	(struct nt_list *head, NT_SPIN_LOCK *lock)
+{
+	ENTER5("%p", head);
+	return ExfInterlockedRemoveTailList(head, lock);
+}
+
+wfastcall void WIN_FUNC(InitializeSListHead,1)
+	(nt_slist_header *head)
+{
+	memset(head, 0, sizeof(*head));
+}
+
+wfastcall struct nt_slist *WIN_FUNC(ExInterlockedPushEntrySList,3)
+	(nt_slist_header *head, struct nt_slist *entry, NT_SPIN_LOCK *lock)
+{
+	struct nt_slist *ret;
+
+	ret = PushEntrySList(head, entry, lock);
+	return ret;
+}
+
+wstdcall struct nt_slist *WIN_FUNC(ExpInterlockedPushEntrySList,2)
+	(nt_slist_header *head, struct nt_slist *entry)
+{
+	struct nt_slist *ret;
+
+	ret = PushEntrySList(head, entry, &nt_list_lock);
+	return ret;
+}
+
+wfastcall struct nt_slist *WIN_FUNC(InterlockedPushEntrySList,2)
+	(nt_slist_header *head, struct nt_slist *entry)
+{
+	struct nt_slist *ret;
+
+	ret = PushEntrySList(head, entry, &nt_list_lock);
+	return ret;
+}
+
+wfastcall struct nt_slist *WIN_FUNC(ExInterlockedPopEntrySList,2)
+	(nt_slist_header *head, NT_SPIN_LOCK *lock)
+{
+	struct nt_slist *ret;
+
+	ret = PopEntrySList(head, lock);
+	return ret;
+}
+
+wstdcall struct nt_slist *WIN_FUNC(ExpInterlockedPopEntrySList,1)
+	(nt_slist_header *head)
+{
+	struct nt_slist *ret;
+
+	ret = PopEntrySList(head, &nt_list_lock);
+	return ret;
+}
+
+wfastcall struct nt_slist *WIN_FUNC(InterlockedPopEntrySList,1)
+	(nt_slist_header *head)
+{
+	struct nt_slist *ret;
+
+	ret = PopEntrySList(head, &nt_list_lock);
+	return ret;
+}
+
+wstdcall USHORT WIN_FUNC(ExQueryDepthSList,1)
+	(nt_slist_header *head)
+{
+	USHORT depth;
+	ENTER5("%p", head);
+	depth = head->depth;
+	TRACE5("%d, %p", depth, head->next);
+	return depth;
+}
+
+wfastcall LONG WIN_FUNC(InterlockedIncrement,1)
+	(LONG volatile *val)
+{
+	return post_atomic_add(*val, 1);
+}
+
+wfastcall LONG WIN_FUNC(InterlockedDecrement,1)
+	(LONG volatile *val)
+{
+	return post_atomic_add(*val, -1);
+}
+
+wfastcall LONG WIN_FUNC(InterlockedExchange,2)
+	(LONG volatile *target, LONG val)
+{
+	return xchg(target, val);
+}
+
+wfastcall LONG WIN_FUNC(InterlockedCompareExchange,3)
+	(LONG volatile *dest, LONG new, LONG old)
+{
+	return cmpxchg(dest, old, new);
+}
+
+wfastcall void WIN_FUNC(ExInterlockedAddLargeStatistic,2)
+	(LARGE_INTEGER volatile *plint, ULONG n)
+{
+	unsigned long flags;
+
+	local_irq_save(flags);
+#ifdef CONFIG_X86_64
+	__asm__ __volatile__(
+		"\n"
+		LOCK_PREFIX "add %1, %0\n\t"
+		: "+m" (*plint)
+		: "r" (n));
+#else
+	__asm__ __volatile__(
+		"1:\t"
+		"   movl %1, %%ebx\n\t"
+		"   movl %%edx, %%ecx\n\t"
+		"   addl %%eax, %%ebx\n\t"
+		"   adcl $0, %%ecx\n\t"
+		    LOCK_PREFIX "cmpxchg8b %0\n\t"
+		"   jnz 1b\n\t"
+		: "+m" (*plint)
+		: "m" (n), "A" (*plint)
+		: "ebx", "ecx");
+#endif
+	local_irq_restore(flags);
+}
+
+static void initialize_object(struct dispatcher_header *dh, enum dh_type type,
+			      int state)
+{
+	memset(dh, 0, sizeof(*dh));
+	set_object_type(dh, type);
+	dh->signal_state = state;
+	InitializeListHead(&dh->wait_blocks);
+}
+
+static void timer_proc(unsigned long data)
+{
+	struct wrap_timer *wrap_timer = (struct wrap_timer *)data;
+	struct nt_timer *nt_timer;
+	struct kdpc *kdpc;
+
+	nt_timer = wrap_timer->nt_timer;
+	TIMERENTER("%p(%p), %lu", wrap_timer, nt_timer, jiffies);
+#ifdef TIMER_DEBUG
+	BUG_ON(wrap_timer->wrap_timer_magic != WRAP_TIMER_MAGIC);
+	BUG_ON(nt_timer->wrap_timer_magic != WRAP_TIMER_MAGIC);
+#endif
+	KeSetEvent((struct nt_event *)nt_timer, 0, FALSE);
+	if (wrap_timer->repeat)
+		mod_timer(&wrap_timer->timer, jiffies + wrap_timer->repeat);
+	kdpc = nt_timer->kdpc;
+	if (kdpc)
+		queue_kdpc(kdpc);
+	TIMEREXIT(return);
+}
+
+void wrap_init_timer(struct nt_timer *nt_timer, enum timer_type type,
+		     struct ndis_mp_block *nmb)
+{
+	struct wrap_timer *wrap_timer;
+
+	/* TODO: if a timer is initialized more than once, we allocate
+	 * memory for wrap_timer more than once for the same nt_timer,
+	 * wasting memory. We can check if nt_timer->wrap_timer_magic is
+	 * set and not allocate, but it is not guaranteed always to be
+	 * safe */
+	TIMERENTER("%p", nt_timer);
+	/* we allocate memory for wrap_timer behind driver's back and
+	 * there is no NDIS/DDK function where this memory can be
+	 * freed, so we use slack_kmalloc so it gets freed when driver
+	 * is unloaded */
+	if (nmb)
+		wrap_timer = kmalloc(sizeof(*wrap_timer), irql_gfp());
+	else
+		wrap_timer = slack_kmalloc(sizeof(*wrap_timer));
+	if (!wrap_timer) {
+		ERROR("couldn't allocate memory for timer");
+		return;
+	}
+
+	memset(wrap_timer, 0, sizeof(*wrap_timer));
+	init_timer(&wrap_timer->timer);
+	wrap_timer->timer.data = (unsigned long)wrap_timer;
+	wrap_timer->timer.function = timer_proc;
+	wrap_timer->nt_timer = nt_timer;
+#ifdef TIMER_DEBUG
+	wrap_timer->wrap_timer_magic = WRAP_TIMER_MAGIC;
+#endif
+	nt_timer->wrap_timer = wrap_timer;
+	nt_timer->kdpc = NULL;
+	initialize_object(&nt_timer->dh, type, 0);
+	nt_timer->wrap_timer_magic = WRAP_TIMER_MAGIC;
+	TIMERTRACE("timer %p (%p)", wrap_timer, nt_timer);
+	spin_lock_bh(&ntoskernel_lock);
+	if (nmb) {
+		wrap_timer->slist.next = nmb->wnd->wrap_timer_slist.next;
+		nmb->wnd->wrap_timer_slist.next = &wrap_timer->slist;
+	} else {
+		wrap_timer->slist.next = wrap_timer_slist.next;
+		wrap_timer_slist.next = &wrap_timer->slist;
+	}
+	spin_unlock_bh(&ntoskernel_lock);
+	TIMEREXIT(return);
+}
+
+wstdcall void WIN_FUNC(KeInitializeTimerEx,2)
+	(struct nt_timer *nt_timer, enum timer_type type)
+{
+	TIMERENTER("%p", nt_timer);
+	wrap_init_timer(nt_timer, type, NULL);
+}
+
+wstdcall void WIN_FUNC(KeInitializeTimer,1)
+	(struct nt_timer *nt_timer)
+{
+	TIMERENTER("%p", nt_timer);
+	wrap_init_timer(nt_timer, NotificationTimer, NULL);
+}
+
+/* expires and repeat are in HZ */
+BOOLEAN wrap_set_timer(struct nt_timer *nt_timer, unsigned long expires_hz,
+		       unsigned long repeat_hz, struct kdpc *kdpc)
+{
+	struct wrap_timer *wrap_timer;
+
+	TIMERENTER("%p, %lu, %lu, %p, %lu",
+		   nt_timer, expires_hz, repeat_hz, kdpc, jiffies);
+
+	wrap_timer = nt_timer->wrap_timer;
+	TIMERTRACE("%p", wrap_timer);
+#ifdef TIMER_DEBUG
+	if (wrap_timer->nt_timer != nt_timer)
+		WARNING("bad timers: %p, %p, %p", wrap_timer, nt_timer,
+			wrap_timer->nt_timer);
+	if (nt_timer->wrap_timer_magic != WRAP_TIMER_MAGIC) {
+		WARNING("buggy Windows timer didn't initialize timer %p",
+			nt_timer);
+		return FALSE;
+	}
+	if (wrap_timer->wrap_timer_magic != WRAP_TIMER_MAGIC) {
+		WARNING("timer %p is not initialized (%lx)?",
+			wrap_timer, wrap_timer->wrap_timer_magic);
+		wrap_timer->wrap_timer_magic = WRAP_TIMER_MAGIC;
+	}
+#endif
+	KeClearEvent((struct nt_event *)nt_timer);
+	nt_timer->kdpc = kdpc;
+	wrap_timer->repeat = repeat_hz;
+	if (mod_timer(&wrap_timer->timer, jiffies + expires_hz))
+		TIMEREXIT(return TRUE);
+	else
+		TIMEREXIT(return FALSE);
+}
+
+wstdcall BOOLEAN WIN_FUNC(KeSetTimerEx,4)
+	(struct nt_timer *nt_timer, LARGE_INTEGER duetime_ticks,
+	 LONG period_ms, struct kdpc *kdpc)
+{
+	unsigned long expires_hz, repeat_hz;
+
+	TIMERENTER("%p, %Ld, %d", nt_timer, duetime_ticks, period_ms);
+	expires_hz = SYSTEM_TIME_TO_HZ(duetime_ticks);
+	repeat_hz = MSEC_TO_HZ(period_ms);
+	return wrap_set_timer(nt_timer, expires_hz, repeat_hz, kdpc);
+}
+
+wstdcall BOOLEAN WIN_FUNC(KeSetTimer,3)
+	(struct nt_timer *nt_timer, LARGE_INTEGER duetime_ticks,
+	 struct kdpc *kdpc)
+{
+	TIMERENTER("%p, %Ld, %p", nt_timer, duetime_ticks, kdpc);
+	return KeSetTimerEx(nt_timer, duetime_ticks, 0, kdpc);
+}
+
+wstdcall BOOLEAN WIN_FUNC(KeCancelTimer,1)
+	(struct nt_timer *nt_timer)
+{
+	struct wrap_timer *wrap_timer;
+	int ret;
+
+	TIMERENTER("%p", nt_timer);
+	wrap_timer = nt_timer->wrap_timer;
+	if (!wrap_timer) {
+		ERROR("invalid wrap_timer");
+		return TRUE;
+	}
+#ifdef TIMER_DEBUG
+	BUG_ON(wrap_timer->wrap_timer_magic != WRAP_TIMER_MAGIC);
+#endif
+	/* disable timer before deleting so if it is periodic timer, it
+	 * won't be re-armed after deleting */
+	wrap_timer->repeat = 0;
+	ret = del_timer_sync(&wrap_timer->timer);
+	/* the documentation for KeCancelTimer suggests the DPC is
+	 * deqeued, but actually DPC is left to run */
+	if (ret)
+		TIMEREXIT(return TRUE);
+	else
+		TIMEREXIT(return FALSE);
+}
+
+wstdcall BOOLEAN WIN_FUNC(KeReadStateTimer,1)
+	(struct nt_timer *nt_timer)
+{
+	if (nt_timer->dh.signal_state)
+		return TRUE;
+	else
+		return FALSE;
+}
+
+wstdcall void WIN_FUNC(KeInitializeDpc,3)
+	(struct kdpc *kdpc, void *func, void *ctx)
+{
+	ENTER3("%p, %p, %p", kdpc, func, ctx);
+	memset(kdpc, 0, sizeof(*kdpc));
+	kdpc->func = func;
+	kdpc->ctx  = ctx;
+	InitializeListHead(&kdpc->list);
+}
+
+static void kdpc_worker(worker_param_t dummy)
+{
+	struct nt_list *entry;
+	struct kdpc *kdpc;
+	unsigned long flags;
+	KIRQL irql;
+
+	WORKENTER("");
+	irql = raise_irql(DISPATCH_LEVEL);
+	while (1) {
+		spin_lock_irqsave(&kdpc_list_lock, flags);
+		entry = RemoveHeadList(&kdpc_list);
+		if (entry) {
+			kdpc = container_of(entry, struct kdpc, list);
+			assert(kdpc->queued);
+			kdpc->queued = 0;
+		} else
+			kdpc = NULL;
+		spin_unlock_irqrestore(&kdpc_list_lock, flags);
+		if (!kdpc)
+			break;
+		WORKTRACE("%p, %p, %p, %p, %p", kdpc, kdpc->func, kdpc->ctx,
+			  kdpc->arg1, kdpc->arg2);
+		assert_irql(_irql_ == DISPATCH_LEVEL);
+		LIN2WIN4(kdpc->func, kdpc, kdpc->ctx, kdpc->arg1, kdpc->arg2);
+		assert_irql(_irql_ == DISPATCH_LEVEL);
+	}
+	lower_irql(irql);
+	WORKEXIT(return);
+}
+
+wstdcall void WIN_FUNC(KeFlushQueuedDpcs,0)
+	(void)
+{
+	kdpc_worker(NULL);
+}
+
+BOOLEAN queue_kdpc(struct kdpc *kdpc)
+{
+	BOOLEAN ret;
+	unsigned long flags;
+
+	WORKENTER("%p", kdpc);
+	spin_lock_irqsave(&kdpc_list_lock, flags);
+	if (kdpc->queued)
+		ret = FALSE;
+	else {
+		if (unlikely(kdpc->importance == HighImportance))
+			InsertHeadList(&kdpc_list, &kdpc->list);
+		else
+			InsertTailList(&kdpc_list, &kdpc->list);
+		kdpc->queued = 1;
+		ret = TRUE;
+	}
+	spin_unlock_irqrestore(&kdpc_list_lock, flags);
+	if (ret == TRUE)
+		schedule_ntos_work(&kdpc_work);
+	WORKTRACE("%d", ret);
+	return ret;
+}
+
+BOOLEAN dequeue_kdpc(struct kdpc *kdpc)
+{
+	BOOLEAN ret;
+	unsigned long flags;
+
+	WORKENTER("%p", kdpc);
+	spin_lock_irqsave(&kdpc_list_lock, flags);
+	if (kdpc->queued) {
+		RemoveEntryList(&kdpc->list);
+		kdpc->queued = 0;
+		ret = TRUE;
+	} else
+		ret = FALSE;
+	spin_unlock_irqrestore(&kdpc_list_lock, flags);
+	WORKTRACE("%d", ret);
+	return ret;
+}
+
+wstdcall BOOLEAN WIN_FUNC(KeInsertQueueDpc,3)
+	(struct kdpc *kdpc, void *arg1, void *arg2)
+{
+	WORKENTER("%p, %p, %p", kdpc, arg1, arg2);
+	kdpc->arg1 = arg1;
+	kdpc->arg2 = arg2;
+	return queue_kdpc(kdpc);
+}
+
+wstdcall BOOLEAN WIN_FUNC(KeRemoveQueueDpc,1)
+	(struct kdpc *kdpc)
+{
+	return dequeue_kdpc(kdpc);
+}
+
+wstdcall void WIN_FUNC(KeSetImportanceDpc,2)
+	(struct kdpc *kdpc, enum kdpc_importance importance)
+{
+	kdpc->importance = importance;
+}
+
+static void ntos_work_worker(worker_param_t dummy)
+{
+	struct ntos_work_item *ntos_work_item;
+	struct nt_list *cur;
+
+	while (1) {
+		spin_lock_bh(&ntos_work_lock);
+		cur = RemoveHeadList(&ntos_work_list);
+		spin_unlock_bh(&ntos_work_lock);
+		if (!cur)
+			break;
+		ntos_work_item = container_of(cur, struct ntos_work_item, list);
+		WORKTRACE("%p: executing %p, %p, %p", current,
+			  ntos_work_item->func, ntos_work_item->arg1,
+			  ntos_work_item->arg2);
+		LIN2WIN2(ntos_work_item->func, ntos_work_item->arg1,
+			 ntos_work_item->arg2);
+		kfree(ntos_work_item);
+	}
+	WORKEXIT(return);
+}
+
+int schedule_ntos_work_item(NTOS_WORK_FUNC func, void *arg1, void *arg2)
+{
+	struct ntos_work_item *ntos_work_item;
+
+	WORKENTER("adding work: %p, %p, %p", func, arg1, arg2);
+	ntos_work_item = kmalloc(sizeof(*ntos_work_item), irql_gfp());
+	if (!ntos_work_item) {
+		ERROR("couldn't allocate memory");
+		return -ENOMEM;
+	}
+	ntos_work_item->func = func;
+	ntos_work_item->arg1 = arg1;
+	ntos_work_item->arg2 = arg2;
+	spin_lock_bh(&ntos_work_lock);
+	InsertTailList(&ntos_work_list, &ntos_work_item->list);
+	spin_unlock_bh(&ntos_work_lock);
+	schedule_ntos_work(&ntos_work);
+	WORKEXIT(return 0);
+}
+
+wstdcall void WIN_FUNC(KeInitializeSpinLock,1)
+	(NT_SPIN_LOCK *lock)
+{
+	ENTER6("%p", lock);
+	nt_spin_lock_init(lock);
+}
+
+wstdcall void WIN_FUNC(KeAcquireSpinLock,2)
+	(NT_SPIN_LOCK *lock, KIRQL *irql)
+{
+	ENTER6("%p", lock);
+	*irql = nt_spin_lock_irql(lock, DISPATCH_LEVEL);
+}
+
+wstdcall void WIN_FUNC(KeReleaseSpinLock,2)
+	(NT_SPIN_LOCK *lock, KIRQL oldirql)
+{
+	ENTER6("%p", lock);
+	nt_spin_unlock_irql(lock, oldirql);
+}
+
+wstdcall void WIN_FUNC(KeAcquireSpinLockAtDpcLevel,1)
+	(NT_SPIN_LOCK *lock)
+{
+	ENTER6("%p", lock);
+	nt_spin_lock(lock);
+}
+
+wstdcall void WIN_FUNC(KeReleaseSpinLockFromDpcLevel,1)
+	(NT_SPIN_LOCK *lock)
+{
+	ENTER6("%p", lock);
+	nt_spin_unlock(lock);
+}
+
+wstdcall void WIN_FUNC(KeRaiseIrql,2)
+	(KIRQL newirql, KIRQL *oldirql)
+{
+	ENTER6("%d", newirql);
+	*oldirql = raise_irql(newirql);
+}
+
+wstdcall KIRQL WIN_FUNC(KeRaiseIrqlToDpcLevel,0)
+	(void)
+{
+	return raise_irql(DISPATCH_LEVEL);
+}
+
+wstdcall void WIN_FUNC(KeLowerIrql,1)
+	(KIRQL irql)
+{
+	ENTER6("%d", irql);
+	lower_irql(irql);
+}
+
+wstdcall KIRQL WIN_FUNC(KeAcquireSpinLockRaiseToDpc,1)
+	(NT_SPIN_LOCK *lock)
+{
+	ENTER6("%p", lock);
+	return nt_spin_lock_irql(lock, DISPATCH_LEVEL);
+}
+
+#undef ExAllocatePoolWithTag
+
+wstdcall void *WIN_FUNC(ExAllocatePoolWithTag,3)
+	(enum pool_type pool_type, SIZE_T size, ULONG tag)
+{
+	void *addr;
+
+	ENTER4("pool_type: %d, size: %lu, tag: 0x%x", pool_type, size, tag);
+	assert_irql(_irql_ <= DISPATCH_LEVEL);
+	if (size < PAGE_SIZE)
+		addr = kmalloc(size, irql_gfp());
+	else {
+		if (irql_gfp() & GFP_ATOMIC) {
+			addr = __vmalloc(size, GFP_ATOMIC | __GFP_HIGHMEM,
+					 PAGE_KERNEL);
+			TRACE1("%p, %lu", addr, size);
+		} else {
+			addr = vmalloc(size);
+			TRACE1("%p, %lu", addr, size);
+		}
+	}
+	DBG_BLOCK(1) {
+		if (addr)
+			TRACE4("addr: %p, %lu", addr, size);
+		else
+			TRACE1("failed: %lu", size);
+	}
+	return addr;
+}
+WIN_FUNC_DECL(ExAllocatePoolWithTag,3)
+
+wstdcall void WIN_FUNC(ExFreePoolWithTag,2)
+	(void *addr, ULONG tag)
+{
+	TRACE4("%p", addr);
+	if ((unsigned long)addr < VMALLOC_START ||
+	    (unsigned long)addr >= VMALLOC_END)
+		kfree(addr);
+	else
+		vfree(addr);
+
+	EXIT4(return);
+}
+
+wstdcall void WIN_FUNC(ExFreePool,1)
+	(void *addr)
+{
+	ExFreePoolWithTag(addr, 0);
+}
+WIN_FUNC_DECL(ExFreePool,1)
+
+wstdcall void WIN_FUNC(ExInitializeNPagedLookasideList,7)
+	(struct npaged_lookaside_list *lookaside,
+	 LOOKASIDE_ALLOC_FUNC *alloc_func, LOOKASIDE_FREE_FUNC *free_func,
+	 ULONG flags, SIZE_T size, ULONG tag, USHORT depth)
+{
+	ENTER3("lookaside: %p, size: %lu, flags: %u, head: %p, "
+	       "alloc: %p, free: %p", lookaside, size, flags,
+	       lookaside, alloc_func, free_func);
+
+	memset(lookaside, 0, sizeof(*lookaside));
+
+	lookaside->size = size;
+	lookaside->tag = tag;
+	lookaside->depth = 4;
+	lookaside->maxdepth = 256;
+	lookaside->pool_type = NonPagedPool;
+
+	if (alloc_func)
+		lookaside->alloc_func = alloc_func;
+	else
+		lookaside->alloc_func = WIN_FUNC_PTR(ExAllocatePoolWithTag,3);
+	if (free_func)
+		lookaside->free_func = free_func;
+	else
+		lookaside->free_func = WIN_FUNC_PTR(ExFreePool,1);
+
+#ifndef CONFIG_X86_64
+	nt_spin_lock_init(&lookaside->obsolete);
+#endif
+	EXIT3(return);
+}
+
+wstdcall void WIN_FUNC(ExDeleteNPagedLookasideList,1)
+	(struct npaged_lookaside_list *lookaside)
+{
+	struct nt_slist *entry;
+
+	ENTER3("lookaside = %p", lookaside);
+	while ((entry = ExpInterlockedPopEntrySList(&lookaside->head)))
+		LIN2WIN1(lookaside->free_func, entry);
+	EXIT3(return);
+}
+
+#if defined(ALLOC_DEBUG) && ALLOC_DEBUG > 1
+#define ExAllocatePoolWithTag(pool_type, size, tag)			\
+	wrap_ExAllocatePoolWithTag(pool_type, size, tag, __FILE__, __LINE__)
+#endif
+
+wstdcall NTSTATUS WIN_FUNC(ExCreateCallback,4)
+	(struct callback_object **object, struct object_attributes *attributes,
+	 BOOLEAN create, BOOLEAN allow_multiple_callbacks)
+{
+	struct callback_object *obj;
+
+	ENTER2("");
+	spin_lock_bh(&ntoskernel_lock);
+	nt_list_for_each_entry(obj, &callback_objects, callback_funcs) {
+		if (obj->attributes == attributes) {
+			spin_unlock_bh(&ntoskernel_lock);
+			*object = obj;
+			return STATUS_SUCCESS;
+		}
+	}
+	spin_unlock_bh(&ntoskernel_lock);
+	obj = allocate_object(sizeof(struct callback_object),
+			      OBJECT_TYPE_CALLBACK, NULL);
+	if (!obj)
+		EXIT2(return STATUS_INSUFFICIENT_RESOURCES);
+	InitializeListHead(&obj->callback_funcs);
+	nt_spin_lock_init(&obj->lock);
+	obj->allow_multiple_callbacks = allow_multiple_callbacks;
+	obj->attributes = attributes;
+	*object = obj;
+	EXIT2(return STATUS_SUCCESS);
+}
+
+wstdcall void *WIN_FUNC(ExRegisterCallback,3)
+	(struct callback_object *object, PCALLBACK_FUNCTION func, void *context)
+{
+	struct callback_func *callback;
+	KIRQL irql;
+
+	ENTER2("");
+	irql = nt_spin_lock_irql(&object->lock, DISPATCH_LEVEL);
+	if (object->allow_multiple_callbacks == FALSE &&
+	    !IsListEmpty(&object->callback_funcs)) {
+		nt_spin_unlock_irql(&object->lock, irql);
+		EXIT2(return NULL);
+	}
+	nt_spin_unlock_irql(&object->lock, irql);
+	callback = kmalloc(sizeof(*callback), GFP_KERNEL);
+	if (!callback) {
+		ERROR("couldn't allocate memory");
+		return NULL;
+	}
+	callback->func = func;
+	callback->context = context;
+	callback->object = object;
+	irql = nt_spin_lock_irql(&object->lock, DISPATCH_LEVEL);
+	InsertTailList(&object->callback_funcs, &callback->list);
+	nt_spin_unlock_irql(&object->lock, irql);
+	EXIT2(return callback);
+}
+
+wstdcall void WIN_FUNC(ExUnregisterCallback,1)
+	(struct callback_func *callback)
+{
+	struct callback_object *object;
+	KIRQL irql;
+
+	ENTER3("%p", callback);
+	if (!callback)
+		return;
+	object = callback->object;
+	irql = nt_spin_lock_irql(&object->lock, DISPATCH_LEVEL);
+	RemoveEntryList(&callback->list);
+	nt_spin_unlock_irql(&object->lock, irql);
+	kfree(callback);
+	return;
+}
+
+wstdcall void WIN_FUNC(ExNotifyCallback,3)
+	(struct callback_object *object, void *arg1, void *arg2)
+{
+	struct callback_func *callback;
+	KIRQL irql;
+
+	ENTER3("%p", object);
+	irql = nt_spin_lock_irql(&object->lock, DISPATCH_LEVEL);
+	nt_list_for_each_entry(callback, &object->callback_funcs, list) {
+		LIN2WIN3(callback->func, callback->context, arg1, arg2);
+	}
+	nt_spin_unlock_irql(&object->lock, irql);
+	return;
+}
+
+/* check and set signaled state; should be called with dispatcher_lock held */
+/* @grab indicates if the event should be grabbed or checked
+ * - note that a semaphore may stay in signaled state for multiple
+ * 'grabs' if the count is > 1 */
+static int grab_object(struct dispatcher_header *dh,
+		       struct task_struct *thread, int grab)
+{
+	EVENTTRACE("%p, %p, %d, %d", dh, thread, grab, dh->signal_state);
+	if (unlikely(is_mutex_object(dh))) {
+		struct nt_mutex *nt_mutex;
+		nt_mutex = container_of(dh, struct nt_mutex, dh);
+		EVENTTRACE("%p, %p, %d, %p, %d", nt_mutex,
+			   nt_mutex->owner_thread, dh->signal_state,
+			   thread, grab);
+		/* either no thread owns the mutex or this thread owns
+		 * it */
+		assert(dh->signal_state == 1 && nt_mutex->owner_thread == NULL);
+		assert(dh->signal_state < 1 && nt_mutex->owner_thread != NULL);
+		if ((dh->signal_state == 1 && nt_mutex->owner_thread == NULL) ||
+		    nt_mutex->owner_thread == thread) {
+			if (grab) {
+				dh->signal_state--;
+				nt_mutex->owner_thread = thread;
+			}
+			EVENTEXIT(return 1);
+		}
+	} else if (dh->signal_state > 0) {
+		/* to grab, decrement signal_state for synchronization
+		 * or semaphore objects */
+		if (grab && (is_synch_object(dh) || is_semaphore_object(dh)))
+			dh->signal_state--;
+		EVENTEXIT(return 1);
+	}
+	EVENTEXIT(return 0);
+}
+
+/* this function should be called holding dispatcher_lock */
+static void object_signalled(struct dispatcher_header *dh)
+{
+	struct nt_list *cur, *next;
+	struct wait_block *wb;
+
+	EVENTENTER("%p", dh);
+	nt_list_for_each_safe(cur, next, &dh->wait_blocks) {
+		wb = container_of(cur, struct wait_block, list);
+		assert(wb->thread != NULL);
+		assert(wb->object == NULL);
+		if (!grab_object(dh, wb->thread, 1))
+			continue;
+		EVENTTRACE("%p (%p): waking %p", dh, wb, wb->thread);
+		RemoveEntryList(cur);
+		wb->object = dh;
+		*(wb->wait_done) = 1;
+		wake_up_process(wb->thread);
+	}
+	EVENTEXIT(return);
+}
+
+wstdcall NTSTATUS WIN_FUNC(KeWaitForMultipleObjects,8)
+	(ULONG count, void *object[], enum wait_type wait_type,
+	 KWAIT_REASON wait_reason, KPROCESSOR_MODE wait_mode,
+	 BOOLEAN alertable, LARGE_INTEGER *timeout,
+	 struct wait_block *wait_block_array)
+{
+	int i, res = 0, wait_count, wait_done;
+	typeof(jiffies) wait_hz = 0;
+	struct wait_block *wb, wb_array[THREAD_WAIT_OBJECTS];
+	struct dispatcher_header *dh;
+
+	EVENTENTER("%p, %d, %u, %p", current, count, wait_type, timeout);
+
+	if (count > MAX_WAIT_OBJECTS ||
+	    (count > THREAD_WAIT_OBJECTS && wait_block_array == NULL))
+		EVENTEXIT(return STATUS_INVALID_PARAMETER);
+
+	if (wait_block_array == NULL)
+		wb = wb_array;
+	else
+		wb = wait_block_array;
+
+	/* If *timeout == 0: In the case of WaitAny, if an object can
+	 * be grabbed (object is in signaled state), grab and
+	 * return. In the case of WaitAll, we have to first make sure
+	 * all objects can be grabbed. If any/some of them can't be
+	 * grabbed, either we return STATUS_TIMEOUT or wait for them,
+	 * depending on how to satisfy wait. If all of them can be
+	 * grabbed, we will grab them in the next loop below */
+
+	spin_lock_bh(&dispatcher_lock);
+	for (i = wait_count = 0; i < count; i++) {
+		dh = object[i];
+		EVENTTRACE("%p: event %p (%d)", current, dh, dh->signal_state);
+		/* wait_type == 1 for WaitAny, 0 for WaitAll */
+		if (grab_object(dh, current, wait_type)) {
+			if (wait_type == WaitAny) {
+				spin_unlock_bh(&dispatcher_lock);
+				EVENTEXIT(return STATUS_WAIT_0 + i);
+			}
+		} else {
+			EVENTTRACE("%p: wait for %p", current, dh);
+			wait_count++;
+		}
+	}
+
+	if (timeout && *timeout == 0 && wait_count) {
+		spin_unlock_bh(&dispatcher_lock);
+		EVENTEXIT(return STATUS_TIMEOUT);
+	}
+
+	/* get the list of objects the thread needs to wait on and add
+	 * the thread on the wait list for each such object */
+	/* if *timeout == 0, this step will grab all the objects */
+	wait_done = 0;
+	for (i = 0; i < count; i++) {
+		dh = object[i];
+		EVENTTRACE("%p: event %p (%d)", current, dh, dh->signal_state);
+		wb[i].object = NULL;
+		if (grab_object(dh, current, 1)) {
+			EVENTTRACE("%p: no wait for %p (%d)",
+				   current, dh, dh->signal_state);
+			/* mark that we are not waiting on this object */
+			wb[i].thread = NULL;
+		} else {
+			wb[i].wait_done = &wait_done;
+			wb[i].thread = current;
+			EVENTTRACE("%p: wait for %p", current, dh);
+			InsertTailList(&dh->wait_blocks, &wb[i].list);
+		}
+	}
+	spin_unlock_bh(&dispatcher_lock);
+	if (wait_count == 0)
+		EVENTEXIT(return STATUS_SUCCESS);
+
+	assert(timeout == NULL || *timeout != 0);
+	if (timeout == NULL)
+		wait_hz = 0;
+	else
+		wait_hz = SYSTEM_TIME_TO_HZ(*timeout);
+
+	DBG_BLOCK(2) {
+		KIRQL irql = current_irql();
+		if (irql >= DISPATCH_LEVEL) {
+			TRACE2("wait in atomic context: %lu, %d, %ld",
+			       wait_hz, in_atomic(), in_interrupt());
+		}
+	}
+	assert_irql(_irql_ < DISPATCH_LEVEL);
+	EVENTTRACE("%p: sleep for %ld on %p", current, wait_hz, &wait_done);
+	/* we don't honor 'alertable' - according to decription for
+	 * this, even if waiting in non-alertable state, thread may be
+	 * alerted in some circumstances */
+	while (wait_count) {
+		res = wait_condition(wait_done, wait_hz, TASK_INTERRUPTIBLE);
+		spin_lock_bh(&dispatcher_lock);
+		EVENTTRACE("%p woke up: %d, %d", current, res, wait_done);
+		/* the event may have been set by the time
+		 * wrap_wait_event returned and spinlock obtained, so
+		 * don't rely on value of 'res' - check event status */
+		if (!wait_done) {
+			assert(res <= 0);
+			/* timed out or interrupted; remove from wait list */
+			for (i = 0; i < count; i++) {
+				if (!wb[i].thread)
+					continue;
+				EVENTTRACE("%p: timedout, dequeue %p (%p)",
+					   current, object[i], wb[i].object);
+				assert(wb[i].object == NULL);
+				RemoveEntryList(&wb[i].list);
+			}
+			spin_unlock_bh(&dispatcher_lock);
+			if (res < 0)
+				EVENTEXIT(return STATUS_ALERTED);
+			else
+				EVENTEXIT(return STATUS_TIMEOUT);
+		}
+		assert(res > 0);
+		/* woken because object(s) signalled */
+		for (i = 0; wait_count && i < count; i++) {
+			if (!wb[i].thread || !wb[i].object)
+				continue;
+			DBG_BLOCK(1) {
+				if (wb[i].object != object[i]) {
+					EVENTTRACE("oops %p != %p",
+						   wb[i].object, object[i]);
+					continue;
+				}
+			}
+			wait_count--;
+			if (wait_type == WaitAny) {
+				int j;
+				/* done; remove from rest of wait list */
+				for (j = i + 1; j < count; j++) {
+					if (wb[j].thread && !wb[j].object)
+						RemoveEntryList(&wb[j].list);
+				}
+				spin_unlock_bh(&dispatcher_lock);
+				EVENTEXIT(return STATUS_WAIT_0 + i);
+			}
+		}
+		wait_done = 0;
+		spin_unlock_bh(&dispatcher_lock);
+		if (wait_count == 0)
+			EVENTEXIT(return STATUS_SUCCESS);
+
+		/* this thread is still waiting for more objects, so
+		 * let it wait for remaining time and those objects */
+		if (timeout)
+			wait_hz = res;
+		else
+			wait_hz = 0;
+	}
+	/* should never reach here, but compiler wants return value */
+	ERROR("%p: wait_hz: %ld", current, wait_hz);
+	EVENTEXIT(return STATUS_SUCCESS);
+}
+
+wstdcall NTSTATUS WIN_FUNC(KeWaitForSingleObject,5)
+	(void *object, KWAIT_REASON wait_reason, KPROCESSOR_MODE wait_mode,
+	 BOOLEAN alertable, LARGE_INTEGER *timeout)
+{
+	return KeWaitForMultipleObjects(1, &object, WaitAny, wait_reason,
+					wait_mode, alertable, timeout, NULL);
+}
+
+wstdcall void WIN_FUNC(KeInitializeEvent,3)
+	(struct nt_event *nt_event, enum event_type type, BOOLEAN state)
+{
+	EVENTENTER("event = %p, type = %d, state = %d", nt_event, type, state);
+	initialize_object(&nt_event->dh, type, state);
+	EVENTEXIT(return);
+}
+
+wstdcall LONG WIN_FUNC(KeSetEvent,3)
+	(struct nt_event *nt_event, KPRIORITY incr, BOOLEAN wait)
+{
+	LONG old_state;
+
+	EVENTENTER("%p, %d", nt_event, nt_event->dh.type);
+	if (wait == TRUE)
+		WARNING("wait = %d, not yet implemented", wait);
+	spin_lock_bh(&dispatcher_lock);
+	old_state = nt_event->dh.signal_state;
+	nt_event->dh.signal_state = 1;
+	if (old_state == 0)
+		object_signalled(&nt_event->dh);
+	spin_unlock_bh(&dispatcher_lock);
+	EVENTEXIT(return old_state);
+}
+
+wstdcall void WIN_FUNC(KeClearEvent,1)
+	(struct nt_event *nt_event)
+{
+	EVENTENTER("%p", nt_event);
+	nt_event->dh.signal_state = 0;
+	EVENTEXIT(return);
+}
+
+wstdcall LONG WIN_FUNC(KeResetEvent,1)
+	(struct nt_event *nt_event)
+{
+	LONG old_state;
+
+	EVENTENTER("%p", nt_event);
+	old_state = xchg(&nt_event->dh.signal_state, 0);
+	EVENTEXIT(return old_state);
+}
+
+wstdcall LONG WIN_FUNC(KeReadStateEvent,1)
+	(struct nt_event *nt_event)
+{
+	LONG state;
+
+	state = nt_event->dh.signal_state;
+	EVENTTRACE("%d", state);
+	return state;
+}
+
+wstdcall void WIN_FUNC(KeInitializeMutex,2)
+	(struct nt_mutex *mutex, ULONG level)
+{
+	EVENTENTER("%p", mutex);
+	initialize_object(&mutex->dh, MutexObject, 1);
+	mutex->dh.size = sizeof(*mutex);
+	InitializeListHead(&mutex->list);
+	mutex->abandoned = FALSE;
+	mutex->apc_disable = 1;
+	mutex->owner_thread = NULL;
+	EVENTEXIT(return);
+}
+
+wstdcall LONG WIN_FUNC(KeReleaseMutex,2)
+	(struct nt_mutex *mutex, BOOLEAN wait)
+{
+	LONG ret;
+	struct task_struct *thread;
+
+	EVENTENTER("%p, %d, %p", mutex, wait, current);
+	if (wait == TRUE)
+		WARNING("wait: %d", wait);
+	thread = current;
+	spin_lock_bh(&dispatcher_lock);
+	EVENTTRACE("%p, %p, %p, %d", mutex, thread, mutex->owner_thread,
+		   mutex->dh.signal_state);
+	if ((mutex->owner_thread == thread) && (mutex->dh.signal_state <= 0)) {
+		ret = mutex->dh.signal_state++;
+		if (ret == 0) {
+			mutex->owner_thread = NULL;
+			object_signalled(&mutex->dh);
+		}
+	} else {
+		ret = STATUS_MUTANT_NOT_OWNED;
+		WARNING("invalid mutex: %p, %p, %p", mutex, mutex->owner_thread,
+			thread);
+	}
+	EVENTTRACE("%p, %p, %p, %d", mutex, thread, mutex->owner_thread,
+		   mutex->dh.signal_state);
+	spin_unlock_bh(&dispatcher_lock);
+	EVENTEXIT(return ret);
+}
+
+wstdcall void WIN_FUNC(KeInitializeSemaphore,3)
+	(struct nt_semaphore *semaphore, LONG count, LONG limit)
+{
+	EVENTENTER("%p: %d", semaphore, count);
+	/* if limit > 1, we need to satisfy as many waits (until count
+	 * becomes 0); so we keep decrementing count everytime a wait
+	 * is satisified */
+	initialize_object(&semaphore->dh, SemaphoreObject, count);
+	semaphore->dh.size = sizeof(*semaphore);
+	semaphore->limit = limit;
+	EVENTEXIT(return);
+}
+
+wstdcall LONG WIN_FUNC(KeReleaseSemaphore,4)
+	(struct nt_semaphore *semaphore, KPRIORITY incr, LONG adjustment,
+	 BOOLEAN wait)
+{
+	LONG ret;
+
+	EVENTENTER("%p", semaphore);
+	spin_lock_bh(&dispatcher_lock);
+	ret = semaphore->dh.signal_state;
+	assert(ret >= 0);
+	if (semaphore->dh.signal_state + adjustment <= semaphore->limit)
+		semaphore->dh.signal_state += adjustment;
+	else {
+		WARNING("releasing %d over limit %d", adjustment,
+			semaphore->limit);
+		semaphore->dh.signal_state = semaphore->limit;
+	}
+	if (semaphore->dh.signal_state > 0)
+		object_signalled(&semaphore->dh);
+	spin_unlock_bh(&dispatcher_lock);
+	EVENTEXIT(return ret);
+}
+
+wstdcall NTSTATUS WIN_FUNC(KeDelayExecutionThread,3)
+	(KPROCESSOR_MODE wait_mode, BOOLEAN alertable, LARGE_INTEGER *interval)
+{
+	int res;
+	long timeout;
+
+	if (wait_mode != 0)
+		ERROR("invalid wait_mode %d", wait_mode);
+
+	timeout = SYSTEM_TIME_TO_HZ(*interval);
+	EVENTTRACE("%p, %Ld, %ld", current, *interval, timeout);
+	if (timeout <= 0)
+		EVENTEXIT(return STATUS_SUCCESS);
+
+	if (alertable)
+		set_current_state(TASK_INTERRUPTIBLE);
+	else
+		set_current_state(TASK_UNINTERRUPTIBLE);
+
+	res = schedule_timeout(timeout);
+	EVENTTRACE("%p, %d", current, res);
+	if (res == 0)
+		EVENTEXIT(return STATUS_SUCCESS);
+	else
+		EVENTEXIT(return STATUS_ALERTED);
+}
+
+wstdcall ULONGLONG WIN_FUNC(KeQueryInterruptTime,0)
+	(void)
+{
+	EXIT5(return jiffies * TICKSPERJIFFY);
+}
+
+wstdcall ULONG WIN_FUNC(KeQueryTimeIncrement,0)
+	(void)
+{
+	EXIT5(return TICKSPERSEC / HZ);
+}
+
+wstdcall void WIN_FUNC(KeQuerySystemTime,1)
+	(LARGE_INTEGER *time)
+{
+	*time = ticks_1601();
+	TRACE5("%Lu, %lu", *time, jiffies);
+}
+
+wstdcall void WIN_FUNC(KeQueryTickCount,1)
+	(LARGE_INTEGER *count)
+{
+	*count = jiffies;
+}
+
+wstdcall LARGE_INTEGER WIN_FUNC(KeQueryPerformanceCounter,1)
+	(LARGE_INTEGER *counter)
+{
+	if (counter)
+		*counter = HZ;
+	return jiffies;
+}
+
+wstdcall KAFFINITY WIN_FUNC(KeQueryActiveProcessors,0)
+	(void)
+{
+	int i, n;
+	KAFFINITY bits = 0;
+#ifdef num_online_cpus
+	n = num_online_cpus();
+#else
+	n = NR_CPUS;
+#endif
+	for (i = 0; i < n; i++)
+		bits = (bits << 1) | 1;
+	return bits;
+}
+
+struct nt_thread *get_current_nt_thread(void)
+{
+	struct task_struct *task = current;
+	struct nt_thread *thread;
+	struct common_object_header *header;
+
+	TRACE6("task: %p", task);
+	thread = NULL;
+	spin_lock_bh(&ntoskernel_lock);
+	nt_list_for_each_entry(header, &object_list, list) {
+		TRACE6("%p, %d", header, header->type);
+		if (header->type != OBJECT_TYPE_NT_THREAD)
+			break;
+		thread = HEADER_TO_OBJECT(header);
+		TRACE6("%p, %p", thread, thread->task);
+		if (thread->task == task)
+			break;
+		else
+			thread = NULL;
+	}
+	spin_unlock_bh(&ntoskernel_lock);
+	if (thread == NULL)
+		TRACE4("couldn't find thread for task %p, %d", task, task->pid);
+	TRACE6("%p", thread);
+	return thread;
+}
+
+static struct task_struct *get_nt_thread_task(struct nt_thread *thread)
+{
+	struct task_struct *task;
+	struct common_object_header *header;
+
+	TRACE6("%p", thread);
+	task = NULL;
+	spin_lock_bh(&ntoskernel_lock);
+	nt_list_for_each_entry(header, &object_list, list) {
+		TRACE6("%p, %d", header, header->type);
+		if (header->type != OBJECT_TYPE_NT_THREAD)
+			break;
+		if (thread == HEADER_TO_OBJECT(header)) {
+			task = thread->task;
+			break;
+		}
+	}
+	spin_unlock_bh(&ntoskernel_lock);
+	if (task == NULL)
+		TRACE2("%p: couldn't find task for %p", current, thread);
+	return task;
+}
+
+static struct nt_thread *create_nt_thread(struct task_struct *task)
+{
+	struct nt_thread *thread;
+	thread = allocate_object(sizeof(*thread), OBJECT_TYPE_NT_THREAD, NULL);
+	if (!thread) {
+		ERROR("couldn't allocate thread object");
+		EXIT2(return NULL);
+	}
+	thread->task = task;
+	if (task)
+		thread->pid = task->pid;
+	else
+		thread->pid = 0;
+	nt_spin_lock_init(&thread->lock);
+	InitializeListHead(&thread->irps);
+	initialize_object(&thread->dh, ThreadObject, 0);
+	thread->dh.size = sizeof(*thread);
+	thread->prio = LOW_PRIORITY;
+	return thread;
+}
+
+wstdcall struct nt_thread *WIN_FUNC(KeGetCurrentThread,0)
+	(void)
+{
+	struct nt_thread *thread = get_current_nt_thread();
+	TRACE2("%p, %p", thread, current);
+	return thread;
+}
+
+wstdcall KPRIORITY WIN_FUNC(KeQueryPriorityThread,1)
+	(struct nt_thread *thread)
+{
+	KPRIORITY prio;
+	struct task_struct *task;
+
+	TRACE2("%p", thread);
+#ifdef CONFIG_X86_64
+	/* sis163u driver for amd64 passes 0x1f from thread created by
+	 * PsCreateSystemThread - no idea what is 0x1f */
+	if (thread == (void *)0x1f)
+		thread = get_current_nt_thread();
+#endif
+	if (!thread) {
+		TRACE2("invalid thread");
+		EXIT2(return LOW_REALTIME_PRIORITY);
+	}
+	task = get_nt_thread_task(thread);
+	if (!task) {
+		TRACE2("couldn't find task for thread: %p", thread);
+		EXIT2(return LOW_REALTIME_PRIORITY);
+	}
+
+	prio = thread->prio;
+
+	TRACE2("%d", prio);
+	return prio;
+}
+
+wstdcall KPRIORITY WIN_FUNC(KeSetPriorityThread,2)
+	(struct nt_thread *thread, KPRIORITY prio)
+{
+	KPRIORITY old_prio;
+	struct task_struct *task;
+
+	TRACE2("thread: %p, priority = %u", thread, prio);
+#ifdef CONFIG_X86_64
+	if (thread == (void *)0x1f)
+		thread = get_current_nt_thread();
+#endif
+	if (!thread) {
+		TRACE2("invalid thread");
+		EXIT2(return LOW_REALTIME_PRIORITY);
+	}
+	task = get_nt_thread_task(thread);
+	if (!task) {
+		TRACE2("couldn't find task for thread: %p", thread);
+		EXIT2(return LOW_REALTIME_PRIORITY);
+	}
+
+	old_prio = thread->prio;
+	thread->prio = prio;
+
+	TRACE2("%d, %d", old_prio, thread->prio);
+	return old_prio;
+}
+
+struct thread_trampoline {
+	void (*func)(void *) wstdcall;
+	void *ctx;
+	struct nt_thread *thread;
+	struct completion started;
+};
+
+static int ntdriver_thread(void *data)
+{
+	struct thread_trampoline *thread_tramp = data;
+	/* yes, a tramp! */
+	typeof(thread_tramp->func) func = thread_tramp->func;
+	typeof(thread_tramp->ctx) ctx = thread_tramp->ctx;
+
+	thread_tramp->thread->task = current;
+	thread_tramp->thread->pid = current->pid;
+	TRACE2("thread: %p, task: %p (%d)", thread_tramp->thread,
+	       current, current->pid);
+	complete(&thread_tramp->started);
+
+#ifdef PF_NOFREEZE
+	current->flags |= PF_NOFREEZE;
+#endif
+	strncpy(current->comm, "ntdriver", sizeof(current->comm));
+	current->comm[sizeof(current->comm)-1] = 0;
+	LIN2WIN1(func, ctx);
+	ERROR("task: %p", current);
+	return 0;
+}
+
+wstdcall NTSTATUS WIN_FUNC(PsCreateSystemThread,7)
+	(void **handle, ULONG access, void *obj_attr, void *process,
+	 void *client_id, void (*func)(void *) wstdcall, void *ctx)
+{
+	struct thread_trampoline thread_tramp;
+
+	ENTER2("handle = %p, access = %u, obj_attr = %p, process = %p, "
+	       "client_id = %p, func = %p, context = %p", handle, access,
+	       obj_attr, process, client_id, func, ctx);
+
+	thread_tramp.thread = create_nt_thread(NULL);
+	if (!thread_tramp.thread) {
+		ERROR("couldn't allocate thread object");
+		EXIT2(return STATUS_RESOURCES);
+	}
+	TRACE2("thread: %p", thread_tramp.thread);
+	thread_tramp.func = func;
+	thread_tramp.ctx = ctx;
+	init_completion(&thread_tramp.started);
+
+	thread_tramp.thread->task = kthread_run(ntdriver_thread,
+						&thread_tramp, "ntdriver");
+	if (IS_ERR(thread_tramp.thread->task)) {
+		free_object(thread_tramp.thread);
+		EXIT2(return STATUS_FAILURE);
+	}
+	TRACE2("created task: %p", thread_tramp.thread->task);
+
+	wait_for_completion(&thread_tramp.started);
+	*handle = OBJECT_TO_HEADER(thread_tramp.thread);
+	TRACE2("created thread: %p, %p", thread_tramp.thread, *handle);
+	EXIT2(return STATUS_SUCCESS);
+}
+
+wstdcall NTSTATUS WIN_FUNC(PsTerminateSystemThread,1)
+	(NTSTATUS status)
+{
+	struct nt_thread *thread;
+
+	TRACE2("%p, %08X", current, status);
+	thread = get_current_nt_thread();
+	TRACE2("%p", thread);
+	if (thread) {
+		KeSetEvent((struct nt_event *)&thread->dh, 0, FALSE);
+		while (1) {
+			struct nt_list *ent;
+			struct irp *irp;
+			KIRQL irql;
+			irql = nt_spin_lock_irql(&thread->lock, DISPATCH_LEVEL);
+			ent = RemoveHeadList(&thread->irps);
+			nt_spin_unlock_irql(&thread->lock, irql);
+			if (!ent)
+				break;
+			irp = container_of(ent, struct irp, thread_list);
+			IOTRACE("%p", irp);
+			IoCancelIrp(irp);
+		}
+		/* the driver may later query this status with
+		 * ZwQueryInformationThread */
+		thread->status = status;
+	} else
+		ERROR("couldn't find thread for task: %p", current);
+
+	complete_and_exit(NULL, status);
+	ERROR("oops: %p, %d", thread->task, thread->pid);
+	return STATUS_FAILURE;
+}
+
+wstdcall BOOLEAN WIN_FUNC(KeRemoveEntryDeviceQueue,2)
+	(struct kdevice_queue *dev_queue, struct kdevice_queue_entry *entry)
+{
+	struct kdevice_queue_entry *e;
+	KIRQL irql;
+
+	irql = nt_spin_lock_irql(&dev_queue->lock, DISPATCH_LEVEL);
+	nt_list_for_each_entry(e, &dev_queue->list, list) {
+		if (e == entry) {
+			RemoveEntryList(&e->list);
+			nt_spin_unlock_irql(&dev_queue->lock, irql);
+			return TRUE;
+		}
+	}
+	nt_spin_unlock_irql(&dev_queue->lock, irql);
+	return FALSE;
+}
+
+wstdcall BOOLEAN WIN_FUNC(KeSynchronizeExecution,3)
+	(struct kinterrupt *interrupt, PKSYNCHRONIZE_ROUTINE synch_routine,
+	 void *ctx)
+{
+	BOOLEAN ret;
+	unsigned long flags;
+
+	nt_spin_lock_irqsave(interrupt->actual_lock, flags);
+	ret = LIN2WIN1(synch_routine, ctx);
+	nt_spin_unlock_irqrestore(interrupt->actual_lock, flags);
+	TRACE6("%d", ret);
+	return ret;
+}
+
+wstdcall void *WIN_FUNC(MmAllocateContiguousMemorySpecifyCache,5)
+	(SIZE_T size, PHYSICAL_ADDRESS lowest, PHYSICAL_ADDRESS highest,
+	 PHYSICAL_ADDRESS boundary, enum memory_caching_type cache_type)
+{
+	void *addr;
+	gfp_t flags;
+
+	ENTER2("%lu, 0x%lx, 0x%lx, 0x%lx, %d", size, (long)lowest,
+	       (long)highest, (long)boundary, cache_type);
+	flags = irql_gfp();
+	addr = wrap_get_free_pages(flags, size);
+	TRACE2("%p, %lu, 0x%x", addr, size, flags);
+	if (addr && ((virt_to_phys(addr) + size) <= highest))
+		EXIT2(return addr);
+#ifdef CONFIG_X86_64
+	/* GFP_DMA is really only 16MB even on x86-64, but there is no
+	 * other zone available */
+	if (highest <= DMA_BIT_MASK(31))
+		flags |= __GFP_DMA;
+	else if (highest <= DMA_BIT_MASK(32))
+		flags |= __GFP_DMA32;
+#else
+	if (highest <= DMA_BIT_MASK(24))
+		flags |= __GFP_DMA;
+	else if (highest > DMA_BIT_MASK(30))
+		flags |= __GFP_HIGHMEM;
+#endif
+	addr = wrap_get_free_pages(flags, size);
+	TRACE2("%p, %lu, 0x%x", addr, size, flags);
+	return addr;
+}
+
+wstdcall void WIN_FUNC(MmFreeContiguousMemorySpecifyCache,3)
+	(void *base, SIZE_T size, enum memory_caching_type cache_type)
+{
+	TRACE2("%p, %lu", base, size);
+	free_pages((unsigned long)base, get_order(size));
+}
+
+wstdcall PHYSICAL_ADDRESS WIN_FUNC(MmGetPhysicalAddress,1)
+	(void *base)
+{
+	unsigned long phy = virt_to_phys(base);
+	TRACE2("%p, %p", base, (void *)phy);
+	return phy;
+}
+
+/* Atheros card with pciid 168C:0014 calls this function with 0xf0000
+ * and 0xf6ef0 address, and then check for things that seem to be
+ * related to ACPI: "_SM_" and "_DMI_". This may be the hack they do
+ * to check if this card is installed in IBM thinkpads; we can
+ * probably get this device to work if we create a buffer with the
+ * strings as required by the driver and return virtual address for
+ * that address instead */
+wstdcall void __iomem *WIN_FUNC(MmMapIoSpace,3)
+	(PHYSICAL_ADDRESS phys_addr, SIZE_T size,
+	 enum memory_caching_type cache)
+{
+	void __iomem *virt;
+	ENTER1("cache type: %d", cache);
+	if (cache == MmCached)
+		virt = ioremap(phys_addr, size);
+	else
+		virt = ioremap_nocache(phys_addr, size);
+	TRACE1("%Lx, %lu, %p", phys_addr, size, virt);
+	return virt;
+}
+
+wstdcall void WIN_FUNC(MmUnmapIoSpace,2)
+	(void __iomem *addr, SIZE_T size)
+{
+	ENTER1("%p, %lu", addr, size);
+	iounmap(addr);
+	return;
+}
+
+wstdcall ULONG WIN_FUNC(MmSizeOfMdl,2)
+	(void *base, ULONG length)
+{
+	return sizeof(struct mdl) +
+	       (sizeof(PFN_NUMBER) * SPAN_PAGES(base, length));
+}
+
+struct mdl *allocate_init_mdl(void *virt, ULONG length)
+{
+	struct wrap_mdl *wrap_mdl;
+	struct mdl *mdl;
+	int mdl_size = MmSizeOfMdl(virt, length);
+
+	if (mdl_size <= MDL_CACHE_SIZE) {
+		wrap_mdl = kmem_cache_alloc(mdl_cache, irql_gfp());
+		if (!wrap_mdl)
+			return NULL;
+		spin_lock_bh(&dispatcher_lock);
+		InsertHeadList(&wrap_mdl_list, &wrap_mdl->list);
+		spin_unlock_bh(&dispatcher_lock);
+		mdl = wrap_mdl->mdl;
+		TRACE3("allocated mdl from cache: %p(%p), %p(%d)",
+		       wrap_mdl, mdl, virt, length);
+		memset(mdl, 0, MDL_CACHE_SIZE);
+		MmInitializeMdl(mdl, virt, length);
+		/* mark the MDL as allocated from cache pool so when
+		 * it is freed, we free it back to the pool */
+		mdl->flags = MDL_ALLOCATED_FIXED_SIZE | MDL_CACHE_ALLOCATED;
+	} else {
+		wrap_mdl =
+			kmalloc(sizeof(*wrap_mdl) + mdl_size, irql_gfp());
+		if (!wrap_mdl)
+			return NULL;
+		mdl = wrap_mdl->mdl;
+		TRACE3("allocated mdl from memory: %p(%p), %p(%d)",
+		       wrap_mdl, mdl, virt, length);
+		spin_lock_bh(&dispatcher_lock);
+		InsertHeadList(&wrap_mdl_list, &wrap_mdl->list);
+		spin_unlock_bh(&dispatcher_lock);
+		memset(mdl, 0, mdl_size);
+		MmInitializeMdl(mdl, virt, length);
+		mdl->flags = MDL_ALLOCATED_FIXED_SIZE;
+	}
+	return mdl;
+}
+
+void free_mdl(struct mdl *mdl)
+{
+	/* A driver may allocate Mdl with NdisAllocateBuffer and free
+	 * with IoFreeMdl (e.g., 64-bit Broadcom). Since we need to
+	 * treat buffers allocated with Ndis calls differently, we
+	 * must call NdisFreeBuffer if it is allocated with Ndis
+	 * function. We set 'pool' field in Ndis functions. */
+	if (!mdl)
+		return;
+	if (mdl->pool)
+		NdisFreeBuffer(mdl);
+	else {
+		struct wrap_mdl *wrap_mdl = (struct wrap_mdl *)
+			((char *)mdl - offsetof(struct wrap_mdl, mdl));
+		spin_lock_bh(&dispatcher_lock);
+		RemoveEntryList(&wrap_mdl->list);
+		spin_unlock_bh(&dispatcher_lock);
+
+		if (mdl->flags & MDL_CACHE_ALLOCATED) {
+			TRACE3("freeing mdl cache: %p, %p, %p",
+			       wrap_mdl, mdl, mdl->mappedsystemva);
+			kmem_cache_free(mdl_cache, wrap_mdl);
+		} else {
+			TRACE3("freeing mdl: %p, %p, %p",
+			       wrap_mdl, mdl, mdl->mappedsystemva);
+			kfree(wrap_mdl);
+		}
+	}
+	return;
+}
+
+wstdcall void WIN_FUNC(IoBuildPartialMdl,4)
+	(struct mdl *source, struct mdl *target, void *virt, ULONG length)
+{
+	MmInitializeMdl(target, virt, length);
+	target->flags |= MDL_PARTIAL;
+}
+
+wstdcall void WIN_FUNC(MmBuildMdlForNonPagedPool,1)
+	(struct mdl *mdl)
+{
+	PFN_NUMBER *mdl_pages;
+	int i, n;
+
+	ENTER4("%p", mdl);
+	/* already mapped */
+//	mdl->mappedsystemva = MmGetMdlVirtualAddress(mdl);
+	mdl->flags |= MDL_SOURCE_IS_NONPAGED_POOL;
+	TRACE4("%p, %p, %p, %d, %d", mdl, mdl->mappedsystemva, mdl->startva,
+	       mdl->byteoffset, mdl->bytecount);
+	n = SPAN_PAGES(MmGetSystemAddressForMdl(mdl), MmGetMdlByteCount(mdl));
+	if (n > MDL_CACHE_PAGES)
+		WARNING("%p, %d, %d", MmGetSystemAddressForMdl(mdl),
+			MmGetMdlByteCount(mdl), n);
+	mdl_pages = MmGetMdlPfnArray(mdl);
+	for (i = 0; i < n; i++)
+		mdl_pages[i] = (ULONG_PTR)mdl->startva + (i * PAGE_SIZE);
+	EXIT4(return);
+}
+
+wstdcall void *WIN_FUNC(MmMapLockedPages,2)
+	(struct mdl *mdl, KPROCESSOR_MODE access_mode)
+{
+	/* already mapped */
+//	mdl->mappedsystemva = MmGetMdlVirtualAddress(mdl);
+	mdl->flags |= MDL_MAPPED_TO_SYSTEM_VA;
+	/* what is the need for MDL_PARTIAL_HAS_BEEN_MAPPED? */
+	if (mdl->flags & MDL_PARTIAL)
+		mdl->flags |= MDL_PARTIAL_HAS_BEEN_MAPPED;
+	return mdl->mappedsystemva;
+}
+
+wstdcall void *WIN_FUNC(MmMapLockedPagesSpecifyCache,6)
+	(struct mdl *mdl, KPROCESSOR_MODE access_mode,
+	 enum memory_caching_type cache_type, void *base_address,
+	 ULONG bug_check, enum mm_page_priority priority)
+{
+	return MmMapLockedPages(mdl, access_mode);
+}
+
+wstdcall void WIN_FUNC(MmUnmapLockedPages,2)
+	(void *base, struct mdl *mdl)
+{
+	mdl->flags &= ~MDL_MAPPED_TO_SYSTEM_VA;
+	return;
+}
+
+wstdcall void WIN_FUNC(MmProbeAndLockPages,3)
+	(struct mdl *mdl, KPROCESSOR_MODE access_mode,
+	 enum lock_operation operation)
+{
+	/* already locked */
+	mdl->flags |= MDL_PAGES_LOCKED;
+	return;
+}
+
+wstdcall void WIN_FUNC(MmUnlockPages,1)
+	(struct mdl *mdl)
+{
+	mdl->flags &= ~MDL_PAGES_LOCKED;
+	return;
+}
+
+wstdcall BOOLEAN WIN_FUNC(MmIsAddressValid,1)
+	(void *virt_addr)
+{
+	if (virt_addr_valid(virt_addr))
+		return TRUE;
+	else
+		return FALSE;
+}
+
+wstdcall void *WIN_FUNC(MmLockPagableDataSection,1)
+	(void *address)
+{
+	return address;
+}
+
+wstdcall void WIN_FUNC(MmUnlockPagableImageSection,1)
+	(void *handle)
+{
+	return;
+}
+
+wstdcall NTSTATUS WIN_FUNC(ObReferenceObjectByHandle,6)
+	(void *handle, ACCESS_MASK desired_access, void *obj_type,
+	 KPROCESSOR_MODE access_mode, void **object, void *handle_info)
+{
+	struct common_object_header *hdr;
+
+	TRACE2("%p", handle);
+	hdr = HANDLE_TO_HEADER(handle);
+	atomic_inc_var(hdr->ref_count);
+	*object = HEADER_TO_OBJECT(hdr);
+	TRACE2("%p, %p, %d, %p", hdr, object, hdr->ref_count, *object);
+	return STATUS_SUCCESS;
+}
+
+/* DDK doesn't say if return value should be before incrementing or
+ * after incrementing reference count, but according to #reactos
+ * devels, it should be return value after incrementing */
+wfastcall LONG WIN_FUNC(ObfReferenceObject,1)
+	(void *object)
+{
+	struct common_object_header *hdr;
+	LONG ret;
+
+	hdr = OBJECT_TO_HEADER(object);
+	ret = post_atomic_add(hdr->ref_count, 1);
+	TRACE2("%p, %d, %p", hdr, hdr->ref_count, object);
+	return ret;
+}
+
+static int dereference_object(void *object)
+{
+	struct common_object_header *hdr;
+	int ref_count;
+
+	ENTER2("object: %p", object);
+	hdr = OBJECT_TO_HEADER(object);
+	TRACE2("hdr: %p", hdr);
+	ref_count = post_atomic_add(hdr->ref_count, -1);
+	TRACE2("object: %p, %d", object, ref_count);
+	if (ref_count < 0)
+		ERROR("invalid object: %p (%d)", object, ref_count);
+	if (ref_count <= 0) {
+		free_object(object);
+		return 1;
+	} else
+		return 0;
+}
+
+wfastcall void WIN_FUNC(ObfDereferenceObject,1)
+	(void *object)
+{
+	TRACE2("%p", object);
+	dereference_object(object);
+}
+
+wstdcall NTSTATUS WIN_FUNC(ZwCreateFile,11)
+	(void **handle, ACCESS_MASK access_mask,
+	 struct object_attributes *obj_attr, struct io_status_block *iosb,
+	 LARGE_INTEGER *size, ULONG file_attr, ULONG share_access,
+	 ULONG create_disposition, ULONG create_options, void *ea_buffer,
+	 ULONG ea_length)
+{
+	struct common_object_header *coh;
+	struct file_object *fo;
+	struct ansi_string ansi;
+	struct wrap_bin_file *bin_file;
+	char *file_basename;
+	NTSTATUS status;
+
+	spin_lock_bh(&ntoskernel_lock);
+	nt_list_for_each_entry(coh, &object_list, list) {
+		if (coh->type != OBJECT_TYPE_FILE)
+			continue;
+		/* TODO: check if file is opened in shared mode */
+		if (!RtlCompareUnicodeString(&coh->name, obj_attr->name, TRUE)) {
+			fo = HEADER_TO_OBJECT(coh);
+			bin_file = fo->wrap_bin_file;
+			*handle = coh;
+			spin_unlock_bh(&ntoskernel_lock);
+			ObReferenceObject(fo);
+			iosb->status = FILE_OPENED;
+			iosb->info = bin_file->size;
+			EXIT2(return STATUS_SUCCESS);
+		}
+	}
+	spin_unlock_bh(&ntoskernel_lock);
+
+	if (RtlUnicodeStringToAnsiString(&ansi, obj_attr->name, TRUE) !=
+	    STATUS_SUCCESS)
+		EXIT2(return STATUS_INSUFFICIENT_RESOURCES);
+
+	file_basename = strrchr(ansi.buf, '\\');
+	if (file_basename)
+		file_basename++;
+	else
+		file_basename = ansi.buf;
+	TRACE2("file: '%s', '%s'", ansi.buf, file_basename);
+
+	fo = allocate_object(sizeof(struct file_object), OBJECT_TYPE_FILE,
+			     obj_attr->name);
+	if (!fo) {
+		RtlFreeAnsiString(&ansi);
+		iosb->status = STATUS_INSUFFICIENT_RESOURCES;
+		iosb->info = 0;
+		EXIT2(return STATUS_FAILURE);
+	}
+	coh = OBJECT_TO_HEADER(fo);
+	bin_file = get_bin_file(file_basename);
+	if (bin_file) {
+		TRACE2("%s, %s", bin_file->name, file_basename);
+		fo->flags = FILE_OPENED;
+	} else if (access_mask & FILE_WRITE_DATA) {
+		bin_file = kzalloc(sizeof(*bin_file), GFP_KERNEL);
+		if (bin_file) {
+			strncpy(bin_file->name, file_basename,
+				sizeof(bin_file->name));
+			bin_file->name[sizeof(bin_file->name)-1] = 0;
+			bin_file->data = vmalloc(*size);
+			if (bin_file->data) {
+				memset(bin_file->data, 0, *size);
+				bin_file->size = *size;
+				fo->flags = FILE_CREATED;
+			} else {
+				kfree(bin_file);
+				bin_file = NULL;
+			}
+		}
+	} else
+		bin_file = NULL;
+
+	RtlFreeAnsiString(&ansi);
+	if (!bin_file) {
+		iosb->status = FILE_DOES_NOT_EXIST;
+		iosb->info = 0;
+		free_object(fo);
+		EXIT2(return STATUS_FAILURE);
+	}
+
+	fo->wrap_bin_file = bin_file;
+	fo->current_byte_offset = 0;
+	if (access_mask & FILE_READ_DATA)
+		fo->read_access = TRUE;
+	if (access_mask & FILE_WRITE_DATA)
+		fo->write_access = TRUE;
+	iosb->status = FILE_OPENED;
+	iosb->info = bin_file->size;
+	*handle = coh;
+	TRACE2("handle: %p", *handle);
+	status = STATUS_SUCCESS;
+	EXIT2(return status);
+}
+
+wstdcall NTSTATUS WIN_FUNC(ZwOpenFile,6)
+	(void **handle, ACCESS_MASK access_mask,
+	 struct object_attributes *obj_attr, struct io_status_block *iosb,
+	 ULONG share_access, ULONG open_options)
+{
+	LARGE_INTEGER size;
+	return ZwCreateFile(handle, access_mask, obj_attr, iosb, &size, 0,
+			    share_access, 0, open_options, NULL, 0);
+}
+
+wstdcall NTSTATUS WIN_FUNC(ZwReadFile,9)
+	(void *handle, struct nt_event *event, void *apc_routine,
+	 void *apc_context, struct io_status_block *iosb, void *buffer,
+	 ULONG length, LARGE_INTEGER *byte_offset, ULONG *key)
+{
+	struct file_object *fo;
+	struct common_object_header *coh;
+	ULONG count;
+	size_t offset;
+	struct wrap_bin_file *file;
+
+	TRACE2("%p", handle);
+	coh = handle;
+	if (coh->type != OBJECT_TYPE_FILE) {
+		ERROR("handle %p is invalid: %d", handle, coh->type);
+		EXIT2(return STATUS_FAILURE);
+	}
+	fo = HANDLE_TO_OBJECT(coh);
+	file = fo->wrap_bin_file;
+	TRACE2("file: %s (%zu)", file->name, file->size);
+	spin_lock_bh(&ntoskernel_lock);
+	if (byte_offset)
+		offset = *byte_offset;
+	else
+		offset = fo->current_byte_offset;
+	count = min((size_t)length, file->size - offset);
+	TRACE2("count: %u, offset: %zu, length: %u", count, offset, length);
+	memcpy(buffer, ((void *)file->data) + offset, count);
+	fo->current_byte_offset = offset + count;
+	spin_unlock_bh(&ntoskernel_lock);
+	iosb->status = STATUS_SUCCESS;
+	iosb->info = count;
+	EXIT2(return STATUS_SUCCESS);
+}
+
+wstdcall NTSTATUS WIN_FUNC(ZwWriteFile,9)
+	(void *handle, struct nt_event *event, void *apc_routine,
+	 void *apc_context, struct io_status_block *iosb, void *buffer,
+	 ULONG length, LARGE_INTEGER *byte_offset, ULONG *key)
+{
+	struct file_object *fo;
+	struct common_object_header *coh;
+	struct wrap_bin_file *file;
+	unsigned long offset;
+
+	TRACE2("%p", handle);
+	coh = handle;
+	if (coh->type != OBJECT_TYPE_FILE) {
+		ERROR("handle %p is invalid: %d", handle, coh->type);
+		EXIT2(return STATUS_FAILURE);
+	}
+	fo = HANDLE_TO_OBJECT(coh);
+	file = fo->wrap_bin_file;
+	TRACE2("file: %zu, %u", file->size, length);
+	spin_lock_bh(&ntoskernel_lock);
+	if (byte_offset)
+		offset = *byte_offset;
+	else
+		offset = fo->current_byte_offset;
+	if (length + offset > file->size) {
+		WARNING("%lu, %u", length + offset, (unsigned int)file->size);
+		/* TODO: implement writing past end of current size */
+		iosb->status = STATUS_FAILURE;
+		iosb->info = 0;
+	} else {
+		memcpy(file->data + offset, buffer, length);
+		iosb->status = STATUS_SUCCESS;
+		iosb->info = length;
+		fo->current_byte_offset = offset + length;
+	}
+	spin_unlock_bh(&ntoskernel_lock);
+	EXIT2(return iosb->status);
+}
+
+wstdcall NTSTATUS WIN_FUNC(ZwClose,1)
+	(void *handle)
+{
+	struct common_object_header *coh;
+
+	TRACE2("%p", handle);
+	if (handle == NULL) {
+		TRACE1("");
+		EXIT2(return STATUS_SUCCESS);
+	}
+	coh = handle;
+	if (coh->type == OBJECT_TYPE_FILE) {
+		struct file_object *fo;
+		struct wrap_bin_file *bin_file;
+		typeof(fo->flags) flags;
+
+		fo = HANDLE_TO_OBJECT(handle);
+		flags = fo->flags;
+		bin_file = fo->wrap_bin_file;
+		if (dereference_object(fo)) {
+			if (flags == FILE_CREATED) {
+				vfree(bin_file->data);
+				kfree(bin_file);
+			} else
+				free_bin_file(bin_file);
+		}
+	} else if (coh->type == OBJECT_TYPE_NT_THREAD) {
+		struct nt_thread *thread = HANDLE_TO_OBJECT(handle);
+		TRACE2("thread: %p (%p)", thread, handle);
+		ObDereferenceObject(thread);
+	} else {
+		/* TODO: can we just dereference object here? */
+		WARNING("closing handle 0x%x not implemented", coh->type);
+	}
+	EXIT2(return STATUS_SUCCESS);
+}
+
+wstdcall NTSTATUS WIN_FUNC(ZwQueryInformationFile,5)
+	(void *handle, struct io_status_block *iosb, void *info,
+	 ULONG length, enum file_info_class class)
+{
+	struct file_object *fo;
+	struct file_name_info *fni;
+	struct file_std_info *fsi;
+	struct wrap_bin_file *file;
+	struct common_object_header *coh;
+
+	ENTER2("%p", handle);
+	coh = handle;
+	if (coh->type != OBJECT_TYPE_FILE) {
+		ERROR("handle %p is invalid: %d", coh, coh->type);
+		EXIT2(return STATUS_FAILURE);
+	}
+	fo = HANDLE_TO_OBJECT(handle);
+	TRACE2("fo: %p, %d", fo, class);
+	switch (class) {
+	case FileNameInformation:
+		fni = info;
+		fni->length = min(length, (typeof(length))coh->name.length);
+		memcpy(fni->name, coh->name.buf, fni->length);
+		iosb->status = STATUS_SUCCESS;
+		iosb->info = fni->length;
+		break;
+	case FileStandardInformation:
+		fsi = info;
+		file = fo->wrap_bin_file;
+		fsi->alloc_size = file->size;
+		fsi->eof = file->size;
+		fsi->num_links = 1;
+		fsi->delete_pending = FALSE;
+		fsi->dir = FALSE;
+		iosb->status = STATUS_SUCCESS;
+		iosb->info = 0;
+		break;
+	default:
+		WARNING("type %d not implemented yet", class);
+		iosb->status = STATUS_FAILURE;
+		iosb->info = 0;
+		break;
+	}
+	EXIT2(return iosb->status);
+}
+
+wstdcall NTSTATUS WIN_FUNC(ZwOpenSection,3)
+	(void **handle, ACCESS_MASK access, struct object_attributes *obj_attrs)
+{
+	INFO("%p, 0x%x, %d", obj_attrs, obj_attrs->attributes, access);
+	TODO();
+	*handle = obj_attrs;
+	return STATUS_SUCCESS;
+}
+
+wstdcall NTSTATUS WIN_FUNC(ZwMapViewOfSection,10)
+	(void *secn_handle, void *process_handle, void **base_address,
+	 ULONG zero_bits, LARGE_INTEGER *secn_offset, SIZE_T *view_size,
+	 enum section_inherit inherit, ULONG alloc_type, ULONG protect)
+{
+	INFO("%p, %p, %p", secn_handle, process_handle, base_address);
+	TODO();
+	*base_address = (void *)0xdeadbeef;
+	return STATUS_SUCCESS;
+}
+
+wstdcall NTSTATUS WIN_FUNC(ZwUnmapViewOfSection,2)
+	(void *process_handle, void *base_address)
+{
+	INFO("%p, %p", process_handle, base_address);
+	TODO();
+	return STATUS_SUCCESS;
+}
+
+wstdcall NTSTATUS WIN_FUNC(ZwCreateKey,7)
+	(void **handle, ACCESS_MASK desired_access,
+	 struct object_attributes *attr, ULONG title_index,
+	 struct unicode_string *class, ULONG create_options,
+	 ULONG *disposition)
+{
+	struct ansi_string ansi;
+	if (RtlUnicodeStringToAnsiString(&ansi, attr->name, TRUE) ==
+	    STATUS_SUCCESS) {
+		TRACE1("key: %s", ansi.buf);
+		RtlFreeAnsiString(&ansi);
+	}
+	*handle = NULL;
+	return STATUS_SUCCESS;
+}
+
+wstdcall NTSTATUS WIN_FUNC(ZwOpenKey,3)
+	(void **handle, ACCESS_MASK desired_access,
+	 struct object_attributes *attr)
+{
+	struct ansi_string ansi;
+	if (RtlUnicodeStringToAnsiString(&ansi, attr->name, TRUE) ==
+	    STATUS_SUCCESS) {
+		TRACE1("key: %s", ansi.buf);
+		RtlFreeAnsiString(&ansi);
+	}
+	*handle = NULL;
+	return STATUS_SUCCESS;
+}
+
+wstdcall NTSTATUS WIN_FUNC(ZwSetValueKey,6)
+	(void *handle, struct unicode_string *name, ULONG title_index,
+	 ULONG type, void *data, ULONG data_size)
+{
+	struct ansi_string ansi;
+	if (RtlUnicodeStringToAnsiString(&ansi, name, TRUE) ==
+	    STATUS_SUCCESS) {
+		TRACE1("key: %s", ansi.buf);
+		RtlFreeAnsiString(&ansi);
+	}
+	return STATUS_SUCCESS;
+}
+
+wstdcall NTSTATUS WIN_FUNC(ZwQueryValueKey,6)
+	(void *handle, struct unicode_string *name,
+	 enum key_value_information_class class, void *info,
+	 ULONG length, ULONG *res_length)
+{
+	struct ansi_string ansi;
+	if (RtlUnicodeStringToAnsiString(&ansi, name, TRUE) == STATUS_SUCCESS) {
+		TRACE1("key: %s", ansi.buf);
+		RtlFreeAnsiString(&ansi);
+	}
+	TODO();
+	return STATUS_INVALID_PARAMETER;
+}
+
+wstdcall NTSTATUS WIN_FUNC(ZwDeleteKey,1)
+	(void *handle)
+{
+	ENTER2("%p", handle);
+	return STATUS_SUCCESS;
+}
+
+wstdcall NTSTATUS WIN_FUNC(ZwPowerInformation,4)
+	(INT info_level, void *in_buf, ULONG in_buf_len, void *out_buf,
+	 ULONG out_buf_len)
+{
+	INFO("%d, %u, %u", info_level, in_buf_len, out_buf_len);
+	TODO();
+	return STATUS_ACCESS_DENIED;
+}
+
+wstdcall NTSTATUS WIN_FUNC(WmiSystemControl,4)
+	(struct wmilib_context *info, struct device_object *dev_obj,
+	 struct irp *irp, void *irp_disposition)
+{
+	TODO();
+	return STATUS_SUCCESS;
+}
+
+wstdcall NTSTATUS WIN_FUNC(WmiCompleteRequest,5)
+	(struct device_object *dev_obj, struct irp *irp, NTSTATUS status,
+	 ULONG buffer_used, CCHAR priority_boost)
+{
+	TODO();
+	return STATUS_SUCCESS;
+}
+
+noregparm NTSTATUS WIN_FUNC(WmiTraceMessage,12)
+	(void *tracehandle, ULONG message_flags,
+	 void *message_guid, USHORT message_no, ...)
+{
+	TODO();
+	EXIT2(return STATUS_SUCCESS);
+}
+
+wstdcall NTSTATUS WIN_FUNC(WmiQueryTraceInformation,4)
+	(enum trace_information_class trace_info_class, void *trace_info,
+	 ULONG *req_length, void *buf)
+{
+	TODO();
+	EXIT2(return STATUS_SUCCESS);
+}
+
+/* this function can't be wstdcall as it takes variable number of args */
+noregparm ULONG WIN_FUNC(DbgPrint,12)
+	(char *format, ...)
+{
+#ifdef DEBUG
+	va_list args;
+	static char buf[100];
+
+	va_start(args, format);
+	vsnprintf(buf, sizeof(buf), format, args);
+	printk(KERN_DEBUG "%s (%s): %s", DRIVER_NAME, __func__, buf);
+	va_end(args);
+#endif
+	return STATUS_SUCCESS;
+}
+
+wstdcall void WIN_FUNC(KeBugCheck,1)
+	(ULONG code)
+{
+	TODO();
+	return;
+}
+
+wstdcall void WIN_FUNC(KeBugCheckEx,5)
+	(ULONG code, ULONG_PTR param1, ULONG_PTR param2,
+	 ULONG_PTR param3, ULONG_PTR param4)
+{
+	TODO();
+	return;
+}
+
+wstdcall void WIN_FUNC(ExSystemTimeToLocalTime,2)
+	(LARGE_INTEGER *system_time, LARGE_INTEGER *local_time)
+{
+	*local_time = *system_time;
+}
+
+wstdcall ULONG WIN_FUNC(ExSetTimerResolution,2)
+	(ULONG time, BOOLEAN set)
+{
+	/* why a driver should change system wide timer resolution is
+	 * beyond me */
+	return time;
+}
+
+wstdcall void WIN_FUNC(DbgBreakPoint,0)
+	(void)
+{
+	TODO();
+}
+
+wstdcall void WIN_FUNC(_except_handler3,0)
+	(void)
+{
+	TODO();
+}
+
+wstdcall void WIN_FUNC(__C_specific_handler,0)
+	(void)
+{
+	TODO();
+}
+
+wstdcall void WIN_FUNC(_purecall,0)
+	(void)
+{
+	TODO();
+}
+
+wstdcall void WIN_FUNC(__chkstk,0)
+	(void)
+{
+	TODO();
+}
+
+struct worker_init_struct {
+	work_struct_t work;
+	struct completion completion;
+	struct nt_thread *nt_thread;
+};
+
+static void wrap_worker_init_func(worker_param_t param)
+{
+	struct worker_init_struct *worker_init_struct;
+
+	worker_init_struct =
+		worker_param_data(param, struct worker_init_struct, work);
+	TRACE1("%p", worker_init_struct);
+	worker_init_struct->nt_thread = create_nt_thread(current);
+	if (!worker_init_struct->nt_thread)
+		WARNING("couldn't create worker thread");
+	complete(&worker_init_struct->completion);
+}
+
+struct nt_thread *wrap_worker_init(workqueue_struct_t *wq)
+{
+	struct worker_init_struct worker_init_struct;
+
+	TRACE1("%p", &worker_init_struct);
+	init_completion(&worker_init_struct.completion);
+	initialize_work(&worker_init_struct.work, wrap_worker_init_func,
+			&worker_init_struct);
+	worker_init_struct.nt_thread = NULL;
+	if (wq)
+		queue_work(wq, &worker_init_struct.work);
+	else
+		schedule_work(&worker_init_struct.work);
+	wait_for_completion(&worker_init_struct.completion);
+	TRACE1("%p", worker_init_struct.nt_thread);
+	return worker_init_struct.nt_thread;
+}
+
+int ntoskernel_init(void)
+{
+	struct timeval now;
+
+	spin_lock_init(&dispatcher_lock);
+	spin_lock_init(&ntoskernel_lock);
+	spin_lock_init(&ntos_work_lock);
+	spin_lock_init(&kdpc_list_lock);
+	spin_lock_init(&irp_cancel_lock);
+	InitializeListHead(&wrap_mdl_list);
+	InitializeListHead(&kdpc_list);
+	InitializeListHead(&callback_objects);
+	InitializeListHead(&bus_driver_list);
+	InitializeListHead(&object_list);
+	InitializeListHead(&ntos_work_list);
+
+	nt_spin_lock_init(&nt_list_lock);
+
+	initialize_work(&kdpc_work, kdpc_worker, NULL);
+	initialize_work(&ntos_work, ntos_work_worker, NULL);
+	wrap_timer_slist.next = NULL;
+
+	do_gettimeofday(&now);
+	wrap_ticks_to_boot = TICKS_1601_TO_1970;
+	wrap_ticks_to_boot += (u64)now.tv_sec * TICKSPERSEC;
+	wrap_ticks_to_boot += now.tv_usec * 10;
+	wrap_ticks_to_boot -= jiffies * TICKSPERJIFFY;
+	TRACE2("%Lu", wrap_ticks_to_boot);
+
+#ifdef WRAP_PREEMPT
+	do {
+		int cpu;
+		for_each_possible_cpu(cpu) {
+			irql_info_t *info;
+			info = &per_cpu(irql_info, cpu);
+			mutex_init(&(info->lock));
+			info->task = NULL;
+			info->count = 0;
+		}
+	} while (0);
+#endif
+
+	ntos_wq = create_singlethread_workqueue("ntos_wq");
+	if (!ntos_wq) {
+		WARNING("couldn't create ntos_wq thread");
+		return -ENOMEM;
+	}
+	ntos_worker_thread = wrap_worker_init(ntos_wq);
+	TRACE1("%p", ntos_worker_thread);
+
+	if (add_bus_driver("PCI")
+#ifdef ENABLE_USB
+	    || add_bus_driver("USB")
+#endif
+		) {
+		ntoskernel_exit();
+		return -ENOMEM;
+	}
+	mdl_cache =
+		wrap_kmem_cache_create("wrap_mdl",
+				       sizeof(struct wrap_mdl) + MDL_CACHE_SIZE,
+				       0, 0);
+	TRACE2("%p", mdl_cache);
+	if (!mdl_cache) {
+		ERROR("couldn't allocate MDL cache");
+		ntoskernel_exit();
+		return -ENOMEM;
+	}
+
+#if defined(CONFIG_X86_64)
+	memset(&kuser_shared_data, 0, sizeof(kuser_shared_data));
+	*((ULONG64 *)&kuser_shared_data.system_time) = ticks_1601();
+	init_timer(&shared_data_timer);
+	shared_data_timer.function = update_user_shared_data_proc;
+	shared_data_timer.data = (unsigned long)0;
+#endif
+	return 0;
+}
+
+int ntoskernel_init_device(struct wrap_device *wd)
+{
+#if defined(CONFIG_X86_64)
+	if (kuser_shared_data.reserved1)
+		mod_timer(&shared_data_timer, jiffies + MSEC_TO_HZ(30));
+#endif
+	return 0;
+}
+
+void ntoskernel_exit_device(struct wrap_device *wd)
+{
+	ENTER2("");
+
+	KeFlushQueuedDpcs();
+	EXIT2(return);
+}
+
+void ntoskernel_exit(void)
+{
+	struct nt_list *cur;
+
+	ENTER2("");
+
+	/* free kernel (Ke) timers */
+	TRACE2("freeing timers");
+	while (1) {
+		struct wrap_timer *wrap_timer;
+		struct nt_slist *slist;
+
+		spin_lock_bh(&ntoskernel_lock);
+		if ((slist = wrap_timer_slist.next))
+			wrap_timer_slist.next = slist->next;
+		spin_unlock_bh(&ntoskernel_lock);
+		TIMERTRACE("%p", slist);
+		if (!slist)
+			break;
+		wrap_timer = container_of(slist, struct wrap_timer, slist);
+		if (del_timer_sync(&wrap_timer->timer))
+			WARNING("Buggy Windows driver left timer %p running",
+				wrap_timer->nt_timer);
+		memset(wrap_timer, 0, sizeof(*wrap_timer));
+		slack_kfree(wrap_timer);
+	}
+
+	TRACE2("freeing MDLs");
+	if (mdl_cache) {
+		spin_lock_bh(&ntoskernel_lock);
+		if (!IsListEmpty(&wrap_mdl_list))
+			ERROR("Windows driver didn't free all MDLs; "
+			      "freeing them now");
+		while ((cur = RemoveHeadList(&wrap_mdl_list))) {
+			struct wrap_mdl *wrap_mdl;
+			wrap_mdl = container_of(cur, struct wrap_mdl, list);
+			if (wrap_mdl->mdl->flags & MDL_CACHE_ALLOCATED)
+				kmem_cache_free(mdl_cache, wrap_mdl);
+			else
+				kfree(wrap_mdl);
+		}
+		spin_unlock_bh(&ntoskernel_lock);
+		kmem_cache_destroy(mdl_cache);
+		mdl_cache = NULL;
+	}
+
+	TRACE2("freeing callbacks");
+	spin_lock_bh(&ntoskernel_lock);
+	while ((cur = RemoveHeadList(&callback_objects))) {
+		struct callback_object *object;
+		struct nt_list *ent;
+		object = container_of(cur, struct callback_object, list);
+		while ((ent = RemoveHeadList(&object->callback_funcs))) {
+			struct callback_func *f;
+			f = container_of(ent, struct callback_func, list);
+			kfree(f);
+		}
+		kfree(object);
+	}
+	spin_unlock_bh(&ntoskernel_lock);
+
+	spin_lock_bh(&ntoskernel_lock);
+	while ((cur = RemoveHeadList(&bus_driver_list))) {
+		struct bus_driver *bus_driver;
+		bus_driver = container_of(cur, struct bus_driver, list);
+		/* TODO: make sure all all drivers are shutdown/removed */
+		kfree(bus_driver);
+	}
+	spin_unlock_bh(&ntoskernel_lock);
+
+#if defined(CONFIG_X86_64)
+	del_timer_sync(&shared_data_timer);
+#endif
+	if (ntos_wq)
+		destroy_workqueue(ntos_wq);
+	TRACE1("%p", ntos_worker_thread);
+	if (ntos_worker_thread)
+		ObDereferenceObject(ntos_worker_thread);
+	ENTER2("freeing objects");
+	spin_lock_bh(&ntoskernel_lock);
+	while ((cur = RemoveHeadList(&object_list))) {
+		struct common_object_header *hdr;
+		hdr = container_of(cur, struct common_object_header, list);
+		if (hdr->type == OBJECT_TYPE_NT_THREAD)
+			TRACE1("object %p(%d) was not freed, freeing it now",
+			       HEADER_TO_OBJECT(hdr), hdr->type);
+		else
+			WARNING("object %p(%d) was not freed, freeing it now",
+				HEADER_TO_OBJECT(hdr), hdr->type);
+		ExFreePool(hdr);
+	}
+	spin_unlock_bh(&ntoskernel_lock);
+
+	EXIT2(return);
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/ndiswrapper/longlong.h
+++ linux-mvl-dove-2.6.32/ubuntu/ndiswrapper/longlong.h
@@ -0,0 +1,1333 @@
+/* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
+   Copyright (C) 1991, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000
+   Free Software Foundation, Inc.
+
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, write to the Free
+   Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+   02111-1307 USA.  */
+
+/* You have to define the following before including this file:
+
+   UWtype -- An unsigned type, default type for operations (typically a "word")
+   UHWtype -- An unsigned type, at least half the size of UWtype.
+   UDWtype -- An unsigned type, at least twice as large a UWtype
+   W_TYPE_SIZE -- size in bits of UWtype
+
+   UQItype -- Unsigned 8 bit type.
+   SItype, USItype -- Signed and unsigned 32 bit types.
+   DItype, UDItype -- Signed and unsigned 64 bit types.
+
+   On a 32 bit machine UWtype should typically be USItype;
+   on a 64 bit machine, UWtype should typically be UDItype.
+*/
+
+#define __BITS4 (W_TYPE_SIZE / 4)
+#define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2))
+#define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1))
+#define __ll_highpart(t) ((UWtype) (t) >> (W_TYPE_SIZE / 2))
+
+#ifndef W_TYPE_SIZE
+#define W_TYPE_SIZE	32
+#define UWtype		USItype
+#define UHWtype		USItype
+#define UDWtype		UDItype
+#endif
+
+/* Define auxiliary asm macros.
+
+   1) umul_ppmm(high_prod, low_prod, multipler, multiplicand) multiplies two
+   UWtype integers MULTIPLER and MULTIPLICAND, and generates a two UWtype
+   word product in HIGH_PROD and LOW_PROD.
+
+   2) __umulsidi3(a,b) multiplies two UWtype integers A and B, and returns a
+   UDWtype product.  This is just a variant of umul_ppmm.
+
+   3) udiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
+   denominator) divides a UDWtype, composed by the UWtype integers
+   HIGH_NUMERATOR and LOW_NUMERATOR, by DENOMINATOR and places the quotient
+   in QUOTIENT and the remainder in REMAINDER.  HIGH_NUMERATOR must be less
+   than DENOMINATOR for correct operation.  If, in addition, the most
+   significant bit of DENOMINATOR must be 1, then the pre-processor symbol
+   UDIV_NEEDS_NORMALIZATION is defined to 1.
+
+   4) sdiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
+   denominator).  Like udiv_qrnnd but the numbers are signed.  The quotient
+   is rounded towards 0.
+
+   5) count_leading_zeros(count, x) counts the number of zero-bits from the
+   msb to the first nonzero bit in the UWtype X.  This is the number of
+   steps X needs to be shifted left to set the msb.  Undefined for X == 0,
+   unless the symbol COUNT_LEADING_ZEROS_0 is defined to some value.
+
+   6) count_trailing_zeros(count, x) like count_leading_zeros, but counts
+   from the least significant end.
+
+   7) add_ssaaaa(high_sum, low_sum, high_addend_1, low_addend_1,
+   high_addend_2, low_addend_2) adds two UWtype integers, composed by
+   HIGH_ADDEND_1 and LOW_ADDEND_1, and HIGH_ADDEND_2 and LOW_ADDEND_2
+   respectively.  The result is placed in HIGH_SUM and LOW_SUM.  Overflow
+   (i.e. carry out) is not stored anywhere, and is lost.
+
+   8) sub_ddmmss(high_difference, low_difference, high_minuend, low_minuend,
+   high_subtrahend, low_subtrahend) subtracts two two-word UWtype integers,
+   composed by HIGH_MINUEND_1 and LOW_MINUEND_1, and HIGH_SUBTRAHEND_2 and
+   LOW_SUBTRAHEND_2 respectively.  The result is placed in HIGH_DIFFERENCE
+   and LOW_DIFFERENCE.  Overflow (i.e. carry out) is not stored anywhere,
+   and is lost.
+
+   If any of these macros are left undefined for a particular CPU,
+   C macros are used.  */
+
+/* The CPUs come in alphabetical order below.
+
+   Please add support for more CPUs here, or improve the current support
+   for the CPUs below!
+   (E.g. WE32100, IBM360.)  */
+
+#if defined (__GNUC__) && !defined (NO_ASM)
+
+/* We sometimes need to clobber "cc" with gcc2, but that would not be
+   understood by gcc1.  Use cpp to avoid major code duplication.  */
+#if __GNUC__ < 2
+#define __CLOBBER_CC
+#define __AND_CLOBBER_CC
+#else /* __GNUC__ >= 2 */
+#define __CLOBBER_CC : "cc"
+#define __AND_CLOBBER_CC , "cc"
+#endif /* __GNUC__ < 2 */
+
+#if defined (__alpha) && W_TYPE_SIZE == 64
+#define umul_ppmm(ph, pl, m0, m1) \
+  do {									\
+    UDItype __m0 = (m0), __m1 = (m1);					\
+    __asm__ ("umulh %r1,%2,%0"						\
+	     : "=r" ((UDItype) ph)					\
+	     : "%rJ" (__m0),						\
+	       "rI" (__m1));						\
+    (pl) = __m0 * __m1;							\
+  } while (0)
+#define UMUL_TIME 46
+#ifndef LONGLONG_STANDALONE
+#define udiv_qrnnd(q, r, n1, n0, d) \
+  do { UDItype __r;							\
+    (q) = __udiv_qrnnd (&__r, (n1), (n0), (d));				\
+    (r) = __r;								\
+  } while (0)
+extern UDItype __udiv_qrnnd (UDItype *, UDItype, UDItype, UDItype);
+#define UDIV_TIME 220
+#endif /* LONGLONG_STANDALONE */
+#ifdef __alpha_cix__
+#define count_leading_zeros(COUNT,X) \
+  __asm__("ctlz %1,%0" : "=r"(COUNT) : "r"(X))
+#define count_trailing_zeros(COUNT,X) \
+  __asm__("cttz %1,%0" : "=r"(COUNT) : "r"(X))
+#define COUNT_LEADING_ZEROS_0 64
+#else
+extern const UQItype __clz_tab[];
+#define count_leading_zeros(COUNT,X) \
+  do {									\
+    UDItype __xr = (X), __t, __a;					\
+    __asm__("cmpbge $31,%1,%0" : "=r"(__t) : "r"(__xr));		\
+    __a = __clz_tab[__t ^ 0xff] - 1;					\
+    __asm__("extbl %1,%2,%0" : "=r"(__t) : "r"(__xr), "r"(__a));	\
+    (COUNT) = 64 - (__clz_tab[__t] + __a*8);				\
+  } while (0)
+#define count_trailing_zeros(COUNT,X) \
+  do {									\
+    UDItype __xr = (X), __t, __a;					\
+    __asm__("cmpbge $31,%1,%0" : "=r"(__t) : "r"(__xr));		\
+    __t = ~__t & -~__t;							\
+    __a = ((__t & 0xCC) != 0) * 2;					\
+    __a += ((__t & 0xF0) != 0) * 4;					\
+    __a += ((__t & 0xAA) != 0);						\
+    __asm__("extbl %1,%2,%0" : "=r"(__t) : "r"(__xr), "r"(__a));	\
+    __a <<= 3;								\
+    __t &= -__t;							\
+    __a += ((__t & 0xCC) != 0) * 2;					\
+    __a += ((__t & 0xF0) != 0) * 4;					\
+    __a += ((__t & 0xAA) != 0);						\
+    (COUNT) = __a;							\
+  } while (0)
+#endif /* __alpha_cix__ */
+#endif /* __alpha */
+
+#if defined (__arc__) && W_TYPE_SIZE == 32
+#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
+  __asm__ ("add.f	%1, %4, %5\n\tadc	%0, %2, %3"		\
+	   : "=r" ((USItype) (sh)),					\
+	     "=&r" ((USItype) (sl))					\
+	   : "%r" ((USItype) (ah)),					\
+	     "rIJ" ((USItype) (bh)),					\
+	     "%r" ((USItype) (al)),					\
+	     "rIJ" ((USItype) (bl)))
+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
+  __asm__ ("sub.f	%1, %4, %5\n\tsbc	%0, %2, %3"		\
+	   : "=r" ((USItype) (sh)),					\
+	     "=&r" ((USItype) (sl))					\
+	   : "r" ((USItype) (ah)),					\
+	     "rIJ" ((USItype) (bh)),					\
+	     "r" ((USItype) (al)),					\
+	     "rIJ" ((USItype) (bl)))
+/* Call libgcc routine.  */
+#define umul_ppmm(w1, w0, u, v) \
+do {									\
+  DWunion __w;								\
+  __w.ll = __umulsidi3 (u, v);						\
+  w1 = __w.s.high;							\
+  w0 = __w.s.low;							\
+} while (0)
+#define __umulsidi3 __umulsidi3
+UDItype __umulsidi3 (USItype, USItype);
+#endif
+
+#if defined (__arm__) && W_TYPE_SIZE == 32
+#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
+  __asm__ ("adds	%1, %4, %5\n\tadc	%0, %2, %3"		\
+	   : "=r" ((USItype) (sh)),					\
+	     "=&r" ((USItype) (sl))					\
+	   : "%r" ((USItype) (ah)),					\
+	     "rI" ((USItype) (bh)),					\
+	     "%r" ((USItype) (al)),					\
+	     "rI" ((USItype) (bl)))
+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
+  __asm__ ("subs	%1, %4, %5\n\tsbc	%0, %2, %3"		\
+	   : "=r" ((USItype) (sh)),					\
+	     "=&r" ((USItype) (sl))					\
+	   : "r" ((USItype) (ah)),					\
+	     "rI" ((USItype) (bh)),					\
+	     "r" ((USItype) (al)),					\
+	     "rI" ((USItype) (bl)))
+#define umul_ppmm(xh, xl, a, b) \
+{register USItype __t0, __t1, __t2;					\
+  __asm__ ("%@ Inlined umul_ppmm\n"					\
+	   "	mov	%2, %5, lsr #16\n"				\
+	   "	mov	%0, %6, lsr #16\n"				\
+	   "	bic	%3, %5, %2, lsl #16\n"				\
+	   "	bic	%4, %6, %0, lsl #16\n"				\
+	   "	mul	%1, %3, %4\n"					\
+	   "	mul	%4, %2, %4\n"					\
+	   "	mul	%3, %0, %3\n"					\
+	   "	mul	%0, %2, %0\n"					\
+	   "	adds	%3, %4, %3\n"					\
+	   "	addcs	%0, %0, #65536\n"				\
+	   "	adds	%1, %1, %3, lsl #16\n"				\
+	   "	adc	%0, %0, %3, lsr #16"				\
+	   : "=&r" ((USItype) (xh)),					\
+	     "=r" ((USItype) (xl)),					\
+	     "=&r" (__t0), "=&r" (__t1), "=r" (__t2)			\
+	   : "r" ((USItype) (a)),					\
+	     "r" ((USItype) (b)));}
+#define UMUL_TIME 20
+#define UDIV_TIME 100
+#endif /* __arm__ */
+
+#if defined (__hppa) && W_TYPE_SIZE == 32
+#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
+  __asm__ ("add %4,%5,%1\n\taddc %2,%3,%0"				\
+	   : "=r" ((USItype) (sh)),					\
+	     "=&r" ((USItype) (sl))					\
+	   : "%rM" ((USItype) (ah)),					\
+	     "rM" ((USItype) (bh)),					\
+	     "%rM" ((USItype) (al)),					\
+	     "rM" ((USItype) (bl)))
+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
+  __asm__ ("sub %4,%5,%1\n\tsubb %2,%3,%0"				\
+	   : "=r" ((USItype) (sh)),					\
+	     "=&r" ((USItype) (sl))					\
+	   : "rM" ((USItype) (ah)),					\
+	     "rM" ((USItype) (bh)),					\
+	     "rM" ((USItype) (al)),					\
+	     "rM" ((USItype) (bl)))
+#if defined (_PA_RISC1_1)
+#define umul_ppmm(w1, w0, u, v) \
+  do {									\
+    union								\
+      {									\
+	UDItype __f;							\
+	struct {USItype __w1, __w0;} __w1w0;				\
+      } __t;								\
+    __asm__ ("xmpyu %1,%2,%0"						\
+	     : "=x" (__t.__f)						\
+	     : "x" ((USItype) (u)),					\
+	       "x" ((USItype) (v)));					\
+    (w1) = __t.__w1w0.__w1;						\
+    (w0) = __t.__w1w0.__w0;						\
+     } while (0)
+#define UMUL_TIME 8
+#else
+#define UMUL_TIME 30
+#endif
+#define UDIV_TIME 40
+#define count_leading_zeros(count, x) \
+  do {									\
+    USItype __tmp;							\
+    __asm__ (								\
+       "ldi		1,%0\n"						\
+"	extru,=		%1,15,16,%%r0		; Bits 31..16 zero?\n"	\
+"	extru,tr	%1,15,16,%1		; No.  Shift down, skip add.\n"\
+"	ldo		16(%0),%0		; Yes.  Perform add.\n"	\
+"	extru,=		%1,23,8,%%r0		; Bits 15..8 zero?\n"	\
+"	extru,tr	%1,23,8,%1		; No.  Shift down, skip add.\n"\
+"	ldo		8(%0),%0		; Yes.  Perform add.\n"	\
+"	extru,=		%1,27,4,%%r0		; Bits 7..4 zero?\n"	\
+"	extru,tr	%1,27,4,%1		; No.  Shift down, skip add.\n"\
+"	ldo		4(%0),%0		; Yes.  Perform add.\n"	\
+"	extru,=		%1,29,2,%%r0		; Bits 3..2 zero?\n"	\
+"	extru,tr	%1,29,2,%1		; No.  Shift down, skip add.\n"\
+"	ldo		2(%0),%0		; Yes.  Perform add.\n"	\
+"	extru		%1,30,1,%1		; Extract bit 1.\n"	\
+"	sub		%0,%1,%0		; Subtract it.\n"	\
+	: "=r" (count), "=r" (__tmp) : "1" (x));			\
+  } while (0)
+#endif
+
+#if (defined (__i370__) || defined (__mvs__)) && W_TYPE_SIZE == 32
+#define umul_ppmm(xh, xl, m0, m1) \
+  do {									\
+    union {UDItype __ll;						\
+	   struct {USItype __h, __l;} __i;				\
+	  } __xx;							\
+    USItype __m0 = (m0), __m1 = (m1);					\
+    __asm__ ("mr %0,%3"							\
+	     : "=r" (__xx.__i.__h),					\
+	       "=r" (__xx.__i.__l)					\
+	     : "%1" (__m0),						\
+	       "r" (__m1));						\
+    (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;				\
+    (xh) += ((((SItype) __m0 >> 31) & __m1)				\
+	     + (((SItype) __m1 >> 31) & __m0));				\
+  } while (0)
+#define smul_ppmm(xh, xl, m0, m1) \
+  do {									\
+    union {DItype __ll;							\
+	   struct {USItype __h, __l;} __i;				\
+	  } __xx;							\
+    __asm__ ("mr %0,%3"							\
+	     : "=r" (__xx.__i.__h),					\
+	       "=r" (__xx.__i.__l)					\
+	     : "%1" (m0),						\
+	       "r" (m1));						\
+    (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;				\
+  } while (0)
+#define sdiv_qrnnd(q, r, n1, n0, d) \
+  do {									\
+    union {DItype __ll;							\
+	   struct {USItype __h, __l;} __i;				\
+	  } __xx;							\
+    __xx.__i.__h = n1; __xx.__i.__l = n0;				\
+    __asm__ ("dr %0,%2"							\
+	     : "=r" (__xx.__ll)						\
+	     : "0" (__xx.__ll), "r" (d));				\
+    (q) = __xx.__i.__l; (r) = __xx.__i.__h;				\
+  } while (0)
+#endif
+
+#if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32
+#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
+  __asm__ ("addl %5,%1\n\tadcl %3,%0"					\
+	   : "=r" ((USItype) (sh)),					\
+	     "=&r" ((USItype) (sl))					\
+	   : "%0" ((USItype) (ah)),					\
+	     "g" ((USItype) (bh)),					\
+	     "%1" ((USItype) (al)),					\
+	     "g" ((USItype) (bl)))
+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
+  __asm__ ("subl %5,%1\n\tsbbl %3,%0"					\
+	   : "=r" ((USItype) (sh)),					\
+	     "=&r" ((USItype) (sl))					\
+	   : "0" ((USItype) (ah)),					\
+	     "g" ((USItype) (bh)),					\
+	     "1" ((USItype) (al)),					\
+	     "g" ((USItype) (bl)))
+#define umul_ppmm(w1, w0, u, v) \
+  __asm__ ("mull %3"							\
+	   : "=a" ((USItype) (w0)),					\
+	     "=d" ((USItype) (w1))					\
+	   : "%0" ((USItype) (u)),					\
+	     "rm" ((USItype) (v)))
+#define udiv_qrnnd(q, r, n1, n0, dv) \
+  __asm__ ("divl %4"							\
+	   : "=a" ((USItype) (q)),					\
+	     "=d" ((USItype) (r))					\
+	   : "0" ((USItype) (n0)),					\
+	     "1" ((USItype) (n1)),					\
+	     "rm" ((USItype) (dv)))
+#define count_leading_zeros(count, x) \
+  do {									\
+    USItype __cbtmp;							\
+    __asm__ ("bsrl %1,%0"						\
+	     : "=r" (__cbtmp) : "rm" ((USItype) (x)));			\
+    (count) = __cbtmp ^ 31;						\
+  } while (0)
+#define count_trailing_zeros(count, x) \
+  __asm__ ("bsfl %1,%0" : "=r" (count) : "rm" ((USItype)(x)))
+#define UMUL_TIME 40
+#define UDIV_TIME 40
+#endif /* 80x86 */
+
+#if defined (__i960__) && W_TYPE_SIZE == 32
+#define umul_ppmm(w1, w0, u, v) \
+  ({union {UDItype __ll;						\
+	   struct {USItype __l, __h;} __i;				\
+	  } __xx;							\
+  __asm__ ("emul	%2,%1,%0"					\
+	   : "=d" (__xx.__ll)						\
+	   : "%dI" ((USItype) (u)),					\
+	     "dI" ((USItype) (v)));					\
+  (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
+#define __umulsidi3(u, v) \
+  ({UDItype __w;							\
+    __asm__ ("emul	%2,%1,%0"					\
+	     : "=d" (__w)						\
+	     : "%dI" ((USItype) (u)),					\
+	       "dI" ((USItype) (v)));					\
+    __w; })
+#endif /* __i960__ */
+
+#if defined (__M32R__) && W_TYPE_SIZE == 32
+#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
+  /* The cmp clears the condition bit.  */ \
+  __asm__ ("cmp %0,%0\n\taddx %%5,%1\n\taddx %%3,%0"			\
+	   : "=r" ((USItype) (sh)),					\
+	     "=&r" ((USItype) (sl))					\
+	   : "%0" ((USItype) (ah)),					\
+	     "r" ((USItype) (bh)),					\
+	     "%1" ((USItype) (al)),					\
+	     "r" ((USItype) (bl))					\
+	   : "cbit")
+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
+  /* The cmp clears the condition bit.  */ \
+  __asm__ ("cmp %0,%0\n\tsubx %5,%1\n\tsubx %3,%0"			\
+	   : "=r" ((USItype) (sh)),					\
+	     "=&r" ((USItype) (sl))					\
+	   : "0" ((USItype) (ah)),					\
+	     "r" ((USItype) (bh)),					\
+	     "1" ((USItype) (al)),					\
+	     "r" ((USItype) (bl))					\
+	   : "cbit")
+#endif /* __M32R__ */
+
+#if defined (__mc68000__) && W_TYPE_SIZE == 32
+#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
+  __asm__ ("add%.l %5,%1\n\taddx%.l %3,%0"				\
+	   : "=d" ((USItype) (sh)),					\
+	     "=&d" ((USItype) (sl))					\
+	   : "%0" ((USItype) (ah)),					\
+	     "d" ((USItype) (bh)),					\
+	     "%1" ((USItype) (al)),					\
+	     "g" ((USItype) (bl)))
+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
+  __asm__ ("sub%.l %5,%1\n\tsubx%.l %3,%0"				\
+	   : "=d" ((USItype) (sh)),					\
+	     "=&d" ((USItype) (sl))					\
+	   : "0" ((USItype) (ah)),					\
+	     "d" ((USItype) (bh)),					\
+	     "1" ((USItype) (al)),					\
+	     "g" ((USItype) (bl)))
+
+/* The '020, '030, '040 and CPU32 have 32x32->64 and 64/32->32q-32r.  */
+#if defined (__mc68020__) || defined(mc68020) \
+	|| defined(__mc68030__) || defined(mc68030) \
+	|| defined(__mc68040__) || defined(mc68040) \
+	|| defined(__mcpu32__) || defined(mcpu32)
+#define umul_ppmm(w1, w0, u, v) \
+  __asm__ ("mulu%.l %3,%1:%0"						\
+	   : "=d" ((USItype) (w0)),					\
+	     "=d" ((USItype) (w1))					\
+	   : "%0" ((USItype) (u)),					\
+	     "dmi" ((USItype) (v)))
+#define UMUL_TIME 45
+#define udiv_qrnnd(q, r, n1, n0, d) \
+  __asm__ ("divu%.l %4,%1:%0"						\
+	   : "=d" ((USItype) (q)),					\
+	     "=d" ((USItype) (r))					\
+	   : "0" ((USItype) (n0)),					\
+	     "1" ((USItype) (n1)),					\
+	     "dmi" ((USItype) (d)))
+#define UDIV_TIME 90
+#define sdiv_qrnnd(q, r, n1, n0, d) \
+  __asm__ ("divs%.l %4,%1:%0"						\
+	   : "=d" ((USItype) (q)),					\
+	     "=d" ((USItype) (r))					\
+	   : "0" ((USItype) (n0)),					\
+	     "1" ((USItype) (n1)),					\
+	     "dmi" ((USItype) (d)))
+
+#else /* not mc68020 */
+#if !defined(__mcf5200__)
+/* %/ inserts REGISTER_PREFIX, %# inserts IMMEDIATE_PREFIX.  */
+#define umul_ppmm(xh, xl, a, b) \
+  __asm__ ("| Inlined umul_ppmm\n"					\
+	   "	move%.l	%2,%/d0\n"					\
+	   "	move%.l	%3,%/d1\n"					\
+	   "	move%.l	%/d0,%/d2\n"					\
+	   "	swap	%/d0\n"						\
+	   "	move%.l	%/d1,%/d3\n"					\
+	   "	swap	%/d1\n"						\
+	   "	move%.w	%/d2,%/d4\n"					\
+	   "	mulu	%/d3,%/d4\n"					\
+	   "	mulu	%/d1,%/d2\n"					\
+	   "	mulu	%/d0,%/d3\n"					\
+	   "	mulu	%/d0,%/d1\n"					\
+	   "	move%.l	%/d4,%/d0\n"					\
+	   "	eor%.w	%/d0,%/d0\n"					\
+	   "	swap	%/d0\n"						\
+	   "	add%.l	%/d0,%/d2\n"					\
+	   "	add%.l	%/d3,%/d2\n"					\
+	   "	jcc	1f\n"						\
+	   "	add%.l	%#65536,%/d1\n"					\
+	   "1:	swap	%/d2\n"						\
+	   "	moveq	%#0,%/d0\n"					\
+	   "	move%.w	%/d2,%/d0\n"					\
+	   "	move%.w	%/d4,%/d2\n"					\
+	   "	move%.l	%/d2,%1\n"					\
+	   "	add%.l	%/d1,%/d0\n"					\
+	   "	move%.l	%/d0,%0"					\
+	   : "=g" ((USItype) (xh)),					\
+	     "=g" ((USItype) (xl))					\
+	   : "g" ((USItype) (a)),					\
+	     "g" ((USItype) (b))					\
+	   : "d0", "d1", "d2", "d3", "d4")
+#define UMUL_TIME 100
+#define UDIV_TIME 400
+#endif /* not mcf5200 */
+#endif /* not mc68020 */
+
+/* The '020, '030, '040 and '060 have bitfield insns.  */
+#if defined (__mc68020__) || defined(mc68020) \
+	|| defined(__mc68030__) || defined(mc68030) \
+	|| defined(__mc68040__) || defined(mc68040) \
+	|| defined(__mc68060__) || defined(mc68060)
+#define count_leading_zeros(count, x) \
+  __asm__ ("bfffo %1{%b2:%b2},%0"					\
+	   : "=d" ((USItype) (count))					\
+	   : "od" ((USItype) (x)), "n" (0))
+#endif
+#endif /* mc68000 */
+
+#if defined (__m88000__) && W_TYPE_SIZE == 32
+#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
+  __asm__ ("addu.co %1,%r4,%r5\n\taddu.ci %0,%r2,%r3"			\
+	   : "=r" ((USItype) (sh)),					\
+	     "=&r" ((USItype) (sl))					\
+	   : "%rJ" ((USItype) (ah)),					\
+	     "rJ" ((USItype) (bh)),					\
+	     "%rJ" ((USItype) (al)),					\
+	     "rJ" ((USItype) (bl)))
+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
+  __asm__ ("subu.co %1,%r4,%r5\n\tsubu.ci %0,%r2,%r3"			\
+	   : "=r" ((USItype) (sh)),					\
+	     "=&r" ((USItype) (sl))					\
+	   : "rJ" ((USItype) (ah)),					\
+	     "rJ" ((USItype) (bh)),					\
+	     "rJ" ((USItype) (al)),					\
+	     "rJ" ((USItype) (bl)))
+#define count_leading_zeros(count, x) \
+  do {									\
+    USItype __cbtmp;							\
+    __asm__ ("ff1 %0,%1"						\
+	     : "=r" (__cbtmp)						\
+	     : "r" ((USItype) (x)));					\
+    (count) = __cbtmp ^ 31;						\
+  } while (0)
+#define COUNT_LEADING_ZEROS_0 63 /* sic */
+#if defined (__mc88110__)
+#define umul_ppmm(wh, wl, u, v) \
+  do {									\
+    union {UDItype __ll;						\
+	   struct {USItype __h, __l;} __i;				\
+	  } __xx;							\
+    __asm__ ("mulu.d	%0,%1,%2"					\
+	     : "=r" (__xx.__ll)						\
+	     : "r" ((USItype) (u)),					\
+	       "r" ((USItype) (v)));					\
+    (wh) = __xx.__i.__h;						\
+    (wl) = __xx.__i.__l;						\
+  } while (0)
+#define udiv_qrnnd(q, r, n1, n0, d) \
+  ({union {UDItype __ll;						\
+	   struct {USItype __h, __l;} __i;				\
+	  } __xx;							\
+  USItype __q;								\
+  __xx.__i.__h = (n1); __xx.__i.__l = (n0);				\
+  __asm__ ("divu.d %0,%1,%2"						\
+	   : "=r" (__q)							\
+	   : "r" (__xx.__ll),						\
+	     "r" ((USItype) (d)));					\
+  (r) = (n0) - __q * (d); (q) = __q; })
+#define UMUL_TIME 5
+#define UDIV_TIME 25
+#else
+#define UMUL_TIME 17
+#define UDIV_TIME 150
+#endif /* __mc88110__ */
+#endif /* __m88000__ */
+
+#if defined (__mips__) && W_TYPE_SIZE == 32
+#define umul_ppmm(w1, w0, u, v) \
+  __asm__ ("multu %2,%3"						\
+	   : "=l" ((USItype) (w0)),					\
+	     "=h" ((USItype) (w1))					\
+	   : "d" ((USItype) (u)),					\
+	     "d" ((USItype) (v)))
+#define UMUL_TIME 10
+#define UDIV_TIME 100
+#endif /* __mips__ */
+
+#if defined (__ns32000__) && W_TYPE_SIZE == 32
+#define umul_ppmm(w1, w0, u, v) \
+  ({union {UDItype __ll;						\
+	   struct {USItype __l, __h;} __i;				\
+	  } __xx;							\
+  __asm__ ("meid %2,%0"							\
+	   : "=g" (__xx.__ll)						\
+	   : "%0" ((USItype) (u)),					\
+	     "g" ((USItype) (v)));					\
+  (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
+#define __umulsidi3(u, v) \
+  ({UDItype __w;							\
+    __asm__ ("meid %2,%0"						\
+	     : "=g" (__w)						\
+	     : "%0" ((USItype) (u)),					\
+	       "g" ((USItype) (v)));					\
+    __w; })
+#define udiv_qrnnd(q, r, n1, n0, d) \
+  ({union {UDItype __ll;						\
+	   struct {USItype __l, __h;} __i;				\
+	  } __xx;							\
+  __xx.__i.__h = (n1); __xx.__i.__l = (n0);				\
+  __asm__ ("deid %2,%0"							\
+	   : "=g" (__xx.__ll)						\
+	   : "0" (__xx.__ll),						\
+	     "g" ((USItype) (d)));					\
+  (r) = __xx.__i.__l; (q) = __xx.__i.__h; })
+#define count_trailing_zeros(count,x) \
+  do {									\
+    __asm__ ("ffsd     %2,%0"						\
+            : "=r" ((USItype) (count))					\
+            : "0" ((USItype) 0),					\
+              "r" ((USItype) (x)));					\
+  } while (0)
+#endif /* __ns32000__ */
+
+/* FIXME: We should test _IBMR2 here when we add assembly support for the
+   system vendor compilers.
+   FIXME: What's needed for gcc PowerPC VxWorks?  __vxworks__ is not good
+   enough, since that hits ARM and m68k too.  */
+#if (defined (_ARCH_PPC)	/* AIX */				\
+     || defined (_ARCH_PWR)	/* AIX */				\
+     || defined (_ARCH_COM)	/* AIX */				\
+     || defined (__powerpc__)	/* gcc */				\
+     || defined (__POWERPC__)	/* BEOS */				\
+     || defined (__ppc__)	/* Darwin */				\
+     || defined (PPC)		/* GNU/Linux, SysV */			\
+     ) && W_TYPE_SIZE == 32
+#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
+  do {									\
+    if (__builtin_constant_p (bh) && (bh) == 0)				\
+      __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2"		\
+	     : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
+    else if (__builtin_constant_p (bh) && (bh) == ~(USItype) 0)		\
+      __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2"		\
+	     : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
+    else								\
+      __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3"		\
+	     : "=r" (sh), "=&r" (sl)					\
+	     : "%r" (ah), "r" (bh), "%r" (al), "rI" (bl));		\
+  } while (0)
+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
+  do {									\
+    if (__builtin_constant_p (ah) && (ah) == 0)				\
+      __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2"	\
+	       : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
+    else if (__builtin_constant_p (ah) && (ah) == ~(USItype) 0)		\
+      __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2"	\
+	       : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
+    else if (__builtin_constant_p (bh) && (bh) == 0)			\
+      __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2"		\
+	       : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
+    else if (__builtin_constant_p (bh) && (bh) == ~(USItype) 0)		\
+      __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2"		\
+	       : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
+    else								\
+      __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2"	\
+	       : "=r" (sh), "=&r" (sl)					\
+	       : "r" (ah), "r" (bh), "rI" (al), "r" (bl));		\
+  } while (0)
+#define count_leading_zeros(count, x) \
+  __asm__ ("{cntlz|cntlzw} %0,%1" : "=r" (count) : "r" (x))
+#define COUNT_LEADING_ZEROS_0 32
+#if defined (_ARCH_PPC) || defined (__powerpc__) || defined (__POWERPC__) \
+  || defined (__ppc__) || defined (PPC) || defined (__vxworks__)
+#define umul_ppmm(ph, pl, m0, m1) \
+  do {									\
+    USItype __m0 = (m0), __m1 = (m1);					\
+    __asm__ ("mulhwu %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1));	\
+    (pl) = __m0 * __m1;							\
+  } while (0)
+#define UMUL_TIME 15
+#define smul_ppmm(ph, pl, m0, m1) \
+  do {									\
+    SItype __m0 = (m0), __m1 = (m1);					\
+    __asm__ ("mulhw %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1));	\
+    (pl) = __m0 * __m1;							\
+  } while (0)
+#define SMUL_TIME 14
+#define UDIV_TIME 120
+#elif defined (_ARCH_PWR)
+#define UMUL_TIME 8
+#define smul_ppmm(xh, xl, m0, m1) \
+  __asm__ ("mul %0,%2,%3" : "=r" (xh), "=q" (xl) : "r" (m0), "r" (m1))
+#define SMUL_TIME 4
+#define sdiv_qrnnd(q, r, nh, nl, d) \
+  __asm__ ("div %0,%2,%4" : "=r" (q), "=q" (r) : "r" (nh), "1" (nl), "r" (d))
+#define UDIV_TIME 100
+#endif
+#endif /* 32-bit POWER architecture variants.  */
+
+/* We should test _IBMR2 here when we add assembly support for the system
+   vendor compilers.  */
+#if (defined (_ARCH_PPC64) || defined (__powerpc64__)) && W_TYPE_SIZE == 64
+#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
+  do {									\
+    if (__builtin_constant_p (bh) && (bh) == 0)				\
+      __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2"		\
+	     : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
+    else if (__builtin_constant_p (bh) && (bh) == ~(UDItype) 0)		\
+      __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2"		\
+	     : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
+    else								\
+      __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3"		\
+	     : "=r" (sh), "=&r" (sl)					\
+	     : "%r" (ah), "r" (bh), "%r" (al), "rI" (bl));		\
+  } while (0)
+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
+  do {									\
+    if (__builtin_constant_p (ah) && (ah) == 0)				\
+      __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2"	\
+	       : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
+    else if (__builtin_constant_p (ah) && (ah) == ~(UDItype) 0)		\
+      __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2"	\
+	       : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
+    else if (__builtin_constant_p (bh) && (bh) == 0)			\
+      __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2"		\
+	       : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
+    else if (__builtin_constant_p (bh) && (bh) == ~(UDItype) 0)		\
+      __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2"		\
+	       : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
+    else								\
+      __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2"	\
+	       : "=r" (sh), "=&r" (sl)					\
+	       : "r" (ah), "r" (bh), "rI" (al), "r" (bl));		\
+  } while (0)
+#define count_leading_zeros(count, x) \
+  __asm__ ("cntlzd %0,%1" : "=r" (count) : "r" (x))
+#define COUNT_LEADING_ZEROS_0 64
+#define umul_ppmm(ph, pl, m0, m1) \
+  do {									\
+    UDItype __m0 = (m0), __m1 = (m1);					\
+    __asm__ ("mulhdu %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1));	\
+    (pl) = __m0 * __m1;							\
+  } while (0)
+#define UMUL_TIME 15
+#define smul_ppmm(ph, pl, m0, m1) \
+  do {									\
+    DItype __m0 = (m0), __m1 = (m1);					\
+    __asm__ ("mulhd %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1));	\
+    (pl) = __m0 * __m1;							\
+  } while (0)
+#define SMUL_TIME 14  /* ??? */
+#define UDIV_TIME 120 /* ??? */
+#endif /* 64-bit PowerPC.  */
+
+#if defined (__ibm032__) /* RT/ROMP */ && W_TYPE_SIZE == 32
+#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
+  __asm__ ("a %1,%5\n\tae %0,%3"					\
+	   : "=r" ((USItype) (sh)),					\
+	     "=&r" ((USItype) (sl))					\
+	   : "%0" ((USItype) (ah)),					\
+	     "r" ((USItype) (bh)),					\
+	     "%1" ((USItype) (al)),					\
+	     "r" ((USItype) (bl)))
+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
+  __asm__ ("s %1,%5\n\tse %0,%3"					\
+	   : "=r" ((USItype) (sh)),					\
+	     "=&r" ((USItype) (sl))					\
+	   : "0" ((USItype) (ah)),					\
+	     "r" ((USItype) (bh)),					\
+	     "1" ((USItype) (al)),					\
+	     "r" ((USItype) (bl)))
+#define umul_ppmm(ph, pl, m0, m1) \
+  do {									\
+    USItype __m0 = (m0), __m1 = (m1);					\
+    __asm__ (								\
+       "s	r2,r2\n"						\
+"	mts	r10,%2\n"						\
+"	m	r2,%3\n"						\
+"	m	r2,%3\n"						\
+"	m	r2,%3\n"						\
+"	m	r2,%3\n"						\
+"	m	r2,%3\n"						\
+"	m	r2,%3\n"						\
+"	m	r2,%3\n"						\
+"	m	r2,%3\n"						\
+"	m	r2,%3\n"						\
+"	m	r2,%3\n"						\
+"	m	r2,%3\n"						\
+"	m	r2,%3\n"						\
+"	m	r2,%3\n"						\
+"	m	r2,%3\n"						\
+"	m	r2,%3\n"						\
+"	m	r2,%3\n"						\
+"	cas	%0,r2,r0\n"						\
+"	mfs	r10,%1"							\
+	     : "=r" ((USItype) (ph)),					\
+	       "=r" ((USItype) (pl))					\
+	     : "%r" (__m0),						\
+		"r" (__m1)						\
+	     : "r2");							\
+    (ph) += ((((SItype) __m0 >> 31) & __m1)				\
+	     + (((SItype) __m1 >> 31) & __m0));				\
+  } while (0)
+#define UMUL_TIME 20
+#define UDIV_TIME 200
+#define count_leading_zeros(count, x) \
+  do {									\
+    if ((x) >= 0x10000)							\
+      __asm__ ("clz	%0,%1"						\
+	       : "=r" ((USItype) (count))				\
+	       : "r" ((USItype) (x) >> 16));				\
+    else								\
+      {									\
+	__asm__ ("clz	%0,%1"						\
+		 : "=r" ((USItype) (count))				\
+		 : "r" ((USItype) (x)));					\
+	(count) += 16;							\
+      }									\
+  } while (0)
+#endif
+
+#if defined (__sh2__) && W_TYPE_SIZE == 32
+#define umul_ppmm(w1, w0, u, v) \
+  __asm__ (								\
+       "dmulu.l	%2,%3\n\tsts	macl,%1\n\tsts	mach,%0"		\
+	   : "=r" ((USItype)(w1)),					\
+	     "=r" ((USItype)(w0))					\
+	   : "r" ((USItype)(u)),					\
+	     "r" ((USItype)(v))						\
+	   : "macl", "mach")
+#define UMUL_TIME 5
+#endif
+
+#if defined (__SH5__) && __SHMEDIA__ && W_TYPE_SIZE == 32
+#define __umulsidi3(u,v) ((UDItype)(USItype)u*(USItype)v)
+#define count_leading_zeros(count, x) \
+  do									\
+    {									\
+      UDItype x_ = (USItype)(x);					\
+      SItype c_;							\
+									\
+      __asm__ ("nsb %1, %0" : "=r" (c_) : "r" (x_));			\
+      (count) = c_ - 31;						\
+    }									\
+  while (0)
+#define COUNT_LEADING_ZEROS_0 32
+#endif
+
+#if defined (__sparc__) && !defined (__arch64__) && !defined (__sparcv9) \
+    && W_TYPE_SIZE == 32
+#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
+  __asm__ ("addcc %r4,%5,%1\n\taddx %r2,%3,%0"				\
+	   : "=r" ((USItype) (sh)),					\
+	     "=&r" ((USItype) (sl))					\
+	   : "%rJ" ((USItype) (ah)),					\
+	     "rI" ((USItype) (bh)),					\
+	     "%rJ" ((USItype) (al)),					\
+	     "rI" ((USItype) (bl))					\
+	   __CLOBBER_CC)
+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
+  __asm__ ("subcc %r4,%5,%1\n\tsubx %r2,%3,%0"				\
+	   : "=r" ((USItype) (sh)),					\
+	     "=&r" ((USItype) (sl))					\
+	   : "rJ" ((USItype) (ah)),					\
+	     "rI" ((USItype) (bh)),					\
+	     "rJ" ((USItype) (al)),					\
+	     "rI" ((USItype) (bl))					\
+	   __CLOBBER_CC)
+#if defined (__sparc_v8__)
+#define umul_ppmm(w1, w0, u, v) \
+  __asm__ ("umul %2,%3,%1;rd %%y,%0"					\
+	   : "=r" ((USItype) (w1)),					\
+	     "=r" ((USItype) (w0))					\
+	   : "r" ((USItype) (u)),					\
+	     "r" ((USItype) (v)))
+#define udiv_qrnnd(__q, __r, __n1, __n0, __d) \
+  __asm__ ("mov %2,%%y;nop;nop;nop;udiv %3,%4,%0;umul %0,%4,%1;sub %3,%1,%1"\
+	   : "=&r" ((USItype) (__q)),					\
+	     "=&r" ((USItype) (__r))					\
+	   : "r" ((USItype) (__n1)),					\
+	     "r" ((USItype) (__n0)),					\
+	     "r" ((USItype) (__d)))
+#else
+#if defined (__sparclite__)
+/* This has hardware multiply but not divide.  It also has two additional
+   instructions scan (ffs from high bit) and divscc.  */
+#define umul_ppmm(w1, w0, u, v) \
+  __asm__ ("umul %2,%3,%1;rd %%y,%0"					\
+	   : "=r" ((USItype) (w1)),					\
+	     "=r" ((USItype) (w0))					\
+	   : "r" ((USItype) (u)),					\
+	     "r" ((USItype) (v)))
+#define udiv_qrnnd(q, r, n1, n0, d) \
+  __asm__ ("! Inlined udiv_qrnnd\n"					\
+"	wr	%%g0,%2,%%y	! Not a delayed write for sparclite\n"	\
+"	tst	%%g0\n"							\
+"	divscc	%3,%4,%%g1\n"						\
+"	divscc	%%g1,%4,%%g1\n"						\
+"	divscc	%%g1,%4,%%g1\n"						\
+"	divscc	%%g1,%4,%%g1\n"						\
+"	divscc	%%g1,%4,%%g1\n"						\
+"	divscc	%%g1,%4,%%g1\n"						\
+"	divscc	%%g1,%4,%%g1\n"						\
+"	divscc	%%g1,%4,%%g1\n"						\
+"	divscc	%%g1,%4,%%g1\n"						\
+"	divscc	%%g1,%4,%%g1\n"						\
+"	divscc	%%g1,%4,%%g1\n"						\
+"	divscc	%%g1,%4,%%g1\n"						\
+"	divscc	%%g1,%4,%%g1\n"						\
+"	divscc	%%g1,%4,%%g1\n"						\
+"	divscc	%%g1,%4,%%g1\n"						\
+"	divscc	%%g1,%4,%%g1\n"						\
+"	divscc	%%g1,%4,%%g1\n"						\
+"	divscc	%%g1,%4,%%g1\n"						\
+"	divscc	%%g1,%4,%%g1\n"						\
+"	divscc	%%g1,%4,%%g1\n"						\
+"	divscc	%%g1,%4,%%g1\n"						\
+"	divscc	%%g1,%4,%%g1\n"						\
+"	divscc	%%g1,%4,%%g1\n"						\
+"	divscc	%%g1,%4,%%g1\n"						\
+"	divscc	%%g1,%4,%%g1\n"						\
+"	divscc	%%g1,%4,%%g1\n"						\
+"	divscc	%%g1,%4,%%g1\n"						\
+"	divscc	%%g1,%4,%%g1\n"						\
+"	divscc	%%g1,%4,%%g1\n"						\
+"	divscc	%%g1,%4,%%g1\n"						\
+"	divscc	%%g1,%4,%%g1\n"						\
+"	divscc	%%g1,%4,%0\n"						\
+"	rd	%%y,%1\n"						\
+"	bl,a 1f\n"							\
+"	add	%1,%4,%1\n"						\
+"1:	! End of inline udiv_qrnnd"					\
+	   : "=r" ((USItype) (q)),					\
+	     "=r" ((USItype) (r))					\
+	   : "r" ((USItype) (n1)),					\
+	     "r" ((USItype) (n0)),					\
+	     "rI" ((USItype) (d))					\
+	   : "g1" __AND_CLOBBER_CC)
+#define UDIV_TIME 37
+#define count_leading_zeros(count, x) \
+  do {                                                                  \
+  __asm__ ("scan %1,1,%0"                                               \
+           : "=r" ((USItype) (count))                                   \
+           : "r" ((USItype) (x)));					\
+  } while (0)
+/* Early sparclites return 63 for an argument of 0, but they warn that future
+   implementations might change this.  Therefore, leave COUNT_LEADING_ZEROS_0
+   undefined.  */
+#else
+/* SPARC without integer multiplication and divide instructions.
+   (i.e. at least Sun4/20,40,60,65,75,110,260,280,330,360,380,470,490) */
+#define umul_ppmm(w1, w0, u, v) \
+  __asm__ ("! Inlined umul_ppmm\n"					\
+"	wr	%%g0,%2,%%y	! SPARC has 0-3 delay insn after a wr\n"\
+"	sra	%3,31,%%o5	! Don't move this insn\n"		\
+"	and	%2,%%o5,%%o5	! Don't move this insn\n"		\
+"	andcc	%%g0,0,%%g1	! Don't move this insn\n"		\
+"	mulscc	%%g1,%3,%%g1\n"						\
+"	mulscc	%%g1,%3,%%g1\n"						\
+"	mulscc	%%g1,%3,%%g1\n"						\
+"	mulscc	%%g1,%3,%%g1\n"						\
+"	mulscc	%%g1,%3,%%g1\n"						\
+"	mulscc	%%g1,%3,%%g1\n"						\
+"	mulscc	%%g1,%3,%%g1\n"						\
+"	mulscc	%%g1,%3,%%g1\n"						\
+"	mulscc	%%g1,%3,%%g1\n"						\
+"	mulscc	%%g1,%3,%%g1\n"						\
+"	mulscc	%%g1,%3,%%g1\n"						\
+"	mulscc	%%g1,%3,%%g1\n"						\
+"	mulscc	%%g1,%3,%%g1\n"						\
+"	mulscc	%%g1,%3,%%g1\n"						\
+"	mulscc	%%g1,%3,%%g1\n"						\
+"	mulscc	%%g1,%3,%%g1\n"						\
+"	mulscc	%%g1,%3,%%g1\n"						\
+"	mulscc	%%g1,%3,%%g1\n"						\
+"	mulscc	%%g1,%3,%%g1\n"						\
+"	mulscc	%%g1,%3,%%g1\n"						\
+"	mulscc	%%g1,%3,%%g1\n"						\
+"	mulscc	%%g1,%3,%%g1\n"						\
+"	mulscc	%%g1,%3,%%g1\n"						\
+"	mulscc	%%g1,%3,%%g1\n"						\
+"	mulscc	%%g1,%3,%%g1\n"						\
+"	mulscc	%%g1,%3,%%g1\n"						\
+"	mulscc	%%g1,%3,%%g1\n"						\
+"	mulscc	%%g1,%3,%%g1\n"						\
+"	mulscc	%%g1,%3,%%g1\n"						\
+"	mulscc	%%g1,%3,%%g1\n"						\
+"	mulscc	%%g1,%3,%%g1\n"						\
+"	mulscc	%%g1,%3,%%g1\n"						\
+"	mulscc	%%g1,0,%%g1\n"						\
+"	add	%%g1,%%o5,%0\n"						\
+"	rd	%%y,%1"							\
+	   : "=r" ((USItype) (w1)),					\
+	     "=r" ((USItype) (w0))					\
+	   : "%rI" ((USItype) (u)),					\
+	     "r" ((USItype) (v))						\
+	   : "g1", "o5" __AND_CLOBBER_CC)
+#define UMUL_TIME 39		/* 39 instructions */
+/* It's quite necessary to add this much assembler for the sparc.
+   The default udiv_qrnnd (in C) is more than 10 times slower!  */
+#define udiv_qrnnd(__q, __r, __n1, __n0, __d) \
+  __asm__ ("! Inlined udiv_qrnnd\n"					\
+"	mov	32,%%g1\n"						\
+"	subcc	%1,%2,%%g0\n"						\
+"1:	bcs	5f\n"							\
+"	 addxcc %0,%0,%0	! shift n1n0 and a q-bit in lsb\n"	\
+"	sub	%1,%2,%1	! this kills msb of n\n"		\
+"	addx	%1,%1,%1	! so this can't give carry\n"		\
+"	subcc	%%g1,1,%%g1\n"						\
+"2:	bne	1b\n"							\
+"	 subcc	%1,%2,%%g0\n"						\
+"	bcs	3f\n"							\
+"	 addxcc %0,%0,%0	! shift n1n0 and a q-bit in lsb\n"	\
+"	b	3f\n"							\
+"	 sub	%1,%2,%1	! this kills msb of n\n"		\
+"4:	sub	%1,%2,%1\n"						\
+"5:	addxcc	%1,%1,%1\n"						\
+"	bcc	2b\n"							\
+"	 subcc	%%g1,1,%%g1\n"						\
+"! Got carry from n.  Subtract next step to cancel this carry.\n"	\
+"	bne	4b\n"							\
+"	 addcc	%0,%0,%0	! shift n1n0 and a 0-bit in lsb\n"	\
+"	sub	%1,%2,%1\n"						\
+"3:	xnor	%0,0,%0\n"						\
+"	! End of inline udiv_qrnnd"					\
+	   : "=&r" ((USItype) (__q)),					\
+	     "=&r" ((USItype) (__r))					\
+	   : "r" ((USItype) (__d)),					\
+	     "1" ((USItype) (__n1)),					\
+	     "0" ((USItype) (__n0)) : "g1" __AND_CLOBBER_CC)
+#define UDIV_TIME (3+7*32)	/* 7 instructions/iteration. 32 iterations.  */
+#endif /* __sparclite__ */
+#endif /* __sparc_v8__ */
+#endif /* sparc32 */
+
+#if ((defined (__sparc__) && defined (__arch64__)) || defined (__sparcv9)) \
+    && W_TYPE_SIZE == 64
+#define add_ssaaaa(sh, sl, ah, al, bh, bl)				\
+  __asm__ ("addcc %r4,%5,%1\n\t"					\
+   	   "add %r2,%3,%0\n\t"						\
+   	   "bcs,a,pn %%xcc, 1f\n\t"					\
+   	   "add %0, 1, %0\n"						\
+	   "1:"								\
+	   : "=r" ((UDItype)(sh)),				      	\
+	     "=&r" ((UDItype)(sl))				      	\
+	   : "%rJ" ((UDItype)(ah)),				     	\
+	     "rI" ((UDItype)(bh)),				      	\
+	     "%rJ" ((UDItype)(al)),				     	\
+	     "rI" ((UDItype)(bl))				       	\
+	   __CLOBBER_CC)
+
+#define sub_ddmmss(sh, sl, ah, al, bh, bl) 				\
+  __asm__ ("subcc %r4,%5,%1\n\t"					\
+   	   "sub %r2,%3,%0\n\t"						\
+   	   "bcs,a,pn %%xcc, 1f\n\t"					\
+   	   "sub %0, 1, %0\n\t"						\
+	   "1:"								\
+	   : "=r" ((UDItype)(sh)),				      	\
+	     "=&r" ((UDItype)(sl))				      	\
+	   : "rJ" ((UDItype)(ah)),				     	\
+	     "rI" ((UDItype)(bh)),				      	\
+	     "rJ" ((UDItype)(al)),				     	\
+	     "rI" ((UDItype)(bl))				       	\
+	   __CLOBBER_CC)
+
+#define umul_ppmm(wh, wl, u, v)						\
+  do {									\
+	  UDItype tmp1, tmp2, tmp3, tmp4;				\
+	  __asm__ __volatile__ (					\
+		   "srl %7,0,%3\n\t"					\
+		   "mulx %3,%6,%1\n\t"					\
+		   "srlx %6,32,%2\n\t"					\
+		   "mulx %2,%3,%4\n\t"					\
+		   "sllx %4,32,%5\n\t"					\
+		   "srl %6,0,%3\n\t"					\
+		   "sub %1,%5,%5\n\t"					\
+		   "srlx %5,32,%5\n\t"					\
+		   "addcc %4,%5,%4\n\t"					\
+		   "srlx %7,32,%5\n\t"					\
+		   "mulx %3,%5,%3\n\t"					\
+		   "mulx %2,%5,%5\n\t"					\
+		   "sethi %%hi(0x80000000),%2\n\t"			\
+		   "addcc %4,%3,%4\n\t"					\
+		   "srlx %4,32,%4\n\t"					\
+		   "add %2,%2,%2\n\t"					\
+		   "movcc %%xcc,%%g0,%2\n\t"				\
+		   "addcc %5,%4,%5\n\t"					\
+		   "sllx %3,32,%3\n\t"					\
+		   "add %1,%3,%1\n\t"					\
+		   "add %5,%2,%0"					\
+	   : "=r" ((UDItype)(wh)),					\
+	     "=&r" ((UDItype)(wl)),					\
+	     "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4)	\
+	   : "r" ((UDItype)(u)),					\
+	     "r" ((UDItype)(v))						\
+	   __CLOBBER_CC);						\
+  } while (0)
+#define UMUL_TIME 96
+#define UDIV_TIME 230
+#endif /* sparc64 */
+
+#if defined (__vax__) && W_TYPE_SIZE == 32
+#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
+  __asm__ ("addl2 %5,%1\n\tadwc %3,%0"					\
+	   : "=g" ((USItype) (sh)),					\
+	     "=&g" ((USItype) (sl))					\
+	   : "%0" ((USItype) (ah)),					\
+	     "g" ((USItype) (bh)),					\
+	     "%1" ((USItype) (al)),					\
+	     "g" ((USItype) (bl)))
+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
+  __asm__ ("subl2 %5,%1\n\tsbwc %3,%0"					\
+	   : "=g" ((USItype) (sh)),					\
+	     "=&g" ((USItype) (sl))					\
+	   : "0" ((USItype) (ah)),					\
+	     "g" ((USItype) (bh)),					\
+	     "1" ((USItype) (al)),					\
+	     "g" ((USItype) (bl)))
+#define umul_ppmm(xh, xl, m0, m1) \
+  do {									\
+    union {								\
+	UDItype __ll;							\
+	struct {USItype __l, __h;} __i;					\
+      } __xx;								\
+    USItype __m0 = (m0), __m1 = (m1);					\
+    __asm__ ("emul %1,%2,$0,%0"						\
+	     : "=r" (__xx.__ll)						\
+	     : "g" (__m0),						\
+	       "g" (__m1));						\
+    (xh) = __xx.__i.__h;						\
+    (xl) = __xx.__i.__l;						\
+    (xh) += ((((SItype) __m0 >> 31) & __m1)				\
+	     + (((SItype) __m1 >> 31) & __m0));				\
+  } while (0)
+#define sdiv_qrnnd(q, r, n1, n0, d) \
+  do {									\
+    union {DItype __ll;							\
+	   struct {SItype __l, __h;} __i;				\
+	  } __xx;							\
+    __xx.__i.__h = n1; __xx.__i.__l = n0;				\
+    __asm__ ("ediv %3,%2,%0,%1"						\
+	     : "=g" (q), "=g" (r)					\
+	     : "g" (__xx.__ll), "g" (d));				\
+  } while (0)
+#endif /* __vax__ */
+
+#if defined (__z8000__) && W_TYPE_SIZE == 16
+#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
+  __asm__ ("add	%H1,%H5\n\tadc	%H0,%H3"				\
+	   : "=r" ((unsigned int)(sh)),					\
+	     "=&r" ((unsigned int)(sl))					\
+	   : "%0" ((unsigned int)(ah)),					\
+	     "r" ((unsigned int)(bh)),					\
+	     "%1" ((unsigned int)(al)),					\
+	     "rQR" ((unsigned int)(bl)))
+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
+  __asm__ ("sub	%H1,%H5\n\tsbc	%H0,%H3"				\
+	   : "=r" ((unsigned int)(sh)),					\
+	     "=&r" ((unsigned int)(sl))					\
+	   : "0" ((unsigned int)(ah)),					\
+	     "r" ((unsigned int)(bh)),					\
+	     "1" ((unsigned int)(al)),					\
+	     "rQR" ((unsigned int)(bl)))
+#define umul_ppmm(xh, xl, m0, m1) \
+  do {									\
+    union {long int __ll;						\
+	   struct {unsigned int __h, __l;} __i;				\
+	  } __xx;							\
+    unsigned int __m0 = (m0), __m1 = (m1);				\
+    __asm__ ("mult	%S0,%H3"					\
+	     : "=r" (__xx.__i.__h),					\
+	       "=r" (__xx.__i.__l)					\
+	     : "%1" (__m0),						\
+	       "rQR" (__m1));						\
+    (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;				\
+    (xh) += ((((signed int) __m0 >> 15) & __m1)				\
+	     + (((signed int) __m1 >> 15) & __m0));			\
+  } while (0)
+#endif /* __z8000__ */
+
+#endif /* __GNUC__ */
+
+/* If this machine has no inline assembler, use C macros.  */
+
+#if !defined (add_ssaaaa)
+#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
+  do {									\
+    UWtype __x;								\
+    __x = (al) + (bl);							\
+    (sh) = (ah) + (bh) + (__x < (al));					\
+    (sl) = __x;								\
+  } while (0)
+#endif
+
+#if !defined (sub_ddmmss)
+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
+  do {									\
+    UWtype __x;								\
+    __x = (al) - (bl);							\
+    (sh) = (ah) - (bh) - (__x > (al));					\
+    (sl) = __x;								\
+  } while (0)
+#endif
+
+#if !defined (umul_ppmm)
+#define umul_ppmm(w1, w0, u, v)						\
+  do {									\
+    UWtype __x0, __x1, __x2, __x3;					\
+    UHWtype __ul, __vl, __uh, __vh;					\
+									\
+    __ul = __ll_lowpart (u);						\
+    __uh = __ll_highpart (u);						\
+    __vl = __ll_lowpart (v);						\
+    __vh = __ll_highpart (v);						\
+									\
+    __x0 = (UWtype) __ul * __vl;					\
+    __x1 = (UWtype) __ul * __vh;					\
+    __x2 = (UWtype) __uh * __vl;					\
+    __x3 = (UWtype) __uh * __vh;					\
+									\
+    __x1 += __ll_highpart (__x0);/* this can't give carry */		\
+    __x1 += __x2;		/* but this indeed can */		\
+    if (__x1 < __x2)		/* did we get it? */			\
+      __x3 += __ll_B;		/* yes, add it in the proper pos.  */	\
+									\
+    (w1) = __x3 + __ll_highpart (__x1);					\
+    (w0) = __ll_lowpart (__x1) * __ll_B + __ll_lowpart (__x0);		\
+  } while (0)
+#endif
+
+#if !defined (__umulsidi3)
+#define __umulsidi3(u, v) \
+  ({DWunion __w;							\
+    umul_ppmm (__w.s.high, __w.s.low, u, v);				\
+    __w.ll; })
+#endif
+
+/* Define this unconditionally, so it can be used for debugging.  */
+#define __udiv_qrnnd_c(q, r, n1, n0, d) \
+  do {									\
+    UWtype __d1, __d0, __q1, __q0;					\
+    UWtype __r1, __r0, __m;						\
+    __d1 = __ll_highpart (d);						\
+    __d0 = __ll_lowpart (d);						\
+									\
+    __r1 = (n1) % __d1;							\
+    __q1 = (n1) / __d1;							\
+    __m = (UWtype) __q1 * __d0;						\
+    __r1 = __r1 * __ll_B | __ll_highpart (n0);				\
+    if (__r1 < __m)							\
+      {									\
+	__q1--, __r1 += (d);						\
+	if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\
+	  if (__r1 < __m)						\
+	    __q1--, __r1 += (d);					\
+      }									\
+    __r1 -= __m;							\
+									\
+    __r0 = __r1 % __d1;							\
+    __q0 = __r1 / __d1;							\
+    __m = (UWtype) __q0 * __d0;						\
+    __r0 = __r0 * __ll_B | __ll_lowpart (n0);				\
+    if (__r0 < __m)							\
+      {									\
+	__q0--, __r0 += (d);						\
+	if (__r0 >= (d))						\
+	  if (__r0 < __m)						\
+	    __q0--, __r0 += (d);					\
+      }									\
+    __r0 -= __m;							\
+									\
+    (q) = (UWtype) __q1 * __ll_B | __q0;				\
+    (r) = __r0;								\
+  } while (0)
+
+/* If the processor has no udiv_qrnnd but sdiv_qrnnd, go through
+   __udiv_w_sdiv (defined in libgcc or elsewhere).  */
+#if !defined (udiv_qrnnd) && defined (sdiv_qrnnd)
+#define udiv_qrnnd(q, r, nh, nl, d) \
+  do {									\
+    USItype __r;							\
+    (q) = __udiv_w_sdiv (&__r, nh, nl, d);				\
+    (r) = __r;								\
+  } while (0)
+#endif
+
+/* If udiv_qrnnd was not defined for this processor, use __udiv_qrnnd_c.  */
+#if !defined (udiv_qrnnd)
+#define UDIV_NEEDS_NORMALIZATION 1
+#define udiv_qrnnd __udiv_qrnnd_c
+#endif
+
+#if !defined (count_leading_zeros)
+extern const UQItype __clz_tab[];
+#define count_leading_zeros(count, x) \
+  do {									\
+    UWtype __xr = (x);							\
+    UWtype __a;								\
+									\
+    if (W_TYPE_SIZE <= 32)						\
+      {									\
+	__a = __xr < ((UWtype)1<<2*__BITS4)				\
+	  ? (__xr < ((UWtype)1<<__BITS4) ? 0 : __BITS4)			\
+	  : (__xr < ((UWtype)1<<3*__BITS4) ?  2*__BITS4 : 3*__BITS4);	\
+      }									\
+    else								\
+      {									\
+	for (__a = W_TYPE_SIZE - 8; __a > 0; __a -= 8)			\
+	  if (((__xr >> __a) & 0xff) != 0)				\
+	    break;							\
+      }									\
+									\
+    (count) = W_TYPE_SIZE - (__clz_tab[__xr >> __a] + __a);		\
+  } while (0)
+#define COUNT_LEADING_ZEROS_0 W_TYPE_SIZE
+#endif
+
+#if !defined (count_trailing_zeros)
+/* Define count_trailing_zeros using count_leading_zeros.  The latter might be
+   defined in asm, but if it is not, the C version above is good enough.  */
+#define count_trailing_zeros(count, x) \
+  do {									\
+    UWtype __ctz_x = (x);						\
+    UWtype __ctz_c;							\
+    count_leading_zeros (__ctz_c, __ctz_x & -__ctz_x);			\
+    (count) = W_TYPE_SIZE - 1 - __ctz_c;				\
+  } while (0)
+#endif
+
+#ifndef UDIV_NEEDS_NORMALIZATION
+#define UDIV_NEEDS_NORMALIZATION 0
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/ndiswrapper/divdi3.c
+++ linux-mvl-dove-2.6.32/ubuntu/ndiswrapper/divdi3.c
@@ -0,0 +1,329 @@
+/* 64-bit multiplication and division
+   Copyright (C) 1989, 1992-1999, 2000, 2001, 2002, 2003
+   Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, write to the Free
+   Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+   02111-1307 USA.  */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+
+#if BITS_PER_LONG != 32
+#error This is for 32-bit targets only
+#endif
+
+typedef unsigned int UQItype	__attribute__ ((mode (QI)));
+typedef          int SItype	__attribute__ ((mode (SI)));
+typedef unsigned int USItype	__attribute__ ((mode (SI)));
+typedef          int DItype	__attribute__ ((mode (DI)));
+typedef unsigned int UDItype	__attribute__ ((mode (DI)));
+#define Wtype SItype
+#define HWtype SItype
+#define DWtype DItype
+#define UWtype USItype
+#define UHWtype USItype
+#define UDWtype UDItype
+#define W_TYPE_SIZE 32
+
+#include "longlong.h"
+
+#if defined(__BIG_ENDIAN)
+struct DWstruct { Wtype high, low;};
+#elif defined(__LITTLE_ENDIAN)
+struct DWstruct { Wtype low, high;};
+#else
+#error Unhandled endianity
+#endif
+typedef union { struct DWstruct s; DWtype ll; } DWunion;
+
+/* Prototypes of exported functions.  */
+extern DWtype __divdi3 (DWtype u, DWtype v);
+extern DWtype __moddi3 (DWtype u, DWtype v);
+extern UDWtype __udivdi3 (UDWtype u, UDWtype v);
+extern UDWtype __umoddi3 (UDWtype u, UDWtype v);
+
+static UDWtype
+__udivmoddi4 (UDWtype n, UDWtype d, UDWtype *rp)
+{
+  DWunion ww;
+  DWunion nn, dd;
+  DWunion rr;
+  UWtype d0, d1, n0, n1, n2;
+  UWtype q0, q1;
+  UWtype b, bm;
+
+  nn.ll = n;
+  dd.ll = d;
+
+  d0 = dd.s.low;
+  d1 = dd.s.high;
+  n0 = nn.s.low;
+  n1 = nn.s.high;
+
+#if !UDIV_NEEDS_NORMALIZATION
+  if (d1 == 0)
+    {
+      if (d0 > n1)
+	{
+	  /* 0q = nn / 0D */
+
+	  udiv_qrnnd (q0, n0, n1, n0, d0);
+	  q1 = 0;
+
+	  /* Remainder in n0.  */
+	}
+      else
+	{
+	  /* qq = NN / 0d */
+
+	  if (d0 == 0)
+	    d0 = 1 / d0;	/* Divide intentionally by zero.  */
+
+	  udiv_qrnnd (q1, n1, 0, n1, d0);
+	  udiv_qrnnd (q0, n0, n1, n0, d0);
+
+	  /* Remainder in n0.  */
+	}
+
+      if (rp != 0)
+	{
+	  rr.s.low = n0;
+	  rr.s.high = 0;
+	  *rp = rr.ll;
+	}
+    }
+
+#else /* UDIV_NEEDS_NORMALIZATION */
+
+  if (d1 == 0)
+    {
+      if (d0 > n1)
+	{
+	  /* 0q = nn / 0D */
+
+	  count_leading_zeros (bm, d0);
+
+	  if (bm != 0)
+	    {
+	      /* Normalize, i.e. make the most significant bit of the
+		 denominator set.  */
+
+	      d0 = d0 << bm;
+	      n1 = (n1 << bm) | (n0 >> (W_TYPE_SIZE - bm));
+	      n0 = n0 << bm;
+	    }
+
+	  udiv_qrnnd (q0, n0, n1, n0, d0);
+	  q1 = 0;
+
+	  /* Remainder in n0 >> bm.  */
+	}
+      else
+	{
+	  /* qq = NN / 0d */
+
+	  if (d0 == 0)
+	    d0 = 1 / d0;	/* Divide intentionally by zero.  */
+
+	  count_leading_zeros (bm, d0);
+
+	  if (bm == 0)
+	    {
+	      /* From (n1 >= d0) /\ (the most significant bit of d0 is set),
+		 conclude (the most significant bit of n1 is set) /\ (the
+		 leading quotient digit q1 = 1).
+
+		 This special case is necessary, not an optimization.
+		 (Shifts counts of W_TYPE_SIZE are undefined.)  */
+
+	      n1 -= d0;
+	      q1 = 1;
+	    }
+	  else
+	    {
+	      /* Normalize.  */
+
+	      b = W_TYPE_SIZE - bm;
+
+	      d0 = d0 << bm;
+	      n2 = n1 >> b;
+	      n1 = (n1 << bm) | (n0 >> b);
+	      n0 = n0 << bm;
+
+	      udiv_qrnnd (q1, n1, n2, n1, d0);
+	    }
+
+	  /* n1 != d0...  */
+
+	  udiv_qrnnd (q0, n0, n1, n0, d0);
+
+	  /* Remainder in n0 >> bm.  */
+	}
+
+      if (rp != 0)
+	{
+	  rr.s.low = n0 >> bm;
+	  rr.s.high = 0;
+	  *rp = rr.ll;
+	}
+    }
+#endif /* UDIV_NEEDS_NORMALIZATION */
+
+  else
+    {
+      if (d1 > n1)
+	{
+	  /* 00 = nn / DD */
+
+	  q0 = 0;
+	  q1 = 0;
+
+	  /* Remainder in n1n0.  */
+	  if (rp != 0)
+	    {
+	      rr.s.low = n0;
+	      rr.s.high = n1;
+	      *rp = rr.ll;
+	    }
+	}
+      else
+	{
+	  /* 0q = NN / dd */
+
+	  count_leading_zeros (bm, d1);
+	  if (bm == 0)
+	    {
+	      /* From (n1 >= d1) /\ (the most significant bit of d1 is set),
+		 conclude (the most significant bit of n1 is set) /\ (the
+		 quotient digit q0 = 0 or 1).
+
+		 This special case is necessary, not an optimization.  */
+
+	      /* The condition on the next line takes advantage of that
+		 n1 >= d1 (true due to program flow).  */
+	      if (n1 > d1 || n0 >= d0)
+		{
+		  q0 = 1;
+		  sub_ddmmss (n1, n0, n1, n0, d1, d0);
+		}
+	      else
+		q0 = 0;
+
+	      q1 = 0;
+
+	      if (rp != 0)
+		{
+		  rr.s.low = n0;
+		  rr.s.high = n1;
+		  *rp = rr.ll;
+		}
+	    }
+	  else
+	    {
+	      UWtype m1, m0;
+	      /* Normalize.  */
+
+	      b = W_TYPE_SIZE - bm;
+
+	      d1 = (d1 << bm) | (d0 >> b);
+	      d0 = d0 << bm;
+	      n2 = n1 >> b;
+	      n1 = (n1 << bm) | (n0 >> b);
+	      n0 = n0 << bm;
+
+	      udiv_qrnnd (q0, n1, n2, n1, d1);
+	      umul_ppmm (m1, m0, q0, d0);
+
+	      if (m1 > n1 || (m1 == n1 && m0 > n0))
+		{
+		  q0--;
+		  sub_ddmmss (m1, m0, m1, m0, d1, d0);
+		}
+
+	      q1 = 0;
+
+	      /* Remainder in (n1n0 - m1m0) >> bm.  */
+	      if (rp != 0)
+		{
+		  sub_ddmmss (n1, n0, n1, n0, m1, m0);
+		  rr.s.low = (n1 << b) | (n0 >> bm);
+		  rr.s.high = n1 >> bm;
+		  *rp = rr.ll;
+		}
+	    }
+	}
+    }
+
+  ww.s.low = q0;
+  ww.s.high = q1;
+  return ww.ll;
+}
+
+DWtype
+__divdi3 (DWtype u, DWtype v)
+{
+  Wtype c = 0;
+  DWtype w;
+
+  if (u < 0)
+    {
+      c = ~c;
+      u = -u;
+    }
+  if (v < 0)
+    {
+      c = ~c;
+      v = -v;
+    }
+  w = __udivmoddi4 (u, v, NULL);
+  if (c)
+    w = -w;
+  return w;
+}
+
+DWtype
+__moddi3 (DWtype u, DWtype v)
+{
+  Wtype c = 0;
+  DWtype w;
+
+  if (u < 0)
+    {
+      c = ~c;
+      u = -u;
+    }
+  if (v < 0)
+    v = -v;
+  __udivmoddi4 (u, v, &w);
+  if (c)
+    w = -w;
+  return w;
+}
+
+UDWtype
+__udivdi3 (UDWtype u, UDWtype v)
+{
+  return __udivmoddi4 (u, v, NULL);
+}
+
+UDWtype
+__umoddi3 (UDWtype u, UDWtype v)
+{
+  UDWtype w;
+
+  __udivmoddi4 (u, v, &w);
+  return w;
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl_rfkill.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl_rfkill.h
@@ -0,0 +1,12 @@
+#ifndef RTL_RFKILL_H
+#define RTL_RFKILL_H
+
+#ifdef CONFIG_RTL_RFKILL 
+struct net_device;
+
+bool rtl8192_rfkill_init(struct net_device *dev);
+void rtl8192_rfkill_poll(struct net_device *dev);
+void rtl8192_rfkill_exit(struct net_device *dev);
+#endif
+
+#endif /* RTL_RFKILL_H */
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl_cam.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl_cam.c
@@ -0,0 +1,569 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * Based on the r8180 driver, which is:
+ * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+#include "rtl_core.h"
+#if defined RTL8192CE
+#include "rtl8192c/r8192C_phy.h"
+#include "rtl8192c/r8192C_phyreg.h"
+#include "rtl8192c/r8192C_rtl6052.h"
+#include "rtl8192c/r8192C_Efuse.h"
+#elif defined RTL8192SE  
+#include "rtl8192s/r8192S_phy.h"
+#include "rtl8192s/r8192S_phyreg.h"
+#include "rtl8192s/r8192S_rtl6052.h"
+#include "rtl8192s/r8192S_Efuse.h"
+#else
+#include "rtl8192e/r8192E_phy.h"
+#include "rtl8192e/r8192E_phyreg.h"
+#include "rtl8192e/r8190P_rtl8256.h" /* RTL8225 Radio frontend */
+#include "rtl8192e/r8192E_cmdpkt.h"
+#endif
+
+extern int hwwep;
+void CamResetAllEntry(struct net_device *dev)
+{
+	u32 ulcommand = 0;
+
+	ulcommand |= BIT31|BIT30;
+	write_nic_dword(dev, RWCAM, ulcommand); 
+}
+
+#ifdef _RTL8192_EXT_PATCH_
+void CamDeleteOneEntry(struct net_device *dev, u8 EntryNo)
+{
+	u32 ulCommand = EntryNo * CAM_CONTENT_COUNT;
+	u32 ulContent = 0;
+
+	ulCommand = ulCommand | BIT31 | BIT16;
+
+	write_nic_dword(dev,WCAMI,ulContent);
+	write_nic_dword(dev,RWCAM,ulCommand);
+}
+
+void CamRestoreEachIFEntry(struct net_device* dev,u8 is_mesh)
+{
+	u32 i;
+	struct r8192_priv *priv = rtllib_priv(dev);
+	struct rtllib_device *ieee = priv->rtllib;
+	for( i = 0 ; i<	TOTAL_CAM_ENTRY; i++) {
+
+		if (is_mesh) {
+			if(ieee->swmeshcamtable[i].bused )
+			{
+				setKey(dev,
+						i,
+						ieee->swmeshcamtable[i].key_index,
+						ieee->swmeshcamtable[i].key_type,
+						ieee->swmeshcamtable[i].macaddr,
+						ieee->swmeshcamtable[i].useDK,
+						(u32*)(&ieee->swmeshcamtable[i].key_buf[0])					
+				      );
+			}
+		} else {
+			if(ieee->swcamtable[i].bused )
+			{
+				setKey(dev,
+						i,
+						ieee->swcamtable[i].key_index,
+						ieee->swcamtable[i].key_type,
+						ieee->swcamtable[i].macaddr,
+						ieee->swcamtable[i].useDK,
+						(u32*)(&ieee->swcamtable[i].key_buf[0]));
+			}
+		}
+	}
+}
+#endif
+
+void write_cam(struct net_device *dev, u8 addr, u32 data)
+{
+	write_nic_dword(dev, WCAMI, data);
+	write_nic_dword(dev, RWCAM, BIT31|BIT16|(addr&0xff) );
+}
+
+u32 read_cam(struct net_device *dev, u8 addr)
+{
+	write_nic_dword(dev, RWCAM, 0x80000000|(addr&0xff) );
+	return read_nic_dword(dev, 0xa8);
+}
+
+void EnableHWSecurityConfig8192(struct net_device *dev)
+{
+	u8 SECR_value = 0x0;
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	struct rtllib_device* ieee = priv->rtllib; 
+	SECR_value = SCR_TxEncEnable | SCR_RxDecEnable;
+#ifdef _RTL8192_EXT_PATCH_
+	if ((((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type)) && (priv->rtllib->auth_mode != 2)) 
+			&&(ieee->iw_mode != IW_MODE_MESH))
+#else
+	if (((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type)) && (priv->rtllib->auth_mode != 2))
+#endif
+	{
+		SECR_value |= SCR_RxUseDK;
+		SECR_value |= SCR_TxUseDK;
+	}
+	else if ((ieee->iw_mode == IW_MODE_ADHOC) && (ieee->pairwise_key_type & (KEY_TYPE_CCMP | KEY_TYPE_TKIP)))
+	{
+		SECR_value |= SCR_RxUseDK;
+		SECR_value |= SCR_TxUseDK;
+	}
+
+
+	ieee->hwsec_active = 1;
+#ifdef _RTL8192_EXT_PATCH_	
+	if ((ieee->pHTInfo->IOTAction&HT_IOT_ACT_PURE_N_MODE) || !hwwep )
+	{
+		ieee->hwsec_active = 0;
+		SECR_value &= ~SCR_RxDecEnable;
+		SECR_value &= ~SCR_TxUseDK;
+		SECR_value &= ~SCR_RxUseDK;
+		SECR_value &= ~SCR_TxEncEnable;
+	}
+#else
+	if ((ieee->pHTInfo->IOTAction&HT_IOT_ACT_PURE_N_MODE) || !hwwep)
+	{
+		ieee->hwsec_active = 0;
+		SECR_value &= ~SCR_RxDecEnable;
+	}
+#endif
+
+#ifdef RTL8192CE
+	write_nic_byte(dev, REG_CR+1,0x02); 
+#endif
+	RT_TRACE(COMP_SEC,"%s:, hwsec:%d, pairwise_key:%d, SECR_value:%x\n", __FUNCTION__, \
+			ieee->hwsec_active, ieee->pairwise_key_type, SECR_value);	
+	{
+		write_nic_byte(dev, SECR,  SECR_value);
+	}
+
+}
+
+void set_swcam(struct net_device *dev, 
+		u8 EntryNo,
+		u8 KeyIndex, 
+		u16 KeyType, 
+		u8 *MacAddr, 
+		u8 DefaultKey, 
+		u32 *KeyContent, 
+		u8 is_mesh)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	struct rtllib_device *ieee = priv->rtllib;
+	printk("===========>%s():EntryNo is %d,KeyIndex is %d,KeyType is %d,is_mesh is %d\n",__FUNCTION__,EntryNo,KeyIndex,KeyType,is_mesh);
+	if(is_mesh){
+#ifdef _RTL8192_EXT_PATCH_	
+		ieee->swmeshcamtable[EntryNo].bused=true;
+		ieee->swmeshcamtable[EntryNo].key_index=KeyIndex;
+		ieee->swmeshcamtable[EntryNo].key_type=KeyType;
+		memcpy(ieee->swmeshcamtable[EntryNo].macaddr,MacAddr,6);
+		ieee->swmeshcamtable[EntryNo].useDK=DefaultKey;
+		memcpy(ieee->swmeshcamtable[EntryNo].key_buf,(u8*)KeyContent,16);
+#endif	
+	}
+	else
+	{
+		ieee->swcamtable[EntryNo].bused=true;
+		ieee->swcamtable[EntryNo].key_index=KeyIndex;
+		ieee->swcamtable[EntryNo].key_type=KeyType;
+		memcpy(ieee->swcamtable[EntryNo].macaddr,MacAddr,6);
+		ieee->swcamtable[EntryNo].useDK=DefaultKey;
+		memcpy(ieee->swcamtable[EntryNo].key_buf,(u8*)KeyContent,16);
+	}
+}
+#ifdef _RTL8192_EXT_PATCH_	
+void reset_IFswcam(struct net_device *dev, u8 is_mesh)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	struct rtllib_device *ieee = priv->rtllib;
+	if(is_mesh){
+		memset(ieee->swmeshcamtable,0,sizeof(SW_CAM_TABLE)*32);
+	}
+	else{
+		memset(ieee->swcamtable,0,sizeof(SW_CAM_TABLE)*32);
+	}
+}
+#endif	
+void setKey(struct net_device *dev, 
+		u8 EntryNo,
+		u8 KeyIndex, 
+		u16 KeyType, 
+		u8 *MacAddr, 
+		u8 DefaultKey, 
+		u32 *KeyContent )
+{
+	u32 TargetCommand = 0;
+	u32 TargetContent = 0;
+	u16 usConfig = 0;
+	u8 i;
+#ifdef ENABLE_IPS
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	RT_RF_POWER_STATE	rtState;
+	rtState = priv->rtllib->eRFPowerState;
+	if(priv->rtllib->PowerSaveControl.bInactivePs){ 
+		if(rtState == eRfOff){
+			if(priv->rtllib->RfOffReason > RF_CHANGE_BY_IPS)
+			{
+				RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__FUNCTION__);
+				return ;
+			}
+			else{
+				down(&priv->rtllib->ips_sem);
+				IPSLeave(dev);
+				up(&priv->rtllib->ips_sem);			}
+		}
+	}
+	priv->rtllib->is_set_key = true;
+#endif
+	if (EntryNo >= TOTAL_CAM_ENTRY)
+		RT_TRACE(COMP_ERR, "cam entry exceeds in setKey()\n");
+
+	RT_TRACE(COMP_SEC, "====>to setKey(), dev:%p, EntryNo:%d, KeyIndex:%d, KeyType:%d, MacAddr"MAC_FMT"\n", dev,EntryNo, KeyIndex, KeyType, MAC_ARG(MacAddr));
+
+	if (DefaultKey)
+		usConfig |= BIT15 | (KeyType<<2);
+	else
+		usConfig |= BIT15 | (KeyType<<2) | KeyIndex;
+
+
+	for(i=0 ; i<CAM_CONTENT_COUNT; i++){
+		TargetCommand  = i+CAM_CONTENT_COUNT*EntryNo;
+		TargetCommand |= BIT31|BIT16;
+
+		if(i==0){
+			TargetContent = (u32)(*(MacAddr+0)) << 16|
+				(u32)(*(MacAddr+1)) << 24|
+				(u32)usConfig;
+
+			write_nic_dword(dev, WCAMI, TargetContent); 
+			write_nic_dword(dev, RWCAM, TargetCommand);
+		}
+		else if(i==1){
+			TargetContent = (u32)(*(MacAddr+2)) 	 |
+				(u32)(*(MacAddr+3)) <<  8|
+				(u32)(*(MacAddr+4)) << 16|
+				(u32)(*(MacAddr+5)) << 24;
+			write_nic_dword(dev, WCAMI, TargetContent); 
+			write_nic_dword(dev, RWCAM, TargetCommand);
+		}
+		else {	
+			if(KeyContent != NULL)
+			{
+				write_nic_dword(dev, WCAMI, (u32)(*(KeyContent+i-2)) ); 
+				write_nic_dword(dev, RWCAM, TargetCommand);
+			}
+		}
+	}
+	RT_TRACE(COMP_SEC,"=========>after set key, usconfig:%x\n", usConfig);
+}
+#if 0
+void CamPrintDbgReg(struct net_device* dev)
+{
+	unsigned long rvalue;
+	unsigned char ucValue;
+	write_nic_dword(dev, DCAM, 0x80000000);
+	msleep(40);
+	rvalue = read_nic_dword(dev, DCAM);	
+	RT_TRACE(COMP_SEC, " TX CAM=%8lX ",rvalue);
+	if((rvalue & 0x40000000) != 0x4000000) 
+		RT_TRACE(COMP_SEC, "-->TX Key Not Found      ");
+	msleep(20);
+	write_nic_dword(dev, DCAM, 0x00000000);	
+	rvalue = read_nic_dword(dev, DCAM);	
+	RT_TRACE(COMP_SEC, "RX CAM=%8lX ",rvalue);
+	if((rvalue & 0x40000000) != 0x4000000) 
+		RT_TRACE(COMP_SEC, "-->CAM Key Not Found   ");
+	ucValue = read_nic_byte(dev, SECR);
+	RT_TRACE(COMP_SEC, "WPA_Config=%x \n",ucValue);
+}
+#endif
+void CAM_read_entry(struct net_device *dev, u32 iIndex)
+{
+	u32 target_command=0;
+	u32 target_content=0;
+	u8 entry_i=0;
+	u32 ulStatus;
+	s32 i=100;
+	for(entry_i=0;entry_i<CAM_CONTENT_COUNT;entry_i++)
+	{
+		target_command= entry_i+CAM_CONTENT_COUNT*iIndex;
+		target_command= target_command | BIT31;
+
+#if 1
+		while((i--)>=0)
+		{
+			ulStatus = read_nic_dword(dev, RWCAM);
+			if(ulStatus & BIT31){
+				continue;
+			}
+			else{
+				break;
+			}
+		}
+#endif
+		write_nic_dword(dev, RWCAM, target_command);
+		RT_TRACE(COMP_SEC,"CAM_read_entry(): WRITE A0: %x \n",target_command);
+		target_content = read_nic_dword(dev, RCAMO);
+		RT_TRACE(COMP_SEC, "CAM_read_entry(): WRITE A8: %x \n",target_content);
+	}
+	printk("\n");
+}
+
+void CamRestoreAllEntry(	struct net_device *dev)
+{
+	u8 EntryId = 0;
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u8*	MacAddr = priv->rtllib->current_network.bssid;
+
+	static u8	CAM_CONST_ADDR[4][6] = {
+		{0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
+		{0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
+		{0x00, 0x00, 0x00, 0x00, 0x00, 0x02},
+		{0x00, 0x00, 0x00, 0x00, 0x00, 0x03}};
+	static u8	CAM_CONST_BROAD[] = 
+	{0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
+
+	RT_TRACE(COMP_SEC, "CamRestoreAllEntry: \n");
+
+
+	if ((priv->rtllib->pairwise_key_type == KEY_TYPE_WEP40)||
+			(priv->rtllib->pairwise_key_type == KEY_TYPE_WEP104))
+	{
+
+		for(EntryId=0; EntryId<4; EntryId++)
+		{
+			{
+				MacAddr = CAM_CONST_ADDR[EntryId];
+				if(priv->rtllib->swcamtable[EntryId].bused )
+				{
+					setKey(dev, 
+							EntryId ,
+							EntryId,
+							priv->rtllib->pairwise_key_type,
+							MacAddr, 
+							0,
+							(u32*)(&priv->rtllib->swcamtable[EntryId].key_buf[0])					
+					      );
+				}		
+			}	
+		}	
+
+	}
+	else if(priv->rtllib->pairwise_key_type == KEY_TYPE_TKIP)
+	{
+
+		{
+			if(priv->rtllib->iw_mode == IW_MODE_ADHOC)
+			{
+				setKey(dev, 
+						4,
+						0,
+						priv->rtllib->pairwise_key_type, 
+						(u8*)dev->dev_addr, 
+						0,
+						(u32*)(&priv->rtllib->swcamtable[4].key_buf[0])					
+				      );
+			}	
+			else
+			{
+				setKey(dev, 
+						4,
+						0,
+						priv->rtllib->pairwise_key_type, 
+						MacAddr, 
+						0,
+						(u32*)(&priv->rtllib->swcamtable[4].key_buf[0])					
+				      );
+			}
+
+		}
+	}
+	else if(priv->rtllib->pairwise_key_type == KEY_TYPE_CCMP)
+	{
+
+		{
+			if(priv->rtllib->iw_mode == IW_MODE_ADHOC)
+			{
+				setKey(dev, 
+						4,
+						0,
+						priv->rtllib->pairwise_key_type,
+						(u8*)dev->dev_addr, 
+						0,
+						(u32*)(&priv->rtllib->swcamtable[4].key_buf[0])					
+				      );
+			}
+			else
+			{
+				setKey(dev, 
+						4,
+						0,
+						priv->rtllib->pairwise_key_type,
+						MacAddr, 
+						0,
+						(u32*)(&priv->rtllib->swcamtable[4].key_buf[0])					
+				      );
+			}			
+		}
+	}
+
+
+
+	if(priv->rtllib->group_key_type == KEY_TYPE_TKIP)
+	{
+		MacAddr = CAM_CONST_BROAD;
+		for(EntryId=1 ; EntryId<4 ; EntryId++)
+		{
+			if(priv->rtllib->swcamtable[EntryId].bused )
+			{
+				setKey(dev, 
+						EntryId, 
+						EntryId,
+						priv->rtllib->group_key_type,
+						MacAddr, 
+						0,
+						(u32*)(&priv->rtllib->swcamtable[EntryId].key_buf[0])					
+				      );
+			}	
+		}
+		if(priv->rtllib->iw_mode == IW_MODE_ADHOC)
+		{
+			if(priv->rtllib->swcamtable[0].bused ){
+				setKey(dev, 
+						0,
+						0,
+						priv->rtllib->group_key_type,
+						CAM_CONST_ADDR[0], 
+						0,
+						(u32*)(&priv->rtllib->swcamtable[0].key_buf[0])					
+				      );
+			}
+			else
+			{
+				RT_TRACE(COMP_ERR,"===>%s():ERR!! ADHOC TKIP ,but 0 entry is have no data\n",__FUNCTION__);
+				return;
+			}
+		}			
+	} else if(priv->rtllib->group_key_type == KEY_TYPE_CCMP) {
+		MacAddr = CAM_CONST_BROAD;
+		for(EntryId=1; EntryId<4 ; EntryId++)
+		{
+			if(priv->rtllib->swcamtable[EntryId].bused )
+			{	
+				setKey(dev, 
+				       EntryId , 
+				       EntryId,
+				       priv->rtllib->group_key_type,
+				       MacAddr, 
+				       0,
+				       (u32*)(&priv->rtllib->swcamtable[EntryId].key_buf[0]));
+			}	
+		}
+
+		if (priv->rtllib->iw_mode == IW_MODE_ADHOC) {
+			if (priv->rtllib->swcamtable[0].bused) {
+				setKey(dev, 
+					0 , 
+					0,
+					priv->rtllib->group_key_type,
+					CAM_CONST_ADDR[0], 
+					0,
+					(u32*)(&priv->rtllib->swcamtable[0].key_buf[0]));
+			} else {
+				RT_TRACE(COMP_ERR,"===>%s():ERR!! ADHOC CCMP ,but 0 entry is have no data\n", 
+						__FUNCTION__);
+				return;
+			}
+		}
+	}
+}
+
+
+#ifdef _RTL8192_EXT_PATCH_
+u8 rtl8192_get_free_hwsec_cam_entry(struct rtllib_device *ieee, u8 *sta_addr)
+{
+	u32 bitmap = (ieee->HwSecCamBitMap)>>4;
+	u8 entry_idx = 0;
+	u8 i, *addr;
+
+	if ((NULL == ieee) || (NULL == sta_addr)) {
+		printk("%s: ieee or sta_addr is NULL.\n", __FUNCTION__);
+		return TOTAL_CAM_ENTRY;
+	}
+
+	/* Does STA already exist? */
+	/* CAM Index 31 is for AP */
+	for (i = 4; i < TOTAL_CAM_ENTRY-1; i++) {
+		addr = ieee->HwSecCamStaAddr[i];
+		if(memcmp(addr, sta_addr, ETH_ALEN) == 0)
+			return i;
+	}
+
+	/* Get a free CAM entry. */
+	for (entry_idx = 4; entry_idx < TOTAL_CAM_ENTRY - 1; entry_idx++) {
+		if ((bitmap & BIT0) == 0) {
+			ieee->HwSecCamBitMap |= BIT0<<entry_idx;
+			memcpy(ieee->HwSecCamStaAddr[entry_idx], sta_addr, ETH_ALEN);
+			return entry_idx;
+		}
+		bitmap = bitmap >>1;
+	}
+
+	return TOTAL_CAM_ENTRY;
+}
+
+void rtl8192_del_hwsec_cam_entry(struct rtllib_device *ieee, u8 *sta_addr)
+{
+	u32 bitmap;
+	u8 i, *addr;
+
+	if ((NULL == ieee) || (NULL == sta_addr)) {
+		printk("%s: ieee or sta_addr is NULL.\n", __FUNCTION__);
+		return;
+	}
+
+	if ((sta_addr[0]|sta_addr[1]|sta_addr[2]|sta_addr[3]|\
+	     sta_addr[4]|sta_addr[5]) == 0) {
+		printk("%s: sta_addr is 00:00:00:00:00:00.\n", __FUNCTION__);
+		return;
+	}
+	
+	/* Does STA already exist? */
+	for (i = 4; i < TOTAL_CAM_ENTRY; i++) {
+		addr = ieee->HwSecCamStaAddr[i];
+		bitmap = (ieee->HwSecCamBitMap)>>i;
+		if (((bitmap & BIT0) == BIT0) && (memcmp(addr, sta_addr, ETH_ALEN) == 0)) {
+			/* Remove from HW Security CAM */	
+			CamDeleteOneEntry(ieee->dev, i);
+			memset(ieee->HwSecCamStaAddr[i], 0, ETH_ALEN);
+			ieee->HwSecCamBitMap &= ~(BIT0<<i);
+			memset(&(ieee->swmeshcamtable[i]), 0, sizeof(SW_CAM_TABLE));
+			RT_TRACE(COMP_SEC, "====>del sw entry, EntryNo:%d, MacAddr:"MAC_FMT"\n", 
+					i, MAC_ARG(sta_addr));
+		}
+	}
+	return;
+}
+#endif
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl_core.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl_core.c
@@ -0,0 +1,5975 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * Based on the r8180 driver, which is:
+ * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+#undef LOOP_TEST
+#undef RX_DONT_PASS_UL
+#undef DEBUG_EPROM
+#undef DEBUG_RX_VERBOSE
+#undef DUMMY_RX
+#undef DEBUG_ZERO_RX
+#undef DEBUG_RX_SKB
+#undef DEBUG_TX_FRAG
+#undef DEBUG_RX_FRAG
+#undef DEBUG_TX_FILLDESC
+#undef DEBUG_TX
+#undef DEBUG_IRQ
+#undef DEBUG_RX
+#undef DEBUG_RXALLOC
+#undef DEBUG_REGISTERS
+#undef DEBUG_RING
+#undef DEBUG_IRQ_TASKLET
+#undef DEBUG_TX_ALLOC
+#undef DEBUG_TX_DESC
+
+#include <asm/uaccess.h>
+#include <linux/pci.h>
+#include "rtl_core.h"
+#if defined RTL8192CE
+#include "rtl8192c/r8192C_phy.h" 
+#include "rtl8192c/r8192C_phyreg.h"
+#include "rtl8192c/r8192C_rtl6052.h"
+#include "rtl8192c/r8192C_Efuse.h"
+#include "rtl8192c/r8192C_dm.h"
+#elif defined RTL8192SE
+#include "rtl8192s/r8192S_phy.h" 
+#include "rtl8192s/r8192S_phyreg.h"
+#include "rtl8192s/r8192S_rtl6052.h"
+#include "rtl8192s/r8192S_Efuse.h"
+#else
+#include "rtl8192e/r8192E_phy.h" 
+#include "rtl8192e/r8192E_phyreg.h"
+#include "rtl8192e/r8190P_rtl8256.h" 
+#include "rtl8192e/r8192E_cmdpkt.h"
+#endif
+
+#include "rtl_wx.h"
+#ifndef RTL8192CE
+#include "rtl_dm.h"
+#endif
+
+#ifdef CONFIG_PM_RTL
+#include "rtl_pm.h"
+#endif
+
+#ifdef _RTL8192_EXT_PATCH_
+#include "../../mshclass/msh_class.h"
+#include "rtl_mesh.h"
+#endif
+
+#ifdef RTL8192S_WAPI_SUPPORT
+#include "../../rtllib/wapi.h"
+#include "../../rtllib/wapi_interface.h"
+#endif
+
+int hwwep = 1; 
+static int channels = 0x3fff;
+#ifdef _RTL8192_EXT_PATCH_
+char* ifname = "ra%d";
+#else
+char* ifname = "wlan%d";
+#endif
+
+u32 rt_global_debug_component = \
+						COMP_ERR ; 
+
+#ifdef RTL8192SE
+struct rtl819x_ops rtl8192se_ops = {
+	.nic_type = NIC_8192SE,
+	.get_eeprom_size 			= rtl8192se_get_eeprom_size,
+	.init_adapter_variable 		= rtl8192se_InitializeVariables,
+	.init_before_adapter_start 	= MacConfigBeforeFwDownload,
+	.initialize_adapter 		= rtl8192se_adapter_start,
+	.link_change 			= rtl8192se_link_change,
+	.tx_fill_descriptor 		= rtl8192se_tx_fill_desc,
+	.tx_fill_cmd_descriptor 	= rtl8192se_tx_fill_cmd_desc,
+	.rx_query_status_descriptor 	= rtl8192se_rx_query_status_desc,
+	.rx_command_packet_handler = rtl8192se_RxCommandPacketHandle,
+	.stop_adapter 				= rtl8192se_halt_adapter,
+	.update_ratr_table 			= rtl8192se_update_ratr_table,
+	.irq_enable				= rtl8192se_EnableInterrupt,
+	.irq_disable				= rtl8192se_DisableInterrupt,
+	.irq_clear					= rtl8192se_ClearInterrupt,
+	.rx_enable				= rtl8192se_enable_rx,
+	.tx_enable				= rtl8192se_enable_tx,
+	.interrupt_recognized		= rtl8192se_interrupt_recognized,
+	.TxCheckStuckHandler		= rtl8192se_HalTxCheckStuck,
+	.RxCheckStuckHandler		= rtl8192se_HalRxCheckStuck,
+};
+#elif defined RTL8192CE
+struct rtl819x_ops rtl8192ce_ops = {
+	.nic_type 					= NIC_8192CE,
+	.get_eeprom_size 			= rtl8192ce_get_eeprom_size,
+	.init_adapter_variable 		= rtl8192ce_InitializeVariables,
+	.initialize_adapter 			= rtl8192ce_adapter_start,
+	.link_change 				= rtl8192ce_link_change,
+	.tx_fill_descriptor 			= rtl8192ce_tx_fill_desc,
+	.tx_fill_cmd_descriptor 		= rtl8192ce_tx_fill_cmd_desc,
+	.rx_query_status_descriptor 	= rtl8192ce_rx_query_status_desc,
+	.rx_command_packet_handler = NULL,
+	.stop_adapter 				= rtl8192ce_halt_adapter,
+	.update_ratr_table 			= rtl8192ce_UpdateHalRATRTable,
+	.irq_enable				= rtl8192ce_EnableInterrupt,
+	.irq_disable				= rtl8192ce_DisableInterrupt,
+	.irq_clear					= rtl8192ce_ClearInterrupt,
+	.rx_enable				= rtl8192ce_enable_rx,
+	.tx_enable				= rtl8192ce_enable_tx,
+	.interrupt_recognized		= rtl8192ce_interrupt_recognized,
+	.TxCheckStuckHandler		= rtl8192ce_HalTxCheckStuck,
+	.RxCheckStuckHandler		= rtl8192ce_HalRxCheckStuck,
+};
+#else
+struct rtl819x_ops rtl819xp_ops = {
+	.nic_type 					= NIC_UNKNOWN,
+	.get_eeprom_size 			= rtl8192_get_eeprom_size,
+	.init_adapter_variable 		= rtl8192_InitializeVariables,
+	.initialize_adapter 			= rtl8192_adapter_start,
+	.link_change 				= rtl8192_link_change,
+	.tx_fill_descriptor 			= rtl8192_tx_fill_desc,
+	.tx_fill_cmd_descriptor 		= rtl8192_tx_fill_cmd_desc,
+	.rx_query_status_descriptor 	= rtl8192_rx_query_status_desc,
+	.rx_command_packet_handler = NULL,
+	.stop_adapter 				= rtl8192_halt_adapter,
+	.update_ratr_table 			= rtl8192_update_ratr_table,
+	.irq_enable				= rtl8192_EnableInterrupt,
+	.irq_disable				= rtl8192_DisableInterrupt,
+	.irq_clear					= rtl8192_ClearInterrupt,
+	.rx_enable				= rtl8192_enable_rx,
+	.tx_enable				= rtl8192_enable_tx,
+	.interrupt_recognized		= rtl8192_interrupt_recognized,
+	.TxCheckStuckHandler		= rtl8192_HalTxCheckStuck,
+	.RxCheckStuckHandler		= rtl8192_HalRxCheckStuck,
+};
+#endif
+
+static struct pci_device_id rtl8192_pci_id_tbl[] __devinitdata = {
+#ifdef RTL8190P
+	/* Realtek */
+	/* Dlink */
+	{RTL_PCI_DEVICE(0x10ec, 0x8190, rtl819xp_ops)},
+	/* Corega */
+	{RTL_PCI_DEVICE(0x07aa, 0x0045, rtl819xp_ops)},
+	{RTL_PCI_DEVICE(0x07aa, 0x0046, rtl819xp_ops)},
+#elif defined(RTL8192E)
+	/* Realtek */
+	{RTL_PCI_DEVICE(0x10ec, 0x8192, rtl819xp_ops)},
+	/* Corega */
+	{RTL_PCI_DEVICE(0x07aa, 0x0044, rtl819xp_ops)},
+	{RTL_PCI_DEVICE(0x07aa, 0x0047, rtl819xp_ops)},
+#elif defined(RTL8192SE)	/*8192SE*/
+	{RTL_PCI_DEVICE(0x10ec, 0x8171, rtl8192se_ops)},
+	{RTL_PCI_DEVICE(0x10ec, 0x8172, rtl8192se_ops)},
+	{RTL_PCI_DEVICE(0x10ec, 0x8173, rtl8192se_ops)},
+	{RTL_PCI_DEVICE(0x10ec, 0x8174, rtl8192se_ops)},
+#elif defined(RTL8192CE)	/*8192CE*/
+	{RTL_PCI_DEVICE(0x10ec, 0x8191, rtl8192ce_ops)},
+	{RTL_PCI_DEVICE(0x10ec, 0x8178, rtl8192ce_ops)},
+	{RTL_PCI_DEVICE(0x10ec, 0x8177, rtl8192ce_ops)},
+	{RTL_PCI_DEVICE(0x10ec, 0x8176, rtl8192ce_ops)},
+	{RTL_PCI_DEVICE(0x10ec, 0x092D, rtl8192ce_ops)},
+#endif
+	{}
+};
+MODULE_DEVICE_TABLE(pci, rtl8192_pci_id_tbl);
+
+static int __devinit rtl8192_pci_probe(struct pci_dev *pdev,
+			 const struct pci_device_id *id);
+static void __devexit rtl8192_pci_disconnect(struct pci_dev *pdev);
+
+static struct pci_driver rtl8192_pci_driver = {
+	.name		= DRV_NAME,	          /* Driver name   */
+	.id_table	= rtl8192_pci_id_tbl,	          /* PCI_ID table  */
+	.probe		= rtl8192_pci_probe,	          /* probe fn      */
+	.remove		= __devexit_p(rtl8192_pci_disconnect),	  /* remove fn     */
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2, 5, 0)
+#ifdef CONFIG_PM_RTL
+	.suspend	= rtl8192E_suspend,	          /* PM suspend fn */
+	.resume		= rtl8192E_resume,                 /* PM resume fn  */
+#else
+	.suspend	= NULL,			          /* PM suspend fn */
+	.resume      	= NULL,			          /* PM resume fn  */
+#endif
+#endif
+};
+
+/****************************************************************************
+   -----------------------------IO STUFF-------------------------
+*****************************************************************************/
+bool
+PlatformIOCheckPageLegalAndGetRegMask(
+	u32 	u4bPage,
+	u8*	pu1bPageMask
+)
+{
+	bool		bReturn = false;
+	*pu1bPageMask = 0xfe;
+
+	switch(u4bPage)
+	{
+		case 1: case 2: case 3: case 4:	
+		case 8: case 9: case 10: case 12: case 13:	
+			bReturn = true;
+			*pu1bPageMask = 0xf0;
+			break;
+			
+		default:
+			bReturn = false;
+			break;
+	}
+
+	return bReturn;
+}
+
+void write_nic_io_byte(struct net_device *dev, int x,u8 y)
+{
+	u32 u4bPage = (x >> 8);
+	u8 u1PageMask = 0;
+	bool	bIsLegalPage = false;
+
+	if(u4bPage == 0)
+	{
+		outb(y&0xff,dev->base_addr +x);
+	}else
+	{
+		bIsLegalPage = PlatformIOCheckPageLegalAndGetRegMask(u4bPage, &u1PageMask);
+		if(bIsLegalPage)
+		{
+			u8 u1bPsr = read_nic_io_byte(dev, PSR);
+
+			write_nic_io_byte(dev, PSR, ((u1bPsr & u1PageMask) | (u8)u4bPage)); 
+			write_nic_io_byte(dev, (x & 0xff), y);
+			write_nic_io_byte(dev, PSR, (u1bPsr & u1PageMask)); 
+			
+		}else
+		{
+			;
+		}
+	}
+	
+        
+}
+
+void write_nic_io_word(struct net_device *dev, int x,u16 y)
+{
+	u32 u4bPage = (x >> 8);
+	u8 u1PageMask = 0;
+	bool	bIsLegalPage = false;
+
+	if(u4bPage == 0)
+	{
+		outw(y,dev->base_addr +x);
+	}else
+	{
+		bIsLegalPage = PlatformIOCheckPageLegalAndGetRegMask(u4bPage, &u1PageMask);
+		if(bIsLegalPage)
+		{
+			u8 u1bPsr = read_nic_io_byte(dev, PSR);
+
+			write_nic_io_byte(dev, PSR, ((u1bPsr & u1PageMask) | (u8)u4bPage)); 
+			write_nic_io_word(dev, (x & 0xff), y);
+			write_nic_io_byte(dev, PSR, (u1bPsr & u1PageMask)); 
+			
+		}else
+		{
+			;
+		}
+	}
+	        
+}
+
+void write_nic_io_dword(struct net_device *dev, int x,u32 y)
+{
+	u32 u4bPage = (x >> 8);
+	u8 u1PageMask = 0;
+	bool	bIsLegalPage = false;
+
+	if(u4bPage == 0)
+	{
+		outl(y,dev->base_addr +x);
+	}else
+	{
+		bIsLegalPage = PlatformIOCheckPageLegalAndGetRegMask(u4bPage, &u1PageMask);
+		if(bIsLegalPage)
+		{
+			u8 u1bPsr = read_nic_io_byte(dev, PSR);
+
+			write_nic_io_byte(dev, PSR, ((u1bPsr & u1PageMask) | (u8)u4bPage)); 
+			write_nic_io_dword(dev, (x & 0xff), y);
+			write_nic_io_byte(dev, PSR, (u1bPsr & u1PageMask)); 
+			
+		}else
+		{
+			;
+		}
+	}
+	        
+}
+u8 read_nic_io_byte(struct net_device *dev, int x) 
+{
+	u32 u4bPage = (x >> 8);
+	u8 u1PageMask = 0;
+	bool	bIsLegalPage = false;
+	u8	Data = 0;
+
+	if(u4bPage == 0)
+	{
+		return 0xff&inb(dev->base_addr +x);
+	}else
+	{
+		bIsLegalPage = PlatformIOCheckPageLegalAndGetRegMask(u4bPage, &u1PageMask);
+		if(bIsLegalPage)
+		{
+			u8 u1bPsr = read_nic_io_byte(dev, PSR);
+
+			write_nic_io_byte(dev, PSR, ((u1bPsr & u1PageMask) | (u8)u4bPage)); 
+			Data = read_nic_io_byte(dev, (x & 0xff));
+			write_nic_io_byte(dev, PSR, (u1bPsr & u1PageMask)); 
+			
+		}else
+		{
+			;
+		}
+	}
+	
+	return Data;
+}
+
+u16 read_nic_io_word(struct net_device *dev, int x) 
+{
+	u32 u4bPage = (x >> 8);
+	u8 u1PageMask = 0;
+	bool	bIsLegalPage = false;
+	u16	Data = 0;
+
+	if(u4bPage == 0)
+	{
+		return inw(dev->base_addr +x);
+	}else
+	{
+		bIsLegalPage = PlatformIOCheckPageLegalAndGetRegMask(u4bPage, &u1PageMask);
+		if(bIsLegalPage)
+		{
+			u8 u1bPsr = read_nic_io_byte(dev, PSR);
+
+			write_nic_io_byte(dev, PSR, ((u1bPsr & u1PageMask) | (u8)u4bPage)); 
+			Data = read_nic_io_word(dev, (x & 0xff));
+			write_nic_io_byte(dev, PSR, (u1bPsr & u1PageMask)); 
+			
+		}else
+		{
+			;
+		}
+	}
+	        
+	return Data;
+}
+
+u32 read_nic_io_dword(struct net_device *dev, int x) 
+{
+	u32 u4bPage = (x >> 8);
+	u8 u1PageMask = 0;
+	bool	bIsLegalPage = false;
+	u32	Data = 0;
+
+	if(u4bPage == 0)
+	{
+		return inl(dev->base_addr +x);
+	}else
+	{
+		bIsLegalPage = PlatformIOCheckPageLegalAndGetRegMask(u4bPage, &u1PageMask);
+		if(bIsLegalPage)
+		{
+			u8 u1bPsr = read_nic_io_byte(dev, PSR);
+
+			write_nic_io_byte(dev, PSR, ((u1bPsr & u1PageMask) | (u8)u4bPage)); 
+			Data = read_nic_io_dword(dev, (x & 0xff));
+			write_nic_io_byte(dev, PSR, (u1bPsr & u1PageMask)); 
+			
+		}else
+		{
+			;
+		}
+	}
+	
+	return Data;
+}
+
+u8 read_nic_byte(struct net_device *dev, int x) 
+{
+#ifdef CONFIG_RTL8192_IO_MAP
+	return read_nic_io_byte(dev, x);
+#else
+        return 0xff&readb((u8*)dev->mem_start +x);
+#endif
+}
+
+u32 read_nic_dword(struct net_device *dev, int x) 
+{
+#ifdef CONFIG_RTL8192_IO_MAP
+	return read_nic_io_dword(dev, x);
+#else
+        return readl((u8*)dev->mem_start +x);
+#endif
+}
+
+u16 read_nic_word(struct net_device *dev, int x) 
+{
+#ifdef CONFIG_RTL8192_IO_MAP
+	return read_nic_io_word(dev, x);
+#else
+        return readw((u8*)dev->mem_start +x);
+#endif
+}
+
+void write_nic_byte(struct net_device *dev, int x,u8 y)
+{
+#ifdef CONFIG_RTL8192_IO_MAP
+	write_nic_io_byte(dev, x, y);
+#else
+        writeb(y,(u8*)dev->mem_start +x);
+#if !(defined RTL8192SE || defined RTL8192CE)	
+	udelay(20);
+#endif	
+#endif
+}
+
+void write_nic_dword(struct net_device *dev, int x,u32 y)
+{
+#ifdef CONFIG_RTL8192_IO_MAP
+	write_nic_io_dword(dev, x, y);
+#else
+        writel(y,(u8*)dev->mem_start +x);
+#if !(defined RTL8192SE || defined RTL8192CE)	
+	udelay(20);
+#endif	
+#endif
+}
+
+void write_nic_word(struct net_device *dev, int x,u16 y) 
+{
+#ifdef CONFIG_RTL8192_IO_MAP
+	write_nic_io_word(dev, x, y);
+#else
+        writew(y,(u8*)dev->mem_start +x);
+#if !(defined RTL8192SE || defined RTL8192CE)	
+	udelay(20);
+#endif	
+#endif
+}
+
+/****************************************************************************
+   -----------------------------GENERAL FUNCTION-------------------------
+*****************************************************************************/
+
+void
+MgntDisconnectIBSS(
+	struct net_device* dev
+) 
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u8	OpMode;
+	u8			i;
+	bool	bFilterOutNonAssociatedBSSID = false;
+
+
+	priv->rtllib->state = RTLLIB_NOLINK;
+
+	for(i=0;i<6;i++)  priv->rtllib->current_network.bssid[i]= 0x55;
+
+	priv->OpMode = RT_OP_MODE_NO_LINK;
+	priv->rtllib->SetHwRegHandler(dev, HW_VAR_BSSID, priv->rtllib->current_network.bssid);
+	OpMode = RT_OP_MODE_NO_LINK;
+	priv->rtllib->SetHwRegHandler(dev, HW_VAR_MEDIA_STATUS, &OpMode);
+	rtllib_stop_send_beacons(priv->rtllib);
+	
+	bFilterOutNonAssociatedBSSID = false;
+	priv->rtllib->SetHwRegHandler(dev, HW_VAR_CECHK_BSSID, (u8*)(&bFilterOutNonAssociatedBSSID));
+	notify_wx_assoc_event(priv->rtllib);
+
+}
+
+void
+MlmeDisassociateRequest(
+	struct net_device* dev,
+	u8* 		asSta,
+	u8		asRsn
+	)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u8 i;
+	u8	OpMode;
+
+	RemovePeerTS(priv->rtllib, asSta);
+	
+	
+	if(memcpy(priv->rtllib->current_network.bssid,asSta,6) == 0)
+	{
+		priv->rtllib->state = RTLLIB_NOLINK;
+		
+		for(i=0;i<6;i++)  priv->rtllib->current_network.bssid[i] = 0x22;
+		OpMode = RT_OP_MODE_NO_LINK;
+		priv->OpMode = RT_OP_MODE_NO_LINK;
+		priv->rtllib->SetHwRegHandler(dev, HW_VAR_MEDIA_STATUS, (u8 *)(&OpMode) );
+		rtllib_disassociate(priv->rtllib);
+
+		priv->rtllib->SetHwRegHandler(dev, HW_VAR_BSSID, priv->rtllib->current_network.bssid);
+		
+	}
+
+}
+
+void
+MgntDisconnectAP(
+	struct net_device* dev,
+	u8 asRsn
+) 
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	bool bFilterOutNonAssociatedBSSID = false;
+
+
+#ifdef TO_DO
+	if(   pMgntInfo->SecurityInfo.AuthMode > RT_802_11AuthModeAutoSwitch ||
+		(pMgntInfo->bAPSuportCCKM && pMgntInfo->bCCX8021xenable) )	
+	{
+		SecClearAllKeys(dev);
+		RT_TRACE(COMP_SEC, DBG_LOUD,("======>CCKM clear key..."))
+	}
+#endif
+	bFilterOutNonAssociatedBSSID = false;
+	priv->rtllib->SetHwRegHandler(dev, HW_VAR_CECHK_BSSID, (u8*)(&bFilterOutNonAssociatedBSSID));
+	MlmeDisassociateRequest( dev, priv->rtllib->current_network.bssid, asRsn );
+
+	priv->rtllib->state = RTLLIB_NOLINK;
+}
+
+bool
+MgntDisconnect(
+	struct net_device* dev,
+	u8 asRsn
+) 
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+
+#if 1
+	if(priv->rtllib->ps != RTLLIB_PS_DISABLED)
+	{
+#ifndef RTL8190P
+                rtl8192_hw_wakeup(dev);
+#endif
+	}
+#endif
+#ifdef TO_DO
+	if(pMgntInfo->mActingAsAp)
+	{
+		RT_TRACE(COMP_MLME, DBG_LOUD, ("MgntDisconnect() ===> AP_DisassociateAllStation\n"));
+		AP_DisassociateAllStation(dev, unspec_reason);
+		return true;
+	}	
+#endif
+
+	if( priv->rtllib->state == RTLLIB_LINKED )
+	{
+		if( priv->rtllib->iw_mode == IW_MODE_ADHOC )
+		{
+			MgntDisconnectIBSS(dev);
+		}
+#ifdef _RTL8192_EXT_PATCH_
+		if((priv->rtllib->iw_mode == IW_MODE_INFRA ) || ((priv->rtllib->iw_mode == IW_MODE_MESH) && (priv->rtllib->only_mesh == 0)))
+#else
+		if( priv->rtllib->iw_mode == IW_MODE_INFRA )
+#endif
+		{
+#ifdef TO_DO_LIST
+			SecClearAllKeys(Adapter); 
+#endif
+			MgntDisconnectAP(dev, asRsn);
+		}
+
+	}
+
+	return true;
+}
+bool
+MgntActSet_RF_State(
+	struct net_device* dev,
+	RT_RF_POWER_STATE	StateToSet,
+	RT_RF_CHANGE_SOURCE ChangeSource
+	)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	struct rtllib_device * ieee = priv->rtllib;
+	bool 			bActionAllowed = false; 
+	bool 			bConnectBySSID = false;
+	RT_RF_POWER_STATE	rtState;
+	u16			RFWaitCounter = 0;
+	unsigned long flag;
+	RT_TRACE((COMP_PS | COMP_RF), "===>MgntActSet_RF_State(): StateToSet(%d)\n",StateToSet);
+
+
+	while(true)
+	{
+		spin_lock_irqsave(&priv->rf_ps_lock,flag);
+		if(priv->RFChangeInProgress)
+		{
+			spin_unlock_irqrestore(&priv->rf_ps_lock,flag);
+			RT_TRACE((COMP_PS | COMP_RF), "MgntActSet_RF_State(): RF Change in progress! Wait to set..StateToSet(%d).\n", StateToSet);
+			printk("MgntActSet_RF_State(): RF Change in progress! Wait to set..StateToSet(%d).\n", StateToSet);
+			#if 1	
+			while(priv->RFChangeInProgress)
+			{
+				RFWaitCounter ++;
+				RT_TRACE((COMP_PS | COMP_RF), "MgntActSet_RF_State(): Wait 1 ms (%d times)...\n", RFWaitCounter);
+				mdelay(1);
+
+				if(RFWaitCounter > 100)
+				{
+					RT_TRACE(COMP_ERR, "MgntActSet_RF_State(): Wait too logn to set RF\n");
+					return false;
+				}
+			}
+			#endif
+		}
+		else
+		{
+			priv->RFChangeInProgress = true;
+			spin_unlock_irqrestore(&priv->rf_ps_lock,flag);
+			break;
+		}
+	}
+
+	rtState = priv->rtllib->eRFPowerState;
+
+	switch(StateToSet) 
+	{
+	case eRfOn:
+
+		priv->rtllib->RfOffReason &= (~ChangeSource);
+
+		if((ChangeSource == RF_CHANGE_BY_HW) && (priv->bHwRadioOff == true)){
+			priv->bHwRadioOff = false;
+		}
+
+		if(! priv->rtllib->RfOffReason)
+		{
+			priv->rtllib->RfOffReason = 0;
+			bActionAllowed = true;
+
+			
+			if(rtState == eRfOff && ChangeSource >=RF_CHANGE_BY_HW )
+			{
+				bConnectBySSID = true;
+			}
+		}
+		else{
+			RT_TRACE((COMP_PS | COMP_RF), "MgntActSet_RF_State - eRfon reject pMgntInfo->RfOffReason= 0x%x, ChangeSource=0x%X\n", priv->rtllib->RfOffReason, ChangeSource);
+                }
+
+		break;
+
+	case eRfOff:
+
+		if((priv->rtllib->iw_mode == IW_MODE_INFRA) || (priv->rtllib->iw_mode == IW_MODE_ADHOC))
+		{
+			if ((priv->rtllib->RfOffReason > RF_CHANGE_BY_IPS) || (ChangeSource > RF_CHANGE_BY_IPS))
+			{
+				if(ieee->state == RTLLIB_LINKED)
+					priv->blinked_ingpio = true;
+				else
+					priv->blinked_ingpio = false;	
+				MgntDisconnect(dev, disas_lv_ss);
+	
+	
+				
+			}
+		}
+		if((ChangeSource == RF_CHANGE_BY_HW) && (priv->bHwRadioOff == false)){
+			priv->bHwRadioOff = true;
+		}
+		priv->rtllib->RfOffReason |= ChangeSource;
+		bActionAllowed = true;
+		break;
+
+	case eRfSleep:
+		priv->rtllib->RfOffReason |= ChangeSource;
+		bActionAllowed = true;
+		break;
+
+	default:
+		break;
+	}
+
+	if(bActionAllowed)
+	{
+		RT_TRACE((COMP_PS | COMP_RF), "MgntActSet_RF_State(): Action is allowed.... StateToSet(%d), RfOffReason(%#X)\n", StateToSet, priv->rtllib->RfOffReason);
+		PHY_SetRFPowerState(dev, StateToSet);	
+		if(StateToSet == eRfOn) 
+		{				
+
+			if(bConnectBySSID && (priv->blinked_ingpio == true))
+			{				
+				queue_delayed_work_rsl(ieee->wq, &ieee->associate_procedure_wq, 0);
+				priv->blinked_ingpio = false;
+
+			}
+#ifdef _RTL8192_EXT_PATCH_
+			if(priv->rtllib->iw_mode == IW_MODE_MESH){
+				queue_work_rsl(ieee->wq, &ieee->ext_start_mesh_protocol_wq);
+
+			}
+#endif		
+		}
+		else if(StateToSet == eRfOff)
+		{		
+		}		
+	}
+	else
+	{
+		RT_TRACE((COMP_PS | COMP_RF), "MgntActSet_RF_State(): Action is rejected.... StateToSet(%d), ChangeSource(%#X), RfOffReason(%#X)\n", StateToSet, ChangeSource, priv->rtllib->RfOffReason);
+	}
+
+	spin_lock_irqsave(&priv->rf_ps_lock,flag);
+	priv->RFChangeInProgress = false;
+	spin_unlock_irqrestore(&priv->rf_ps_lock,flag);
+	
+	RT_TRACE((COMP_PS && COMP_RF), "<===MgntActSet_RF_State()\n");
+	return bActionAllowed;
+}
+
+
+short rtl8192_get_nic_desc_num(struct net_device *dev, int prio)
+{
+    struct r8192_priv *priv = rtllib_priv(dev);
+    struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
+
+    /* For now, we reserved two free descriptor as a safety boundary 
+     * between the tail and the head 
+     */
+    if((prio == MGNT_QUEUE) &&(skb_queue_len(&ring->queue)>10))
+    	printk("-----[%d]---------ring->idx=%d queue_len=%d---------\n",
+			prio,ring->idx, skb_queue_len(&ring->queue));
+    return skb_queue_len(&ring->queue);
+}
+
+short rtl8192_check_nic_enough_desc(struct net_device *dev, int prio)
+{
+    struct r8192_priv *priv = rtllib_priv(dev);
+    struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
+
+    if (ring->entries - skb_queue_len(&ring->queue) >= 2) {
+        return 1;
+    } else {
+        return 0;
+    }
+}
+
+void rtl8192_tx_timeout(struct net_device *dev)
+{
+    struct r8192_priv *priv = rtllib_priv(dev);
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
+    schedule_work(&priv->reset_wq);
+#else
+    schedule_task(&priv->reset_wq);
+#endif
+    printk("TXTIMEOUT");
+}
+
+void rtl8192_irq_enable(struct net_device *dev)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);	
+	priv->irq_enabled = 1;
+	
+	priv->ops->irq_enable(dev);
+}
+
+void rtl8192_irq_disable(struct net_device *dev)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);	
+
+	priv->ops->irq_disable(dev);
+
+	priv->irq_enabled = 0;
+}
+
+void rtl8192_irq_clear(struct net_device *dev)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);	
+
+	priv->ops->irq_clear(dev);
+}
+
+
+void rtl8192_set_chan(struct net_device *dev,short ch)
+{
+    struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+
+    RT_TRACE(COMP_CH, "=====>%s()====ch:%d\n", __FUNCTION__, ch);	
+    if (priv->chan_forced)
+		return;
+
+    priv->chan = ch;
+
+
+#ifndef LOOP_TEST	
+
+
+    if (priv->rf_set_chan)
+        priv->rf_set_chan(dev,priv->chan);
+
+#ifdef CONFIG_FW_SETCHAN
+    priv->rtllib->SetFwCmdHandler(dev, FW_CMD_CHAN_SET);	
+#endif
+
+#endif
+}
+
+void rtl8192_update_cap(struct net_device* dev, u16 cap)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	struct rtllib_network *net = &priv->rtllib->current_network;
+
+	priv->short_preamble = cap & WLAN_CAPABILITY_SHORT_PREAMBLE;
+	
+	{
+		bool		ShortPreamble;
+			
+		if(cap & WLAN_CAPABILITY_SHORT_PREAMBLE)
+		{ 
+			{
+				ShortPreamble = true;
+				priv->rtllib->SetHwRegHandler( dev, HW_VAR_ACK_PREAMBLE, (unsigned char *)&ShortPreamble );
+			}
+		}
+		else
+		{ 
+			{
+				ShortPreamble = false;
+				priv->rtllib->SetHwRegHandler( dev, HW_VAR_ACK_PREAMBLE, (unsigned char *)&ShortPreamble );
+			}
+		}
+	}
+
+#ifdef RTL8192CE
+	if( net->mode & IEEE_G)
+#elif defined RTL8192SE || defined RTL8192E || defined RTL8190P
+	if (net->mode & (IEEE_G|IEEE_N_24G)) 
+#endif
+	{
+		u8	slot_time_val;
+		u8	CurSlotTime = priv->slot_time;
+		
+#ifdef RTL8192CE
+		if( (cap & WLAN_CAPABILITY_SHORT_SLOT_TIME) && (!(priv->rtllib->pHTInfo->RT2RT_HT_Mode & RT_HT_CAP_USE_LONG_PREAMBLE)))
+#elif defined RTL8192SE || defined RTL8192E || defined RTL8190P
+		if ((cap & WLAN_CAPABILITY_SHORT_SLOT_TIME) && (!priv->rtllib->pHTInfo->bCurrentRT2RTLongSlotTime)) 
+#endif
+		{ 
+			if(CurSlotTime != SHORT_SLOT_TIME)
+			{
+				slot_time_val = SHORT_SLOT_TIME;
+				priv->rtllib->SetHwRegHandler( dev, HW_VAR_SLOT_TIME, &slot_time_val );
+			}
+		}
+		else
+		{ 
+			if(CurSlotTime != NON_SHORT_SLOT_TIME)
+			{
+				slot_time_val = NON_SHORT_SLOT_TIME;
+				priv->rtllib->SetHwRegHandler( dev, HW_VAR_SLOT_TIME, &slot_time_val );
+			}
+		}
+	}
+}
+
+static struct rtllib_qos_parameters def_qos_parameters = {
+        {3,3,3,3},
+        {7,7,7,7},
+        {2,2,2,2},
+        {0,0,0,0},
+        {0,0,0,0} 
+};
+
+void rtl8192_update_beacon(void *data)
+{
+#if LINUX_VERSION_CODE >=KERNEL_VERSION(2,6,20)
+	struct r8192_priv *priv = container_of_work_rsl(data, struct r8192_priv, update_beacon_wq.work);
+	struct net_device *dev = priv->rtllib->dev;
+#else
+	struct net_device *dev = (struct net_device *)data;
+        struct r8192_priv *priv = rtllib_priv(dev);
+#endif
+ 	struct rtllib_device* ieee = priv->rtllib;
+	struct rtllib_network* net = &ieee->current_network;
+
+	if (ieee->pHTInfo->bCurrentHTSupport)
+		HTUpdateSelfAndPeerSetting(ieee, net);
+	ieee->pHTInfo->bCurrentRT2RTLongSlotTime = net->bssht.bdRT2RTLongSlotTime;
+	ieee->pHTInfo->RT2RT_HT_Mode = net->bssht.RT2RT_HT_Mode;
+	rtl8192_update_cap(dev, net->capability);
+}
+
+#ifdef RTL8192CE
+int WDCAPARA_ADD[] = {REG_EDCA_BE_PARAM,REG_EDCA_BK_PARAM,REG_EDCA_VI_PARAM,REG_EDCA_VO_PARAM};
+#else
+int WDCAPARA_ADD[] = {EDCAPARA_BE,EDCAPARA_BK,EDCAPARA_VI,EDCAPARA_VO};
+#endif
+void rtl8192_qos_activate(void *data)
+{
+#if LINUX_VERSION_CODE >=KERNEL_VERSION(2,6,20)
+	struct r8192_priv *priv = container_of_work_rsl(data, struct r8192_priv, qos_activate);
+	struct net_device *dev = priv->rtllib->dev;
+#else
+	struct net_device *dev = (struct net_device *)data;
+	struct r8192_priv *priv = rtllib_priv(dev);
+#endif
+#ifndef RTL8192CE
+        struct rtllib_qos_parameters *qos_parameters = &priv->rtllib->current_network.qos_data.parameters;
+        u8 mode = priv->rtllib->current_network.mode;
+	u8  u1bAIFS;
+	u32 u4bAcParam;
+#endif
+        int i;
+
+        if (priv == NULL)
+                return;
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,16))
+	down(&priv->mutex);
+#else
+        mutex_lock(&priv->mutex);
+#endif
+        if(priv->rtllib->state != RTLLIB_LINKED)
+		goto success;
+	RT_TRACE(COMP_QOS,"qos active process with associate response received\n");
+	
+	for (i = 0; i <  QOS_QUEUE_NUM; i++) {
+#ifdef RTL8192CE
+		priv->rtllib->SetHwRegHandler(dev, HW_VAR_AC_PARAM, (u8*)(&i));
+#else 
+		u1bAIFS = qos_parameters->aifs[i] * ((mode&(IEEE_G|IEEE_N_24G)) ?9:20) + aSifsTime; 
+		u4bAcParam = ((((u32)(qos_parameters->tx_op_limit[i]))<< AC_PARAM_TXOP_LIMIT_OFFSET)|
+				(((u32)(qos_parameters->cw_max[i]))<< AC_PARAM_ECW_MAX_OFFSET)|
+				(((u32)(qos_parameters->cw_min[i]))<< AC_PARAM_ECW_MIN_OFFSET)|
+				((u32)u1bAIFS << AC_PARAM_AIFS_OFFSET));
+		write_nic_dword(dev, WDCAPARA_ADD[i], u4bAcParam);
+#endif
+	}
+
+success:
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,16))
+	up(&priv->mutex);
+#else
+        mutex_unlock(&priv->mutex);
+#endif
+}
+
+static int rtl8192_qos_handle_probe_response(struct r8192_priv *priv,
+		int active_network,
+		struct rtllib_network *network)
+{
+	int ret = 0;
+	u32 size = sizeof(struct rtllib_qos_parameters);
+
+	if(priv->rtllib->state !=RTLLIB_LINKED)
+                return ret;
+
+#ifdef _RTL8192_EXT_PATCH_
+	if (!((priv->rtllib->iw_mode == IW_MODE_INFRA ) || 
+	      ((priv->rtllib->iw_mode == IW_MODE_MESH) && (priv->rtllib->only_mesh == 0))))
+#else
+	if ((priv->rtllib->iw_mode != IW_MODE_INFRA)) 
+#endif
+		return ret;
+
+	if (network->flags & NETWORK_HAS_QOS_MASK) {
+		if (active_network &&
+				(network->flags & NETWORK_HAS_QOS_PARAMETERS))
+			network->qos_data.active = network->qos_data.supported;
+
+		if ((network->qos_data.active == 1) && (active_network == 1) &&
+				(network->flags & NETWORK_HAS_QOS_PARAMETERS) &&
+				(network->qos_data.old_param_count !=
+				 network->qos_data.param_count)) {
+			network->qos_data.old_param_count =
+				network->qos_data.param_count;
+                         priv->rtllib->wmm_acm = network->qos_data.wmm_acm;
+			queue_work_rsl(priv->priv_wq, &priv->qos_activate);
+			RT_TRACE (COMP_QOS, "QoS parameters change call "
+					"qos_activate\n");
+		}
+	} else {
+		memcpy(&priv->rtllib->current_network.qos_data.parameters,\
+		       &def_qos_parameters, size);
+
+		if ((network->qos_data.active == 1) && (active_network == 1)) {
+			queue_work_rsl(priv->priv_wq, &priv->qos_activate);
+			RT_TRACE(COMP_QOS, "QoS was disabled call qos_activate \n");
+		}
+		network->qos_data.active = 0;
+		network->qos_data.supported = 0;
+	}
+
+	return 0;
+}
+
+static int rtl8192_handle_beacon(struct net_device * dev,
+                              struct rtllib_beacon * beacon,
+                              struct rtllib_network * network)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+
+	rtl8192_qos_handle_probe_response(priv,1,network);
+
+	queue_delayed_work_rsl(priv->priv_wq, &priv->update_beacon_wq, 0);
+	return 0;
+
+}
+
+static int rtl8192_qos_association_resp(struct r8192_priv *priv,
+                                    struct rtllib_network *network)
+{
+        int ret = 0;
+        unsigned long flags;
+        u32 size = sizeof(struct rtllib_qos_parameters);
+        int set_qos_param = 0;
+
+        if ((priv == NULL) || (network == NULL))
+                return ret;
+
+	if(priv->rtllib->state !=RTLLIB_LINKED)
+                return ret;
+
+#ifdef _RTL8192_EXT_PATCH_
+	if (!((priv->rtllib->iw_mode == IW_MODE_INFRA ) || 
+	      ((priv->rtllib->iw_mode == IW_MODE_MESH) && (priv->rtllib->only_mesh == 0))))
+#else
+	if ((priv->rtllib->iw_mode != IW_MODE_INFRA)) 
+#endif
+                return ret;
+
+        spin_lock_irqsave(&priv->rtllib->lock, flags);
+	if (network->flags & NETWORK_HAS_QOS_PARAMETERS) {
+		memcpy(&priv->rtllib->current_network.qos_data.parameters,\
+			 &network->qos_data.parameters,\
+			sizeof(struct rtllib_qos_parameters));
+		priv->rtllib->current_network.qos_data.active = 1;
+                priv->rtllib->wmm_acm = network->qos_data.wmm_acm;
+#if 0
+		if((priv->rtllib->current_network.qos_data.param_count != \
+					network->qos_data.param_count))
+#endif
+		 {
+                        set_qos_param = 1;
+			priv->rtllib->current_network.qos_data.old_param_count = \
+				 priv->rtllib->current_network.qos_data.param_count;
+			priv->rtllib->current_network.qos_data.param_count = \
+			     	 network->qos_data.param_count;
+		}
+        } else {
+		memcpy(&priv->rtllib->current_network.qos_data.parameters,\
+		       &def_qos_parameters, size);
+		priv->rtllib->current_network.qos_data.active = 0;
+		priv->rtllib->current_network.qos_data.supported = 0;
+                set_qos_param = 1;
+        }
+
+        spin_unlock_irqrestore(&priv->rtllib->lock, flags);
+
+	RT_TRACE(COMP_QOS, "%s: network->flags = %d,%d\n", __FUNCTION__,
+			network->flags ,priv->rtllib->current_network.qos_data.active);
+	if (set_qos_param == 1) {
+		dm_init_edca_turbo(priv->rtllib->dev);
+		queue_work_rsl(priv->priv_wq, &priv->qos_activate);
+	}
+        return ret;
+}
+
+static int rtl8192_handle_assoc_response(struct net_device *dev,
+                                     struct rtllib_assoc_response_frame *resp,
+                                     struct rtllib_network *network)
+{
+        struct r8192_priv *priv = rtllib_priv(dev);
+        rtl8192_qos_association_resp(priv, network);
+        return 0;
+}
+
+void rtl8192_prepare_beacon(struct r8192_priv *priv)
+{
+#ifdef _RTL8192_EXT_PATCH_
+	struct net_device *dev = priv->rtllib->dev;
+#endif
+	struct sk_buff *skb;
+	cb_desc *tcb_desc; 
+
+#ifdef _RTL8192_EXT_PATCH_
+	if((priv->rtllib->iw_mode == IW_MODE_MESH) && (priv->rtllib->mesh_state == RTLLIB_NOLINK))
+		return;
+#endif
+	skb = rtllib_get_beacon(priv->rtllib);
+	tcb_desc = (cb_desc *)(skb->cb + 8);
+#ifdef _RTL8192_EXT_PATCH_
+	memset(skb->cb, 0, sizeof(skb->cb));
+#endif
+	tcb_desc->queue_index = BEACON_QUEUE;
+	tcb_desc->data_rate = 2;
+	tcb_desc->RATRIndex = 7;
+	tcb_desc->bTxDisableRateFallBack = 1;
+	tcb_desc->bTxUseDriverAssingedRate = 1;
+#ifdef _RTL8192_EXT_PATCH_
+	tcb_desc->bTxEnableFwCalcDur = 0;
+	memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
+#endif
+	skb_push(skb, priv->rtllib->tx_headroom);	
+	if(skb){
+		rtl8192_tx(priv->rtllib->dev,skb);
+	}
+}
+
+void rtl8192_stop_beacon(struct net_device *dev)
+{
+}
+
+void rtl8192_config_rate(struct net_device* dev, u16* rate_config)
+{
+	 struct r8192_priv *priv = rtllib_priv(dev);
+	 struct rtllib_network *net;
+	 u8 i=0, basic_rate = 0;
+#ifdef _RTL8192_EXT_PATCH_	
+	if(priv->rtllib->iw_mode == IW_MODE_MESH)
+		net = & priv->rtllib->current_mesh_network;
+	else
+		net = & priv->rtllib->current_network;
+#else	
+	net = & priv->rtllib->current_network;
+#endif
+
+	 for (i = 0; i < net->rates_len; i++) {
+		 basic_rate = net->rates[i] & 0x7f;
+		 switch (basic_rate) {
+		 case MGN_1M:	
+			 *rate_config |= RRSR_1M;	
+			 break;
+		 case MGN_2M:	
+			 *rate_config |= RRSR_2M;	
+			 break;
+		 case MGN_5_5M:	
+			 *rate_config |= RRSR_5_5M;	
+			 break;
+		 case MGN_11M:	
+			 *rate_config |= RRSR_11M;	
+			 break;
+		 case MGN_6M:	
+			 *rate_config |= RRSR_6M;	
+			 break;
+		 case MGN_9M:	
+			 *rate_config |= RRSR_9M;	
+			 break;
+		 case MGN_12M:	
+			 *rate_config |= RRSR_12M;	
+			 break;
+		 case MGN_18M:	
+			 *rate_config |= RRSR_18M;	
+			 break;
+		 case MGN_24M:	
+			 *rate_config |= RRSR_24M;	
+			 break;
+		 case MGN_36M:	
+			 *rate_config |= RRSR_36M;	
+			 break;
+		 case MGN_48M:	
+			 *rate_config |= RRSR_48M;	
+			 break;
+		 case MGN_54M:	
+			 *rate_config |= RRSR_54M;	
+			 break;
+		 }
+	 }
+
+	 for (i = 0; i < net->rates_ex_len; i++) {
+		 basic_rate = net->rates_ex[i] & 0x7f;
+		 switch (basic_rate) {
+		 case MGN_1M:	
+			 *rate_config |= RRSR_1M;	
+			 break;
+		 case MGN_2M:	
+			 *rate_config |= RRSR_2M;	
+			 break;
+		 case MGN_5_5M:	
+			 *rate_config |= RRSR_5_5M;	
+			 break;
+		 case MGN_11M:	
+			 *rate_config |= RRSR_11M;	
+			 break;
+		 case MGN_6M:	
+			 *rate_config |= RRSR_6M;	
+			 break;
+		 case MGN_9M:	
+			 *rate_config |= RRSR_9M;	
+			 break;
+		 case MGN_12M:	
+			 *rate_config |= RRSR_12M;	
+			 break;
+		 case MGN_18M:	
+			 *rate_config |= RRSR_18M;	
+			 break;
+		 case MGN_24M:	
+			 *rate_config |= RRSR_24M;	
+			 break;
+		 case MGN_36M:	
+			 *rate_config |= RRSR_36M;	
+			 break;
+		 case MGN_48M:	
+			 *rate_config |= RRSR_48M;	
+			 break;
+		 case MGN_54M:	
+			 *rate_config |= RRSR_54M;	
+			 break;
+		 }
+	 }
+}
+
+void rtl8192_refresh_supportrate(struct r8192_priv* priv)
+{
+	struct rtllib_device* ieee = priv->rtllib;
+	if (ieee->mode == WIRELESS_MODE_N_24G || ieee->mode == WIRELESS_MODE_N_5G) {
+		memcpy(ieee->Regdot11HTOperationalRateSet, ieee->RegHTSuppRateSet, 16);
+		memcpy(ieee->Regdot11TxHTOperationalRateSet, ieee->RegHTSuppRateSet, 16);
+		
+#ifdef RTL8192CE
+		if(priv->rf_type == RF_1T1R) {
+			ieee->Regdot11HTOperationalRateSet[1] = 0;
+		}
+#endif
+
+#ifdef RTL8192SE
+		if(priv->rf_type == RF_1T1R) {
+			ieee->Regdot11HTOperationalRateSet[1] = 0;
+		}
+		if(priv->rf_type == RF_1T1R || priv->rf_type == RF_1T2R)
+		{
+			ieee->Regdot11TxHTOperationalRateSet[1] = 0;
+		}
+
+            if(priv->rtllib->b1SSSupport == true) {
+                ieee->Regdot11HTOperationalRateSet[1] = 0;
+            }
+#endif
+	} else {
+		memset(ieee->Regdot11HTOperationalRateSet, 0, 16);
+	}
+	return;
+}
+
+u8 rtl8192_getSupportedWireleeMode(struct net_device*dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u8 ret = 0;
+
+	switch(priv->rf_chip) {
+	case RF_8225:
+	case RF_8256:
+	case RF_6052:
+	case RF_PSEUDO_11N:
+		ret = (WIRELESS_MODE_N_24G|WIRELESS_MODE_G | WIRELESS_MODE_B);
+		break;
+	case RF_8258:
+		ret = (WIRELESS_MODE_A | WIRELESS_MODE_N_5G);
+		break;
+	default:
+		ret = WIRELESS_MODE_B;
+		break;
+	}
+	return ret;
+}
+
+void rtl8192_SetWirelessMode(struct net_device* dev, u8 wireless_mode)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u8 bSupportMode = rtl8192_getSupportedWireleeMode(dev);
+
+#if 0
+	if(	(wireless_mode != WIRELESS_MODE_B) && 
+		(wireless_mode != WIRELESS_MODE_G) &&
+		(wireless_mode != WIRELESS_MODE_A) &&
+		(wireless_mode != WIRELESS_MODE_AUTO) &&
+		(wireless_mode != WIRELESS_MODE_N_24G) &&
+		(wireless_mode != WIRELESS_MODE_N_5G) ) 
+	{
+		wireless_mode = WIRELESS_MODE_AUTO;
+	}
+#endif
+	if ((wireless_mode == WIRELESS_MODE_AUTO) || ((wireless_mode & bSupportMode) == 0)) {
+		if (bSupportMode & WIRELESS_MODE_N_24G) {
+			wireless_mode = WIRELESS_MODE_N_24G;
+		} else if (bSupportMode & WIRELESS_MODE_N_5G) {
+			wireless_mode = WIRELESS_MODE_N_5G;
+		} else if((bSupportMode & WIRELESS_MODE_A)) {
+			wireless_mode = WIRELESS_MODE_A;
+		} else if((bSupportMode & WIRELESS_MODE_G)) {
+			wireless_mode = WIRELESS_MODE_G;
+		} else if((bSupportMode & WIRELESS_MODE_B)) {
+			wireless_mode = WIRELESS_MODE_B;
+		} else {
+			RT_TRACE(COMP_ERR, "%s(), No valid wireless mode supported (%x)!!!\n",
+				       	__FUNCTION__, bSupportMode);
+			wireless_mode = WIRELESS_MODE_B;
+		}
+	}
+
+#ifdef _RTL8192_EXT_PATCH_
+	if ((wireless_mode & WIRELESS_MODE_N_24G) == WIRELESS_MODE_N_24G)
+		wireless_mode = WIRELESS_MODE_N_24G;
+	else if((wireless_mode & WIRELESS_MODE_N_5G) == WIRELESS_MODE_N_5G)
+		wireless_mode = WIRELESS_MODE_N_5G;
+	else if ((wireless_mode & WIRELESS_MODE_A) == WIRELESS_MODE_A)
+		wireless_mode = WIRELESS_MODE_A;
+	else if ((wireless_mode & WIRELESS_MODE_G) == WIRELESS_MODE_G)
+		wireless_mode = WIRELESS_MODE_G;
+	else
+		wireless_mode = WIRELESS_MODE_B;
+#else
+	if ((wireless_mode & (WIRELESS_MODE_B | WIRELESS_MODE_G)) == (WIRELESS_MODE_G | WIRELESS_MODE_B))
+		wireless_mode = WIRELESS_MODE_G;
+#endif
+
+#ifdef RTL8192SE
+	write_nic_word(dev, SIFS_OFDM, 0x0e0e); 
+#endif
+#ifdef RTL8192CE
+	{
+		u16 SIFS_Timer = 0x0a0a;
+		
+		if(wireless_mode == WIRELESS_MODE_G)
+			SIFS_Timer = 0x0a0a;
+	 	else
+			SIFS_Timer = 0x1010;
+
+		priv->rtllib->SetHwRegHandler( dev, HW_VAR_SIFS,  (u8*)&SIFS_Timer);
+	}
+#endif
+	priv->rtllib->mode = wireless_mode;
+	
+	if ((wireless_mode == WIRELESS_MODE_N_24G) ||  (wireless_mode == WIRELESS_MODE_N_5G)){
+		priv->rtllib->pHTInfo->bEnableHT = 1;	
+                printk("%s(), wireless_mode:%x, bEnableHT = 1\n", __FUNCTION__,wireless_mode);
+        }else{
+		priv->rtllib->pHTInfo->bEnableHT = 0;
+                printk("%s(), wireless_mode:%x, bEnableHT = 0\n", __FUNCTION__,wireless_mode);
+        }
+	RT_TRACE(COMP_INIT, "Current Wireless Mode is %x\n", wireless_mode);
+	rtl8192_refresh_supportrate(priv);
+}
+
+
+#ifdef _RTL8192_EXT_PATCH_
+#define KEEP_ALIVE_INTERVAL 				20 
+#define DEFAULT_KEEP_ALIVE_LEVEL			1
+
+static void MgntLinkKeepAlive(struct r8192_priv *priv )
+{
+	if (priv->keepAliveLevel == 0)
+		return;
+
+	if((priv->rtllib->state == RTLLIB_LINKED) && (!priv->rtllib->is_roaming))
+	{
+		
+		if ( (priv->keepAliveLevel== 2) ||
+			(priv->rtllib->LinkDetectInfo.LastNumTxUnicast == priv->NumTxUnicast && 
+			priv->rtllib->LinkDetectInfo.NumRxUnicastOkInPeriod == 0)
+			)
+		{
+			priv->rtllib->LinkDetectInfo.IdleCount++;	
+
+			if(priv->rtllib->LinkDetectInfo.IdleCount >= ((KEEP_ALIVE_INTERVAL / RT_CHECK_FOR_HANG_PERIOD)-1) )
+			{
+				priv->rtllib->LinkDetectInfo.IdleCount = 0;
+				rtllib_sta_ps_send_null_frame(priv->rtllib, false);
+			}
+		}
+		else
+		{
+			priv->rtllib->LinkDetectInfo.IdleCount = 0;
+		}
+		priv->rtllib->LinkDetectInfo.LastNumTxUnicast = priv->NumTxUnicast; 
+		priv->rtllib->LinkDetectInfo.LastNumRxUnicast = priv->rtllib->LinkDetectInfo.NumRxUnicastOkInPeriod;
+	}
+}
+
+static void rtl8192_init_mesh_variable(struct net_device* dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u8 i;
+
+	priv->rtllib->mesh_security_setting = 0;
+	memset(priv->rtllib->swmeshcamtable,0,sizeof(SW_CAM_TABLE)*32);
+	priv->rtllib->mesh_sec_type = 0;
+
+	priv->NumTxUnicast = 0;
+	priv->keepAliveLevel = DEFAULT_KEEP_ALIVE_LEVEL;
+
+	priv->FwCmdIOMap = 0;
+	priv->FwCmdIOParam = 0;
+	priv->ThermalValue = 0;
+	priv->DMFlag = 0;
+	priv->rssi_level = 0;
+	priv->rtllib->bUseRAMask = 0;
+
+	priv->rtllib->set_key_for_AP = rtl8192_set_key_for_AP;
+	memset(priv->rtllib->swmeshratrtable,0,8*(sizeof(SW_RATR_TABLE)));
+	priv->rtllib->mesh_amsdu_in_process = 0;
+	priv->rtllib->HwSecCamBitMap = 0;
+	memset(priv->rtllib->HwSecCamStaAddr,0,TOTAL_CAM_ENTRY * ETH_ALEN); 
+	priv->rtllib->LinkingPeerBitMap = 0;
+	memset(priv->rtllib->LinkingPeerAddr,0,(MAX_MP-1) * ETH_ALEN); 
+	memset(priv->rtllib->LinkingPeerSecState, 0, (MAX_MP-1));
+	memset(priv->rtllib->peer_AID_Addr,0,30 * ETH_ALEN);
+	priv->rtllib->peer_AID_bitmap = 0;
+	priv->rtllib->backup_channel = 1;
+	priv->rtllib->del_hwsec_cam_entry = rtl8192_del_hwsec_cam_entry; 
+	priv->rtllib->set_key_for_peer = meshdev_set_key_for_peer;
+	priv->rtllib->hostname_len = 0;
+	memset(priv->rtllib->hostname, 0, sizeof(priv->rtllib->hostname));
+	strcpy(priv->rtllib->hostname, "Crab"); 
+	priv->rtllib->hostname_len = strlen(priv->rtllib->hostname);
+	priv->rtllib->meshScanMode = 0;
+	priv->rtllib->currentRate = 0xffffffff;
+	priv->mshobj = alloc_mshobj(priv);
+	printk("priv is %p,mshobj is %p\n",priv,priv->mshobj);
+
+	if (priv->mshobj) {
+		priv->rtllib->ext_patch_rtllib_start_protocol = 
+			priv->mshobj->ext_patch_rtllib_start_protocol;
+		priv->rtllib->ext_patch_rtllib_stop_protocol = 
+			priv->mshobj->ext_patch_rtllib_stop_protocol;
+		priv->rtllib->ext_patch_rtllib_start_mesh = 
+			priv->mshobj->ext_patch_rtllib_start_mesh;
+		priv->rtllib->ext_patch_rtllib_probe_req_1 = 
+			priv->mshobj->ext_patch_rtllib_probe_req_1;
+		priv->rtllib->ext_patch_rtllib_probe_req_2 = 
+			priv->mshobj->ext_patch_rtllib_probe_req_2;
+		priv->rtllib->ext_patch_rtllib_rx_frame_softmac_on_auth = 
+			priv->mshobj->ext_patch_rtllib_rx_frame_softmac_on_auth;
+		priv->rtllib->ext_patch_rtllib_rx_frame_softmac_on_deauth = 
+			priv->mshobj->ext_patch_rtllib_rx_frame_softmac_on_deauth;
+		priv->rtllib->ext_patch_rtllib_rx_frame_softmac_on_peerlink_open = 
+			priv->mshobj->ext_patch_rtllib_rx_frame_softmac_on_peerlink_open;
+		priv->rtllib->ext_patch_rtllib_rx_frame_softmac_on_peerlink_confirm = 
+			priv->mshobj->ext_patch_rtllib_rx_frame_softmac_on_peerlink_confirm;
+		priv->rtllib->ext_patch_rtllib_rx_frame_softmac_on_peerlink_close = 
+			priv->mshobj->ext_patch_rtllib_rx_frame_softmac_on_peerlink_close;
+		priv->rtllib->ext_patch_rtllib_close_all_peerlink = 
+			priv->mshobj->ext_patch_rtllib_close_all_peerlink;
+		priv->rtllib->ext_patch_rtllib_rx_frame_softmac_on_linkmetric_report = 
+			priv->mshobj->ext_patch_rtllib_rx_frame_softmac_on_linkmetric_report;
+		priv->rtllib->ext_patch_rtllib_rx_frame_softmac_on_linkmetric_req = 
+			priv->mshobj->ext_patch_rtllib_rx_frame_softmac_on_linkmetric_req;
+		priv->rtllib->ext_patch_rtllib_rx_frame_softmac_on_pathselect_preq = 
+			priv->mshobj->ext_patch_rtllib_rx_frame_softmac_on_pathselect_preq;
+		priv->rtllib->ext_patch_rtllib_rx_frame_softmac_on_pathselect_prep = 
+			priv->mshobj->ext_patch_rtllib_rx_frame_softmac_on_pathselect_prep;
+		priv->rtllib->ext_patch_rtllib_rx_frame_softmac_on_pathselect_perr = 
+			priv->mshobj->ext_patch_rtllib_rx_frame_softmac_on_pathselect_perr;
+		priv->rtllib->ext_patch_rtllib_rx_frame_softmac_on_pathselect_rann = 
+			priv->mshobj->ext_patch_rtllib_rx_frame_softmac_on_pathselect_rann;
+		priv->rtllib->ext_patch_rtllib_rx_frame_softmac_on_pathselect_pann = 
+			priv->mshobj->ext_patch_rtllib_rx_frame_softmac_on_pathselect_pann;
+		priv->rtllib->ext_patch_rtllib_ext_stop_scan_wq_set_channel = 
+			priv->mshobj->ext_patch_rtllib_ext_stop_scan_wq_set_channel;
+		priv->rtllib->ext_patch_r819x_wx_set_mesh_chan = 
+			priv->mshobj->ext_patch_r819x_wx_set_mesh_chan;
+		priv->rtllib->ext_patch_r819x_wx_set_channel = 
+			priv->mshobj->ext_patch_r819x_wx_set_channel;
+		priv->rtllib->ext_patch_rtllib_process_probe_response_1 = 
+			priv->mshobj->ext_patch_rtllib_process_probe_response_1;
+		priv->rtllib->ext_patch_rtllib_rx_mgt_on_probe_req = 
+			priv->mshobj->ext_patch_rtllib_rx_mgt_on_probe_req;
+		priv->rtllib->ext_patch_rtllib_rx_mgt_update_expire = 
+			priv->mshobj->ext_patch_rtllib_rx_mgt_update_expire;
+		priv->rtllib->ext_patch_get_beacon_get_probersp = 
+			priv->mshobj->ext_patch_get_beacon_get_probersp;
+		priv->rtllib->ext_patch_rtllib_rx_on_rx = 
+			priv->mshobj->ext_patch_rtllib_rx_on_rx;		
+		priv->rtllib->ext_patch_rtllib_rx_frame_get_hdrlen = 
+			priv->mshobj->ext_patch_rtllib_rx_frame_get_hdrlen;
+		priv->rtllib->ext_patch_rtllib_rx_frame_get_mac_hdrlen = 
+			priv->mshobj->ext_patch_rtllib_rx_frame_get_mac_hdrlen;
+		priv->rtllib->ext_patch_rtllib_rx_frame_get_mesh_hdrlen_llc = 
+			priv->mshobj->ext_patch_rtllib_rx_frame_get_mesh_hdrlen_llc;
+		priv->rtllib->ext_patch_rtllib_rx_is_valid_framectl = 
+			priv->mshobj->ext_patch_rtllib_rx_is_valid_framectl;
+		priv->rtllib->ext_patch_rtllib_softmac_xmit_get_rate = 
+			priv->mshobj->ext_patch_rtllib_softmac_xmit_get_rate;
+		/* added by david for setting acl dynamically */
+		priv->rtllib->ext_patch_rtllib_acl_query = 
+			priv->mshobj->ext_patch_rtllib_acl_query;
+		priv->rtllib->ext_patch_rtllib_is_mesh = 
+			priv->mshobj->ext_patch_rtllib_is_mesh;
+		priv->rtllib->ext_patch_rtllib_create_crypt_for_peer = 
+			priv->mshobj->ext_patch_rtllib_create_crypt_for_peer;
+		priv->rtllib->ext_patch_rtllib_get_peermp_htinfo = 
+			priv->mshobj->ext_patch_rtllib_get_peermp_htinfo;
+		priv->rtllib->ext_patch_rtllib_send_ath_commit = 
+			priv->mshobj->ext_patch_rtllib_send_ath_commit;
+		priv->rtllib->ext_patch_rtllib_send_ath_confirm = 
+			priv->mshobj->ext_patch_rtllib_send_ath_confirm;
+		priv->rtllib->ext_patch_rtllib_rx_ath_commit = 
+			priv->mshobj->ext_patch_rtllib_rx_ath_commit;
+		priv->rtllib->ext_patch_rtllib_rx_ath_confirm = 
+			priv->mshobj->ext_patch_rtllib_rx_ath_confirm;
+	}
+	for (i = 0; i < MAX_QUEUE_SIZE; i++) {
+		skb_queue_head_init(&priv->rtllib->skb_meshaggQ[i]);
+	}
+}
+
+int _rtl8192_mesh_up(struct net_device *dev,bool is_silent_reset)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
+	bool init_status = true;
+	priv->bDriverIsGoingToUnload = false;
+	priv->bdisable_nic = false;  
+
+	if(priv->mesh_up){
+		RT_TRACE(COMP_ERR,"%s(): since mesh0 is already up, ra0 is forbidden to open.\n",__FUNCTION__);
+		return -1;
+	}
+	RT_TRACE(COMP_DOWN, "==========>%s()\n", __FUNCTION__);
+	if(!is_silent_reset)
+		priv->rtllib->iw_mode = IW_MODE_INFRA;
+	if(priv->up){
+		RT_TRACE(COMP_ERR,"%s():%s is up,return\n",__FUNCTION__,DRV_NAME);
+		return -1;
+	}
+#ifdef RTL8192SE        
+	priv->ReceiveConfig =
+				RCR_APPFCS | RCR_APWRMGT | /*RCR_ADD3 |*/
+				RCR_AMF | RCR_ADF | RCR_APP_MIC | RCR_APP_ICV |
+				RCR_AICV | RCR_ACRC32    |                               
+				RCR_AB          | RCR_AM                |                               
+				RCR_APM         |                                                               
+				/*RCR_AAP               |*/                                                     
+				RCR_APP_PHYST_STAFF | RCR_APP_PHYST_RXFF |      
+				(priv->EarlyRxThreshold<<RCR_FIFO_OFFSET)       ;
+#endif
+
+	if(!priv->mesh_up)
+	{
+		RT_TRACE(COMP_INIT, "Bringing up iface");
+		priv->bfirst_init = true;
+		init_status = priv->ops->initialize_adapter(dev);
+		if(init_status != true)
+		{
+			RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n",__FUNCTION__);
+			return -1;
+		}
+		RT_TRACE(COMP_INIT, "start adapter finished\n");
+		RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC);
+		priv->rtllib->ieee_up=1;
+		priv->bfirst_init = false;
+#ifdef ENABLE_GPIO_RADIO_CTL
+		if(priv->polling_timer_on == 0){
+			check_rfctrl_gpio_timer((unsigned long)dev);
+		}
+#endif
+		priv->rtllib->current_network.channel = INIT_DEFAULT_CHAN;
+		priv->rtllib->current_mesh_network.channel = INIT_DEFAULT_CHAN;
+		if((priv->mshobj->ext_patch_r819x_wx_set_mesh_chan) && (!is_silent_reset))
+			priv->mshobj->ext_patch_r819x_wx_set_mesh_chan(dev,INIT_DEFAULT_CHAN);
+		if((priv->mshobj->ext_patch_r819x_wx_set_channel) && (!is_silent_reset))
+		{
+			priv->mshobj->ext_patch_r819x_wx_set_channel(priv->rtllib, INIT_DEFAULT_CHAN);
+		}
+		dm_InitRateAdaptiveMask(dev);
+	}	
+	else
+	{
+		rtllib_stop_scan_syncro(priv->rtllib);
+	}
+	priv->up=1; 
+	printk("%s():set chan %d\n",__FUNCTION__,INIT_DEFAULT_CHAN);
+	priv->rtllib->set_chan(dev, INIT_DEFAULT_CHAN); 
+	priv->up_first_time = 0;
+	if(!priv->rtllib->proto_started) 
+	{
+#ifdef RTL8192E
+		if(priv->rtllib->eRFPowerState!=eRfOn)
+			MgntActSet_RF_State(dev, eRfOn, priv->rtllib->RfOffReason);	
+#endif
+		if(priv->rtllib->state != RTLLIB_LINKED)
+			rtllib_softmac_start_protocol(priv->rtllib, 0);
+	}
+	if(!priv->mesh_up)
+		watch_dog_timer_callback((unsigned long) dev);
+	rtllib_reset_queue(priv->rtllib);
+	if(!netif_queue_stopped(dev))
+		netif_start_queue(dev);
+	else
+		netif_wake_queue(dev);
+	RT_TRACE(COMP_DOWN, "<==========%s()\n", __FUNCTION__);
+
+	return 0;
+}
+
+int rtl8192_mesh_down(struct net_device *dev, bool shutdownrf)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	unsigned long flags = 0;
+	u8 RFInProgressTimeOut = 0;
+
+	if (priv->up == 0) 
+		return -1;
+
+	RT_TRACE(COMP_DOWN, "==========>%s()\n", __FUNCTION__);
+#ifdef ENABLE_LPS
+	if(priv->rtllib->state == RTLLIB_LINKED)
+		LeisurePSLeave(dev);
+#endif
+	priv->up=0; 
+
+	/* FIXME */
+	if (!netif_queue_stopped(dev))
+		netif_stop_queue(dev);  
+	if(!priv->mesh_up)
+	{
+		priv->bDriverIsGoingToUnload = true;	
+		priv->rtllib->ieee_up = 0;  
+		/* mesh stack has also be closed, then disalbe the hardware function at 
+		 * the same time */
+		priv->rtllib->wpa_ie_len = 0;
+		if(priv->rtllib->wpa_ie)
+			kfree(priv->rtllib->wpa_ie);
+		priv->rtllib->wpa_ie = NULL;
+#ifdef RTL8192S_WAPI_SUPPORT
+		priv->rtllib->wapiInfo.wapiTxMsk.bTxEnable = false;
+		priv->rtllib->wapiInfo.wapiTxMsk.bSet = false;
+#endif		
+		CamResetAllEntry(dev);
+		memset(priv->rtllib->swcamtable,0,sizeof(SW_CAM_TABLE)*32);
+		rtl8192_irq_disable(dev);
+		rtl8192_cancel_deferred_work(priv);
+#ifndef RTL8190P
+		cancel_delayed_work(&priv->rtllib->hw_wakeup_wq);
+#endif
+		deinit_hal_dm(dev);
+		del_timer_sync(&priv->watch_dog_timer);	
+
+		rtllib_softmac_stop_protocol(priv->rtllib, 0, true);
+		SPIN_LOCK_PRIV_RFPS(&priv->rf_ps_lock);
+		while(priv->RFChangeInProgress)
+		{
+			SPIN_UNLOCK_PRIV_RFPS(&priv->rf_ps_lock);
+			if(RFInProgressTimeOut > 100)
+			{
+				SPIN_LOCK_PRIV_RFPS(&priv->rf_ps_lock);
+				break;
+			}
+			printk("===>%s():RF is in progress, need to wait until rf chang is done.\n",__FUNCTION__);
+			mdelay(1);
+			RFInProgressTimeOut ++;
+			SPIN_LOCK_PRIV_RFPS(&priv->rf_ps_lock);
+		}
+		priv->RFChangeInProgress = true;
+		SPIN_UNLOCK_PRIV_RFPS(&priv->rf_ps_lock);
+		priv->ops->stop_adapter(dev, false);
+		SPIN_LOCK_PRIV_RFPS(&priv->rf_ps_lock);
+		priv->RFChangeInProgress = false;
+		SPIN_UNLOCK_PRIV_RFPS(&priv->rf_ps_lock);
+		udelay(100);
+		memset(&priv->rtllib->current_network, 0 , offsetof(struct rtllib_network, list));
+		priv->rtllib->wap_set = 0; 
+		priv->rtllib->current_network.channel = INIT_DEFAULT_CHAN;
+#ifdef CONFIG_ASPM_OR_D3
+		RT_ENABLE_ASPM(dev);
+#endif
+	} else {
+		priv->rtllib->wpa_ie_len = 0;
+		if(priv->rtllib->wpa_ie)
+			kfree(priv->rtllib->wpa_ie);
+		priv->rtllib->wpa_ie = NULL;
+#ifdef RTL8192S_WAPI_SUPPORT
+		priv->rtllib->wapiInfo.wapiTxMsk.bTxEnable = false;
+		priv->rtllib->wapiInfo.wapiTxMsk.bSet = false;
+#endif
+		CamResetAllEntry(dev);
+		CamRestoreEachIFEntry(dev,1);	
+		memset(priv->rtllib->swcamtable,0,sizeof(SW_CAM_TABLE)*32);
+
+		rtllib_softmac_stop_protocol(priv->rtllib, 0, true);
+		memset(&priv->rtllib->current_network, 0 , offsetof(struct rtllib_network, list));
+		priv->rtllib->current_network.channel = INIT_DEFAULT_CHAN;
+		priv->rtllib->wap_set = 0; 
+	}
+
+	RT_TRACE(COMP_DOWN, "<==========%s()\n", __FUNCTION__);
+
+	return 0;
+}
+
+void rtl8192_dinit_mshobj(struct r8192_priv *priv) 
+{
+
+	if(priv && priv->mshobj)
+	{
+		if(priv->mshobj->ext_patch_remove_proc)
+			priv->mshobj->ext_patch_remove_proc(priv);
+		priv->rtllib->ext_patch_rtllib_start_protocol = 0;
+		priv->rtllib->ext_patch_rtllib_stop_protocol = 0;
+		priv->rtllib->ext_patch_rtllib_probe_req_1 = 0;
+		priv->rtllib->ext_patch_rtllib_probe_req_2 = 0;
+		priv->rtllib->ext_patch_rtllib_rx_frame_softmac_on_auth =0;
+		priv->rtllib->ext_patch_rtllib_rx_frame_softmac_on_deauth =0;
+		priv->rtllib->ext_patch_rtllib_rx_frame_softmac_on_peerlink_open = 0;
+		priv->rtllib->ext_patch_rtllib_rx_frame_softmac_on_peerlink_confirm = 0;
+		priv->rtllib->ext_patch_rtllib_rx_frame_softmac_on_peerlink_close = 0;
+		priv->rtllib->ext_patch_rtllib_rx_frame_softmac_on_linkmetric_report= 0;
+		priv->rtllib->ext_patch_rtllib_rx_frame_softmac_on_linkmetric_req= 0;
+		priv->rtllib->ext_patch_rtllib_rx_frame_softmac_on_pathselect_preq = 0;
+		priv->rtllib->ext_patch_rtllib_rx_frame_softmac_on_pathselect_prep=0;
+		priv->rtllib->ext_patch_rtllib_rx_frame_softmac_on_pathselect_perr = 0;
+		priv->rtllib->ext_patch_rtllib_rx_frame_softmac_on_pathselect_rann=0;
+		priv->rtllib->ext_patch_rtllib_rx_frame_softmac_on_pathselect_pann=0;
+		priv->rtllib->ext_patch_rtllib_ext_stop_scan_wq_set_channel = 0;
+		priv->rtllib->ext_patch_rtllib_process_probe_response_1 = 0;
+		priv->rtllib->ext_patch_rtllib_rx_mgt_on_probe_req = 0;
+		priv->rtllib->ext_patch_rtllib_rx_mgt_update_expire = 0;
+		priv->rtllib->ext_patch_rtllib_rx_on_rx = 0;
+		priv->rtllib->ext_patch_get_beacon_get_probersp = 0;
+		priv->rtllib->ext_patch_rtllib_rx_frame_get_hdrlen = 0;
+		priv->rtllib->ext_patch_rtllib_rx_frame_get_mac_hdrlen = 0;
+		priv->rtllib->ext_patch_rtllib_rx_frame_get_mesh_hdrlen_llc = 0;
+		priv->rtllib->ext_patch_rtllib_rx_is_valid_framectl = 0;
+		priv->rtllib->ext_patch_rtllib_softmac_xmit_get_rate = 0;
+		priv->rtllib->ext_patch_rtllib_is_mesh = 0;
+		priv->rtllib->ext_patch_rtllib_create_crypt_for_peer = 0;
+		priv->rtllib->ext_patch_rtllib_get_peermp_htinfo = 0;
+		priv->rtllib->ext_patch_rtllib_send_ath_commit = 0;
+		priv->rtllib->ext_patch_rtllib_send_ath_confirm = 0;
+		priv->rtllib->ext_patch_rtllib_rx_ath_commit = 0;
+		priv->rtllib->ext_patch_rtllib_rx_ath_confirm = 0;
+                free_mshobj(&priv->mshobj);
+	}
+
+}
+#else
+int _rtl8192_sta_up(struct net_device *dev,bool is_silent_reset)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
+	bool init_status = true;
+	priv->bDriverIsGoingToUnload = false;
+	priv->bdisable_nic = false;  
+
+	priv->up=1;
+	priv->rtllib->ieee_up=1;	
+	
+	priv->up_first_time = 0;
+	RT_TRACE(COMP_INIT, "Bringing up iface");
+	priv->bfirst_init = true;
+	init_status = priv->ops->initialize_adapter(dev);
+	if(init_status != true)
+	{
+		RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n",__FUNCTION__);
+		priv->bfirst_init = false;
+		return -1;
+	}
+
+	RT_TRACE(COMP_INIT, "start adapter finished\n");
+	RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC);
+	priv->bfirst_init = false;
+#if defined RTL8192SE || defined RTL8192CE
+	if(priv->rtllib->eRFPowerState!=eRfOn)
+		MgntActSet_RF_State(dev, eRfOn, priv->rtllib->RfOffReason);	
+#endif
+
+#ifdef ENABLE_GPIO_RADIO_CTL
+	if(priv->polling_timer_on == 0){
+		check_rfctrl_gpio_timer((unsigned long)dev);
+	}
+#endif
+
+	if(priv->rtllib->state != RTLLIB_LINKED)
+#ifndef CONFIG_MP
+	rtllib_softmac_start_protocol(priv->rtllib);
+#endif
+	rtllib_reset_queue(priv->rtllib);
+#ifndef CONFIG_MP
+	watch_dog_timer_callback((unsigned long) dev);
+#endif
+
+
+	if(!netif_queue_stopped(dev))
+		netif_start_queue(dev);
+	else
+		netif_wake_queue(dev);
+
+	return 0;
+}
+
+int rtl8192_sta_down(struct net_device *dev, bool shutdownrf)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	unsigned long flags = 0;
+	u8 RFInProgressTimeOut = 0;
+
+	if (priv->up == 0) return -1;
+
+#ifdef ENABLE_LPS
+	if(priv->rtllib->state == RTLLIB_LINKED)
+		LeisurePSLeave(dev);
+#endif
+
+	priv->bDriverIsGoingToUnload = true;
+	priv->up=0;
+	priv->rtllib->ieee_up = 0;
+	priv->bfirst_after_down = 1;
+	RT_TRACE(COMP_DOWN, "==========>%s()\n", __FUNCTION__);
+	if (!netif_queue_stopped(dev))
+		netif_stop_queue(dev);
+
+	priv->rtllib->wpa_ie_len = 0;
+	if(priv->rtllib->wpa_ie)
+		kfree(priv->rtllib->wpa_ie);
+	priv->rtllib->wpa_ie = NULL;
+#ifdef RTL8192S_WAPI_SUPPORT	
+	priv->rtllib->wapiInfo.wapiTxMsk.bTxEnable = false;
+	priv->rtllib->wapiInfo.wapiTxMsk.bSet = false;
+#endif	
+	CamResetAllEntry(dev);	
+	memset(priv->rtllib->swcamtable,0,sizeof(SW_CAM_TABLE)*32);
+	rtl8192_irq_disable(dev);
+
+	del_timer_sync(&priv->watch_dog_timer);	
+	rtl8192_cancel_deferred_work(priv);
+#ifndef RTL8190P
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)	
+	cancel_delayed_work(&priv->rtllib->hw_wakeup_wq);
+#endif
+#endif
+
+	rtllib_softmac_stop_protocol(priv->rtllib,true);
+	spin_lock_irqsave(&priv->rf_ps_lock,flags);
+	while(priv->RFChangeInProgress)
+	{
+		spin_unlock_irqrestore(&priv->rf_ps_lock,flags);
+		if(RFInProgressTimeOut > 100)
+		{
+			spin_lock_irqsave(&priv->rf_ps_lock,flags);
+			break;
+		}
+		printk("===>%s():RF is in progress, need to wait until rf chang is done.\n",__FUNCTION__);
+		mdelay(1);
+		RFInProgressTimeOut ++;
+		spin_lock_irqsave(&priv->rf_ps_lock,flags);
+	}
+	priv->RFChangeInProgress = true;
+	spin_unlock_irqrestore(&priv->rf_ps_lock,flags);
+	priv->ops->stop_adapter(dev, false);
+	spin_lock_irqsave(&priv->rf_ps_lock,flags);
+	priv->RFChangeInProgress = false;
+	spin_unlock_irqrestore(&priv->rf_ps_lock,flags);
+	udelay(100);
+	memset(&priv->rtllib->current_network, 0 , offsetof(struct rtllib_network, list));
+#ifdef CONFIG_ASPM_OR_D3
+	RT_ENABLE_ASPM(dev);
+#endif
+	RT_TRACE(COMP_DOWN, "<==========%s()\n", __FUNCTION__);
+
+	return 0;
+}
+
+#endif
+
+static void rtl8192_init_priv_handler(struct net_device* dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+
+	priv->rtllib->softmac_hard_start_xmit 	= rtl8192_hard_start_xmit;
+	priv->rtllib->set_chan 				= rtl8192_set_chan;
+	priv->rtllib->link_change 			= priv->ops->link_change;
+	priv->rtllib->softmac_data_hard_start_xmit = rtl8192_hard_data_xmit;
+	priv->rtllib->data_hard_stop 		= rtl8192_data_hard_stop;
+	priv->rtllib->data_hard_resume 		= rtl8192_data_hard_resume;
+	priv->rtllib->check_nic_enough_desc 	= rtl8192_check_nic_enough_desc;	
+	priv->rtllib->get_nic_desc_num 		= rtl8192_get_nic_desc_num;	
+#ifdef _RTL8192_EXT_PATCH_
+	priv->rtllib->set_mesh_key 			= r8192_mesh_set_enc_ext;
+#endif
+	priv->rtllib->handle_assoc_response 	= rtl8192_handle_assoc_response;
+	priv->rtllib->handle_beacon 		= rtl8192_handle_beacon;
+	priv->rtllib->SetWirelessMode 		= rtl8192_SetWirelessMode;
+	
+#ifdef ENABLE_LPS
+	priv->rtllib->LeisurePSLeave 		= LeisurePSLeave;
+#endif
+
+#ifdef RTL8192CE
+	priv->rtllib->SetBWModeHandler 		= PHY_SetBWMode8192C;
+	priv->rf_set_chan 						= PHY_SwChnl8192C;
+	
+#ifdef _ENABLE_SW_BEACON
+	priv->rtllib->start_send_beacons 	= NULL;
+	priv->rtllib->stop_send_beacons 	= NULL;
+#else
+	priv->rtllib->start_send_beacons 	= rtl8192ce_SetBeaconRelatedRegisters;
+	priv->rtllib->stop_send_beacons 	= rtl8192_stop_beacon;
+#endif
+	
+	priv->rtllib->sta_wake_up 			= rtl8192_hw_wakeup;
+	priv->rtllib->enter_sleep_state 		= rtl8192_hw_to_sleep;
+	priv->rtllib->ps_is_queue_empty 	= rtl8192_is_tx_queue_empty;
+	
+	priv->rtllib->GetNmodeSupportBySecCfg = rtl8192ce_GetNmodeSupportBySecCfg;
+	priv->rtllib->GetHalfNmodeSupportByAPsHandler = rtl8192ce_GetHalfNmodeSupportByAPs;
+
+	priv->rtllib->SetHwRegHandler 		= rtl8192ce_SetHwReg;
+	priv->rtllib->GetHwRegHandler 		= rtl8192ce_GetHwReg;
+	priv->rtllib->AllowAllDestAddrHandler = rtl8192ce_AllowAllDestAddr;
+	priv->rtllib->SetFwCmdHandler 		= rtl8192ce_phy_SetFwCmdIO;
+	priv->rtllib->UpdateHalRAMaskHandler 	= rtl8192ce_UpdateHalRAMask;
+	priv->rtllib->UpdateBeaconInterruptHandler = rtl8192ce_UpdateInterruptMask;
+	priv->rtllib->rtl_11n_user_show_rates = rtl8192_11n_user_show_rates;
+#ifdef ENABLE_IPS
+	priv->rtllib->rtllib_ips_leave_wq = rtllib_ips_leave_wq;
+	priv->rtllib->rtllib_ips_leave 	= rtllib_ips_leave;
+#endif
+
+	priv->rtllib->LedControlHandler 		= LedControl8192CE;
+	priv->rtllib->ScanOperationBackupHandler = PHY_ScanOperationBackup8192C;
+#endif
+
+#ifdef RTL8192SE
+	priv->rtllib->SetBWModeHandler 		= rtl8192_SetBWMode;
+	priv->rf_set_chan 						= rtl8192_phy_SwChnl;
+	
+#ifdef _RTL8192_EXT_PATCH_
+	priv->rtllib->start_send_beacons = NULL;
+	priv->rtllib->stop_send_beacons = NULL;
+#else	
+#ifdef _ENABLE_SW_BEACON
+	priv->rtllib->start_send_beacons = NULL;
+	priv->rtllib->stop_send_beacons = NULL;
+#else
+	priv->rtllib->start_send_beacons = rtl8192se_start_beacon;
+	priv->rtllib->stop_send_beacons = rtl8192_stop_beacon;
+#endif	
+#endif	
+	priv->rtllib->sta_wake_up = rtl8192_hw_wakeup;
+	priv->rtllib->enter_sleep_state = rtl8192_hw_to_sleep;
+	priv->rtllib->ps_is_queue_empty = rtl8192_is_tx_queue_empty;
+
+	priv->rtllib->GetNmodeSupportBySecCfg = rtl8192se_GetNmodeSupportBySecCfg;
+	priv->rtllib->GetHalfNmodeSupportByAPsHandler = rtl8192se_GetHalfNmodeSupportByAPs;
+
+	priv->rtllib->SetBeaconRelatedRegistersHandler = SetBeaconRelatedRegisters8192SE;
+	priv->rtllib->Adhoc_InitRateAdaptive = Adhoc_InitRateAdaptive;
+	priv->rtllib->check_ht_cap = rtl8192se_check_ht_cap;
+	priv->rtllib->SetHwRegHandler = SetHwReg8192SE;
+	priv->rtllib->GetHwRegHandler = GetHwReg8192SE;
+	priv->rtllib->AllowAllDestAddrHandler = rtl8192se_AllowAllDestAddr; 
+	priv->rtllib->SetFwCmdHandler = rtl8192se_set_fw_cmd;
+	priv->rtllib->UpdateHalRAMaskHandler = UpdateHalRAMask8192SE;
+	priv->rtllib->UpdateBeaconInterruptHandler = NULL;
+	priv->rtllib->rtl_11n_user_show_rates = rtl8192_11n_user_show_rates;
+#ifdef ENABLE_IPS
+	priv->rtllib->rtllib_ips_leave_wq = rtllib_ips_leave_wq;
+	priv->rtllib->rtllib_ips_leave = rtllib_ips_leave;
+#endif
+
+	priv->rtllib->LedControlHandler = LedControl8192SE;
+	priv->rtllib->rtllib_start_hw_scan = rtl8192se_hw_scan_initiate;
+	priv->rtllib->rtllib_stop_hw_scan = rtl8192se_cancel_hw_scan;
+#endif
+
+#ifdef RTL8192E
+	priv->rtllib->SetBWModeHandler 		= rtl8192_SetBWMode;
+	priv->rf_set_chan 						= rtl8192_phy_SwChnl;
+	
+#ifdef _ENABLE_SW_BEACON
+	priv->rtllib->start_send_beacons = NULL;
+	priv->rtllib->stop_send_beacons = NULL;
+#else
+	priv->rtllib->start_send_beacons = rtl8192e_start_beacon;
+	priv->rtllib->stop_send_beacons = rtl8192_stop_beacon;
+#endif
+	
+	priv->rtllib->sta_wake_up = rtl8192_hw_wakeup;
+	priv->rtllib->enter_sleep_state = rtl8192_hw_to_sleep;
+	priv->rtllib->ps_is_queue_empty = rtl8192_is_tx_queue_empty;
+
+	priv->rtllib->GetNmodeSupportBySecCfg = rtl8192_GetNmodeSupportBySecCfg;
+	priv->rtllib->GetHalfNmodeSupportByAPsHandler = rtl8192_GetHalfNmodeSupportByAPs;
+
+	priv->rtllib->SetHwRegHandler = rtl8192e_SetHwReg;
+	priv->rtllib->AllowAllDestAddrHandler = rtl8192_AllowAllDestAddr; 
+	priv->rtllib->SetFwCmdHandler = NULL;
+	priv->rtllib->InitialGainHandler = InitialGain819xPci;
+#ifdef ENABLE_IPS
+	priv->rtllib->rtllib_ips_leave_wq = rtllib_ips_leave_wq;
+	priv->rtllib->rtllib_ips_leave = rtllib_ips_leave;
+#endif
+
+	priv->rtllib->LedControlHandler = NULL;
+	priv->rtllib->UpdateBeaconInterruptHandler = NULL;
+#endif
+
+#ifdef RTL8190P
+	priv->rtllib->SetBWModeHandler 		= rtl8192_SetBWMode;
+	priv->rf_set_chan 						= rtl8192_phy_SwChnl;
+	
+#ifdef _ENABLE_SW_BEACON
+	priv->rtllib->start_send_beacons = NULL;
+	priv->rtllib->stop_send_beacons = NULL;
+#else
+	priv->rtllib->start_send_beacons = rtl8192e_start_beacon;
+	priv->rtllib->stop_send_beacons = rtl8192_stop_beacon;
+#endif
+	
+	priv->rtllib->GetNmodeSupportBySecCfg = rtl8192_GetNmodeSupportBySecCfg;
+	priv->rtllib->GetHalfNmodeSupportByAPsHandler = rtl8192_GetHalfNmodeSupportByAPs;
+
+	priv->rtllib->SetHwRegHandler = rtl8192e_SetHwReg;
+	priv->rtllib->SetFwCmdHandler = NULL;
+	priv->rtllib->InitialGainHandler = InitialGain819xPci;
+#ifdef ENABLE_IPS
+	priv->rtllib->rtllib_ips_leave_wq = rtllib_ips_leave_wq;
+	priv->rtllib->rtllib_ips_leave = rtllib_ips_leave;
+#endif
+
+	priv->rtllib->LedControlHandler = NULL;
+	priv->rtllib->UpdateBeaconInterruptHandler = NULL;
+#endif
+
+#ifdef CONFIG_RTL_RFKILL
+	priv->rtllib->rtllib_rfkill_poll = rtl8192_rfkill_poll; 
+#else
+	priv->rtllib->rtllib_rfkill_poll = NULL;
+#endif
+}
+
+static void rtl8192_init_aspm(struct net_device* dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+#ifdef CONFIG_ASPM_OR_D3
+	int pos;
+	u8 value;
+#endif
+
+	priv->bridge_pdev = priv->pdev->bus->self;
+	switch (priv->bridge_pdev->vendor) {
+	case PCI_VENDOR_ID_INTEL:
+		priv->pci_bridge_vendor = PCI_BRIDGE_VENDOR_INTEL;
+			break;
+	case PCI_VENDOR_ID_SI:
+		priv->pci_bridge_vendor = PCI_BRIDGE_VENDOR_SIS;
+			break;
+	default:
+		priv->pci_bridge_vendor = 0;
+		break;
+	}
+	
+#ifdef CONFIG_ASPM_OR_D3
+	if (priv->pci_bridge_vendor & (PCI_BRIDGE_VENDOR_INTEL | PCI_BRIDGE_VENDOR_SIS)) {
+		priv->aspm_clkreq_enable = true;
+		priv->RegHostPciASPMSetting = 0x02;
+		pos = pci_find_capability(priv->bridge_pdev, PCI_CAP_ID_EXP);
+		priv->PciBridgeASPMRegOffset = pos + PCI_EXP_LNKCTL;
+		pci_read_config_byte(priv->bridge_pdev, pos + PCI_EXP_LNKCTL, &value);
+		priv->PciBridgeLinkCtrlReg = value;
+
+		priv->RegDevicePciASPMSetting = 0x03;
+		pos = pci_find_capability(priv->pdev, PCI_CAP_ID_EXP);
+		priv->ASPMRegOffset = pos + PCI_EXP_LNKCTL;
+		priv->ClkReqOffset = pos + PCI_EXP_LNKCTL + 1;
+		pci_read_config_byte(priv->pdev, pos + PCI_EXP_LNKCTL, &value);
+		priv->LinkCtrlReg = value;
+	} else {
+		priv->aspm_clkreq_enable = false;
+	}
+#endif	
+}
+
+static void rtl8192_init_priv_variable(struct net_device* dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+#if defined RTL8192SE || defined RTL8192CE || defined RTL8192E	
+	PRT_POWER_SAVE_CONTROL	pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
+#endif
+	u8 i;
+
+	priv->rtllib->hwscan_sem_up = 1;
+	priv->rtllib->status = 0;
+	priv->H2CTxCmdSeq = 0;
+	priv->bDisableFrameBursting = 0;
+	priv->bDMInitialGainEnable = 1;	
+	priv->polling_timer_on = 0;
+	priv->up_first_time = 1;
+	priv->blinked_ingpio = false;
+	priv->bDriverIsGoingToUnload = false;
+	priv->being_init_adapter = false;
+	priv->initialized_at_probe = false;
+	priv->sw_radio_on = true;
+	priv->bdisable_nic = false;
+	priv->bfirst_init = false;
+	priv->txringcount = 64;
+	priv->rxbuffersize = 9100;
+	priv->rxringcount = MAX_RX_COUNT;
+	priv->irq_enabled=0;
+	priv->chan = 1; 
+	priv->RegWirelessMode = WIRELESS_MODE_AUTO;
+	priv->RegChannelPlan = 0xf;
+	priv->nrxAMPDU_size = 0;
+	priv->nrxAMPDU_aggr_num = 0;
+	priv->last_rxdesc_tsf_high = 0;
+	priv->last_rxdesc_tsf_low = 0;
+	priv->rtllib->mode = WIRELESS_MODE_AUTO; 
+	priv->rtllib->iw_mode = IW_MODE_INFRA;
+	priv->rtllib->bNetPromiscuousMode = false;
+	priv->rtllib->IntelPromiscuousModeInfo.bPromiscuousOn = false;
+	priv->rtllib->IntelPromiscuousModeInfo.bFilterSourceStationFrame = false;
+	priv->rtllib->ieee_up=0;
+	priv->retry_rts = DEFAULT_RETRY_RTS;
+	priv->retry_data = DEFAULT_RETRY_DATA;
+	priv->rtllib->rts = DEFAULT_RTS_THRESHOLD;
+	priv->rtllib->rate = 110; 
+	priv->rtllib->short_slot = 1;
+	priv->promisc = (dev->flags & IFF_PROMISC) ? 1:0;
+	priv->bcck_in_ch14 = false;
+	priv->bfsync_processing  = false;
+	priv->CCKPresentAttentuation = 0;
+	priv->rfa_txpowertrackingindex = 0;
+	priv->rfc_txpowertrackingindex = 0;
+	priv->CckPwEnl = 6;
+	priv->ScanDelay = 50;
+	priv->ResetProgress = RESET_TYPE_NORESET;
+	priv->bForcedSilentReset = 0;
+	priv->bDisableNormalResetCheck = false;
+	priv->force_reset = false;
+	memset(priv->rtllib->swcamtable,0,sizeof(SW_CAM_TABLE)*32);
+
+	memset(&priv->InterruptLog,0,sizeof(LOG_INTERRUPT_8190_T));
+	priv->RxCounter = 0;
+        priv->rtllib->wx_set_enc = 0;
+	priv->bHwRadioOff = false;
+	priv->RegRfOff = 0;
+	priv->isRFOff = false;
+	priv->bInPowerSaveMode = false;
+	priv->rtllib->RfOffReason = 0;
+	priv->RFChangeInProgress = false;
+	priv->bHwRfOffAction = 0;
+	priv->SetRFPowerStateInProgress = false;
+	priv->rtllib->PowerSaveControl.bInactivePs = true;
+	priv->rtllib->PowerSaveControl.bIPSModeBackup = false;
+	priv->rtllib->PowerSaveControl.bLeisurePs = true;
+	priv->rtllib->PowerSaveControl.bFwCtrlLPS = false;
+	priv->rtllib->LPSDelayCnt = 0;
+        priv->rtllib->sta_sleep = 0;
+	priv->rtllib->eRFPowerState = eRfOn;
+
+	priv->txpower_checkcnt = 0;
+	priv->thermal_readback_index =0;
+	priv->txpower_tracking_callback_cnt = 0;
+	priv->ccktxpower_adjustcnt_ch14 = 0;
+	priv->ccktxpower_adjustcnt_not_ch14 = 0;
+
+#if defined RTL8192SE 
+	for(i = 0; i<PEER_MAX_ASSOC; i++){
+		priv->rtllib->peer_assoc_list[i]=NULL;
+		priv->rtllib->AvailableAIDTable[i] = 99; 
+	}
+	priv->RATRTableBitmap = 0;
+	priv->rtllib->amsdu_in_process = 0;
+#endif	
+	
+	rtl8192_init_aspm(dev);
+
+	priv->rtllib->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;	
+	priv->rtllib->iw_mode = IW_MODE_INFRA;
+	priv->rtllib->active_scan = 1;
+	priv->rtllib->be_scan_inprogress = false;
+	priv->rtllib->modulation = RTLLIB_CCK_MODULATION | RTLLIB_OFDM_MODULATION;
+	priv->rtllib->host_encrypt = 1;
+	priv->rtllib->host_decrypt = 1;
+
+	priv->rtllib->dot11PowerSaveMode = eActive;
+#if defined (RTL8192S_WAPI_SUPPORT)
+	priv->rtllib->wapiInfo.bWapiPSK = false;
+#endif
+	priv->rtllib->fts = DEFAULT_FRAG_THRESHOLD;
+	priv->rtllib->MaxMssDensity = 0;
+	priv->rtllib->MinSpaceCfg = 0;
+	
+	priv->card_type = PCI;
+
+#if defined RTL8192SE || defined RTL8192CE || defined RTL8192E	
+	pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_HALT_NIC;
+	pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_CLK_REQ;
+	pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_ASPM;
+	pPSC->RegRfPsLevel |= RT_RF_LPS_LEVEL_ASPM;
+
+	pPSC->RegMaxLPSAwakeIntvl = 5;
+#endif
+
+	priv->AcmControl = 0;	
+	priv->pFirmware = (rt_firmware*)vmalloc(sizeof(rt_firmware));
+	if (priv->pFirmware)
+	memset(priv->pFirmware, 0, sizeof(rt_firmware));
+
+        skb_queue_head_init(&priv->rx_queue);
+	skb_queue_head_init(&priv->skb_queue);
+
+	for(i = 0; i < MAX_QUEUE_SIZE; i++) {
+		skb_queue_head_init(&priv->rtllib->skb_waitQ [i]);
+	}
+	for(i = 0; i < MAX_QUEUE_SIZE; i++) {
+		skb_queue_head_init(&priv->rtllib->skb_aggQ [i]);
+	}
+
+}	
+
+static void rtl8192_init_priv_lock(struct r8192_priv* priv)
+{
+	spin_lock_init(&priv->fw_scan_lock);
+	spin_lock_init(&priv->tx_lock);
+	spin_lock_init(&priv->irq_lock);
+	spin_lock_init(&priv->irq_th_lock);
+	spin_lock_init(&priv->rf_ps_lock);
+	spin_lock_init(&priv->ps_lock);
+	spin_lock_init(&priv->rf_lock);
+	spin_lock_init(&priv->rt_h2c_lock);
+#ifdef CONFIG_ASPM_OR_D3
+	spin_lock_init(&priv->D3_lock);
+#endif
+	sema_init(&priv->wx_sem,1);
+	sema_init(&priv->rf_sem,1);
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,16))
+	sema_init(&priv->mutex, 1);
+#else
+	mutex_init(&priv->mutex);
+#endif
+}
+
+static void rtl8192_init_priv_task(struct net_device* dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);	
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)	
+#ifdef PF_SYNCTHREAD
+	priv->priv_wq = create_workqueue(DRV_NAME,0);
+#else	
+	priv->priv_wq = create_workqueue(DRV_NAME);
+#endif
+#endif
+	INIT_WORK_RSL(&priv->reset_wq,  (void*)rtl8192_restart, dev);
+#ifdef ENABLE_IPS
+	INIT_WORK_RSL(&priv->rtllib->ips_leave_wq, (void*)IPSLeave_wq, dev);  
+#endif
+	INIT_DELAYED_WORK_RSL(&priv->watch_dog_wq, (void*)rtl819x_watchdog_wqcallback, dev);
+	INIT_DELAYED_WORK_RSL(&priv->txpower_tracking_wq,  (void*)dm_txpower_trackingcallback, dev);
+	INIT_DELAYED_WORK_RSL(&priv->rfpath_check_wq,  (void*)dm_rf_pathcheck_workitemcallback, dev);
+	INIT_DELAYED_WORK_RSL(&priv->update_beacon_wq, (void*)rtl8192_update_beacon, dev);
+	INIT_WORK_RSL(&priv->qos_activate, (void*)rtl8192_qos_activate, dev);
+#ifndef RTL8190P	
+	INIT_DELAYED_WORK_RSL(&priv->rtllib->hw_wakeup_wq,(void*) rtl8192_hw_wakeup_wq, dev);
+	INIT_DELAYED_WORK_RSL(&priv->rtllib->hw_sleep_wq,(void*) rtl8192_hw_sleep_wq, dev);
+#endif
+#if defined RTL8192SE 
+	INIT_DELAYED_WORK_RSL(&priv->check_hw_scan_wq, (void*)rtl8192se_check_hw_scan, dev);
+	INIT_DELAYED_WORK_RSL(&priv->hw_scan_simu_wq, (void*)rtl8192se_hw_scan_simu, dev);
+	INIT_DELAYED_WORK_RSL(&priv->start_hw_scan_wq, (void*)rtl8192se_start_hw_scan, dev);
+	INIT_DELAYED_WORK_RSL(&priv->rtllib->check_tsf_wq,(void*)rtl8192se_check_tsf_wq, dev);
+	INIT_DELAYED_WORK_RSL(&priv->rtllib->update_assoc_sta_info_wq, 
+			(void*)rtl8192se_update_assoc_sta_info_wq, dev);
+#endif
+#ifdef _RTL8192_EXT_PATCH_
+	INIT_WORK_RSL(&priv->rtllib->ext_create_crypt_for_peers_wq, (void*)msh_create_crypt_for_peers_wq, dev);
+	INIT_WORK_RSL(&priv->rtllib->ext_path_sel_ops_wq,(void*) path_sel_ops_wq, dev);
+	INIT_WORK_RSL(&priv->rtllib->ext_update_extchnloffset_wq, 
+			(void*) meshdev_update_ext_chnl_offset_as_client, dev);
+	INIT_DELAYED_WORK_RSL(&priv->rtllib->ext_wx_set_key_wq, (void*)ext_mesh_set_key_wq,priv->rtllib);
+	INIT_WORK_RSL(&priv->rtllib->ext_start_mesh_protocol_wq, 
+			(void*) meshdev_start_mesh_protocol_wq, dev);
+#endif
+	tasklet_init(&priv->irq_rx_tasklet,
+	     (void(*)(unsigned long))rtl8192_irq_rx_tasklet,
+	     (unsigned long)priv);
+	tasklet_init(&priv->irq_tx_tasklet,
+	     (void(*)(unsigned long))rtl8192_irq_tx_tasklet,
+	     (unsigned long)priv);
+        tasklet_init(&priv->irq_prepare_beacon_tasklet,
+                (void(*)(unsigned long))rtl8192_prepare_beacon,
+                (unsigned long)priv);
+}
+
+short rtl8192_get_channel_map(struct net_device * dev)
+{
+	int i;
+
+#ifdef ENABLE_DOT11D
+	struct r8192_priv *priv = rtllib_priv(dev);
+	if ((priv->rf_chip != RF_8225) && (priv->rf_chip != RF_8256) 
+			&& (priv->rf_chip != RF_6052)) {
+		RT_TRACE(COMP_ERR, "%s: unknown rf chip, can't set channel map\n", __FUNCTION__);
+		return -1;
+	}
+		
+	if (priv->ChannelPlan > COUNTRY_CODE_MAX) {
+		printk("rtl819x_init:Error channel plan! Set to default.\n");
+		priv->ChannelPlan= COUNTRY_CODE_FCC;
+	}
+	RT_TRACE(COMP_INIT, "Channel plan is %d\n",priv->ChannelPlan);
+	Dot11d_Init(priv->rtllib);
+#ifndef CONFIG_CRDA
+	Dot11d_Channelmap(priv->ChannelPlan, priv->rtllib);
+#endif	
+#else
+	struct r8192_priv *priv = rtllib_priv(dev);
+	int ch;
+	if(!channels){
+		DMESG("No channels, aborting");
+		return -1;
+	}
+
+	ch = channels;
+	priv->ChannelPlan = 0;
+	for (i = 1; i <= 14; i++) {
+		(priv->rtllib->channel_map)[i] = (u8)(ch & 0x01);
+		ch >>= 1;
+	}
+	priv->rtllib->IbssStartChnl= 10;
+	priv->rtllib->ibss_maxjoin_chal = 11;
+#endif
+	for (i = 1; i <= 11; i++) {
+		(priv->rtllib->active_channel_map)[i] = 1;
+	}
+	(priv->rtllib->active_channel_map)[12] = 2;
+	(priv->rtllib->active_channel_map)[13] = 2;
+	
+	return 0;
+}
+
+short rtl8192_init(struct net_device *dev)
+{		
+	struct r8192_priv *priv = rtllib_priv(dev);
+
+	memset(&(priv->stats),0,sizeof(struct Stats));
+#ifdef CONFIG_MP
+	rtl8192_init_mp(dev);
+#endif	
+	
+	rtl8192_init_priv_handler(dev);
+	rtl8192_init_priv_variable(dev);
+#ifdef _RTL8192_EXT_PATCH_
+	rtl8192_init_mesh_variable(dev);
+#endif
+	rtl8192_init_priv_lock(priv);
+	rtl8192_init_priv_task(dev);
+	priv->ops->get_eeprom_size(dev);
+	priv->ops->init_adapter_variable(dev);
+	rtl8192_get_channel_map(dev);
+
+#ifdef CONFIG_CFG_80211
+	/* channel map setting for the cfg80211 style */
+	{
+		struct r8192_priv* priv = rtllib_priv(dev);
+		rtllib_set_geo(priv);	
+	}
+#endif
+
+	init_hal_dm(dev);
+
+#if defined RTL8192SE || defined RTL8192CE
+	InitSwLeds(dev);
+#endif
+	setup_timer(&priv->watch_dog_timer,
+		    watch_dog_timer_callback, 
+		    (unsigned long) dev);
+
+	setup_timer(&priv->gpio_polling_timer, 
+		    check_rfctrl_gpio_timer,
+		    (unsigned long)dev);
+
+	rtl8192_irq_disable(dev);
+#if defined(IRQF_SHARED)
+        if (request_irq(dev->irq, (void*)rtl8192_interrupt_rsl, IRQF_SHARED, dev->name, dev)) 
+#else
+        if (request_irq(dev->irq, (void *)rtl8192_interrupt_rsl, SA_SHIRQ, dev->name, dev)) 
+#endif
+	{
+		printk("Error allocating IRQ %d",dev->irq);
+		return -1;
+	} else { 
+		priv->irq=dev->irq;
+		RT_TRACE(COMP_INIT, "IRQ %d\n",dev->irq);
+	}
+
+	if (rtl8192_pci_initdescring(dev) != 0) { 
+		printk("Endopoints initialization failed");
+		return -1;
+	}
+
+	return 0;
+}
+
+#ifdef RTL8192CE
+static void
+rtl8192_update_default_setting(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+#ifdef CONFIG_ASPM_OR_D3
+	PRT_POWER_SAVE_CONTROL	pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
+#endif
+
+	priv->RegPciASPM = 3; 
+
+	priv->RegHwSwRfOffD3 = 0; 
+	
+	priv->RegSupportPciASPM = true;
+	
+	pPSC->RegRfPsLevel = 0;
+	priv->bSupportASPM = 0;
+
+
+	switch(priv->RegPciASPM)
+	{
+	case 0: 
+		break;
+		
+	case 1: 
+		pPSC->RegRfPsLevel |= RT_RF_LPS_LEVEL_ASPM;
+		break;
+
+	case 2: 
+		pPSC->RegRfPsLevel |= (RT_RF_LPS_LEVEL_ASPM | RT_RF_OFF_LEVL_CLK_REQ);
+		break;
+
+	case 3: 
+		pPSC->RegRfPsLevel &= ~(RT_RF_LPS_LEVEL_ASPM);
+		pPSC->RegRfPsLevel |= (RT_RF_PS_LEVEL_ALWAYS_ASPM | RT_RF_OFF_LEVL_CLK_REQ);
+		break;
+
+	case 4: 
+		pPSC->RegRfPsLevel &= ~(RT_RF_LPS_LEVEL_ASPM | RT_RF_OFF_LEVL_CLK_REQ);
+		pPSC->RegRfPsLevel |= RT_RF_PS_LEVEL_ALWAYS_ASPM;
+		break;
+	}
+
+	pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_HALT_NIC;
+
+	switch(priv->RegHwSwRfOffD3)
+	{
+	case 1:
+		if(pPSC->RegRfPsLevel & RT_RF_LPS_LEVEL_ASPM)
+			pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_ASPM;
+		break;
+
+	case 2:
+		if(pPSC->RegRfPsLevel & RT_RF_LPS_LEVEL_ASPM)
+			pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_ASPM;
+		pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_HALT_NIC;
+		break;
+
+	case 3:
+		pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_PCI_D3;
+		break;
+	}
+
+
+	switch(priv->RegSupportPciASPM)
+	{
+	case 0: 
+		{
+			bool		bSupportASPM = false;
+			priv->bSupportASPM = bSupportASPM;
+		}
+		break;
+
+	case 1: 
+		{
+			bool		bSupportASPM = true;
+			priv->bSupportASPM = bSupportASPM;
+		}
+		break;
+
+	case 2: 
+		if(priv->pci_bridge_vendor == PCI_BRIDGE_VENDOR_INTEL)
+		{
+			bool		bSupportASPM = true;
+			priv->bSupportASPM = bSupportASPM;
+		}
+		break;
+		
+	default:
+		break;
+	}
+}
+#endif
+
+#if defined CONFIG_ASPM_OR_D3
+static void
+rtl8192_initialize_adapter_common(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+#ifdef CONFIG_ASPM_OR_D3
+	PRT_POWER_SAVE_CONTROL	pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
+#endif
+
+#ifdef RTL8192CE
+	rtl8192_update_default_setting(dev);
+#endif
+
+#ifdef CONFIG_ASPM_OR_D3
+	if(pPSC->RegRfPsLevel & RT_RF_PS_LEVEL_ALWAYS_ASPM)
+	{
+		RT_ENABLE_ASPM(dev);
+		RT_SET_PS_LEVEL(pPSC, RT_RF_PS_LEVEL_ALWAYS_ASPM);
+	}
+#endif
+}
+#endif
+
+/***************************************************************************
+    -------------------------------WATCHDOG STUFF---------------------------
+***************************************************************************/
+short rtl8192_is_tx_queue_empty(struct net_device *dev)
+{
+	int i=0;
+	struct r8192_priv *priv = rtllib_priv(dev);
+	for (i=0; i<=MGNT_QUEUE; i++)
+	{
+		if ((i== TXCMD_QUEUE) || (i == HCCA_QUEUE) )
+			continue;
+		if (skb_queue_len(&(&priv->tx_ring[i])->queue) > 0){
+			printk("===>tx queue is not empty:%d, %d\n", i, skb_queue_len(&(&priv->tx_ring[i])->queue));
+			return 0;
+		}
+	}
+	return 1;
+}
+
+RESET_TYPE
+rtl819x_TxCheckStuck(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u8			QueueID;
+	u8			ResetThreshold = NIC_SEND_HANG_THRESHOLD_POWERSAVE;
+	bool			bCheckFwTxCnt = false;
+	struct rtl8192_tx_ring  *ring = NULL;
+	struct sk_buff* skb = NULL;
+	cb_desc * tcb_desc = NULL;
+	unsigned long flags = 0;
+	
+#if 0
+	switch (priv->rtllib->dot11PowerSaveMode)
+	{
+		case eActive:		
+			ResetThreshold = NIC_SEND_HANG_THRESHOLD_NORMAL;
+			break;
+		case eMaxPs:		
+			ResetThreshold = NIC_SEND_HANG_THRESHOLD_POWERSAVE;
+			break;
+		case eFastPs:	
+			ResetThreshold = NIC_SEND_HANG_THRESHOLD_POWERSAVE;
+			break;
+		default:
+			break;
+	}
+#else
+	switch (priv->rtllib->ps)
+	{
+		case RTLLIB_PS_DISABLED:		
+			ResetThreshold = NIC_SEND_HANG_THRESHOLD_NORMAL;
+			break;
+		case (RTLLIB_PS_MBCAST|RTLLIB_PS_UNICAST):		
+			ResetThreshold = NIC_SEND_HANG_THRESHOLD_POWERSAVE;
+			break;
+		default:
+			ResetThreshold = NIC_SEND_HANG_THRESHOLD_POWERSAVE;
+			break;
+	}
+#endif
+	spin_lock_irqsave(&priv->irq_th_lock,flags);
+	for(QueueID = 0; QueueID < MAX_TX_QUEUE; QueueID++)
+	{
+
+	
+		if(QueueID == TXCMD_QUEUE)
+			continue;
+#ifdef RTL8192CE
+		if((QueueID == 8) || (QueueID == 5))
+			continue;
+#endif
+
+		ring = &priv->tx_ring[QueueID];
+
+		if(skb_queue_len(&ring->queue) == 0)
+			continue;
+		else
+		{
+			skb = (&ring->queue)->next;
+			tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
+			tcb_desc->nStuckCount++;
+			bCheckFwTxCnt = true;
+#if defined RTL8192SE || defined RTL8192CE
+			if(tcb_desc->nStuckCount > ResetThreshold)
+			{
+				RT_TRACE( COMP_RESET, "TxCheckStuck(): Need silent reset because nStuckCount > ResetThreshold.\n" );
+                                spin_unlock_irqrestore(&priv->irq_th_lock,flags);				
+				return RESET_TYPE_SILENT;
+			}
+			bCheckFwTxCnt = false;
+			#endif
+		}
+	}
+	spin_unlock_irqrestore(&priv->irq_th_lock,flags);
+	
+	if(bCheckFwTxCnt) {
+		if (priv->ops->TxCheckStuckHandler(dev))
+		{
+			RT_TRACE(COMP_RESET, "TxCheckStuck(): Fw indicates no Tx condition! \n");
+			return RESET_TYPE_SILENT;
+		}
+	}
+
+	return RESET_TYPE_NORESET;
+}
+
+RESET_TYPE rtl819x_RxCheckStuck(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+
+	if(priv->ops->RxCheckStuckHandler(dev))
+	{
+		RT_TRACE(COMP_RESET, "RxStuck Condition\n");
+		return RESET_TYPE_SILENT;
+	}
+	
+	return RESET_TYPE_NORESET;
+}
+
+RESET_TYPE
+rtl819x_ifcheck_resetornot(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	RESET_TYPE	TxResetType = RESET_TYPE_NORESET;
+	RESET_TYPE	RxResetType = RESET_TYPE_NORESET;
+	RT_RF_POWER_STATE 	rfState;
+	
+	rfState = priv->rtllib->eRFPowerState;
+	
+	if(rfState == eRfOn)
+		TxResetType = rtl819x_TxCheckStuck(dev);
+	
+	if( rfState == eRfOn && 
+	    (priv->rtllib->iw_mode == IW_MODE_INFRA) && 
+	    (priv->rtllib->state == RTLLIB_LINKED)) {
+
+		RxResetType = rtl819x_RxCheckStuck(dev);
+	}
+	
+	RT_TRACE(COMP_RESET,"%s(): TxResetType is %d, RxResetType is %d\n",__FUNCTION__,TxResetType,RxResetType);
+	if(TxResetType==RESET_TYPE_NORMAL || RxResetType==RESET_TYPE_NORMAL){
+		printk("%s(): TxResetType is %d, RxResetType is %d\n",__FUNCTION__,TxResetType,RxResetType);
+		return RESET_TYPE_NORMAL;
+	} else if(TxResetType==RESET_TYPE_SILENT || RxResetType==RESET_TYPE_SILENT){
+		printk("%s(): TxResetType is %d, RxResetType is %d\n",__FUNCTION__,TxResetType,RxResetType);
+		return RESET_TYPE_SILENT;
+	} else {
+		return RESET_TYPE_NORESET;
+	}
+
+}
+
+void rtl819x_ifsilentreset(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u8	reset_times = 0;
+	int reset_status = 0;
+	struct rtllib_device *ieee = priv->rtllib;
+	unsigned long flag;
+#ifdef _RTL8192_EXT_PATCH_
+	bool wlansilentreset = false,meshsilentreset = false;
+	u8 backup_channel_wlan = 1,backup_channel_mesh = 1;
+	u8 updateBW = 0;
+	u8 bserverHT = 0;
+	int i=0;
+	u8 IsPortal = 0;
+#endif	
+		
+	if(priv->ResetProgress==RESET_TYPE_NORESET) {
+
+		RT_TRACE(COMP_RESET,"=========>Reset progress!! \n");
+		
+		priv->ResetProgress = RESET_TYPE_SILENT;
+		spin_lock_irqsave(&priv->rf_ps_lock,flag);
+		if(priv->RFChangeInProgress)
+		{
+			spin_unlock_irqrestore(&priv->rf_ps_lock,flag);
+			goto END;
+		}
+		priv->RFChangeInProgress = true;
+		priv->bResetInProgress = true;
+		spin_unlock_irqrestore(&priv->rf_ps_lock,flag);
+RESET_START:	
+		down(&priv->wx_sem);	
+#ifdef ENABLE_LPS
+		if(priv->rtllib->state == RTLLIB_LINKED)
+			LeisurePSLeave(dev);
+#endif
+		if(IS_NIC_DOWN(priv))
+		{
+			RT_TRACE(COMP_ERR,"%s():the driver is not up! return\n",__FUNCTION__);
+			up(&priv->wx_sem);
+			return ;
+		}
+#ifdef _RTL8192_EXT_PATCH_
+		if(priv->up == 1)
+		{
+			printk("================>wlansilentreset is true\n");
+			wlansilentreset = true;
+			priv->up = 0;
+		}
+		if(priv->mesh_up == 1)
+		{
+			printk("================>meshsilentreset is true\n");
+			meshsilentreset = true;
+			priv->mesh_up = 0;
+		}
+#else
+		priv->up = 0;
+#endif
+		RT_TRACE(COMP_RESET,"%s():======>start to down the driver\n",__FUNCTION__);
+		mdelay(1000);
+		RT_TRACE(COMP_RESET,"%s():111111111111111111111111======>start to down the driver\n",__FUNCTION__);
+		if(!netif_queue_stopped(dev))
+			netif_stop_queue(dev);
+#if !(defined RTL8192SE || defined RTL8192CE)
+		dm_backup_dynamic_mechanism_state(dev);
+#endif
+		rtl8192_irq_disable(dev);
+		del_timer_sync(&priv->watch_dog_timer);	
+		rtl8192_cancel_deferred_work(priv);
+		deinit_hal_dm(dev);
+		rtllib_stop_scan_syncro(ieee);
+#ifdef _RTL8192_EXT_PATCH_
+		backup_channel_wlan = ieee->current_network.channel;
+		backup_channel_mesh = ieee->current_mesh_network.channel;
+		if((ieee->state == RTLLIB_LINKED) && ((ieee->iw_mode == IW_MODE_INFRA) || (ieee->iw_mode == IW_MODE_ADHOC)))
+		{
+			printk("====>down, infra or adhoc\n");
+			SEM_DOWN_IEEE_WX(&ieee->wx_sem);
+			printk("ieee->state is RTLLIB_LINKED\n");
+			rtllib_stop_send_beacons(priv->rtllib);
+			del_timer_sync(&ieee->associate_timer);
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)	
+			cancel_delayed_work(&ieee->associate_retry_wq);	
+#endif	
+			rtllib_stop_scan(ieee);
+			netif_carrier_off(dev);
+			SEM_UP_IEEE_WX(&ieee->wx_sem);
+		}
+		else if((ieee->iw_mode == IW_MODE_MESH) && (ieee->mesh_state == RTLLIB_MESH_LINKED))
+		{
+			if(priv->mshobj->ext_patch_r819x_wx_get_AsPortal)
+				priv->mshobj->ext_patch_r819x_wx_get_AsPortal(priv, &IsPortal);
+			if((!ieee->only_mesh) && (ieee->state == RTLLIB_LINKED)){
+				printk("====>down, wlan server\n");
+				SEM_DOWN_IEEE_WX(&ieee->wx_sem);
+				printk("ieee->state is RTLLIB_LINKED\n");
+				rtllib_stop_send_beacons(priv->rtllib);
+				del_timer_sync(&ieee->associate_timer);
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)	
+				cancel_delayed_work(&ieee->associate_retry_wq);	
+#endif	
+				rtllib_stop_scan(ieee);
+				netif_carrier_off(dev);
+				SEM_UP_IEEE_WX(&ieee->wx_sem);
+				if(priv->mshobj->ext_patch_rtllib_stop_protocol)
+					priv->mshobj->ext_patch_rtllib_stop_protocol(ieee,1);
+			}
+			else if((!ieee->only_mesh) && (ieee->state != RTLLIB_LINKED)){
+				printk("====>down, wlan server\n");
+				SEM_DOWN_IEEE_WX(&ieee->wx_sem);
+				printk("ieee->state is Not RTLLIB_LINKED\n");
+				rtllib_stop_send_beacons(priv->rtllib);
+				rtllib_stop_scan(ieee);
+				netif_carrier_off(dev);
+				SEM_UP_IEEE_WX(&ieee->wx_sem);
+				if(priv->mshobj->ext_patch_rtllib_stop_protocol)
+					priv->mshobj->ext_patch_rtllib_stop_protocol(ieee,1);
+			}
+			else if(ieee->only_mesh && IsPortal)
+			{
+				printk("====>down, eth0 server\n");
+				if(priv->mshobj->ext_patch_rtllib_stop_protocol)
+					priv->mshobj->ext_patch_rtllib_stop_protocol(ieee,1);
+			}
+			else if(ieee->only_mesh && !IsPortal)
+			{
+				printk("====>down, p2p or client\n");
+				if(priv->mshobj->ext_patch_rtllib_stop_protocol)
+					priv->mshobj->ext_patch_rtllib_stop_protocol(ieee,1);
+			}
+			else{
+				printk("====>down, no link\n");
+				if(priv->mshobj->ext_patch_rtllib_stop_protocol)
+					priv->mshobj->ext_patch_rtllib_stop_protocol(ieee,1);
+			}
+		}
+		else{
+			printk("====>down, no link\n");
+			printk("ieee->state is NOT LINKED\n");
+			rtllib_softmac_stop_protocol(priv->rtllib,0,true);		
+		}
+#else
+		if(ieee->state == RTLLIB_LINKED)
+		{
+			SEM_DOWN_IEEE_WX(&ieee->wx_sem);
+			printk("ieee->state is RTLLIB_LINKED\n");
+			rtllib_stop_send_beacons(priv->rtllib);
+			del_timer_sync(&ieee->associate_timer);
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)	
+			cancel_delayed_work(&ieee->associate_retry_wq);	
+#endif	
+			rtllib_stop_scan(ieee);
+			netif_carrier_off(dev);
+			SEM_UP_IEEE_WX(&ieee->wx_sem);
+		}
+		else{
+			printk("ieee->state is NOT LINKED\n");
+			rtllib_softmac_stop_protocol(priv->rtllib,true);		
+		}
+#endif
+#ifdef RTL8190P
+		priv->ops->stop_adapter(dev, true);
+#endif
+		up(&priv->wx_sem);
+		RT_TRACE(COMP_RESET,"%s():<==========down process is finished\n",__FUNCTION__);	
+		RT_TRACE(COMP_RESET,"%s():===========>start to up the driver\n",__FUNCTION__);
+#ifdef _RTL8192_EXT_PATCH_
+		if(wlansilentreset == true){
+			reset_status = _rtl8192_up(dev,true);
+		}
+		if(meshsilentreset == true)
+			reset_status = meshdev_up(ieee->meshdev,true);
+#else
+		reset_status = _rtl8192_up(dev,true);
+#endif		
+		RT_TRACE(COMP_RESET,"%s():<===========up process is finished\n",__FUNCTION__);
+		if(reset_status == -1)
+		{
+			if(reset_times < 3)
+			{
+				reset_times++;
+				goto RESET_START;
+			}
+			else
+			{
+				RT_TRACE(COMP_ERR," ERR!!! %s():  Reset Failed!!\n",__FUNCTION__);
+			}
+		}
+		ieee->is_silent_reset = 1;
+		spin_lock_irqsave(&priv->rf_ps_lock,flag);
+		priv->RFChangeInProgress = false;
+		spin_unlock_irqrestore(&priv->rf_ps_lock,flag);
+		EnableHWSecurityConfig8192(dev);
+#ifdef _RTL8192_EXT_PATCH_
+		ieee->current_network.channel = backup_channel_wlan;
+		ieee->current_mesh_network.channel = backup_channel_mesh;
+#endif
+		if(ieee->state == RTLLIB_LINKED && ieee->iw_mode == IW_MODE_INFRA)
+		{
+			ieee->set_chan(ieee->dev, ieee->current_network.channel);
+		
+			queue_work_rsl(ieee->wq, &ieee->associate_complete_wq);
+	
+		}
+		else if(ieee->state == RTLLIB_LINKED && ieee->iw_mode == IW_MODE_ADHOC)
+		{
+			ieee->set_chan(ieee->dev, ieee->current_network.channel);
+			ieee->link_change(ieee->dev);
+	
+			notify_wx_assoc_event(ieee);
+	
+			rtllib_start_send_beacons(ieee);
+	
+			if (ieee->data_hard_resume)
+				ieee->data_hard_resume(ieee->dev);
+			netif_carrier_on(ieee->dev);
+		}
+#ifdef _RTL8192_EXT_PATCH_
+		else if (ieee->iw_mode == IW_MODE_MESH) 
+		{
+			if(!ieee->only_mesh) 
+			{	
+				printk("===>up, wlan0 server\n");
+				ieee->set_chan(ieee->dev, ieee->current_network.channel);
+			
+				queue_work_rsl(ieee->wq, &ieee->associate_complete_wq);
+				if (ieee->current_mesh_network.beacon_interval == 0)
+					ieee->current_mesh_network.beacon_interval = 100;
+				ieee->mesh_state = RTLLIB_MESH_LINKED;
+				ieee->link_change(ieee->dev);
+				if(priv->mshobj->ext_patch_rtllib_start_protocol)
+					priv->mshobj->ext_patch_rtllib_start_protocol(ieee);
+			}
+			else if(ieee->only_mesh && IsPortal)
+			{
+				printk("===>up, eth0 server\n");
+				if (ieee->current_mesh_network.beacon_interval == 0)
+					ieee->current_mesh_network.beacon_interval = 100;
+				ieee->mesh_state = RTLLIB_MESH_LINKED;
+				ieee->link_change(ieee->dev);
+				if(priv->mshobj->ext_patch_rtllib_start_protocol)
+					priv->mshobj->ext_patch_rtllib_start_protocol(ieee);
+				ieee->current_network.channel = ieee->current_mesh_network.channel; 
+				if(ieee->pHTInfo->bCurBW40MHz)
+					HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20_40, (ieee->current_mesh_network.channel<=6)?HT_EXTCHNL_OFFSET_UPPER:HT_EXTCHNL_OFFSET_LOWER);  
+				else
+					HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20, (ieee->current_mesh_network.channel<=6)?HT_EXTCHNL_OFFSET_UPPER:HT_EXTCHNL_OFFSET_LOWER);  
+			}
+			else if(ieee->only_mesh && !IsPortal)
+			{
+				printk("===>up, p2p or client\n");
+				if (ieee->current_mesh_network.beacon_interval == 0)
+					ieee->current_mesh_network.beacon_interval = 100;
+				ieee->mesh_state = RTLLIB_MESH_LINKED;
+				ieee->link_change(ieee->dev);
+				if(priv->mshobj->ext_patch_rtllib_start_protocol)
+					priv->mshobj->ext_patch_rtllib_start_protocol(ieee);
+				if(ieee->p2pmode){
+					printk("===>up, p2p\n");
+					ieee->current_network.channel = ieee->current_mesh_network.channel; 
+					if(ieee->pHTInfo->bCurBW40MHz)
+						HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20_40, (ieee->current_mesh_network.channel<=6)?HT_EXTCHNL_OFFSET_UPPER:HT_EXTCHNL_OFFSET_LOWER);  
+					else
+						HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20, (ieee->current_mesh_network.channel<=6)?HT_EXTCHNL_OFFSET_UPPER:HT_EXTCHNL_OFFSET_LOWER);  
+				}else{
+					printk("===>up, client\n");
+					updateBW = priv->mshobj->ext_patch_r819x_wx_update_beacon(ieee->dev,&bserverHT);
+					printk("$$$$$$ Cur_networ.chan=%d, cur_mesh_net.chan=%d,bserverHT=%d\n",
+					ieee->current_network.channel,ieee->current_mesh_network.channel,bserverHT);
+					if (updateBW == 1) {
+						if (bserverHT == 0) {
+							printk("===>server is not HT supported,set 20M\n");
+							HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20, HT_EXTCHNL_OFFSET_NO_EXT);  
+						} else {
+							printk("===>updateBW is 1,bCurBW40MHz is %d,ieee->serverExtChlOffset is %d\n",
+									ieee->pHTInfo->bCurBW40MHz,ieee->serverExtChlOffset);
+							if (ieee->pHTInfo->bCurBW40MHz)
+								HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20_40, ieee->serverExtChlOffset);  
+							else
+								HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20, ieee->serverExtChlOffset);  
+						}
+					} else {
+						printk("===>there is no same hostname server, ERR!!!\n");
+					}
+				}
+			}
+				
+		}
+#endif
+#ifdef TO_DO_LIST
+		else if(Adapter->MgntInfo.mActingAsAp)
+		{
+			AP_StartApRequest((PVOID)Adapter);
+			Adapter->HalFunc.ResetHalRATRTableHandler(Adapter);
+		}
+#endif
+		
+#ifdef TO_DO_LIST
+		if(Adapter->MgntInfo.mActingAsAp)
+			AP_CamRestoreAllEntry(Adapter);
+		else
+#endif
+#ifdef _RTL8192_EXT_PATCH_
+		if(wlansilentreset){
+			printk("==========>wlansilentreset\n");
+			CamRestoreEachIFEntry(dev,0);
+		}
+		if(meshsilentreset){
+			printk("==========>meshsilentreset\n");
+			CamRestoreEachIFEntry(dev,1);
+			for(i=0;i<8;i++)
+			{
+				if(ieee->swmeshratrtable[i].bused == true)
+				{
+					printk("====>restore ratr table: index=%d,value=%x\n",i,ieee->swmeshratrtable[i].ratr_value);
+					write_nic_dword(dev,ARFR0+i*4,ieee->swmeshratrtable[i].ratr_value);
+				}
+			}
+		}
+#else
+		CamRestoreAllEntry(dev);
+#endif
+#if !(defined RTL8192SE || defined RTL8192CE)
+		dm_restore_dynamic_mechanism_state(dev);
+#endif
+END:
+		priv->ResetProgress = RESET_TYPE_NORESET;
+		priv->reset_count++;
+
+		priv->bForcedSilentReset =false;
+		priv->bResetInProgress = false;
+
+#ifdef RTL8190P
+		write_nic_byte(dev, UFWP, 1);	
+#endif
+		RT_TRACE(COMP_RESET, "Reset finished!! ====>[%d]\n", priv->reset_count);
+	}
+}
+
+void rtl819x_update_rxcounts(struct r8192_priv *priv,
+			     u32 *TotalRxBcnNum,
+			     u32 *TotalRxDataNum)	
+{
+	u16 			SlotIndex;
+	u8			i;
+
+	*TotalRxBcnNum = 0;
+	*TotalRxDataNum = 0;
+
+	SlotIndex = (priv->rtllib->LinkDetectInfo.SlotIndex++)%(priv->rtllib->LinkDetectInfo.SlotNum);
+	priv->rtllib->LinkDetectInfo.RxBcnNum[SlotIndex] = priv->rtllib->LinkDetectInfo.NumRecvBcnInPeriod;
+	priv->rtllib->LinkDetectInfo.RxDataNum[SlotIndex] = priv->rtllib->LinkDetectInfo.NumRecvDataInPeriod;
+	for (i = 0; i < priv->rtllib->LinkDetectInfo.SlotNum; i++) {	
+		*TotalRxBcnNum += priv->rtllib->LinkDetectInfo.RxBcnNum[i];
+		*TotalRxDataNum += priv->rtllib->LinkDetectInfo.RxDataNum[i];
+	}
+}
+
+
+void	rtl819x_watchdog_wqcallback(void *data)
+{
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
+	struct r8192_priv *priv = container_of_dwork_rsl(data,struct r8192_priv,watch_dog_wq);
+	struct net_device *dev = priv->rtllib->dev;
+#else
+	struct net_device *dev = (struct net_device *)data;
+	struct r8192_priv *priv = rtllib_priv(dev);
+#endif
+	struct rtllib_device* ieee = priv->rtllib;
+	RESET_TYPE	ResetType = RESET_TYPE_NORESET;
+	static u8	check_reset_cnt = 0;
+#ifdef _RTL8192_EXT_PATCH_
+	static u8	last_reset_count = 0;
+#endif
+	unsigned long flags;
+	PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
+	bool bBusyTraffic = false;
+#ifdef ENABLE_LPS
+	bool bEnterPS = false;
+#endif
+	if(IS_NIC_DOWN(priv) || (priv->bHwRadioOff == true))
+		return;
+
+	if(priv->rtllib->state >= RTLLIB_LINKED)
+	{
+		if(priv->rtllib->CntAfterLink<2)
+			priv->rtllib->CntAfterLink++;
+	}
+	else
+	{
+		priv->rtllib->CntAfterLink = 0;
+	}
+	
+	hal_dm_watchdog(dev);
+
+#ifdef ENABLE_IPS
+	if(rtllib_act_scanning(priv->rtllib,false) == false){
+		if((ieee->iw_mode == IW_MODE_INFRA) && (ieee->state == RTLLIB_NOLINK) &&\
+		    (ieee->eRFPowerState == eRfOn)&&!ieee->is_set_key &&\
+		    (!ieee->proto_stoppping) && !ieee->wx_set_enc
+#ifdef CONFIG_RTLWIFI_DEBUGFS	    
+		    && (!priv->debug->hw_holding)
+#endif		    
+		 ){
+			if((ieee->PowerSaveControl.ReturnPoint == IPS_CALLBACK_NONE)&& 
+			    (!ieee->bNetPromiscuousMode))
+			{
+				RT_TRACE(COMP_PS, "====================>haha:IPSEnter()\n");
+				IPSEnter(dev);	
+			}
+		}
+	}
+#endif
+#ifdef _RTL8192_EXT_PATCH_
+	MgntLinkKeepAlive(priv);
+#endif
+	{
+		if((ieee->state == RTLLIB_LINKED) && (ieee->iw_mode == IW_MODE_INFRA) && (!ieee->bNetPromiscuousMode))
+		{
+			if(	ieee->LinkDetectInfo.NumRxOkInPeriod> 100 ||
+				ieee->LinkDetectInfo.NumTxOkInPeriod> 100 ) {
+				bBusyTraffic = true;
+			}
+			
+#ifdef ENABLE_LPS
+			if(	((ieee->LinkDetectInfo.NumRxUnicastOkInPeriod + ieee->LinkDetectInfo.NumTxOkInPeriod) > 8 ) ||
+				(ieee->LinkDetectInfo.NumRxUnicastOkInPeriod > 2) )
+			{
+				bEnterPS= false;
+			}
+			else
+			{
+				bEnterPS= true;
+			}
+
+			if (ieee->current_network.beacon_interval < 95)
+				bEnterPS= false;
+
+			if(bEnterPS)
+			{
+				LeisurePSEnter(dev);
+			}
+			else
+			{
+				LeisurePSLeave(dev);
+			}
+#endif
+		
+		}
+		else
+		{
+#ifdef ENABLE_LPS
+			RT_TRACE(COMP_LPS,"====>no link LPS leave\n");
+			LeisurePSLeave(dev);
+#endif
+		}
+
+	       ieee->LinkDetectInfo.NumRxOkInPeriod = 0;
+	       ieee->LinkDetectInfo.NumTxOkInPeriod = 0;
+	       ieee->LinkDetectInfo.NumRxUnicastOkInPeriod = 0;
+	       ieee->LinkDetectInfo.bBusyTraffic = bBusyTraffic;
+	}
+
+	{
+#if defined RTL8192SE 
+		if(priv->rtllib->iw_mode == IW_MODE_ADHOC)
+			IbssAgeFunction(ieee);
+#endif
+			
+		if(ieee->state == RTLLIB_LINKED && ieee->iw_mode == IW_MODE_INFRA)
+		{
+			u32	TotalRxBcnNum = 0;
+			u32	TotalRxDataNum = 0;	
+
+			rtl819x_update_rxcounts(priv, &TotalRxBcnNum, &TotalRxDataNum);
+
+			if((TotalRxBcnNum+TotalRxDataNum) == 0)
+				priv->check_roaming_cnt ++;
+			else
+				priv->check_roaming_cnt = 0;
+
+
+			if(priv->check_roaming_cnt > 0)
+			{
+				if( ieee->eRFPowerState == eRfOff)
+					RT_TRACE(COMP_ERR,"========>%s()\n",__FUNCTION__);
+
+				printk("===>%s(): AP is power off,chan:%d, connect another one\n",__FUNCTION__, priv->chan);
+
+				ieee->state = RTLLIB_ASSOCIATING;
+
+#if defined(RTL8192S_WAPI_SUPPORT)				
+				if ((ieee->WapiSupport) && (ieee->wapiInfo.bWapiEnable))
+					WapiReturnOneStaInfo(ieee,priv->rtllib->current_network.bssid,0);
+#endif
+				RemovePeerTS(priv->rtllib,priv->rtllib->current_network.bssid);
+				ieee->is_roaming = true;
+				ieee->is_set_key = false;
+                                ieee->link_change(dev);
+			        if(ieee->LedControlHandler)
+				   ieee->LedControlHandler(ieee->dev, LED_CTL_START_TO_LINK); 
+
+				notify_wx_assoc_event(ieee); 
+
+				queue_delayed_work_rsl(ieee->wq, &ieee->associate_procedure_wq, 0);
+
+				priv->check_roaming_cnt = 0;
+			}
+		}
+	      ieee->LinkDetectInfo.NumRecvBcnInPeriod=0;
+              ieee->LinkDetectInfo.NumRecvDataInPeriod=0;
+		
+	}
+
+	spin_lock_irqsave(&priv->tx_lock,flags);
+	if((check_reset_cnt++ >= 3) && (!ieee->is_roaming) && 
+			(!priv->RFChangeInProgress) && (!pPSC->bSwRfProcessing))
+	{
+    		ResetType = rtl819x_ifcheck_resetornot(dev);
+#ifdef _RTL8192_EXT_PATCH_
+		if(check_reset_cnt == 0xFF)
+#endif
+		check_reset_cnt = 3;
+	}
+	spin_unlock_irqrestore(&priv->tx_lock,flags);
+	
+	if(!priv->bDisableNormalResetCheck && ResetType == RESET_TYPE_NORMAL)
+	{
+		priv->ResetProgress = RESET_TYPE_NORMAL;
+		RT_TRACE(COMP_RESET,"%s(): NOMAL RESET\n",__FUNCTION__);
+		return;
+	}
+
+#ifdef _RTL8192_EXT_PATCH_
+	if( ((priv->force_reset) || (!priv->bDisableNormalResetCheck && ResetType==RESET_TYPE_SILENT))) 
+	{
+			if((check_reset_cnt != (last_reset_count + 1)) && !priv->force_reset){
+				printk("=======================>%s: Resume firmware\n", __FUNCTION__);
+				r8192se_resume_firm(dev);	
+				last_reset_count = check_reset_cnt;
+			}else{
+				printk("=======================>%s: Silent Reset\n", __FUNCTION__);
+				rtl819x_ifsilentreset(dev);
+			}
+	}
+#else
+	if( ((priv->force_reset) || (!priv->bDisableNormalResetCheck && ResetType==RESET_TYPE_SILENT))) 
+	{
+		rtl819x_ifsilentreset(dev);
+	}
+#endif
+	priv->force_reset = false;
+	priv->bForcedSilentReset = false;
+	priv->bResetInProgress = false;
+	RT_TRACE(COMP_TRACE, " <==RtUsbCheckForHangWorkItemCallback()\n");
+	
+}
+
+void watch_dog_timer_callback(unsigned long data)
+{
+	struct r8192_priv *priv = rtllib_priv((struct net_device *) data);
+	queue_delayed_work_rsl(priv->priv_wq,&priv->watch_dog_wq,0);
+	mod_timer(&priv->watch_dog_timer, jiffies + MSECS(RTLLIB_WATCH_DOG_TIME));
+}
+
+/****************************************************************************
+ ---------------------------- NIC TX/RX STUFF---------------------------
+*****************************************************************************/
+void rtl8192_rx_enable(struct net_device *dev)
+{
+    struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	priv->ops->rx_enable(dev);
+}
+
+void rtl8192_tx_enable(struct net_device *dev)
+{
+    struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	
+	priv->ops->tx_enable(dev);
+
+    rtllib_reset_queue(priv->rtllib);
+}
+
+
+static void rtl8192_free_rx_ring(struct net_device *dev)
+{
+    struct r8192_priv *priv = rtllib_priv(dev);
+    	int i,rx_queue_idx;
+
+	for(rx_queue_idx = 0; rx_queue_idx < MAX_RX_QUEUE; rx_queue_idx ++){
+    for (i = 0; i < priv->rxringcount; i++) {
+        		struct sk_buff *skb = priv->rx_buf[rx_queue_idx][i];
+        if (!skb)
+            continue;
+
+        pci_unmap_single(priv->pdev,
+                *((dma_addr_t *)skb->cb),
+                priv->rxbuffersize, PCI_DMA_FROMDEVICE);
+        kfree_skb(skb);
+    }
+
+    		pci_free_consistent(priv->pdev, sizeof(*priv->rx_ring[rx_queue_idx]) * priv->rxringcount,
+            		priv->rx_ring[rx_queue_idx], priv->rx_ring_dma[rx_queue_idx]);
+    		priv->rx_ring[rx_queue_idx] = NULL;
+	}
+}
+
+static void rtl8192_free_tx_ring(struct net_device *dev, unsigned int prio)
+{
+    struct r8192_priv *priv = rtllib_priv(dev);
+    struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
+
+    while (skb_queue_len(&ring->queue)) {
+        tx_desc *entry = &ring->desc[ring->idx];
+        struct sk_buff *skb = __skb_dequeue(&ring->queue);
+
+        pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
+                skb->len, PCI_DMA_TODEVICE);
+        kfree_skb(skb);
+        ring->idx = (ring->idx + 1) % ring->entries;
+    }
+
+    pci_free_consistent(priv->pdev, sizeof(*ring->desc)*ring->entries,
+            ring->desc, ring->dma);
+    ring->desc = NULL;
+}
+
+void rtl8192_data_hard_stop(struct net_device *dev)
+{
+	#if 0
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	priv->dma_poll_mask |= (1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
+	rtl8192_set_mode(dev,EPROM_CMD_CONFIG);
+	write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
+	rtl8192_set_mode(dev,EPROM_CMD_NORMAL);
+	#endif
+}
+
+
+void rtl8192_data_hard_resume(struct net_device *dev)
+{
+	#if 0
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	priv->dma_poll_mask &= ~(1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
+	rtl8192_set_mode(dev,EPROM_CMD_CONFIG);
+	write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
+	rtl8192_set_mode(dev,EPROM_CMD_NORMAL);
+	#endif
+}
+
+void rtl8192_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int rate)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	int ret;
+	cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
+	u8 queue_index = tcb_desc->queue_index;
+	
+	if((priv->rtllib->eRFPowerState == eRfOff) || IS_NIC_DOWN(priv) || priv->bResetInProgress){
+		kfree_skb(skb);
+		return;	
+	}
+	
+	assert(queue_index != TXCMD_QUEUE);
+
+
+        memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
+#if 0
+	tcb_desc->RATRIndex = 7;
+	tcb_desc->bTxDisableRateFallBack = 1;
+	tcb_desc->bTxUseDriverAssingedRate = 1;
+	tcb_desc->bTxEnableFwCalcDur = 1;
+#endif
+	skb_push(skb, priv->rtllib->tx_headroom);
+	ret = rtl8192_tx(dev, skb);
+	if(ret != 0) {
+		kfree_skb(skb);
+	};
+
+	if(queue_index!=MGNT_QUEUE) {
+		priv->rtllib->stats.tx_bytes+=(skb->len - priv->rtllib->tx_headroom);
+		priv->rtllib->stats.tx_packets++;
+	}
+
+
+	return;
+}
+
+int rtl8192_hard_start_xmit(struct sk_buff *skb,struct net_device *dev)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	int ret;
+	cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
+	u8 queue_index = tcb_desc->queue_index;
+
+	if(queue_index != TXCMD_QUEUE){
+		if((priv->rtllib->eRFPowerState == eRfOff) ||IS_NIC_DOWN(priv) || priv->bResetInProgress){
+			kfree_skb(skb);
+			return 0;	
+		}
+	}
+
+	memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
+	if(queue_index == TXCMD_QUEUE) {
+		rtl8192_tx_cmd(dev, skb);
+		ret = 0;
+		return ret;
+	} else {
+		tcb_desc->RATRIndex = 7;
+		tcb_desc->bTxDisableRateFallBack = 1;
+		tcb_desc->bTxUseDriverAssingedRate = 1;
+		tcb_desc->bTxEnableFwCalcDur = 1;
+		skb_push(skb, priv->rtllib->tx_headroom);
+		ret = rtl8192_tx(dev, skb);
+		if(ret != 0) {
+			kfree_skb(skb);
+		};
+	}
+	
+	
+	
+	return ret;
+
+}
+
+void rtl8192_tx_isr(struct net_device *dev, int prio)
+{
+    struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+
+    struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
+
+    while (skb_queue_len(&ring->queue)) {
+        tx_desc *entry = &ring->desc[ring->idx];
+        struct sk_buff *skb;
+
+        if(prio != BEACON_QUEUE) {
+            if(entry->OWN)
+                return;
+            ring->idx = (ring->idx + 1) % ring->entries;
+        }
+
+        skb = __skb_dequeue(&ring->queue);
+        pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
+                skb->len, PCI_DMA_TODEVICE);
+
+        kfree_skb(skb);
+    }
+    if(prio == MGNT_QUEUE)
+             ;
+    if(prio != BEACON_QUEUE) {
+        tasklet_schedule(&priv->irq_tx_tasklet);
+    }
+
+}
+
+void rtl8192_tx_cmd(struct net_device *dev, struct sk_buff *skb)
+{
+    struct r8192_priv *priv = rtllib_priv(dev);
+    struct rtl8192_tx_ring *ring;
+    tx_desc_cmd* entry;
+    unsigned int idx;
+    cb_desc *tcb_desc;
+    unsigned long flags;
+
+    spin_lock_irqsave(&priv->irq_th_lock,flags);
+    ring = &priv->tx_ring[TXCMD_QUEUE];
+
+    idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
+    entry = (tx_desc_cmd*) &ring->desc[idx];
+
+    tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
+    
+    priv->ops->tx_fill_cmd_descriptor(dev, entry, tcb_desc, skb);
+
+    __skb_queue_tail(&ring->queue, skb);
+    spin_unlock_irqrestore(&priv->irq_th_lock,flags);
+
+    return;
+}
+
+short rtl8192_tx(struct net_device *dev, struct sk_buff* skb)
+{
+    	struct r8192_priv *priv = rtllib_priv(dev);
+    	struct rtl8192_tx_ring  *ring;
+    	unsigned long flags;
+    	cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
+    	tx_desc *pdesc = NULL;
+    	struct rtllib_hdr_1addr * header = NULL;
+    	u16 fc=0, type=0,stype=0;
+    	bool  multi_addr=false,broad_addr=false,uni_addr=false;
+    	u8*   pda_addr = NULL;
+    	int   idx;
+    	u32 fwinfo_size = 0;
+
+    	if(priv->bdisable_nic){
+        	RT_TRACE(COMP_ERR,"%s: ERR!! Nic is disabled! Can't tx packet len=%d qidx=%d!!!\n", __FUNCTION__, skb->len, tcb_desc->queue_index);
+			return skb->len;
+    	}
+
+    	priv->rtllib->bAwakePktSent = true;
+	
+#if defined RTL8192SE || defined RTL8192CE
+    	fwinfo_size = 0;
+#else
+   	fwinfo_size = sizeof(TX_FWINFO_8190PCI);
+#endif
+
+    	header = (struct rtllib_hdr_1addr *)(((u8*)skb->data) + fwinfo_size);
+    	fc = header->frame_ctl;
+    	type = WLAN_FC_GET_TYPE(fc);
+    	stype = WLAN_FC_GET_STYPE(fc);
+    	pda_addr = header->addr1;
+		
+    	if(is_multicast_ether_addr(pda_addr))
+        	multi_addr = true;
+    	else if(is_broadcast_ether_addr(pda_addr))
+        	broad_addr = true;
+    	else {
+#ifdef _RTL8192_EXT_PATCH_
+        	priv->NumTxUnicast++;
+#endif
+        	uni_addr = true;
+    	}
+		
+    	if(uni_addr)
+        	priv->stats.txbytesunicast += skb->len - fwinfo_size;
+    	else if(multi_addr)
+        	priv->stats.txbytesmulticast += skb->len - fwinfo_size;
+    	else 
+        	priv->stats.txbytesbroadcast += skb->len - fwinfo_size;
+
+    	spin_lock_irqsave(&priv->irq_th_lock,flags);
+    	ring = &priv->tx_ring[tcb_desc->queue_index];
+    	if (tcb_desc->queue_index != BEACON_QUEUE) {
+        	idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
+    	} else {
+        	idx = 0;
+    	}
+
+    	pdesc = &ring->desc[idx];
+	if((pdesc->OWN == 1) && (tcb_desc->queue_index != BEACON_QUEUE)) {
+		RT_TRACE(COMP_ERR,"No more TX desc@%d, ring->idx = %d,idx = %d, skblen = 0x%x", \
+				tcb_desc->queue_index,ring->idx, idx,skb->len);
+		spin_unlock_irqrestore(&priv->irq_th_lock,flags);
+		return skb->len;
+	} 
+
+	if(tcb_desc->queue_index == MGNT_QUEUE)
+	{
+	}
+
+	if(type == RTLLIB_FTYPE_DATA){
+	    	if(priv->rtllib->LedControlHandler)
+			priv->rtllib->LedControlHandler(dev, LED_CTL_TX);
+    	}
+    	priv->ops->tx_fill_descriptor(dev, pdesc, tcb_desc, skb);
+    	__skb_queue_tail(&ring->queue, skb);
+    	pdesc->OWN = 1;
+    	spin_unlock_irqrestore(&priv->irq_th_lock,flags);
+    	dev->trans_start = jiffies;
+
+#ifdef RTL8192CE 
+	if(tcb_desc->queue_index == BEACON_QUEUE){
+		write_nic_word(dev, REG_PCIE_CTRL_REG, BIT4);
+	}else{
+		write_nic_word(dev, REG_PCIE_CTRL_REG, BIT0<<(tcb_desc->queue_index));
+	}
+#else
+		write_nic_word(dev,TPPoll,0x01<<tcb_desc->queue_index);
+#endif
+	return 0;	
+}
+
+short rtl8192_alloc_rx_desc_ring(struct net_device *dev)
+{
+    	struct r8192_priv *priv = rtllib_priv(dev);
+    	rx_desc *entry = NULL;
+    	int i, rx_queue_idx;
+
+	for(rx_queue_idx = 0; rx_queue_idx < MAX_RX_QUEUE; rx_queue_idx ++){
+    		priv->rx_ring[rx_queue_idx] = pci_alloc_consistent(priv->pdev,
+            	sizeof(*priv->rx_ring[rx_queue_idx]) * priv->rxringcount, &priv->rx_ring_dma[rx_queue_idx]);
+
+    		if (!priv->rx_ring[rx_queue_idx] || (unsigned long)priv->rx_ring[rx_queue_idx] & 0xFF) {
+        		RT_TRACE(COMP_ERR,"Cannot allocate RX ring\n");
+        		return -ENOMEM;
+    		}
+
+    		memset(priv->rx_ring[rx_queue_idx], 0, sizeof(*priv->rx_ring[rx_queue_idx]) * priv->rxringcount);
+    		priv->rx_idx[rx_queue_idx] = 0;
+
+    		for (i = 0; i < priv->rxringcount; i++) {
+        		struct sk_buff *skb = dev_alloc_skb(priv->rxbuffersize);
+        		dma_addr_t *mapping;
+        		entry = &priv->rx_ring[rx_queue_idx][i];
+        		if (!skb)
+            			return 0;
+        		skb->dev = dev;
+        		priv->rx_buf[rx_queue_idx][i] = skb;
+        		mapping = (dma_addr_t *)skb->cb;
+        		*mapping = pci_map_single(priv->pdev, skb_tail_pointer_rsl(skb),
+                	priv->rxbuffersize, PCI_DMA_FROMDEVICE);
+
+        		entry->BufferAddress = cpu_to_le32(*mapping);
+
+        		entry->Length = priv->rxbuffersize;
+        		entry->OWN = 1;
+    		}
+
+    		entry->EOR = 1;
+	}
+    	return 0;
+}
+
+static int rtl8192_alloc_tx_desc_ring(struct net_device *dev,
+        unsigned int prio, unsigned int entries)
+{
+    struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+    tx_desc *ring;
+    dma_addr_t dma;
+    int i;
+
+    ring = pci_alloc_consistent(priv->pdev, sizeof(*ring) * entries, &dma);
+    if (!ring || (unsigned long)ring & 0xFF) {
+        RT_TRACE(COMP_ERR, "Cannot allocate TX ring (prio = %d)\n", prio);
+        return -ENOMEM;
+    }
+
+    memset(ring, 0, sizeof(*ring)*entries);
+    priv->tx_ring[prio].desc = ring;
+    priv->tx_ring[prio].dma = dma;
+    priv->tx_ring[prio].idx = 0;
+    priv->tx_ring[prio].entries = entries;
+    skb_queue_head_init(&priv->tx_ring[prio].queue);
+
+    for (i = 0; i < entries; i++)
+        ring[i].NextDescAddress =
+            cpu_to_le32((u32)dma + ((i + 1) % entries) * sizeof(*ring));
+
+    return 0;
+}
+
+                    
+short rtl8192_pci_initdescring(struct net_device *dev)
+{
+    u32 ret;
+    int i;
+    struct r8192_priv *priv = rtllib_priv(dev);
+
+    ret = rtl8192_alloc_rx_desc_ring(dev);
+    if (ret) {
+        return ret;
+    }
+    
+
+    for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) {
+        if ((ret = rtl8192_alloc_tx_desc_ring(dev, i, priv->txringcount)))
+            goto err_free_rings;
+    }
+
+#if 0
+    if ((ret = rtl8192_alloc_tx_desc_ring(dev, MAX_TX_QUEUE_COUNT - 1, 2)))
+        goto err_free_rings;
+#endif    
+
+    return 0;
+
+err_free_rings:
+    rtl8192_free_rx_ring(dev);
+    for (i = 0; i < MAX_TX_QUEUE_COUNT; i++)
+        if (priv->tx_ring[i].desc)
+            rtl8192_free_tx_ring(dev, i);
+    return 1;
+}
+
+void rtl8192_pci_resetdescring(struct net_device *dev)
+{
+    struct r8192_priv *priv = rtllib_priv(dev);
+    	int i,rx_queue_idx;
+    unsigned long flags = 0;
+
+	for(rx_queue_idx = 0; rx_queue_idx < MAX_RX_QUEUE; rx_queue_idx ++){	
+    		if(priv->rx_ring[rx_queue_idx]) {
+        		rx_desc *entry = NULL;
+        		for (i = 0; i < priv->rxringcount; i++) {
+            			entry = &priv->rx_ring[rx_queue_idx][i];
+            			entry->OWN = 1;
+        		}
+        		priv->rx_idx[rx_queue_idx] = 0;
+    		}
+	}
+
+    spin_lock_irqsave(&priv->irq_th_lock,flags);
+    for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) {
+        if (priv->tx_ring[i].desc) {
+            struct rtl8192_tx_ring *ring = &priv->tx_ring[i];
+
+            while (skb_queue_len(&ring->queue)) {
+                tx_desc *entry = &ring->desc[ring->idx];
+                struct sk_buff *skb = __skb_dequeue(&ring->queue);
+
+                pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
+                        skb->len, PCI_DMA_TODEVICE);
+                kfree_skb(skb);
+                ring->idx = (ring->idx + 1) % ring->entries;
+            }
+            ring->idx = 0;
+        }
+    }
+    spin_unlock_irqrestore(&priv->irq_th_lock,flags);
+}
+
+void rtl819x_UpdateRxPktTimeStamp (struct net_device *dev, struct rtllib_rx_stats *stats)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+
+	if(stats->bIsAMPDU && !stats->bFirstMPDU) {
+		stats->mac_time[0] = priv->LastRxDescTSFLow;
+		stats->mac_time[1] = priv->LastRxDescTSFHigh;
+	} else {
+		priv->LastRxDescTSFLow = stats->mac_time[0];
+		priv->LastRxDescTSFHigh = stats->mac_time[1];
+	}
+}
+
+long rtl819x_translate_todbm(struct r8192_priv * priv, u8 signal_strength_index	)
+{
+	long	signal_power; 
+
+#ifdef _RTL8192_EXT_PATCH_
+	if(priv->CustomerID == RT_CID_819x_Lenovo)
+	{	
+		signal_power = (long)signal_strength_index;
+		if(signal_power >= 45)
+			signal_power -= 110;
+		else
+		{
+			signal_power = ((signal_power*6)/10);
+			signal_power -= 93;
+		}
+		return signal_power;
+	}
+#endif
+	signal_power = (long)((signal_strength_index + 1) >> 1); 
+	signal_power -= 95; 
+
+	return signal_power;
+}
+
+
+void
+rtl819x_update_rxsignalstatistics8190pci(
+	struct r8192_priv * priv,
+	struct rtllib_rx_stats * pprevious_stats
+	)
+{
+	int weighting = 0;
+
+
+	if(priv->stats.recv_signal_power == 0)
+		priv->stats.recv_signal_power = pprevious_stats->RecvSignalPower;
+
+	if(pprevious_stats->RecvSignalPower > priv->stats.recv_signal_power)
+		weighting = 5;
+	else if(pprevious_stats->RecvSignalPower < priv->stats.recv_signal_power)
+		weighting = (-5);
+	priv->stats.recv_signal_power = (priv->stats.recv_signal_power * 5 + pprevious_stats->RecvSignalPower + weighting) / 6;
+}
+
+void
+rtl819x_process_cck_rxpathsel(
+	struct r8192_priv * priv,
+	struct rtllib_rx_stats * pprevious_stats
+	)
+{
+#ifdef RTL8190P	
+	char				last_cck_adc_pwdb[4]={0,0,0,0};
+	u8				i;
+		if(priv->rf_type == RF_2T4R && DM_RxPathSelTable.Enable)
+		{
+			if(pprevious_stats->bIsCCK && 
+				(pprevious_stats->bPacketToSelf ||pprevious_stats->bPacketBeacon))
+			{
+				if(priv->stats.cck_adc_pwdb.TotalNum++ >= PHY_RSSI_SLID_WIN_MAX)
+				{
+					priv->stats.cck_adc_pwdb.TotalNum = PHY_RSSI_SLID_WIN_MAX;
+					for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
+					{
+						last_cck_adc_pwdb[i] = priv->stats.cck_adc_pwdb.elements[i][priv->stats.cck_adc_pwdb.index];
+						priv->stats.cck_adc_pwdb.TotalVal[i] -= last_cck_adc_pwdb[i];
+					}
+				}
+				for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
+				{
+					priv->stats.cck_adc_pwdb.TotalVal[i] += pprevious_stats->cck_adc_pwdb[i];
+					priv->stats.cck_adc_pwdb.elements[i][priv->stats.cck_adc_pwdb.index] = pprevious_stats->cck_adc_pwdb[i];
+				}
+				priv->stats.cck_adc_pwdb.index++;
+				if(priv->stats.cck_adc_pwdb.index >= PHY_RSSI_SLID_WIN_MAX)
+					priv->stats.cck_adc_pwdb.index = 0;
+
+				for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
+				{
+					DM_RxPathSelTable.cck_pwdb_sta[i] = priv->stats.cck_adc_pwdb.TotalVal[i]/priv->stats.cck_adc_pwdb.TotalNum;
+				}
+
+				for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
+				{
+					if(pprevious_stats->cck_adc_pwdb[i]  > (char)priv->undecorated_smoothed_cck_adc_pwdb[i])
+					{
+						priv->undecorated_smoothed_cck_adc_pwdb[i] = 
+							( (priv->undecorated_smoothed_cck_adc_pwdb[i]*(Rx_Smooth_Factor-1)) + 
+							(pprevious_stats->cck_adc_pwdb[i])) /(Rx_Smooth_Factor);
+						priv->undecorated_smoothed_cck_adc_pwdb[i] = priv->undecorated_smoothed_cck_adc_pwdb[i] + 1;
+					}
+					else
+					{
+						priv->undecorated_smoothed_cck_adc_pwdb[i] = 
+							( (priv->undecorated_smoothed_cck_adc_pwdb[i]*(Rx_Smooth_Factor-1)) + 
+							(pprevious_stats->cck_adc_pwdb[i])) /(Rx_Smooth_Factor);
+					}
+				}
+			}
+		}
+#endif
+}
+
+
+u8 rtl819x_query_rxpwrpercentage(
+	char		antpower
+	)
+{
+	if ((antpower <= -100) || (antpower >= 20))
+	{
+		return	0;
+	}
+	else if (antpower >= 0)
+	{
+		return	100;
+	}
+	else
+	{
+		return	(100+antpower);
+	}
+	
+}	/* QueryRxPwrPercentage */
+
+u8 
+rtl819x_evm_dbtopercentage(
+	char value
+	)
+{
+	char ret_val;
+	
+	ret_val = value;
+	
+	if(ret_val >= 0)
+		ret_val = 0;
+	if(ret_val <= -33)
+		ret_val = -33;
+	ret_val = 0 - ret_val;
+	ret_val*=3;
+	if(ret_val == 99)
+		ret_val = 100;
+	return(ret_val);
+}
+
+void
+rtl8192_record_rxdesc_forlateruse(
+	struct rtllib_rx_stats * psrc_stats,
+	struct rtllib_rx_stats * ptarget_stats
+)
+{
+	ptarget_stats->bIsAMPDU = psrc_stats->bIsAMPDU;
+	ptarget_stats->bFirstMPDU = psrc_stats->bFirstMPDU;
+}
+
+
+
+void rtl8192_rx_normal(struct net_device *dev)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	struct rtllib_hdr_1addr *rtllib_hdr = NULL;
+	bool unicast_packet = false;
+	bool bLedBlinking=true;
+	u16 fc=0, type=0;
+	u32 skb_len = 0;
+	int rx_queue_idx = RX_MPDU_QUEUE;
+	
+	struct rtllib_rx_stats stats = {
+		.signal = 0,
+		.noise = -98,
+		.rate = 0,
+		.freq = RTLLIB_24GHZ_BAND,
+	};
+	unsigned int count = priv->rxringcount;
+
+	stats.nic_type = NIC_8192E;
+
+	while (count--) {
+		rx_desc *pdesc = &priv->rx_ring[rx_queue_idx][priv->rx_idx[rx_queue_idx]];
+		struct sk_buff *skb = priv->rx_buf[rx_queue_idx][priv->rx_idx[rx_queue_idx]];
+
+		if (pdesc->OWN){
+			return;
+		} else {
+
+			struct sk_buff *new_skb = NULL;
+			if (!priv->ops->rx_query_status_descriptor(dev, &stats, pdesc, skb))
+				goto done;
+
+			pci_unmap_single(priv->pdev,
+					*((dma_addr_t *)skb->cb), 
+					priv->rxbuffersize, 
+					PCI_DMA_FROMDEVICE);
+
+			skb_put(skb, pdesc->Length);
+			skb_reserve(skb, stats.RxDrvInfoSize + stats.RxBufShift);
+			skb_trim(skb, skb->len - 4/*sCrcLng*/);
+			rtllib_hdr = (struct rtllib_hdr_1addr *)skb->data;
+			if(is_broadcast_ether_addr(rtllib_hdr->addr1)) {
+			}else if(is_multicast_ether_addr(rtllib_hdr->addr1)){
+			}else {
+				/* unicast packet */
+				unicast_packet = true;
+			}
+			fc = le16_to_cpu(rtllib_hdr->frame_ctl);
+			type = WLAN_FC_GET_TYPE(fc);
+			if(type == RTLLIB_FTYPE_MGMT)
+			{
+				bLedBlinking = false;
+			}
+			if(bLedBlinking)
+				if(priv->rtllib->LedControlHandler)
+				priv->rtllib->LedControlHandler(dev, LED_CTL_RX);
+
+			if(stats.bCRC) {
+				if(type != RTLLIB_FTYPE_MGMT)
+					priv->stats.rxdatacrcerr ++;
+				else
+					priv->stats.rxmgmtcrcerr ++;
+			}
+
+			skb_len = skb->len;
+			
+#ifdef RTL8192CE
+			if (!stats.bCRC)
+#else
+			if (1)
+#endif
+			{
+			if(!rtllib_rx(priv->rtllib, skb, &stats)){
+				dev_kfree_skb_any(skb);
+			} else {
+				priv->stats.rxok++;
+				if(unicast_packet) {
+					priv->stats.rxbytesunicast += skb_len;
+				}
+			}
+			}else{
+				dev_kfree_skb_any(skb);
+			}
+#if 1
+			new_skb = dev_alloc_skb(priv->rxbuffersize);
+			if (unlikely(!new_skb))
+			{
+				printk("==========>can't alloc skb for rx\n");
+				goto done;
+			}
+			skb=new_skb;
+                        skb->dev = dev;
+#endif
+			priv->rx_buf[rx_queue_idx][priv->rx_idx[rx_queue_idx]] = skb;
+			*((dma_addr_t *) skb->cb) = pci_map_single(priv->pdev, skb_tail_pointer_rsl(skb), priv->rxbuffersize, PCI_DMA_FROMDEVICE);
+
+		}
+done:
+		pdesc->BufferAddress = cpu_to_le32(*((dma_addr_t *)skb->cb));
+		pdesc->OWN = 1;
+		pdesc->Length = priv->rxbuffersize;
+		if (priv->rx_idx[rx_queue_idx] == priv->rxringcount-1)
+			pdesc->EOR = 1;
+		priv->rx_idx[rx_queue_idx] = (priv->rx_idx[rx_queue_idx] + 1) % priv->rxringcount;
+	}
+
+}
+
+void rtl8192_rx_cmd(struct net_device *dev)
+{
+#ifdef RTL8192SE
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+
+	unsigned int count = priv->rxringcount;
+	int rx_queue_idx = RX_CMD_QUEUE;
+
+	struct rtllib_rx_stats stats = {
+		.signal = 0,
+		.noise = -98,
+		.rate = 0,
+		.freq = RTLLIB_24GHZ_BAND,
+	};
+	stats.nic_type = NIC_8192E;
+
+	while (count--) {
+		rx_desc *pdesc = &priv->rx_ring[rx_queue_idx][priv->rx_idx[rx_queue_idx]];
+		struct sk_buff *skb = priv->rx_buf[rx_queue_idx][priv->rx_idx[rx_queue_idx]];
+
+		if (pdesc->OWN){
+			return;
+		} else {
+			struct sk_buff *new_skb = NULL;
+
+			pci_unmap_single(priv->pdev,
+					*((dma_addr_t *)skb->cb), 
+					priv->rxbuffersize, 
+					PCI_DMA_FROMDEVICE);
+
+			skb_put(skb, pdesc->Length);
+
+			if(pdesc->MACID == 0x1e){
+
+				pdesc->Length = pdesc->Length - 32;
+				pdesc->DrvInfoSize = 4; 
+				printk(">>>>%s()CMD PKT RX, beacon_len:%d payload_len:%d\n",__func__, pdesc->Length,skb->len);
+				
+				
+				priv->ops->rx_query_status_descriptor(dev, &stats, pdesc, skb);
+				skb_reserve(skb, stats.RxDrvInfoSize + stats.RxBufShift);
+                                if(0)
+				{
+					u8 i = 0;
+					u8 *arry = (u8*) skb->data;
+
+					printk("\n==============>\n");
+					for(i = 0; i < 32; i ++){
+						if((i % 4 == 0)&&(i != 0))
+							printk("\n");
+						printk("%2.2x ", arry[i]);
+					}
+					printk("\n<==============\n");
+				}
+			}
+
+			skb_trim(skb, skb->len - 4/*sCrcLng*/);
+
+			if(pdesc->MACID == 0x1e){
+				if(!rtllib_rx(priv->rtllib, skb, &stats)){
+					dev_kfree_skb_any(skb);
+				} 
+			}else{
+			if(priv->ops->rx_command_packet_handler != NULL)
+				priv->ops->rx_command_packet_handler(dev, skb, pdesc);
+			dev_kfree_skb_any(skb);
+			}
+
+		
+			new_skb = dev_alloc_skb(priv->rxbuffersize);
+			if (unlikely(!new_skb))
+			{
+				printk("==========>can't alloc skb for rx\n");
+				goto done;
+			}
+			skb=new_skb;
+                        skb->dev = dev;
+
+			priv->rx_buf[rx_queue_idx][priv->rx_idx[rx_queue_idx]] = skb;
+			*((dma_addr_t *) skb->cb) = pci_map_single(priv->pdev, skb_tail_pointer_rsl(skb), priv->rxbuffersize, PCI_DMA_FROMDEVICE);
+
+		}
+done:
+		pdesc->BufferAddress = cpu_to_le32(*((dma_addr_t *)skb->cb));
+		pdesc->OWN = 1;
+		pdesc->Length = priv->rxbuffersize;
+		if (priv->rx_idx[rx_queue_idx] == priv->rxringcount-1)
+			pdesc->EOR = 1;
+		priv->rx_idx[rx_queue_idx] = (priv->rx_idx[rx_queue_idx] + 1) % priv->rxringcount;
+	}
+#endif
+}
+
+
+void rtl8192_tx_resume(struct net_device *dev)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	struct rtllib_device *ieee = priv->rtllib;
+	struct sk_buff *skb;
+	int queue_index;
+
+	for(queue_index = BK_QUEUE; queue_index < TXCMD_QUEUE;queue_index++) {
+		while((!skb_queue_empty(&ieee->skb_waitQ[queue_index]))&&
+				(priv->rtllib->check_nic_enough_desc(dev,queue_index) > 0)) {
+			skb = skb_dequeue(&ieee->skb_waitQ[queue_index]);
+			ieee->softmac_data_hard_start_xmit(skb,dev,0/* rate useless now*/);
+			#if 0
+			if(queue_index!=MGNT_QUEUE) {
+				ieee->stats.tx_packets++;
+				ieee->stats.tx_bytes += skb->len;
+			}
+			#endif
+		}
+#ifdef ENABLE_AMSDU
+		while((skb_queue_len(&priv->rtllib->skb_aggQ[queue_index]) > 0)&&\
+				(!(priv->rtllib->queue_stop)) && \
+				(priv->rtllib->check_nic_enough_desc(dev,queue_index) > 0)){
+
+			struct sk_buff_head pSendList;
+			u8 dst[ETH_ALEN];
+			cb_desc *tcb_desc = NULL;
+			int qos_actived = priv->rtllib->current_network.qos_data.active;
+			struct sta_info *psta = NULL;
+			u8 bIsSptAmsdu = false;
+
+#ifdef WIFI_TEST 
+			if (queue_index <= VO_QUEUE)
+				queue_index = wmm_queue_select(priv, queue_index, priv->rtllib->skb_aggQ);
+#endif
+			priv->rtllib->amsdu_in_process = true;
+
+			skb = skb_dequeue(&(priv->rtllib->skb_aggQ[queue_index]));
+			if(skb == NULL)
+			{
+				printk("In %s:Skb is NULL\n",__FUNCTION__);
+				return;
+			}
+			tcb_desc = (pcb_desc)(skb->cb + MAX_DEV_ADDR_SIZE);
+			if(tcb_desc->bFromAggrQ)
+			{
+				rtllib_xmit_inter(skb, dev);
+				return;
+			}
+
+			memcpy(dst, skb->data, ETH_ALEN);
+			if(priv->rtllib->iw_mode == IW_MODE_ADHOC)
+			{
+				psta = GetStaInfo(priv->rtllib, dst);
+				if(psta) {
+					if(psta->htinfo.bEnableHT)
+						bIsSptAmsdu = true;
+				}
+			}
+			else if(priv->rtllib->iw_mode == IW_MODE_INFRA)
+				bIsSptAmsdu = true;
+			else
+				bIsSptAmsdu = true;
+			bIsSptAmsdu = true;
+
+			bIsSptAmsdu = bIsSptAmsdu && priv->rtllib->pHTInfo->bCurrent_AMSDU_Support && qos_actived;
+
+			if(qos_actived &&       !is_broadcast_ether_addr(dst) &&
+					!is_multicast_ether_addr(dst) &&
+					bIsSptAmsdu)
+			{
+				skb_queue_head_init(&pSendList);
+				if(AMSDU_GetAggregatibleList(priv->rtllib, skb, &pSendList,queue_index))
+				{
+					struct sk_buff * pAggrSkb = AMSDU_Aggregation(priv->rtllib, &pSendList);
+					if(NULL != pAggrSkb)
+						rtllib_xmit_inter(pAggrSkb, dev);
+				}
+			}
+			else
+			{
+				memset(skb->cb,0,sizeof(skb->cb));
+				tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
+				tcb_desc->bFromAggrQ = true;
+				rtllib_xmit_inter(skb, dev);
+			}
+		}
+#endif
+#ifdef _RTL8192_EXT_PATCH_
+		while((!skb_queue_empty(&priv->rtllib->skb_meshaggQ[queue_index]) )&&\
+			(priv->rtllib->check_nic_enough_desc(dev,queue_index)> 0))
+		{
+			struct sk_buff_head pSendList;
+			u8 dst[ETH_ALEN];
+			cb_desc *tcb_desc = NULL;
+			u8 IsHTEnable = false;
+			int qos_actived = 1; 
+			priv->rtllib->mesh_amsdu_in_process = true;
+			skb = skb_dequeue(&(priv->rtllib->skb_meshaggQ[queue_index]));
+			if(skb == NULL)
+			{
+				priv->rtllib->mesh_amsdu_in_process = false;
+				printk("In %s:Skb is NULL\n",__FUNCTION__);
+				return;
+			}
+			tcb_desc = (pcb_desc)(skb->cb + MAX_DEV_ADDR_SIZE);
+			if(tcb_desc->bFromAggrQ)
+			{
+				rtllib_mesh_xmit(skb, dev);
+				continue;
+			}
+			memcpy(dst, skb->data, ETH_ALEN);
+			
+#if 0
+			ppeerMP_htinfo phtinfo = NULL;
+			bool is_mesh = false;
+			if(priv->mshobj->ext_patch_rtllib_is_mesh)
+				is_mesh = priv->mshobj->ext_patch_rtllib_is_mesh(priv->rtllib,dst);
+			if(is_mesh){
+				if(priv->rtllib->ext_patch_rtllib_get_peermp_htinfo)
+				{
+					phtinfo = priv->rtllib->ext_patch_rtllib_get_peermp_htinfo(ieee,dst);
+					if(phtinfo == NULL)
+					{
+						RT_TRACE(COMP_ERR,"%s(): No htinfo\n",__FUNCTION__);
+					}
+					else
+					{
+						if(phtinfo->bEnableHT)
+							IsHTEnable = true;
+					}	
+				}
+			}
+			else 
+			{
+				printk("===>%s():tx AMSDU data has not entry,dst: "MAC_FMT"\n",__FUNCTION__,MAC_ARG(dst));
+				IsHTEnable = true;
+			}
+#else
+			IsHTEnable = true;
+#endif
+			IsHTEnable = (IsHTEnable && ieee->pHTInfo->bCurrent_Mesh_AMSDU_Support && qos_actived);
+			if( !is_broadcast_ether_addr(dst) && 
+				!is_multicast_ether_addr(dst) &&
+				IsHTEnable) 
+			{
+				skb_queue_head_init(&pSendList);
+				if(msh_AMSDU_GetAggregatibleList(priv->rtllib, skb, &pSendList,queue_index))
+				{				
+					struct sk_buff * pAggrSkb = msh_AMSDU_Aggregation(priv->rtllib, &pSendList);
+					if(NULL != pAggrSkb)
+						rtllib_mesh_xmit(pAggrSkb, dev);
+				}else{
+					priv->rtllib->mesh_amsdu_in_process = false;
+					return;
+				}
+			}
+			else
+			{
+				memset(skb->cb,0,sizeof(skb->cb));
+				tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
+				tcb_desc->bFromAggrQ = true;
+				rtllib_mesh_xmit(skb, dev);
+			}
+		}
+#endif		
+	}
+}
+
+void rtl8192_irq_tx_tasklet(struct r8192_priv *priv)
+{
+       rtl8192_tx_resume(priv->rtllib->dev);
+}
+
+void rtl8192_irq_rx_tasklet(struct r8192_priv *priv)
+{
+       	rtl8192_rx_normal(priv->rtllib->dev);
+
+	if(MAX_RX_QUEUE > 1)
+		rtl8192_rx_cmd(priv->rtllib->dev);
+	
+#ifndef RTL8192CE
+       write_nic_dword(priv->rtllib->dev, INTA_MASK,read_nic_dword(priv->rtllib->dev, INTA_MASK) | IMR_RDU); 
+#endif
+}
+
+/****************************************************************************
+ ---------------------------- NIC START/CLOSE STUFF---------------------------
+*****************************************************************************/
+void rtl8192_cancel_deferred_work(struct r8192_priv* priv)
+{
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
+	cancel_delayed_work(&priv->watch_dog_wq);
+	cancel_delayed_work(&priv->update_beacon_wq);
+#ifndef RTL8190P
+	cancel_delayed_work(&priv->rtllib->hw_sleep_wq);
+#endif
+#if defined RTL8192SE 
+	cancel_delayed_work(&priv->check_hw_scan_wq);
+	cancel_delayed_work(&priv->hw_scan_simu_wq);
+	cancel_delayed_work(&priv->start_hw_scan_wq);
+	cancel_delayed_work(&priv->rtllib->update_assoc_sta_info_wq);
+	cancel_delayed_work(&priv->rtllib->check_tsf_wq);
+#endif
+#endif
+
+#if LINUX_VERSION_CODE >=KERNEL_VERSION(2,6,22)
+	cancel_work_sync(&priv->reset_wq);
+	cancel_work_sync(&priv->qos_activate);
+#elif ((LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)))
+	cancel_delayed_work(&priv->reset_wq);
+	cancel_delayed_work(&priv->qos_activate);
+#if defined RTL8192SE 
+	cancel_delayed_work(&priv->rtllib->update_assoc_sta_info_wq);
+	cancel_delayed_work(&priv->rtllib->check_tsf_wq);
+#endif
+#endif
+
+}
+
+int _rtl8192_up(struct net_device *dev,bool is_silent_reset)
+{
+#ifdef _RTL8192_EXT_PATCH_
+	if(_rtl8192_mesh_up(dev, is_silent_reset) == -1)
+		return -1;
+#else
+	if(_rtl8192_sta_up(dev, is_silent_reset) == -1)
+		return -1;
+#endif
+
+	return 0;
+}
+
+
+int rtl8192_open(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	int ret;
+	
+	down(&priv->wx_sem);
+	ret = rtl8192_up(dev);
+	up(&priv->wx_sem);
+	return ret;
+	
+}
+
+
+int rtl8192_up(struct net_device *dev)
+{
+#ifndef _RTL8192_EXT_PATCH_
+	struct r8192_priv *priv = rtllib_priv(dev);
+
+	if (priv->up == 1) return -1;
+	return _rtl8192_up(dev,false);
+#else	
+	return _rtl8192_up(dev,false);
+#endif	
+}
+
+
+int rtl8192_close(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	int ret;
+	
+	if ((rtllib_act_scanning(priv->rtllib, false)) && 
+		!(priv->rtllib->softmac_features & IEEE_SOFTMAC_SCAN)){
+		rtllib_stop_scan(priv->rtllib);
+	}
+
+	down(&priv->wx_sem);
+
+	ret = rtl8192_down(dev,true);
+	
+	up(&priv->wx_sem);
+	
+	return ret;
+
+}
+
+int rtl8192_down(struct net_device *dev, bool shutdownrf)
+{
+#ifdef CONFIG_MP
+	struct r8192_priv *priv = rtllib_priv(dev);
+#endif
+
+#ifdef _RTL8192_EXT_PATCH_
+	if(rtl8192_mesh_down(dev, shutdownrf) == -1)
+		return -1;
+#else
+	if(rtl8192_sta_down(dev, shutdownrf) == -1)
+		return -1;
+#endif
+
+#ifdef CONFIG_MP
+	if (priv->bCckContTx) {
+		printk("####RTL819X MP####stop single cck continious TX\n");
+		mpt_StopCckCoNtTx(dev);
+	} 
+	if (priv->bOfdmContTx) {
+		printk("####RTL819X MP####stop single ofdm continious TX\n");
+		mpt_StopOfdmContTx(dev);
+	} 
+	if (priv->bSingleCarrier) {
+		printk("####RTL819X MP####stop single carrier mode\n");
+		MPT_ProSetSingleCarrier(dev, false);
+	}
+#endif
+	return 0;
+}
+
+void rtl8192_commit(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+
+#ifdef _RTL8192_EXT_PATCH_
+	if (IS_NIC_DOWN(priv)) 
+		return ;
+	rtllib_softmac_stop_protocol(priv->rtllib,0,true);
+	rtl8192_irq_disable(dev);
+	priv->ops->stop_adapter(dev, true);
+	priv->up = 0;
+	_rtl8192_up(dev,false);
+#else
+	if (priv->up == 0) return ;
+	rtllib_softmac_stop_protocol(priv->rtllib,true);
+	rtl8192_irq_disable(dev);
+	priv->ops->stop_adapter(dev, true);
+	_rtl8192_up(dev,false);
+#endif
+	
+}
+
+void rtl8192_restart(void *data)
+{
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
+	struct r8192_priv *priv = container_of_work_rsl(data, struct r8192_priv, reset_wq);
+	struct net_device *dev = priv->rtllib->dev;
+#else
+	struct net_device *dev = (struct net_device *)data;
+        struct r8192_priv *priv = rtllib_priv(dev);
+#endif
+
+	down(&priv->wx_sem);
+	
+	rtl8192_commit(dev);
+	
+	up(&priv->wx_sem);
+}
+
+static void r8192_set_multicast(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	short promisc;
+
+	
+	
+	promisc = (dev->flags & IFF_PROMISC) ? 1:0;
+	
+	if (promisc != priv->promisc) {
+		;
+	}
+	
+	priv->promisc = promisc;
+	
+}
+
+
+int r8192_set_mac_adr(struct net_device *dev, void *mac)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	struct sockaddr *addr = mac;
+	
+	down(&priv->wx_sem);
+	
+	memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
+		
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
+	schedule_work(&priv->reset_wq);
+#else
+	schedule_task(&priv->reset_wq);
+#endif	
+	up(&priv->wx_sem);
+	
+	return 0;
+}
+
+#if defined (RTL8192S_WAPI_SUPPORT)
+extern int wapi_ioctl_set_mode(struct net_device *dev, struct iw_request_info *a,union iwreq_data *wrqu, char *b);
+int WAPI_Ioctl(struct net_device *dev, struct iwreq *wrq, int cmd)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	struct rtllib_device *ieee = priv->rtllib;
+	static u8 QueueData[WAPI_MAX_BUFF_LEN];
+#define DATAQUEUE_EMPTY	"Queue is empty"
+	int ret = 0;
+
+	switch(cmd){
+	    	case WAPI_CMD_GET_WAPI_SUPPORT:
+			WAPI_TRACE(WAPI_API, "%s(): WAPI_CMD_GET_WAPI_SUPPORT!\n",__FUNCTION__);
+			if(copy_to_user((u8 *)(wrq->u.data.pointer), &ieee->WapiSupport, sizeof(u8))==0)
+				wrq->u.data.length = sizeof(u8);
+			break;
+	    	case WAPI_CMD_SET_WAPI_ENABLE:
+		{
+			u8 wapi_enable = *(u8 *)wrq->u.data.pointer;
+			WAPI_TRACE(WAPI_API, "%s(): WAPI_CMD_SET_WAPI_ENABLE!\n",__FUNCTION__);
+			if((ieee->WapiSupport) && (wapi_enable == 1)){
+				ieee->wapiInfo.bWapiEnable = true;
+				ieee->pairwise_key_type = KEY_TYPE_SMS4;
+				ieee->group_key_type = KEY_TYPE_SMS4;
+				ieee->wapiInfo.extra_prefix_len = WAPI_EXT_LEN;
+				ieee->wapiInfo.extra_postfix_len = SMS4_MIC_LEN;
+			}
+			else if (wapi_enable == 0) {
+				ieee->wapiInfo.bWapiEnable = false;
+				ieee->pairwise_key_type = KEY_TYPE_NA;
+				ieee->group_key_type = KEY_TYPE_NA;
+			}
+			break;
+	    	}
+	    	case WAPI_CMD_SET_WAPI_PSK:
+		{
+			u8 wapi_psk = *(u8 *)wrq->u.data.pointer;
+			WAPI_TRACE(WAPI_API, "%s(): WAPI_CMD_SET_WAPI_PSK!\n",__FUNCTION__);
+			if(ieee->wapiInfo.bWapiEnable){
+				ieee->wapiInfo.bWapiPSK = (wapi_psk > 0)?1:0; 
+				WAPI_TRACE(WAPI_API, "%s(): bWapiPSK=%d!\n",__FUNCTION__, ieee->wapiInfo.bWapiPSK);
+			}
+			break;
+	    	}
+	    	case WAPI_CMD_SET_KEY:
+		{ /*Data: keyType(1) + bTxEnable(1) + bAuthenticator(1) + bUpdate(1) + PeerAddr(6) + DataKey(16) + MicKey(16) + KeyId(1)*/
+			PRT_WAPI_T			pWapiInfo = &ieee->wapiInfo;
+			PRT_WAPI_BKID		pWapiBkid;
+			PRT_WAPI_STA_INFO	pWapiSta;
+			u8					data[43];
+			bool					bTxEnable;
+			bool					bUpdate;
+			bool					bAuthenticator;
+			u8					PeerAddr[6];
+			u8					WapiAEPNInitialValueSrc[16] = {0x37,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ;
+			u8					WapiASUEPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ;
+			u8					WapiAEMultiCastPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ;		
+
+			WAPI_TRACE(WAPI_API, "%s(): WAPI_CMD_SET_KEY!\n",__FUNCTION__);
+			if (!ieee->WapiSupport){
+				ret = -1;
+				break;    
+			}
+			if(wrq->u.data.length < 26){
+				ret = -1;
+				break;
+			}
+
+			copy_from_user(data, (u8 *)wrq->u.data.pointer, wrq->u.data.length);
+			bTxEnable = data[1];
+			bAuthenticator = data[2];
+			bUpdate = data[3];
+		 	memcpy(PeerAddr,data+4,6);
+				
+			if(data[0] == 0x3){
+				if(!list_empty(&(pWapiInfo->wapiBKIDIdleList))){
+					pWapiBkid = (PRT_WAPI_BKID)list_entry(pWapiInfo->wapiBKIDIdleList.next, RT_WAPI_BKID,list);
+					list_del_init(&pWapiBkid->list);
+					memcpy(pWapiBkid->bkid, data+10, 16);
+					list_add_tail(&pWapiBkid->list, &pWapiInfo->wapiBKIDStoreList);
+					WAPI_DATA(WAPI_API, "SetKey - BKID", pWapiBkid->bkid, 16);
+				}
+			} else if (data[0] == 0x04){
+				list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) {
+					if(!memcmp(pWapiSta->PeerMacAddr,PeerAddr,6)){
+						if(bUpdate){
+							if(bAuthenticator) {
+								memcpy(pWapiSta->lastTxUnicastPN,WapiASUEPNInitialValueSrc,16);
+								memcpy(pWapiSta->lastRxUnicastPNBEQueue,WapiAEPNInitialValueSrc,16);
+								memcpy(pWapiSta->lastRxUnicastPNBKQueue,WapiAEPNInitialValueSrc,16);
+								memcpy(pWapiSta->lastRxUnicastPNVIQueue,WapiAEPNInitialValueSrc,16);
+								memcpy(pWapiSta->lastRxUnicastPNVOQueue,WapiAEPNInitialValueSrc,16);
+								memcpy(pWapiSta->lastRxUnicastPN,WapiAEPNInitialValueSrc,16);
+							} else {
+								memcpy(pWapiSta->lastTxUnicastPN,WapiAEPNInitialValueSrc,16);
+								memcpy(pWapiSta->lastRxUnicastPNBEQueue,WapiASUEPNInitialValueSrc,16);
+								memcpy(pWapiSta->lastRxUnicastPNBKQueue,WapiASUEPNInitialValueSrc,16);
+								memcpy(pWapiSta->lastRxUnicastPNVIQueue,WapiASUEPNInitialValueSrc,16);
+								memcpy(pWapiSta->lastRxUnicastPNVOQueue,WapiASUEPNInitialValueSrc,16);
+								memcpy(pWapiSta->lastRxUnicastPN,WapiASUEPNInitialValueSrc,16);
+							}
+						}
+					}
+				}
+			}
+			else{
+				list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) {
+					if(!memcmp(pWapiSta->PeerMacAddr,PeerAddr,6)){
+						pWapiSta->bAuthenticatorInUpdata = false;
+						switch(data[0]){
+						case 1:              
+							if(bAuthenticator){         
+								memcpy(pWapiSta->lastTxUnicastPN,WapiAEPNInitialValueSrc,16);
+								if(!bUpdate) {     
+									WAPI_TRACE(WAPI_API, "%s(): AE fisrt set usk!\n",__FUNCTION__);
+									pWapiSta->wapiUsk.bSet = true;
+									memcpy(pWapiSta->wapiUsk.dataKey,data+10,16);
+									memcpy(pWapiSta->wapiUsk.micKey,data+26,16);
+									pWapiSta->wapiUsk.keyId = *(data+42);
+									pWapiSta->wapiUsk.bTxEnable = true;
+									WAPI_DATA(WAPI_API, "SetKey - AE Usk Data Key", pWapiSta->wapiUsk.dataKey, 16);
+									WAPI_DATA(WAPI_API, "SetKey - AE Usk Mic Key", pWapiSta->wapiUsk.micKey, 16);
+								}
+								else               
+								{
+									WAPI_TRACE(WAPI_API, "%s(): AE update usk!\n",__FUNCTION__);
+									pWapiSta->wapiUskUpdate.bSet = true;
+									pWapiSta->bAuthenticatorInUpdata = true;
+									memcpy(pWapiSta->wapiUskUpdate.dataKey,data+10,16);
+									memcpy(pWapiSta->wapiUskUpdate.micKey,data+26,16);
+									memcpy(pWapiSta->lastRxUnicastPNBEQueue,WapiASUEPNInitialValueSrc,16);
+									memcpy(pWapiSta->lastRxUnicastPNBKQueue,WapiASUEPNInitialValueSrc,16);
+									memcpy(pWapiSta->lastRxUnicastPNVIQueue,WapiASUEPNInitialValueSrc,16);
+									memcpy(pWapiSta->lastRxUnicastPNVOQueue,WapiASUEPNInitialValueSrc,16);
+									memcpy(pWapiSta->lastRxUnicastPN,WapiASUEPNInitialValueSrc,16);
+									pWapiSta->wapiUskUpdate.keyId = *(data+42);
+									pWapiSta->wapiUskUpdate.bTxEnable = true;
+									WAPI_TRACE(WAPI_API, "%s(): keyid=%d\n",__FUNCTION__, pWapiSta->wapiUskUpdate.keyId);
+									WAPI_DATA(WAPI_API, "SetKey - AE Usk Data Key", pWapiSta->wapiUskUpdate.dataKey, 16);
+									WAPI_DATA(WAPI_API, "SetKey - AE Usk Mic Key", pWapiSta->wapiUskUpdate.micKey, 16);
+								}
+							}
+							else{
+								if(!bUpdate){
+									WAPI_TRACE(WAPI_API, "%s(): ASUE fisrt set usk!\n",__FUNCTION__);
+									if(bTxEnable){
+										pWapiSta->wapiUsk.bTxEnable = true;
+										memcpy(pWapiSta->lastTxUnicastPN,WapiASUEPNInitialValueSrc,16);
+										WAPI_TRACE(WAPI_API, "%s(): Tx enable!\n",__FUNCTION__);
+									}else{
+										pWapiSta->wapiUsk.bSet = true;
+										memcpy(pWapiSta->wapiUsk.dataKey,data+10,16);
+										memcpy(pWapiSta->wapiUsk.micKey,data+26,16);
+										pWapiSta->wapiUsk.keyId = *(data+42);
+										pWapiSta->wapiUsk.bTxEnable = false;
+										WAPI_TRACE(WAPI_API, "%s(): Tx disable!\n",__FUNCTION__);
+										WAPI_DATA(WAPI_API, "SetKey - AE Usk Data Key", pWapiSta->wapiUsk.dataKey, 16);
+										WAPI_DATA(WAPI_API, "SetKey - AE Usk Mic Key", pWapiSta->wapiUsk.micKey, 16);
+									}
+								}else{
+									WAPI_TRACE(WAPI_API, "%s(): ASUE update usk!\n",__FUNCTION__);
+									if(bTxEnable){
+										pWapiSta->wapiUskUpdate.bTxEnable = true;
+										if(pWapiSta->wapiUskUpdate.bSet){
+											WAPI_TRACE(WAPI_API, "%s(): ASUE set usk!\n",__FUNCTION__);
+											memcpy(pWapiSta->wapiUsk.dataKey,pWapiSta->wapiUskUpdate.dataKey,16);
+											memcpy(pWapiSta->wapiUsk.micKey,pWapiSta->wapiUskUpdate.micKey,16);
+											pWapiSta->wapiUsk.keyId=pWapiSta->wapiUskUpdate.keyId;
+											memcpy(pWapiSta->lastRxUnicastPNBEQueue,WapiAEPNInitialValueSrc,16);
+											memcpy(pWapiSta->lastRxUnicastPNBKQueue,WapiAEPNInitialValueSrc,16);
+											memcpy(pWapiSta->lastRxUnicastPNVIQueue,WapiAEPNInitialValueSrc,16);
+											memcpy(pWapiSta->lastRxUnicastPNVOQueue,WapiAEPNInitialValueSrc,16);
+											memcpy(pWapiSta->lastRxUnicastPN,WapiAEPNInitialValueSrc,16);
+											pWapiSta->wapiUskUpdate.bTxEnable = false;
+											pWapiSta->wapiUskUpdate.bSet = false;
+										}
+										memcpy(pWapiSta->lastTxUnicastPN,WapiASUEPNInitialValueSrc,16);
+									}else{
+										WAPI_TRACE(WAPI_API, "%s(): ASUE set update usk!\n",__FUNCTION__);
+										pWapiSta->wapiUskUpdate.bSet = true;
+										memcpy(pWapiSta->wapiUskUpdate.dataKey,data+10,16);
+										memcpy(pWapiSta->wapiUskUpdate.micKey,data+26,16);
+										pWapiSta->wapiUskUpdate.keyId = *(data+42);
+										pWapiSta->wapiUskUpdate.bTxEnable = false;
+										WAPI_TRACE(WAPI_API, "%s(): keyid=%d\n",__FUNCTION__, pWapiSta->wapiUskUpdate.keyId);
+										WAPI_DATA(WAPI_API, "SetKey - AE Usk Data Key", pWapiSta->wapiUskUpdate.dataKey, 16);
+										WAPI_DATA(WAPI_API, "SetKey - AE Usk Mic Key", pWapiSta->wapiUskUpdate.micKey, 16);
+									}
+								}
+							}
+							break;
+						case 2:		
+							if(bAuthenticator){          
+								pWapiInfo->wapiTxMsk.bSet = true;
+								memcpy(pWapiInfo->wapiTxMsk.dataKey,data+10,16);													
+								memcpy(pWapiInfo->wapiTxMsk.micKey,data+26,16);
+								pWapiInfo->wapiTxMsk.keyId = *(data+42);
+								pWapiInfo->wapiTxMsk.bTxEnable = true;
+								memcpy(pWapiInfo->lastTxMulticastPN,WapiAEMultiCastPNInitialValueSrc,16);
+								if(!bUpdate){      
+									WAPI_TRACE(WAPI_API, "%s(): AE fisrt set msk!\n",__FUNCTION__);
+									if(!pWapiSta->bSetkeyOk)
+										pWapiSta->bSetkeyOk = true;
+									pWapiInfo->bFirstAuthentiateInProgress= false;
+								}else{               
+									WAPI_TRACE(WAPI_API, "%s():AE update msk!\n",__FUNCTION__);
+								}
+								WAPI_TRACE(WAPI_API, "%s(): keyid=%d\n",__FUNCTION__, pWapiInfo->wapiTxMsk.keyId);
+								WAPI_DATA(WAPI_API, "SetKey - AE Msk Data Key", pWapiInfo->wapiTxMsk.dataKey, 16);
+								WAPI_DATA(WAPI_API, "SetKey - AE Msk Mic Key", pWapiInfo->wapiTxMsk.micKey, 16);
+							}
+							else{
+								if(!bUpdate){
+									WAPI_TRACE(WAPI_API, "%s(): ASUE fisrt set msk!\n",__FUNCTION__);
+									pWapiSta->wapiMsk.bSet = true;
+									memcpy(pWapiSta->wapiMsk.dataKey,data+10,16);													
+									memcpy(pWapiSta->wapiMsk.micKey,data+26,16);
+									pWapiSta->wapiMsk.keyId = *(data+42);
+									pWapiSta->wapiMsk.bTxEnable = false;
+									if(!pWapiSta->bSetkeyOk)
+										pWapiSta->bSetkeyOk = true;
+									pWapiInfo->bFirstAuthentiateInProgress= false;
+									WAPI_DATA(WAPI_API, "SetKey - ASUE Msk Data Key", pWapiSta->wapiMsk.dataKey, 16);
+									WAPI_DATA(WAPI_API, "SetKey - ASUE Msk Mic Key", pWapiSta->wapiMsk.micKey, 16);
+								}else{
+									WAPI_TRACE(WAPI_API, "%s(): ASUE update msk!\n",__FUNCTION__);
+									pWapiSta->wapiMskUpdate.bSet = true;
+									memcpy(pWapiSta->wapiMskUpdate.dataKey,data+10,16);													
+									memcpy(pWapiSta->wapiMskUpdate.micKey,data+26,16);
+									pWapiSta->wapiMskUpdate.keyId = *(data+42);
+									pWapiSta->wapiMskUpdate.bTxEnable = false;
+									WAPI_TRACE(WAPI_API, "%s(): keyid=%d\n",__FUNCTION__, pWapiSta->wapiMskUpdate.keyId);
+									WAPI_DATA(WAPI_API, "SetKey - ASUE Msk Data Key", pWapiSta->wapiMskUpdate.dataKey, 16);
+									WAPI_DATA(WAPI_API, "SetKey - ASUE Msk Mic Key", pWapiSta->wapiMskUpdate.micKey, 16);
+								}
+							}
+							break;
+						default:
+							WAPI_TRACE(WAPI_ERR, "%s(): Unknown Flag!\n",__FUNCTION__);
+							break;
+						}
+					}
+				}
+			}
+			break;
+		}
+	    	case WAPI_CMD_SET_MULTICAST_PN:
+		{
+			PRT_WAPI_T			pWapiInfo = &ieee->wapiInfo;
+			PRT_WAPI_STA_INFO	pWapiSta;
+			u8				data[22];
+			u8				k;
+
+			WAPI_TRACE(WAPI_API, "%s(): WAPI_CMD_SET_MULTICAST_PN!\n",__FUNCTION__);
+			if (!ieee->WapiSupport)
+			{
+				ret = -1;
+				break;    
+			}
+			if(wrq->u.data.length < 22){
+				ret = -1;
+				break;
+			}
+
+			memcpy(data, (u8 *)wrq->u.data.pointer, 22);
+			list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) {
+				if(!memcmp(pWapiSta->PeerMacAddr,data,6))
+				{
+					for(k=0;k<16;k++)
+						pWapiSta->lastRxMulticastPN[k] = data[21-k];
+					break;
+				}
+			}
+			WAPI_DATA(WAPI_API, "Multicast Rx PN:", pWapiSta->lastRxMulticastPN, 16);
+			break;
+		}
+	    	case WAPI_CMD_GET_PN:
+		{
+			PRT_WAPI_T		pWapiInfo = &ieee->wapiInfo;
+			
+			WAPI_TRACE(WAPI_API, "%s(): WAPI_CMD_GET_PN!\n",__FUNCTION__);
+			if (!ieee->WapiSupport){
+				ret = -1;
+				break;    
+			}
+			if(wrq->u.data.length<16){
+				ret = -1;
+				break;
+			}
+			if(copy_to_user((void *)(wrq->u.data.pointer), pWapiInfo->lastTxMulticastPN, 16)==0)
+				wrq->u.data.length = 16;
+			break;
+		}
+	    	case WAPI_CMD_GET_WAPIIE:
+		{
+			PRT_WAPI_T		pWapiInfo = &ieee->wapiInfo;
+			u8 				data[512];
+			u8				Length = 0;
+			
+			WAPI_TRACE(WAPI_API, "%s(): WAPI_CMD_GET_WAPIIE!\n",__FUNCTION__);
+			if (!ieee->WapiSupport){
+				ret = -1;
+				break;    
+			}
+			if(wrq->u.data.length<257){
+				ret = -1;
+				break;
+			}
+
+			if(ieee->iw_mode == IW_MODE_INFRA){
+				data[0]= pWapiInfo->assoReqWapiIELength;
+				Length ++;
+				memcpy(data+Length,pWapiInfo->assoReqWapiIE,pWapiInfo->assoReqWapiIELength);
+				Length += pWapiInfo->assoReqWapiIELength;
+			}
+			else if(ieee->iw_mode == IW_MODE_ADHOC){
+				WAPI_DATA(WAPI_API, "GetWapiIE - ADHOC", pWapiInfo->sendbeaconWapiIE, pWapiInfo->sendbeaconWapiIELength);
+				data[0] = pWapiInfo->sendbeaconWapiIELength;
+				Length++;
+				memcpy(data+Length,pWapiInfo->sendbeaconWapiIE,pWapiInfo->sendbeaconWapiIELength);
+				Length += pWapiInfo->sendbeaconWapiIELength;
+			}
+			
+			if(copy_to_user((void *)(wrq->u.data.pointer), data, Length)==0)
+				wrq->u.data.length = Length;
+			break;
+	    	}
+		case WAPI_CMD_SET_SSID:
+		{
+			u8 ssid[IW_ESSID_MAX_SIZE + 1];
+			
+			WAPI_TRACE(WAPI_API, "%s(): WAPI_CMD_SET_SSID!\n",__FUNCTION__);
+			if (!ieee->WapiSupport){
+				ret = -1;
+				break;    
+			}
+			if((wrq->u.data.length == 0) || (NULL == wrq->u.data.pointer)){
+				ret = -1;
+				break;
+			}
+			if(wrq->u.data.length > IW_ESSID_MAX_SIZE){
+				ret = -1;
+				break;
+			}
+			printk("===>%s(): wrq->u.essid.flags is %d\n",__FUNCTION__,wrq->u.essid.flags);
+			copy_from_user(ssid, (u8 *)wrq->u.essid.pointer, wrq->u.essid.length);
+
+#ifdef TO_DO_LIST
+			if(!ieee->wapiInfo.bWapiEnable)
+				SetEncryptState(dev);
+#endif			
+			if((priv->bHwRadioOff == true) || (!priv->up)){
+				ret = -1;
+				break;
+			}
+			ret = rtllib_wx_set_essid(ieee,NULL,(union iwreq_data *)&(wrq->u),ssid);
+			
+			break;
+		}
+		case WAPI_CMD_GET_BSSID:
+			WAPI_TRACE(WAPI_API, "%s(): WAPI_CMD_GET_BSSID!\n",__FUNCTION__);
+			if (!ieee->WapiSupport){
+				ret = -1;
+				break;    
+			}
+			if((ieee->iw_mode == IW_MODE_INFRA) || (ieee->iw_mode == IW_MODE_ADHOC) ){
+				if(copy_to_user((void *)(wrq->u.data.pointer), ieee->current_network.bssid, ETH_ALEN)==0)
+					wrq->u.data.length = ETH_ALEN;
+			}else{
+				ret = -1;
+			}
+			break;
+#if 0			
+		case WAPI_CMD_GET_LINK_STATUS:
+		{
+			u8 connect_status = 0;  
+			
+			WAPI_TRACE(WAPI_API, "%s(): WAPI_CMD_GET_LINK_STATUS!\n",__FUNCTION__);
+			if(ieee->state == IEEE80211_LINKED)
+				connect_status = 1;
+			if(copy_to_user((void *)(wrq->u.data.pointer), &connect_status, sizeof(u8))==0)
+				wrq->u.data.length = sizeof(u8);
+			break;
+		}
+#endif
+		case WAPI_CMD_SET_IW_MODE:
+		{
+			union iwreq_data *wrqu = (union iwreq_data *)&(wrq->u);
+			WAPI_TRACE(WAPI_API, "%s(): WAPI_CMD_SET_IW_MODE!\n",__FUNCTION__);
+			if (!ieee->WapiSupport){
+				ret = -1;
+				break;    
+			}
+			WAPI_TRACE(WAPI_API, "%s(): Set iw_mode %d!\n",__FUNCTION__, wrqu->mode);
+			wapi_ioctl_set_mode(dev, NULL, wrqu, NULL);
+			if(wrqu->mode == IW_MODE_ADHOC)
+				ConstructWapiIEForInit(ieee);
+			break;
+		}
+		case WAPI_CMD_SET_DISASSOCIATE:
+		{
+			u8 destAddr[6];
+			
+			WAPI_TRACE(WAPI_API, "%s(): WAPI_CMD_SET_DISASSOCIATE!\n",__FUNCTION__);
+			if (!ieee->WapiSupport){
+				ret = -1;
+				break;    
+			}
+			if(wrq->u.data.length != 6){
+				ret = -1;
+				break;
+			}
+			copy_from_user(destAddr, (u8 *)(wrq->u.data.pointer), wrq->u.data.length);
+
+			if(ieee->iw_mode == IW_MODE_INFRA){
+				SendDisassociation(ieee,1,deauth_lv_ss);
+				ieee80211_disassociate_from_app(ieee);
+			}else if(ieee->iw_mode == IW_MODE_ADHOC){
+				WAPI_TRACE(WAPI_API, "%s(): Disassociate "MAC_FMT"!\n",__FUNCTION__, MAC_ARG(destAddr));
+				WapiReturnOneStaInfo(ieee, destAddr, 1);
+				DelStaInfo(ieee, destAddr);
+			}
+			break;
+		}
+		case WAPI_CMD_SAVE_PID:
+		{
+			u8 strPID[10];
+			u32 len = 0;
+			int i = 0;
+
+			WAPI_TRACE(WAPI_API, "%s(): WAPI_CMD_SAVE_PID!\n",__FUNCTION__);
+			if (!ieee->WapiSupport){
+				ret = -1;
+				break;    
+			}
+			if ( !wrq->u.data.pointer ){
+				ret = -1;
+				break;
+			}
+
+			len = wrq->u.data.length;
+			memset(strPID, 0, sizeof(strPID));
+			if(copy_from_user(strPID, (void *)wrq->u.data.pointer, len)){
+				ret = -1;
+				break;
+			}
+
+			pid_wapi = 0;
+			for(i = 0; i < len; i++) {
+				pid_wapi = pid_wapi * 10 + (strPID[i] - 48);
+			}		
+			WAPI_TRACE(WAPI_API, "%s(): strPID=%s pid_wapi=%d!\n",__FUNCTION__, strPID, pid_wapi);
+			break;	
+		}
+	    	case WAPI_CMD_DEQUEUE:
+		{
+			int QueueDataLen = 0;
+
+			WAPI_TRACE(WAPI_API, "%s(): WAPI_CMD_DEQUEUE!\n",__FUNCTION__);
+			if((ret = WAPI_DeQueue(&ieee->wapi_queue_lock, ieee->wapi_queue, QueueData, &QueueDataLen)) != 0){
+				if(copy_to_user((void *)(wrq->u.data.pointer), DATAQUEUE_EMPTY, sizeof(DATAQUEUE_EMPTY))==0)
+					wrq->u.data.length = sizeof(DATAQUEUE_EMPTY);
+			}else{
+				if(copy_to_user((void *)wrq->u.data.pointer, (void *)QueueData, QueueDataLen)==0)
+					wrq->u.data.length = QueueDataLen;
+			}	
+			break;
+		}
+		default:
+			WAPI_TRACE(WAPI_ERR, "%s(): Error CMD!\n",__FUNCTION__);
+			break;
+	}
+	
+	return ret;
+}
+#endif
+
+/* based on ipw2200 driver */
+int rtl8192_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	struct iwreq *wrq = (struct iwreq *)rq;
+	int ret=-1;
+	struct rtllib_device *ieee = priv->rtllib;
+	u32 key[4];
+	u8 broadcast_addr[6] = {0xff,0xff,0xff,0xff,0xff,0xff};
+	u8 zero_addr[6] = {0};
+	struct iw_point *p = &wrq->u.data;
+
+	down(&priv->wx_sem);
+
+	switch (cmd) {
+		case RTL_IOCTL_WPA_SUPPLICANT:
+		{
+			struct ieee_param *ipw = NULL;
+	if (p->length < sizeof(struct ieee_param) || !p->pointer){
+		ret = -EINVAL;
+		goto out;
+	}
+
+	ipw = (struct ieee_param *)kmalloc(p->length, GFP_KERNEL);
+	if (ipw == NULL){
+		ret = -ENOMEM;
+		goto out;
+	}
+	if (copy_from_user(ipw, p->pointer, p->length)) {
+		kfree(ipw);
+		ret = -EFAULT;
+		goto out;
+	}
+
+			if (ipw->cmd == IEEE_CMD_SET_ENCRYPTION)
+			{
+				if (ipw->u.crypt.set_tx)
+				{
+					if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
+						ieee->pairwise_key_type = KEY_TYPE_CCMP;
+					else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
+						ieee->pairwise_key_type = KEY_TYPE_TKIP;
+					else if (strcmp(ipw->u.crypt.alg, "WEP") == 0)
+					{
+						if (ipw->u.crypt.key_len == 13)
+							ieee->pairwise_key_type = KEY_TYPE_WEP104;
+						else if (ipw->u.crypt.key_len == 5)
+							ieee->pairwise_key_type = KEY_TYPE_WEP40;
+					}
+					else
+						ieee->pairwise_key_type = KEY_TYPE_NA;
+
+					if (ieee->pairwise_key_type)
+					{
+						if (memcmp(ieee->ap_mac_addr, zero_addr, 6) == 0)
+							ieee->iw_mode = IW_MODE_ADHOC;
+
+						memcpy((u8*)key, ipw->u.crypt.key, 16);
+						EnableHWSecurityConfig8192(dev);
+						set_swcam(dev, 4, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key,0);
+						setKey(dev, 4, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key);
+						if (ieee->iw_mode == IW_MODE_ADHOC){  
+							set_swcam(dev, ipw->u.crypt.idx, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key,0);
+							setKey(dev, ipw->u.crypt.idx, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key);
+						}
+					}
+#ifdef RTL8192E
+					if ((ieee->pairwise_key_type == KEY_TYPE_CCMP) && ieee->pHTInfo->bCurrentHTSupport){
+						write_nic_byte(dev, 0x173, 1); 
+					}
+#endif
+
+				}
+				else 
+				{
+					memcpy((u8*)key, ipw->u.crypt.key, 16);
+					if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
+						ieee->group_key_type= KEY_TYPE_CCMP;
+					else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
+						ieee->group_key_type = KEY_TYPE_TKIP;
+					else if (strcmp(ipw->u.crypt.alg, "WEP") == 0)
+					{
+						if (ipw->u.crypt.key_len == 13)
+							ieee->group_key_type = KEY_TYPE_WEP104;
+						else if (ipw->u.crypt.key_len == 5)
+							ieee->group_key_type = KEY_TYPE_WEP40;
+					}
+					else
+						ieee->group_key_type = KEY_TYPE_NA;
+
+					if (ieee->group_key_type)
+					{
+						set_swcam(	dev, 
+								ipw->u.crypt.idx,
+								ipw->u.crypt.idx,		
+								ieee->group_key_type,	
+								broadcast_addr,	
+								0,		
+								key,		
+								0);
+						setKey(	dev, 
+								ipw->u.crypt.idx,
+								ipw->u.crypt.idx,		
+								ieee->group_key_type,	
+								broadcast_addr,	
+								0,		
+								key);		
+					}
+				}
+			}
+#ifdef JOHN_DEBUG
+			{
+				int i;
+				printk("@@ wrq->u pointer = ");
+				for(i=0;i<wrq->u.data.length;i++){
+					if(i%10==0) printk("\n");
+					printk( "%8x|", ((u32*)wrq->u.data.pointer)[i] );
+				}
+				printk("\n");
+			}
+#endif 
+#ifdef _RTL8192_EXT_PATCH_
+			ret = rtllib_wpa_supplicant_ioctl(priv->rtllib, &wrq->u.data,0);
+#else
+			ret = rtllib_wpa_supplicant_ioctl(priv->rtllib, &wrq->u.data);
+#endif
+			kfree(ipw);
+			break; 
+		}
+#if defined (RTL8192S_WAPI_SUPPORT)
+	    	case WAPI_CMD_GET_WAPI_SUPPORT:
+	    	case WAPI_CMD_SET_WAPI_ENABLE:
+	    	case WAPI_CMD_SET_WAPI_PSK:
+	    	case WAPI_CMD_SET_KEY:
+	    	case WAPI_CMD_SET_MULTICAST_PN:
+	    	case WAPI_CMD_GET_PN:
+	    	case WAPI_CMD_GET_WAPIIE:
+	    	case WAPI_CMD_SET_SSID:
+	    	case WAPI_CMD_GET_BSSID:
+	    	case WAPI_CMD_SET_IW_MODE:
+	    	case WAPI_CMD_SET_DISASSOCIATE:
+		case WAPI_CMD_SAVE_PID:
+	    	case WAPI_CMD_DEQUEUE:
+			ret = WAPI_Ioctl(dev, wrq, cmd);
+			break;
+#endif
+		default:
+			ret = -EOPNOTSUPP;
+			break;
+	}
+
+out:
+	up(&priv->wx_sem);
+
+	return ret;
+}
+
+irqreturn_type rtl8192_interrupt(int irq, void *netdev, struct pt_regs *regs)
+{
+	struct net_device *dev = (struct net_device *) netdev;
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+#ifdef _RTL8192_EXT_PATCH_
+	struct net_device *meshdev = ((struct rtllib_device *)netdev_priv_rsl(dev))->meshdev;
+#endif
+	unsigned long flags;
+	u32 inta;
+	u32 intb;
+	intb = 0;
+	
+	if(priv->irq_enabled == 0){
+		goto done;
+	}
+
+	spin_lock_irqsave(&priv->irq_th_lock,flags);
+
+	priv->ops->interrupt_recognized(dev, &inta, &intb);
+	priv->stats.shints++;
+
+	if (!inta) {
+		spin_unlock_irqrestore(&priv->irq_th_lock,flags);
+		goto done;
+	}
+
+	if (inta == 0xffff) {
+		spin_unlock_irqrestore(&priv->irq_th_lock,flags);
+		goto done;
+	}
+
+	priv->stats.ints++;
+
+#ifdef _RTL8192_EXT_PATCH_
+	if (!netif_running(dev) && !netif_running(meshdev)) 
+#else
+	if (!netif_running(dev)) 
+#endif
+	{
+		spin_unlock_irqrestore(&priv->irq_th_lock,flags);
+		goto done;
+	}
+
+#if defined RTL8192SE 
+	if(intb & IMR_TBDOK){
+		RT_TRACE(COMP_INTR, "beacon ok interrupt!\n");
+		priv->stats.txbeaconokint++;
+	}
+
+	if(intb & IMR_TBDER){
+		RT_TRACE(COMP_INTR, "beacon ok interrupt!\n");
+		priv->stats.txbeaconerr++;
+	}
+#else
+	if(inta & IMR_TBDOK){
+		RT_TRACE(COMP_INTR, "beacon ok interrupt!\n");
+		priv->stats.txbeaconokint++;
+	}
+
+	if(inta & IMR_TBDER){
+		RT_TRACE(COMP_INTR, "beacon ok interrupt!\n");
+		priv->stats.txbeaconerr++;
+	}
+#endif
+
+	if(inta & IMR_BDOK) {
+		RT_TRACE(COMP_INTR, "beacon interrupt!\n");
+		rtl8192_tx_isr(dev, BEACON_QUEUE);
+	}
+
+	if(inta  & IMR_MGNTDOK ) {
+		RT_TRACE(COMP_INTR, "Manage ok interrupt!\n");
+		priv->stats.txmanageokint++;
+		rtl8192_tx_isr(dev,MGNT_QUEUE);
+		spin_unlock_irqrestore(&priv->irq_th_lock,flags);
+		if (priv->rtllib->ack_tx_to_ieee){
+			if (rtl8192_is_tx_queue_empty(dev)){
+				priv->rtllib->ack_tx_to_ieee = 0;
+				rtllib_ps_tx_ack(priv->rtllib, 1);
+			}
+		}
+		spin_lock_irqsave(&priv->irq_th_lock,flags);
+	}
+
+#ifndef RTL8192CE
+	if (inta & IMR_COMDOK) {
+		priv->stats.txcmdpktokint++;
+		rtl8192_tx_isr(dev,TXCMD_QUEUE);
+	}
+#endif
+
+	if (inta & IMR_HIGHDOK) {
+		rtl8192_tx_isr(dev,HIGH_QUEUE);
+	}
+
+#ifdef RTL8192SE
+	if ((inta & IMR_ROK) || (inta & IMR_RXCMDOK))
+#else
+	if (inta & IMR_ROK) 
+#endif
+	{
+		priv->stats.rxint++;
+		priv->InterruptLog.nIMR_ROK++;
+		tasklet_schedule(&priv->irq_rx_tasklet);
+	}
+
+	if (inta & IMR_BcnInt) {
+		RT_TRACE(COMP_INTR, "prepare beacon for interrupt!\n");
+		tasklet_schedule(&priv->irq_prepare_beacon_tasklet);
+	}
+
+	if (inta & IMR_RDU) {
+		RT_TRACE(COMP_INTR, "rx descriptor unavailable!\n");
+		priv->stats.rxrdu++;
+#ifndef RTL8192CE
+		write_nic_dword(dev,INTA_MASK,read_nic_dword(dev, INTA_MASK) & ~IMR_RDU); 
+#endif    
+		tasklet_schedule(&priv->irq_rx_tasklet);
+	}
+
+	if (inta & IMR_RXFOVW) {
+		RT_TRACE(COMP_INTR, "rx overflow !\n");
+		priv->stats.rxoverflow++;
+		tasklet_schedule(&priv->irq_rx_tasklet);
+	}
+
+	if (inta & IMR_TXFOVW) priv->stats.txoverflow++;
+
+	if (inta & IMR_BKDOK) { 
+		RT_TRACE(COMP_INTR, "BK Tx OK interrupt!\n");
+		priv->stats.txbkokint++;
+		priv->rtllib->LinkDetectInfo.NumTxOkInPeriod++;
+		rtl8192_tx_isr(dev,BK_QUEUE);
+	}
+
+	if (inta & IMR_BEDOK) { 
+		RT_TRACE(COMP_INTR, "BE TX OK interrupt!\n");
+		priv->stats.txbeokint++;
+		priv->rtllib->LinkDetectInfo.NumTxOkInPeriod++;
+		rtl8192_tx_isr(dev,BE_QUEUE);
+	}
+
+	if (inta & IMR_VIDOK) { 
+		RT_TRACE(COMP_INTR, "VI TX OK interrupt!\n");
+		priv->stats.txviokint++;
+		priv->rtllib->LinkDetectInfo.NumTxOkInPeriod++;
+		rtl8192_tx_isr(dev,VI_QUEUE);
+	}
+
+	if (inta & IMR_VODOK) { 
+		priv->stats.txvookint++;
+		RT_TRACE(COMP_INTR, "Vo TX OK interrupt!\n");
+		priv->rtllib->LinkDetectInfo.NumTxOkInPeriod++;
+		rtl8192_tx_isr(dev,VO_QUEUE);
+	}
+
+	spin_unlock_irqrestore(&priv->irq_th_lock,flags);
+
+done:
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
+	return;
+#else
+	return IRQ_HANDLED;
+#endif
+}
+
+#ifdef RTL8192CE
+static void rtl8192_parse_pci_configuration(struct pci_dev *pdev, struct net_device *dev)
+{
+	u8 tmp;
+	
+	pci_read_config_byte(pdev, 0x98, &tmp);
+	tmp |=BIT4;
+	pci_write_config_byte(pdev, 0x98, tmp);
+
+	tmp = 0x17;
+	pci_write_config_byte(pdev, 0x70f, tmp);
+}
+#endif
+
+bool rtl8192_pci_findadapter(struct pci_dev *pdev, struct net_device *dev)
+{
+	u16  DeviceID;
+	u8 RevisionID = 0;
+	
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+
+	pci_read_config_word(pdev, 0x2, &DeviceID);
+	pci_read_config_byte(pdev, 0x8, &RevisionID);
+	if (DeviceID == HAL_HW_PCI_8190_DEVICE_ID ||DeviceID == HAL_HW_PCI_0045_DEVICE_ID ||
+	 	DeviceID == HAL_HW_PCI_0046_DEVICE_ID ||DeviceID == HAL_HW_PCI_DLINK_DEVICE_ID){
+		printk("Adapter(8190 PCI) is found - DeviceID=%x\n", DeviceID);
+		priv->ops->nic_type = priv->card_8192 = NIC_8190P;
+	} else if (DeviceID == HAL_HW_PCI_8192_DEVICE_ID ||DeviceID == HAL_HW_PCI_0044_DEVICE_ID ||
+		DeviceID == HAL_HW_PCI_0047_DEVICE_ID || DeviceID == HAL_HW_PCI_8192SE_DEVICE_ID ||
+		DeviceID == HAL_HW_PCI_8174_DEVICE_ID || DeviceID == HAL_HW_PCI_8173_DEVICE_ID ||
+		DeviceID == HAL_HW_PCI_8172_DEVICE_ID || DeviceID == HAL_HW_PCI_8171_DEVICE_ID) {
+		
+		switch(RevisionID)
+		{
+			case HAL_HW_PCI_REVISION_ID_8192PCIE:
+				printk("Adapter(8192 PCI-E) is found - DeviceID=%x\n", DeviceID);
+				priv->ops->nic_type = priv->card_8192 = NIC_8192E;
+				break;
+			case HAL_HW_PCI_REVISION_ID_8192SE:
+				printk("Adapter(8192SE) is found - DeviceID=%x\n", DeviceID);
+				priv->card_8192 = NIC_8192SE;
+				break;
+			default:
+				printk("UNKNOWN nic type(%4x:%4x)\n", pdev->vendor, pdev->device);
+				priv->card_8192 = NIC_UNKNOWN;
+
+			return false;
+			break;
+				
+		}
+	} else 
+		if (DeviceID == HAL_HW_PCI_8192CET_DEVICE_ID ||DeviceID == HAL_HW_PCI_8192CE_DEVICE_ID ||
+		DeviceID == HAL_HW_PCI_8191CE_DEVICE_ID ||DeviceID == HAL_HW_PCI_8188CE_DEVICE_ID) {
+			printk("Adapter(8192CE) is found - DeviceID=%x\n", DeviceID);
+			priv->ops->nic_type = priv->card_8192 = NIC_8192CE;
+	} else {
+		printk("Unknown device - DeviceID=%x\n", DeviceID);
+		priv->ops->nic_type = priv->card_8192 = NIC_8192DE;
+	}
+		
+#ifdef RTL8192CE
+	rtl8192_parse_pci_configuration(pdev, dev);
+#endif
+	
+	return true;
+}
+
+/****************************************************************************
+     ---------------------------- PCI_STUFF---------------------------
+*****************************************************************************/
+#ifdef HAVE_NET_DEVICE_OPS
+static const struct net_device_ops rtl8192_netdev_ops = {
+	.ndo_open = rtl8192_open,
+	.ndo_stop = rtl8192_close,
+	.ndo_tx_timeout = rtl8192_tx_timeout,
+	.ndo_do_ioctl = rtl8192_ioctl,
+	.ndo_set_multicast_list = r8192_set_multicast,
+	.ndo_set_mac_address = r8192_set_mac_adr,
+	.ndo_validate_addr = eth_validate_addr,
+	.ndo_change_mtu = eth_change_mtu,
+	.ndo_start_xmit = rtllib_xmit,
+};
+#endif
+
+static int __devinit rtl8192_pci_probe(struct pci_dev *pdev,
+			 const struct pci_device_id *id)
+{
+	unsigned long ioaddr = 0;
+	struct net_device *dev = NULL;
+	struct r8192_priv *priv= NULL;
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
+	struct rtl819x_ops *ops = (struct rtl819x_ops *)(id->driver_data);
+#endif
+	
+#ifdef CONFIG_RTL8192_IO_MAP
+	unsigned long pio_start, pio_len, pio_flags;
+#else
+	unsigned long pmem_start, pmem_len, pmem_flags;
+#endif 
+	int err = 0;
+#ifdef _RTL8192_EXT_PATCH_
+	int result;
+	struct net_device *meshdev = NULL;
+	struct meshdev_priv *mpriv;
+	char meshifname[]="mesh0";
+#endif	
+	bool bdma64 = false;
+
+	RT_TRACE(COMP_INIT,"Configuring chip resources");
+	
+	if( pci_enable_device (pdev) ){
+		RT_TRACE(COMP_ERR,"Failed to enable PCI device");
+		return -EIO;
+	}
+
+	pci_set_master(pdev);
+
+#ifdef CONFIG_64BIT_DMA
+	if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
+		printk("RTL819xCE: Using 64bit DMA\n");
+		if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
+			printk( "Unable to obtain 64bit DMA for consistent allocations\n");
+			pci_disable_device(pdev);
+			return -ENOMEM;
+		}
+		bdma64 = true;
+	} else 
+#endif
+	{
+		if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
+			if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
+				printk( "Unable to obtain 32bit DMA for consistent allocations\n");
+				pci_disable_device(pdev);
+				return -ENOMEM;
+			} 
+#endif	
+		}
+	}
+	dev = alloc_rtllib(sizeof(struct r8192_priv));
+	if (!dev)
+		return -ENOMEM;
+	
+	if(bdma64){
+		dev->features |= NETIF_F_HIGHDMA;
+	}
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
+	SET_MODULE_OWNER(dev);
+#endif
+
+	pci_set_drvdata(pdev, dev);	
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
+	SET_NETDEV_DEV(dev, &pdev->dev);
+#endif
+	priv = rtllib_priv(dev);
+	priv->rtllib = (struct rtllib_device *)netdev_priv_rsl(dev);
+	priv->pdev=pdev;
+	priv->rtllib->pdev=pdev;
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
+	if((pdev->subsystem_vendor == PCI_VENDOR_ID_DLINK)&&(pdev->subsystem_device == 0x3304)){
+		priv->rtllib->bSupportRemoteWakeUp = 1;
+	} else 
+#endif
+	{
+		priv->rtllib->bSupportRemoteWakeUp = 0;
+	}
+
+#ifdef CONFIG_RTL8192_IO_MAP
+	pio_start = (unsigned long)pci_resource_start (pdev, 0);
+	pio_len = (unsigned long)pci_resource_len (pdev, 0);
+	pio_flags = (unsigned long)pci_resource_flags (pdev, 0);
+ 	
+      	if (!(pio_flags & IORESOURCE_IO)) {
+		RT_TRACE(COMP_ERR,"region #0 not a PIO resource, aborting");
+		goto fail;
+	}
+	
+	printk("Io mapped space start: 0x%08lx \n", pio_start );
+	if( ! request_region( pio_start, pio_len, DRV_NAME ) ){
+		RT_TRACE(COMP_ERR,"request_region failed!");
+		goto fail;
+	}
+	
+	ioaddr = pio_start;
+	dev->base_addr = ioaddr; 
+#else
+#ifdef RTL8192CE
+	pmem_start = pci_resource_start(pdev, 2);
+	pmem_len = pci_resource_len(pdev, 2);
+	pmem_flags = pci_resource_flags (pdev, 2);
+#else
+	pmem_start = pci_resource_start(pdev, 1);
+	pmem_len = pci_resource_len(pdev, 1);
+	pmem_flags = pci_resource_flags (pdev, 1);
+#endif
+	
+	if (!(pmem_flags & IORESOURCE_MEM)) {
+		RT_TRACE(COMP_ERR,"region #1 not a MMIO resource, aborting");
+		goto fail;
+	}
+	
+	printk("Memory mapped space start: 0x%08lx \n", pmem_start);
+	if (!request_mem_region(pmem_start, pmem_len, DRV_NAME)) {
+		RT_TRACE(COMP_ERR,"request_mem_region failed!");
+		goto fail;
+	}
+	
+	
+	ioaddr = (unsigned long)ioremap_nocache( pmem_start, pmem_len);	
+	if( ioaddr == (unsigned long)NULL ){
+		RT_TRACE(COMP_ERR,"ioremap failed!");
+		goto fail1;
+	}
+	
+	dev->mem_start = ioaddr; 
+	dev->mem_end = ioaddr + pci_resource_len(pdev, 0); 
+	
+#endif 
+#if defined RTL8192SE || defined RTL8192CE
+        pci_write_config_byte(pdev, 0x81,0);
+        pci_write_config_byte(pdev,0x44,0);
+        pci_write_config_byte(pdev,0x04,0x06);
+        pci_write_config_byte(pdev,0x04,0x07);
+#endif        
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
+	priv->ops = ops;
+#else
+#if defined RTL8190P || defined RTL8192E
+	priv->ops = &rtl819xp_ops;
+#else
+	priv->ops = &rtl8192se_ops;
+#endif
+#endif
+
+	if(rtl8192_pci_findadapter(pdev, dev) == false)
+		goto fail1;
+
+	dev->irq = pdev->irq;
+	priv->irq = 0;
+
+#ifdef HAVE_NET_DEVICE_OPS
+	dev->netdev_ops = &rtl8192_netdev_ops;
+#else	
+	dev->open = rtl8192_open;
+	dev->stop = rtl8192_close;
+	dev->tx_timeout = rtl8192_tx_timeout;
+	dev->do_ioctl = rtl8192_ioctl;
+	dev->set_multicast_list = r8192_set_multicast;
+	dev->set_mac_address = r8192_set_mac_adr;
+	dev->hard_start_xmit = rtllib_xmit;
+#endif	
+
+#if WIRELESS_EXT >= 12
+#if WIRELESS_EXT < 17
+        dev->get_wireless_stats = r8192_get_wireless_stats;
+#endif
+        dev->wireless_handlers = (struct iw_handler_def *) &r8192_wx_handlers_def;
+#endif
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)	
+	dev->ethtool_ops = &rtl819x_ethtool_ops;
+#endif
+
+	dev->type = ARPHRD_ETHER;
+	dev->watchdog_timeo = HZ*3;	
+
+	if (dev_alloc_name(dev, ifname) < 0){
+                RT_TRACE(COMP_INIT, "Oops: devname already taken! Trying wlan%%d...\n");
+		dev_alloc_name(dev, ifname);
+        }
+	
+	RT_TRACE(COMP_INIT, "Driver probe completed1\n");
+	if(rtl8192_init(dev)!=0){ 
+		RT_TRACE(COMP_ERR, "Initialization failed");
+		goto fail1;
+	}
+
+#ifdef CONFIG_CFG_80211 
+	if(!rtl8192_register_wiphy_dev(dev))
+		goto fail1;
+#endif
+
+	netif_carrier_off(dev);
+	netif_stop_queue(dev);
+	
+	register_netdev(dev);
+	RT_TRACE(COMP_INIT, "dev name: %s\n",dev->name);
+	err = rtl_debug_module_init(priv, dev->name);
+	if (err) {
+		RT_TRACE(COMP_DBG, "failed to create debugfs files. Ignoring error: %d\n", err);	
+	}
+	rtl8192_proc_init_one(dev);
+	
+#ifdef ENABLE_GPIO_RADIO_CTL
+	if(priv->polling_timer_on == 0){
+		check_rfctrl_gpio_timer((unsigned long)dev);
+	}
+#endif
+#ifdef _RTL8192_EXT_PATCH_
+	meshdev = alloc_netdev(sizeof(struct meshdev_priv),meshifname,meshdev_init);
+	netif_stop_queue(meshdev);
+	memcpy(meshdev->dev_addr, dev->dev_addr, ETH_ALEN);
+	DMESG("Card MAC address for meshdev is "MAC_FMT, MAC_ARG(meshdev->dev_addr));
+
+	meshdev->base_addr = dev->base_addr;
+	meshdev->irq = dev->irq;
+	meshdev->mem_start = dev->mem_start;
+	meshdev->mem_end = dev->mem_end;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21)
+	SET_NETDEV_DEV(meshdev, dev->dev.parent);
+#endif
+
+	if ((result = register_netdev(meshdev)))
+	{
+		printk("Error %i registering device %s",result, meshdev->name);
+		goto fail;	
+	}
+	else
+	{
+		mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+		priv->rtllib->meshdev=meshdev;
+		priv->rtllib->meshstats=meshdev_stats(meshdev);
+		priv->rtllib->only_mesh = 1;  
+		priv->rtllib->p2pmode = 0;
+		priv->rtllib->serverExtChlOffset = 0;
+		priv->rtllib->APExtChlOffset = 0;
+		mpriv->rtllib = priv->rtllib;
+		mpriv->priv = priv;
+	}
+#endif
+	
+#ifdef RTL8192CE
+	mdelay(1000);
+#endif
+
+#ifdef CONFIG_RTL_RFKILL
+	if (priv->ops->init_before_adapter_start) {
+		priv->ops->init_before_adapter_start(dev);
+		priv->initialized_at_probe = true;
+	}
+	if (!rtl8192_rfkill_init(dev)) {
+		goto fail1;
+	}
+#endif	
+
+#if defined CONFIG_ASPM_OR_D3
+	rtl8192_initialize_adapter_common(dev);
+#endif
+
+	RT_TRACE(COMP_INIT, "Driver probe completed\n");
+	return 0;	
+
+fail1:
+#ifdef CONFIG_RTL8192_IO_MAP
+		
+	if( dev->base_addr != 0 ){
+			
+		release_region(dev->base_addr, 
+	       pci_resource_len(pdev, 0) );
+	}
+#else
+	if( dev->mem_start != (unsigned long)NULL ){
+		iounmap( (void *)dev->mem_start );
+#ifdef RTL8192CE
+		release_mem_region( pci_resource_start(pdev, 2), 
+				    pci_resource_len(pdev, 2) );
+#else
+		release_mem_region( pci_resource_start(pdev, 1), 
+				    pci_resource_len(pdev, 1) );
+#endif
+	}
+#endif 
+	
+fail:
+	if(dev){
+		
+		if (priv->irq) {
+			free_irq(dev->irq, dev);
+			dev->irq=0;
+		}
+		free_rtllib(dev);
+	}
+	
+	pci_disable_device(pdev);
+	
+	DMESG("wlan driver load failed\n");
+	pci_set_drvdata(pdev, NULL);
+	return -ENODEV;
+	
+}
+
+static void __devexit rtl8192_pci_disconnect(struct pci_dev *pdev)
+{
+	struct net_device *dev = pci_get_drvdata(pdev);
+	struct r8192_priv *priv ;
+#ifdef _RTL8192_EXT_PATCH_
+	struct net_device *meshdev;
+#endif
+	if(dev){
+#ifdef CONFIG_RTL_RFKILL
+		rtl8192_rfkill_exit(dev);
+#endif
+		unregister_netdev(dev);
+		
+		priv = rtllib_priv(dev);
+		
+#ifdef _RTL8192_EXT_PATCH_
+		rtl8192_dinit_mshobj(priv);	
+#endif 
+
+#ifdef ENABLE_GPIO_RADIO_CTL
+		del_timer_sync(&priv->gpio_polling_timer);
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)	
+		cancel_delayed_work(&priv->gpio_change_rf_wq);
+#endif
+		priv->polling_timer_on = 0;
+#endif
+		rtl_debug_module_remove(priv);
+		rtl8192_proc_remove_one(dev);
+#ifdef _RTL8192_EXT_PATCH_
+		rtl8192_down(dev,true);
+		if(priv && priv->rtllib->meshdev)
+		{
+			meshdev = priv->rtllib->meshdev;
+			priv->rtllib->meshdev = NULL;
+		
+			if(meshdev){
+				meshdev_down(meshdev);
+				unregister_netdev(meshdev);
+			}
+		}
+#else		
+		rtl8192_down(dev,true);
+#endif
+		deinit_hal_dm(dev);
+#ifdef CONFIG_ASPM_OR_D3
+		;
+#endif
+#ifdef RTL8192SE
+		DeInitSwLeds(dev);
+#endif
+		if (priv->pFirmware)
+		{
+			vfree(priv->pFirmware);
+			priv->pFirmware = NULL;
+		}
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
+		destroy_workqueue(priv->priv_wq);
+#endif
+                {
+                    u32 i;
+                    rtl8192_free_rx_ring(dev);
+                    for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) {
+                        rtl8192_free_tx_ring(dev, i);
+                    }
+                }
+
+		if(priv->irq){
+			
+			printk("Freeing irq %d\n",dev->irq);
+			free_irq(dev->irq, dev);
+			priv->irq=0;
+			
+		}
+#ifdef CONFIG_RTL8192_IO_MAP
+		if( dev->base_addr != 0 ){
+			
+			release_region(dev->base_addr, 
+				       pci_resource_len(pdev, 0) );
+		}
+#else
+		if( dev->mem_start != (unsigned long)NULL ){
+			iounmap( (void *)dev->mem_start );
+#ifdef RTL8192CE
+			release_mem_region( pci_resource_start(pdev, 2), 
+				    pci_resource_len(pdev, 2) );
+#else
+			release_mem_region( pci_resource_start(pdev, 1), 
+					    pci_resource_len(pdev, 1) );
+#endif
+		}
+#endif /*end #ifdef RTL_IO_MAP*/
+		free_rtllib(dev);
+
+		if(priv->scan_cmd)
+			kfree(priv->scan_cmd);
+
+	} else{
+		priv=rtllib_priv(dev);
+        }
+
+	pci_disable_device(pdev);
+#ifdef RTL8192SE   
+        pci_write_config_byte(pdev, 0x81,1);
+        pci_write_config_byte(pdev,0x44,3);
+#endif
+	RT_TRACE(COMP_DOWN, "wlan driver removed\n");
+}
+
+bool NicIFEnableNIC(struct net_device* dev)
+{
+	bool init_status = true;
+	struct r8192_priv* priv = rtllib_priv(dev);
+	PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
+
+	if(IS_NIC_DOWN(priv)){
+		RT_TRACE(COMP_ERR, "ERR!!! %s(): Driver is already down!\n",__FUNCTION__);
+		priv->bdisable_nic = false;  
+		return RT_STATUS_FAILURE;
+	}
+
+	RT_TRACE(COMP_PS, "===========>%s()\n",__FUNCTION__);
+	priv->bfirst_init = true;
+	init_status = priv->ops->initialize_adapter(dev);
+	if (init_status != true) {
+		RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n",__FUNCTION__);
+		priv->bdisable_nic = false;  
+		return -1;
+	}
+	RT_TRACE(COMP_INIT, "start adapter finished\n");
+	RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC);
+	priv->bfirst_init = false;
+
+	rtl8192_irq_enable(dev);
+	priv->bdisable_nic = false;
+	RT_TRACE(COMP_PS,"<===========%s()\n",__FUNCTION__);
+	return init_status;
+}
+bool NicIFDisableNIC(struct net_device* dev)
+{
+	bool	status = true;
+	struct r8192_priv* priv = rtllib_priv(dev);
+	u8 tmp_state = 0;
+	RT_TRACE(COMP_PS, "=========>%s()\n",__FUNCTION__);
+	priv->bdisable_nic = true;	
+	tmp_state = priv->rtllib->state;
+#ifdef _RTL8192_EXT_PATCH_
+	if((priv->rtllib->iw_mode == IW_MODE_MESH) && (priv->rtllib->only_mesh)) 
+		rtllib_softmac_stop_protocol(priv->rtllib, 1, false);
+	else
+		rtllib_softmac_stop_protocol(priv->rtllib, 0, false);
+#else
+	rtllib_softmac_stop_protocol(priv->rtllib,false);
+#endif
+	priv->rtllib->state = tmp_state;
+	rtl8192_cancel_deferred_work(priv);
+	rtl8192_irq_disable(dev);
+
+	priv->ops->stop_adapter(dev, false);
+	RT_TRACE(COMP_PS, "<=========%s()\n",__FUNCTION__);
+
+	return status;
+}
+
+static int __init rtl8192_pci_module_init(void)
+{
+	int ret;
+	int error;
+
+#ifdef BUILT_IN_CRYPTO
+        ret = arc4_init();
+        if (ret) {
+                printk(KERN_ERR "arc4_init() failed %d\n", ret);
+                return ret;
+        }
+
+
+        ret = michael_mic_init();
+        if (ret) {
+                printk(KERN_ERR "michael_mic_init() failed %d\n", ret);
+                return ret;
+        }
+
+        ret = aes_init();
+        if (ret) {
+                printk(KERN_ERR "aes_init() failed %d\n", ret);
+                return ret;
+        }
+#endif
+#ifdef BUILT_IN_RTLLIB
+	ret = rtllib_init();
+	if (ret) {
+		printk(KERN_ERR "rtllib_init() failed %d\n", ret);
+		return ret;
+	}
+	ret = rtllib_crypto_init();
+	if (ret) {
+		printk(KERN_ERR "rtllib_crypto_init() failed %d\n", ret);
+		return ret;
+	}
+	ret = rtllib_crypto_tkip_init();
+	if (ret) {
+		printk(KERN_ERR "rtllib_crypto_tkip_init() failed %d\n", ret);
+		return ret;
+	}
+	ret = rtllib_crypto_ccmp_init();
+	if (ret) {
+		printk(KERN_ERR "rtllib_crypto_ccmp_init() failed %d\n", ret);
+		return ret;
+	}
+	ret = rtllib_crypto_wep_init();
+	if (ret) {
+		printk(KERN_ERR "rtllib_crypto_wep_init() failed %d\n", ret);
+		return ret;
+	}
+#endif
+#ifdef BUILT_IN_MSHCLASS
+	ret = msh_init();
+	if (ret) {
+		printk(KERN_ERR "msh_init() failed %d\n", ret);
+		return ret;
+	}
+#endif
+	printk(KERN_INFO "\nLinux kernel driver for RTL8192 based WLAN cards\n");
+	printk(KERN_INFO "Copyright (c) 2007-2008, Realsil Wlan Driver\n");
+	RT_TRACE(COMP_INIT, "Initializing module");
+	RT_TRACE(COMP_INIT, "Wireless extensions version %d", WIRELESS_EXT);
+
+	error = rtl_create_debugfs_root();
+	if (error) {
+		RT_TRACE(COMP_DBG, "Create debugfs root fail: %d\n", error);
+		goto err_out;
+	}
+
+	rtl8192_proc_module_init();
+#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22))
+      if(0!=pci_module_init(&rtl8192_pci_driver))
+#else
+      if(0!=pci_register_driver(&rtl8192_pci_driver))
+#endif
+	{
+		DMESG("No device found");
+		/*pci_unregister_driver (&rtl8192_pci_driver);*/
+		return -ENODEV;
+	}
+	return 0;
+err_out:
+        return error;
+
+}
+
+static void __exit rtl8192_pci_module_exit(void)
+{
+	pci_unregister_driver(&rtl8192_pci_driver);
+
+	RT_TRACE(COMP_DOWN, "Exiting");
+	rtl8192_proc_module_remove();
+	rtl_remove_debugfs_root();
+#ifdef BUILT_IN_RTLLIB
+	rtllib_crypto_tkip_exit();
+	rtllib_crypto_ccmp_exit();
+	rtllib_crypto_wep_exit();
+	rtllib_crypto_deinit();
+	rtllib_exit();
+#endif	
+#ifdef BUILT_IN_CRYPTO
+        arc4_exit();
+        michael_mic_exit();
+        aes_fini();
+#endif
+#ifdef BUILT_IN_MSHCLASS
+	msh_exit();
+#endif
+
+}
+
+void check_rfctrl_gpio_timer(unsigned long data)
+{
+	struct r8192_priv* priv = rtllib_priv((struct net_device *)data);
+
+	priv->polling_timer_on = 1;
+
+	queue_delayed_work_rsl(priv->priv_wq,&priv->gpio_change_rf_wq,0);
+
+	mod_timer(&priv->gpio_polling_timer, jiffies + MSECS(RTLLIB_WATCH_DOG_TIME));
+}
+
+/***************************************************************************
+     ------------------- module init / exit stubs ----------------
+****************************************************************************/
+module_init(rtl8192_pci_module_init);
+module_exit(rtl8192_pci_module_exit);
+
+MODULE_DESCRIPTION("Linux driver for Realtek RTL819x WiFi cards");
+MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
+MODULE_VERSION(DRV_VERSION);
+#endif
+MODULE_LICENSE("GPL");
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 9)
+module_param(ifname, charp, S_IRUGO|S_IWUSR );
+module_param(hwwep,int, S_IRUGO|S_IWUSR);
+module_param(channels,int, S_IRUGO|S_IWUSR);
+#else
+MODULE_PARM(ifname, "s");
+MODULE_PARM(hwwep,"i");
+MODULE_PARM(channels,"i");
+#endif
+
+MODULE_PARM_DESC(ifname," Net interface name, wlan%d=default");
+MODULE_PARM_DESC(hwwep," Try to use hardware WEP support(default use hw. set 0 to use software security)");
+MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl_ps.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl_ps.c
@@ -0,0 +1,732 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * Based on the r8180 driver, which is:
+ * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ *****************************************************************************/
+#include "rtl_ps.h"
+#include "rtl_core.h"
+#ifdef RTL8192CE
+#include "rtl8192c/r8192C_phy.h"
+#include "rtl8192c/r8192C_phyreg.h"
+#include "rtl8192c/r8192C_rtl6052.h"
+#include "rtl8192c/r8192C_Efuse.h"
+#elif defined RTL8192SE
+#include "rtl8192s/r8192S_phy.h"
+#include "rtl8192s/r8192S_phyreg.h"
+#include "rtl8192s/r8192S_rtl6052.h"
+#include "rtl8192s/r8192S_Efuse.h"
+#else
+#include "rtl8192e/r8192E_phy.h"
+#include "rtl8192e/r8192E_phyreg.h"
+#include "rtl8192e/r8190P_rtl8256.h" /* RTL8225 Radio frontend */
+#include "rtl8192e/r8192E_cmdpkt.h"
+#endif
+
+#if defined(RTL8192E) || defined(RTL8192SE) || defined RTL8192CE
+void rtl8192_hw_sleep_down(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	unsigned long flags = 0;
+#ifdef CONFIG_ASPM_OR_D3
+	PRT_POWER_SAVE_CONTROL	pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
+#endif	
+	spin_lock_irqsave(&priv->rf_ps_lock,flags);
+	if (priv->RFChangeInProgress) {
+		spin_unlock_irqrestore(&priv->rf_ps_lock,flags);
+		RT_TRACE(COMP_RF, "rtl8192_hw_sleep_down(): RF Change in progress! \n");
+		printk("rtl8192_hw_sleep_down(): RF Change in progress!\n");
+		return;
+	}
+	spin_unlock_irqrestore(&priv->rf_ps_lock,flags);
+	RT_TRACE(COMP_PS, "%s()============>come to sleep down\n", __FUNCTION__);
+
+#ifdef CONFIG_RTLWIFI_DEBUGFS	
+	if(priv->debug->hw_holding) {
+		return;
+	}
+#endif	
+	MgntActSet_RF_State(dev, eRfSleep, RF_CHANGE_BY_PS);
+#ifdef CONFIG_ASPM_OR_D3
+	if(pPSC->RegRfPsLevel & RT_RF_LPS_LEVEL_ASPM)
+	{
+		RT_ENABLE_ASPM(dev);
+		RT_SET_PS_LEVEL(pPSC, RT_RF_LPS_LEVEL_ASPM);
+	}
+#endif
+}
+
+void rtl8192_hw_sleep_wq(void *data)
+{
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
+	struct rtllib_device *ieee = container_of_dwork_rsl(data,struct rtllib_device,hw_sleep_wq);
+	struct net_device *dev = ieee->dev;
+#else
+	struct net_device *dev = (struct net_device *)data;
+#endif
+        rtl8192_hw_sleep_down(dev);
+}
+
+void rtl8192_hw_wakeup(struct net_device* dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	unsigned long flags = 0;
+#ifdef CONFIG_ASPM_OR_D3
+	PRT_POWER_SAVE_CONTROL	pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
+#endif	
+	spin_lock_irqsave(&priv->rf_ps_lock,flags);
+	if (priv->RFChangeInProgress) {
+		spin_unlock_irqrestore(&priv->rf_ps_lock,flags);
+		RT_TRACE(COMP_RF, "rtl8192_hw_wakeup(): RF Change in progress! \n");
+		printk("rtl8192_hw_wakeup(): RF Change in progress! schedule wake up task again\n");
+		queue_delayed_work_rsl(priv->rtllib->wq,&priv->rtllib->hw_wakeup_wq,MSECS(10));
+		return;
+	}
+	spin_unlock_irqrestore(&priv->rf_ps_lock,flags);
+#ifdef CONFIG_ASPM_OR_D3
+	if (pPSC->RegRfPsLevel & RT_RF_LPS_LEVEL_ASPM) {
+		RT_DISABLE_ASPM(dev);
+		RT_CLEAR_PS_LEVEL(pPSC, RT_RF_LPS_LEVEL_ASPM);
+	}
+#endif
+	RT_TRACE(COMP_PS, "%s()============>come to wake up\n", __FUNCTION__);
+	MgntActSet_RF_State(dev, eRfOn, RF_CHANGE_BY_PS);
+}
+
+void rtl8192_hw_wakeup_wq(void *data)
+{
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
+	struct rtllib_device *ieee = container_of_dwork_rsl(data,struct rtllib_device,hw_wakeup_wq);  
+	struct net_device *dev = ieee->dev;
+#else
+	struct net_device *dev = (struct net_device *)data;
+#endif
+	rtl8192_hw_wakeup(dev);
+
+}
+
+#define MIN_SLEEP_TIME 50
+#define MAX_SLEEP_TIME 10000
+void rtl8192_hw_to_sleep(struct net_device *dev, u32 th, u32 tl)
+{
+#ifdef _RTL8192_EXT_PATCH_
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u32 rb = jiffies, sleep_cost = MSECS(8+16+7), delta = 0;
+	unsigned long flags;
+
+	if((tl > rb) && (th > 0))
+		return;
+
+	spin_lock_irqsave(&priv->ps_lock,flags);
+
+	if (tl >= sleep_cost)
+		tl -= sleep_cost;
+	else if (th > 0) {
+		tl = 0xffffffff - sleep_cost + tl;  
+		th--;
+	} else {
+		spin_unlock_irqrestore(&priv->ps_lock,flags);
+		return;
+	}
+
+	if (tl > rb) {
+		delta = tl - rb;
+	} else if (th > 0) {
+		delta = 0xffffffff - rb + tl;
+		th --;
+	} else {
+		spin_unlock_irqrestore(&priv->ps_lock,flags);
+		return;
+	}
+
+	if (delta <= MSECS(MIN_SLEEP_TIME)) {
+		spin_unlock_irqrestore(&priv->ps_lock,flags);
+		printk("too short to sleep::%x, %x, %lx\n",tl, rb,  MSECS(MIN_SLEEP_TIME));
+		return;
+	}	
+
+	if(delta > MSECS(MAX_SLEEP_TIME)) {
+		spin_unlock_irqrestore(&priv->ps_lock,flags);
+		printk("========>too long to sleep:%x, %x, %lx\n", tl, rb,  MSECS(MAX_SLEEP_TIME));
+		return;
+	}
+
+	RT_TRACE(COMP_LPS, "==============>%s(): wake up time is %d,%d\n",__FUNCTION__,delta,jiffies_to_msecs(delta));
+	queue_delayed_work_rsl(priv->rtllib->wq,&priv->rtllib->hw_wakeup_wq,delta); 
+	queue_delayed_work_rsl(priv->rtllib->wq, (void *)&priv->rtllib->hw_sleep_wq,0);
+
+	spin_unlock_irqrestore(&priv->ps_lock,flags);
+#else
+	struct r8192_priv *priv = rtllib_priv(dev);
+
+	u32 rb = jiffies;
+	unsigned long flags;
+
+	spin_lock_irqsave(&priv->ps_lock,flags);
+
+	tl -= MSECS(8+16+7);
+
+	if(((tl>=rb)&& (tl-rb) <= MSECS(MIN_SLEEP_TIME))
+			||((rb>tl)&& (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
+		spin_unlock_irqrestore(&priv->ps_lock,flags);
+		printk("too short to sleep::%x, %x, %lx\n",tl, rb,  MSECS(MIN_SLEEP_TIME));
+		return;
+	}	
+
+	if(((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME)))||
+			((tl < rb) && (tl>MSECS(69)) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))||
+			((tl<rb)&&(tl<MSECS(69))&&((tl+0xffffffff-rb)>MSECS(MAX_SLEEP_TIME)))) {
+		printk("========>too long to sleep:%x, %x, %lx\n", tl, rb,  MSECS(MAX_SLEEP_TIME));
+		spin_unlock_irqrestore(&priv->ps_lock,flags);
+		return;
+	}
+	{
+		u32 tmp = (tl>rb)?(tl-rb):(rb-tl);
+		queue_delayed_work_rsl(priv->rtllib->wq,
+				&priv->rtllib->hw_wakeup_wq,tmp); 
+	}
+	queue_delayed_work_rsl(priv->rtllib->wq, 
+			(void *)&priv->rtllib->hw_sleep_wq,0);
+	spin_unlock_irqrestore(&priv->ps_lock,flags);
+#endif
+}
+#endif
+
+#ifdef ENABLE_IPS
+void InactivePsWorkItemCallback(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	PRT_POWER_SAVE_CONTROL	pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
+
+	RT_TRACE(COMP_PS, "InactivePsWorkItemCallback() ---------> \n");			
+	pPSC->bSwRfProcessing = true;
+
+	RT_TRACE(COMP_PS, "InactivePsWorkItemCallback(): Set RF to %s.\n", \
+			pPSC->eInactivePowerState == eRfOff?"OFF":"ON");
+#ifdef CONFIG_ASPM_OR_D3
+	if(pPSC->eInactivePowerState == eRfOn)
+	{
+
+		if((pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_ASPM) && RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_ASPM))
+		{
+			RT_DISABLE_ASPM(dev);
+			RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_ASPM);
+		}
+#ifdef TODO		
+		else if((pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_PCI_D3) && RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_PCI_D3))
+		{
+			RT_LEAVE_D3(dev, false);
+			RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_PCI_D3);
+		}
+#endif		
+	}
+#endif
+	MgntActSet_RF_State(dev, pPSC->eInactivePowerState, RF_CHANGE_BY_IPS);
+
+#ifdef CONFIG_ASPM_OR_D3
+	if(pPSC->eInactivePowerState == eRfOff)
+	{
+		if(pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_ASPM)
+		{
+			RT_ENABLE_ASPM(dev);
+			RT_SET_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_ASPM);
+		}
+#ifdef TODO		
+		else if(pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_PCI_D3)
+		{
+			RT_ENTER_D3(dev, false);
+			RT_SET_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_PCI_D3);
+		}
+#endif		
+	}
+#endif
+	
+#if 0
+	if(pPSC->eInactivePowerState == eRfOn)
+	{
+		while( index < 4 )
+		{
+			if( ( pMgntInfo->SecurityInfo.PairwiseEncAlgorithm == WEP104_Encryption ) ||
+				(pMgntInfo->SecurityInfo.PairwiseEncAlgorithm == WEP40_Encryption) )
+			{
+				if( pMgntInfo->SecurityInfo.KeyLen[index] != 0)
+				pAdapter->HalFunc.SetKeyHandler(pAdapter, index, 0, false, pMgntInfo->SecurityInfo.PairwiseEncAlgorithm, true, false);
+
+			}
+			index++;
+		}
+	}
+#endif
+	pPSC->bSwRfProcessing = false;	
+	RT_TRACE(COMP_PS, "InactivePsWorkItemCallback() <--------- \n");			
+}
+
+void
+IPSEnter(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	PRT_POWER_SAVE_CONTROL		pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
+	RT_RF_POWER_STATE 			rtState;
+
+	if (pPSC->bInactivePs)
+	{
+		rtState = priv->rtllib->eRFPowerState;
+		if (rtState == eRfOn && !pPSC->bSwRfProcessing &&\
+			(priv->rtllib->state != RTLLIB_LINKED)&&\
+			(priv->rtllib->iw_mode != IW_MODE_MASTER))
+		{
+			RT_TRACE(COMP_PS,"IPSEnter(): Turn off RF.\n");
+			pPSC->eInactivePowerState = eRfOff;
+			priv->isRFOff = true;
+			priv->bInPowerSaveMode = true;
+			InactivePsWorkItemCallback(dev);
+		}
+	}	
+}
+
+void
+IPSLeave(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	PRT_POWER_SAVE_CONTROL	pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
+	RT_RF_POWER_STATE 	rtState;
+
+	if (pPSC->bInactivePs)
+	{	
+		rtState = priv->rtllib->eRFPowerState;	
+		if (rtState != eRfOn  && !pPSC->bSwRfProcessing && priv->rtllib->RfOffReason <= RF_CHANGE_BY_IPS)
+		{
+			RT_TRACE(COMP_PS, "IPSLeave(): Turn on RF.\n");
+			pPSC->eInactivePowerState = eRfOn;
+			priv->bInPowerSaveMode = false;
+			InactivePsWorkItemCallback(dev);
+		}
+	}
+}
+void IPSLeave_wq(void *data)
+{
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
+	struct rtllib_device *ieee = container_of_work_rsl(data,struct rtllib_device,ips_leave_wq);
+	struct net_device *dev = ieee->dev;
+#else
+	struct net_device *dev = (struct net_device *)data;
+#endif
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	down(&priv->rtllib->ips_sem);
+	IPSLeave(dev);	
+	up(&priv->rtllib->ips_sem);	
+}
+void rtllib_ips_leave_wq(struct net_device *dev)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	RT_RF_POWER_STATE	rtState;
+	rtState = priv->rtllib->eRFPowerState;
+
+	if(priv->rtllib->PowerSaveControl.bInactivePs){ 
+		if(rtState == eRfOff){
+			if(priv->rtllib->RfOffReason > RF_CHANGE_BY_IPS)
+			{
+				RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__FUNCTION__);
+				return;
+			}
+			else{
+				printk("=========>%s(): IPSLeave\n",__FUNCTION__);
+				queue_work_rsl(priv->rtllib->wq,&priv->rtllib->ips_leave_wq);				
+			}
+		}
+	}
+}
+void rtllib_ips_leave(struct net_device *dev)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	down(&priv->rtllib->ips_sem);
+	IPSLeave(dev);	
+	up(&priv->rtllib->ips_sem);	
+}
+#endif
+
+#ifdef ENABLE_LPS
+bool MgntActSet_802_11_PowerSaveMode(struct net_device *dev,	u8 rtPsMode)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+
+#ifdef _RTL8192_EXT_PATCH_
+	if((priv->rtllib->iw_mode == IW_MODE_ADHOC) || (priv->rtllib->iw_mode == IW_MODE_MASTER)
+		|| (priv->rtllib->iw_mode == IW_MODE_MESH))	
+#else
+	if(priv->rtllib->iw_mode == IW_MODE_ADHOC)	
+#endif
+	{
+		return false;
+	}
+
+	
+	RT_TRACE(COMP_LPS,"%s(): set ieee->ps = %x\n",__FUNCTION__,rtPsMode);
+	if(!priv->ps_force) {
+		priv->rtllib->ps = rtPsMode;
+	}
+#if 0
+	priv->rtllib->dot11PowerSaveMode = rtPsMode;
+
+	if(priv->rtllib->dot11PowerSaveMode == eMaxPs)
+	{
+	}
+	else
+	{
+	}
+#endif
+	if(priv->rtllib->sta_sleep != 0 && rtPsMode == RTLLIB_PS_DISABLED)
+	{
+                unsigned long flags;
+
+		rtl8192_hw_wakeup(dev);
+		priv->rtllib->sta_sleep = 0;
+
+                spin_lock_irqsave(&(priv->rtllib->mgmt_tx_lock), flags);
+		printk("LPS leave: notify AP we are awaked ++++++++++ SendNullFunctionData\n");
+		rtllib_sta_ps_send_null_frame(priv->rtllib, 0);
+                spin_unlock_irqrestore(&(priv->rtllib->mgmt_tx_lock), flags);
+	}
+
+#if 0
+	if((pPSC->bFwCtrlLPS) && (pPSC->bLeisurePs))
+	{	
+		if(priv->rtllib->dot11PowerSaveMode == eActive)
+		{
+			RpwmVal = 0x0C; 
+			FwPwrMode = FW_PS_ACTIVE_MODE;
+			Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_SET_RPWM, (pu1Byte)(&RpwmVal));
+			Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_H2C_FW_PWRMODE, (pu1Byte)(&FwPwrMode));
+		}
+		else
+		{
+			if(GetFwLPS_Doze(Adapter))
+			{
+				RpwmVal = 0x02; 
+				Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_H2C_FW_PWRMODE, (pu1Byte)(&pPSC->FWCtrlPSMode));
+				Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_SET_RPWM, (pu1Byte)(&RpwmVal));
+			}
+			else
+			{
+				pMgntInfo->dot11PowerSaveMode = eActive;
+				Adapter->bInPowerSaveMode = false;	
+			}
+		}
+	}
+#endif
+	return true;
+}
+
+
+void LeisurePSEnter(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
+
+	RT_TRACE(COMP_PS, "LeisurePSEnter()...\n");
+	RT_TRACE(COMP_PS, "pPSC->bLeisurePs = %d, ieee->ps = %d,pPSC->LpsIdleCount is %d,RT_CHECK_FOR_HANG_PERIOD is %d\n", 
+		pPSC->bLeisurePs, priv->rtllib->ps,pPSC->LpsIdleCount,RT_CHECK_FOR_HANG_PERIOD);
+
+#ifdef _RTL8192_EXT_PATCH_
+	if(!((priv->rtllib->iw_mode == IW_MODE_INFRA) && (priv->rtllib->state == RTLLIB_LINKED))
+		|| (priv->rtllib->iw_mode == IW_MODE_ADHOC) || (priv->rtllib->iw_mode == IW_MODE_MASTER)
+		|| (priv->rtllib->iw_mode == IW_MODE_MESH))
+#else
+	if(!((priv->rtllib->iw_mode == IW_MODE_INFRA) && (priv->rtllib->state == RTLLIB_LINKED))
+		|| (priv->rtllib->iw_mode == IW_MODE_ADHOC) || (priv->rtllib->iw_mode == IW_MODE_MASTER))
+#endif
+		return;
+
+	if (pPSC->bLeisurePs)
+	{
+		if(pPSC->LpsIdleCount >= RT_CHECK_FOR_HANG_PERIOD) 
+		{
+	
+			if(priv->rtllib->ps == RTLLIB_PS_DISABLED)
+			{
+
+				RT_TRACE(COMP_LPS, "LeisurePSEnter(): Enter 802.11 power save mode...\n");
+
+				if(!pPSC->bFwCtrlLPS)
+				{
+					if (priv->rtllib->SetFwCmdHandler)
+					{
+						priv->rtllib->SetFwCmdHandler(dev, FW_CMD_LPS_ENTER);
+					} 
+				}	
+				MgntActSet_802_11_PowerSaveMode(dev, RTLLIB_PS_MBCAST|RTLLIB_PS_UNICAST);
+
+				/*if(pPSC->RegRfPsLevel & RT_RF_LPS_LEVEL_ASPM)
+				{
+					RT_ENABLE_ASPM(pAdapter);
+					RT_SET_PS_LEVEL(pAdapter, RT_RF_LPS_LEVEL_ASPM);
+				}*/
+
+			}	
+		}
+		else
+			pPSC->LpsIdleCount++;
+	}	
+}
+
+
+void LeisurePSLeave(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
+
+
+	RT_TRACE(COMP_PS, "LeisurePSLeave()...\n");
+	RT_TRACE(COMP_PS, "pPSC->bLeisurePs = %d, ieee->ps = %d\n", 
+		pPSC->bLeisurePs, priv->rtllib->ps);
+
+	if (pPSC->bLeisurePs)
+	{	
+		if(priv->rtllib->ps != RTLLIB_PS_DISABLED)
+		{
+#ifdef CONFIG_ASPM_OR_D3
+			if(pPSC->RegRfPsLevel & RT_RF_LPS_LEVEL_ASPM && RT_IN_PS_LEVEL(pPSC, RT_RF_LPS_LEVEL_ASPM))
+			{
+				RT_DISABLE_ASPM(dev);
+				RT_CLEAR_PS_LEVEL(pPSC, RT_RF_LPS_LEVEL_ASPM);
+			} 
+#endif
+			RT_TRACE(COMP_LPS, "LeisurePSLeave(): Busy Traffic , Leave 802.11 power save..\n");
+			MgntActSet_802_11_PowerSaveMode(dev, RTLLIB_PS_DISABLED);
+
+			if(!pPSC->bFwCtrlLPS) 
+			{
+				if (priv->rtllib->SetFwCmdHandler)
+				{
+					priv->rtllib->SetFwCmdHandler(dev, FW_CMD_LPS_LEAVE);
+				} 
+                    }
+		}
+	}
+}
+#endif
+
+#ifdef CONFIG_ASPM_OR_D3
+bool
+PlatformEnable92CEBackDoor(struct net_device *dev)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	bool			bResult = true;
+	u8			value;
+
+	pci_read_config_byte(priv->pdev, 0x70f, &value);
+	value |= BIT7;
+	pci_write_config_byte(priv->pdev, 0x70f, value);
+
+
+	pci_read_config_byte(priv->pdev, 0x719, &value);
+	value |= (BIT3|BIT4);
+	pci_write_config_byte(priv->pdev, 0x719, value);
+	
+
+	return bResult;
+}
+
+bool PlatformSwitchDevicePciASPM(struct net_device *dev, u8 value)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	bool bResult = false;
+
+#ifdef RTL8192CE
+	value |= 0x40;
+#endif
+
+	pci_write_config_byte(priv->pdev, priv->ASPMRegOffset, value);
+	udelay(100);
+
+	return bResult;
+}
+
+bool PlatformSwitchClkReq(struct net_device *dev, u8 value)
+{
+	bool bResult = false;
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	u8	Buffer;
+
+	Buffer= value;	
+	
+	pci_write_config_byte(priv->pdev,priv->ClkReqOffset,value);
+	bResult = true;
+#ifdef TODO
+	if(Buffer) {
+		priv->ClkReqState = true;
+	} else {
+		priv->ClkReqState = false;
+	}
+#endif
+	udelay(100);
+	return bResult;
+}
+
+void
+PlatformDisableASPM(struct net_device *dev)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	PRT_POWER_SAVE_CONTROL	pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
+
+	u8	LinkCtrlReg;
+	u16	PciBridgeLinkCtrlReg, ASPMLevel=0;
+
+#ifdef RTL8192CE
+	if (!priv->aspm_clkreq_enable) {
+		RT_TRACE(COMP_INIT, "%s: Fail to enable ASPM. Cannot find the Bus of PCI(Bridge).\n",\
+			       	__FUNCTION__);
+		return;
+	}
+#endif
+
+	LinkCtrlReg = priv->LinkCtrlReg;
+	ASPMLevel |= BIT0|BIT1;
+	LinkCtrlReg &=~ASPMLevel;
+
+	PciBridgeLinkCtrlReg = priv->PciBridgeLinkCtrlReg;
+	PciBridgeLinkCtrlReg &=~(BIT0|BIT1);
+
+	if (priv->aspm_clkreq_enable) {
+
+		pci_write_config_byte(priv->bridge_pdev,priv->PciBridgeASPMRegOffset,PciBridgeLinkCtrlReg);
+		RT_TRACE(COMP_POWER, "Write reg[%x]=%x\n", (priv->PciBridgeASPMRegOffset), PciBridgeLinkCtrlReg);
+		udelay(100);
+	}
+
+	PlatformSwitchDevicePciASPM(dev, priv->LinkCtrlReg);
+
+	PlatformSwitchClkReq(dev, 0x0);
+	if (pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_CLK_REQ)
+		RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_CLK_REQ);
+	udelay(100);
+}
+
+void PlatformEnableASPM(struct net_device *dev)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
+	u16	ASPMLevel = 0;
+
+	if (!priv->aspm_clkreq_enable) {
+		RT_TRACE(COMP_INIT, "%s: Fail to enable ASPM. Cannot find the Bus of PCI(Bridge).\n",\
+			       	__FUNCTION__);
+		return;
+	}
+
+	ASPMLevel |= priv->RegDevicePciASPMSetting;
+	PlatformSwitchDevicePciASPM(dev, (priv->LinkCtrlReg | ASPMLevel));
+
+	if (pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_CLK_REQ) {
+		PlatformSwitchClkReq(dev,(pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_CLK_REQ) ? 1 : 0);
+		RT_SET_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_CLK_REQ);
+	}
+	udelay(100);
+
+	pci_write_config_byte(priv->bridge_pdev,priv->PciBridgeASPMRegOffset,\
+			((priv->PciBridgeLinkCtrlReg | priv->RegHostPciASPMSetting)&~BIT0)&0xff);
+	RT_TRACE(COMP_INIT, "Write reg[%x] = %x\n",
+		priv->PciBridgeASPMRegOffset, 
+		(priv->PciBridgeLinkCtrlReg|priv->RegHostPciASPMSetting));
+	udelay(100);
+}
+
+u32 PlatformResetPciSpace(struct net_device *dev,u8 Value)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+
+	pci_write_config_byte(priv->pdev,0x04,Value);	
+
+	return 1;
+	
+}
+bool PlatformSetPMCSR(struct net_device *dev,u8 value,bool bTempSetting)
+{
+	bool bResult = false;
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	u8  Buffer;
+	bool bActuallySet=false, bSetFunc=false;
+	unsigned long flag;
+
+	Buffer= value;
+	spin_lock_irqsave(&priv->D3_lock,flag);
+#ifdef TODO	
+	if(bTempSetting) 
+	{
+		if(Buffer==0x00) 
+		{
+			priv->LeaveD3Cnt++;
+
+			{
+				bActuallySet =true;
+			}
+		}
+		else 
+		{
+			priv->LeaveD3Cnt--;
+
+			if(priv->LeaveD3Cnt == 0) 
+			{
+				bActuallySet=true;
+			}
+		}
+	}
+	else
+	{
+		priv->LeaveD3Cnt=0;
+		bActuallySet=true;
+		bSetFunc=true;
+	}
+#endif
+	if (bActuallySet) {
+		if (Buffer) {
+			PlatformSwitchClkReq(dev, 0x01);
+		} else {
+			PlatformSwitchClkReq(dev, 0x00);
+		}
+		
+		pci_write_config_byte(priv->pdev,0x44,Buffer);
+		RT_TRACE(COMP_POWER, "PlatformSetPMCSR(): D3(value: %d)\n", Buffer);
+
+		bResult = true;
+		if (!Buffer) {
+			PlatformResetPciSpace(dev, 0x06);
+			PlatformResetPciSpace(dev, 0x07);
+		}
+
+		if (bSetFunc) {
+			if(Buffer) 
+			{
+#ifdef TO_DO_LIST
+				RT_DISABLE_FUNC(Adapter, DF_IO_D3_BIT);
+#endif
+			} else {
+#ifdef TO_DO_LIST
+				RT_ENABLE_FUNC(Adapter, DF_IO_D3_BIT);
+#endif
+			}
+		}
+		
+	}
+	spin_unlock_irqrestore(&priv->D3_lock,flag);
+	return bResult;
+}
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl_dm.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl_dm.h
@@ -0,0 +1,332 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+#ifndef	__R8192UDM_H__
+#define __R8192UDM_H__
+
+
+/*--------------------------Define Parameters-------------------------------*/
+#define 		OFDM_Table_Length	19
+#define		CCK_Table_length	12
+
+#define		DM_DIG_THRESH_HIGH					40
+#define		DM_DIG_THRESH_LOW					35
+
+#define		DM_FALSEALARM_THRESH_LOW	40
+#define		DM_FALSEALARM_THRESH_HIGH	1000
+
+#define		DM_DIG_HIGH_PWR_THRESH_HIGH		75
+#define		DM_DIG_HIGH_PWR_THRESH_LOW		70
+
+#define		BW_AUTO_SWITCH_HIGH_LOW			25
+#define		BW_AUTO_SWITCH_LOW_HIGH			30
+
+#define		DM_check_fsync_time_interval				500
+
+
+#define		DM_DIG_BACKOFF				12
+#ifdef RTL8192SE
+#define		DM_DIG_MAX					0x3e
+#elif defined RTL8190P || defined RTL8192E
+#define		DM_DIG_MAX					0x36
+#endif
+#define		DM_DIG_MIN					0x1c
+#define		DM_DIG_MIN_Netcore			0x12
+
+#define		DM_DIG_BACKOFF_MAX			12
+#define		DM_DIG_BACKOFF_MIN			-4
+
+#define		RxPathSelection_SS_TH_low		30
+#define		RxPathSelection_diff_TH			18
+
+#define		RateAdaptiveTH_High			50
+#define		RateAdaptiveTH_Low_20M		30
+#define		RateAdaptiveTH_Low_40M		10
+#define		VeryLowRSSI					15
+
+#ifdef RTL8192SE
+#define		CTSToSelfTHVal				30
+#elif defined RTL8190P || defined RTL8192E
+#define		CTSToSelfTHVal					35
+#endif
+
+#define		WAIotTHVal						25
+
+#define		E_FOR_TX_POWER_TRACK               300
+#define		TX_POWER_NEAR_FIELD_THRESH_HIGH		68
+#define		TX_POWER_NEAR_FIELD_THRESH_LOW		62
+#define         TX_POWER_ATHEROAP_THRESH_HIGH           78
+#define 	TX_POWER_ATHEROAP_THRESH_LOW		72
+
+#define 		Current_Tx_Rate_Reg         0x1e0
+#define 		Initial_Tx_Rate_Reg         0x1e1 
+#define 		Tx_Retry_Count_Reg         0x1ac
+#define		RegC38_TH				 20
+
+#define		TX_POWER_NEAR_FIELD_THRESH_LVL2	74
+#define		TX_POWER_NEAR_FIELD_THRESH_LVL1	67
+
+#define		TxHighPwrLevel_Normal		0	
+#define		TxHighPwrLevel_Level1		1
+#define		TxHighPwrLevel_Level2		2
+
+#define		DM_Type_ByFW			0
+#define		DM_Type_ByDriver		1
+
+/*--------------------------Define Parameters-------------------------------*/
+
+
+/*------------------------------Define structure----------------------------*/ 
+typedef struct _dynamic_initial_gain_threshold_
+{
+	u8		dig_enable_flag;
+	u8		dig_algorithm;
+	u8		Dig_TwoPort_Algorithm;
+	u8		Dig_Ext_Port_Stage;
+	u8		dbg_mode;
+	u8		dig_algorithm_switch;
+	
+	long		rssi_low_thresh;
+	long		rssi_high_thresh;
+
+	u32		FALowThresh;
+	u32		FAHighThresh;
+	
+	long		rssi_high_power_lowthresh;
+	long		rssi_high_power_highthresh;
+
+	u8		dig_state;
+	u8		dig_highpwr_state;
+	u8		CurSTAConnectState;
+	u8		PreSTAConnectState;
+	u8		CurAPConnectState;
+	u8		PreAPConnectState;
+
+	u8		curpd_thstate;
+	u8		prepd_thstate;
+	u8		curcs_ratio_state;
+	u8		precs_ratio_state;
+
+	u32		pre_ig_value;
+	u32		cur_ig_value;
+
+	u8		Backoff_Enable_Flag;
+	u8		backoff_val;
+	char		BackoffVal_range_max;
+	char		BackoffVal_range_min;
+	u8		rx_gain_range_max;
+	u8		rx_gain_range_min;
+	bool		initialgain_lowerbound_state;
+
+	long		rssi_val;
+}dig_t;
+
+typedef enum tag_dynamic_init_gain_state_definition
+{
+	DM_STA_DIG_OFF = 0,	
+	DM_STA_DIG_ON,		
+	DM_STA_DIG_MAX
+}dm_dig_sta_e;
+
+
+typedef enum tag_dynamic_ratr_state_definition
+{
+	DM_RATR_STA_HIGH = 0,
+	DM_RATR_STA_MIDDLE = 1,
+	DM_RATR_STA_LOW = 2,
+	DM_RATR_STA_MAX
+}dm_ratr_sta_e;
+
+typedef enum tag_dynamic_init_gain_operation_type_definition
+{
+	DIG_TYPE_THRESH_HIGH	= 0,
+	DIG_TYPE_THRESH_LOW	= 1,
+	DIG_TYPE_THRESH_HIGHPWR_HIGH	= 2,
+	DIG_TYPE_THRESH_HIGHPWR_LOW	= 3,
+	DIG_TYPE_DBG_MODE				= 4,
+	DIG_TYPE_RSSI						= 5,
+	DIG_TYPE_ALGORITHM				= 6,
+	DIG_TYPE_BACKOFF					= 7,
+	DIG_TYPE_PWDB_FACTOR			= 8,
+	DIG_TYPE_RX_GAIN_MIN				= 9,
+	DIG_TYPE_RX_GAIN_MAX				= 10,
+	DIG_TYPE_ENABLE 		= 20,
+	DIG_TYPE_DISABLE 		= 30,
+	DIG_OP_TYPE_MAX
+}dm_dig_op_e;
+
+typedef enum tag_dig_algorithm_definition
+{
+	DIG_ALGO_BY_FALSE_ALARM = 0,	
+	DIG_ALGO_BY_RSSI	= 1,
+	DIG_ALGO_BEFORE_CONNECT_BY_RSSI_AND_ALARM = 2,
+	DIG_ALGO_BY_TOW_PORT = 3,
+	DIG_ALGO_MAX
+}dm_dig_alg_e;
+
+typedef enum tag_DIG_TWO_PORT_ALGO_Definition
+{
+	DIG_TWO_PORT_ALGO_RSSI = 0,
+	DIG_TWO_PORT_ALGO_FALSE_ALARM = 1,
+}DM_DIG_TWO_PORT_ALG_E;
+
+
+typedef enum tag_DIG_EXT_PORT_ALGO_Definition
+{
+	DIG_EXT_PORT_STAGE_0 = 0,
+	DIG_EXT_PORT_STAGE_1 = 1,
+	DIG_EXT_PORT_STAGE_2 = 2,
+	DIG_EXT_PORT_STAGE_3 = 3,
+	DIG_EXT_PORT_STAGE_MAX = 4,
+}DM_DIG_EXT_PORT_ALG_E;
+
+typedef enum tag_dig_dbgmode_definition
+{
+	DIG_DBG_OFF = 0,	
+	DIG_DBG_ON = 1,
+	DIG_DBG_MAX
+}dm_dig_dbg_e;
+
+typedef enum tag_dig_connect_definition
+{
+	DIG_STA_DISCONNECT = 0,	
+	DIG_STA_CONNECT = 1,
+	DIG_STA_BEFORE_CONNECT = 2,
+	DIG_AP_DISCONNECT = 3,
+	DIG_AP_CONNECT = 4, 
+	DIG_AP_ADD_STATION = 5,
+	DIG_CONNECT_MAX
+}dm_dig_connect_e;
+
+typedef enum tag_dig_packetdetection_threshold_definition
+{
+	DIG_PD_AT_LOW_POWER = 0,	
+	DIG_PD_AT_NORMAL_POWER = 1,
+	DIG_PD_AT_HIGH_POWER = 2,
+	DIG_PD_MAX
+}dm_dig_pd_th_e;
+
+typedef enum tag_dig_cck_cs_ratio_state_definition
+{
+	DIG_CS_RATIO_LOWER = 0,	
+	DIG_CS_RATIO_HIGHER = 1,
+	DIG_CS_MAX
+}dm_dig_cs_ratio_e;
+typedef struct _Dynamic_Rx_Path_Selection_
+{
+	u8		Enable;
+	u8		DbgMode;
+	u8		cck_method;
+	u8		cck_Rx_path;
+
+	u8		SS_TH_low;
+	u8		diff_TH;
+	u8		disabledRF;
+	u8		reserved;
+	
+	u8		rf_rssi[4];
+	u8		rf_enable_rssi_th[4];
+	long		cck_pwdb_sta[4];
+}DRxPathSel;
+
+typedef enum tag_CCK_Rx_Path_Method_Definition
+{
+	CCK_Rx_Version_1 = 0,	
+	CCK_Rx_Version_2= 1,
+	CCK_Rx_Version_MAX
+}DM_CCK_Rx_Path_Method;
+
+
+typedef enum tag_DM_DbgMode_Definition
+{
+	DM_DBG_OFF = 0,	
+	DM_DBG_ON = 1,
+	DM_DBG_MAX
+}DM_DBG_E;
+
+typedef struct tag_Tx_Config_Cmd_Format
+{
+	u32	Op;					
+	u32	Length;					
+	u32	Value;
+}DCMD_TXCMD_T, *PDCMD_TXCMD_T;
+/*------------------------------Define structure----------------------------*/ 
+
+
+/*------------------------Export global variable----------------------------*/
+extern	dig_t	dm_digtable;
+extern	u8		dm_shadow[16][256];
+extern DRxPathSel      DM_RxPathSelTable;
+
+extern	u8			test_flag;
+/*------------------------Export global variable----------------------------*/
+
+
+/*------------------------Export Marco Definition---------------------------*/
+#define DM_APInitGainChangeNotify(Event) {dm_digtable.CurAPConnectState = Event;}
+/*------------------------Export Marco Definition---------------------------*/
+
+
+/*--------------------------Exported Function prototype---------------------*/
+/*--------------------------Exported Function prototype---------------------*/
+extern  void    init_hal_dm(struct net_device *dev);
+extern  void deinit_hal_dm(struct net_device *dev);
+
+extern void hal_dm_watchdog(struct net_device *dev);
+
+
+extern  void    init_rate_adaptive(struct net_device *dev);
+extern  void    dm_txpower_trackingcallback(void *data);
+
+#ifndef RTL8192SE
+extern  void dm_cck_txpower_adjust(struct net_device *dev,bool  binch14);
+#endif
+
+extern  void    dm_restore_dynamic_mechanism_state(struct net_device *dev);
+extern  void    dm_backup_dynamic_mechanism_state(struct net_device *dev);
+extern  void    dm_change_dynamic_initgain_thresh(struct net_device *dev,
+                                                                u32             dm_type,
+                                                                u32             dm_value);
+extern  void    DM_ChangeFsyncSetting(struct net_device *dev,
+                                                                                                s32             DM_Type,
+                                                                                                s32             DM_Value);
+extern  void dm_force_tx_fw_info(struct net_device *dev,
+                                                                                u32             force_type,
+                                                                                u32             force_value);
+extern  void    dm_init_edca_turbo(struct net_device *dev);
+extern  void    dm_rf_operation_test_callback(unsigned long data);
+extern  void    dm_rf_pathcheck_workitemcallback(void *data);
+extern  void dm_fsync_timer_callback(unsigned long data);
+#if 0
+extern  bool    dm_check_lbus_status(struct net_device *dev);
+#endif
+extern  void dm_check_fsync(struct net_device *dev);
+extern  void    dm_shadow_init(struct net_device *dev);
+extern  void dm_initialize_txpower_tracking(struct net_device *dev);
+
+#if (defined RTL8192E || defined RTL8192SE)
+extern  void    dm_CheckRfCtrlGPIO(void *data);
+#endif
+
+#ifdef RTL8192SE
+extern void Power_DomainInit92SE(struct net_device *dev);
+#endif
+#endif	/*__R8192UDM_H__ */
+
+
+/* End of r8192U_dm.h */
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl_eeprom.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl_eeprom.c
@@ -0,0 +1,140 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * Based on the r8180 driver, which is:
+ * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+#include "rtl_core.h"
+#include "rtl_eeprom.h"
+
+void eprom_cs(struct net_device *dev, short bit)
+{
+	if(bit)
+		write_nic_byte(dev, EPROM_CMD,
+			       (1<<EPROM_CS_SHIFT) | \
+			       read_nic_byte(dev, EPROM_CMD)); 
+	else
+		write_nic_byte(dev, EPROM_CMD, read_nic_byte(dev, EPROM_CMD)\
+			       &~(1<<EPROM_CS_SHIFT)); 
+
+	udelay(EPROM_DELAY);
+}
+
+
+void eprom_ck_cycle(struct net_device *dev)
+{
+	write_nic_byte(dev, EPROM_CMD,
+		       (1<<EPROM_CK_SHIFT) | read_nic_byte(dev,EPROM_CMD)); 
+	udelay(EPROM_DELAY);
+	write_nic_byte(dev, EPROM_CMD, 
+		       read_nic_byte(dev, EPROM_CMD) &~ (1<<EPROM_CK_SHIFT)); 
+	udelay(EPROM_DELAY);
+}
+
+
+void eprom_w(struct net_device *dev,short bit)
+{
+	if(bit)
+		write_nic_byte(dev, EPROM_CMD, (1<<EPROM_W_SHIFT) | \
+			       read_nic_byte(dev,EPROM_CMD)); 
+	else
+		write_nic_byte(dev, EPROM_CMD, read_nic_byte(dev,EPROM_CMD)\
+			       &~(1<<EPROM_W_SHIFT)); 
+
+	udelay(EPROM_DELAY);
+}
+
+
+short eprom_r(struct net_device *dev)
+{
+	short bit;
+
+	bit=(read_nic_byte(dev, EPROM_CMD) & (1<<EPROM_R_SHIFT) );
+	udelay(EPROM_DELAY);
+
+	if(bit) return 1;
+	return 0;
+}
+
+
+void eprom_send_bits_string(struct net_device *dev, short b[], int len)
+{
+	int i;
+	
+	for(i=0; i<len; i++){
+		eprom_w(dev, b[i]);
+		eprom_ck_cycle(dev);
+	}
+}
+
+
+u32 eprom_read(struct net_device *dev, u32 addr)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	short read_cmd[]={1,1,0};
+	short addr_str[8];
+	int i;
+	int addr_len;
+	u32 ret;
+
+	ret=0;
+	write_nic_byte(dev, EPROM_CMD,
+		       (EPROM_CMD_PROGRAM<<EPROM_CMD_OPERATING_MODE_SHIFT)); 
+	udelay(EPROM_DELAY);
+	
+	if (priv->epromtype==EEPROM_93C56){
+		addr_str[7]=addr & 1;
+		addr_str[6]=addr & (1<<1);
+		addr_str[5]=addr & (1<<2);
+		addr_str[4]=addr & (1<<3);
+		addr_str[3]=addr & (1<<4);
+		addr_str[2]=addr & (1<<5);
+		addr_str[1]=addr & (1<<6);
+		addr_str[0]=addr & (1<<7);
+		addr_len=8;
+	}else{
+		addr_str[5]=addr & 1;
+		addr_str[4]=addr & (1<<1);
+		addr_str[3]=addr & (1<<2);
+		addr_str[2]=addr & (1<<3);
+		addr_str[1]=addr & (1<<4);
+		addr_str[0]=addr & (1<<5);
+		addr_len=6;
+	}
+	eprom_cs(dev, 1);
+	eprom_ck_cycle(dev);
+	eprom_send_bits_string(dev, read_cmd, 3);
+	eprom_send_bits_string(dev, addr_str, addr_len);
+
+	eprom_w(dev, 0); 
+	
+	for(i=0;i<16;i++){	
+		eprom_ck_cycle(dev);
+		ret |= (eprom_r(dev)<<(15-i));
+	}
+	
+	eprom_cs(dev, 0);
+	eprom_ck_cycle(dev);
+
+	write_nic_byte(dev, EPROM_CMD,
+		       (EPROM_CMD_NORMAL<<EPROM_CMD_OPERATING_MODE_SHIFT)); 
+	return ret;
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/Kconfig
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/Kconfig
@@ -0,0 +1,5 @@
+config RTL8192SE
+	tristate "Kernel module for RTL81991/2SE or RTL8171 wireless"
+	depends on X86
+	default m
+	---help---
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/BOM
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/BOM
@@ -0,0 +1,2 @@
+Downloaded from:	http://www.realtek.com/products/productsView.aspx?Langid=1&PFid=48&Level=5&Conn=4&ProdID=230
+Current Version:	0015.0127.2010
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl_mesh.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl_mesh.h
@@ -0,0 +1,40 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * Based on the r8180 driver, which is:
+ * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+#ifdef _RTL8192_EXT_PATCH_
+#ifndef _RTL_MESH_H
+#define _RTL_MESH_H
+
+struct net_device;
+struct net_device_stats;
+
+int meshdev_up(struct net_device *meshdev,bool is_silent_reset);
+int meshdev_down(struct net_device *meshdev);
+struct net_device_stats *meshdev_stats(struct net_device *meshdev);
+void meshdev_init(struct net_device* meshdev);
+
+int meshdev_update_ext_chnl_offset_as_client(void *data);
+int meshdev_start_mesh_protocol_wq(void *data);
+#endif
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl_mesh.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl_mesh.c
@@ -0,0 +1,371 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * Based on the r8180 driver, which is:
+ * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+#ifdef _RTL8192_EXT_PATCH_
+
+#include <asm/uaccess.h>
+#include <linux/pci.h>
+
+#include "rtl_wx.h"
+#include "rtl_core.h"
+#include "rtl_dm.h"
+#include "rtl8192s/r8192S_phy.h"
+#include "rtl8192s/r8192S_phyreg.h"
+#include "rtl8192s/r8192S_rtl6052.h"
+#include "rtl8192s/r8192S_Efuse.h"
+#include "../../mshclass/msh_class.h"
+
+int meshdev_up(struct net_device *meshdev,bool is_silent_reset)
+{
+	struct meshdev_priv * mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(mpriv->priv->rtllib->PowerSaveControl));
+        bool init_status;
+        struct net_device *dev = ieee->dev; 
+	RT_TRACE(COMP_DOWN, "==========>%s()\n", __FUNCTION__);
+
+	mpriv->priv->up_first_time = 0;
+	mpriv->rtllib->iw_mode = IW_MODE_MESH;   
+	if(mpriv->priv->mesh_up){
+		RT_TRACE(COMP_INIT,"%s():mesh is up,return\n",__FUNCTION__);
+		return -1;
+	}
+#ifdef RTL8192SE        
+        mpriv->priv->ReceiveConfig =
+        RCR_APPFCS | RCR_APWRMGT | /*RCR_ADD3 |*/
+        RCR_AMF | RCR_ADF | RCR_APP_MIC | RCR_APP_ICV |
+       RCR_AICV | RCR_ACRC32    |                               
+        RCR_AB          | RCR_AM                |                               
+        RCR_APM         |                                                               
+        /*RCR_AAP               |*/                                                     
+        RCR_APP_PHYST_STAFF | RCR_APP_PHYST_RXFF |      
+        (mpriv->priv->EarlyRxThreshold<<RCR_FIFO_OFFSET)       ;
+
+#else
+        mpriv->priv->ReceiveConfig = RCR_ADD3  |
+                RCR_AMF | RCR_ADF |             
+                RCR_AICV |                      
+                RCR_AB | RCR_AM | RCR_APM |     
+                RCR_AAP | ((u32)7<<RCR_MXDMA_OFFSET) |
+                ((u32)7 << RCR_FIFO_OFFSET) | RCR_ONLYERLPKT;
+
+#endif
+
+	if(!mpriv->priv->up) {
+		RT_TRACE(COMP_INIT, "Bringing up iface");
+		mpriv->priv->bfirst_init = true;
+		init_status = mpriv->priv->ops->initialize_adapter(dev);
+		if(init_status != true) {
+			RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n",__FUNCTION__);
+			return -1;
+		}
+		RT_TRACE(COMP_INIT, "start adapter finished\n");
+		RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC);
+		printk("==>%s():priv->up is 0\n",__FUNCTION__);
+		mpriv->rtllib->ieee_up=1;		
+		mpriv->priv->bfirst_init = false;
+#ifdef ENABLE_GPIO_RADIO_CTL
+		if(mpriv->priv->polling_timer_on == 0){
+			check_rfctrl_gpio_timer((unsigned long)dev);
+		}
+#endif
+		if(!is_silent_reset){
+			mpriv->rtllib->current_network.channel = INIT_DEFAULT_CHAN;
+			mpriv->rtllib->current_mesh_network.channel = INIT_DEFAULT_CHAN;
+			if(mpriv->priv->mshobj->ext_patch_r819x_wx_set_mesh_chan) 
+				mpriv->priv->mshobj->ext_patch_r819x_wx_set_mesh_chan(dev,INIT_DEFAULT_CHAN);          
+			if(mpriv->priv->mshobj->ext_patch_r819x_wx_set_channel)
+			{
+				mpriv->priv->mshobj->ext_patch_r819x_wx_set_channel(mpriv->rtllib, INIT_DEFAULT_CHAN);
+			}
+			printk("%s():set chan %d\n",__FUNCTION__,INIT_DEFAULT_CHAN);
+			mpriv->rtllib->set_chan(dev, INIT_DEFAULT_CHAN);
+		}
+		dm_InitRateAdaptiveMask(dev);
+		watch_dog_timer_callback((unsigned long) dev);
+	
+	} else {
+		rtllib_stop_scan(ieee);
+		msleep(1000);
+	}
+        if(!ieee->mesh_started) {
+#ifdef RTL8192E
+            if(ieee->eRFPowerState!=eRfOn)
+                MgntActSet_RF_State(dev, eRfOn, ieee->RfOffReason);	
+#endif
+            if(mpriv->priv->mshobj && mpriv->priv->mshobj->ext_patch_rtl819x_up )
+                mpriv->priv->mshobj->ext_patch_rtl819x_up(mpriv->priv->mshobj);
+
+
+            if(!netif_queue_stopped(meshdev))
+                netif_start_queue(meshdev);
+            else
+                netif_wake_queue(meshdev);
+
+            rtllib_reset_queue(ieee);
+	}
+		
+	mpriv->priv->mesh_up = 1;
+
+	RT_TRACE(COMP_DOWN, "<==========%s()\n", __FUNCTION__);
+	return 0;
+}
+
+int meshdev_down(struct net_device *meshdev)
+{
+	struct meshdev_priv * mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct r8192_priv *priv = (void*)ieee->priv;
+	struct net_device *dev = ieee->dev;
+	unsigned long flags = 0;
+	u8 RFInProgressTimeOut = 0;
+	if(priv->mesh_up == 0) {
+		RT_TRACE(COMP_ERR,"%s():ERR!!! mesh is already down\n",__FUNCTION__)
+		return -1;
+	}
+
+	RT_TRACE(COMP_DOWN, "==========>%s()\n", __FUNCTION__);
+	
+	if (netif_running(meshdev)) {
+		netif_stop_queue(meshdev);
+	}
+
+	if(!priv->up)
+	{
+        	priv->bDriverIsGoingToUnload = true;	
+		ieee->ieee_up = 0;  
+		rtl8192_irq_disable(dev);
+		rtl8192_cancel_deferred_work(priv);
+#ifndef RTL8190P
+		cancel_delayed_work(&priv->rtllib->hw_wakeup_wq);
+#endif
+		deinit_hal_dm(dev);
+		del_timer_sync(&priv->watch_dog_timer);	
+		rtllib_softmac_stop_protocol(ieee, 1, true);
+
+		SPIN_LOCK_PRIV_RFPS(&priv->rf_ps_lock);
+		while(priv->RFChangeInProgress)
+		{
+			SPIN_UNLOCK_PRIV_RFPS(&priv->rf_ps_lock);
+			if(RFInProgressTimeOut > 100)
+			{
+				SPIN_LOCK_PRIV_RFPS(&priv->rf_ps_lock);
+				break;
+			}
+			printk("===>%s():RF is in progress, need to wait until rf chang is done.\n",__FUNCTION__);
+			mdelay(1);
+			RFInProgressTimeOut ++;
+			SPIN_LOCK_PRIV_RFPS(&priv->rf_ps_lock);
+		}
+		priv->RFChangeInProgress = true;
+		SPIN_UNLOCK_PRIV_RFPS(&priv->rf_ps_lock);
+		priv->ops->stop_adapter(dev, false);
+		SPIN_LOCK_PRIV_RFPS(&priv->rf_ps_lock);
+		priv->RFChangeInProgress = false;
+		SPIN_UNLOCK_PRIV_RFPS(&priv->rf_ps_lock);
+		udelay(100);
+		memset(&priv->rtllib->current_network, 0 , offsetof(struct rtllib_network, list));
+		priv->rtllib->current_network.channel = INIT_DEFAULT_CHAN;
+#ifdef CONFIG_ASPM_OR_D3
+		RT_ENABLE_ASPM(dev);
+#endif
+		memset(&ieee->current_mesh_network, 0 , offsetof(struct rtllib_network, list));
+		priv->rtllib->current_mesh_network.channel = INIT_DEFAULT_CHAN;
+		ieee->mesh_state = RTLLIB_NOLINK;
+	} else {
+		rtllib_softmac_stop_protocol(ieee, 1, true);
+		memset(&ieee->current_mesh_network, 0 , offsetof(struct rtllib_network, list));
+		if((ieee->current_network.channel > 0) && (ieee->current_network.channel < 15))
+			priv->rtllib->current_mesh_network.channel = ieee->current_network.channel;
+		else
+			priv->rtllib->current_mesh_network.channel = INIT_DEFAULT_CHAN;
+				
+		ieee->mesh_state = RTLLIB_NOLINK;
+		ieee->iw_mode = IW_MODE_INFRA;
+	}
+	priv->mesh_up = 0;  
+	RT_TRACE(COMP_DOWN, "<==========%s()\n", __FUNCTION__);
+
+	return 0;
+}
+
+static int meshdev_open(struct net_device *meshdev)
+{
+	struct meshdev_priv * mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct r8192_priv *priv = (void*)ieee->priv;
+	int ret;
+	
+	SEM_DOWN_PRIV_WX(&priv->wx_sem);	
+	ret = meshdev_up(meshdev,false);
+	SEM_UP_PRIV_WX(&priv->wx_sem);	
+
+	return ret;
+}
+
+static int meshdev_close(struct net_device *meshdev)
+{
+	struct meshdev_priv * mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct r8192_priv *priv = (void *)ieee->priv;
+	int ret;
+	
+	SEM_DOWN_PRIV_WX(&priv->wx_sem);	
+	ret = meshdev_down(meshdev);
+	SEM_UP_PRIV_WX(&priv->wx_sem);	
+	
+	return ret;
+}
+
+extern int meshdev_wx_mesh(struct net_device *meshdev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra);
+static int meshdev_ioctl(struct net_device *meshdev, struct ifreq *rq, int cmd)
+{
+	struct iwreq *wrq = (struct iwreq *)rq;
+	int ret = -1;
+	if(cmd == 0x8BEE)
+	{
+		ret = meshdev_wx_mesh(meshdev, NULL, &(wrq->u), wrq->u.data.pointer);
+	}
+	return ret;
+}
+
+struct net_device_stats *meshdev_stats(struct net_device *meshdev)
+{
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0) 
+	return &((struct meshdev_priv*)netdev_priv(meshdev))->stats;
+#else
+	return &((struct meshdev_priv*)meshdev->priv)->stats;
+#endif
+}
+
+static int meshdev_tx(struct sk_buff *skb, struct net_device *meshdev)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device * ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+
+	memset(skb->cb,0,sizeof(skb->cb));
+	
+	return rtllib_mesh_xmit(skb, dev);	
+}
+
+static void meshdev_tx_timeout(struct net_device *meshdev)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device * ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+
+	rtl8192_tx_timeout(dev);	
+}
+
+#ifdef HAVE_NET_DEVICE_OPS
+static const struct net_device_ops mesh_netdev_ops = {
+	.ndo_open = meshdev_open,
+	.ndo_stop = meshdev_close,
+	.ndo_get_stats = meshdev_stats,
+	.ndo_tx_timeout = meshdev_tx_timeout,
+	.ndo_do_ioctl = meshdev_ioctl,
+	.ndo_start_xmit = meshdev_tx,
+};
+#endif
+
+void meshdev_init(struct net_device* meshdev)
+{
+	struct meshdev_priv *mpriv;
+	ether_setup(meshdev);
+
+#ifdef HAVE_NET_DEVICE_OPS
+	meshdev->netdev_ops = &mesh_netdev_ops;
+#else	
+	meshdev->open = meshdev_open;
+	meshdev->stop = meshdev_close;
+	meshdev->tx_timeout = meshdev_tx_timeout;
+	meshdev->do_ioctl = meshdev_ioctl;
+	meshdev->get_stats = meshdev_stats;
+	meshdev->hard_start_xmit = meshdev_tx;
+#endif	
+	meshdev->wireless_handlers = &meshdev_wx_handlers_def;
+	meshdev->destructor = free_netdev;
+	meshdev->watchdog_timeo = HZ*3;	
+	meshdev->type = ARPHRD_ETHER; 
+	memset(meshdev->broadcast,0xFF, ETH_ALEN);
+	
+	meshdev->watchdog_timeo = 3 * HZ;
+
+	mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	memset(mpriv, 0, sizeof(struct meshdev_priv));
+
+	return;
+}
+
+int meshdev_update_ext_chnl_offset_as_client(void *data)
+{
+	struct rtllib_device *ieee = container_of_work_rsl(data, struct rtllib_device,
+			ext_update_extchnloffset_wq);
+	struct r8192_priv *priv = (void *)ieee->priv;
+	struct net_device *dev = ieee->dev;
+	struct mshclass *mshobj= priv->mshobj;
+	u8 updateBW = 0;
+	u8 bserverHT = 0;
+
+	updateBW=mshobj->ext_patch_r819x_wx_update_beacon(dev,&bserverHT);
+	printk("$$$$$$%s(): Cur_networ.chan=%d, cur_mesh_net.chan=%d,bserverHT=%d\n",
+			__FUNCTION__,ieee->current_network.channel,ieee->current_mesh_network.channel,bserverHT);
+	if (updateBW == 1) {
+		if (bserverHT == 0) {
+			printk("===>server is not HT supported,set 20M\n");
+			HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20, HT_EXTCHNL_OFFSET_NO_EXT);  
+		} else {
+			printk("===>updateBW is 1,bCurBW40MHz is %d,ieee->serverExtChlOffset is %d\n",
+					ieee->pHTInfo->bCurBW40MHz,ieee->serverExtChlOffset);
+			if (ieee->pHTInfo->bCurBW40MHz)
+				HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20_40, ieee->serverExtChlOffset);  
+			else
+				HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20, ieee->serverExtChlOffset);  
+		}
+	} else {
+		printk("===>there is no same hostname server, ERR!!!\n");
+		return -1;
+	}
+	return 0;
+}
+
+int meshdev_start_mesh_protocol_wq(void *data)
+{
+	struct rtllib_device *ieee = container_of_work_rsl(data, struct rtllib_device,
+			ext_start_mesh_protocol_wq);
+
+	ieee->set_chan(ieee->dev, ieee->current_mesh_network.channel);
+	if(ieee->pHTInfo->bCurBW40MHz)
+		HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20_40, (ieee->current_mesh_network.channel<=6)?HT_EXTCHNL_OFFSET_UPPER:HT_EXTCHNL_OFFSET_LOWER);  
+	else
+		HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20, (ieee->current_mesh_network.channel<=6)?HT_EXTCHNL_OFFSET_UPPER:HT_EXTCHNL_OFFSET_LOWER);  
+
+	rtllib_start_mesh_protocol(ieee);
+
+	return 0;
+}
+#endif 
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl_debug.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl_debug.h
@@ -0,0 +1,89 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * Based on the r8180 driver, which is:
+ * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+#ifndef _RTL_DEBUG_H
+#define _RTL_DEBUG_H
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/version.h>
+#if(LINUX_VERSION_CODE > KERNEL_VERSION(2,6,9))
+#include <linux/debugfs.h>
+#endif
+
+struct r8192_priv;
+struct _tx_desc_8192se;
+struct _TX_DESC_8192CE;
+struct net_device;
+
+typedef struct _rtl_fs_debug
+{
+	const char *name;
+	struct dentry *dir_drv;
+	struct dentry *debug_register;
+	u32 hw_type;
+	u32 hw_offset; 
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,20))
+	bool hw_holding;
+#else
+	u8 hw_holding;
+#endif
+} rtl_fs_debug;
+
+void print_buffer(u32 *buffer, int len);
+void dump_eprom(struct net_device *dev);
+void rtl8192_dump_reg(struct net_device *dev);
+
+#ifdef RTL8192SE
+void rtl8192se_dump_tx_desc(struct _tx_desc_8192se *pDesc);
+#endif
+#ifdef RTL8192CE
+void rtl8192ce_dump_tx_desc(struct _TX_DESC_8192CE *pDesc);
+#endif
+
+/* debugfs stuff */
+#ifdef CONFIG_RTLWIFI_DEBUGFS
+int rtl_debug_module_init(struct r8192_priv *priv, const char *name);
+void rtl_debug_module_remove(struct r8192_priv *priv);
+int rtl_create_debugfs_root(void);
+void rtl_remove_debugfs_root(void);
+#else
+static inline int rtl_debug_module_init(struct r8192_priv *priv, const char *name) {
+	return 0;
+}
+static inline void rtl_debug_module_remove(struct r8192_priv *priv) {
+	
+}
+static inline int rtl_create_debugfs_root(void) {
+	return 0;
+}
+static inline void rtl_remove_debugfs_root(void) {
+}
+#endif
+
+/* proc stuff */
+void rtl8192_proc_init_one(struct net_device *dev);
+void rtl8192_proc_remove_one(struct net_device *dev);
+void rtl8192_proc_module_init(void);
+void rtl8192_proc_module_remove(void);
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl_endianfree.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl_endianfree.h
@@ -0,0 +1,156 @@
+#ifndef __INC_ENDIANFREE_H
+#define __INC_ENDIANFREE_H
+
+/*
+ *	Call endian free function when
+ *		1. Read/write packet content.
+ *		2. Before write integer to IO.
+ *		3. After read integer from IO.
+ */
+
+#define __MACHINE_LITTLE_ENDIAN 1234    /* LSB first: i386, vax */
+#define __MACHINE_BIG_ENDIAN    4321    /* MSB first: 68000, ibm, net, ppc */
+
+#define BYTE_ORDER __MACHINE_LITTLE_ENDIAN
+
+#if BYTE_ORDER == __MACHINE_LITTLE_ENDIAN
+#define EF1Byte(_val)				((u8)(_val))
+#define EF2Byte(_val)				((u16)(_val))
+#define EF4Byte(_val)				((u32)(_val))
+
+#else
+#define EF1Byte(_val)				((u8)(_val))
+#define EF2Byte(_val)				(((((u16)(_val))&0x00ff)<<8)|((((u16)(_val))&0xff00)>>8))
+#define EF4Byte(_val)				(((((u32)(_val))&0x000000ff)<<24)|\
+						((((u32)(_val))&0x0000ff00)<<8)|\
+						((((u32)(_val))&0x00ff0000)>>8)|\
+						((((u32)(_val))&0xff000000)>>24))
+#endif
+
+#define ReadEF1Byte(_ptr)		EF1Byte(*((u8 *)(_ptr)))
+#define ReadEF2Byte(_ptr)		EF2Byte(*((u16 *)(_ptr)))
+#define ReadEF4Byte(_ptr)		EF4Byte(*((u32 *)(_ptr)))
+
+#define WriteEF1Byte(_ptr, _val)	(*((u8 *)(_ptr)))=EF1Byte(_val)
+#define WriteEF2Byte(_ptr, _val)	(*((u16 *)(_ptr)))=EF2Byte(_val)
+#define WriteEF4Byte(_ptr, _val)	(*((u32 *)(_ptr)))=EF4Byte(_val)									
+#if BYTE_ORDER == __MACHINE_LITTLE_ENDIAN
+#define H2N1BYTE(_val)	((u8)(_val))
+#define H2N2BYTE(_val)	(((((u16)(_val))&0x00ff)<<8)|\
+			((((u16)(_val))&0xff00)>>8))
+#define H2N4BYTE(_val)	(((((u32)(_val))&0x000000ff)<<24)|\
+			((((u32)(_val))&0x0000ff00)<<8)	|\
+			((((u32)(_val))&0x00ff0000)>>8)	|\
+			((((u32)(_val))&0xff000000)>>24))
+#else
+#define H2N1BYTE(_val)			((u8)(_val))
+#define H2N2BYTE(_val)			((u16)(_val))
+#define H2N4BYTE(_val)			((u32)(_val))
+#endif
+
+#if BYTE_ORDER == __MACHINE_LITTLE_ENDIAN
+#define N2H1BYTE(_val)	((u8)(_val))
+#define N2H2BYTE(_val)	(((((u16)(_val))&0x00ff)<<8)|\
+			((((u16)(_val))&0xff00)>>8))
+#define N2H4BYTE(_val)	(((((u32)(_val))&0x000000ff)<<24)|\
+			((((u32)(_val))&0x0000ff00)<<8)	|\
+			((((u32)(_val))&0x00ff0000)>>8)	|\
+			((((u32)(_val))&0xff000000)>>24))
+#else
+#define N2H1BYTE(_val)			((u8)(_val))
+#define N2H2BYTE(_val)			((u16)(_val))
+#define N2H4BYTE(_val)			((u32)(_val))
+#endif
+
+#define BIT_LEN_MASK_32(__BitLen) (0xFFFFFFFF >> (32 - (__BitLen)))
+#define BIT_OFFSET_LEN_MASK_32(__BitOffset, __BitLen) (BIT_LEN_MASK_32(__BitLen) << (__BitOffset)) 
+
+#define LE_P4BYTE_TO_HOST_4BYTE(__pStart) (EF4Byte(*((u32 *)(__pStart))))
+
+#define LE_BITS_TO_4BYTE(__pStart, __BitOffset, __BitLen) \
+	( \
+	  ( LE_P4BYTE_TO_HOST_4BYTE(__pStart) >> (__BitOffset) ) \
+	  & \
+	  BIT_LEN_MASK_32(__BitLen) \
+	)
+
+#define LE_BITS_CLEARED_TO_4BYTE(__pStart, __BitOffset, __BitLen) \
+	( \
+	  LE_P4BYTE_TO_HOST_4BYTE(__pStart) \
+	  & \
+	  ( ~BIT_OFFSET_LEN_MASK_32(__BitOffset, __BitLen) ) \
+	)
+
+#define SET_BITS_TO_LE_4BYTE(__pStart, __BitOffset, __BitLen, __Value) \
+	*((u32 *)(__pStart)) = \
+	EF4Byte( \
+	LE_BITS_CLEARED_TO_4BYTE(__pStart, __BitOffset, __BitLen) \
+	| \
+	( (((u32)__Value) & BIT_LEN_MASK_32(__BitLen)) << (__BitOffset) ) \
+       );
+
+
+#define BIT_LEN_MASK_16(__BitLen) \
+	(0xFFFF >> (16 - (__BitLen)))
+
+#define BIT_OFFSET_LEN_MASK_16(__BitOffset, __BitLen) \
+	(BIT_LEN_MASK_16(__BitLen) << (__BitOffset))
+
+#define LE_P2BYTE_TO_HOST_2BYTE(__pStart) \
+	(EF2Byte(*((u16 *)(__pStart))))
+
+#define LE_BITS_TO_2BYTE(__pStart, __BitOffset, __BitLen) \
+	( \
+	  ( LE_P2BYTE_TO_HOST_2BYTE(__pStart) >> (__BitOffset) ) \
+	  & \
+	  BIT_LEN_MASK_16(__BitLen) \
+	)
+
+#define LE_BITS_CLEARED_TO_2BYTE(__pStart, __BitOffset, __BitLen) \
+	( \
+	  LE_P2BYTE_TO_HOST_2BYTE(__pStart) \
+	  & \
+	  ( ~BIT_OFFSET_LEN_MASK_16(__BitOffset, __BitLen) ) \
+	)
+
+#define SET_BITS_TO_LE_2BYTE(__pStart, __BitOffset, __BitLen, __Value) \
+	*((u16 *)(__pStart)) = \
+	EF2Byte( \
+		LE_BITS_CLEARED_TO_2BYTE(__pStart, __BitOffset, __BitLen) \
+		| \
+		( (((u16)__Value) & BIT_LEN_MASK_16(__BitLen)) << (__BitOffset) ) \
+       );
+
+#define BIT_LEN_MASK_8(__BitLen) \
+	(0xFF >> (8 - (__BitLen)))
+
+#define BIT_OFFSET_LEN_MASK_8(__BitOffset, __BitLen) \
+	(BIT_LEN_MASK_8(__BitLen) << (__BitOffset))
+
+#define LE_P1BYTE_TO_HOST_1BYTE(__pStart) \
+	(EF1Byte(*((u8 *)(__pStart))))
+
+#define LE_BITS_TO_1BYTE(__pStart, __BitOffset, __BitLen) \
+	( \
+	  ( LE_P1BYTE_TO_HOST_1BYTE(__pStart) >> (__BitOffset) ) \
+	  & \
+	  BIT_LEN_MASK_8(__BitLen) \
+	)
+
+#define LE_BITS_CLEARED_TO_1BYTE(__pStart, __BitOffset, __BitLen) \
+	( \
+	  LE_P1BYTE_TO_HOST_1BYTE(__pStart) \
+	  & \
+	  ( ~BIT_OFFSET_LEN_MASK_8(__BitOffset, __BitLen) ) \
+	)
+
+#define SET_BITS_TO_LE_1BYTE(__pStart, __BitOffset, __BitLen, __Value) \
+	*((u8 *)(__pStart)) = \
+	EF1Byte( \
+		LE_BITS_CLEARED_TO_1BYTE(__pStart, __BitOffset, __BitLen) \
+		| \
+		( (((u8)__Value) & BIT_LEN_MASK_8(__BitLen)) << (__BitOffset) ) \
+       );
+
+#define	N_BYTE_ALIGMENT(__Value, __Aligment) ((__Aligment == 1) ? (__Value) : (((__Value + __Aligment - 1) / __Aligment) * __Aligment))
+#endif 
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl_rfkill.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl_rfkill.c
@@ -0,0 +1,221 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ ******************************************************************************/
+#include "rtl_core.h"
+#include "rtl_dm.h"
+#include "rtl_rfkill.h"
+
+#ifdef CONFIG_RTL_RFKILL
+static void rtl8192_before_radio_check(struct net_device *dev, 
+				       bool *rf_state, 
+				       bool *turnonbypowerdomain)
+{  
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	PRT_POWER_SAVE_CONTROL   pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
+
+	*rf_state = (priv->rtllib->eRFPowerState != eRfOn);	
+#ifdef CONFIG_ASPM_OR_D3
+	if((pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_ASPM) && RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_ASPM))
+	{
+		RT_DISABLE_ASPM(dev);
+		RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_ASPM);
+	}
+	else if((pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_PCI_D3) && RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_PCI_D3))
+	{
+#ifdef TODO             
+		RT_LEAVE_D3(dev, false);
+		RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_PCI_D3);
+#endif
+	}
+#endif	
+	if (RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC)) {
+		Power_DomainInit92SE(dev);
+		*turnonbypowerdomain = true;
+	}
+
+}
+
+static bool rtl8192_radio_on_off_checking(struct net_device *dev)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	u8      u1Tmp = 0;
+	u8 	gpio;
+	
+	if (priv->pwrdown) {
+		u1Tmp = read_nic_byte(dev, 0x06);
+		gpio = u1Tmp & BIT6;
+	} else	
+#ifdef CONFIG_BT_COEXIST
+	if (pHalData->bt_coexist.BluetoothCoexist) {
+		if (pHalData->bt_coexist.BT_CoexistType == BT_2Wire) {
+			PlatformEFIOWrite1Byte(pAdapter, MAC_PINMUX_CFG, 0xa);
+			u1Tmp = PlatformEFIORead1Byte(pAdapter, GPIO_IO_SEL);
+			delay_us(100);
+			u1Tmp = PlatformEFIORead1Byte(pAdapter, GPIO_IN);
+			RTPRINT(FPWR, PWRHW, ("GPIO_IN=%02x\n", u1Tmp));
+			retval = (u1Tmp & HAL_8192S_HW_GPIO_OFF_BIT) ? eRfOn : eRfOff;
+		} else if ((pHalData->bt_coexist.BT_CoexistType == BT_ISSC_3Wire) ||
+				(pHalData->bt_coexist.BT_CoexistType == BT_Accel) ||
+				(pHalData->bt_coexist.BT_CoexistType == BT_CSR)) {
+			u4tmp = PHY_QueryBBReg(pAdapter, 0x87c, bMaskDWord);
+			if ((u4tmp & BIT17) != 0) {
+				PHY_SetBBReg(pAdapter, 0x87c, bMaskDWord, u4tmp & ~BIT17);
+				delay_us(50);
+				RTPRINT(FBT, BT_RFPoll, ("BT write 0x87c (~BIT17) = 0x%x\n", u4tmp &~BIT17));
+			}
+			u4tmp = PHY_QueryBBReg(pAdapter, 0x8e0, bMaskDWord);
+			RTPRINT(FBT, BT_RFPoll, ("BT read 0x8e0 (BIT24)= 0x%x\n", u4tmp));
+			retval = (u4tmp & BIT24) ? eRfOn : eRfOff;
+			RTPRINT(FBT, BT_RFPoll, ("BT check RF state to %s\n", (retval==eRfOn)? "ON":"OFF"));
+		}
+	} else 
+#endif
+	{
+		write_nic_byte(dev, MAC_PINMUX_CFG, (GPIOMUX_EN | GPIOSEL_GPIO));
+		u1Tmp = read_nic_byte(dev, GPIO_IO_SEL);
+
+		u1Tmp &= HAL_8192S_HW_GPIO_OFF_MASK;
+		write_nic_byte(dev, GPIO_IO_SEL, u1Tmp);
+
+		mdelay(10);
+
+		u1Tmp = read_nic_byte(dev, GPIO_IN);
+		gpio = u1Tmp & HAL_8192S_HW_GPIO_OFF_BIT;
+	}
+#ifdef DEBUG_RFKILL 
+	{
+		static u8 	gpio_test;
+		printk("%s: gpio = %x\n", __FUNCTION__, gpio);
+		if(gpio_test % 5 == 0) {
+			gpio = 0;
+		} else {
+			gpio = 1;
+		}
+		printk("%s: gpio_test = %d, gpio = %x\n", __FUNCTION__, gpio_test++ % 20, gpio);
+	}
+#endif 
+
+	return gpio;
+}
+
+static void  rtl8192_after_radio_check(struct net_device *dev, bool rf_state, bool turnonbypowerdomain)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+        PRT_POWER_SAVE_CONTROL  pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
+
+	if (turnonbypowerdomain) {
+		PHY_SetRtl8192seRfHalt(dev);
+		RT_SET_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC);
+	}
+#ifdef CONFIG_ASPM_OR_D3
+	if (!rf_state) {
+		if (pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_ASPM) {
+			RT_ENABLE_ASPM(dev);
+			RT_SET_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_ASPM);
+		}
+#ifdef TODO             
+		else if(pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_PCI_D3) {
+			RT_ENTER_D3(dev, false);
+			RT_SET_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_PCI_D3);
+		}
+#endif
+	}
+#endif
+	return;
+}
+
+static bool rtl8192_is_radio_enabled(struct net_device *dev, bool *radio_enabled)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	bool rf_state = false;
+	bool turnonbypowerdomain = false;
+	bool valid;
+
+	rtl8192_before_radio_check(dev, &rf_state, &turnonbypowerdomain);
+	*radio_enabled = rtl8192_radio_on_off_checking(dev);
+	rtl8192_after_radio_check(dev, rf_state, turnonbypowerdomain);
+	if (priv->bResetInProgress) {
+		priv->RFChangeInProgress = false;
+		valid = false;
+	} else {
+		valid = true;
+	}
+	
+	return valid;
+}
+
+bool rtl8192_rfkill_init(struct net_device *dev)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	struct wireless_dev *wdev = &priv->rtllib->wdev;
+	bool radio_enabled;
+	bool valid = rtl8192_is_radio_enabled(dev, &radio_enabled);
+
+	if (valid) {
+		priv->rfkill_off = radio_enabled;
+		printk(KERN_INFO "rtl8192: wireless switch is %s\n",
+				priv->rfkill_off ? "on" : "off");
+		wiphy_rfkill_set_hw_state(wdev->wiphy, !priv->rfkill_off);
+		wiphy_rfkill_start_polling(wdev->wiphy);
+		return true;
+	} else {
+		return false;
+	}
+}
+
+void rtl8192_rfkill_poll(struct net_device *dev)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	struct wireless_dev *wdev = &priv->rtllib->wdev;
+	bool radio_enabled;
+	bool valid;
+	
+	if (priv->being_init_adapter) {
+		return;
+	}
+
+	if (priv->ResetProgress == RESET_TYPE_SILENT) {
+		RT_TRACE((COMP_INIT | COMP_POWER | COMP_RF), 
+				"%s(): silent Reseting, ignore rf polling!\n", __FUNCTION__);
+		return;
+	}
+
+	valid = rtl8192_is_radio_enabled(dev, &radio_enabled);
+	if (valid) {
+		if (unlikely(radio_enabled != priv->rfkill_off)) {
+			priv->rfkill_off = radio_enabled;
+			printk(KERN_INFO "rtl8192: wireless radio switch turned %s\n",
+					radio_enabled ? "on" : "off");
+			wiphy_rfkill_set_hw_state(wdev->wiphy, !radio_enabled);
+		}
+	}
+}
+
+void rtl8192_rfkill_exit(struct net_device *dev)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	struct wireless_dev *wdev = &priv->rtllib->wdev;
+
+	wiphy_rfkill_stop_polling(wdev->wiphy);
+}
+
+#endif 
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl_dm.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl_dm.c
@@ -0,0 +1,5294 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+#ifdef RTL8192SE
+#include "rtl_core.h"
+#include "rtl_dm.h"
+#include "rtl8192s/r8192S_phy.h"
+#include "rtl8192s/r8192S_phyreg.h"
+#else
+#include "rtl_core.h"
+#include "rtl_dm.h"
+#include "rtl8192e/r8192E_hw.h"
+#include "rtl8192e/r8192E_phy.h"
+#include "rtl8192e/r8192E_phyreg.h"
+#include "rtl8192e/r8190P_rtl8256.h"
+#endif
+#ifdef _RTL8192_EXT_PATCH_
+#include "../../mshclass/msh_class.h"
+#endif
+
+/*---------------------------Define Local Constant---------------------------*/
+#ifdef  RTL8190P
+static u32 edca_setting_DL[HT_IOT_PEER_MAX] = 
+{ 0x5e4322, 	
+   0x5e4322, 	
+   0x5ea44f,	
+   0x5e4322,  	
+   0x604322, 	
+   0xa44f, 		
+   0x5e4322,	
+   0x5e4322	
+ };
+
+static u32 edca_setting_DL_GMode[HT_IOT_PEER_MAX] = 
+{ 0x5e4322, 	
+   0x5e4322, 	
+   0x5e4322, 	
+   0x5e4322,  	
+   0x604322, 	
+   0xa44f, 		
+   0x5e4322,	
+   0x5e4322	
+};
+		
+static u32 edca_setting_UL[HT_IOT_PEER_MAX] = 
+{ 0x5e4322, 	
+   0xa44f,   	
+   0x5ea44f,	
+   0x5e4322,  	 
+   0x604322, 	
+   0x5e4322, 	
+   0x5e4322,	
+   0x5e4322	
+};
+
+#elif defined RTL8192E
+static u32 edca_setting_DL[HT_IOT_PEER_MAX] = 
+{ 0x5e4322, 	
+   0x5e4322, 	
+   0x5ea44f,	
+   0x5e4322, 	
+   0x604322, 	
+   0xa44f, 		
+   0x5e4322,	
+   0x5e4332	
+ };
+
+static u32 edca_setting_DL_GMode[HT_IOT_PEER_MAX] = 
+{ 0x5e4322, 	
+   0x5e4322, 	
+   0x5e4322, 	
+   0x5e4322, 	
+   0x604322, 	
+   0xa44f, 		
+   0x5e4322,	
+   0x5e4322	
+};
+
+static u32 edca_setting_UL[HT_IOT_PEER_MAX] = 
+{ 0x5e4322, 	
+   0xa44f,	  	
+   0x5ea44f,	
+   0x5e4322,  	
+   0x604322, 	
+   0x5e4322, 	
+   0x5e4322,	
+   0x5e4332	
+};
+
+#elif defined(RTL8192SE)
+static u32 edca_setting_DL[HT_IOT_PEER_MAX] = 
+{ 0xa44f, 		
+   0x5ea44f, 	
+   0x5ea44f,	
+   0xa630, 		
+   0xa44f,
+   0xa630, 		
+   0xa630,		
+   0xa42b,
+   0x5e4322,	
+   0x5e4322	
+ };	
+
+static u32 edca_setting_DL_GMode[HT_IOT_PEER_MAX] = 
+															
+{ 0x4322, 		
+   0xa44f, 		
+   0x5ea44f,	
+   0xa42b, 		
+   0x5e4322, 	
+   0x4322, 		
+   0xa430,		
+   0x5ea44f,	
+   0x5e4322,	
+   0x5e4322	
+};
+
+static u32 edca_setting_UL[HT_IOT_PEER_MAX] = 
+{ 0x5e4322, 	
+   0xa44f,		
+   0x5ea44f,	
+   0x5ea322, 	
+   0x5ea422,
+   0x5ea322, 	
+   0x3ea44f,	
+   0x5ea44f,	
+   0x5e4322,	
+   0x5e4322	
+ };	
+#endif
+
+#define RTK_UL_EDCA 0xa44f
+#define RTK_DL_EDCA 0x5e4322
+/*---------------------------Define Local Constant---------------------------*/
+
+
+/*------------------------Define global variable-----------------------------*/
+dig_t	dm_digtable;
+u8		dm_shadow[16][256] = {{0}};
+DRxPathSel	DM_RxPathSelTable;
+/*------------------------Define global variable-----------------------------*/
+
+
+/*------------------------Define local variable------------------------------*/
+/*------------------------Define local variable------------------------------*/
+
+
+/*--------------------Define export function prototype-----------------------*/
+extern	void	init_hal_dm(struct net_device *dev);
+extern	void deinit_hal_dm(struct net_device *dev);
+
+extern void hal_dm_watchdog(struct net_device *dev);
+
+
+extern	void	init_rate_adaptive(struct net_device *dev);
+extern	void	dm_txpower_trackingcallback(void *data);
+
+extern	void	dm_restore_dynamic_mechanism_state(struct net_device *dev);
+extern	void	dm_backup_dynamic_mechanism_state(struct net_device *dev);
+extern	void	dm_change_dynamic_initgain_thresh(struct net_device *dev,
+								u32		dm_type,
+								u32		dm_value);
+extern	void	DM_ChangeFsyncSetting(struct net_device *dev,
+												s32		DM_Type,
+												s32		DM_Value);
+extern	void dm_force_tx_fw_info(struct net_device *dev,
+										u32		force_type,
+										u32		force_value);
+extern	void	dm_init_edca_turbo(struct net_device *dev);
+extern	void	dm_rf_operation_test_callback(unsigned long data);
+extern	void	dm_rf_pathcheck_workitemcallback(void *data);
+extern	void dm_fsync_timer_callback(unsigned long data);
+#if 0
+extern	bool	dm_check_lbus_status(struct net_device *dev);
+#endif
+extern	void dm_check_fsync(struct net_device *dev);
+extern	void	dm_shadow_init(struct net_device *dev);
+extern	void dm_initialize_txpower_tracking(struct net_device *dev);
+
+#if (defined RTL8192E || defined RTL8192SE)
+extern  void    dm_CheckRfCtrlGPIO(void *data);
+#endif
+
+#ifdef RTL8192SE
+extern	void DM_TXPowerTracking92SDirectCall(struct net_device *dev);
+static	void dm_CtrlInitGainByTwoPort(struct net_device *dev);
+static	void dm_CtrlInitGainBeforeConnectByRssiAndFalseAlarm(struct net_device *dev);
+static	void	dm_initial_gain_STABeforeConnect(struct net_device *dev);
+
+void	dm_InitRateAdaptiveMask(struct net_device *dev);
+#if 0
+static 	void Adhoc_dm_CheckRateAdaptive(struct net_device * dev);
+#endif
+void 		Adhoc_InitRateAdaptive(struct net_device *dev,struct sta_info  *pEntry);
+#endif
+
+/*--------------------Define export function prototype-----------------------*/
+
+
+/*---------------------Define local function prototype-----------------------*/
+static	void	dm_check_rate_adaptive(struct net_device *dev);
+
+static	void	dm_init_bandwidth_autoswitch(struct net_device *dev);
+static	void	dm_bandwidth_autoswitch(	struct net_device *dev);
+
+
+static	void	dm_check_txpower_tracking(struct net_device *dev);
+
+
+
+
+
+#if defined(RTL8192E)||defined(RTL8190P)
+static	void	dm_bb_initialgain_restore(struct net_device *dev);
+
+
+static	void	dm_bb_initialgain_backup(struct net_device *dev);
+#endif
+
+static	void dm_dig_init(struct net_device *dev);
+static	void dm_ctrl_initgain_byrssi(struct net_device *dev);
+static	void dm_ctrl_initgain_byrssi_highpwr(struct net_device *dev);
+static	void dm_ctrl_initgain_byrssi_by_driverrssi(	struct net_device *dev);
+static	void dm_ctrl_initgain_byrssi_by_fwfalse_alarm(struct net_device *dev);
+static	void dm_initial_gain(struct net_device *dev);
+static	void dm_pd_th(struct net_device *dev);
+static	void dm_cs_ratio(struct net_device *dev);
+
+static	void dm_init_ctstoself(struct net_device *dev);
+static	void dm_Init_WA_Broadcom_IOT(struct net_device *dev);
+#ifdef RTL8192SE
+static	void dm_WA_Broadcom_IOT(struct net_device *dev);
+#endif
+
+static	void	dm_check_edca_turbo(struct net_device *dev);
+
+#if 0
+static	void	dm_check_rfctrl_gpio(struct net_device *dev);
+#endif
+
+#ifndef RTL8190P 
+#endif
+static	void dm_check_pbc_gpio(struct net_device *dev);
+
+
+static	void dm_check_rx_path_selection(struct net_device *dev);
+static 	void dm_init_rxpath_selection(struct net_device *dev);
+static	void dm_rxpath_sel_byrssi(struct net_device *dev);
+
+
+static void dm_init_fsync(struct net_device *dev);
+static void dm_deInit_fsync(struct net_device *dev);
+
+static	void dm_check_txrateandretrycount(struct net_device *dev);
+static  void dm_check_ac_dc_power(struct net_device *dev);
+
+/*---------------------Define local function prototype-----------------------*/
+
+static	void	dm_init_dynamic_txpower(struct net_device *dev);
+static	void	dm_dynamic_txpower(struct net_device *dev);
+
+
+static	void dm_send_rssi_tofw(struct net_device *dev);
+static	void	dm_ctstoself(struct net_device *dev);
+#if defined RTL8192SE
+static	void dm_RefreshRateAdaptiveMask(struct net_device *dev);
+#endif
+/*---------------------------Define function prototype------------------------*/
+
+extern	void
+init_hal_dm(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	priv->DM_Type = DM_Type_ByDriver;
+
+	priv->undecorated_smoothed_pwdb = -1;	
+	
+	dm_init_dynamic_txpower(dev);
+
+#ifdef RTL8192SE
+	if (IS_HARDWARE_TYPE_8192SE(dev))
+		dm_InitRateAdaptiveMask(dev);
+	else
+#endif
+		init_rate_adaptive(dev);
+
+	dm_dig_init(dev);
+	dm_init_edca_turbo(dev);
+	dm_init_bandwidth_autoswitch(dev);
+	dm_init_fsync(dev);
+	dm_init_rxpath_selection(dev);
+	dm_init_ctstoself(dev);
+        if (IS_HARDWARE_TYPE_8192SE(dev))
+	dm_Init_WA_Broadcom_IOT(dev);
+		
+#if (defined RTL8192E || defined RTL8192SE)
+	INIT_DELAYED_WORK_RSL(&priv->gpio_change_rf_wq, (void *)dm_CheckRfCtrlGPIO,dev);
+#endif
+
+}	
+
+extern void deinit_hal_dm(struct net_device *dev)
+{
+
+	dm_deInit_fsync(dev);
+	
+}
+
+
+#ifdef USB_RX_AGGREGATION_SUPPORT
+void dm_CheckRxAggregation(struct net_device *dev) {
+	struct r8192_priv *priv = rtllib_priv((struct net_device *)dev);
+	PRT_HIGH_THROUGHPUT	pHTInfo = priv->rtllib->pHTInfo;
+	static unsigned long	lastTxOkCnt = 0;
+	static unsigned long	lastRxOkCnt = 0;
+	unsigned long		curTxOkCnt = 0;
+	unsigned long		curRxOkCnt = 0;
+
+	curTxOkCnt = priv->stats.txbytesunicast - lastTxOkCnt;
+	curRxOkCnt = priv->stats.rxbytesunicast - lastRxOkCnt;
+
+	if((curTxOkCnt + curRxOkCnt) < 15000000) {
+		return;
+	}
+
+	if(curTxOkCnt > 4*curRxOkCnt) {
+		if (priv->bCurrentRxAggrEnable) {
+			write_nic_dword(dev, 0x1a8, 0);
+			priv->bCurrentRxAggrEnable = false;
+		}
+	}else{
+		if (!priv->bCurrentRxAggrEnable && !pHTInfo->bCurrentRT2RTAggregation) {
+			u32 ulValue;
+			ulValue = (pHTInfo->UsbRxFwAggrEn<<24) | (pHTInfo->UsbRxFwAggrPageNum<<16) |
+				(pHTInfo->UsbRxFwAggrPacketNum<<8) | (pHTInfo->UsbRxFwAggrTimeout);
+			write_nic_dword(dev, 0x1a8, ulValue);
+			priv->bCurrentRxAggrEnable = true;
+		}
+	}
+
+	lastTxOkCnt = priv->stats.txbytesunicast;
+	lastRxOkCnt = priv->stats.rxbytesunicast;
+}	
+#endif	
+
+
+
+extern  void    hal_dm_watchdog(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	if(priv->being_init_adapter)
+		return;
+
+	dm_check_ac_dc_power(dev);
+
+	dm_check_pbc_gpio(dev);
+	dm_check_txrateandretrycount(dev);
+	dm_check_edca_turbo(dev);
+
+	if (IS_HARDWARE_TYPE_8192SE(dev)){
+#ifdef RTL8192SE
+		dm_RefreshRateAdaptiveMask(dev);
+		dm_WA_Broadcom_IOT(dev);
+		return;
+#if 0			
+		dm_check_txpower_tracking(dev);
+		dm_ctrl_initgain_byrssi(dev);	
+		dm_dynamic_txpower(dev);
+		dm_RefreshRateAdaptiveMask(dev);
+		dm_check_fsync(dev); 
+		if(priv->rtllib->iw_mode == IW_MODE_ADHOC)
+			Adhoc_dm_CheckRateAdaptive(dev);
+		else
+			dm_check_rate_adaptive(dev);
+#endif		
+#endif
+	}
+	dm_check_rate_adaptive(dev);
+	dm_dynamic_txpower(dev);	
+	dm_check_txpower_tracking(dev);
+
+	dm_ctrl_initgain_byrssi(dev);
+	dm_bandwidth_autoswitch(dev);
+
+	dm_check_rx_path_selection(dev);
+	dm_check_fsync(dev); 
+
+	dm_send_rssi_tofw(dev);
+	dm_ctstoself(dev);
+
+#ifdef USB_RX_AGGREGATION_SUPPORT
+	dm_CheckRxAggregation(dev);
+#endif	
+}	
+
+void dm_check_ac_dc_power(struct net_device *dev) 
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	static char *ac_dc_check_script_path = "/etc/acpi/wireless-rtl-ac-dc-power.sh";
+	char *argv[] = {ac_dc_check_script_path,DRV_NAME,NULL};
+	static char *envp[] = {"HOME=/", 
+			"TERM=linux", 
+			"PATH=/usr/bin:/bin", 
+			 NULL};
+
+	if(priv->ResetProgress == RESET_TYPE_SILENT)
+	{
+		RT_TRACE((COMP_INIT | COMP_POWER | COMP_RF), "GPIOChangeRFWorkItemCallBack(): Silent Reseting!!!!!!!\n");
+		return;
+	}
+
+	if(priv->rtllib->state != RTLLIB_LINKED) {
+		return;
+	}
+	call_usermodehelper(ac_dc_check_script_path,argv,envp,1);
+
+	return;
+};
+
+
+extern void init_rate_adaptive(struct net_device * dev)	
+{
+
+	struct r8192_priv *priv = rtllib_priv(dev);
+	prate_adaptive			pra = (prate_adaptive)&priv->rate_adaptive;
+	
+	pra->ratr_state = DM_RATR_STA_MAX;
+	pra->high2low_rssi_thresh_for_ra = RateAdaptiveTH_High;
+	pra->low2high_rssi_thresh_for_ra20M = RateAdaptiveTH_Low_20M+5;
+	pra->low2high_rssi_thresh_for_ra40M = RateAdaptiveTH_Low_40M+5;
+
+	pra->high_rssi_thresh_for_ra = RateAdaptiveTH_High+5;
+	pra->low_rssi_thresh_for_ra20M = RateAdaptiveTH_Low_20M;
+	pra->low_rssi_thresh_for_ra40M = RateAdaptiveTH_Low_40M;
+	
+	if(priv->CustomerID == RT_CID_819x_Netcore)
+		pra->ping_rssi_enable = 1;
+	else
+		pra->ping_rssi_enable = 0;				
+	pra->ping_rssi_thresh_for_ra = 15;
+	
+	
+	if (priv->rf_type == RF_2T4R)
+	{
+		pra->upper_rssi_threshold_ratr		= 	0x8f0f0000;
+		pra->middle_rssi_threshold_ratr		= 	0x8f0ff000;
+		pra->low_rssi_threshold_ratr		= 	0x8f0ff001;
+		pra->low_rssi_threshold_ratr_40M	= 	0x8f0ff005;
+		pra->low_rssi_threshold_ratr_20M	= 	0x8f0ff001;
+		pra->ping_rssi_ratr	= 	0x0000000d;
+	}
+	else if (priv->rf_type == RF_1T2R)
+	{
+		pra->upper_rssi_threshold_ratr		= 	0x000f0000;		
+		pra->middle_rssi_threshold_ratr		= 	0x000ff000;
+		pra->low_rssi_threshold_ratr		= 	0x000ff001;
+		pra->low_rssi_threshold_ratr_40M	= 	0x000ff005;
+		pra->low_rssi_threshold_ratr_20M	= 	0x000ff001;
+		pra->ping_rssi_ratr	= 	0x0000000d;
+	}
+	
+}	
+
+
+static void dm_check_rate_adaptive(struct net_device * dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	PRT_HIGH_THROUGHPUT	pHTInfo = priv->rtllib->pHTInfo;
+	prate_adaptive			pra = (prate_adaptive)&priv->rate_adaptive;
+	u32						currentRATR, targetRATR = 0;
+	u32						LowRSSIThreshForRA = 0, HighRSSIThreshForRA = 0;
+	bool						bshort_gi_enabled = false;
+	static u8					ping_rssi_state=0;
+
+	if(IS_NIC_DOWN(priv)){
+		RT_TRACE(COMP_RATE, "<---- dm_check_rate_adaptive(): driver is going to unload\n");
+		return;
+	}
+
+	if(pra->rate_adaptive_disabled)
+		return;
+
+	if( !(priv->rtllib->mode == WIRELESS_MODE_N_24G ||
+		 priv->rtllib->mode == WIRELESS_MODE_N_5G))
+		 return;
+		
+	if( priv->rtllib->state == RTLLIB_LINKED )
+	{
+
+		bshort_gi_enabled = (pHTInfo->bCurTxBW40MHz && pHTInfo->bCurShortGI40MHz) ||
+			(!pHTInfo->bCurTxBW40MHz && pHTInfo->bCurShortGI20MHz);
+	
+
+		pra->upper_rssi_threshold_ratr =
+				(pra->upper_rssi_threshold_ratr & (~BIT31)) | ((bshort_gi_enabled)? BIT31:0) ;
+
+		pra->middle_rssi_threshold_ratr = 
+				(pra->middle_rssi_threshold_ratr & (~BIT31)) | ((bshort_gi_enabled)? BIT31:0) ;
+
+		if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
+		{
+			pra->low_rssi_threshold_ratr = 
+				(pra->low_rssi_threshold_ratr_40M & (~BIT31)) | ((bshort_gi_enabled)? BIT31:0) ;
+		}
+		else
+		{
+			pra->low_rssi_threshold_ratr = 
+			(pra->low_rssi_threshold_ratr_20M & (~BIT31)) | ((bshort_gi_enabled)? BIT31:0) ;
+		}
+		pra->ping_rssi_ratr = 
+				(pra->ping_rssi_ratr & (~BIT31)) | ((bshort_gi_enabled)? BIT31:0) ;
+		
+		if (pra->ratr_state == DM_RATR_STA_HIGH)
+		{
+			HighRSSIThreshForRA 	= pra->high2low_rssi_thresh_for_ra;
+			LowRSSIThreshForRA	= (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)?
+					(pra->low_rssi_thresh_for_ra40M):(pra->low_rssi_thresh_for_ra20M);
+		}
+		else if (pra->ratr_state == DM_RATR_STA_LOW)
+		{
+			HighRSSIThreshForRA	= pra->high_rssi_thresh_for_ra;
+			LowRSSIThreshForRA 	= (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)?
+					(pra->low2high_rssi_thresh_for_ra40M):(pra->low2high_rssi_thresh_for_ra20M);
+		}
+		else
+		{
+			HighRSSIThreshForRA	= pra->high_rssi_thresh_for_ra;
+			LowRSSIThreshForRA	= (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)?
+					(pra->low_rssi_thresh_for_ra40M):(pra->low_rssi_thresh_for_ra20M);
+		}
+	
+		if(priv->undecorated_smoothed_pwdb >= (long)HighRSSIThreshForRA)
+		{
+			pra->ratr_state = DM_RATR_STA_HIGH;
+			targetRATR = pra->upper_rssi_threshold_ratr;
+		}else if(priv->undecorated_smoothed_pwdb >= (long)LowRSSIThreshForRA)
+		{
+			pra->ratr_state = DM_RATR_STA_MIDDLE;
+			targetRATR = pra->middle_rssi_threshold_ratr;
+		}else
+		{
+			pra->ratr_state = DM_RATR_STA_LOW;
+			targetRATR = pra->low_rssi_threshold_ratr;
+		}
+
+		if(pra->ping_rssi_enable)
+		{
+			if(priv->undecorated_smoothed_pwdb < (long)(pra->ping_rssi_thresh_for_ra+5))
+			{
+				if( (priv->undecorated_smoothed_pwdb < (long)pra->ping_rssi_thresh_for_ra) ||
+					ping_rssi_state )
+				{
+					pra->ratr_state = DM_RATR_STA_LOW;
+					targetRATR = pra->ping_rssi_ratr;
+					ping_rssi_state = 1;
+				}
+			}
+			else
+			{
+				ping_rssi_state = 0;
+			}
+		}
+		
+#if 1		
+		if(priv->rtllib->GetHalfNmodeSupportByAPsHandler(dev))
+			targetRATR &=  0xf00fffff;
+#endif
+
+		currentRATR = read_nic_dword(dev, RATR0);
+		if( targetRATR !=  currentRATR )
+		{
+			u32 ratr_value;
+			ratr_value = targetRATR;
+			RT_TRACE(COMP_RATE,"currentRATR = %x, targetRATR = %x\n", currentRATR, targetRATR);				
+			if(priv->rf_type == RF_1T2R)		
+			{
+				ratr_value &= ~(RATE_ALL_OFDM_2SS);
+			}
+			write_nic_dword(dev, RATR0, ratr_value);
+			write_nic_byte(dev, UFWP, 1);
+			
+			pra->last_ratr = targetRATR;
+		}
+		
+	}
+	else
+	{
+		pra->ratr_state = DM_RATR_STA_MAX;
+	}
+
+}	
+
+#ifdef RTL8192SE
+void dm_InitRateAdaptiveMask(struct net_device * dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	prate_adaptive	pRA =  (prate_adaptive)&priv->rate_adaptive;
+
+	pRA->ratr_state = DM_RATR_STA_MAX;
+	pRA->PreRATRState = DM_RATR_STA_MAX;
+
+#ifdef _RTL8192_EXT_PATCH_
+	if (priv->DM_Type == DM_Type_ByDriver && priv->pFirmware->FirmwareVersion >= 60)
+		priv->rtllib->bUseRAMask = true;
+	else
+#endif		
+		priv->rtllib->bUseRAMask = false;
+
+	printk("=========>%s: bUseRAMask=%d\n", __func__, priv->rtllib->bUseRAMask);
+	priv->bInformFWDriverControlDM = false;
+	
+}
+#endif
+
+static void dm_init_bandwidth_autoswitch(struct net_device * dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	priv->rtllib->bandwidth_auto_switch.threshold_20Mhzto40Mhz = BW_AUTO_SWITCH_LOW_HIGH;
+	priv->rtllib->bandwidth_auto_switch.threshold_40Mhzto20Mhz = BW_AUTO_SWITCH_HIGH_LOW;
+	priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz = false;
+	priv->rtllib->bandwidth_auto_switch.bautoswitch_enable = false;
+	
+}	
+
+
+static void dm_bandwidth_autoswitch(struct net_device * dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	if(priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20 ||!priv->rtllib->bandwidth_auto_switch.bautoswitch_enable){
+		return;
+	}else{
+		if(priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz == false){
+			if(priv->undecorated_smoothed_pwdb <= priv->rtllib->bandwidth_auto_switch.threshold_40Mhzto20Mhz)
+				priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz = true;
+		}else{
+			if(priv->undecorated_smoothed_pwdb >= priv->rtllib->bandwidth_auto_switch.threshold_20Mhzto40Mhz)
+				priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz = false;
+	
+		}
+	}
+}	
+
+#ifdef Rtl8192SE
+u32	OFDMSwingTable[OFDM_Table_Length] = {
+	0x7f8001fe,	
+	0x788001e2,	
+	0x71c001c7,	
+	0x6b8001ae,	
+	0x65400195,	
+	0x5fc0017f,	
+	0x5a400169,	
+	0x55400155,	
+	0x50800142,	
+	0x4c000130,	
+	0x47c0011f,	
+	0x43c0010f,	
+	0x40000100,	
+	0x3c8000f2,	
+	0x390000e4,	
+	0x35c000d7,	
+	0x32c000cb,	
+	0x300000c0,	
+	0x2d4000b5,	
+	0x2ac000ab,	
+	0x288000a2,	
+	0x26000098,	
+	0x24000090,	
+	0x22000088,	
+	0x20000080,	
+	0x1e400079,	
+	0x1c800072,	
+	0x1b00006c,	
+	0x19800066,	
+	0x18000060,	
+	0x16c0005b,	
+	0x15800056,	
+	0x14400051,	
+	0x1300004c,	
+	0x12000048,	
+	0x11000044,	
+	0x10000040,	
+};
+
+u8	CCKSwingTable_Ch1_Ch13[CCK_Table_length][8] = {
+	{0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04},	
+	{0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04},	
+	{0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03},	
+	{0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03},	
+	{0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03},	
+	{0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03},	
+	{0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03},	
+	{0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03},	
+	{0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02},	
+	{0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02},	
+	{0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02},	
+	{0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02},	
+	{0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02},	
+	{0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02},	
+	{0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02},	
+	{0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02},	
+	{0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01},	
+	{0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02},	
+	{0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01},	
+	{0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},	
+	{0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},	
+	{0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01},	
+	{0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01},	
+	{0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01},	
+	{0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01},	
+	{0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01},	
+	{0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01},	
+	{0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01},	
+	{0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01},	
+	{0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01},	
+	{0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01},	
+	{0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01},	
+	{0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}	
+};
+
+
+u8	CCKSwingTable_Ch14[CCK_Table_length][8] = {
+	{0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00},	
+	{0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00},	
+	{0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00},	
+	{0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00},	
+	{0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00},	
+	{0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00},	
+	{0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00},	
+	{0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00},	
+	{0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00},	
+	{0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00},	
+	{0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00},	
+	{0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00},	
+	{0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00},	
+	{0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00},	
+	{0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00},	
+	{0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00},	
+	{0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00},	
+	{0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00},	
+	{0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00},	
+	{0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},	
+	{0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},	
+	{0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00},	
+	{0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00},	
+	{0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},	
+	{0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},	
+	{0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00},	
+	{0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},	
+	{0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},	
+	{0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},	
+	{0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},	
+	{0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},	
+	{0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},	
+	{0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}	
+};
+#elif defined RTL8192E
+static u32 OFDMSwingTable[OFDM_Table_Length] = {
+	0x7f8001fe,	
+	0x71c001c7,	
+	0x65400195,	
+	0x5a400169,	
+	0x50800142,	
+	0x47c0011f,	
+	0x40000100,	
+	0x390000e4,	
+	0x32c000cb,	
+	0x2d4000b5,	
+	0x288000a2,	
+	0x24000090,	
+	0x20000080,	
+	0x1c800072,	
+	0x19800066,	
+	0x26c0005b,	
+	0x24400051,	
+	0x12000048,	
+	0x10000040	
+};
+static u8	CCKSwingTable_Ch1_Ch13[CCK_Table_length][8] = {
+	{0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04},	
+	{0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03},	
+	{0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03},	
+	{0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03},	
+	{0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02},	
+	{0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02},	
+	{0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02},	
+	{0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02},	
+	{0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01},	
+	{0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01},	
+	{0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},	
+	{0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}	
+};
+
+static u8	CCKSwingTable_Ch14[CCK_Table_length][8] = {
+	{0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00},	
+	{0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00},	
+	{0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00},	
+	{0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00},	
+	{0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00},	
+	{0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00},	
+	{0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00},	
+	{0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00},	
+	{0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00},	
+	{0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00},	
+	{0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},	
+	{0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}	
+};
+#endif
+#define		Pw_Track_Flag				0x11d
+#define		Tssi_Mea_Value				0x13c
+#define		Tssi_Report_Value1			0x134
+#define		Tssi_Report_Value2			0x13e
+#define		FW_Busy_Flag				0x13f
+
+#ifndef RTL8192SE
+static void dm_TXPowerTrackingCallback_TSSI(struct net_device * dev)
+	{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	bool						bHighpowerstate, viviflag = false;
+	DCMD_TXCMD_T			tx_cmd;
+	u8					powerlevelOFDM24G;
+	int	    				i =0, j = 0, k = 0;
+	u8						RF_Type, tmp_report[5]={0, 0, 0, 0, 0};
+	u32						Value;
+	u8						Pwr_Flag;
+	u16					Avg_TSSI_Meas, TSSI_13dBm, Avg_TSSI_Meas_from_driver=0;
+#ifdef RTL8192U
+	RT_STATUS 				rtStatus = RT_STATUS_SUCCESS;
+#endif
+	u32						delta=0;
+	RT_TRACE(COMP_POWER_TRACKING,"%s()\n",__FUNCTION__);
+	write_nic_byte(dev, Pw_Track_Flag, 0);
+	write_nic_byte(dev, FW_Busy_Flag, 0);
+	priv->rtllib->bdynamic_txpower_enable = false;
+	bHighpowerstate = priv->bDynamicTxHighPower;
+
+	powerlevelOFDM24G = (u8)(priv->Pwr_Track>>24); 
+	RF_Type = priv->rf_type;
+	Value = (RF_Type<<8) | powerlevelOFDM24G;
+
+	RT_TRACE(COMP_POWER_TRACKING, "powerlevelOFDM24G = %x\n", powerlevelOFDM24G);
+
+	
+#ifdef RTL8190P
+	for(j = 0; j<1; j++)	
+#else
+	for(j = 0; j<=30; j++)	
+#endif
+{	
+
+	tx_cmd.Op		= TXCMD_SET_TX_PWR_TRACKING;
+	tx_cmd.Length	= 4;
+	tx_cmd.Value		= Value;
+#ifdef RTL8192U
+	rtStatus = SendTxCommandPacket(dev, &tx_cmd, 12);	
+	if (rtStatus == RT_STATUS_FAILURE)
+	{
+		RT_TRACE(COMP_POWER_TRACKING, "Set configuration with tx cmd queue fail!\n");
+	}
+#else
+	cmpk_message_handle_tx(dev, (u8*)&tx_cmd, DESC_PACKET_TYPE_INIT, sizeof(DCMD_TXCMD_T));
+#endif
+	mdelay(1);
+	for(i = 0;i <= 30; i++)
+	{
+		Pwr_Flag = read_nic_byte(dev, Pw_Track_Flag);
+		
+		if (Pwr_Flag == 0)
+		{	
+			mdelay(1);
+
+			if(priv->bResetInProgress)	
+			{
+				RT_TRACE(COMP_POWER_TRACKING, "we are in slient reset progress, so return\n");		
+				write_nic_byte(dev, Pw_Track_Flag, 0);
+				write_nic_byte(dev, FW_Busy_Flag, 0);
+				return;
+			}
+#ifdef RTL8192E
+			if((priv->rtllib->eRFPowerState != eRfOn))
+			{
+				RT_TRACE(COMP_POWER_TRACKING, "we are in power save, so return\n");		
+				write_nic_byte(dev, Pw_Track_Flag, 0);
+				write_nic_byte(dev, FW_Busy_Flag, 0);
+				return;
+			}
+
+#endif
+			continue;
+		}
+
+		Avg_TSSI_Meas = read_nic_word(dev, Tssi_Mea_Value);
+
+		if(Avg_TSSI_Meas == 0)
+		{
+			write_nic_byte(dev, Pw_Track_Flag, 0);
+			write_nic_byte(dev, FW_Busy_Flag, 0);
+			return;
+		}
+		
+		for(k = 0;k < 5; k++)
+		{
+			if(k !=4)
+				tmp_report[k] = read_nic_byte(dev, Tssi_Report_Value1+k);
+			else
+				tmp_report[k] = read_nic_byte(dev, Tssi_Report_Value2);
+
+			RT_TRACE(COMP_POWER_TRACKING, "TSSI_report_value = %d\n", tmp_report[k]);
+
+		        {
+			       if(tmp_report[k] <= 20)
+			       {	
+				      viviflag =true;
+				      break;
+			       }
+		        }
+		}
+
+		if(viviflag ==true)
+		{	
+			write_nic_byte(dev, Pw_Track_Flag, 0);
+			viviflag = false;
+			RT_TRACE(COMP_POWER_TRACKING, "we filted this data\n");
+			for(k = 0;k < 5; k++)
+				tmp_report[k] = 0;
+			break;
+		}
+
+		for(k = 0;k < 5; k++)
+		{
+			Avg_TSSI_Meas_from_driver += tmp_report[k];
+		}
+
+		Avg_TSSI_Meas_from_driver = Avg_TSSI_Meas_from_driver*100/5;
+		RT_TRACE(COMP_POWER_TRACKING, "Avg_TSSI_Meas_from_driver = %d\n", Avg_TSSI_Meas_from_driver);
+		TSSI_13dBm = priv->TSSI_13dBm;
+		RT_TRACE(COMP_POWER_TRACKING, "TSSI_13dBm = %d\n", TSSI_13dBm);
+		
+		if(Avg_TSSI_Meas_from_driver > TSSI_13dBm)
+			delta = Avg_TSSI_Meas_from_driver - TSSI_13dBm;
+		else
+			delta = TSSI_13dBm - Avg_TSSI_Meas_from_driver;
+
+		if(delta <= E_FOR_TX_POWER_TRACK)
+		{
+			priv->rtllib->bdynamic_txpower_enable = true;
+			write_nic_byte(dev, Pw_Track_Flag, 0);
+			write_nic_byte(dev, FW_Busy_Flag, 0);
+			RT_TRACE(COMP_POWER_TRACKING, "tx power track is done\n");
+			RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex = %d\n", priv->rfa_txpowertrackingindex);
+			RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_real = %d\n", priv->rfa_txpowertrackingindex_real);
+#ifdef RTL8190P					
+			RT_TRACE(COMP_POWER_TRACKING, "priv->rfc_txpowertrackingindex = %d\n", priv->rfc_txpowertrackingindex);
+			RT_TRACE(COMP_POWER_TRACKING, "priv->rfc_txpowertrackingindex_real = %d\n", priv->rfc_txpowertrackingindex_real);
+#endif
+			RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_difference = %d\n", priv->CCKPresentAttentuation_difference);
+			RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation = %d\n", priv->CCKPresentAttentuation);
+			return;
+		}
+		else
+		{
+			if(Avg_TSSI_Meas_from_driver < TSSI_13dBm - E_FOR_TX_POWER_TRACK)
+			{
+				if (RF_Type == RF_2T4R)
+				{
+						
+						if((priv->rfa_txpowertrackingindex > 0) &&(priv->rfc_txpowertrackingindex > 0))
+				{
+					priv->rfa_txpowertrackingindex--;
+					if(priv->rfa_txpowertrackingindex_real > 4)
+					{
+						priv->rfa_txpowertrackingindex_real--;
+						rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
+					}
+
+					priv->rfc_txpowertrackingindex--;
+					if(priv->rfc_txpowertrackingindex_real > 4)
+					{
+						priv->rfc_txpowertrackingindex_real--;
+						rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
+					}
+						}
+						else
+						{
+								rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[4].txbbgain_value);
+								rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[4].txbbgain_value);
+				}
+			}
+			else
+			{
+						{
+#ifdef RTL8190P
+								{
+						if(priv->rfc_txpowertrackingindex > 0)
+						{
+							priv->rfc_txpowertrackingindex--;
+							if(priv->rfc_txpowertrackingindex_real > 4)
+							{
+								priv->rfc_txpowertrackingindex_real--;
+								rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
+							}
+						}
+						else
+							rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[4].txbbgain_value);		
+				}
+#endif
+#ifdef RTL8192E
+								{
+									if(priv->rfa_txpowertrackingindex > 0)
+									{
+										priv->rfa_txpowertrackingindex--;
+										if(priv->rfa_txpowertrackingindex_real > 4)
+										{
+											priv->rfa_txpowertrackingindex_real--;
+											rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
+										}
+									}
+									else
+											rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[4].txbbgain_value);							
+								}
+#endif
+						}
+
+				}
+			}
+			else
+			{
+				if (RF_Type == RF_2T4R)
+				{
+					if((priv->rfa_txpowertrackingindex < TxBBGainTableLength - 1) &&(priv->rfc_txpowertrackingindex < TxBBGainTableLength - 1))				
+				{
+					priv->rfa_txpowertrackingindex++;
+					priv->rfa_txpowertrackingindex_real++;					
+					rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
+					priv->rfc_txpowertrackingindex++;
+					priv->rfc_txpowertrackingindex_real++;					
+					rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
+				}
+					else
+					{
+						rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[TxBBGainTableLength - 1].txbbgain_value);
+						rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[TxBBGainTableLength - 1].txbbgain_value);
+			}
+				}
+				else
+				{
+					{
+#ifdef RTL8190P
+							{
+					if(priv->rfc_txpowertrackingindex < (TxBBGainTableLength - 1))
+					{
+							priv->rfc_txpowertrackingindex++;
+							priv->rfc_txpowertrackingindex_real++;					
+							rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
+					}
+					else
+							rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[TxBBGainTableLength - 1].txbbgain_value);
+				}
+#endif
+#ifdef RTL8192E
+							{
+								if(priv->rfa_txpowertrackingindex < (TxBBGainTableLength - 1))
+								{
+									priv->rfa_txpowertrackingindex++;
+									priv->rfa_txpowertrackingindex_real++;					
+									rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
+			}
+								else
+									rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[TxBBGainTableLength - 1].txbbgain_value);
+							}
+#endif
+					}
+				}
+			}
+			if (RF_Type == RF_2T4R){
+			priv->CCKPresentAttentuation_difference
+				= priv->rfa_txpowertrackingindex - priv->rfa_txpowertracking_default;
+			}else{
+				{
+#ifdef RTL8190P
+				priv->CCKPresentAttentuation_difference
+					= priv->rfc_txpowertrackingindex - priv->rfc_txpowertracking_default;
+#endif
+#ifdef RTL8192E
+						priv->CCKPresentAttentuation_difference
+							= priv->rfa_txpowertrackingindex_real - priv->rfa_txpowertracking_default;
+#endif
+				}
+			}
+
+			if(priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20)	
+				priv->CCKPresentAttentuation 
+				= priv->CCKPresentAttentuation_20Mdefault + priv->CCKPresentAttentuation_difference;
+			else
+				priv->CCKPresentAttentuation 
+				= priv->CCKPresentAttentuation_40Mdefault + priv->CCKPresentAttentuation_difference;
+
+			if(priv->CCKPresentAttentuation > (CCKTxBBGainTableLength-1))
+					priv->CCKPresentAttentuation = CCKTxBBGainTableLength-1;
+			if(priv->CCKPresentAttentuation < 0)
+					priv->CCKPresentAttentuation = 0;
+
+			if(priv->CCKPresentAttentuation > -1&&priv->CCKPresentAttentuation < CCKTxBBGainTableLength)
+			{
+				if(priv->rtllib->current_network.channel == 14 && !priv->bcck_in_ch14)
+				{
+					priv->bcck_in_ch14 = true;
+					dm_cck_txpower_adjust(dev,priv->bcck_in_ch14);
+				}
+				else if(priv->rtllib->current_network.channel != 14 && priv->bcck_in_ch14)
+				{
+					priv->bcck_in_ch14 = false;
+					dm_cck_txpower_adjust(dev,priv->bcck_in_ch14);
+				}
+				else
+					dm_cck_txpower_adjust(dev,priv->bcck_in_ch14);		
+			}
+		RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex = %d\n", priv->rfa_txpowertrackingindex);
+		RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_real = %d\n", priv->rfa_txpowertrackingindex_real);
+#ifdef RTL8190P
+		RT_TRACE(COMP_POWER_TRACKING, "priv->rfc_txpowertrackingindex = %d\n", priv->rfc_txpowertrackingindex);
+		RT_TRACE(COMP_POWER_TRACKING, "priv->rfc_txpowertrackingindex_real = %d\n", priv->rfc_txpowertrackingindex_real);
+#endif
+		RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_difference = %d\n", priv->CCKPresentAttentuation_difference);
+		RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation = %d\n", priv->CCKPresentAttentuation);
+
+		if (priv->CCKPresentAttentuation_difference <= -12||priv->CCKPresentAttentuation_difference >= 24)
+		{
+			priv->rtllib->bdynamic_txpower_enable = true;
+			write_nic_byte(dev, Pw_Track_Flag, 0);
+			write_nic_byte(dev, FW_Busy_Flag, 0);
+			RT_TRACE(COMP_POWER_TRACKING, "tx power track--->limited\n");
+			return;
+		}
+
+		
+	}
+		write_nic_byte(dev, Pw_Track_Flag, 0);
+		Avg_TSSI_Meas_from_driver = 0;
+		for(k = 0;k < 5; k++)
+			tmp_report[k] = 0;
+		break;
+	}
+	write_nic_byte(dev, FW_Busy_Flag, 0);
+}	
+		priv->rtllib->bdynamic_txpower_enable = true;
+		write_nic_byte(dev, Pw_Track_Flag, 0);
+}
+#endif
+
+#ifdef RTL8192E
+static void dm_TXPowerTrackingCallback_ThermalMeter(struct net_device * dev)
+{
+#define ThermalMeterVal	9
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u32 tmpRegA, TempCCk;
+	u8 tmpOFDMindex, tmpCCKindex, tmpCCK20Mindex, tmpCCK40Mindex, tmpval;
+	int i =0, CCKSwingNeedUpdate=0;
+
+	if(!priv->btxpower_trackingInit)
+	{
+		tmpRegA= rtl8192_QueryBBReg(dev, rOFDM0_XATxIQImbalance, bMaskDWord);
+		for(i=0; i<OFDM_Table_Length; i++)	
+		{
+			if(tmpRegA == OFDMSwingTable[i])
+			{
+				priv->OFDM_index= (u8)i;
+				RT_TRACE(COMP_POWER_TRACKING, "Initial reg0x%x = 0x%x, OFDM_index=0x%x\n", 
+					rOFDM0_XATxIQImbalance, tmpRegA, priv->OFDM_index);
+			}
+		}
+
+		TempCCk = rtl8192_QueryBBReg(dev, rCCK0_TxFilter1, bMaskByte2);
+		for(i=0 ; i<CCK_Table_length ; i++)
+		{
+			if(TempCCk == (u32)CCKSwingTable_Ch1_Ch13[i][0])
+			{
+				priv->CCK_index =(u8) i;
+				RT_TRACE(COMP_POWER_TRACKING, "Initial reg0x%x = 0x%x, CCK_index=0x%x\n", 
+					rCCK0_TxFilter1, TempCCk, priv->CCK_index);
+		break;
+	}
+}	
+		priv->btxpower_trackingInit = true;
+		return;
+	}
+
+#if 0
+{
+	UINT32	curr_addr;
+	UINT32	reg_value;
+	
+		for (curr_addr = 0; curr_addr < 0x2d; curr_addr++)	
+		{			  
+			reg_value = PHY_QueryRFReg(	dev, (RF90_RADIO_PATH_E)RF90_PATH_A, 
+										curr_addr, bMaskDWord);
+		}
+
+	pHalData->TXPowercount = 0;
+	return;
+}
+#endif
+
+	tmpRegA = rtl8192_phy_QueryRFReg(dev, RF90_PATH_A, 0x12, 0x078);	
+	RT_TRACE(COMP_POWER_TRACKING, "Readback ThermalMeterA = %d \n", tmpRegA);
+	if(tmpRegA < 3 || tmpRegA > 13)
+		return;
+	if(tmpRegA >= 12)	
+		tmpRegA = 12;
+	RT_TRACE(COMP_POWER_TRACKING, "Valid ThermalMeterA = %d \n", tmpRegA);
+	priv->ThermalMeter[0] = ThermalMeterVal;	
+	priv->ThermalMeter[1] = ThermalMeterVal;	
+
+	if(priv->ThermalMeter[0] >= (u8)tmpRegA)	
+	{
+		tmpOFDMindex = tmpCCK20Mindex = 6+(priv->ThermalMeter[0]-(u8)tmpRegA);
+		tmpCCK40Mindex = tmpCCK20Mindex - 6;
+		if(tmpOFDMindex >= OFDM_Table_Length)
+			tmpOFDMindex = OFDM_Table_Length-1;
+		if(tmpCCK20Mindex >= CCK_Table_length)
+			tmpCCK20Mindex = CCK_Table_length-1;
+		if(tmpCCK40Mindex >= CCK_Table_length)
+			tmpCCK40Mindex = CCK_Table_length-1;
+	}
+	else
+	{		
+		tmpval = ((u8)tmpRegA - priv->ThermalMeter[0]);
+		if(tmpval >= 6)								
+			tmpOFDMindex = tmpCCK20Mindex = 0;		
+		else
+			tmpOFDMindex = tmpCCK20Mindex = 6 - tmpval;
+		tmpCCK40Mindex = 0;
+	}
+	if(priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)	
+		tmpCCKindex = tmpCCK40Mindex;
+	else
+		tmpCCKindex = tmpCCK20Mindex;
+
+	priv->Record_CCK_20Mindex = tmpCCK20Mindex;
+	priv->Record_CCK_40Mindex = tmpCCK40Mindex;
+	RT_TRACE(COMP_POWER_TRACKING, "Record_CCK_20Mindex / Record_CCK_40Mindex = %d / %d.\n", 
+		priv->Record_CCK_20Mindex, priv->Record_CCK_40Mindex);
+
+	if(priv->rtllib->current_network.channel == 14 && !priv->bcck_in_ch14)
+	{
+		priv->bcck_in_ch14 = true;
+		CCKSwingNeedUpdate = 1;
+	}
+	else if(priv->rtllib->current_network.channel != 14 && priv->bcck_in_ch14)
+	{
+		priv->bcck_in_ch14 = false;
+		CCKSwingNeedUpdate = 1;
+	}
+
+	if(priv->CCK_index != tmpCCKindex)
+{
+		priv->CCK_index = tmpCCKindex; 
+		CCKSwingNeedUpdate = 1;
+	}
+
+	if(CCKSwingNeedUpdate)
+	{
+		dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
+	}
+	if(priv->OFDM_index != tmpOFDMindex)
+	{
+		priv->OFDM_index = tmpOFDMindex;
+		rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable[priv->OFDM_index]);		
+		RT_TRACE(COMP_POWER_TRACKING, "Update OFDMSwing[%d] = 0x%x\n", 
+			priv->OFDM_index, OFDMSwingTable[priv->OFDM_index]);
+	}
+	priv->txpower_count = 0;
+}
+#elif defined (RTL8192SE)
+static void dm_TXPowerTrackingCallback_ThermalMeter(struct net_device * dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+        u8 	ThermalValue=0;
+	u32	FwCmdVal=0;
+
+	priv->btxpower_trackingInit = true;
+
+	
+	ThermalValue = (u8)rtl8192_phy_QueryRFReg(dev, RF90_PATH_A, RF_T_METER, 0x1f);	
+	RT_TRACE(COMP_POWER_TRACKING, "Readback Thermal Meter = 0x%x\n", ThermalValue);
+	printk("%s()Readback Thermal Meter = 0x%x\n", __func__,ThermalValue);
+	if(ThermalValue)
+	{
+		priv->ThermalValue = ThermalValue;
+		if(priv->pFirmware->FirmwareVersion >= 0x35)
+		{
+			priv->rtllib->SetFwCmdHandler(dev, FW_CMD_TXPWR_TRACK_THERMAL);	
+		}
+		else
+		{
+		FwCmdVal = (FW_TXPWR_TRACK_THERMAL|
+		(priv->ThermalMeter[0]<<8)|(ThermalValue<<16));
+		RT_TRACE(COMP_POWER_TRACKING, "Write to FW Thermal Val = 0x%x\n", FwCmdVal);
+		write_nic_dword(dev, WFM5, FwCmdVal); 
+				ChkFwCmdIoDone(dev);
+		}
+	}
+
+	priv->txpower_count = 0;
+}
+#endif
+
+void	dm_txpower_trackingcallback(void *data)
+{
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
+	struct r8192_priv *priv = container_of_dwork_rsl(data,struct r8192_priv,txpower_tracking_wq);
+	struct net_device *dev = priv->rtllib->dev;
+#else	   
+	struct net_device *dev = (struct net_device *)data;
+	struct r8192_priv *priv = rtllib_priv(dev);
+#endif
+	
+#ifdef RTL8190P
+	dm_TXPowerTrackingCallback_TSSI(dev);
+#elif defined(RTL8192E)
+	if(priv->IC_Cut >= IC_VersionCut_D)
+		dm_TXPowerTrackingCallback_TSSI(dev);
+	else
+		dm_TXPowerTrackingCallback_ThermalMeter(dev);
+#elif defined(RTL8192SE)
+	dm_TXPowerTrackingCallback_ThermalMeter(dev);
+#endif
+}
+
+#ifndef RTL8192SE
+static void dm_InitializeTXPowerTracking_TSSI(struct net_device *dev)
+{
+
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	priv->txbbgain_table[0].txbb_iq_amplifygain = 	 		12;
+	priv->txbbgain_table[0].txbbgain_value=0x7f8001fe;
+	priv->txbbgain_table[1].txbb_iq_amplifygain = 	 		11;
+	priv->txbbgain_table[1].txbbgain_value=0x788001e2;
+	priv->txbbgain_table[2].txbb_iq_amplifygain = 	 		10;
+	priv->txbbgain_table[2].txbbgain_value=0x71c001c7;
+	priv->txbbgain_table[3].txbb_iq_amplifygain = 	 		9;
+	priv->txbbgain_table[3].txbbgain_value=0x6b8001ae;
+	priv->txbbgain_table[4].txbb_iq_amplifygain = 		       8;
+	priv->txbbgain_table[4].txbbgain_value=0x65400195;
+	priv->txbbgain_table[5].txbb_iq_amplifygain = 		       7;
+	priv->txbbgain_table[5].txbbgain_value=0x5fc0017f;
+	priv->txbbgain_table[6].txbb_iq_amplifygain = 		       6;
+	priv->txbbgain_table[6].txbbgain_value=0x5a400169;
+	priv->txbbgain_table[7].txbb_iq_amplifygain = 		       5;
+	priv->txbbgain_table[7].txbbgain_value=0x55400155;
+	priv->txbbgain_table[8].txbb_iq_amplifygain = 		       4;
+	priv->txbbgain_table[8].txbbgain_value=0x50800142;
+	priv->txbbgain_table[9].txbb_iq_amplifygain = 		       3;
+	priv->txbbgain_table[9].txbbgain_value=0x4c000130;
+	priv->txbbgain_table[10].txbb_iq_amplifygain = 		       2;
+	priv->txbbgain_table[10].txbbgain_value=0x47c0011f;
+	priv->txbbgain_table[11].txbb_iq_amplifygain = 		       1;
+	priv->txbbgain_table[11].txbbgain_value=0x43c0010f;
+	priv->txbbgain_table[12].txbb_iq_amplifygain = 		       0;
+	priv->txbbgain_table[12].txbbgain_value=0x40000100;
+	priv->txbbgain_table[13].txbb_iq_amplifygain = 		       -1;
+	priv->txbbgain_table[13].txbbgain_value=0x3c8000f2;
+	priv->txbbgain_table[14].txbb_iq_amplifygain = 		     -2;
+	priv->txbbgain_table[14].txbbgain_value=0x390000e4;
+	priv->txbbgain_table[15].txbb_iq_amplifygain = 		     -3;
+	priv->txbbgain_table[15].txbbgain_value=0x35c000d7;
+	priv->txbbgain_table[16].txbb_iq_amplifygain = 		     -4;
+	priv->txbbgain_table[16].txbbgain_value=0x32c000cb;
+	priv->txbbgain_table[17].txbb_iq_amplifygain = 		     -5;
+	priv->txbbgain_table[17].txbbgain_value=0x300000c0;
+	priv->txbbgain_table[18].txbb_iq_amplifygain = 		 	    -6;
+	priv->txbbgain_table[18].txbbgain_value=0x2d4000b5;
+	priv->txbbgain_table[19].txbb_iq_amplifygain = 		     -7;
+	priv->txbbgain_table[19].txbbgain_value=0x2ac000ab;
+	priv->txbbgain_table[20].txbb_iq_amplifygain = 		     -8;
+	priv->txbbgain_table[20].txbbgain_value=0x288000a2;
+	priv->txbbgain_table[21].txbb_iq_amplifygain = 		     -9;
+	priv->txbbgain_table[21].txbbgain_value=0x26000098;
+	priv->txbbgain_table[22].txbb_iq_amplifygain = 		     -10;
+	priv->txbbgain_table[22].txbbgain_value=0x24000090;
+	priv->txbbgain_table[23].txbb_iq_amplifygain = 		     -11;
+	priv->txbbgain_table[23].txbbgain_value=0x22000088;
+	priv->txbbgain_table[24].txbb_iq_amplifygain = 		     -12;
+	priv->txbbgain_table[24].txbbgain_value=0x20000080;
+	priv->txbbgain_table[25].txbb_iq_amplifygain = 		     -13;
+	priv->txbbgain_table[25].txbbgain_value=0x1a00006c;
+	priv->txbbgain_table[26].txbb_iq_amplifygain = 		     -14;
+	priv->txbbgain_table[26].txbbgain_value=0x1c800072;
+	priv->txbbgain_table[27].txbb_iq_amplifygain = 		     -15;
+	priv->txbbgain_table[27].txbbgain_value=0x18000060;
+	priv->txbbgain_table[28].txbb_iq_amplifygain = 		     -16;
+	priv->txbbgain_table[28].txbbgain_value=0x19800066;
+	priv->txbbgain_table[29].txbb_iq_amplifygain = 		     -17;
+	priv->txbbgain_table[29].txbbgain_value=0x15800056;
+	priv->txbbgain_table[30].txbb_iq_amplifygain = 		     -18;
+	priv->txbbgain_table[30].txbbgain_value=0x26c0005b;
+	priv->txbbgain_table[31].txbb_iq_amplifygain = 		     -19;
+	priv->txbbgain_table[31].txbbgain_value=0x14400051;
+	priv->txbbgain_table[32].txbb_iq_amplifygain = 		     -20;
+	priv->txbbgain_table[32].txbbgain_value=0x24400051;
+	priv->txbbgain_table[33].txbb_iq_amplifygain = 		     -21;
+	priv->txbbgain_table[33].txbbgain_value=0x1300004c;
+	priv->txbbgain_table[34].txbb_iq_amplifygain = 		     -22;
+	priv->txbbgain_table[34].txbbgain_value=0x12000048;
+	priv->txbbgain_table[35].txbb_iq_amplifygain = 		     -23;
+	priv->txbbgain_table[35].txbbgain_value=0x11000044;
+	priv->txbbgain_table[36].txbb_iq_amplifygain = 		     -24;
+	priv->txbbgain_table[36].txbbgain_value=0x10000040;
+
+	priv->cck_txbbgain_table[0].ccktxbb_valuearray[0] = 0x36;
+	priv->cck_txbbgain_table[0].ccktxbb_valuearray[1] = 0x35;
+	priv->cck_txbbgain_table[0].ccktxbb_valuearray[2] = 0x2e;
+	priv->cck_txbbgain_table[0].ccktxbb_valuearray[3] = 0x25;
+	priv->cck_txbbgain_table[0].ccktxbb_valuearray[4] = 0x1c;
+	priv->cck_txbbgain_table[0].ccktxbb_valuearray[5] = 0x12;
+	priv->cck_txbbgain_table[0].ccktxbb_valuearray[6] = 0x09;
+	priv->cck_txbbgain_table[0].ccktxbb_valuearray[7] = 0x04;
+
+	priv->cck_txbbgain_table[1].ccktxbb_valuearray[0] = 0x33;
+	priv->cck_txbbgain_table[1].ccktxbb_valuearray[1] = 0x32;
+	priv->cck_txbbgain_table[1].ccktxbb_valuearray[2] = 0x2b;
+	priv->cck_txbbgain_table[1].ccktxbb_valuearray[3] = 0x23;
+	priv->cck_txbbgain_table[1].ccktxbb_valuearray[4] = 0x1a;
+	priv->cck_txbbgain_table[1].ccktxbb_valuearray[5] = 0x11;
+	priv->cck_txbbgain_table[1].ccktxbb_valuearray[6] = 0x08;
+	priv->cck_txbbgain_table[1].ccktxbb_valuearray[7] = 0x04;
+	
+	priv->cck_txbbgain_table[2].ccktxbb_valuearray[0] = 0x30;
+	priv->cck_txbbgain_table[2].ccktxbb_valuearray[1] = 0x2f;
+	priv->cck_txbbgain_table[2].ccktxbb_valuearray[2] = 0x29;
+	priv->cck_txbbgain_table[2].ccktxbb_valuearray[3] = 0x21;
+	priv->cck_txbbgain_table[2].ccktxbb_valuearray[4] = 0x19;
+	priv->cck_txbbgain_table[2].ccktxbb_valuearray[5] = 0x10;
+	priv->cck_txbbgain_table[2].ccktxbb_valuearray[6] = 0x08;
+	priv->cck_txbbgain_table[2].ccktxbb_valuearray[7] = 0x03;
+
+	priv->cck_txbbgain_table[3].ccktxbb_valuearray[0] = 0x2d;
+	priv->cck_txbbgain_table[3].ccktxbb_valuearray[1] = 0x2d;
+	priv->cck_txbbgain_table[3].ccktxbb_valuearray[2] = 0x27;
+	priv->cck_txbbgain_table[3].ccktxbb_valuearray[3] = 0x1f;
+	priv->cck_txbbgain_table[3].ccktxbb_valuearray[4] = 0x18;
+	priv->cck_txbbgain_table[3].ccktxbb_valuearray[5] = 0x0f;
+	priv->cck_txbbgain_table[3].ccktxbb_valuearray[6] = 0x08;
+	priv->cck_txbbgain_table[3].ccktxbb_valuearray[7] = 0x03;
+	
+	priv->cck_txbbgain_table[4].ccktxbb_valuearray[0] = 0x2b;
+	priv->cck_txbbgain_table[4].ccktxbb_valuearray[1] = 0x2a;
+	priv->cck_txbbgain_table[4].ccktxbb_valuearray[2] = 0x25;
+	priv->cck_txbbgain_table[4].ccktxbb_valuearray[3] = 0x1e;
+	priv->cck_txbbgain_table[4].ccktxbb_valuearray[4] = 0x16;
+	priv->cck_txbbgain_table[4].ccktxbb_valuearray[5] = 0x0e;
+	priv->cck_txbbgain_table[4].ccktxbb_valuearray[6] = 0x07;
+	priv->cck_txbbgain_table[4].ccktxbb_valuearray[7] = 0x03;
+
+	priv->cck_txbbgain_table[5].ccktxbb_valuearray[0] = 0x28;
+	priv->cck_txbbgain_table[5].ccktxbb_valuearray[1] = 0x28;
+	priv->cck_txbbgain_table[5].ccktxbb_valuearray[2] = 0x22;
+	priv->cck_txbbgain_table[5].ccktxbb_valuearray[3] = 0x1c;
+	priv->cck_txbbgain_table[5].ccktxbb_valuearray[4] = 0x15;
+	priv->cck_txbbgain_table[5].ccktxbb_valuearray[5] = 0x0d;
+	priv->cck_txbbgain_table[5].ccktxbb_valuearray[6] = 0x07;
+	priv->cck_txbbgain_table[5].ccktxbb_valuearray[7] = 0x03;
+	
+	priv->cck_txbbgain_table[6].ccktxbb_valuearray[0] = 0x26;
+	priv->cck_txbbgain_table[6].ccktxbb_valuearray[1] = 0x25;
+	priv->cck_txbbgain_table[6].ccktxbb_valuearray[2] = 0x21;
+	priv->cck_txbbgain_table[6].ccktxbb_valuearray[3] = 0x1b;
+	priv->cck_txbbgain_table[6].ccktxbb_valuearray[4] = 0x14;
+	priv->cck_txbbgain_table[6].ccktxbb_valuearray[5] = 0x0d;
+	priv->cck_txbbgain_table[6].ccktxbb_valuearray[6] = 0x06;
+	priv->cck_txbbgain_table[6].ccktxbb_valuearray[7] = 0x03;
+
+	priv->cck_txbbgain_table[7].ccktxbb_valuearray[0] = 0x24;
+	priv->cck_txbbgain_table[7].ccktxbb_valuearray[1] = 0x23;
+	priv->cck_txbbgain_table[7].ccktxbb_valuearray[2] = 0x1f;
+	priv->cck_txbbgain_table[7].ccktxbb_valuearray[3] = 0x19;
+	priv->cck_txbbgain_table[7].ccktxbb_valuearray[4] = 0x13;
+	priv->cck_txbbgain_table[7].ccktxbb_valuearray[5] = 0x0c;
+	priv->cck_txbbgain_table[7].ccktxbb_valuearray[6] = 0x06;
+	priv->cck_txbbgain_table[7].ccktxbb_valuearray[7] = 0x03;
+	
+	priv->cck_txbbgain_table[8].ccktxbb_valuearray[0] = 0x22;
+	priv->cck_txbbgain_table[8].ccktxbb_valuearray[1] = 0x21;
+	priv->cck_txbbgain_table[8].ccktxbb_valuearray[2] = 0x1d;
+	priv->cck_txbbgain_table[8].ccktxbb_valuearray[3] = 0x18;
+	priv->cck_txbbgain_table[8].ccktxbb_valuearray[4] = 0x11;
+	priv->cck_txbbgain_table[8].ccktxbb_valuearray[5] = 0x0b;
+	priv->cck_txbbgain_table[8].ccktxbb_valuearray[6] = 0x06;
+	priv->cck_txbbgain_table[8].ccktxbb_valuearray[7] = 0x02;
+
+	priv->cck_txbbgain_table[9].ccktxbb_valuearray[0] = 0x20;
+	priv->cck_txbbgain_table[9].ccktxbb_valuearray[1] = 0x20;
+	priv->cck_txbbgain_table[9].ccktxbb_valuearray[2] = 0x1b;
+	priv->cck_txbbgain_table[9].ccktxbb_valuearray[3] = 0x16;
+	priv->cck_txbbgain_table[9].ccktxbb_valuearray[4] = 0x11;
+	priv->cck_txbbgain_table[9].ccktxbb_valuearray[5] = 0x08;
+	priv->cck_txbbgain_table[9].ccktxbb_valuearray[6] = 0x05;
+	priv->cck_txbbgain_table[9].ccktxbb_valuearray[7] = 0x02;
+	
+	priv->cck_txbbgain_table[10].ccktxbb_valuearray[0] = 0x1f;
+	priv->cck_txbbgain_table[10].ccktxbb_valuearray[1] = 0x1e;
+	priv->cck_txbbgain_table[10].ccktxbb_valuearray[2] = 0x1a;
+	priv->cck_txbbgain_table[10].ccktxbb_valuearray[3] = 0x15;
+	priv->cck_txbbgain_table[10].ccktxbb_valuearray[4] = 0x10;
+	priv->cck_txbbgain_table[10].ccktxbb_valuearray[5] = 0x0a;
+	priv->cck_txbbgain_table[10].ccktxbb_valuearray[6] = 0x05;
+	priv->cck_txbbgain_table[10].ccktxbb_valuearray[7] = 0x02;
+
+	priv->cck_txbbgain_table[11].ccktxbb_valuearray[0] = 0x1d;
+	priv->cck_txbbgain_table[11].ccktxbb_valuearray[1] = 0x1c;
+	priv->cck_txbbgain_table[11].ccktxbb_valuearray[2] = 0x18;
+	priv->cck_txbbgain_table[11].ccktxbb_valuearray[3] = 0x14;
+	priv->cck_txbbgain_table[11].ccktxbb_valuearray[4] = 0x0f;
+	priv->cck_txbbgain_table[11].ccktxbb_valuearray[5] = 0x0a;
+	priv->cck_txbbgain_table[11].ccktxbb_valuearray[6] = 0x05;
+	priv->cck_txbbgain_table[11].ccktxbb_valuearray[7] = 0x02;
+
+	priv->cck_txbbgain_table[12].ccktxbb_valuearray[0] = 0x1b;
+	priv->cck_txbbgain_table[12].ccktxbb_valuearray[1] = 0x1a;
+	priv->cck_txbbgain_table[12].ccktxbb_valuearray[2] = 0x17;
+	priv->cck_txbbgain_table[12].ccktxbb_valuearray[3] = 0x13;
+	priv->cck_txbbgain_table[12].ccktxbb_valuearray[4] = 0x0e;
+	priv->cck_txbbgain_table[12].ccktxbb_valuearray[5] = 0x09;
+	priv->cck_txbbgain_table[12].ccktxbb_valuearray[6] = 0x04;
+	priv->cck_txbbgain_table[12].ccktxbb_valuearray[7] = 0x02;
+
+	priv->cck_txbbgain_table[13].ccktxbb_valuearray[0] = 0x1a;
+	priv->cck_txbbgain_table[13].ccktxbb_valuearray[1] = 0x19;
+	priv->cck_txbbgain_table[13].ccktxbb_valuearray[2] = 0x16;
+	priv->cck_txbbgain_table[13].ccktxbb_valuearray[3] = 0x12;
+	priv->cck_txbbgain_table[13].ccktxbb_valuearray[4] = 0x0d;
+	priv->cck_txbbgain_table[13].ccktxbb_valuearray[5] = 0x09;
+	priv->cck_txbbgain_table[13].ccktxbb_valuearray[6] = 0x04;
+	priv->cck_txbbgain_table[13].ccktxbb_valuearray[7] = 0x02;
+
+	priv->cck_txbbgain_table[14].ccktxbb_valuearray[0] = 0x18;
+	priv->cck_txbbgain_table[14].ccktxbb_valuearray[1] = 0x17;
+	priv->cck_txbbgain_table[14].ccktxbb_valuearray[2] = 0x15;
+	priv->cck_txbbgain_table[14].ccktxbb_valuearray[3] = 0x11;
+	priv->cck_txbbgain_table[14].ccktxbb_valuearray[4] = 0x0c;
+	priv->cck_txbbgain_table[14].ccktxbb_valuearray[5] = 0x08;
+	priv->cck_txbbgain_table[14].ccktxbb_valuearray[6] = 0x04;
+	priv->cck_txbbgain_table[14].ccktxbb_valuearray[7] = 0x02;
+
+	priv->cck_txbbgain_table[15].ccktxbb_valuearray[0] = 0x17;
+	priv->cck_txbbgain_table[15].ccktxbb_valuearray[1] = 0x16;
+	priv->cck_txbbgain_table[15].ccktxbb_valuearray[2] = 0x13;
+	priv->cck_txbbgain_table[15].ccktxbb_valuearray[3] = 0x10;
+	priv->cck_txbbgain_table[15].ccktxbb_valuearray[4] = 0x0c;
+	priv->cck_txbbgain_table[15].ccktxbb_valuearray[5] = 0x08;
+	priv->cck_txbbgain_table[15].ccktxbb_valuearray[6] = 0x04;
+	priv->cck_txbbgain_table[15].ccktxbb_valuearray[7] = 0x02;
+
+	priv->cck_txbbgain_table[16].ccktxbb_valuearray[0] = 0x16;
+	priv->cck_txbbgain_table[16].ccktxbb_valuearray[1] = 0x15;
+	priv->cck_txbbgain_table[16].ccktxbb_valuearray[2] = 0x12;
+	priv->cck_txbbgain_table[16].ccktxbb_valuearray[3] = 0x0f;
+	priv->cck_txbbgain_table[16].ccktxbb_valuearray[4] = 0x0b;
+	priv->cck_txbbgain_table[16].ccktxbb_valuearray[5] = 0x07;
+	priv->cck_txbbgain_table[16].ccktxbb_valuearray[6] = 0x04;
+	priv->cck_txbbgain_table[16].ccktxbb_valuearray[7] = 0x01;
+
+	priv->cck_txbbgain_table[17].ccktxbb_valuearray[0] = 0x14;
+	priv->cck_txbbgain_table[17].ccktxbb_valuearray[1] = 0x14;
+	priv->cck_txbbgain_table[17].ccktxbb_valuearray[2] = 0x11;
+	priv->cck_txbbgain_table[17].ccktxbb_valuearray[3] = 0x0e;
+	priv->cck_txbbgain_table[17].ccktxbb_valuearray[4] = 0x0b;
+	priv->cck_txbbgain_table[17].ccktxbb_valuearray[5] = 0x07;
+	priv->cck_txbbgain_table[17].ccktxbb_valuearray[6] = 0x03;
+	priv->cck_txbbgain_table[17].ccktxbb_valuearray[7] = 0x02;
+
+	priv->cck_txbbgain_table[18].ccktxbb_valuearray[0] = 0x13;
+	priv->cck_txbbgain_table[18].ccktxbb_valuearray[1] = 0x13;
+	priv->cck_txbbgain_table[18].ccktxbb_valuearray[2] = 0x10;
+	priv->cck_txbbgain_table[18].ccktxbb_valuearray[3] = 0x0d;
+	priv->cck_txbbgain_table[18].ccktxbb_valuearray[4] = 0x0a;
+	priv->cck_txbbgain_table[18].ccktxbb_valuearray[5] = 0x06;
+	priv->cck_txbbgain_table[18].ccktxbb_valuearray[6] = 0x03;
+	priv->cck_txbbgain_table[18].ccktxbb_valuearray[7] = 0x01;
+
+	priv->cck_txbbgain_table[19].ccktxbb_valuearray[0] = 0x12;
+	priv->cck_txbbgain_table[19].ccktxbb_valuearray[1] = 0x12;
+	priv->cck_txbbgain_table[19].ccktxbb_valuearray[2] = 0x0f;
+	priv->cck_txbbgain_table[19].ccktxbb_valuearray[3] = 0x0c;
+	priv->cck_txbbgain_table[19].ccktxbb_valuearray[4] = 0x09;
+	priv->cck_txbbgain_table[19].ccktxbb_valuearray[5] = 0x06;
+	priv->cck_txbbgain_table[19].ccktxbb_valuearray[6] = 0x03;
+	priv->cck_txbbgain_table[19].ccktxbb_valuearray[7] = 0x01;
+
+	priv->cck_txbbgain_table[20].ccktxbb_valuearray[0] = 0x11;
+	priv->cck_txbbgain_table[20].ccktxbb_valuearray[1] = 0x11;
+	priv->cck_txbbgain_table[20].ccktxbb_valuearray[2] = 0x0f;
+	priv->cck_txbbgain_table[20].ccktxbb_valuearray[3] = 0x0c;
+	priv->cck_txbbgain_table[20].ccktxbb_valuearray[4] = 0x09;
+	priv->cck_txbbgain_table[20].ccktxbb_valuearray[5] = 0x06;
+	priv->cck_txbbgain_table[20].ccktxbb_valuearray[6] = 0x03;
+	priv->cck_txbbgain_table[20].ccktxbb_valuearray[7] = 0x01;
+
+	priv->cck_txbbgain_table[21].ccktxbb_valuearray[0] = 0x10;
+	priv->cck_txbbgain_table[21].ccktxbb_valuearray[1] = 0x10;
+	priv->cck_txbbgain_table[21].ccktxbb_valuearray[2] = 0x0e;
+	priv->cck_txbbgain_table[21].ccktxbb_valuearray[3] = 0x0b;
+	priv->cck_txbbgain_table[21].ccktxbb_valuearray[4] = 0x08;
+	priv->cck_txbbgain_table[21].ccktxbb_valuearray[5] = 0x05;
+	priv->cck_txbbgain_table[21].ccktxbb_valuearray[6] = 0x03;
+	priv->cck_txbbgain_table[21].ccktxbb_valuearray[7] = 0x01;
+
+	priv->cck_txbbgain_table[22].ccktxbb_valuearray[0] = 0x0f;
+	priv->cck_txbbgain_table[22].ccktxbb_valuearray[1] = 0x0f;
+	priv->cck_txbbgain_table[22].ccktxbb_valuearray[2] = 0x0d;
+	priv->cck_txbbgain_table[22].ccktxbb_valuearray[3] = 0x0b;
+	priv->cck_txbbgain_table[22].ccktxbb_valuearray[4] = 0x08;
+	priv->cck_txbbgain_table[22].ccktxbb_valuearray[5] = 0x05;
+	priv->cck_txbbgain_table[22].ccktxbb_valuearray[6] = 0x03;
+	priv->cck_txbbgain_table[22].ccktxbb_valuearray[7] = 0x01;
+	
+	priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[0] = 0x36;
+	priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[1] = 0x35;
+	priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[2] = 0x2e;
+	priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[3] = 0x1b;
+	priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[4] = 0x00;
+	priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[5] = 0x00;
+	priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[6] = 0x00;
+	priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[7] = 0x00;
+
+	priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[0] = 0x33;
+	priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[1] = 0x32;
+	priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[2] = 0x2b;
+	priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[3] = 0x19;
+	priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[4] = 0x00;
+	priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[5] = 0x00;
+	priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[6] = 0x00;
+	priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[7] = 0x00;
+
+	priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[0] = 0x30;
+	priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[1] = 0x2f;
+	priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[2] = 0x29;
+	priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[3] = 0x18;
+	priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[4] = 0x00;
+	priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[5] = 0x00;
+	priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[6] = 0x00;
+	priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[7] = 0x00;
+
+	priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[0] = 0x2d;
+	priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[1] = 0x2d;
+	priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[2] = 0x27;
+	priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[3] = 0x17;
+	priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[4] = 0x00;
+	priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[5] = 0x00;
+	priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[6] = 0x00;
+	priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[7] = 0x00;
+	
+	priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[0] = 0x2b;
+	priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[1] = 0x2a;
+	priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[2] = 0x25;
+	priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[3] = 0x15;
+	priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[4] = 0x00;
+	priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[5] = 0x00;
+	priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[6] = 0x00;
+	priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[7] = 0x00;
+
+	priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[0] = 0x28;
+	priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[1] = 0x28;
+	priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[2] = 0x22;
+	priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[3] = 0x14;
+	priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[4] = 0x00;
+	priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[5] = 0x00;
+	priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[6] = 0x00;
+	priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[7] = 0x00;
+	
+	priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[0] = 0x26;
+	priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[1] = 0x25;
+	priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[2] = 0x21;
+	priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[3] = 0x13;
+	priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[4] = 0x00;
+	priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[5] = 0x00;
+	priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[6] = 0x00;
+	priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[7] = 0x00;
+
+	priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[0] = 0x24;
+	priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[1] = 0x23;
+	priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[2] = 0x1f;
+	priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[3] = 0x12;
+	priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[4] = 0x00;
+	priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[5] = 0x00;
+	priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[6] = 0x00;
+	priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[7] = 0x00;
+	
+	priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[0] = 0x22;
+	priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[1] = 0x21;
+	priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[2] = 0x1d;
+	priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[3] = 0x11;
+	priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[4] = 0x00;
+	priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[5] = 0x00;
+	priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[6] = 0x00;
+	priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[7] = 0x00;
+
+	priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[0] = 0x20;
+	priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[1] = 0x20;
+	priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[2] = 0x1b;
+	priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[3] = 0x10;
+	priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[4] = 0x00;
+	priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[5] = 0x00;
+	priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[6] = 0x00;
+	priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[7] = 0x00;
+	
+	priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[0] = 0x1f;
+	priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[1] = 0x1e;
+	priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[2] = 0x1a;
+	priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[3] = 0x0f;
+	priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[4] = 0x00;
+	priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[5] = 0x00;
+	priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[6] = 0x00;
+	priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[7] = 0x00;
+
+	priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[0] = 0x1d;
+	priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[1] = 0x1c;
+	priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[2] = 0x18;
+	priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[3] = 0x0e;
+	priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[4] = 0x00;
+	priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[5] = 0x00;
+	priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[6] = 0x00;
+	priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[7] = 0x00;
+	
+	priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[0] = 0x1b;
+	priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[1] = 0x1a;
+	priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[2] = 0x17;
+	priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[3] = 0x0e;
+	priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[4] = 0x00;
+	priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[5] = 0x00;
+	priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[6] = 0x00;
+	priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[7] = 0x00;
+
+	priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[0] = 0x1a;
+	priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[1] = 0x19;
+	priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[2] = 0x16;
+	priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[3] = 0x0d;
+	priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[4] = 0x00;
+	priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[5] = 0x00;
+	priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[6] = 0x00;
+	priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[7] = 0x00;
+	
+	priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[0] = 0x18;
+	priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[1] = 0x17;
+	priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[2] = 0x15;
+	priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[3] = 0x0c;
+	priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[4] = 0x00;
+	priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[5] = 0x00;
+	priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[6] = 0x00;
+	priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[7] = 0x00;
+
+	priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[0] = 0x17;
+	priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[1] = 0x16;
+	priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[2] = 0x13;
+	priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[3] = 0x0b;
+	priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[4] = 0x00;
+	priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[5] = 0x00;
+	priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[6] = 0x00;
+	priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[7] = 0x00;
+	
+	priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[0] = 0x16;
+	priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[1] = 0x15;
+	priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[2] = 0x12;
+	priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[3] = 0x0b;
+	priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[4] = 0x00;
+	priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[5] = 0x00;
+	priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[6] = 0x00;
+	priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[7] = 0x00;
+
+	priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[0] = 0x14;
+	priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[1] = 0x14;
+	priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[2] = 0x11;
+	priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[3] = 0x0a;
+	priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[4] = 0x00;
+	priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[5] = 0x00;
+	priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[6] = 0x00;
+	priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[7] = 0x00;
+	
+	priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[0] = 0x13;
+	priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[1] = 0x13;
+	priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[2] = 0x10;
+	priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[3] = 0x0a;
+	priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[4] = 0x00;
+	priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[5] = 0x00;
+	priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[6] = 0x00;
+	priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[7] = 0x00;
+
+	priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[0] = 0x12;
+	priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[1] = 0x12;
+	priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[2] = 0x0f;
+	priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[3] = 0x09;
+	priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[4] = 0x00;
+	priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[5] = 0x00;
+	priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[6] = 0x00;
+	priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[7] = 0x00;
+	
+	priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[0] = 0x11;
+	priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[1] = 0x11;
+	priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[2] = 0x0f;
+	priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[3] = 0x09;
+	priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[4] = 0x00;
+	priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[5] = 0x00;
+	priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[6] = 0x00;
+	priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[7] = 0x00;
+
+	priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[0] = 0x10;
+	priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[1] = 0x10;
+	priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[2] = 0x0e;
+	priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[3] = 0x08;
+	priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[4] = 0x00;
+	priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[5] = 0x00;
+	priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[6] = 0x00;
+	priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[7] = 0x00;
+	
+	priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[0] = 0x0f;
+	priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[1] = 0x0f;
+	priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[2] = 0x0d;
+	priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[3] = 0x08;
+	priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[4] = 0x00;
+	priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[5] = 0x00;
+	priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[6] = 0x00;
+	priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[7] = 0x00;
+
+	priv->btxpower_tracking = true;
+	priv->txpower_count       = 0;
+	priv->btxpower_trackingInit = false;
+
+}
+#endif
+#ifndef RTL8190P
+static void dm_InitializeTXPowerTracking_ThermalMeter(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+
+#ifdef RTL8192SE
+		priv->btxpower_tracking = false;
+		priv->txpower_count       = 0;
+		priv->btxpower_trackingInit = false;
+#else
+
+	if(priv->rtllib->FwRWRF)
+		priv->btxpower_tracking = true;
+	else
+		priv->btxpower_tracking = false;
+	priv->txpower_count       = 0;
+	priv->btxpower_trackingInit = false;
+#endif
+	RT_TRACE(COMP_POWER_TRACKING, "pMgntInfo->bTXPowerTracking = %d\n", priv->btxpower_tracking);
+}
+#endif
+
+void dm_initialize_txpower_tracking(struct net_device *dev)
+{
+#ifdef RTL8192E
+	struct r8192_priv *priv = rtllib_priv(dev);
+#endif
+#ifdef RTL8190P
+	dm_InitializeTXPowerTracking_TSSI(dev);
+#elif defined RTL8192E
+	if(priv->IC_Cut >= IC_VersionCut_D)
+		dm_InitializeTXPowerTracking_TSSI(dev);
+	else
+		dm_InitializeTXPowerTracking_ThermalMeter(dev);
+#elif defined RTL8192SE
+	dm_InitializeTXPowerTracking_ThermalMeter(dev);
+#endif
+}	
+
+#if (defined RTL8192E || defined RTL8190P)
+static void dm_CheckTXPowerTracking_TSSI(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	static u32 tx_power_track_counter = 0;
+	RT_TRACE(COMP_POWER_TRACKING,"%s()\n",__FUNCTION__);
+	if(read_nic_byte(dev, 0x11e) ==1)
+		return;
+	if(!priv->btxpower_tracking)
+		return;
+	tx_power_track_counter++;
+	
+	
+	 if(tx_power_track_counter >= 180)	
+	 	{
+		queue_delayed_work_rsl(priv->priv_wq,&priv->txpower_tracking_wq,0);
+		tx_power_track_counter =0;
+	 	}
+	
+}	
+#endif
+#ifndef RTL8190P
+static void dm_CheckTXPowerTracking_ThermalMeter(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	static u8 	TM_Trigger=0;
+	u8		TxPowerCheckCnt = 0;
+
+	if(IS_HARDWARE_TYPE_8192SE(dev))
+		TxPowerCheckCnt = 5;	
+	else
+		TxPowerCheckCnt = 2;	
+        if(!priv->btxpower_tracking){
+            return;
+        } else {
+            if(priv->txpower_count  <= TxPowerCheckCnt) {
+			priv->txpower_count++;
+			return;
+		}
+	}	
+
+	if(!TM_Trigger)
+	{
+#ifdef RTL8192SE
+		if(IS_HARDWARE_TYPE_8192SE(dev))
+		{
+                    rtl8192_phy_SetRFReg(dev, RF90_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60);
+                    RT_TRACE(COMP_POWER_TRACKING, "Trigger 92S Thermal Meter!!\n");
+                }
+                else
+#endif
+                {
+		rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4d);
+		rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4f);
+		rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4d);
+		rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4f);
+                }
+		TM_Trigger = 1;
+		return;
+	} else {
+            printk("===============>Schedule TxPowerTrackingWorkItem\n");
+#ifdef RTL8192SE
+		DM_TXPowerTracking92SDirectCall(dev); 
+#else
+
+		queue_delayed_work_rsl(priv->priv_wq,&priv->txpower_tracking_wq,0);
+#endif
+		TM_Trigger = 0;
+		}
+
+	}	
+#endif
+
+#ifdef RTL8192SE
+void DM_TXPowerTracking92SDirectCall(struct net_device *dev)
+{	
+	dm_TXPowerTrackingCallback_ThermalMeter(dev);
+	}	
+#endif
+
+static void dm_check_txpower_tracking(struct net_device *dev)
+{
+#ifdef RTL8192E
+	struct r8192_priv *priv = rtllib_priv(dev);
+#endif	
+#ifdef  RTL8190P
+	dm_CheckTXPowerTracking_TSSI(dev);
+#elif defined RTL8192E
+	if(priv->IC_Cut >= IC_VersionCut_D)
+		dm_CheckTXPowerTracking_TSSI(dev);
+	else
+		dm_CheckTXPowerTracking_ThermalMeter(dev);
+#elif defined RTL8192SE
+	dm_CheckTXPowerTracking_ThermalMeter(dev);
+#endif
+	
+}	
+
+#ifndef RTL8192SE
+static void dm_CCKTxPowerAdjust_TSSI(struct net_device *dev, bool  bInCH14)
+{
+	u32 TempVal;
+	struct r8192_priv *priv = rtllib_priv(dev);
+	TempVal = 0;
+	if(!bInCH14){
+		TempVal = 	(u32)(priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[0] +
+					(priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[1]<<8)) ;
+	
+		rtl8192_setBBreg(dev, rCCK0_TxFilter1,bMaskHWord, TempVal);
+		TempVal = 0;
+		TempVal = 	(u32)(priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[2] +
+					(priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[3]<<8) +
+					(priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[4]<<16 )+
+					(priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[5]<<24));
+		rtl8192_setBBreg(dev, rCCK0_TxFilter2,bMaskDWord, TempVal);
+		TempVal = 0;
+		TempVal = 	(u32)(priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[6] +
+					(priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[7]<<8)) ;
+		
+		rtl8192_setBBreg(dev, rCCK0_DebugPort,bMaskLWord, TempVal);
+	}
+	else
+	{
+		TempVal = 	(u32)(priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[0] +
+					(priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[1]<<8)) ;
+	
+		rtl8192_setBBreg(dev, rCCK0_TxFilter1,bMaskHWord, TempVal);
+		TempVal = 0;
+		TempVal = 	(u32)(priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[2] +
+					(priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[3]<<8) +
+					(priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[4]<<16 )+
+					(priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[5]<<24));
+		rtl8192_setBBreg(dev, rCCK0_TxFilter2,bMaskDWord, TempVal);
+		TempVal = 0;
+		TempVal = 	(u32)(priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[6] +
+					(priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[7]<<8)) ;
+		
+		rtl8192_setBBreg(dev, rCCK0_DebugPort,bMaskLWord, TempVal);
+	}
+		
+	
+}
+#endif
+#ifdef RTL8192E
+static void dm_CCKTxPowerAdjust_ThermalMeter(struct net_device *dev,	bool  bInCH14)
+{
+	u32 TempVal;
+	struct r8192_priv *priv = rtllib_priv(dev);
+
+	TempVal = 0;
+	if(!bInCH14)
+	{
+		TempVal = 	CCKSwingTable_Ch1_Ch13[priv->CCK_index][0] +
+					(CCKSwingTable_Ch1_Ch13[priv->CCK_index][1]<<8) ;
+		rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
+		RT_TRACE(COMP_POWER_TRACKING, "CCK not chnl 14, reg 0x%x = 0x%x\n", 
+			rCCK0_TxFilter1, TempVal);
+		TempVal = 0;
+		TempVal = 	CCKSwingTable_Ch1_Ch13[priv->CCK_index][2] +
+					(CCKSwingTable_Ch1_Ch13[priv->CCK_index][3]<<8) +
+					(CCKSwingTable_Ch1_Ch13[priv->CCK_index][4]<<16 )+
+					(CCKSwingTable_Ch1_Ch13[priv->CCK_index][5]<<24);
+		rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
+		RT_TRACE(COMP_POWER_TRACKING, "CCK not chnl 14, reg 0x%x = 0x%x\n", 
+			rCCK0_TxFilter2, TempVal);
+		TempVal = 0;
+		TempVal = 	CCKSwingTable_Ch1_Ch13[priv->CCK_index][6] +
+					(CCKSwingTable_Ch1_Ch13[priv->CCK_index][7]<<8) ;
+		
+		rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
+		RT_TRACE(COMP_POWER_TRACKING, "CCK not chnl 14, reg 0x%x = 0x%x\n", 
+			rCCK0_DebugPort, TempVal);
+	}
+	else
+	{
+		TempVal = 	CCKSwingTable_Ch14[priv->CCK_index][0] +
+					(CCKSwingTable_Ch14[priv->CCK_index][1]<<8) ;
+
+		rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
+		RT_TRACE(COMP_POWER_TRACKING, "CCK chnl 14, reg 0x%x = 0x%x\n", 
+			rCCK0_TxFilter1, TempVal);
+		TempVal = 0;
+		TempVal = 	CCKSwingTable_Ch14[priv->CCK_index][2] +
+					(CCKSwingTable_Ch14[priv->CCK_index][3]<<8) +
+					(CCKSwingTable_Ch14[priv->CCK_index][4]<<16 )+
+					(CCKSwingTable_Ch14[priv->CCK_index][5]<<24);
+		rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
+		RT_TRACE(COMP_POWER_TRACKING, "CCK chnl 14, reg 0x%x = 0x%x\n", 
+			rCCK0_TxFilter2, TempVal);
+		TempVal = 0;
+		TempVal = 	CCKSwingTable_Ch14[priv->CCK_index][6] +
+					(CCKSwingTable_Ch14[priv->CCK_index][7]<<8) ;
+
+		rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
+		RT_TRACE(COMP_POWER_TRACKING,"CCK chnl 14, reg 0x%x = 0x%x\n", 
+			rCCK0_DebugPort, TempVal);
+	}
+	}
+#endif
+	
+#ifndef RTL8192SE
+extern void dm_cck_txpower_adjust(
+	struct net_device *dev,
+	bool  binch14
+)
+{	
+#ifndef RTL8190P
+	struct r8192_priv *priv = rtllib_priv(dev);
+#endif
+#ifdef RTL8190P
+	dm_CCKTxPowerAdjust_TSSI(dev, binch14);
+#else
+	if(priv->IC_Cut >= IC_VersionCut_D)
+		dm_CCKTxPowerAdjust_TSSI(dev, binch14);
+	else
+		dm_CCKTxPowerAdjust_ThermalMeter(dev, binch14);
+#endif
+}
+#endif
+
+
+#if defined(RTL8192E)||defined(RTL8190P)
+static void dm_txpower_reset_recovery(
+	struct net_device *dev
+)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+
+	RT_TRACE(COMP_POWER_TRACKING, "Start Reset Recovery ==>\n");
+	rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertrackingindex].txbbgain_value);
+	RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: Fill in 0xc80 is %08x\n",priv->txbbgain_table[priv->rfa_txpowertrackingindex].txbbgain_value);
+	RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: Fill in RFA_txPowerTrackingIndex is %x\n",priv->rfa_txpowertrackingindex);
+	RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery : RF A I/Q Amplify Gain is %ld\n",priv->txbbgain_table[priv->rfa_txpowertrackingindex].txbb_iq_amplifygain);
+	RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: CCK Attenuation is %d dB\n",priv->CCKPresentAttentuation);
+	dm_cck_txpower_adjust(dev,priv->bcck_in_ch14);		
+
+	rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfc_txpowertrackingindex].txbbgain_value);
+	RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: Fill in 0xc90 is %08x\n",priv->txbbgain_table[priv->rfc_txpowertrackingindex].txbbgain_value);
+	RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: Fill in RFC_txPowerTrackingIndex is %x\n",priv->rfc_txpowertrackingindex);
+	RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery : RF C I/Q Amplify Gain is %ld\n",priv->txbbgain_table[priv->rfc_txpowertrackingindex].txbb_iq_amplifygain);
+
+}	
+
+extern void dm_restore_dynamic_mechanism_state(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u32 	reg_ratr = priv->rate_adaptive.last_ratr;
+
+	if(IS_NIC_DOWN(priv)){
+		RT_TRACE(COMP_RATE, "<---- dm_restore_dynamic_mechanism_state(): driver is going to unload\n");
+		return;
+	}
+
+	if(priv->rate_adaptive.rate_adaptive_disabled)
+		return;
+	if( !(priv->rtllib->mode==WIRELESS_MODE_N_24G ||
+		 priv->rtllib->mode==WIRELESS_MODE_N_5G))
+		 return;
+	{
+			u32 ratr_value;
+			ratr_value = reg_ratr;
+			if(priv->rf_type == RF_1T2R)	
+			{
+				ratr_value &=~ (RATE_ALL_OFDM_2SS);
+			}
+			write_nic_dword(dev, RATR0, ratr_value);
+			write_nic_byte(dev, UFWP, 1);
+#if 0		
+			u1Byte index;
+			u4Byte input_value;
+			index = (u1Byte)((((pu4Byte)(val))[0]) >> 28);
+			input_value = (((pu4Byte)(val))[0]) & 0x0fffffff;
+			PlatformEFIOWrite4Byte(dev, RATR0+index*4, input_value);
+#endif		
+	}
+	if(priv->btxpower_trackingInit && priv->btxpower_tracking){
+		dm_txpower_reset_recovery(dev);	
+	}
+
+	dm_bb_initialgain_restore(dev);
+	
+}	
+
+static void dm_bb_initialgain_restore(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u32 bit_mask = 0x7f; 
+	
+	if(dm_digtable.dig_algorithm == DIG_ALGO_BY_RSSI)
+		return;
+
+	rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8);	
+	rtl8192_setBBreg(dev, rOFDM0_XAAGCCore1, bit_mask, (u32)priv->initgain_backup.xaagccore1);
+	rtl8192_setBBreg(dev, rOFDM0_XBAGCCore1, bit_mask, (u32)priv->initgain_backup.xbagccore1);
+	rtl8192_setBBreg(dev, rOFDM0_XCAGCCore1, bit_mask, (u32)priv->initgain_backup.xcagccore1);
+	rtl8192_setBBreg(dev, rOFDM0_XDAGCCore1, bit_mask, (u32)priv->initgain_backup.xdagccore1);
+	bit_mask  = bMaskByte2;
+	rtl8192_setBBreg(dev, rCCK0_CCA, bit_mask, (u32)priv->initgain_backup.cca);
+
+	RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xc50 is %x\n",priv->initgain_backup.xaagccore1);
+	RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xc58 is %x\n",priv->initgain_backup.xbagccore1);
+	RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xc60 is %x\n",priv->initgain_backup.xcagccore1);
+	RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xc68 is %x\n",priv->initgain_backup.xdagccore1);
+	RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xa0a is %x\n",priv->initgain_backup.cca);
+	rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1);	
+	
+}	
+
+
+extern void dm_backup_dynamic_mechanism_state(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+
+	priv->bswitch_fsync  = false;	
+	priv->bfsync_processing = false;
+	dm_bb_initialgain_backup(dev);
+	
+}	
+
+
+static void dm_bb_initialgain_backup(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u32 bit_mask = bMaskByte0; 
+
+	if(dm_digtable.dig_algorithm == DIG_ALGO_BY_RSSI)
+		return;
+
+	rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8);	
+	priv->initgain_backup.xaagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XAAGCCore1, bit_mask);
+	priv->initgain_backup.xbagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XBAGCCore1, bit_mask);
+	priv->initgain_backup.xcagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XCAGCCore1, bit_mask);
+	priv->initgain_backup.xdagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XDAGCCore1, bit_mask);
+	bit_mask  = bMaskByte2;
+	priv->initgain_backup.cca = (u8)rtl8192_QueryBBReg(dev, rCCK0_CCA, bit_mask);
+
+	RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xc50 is %x\n",priv->initgain_backup.xaagccore1);
+	RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xc58 is %x\n",priv->initgain_backup.xbagccore1);
+	RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xc60 is %x\n",priv->initgain_backup.xcagccore1);
+	RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xc68 is %x\n",priv->initgain_backup.xdagccore1);
+	RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xa0a is %x\n",priv->initgain_backup.cca);
+
+}   
+
+#endif
+extern void dm_change_dynamic_initgain_thresh(struct net_device *dev,
+								u32		dm_type,
+								u32		dm_value)
+{
+#ifdef RTL8192SE
+	struct r8192_priv *priv = rtllib_priv(dev);
+	if(dm_type == DIG_TYPE_THRESH_HIGHPWR_HIGH)
+		priv->MidHighPwrTHR_L2 = (u8)dm_value;
+	else if(dm_type == DIG_TYPE_THRESH_HIGHPWR_LOW)
+		priv->MidHighPwrTHR_L1 = (u8)dm_value;
+	return;
+#endif
+	if (dm_type == DIG_TYPE_THRESH_HIGH)
+	{
+		dm_digtable.rssi_high_thresh = dm_value;		
+	}
+	else if (dm_type == DIG_TYPE_THRESH_LOW)
+	{
+		dm_digtable.rssi_low_thresh = dm_value;
+	}
+	else if (dm_type == DIG_TYPE_THRESH_HIGHPWR_HIGH)
+	{
+		dm_digtable.rssi_high_power_highthresh = dm_value;
+	}
+	else if (dm_type == DIG_TYPE_THRESH_HIGHPWR_HIGH)
+	{
+		dm_digtable.rssi_high_power_highthresh = dm_value;
+	}
+	else if (dm_type == DIG_TYPE_ENABLE)
+	{
+		dm_digtable.dig_state		= DM_STA_DIG_MAX;
+		dm_digtable.dig_enable_flag	= true;
+	}
+	else if (dm_type == DIG_TYPE_DISABLE)
+	{
+		dm_digtable.dig_state		= DM_STA_DIG_MAX;
+		dm_digtable.dig_enable_flag	= false;
+	}
+	else if (dm_type == DIG_TYPE_DBG_MODE)
+	{
+		if(dm_value >= DM_DBG_MAX)
+			dm_value = DM_DBG_OFF;
+		dm_digtable.dbg_mode		= (u8)dm_value;
+	}
+	else if (dm_type == DIG_TYPE_RSSI)
+	{
+		if(dm_value > 100)
+			dm_value = 30;
+		dm_digtable.rssi_val			= (long)dm_value;
+	}
+	else if (dm_type == DIG_TYPE_ALGORITHM)
+	{
+		if (dm_value >= DIG_ALGO_MAX)
+			dm_value = DIG_ALGO_BY_FALSE_ALARM;
+		if(dm_digtable.dig_algorithm != (u8)dm_value)
+			dm_digtable.dig_algorithm_switch = 1;
+		dm_digtable.dig_algorithm	= (u8)dm_value;
+	}
+	else if (dm_type == DIG_TYPE_BACKOFF)
+	{
+		if(dm_value > 30)
+			dm_value = 30;
+		dm_digtable.backoff_val		= (u8)dm_value;
+	}
+	else if(dm_type == DIG_TYPE_RX_GAIN_MIN)
+	{
+		if(dm_value == 0)
+			dm_value = 0x1;
+		dm_digtable.rx_gain_range_min = (u8)dm_value;
+	}
+	else if(dm_type == DIG_TYPE_RX_GAIN_MAX)
+	{
+		if(dm_value > 0x50)
+			dm_value = 0x50;
+		dm_digtable.rx_gain_range_max = (u8)dm_value;
+	}
+}	
+extern	void	
+dm_change_fsync_setting(
+	struct net_device *dev,
+	s32		DM_Type,
+	s32		DM_Value)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	if (DM_Type == 0)	
+	{
+		if(DM_Value > 1)
+			DM_Value = 1;
+		priv->framesyncMonitor = (u8)DM_Value;
+	}
+}
+
+extern void	
+dm_change_rxpath_selection_setting(	
+	struct net_device *dev,
+	s32		DM_Type,
+	s32		DM_Value)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	prate_adaptive 	pRA = (prate_adaptive)&(priv->rate_adaptive);
+
+
+	if(DM_Type == 0)	
+	{
+		if(DM_Value > 1)
+			DM_Value = 1;
+		DM_RxPathSelTable.Enable = (u8)DM_Value;
+	}
+	else if(DM_Type == 1)
+	{
+		if(DM_Value > 1)
+			DM_Value = 1;
+		DM_RxPathSelTable.DbgMode = (u8)DM_Value;
+	}
+	else if(DM_Type == 2)
+	{
+		if(DM_Value > 40)
+			DM_Value = 40;
+		DM_RxPathSelTable.SS_TH_low = (u8)DM_Value;
+	}
+	else if(DM_Type == 3)
+	{
+		if(DM_Value > 25)
+			DM_Value = 25;
+		DM_RxPathSelTable.diff_TH = (u8)DM_Value;
+	}
+	else if(DM_Type == 4)
+	{
+		if(DM_Value >= CCK_Rx_Version_MAX)
+			DM_Value = CCK_Rx_Version_1;
+		DM_RxPathSelTable.cck_method= (u8)DM_Value;
+	}
+	else if(DM_Type == 10)
+	{
+		if(DM_Value > 100)
+			DM_Value = 50;
+		DM_RxPathSelTable.rf_rssi[0] = (u8)DM_Value;
+	}
+	else if(DM_Type == 11)
+	{
+		if(DM_Value > 100)
+			DM_Value = 50;
+		DM_RxPathSelTable.rf_rssi[1] = (u8)DM_Value;
+	}
+	else if(DM_Type == 12)
+	{
+		if(DM_Value > 100)
+			DM_Value = 50;
+		DM_RxPathSelTable.rf_rssi[2] = (u8)DM_Value;
+	}
+	else if(DM_Type == 13)
+	{
+		if(DM_Value > 100)
+			DM_Value = 50;
+		DM_RxPathSelTable.rf_rssi[3] = (u8)DM_Value;
+	}
+	else if(DM_Type == 20)
+	{
+		if(DM_Value > 1)
+			DM_Value = 1;
+		pRA->ping_rssi_enable = (u8)DM_Value;
+	}
+	else if(DM_Type == 21)
+	{
+		if(DM_Value > 30)
+			DM_Value = 30;
+		pRA->ping_rssi_thresh_for_ra = DM_Value;
+	}
+}
+
+#if 0
+extern void dm_force_tx_fw_info(struct net_device *dev,
+										u32		force_type,
+										u32		force_value)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+
+	if (force_type == 0)	
+	{
+		priv->tx_fwinfo_force_subcarriermode = 0;
+	}
+	else if(force_type == 1) 
+	{
+		priv->tx_fwinfo_force_subcarriermode = 1;
+		if(force_value > 3)
+			force_value = 3;
+		priv->tx_fwinfo_force_subcarrierval = (u8)force_value;
+	}
+}
+#endif
+
+static void dm_dig_init(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	dm_digtable.dig_enable_flag	= true;
+	dm_digtable.Backoff_Enable_Flag = true;
+
+#ifdef RTL8192SE
+	if((priv->DM_Type  == DM_Type_ByDriver) && (priv->pFirmware->FirmwareVersion >= 0x3c))
+		dm_digtable.dig_algorithm = DIG_ALGO_BY_TOW_PORT;
+	else
+		dm_digtable.dig_algorithm = DIG_ALGO_BEFORE_CONNECT_BY_RSSI_AND_ALARM;
+#else	
+	dm_digtable.dig_algorithm = DIG_ALGO_BY_RSSI;
+#endif
+
+	dm_digtable.Dig_TwoPort_Algorithm = DIG_TWO_PORT_ALGO_RSSI;
+	dm_digtable.Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_MAX;
+	dm_digtable.dbg_mode = DM_DBG_OFF;	
+	dm_digtable.dig_algorithm_switch = 0;
+	
+	dm_digtable.dig_state		= DM_STA_DIG_MAX;
+	dm_digtable.dig_highpwr_state	= DM_STA_DIG_MAX;
+	dm_digtable.CurSTAConnectState = dm_digtable.PreSTAConnectState = DIG_STA_DISCONNECT;
+	dm_digtable.CurAPConnectState = dm_digtable.PreAPConnectState = DIG_AP_DISCONNECT;
+	dm_digtable.initialgain_lowerbound_state = false;
+
+	dm_digtable.rssi_low_thresh 	= DM_DIG_THRESH_LOW;
+	dm_digtable.rssi_high_thresh 	= DM_DIG_THRESH_HIGH;
+
+	dm_digtable.FALowThresh	= DM_FALSEALARM_THRESH_LOW;
+	dm_digtable.FAHighThresh	= DM_FALSEALARM_THRESH_HIGH;
+	
+	dm_digtable.rssi_high_power_lowthresh = DM_DIG_HIGH_PWR_THRESH_LOW;
+	dm_digtable.rssi_high_power_highthresh = DM_DIG_HIGH_PWR_THRESH_HIGH;
+	
+	dm_digtable.rssi_val = 50;	
+	dm_digtable.backoff_val = DM_DIG_BACKOFF;
+	dm_digtable.rx_gain_range_max = DM_DIG_MAX;
+	if(priv->CustomerID == RT_CID_819x_Netcore)
+		dm_digtable.rx_gain_range_min = DM_DIG_MIN_Netcore;	
+	else
+		dm_digtable.rx_gain_range_min = DM_DIG_MIN;
+	
+	dm_digtable.BackoffVal_range_max = DM_DIG_BACKOFF_MAX;
+	dm_digtable.BackoffVal_range_min = DM_DIG_BACKOFF_MIN;
+}	
+
+void dm_FalseAlarmCounterStatistics(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u32 ret_value;
+	PFALSE_ALARM_STATISTICS FalseAlmCnt = &(priv->FalseAlmCnt);
+	
+	ret_value = rtl8192_QueryBBReg(dev, rOFDM_PHYCounter1, bMaskDWord);
+        FalseAlmCnt->Cnt_Parity_Fail = ((ret_value&0xffff0000)>>16);	
+
+        ret_value = rtl8192_QueryBBReg(dev, rOFDM_PHYCounter2, bMaskDWord);
+	FalseAlmCnt->Cnt_Rate_Illegal = (ret_value&0xffff);
+	FalseAlmCnt->Cnt_Crc8_fail = ((ret_value&0xffff0000)>>16);
+	ret_value = rtl8192_QueryBBReg(dev, rOFDM_PHYCounter3, bMaskDWord);
+	FalseAlmCnt->Cnt_Mcs_fail = (ret_value&0xffff);
+
+	FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Parity_Fail + FalseAlmCnt->Cnt_Rate_Illegal +
+							  FalseAlmCnt->Cnt_Crc8_fail + FalseAlmCnt->Cnt_Mcs_fail;
+
+	ret_value = rtl8192_QueryBBReg(dev, 0xc64, bMaskDWord);	
+	FalseAlmCnt->Cnt_Cck_fail = (ret_value&0xffff);
+	FalseAlmCnt->Cnt_all = (FalseAlmCnt->Cnt_Parity_Fail +
+						FalseAlmCnt->Cnt_Rate_Illegal +
+						FalseAlmCnt->Cnt_Crc8_fail +
+						FalseAlmCnt->Cnt_Mcs_fail +
+						FalseAlmCnt->Cnt_Cck_fail);	
+
+	RT_TRACE(COMP_DIG, "Cnt_Ofdm_fail = %d, Cnt_Cck_fail = %d, Cnt_all = %d\n", 
+				FalseAlmCnt->Cnt_Ofdm_fail, FalseAlmCnt->Cnt_Cck_fail , FalseAlmCnt->Cnt_all);		
+}
+
+#ifdef RTL8192SE
+static void dm_CtrlInitGainAPByFalseAlarm(struct net_device *dev)
+{
+	static u8		binitialized = false;
+
+	{
+		binitialized = false;
+		dm_digtable.Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_MAX;
+		return;
+	}	
+}
+#endif
+
+static void dm_ctrl_initgain_byrssi(struct net_device *dev)
+{
+	
+	if (dm_digtable.dig_enable_flag == false)
+		return;
+
+	if(dm_digtable.dig_algorithm == DIG_ALGO_BY_FALSE_ALARM)
+		dm_ctrl_initgain_byrssi_by_fwfalse_alarm(dev);
+	else if(dm_digtable.dig_algorithm == DIG_ALGO_BY_RSSI)
+		dm_ctrl_initgain_byrssi_by_driverrssi(dev);
+#ifdef RTL8192SE
+	else if(dm_digtable.dig_algorithm == DIG_ALGO_BEFORE_CONNECT_BY_RSSI_AND_ALARM)
+		dm_CtrlInitGainBeforeConnectByRssiAndFalseAlarm(dev);
+	else if(dm_digtable.dig_algorithm == DIG_ALGO_BY_TOW_PORT)
+		dm_CtrlInitGainByTwoPort(dev);
+#endif
+	else
+		return;
+}
+
+#ifdef RTL8192SE
+static void dm_CtrlInitGainByTwoPort(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	if(rtllib_act_scanning(priv->rtllib,true) == true)
+		return;
+
+	if((priv->rtllib->state > RTLLIB_NOLINK) && (priv->rtllib->state < RTLLIB_LINKED))
+		dm_digtable.CurSTAConnectState = DIG_STA_BEFORE_CONNECT;
+	else if((priv->rtllib->state == RTLLIB_LINKED) ||(priv->rtllib->state == RTLLIB_LINKED_SCANNING))
+		dm_digtable.CurSTAConnectState = DIG_STA_CONNECT;
+	else
+		dm_digtable.CurSTAConnectState = DIG_STA_DISCONNECT;
+
+	dm_digtable.rssi_val = priv->undecorated_smoothed_pwdb;	
+	
+	if(dm_digtable.CurSTAConnectState != DIG_STA_DISCONNECT)
+	{	
+		if(dm_digtable.Dig_TwoPort_Algorithm == DIG_TWO_PORT_ALGO_FALSE_ALARM)
+		{
+			dm_digtable.Dig_TwoPort_Algorithm = DIG_TWO_PORT_ALGO_RSSI;
+			priv->rtllib->SetFwCmdHandler(dev, FW_CMD_DIG_MODE_SS);
+		}
+	}	
+	
+	dm_FalseAlarmCounterStatistics(dev);
+	dm_initial_gain_STABeforeConnect(dev);	
+	dm_CtrlInitGainAPByFalseAlarm(dev);
+	
+	dm_digtable.PreSTAConnectState = dm_digtable.CurSTAConnectState;
+}
+#endif
+
+/*-----------------------------------------------------------------------------
+ * Function:	dm_CtrlInitGainBeforeConnectByRssiAndFalseAlarm()
+ *
+ * Overview:	Driver monitor RSSI and False Alarm to change initial gain.
+ 			Only change initial gain during link in progress.
+ *
+ * Input:		IN	PADAPTER	pAdapter
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	03/04/2009	hpfan	Create Version 0.  
+ *
+ *---------------------------------------------------------------------------*/
+ 
+#ifdef RTL8192SE
+static void dm_CtrlInitGainBeforeConnectByRssiAndFalseAlarm(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+
+	if(rtllib_act_scanning(priv->rtllib,true) == true)
+		return;
+
+	if((priv->rtllib->state > RTLLIB_NOLINK) && (priv->rtllib->state < RTLLIB_LINKED))
+		dm_digtable.CurSTAConnectState = DIG_STA_BEFORE_CONNECT;
+	else if((priv->rtllib->state == RTLLIB_LINKED) ||(priv->rtllib->state == RTLLIB_LINKED_SCANNING))
+		dm_digtable.CurSTAConnectState = DIG_STA_CONNECT;
+	else
+		dm_digtable.CurSTAConnectState = DIG_STA_DISCONNECT;
+
+	if(dm_digtable.dbg_mode == DM_DBG_OFF)
+		dm_digtable.rssi_val = priv->undecorated_smoothed_pwdb;
+
+	dm_FalseAlarmCounterStatistics(dev);
+	dm_initial_gain_STABeforeConnect(dev);
+	dm_digtable.PreSTAConnectState = dm_digtable.CurSTAConnectState;
+
+}
+#endif
+static void dm_ctrl_initgain_byrssi_by_driverrssi(
+	struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u8 i;
+	static u8 	fw_dig=0;
+	
+	if (dm_digtable.dig_enable_flag == false)
+		return;
+
+	if(dm_digtable.dig_algorithm_switch)	
+		fw_dig = 0;
+	if(fw_dig <= 3)	
+	{
+		for(i=0; i<3; i++)
+			rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8);	
+		fw_dig++;
+		dm_digtable.dig_state = DM_STA_DIG_OFF;	
+	}
+		
+	if(priv->rtllib->state == RTLLIB_LINKED)
+		dm_digtable.CurSTAConnectState = DIG_STA_CONNECT;
+	else
+		dm_digtable.CurSTAConnectState = DIG_STA_DISCONNECT;
+
+
+	if(dm_digtable.dbg_mode == DM_DBG_OFF)
+		dm_digtable.rssi_val = priv->undecorated_smoothed_pwdb;
+	dm_initial_gain(dev);
+	dm_pd_th(dev);
+	dm_cs_ratio(dev);
+	if(dm_digtable.dig_algorithm_switch)
+		dm_digtable.dig_algorithm_switch = 0;
+	dm_digtable.PreSTAConnectState = dm_digtable.CurSTAConnectState;
+
+}	
+
+static void dm_ctrl_initgain_byrssi_by_fwfalse_alarm(
+	struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	static u32 reset_cnt = 0;
+	u8 i;
+	
+	if (dm_digtable.dig_enable_flag == false)
+		return;
+
+	if(dm_digtable.dig_algorithm_switch)
+	{
+		dm_digtable.dig_state = DM_STA_DIG_MAX;
+		for(i=0; i<3; i++)
+			rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1);	
+		dm_digtable.dig_algorithm_switch = 0;
+	}
+		
+	if (priv->rtllib->state != RTLLIB_LINKED)
+		return;
+
+	if ((priv->undecorated_smoothed_pwdb > dm_digtable.rssi_low_thresh) &&
+		(priv->undecorated_smoothed_pwdb < dm_digtable.rssi_high_thresh))
+	{
+		return;
+	}
+	if ((priv->undecorated_smoothed_pwdb <= dm_digtable.rssi_low_thresh))
+	{		
+		if (dm_digtable.dig_state == DM_STA_DIG_OFF && 
+			(priv->reset_count == reset_cnt))
+		{			
+			return;
+		}
+		else
+		{
+			reset_cnt = priv->reset_count;
+		}
+		
+		dm_digtable.dig_highpwr_state = DM_STA_DIG_MAX;
+		dm_digtable.dig_state = DM_STA_DIG_OFF;
+
+		rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8);	
+
+		write_nic_byte(dev, rOFDM0_XAAGCCore1, 0x17);
+		write_nic_byte(dev, rOFDM0_XBAGCCore1, 0x17);
+		write_nic_byte(dev, rOFDM0_XCAGCCore1, 0x17);
+		write_nic_byte(dev, rOFDM0_XDAGCCore1, 0x17);
+
+		if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
+		{
+			#ifdef RTL8190P
+			write_nic_byte(dev, rOFDM0_RxDetector1, 0x40);
+			#else 
+				write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x00);
+				#endif
+			/*else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
+				write_nic_byte(pAdapter, rOFDM0_RxDetector1, 0x40);
+			*/
+			
+				
+		}
+		else
+			write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
+
+		write_nic_byte(dev, 0xa0a, 0x08);
+		
+		return;
+		
+	}
+	
+	if ((priv->undecorated_smoothed_pwdb >= dm_digtable.rssi_high_thresh) )
+	{
+		u8 reset_flag = 0;
+		
+		if (dm_digtable.dig_state == DM_STA_DIG_ON && 
+			(priv->reset_count == reset_cnt))
+		{
+			dm_ctrl_initgain_byrssi_highpwr(dev);
+			return;
+		}
+		else
+		{
+			if (priv->reset_count != reset_cnt)
+				reset_flag = 1;
+
+			reset_cnt = priv->reset_count;
+		}
+		
+		dm_digtable.dig_state = DM_STA_DIG_ON;
+		
+		if (reset_flag == 1)
+		{
+			write_nic_byte(dev, rOFDM0_XAAGCCore1, 0x2c);
+			write_nic_byte(dev, rOFDM0_XBAGCCore1, 0x2c);
+			write_nic_byte(dev, rOFDM0_XCAGCCore1, 0x2c);
+			write_nic_byte(dev, rOFDM0_XDAGCCore1, 0x2c);
+		}
+		else
+		{
+		write_nic_byte(dev, rOFDM0_XAAGCCore1, 0x20);
+		write_nic_byte(dev, rOFDM0_XBAGCCore1, 0x20);
+		write_nic_byte(dev, rOFDM0_XCAGCCore1, 0x20);
+		write_nic_byte(dev, rOFDM0_XDAGCCore1, 0x20);
+		}
+
+		if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
+		{
+			#ifdef RTL8190P
+			write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
+			#else
+				write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x20);
+				#endif
+			/*
+			else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
+				write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
+			*/
+			
+		}
+		else
+			write_nic_byte(dev, rOFDM0_RxDetector1, 0x44);
+
+		write_nic_byte(dev, 0xa0a, 0xcd);
+
+		
+		rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1);	
+		
+	}
+
+	dm_ctrl_initgain_byrssi_highpwr(dev);
+
+}	
+
+
+static void dm_ctrl_initgain_byrssi_highpwr(
+	struct net_device * dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	static u32 reset_cnt_highpwr = 0;
+	
+	if ((priv->undecorated_smoothed_pwdb > dm_digtable.rssi_high_power_lowthresh) &&
+		(priv->undecorated_smoothed_pwdb < dm_digtable.rssi_high_power_highthresh))
+	{
+		return;
+	}
+	
+	if (priv->undecorated_smoothed_pwdb >= dm_digtable.rssi_high_power_highthresh) 
+	{
+		if (dm_digtable.dig_highpwr_state == DM_STA_DIG_ON && 
+			(priv->reset_count == reset_cnt_highpwr))
+			return;
+		else
+			dm_digtable.dig_highpwr_state = DM_STA_DIG_ON;
+
+		if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
+		{			
+			#ifdef RTL8190P
+			write_nic_byte(dev, rOFDM0_RxDetector1, 0x41);
+			#else
+				write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x10);
+				#endif
+			
+			/*else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
+				write_nic_byte(dev, rOFDM0_RxDetector1, 0x41);
+			*/
+
+		}
+		else
+			write_nic_byte(dev, rOFDM0_RxDetector1, 0x43);
+	}
+	else
+	{
+		if (dm_digtable.dig_highpwr_state == DM_STA_DIG_OFF&& 
+			(priv->reset_count == reset_cnt_highpwr))		
+			return;
+		else
+			dm_digtable.dig_highpwr_state = DM_STA_DIG_OFF;
+		
+		if (priv->undecorated_smoothed_pwdb < dm_digtable.rssi_high_power_lowthresh &&
+			 priv->undecorated_smoothed_pwdb >= dm_digtable.rssi_high_thresh)
+		{
+			if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
+			{				
+				#ifdef RTL8190P
+				write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
+				#else
+					write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x20);
+					#endif
+				/*else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
+					write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
+				*/
+
+			}
+			else
+				write_nic_byte(dev, rOFDM0_RxDetector1, 0x44);
+		}
+	}
+
+	reset_cnt_highpwr = priv->reset_count;
+
+}	
+
+
+static void dm_initial_gain(
+	struct net_device * dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u8					initial_gain=0;
+	static u8				initialized=0, force_write=0;
+	static u32			reset_cnt=0;
+
+	if(dm_digtable.dig_algorithm_switch)
+	{
+		initialized = 0;
+		reset_cnt = 0;
+	}
+	
+	if(rtllib_act_scanning(priv->rtllib,true) == true)
+	{
+		force_write = 1;
+		return;
+	}
+	
+	if(dm_digtable.PreSTAConnectState == dm_digtable.CurSTAConnectState)
+	{
+		if(dm_digtable.CurSTAConnectState == DIG_STA_CONNECT)
+		{
+			if((dm_digtable.rssi_val+10-dm_digtable.backoff_val) > dm_digtable.rx_gain_range_max)
+				dm_digtable.cur_ig_value = dm_digtable.rx_gain_range_max;
+			else if((dm_digtable.rssi_val+10-dm_digtable.backoff_val) < dm_digtable.rx_gain_range_min)
+				dm_digtable.cur_ig_value = dm_digtable.rx_gain_range_min;
+			else
+				dm_digtable.cur_ig_value = dm_digtable.rssi_val+10-dm_digtable.backoff_val;
+		}
+		else		
+		{
+			if(dm_digtable.cur_ig_value == 0)
+				dm_digtable.cur_ig_value = priv->DefaultInitialGain[0];
+			else
+				dm_digtable.cur_ig_value = dm_digtable.pre_ig_value;
+		}
+	}
+	else	
+	{
+		dm_digtable.cur_ig_value = priv->DefaultInitialGain[0];
+		dm_digtable.pre_ig_value = 0;
+	}
+
+	if(priv->reset_count != reset_cnt)
+	{
+		force_write = 1;
+		reset_cnt = priv->reset_count;
+	}
+	
+	if(dm_digtable.pre_ig_value != read_nic_byte(dev, rOFDM0_XAAGCCore1))
+		force_write = 1;
+	
+	{
+		if((dm_digtable.pre_ig_value != dm_digtable.cur_ig_value) 
+			|| !initialized || force_write)
+		{
+			initial_gain = (u8)dm_digtable.cur_ig_value;
+			write_nic_byte(dev, rOFDM0_XAAGCCore1, initial_gain);
+			write_nic_byte(dev, rOFDM0_XBAGCCore1, initial_gain);
+			write_nic_byte(dev, rOFDM0_XCAGCCore1, initial_gain);
+			write_nic_byte(dev, rOFDM0_XDAGCCore1, initial_gain);
+			dm_digtable.pre_ig_value = dm_digtable.cur_ig_value;
+			initialized = 1;
+			force_write = 0;
+		}
+	}
+}
+
+void dm_initial_gain_STABeforeConnect(
+	struct net_device * dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u8			initial_gain=0;
+	static u8		initialized=0, force_write=0;
+
+	RT_TRACE(COMP_DIG, "PreSTAConnectState = %x, CurSTAConnectState = %x\n", 
+				dm_digtable.PreSTAConnectState, dm_digtable.CurSTAConnectState);
+
+
+	if((dm_digtable.PreSTAConnectState == dm_digtable.CurSTAConnectState) ||
+		(dm_digtable.CurSTAConnectState == DIG_STA_BEFORE_CONNECT))
+	{
+		if(dm_digtable.CurSTAConnectState == DIG_STA_BEFORE_CONNECT)
+		{
+			if(priv->rtllib->eRFPowerState != eRfOn)
+				return;
+			
+			if(dm_digtable.Backoff_Enable_Flag == true)
+			{
+				if(priv->FalseAlmCnt.Cnt_all > dm_digtable.FAHighThresh)
+				{
+					if((dm_digtable.backoff_val -6) < dm_digtable.BackoffVal_range_min)
+						dm_digtable.backoff_val = dm_digtable.BackoffVal_range_min;
+					else
+						dm_digtable.backoff_val -= 6; 
+				}	
+				else if(priv->FalseAlmCnt.Cnt_all < dm_digtable.FALowThresh)
+				{
+					if((dm_digtable.backoff_val+6) > dm_digtable.BackoffVal_range_max)
+						dm_digtable.backoff_val = dm_digtable.BackoffVal_range_max;
+					else
+						dm_digtable.backoff_val +=6;
+				}
+			}
+			else
+				dm_digtable.backoff_val =DM_DIG_BACKOFF;
+		
+			if((dm_digtable.rssi_val+10-dm_digtable.backoff_val) > dm_digtable.rx_gain_range_max)
+				dm_digtable.cur_ig_value = dm_digtable.rx_gain_range_max;
+			else if((dm_digtable.rssi_val+10-dm_digtable.backoff_val) < dm_digtable.rx_gain_range_min)
+				dm_digtable.cur_ig_value = dm_digtable.rx_gain_range_min;
+			else
+				dm_digtable.cur_ig_value = dm_digtable.rssi_val+10-dm_digtable.backoff_val;
+
+			if(priv->FalseAlmCnt.Cnt_all > 10000)
+				dm_digtable.cur_ig_value = (dm_digtable.cur_ig_value>0x33)?dm_digtable.cur_ig_value:0x33;
+
+			if(priv->FalseAlmCnt.Cnt_all > 16000)
+				dm_digtable.cur_ig_value = dm_digtable.rx_gain_range_max;
+
+		}
+		else 
+		{
+			return;	
+		}
+	}
+	else	
+	{		
+		dm_digtable.Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_MAX;
+		priv->rtllib->SetFwCmdHandler(dev, FW_CMD_DIG_ENABLE);
+
+		dm_digtable.backoff_val = DM_DIG_BACKOFF;
+		dm_digtable.cur_ig_value = priv->DefaultInitialGain[0];
+		dm_digtable.pre_ig_value = 0;
+		return;
+	}
+		
+	if(dm_digtable.pre_ig_value != rtl8192_QueryBBReg(dev, rOFDM0_XAAGCCore1, bMaskByte0))
+		force_write = 1;
+	
+	if((dm_digtable.pre_ig_value != dm_digtable.cur_ig_value) || !initialized || force_write)
+	{
+		priv->rtllib->SetFwCmdHandler(dev, FW_CMD_DIG_DISABLE);	
+
+		initial_gain = (u8)dm_digtable.cur_ig_value;
+
+		rtl8192_setBBreg(dev, rOFDM0_XAAGCCore1, bMaskByte0, initial_gain);
+		rtl8192_setBBreg(dev, rOFDM0_XBAGCCore1, bMaskByte0, initial_gain);
+		dm_digtable.pre_ig_value = dm_digtable.cur_ig_value;
+		initialized = 1;
+		force_write = 0;
+	}
+	
+	RT_TRACE(COMP_DIG, "CurIGValue = 0x%x, pre_ig_value = 0x%x, backoff_val = %d\n", 
+				dm_digtable.cur_ig_value, dm_digtable.pre_ig_value, dm_digtable.backoff_val);
+
+}
+
+static void dm_pd_th(	
+	struct net_device * dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	static u8				initialized=0, force_write=0;
+	static u32			reset_cnt = 0;
+
+	if(dm_digtable.dig_algorithm_switch)
+	{
+		initialized = 0;
+		reset_cnt = 0;
+	}
+	
+	if(dm_digtable.PreSTAConnectState == dm_digtable.CurSTAConnectState)
+	{
+		if(dm_digtable.CurSTAConnectState == DIG_STA_CONNECT)
+		{
+			if (dm_digtable.rssi_val >= dm_digtable.rssi_high_power_highthresh)
+				dm_digtable.curpd_thstate = DIG_PD_AT_HIGH_POWER;
+			else if ((dm_digtable.rssi_val <= dm_digtable.rssi_low_thresh))
+				dm_digtable.curpd_thstate = DIG_PD_AT_LOW_POWER;
+			else if ((dm_digtable.rssi_val >= dm_digtable.rssi_high_thresh) &&
+					(dm_digtable.rssi_val < dm_digtable.rssi_high_power_lowthresh))
+				dm_digtable.curpd_thstate = DIG_PD_AT_NORMAL_POWER;
+			else
+				dm_digtable.curpd_thstate = dm_digtable.prepd_thstate;
+		}
+		else
+		{
+			dm_digtable.curpd_thstate = DIG_PD_AT_LOW_POWER;
+		}
+	}
+	else	
+	{
+		dm_digtable.curpd_thstate = DIG_PD_AT_LOW_POWER;
+	}
+
+	if(priv->reset_count != reset_cnt)
+	{
+		force_write = 1;
+		reset_cnt = priv->reset_count;
+	}
+		
+	{
+		if((dm_digtable.prepd_thstate != dm_digtable.curpd_thstate) || 
+			(initialized<=3) || force_write)
+		{
+			if(dm_digtable.curpd_thstate == DIG_PD_AT_LOW_POWER)
+			{
+				if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
+				{
+					#ifdef RTL8190P
+					write_nic_byte(dev, rOFDM0_RxDetector1, 0x40);
+					#else
+						write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x00);
+						#endif
+					/*else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
+						write_nic_byte(dev, rOFDM0_RxDetector1, 0x40);
+					*/
+				}
+				else
+					write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
+			}
+			else if(dm_digtable.curpd_thstate == DIG_PD_AT_NORMAL_POWER)
+			{
+				if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
+				{
+					#ifdef RTL8190P
+					write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);	
+					#else
+						write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x20);
+						#endif
+					/*else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
+						write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);		
+					*/
+				}
+				else
+					write_nic_byte(dev, rOFDM0_RxDetector1, 0x44);
+			}
+			else if(dm_digtable.curpd_thstate == DIG_PD_AT_HIGH_POWER)
+			{
+				if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
+				{			
+					#ifdef RTL8190P
+					write_nic_byte(dev, rOFDM0_RxDetector1, 0x41);
+					#else
+						write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x10);
+						#endif
+					/*else if (priv->card_8192 == HARDWARE_TYPE_RTL8190P)
+						write_nic_byte(dev, rOFDM0_RxDetector1, 0x41);
+					*/
+				}
+				else
+					write_nic_byte(dev, rOFDM0_RxDetector1, 0x43);
+			}	
+			dm_digtable.prepd_thstate = dm_digtable.curpd_thstate;
+			if(initialized <= 3)
+				initialized++;
+			force_write = 0;
+		}
+	}
+}
+
+static	void dm_cs_ratio(
+	struct net_device * dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	static u8				initialized=0,force_write=0;
+	static u32			reset_cnt = 0;
+
+	if(dm_digtable.dig_algorithm_switch)
+	{
+		initialized = 0;
+		reset_cnt = 0;
+	}
+	
+	if(dm_digtable.PreSTAConnectState == dm_digtable.CurSTAConnectState)
+	{
+		if(dm_digtable.CurSTAConnectState == DIG_STA_CONNECT)
+		{
+			if ((dm_digtable.rssi_val <= dm_digtable.rssi_low_thresh))
+				dm_digtable.curcs_ratio_state = DIG_CS_RATIO_LOWER;
+			else if ((dm_digtable.rssi_val >= dm_digtable.rssi_high_thresh) )
+				dm_digtable.curcs_ratio_state = DIG_CS_RATIO_HIGHER;
+			else
+				dm_digtable.curcs_ratio_state = dm_digtable.precs_ratio_state;
+		}
+		else
+		{
+			dm_digtable.curcs_ratio_state = DIG_CS_RATIO_LOWER;
+		}
+	}
+	else	
+	{
+		dm_digtable.curcs_ratio_state = DIG_CS_RATIO_LOWER;
+	}
+
+	if(priv->reset_count != reset_cnt)
+	{
+		force_write = 1;
+		reset_cnt = priv->reset_count;
+	}
+
+	
+	{
+		if((dm_digtable.precs_ratio_state != dm_digtable.curcs_ratio_state) || 
+			!initialized || force_write)
+		{
+			if(dm_digtable.curcs_ratio_state == DIG_CS_RATIO_LOWER)
+			{
+				write_nic_byte(dev, 0xa0a, 0x08);
+			}
+			else if(dm_digtable.curcs_ratio_state == DIG_CS_RATIO_HIGHER)
+			{
+				write_nic_byte(dev, 0xa0a, 0xcd);
+			}	
+			dm_digtable.precs_ratio_state = dm_digtable.curcs_ratio_state;
+			initialized = 1;
+			force_write = 0;
+		}
+	}
+}
+
+extern void dm_init_edca_turbo(struct net_device * dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+
+	priv->bcurrent_turbo_EDCA = false;
+	priv->rtllib->bis_any_nonbepkts = false;
+	priv->bis_cur_rdlstate = false;
+}	
+
+#if 1
+static void dm_check_edca_turbo(
+	struct net_device * dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	PRT_HIGH_THROUGHPUT	pHTInfo = priv->rtllib->pHTInfo;
+	
+	static unsigned long			lastTxOkCnt = 0;
+	static unsigned long			lastRxOkCnt = 0;
+	unsigned long				curTxOkCnt = 0;
+	unsigned long				curRxOkCnt = 0;	
+
+	if(priv->rtllib->iw_mode == IW_MODE_ADHOC)
+	{
+		goto dm_CheckEdcaTurbo_EXIT;
+	}
+	if(priv->rtllib->state != RTLLIB_LINKED)
+	{
+		goto dm_CheckEdcaTurbo_EXIT;
+	}
+	if(priv->rtllib->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_EDCA_TURBO)
+	{
+		goto dm_CheckEdcaTurbo_EXIT;
+	}
+	
+	{
+		u8* peername[11] = {"unknown", "realtek_90", "realtek_92se","broadcom", "ralink", "atheros", "cisco", "marvell", "92u_softap", "self_softap"};
+		static int wb_tmp = 0;
+		if (wb_tmp == 0){
+			printk("%s():iot peer is %s, bssid:"MAC_FMT"\n",__FUNCTION__,peername[pHTInfo->IOTPeer], MAC_ARG(priv->rtllib->current_network.bssid));
+			wb_tmp = 1;
+		}
+	}
+	if(!priv->rtllib->bis_any_nonbepkts)
+	{
+		curTxOkCnt = priv->stats.txbytesunicast - lastTxOkCnt;
+		curRxOkCnt = priv->stats.rxbytesunicast - lastRxOkCnt;
+		if(pHTInfo->IOTAction & HT_IOT_ACT_EDCA_BIAS_ON_RX)
+		{
+			if(curTxOkCnt > 4*curRxOkCnt)
+			{
+				if(priv->bis_cur_rdlstate || !priv->bcurrent_turbo_EDCA)
+				{
+					write_nic_dword(dev, EDCAPARA_BE, edca_setting_UL[pHTInfo->IOTPeer]);
+					priv->bis_cur_rdlstate = false;
+				}
+			}
+			else
+			{
+				if(!priv->bis_cur_rdlstate || !priv->bcurrent_turbo_EDCA)
+				{
+					if(priv->rtllib->mode == WIRELESS_MODE_G)
+						write_nic_dword(dev, EDCAPARA_BE, edca_setting_DL_GMode[pHTInfo->IOTPeer]);
+					else
+						write_nic_dword(dev, EDCAPARA_BE, edca_setting_DL[pHTInfo->IOTPeer]);
+					priv->bis_cur_rdlstate = true;
+				}
+			}
+			priv->bcurrent_turbo_EDCA = true;
+		}
+		else
+		{
+		if(curRxOkCnt > 4*curTxOkCnt)
+		{
+			if(!priv->bis_cur_rdlstate || !priv->bcurrent_turbo_EDCA)
+			{
+				if(priv->rtllib->mode == WIRELESS_MODE_G)
+					write_nic_dword(dev, EDCAPARA_BE, edca_setting_DL_GMode[pHTInfo->IOTPeer]);
+				else
+				write_nic_dword(dev, EDCAPARA_BE, edca_setting_DL[pHTInfo->IOTPeer]);
+				priv->bis_cur_rdlstate = true;
+			}
+		}
+		else
+		{
+			if(priv->bis_cur_rdlstate || !priv->bcurrent_turbo_EDCA)
+			{
+				write_nic_dword(dev, EDCAPARA_BE, edca_setting_UL[pHTInfo->IOTPeer]);
+				priv->bis_cur_rdlstate = false;
+			}
+
+		}
+
+		priv->bcurrent_turbo_EDCA = true;
+	}
+	}
+	else
+	{
+		 if(priv->bcurrent_turbo_EDCA)
+		{
+
+			{
+				u8		u1bAIFS;
+				u32		u4bAcParam;
+				struct rtllib_qos_parameters *qos_parameters = &priv->rtllib->current_network.qos_data.parameters;
+				u8 mode = priv->rtllib->mode;
+
+				dm_init_edca_turbo(dev);
+				u1bAIFS = qos_parameters->aifs[0] * ((mode&(IEEE_G|IEEE_N_24G)) ?9:20) + aSifsTime; 
+				u4bAcParam = ((((u32)(qos_parameters->tx_op_limit[0]))<< AC_PARAM_TXOP_LIMIT_OFFSET)|
+					(((u32)(qos_parameters->cw_max[0]))<< AC_PARAM_ECW_MAX_OFFSET)|
+					(((u32)(qos_parameters->cw_min[0]))<< AC_PARAM_ECW_MIN_OFFSET)|
+					((u32)u1bAIFS << AC_PARAM_AIFS_OFFSET));
+				write_nic_dword(dev, EDCAPARA_BE,  u4bAcParam);
+			
+				{
+
+					PACI_AIFSN	pAciAifsn = (PACI_AIFSN)&(qos_parameters->aifs[0]);
+					u8		AcmCtrl = read_nic_byte( dev, AcmHwCtrl );
+					if( pAciAifsn->f.ACM )
+					{ 
+						AcmCtrl |= AcmHw_BeqEn;
+					}
+					else
+					{ 
+						AcmCtrl &= (~AcmHw_BeqEn);
+					}
+
+					RT_TRACE( COMP_QOS,"SetHwReg8190pci(): [HW_VAR_ACM_CTRL] Write 0x%X\n", AcmCtrl ) ;
+					write_nic_byte(dev, AcmHwCtrl, AcmCtrl );
+				}
+			}
+			priv->bcurrent_turbo_EDCA = false;
+		}
+	}
+	
+		
+dm_CheckEdcaTurbo_EXIT:
+	priv->rtllib->bis_any_nonbepkts = false;
+	lastTxOkCnt = priv->stats.txbytesunicast;
+	lastRxOkCnt = priv->stats.rxbytesunicast;
+}	
+#endif
+
+extern void DM_CTSToSelfSetting(struct net_device * dev,u32 DM_Type, u32 DM_Value)
+{
+	struct r8192_priv *priv = rtllib_priv((struct net_device *)dev);
+	
+	if (DM_Type == 0)	
+	{
+		if(DM_Value > 1)
+			DM_Value = 1;
+		priv->rtllib->bCTSToSelfEnable = (bool)DM_Value;
+	}
+	else if(DM_Type == 1) 
+	{
+		if(DM_Value >= 50)
+			DM_Value = 50;
+		priv->rtllib->CTSToSelfTH = (u8)DM_Value;
+	}
+}
+
+static void dm_init_ctstoself(struct net_device * dev)
+{
+	struct r8192_priv *priv = rtllib_priv((struct net_device *)dev);
+	
+	priv->rtllib->bCTSToSelfEnable = true;
+	priv->rtllib->CTSToSelfTH = CTSToSelfTHVal;
+}
+
+static void dm_ctstoself(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv((struct net_device *)dev);
+	PRT_HIGH_THROUGHPUT	pHTInfo = priv->rtllib->pHTInfo;
+	static unsigned long				lastTxOkCnt = 0;
+	static unsigned long				lastRxOkCnt = 0;
+	unsigned long						curTxOkCnt = 0;
+	unsigned long						curRxOkCnt = 0;
+
+	if(priv->rtllib->bCTSToSelfEnable != true)
+	{
+		pHTInfo->IOTAction &= ~HT_IOT_ACT_FORCED_CTS2SELF;
+		return;
+	}
+	if(pHTInfo->IOTPeer == HT_IOT_PEER_BROADCOM)
+	{
+		curTxOkCnt = priv->stats.txbytesunicast - lastTxOkCnt;
+		curRxOkCnt = priv->stats.rxbytesunicast - lastRxOkCnt;
+		if(curRxOkCnt > 4*curTxOkCnt)	
+		{
+			pHTInfo->IOTAction &= ~HT_IOT_ACT_FORCED_CTS2SELF;
+		}
+		else	
+		{
+		#if 1
+			pHTInfo->IOTAction |= HT_IOT_ACT_FORCED_CTS2SELF;
+		#else
+			if(priv->undecorated_smoothed_pwdb < priv->rtllib->CTSToSelfTH)	
+			{
+				pHTInfo->IOTAction &= ~HT_IOT_ACT_FORCED_CTS2SELF;
+			}
+			else if(priv->undecorated_smoothed_pwdb >= (priv->rtllib->CTSToSelfTH+5))	
+			{
+				pHTInfo->IOTAction |= HT_IOT_ACT_FORCED_CTS2SELF;
+			}
+		#endif
+		}
+
+		lastTxOkCnt = priv->stats.txbytesunicast;
+		lastRxOkCnt = priv->stats.rxbytesunicast;
+	}
+}
+
+
+static	void 
+dm_Init_WA_Broadcom_IOT(struct net_device * dev)
+{
+	struct r8192_priv *priv = rtllib_priv((struct net_device *)dev);
+	PRT_HIGH_THROUGHPUT	pHTInfo = priv->rtllib->pHTInfo;
+	
+	pHTInfo->bWAIotBroadcom = false;
+	pHTInfo->WAIotTH = WAIotTHVal;
+}
+
+#ifdef RTL8192SE
+static	void
+dm_WA_Broadcom_IOT(struct net_device * dev)
+{
+	struct r8192_priv *priv = rtllib_priv((struct net_device *)dev);
+	PRT_HIGH_THROUGHPUT	pHTInfo = priv->rtllib->pHTInfo;
+	u8					update=0;
+	static enum rtllib_state connectState = RTLLIB_NOLINK;
+
+	if( (pHTInfo->bWAIotBroadcom != true) ||
+		(priv->rtllib->mode == WIRELESS_MODE_B) ||
+		(pHTInfo->bCurBW40MHz))
+	{
+		if(pHTInfo->IOTAction & HT_IOT_ACT_WA_IOT_Broadcom)
+		{	
+			pHTInfo->IOTAction &= ~HT_IOT_ACT_WA_IOT_Broadcom;
+			update = 1;
+			printk(" dm_WA_Broadcom_IOT(), disable HT_IOT_ACT_WA_IOT_Broadcom\n");
+		}
+		else
+			return;
+	}
+
+	if(connectState == RTLLIB_LINKED && priv->rtllib->state == RTLLIB_LINKED)	
+	{
+		if(pHTInfo->IOTAction & HT_IOT_ACT_WA_IOT_Broadcom)
+		{	
+			pHTInfo->IOTAction &= ~HT_IOT_ACT_WA_IOT_Broadcom;
+			update = 1;
+			pHTInfo->bWAIotBroadcom = false;
+			printk("dm_WA_Broadcom_IOT(), from connect to disconnected, disable HT_IOT_ACT_WA_IOT_Broadcom\n");
+		}
+	}
+	connectState = priv->rtllib->state;
+		
+	if(!update && pHTInfo->IOTPeer == HT_IOT_PEER_BROADCOM)
+	{
+		if(priv->undecorated_smoothed_pwdb < pHTInfo->WAIotTH)
+		{
+			if(pHTInfo->IOTAction & HT_IOT_ACT_WA_IOT_Broadcom)
+			{	
+				pHTInfo->IOTAction &= ~HT_IOT_ACT_WA_IOT_Broadcom;
+				update = 1;
+				printk("dm_WA_Broadcom_IOT() ==> WA_IOT enable cck rates\n");
+			}
+		}
+		else if(priv->undecorated_smoothed_pwdb >= (priv->rtllib->CTSToSelfTH+5))	
+		{
+			if((pHTInfo->IOTAction & HT_IOT_ACT_WA_IOT_Broadcom) == 0)
+			{
+				pHTInfo->IOTAction |= HT_IOT_ACT_WA_IOT_Broadcom;
+				update = 1;
+				printk("dm_WA_Broadcom_IOT() ==> WA_IOT disable cck rates\n");
+			}
+		}
+	}
+
+	if(update){
+		if(priv->rtllib->bUseRAMask){
+			priv->rtllib->UpdateHalRAMaskHandler(
+										dev,
+										false,
+										0,
+										priv->rtllib->pHTInfo->PeerMimoPs,
+										priv->rtllib->mode,
+										priv->rtllib->pHTInfo->bCurTxBW40MHz,
+										0);
+		}else{
+			priv->ops->update_ratr_table(dev, priv->rtllib->dot11HTOperationalRateSet, NULL);
+		}
+		priv->rtllib->SetHwRegHandler( dev, HW_VAR_BASIC_RATE, (u8*)(&priv->basic_rate));
+	}
+}
+#endif
+
+
+#if 0
+extern void dm_rf_operation_test_callback(unsigned long dev)
+{
+	u8 erfpath;
+		
+		
+	for(erfpath=0; erfpath<4; erfpath++) 
+	{
+		udelay(100); 
+	} 
+
+	{
+	}
+	
+	{
+#if 0
+		for(i=0; i<50; i++) 
+		{ 
+			PHY_SetRFReg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4d);
+			PHY_SetRFReg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4f);
+			PHY_SetRFReg(dev, RF90_PATH_C, 0x02, bMask12Bits, 0x4d);
+			PHY_SetRFReg(dev, RF90_PATH_C, 0x02, bMask12Bits, 0x4f);
+
+#if 0
+			PHY_QueryRFReg(dev, RF90_PATH_A, 0x02, bMask12Bits);
+			PHY_QueryRFReg(dev, RF90_PATH_A, 0x02, bMask12Bits);
+			PHY_QueryRFReg(dev, RF90_PATH_A, 0x12, bMask12Bits);
+			PHY_QueryRFReg(dev, RF90_PATH_A, 0x12, bMask12Bits);
+			PHY_QueryRFReg(dev, RF90_PATH_A, 0x21, bMask12Bits);
+			PHY_QueryRFReg(dev, RF90_PATH_A, 0x21, bMask12Bits);
+#endif
+		} 
+#endif
+	}
+	
+}	
+#endif
+
+#if 0
+static void dm_check_rfctrl_gpio(struct net_device * dev)
+{
+#ifdef RTL8192E
+	struct r8192_priv *priv = rtllib_priv(dev);
+#endif
+
+	
+#ifdef RTL8190P
+	return;
+#endif
+#ifdef RTL8192U
+	return;
+#endif
+#ifdef RTL8192E
+	queue_delayed_work_rsl(priv->priv_wq,&priv->gpio_change_rf_wq,0);
+#endif
+
+}	
+
+#endif
+static	void	dm_check_pbc_gpio(struct net_device *dev)
+{
+#ifdef RTL8192U
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u8 tmp1byte;
+
+	
+	tmp1byte = read_nic_byte(dev,GPI);
+	if(tmp1byte == 0xff)
+	return;
+
+	if (tmp1byte&BIT6 || tmp1byte&BIT0)
+	{
+		RT_TRACE(COMP_IO, "CheckPbcGPIO - PBC is pressed\n");
+		priv->bpbc_pressed = true;
+	}
+#endif
+	
+}
+
+#ifdef RTL8192E 
+
+extern	void	dm_CheckRfCtrlGPIO(void *data)
+{
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
+       struct r8192_priv *priv = container_of_dwork_rsl(data,struct r8192_priv,gpio_change_rf_wq);
+       struct net_device *dev = priv->rtllib->dev;
+#else
+	struct r8192_priv *priv = rtllib_priv((struct net_device *)data);
+	struct net_device *dev = priv->rtllib->dev;
+#endif
+	u8 tmp1byte;
+	RT_RF_POWER_STATE	eRfPowerStateToSet;
+	bool bActuallySet = false;
+
+	char *argv[3];
+	static char *RadioPowerPath = "/etc/acpi/events/RadioPower.sh";
+	static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL};
+
+	bActuallySet=false;
+
+	if((priv->up_first_time == 1) || (priv->being_init_adapter))
+	{
+		return;
+	}
+
+	if(priv->bfirst_after_down){
+		priv->bfirst_after_down = 1;
+		return;
+	}
+
+
+
+	{
+		tmp1byte = read_nic_byte(dev,GPI);
+
+		eRfPowerStateToSet = (tmp1byte&BIT1) ?  eRfOn : eRfOff;
+
+		if( (priv->bHwRadioOff == true) && (eRfPowerStateToSet == eRfOn))
+		{
+			RT_TRACE(COMP_RF, "gpiochangeRF  - HW Radio ON\n");
+			printk("gpiochangeRF  - HW Radio ON\n");
+			priv->bHwRadioOff = false;
+			bActuallySet = true;
+		}
+		else if ( (priv->bHwRadioOff == false) && (eRfPowerStateToSet == eRfOff))
+		{
+			RT_TRACE(COMP_RF, "gpiochangeRF  - HW Radio OFF\n");
+			printk("gpiochangeRF  - HW Radio OFF\n");
+			priv->bHwRadioOff = true;
+			bActuallySet = true;
+		}
+
+		if(bActuallySet)
+		{
+			mdelay(1000); 
+			priv->bHwRfOffAction = 1;
+			MgntActSet_RF_State(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW);
+			{
+				if(priv->bHwRadioOff == true)
+					argv[1] = "RFOFF";
+				else
+					argv[1] = "RFON";
+
+				argv[0] = RadioPowerPath;
+				argv[2] = NULL;
+				call_usermodehelper(RadioPowerPath,argv,envp,1);
+			}
+
+		}
+#if 0 
+		else
+		{
+			msleep(2000);
+		}
+#endif
+
+	}
+
+}	
+#elif defined RTL8192SE
+extern void Power_DomainInit92SE(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u8				tmpU1b;
+	u16				tmpU2b;
+
+	
+	
+	priv->PwrDomainProtect = true;
+
+	tmpU1b = read_nic_byte(dev, (SYS_CLKR + 1));
+	if(tmpU1b & BIT7)
+	{
+		tmpU1b &= ~(BIT6 | BIT7);
+		if(!HalSetSysClk8192SE(dev, tmpU1b)){
+			priv->PwrDomainProtect = false;
+			return; 
+	}
+	}
+	
+	write_nic_byte(dev, AFE_PLL_CTRL, 0x0);
+	write_nic_byte(dev, LDOA15_CTRL, 0x34);
+	
+#if 0
+	tmpU2b = read_nic_word(dev, SYS_CLKR);
+	if (tmpU2b & BIT15)	
+	{
+		tmpU2b &= ~(BIT14|BIT15);
+		RT_TRACE(COMP_INIT, DBG_LOUD, ("Return to HW CTRL\n"));
+		write_nic_word(dev, SYS_CLKR, tmpU2b);
+	}
+	udelay(200);
+#endif
+
+	tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
+	if (priv->rtllib->RfOffReason & (RF_CHANGE_BY_IPS | RF_CHANGE_BY_HW)) {
+		tmpU1b &= 0xFB;
+	} else {
+		tmpU1b &= 0x73;
+	}
+	
+	write_nic_byte(dev, SYS_FUNC_EN+1, tmpU1b);
+	udelay(1000);
+	
+	write_nic_byte(dev, CMDR, 0);
+	write_nic_byte(dev, TCR, 0);
+
+	tmpU1b = read_nic_byte(dev, 0x562);
+	tmpU1b |= 0x08;
+	write_nic_byte(dev, 0x562, tmpU1b);
+	tmpU1b &= ~(BIT3);
+	write_nic_byte(dev, 0x562, tmpU1b);
+
+	tmpU1b = read_nic_byte(dev, AFE_XTAL_CTRL);	
+	write_nic_byte(dev, AFE_XTAL_CTRL, (tmpU1b|0x01));
+	udelay(1500);	
+	tmpU1b = read_nic_byte(dev, AFE_XTAL_CTRL+1);	
+	write_nic_byte(dev, AFE_XTAL_CTRL+1, (tmpU1b&0xfb));
+
+
+	tmpU1b = read_nic_byte(dev, AFE_MISC);	
+	write_nic_byte(dev, AFE_MISC, (tmpU1b|BIT0));
+	udelay(1000);
+
+	tmpU1b = read_nic_byte(dev, AFE_MISC);	
+	write_nic_byte(dev, AFE_MISC, (tmpU1b|0x02));
+	udelay(1000);
+	
+	tmpU1b = read_nic_byte(dev, LDOA15_CTRL);	
+	write_nic_byte(dev, LDOA15_CTRL, (tmpU1b|BIT0));
+
+	tmpU2b = read_nic_word(dev, SYS_ISO_CTRL);	
+	write_nic_word(dev, SYS_ISO_CTRL, (tmpU2b|BIT11));
+
+
+	tmpU2b = read_nic_word(dev, SYS_FUNC_EN);
+	write_nic_word(dev, SYS_FUNC_EN, (tmpU2b |BIT13));
+
+	write_nic_byte(dev, SYS_ISO_CTRL+1, 0x68);
+
+	tmpU1b = read_nic_byte(dev, AFE_PLL_CTRL);	
+	write_nic_byte(dev, AFE_PLL_CTRL, (tmpU1b|BIT0|BIT4));
+	tmpU1b = read_nic_byte(dev, AFE_PLL_CTRL+1);	
+	write_nic_byte(dev, AFE_PLL_CTRL+1, (tmpU1b|BIT0));
+	udelay(1000);
+
+	write_nic_byte(dev, SYS_ISO_CTRL, 0xA6);
+
+	tmpU2b = read_nic_word(dev, SYS_CLKR);	
+	write_nic_word(dev, SYS_CLKR, (tmpU2b|BIT12|BIT11));
+
+	tmpU2b = read_nic_word(dev, SYS_FUNC_EN);	
+	write_nic_word(dev, SYS_FUNC_EN, (tmpU2b|BIT11));
+	write_nic_word(dev, SYS_FUNC_EN, (tmpU2b|BIT11|BIT15));
+
+	 tmpU2b = read_nic_word(dev, SYS_CLKR);	
+	write_nic_word(dev, SYS_CLKR, (tmpU2b&(~BIT2)));
+	
+	tmpU1b = read_nic_byte(dev, (SYS_CLKR + 1));
+	tmpU1b = ((tmpU1b | BIT7) & (~BIT6));
+	if(!HalSetSysClk8192SE(dev, tmpU1b))
+	{
+		priv->PwrDomainProtect = false;
+		return; 
+	}
+#if 0
+	tmpU2b = read_nic_word(dev, SYS_CLKR);	
+	write_nic_word(dev, SYS_CLKR, ((tmpU2b|BIT15)&(~BIT14)));
+#endif
+
+	write_nic_word(dev, CMDR, 0x37FC);	
+
+	gen_RefreshLedState(dev);
+
+	priv->PwrDomainProtect = false;
+
+}	
+
+void	SET_RTL8192SE_RF_HALT(struct net_device *dev)							
+{ 																	
+	u8		u1bTmp;												
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	if(priv->rtllib->RfOffReason == RF_CHANGE_BY_IPS && priv->LedStrategy == SW_LED_MODE8)	
+	{
+		SET_RTL8192SE_RF_SLEEP(dev);
+		return;
+	}
+	
+	u1bTmp = read_nic_byte(dev, LDOV12D_CTRL);		
+	u1bTmp |= BIT0; 												
+	write_nic_byte(dev, LDOV12D_CTRL, u1bTmp);		
+	write_nic_byte(dev, SPS1_CTRL, 0x0);				
+	write_nic_byte(dev, TXPAUSE, 0xFF);				
+	write_nic_word(dev, CMDR, 0x57FC);				
+	udelay(100);													
+	write_nic_word(dev, CMDR, 0x77FC);				
+	write_nic_byte(dev, PHY_CCA, 0x0);				
+	udelay(10);													
+	write_nic_word(dev, CMDR, 0x37FC);				
+	udelay(10);													
+	write_nic_word(dev, CMDR, 0x77FC);				
+	udelay(10);													
+	write_nic_word(dev, CMDR, 0x57FC);				
+	write_nic_word(dev, CMDR, 0x0000);				
+	u1bTmp = read_nic_byte(dev, (SYS_CLKR + 1));		
+	if(u1bTmp & BIT7)												
+	{																
+		u1bTmp &= ~(BIT6 | BIT7);									
+		if(!HalSetSysClk8192SE(dev, u1bTmp))					
+			return;													
+	}	
+	if(priv->rtllib->RfOffReason==RF_CHANGE_BY_IPS )
+	{
+		write_nic_byte(dev, 0x03, 0xF9);
+	}
+	else		
+	{
+		write_nic_byte(dev, 0x03, 0x71);
+	}
+	write_nic_byte(dev, SYS_CLKR+1, 0x70);					
+	write_nic_byte(dev, AFE_PLL_CTRL+1, 0x68);					
+	write_nic_byte(dev, AFE_PLL_CTRL, 0x00);					
+	write_nic_byte(dev, LDOA15_CTRL, 0x34);
+	write_nic_byte(dev, AFE_XTAL_CTRL, 0x0E);					
+															
+}
+
+u8 RfOnOffDetect(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u8	u1Tmp;
+	u8	retval=eRfOn;
+
+	if(priv->pwrdown)
+	{
+		u1Tmp = read_nic_byte(dev, 0x06);
+		printk("pwrdown, 0x6(BIT6)=%02x\n", u1Tmp);
+		retval = (u1Tmp & BIT6) ? eRfOn: eRfOff;
+	}
+	else
+	{
+#ifdef CONFIG_BT_COEXIST
+		if(pHalData->bt_coexist.BluetoothCoexist)
+		{
+			if(pHalData->bt_coexist.BT_CoexistType == BT_2Wire)
+			{
+				PlatformEFIOWrite1Byte(pAdapter, MAC_PINMUX_CFG, 0xa);
+				u1Tmp = PlatformEFIORead1Byte(pAdapter, GPIO_IO_SEL);
+				delay_us(100);
+				u1Tmp = PlatformEFIORead1Byte(pAdapter, GPIO_IN);
+				RTPRINT(FPWR, PWRHW, ("GPIO_IN=%02x\n", u1Tmp));
+				retval = (u1Tmp & HAL_8192S_HW_GPIO_OFF_BIT) ? eRfOn : eRfOff;
+			}
+			else if( (pHalData->bt_coexist.BT_CoexistType == BT_ISSC_3Wire) ||
+					(pHalData->bt_coexist.BT_CoexistType == BT_Accel) ||
+					(pHalData->bt_coexist.BT_CoexistType == BT_CSR) )
+			{
+				u4tmp = PHY_QueryBBReg(pAdapter, 0x87c, bMaskDWord);
+				if((u4tmp & BIT17) != 0)
+				{
+					PHY_SetBBReg(pAdapter, 0x87c, bMaskDWord, u4tmp & ~BIT17);
+					delay_us(50);
+					RTPRINT(FBT, BT_RFPoll, ("BT write 0x87c (~BIT17) = 0x%x\n", u4tmp &~BIT17));
+				}
+				u4tmp = PHY_QueryBBReg(pAdapter, 0x8e0, bMaskDWord);
+				RTPRINT(FBT, BT_RFPoll, ("BT read 0x8e0 (BIT24)= 0x%x\n", u4tmp));
+				retval = (u4tmp & BIT24) ? eRfOn : eRfOff;
+				RTPRINT(FBT, BT_RFPoll, ("BT check RF state to %s\n", (retval==eRfOn)? "ON":"OFF"));
+			}
+		}
+		else
+#endif
+		{
+			write_nic_byte(dev, MAC_PINMUX_CFG, (GPIOMUX_EN | GPIOSEL_GPIO));
+			u1Tmp = read_nic_byte(dev, GPIO_IO_SEL);
+
+			u1Tmp &= HAL_8192S_HW_GPIO_OFF_MASK;
+			write_nic_byte(dev, GPIO_IO_SEL, u1Tmp);
+
+			mdelay(10);
+
+			u1Tmp = read_nic_byte(dev, GPIO_IN);
+			retval = (u1Tmp & HAL_8192S_HW_GPIO_OFF_BIT) ? eRfOn : eRfOff;
+		}
+	}
+
+	return retval;
+}
+
+extern void dm_CheckRfCtrlGPIO(void *data)
+{
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
+	struct r8192_priv *priv = container_of_dwork_rsl(data,struct r8192_priv,gpio_change_rf_wq);
+	struct net_device *dev = priv->rtllib->dev;
+#else
+	struct net_device *dev = (struct net_device *)data;
+	struct r8192_priv *priv = rtllib_priv(dev);
+#endif
+
+	RT_RF_POWER_STATE	eRfPowerStateToSet, CurRfState;
+	bool					bActuallySet = false;
+	PRT_POWER_SAVE_CONTROL		pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
+	unsigned long flag = 0;
+	bool			turnonbypowerdomain = false;
+
+
+#ifdef CONFIG_RTL_RFKILL
+	return;
+#endif	
+	if((priv->up_first_time == 1) || (priv->being_init_adapter))
+	{
+		;
+		return;
+	}
+
+	if(priv->ResetProgress == RESET_TYPE_SILENT)
+	{
+		RT_TRACE((COMP_INIT | COMP_POWER | COMP_RF), "GPIOChangeRFWorkItemCallBack(): Silent Reseting!!!!!!!\n");
+		return;
+	}
+
+
+	if (pPSC->bSwRfProcessing) 
+	{
+		RT_TRACE(COMP_SCAN, "GPIOChangeRFWorkItemCallBack(): Rf is in switching state.\n");
+		return;
+	}
+
+	RT_TRACE(COMP_RF, "GPIOChangeRFWorkItemCallBack() ---------> \n");
+
+	spin_lock_irqsave(&priv->rf_ps_lock,flag);
+	if (priv->RFChangeInProgress) {
+		spin_unlock_irqrestore(&priv->rf_ps_lock,flag);
+		RT_TRACE(COMP_RF, "GPIOChangeRFWorkItemCallBack(): RF Change in progress! \n");
+		return;
+	} else {
+		priv->RFChangeInProgress = true;
+		spin_unlock_irqrestore(&priv->rf_ps_lock,flag);
+	}
+	CurRfState = priv->rtllib->eRFPowerState;
+#ifdef CONFIG_ASPM_OR_D3
+	if((pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_ASPM) && RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_ASPM))
+	{
+		RT_DISABLE_ASPM(dev);
+		RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_ASPM);
+	}
+	else if((pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_PCI_D3) && RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_PCI_D3))
+	{
+#ifdef TODO		
+		RT_LEAVE_D3(dev, false);
+		RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_PCI_D3);
+#endif		
+	}
+
+#endif
+	if(RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC))
+	{
+		Power_DomainInit92SE(dev);
+		turnonbypowerdomain = true;
+	}
+
+	eRfPowerStateToSet = RfOnOffDetect(dev);
+	if (priv->bResetInProgress) {
+		spin_lock_irqsave(&priv->rf_ps_lock,flag);
+		priv->RFChangeInProgress = false;
+		spin_unlock_irqrestore(&priv->rf_ps_lock,flag);
+		return;
+	}
+
+	if( (priv->bHwRadioOff == true) && \
+	   (((eRfPowerStateToSet == eRfOn)&&(priv->sw_radio_on == true))
+#ifdef CONFIG_RTLWIFI_DEBUGFS	    
+	    ||priv->debug->hw_holding
+#endif	    
+	    ))
+	{
+		RT_TRACE(COMP_RF, "GPIOChangeRF  - HW Radio ON, RF ON\n");
+		printk("GPIOChangeRF  - HW Radio ON, RF ON\n");
+                eRfPowerStateToSet = eRfOn;
+		bActuallySet = true;
+	} else if ((priv->bHwRadioOff == false) && 
+		 ((eRfPowerStateToSet == eRfOff) || (priv->sw_radio_on == false)))
+	{
+		RT_TRACE(COMP_RF, "GPIOChangeRF  - HW Radio OFF\n");
+		printk("GPIOChangeRF  - HW Radio OFF\n");
+                eRfPowerStateToSet = eRfOff;
+		bActuallySet = true;
+	}
+
+	if (bActuallySet) {
+		priv->bHwRfOffAction = 1;
+#ifdef CONFIG_ASPM_OR_D3
+		if(eRfPowerStateToSet == eRfOn)
+		{
+			if((pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_ASPM) && RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_ASPM))
+			{
+				RT_DISABLE_ASPM(dev);
+				RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_ASPM);
+			}
+#ifdef TODO			
+			else if((pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_PCI_D3) && RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_PCI_D3))
+			{
+				RT_LEAVE_D3(dev, false);
+				RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_PCI_D3);
+			}
+#endif			
+		}
+#endif
+		spin_lock_irqsave(&priv->rf_ps_lock,flag);
+		priv->RFChangeInProgress = false;
+		spin_unlock_irqrestore(&priv->rf_ps_lock,flag);
+		MgntActSet_RF_State(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW);
+
+		{
+#ifdef CONFIG_CFG_80211			
+			struct wireless_dev *wdev = &priv->rtllib->wdev;
+			wiphy_rfkill_set_hw_state(wdev->wiphy, priv->bHwRadioOff);
+#else
+			char *argv[3];
+			static char *RadioPowerPath = "/etc/acpi/events/RadioPower.sh";
+			static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL};
+
+			if(priv->bHwRadioOff == true)
+				argv[1] = "RFOFF";
+			else
+				argv[1] = "RFON";
+
+			argv[0] = RadioPowerPath;
+			argv[2] = NULL;
+			call_usermodehelper(RadioPowerPath,argv,envp,1);
+
+#endif			
+		}
+
+		if(eRfPowerStateToSet == eRfOff)
+		{
+			if(priv->pwrdown){
+
+				write_nic_byte(dev, SYS_FUNC_EN+1, 0x31);
+			}
+#ifdef CONFIG_ASPM_OR_D3
+			if(pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_ASPM)
+			{
+				RT_ENABLE_ASPM(dev);
+				RT_SET_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_ASPM);
+			}
+#ifdef TODO			
+			else if(pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_PCI_D3)
+			{
+				RT_ENTER_D3(dev, false);
+				RT_SET_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_PCI_D3);
+			}
+#endif			
+#endif
+		}
+	}
+	else if(eRfPowerStateToSet == eRfOff || CurRfState == eRfOff || priv->bDriverIsGoingToUnload)
+	{
+
+		if(pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_HALT_NIC && turnonbypowerdomain)
+		{ 
+			PHY_SetRtl8192seRfHalt(dev);
+			RT_SET_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC);
+		}
+#ifdef CONFIG_ASPM_OR_D3
+		if(pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_ASPM)
+		{
+			RT_ENABLE_ASPM(dev);
+			RT_SET_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_ASPM);
+		}
+#ifdef TODO		
+		else if(pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_PCI_D3)
+		{
+			RT_ENTER_D3(dev, false);
+			RT_SET_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_PCI_D3);
+		}
+#endif		
+#endif
+		spin_lock_irqsave(&priv->rf_ps_lock,flag);
+		priv->RFChangeInProgress = false;
+		spin_unlock_irqrestore(&priv->rf_ps_lock,flag);
+	}
+	else
+	{
+		spin_lock_irqsave(&priv->rf_ps_lock,flag);
+		priv->RFChangeInProgress = false;
+		spin_unlock_irqrestore(&priv->rf_ps_lock,flag);
+	}
+	RT_TRACE(COMP_RF, "GPIOChangeRFWorkItemCallBack() <--------- \n");
+}
+#endif
+void	dm_rf_pathcheck_workitemcallback(void *data)
+{
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
+	struct r8192_priv *priv = container_of_dwork_rsl(data,struct r8192_priv,rfpath_check_wq);
+	struct net_device *dev =priv->rtllib->dev;
+#else
+	struct net_device *dev = (struct net_device *)data;
+	struct r8192_priv *priv = rtllib_priv(dev);
+#endif
+	u8 rfpath = 0, i;
+	
+		
+	rfpath = read_nic_byte(dev, 0xc04);
+	
+	for (i = 0; i < RF90_PATH_MAX; i++)
+	{
+		if (rfpath & (0x01<<i))		
+			priv->brfpath_rxenable[i] = 1;
+		else
+			priv->brfpath_rxenable[i] = 0;
+	}
+	if(!DM_RxPathSelTable.Enable)
+		return;
+
+	dm_rxpath_sel_byrssi(dev);
+}	
+
+static void dm_init_rxpath_selection(struct net_device * dev)
+{
+	u8 i;
+	struct r8192_priv *priv = rtllib_priv(dev);
+	DM_RxPathSelTable.Enable = 1;	
+	DM_RxPathSelTable.SS_TH_low = RxPathSelection_SS_TH_low;
+	DM_RxPathSelTable.diff_TH = RxPathSelection_diff_TH;
+	if(priv->CustomerID == RT_CID_819x_Netcore)
+		DM_RxPathSelTable.cck_method = CCK_Rx_Version_2;
+	else	
+		DM_RxPathSelTable.cck_method = CCK_Rx_Version_1;
+	DM_RxPathSelTable.DbgMode = DM_DBG_OFF;
+	DM_RxPathSelTable.disabledRF = 0;
+	for(i=0; i<4; i++)
+	{
+		DM_RxPathSelTable.rf_rssi[i] = 50;
+		DM_RxPathSelTable.cck_pwdb_sta[i] = -64;
+		DM_RxPathSelTable.rf_enable_rssi_th[i] = 100;
+	}
+}
+
+static void dm_rxpath_sel_byrssi(struct net_device * dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u8				i, max_rssi_index=0, min_rssi_index=0, sec_rssi_index=0, rf_num=0;
+	u8				tmp_max_rssi=0, tmp_min_rssi=0, tmp_sec_rssi=0;
+	u8				cck_default_Rx=0x2;	
+	u8				cck_optional_Rx=0x3;
+	long				tmp_cck_max_pwdb=0, tmp_cck_min_pwdb=0, tmp_cck_sec_pwdb=0;
+	u8				cck_rx_ver2_max_index=0, cck_rx_ver2_min_index=0, cck_rx_ver2_sec_index=0;
+	u8				cur_rf_rssi;
+	long				cur_cck_pwdb;
+	static u8			disabled_rf_cnt=0, cck_Rx_Path_initialized=0;
+	u8				update_cck_rx_path;
+
+	if(priv->rf_type != RF_2T4R)
+		return;
+
+	if(!cck_Rx_Path_initialized)
+	{
+		DM_RxPathSelTable.cck_Rx_path = (read_nic_byte(dev, 0xa07)&0xf);
+		cck_Rx_Path_initialized = 1;
+	}
+	
+	DM_RxPathSelTable.disabledRF = 0xf;
+	DM_RxPathSelTable.disabledRF &=~ (read_nic_byte(dev, 0xc04));
+
+	if(priv->rtllib->mode == WIRELESS_MODE_B)
+	{
+		DM_RxPathSelTable.cck_method = CCK_Rx_Version_2;	
+	}
+
+	for (i=0; i<RF90_PATH_MAX; i++)
+	{
+		if(!DM_RxPathSelTable.DbgMode)
+			DM_RxPathSelTable.rf_rssi[i] = priv->stats.rx_rssi_percentage[i];
+
+		if(priv->brfpath_rxenable[i])
+		{
+			rf_num++;
+			cur_rf_rssi = DM_RxPathSelTable.rf_rssi[i];
+			
+			if(rf_num == 1)	
+			{	
+				max_rssi_index = min_rssi_index = sec_rssi_index = i;
+				tmp_max_rssi = tmp_min_rssi = tmp_sec_rssi = cur_rf_rssi;
+			}
+			else if(rf_num == 2)
+			{	
+				if(cur_rf_rssi >= tmp_max_rssi)
+				{
+					tmp_max_rssi = cur_rf_rssi;
+					max_rssi_index = i;
+				}
+				else
+				{
+					tmp_sec_rssi = tmp_min_rssi = cur_rf_rssi;
+					sec_rssi_index = min_rssi_index = i;					
+				}
+			}
+			else
+			{
+				if(cur_rf_rssi > tmp_max_rssi)
+				{
+					tmp_sec_rssi = tmp_max_rssi;
+					sec_rssi_index = max_rssi_index;
+					tmp_max_rssi = cur_rf_rssi;
+					max_rssi_index = i;
+				}
+				else if(cur_rf_rssi == tmp_max_rssi)
+				{	
+					tmp_sec_rssi = cur_rf_rssi;
+					sec_rssi_index = i;
+				}
+				else if((cur_rf_rssi < tmp_max_rssi) &&(cur_rf_rssi > tmp_sec_rssi))
+				{
+					tmp_sec_rssi = cur_rf_rssi;
+					sec_rssi_index = i;
+				}
+				else if(cur_rf_rssi == tmp_sec_rssi)
+				{
+					if(tmp_sec_rssi == tmp_min_rssi)
+					{	
+						tmp_sec_rssi = cur_rf_rssi;
+						sec_rssi_index = i;
+					}
+					else
+					{
+					}
+				}
+				else if((cur_rf_rssi < tmp_sec_rssi) && (cur_rf_rssi > tmp_min_rssi))
+				{
+				}
+				else if(cur_rf_rssi == tmp_min_rssi)
+				{
+					if(tmp_sec_rssi == tmp_min_rssi)
+					{	
+						tmp_min_rssi = cur_rf_rssi;
+						min_rssi_index = i;
+					}
+					else
+					{
+					}
+				}
+				else if(cur_rf_rssi < tmp_min_rssi)
+				{
+					tmp_min_rssi = cur_rf_rssi;
+					min_rssi_index = i;
+				}
+			}
+		}
+	}
+
+	rf_num = 0;
+	if(DM_RxPathSelTable.cck_method == CCK_Rx_Version_2)
+	{
+		for (i=0; i<RF90_PATH_MAX; i++)
+		{
+			if(priv->brfpath_rxenable[i])
+			{
+				rf_num++;
+				cur_cck_pwdb =  DM_RxPathSelTable.cck_pwdb_sta[i];
+				
+				if(rf_num == 1)	
+				{	
+					cck_rx_ver2_max_index = cck_rx_ver2_min_index = cck_rx_ver2_sec_index = i;
+					tmp_cck_max_pwdb = tmp_cck_min_pwdb = tmp_cck_sec_pwdb = cur_cck_pwdb;
+				}
+				else if(rf_num == 2)
+				{	
+					if(cur_cck_pwdb >= tmp_cck_max_pwdb)
+					{
+						tmp_cck_max_pwdb = cur_cck_pwdb;
+						cck_rx_ver2_max_index = i;
+					}
+					else
+					{
+						tmp_cck_sec_pwdb = tmp_cck_min_pwdb = cur_cck_pwdb;
+						cck_rx_ver2_sec_index = cck_rx_ver2_min_index = i;					
+					}
+				}
+				else
+				{
+					if(cur_cck_pwdb > tmp_cck_max_pwdb)
+					{
+						tmp_cck_sec_pwdb = tmp_cck_max_pwdb;
+						cck_rx_ver2_sec_index = cck_rx_ver2_max_index;
+						tmp_cck_max_pwdb = cur_cck_pwdb;
+						cck_rx_ver2_max_index = i;
+					}
+					else if(cur_cck_pwdb == tmp_cck_max_pwdb)
+					{	
+						tmp_cck_sec_pwdb = cur_cck_pwdb;
+						cck_rx_ver2_sec_index = i;
+					}
+					else if((cur_cck_pwdb < tmp_cck_max_pwdb) &&(cur_cck_pwdb > tmp_cck_sec_pwdb))
+					{
+						tmp_cck_sec_pwdb = cur_cck_pwdb;
+						cck_rx_ver2_sec_index = i;
+					}
+					else if(cur_cck_pwdb == tmp_cck_sec_pwdb)
+					{
+						if(tmp_cck_sec_pwdb == tmp_cck_min_pwdb)
+						{	
+							tmp_cck_sec_pwdb = cur_cck_pwdb;
+							cck_rx_ver2_sec_index = i;
+						}
+						else
+						{
+						}
+					}
+					else if((cur_cck_pwdb < tmp_cck_sec_pwdb) && (cur_cck_pwdb > tmp_cck_min_pwdb))
+					{
+					}
+					else if(cur_cck_pwdb == tmp_cck_min_pwdb)
+					{
+						if(tmp_cck_sec_pwdb == tmp_cck_min_pwdb)
+						{	
+							tmp_cck_min_pwdb = cur_cck_pwdb;
+							cck_rx_ver2_min_index = i;
+						}
+						else
+						{
+						}
+					}
+					else if(cur_cck_pwdb < tmp_cck_min_pwdb)
+					{
+						tmp_cck_min_pwdb = cur_cck_pwdb;
+						cck_rx_ver2_min_index = i;
+					}
+				}
+			
+			}
+		}
+	}
+
+
+	update_cck_rx_path = 0;
+	if(DM_RxPathSelTable.cck_method == CCK_Rx_Version_2)
+	{
+		cck_default_Rx = cck_rx_ver2_max_index;
+		cck_optional_Rx = cck_rx_ver2_sec_index;
+		if(tmp_cck_max_pwdb != -64)
+			update_cck_rx_path = 1;
+	}
+
+	if(tmp_min_rssi < DM_RxPathSelTable.SS_TH_low && disabled_rf_cnt < 2)
+	{
+		if((tmp_max_rssi - tmp_min_rssi) >= DM_RxPathSelTable.diff_TH)
+		{
+			DM_RxPathSelTable.rf_enable_rssi_th[min_rssi_index] = tmp_max_rssi+5;
+			rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0x1<<min_rssi_index, 0x0);	
+			rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0x1<<min_rssi_index, 0x0);	
+			disabled_rf_cnt++;
+		}
+		if(DM_RxPathSelTable.cck_method == CCK_Rx_Version_1)
+		{
+			cck_default_Rx = max_rssi_index;
+			cck_optional_Rx = sec_rssi_index;
+			if(tmp_max_rssi)
+				update_cck_rx_path = 1;
+		}
+	}
+
+	if(update_cck_rx_path)
+	{
+		DM_RxPathSelTable.cck_Rx_path = (cck_default_Rx<<2)|(cck_optional_Rx);
+		rtl8192_setBBreg(dev, rCCK0_AFESetting, 0x0f000000, DM_RxPathSelTable.cck_Rx_path);
+	}
+	
+	if(DM_RxPathSelTable.disabledRF)
+	{
+		for(i=0; i<4; i++)
+		{
+			if((DM_RxPathSelTable.disabledRF>>i) & 0x1)	
+			{
+				if(tmp_max_rssi >= DM_RxPathSelTable.rf_enable_rssi_th[i])
+				{
+					rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0x1<<i, 0x1);	
+					rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0x1<<i, 0x1);	
+					DM_RxPathSelTable.rf_enable_rssi_th[i] = 100;
+					disabled_rf_cnt--;
+				}
+			}
+		}
+	}
+}
+
+static	void	dm_check_rx_path_selection(struct net_device *dev)
+{	
+	struct r8192_priv *priv = rtllib_priv(dev);
+	queue_delayed_work_rsl(priv->priv_wq,&priv->rfpath_check_wq,0);
+}	
+
+
+static void dm_init_fsync (struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+
+	priv->rtllib->fsync_time_interval = 500;
+	priv->rtllib->fsync_rate_bitmap = 0x0f000800;
+	priv->rtllib->fsync_rssi_threshold = 30;
+#ifdef RTL8190P
+	priv->rtllib->bfsync_enable = true;
+#elif defined RTL8192E || defined RTL8192SE
+	priv->rtllib->bfsync_enable = false;
+#endif
+	priv->rtllib->fsync_multiple_timeinterval = 3;
+	priv->rtllib->fsync_firstdiff_ratethreshold= 100;
+	priv->rtllib->fsync_seconddiff_ratethreshold= 200;
+	priv->rtllib->fsync_state = Default_Fsync;
+
+#ifdef RTL8192SE
+	priv->framesyncMonitor = 0;	
+#elif defined RTL8192E || defined RTL8190P
+	priv->framesyncMonitor = 1;	
+#endif
+
+	setup_timer(&priv->fsync_timer, dm_fsync_timer_callback,(unsigned long) dev);
+}
+
+
+static void dm_deInit_fsync(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	del_timer_sync(&priv->fsync_timer);
+}
+
+extern void dm_fsync_timer_callback(unsigned long data)
+{
+	struct net_device *dev = (struct net_device *)data;
+	struct r8192_priv *priv = rtllib_priv((struct net_device *)data);
+	u32 rate_index, rate_count = 0, rate_count_diff=0;
+	bool		bSwitchFromCountDiff = false;
+	bool		bDoubleTimeInterval = false;
+	
+	if(	priv->rtllib->state == RTLLIB_LINKED && 
+		priv->rtllib->bfsync_enable &&
+		(priv->rtllib->pHTInfo->IOTAction & HT_IOT_ACT_CDD_FSYNC))
+	{	
+		u32 rate_bitmap;
+		for(rate_index = 0; rate_index <= 27; rate_index++)
+		{
+			rate_bitmap  = 1 << rate_index;
+			if(priv->rtllib->fsync_rate_bitmap &  rate_bitmap)
+		 		rate_count+= priv->stats.received_rate_histogram[1][rate_index];
+		}	
+
+		if(rate_count < priv->rate_record)
+			rate_count_diff = 0xffffffff - rate_count + priv->rate_record;
+		else	
+			rate_count_diff = rate_count - priv->rate_record;
+		if(rate_count_diff < priv->rateCountDiffRecord)
+		{
+			
+			u32 DiffNum = priv->rateCountDiffRecord - rate_count_diff;
+			if(DiffNum >= priv->rtllib->fsync_seconddiff_ratethreshold)
+				priv->ContiuneDiffCount++;
+			else
+				priv->ContiuneDiffCount = 0;	
+			
+			if(priv->ContiuneDiffCount >=2)
+			{
+				bSwitchFromCountDiff = true;
+				priv->ContiuneDiffCount = 0;					
+			}				
+		}	
+		else
+		{
+			priv->ContiuneDiffCount = 0;
+		}	
+
+		if(rate_count_diff <= priv->rtllib->fsync_firstdiff_ratethreshold)
+		{
+			bSwitchFromCountDiff = true;
+			priv->ContiuneDiffCount = 0;
+		}	
+		priv->rate_record = rate_count;
+		priv->rateCountDiffRecord = rate_count_diff;
+		RT_TRACE(COMP_HALDM, "rateRecord %d rateCount %d, rateCountdiff %d bSwitchFsync %d\n", priv->rate_record, rate_count, rate_count_diff , priv->bswitch_fsync);
+		if(priv->undecorated_smoothed_pwdb > priv->rtllib->fsync_rssi_threshold && bSwitchFromCountDiff)
+		{
+			bDoubleTimeInterval = true;
+			priv->bswitch_fsync = !priv->bswitch_fsync;
+			if(priv->bswitch_fsync)
+			{		
+			#ifdef RTL8190P
+				write_nic_byte(dev,0xC36, 0x00);
+#elif defined RTL8192E
+				write_nic_byte(dev,0xC36, 0x1c);
+			#endif
+				write_nic_byte(dev, 0xC3e, 0x90);
+			}	
+			else
+			{
+			#ifdef RTL8190P
+				write_nic_byte(dev, 0xC36, 0x40);
+			#else
+				write_nic_byte(dev, 0xC36, 0x5c);
+			#endif
+				write_nic_byte(dev, 0xC3e, 0x96);
+			}	
+		}
+		else if(priv->undecorated_smoothed_pwdb <= priv->rtllib->fsync_rssi_threshold)
+		{
+			if(priv->bswitch_fsync)
+			{
+				priv->bswitch_fsync  = false;		
+			#ifdef RTL8190P
+				write_nic_byte(dev, 0xC36, 0x40);
+#elif defined RTL8192E
+				write_nic_byte(dev, 0xC36, 0x5c);
+			#endif
+				write_nic_byte(dev, 0xC3e, 0x96);			
+			}	
+		}
+		if(bDoubleTimeInterval){
+			if(timer_pending(&priv->fsync_timer))
+				del_timer_sync(&priv->fsync_timer);
+			priv->fsync_timer.expires = jiffies + MSECS(priv->rtllib->fsync_time_interval*priv->rtllib->fsync_multiple_timeinterval);
+			add_timer(&priv->fsync_timer);
+		}
+		else{
+			if(timer_pending(&priv->fsync_timer))
+				del_timer_sync(&priv->fsync_timer);
+			priv->fsync_timer.expires = jiffies + MSECS(priv->rtllib->fsync_time_interval);
+			add_timer(&priv->fsync_timer);
+		}
+	}	
+	else
+	{
+		if(priv->bswitch_fsync)
+		{
+			priv->bswitch_fsync  = false;
+		#ifdef RTL8190P
+			write_nic_byte(dev, 0xC36, 0x40);
+#elif defined RTL8192E
+			write_nic_byte(dev, 0xC36, 0x5c);
+		#endif
+			write_nic_byte(dev, 0xC3e, 0x96);
+		}	
+		priv->ContiuneDiffCount = 0;
+	#ifdef RTL8190P
+		write_nic_dword(dev, rOFDM0_RxDetector2, 0x164052cd);
+#elif defined RTL8192E
+		write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c52cd);
+	#endif
+	}
+	RT_TRACE(COMP_HALDM, "ContiuneDiffCount %d\n", priv->ContiuneDiffCount);
+	RT_TRACE(COMP_HALDM, "rateRecord %d rateCount %d, rateCountdiff %d bSwitchFsync %d\n", priv->rate_record, rate_count, rate_count_diff , priv->bswitch_fsync);
+}
+
+static void dm_StartHWFsync(struct net_device *dev)
+{
+	RT_TRACE(COMP_HALDM, "%s\n", __FUNCTION__);
+#if defined RTL8192E 
+	write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c12cf);
+	write_nic_byte(dev, 0xc3b, 0x41);
+#elif defined RTL8192SE
+	write_nic_byte(dev, rOFDM0_RxDetector3, 0x96);
+#endif
+}
+
+static void dm_EndHWFsync(struct net_device *dev)
+{
+	RT_TRACE(COMP_HALDM,"%s\n", __FUNCTION__);
+#if defined RTL8192E 
+	write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c52cd);
+	write_nic_byte(dev, 0xc3b, 0x49);
+#elif defined RTL8192SE
+	write_nic_byte(dev, rOFDM0_RxDetector3, 0x94);
+#endif
+	
+}
+
+static void dm_EndSWFsync(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+
+	RT_TRACE(COMP_HALDM, "%s\n", __FUNCTION__);
+	del_timer_sync(&(priv->fsync_timer));
+
+	if(priv->bswitch_fsync)
+	{
+		priv->bswitch_fsync  = false;
+
+		#ifdef RTL8190P
+			write_nic_byte(dev, 0xC36, 0x40);
+#elif defined RTL8192E
+		write_nic_byte(dev, 0xC36, 0x5c);
+#endif
+
+		write_nic_byte(dev, 0xC3e, 0x96);				
+	}		
+				
+	priv->ContiuneDiffCount = 0;
+#ifdef RTL8192E
+	write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c52cd);
+#endif
+
+}
+
+static void dm_StartSWFsync(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u32 			rateIndex;
+	u32 			rateBitmap;	
+
+	RT_TRACE(COMP_HALDM,"%s\n", __FUNCTION__);
+	priv->rate_record = 0;
+	priv->ContiuneDiffCount = 0;
+	priv->rateCountDiffRecord = 0;
+	priv->bswitch_fsync  = false;
+
+	if(priv->rtllib->mode == WIRELESS_MODE_N_24G)
+	{
+		priv->rtllib->fsync_firstdiff_ratethreshold= 600;
+		priv->rtllib->fsync_seconddiff_ratethreshold = 0xffff;
+	}	
+	else
+	{
+		priv->rtllib->fsync_firstdiff_ratethreshold= 200;
+		priv->rtllib->fsync_seconddiff_ratethreshold = 200;
+	}	
+	for(rateIndex = 0; rateIndex <= 27; rateIndex++)
+	{
+		rateBitmap  = 1 << rateIndex;
+		if(priv->rtllib->fsync_rate_bitmap &  rateBitmap)
+			priv->rate_record += priv->stats.received_rate_histogram[1][rateIndex];
+	}	
+	if(timer_pending(&priv->fsync_timer))
+		del_timer_sync(&priv->fsync_timer);
+	priv->fsync_timer.expires = jiffies + MSECS(priv->rtllib->fsync_time_interval);
+	add_timer(&priv->fsync_timer);
+	
+#ifdef RTL8192E
+	write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c12cd);		
+#endif
+
+}
+
+void dm_check_fsync(struct net_device *dev)
+{
+#define	RegC38_Default				0
+#define	RegC38_NonFsync_Other_AP	1
+#define	RegC38_Fsync_AP_BCM		2
+	struct r8192_priv *priv = rtllib_priv(dev);
+	static u8		reg_c38_State=RegC38_Default;
+	static u32	reset_cnt=0;
+	
+	RT_TRACE(COMP_HALDM, "RSSI %d TimeInterval %d MultipleTimeInterval %d\n", priv->rtllib->fsync_rssi_threshold, priv->rtllib->fsync_time_interval, priv->rtllib->fsync_multiple_timeinterval);	
+	RT_TRACE(COMP_HALDM, "RateBitmap 0x%x FirstDiffRateThreshold %d SecondDiffRateThreshold %d\n", priv->rtllib->fsync_rate_bitmap, priv->rtllib->fsync_firstdiff_ratethreshold, priv->rtllib->fsync_seconddiff_ratethreshold);	
+	
+	if(	priv->rtllib->state == RTLLIB_LINKED && 
+		(priv->rtllib->pHTInfo->IOTAction & HT_IOT_ACT_CDD_FSYNC))
+	{
+		if(priv->rtllib->bfsync_enable == 0)
+		{
+			switch(priv->rtllib->fsync_state)
+			{
+				case Default_Fsync:
+					dm_StartHWFsync(dev);
+					priv->rtllib->fsync_state = HW_Fsync;
+					break;
+				case SW_Fsync:
+					dm_EndSWFsync(dev);
+					dm_StartHWFsync(dev);
+					priv->rtllib->fsync_state = HW_Fsync;
+					break;
+				case HW_Fsync:
+				default:
+					break;
+			}	
+		}
+		else
+		{
+			switch(priv->rtllib->fsync_state)
+			{
+				case Default_Fsync:
+					dm_StartSWFsync(dev);
+					priv->rtllib->fsync_state = SW_Fsync;
+					break;
+				case HW_Fsync:
+					dm_EndHWFsync(dev);
+					dm_StartSWFsync(dev);
+					priv->rtllib->fsync_state = SW_Fsync;
+					break;
+				case SW_Fsync:
+				default:
+					break;
+
+			}	
+		}
+		if(priv->framesyncMonitor)
+		{
+			if(reg_c38_State != RegC38_Fsync_AP_BCM)
+			{	
+				#ifdef RTL8190P
+					write_nic_byte(dev, rOFDM0_RxDetector3, 0x15);
+				#else
+					write_nic_byte(dev, rOFDM0_RxDetector3, 0x95);
+				#endif
+				
+				reg_c38_State = RegC38_Fsync_AP_BCM;
+			}
+		}
+	}
+	else
+	{
+		switch(priv->rtllib->fsync_state)
+		{
+			case HW_Fsync:
+				dm_EndHWFsync(dev);
+				priv->rtllib->fsync_state = Default_Fsync;
+				break;
+			case SW_Fsync:
+				dm_EndSWFsync(dev);
+				priv->rtllib->fsync_state = Default_Fsync;
+				break;
+			case Default_Fsync:
+			default:
+				break;
+		}
+		
+		if(priv->framesyncMonitor)
+		{
+			if(priv->rtllib->state == RTLLIB_LINKED)
+			{
+				if(priv->undecorated_smoothed_pwdb <= RegC38_TH)
+				{
+					if(reg_c38_State != RegC38_NonFsync_Other_AP)
+					{
+						#ifdef RTL8190P
+							write_nic_byte(dev, rOFDM0_RxDetector3, 0x10);
+						#else
+							write_nic_byte(dev, rOFDM0_RxDetector3, 0x90);
+						#endif
+						
+						reg_c38_State = RegC38_NonFsync_Other_AP;
+					#if 0
+						if (dev->HardwareType == HARDWARE_TYPE_RTL8190P)
+							DbgPrint("Fsync is idle, rssi<=35, write 0xc38 = 0x%x \n", 0x10);
+						else
+							DbgPrint("Fsync is idle, rssi<=35, write 0xc38 = 0x%x \n", 0x90);
+					#endif
+					}
+				}
+				else if(priv->undecorated_smoothed_pwdb >= (RegC38_TH+5))
+				{
+					if(reg_c38_State)
+					{
+						write_nic_byte(dev, rOFDM0_RxDetector3, priv->framesync);
+						reg_c38_State = RegC38_Default;
+					}	
+				}
+			}
+			else
+			{
+				if(reg_c38_State)
+				{
+					write_nic_byte(dev, rOFDM0_RxDetector3, priv->framesync);
+					reg_c38_State = RegC38_Default;
+				}
+			}
+		}
+	}	
+	if(priv->framesyncMonitor)
+	{
+		if(priv->reset_count != reset_cnt)
+		{	
+			write_nic_byte(dev, rOFDM0_RxDetector3, priv->framesync);
+			reg_c38_State = RegC38_Default;
+			reset_cnt = priv->reset_count;
+		}
+	}
+	else
+	{
+		if(reg_c38_State)
+		{
+			write_nic_byte(dev, rOFDM0_RxDetector3, priv->framesync);
+			reg_c38_State = RegC38_Default;
+		}
+	}		
+}
+
+#if 0
+extern	s1Byte	DM_CheckLBusStatus(IN	PADAPTER	dev)
+{
+	PMGNT_INFO	pMgntInfo=&dev->MgntInfo;
+
+#if (HAL_CODE_BASE & RTL819X)
+	
+#if (HAL_CODE_BASE == RTL8192)
+
+#if( DEV_BUS_TYPE==PCI_INTERFACE)
+	return true;
+#endif
+
+#if( DEV_BUS_TYPE==USB_INTERFACE)
+	return true;
+#endif
+
+#endif	
+
+#if (HAL_CODE_BASE == RTL8190)
+	return true;
+#endif	
+
+#endif	
+}	
+
+#endif
+
+extern void dm_shadow_init(struct net_device *dev)
+{
+	u8	page;
+	u16	offset;
+
+	for (page = 0; page < 5; page++)
+		for (offset = 0; offset < 256; offset++)
+		{
+			dm_shadow[page][offset] = read_nic_byte(dev, offset+page*256);
+		}
+
+	for (page = 8; page < 11; page++)
+		for (offset = 0; offset < 256; offset++)
+			dm_shadow[page][offset] = read_nic_byte(dev, offset+page*256);
+
+	for (page = 12; page < 15; page++)
+		for (offset = 0; offset < 256; offset++)
+			dm_shadow[page][offset] = read_nic_byte(dev, offset+page*256);
+
+}   
+
+/*---------------------------Define function prototype------------------------*/
+static void dm_init_dynamic_txpower(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+#ifdef RTL8192SE
+	if(((priv->pFirmware->FirmwareVersion) >= 60) && 
+		(priv->DM_Type == DM_Type_ByDriver)){
+		priv->rtllib->bdynamic_txpower_enable = true; 
+		RT_TRACE(COMP_INIT, "Dynamic Tx Power is enabled by Driver \n");
+	} else {
+		priv->rtllib->bdynamic_txpower_enable = false; 
+		RT_TRACE(COMP_INIT, "Dynamic Tx Power is enabled by FW \n");
+	}
+	
+	priv->LastDTPLvl = TxHighPwrLevel_Normal;
+	priv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
+	
+#elif defined RTL8190P || defined RTL8192E
+	priv->rtllib->bdynamic_txpower_enable = true;    
+	priv->bLastDTPFlag_High = false;
+	priv->bLastDTPFlag_Low = false;
+	priv->bDynamicTxHighPower = false;
+	priv->bDynamicTxLowPower = false;
+#endif
+}
+
+#if defined RTL8190P || defined RTL8192E
+static void dm_dynamic_txpower(struct net_device *dev)
+{	
+	struct r8192_priv *priv = rtllib_priv(dev);
+	unsigned int txhipower_threshhold=0;	
+        unsigned int txlowpower_threshold=0;
+	if(priv->rtllib->bdynamic_txpower_enable != true)
+	{
+		priv->bDynamicTxHighPower = false;
+		priv->bDynamicTxLowPower = false;
+		return;
+	}
+        if((priv->rtllib->pHTInfo->IOTPeer == HT_IOT_PEER_ATHEROS) && (priv->rtllib->mode == IEEE_G)){
+		txhipower_threshhold = TX_POWER_ATHEROAP_THRESH_HIGH;
+		txlowpower_threshold = TX_POWER_ATHEROAP_THRESH_LOW;
+	}
+	else
+	{
+		txhipower_threshhold = TX_POWER_NEAR_FIELD_THRESH_HIGH;
+		txlowpower_threshold = TX_POWER_NEAR_FIELD_THRESH_LOW; 
+	}
+
+
+	RT_TRACE(COMP_TXAGC,"priv->undecorated_smoothed_pwdb = %ld \n" , priv->undecorated_smoothed_pwdb);
+
+	if(priv->rtllib->state == RTLLIB_LINKED)
+	{
+		if(priv->undecorated_smoothed_pwdb >= txhipower_threshhold)
+		{
+			priv->bDynamicTxHighPower = true;
+			priv->bDynamicTxLowPower = false;
+		}
+		else
+		{
+			if(priv->undecorated_smoothed_pwdb < txlowpower_threshold && priv->bDynamicTxHighPower == true)
+			{
+				priv->bDynamicTxHighPower = false;
+			}
+			if(priv->undecorated_smoothed_pwdb < 35)
+			{
+				priv->bDynamicTxLowPower = true;
+			}
+			else if(priv->undecorated_smoothed_pwdb >= 40)
+			{
+				priv->bDynamicTxLowPower = false;
+			}
+		}
+	}
+	else
+	{
+		priv->bDynamicTxHighPower = false;
+		priv->bDynamicTxLowPower = false;
+	}
+
+	if( (priv->bDynamicTxHighPower != priv->bLastDTPFlag_High ) ||
+		(priv->bDynamicTxLowPower != priv->bLastDTPFlag_Low ) )
+	{
+		RT_TRACE(COMP_TXAGC,"SetTxPowerLevel8190()  channel = %d \n" , priv->rtllib->current_network.channel);
+		
+		rtl8192_phy_setTxPower(dev,priv->rtllib->current_network.channel); 
+	}
+	priv->bLastDTPFlag_High = priv->bDynamicTxHighPower;
+	priv->bLastDTPFlag_Low = priv->bDynamicTxLowPower;
+
+}	
+#elif defined RTL8192SE
+static void dm_dynamic_txpower(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	long				UndecoratedSmoothedPWDB;
+
+	if( (priv->rtllib->bdynamic_txpower_enable != true) ||
+			(priv->DMFlag & HAL_DM_HIPWR_DISABLE) ||
+			priv->rtllib->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_HIGH_POWER) {
+		priv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
+		return;
+	}
+
+	if((!priv->rtllib->state != RTLLIB_LINKED) &&	
+		(priv->EntryMinUndecoratedSmoothedPWDB == 0)) {
+		RT_TRACE(COMP_POWER, "Not connected to any \n");
+		priv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
+		return;
+	}
+	
+	if(priv->rtllib->state == RTLLIB_LINKED) {
+		if(priv->OpMode == RT_OP_MODE_IBSS) {
+			UndecoratedSmoothedPWDB = priv->EntryMinUndecoratedSmoothedPWDB;
+			RT_TRACE(COMP_POWER, "AP Client PWDB = %ld \n", UndecoratedSmoothedPWDB);
+		} else {
+			UndecoratedSmoothedPWDB = priv->undecorated_smoothed_pwdb;
+			RT_TRACE(COMP_POWER, "STA Default Port PWDB = %ld \n", UndecoratedSmoothedPWDB);
+		}
+	} else {
+		UndecoratedSmoothedPWDB = priv->EntryMinUndecoratedSmoothedPWDB;
+		RT_TRACE(COMP_POWER, "AP Ext Port PWDB = %ld \n", UndecoratedSmoothedPWDB);
+	}
+		
+	if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2)	{
+		priv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2;
+		RT_TRACE(COMP_POWER, "TxHighPwrLevel_Level2 (TxPwr=0x0)\n");
+	} else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) &&
+		(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) ) {
+		priv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1;
+		RT_TRACE(COMP_POWER, "TxHighPwrLevel_Level1 (TxPwr=0x10)\n");
+	} else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-3)) {
+		priv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
+		RT_TRACE(COMP_POWER, "TxHighPwrLevel_Normal\n");
+	}
+
+	if( (priv->DynamicTxHighPowerLvl != priv->LastDTPLvl) ) {
+		RT_TRACE(COMP_POWER, "PHY_SetTxPowerLevel8192S() Channel = %d \n" , priv->rtllib->current_network.channel);
+		rtl8192_phy_setTxPower(dev, priv->rtllib->current_network.channel);
+	}
+	priv->LastDTPLvl = priv->DynamicTxHighPowerLvl;
+}	
+#endif
+
+static void dm_check_txrateandretrycount(struct net_device * dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	struct rtllib_device* ieee = priv->rtllib;
+	
+#ifdef RTL8192SE
+	static u8 LegacyRateSet[12] = {0x02 , 0x04 , 0x0b , 0x16 , 0x0c , 0x12 , 0x18 , 0x24 , 0x30 , 0x48 , 0x60 , 0x6c};
+	u8 RateIdx = 0;
+	RateIdx = read_nic_byte(dev, TX_RATE_REG);
+	
+	if(ieee->softmac_stats.CurrentShowTxate < 76)
+		ieee->softmac_stats.CurrentShowTxate = (RateIdx<12)?(LegacyRateSet[RateIdx]):((RateIdx-12)|0x80);
+	else
+		ieee->softmac_stats.CurrentShowTxate = 0;
+#else
+	ieee->softmac_stats.CurrentShowTxate = read_nic_byte(dev, Current_Tx_Rate_Reg);
+#endif
+
+	ieee->softmac_stats.last_packet_rate = read_nic_byte(dev ,Initial_Tx_Rate_Reg);	
+
+	ieee->softmac_stats.txretrycount = read_nic_dword(dev, Tx_Retry_Count_Reg);	
+}
+
+static void dm_send_rssi_tofw(struct net_device *dev)
+{
+#ifndef RTL8192SE
+	DCMD_TXCMD_T			tx_cmd;
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	write_nic_byte(dev, DRIVER_RSSI, (u8)priv->undecorated_smoothed_pwdb);
+	return;
+	tx_cmd.Op		= TXCMD_SET_RX_RSSI;
+	tx_cmd.Length	= 4;
+	tx_cmd.Value		= priv->undecorated_smoothed_pwdb;
+
+	cmpk_message_handle_tx(dev, (u8*)&tx_cmd, 
+								DESC_PACKET_TYPE_INIT, sizeof(DCMD_TXCMD_T));
+#endif
+}
+
+#if defined RTL8192SE
+/*-----------------------------------------------------------------------------
+ * Function:	dm_RefreshRateAdaptiveMask()
+ *
+ * Overview:	Update rate table mask according to rssi
+ *
+ * Input:		NONE
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	05/27/2009	hpfan	Create Version 0.  
+ *
+ *---------------------------------------------------------------------------*/
+static void dm_RefreshRateAdaptiveMask(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	prate_adaptive	pRA = (prate_adaptive)&priv->rate_adaptive;
+	u32	LowRSSIThreshForRA = 0, HighRSSIThreshForRA = 0;
+	u8	rssi_level;
+	
+	if(IS_NIC_DOWN(priv)){
+		RT_TRACE(COMP_RATE,"<---- dm_RefreshRateAdaptiveMask(): driver is going to unload\n");
+		return;
+	}
+
+	if(!priv->rtllib->bUseRAMask){
+		return;
+	}
+
+	if(priv->pFirmware->FirmwareVersion >= 61 && !priv->bInformFWDriverControlDM){
+		RT_TRACE(COMP_RATE, "<---- dm_RefreshRateAdaptiveMask(): inform fw driver control dm\n");
+		priv->rtllib->SetFwCmdHandler(dev, FW_CMD_CTRL_DM_BY_DRIVER);
+		priv->bInformFWDriverControlDM = true;
+	}
+		
+	if((priv->rtllib->state == RTLLIB_LINKED && (priv->rtllib->iw_mode == IW_MODE_INFRA)) 
+#ifdef _RTL8192_EXT_PATCH_			
+		|| ((priv->rtllib->state == RTLLIB_LINKED) && (priv->rtllib->iw_mode == IW_MODE_MESH) && (priv->rtllib->only_mesh == 0))
+#endif		
+		)
+	{
+		
+		switch (pRA->PreRATRState){
+			case DM_RATR_STA_HIGH:
+				HighRSSIThreshForRA = 50;
+				LowRSSIThreshForRA = 20;
+				break;
+			case DM_RATR_STA_MIDDLE:
+				HighRSSIThreshForRA = 55;
+				LowRSSIThreshForRA = 20;
+				break;
+			case DM_RATR_STA_LOW:
+				HighRSSIThreshForRA = 50;
+				LowRSSIThreshForRA = 25;
+				break;
+			default:
+				HighRSSIThreshForRA = 50;
+				LowRSSIThreshForRA = 20;
+				break;
+		}
+
+		if(priv->undecorated_smoothed_pwdb > (long)HighRSSIThreshForRA){
+			pRA->ratr_state = DM_RATR_STA_HIGH;
+			rssi_level = 1;
+		}
+		else if(priv->undecorated_smoothed_pwdb > (long)LowRSSIThreshForRA){
+			pRA->ratr_state = DM_RATR_STA_MIDDLE;
+			rssi_level = 2;
+		}else{
+			pRA->ratr_state = DM_RATR_STA_LOW;
+			rssi_level = 3;
+		}
+		if((pRA->PreRATRState != pRA->ratr_state) || ((pRA->PreRATRState == pRA->ratr_state) && (rssi_level != priv->rssi_level)))
+		{
+			RT_TRACE(COMP_RATE, "Target AP addr : "MAC_FMT"\n", MAC_ARG(priv->rtllib->current_network.bssid));
+			RT_TRACE(COMP_RATE, "RSSI = %ld\n", priv->undecorated_smoothed_pwdb);
+			RT_TRACE(COMP_RATE, "RSSI_LEVEL = %d\n", rssi_level);
+			RT_TRACE(COMP_RATE, "PreState = %d, CurState = %d\n", pRA->PreRATRState, pRA->ratr_state);
+			priv->rtllib->UpdateHalRAMaskHandler(
+									dev,
+									false,
+									0,
+									priv->rtllib->pHTInfo->PeerMimoPs,
+									priv->rtllib->mode,
+									priv->rtllib->pHTInfo->bCurTxBW40MHz,
+									rssi_level);
+			priv->rssi_level = rssi_level;
+			pRA->PreRATRState = pRA->ratr_state;
+		}
+	}
+	if((priv->rtllib->state == RTLLIB_LINKED) && (priv->rtllib->iw_mode == IW_MODE_ADHOC)){
+		int	i;
+		struct sta_info *pEntry;
+
+		for(i = 0; i < PEER_MAX_ASSOC; i++){
+			pEntry = priv->rtllib->peer_assoc_list[i];
+			if(NULL != pEntry){
+				pRA = &pEntry->rate_adaptive;
+				switch (pRA->PreRATRState){
+					case DM_RATR_STA_HIGH:
+						HighRSSIThreshForRA = 50;
+						LowRSSIThreshForRA = 20;
+						break;
+					case DM_RATR_STA_MIDDLE:
+						HighRSSIThreshForRA = 55;
+						LowRSSIThreshForRA = 20;
+						break;
+					case DM_RATR_STA_LOW:
+						HighRSSIThreshForRA = 50;
+						LowRSSIThreshForRA = 25;
+						break;
+					default:
+						HighRSSIThreshForRA = 50;
+						LowRSSIThreshForRA = 20;
+						break;
+				}
+
+				if(pEntry->rssi_stat.UndecoratedSmoothedPWDB > HighRSSIThreshForRA){
+					pRA->ratr_state = DM_RATR_STA_HIGH;
+					rssi_level = 1;
+				}else if(pEntry->rssi_stat.UndecoratedSmoothedPWDB > LowRSSIThreshForRA){
+					pRA->ratr_state = DM_RATR_STA_MIDDLE;
+					rssi_level = 2;
+				}else{
+					pRA->ratr_state = DM_RATR_STA_LOW;
+					rssi_level = 3;
+				}
+
+				if(pRA->PreRATRState != pRA->ratr_state){
+					RT_TRACE(COMP_RATE, "AsocEntry addr : "MAC_FMT"\n", MAC_ARG(pEntry->macaddr));
+					RT_TRACE(COMP_RATE, "RSSI = %ld\n", pEntry->rssi_stat.UndecoratedSmoothedPWDB);
+					RT_TRACE(COMP_RATE, "RSSI_LEVEL = %d\n", rssi_level);
+					RT_TRACE(COMP_RATE, "PreState = %d, CurState = %d\n", pRA->PreRATRState, pRA->ratr_state);
+					priv->rtllib->UpdateHalRAMaskHandler(
+											dev,
+											false,
+											pEntry->aid+1,
+											pEntry->htinfo.MimoPs,
+											pEntry->wireless_mode,
+											pEntry->htinfo.bCurTxBW40MHz,
+											rssi_level);
+					pRA->PreRATRState = pRA->ratr_state;
+				}
+
+			}
+		}
+	}
+#ifdef _RTL8192_EXT_PATCH_			
+	if(priv->rtllib->iw_mode == IW_MODE_MESH)
+	{
+		if(priv->mshobj->ext_refresh_rate_adaptive_mask)
+			priv->mshobj->ext_refresh_rate_adaptive_mask(priv);
+	}
+#endif
+}
+
+void Adhoc_InitRateAdaptive(struct net_device *dev,struct sta_info  *pEntry)
+{
+	prate_adaptive	pRA = (prate_adaptive)&pEntry->rate_adaptive;
+	struct r8192_priv *priv = rtllib_priv(dev);
+
+	pRA->ratr_state = DM_RATR_STA_MAX;
+	pRA->high2low_rssi_thresh_for_ra = RateAdaptiveTH_High;
+	pRA->low2high_rssi_thresh_for_ra20M = RateAdaptiveTH_Low_20M+5;
+	pRA->low2high_rssi_thresh_for_ra40M = RateAdaptiveTH_Low_40M+5;
+
+	pRA->high_rssi_thresh_for_ra = RateAdaptiveTH_High+5;
+	pRA->low_rssi_thresh_for_ra20M = RateAdaptiveTH_Low_20M;
+	pRA->low_rssi_thresh_for_ra40M = RateAdaptiveTH_Low_40M;
+	
+	if (priv->rf_type == RF_2T4R)
+	{
+		/* 2008/01/11 MH Modify 2T RATR table for different RSSI. */
+		pRA->upper_rssi_threshold_ratr		= 	0x8f0f0000;
+		pRA->middle_rssi_threshold_ratr		= 	0x8d0ff000;
+		pRA->low_rssi_threshold_ratr		= 	0x8f0ff003;
+		pRA->low_rssi_threshold_ratr_40M	= 	0x8f0ff007;
+		pRA->low_rssi_threshold_ratr_20M	= 	0x8f0ff003;
+	}
+	else if (priv->rf_type == RF_1T2R)
+	{
+		pRA->upper_rssi_threshold_ratr		= 	0x000f0000;		
+		pRA->middle_rssi_threshold_ratr		= 	0x000ff000;
+		pRA->low_rssi_threshold_ratr		= 	0x000ff003;
+		pRA->low_rssi_threshold_ratr_40M	= 	0x000ff007;
+		pRA->low_rssi_threshold_ratr_20M	= 	0x000ff003;
+	}
+	
+}	
+
+
+void Adhoc_InitRateAdaptiveState(struct net_device *dev,struct sta_info  *pEntry)
+{
+	prate_adaptive	pRA = (prate_adaptive)&pEntry->rate_adaptive;
+
+	pRA->ratr_state = DM_RATR_STA_MAX;
+	pRA->PreRATRState = DM_RATR_STA_MAX;
+}
+
+#if 0
+static void Adhoc_dm_CheckRateAdaptive(struct net_device * dev)
+{
+	struct r8192_priv 			*priv = rtllib_priv(dev);
+	struct rtllib_device 	*ieee = priv->rtllib;
+	prate_adaptive			pRA;
+	u32						currentRATR, targetRATR = 0;
+	u32						LowRSSIThreshForRA = 0, HighRSSIThreshForRA = 0;
+	bool						bShortGIEnabled = false;
+	u8 						i = 0;
+	struct sta_info 			*pEntry = NULL;
+	
+	if(!priv->up)
+	{
+		RT_TRACE(COMP_RATE, "<---- AP_dm_CheckRateAdaptive(): driver is going to unload\n");
+		return;
+	}
+
+	for(i=0;i<PEER_MAX_ASSOC; i++)
+	{
+		pEntry = ieee->peer_assoc_list[i];
+		if(NULL != pEntry)
+		{
+			pRA = (prate_adaptive)&pEntry->rate_adaptive;
+			if(pRA->rate_adaptive_disabled)
+				continue;			
+			if((pEntry->wireless_mode!=WIRELESS_MODE_N_24G) && (pEntry->wireless_mode != WIRELESS_MODE_N_5G))
+				continue;
+			bShortGIEnabled = (pEntry->htinfo.bCurTxBW40MHz && priv->rtllib->pHTInfo->bCurShortGI40MHz && pEntry->htinfo.bCurShortGI40MHz) |
+				(!pEntry->htinfo.bCurTxBW40MHz && priv->rtllib->pHTInfo->bCurShortGI20MHz && pEntry->htinfo.bCurShortGI20MHz);
+			pRA->upper_rssi_threshold_ratr =
+				(pRA->upper_rssi_threshold_ratr & (~BIT31)) | ((bShortGIEnabled)? BIT31:0) ;
+
+			pRA->middle_rssi_threshold_ratr = 
+				(pRA->middle_rssi_threshold_ratr & (~BIT31)) | ((bShortGIEnabled)? BIT31:0) ;
+			
+
+			if (pEntry->htinfo.bBw40MHz)
+			{
+				pRA->low_rssi_threshold_ratr = 
+					(pRA->low_rssi_threshold_ratr_40M & (~BIT31)) | ((bShortGIEnabled)? BIT31:0) ;
+			}
+			else
+			{
+				pRA->low_rssi_threshold_ratr = 
+					(pRA->low_rssi_threshold_ratr_20M & (~BIT31)) | ((bShortGIEnabled)? BIT31:0) ;
+			}
+			if (pRA->ratr_state == DM_RATR_STA_HIGH)
+			{
+				HighRSSIThreshForRA 	= pRA->high2low_rssi_thresh_for_ra;
+				LowRSSIThreshForRA	= 
+					(priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)?
+					(pRA->low_rssi_thresh_for_ra40M):(pRA->low_rssi_thresh_for_ra20M);
+			}
+			else if (pRA->ratr_state == DM_RATR_STA_LOW)
+			{
+				HighRSSIThreshForRA	= pRA->high_rssi_thresh_for_ra;
+				LowRSSIThreshForRA 	= 
+					(priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)?
+					(pRA->low2high_rssi_thresh_for_ra40M):(pRA->low2high_rssi_thresh_for_ra20M);
+			}
+			else
+			{
+				HighRSSIThreshForRA	= pRA->high_rssi_thresh_for_ra;
+				LowRSSIThreshForRA	= 
+					(priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)?
+					(pRA->low_rssi_thresh_for_ra40M):(pRA->low_rssi_thresh_for_ra20M);
+			}
+			if(priv->undecorated_smoothed_pwdb >= (int)HighRSSIThreshForRA)
+			{
+				pRA->ratr_state = DM_RATR_STA_HIGH;
+				targetRATR = pRA->upper_rssi_threshold_ratr;
+			}
+			else if(priv->undecorated_smoothed_pwdb >= (int)LowRSSIThreshForRA)
+			{
+				pRA->ratr_state = DM_RATR_STA_MIDDLE;
+				targetRATR = pRA->middle_rssi_threshold_ratr;
+			}
+			else
+			{
+				pRA->ratr_state = DM_RATR_STA_LOW;
+				targetRATR = pRA->low_rssi_threshold_ratr;
+			}
+			currentRATR = read_nic_dword(dev, pEntry->ratr_index*4 + RATR0);
+			if( targetRATR !=  currentRATR )
+			{
+				if(priv->rf_type == RF_1T2R)	
+				{	
+					targetRATR &=~ (RATE_ALL_OFDM_2SS);
+				}
+				printk("<<<<<<<<<<<currentRATR = %x, targetRATR = %x\n", currentRATR, targetRATR);				
+				write_nic_dword(dev, RATR0+pEntry->ratr_index*4, targetRATR);
+				write_nic_byte(dev, UFWP, 1);
+				pRA->last_ratr = targetRATR;
+			}
+		}
+	}
+	
+}	
+#endif
+
+#endif
+/*---------------------------Define function prototype------------------------*/
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl_cam.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl_cam.h
@@ -0,0 +1,60 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * Based on the r8180 driver, which is:
+ * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+#ifndef _RTL_CAM_H
+#define _RTL_CAM_H
+
+#include <linux/types.h>
+struct net_device;
+
+void CamResetAllEntry(struct net_device* dev);
+void EnableHWSecurityConfig8192(struct net_device *dev);
+void setKey(struct net_device *dev, u8 EntryNo, u8 KeyIndex, u16 KeyType, u8 *MacAddr, u8 DefaultKey, u32 *KeyContent );
+void set_swcam(struct net_device *dev, u8 EntryNo, u8 KeyIndex, u16 KeyType, u8 *MacAddr, u8 DefaultKey, u32 *KeyContent, u8 is_mesh);
+void CamPrintDbgReg(struct net_device* dev);
+
+#ifdef _RTL8192_EXT_PATCH_
+void CamDeleteOneEntry(struct net_device *dev, u8 EntryNo);
+void CamRestoreEachIFEntry(struct net_device* dev,u8 is_mesh);
+#endif
+
+u32 read_cam(struct net_device *dev, u8 addr);
+void write_cam(struct net_device *dev, u8 addr, u32 data);
+
+void CamRestoreAllEntry(struct net_device *dev);
+#ifdef _RTL8192_EXT_PATCH_
+void reset_IFswcam(struct net_device *dev, u8 is_mesh);
+void CamRestoreEachIFEntry(struct net_device* dev,u8 is_mesh);
+int rtl8192_set_key_for_AP(struct rtllib_device *ieee);
+#endif
+
+void CAM_read_entry(struct net_device *dev, u32 iIndex);
+
+#ifdef _RTL8192_EXT_PATCH_
+u8 rtl8192_get_free_hwsec_cam_entry(struct rtllib_device *ieee, u8 *sta_addr);
+void rtl8192_del_hwsec_cam_entry(struct rtllib_device *ieee, u8 *sta_addr);
+int meshdev_set_key_for_peer(struct net_device *dev, u8 *Addr, u8 KeyIndex, u16 KeyType, u32 *KeyContent);
+#endif
+
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl_eeprom.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl_eeprom.h
@@ -0,0 +1,48 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * Based on the r8180 driver, which is:
+ * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+
+
+#define EPROM_DELAY 10
+#if 0
+#define EPROM_ANAPARAM_ADDRLWORD 0xd 
+#define EPROM_ANAPARAM_ADDRHWORD 0xe 
+
+#define EPROM_RFCHIPID 0x6
+#define EPROM_TXPW_BASE 0x05
+#define EPROM_RFCHIPID_RTL8225U 5 
+#define EPROM_RF_PARAM 0x4
+#define EPROM_CONFIG2 0xc
+
+#define EPROM_VERSION 0x1E
+#define MAC_ADR 0x7
+
+#define CIS 0x18 
+
+#define EPROM_TXPW0 0x16 
+#define EPROM_TXPW2 0x1b
+#define EPROM_TXPW1 0x3d
+#endif
+
+u32 eprom_read(struct net_device *dev,u32 addr); 
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/Makefile
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/Makefile
@@ -0,0 +1,786 @@
+NIC_SELECT = RTL8192SE
+
+CC = gcc
+KVER  := $(shell uname -r)
+MODDESTDIR := /lib/modules/$(KVER)/kernel/drivers/net/wireless/
+
+ifeq (1,1)
+###################### KERNEL 2.6 ################################
+ifeq ($(NIC_SELECT),RTL8192CE)
+sub_folder = rtl8192c
+EXTRA_CFLAGS = -DRTL8192CE
+EXTRA_CFLAGS += -DEEPROM_OLD_FORMAT_SUPPORT=0 		\
+		-DRTL8192SU_DISABLE_CCK_RATE=0 		\
+		-DDISABLE_BB_RF=0 			\
+		-DRTL92SE_FPGA_VERIFY=0	 		\
+		-DSIMULATE_ETHERNET=0 			\
+		-DSUPERMAC_92D_ENABLE=0			\
+		-DEARLYMODE_ENABLE_FOR_92D=0 		\
+		-DRTL8192S_DISABLE_FW_DM=0 		\
+		-DMP_CCK_WORKAROUND=0			\
+		-DRTL8192SE_DISABLE_MGNT_QUEUE=0	\
+		-DRTL8190_Download_Firmware_From_Header=1 \
+		-DMUTUAL_AUTHENTICATION=1		\
+		-DFOR_QMI=0				\
+		-DENABLE_TKIP11N 			\
+		-DCONFIG_PM_RTL 			\
+		-DCONFIG_PM 				\
+		-DENABLE_IPS 				\
+		-DENABLE_LPS 				\
+		-DCONFIG_ASPM_OR_D3 			\
+		-DENABLE_GPIO_RADIO_CTL 		\
+		-DMP_DRIVER=0				\
+		-DENABLE_DOT11D 			
+		#					\
+		-D_ENABLE_SW_BEACON 			\
+		-DUSE_FW_SOURCE_IMG_FILE 		\
+		-DEFUSE_REPG_WORKAROUND			\
+		-DENABLE_AMSDU 				\
+		-DADHOC_11N 				\
+		-DFOR_ANDROID_X86			\
+		-DCONFIG_64BIT_DMA			\
+		#
+endif
+
+ifeq ($(NIC_SELECT),RTL8192SE)
+sub_folder = rtl8192s
+EXTRA_CFLAGS = -DRTL8192SE
+EXTRA_CFLAGS += -DEEPROM_OLD_FORMAT_SUPPORT=0 		\
+		-DRTL92SE_FPGA_VERIFY=0 		\
+		-DDEMO_BOARD_SUPPORT=1 			\
+		-DRTL8192SU_DISABLE_CCK_RATE=0 		\
+		-DRTL8192S_DISABLE_FW_DM=0 		\
+		-DHAL_MAC_ENABLE=1 			\
+		-DHAL_BB_ENABLE=1 			\
+		-DHAL_RF_ENABLE=1 			\
+		-DRTL8192S_PREPARE_FOR_NORMAL_RELEASE=1 \
+		-DDISABLE_BB_RF=0 			\
+		-DCONFIG_PM_RTL 			\
+		-DCONFIG_PM 				\
+		-DENABLE_GPIO_RADIO_CTL 		\
+		-DRTL8190_Download_Firmware_From_Header=1 \
+		-DENABLE_LPS 				\
+		-DCONFIG_RX_CMD				\
+		-DENABLE_IPS 				\
+		-DUSE_FW_SOURCE_IMG_FILE 		\
+		-DENABLE_DOT11D 			\
+		-DCONFIG_ASPM_OR_D3 			\
+		#					\
+		-DCONFIG_CRDA	 			\
+		-DCONFIG_CFG_80211 			\
+		-DCONFIG_RTL_RFKILL	 		\
+		-DCONFIG_FW_SETCHAN			\
+		-DRTL8192S_WAPI_SUPPORT			\
+		-D_ENABLE_SW_BEACON 			\
+		-DCONFIG_MP 				\
+		-DENABLE_AMSDU 				\
+		-DADHOC_11N				\
+		-DEFUSE_REPG_WORKAROUN			\
+		-DENABLE_TKIP11N			\
+		-DFOR_ANDROID_X86			\
+		#
+		#NOTICE:
+		#[1] CONFIG_MP is for MP test, 
+		#    you should close IPS/LPS/GPIO/ASPM 
+		#[2] In order to support CRDA, RFKILL 
+      		#    CONFIG_CFG_80211 need to be enabled at first.
+		#[3] In order to support CRDA, 
+      		#    DOT11D need to be enabled at first.
+		#[4] CRDA and RFKILL can be enabled individually. 
+                
+		
+endif
+ifeq ($(NIC_SELECT),RTL8190P)
+sub_folder = rtl8192e
+EXTRA_CFLAGS += -DRTL8190P				\
+		-DUSE_FW_SOURCE_IMG_FILE		\
+		-DEEPROM_OLD_FORMAT_SUPPORT=1		\
+		-DENABLE_DOT11D 			
+		#					\
+		-DCONFIG_PM				\
+		-DENABLE_TKIP11N			\
+		-DFOR_ANDROID_X86			\
+		#
+endif
+ifeq ($(NIC_SELECT),RTL8192E)
+sub_folder = rtl8192e
+EXTRA_CFLAGS+=-DRTL8192E				\
+		-DEEPROM_OLD_FORMAT_SUPPORT=1		\
+		-DUSE_FW_SOURCE_IMG_FILE		\
+		-DENABLE_IPS				\
+		-DENABLE_LPS				\
+		-DENABLE_GPIO_RADIO_CTL			\
+		-DCONFIG_PM_RTL 			\
+		-DCONFIG_PM 				\
+		-DENABLE_DOT11D 			
+		#					\
+		-DCONFIG_RTL8192_IO_MAP			\
+		-DCONFIG_ASPM_OR_D3 			\
+		-DENABLE_TKIP11N			\
+		-DFOR_ANDROID_X86			\
+		#
+endif
+ifeq ($(NIC_SELECT),RTL8191SE_MESH)
+sub_folder = rtl8192s
+EXTRA_CFLAGS += -DRTL8192SE 				\
+		-DEEPROM_OLD_FORMAT_SUPPORT=0 		\
+		-DRTL92SE_FPGA_VERIFY=0 		\
+		-DDEMO_BOARD_SUPPORT=1 			\
+		-DRTL8192SU_DISABLE_CCK_RATE=0 		\
+		-DRTL8192S_DISABLE_FW_DM=0 		\
+		-DHAL_MAC_ENABLE=1 			\
+		-DHAL_BB_ENABLE=1 			\
+		-DHAL_RF_ENABLE=1 			\
+		-DRTL8192S_PREPARE_FOR_NORMAL_RELEASE=1 \
+		-DDISABLE_BB_RF=0 			\
+		-DRTL8190_Download_Firmware_From_Header=1 \
+		-DEFUSE_REPG_WORKAROUND 		\
+		-DCONFIG_PM 				\
+		-DCONFIG_PM_RTL 			\
+		-DENABLE_GPIO_RADIO_CTL			\
+		-DENABLE_IPS 				\
+		-DENABLE_LPS				\
+		-DCONFIG_ASPM_OR_D3 			\
+		-DCUSTOMER_ID_INTEL_CMPC 		\
+		-DMESH_8192_SPECIFIED 			\
+		-D_RTL8192_EXT_PATCH_ 			\
+		-D_MESH_DEBUG_ 				\
+		-DTREE_BASED_ROUTING_ENABLE 		\
+		-DMESH_PATHSEL_DBG_LV=0 		\
+		-DMESH_PATHSEL_DBG_SIMPLE=0 		\
+		-DMESH_PATHSEL_DBG_TEST=0		\
+		-DBUILT_IN_MSHCLASS 			\
+		-DENABLE_AMSDU				\
+		-DUSE_FW_SOURCE_IMG_FILE 		\
+		-DENABLE_DOT11D 			\
+		-DCONFIG_RX_CMD				\
+		#					\
+		-DADHOC_11N				\
+		-DCOMPATIBLE_WITH_RALINK_MESH 		\
+		-DCONFIG_CRDA	 			\
+		-DCONFIG_FW_SETCHAN			\
+		-DRTL8192S_WAPI_SUPPORT			\
+		-DMESH_AUTO_TEST			\
+		-D_ENABLE_SW_BEACON			\
+		-DEFUSE_REPG_WORKAROUND 		\
+		-DENABLE_TKIP11N			\
+		-DFOR_ANDROID_X86			\
+		-DCONFIG_MP 				\
+		#
+endif
+
+#it will fail to compile in suse linux enterprise 10 sp2. This flag is to solve this problem.
+ifeq ($(shell uname -r | cut -d. -f1,2,3,4), 2.6.16.60-0)
+	EXTRA_CFLAGS += -DOPENSUSE_SLED=1
+else
+	EXTRA_CFLAGS += -DOPENSUSE_SLED=0
+endif
+
+# Switch AP will fail in moblin2. This flag is to solve this issue.
+ifeq ($(shell uname -r | cut -d. -f6 | cut -d- -f1), moblin2)
+	EXTRA_CFLAGS += -DFOR_MOBLIN
+endif
+
+EXTRA_CFLAGS += -I$(TOPDIR)/drivers/net/wireless
+EXTRA_CFLAGS += -std=gnu89
+EXTRA_CFLAGS += -O2
+EXTRA_CFLAGS += -mhard-float -DCONFIG_FORCE_HARD_FLOAT=y
+EXTRA_CFLAGS += -DTHOMAS_TURBO
+#flag for single module compile
+EXTRA_CFLAGS += -DBUILT_IN_RTLLIB
+#EXTRA_CFLAGS += -DCONFIG_RTLWIFI_DEBUGFS
+ifeq ($(NIC_SELECT),RTL8190P)
+r8190_pci-objs := rtl_core.o 		\
+		  rtl_eeprom.o 		\
+		  rtl_ps.o 		\
+		  rtl_wx.o 		\
+		  rtl_cam.o		\
+		  rtl_dm.o 		\
+		  rtl_pm.o 		\
+		  rtl_debug.o 		\
+		  rtl_ethtool.o		\
+		  rtl8192e/r8190P_hwimg.o	\
+		  rtl8192e/r8190P_rtl8256.o 	\
+		  rtl8192e/r8192E_dev.o		\
+		  rtl8192e/r8192E_phy.o 		\
+		  rtl8192e/r8192E_firmware.o 	\
+		  rtl8192e/r8192E_cmdpkt.o 	\
+		  ../../rtllib/rtllib_rx.o                \
+		  ../../rtllib/rtllib_softmac.o           \
+		  ../../rtllib/rtllib_tx.o                \
+		  ../../rtllib/rtllib_wx.o                \
+		  ../../rtllib/rtllib_module.o            \
+		  ../../rtllib/rtllib_softmac_wx.o        \
+		  ../../rtllib/rtl819x_HTProc.o              \
+		  ../../rtllib/rtl819x_TSProc.o              \
+		  ../../rtllib/rtl819x_BAProc.o              \
+		  ../../rtllib/dot11d.o                      \
+		  ../../rtllib/rtllib_crypt.o             \
+		  ../../rtllib/rtllib_crypt_tkip.o        \
+		  ../../rtllib/rtllib_crypt_ccmp.o        \
+		  ../../rtllib/rtllib_crypt_wep.o
+
+obj-m := r8190_pci.o
+endif
+ifeq ($(NIC_SELECT),RTL8192E)
+r8192e_pci-objs := rtl_core.o 		\
+		  rtl_eeprom.o 	\
+		  rtl_ps.o 		\
+		  rtl_wx.o   	\
+		  rtl_cam.o		\
+		  rtl_dm.o 		\
+		  rtl_pm.o 		\
+		  rtl_debug.o		\
+		  rtl_ethtool.o		\
+		  rtl8192e/r8192E_dev.o		\
+		  rtl8192e/r8192E_phy.o 		\
+		  rtl8192e/r8192E_firmware.o 	\
+		  rtl8192e/r8192E_cmdpkt.o 	\
+		  rtl8192e/r8192E_hwimg.o 	\
+		  rtl8192e/r8190P_rtl8256.o 	\
+		  rtllib/rtllib_rx.o                \
+		  rtllib/rtllib_softmac.o           \
+		  rtllib/rtllib_tx.o                \
+		  rtllib/rtllib_wx.o                \
+		  rtllib/rtllib_module.o            \
+		  rtllib/rtllib_softmac_wx.o        \
+		  rtllib/rtl819x_HTProc.o              \
+		  rtllib/rtl819x_TSProc.o              \
+		  rtllib/rtl819x_BAProc.o              \
+		  rtllib/dot11d.o                      \
+		  rtllib/rtllib_crypt.o             \
+		  rtllib/rtllib_crypt_tkip.o        \
+		  rtllib/rtllib_crypt_ccmp.o        \
+		  rtllib/rtllib_crypt_wep.o
+obj-m := r8192e_pci.o
+endif
+ifeq ($(NIC_SELECT),RTL8192SE)
+r8192se_pci-objs := rtl_core.o 		\
+		  rtl_regd.o		\
+		  rtl_rfkill.o		\
+		  rtl_eeprom.o 		\
+		  rtl_wx.o 		\
+		  rtl_cam.o		\
+		  rtl_pm.o 		\
+		  rtl_ps.o 		\
+		  rtl_dm.o 		\
+		  rtl_debug.o		\
+		  rtl_ethtool.o         \
+		  rtl8192s/r8192S_dev.o 	\
+		  rtl8192s/r8192S_Efuse.o 	\
+		  rtl8192s/r8192S_phy.o 	\
+		  rtl8192s/r8192S_firmware.o 	\
+		  rtl8192s/r8192S_rtl6052.o 	\
+		  rtl8192s/r8192S_hwimg.o 	\
+		  rtl8192s/r8192S_led.o 	\
+		  rtl8192s/r8192S_mp.o		\
+		  rtl8192s/r8192S_scan.o	\
+		  rtllib/rtllib_rx.o                \
+		  rtllib/rtllib_softmac.o           \
+		  rtllib/rtllib_tx.o                \
+		  rtllib/rtllib_wx.o                \
+		  rtllib/rtllib_module.o            \
+		  rtllib/rtllib_softmac_wx.o        \
+		  rtllib/rtl819x_HTProc.o              \
+		  rtllib/rtl819x_TSProc.o              \
+		  rtllib/rtl819x_BAProc.o              \
+		  rtllib/dot11d.o                      \
+		  rtllib/rtllib_crypt.o             \
+		  rtllib/rtllib_crypt_tkip.o        \
+		  rtllib/rtllib_crypt_ccmp.o        \
+		  rtllib/rtllib_crypt_wep.o		\
+		  rtllib/wapi.o        			\
+		  rtllib/wapi_interface.o
+#		  rtl8192e/r8190P_rtl8256.o 	
+obj-m := r8192se_pci.o
+endif
+
+ifeq ($(NIC_SELECT),RTL8192CE)
+r8192ce_pci-objs := rtl_core.o 		\
+		  rtl_eeprom.o 		\
+		  rtl_wx.o 		\
+		  rtl_cam.o		\
+		  rtl_pm.o 		\
+		  rtl_ps.o 		\
+		  rtl_debug.o		\
+		  rtl_ethtool.o         \
+		  rtl8192c/r8192C_dev.o 	\
+		  rtl8192c/r8192C_Efuse.o 	\
+		  rtl8192c/r8192C_phy.o 	\
+		  rtl8192c/r8192C_firmware.o 	\
+		  rtl8192c/r8192C_dm.o 		\
+		  rtl8192c/r8192C_rtl6052.o 	\
+		  rtl8192c/r8192C_hwimg.o 	\
+		  rtl8192c/r8192C_led.o 	\
+		  rtl8192c/r8192C_com.o 	\
+		  rtl8192c/r8192C_PhyParam.o 	\
+		  ../../rtllib/rtllib_rx.o                \
+		  ../../rtllib/rtllib_softmac.o           \
+		  ../../rtllib/rtllib_tx.o                \
+		  ../../rtllib/rtllib_wx.o                \
+		  ../../rtllib/rtllib_module.o            \
+		  ../../rtllib/rtllib_softmac_wx.o        \
+		  ../../rtllib/rtl819x_HTProc.o              \
+		  ../../rtllib/rtl819x_TSProc.o              \
+		  ../../rtllib/rtl819x_BAProc.o              \
+		  ../../rtllib/dot11d.o                      \
+		  ../../rtllib/rtllib_crypt.o             \
+		  ../../rtllib/rtllib_crypt_tkip.o        \
+		  ../../rtllib/rtllib_crypt_ccmp.o        \
+		  ../../rtllib/rtllib_crypt_wep.o
+obj-m := r8192ce_pci.o
+endif
+
+ifeq ($(NIC_SELECT),RTL8191SE_MESH)
+r8192se_pci_mesh-objs := rtl_core.o 	\
+		  rtl_regd.o		\
+		  rtl_rfkill.o		\
+		  rtl_eeprom.o 		\
+		  rtl_ps.o 		\
+		  rtl_wx.o 		\
+		  rtl_cam.o		\
+		  rtl_dm.o 		\
+		  rtl_pm.o 		\
+		  rtl_debug.o		\
+		  rtl_ethtool.o         \
+		  rtl_mesh.o		\
+		  rtl8192s/r8192S_dev.o \
+		  rtl8192s/r8192S_Efuse.o 	\
+		  rtl8192s/r8192S_phy.o 	\
+		  rtl8192s/r8192S_firmware.o 	\
+		  rtl8192s/r8192S_rtl6052.o 	\
+		  rtl8192s/r8192S_hwimg.o 	\
+		  rtl8192s/r8192S_led.o 	\
+		  rtl8192s/r8192S_mp.o		\
+		  rtl8192s/r8192S_scan.o		\
+		  ../../rtllib/rtllib_rx.o                \
+		  ../../rtllib/rtllib_softmac.o           \
+		  ../../rtllib/rtllib_tx.o                \
+		  ../../rtllib/rtllib_wx.o                \
+		  ../../rtllib/rtllib_module.o            \
+		  ../../rtllib/rtllib_softmac_wx.o        \
+		  ../../rtllib/rtl819x_HTProc.o           \
+		  ../../rtllib/rtl819x_TSProc.o           \
+		  ../../rtllib/rtl819x_BAProc.o           \
+		  ../../rtllib/dot11d.o                   \
+		  ../../rtllib/rtllib_crypt.o             \
+		  ../../rtllib/rtllib_crypt_tkip.o        \
+		  ../../rtllib/rtllib_crypt_ccmp.o        \
+		  ../../rtllib/rtllib_crypt_wep.o	  \
+		  ../../mshclass/msh_class.o 		  \
+		  ../../mshclass/mesh_8192_util.o  	  \
+		  ../../mshclass/rtl8192_mesh.o 	  \
+		  ../../mshclass/rtl8192s_sme.o 	  \
+	  	  ../../mshclass/rtl8192_proc.o 	  \
+		  ../../mshclass/8192s_pathsel.o 	  \
+		  ../../mshclass/hash_table.o 		  \
+		  ../../mshclass/rtl8192_sha1.o           \
+		  ../../mshclass/rtl8192_sha256.o         \
+		  ../../mshclass/rtl8192_aes.o            \
+		  ../../mshclass/mesh_abbr_handshk.o      \
+		  ../../mshclass/rtl8192_bn_ctx.o         \
+		  ../../mshclass/rtl8192_bn_asm.o         \
+		  ../../mshclass/rtl8192_bn_gcd.o         \
+		  ../../mshclass/rtl8192_bn_mont.o        \
+		  ../../mshclass/rtl8192_bn_recp.o        \
+		  ../../mshclass/rtl8192_bn_lib.o         \
+		  ../../mshclass/mesh_ath.o		  \
+		  ../../mshclass/pathselection.o 	  \
+		  ../../mshclass/tree_proactive.o
+#		  rtl8192e/r8190P_rtl8256.o 	
+obj-m := r8192se_pci_mesh.o
+endif
+
+
+KSRC := /lib/modules/$(KVER)/build
+INSTALL_PREFIX :=
+IMG_DIR := /lib/firmware/
+all: modules
+
+modules:
+	$(MAKE) -C $(KSRC) M=$(PWD) CC=$(CC) modules
+install: modules
+ifeq ($(NIC_SELECT),RTL8190P)
+	install -p -m 644 r8190_pci.ko $(MODDESTDIR)
+endif
+ifeq ($(NIC_SELECT),RTL8192E)
+	install -p -m 644 r8192e_pci.ko $(MODDESTDIR)
+endif
+ifeq ($(NIC_SELECT),RTL8192SE)
+	install -p -m 644 r8192se_pci.ko $(MODDESTDIR)
+endif
+ifeq ($(NIC_SELECT),RTL8192CE)
+	install -p -m 644 r8192ce_pci.ko $(MODDESTDIR)
+endif
+ifeq ($(NIC_SELECT),RTL8191SE_MESH)
+	cp ../../script/mesh-tools /usr/share/enhanced-easy-network/ -rf
+	cp ../../script/mesh.conf /etc/
+	cp ../../script/wpa_mesh_tkip.conf /etc/
+	cp ../../script/wpa_mesh_ccmp.conf /etc/
+	chmod 777 ../../script/do_install
+	../../script/do_install
+	install -p -m 644 r8192se_pci_mesh.ko $(MODDESTDIR)
+endif
+
+	depmod -a
+	@#copy firmware img to target fold
+	$(shell [ -d "$(IMG_DIR)/`uname -r`" ] && cp -fr $(RTL819x_FIRM_DIR)/$(NIC_SELECT) $(IMG_DIR)/`uname -r`/.)
+	$(shell [ ! -d "$(IMG_DIR)/`uname -r`" ] && cp -fr $(RTL819x_FIRM_DIR)/$(NIC_SELECT) $(IMG_DIR)/.)
+uninstall:
+ifeq ($(NIC_SELECT),RTL8190P)
+	$(shell [ -d $(MODDESTDIR) ] && rm -f $(MODDESTDIR)/r8190_pci.ko)
+endif
+ifeq ($(NIC_SELECT),RTL8192E)
+	$(shell [ -d $(MODDESTDIR) ] && rm -f $(MODDESTDIR)/r8192e_pci.ko)
+endif
+ifeq ($(NIC_SELECT),RTL8192SE)
+	$(shell [ -d $(MODDESTDIR) ] && rm -f $(MODDESTDIR)/r8192se_pci.ko)
+endif
+ifeq ($(NIC_SELECT),RTL8192CE)
+	$(shell [ -d $(MODDESTDIR) ] && rm -f $(MODDESTDIR)/r8192ce_pci.ko)
+endif
+ifeq ($(NIC_SELECT),RTL8191SE_MESH)
+	rm -f /etc/wpa_mesh_tkip.conf
+	rm -f /etc/wpa_mesh_ccmp.conf
+	$(shell [ -d $(MODDESTDIR) ] && rm -f $(MODDESTDIR)/r8192se_pci_mesh.ko)
+endif
+	depmod -a
+	@#delete the firmware img
+	@rm -fr /lib/firmware/$(NIC_SELECT)
+	@rm -fr /lib/firmware/`uname -r`/$(NIC_SELECT)
+else
+###################### KERNEL 2.4 ################################
+LD := ld
+KSRC := /lib/modules/$(KVER)/build
+CONFIG_FILE := $(KSRC)/include/linux/autoconf.h
+CFLAGS += -DLINUX -D__KERNEL__ -DMODULE -O2 -pipe -Wall
+CFLAGS += -I$(KSRC)/include -I.
+CFLAGS += -DMODVERSIONS -DEXPORT_SYMTAB -include $(KSRC)/include/linux/modversions.h
+#CFLAGS += -D__NO_VERSION__ -DEXPORT_SYMTAB  
+
+ifeq ($(NIC_SELECT),RTL8190P)
+sub_folder = rtl8192e
+CFLAGS += -DRTL8190P
+CFLAGS+=-DEEPROM_OLD_FORMAT_SUPPORT=1
+#CFLAGS +=-DCONFIG_RTLWIFI_DEBUGFS
+endif
+
+ifeq ($(NIC_SELECT),RTL8192E)
+sub_folder = rtl8192e
+CFLAGS += -DRTL8192E
+CFLAGS+=-DEEPROM_OLD_FORMAT_SUPPORT=1
+CFLAGS+=-DENABLE_GPIO_RADIO_CTL
+#CFLAGS += -DENABLE_IPS
+#CFLAGS += -DENABLE_IPS
+#CFLAGS +=-DCONFIG_RTLWIFI_DEBUGFS
+endif
+
+ifeq ($(NIC_SELECT),RTL8192SE)
+sub_folder = rtl8192s
+CFLAGS += -DRTL8192SE
+CFLAGS += -DEEPROM_OLD_FORMAT_SUPPORT=0 
+CFLAGS += -DRTL92SE_FPGA_VERIFY=0 
+CFLAGS += -DDEMO_BOARD_SUPPORT=1 
+CFLAGS += -DRTL8192SU_DISABLE_CCK_RATE=0 
+CFLAGS += -DRTL8192S_DISABLE_FW_DM=0 
+CFLAGS += -DHAL_MAC_ENABLE=1 
+CFLAGS += -DHAL_BB_ENABLE=1 
+CFLAGS += -DHAL_RF_ENABLE=1 
+CFLAGS += -DRTL8192S_PREPARE_FOR_NORMAL_RELEASE=1 
+CFLAGS += -DDISABLE_BB_RF=0 
+CFLAGS += -DRTL8190_Download_Firmware_From_Header=1 
+#CFLAGS += -DRTL8192S_WAPI_SUPPORT=1 
+#CFLAGS +=-DCONFIG_RTLWIFI_DEBUGFS
+#CFLAGS += -DCONFIG_PM_RTL 
+#CFLAGS += -DENABLE_GPIO_RADIO_CTL  
+#EXTRA_CFLAGS += -DCONFIG_PM
+#EXTRA_CFLAGS += -DENABLE_IPS
+#EXTRA_CFLAGS += -DENABLE_LPS
+#EXTRA_CFLAGS += -DCONFIG_ASPM_OR_D3
+#CFLAGS += -DENABLE_AMSDU
+#CFLAGS += -DADHOC_11N
+endif
+
+ifeq ($(NIC_SELECT),RTL8191SE_MESH)
+sub_folder = rtl8192s
+CFLAGS += -DRTL8192SE
+CFLAGS +=-DEEPROM_OLD_FORMAT_SUPPORT=1
+#CFLAGS +=-DCONFIG_RTLWIFI_DEBUGFS
+CFLAGS += -DEEPROM_OLD_FORMAT_SUPPORT=0 
+CFLAGS += -DRTL92SE_FPGA_VERIFY=0 
+CFLAGS += -DDEMO_BOARD_SUPPORT=1 
+CFLAGS += -DRTL8192SU_DISABLE_CCK_RATE=0 
+CFLAGS += -DRTL8192S_DISABLE_FW_DM=0 
+CFLAGS += -DHAL_MAC_ENABLE=1 
+CFLAGS += -DHAL_BB_ENABLE=1 
+CFLAGS += -DHAL_RF_ENABLE=1 
+CFLAGS += -DRTL8192S_PREPARE_FOR_NORMAL_RELEASE=1 
+CFLAGS += -DDISABLE_BB_RF=0 
+CFLAGS += -DCONFIG_PM_RTL 
+CFLAGS += -DENABLE_GPIO_RADIO_CTL  
+CFLAGS += -DRTL8190_Download_Firmware_From_Header=1 
+CFLAGS += -DENABLE_IPS
+CFLAGS += -DENABLE_LPS
+CFLAGS += -DCONFIG_ASPM_OR_D3
+CFLAGS += -D_RTL8192_EXT_PATCH_ \
+	  -DMESH_8192_SPECIFIED \
+	  -D_MESH_DEBUG_ \
+	  -DTREE_BASED_ROUTING_ENABLE \
+	  -DMESH_PATHSEL_DBG_LV=0 \
+	  -DMESH_PATHSEL_DBG_SIMPLE=0 \
+	  -DMESH_PATHSEL_DBG_TEST=0\
+	  -DBUILT_IN_MSHCLASS \
+	  -DCUSTOMER_ID_INTEL_CMPC \
+	  -DENABLE_AMSDU
+endif
+CFLAGS += -DTHOMAS_TURBO
+CFLAGS += -DENABLE_DOT11D
+
+#flag for single module compile
+CFLAGS += -DBUILT_IN_RTLLIB
+CFLAGS += -DBUILT_IN_CRYPTO
+#CFLAGS += -DENABLE_TKIP11N
+
+SMP := $(shell $(CC) $(CFLAGS) -E -dM $(CONFIG_FILE) | \
+   grep CONFIG_SMP | awk '{print $$3}')
+ifneq ($(SMP),1)
+   SMP := 0
+endif
+ifeq ($(SMP),1)
+   CFLAGS    += -D__SMP__
+endif
+OBJS := ${patsubst %.c, %.o, ${wildcard *.c}}
+
+ifeq ($(NIC_SELECT),RTL8190P)
+all:r8190_pci.o
+r8190_pci.o: \
+	rtl_core.o      \
+	rtl_eeprom.o     \
+	rtl_ps.o        \
+	rtl_dm.o \
+	rtl_wx.o \
+	rtl_cam.o	 \
+	rtl_pm.o \
+	rtl_debug.o \
+	rtl_ethtool.o         \
+	rtl8192e/r8190P_rtl8256.o \
+	rtl8192e/r8190P_hwimg.o \
+	rtl8192e/r8192E_dev.o	\
+	rtl8192e/r8192E_cmdpkt.o\
+	rtl8192e/r8192E_firmware.o \
+	rtl8192e/r8192E_phy.o \
+	../../rtllib/rtllib_rx.o                \
+	../../rtllib/rtllib_softmac.o           \
+	../../rtllib/rtllib_tx.o                \
+	../../rtllib/rtllib_wx.o                \
+	../../rtllib/rtllib_module.o            \
+	../../rtllib/rtllib_softmac_wx.o        \
+	../../rtllib/rtl819x_HTProc.o              \
+	../../rtllib/rtl819x_TSProc.o              \
+	../../rtllib/rtl819x_BAProc.o              \
+	../../rtllib/dot11d.o                      \
+	../../rtllib/rtllib_crypt.o             \
+	../../rtllib/rtllib_crypt_tkip.o        \
+	../../rtllib/rtllib_crypt_ccmp.o        \
+	../../rtllib/rtllib_crypt_wep.o	\
+	../../rtllib/api.o			\
+	../../rtllib/compress.o		\
+	../../rtllib/digest.o		\
+	../../rtllib/cipher.o		\
+	../../rtllib/scatterwalk.o		\
+	../../rtllib/arc4.o			\
+	../../rtllib/michael_mic.o		\
+	../../rtllib/aes.o			\
+	../../rtllib/proc.o
+
+	$(LD) -r $^ -o $@
+install:r8190_pci.o
+	install -p -m 644 r8190_pci.o  $(MODDESTDIR)
+	@depmod -a
+uninstall:
+	$(shell [ -d $(MODDESTDIR) ] && rm -f $(MODDESTDIR)/r8190_pci.o)
+	@depmod -a
+endif
+
+ifeq ($(NIC_SELECT),RTL8192E)
+all:r8192e_pci.o
+r8192e_pci.o: \
+	rtl_core.o \
+	rtl_eeprom.o \
+	rtl_ps.o 		\
+	rtl_dm.o \
+	rtl_wx.o \
+	rtl_cam.o	\
+	rtl_pm.o \
+	rtl_debug.o \
+	rtl_ethtool.o         \
+	rtl8192e/r8192E_dev.o           \
+	rtl8192e/r8190P_rtl8256.o \
+	rtl8192e/r8192E_hwimg.o \
+	rtl8192e/r8192E_cmdpkt.o\
+	rtl8192e/r8192E_firmware.o \
+	rtl8192e/r8192E_phy.o \
+	../../rtllib/rtllib_rx.o                \
+	../../rtllib/rtllib_softmac.o           \
+	../../rtllib/rtllib_tx.o                \
+	../../rtllib/rtllib_wx.o                \
+	../../rtllib/rtllib_module.o            \
+	../../rtllib/rtllib_softmac_wx.o        \
+	../../rtllib/rtl819x_HTProc.o              \
+	../../rtllib/rtl819x_TSProc.o              \
+	../../rtllib/rtl819x_BAProc.o              \
+	../../rtllib/dot11d.o                      \
+	../../rtllib/rtllib_crypt.o             \
+	../../rtllib/rtllib_crypt_tkip.o        \
+	../../rtllib/rtllib_crypt_ccmp.o        \
+	../../rtllib/rtllib_crypt_wep.o	\
+	../../rtllib/api.o			\
+	../../rtllib/compress.o		\
+	../../rtllib/digest.o		\
+	../../rtllib/cipher.o		\
+	../../rtllib/scatterwalk.o		\
+	../../rtllib/arc4.o			\
+	../../rtllib/michael_mic.o		\
+	../../rtllib/aes.o			\
+	../../rtllib/proc.o
+
+	$(LD) -r $^ -o $@
+install:
+	install -p -m 644 r8192e_pci.o  $(MODDESTDIR)
+	@depmod -a
+uninstall:
+	$(shell [ -d $(MODDESTDIR) ] && rm -f $(MODDESTDIR)/r8192e_pci.o)
+	@depmod -a
+endif
+
+ifeq ($(NIC_SELECT),RTL8192SE)
+all:r8192se_pci.o
+r8192se_pci.o: rtl_core.o \
+	rtl_debug.o \
+	rtl_ethtool.o \
+	rtl_eeprom.o \
+ 	rtl_ps.o        \
+	rtl_dm.o \
+	rtl_wx.o \
+	rtl_cam.o		\
+	rtl_pm.o \
+	rtl8192s/r8192S_dev.o \
+	rtl8192s/r8192S_Efuse.o \
+	rtl8192s/r8192S_firmware.o \
+	rtl8192s/r8192S_hwimg.o \
+	rtl8192s/r8192S_led.o \
+	rtl8192s/r8192S_phy.o \
+	rtl8192s/r8192S_rtl6052.o \
+	../../rtllib/rtllib_rx.o                \
+	../../rtllib/rtllib_softmac.o           \
+	../../rtllib/rtllib_tx.o                \
+	../../rtllib/rtllib_wx.o                \
+	../../rtllib/rtllib_module.o            \
+	../../rtllib/rtllib_softmac_wx.o        \
+	../../rtllib/rtl819x_HTProc.o              \
+	../../rtllib/rtl819x_TSProc.o              \
+	../../rtllib/rtl819x_BAProc.o              \
+	../../rtllib/dot11d.o                      \
+	../../rtllib/rtllib_crypt.o             \
+	../../rtllib/rtllib_crypt_tkip.o        \
+	../../rtllib/rtllib_crypt_ccmp.o        \
+	../../rtllib/rtllib_crypt_wep.o	\
+	../../rtllib/api.o			\
+	../../rtllib/compress.o		\
+	../../rtllib/digest.o		\
+	../../rtllib/cipher.o		\
+	../../rtllib/scatterwalk.o		\
+	../../rtllib/arc4.o			\
+	../../rtllib/michael_mic.o		\
+	../../rtllib/aes.o			\
+	../../rtllib/proc.o			\
+	../../rtllib/wapi.o			\
+	../../rtllib/wapi_interface.o
+#	rtl8192e/r8192E_cmdpkt.o 
+#	rtl8192e/r8190P_rtl8256.o 
+	$(LD) -r $^ -o $@
+install:r8192se_pci.o
+	install -p -m 644 r8192se_pci.o  $(MODDESTDIR)
+	@depmod -a
+uninstall:
+	$(shell [ -d $(MODDESTDIR) ] && rm -f $(MODDESTDIR)/r8192se_pci.o)
+	@depmod -a
+endif
+
+ifeq ($(NIC_SELECT),RTL8191SE_MESH )
+all:r8192se_pci_mesh.o
+r8192se_pci_mesh.o: 		\
+	rtl_core.o 		\
+	rtl_eeprom.o 		\
+	rtl_ps.o 		\
+	rtl_dm.o 		\
+	rtl_wx.o 		\
+	rtl_cam.o		\
+	rtl_pm.o 		\
+	rtl_debug.o 		\
+	rtl_ethtool.o 		\
+	rtl_mesh.o		\
+	rtl8192s/r8192S_dev.o 		\
+	rtl8192s/r8192S_Efuse.o 	\
+	rtl8192s/r8192S_firmware.o 	\
+	rtl8192s/r8192S_hwimg.o 	\
+	rtl8192s/r8192S_led.o 		\
+	rtl8192s/r8192S_phy.o 		\
+	rtl8192s/r8192S_rtl6052.o 	\
+	../../rtllib/rtllib_rx.o                \
+	../../rtllib/rtllib_softmac.o           \
+	../../rtllib/rtllib_tx.o                \
+	../../rtllib/rtllib_wx.o                \
+	../../rtllib/rtllib_module.o            \
+	../../rtllib/rtllib_softmac_wx.o        \
+	../../rtllib/rtl819x_HTProc.o              \
+	../../rtllib/rtl819x_TSProc.o              \
+	../../rtllib/rtl819x_BAProc.o              \
+	../../rtllib/dot11d.o                      \
+	../../rtllib/rtllib_crypt.o             \
+	../../rtllib/rtllib_crypt_tkip.o        \
+	../../rtllib/rtllib_crypt_ccmp.o        \
+	../../rtllib/rtllib_crypt_wep.o		\
+	../../mshclass/msh_class.o 			\
+	../../mshclass/mesh_8192_util.o  		\
+	../../mshclass/rtl8192_mesh.o 			\
+	../../mshclass/rtl8192s_sme.o 			\
+	../../mshclass/rtl8192_proc.o 			\
+	../../mshclass/8192s_pathsel.o 			\
+	../../mshclass/hash_table.o 			\
+	../../mshclass/pathselection.o 			\
+	../../mshclass/tree_proactive.o			\
+        ../../mshclass/hash_table.o                   \
+        ../../mshclass/sha1.o                         \
+        ../../mshclass/sha256.o                       \
+        ../../mshclass/aes.o                          \
+        ../../mshclass/mesh_abbr_handshk.o            \
+        ../../mshclass/bn_ctx.o                       \
+        ../../mshclass/bn_asm.o                       \
+        ../../mshclass/bn_gcd.o                       \
+        ../../mshclass/bn_mont.o                      \
+        ../../mshclass/bn_recp.o                      \
+        ../../mshclass/bn_lib.o                       \
+        ../../mshclass/mesh_ath.o
+#	rtl8192e/r8190P_rtl8256.o \	
+#	rtl8192e/r8192E_cmdpkt.o 
+	$(LD) -r $^ -o $@
+install:r8192se_pci_mesh.o
+	install -p -m 644 r8192se_pci_mesh.o  $(MODDESTDIR)
+	@depmod -a
+uninstall:
+	$(shell [ -d $(MODDESTDIR) ] && rm -f $(MODDESTDIR)/r8192se_pci_mesh.o)
+	@depmod -a
+endif
+endif
+
+.PHONY:clean
+clean:
+	rm -fr *.mod.c *.mod *.o .*.cmd *.ko *~
+	rm -fr .tmp_versions
+	rm -fr Modules.symvers
+	rm -fr Module.symvers
+	rm -fr Module.markers
+	rm -fr modules.order
+	rm -fr tags
+	@make -C $(sub_folder)/ clean
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl_ethtool.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl_ethtool.c
@@ -0,0 +1,59 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * Based on the r8180 driver, which is:
+ * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ *****************************************************************************
+ */
+#include <linux/netdevice.h>
+#include <linux/ethtool.h>
+#include <linux/delay.h>
+
+#include "rtl_core.h"
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)	
+static void rtl819x_ethtool_get_drvinfo(struct net_device *dev,
+		struct ethtool_drvinfo *info)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+
+	strcpy(info->driver, DRV_NAME);
+	strcpy(info->version, DRV_VERSION);
+#if defined RTL8192SE  
+	snprintf(info->fw_version, sizeof(info->fw_version), "%d",
+			priv->pFirmware->FirmwareVersion);
+#endif	
+	strcpy(info->bus_info, pci_name(priv->pdev));
+}
+
+static u32 rtl819x_ethtool_get_link(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+
+	return ((priv->rtllib->state == RTLLIB_LINKED) || 
+		(priv->rtllib->state == RTLLIB_LINKED_SCANNING));
+}
+
+const struct ethtool_ops rtl819x_ethtool_ops = {
+	.get_drvinfo = rtl819x_ethtool_get_drvinfo,
+	.get_link = rtl819x_ethtool_get_link,
+};
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl_pm.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl_pm.c
@@ -0,0 +1,193 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+
+#ifdef CONFIG_PM_RTL
+#ifdef RTL8192CE
+#include "rtl_core.h"
+#include "rtl8192c/r8192C_hw.h"
+#include "rtl8192c/r8192C_phy.h"
+#include "rtl8192c/r8192C_phyreg.h"
+#include "rtl8192c/r8192C_rtl6052.h"
+#elif defined RTL8192SE
+#include "rtl_core.h"
+#include "rtl8192s/r8192S_hw.h"
+#include "rtl8192s/r8192S_phy.h"
+#include "rtl8192s/r8192S_phyreg.h"
+#include "rtl8192s/r8192S_rtl6052.h"
+#else
+#include "rtl_core.h"
+#include "rtl8192e/r8192E_hw.h"
+#include "rtl8192e/r8190P_rtl8256.h"
+#endif
+#include "rtl_pm.h"
+
+int rtl8192E_save_state (struct pci_dev *dev, pm_message_t state)
+{
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10))
+        printk(KERN_NOTICE "r8192E save state call (state %u).\n", state);
+#else
+        printk(KERN_NOTICE "r8192E save state call (state %u).\n", state.event);
+#endif
+	return(-EAGAIN);
+}
+
+
+int rtl8192E_suspend (struct pci_dev *pdev, pm_message_t state)
+{
+	struct net_device *dev = pci_get_drvdata(pdev);
+	struct r8192_priv *priv = rtllib_priv(dev); 
+#if !(defined RTL8192SE || defined RTL8192CE)		
+	u32	ulRegRead;
+#endif
+
+        RT_TRACE(COMP_POWER, "============> r8192E suspend call.\n");
+        printk("============> r8192E suspend call.\n");
+#ifdef ENABLE_GPIO_RADIO_CTL
+	del_timer_sync(&priv->gpio_polling_timer);
+	cancel_delayed_work(&priv->gpio_change_rf_wq);
+	priv->polling_timer_on = 0;
+#endif
+
+        if (!netif_running(dev)){
+            printk("RTL819XE:UI is open out of suspend function\n");
+            goto out_pci_suspend;
+        }
+
+#ifdef HAVE_NET_DEVICE_OPS
+	if (dev->netdev_ops->ndo_stop)
+		dev->netdev_ops->ndo_stop(dev);
+#else
+	dev->stop(dev);
+#endif	
+	netif_device_detach(dev);
+
+#if !(defined RTL8192SE || defined RTL8192CE)		
+	if(!priv->rtllib->bSupportRemoteWakeUp) {
+		MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_INIT);
+		ulRegRead = read_nic_dword(dev, CPU_GEN);	
+		ulRegRead|=CPU_GEN_SYSTEM_RESET;
+		write_nic_dword(dev, CPU_GEN, ulRegRead);
+	} else {
+		write_nic_dword(dev, WFCRC0, 0xffffffff);
+		write_nic_dword(dev, WFCRC1, 0xffffffff);
+		write_nic_dword(dev, WFCRC2, 0xffffffff);
+#ifdef RTL8190P
+		ucRegRead = read_nic_byte(dev, GPO);
+		ucRegRead |= BIT0;
+		write_nic_byte(dev, GPO, ucRegRead);
+#endif			
+		write_nic_byte(dev, PMR, 0x5);
+		write_nic_byte(dev, MacBlkCtrl, 0xa);
+	}
+#endif
+out_pci_suspend:
+	RT_TRACE(COMP_POWER, "r8192E support WOL call??????????????????????\n");
+	printk("r8192E support WOL call??????????????????????\n");
+	if(priv->rtllib->bSupportRemoteWakeUp) {
+		RT_TRACE(COMP_POWER, "r8192E support WOL call!!!!!!!!!!!!!!!!!!.\n");
+	}
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10))
+	pci_save_state(pdev,&(priv->pci_state));
+        pci_disable_device(pdev);
+        pci_enable_wake(pdev, state,\
+                        priv->rtllib->bSupportRemoteWakeUp?1:0);
+        pci_set_power_state(pdev,state);
+#else
+	pci_save_state(pdev);
+	pci_disable_device(pdev);
+	pci_enable_wake(pdev, pci_choose_state(pdev,state),\
+			priv->rtllib->bSupportRemoteWakeUp?1:0);
+	pci_set_power_state(pdev,pci_choose_state(pdev,state));
+#endif
+
+        mdelay(20);
+
+	return 0;
+}
+
+int rtl8192E_resume (struct pci_dev *pdev)
+{
+    struct net_device *dev = pci_get_drvdata(pdev);
+#ifdef ENABLE_GPIO_RADIO_CTL
+    struct r8192_priv *priv = rtllib_priv(dev); 
+#endif
+    int err;
+    u32 val;
+
+    RT_TRACE(COMP_POWER, "================>r8192E resume call.");
+    printk("================>r8192E resume call.\n");
+
+    pci_set_power_state(pdev, PCI_D0);
+
+    err = pci_enable_device(pdev);
+    if(err) {
+        printk(KERN_ERR "%s: pci_enable_device failed on resume\n",
+                dev->name);
+        return err;
+    }
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10))
+    pci_restore_state(pdev,&(priv->pci_state));
+#else
+    pci_restore_state(pdev);
+#endif
+
+    pci_read_config_dword(pdev, 0x40, &val);
+    if ((val & 0x0000ff00) != 0) {
+        pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
+    }
+
+    pci_enable_wake(pdev, PCI_D0, 0);
+
+#ifdef ENABLE_GPIO_RADIO_CTL
+    if(priv->polling_timer_on == 0){
+        check_rfctrl_gpio_timer((unsigned long)dev);
+    }
+#endif
+
+    if(!netif_running(dev)){
+        printk("RTL819XE:UI is open out of resume function\n");
+        goto out;
+    }
+
+    netif_device_attach(dev);
+#ifdef HAVE_NET_DEVICE_OPS
+    if (dev->netdev_ops->ndo_open)
+	    dev->netdev_ops->ndo_open(dev);
+#else
+    dev->open(dev);
+#endif    
+out:
+    RT_TRACE(COMP_POWER, "<================r8192E resume call.\n");
+    return 0;
+}
+
+
+int rtl8192E_enable_wake (struct pci_dev *dev, pm_message_t state, int enable)
+{
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10))
+        printk(KERN_NOTICE "r8192E enable wake call (state %u, enable %d).\n", 
+	       state, enable);
+#else
+        printk(KERN_NOTICE "r8192E enable wake call (state %u, enable %d).\n", 
+	       state.event, enable);
+#endif
+	return(-EAGAIN);
+}
+
+#endif 
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl_regd.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl_regd.c
@@ -0,0 +1,390 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * Based on the ath driver, which is:
+ * Copyright (c) 2008-2009 Atheros Communications Inc.
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ ******************************************************************************/
+#ifdef CONFIG_CFG_80211
+#include "rtl_core.h"
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <net/cfg80211.h>
+
+#ifdef CONFIG_CRDA
+static struct country_code_to_enum_rd allCountries[] = {
+	{COUNTRY_CODE_FCC, "US"},
+	{COUNTRY_CODE_IC, "US"},
+	{COUNTRY_CODE_ETSI, "EC"},
+	{COUNTRY_CODE_SPAIN, "EC"},
+	{COUNTRY_CODE_FRANCE, "EC"},
+	{COUNTRY_CODE_MKK, "JP"},
+	{COUNTRY_CODE_MKK1, "JP"},
+	{COUNTRY_CODE_ISRAEL, "EC"},
+	{COUNTRY_CODE_TELEC, "JP"},
+	{COUNTRY_CODE_MIC, "JP"},
+	{COUNTRY_CODE_GLOBAL_DOMAIN, "JP"},
+	{COUNTRY_CODE_WORLD_WIDE_13, "EC"},
+	{COUNTRY_CODE_TELEC_NETGEAR, "EC"},
+};
+
+/* Only these channels all allow active scan on all world regulatory domains */
+#define RTL819x_2GHZ_CH01_11	REG_RULE(2412-10, 2462+10, 40, 0, 20, 0)
+
+/* We enable active scan on these a case by case basis by regulatory domain */
+#define RTL819x_2GHZ_CH12_13	REG_RULE(2467-10, 2472+10, 40, 0, 20, NL80211_RRF_PASSIVE_SCAN)
+#define RTL819x_2GHZ_CH14	REG_RULE(2484-10, 2484+10, 40, 0, 20, NL80211_RRF_PASSIVE_SCAN | \
+								      NL80211_RRF_NO_OFDM)
+
+static const struct ieee80211_regdomain rtl_regdom_11 = {
+	.n_reg_rules = 1,
+	.alpha2 =  "99",
+	.reg_rules = {
+		RTL819x_2GHZ_CH01_11,
+	}
+};
+
+static const struct ieee80211_regdomain rtl_regdom_global = {
+	.n_reg_rules = 3,
+	.alpha2 =  "99",
+	.reg_rules = {
+		RTL819x_2GHZ_CH01_11,
+		RTL819x_2GHZ_CH12_13, 
+		RTL819x_2GHZ_CH14,
+	}
+};
+
+static const struct ieee80211_regdomain rtl_regdom_world = {
+	.n_reg_rules = 2,
+	.alpha2 =  "99",
+	.reg_rules = {
+		RTL819x_2GHZ_CH01_11,
+		RTL819x_2GHZ_CH12_13,
+	}
+};
+
+static void rtl_reg_apply_chan_plan(struct wiphy *wiphy)
+{
+	struct net_device *dev = wiphy_to_net_device(wiphy);
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	struct rtllib_device *rtllib = priv->rtllib;
+	struct ieee80211_supported_band *sband;
+	struct ieee80211_channel *ch;
+	int i;
+
+	sband = wiphy->bands[IEEE80211_BAND_2GHZ];
+
+	for (i = 0; i < sband->n_channels; i++) {
+		ch = &sband->channels[i];
+		if (ch->flags & IEEE80211_CHAN_DISABLED) {
+			GET_DOT11D_INFO(rtllib)->channel_map[ch->hw_value] = 0;	
+		} else {
+			if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN) {
+				GET_DOT11D_INFO(rtllib)->channel_map[ch->hw_value] = 2;	
+			} else {
+				GET_DOT11D_INFO(rtllib)->channel_map[ch->hw_value] = 1;	
+			}
+		}
+
+	}
+
+	for (i = sband->n_channels - 1; i >= 0; i--) {
+		ch = &sband->channels[i];
+		if (!(ch->flags & IEEE80211_CHAN_NO_IBSS)) {
+			rtllib->ibss_maxjoin_chal = ch->hw_value;
+			break;
+		}
+	}
+
+	rtllib->IbssStartChnl = 10;
+
+	return;
+}
+
+void rtl_dump_channel_map(struct wiphy *wiphy)
+{
+	enum ieee80211_band band;
+	struct ieee80211_supported_band *sband;
+	struct ieee80211_channel *ch;
+	unsigned int i;
+
+	for (band = 0; band < IEEE80211_NUM_BANDS; band++) {
+
+		if (!wiphy->bands[band])
+			continue;
+
+		sband = wiphy->bands[band];
+
+		for (i = 0; i < sband->n_channels; i++) {
+			ch = &sband->channels[i];
+			printk("chan:%d, NO_IBSS:%d," 
+					" PASSIVE_SCAN:%d, RADAR:%d, DISABLED:%d\n", i+1,
+					(ch->flags&IEEE80211_CHAN_NO_IBSS) ? 1:0, 
+					(ch->flags&IEEE80211_CHAN_PASSIVE_SCAN) ? 1:0,
+					(ch->flags&IEEE80211_CHAN_RADAR) ? 1:0,
+					(ch->flags&IEEE80211_CHAN_DISABLED) ? 1:0
+			      );
+		}
+
+	}
+}
+
+static void rtl_reg_apply_world_flags(struct wiphy *wiphy,
+				      enum nl80211_reg_initiator initiator,
+				      struct rtl_regulatory *reg)
+{
+	rtl_reg_apply_chan_plan(wiphy);
+	return;
+}
+
+int rtl_reg_notifier_apply(struct wiphy *wiphy,
+			   struct regulatory_request *request,
+			   struct rtl_regulatory *reg)
+{
+	switch (request->initiator) {
+	case NL80211_REGDOM_SET_BY_CORE:
+		break;
+	case NL80211_REGDOM_SET_BY_DRIVER:
+	case NL80211_REGDOM_SET_BY_USER:
+		rtl_reg_apply_world_flags(wiphy, request->initiator, reg);
+		rtl_dump_channel_map(wiphy);
+		break;
+	case NL80211_REGDOM_SET_BY_COUNTRY_IE:
+		rtl_reg_apply_world_flags(wiphy, request->initiator, reg);
+		rtl_dump_channel_map(wiphy);
+		break;
+	}
+
+	return 0;
+}
+
+static const struct
+ieee80211_regdomain *rtl_regdomain_select(struct rtl_regulatory *reg)
+{
+	switch (reg->country_code) {
+	case COUNTRY_CODE_FCC:
+	case COUNTRY_CODE_IC:
+		return &rtl_regdom_11;
+	case COUNTRY_CODE_ETSI:
+	case COUNTRY_CODE_SPAIN:
+	case COUNTRY_CODE_FRANCE:
+	case COUNTRY_CODE_ISRAEL:
+	case COUNTRY_CODE_TELEC_NETGEAR:
+		return &rtl_regdom_world;
+	case COUNTRY_CODE_MKK:
+	case COUNTRY_CODE_MKK1:
+	case COUNTRY_CODE_TELEC:
+	case COUNTRY_CODE_MIC:
+		return &rtl_regdom_global;
+	case COUNTRY_CODE_GLOBAL_DOMAIN:
+		return &rtl_regdom_global;
+	case COUNTRY_CODE_WORLD_WIDE_13:
+		return &rtl_regdom_world;
+	default:
+		WARN_ON(1);
+		return &rtl_regdom_world;
+	}
+}
+
+static int
+rtl_regd_init_wiphy(struct rtl_regulatory *reg,
+		    struct wiphy *wiphy,
+		    int (*reg_notifier)(struct wiphy *wiphy,
+					struct regulatory_request *request))
+{
+	const struct ieee80211_regdomain *regd;
+
+	wiphy->reg_notifier = reg_notifier;
+
+	wiphy->custom_regulatory = true;
+	wiphy->strict_regulatory = false;
+
+	regd = rtl_regdomain_select(reg);
+
+	wiphy->disable_beacon_hints = true;
+	wiphy_apply_custom_regulatory(wiphy, regd);
+
+	rtl_reg_apply_world_flags(wiphy, NL80211_REGDOM_SET_BY_DRIVER, reg);
+	return 0;
+}
+
+static struct 
+country_code_to_enum_rd *rtl_regd_find_country(u16 countryCode)
+{       
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(allCountries); i++) {
+		if (allCountries[i].countryCode == countryCode)
+			return &allCountries[i];
+	}
+	return NULL;
+} 
+
+int rtl_regd_init(struct net_device *dev,
+	      int (*reg_notifier)(struct wiphy *wiphy,
+				  struct regulatory_request *request))
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);	
+	struct rtl_regulatory *reg = &priv->rtllib->regulatory;
+	struct wiphy *wiphy = priv->rtllib->wdev.wiphy;
+	struct country_code_to_enum_rd *country = NULL;
+
+	if (wiphy == NULL || reg == NULL){
+		return -EINVAL;
+	}
+
+	printk(KERN_DEBUG "rtl: EEPROM regdomain: 0x%0x\n", priv->ChannelPlan);
+
+	reg->country_code = priv->ChannelPlan;
+
+	if (reg->country_code >= COUNTRY_CODE_MAX) {
+		printk(KERN_DEBUG "rtl: EEPROM indicates invalid contry code"
+		       "world wide 13 should be used\n");
+		reg->country_code = COUNTRY_CODE_WORLD_WIDE_13;
+	}
+
+	country = rtl_regd_find_country(reg->country_code);
+
+	if (country) {
+		reg->alpha2[0] = country->isoName[0];
+		reg->alpha2[1] = country->isoName[1];
+	} else {
+		reg->alpha2[0] = '0';
+		reg->alpha2[1] = '0';
+	}
+
+	printk(KERN_DEBUG "rtl: Country alpha2 being used: %c%c\n",
+		reg->alpha2[0], reg->alpha2[1]);
+	rtl_regd_init_wiphy(reg, wiphy, reg_notifier);
+	rtl_dump_channel_map(wiphy);
+	return 0;
+}
+
+int rtl_reg_notifier(struct wiphy *wiphy,
+			      struct regulatory_request *request)
+{
+	struct net_device *dev = wiphy_to_net_device(wiphy);
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);	
+	struct rtl_regulatory *reg = &priv->rtllib->regulatory;
+
+	printk("rtl_regd: %s\n", __func__);
+	return rtl_reg_notifier_apply(wiphy, request, reg);
+}
+#endif
+
+struct net_device *wiphy_to_net_device(struct wiphy *wiphy)
+{
+	struct rtllib_device *rtllib;
+
+	rtllib = wiphy_priv(wiphy);
+	return rtllib->dev;
+}
+
+static const struct ieee80211_rate rtl819x_rates[] = {
+	{ .bitrate = 10, .hw_value = 0, },
+	{ .bitrate = 20, .hw_value = 1, },
+	{ .bitrate = 55, .hw_value = 2, },
+	{ .bitrate = 110, .hw_value = 3, },
+	{ .bitrate = 60, .hw_value = 4, },
+	{ .bitrate = 90, .hw_value = 5, },
+	{ .bitrate = 120, .hw_value = 6, },
+	{ .bitrate = 180, .hw_value = 7, },
+	{ .bitrate = 240, .hw_value = 8, },
+	{ .bitrate = 360, .hw_value = 9, },
+	{ .bitrate = 480, .hw_value = 10, },
+	{ .bitrate = 540, .hw_value = 11, },
+};
+
+#define CHAN2G(_freq, _flags, _idx)  { \
+	        .band = IEEE80211_BAND_2GHZ, \
+	        .center_freq = (_freq), \
+		.flags = (_flags), \
+	        .hw_value = (_idx), \
+	        .max_power = 20, \
+}
+
+static struct ieee80211_channel rtl819x_2ghz_chantable[] = {
+	CHAN2G(2412, 0, 1), /* Channel 1 */
+	CHAN2G(2417, 0, 2), /* Channel 2 */
+	CHAN2G(2422, 0, 3), /* Channel 3 */
+	CHAN2G(2427, 0, 4), /* Channel 4 */
+	CHAN2G(2432, 0, 5), /* Channel 5 */
+	CHAN2G(2437, 0, 6), /* Channel 6 */
+	CHAN2G(2442, 0, 7), /* Channel 7 */
+	CHAN2G(2447, 0, 8), /* Channel 8 */
+	CHAN2G(2452, 0, 9), /* Channel 9 */
+	CHAN2G(2457, 0, 10), /* Channel 10 */
+	CHAN2G(2462, 0, 11), /* Channel 11 */
+	CHAN2G(2467, IEEE80211_CHAN_NO_IBSS|IEEE80211_CHAN_PASSIVE_SCAN, 12), /* Channel 12 */
+	CHAN2G(2472, IEEE80211_CHAN_NO_IBSS|IEEE80211_CHAN_PASSIVE_SCAN, 13), /* Channel 13 */
+	CHAN2G(2484, IEEE80211_CHAN_NO_IBSS|IEEE80211_CHAN_PASSIVE_SCAN, 14), /* Channel 14 */
+};
+
+int rtllib_set_geo(struct r8192_priv *priv)
+{	
+	priv->bands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
+	priv->bands[IEEE80211_BAND_2GHZ].channels = rtl819x_2ghz_chantable;
+	priv->bands[IEEE80211_BAND_2GHZ].n_channels = ARRAY_SIZE(rtl819x_2ghz_chantable);
+	
+	memcpy(&priv->rates[IEEE80211_BAND_2GHZ], rtl819x_rates, sizeof(rtl819x_rates));
+
+	priv->bands[IEEE80211_BAND_2GHZ].n_bitrates = ARRAY_SIZE(rtl819x_rates);
+	priv->bands[IEEE80211_BAND_2GHZ].bitrates = priv->rates[IEEE80211_BAND_2GHZ];
+
+	return 0;
+}
+
+bool rtl8192_register_wiphy_dev(struct net_device *dev)
+{	
+	struct r8192_priv *priv = rtllib_priv(dev);
+	struct wireless_dev *wdev = &priv->rtllib->wdev;
+#ifdef CONFIG_CRDA
+	struct rtl_regulatory *reg;
+#endif
+	memcpy(wdev->wiphy->perm_addr, dev->dev_addr, ETH_ALEN);
+	wdev->wiphy->bands[IEEE80211_BAND_2GHZ] = &(priv->bands[IEEE80211_BAND_2GHZ]);
+	set_wiphy_dev(wdev->wiphy, &priv->pdev->dev);
+
+#ifdef CONFIG_CRDA
+	if (rtl_regd_init(dev, rtl_reg_notifier)) {
+		return false;
+	}
+#endif
+
+	if (wiphy_register(wdev->wiphy)) {
+		return false;
+	}
+
+#ifdef CONFIG_CRDA
+	reg = &priv->rtllib->regulatory;
+	if (reg != NULL) {
+		if (regulatory_hint(wdev->wiphy, reg->alpha2)) {
+			printk("########>%s() regulatory_hint fail\n", __func__);
+			;
+		} else {
+			printk("########>#%s() regulatory_hint success\n", __func__);
+		}
+	} else {
+		printk("#########%s() regulator null\n", __func__);
+	}
+#endif
+	return true;
+}
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl_core.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl_core.h
@@ -0,0 +1,1449 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * Based on the r8180 driver, which is:
+ * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+
+#ifndef _RTL_CORE_H
+#define _RTL_CORE_H
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/ioport.h>
+#include <linux/sched.h>
+#include <linux/types.h>
+#include <linux/slab.h>
+#include <linux/netdevice.h>
+#include <linux/pci.h>
+#include <linux/etherdevice.h>
+#include <linux/delay.h>
+#include <linux/rtnetlink.h>	
+#include <linux/wireless.h>
+#include <linux/timer.h>
+#include <linux/proc_fs.h>	
+#include <linux/if_arp.h>
+#include <linux/random.h>
+#include <linux/version.h>
+#include <asm/io.h>
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27))
+#include <asm/semaphore.h>
+#endif
+#include "rtllib/rtllib.h"
+
+#ifdef ENABLE_DOT11D
+#include "rtllib/dot11d.h"
+#endif
+
+#ifdef RTL8192SE
+#include "rtl8192s/r8192S_phy.h"
+#include "rtl8192s/r8192S_phyreg.h"
+#include "rtl8192s/r8192S_firmware.h"
+#include "rtl8192s/r8192S_hw.h"
+#elif defined RTL8190P || defined RTL8192E
+#include "rtl8192e/r8192E_firmware.h"
+#include "rtl8192e/r8192E_hw.h"
+#endif
+
+#ifdef RTL8192SE
+#include "rtl8192s/r8192S_scan.h"
+#include "rtl8192s/r8192S_dev.h"
+#include "rtl8192s/r8192S_led.h"
+#include "rtl8192s/r8192S_def.h"
+#include "rtl8192s/r8192S_mp.h"
+#elif defined RTL8190P || defined RTL8192E
+#include "rtl8192e/r8190P_def.h"
+#include "rtl8192e/r8192E_dev.h"
+#elif defined RTL8192CE
+#include "rtl8192c/r8192C_dev.h"
+#include "rtl8192c/r8192C_led.h"
+#include "rtl8192c/r8192C_def.h"
+#include "rtl8192c/r8192C_phy.h"
+#include "rtl8192c/r8192C_phyreg.h"
+#include "rtl8192c/r8192C_firmware.h"
+#include "rtl8192c/r8192C_hw.h"
+#include "rtl8192c/r8192C_rtl6052.h"
+#include "rtl8192c/r8192C_Efuse.h"
+#include "rtl8192c/r8192C_com.h"
+#endif
+
+#ifdef CONFIG_CFG_80211 
+#include "rtl_regd.h"
+#endif
+
+#ifdef CONFIG_RTL_RFKILL
+#include "rtl_rfkill.h"
+#endif
+
+#include "rtl_debug.h"
+#include "rtl_eeprom.h"
+#include "rtl_ps.h"
+#include "rtl_cam.h"
+
+#define DRV_COPYRIGHT  "Copyright(c) 2008 - 2010 Realsil Semiconductor Corporation"
+#define DRV_AUTHOR  "<wlanfae@realtek.com>"
+#define DRV_VERSION  "0015.0127.2010"
+
+#ifdef RTL8190P
+#define DRV_NAME "rtl819xP"
+#elif defined RTL8192E
+#define DRV_NAME "rtl819xE"
+#elif defined RTL8192SE
+#define DRV_NAME "rtl819xSE"
+#elif defined RTL8192CE
+#define DRV_NAME "rtl8192CE"
+#endif
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
+#define RTL_PCI_DEVICE(vend, dev, cfg) \
+	.vendor = (vend), .device = (dev), \
+	.subvendor = PCI_ANY_ID, .subdevice =PCI_ANY_ID , \
+	.driver_data = (kernel_ulong_t)&(cfg)
+#else
+#define RTL_PCI_DEVICE(vend, dev, cfg) \
+	.vendor = (vend), .device = (dev), \
+	.subvendor = PCI_ANY_ID, .subdevice =PCI_ANY_ID
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
+	typedef void irqreturn_type; 
+#else
+	typedef irqreturn_t irqreturn_type; 
+#endif
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10))
+
+#if !defined(PCI_CAP_ID_EXP)
+#define PCI_CAP_ID_EXP			    0x10
+#endif
+#if !defined(PCI_EXP_LNKCTL)
+#define PCI_EXP_LNKCTL			    0x10
+#endif
+
+typedef int __bitwise pci_power_t; 
+#define PCI_D0		((pci_power_t __force) 0)
+#define PCI_D1		((pci_power_t __force) 1)
+#define PCI_D2		((pci_power_t __force) 2)
+#define PCI_D3hot	((pci_power_t __force) 3)
+#define PCI_D3cold	((pci_power_t __force) 4)
+#define PCI_UNKNOWN	((pci_power_t __force) 5)
+#define PCI_POWER_ERROR	((pci_power_t __force) -1)
+
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)
+	#define rtl8192_interrupt(x,y,z) rtl8192_interrupt_rsl(x,y,z)
+#else
+	#define rtl8192_interrupt(x,y,z) rtl8192_interrupt_rsl(x,y)
+#endif
+
+#define RTL_MAX_SCAN_SIZE 128 
+
+#define RTL_RATE_MAX     	30
+
+#define TOTAL_CAM_ENTRY 	32
+#define CAM_CONTENT_COUNT 	8
+
+#ifndef BIT
+#define BIT(_i)				(1<<(_i))
+#endif
+
+#define DMESG(x,a...)
+#define DMESGW(x,a...)
+#define DMESGE(x,a...)
+extern u32 rt_global_debug_component;
+#define RT_TRACE(component, x, args...) \
+do { if(rt_global_debug_component & component) \
+	printk(KERN_DEBUG DRV_NAME ":" x "\n" , \
+	       ##args);\
+}while(0);
+
+#ifdef _RTL8192_EXT_PATCH_	
+#define IS_NIC_DOWN(priv)	((!(priv)->up) && (!(priv)->mesh_up))
+#else  
+#define IS_NIC_DOWN(priv)	(!(priv)->up)
+#endif  
+
+#ifdef RTL8192CE
+#define RT_ASSERT(_Exp,Fmt)				\
+		if(!(_Exp))						\
+		{								\
+			printk("Rtl819x: ");				\
+			printk Fmt;					\
+		}
+#define		PHY_BBR				BIT0
+#define		PHY_BBW				BIT1
+#define		PHY_RFR				BIT2
+#define		PHY_RFW				BIT3
+#define		PHY_MACR				BIT4
+#define		PHY_MACW				BIT5
+#define		PHY_ALLR				BIT6
+#define		PHY_ALLW				BIT7
+#define		PHY_TXPWR				BIT8
+#define		PHY_PWRDIFF			BIT9
+/* Define different debug flag for dedicated service modules in debug flag array. */
+typedef enum tag_DBGP_Flag_Type_Definition
+{
+	FQoS				= 0,	
+	FTX					= 1,
+	FRX					= 2,	
+	FSEC				= 3,
+	FMGNT				= 4,
+	FMLME				= 5,
+	FRESOURCE			= 6,
+	FBEACON				= 7,
+	FISR				= 8,
+	FPHY				= 9,
+	FMP					= 10,
+	FEEPROM			= 11,
+	FPWR				= 12,
+	FDM					= 13,
+	FDBGCtrl			= 14,
+	FC2H				= 15,
+	FBT					= 16,
+	FINIT				= 17,
+	DBGP_TYPE_MAX
+}DBGP_FLAG_E;
+#define		INIT_EEPROM				BIT0
+#define		INIT_TxPower				BIT1
+#define		INIT_IQK					BIT2
+#define		EFUSE_READ_ALL			BIT2
+#define		EFUSE_PG					BIT1
+#define		DM_Monitor			BIT2
+#define		TX_DESC				BIT3
+#define RTPRINT(dbgtype, dbgflag, printstr)	\
+		{									\
+			if(dbgflag == TX_DESC) \
+			{								\
+				printk printstr;				\
+			}								\
+		}
+
+#define RT_PRINT_DATA(_Comp, _TitleString, _HexData, _HexDataLen)			\
+		do {\
+			if((_Comp) & rt_global_debug_component )	\
+			{									\
+				int __i;								\
+				u8*	ptr = (u8*)_HexData;				\
+				printk("Rtl819x: ");						\
+				printk(_TitleString);						\
+				for( __i=0; __i<(int)_HexDataLen; __i++ )				\
+				{								\
+					printk("%02X%s", ptr[__i], (((__i + 1) % 4) == 0)?"  ":" ");	\
+					if (((__i + 1) % 16) == 0)	printk("\n");			\
+				}								\
+				printk("\n");							\
+			} \
+		}while(0);			
+#endif
+                                       
+#define RTL819x_DEBUG                  
+#ifdef RTL819x_DEBUG                   
+#define assert(expr) \
+        if (!(expr)) {                                  \
+                printk( "Assertion failed! %s,%s,%s,line=%d\n", \
+                #expr,__FILE__,__FUNCTION__,__LINE__);          \
+        }
+#define RT_DEBUG_DATA(level, data, datalen)      \
+        do{ if ((rt_global_debug_component & (level)) == (level))   \
+                {       \
+                        int _i;                                  \
+                        u8* _pdata = (u8*) data;                 \
+                        printk(KERN_DEBUG DRV_NAME ": %s()\n", __FUNCTION__);   \
+                        for(_i=0; _i<(int)(datalen); _i++)                 \
+                        {                                               \
+                                printk("%2x ", _pdata[_i]);               \
+                                if ((_i+1)%16 == 0) printk("\n");        \
+                        }                               \
+                        printk("\n");                   \
+                }                                       \
+        } while (0)  
+#else
+#define assert(expr) do {} while (0)
+#define RT_DEBUG_DATA(level, data, datalen) do {} while(0)
+#endif 
+
+#ifdef _RTL8192_EXT_PATCH_
+#define IS_UNDER_11N_AES_MODE(_rtllib)  ((_rtllib->pHTInfo->bCurrentHTSupport == true) &&\
+					((_rtllib->pairwise_key_type == KEY_TYPE_CCMP) || \
+					 (_rtllib->mesh_pairwise_key_type == KEY_TYPE_CCMP)))
+#else
+#define IS_UNDER_11N_AES_MODE(_rtllib)  ((_rtllib->pHTInfo->bCurrentHTSupport == true) &&\
+					(_rtllib->pairwise_key_type == KEY_TYPE_CCMP))
+#endif
+
+#define HAL_MEMORY_MAPPED_IO_RANGE_8190PCI 	0x1000     
+#define HAL_HW_PCI_REVISION_ID_8190PCI			0x00
+#define HAL_MEMORY_MAPPED_IO_RANGE_8192PCIE	0x4000	
+#define HAL_HW_PCI_REVISION_ID_8192PCIE		0x01
+#define HAL_MEMORY_MAPPED_IO_RANGE_8192SE	0x4000	
+#define HAL_HW_PCI_REVISION_ID_8192SE 	0x10
+#define HAL_HW_PCI_REVISION_ID_8192CE			0x1
+#define HAL_MEMORY_MAPPED_IO_RANGE_8192CE	0x4000	
+#define HAL_HW_PCI_REVISION_ID_8192DE			0x0
+#define HAL_MEMORY_MAPPED_IO_RANGE_8192DE	0x4000	
+
+#define HAL_HW_PCI_8180_DEVICE_ID             		0x8180
+#define HAL_HW_PCI_8185_DEVICE_ID             		0x8185	
+#define HAL_HW_PCI_8188_DEVICE_ID             		0x8188	
+#define HAL_HW_PCI_8198_DEVICE_ID             		0x8198	
+#define HAL_HW_PCI_8190_DEVICE_ID             		0x8190	
+#define HAL_HW_PCI_8192_DEVICE_ID             		0x8192	
+#define HAL_HW_PCI_8192SE_DEVICE_ID             		0x8192	
+#define HAL_HW_PCI_8174_DEVICE_ID             		0x8174	
+#define HAL_HW_PCI_8173_DEVICE_ID             		0x8173	
+#define HAL_HW_PCI_8172_DEVICE_ID             		0x8172	
+#define HAL_HW_PCI_8171_DEVICE_ID             		0x8171	
+#define HAL_HW_PCI_0045_DEVICE_ID				0x0045	
+#define HAL_HW_PCI_0046_DEVICE_ID				0x0046	
+#define HAL_HW_PCI_0044_DEVICE_ID				0x0044	
+#define HAL_HW_PCI_0047_DEVICE_ID				0x0047	
+#define HAL_HW_PCI_700F_DEVICE_ID		   		0x700F
+#define HAL_HW_PCI_701F_DEVICE_ID		   		0x701F
+#define HAL_HW_PCI_DLINK_DEVICE_ID				0x3304
+#define HAL_HW_PCI_8192CET_DEVICE_ID             	0x8191	
+#define HAL_HW_PCI_8192CE_DEVICE_ID             		0x8178	
+#define HAL_HW_PCI_8191CE_DEVICE_ID             		0x8177	
+#define HAL_HW_PCI_8188CE_DEVICE_ID             		0x8176	
+#define HAL_HW_PCI_8192CU_DEVICE_ID             		0x8191	
+#define HAL_HW_PCI_8192DE_DEVICE_ID             		0x092D	
+#define HAL_HW_PCI_8192DU_DEVICE_ID             		0x092D	
+
+#ifdef RTL8192CE
+#define RTL819X_DEFAULT_RF_TYPE 	RF_2T2R
+#else
+#define RTL819X_DEFAULT_RF_TYPE 	RF_1T2R
+#endif
+
+#define RTLLIB_WATCH_DOG_TIME    	2000
+
+#define MAX_DEV_ADDR_SIZE		8  /* support till 64 bit bus width OS */
+#define MAX_FIRMWARE_INFORMATION_SIZE   32 
+#define MAX_802_11_HEADER_LENGTH       	(40 + MAX_FIRMWARE_INFORMATION_SIZE)
+#define ENCRYPTION_MAX_OVERHEAD		128
+#define MAX_FRAGMENT_COUNT		8
+#define MAX_TRANSMIT_BUFFER_SIZE  	(1600+(MAX_802_11_HEADER_LENGTH+ENCRYPTION_MAX_OVERHEAD)*MAX_FRAGMENT_COUNT) 
+
+#define scrclng				4		
+
+#define DEFAULT_FRAG_THRESHOLD 	2342U
+#define MIN_FRAG_THRESHOLD     	256U
+#define DEFAULT_BEACONINTERVAL 	0x64U
+
+#define DEFAULT_SSID 		""
+#define DEFAULT_RETRY_RTS	7
+#define DEFAULT_RETRY_DATA 	7
+#define PRISM_HDR_SIZE 		64
+
+#define	PHY_RSSI_SLID_WIN_MAX		 	100
+
+#define RTL_IOCTL_WPA_SUPPLICANT		SIOCIWFIRSTPRIV+30
+
+#define TxBBGainTableLength 		        37
+#define CCKTxBBGainTableLength 	                23
+
+#define CHANNEL_PLAN_LEN			10
+#define sCrcLng 		                4
+
+#define NIC_SEND_HANG_THRESHOLD_NORMAL		4        
+#define NIC_SEND_HANG_THRESHOLD_POWERSAVE 	8
+
+#define MAX_TX_QUEUE				9 
+
+#if defined RTL8192SE || defined RTL8192CE
+#define MAX_RX_QUEUE				2
+#else 
+#define MAX_RX_QUEUE				1
+#endif
+
+#define MAX_RX_COUNT                            64
+#define MAX_TX_QUEUE_COUNT                      9        
+
+enum RTL819x_PHY_PARAM {
+	RTL819X_PHY_MACPHY_REG		= 0,		
+	RTL819X_PHY_MACPHY_REG_PG	= 1,		
+	RTL8188C_PHY_MACREG			=2,		
+	RTL8192C_PHY_MACREG			=3,		
+	RTL819X_PHY_REG				= 4,		
+	RTL819X_PHY_REG_1T2R			= 5,		
+	RTL819X_PHY_REG_to1T1R		= 6,		
+	RTL819X_PHY_REG_to1T2R		= 7,		
+	RTL819X_PHY_REG_to2T2R		= 8,		
+	RTL819X_PHY_REG_PG			= 9,		
+	RTL819X_AGC_TAB				= 10,		
+	RTL819X_PHY_RADIO_A			=11,		
+	RTL819X_PHY_RADIO_A_1T		=12,		
+	RTL819X_PHY_RADIO_A_2T		=13,		
+	RTL819X_PHY_RADIO_B			=14,		
+	RTL819X_PHY_RADIO_B_GM		=15,		
+	RTL819X_PHY_RADIO_C			=16,		
+	RTL819X_PHY_RADIO_D			=17,		
+	RTL819X_EEPROM_MAP			=18,		
+	RTL819X_EFUSE_MAP				=19,		
+};
+
+enum RTL_DEBUG {
+	COMP_TRACE		= BIT0,	 
+	COMP_DBG		= BIT1,	 
+	COMP_INIT		= BIT2,	 
+	COMP_RECV		= BIT3,	 
+	COMP_SEND		= BIT4,	 
+	COMP_CMD		= BIT5,	 
+	COMP_POWER	        = BIT6,	 
+	COMP_EPROM	        = BIT7,	 
+	COMP_SWBW		= BIT8,	 
+	COMP_SEC		= BIT9,	 
+	COMP_LPS		= BIT10, 
+	COMP_QOS		= BIT11, 
+	COMP_RATE		= BIT12, 
+	COMP_RXDESC	        = BIT13, 
+	COMP_PHY		= BIT14, 
+	COMP_DIG		= BIT15, 
+	COMP_TXAGC		= BIT16, 
+	COMP_HALDM	        = BIT17, 
+	COMP_POWER_TRACKING	= BIT18, 
+	COMP_CH		        = BIT19, 
+	COMP_RF		        = BIT20, 
+	COMP_FIRMWARE	        = BIT21, 
+	COMP_HT		        = BIT22, 
+	COMP_RESET		= BIT23,
+	COMP_CMDPKT	        = BIT24,
+	COMP_SCAN		= BIT25,
+	COMP_PS		        = BIT26,
+	COMP_DOWN		= BIT27, 
+	COMP_INTR 		= BIT28, 
+	COMP_LED		= BIT29, 
+	COMP_MLME		= BIT30, 
+	COMP_ERR		= BIT31  
+};
+
+typedef enum{
+	NIC_UNKNOWN     = 0,
+	NIC_8192E       = 1,
+	NIC_8190P       = 2,
+	NIC_8192SE      = 4,
+	NIC_8192CE      	= 5,
+	NIC_8192CU      	= 6,
+	NIC_8192DE      	= 7,
+	NIC_8192DU      	= 8,
+	} nic_t;
+
+typedef	enum _RT_EEPROM_TYPE{
+	EEPROM_93C46,
+	EEPROM_93C56,
+	EEPROM_BOOT_EFUSE,
+}RT_EEPROM_TYPE,*PRT_EEPROM_TYPE;
+
+typedef enum _tag_TxCmd_Config_Index{
+	TXCMD_TXRA_HISTORY_CTRL	        = 0xFF900000,
+	TXCMD_RESET_TX_PKT_BUFF		= 0xFF900001,
+	TXCMD_RESET_RX_PKT_BUFF		= 0xFF900002,
+	TXCMD_SET_TX_DURATION		= 0xFF900003,
+	TXCMD_SET_RX_RSSI		= 0xFF900004,
+	TXCMD_SET_TX_PWR_TRACKING	= 0xFF900005,
+	TXCMD_XXXX_CTRL,
+}DCMD_TXCMD_OP;
+
+typedef enum _RT_RF_TYPE_819xU{
+        RF_TYPE_MIN = 0,
+        RF_8225,
+        RF_8256,
+        RF_8258,
+        RF_6052=4,		
+        RF_PSEUDO_11N = 5,
+}RT_RF_TYPE_819xU, *PRT_RF_TYPE_819xU;
+
+typedef enum tag_Rf_Operatetion_State
+{    
+    RF_STEP_INIT = 0,
+    RF_STEP_NORMAL,   
+    RF_STEP_MAX
+}RF_STEP_E;
+
+typedef enum _RT_STATUS{
+	RT_STATUS_SUCCESS,
+	RT_STATUS_FAILURE,
+	RT_STATUS_PENDING,
+	RT_STATUS_RESOURCE
+}RT_STATUS,*PRT_STATUS;
+
+typedef enum _RT_CUSTOMER_ID
+{
+	RT_CID_DEFAULT          = 0,
+	RT_CID_8187_ALPHA0      = 1,
+	RT_CID_8187_SERCOMM_PS  = 2,
+	RT_CID_8187_HW_LED      = 3,
+	RT_CID_8187_NETGEAR     = 4,
+	RT_CID_WHQL             = 5,
+	RT_CID_819x_CAMEO       = 6, 
+	RT_CID_819x_RUNTOP      = 7,
+	RT_CID_819x_Senao       = 8,
+	RT_CID_TOSHIBA          = 9,	
+	RT_CID_819x_Netcore     = 10,
+	RT_CID_Nettronix        = 11,
+	RT_CID_DLINK            = 12,
+	RT_CID_PRONET           = 13,
+	RT_CID_COREGA           = 14,
+	RT_CID_819x_ALPHA       = 15,
+	RT_CID_819x_Sitecom     = 16,
+	RT_CID_CCX              = 17, 
+	RT_CID_819x_Lenovo      = 18,	
+	RT_CID_819x_QMI         = 19,
+	RT_CID_819x_Edimax_Belkin = 20,		
+	RT_CID_819x_Sercomm_Belkin = 21,			
+	RT_CID_819x_CAMEO1 = 22,
+	RT_CID_819x_MSI = 23,
+	RT_CID_819x_Acer = 24,
+	RT_CID_819x_HP	=27,
+}RT_CUSTOMER_ID, *PRT_CUSTOMER_ID;
+
+typedef enum _RT_OP_MODE{
+	RT_OP_MODE_AP,
+	RT_OP_MODE_INFRASTRUCTURE,
+	RT_OP_MODE_IBSS,
+	RT_OP_MODE_NO_LINK,
+}RT_OP_MODE, *PRT_OP_MODE;
+
+typedef enum _RESET_TYPE {
+	RESET_TYPE_NORESET = 0x00,
+	RESET_TYPE_NORMAL = 0x01,
+	RESET_TYPE_SILENT = 0x02
+} RESET_TYPE;
+
+typedef enum _IC_INFERIORITY_8192S{
+	IC_INFERIORITY_A            = 0, 
+	IC_INFERIORITY_B            = 1, 
+}IC_INFERIORITY_8192S, *PIC_INFERIORITY_8192S;
+
+typedef enum _PCI_BRIDGE_VENDOR {
+	PCI_BRIDGE_VENDOR_INTEL = 0x01,
+	PCI_BRIDGE_VENDOR_ATI = 0x02,
+	PCI_BRIDGE_VENDOR_AMD = 0x04,
+	PCI_BRIDGE_VENDOR_SIS = 0x08,
+	PCI_BRIDGE_VENDOR_UNKNOWN = 0x40,
+	PCI_BRIDGE_VENDOR_MAX = 0x80
+} PCI_BRIDGE_VENDOR;
+
+typedef struct buffer
+{
+	struct buffer *next;
+	u32 *buf;
+	dma_addr_t dma;
+	
+} buffer;
+
+typedef struct rtl_reg_debug{
+        unsigned int  cmd;
+        struct {
+                unsigned char type;
+                unsigned char addr;
+                unsigned char page;
+                unsigned char length;
+        } head;
+        unsigned char buf[0xff];
+}rtl_reg_debug;
+
+typedef struct _rt_9x_tx_rate_history {
+	u32             cck[4];
+	u32             ofdm[8];
+	u32             ht_mcs[4][16];
+}rt_tx_rahis_t, *prt_tx_rahis_t;
+
+typedef	struct _RT_SMOOTH_DATA_4RF {
+	char	elements[4][100];
+	u32	index;			
+	u32	TotalNum;		
+	u32	TotalVal[4];		
+}RT_SMOOTH_DATA_4RF, *PRT_SMOOTH_DATA_4RF;
+
+#ifdef _RTL8192_EXT_PATCH_
+typedef	struct _RT_SMOOTH_DATA {
+	u32	elements[100];	
+	u32	index;			
+	u32	TotalNum;		
+	u32	TotalVal;		
+}RT_SMOOTH_DATA, *PRT_SMOOTH_DATA;
+#endif
+typedef struct Stats
+{
+	unsigned long txrdu;
+	unsigned long rxrdu;
+	unsigned long rxok;
+	unsigned long rxframgment;
+	unsigned long rxcmdpkt[4];		
+	unsigned long rxurberr;
+	unsigned long rxstaterr;
+	unsigned long rxdatacrcerr;
+	unsigned long rxmgmtcrcerr;
+	unsigned long rxcrcerrmin;
+	unsigned long rxcrcerrmid;
+	unsigned long rxcrcerrmax;
+	unsigned long received_rate_histogram[4][32];	
+	unsigned long received_preamble_GI[2][32];		
+	unsigned long	rx_AMPDUsize_histogram[5]; 
+	unsigned long rx_AMPDUnum_histogram[5]; 
+	unsigned long numpacket_matchbssid;	
+	unsigned long numpacket_toself;		
+	unsigned long num_process_phyinfo;		
+	unsigned long numqry_phystatus;
+	unsigned long numqry_phystatusCCK;
+	unsigned long numqry_phystatusHT;
+	unsigned long received_bwtype[5];              
+	unsigned long txnperr;
+	unsigned long txnpdrop;
+	unsigned long txresumed;
+	unsigned long rxoverflow;
+	unsigned long rxint;
+	unsigned long txnpokint;
+	unsigned long ints;
+	unsigned long shints;
+	unsigned long txoverflow;
+	unsigned long txlpokint;
+	unsigned long txlpdrop;
+	unsigned long txlperr;
+	unsigned long txbeokint;
+	unsigned long txbedrop;
+	unsigned long txbeerr;
+	unsigned long txbkokint;
+	unsigned long txbkdrop;
+	unsigned long txbkerr;
+	unsigned long txviokint;
+	unsigned long txvidrop;
+	unsigned long txvierr;
+	unsigned long txvookint;
+	unsigned long txvodrop;
+	unsigned long txvoerr;
+	unsigned long txbeaconokint;
+	unsigned long txbeacondrop;
+	unsigned long txbeaconerr;
+	unsigned long txmanageokint;
+	unsigned long txmanagedrop;
+	unsigned long txmanageerr;
+	unsigned long txcmdpktokint;
+	unsigned long txdatapkt;
+	unsigned long txfeedback;
+	unsigned long txfeedbackok;
+	unsigned long txoktotal;
+	unsigned long txokbytestotal;
+	unsigned long txokinperiod;
+	unsigned long txmulticast;
+	unsigned long txbytesmulticast;
+	unsigned long txbroadcast;
+	unsigned long txbytesbroadcast;
+	unsigned long txunicast;
+	unsigned long txbytesunicast;
+	unsigned long rxbytesunicast;
+	unsigned long txfeedbackfail;
+	unsigned long txerrtotal;
+	unsigned long txerrbytestotal;
+	unsigned long txerrmulticast;
+	unsigned long txerrbroadcast;
+	unsigned long txerrunicast;
+	unsigned long txretrycount;
+	unsigned long txfeedbackretry;
+	u8			last_packet_rate;
+	unsigned long slide_signal_strength[100];
+	unsigned long slide_evm[100];
+	unsigned long	slide_rssi_total;	
+	unsigned long slide_evm_total;	
+	long signal_strength; 
+	long signal_quality;
+	long last_signal_strength_inpercent;
+	long	recv_signal_power;	
+	u8 rx_rssi_percentage[4];
+	u8 rx_evm_percentage[2];
+	long rxSNRdB[4];
+	rt_tx_rahis_t txrate;
+	u32 Slide_Beacon_pwdb[100];	
+	u32 Slide_Beacon_Total;		
+	RT_SMOOTH_DATA_4RF		cck_adc_pwdb;
+	u32	CurrentShowTxate;
+#ifdef _RTL8192_EXT_PATCH_
+	u32 RssiCalculateCnt;
+	RT_SMOOTH_DATA	ui_rssi;
+	RT_SMOOTH_DATA ui_link_quality;
+#endif
+} Stats;
+
+typedef struct 	ChnlAccessSetting {
+	u16 SIFS_Timer;
+	u16 DIFS_Timer; 
+	u16 SlotTimeTimer;
+	u16 EIFS_Timer;
+	u16 CWminIndex;
+	u16 CWmaxIndex;
+}*PCHANNEL_ACCESS_SETTING,CHANNEL_ACCESS_SETTING;
+
+typedef enum _TWO_PORT_STATUS
+{
+	TWO_PORT_STATUS__DEFAULT_ONLY,				
+	TWO_PORT_STATUS__EXTENSION_ONLY,			
+	TWO_PORT_STATUS__EXTENSION_FOLLOW_DEFAULT,	
+	TWO_PORT_STATUS__DEFAULT_G_EXTENSION_N20,	
+	TWO_PORT_STATUS__ADHOC,						
+	TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE		
+}TWO_PORT_STATUS;
+
+typedef struct _txbbgain_struct
+{
+	long	txbb_iq_amplifygain;
+	u32	txbbgain_value;
+} txbbgain_struct, *ptxbbgain_struct;
+
+typedef struct _ccktxbbgain_struct
+{
+	u8	ccktxbb_valuearray[8];
+} ccktxbbgain_struct,*pccktxbbgain_struct;
+
+typedef struct _init_gain
+{
+	u8				xaagccore1;
+	u8				xbagccore1;
+	u8				xcagccore1;
+	u8				xdagccore1;
+	u8				cca;
+
+} init_gain, *pinit_gain;
+
+typedef struct _tx_ring{
+	u32 * desc;
+	u8 nStuckCount;
+	struct _tx_ring * next;
+}__attribute__ ((packed)) tx_ring, * ptx_ring;
+
+struct rtl8192_tx_ring {
+    tx_desc *desc;
+    dma_addr_t dma;
+    unsigned int idx;
+    unsigned int entries;
+    struct sk_buff_head queue;
+};
+
+
+
+struct rtl819x_ops{
+	nic_t nic_type;
+	void (* get_eeprom_size)(struct net_device* dev);
+	void (* init_adapter_variable)(struct net_device* dev);
+	void (* init_before_adapter_start)(struct net_device* dev);
+	bool (* initialize_adapter)(struct net_device* dev);
+	void (*link_change)(struct net_device* dev);
+	void (* tx_fill_descriptor)(struct net_device* dev, tx_desc * tx_desc, cb_desc * cb_desc, struct sk_buff *skb);
+	void (* tx_fill_cmd_descriptor)(struct net_device* dev, tx_desc_cmd * entry, cb_desc * cb_desc, struct sk_buff *skb); 
+	bool (* rx_query_status_descriptor)(struct net_device* dev, struct rtllib_rx_stats*  stats, rx_desc *pdesc, struct sk_buff* skb);
+	bool (* rx_command_packet_handler)(struct net_device *dev, struct sk_buff* skb, rx_desc *pdesc);
+	void (* stop_adapter)(struct net_device *dev, bool reset);
+#if defined RTL8192SE || defined RTL8192CE
+	void (* update_ratr_table)(struct net_device* dev,u8* pMcsRate,struct sta_info* pEntry);
+#else
+	void (* update_ratr_table)(struct net_device* dev);
+#endif
+	void (* irq_enable)(struct net_device* dev);
+	void (* irq_disable)(struct net_device* dev);
+	void (* irq_clear)(struct net_device* dev);
+	void (* rx_enable)(struct net_device* dev);
+	void (* tx_enable)(struct net_device* dev);	
+	void (* interrupt_recognized)(struct net_device *dev, u32 *p_inta, u32 *p_intb);
+	bool (* TxCheckStuckHandler)(struct net_device* dev);
+	bool (* RxCheckStuckHandler)(struct net_device* dev);
+};
+
+typedef struct r8192_priv
+{
+	struct pci_dev *pdev;
+	struct pci_dev *bridge_pdev;
+
+	u8	RegPciASPM;
+	u8	RegHwSwRfOffD3;
+	u8	RegSupportPciASPM;
+	
+	u8      rssi_level;
+	void *scan_cmd;
+
+	u8 check_roaming_cnt;
+	struct rtl819x_ops* ops;
+	bool bfirst_init;
+	bool bfirst_after_down;
+	bool initialized_at_probe;
+	LOG_INTERRUPT_8190_T InterruptLog;
+	bool bIgnoreSilentReset;
+	u32 	SilentResetRxSoltNum;
+	u32	SilentResetRxSlotIndex;
+	u32	SilentResetRxStuckEvent[MAX_SILENT_RESET_RX_SLOT_NUM];
+	RT_CUSTOMER_ID CustomerID;
+	bool	being_init_adapter;
+	bool	sw_radio_on;
+	u8	IC_Cut;
+	int irq;
+	short irq_enabled;
+	struct rtllib_device *rtllib;
+	u8 Rf_Mode;
+	nic_t card_8192; 
+	u8 card_8192_version; 
+	short enable_gpio0;
+	enum card_type {PCI,MINIPCI,CARDBUS,USB}card_type;
+	short hw_plcp_len;
+	short plcp_preamble_mode;
+	u8 ScanDelay;	
+
+	spinlock_t fw_scan_lock;
+	spinlock_t irq_lock;
+	spinlock_t irq_th_lock;
+	spinlock_t tx_lock;
+	spinlock_t rf_ps_lock;
+	spinlock_t rw_lock;
+	spinlock_t rt_h2c_lock;
+#ifdef CONFIG_ASPM_OR_D3
+	spinlock_t D3_lock;
+#endif
+
+#ifdef CONFIG_CFG_80211
+	struct ieee80211_rate rates[IEEE80211_NUM_BANDS][RTL_RATE_MAX];
+	struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS];
+#endif	
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,16))
+	struct semaphore mutex;
+#else
+	struct mutex mutex;
+#endif
+	bool ps_force;
+	spinlock_t rf_lock; 
+	spinlock_t ps_lock;
+
+	u32 irq_mask[2];
+	short chan;
+	u8    hwscan_bw_40;
+	short sens;
+	short max_sens;
+	u32 rx_prevlen;
+	
+	rx_desc *rx_ring[MAX_RX_QUEUE];
+	dma_addr_t rx_ring_dma[MAX_RX_QUEUE];
+	unsigned int rx_idx[MAX_RX_QUEUE];
+	struct sk_buff *rx_buf[MAX_RX_QUEUE][MAX_RX_COUNT];
+	int rxringcount;
+	u16 rxbuffersize;
+
+	struct sk_buff *rx_skb;
+	u32 *rxring;
+	u32 *rxringtail;
+	dma_addr_t rxringdma;
+	struct buffer *rxbuffer;
+	struct buffer *rxbufferhead;
+	short rx_skb_complete;
+	struct rtl8192_tx_ring tx_ring[MAX_TX_QUEUE_COUNT];
+	int txringcount;
+	int txbuffsize;
+	int txfwbuffersize;
+	struct tasklet_struct irq_rx_tasklet;
+	struct tasklet_struct irq_tx_tasklet;
+	struct tasklet_struct irq_prepare_beacon_tasklet;
+
+	struct buffer *txmapbufs;
+	struct buffer *txbkpbufs;
+	struct buffer *txbepbufs;
+	struct buffer *txvipbufs;	
+	struct buffer *txvopbufs;
+	struct buffer *txcmdbufs;
+	struct buffer *txmapbufstail;
+	struct buffer *txbkpbufstail;
+	struct buffer *txbepbufstail;
+	struct buffer *txvipbufstail;      
+	struct buffer *txvopbufstail;
+	struct buffer *txcmdbufstail;
+	ptx_ring txbeaconringtail;
+	dma_addr_t txbeaconringdma;
+	ptx_ring txbeaconring;
+	int txbeaconcount;
+	struct buffer *txbeaconbufs;
+	struct buffer *txbeaconbufstail;
+	ptx_ring txmapring;
+	ptx_ring txbkpring;
+	ptx_ring txbepring;
+	ptx_ring txvipring;
+	ptx_ring txvopring;
+	ptx_ring txcmdring;
+	ptx_ring txmapringtail;
+	ptx_ring txbkpringtail;
+	ptx_ring txbepringtail;
+	ptx_ring txvipringtail;
+	ptx_ring txvopringtail;
+	ptx_ring txcmdringtail;
+	ptx_ring txmapringhead;
+	ptx_ring txbkpringhead;
+	ptx_ring txbepringhead;
+	ptx_ring txvipringhead;
+	ptx_ring txvopringhead;
+	ptx_ring txcmdringhead;
+	dma_addr_t txmapringdma;
+	dma_addr_t txbkpringdma;
+	dma_addr_t txbepringdma;
+	dma_addr_t txvipringdma;
+	dma_addr_t txvopringdma;
+	dma_addr_t txcmdringdma;
+
+	short up;
+	short up_first_time;
+#ifdef _RTL8192_EXT_PATCH_
+	short mesh_up;
+#endif
+	short crcmon; 
+	struct semaphore wx_sem;
+	struct semaphore rf_sem; 
+	u8 rf_type; 
+	RT_RF_TYPE_819xU rf_chip;
+	char nick[IW_ESSID_MAX_SIZE + 1];
+
+	short (*rf_set_sens)(struct net_device *dev,short sens);
+	u8 (*rf_set_chan)(struct net_device *dev,u8 ch);
+	void (*rf_close)(struct net_device *dev);
+	void (*rf_init)(struct net_device *dev);
+	short promisc;	
+	/*stats*/
+	struct Stats stats;
+	struct iw_statistics wstats;
+	struct proc_dir_entry *dir_dev;
+
+	struct sk_buff_head rx_queue;
+	struct sk_buff_head skb_queue;
+	work_struct_rsl qos_activate;
+	atomic_t tx_pending[0x10];
+
+	u16	ShortRetryLimit;
+	u16	LongRetryLimit;
+	u32	TransmitConfig;
+	u8	RegCWinMin;		
+#ifdef _RTL8192_EXT_PATCH_
+	u32     NumTxUnicast; 
+	u8      keepAliveLevel; 
+#endif	
+
+	u32     LastRxDescTSFHigh;
+	u32     LastRxDescTSFLow;
+
+
+	u16	EarlyRxThreshold;
+	u32	ReceiveConfig;
+	u8	AcmControl;
+
+	u8	RFProgType;
+
+	u8 retry_data;
+	u8 retry_rts;
+	u16 rts;
+
+	struct 	ChnlAccessSetting  ChannelAccessSetting;
+
+	work_struct_rsl reset_wq;
+
+#ifdef CONFIG_RTLWIFI_DEBUGFS
+	rtl_fs_debug *debug;
+#endif /* CONFIG_IWLWIFI_DEBUGFS */
+#ifdef CONFIG_RTL_RFKILL
+	bool rfkill_off;
+#endif	
+	/**********************************************************/
+	u16	basic_rate;
+	u8	short_preamble;
+	u8 	slot_time;
+	u16 SifsTime;
+	u8 RegWirelessMode;
+	prt_firmware		pFirmware;
+	rtl819x_loopback_e	LoopbackMode;
+	firmware_source_e	firmware_source;
+	u8 firmware_version;
+	u16 rf_pathmap;
+	bool AutoloadFailFlag;
+	short epromtype;
+	u16 eeprom_vid;
+	u16 eeprom_did;
+	u16 eeprom_svid;
+	u16 eeprom_smid;
+	u8  eeprom_CustomerID;
+	u16  eeprom_ChannelPlan;
+	u8 eeprom_version;
+	u8  EfuseMap[2][HWSET_MAX_SIZE_92S];
+	u16 EfuseUsedBytes;
+	u8  EfuseUsedPercentage;
+
+#ifdef EFUSE_REPG_WORKAROUND 
+	bool efuse_RePGSec1Flag;
+	u8   efuse_RePGData[8];
+#endif
+	u8 EEPROMRegulatory;
+	u8 EEPROMPwrGroup[2][3];
+	u8 EEPROMOptional;	
+	u8 ThermalValue;
+	long EntryMinUndecoratedSmoothedPWDB;
+	long EntryMaxUndecoratedSmoothedPWDB;
+	u8 DynamicTxHighPowerLvl;  
+	u8 LastDTPLvl;
+	u32 CurrentRATR0;
+	FALSE_ALARM_STATISTICS FalseAlmCnt;
+
+	bool bInformFWDriverControlDM;
+	u8 PwrGroupHT20[2][14];
+	u8 PwrGroupHT40[2][14];
+	u16 FwCmdIOMap;
+	u32 FwCmdIOParam;
+	bool bSupportASPM; 
+	u32 RfRegChnlVal[2];
+	u8 DMFlag; 
+	u8 DM_Type; 
+	u8 ShowRateMode;
+	u8 RATRTableBitmap;
+
+#if (EEPROM_OLD_FORMAT_SUPPORT == 1)
+	u8 EEPROMTxPowerLevelCCK[14];		
+	u8 EEPROMTxPowerLevelOFDM24G[14];	
+	u8 EEPROMTxPowerLevelOFDM5G[24];	
+#else
+	u8 RfCckChnlAreaTxPwr[2][3];	
+	u8 RfOfdmChnlAreaTxPwr1T[2][3];	
+	u8 RfOfdmChnlAreaTxPwr2T[2][3];	
+#endif	
+	u8 EEPROMRfACCKChnl1TxPwLevel[3];	
+	u8 EEPROMRfAOfdmChnlTxPwLevel[3];
+	u8 EEPROMRfCCCKChnl1TxPwLevel[3];	
+	u8 EEPROMRfCOfdmChnlTxPwLevel[3];
+#if defined (RTL8192S_WAPI_SUPPORT)
+	u8 EEPROMWapiSupport;
+	u8 WapiSupport;
+#endif
+	u16 EEPROMTxPowerDiff;
+	u16 EEPROMAntPwDiff;		
+	u8 EEPROMThermalMeter;
+	u8 EEPROMPwDiff;
+	u8 EEPROMCrystalCap;
+
+	u8 EEPROMBluetoothCoexist;	
+	u8 EEPROMBluetoothType;
+	u8 EEPROMBluetoothAntNum;
+	u8 EEPROMBluetoothAntIsolation;
+	u8 EEPROMBluetoothRadioShared;
+
+	
+	u8 EEPROMSupportWoWLAN;
+	u8 EEPROMBoardType;
+	u8 EEPROM_Def_Ver;
+	u8 EEPROMHT2T_TxPwr[6];			
+	u8 EEPROMTSSI_A;
+	u8 EEPROMTSSI_B;
+	u8 EEPROMTxPowerLevelCCK_V1[3];
+	u8 EEPROMLegacyHTTxPowerDiff;	
+	bool bTXPowerDataReadFromEEPORM;
+	u16 RegChannelPlan; 
+	u16 ChannelPlan;
+	bool bChnlPlanFromHW;
+	bool RegRfOff;
+	bool isRFOff;
+	bool bInPowerSaveMode;
+	u8	bHwRfOffAction;	
+	BB_REGISTER_DEFINITION_T	PHYRegDef[4];	
+	u8					pwrGroupCnt;
+#if  defined RTL8192CE
+	u32	MCSTxPowerLevelOriginalOffset[4][16];	
+#elif defined RTL8192SE 
+	u32	MCSTxPowerLevelOriginalOffset[4][7];
+#else
+	u32	MCSTxPowerLevelOriginalOffset[6];
+#endif
+	u32	CCKTxPowerLevelOriginalOffset;
+	u8	TxPowerLevelCCK[14];			
+	u8	TxPowerLevelCCK_A[14];			
+	u8 	TxPowerLevelCCK_C[14];
+	u8	TxPowerLevelOFDM24G[14];		
+	u8	TxPowerLevelOFDM5G[14];			
+	u8	TxPowerLevelOFDM24G_A[14];	
+	u8	TxPowerLevelOFDM24G_C[14];	
+	u8	LegacyHTTxPowerDiff;			
+	u8	TxPowerDiff;
+	s8	RF_C_TxPwDiff;					
+	s8	RF_B_TxPwDiff;
+	u8 	RfTxPwrLevelCck[2][14];
+	u8	RfTxPwrLevelOfdm1T[2][14];
+	u8	RfTxPwrLevelOfdm2T[2][14];
+	u8	AntennaTxPwDiff[3];				
+	u8	TxPwrHt20Diff[2][14];				
+	u8	TxPwrLegacyHtDiff[2][14];		
+#if 0
+	u8	TxPwrbandEdgeHt40[2][2];		
+	u8	TxPwrbandEdgeHt20[2][2];		
+	u8	TxPwrbandEdgeLegacyOfdm[2][2];	
+#endif
+	u8	TxPwrSafetyFlag;				
+	u8	HT2T_TxPwr_A[14]; 				
+	u8	HT2T_TxPwr_B[14]; 				
+	u8	CurrentCckTxPwrIdx;
+	u8 	CurrentOfdm24GTxPwrIdx;
+
+	u8	CrystalCap;						
+	u8	ThermalMeter[2];	
+	u8      BluetoothCoexist;
+	IC_INFERIORITY_8192S IC_Class;
+
+	u8	CckPwEnl;
+	u16	TSSI_13dBm;
+	u32 	Pwr_Track;
+	u8	CCKPresentAttentuation_20Mdefault;
+	u8	CCKPresentAttentuation_40Mdefault;
+	char	CCKPresentAttentuation_difference;
+	char	CCKPresentAttentuation;
+	u8	bCckHighPower;
+	long	undecorated_smoothed_pwdb;
+	long	undecorated_smoothed_cck_adc_pwdb[4];
+	u8	SwChnlInProgress;
+	u8 	SwChnlStage;
+	u8	SwChnlStep;
+	u8	SetBWModeInProgress;
+	HT_CHANNEL_WIDTH		CurrentChannelBW;
+
+	u8	nCur40MhzPrimeSC;	
+	u32	RfReg0Value[4];
+	u8 	NumTotalRFPath;	
+	bool 	brfpath_rxenable[4];
+	struct timer_list watch_dog_timer;	
+
+	bool	bdynamic_txpower;  
+	bool	bDynamicTxHighPower;  
+	bool	bDynamicTxLowPower;  
+	bool	bLastDTPFlag_High;
+	bool	bLastDTPFlag_Low;
+
+	bool	bstore_last_dtpflag;
+	bool	bstart_txctrl_bydtp;   
+	rate_adaptive rate_adaptive;
+	txbbgain_struct txbbgain_table[TxBBGainTableLength];
+	u8   txpower_count;
+	bool btxpower_trackingInit;
+	u8   OFDM_index;
+	u8   CCK_index;
+	u8   Record_CCK_20Mindex;
+	u8   Record_CCK_40Mindex;
+	ccktxbbgain_struct	cck_txbbgain_table[CCKTxBBGainTableLength];
+	ccktxbbgain_struct	cck_txbbgain_ch14_table[CCKTxBBGainTableLength];
+	u8 rfa_txpowertrackingindex;
+	u8 rfa_txpowertrackingindex_real;
+	u8 rfa_txpowertracking_default;
+	u8 rfc_txpowertrackingindex;
+	u8 rfc_txpowertrackingindex_real;
+	u8 rfc_txpowertracking_default;
+	bool btxpower_tracking;
+	bool bcck_in_ch14;
+
+	init_gain initgain_backup;
+	u8   DefaultInitialGain[4];
+	bool bis_any_nonbepkts;
+	bool bcurrent_turbo_EDCA;
+
+	bool SetFwCmdInProgress; 
+	u8 CurrentFwCmdIO;
+
+	u8 	MidHighPwrTHR_L1;
+	u8 	MidHighPwrTHR_L2;
+
+
+	bool	bis_cur_rdlstate;
+	struct timer_list fsync_timer;
+	bool bfsync_processing;	
+	u32 	rate_record;
+	u32 	rateCountDiffRecord;
+	u32	ContiuneDiffCount;
+	bool bswitch_fsync;
+
+	u8	framesync;
+	u32 	framesyncC34;
+	u8   	framesyncMonitor;
+	u16 	nrxAMPDU_size;
+	u8 	nrxAMPDU_aggr_num;
+
+	u32 last_rxdesc_tsf_high;
+	u32 last_rxdesc_tsf_low;
+
+	bool bHwRadioOff;
+	bool pwrdown;
+	bool blinked_ingpio;
+	bool aspm_clkreq_enable;
+	u32 pci_bridge_vendor;
+	u8 RegHostPciASPMSetting;
+	int PciBridgeASPMRegOffset;
+	u8 PciBridgeLinkCtrlReg;
+	u8 RegDevicePciASPMSetting;
+	int ASPMRegOffset;
+	int ClkReqOffset;
+	u8 LinkCtrlReg;
+
+	bool RFChangeInProgress; 
+	bool SetRFPowerStateInProgress;
+	bool bdisable_nic;
+	RT_OP_MODE OpMode;
+	u32 reset_count;
+	bool bpbc_pressed;
+	u32 txpower_checkcnt;
+	u32 txpower_tracking_callback_cnt;
+	u8 thermal_read_val[40];
+	u8 thermal_readback_index;
+	u32 ccktxpower_adjustcnt_not_ch14;
+	u32 ccktxpower_adjustcnt_ch14;
+	u8 tx_fwinfo_force_subcarriermode;
+	u8 tx_fwinfo_force_subcarrierval;
+
+	RESET_TYPE	ResetProgress;
+	bool		bForcedSilentReset;
+	bool		bDisableNormalResetCheck;
+	u16		TxCounter;
+	u16		RxCounter;
+	int		IrpPendingCount;
+	bool		bResetInProgress;
+	bool		force_reset;
+	bool		force_lps;
+	u8		InitialGainOperateType;
+#if defined RTL8192SE || defined RTL8192CE
+	LED_STRATEGY_8190	LedStrategy;  
+	LED_8190			SwLed0;
+	LED_8190			SwLed1;
+#endif
+	delayed_work_struct_rsl update_beacon_wq;
+	delayed_work_struct_rsl watch_dog_wq;    
+	delayed_work_struct_rsl txpower_tracking_wq;
+	delayed_work_struct_rsl rfpath_check_wq;
+	delayed_work_struct_rsl gpio_change_rf_wq;
+	delayed_work_struct_rsl initialgain_operate_wq;
+	delayed_work_struct_rsl check_hw_scan_wq; 
+	delayed_work_struct_rsl hw_scan_simu_wq; 
+	delayed_work_struct_rsl start_hw_scan_wq; 	
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)  
+	struct workqueue_struct *priv_wq;
+#else
+	u32 *priv_wq;
+#endif
+	struct timer_list gpio_polling_timer;
+	u8     polling_timer_on;
+	bool bDriverIsGoingToUnload;
+#ifdef _RTL8192_EXT_PATCH_
+	struct mshclass			*mshobj;
+#endif
+
+	bool chan_forced;
+	bool bSingleCarrier;
+	bool RegBoard;
+	bool bCckContTx; 
+ 	bool bOfdmContTx; 
+	bool bStartContTx; 
+	u8   RegPaModel; 
+	u8   btMpCckTxPower; 
+	u8   btMpOfdmTxPower; 
+
+	u32	MptActType; 	
+	u32	MptIoOffset; 
+	u32	MptIoValue; 
+	u32	MptRfPath;
+
+	u32	MptBandWidth;			
+	u32	MptRateIndex;			
+	u8	MptChannelToSw; 		
+	u32  MptRCR;
+
+	u8	PwrDomainProtect;	
+	u8	H2CTxCmdSeq; 
+
+#ifdef RTL8192CE
+	u8	EEPROMTSSI[2];
+	u8	EEPROMPwrLimitHT20[3];
+	u8	EEPROMPwrLimitHT40[3];
+	u8	EEPROMChnlAreaTxPwrCCK[2][3];	
+	u8	EEPROMChnlAreaTxPwrHT40_1S[2][3];	
+	u8	EEPROMChnlAreaTxPwrHT40_2SDiff[2][3];	
+	u8	TxPwrLevelCck[2][14];
+	u8	TxPwrLevelHT40_1S[2][14];		
+	u8	TxPwrLevelHT40_2S[2][14];		
+	bool	bRPDownloadFinished;
+	bool	bH2CSetInProgress;
+	u8	SetIOInProgress;
+	IO_TYPE	CurrentIOType;
+	BT_COEXIST_STR	bt_coexist;	
+	
+	u8	CurFwCmdRegSet;
+	u8	LastHMEBoxNum;
+#endif
+	bool	bDMInitialGainEnable;
+        bool    MutualAuthenticationFail;
+	bool	bDisableFrameBursting;
+	bool	bLedOpenDrain; 
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10))
+	u32	pci_state;
+#endif
+}r8192_priv;
+
+
+#ifdef _RTL8192_EXT_PATCH_
+struct meshdev_priv {
+	struct net_device_stats stats;
+	struct rtllib_device *rtllib;
+	struct r8192_priv * priv;
+};
+#endif
+
+extern const struct ethtool_ops rtl819x_ethtool_ops;
+
+#ifdef RTL8192CE
+#define Rtl819XFwImageArray				Rtl8192CEFwImgArray
+#define Rtl819XMAC_Array					Rtl8192CEMAC_2T_Array
+#define Rtl819XAGCTAB_2TArray			Rtl8192CEAGCTAB_2TArray
+#define Rtl819XAGCTAB_1TArray			Rtl8192CEAGCTAB_1TArray
+#define Rtl819XPHY_REG_2TArray			Rtl8192CEPHY_REG_2TArray			
+#define Rtl819XPHY_REG_1TArray			Rtl8192CEPHY_REG_1TArray
+#define Rtl819XRadioA_2TArray				Rtl8192CERadioA_2TArray
+#define Rtl819XRadioA_1TArray				Rtl8192CERadioA_1TArray
+#define Rtl819XRadioB_2TArray				Rtl8192CERadioB_2TArray
+#define Rtl819XRadioB_1TArray				Rtl8192CERadioB_1TArray
+#define Rtl819XMAC_Array					Rtl8192CEMAC_2T_Array
+#define Rtl819XPHY_REG_Array_PG 			Rtl8192CEPHY_REG_Array_PG
+#endif
+
+bool init_firmware(struct net_device *dev);
+void rtl8192_tx_cmd(struct net_device *dev, struct sk_buff *skb);
+short rtl8192_tx(struct net_device *dev, struct sk_buff* skb);
+
+u8 read_nic_io_byte(struct net_device *dev, int x);
+u32 read_nic_io_dword(struct net_device *dev, int x);
+u16 read_nic_io_word(struct net_device *dev, int x) ;
+void write_nic_io_byte(struct net_device *dev, int x,u8 y);
+void write_nic_io_word(struct net_device *dev, int x,u16 y);
+void write_nic_io_dword(struct net_device *dev, int x,u32 y);
+
+u8 read_nic_byte(struct net_device *dev, int x);
+u32 read_nic_dword(struct net_device *dev, int x);
+u16 read_nic_word(struct net_device *dev, int x) ;
+void write_nic_byte(struct net_device *dev, int x,u8 y);
+void write_nic_word(struct net_device *dev, int x,u16 y);
+void write_nic_dword(struct net_device *dev, int x,u32 y);
+
+void force_pci_posting(struct net_device *dev);
+
+void rtl8192_rx_enable(struct net_device *);
+void rtl8192_tx_enable(struct net_device *);
+
+void rtl8192_disassociate(struct net_device *dev);
+void rtl8185_set_rf_pins_enable(struct net_device *dev,u32 a);
+
+int rtl8192_hard_start_xmit(struct sk_buff *skb,struct net_device *dev);
+void rtl8192_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int rate);
+void rtl8192_data_hard_stop(struct net_device *dev);
+void rtl8192_data_hard_resume(struct net_device *dev);
+void rtl8192_restart(void *data);
+void rtl819x_watchdog_wqcallback(void *data);
+void rtl8192_hw_sleep_wq (void *data);
+void watch_dog_timer_callback(unsigned long data);
+void rtl8192_irq_rx_tasklet(struct r8192_priv *priv);
+void rtl8192_irq_tx_tasklet(struct r8192_priv *priv);
+int rtl8192_down(struct net_device *dev,bool shutdownrf);
+int rtl8192_up(struct net_device *dev);
+void rtl8192_commit(struct net_device *dev);
+void rtl8192_set_chan(struct net_device *dev,short ch);
+
+void check_rfctrl_gpio_timer(unsigned long data);
+
+
+extern void firmware_init_param(struct net_device *dev);
+extern bool cmpk_message_handle_tx(struct net_device *dev, u8* codevirtualaddress, u32 packettype, u32 buffer_len);
+void rtl8192_hw_wakeup_wq(void *data);
+
+irqreturn_type rtl8192_interrupt(int irq, void *netdev, struct pt_regs *regs);
+
+short rtl8192_pci_initdescring(struct net_device *dev);
+
+void rtl8192_cancel_deferred_work(struct r8192_priv* priv);
+
+int _rtl8192_up(struct net_device *dev,bool is_silent_reset);
+
+short rtl8192_is_tx_queue_empty(struct net_device *dev);
+#ifdef RTL8192SE
+void rtl8192_irq_disable(struct net_device *dev);
+void GetHwReg8192SE(struct net_device *dev,u8 variable,u8* val);
+void SetHwReg8192SE(struct net_device *dev,u8 variable,u8* val);
+void SwLedOn(struct net_device *dev , PLED_8190 pLed);
+void SwLedOff(struct net_device *dev, PLED_8190 pLed);
+void Adhoc_InitRateAdaptive(struct net_device *dev,struct sta_info  *pEntry);
+void SetBeaconRelatedRegisters8192SE(struct net_device *dev);
+
+#if LINUX_VERSION_CODE >=KERNEL_VERSION(2,6,20)
+void rtl8192se_check_tsf_wq(struct work_struct * work);
+void rtl8192se_update_assoc_sta_info_wq(struct work_struct * work);
+#else
+void rtl8192se_check_tsf_wq(struct net_device *dev);
+void rtl8192se_update_assoc_sta_info_wq(struct net_device *dev);
+#endif
+#endif
+
+void check_rfctrl_gpio_timer(unsigned long data);
+u8 HalSetSysClk8192SE(struct net_device *dev, u8 Data);
+void gen_RefreshLedState(struct net_device *dev);
+#ifdef _RTL8192_EXT_PATCH_
+extern int r8192_mesh_set_enc_ext(struct net_device *dev, struct iw_point *encoding, struct iw_encode_ext *ext, u8 *addr);
+#ifdef BUILT_IN_MSHCLASS
+extern int msh_init(void);
+extern void msh_exit(void);
+#endif
+#endif
+#define IS_HARDWARE_TYPE_819xP(_priv) ((((struct r8192_priv*)rtllib_priv(dev))->card_8192==NIC_8190P)||\
+					(((struct r8192_priv*)rtllib_priv(dev))->card_8192==NIC_8192E))
+#define IS_HARDWARE_TYPE_8192SE(_priv)	(((struct r8192_priv*)rtllib_priv(dev))->card_8192==NIC_8192SE)
+#define IS_HARDWARE_TYPE_8192CE(_priv)	(((struct r8192_priv*)rtllib_priv(dev))->card_8192==NIC_8192CE)
+#define IS_HARDWARE_TYPE_8192CU(_priv)	(((struct r8192_priv*)rtllib_priv(dev))->card_8192==NIC_8192CU)
+#define IS_HARDWARE_TYPE_8192DE(_priv)	(((struct r8192_priv*)rtllib_priv(dev))->card_8192==NIC_8192DE)
+#define IS_HARDWARE_TYPE_8192DU(_priv)	(((struct r8192_priv*)rtllib_priv(dev))->card_8192==NIC_8192DU)
+extern void dm_InitRateAdaptiveMask(struct net_device * dev);
+
+void rtl8192_tx_timeout(struct net_device *dev);
+void rtl8192_pci_resetdescring(struct net_device *dev);
+void rtl8192_SetWirelessMode(struct net_device* dev, u8 wireless_mode);
+void rtl8192_irq_enable(struct net_device *dev);
+void rtl8192_config_rate(struct net_device* dev, u16* rate_config);
+void rtl8192_update_cap(struct net_device* dev, u16 cap);
+void rtl8192_irq_disable(struct net_device *dev);
+
+void rtl819x_UpdateRxPktTimeStamp (struct net_device *dev, struct rtllib_rx_stats *stats);
+long rtl819x_translate_todbm(struct r8192_priv * priv, u8 signal_strength_index	);
+void rtl819x_update_rxsignalstatistics8190pci(struct r8192_priv * priv,struct rtllib_rx_stats * pprevious_stats);
+u8 rtl819x_evm_dbtopercentage(char value);
+void rtl819x_process_cck_rxpathsel(struct r8192_priv * priv,struct rtllib_rx_stats * pprevious_stats);
+u8 rtl819x_query_rxpwrpercentage(	char		antpower	);
+void rtl8192_record_rxdesc_forlateruse(struct rtllib_rx_stats * psrc_stats,struct rtllib_rx_stats * ptarget_stats);
+
+bool NicIFEnableNIC(struct net_device* dev);
+bool NicIFDisableNIC(struct net_device* dev);
+
+bool
+MgntActSet_RF_State(
+	struct net_device* dev,
+	RT_RF_POWER_STATE	StateToSet,
+	RT_RF_CHANGE_SOURCE ChangeSource
+	);
+#ifdef CONFIG_CFG_80211
+struct net_device *wiphy_to_net_device(struct wiphy *wiphy);
+#endif
+
+#endif
+
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl_debug.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl_debug.c
@@ -0,0 +1,1384 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * Based on the r8180 driver, which is:
+ * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+#include "rtl_debug.h"
+#include "rtl_core.h"
+#ifdef RTL8192CE
+#include "rtl8192c/r8192C_phy.h"
+#include "rtl8192c/r8192C_phyreg.h"
+#include "rtl8192c/r8192C_rtl6052.h"
+#include "rtl8192c/r8192C_Efuse.h"
+#elif defined RTL8192SE
+#include "rtl8192s/r8192S_phy.h"
+#include "rtl8192s/r8192S_phyreg.h"
+#include "rtl8192s/r8192S_rtl6052.h"
+#include "rtl8192s/r8192S_Efuse.h"
+#else
+#include "rtl8192e/r8192E_phy.h" 
+#include "rtl8192e/r8192E_phyreg.h"
+#include "rtl8192e/r8190P_rtl8256.h" /* RTL8225 Radio frontend */
+#include "rtl8192e/r8192E_cmdpkt.h"
+#endif
+
+#ifdef _RTL8192_EXT_PATCH_
+#include "../../mshclass/msh_class.h"
+#endif
+/* this is only for debugging */
+void print_buffer(u32 *buffer, int len)
+{
+	int i;
+	u8 *buf =(u8*)buffer;
+	
+	printk("ASCII BUFFER DUMP (len: %x):\n",len);
+	
+	for(i=0;i<len;i++)
+		printk("%c",buf[i]);
+		
+	printk("\nBINARY BUFFER DUMP (len: %x):\n",len);
+	
+	for(i=0;i<len;i++)
+		printk("%x",buf[i]);
+
+	printk("\n");
+}
+
+/* this is only for debug */
+void dump_eprom(struct net_device *dev)
+{
+	int i;
+
+	for (i = 0; i < 0xff; i++) {
+		RT_TRACE(COMP_INIT, "EEPROM addr %x : %x", i, eprom_read(dev,i));
+	}
+}
+
+/* this is only for debug */
+void rtl8192_dump_reg(struct net_device *dev)
+{
+	int i;
+	int n;
+	int max = 0x5ff;
+
+	RT_TRACE(COMP_INIT, "Dumping NIC register map");
+
+	for (n = 0; n <= max; ) {
+		printk( "\nD: %2x> ", n);
+		for (i = 0; i < 16 && n <= max; i++, n++)
+			printk("%2x ", read_nic_byte(dev, n));
+	}
+	printk("\n");
+}
+
+#ifdef RTL8192CE
+void rtl8192ce_dump_tx_desc(tx_desc *pDesc)
+{	
+#if 0
+	RTPRINT(FTX, TX_DESC, ("DW 0 =========\r\n"));
+	RTPRINT(FTX, TX_DESC, ("Own = %d\n", pDesc->OWN));
+	RTPRINT(FTX, TX_DESC, ("GF = %d\n", pDesc->GF));
+	RTPRINT(FTX, TX_DESC, ("LINIP = %d\n", pDesc->LINIP));
+	RTPRINT(FTX, TX_DESC, ("FS = %d\n", pDesc->FirstSeg));
+	RTPRINT(FTX, TX_DESC, ("LS = %d\n", pDesc->LastSeg));
+	RTPRINT(FTX, TX_DESC, ("Offset = %d\n", pDesc->Offset));
+	RTPRINT(FTX, TX_DESC, ("PktSize = %d\r\n", pDesc->PktSize));
+
+	RTPRINT(FTX, TX_DESC, ("DW 1 ==========\r\n"));
+	RTPRINT(FTX, TX_DESC, ("PKTOFFSET = %d\n", pDesc->PktOffset));
+	RTPRINT(FTX, TX_DESC, ("HTC = %d\n", pDesc->HTC));
+	RTPRINT(FTX, TX_DESC, ("SecType = %d\n", pDesc->SecType));
+	RTPRINT(FTX, TX_DESC, ("EnDescID = %d\n", pDesc->EnDescID));
+	RTPRINT(FTX, TX_DESC, ("NoACM = %d\n", pDesc->NOACM));
+	RTPRINT(FTX, TX_DESC, ("QueueSelect = %d\n", pDesc->QueueSel));
+	RTPRINT(FTX, TX_DESC, ("PIFS = %d\n", pDesc->PIFS));
+	RTPRINT(FTX, TX_DESC, ("MoreFrag = %d\n", pDesc->MoreFrag));
+	RTPRINT(FTX, TX_DESC, ("MacID = %d\r\n", pDesc->MacID));
+
+	RTPRINT(FTX, TX_DESC, ("DW 2 ==========\r\n"));
+	RTPRINT(FTX, TX_DESC, ("BK = %d\n", pDesc->Bk));
+	RTPRINT(FTX, TX_DESC, ("AGG_EN = %d\n", pDesc->AggEn));
+	RTPRINT(FTX, TX_DESC, ("Data Retry CNT = %d\n", pDesc->DATARC));
+	RTPRINT(FTX, TX_DESC, ("RTS Retry CNT = %d\n", pDesc->RTSRC));
+	RTPRINT(FTX, TX_DESC, ("TSFL = %d\n", pDesc->TSFL));
+	RTPRINT(FTX, TX_DESC, ("RetryLmtEn = %d\n", pDesc->RetryLmtEn));
+	RTPRINT(FTX, TX_DESC, ("DataRetryLmt = %d\r\n", pDesc->TxRetryLmt));
+
+	RTPRINT(FTX, TX_DESC, ("DW 3 ==========\r\n"));
+	RTPRINT(FTX, TX_DESC, ("Seq = %d\n", pDesc->Seq));
+	RTPRINT(FTX, TX_DESC, ("TailPage = %d\n", pDesc->TailPage));
+	RTPRINT(FTX, TX_DESC, ("NextHeadPage = %d\r\n", pDesc->NextHeadPage));
+
+	RTPRINT(FTX, TX_DESC, ("DW 4 ==========\r\n"));
+	RTPRINT(FTX, TX_DESC, ("UserRate = %d\n", pDesc->UserRate));
+	RTPRINT(FTX, TX_DESC, ("RTS STBC = %d\n", pDesc->RTSSTBC));
+	RTPRINT(FTX, TX_DESC, ("RTSSC = %d\n", pDesc->RTSSC));
+	RTPRINT(FTX, TX_DESC, ("STBC = %d\n", pDesc->STBC));
+	RTPRINT(FTX, TX_DESC, ("TXSC = %d\n", pDesc->TxSc));
+	RTPRINT(FTX, TX_DESC, ("TxBw = %d\n", pDesc->TxBW));
+	RTPRINT(FTX, TX_DESC, ("TxShort = %d\n", pDesc->TxShort));
+	RTPRINT(FTX, TX_DESC, ("RTSEn = %d\n", pDesc->RTSEn));
+	RTPRINT(FTX, TX_DESC, ("CTS2Self = %d\n", pDesc->CTS2Self));
+	RTPRINT(FTX, TX_DESC, ("RTSRateFBLmt = %d\n", pDesc->RTSRateFBLmt));
+	RTPRINT(FTX, TX_DESC, ("DisRTSFB = %d\n", pDesc->DisRTSFB));
+	RTPRINT(FTX, TX_DESC, ("RTSRate = %d\r\n", pDesc->RTSRate));
+
+	RTPRINT(FTX, TX_DESC, ("DW 5 ==========\r\n"));
+	RTPRINT(FTX, TX_DESC, ("TxAGC = %d\n", pDesc->TXAGCA));
+	RTPRINT(FTX, TX_DESC, ("TxAGC = %d\n", pDesc->TXAGCB));
+	RTPRINT(FTX, TX_DESC, ("DataRateFBLmt = %d\n", pDesc->TxRateFBLmt));
+	RTPRINT(FTX, TX_DESC, ("Disable Feedback = %d\n", pDesc->DisDataFB));
+	RTPRINT(FTX, TX_DESC, ("TX_Rate = %d\n", pDesc->TxRate));
+	RTPRINT(FTX, TX_DESC, ("PktID = %d\r\n", pDesc->PktID));
+
+	RTPRINT(FTX, TX_DESC, ("DW 6 ==========\r\n"));
+
+	RTPRINT(FTX, TX_DESC, ("DW 7-9 ==========\r\n"));
+	RTPRINT(FTX, TX_DESC, ("TxBufferSize = %d\r\n", pDesc->TxBufferSize));
+
+	RTPRINT(FTX, TX_DESC, ("PhyAddressLow = %08x\n", pDesc->TxBuffAddr));
+
+	RTPRINT(FTX, TX_DESC, ("NextDescAddress= %08X\n", pDesc->NextDescAddress));
+#else
+	u32* desc = (u32*)pDesc;
+	u8 i=0;
+	printk("#########################\n");	
+	for(i=0;i<=9;i++){
+		printk("#########>%x\n", desc[i]);	
+	}
+	printk("#########################\n\n");	
+#endif
+}
+#endif
+
+#ifdef RTL8192SE
+void rtl8192se_dump_tx_desc(tx_desc* pDesc)
+{	
+    printk("DW 0 =========\r\n");
+    printk("Own = %d\n", pDesc->OWN);
+    printk("GF = %d\n", pDesc->GF);
+    printk("LINIP = %d\n", pDesc->LINIP);
+    printk("FS = %d\n", pDesc->FirstSeg);
+    printk("LS = %d\n", pDesc->LastSeg);
+    printk("Offset = %d\n", pDesc->Offset);
+    printk("PktSize = %d\r\n", pDesc->PktSize);
+
+    printk("DW 1 ==========\r\n");
+    printk("HWPC = %d\n", pDesc->HWPC);
+    printk("PKTOFFSET = %d\n", pDesc->PktOffset);
+    printk("WDS = %d\n", pDesc->WDS);
+    printk("HTC = %d\n", pDesc->HTC);
+    printk("SecType = %d\n", pDesc->SecType);
+    printk("EnDescID = %d\n", pDesc->EnDescID);
+    printk("PktType = %d\n", pDesc->PktType);
+    printk("OUI = %d\n", pDesc->OUI);
+    printk("SecKeyId = %d\n", pDesc->KeyID);
+    printk("NonQos = %d\n", pDesc->NonQos);
+    printk("NoACM = %d\n", pDesc->NoACM);
+    printk("AckPolicy = %d\n", pDesc->AckPolicy);
+    printk("QueueSelect = %d\n", pDesc->QueueSel);
+    printk("PIFS = %d\n", pDesc->PIFS);
+    printk("MoreFrag = %d\n", pDesc->MoreFrag);
+    printk("MoreData = %d\n", pDesc->MoreData);
+    printk("MacID = %d\r\n", pDesc->MacID);
+
+    printk("DW 2 ==========\r\n");
+    printk("OwnMAC = %d\n", pDesc->OwnMAC);
+    printk("BK = %d\n", pDesc->BK);
+    printk("AGG_EN = %d\n", pDesc->AggEn);
+    printk("Data Retry CNT = %d\n", pDesc->DATARC);
+    printk("RTS Retry CNT = %d\n", pDesc->RTSRC);
+    printk("TSFL = %d\n", pDesc->TSFL);
+    printk("RetryLmtEn = %d\n", pDesc->RetryLmtEn);
+    printk("DataRetryLmt = %d\r\n", pDesc->DataRetryLmt);
+
+    printk("DW 3 ==========\r\n");
+    printk("Frag = %d\n", pDesc->Frag);
+    printk("Seq = %d\n", pDesc->Seq);
+    printk("TailPage = %d\n", pDesc->TailPage);
+    printk("NextHeadPage = %d\r\n", pDesc->NextHeadPage);
+
+    printk("DW 4 ==========\r\n");
+    printk("UserRate = %d\n", pDesc->UserRate);
+    printk("RTS STBC = %d\n", pDesc->RTSSTBC);
+    printk("RTSSC = %d\n", pDesc->RTSSC);
+    printk("RTSBW = %d\n", pDesc->RTSBW);
+    printk("RTSShort = %d\n", pDesc->RTSShort);
+    printk("RTSHT = %d\n", pDesc->RTSHT);
+    printk("RD = %d\n", pDesc->RD);
+    printk("STBC = %d\n", pDesc->STBC);
+    printk("TXSC = %d\n", pDesc->TXSC);
+    printk("TxBw = %d\n", pDesc->TxBw);
+    printk("TxShort = %d\n", pDesc->TxShort);
+    printk("TXHT = %d\n", pDesc->TXHT);
+    printk("RaBRSRID = %d\n", pDesc->RaBRSRID);
+    printk("RTSEn = %d\n", pDesc->RTSEn);
+    printk("CTS2Self = %d\n", pDesc->CTS2Self);
+    printk("RTSRateFBLmt = %d\n", pDesc->RTSRateFBLmt);
+    printk("DisRTSFB = %d\n", pDesc->DisRTSFB);
+    printk("RTSRate = %d\r\n", pDesc->RTSRate);
+
+    printk("DW 5 ==========\r\n");
+    printk("TxAGC = %d\n", pDesc->TxAGC);
+    printk("DataRateFBLmt = %d\n", pDesc->DataRateFBLmt);
+    printk("Disable Feedback = %d\n", pDesc->DISFB);
+    printk("TX_Rate = %d\n", pDesc->TxRate);
+    printk("PktID = %d\r\n", pDesc->PktID);
+
+    printk("DW 6 ==========\r\n");
+    printk("TCPChkSum = %d\n", pDesc->TCPChkSum);
+    printk("IPChkSum = %d\r\n", pDesc->IPChkSum);
+
+    printk("DW 7-9 ==========\r\n");
+    printk("TCPEn = %d\n", pDesc->TCPEn);
+    printk("IPHdrOffset = %d\n", pDesc->IPHdrOffset);
+    printk("TxBufferSize = %d\r\n", pDesc->TxBufferSize);
+
+    printk("PhyAddressLow = %08x\n", pDesc->TxBuffAddr);
+
+    printk("NextDescAddress= %08X\n", pDesc->NextDescAddress);
+}
+#endif
+
+#ifdef CONFIG_RTLWIFI_DEBUGFS
+/* debugfs related stuff */
+static struct dentry *rtl_debugfs_root;
+static int rtl_dbgfs_open(struct inode *inode, struct file *file)
+{
+	file->private_data = inode->i_private;
+	return 0;
+}
+
+static ssize_t rtl_dbgfs_register_write(struct file *file,
+		const char __user *user_buf,
+		size_t count,
+		loff_t *ppos)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)file->private_data;
+	char buf[32];
+	int buf_size;
+	u32 type, offset;
+
+	memset(buf, 0, sizeof(buf));
+	buf_size = min(count, sizeof(buf) -  1);
+	if (copy_from_user(buf, user_buf, buf_size))
+		return -EFAULT;
+
+	if (sscanf(buf, "%x,%x", &type, &offset ) == 2) {
+		priv->debug->hw_type = type;
+		priv->debug->hw_offset = offset;
+	} else {
+		priv->debug->hw_type = 0;
+		priv->debug->hw_offset = 0;
+	}
+
+	return count;
+}
+
+void  rtl_hardware_grab(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	int t = 0;
+	int timeout = 20; 
+	u32 mask = RF_CHANGE_BY_HW|RF_CHANGE_BY_PS|RF_CHANGE_BY_IPS;
+
+	priv->debug->hw_holding = true;
+#ifdef ENABLE_IPS
+	rtllib_ips_leave_wq(dev);
+#endif
+	do {
+		if ((priv->rtllib->RfOffReason & mask)) {
+			msleep(100);
+			t++;
+		} else {
+			return;
+		}
+	} while (t < timeout);
+
+	return;
+}
+
+static ssize_t rtl_dbgfs_register_read(struct file *file,
+		char __user *user_buf,
+		size_t count,
+		loff_t *ppos)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)file->private_data;
+	struct net_device *dev = priv->rtllib->dev;
+	ssize_t ret = 0;
+	char buf[2048];
+	int n,i;
+	u32 len = 0;
+	u32 max = 0xff;
+	u32 page_no, path;
+
+	rtl_hardware_grab(dev);
+
+	if(!priv->debug->hw_type) {
+		page_no = (priv->debug->hw_offset > 0x0f)? 0x0f: priv->debug->hw_offset;
+#ifdef RTL8192SE 
+		if(page_no >= 0x08 ) {
+			len += snprintf(buf + len, count - len,
+					"\n#################### BB page- %x##################\n ", page_no);
+			for(n=0;n<=max;)
+			{
+				len += snprintf(buf + len, count - len, "\nD:  %2x > ",n);
+				for(i=0;i<4 && n<=max;n+=4,i++)
+					len += snprintf(buf + len, count - len,
+							"%8.8x ",rtl8192_QueryBBReg(dev,(page_no << 8|n), 
+								bMaskDWord));
+			}
+
+		} else 
+#endif		
+		{
+			len += snprintf(buf + len,count - len,
+					"\n#################### MAC page- %x##################\n ", page_no);
+			for(n=0;n<=max;) {
+				len += snprintf(buf + len, count - len, "\nD:  %2x > ",n);
+				for(i=0;i<16 && n<=max;i++,n++)
+					len += snprintf(buf + len, count - len,
+							"%2.2x ",read_nic_byte(dev,((page_no<<8)|n)));
+			}
+		}
+	} else {
+		path = (priv->debug->hw_offset < RF90_PATH_MAX)? priv->debug->hw_offset:(RF90_PATH_MAX - 1);
+		len += snprintf(buf + len, count - len,
+				"\n#################### RF-PATH-%x ##################\n ", 0x0a+path);
+		for(n=0;n<=max;) {
+			len += snprintf(buf+ len, count - len, "\nD:  %2x > ",n);
+			for(i=0;i<4 && n<=max;n+=4,i++)
+				len += snprintf(buf + len, count - len,
+					"%8.8x ",rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)path,\
+					       	n, bMaskDWord)); 
+		}   
+	}
+
+	priv->debug->hw_holding = false;
+
+	len += snprintf(buf + len, count - len, "\n");
+	ret = simple_read_from_buffer(user_buf, count, ppos, buf, len);
+	return ret;
+}
+
+static const struct file_operations rtl_register_debug = {
+	.read   = rtl_dbgfs_register_read,
+	.write  = rtl_dbgfs_register_write,
+	.open   = rtl_dbgfs_open,
+	.owner  = THIS_MODULE
+};
+
+int rtl_debug_module_init(struct r8192_priv *priv, const char *name)
+{
+	rtl_fs_debug *debug;
+	int ret = 0;
+
+	if (!rtl_debugfs_root)
+		return -ENOENT;
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13))
+	debug = kzalloc(sizeof(rtl_fs_debug), GFP_KERNEL);
+#else
+	rtl_fs_debug = kmalloc(sizeof(*rtl_fs_debug), GFP_KERNEL);
+	memset(rtl_fs_debug,0,sizeof(*rtl_fs_debug));
+#endif
+	if (!debug) {
+		ret = -ENOMEM;
+		goto err;
+	}
+	priv->debug = debug;
+
+	debug->name = name;
+	debug->dir_drv = debugfs_create_dir(name, rtl_debugfs_root);
+	if (!debug->dir_drv ) {
+		ret = -ENOENT;
+		goto err;
+	}
+
+	debug->debug_register = debugfs_create_file("debug_register", S_IRUGO,
+			 debug->dir_drv, priv, &rtl_register_debug);
+	if(!debug->debug_register) {
+		ret = -ENOENT;
+		goto err;
+	}
+
+	return 0;
+err:
+        RT_TRACE(COMP_DBG, "Can't open the debugfs directory\n");
+        rtl_debug_module_remove(priv);
+        return ret;	
+
+}		
+
+void rtl_debug_module_remove(struct r8192_priv *priv)
+{
+	if (!priv->debug)
+		return;
+	debugfs_remove(priv->debug->debug_register);
+	debugfs_remove(priv->debug->dir_drv);
+	kfree(priv->debug);
+	priv->debug = NULL;
+}
+
+int rtl_create_debugfs_root(void)
+{       
+	rtl_debugfs_root = debugfs_create_dir(DRV_NAME, NULL);
+	if (!rtl_debugfs_root)
+		return -ENOENT;
+
+	return 0;
+}
+
+void rtl_remove_debugfs_root(void)
+{
+	debugfs_remove(rtl_debugfs_root);
+	rtl_debugfs_root = NULL;
+}
+#endif
+
+/****************************************************************************
+   -----------------------------PROCFS STUFF-------------------------
+*****************************************************************************/
+/*This part is related to PROC, which will record some statistics. */
+static struct proc_dir_entry *rtl8192_proc = NULL;
+
+static int proc_get_stats_ap(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data)
+{
+	struct net_device *dev = data;
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	struct rtllib_device *ieee = priv->rtllib;
+	struct rtllib_network *target;
+	
+	int len = 0;
+
+        list_for_each_entry(target, &ieee->network_list, list) {
+
+		len += snprintf(page + len, count - len,
+                "%s ", target->ssid);
+
+		if(target->wpa_ie_len>0 || target->rsn_ie_len>0){
+	                len += snprintf(page + len, count - len,
+        	        "WPA\n");
+		}
+		else{
+                        len += snprintf(page + len, count - len,
+                        "non_WPA\n");
+                }
+		 
+        }
+	
+	*eof = 1;
+	return len;
+}
+
+static int proc_get_registers_0(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data)
+{
+	struct net_device *dev = data;
+	
+	int len = 0;
+	int i,n,page0;
+			
+	int max=0xff;
+	page0 = 0x000;
+	
+#ifdef RTL8192SE
+	/* This dump the current register page */
+	if(!IS_BB_REG_OFFSET_92S(page0)){
+		len += snprintf(page + len, count - len,
+				"\n####################page %x##################\n ", (page0>>8));
+		for(n=0;n<=max;)
+		{
+			len += snprintf(page + len, count - len,
+					"\nD:  %2x > ",n);
+			for(i=0;i<16 && n<=max;i++,n++)
+				len += snprintf(page + len, count - len,
+						"%2.2x ",read_nic_byte(dev,(page0|n)));
+		}
+	}else
+#endif
+	{
+		len += snprintf(page + len, count - len,
+				"\n####################page %x##################\n ", (page0>>8));
+		for(n=0;n<=max;)
+		{
+			len += snprintf(page + len, count - len, "\nD:  %2x > ",n);
+			for(i=0;i<16 && n<=max;n++,i++)
+				len += snprintf(page + len, count - len,
+						"%2.2x ",read_nic_byte(dev,(page0|n)));
+		}
+	}
+	len += snprintf(page + len, count - len,"\n");
+	*eof = 1;
+	return len;
+
+}
+static int proc_get_registers_1(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data)
+{
+	struct net_device *dev = data;
+	
+	int len = 0;
+	int i,n,page0;
+			
+	int max=0xff;
+	page0 = 0x100;
+
+	/* This dump the current register page */
+	len += snprintf(page + len, count - len,
+			"\n####################page %x##################\n ", (page0>>8));
+	for(n=0;n<=max;)
+	{
+		len += snprintf(page + len, count - len,
+				"\nD:  %2x > ",n);
+		for(i=0;i<16 && n<=max;i++,n++)
+			len += snprintf(page + len, count - len,
+					"%2.2x ",read_nic_byte(dev,(page0|n)));
+	}
+	len += snprintf(page + len, count - len,"\n");
+	*eof = 1;
+	return len;
+
+}
+static int proc_get_registers_2(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data)
+{
+	struct net_device *dev = data;
+	
+	int len = 0;
+	int i,n,page0;
+			
+	int max=0xff;
+	page0 = 0x200;
+
+	/* This dump the current register page */
+	len += snprintf(page + len, count - len,
+			"\n####################page %x##################\n ", (page0>>8));
+	for(n=0;n<=max;)
+	{
+		len += snprintf(page + len, count - len,
+				"\nD:  %2x > ",n);
+		for(i=0;i<16 && n<=max;i++,n++)
+			len += snprintf(page + len, count - len,
+					"%2.2x ",read_nic_byte(dev,(page0|n)));
+	}
+	len += snprintf(page + len, count - len,"\n");
+	*eof = 1;
+	return len;
+
+}
+static int proc_get_registers_3(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data)
+{
+	struct net_device *dev = data;
+	
+	int len = 0;
+	int i,n,page0;
+			
+	int max=0xff;
+	page0 = 0x300;
+
+	/* This dump the current register page */
+	len += snprintf(page + len, count - len,
+			"\n####################page %x##################\n ", (page0>>8));
+	for(n=0;n<=max;)
+	{
+		len += snprintf(page + len, count - len,
+				"\nD:  %2x > ",n);
+		for(i=0;i<16 && n<=max;i++,n++)
+			len += snprintf(page + len, count - len,
+					"%2.2x ",read_nic_byte(dev,(page0|n)));
+	}
+	len += snprintf(page + len, count - len,"\n");
+	*eof = 1;
+	return len;
+
+}
+static int proc_get_registers_4(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data)
+{
+	struct net_device *dev = data;
+	
+	int len = 0;
+	int i,n,page0;
+			
+	int max=0xff;
+	page0 = 0x400;
+
+	/* This dump the current register page */
+	len += snprintf(page + len, count - len,
+			"\n####################page %x##################\n ", (page0>>8));
+	for(n=0;n<=max;)
+	{
+		len += snprintf(page + len, count - len,
+				"\nD:  %2x > ",n);
+		for(i=0;i<16 && n<=max;i++,n++)
+			len += snprintf(page + len, count - len,
+					"%2.2x ",read_nic_byte(dev,(page0|n)));
+	}
+	len += snprintf(page + len, count - len,"\n");
+	*eof = 1;
+	return len;
+
+}
+static int proc_get_registers_5(char *page, char **start,
+                          off_t offset, int count,
+                          int *eof, void *data)
+{
+        struct net_device *dev = data;
+
+        int len = 0;
+        int i,n,page0;
+
+        int max=0xff;
+        page0 = 0x500;
+
+        /* This dump the current register page */
+        len += snprintf(page + len, count - len,
+                        "\n####################page %x##################\n ", (page0>>8));
+        for(n=0;n<=max;)
+        {
+                len += snprintf(page + len, count - len,
+                                "\nD:  %2x > ",n);
+                for(i=0;i<16 && n<=max;i++,n++)
+                        len += snprintf(page + len, count - len,
+                                        "%2.2x ",read_nic_byte(dev,(page0|n)));
+        }
+        len += snprintf(page + len, count - len,"\n");
+        *eof = 1;
+        return len;
+
+}
+static int proc_get_registers_6(char *page, char **start,
+                          off_t offset, int count,
+                          int *eof, void *data)
+{
+        struct net_device *dev = data;
+
+        int len = 0;
+        int i,n,page0;
+
+        int max=0xff;
+        page0 = 0x600;
+
+        /* This dump the current register page */
+        len += snprintf(page + len, count - len,
+                        "\n####################page %x##################\n ", (page0>>8));
+        for(n=0;n<=max;)
+        {
+                len += snprintf(page + len, count - len,
+                                "\nD:  %2x > ",n);
+                for(i=0;i<16 && n<=max;i++,n++)
+                        len += snprintf(page + len, count - len,
+                                        "%2.2x ",read_nic_byte(dev,(page0|n)));
+        }
+        len += snprintf(page + len, count - len,"\n");
+        *eof = 1;
+        return len;
+
+}
+static int proc_get_registers_7(char *page, char **start,
+                          off_t offset, int count,
+                          int *eof, void *data)
+{
+        struct net_device *dev = data;
+
+        int len = 0;
+        int i,n,page0;
+
+        int max=0xff;
+        page0 = 0x700;
+
+        /* This dump the current register page */
+        len += snprintf(page + len, count - len,
+                        "\n####################page %x##################\n ", (page0>>8));
+        for(n=0;n<=max;)
+        {
+                len += snprintf(page + len, count - len,
+                                "\nD:  %2x > ",n);
+                for(i=0;i<16 && n<=max;i++,n++)
+                        len += snprintf(page + len, count - len,
+                                        "%2.2x ",read_nic_byte(dev,(page0|n)));
+        }
+        len += snprintf(page + len, count - len,"\n");
+        *eof = 1;
+        return len;
+
+}
+static int proc_get_registers_8(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data)
+{
+	struct net_device *dev = data;
+	
+	int len = 0;
+	int i,n,page0;
+			
+	int max=0xff;
+	page0 = 0x800;
+
+	/* This dump the current register page */
+	len += snprintf(page + len, count - len,
+			"\n####################page %x##################\n ", (page0>>8));
+	for(n=0;n<=max;)
+	{
+		len += snprintf(page + len, count - len, "\nD:  %2x > ",n);
+		for(i=0;i<4 && n<=max;n+=4,i++)
+			len += snprintf(page + len, count - len,
+					"%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
+	}
+	len += snprintf(page + len, count - len,"\n");
+	*eof = 1;
+	return len;
+
+}
+static int proc_get_registers_9(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data)
+{
+	struct net_device *dev = data;
+	
+	int len = 0;
+	int i,n,page0;
+			
+	int max=0xff;
+	page0 = 0x900;
+
+	/* This dump the current register page */
+	len += snprintf(page + len, count - len,
+			"\n####################page %x##################\n ", (page0>>8));
+	for(n=0;n<=max;)
+	{
+		len += snprintf(page + len, count - len, "\nD:  %2x > ",n);
+		for(i=0;i<4 && n<=max;n+=4,i++)
+			len += snprintf(page + len, count - len,
+					"%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
+	}
+	len += snprintf(page + len, count - len,"\n");
+	*eof = 1;
+	return len;
+}
+static int proc_get_registers_a(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data)
+{
+	struct net_device *dev = data;
+	
+	int len = 0;
+	int i,n,page0;
+			
+	int max=0xff;
+	page0 = 0xa00;
+
+	/* This dump the current register page */
+	len += snprintf(page + len, count - len,
+			"\n####################page %x##################\n ", (page0>>8));
+	for(n=0;n<=max;)
+	{
+		len += snprintf(page + len, count - len, "\nD:  %2x > ",n);
+		for(i=0;i<4 && n<=max;n+=4,i++)
+			len += snprintf(page + len, count - len,
+					"%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
+	}
+	len += snprintf(page + len, count - len,"\n");
+	*eof = 1;
+	return len;
+}
+static int proc_get_registers_b(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data)
+{
+	struct net_device *dev = data;
+	
+	int len = 0;
+	int i,n,page0;
+			
+	int max=0xff;
+	page0 = 0xb00;
+
+	/* This dump the current register page */
+	len += snprintf(page + len, count - len,
+			"\n####################page %x##################\n ", (page0>>8));
+	for(n=0;n<=max;)
+	{
+		len += snprintf(page + len, count - len, "\nD:  %2x > ",n);
+		for(i=0;i<4 && n<=max;n+=4,i++)
+			len += snprintf(page + len, count - len,
+					"%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
+	}
+	len += snprintf(page + len, count - len,"\n");
+	*eof = 1;
+	return len;
+}
+static int proc_get_registers_c(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data)
+{
+	struct net_device *dev = data;
+	
+	int len = 0;
+	int i,n,page0;
+			
+	int max=0xff;
+	page0 = 0xc00;
+
+	/* This dump the current register page */
+	len += snprintf(page + len, count - len,
+			"\n####################page %x##################\n ", (page0>>8));
+	for(n=0;n<=max;)
+	{
+		len += snprintf(page + len, count - len, "\nD:  %2x > ",n);
+		for(i=0;i<4 && n<=max;n+=4,i++)
+			len += snprintf(page + len, count - len,
+					"%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
+	}
+	len += snprintf(page + len, count - len,"\n");
+	*eof = 1;
+	return len;
+}
+static int proc_get_registers_d(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data)
+{
+	struct net_device *dev = data;
+	
+	int len = 0;
+	int i,n,page0;
+			
+	int max=0xff;
+	page0 = 0xd00;
+
+	/* This dump the current register page */
+	len += snprintf(page + len, count - len,
+			"\n####################page %x##################\n ", (page0>>8));
+	for(n=0;n<=max;)
+	{
+		len += snprintf(page + len, count - len, "\nD:  %2x > ",n);
+		for(i=0;i<4 && n<=max;n+=4,i++)
+			len += snprintf(page + len, count - len,
+					"%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
+	}
+	len += snprintf(page + len, count - len,"\n");
+	*eof = 1;
+	return len;
+}
+static int proc_get_registers_e(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data)
+{
+	struct net_device *dev = data;
+	
+	int len = 0;
+	int i,n,page0;
+			
+	int max=0xff;
+	page0 = 0xe00;
+
+	/* This dump the current register page */
+	len += snprintf(page + len, count - len,
+			"\n####################page %x##################\n ", (page0>>8));
+	for(n=0;n<=max;)
+	{
+		len += snprintf(page + len, count - len, "\nD:  %2x > ",n);
+		for(i=0;i<4 && n<=max;n+=4,i++)
+			len += snprintf(page + len, count - len,
+					"%8.8x ",rtl8192_QueryBBReg(dev,(page0|n), bMaskDWord));
+	}
+	len += snprintf(page + len, count - len,"\n");
+	*eof = 1;
+	return len;
+}
+
+static int proc_get_reg_rf_a(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data)
+{
+	struct net_device *dev = data;
+	
+	int len = 0;
+	int i,n;
+			
+	int max=0xff;
+
+	/* This dump the current register page */
+	len += snprintf(page + len, count - len,
+			"\n#################### RF-A ##################\n ");
+	for(n=0;n<=max;)
+	{
+		len += snprintf(page + len, count - len, "\nD:  %2x > ",n);
+		for(i=0;i<4 && n<=max;n+=4,i++)
+			len += snprintf(page + len, count - len,
+					"%8.8x ",rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A,n, bMaskDWord));
+	}
+	len += snprintf(page + len, count - len,"\n");
+	*eof = 1;
+	return len;
+}
+
+static int proc_get_reg_rf_b(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data)
+{
+	struct net_device *dev = data;
+	
+	int len = 0;
+	int i,n;
+			
+	int max=0xff;
+
+	/* This dump the current register page */
+	len += snprintf(page + len, count - len,
+			"\n#################### RF-B ##################\n ");
+	for(n=0;n<=max;)
+	{
+		len += snprintf(page + len, count - len, "\nD:  %2x > ",n);
+		for(i=0;i<4 && n<=max;n+=4,i++)
+			len += snprintf(page + len, count - len,
+					"%8.8x ",rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_B, n, bMaskDWord));
+	}
+	len += snprintf(page + len, count - len,"\n");
+	*eof = 1;
+	return len;
+}
+
+static int proc_get_reg_rf_c(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data)
+{
+	struct net_device *dev = data;
+	
+	int len = 0;
+	int i,n;
+			
+	int max=0xff;
+
+	/* This dump the current register page */
+	len += snprintf(page + len, count - len,
+			"\n#################### RF-C ##################\n ");
+	for(n=0;n<=max;)
+	{
+		len += snprintf(page + len, count - len, "\nD:  %2x > ",n);
+		for(i=0;i<4 && n<=max;n+=4,i++)
+			len += snprintf(page + len, count - len,
+					"%8.8x ",rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_C, n, bMaskDWord));
+	}
+	len += snprintf(page + len, count - len,"\n");
+	*eof = 1;
+	return len;
+}
+
+static int proc_get_reg_rf_d(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data)
+{
+	struct net_device *dev = data;
+	
+	int len = 0;
+	int i,n;
+			
+	int max=0xff;
+
+	/* This dump the current register page */
+	len += snprintf(page + len, count - len,
+			"\n#################### RF-D ##################\n ");
+	for(n=0;n<=max;)
+	{
+		len += snprintf(page + len, count - len, "\nD:  %2x > ",n);
+		for(i=0;i<4 && n<=max;n+=4,i++)
+			len += snprintf(page + len, count - len,
+					"%8.8x ",rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_D, n, bMaskDWord));
+	}
+	len += snprintf(page + len, count - len,"\n");
+	*eof = 1;
+	return len;
+}
+
+static int proc_get_cam_register(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data)
+{
+	struct net_device *dev = data;
+	u32 target_command=0;
+	u32 target_content=0;
+	u8 entry_i=0;
+	u32 ulStatus;
+	int len = 0;
+	int i=100, j = 0;
+
+	/* This dump the current register page */
+	len += snprintf(page + len, count - len,
+				"\n#################### SECURITY CAM ##################\n ");
+	for(j=0; j<TOTAL_CAM_ENTRY; j++)
+	{
+		if((j>6) && (j<31))
+			continue;
+		len += snprintf(page + len, count - len, "\nD:  %2x > ",j);
+	 	for(entry_i=0;entry_i<CAM_CONTENT_COUNT;entry_i++)
+	 	{
+			target_command= entry_i+CAM_CONTENT_COUNT*j;
+			target_command= target_command | BIT31;
+
+			while((i--)>=0)
+			{
+				ulStatus = read_nic_dword(dev, RWCAM);
+				if(ulStatus & BIT31){
+					continue;
+				}
+				else{
+					break;
+				}
+			}
+	  		write_nic_dword(dev, RWCAM, target_command);
+	  	 	target_content = read_nic_dword(dev, RCAMO);
+			len += snprintf(page + len, count - len,"%8.8x ",target_content);
+	 	}
+	}
+
+	len += snprintf(page + len, count - len,"\n");
+	*eof = 1;
+	return len;
+}
+
+static int proc_get_stats_tx(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data)
+{
+	struct net_device *dev = data;
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	
+	int len = 0;
+	
+	len += snprintf(page + len, count - len,
+		"TX VI priority ok int: %lu\n"
+		"TX VO priority ok int: %lu\n"
+		"TX BE priority ok int: %lu\n"
+		"TX BK priority ok int: %lu\n"
+		"TX MANAGE priority ok int: %lu\n"
+		"TX BEACON priority ok int: %lu\n"
+		"TX BEACON priority error int: %lu\n"
+		"TX CMDPKT priority ok int: %lu\n"
+		"TX queue stopped?: %d\n"
+		"TX fifo overflow: %lu\n"
+		"TX total data packets %lu\n"		
+		"TX total data bytes :%lu\n",
+		priv->stats.txviokint,
+		priv->stats.txvookint,
+		priv->stats.txbeokint,
+		priv->stats.txbkokint,
+		priv->stats.txmanageokint,
+		priv->stats.txbeaconokint,
+		priv->stats.txbeaconerr,
+		priv->stats.txcmdpktokint,
+		netif_queue_stopped(dev),
+		priv->stats.txoverflow,
+		priv->rtllib->stats.tx_packets,
+		priv->rtllib->stats.tx_bytes
+
+
+		);
+			
+	*eof = 1;
+	return len;
+}		
+
+
+
+static int proc_get_stats_rx(char *page, char **start,
+			  off_t offset, int count,
+			  int *eof, void *data)
+{
+	struct net_device *dev = data;
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	
+	int len = 0;
+	
+	len += snprintf(page + len, count - len,
+		"RX packets: %lu\n"
+		"RX data crc err: %lu\n"
+		"RX mgmt crc err: %lu\n"
+		"RX desc err: %lu\n"
+		"RX rx overflow error: %lu\n",
+		priv->stats.rxint,
+		priv->stats.rxdatacrcerr,
+		priv->stats.rxmgmtcrcerr,
+		priv->stats.rxrdu,
+		priv->stats.rxoverflow);
+			
+	*eof = 1;
+	return len;
+}		
+
+void rtl8192_proc_module_init(void)
+{	
+	RT_TRACE(COMP_INIT, "Initializing proc filesystem");
+#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
+	rtl8192_proc=create_proc_entry(DRV_NAME, S_IFDIR, proc_net);
+#else
+	rtl8192_proc=create_proc_entry(DRV_NAME, S_IFDIR, init_net.proc_net);
+#endif
+}
+
+
+void rtl8192_proc_module_remove(void)
+{
+#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
+	remove_proc_entry(DRV_NAME, proc_net);
+#else
+	remove_proc_entry(DRV_NAME, init_net.proc_net);
+#endif
+}
+
+
+void rtl8192_proc_remove_one(struct net_device *dev)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+
+	printk("dev name %s\n",dev->name);
+
+	if (priv->dir_dev) {
+		remove_proc_entry("stats-tx", priv->dir_dev);
+		remove_proc_entry("stats-rx", priv->dir_dev);
+		remove_proc_entry("stats-ap", priv->dir_dev);
+		remove_proc_entry("registers-0", priv->dir_dev);
+		remove_proc_entry("registers-1", priv->dir_dev);
+		remove_proc_entry("registers-2", priv->dir_dev);
+		remove_proc_entry("registers-3", priv->dir_dev);
+		remove_proc_entry("registers-4", priv->dir_dev);
+		remove_proc_entry("registers-5", priv->dir_dev);
+		remove_proc_entry("registers-6", priv->dir_dev);
+		remove_proc_entry("registers-7", priv->dir_dev);
+		remove_proc_entry("registers-8", priv->dir_dev);
+		remove_proc_entry("registers-9", priv->dir_dev);
+		remove_proc_entry("registers-a", priv->dir_dev);
+		remove_proc_entry("registers-b", priv->dir_dev);
+		remove_proc_entry("registers-c", priv->dir_dev);
+		remove_proc_entry("registers-d", priv->dir_dev);
+		remove_proc_entry("registers-e", priv->dir_dev);
+		remove_proc_entry("RF-A", priv->dir_dev);
+		remove_proc_entry("RF-B", priv->dir_dev);
+		remove_proc_entry("RF-C", priv->dir_dev);
+		remove_proc_entry("RF-D", priv->dir_dev);
+		remove_proc_entry("SEC-CAM", priv->dir_dev);
+#ifdef _RTL8192_EXT_PATCH_
+		remove_proc_entry("ra0", rtl8192_proc);
+#else
+		remove_proc_entry("wlan0", rtl8192_proc);
+#endif
+		priv->dir_dev = NULL;
+	}
+}
+
+
+void rtl8192_proc_init_one(struct net_device *dev)
+{
+	struct proc_dir_entry *e;
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	priv->dir_dev = create_proc_entry(dev->name, 
+					  S_IFDIR | S_IRUGO | S_IXUGO, 
+					  rtl8192_proc);
+	if (!priv->dir_dev) {
+		RT_TRACE(COMP_ERR, "Unable to initialize /proc/net/rtl8192/%s\n",
+		      dev->name);
+		return;
+	}
+	e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
+				   priv->dir_dev, proc_get_stats_rx, dev);
+				   
+	if (!e) {
+		RT_TRACE(COMP_ERR,"Unable to initialize "
+		      "/proc/net/rtl8192/%s/stats-rx\n",
+		      dev->name);
+	}
+	
+	
+	e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
+				   priv->dir_dev, proc_get_stats_tx, dev);
+				   
+	if (!e) {
+		RT_TRACE(COMP_ERR, "Unable to initialize "
+		      "/proc/net/rtl8192/%s/stats-tx\n",
+		      dev->name);
+	}
+	
+	e = create_proc_read_entry("stats-ap", S_IFREG | S_IRUGO,
+				   priv->dir_dev, proc_get_stats_ap, dev);
+				   
+	if (!e) {
+		RT_TRACE(COMP_ERR, "Unable to initialize "
+		      "/proc/net/rtl8192/%s/stats-ap\n",
+		      dev->name);
+	}
+	
+	e = create_proc_read_entry("registers-0", S_IFREG | S_IRUGO,
+				   priv->dir_dev, proc_get_registers_0, dev);
+	if (!e) {
+		RT_TRACE(COMP_ERR, "Unable to initialize "
+		      "/proc/net/rtl8192/%s/registers-0\n",
+		      dev->name);
+	}
+	e = create_proc_read_entry("registers-1", S_IFREG | S_IRUGO,
+				   priv->dir_dev, proc_get_registers_1, dev);
+	if (!e) {
+		RT_TRACE(COMP_ERR, "Unable to initialize "
+		      "/proc/net/rtl8192/%s/registers-1\n",
+		      dev->name);
+	}
+	e = create_proc_read_entry("registers-2", S_IFREG | S_IRUGO,
+				   priv->dir_dev, proc_get_registers_2, dev);
+	if (!e) {
+		RT_TRACE(COMP_ERR, "Unable to initialize "
+		      "/proc/net/rtl8192/%s/registers-2\n",
+		      dev->name);
+	}
+	e = create_proc_read_entry("registers-3", S_IFREG | S_IRUGO,
+				   priv->dir_dev, proc_get_registers_3, dev);
+	if (!e) {
+		RT_TRACE(COMP_ERR, "Unable to initialize "
+		      "/proc/net/rtl8192/%s/registers-3\n",
+		      dev->name);
+	}
+	e = create_proc_read_entry("registers-4", S_IFREG | S_IRUGO,
+				   priv->dir_dev, proc_get_registers_4, dev);
+	if (!e) {
+		RT_TRACE(COMP_ERR, "Unable to initialize "
+		      "/proc/net/rtl8192/%s/registers-4\n",
+		      dev->name);
+	}
+	e = create_proc_read_entry("registers-5", S_IFREG | S_IRUGO,
+				   priv->dir_dev, proc_get_registers_5, dev);
+	if (!e) {
+		RT_TRACE(COMP_ERR, "Unable to initialize "
+		      "/proc/net/rtl8192/%s/registers-5\n",
+		      dev->name);
+	}
+	e = create_proc_read_entry("registers-6", S_IFREG | S_IRUGO,
+				   priv->dir_dev, proc_get_registers_6, dev);
+	if (!e) {
+		RT_TRACE(COMP_ERR, "Unable to initialize "
+		      "/proc/net/rtl8192/%s/registers-6\n",
+		      dev->name);
+	}
+	e = create_proc_read_entry("registers-7", S_IFREG | S_IRUGO,
+				   priv->dir_dev, proc_get_registers_7, dev);
+	if (!e) {
+		RT_TRACE(COMP_ERR, "Unable to initialize "
+		      "/proc/net/rtl8192/%s/registers-7\n",
+		      dev->name);
+	}
+	e = create_proc_read_entry("registers-8", S_IFREG | S_IRUGO,
+				   priv->dir_dev, proc_get_registers_8, dev);
+	if (!e) {
+		RT_TRACE(COMP_ERR, "Unable to initialize "
+		      "/proc/net/rtl8192/%s/registers-8\n",
+		      dev->name);
+	}
+	e = create_proc_read_entry("registers-9", S_IFREG | S_IRUGO,
+				   priv->dir_dev, proc_get_registers_9, dev);
+	if (!e) {
+		RT_TRACE(COMP_ERR, "Unable to initialize "
+		      "/proc/net/rtl8192/%s/registers-9\n",
+		      dev->name);
+	}
+	e = create_proc_read_entry("registers-a", S_IFREG | S_IRUGO,
+				   priv->dir_dev, proc_get_registers_a, dev);
+	if (!e) {
+		RT_TRACE(COMP_ERR, "Unable to initialize "
+		      "/proc/net/rtl8192/%s/registers-a\n",
+		      dev->name);
+	}
+	e = create_proc_read_entry("registers-b", S_IFREG | S_IRUGO,
+				   priv->dir_dev, proc_get_registers_b, dev);
+	if (!e) {
+		RT_TRACE(COMP_ERR, "Unable to initialize "
+		      "/proc/net/rtl8192/%s/registers-b\n",
+		      dev->name);
+	}
+	e = create_proc_read_entry("registers-c", S_IFREG | S_IRUGO,
+				   priv->dir_dev, proc_get_registers_c, dev);
+	if (!e) {
+		RT_TRACE(COMP_ERR, "Unable to initialize "
+		      "/proc/net/rtl8192/%s/registers-c\n",
+		      dev->name);
+	}
+	e = create_proc_read_entry("registers-d", S_IFREG | S_IRUGO,
+				   priv->dir_dev, proc_get_registers_d, dev);
+	if (!e) {
+		RT_TRACE(COMP_ERR, "Unable to initialize "
+		      "/proc/net/rtl8192/%s/registers-d\n",
+		      dev->name);
+	}
+	e = create_proc_read_entry("registers-e", S_IFREG | S_IRUGO,
+				   priv->dir_dev, proc_get_registers_e, dev);
+	if (!e) {
+		RT_TRACE(COMP_ERR, "Unable to initialize "
+		      "/proc/net/rtl8192/%s/registers-e\n",
+		      dev->name);
+	}
+	e = create_proc_read_entry("RF-A", S_IFREG | S_IRUGO,
+				   priv->dir_dev, proc_get_reg_rf_a, dev);
+	if (!e) {
+		RT_TRACE(COMP_ERR, "Unable to initialize "
+		      "/proc/net/rtl8192/%s/RF-A\n",
+		      dev->name);
+	}
+	e = create_proc_read_entry("RF-B", S_IFREG | S_IRUGO,
+				   priv->dir_dev, proc_get_reg_rf_b, dev);
+	if (!e) {
+		RT_TRACE(COMP_ERR, "Unable to initialize "
+		      "/proc/net/rtl8192/%s/RF-B\n",
+		      dev->name);
+	}
+	e = create_proc_read_entry("RF-C", S_IFREG | S_IRUGO,
+				   priv->dir_dev, proc_get_reg_rf_c, dev);
+	if (!e) {
+		RT_TRACE(COMP_ERR, "Unable to initialize "
+		      "/proc/net/rtl8192/%s/RF-C\n",
+		      dev->name);
+	}
+	e = create_proc_read_entry("RF-D", S_IFREG | S_IRUGO,
+				   priv->dir_dev, proc_get_reg_rf_d, dev);
+	if (!e) {
+		RT_TRACE(COMP_ERR, "Unable to initialize "
+		      "/proc/net/rtl8192/%s/RF-D\n",
+		      dev->name);
+	}
+	e = create_proc_read_entry("SEC-CAM", S_IFREG | S_IRUGO,
+				   priv->dir_dev, proc_get_cam_register, dev);
+	if (!e) {
+		RT_TRACE(COMP_ERR, "Unable to initialize "
+		      "/proc/net/rtl8192/%s/SEC-CAM\n",
+		      dev->name);
+	}
+#ifdef _RTL8192_EXT_PATCH_
+        if( priv->mshobj && priv->mshobj->ext_patch_create_proc )
+                priv->mshobj->ext_patch_create_proc(priv);
+#endif
+
+}
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl_wx.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl_wx.h
@@ -0,0 +1,34 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+
+#ifndef R819x_WX_H
+#define R819x_WX_H
+
+struct net_device;
+struct iw_handler_def;
+struct iw_statistics;
+
+extern struct iw_handler_def r8192_wx_handlers_def;
+struct iw_statistics *r8192_get_wireless_stats(struct net_device *dev);
+u16 rtl8192_11n_user_show_rates(struct net_device* dev);
+
+#ifdef _RTL8192_EXT_PATCH_
+extern struct iw_handler_def meshdev_wx_handlers_def;
+#endif
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl_pm.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl_pm.h
@@ -0,0 +1,39 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+
+#ifdef CONFIG_PM_RTL
+
+#ifndef R8192E_PM_H
+#define R8192E_PM_H
+
+#include <linux/types.h>
+#include <linux/pci.h>
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10))
+#define pm_message_t u32
+#endif
+
+int rtl8192E_save_state (struct pci_dev *dev, pm_message_t state);
+int rtl8192E_suspend (struct pci_dev *dev, pm_message_t state);
+int rtl8192E_resume (struct pci_dev *dev);
+int rtl8192E_enable_wake (struct pci_dev *dev, pm_message_t state, int enable);
+
+#endif 
+
+#endif 
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl_wx.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl_wx.c
@@ -0,0 +1,4231 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+
+#include <linux/string.h>
+#include "rtl_core.h"
+#ifdef ENABLE_DOT11D
+#include "rtllib/dot11d.h"
+#endif
+#ifdef _RTL8192_EXT_PATCH_
+#include "../../mshclass/msh_class.h"
+#endif
+
+#ifdef CONFIG_MP
+#include "r8192S_mp.h"
+#endif
+
+#define RATE_COUNT 12
+u32 rtl8192_rates[] = {1000000,2000000,5500000,11000000,
+	6000000,9000000,12000000,18000000,24000000,36000000,48000000,54000000};
+	
+
+#ifndef ENETDOWN
+#define ENETDOWN 1
+#endif
+extern int  hwwep;
+#ifdef _RTL8192_EXT_PATCH_
+int r8192_wx_set_channel(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);
+static int r8192_wx_mesh_scan(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);
+static int r8192_wx_get_mesh_list(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra);
+#endif
+
+static int r8192_wx_get_freq(struct net_device *dev,
+			     struct iw_request_info *a,
+			     union iwreq_data *wrqu, char *b)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+#ifdef _RTL8192_EXT_PATCH_
+	return rtllib_wx_get_freq(priv->rtllib,a,wrqu,b,0);
+#else
+	return rtllib_wx_get_freq(priv->rtllib,a,wrqu,b);
+#endif
+}
+
+
+#if 0
+
+static int r8192_wx_set_beaconinterval(struct net_device *dev, struct iw_request_info *aa,
+			  union iwreq_data *wrqu, char *b)
+{
+	int *parms = (int *)b;
+	int bi = parms[0];
+	
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	down(&priv->wx_sem);
+	DMESG("setting beacon interval to %x",bi);
+	
+	priv->rtllib->beacon_interval=bi;
+	rtl8192_commit(dev);
+	up(&priv->wx_sem);
+		
+	return 0;	
+}
+
+
+static int r8192_wx_set_forceassociate(struct net_device *dev, struct iw_request_info *aa,
+			  union iwreq_data *wrqu, char *extra)
+{
+	struct r8192_priv *priv=rtllib_priv(dev);	
+	int *parms = (int *)extra;
+	
+	priv->rtllib->force_associate = (parms[0] > 0);
+	
+
+	return 0;
+}
+
+#endif
+static int r8192_wx_get_mode(struct net_device *dev, struct iw_request_info *a,
+			     union iwreq_data *wrqu, char *b)
+{
+	struct r8192_priv *priv=rtllib_priv(dev);	
+
+	return rtllib_wx_get_mode(priv->rtllib,a,wrqu,b);
+}
+
+static int r8192_wx_get_rate(struct net_device *dev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	return rtllib_wx_get_rate(priv->rtllib,info,wrqu,extra);
+}
+
+
+
+static int r8192_wx_set_rate(struct net_device *dev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	int ret;
+	struct r8192_priv *priv = rtllib_priv(dev);	
+	
+	if(priv->bHwRadioOff == true)
+		return 0;	
+	
+	down(&priv->wx_sem);
+
+	ret = rtllib_wx_set_rate(priv->rtllib,info,wrqu,extra);
+	
+	up(&priv->wx_sem);
+	
+	return ret;
+}
+
+
+static int r8192_wx_set_rts(struct net_device *dev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	int ret;
+	struct r8192_priv *priv = rtllib_priv(dev);	
+	
+	if(priv->bHwRadioOff == true)
+		return 0;	
+	
+	down(&priv->wx_sem);
+
+	ret = rtllib_wx_set_rts(priv->rtllib,info,wrqu,extra);
+	
+	up(&priv->wx_sem);
+	
+	return ret;
+}
+
+static int r8192_wx_get_rts(struct net_device *dev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	return rtllib_wx_get_rts(priv->rtllib,info,wrqu,extra);
+}
+
+static int r8192_wx_set_power(struct net_device *dev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	int ret;
+	struct r8192_priv *priv = rtllib_priv(dev);	
+	
+	if(priv->bHwRadioOff == true){
+		RT_TRACE(COMP_ERR,"%s():Hw is Radio Off, we can't set Power,return\n",__FUNCTION__);
+		return 0;
+	}
+	down(&priv->wx_sem);
+
+	ret = rtllib_wx_set_power(priv->rtllib,info,wrqu,extra);
+	
+	up(&priv->wx_sem);
+	
+	return ret;
+}
+
+static int r8192_wx_get_power(struct net_device *dev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	return rtllib_wx_get_power(priv->rtllib,info,wrqu,extra);
+}
+
+static int r8192_wx_set_rawtx(struct net_device *dev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	int ret;
+	
+	if(priv->bHwRadioOff == true)
+		return 0;
+	
+	down(&priv->wx_sem);
+	
+	ret = rtllib_wx_set_rawtx(priv->rtllib, info, wrqu, extra);
+	
+	up(&priv->wx_sem);
+	
+	return ret;
+	 
+}
+
+static int r8192_wx_force_reset(struct net_device *dev,
+		struct iw_request_info *info,
+		union iwreq_data *wrqu, char *extra)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	down(&priv->wx_sem);
+
+	printk("%s(): force reset ! extra is %d\n",__FUNCTION__, *extra);
+	priv->force_reset = *extra;
+	up(&priv->wx_sem);
+	return 0;
+
+}
+
+static int r8192_wx_force_mic_error(struct net_device *dev,
+		struct iw_request_info *info,
+		union iwreq_data *wrqu, char *extra)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	struct rtllib_device* ieee = priv->rtllib;
+	
+	down(&priv->wx_sem);
+
+	printk("%s(): force mic error ! \n",__FUNCTION__);
+	ieee->force_mic_error = true;
+	up(&priv->wx_sem);
+	return 0;
+
+}
+
+#define MAX_ADHOC_PEER_NUM 64 
+typedef struct 
+{
+	unsigned char MacAddr[ETH_ALEN];
+	unsigned char WirelessMode;
+	unsigned char bCurTxBW40MHz;		
+} adhoc_peer_entry_t, *p_adhoc_peer_entry_t;
+typedef struct 
+{
+	adhoc_peer_entry_t Entry[MAX_ADHOC_PEER_NUM];
+	unsigned char num;
+} adhoc_peers_info_t, *p_adhoc_peers_info_t;
+int r8192_wx_get_adhoc_peers(struct net_device *dev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{
+#ifndef RTL8192SE 
+	return 0;
+#else
+	struct r8192_priv *priv = rtllib_priv(dev);
+	struct sta_info * psta = NULL;
+	adhoc_peers_info_t adhoc_peers_info;
+	p_adhoc_peers_info_t  padhoc_peers_info = &adhoc_peers_info; 
+	p_adhoc_peer_entry_t padhoc_peer_entry = NULL;
+	int k=0;
+
+
+	memset(extra, 0, 2047);
+	padhoc_peers_info->num = 0;
+
+	down(&priv->wx_sem);
+
+	for(k=0; k<PEER_MAX_ASSOC; k++)
+	{
+		psta = priv->rtllib->peer_assoc_list[k];
+		if(NULL != psta)
+		{
+			padhoc_peer_entry = &padhoc_peers_info->Entry[padhoc_peers_info->num];
+			memset(padhoc_peer_entry,0, sizeof(adhoc_peer_entry_t));
+			memcpy(padhoc_peer_entry->MacAddr, psta->macaddr, ETH_ALEN);
+			padhoc_peer_entry->WirelessMode = psta->wireless_mode;
+			padhoc_peer_entry->bCurTxBW40MHz = psta->htinfo.bCurTxBW40MHz;
+			padhoc_peers_info->num ++;
+			printk("[%d] MacAddr:"MAC_FMT" \tWirelessMode:%d \tBW40MHz:%d \n", \
+				k, MAC_ARG(padhoc_peer_entry->MacAddr), padhoc_peer_entry->WirelessMode, padhoc_peer_entry->bCurTxBW40MHz);
+			sprintf(extra, "[%d] MacAddr:"MAC_FMT" \tWirelessMode:%d \tBW40MHz:%d \n",  \
+				k, MAC_ARG(padhoc_peer_entry->MacAddr), padhoc_peer_entry->WirelessMode, padhoc_peer_entry->bCurTxBW40MHz);
+		}
+	}
+
+	up(&priv->wx_sem);
+
+	wrqu->data.length = strlen(extra);
+	wrqu->data.flags = 0;
+	return 0;
+
+#endif
+}
+
+
+static int r8191se_wx_get_firm_version(struct net_device *dev,
+		struct iw_request_info *info,
+		struct iw_param *wrqu, char *extra)
+{
+#if defined RTL8192SE || defined RTL8192CE
+        struct r8192_priv *priv = rtllib_priv(dev);
+	u16 firmware_version;
+
+	down(&priv->wx_sem);
+	printk("%s(): Just Support 92SE tmp\n", __FUNCTION__);
+#ifdef RTL8192CE
+	firmware_version = priv->firmware_version;
+#else
+	firmware_version = priv->pFirmware->FirmwareVersion;
+#endif
+	wrqu->value = firmware_version;
+	wrqu->fixed = 1;
+
+	up(&priv->wx_sem);
+#endif
+	return 0;
+}
+
+static int r8192_wx_adapter_power_status(struct net_device *dev,
+		struct iw_request_info *info,
+		union iwreq_data *wrqu, char *extra)
+{
+#ifdef ENABLE_LPS
+	struct r8192_priv *priv = rtllib_priv(dev);
+	PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
+	struct rtllib_device* ieee = priv->rtllib;
+
+	down(&priv->wx_sem);
+
+	RT_TRACE(COMP_POWER, "%s(): %s\n",__FUNCTION__, (*extra ==  6)?"DC power":"AC power");
+	if(*extra || priv->force_lps) {
+		priv->ps_force = false;
+		pPSC->bLeisurePs = true;
+	} else {	
+		if(priv->rtllib->state == RTLLIB_LINKED)
+			LeisurePSLeave(dev);
+	
+		priv->ps_force = true;
+		pPSC->bLeisurePs = false;
+		ieee->ps = *extra;	
+	}
+
+	up(&priv->wx_sem);
+#endif
+
+	return 0;
+
+}
+
+#ifdef _RTL8192_EXT_PATCH_
+static int r8192_wx_print_reg(struct net_device *dev,
+		struct iw_request_info *info,
+		union iwreq_data *wrqu, char *extra)
+{
+	u8 reg1=0,reg2=0,reg3=0,reg4=0;
+	u32 reg5 = 0, len = 0;
+	
+	memset(extra, 0, 512);
+	sprintf(extra,"\nStart Log: Set 0x08000000 to 0x230\n");
+	write_nic_dword(dev, 0x230 , 0x08000000);
+	reg1 = read_nic_byte(dev, 0xf0);
+	reg2 = read_nic_byte(dev, 0xf4);
+	reg3 = read_nic_byte(dev, 0x140);
+	reg4 = read_nic_byte(dev, 0x124);
+	mdelay(10);
+	reg5 = read_nic_dword(dev, 0x230);
+	len = strlen(extra);
+	sprintf(extra+len, "0xf0: %2.2x\n0xf4: %2.2x\n0x140: %2.2x\n0x124: %2.2x\n", reg1,reg2,reg3,reg4);
+	len = strlen(extra);
+	sprintf(extra+len,"After delay 10ms, read 0x230: %8.8x\n", reg5);
+
+	write_nic_dword(dev, 0x230 , 0x40000000);
+	reg5 = read_nic_dword(dev, 0x230);
+	len = strlen(extra);
+	sprintf(extra+len,"Set 0x40000000 to 0x230. Read 0x230: %8.8x\n", reg5);
+
+	write_nic_dword(dev, 0x230 , 0x80000000);
+	reg5 = read_nic_dword(dev, 0x230);
+	len = strlen(extra);
+	sprintf(extra+len,"Set 0x80000000 to 0x230. Read 0x230: %8.8x\n", reg5);
+
+	wrqu->data.length = strlen(extra);
+	return 0;
+}
+
+static int r8192_wx_resume_firm(struct net_device *dev,
+		struct iw_request_info *info,
+		union iwreq_data *wrqu, char *extra)
+{
+
+	write_nic_byte(dev, 0x42, 0xFF);
+	write_nic_word(dev, 0x40, 0x77FC);
+	write_nic_word(dev, 0x40, 0x57FC);
+	write_nic_word(dev, 0x40, 0x37FC);
+	write_nic_word(dev, 0x40, 0x77FC);
+	
+	udelay(100);
+
+	write_nic_word(dev, 0x40, 0x57FC);
+	write_nic_word(dev, 0x40, 0x37FC);
+	write_nic_byte(dev, 0x42, 0x00);
+
+	return 0;
+}
+#endif
+static int r8192se_wx_set_radio(struct net_device *dev,
+        struct iw_request_info *info,
+        union iwreq_data *wrqu, char *extra)
+{
+    struct r8192_priv *priv = rtllib_priv(dev);
+
+    down(&priv->wx_sem);
+
+    printk("%s(): set radio ! extra is %d\n",__FUNCTION__, *extra);
+    if((*extra != 0) && (*extra != 1))
+    {
+        RT_TRACE(COMP_ERR, "%s(): set radio an err value,must 0(radio off) or 1(radio on)\n",__FUNCTION__);
+        return -1;
+    }
+    priv->sw_radio_on = *extra;
+    up(&priv->wx_sem);
+    return 0;
+
+}
+
+static int r8192se_wx_set_lps_awake_interval(struct net_device *dev,
+        struct iw_request_info *info,
+        union iwreq_data *wrqu, char *extra)
+{
+    struct r8192_priv *priv = rtllib_priv(dev);
+    PRT_POWER_SAVE_CONTROL	pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
+
+    down(&priv->wx_sem);
+
+    printk("%s(): set lps awake interval ! extra is %d\n",__FUNCTION__, *extra);
+
+    pPSC->RegMaxLPSAwakeIntvl = *extra;
+    up(&priv->wx_sem);
+    return 0;
+
+}
+
+static int r8192se_wx_set_force_lps(struct net_device *dev,
+		struct iw_request_info *info,
+		union iwreq_data *wrqu, char *extra)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	down(&priv->wx_sem);
+
+	printk("%s(): force LPS ! extra is %d (1 is open 0 is close)\n",__FUNCTION__, *extra);
+	priv->force_lps = *extra;
+	up(&priv->wx_sem);
+	return 0;
+
+}
+
+#ifdef _RTL8192_EXT_PATCH_
+static int r8192_wx_get_drv_version(struct net_device *dev,
+		struct iw_request_info *info,
+		union iwreq_data *wrqu, char *extra)
+{
+	memset(extra, 0, 64);
+	sprintf(extra, "Support Mesh");
+
+	((struct iw_point *)wrqu)->length = strlen(extra);
+	return 0;
+}
+#endif
+
+static int r8192_wx_set_debugflag(struct net_device *dev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u8 c = *extra;
+	
+	if(priv->bHwRadioOff == true)
+		return 0;
+	
+	printk("=====>%s(), *extra:%x, debugflag:%x\n", __FUNCTION__, *extra, rt_global_debug_component);
+	if (c > 0)  {
+		rt_global_debug_component |= (1<<c);
+	} else {
+		rt_global_debug_component &= BIT31; 
+	}
+	return 0;
+}
+
+static int r8192_wx_set_mode(struct net_device *dev, struct iw_request_info *a,
+			     union iwreq_data *wrqu, char *b)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	struct rtllib_device* ieee = netdev_priv_rsl(dev);
+
+	RT_RF_POWER_STATE	rtState;
+	int ret;
+
+	if(priv->bHwRadioOff == true)
+		return 0;
+#ifdef _RTL8192_EXT_PATCH_
+	if (priv->mshobj && (priv->rtllib->iw_mode==IW_MODE_MESH)) {
+		return 0;	
+	}
+#endif
+	rtState = priv->rtllib->eRFPowerState;
+	down(&priv->wx_sem);
+#ifdef ENABLE_IPS	
+	if(wrqu->mode == IW_MODE_ADHOC || wrqu->mode == IW_MODE_MONITOR
+		|| ieee->bNetPromiscuousMode )
+	{
+		if(priv->rtllib->PowerSaveControl.bInactivePs){ 
+			if(rtState == eRfOff){
+				if(priv->rtllib->RfOffReason > RF_CHANGE_BY_IPS)
+				{
+					RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__FUNCTION__);
+					up(&priv->wx_sem);
+					return -1;
+				} else {
+					printk("=========>%s(): IPSLeave\n",__FUNCTION__);
+					down(&priv->rtllib->ips_sem);
+					IPSLeave(dev);
+					up(&priv->rtllib->ips_sem);				
+				}
+			}
+		}
+	}
+#endif
+	ret = rtllib_wx_set_mode(priv->rtllib,a,wrqu,b);
+
+	up(&priv->wx_sem);
+	return ret;
+}
+#if defined (RTL8192S_WAPI_SUPPORT)
+int wapi_ioctl_set_mode(struct net_device *dev, struct iw_request_info *a,
+			     union iwreq_data *wrqu, char *b)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	RT_RF_POWER_STATE	rtState;
+	int ret;
+
+	printk("===============================>%s\n", __FUNCTION__);	
+	if(priv->bHwRadioOff == true)
+		return 0;
+#ifdef _RTL8192_EXT_PATCH_
+	if (priv->mshobj && (priv->rtllib->iw_mode==IW_MODE_MESH)) {
+		return 0;	
+	}
+#endif
+	rtState = priv->rtllib->eRFPowerState;
+#ifdef ENABLE_IPS	
+	if(wrqu->mode == IW_MODE_ADHOC){
+		if(priv->rtllib->PowerSaveControl.bInactivePs){ 
+			if(rtState == eRfOff){
+				if(priv->rtllib->RfOffReason > RF_CHANGE_BY_IPS)
+				{
+					RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__FUNCTION__);
+					up(&priv->wx_sem);
+					return -1;
+				} else {
+					printk("=========>%s(): IPSLeave\n",__FUNCTION__);
+					down(&priv->rtllib->ips_sem);
+					IPSLeave(dev);
+					up(&priv->rtllib->ips_sem);				
+				}
+			}
+		}
+	}
+#endif
+	ret = rtllib_wx_set_mode(priv->rtllib,a,wrqu,b);
+
+	return ret;
+}
+#endif
+struct  iw_range_with_scan_capa
+{
+        /* Informative stuff (to choose between different interface) */
+        __u32           throughput;     /* To give an idea... */
+        /* In theory this value should be the maximum benchmarked
+         * TCP/IP throughput, because with most of these devices the
+         * bit rate is meaningless (overhead an co) to estimate how
+         * fast the connection will go and pick the fastest one.
+         * I suggest people to play with Netperf or any benchmark...
+         */
+
+        /* NWID (or domain id) */
+        __u32           min_nwid;       /* Minimal NWID we are able to set */
+        __u32           max_nwid;       /* Maximal NWID we are able to set */
+
+        /* Old Frequency (backward compat - moved lower ) */
+        __u16           old_num_channels;
+        __u8            old_num_frequency;
+
+        /* Scan capabilities */
+        __u8            scan_capa;       
+};
+
+static int rtl8192_wx_get_range(struct net_device *dev, 
+				struct iw_request_info *info, 
+				union iwreq_data *wrqu, char *extra)
+{
+	struct iw_range *range = (struct iw_range *)extra;
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u16 val;
+	int i;
+
+	wrqu->data.length = sizeof(*range);
+	memset(range, 0, sizeof(*range));
+
+	/* ~130 Mb/s real (802.11n) */
+	range->throughput = 130 * 1000 * 1000;     
+
+	if(priv->rf_set_sens != NULL)
+		range->sensitivity = priv->max_sens;	/* signal level threshold range */
+	
+	range->max_qual.qual = 100;
+	range->max_qual.level = 0;
+	range->max_qual.noise = 0;
+	range->max_qual.updated = 7; /* Updated all three */
+
+	range->avg_qual.qual = 70; /* > 8% missed beacons is 'bad' */
+	range->avg_qual.level = 0;
+	range->avg_qual.noise = 0;
+	range->avg_qual.updated = 7; /* Updated all three */
+
+	range->num_bitrates = min(RATE_COUNT, IW_MAX_BITRATES);
+	
+	for (i = 0; i < range->num_bitrates; i++) {
+		range->bitrate[i] = rtl8192_rates[i];
+	}
+	
+	range->max_rts = DEFAULT_RTS_THRESHOLD;
+	range->min_frag = MIN_FRAG_THRESHOLD;
+	range->max_frag = MAX_FRAG_THRESHOLD;
+	
+	range->min_pmp = 0;
+	range->max_pmp = 5000000;
+	range->min_pmt = 0;
+	range->max_pmt = 65535*1000;	
+	range->pmp_flags = IW_POWER_PERIOD;
+	range->pmt_flags = IW_POWER_TIMEOUT;
+	range->pm_capa = IW_POWER_PERIOD | IW_POWER_TIMEOUT | IW_POWER_ALL_R;
+	range->we_version_compiled = WIRELESS_EXT;
+	range->we_version_source = 18;
+
+	for (i = 0, val = 0; i < 14; i++) {
+		if ((priv->rtllib->active_channel_map)[i+1]) {
+		        range->freq[val].i = i + 1;
+			range->freq[val].m = rtllib_wlan_frequencies[i] * 100000;
+			range->freq[val].e = 1;
+			val++;
+		} else {
+		}
+		
+		if (val == IW_MAX_FREQUENCIES)
+		break;
+	}
+	range->num_frequency = val;
+	range->num_channels = val;
+#if WIRELESS_EXT > 17
+	range->enc_capa = IW_ENC_CAPA_WPA|IW_ENC_CAPA_WPA2|
+			  IW_ENC_CAPA_CIPHER_TKIP|IW_ENC_CAPA_CIPHER_CCMP;
+#endif
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)
+	{
+		struct iw_range_with_scan_capa* tmp = (struct iw_range_with_scan_capa*)range;
+		tmp->scan_capa = 0x01;
+	}
+#else
+	range->scan_capa = IW_SCAN_CAPA_ESSID | IW_SCAN_CAPA_TYPE;
+#endif
+
+        /* Event capability (kernel + driver) */ 
+
+	return 0;
+}
+
+static int r8192_wx_set_scan(struct net_device *dev, struct iw_request_info *a,
+			     union iwreq_data *wrqu, char *b)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	struct rtllib_device* ieee = priv->rtllib;
+	RT_RF_POWER_STATE	rtState;
+	int ret;
+	
+#ifdef CONFIG_MP
+	printk("######################%s(): In MP Test Can not Scan\n",__FUNCTION__);
+	return 0;
+#endif
+	if (!(ieee->softmac_features & IEEE_SOFTMAC_SCAN)){
+		if((ieee->state >= RTLLIB_ASSOCIATING) && (ieee->state <= RTLLIB_ASSOCIATING_AUTHENTICATED)){
+			return 0;
+		}
+		if((priv->rtllib->state == RTLLIB_LINKED) && (priv->rtllib->CntAfterLink<2)){
+			return 0;
+		}
+	}
+
+	if(priv->bHwRadioOff == true){
+		printk("================>%s(): hwradio off\n",__FUNCTION__);
+		return 0;
+	}
+	rtState = priv->rtllib->eRFPowerState;
+	if(!priv->up) return -ENETDOWN;
+	if (priv->rtllib->LinkDetectInfo.bBusyTraffic == true)
+		return -EAGAIN;
+
+#ifdef _RTL8192_EXT_PATCH_	
+	if((ieee->iw_mode == IW_MODE_MESH)&&(ieee->mesh_state == RTLLIB_MESH_LINKED))
+	{
+		return 0;
+	}
+#endif
+#if WIRELESS_EXT > 17
+	if (wrqu->data.flags & IW_SCAN_THIS_ESSID)
+	{
+		struct iw_scan_req* req = (struct iw_scan_req*)b;
+		if (req->essid_len)
+		{
+			ieee->current_network.ssid_len = req->essid_len;
+			memcpy(ieee->current_network.ssid, req->essid, req->essid_len); 
+		}
+	}
+#endif	
+
+	down(&priv->wx_sem);
+
+	priv->rtllib->FirstIe_InScan = true;
+
+	if(priv->rtllib->state != RTLLIB_LINKED){
+#ifdef ENABLE_IPS
+		if(priv->rtllib->PowerSaveControl.bInactivePs){ 
+			if(rtState == eRfOff){
+				if(priv->rtllib->RfOffReason > RF_CHANGE_BY_IPS){
+					RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__FUNCTION__);
+					up(&priv->wx_sem);
+					return -1;
+				}else{
+					RT_TRACE(COMP_PS, "=========>%s(): IPSLeave\n",__FUNCTION__);
+					down(&priv->rtllib->ips_sem);
+					IPSLeave(dev);
+					up(&priv->rtllib->ips_sem);				
+				}
+			}
+		}
+#endif
+		rtllib_stop_scan(priv->rtllib);
+		if(priv->rtllib->LedControlHandler)
+			priv->rtllib->LedControlHandler(dev, LED_CTL_SITE_SURVEY);
+		
+                if(priv->rtllib->eRFPowerState != eRfOff){
+			priv->rtllib->actscanning = true;
+			rtllib_start_scan_syncro(priv->rtllib, 0);
+                }
+		ret = 0;
+	} else {
+		priv->rtllib->actscanning = true;
+	ret = rtllib_wx_set_scan(priv->rtllib,a,wrqu,b);
+	}
+	
+	up(&priv->wx_sem);
+	return ret;
+}
+
+
+static int r8192_wx_get_scan(struct net_device *dev, struct iw_request_info *a,
+			     union iwreq_data *wrqu, char *b)
+{
+
+	int ret;
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	if(!priv->up) return -ENETDOWN;
+			
+	if(priv->bHwRadioOff == true)
+		return 0;
+        
+			
+	down(&priv->wx_sem);
+
+	ret = rtllib_wx_get_scan(priv->rtllib,a,wrqu,b);
+		
+	up(&priv->wx_sem);
+	
+	return ret;
+}
+
+static int r8192_wx_set_essid(struct net_device *dev, 
+			      struct iw_request_info *a,
+			      union iwreq_data *wrqu, char *b)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	int ret;
+		
+	if ((rtllib_act_scanning(priv->rtllib, false)) && !(priv->rtllib->softmac_features & IEEE_SOFTMAC_SCAN)){
+		;
+	}
+#ifdef CONFIG_MP
+	printk("######################%s(): In MP Test Can not Set Essid\n",__FUNCTION__);
+	return 0;
+#endif
+	if(priv->bHwRadioOff == true){
+		printk("=========>%s():hw radio off,or Rf state is eRfOff, return\n",__FUNCTION__);
+		return 0;
+	}
+	down(&priv->wx_sem);
+	ret = rtllib_wx_set_essid(priv->rtllib,a,wrqu,b);
+
+	up(&priv->wx_sem);
+
+	return ret;
+}
+
+static int r8192_wx_get_essid(struct net_device *dev, 
+			      struct iw_request_info *a,
+			      union iwreq_data *wrqu, char *b)
+{
+	int ret;
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	down(&priv->wx_sem);
+	
+	ret = rtllib_wx_get_essid(priv->rtllib, a, wrqu, b);
+
+	up(&priv->wx_sem);
+	
+	return ret;
+}
+
+static int r8192_wx_set_nick(struct net_device *dev,
+			   struct iw_request_info *info,
+			   union iwreq_data *wrqu, char *extra)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+
+	if (wrqu->data.length > IW_ESSID_MAX_SIZE)
+		return -E2BIG;
+	down(&priv->wx_sem);
+	wrqu->data.length = min((size_t) wrqu->data.length, sizeof(priv->nick));
+	memset(priv->nick, 0, sizeof(priv->nick));
+	memcpy(priv->nick, extra, wrqu->data.length);
+	up(&priv->wx_sem);
+	return 0;
+
+}
+
+static int r8192_wx_get_nick(struct net_device *dev,
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+
+	down(&priv->wx_sem);
+	wrqu->data.length = strlen(priv->nick);
+	memcpy(extra, priv->nick, wrqu->data.length);
+	wrqu->data.flags = 1;   /* active */
+	up(&priv->wx_sem);
+	return 0;
+}
+
+static int r8192_wx_set_freq(struct net_device *dev, struct iw_request_info *a,
+			     union iwreq_data *wrqu, char *b)
+{
+	int ret;
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	if(priv->bHwRadioOff == true)
+		return 0;
+	
+	down(&priv->wx_sem);
+	
+	ret = rtllib_wx_set_freq(priv->rtllib, a, wrqu, b);
+	
+	up(&priv->wx_sem);
+	return ret;
+}
+
+static int r8192_wx_get_name(struct net_device *dev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	return rtllib_wx_get_name(priv->rtllib, info, wrqu, extra);
+}
+
+
+static int r8192_wx_set_frag(struct net_device *dev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+
+	if(priv->bHwRadioOff == true)
+		return 0;
+	
+	if (wrqu->frag.disabled)
+		priv->rtllib->fts = DEFAULT_FRAG_THRESHOLD;
+	else {
+		if (wrqu->frag.value < MIN_FRAG_THRESHOLD ||
+		    wrqu->frag.value > MAX_FRAG_THRESHOLD)
+			return -EINVAL;
+		
+		priv->rtllib->fts = wrqu->frag.value & ~0x1;
+	}
+
+	return 0;
+}
+
+
+static int r8192_wx_get_frag(struct net_device *dev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+
+	wrqu->frag.value = priv->rtllib->fts;
+	wrqu->frag.fixed = 0;	/* no auto select */
+	wrqu->frag.disabled = (wrqu->frag.value == DEFAULT_FRAG_THRESHOLD);
+
+	return 0;
+}
+
+
+static int r8192_wx_set_wap(struct net_device *dev,
+			 struct iw_request_info *info,
+			 union iwreq_data *awrq,
+			 char *extra)
+{
+
+	int ret;
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	if ((rtllib_act_scanning(priv->rtllib, false)) && !(priv->rtllib->softmac_features & IEEE_SOFTMAC_SCAN)){
+		;
+	}
+
+	if(priv->bHwRadioOff == true)
+		return 0;
+	
+#ifdef _RTL8192_EXT_PATCH_
+	if (priv->mshobj && (priv->rtllib->iw_mode==IW_MODE_MESH)){
+		return 0;
+	}
+#endif
+	down(&priv->wx_sem);
+	
+	ret = rtllib_wx_set_wap(priv->rtllib,info,awrq,extra);
+
+	up(&priv->wx_sem);
+
+	return ret;
+	
+}
+	
+
+static int r8192_wx_get_wap(struct net_device *dev, 
+			    struct iw_request_info *info, 
+			    union iwreq_data *wrqu, char *extra)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	return rtllib_wx_get_wap(priv->rtllib,info,wrqu,extra);
+}
+
+
+static int r8192_wx_get_enc(struct net_device *dev, 
+			    struct iw_request_info *info, 
+			    union iwreq_data *wrqu, char *key)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+#ifdef _RTL8192_EXT_PATCH_
+	return rtllib_wx_get_encode(priv->rtllib, info, wrqu, key,0);
+#else
+	return rtllib_wx_get_encode(priv->rtllib, info, wrqu, key);
+#endif
+}
+
+static int r8192_wx_set_enc(struct net_device *dev, 
+			    struct iw_request_info *info, 
+			    union iwreq_data *wrqu, char *key)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	int ret;
+
+	struct rtllib_device *ieee = priv->rtllib;
+	u32 hwkey[4]={0,0,0,0};
+	u8 mask=0xff;
+	u32 key_idx=0;
+	u8 zero_addr[4][6] ={	{0x00,0x00,0x00,0x00,0x00,0x00},
+				{0x00,0x00,0x00,0x00,0x00,0x01}, 
+				{0x00,0x00,0x00,0x00,0x00,0x02}, 
+				{0x00,0x00,0x00,0x00,0x00,0x03} };
+	int i;
+
+	if ((rtllib_act_scanning(priv->rtllib, false)) && !(priv->rtllib->softmac_features & IEEE_SOFTMAC_SCAN)){
+		;
+	}
+#ifdef CONFIG_MP
+	printk("######################%s(): In MP Test Can not Set Enc\n",__FUNCTION__);
+	return 0;
+#endif
+	if(priv->bHwRadioOff == true)
+		return 0;
+	
+       if(!priv->up) return -ENETDOWN;
+
+        priv->rtllib->wx_set_enc = 1;
+#ifdef ENABLE_IPS
+        down(&priv->rtllib->ips_sem);
+        IPSLeave(dev);
+        up(&priv->rtllib->ips_sem);			
+#endif
+	down(&priv->wx_sem);
+	
+	RT_TRACE(COMP_SEC, "Setting SW wep key");
+#ifdef _RTL8192_EXT_PATCH_
+	ret = rtllib_wx_set_encode(priv->rtllib,info,wrqu,key,0);
+#else	
+	ret = rtllib_wx_set_encode(priv->rtllib,info,wrqu,key);
+#endif
+	up(&priv->wx_sem);
+
+
+	if (wrqu->encoding.flags & IW_ENCODE_DISABLED) {
+		ieee->pairwise_key_type = ieee->group_key_type = KEY_TYPE_NA;
+		CamResetAllEntry(dev);
+#ifdef _RTL8192_EXT_PATCH_
+		CamRestoreEachIFEntry(dev,1);
+		reset_IFswcam(dev,0);
+		priv->rtllib->wx_set_enc = 0;
+#else
+		memset(priv->rtllib->swcamtable,0,sizeof(SW_CAM_TABLE)*32);
+#endif
+		goto end_hw_sec;
+	}
+	if(wrqu->encoding.length!=0){
+
+		for(i=0 ; i<4 ; i++){
+			hwkey[i] |=  key[4*i+0]&mask;
+			if(i==1&&(4*i+1)==wrqu->encoding.length) mask=0x00;
+			if(i==3&&(4*i+1)==wrqu->encoding.length) mask=0x00;
+			hwkey[i] |= (key[4*i+1]&mask)<<8;
+			hwkey[i] |= (key[4*i+2]&mask)<<16;
+			hwkey[i] |= (key[4*i+3]&mask)<<24;
+		}
+
+		#define CONF_WEP40  0x4
+		#define CONF_WEP104 0x14
+
+		switch(wrqu->encoding.flags & IW_ENCODE_INDEX){
+			case 0: key_idx = ieee->tx_keyidx; break;
+			case 1:	key_idx = 0; break;
+			case 2:	key_idx = 1; break;
+			case 3:	key_idx = 2; break;
+			case 4:	key_idx	= 3; break;
+			default: break;
+		}
+		if(wrqu->encoding.length==0x5){
+		ieee->pairwise_key_type = KEY_TYPE_WEP40;
+			EnableHWSecurityConfig8192(dev);
+#ifndef _RTL8192_EXT_PATCH_
+			setKey( dev,
+				key_idx,                
+				key_idx,                
+				KEY_TYPE_WEP40,         
+				zero_addr[key_idx],
+				0,                      
+				hwkey);                 
+
+			set_swcam( dev,
+				key_idx,                
+				key_idx,                
+				KEY_TYPE_WEP40,         
+				zero_addr[key_idx],
+				0,                      
+				hwkey,                 
+				0);
+
+#endif
+		}
+
+		else if(wrqu->encoding.length==0xd){
+			ieee->pairwise_key_type = KEY_TYPE_WEP104;
+				EnableHWSecurityConfig8192(dev);
+#ifndef _RTL8192_EXT_PATCH_
+			setKey( dev,
+				key_idx,                
+				key_idx,                
+				KEY_TYPE_WEP104,        
+				zero_addr[key_idx],
+				0,                      
+				hwkey);                 
+			set_swcam( dev,
+				key_idx,                
+				key_idx,                
+				KEY_TYPE_WEP104,        
+				zero_addr[key_idx],
+				0,                      
+				hwkey,                 
+				0);
+#endif
+		}
+		else printk("wrong type in WEP, not WEP40 and WEP104\n");
+#ifdef _RTL8192_EXT_PATCH_
+		if(ieee->state == RTLLIB_LINKED){
+			if(ieee->iw_mode == IW_MODE_ADHOC)
+			{
+				
+				setKey( dev,
+						key_idx,                      
+						key_idx,                      
+						ieee->pairwise_key_type,        
+						zero_addr[key_idx],		
+						0,                      
+						hwkey);                 
+				set_swcam( dev,
+						key_idx,                      
+						key_idx,                      
+						ieee->pairwise_key_type,        
+						zero_addr[key_idx],		
+						0,                      
+						hwkey,               
+						0);
+			}
+			else{
+			setKey( dev,
+					31,                      
+					key_idx,                      
+						ieee->pairwise_key_type,        
+					ieee->ap_mac_addr,         
+					0,                      
+					hwkey);                 
+			set_swcam( dev,
+					31,                      
+					key_idx,                      
+						ieee->pairwise_key_type,        
+					ieee->ap_mac_addr,         
+					0,                      
+					hwkey,               
+					0);
+		}
+	}
+#endif
+	}
+
+#if 0
+	if(wrqu->encoding.length==0 && (wrqu->encoding.flags >>8) == 0x8 ){
+		printk("===>1\n");		
+		EnableHWSecurityConfig8192(dev);
+		key_idx = (wrqu->encoding.flags & 0xf)-1 ;
+		write_cam(dev, (4*6),   0xffff0000|read_cam(dev, key_idx*6) );
+		write_cam(dev, (4*6)+1, 0xffffffff);
+		write_cam(dev, (4*6)+2, read_cam(dev, (key_idx*6)+2) );
+		write_cam(dev, (4*6)+3, read_cam(dev, (key_idx*6)+3) );
+		write_cam(dev, (4*6)+4, read_cam(dev, (key_idx*6)+4) );
+		write_cam(dev, (4*6)+5, read_cam(dev, (key_idx*6)+5) );
+	}
+#endif
+#ifdef _RTL8192_EXT_PATCH_
+	priv->rtllib->wx_set_enc = 0;
+	printk("===================>%s():set ieee->wx_set_enc 0\n",__FUNCTION__);
+end_hw_sec:
+#else
+end_hw_sec:
+	priv->rtllib->wx_set_enc = 0;
+#endif
+	return ret;
+}
+
+
+static int r8192_wx_set_scan_type(struct net_device *dev, struct iw_request_info *aa, union
+ iwreq_data *wrqu, char *p){
+  
+ 	struct r8192_priv *priv = rtllib_priv(dev);
+	int *parms=(int*)p;
+	int mode=parms[0];
+	
+	if(priv->bHwRadioOff == true)
+		return 0;
+	
+	priv->rtllib->active_scan = mode;
+	
+	return 1;
+}
+
+
+
+#define R8192_MAX_RETRY 255
+static int r8192_wx_set_retry(struct net_device *dev, 
+				struct iw_request_info *info, 
+				union iwreq_data *wrqu, char *extra)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	int err = 0;
+	
+	if(priv->bHwRadioOff == true)
+		return 0;
+	
+	down(&priv->wx_sem);
+	
+	if (wrqu->retry.flags & IW_RETRY_LIFETIME || 
+	    wrqu->retry.disabled){
+		err = -EINVAL;
+		goto exit;
+	}
+	if (!(wrqu->retry.flags & IW_RETRY_LIMIT)){
+		err = -EINVAL;
+		goto exit;
+	}
+
+	if(wrqu->retry.value > R8192_MAX_RETRY){
+		err= -EINVAL;
+		goto exit;
+	}
+	if (wrqu->retry.flags & IW_RETRY_MAX) {
+		priv->retry_rts = wrqu->retry.value;
+		DMESG("Setting retry for RTS/CTS data to %d", wrqu->retry.value);
+	
+	}else {
+		priv->retry_data = wrqu->retry.value;
+		DMESG("Setting retry for non RTS/CTS data to %d", wrqu->retry.value);
+	}
+	
+
+ 	rtl8192_commit(dev);
+	/*
+	if(priv->up){
+		rtl8180_halt_adapter(dev);
+		rtl8180_rx_enable(dev);
+		rtl8180_tx_enable(dev);
+			
+	}
+	*/
+exit:
+	up(&priv->wx_sem);
+	
+	return err;
+}
+
+static int r8192_wx_get_retry(struct net_device *dev, 
+				struct iw_request_info *info, 
+				union iwreq_data *wrqu, char *extra)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+
+	wrqu->retry.disabled = 0; /* can't be disabled */
+
+	if ((wrqu->retry.flags & IW_RETRY_TYPE) == 
+	    IW_RETRY_LIFETIME) 
+		return -EINVAL;
+	
+	if (wrqu->retry.flags & IW_RETRY_MAX) {
+		wrqu->retry.flags = IW_RETRY_LIMIT & IW_RETRY_MAX;
+		wrqu->retry.value = priv->retry_rts;
+	} else {
+		wrqu->retry.flags = IW_RETRY_LIMIT & IW_RETRY_MIN;
+		wrqu->retry.value = priv->retry_data;
+	}
+	
+
+	return 0;
+}
+
+static int r8192_wx_get_sens(struct net_device *dev, 
+				struct iw_request_info *info, 
+				union iwreq_data *wrqu, char *extra)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	if(priv->rf_set_sens == NULL) 
+		return -1; /* we have not this support for this radio */
+	wrqu->sens.value = priv->sens;
+	return 0;
+}
+
+
+static int r8192_wx_set_sens(struct net_device *dev, 
+				struct iw_request_info *info, 
+				union iwreq_data *wrqu, char *extra)
+{
+	
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	short err = 0;
+	
+	if(priv->bHwRadioOff == true)
+		return 0;
+	
+	down(&priv->wx_sem);
+	if(priv->rf_set_sens == NULL) {
+		err= -1; /* we have not this support for this radio */
+		goto exit;
+	}
+	if(priv->rf_set_sens(dev, wrqu->sens.value) == 0)
+		priv->sens = wrqu->sens.value;
+	else
+		err= -EINVAL;
+
+exit:
+	up(&priv->wx_sem);
+	
+	return err;
+}
+
+#if (WIRELESS_EXT >= 18)
+#if 0
+static int r8192_wx_get_enc_ext(struct net_device *dev,
+                                        struct iw_request_info *info,
+                                        union iwreq_data *wrqu, char *extra)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	int ret = 0;
+#ifdef _RTL8192_EXT_PATCH_
+	ret = rtllib_wx_get_encode_ext(priv->rtllib, info, wrqu, extra,0);
+#else
+	ret = rtllib_wx_get_encode_ext(priv->rtllib, info, wrqu, extra);
+#endif
+	return ret;
+}
+#endif
+
+#ifdef _RTL8192_EXT_PATCH_	
+static int meshdev_set_key_for_linked_peers(struct net_device *dev, u8 KeyIndex,u16 KeyType, u32 *KeyContent );
+static int r8192_set_hw_enc(struct net_device *dev,
+                                        struct iw_request_info *info,
+                                        union iwreq_data *wrqu, char *extra, u8 is_mesh)
+{
+	int ret=0;
+	struct r8192_priv *priv = rtllib_priv(dev);
+	struct rtllib_device* ieee = priv->rtllib;
+	u32 key[4] = {0};
+	struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
+	struct iw_point *encoding = &wrqu->encoding;
+	u8 idx = 0, alg = 0, group = 0;
+	u8 broadcast_addr[6] = {0xff,0xff,0xff,0xff,0xff,0xff};
+	u8 zero[6] = {0};
+        priv->rtllib->wx_set_enc = 1;
+#ifdef ENABLE_IPS
+        down(&priv->rtllib->ips_sem);
+        IPSLeave(dev);
+        up(&priv->rtllib->ips_sem);			
+#endif
+#if 0
+	static u8 CAM_CONST_ADDR[4][6] = {
+		{0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
+		{0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
+		{0x00, 0x00, 0x00, 0x00, 0x00, 0x02},
+		{0x00, 0x00, 0x00, 0x00, 0x00, 0x03}};
+#endif
+	if ((encoding->flags & IW_ENCODE_DISABLED) ||
+		ext->alg == IW_ENCODE_ALG_NONE) 
+	{
+		if(is_mesh)
+			ieee->mesh_pairwise_key_type = ieee->mesh_pairwise_key_type = KEY_TYPE_NA;
+		else
+			ieee->pairwise_key_type = ieee->group_key_type = KEY_TYPE_NA;
+		CamResetAllEntry(dev);
+		if(is_mesh)
+			CamRestoreEachIFEntry(dev,0);
+		else
+			CamRestoreEachIFEntry(dev,1);
+		reset_IFswcam(dev,is_mesh);
+		goto end_hw_sec;
+	}
+	alg =  (ext->alg == IW_ENCODE_ALG_CCMP)?KEY_TYPE_CCMP:ext->alg; 
+	idx = encoding->flags & IW_ENCODE_INDEX;
+	if (idx)
+		idx --;
+	group = ext->ext_flags & IW_ENCODE_EXT_GROUP_KEY;
+	printk("====>group is %x\n",group);
+	if ((!group) || (IW_MODE_ADHOC == ieee->iw_mode) || (alg ==  KEY_TYPE_WEP40) || (IW_MODE_MESH == ieee->iw_mode))
+	{
+		if ((ext->key_len == 13) && (alg == KEY_TYPE_WEP40) )
+			alg = KEY_TYPE_WEP104;
+		if(is_mesh)
+			ieee->mesh_pairwise_key_type = alg;
+		else
+			ieee->pairwise_key_type = alg;
+		EnableHWSecurityConfig8192(dev);
+	}
+	memcpy((u8*)key, ext->key, 16); 
+	if ((alg & KEY_TYPE_WEP40) && (ieee->auth_mode !=2) )
+	{
+		printk("=====>set WEP key\n");
+		if (ext->key_len == 13){
+			if(is_mesh)
+				ieee->mesh_pairwise_key_type = alg = KEY_TYPE_WEP104;
+			else
+				ieee->pairwise_key_type = alg = KEY_TYPE_WEP104;
+		}
+		if(ieee->iw_mode == IW_MODE_ADHOC){
+			set_swcam( dev,
+					idx,
+					idx, 
+					alg,  
+					zero, 
+					0,              
+					key,		   
+					is_mesh);
+			setKey( dev,
+					idx,
+					idx, 
+					alg,  
+					zero, 
+					0,              
+					key);           
+		}
+			
+		if(!is_mesh){ 
+			if(ieee->state == RTLLIB_LINKED){
+				setKey( dev,
+						31,                      
+						idx,                      
+						ieee->pairwise_key_type,        
+						ieee->ap_mac_addr,         
+						0,                      
+						key);                 
+				set_swcam( dev,
+						31,                      
+						idx,                      
+						ieee->pairwise_key_type,        
+						ieee->ap_mac_addr,         
+						0,                      
+						key,               
+						0);
+			}
+		}
+	}
+	else if (group)
+	{
+		printk("set group key\n");
+		if(is_mesh)
+			ieee->mesh_group_key_type = alg;
+		else
+			ieee->group_key_type = alg;
+		if(ieee->iw_mode == IW_MODE_ADHOC){
+			set_swcam(  dev,
+					idx,
+					idx, 
+					alg,  
+					broadcast_addr, 
+					0,              
+					key,           
+					is_mesh);
+			setKey(  dev,
+					idx,
+					idx, 
+					alg,  
+					broadcast_addr, 
+					0,              
+					key);           
+		}
+			
+		if(is_mesh)
+			meshdev_set_key_for_linked_peers(dev,
+				idx, 
+				alg,  
+				key); 
+	}
+	else 
+	{
+		printk("=============>set pairwise key\n");
+#ifdef RTL8192E
+		if ((ieee->pairwise_key_type == KEY_TYPE_CCMP) && ieee->pHTInfo->bCurrentHTSupport){
+			write_nic_byte(dev, 0x173, 1); 
+		}
+#endif
+		set_swcam( dev,
+				31, 
+				idx, 
+				alg,  
+				(u8*)ieee->ap_mac_addr, 
+				0,              
+				key,           
+				is_mesh);
+		setKey( dev,
+				31, 
+				idx, 
+				alg,  
+				(u8*)ieee->ap_mac_addr, 
+				0,              
+				key);           
+	}
+
+end_hw_sec:
+        priv->rtllib->wx_set_enc = 0;
+	return ret;	
+}
+	
+int rtl8192_set_key_for_AP(struct rtllib_device *ieee)
+{
+	struct rtllib_crypt_data **crypt;
+	int key_len=0;
+	char key[32]; 
+	u16 keytype = IW_ENCODE_ALG_NONE;
+#ifdef _RTL8192_EXT_PATCH_
+	crypt = &ieee->sta_crypt[ieee->tx_keyidx];
+#else
+	crypt = &ieee->crypt[ieee->tx_keyidx];
+#endif
+	if (*crypt == NULL || (*crypt)->ops == NULL)
+	{
+		printk("%s():no encrypt now\n",__FUNCTION__);
+		return 0;
+	}
+	if (!((*crypt)->ops->set_key && (*crypt)->ops->get_key)) 
+		return -1;
+	
+	key_len = (*crypt)->ops->get_key(key, 32, NULL, (*crypt)->priv);
+	if (strcmp((*crypt)->ops->name, "WEP") == 0 )
+	{
+		if(key_len == 5)
+			keytype = KEY_TYPE_WEP40;
+		else
+			keytype = KEY_TYPE_WEP104;
+	}
+	else if (strcmp((*crypt)->ops->name, "TKIP") == 0)
+		return 0;
+	else if (strcmp((*crypt)->ops->name, "CCMP") == 0)
+		return 0;
+
+	set_swcam( ieee->dev,
+				31,
+				ieee->tx_keyidx, 
+				keytype,  
+				ieee->ap_mac_addr, 
+				0,              
+				(u32 *)key ,          
+				0);
+	setKey( ieee->dev,
+			31,
+			ieee->tx_keyidx, 
+			keytype,  
+			ieee->ap_mac_addr, 
+			0,              
+			(u32 *)key);           
+	
+	
+	return 0;
+}
+
+static int r8192_wx_set_enc_ext(struct net_device *dev,
+                                        struct iw_request_info *info,
+                                        union iwreq_data *wrqu, char *extra)
+{
+	int ret=0;
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
+	struct r8192_priv *priv = rtllib_priv(dev);
+	struct rtllib_device* ieee = priv->rtllib;
+
+	if(priv->bHwRadioOff == true)
+		return 0;
+
+	SEM_DOWN_PRIV_WX(&priv->wx_sem);	
+	ret = rtllib_wx_set_encode_ext(ieee, info, wrqu, extra, 0);
+
+	ret |= r8192_set_hw_enc(dev,info,wrqu,extra, 0);
+	SEM_UP_PRIV_WX(&priv->wx_sem);	
+#endif
+
+	return ret;	
+}
+/*
+ * set key for mesh, not a wireless extension handler. 
+ * place it here because of porting from r8192_wx_set_enc_ext().  
+ */ 
+int r8192_mesh_set_enc_ext(struct net_device *dev,
+                        struct iw_point *encoding, struct iw_encode_ext *ext, u8 *addr)
+{
+	int ret=0;
+	int i=0;
+	u8 broadcast_addr[6] = {0xff,0xff,0xff,0xff,0xff,0xff};
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
+	struct r8192_priv *priv = rtllib_priv(dev);
+	struct rtllib_device* ieee = priv->rtllib;
+	u8 entry_idx = 0;
+	down(&priv->wx_sem);
+	if(memcmp(addr,broadcast_addr,6))
+	{
+		if ((i=rtllib_find_MP(ieee, addr, 0)) < 0) 
+		{
+			i = rtllib_find_MP(ieee, addr, 1); 
+			if (i<0) 
+				return -1;
+		}
+	}
+	ret = rtllib_mesh_set_encode_ext(ieee, encoding, ext, i);
+	if ((-EINVAL == ret) || (-ENOMEM == ret)) {
+		goto end_hw_sec;
+	}
+	{
+#if 0		
+		u8 zero[6] = {0};
+#endif
+		u32 key[4] = {0};
+		u8 idx = 0, alg = 0, group = 0;
+		if ((encoding->flags & IW_ENCODE_DISABLED) ||
+			ext->alg == IW_ENCODE_ALG_NONE) 
+		{
+			CamResetAllEntry(dev);
+			CamRestoreEachIFEntry(dev,0);
+			reset_IFswcam(dev,1);
+			goto end_hw_sec;
+		}
+		alg =  (ext->alg == IW_ENCODE_ALG_CCMP)?KEY_TYPE_CCMP:ext->alg; 
+		idx = encoding->flags & IW_ENCODE_INDEX;
+		if (idx)
+			idx --;
+		group = ext->ext_flags & IW_ENCODE_EXT_GROUP_KEY;
+
+		if (!group)
+		{
+			ieee->mesh_pairwise_key_type = alg;
+			EnableHWSecurityConfig8192(dev);	
+		}
+		
+		memcpy((u8*)key, ext->key, 16); 
+
+		if(group)
+		{
+			ieee->mesh_group_key_type = alg;
+#if 0
+			setKey( dev,
+					idx,
+					idx, 
+					alg,  
+					broadcast_addr, 
+					0,              
+					key);           
+#endif
+		}
+		else 
+		{
+#if 0	
+			if ((ieee->mesh_pairwise_key_type == KEY_TYPE_CCMP) && ieee->pHTInfo->bCurrentHTSupport){
+				write_nic_byte(dev, 0x173, 1); 
+			}
+#endif			
+			entry_idx = rtl8192_get_free_hwsec_cam_entry(ieee,addr);
+#if 0 
+			printk("%s(): Can't find  free hw security cam entry\n",__FUNCTION__);
+			ret = -1;
+#else
+			if (entry_idx >= TOTAL_CAM_ENTRY-1) {
+				printk("%s(): Can't find  free hw security cam entry\n",__FUNCTION__);
+				ret = -1;
+			} else {
+				set_swcam( dev,
+					entry_idx,		
+					idx, 		
+					alg,  		
+					(u8*)addr, 	
+					0,              
+					key,		
+					1);           	
+				setKey( dev,
+					entry_idx,		
+					idx, 		
+					alg,  		
+					(u8*)addr, 	
+					0,              
+					key);           
+				ret = 0;
+			}
+#endif
+		}
+
+
+	}
+
+end_hw_sec:
+	up(&priv->wx_sem);
+#endif
+	return ret;	
+
+}
+#else
+static int r8192_wx_set_enc_ext(struct net_device *dev,
+                                        struct iw_request_info *info,
+                                        union iwreq_data *wrqu, char *extra)
+{
+	int ret=0;
+	
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
+	struct r8192_priv *priv = rtllib_priv(dev);
+	struct rtllib_device* ieee = priv->rtllib;
+
+	if(priv->bHwRadioOff == true)
+		return 0;
+
+	down(&priv->wx_sem);
+
+        priv->rtllib->wx_set_enc = 1;
+#ifdef ENABLE_IPS
+        down(&priv->rtllib->ips_sem);
+        IPSLeave(dev);
+        up(&priv->rtllib->ips_sem);			
+#endif
+
+	ret = rtllib_wx_set_encode_ext(ieee, info, wrqu, extra);
+
+	{
+		u8 broadcast_addr[6] = {0xff,0xff,0xff,0xff,0xff,0xff};
+		u8 zero[6] = {0};
+		u32 key[4] = {0};
+		struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
+		struct iw_point *encoding = &wrqu->encoding;
+#if 0
+		static u8 CAM_CONST_ADDR[4][6] = {
+			{0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
+			{0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
+			{0x00, 0x00, 0x00, 0x00, 0x00, 0x02},
+			{0x00, 0x00, 0x00, 0x00, 0x00, 0x03}};
+#endif
+		u8 idx = 0, alg = 0, group = 0;
+		if ((encoding->flags & IW_ENCODE_DISABLED) ||
+		ext->alg == IW_ENCODE_ALG_NONE) 
+		{
+			ieee->pairwise_key_type = ieee->group_key_type = KEY_TYPE_NA;
+			CamResetAllEntry(dev);
+			memset(priv->rtllib->swcamtable,0,sizeof(SW_CAM_TABLE)*32);
+			goto end_hw_sec;
+		}
+		alg =  (ext->alg == IW_ENCODE_ALG_CCMP)?KEY_TYPE_CCMP:ext->alg; 
+		idx = encoding->flags & IW_ENCODE_INDEX;
+		if (idx)
+			idx --;
+		group = ext->ext_flags & IW_ENCODE_EXT_GROUP_KEY;
+
+		if ((!group) || (IW_MODE_ADHOC == ieee->iw_mode) || (alg ==  KEY_TYPE_WEP40))
+		{
+			if ((ext->key_len == 13) && (alg == KEY_TYPE_WEP40) )
+				alg = KEY_TYPE_WEP104;
+			ieee->pairwise_key_type = alg;
+			EnableHWSecurityConfig8192(dev);
+		}
+		memcpy((u8*)key, ext->key, 16); 
+		
+		if ((alg & KEY_TYPE_WEP40) && (ieee->auth_mode !=2) )
+		{
+			if (ext->key_len == 13)
+				ieee->pairwise_key_type = alg = KEY_TYPE_WEP104;
+			setKey( dev,
+					idx,
+					idx, 
+					alg,  
+					zero, 
+					0,              
+					key);           
+			set_swcam( dev,
+					idx,
+					idx, 
+					alg,  
+					zero, 
+					0,              
+					key,          
+					0);
+		}
+		else if (group)
+		{
+			ieee->group_key_type = alg;
+			setKey( dev,
+					idx,
+					idx, 
+					alg,  
+					broadcast_addr, 
+					0,              
+					key);           
+			set_swcam( dev,
+					idx,
+					idx, 
+					alg,  
+					broadcast_addr, 
+					0,              
+					key,                 
+					0);
+		}
+		else 
+		{
+			#ifdef RTL8192E
+			if ((ieee->pairwise_key_type == KEY_TYPE_CCMP) && ieee->pHTInfo->bCurrentHTSupport){
+							write_nic_byte(dev, 0x173, 1); 
+			}
+			#endif
+			setKey( dev,
+					4,
+					idx, 
+					alg,  
+					(u8*)ieee->ap_mac_addr, 
+					0,              
+					key);           
+			set_swcam( dev,
+					4,
+					idx, 
+					alg,  
+					(u8*)ieee->ap_mac_addr, 
+					0,              
+					key,                 
+					0);
+		}
+
+
+	}
+
+end_hw_sec:
+        priv->rtllib->wx_set_enc = 0;
+	up(&priv->wx_sem);
+#endif
+	return ret;	
+
+}
+#endif
+static int r8192_wx_set_auth(struct net_device *dev,
+                                        struct iw_request_info *info,
+                                        union iwreq_data *data, char *extra)
+{
+	int ret=0;
+	
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
+	struct r8192_priv *priv = rtllib_priv(dev);
+
+	if(priv->bHwRadioOff == true)
+		return 0;
+
+	down(&priv->wx_sem);
+	ret = rtllib_wx_set_auth(priv->rtllib, info, &(data->param), extra);
+	up(&priv->wx_sem);
+#endif
+	return ret;
+}
+
+static int r8192_wx_set_mlme(struct net_device *dev,
+                                        struct iw_request_info *info,
+                                        union iwreq_data *wrqu, char *extra)
+{
+
+	int ret=0;
+	
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
+	struct r8192_priv *priv = rtllib_priv(dev);
+
+	if(priv->bHwRadioOff == true)
+		return 0;
+
+	down(&priv->wx_sem);
+	ret = rtllib_wx_set_mlme(priv->rtllib, info, wrqu, extra);
+	up(&priv->wx_sem);
+#endif
+	return ret;
+}
+#endif
+
+static int r8192_wx_set_gen_ie(struct net_device *dev,
+                                        struct iw_request_info *info,
+                                        union iwreq_data *data, char *extra)
+{
+	int ret = 0;
+	
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
+        struct r8192_priv *priv = rtllib_priv(dev);
+
+	if(priv->bHwRadioOff == true)
+		return 0;
+
+        down(&priv->wx_sem);
+        ret = rtllib_wx_set_gen_ie(priv->rtllib, extra, data->data.length);
+        up(&priv->wx_sem);
+#endif
+        return ret;
+}
+
+static int r8192_wx_get_gen_ie(struct net_device *dev,
+                               struct iw_request_info *info, 
+			       union iwreq_data *data, char *extra)
+{
+	int ret = 0;
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
+        struct r8192_priv *priv = rtllib_priv(dev);
+	struct rtllib_device* ieee = priv->rtllib;
+
+	if (ieee->wpa_ie_len == 0 || ieee->wpa_ie == NULL) {
+		data->data.length = 0;
+		return 0;
+	}
+
+	if (data->data.length < ieee->wpa_ie_len) {
+		return -E2BIG;
+	}
+
+	data->data.length = ieee->wpa_ie_len;
+	memcpy(extra, ieee->wpa_ie, ieee->wpa_ie_len);
+#endif
+        return ret;
+}
+
+#ifdef _RTL8192_EXT_PATCH_
+/*
+   Output:
+     (case 1) Mesh: Enable. MESHID=[%s] (max length of %s is 32 bytes). 
+     (case 2) Mesh: Disable.
+*/
+static int r8192_wx_get_meshinfo(struct net_device *dev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	if( ! priv->mshobj || !priv->mshobj->ext_patch_r819x_wx_get_meshinfo )
+		return 0;
+	return priv->mshobj->ext_patch_r819x_wx_get_meshinfo(dev, info, wrqu, extra);
+}
+
+
+static int r8192_wx_enable_mesh(struct net_device *dev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	struct rtllib_device *ieee = priv->rtllib;
+	RT_RF_POWER_STATE       rtState;
+	int ret = 0;
+        rtState = priv->rtllib->eRFPowerState;
+	
+	if( ! priv->mshobj || !priv->mshobj->ext_patch_r819x_wx_enable_mesh )
+		return 0;
+
+	SEM_DOWN_PRIV_WX(&priv->wx_sem);	
+	if(priv->mshobj->ext_patch_r819x_wx_enable_mesh(dev))
+	{
+		union iwreq_data tmprqu;
+#ifdef ENABLE_IPS
+		if(priv->rtllib->PowerSaveControl.bInactivePs){
+			if(rtState == eRfOff){
+				if(priv->rtllib->RfOffReason > RF_CHANGE_BY_IPS)
+				{
+					RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__FUNCTION__);
+					SEM_UP_PRIV_WX(&priv->wx_sem);	
+					return -1;
+				}
+				else{
+					printk("=========>%s(): IPSLeave\n",__FUNCTION__);
+					IPSLeave(dev);
+				}
+			}
+		}
+#endif
+		if(ieee->only_mesh == 0) 
+		{
+			tmprqu.mode = ieee->iw_mode;
+			ieee->iw_mode = 0; 
+			ret = rtllib_wx_set_mode(ieee, info, &tmprqu, extra);
+		}
+	}
+
+	SEM_UP_PRIV_WX(&priv->wx_sem);	
+	
+	return ret;
+	
+}
+
+static int r8192_wx_disable_mesh(struct net_device *dev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	struct rtllib_device *ieee = priv->rtllib;
+
+	int ret = 0;
+	if( ! priv->mshobj || !priv->mshobj->ext_patch_r819x_wx_disable_mesh )
+		return 0;
+
+	SEM_DOWN_PRIV_WX(&priv->wx_sem);	
+	if(priv->mshobj->ext_patch_r819x_wx_disable_mesh(dev))
+	{
+		union iwreq_data tmprqu;
+		tmprqu.mode = ieee->iw_mode;
+		ieee->iw_mode = 999;
+		ret = rtllib_wx_set_mode(ieee, info, &tmprqu, extra);
+	}
+
+	SEM_UP_PRIV_WX(&priv->wx_sem);	
+	
+	return ret;
+}
+
+
+int r8192_wx_set_channel(struct net_device *dev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{
+	int ch = *extra;
+	struct r8192_priv *priv = rtllib_priv(dev);
+	struct rtllib_device *ieee = priv->rtllib;
+	
+	if (!priv->mshobj || (ieee->iw_mode != IW_MODE_MESH) || !priv->mshobj->ext_patch_r819x_wx_set_channel || !ieee->only_mesh)
+		return 0;	
+			
+	if ( ch < 0 ) 	
+	{
+		rtllib_start_scan(ieee);			
+		ieee->meshScanMode =2;
+	}
+	else	
+	{	
+		ieee->meshScanMode =0;		
+		if(priv->mshobj->ext_patch_r819x_wx_set_channel)
+		{
+			priv->mshobj->ext_patch_r819x_wx_set_channel(ieee, ch);
+			priv->mshobj->ext_patch_r819x_wx_set_mesh_chan(dev,ch);
+		}
+		queue_work_rsl(ieee->wq, &ieee->ext_stop_scan_wq);
+		ieee->set_chan(ieee->dev, ch);
+printk("!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!set current mesh network channel %d\n", ch);
+		ieee->current_mesh_network.channel = ch;
+		if(ieee->only_mesh)
+			ieee->current_network.channel = ch;
+		
+		ieee->current_network.channel = ieee->current_mesh_network.channel; 
+		if(ieee->pHTInfo->bCurBW40MHz)
+			HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20_40, (ieee->current_mesh_network.channel<=6)?HT_EXTCHNL_OFFSET_UPPER:HT_EXTCHNL_OFFSET_LOWER);  
+		else
+			HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20, (ieee->current_mesh_network.channel<=6)?HT_EXTCHNL_OFFSET_UPPER:HT_EXTCHNL_OFFSET_LOWER);  
+		if(rtllib_act_scanning(ieee,true) == true)
+			rtllib_stop_scan_syncro(ieee);
+	}
+		
+	return 0;
+}
+
+static int r8192_wx_set_meshID(struct net_device *dev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{	
+	struct r8192_priv *priv = rtllib_priv(dev);	
+	if( ! priv->mshobj || !priv->mshobj->ext_patch_r819x_wx_set_meshID )
+		return 0;
+
+	return priv->mshobj->ext_patch_r819x_wx_set_meshID(dev, wrqu->data.pointer);	
+}
+
+
+/* reserved for future
+static int r8192_wx_add_mac_deny(struct net_device *dev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	if( ! priv->mshobj || !priv->mshobj->ext_patch_r819x_wx_set_add_mac_deny )
+		return 0;
+
+	return priv->mshobj->ext_patch_r819x_wx_set_add_mac_deny(dev, info, wrqu, extra);
+}
+
+static int r8192_wx_del_mac_deny(struct net_device *dev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	if( ! priv->mshobj || !priv->mshobj->ext_patch_r819x_wx_set_del_mac_deny )
+		return 0;
+
+	return priv->mshobj->ext_patch_r819x_wx_set_del_mac_deny(dev, info, wrqu, extra);
+}
+*/
+/* reserved for future
+static int r8192_wx_get_mac_deny(struct net_device *dev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	if( ! priv->mshobj || !priv->mshobj->ext_patch_r819x_wx_get_mac_deny )
+		return 0;
+
+	return priv->mshobj->ext_patch_r819x_wx_get_mac_deny(dev, info, wrqu, extra);
+}
+static int r8192_wx_join_mesh(struct net_device *dev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{	
+	struct r8192_priv *priv = rtllib_priv(dev);	
+	int ret=0;
+	char ch;
+	if(priv->rtllib->iw_mode == IW_MODE_MESH) {
+		printk("join mesh %s\n",extra);
+		if (wrqu->essid.length > IW_ESSID_MAX_SIZE){
+			ret= -E2BIG;
+			goto out;
+		}
+		if((wrqu->essid.length == 1) && (wrqu->essid.flags == 1)){
+			ret = 0;
+			goto out;
+		}
+		if (wrqu->essid.flags && wrqu->essid.length) {
+			if(priv->mshobj->ext_patch_r819x_wx_get_selected_mesh_channel(dev, extra, &ch))
+			{
+				priv->mshobj->ext_patch_r819x_wx_set_meshID(dev, extra); 
+				priv->mshobj->ext_patch_r819x_wx_set_mesh_chan(dev,ch); 
+				r8192_wx_set_channel(dev, NULL, NULL, &ch);
+			}
+			else
+				printk("invalid mesh #\n");
+		}
+	}
+out:
+	return ret;
+}
+*/
+
+static int r8192_wx_get_mesh_list(struct net_device *dev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	if( ! priv->mshobj || !priv->mshobj->ext_patch_r819x_wx_get_mesh_list )
+		return 0;
+	return priv->mshobj->ext_patch_r819x_wx_get_mesh_list(dev, info, wrqu, extra);
+}
+
+static int r8192_wx_mesh_scan(struct net_device *dev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	if( ! priv->mshobj || !priv->mshobj->ext_patch_r819x_wx_mesh_scan )
+		return 0;
+	return priv->mshobj->ext_patch_r819x_wx_mesh_scan(dev, info, wrqu, extra);
+}
+
+static int r8192_wx_set_meshmode(struct net_device *dev,
+		struct iw_request_info *info,
+		union iwreq_data *wrqu, char *extra)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	SEM_DOWN_PRIV_WX(&priv->wx_sem);	
+
+	printk("%s(): set mesh mode ! extra is %d\n",__FUNCTION__, *extra);
+	if((*extra != WIRELESS_MODE_A) && (*extra != WIRELESS_MODE_B) && 
+		(*extra != WIRELESS_MODE_G) && (*extra != WIRELESS_MODE_AUTO) &&
+		(*extra != WIRELESS_MODE_N_24G) && (*extra != WIRELESS_MODE_N_5G))
+	{
+		printk("ERR!! you should input 1 | 2 | 4 | 8 | 16 | 32\n");
+		SEM_UP_PRIV_WX(&priv->wx_sem);	
+		return -1;
+	}
+	if(priv->rtllib->state == RTLLIB_LINKED)
+	{
+		if((priv->rtllib->mode != WIRELESS_MODE_N_5G) && (priv->rtllib->mode != WIRELESS_MODE_N_24G)){
+			printk("===>wlan0 is linked,and ieee->mode is not N mode ,do not need to set mode,return\n");
+			SEM_UP_PRIV_WX(&priv->wx_sem);	
+			return 0;
+		}
+	}
+	priv->rtllib->mode = *extra;
+	if(priv->ResetProgress == RESET_TYPE_NORESET)
+		rtl8192_SetWirelessMode(dev, priv->rtllib->mode);
+	 HTUseDefaultSetting(priv->rtllib);
+	SEM_UP_PRIV_WX(&priv->wx_sem);	
+	return 0;
+
+}
+
+static int r8192_wx_set_meshBW(struct net_device *dev,
+                struct iw_request_info *info,
+                union iwreq_data *wrqu, char *extra)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+
+	SEM_DOWN_PRIV_WX(&priv->wx_sem);	
+
+	printk("%s(): set mesh BW ! extra is %d\n",__FUNCTION__, *extra);
+	priv->rtllib->pHTInfo->bRegBW40MHz = *extra;
+	SEM_UP_PRIV_WX(&priv->wx_sem);	
+	return 0;
+}
+static int r8192_wx_set_mesh_security(struct net_device *dev,
+                struct iw_request_info *info,
+                union iwreq_data *wrqu, char *extra)
+{
+        struct r8192_priv *priv = rtllib_priv(dev);
+        struct rtllib_device* ieee = priv->rtllib;
+
+        down(&priv->wx_sem);
+
+        printk("%s(): set mesh security! extra is %d\n",__FUNCTION__, *extra);
+        ieee->mesh_security_setting = *extra;
+
+        if (0 == ieee->mesh_security_setting)
+        {
+		ieee->mesh_pairwise_key_type = ieee->mesh_group_key_type = KEY_TYPE_NA;
+		CamResetAllEntry(dev);
+		CamRestoreEachIFEntry(dev,0);
+		reset_IFswcam(dev,1);
+        }
+	else
+	{
+		ieee->mesh_pairwise_key_type = KEY_TYPE_CCMP;
+		ieee->mesh_group_key_type = KEY_TYPE_CCMP;
+	}
+        up(&priv->wx_sem);
+        return 0;
+
+}
+
+static int r8192_wx_set_mkdd_id(struct net_device *dev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{	
+	struct r8192_priv *priv = rtllib_priv(dev);	
+	printk("===>%s()\n",__FUNCTION__);	
+	if( ! priv->mshobj || !priv->mshobj->ext_patch_r819x_wx_set_mkdd_id)
+		return 0;
+
+	return priv->mshobj->ext_patch_r819x_wx_set_mkdd_id(dev, wrqu->data.pointer);	
+}
+
+static int r8192_wx_set_mesh_key(struct net_device *dev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{	
+	struct r8192_priv *priv = rtllib_priv(dev);	
+	printk("===>%s()\n",__FUNCTION__);	
+	if( ! priv->mshobj || !priv->mshobj->ext_patch_r819x_wx_set_mesh_key)
+		return 0;
+	return priv->mshobj->ext_patch_r819x_wx_set_mesh_key(dev, wrqu->data.pointer);	
+}
+
+static int r8192_wx_set_mesh_sec_type(struct net_device *dev,
+                struct iw_request_info *info,
+                union iwreq_data *wrqu, char *extra)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	struct rtllib_device* ieee = priv->rtllib;
+
+	printk("%s(): set mesh security type! extra is %d\n",__FUNCTION__, *extra);
+	if (ieee->mesh_sec_type == 1 && *extra != 1 && ieee->mesh_security_setting == 3) {
+		rtl8192_abbr_handshk_disable_key(ieee); 
+	
+		if(priv->mshobj->ext_patch_r819x_wx_release_sae_info)
+			priv->mshobj->ext_patch_r819x_wx_release_sae_info(ieee);
+	}
+	down(&priv->wx_sem);
+
+	ieee->mesh_sec_type = *extra;
+
+	if(ieee->mesh_sec_type == 0)
+		ieee->mesh_pairwise_key_type = ieee->mesh_group_key_type = KEY_TYPE_NA;
+
+	up(&priv->wx_sem);
+	return 0;
+}
+
+#endif 
+
+#define OID_RT_INTEL_PROMISCUOUS_MODE	0xFF0101F6
+
+static int r8192_wx_set_PromiscuousMode(struct net_device *dev,
+                struct iw_request_info *info,
+                union iwreq_data *wrqu, char *extra)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	struct rtllib_device* ieee = priv->rtllib;
+
+	u32 *info_buf = (u32*)(wrqu->data.pointer);
+
+	u32 oid = info_buf[0];
+	u32 bPromiscuousOn = info_buf[1];
+	u32 bFilterSourceStationFrame = info_buf[2];
+
+	if (OID_RT_INTEL_PROMISCUOUS_MODE == oid)
+	{
+		ieee->IntelPromiscuousModeInfo.bPromiscuousOn = 
+					(bPromiscuousOn)? (true) : (false);
+		ieee->IntelPromiscuousModeInfo.bFilterSourceStationFrame = 
+					(bFilterSourceStationFrame)? (true) : (false);
+
+		(bPromiscuousOn) ? (rtllib_EnableIntelPromiscuousMode(dev, false)) : 
+				(rtllib_DisableIntelPromiscuousMode(dev, false));	
+
+		printk("=======>%s(), on = %d, filter src sta = %d\n", __FUNCTION__, 
+			bPromiscuousOn, bFilterSourceStationFrame);
+	} else {
+		return -1;
+	}
+	
+	return 0;
+}
+
+
+static int r8192_wx_get_PromiscuousMode(struct net_device *dev,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	struct rtllib_device* ieee = priv->rtllib;
+
+        down(&priv->wx_sem);
+
+        snprintf(extra, 45, "PromiscuousMode:%d, FilterSrcSTAFrame:%d",\
+			ieee->IntelPromiscuousModeInfo.bPromiscuousOn,\
+			ieee->IntelPromiscuousModeInfo.bFilterSourceStationFrame);
+        wrqu->data.length = strlen(extra) + 1;
+
+        up(&priv->wx_sem);
+
+	return 0;
+}
+
+
+#define IW_IOCTL(x) [(x)-SIOCSIWCOMMIT]
+static iw_handler r8192_wx_handlers[] =
+{
+        IW_IOCTL(SIOCGIWNAME) = r8192_wx_get_name,   	  
+        IW_IOCTL(SIOCSIWFREQ) = r8192_wx_set_freq,        
+        IW_IOCTL(SIOCGIWFREQ) = r8192_wx_get_freq,        
+        IW_IOCTL(SIOCSIWMODE) = r8192_wx_set_mode,        
+        IW_IOCTL(SIOCGIWMODE) = r8192_wx_get_mode,        
+        IW_IOCTL(SIOCSIWSENS) = r8192_wx_set_sens,        
+        IW_IOCTL(SIOCGIWSENS) = r8192_wx_get_sens,        
+        IW_IOCTL(SIOCGIWRANGE) = rtl8192_wx_get_range,	  
+        IW_IOCTL(SIOCSIWAP) = r8192_wx_set_wap,      	  
+        IW_IOCTL(SIOCGIWAP) = r8192_wx_get_wap,           
+        IW_IOCTL(SIOCSIWSCAN) = r8192_wx_set_scan,        
+        IW_IOCTL(SIOCGIWSCAN) = r8192_wx_get_scan,        
+        IW_IOCTL(SIOCSIWESSID) = r8192_wx_set_essid,      
+        IW_IOCTL(SIOCGIWESSID) = r8192_wx_get_essid,      
+        IW_IOCTL(SIOCSIWNICKN) = r8192_wx_set_nick,
+		IW_IOCTL(SIOCGIWNICKN) = r8192_wx_get_nick,
+        IW_IOCTL(SIOCSIWRATE) = r8192_wx_set_rate,        
+        IW_IOCTL(SIOCGIWRATE) = r8192_wx_get_rate,        
+        IW_IOCTL(SIOCSIWRTS) = r8192_wx_set_rts,          
+        IW_IOCTL(SIOCGIWRTS) = r8192_wx_get_rts,          
+        IW_IOCTL(SIOCSIWFRAG) = r8192_wx_set_frag,        
+        IW_IOCTL(SIOCGIWFRAG) = r8192_wx_get_frag,        
+        IW_IOCTL(SIOCSIWRETRY) = r8192_wx_set_retry,      
+        IW_IOCTL(SIOCGIWRETRY) = r8192_wx_get_retry,      
+        IW_IOCTL(SIOCSIWENCODE) = r8192_wx_set_enc,       
+        IW_IOCTL(SIOCGIWENCODE) = r8192_wx_get_enc,       
+        IW_IOCTL(SIOCSIWPOWER) = r8192_wx_set_power,         
+        IW_IOCTL(SIOCGIWPOWER) = r8192_wx_get_power,         
+#if (WIRELESS_EXT >= 18)
+		IW_IOCTL(SIOCSIWGENIE) = r8192_wx_set_gen_ie, 	     
+		IW_IOCTL(SIOCGIWGENIE) = r8192_wx_get_gen_ie,
+		IW_IOCTL(SIOCSIWMLME) = r8192_wx_set_mlme,        
+		IW_IOCTL(SIOCSIWAUTH) = r8192_wx_set_auth,	    
+		IW_IOCTL(SIOCSIWENCODEEXT) = r8192_wx_set_enc_ext,  
+#endif
+}; 
+
+/* 
+ * the following rule need to be follwing,
+ * Odd : get (world access), 
+ * even : set (root access) 
+ * */
+static const struct iw_priv_args r8192_private_args[] = { 
+	{
+		SIOCIWFIRSTPRIV + 0x0, 
+		IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "set_debugflag" 
+	}, 
+	{
+		SIOCIWFIRSTPRIV + 0x1,
+		IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "activescan"
+	},
+	{
+		SIOCIWFIRSTPRIV + 0x2, 
+		IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "rawtx" 
+	}
+	,
+	{
+		SIOCIWFIRSTPRIV + 0x3,
+		IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "forcereset"
+	}
+	,
+	{
+		SIOCIWFIRSTPRIV + 0x4,
+		IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "force_mic_error"
+	}
+	,
+	{
+		SIOCIWFIRSTPRIV + 0x5,
+		IW_PRIV_TYPE_NONE, IW_PRIV_TYPE_INT|IW_PRIV_SIZE_FIXED|1, 
+		"firm_ver"
+	}
+	,
+	{
+		SIOCIWFIRSTPRIV + 0x6,
+		IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED|1, IW_PRIV_TYPE_NONE, 
+		"set_power"
+	}
+#ifdef _RTL8192_EXT_PATCH_
+	,
+	{
+		SIOCIWFIRSTPRIV + 0x7,
+		IW_PRIV_TYPE_NONE, IW_PRIV_TYPE_CHAR|512, 
+		"print_reg"
+	}
+	,
+	{
+		SIOCIWFIRSTPRIV + 0x8,
+		IW_PRIV_TYPE_NONE, IW_PRIV_TYPE_CHAR|64, 
+		"resume_firm"
+	}
+#endif
+	,
+	{
+		SIOCIWFIRSTPRIV + 0x9,
+		IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED|1, IW_PRIV_TYPE_NONE, 
+		"radio"
+	}
+        ,
+	{
+		SIOCIWFIRSTPRIV + 0xa,
+		IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED|1, IW_PRIV_TYPE_NONE, 
+		"lps_interv"
+	}
+        ,
+	{
+		SIOCIWFIRSTPRIV + 0xb,
+		IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED|1, IW_PRIV_TYPE_NONE, 
+		"lps_force"
+	}
+	,
+	{
+		SIOCIWFIRSTPRIV + 0xc,
+		0, IW_PRIV_TYPE_CHAR|2047, "adhoc_peer_list"
+	}
+#ifdef _RTL8192_EXT_PATCH_
+	,
+	{
+		SIOCIWFIRSTPRIV + 0xd,
+		IW_PRIV_TYPE_NONE, IW_PRIV_TYPE_CHAR|64, 
+		"driverVer"
+	}
+#endif
+#ifdef CONFIG_MP	
+	,
+	{
+		SIOCIWFIRSTPRIV + 0xe,
+                IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "SetChan"
+	}
+	,
+	{
+		SIOCIWFIRSTPRIV + 0xf,
+                IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "SetRate"
+	}
+	,
+	{
+		SIOCIWFIRSTPRIV + 0x10,
+                IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "SetTxPower"
+	}
+	,
+	{
+		SIOCIWFIRSTPRIV + 0x11,
+                IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "SetBW"
+	}
+	,
+	{
+		SIOCIWFIRSTPRIV + 0x12,
+		IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "TxStart"
+	}
+	,
+	{
+		SIOCIWFIRSTPRIV + 0x13,
+		IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1,0, "SetSingleCarrier"
+	}
+	,
+	{
+		SIOCIWFIRSTPRIV + 0x14,
+		IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 3, 0, "WriteRF"
+	}
+	,
+	{
+		SIOCIWFIRSTPRIV + 0x15,
+		IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 3, 0, "WriteMAC"
+	}
+#endif
+	,
+	{
+		SIOCIWFIRSTPRIV + 0x16,
+                IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 3, 0, "setpromisc"
+	}
+	,
+	{
+		SIOCIWFIRSTPRIV + 0x17,
+		0,IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | 45, "getpromisc"
+	}
+
+};
+
+static iw_handler r8192_private_handler[] = {
+	(iw_handler)r8192_wx_set_debugflag,   /*SIOCIWSECONDPRIV*/
+	(iw_handler)r8192_wx_set_scan_type,
+	(iw_handler)r8192_wx_set_rawtx,
+	(iw_handler)r8192_wx_force_reset,
+	(iw_handler)r8192_wx_force_mic_error,
+	(iw_handler)r8191se_wx_get_firm_version,
+	(iw_handler)r8192_wx_adapter_power_status,	    
+#ifdef _RTL8192_EXT_PATCH_
+	(iw_handler)r8192_wx_print_reg,	    
+	(iw_handler)r8192_wx_resume_firm,
+#else
+	(iw_handler)NULL, 
+	(iw_handler)NULL,
+#endif
+	(iw_handler)r8192se_wx_set_radio,
+	(iw_handler)r8192se_wx_set_lps_awake_interval,
+	(iw_handler)r8192se_wx_set_force_lps,
+	(iw_handler)r8192_wx_get_adhoc_peers,
+#ifdef _RTL8192_EXT_PATCH_
+	(iw_handler)r8192_wx_get_drv_version,
+#else
+	(iw_handler)NULL,
+#endif
+#ifdef CONFIG_MP
+	(iw_handler)r8192_wx_mp_set_chan,
+	(iw_handler)r8192_wx_mp_set_txrate,
+	(iw_handler)r8192_wx_mp_set_txpower,
+	(iw_handler)r8192_wx_mp_set_bw,
+        (iw_handler)r8192_wx_mp_set_txstart,
+        (iw_handler)r8192_wx_mp_set_singlecarrier,
+        (iw_handler)r8192_wx_mp_write_rf,
+	(iw_handler)r8192_wx_mp_write_mac,
+#else
+	(iw_handler)NULL,
+	(iw_handler)NULL,
+	(iw_handler)NULL,
+	(iw_handler)NULL,
+	(iw_handler)NULL,
+ 	(iw_handler)NULL,
+	(iw_handler)NULL,
+	(iw_handler)NULL,
+#endif
+	(iw_handler)r8192_wx_set_PromiscuousMode,
+	(iw_handler)r8192_wx_get_PromiscuousMode,
+};
+
+struct iw_statistics *r8192_get_wireless_stats(struct net_device *dev)
+{
+       struct r8192_priv *priv = rtllib_priv(dev);
+	struct rtllib_device* ieee = priv->rtllib;
+	struct iw_statistics* wstats = &priv->wstats;
+	int tmp_level = 0;
+	int tmp_qual = 0;
+	int tmp_noise = 0;
+	if(ieee->state < RTLLIB_LINKED)
+	{
+		wstats->qual.qual = 10;
+		wstats->qual.level = 0;
+		wstats->qual.noise = -100;
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,14)) 
+		wstats->qual.updated = IW_QUAL_ALL_UPDATED | IW_QUAL_DBM;
+#else
+		wstats->qual.updated = 0x0f;
+#endif
+		return wstats;
+	}
+	
+       tmp_level = (&ieee->current_network)->stats.rssi;
+	tmp_qual = (&ieee->current_network)->stats.signal;
+	tmp_noise = (&ieee->current_network)->stats.noise;			
+
+	wstats->qual.level = tmp_level;
+	wstats->qual.qual = tmp_qual;
+	wstats->qual.noise = tmp_noise;
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,14)) 
+	wstats->qual.updated = IW_QUAL_ALL_UPDATED | IW_QUAL_DBM;
+#else
+	wstats->qual.updated = 0x0f;
+#endif
+	return wstats;
+}
+
+#if defined RTL8192SE || defined RTL8192CE
+u8 SS_Rate_Map_G[6][2] = {{40, MGN_54M}, {30, MGN_48M}, {20, MGN_36M},
+	{12, MGN_24M}, {7, MGN_18M}, {0, MGN_12M}};
+u8 MSI_SS_Rate_Map_G[6][2] = {{40, MGN_54M}, {30, MGN_54M}, {20, MGN_54M},
+	{12, MGN_48M}, {7, MGN_36M}, {0, MGN_24M}};
+u8 SS_Rate_Map_B[2][2] = {{7, MGN_11M}, {0, MGN_5_5M}};
+u8 SS_Rate_Map_N_MCS7[7][2] = {{40, MGN_MCS7}, {30, MGN_MCS5}, {25, MGN_MCS4},
+	{23, MGN_MCS3}, {19, MGN_MCS2}, {8, MGN_MCS1}, {0, MGN_MCS0}};
+u8 SS_Rate_Map_N_MCS15[7][2] = {{40, MGN_MCS15}, {35, MGN_MCS14}, {31, MGN_MCS12},
+	{28, MGN_MCS7}, {25, MGN_MCS5}, {23, MGN_MCS3}, {20, MGN_MCS0}};
+#define TxRateTypeNormal        0
+#define TxRateTypeCurrent       1
+#define TxRateTypeStartRate     2
+
+u8 rtl8192_decorate_txrate_by_singalstrength(u32 SignalStrength, u8 *SS_Rate_Map, u8 MapSize)
+{
+	u8 index = 0;
+
+	for (index = 0; index < (MapSize * 2); index += 2) {
+		if (SignalStrength > SS_Rate_Map[index])
+			return SS_Rate_Map[index+1];
+	}
+
+	return MGN_1M;
+}
+
+u16 rtl8192_11n_user_show_rates(struct net_device* dev)
+{
+	struct r8192_priv  *priv = rtllib_priv(dev);
+	static u8  TimesForReportingFullRxSpeedAfterConnected = 100;
+	u8  rate = MGN_1M;
+	u32  Sgstrength;
+	bool TxorRx = priv->rtllib->bForcedShowRxRate;          
+
+
+	if (!TxorRx) {
+		{
+			return CONVERT_RATE(priv->rtllib, priv->rtllib->softmac_stats.CurrentShowTxate);
+		}
+	}
+
+	if(priv->rtllib->bForcedShowRateStill) {
+		Sgstrength = 100;
+	} else {
+		Sgstrength = priv->undecorated_smoothed_pwdb;
+	}
+
+	if (priv->rtllib->mode == WIRELESS_MODE_A ||
+			priv->rtllib->mode == WIRELESS_MODE_G ||
+			priv->rtllib->mode == (WIRELESS_MODE_G | WIRELESS_MODE_B )) {
+		if (priv->CustomerID == RT_CID_819x_MSI) {
+			rate = rtl8192_decorate_txrate_by_singalstrength(Sgstrength,
+					(u8*)MSI_SS_Rate_Map_G, sizeof(MSI_SS_Rate_Map_G)/2);
+		} else {
+			rate = rtl8192_decorate_txrate_by_singalstrength(Sgstrength,
+					(u8*)SS_Rate_Map_G, sizeof(SS_Rate_Map_G)/2);
+		}
+	} else if (priv->rtllib->mode == WIRELESS_MODE_B) {
+		rate = rtl8192_decorate_txrate_by_singalstrength(Sgstrength, (u8*)SS_Rate_Map_B,
+				sizeof(SS_Rate_Map_B)/2);
+	} else if(priv->rtllib->mode == WIRELESS_MODE_N_24G) {
+		bool  bMaxRateMcs15;
+		bool  b1SSSupport = priv->rtllib->b1x1RecvCombine;
+		u8    rftype = priv->rf_type;
+		if (((!TxorRx) && (rftype==RF_1T1R || rftype==RF_1T2R)) ||
+				(TxorRx && (rftype==RF_1T1R || (rftype==RF_1T2R && b1SSSupport))) ||
+				(rftype==RF_2T2R && priv->rtllib->HTHighestOperaRate<=MGN_MCS7))
+			bMaxRateMcs15 = false;
+		else
+			bMaxRateMcs15 = true;
+
+		if((priv->rtllib->state == RTLLIB_LINKED) && !(priv->rtllib->pHTInfo->bCurBW40MHz))
+			bMaxRateMcs15 = false;
+
+		if(priv->rtllib->state != RTLLIB_LINKED)
+			priv->rtllib->SystemQueryDataRateCount = 0;
+		if (TimesForReportingFullRxSpeedAfterConnected > priv->rtllib->SystemQueryDataRateCount) {
+			priv->rtllib->SystemQueryDataRateCount++;
+			if(bMaxRateMcs15)
+				return 600;
+			else
+				return 270;
+		}
+
+		if (bMaxRateMcs15)
+			rate = rtl8192_decorate_txrate_by_singalstrength(Sgstrength, (u8*)SS_Rate_Map_N_MCS15,
+					sizeof(SS_Rate_Map_N_MCS15)/2);
+		else
+			rate = rtl8192_decorate_txrate_by_singalstrength(Sgstrength, (u8*)SS_Rate_Map_N_MCS7,
+					sizeof(SS_Rate_Map_N_MCS7)/2);
+	} else if (priv->rtllib->mode == WIRELESS_MODE_N_5G) {
+		return 580;
+	} else {
+		return 2;
+	}
+
+	if (priv->rtllib->GetHalfNmodeSupportByAPsHandler(dev)) {
+		if (rate < 0x80)
+			return rate;
+		else
+			return HTHalfMcsToDataRate(priv->rtllib, rate);
+	} else {
+                return CONVERT_RATE(priv->rtllib, rate);
+        }
+}
+#endif
+
+struct iw_handler_def  r8192_wx_handlers_def={
+	.standard = r8192_wx_handlers,
+	.num_standard = sizeof(r8192_wx_handlers) / sizeof(iw_handler),
+	.private = r8192_private_handler,
+	.num_private = sizeof(r8192_private_handler) / sizeof(iw_handler),
+ 	.num_private_args = sizeof(r8192_private_args) / sizeof(struct iw_priv_args),
+#if WIRELESS_EXT >= 17	
+	.get_wireless_stats = r8192_get_wireless_stats,
+#endif
+	.private_args = (struct iw_priv_args *)r8192_private_args,	
+};
+
+#ifdef _RTL8192_EXT_PATCH_
+#define OID_802_11_MESH_SECURITY_INFO 0x0651
+#define OID_802_11_MESH_ID 0x0652
+#define OID_802_11_MESH_AUTO_LINK 0x0653
+#define OID_802_11_MESH_LINK_STATUS 0x0654
+#define OID_802_11_MESH_LIST 0x0655
+#define OID_802_11_MESH_ROUTE_LIST 0x0656
+#define OID_802_11_MESH_ADD_LINK 0x0657
+#define OID_802_11_MESH_DEL_LINK 0x0658
+#define OID_802_11_MESH_MAX_TX_RATE 0x0659
+#define OID_802_11_MESH_CHANNEL 0x065A
+#define OID_802_11_MESH_HOSTNAME	0x065B
+#define OID_802_11_MESH_ONLY_MODE  0x065C
+
+#define OID_GET_SET_TOGGLE 0x8000
+#define RTL_OID_802_11_MESH_SECURITY_INFO (OID_GET_SET_TOGGLE + OID_802_11_MESH_SECURITY_INFO)
+#define RTL_OID_802_11_MESH_ID (OID_GET_SET_TOGGLE + OID_802_11_MESH_ID)
+#define RTL_OID_802_11_MESH_AUTO_LINK (OID_GET_SET_TOGGLE + OID_802_11_MESH_AUTO_LINK)
+#define RTL_OID_802_11_MESH_ADD_LINK (OID_GET_SET_TOGGLE + OID_802_11_MESH_ADD_LINK)
+#define RTL_OID_802_11_MESH_DEL_LINK (OID_GET_SET_TOGGLE + OID_802_11_MESH_DEL_LINK)
+#define RTL_OID_802_11_MESH_MAX_TX_RATE (OID_GET_SET_TOGGLE + OID_802_11_MESH_MAX_TX_RATE)
+#define RTL_OID_802_11_MESH_CHANNEL (OID_GET_SET_TOGGLE + OID_802_11_MESH_CHANNEL)
+#define RTL_OID_802_11_MESH_HOSTNAME		(OID_GET_SET_TOGGLE + OID_802_11_MESH_HOSTNAME)
+#define RTL_OID_802_11_MESH_ONLY_MODE    (OID_GET_SET_TOGGLE + OID_802_11_MESH_ONLY_MODE)
+
+#define MAX_NEIGHBOR_NUM 64 
+typedef struct _MESH_NEIGHBOR_ENTRY
+{
+	char Rssi;
+	unsigned char HostName[MAX_HOST_NAME_LENGTH];
+	unsigned char MacAddr[ETH_ALEN];
+	unsigned char MeshId[MAX_MESH_ID_LEN];
+	unsigned char Channel;
+	unsigned char Status; 
+	unsigned char MeshEncrypType;		
+} MESH_NEIGHBOR_ENTRY, *PMESH_NEIGHBOR_ENTRY;
+typedef struct _MESH_NEIGHBOR_INFO
+{
+	MESH_NEIGHBOR_ENTRY Entry[MAX_NEIGHBOR_NUM];
+	unsigned char num;
+} MESH_NEIGHBOR_INFO, *PMESH_NEIGHBOR_INFO;
+
+static int meshdev_set_key_for_linked_peers(struct net_device *dev, u8 KeyIndex, 
+		                            u16 KeyType, u32 *KeyContent )
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	struct rtllib_device* ieee = priv->rtllib;
+	struct mshclass *mshobj = priv->mshobj;
+	PMESH_NEIGHBOR_INFO  pmesh_neighbor = NULL;
+	PMESH_NEIGHBOR_ENTRY pneighbor_entry = NULL;
+	u8 entry_idx = 0;
+	int i = 0;
+	int found_idx = MAX_MP-1;
+	pmesh_neighbor = (PMESH_NEIGHBOR_INFO)kmalloc(sizeof(MESH_NEIGHBOR_INFO), GFP_KERNEL);
+	if(NULL == pmesh_neighbor)
+		return -1;
+	
+	if(mshobj->ext_patch_r819x_get_peers)
+		mshobj->ext_patch_r819x_get_peers(dev, (void*)pmesh_neighbor);
+	
+	for (i=0; i<pmesh_neighbor->num; i++) {
+		pneighbor_entry = (PMESH_NEIGHBOR_ENTRY)&pmesh_neighbor->Entry[i];
+		if (mshobj->ext_patch_r819x_insert_linking_crypt_peer_queue)
+			found_idx = mshobj->ext_patch_r819x_insert_linking_crypt_peer_queue(ieee,pneighbor_entry->MacAddr);
+		if (found_idx == -1) {
+			printk("%s(): found_idx is -1 , something is wrong, return\n",__FUNCTION__);
+			return -1;
+		} else if (found_idx == (MAX_MP - 1)) {
+			printk("%s(): found_idx is MAX_MP-1, peer entry is full, return\n",__FUNCTION__);
+			return -1;
+		}
+		if ((((ieee->LinkingPeerBitMap>>found_idx) & (BIT0)) == BIT0) && ((ieee->LinkingPeerSecState[found_idx] == USED) )) {
+			entry_idx = rtl8192_get_free_hwsec_cam_entry(ieee, pneighbor_entry->MacAddr);
+#if 0
+			printk("%s: Can not find free hw security cam entry, use software encryption entry(%d)\n", __FUNCTION__,entry_idx);
+			if (mshobj->ext_patch_r819x_set_msh_peer_entry_sec_info)
+				mshobj->ext_patch_r819x_set_msh_peer_entry_sec_info(ieee,pneighbor_entry->MacAddr,SW_SEC);
+			ieee->LinkingPeerSecState[found_idx] = SW_SEC; 
+#else
+			if (entry_idx >=  TOTAL_CAM_ENTRY-1) {
+				printk("%s: Can not find free hw security cam entry, use software encryption entry(%d)\n", __FUNCTION__,entry_idx);
+				if (mshobj->ext_patch_r819x_set_msh_peer_entry_sec_info)
+					mshobj->ext_patch_r819x_set_msh_peer_entry_sec_info(ieee,pneighbor_entry->MacAddr,SW_SEC);
+				ieee->LinkingPeerSecState[found_idx] = SW_SEC; 
+			} else {
+				printk("==========>%s():entry_idx is %d,set HW CAM\n",__FUNCTION__,entry_idx);
+				set_swcam( dev,
+						entry_idx,
+						KeyIndex, 
+						KeyType,  
+						pneighbor_entry->MacAddr, 
+						0,              
+						KeyContent,           
+						1);
+				setKey( dev,
+						entry_idx,
+						KeyIndex, 
+						KeyType,  
+						pneighbor_entry->MacAddr, 
+						0,              
+						KeyContent);           
+						if (mshobj->ext_patch_r819x_set_msh_peer_entry_sec_info)
+							mshobj->ext_patch_r819x_set_msh_peer_entry_sec_info(ieee,pneighbor_entry->MacAddr,HW_SEC);
+						ieee->LinkingPeerSecState[found_idx] = HW_SEC; 
+			}
+#endif
+		}
+	}
+	if(pmesh_neighbor)
+		kfree(pmesh_neighbor);
+	return 0;
+}
+
+int meshdev_set_key_for_peer(struct net_device *dev, 
+								u8 *Addr,
+								u8 KeyIndex, 
+								u16 KeyType, 
+								u32 *KeyContent )
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	struct rtllib_device* ieee = priv->rtllib;
+	u8 entry_idx = 0;
+	
+	entry_idx = rtl8192_get_free_hwsec_cam_entry(ieee, Addr);
+#if 0
+	printk("%s: Can not find free hw security cam entry\n", __FUNCTION__);
+	return -1;
+#else
+	if (entry_idx >=  TOTAL_CAM_ENTRY-1) {
+		printk("%s: Can not find free hw security cam entry\n", __FUNCTION__);
+		return -1;
+	} else {
+		set_swcam(dev,
+			entry_idx,
+			KeyIndex, 
+			KeyType,  
+			Addr, 
+			0,              
+			KeyContent,           
+			1);
+		setKey(dev,
+			entry_idx,
+			KeyIndex, 
+			KeyType,  
+			Addr, 
+			0,              
+			KeyContent);           
+	}
+	return 0;
+#endif
+}
+
+static struct net_device_stats *meshdev_stats(struct net_device *meshdev)
+{
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0) 
+	return &((struct meshdev_priv*)netdev_priv(meshdev))->stats;
+#else
+	return &((struct meshdev_priv*)meshdev->priv)->stats;
+#endif
+}
+
+static int meshdev_wx_get_name(struct net_device *meshdev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+
+	return r8192_wx_get_name(dev, info, wrqu, extra);
+}
+static int meshdev_wx_get_freq(struct net_device *meshdev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+	struct r8192_priv *priv = rtllib_priv(dev);
+
+	return rtllib_wx_get_freq(priv->rtllib,info,wrqu,extra,1);
+}
+static int meshdev_wx_get_mode(struct net_device *meshdev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+
+	if(0)
+		return r8192_wx_get_mode(dev, info, wrqu, extra);
+	else
+		return -1;
+}	
+static int meshdev_wx_get_sens(struct net_device *meshdev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+	
+	return r8192_wx_get_sens(dev, info, wrqu, extra);
+}
+static int meshdev_wx_get_range(struct net_device *meshdev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+
+	return rtl8192_wx_get_range(dev, info, wrqu, extra);
+}
+static int meshdev_wx_get_wap(struct net_device *meshdev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+
+	return r8192_wx_get_wap(dev, info, wrqu, extra);
+}
+static int meshdev_wx_get_essid(struct net_device *meshdev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+	struct r8192_priv *priv = rtllib_priv(dev);
+	struct mshclass *mshobj = priv->mshobj;
+	int ret = 0;	
+
+	if(mshobj->ext_patch_r819x_wx_get_meshid)
+		ret = mshobj->ext_patch_r819x_wx_get_meshid(dev, info, wrqu, extra);
+
+	return ret;
+}
+static int meshdev_wx_get_rate(struct net_device *meshdev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+
+	return r8192_wx_get_rate(dev, info, wrqu, extra);
+}
+#if 0
+static int meshdev_wx_set_freq(struct net_device *meshdev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+	
+	return r8192_wx_set_freq(dev, info, wrqu, extra);
+}
+static int meshdev_wx_set_rate(struct net_device *meshdev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+	
+	return r8192_wx_set_rate(dev, info, wrqu, extra);
+}
+static int meshdev_wx_set_sens(struct net_device *meshdev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+
+	return r8192_wx_set_sens(dev, info, wrqu, extra);
+}
+static int meshdev_wx_set_scan(struct net_device *meshdev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+
+	return r8192_wx_set_scan(dev, info, wrqu, extra);
+}
+static int meshdev_wx_get_scan(struct net_device *meshdev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+
+	return r8192_wx_get_scan(dev, info, wrqu, extra);
+}
+#endif
+static int meshdev_wx_set_enc(struct net_device *meshdev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *key)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+	struct r8192_priv *priv = (struct r8192_priv *)ieee->priv;
+	int ret;
+	u32 hwkey[4]={0,0,0,0};
+	u8 mask=0xff;
+	u32 key_idx=0;
+#if 0
+	u8 zero_addr[4][6] ={	{0x00,0x00,0x00,0x00,0x00,0x00},
+				{0x00,0x00,0x00,0x00,0x00,0x01}, 
+				{0x00,0x00,0x00,0x00,0x00,0x02}, 
+				{0x00,0x00,0x00,0x00,0x00,0x03} };
+#endif
+	int i;
+
+       if(!priv->mesh_up) return -ENETDOWN;
+
+	SEM_DOWN_PRIV_WX(&priv->wx_sem);	
+	
+	RT_TRACE(COMP_SEC, "Setting SW wep key");
+	ret = rtllib_wx_set_encode(priv->rtllib,info,wrqu,key,1);
+
+	SEM_UP_PRIV_WX(&priv->wx_sem);	
+
+
+	if(wrqu->encoding.length!=0){
+
+		for(i=0 ; i<4 ; i++){
+			hwkey[i] |=  key[4*i+0]&mask;
+			if(i==1&&(4*i+1)==wrqu->encoding.length) mask=0x00;
+			if(i==3&&(4*i+1)==wrqu->encoding.length) mask=0x00;
+			hwkey[i] |= (key[4*i+1]&mask)<<8;
+			hwkey[i] |= (key[4*i+2]&mask)<<16;
+			hwkey[i] |= (key[4*i+3]&mask)<<24;
+		}
+
+		#define CONF_WEP40  0x4
+		#define CONF_WEP104 0x14
+
+		switch(wrqu->encoding.flags & IW_ENCODE_INDEX){
+			case 0: key_idx = ieee->mesh_txkeyidx; break;
+			case 1:	key_idx = 0; break;
+			case 2:	key_idx = 1; break;
+			case 3:	key_idx = 2; break;
+			case 4:	key_idx	= 3; break;
+			default: break;
+		}
+
+		if(wrqu->encoding.length==0x5){
+		ieee->mesh_pairwise_key_type = KEY_TYPE_WEP40;
+			EnableHWSecurityConfig8192(dev);
+		}
+
+		else if(wrqu->encoding.length==0xd){
+			ieee->mesh_pairwise_key_type = KEY_TYPE_WEP104;
+				EnableHWSecurityConfig8192(dev);
+		}
+		else 
+			printk("wrong type in WEP, not WEP40 and WEP104\n");
+
+		meshdev_set_key_for_linked_peers(dev,
+						key_idx, 
+						ieee->mesh_pairwise_key_type,  
+						hwkey); 
+
+	}
+
+#if 0
+	if(wrqu->encoding.length==0 && (wrqu->encoding.flags >>8) == 0x8 ){
+		printk("===>1\n");		
+		EnableHWSecurityConfig8192(dev);
+		key_idx = (wrqu->encoding.flags & 0xf)-1 ;
+		write_cam(dev, (4*6),   0xffff0000|read_cam(dev, key_idx*6) );
+		write_cam(dev, (4*6)+1, 0xffffffff);
+		write_cam(dev, (4*6)+2, read_cam(dev, (key_idx*6)+2) );
+		write_cam(dev, (4*6)+3, read_cam(dev, (key_idx*6)+3) );
+		write_cam(dev, (4*6)+4, read_cam(dev, (key_idx*6)+4) );
+		write_cam(dev, (4*6)+5, read_cam(dev, (key_idx*6)+5) );
+	}
+#endif
+
+	return ret;
+}
+static int meshdev_wx_get_enc(struct net_device *meshdev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device * dev = ieee->dev;
+	struct r8192_priv* priv = rtllib_priv(dev);
+
+	if(!priv->mesh_up){
+		return -ENETDOWN;
+	}
+	return rtllib_wx_get_encode(ieee, info, wrqu, extra,1);
+}
+#if 0
+static int meshdev_wx_set_frag(struct net_device *meshdev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+
+	return r8192_wx_set_frag(dev, info, wrqu, extra);
+}
+static int meshdev_wx_get_frag(struct net_device *meshdev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+
+	return r8192_wx_get_frag(dev, info, wrqu, extra);
+}
+static int meshdev_wx_set_retry(struct net_device *meshdev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+
+	return r8192_wx_set_retry(dev, info, wrqu, extra);
+}
+static int meshdev_wx_get_retry(struct net_device *meshdev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+
+	return r8192_wx_get_retry(dev, info, wrqu, extra);
+}
+#endif
+static int meshdev_wx_set_mode(struct net_device *meshdev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+#if 0
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+	
+	return r8192_wx_set_mode(dev, info, wrqu, extra);
+#endif
+	return 0;
+}
+static int meshdev_wx_set_wap(struct net_device *meshdev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+#if 0
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+
+	return r8192_wx_set_wap(dev, info, wrqu, extra);
+#endif
+	return 0;
+}
+static int meshdev_wx_set_mlme(struct net_device *meshdev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+#if 0
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+
+	return r8192_wx_set_mlme(dev, info, wrqu, extra);
+#endif
+	return 0;
+}
+static int meshdev_wx_set_essid(struct net_device *meshdev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+#if 0
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+
+	return r8192_wx_set_essid(dev, info, wrqu, extra);
+#endif
+	return 0;
+}
+static int meshdev_wx_set_gen_ie(struct net_device *meshdev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+#if 0
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+
+	return r8192_wx_set_gen_ie(dev, info, wrqu, extra);
+#endif
+	return 0;
+}
+static int meshdev_wx_set_auth(struct net_device *meshdev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+#if 0
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+
+	return r8192_wx_set_auth(dev, info, wrqu, extra);
+#endif
+	return 0;
+}
+static int meshdev_wx_set_enc_ext(struct net_device *meshdev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	int ret=0;
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+	struct r8192_priv *priv = (struct r8192_priv *)ieee->priv;
+
+	printk("============================================================>%s\n", __FUNCTION__);
+	SEM_DOWN_PRIV_WX(&priv->wx_sem);	
+	ret = rtllib_wx_set_encode_ext(ieee, info, wrqu, extra, 1);
+
+	ret |= r8192_set_hw_enc(dev,info,wrqu,extra, 1);
+	SEM_UP_PRIV_WX(&priv->wx_sem);	
+#endif
+
+	return ret;	
+}
+
+static int dummy(struct net_device *dev, struct iw_request_info *a,
+		 union iwreq_data *wrqu,char *b)
+{
+	return -1;
+}
+
+int rt_ioctl_siwpmksa(struct net_device *dev,
+			   struct iw_request_info *info,
+			   union iwreq_data *wrqu,
+			   char *extra)
+{
+	return 0;
+}
+
+static iw_handler meshdev_wx_handlers[] =
+{
+	NULL,                     /* SIOCSIWCOMMIT */
+	meshdev_wx_get_name,   	  /* SIOCGIWNAME */
+	dummy,                    /* SIOCSIWNWID */
+	dummy,                    /* SIOCGIWNWID */
+	NULL,  
+	meshdev_wx_get_freq,        /* SIOCGIWFREQ */
+	meshdev_wx_set_mode,        /* SIOCSIWMODE */
+	meshdev_wx_get_mode,        /* SIOCGIWMODE */
+	NULL,  
+	meshdev_wx_get_sens,        /* SIOCGIWSENS */
+	NULL,                     /* SIOCSIWRANGE */
+	meshdev_wx_get_range,	  /* SIOCGIWRANGE */
+	NULL,                     /* SIOCSIWPRIV */
+	NULL,                     /* SIOCGIWPRIV */
+	NULL,                     /* SIOCSIWSTATS */
+	NULL,                     /* SIOCGIWSTATS */
+	dummy,                    /* SIOCSIWSPY */
+	dummy,                    /* SIOCGIWSPY */
+	NULL,                     /* SIOCGIWTHRSPY */
+	NULL,                     /* SIOCWIWTHRSPY */
+	meshdev_wx_set_wap,      	  /* SIOCSIWAP */
+	meshdev_wx_get_wap,         /* SIOCGIWAP */
+	meshdev_wx_set_mlme, 
+	dummy,                     /* SIOCGIWAPLIST -- depricated */
+	NULL,  
+	NULL,  
+	meshdev_wx_set_essid,       /* SIOCSIWESSID */
+	meshdev_wx_get_essid,       /* SIOCGIWESSID */
+	dummy,                    /* SIOCSIWNICKN */
+	dummy,                    /* SIOCGIWNICKN */
+	NULL,                     /* -- hole -- */
+	NULL,                     /* -- hole -- */
+	NULL,  
+	meshdev_wx_get_rate,        /* SIOCGIWRATE */
+	dummy,                    /* SIOCSIWRTS */
+	dummy,                    /* SIOCGIWRTS */
+	NULL,  
+	NULL,  
+	dummy,                    /* SIOCSIWTXPOW */
+	dummy,                    /* SIOCGIWTXPOW */
+	NULL,  
+	NULL,  
+	meshdev_wx_set_enc,         /* SIOCSIWENCODE */
+	meshdev_wx_get_enc,         /* SIOCGIWENCODE */
+	dummy,                    /* SIOCSIWPOWER */
+	dummy,                    /* SIOCGIWPOWER */
+	NULL,			/*---hole---*/
+	NULL, 			/*---hole---*/
+	meshdev_wx_set_gen_ie,
+	NULL, 			/* SIOCSIWGENIE */
+	meshdev_wx_set_auth,
+	NULL, 
+	meshdev_wx_set_enc_ext, 			/* SIOCSIWENCODEEXT */
+	NULL, 
+	(iw_handler) rt_ioctl_siwpmksa,
+	NULL, 			 /*---hole---*/
+}; 
+
+static struct iw_priv_args meshdev_private_args[] = { 
+	{
+		SIOCIWFIRSTPRIV + 0x0, 
+		0, 0, "enablemesh" 
+ 	},
+	{
+		SIOCIWFIRSTPRIV + 0x1, 
+		0, IW_PRIV_TYPE_CHAR | 64, "getmeshinfo"
+ 	},
+	{
+		SIOCIWFIRSTPRIV + 0x2, 
+		0, 0, "disablemesh"
+ 	},
+ 	{
+		SIOCIWFIRSTPRIV + 0x3, 
+		IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "setch"
+ 	},
+ 	{
+		SIOCIWFIRSTPRIV + 0x4, 
+		IW_PRIV_TYPE_CHAR | 64  , 0, "setmeshid"
+ 	},
+        {	SIOCIWFIRSTPRIV + 0x5, 
+		0,IW_PRIV_TYPE_CHAR | 64 , "getmeshlist"
+ 	},
+	{	SIOCIWFIRSTPRIV + 0x6, 
+		IW_PRIV_TYPE_CHAR | 64,0 , "meshscan"
+ 	},
+	{
+		SIOCIWFIRSTPRIV + 0x7,
+		IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "setmode"
+
+	},
+ 	{
+		SIOCIWFIRSTPRIV + 0x8, 
+		IW_PRIV_TYPE_CHAR | 64, 0, "sethostname"
+ 	},
+	{
+		SIOCIWFIRSTPRIV + 0x9,
+		IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "setBW"
+
+	},
+	{
+		SIOCIWFIRSTPRIV + 0xa, 
+		IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "updateBW"
+ 	}, 
+ 	{	SIOCIWFIRSTPRIV + 0xb, 
+		0,IW_PRIV_TYPE_CHAR | 256 , "macdenyget"
+ 	},
+ 	{	SIOCIWFIRSTPRIV + 0xc, 
+		IW_PRIV_TYPE_CHAR | 64,0 , "macdenyadd"
+ 	},
+	/*
+	{
+		SIOCIWFIRSTPRIV + 0xe, 
+		IW_PRIV_TYPE_INT | IW_PRIV_SIZE_MASK, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_MASK, ""
+ 	},*/
+        {	SIOCIWFIRSTPRIV + 0xf, 
+		0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_MASK , "getneighborlist"
+ 	},
+	/* Sub-ioctls definitions*/
+	/*
+	{
+		OID_802_11_MESH_ID, 
+		IW_PRIV_TYPE_INT | 2047, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_MASK, "meshid"
+	},
+	{
+		OID_802_11_MESH_LIST, 
+		IW_PRIV_TYPE_INT | 2047, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_MASK, "meshlist"
+	},*/
+	{	SIOCIWFIRSTPRIV + 0x10, 
+		IW_PRIV_TYPE_CHAR | 64, 0, "set"
+ 	},
+	{	SIOCIWFIRSTPRIV + 0x12, 
+		IW_PRIV_TYPE_CHAR | 64,0 , "macdenydel"
+ 	},
+	{
+		SIOCIWFIRSTPRIV + 0x14,
+		IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "setmeshsec"
+	},
+	{
+		SIOCIWFIRSTPRIV + 0x15,
+		IW_PRIV_TYPE_CHAR | 6, 0, "setmkddid"
+	},
+	{
+		SIOCIWFIRSTPRIV + 0x16,
+		IW_PRIV_TYPE_CHAR | 64, 0, "setkey"
+	},
+	{
+		SIOCIWFIRSTPRIV + 0x17,
+		IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "setsectype"
+	},
+};
+
+int meshdev_wx_mesh(struct net_device *meshdev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *meshpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device * ieee = meshpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+	struct r8192_priv *priv = rtllib_priv(dev);
+	struct mshclass *mshobj = priv->mshobj;
+	int ret = 0;
+
+	printk("@@@@@%s: ", __FUNCTION__);
+	if(mshobj)
+	{
+		switch(wrqu->data.flags)
+		{
+			case OID_802_11_MESH_SECURITY_INFO:
+			{
+				printk("OID_802_11_MESH_SECURITY_INFO \n");
+				if(mshobj->ext_patch_r819x_wx_get_security_info)
+					ret = mshobj->ext_patch_r819x_wx_get_security_info(dev, info, wrqu, extra);
+				break;
+			}
+			case OID_802_11_MESH_ID:
+			{
+				printk("OID_802_11_MESH_ID \n");
+				if(mshobj->ext_patch_r819x_wx_get_meshid)
+					ret = mshobj->ext_patch_r819x_wx_get_meshid(dev, info, wrqu, extra);
+				break;
+			}
+			case OID_802_11_MESH_AUTO_LINK:
+			{
+				printk("OID_802_11_MESH_AUTO_LINK \n");
+				if(mshobj->ext_patch_r819x_wx_get_auto_link)
+					ret = mshobj->ext_patch_r819x_wx_get_auto_link(dev, info, wrqu, extra);
+				break;
+			}
+			case OID_802_11_MESH_LINK_STATUS:
+			{
+				printk("OID_802_11_MESH_LINK_STATUS \n");
+				if(mshobj->ext_patch_r819x_wx_get_link_status)
+					ret = mshobj->ext_patch_r819x_wx_get_link_status(dev, info, wrqu, extra);
+				break;
+			}
+			case OID_802_11_MESH_LIST:
+			{
+				printk("OID_802_11_MESH_LIST \n");
+				if(mshobj->ext_patch_r819x_wx_get_neighbor_list)
+					ret = mshobj->ext_patch_r819x_wx_get_neighbor_list(dev, info, wrqu, extra);
+				break;
+			}
+			case OID_802_11_MESH_ROUTE_LIST:
+			{
+				printk("OID_802_11_MESH_ROUTE_LIST \n");
+				if(mshobj->ext_patch_r819x_wx_get_route_list)
+					ret = mshobj->ext_patch_r819x_wx_get_route_list(dev, info, wrqu, extra);
+				break;
+			}
+			case OID_802_11_MESH_MAX_TX_RATE:
+			{
+				printk("OID_802_11_MESH_MAX_TX_RATE \n");
+				if(mshobj->ext_patch_r819x_wx_get_maxrate)
+					ret = mshobj->ext_patch_r819x_wx_get_maxrate(dev, info, wrqu, extra);
+				break;
+			}
+			case OID_802_11_MESH_CHANNEL:
+			{
+				printk("OID_802_11_MESH_CHANNEL \n");
+				if(mshobj->ext_patch_r819x_wx_get_channel)
+					ret = mshobj->ext_patch_r819x_wx_get_channel(dev, info, wrqu, extra);
+				break;
+			}
+			case OID_802_11_MESH_HOSTNAME:
+			{
+				printk("OID_802_11_MESH_HOSTNAME \n");
+				if(mshobj->ext_patch_r819x_wx_get_host_name)
+					ret = mshobj->ext_patch_r819x_wx_get_host_name(dev, info, wrqu, extra);
+				break;
+			}
+			case OID_802_11_MESH_ONLY_MODE:
+			{
+				printk("OID_802_11_MESH_ONLY_MODE \n");
+				if(mshobj->ext_patch_r819x_wx_get_mesh_only_mode)
+					ret = mshobj->ext_patch_r819x_wx_get_mesh_only_mode(dev, info, wrqu, extra);
+				break;
+			}
+			case RTL_OID_802_11_MESH_SECURITY_INFO:
+			{
+				printk("RTL_OID_802_11_MESH_SECURITY_INFO \n");
+				if(mshobj->ext_patch_r819x_wx_set_security_info)
+					ret = mshobj->ext_patch_r819x_wx_set_security_info(dev, info, wrqu, extra);
+				break;
+			}
+			case RTL_OID_802_11_MESH_ID:
+			{
+				printk("RTL_OID_802_11_MESH_ID \n");
+				if(mshobj->ext_patch_r819x_wx_set_meshID)
+					ret = mshobj->ext_patch_r819x_wx_set_meshID(dev, (u8*)wrqu->data.pointer);
+				break;
+			}
+			case RTL_OID_802_11_MESH_AUTO_LINK:
+			{
+				printk("RTL_OID_802_11_MESH_AUTO_LINK \n");
+				if(mshobj->ext_patch_r819x_wx_set_auto_link)
+					ret = mshobj->ext_patch_r819x_wx_set_auto_link(dev, info, wrqu, extra);
+				break;
+			}
+			case RTL_OID_802_11_MESH_ADD_LINK:
+			{
+				printk("RTL_OID_802_11_MESH_ADD_LINK \n");
+				if(mshobj->ext_patch_r819x_wx_set_add_link)
+					ret = mshobj->ext_patch_r819x_wx_set_add_link(dev, info, wrqu, extra);
+				break;
+			}
+			case RTL_OID_802_11_MESH_DEL_LINK:
+			{
+				printk("RTL_OID_802_11_MESH_DEL_LINK \n");
+				if(mshobj->ext_patch_r819x_wx_set_del_link)
+					ret = mshobj->ext_patch_r819x_wx_set_del_link(dev, info, wrqu, extra);
+				break;
+			}
+			case RTL_OID_802_11_MESH_MAX_TX_RATE:
+			{
+				printk("RTL_OID_802_11_MESH_MAX_TX_RATE \n");
+				if(mshobj->ext_patch_r819x_wx_set_maxrate)
+					ret = mshobj->ext_patch_r819x_wx_set_maxrate(dev, info, wrqu, extra);
+				break;
+			}
+			case RTL_OID_802_11_MESH_CHANNEL:
+			{
+				printk("RTL_OID_802_11_MESH_CHANNEL \n");
+				printk("channel = %d\n",*(u8*)wrqu->data.pointer);
+				r8192_wx_set_channel(dev, info, wrqu, wrqu->data.pointer);
+				break;
+			}
+			case RTL_OID_802_11_MESH_HOSTNAME:
+			{
+				printk("RTL_OID_802_11_MESH_HOSTNAME \n");
+				if(mshobj->ext_patch_r819x_wx_set_host_name)
+					ret = mshobj->ext_patch_r819x_wx_set_host_name(dev, info, wrqu, extra);
+				break;
+			}
+			case RTL_OID_802_11_MESH_ONLY_MODE:
+			{
+				printk("RTL_OID_802_11_MESH_ONLY_MODE \n");
+				if(mshobj->ext_patch_r819x_wx_set_mesh_only_mode)
+					ret = mshobj->ext_patch_r819x_wx_set_mesh_only_mode(dev, info, wrqu, extra);
+				break;
+			}
+			default:
+				printk("Default \n");
+				break;
+		}
+	}
+	return ret;
+}
+
+static int meshdev_wx_get_meshinfo(struct net_device *meshdev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct net_device *dev = mpriv->rtllib->dev;
+	
+printk("++++++======%s: dev=%p length=%d extra=%p\n", __FUNCTION__, dev, wrqu->data.length,extra);
+	return r8192_wx_get_meshinfo(dev, info, wrqu, extra);
+}
+
+static int meshdev_wx_enable_mesh(struct net_device *meshdev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+	
+printk("++++++======%s\n", __FUNCTION__);
+	return r8192_wx_enable_mesh(dev, info, wrqu, extra);
+	
+}
+
+static int meshdev_wx_disable_mesh(struct net_device *meshdev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+	
+printk("++++++======%s\n", __FUNCTION__);
+	return r8192_wx_disable_mesh(dev, info, wrqu, extra);
+}
+
+
+int meshdev_wx_set_channel(struct net_device *meshdev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+printk("++++++======%s\n", __FUNCTION__);
+
+	return r8192_wx_set_channel(dev, info, wrqu, extra);
+}
+
+static int meshdev_wx_set_meshid(struct net_device *meshdev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{	
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+printk("++++++======%s\n", __FUNCTION__);
+
+	return r8192_wx_set_meshID(dev, info, wrqu, extra);	
+}
+
+static int meshdev_wx_mesh_scan(struct net_device *meshdev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+
+printk("++++++======%s\n", __FUNCTION__);
+	return r8192_wx_mesh_scan(dev, info, wrqu, extra);
+}
+static int meshdev_wx_get_mesh_list(struct net_device *meshdev, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+printk("++++++======%s\n", __FUNCTION__);
+
+	return r8192_wx_get_mesh_list(dev, info, wrqu, extra);
+}
+static int meshdev_wx_set_meshmode(struct net_device *meshdev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+
+printk("++++++======%s\n", __FUNCTION__);
+	return r8192_wx_set_meshmode(dev, info, wrqu, extra);
+}
+static int meshdev_wx_set_meshbw(struct net_device *meshdev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+
+printk("++++++======%s\n", __FUNCTION__);
+	return r8192_wx_set_meshBW(dev, info, wrqu, extra);
+}
+static int meshdev_wx_update_beacon(struct net_device *meshdev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+	struct r8192_priv *priv = rtllib_priv(dev);
+	struct mshclass *mshobj= (priv)->mshobj;
+	u8 updateBW = 0;
+	u8 bserverHT = 0;	
+	
+	printk("++++++======%s\n", __FUNCTION__);
+	if(*extra == 0)
+	{
+		ieee->p2pmode = 1;
+		ieee->current_network.channel = ieee->current_mesh_network.channel; 
+		if(ieee->state!=RTLLIB_LINKED){
+			if(ieee->pHTInfo->bCurBW40MHz)
+				HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20_40, (ieee->current_mesh_network.channel<=6)?HT_EXTCHNL_OFFSET_UPPER:HT_EXTCHNL_OFFSET_LOWER);  
+			else
+				HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20, (ieee->current_mesh_network.channel<=6)?HT_EXTCHNL_OFFSET_UPPER:HT_EXTCHNL_OFFSET_LOWER);  
+		}
+	}
+	else
+	{
+		ieee->p2pmode = 0;
+		updateBW=mshobj->ext_patch_r819x_wx_update_beacon(dev,&bserverHT);
+		printk("$$$$$$ Cur_networ.chan=%d, cur_mesh_net.chan=%d,bserverHT=%d\n", ieee->current_network.channel,ieee->current_mesh_network.channel,bserverHT);
+		if(updateBW == 1)
+		{
+			if(bserverHT == 0)
+			{
+				printk("===>server is not HT supported,set 20M\n");
+				HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20, HT_EXTCHNL_OFFSET_NO_EXT);  
+			}
+			else
+			{
+				printk("===>updateBW is 1,bCurBW40MHz is %d,ieee->serverExtChlOffset is %d\n",ieee->pHTInfo->bCurBW40MHz,ieee->serverExtChlOffset);		
+				if(ieee->pHTInfo->bCurBW40MHz)
+					HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20_40, ieee->serverExtChlOffset);  
+				else
+					HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20, ieee->serverExtChlOffset);  
+			}
+		}
+		else
+		{
+			printk("===>there is no same hostname server, ERR!!!\n");
+			return -1;
+		}
+	}
+	write_nic_dword(dev,BSSIDR,((u32*)priv->rtllib->current_mesh_network.bssid)[0]);
+	write_nic_word(dev,BSSIDR+4,((u16*)priv->rtllib->current_mesh_network.bssid)[2]);
+	return 0;
+}
+static int meshdev_wx_add_mac_deny(struct net_device *meshdev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	
+	if( ! priv->mshobj || !priv->mshobj->ext_patch_r819x_wx_set_add_mac_deny )
+		return 0;
+
+	return priv->mshobj->ext_patch_r819x_wx_set_add_mac_deny(dev, info, wrqu, extra);
+}
+
+static int meshdev_wx_del_mac_deny(struct net_device *meshdev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	if( ! priv->mshobj || !priv->mshobj->ext_patch_r819x_wx_set_del_mac_deny )
+		return 0;
+
+	return priv->mshobj->ext_patch_r819x_wx_set_del_mac_deny(dev, info, wrqu, extra);
+}
+
+static int meshdev_wx_get_neighbor_list(struct net_device *meshdev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+	struct r8192_priv *priv = rtllib_priv(dev);
+	int ret = 0;
+
+	if( ! priv->mshobj || !priv->mshobj->ext_patch_r819x_wx_get_neighbor_list )
+		return 0;
+	ret = priv->mshobj->ext_patch_r819x_wx_get_neighbor_list(dev, info, wrqu, extra);
+#ifdef MESH_AUTO_TEST
+	ret |= r8192_wx_set_channel(dev, info, wrqu, &ieee->current_network.channel);
+#endif
+	return ret;
+}
+
+/* reserved for future
+static int r819x_wx_get_mac_allow(struct net_device *dev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{
+		return 0;
+
+	return priv->mshobj->ext_patch_r819x_wx_get_mac_allow(dev, info, wrqu, extra);
+}
+*/
+
+static int meshdev_wx_get_mac_deny(struct net_device *meshdev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	if( ! priv->mshobj || !priv->mshobj->ext_patch_r819x_wx_get_mac_deny )
+		return 0;
+
+	return priv->mshobj->ext_patch_r819x_wx_get_mac_deny(dev, info, wrqu, extra);
+}
+
+
+static int meshdev_wx_set_hostname(struct net_device *meshdev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+
+	if(wrqu->data.length > MAX_HOST_NAME_LENGTH)
+	{
+		printk("%s: Host name is too long. len=%d\n", __FUNCTION__, wrqu->data.length);
+		return -1;
+	}
+
+	ieee->hostname_len = wrqu->data.length;
+	memcpy(ieee->hostname, extra, wrqu->data.length);
+	
+printk("++++++======%s: %s\n", __FUNCTION__, ieee->hostname);
+
+	return 0;
+}
+static int meshdev_wx_set_mesh_security(struct net_device *meshdev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *mpriv = netdev_priv(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+
+	printk("++++++======%s\n", __FUNCTION__);
+	return r8192_wx_set_mesh_security(dev, info, wrqu, extra);
+}
+static int meshdev_wx_set_mkdd_id(struct net_device *meshdev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *mpriv = netdev_priv(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+	
+
+	printk("++++++======%s\n", __FUNCTION__);
+	return r8192_wx_set_mkdd_id(dev, info, wrqu, extra);
+}
+static int meshdev_wx_set_mesh_key(struct net_device *meshdev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *mpriv = netdev_priv(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+
+	printk("++++++======%s\n", __FUNCTION__);
+	return r8192_wx_set_mesh_key(dev, info, wrqu, extra);
+}
+static int meshdev_wx_set_sec_type(struct net_device *meshdev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{
+	struct meshdev_priv *mpriv = netdev_priv(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+
+	printk("++++++======%s\n", __FUNCTION__);
+	return r8192_wx_set_mesh_sec_type(dev, info, wrqu, extra);
+}
+static u8 my_atoi(const char *arg)
+{
+	u8 val = 0;
+	for(; ; arg++){
+		switch (*arg){
+			case '0'...'9':
+				val = 10*val + (*arg-'0');
+				break;
+			default:
+				return val;
+		}
+	}
+	return val;
+}
+
+static int Set_Channel_Proc(struct net_device *meshdev, char *arg)
+{
+	int ch = my_atoi(arg);
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct r8192_priv *priv = (void *)ieee->priv;
+	struct net_device *dev = ieee->dev;
+
+	if (!priv->mshobj || !priv->mshobj->ext_patch_r819x_wx_set_channel || !ieee->only_mesh)
+		return 0;	
+			
+printk("!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!set current mesh network channel %d\n", ch);
+	if ( ch < 0 ) 	
+	{
+		rtllib_start_scan(ieee);			
+		ieee->meshScanMode =2;
+	}
+	else	
+	{	
+		ieee->meshScanMode =0;		
+		if(priv->mshobj->ext_patch_r819x_wx_set_channel)
+		{
+			priv->mshobj->ext_patch_r819x_wx_set_channel(ieee, ch);
+			priv->mshobj->ext_patch_r819x_wx_set_mesh_chan(dev,ch);
+		}
+		queue_work_rsl(ieee->wq, &ieee->ext_stop_scan_wq);
+		ieee->set_chan(ieee->dev, ch);
+		ieee->current_mesh_network.channel = ch;
+		if(ieee->only_mesh)
+			ieee->current_network.channel = ch;
+		ieee->current_network.channel = ieee->current_mesh_network.channel; 
+		if(ieee->pHTInfo->bCurBW40MHz)
+			HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20_40, (ieee->current_mesh_network.channel<=6)?HT_EXTCHNL_OFFSET_UPPER:HT_EXTCHNL_OFFSET_LOWER);  
+		else
+			HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20, (ieee->current_mesh_network.channel<=6)?HT_EXTCHNL_OFFSET_UPPER:HT_EXTCHNL_OFFSET_LOWER);  
+		if(rtllib_act_scanning(ieee,true) == true)
+			rtllib_stop_scan_syncro(ieee);
+	}
+	return 0;		
+}
+static int Set_MeshID_Proc(struct net_device *meshdev, char *arg)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+	struct r8192_priv *priv = rtllib_priv(dev);
+	RT_RF_POWER_STATE       rtState;
+	int ret = 0;
+        rtState = priv->rtllib->eRFPowerState;
+	
+	if(!priv->mshobj || !priv->mshobj->ext_patch_r819x_wx_enable_mesh || !priv->mshobj->ext_patch_r819x_wx_set_meshID)
+		return 0;
+
+	if(rtllib_act_scanning(ieee,true) == true)
+		rtllib_stop_scan_syncro(ieee);
+	
+	/* Set Mesh ID */
+	ret = priv->mshobj->ext_patch_r819x_wx_set_meshID(dev, arg);
+	if(ret)
+		goto End;
+	
+	/* Enable Mesh */
+	SEM_DOWN_PRIV_WX(&priv->wx_sem);	
+	ret = priv->mshobj->ext_patch_r819x_wx_enable_mesh(dev);
+	if(!ret)
+	{
+#ifdef ENABLE_IPS
+		if(priv->rtllib->PowerSaveControl.bInactivePs){
+			if(rtState == eRfOff){
+				if(priv->rtllib->RfOffReason > RF_CHANGE_BY_IPS)
+				{
+					RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__FUNCTION__);
+					SEM_UP_PRIV_WX(&priv->wx_sem);	
+					return -1;
+				}
+				else{
+					printk("=========>%s(): IPSLeave\n",__FUNCTION__);
+					IPSLeave(dev);
+				}
+			}
+		}
+#endif
+	}
+	SEM_UP_PRIV_WX(&priv->wx_sem);	
+#if 1
+	if (ieee->mesh_sec_type == 1) {	
+		rtl8192_abbr_handshk_set_GTK(ieee,1);
+	}
+#else
+	if (ieee->mesh_sec_type == 1) 	
+		rtl8192_abbr_handshk_set_key(ieee); 
+#endif
+End:
+	return ret;	
+}
+static int Set_Bw40MHz_Proc(struct net_device *meshdev, char *arg)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct r8192_priv *priv = (void *)ieee->priv;
+	u8 bBw40MHz = my_atoi(arg);
+
+	SEM_DOWN_PRIV_WX(&priv->wx_sem);	
+	printk("%s(): set mesh BW ! extra is %d\n",__FUNCTION__, bBw40MHz);
+	priv->rtllib->pHTInfo->bRegBW40MHz = bBw40MHz;
+	SEM_UP_PRIV_WX(&priv->wx_sem);	
+
+	return 0;
+}
+static int Set_WirelessMode_Proc(struct net_device *meshdev, char *arg)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct r8192_priv *priv = (void *)ieee->priv;
+	struct net_device *dev = ieee->dev;
+	u8 wirelessmode = my_atoi(arg);
+
+	SEM_DOWN_PRIV_WX(&priv->wx_sem);	
+
+	printk("%s(): set mesh mode ! extra is %d\n",__FUNCTION__, wirelessmode);
+	if((wirelessmode != WIRELESS_MODE_A) && (wirelessmode != WIRELESS_MODE_B) && 
+		(wirelessmode != WIRELESS_MODE_G) && (wirelessmode != WIRELESS_MODE_AUTO) &&
+		(wirelessmode != WIRELESS_MODE_N_24G) && (wirelessmode != WIRELESS_MODE_N_5G))
+	{
+		printk("ERR!! you should input 1 | 2 | 4 | 8 | 16 | 32\n");
+		SEM_UP_PRIV_WX(&priv->wx_sem);	
+		return -1;
+	}
+	if(priv->rtllib->state == RTLLIB_LINKED)
+	{
+		if((priv->rtllib->mode != WIRELESS_MODE_N_5G) && (priv->rtllib->mode != WIRELESS_MODE_N_24G)){
+			printk("===>wlan0 is linked,and ieee->mode is not N mode ,do not need to set mode,return\n");
+			SEM_UP_PRIV_WX(&priv->wx_sem);	
+			return 0;
+		}
+	}
+	priv->rtllib->mode = wirelessmode;
+	if(priv->ResetProgress == RESET_TYPE_NORESET)
+		rtl8192_SetWirelessMode(dev, priv->rtllib->mode);
+	HTUseDefaultSetting(priv->rtllib);
+	SEM_UP_PRIV_WX(&priv->wx_sem);	
+	return 0;
+}
+static int Set_ExtChnOffset_Proc(struct net_device *meshdev, char *arg)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+#if 0
+	struct r8192_priv *priv = (void *)ieee->priv;
+	struct net_device *dev = ieee->dev;
+	struct mshclass *mshobj= priv->mshobj;
+	u8 updateBW = 0;
+	u8 bserverHT = 0;	
+#endif
+	ieee->p2pmode = 0;	
+#if 0
+	updateBW=mshobj->ext_patch_r819x_wx_update_beacon(dev,&bserverHT);
+	printk("$$$$$$ Cur_networ.chan=%d, cur_mesh_net.chan=%d,bserverHT=%d\n", ieee->current_network.channel,ieee->current_mesh_network.channel,bserverHT);
+	if(updateBW == 1)
+	{
+		if(bserverHT == 0)
+		{
+			printk("===>server is not HT supported,set 20M\n");
+			HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20, HT_EXTCHNL_OFFSET_NO_EXT);  
+		}
+		else
+		{
+			printk("===>updateBW is 1,bCurBW40MHz is %d,ieee->serverExtChlOffset is %d\n",ieee->pHTInfo->bCurBW40MHz,ieee->serverExtChlOffset);		
+			if(ieee->pHTInfo->bCurBW40MHz)
+				HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20_40, ieee->serverExtChlOffset);  
+			else
+				HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20, ieee->serverExtChlOffset);  
+		}
+	}
+	else
+	{
+		printk("===>there is no same hostname server, ERR!!!\n");
+		return -1;
+	}
+#endif
+	return 0;
+}
+static int Set_OnlyMesh_Proc(struct net_device *meshdev, char *arg)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	union iwreq_data tmprqu;
+	int ret = 0;
+
+	ieee->p2pmode = 1;	
+	ieee->only_mesh = my_atoi(arg);
+printk("!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!mesh only = %d, p2pmode = %d\n", ieee->only_mesh, ieee->p2pmode);
+	if(ieee->only_mesh)
+		ieee->current_network.channel = ieee->current_mesh_network.channel;
+	if(ieee->only_mesh == 0)
+	{
+		tmprqu.mode = ieee->iw_mode;
+		ieee->iw_mode = IW_MODE_INFRA; 
+		ret = rtllib_wx_set_mode(ieee, NULL, &tmprqu, NULL);
+	}
+	return ret;
+}
+static int Set_AsPortal_Proc(struct net_device *meshdev, char *arg)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+	struct r8192_priv *priv = (void *)ieee->priv;
+	u8 val = my_atoi(arg);
+	int ret = 0;
+
+	SEM_DOWN_PRIV_WX(&priv->wx_sem);	
+	ret = priv->mshobj->ext_patch_r819x_wx_set_AsPortal(dev, val);
+	SEM_UP_PRIV_WX(&priv->wx_sem);	
+
+	return ret;
+}
+static int Set_AsRoot_Proc(struct net_device *meshdev, char *arg)
+{
+	struct meshdev_priv *mpriv = (struct meshdev_priv *)netdev_priv_rsl(meshdev);
+	struct rtllib_device *ieee = mpriv->rtllib;
+	struct net_device *dev = ieee->dev;
+	struct r8192_priv *priv = (void *)ieee->priv;
+	u8 val = my_atoi(arg);
+	int ret = 0;
+
+	SEM_DOWN_PRIV_WX(&priv->wx_sem);	
+	ret = priv->mshobj->ext_patch_r819x_wx_set_AsRoot(dev, val);
+	SEM_UP_PRIV_WX(&priv->wx_sem);	
+
+	return ret;
+}
+
+static struct {
+	char* name;
+	int (*set_proc)(struct net_device *dev, char *arg);
+} *private_set_proc, private_support_proc[] = {
+	{"Debug",				NULL},
+	{"Channel",				Set_Channel_Proc},            
+	{"MeshId",				Set_MeshID_Proc},
+	{"Bw40MHz",				Set_Bw40MHz_Proc},
+	{"WirelessMode",			Set_WirelessMode_Proc},
+	{"ExtChnOffset",			Set_ExtChnOffset_Proc},
+	{"OnlyMesh",				Set_OnlyMesh_Proc},
+	{"AsPortal",				Set_AsPortal_Proc},
+	{"AsRoot",				Set_AsRoot_Proc},
+	{"MeshAuthMode",			NULL},       
+	{"MeshEncrypType",			NULL},  
+	{"<NULL>",				NULL},
+};
+
+static char *rtlstrchr(const char *s, int c)
+{
+	for(; *s!=(char)c; ++s)
+		if(*s == '\0')
+			return NULL;
+	return (char *)s;
+}
+
+static int meshdev_wx_set_param(struct net_device *dev, struct iw_request_info *info,
+			       union iwreq_data *w, char *extra)
+{
+	char * this_char = extra;
+	char *value = NULL;
+	int  Status=0;
+
+	printk("=======>%s: extra=%s\n", __FUNCTION__,extra);
+	if (!*this_char)
+		return -EINVAL; 
+	
+	if ((value = rtlstrchr(this_char, '=')) != NULL)
+		*value++ = 0;
+
+	for (private_set_proc = private_support_proc; strcmp(private_set_proc->name, "<NULL>"); private_set_proc++)            
+	{
+		if (strcmp(this_char, private_set_proc->name) == 0)
+		{
+			if(private_set_proc->set_proc)
+			{
+				if(private_set_proc->set_proc(dev, value))
+				{	
+					Status = -EINVAL;
+				}
+			}
+			break;	
+		}
+	}
+	
+	if(strcmp(private_set_proc->name, "<NULL>") == 0)
+	{  
+		Status = -EINVAL;
+		printk("===>%s: (iwpriv) Not Support Set Command [%s]", __FUNCTION__, this_char);
+		if(value != NULL)
+			printk(" value=%s\n", value);
+		else
+			printk("\n");
+	}
+	
+	return Status;
+}
+
+
+static iw_handler meshdev_private_handler[] = {
+	meshdev_wx_enable_mesh,		
+	meshdev_wx_get_meshinfo, 		
+	meshdev_wx_disable_mesh,		
+	meshdev_wx_set_channel, 		
+	meshdev_wx_set_meshid,			
+	meshdev_wx_get_mesh_list, 		
+	meshdev_wx_mesh_scan, 			
+	meshdev_wx_set_meshmode,		
+	meshdev_wx_set_hostname,		
+	meshdev_wx_set_meshbw,			
+	meshdev_wx_update_beacon,		
+	meshdev_wx_get_mac_deny,		
+	meshdev_wx_add_mac_deny,		
+	NULL,			  		
+	NULL,
+	meshdev_wx_get_neighbor_list,		
+	meshdev_wx_set_param,			
+	NULL,			  		
+	meshdev_wx_del_mac_deny,		
+	NULL,							
+	meshdev_wx_set_mesh_security,		
+	meshdev_wx_set_mkdd_id,			
+	meshdev_wx_set_mesh_key,			
+	meshdev_wx_set_sec_type,		
+};
+
+struct iw_handler_def  meshdev_wx_handlers_def={
+	.standard = meshdev_wx_handlers,
+	.num_standard = sizeof(meshdev_wx_handlers) / sizeof(iw_handler),
+	.private = meshdev_private_handler,
+	.num_private = sizeof(meshdev_private_handler) / sizeof(iw_handler),
+ 	.num_private_args = sizeof(meshdev_private_args) / sizeof(struct iw_priv_args),
+#if WIRELESS_EXT >= 17	
+	.get_wireless_stats = (void*)meshdev_stats,
+#endif
+	.private_args = (struct iw_priv_args *)meshdev_private_args,	
+};
+#endif
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl_ps.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl_ps.h
@@ -0,0 +1,62 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * Based on the r8180 driver, which is:
+ * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ ******************************************************************************/
+#ifndef _RTL_PS_H
+#define _RTL_PS_H
+
+#include <linux/types.h>
+struct net_device;
+
+#define RT_CHECK_FOR_HANG_PERIOD 2
+#define INIT_DEFAULT_CHAN 	 1
+
+#if defined CONFIG_ASPM_OR_D3
+#define RT_DISABLE_ASPM(dev)            PlatformDisableASPM(dev)
+#define RT_ENABLE_ASPM(dev)             PlatformEnableASPM(dev)
+#define RT_ENTER_D3(dev, _bTempSetting) PlatformSetPMCSR(dev, 0x03, _bTempSetting)
+#define RT_LEAVE_D3(dev, _bTempSetting) PlatformSetPMCSR(dev, 0, _bTempSetting)
+bool PlatformEnable92CEBackDoor(struct net_device *dev);
+void PlatformDisableASPM(struct net_device *dev);
+void PlatformEnableASPM(struct net_device *dev);
+u32 PlatformResetPciSpace(struct net_device *dev,u8 Value);
+#endif
+
+#if defined(RTL8192E) || defined(RTL8192SE) || defined RTL8192CE
+void rtl8192_hw_wakeup(struct net_device *dev);
+void rtl8192_hw_to_sleep(struct net_device *dev, u32 th, u32 tl);
+void rtllib_ips_leave_wq(struct net_device *dev);
+void rtllib_ips_leave(struct net_device *dev);
+void IPSLeave_wq (void *data);
+#endif
+
+#ifdef ENABLE_IPS
+void IPSEnter(struct net_device *dev);
+void IPSLeave(struct net_device *dev);
+#endif
+
+#ifdef ENABLE_LPS
+void LeisurePSEnter(struct net_device *dev);
+void LeisurePSLeave(struct net_device *dev);
+#endif
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl_regd.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl_regd.h
@@ -0,0 +1,53 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * Based on the ath driver, which is:
+ * Copyright (c) 2008-2009 Atheros Communications Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+ ******************************************************************************/
+#ifndef RTL_REGD_H
+#define RTL_REGD_H
+
+#ifdef CONFIG_CFG_80211 
+
+#include <linux/nl80211.h>
+#include <net/cfg80211.h>
+#include "rtl_core.h"
+
+struct r8192_priv;
+
+struct country_code_to_enum_rd {
+	u16 countryCode;
+	const char *isoName;
+};
+
+
+int rtl_regd_init(struct net_device *dev,
+		  int (*reg_notifier)(struct wiphy *wiphy,
+		  struct regulatory_request *request));
+int rtl_reg_notifier(struct wiphy *wiphy,
+		     struct regulatory_request *request);
+void rtl_dump_channel_map(struct wiphy *wiphy);
+int rtllib_set_geo(struct r8192_priv *priv);
+bool rtl8192_register_wiphy_dev(struct net_device *dev);
+
+#endif
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/rtl_crypto.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/rtl_crypto.h
@@ -0,0 +1,409 @@
+/*
+ * Scatterlist Cryptographic API.
+ *
+ * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
+ * Copyright (c) 2002 David S. Miller (davem@redhat.com)
+ *
+ * Portions derived from Cryptoapi, by Alexander Kjeldaas <astor@fast.no>
+ * and Nettle, by Niels Mé°ˆler.
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option) 
+ * any later version.
+ *
+ */
+#ifndef _LINUX_CRYPTO_H
+#define _LINUX_CRYPTO_H
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/list.h>
+#include <linux/string.h>
+#include <asm/page.h>
+#include <asm/errno.h>
+
+#ifdef BUILT_IN_CRYPTO
+#ifdef CONFIG_CRYPTO_HMAC
+#undef CONFIG_CRYPTO_HMAC
+#endif
+
+#ifdef CONFIG_KMOD
+#undef CONFIG_KMOD
+#endif
+#endif /* BUILT_IN_CRYPTO */
+
+#define crypto_register_alg crypto_register_alg_rsl
+#define crypto_unregister_alg crypto_unregister_alg_rsl
+#define crypto_alloc_tfm crypto_alloc_tfm_rsl
+#define crypto_free_tfm crypto_free_tfm_rsl
+#define crypto_alg_available crypto_alg_available_rsl
+
+/*
+ * Algorithm masks and types.
+ */
+#define CRYPTO_ALG_TYPE_MASK		0x000000ff
+#define CRYPTO_ALG_TYPE_CIPHER		0x00000001
+#define CRYPTO_ALG_TYPE_DIGEST		0x00000002
+#define CRYPTO_ALG_TYPE_COMPRESS	0x00000004
+
+/*
+ * Transform masks and values (for crt_flags).
+ */
+#define CRYPTO_TFM_MODE_MASK		0x000000ff
+#define CRYPTO_TFM_REQ_MASK		0x000fff00
+#define CRYPTO_TFM_RES_MASK		0xfff00000
+
+#define CRYPTO_TFM_MODE_ECB		0x00000001
+#define CRYPTO_TFM_MODE_CBC		0x00000002
+#define CRYPTO_TFM_MODE_CFB		0x00000004
+#define CRYPTO_TFM_MODE_CTR		0x00000008
+
+#define CRYPTO_TFM_REQ_WEAK_KEY		0x00000100
+#define CRYPTO_TFM_RES_WEAK_KEY		0x00100000
+#define CRYPTO_TFM_RES_BAD_KEY_LEN   	0x00200000
+#define CRYPTO_TFM_RES_BAD_KEY_SCHED 	0x00400000
+#define CRYPTO_TFM_RES_BAD_BLOCK_LEN 	0x00800000
+#define CRYPTO_TFM_RES_BAD_FLAGS 	0x01000000
+
+/*
+ * Miscellaneous stuff.
+ */
+#define CRYPTO_UNSPEC			0
+#define CRYPTO_MAX_ALG_NAME		64
+
+struct scatterlist;
+
+/*
+ * Algorithms: modular crypto algorithm implementations, managed
+ * via crypto_register_alg() and crypto_unregister_alg().
+ */
+struct cipher_alg {
+	unsigned int cia_min_keysize;
+	unsigned int cia_max_keysize;
+	int (*cia_setkey)(void *ctx, const u8 *key,
+	                  unsigned int keylen, u32 *flags);
+	void (*cia_encrypt)(void *ctx, u8 *dst, const u8 *src);
+	void (*cia_decrypt)(void *ctx, u8 *dst, const u8 *src);
+};
+
+struct digest_alg {
+	unsigned int dia_digestsize;
+	void (*dia_init)(void *ctx);
+	void (*dia_update)(void *ctx, const u8 *data, unsigned int len);
+	void (*dia_final)(void *ctx, u8 *out);
+	int (*dia_setkey)(void *ctx, const u8 *key,
+	                  unsigned int keylen, u32 *flags);
+};
+
+struct compress_alg {
+	int (*coa_init)(void *ctx);
+	void (*coa_exit)(void *ctx);
+	int (*coa_compress)(void *ctx, const u8 *src, unsigned int slen,
+	                    u8 *dst, unsigned int *dlen);
+	int (*coa_decompress)(void *ctx, const u8 *src, unsigned int slen,
+	                      u8 *dst, unsigned int *dlen);
+};
+
+#define cra_cipher	cra_u.cipher
+#define cra_digest	cra_u.digest
+#define cra_compress	cra_u.compress
+
+struct crypto_alg {
+	struct list_head cra_list;
+	u32 cra_flags;
+	unsigned int cra_blocksize;
+	unsigned int cra_ctxsize;
+	const char cra_name[CRYPTO_MAX_ALG_NAME];
+
+	union {
+		struct cipher_alg cipher;
+		struct digest_alg digest;
+		struct compress_alg compress;
+	} cra_u;
+	
+	struct module *cra_module;
+};
+
+/*
+ * Algorithm registration interface.
+ */
+int crypto_register_alg(struct crypto_alg *alg);
+int crypto_unregister_alg(struct crypto_alg *alg);
+
+/*
+ * Algorithm query interface.
+ */
+int crypto_alg_available(const char *name, u32 flags);
+
+/*
+ * Transforms: user-instantiated objects which encapsulate algorithms
+ * and core processing logic.  Managed via crypto_alloc_tfm() and
+ * crypto_free_tfm(), as well as the various helpers below.
+ */
+struct crypto_tfm;
+
+struct cipher_tfm {
+	void *cit_iv;
+	unsigned int cit_ivsize;
+	u32 cit_mode;
+	int (*cit_setkey)(struct crypto_tfm *tfm,
+	                  const u8 *key, unsigned int keylen);
+	int (*cit_encrypt)(struct crypto_tfm *tfm,
+			   struct scatterlist *dst,
+			   struct scatterlist *src,
+			   unsigned int nbytes);
+	int (*cit_encrypt_iv)(struct crypto_tfm *tfm,
+	                      struct scatterlist *dst,
+	                      struct scatterlist *src,
+	                      unsigned int nbytes, u8 *iv);
+	int (*cit_decrypt)(struct crypto_tfm *tfm,
+			   struct scatterlist *dst,
+			   struct scatterlist *src,
+			   unsigned int nbytes);
+	int (*cit_decrypt_iv)(struct crypto_tfm *tfm,
+			   struct scatterlist *dst,
+			   struct scatterlist *src,
+			   unsigned int nbytes, u8 *iv);
+	void (*cit_xor_block)(u8 *dst, const u8 *src);
+};
+
+struct digest_tfm {
+	void (*dit_init)(struct crypto_tfm *tfm);
+	void (*dit_update)(struct crypto_tfm *tfm,
+	                   struct scatterlist *sg, unsigned int nsg);
+	void (*dit_final)(struct crypto_tfm *tfm, u8 *out);
+	void (*dit_digest)(struct crypto_tfm *tfm, struct scatterlist *sg,
+	                   unsigned int nsg, u8 *out);
+	int (*dit_setkey)(struct crypto_tfm *tfm,
+	                  const u8 *key, unsigned int keylen);
+#ifdef CONFIG_CRYPTO_HMAC
+	void *dit_hmac_block;
+#endif
+};
+
+struct compress_tfm {
+	int (*cot_compress)(struct crypto_tfm *tfm,
+	                    const u8 *src, unsigned int slen,
+	                    u8 *dst, unsigned int *dlen);
+	int (*cot_decompress)(struct crypto_tfm *tfm,
+	                      const u8 *src, unsigned int slen,
+	                      u8 *dst, unsigned int *dlen);
+};
+
+#define crt_cipher	crt_u.cipher
+#define crt_digest	crt_u.digest
+#define crt_compress	crt_u.compress
+
+struct crypto_tfm {
+
+	u32 crt_flags;
+	
+	union {
+		struct cipher_tfm cipher;
+		struct digest_tfm digest;
+		struct compress_tfm compress;
+	} crt_u;
+	
+	struct crypto_alg *__crt_alg;
+};
+
+/* 
+ * Transform user interface.
+ */
+ 
+/*
+ * crypto_alloc_tfm() will first attempt to locate an already loaded algorithm.
+ * If that fails and the kernel supports dynamically loadable modules, it
+ * will then attempt to load a module of the same name or alias.  A refcount
+ * is grabbed on the algorithm which is then associated with the new transform.
+ *
+ * crypto_free_tfm() frees up the transform and any associated resources,
+ * then drops the refcount on the associated algorithm.
+ */
+struct crypto_tfm *crypto_alloc_tfm(const char *alg_name, u32 tfm_flags);
+void crypto_free_tfm(struct crypto_tfm *tfm);
+
+/*
+ * Transform helpers which query the underlying algorithm.
+ */
+static inline const char *crypto_tfm_alg_name(struct crypto_tfm *tfm)
+{
+	return tfm->__crt_alg->cra_name;
+}
+
+static inline const char *crypto_tfm_alg_modname(struct crypto_tfm *tfm)
+{
+	struct crypto_alg *alg = tfm->__crt_alg;
+	
+	if (alg->cra_module)
+		return alg->cra_module->name;
+	else
+		return NULL;
+}
+
+static inline u32 crypto_tfm_alg_type(struct crypto_tfm *tfm)
+{
+	return tfm->__crt_alg->cra_flags & CRYPTO_ALG_TYPE_MASK;
+}
+
+static inline unsigned int crypto_tfm_alg_min_keysize(struct crypto_tfm *tfm)
+{
+	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
+	return tfm->__crt_alg->cra_cipher.cia_min_keysize;
+}
+
+static inline unsigned int crypto_tfm_alg_max_keysize(struct crypto_tfm *tfm)
+{
+	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
+	return tfm->__crt_alg->cra_cipher.cia_max_keysize;
+}
+
+static inline unsigned int crypto_tfm_alg_ivsize(struct crypto_tfm *tfm)
+{
+	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
+	return tfm->crt_cipher.cit_ivsize;
+}
+
+static inline unsigned int crypto_tfm_alg_blocksize(struct crypto_tfm *tfm)
+{
+	return tfm->__crt_alg->cra_blocksize;
+}
+
+static inline unsigned int crypto_tfm_alg_digestsize(struct crypto_tfm *tfm)
+{
+	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_DIGEST);
+	return tfm->__crt_alg->cra_digest.dia_digestsize;
+}
+
+/*
+ * API wrappers.
+ */
+static inline void crypto_digest_init(struct crypto_tfm *tfm)
+{
+	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_DIGEST);
+	tfm->crt_digest.dit_init(tfm);
+}
+
+static inline void crypto_digest_update(struct crypto_tfm *tfm,
+                                        struct scatterlist *sg,
+                                        unsigned int nsg)
+{
+	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_DIGEST);
+	tfm->crt_digest.dit_update(tfm, sg, nsg);
+}
+
+static inline void crypto_digest_final(struct crypto_tfm *tfm, u8 *out)
+{
+	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_DIGEST);
+	tfm->crt_digest.dit_final(tfm, out);
+}
+
+static inline void crypto_digest_digest(struct crypto_tfm *tfm,
+                                        struct scatterlist *sg,
+                                        unsigned int nsg, u8 *out)
+{
+	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_DIGEST);
+	tfm->crt_digest.dit_digest(tfm, sg, nsg, out);
+}
+
+static inline int crypto_digest_setkey(struct crypto_tfm *tfm,
+                                       const u8 *key, unsigned int keylen)
+{
+	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_DIGEST);
+	if (tfm->crt_digest.dit_setkey == NULL)
+		return -ENOSYS;
+	return tfm->crt_digest.dit_setkey(tfm, key, keylen);
+}
+
+static inline int crypto_cipher_setkey(struct crypto_tfm *tfm,
+                                       const u8 *key, unsigned int keylen)
+{
+	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
+	return tfm->crt_cipher.cit_setkey(tfm, key, keylen);
+}
+
+static inline int crypto_cipher_encrypt(struct crypto_tfm *tfm,
+                                        struct scatterlist *dst,
+                                        struct scatterlist *src,
+                                        unsigned int nbytes)
+{
+	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
+	return tfm->crt_cipher.cit_encrypt(tfm, dst, src, nbytes);
+}                                        
+
+static inline int crypto_cipher_encrypt_iv(struct crypto_tfm *tfm,
+                                           struct scatterlist *dst,
+                                           struct scatterlist *src,
+                                           unsigned int nbytes, u8 *iv)
+{
+	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
+	BUG_ON(tfm->crt_cipher.cit_mode == CRYPTO_TFM_MODE_ECB);
+	return tfm->crt_cipher.cit_encrypt_iv(tfm, dst, src, nbytes, iv);
+}                                        
+
+static inline int crypto_cipher_decrypt(struct crypto_tfm *tfm,
+                                        struct scatterlist *dst,
+                                        struct scatterlist *src,
+                                        unsigned int nbytes)
+{
+	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
+	return tfm->crt_cipher.cit_decrypt(tfm, dst, src, nbytes);
+}
+
+static inline int crypto_cipher_decrypt_iv(struct crypto_tfm *tfm,
+                                           struct scatterlist *dst,
+                                           struct scatterlist *src,
+                                           unsigned int nbytes, u8 *iv)
+{
+	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
+	BUG_ON(tfm->crt_cipher.cit_mode == CRYPTO_TFM_MODE_ECB);
+	return tfm->crt_cipher.cit_decrypt_iv(tfm, dst, src, nbytes, iv);
+}
+
+static inline void crypto_cipher_set_iv(struct crypto_tfm *tfm,
+                                        const u8 *src, unsigned int len)
+{
+	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
+	memcpy(tfm->crt_cipher.cit_iv, src, len);
+}
+
+static inline void crypto_cipher_get_iv(struct crypto_tfm *tfm,
+                                        u8 *dst, unsigned int len)
+{
+	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
+	memcpy(dst, tfm->crt_cipher.cit_iv, len);
+}
+
+static inline int crypto_comp_compress(struct crypto_tfm *tfm,
+                                       const u8 *src, unsigned int slen,
+                                       u8 *dst, unsigned int *dlen)
+{
+	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_COMPRESS);
+	return tfm->crt_compress.cot_compress(tfm, src, slen, dst, dlen);
+}
+
+static inline int crypto_comp_decompress(struct crypto_tfm *tfm,
+                                         const u8 *src, unsigned int slen,
+                                         u8 *dst, unsigned int *dlen)
+{
+	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_COMPRESS);
+	return tfm->crt_compress.cot_decompress(tfm, src, slen, dst, dlen);
+}
+
+/*
+ * HMAC support.
+ */
+#ifdef CONFIG_CRYPTO_HMAC
+void crypto_hmac_init(struct crypto_tfm *tfm, u8 *key, unsigned int *keylen);
+void crypto_hmac_update(struct crypto_tfm *tfm,
+                        struct scatterlist *sg, unsigned int nsg);
+void crypto_hmac_final(struct crypto_tfm *tfm, u8 *key,
+                       unsigned int *keylen, u8 *out);
+void crypto_hmac(struct crypto_tfm *tfm, u8 *key, unsigned int *keylen,
+                 struct scatterlist *sg, unsigned int nsg, u8 *out);
+#endif	/* CONFIG_CRYPTO_HMAC */
+
+#endif	/* _LINUX_CRYPTO_H */
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/scatterwalk.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/scatterwalk.c
@@ -0,0 +1,138 @@
+/*
+ * Cryptographic API.
+ *
+ * Cipher operations.
+ *
+ * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
+ *               2002 Adam J. Richter <adam@yggdrasil.com>
+ *               2004 Jean-Luc Cooke <jlcooke@certainkey.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ *
+ */
+
+#include <linux/version.h>
+#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
+#include "kmap_types.h"
+#endif
+
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/pagemap.h>
+#include <linux/highmem.h>
+#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
+#include <asm/scatterlist.h>
+#else
+#include <linux/scatterlist.h>
+#endif
+#include "internal.h"
+#include "scatterwalk.h"
+
+enum km_type crypto_km_types[] = {
+	KM_USER0,
+	KM_USER1,
+	KM_SOFTIRQ0,
+	KM_SOFTIRQ1,
+};
+
+void *scatterwalk_whichbuf(struct scatter_walk *walk, unsigned int nbytes, void *scratch)
+{
+	if (nbytes <= walk->len_this_page &&
+	    (((unsigned long)walk->data) & (PAGE_CACHE_SIZE - 1)) + nbytes <=
+	    PAGE_CACHE_SIZE)
+		return walk->data;
+	else
+		return scratch;
+}
+
+static void memcpy_dir(void *buf, void *sgdata, size_t nbytes, int out)
+{
+	if (out)
+		memcpy(sgdata, buf, nbytes);
+	else
+		memcpy(buf, sgdata, nbytes);
+}
+
+void scatterwalk_start(struct scatter_walk *walk, struct scatterlist *sg)
+{
+	unsigned int rest_of_page;
+
+	walk->sg = sg;
+
+#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
+	walk->page = sg->page;
+#else
+	walk->page = sg_page(sg);
+#endif	
+	walk->len_this_segment = sg->length;
+
+	rest_of_page = PAGE_CACHE_SIZE - (sg->offset & (PAGE_CACHE_SIZE - 1));
+	walk->len_this_page = min(sg->length, rest_of_page);
+	walk->offset = sg->offset;
+}
+
+void scatterwalk_map(struct scatter_walk *walk, int out)
+{
+	walk->data = crypto_kmap(walk->page, out) + walk->offset;
+}
+
+static void scatterwalk_pagedone(struct scatter_walk *walk, int out,
+				 unsigned int more)
+{
+	/* walk->data may be pointing the first byte of the next page;
+	   however, we know we transfered at least one byte.  So,
+	   walk->data - 1 will be a virtual address in the mapped page. */
+
+	if (out)
+		flush_dcache_page(walk->page);
+
+	if (more) {
+		walk->len_this_segment -= walk->len_this_page;
+
+		if (walk->len_this_segment) {
+			walk->page++;
+			walk->len_this_page = min(walk->len_this_segment,
+						  (unsigned)PAGE_CACHE_SIZE);
+			walk->offset = 0;
+		}
+		else
+			scatterwalk_start(walk, sg_next(walk->sg));
+	}
+}
+
+void scatterwalk_done(struct scatter_walk *walk, int out, int more)
+{
+	crypto_kunmap(walk->data, out);
+	if (walk->len_this_page == 0 || !more)
+		scatterwalk_pagedone(walk, out, more);
+}
+
+/*
+ * Do not call this unless the total length of all of the fragments
+ * has been verified as multiple of the block size.
+ */
+int scatterwalk_copychunks(void *buf, struct scatter_walk *walk,
+			   size_t nbytes, int out)
+{
+	if (buf != walk->data) {
+		while (nbytes > walk->len_this_page) {
+			memcpy_dir(buf, walk->data, walk->len_this_page, out);
+			buf += walk->len_this_page;
+			nbytes -= walk->len_this_page;
+
+			crypto_kunmap(walk->data, out);
+			scatterwalk_pagedone(walk, out, 1);
+			scatterwalk_map(walk, out);
+		}
+
+		memcpy_dir(buf, walk->data, nbytes, out);
+	}
+
+	walk->offset += nbytes;
+	walk->len_this_page -= nbytes;
+	walk->len_this_segment -= nbytes;
+	return 0;
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/rtllib_crypt_ccmp.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/rtllib_crypt_ccmp.c
@@ -0,0 +1,544 @@
+/*
+ * Host AP crypt: host-based CCMP encryption implementation for Host AP driver
+ *
+ * Copyright (c) 2003-2004, Jouni Malinen <jkmaline@cc.hut.fi>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation. See README and COPYING for
+ * more details.
+ */
+
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/random.h>
+#include <linux/skbuff.h>
+#include <linux/netdevice.h>
+#include <linux/if_ether.h>
+#include <linux/if_arp.h>
+#include <asm/string.h>
+#include <linux/wireless.h>
+#ifdef _RTL8192_EXT_PATCH_	
+#include <linux/etherdevice.h>
+#endif
+#include "rtllib.h"
+
+#if defined(BUILT_IN_CRYPTO) || (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
+#include "rtl_crypto.h"
+#else
+#include <linux/crypto.h>
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) 
+    #include <asm/scatterlist.h>
+#else
+    #include <linux/scatterlist.h>
+#endif
+
+#ifndef BUILT_IN_RTLLIB
+MODULE_AUTHOR("Jouni Malinen");
+MODULE_DESCRIPTION("Host AP crypt: CCMP");
+MODULE_LICENSE("GPL");
+#endif
+
+
+#define AES_BLOCK_LEN 16
+#define CCMP_HDR_LEN 8
+#define CCMP_MIC_LEN 8
+#define CCMP_TK_LEN 16
+#define CCMP_PN_LEN 6
+
+struct rtllib_ccmp_data {
+	u8 key[CCMP_TK_LEN];
+	int key_set;
+
+	u8 tx_pn[CCMP_PN_LEN];
+	u8 rx_pn[CCMP_PN_LEN];
+
+	u32 dot11RSNAStatsCCMPFormatErrors;
+	u32 dot11RSNAStatsCCMPReplays;
+	u32 dot11RSNAStatsCCMPDecryptErrors;
+
+	int key_idx;
+
+	struct crypto_tfm *tfm;
+
+	/* scratch buffers for virt_to_page() (crypto API) */
+	u8 tx_b0[AES_BLOCK_LEN], tx_b[AES_BLOCK_LEN],
+		tx_e[AES_BLOCK_LEN], tx_s0[AES_BLOCK_LEN];
+	u8 rx_b0[AES_BLOCK_LEN], rx_b[AES_BLOCK_LEN], rx_a[AES_BLOCK_LEN];
+};
+
+void rtllib_ccmp_aes_encrypt(struct crypto_tfm *tfm,
+			     const u8 pt[16], u8 ct[16])
+{
+#if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
+	struct scatterlist src, dst;
+
+#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
+	src.page = virt_to_page(pt);
+	src.offset = offset_in_page(pt);
+	src.length = AES_BLOCK_LEN;
+
+	dst.page = virt_to_page(ct);
+	dst.offset = offset_in_page(ct);
+	dst.length = AES_BLOCK_LEN;
+
+#else
+	sg_init_one(&src, pt, AES_BLOCK_LEN);
+	sg_init_one(&dst, ct, AES_BLOCK_LEN);
+#endif
+
+	crypto_cipher_encrypt(tfm, &dst, &src, AES_BLOCK_LEN);
+#else
+	crypto_cipher_encrypt_one((void*)tfm, ct, pt);
+#endif
+}
+
+static void * rtllib_ccmp_init(int key_idx)
+{
+	struct rtllib_ccmp_data *priv;
+
+	priv = kmalloc(sizeof(*priv), GFP_ATOMIC);
+	if (priv == NULL)
+		goto fail;
+	memset(priv, 0, sizeof(*priv));
+	priv->key_idx = key_idx;
+
+#if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
+	priv->tfm = crypto_alloc_tfm("aes", 0);
+	if (priv->tfm == NULL) {
+		printk(KERN_DEBUG "rtllib_crypt_ccmp: could not allocate "
+		       "crypto API aes\n");
+		goto fail;
+	}
+       #else
+       priv->tfm = (void*)crypto_alloc_cipher("aes", 0, CRYPTO_ALG_ASYNC);
+	if (IS_ERR(priv->tfm)) {
+		printk(KERN_DEBUG "rtllib_crypt_ccmp: could not allocate "
+		       "crypto API aes\n");
+		priv->tfm = NULL;
+		goto fail;
+	}
+	#endif
+	return priv;
+
+fail:
+	if (priv) {
+		if (priv->tfm)
+			#if defined(BUILT_IN_CRYPTO) || (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
+			crypto_free_tfm(priv->tfm);
+                    #else
+			crypto_free_cipher((void*)priv->tfm);
+		      #endif
+		kfree(priv);
+	}
+
+	return NULL;
+}
+
+
+static void rtllib_ccmp_deinit(void *priv)
+{
+	struct rtllib_ccmp_data *_priv = priv;
+	if (_priv && _priv->tfm)
+#if defined(BUILT_IN_CRYPTO) || (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
+		crypto_free_tfm(_priv->tfm);
+#else
+		crypto_free_cipher((void*)_priv->tfm);
+#endif
+	kfree(priv);
+}
+
+
+static inline void xor_block(u8 *b, u8 *a, size_t len)
+{
+	int i;
+	for (i = 0; i < len; i++)
+		b[i] ^= a[i];
+}
+
+
+
+static void ccmp_init_blocks(struct crypto_tfm *tfm,
+			     struct rtllib_hdr_4addr *hdr,
+			     u8 *pn, size_t dlen, u8 *b0, u8 *auth,
+			     u8 *s0)
+{
+	u8 *pos, qc = 0;
+	size_t aad_len;
+	u16 fc;
+	int a4_included, qc_included;
+	u8 aad[2 * AES_BLOCK_LEN];
+
+	fc = le16_to_cpu(hdr->frame_ctl);
+	a4_included = ((fc & (RTLLIB_FCTL_TODS | RTLLIB_FCTL_FROMDS)) ==
+		       (RTLLIB_FCTL_TODS | RTLLIB_FCTL_FROMDS));
+	/*
+	qc_included = ((WLAN_FC_GET_TYPE(fc) == RTLLIB_FTYPE_DATA) &&
+		       (WLAN_FC_GET_STYPE(fc) & 0x08));
+        */		       
+	qc_included = ((WLAN_FC_GET_TYPE(fc) == RTLLIB_FTYPE_DATA) &&
+		       (WLAN_FC_GET_STYPE(fc) & 0x80));
+	aad_len = 22;
+	if (a4_included)
+		aad_len += 6;
+	if (qc_included) {
+		pos = (u8 *) &hdr->addr4;
+		if (a4_included)
+			pos += 6;
+		qc = *pos & 0x0f;
+		aad_len += 2;
+	}
+	/* CCM Initial Block:
+	 * Flag (Include authentication header, M=3 (8-octet MIC),
+	 *       L=1 (2-octet Dlen))
+	 * Nonce: 0x00 | A2 | PN
+	 * Dlen */
+	b0[0] = 0x59;
+	b0[1] = qc;
+	memcpy(b0 + 2, hdr->addr2, ETH_ALEN);
+	memcpy(b0 + 8, pn, CCMP_PN_LEN);
+	b0[14] = (dlen >> 8) & 0xff;
+	b0[15] = dlen & 0xff;
+
+	/* AAD:
+	 * FC with bits 4..6 and 11..13 masked to zero; 14 is always one
+	 * A1 | A2 | A3
+	 * SC with bits 4..15 (seq#) masked to zero
+	 * A4 (if present)
+	 * QC (if present)
+	 */
+	pos = (u8 *) hdr;
+	aad[0] = 0; /* aad_len >> 8 */
+	aad[1] = aad_len & 0xff;
+	aad[2] = pos[0] & 0x8f;
+	aad[3] = pos[1] & 0xc7;
+	memcpy(aad + 4, hdr->addr1, 3 * ETH_ALEN);
+	pos = (u8 *) &hdr->seq_ctl;
+	aad[22] = pos[0] & 0x0f;
+	aad[23] = 0; /* all bits masked */
+	memset(aad + 24, 0, 8);
+	if (a4_included)
+		memcpy(aad + 24, hdr->addr4, ETH_ALEN);
+	if (qc_included) {
+		aad[a4_included ? 30 : 24] = qc;
+		/* rest of QC masked */
+	}
+
+	/* Start with the first block and AAD */
+	rtllib_ccmp_aes_encrypt(tfm, b0, auth);
+	xor_block(auth, aad, AES_BLOCK_LEN);
+	rtllib_ccmp_aes_encrypt(tfm, auth, auth);
+	xor_block(auth, &aad[AES_BLOCK_LEN], AES_BLOCK_LEN);
+	rtllib_ccmp_aes_encrypt(tfm, auth, auth);
+	b0[0] &= 0x07;
+	b0[14] = b0[15] = 0;
+	rtllib_ccmp_aes_encrypt(tfm, b0, s0);
+}
+
+
+
+static int rtllib_ccmp_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
+{
+	struct rtllib_ccmp_data *key = priv;
+	int data_len, i;
+	u8 *pos;
+	struct rtllib_hdr_4addr *hdr;
+	cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
+#ifdef _RTL8192_EXT_PATCH_	
+	u8 broadcastaddr[6] = {0xff,0xff,0xff,0xff,0xff,0xff};
+	u8 is_broadcast_data = 0;
+#endif
+	if (skb_headroom(skb) < CCMP_HDR_LEN ||
+	    skb_tailroom(skb) < CCMP_MIC_LEN ||
+	    skb->len < hdr_len)
+		return -1;
+
+	data_len = skb->len - hdr_len;
+	pos = skb_push(skb, CCMP_HDR_LEN);
+	memmove(pos, pos + CCMP_HDR_LEN, hdr_len);
+	pos += hdr_len;
+
+	i = CCMP_PN_LEN - 1;
+	while (i >= 0) {
+		key->tx_pn[i]++;
+		if (key->tx_pn[i] != 0)
+			break;
+		i--;
+	}
+
+	*pos++ = key->tx_pn[5];
+	*pos++ = key->tx_pn[4];
+	*pos++ = 0;
+	*pos++ = (key->key_idx << 6) | (1 << 5) /* Ext IV included */;
+	*pos++ = key->tx_pn[3];
+	*pos++ = key->tx_pn[2];
+	*pos++ = key->tx_pn[1];
+	*pos++ = key->tx_pn[0];
+
+
+	hdr = (struct rtllib_hdr_4addr *) skb->data;
+#ifdef _RTL8192_EXT_PATCH_	
+	if(tcb_desc->badhoc == 0){
+		if(memcmp(hdr->addr1,broadcastaddr,6) == 0){
+			is_broadcast_data = 1;
+			tcb_desc->bHwSec = 0;
+		}
+		if(is_multicast_ether_addr(hdr->addr1)){
+			tcb_desc->bHwSec = 0;
+		}
+	}
+#endif
+	if (!tcb_desc->bHwSec)
+	{
+		int blocks, last, len;
+		u8 *mic;
+		u8 *b0 = key->tx_b0;
+		u8 *b = key->tx_b;
+		u8 *e = key->tx_e;
+		u8 *s0 = key->tx_s0;
+
+		mic = skb_put(skb, CCMP_MIC_LEN);
+		
+		ccmp_init_blocks(key->tfm, hdr, key->tx_pn, data_len, b0, b, s0);
+	
+		blocks = (data_len + AES_BLOCK_LEN - 1) / AES_BLOCK_LEN;
+		last = data_len % AES_BLOCK_LEN;
+	
+		for (i = 1; i <= blocks; i++) {
+			len = (i == blocks && last) ? last : AES_BLOCK_LEN;
+			/* Authentication */
+			xor_block(b, pos, len);
+			rtllib_ccmp_aes_encrypt(key->tfm, b, b);
+			/* Encryption, with counter */
+			b0[14] = (i >> 8) & 0xff;
+			b0[15] = i & 0xff;
+			rtllib_ccmp_aes_encrypt(key->tfm, b0, e);
+			xor_block(pos, e, len);
+			pos += len;
+		}
+	
+		for (i = 0; i < CCMP_MIC_LEN; i++)
+			mic[i] = b[i] ^ s0[i];
+	}
+	return 0;
+}
+
+
+static int rtllib_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
+{
+	struct rtllib_ccmp_data *key = priv;
+	u8 keyidx, *pos;
+	struct rtllib_hdr_4addr *hdr;
+	cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
+	u8 pn[6];
+
+	if (skb->len < hdr_len + CCMP_HDR_LEN + CCMP_MIC_LEN) {
+		key->dot11RSNAStatsCCMPFormatErrors++;
+		return -1;
+	}
+
+	hdr = (struct rtllib_hdr_4addr *) skb->data;
+	pos = skb->data + hdr_len;
+	keyidx = pos[3];
+	if (!(keyidx & (1 << 5))) {
+		if (net_ratelimit()) {
+			printk(KERN_DEBUG "CCMP: received packet without ExtIV"
+			       " flag from " MAC_FMT "\n", MAC_ARG(hdr->addr2));
+		}
+		key->dot11RSNAStatsCCMPFormatErrors++;
+		return -2;
+	}
+	keyidx >>= 6;
+	if (key->key_idx != keyidx) {
+		printk(KERN_DEBUG "CCMP: RX tkey->key_idx=%d frame "
+		       "keyidx=%d priv=%p\n", key->key_idx, keyidx, priv);
+		return -6;
+	}
+	if (!key->key_set) {
+		if (net_ratelimit()) {
+			printk(KERN_DEBUG "CCMP: received packet from " MAC_FMT
+			       " with keyid=%d that does not have a configured"
+			       " key\n", MAC_ARG(hdr->addr2), keyidx);
+		}
+		return -3;
+	}
+
+	pn[0] = pos[7];
+	pn[1] = pos[6];
+	pn[2] = pos[5];
+	pn[3] = pos[4];
+	pn[4] = pos[1];
+	pn[5] = pos[0];
+	pos += 8;
+#ifndef _RTL8192_EXT_PATCH_	
+	if (memcmp(pn, key->rx_pn, CCMP_PN_LEN) <= 0) {
+		if (net_ratelimit()) {
+			;
+		}
+		key->dot11RSNAStatsCCMPReplays++;
+		return -4;
+	}
+#endif
+	if (!tcb_desc->bHwSec)
+	{
+		size_t data_len = skb->len - hdr_len - CCMP_HDR_LEN - CCMP_MIC_LEN;
+		u8 *mic = skb->data + skb->len - CCMP_MIC_LEN;
+		u8 *b0 = key->rx_b0;
+		u8 *b = key->rx_b;
+		u8 *a = key->rx_a;
+		int i, blocks, last, len;
+		
+
+		ccmp_init_blocks(key->tfm, hdr, pn, data_len, b0, a, b);
+		xor_block(mic, b, CCMP_MIC_LEN);
+	
+		blocks = (data_len + AES_BLOCK_LEN - 1) / AES_BLOCK_LEN;
+		last = data_len % AES_BLOCK_LEN;
+	
+		for (i = 1; i <= blocks; i++) {
+			len = (i == blocks && last) ? last : AES_BLOCK_LEN;
+			/* Decrypt, with counter */
+			b0[14] = (i >> 8) & 0xff;
+			b0[15] = i & 0xff;
+			rtllib_ccmp_aes_encrypt(key->tfm, b0, b);
+			xor_block(pos, b, len);
+			/* Authentication */
+			xor_block(a, pos, len);
+			rtllib_ccmp_aes_encrypt(key->tfm, a, a);
+			pos += len;
+		}
+	
+		if (memcmp(mic, a, CCMP_MIC_LEN) != 0) {
+			if (net_ratelimit()) {
+				printk(KERN_DEBUG "CCMP: decrypt failed: STA="
+				MAC_FMT "\n", MAC_ARG(hdr->addr2));
+			}
+			key->dot11RSNAStatsCCMPDecryptErrors++;
+			return -5;
+		}
+	
+		memcpy(key->rx_pn, pn, CCMP_PN_LEN);
+	}
+	/* Remove hdr and MIC */
+	memmove(skb->data + CCMP_HDR_LEN, skb->data, hdr_len);
+	skb_pull(skb, CCMP_HDR_LEN);
+	skb_trim(skb, skb->len - CCMP_MIC_LEN);
+
+	return keyidx;
+}
+
+
+static int rtllib_ccmp_set_key(void *key, int len, u8 *seq, void *priv)
+{
+	struct rtllib_ccmp_data *data = priv;
+	int keyidx;
+	struct crypto_tfm *tfm = data->tfm;
+
+	keyidx = data->key_idx;
+	memset(data, 0, sizeof(*data));
+	data->key_idx = keyidx;
+	data->tfm = tfm;
+	if (len == CCMP_TK_LEN) {
+		memcpy(data->key, key, CCMP_TK_LEN);
+		data->key_set = 1;
+		if (seq) {
+			data->rx_pn[0] = seq[5];
+			data->rx_pn[1] = seq[4];
+			data->rx_pn[2] = seq[3];
+			data->rx_pn[3] = seq[2];
+			data->rx_pn[4] = seq[1];
+			data->rx_pn[5] = seq[0];
+		}
+		crypto_cipher_setkey((void*)data->tfm, data->key, CCMP_TK_LEN);
+	} else if (len == 0)
+		data->key_set = 0;
+	else
+		return -1;
+
+	return 0;
+}
+
+
+static int rtllib_ccmp_get_key(void *key, int len, u8 *seq, void *priv)
+{
+	struct rtllib_ccmp_data *data = priv;
+
+	if (len < CCMP_TK_LEN)
+		return -1;
+
+	if (!data->key_set)
+		return 0;
+	memcpy(key, data->key, CCMP_TK_LEN);
+
+	if (seq) {
+		seq[0] = data->tx_pn[5];
+		seq[1] = data->tx_pn[4];
+		seq[2] = data->tx_pn[3];
+		seq[3] = data->tx_pn[2];
+		seq[4] = data->tx_pn[1];
+		seq[5] = data->tx_pn[0];
+	}
+
+	return CCMP_TK_LEN;
+}
+
+
+static char * rtllib_ccmp_print_stats(char *p, void *priv)
+{
+	struct rtllib_ccmp_data *ccmp = priv;
+	p += sprintf(p, "key[%d] alg=CCMP key_set=%d "
+		     "tx_pn=%02x%02x%02x%02x%02x%02x "
+		     "rx_pn=%02x%02x%02x%02x%02x%02x "
+		     "format_errors=%d replays=%d decrypt_errors=%d\n",
+		     ccmp->key_idx, ccmp->key_set,
+		     MAC_ARG(ccmp->tx_pn), MAC_ARG(ccmp->rx_pn),
+		     ccmp->dot11RSNAStatsCCMPFormatErrors,
+		     ccmp->dot11RSNAStatsCCMPReplays,
+		     ccmp->dot11RSNAStatsCCMPDecryptErrors);
+
+	return p;
+}
+
+void rtllib_ccmp_null(void)
+{
+	return;
+}
+
+static struct rtllib_crypto_ops rtllib_crypt_ccmp = {
+	.name			= "CCMP",
+	.init			= rtllib_ccmp_init,
+	.deinit			= rtllib_ccmp_deinit,
+	.encrypt_mpdu		= rtllib_ccmp_encrypt,
+	.decrypt_mpdu		= rtllib_ccmp_decrypt,
+	.encrypt_msdu		= NULL,
+	.decrypt_msdu		= NULL,
+	.set_key		= rtllib_ccmp_set_key,
+	.get_key		= rtllib_ccmp_get_key,
+	.print_stats		= rtllib_ccmp_print_stats,
+	.extra_prefix_len	= CCMP_HDR_LEN,
+	.extra_postfix_len	= CCMP_MIC_LEN,
+	.owner			= THIS_MODULE,
+};
+
+
+int __init rtllib_crypto_ccmp_init(void)
+{
+	return rtllib_register_crypto_ops(&rtllib_crypt_ccmp);
+}
+
+
+void __exit rtllib_crypto_ccmp_exit(void)
+{
+	rtllib_unregister_crypto_ops(&rtllib_crypt_ccmp);
+}
+
+#ifndef BUILT_IN_RTLLIB
+EXPORT_SYMBOL_RSL(rtllib_ccmp_null);
+
+module_init(rtllib_crypto_ccmp_init);
+module_exit(rtllib_crypto_ccmp_exit);
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/michael_mic.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/michael_mic.c
@@ -0,0 +1,194 @@
+/*
+ * Cryptographic API
+ *
+ * Michael MIC (IEEE 802.11i/TKIP) keyed digest
+ *
+ * Copyright (c) 2004 Jouni Malinen <jkmaline@cc.hut.fi>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/string.h>
+#include "rtl_crypto.h"
+
+
+struct michael_mic_ctx {
+	u8 pending[4];
+	size_t pending_len;
+
+	u32 l, r;
+};
+
+
+static inline u32 rotl(u32 val, int bits)
+{
+	return (val << bits) | (val >> (32 - bits));
+}
+
+
+static inline u32 rotr(u32 val, int bits)
+{
+	return (val >> bits) | (val << (32 - bits));
+}
+
+
+static inline u32 xswap(u32 val)
+{
+	return ((val & 0x00ff00ff) << 8) | ((val & 0xff00ff00) >> 8);
+}
+
+
+#define michael_block(l, r)	\
+do {				\
+	r ^= rotl(l, 17);	\
+	l += r;			\
+	r ^= xswap(l);		\
+	l += r;			\
+	r ^= rotl(l, 3);	\
+	l += r;			\
+	r ^= rotr(l, 2);	\
+	l += r;			\
+} while (0)
+
+
+static inline u32 get_le32(const u8 *p)
+{
+	return p[0] | (p[1] << 8) | (p[2] << 16) | (p[3] << 24);
+}
+
+
+static inline void put_le32(u8 *p, u32 v)
+{
+	p[0] = v;
+	p[1] = v >> 8;
+	p[2] = v >> 16;
+	p[3] = v >> 24;
+}
+
+
+static void michael_init(void *ctx)
+{
+	struct michael_mic_ctx *mctx = ctx;
+	mctx->pending_len = 0;
+}
+
+
+static void michael_update(void *ctx, const u8 *data, unsigned int len)
+{
+	struct michael_mic_ctx *mctx = ctx;
+
+	if (mctx->pending_len) {
+		int flen = 4 - mctx->pending_len;
+		if (flen > len)
+			flen = len;
+		memcpy(&mctx->pending[mctx->pending_len], data, flen);
+		mctx->pending_len += flen;
+		data += flen;
+		len -= flen;
+
+		if (mctx->pending_len < 4)
+			return;
+
+		mctx->l ^= get_le32(mctx->pending);
+		michael_block(mctx->l, mctx->r);
+		mctx->pending_len = 0;
+	}
+
+	while (len >= 4) {
+		mctx->l ^= get_le32(data);
+		michael_block(mctx->l, mctx->r);
+		data += 4;
+		len -= 4;
+	}
+
+	if (len > 0) {
+		mctx->pending_len = len;
+		memcpy(mctx->pending, data, len);
+	}
+}
+
+
+static void michael_final(void *ctx, u8 *out)
+{
+	struct michael_mic_ctx *mctx = ctx;
+	u8 *data = mctx->pending;
+
+	/* Last block and padding (0x5a, 4..7 x 0) */
+	switch (mctx->pending_len) {
+	case 0:
+		mctx->l ^= 0x5a;
+		break;
+	case 1:
+		mctx->l ^= data[0] | 0x5a00;
+		break;
+	case 2:
+		mctx->l ^= data[0] | (data[1] << 8) | 0x5a0000;
+		break;
+	case 3:
+		mctx->l ^= data[0] | (data[1] << 8) | (data[2] << 16) |
+			0x5a000000;
+		break;
+	}
+	michael_block(mctx->l, mctx->r);
+	/* l ^= 0; */
+	michael_block(mctx->l, mctx->r);
+
+	put_le32(out, mctx->l);
+	put_le32(out + 4, mctx->r);
+}
+
+
+static int michael_setkey(void *ctx, const u8 *key, unsigned int keylen,
+			  u32 *flags)
+{
+	struct michael_mic_ctx *mctx = ctx;
+	if (keylen != 8) {
+		if (flags)
+			*flags = CRYPTO_TFM_RES_BAD_KEY_LEN;
+		return -EINVAL;
+	}
+	mctx->l = get_le32(key);
+	mctx->r = get_le32(key + 4);
+	return 0;
+}
+
+
+static struct crypto_alg michael_mic_alg = {
+	.cra_name	= "michael_mic",
+	.cra_flags	= CRYPTO_ALG_TYPE_DIGEST,
+	.cra_blocksize	= 8,
+	.cra_ctxsize	= sizeof(struct michael_mic_ctx),
+	.cra_module	= THIS_MODULE,
+	.cra_list	= LIST_HEAD_INIT(michael_mic_alg.cra_list),
+	.cra_u		= { .digest = {
+	.dia_digestsize	= 8,
+	.dia_init	= michael_init,
+	.dia_update	= michael_update,
+	.dia_final	= michael_final,
+	.dia_setkey	= michael_setkey } }
+};
+
+
+int __init michael_mic_init(void)
+{
+	return crypto_register_alg(&michael_mic_alg);
+}
+
+
+void __exit michael_mic_exit(void)
+{
+	crypto_unregister_alg(&michael_mic_alg);
+}
+
+#ifndef BUILT_IN_CRYPTO
+module_init(michael_mic_init);
+module_exit(michael_mic_exit);
+
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("Michael MIC");
+MODULE_AUTHOR("Jouni Malinen <jkmaline@cc.hut.fi>");
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/compress.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/compress.c
@@ -0,0 +1,63 @@
+/*
+ * Cryptographic API.
+ *
+ * Compression operations.
+ *
+ * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option) 
+ * any later version.
+ *
+ */
+#include <linux/types.h>
+#include "rtl_crypto.h"
+#include <linux/errno.h>
+#include <asm/scatterlist.h>
+#include <linux/string.h>
+#include "internal.h"
+
+static int crypto_compress(struct crypto_tfm *tfm,
+                            const u8 *src, unsigned int slen,
+                            u8 *dst, unsigned int *dlen)
+{
+	return tfm->__crt_alg->cra_compress.coa_compress(crypto_tfm_ctx(tfm),
+	                                                 src, slen, dst,
+	                                                 dlen);
+}
+
+static int crypto_decompress(struct crypto_tfm *tfm,
+                             const u8 *src, unsigned int slen,
+                             u8 *dst, unsigned int *dlen)
+{
+	return tfm->__crt_alg->cra_compress.coa_decompress(crypto_tfm_ctx(tfm),
+	                                                   src, slen, dst,
+	                                                   dlen);
+}
+
+int crypto_init_compress_flags(struct crypto_tfm *tfm, u32 flags)
+{
+	return flags ? -EINVAL : 0;
+}
+
+int crypto_init_compress_ops(struct crypto_tfm *tfm)
+{
+	int ret = 0;
+	struct compress_tfm *ops = &tfm->crt_compress;
+	
+	ret = tfm->__crt_alg->cra_compress.coa_init(crypto_tfm_ctx(tfm));
+	if (ret)
+		goto out;
+
+	ops->cot_compress = crypto_compress;
+	ops->cot_decompress = crypto_decompress;
+	
+out:
+	return ret;
+}
+
+void crypto_exit_compress_ops(struct crypto_tfm *tfm)
+{
+	tfm->__crt_alg->cra_compress.coa_exit(crypto_tfm_ctx(tfm));
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/rtllib_rx.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/rtllib_rx.c
@@ -0,0 +1,5266 @@
+/*
+ * Original code based Host AP (software wireless LAN access point) driver
+ * for Intersil Prism2/2.5/3 - hostap.o module, common routines
+ *
+ * Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
+ * <jkmaline@cc.hut.fi>
+ * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
+ * Copyright (c) 2004, Intel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation. See README and COPYING for
+ * more details.
+ ******************************************************************************
+
+  Few modifications for Realtek's Wi-Fi drivers by 
+  Andrea Merello <andreamrl@tiscali.it>
+  
+  A special thanks goes to Realtek for their support ! 
+
+******************************************************************************/
+ 
+
+#include <linux/compiler.h>
+#include <linux/errno.h>
+#include <linux/if_arp.h>
+#include <linux/in6.h>
+#include <linux/in.h>
+#include <linux/ip.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/netdevice.h>
+#include <linux/pci.h>
+#include <linux/proc_fs.h>
+#include <linux/skbuff.h>
+#include <linux/slab.h>
+#include <linux/tcp.h>
+#include <linux/types.h>
+#include <linux/version.h>
+#include <linux/wireless.h>
+#include <linux/etherdevice.h>
+#include <asm/uaccess.h>
+#include <linux/ctype.h>
+
+#include "rtllib.h"
+#ifdef ENABLE_DOT11D
+#include "dot11d.h"
+#endif
+
+#ifdef RTLLIB_RADIOTAP
+#include <net/ieee80211_radiotap.h>
+#endif
+
+#if defined CONFIG_CFG_80211
+#include <linux/crc32.h>
+
+struct ieee80211_channel *rtllib_get_channel(struct wiphy *wiphy,
+						  int freq)
+{
+	enum ieee80211_band band;
+	struct ieee80211_supported_band *sband;
+	int i;
+
+	for (band = 0; band < IEEE80211_NUM_BANDS; band++) {
+		sband = wiphy->bands[band];
+
+		if (!sband)
+			continue;
+
+		for (i = 0; i < sband->n_channels; i++) {
+			if (sband->channels[i].center_freq == freq)
+				return &sband->channels[i];
+		}
+	}
+
+	return NULL;
+}
+
+int rtllib_channel_to_frequency(int chan)
+{
+	if (chan < 14)
+		return 2407 + chan * 5;
+
+	if (chan == 14)
+		return 2484;
+
+	/* FIXME: 802.11j 17.3.8.3.2 */
+	return (chan + 1000) * 5;
+}
+
+u32 rtllib_parse_elems_crc(u8 *start, size_t len,
+			       struct ieee802_11_elems *elems,
+			       u64 filter, u32 crc)
+{
+	size_t left = len;
+	u8 *pos = start;
+	bool calc_crc = filter != 0;
+
+	memset(elems, 0, sizeof(*elems));
+	elems->ie_start = start;
+	elems->total_len = len;
+
+	while (left >= 2) {
+		u8 id, elen;
+
+		id = *pos++;
+		elen = *pos++;
+		left -= 2;
+
+		if (elen > left)
+			break;
+
+		if (calc_crc && id < 64 && (filter & BIT(id)))
+			crc = crc32_be(crc, pos - 2, elen + 2);
+
+		switch (id) {
+		case WLAN_EID_SSID:
+			elems->ssid = pos;
+			elems->ssid_len = elen;
+			break;
+		case WLAN_EID_SUPP_RATES:
+			elems->supp_rates = pos;
+			elems->supp_rates_len = elen;
+			break;
+		case WLAN_EID_FH_PARAMS:
+			elems->fh_params = pos;
+			elems->fh_params_len = elen;
+			break;
+		case WLAN_EID_DS_PARAMS:
+			elems->ds_params = pos;
+			elems->ds_params_len = elen;
+			break;
+		case WLAN_EID_CF_PARAMS:
+			elems->cf_params = pos;
+			elems->cf_params_len = elen;
+			break;
+		case WLAN_EID_TIM:
+			if (elen >= sizeof(struct ieee80211_tim_ie)) {
+				elems->tim = (void *)pos;
+				elems->tim_len = elen;
+			}
+			break;
+		case WLAN_EID_IBSS_PARAMS:
+			elems->ibss_params = pos;
+			elems->ibss_params_len = elen;
+			break;
+		case WLAN_EID_CHALLENGE:
+			elems->challenge = pos;
+			elems->challenge_len = elen;
+			break;
+		case WLAN_EID_VENDOR_SPECIFIC:
+			if (elen >= 4 && pos[0] == 0x00 && pos[1] == 0x50 &&
+			    pos[2] == 0xf2) {
+				/* Microsoft OUI (00:50:F2) */
+
+				if (calc_crc)
+					crc = crc32_be(crc, pos - 2, elen + 2);
+
+				if (pos[3] == 1) {
+					/* OUI Type 1 - WPA IE */
+					elems->wpa = pos;
+					elems->wpa_len = elen;
+				} else if (elen >= 5 && pos[3] == 2) {
+					/* OUI Type 2 - WMM IE */
+					if (pos[4] == 0) {
+						elems->wmm_info = pos;
+						elems->wmm_info_len = elen;
+					} else if (pos[4] == 1) {
+						elems->wmm_param = pos;
+						elems->wmm_param_len = elen;
+					}
+				}
+			}
+			break;
+		case WLAN_EID_RSN:
+			elems->rsn = pos;
+			elems->rsn_len = elen;
+			break;
+		case WLAN_EID_ERP_INFO:
+			elems->erp_info = pos;
+			elems->erp_info_len = elen;
+			break;
+		case WLAN_EID_EXT_SUPP_RATES:
+			elems->ext_supp_rates = pos;
+			elems->ext_supp_rates_len = elen;
+			break;
+		case WLAN_EID_HT_CAPABILITY:
+			if (elen >= sizeof(struct ieee80211_ht_cap))
+				elems->ht_cap_elem = (void *)pos;
+			break;
+		case WLAN_EID_HT_INFORMATION:
+			if (elen >= sizeof(struct ieee80211_ht_info))
+				elems->ht_info_elem = (void *)pos;
+			break;
+		case WLAN_EID_MESH_ID:
+			elems->mesh_id = pos;
+			elems->mesh_id_len = elen;
+			break;
+		case WLAN_EID_MESH_CONFIG:
+			elems->mesh_config = pos;
+			elems->mesh_config_len = elen;
+			break;
+		case WLAN_EID_PEER_LINK:
+			elems->peer_link = pos;
+			elems->peer_link_len = elen;
+			break;
+		case WLAN_EID_PREQ:
+			elems->preq = pos;
+			elems->preq_len = elen;
+			break;
+		case WLAN_EID_PREP:
+			elems->prep = pos;
+			elems->prep_len = elen;
+			break;
+		case WLAN_EID_PERR:
+			elems->perr = pos;
+			elems->perr_len = elen;
+			break;
+		case WLAN_EID_CHANNEL_SWITCH:
+			elems->ch_switch_elem = pos;
+			elems->ch_switch_elem_len = elen;
+			break;
+		case WLAN_EID_QUIET:
+			if (!elems->quiet_elem) {
+				elems->quiet_elem = pos;
+				elems->quiet_elem_len = elen;
+			}
+			elems->num_of_quiet_elem++;
+			break;
+		case WLAN_EID_COUNTRY:
+			elems->country_elem = pos;
+			elems->country_elem_len = elen;
+			break;
+		case WLAN_EID_PWR_CONSTRAINT:
+			elems->pwr_constr_elem = pos;
+			elems->pwr_constr_elem_len = elen;
+			break;
+		case WLAN_EID_TIMEOUT_INTERVAL:
+			elems->timeout_int = pos;
+			elems->timeout_int_len = elen;
+			break;
+		default:
+			break;
+		}
+
+		left -= elen;
+		pos += elen;
+	}
+
+	return crc;
+}
+
+void rtllib_parse_elems(u8 *start, size_t len,
+			    struct ieee802_11_elems *elems)
+{
+	rtllib_parse_elems_crc(start, len, elems, 0, 0);
+}
+
+void ieee80211_scan_rx(struct rtllib_device *ieee, struct sk_buff *skb, struct rtllib_rx_stats *rx_status)
+{
+	struct rtllib_hdr_4addr *header = (struct rtllib_hdr_4addr *)skb->data ;
+	struct ieee80211_mgmt *mgmt;
+	struct ieee80211_bss *bss;
+	u8 *elements;
+	struct ieee80211_channel *channel;
+	size_t baselen;
+	int freq;
+	__le16 fc;
+	bool presp, beacon = false;
+	struct ieee802_11_elems elems;
+	s32 signal = 0;
+
+	if (skb->len < 2)
+		return;
+
+	mgmt = (struct ieee80211_mgmt *) skb->data;
+	fc = mgmt->frame_control;
+
+	if (skb->len < 24)
+		return;
+	
+	presp = (WLAN_FC_GET_STYPE(header->frame_ctl) == RTLLIB_STYPE_PROBE_RESP);
+	if (presp) {
+		/* ignore ProbeResp to foreign address */
+		if (memcmp(mgmt->da, ieee->dev->dev_addr, ETH_ALEN))
+			return ;;
+
+		presp = true;
+		elements = mgmt->u.probe_resp.variable;
+		baselen = offsetof(struct ieee80211_mgmt, u.probe_resp.variable);
+	} else {
+		beacon =  (WLAN_FC_GET_STYPE(header->frame_ctl) == RTLLIB_STYPE_BEACON);
+		baselen = offsetof(struct ieee80211_mgmt, u.beacon.variable);
+		elements = mgmt->u.beacon.variable;
+	}
+
+	if (!presp && !beacon)
+		return;
+
+	if (baselen > skb->len)
+		return;
+
+	rtllib_parse_elems(elements, skb->len - baselen, &elems);
+
+	if (elems.ds_params && elems.ds_params_len == 1)
+		freq = rtllib_channel_to_frequency(elems.ds_params[0]);
+	else
+		return;
+
+	channel = rtllib_get_channel(ieee->wdev.wiphy, freq);
+
+	if (!channel || channel->flags & IEEE80211_CHAN_DISABLED)
+		return;
+
+		signal = rx_status->signal * 100;
+
+	bss = (void *)cfg80211_inform_bss_frame(ieee->wdev.wiphy, channel,
+						mgmt, skb->len, signal, GFP_ATOMIC);
+
+	return;
+}
+#endif
+
+#ifdef RTLLIB_RADIOTAP
+static int rtllib_rx_radiotap_len(struct rtllib_device *ieee, struct rtllib_rx_stats *rx_status) 
+{
+	int len;
+
+	/* always present fields */
+	len = sizeof(struct ieee80211_radiotap_header) + 9 +
+		8 + /* TSFT */
+		1 + /* HW SIGNAL DBM */
+		1;  /* HW NOISE DBM */
+
+	if (len & 1) /* padding for RX_FLAGS if necessary */
+		len++;
+
+	/* make sure radiotap starts at a naturally aligned address */
+	if (len % 8)
+		len = roundup(len, 8);
+
+	return len;
+}
+
+static void rtllib_add_rx_radiotap_header(struct rtllib_device *ieee, 
+		struct sk_buff *skb, int rtap_len, struct rtllib_rx_stats *rx_status)
+{
+	struct ieee80211_radiotap_header *rthdr;
+	unsigned char *pos;
+	printk("add header!\n");
+	rthdr = (struct ieee80211_radiotap_header *)skb_push(skb, rtap_len);
+	memset(rthdr, 0, rtap_len);
+	
+	rthdr->it_version = PKTHDR_RADIOTAP_VERSION;
+	rthdr->it_pad = 0;
+	rthdr->it_len = cpu_to_le16(rtap_len);
+	/* radiotap header, set always present flags */
+	rthdr->it_present = cpu_to_le32(
+		(1 << IEEE80211_RADIOTAP_TSFT) |
+		(1 << IEEE80211_RADIOTAP_FLAGS) |
+		(1 << IEEE80211_RADIOTAP_RATE) |
+		(1 << IEEE80211_RADIOTAP_CHANNEL) |
+		(1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
+		(1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
+		(1 << IEEE80211_RADIOTAP_ANTENNA));
+
+	pos = (unsigned char *)(rthdr+1);
+	/* the order of the following fields is important */
+	/* IEEE80211_RADIOTAP_TSFT */
+	*(__le64 *)pos = cpu_to_le64((rx_status->mac_time[1] << 32) | \
+			rx_status->mac_time[0]);
+	pos += 8;
+
+	/* IEEE80211_RADIOTAP_FLAGS */
+	if (rx_status->bCRC)
+		*pos |= IEEE80211_RADIOTAP_F_BADFCS;
+	if (rx_status->bShortPreamble)
+		*pos |= IEEE80211_RADIOTAP_F_SHORTPRE;
+	pos++;
+
+	/* IEEE80211_RADIOTAP_RATE */
+	*pos = rx_status->rate / 5;
+	pos++;
+
+	/* IEEE80211_RADIOTAP_CHANNEL */
+	*(__le16 *)pos = cpu_to_le16(rx_status->received_channel);
+	pos += 2;
+#if 0	
+	if (status->band == IEEE80211_BAND_5GHZ)
+		*(__le16 *)pos = cpu_to_le16(IEEE80211_CHAN_OFDM |
+				IEEE80211_CHAN_5GHZ);
+	else if (rate->flags & IEEE80211_RATE_ERP_G)
+		*(__le16 *)pos = cpu_to_le16(IEEE80211_CHAN_OFDM |
+				IEEE80211_CHAN_2GHZ);
+	else
+		*(__le16 *)pos = cpu_to_le16(IEEE80211_CHAN_CCK |
+				IEEE80211_CHAN_2GHZ);
+#endif	
+	pos += 2;
+
+	
+	/* IEEE80211_RADIOTAP_DBM_ANTSIGNAL */
+	*pos = rx_status->RxPower;
+	pos++;
+
+	/* IEEE80211_RADIOTAP_DBM_ANTNOISE */
+	*pos = rx_status->noise;
+	pos++;
+
+	/* IEEE80211_RADIOTAP_ANTENNA */
+	*pos = rx_status->Antenna;
+	pos++;
+
+	/* IEEE80211_RADIOTAP_DB_ANTNOISE is not used */
+
+	/* IEEE80211_RADIOTAP_RX_FLAGS */
+	/* ensure 2 byte alignment for the 2 byte field as required */
+#if 0	
+	if ((pos - (unsigned char *)rthdr) & 1)
+		pos++;
+	if (status->flag & RX_FLAG_FAILED_PLCP_CRC)
+		*(__le16 *)pos |= cpu_to_le16(IEEE80211_RADIOTAP_F_RX_BADPLCP);
+	pos += 2;
+#endif	
+}
+#endif
+
+static inline void rtllib_monitor_rx(struct rtllib_device *ieee,
+				struct sk_buff *skb,struct rtllib_rx_stats *rx_status, 
+				size_t hdr_length)
+{
+#ifdef RTLLIB_RADIOTAP
+	int needed_headroom = 0;
+	struct sk_buff *radiotap_skb;
+
+	needed_headroom = rtllib_rx_radiotap_len(ieee, rx_status);
+	printk("needed_headroom = %d\n", needed_headroom);
+	radiotap_skb = skb_copy_expand(skb, needed_headroom, 0, GFP_ATOMIC);
+	dev_kfree_skb(skb);
+	if (!radiotap_skb) {
+		return;
+	}
+
+	rtllib_add_rx_radiotap_header(ieee, skb, needed_headroom, rx_status);
+	radiotap_skb->dev = ieee->dev;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)
+        skb_reset_mac_header(radiotap_skb);
+#else
+        radiotap_skb->mac.raw = skb->data;
+#endif
+	radiotap_skb->ip_summed = CHECKSUM_UNNECESSARY;
+	radiotap_skb->pkt_type = PACKET_OTHERHOST;
+	radiotap_skb->protocol = htons(ETH_P_802_2);
+	memset(radiotap_skb->cb, 0, sizeof(radiotap_skb->cb));
+	netif_rx(radiotap_skb);
+#else	
+	skb->dev = ieee->dev;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)
+        skb_reset_mac_header(skb);
+#else
+        skb->mac.raw = skb->data;
+#endif
+	skb_pull(skb, hdr_length);
+	skb->pkt_type = PACKET_OTHERHOST;
+	skb->protocol = __constant_htons(ETH_P_80211_RAW);
+	memset(skb->cb, 0, sizeof(skb->cb));
+	netif_rx(skb);
+#endif	
+}
+
+/* Called only as a tasklet (software IRQ) */
+static struct rtllib_frag_entry *
+rtllib_frag_cache_find(struct rtllib_device *ieee, unsigned int seq,
+			  unsigned int frag, u8 tid,u8 *src, u8 *dst)
+{
+	struct rtllib_frag_entry *entry;
+	int i;
+
+	for (i = 0; i < RTLLIB_FRAG_CACHE_LEN; i++) {
+		entry = &ieee->frag_cache[tid][i];
+		if (entry->skb != NULL &&
+		    time_after(jiffies, entry->first_frag_time + 2 * HZ)) {
+			RTLLIB_DEBUG_FRAG(
+				"expiring fragment cache entry "
+				"seq=%u last_frag=%u\n",
+				entry->seq, entry->last_frag);
+			dev_kfree_skb_any(entry->skb);
+			entry->skb = NULL;
+		}
+
+		if (entry->skb != NULL && entry->seq == seq &&
+		    (entry->last_frag + 1 == frag || frag == -1) &&
+		    memcmp(entry->src_addr, src, ETH_ALEN) == 0 &&
+		    memcmp(entry->dst_addr, dst, ETH_ALEN) == 0)
+			return entry;
+	}
+
+	return NULL;
+}
+
+/* Called only as a tasklet (software IRQ) */
+static struct sk_buff *
+rtllib_frag_cache_get(struct rtllib_device *ieee,
+			 struct rtllib_hdr_4addr *hdr)
+{
+	struct sk_buff *skb = NULL;
+	u16 fc = le16_to_cpu(hdr->frame_ctl);
+	u16 sc = le16_to_cpu(hdr->seq_ctl);
+	unsigned int frag = WLAN_GET_SEQ_FRAG(sc);
+	unsigned int seq = WLAN_GET_SEQ_SEQ(sc);
+	struct rtllib_frag_entry *entry;
+	struct rtllib_hdr_3addrqos *hdr_3addrqos;
+	struct rtllib_hdr_4addrqos *hdr_4addrqos;
+	u8 tid;
+	
+	if (((fc & RTLLIB_FCTL_DSTODS) == RTLLIB_FCTL_DSTODS)&&RTLLIB_QOS_HAS_SEQ(fc)) {
+	  hdr_4addrqos = (struct rtllib_hdr_4addrqos *)hdr;
+	  tid = le16_to_cpu(hdr_4addrqos->qos_ctl) & RTLLIB_QCTL_TID;
+	  tid = UP2AC(tid);
+	  tid ++;
+	} else if (RTLLIB_QOS_HAS_SEQ(fc)) {
+	  hdr_3addrqos = (struct rtllib_hdr_3addrqos *)hdr;
+	  tid = le16_to_cpu(hdr_3addrqos->qos_ctl) & RTLLIB_QCTL_TID;
+	  tid = UP2AC(tid);
+	  tid ++;
+	} else {
+	  tid = 0;
+	}
+
+	if (frag == 0) {
+		/* Reserve enough space to fit maximum frame length */
+		skb = dev_alloc_skb(ieee->dev->mtu +
+				    sizeof(struct rtllib_hdr_4addr) +
+				    8 /* LLC */ +
+				    2 /* alignment */ +
+				    8 /* WEP */ + 
+				    ETH_ALEN /* WDS */ +
+				    (RTLLIB_QOS_HAS_SEQ(fc)?2:0) /* QOS Control */);
+		if (skb == NULL)
+			return NULL;
+
+		entry = &ieee->frag_cache[tid][ieee->frag_next_idx[tid]];
+		ieee->frag_next_idx[tid]++;
+		if (ieee->frag_next_idx[tid] >= RTLLIB_FRAG_CACHE_LEN)
+			ieee->frag_next_idx[tid] = 0;
+
+		if (entry->skb != NULL)
+			dev_kfree_skb_any(entry->skb);
+
+		entry->first_frag_time = jiffies;
+		entry->seq = seq;
+		entry->last_frag = frag;
+		entry->skb = skb;
+		memcpy(entry->src_addr, hdr->addr2, ETH_ALEN);
+		memcpy(entry->dst_addr, hdr->addr1, ETH_ALEN);
+	} else {
+		/* received a fragment of a frame for which the head fragment
+		 * should have already been received */
+		entry = rtllib_frag_cache_find(ieee, seq, frag, tid,hdr->addr2,
+						  hdr->addr1);
+		if (entry != NULL) {
+			entry->last_frag = frag;
+			skb = entry->skb;
+		}
+	}
+
+	return skb;
+}
+
+
+/* Called only as a tasklet (software IRQ) */
+static int rtllib_frag_cache_invalidate(struct rtllib_device *ieee,
+					   struct rtllib_hdr_4addr *hdr)
+{
+	u16 fc = le16_to_cpu(hdr->frame_ctl);
+	u16 sc = le16_to_cpu(hdr->seq_ctl);
+	unsigned int seq = WLAN_GET_SEQ_SEQ(sc);
+	struct rtllib_frag_entry *entry;
+	struct rtllib_hdr_3addrqos *hdr_3addrqos;
+	struct rtllib_hdr_4addrqos *hdr_4addrqos;
+	u8 tid;
+	
+	if(((fc & RTLLIB_FCTL_DSTODS) == RTLLIB_FCTL_DSTODS)&&RTLLIB_QOS_HAS_SEQ(fc)) {
+	  hdr_4addrqos = (struct rtllib_hdr_4addrqos *)hdr;
+	  tid = le16_to_cpu(hdr_4addrqos->qos_ctl) & RTLLIB_QCTL_TID;
+	  tid = UP2AC(tid);
+	  tid ++;
+	} else if (RTLLIB_QOS_HAS_SEQ(fc)) {
+	  hdr_3addrqos = (struct rtllib_hdr_3addrqos *)hdr;
+	  tid = le16_to_cpu(hdr_3addrqos->qos_ctl) & RTLLIB_QCTL_TID;
+	  tid = UP2AC(tid);
+	  tid ++;
+	} else {
+	  tid = 0;
+	}
+
+	entry = rtllib_frag_cache_find(ieee, seq, -1, tid,hdr->addr2,
+					  hdr->addr1);
+
+	if (entry == NULL) {
+		RTLLIB_DEBUG_FRAG(
+			"could not invalidate fragment cache "
+			"entry (seq=%u)\n", seq);
+		return -1;
+	}
+
+	entry->skb = NULL;
+	return 0;
+}
+
+
+
+/* rtllib_rx_frame_mgtmt
+ *
+ * Responsible for handling management control frames
+ *
+ * Called by rtllib_rx */
+static inline int
+rtllib_rx_frame_mgmt(struct rtllib_device *ieee, struct sk_buff *skb,
+			struct rtllib_rx_stats *rx_stats, u16 type,
+			u16 stype)
+{
+	/* On the struct stats definition there is written that
+	 * this is not mandatory.... but seems that the probe
+	 * response parser uses it
+	 */
+	struct rtllib_hdr_3addr * hdr = (struct rtllib_hdr_3addr *)skb->data;
+
+	rx_stats->len = skb->len;
+	rtllib_rx_mgt(ieee,skb,rx_stats);	
+#ifdef _RTL8192_EXT_PATCH_   
+	if(ieee->iw_mode == IW_MODE_MESH){
+		if ((stype != RTLLIB_STYPE_MESH_ACT) && (memcmp(hdr->addr1, ieee->dev->dev_addr, ETH_ALEN)))
+		{
+			dev_kfree_skb_any(skb);
+			return 0;
+		}
+	}
+	else
+#endif
+	{
+		if ((memcmp(hdr->addr1, ieee->dev->dev_addr, ETH_ALEN)))
+		{
+			dev_kfree_skb_any(skb);
+			return 0;
+		}
+	}
+	rtllib_rx_frame_softmac(ieee, skb, rx_stats, type, stype);
+
+	dev_kfree_skb_any(skb);
+	
+	return 0;
+	
+#ifdef NOT_YET
+	if (ieee->iw_mode == IW_MODE_MASTER) {
+		printk(KERN_DEBUG "%s: Master mode not yet suppported.\n",
+		       ieee->dev->name);
+		return 0;
+/*
+  hostap_update_sta_ps(ieee, (struct hostap_rtllib_hdr_4addr *)
+  skb->data);*/
+	}
+
+	if (ieee->hostapd && type == RTLLIB_TYPE_MGMT) {
+		if (stype == WLAN_FC_STYPE_BEACON &&
+		    ieee->iw_mode == IW_MODE_MASTER) {
+			struct sk_buff *skb2;
+			/* Process beacon frames also in kernel driver to
+			 * update STA(AP) table statistics */
+			skb2 = skb_clone(skb, GFP_ATOMIC);
+			if (skb2)
+				hostap_rx(skb2->dev, skb2, rx_stats);
+		}
+
+		/* send management frames to the user space daemon for
+		 * processing */
+		ieee->apdevstats.rx_packets++;
+		ieee->apdevstats.rx_bytes += skb->len;
+		prism2_rx_80211(ieee->apdev, skb, rx_stats, PRISM2_RX_MGMT);
+		return 0;
+	}
+
+	    if (ieee->iw_mode == IW_MODE_MASTER) {
+		if (type != WLAN_FC_TYPE_MGMT && type != WLAN_FC_TYPE_CTRL) {
+			printk(KERN_DEBUG "%s: unknown management frame "
+			       "(type=0x%02x, stype=0x%02x) dropped\n",
+			       skb->dev->name, type, stype);
+			return -1;
+		}
+
+		hostap_rx(skb->dev, skb, rx_stats);
+		return 0;
+	}
+
+	printk(KERN_DEBUG "%s: hostap_rx_frame_mgmt: management frame "
+	       "received in non-Host AP mode\n", skb->dev->name);
+	return -1;
+#endif
+}
+
+#ifndef CONFIG_CFG_80211
+/* See IEEE 802.1H for LLC/SNAP encapsulation/decapsulation */
+/* Ethernet-II snap header (RFC1042 for most EtherTypes) */
+static unsigned char rfc1042_header[] =
+{ 0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00 };
+/* Bridge-Tunnel header (for EtherTypes ETH_P_AARP and ETH_P_IPX) */
+static unsigned char bridge_tunnel_header[] =
+{ 0xaa, 0xaa, 0x03, 0x00, 0x00, 0xf8 };
+/* No encapsulation header if EtherType < 0x600 (=length) */
+#endif
+
+/* Called by rtllib_rx_frame_decrypt */
+static int rtllib_is_eapol_frame(struct rtllib_device *ieee,
+				    struct sk_buff *skb, size_t hdrlen)
+{
+	struct net_device *dev = ieee->dev;
+	u16 fc, ethertype;
+	struct rtllib_hdr_4addr *hdr;
+	u8 *pos;
+
+	if (skb->len < 24)
+		return 0;
+
+	hdr = (struct rtllib_hdr_4addr *) skb->data;
+	fc = le16_to_cpu(hdr->frame_ctl);
+
+	/* check that the frame is unicast frame to us */
+	if ((fc & (RTLLIB_FCTL_TODS | RTLLIB_FCTL_FROMDS)) ==
+	    RTLLIB_FCTL_TODS &&
+	    memcmp(hdr->addr1, dev->dev_addr, ETH_ALEN) == 0 &&
+	    memcmp(hdr->addr3, dev->dev_addr, ETH_ALEN) == 0) {
+		/* ToDS frame with own addr BSSID and DA */
+	} else if ((fc & (RTLLIB_FCTL_TODS | RTLLIB_FCTL_FROMDS)) ==
+		   RTLLIB_FCTL_FROMDS &&
+		   memcmp(hdr->addr1, dev->dev_addr, ETH_ALEN) == 0) {
+		/* FromDS frame with own addr as DA */
+	} else
+		return 0;
+
+	if (skb->len < 24 + 8)
+		return 0;
+
+	/* check for port access entity Ethernet type */
+	pos = skb->data + hdrlen;
+	ethertype = (pos[6] << 8) | pos[7];
+	if (ethertype == ETH_P_PAE)
+		return 1;
+
+	return 0;
+}
+
+/* Called only as a tasklet (software IRQ), by rtllib_rx */
+static inline int
+rtllib_rx_frame_decrypt(struct rtllib_device* ieee, struct sk_buff *skb,
+			   struct rtllib_crypt_data *crypt)
+{
+	struct rtllib_hdr_4addr *hdr;
+	int res, hdrlen;
+
+	if (crypt == NULL || crypt->ops->decrypt_mpdu == NULL)
+		return 0;
+#if 1
+	if (ieee->hwsec_active)
+	{
+		cb_desc *tcb_desc = (cb_desc *)(skb->cb+ MAX_DEV_ADDR_SIZE);
+		tcb_desc->bHwSec = 1;
+
+		if(ieee->need_sw_enc)
+			tcb_desc->bHwSec = 0;
+	}
+#endif	
+	hdr = (struct rtllib_hdr_4addr *) skb->data;
+	hdrlen = rtllib_get_hdrlen(le16_to_cpu(hdr->frame_ctl));
+
+#ifdef CONFIG_RTLLIB_CRYPT_TKIP
+	if (ieee->tkip_countermeasures &&
+	    strcmp(crypt->ops->name, "TKIP") == 0) {
+		if (net_ratelimit()) {
+			printk(KERN_DEBUG "%s: TKIP countermeasures: dropped "
+			       "received packet from " MAC_FMT "\n",
+			       ieee->dev->name, MAC_ARG(hdr->addr2));
+		}
+		return -1;
+	}
+#endif
+
+	atomic_inc(&crypt->refcnt);
+	res = crypt->ops->decrypt_mpdu(skb, hdrlen, crypt->priv);
+	atomic_dec(&crypt->refcnt);
+	if (res < 0) {
+		RTLLIB_DEBUG_DROP(
+			"decryption failed (SA=" MAC_FMT
+			") res=%d\n", MAC_ARG(hdr->addr2), res);
+		if (res == -2)
+			RTLLIB_DEBUG_DROP("Decryption failed ICV "
+					     "mismatch (key %d)\n",
+					     skb->data[hdrlen + 3] >> 6);
+		ieee->ieee_stats.rx_discards_undecryptable++;
+		return -1;
+	}
+
+	return res;
+}
+
+
+/* Called only as a tasklet (software IRQ), by rtllib_rx */
+static inline int
+rtllib_rx_frame_decrypt_msdu(struct rtllib_device* ieee, struct sk_buff *skb,
+			     int keyidx, struct rtllib_crypt_data *crypt)
+{
+	struct rtllib_hdr_4addr *hdr;
+	int res, hdrlen;
+
+	if (crypt == NULL || crypt->ops->decrypt_msdu == NULL)
+		return 0;
+	if (ieee->hwsec_active)
+	{
+		cb_desc *tcb_desc = (cb_desc *)(skb->cb+ MAX_DEV_ADDR_SIZE);
+		tcb_desc->bHwSec = 1;
+	
+		if(ieee->need_sw_enc)
+			tcb_desc->bHwSec = 0;
+	}
+
+	hdr = (struct rtllib_hdr_4addr *) skb->data;
+	hdrlen = rtllib_get_hdrlen(le16_to_cpu(hdr->frame_ctl));
+
+	atomic_inc(&crypt->refcnt);
+	res = crypt->ops->decrypt_msdu(skb, keyidx, hdrlen, crypt->priv,ieee);
+	atomic_dec(&crypt->refcnt);
+	if (res < 0) {
+		printk(KERN_DEBUG "%s: MSDU decryption/MIC verification failed"
+		       " (SA=" MAC_FMT " keyidx=%d)\n",
+		       ieee->dev->name, MAC_ARG(hdr->addr2), keyidx);
+		return -1;
+	}
+
+	return 0;
+}
+
+#ifdef _RTL8192_EXT_PATCH_	
+static inline int rtllib_has_retry(u16 fc)
+{
+    return ((fc&RTLLIB_FCTL_RETRY)!=0);
+}
+#endif	
+
+/* this function is stolen from ipw2200 driver*/
+#define IEEE_PACKET_RETRY_TIME (5*HZ)
+static int is_duplicate_packet(struct rtllib_device *ieee,
+				      struct rtllib_hdr_4addr *header)
+{
+	u16 fc = le16_to_cpu(header->frame_ctl);
+	u16 sc = le16_to_cpu(header->seq_ctl);
+	u16 seq = WLAN_GET_SEQ_SEQ(sc);
+	u16 frag = WLAN_GET_SEQ_FRAG(sc);
+	u16 *last_seq, *last_frag;
+	unsigned long *last_time;
+	struct rtllib_hdr_3addrqos *hdr_3addrqos;
+	struct rtllib_hdr_4addrqos *hdr_4addrqos;
+	u8 tid;
+	
+	if(((fc & RTLLIB_FCTL_DSTODS) == RTLLIB_FCTL_DSTODS)&&RTLLIB_QOS_HAS_SEQ(fc)) {
+	  hdr_4addrqos = (struct rtllib_hdr_4addrqos *)header;
+	  tid = le16_to_cpu(hdr_4addrqos->qos_ctl) & RTLLIB_QCTL_TID;
+	  tid = UP2AC(tid);
+	  tid ++;
+	} else if(RTLLIB_QOS_HAS_SEQ(fc)) { 
+	  hdr_3addrqos = (struct rtllib_hdr_3addrqos*)header;
+	  tid = le16_to_cpu(hdr_3addrqos->qos_ctl) & RTLLIB_QCTL_TID;
+	  tid = UP2AC(tid);
+	  tid ++;
+	} else { 
+	  tid = 0;
+	}
+
+	switch (ieee->iw_mode) {
+	case IW_MODE_ADHOC:
+	{
+		struct list_head *p;
+		struct ieee_ibss_seq *entry = NULL;
+		u8 *mac = header->addr2;
+		int index = mac[5] % IEEE_IBSS_MAC_HASH_SIZE;
+		list_for_each(p, &ieee->ibss_mac_hash[index]) {
+			entry = list_entry(p, struct ieee_ibss_seq, list);
+			if (!memcmp(entry->mac, mac, ETH_ALEN))
+				break;
+		}
+		if (p == &ieee->ibss_mac_hash[index]) {
+			entry = kmalloc(sizeof(struct ieee_ibss_seq), GFP_ATOMIC);
+			if (!entry) {
+				printk(KERN_WARNING "Cannot malloc new mac entry\n");
+				return 0;
+			}
+			memcpy(entry->mac, mac, ETH_ALEN);
+			entry->seq_num[tid] = seq;
+			entry->frag_num[tid] = frag;
+			entry->packet_time[tid] = jiffies;
+			list_add(&entry->list, &ieee->ibss_mac_hash[index]);
+			return 0;
+		}
+		last_seq = &entry->seq_num[tid];
+		last_frag = &entry->frag_num[tid];
+		last_time = &entry->packet_time[tid];
+		break;
+	}
+	
+	case IW_MODE_INFRA:
+		last_seq = &ieee->last_rxseq_num[tid];
+		last_frag = &ieee->last_rxfrag_num[tid];
+		last_time = &ieee->last_packet_time[tid];
+		
+		break;
+
+#ifdef _RTL8192_EXT_PATCH_	
+	case IW_MODE_MESH:
+		/* Drop duplicate 802.11 retransmissions (IEEE 802.11 Chap. 9.2.9) */
+		if(!is_multicast_ether_addr(header->addr1)){
+			struct list_head *p;
+			struct ieee_mesh_seq *entry = NULL;
+			u8 *mac = header->addr2;
+			int index = mac[5] % IEEE_IBSS_MAC_HASH_SIZE;
+			list_for_each(p, &ieee->mesh_mac_hash[index]) {
+				entry = list_entry(p, struct ieee_mesh_seq, list);
+				if (!memcmp(entry->mac, mac, ETH_ALEN))
+					break;
+			}
+
+			if (p == &ieee->mesh_mac_hash[index]) {
+				entry = kmalloc(sizeof(struct ieee_mesh_seq), GFP_ATOMIC);
+				if (!entry) {
+					printk(KERN_WARNING "Cannot malloc new mac entry\n");
+					return 0;
+				}
+				memcpy(entry->mac, mac, ETH_ALEN);
+				entry->seq_num[tid] = header->seq_ctl;
+				entry->packet_time[tid] = jiffies;
+				list_add(&entry->list, &ieee->mesh_mac_hash[index]);
+				return 0;
+			}
+			last_seq = &entry->seq_num[tid];
+			last_time = &entry->packet_time[tid];
+
+			if (unlikely(rtllib_has_retry(fc) &&
+				*last_seq == header->seq_ctl)) {
+				goto drop;
+			} else {
+				*last_seq = header->seq_ctl;
+			}
+			*last_time = jiffies;
+		}
+		return 0;
+#endif	
+	default:
+		return 0;
+	}
+
+	if ((*last_seq == seq) &&
+	    time_after(*last_time + IEEE_PACKET_RETRY_TIME, jiffies)) {
+		if (*last_frag == frag){
+			goto drop;
+
+		}
+		if (*last_frag + 1 != frag)
+			/* out-of-order fragment */
+			goto drop;
+	} else
+		*last_seq = seq;
+
+	*last_frag = frag;
+	*last_time = jiffies;
+	return 0;
+
+drop:
+	
+	return 1;
+}
+bool
+AddReorderEntry(
+	PRX_TS_RECORD			pTS,
+	PRX_REORDER_ENTRY		pReorderEntry
+	)
+{
+	struct list_head *pList = &pTS->RxPendingPktList;
+
+	while(pList->next != &pTS->RxPendingPktList)
+	{
+		if( SN_LESS(pReorderEntry->SeqNum, ((PRX_REORDER_ENTRY)list_entry(pList->next,RX_REORDER_ENTRY,List))->SeqNum) )
+		{
+			pList = pList->next;
+		}
+		else if( SN_EQUAL(pReorderEntry->SeqNum, ((PRX_REORDER_ENTRY)list_entry(pList->next,RX_REORDER_ENTRY,List))->SeqNum) )
+		{
+			return false;
+		}
+		else
+		{
+			break;
+		}
+	}
+	pReorderEntry->List.next = pList->next;
+	pReorderEntry->List.next->prev = &pReorderEntry->List;
+	pReorderEntry->List.prev = pList;
+	pList->next = &pReorderEntry->List;
+
+	return true;
+}
+
+void rtllib_indicate_packets(struct rtllib_device *ieee, struct rtllib_rxb** prxbIndicateArray,u8  index)
+{
+	struct net_device_stats *stats = &ieee->stats;
+	u8 i = 0 , j=0;
+	u16 ethertype;
+	for(j = 0; j<index; j++)
+	{
+		struct rtllib_rxb* prxb = prxbIndicateArray[j];
+#ifdef RTL8192S_WAPI_SUPPORT
+             if ((ieee->WapiSupport) && (ieee->wapiInfo.bWapiEnable))
+             {
+        		if(WapiCheckDropForRxReorderCase(ieee,prxb))
+        		{
+        			WAPI_TRACE(WAPI_ERR, "%s(): Rx Reorder Drop case!!\n", __FUNCTION__);
+				for(i = 0; i<prxb->nr_subframes; i++) {
+					if(prxb->subframes[i])
+        					dev_kfree_skb(prxb->subframes[i]);
+				}
+				prxb->nr_subframes = 0;
+        		}
+		}
+#endif
+		for(i = 0; i<prxb->nr_subframes; i++) {
+			struct sk_buff *sub_skb = prxb->subframes[i];
+				
+		/* convert hdr + possible LLC headers into Ethernet header */
+			ethertype = (sub_skb->data[6] << 8) | sub_skb->data[7];
+			if (sub_skb->len >= 8 &&
+				((memcmp(sub_skb->data, rfc1042_header, SNAP_SIZE) == 0 &&
+				  ethertype != ETH_P_AARP && ethertype != ETH_P_IPX) ||
+				 memcmp(sub_skb->data, bridge_tunnel_header, SNAP_SIZE) == 0)) {
+			/* remove RFC1042 or Bridge-Tunnel encapsulation and
+			 * replace EtherType */
+				skb_pull(sub_skb, SNAP_SIZE);
+				memcpy(skb_push(sub_skb, ETH_ALEN), prxb->src, ETH_ALEN);
+				memcpy(skb_push(sub_skb, ETH_ALEN), prxb->dst, ETH_ALEN);
+			} else {
+				u16 len;
+			/* Leave Ethernet header part of hdr and full payload */
+				len = htons(sub_skb->len);
+				memcpy(skb_push(sub_skb, 2), &len, 2);
+				memcpy(skb_push(sub_skb, ETH_ALEN), prxb->src, ETH_ALEN);
+				memcpy(skb_push(sub_skb, ETH_ALEN), prxb->dst, ETH_ALEN);
+			}
+
+		/* Indicat the packets to upper layer */
+			if (sub_skb) {
+				stats->rx_packets++;
+				stats->rx_bytes += sub_skb->len;
+
+				memset(sub_skb->cb, 0, sizeof(sub_skb->cb));
+#ifdef _RTL8192_EXT_PATCH_	
+				sub_skb->protocol = eth_type_trans(sub_skb, sub_skb->dev);
+#else
+				sub_skb->protocol = eth_type_trans(sub_skb, ieee->dev);
+				sub_skb->dev = ieee->dev;
+#endif
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18))
+				sub_skb->dev->stats.rx_packets++;
+				sub_skb->dev->stats.rx_bytes += sub_skb->len;
+#endif
+#ifdef TCP_CSUM_OFFLOAD_RX
+				if ( prxb->tcp_csum_valid)
+					sub_skb->ip_summed = CHECKSUM_UNNECESSARY;
+				else
+					sub_skb->ip_summed = CHECKSUM_NONE;
+
+#else
+				sub_skb->ip_summed = CHECKSUM_NONE; /* 802.11 crc not sufficient */
+#endif				
+				ieee->last_rx_ps_time = jiffies;
+				netif_rx(sub_skb);
+			}
+		}
+		kfree(prxb);
+		prxb = NULL;	
+	}
+}
+
+void
+rtllib_FlushRxTsPendingPkts(struct rtllib_device *ieee,	PRX_TS_RECORD pTS)
+{
+	PRX_REORDER_ENTRY	pRxReorderEntry;
+	struct rtllib_rxb*		RfdArray[REORDER_WIN_SIZE];
+	u8					RfdCnt = 0;
+	unsigned long flags;
+
+	spin_lock_irqsave(&(ieee->reorder_spinlock), flags);
+	
+	del_timer_sync(&pTS->RxPktPendingTimer);
+	while(!list_empty(&pTS->RxPendingPktList))
+	{
+		if(RfdCnt >= REORDER_WIN_SIZE){
+			printk("-------------->%s() error! RfdCnt >= REORDER_WIN_SIZE\n", __func__);
+			break;
+		}
+
+		pRxReorderEntry = (PRX_REORDER_ENTRY)list_entry(pTS->RxPendingPktList.prev,RX_REORDER_ENTRY,List);
+		RTLLIB_DEBUG(RTLLIB_DL_REORDER,"%s(): Indicate SeqNum %d!\n",__FUNCTION__, pRxReorderEntry->SeqNum);
+		list_del_init(&pRxReorderEntry->List);
+		
+		RfdArray[RfdCnt] = pRxReorderEntry->prxb;
+		
+		RfdCnt = RfdCnt + 1;
+		list_add_tail(&pRxReorderEntry->List, &ieee->RxReorder_Unused_List);
+	}
+	rtllib_indicate_packets(ieee, RfdArray, RfdCnt);
+	
+	pTS->RxIndicateSeq = 0xffff;
+	
+	spin_unlock_irqrestore(&(ieee->reorder_spinlock), flags);
+#ifdef MERGE_TO_DO
+#endif	
+}
+
+
+void RxReorderIndicatePacket( struct rtllib_device *ieee,
+		struct rtllib_rxb* prxb,
+		PRX_TS_RECORD		pTS,
+		u16			SeqNum)
+{
+	PRT_HIGH_THROUGHPUT	pHTInfo = ieee->pHTInfo;
+	PRX_REORDER_ENTRY 	pReorderEntry = NULL;
+	struct rtllib_rxb* prxbIndicateArray[REORDER_WIN_SIZE];
+	u8			WinSize = pHTInfo->RxReorderWinSize;
+	u16			WinEnd = 0;
+	u8			index = 0;
+	bool			bMatchWinStart = false, bPktInBuf = false;
+	unsigned long flags;
+	
+	RTLLIB_DEBUG(RTLLIB_DL_REORDER,"%s(): Seq is %d,pTS->RxIndicateSeq is %d, WinSize is %d\n",__FUNCTION__,SeqNum,pTS->RxIndicateSeq,WinSize);
+
+	spin_lock_irqsave(&(ieee->reorder_spinlock), flags);
+
+	WinEnd = (pTS->RxIndicateSeq + WinSize -1)%4096;
+#if 0
+	if(!list_empty(&ieee->RxReorder_Unused_List))
+		RTLLIB_DEBUG(RTLLIB_DL_REORDER,"%s(): ieee->RxReorder_Unused_List is nut NULL\n");
+#endif
+	/* Rx Reorder initialize condition.*/
+	if(pTS->RxIndicateSeq == 0xffff) {
+		pTS->RxIndicateSeq = SeqNum;
+	}
+
+	/* Drop out the packet which SeqNum is smaller than WinStart */
+	if(SN_LESS(SeqNum, pTS->RxIndicateSeq)) {
+		RTLLIB_DEBUG(RTLLIB_DL_REORDER,"Packet Drop! IndicateSeq: %d, NewSeq: %d\n",
+				 pTS->RxIndicateSeq, SeqNum);
+		pHTInfo->RxReorderDropCounter++;
+		{
+			int i;
+			for(i =0; i < prxb->nr_subframes; i++) {
+				dev_kfree_skb(prxb->subframes[i]);
+			}
+			kfree(prxb);
+			prxb = NULL;
+		}
+		spin_unlock_irqrestore(&(ieee->reorder_spinlock), flags);
+		return;
+	}
+
+	/*
+	 * Sliding window manipulation. Conditions includes:
+	 * 1. Incoming SeqNum is equal to WinStart =>Window shift 1
+	 * 2. Incoming SeqNum is larger than the WinEnd => Window shift N
+	 */
+	if(SN_EQUAL(SeqNum, pTS->RxIndicateSeq)) {
+		pTS->RxIndicateSeq = (pTS->RxIndicateSeq + 1) % 4096;
+		bMatchWinStart = true;
+	} else if(SN_LESS(WinEnd, SeqNum)) {
+		if(SeqNum >= (WinSize - 1)) {
+			pTS->RxIndicateSeq = SeqNum + 1 -WinSize;
+		} else {
+			pTS->RxIndicateSeq = 4095 - (WinSize - (SeqNum +1)) + 1;
+		}
+		RTLLIB_DEBUG(RTLLIB_DL_REORDER, "Window Shift! IndicateSeq: %d, NewSeq: %d\n",pTS->RxIndicateSeq, SeqNum);
+	}
+
+	/*
+	 * Indication process.
+	 * After Packet dropping and Sliding Window shifting as above, we can now just indicate the packets
+	 * with the SeqNum smaller than latest WinStart and buffer other packets.
+	 */
+	/* For Rx Reorder condition:
+	 * 1. All packets with SeqNum smaller than WinStart => Indicate
+	 * 2. All packets with SeqNum larger than or equal to WinStart => Buffer it.
+	 */
+	if(bMatchWinStart) {
+		/* Current packet is going to be indicated.*/
+		RTLLIB_DEBUG(RTLLIB_DL_REORDER, "Packets indication!! IndicateSeq: %d, NewSeq: %d\n",\
+				pTS->RxIndicateSeq, SeqNum);
+		prxbIndicateArray[0] = prxb;
+		index = 1;
+	} else {
+		/* Current packet is going to be inserted into pending list.*/
+		if(!list_empty(&ieee->RxReorder_Unused_List)) {
+			pReorderEntry = (PRX_REORDER_ENTRY)list_entry(ieee->RxReorder_Unused_List.next,RX_REORDER_ENTRY,List);
+			list_del_init(&pReorderEntry->List);
+			
+			/* Make a reorder entry and insert into a the packet list.*/
+			pReorderEntry->SeqNum = SeqNum;
+			pReorderEntry->prxb = prxb;
+
+#if 1 
+			if(!AddReorderEntry(pTS, pReorderEntry)) {
+				RTLLIB_DEBUG(RTLLIB_DL_REORDER, "%s(): Duplicate packet is dropped!! IndicateSeq: %d, NewSeq: %d\n", 
+					__FUNCTION__, pTS->RxIndicateSeq, SeqNum);
+				list_add_tail(&pReorderEntry->List,&ieee->RxReorder_Unused_List);
+				{
+					int i;
+					for(i =0; i < prxb->nr_subframes; i++) {
+						dev_kfree_skb(prxb->subframes[i]);
+					}
+					kfree(prxb);
+					prxb = NULL;
+				}
+			} else {
+				RTLLIB_DEBUG(RTLLIB_DL_REORDER,
+					 "Pkt insert into buffer!! IndicateSeq: %d, NewSeq: %d\n",pTS->RxIndicateSeq, SeqNum);
+			}
+#endif
+		} 
+		else {
+			/*
+			 * Packets are dropped if there is not enough reorder entries.
+			 * This part shall be modified!! We can just indicate all the 
+			 * packets in buffer and get reorder entries.
+			 */
+			RTLLIB_DEBUG(RTLLIB_DL_ERR, "RxReorderIndicatePacket(): There is no reorder entry!! Packet is dropped!!\n");
+			{
+				int i;
+				for(i =0; i < prxb->nr_subframes; i++) {
+					dev_kfree_skb(prxb->subframes[i]);
+				}
+				kfree(prxb);
+				prxb = NULL;
+			}
+		}
+	}
+
+	/* Check if there is any packet need indicate.*/
+	while(!list_empty(&pTS->RxPendingPktList)) {
+		RTLLIB_DEBUG(RTLLIB_DL_REORDER,"%s(): start RREORDER indicate\n",__FUNCTION__);
+#if 1 
+		pReorderEntry = (PRX_REORDER_ENTRY)list_entry(pTS->RxPendingPktList.prev,RX_REORDER_ENTRY,List);
+		if( SN_LESS(pReorderEntry->SeqNum, pTS->RxIndicateSeq) || 
+				SN_EQUAL(pReorderEntry->SeqNum, pTS->RxIndicateSeq))
+		{
+			/* This protect buffer from overflow. */
+			if(index >= REORDER_WIN_SIZE) {
+				RTLLIB_DEBUG(RTLLIB_DL_ERR, "RxReorderIndicatePacket(): Buffer overflow!! \n");
+				bPktInBuf = true;
+				break;
+			}
+
+			list_del_init(&pReorderEntry->List);
+
+			if(SN_EQUAL(pReorderEntry->SeqNum, pTS->RxIndicateSeq))
+				pTS->RxIndicateSeq = (pTS->RxIndicateSeq + 1) % 4096;
+
+			prxbIndicateArray[index] = pReorderEntry->prxb;
+			RTLLIB_DEBUG(RTLLIB_DL_REORDER,"%s(): Indicate SeqNum %d!\n",__FUNCTION__, pReorderEntry->SeqNum);
+			index++;
+
+			list_add_tail(&pReorderEntry->List,&ieee->RxReorder_Unused_List);
+		} else {
+			bPktInBuf = true;
+			break;
+		}
+#endif
+	}
+
+	/* Handling pending timer. Set this timer to prevent from long time Rx buffering.*/
+	if(index>0) {
+		if(timer_pending(&pTS->RxPktPendingTimer)){
+			del_timer_sync(&pTS->RxPktPendingTimer);
+		}
+		pTS->RxTimeoutIndicateSeq = 0xffff;
+
+		if(index>REORDER_WIN_SIZE){
+			RTLLIB_DEBUG(RTLLIB_DL_ERR, "RxReorderIndicatePacket(): Rx Reorer buffer full!! \n");
+			spin_unlock_irqrestore(&(ieee->reorder_spinlock), flags);
+			return;
+		}
+		rtllib_indicate_packets(ieee, prxbIndicateArray, index);
+		bPktInBuf = false;
+	}
+
+	if(bPktInBuf && pTS->RxTimeoutIndicateSeq==0xffff) {
+		RTLLIB_DEBUG(RTLLIB_DL_REORDER,"%s(): SET rx timeout timer\n", __FUNCTION__);
+		pTS->RxTimeoutIndicateSeq = pTS->RxIndicateSeq;
+		mod_timer(&pTS->RxPktPendingTimer,  jiffies + MSECS(pHTInfo->RxReorderPendingTime));
+	}
+	spin_unlock_irqrestore(&(ieee->reorder_spinlock), flags);
+}
+
+u8 parse_subframe(struct rtllib_device* ieee,struct sk_buff *skb, 
+                  struct rtllib_rx_stats *rx_stats,
+		  struct rtllib_rxb *rxb,u8* src,u8* dst)
+{
+	struct rtllib_hdr_3addr  *hdr = (struct rtllib_hdr_3addr* )skb->data;
+	u16		fc = le16_to_cpu(hdr->frame_ctl);
+
+	u16		LLCOffset= sizeof(struct rtllib_hdr_3addr);
+	u16		ChkLength;
+	bool		bIsAggregateFrame = false;
+	u16		nSubframe_Length;
+	u8		nPadding_Length = 0;
+	u16		SeqNum=0;
+	struct sk_buff *sub_skb;
+	u8             *data_ptr;	
+	/* just for debug purpose */
+	SeqNum = WLAN_GET_SEQ_SEQ(le16_to_cpu(hdr->seq_ctl));
+	if((RTLLIB_QOS_HAS_SEQ(fc))&&\
+			(((frameqos *)(skb->data + RTLLIB_3ADDR_LEN))->field.reserved)) {
+		bIsAggregateFrame = true;
+	}
+
+	if(RTLLIB_QOS_HAS_SEQ(fc)) {
+		LLCOffset += 2;
+	}
+	if(rx_stats->bContainHTC) {
+		LLCOffset += sHTCLng;
+	}
+	ChkLength = LLCOffset;/* + (Frame_WEP(frame)!=0 ?Adapter->MgntInfo.SecurityInfo.EncryptionHeadOverhead:0);*/
+
+	if( skb->len <= ChkLength ) {
+		return 0;
+	}
+
+	skb_pull(skb, LLCOffset);
+	ieee->bIsAggregateFrame = bIsAggregateFrame;
+	if(!bIsAggregateFrame) {
+		rxb->nr_subframes = 1;
+#ifndef RTK_DMP_PLATFORM
+#ifdef JOHN_NOCPY
+		rxb->subframes[0] = skb;
+#else
+		rxb->subframes[0] = skb_copy(skb, GFP_ATOMIC);
+#endif
+#else
+		rxb->subframes[0] = skb_clone(skb, GFP_ATOMIC);
+#endif
+		memcpy(rxb->src,src,ETH_ALEN);
+		memcpy(rxb->dst,dst,ETH_ALEN);
+		rxb->subframes[0]->dev = ieee->dev;
+		return 1;
+	} else {
+		rxb->nr_subframes = 0;
+		memcpy(rxb->src,src,ETH_ALEN);
+		memcpy(rxb->dst,dst,ETH_ALEN);
+		while(skb->len > ETHERNET_HEADER_SIZE) {
+			/* Offset 12 denote 2 mac address */
+			nSubframe_Length = *((u16*)(skb->data + 12));
+			nSubframe_Length = (nSubframe_Length>>8) + (nSubframe_Length<<8);
+
+			if(skb->len<(ETHERNET_HEADER_SIZE + nSubframe_Length)) {
+				printk("%s: A-MSDU parse error!! pRfd->nTotalSubframe : %d\n",\
+						__FUNCTION__,rxb->nr_subframes);
+				printk("%s: A-MSDU parse error!! Subframe Length: %d\n",__FUNCTION__, nSubframe_Length);
+				printk("nRemain_Length is %d and nSubframe_Length is : %d\n",skb->len,nSubframe_Length);
+				printk("The Packet SeqNum is %d\n",SeqNum);
+				return 0;
+			}
+
+			/* move the data point to data content */
+			skb_pull(skb, ETHERNET_HEADER_SIZE);
+
+#ifdef JOHN_NOCPY
+			sub_skb = skb_clone(skb, GFP_ATOMIC);
+			sub_skb->len = nSubframe_Length;
+			sub_skb->tail = sub_skb->data + nSubframe_Length;
+#else
+			/* Allocate new skb for releasing to upper layer */
+			sub_skb = dev_alloc_skb(nSubframe_Length + 12);
+			skb_reserve(sub_skb, 12);
+			data_ptr = (u8 *)skb_put(sub_skb, nSubframe_Length);
+			memcpy(data_ptr,skb->data,nSubframe_Length);
+#endif
+			sub_skb->dev = ieee->dev;
+			rxb->subframes[rxb->nr_subframes++] = sub_skb;
+			if(rxb->nr_subframes >= MAX_SUBFRAME_COUNT) {
+				RTLLIB_DEBUG_RX("ParseSubframe(): Too many Subframes! Packets dropped!\n");
+				break;
+			}
+			skb_pull(skb,nSubframe_Length);
+
+			if(skb->len != 0) {
+				nPadding_Length = 4 - ((nSubframe_Length + ETHERNET_HEADER_SIZE) % 4);
+				if(nPadding_Length == 4) {
+					nPadding_Length = 0;
+				}
+
+				if(skb->len < nPadding_Length) {
+					return 0;
+				}
+
+				skb_pull(skb,nPadding_Length);	
+			}			
+		}
+#ifdef JOHN_NOCPY
+		dev_kfree_skb(skb);
+#endif
+		return rxb->nr_subframes;
+	}
+}
+
+
+size_t rtllib_rx_get_hdrlen(struct rtllib_device *ieee, struct sk_buff *skb,
+		 struct rtllib_rx_stats *rx_stats)
+{
+	struct rtllib_hdr_4addr *hdr = (struct rtllib_hdr_4addr *)skb->data;
+	u16 fc = le16_to_cpu(hdr->frame_ctl);
+	size_t hdrlen = 0;
+	
+	hdrlen = rtllib_get_hdrlen(fc);
+	if (HTCCheck(ieee, skb->data)) {
+		if(net_ratelimit())
+			printk("%s: find HTCControl!\n", __func__);
+		hdrlen += 4;
+		rx_stats->bContainHTC = 1;
+	} 
+
+	 if(RTLLIB_QOS_HAS_SEQ(fc))
+		rx_stats->bIsQosData = 1;
+
+	return hdrlen;
+}
+
+int rtllib_rx_check_duplicate(struct rtllib_device *ieee, struct sk_buff *skb, u8 multicast)
+{
+	struct rtllib_hdr_4addr *hdr = (struct rtllib_hdr_4addr *)skb->data;
+	u16 fc, sc;
+	u8 frag, type, stype;
+
+	fc = le16_to_cpu(hdr->frame_ctl);
+	type = WLAN_FC_GET_TYPE(fc);
+	stype = WLAN_FC_GET_STYPE(fc);
+	sc = le16_to_cpu(hdr->seq_ctl);
+	frag = WLAN_GET_SEQ_FRAG(sc);
+	
+#ifdef _RTL8192_EXT_PATCH_
+	if( (ieee->pHTInfo->bCurRxReorderEnable == false) || 
+		!ieee->current_network.qos_data.active|| 
+		!IsDataFrame(skb->data) || 
+		IsLegacyDataFrame(skb->data) || 
+		multicast) {
+		if (!multicast) {
+			if (is_duplicate_packet(ieee, hdr)){
+				return -1;
+			}
+		}
+	}
+#else
+	if( (ieee->pHTInfo->bCurRxReorderEnable == false) || 
+		!ieee->current_network.qos_data.active || 
+		!IsDataFrame(skb->data) || 
+		IsLegacyDataFrame(skb->data)) {
+		if(!((type == RTLLIB_FTYPE_MGMT) && (stype == RTLLIB_STYPE_BEACON))){
+			if (is_duplicate_packet(ieee, hdr)){
+				return -1;
+			}
+		}
+	}
+#endif
+	else {
+		PRX_TS_RECORD pRxTS = NULL;
+		if (GetTs(ieee, (PTS_COMMON_INFO*) &pRxTS, hdr->addr2, 
+			(u8)Frame_QoSTID((u8*)(skb->data)), RX_DIR, true)) {
+			if ((fc & (1<<11)) && (frag == pRxTS->RxLastFragNum) && 
+			    (WLAN_GET_SEQ_SEQ(sc) == pRxTS->RxLastSeqNum)) {
+				return -1;
+			} else {
+				pRxTS->RxLastFragNum = frag;
+				pRxTS->RxLastSeqNum = WLAN_GET_SEQ_SEQ(sc);
+			}
+		} else {
+			RTLLIB_DEBUG(RTLLIB_DL_ERR, "ERR!!%s(): No TS!! Skip the check!!\n",__FUNCTION__);
+			return -1;
+		}
+	}
+
+	return 0;
+}
+void rtllib_rx_extract_addr(struct rtllib_device *ieee, struct rtllib_hdr_4addr *hdr, u8 *dst, u8 *src, u8 *bssid)
+{
+	u16 fc = le16_to_cpu(hdr->frame_ctl);
+	
+	switch (fc & (RTLLIB_FCTL_FROMDS | RTLLIB_FCTL_TODS)) {
+		case RTLLIB_FCTL_FROMDS:
+			memcpy(dst, hdr->addr1, ETH_ALEN);
+			memcpy(src, hdr->addr3, ETH_ALEN);
+			memcpy(bssid, hdr->addr2, ETH_ALEN);
+			break;
+		case RTLLIB_FCTL_TODS:
+			memcpy(dst, hdr->addr3, ETH_ALEN);
+			memcpy(src, hdr->addr2, ETH_ALEN);
+			memcpy(bssid, hdr->addr1, ETH_ALEN);
+			break;
+		case RTLLIB_FCTL_FROMDS | RTLLIB_FCTL_TODS:
+			memcpy(dst, hdr->addr3, ETH_ALEN);
+			memcpy(src, hdr->addr4, ETH_ALEN);
+#ifdef _RTL8192_EXT_PATCH_
+			memcpy(bssid, ieee->current_mesh_network.bssid, ETH_ALEN);
+#else
+			memcpy(bssid, ieee->current_network.bssid, ETH_ALEN);
+#endif
+			break;
+		case 0:
+			memcpy(dst, hdr->addr1, ETH_ALEN);
+			memcpy(src, hdr->addr2, ETH_ALEN);
+			memcpy(bssid, hdr->addr3, ETH_ALEN);
+			break;
+	}
+}
+int rtllib_rx_data_filter(struct rtllib_device *ieee, u16 fc, u8 *dst, u8 *src, u8 *bssid, u8 *addr2)
+{
+	u8 zero_addr[ETH_ALEN] = {0};
+	u8 type, stype;
+	
+	type = WLAN_FC_GET_TYPE(fc);
+	stype = WLAN_FC_GET_STYPE(fc);
+	
+	/* Filter frames from different BSS */
+	if (((fc & RTLLIB_FCTL_DSTODS) != RTLLIB_FCTL_DSTODS)
+                && (compare_ether_addr(ieee->current_network.bssid, bssid) != 0) 
+                && memcmp(ieee->current_network.bssid, zero_addr, ETH_ALEN)) {
+		return -1;
+	}
+
+	/* Filter packets sent by an STA that will be forwarded by AP */
+	if ( ieee->IntelPromiscuousModeInfo.bPromiscuousOn  &&
+                ieee->IntelPromiscuousModeInfo.bFilterSourceStationFrame ) {
+		if ((fc & RTLLIB_FCTL_TODS) && !(fc & RTLLIB_FCTL_FROMDS) &&
+			(compare_ether_addr(dst, ieee->current_network.bssid) != 0) &&	   
+			(compare_ether_addr(bssid, ieee->current_network.bssid) == 0)) {   
+			return -1;
+		}
+	}
+
+	/* Nullfunc frames may have PS-bit set, so they must be passed to
+	 * hostap_handle_sta_rx() before being dropped here. */
+	if(!ieee->IntelPromiscuousModeInfo.bPromiscuousOn){
+		if (stype != RTLLIB_STYPE_DATA &&
+		    stype != RTLLIB_STYPE_DATA_CFACK &&
+		    stype != RTLLIB_STYPE_DATA_CFPOLL &&
+		    stype != RTLLIB_STYPE_DATA_CFACKPOLL&&
+		    stype != RTLLIB_STYPE_QOS_DATA
+		    ) {
+			if (stype != RTLLIB_STYPE_NULLFUNC)
+				RTLLIB_DEBUG_DROP(
+					"RX: dropped data frame "
+					"with no data (type=0x%02x, "
+					"subtype=0x%02x)\n",
+					type, stype);
+			return -1;
+		}
+	}
+
+	if(ieee->iw_mode == IW_MODE_MESH) {
+#ifdef _RTL8192_EXT_PATCH_
+		/* check whether it exists the mesh entry for data packet */
+		if(ieee->ext_patch_rtllib_is_mesh&&\
+				(false ==ieee->ext_patch_rtllib_is_mesh(ieee, addr2))) {
+			if(ieee->only_mesh) {
+				return -1;
+			} else if(memcmp(bssid, ieee->current_network.bssid, ETH_ALEN)) {   
+				return -1;
+			}
+		} 
+#endif
+	} else {
+		/* packets from our adapter are dropped (echo) */
+		if (!memcmp(src, ieee->dev->dev_addr, ETH_ALEN))
+			return -1;
+
+		/* {broad,multi}cast packets to our BSS go through */
+		if (is_multicast_ether_addr(dst) || is_broadcast_ether_addr(dst)) {
+			if (memcmp(bssid, ieee->current_network.bssid, ETH_ALEN)) {
+				return -1;
+			}
+		}
+	}
+	return 0;
+}
+int rtllib_rx_get_crypt(
+		struct rtllib_device *ieee, 
+		struct sk_buff *skb, 
+		struct rtllib_crypt_data **crypt, 
+		size_t hdrlen)
+{
+	struct rtllib_hdr_4addr *hdr = (struct rtllib_hdr_4addr *)skb->data;
+	u16 fc = le16_to_cpu(hdr->frame_ctl);
+	int idx = 0;
+
+#if defined (RTL8192S_WAPI_SUPPORT)
+	if (ieee->host_decrypt && (!ieee->wapiInfo.bWapiEnable))
+#else
+	if (ieee->host_decrypt)
+#endif
+	{
+		if (skb->len >= hdrlen + 3)
+			idx = skb->data[hdrlen + 3] >> 6;
+
+#ifdef _RTL8192_EXT_PATCH_
+		*crypt = ieee->sta_crypt[idx];
+#else
+		*crypt = ieee->crypt[idx];
+#endif
+		/* allow NULL decrypt to indicate an station specific override
+		 * for default encryption */
+		if (*crypt && ((*crypt)->ops == NULL ||
+			      (*crypt)->ops->decrypt_mpdu == NULL))
+			*crypt = NULL;
+
+		if (!*crypt && (fc & RTLLIB_FCTL_WEP)) {
+			/* This seems to be triggered by some (multicast?)
+			 * frames from other than current BSS, so just drop the
+			 * frames silently instead of filling system log with
+			 * these reports. */
+			RTLLIB_DEBUG_DROP("Decryption failed (not set)"
+					     " (SA=" MAC_FMT ")\n",
+					     MAC_ARG(hdr->addr2));
+			ieee->ieee_stats.rx_discards_undecryptable++;
+			return -1;
+		}
+	}
+
+	return 0;
+}
+int rtllib_rx_decrypt(
+		struct rtllib_device *ieee, 
+		struct sk_buff *skb, 
+		struct rtllib_rx_stats *rx_stats, 
+		struct rtllib_crypt_data *crypt,
+		size_t hdrlen)
+{
+	struct rtllib_hdr_4addr *hdr;
+	int keyidx = 0;
+	u16 fc, sc;
+	u8 frag;
+
+	hdr = (struct rtllib_hdr_4addr *)skb->data;
+	fc = le16_to_cpu(hdr->frame_ctl);
+	sc = le16_to_cpu(hdr->seq_ctl);
+	frag = WLAN_GET_SEQ_FRAG(sc);
+	
+	if((!rx_stats->Decrypted)){
+		ieee->need_sw_enc = 1;
+	}else{
+		ieee->need_sw_enc = 0;
+	}
+
+	if (ieee->host_decrypt && (fc & RTLLIB_FCTL_WEP) &&
+	    ((keyidx = rtllib_rx_frame_decrypt(ieee, skb, crypt)) < 0) 
+#if defined (RTL8192S_WAPI_SUPPORT)
+	    && (!ieee->wapiInfo.bWapiEnable)
+#endif
+	    )
+	{
+		printk("%s: decrypt frame error\n", __func__);
+		return -1;
+	}
+
+#if defined (RTL8192S_WAPI_SUPPORT)
+	if(ieee->wapiInfo.bWapiEnable){
+		if(ieee->pairwise_key_type == KEY_TYPE_SMS4){
+			if(false == SecSWSMS4Decryption(ieee, skb, rx_stats)){
+				WAPI_TRACE(WAPI_ERR, "%s():SMS4 decrypt frame error\n",__func__);
+				return -1;
+			}
+		}
+	}
+#endif
+	hdr = (struct rtllib_hdr_4addr *) skb->data;
+	if ((frag != 0 || (fc & RTLLIB_FCTL_MOREFRAGS))) {
+		int flen;
+		struct sk_buff *frag_skb = rtllib_frag_cache_get(ieee, hdr);
+		RTLLIB_DEBUG_FRAG("Rx Fragment received (%u)\n", frag);
+
+		if (!frag_skb) {
+			RTLLIB_DEBUG(RTLLIB_DL_RX | RTLLIB_DL_FRAG,
+					"Rx cannot get skb from fragment "
+					"cache (morefrag=%d seq=%u frag=%u)\n",
+					(fc & RTLLIB_FCTL_MOREFRAGS) != 0,
+					WLAN_GET_SEQ_SEQ(sc), frag);
+			return -1;
+		}
+		flen = skb->len;
+		if (frag != 0)
+			flen -= hdrlen;
+
+		if (frag_skb->tail + flen > frag_skb->end) {
+			printk(KERN_WARNING "%s: host decrypted and "
+			       "reassembled frame did not fit skb\n",
+			       __func__);
+			rtllib_frag_cache_invalidate(ieee, hdr);
+			return -1;
+		}
+
+		if (frag == 0) {
+			/* copy first fragment (including full headers) into
+			 * beginning of the fragment cache skb */
+			memcpy(skb_put(frag_skb, flen), skb->data, flen);
+		} else {
+			/* append frame payload to the end of the fragment
+			 * cache skb */
+			memcpy(skb_put(frag_skb, flen), skb->data + hdrlen,
+			       flen);
+		}
+		dev_kfree_skb_any(skb);
+		skb = NULL;
+
+		if (fc & RTLLIB_FCTL_MOREFRAGS) {
+			/* more fragments expected - leave the skb in fragment
+			 * cache for now; it will be delivered to upper layers
+			 * after all fragments have been received */
+			return -2;
+		}
+
+		/* this was the last fragment and the frame will be
+		 * delivered, so remove skb from fragment cache */
+		skb = frag_skb;
+		hdr = (struct rtllib_hdr_4addr *) skb->data;
+		rtllib_frag_cache_invalidate(ieee, hdr);
+	}
+
+	/* skb: hdr + (possible reassembled) full MSDU payload; possibly still
+	 * encrypted/authenticated */
+	if (ieee->host_decrypt && (fc & RTLLIB_FCTL_WEP) && 
+#if defined (RTL8192S_WAPI_SUPPORT)
+		(!ieee->wapiInfo.bWapiEnable) &&
+#endif		
+	    	rtllib_rx_frame_decrypt_msdu(ieee, skb, keyidx, crypt))
+	{
+		printk("%s: ==>decrypt msdu error\n", __func__);
+		return -1;
+	}
+
+	hdr = (struct rtllib_hdr_4addr *) skb->data;
+	if (crypt && !(fc & RTLLIB_FCTL_WEP) && !ieee->open_wep) {
+		if (/*ieee->ieee802_1x &&*/
+		    rtllib_is_eapol_frame(ieee, skb, hdrlen)) {
+
+#ifdef CONFIG_RTLLIB_DEBUG
+			/* pass unencrypted EAPOL frames even if encryption is
+			 * configured */
+			struct eapol *eap = (struct eapol *)(skb->data +
+				24);
+			RTLLIB_DEBUG_EAP("RX: IEEE 802.1X EAPOL frame: %s\n",
+						eap_get_type(eap->type));
+#endif
+		} else {
+			RTLLIB_DEBUG_DROP(
+				"encryption configured, but RX "
+				"frame not encrypted (SA=" MAC_FMT ")\n",
+				MAC_ARG(hdr->addr2));
+			return -1;
+		}
+	} 
+
+#ifdef CONFIG_RTLLIB_DEBUG
+	if (crypt && !(fc & RTLLIB_FCTL_WEP) &&
+	    rtllib_is_eapol_frame(ieee, skb, hdrlen)) {
+			struct eapol *eap = (struct eapol *)(skb->data +
+				24);
+			RTLLIB_DEBUG_EAP("RX: IEEE 802.1X EAPOL frame: %s\n",
+						eap_get_type(eap->type));
+	}
+#endif
+
+	if (crypt && !(fc & RTLLIB_FCTL_WEP) && !ieee->open_wep &&
+	    !rtllib_is_eapol_frame(ieee, skb, hdrlen)) {
+		RTLLIB_DEBUG_DROP(
+			"dropped unencrypted RX data "
+			"frame from " MAC_FMT
+			" (drop_unencrypted=1)\n",
+			MAC_ARG(hdr->addr2));
+		return -1;
+	}
+
+	if(rtllib_is_eapol_frame(ieee, skb, hdrlen)) {
+		printk(KERN_WARNING "RX: IEEE802.1X EPAOL frame!\n");
+	}
+
+	return 0;
+}
+void rtllib_rx_check_leave_lps(struct rtllib_device *ieee, u8 unicast, u8 nr_subframes)
+{
+#if !defined(RTL8192SU) && !defined(RTL8192U) 
+#ifdef ENABLE_LPS
+	if(unicast){
+		ieee->LinkDetectInfo.NumRxUnicastOkInPeriod += nr_subframes;
+		
+		if((ieee->state == RTLLIB_LINKED) /*&& !MgntInitAdapterInProgress(pMgntInfo)*/)
+		{
+			if(	((ieee->LinkDetectInfo.NumRxUnicastOkInPeriod +ieee->LinkDetectInfo.NumTxOkInPeriod) > 8 ) ||
+				(ieee->LinkDetectInfo.NumRxUnicastOkInPeriod > 2) )
+			{
+				if(ieee->LeisurePSLeave)
+					ieee->LeisurePSLeave(ieee->dev);
+			}
+		}
+	}	
+#endif
+#endif
+	ieee->last_rx_ps_time = jiffies;
+}
+void rtllib_rx_indicate_pkt_legacy(
+		struct rtllib_device *ieee, 
+		struct rtllib_rx_stats *rx_stats, 
+		struct rtllib_rxb* rxb, 
+		u8 *dst, 
+		u8 *src)
+{
+#ifndef _RTL8192_EXT_PATCH_
+	struct net_device *dev = ieee->dev;
+#endif
+	u16 ethertype;
+	int i = 0;
+
+	if(rxb == NULL){
+		printk("%s: rxb is NULL!!\n", __func__);
+		return ;
+	}
+	
+	for(i = 0; i<rxb->nr_subframes; i++) {
+		struct sk_buff *sub_skb = rxb->subframes[i];
+
+		if (sub_skb) {
+			/* convert hdr + possible LLC headers into Ethernet header */
+			ethertype = (sub_skb->data[6] << 8) | sub_skb->data[7];
+			if (sub_skb->len >= 8 &&
+					((memcmp(sub_skb->data, rfc1042_header, SNAP_SIZE) == 0 &&
+					  ethertype != ETH_P_AARP && ethertype != ETH_P_IPX) ||
+					 memcmp(sub_skb->data, bridge_tunnel_header, SNAP_SIZE) == 0)) {
+				/* remove RFC1042 or Bridge-Tunnel encapsulation and
+				 * replace EtherType */
+				skb_pull(sub_skb, SNAP_SIZE);
+				memcpy(skb_push(sub_skb, ETH_ALEN), src, ETH_ALEN);
+				memcpy(skb_push(sub_skb, ETH_ALEN), dst, ETH_ALEN);
+			} else {
+				u16 len;
+				/* Leave Ethernet header part of hdr and full payload */
+				len = htons(sub_skb->len);
+				memcpy(skb_push(sub_skb, 2), &len, 2);
+				memcpy(skb_push(sub_skb, ETH_ALEN), src, ETH_ALEN);
+				memcpy(skb_push(sub_skb, ETH_ALEN), dst, ETH_ALEN);
+			}
+
+			ieee->stats.rx_packets++;
+			ieee->stats.rx_bytes += sub_skb->len;
+
+			if(is_multicast_ether_addr(dst)) {
+				ieee->stats.multicast++;
+			}
+
+			/* Indicat the packets to upper layer */
+			memset(sub_skb->cb, 0, sizeof(sub_skb->cb));
+#ifdef _RTL8192_EXT_PATCH_
+			sub_skb->protocol = eth_type_trans(sub_skb, sub_skb->dev);
+#else
+			sub_skb->protocol = eth_type_trans(sub_skb, dev);
+			sub_skb->dev = dev;
+#endif
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18))
+			sub_skb->dev->stats.rx_packets++;
+			sub_skb->dev->stats.rx_bytes += sub_skb->len;	
+#endif
+#ifdef TCP_CSUM_OFFLOAD_RX
+			if ( rx_stats->tcp_csum_valid)
+				sub_skb->ip_summed = CHECKSUM_UNNECESSARY;
+			else
+				sub_skb->ip_summed = CHECKSUM_NONE;
+#else
+			sub_skb->ip_summed = CHECKSUM_NONE; /* 802.11 crc not sufficient */
+#endif				
+			netif_rx(sub_skb);
+		}
+	}
+	kfree(rxb);
+	rxb = NULL;
+}
+int rtllib_rx_InfraAdhoc(struct rtllib_device *ieee, struct sk_buff *skb,
+		 struct rtllib_rx_stats *rx_stats)
+{
+	struct net_device *dev = ieee->dev;
+	struct rtllib_hdr_4addr *hdr = (struct rtllib_hdr_4addr *)skb->data;
+	struct rtllib_crypt_data *crypt = NULL;
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
+	struct sta_info * psta = NULL;
+#endif
+	struct rtllib_rxb* rxb = NULL;
+	PRX_TS_RECORD pTS = NULL;
+	u16 fc, sc, SeqNum = 0;
+	u8 type, stype, multicast = 0, unicast = 0, nr_subframes = 0, TID = 0;
+	u8 dst[ETH_ALEN], src[ETH_ALEN], bssid[ETH_ALEN] = {0}, *payload;
+	size_t hdrlen = 0;
+#if defined (RTL8192S_WAPI_SUPPORT)
+	u8 wapiDectResult = 0;
+#endif
+	bool bToOtherSTA = false;
+	int ret = 0, i = 0;
+
+	hdr = (struct rtllib_hdr_4addr *)skb->data;
+	fc = le16_to_cpu(hdr->frame_ctl);
+	type = WLAN_FC_GET_TYPE(fc);
+	stype = WLAN_FC_GET_STYPE(fc);
+	sc = le16_to_cpu(hdr->seq_ctl);
+
+	/*Filter pkt not to me*/
+	multicast = is_multicast_ether_addr(hdr->addr1)|is_broadcast_ether_addr(hdr->addr1);
+	unicast = !multicast;
+	if (unicast && (compare_ether_addr(dev->dev_addr, hdr->addr1) != 0)) {
+		if(ieee->bNetPromiscuousMode)
+			bToOtherSTA = true;
+		else
+			goto rx_dropped;
+	}
+	
+	/*Filter pkt has too small length */
+	hdrlen = rtllib_rx_get_hdrlen(ieee, skb, rx_stats);
+	if(skb->len < hdrlen){
+		printk("%s():ERR!!! skb->len is smaller than hdrlen\n",__FUNCTION__);
+		goto rx_dropped;
+	}
+
+	/* Filter Duplicate pkt */
+	ret = rtllib_rx_check_duplicate(ieee, skb, multicast);
+	if(ret < 0)
+		goto rx_dropped;
+	
+	/* Filter CTRL Frame */
+	if (type == RTLLIB_FTYPE_CTL) {
+		goto rx_dropped;
+	}
+
+	/* Filter MGNT Frame */
+	if (type == RTLLIB_FTYPE_MGMT) {
+		if(bToOtherSTA)
+			goto rx_dropped;
+		if (rtllib_rx_frame_mgmt(ieee, skb, rx_stats, type, stype))
+			goto rx_dropped;
+		else
+			goto rx_exit;
+	}
+
+	/* Filter WAPI DATA Frame */
+#if defined (RTL8192S_WAPI_SUPPORT)
+	if(ieee->WapiSupport && ieee->wapiInfo.bWapiEnable){
+		wapiDectResult = SecIsWAIPacket(ieee, skb);
+		if(wapiDectResult !=0){
+			if(memcmp(&ieee->wapiInfo.wapiSeqnumAndFragNum,&sc,2))
+				WapiHandleRecvPacket(ieee, skb, wapiDectResult);
+			memcpy(&ieee->wapiInfo.wapiSeqnumAndFragNum,&sc,2);
+			dev_kfree_skb_any(skb);
+			goto rx_exit;
+		}
+	}
+#endif	
+
+	/* Update statstics for AP roaming */
+	if(!bToOtherSTA){
+		ieee->LinkDetectInfo.NumRecvDataInPeriod++;
+		ieee->LinkDetectInfo.NumRxOkInPeriod++;
+	}
+	dev->last_rx = jiffies;
+	
+	/* Data frame - extract src/dst addresses */
+	rtllib_rx_extract_addr(ieee, hdr, dst, src, bssid);
+
+	/* Filter Data frames */
+	ret = rtllib_rx_data_filter(ieee, fc, dst, src, bssid, hdr->addr2);
+	if(ret < 0)
+		goto rx_dropped;
+
+	if(skb->len == hdrlen){
+		goto rx_dropped;
+	}
+
+	/* Send pspoll based on moredata */
+#ifdef ENABLE_LPS
+	if ((ieee->iw_mode == IW_MODE_INFRA)  && (ieee->sta_sleep == 1) 
+		&& (ieee->polling) && (!bToOtherSTA)) {
+		if (WLAN_FC_MORE_DATA(fc)) {
+			/* more data bit is set, let's request a new frame from the AP */
+			rtllib_sta_ps_send_pspoll_frame(ieee);
+		} else {
+			ieee->polling =  false;
+		}
+	}
+#endif
+
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
+	if(ieee->iw_mode == IW_MODE_ADHOC){
+		psta = GetStaInfo(ieee, src);
+		if(NULL != psta)
+			psta->LastActiveTime = jiffies;
+	}
+#endif
+
+	/* Get crypt if encrypted */
+	ret = rtllib_rx_get_crypt(ieee, skb, &crypt, hdrlen);
+	if(ret == -1)
+		goto rx_dropped;
+
+	/* Decrypt data frame (including reassemble) */
+	ret = rtllib_rx_decrypt(ieee, skb, rx_stats, crypt, hdrlen);
+	if(ret == -1)
+		goto rx_dropped;
+	else if(ret == -2)
+		goto rx_exit;
+
+	/* Get TS for Rx Reorder  */
+	hdr = (struct rtllib_hdr_4addr *) skb->data;
+	if(ieee->current_network.qos_data.active && IsQoSDataFrame(skb->data) 
+		&& !is_multicast_ether_addr(hdr->addr1) && !is_broadcast_ether_addr(hdr->addr1) 
+		&& (!bToOtherSTA))
+	{
+		TID = Frame_QoSTID(skb->data);
+		SeqNum = WLAN_GET_SEQ_SEQ(sc);
+		GetTs(ieee,(PTS_COMMON_INFO*) &pTS,hdr->addr2,TID,RX_DIR,true);
+		if(TID !=0 && TID !=3){
+			ieee->bis_any_nonbepkts = true;
+		}
+	}
+
+	/* Parse rx data frame (For AMSDU) */
+	/* skb: hdr + (possible reassembled) full plaintext payload */
+	payload = skb->data + hdrlen;
+	rxb = (struct rtllib_rxb*)kmalloc(sizeof(struct rtllib_rxb),GFP_ATOMIC);
+	if(rxb == NULL)
+	{
+		RTLLIB_DEBUG(RTLLIB_DL_ERR,"%s(): kmalloc rxb error\n",__FUNCTION__);
+		goto rx_dropped;
+	}
+	/* to parse amsdu packets */
+	/* qos data packets & reserved bit is 1 */
+	if(parse_subframe(ieee,skb,rx_stats,rxb,src,dst) == 0) {
+		/* only to free rxb, and not submit the packets to upper layer */
+		for(i =0; i < rxb->nr_subframes; i++) {
+			dev_kfree_skb(rxb->subframes[i]);
+		}
+		kfree(rxb);
+		rxb = NULL;
+		goto rx_dropped;
+	}
+
+	/* Update WAPI PN */
+#ifdef RTL8192S_WAPI_SUPPORT
+	if(ieee->wapiInfo.bWapiEnable){
+		if(rxb){
+			rxb->UserPriority = TID;
+			memcpy(rxb->WapiTempPN, rx_stats->WapiTempPN, 16);
+			memcpy(rxb->WapiSrcAddr, rx_stats->WapiSrcAddr, 6);
+			rxb->bWapiCheckPNInDecrypt = rx_stats->bWapiCheckPNInDecrypt;
+		}
+	}
+#endif
+
+	/* Check if leave LPS */
+	if(!bToOtherSTA){
+		if(ieee->bIsAggregateFrame)
+			nr_subframes = rxb->nr_subframes;
+		else
+			nr_subframes = 1;
+		rtllib_rx_check_leave_lps(ieee, unicast, nr_subframes);
+	}
+	
+	/* Indicate packets to upper layer or Rx Reorder */
+	if(ieee->pHTInfo->bCurRxReorderEnable == false ||pTS == NULL || bToOtherSTA){
+		rtllib_rx_indicate_pkt_legacy(ieee, rx_stats, rxb, dst, src);
+	}else{
+#ifdef TCP_CSUM_OFFLOAD_RX
+		rxb->tcp_csum_valid = rx_stats->tcp_csum_valid;
+#endif		
+		RxReorderIndicatePacket(ieee, rxb, pTS, SeqNum);
+	}
+
+#ifndef JOHN_NOCPY
+	dev_kfree_skb(skb);
+#endif
+
+ rx_exit:
+	return 1;
+
+ rx_dropped:
+	if (rxb != NULL)
+	{
+		kfree(rxb);
+		rxb = NULL;
+	}		
+	ieee->stats.rx_dropped++;
+
+	/* Returning 0 indicates to caller that we have not handled the SKB--
+	 * so it is still allocated and can be used again by underlying
+	 * hardware as a DMA target */
+	return 0;
+}
+
+int rtllib_rx_Master(struct rtllib_device *ieee, struct sk_buff *skb,
+		 struct rtllib_rx_stats *rx_stats)
+{
+	return 0;
+}
+int rtllib_rx_Monitor(struct rtllib_device *ieee, struct sk_buff *skb,
+		 struct rtllib_rx_stats *rx_stats)
+{
+	struct rtllib_hdr_4addr *hdr = (struct rtllib_hdr_4addr *)skb->data;
+	u16 fc = le16_to_cpu(hdr->frame_ctl);
+	size_t hdrlen = rtllib_get_hdrlen(fc);
+	
+	if(skb->len < hdrlen){
+		printk("%s():ERR!!! skb->len is smaller than hdrlen\n", __func__);
+		return 0;
+	}
+	
+	if (HTCCheck(ieee, skb->data)) {
+		if(net_ratelimit())
+			printk("%s: Find HTCControl!\n", __func__);
+		hdrlen += 4;
+	} 
+
+#if WIRELESS_EXT > 15
+	rtllib_monitor_rx(ieee, skb, rx_stats, hdrlen);
+	ieee->stats.rx_packets++;
+	ieee->stats.rx_bytes += skb->len;
+#endif
+	return 1;
+}
+#ifdef _RTL8192_EXT_PATCH_
+extern u8 msh_parse_subframe(struct rtllib_device *ieee,struct sk_buff *skb, struct rtllib_rxb *rxb);
+extern int msh_rx_process_dataframe(struct rtllib_device *ieee, struct rtllib_rxb *rxb, struct rtllib_rx_stats *rx_stats);
+int rtllib_rx_get_mesh_crypt(
+		struct rtllib_device *ieee, 
+		struct sk_buff *skb, 
+		struct rtllib_crypt_data **crypt, 
+		size_t hdrlen)
+{
+	struct rtllib_hdr_4addr *hdr = (struct rtllib_hdr_4addr *)skb->data;
+	u16 fc = le16_to_cpu(hdr->frame_ctl);
+	int idx = 0, i;
+	u8 find_crypt = false;
+	
+	if (ieee->host_decrypt){
+		if (skb->len >= hdrlen + 3)
+			idx = skb->data[hdrlen + 3] >> 6;
+		if (ieee->mesh_sec_type == 1) { 
+			if(ieee->mesh_security_setting==1 ||ieee->mesh_security_setting==3){
+				i = rtllib_find_MP(ieee, hdr->addr2, 0);
+				if(is_multicast_ether_addr(hdr->addr1) || is_broadcast_ether_addr(hdr->addr1)){
+					if(ieee->only_mesh){
+						if(i != -1){
+							i=0;
+						}else{
+							printk("%s: Err find MP ("MAC_FMT")!SAE, Multicast and only mesh\n", __func__, MAC_ARG(hdr->addr2));
+							return -1;
+						}
+					}else{
+						if(i != -1){
+							i=0;
+						}else{
+							find_crypt = true;
+							*crypt = ieee->sta_crypt[idx];
+						}
+					}
+				}else{
+					if(ieee->only_mesh){
+						if (i == -1){
+							printk("%s: Err find MP ("MAC_FMT")!SAE, Unicast and only mesh\n", __func__, MAC_ARG(hdr->addr2));
+							return -1;
+						}
+					}else{
+						if (i == -1){
+							find_crypt = true;
+							*crypt = ieee->sta_crypt[idx];
+						}
+					}
+				}
+				if(find_crypt == false){  
+					if(ieee->cryptlist[i] == NULL)
+						return -1;
+					else
+						*crypt = ieee->cryptlist[i]->crypt[idx];
+				}
+			}
+		}
+		else {
+			*crypt = ieee->cryptlist[0]->crypt[idx];
+			if(*crypt){
+				int i = rtllib_find_MP(ieee, hdr->addr2, 0);
+				if(ieee->only_mesh){
+					if (i == -1){
+						printk("%s: Err find MP ("MAC_FMT")!Not SAE, Only mesh.\n", __func__, MAC_ARG(hdr->addr2));
+						return -1;
+					}
+					if (ieee->cryptlist[i] && ieee->cryptlist[i]->crypt[idx])
+						*crypt = ieee->cryptlist[i]->crypt[idx];
+					else{
+						*crypt = NULL;
+						printk("%s: Err find crypt!Not SAE, Only mesh.\n", __func__);
+						return -1;
+					}
+				}else{
+					if(i != -1)
+					{
+						if (ieee->cryptlist[i] && ieee->cryptlist[i]->crypt[idx])
+							*crypt = ieee->cryptlist[i]->crypt[idx];
+						else{
+							*crypt = NULL;
+							printk("%s: Err find crypt!Not SAE, Only mesh.\n", __func__);
+							return -1;
+						}
+					}
+					else
+						*crypt = ieee->sta_crypt[idx];
+				}
+			}
+			else{
+				if(!ieee->ext_patch_rtllib_is_mesh(ieee,hdr->addr2))	
+					*crypt = ieee->sta_crypt[idx];
+			}
+		}
+
+		/* allow NULL decrypt to indicate an station specific override
+		 * for default encryption */
+		if (*crypt && ((*crypt)->ops == NULL ||
+			      (*crypt)->ops->decrypt_mpdu == NULL))
+			*crypt = NULL;
+
+		if (!*crypt && (fc & RTLLIB_FCTL_WEP)) {
+			/* This seems to be triggered by some (multicast?)
+			 * frames from other than current BSS, so just drop the
+			 * frames silently instead of filling system log with
+			 * these reports. */
+			RTLLIB_DEBUG_DROP("Decryption failed (not set)"
+					     " (SA=" MAC_FMT ")\n",
+					     MAC_ARG(hdr->addr2));
+			ieee->ieee_stats.rx_discards_undecryptable++;
+			return -1;
+		}
+	}
+	return 0;
+}
+#endif
+
+int rtllib_rx_Mesh(struct rtllib_device *ieee, struct sk_buff *skb,
+		 struct rtllib_rx_stats *rx_stats)
+{
+#ifdef _RTL8192_EXT_PATCH_
+	struct net_device *dev = ieee->dev;
+	struct rtllib_hdr_4addr *hdr = (struct rtllib_hdr_4addr *)skb->data;
+	struct rtllib_crypt_data *crypt = NULL;
+	struct rtllib_rxb* rxb = NULL;
+	PRX_TS_RECORD pTS = NULL;
+	u16 fc, sc, SeqNum = 0;
+	u8 type, stype, multicast = 0, unicast = 0, TID = 0;
+	u8 dst[ETH_ALEN], src[ETH_ALEN], bssid[ETH_ALEN] = {0}, *payload;
+	size_t hdrlen = 0;
+	int ret = 0, i = 0;
+
+	hdr = (struct rtllib_hdr_4addr *)skb->data;
+	fc = le16_to_cpu(hdr->frame_ctl);
+	type = WLAN_FC_GET_TYPE(fc);
+	stype = WLAN_FC_GET_STYPE(fc);
+	sc = le16_to_cpu(hdr->seq_ctl);
+
+	/*Filter pkt not to me*/
+	multicast = is_multicast_ether_addr(hdr->addr1)|is_broadcast_ether_addr(hdr->addr1);
+	unicast = !multicast;
+	if (unicast && (compare_ether_addr(dev->dev_addr, hdr->addr1) != 0)) {
+		goto rx_dropped;
+	}
+	
+	/*Filter pkt has too small length */
+	hdrlen = rtllib_rx_get_hdrlen(ieee, skb, rx_stats);
+	if(skb->len < hdrlen){
+		printk("%s():ERR!!! skb->len is smaller than hdrlen\n",__FUNCTION__);
+		goto rx_dropped;
+	}
+
+	/* Filter Duplicate pkt */
+	ret = rtllib_rx_check_duplicate(ieee, skb, multicast);
+	if(ret < 0){
+		goto rx_dropped;
+	}
+
+	/* Update PeerMP expire time */
+	if(ieee->ext_patch_rtllib_rx_mgt_update_expire)
+		ieee->ext_patch_rtllib_rx_mgt_update_expire( ieee, skb );
+
+	/* Filter CTRL Frame */
+	if (type == RTLLIB_FTYPE_CTL) {
+		goto rx_dropped;
+	}
+
+	/* Filter MGNT Frame */
+	if (type == RTLLIB_FTYPE_MGMT) {
+		if (rtllib_rx_frame_mgmt(ieee, skb, rx_stats, type, stype)){
+			printk("%s: Mgnt Frame! ret!=0\n", __func__);
+			goto rx_dropped;
+		}
+		else
+			goto rx_exit;
+	}
+
+	/* Update statstics for AP roaming */
+	if(ieee->only_mesh == 0){
+		ieee->LinkDetectInfo.NumRecvDataInPeriod++;
+		ieee->LinkDetectInfo.NumRxOkInPeriod++;
+		dev->last_rx = jiffies;
+	}
+	
+	/* Data frame - extract src/dst addresses */
+	rtllib_rx_extract_addr(ieee, hdr, dst, src, bssid);
+
+	/* Filter Data frames */
+	ret = rtllib_rx_data_filter(ieee, fc, dst, src, bssid, hdr->addr2);
+	if(ret < 0){
+		goto rx_dropped;
+	}
+	if(skb->len == hdrlen){
+		goto rx_dropped;
+	}
+
+	/* Get crypt if encrypted */
+	ret = rtllib_rx_get_mesh_crypt(ieee, skb, &crypt, hdrlen);
+	if(ret == -1)
+		goto rx_dropped;
+
+	/* Decrypt data frame (including reassemble) */
+	ret = rtllib_rx_decrypt(ieee, skb, rx_stats, crypt, hdrlen);
+	if(ret == -1)
+		goto rx_dropped;
+	else if(ret == -2)
+		goto rx_exit;
+
+	/* Get TS for Rx Reorder  */
+	hdr = (struct rtllib_hdr_4addr *) skb->data;
+	if(ieee->current_network.qos_data.active && IsQoSDataFrame(skb->data) 
+		&& !is_multicast_ether_addr(hdr->addr1) && !is_broadcast_ether_addr(hdr->addr1))
+	{
+		TID = Frame_QoSTID(skb->data);
+		SeqNum = WLAN_GET_SEQ_SEQ(sc);
+		GetTs(ieee,(PTS_COMMON_INFO*) &pTS,hdr->addr2,TID,RX_DIR,true);
+		if(TID !=0 && TID !=3){
+			ieee->bis_any_nonbepkts = true;
+		}
+	}
+
+	/* Parse rx data frame */
+	if((fc & (WIFI_MESH_TYPE | RTLLIB_FCTL_DSTODS))
+		== (WIFI_MESH_TYPE | RTLLIB_FCTL_DSTODS))
+	{
+		/* Parse Mesh data frame */
+		rxb = (struct rtllib_rxb*)kmalloc(sizeof(struct rtllib_rxb),GFP_ATOMIC);
+		if(rxb == NULL)
+		{
+			printk("%s(): kmalloc rxb error\n", __func__);
+			goto rx_dropped;
+		}
+		memset(rxb, 0, sizeof(struct rtllib_rxb));
+		if(msh_parse_subframe(ieee, skb, rxb)==0){
+			/* only to free rxb, and not submit the packets to upper layer */
+			for(i =0; i < rxb->nr_subframes; i++) {
+				if(rxb->subframes[i])
+					dev_kfree_skb(rxb->subframes[i]);
+			}
+			kfree(rxb);
+			rxb = NULL;
+			goto rx_dropped;
+		}
+		ret = msh_rx_process_dataframe(ieee,rxb,rx_stats);
+		if(ret < 0) {
+			for(i =0; i < rxb->nr_subframes; i++) {
+				if(rxb->subframes[i])
+					dev_kfree_skb(rxb->subframes[i]);
+			}
+			kfree(rxb);
+			rxb = NULL;
+			goto rx_dropped;
+		}else{
+			kfree(rxb);
+			rxb = NULL;
+		}
+	}
+	else{
+		/* Parse INFRA data frame (Server Ra0 mode) */
+		/* skb: hdr + (possible reassembled) full plaintext payload */
+		payload = skb->data + hdrlen;
+		rxb = (struct rtllib_rxb*)kmalloc(sizeof(struct rtllib_rxb),GFP_ATOMIC);
+		if(rxb == NULL)
+		{
+			RTLLIB_DEBUG(RTLLIB_DL_ERR,"%s(): kmalloc rxb error\n", __func__);
+			goto rx_dropped;
+		}
+		/* to parse amsdu packets */
+		/* qos data packets & reserved bit is 1 */
+		if(parse_subframe(ieee,skb,rx_stats,rxb,src,dst) == 0) {
+			/* only to free rxb, and not submit the packets to upper layer */
+			for(i =0; i < rxb->nr_subframes; i++) {
+				dev_kfree_skb(rxb->subframes[i]);
+			}
+			kfree(rxb);
+			rxb = NULL;
+			goto rx_dropped;
+		}
+
+		/* Indicate packets to upper layer or Rx Reorder */
+		if(ieee->pHTInfo->bCurRxReorderEnable == false ||pTS == NULL){
+			rtllib_rx_indicate_pkt_legacy(ieee, rx_stats, rxb, dst, src);
+		}else{
+			RTLLIB_DEBUG(RTLLIB_DL_REORDER,"%s(): REORDER ENABLE AND PTS not NULL, and we will enter RxReorderIndicatePacket()\n",__FUNCTION__);		
+#ifdef TCP_CSUM_OFFLOAD_RX
+			rxb->tcp_csum_valid = rx_stats->tcp_csum_valid;
+#endif		
+			RxReorderIndicatePacket(ieee, rxb, pTS, SeqNum);
+		}
+	}
+#ifndef JOHN_NOCPY
+	dev_kfree_skb(skb);
+#endif
+
+ rx_exit:
+	return 1;
+
+ rx_dropped:
+	if (rxb != NULL)
+	{
+		kfree(rxb);
+		rxb = NULL;
+	}		
+	ieee->stats.rx_dropped++;
+
+	/* Returning 0 indicates to caller that we have not handled the SKB--
+	 * so it is still allocated and can be used again by underlying
+	 * hardware as a DMA target */
+#endif
+	return 0;
+}
+
+#if 1
+/* All received frames are sent to this function. @skb contains the frame in
+ * IEEE 802.11 format, i.e., in the format it was sent over air.
+ * This function is called only as a tasklet (software IRQ). */
+int rtllib_rx(struct rtllib_device *ieee, struct sk_buff *skb,
+		 struct rtllib_rx_stats *rx_stats)
+{
+	int ret = 0;
+
+	if((NULL==ieee) || (NULL==skb) || (NULL==rx_stats)){
+		printk(KERN_INFO "%s: Input parameters NULL!\n", __func__);
+		goto rx_dropped;
+	}
+	if (skb->len < 10) {
+		printk(KERN_INFO "%s: SKB length < 10 \n", __func__);
+		goto rx_dropped;
+	}
+
+	switch(ieee->iw_mode){
+		case IW_MODE_ADHOC:
+		case IW_MODE_INFRA:
+			ret = rtllib_rx_InfraAdhoc(ieee, skb, rx_stats);
+			break;
+		case IW_MODE_MASTER:
+		case IW_MODE_REPEAT:	
+			ret = rtllib_rx_Master(ieee, skb, rx_stats);
+			break;
+		case IW_MODE_MONITOR:
+			ret = rtllib_rx_Monitor(ieee, skb, rx_stats);
+			break;
+		case IW_MODE_MESH:
+			ret = rtllib_rx_Mesh(ieee, skb, rx_stats);
+			break;
+		default:
+			printk(KERN_INFO"%s: ERR iw mode!!!\n", __func__);
+			break;
+	}
+
+	return ret;	
+	
+ rx_dropped:
+	ieee->stats.rx_dropped++;
+	return 0;
+}
+#else
+int rtllib_rx(struct rtllib_device *ieee, struct sk_buff *skb,
+		 struct rtllib_rx_stats *rx_stats)
+{
+	struct net_device *dev = ieee->dev;
+	struct rtllib_hdr_4addr *hdr;
+	size_t hdrlen;
+	u16 fc, type, stype, sc;
+	struct net_device_stats *stats = NULL;
+	unsigned int frag;
+	u8 *payload;
+	u16 ethertype;
+	u8	TID = 0;
+	u16	SeqNum = 0;
+	PRX_TS_RECORD pTS = NULL;
+#ifdef NOT_YET
+	struct net_device *wds = NULL;
+	struct sk_buff *skb2 = NULL;
+	struct net_device *wds = NULL;
+	int frame_authorized = 0;
+	int from_assoc_ap = 0;
+	void *sta = NULL;
+#endif
+	u8 dst[ETH_ALEN];
+	u8 src[ETH_ALEN];
+	u8 bssid[ETH_ALEN] = {0};
+	u8 zero_addr[ETH_ALEN] = {0};
+	struct rtllib_crypt_data *crypt = NULL;
+	int keyidx = 0;
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
+	struct sta_info * psta = NULL;
+#endif
+	bool unicast_packet = false;
+	int i;
+	struct rtllib_rxb* rxb = NULL;
+	int multicast = 0;
+	bool tmp_dump = false;
+#if defined _RTL8192_EXT_PATCH_ 
+	int ret = 0;
+#endif
+	bool bToOtherSTA = false;
+#if defined (RTL8192S_WAPI_SUPPORT)
+	u8	wapiDectResult = 0;
+#endif
+	hdr = (struct rtllib_hdr_4addr *)skb->data;
+	stats = &ieee->stats;
+
+	multicast = is_multicast_ether_addr(hdr->addr1)|is_broadcast_ether_addr(hdr->addr1);
+	if (!multicast && (compare_ether_addr(dev->dev_addr, hdr->addr1) != 0)) {
+		if ((ieee->iw_mode == IW_MODE_MONITOR) || ieee->bNetPromiscuousMode){
+			bToOtherSTA = true;
+		}else{
+			goto rx_dropped;
+		}
+	}
+
+	fc = le16_to_cpu(hdr->frame_ctl);
+	type = WLAN_FC_GET_TYPE(fc);
+	stype = WLAN_FC_GET_STYPE(fc);
+	sc = le16_to_cpu(hdr->seq_ctl);
+	frag = WLAN_GET_SEQ_FRAG(sc);
+
+	ieee->need_sw_enc = 0;
+
+	hdrlen = rtllib_get_hdrlen(fc);
+	if(skb->len < hdrlen){
+		printk("%s():ERR!!! skb->len is smaller than hdrlen\n",__FUNCTION__);
+		goto rx_dropped;
+	}
+	
+	if (HTCCheck(ieee, skb->data)) {
+		if(net_ratelimit())
+			printk("find HTCControl\n");
+		hdrlen += 4;
+		rx_stats->bContainHTC = 1;
+	} 
+ 	if(RTLLIB_QOS_HAS_SEQ(fc))
+		rx_stats->bIsQosData = 1;
+  	if ((0) && (type == RTLLIB_FTYPE_DATA) && ((is_broadcast_ether_addr(hdr->addr1)) || (compare_ether_addr(dev->dev_addr, hdr->addr1) == 0))) {
+		printk("===>RX data before decrypt\n"); 
+		tmp_dump = true;
+		dump_buf(skb->data,skb->len);
+	}
+#ifdef NOT_YET
+	hostap_update_rx_stats(local->ap, hdr, rx_stats);
+#endif
+
+#ifndef _RTL8192_EXT_PATCH_
+#if defined (RTL8192S_WAPI_SUPPORT)
+	if (ieee->host_decrypt && (!ieee->wapiInfo.bWapiEnable))
+#else
+	if (ieee->host_decrypt)
+#endif
+	{
+		int idx = 0;
+		if (skb->len >= hdrlen + 3)
+			idx = skb->data[hdrlen + 3] >> 6;
+		crypt = ieee->crypt[idx];
+#ifdef NOT_YET
+		sta = NULL;
+
+		/* Use station specific key to override default keys if the
+		 * receiver address is a unicast address ("individual RA"). If
+		 * bcrx_sta_key parameter is set, station specific key is used
+		 * even with broad/multicast targets (this is against IEEE
+		 * 802.11, but makes it easier to use different keys with
+		 * stations that do not support WEP key mapping). */
+
+		if (!(hdr->addr1[0] & 0x01) || local->bcrx_sta_key)
+			(void) hostap_handle_sta_crypto(local, hdr, &crypt,
+							&sta);
+#endif
+
+		/* allow NULL decrypt to indicate an station specific override
+		 * for default encryption */
+		if (crypt && (crypt->ops == NULL ||
+			      crypt->ops->decrypt_mpdu == NULL))
+			crypt = NULL;
+
+		if (!crypt && (fc & RTLLIB_FCTL_WEP)) {
+			/* This seems to be triggered by some (multicast?)
+			 * frames from other than current BSS, so just drop the
+			 * frames silently instead of filling system log with
+			 * these reports. */
+			RTLLIB_DEBUG_DROP("Decryption failed (not set)"
+					     " (SA=" MAC_FMT ")\n",
+					     MAC_ARG(hdr->addr2));
+			ieee->ieee_stats.rx_discards_undecryptable++;
+			goto rx_dropped;
+		}
+	}
+#endif
+
+	if (skb->len < RTLLIB_DATA_HDR3_LEN)
+		goto rx_dropped;
+
+#ifdef _RTL8192_EXT_PATCH_
+	if( (ieee->pHTInfo->bCurRxReorderEnable == false) || 
+		!ieee->current_network.qos_data.active|| 
+		!IsDataFrame(skb->data) || 
+		IsLegacyDataFrame(skb->data) || 
+		multicast) {
+		if (!multicast) {
+			if (is_duplicate_packet(ieee, hdr)){
+				goto rx_dropped;
+			}
+		}
+	}
+#else
+	if( (ieee->pHTInfo->bCurRxReorderEnable == false) || 
+		!ieee->current_network.qos_data.active || 
+		!IsDataFrame(skb->data) || 
+		IsLegacyDataFrame(skb->data)) {
+		if(!((type == RTLLIB_FTYPE_MGMT) && (stype == RTLLIB_STYPE_BEACON))){
+			if (is_duplicate_packet(ieee, hdr)){
+				goto rx_dropped;
+			}
+		}
+	}
+#endif
+	else {
+		PRX_TS_RECORD pRxTS = NULL;
+		if (GetTs(ieee, (PTS_COMMON_INFO*) &pRxTS, hdr->addr2, 
+			(u8)Frame_QoSTID((u8*)(skb->data)), RX_DIR, true)) {
+			if ((fc & (1<<11)) && (frag == pRxTS->RxLastFragNum) && 
+			    (WLAN_GET_SEQ_SEQ(sc) == pRxTS->RxLastSeqNum)) {
+				goto rx_dropped;
+			} else {
+				pRxTS->RxLastFragNum = frag;
+				pRxTS->RxLastSeqNum = WLAN_GET_SEQ_SEQ(sc);
+			}
+		} else {
+			RTLLIB_DEBUG(RTLLIB_DL_ERR, "ERR!!%s(): No TS!! Skip the check!!\n",__FUNCTION__);
+			goto rx_dropped;
+		}
+	}
+#ifdef _RTL8192_EXT_PATCH_
+	if((ieee->iw_mode == IW_MODE_MESH) && ieee->ext_patch_rtllib_rx_mgt_update_expire)
+		ieee->ext_patch_rtllib_rx_mgt_update_expire( ieee, skb );
+#endif
+	if (type == RTLLIB_FTYPE_MGMT) {
+		if (bToOtherSTA){
+			goto rx_dropped;
+		}		
+		if (rtllib_rx_frame_mgmt(ieee, skb, rx_stats, type, stype))
+			goto rx_dropped;
+		else
+			goto rx_exit;
+	}
+	if (type == RTLLIB_FTYPE_CTL) {
+		goto rx_dropped;
+	}
+#if defined (RTL8192S_WAPI_SUPPORT)
+	if(ieee->WapiSupport && ieee->wapiInfo.bWapiEnable){
+		wapiDectResult = SecIsWAIPacket(ieee, skb);
+		if(wapiDectResult !=0){
+			if(memcmp(&ieee->wapiInfo.wapiSeqnumAndFragNum,&sc,2))
+				WapiHandleRecvPacket(ieee, skb, wapiDectResult);
+			memcpy(&ieee->wapiInfo.wapiSeqnumAndFragNum,&sc,2);
+			dev_kfree_skb_any(skb);
+			goto rx_exit;
+		}
+	}
+#endif	
+	/* Data frame - extract src/dst addresses */
+	switch (fc & (RTLLIB_FCTL_FROMDS | RTLLIB_FCTL_TODS)) {
+	case RTLLIB_FCTL_FROMDS:
+		memcpy(dst, hdr->addr1, ETH_ALEN);
+		memcpy(src, hdr->addr3, ETH_ALEN);
+		memcpy(bssid, hdr->addr2, ETH_ALEN);
+		break;
+	case RTLLIB_FCTL_TODS:
+		memcpy(dst, hdr->addr3, ETH_ALEN);
+		memcpy(src, hdr->addr2, ETH_ALEN);
+		memcpy(bssid, hdr->addr1, ETH_ALEN);
+		break;
+	case RTLLIB_FCTL_FROMDS | RTLLIB_FCTL_TODS:
+		if (skb->len < RTLLIB_DATA_HDR4_LEN)
+			goto rx_dropped;
+		memcpy(dst, hdr->addr3, ETH_ALEN);
+		memcpy(src, hdr->addr4, ETH_ALEN);
+#ifdef _RTL8192_EXT_PATCH_
+		memcpy(bssid, ieee->current_mesh_network.bssid, ETH_ALEN);
+#else
+		memcpy(bssid, ieee->current_network.bssid, ETH_ALEN);
+#endif
+		break;
+	case 0:
+		memcpy(dst, hdr->addr1, ETH_ALEN);
+		memcpy(src, hdr->addr2, ETH_ALEN);
+		memcpy(bssid, hdr->addr3, ETH_ALEN);
+		break;
+	}
+
+	/* Filter frames from different BSS */
+	if ((type != RTLLIB_FTYPE_CTL) && ((fc & RTLLIB_FCTL_DSTODS) != RTLLIB_FCTL_DSTODS)
+                && (compare_ether_addr(ieee->current_network.bssid, bssid) != 0) && memcmp(ieee->current_network.bssid, zero_addr, ETH_ALEN)) {
+		goto rx_dropped;
+	}
+
+	/* Filter packets sent by an STA that will be forwarded by AP */
+	if ( ieee->IntelPromiscuousModeInfo.bPromiscuousOn  &&
+                ieee->IntelPromiscuousModeInfo.bFilterSourceStationFrame ) {
+		if ((fc & RTLLIB_FCTL_TODS) && !(fc & RTLLIB_FCTL_FROMDS) &&
+			(compare_ether_addr(dst, ieee->current_network.bssid) != 0) &&	   
+			(compare_ether_addr(bssid, ieee->current_network.bssid) == 0)) {   
+			goto rx_dropped;
+		}
+	}
+
+#ifdef NOT_YET
+	if (hostap_rx_frame_wds(ieee, hdr, fc, &wds))
+		goto rx_dropped;
+	if (wds) {
+		skb->dev = dev = wds;
+		stats = hostap_get_stats(dev);
+	}
+
+	if (ieee->iw_mode == IW_MODE_MASTER && !wds &&
+	    (fc & (RTLLIB_FCTL_TODS | RTLLIB_FCTL_FROMDS)) == RTLLIB_FCTL_FROMDS &&
+	    ieee->stadev &&
+	    memcmp(hdr->addr2, ieee->assoc_ap_addr, ETH_ALEN) == 0) {
+		/* Frame from BSSID of the AP for which we are a client */
+		skb->dev = dev = ieee->stadev;
+		stats = hostap_get_stats(dev);
+		from_assoc_ap = 1;
+	}
+#endif
+
+	dev->last_rx = jiffies;
+
+#ifdef NOT_YET
+	if ((ieee->iw_mode == IW_MODE_MASTER ||
+	     ieee->iw_mode == IW_MODE_REPEAT) &&
+	    !from_assoc_ap) {
+		switch (hostap_handle_sta_rx(ieee, dev, skb, rx_stats,
+					     wds != NULL)) {
+		case AP_RX_CONTINUE_NOT_AUTHORIZED:
+			frame_authorized = 0;
+			break;
+		case AP_RX_CONTINUE:
+			frame_authorized = 1;
+			break;
+		case AP_RX_DROP:
+			goto rx_dropped;
+		case AP_RX_EXIT:
+			goto rx_exit;
+		}
+	}
+#endif
+	/* Nullfunc frames may have PS-bit set, so they must be passed to
+	 * hostap_handle_sta_rx() before being dropped here. */
+	if (stype != RTLLIB_STYPE_DATA &&
+	    stype != RTLLIB_STYPE_DATA_CFACK &&
+	    stype != RTLLIB_STYPE_DATA_CFPOLL &&
+	    stype != RTLLIB_STYPE_DATA_CFACKPOLL&&
+	    stype != RTLLIB_STYPE_QOS_DATA
+	    ) {
+		if (stype != RTLLIB_STYPE_NULLFUNC)
+			RTLLIB_DEBUG_DROP(
+				"RX: dropped data frame "
+				"with no data (type=0x%02x, "
+				"subtype=0x%02x, len=%d)\n",
+				type, stype, skb->len);
+		goto rx_dropped;
+	}
+
+	if(skb->len == hdrlen){
+		goto rx_dropped;
+	}
+	
+#ifdef _RTL8192_EXT_PATCH_
+	if(ieee->iw_mode == IW_MODE_MESH) {
+		/* check whether it exists the mesh entry for data packet */
+		if(ieee->ext_patch_rtllib_is_mesh&&\
+				(false ==ieee->ext_patch_rtllib_is_mesh(ieee,hdr->addr2))) {
+			if(ieee->only_mesh) {
+				goto rx_dropped;
+			} else if(memcmp(bssid, ieee->current_network.bssid, ETH_ALEN)) {   
+				goto rx_dropped;
+			}
+		} 
+	} else
+#endif
+	{
+#if 0		
+		/* check bssid under none mesh mode */
+		if (memcmp(bssid, ieee->current_network.bssid, ETH_ALEN)) {
+			goto rx_dropped;
+		}
+#endif
+		/* network filter more precisely */
+		switch (ieee->iw_mode) {
+			case IW_MODE_ADHOC:
+				/* packets from our adapter are dropped (echo) */
+				if (!memcmp(hdr->addr2, dev->dev_addr, ETH_ALEN))
+					goto rx_dropped;
+
+				/* {broad,multi}cast packets to our BSSID go through */
+				if (is_multicast_ether_addr(hdr->addr1)) {
+					if(!memcmp(hdr->addr3, ieee->current_network.bssid, ETH_ALEN))
+						break;
+					else
+						goto rx_dropped;
+				} 
+
+				/* packets not to our adapter, just discard it */
+				if (memcmp(hdr->addr1, dev->dev_addr, ETH_ALEN)) {
+					if (bToOtherSTA)
+						break;
+					else	 
+						goto rx_dropped;
+				}
+
+				break;
+
+			case IW_MODE_INFRA:     
+				/* packets from our adapter are dropped (echo) */
+				if (!memcmp(hdr->addr3, dev->dev_addr, ETH_ALEN))
+					goto rx_dropped;
+
+				/* {broad,multi}cast packets to our BSS go through */
+				if (is_multicast_ether_addr(hdr->addr1)) {
+					if (!memcmp(hdr->addr2, ieee->current_network.bssid, ETH_ALEN)) {
+						break;
+					} else {
+						goto rx_dropped;
+					}
+				}
+
+				/* packets to our adapter go through */
+				if (memcmp(hdr->addr1, dev->dev_addr, ETH_ALEN)) {
+					if (bToOtherSTA)        
+						break;
+					else
+						goto rx_dropped;
+				}
+
+				break;
+		}
+
+
+	}
+
+#ifdef ENABLE_LPS
+	if ((ieee->iw_mode == IW_MODE_INFRA)  && (ieee->sta_sleep == 1) 
+		&& (ieee->polling)) {
+		if (WLAN_FC_MORE_DATA(fc)) {
+			/* more data bit is set, let's request a new frame from the AP */
+			rtllib_sta_ps_send_pspoll_frame(ieee);
+		} else {
+			ieee->polling =  false;
+		}
+	}
+#endif
+
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
+	if(ieee->iw_mode == IW_MODE_ADHOC){
+		psta = GetStaInfo(ieee, src);
+		if(NULL != psta)
+			psta->LastActiveTime = jiffies;
+	}
+#endif
+	/* skb: hdr + (possibly fragmented, possibly encrypted) payload */
+#ifdef _RTL8192_EXT_PATCH_
+#if defined (RTL8192S_WAPI_SUPPORT)
+	if (ieee->host_decrypt && (!ieee->wapiInfo.bWapiEnable))
+#else
+	if (ieee->host_decrypt)
+#endif
+	{
+
+		int idx = 0;
+		if (skb->len >= hdrlen + 3)
+			idx = skb->data[hdrlen + 3] >> 6;
+		if (ieee->iw_mode == IW_MODE_MESH) 
+		{
+			if (ieee->mesh_sec_type == 1) { 
+				if(ieee->mesh_security_setting==1 ||ieee->mesh_security_setting==3)
+				{
+					bool find_crypt = false;
+					i = rtllib_find_MP(ieee, hdr->addr2, 0);
+					if(is_multicast_ether_addr(((struct rtllib_hdr_3addr*)skb->data)->addr1) || is_broadcast_ether_addr(((struct rtllib_hdr_3addr*)skb->data)->addr1))
+					{
+						if(ieee->only_mesh){
+							if(i != -1){
+								i=0;
+							}else{
+								printk("err find crypt\n");
+								goto rx_dropped;
+							}
+						}else{
+							if(i != -1){
+								i=0;
+							}else{
+								find_crypt = true;
+								crypt = ieee->sta_crypt[idx];
+							}
+						}
+					}else{
+						if(ieee->only_mesh){
+							if (i != -1){
+							}else{
+								printk("err find crypt\n");
+								goto rx_dropped;
+							}
+						}else{
+							if (i != -1){
+							}else{
+								find_crypt = true;
+								crypt = ieee->sta_crypt[idx];
+							}
+						}
+					}
+					if(find_crypt == false){
+						if(ieee->cryptlist[i] == NULL)
+							goto rx_dropped;
+						else
+							crypt = ieee->cryptlist[i]->crypt[idx];
+					}
+				}
+			}
+			else {
+			crypt = ieee->cryptlist[0]->crypt[idx];
+			if(crypt)
+			{
+				int i = rtllib_find_MP(ieee, hdr->addr2, 0);
+				if(ieee->only_mesh)
+				{
+					if (i == -1)
+					{
+						printk("error find entry in entry list\n");
+						goto rx_dropped;
+					}
+					if (ieee->cryptlist[i]&&ieee->cryptlist[i]->crypt[idx])
+						crypt = ieee->cryptlist[i]->crypt[idx];
+
+					else
+						crypt = NULL;
+				}
+				else 
+				{
+					if(i != -1)
+					{
+						if (ieee->cryptlist[i]&&ieee->cryptlist[i]->crypt[idx])
+							crypt = ieee->cryptlist[i]->crypt[idx];
+						else
+							crypt = NULL;
+					}
+					else
+						crypt = ieee->sta_crypt[idx];
+
+				}
+			}
+			else
+			{
+				if(!ieee->ext_patch_rtllib_is_mesh(ieee,hdr->addr2))	
+					crypt = ieee->sta_crypt[idx];
+			}
+		}
+		}
+		else 
+			crypt = ieee->sta_crypt[idx];
+#ifdef NOT_YET
+		sta = NULL;
+
+		/* Use station specific key to override default keys if the
+		 * receiver address is a unicast address ("individual RA"). If
+		 * bcrx_sta_key parameter is set, station specific key is used
+		 * even with broad/multicast targets (this is against IEEE
+		 * 802.11, but makes it easier to use different keys with
+		 * stations that do not support WEP key mapping). */
+
+		if (!(hdr->addr1[0] & 0x01) || local->bcrx_sta_key)
+			(void) hostap_handle_sta_crypto(local, hdr, &crypt,
+							&sta);
+#endif
+
+		/* allow NULL decrypt to indicate an station specific override
+		 * for default encryption */
+		if (crypt && (crypt->ops == NULL ||
+			      crypt->ops->decrypt_mpdu == NULL))
+			crypt = NULL;
+
+		if (!crypt && (fc & RTLLIB_FCTL_WEP)) {
+			/* This seems to be triggered by some (multicast?)
+			 * frames from other than current BSS, so just drop the
+			 * frames silently instead of filling system log with
+			 * these reports. */
+			RTLLIB_DEBUG_DROP("Decryption failed (not set)"
+					     " (SA=" MAC_FMT ")\n",
+					     MAC_ARG(hdr->addr2));
+			ieee->ieee_stats.rx_discards_undecryptable++;
+			goto rx_dropped;
+		}
+	}
+#endif
+	if((!rx_stats->Decrypted)){
+		ieee->need_sw_enc = 1;
+	}
+
+	if (ieee->host_decrypt && (fc & RTLLIB_FCTL_WEP) &&
+	    ((keyidx = rtllib_rx_frame_decrypt(ieee, skb, crypt)) < 0) 
+#if defined (RTL8192S_WAPI_SUPPORT)
+	    && (!ieee->wapiInfo.bWapiEnable)
+#endif
+	    )
+	{
+		printk("decrypt frame error\n");
+		goto rx_dropped;
+	}
+	if (tmp_dump) {
+		printk("************after decrypt\n");
+		dump_buf(skb->data,skb->len);
+	}
+#if defined (RTL8192S_WAPI_SUPPORT)
+	if(ieee->wapiInfo.bWapiEnable){
+		if(ieee->pairwise_key_type == KEY_TYPE_SMS4){
+			if(false == SecSWSMS4Decryption(ieee, skb, rx_stats)){
+				WAPI_TRACE(WAPI_ERR, "%s():SMS4 decrypt frame error\n",__FUNCTION__);
+				goto rx_dropped;
+			}
+		}
+	}
+#endif
+	hdr = (struct rtllib_hdr_4addr *) skb->data;
+
+	/* skb: hdr + (possibly fragmented) plaintext payload */
+	if ((frag != 0 || (fc & RTLLIB_FCTL_MOREFRAGS))) {
+		int flen;
+		struct sk_buff *frag_skb = rtllib_frag_cache_get(ieee, hdr);
+		RTLLIB_DEBUG_FRAG("Rx Fragment received (%u)\n", frag);
+
+		if (!frag_skb) {
+			RTLLIB_DEBUG(RTLLIB_DL_RX | RTLLIB_DL_FRAG,
+					"Rx cannot get skb from fragment "
+					"cache (morefrag=%d seq=%u frag=%u)\n",
+					(fc & RTLLIB_FCTL_MOREFRAGS) != 0,
+					WLAN_GET_SEQ_SEQ(sc), frag);
+			goto rx_dropped;
+		}
+		flen = skb->len;
+		if (frag != 0)
+			flen -= hdrlen;
+
+		if (frag_skb->tail + flen > frag_skb->end) {
+			printk(KERN_WARNING "%s: host decrypted and "
+			       "reassembled frame did not fit skb\n",
+			       dev->name);
+			rtllib_frag_cache_invalidate(ieee, hdr);
+			goto rx_dropped;
+		}
+
+		if (frag == 0) {
+			/* copy first fragment (including full headers) into
+			 * beginning of the fragment cache skb */
+			memcpy(skb_put(frag_skb, flen), skb->data, flen);
+		} else {
+			/* append frame payload to the end of the fragment
+			 * cache skb */
+			memcpy(skb_put(frag_skb, flen), skb->data + hdrlen,
+			       flen);
+		}
+		dev_kfree_skb_any(skb);
+		skb = NULL;
+
+		if (fc & RTLLIB_FCTL_MOREFRAGS) {
+			/* more fragments expected - leave the skb in fragment
+			 * cache for now; it will be delivered to upper layers
+			 * after all fragments have been received */
+			goto rx_exit;
+		}
+
+		/* this was the last fragment and the frame will be
+		 * delivered, so remove skb from fragment cache */
+		skb = frag_skb;
+		hdr = (struct rtllib_hdr_4addr *) skb->data;
+		rtllib_frag_cache_invalidate(ieee, hdr);
+	}
+
+	/* skb: hdr + (possible reassembled) full MSDU payload; possibly still
+	 * encrypted/authenticated */
+	if (ieee->host_decrypt && (fc & RTLLIB_FCTL_WEP) && 
+#if defined (RTL8192S_WAPI_SUPPORT)
+		(!ieee->wapiInfo.bWapiEnable) &&
+#endif		
+	    	rtllib_rx_frame_decrypt_msdu(ieee, skb, keyidx, crypt))
+	{
+		printk("==>decrypt msdu error\n");
+		goto rx_dropped;
+	}
+
+	ieee->LinkDetectInfo.NumRecvDataInPeriod++;
+	ieee->LinkDetectInfo.NumRxOkInPeriod++;
+	
+	hdr = (struct rtllib_hdr_4addr *) skb->data;
+	if((!is_multicast_ether_addr(hdr->addr1)) && (!is_broadcast_ether_addr(hdr->addr1)))
+		unicast_packet = true;
+	if (crypt && !(fc & RTLLIB_FCTL_WEP) && !ieee->open_wep) {
+		if (/*ieee->ieee802_1x &&*/
+		    rtllib_is_eapol_frame(ieee, skb, hdrlen)) {
+
+#ifdef CONFIG_RTLLIB_DEBUG
+			/* pass unencrypted EAPOL frames even if encryption is
+			 * configured */
+			struct eapol *eap = (struct eapol *)(skb->data +
+				24);
+			RTLLIB_DEBUG_EAP("RX: IEEE 802.1X EAPOL frame: %s\n",
+						eap_get_type(eap->type));
+#endif
+		} else {
+			RTLLIB_DEBUG_DROP(
+				"encryption configured, but RX "
+				"frame not encrypted (SA=" MAC_FMT ")\n",
+				MAC_ARG(hdr->addr2));
+			goto rx_dropped;
+		}
+	} 
+
+#ifdef CONFIG_RTLLIB_DEBUG
+	if (crypt && !(fc & RTLLIB_FCTL_WEP) &&
+	    rtllib_is_eapol_frame(ieee, skb, hdrlen)) {
+			struct eapol *eap = (struct eapol *)(skb->data +
+				24);
+			RTLLIB_DEBUG_EAP("RX: IEEE 802.1X EAPOL frame: %s\n",
+						eap_get_type(eap->type));
+	}
+#endif
+
+	if (crypt && !(fc & RTLLIB_FCTL_WEP) && !ieee->open_wep &&
+	    !rtllib_is_eapol_frame(ieee, skb, hdrlen)) {
+		RTLLIB_DEBUG_DROP(
+			"dropped unencrypted RX data "
+			"frame from " MAC_FMT
+			" (drop_unencrypted=1)\n",
+			MAC_ARG(hdr->addr2));
+		goto rx_dropped;
+	}
+/*
+	if(rtllib_is_eapol_frame(ieee, skb, hdrlen)) {
+		printk(KERN_WARNING "RX: IEEE802.1X EPAOL frame!\n");
+	}
+*/
+	if(ieee->current_network.qos_data.active && IsQoSDataFrame(skb->data) 
+		&& !is_multicast_ether_addr(hdr->addr1) && !is_broadcast_ether_addr(hdr->addr1))
+	{
+		TID = Frame_QoSTID(skb->data);
+		SeqNum = WLAN_GET_SEQ_SEQ(sc);
+		GetTs(ieee,(PTS_COMMON_INFO*) &pTS,hdr->addr2,TID,RX_DIR,true);
+		if(TID !=0 && TID !=3){
+			ieee->bis_any_nonbepkts = true;
+		}
+	}
+#ifdef _RTL8192_EXT_PATCH_
+	if((fc & (WIFI_MESH_TYPE | RTLLIB_FCTL_FROMDS | RTLLIB_FCTL_TODS))
+		== (WIFI_MESH_TYPE | RTLLIB_FCTL_FROMDS | RTLLIB_FCTL_TODS))
+	{
+		if(ieee->iw_mode == IW_MODE_MESH){
+			rxb = (struct rtllib_rxb*)kmalloc(sizeof(struct rtllib_rxb),GFP_ATOMIC);
+			if(rxb == NULL)
+			{
+				printk("%s(): kmalloc rxb error\n",__FUNCTION__);
+				goto rx_dropped;
+			}
+			memset(rxb, 0, sizeof(struct rtllib_rxb));
+			if(msh_parse_subframe(ieee, skb, rxb)==0){
+				/* only to free rxb, and not submit the packets to upper layer */
+				for(i =0; i < rxb->nr_subframes; i++) {
+					if(rxb->subframes[i])
+						dev_kfree_skb(rxb->subframes[i]);
+				}
+				kfree(rxb);
+				rxb = NULL;
+				goto rx_dropped;
+			}
+			ret = msh_rx_process_dataframe(ieee,rxb,rx_stats);
+			if(ret < 0) {
+				for(i =0; i < rxb->nr_subframes; i++) {
+					if(rxb->subframes[i])
+						dev_kfree_skb(rxb->subframes[i]);
+				}
+				kfree(rxb);
+				rxb = NULL;
+				goto rx_dropped;
+			}else{
+				kfree(rxb);
+				rxb = NULL;
+			}
+		}else
+			goto rx_dropped;
+	}else{
+#endif
+		/* skb: hdr + (possible reassembled) full plaintext payload */
+		payload = skb->data + hdrlen;
+		rxb = (struct rtllib_rxb*)kmalloc(sizeof(struct rtllib_rxb),GFP_ATOMIC);
+		if(rxb == NULL)
+		{
+			RTLLIB_DEBUG(RTLLIB_DL_ERR,"%s(): kmalloc rxb error\n",__FUNCTION__);
+			goto rx_dropped;
+		}
+		/* to parse amsdu packets */
+		/* qos data packets & reserved bit is 1 */
+		if(parse_subframe(ieee,skb,rx_stats,rxb,src,dst) == 0) {
+			/* only to free rxb, and not submit the packets to upper layer */
+			for(i =0; i < rxb->nr_subframes; i++) {
+				dev_kfree_skb(rxb->subframes[i]);
+			}
+			kfree(rxb);
+			rxb = NULL;
+			goto rx_dropped;
+		}
+#ifdef RTL8192S_WAPI_SUPPORT
+		if(ieee->wapiInfo.bWapiEnable){
+			if(rxb){
+				rxb->UserPriority = TID;
+				memcpy(rxb->WapiTempPN, rx_stats->WapiTempPN, 16);
+				memcpy(rxb->WapiSrcAddr, rx_stats->WapiSrcAddr, 6);
+				rxb->bWapiCheckPNInDecrypt = rx_stats->bWapiCheckPNInDecrypt;
+			}
+		}
+#endif
+#if !defined(RTL8192SU) && !defined(RTL8192U) 
+#ifdef ENABLE_LPS
+		if(unicast_packet)
+		{
+			if (type == RTLLIB_FTYPE_DATA)
+			{
+				
+				if(ieee->bIsAggregateFrame)
+					ieee->LinkDetectInfo.NumRxUnicastOkInPeriod+=rxb->nr_subframes;
+				else
+					ieee->LinkDetectInfo.NumRxUnicastOkInPeriod++;
+				
+				if((ieee->state == RTLLIB_LINKED) /*&& !MgntInitAdapterInProgress(pMgntInfo)*/)
+				{
+					if(	((ieee->LinkDetectInfo.NumRxUnicastOkInPeriod +ieee->LinkDetectInfo.NumTxOkInPeriod) > 8 ) ||
+						(ieee->LinkDetectInfo.NumRxUnicastOkInPeriod > 2) )
+					{
+						if(ieee->LeisurePSLeave)
+							ieee->LeisurePSLeave(dev);
+					}
+				}
+			}
+		}	
+#endif
+#endif
+		ieee->last_rx_ps_time = jiffies;
+		if(ieee->pHTInfo->bCurRxReorderEnable == false ||pTS == NULL || bToOtherSTA ){
+			for(i = 0; i<rxb->nr_subframes; i++) {
+				struct sk_buff *sub_skb = rxb->subframes[i];
+
+				if (sub_skb) {
+					/* convert hdr + possible LLC headers into Ethernet header */
+					ethertype = (sub_skb->data[6] << 8) | sub_skb->data[7];
+					if (sub_skb->len >= 8 &&
+							((memcmp(sub_skb->data, rfc1042_header, SNAP_SIZE) == 0 &&
+							  ethertype != ETH_P_AARP && ethertype != ETH_P_IPX) ||
+							 memcmp(sub_skb->data, bridge_tunnel_header, SNAP_SIZE) == 0)) {
+						/* remove RFC1042 or Bridge-Tunnel encapsulation and
+						 * replace EtherType */
+						skb_pull(sub_skb, SNAP_SIZE);
+						memcpy(skb_push(sub_skb, ETH_ALEN), src, ETH_ALEN);
+						memcpy(skb_push(sub_skb, ETH_ALEN), dst, ETH_ALEN);
+					} else {
+						u16 len;
+						/* Leave Ethernet header part of hdr and full payload */
+						len = htons(sub_skb->len);
+						memcpy(skb_push(sub_skb, 2), &len, 2);
+						memcpy(skb_push(sub_skb, ETH_ALEN), src, ETH_ALEN);
+						memcpy(skb_push(sub_skb, ETH_ALEN), dst, ETH_ALEN);
+					}
+
+					stats->rx_packets++;
+					stats->rx_bytes += sub_skb->len;
+
+					if(is_multicast_ether_addr(dst)) {
+						stats->multicast++;
+					}
+
+					/* Indicat the packets to upper layer */
+					memset(sub_skb->cb, 0, sizeof(sub_skb->cb));
+#ifdef _RTL8192_EXT_PATCH_
+					sub_skb->protocol = eth_type_trans(sub_skb, sub_skb->dev);
+#else
+					sub_skb->protocol = eth_type_trans(sub_skb, dev);
+					sub_skb->dev = dev;
+#endif
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18))
+					sub_skb->dev->stats.rx_packets++;
+					sub_skb->dev->stats.rx_bytes += sub_skb->len;	
+#endif
+#ifdef TCP_CSUM_OFFLOAD_RX
+					if ( rx_stats->tcp_csum_valid)
+						sub_skb->ip_summed = CHECKSUM_UNNECESSARY;
+					else
+						sub_skb->ip_summed = CHECKSUM_NONE;
+#else
+					sub_skb->ip_summed = CHECKSUM_NONE; /* 802.11 crc not sufficient */
+#endif				
+
+					netif_rx(sub_skb);
+				}
+			}
+			kfree(rxb);
+			rxb = NULL;
+
+		}
+		else
+		{
+			RTLLIB_DEBUG(RTLLIB_DL_REORDER,"%s(): REORDER ENABLE AND PTS not NULL, and we will enter RxReorderIndicatePacket()\n",__FUNCTION__);		
+#ifdef TCP_CSUM_OFFLOAD_RX
+			rxb->tcp_csum_valid = rx_stats->tcp_csum_valid;
+#endif		
+			RxReorderIndicatePacket(ieee, rxb, pTS, SeqNum);
+		}
+#ifdef _RTL8192_EXT_PATCH_
+	}
+#endif	
+#ifndef JOHN_NOCPY
+	dev_kfree_skb(skb);
+#endif
+
+ rx_exit:
+#ifdef NOT_YET
+	if (sta)
+		hostap_handle_sta_release(sta);
+#endif
+	return 1;
+
+ rx_dropped:
+	if (rxb != NULL)
+	{
+		kfree(rxb);
+		rxb = NULL;
+	}		
+	stats->rx_dropped++;
+
+	/* Returning 0 indicates to caller that we have not handled the SKB--
+	 * so it is still allocated and can be used again by underlying
+	 * hardware as a DMA target */
+	return 0;
+}
+#endif
+
+#define MGMT_FRAME_FIXED_PART_LENGTH            0x24
+
+static u8 qos_oui[QOS_OUI_LEN] = { 0x00, 0x50, 0xF2 };
+
+/*
+* Make ther structure we read from the beacon packet has
+* the right values
+*/
+static int rtllib_verify_qos_info(struct rtllib_qos_information_element
+                                     *info_element, int sub_type)
+{
+
+        if (info_element->qui_subtype != sub_type)
+                return -1;
+        if (memcmp(info_element->qui, qos_oui, QOS_OUI_LEN))
+                return -1;
+        if (info_element->qui_type != QOS_OUI_TYPE)
+                return -1;
+        if (info_element->version != QOS_VERSION_1)
+                return -1;
+
+        return 0;
+}
+
+
+/*
+ * Parse a QoS parameter element
+ */
+static int rtllib_read_qos_param_element(struct rtllib_qos_parameter_info
+                                            *element_param, struct rtllib_info_element
+                                            *info_element)
+{
+        int ret = 0;
+        u16 size = sizeof(struct rtllib_qos_parameter_info) - 2;
+
+        if ((info_element == NULL) || (element_param == NULL))
+                return -1;
+
+        if (info_element->id == QOS_ELEMENT_ID && info_element->len == size) {
+                memcpy(element_param->info_element.qui, info_element->data,
+                       info_element->len);
+                element_param->info_element.elementID = info_element->id;
+                element_param->info_element.length = info_element->len;
+        } else
+                ret = -1;
+        if (ret == 0)
+                ret = rtllib_verify_qos_info(&element_param->info_element,
+                                                QOS_OUI_PARAM_SUB_TYPE);
+        return ret;
+}
+
+/*
+ * Parse a QoS information element
+ */
+static int rtllib_read_qos_info_element(struct
+                                           rtllib_qos_information_element
+                                           *element_info, struct rtllib_info_element
+                                           *info_element)
+{
+        int ret = 0;
+        u16 size = sizeof(struct rtllib_qos_information_element) - 2;
+
+        if (element_info == NULL)
+                return -1;
+        if (info_element == NULL)
+                return -1;
+
+        if ((info_element->id == QOS_ELEMENT_ID) && (info_element->len == size)) {
+                memcpy(element_info->qui, info_element->data,
+                       info_element->len);
+                element_info->elementID = info_element->id;
+                element_info->length = info_element->len;
+        } else
+                ret = -1;
+
+        if (ret == 0)
+                ret = rtllib_verify_qos_info(element_info,
+                                                QOS_OUI_INFO_SUB_TYPE);
+        return ret;
+}
+
+
+/*
+ * Write QoS parameters from the ac parameters.
+ */
+static int rtllib_qos_convert_ac_to_parameters(struct rtllib_qos_parameter_info *param_elm, 
+		struct rtllib_qos_data *qos_data)
+{
+        struct rtllib_qos_ac_parameter *ac_params;
+	struct rtllib_qos_parameters *qos_param = &(qos_data->parameters);
+        int rc = 0;
+        int i;
+	u8 aci;
+	u8 acm;
+
+	qos_data->wmm_acm = 0;
+        for (i = 0; i < QOS_QUEUE_NUM; i++) {
+                ac_params = &(param_elm->ac_params_record[i]);
+
+		aci = (ac_params->aci_aifsn & 0x60) >> 5;
+		acm = (ac_params->aci_aifsn & 0x10) >> 4;
+
+		if(aci >= QOS_QUEUE_NUM)
+			continue;
+		switch (aci) {
+			case 1:
+				/* BIT(0) | BIT(3) */
+				if (acm)
+					qos_data->wmm_acm |= (0x01<<0)|(0x01<<3);
+				break;
+			case 2: 
+				/* BIT(4) | BIT(5) */
+				if (acm)
+					qos_data->wmm_acm |= (0x01<<4)|(0x01<<5);
+				break;
+			case 3:
+				/* BIT(6) | BIT(7) */
+				if (acm)
+					qos_data->wmm_acm |= (0x01<<6)|(0x01<<7);
+				break;
+			case 0:
+			default:
+				/* BIT(1) | BIT(2) */
+				if (acm)
+					qos_data->wmm_acm |= (0x01<<1)|(0x01<<2);
+				break;
+		}
+
+                qos_param->aifs[aci] = (ac_params->aci_aifsn) & 0x0f;
+
+		/* WMM spec P.11: The minimum value for AIFSN shall be 2 */
+                qos_param->aifs[aci] = (qos_param->aifs[aci] < 2) ? 2:qos_param->aifs[aci]; 
+
+                qos_param->cw_min[aci] = ac_params->ecw_min_max & 0x0F;
+
+                qos_param->cw_max[aci] = (ac_params->ecw_min_max & 0xF0) >> 4;
+
+                qos_param->flag[aci] =
+                    (ac_params->aci_aifsn & 0x10) ? 0x01 : 0x00;
+                qos_param->tx_op_limit[aci] = le16_to_cpu(ac_params->tx_op_limit);
+        }
+        return rc;
+}
+
+/*
+ * we have a generic data element which it may contain QoS information or
+ * parameters element. check the information element length to decide
+ * which type to read
+ */
+static int rtllib_parse_qos_info_param_IE(struct rtllib_info_element
+                                             *info_element,
+                                             struct rtllib_network *network)
+{
+        int rc = 0;
+        struct rtllib_qos_information_element qos_info_element;
+
+        rc = rtllib_read_qos_info_element(&qos_info_element, info_element);
+
+        if (rc == 0) {
+                network->qos_data.param_count = qos_info_element.ac_info & 0x0F;
+                network->flags |= NETWORK_HAS_QOS_INFORMATION;
+        } else {
+                struct rtllib_qos_parameter_info param_element;
+
+                rc = rtllib_read_qos_param_element(&param_element,
+                                                      info_element);
+                if (rc == 0) {
+                        rtllib_qos_convert_ac_to_parameters(&param_element,
+                                                               &(network->qos_data));
+                        network->flags |= NETWORK_HAS_QOS_PARAMETERS;
+                        network->qos_data.param_count =
+                            param_element.info_element.ac_info & 0x0F;
+                }
+        }
+
+        if (rc == 0) {
+                RTLLIB_DEBUG_QOS("QoS is supported\n");
+                network->qos_data.supported = 1;
+        }
+        return rc;
+}
+
+#ifdef CONFIG_RTLLIB_DEBUG
+#define MFIE_STRING(x) case MFIE_TYPE_ ##x: return #x
+
+static const char *get_info_element_string(u16 id)
+{
+        switch (id) {
+                MFIE_STRING(SSID);
+                MFIE_STRING(RATES);
+                MFIE_STRING(FH_SET);
+                MFIE_STRING(DS_SET);
+                MFIE_STRING(CF_SET);
+                MFIE_STRING(TIM);
+                MFIE_STRING(IBSS_SET);
+                MFIE_STRING(COUNTRY);
+                MFIE_STRING(HOP_PARAMS);
+                MFIE_STRING(HOP_TABLE);
+                MFIE_STRING(REQUEST);
+                MFIE_STRING(CHALLENGE);
+                MFIE_STRING(POWER_CONSTRAINT);
+                MFIE_STRING(POWER_CAPABILITY);
+                MFIE_STRING(TPC_REQUEST);
+                MFIE_STRING(TPC_REPORT);
+                MFIE_STRING(SUPP_CHANNELS);
+                MFIE_STRING(CSA);
+                MFIE_STRING(MEASURE_REQUEST);
+                MFIE_STRING(MEASURE_REPORT);
+                MFIE_STRING(QUIET);
+                MFIE_STRING(IBSS_DFS);
+                MFIE_STRING(RSN);
+                MFIE_STRING(RATES_EX);
+                MFIE_STRING(GENERIC);
+                MFIE_STRING(QOS_PARAMETER);
+        default:
+                return "UNKNOWN";
+        }
+}
+#endif
+
+#ifdef ENABLE_DOT11D
+static inline void rtllib_extract_country_ie(
+	struct rtllib_device *ieee,
+	struct rtllib_info_element *info_element,
+	struct rtllib_network *network,
+	u8 * addr2)
+{
+	if (IS_DOT11D_ENABLE(ieee)) {
+		if(info_element->len!= 0) {
+			memcpy(network->CountryIeBuf, info_element->data, info_element->len);
+			network->CountryIeLen = info_element->len;
+
+			if(!IS_COUNTRY_IE_VALID(ieee))
+			{
+				if((rtllib_act_scanning(ieee,false) == true) && (ieee->FirstIe_InScan == 1))
+					printk("Received beacon ContryIE, SSID: <%s>\n",network->ssid);
+				Dot11d_UpdateCountryIe(ieee, addr2, info_element->len, info_element->data);
+			}
+		}
+
+		if (IS_EQUAL_CIE_SRC(ieee, addr2)) {
+			UPDATE_CIE_WATCHDOG(ieee);
+		}
+	}
+
+}
+#endif
+
+int rtllib_parse_info_param(struct rtllib_device *ieee,
+		struct rtllib_info_element *info_element, 
+		u16 length,
+		struct rtllib_network *network,
+		struct rtllib_rx_stats *stats)
+{
+	u8 i;
+	short offset;
+        u16	tmp_htcap_len=0;
+	u16	tmp_htinfo_len=0;
+	u16 ht_realtek_agg_len=0;
+	u8  ht_realtek_agg_buf[MAX_IE_LEN];
+#ifdef CONFIG_RTLLIB_DEBUG
+	char rates_str[64];
+	char *p;
+#endif
+#ifdef RTL8192S_WAPI_SUPPORT
+	u8 tmp_wapi_len = 0;
+#endif
+	while (length >= sizeof(*info_element)) {
+		if (sizeof(*info_element) + info_element->len > length) {
+			RTLLIB_DEBUG_MGMT("Info elem: parse failed: "
+					     "info_element->len + 2 > left : "
+					     "info_element->len+2=%zd left=%d, id=%d.\n",
+					     info_element->len +
+					     sizeof(*info_element),
+					     length, info_element->id);
+			/* We stop processing but don't return an error here
+			 * because some misbehaviour APs break this rule. ie.
+			 * Orinoco AP1000. */
+			break;
+		}
+
+		switch (info_element->id) {
+		case MFIE_TYPE_SSID:
+			if (rtllib_is_empty_essid(info_element->data,
+						     info_element->len)) {
+				network->flags |= NETWORK_EMPTY_ESSID;
+				break;
+			}
+
+			network->ssid_len = min(info_element->len,
+						(u8) IW_ESSID_MAX_SIZE);
+			memcpy(network->ssid, info_element->data, network->ssid_len);
+			if (network->ssid_len < IW_ESSID_MAX_SIZE)
+				memset(network->ssid + network->ssid_len, 0,
+				       IW_ESSID_MAX_SIZE - network->ssid_len);
+
+			RTLLIB_DEBUG_MGMT("MFIE_TYPE_SSID: '%s' len=%d.\n",
+					     network->ssid, network->ssid_len);
+			break;
+
+		case MFIE_TYPE_RATES:
+#ifdef CONFIG_RTLLIB_DEBUG
+			p = rates_str;
+#endif
+			network->rates_len = min(info_element->len,
+						 MAX_RATES_LENGTH);
+			for (i = 0; i < network->rates_len; i++) {
+				network->rates[i] = info_element->data[i];
+#ifdef CONFIG_RTLLIB_DEBUG
+				p += snprintf(p, sizeof(rates_str) -
+					      (p - rates_str), "%02X ",
+					      network->rates[i]);
+#endif
+				if (rtllib_is_ofdm_rate
+				    (info_element->data[i])) {
+					network->flags |= NETWORK_HAS_OFDM;
+					if (info_element->data[i] &
+					    RTLLIB_BASIC_RATE_MASK)
+						network->flags &=
+						    ~NETWORK_HAS_CCK;
+				}
+
+				if (rtllib_is_cck_rate
+				    (info_element->data[i])) {
+					network->flags |= NETWORK_HAS_CCK;
+				}
+			}
+
+			RTLLIB_DEBUG_MGMT("MFIE_TYPE_RATES: '%s' (%d)\n",
+					     rates_str, network->rates_len);
+			break;
+
+		case MFIE_TYPE_RATES_EX:
+#ifdef CONFIG_RTLLIB_DEBUG
+			p = rates_str;
+#endif
+			network->rates_ex_len = min(info_element->len,
+						    MAX_RATES_EX_LENGTH);
+			for (i = 0; i < network->rates_ex_len; i++) {
+				network->rates_ex[i] = info_element->data[i];
+#ifdef CONFIG_RTLLIB_DEBUG
+				p += snprintf(p, sizeof(rates_str) -
+					      (p - rates_str), "%02X ",
+					      network->rates[i]);
+#endif
+				if (rtllib_is_ofdm_rate
+				    (info_element->data[i])) {
+					network->flags |= NETWORK_HAS_OFDM;
+					if (info_element->data[i] &
+					    RTLLIB_BASIC_RATE_MASK)
+						network->flags &=
+						    ~NETWORK_HAS_CCK;
+				}
+			}
+
+			RTLLIB_DEBUG_MGMT("MFIE_TYPE_RATES_EX: '%s' (%d)\n",
+					     rates_str, network->rates_ex_len);
+			break;
+
+		case MFIE_TYPE_DS_SET:
+			RTLLIB_DEBUG_MGMT("MFIE_TYPE_DS_SET: %d\n",
+					     info_element->data[0]);
+			network->channel = info_element->data[0];
+			break;
+
+		case MFIE_TYPE_FH_SET:
+			RTLLIB_DEBUG_MGMT("MFIE_TYPE_FH_SET: ignored\n");
+			break;
+
+		case MFIE_TYPE_CF_SET:
+			RTLLIB_DEBUG_MGMT("MFIE_TYPE_CF_SET: ignored\n");
+			break;
+
+		case MFIE_TYPE_TIM:
+			if(info_element->len < 4) 
+				break;
+
+			network->tim.tim_count = info_element->data[0];
+			network->tim.tim_period = info_element->data[1];
+
+                        network->dtim_period = info_element->data[1];
+                        if(ieee->state != RTLLIB_LINKED)
+                                break;
+#if 0
+                        network->last_dtim_sta_time[0] = stats->mac_time[0];
+#else
+			network->last_dtim_sta_time[0] = jiffies;
+#endif
+                        network->last_dtim_sta_time[1] = stats->mac_time[1];
+
+                        network->dtim_data = RTLLIB_DTIM_VALID;
+                        
+
+                        if(info_element->data[2] & 1)
+                                network->dtim_data |= RTLLIB_DTIM_MBCAST;
+                                
+#if 1
+                        offset = (info_element->data[2] >> 1)*2;
+                        
+                
+                        if(ieee->assoc_id < 8*offset || 
+                                ieee->assoc_id > 8*(offset + info_element->len -3))
+                                
+                                break;
+
+                        offset = (ieee->assoc_id / 8) - offset;
+                        if(info_element->data[3+offset] & (1<<(ieee->assoc_id%8)))
+                                network->dtim_data |= RTLLIB_DTIM_UCAST;
+#else
+			{
+				u16 numSta = 0;
+				u16 offset_byte = 0;
+				u16 offset_bit = 0;
+
+				numSta = (info_element->data[2] &0xFE)*8;
+
+				if(ieee->assoc_id < numSta ||
+						ieee->assoc_id > (numSta + (info_element->len -3)*8))
+					break;
+
+				offset = ieee->assoc_id - numSta;
+				offset_byte = offset / 8;
+				offset_bit = offset % 8;
+				if(info_element->data[3+offset_byte] & (0x01<<offset_bit))
+					network->dtim_data |= RTLLIB_DTIM_UCAST;
+			}
+#endif
+
+			network->listen_interval = network->dtim_period;
+			break;
+
+		case MFIE_TYPE_ERP:
+			network->erp_value = info_element->data[0];
+			network->flags |= NETWORK_HAS_ERP_VALUE;
+			RTLLIB_DEBUG_MGMT("MFIE_TYPE_ERP_SET: %d\n",
+					     network->erp_value);
+			break;
+		case MFIE_TYPE_IBSS_SET:
+			network->atim_window = info_element->data[0];
+			RTLLIB_DEBUG_MGMT("MFIE_TYPE_IBSS_SET: %d\n",
+					     network->atim_window);
+			break;
+
+		case MFIE_TYPE_CHALLENGE:
+			RTLLIB_DEBUG_MGMT("MFIE_TYPE_CHALLENGE: ignored\n");
+			break;
+
+		case MFIE_TYPE_GENERIC:
+			RTLLIB_DEBUG_MGMT("MFIE_TYPE_GENERIC: %d bytes\n",
+					     info_element->len);
+			if (!rtllib_parse_qos_info_param_IE(info_element,
+							       network))
+				break;
+			if (info_element->len >= 4 &&
+			    info_element->data[0] == 0x00 &&
+			    info_element->data[1] == 0x50 &&
+			    info_element->data[2] == 0xf2 &&
+			    info_element->data[3] == 0x01) {
+				network->wpa_ie_len = min(info_element->len + 2,
+							  MAX_WPA_IE_LEN);
+				memcpy(network->wpa_ie, info_element,
+				       network->wpa_ie_len);
+				break;
+			}
+#ifdef THOMAS_TURBO
+                        if (info_element->len == 7 &&
+                            info_element->data[0] == 0x00 &&
+                            info_element->data[1] == 0xe0 &&
+                            info_element->data[2] == 0x4c &&
+                            info_element->data[3] == 0x01 &&
+                            info_element->data[4] == 0x02) {
+                                network->Turbo_Enable = 1;
+                        }
+#endif
+
+			if(tmp_htcap_len == 0){
+				if(info_element->len >= 4 &&
+				   info_element->data[0] == 0x00 &&
+				   info_element->data[1] == 0x90 &&
+				   info_element->data[2] == 0x4c &&
+				   info_element->data[3] == 0x033){
+				   
+						tmp_htcap_len = min(info_element->len,(u8)MAX_IE_LEN);
+				   		if(tmp_htcap_len != 0){
+				   			network->bssht.bdHTSpecVer = HT_SPEC_VER_EWC;
+							network->bssht.bdHTCapLen = tmp_htcap_len > sizeof(network->bssht.bdHTCapBuf)?\
+								sizeof(network->bssht.bdHTCapBuf):tmp_htcap_len;
+							memcpy(network->bssht.bdHTCapBuf,info_element->data,network->bssht.bdHTCapLen);							
+				   		}
+				}
+				if(tmp_htcap_len != 0){
+					network->bssht.bdSupportHT = true;
+					network->bssht.bdHT1R = ((((PHT_CAPABILITY_ELE)(network->bssht.bdHTCapBuf))->MCS[1]) == 0);
+				}else{
+					network->bssht.bdSupportHT = false;
+					network->bssht.bdHT1R = false;
+				}
+			}
+			
+			
+			if(tmp_htinfo_len == 0){
+				if(info_element->len >= 4 &&
+					info_element->data[0] == 0x00 &&
+				   	info_element->data[1] == 0x90 &&
+				   	info_element->data[2] == 0x4c &&
+				   	info_element->data[3] == 0x034){
+
+						tmp_htinfo_len = min(info_element->len,(u8)MAX_IE_LEN);
+						if(tmp_htinfo_len != 0){
+							network->bssht.bdHTSpecVer = HT_SPEC_VER_EWC;
+							if(tmp_htinfo_len){
+								network->bssht.bdHTInfoLen = tmp_htinfo_len > sizeof(network->bssht.bdHTInfoBuf)?\
+									sizeof(network->bssht.bdHTInfoBuf):tmp_htinfo_len;
+								memcpy(network->bssht.bdHTInfoBuf,info_element->data,network->bssht.bdHTInfoLen);
+							}
+							
+						}
+						
+				}
+			}
+
+			if(ieee->aggregation){
+				if(network->bssht.bdSupportHT){
+					if(info_element->len >= 4 &&
+						info_element->data[0] == 0x00 &&
+						info_element->data[1] == 0xe0 &&
+						info_element->data[2] == 0x4c &&
+						info_element->data[3] == 0x02){
+
+						ht_realtek_agg_len = min(info_element->len,(u8)MAX_IE_LEN);
+						memcpy(ht_realtek_agg_buf,info_element->data,info_element->len);
+						
+					}
+					if(ht_realtek_agg_len >= 5){
+						network->realtek_cap_exit = true;
+						network->bssht.bdRT2RTAggregation = true;
+
+						if((ht_realtek_agg_buf[4] == 1) && (ht_realtek_agg_buf[5] & 0x02))
+						network->bssht.bdRT2RTLongSlotTime = true;
+
+						if((ht_realtek_agg_buf[4]==1) && (ht_realtek_agg_buf[5] & RT_HT_CAP_USE_92SE))
+						{
+							network->bssht.RT2RT_HT_Mode |= RT_HT_CAP_USE_92SE;
+						}
+					}
+				}
+				if(ht_realtek_agg_len >= 5){
+					if((ht_realtek_agg_buf[5] & RT_HT_CAP_USE_SOFTAP))
+						network->bssht.RT2RT_HT_Mode |= RT_HT_CAP_USE_SOFTAP;
+				}
+			}
+
+			{
+				if((info_element->len >= 3 &&
+					 info_element->data[0] == 0x00 &&
+					 info_element->data[1] == 0x05 &&
+					 info_element->data[2] == 0xb5) || 
+					 (info_element->len >= 3 &&
+					 info_element->data[0] == 0x00 &&
+					 info_element->data[1] == 0x0a &&
+					 info_element->data[2] == 0xf7) ||
+					 (info_element->len >= 3 &&
+					 info_element->data[0] == 0x00 &&
+					 info_element->data[1] == 0x10 &&
+					 info_element->data[2] == 0x18)){
+
+						network->broadcom_cap_exist = true;
+
+				}
+			}
+#if 0	
+			if (tmp_htcap_len !=0)
+				{
+					u16 cap_ext = ((PHT_CAPABILITY_ELE)&info_element->data[0])->ExtHTCapInfo;
+					if ((cap_ext & 0x0c00) == 0x0c00)
+						{
+							network->ralink_cap_exist = true;
+						}
+				}
+#endif
+			if(info_element->len >= 3 &&
+				info_element->data[0] == 0x00 &&
+				info_element->data[1] == 0x0c &&
+				info_element->data[2] == 0x43)
+			{
+				network->ralink_cap_exist = true;
+			}
+			if((info_element->len >= 3 && 
+				info_element->data[0] == 0x00 &&
+				info_element->data[1] == 0x03 &&
+				info_element->data[2] == 0x7f) ||
+				(info_element->len >= 3 &&
+				info_element->data[0] == 0x00 &&
+				info_element->data[1] == 0x13 &&
+				info_element->data[2] == 0x74))
+			{
+				network->atheros_cap_exist = true;
+			}
+
+			if ((info_element->len >= 3 && 
+				info_element->data[0] == 0x00 &&
+				info_element->data[1] == 0x50 &&
+				info_element->data[2] == 0x43) )
+				{
+					network->marvell_cap_exist = true;
+				}
+			if(info_element->len >= 3 &&
+				info_element->data[0] == 0x00 &&
+				info_element->data[1] == 0x40 &&
+				info_element->data[2] == 0x96)
+			{
+				network->cisco_cap_exist = true;
+			}
+			if(info_element->len > 4 && 
+				info_element->data[0] == 0x00 &&
+				info_element->data[1] == 0x40 &&
+				info_element->data[2] == 0x96 &&
+				info_element->data[3] == 0x01)
+			{
+				if(info_element->len == 6)
+				{
+					memcpy(network->CcxRmState, &info_element[4], 2);
+					if(network->CcxRmState[0] != 0)
+					{
+						network->bCcxRmEnable = true;
+					}
+					else
+						network->bCcxRmEnable = false;
+					network->MBssidMask = network->CcxRmState[1] & 0x07;
+					if(network->MBssidMask != 0)
+					{
+						network->bMBssidValid = true;
+						network->MBssidMask = 0xff << (network->MBssidMask);
+						memcpy(network->MBssid, network->bssid, ETH_ALEN);
+						network->MBssid[5] &= network->MBssidMask;
+					}
+					else
+					{
+						network->bMBssidValid = false;
+					}
+				}
+				else
+				{
+					network->bCcxRmEnable = false;
+				}
+			}
+			if(info_element->len > 4  && 
+				info_element->data[0] == 0x00 &&
+				info_element->data[1] == 0x40 &&
+				info_element->data[2] == 0x96 &&
+				info_element->data[3] == 0x03)
+			{
+				if(info_element->len == 5)
+				{
+					network->bWithCcxVerNum = true;
+					network->BssCcxVerNumber = info_element->data[4];
+				}
+				else
+				{
+					network->bWithCcxVerNum = false;
+					network->BssCcxVerNumber = 0;
+				}
+			}
+			if(info_element->len > 4  && 
+				info_element->data[0] == 0x00 &&
+				info_element->data[1] == 0x50 &&
+				info_element->data[2] == 0xf2 &&
+				info_element->data[3] == 0x04)
+			{
+				RTLLIB_DEBUG_MGMT("MFIE_TYPE_WZC: %d bytes\n",
+						     info_element->len);
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)	
+				network->wzc_ie_len = min(info_element->len+2,
+							  MAX_WZC_IE_LEN);
+				memcpy(network->wzc_ie, info_element,
+						network->wzc_ie_len);
+#endif
+			}
+#ifdef _RTL8192_EXT_PATCH_
+#ifdef COMPATIBLE_WITH_RALINK_MESH
+			if(info_element->len > 3  && 
+				info_element->data[0] == 0x00 &&
+				info_element->data[1] == 0x0F &&
+				info_element->data[2] == 0xAC)
+			{
+				network->hostname_len = info_element->len - 3;
+				memcpy(network->hostname, (info_element->data+3), network->hostname_len);
+			}
+#else			
+			if(info_element->len > 4  && 
+				info_element->data[0] == 0x48 &&
+				info_element->data[1] == 0x4F &&
+				info_element->data[2] == 0x53 &&
+				info_element->data[3] == 0x54)
+			{
+				network->hostname_len = info_element->len - 4;
+				memcpy(network->hostname, (info_element->data+4), network->hostname_len);
+			}
+#endif
+#endif
+			break;
+
+		case MFIE_TYPE_RSN:
+			RTLLIB_DEBUG_MGMT("MFIE_TYPE_RSN: %d bytes\n",
+					     info_element->len);
+			network->rsn_ie_len = min(info_element->len + 2,
+						  MAX_WPA_IE_LEN);
+			memcpy(network->rsn_ie, info_element,
+			       network->rsn_ie_len);
+			break;
+
+		case MFIE_TYPE_HT_CAP:
+			RTLLIB_DEBUG_SCAN("MFIE_TYPE_HT_CAP: %d bytes\n",
+					     info_element->len);
+			tmp_htcap_len = min(info_element->len,(u8)MAX_IE_LEN);
+			if(tmp_htcap_len != 0){
+				network->bssht.bdHTSpecVer = HT_SPEC_VER_EWC;
+				network->bssht.bdHTCapLen = tmp_htcap_len > sizeof(network->bssht.bdHTCapBuf)?\
+					sizeof(network->bssht.bdHTCapBuf):tmp_htcap_len;
+				memcpy(network->bssht.bdHTCapBuf,info_element->data,network->bssht.bdHTCapLen);
+				
+				network->bssht.bdSupportHT = true;
+				network->bssht.bdHT1R = ((((PHT_CAPABILITY_ELE)(network->bssht.bdHTCapBuf))->MCS[1]) == 0);
+
+				network->bssht.bdBandWidth = (HT_CHANNEL_WIDTH)(((PHT_CAPABILITY_ELE)(network->bssht.bdHTCapBuf))->ChlWidth);
+			}
+			else{
+				network->bssht.bdSupportHT = false;
+				network->bssht.bdHT1R = false;
+				network->bssht.bdBandWidth = HT_CHANNEL_WIDTH_20 ;
+			}
+			break;
+
+
+		case MFIE_TYPE_HT_INFO:
+			RTLLIB_DEBUG_SCAN("MFIE_TYPE_HT_INFO: %d bytes\n",
+					     info_element->len);
+			tmp_htinfo_len = min(info_element->len,(u8)MAX_IE_LEN);
+			if(tmp_htinfo_len){
+				network->bssht.bdHTSpecVer = HT_SPEC_VER_IEEE;
+				network->bssht.bdHTInfoLen = tmp_htinfo_len > sizeof(network->bssht.bdHTInfoBuf)?\
+					sizeof(network->bssht.bdHTInfoBuf):tmp_htinfo_len;
+				memcpy(network->bssht.bdHTInfoBuf,info_element->data,network->bssht.bdHTInfoLen);
+			}
+			break;
+
+		case MFIE_TYPE_AIRONET:
+			RTLLIB_DEBUG_SCAN("MFIE_TYPE_AIRONET: %d bytes\n",
+					     info_element->len);
+			if(info_element->len >IE_CISCO_FLAG_POSITION)
+			{
+				network->bWithAironetIE = true;
+
+				if(	(info_element->data[IE_CISCO_FLAG_POSITION]&SUPPORT_CKIP_MIC)	||
+					(info_element->data[IE_CISCO_FLAG_POSITION]&SUPPORT_CKIP_PK)	)
+				{
+		 			network->bCkipSupported = true;
+				}
+				else
+				{
+					network->bCkipSupported = false;
+				}
+			}
+			else
+			{
+				network->bWithAironetIE = false;
+		 		network->bCkipSupported = false;
+			}
+			break;
+		case MFIE_TYPE_QOS_PARAMETER:
+			printk(KERN_ERR
+			       "QoS Error need to parse QOS_PARAMETER IE\n");
+			break;
+
+#ifdef ENABLE_DOT11D
+		case MFIE_TYPE_COUNTRY:
+			RTLLIB_DEBUG_SCAN("MFIE_TYPE_COUNTRY: %d bytes\n",
+					     info_element->len);
+			rtllib_extract_country_ie(ieee, info_element, network, network->bssid);
+			break;
+#endif
+#ifdef _RTL8192_EXT_PATCH_
+		case MFIE_TYPE_MESH_ID:
+			network->mesh_id_len = min(info_element->len, (u8)MAX_MESH_ID_LEN);
+			memcpy(network->mesh_id, info_element->data, network->mesh_id_len);
+			if (network->mesh_id_len < MAX_MESH_ID_LEN) {
+				memset(network->mesh_id + network->mesh_id_len, 0,
+					MAX_MESH_ID_LEN - network->mesh_id_len);
+			}
+			RTLLIB_DEBUG_MGMT("MFIE_TYPE_MESH_ID: '%s'len=%d.\n", network->mesh_id, 
+					network->mesh_id_len);
+			break;
+
+		case MFIE_TYPE_MESH_CONFIGURATION:
+			network->mesh_config_len = min(info_element->len, (u8)MESH_CONF_TOTAL_LEN); 
+			memcpy(network->mesh_config.path_proto_id, info_element->data + 1, 4);
+			memcpy(network->mesh_config.path_metric_id, info_element->data + 5, 4);
+			memcpy(network->mesh_config.congest_ctl_mode, info_element->data + 9, 4);
+			memcpy(network->mesh_config.mesh_capability, info_element->data + 17, 2);
+			break;
+#endif
+/* TODO */
+#if 0
+			/* 802.11h */
+		case MFIE_TYPE_POWER_CONSTRAINT:
+			network->power_constraint = info_element->data[0];
+			network->flags |= NETWORK_HAS_POWER_CONSTRAINT;
+			break;
+
+		case MFIE_TYPE_CSA:
+			network->power_constraint = info_element->data[0];
+			network->flags |= NETWORK_HAS_CSA;
+			break;
+
+		case MFIE_TYPE_QUIET:
+			network->quiet.count = info_element->data[0];
+			network->quiet.period = info_element->data[1];
+			network->quiet.duration = info_element->data[2];
+			network->quiet.offset = info_element->data[3];
+			network->flags |= NETWORK_HAS_QUIET;
+			break;
+
+		case MFIE_TYPE_IBSS_DFS:
+			if (network->ibss_dfs)
+				break;
+			network->ibss_dfs = kmemdup(info_element->data,
+						    info_element->len,
+						    GFP_ATOMIC);
+			if (!network->ibss_dfs)
+				return 1;
+			network->flags |= NETWORK_HAS_IBSS_DFS;
+			break;
+
+		case MFIE_TYPE_TPC_REPORT:
+			network->tpc_report.transmit_power =
+			    info_element->data[0];
+			network->tpc_report.link_margin = info_element->data[1];
+			network->flags |= NETWORK_HAS_TPC_REPORT;
+			break;
+#endif
+#ifdef RTL8192S_WAPI_SUPPORT
+		case MFIE_TYPE_WAPI:
+			RTLLIB_DEBUG_MGMT("MFIE_TYPE_WAPI: %d bytes\n", info_element->len);
+			tmp_wapi_len = min(info_element->len,(u8)MAX_WAPI_IE_LEN);
+			if(tmp_wapi_len){
+				network->wapi_ie_len = tmp_wapi_len;
+				memcpy(network->wapi_ie,info_element->data,network->wapi_ie_len);
+			}
+			break;
+#endif
+		default:
+			RTLLIB_DEBUG_MGMT
+			    ("Unsupported info element: %s (%d)\n",
+			     get_info_element_string(info_element->id),
+			     info_element->id);
+			break;
+		}
+
+		length -= sizeof(*info_element) + info_element->len;
+		info_element =
+		    (struct rtllib_info_element *)&info_element->
+		    data[info_element->len];
+	}
+
+	if(!network->atheros_cap_exist && !network->broadcom_cap_exist && 
+		!network->cisco_cap_exist && !network->ralink_cap_exist && !network->bssht.bdRT2RTAggregation)
+	{
+		network->unknown_cap_exist = true;
+	}
+	else
+	{
+		network->unknown_cap_exist = false;
+	}
+	return 0;
+}
+
+static inline u8 rtllib_SignalStrengthTranslate(
+	u8  CurrSS
+	)
+{
+	u8 RetSS;
+
+	if(CurrSS >= 71 && CurrSS <= 100)
+	{
+		RetSS = 90 + ((CurrSS - 70) / 3);
+	}	
+	else if(CurrSS >= 41 && CurrSS <= 70)
+	{
+		RetSS = 78 + ((CurrSS - 40) / 3);
+	}	
+	else if(CurrSS >= 31 && CurrSS <= 40)
+	{
+		RetSS = 66 + (CurrSS - 30);
+	}	
+	else if(CurrSS >= 21 && CurrSS <= 30)
+	{
+		RetSS = 54 + (CurrSS - 20);
+	}	
+	else if(CurrSS >= 5 && CurrSS <= 20)
+	{
+		RetSS = 42 + (((CurrSS - 5) * 2) / 3);
+	}	
+	else if(CurrSS == 4)
+	{
+		RetSS = 36; 
+	}
+	else if(CurrSS == 3)
+	{
+		RetSS = 27; 
+	}
+	else if(CurrSS == 2)
+	{
+		RetSS = 18; 
+	}
+	else if(CurrSS == 1)
+	{
+		RetSS = 9; 
+	}
+	else
+	{
+		RetSS = CurrSS; 
+	}
+
+	
+
+	return RetSS;
+}
+
+long rtllib_translate_todbm(u8 signal_strength_index	)
+{
+	long	signal_power; 
+
+	signal_power = (long)((signal_strength_index + 1) >> 1); 
+	signal_power -= 95; 
+
+	return signal_power;
+}
+
+#ifdef _RTL8192_EXT_PATCH_
+extern int rtllib_network_init(
+#else
+static inline int rtllib_network_init(
+#endif
+	struct rtllib_device *ieee,
+	struct rtllib_probe_response *beacon,
+	struct rtllib_network *network,
+	struct rtllib_rx_stats *stats)
+{
+#ifdef CONFIG_RTLLIB_DEBUG
+#endif
+
+	/*	
+        network->qos_data.active = 0;
+        network->qos_data.supported = 0;
+        network->qos_data.param_count = 0;
+        network->qos_data.old_param_count = 0;
+	*/
+	memset(&network->qos_data, 0, sizeof(struct rtllib_qos_data));
+
+	/* Pull out fixed field data */
+	memcpy(network->bssid, beacon->header.addr3, ETH_ALEN);
+	network->capability = le16_to_cpu(beacon->capability);
+	network->last_scanned = jiffies;
+	network->time_stamp[0] = le32_to_cpu(beacon->time_stamp[0]);
+	network->time_stamp[1] = le32_to_cpu(beacon->time_stamp[1]);
+	network->beacon_interval = le32_to_cpu(beacon->beacon_interval);
+	/* Where to pull this? beacon->listen_interval;*/
+	network->listen_interval = 0x0A;
+	network->rates_len = network->rates_ex_len = 0;
+	network->last_associate = 0;
+	network->ssid_len = 0;
+	network->hidden_ssid_len = 0;
+	memset(network->hidden_ssid, 0, sizeof(network->hidden_ssid));
+	network->flags = 0;
+	network->atim_window = 0;
+	network->erp_value = (network->capability & WLAN_CAPABILITY_IBSS) ?
+            0x3 : 0x0;
+	network->berp_info_valid = false;
+        network->broadcom_cap_exist = false;
+	network->ralink_cap_exist = false;
+	network->atheros_cap_exist = false;
+	network->cisco_cap_exist = false;
+	network->unknown_cap_exist = false;
+	network->realtek_cap_exit = false;
+	network->marvell_cap_exist = false;
+#ifdef THOMAS_TURBO
+	network->Turbo_Enable = 0;
+#endif
+	network->SignalStrength = stats->SignalStrength;	
+	network->RSSI = stats->SignalStrength;	
+#ifdef ENABLE_DOT11D
+	network->CountryIeLen = 0;
+	memset(network->CountryIeBuf, 0, MAX_IE_LEN);
+#endif
+#ifdef _RTL8192_EXT_PATCH_
+	memset(network->hostname, 0, MAX_HOST_NAME_LENGTH);
+	network->hostname_len = 0;
+#endif
+	HTInitializeBssDesc(&network->bssht);	
+	if (stats->freq == RTLLIB_52GHZ_BAND) {
+		/* for A band (No DS info) */
+		network->channel = stats->received_channel;
+	} else
+		network->flags |= NETWORK_HAS_CCK;
+
+ 	network->wpa_ie_len = 0;
+ 	network->rsn_ie_len = 0;
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)	
+	network->wzc_ie_len = 0;
+#endif
+
+        if (rtllib_parse_info_param(ieee,
+			beacon->info_element, 
+			(stats->len - sizeof(*beacon)), 
+			network, 
+			stats))
+                return 1;
+
+	network->mode = 0;
+	if (stats->freq == RTLLIB_52GHZ_BAND)
+		network->mode = IEEE_A;
+	else {
+		if (network->flags & NETWORK_HAS_OFDM)
+			network->mode |= IEEE_G;
+		if (network->flags & NETWORK_HAS_CCK)
+			network->mode |= IEEE_B;
+	}
+
+	if (network->mode == 0) {
+		RTLLIB_DEBUG_SCAN("Filtered out '%s (" MAC_FMT ")' "
+				     "network.\n",
+				     escape_essid(network->ssid,
+						  network->ssid_len),
+				     MAC_ARG(network->bssid));
+		return 1;
+	}
+
+	if(network->bssht.bdSupportHT){
+#ifdef _RTL8192_EXT_PATCH_
+		if(network->mode == IEEE_A)
+			network->mode |= IEEE_N_5G;
+		else if(network->mode & (IEEE_G | IEEE_B))
+			network->mode |= IEEE_N_24G;
+#else
+		if(network->mode == IEEE_A)
+			network->mode = IEEE_N_5G;
+		else if(network->mode & (IEEE_G | IEEE_B))
+			network->mode = IEEE_N_24G;
+#endif
+	}
+	if (rtllib_is_empty_essid(network->ssid, network->ssid_len))
+		network->flags |= NETWORK_EMPTY_ESSID;
+
+#if  0	
+        {
+            static u8 Netgear845T_Mac[3] = {0x00, 0x1B, 0x2F};
+            static u8 Buffalo300N_Mac[3] = {0x00, 0x16, 0x01};
+
+            if(ieee->RF_Type == RF_1T1R || ieee->b1SSSupport == true)
+            {
+                if((memcmp(network->bssid, Netgear845T_Mac, 3)==0) ||(memcmp(network->bssid, Buffalo300N_Mac, 3)==0))
+                {
+                    network->bIsNetgear854T = true;
+                    network->bssht.bdSupportHT = false;
+                    if(network->mode == WIRELESS_MODE_N_24G)
+                    {
+                        network->mode = WIRELESS_MODE_B | WIRELESS_MODE_G;
+                    }
+
+                }
+                else
+                {
+                    network->bIsNetgear854T = false;
+                }
+            }
+        }
+#endif
+
+#if 1	
+	stats->signal = 30 + (stats->SignalStrength * 70) / 100;
+	stats->noise = rtllib_translate_todbm((u8)(100-stats->signal)) -25;
+#endif
+
+	memcpy(&network->stats, stats, sizeof(network->stats));
+
+	return 0;
+}
+
+static inline int is_same_network(struct rtllib_network *src,
+				  struct rtllib_network *dst, u8 ssidbroad)
+{
+	/* A network is only a duplicate if the channel, BSSID, ESSID
+	 * and the capability field (in particular IBSS and BSS) all match.  
+	 * We treat all <hidden> with the same BSSID and channel
+	 * as one network */
+	return 
+		(((src->ssid_len == dst->ssid_len) || (!ssidbroad)) &&
+		(src->channel == dst->channel) &&
+		!memcmp(src->bssid, dst->bssid, ETH_ALEN) &&
+		(!memcmp(src->ssid, dst->ssid, src->ssid_len) || (!ssidbroad)) &&
+		((src->capability & WLAN_CAPABILITY_IBSS) == 
+		(dst->capability & WLAN_CAPABILITY_IBSS)) &&
+		((src->capability & WLAN_CAPABILITY_ESS) == 
+		(dst->capability & WLAN_CAPABILITY_ESS)));
+}
+
+static inline void update_network(struct rtllib_network *dst,
+				  struct rtllib_network *src)
+{
+	int qos_active;
+	u8 old_param;
+
+	memcpy(&dst->stats, &src->stats, sizeof(struct rtllib_rx_stats));
+	dst->capability = src->capability;
+	memcpy(dst->rates, src->rates, src->rates_len);
+	dst->rates_len = src->rates_len;
+	memcpy(dst->rates_ex, src->rates_ex, src->rates_ex_len);
+	dst->rates_ex_len = src->rates_ex_len;
+	if(src->ssid_len > 0)
+	{
+		if(dst->ssid_len == 0)
+		{
+			memset(dst->hidden_ssid, 0, sizeof(dst->hidden_ssid));
+			dst->hidden_ssid_len = src->ssid_len;
+			memcpy(dst->hidden_ssid, src->ssid, src->ssid_len);
+		}else{
+			memset(dst->ssid, 0, dst->ssid_len);
+			dst->ssid_len = src->ssid_len;
+			memcpy(dst->ssid, src->ssid, src->ssid_len);
+		}
+	}
+	dst->mode = src->mode;
+	dst->flags = src->flags;
+	dst->time_stamp[0] = src->time_stamp[0];
+	dst->time_stamp[1] = src->time_stamp[1];
+	if (src->flags & NETWORK_HAS_ERP_VALUE)
+	{
+		dst->erp_value = src->erp_value;
+		dst->berp_info_valid = src->berp_info_valid = true;
+	}
+	dst->beacon_interval = src->beacon_interval;
+	dst->listen_interval = src->listen_interval;
+	dst->atim_window = src->atim_window;
+	dst->dtim_period = src->dtim_period;
+	dst->dtim_data = src->dtim_data;
+	dst->last_dtim_sta_time[0] = src->last_dtim_sta_time[0];
+	dst->last_dtim_sta_time[1] = src->last_dtim_sta_time[1];
+	memcpy(&dst->tim, &src->tim, sizeof(struct rtllib_tim_parameters));
+	
+        dst->bssht.bdSupportHT = src->bssht.bdSupportHT;
+	dst->bssht.bdRT2RTAggregation = src->bssht.bdRT2RTAggregation;
+	dst->bssht.bdHTCapLen= src->bssht.bdHTCapLen;
+	memcpy(dst->bssht.bdHTCapBuf,src->bssht.bdHTCapBuf,src->bssht.bdHTCapLen);
+	dst->bssht.bdHTInfoLen= src->bssht.bdHTInfoLen;
+	memcpy(dst->bssht.bdHTInfoBuf,src->bssht.bdHTInfoBuf,src->bssht.bdHTInfoLen);
+	dst->bssht.bdHTSpecVer = src->bssht.bdHTSpecVer;
+	dst->bssht.bdRT2RTLongSlotTime = src->bssht.bdRT2RTLongSlotTime;
+	dst->broadcom_cap_exist = src->broadcom_cap_exist;
+	dst->ralink_cap_exist = src->ralink_cap_exist;
+	dst->atheros_cap_exist = src->atheros_cap_exist;
+	dst->realtek_cap_exit = src->realtek_cap_exit;
+	dst->marvell_cap_exist = src->marvell_cap_exist;
+	dst->cisco_cap_exist = src->cisco_cap_exist;
+	dst->unknown_cap_exist = src->unknown_cap_exist;
+	memcpy(dst->wpa_ie, src->wpa_ie, src->wpa_ie_len);
+	dst->wpa_ie_len = src->wpa_ie_len;
+	memcpy(dst->rsn_ie, src->rsn_ie, src->rsn_ie_len);
+	dst->rsn_ie_len = src->rsn_ie_len;
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)	
+	memcpy(dst->wzc_ie, src->wzc_ie, src->wzc_ie_len);
+	dst->wzc_ie_len = src->wzc_ie_len;
+#endif
+
+	dst->last_scanned = jiffies;
+	/* qos related parameters */
+	qos_active = dst->qos_data.active;
+	old_param = dst->qos_data.param_count;
+#if 0
+	if(dst->flags & NETWORK_HAS_QOS_MASK){
+	}
+	else {
+		dst->qos_data.supported = src->qos_data.supported;
+		dst->qos_data.param_count = src->qos_data.param_count;
+	}
+#else
+	dst->qos_data.supported = src->qos_data.supported;
+	if(dst->flags & NETWORK_HAS_QOS_PARAMETERS){
+		memcpy(&dst->qos_data, &src->qos_data, sizeof(struct rtllib_qos_data));
+	}
+#endif	
+	if(dst->qos_data.supported == 1) {
+		if(dst->ssid_len)
+			RTLLIB_DEBUG_QOS
+				("QoS the network %s is QoS supported\n",
+				dst->ssid);
+		else 
+			RTLLIB_DEBUG_QOS
+				("QoS the network is QoS supported\n");
+	}
+	dst->qos_data.active = qos_active;
+	dst->qos_data.old_param_count = old_param;
+
+	/* dst->last_associate is not overwritten */
+	dst->wmm_info = src->wmm_info; 
+	if(src->wmm_param[0].ac_aci_acm_aifsn|| \
+	   src->wmm_param[1].ac_aci_acm_aifsn|| \
+	   src->wmm_param[2].ac_aci_acm_aifsn|| \
+	   src->wmm_param[1].ac_aci_acm_aifsn) {
+	  memcpy(dst->wmm_param, src->wmm_param, WME_AC_PRAM_LEN);
+	}
+
+	dst->SignalStrength = src->SignalStrength;
+	dst->RSSI = src->RSSI;	
+#ifdef THOMAS_TURBO
+	dst->Turbo_Enable = src->Turbo_Enable;
+#endif
+
+#ifdef ENABLE_DOT11D
+	dst->CountryIeLen = src->CountryIeLen;
+	memcpy(dst->CountryIeBuf, src->CountryIeBuf, src->CountryIeLen);
+#endif
+
+	dst->bWithAironetIE = src->bWithAironetIE;
+	dst->bCkipSupported = src->bCkipSupported;
+	memcpy(dst->CcxRmState,src->CcxRmState,2);
+	dst->bCcxRmEnable = src->bCcxRmEnable;
+	dst->MBssidMask = src->MBssidMask;
+	dst->bMBssidValid = src->bMBssidValid;
+	memcpy(dst->MBssid,src->MBssid,6);
+	dst->bWithCcxVerNum = src->bWithCcxVerNum;
+	dst->BssCcxVerNumber = src->BssCcxVerNumber;
+
+}
+static inline int is_beacon(__le16 fc) 
+{
+	return (WLAN_FC_GET_STYPE(le16_to_cpu(fc)) == RTLLIB_STYPE_BEACON);
+}
+
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE) 
+u8 AsocEntry_ComputeSum(u8 *paddr)
+{
+	u32 sum;
+
+	sum =	paddr[0]+
+			paddr[1]+
+			paddr[2]+
+			paddr[3]+
+			paddr[4]+
+			paddr[5];
+
+	return (u8)(sum % PEER_MAX_ASSOC);
+}
+u8 AsocEntry_AssignAvailableAID(struct rtllib_device *ieee, u8 *paddr)
+{
+	int		i;
+	
+	for(i = 0; i < PEER_MAX_ASSOC; i++)
+	{
+		if(ieee->AvailableAIDTable[i] == 99)
+		{
+			ieee->AvailableAIDTable[i] = AsocEntry_ComputeSum(paddr);
+			return i+1;
+		}
+	}
+
+	return 1;
+}
+
+void InitStaInfo(struct rtllib_device *ieee,int index)
+{
+	int idx = index;
+	ieee->peer_assoc_list[idx]->StaDataRate = 0;
+	ieee->peer_assoc_list[idx]->StaSS = 0;
+	ieee->peer_assoc_list[idx]->RetryFrameCnt = 0;
+	ieee->peer_assoc_list[idx]->NoRetryFrameCnt = 0;
+	ieee->peer_assoc_list[idx]->LastRetryCnt = 0;
+	ieee->peer_assoc_list[idx]->LastNoRetryCnt = 0;
+	ieee->peer_assoc_list[idx]->AvgRetryRate = 0;
+	ieee->peer_assoc_list[idx]->LastRetryRate = 0;
+	ieee->peer_assoc_list[idx]->txRateIndex = 11;
+	ieee->peer_assoc_list[idx]->APDataRate = 0x2; 
+	ieee->peer_assoc_list[idx]->ForcedDataRate = 0x2; 
+
+}
+static u8 IsStaInfoExist(struct rtllib_device *ieee, u8 *addr)
+{
+	int k=0;
+	struct sta_info * psta = NULL;
+	u8 sta_idx = PEER_MAX_ASSOC;
+	
+	for(k=0; k<PEER_MAX_ASSOC; k++)
+	{
+		psta = ieee->peer_assoc_list[k];
+		if(NULL != psta)
+		{
+			if(memcmp(addr, psta->macaddr, ETH_ALEN) == 0)
+			{
+				sta_idx = k;
+				break;
+			}
+		}
+	}
+	return sta_idx;
+}
+static u8 GetFreeStaInfoIdx(struct rtllib_device *ieee, u8 *addr)
+{
+	int k = 0;
+	while((ieee->peer_assoc_list[k] != NULL) && (k < PEER_MAX_ASSOC))
+		k++;
+	printk("%s: addr:"MAC_FMT" index: %d\n", __FUNCTION__, MAC_ARG(addr), k);
+	return k;
+}
+struct sta_info *GetStaInfo(struct rtllib_device *ieee, u8 *addr)
+{
+	int k=0;
+	struct sta_info * psta = NULL;
+	struct sta_info * psta_find = NULL;
+	
+	for(k=0; k<PEER_MAX_ASSOC; k++)
+	{
+		psta = ieee->peer_assoc_list[k];
+		if(NULL != psta)
+		{
+			if(memcmp(addr, psta->macaddr, ETH_ALEN) == 0)
+			{
+				psta_find = psta;
+				break;
+			}
+		}
+	}
+	return psta_find;
+}
+void DelStaInfoList(struct rtllib_device *ieee)
+{
+	int idx = 0;
+	struct sta_info * AsocEntry = NULL;
+
+	atomic_set(&ieee->AsocEntryNum, 0);
+	for(idx=0; idx<PEER_MAX_ASSOC; idx++){
+		AsocEntry = ieee->peer_assoc_list[idx];
+		if(NULL != AsocEntry){
+			kfree(AsocEntry);
+			ieee->peer_assoc_list[idx] = NULL;
+		}
+		ieee->AvailableAIDTable[idx] = 99;
+	}
+}	
+void DelStaInfo(struct rtllib_device *ieee, u8 *addr)
+{
+	struct sta_info * psta = NULL;
+	int k=0;
+	
+	for(k=0; k<PEER_MAX_ASSOC; k++)
+	{
+		psta = ieee->peer_assoc_list[k];
+		if(NULL != psta){
+			if(memcmp(addr, psta->macaddr, ETH_ALEN) == 0){
+				if (psta->aid > 0 && psta->aid-1 < PEER_MAX_ASSOC)
+					ieee->AvailableAIDTable[psta->aid-1] = 99;
+				else
+					printk("%s(): clear non-existing entry AID\n", __func__);
+				
+				kfree(psta);
+				ieee->peer_assoc_list[k] = NULL;
+				atomic_dec(&ieee->AsocEntryNum);
+			}
+		}
+	}
+}
+void IbssAgeFunction(struct rtllib_device *ieee)
+{
+	struct sta_info*	AsocEntry = NULL;
+	int				idx;
+	unsigned long		CurrentTime;
+	signed long		TimeDifference;
+	struct rtllib_network *target;
+
+	CurrentTime = jiffies;
+
+	for(idx = 0; idx < PEER_MAX_ASSOC; idx++)
+	{
+		AsocEntry = ieee->peer_assoc_list[idx];
+		if(AsocEntry)
+		{
+			TimeDifference = jiffies_to_msecs(CurrentTime - AsocEntry->LastActiveTime);
+
+			if(TimeDifference > 20000)
+			{
+				printk("IbssAgeFunction(): "MAC_FMT" timeout\n", MAC_ARG(AsocEntry->macaddr));
+#ifdef RTL8192S_WAPI_SUPPORT
+				if ((ieee->WapiSupport) && (ieee->wapiInfo.bWapiEnable))
+				{
+					WapiReturnOneStaInfo(ieee, AsocEntry->macaddr, 0);
+				}
+#endif	
+				kfree(AsocEntry);
+				ieee->peer_assoc_list[idx] = NULL;
+				atomic_dec(&ieee->AsocEntryNum);
+			
+				if(atomic_read(&ieee->AsocEntryNum) == 0){
+
+					down(&ieee->wx_sem);
+					rtllib_stop_protocol(ieee,true);
+	
+					list_for_each_entry(target, &ieee->network_list, list) {
+						if (is_same_network(target, &ieee->current_network,(target->ssid_len?1:0))){
+							printk("delete sta of previous Ad-hoc\n");
+							list_del(&target->list);
+							break;
+						}
+					}
+					
+					rtllib_start_protocol(ieee);
+					up(&ieee->wx_sem);
+				}else{
+#if defined (RTL8192S_WAPI_SUPPORT)
+					if ((ieee->WapiSupport) && (ieee->wapiInfo.bWapiEnable)){
+						WAPI_CreateEvent_Send(ieee, WAPI_EVENT_CONNECT, ieee->current_network.bssid, NULL, 0);
+					}
+#endif
+				}
+			}
+		}
+	}
+	
+#ifdef TO_DO_LIST
+	if(AsocEntry_AnyStationAssociated(pMgntInfo)==false)
+		DrvIFIndicateDisassociation(Adapter, unspec_reason);
+
+	if(pMgntInfo->dot11CurrentWirelessMode == WIRELESS_MODE_G ||
+		(IS_WIRELESS_MODE_N_24G(Adapter) && pMgntInfo->pHTInfo->bCurSuppCCK)	)
+	{
+		if(nBModeStaCnt == 0)
+		{
+			pMgntInfo->bUseProtection = false;
+			ActUpdate_mCapInfo(Adapter, pMgntInfo->mCap);
+		}
+	}
+
+	if(IS_WIRELESS_MODE_N_24G(Adapter) || IS_WIRELESS_MODE_N_5G(Adapter) )
+	{
+		if(nLegacyStaCnt > 0)
+		{
+			pMgntInfo->pHTInfo->CurrentOpMode = HT_OPMODE_MIXED;
+		}
+		else
+		{
+			if((pMgntInfo->pHTInfo->bCurBW40MHz) && (n20MHzStaCnt > 0))
+				pMgntInfo->pHTInfo->CurrentOpMode = HT_OPMODE_40MHZ_PROTECT;
+			else
+				pMgntInfo->pHTInfo->CurrentOpMode = HT_OPMODE_NO_PROTECT;
+				
+		}
+	}
+
+	if(IS_WIRELESS_MODE_G(Adapter) ||
+		(IS_WIRELESS_MODE_N_24G(Adapter) && pMgntInfo->pHTInfo->bCurSuppCCK))
+	{
+		if(pMgntInfo->bUseProtection)
+		{
+			u8 CckRate[4] = { MGN_1M, MGN_2M, MGN_5_5M, MGN_11M };
+			OCTET_STRING osCckRate;
+			FillOctetString(osCckRate, CckRate, 4);
+			FilterSupportRate(pMgntInfo->mBrates, &osCckRate, false);
+			Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_BASIC_RATE, (pu1Byte)&osCckRate);
+		}
+		else
+		{
+			Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_BASIC_RATE, (pu1Byte)(&pMgntInfo->mBrates) );
+		}
+	}
+#endif
+}
+#endif
+
+static int IsPassiveChannel( struct rtllib_device *rtllib, u8 channel)
+{
+	if (MAX_CHANNEL_NUMBER < channel) {
+		printk("%s(): Invalid Channel\n", __FUNCTION__);
+		return 0;
+	}
+
+	if(rtllib->active_channel_map[channel] == 2)
+		return 1;
+
+	return 0;
+}
+
+int IsLegalChannel( struct rtllib_device *rtllib, u8 channel)
+{
+	if (MAX_CHANNEL_NUMBER < channel) {
+		printk("%s(): Invalid Channel\n", __FUNCTION__);
+		return 0;
+	}
+	if (rtllib->active_channel_map[channel] > 0)
+		return 1;
+
+	return 0;
+}
+
+
+static inline void rtllib_process_probe_response(
+	struct rtllib_device *ieee,
+	struct rtllib_probe_response *beacon,
+	struct rtllib_rx_stats *stats)
+{
+	struct rtllib_network *target;
+	struct rtllib_network *oldest = NULL;
+#ifdef CONFIG_RTLLIB_DEBUG
+	struct rtllib_info_element *info_element = &beacon->info_element[0];
+#endif
+	unsigned long flags;
+	short renew;
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13))
+	struct rtllib_network *network = kzalloc(sizeof(struct rtllib_network), GFP_ATOMIC);
+#else
+	struct rtllib_network *network = kmalloc(sizeof(*network), GFP_KERNEL);
+	memset(network,0,sizeof(*network));
+#endif
+
+	if (!network) {
+		return;
+	}
+
+#ifdef _RTL8192_EXT_PATCH_
+	if(ieee->ext_patch_rtllib_process_probe_response_1) {
+		/* 2 deonte the normal beacon packet,
+		 * discard it under mesh only mode  */
+		if(ieee->ext_patch_rtllib_process_probe_response_1(ieee, beacon, stats) != 2){
+			goto free_network;
+		} else if((ieee->iw_mode == IW_MODE_MESH)&&ieee->only_mesh) {
+			goto free_network;
+		}
+	}
+#endif
+
+	RTLLIB_DEBUG_SCAN(
+		"'%s' (" MAC_FMT "): %c%c%c%c %c%c%c%c-%c%c%c%c %c%c%c%c\n",
+		escape_essid(info_element->data, info_element->len),
+		MAC_ARG(beacon->header.addr3),
+		(beacon->capability & (1<<0xf)) ? '1' : '0',
+		(beacon->capability & (1<<0xe)) ? '1' : '0',
+		(beacon->capability & (1<<0xd)) ? '1' : '0',
+		(beacon->capability & (1<<0xc)) ? '1' : '0',
+		(beacon->capability & (1<<0xb)) ? '1' : '0',
+		(beacon->capability & (1<<0xa)) ? '1' : '0',
+		(beacon->capability & (1<<0x9)) ? '1' : '0',
+		(beacon->capability & (1<<0x8)) ? '1' : '0',
+		(beacon->capability & (1<<0x7)) ? '1' : '0',
+		(beacon->capability & (1<<0x6)) ? '1' : '0',
+		(beacon->capability & (1<<0x5)) ? '1' : '0',
+		(beacon->capability & (1<<0x4)) ? '1' : '0',
+		(beacon->capability & (1<<0x3)) ? '1' : '0',
+		(beacon->capability & (1<<0x2)) ? '1' : '0',
+		(beacon->capability & (1<<0x1)) ? '1' : '0',
+		(beacon->capability & (1<<0x0)) ? '1' : '0');
+
+	if (rtllib_network_init(ieee, beacon, network, stats)) {
+		RTLLIB_DEBUG_SCAN("Dropped '%s' (" MAC_FMT ") via %s.\n",
+				     escape_essid(info_element->data,
+						  info_element->len),
+				     MAC_ARG(beacon->header.addr3),
+				     WLAN_FC_GET_STYPE(beacon->header.frame_ctl) ==
+				     RTLLIB_STYPE_PROBE_RESP ?
+				     "PROBE RESPONSE" : "BEACON");
+		goto free_network;
+	}
+
+
+	if (!IsLegalChannel(ieee, network->channel))
+		goto free_network;
+
+	if (WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == RTLLIB_STYPE_PROBE_RESP) {
+		if (IsPassiveChannel(ieee, network->channel)) {
+			printk("GetScanInfo(): For Global Domain, "
+			       "filter probe response at channel(%d).\n", network->channel);
+			goto free_network;
+		}
+	} 
+
+	/* The network parsed correctly -- so now we scan our known networks
+	 * to see if we can find it in our list.
+	 *
+	 * NOTE:  This search is definitely not optimized.  Once its doing
+	 *        the "right thing" we'll optimize it for efficiency if
+	 *        necessary */
+
+	/* Search for this entry in the list and update it if it is
+	 * already there. */
+
+	spin_lock_irqsave(&ieee->lock, flags);
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
+	if(is_beacon(beacon->header.frame_ctl)){
+		if((ieee->iw_mode == IW_MODE_ADHOC) && (ieee->state == RTLLIB_LINKED))
+		{
+			if((network->ssid_len == ieee->current_network.ssid_len) 
+				&& (!memcmp(network->ssid,ieee->current_network.ssid,ieee->current_network.ssid_len))
+				&& (network->channel == ieee->current_network.channel)
+				&& (ieee->current_network.channel > 0) 
+				&& (ieee->current_network.channel <= 14))
+			{
+				if(!memcmp(ieee->current_network.bssid,network->bssid,6))
+				{
+					int idx = 0;
+					struct rtllib_hdr_3addr* header = NULL;
+					int idx_exist = 0;
+					if(timer_pending(&ieee->ibss_wait_timer))
+						del_timer_sync(&ieee->ibss_wait_timer);
+					header = (struct rtllib_hdr_3addr*)&(beacon->header);
+					idx_exist = IsStaInfoExist(ieee,header->addr2);
+					if(idx_exist >= PEER_MAX_ASSOC) {
+						idx = GetFreeStaInfoIdx(ieee, header->addr2);
+					} else {
+						ieee->peer_assoc_list[idx_exist]->LastActiveTime = jiffies;
+						goto no_alloc;
+					}
+					if (idx >= PEER_MAX_ASSOC - 1) {
+						printk("\n%s():ERR!!!Buffer overflow - could not append!!!",__FUNCTION__);
+						goto free_network;
+					} else {
+						ieee->peer_assoc_list[idx] = (struct sta_info *)kmalloc(sizeof(struct sta_info), GFP_ATOMIC);
+						memset(ieee->peer_assoc_list[idx], 0, sizeof(struct sta_info));
+						ieee->peer_assoc_list[idx]->LastActiveTime = jiffies;
+						memcpy(ieee->peer_assoc_list[idx]->macaddr,header->addr2,ETH_ALEN);
+						ieee->peer_assoc_list[idx]->ratr_index = 8;
+						InitStaInfo(ieee,idx);
+						atomic_inc(&ieee->AsocEntryNum);
+						ieee->peer_assoc_list[idx]->aid = AsocEntry_AssignAvailableAID(ieee, ieee->peer_assoc_list[idx]->macaddr);
+						ieee->check_ht_cap(ieee->dev,ieee->peer_assoc_list[idx],network);
+						queue_delayed_work_rsl(ieee->wq, &ieee->update_assoc_sta_info_wq, 0);
+						ieee->Adhoc_InitRateAdaptive(ieee->dev,ieee->peer_assoc_list[idx]);
+					}
+#if defined (RTL8192S_WAPI_SUPPORT)
+					if ((ieee->WapiSupport) && (ieee->wapiInfo.bWapiEnable)){
+						WapiCreateAppEventAndSend(ieee,NULL,0,header->addr2,false, false, false, 0, false);
+					}
+#endif
+				}
+				else
+				{
+#if 0
+					printk("%s(): SSID matched but BSSID mismatched.\n",__FUNCTION__);
+
+					ieee->TargetTsf = beacon->time_stamp[1];
+					ieee->TargetTsf <<= 32;
+					ieee->TargetTsf |= beacon->time_stamp[0];
+
+					ieee->CurrTsf = stats->TimeStampLow;
+
+					queue_delayed_work_rsl(ieee->wq, &ieee->check_tsf_wq, 0);
+#endif
+				}
+			}
+		}
+	}
+	if(ieee->iw_mode == IW_MODE_ADHOC){
+		if((network->ssid_len == ieee->current_network.ssid_len) 
+			&& (!memcmp(network->ssid,ieee->current_network.ssid,ieee->current_network.ssid_len))
+			&& (network->capability & WLAN_CAPABILITY_IBSS)
+			&& (ieee->state == RTLLIB_LINKED_SCANNING))
+		{
+			if(memcmp(ieee->current_network.bssid,network->bssid,6))
+			{
+				printk("%s(): SSID matched but BSSID mismatched.\n",__FUNCTION__);
+
+				ieee->TargetTsf = beacon->time_stamp[1];
+				ieee->TargetTsf <<= 32;
+				ieee->TargetTsf |= beacon->time_stamp[0];
+
+				ieee->CurrTsf = stats->TimeStampLow;
+
+				queue_delayed_work_rsl(ieee->wq, &ieee->check_tsf_wq, 0);
+			}
+		}
+	}
+#endif
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
+no_alloc:
+	if(ieee->iw_mode == IW_MODE_INFRA)
+#endif
+	{
+		if(is_same_network(&ieee->current_network, network, (network->ssid_len?1:0))) {
+			update_network(&ieee->current_network, network);
+			if((ieee->current_network.mode == IEEE_N_24G || ieee->current_network.mode == IEEE_G)
+			&& ieee->current_network.berp_info_valid){
+			if(ieee->current_network.erp_value& ERP_UseProtection)
+				ieee->current_network.buseprotection = true;
+		else
+			ieee->current_network.buseprotection = false;
+		}
+		if(is_beacon(beacon->header.frame_ctl))
+		{
+				if(ieee->state >= RTLLIB_LINKED)
+					ieee->LinkDetectInfo.NumRecvBcnInPeriod++;
+			}
+#if 0 
+			else 
+				network.flags = (~NETWORK_EMPTY_ESSID & network.flags)|(NETWORK_EMPTY_ESSID & ieee->current_network.flags);
+#endif                        
+		}
+	}
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
+	else if(ieee->iw_mode == IW_MODE_ADHOC)
+	{
+		ieee->current_network.last_scanned = jiffies;
+	}
+#endif
+	list_for_each_entry(target, &ieee->network_list, list) {
+		if (is_same_network(target, network,(target->ssid_len?1:0)))
+			break;
+		if ((oldest == NULL) ||
+		    (target->last_scanned < oldest->last_scanned))
+			oldest = target;
+	}
+
+	/* If we didn't find a match, then get a new network slot to initialize
+	 * with this beacon's information */
+	if (&target->list == &ieee->network_list) {
+		if (list_empty(&ieee->network_free_list)) {
+			/* If there are no more slots, expire the oldest */
+			list_del(&oldest->list);
+			target = oldest;
+			RTLLIB_DEBUG_SCAN("Expired '%s' (" MAC_FMT ") from "
+					     "network list.\n",
+					     escape_essid(target->ssid,
+							  target->ssid_len),
+					     MAC_ARG(target->bssid));
+		} else {
+			/* Otherwise just pull from the free list */
+			target = list_entry(ieee->network_free_list.next,
+					    struct rtllib_network, list);
+			list_del(ieee->network_free_list.next);
+		}
+
+
+#ifdef CONFIG_RTLLIB_DEBUG
+		RTLLIB_DEBUG_SCAN("Adding '%s' (" MAC_FMT ") via %s.\n",
+				     escape_essid(network->ssid,
+						  network->ssid_len),
+				     MAC_ARG(network->bssid),
+				     WLAN_FC_GET_STYPE(beacon->header.frame_ctl) ==
+				     RTLLIB_STYPE_PROBE_RESP ?
+				     "PROBE RESPONSE" : "BEACON");
+#endif
+#ifdef _RTL8192_EXT_PATCH_
+		network->ext_entry = target->ext_entry;
+#endif	
+		memcpy(target, network, sizeof(*target));
+		list_add_tail(&target->list, &ieee->network_list);
+		if(ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE)
+			rtllib_softmac_new_net(ieee, network); 
+	} else {
+		RTLLIB_DEBUG_SCAN("Updating '%s' (" MAC_FMT ") via %s.\n",
+				     escape_essid(target->ssid,
+						  target->ssid_len),
+				     MAC_ARG(target->bssid),
+				     WLAN_FC_GET_STYPE(beacon->header.frame_ctl) ==
+				     RTLLIB_STYPE_PROBE_RESP ?
+				     "PROBE RESPONSE" : "BEACON");
+		
+		/* we have an entry and we are going to update it. But this entry may
+		 * be already expired. In this case we do the same as we found a new 
+		 * net and call the new_net handler
+		 */
+		renew = !time_after(target->last_scanned + ieee->scan_age, jiffies);
+#if 0		
+		if(is_beacon(beacon->header.frame_ctl) == 0)
+			network.flags = (~NETWORK_EMPTY_ESSID & network.flags)|(NETWORK_EMPTY_ESSID & target->flags);
+		if(((network.flags & NETWORK_EMPTY_ESSID) == NETWORK_EMPTY_ESSID) \
+		    && (((network.ssid_len > 0) && (strncmp(target->ssid, network.ssid, network.ssid_len)))\
+		    ||((ieee->current_network.ssid_len == network.ssid_len)&&(strncmp(ieee->current_network.ssid, network.ssid, network.ssid_len) == 0)&&(ieee->state == RTLLIB_NOLINK))))
+			renew = 1;
+#else
+		if((!target->ssid_len) &&   
+			(((network->ssid_len > 0) && (target->hidden_ssid_len == 0)) 
+			|| ((ieee->current_network.ssid_len == network->ssid_len) && 
+			   (strncmp(ieee->current_network.ssid, network->ssid, network->ssid_len) == 0) && 
+			   (ieee->state == RTLLIB_NOLINK)))
+			) { 
+			renew = 1;
+		}
+#endif
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
+		if(ieee->iw_mode == IW_MODE_ADHOC)
+			target->last_scanned = jiffies;
+		else
+			update_network(target, network);
+#else
+		update_network(target, network);
+#endif
+		if(renew && (ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE))
+			rtllib_softmac_new_net(ieee, network); 
+	}
+
+	spin_unlock_irqrestore(&ieee->lock, flags);
+	if (is_beacon(beacon->header.frame_ctl)&&is_same_network(&ieee->current_network, network, (network->ssid_len?1:0))&&\
+		(ieee->state == RTLLIB_LINKED)) {
+		if(ieee->handle_beacon != NULL) {
+			ieee->handle_beacon(ieee->dev,beacon,&ieee->current_network);
+		}	
+	}
+free_network:
+	kfree(network);
+	return;	
+}
+
+void rtllib_rx_mgt(struct rtllib_device *ieee,
+                      struct sk_buff *skb,
+		      struct rtllib_rx_stats *stats)
+{
+    struct rtllib_hdr_4addr *header = (struct rtllib_hdr_4addr *)skb->data ;
+#if 0
+    if(ieee->sta_sleep || (ieee->ps != RTLLIB_PS_DISABLED &&
+                ieee->iw_mode == IW_MODE_INFRA && 
+                ieee->state == RTLLIB_LINKED))
+    {       
+        tasklet_schedule(&ieee->ps_task);
+    }
+#endif
+    if(WLAN_FC_GET_STYPE(header->frame_ctl) != RTLLIB_STYPE_PROBE_RESP &&
+            WLAN_FC_GET_STYPE(header->frame_ctl) != RTLLIB_STYPE_BEACON)
+        ieee->last_rx_ps_time = jiffies;
+
+    switch (WLAN_FC_GET_STYPE(header->frame_ctl)) {
+
+        case RTLLIB_STYPE_BEACON:
+            RTLLIB_DEBUG_MGMT("received BEACON (%d)\n",
+                    WLAN_FC_GET_STYPE(header->frame_ctl));
+            RTLLIB_DEBUG_SCAN("Beacon\n");
+            rtllib_process_probe_response(
+                    ieee, (struct rtllib_probe_response *)header, stats);
+			
+#ifdef ENABLE_LPS
+            if(ieee->sta_sleep || (ieee->ps != RTLLIB_PS_DISABLED &&
+                        ieee->iw_mode == IW_MODE_INFRA && 
+                        ieee->state == RTLLIB_LINKED))
+            {       
+                tasklet_schedule(&ieee->ps_task);
+            }
+#endif
+
+            break;
+
+        case RTLLIB_STYPE_PROBE_RESP:
+            RTLLIB_DEBUG_MGMT("received PROBE RESPONSE (%d)\n",
+                    WLAN_FC_GET_STYPE(header->frame_ctl));
+            RTLLIB_DEBUG_SCAN("Probe response\n");
+            rtllib_process_probe_response(
+                    ieee, (struct rtllib_probe_response *)header, stats);
+            break;
+        case RTLLIB_STYPE_PROBE_REQ:
+            RTLLIB_DEBUG_MGMT("received PROBE RESQUEST (%d)\n",
+                    WLAN_FC_GET_STYPE(header->frame_ctl));
+            RTLLIB_DEBUG_SCAN("Probe request\n");
+            if ((ieee->softmac_features & IEEE_SOFTMAC_PROBERS) &&
+                    ((ieee->iw_mode == IW_MODE_ADHOC ||
+                      ieee->iw_mode == IW_MODE_MASTER) &&
+                     ieee->state == RTLLIB_LINKED)){
+                rtllib_rx_probe_rq(ieee, skb);
+            }
+#ifdef _RTL8192_EXT_PATCH_
+			if((ieee->iw_mode == IW_MODE_MESH) && ieee->ext_patch_rtllib_rx_mgt_on_probe_req )
+				ieee->ext_patch_rtllib_rx_mgt_on_probe_req( ieee, (struct rtllib_probe_request *)header, stats);
+#endif 
+            break;
+    }
+
+#if 0
+#ifdef CONFIG_CFG_80211 
+	if((rtllib_act_scanning(ieee,false) == true) && ((WLAN_FC_GET_STYPE(header->frame_ctl) ==RTLLIB_STYPE_PROBE_RESP) ||
+		(WLAN_FC_GET_STYPE(header->frame_ctl) ==RTLLIB_STYPE_BEACON)))
+		return ieee80211_scan_rx(ieee, skb, stats);
+#endif
+#endif
+}
+
+#ifndef BUILT_IN_RTLLIB
+EXPORT_SYMBOL_RSL(rtllib_rx_mgt);
+EXPORT_SYMBOL_RSL(rtllib_rx);
+EXPORT_SYMBOL_RSL(IsLegalChannel);
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
+EXPORT_SYMBOL_RSL(IbssAgeFunction);
+EXPORT_SYMBOL_RSL(GetStaInfo);
+#endif
+#ifdef _RTL8192_EXT_PATCH_
+EXPORT_SYMBOL_RSL(rtllib_network_init);
+EXPORT_SYMBOL_RSL(rtllib_parse_info_param);
+#endif
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/wapi_interface.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/wapi_interface.h
@@ -0,0 +1,98 @@
+#ifndef __INC_WAPI_INTERFACE_H
+#define __INC_WAPI_INTERFACE_H
+#include <linux/spinlock.h>
+#include <linux/if_ether.h> /* ETH_ALEN */
+
+/*************************************************************
+ * WAPI EVENT QUEUE : 										 *
+ * Buffer events from driver to application.            					 * 
+ *************************************************************/
+#define WAPI_MAX_BUFF_LEN		2000	
+#define WAPI_MAX_QUEUE_LEN		6
+
+typedef enum
+{
+	E_WAPI_OK = 0,
+	E_WAPI_ITEM_TOO_LARGE = 1,
+	E_WAPI_QFULL = 2,
+	E_WAPI_QEMPTY = 3,
+	E_WAPI_QNULL = 4		
+}WAPI_QUEUE_RET_VAL;
+
+typedef struct _WAPI_QUEUE_NODE
+{
+    u16  ItemSize;
+    u8   Item[WAPI_MAX_BUFF_LEN];
+}WAPI_QUEUE_NODE;
+
+typedef struct _WAPI_QUEUE
+{
+    int     Head;
+    int     Tail;
+    int     NumItem;
+    int     MaxItem;
+    WAPI_QUEUE_NODE        ItemArray[WAPI_MAX_QUEUE_LEN];
+    int	MaxData;
+}WAPI_QUEUE;
+
+typedef enum{
+    WAPI_EVENT_RCV_PREAUTHENTICATE = 1, 
+    WAPI_EVENT_RCV_STAKEY_REQUEST = 2,
+    WAPI_EVENT_RCV_AUTHENTICATE_ACTIVE = 3,
+    WAPI_EVENT_RCV_ACCESS_AUTHENTICATE_REQUEST = 4,
+    WAPI_EVENT_RCV_ACCESS_AUTHENTICATE_RESPONSE = 5,
+    WAPI_EVENT_RCV_CERTIFICATE_AUTHENTICATE_REQUEST = 6,
+    WAPI_EVENT_RCV_CERTIFICATE_AUTHENTICATE_RESPONSE = 7,
+    WAPI_EVENT_RCV_USK_REQUEST = 8,
+    WAPI_EVENT_RCV_USK_RESPONSE = 9,                    
+    WAPI_EVENT_RCV_USK_CONFIRM = 10,
+    WAPI_EVENT_RCV_MSK_NOTIFICATION = 11,
+    WAPI_EVENT_RCV_MSK_RESPONSE = 12,                   
+    WAPI_EVENT_AE_UPDATE_BK = 13,
+    WAPI_EVENT_AE_UPDATE_USK = 14,
+    WAPI_EVENT_AE_UPDATE_MSK = 15,
+    WAPI_EVENT_ASUE_UPDATE_BK = 16,
+    WAPI_EVENT_ASUE_UPDATE_USK = 17,
+    WAPI_EVENT_FIRST_AUTHENTICATOR = 18,
+    WAPI_EVENT_CONNECT = 19,
+    WAPI_EVENT_DISCONNECT = 20,
+    WAPI_EVENT_MAX_NUM = 21
+} WAPI_EVENT_ID;
+
+typedef struct _WAPI_EVENT_T{
+    u8	EventId;
+    u8	MACAddr[ETH_ALEN];
+    u16	BuffLength;
+    u8  Buff[0];
+}__attribute__ ((packed))WAPI_EVENT_T;
+
+#define WAPI_IsEmptyQueue(q) (q->NumItem==0 ? 1:0)
+#define WAPI_IsFullQueue(q) (q->NumItem==q->MaxItem? 1:0)
+#define WAPI_NumItemQueue(q) q->NumItem
+
+void WAPI_InitQueue(WAPI_QUEUE *q, int szMaxItem, int szMaxData);
+int WAPI_EnQueue(spinlock_t *plock, WAPI_QUEUE *q, u8 *item, int itemsize);
+int WAPI_DeQueue(spinlock_t *plock, WAPI_QUEUE *q, u8 *item, int *itemsize);
+void WAPI_PrintQueue(WAPI_QUEUE *q);
+
+extern int pid_wapi;
+extern void notifyWapiApplication(void);
+/*************************************************************
+ * WAPI IOCTL: FROM APPLICATION TO DRIVER 					 *
+ *************************************************************/
+#define WAPI_CMD_GET_WAPI_SUPPORT 	0X8B81
+#define WAPI_CMD_SET_WAPI_ENABLE 	0X8B82
+#define WAPI_CMD_SET_WAPI_PSK	 	0X8B83
+#define WAPI_CMD_SET_KEY 				0X8B84
+#define WAPI_CMD_SET_MULTICAST_PN 	0X8B85
+#define WAPI_CMD_GET_PN 				0X8B86
+#define WAPI_CMD_GET_WAPIIE 			0X8B87
+#define WAPI_CMD_SET_SSID				0X8B88
+#define WAPI_CMD_GET_BSSID			0X8B89
+#define WAPI_CMD_SET_IW_MODE			0X8B8b
+#define WAPI_CMD_SET_DISASSOCIATE		0X8B8c
+#define WAPI_CMD_SAVE_PID			0X8B8d
+#define WAPI_CMD_DEQUEUE 				0X8B90
+
+#endif 
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/rtllib.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/rtllib.h
@@ -0,0 +1,4134 @@
+/*
+ * Merged with mainline rtllib.h in Aug 2004.  Original ieee802_11
+ * remains copyright by the original authors
+ *
+ * Portions of the merged code are based on Host AP (software wireless
+ * LAN access point) driver for Intersil Prism2/2.5/3.
+ *
+ * Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
+ * <jkmaline@cc.hut.fi>
+ * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
+ *
+ * Adaption to a generic IEEE 802.11 stack by James Ketrenos
+ * <jketreno@linux.intel.com>
+ * Copyright (c) 2004, Intel Corporation
+ *
+ * Modified for Realtek's wi-fi cards by Andrea Merello
+ * <andreamrl@tiscali.it>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation. See README and COPYING for
+ * more details.
+ */
+#ifndef RTLLIB_H
+#define RTLLIB_H
+#include <linux/if_ether.h> /* ETH_ALEN */
+#include <linux/kernel.h>   /* ARRAY_SIZE */
+#include <linux/version.h>
+#include <linux/module.h>
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
+#include <linux/jiffies.h>
+#else
+#include <linux/jffs.h>
+#include <linux/tqueue.h>
+#endif
+#include <linux/timer.h>
+#include <linux/sched.h>
+
+#include <linux/delay.h>
+#include <linux/wireless.h>
+
+#ifdef CONFIG_CFG_80211 
+#include <net/cfg80211.h>
+#endif
+
+#include "rtl819x_HT.h"
+#include "rtl819x_BA.h"
+#include "rtl819x_TS.h"
+
+#include <linux/netdevice.h>
+#include <linux/if_arp.h> /* ARPHRD_ETHER */
+
+#ifndef WIRELESS_SPY
+#define WIRELESS_SPY		
+#endif
+#include <net/iw_handler.h>	
+
+#if defined (RTL8192S_WAPI_SUPPORT)
+#include "wapi.h"
+#include "wapi_interface.h"
+#endif
+
+#ifndef RTK_DMP_PLATFORM
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
+#ifndef bool
+typedef enum{false = 0, true} bool;
+#endif
+#endif
+#endif
+
+#ifndef IW_MODE_MONITOR
+#define IW_MODE_MONITOR 6
+#endif
+
+#ifndef IWEVCUSTOM
+#define IWEVCUSTOM 0x8c02
+#endif
+
+#ifndef IW_CUSTOM_MAX
+/* Max number of char in custom event - use multiple of them if needed */
+#define IW_CUSTOM_MAX	256	/* In bytes */
+#endif
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
+#define jiffies_to_msecs(t)  ((t) * 1000 / HZ)
+#ifndef __bitwise
+#define __bitwise __attribute__((bitwise))
+#endif
+typedef __u16  __le16;
+
+#if (WIRELESS_EXT < 16)
+struct iw_spy_data{
+	/* --- Standard spy support --- */
+	int 			spy_number;
+	u_char 			spy_address[IW_MAX_SPY][ETH_ALEN];
+	struct iw_quality	spy_stat[IW_MAX_SPY];
+	/* --- Enhanced spy support (event) */
+	struct iw_quality	spy_thr_low; /* Low threshold */
+	struct iw_quality	spy_thr_high; /* High threshold */
+	u_char			spy_thr_under[IW_MAX_SPY];
+}; 
+#endif
+#endif
+
+#ifndef container_of
+/**
+ * container_of - cast a member of a structure out to the containing structure
+ *
+ * @ptr:        the pointer to the member.
+ * @type:       the type of the container struct this is embedded in.
+ * @member:     the name of the member within the struct.
+ *
+ */
+#define container_of(ptr, type, member) ({                      \
+        const typeof( ((type *)0)->member ) *__mptr = (ptr);    \
+        (type *)( (char *)__mptr - offsetof(type,member) );})
+#endif
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18))
+#define skb_tail_pointer_rsl(skb) skb_tail_pointer(skb)
+#else
+#define skb_tail_pointer_rsl(skb) skb->tail
+#endif
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
+	#define EXPORT_SYMBOL_RSL(x) EXPORT_SYMBOL(x)
+#else
+	#define EXPORT_SYMBOL_RSL(x) EXPORT_SYMBOL_NOVERS(x)
+#endif
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
+static inline void tq_init(struct tq_struct * task, void(*func)(void *), void *data)
+{
+	task->routine = func;
+	task->data 	= data;
+	INIT_LIST_HEAD(&task->list);
+	task->sync = 0;
+}
+#endif
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10))
+static inline void setup_timer(struct timer_list * timer, void(*function)(unsigned long), unsigned long data)
+{
+	timer->function = function;
+	timer->data 	= data;
+}
+#endif
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
+	typedef struct delayed_work delayed_work_struct_rsl;
+	#define queue_delayed_work_rsl(x,y,z) queue_delayed_work(x,y,z)
+	#define INIT_DELAYED_WORK_RSL(x,y,z) INIT_DELAYED_WORK(x,y)
+#elif LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,40)
+	typedef struct tq_struct delayed_work_struct_rsl;
+	#define queue_delayed_work_rsl(x,y,z) schedule_task(y)
+	#define INIT_DELAYED_WORK_RSL(x,y,z) tq_init(x,y,z)
+#else
+	typedef struct work_struct delayed_work_struct_rsl;
+	#define queue_delayed_work_rsl(x,y,z) queue_delayed_work(x,y,z)
+	#define INIT_DELAYED_WORK_RSL(x,y,z) INIT_WORK(x,y,z)
+#endif
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)
+	typedef struct work_struct work_struct_rsl;
+	#define queue_work_rsl(x,y) queue_work(x,y)
+	#define INIT_WORK_RSL(x,y,z) INIT_WORK(x,y)
+#elif LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,40)
+	typedef struct tq_struct work_struct_rsl;
+	#define queue_work_rsl(x,y) schedule_task(y)
+	#define INIT_WORK_RSL(x,y,z) tq_init(x,y,z)
+#else
+	typedef struct work_struct work_struct_rsl;
+	#define queue_work_rsl(x,y) queue_work(x,y)
+	#define INIT_WORK_RSL(x,y,z) INIT_WORK(x,y,z)
+#endif
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)	
+	#define container_of_work_rsl(x,y,z) container_of(x,y,z)
+	#define container_of_dwork_rsl(x,y,z) container_of(container_of(x, struct delayed_work, work), y, z) 
+#else
+	#define container_of_work_rsl(x,y,z) (x)
+	#define container_of_dwork_rsl(x,y,z) (x) 
+#endif
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,4,20)) && (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
+static inline char *
+iwe_stream_add_event_rsl(struct iw_request_info *info,
+			char *     stream,         /* Stream of events */
+			char *     ends,           /* End of stream */
+			struct iw_event *iwe,      /* Payload */
+			int        event_len)      /* Real size of payload */
+{
+        /* Check if it's possible */
+        if((stream + event_len) < ends) {
+                iwe->len = event_len;
+		ndelay(1);   
+                memcpy(stream, (char *) iwe, event_len);
+                stream += event_len;
+        }
+        return stream;
+}
+#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)
+	#define iwe_stream_add_event_rsl(info,start,stop,iwe,len) iwe_stream_add_event(info,start,stop,iwe,len)
+#else
+	#define iwe_stream_add_event_rsl(info,start,stop,iwe,len) iwe_stream_add_event(start,stop,iwe,len)
+#endif
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)
+	#define iwe_stream_add_point_rsl(info,start,stop,iwe,p) iwe_stream_add_point(info,start,stop,iwe,p)
+#else
+	#define iwe_stream_add_point_rsl(info,start,stop,iwe,p) iwe_stream_add_point(start,stop,iwe,p)
+#endif
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0) 
+	#define usb_alloc_urb_rsl(x,y) usb_alloc_urb(x,y)
+	#define usb_submit_urb_rsl(x,y) usb_submit_urb(x,y)
+#else
+	#define usb_alloc_urb_rsl(x,y) usb_alloc_urb(x)
+	#define usb_submit_urb_rsl(x,y) usb_submit_urb(x)
+#endif
+
+static inline void *netdev_priv_rsl(struct net_device *dev)
+{
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0) 
+	return netdev_priv(dev);
+#else
+	return dev->priv;
+#endif
+}
+
+#define KEY_TYPE_NA		0x0
+#define KEY_TYPE_WEP40 		0x1
+#define KEY_TYPE_TKIP		0x2
+#define KEY_TYPE_CCMP		0x4
+#define KEY_TYPE_WEP104		0x5
+#if defined (RTL8192S_WAPI_SUPPORT)
+#define KEY_TYPE_SMS4		0x8
+#endif
+/* added for rtl819x tx procedure */
+#define MAX_QUEUE_SIZE		0x10
+
+#if defined(RTL8192SU) || defined(RTL8190P) ||defined(RTL8192U) ||defined(RTL8192E)
+#define BK_QUEUE                               0
+#define BE_QUEUE                               1
+#define VI_QUEUE                               2
+#define VO_QUEUE                               3
+#define HCCA_QUEUE                             4
+#define TXCMD_QUEUE                            5
+#define MGNT_QUEUE                             6
+#define HIGH_QUEUE                             7
+#define BEACON_QUEUE                           8
+#elif defined(RTL8192SE)
+#define BK_QUEUE                               0
+#define BE_QUEUE                               1
+#define VI_QUEUE                               2
+#define VO_QUEUE                               3
+#define BEACON_QUEUE                          4
+#define TXCMD_QUEUE                            5
+#define MGNT_QUEUE                             6
+#define HIGH_QUEUE                             7
+#define HCCA_QUEUE                             8
+
+#elif defined(RTL8192CE)
+
+#define BK_QUEUE						0		
+#define BE_QUEUE						1		
+#define VI_QUEUE						2		
+#define VO_QUEUE						3		
+#define BEACON_QUEUE				4		
+#define TXCMD_QUEUE						5		
+#define MGNT_QUEUE						6	
+#define HIGH_QUEUE						7	
+#define HCCA_QUEUE					8
+#endif
+
+#ifdef RTL8192CE
+#define LOW_QUEUE						BE_QUEUE
+#define NORMAL_QUEUE					MGNT_QUEUE
+#else
+#define LOW_QUEUE                              BE_QUEUE
+#define NORMAL_QUEUE                           MGNT_QUEUE
+#endif
+
+#ifndef IW_MODE_MESH 
+#define IW_MODE_MESH			7	
+#endif
+#ifdef _RTL8192_EXT_PATCH_
+#define WIFI_MESH_TYPE	RTLLIB_FTYPE_DATA
+
+#define WLAN_MESH_HDR_LEN 6
+#define WLAN_MESH_HDR_6ADDR_LEN 18			
+#define WLAN_MESH_HDR_4ADDR_LEN 6			
+#define MAX_MP 						65			
+#define IEEE_MESH_MAC_HASH_SIZE 31
+#define MAX_MESH_ID_LEN 33
+#define MAX_HOST_NAME_LENGTH			33
+#endif
+#define AMSDU_SUBHEADER_LEN 14
+#define SWRF_TIMEOUT				50
+
+#define IE_CISCO_FLAG_POSITION		0x08	
+#define SUPPORT_CKIP_MIC			0x08	
+#define SUPPORT_CKIP_PK			0x10	
+#define	RT_RF_OFF_LEVL_ASPM			BIT0	
+#define	RT_RF_OFF_LEVL_CLK_REQ		BIT1	
+#define	RT_RF_OFF_LEVL_PCI_D3			BIT2	
+#define	RT_RF_OFF_LEVL_HALT_NIC		BIT3	
+#define	RT_RF_OFF_LEVL_FREE_FW		BIT4	
+#define	RT_RF_OFF_LEVL_FW_32K		BIT5	
+#define	RT_RF_PS_LEVEL_ALWAYS_ASPM	BIT6	
+#define	RT_RF_LPS_DISALBE_2R			BIT30	
+#define	RT_RF_LPS_LEVEL_ASPM			BIT31	
+#define	RT_IN_PS_LEVEL(pPSC, _PS_FLAG)	((pPSC->CurPsLevel & _PS_FLAG) ? true : false)
+#define	RT_CLEAR_PS_LEVEL(pPSC, _PS_FLAG)	(pPSC->CurPsLevel &= (~(_PS_FLAG)))
+#define	RT_SET_PS_LEVEL(pPSC, _PS_FLAG)	(pPSC->CurPsLevel |= _PS_FLAG)
+
+#if defined (RTL8192S_WAPI_SUPPORT)
+#define SMS4_MIC_LEN                16
+#define WAPI_EXT_LEN                18
+#define MAX_WAPI_IE_LEN		255
+#define sMacHdrLng				24		
+#endif
+
+/* defined for skb cb field */
+/* At most 28 byte */
+typedef struct cb_desc {
+	/* Tx Desc Related flags (8-9) */
+	u8 bLastIniPkt:1;
+	u8 bCmdOrInit:1;
+	u8 bFirstSeg:1;
+	u8 bLastSeg:1;
+	u8 bEncrypt:1;
+	u8 bTxDisableRateFallBack:1;
+	u8 bTxUseDriverAssingedRate:1;
+	u8 bHwSec:1; 
+
+	u8 nStuckCount; 
+
+	/* Tx Firmware Relaged flags (10-11)*/
+	u8 bCTSEnable:1;
+	u8 bRTSEnable:1;
+	u8 bUseShortGI:1;
+	u8 bUseShortPreamble:1;
+	u8 bTxEnableFwCalcDur:1;
+	u8 bAMPDUEnable:1;
+	u8 bRTSSTBC:1;
+	u8 RTSSC:1;
+
+	u8 bRTSBW:1;
+	u8 bPacketBW:1;
+	u8 bRTSUseShortPreamble:1;
+	u8 bRTSUseShortGI:1;
+	u8 bMulticast:1;
+	u8 bBroadcast:1;
+	u8 drv_agg_enable:1;
+#ifdef _RTL8192_EXT_PATCH_
+	u8 mesh_pkt:1;
+#else
+	u8 reserved2:1;
+#endif
+
+	/* Tx Desc related element(12-19) */
+	u8 rata_index;
+	u8 queue_index;
+	u16 txbuf_size;
+	u8 RATRIndex;
+#ifdef _RTL8192_EXT_PATCH_
+	u8 mesh_type:2;
+	u8 bFromAggrQ:1;
+	u8 bAMSDU:1;
+	u8 brelay_pkt:1;
+	u8 badhoc:1;
+	u8 bretry_pkt:1;
+	u8 bFromRx:1;
+#else
+	u8 bAMSDU:1;
+	u8 bFromAggrQ:1;
+	u8 reserved6:6;
+#endif
+	u8 macId;
+	u8 priority;
+
+	/* Tx firmware related element(20-27) */
+	u8 data_rate;
+	u8 rts_rate;
+	u8 ampdu_factor;
+	u8 ampdu_density;
+	u8 DrvAggrNum;
+	u8 bdhcp;
+	u16 pkt_size;
+	u8 bIsSpecialDataFrame;
+}cb_desc, *pcb_desc;
+                        
+/*--------------------------Define -------------------------------------------*/
+#define MGN_1M                  0x02
+#define MGN_2M                  0x04
+#define MGN_5_5M                0x0b
+#define MGN_11M                 0x16
+
+#define MGN_6M                  0x0c
+#define MGN_9M                  0x12
+#define MGN_12M                 0x18
+#define MGN_18M                 0x24
+#define MGN_24M                 0x30
+#define MGN_36M                 0x48
+#define MGN_48M                 0x60
+#define MGN_54M                 0x6c
+
+#define MGN_MCS0                0x80
+#define MGN_MCS1                0x81
+#define MGN_MCS2                0x82
+#define MGN_MCS3                0x83
+#define MGN_MCS4                0x84
+#define MGN_MCS5                0x85
+#define MGN_MCS6                0x86
+#define MGN_MCS7                0x87
+#define MGN_MCS8                0x88
+#define MGN_MCS9                0x89
+#define MGN_MCS10               0x8a
+#define MGN_MCS11               0x8b
+#define MGN_MCS12               0x8c
+#define MGN_MCS13               0x8d
+#define MGN_MCS14               0x8e
+#define MGN_MCS15               0x8f
+#define	MGN_MCS0_SG			0x90
+#define	MGN_MCS1_SG			0x91
+#define	MGN_MCS2_SG			0x92
+#define	MGN_MCS3_SG			0x93
+#define	MGN_MCS4_SG			0x94
+#define	MGN_MCS5_SG			0x95
+#define	MGN_MCS6_SG			0x96
+#define	MGN_MCS7_SG			0x97
+#define	MGN_MCS8_SG			0x98
+#define	MGN_MCS9_SG			0x99
+#define	MGN_MCS10_SG		0x9a
+#define	MGN_MCS11_SG		0x9b
+#define	MGN_MCS12_SG		0x9c
+#define	MGN_MCS13_SG		0x9d
+#define	MGN_MCS14_SG		0x9e
+#define	MGN_MCS15_SG		0x9f
+
+
+enum	_ReasonCode{
+	unspec_reason	= 0x1,
+	auth_not_valid	= 0x2,
+	deauth_lv_ss	= 0x3, 
+	inactivity		= 0x4,
+	ap_overload 	= 0x5, 
+	class2_err		= 0x6,
+	class3_err		= 0x7, 
+	disas_lv_ss 	= 0x8,
+	asoc_not_auth	= 0x9,
+
+	mic_failure 	= 0xe,
+
+	invalid_IE		= 0x0d,
+	four_way_tmout	= 0x0f,
+	two_way_tmout	= 0x10,
+	IE_dismatch 	= 0x11,
+	invalid_Gcipher = 0x12,
+	invalid_Pcipher = 0x13,
+	invalid_AKMP	= 0x14,
+	unsup_RSNIEver = 0x15,
+	invalid_RSNIE	= 0x16,
+	auth_802_1x_fail= 0x17,
+	ciper_reject		= 0x18,
+
+	QoS_unspec		= 0x20, 
+	QAP_bandwidth	= 0x21, 
+	poor_condition	= 0x22, 
+	no_facility 	= 0x23, 
+	req_declined	= 0x25, 
+	invalid_param	= 0x26, 
+	req_not_honored= 0x27,	
+	TS_not_created	= 0x2F, 
+	DL_not_allowed	= 0x30, 
+	dest_not_exist	= 0x31, 
+	dest_not_QSTA	= 0x32, 
+};
+
+typedef enum _HAL_DEF_VARIABLE{
+	HAL_DEF_TPC_ENABLE,				
+	HAL_DEF_INIT_GAIN, 				
+	HAL_DEF_PROT_IMP_MODE,			
+	HAL_DEF_HIGH_POWER_MECHANISM,	
+	HAL_DEF_RATE_ADAPTIVE_MECHANISM,	
+	HAL_DEF_ANTENNA_DIVERSITY_MECHANISM,	
+	HAL_DEF_LED,					
+	HAL_DEF_CW_MAX_MIN,				
+	 
+	HAL_DEF_WOWLAN,
+	HAL_DEF_ENDPOINTS,				
+	HAL_DEF_MIN_TX_POWER_DBM,		
+	HAL_DEF_MAX_TX_POWER_DBM,		
+	HW_DEF_EFUSE_REPG_SECTION1_FLAG, 
+	HW_DEF_EFUSE_REPG_DATA, 
+	HW_DEF_GPIO,
+	HAL_DEF_PCI_SUPPORT_ASPM,		
+	HAL_DEF_THERMAL_VALUE,
+      HAL_DEF_USB_IN_TOKEN_REV, 
+}HAL_DEF_VARIABLE;
+
+
+typedef enum _HW_VARIABLES{
+	HW_VAR_ETHER_ADDR,
+	HW_VAR_MULTICAST_REG,		
+	HW_VAR_BASIC_RATE,
+	HW_VAR_BSSID,
+	HW_VAR_MEDIA_STATUS,
+	HW_VAR_SECURITY_CONF,
+	HW_VAR_BEACON_INTERVAL,
+	HW_VAR_ATIM_WINDOW,	
+	HW_VAR_LISTEN_INTERVAL,
+	HW_VAR_CS_COUNTER,
+	HW_VAR_DEFAULTKEY0,
+	HW_VAR_DEFAULTKEY1,
+	HW_VAR_DEFAULTKEY2,
+	HW_VAR_DEFAULTKEY3,
+	HW_VAR_SIFS,
+	HW_VAR_DIFS,
+	HW_VAR_EIFS,
+	HW_VAR_SLOT_TIME,
+	HW_VAR_ACK_PREAMBLE,
+	HW_VAR_CW_CONFIG,
+	HW_VAR_CW_VALUES,
+	HW_VAR_RATE_FALLBACK_CONTROL,
+	HW_VAR_CONTENTION_WINDOW,
+	HW_VAR_RETRY_COUNT,
+	HW_VAR_TR_SWITCH,
+	HW_VAR_COMMAND,			
+	HW_VAR_WPA_CONFIG,		
+	HW_VAR_AMPDU_MIN_SPACE,	
+	HW_VAR_SHORTGI_DENSITY,	
+	HW_VAR_AMPDU_FACTOR,
+	HW_VAR_MCS_RATE_AVAILABLE,
+	HW_VAR_AC_PARAM,			
+	HW_VAR_ACM_CTRL,			
+	HW_VAR_DIS_Req_Qsize,		
+	HW_VAR_CCX_CHNL_LOAD,		
+	HW_VAR_CCX_NOISE_HISTOGRAM,	
+	HW_VAR_CCX_CLM_NHM,			
+	HW_VAR_TxOPLimit,				
+	HW_VAR_TURBO_MODE,			
+	HW_VAR_RF_STATE, 			
+	HW_VAR_RF_OFF_BY_HW,		
+	HW_VAR_BUS_SPEED, 		
+        HW_VAR_SET_DEV_POWER,	
+
+	HW_VAR_RCR,				
+	HW_VAR_RATR_0,
+	HW_VAR_RRSR,
+	HW_VAR_CPU_RST,
+	HW_VAR_CECHK_BSSID,
+        HW_VAR_LBK_MODE,			
+	HW_VAR_AES_11N_FIX,
+	HW_VAR_USB_RX_AGGR,
+	HW_VAR_USER_CONTROL_TURBO_MODE,
+	HW_VAR_RETRY_LIMIT,
+	HW_VAR_INIT_TX_RATE,  
+	HW_VAR_TX_RATE_REG,  
+	HW_VAR_EFUSE_USAGE, 
+	HW_VAR_EFUSE_BYTES,
+	HW_VAR_AUTOLOAD_STATUS, 
+	HW_VAR_RF_2R_DISABLE, 
+	HW_VAR_SET_RPWM,
+	HW_VAR_H2C_FW_PWRMODE, 
+	HW_VAR_H2C_FW_JOINBSSRPT, 
+	HW_VAR_1X1_RECV_COMBINE,	
+	HW_VAR_STOP_SEND_BEACON,
+	HW_VAR_TSF_TIMER,			
+	HW_VAR_IO_CMD,
+	HW_VAR_HANDLE_FW_C2H,		
+	HW_VAR_DL_FW_RSVD_PAGE, 		
+	HW_VAR_AID,				
+	HW_VAR_HW_SEQ_ENABLE,		
+	HW_VAR_CORRECT_TSF,			
+	HW_VAR_BCN_VALID,				
+	HW_VAR_FWLPS_RF_ON,			
+	HW_VAR_DUAL_TSF_RST,			
+        HW_VAR_H2C_FW_UPDATE_GTK, 
+        HW_VAR_WF_MASK,	
+	HW_VAR_WF_CRC,	
+	HW_VAR_WF_IS_MAC_ADDR, 
+	HW_VAR_H2C_FW_OFFLOAD, 
+	HW_VAR_RESET_WFCRC, 
+	HW_VAR_SWITCH_EPHY_WoWLAN, 
+}HW_VARIABLES;
+
+
+#define aSifsTime	 (((priv->rtllib->current_network.mode == IEEE_A)||(priv->rtllib->current_network.mode == IEEE_N_24G)||(priv->rtllib->current_network.mode == IEEE_N_5G))? 16 : 10)
+
+#define MGMT_QUEUE_NUM 5
+
+#define IEEE_CMD_SET_WPA_PARAM			1
+#define	IEEE_CMD_SET_WPA_IE			2
+#define IEEE_CMD_SET_ENCRYPTION			3
+#define IEEE_CMD_MLME				4
+
+#define IEEE_PARAM_WPA_ENABLED			1
+#define IEEE_PARAM_TKIP_COUNTERMEASURES		2
+#define IEEE_PARAM_DROP_UNENCRYPTED		3
+#define IEEE_PARAM_PRIVACY_INVOKED		4
+#define IEEE_PARAM_AUTH_ALGS			5
+#define IEEE_PARAM_IEEE_802_1X			6
+#define IEEE_PARAM_WPAX_SELECT			7
+#define IEEE_PROTO_WPA				1	
+#define IEEE_PROTO_RSN				2
+#define IEEE_WPAX_USEGROUP			0
+#define IEEE_WPAX_WEP40				1
+#define IEEE_WPAX_TKIP				2
+#define IEEE_WPAX_WRAP   			3
+#define IEEE_WPAX_CCMP				4
+#define IEEE_WPAX_WEP104			5
+
+#define IEEE_KEY_MGMT_IEEE8021X			1
+#define IEEE_KEY_MGMT_PSK			2
+
+#define IEEE_MLME_STA_DEAUTH			1
+#define IEEE_MLME_STA_DISASSOC			2
+
+
+#define IEEE_CRYPT_ERR_UNKNOWN_ALG		2
+#define IEEE_CRYPT_ERR_UNKNOWN_ADDR		3
+#define IEEE_CRYPT_ERR_CRYPT_INIT_FAILED	4
+#define IEEE_CRYPT_ERR_KEY_SET_FAILED		5
+#define IEEE_CRYPT_ERR_TX_KEY_SET_FAILED	6
+#define IEEE_CRYPT_ERR_CARD_CONF_FAILED		7
+#define	IEEE_CRYPT_ALG_NAME_LEN			16
+
+#define MAX_IE_LEN  0xff
+#ifdef _RTL8192_EXT_PATCH_
+#define ENABLE_NULL_PT_DEBUG
+#endif
+#ifdef ENABLE_NULL_PT_DEBUG
+#define RT_ASSERT_RET(_Exp)								\
+		if(!(_Exp))									\
+		{											\
+			printk("Rtl819x: ");					\
+                	printk( "Assertion failed! %s,%s,line=%d\n", \
+                	#_Exp,__FUNCTION__,__LINE__);          \
+			return;						\
+		}
+#define RT_ASSERT_RET_VALUE(_Exp,Ret)								\
+		if(!(_Exp))									\
+		{											\
+			printk("Rtl819x: ");					\
+                	printk( "Assertion failed! %s,%s,line=%d\n", \
+                	#_Exp,__FUNCTION__,__LINE__);          \
+			return (Ret);						\
+		}
+#else
+#define RT_ASSERT_RET(_Exp) do {} while(0)
+#define RT_ASSERT_RET_VALUE(_Exp,Ret) do {} while(0)
+#endif
+
+typedef struct ieee_param {
+	u32 cmd;
+	u8 sta_addr[ETH_ALEN];
+        union {
+		struct {
+			u8 name;
+			u32 value;
+		} wpa_param;
+		struct {
+			u32 len;
+			u8 reserved[32];
+			u8 data[0];
+		} wpa_ie;
+	        struct{
+			int command;
+    			int reason_code;
+		} mlme;
+		struct {
+			u8 alg[IEEE_CRYPT_ALG_NAME_LEN];
+			u8 set_tx;
+			u32 err;
+			u8 idx;
+			u8 seq[8]; /* sequence counter (set: RX, get: TX) */
+			u16 key_len;
+			u8 key[0];
+		} crypt;
+	} u;
+}ieee_param;
+
+
+#if WIRELESS_EXT < 17
+#define IW_QUAL_QUAL_INVALID   0x10
+#define IW_QUAL_LEVEL_INVALID  0x20
+#define IW_QUAL_NOISE_INVALID  0x40
+#define IW_QUAL_QUAL_UPDATED   0x1
+#define IW_QUAL_LEVEL_UPDATED  0x2
+#define IW_QUAL_NOISE_UPDATED  0x4
+#endif
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9))
+#define MSECS(t)	(HZ * ((t) / 1000) + (HZ * ((t) % 1000)) / 1000)
+static inline unsigned long msleep_interruptible_rsl(unsigned int msecs)
+{
+         unsigned long timeout = MSECS(msecs) + 1;
+ 
+         while (timeout) {
+                 set_current_state(TASK_INTERRUPTIBLE);
+                 timeout = schedule_timeout(timeout);
+         }
+         return timeout;
+}
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,31))
+static inline void msleep(unsigned int msecs)
+{
+         unsigned long timeout = MSECS(msecs) + 1;
+ 
+         while (timeout) {
+                 set_current_state(TASK_UNINTERRUPTIBLE);
+                 timeout = schedule_timeout(timeout);
+         }
+}
+#endif
+#else
+#define MSECS(t) msecs_to_jiffies(t)
+#define msleep_interruptible_rsl  msleep_interruptible
+#endif
+
+#define RTLLIB_DATA_LEN		2304
+/* Maximum size for the MA-UNITDATA primitive, 802.11 standard section
+   6.2.1.1.2.
+
+   The figure in section 7.1.2 suggests a body size of up to 2312
+   bytes is allowed, which is a bit confusing, I suspect this
+   represents the 2304 bytes of real data, plus a possible 8 bytes of
+   WEP IV and ICV. (this interpretation suggested by Ramiro Barreiro) */
+#define RTLLIB_1ADDR_LEN 10
+#define RTLLIB_2ADDR_LEN 16
+#define RTLLIB_3ADDR_LEN 24
+#define RTLLIB_4ADDR_LEN 30
+#define RTLLIB_FCS_LEN    4
+#define RTLLIB_HLEN                  (RTLLIB_4ADDR_LEN)
+#define RTLLIB_FRAME_LEN             (RTLLIB_DATA_LEN + RTLLIB_HLEN)
+#define RTLLIB_MGMT_HDR_LEN 24
+#define RTLLIB_DATA_HDR3_LEN 24
+#define RTLLIB_DATA_HDR4_LEN 30
+
+#define MIN_FRAG_THRESHOLD     256U
+#define MAX_FRAG_THRESHOLD     2346U
+#define MAX_HT_DATA_FRAG_THRESHOLD 0x2000
+
+#define HT_AMSDU_SIZE_4K 3839
+#define HT_AMSDU_SIZE_8K 7935
+
+/* Frame control field constants */
+#define RTLLIB_FCTL_VERS		0x0003
+#define RTLLIB_FCTL_FTYPE		0x000c
+#define RTLLIB_FCTL_STYPE		0x00f0
+#define RTLLIB_FCTL_FRAMETYPE	0x00fc
+#define RTLLIB_FCTL_TODS		0x0100
+#define RTLLIB_FCTL_FROMDS		0x0200
+#define RTLLIB_FCTL_DSTODS		0x0300 
+#define RTLLIB_FCTL_MOREFRAGS	0x0400
+#define RTLLIB_FCTL_RETRY		0x0800
+#define RTLLIB_FCTL_PM		0x1000
+#define RTLLIB_FCTL_MOREDATA		0x2000
+#define RTLLIB_FCTL_WEP		0x4000
+#define RTLLIB_FCTL_ORDER		0x8000
+
+#define RTLLIB_FTYPE_MGMT		0x0000
+#define RTLLIB_FTYPE_CTL		0x0004
+#define RTLLIB_FTYPE_DATA		0x0008
+
+/* management */
+#define RTLLIB_STYPE_ASSOC_REQ	0x0000
+#define RTLLIB_STYPE_ASSOC_RESP 	0x0010
+#define RTLLIB_STYPE_REASSOC_REQ	0x0020
+#define RTLLIB_STYPE_REASSOC_RESP	0x0030
+#define RTLLIB_STYPE_PROBE_REQ	0x0040
+#define RTLLIB_STYPE_PROBE_RESP	0x0050
+#define RTLLIB_STYPE_BEACON		0x0080
+#define RTLLIB_STYPE_ATIM		0x0090
+#define RTLLIB_STYPE_DISASSOC	0x00A0
+#define RTLLIB_STYPE_AUTH		0x00B0
+#define RTLLIB_STYPE_DEAUTH		0x00C0
+#define RTLLIB_STYPE_MANAGE_ACT	0x00D0
+#ifdef _RTL8192_EXT_PATCH_
+/* added for mesh action frame type */
+#ifdef COMPATIBLE_WITH_RALINK_MESH
+#define RTLLIB_STYPE_MESH_ACT        0x00F0
+#else
+#define RTLLIB_STYPE_MESH_ACT        RTLLIB_STYPE_MANAGE_ACT
+#endif
+#endif
+
+/* control */
+#define RTLLIB_STYPE_PSPOLL		0x00A0
+#define RTLLIB_STYPE_RTS		0x00B0
+#define RTLLIB_STYPE_CTS		0x00C0
+#define RTLLIB_STYPE_ACK		0x00D0
+#define RTLLIB_STYPE_CFEND		0x00E0
+#define RTLLIB_STYPE_CFENDACK	0x00F0
+#define RTLLIB_STYPE_BLOCKACK   0x0094
+
+/* data */
+#define RTLLIB_STYPE_DATA		0x0000
+#define RTLLIB_STYPE_DATA_CFACK	0x0010
+#define RTLLIB_STYPE_DATA_CFPOLL	0x0020
+#define RTLLIB_STYPE_DATA_CFACKPOLL	0x0030
+#define RTLLIB_STYPE_NULLFUNC	0x0040
+#define RTLLIB_STYPE_CFACK		0x0050
+#define RTLLIB_STYPE_CFPOLL		0x0060
+#define RTLLIB_STYPE_CFACKPOLL	0x0070
+#define RTLLIB_STYPE_QOS_DATA	0x0080 
+#define RTLLIB_STYPE_QOS_NULL	0x00C0
+
+#define RTLLIB_SCTL_FRAG		0x000F
+#define RTLLIB_SCTL_SEQ		0xFFF0
+
+/* QOS control */
+#define RTLLIB_QCTL_TID              0x000F
+
+#define	FC_QOS_BIT					BIT7
+#define IsDataFrame(pdu)			( ((pdu[0] & 0x0C)==0x08) ? true : false )
+#define	IsLegacyDataFrame(pdu)	(IsDataFrame(pdu) && (!(pdu[0]&FC_QOS_BIT)) )	
+#define IsQoSDataFrame(pframe)  ((*(u16*)pframe&(RTLLIB_STYPE_QOS_DATA|RTLLIB_FTYPE_DATA)) == (RTLLIB_STYPE_QOS_DATA|RTLLIB_FTYPE_DATA))
+#define Frame_Order(pframe)     (*(u16*)pframe&RTLLIB_FCTL_ORDER)
+#define SN_LESS(a, b)		(((a-b)&0x800)!=0)
+#define SN_EQUAL(a, b)	(a == b)
+#define MAX_DEV_ADDR_SIZE 8
+
+typedef enum _ACT_CATEGORY{
+        ACT_CAT_QOS = 1,
+        ACT_CAT_DLS = 2,
+        ACT_CAT_BA  = 3,
+        ACT_CAT_HT  = 7,
+        ACT_CAT_WMM = 17,
+#ifdef _RTL8192_EXT_PATCH_
+        ACT_CAT_MESH_PEERLINK_MGNT = 0x0f, 
+        ACT_CAT_MESH_LINK_METRIC = 0x10, 
+        ACT_CAT_MESH_PATH_SELECT = 0x11, 
+        ACT_CAT_MESH_INTERWORKING = 0x12, 
+        ACT_CAT_MESH_SECURITY_INFO = 35,
+#endif
+} ACT_CATEGORY, *PACT_CATEGORY;
+
+typedef enum _TS_ACTION{
+        ACT_ADDTSREQ = 0,
+        ACT_ADDTSRSP = 1,
+        ACT_DELTS    = 2,
+        ACT_SCHEDULE = 3,
+} TS_ACTION, *PTS_ACTION;
+
+typedef enum _BA_ACTION{
+        ACT_ADDBAREQ = 0,
+        ACT_ADDBARSP = 1,
+        ACT_DELBA    = 2,
+} BA_ACTION, *PBA_ACTION;
+#ifdef _RTL8192_EXT_PATCH_
+typedef enum _PEERLINK_ACTION{
+	ACT_PEERLINK_OPEN = 0,
+	ACT_PEERLINK_CONFIRM = 1,
+	ACT_PEERLINK_CLOSE =2,
+} PEERLINK_ACTION, *PPEERLINK_ACTION;
+
+typedef enum _LINK_METRIC_ACTION{
+	ACT_LINKMETRIC_REQ = 0,
+	ACT_LINKMETRIC_RSP = 1,
+} LINK_METRIC_ACTION, *PLINK_METRIC_ACTION;
+
+typedef enum _PATH_SELECT_ACTION{
+	ACT_PATH_REQ = 0,
+	ACT_PATH_REPLY = 1,
+	ACT_PATH_ERR =2,
+	ACT_RANN =3,
+} PATH_SELECT_ACTION, *PPATH_SELECT_ACTION;
+
+typedef enum _MESH_PEERING_PROTOCOL_VERSION_VALUE{
+	Mesh_Peering_Management_Protocol_V =42,
+	Abbreviated_Handshake_Protocol_V = 43,
+}MESH_PEERING_PROTOCOL_VERSION_VALUE;
+#endif
+
+typedef enum _InitialGainOpType{
+	IG_Backup=0,
+	IG_Restore,
+	IG_Max
+}InitialGainOpType;
+typedef enum _LED_CTL_MODE{
+        LED_CTL_POWER_ON = 1,
+        LED_CTL_LINK = 2,
+        LED_CTL_NO_LINK = 3,
+        LED_CTL_TX = 4,
+        LED_CTL_RX = 5,
+        LED_CTL_SITE_SURVEY = 6,
+        LED_CTL_POWER_OFF = 7,
+        LED_CTL_START_TO_LINK = 8,
+        LED_CTL_START_WPS = 9,
+        LED_CTL_STOP_WPS = 10,
+        LED_CTL_START_WPS_BOTTON = 11, 
+        LED_CTL_STOP_WPS_FAIL = 12, 
+	 LED_CTL_STOP_WPS_FAIL_OVERLAP = 13, 
+}LED_CTL_MODE;
+
+typedef enum _RT_RF_TYPE_DEF
+{
+	RF_1T2R = 0,
+	RF_2T4R,
+	RF_2T2R,
+	RF_1T1R,
+	RF_2T2R_GREEN,
+	RF_819X_MAX_TYPE
+}RT_RF_TYPE_DEF;
+
+typedef enum _WIRELESS_MODE {
+	WIRELESS_MODE_UNKNOWN = 0x00,
+	WIRELESS_MODE_A = 0x01,
+	WIRELESS_MODE_B = 0x02,
+	WIRELESS_MODE_G = 0x04,
+	WIRELESS_MODE_AUTO = 0x08,
+	WIRELESS_MODE_N_24G = 0x10,
+	WIRELESS_MODE_N_5G = 0x20
+} WIRELESS_MODE;
+
+typedef enum _NETWORK_TYPE{
+	WIRELESS_11B = 1,
+	WIRELESS_11G = 2,
+	WIRELESS_11A = 4,
+	WIRELESS_11N = 8
+} WIRELESS_NETWORK_TYPE;
+
+#define OUI_SUBTYPE_WMM_INFO		0
+#define OUI_SUBTYPE_WMM_PARAM	1
+#define OUI_SUBTYPE_QOS_CAPABI	5
+
+/* debug macros */
+#define CONFIG_RTLLIB_DEBUG
+#ifdef CONFIG_RTLLIB_DEBUG
+extern u32 rtllib_debug_level;
+#define RTLLIB_DEBUG(level, fmt, args...) \
+do { if (rtllib_debug_level & (level)) \
+  printk(KERN_DEBUG "rtllib: " fmt, ## args); } while (0)
+#define RTLLIB_DEBUG_DATA(level, data, datalen)	\
+	do{ if ((rtllib_debug_level & (level)) == (level))	\
+		{ 	\
+			int i;					\
+			u8* pdata = (u8*) data;			\
+			printk(KERN_DEBUG "rtllib: %s()\n", __FUNCTION__);	\
+			for(i=0; i<(int)(datalen); i++)			\
+			{						\
+				printk("%2.2x ", pdata[i]);		\
+				if ((i+1)%16 == 0) printk("\n");	\
+			}				\
+			printk("\n");			\
+		}					\
+	} while (0)		
+#else
+#define RTLLIB_DEBUG(level, fmt, args...) do {} while (0)
+#define RTLLIB_DEBUG_DATA(level, data, datalen) do {} while(0)
+#endif	/* CONFIG_RTLLIB_DEBUG */
+
+/* debug macros not dependent on CONFIG_RTLLIB_DEBUG */
+
+#define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x"
+#define MAC_ARG(x) ((u8*)(x))[0],((u8*)(x))[1],((u8*)(x))[2],((u8*)(x))[3],((u8*)(x))[4],((u8*)(x))[5]
+
+/*
+ * To use the debug system;
+ *
+ * If you are defining a new debug classification, simply add it to the #define
+ * list here in the form of:
+ *
+ * #define RTLLIB_DL_xxxx VALUE
+ *
+ * shifting value to the left one bit from the previous entry.  xxxx should be
+ * the name of the classification (for example, WEP)
+ *
+ * You then need to either add a RTLLIB_xxxx_DEBUG() macro definition for your
+ * classification, or use RTLLIB_DEBUG(RTLLIB_DL_xxxx, ...) whenever you want
+ * to send output to that classification.
+ *
+ * To add your debug level to the list of levels seen when you perform
+ *
+ * % cat /proc/net/ipw/debug_level
+ *
+ * you simply need to add your entry to the ipw_debug_levels array.
+ *
+ * If you do not see debug_level in /proc/net/ipw then you do not have
+ * CONFIG_RTLLIB_DEBUG defined in your kernel configuration
+ *
+ */
+
+#define RTLLIB_DL_INFO          (1<<0)
+#define RTLLIB_DL_WX            (1<<1)
+#define RTLLIB_DL_SCAN          (1<<2)
+#define RTLLIB_DL_STATE         (1<<3)
+#define RTLLIB_DL_MGMT          (1<<4)
+#define RTLLIB_DL_FRAG          (1<<5)
+#define RTLLIB_DL_EAP           (1<<6)
+#define RTLLIB_DL_DROP          (1<<7)
+
+#define RTLLIB_DL_TX            (1<<8)
+#define RTLLIB_DL_RX            (1<<9)
+
+#define RTLLIB_DL_HT		   (1<<10)  
+#define RTLLIB_DL_BA		   (1<<11)  
+#define RTLLIB_DL_TS		   (1<<12)  
+#define RTLLIB_DL_QOS           (1<<13)
+#define RTLLIB_DL_REORDER	   (1<<14)
+#define RTLLIB_DL_IOT	   (1<<15)
+#define RTLLIB_DL_IPS	   (1<<16)
+#define RTLLIB_DL_TRACE	   (1<<29)  
+#define RTLLIB_DL_DATA	   (1<<30)   
+#define RTLLIB_DL_ERR	   (1<<31)   
+#define RTLLIB_ERROR(f, a...) printk(KERN_ERR "rtllib: " f, ## a)
+#define RTLLIB_WARNING(f, a...) printk(KERN_WARNING "rtllib: " f, ## a)
+#define RTLLIB_DEBUG_INFO(f, a...)   RTLLIB_DEBUG(RTLLIB_DL_INFO, f, ## a)
+
+#define RTLLIB_DEBUG_WX(f, a...)     RTLLIB_DEBUG(RTLLIB_DL_WX, f, ## a)
+#define RTLLIB_DEBUG_SCAN(f, a...)   RTLLIB_DEBUG(RTLLIB_DL_SCAN, f, ## a)
+#define RTLLIB_DEBUG_STATE(f, a...)  RTLLIB_DEBUG(RTLLIB_DL_STATE, f, ## a)
+#define RTLLIB_DEBUG_MGMT(f, a...)  RTLLIB_DEBUG(RTLLIB_DL_MGMT, f, ## a)
+#define RTLLIB_DEBUG_FRAG(f, a...)  RTLLIB_DEBUG(RTLLIB_DL_FRAG, f, ## a)
+#define RTLLIB_DEBUG_EAP(f, a...)  RTLLIB_DEBUG(RTLLIB_DL_EAP, f, ## a)
+#define RTLLIB_DEBUG_DROP(f, a...)  RTLLIB_DEBUG(RTLLIB_DL_DROP, f, ## a)
+#define RTLLIB_DEBUG_TX(f, a...)  RTLLIB_DEBUG(RTLLIB_DL_TX, f, ## a)
+#define RTLLIB_DEBUG_RX(f, a...)  RTLLIB_DEBUG(RTLLIB_DL_RX, f, ## a)
+#define RTLLIB_DEBUG_QOS(f, a...)  RTLLIB_DEBUG(RTLLIB_DL_QOS, f, ## a)
+
+#ifdef CONFIG_RTLLIB_DEBUG
+/* Added by Annie, 2005-11-22. */
+#define MAX_STR_LEN     64
+/* I want to see ASCII 33 to 126 only. Otherwise, I print '?'. Annie, 2005-11-22.*/
+#define PRINTABLE(_ch)  (_ch>'!' && _ch<'~')    
+#define RTLLIB_PRINT_STR(_Comp, _TitleString, _Ptr, _Len)                            	\
+                        if((_Comp) & level)   							\
+                        {                                                                       \
+                                int             __i;                                            \
+                                u8  buffer[MAX_STR_LEN];                                    	\
+                                int length = (_Len<MAX_STR_LEN)? _Len : (MAX_STR_LEN-1) ;  	\
+                                memset(buffer, 0, MAX_STR_LEN);                      		\
+                                memcpy(buffer, (u8 *)_Ptr, length );            		\
+                                for( __i=0; __i<MAX_STR_LEN; __i++ )                            \
+                                {                                                               \
+                                     if( !PRINTABLE(buffer[__i]) )   buffer[__i] = '?';     	\
+                                }                                                               \
+                                buffer[length] = '\0';                                          \
+                                printk("Rtl819x: ");                                         	\
+                                printk(_TitleString);                                         \
+                                printk(": %d, <%s>\n", _Len, buffer);                         \
+                        }
+#else
+#define RTLLIB_PRINT_STR(_Comp, _TitleString, _Ptr, _Len)  do {} while (0)
+#endif
+
+#ifndef ETH_P_PAE
+#define ETH_P_PAE 0x888E /* Port Access Entity (IEEE 802.1X) */
+#define ETH_P_IP	0x0800		/* Internet Protocol packet	*/
+#define ETH_P_ARP	0x0806		/* Address Resolution packet	*/
+#endif /* ETH_P_PAE */
+
+#define ETH_P_PREAUTH 0x88C7 /* IEEE 802.11i pre-authentication */
+
+#ifndef ETH_P_80211_RAW
+#define ETH_P_80211_RAW (ETH_P_ECONET + 1)
+#endif
+
+/* IEEE 802.11 defines */
+
+#define P80211_OUI_LEN 3
+
+struct rtllib_snap_hdr {
+
+        u8    dsap;   /* always 0xAA */
+        u8    ssap;   /* always 0xAA */
+        u8    ctrl;   /* always 0x03 */
+        u8    oui[P80211_OUI_LEN];    /* organizational universal id */
+
+} __attribute__ ((packed));
+
+#define SNAP_SIZE sizeof(struct rtllib_snap_hdr)
+
+#define WLAN_FC_GET_VERS(fc) ((fc) & RTLLIB_FCTL_VERS)
+#define WLAN_FC_GET_TYPE(fc) ((fc) & RTLLIB_FCTL_FTYPE)
+#define WLAN_FC_GET_STYPE(fc) ((fc) & RTLLIB_FCTL_STYPE)
+#define WLAN_FC_MORE_DATA(fc) ((fc) & RTLLIB_FCTL_MOREDATA)
+
+#define WLAN_FC_GET_FRAMETYPE(fc) ((fc) & RTLLIB_FCTL_FRAMETYPE)
+#define WLAN_GET_SEQ_FRAG(seq) ((seq) & RTLLIB_SCTL_FRAG)
+#define WLAN_GET_SEQ_SEQ(seq)  (((seq) & RTLLIB_SCTL_SEQ) >> 4)
+
+#ifndef CONFIG_CFG_80211
+/* Authentication algorithms */
+#define WLAN_AUTH_OPEN 0
+#define WLAN_AUTH_SHARED_KEY 1
+#define WLAN_AUTH_LEAP 128
+
+#define WLAN_AUTH_CHALLENGE_LEN 128
+
+#define WLAN_CAPABILITY_ESS (1<<0)
+#define WLAN_CAPABILITY_IBSS (1<<1)
+#define WLAN_CAPABILITY_CF_POLLABLE (1<<2)
+#define WLAN_CAPABILITY_CF_POLL_REQUEST (1<<3)
+#define WLAN_CAPABILITY_PRIVACY (1<<4)
+#define WLAN_CAPABILITY_SHORT_PREAMBLE (1<<5)
+#define WLAN_CAPABILITY_PBCC (1<<6)
+#define WLAN_CAPABILITY_CHANNEL_AGILITY (1<<7)
+#define WLAN_CAPABILITY_SPECTRUM_MGMT (1<<8)
+#define WLAN_CAPABILITY_QOS (1<<9)
+#define WLAN_CAPABILITY_SHORT_SLOT_TIME (1<<10)
+#define WLAN_CAPABILITY_DSSS_OFDM (1<<13)
+
+/* 802.11g ERP information element */
+#define WLAN_ERP_NON_ERP_PRESENT (1<<0)
+#define WLAN_ERP_USE_PROTECTION (1<<1)
+#define WLAN_ERP_BARKER_PREAMBLE (1<<2)
+
+/* Status codes */
+enum rtllib_statuscode {
+        WLAN_STATUS_SUCCESS = 0,
+        WLAN_STATUS_UNSPECIFIED_FAILURE = 1,
+        WLAN_STATUS_CAPS_UNSUPPORTED = 10,
+        WLAN_STATUS_REASSOC_NO_ASSOC = 11,
+        WLAN_STATUS_ASSOC_DENIED_UNSPEC = 12,
+        WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG = 13,
+        WLAN_STATUS_UNKNOWN_AUTH_TRANSACTION = 14,
+        WLAN_STATUS_CHALLENGE_FAIL = 15,
+        WLAN_STATUS_AUTH_TIMEOUT = 16,
+        WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA = 17,
+        WLAN_STATUS_ASSOC_DENIED_RATES = 18,
+        /* 802.11b */
+        WLAN_STATUS_ASSOC_DENIED_NOSHORTPREAMBLE = 19,
+        WLAN_STATUS_ASSOC_DENIED_NOPBCC = 20,
+        WLAN_STATUS_ASSOC_DENIED_NOAGILITY = 21,
+        /* 802.11h */
+        WLAN_STATUS_ASSOC_DENIED_NOSPECTRUM = 22,
+        WLAN_STATUS_ASSOC_REJECTED_BAD_POWER = 23,
+        WLAN_STATUS_ASSOC_REJECTED_BAD_SUPP_CHAN = 24,
+        /* 802.11g */
+        WLAN_STATUS_ASSOC_DENIED_NOSHORTTIME = 25,
+        WLAN_STATUS_ASSOC_DENIED_NODSSSOFDM = 26,
+        /* 802.11i */
+        WLAN_STATUS_INVALID_IE = 40,
+        WLAN_STATUS_INVALID_GROUP_CIPHER = 41,
+        WLAN_STATUS_INVALID_PAIRWISE_CIPHER = 42,
+        WLAN_STATUS_INVALID_AKMP = 43,
+        WLAN_STATUS_UNSUPP_RSN_VERSION = 44,
+        WLAN_STATUS_INVALID_RSN_IE_CAP = 45,
+        WLAN_STATUS_CIPHER_SUITE_REJECTED = 46,
+};
+
+/* Reason codes */
+enum rtllib_reasoncode {
+        WLAN_REASON_UNSPECIFIED = 1,
+        WLAN_REASON_PREV_AUTH_NOT_VALID = 2,
+        WLAN_REASON_DEAUTH_LEAVING = 3,
+        WLAN_REASON_DISASSOC_DUE_TO_INACTIVITY = 4,
+        WLAN_REASON_DISASSOC_AP_BUSY = 5,
+        WLAN_REASON_CLASS2_FRAME_FROM_NONAUTH_STA = 6,
+        WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA = 7,
+        WLAN_REASON_DISASSOC_STA_HAS_LEFT = 8,
+        WLAN_REASON_STA_REQ_ASSOC_WITHOUT_AUTH = 9,
+        /* 802.11h */
+        WLAN_REASON_DISASSOC_BAD_POWER = 10,
+        WLAN_REASON_DISASSOC_BAD_SUPP_CHAN = 11,
+        /* 802.11i */
+        WLAN_REASON_INVALID_IE = 13,
+        WLAN_REASON_MIC_FAILURE = 14,
+        WLAN_REASON_4WAY_HANDSHAKE_TIMEOUT = 15,
+        WLAN_REASON_GROUP_KEY_HANDSHAKE_TIMEOUT = 16,
+        WLAN_REASON_IE_DIFFERENT = 17,
+        WLAN_REASON_INVALID_GROUP_CIPHER = 18,
+        WLAN_REASON_INVALID_PAIRWISE_CIPHER = 19,
+        WLAN_REASON_INVALID_AKMP = 20,
+        WLAN_REASON_UNSUPP_RSN_VERSION = 21,
+        WLAN_REASON_INVALID_RSN_IE_CAP = 22,
+        WLAN_REASON_IEEE8021X_FAILED = 23,
+        WLAN_REASON_CIPHER_SUITE_REJECTED = 24,
+};
+#endif
+
+#define RTLLIB_STATMASK_SIGNAL (1<<0)
+#define RTLLIB_STATMASK_RSSI (1<<1)
+#define RTLLIB_STATMASK_NOISE (1<<2)
+#define RTLLIB_STATMASK_RATE (1<<3)
+#define RTLLIB_STATMASK_WEMASK 0x7
+
+#define RTLLIB_CCK_MODULATION    (1<<0)
+#define RTLLIB_OFDM_MODULATION   (1<<1)
+
+#define RTLLIB_24GHZ_BAND     (1<<0)
+#define RTLLIB_52GHZ_BAND     (1<<1)
+
+#define RTLLIB_CCK_RATE_LEN  		4
+#define RTLLIB_CCK_RATE_1MB		        0x02
+#define RTLLIB_CCK_RATE_2MB		        0x04
+#define RTLLIB_CCK_RATE_5MB		        0x0B
+#define RTLLIB_CCK_RATE_11MB		        0x16
+#define RTLLIB_OFDM_RATE_LEN 		8
+#define RTLLIB_OFDM_RATE_6MB		        0x0C
+#define RTLLIB_OFDM_RATE_9MB		        0x12
+#define RTLLIB_OFDM_RATE_12MB		0x18
+#define RTLLIB_OFDM_RATE_18MB		0x24
+#define RTLLIB_OFDM_RATE_24MB		0x30
+#define RTLLIB_OFDM_RATE_36MB		0x48
+#define RTLLIB_OFDM_RATE_48MB		0x60
+#define RTLLIB_OFDM_RATE_54MB		0x6C
+#define RTLLIB_BASIC_RATE_MASK		0x80
+
+#define RTLLIB_CCK_RATE_1MB_MASK		(1<<0)
+#define RTLLIB_CCK_RATE_2MB_MASK		(1<<1)
+#define RTLLIB_CCK_RATE_5MB_MASK		(1<<2)
+#define RTLLIB_CCK_RATE_11MB_MASK		(1<<3)
+#define RTLLIB_OFDM_RATE_6MB_MASK		(1<<4)
+#define RTLLIB_OFDM_RATE_9MB_MASK		(1<<5)
+#define RTLLIB_OFDM_RATE_12MB_MASK		(1<<6)
+#define RTLLIB_OFDM_RATE_18MB_MASK		(1<<7)
+#define RTLLIB_OFDM_RATE_24MB_MASK		(1<<8)
+#define RTLLIB_OFDM_RATE_36MB_MASK		(1<<9)
+#define RTLLIB_OFDM_RATE_48MB_MASK		(1<<10)
+#define RTLLIB_OFDM_RATE_54MB_MASK		(1<<11)
+
+#define RTLLIB_CCK_RATES_MASK	        0x0000000F
+#define RTLLIB_CCK_BASIC_RATES_MASK	(RTLLIB_CCK_RATE_1MB_MASK | \
+	RTLLIB_CCK_RATE_2MB_MASK)
+#define RTLLIB_CCK_DEFAULT_RATES_MASK	(RTLLIB_CCK_BASIC_RATES_MASK | \
+        RTLLIB_CCK_RATE_5MB_MASK | \
+        RTLLIB_CCK_RATE_11MB_MASK)
+
+#define RTLLIB_OFDM_RATES_MASK		0x00000FF0
+#define RTLLIB_OFDM_BASIC_RATES_MASK	(RTLLIB_OFDM_RATE_6MB_MASK | \
+	RTLLIB_OFDM_RATE_12MB_MASK | \
+	RTLLIB_OFDM_RATE_24MB_MASK)
+#define RTLLIB_OFDM_DEFAULT_RATES_MASK	(RTLLIB_OFDM_BASIC_RATES_MASK | \
+	RTLLIB_OFDM_RATE_9MB_MASK  | \
+	RTLLIB_OFDM_RATE_18MB_MASK | \
+	RTLLIB_OFDM_RATE_36MB_MASK | \
+	RTLLIB_OFDM_RATE_48MB_MASK | \
+	RTLLIB_OFDM_RATE_54MB_MASK)
+#define RTLLIB_DEFAULT_RATES_MASK (RTLLIB_OFDM_DEFAULT_RATES_MASK | \
+                                RTLLIB_CCK_DEFAULT_RATES_MASK)
+
+#define RTLLIB_NUM_OFDM_RATES	    8
+#define RTLLIB_NUM_CCK_RATES	            4
+#define RTLLIB_OFDM_SHIFT_MASK_A         4
+
+
+/* this is stolen and modified from the madwifi driver*/
+#define RTLLIB_FC0_TYPE_MASK		0x0c
+#define RTLLIB_FC0_TYPE_DATA		0x08
+#define RTLLIB_FC0_SUBTYPE_MASK	0xB0
+#define RTLLIB_FC0_SUBTYPE_QOS	0x80
+
+#define RTLLIB_QOS_HAS_SEQ(fc) \
+	(((fc) & (RTLLIB_FC0_TYPE_MASK | RTLLIB_FC0_SUBTYPE_MASK)) == \
+	 (RTLLIB_FC0_TYPE_DATA | RTLLIB_FC0_SUBTYPE_QOS))
+	
+/* this is stolen from ipw2200 driver */
+#define IEEE_IBSS_MAC_HASH_SIZE 31
+struct ieee_ibss_seq {
+	u8 mac[ETH_ALEN];
+	u16 seq_num[17];
+	u16 frag_num[17];
+	unsigned long packet_time[17];
+	struct list_head list;
+};
+
+#ifdef _RTL8192_EXT_PATCH_
+struct ieee_mesh_seq {
+	u8 mac[ETH_ALEN];
+	u16 seq_num[17];
+	u16 frag_num[17];
+	unsigned long packet_time[17];
+	struct list_head list;
+};
+#endif
+/* NOTE: This data is for statistical purposes; not all hardware provides this
+ *       information for frames received.  Not setting these will not cause
+ *       any adverse affects. */
+struct rtllib_rx_stats {
+#if 1
+	u32 mac_time[2];
+	s8  rssi;
+	u8  signal;
+	u8  noise;
+	u16 rate; /* in 100 kbps */
+	u8  received_channel;
+	u8  control;
+	u8  mask;
+	u8  freq;
+	u16 len;
+	u64 tsf;
+	u32 beacon_time;
+	u8  nic_type;
+	u16 Length;
+	u8  SignalQuality; 
+	s32 RecvSignalPower; 
+	s8  RxPower; 
+	u8  SignalStrength; 
+	u16 bHwError:1;
+	u16 bCRC:1;
+	u16 bICV:1;
+	u16 bShortPreamble:1;
+	u16 Antenna:1;      
+	u16 Decrypted:1;    
+	u16 Wakeup:1;       
+	u16 Reserved0:1;    
+	u8  AGC;
+	u32 TimeStampLow;
+	u32 TimeStampHigh;
+	bool bShift;
+	bool bIsQosData;             
+	u8   UserPriority;
+
+	u8    RxDrvInfoSize;
+	u8    RxBufShift;
+	bool  bIsAMPDU;
+	bool  bFirstMPDU;
+	bool  bContainHTC;
+	bool  RxIs40MHzPacket;
+	u32   RxPWDBAll;
+	u8    RxMIMOSignalStrength[4];        
+	s8    RxMIMOSignalQuality[2];
+	bool  bPacketMatchBSSID;
+	bool  bIsCCK;
+	bool  bPacketToSelf;
+	u8*    virtual_address;
+	u16    packetlength;        
+	u16    fraglength;          
+	u16    fragoffset;          
+	u16    ntotalfrag;
+	bool   bisrxaggrsubframe;
+	bool   bPacketBeacon;       
+	bool   bToSelfBA;	    
+	char   cck_adc_pwdb[4];	    
+	u16    Seq_Num;
+	u8     nTotalAggPkt;	    
+#ifdef TCP_CSUM_OFFLOAD_RX
+	u8	tcp_csum_valid;
+#endif
+#if defined (RTL8192S_WAPI_SUPPORT)
+	u8	WapiTempPN[16];
+	u8	WapiSrcAddr[6];
+	u8	bWapiCheckPNInDecrypt;
+#endif
+#endif
+
+};
+
+/* IEEE 802.11 requires that STA supports concurrent reception of at least
+ * three fragmented frames. This define can be increased to support more
+ * concurrent frames, but it should be noted that each entry can consume about
+ * 2 kB of RAM and increasing cache size will slow down frame reassembly. */
+#define RTLLIB_FRAG_CACHE_LEN 4
+
+struct rtllib_frag_entry {
+	unsigned long first_frag_time;
+	unsigned int seq;
+	unsigned int last_frag;
+	struct sk_buff *skb;
+	u8 src_addr[ETH_ALEN];
+	u8 dst_addr[ETH_ALEN];
+};
+
+struct rtllib_stats {
+	unsigned int tx_unicast_frames;
+	unsigned int tx_multicast_frames;
+	unsigned int tx_fragments;
+	unsigned int tx_unicast_octets;
+	unsigned int tx_multicast_octets;
+	unsigned int tx_deferred_transmissions;
+	unsigned int tx_single_retry_frames;
+	unsigned int tx_multiple_retry_frames;
+	unsigned int tx_retry_limit_exceeded;
+	unsigned int tx_discards;
+	unsigned int rx_unicast_frames;
+	unsigned int rx_multicast_frames;
+	unsigned int rx_fragments;
+	unsigned int rx_unicast_octets;
+	unsigned int rx_multicast_octets;
+	unsigned int rx_fcs_errors;
+	unsigned int rx_discards_no_buffer;
+	unsigned int tx_discards_wrong_sa;
+	unsigned int rx_discards_undecryptable;
+	unsigned int rx_message_in_msg_fragments;
+	unsigned int rx_message_in_bad_msg_fragments;
+};
+
+struct rtllib_device;
+
+#include "rtllib_crypt.h"
+
+#define SEC_KEY_1         (1<<0)
+#define SEC_KEY_2         (1<<1)
+#define SEC_KEY_3         (1<<2)
+#define SEC_KEY_4         (1<<3)
+#define SEC_ACTIVE_KEY    (1<<4)
+#define SEC_AUTH_MODE     (1<<5)
+#define SEC_UNICAST_GROUP (1<<6)
+#define SEC_LEVEL         (1<<7)
+#define SEC_ENABLED       (1<<8)
+#define SEC_ENCRYPT       (1<<9)
+
+#define SEC_LEVEL_0      0 /* None */
+#define SEC_LEVEL_1      1 /* WEP 40 and 104 bit */
+#define SEC_LEVEL_2      2 /* Level 1 + TKIP */
+#define SEC_LEVEL_2_CKIP 3 /* Level 1 + CKIP */
+#define SEC_LEVEL_3      4 /* Level 2 + CCMP */
+
+#define SEC_ALG_NONE            0
+#define SEC_ALG_WEP             1
+#define SEC_ALG_TKIP            2
+#define SEC_ALG_CCMP            4
+
+#define WEP_KEYS 		4
+#define WEP_KEY_LEN		13
+#define SCM_KEY_LEN             32
+#define SCM_TEMPORAL_KEY_LENGTH 16
+
+struct rtllib_security {
+	u16 active_key:2,
+            enabled:1,
+	    auth_mode:2,
+            auth_algo:4,
+            unicast_uses_group:1,
+	    encrypt:1;
+	u8 key_sizes[WEP_KEYS];
+	u8 keys[WEP_KEYS][SCM_KEY_LEN];
+	u8 level;
+	u16 flags;
+} __attribute__ ((packed));
+
+
+/*
+ 802.11 data frame from AP
+      ,-------------------------------------------------------------------.
+Bytes |  2   |  2   |    6    |    6    |    6    |  2   | 0..2312 |   4  |
+      |------|------|---------|---------|---------|------|---------|------|
+Desc. | ctrl | dura |  DA/RA  |   TA    |    SA   | Sequ |  frame  |  fcs |
+      |      | tion | (BSSID) |         |         | ence |  data   |      |
+      `-------------------------------------------------------------------'
+Total: 28-2340 bytes
+*/
+
+/* Management Frame Information Element Types */
+enum rtllib_mfie {
+        MFIE_TYPE_SSID = 0,
+        MFIE_TYPE_RATES = 1,
+        MFIE_TYPE_FH_SET = 2,
+        MFIE_TYPE_DS_SET = 3,
+        MFIE_TYPE_CF_SET = 4,
+        MFIE_TYPE_TIM = 5,
+        MFIE_TYPE_IBSS_SET = 6,
+        MFIE_TYPE_COUNTRY = 7,
+        MFIE_TYPE_HOP_PARAMS = 8,
+        MFIE_TYPE_HOP_TABLE = 9,
+        MFIE_TYPE_REQUEST = 10,
+        MFIE_TYPE_CHALLENGE = 16,
+        MFIE_TYPE_POWER_CONSTRAINT = 32,
+        MFIE_TYPE_POWER_CAPABILITY = 33,
+        MFIE_TYPE_TPC_REQUEST = 34,
+        MFIE_TYPE_TPC_REPORT = 35,
+        MFIE_TYPE_SUPP_CHANNELS = 36,
+        MFIE_TYPE_CSA = 37,
+        MFIE_TYPE_MEASURE_REQUEST = 38,
+        MFIE_TYPE_MEASURE_REPORT = 39,
+        MFIE_TYPE_QUIET = 40,
+        MFIE_TYPE_IBSS_DFS = 41,
+        MFIE_TYPE_ERP = 42,
+	MFIE_TYPE_HT_CAP= 45,
+	MFIE_TYPE_RSN = 48,
+	MFIE_TYPE_RATES_EX = 50,
+#ifdef _RTL8192_EXT_PATCH_
+	MFIE_TYPE_MESH_PANN = 51,
+	MFIE_TYPE_MESH_RANN = 52,
+	MFIE_TYPE_MESH_PATH_REQ = 138, 
+	MFIE_TYPE_MESH_PATH_REP = 139, 
+	MFIE_TYPE_MESH_PATH_ERR = 140, 
+#endif
+	MFIE_TYPE_HT_INFO= 61,
+#if defined (RTL8192S_WAPI_SUPPORT)
+	MFIE_TYPE_WAPI	= 68,
+#endif
+	MFIE_TYPE_AIRONET=133,
+#ifdef _RTL8192_EXT_PATCH_
+	MFIE_TYPE_MESH_CONFIGURATION = 121, 
+	MFIE_TYPE_MESH_ID = 122, 
+	MFIE_TYPE_MESH_LOCAL_LINK_STATE_ANNOU = 138,   
+	MFIE_TYPE_MESH_ABBR_HANDSHAKE_IE_	=139,  
+	MFIE_TYPE_MESH_PEER_LINK_MGNT = 125, 
+	MFIE_TYPE_MESH_NEIGHBOR_LIST = 142,     
+	MFIE_TYPE_MESH_TIM = 143,     
+	MFIE_TYPE_MESH_ATIM_WINDOW = 144,     
+	MFIE_TYPE_MESH_BEACON_TIMING = 145,     
+	MFIE_TYPE_MESH_MDAOP_ADVERTISMENTS = 148,   
+	MFIE_TYPE_MESH_MSC = 149, 
+	MFIE_TYPE_MESH_MSA = 150, 
+	MFIE_TYPE_MESH_MOAOP_SET_TEARDOWN = 212,   
+#endif
+	MFIE_TYPE_GENERIC = 221,
+        MFIE_TYPE_QOS_PARAMETER = 222,
+};
+
+/* Minimal header; can be used for passing 802.11 frames with sufficient
+ * information to determine what type of underlying data type is actually
+ * stored in the data. */
+struct rtllib_pspoll_hdr {
+        __le16 frame_ctl;
+        __le16 aid;
+	u8 bssid[ETH_ALEN];
+        u8 ta[ETH_ALEN];
+} __attribute__ ((packed));
+
+struct rtllib_hdr {
+        __le16 frame_ctl;
+        __le16 duration_id;
+        u8 payload[0];
+} __attribute__ ((packed));
+
+struct rtllib_hdr_1addr {
+        __le16 frame_ctl;
+        __le16 duration_id;
+        u8 addr1[ETH_ALEN];
+        u8 payload[0];
+} __attribute__ ((packed));
+
+struct rtllib_hdr_2addr {
+        __le16 frame_ctl;
+        __le16 duration_id;
+        u8 addr1[ETH_ALEN];
+        u8 addr2[ETH_ALEN];
+        u8 payload[0];
+} __attribute__ ((packed));
+
+struct rtllib_hdr_3addr {
+	__le16 frame_ctl;
+	__le16 duration_id;
+	u8 addr1[ETH_ALEN];
+	u8 addr2[ETH_ALEN];
+	u8 addr3[ETH_ALEN];
+	__le16 seq_ctl;
+        u8 payload[0];
+} __attribute__ ((packed));
+
+struct rtllib_hdr_4addr {
+	__le16 frame_ctl;
+	__le16 duration_id;
+	u8 addr1[ETH_ALEN];
+	u8 addr2[ETH_ALEN];
+	u8 addr3[ETH_ALEN];
+	__le16 seq_ctl;
+	u8 addr4[ETH_ALEN];
+        u8 payload[0];
+} __attribute__ ((packed));
+
+struct rtllib_hdr_3addrqos {
+	__le16 frame_ctl;
+	__le16 duration_id;
+	u8 addr1[ETH_ALEN];
+	u8 addr2[ETH_ALEN];
+	u8 addr3[ETH_ALEN];
+	__le16 seq_ctl;
+	__le16 qos_ctl;
+	u8 payload[0];
+} __attribute__ ((packed));
+
+struct rtllib_hdr_4addrqos {
+	__le16 frame_ctl;
+	__le16 duration_id;
+	u8 addr1[ETH_ALEN];
+	u8 addr2[ETH_ALEN];
+	u8 addr3[ETH_ALEN];
+	__le16 seq_ctl;
+	u8 addr4[ETH_ALEN];
+	__le16 qos_ctl;
+	u8 payload[0];
+} __attribute__ ((packed));
+
+struct rtllib_info_element {
+	u8 id;
+	u8 len;
+	u8 data[0];
+} __attribute__ ((packed));
+
+#ifdef _RTL8192_EXT_PATCH_
+
+struct mesh_peering_protocol_version_t{
+    u8 OUI[3]; 
+    u8 value;
+} __attribute__ ((packed));
+struct rtllib_plink_open {
+	struct rtllib_hdr_3addr header;
+	u8       category;
+	u8       action;
+#ifndef COMPATIBLE_WITH_RALINK_MESH
+	struct mesh_peering_protocol_version_t mesh_peering_protocol_version;
+#endif
+	__le16 capability;
+	/* SSID, supported rates, RSN */
+        struct rtllib_info_element info_element[0];
+} __attribute__ ((packed));
+
+struct rtllib_plink_confirm {
+	struct rtllib_hdr_3addr header;
+	u8       category;
+	u8       action;
+#ifndef COMPATIBLE_WITH_RALINK_MESH
+	struct mesh_peering_protocol_version_t mesh_peering_protocol_version;
+#endif
+	__le16 capability;
+#ifdef COMPATIBLE_WITH_RALINK_MESH
+	__le16 status_code;
+#endif
+	__le16 aid;
+	/* SSID, supported rates, RSN */
+        struct rtllib_info_element info_element[0];
+} __attribute__ ((packed));
+
+struct rtllib_plink_close {
+	struct rtllib_hdr_3addr header;
+	u8       category;
+	u8       action;
+#ifndef COMPATIBLE_WITH_RALINK_MESH
+	struct mesh_peering_protocol_version_t mesh_peering_protocol_version;
+#endif
+	/* SSID, supported rates, RSN */
+	struct rtllib_info_element info_element[0];
+} __attribute__ ((packed));
+
+struct rtllib_linkmetric_report {
+	struct rtllib_hdr_3addr header;
+	u8       category;
+	u8       action;
+	struct rtllib_info_element info_element[0];
+} __attribute__ ((packed));
+
+struct rtllib_linkmetric_req {
+	struct rtllib_hdr_3addr header;
+	u8       category;
+	u8       action;
+} __attribute__ ((packed));
+#endif
+
+struct rtllib_authentication {
+	struct rtllib_hdr_3addr header;
+	__le16 algorithm;
+	__le16 transaction;
+	__le16 status;
+	/*challenge*/
+	struct rtllib_info_element info_element[0];
+} __attribute__ ((packed));
+
+struct rtllib_disauth {
+        struct rtllib_hdr_3addr header;
+        __le16 reason;
+} __attribute__ ((packed));
+
+struct rtllib_disassoc {
+        struct rtllib_hdr_3addr header;
+        __le16 reason;
+} __attribute__ ((packed));
+
+struct rtllib_probe_request {
+	struct rtllib_hdr_3addr header;
+	/* SSID, supported rates */
+        struct rtllib_info_element info_element[0];
+} __attribute__ ((packed));
+
+struct rtllib_probe_response {
+	struct rtllib_hdr_3addr header;
+	u32 time_stamp[2];
+	__le16 beacon_interval;
+	__le16 capability;
+        /* SSID, supported rates, FH params, DS params,
+         * CF params, IBSS params, TIM (if beacon), RSN */
+        struct rtllib_info_element info_element[0];
+} __attribute__ ((packed));
+
+/* Alias beacon for probe_response */
+#define rtllib_beacon rtllib_probe_response
+
+struct rtllib_assoc_request_frame {
+	struct rtllib_hdr_3addr header;
+	__le16 capability;
+	__le16 listen_interval;
+	/* SSID, supported rates, RSN */
+        struct rtllib_info_element info_element[0];
+} __attribute__ ((packed));
+
+struct rtllib_reassoc_request_frame {
+	struct rtllib_hdr_3addr header;
+	__le16 capability;
+	__le16 listen_interval;
+	u8 current_ap[ETH_ALEN];
+	/* SSID, supported rates, RSN */
+        struct rtllib_info_element info_element[0];
+} __attribute__ ((packed));
+
+struct rtllib_assoc_response_frame {
+	struct rtllib_hdr_3addr header;
+	__le16 capability;
+	__le16 status;
+	__le16 aid;
+	struct rtllib_info_element info_element[0]; /* supported rates */
+} __attribute__ ((packed));
+
+struct rtllib_txb {
+	u8 nr_frags;
+	u8 encrypted;
+	u8 queue_index;
+	u8 rts_included;
+	u16 reserved;
+	__le16 frag_size;
+	__le16 payload_size;
+	struct sk_buff *fragments[0];
+};
+
+#define MAX_TX_AGG_COUNT		  16
+struct rtllib_drv_agg_txb {
+	u8 nr_drv_agg_frames;
+	struct sk_buff *tx_agg_frames[MAX_TX_AGG_COUNT];
+}__attribute__((packed));
+
+#define MAX_SUBFRAME_COUNT 		  64
+struct rtllib_rxb {
+	u8 nr_subframes;
+	struct sk_buff *subframes[MAX_SUBFRAME_COUNT];
+	u8 dst[ETH_ALEN];
+	u8 src[ETH_ALEN];
+#ifdef TCP_CSUM_OFFLOAD_RX
+	u8 tcp_csum_valid;
+#endif
+#if defined (RTL8192S_WAPI_SUPPORT)
+	u8 UserPriority;
+	u8 WapiTempPN[16];
+	u8 WapiSrcAddr[6];
+	u8 bWapiCheckPNInDecrypt;
+#endif
+}__attribute__((packed));
+
+typedef union _frameqos {
+	u16 shortdata;
+	u8  chardata[2];
+	struct {
+		u16 tid:4;
+		u16 eosp:1;
+		u16 ack_policy:2;
+		u16 reserved:1;
+		u16 txop:8;
+	}field;
+}frameqos,*pframeqos;
+
+/* SWEEP TABLE ENTRIES NUMBER*/
+#define MAX_SWEEP_TAB_ENTRIES		  42
+#define MAX_SWEEP_TAB_ENTRIES_PER_PACKET  7
+/* MAX_RATES_LENGTH needs to be 12.  The spec says 8, and many APs
+ * only use 8, and then use extended rates for the remaining supported
+ * rates.  Other APs, however, stick all of their supported rates on the
+ * main rates information element... */
+#define MAX_RATES_LENGTH                  ((u8)12)
+#define MAX_RATES_EX_LENGTH               ((u8)16)
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
+#define MAX_NETWORK_COUNT                  16 
+#else
+#define MAX_NETWORK_COUNT                  96 
+#endif			
+
+#define MAX_CHANNEL_NUMBER                 161
+#define RTLLIB_SOFTMAC_SCAN_TIME	   100
+#define RTLLIB_SOFTMAC_ASSOC_RETRY_TIME (HZ * 2)
+
+#define CRC_LENGTH                 4U
+
+#define MAX_WPA_IE_LEN 64
+#define MAX_WZC_IE_LEN 256
+
+#define NETWORK_EMPTY_ESSID (1<<0)
+#define NETWORK_HAS_OFDM    (1<<1)
+#define NETWORK_HAS_CCK     (1<<2)
+
+/* QoS structure */
+#define NETWORK_HAS_QOS_PARAMETERS      (1<<3)
+#define NETWORK_HAS_QOS_INFORMATION     (1<<4)
+#define NETWORK_HAS_QOS_MASK            (NETWORK_HAS_QOS_PARAMETERS | \
+                                         NETWORK_HAS_QOS_INFORMATION)
+/* 802.11h */
+#define NETWORK_HAS_POWER_CONSTRAINT    (1<<5)
+#define NETWORK_HAS_CSA                 (1<<6)
+#define NETWORK_HAS_QUIET               (1<<7)
+#define NETWORK_HAS_IBSS_DFS            (1<<8)
+#define NETWORK_HAS_TPC_REPORT          (1<<9)
+
+#define NETWORK_HAS_ERP_VALUE           (1<<10)
+
+#define QOS_QUEUE_NUM                   4
+#define QOS_OUI_LEN                     3
+#define QOS_OUI_TYPE                    2
+#define QOS_ELEMENT_ID                  221
+#define QOS_OUI_INFO_SUB_TYPE           0
+#define QOS_OUI_PARAM_SUB_TYPE          1
+#define QOS_VERSION_1                   1
+#define QOS_AIFSN_MIN_VALUE             2
+#if 1
+struct rtllib_qos_information_element {
+        u8 elementID;
+        u8 length;
+        u8 qui[QOS_OUI_LEN];
+        u8 qui_type;
+        u8 qui_subtype;
+        u8 version;
+        u8 ac_info;
+} __attribute__ ((packed));
+
+struct rtllib_qos_ac_parameter {
+        u8 aci_aifsn;
+        u8 ecw_min_max;
+        __le16 tx_op_limit;
+} __attribute__ ((packed));
+
+struct rtllib_qos_parameter_info {
+        struct rtllib_qos_information_element info_element;
+        u8 reserved;
+        struct rtllib_qos_ac_parameter ac_params_record[QOS_QUEUE_NUM];
+} __attribute__ ((packed));
+
+struct rtllib_qos_parameters {
+        __le16 cw_min[QOS_QUEUE_NUM];
+        __le16 cw_max[QOS_QUEUE_NUM];
+        u8 aifs[QOS_QUEUE_NUM];
+        u8 flag[QOS_QUEUE_NUM];
+        __le16 tx_op_limit[QOS_QUEUE_NUM];
+} __attribute__ ((packed));
+
+struct rtllib_qos_data {
+        struct rtllib_qos_parameters parameters;
+	unsigned int wmm_acm;
+        int active;
+        int supported;
+        u8 param_count;
+        u8 old_param_count;
+};
+
+struct rtllib_tim_parameters {
+        u8 tim_count;
+        u8 tim_period;
+} __attribute__ ((packed));
+
+struct rtllib_wmm_ac_param {
+	u8 ac_aci_acm_aifsn;
+	u8 ac_ecwmin_ecwmax;
+	u16 ac_txop_limit;
+};
+
+struct rtllib_wmm_ts_info {
+	u8 ac_dir_tid;
+	u8 ac_up_psb;
+	u8 reserved;
+} __attribute__ ((packed));
+
+struct rtllib_wmm_tspec_elem {
+	struct rtllib_wmm_ts_info ts_info;
+	u16 norm_msdu_size;
+	u16 max_msdu_size;
+	u32 min_serv_inter;
+	u32 max_serv_inter;
+	u32 inact_inter;
+	u32 suspen_inter;
+	u32 serv_start_time;
+	u32 min_data_rate;
+	u32 mean_data_rate;
+	u32 peak_data_rate;
+	u32 max_burst_size;
+	u32 delay_bound;
+	u32 min_phy_rate;
+	u16 surp_band_allow;
+	u16 medium_time;
+}__attribute__((packed));
+#endif
+enum eap_type {
+	EAP_PACKET = 0,
+	EAPOL_START,
+	EAPOL_LOGOFF,
+	EAPOL_KEY,
+	EAPOL_ENCAP_ASF_ALERT
+};
+
+static const char *eap_types[] = {
+	[EAP_PACKET]		= "EAP-Packet",
+	[EAPOL_START]		= "EAPOL-Start",
+	[EAPOL_LOGOFF]		= "EAPOL-Logoff",
+	[EAPOL_KEY]		= "EAPOL-Key",
+	[EAPOL_ENCAP_ASF_ALERT]	= "EAPOL-Encap-ASF-Alert"
+};
+
+static inline const char *eap_get_type(int type)
+{
+	return ((u32)type >= ARRAY_SIZE(eap_types)) ? "Unknown" : eap_types[type];
+}
+static inline u8 Frame_QoSTID(u8* buf)
+{
+	struct rtllib_hdr_3addr *hdr;
+	u16 fc;
+	hdr = (struct rtllib_hdr_3addr *)buf;
+	fc = le16_to_cpu(hdr->frame_ctl);
+	return (u8)((frameqos*)(buf + (((fc & RTLLIB_FCTL_TODS)&&(fc & RTLLIB_FCTL_FROMDS))? 30 : 24)))->field.tid;
+}
+
+
+struct eapol {
+	u8 snap[6];
+	u16 ethertype;
+	u8 version;
+	u8 type;
+	u16 length;
+} __attribute__ ((packed));
+
+struct rtllib_softmac_stats{
+	unsigned int rx_ass_ok;
+	unsigned int rx_ass_err;
+	unsigned int rx_probe_rq;
+	unsigned int tx_probe_rs;
+	unsigned int tx_beacons;
+	unsigned int rx_auth_rq;
+	unsigned int rx_auth_rs_ok;
+	unsigned int rx_auth_rs_err;
+	unsigned int tx_auth_rq;
+	unsigned int no_auth_rs;
+	unsigned int no_ass_rs;
+	unsigned int tx_ass_rq;
+	unsigned int rx_ass_rq;
+	unsigned int tx_probe_rq;
+	unsigned int reassoc;
+	unsigned int swtxstop;
+	unsigned int swtxawake;
+	unsigned char CurrentShowTxate;
+	unsigned char last_packet_rate;
+	unsigned int txretrycount;
+};
+
+#define BEACON_PROBE_SSID_ID_POSITION 12
+
+struct rtllib_info_element_hdr {
+	u8 id;
+	u8 len;
+} __attribute__ ((packed));
+
+/*
+ * These are the data types that can make up management packets
+ *
+	u16 auth_algorithm;
+	u16 auth_sequence;
+	u16 beacon_interval;
+	u16 capability;
+	u8 current_ap[ETH_ALEN];
+	u16 listen_interval;
+	struct {
+		u16 association_id:14, reserved:2;
+	} __attribute__ ((packed));
+	u32 time_stamp[2];
+	u16 reason;
+	u16 status;
+*/
+
+#define RTLLIB_DEFAULT_TX_ESSID "Penguin"
+#define RTLLIB_DEFAULT_BASIC_RATE 2 
+#ifdef _RTL8192_EXT_PATCH_
+#define RTLLIB_DEFAULT_MESHID "CMPC-mesh"
+#define RTLLIB_DEFAULT_MESH_CHAN 7 
+#endif
+
+enum {WMM_all_frame, WMM_two_frame, WMM_four_frame, WMM_six_frame};
+#define MAX_SP_Len  (WMM_all_frame << 4)
+#define RTLLIB_QOS_TID 0x0f
+#define QOS_CTL_NOTCONTAIN_ACK (0x01 << 5)
+#ifdef ENABLE_AMSDU
+#define QOS_CTL_AMSDU_PRESENT (0x01 << 7)
+#endif
+
+#define RTLLIB_DTIM_MBCAST 4
+#define RTLLIB_DTIM_UCAST 2
+#define RTLLIB_DTIM_VALID 1
+#define RTLLIB_DTIM_INVALID 0
+
+#define RTLLIB_PS_DISABLED 0
+#define RTLLIB_PS_UNICAST RTLLIB_DTIM_UCAST
+#define RTLLIB_PS_MBCAST RTLLIB_DTIM_MBCAST
+
+#ifdef WMM_Hang_8187
+#undef WMM_Hang_8187
+#endif
+
+#define WME_AC_BK   0x00
+#define WME_AC_BE   0x01
+#define WME_AC_VI   0x02
+#define WME_AC_VO   0x03
+#define WME_ACI_MASK 0x03
+#define WME_AIFSN_MASK 0x03
+#define WME_AC_PRAM_LEN 16
+
+#define MAX_RECEIVE_BUFFER_SIZE 9100
+
+#if 1
+#define UP2AC(up) (		   \
+	((up) < 1) ? WME_AC_BE : \
+	((up) < 3) ? WME_AC_BK : \
+	((up) < 4) ? WME_AC_BE : \
+	((up) < 6) ? WME_AC_VI : \
+	WME_AC_VO)	
+#endif
+#define AC2UP(_ac)	(       \
+	((_ac) == WME_AC_VO) ? 6 : \
+	((_ac) == WME_AC_VI) ? 5 : \
+	((_ac) == WME_AC_BK) ? 1 : \
+	0)
+
+#define	ETHER_ADDR_LEN		6	/* length of an Ethernet address */
+#define ETHERNET_HEADER_SIZE    14      /* length of two Ethernet address plus ether type*/
+
+struct	ether_header {
+	u8 ether_dhost[ETHER_ADDR_LEN];
+	u8 ether_shost[ETHER_ADDR_LEN];
+	u16 ether_type;
+} __attribute__((packed)); 
+
+#ifndef ETHERTYPE_PAE
+#define	ETHERTYPE_PAE	0x888e		/* EAPOL PAE/802.1x */
+#endif
+#ifndef ETHERTYPE_IP
+#define	ETHERTYPE_IP	0x0800		/* IP protocol */
+#endif
+
+
+typedef enum _erp_t{
+	ERP_NonERPpresent	= 0x01,
+	ERP_UseProtection	= 0x02,
+	ERP_BarkerPreambleMode = 0x04,
+} erp_t;
+
+#ifdef _RTL8192_EXT_PATCH_
+typedef struct _mesh_config_t {
+	u8 path_proto_id[4];
+	u8 path_metric_id[4];
+	u8 congest_ctl_mode[4];
+	u8 mesh_capability[2];
+} mesh_config_t;
+#define MESH_CONF_TOTAL_LEN 19
+#endif
+
+struct rtllib_network {
+	/* These entries are used to identify a unique network */
+	u8 bssid[ETH_ALEN];
+	u8 channel;
+	/* Ensure null-terminated for any debug msgs */
+	u8 ssid[IW_ESSID_MAX_SIZE + 1];
+	u8 ssid_len;
+	u8 hidden_ssid[IW_ESSID_MAX_SIZE + 1];
+	u8 hidden_ssid_len;
+	struct rtllib_qos_data qos_data;
+
+	bool	bWithAironetIE;
+	bool	bCkipSupported;
+	bool	bCcxRmEnable;
+	u16 	CcxRmState[2];
+	bool	bMBssidValid;
+	u8	MBssidMask;
+	u8	MBssid[6];
+	bool	bWithCcxVerNum;
+	u8	BssCcxVerNumber;
+	/* These are network statistics */
+	struct rtllib_rx_stats stats;
+	u16 capability;
+	u8  rates[MAX_RATES_LENGTH];
+	u8  rates_len;
+	u8  rates_ex[MAX_RATES_EX_LENGTH];
+	u8  rates_ex_len;
+	unsigned long last_scanned;
+	u8  mode;
+	u32 flags;
+	u32 last_associate;
+	u32 time_stamp[2];
+	u16 beacon_interval;
+	u16 listen_interval;
+	u16 atim_window;
+	u8  erp_value;
+	u8  wpa_ie[MAX_WPA_IE_LEN];
+	size_t wpa_ie_len;
+	u8  rsn_ie[MAX_WPA_IE_LEN];
+	size_t rsn_ie_len;
+#if defined RTL8192S_WAPI_SUPPORT
+	u8  wapi_ie[MAX_WAPI_IE_LEN];
+	size_t wapi_ie_len;
+#endif
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)	
+	u8  wzc_ie[MAX_WZC_IE_LEN];
+	size_t wzc_ie_len;
+#endif
+
+        struct rtllib_tim_parameters tim;
+	u8  dtim_period;
+	u8  dtim_data;
+	u32 last_dtim_sta_time[2];
+
+        u8 wmm_info;
+        struct rtllib_wmm_ac_param wmm_param[4];
+#ifdef THOMAS_TURBO
+	u8 Turbo_Enable;
+#endif
+#ifdef ENABLE_DOT11D
+	u16 CountryIeLen;
+	u8 CountryIeBuf[MAX_IE_LEN];
+#endif
+	BSS_HT	bssht;
+	bool broadcom_cap_exist;
+	bool realtek_cap_exit;
+	bool marvell_cap_exist;
+	bool ralink_cap_exist;
+	bool atheros_cap_exist;
+	bool cisco_cap_exist;
+	bool unknown_cap_exist;
+	bool	berp_info_valid;
+	bool buseprotection;
+	bool bIsNetgear854T;
+	u8 SignalStrength;
+	u8 RSSI; 
+#ifdef _RTL8192_EXT_PATCH_
+	u8 hostname[MAX_HOST_NAME_LENGTH];
+	u8 hostname_len;
+	u8 mesh_id[MAX_MESH_ID_LEN];
+	u8 mesh_id_len;
+	mesh_config_t mesh_config;
+	u8 mesh_config_len;
+	void *ext_entry;
+#endif
+
+	struct list_head list;
+};
+
+#if 1
+enum rtllib_state {
+
+	/* the card is not linked at all */
+	RTLLIB_NOLINK = 0,
+	
+	/* RTLLIB_ASSOCIATING* are for BSS client mode
+	 * the driver shall not perform RX filtering unless
+	 * the state is LINKED.
+	 * The driver shall just check for the state LINKED and
+	 * defaults to NOLINK for ALL the other states (including
+	 * LINKED_SCANNING)
+	 */
+	
+	/* the association procedure will start (wq scheduling)*/
+	RTLLIB_ASSOCIATING,
+	RTLLIB_ASSOCIATING_RETRY,
+	
+	/* the association procedure is sending AUTH request*/
+	RTLLIB_ASSOCIATING_AUTHENTICATING,
+	
+	/* the association procedure has successfully authentcated
+	 * and is sending association request
+	 */
+	RTLLIB_ASSOCIATING_AUTHENTICATED,
+	
+	/* the link is ok. the card associated to a BSS or linked
+	 * to a ibss cell or acting as an AP and creating the bss
+	 */
+	RTLLIB_LINKED,
+	
+	/* same as LINKED, but the driver shall apply RX filter
+	 * rules as we are in NO_LINK mode. As the card is still
+	 * logically linked, but it is doing a syncro site survey
+	 * then it will be back to LINKED state.
+	 */
+	RTLLIB_LINKED_SCANNING,
+#ifdef _RTL8192_EXT_PATCH_
+	RTLLIB_MESH_SCANNING,
+	RTLLIB_MESH_LINKED,
+#endif
+};
+#else
+enum rtllib_state {
+        RTLLIB_UNINITIALIZED = 0,
+        RTLLIB_INITIALIZED,
+        RTLLIB_ASSOCIATING,
+        RTLLIB_ASSOCIATED,
+        RTLLIB_AUTHENTICATING,
+        RTLLIB_AUTHENTICATED,
+        RTLLIB_SHUTDOWN
+};
+#endif
+
+#define DEFAULT_MAX_SCAN_AGE (15 * HZ)
+#define DEFAULT_FTS 2346
+
+#define CFG_RTLLIB_RESERVE_FCS (1<<0)
+#define CFG_RTLLIB_COMPUTE_FCS (1<<1)
+#define CFG_RTLLIB_RTS (1<<2)
+
+#define RTLLIB_24GHZ_MIN_CHANNEL 1
+#define RTLLIB_24GHZ_MAX_CHANNEL 14
+#define RTLLIB_24GHZ_CHANNELS (RTLLIB_24GHZ_MAX_CHANNEL - \
+                                  RTLLIB_24GHZ_MIN_CHANNEL + 1)
+
+#define RTLLIB_52GHZ_MIN_CHANNEL 34
+#define RTLLIB_52GHZ_MAX_CHANNEL 165
+#define RTLLIB_52GHZ_CHANNELS (RTLLIB_52GHZ_MAX_CHANNEL - \
+                                  RTLLIB_52GHZ_MIN_CHANNEL + 1)
+
+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,11))
+extern inline int is_multicast_ether_addr(const u8 *addr)
+{
+        return ((addr[0] != 0xff) && (0x01 & addr[0]));
+}
+#endif
+
+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,13))
+extern inline int is_broadcast_ether_addr(const u8 *addr)
+{
+	return ((addr[0] == 0xff) && (addr[1] == 0xff) && (addr[2] == 0xff) &&   \
+		(addr[3] == 0xff) && (addr[4] == 0xff) && (addr[5] == 0xff));
+}
+#endif
+#ifndef eqMacAddr
+#define eqMacAddr(a,b)		( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
+#endif
+typedef struct tx_pending_t{
+	int frag;
+	struct rtllib_txb *txb;
+}tx_pending_t;
+
+typedef struct _bandwidth_autoswitch
+{
+	long threshold_20Mhzto40Mhz;
+	long	threshold_40Mhzto20Mhz;	
+	bool bforced_tx20Mhz;
+	bool bautoswitch_enable;	
+}bandwidth_autoswitch,*pbandwidth_autoswitch;
+
+
+
+#define REORDER_WIN_SIZE	128
+#define REORDER_ENTRY_NUM	128
+typedef struct _RX_REORDER_ENTRY
+{
+	struct list_head	List;
+	u16			SeqNum;
+	struct rtllib_rxb* prxb;
+} RX_REORDER_ENTRY, *PRX_REORDER_ENTRY;
+typedef enum _Fsync_State{
+	Default_Fsync,
+	HW_Fsync,
+	SW_Fsync
+}Fsync_State;	
+
+typedef	enum _RT_PS_MODE	
+{
+	eActive,	
+	eMaxPs,		
+	eFastPs,		
+	eAutoPs,	
+}RT_PS_MODE;
+
+typedef enum _IPS_CALLBACK_FUNCION
+{
+	IPS_CALLBACK_NONE = 0,
+	IPS_CALLBACK_MGNT_LINK_REQUEST = 1,
+	IPS_CALLBACK_JOIN_REQUEST = 2,
+}IPS_CALLBACK_FUNCION;
+
+typedef enum _RT_JOIN_ACTION{
+	RT_JOIN_INFRA   = 1,
+	RT_JOIN_IBSS  = 2,
+	RT_START_IBSS = 3,
+	RT_NO_ACTION  = 4,
+}RT_JOIN_ACTION;
+
+typedef struct _IbssParms{
+	u16   atimWin;
+}IbssParms, *PIbssParms;
+#define MAX_NUM_RATES	264 
+
+typedef	enum _RT_RF_POWER_STATE
+{
+	eRfOn,
+	eRfSleep,
+	eRfOff
+}RT_RF_POWER_STATE;
+
+#define	MAX_SUPPORT_WOL_PATTERN_NUM		8
+
+#define	MAX_WOL_BIT_MASK_SIZE		16 
+#define	MAX_WOL_PATTERN_SIZE		128
+
+typedef enum _WOLPATTERN_TYPE
+{
+	eNetBIOS = 0,
+	eIPv4IPv6ARP,
+	eIPv4IPv6TCPSYN,
+	eMACIDOnly,
+	eNoDefined,
+}WOLPATTERN_TYPE;
+
+typedef struct _RT_PM_WOL_PATTERN_INFO
+{
+	u32	PatternId; 
+	u32	Mask[4];
+	u16	CrcRemainder;
+	u8	WFMIndex; 
+	WOLPATTERN_TYPE	PatternType;
+}RT_PM_WOL_PATTERN_INFO, *PRT_PM_WOL_PATTERN_INFO;
+
+typedef struct _RT_POWER_SAVE_CONTROL
+{
+
+	bool				bInactivePs;
+	bool				bIPSModeBackup;
+	bool				bHaltAdapterClkRQ;
+	bool				bSwRfProcessing;
+	RT_RF_POWER_STATE	eInactivePowerState;
+	work_struct_rsl 	InactivePsWorkItem;
+	struct timer_list	InactivePsTimer;
+
+	IPS_CALLBACK_FUNCION	ReturnPoint;
+	
+	bool				bTmpBssDesc;
+	RT_JOIN_ACTION		tmpJoinAction;
+	struct rtllib_network tmpBssDesc;
+
+	bool				bTmpScanOnly;
+	bool				bTmpActiveScan;
+	bool				bTmpFilterHiddenAP;
+	bool				bTmpUpdateParms;
+	u8				tmpSsidBuf[33];
+	OCTET_STRING			tmpSsid2Scan;
+	bool				bTmpSsid2Scan;
+	u8				tmpNetworkType;
+	u8				tmpChannelNumber;
+	u16				tmpBcnPeriod;
+	u8				tmpDtimPeriod;
+	u16				tmpmCap;
+	OCTET_STRING			tmpSuppRateSet;
+	u8				tmpSuppRateBuf[MAX_NUM_RATES];
+	bool				bTmpSuppRate;
+	IbssParms				tmpIbpm;
+	bool				bTmpIbpm;
+
+	bool				bLeisurePs;
+	u32				PowerProfile;
+	u8				LpsIdleCount;
+	u8				RegMaxLPSAwakeIntvl;
+	u8				LPSAwakeIntvl;
+
+	u32				CurPsLevel;
+	u32				RegRfPsLevel;
+
+	bool				bFwCtrlLPS;
+	u8				FWCtrlPSMode;
+
+	bool				LinkReqInIPSRFOffPgs;
+	bool				BufConnectinfoBefore;
+	
+
+	bool				bGpioRfSw;
+
+	u8				oWLANMode;
+	RT_PM_WOL_PATTERN_INFO		PmWoLPatternInfo[MAX_SUPPORT_WOL_PATTERN_NUM]; 
+
+}RT_POWER_SAVE_CONTROL,*PRT_POWER_SAVE_CONTROL;
+
+typedef u32 RT_RF_CHANGE_SOURCE;
+#define RF_CHANGE_BY_SW BIT31
+#define RF_CHANGE_BY_HW BIT30
+#define RF_CHANGE_BY_PS BIT29
+#define RF_CHANGE_BY_IPS BIT28
+#define RF_CHANGE_BY_INIT	0	
+
+typedef enum 
+{
+	COUNTRY_CODE_FCC = 0,
+	COUNTRY_CODE_IC = 1,
+	COUNTRY_CODE_ETSI = 2,
+	COUNTRY_CODE_SPAIN = 3,
+	COUNTRY_CODE_FRANCE = 4,
+	COUNTRY_CODE_MKK = 5,
+	COUNTRY_CODE_MKK1 = 6,
+	COUNTRY_CODE_ISRAEL = 7,
+	COUNTRY_CODE_TELEC = 8,
+	COUNTRY_CODE_MIC = 9,
+	COUNTRY_CODE_GLOBAL_DOMAIN = 10,
+	COUNTRY_CODE_WORLD_WIDE_13 = 11,
+	COUNTRY_CODE_TELEC_NETGEAR = 12,
+	COUNTRY_CODE_MAX
+}country_code_type_t;	
+
+typedef enum _SCAN_OPERATION_BACKUP_OPT{
+	SCAN_OPT_BACKUP=0,
+	SCAN_OPT_RESTORE,
+	SCAN_OPT_MAX
+}SCAN_OPERATION_BACKUP_OPT;
+
+typedef	enum _FW_CMD_IO_TYPE{
+	FW_CMD_DIG_ENABLE = 0, 
+	FW_CMD_DIG_DISABLE = 1,
+	FW_CMD_DIG_HALT = 2,
+	FW_CMD_DIG_RESUME = 3,
+	FW_CMD_HIGH_PWR_ENABLE = 4, 
+	FW_CMD_HIGH_PWR_DISABLE = 5,
+	FW_CMD_RA_RESET = 6, 
+	FW_CMD_RA_ACTIVE= 7,
+	FW_CMD_RA_REFRESH_N= 8,
+	FW_CMD_RA_REFRESH_BG= 9,
+	FW_CMD_RA_INIT= 10,
+	FW_CMD_IQK_ENABLE = 11, 
+	FW_CMD_TXPWR_TRACK_ENABLE = 12,	
+	FW_CMD_TXPWR_TRACK_DISABLE = 13,	
+	FW_CMD_TXPWR_TRACK_THERMAL = 14, 
+	FW_CMD_PAUSE_DM_BY_SCAN = 15,
+	FW_CMD_RESUME_DM_BY_SCAN = 16,
+	FW_CMD_RA_REFRESH_N_COMB = 17,
+	FW_CMD_RA_REFRESH_BG_COMB = 18,
+	FW_CMD_ANTENNA_SW_ENABLE = 19,
+	FW_CMD_ANTENNA_SW_DISABLE = 20,
+	FW_CMD_TX_FEEDBACK_CCX_ENABLE = 21, 
+	FW_CMD_LPS_ENTER = 22,			
+	FW_CMD_LPS_LEAVE = 23,			
+	FW_CMD_DIG_MODE_SS = 24, 			
+	FW_CMD_DIG_MODE_FA = 25,			
+	FW_CMD_ADD_A2_ENTRY = 26,
+	FW_CMD_CTRL_DM_BY_DRIVER = 27,
+	FW_CMD_CTRL_DM_BY_DRIVER_NEW = 28,
+	FW_CMD_PAPE_CONTROL = 29,
+	FW_CMD_CHAN_SET = 30,
+}FW_CMD_IO_TYPE,*PFW_CMD_IO_TYPE;
+
+#define RT_MAX_LD_SLOT_NUM	10
+typedef struct _RT_LINK_DETECT_T{
+
+	u32				NumRecvBcnInPeriod;
+	u32				NumRecvDataInPeriod;
+
+	u32				RxBcnNum[RT_MAX_LD_SLOT_NUM];	
+	u32				RxDataNum[RT_MAX_LD_SLOT_NUM];	
+	u16				SlotNum;	
+	u16				SlotIndex;
+
+	u32				NumTxOkInPeriod;
+	u32				NumRxOkInPeriod;
+	u32				NumRxUnicastOkInPeriod;
+	bool				bBusyTraffic;
+
+#ifdef _RTL8192_EXT_PATCH_
+	u8				IdleCount;
+	u32				LastNumTxUnicast;
+	u32				LastNumRxUnicast;
+#endif	
+}RT_LINK_DETECT_T, *PRT_LINK_DETECT_T;
+
+#ifdef _RTL8192_EXT_PATCH_
+struct rtllib_crypt_data_list{
+	u8 used;
+	u8 mac_addr[ETH_ALEN];  
+	struct rtllib_crypt_data *crypt[WEP_KEYS];
+}__attribute__((packed));
+
+typedef struct _SW_RATR_TABLE{
+	bool bused;
+	u32  ratr_value;
+}SW_RATR_TABLE, *PSW_RATR_TABLE;
+#endif
+
+typedef struct _SW_CAM_TABLE{
+
+	u8				macaddr[6];
+	bool				bused;
+	u8				key_buf[16];
+	u16 				key_type;
+	u8				useDK;
+	u8				key_index;				
+	
+}SW_CAM_TABLE,*PSW_CAM_TABLE;
+#define   TOTAL_CAM_ENTRY				32
+typedef struct _rate_adaptive
+{
+	u8				rate_adaptive_disabled;
+	u8				ratr_state;
+	u16				reserve;	
+	
+	u32				high_rssi_thresh_for_ra;
+	u32				high2low_rssi_thresh_for_ra;
+	u8				low2high_rssi_thresh_for_ra40M;
+	u32				low_rssi_thresh_for_ra40M;
+	u8				low2high_rssi_thresh_for_ra20M;
+	u32				low_rssi_thresh_for_ra20M;
+	u32				upper_rssi_threshold_ratr;
+	u32				middle_rssi_threshold_ratr;
+	u32				low_rssi_threshold_ratr;
+	u32				low_rssi_threshold_ratr_40M;
+	u32				low_rssi_threshold_ratr_20M;
+	u8				ping_rssi_enable;	
+	u32				ping_rssi_ratr;	
+	u32				ping_rssi_thresh_for_ra;
+	u32				last_ratr;
+	u8				PreRATRState;
+	
+} rate_adaptive, *prate_adaptive;
+typedef enum _RATR_TABLE_MODE_8192S{
+	RATR_INX_WIRELESS_NGB = 0,
+	RATR_INX_WIRELESS_NG = 1,
+	RATR_INX_WIRELESS_NB = 2,
+	RATR_INX_WIRELESS_N = 3,
+	RATR_INX_WIRELESS_GB = 4,
+	RATR_INX_WIRELESS_G = 5,
+	RATR_INX_WIRELESS_B = 6,
+	RATR_INX_WIRELESS_MC = 7,
+	RATR_INX_WIRELESS_A = 8,
+}RATR_TABLE_MODE_8192S, *PRATR_TABLE_MODE_8192S;
+
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE) || defined RTL8192CE
+#define PEER_MAX_ASSOC 10
+typedef struct _RSSI_STA{
+	long	UndecoratedSmoothedPWDB;
+}RSSI_STA, *PRSSI_STA;
+
+struct sta_info {
+	u8 macaddr[ETH_ALEN];
+	u16 aid;
+	u8 authentication;
+	u8 encryption;
+	u16 capability;
+	u8 ratr_index;
+	int wireless_mode;
+	RT_HTINFO_STA_ENTRY htinfo;
+	u8 wme_enable;
+	u32 CurDataRate;
+	RSSI_STA rssi_stat;
+	rate_adaptive     rate_adaptive;
+	u8 bPowerSave;		
+	struct sk_buff_head PsQueue;		
+	u32	LastActiveTime; 
+	u16			StaDataRate;  
+	u32			StaSS; 
+	u16			RetryFrameCnt;
+	u16			LastRetryCnt;
+	u16			NoRetryFrameCnt;
+	u16			LastNoRetryCnt;
+	int			AvgRetryRate;
+	int			LastRetryRate;
+	u8			txRateIndex;
+	u16			APDataRate;
+	u16			ForcedDataRate;	
+} __attribute__ ((packed));
+#endif
+#ifdef _RTL8192_EXT_PATCH_
+typedef struct _RT_PEERMP_HTINFO{
+	u8				bEnableHT;
+	u8				bCurrentHTSupport;
+
+	u8				bRegBW40MHz;				
+	u8				bCurBW40MHz;				
+
+	u8				bRegShortGI40MHz;			
+	u8				bCurShortGI40MHz;			
+
+	u8				bRegShortGI20MHz;			
+	u8				bCurShortGI20MHz;			
+
+	u8				bCurSuppCCK;				
+
+	
+
+
+	u8				PeerHTCapBuf[32];
+	u8				PeerHTInfoBuf[32];
+
+
+	u8				bAMSDU_Support;			
+	u16				nAMSDU_MaxSize;			
+	u8				bCurrent_Mesh_AMSDU_Support;	
+	
+
+	u8				bAMPDUEnable;				
+	u8				bCurrentMeshAMPDUEnable;		
+	u8				AMPDU_Factor;				
+	u8				CurrentAMPDUFactor;		
+	u8				MPDU_Density;				
+	u8				CurrentMPDUDensity;			
+
+	u8				ForcedAMPDUFactor;
+	u8				ForcedMPDUDensity;
+
+	HT_AGGRE_MODE_E	ForcedAMSDUMode;
+	u16				ForcedAMSDUMaxSize;
+
+	u8				bForcedShortGI;
+
+	u8				CurrentOpMode;
+
+	u8				MimoPs;
+	
+	HT_EXTCHNL_OFFSET	CurSTAExtChnlOffset;
+	u8				bCurTxBW40MHz;	
+	u8				PeerBandwidth;
+
+	u8				bSwBwInProgress;
+	CHNLOP				ChnlOp; 
+	u8				SwBwStep;
+
+	u8				bRegRT2RTAggregation;
+	u8				bCurrentRT2RTAggregation;
+	u8				bCurrentRT2RTLongSlotTime;
+	u8				szRT2RTAggBuffer[10];
+
+	u8				bRegRxReorderEnable;
+	u8				bCurRxReorderEnable;
+	u8				RxReorderWinSize;
+	u8				RxReorderPendingTime;
+	u16				RxReorderDropCounter;
+
+#ifdef USB_TX_DRIVER_AGGREGATION_ENABLE
+	u8				UsbTxAggrNum;
+#endif
+#ifdef USB_RX_AGGREGATION_SUPPORT
+	u8				UsbRxFwAggrEn;
+	u8				UsbRxFwAggrPageNum;
+	u8				UsbRxFwAggrPacketNum;
+	u8				UsbRxFwAggrTimeout;
+#endif
+
+	u8				bIsPeerBcm;
+
+	u8				McsRateSet[16];
+	u8				HTHighestOperaRate;
+	u8				IOTPeer;
+	u32				IOTAction;
+} __attribute__ ((packed)) peerMP_htinfo, *ppeerMP_htinfo;
+#endif
+
+#define	NUM_PMKID_CACHE		16
+typedef struct _RT_PMKID_LIST
+{
+	u8						bUsed;
+	u8 						Bssid[6];
+	u8						PMKID[16];
+	u8						SsidBuf[33];
+	u8*						ssid_octet;
+	u16 					ssid_length;
+} RT_PMKID_LIST, *PRT_PMKID_LIST;
+
+#ifdef CONFIG_CFG_80211 
+enum {
+	LIBIPW_CH_PASSIVE_ONLY 		= (1 << 0),
+	LIBIPW_CH_80211H_RULES 		= (1 << 1),
+	LIBIPW_CH_B_ONLY 		= (1 << 2),
+	LIBIPW_CH_NO_IBSS 		= (1 << 3),
+	LIBIPW_CH_UNIFORM_SPREADING 	= (1 << 4),
+	LIBIPW_CH_RADAR_DETECT 		= (1 << 5),
+	LIBIPW_CH_INVALID 		= (1 << 6),
+};
+struct rtllib_channel {
+	u32 freq;
+	u8 channel;
+	u8 flags;
+	u8 max_power;
+};
+
+#define RTLLIB_24GHZ_MIN_CHANNEL 1
+#define RTLLIB_24GHZ_MAX_CHANNEL 14
+#define RTLLIB_24GHZ_CHANNELS (RTLLIB_24GHZ_MAX_CHANNEL - \
+		RTLLIB_24GHZ_MIN_CHANNEL + 1)
+
+struct reg_dmn_pair_mapping {
+	u16 regDmnEnum;
+	u16 reg_5ghz_ctl;
+	u16 reg_2ghz_ctl;
+};
+
+struct rtl_regulatory {
+	char alpha2[2];
+	u16 country_code;
+	u16 max_power_level;
+	u32 tp_scale;
+	u16 current_rd;
+	u16 current_rd_ext;
+	int16_t power_limit;
+	struct reg_dmn_pair_mapping *regpair;
+};
+
+struct ieee80211_bss {
+	/* Yes, this is a hack */
+	struct cfg80211_bss cbss;
+
+	/* don't want to look up all the time */
+	size_t ssid_len;
+	u8 ssid[IEEE80211_MAX_SSID_LEN];
+
+	u8 dtim_period;
+
+	bool wmm_used;
+
+	unsigned long last_probe_resp;
+
+#ifdef CONFIG_MAC80211_MESH
+	u8 *mesh_id;
+	size_t mesh_id_len;
+	u8 *mesh_cfg;
+#endif
+
+	#define IEEE80211_MAX_SUPP_RATES 32
+	u8 supp_rates[IEEE80211_MAX_SUPP_RATES];
+	size_t supp_rates_len;
+
+	/*
+	 * During assocation, we save an ERP value from a probe response so
+	 * that we can feed ERP info to the driver when handling the
+	 * association completes. these fields probably won't be up-to-date
+	 * otherwise, you probably don't want to use them.
+	 */
+	bool has_erp_value;
+	u8 erp_value;
+};
+
+/* Parsed Information Elements */
+struct ieee802_11_elems {
+	u8 *ie_start;
+	size_t total_len;
+
+	/* pointers to IEs */
+	u8 *ssid;
+	u8 *supp_rates;
+	u8 *fh_params;
+	u8 *ds_params;
+	u8 *cf_params;
+	struct ieee80211_tim_ie *tim;
+	u8 *ibss_params;
+	u8 *challenge;
+	u8 *wpa;
+	u8 *rsn;
+	u8 *erp_info;
+	u8 *ext_supp_rates;
+	u8 *wmm_info;
+	u8 *wmm_param;
+	struct ieee80211_ht_cap *ht_cap_elem;
+	struct ieee80211_ht_info *ht_info_elem;
+	u8 *mesh_config;
+	u8 *mesh_id;
+	u8 *peer_link;
+	u8 *preq;
+	u8 *prep;
+	u8 *perr;
+	u8 *ch_switch_elem;
+	u8 *country_elem;
+	u8 *pwr_constr_elem;
+	u8 *quiet_elem; 	/* first quite element */
+	u8 *timeout_int;
+
+	/* length of them, respectively */
+	u8 ssid_len;
+	u8 supp_rates_len;
+	u8 fh_params_len;
+	u8 ds_params_len;
+	u8 cf_params_len;
+	u8 tim_len;
+	u8 ibss_params_len;
+	u8 challenge_len;
+	u8 wpa_len;
+	u8 rsn_len;
+	u8 erp_info_len;
+	u8 ext_supp_rates_len;
+	u8 wmm_info_len;
+	u8 wmm_param_len;
+	u8 mesh_config_len;
+	u8 mesh_id_len;
+	u8 peer_link_len;
+	u8 preq_len;
+	u8 prep_len;
+	u8 perr_len;
+	u8 ch_switch_elem_len;
+	u8 country_elem_len;
+	u8 pwr_constr_elem_len;
+	u8 quiet_elem_len;
+	u8 num_of_quiet_elem;	/* can be more the one */
+	u8 timeout_int_len;
+};
+
+#endif
+
+
+typedef struct _RT_INTEL_PROMISCUOUS_MODE_INFO {
+     bool bPromiscuousOn;
+     bool bFilterSourceStationFrame;
+} RT_INTEL_PROMISCUOUS_MODE_INFO, *PRT_INTEL_PROMISCUOUS_MODE_INFO;
+
+
+/*************** DRIVER STATUS   *****/
+#define STATUS_SCANNING			0
+#define STATUS_SCAN_HW			1
+#define STATUS_SCAN_ABORTING	2
+#define STATUS_SETTING_CHAN		3
+/*************** DRIVER STATUS   *****/
+
+enum {
+	NO_USE 		= 0,
+	USED		= 1,
+	HW_SEC 	= 2,
+	SW_SEC		= 3,
+};
+
+struct rtllib_device {
+	struct pci_dev *pdev;
+	struct net_device *dev;
+	struct rtllib_security sec;
+
+	bool disable_mgnt_queue;
+
+	unsigned long status;
+	short hwscan_ch_bk;
+	HT_EXTCHNL_OFFSET chan_offset_bk;
+	HT_CHANNEL_WIDTH bandwidth_bk;
+	u8 hwscan_sem_up;
+#ifdef CONFIG_CFG_80211
+	struct wireless_dev wdev;
+	struct rtl_regulatory regulatory;
+#endif
+	u8	CntAfterLink;
+
+	u8 VersionID;
+	/* The last AssocReq/Resp IEs */
+	u8 *assocreq_ies, *assocresp_ies;
+	size_t assocreq_ies_len, assocresp_ies_len;
+	
+	bool b_customer_lenovo_id;
+	bool	bForcedShowRxRate;
+	bool	bForcedShowRateStill;
+	u8	SystemQueryDataRateCount;
+	bool	bForcedBgMode;
+	bool bUseRAMask;
+	bool b1x1RecvCombine;
+	u8 RF_Type; 
+	bool b1SSSupport;
+	
+	u8 hwsec_active;  
+	bool is_silent_reset;
+      bool force_mic_error;
+	bool is_roaming;
+	bool ieee_up;	
+	bool cannot_notify;	
+	bool bSupportRemoteWakeUp;
+	RT_PS_MODE	dot11PowerSaveMode; 
+	bool actscanning;
+	bool FirstIe_InScan;
+	bool be_scan_inprogress;
+	bool beinretry;
+	RT_RF_POWER_STATE		eRFPowerState;
+	RT_RF_CHANGE_SOURCE	RfOffReason;
+	bool is_set_key;
+	bool wx_set_enc; 
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE) || defined RTL8192CE
+	struct sta_info *peer_assoc_list[PEER_MAX_ASSOC];
+	u8 AvailableAIDTable[PEER_MAX_ASSOC];  
+	atomic_t	AsocEntryNum;
+	u64	CurrTsf;
+	u64	TargetTsf;
+	bool	Peer_bCurBW40M;
+#endif
+	PRT_HIGH_THROUGHPUT	pHTInfo;
+	spinlock_t bw_spinlock;
+
+	spinlock_t reorder_spinlock;
+	u8	Regdot11HTOperationalRateSet[16];		
+	u8	Regdot11TxHTOperationalRateSet[16];		
+	u8	dot11HTOperationalRateSet[16];		
+	u8	RegHTSuppRateSet[16];
+	u8				HTCurrentOperaRate;
+	u8				HTHighestOperaRate;
+       u8		MinSpaceCfg;
+	u8		MaxMssDensity;
+	u8	bTxDisableRateFallBack;
+	u8 	bTxUseDriverAssingedRate;
+	u8	bTxEnableFwCalcDur;
+	atomic_t	atm_chnlop;
+	atomic_t	atm_swbw;
+
+	struct list_head		Tx_TS_Admit_List;
+	struct list_head		Tx_TS_Pending_List;
+	struct list_head		Tx_TS_Unused_List;
+	TX_TS_RECORD		TxTsRecord[TOTAL_TS_NUM];
+	struct list_head		Rx_TS_Admit_List;
+	struct list_head		Rx_TS_Pending_List;
+	struct list_head		Rx_TS_Unused_List;
+	RX_TS_RECORD		RxTsRecord[TOTAL_TS_NUM];
+	RX_REORDER_ENTRY	RxReorderEntry[128];
+	struct list_head		RxReorder_Unused_List;
+	u8				ForcedPriority;		
+	
+
+	/* Bookkeeping structures */
+	struct net_device_stats stats;
+	struct rtllib_stats ieee_stats;
+	struct rtllib_softmac_stats softmac_stats;
+	
+	/* Probe / Beacon management */
+	struct list_head network_free_list;
+	struct list_head network_list;
+#ifdef RTL8192U
+	struct list_head network_bssid_free_list;
+	struct list_head network_bssid_list;
+#endif
+	struct rtllib_network *networks;
+	int scans;
+	int scan_age;
+
+	int iw_mode; /* operating mode (IW_MODE_*) */
+	bool bNetPromiscuousMode; 
+	RT_INTEL_PROMISCUOUS_MODE_INFO IntelPromiscuousModeInfo;
+	
+	struct iw_spy_data spy_data; 
+
+	spinlock_t lock;
+	spinlock_t wpax_suitlist_lock;
+	
+	int tx_headroom; /* Set to size of any additional room needed at front
+			  * of allocated Tx SKBs */
+	u32 config;
+
+	/* WEP and other encryption related settings at the device level */
+	int open_wep; /* Set to 1 to allow unencrypted frames */
+	int auth_mode;
+	int reset_on_keychange; /* Set to 1 if the HW needs to be reset on
+				 * WEP key changes */
+
+	/* If the host performs {en,de}cryption, then set to 1 */
+	int host_encrypt;
+	int host_encrypt_msdu;
+	int host_decrypt;
+        /* host performs multicast decryption */
+        int host_mc_decrypt;
+
+        /* host should strip IV and ICV from protected frames */
+        /* meaningful only when hardware decryption is being used */
+        int host_strip_iv_icv;
+
+        int host_open_frag;
+        int host_build_iv;
+	int ieee802_1x; /* is IEEE 802.1X used */
+
+	/* WPA data */
+	bool bHalfNMode;
+	bool bHalfWirelessN24GMode;
+	int wpa_enabled;
+	int drop_unencrypted;
+	int tkip_countermeasures;
+	int privacy_invoked;
+	size_t wpa_ie_len;
+	u8 *wpa_ie;
+	size_t wps_ie_len;
+	u8 *wps_ie;
+	u8 ap_mac_addr[6];
+	u16 pairwise_key_type;
+	u16 group_key_type;
+	struct list_head crypt_deinit_list;
+#ifdef _RTL8192_EXT_PATCH_
+	struct rtllib_crypt_data_list* cryptlist[MAX_MP];
+	struct rtllib_crypt_data *sta_crypt[WEP_KEYS];
+#else
+	struct rtllib_crypt_data *crypt[WEP_KEYS];
+#endif
+
+	int tx_keyidx; /* default TX key index (crypt[tx_keyidx]) */
+	SW_CAM_TABLE swcamtable[TOTAL_CAM_ENTRY];
+	struct timer_list crypt_deinit_timer;
+        int crypt_quiesced;
+
+	int bcrx_sta_key; /* use individual keys to override default keys even
+			   * with RX of broad/multicast frames */
+	
+	RT_PMKID_LIST		PMKIDList[NUM_PMKID_CACHE];
+
+	/* Fragmentation structures */
+	struct rtllib_frag_entry frag_cache[17][RTLLIB_FRAG_CACHE_LEN];
+	unsigned int frag_next_idx[17];
+	u16 fts; /* Fragmentation Threshold */
+#define DEFAULT_RTS_THRESHOLD 2346U
+#define MIN_RTS_THRESHOLD 1
+#define MAX_RTS_THRESHOLD 2346U
+        u16 rts; /* RTS threshold */
+
+        /* Association info */
+        u8 bssid[ETH_ALEN];
+
+	/* This stores infos for the current network.
+	 * Either the network we are associated in INFRASTRUCTURE
+	 * or the network that we are creating in MASTER mode.
+	 * ad-hoc is a mixture ;-).
+	 * Note that in infrastructure mode, even when not associated,
+	 * fields bssid and essid may be valid (if wpa_set and essid_set
+	 * are true) as thy carry the value set by the user via iwconfig  
+	 */
+	struct rtllib_network current_network;
+
+	enum rtllib_state state;
+
+	int short_slot;
+	int reg_mode;
+	int mode;       /* A, B, G */
+	int modulation; /* CCK, OFDM */
+	int freq_band;  /* 2.4Ghz, 5.2Ghz, Mixed */
+	int abg_true;   /* ABG flag              */
+	
+	/* used for forcing the ibss workqueue to terminate 
+	 * without wait for the syncro scan to terminate
+	 */
+	short sync_scan_hurryup; 
+	u16 scan_watch_dog;
+        int perfect_rssi;
+        int worst_rssi;
+
+        u16 prev_seq_ctl;       /* used to drop duplicate frames */
+
+	/* map of allowed channels. 0 is dummy */
+#ifdef ENABLE_DOT11D
+	void* pDot11dInfo;
+	bool bGlobalDomain;
+#else
+	u8 channel_map[MAX_CHANNEL_NUMBER+1];
+#endif	
+	u8 active_channel_map[MAX_CHANNEL_NUMBER+1];
+
+	u8   IbssStartChnl;
+	u8   ibss_maxjoin_chal;
+
+#ifdef _RTL8192_EXT_PATCH_
+	u8 backup_channel;
+	bool bUseProtection;
+#endif	
+	int rate;       /* current rate */
+	int basic_rate;
+	u32	currentRate;
+	
+	short active_scan;
+	
+	/* this contains flags for selectively enable softmac support */
+	u16 softmac_features;
+	
+	/* if the sequence control field is not filled by HW */
+	u16 seq_ctrl[5];
+	
+	/* association procedure transaction sequence number */
+	u16 associate_seq;
+	
+	/* AID for RTXed association responses */
+	u16 assoc_id;
+	
+	/* power save mode related*/
+	u8 ack_tx_to_ieee;
+	short ps;
+	short sta_sleep;
+	int ps_timeout;
+	int ps_period;
+	struct tasklet_struct ps_task;
+	u32 ps_th;
+	u32 ps_tl;
+	bool polling;
+	
+	short raw_tx;
+	/* used if IEEE_SOFTMAC_TX_QUEUE is set */
+	short queue_stop;
+	short scanning_continue ;
+	short proto_started;
+	short proto_stoppping;
+	
+	struct semaphore wx_sem;
+	struct semaphore scan_sem;
+	struct semaphore ips_sem;
+	
+	spinlock_t mgmt_tx_lock;	
+	spinlock_t beacon_lock;
+
+	short beacon_txing;
+
+	short wap_set;
+	short ssid_set;
+	
+	/* set on initialization */
+	unsigned int wmm_acm;
+	
+	/* for discarding duplicated packets in IBSS */
+	struct list_head ibss_mac_hash[IEEE_IBSS_MAC_HASH_SIZE];
+	
+	/* for discarding duplicated packets in BSS */
+	u16 last_rxseq_num[17]; /* rx seq previous per-tid */
+	u16 last_rxfrag_num[17];/* tx frag previous per-tid */
+	unsigned long last_packet_time[17];
+	
+	/* for PS mode */
+	unsigned long last_rx_ps_time;
+	bool			bAwakePktSent; 
+	u8			LPSDelayCnt;
+	
+	/* used if IEEE_SOFTMAC_SINGLE_QUEUE is set */
+	struct sk_buff *mgmt_queue_ring[MGMT_QUEUE_NUM];
+	int mgmt_queue_head;
+	int mgmt_queue_tail;
+#define RTLLIB_QUEUE_LIMIT 128
+	u8 AsocRetryCount;
+	unsigned int hw_header;
+	struct sk_buff_head skb_waitQ[MAX_QUEUE_SIZE];
+	struct sk_buff_head  skb_aggQ[MAX_QUEUE_SIZE]; 
+	struct sk_buff_head  skb_drv_aggQ[MAX_QUEUE_SIZE]; 
+	u32	sta_edca_param[4];
+	bool aggregation;
+	bool enable_rx_imm_BA;
+	bool bibsscoordinator;
+
+	bool	bdynamic_txpower_enable; 
+
+	bool bCTSToSelfEnable;
+	u8 	CTSToSelfTH;
+	
+	u32 	fsync_time_interval;
+	u32	fsync_rate_bitmap;
+	u8	fsync_rssi_threshold;
+	bool	bfsync_enable;
+
+	u8	fsync_multiple_timeinterval;		
+	u32	fsync_firstdiff_ratethreshold;		
+	u32	fsync_seconddiff_ratethreshold;	 
+	Fsync_State			fsync_state;
+	bool		bis_any_nonbepkts;
+	bandwidth_autoswitch bandwidth_auto_switch;
+	bool FwRWRF;
+
+	RT_LINK_DETECT_T	LinkDetectInfo;
+	bool bIsAggregateFrame;
+	RT_POWER_SAVE_CONTROL	PowerSaveControl;
+	u8 amsdu_in_process;
+
+	/* used if IEEE_SOFTMAC_TX_QUEUE is set */
+	struct  tx_pending_t tx_pending;
+	
+	/* used if IEEE_SOFTMAC_ASSOCIATE is set */
+	struct timer_list associate_timer;
+
+	/* used if IEEE_SOFTMAC_BEACONS is set */
+	struct timer_list beacon_timer;
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
+	struct timer_list ibss_wait_timer;
+#endif
+	u8 need_sw_enc;
+#ifdef _RTL8192_EXT_PATCH_
+	struct net_device *meshdev;
+	struct net_device_stats *meshstats;
+	u8 only_mesh;  
+	u8 hostname[MAX_HOST_NAME_LENGTH];
+	u8 hostname_len;
+	struct list_head mesh_network_free_list;
+	struct list_head mesh_network_list;
+	struct rtllib_network *mesh_networks;
+	struct rtllib_network current_mesh_network;
+	enum rtllib_state mesh_state;
+	short mesh_started;
+	int mesh_security_setting;
+	int mesh_sec_type;
+	struct list_head mesh_mac_hash[IEEE_MESH_MAC_HASH_SIZE];
+	u64 LinkingPeerBitMap;
+	u8 LinkingPeerAddr[MAX_MP-1][ETH_ALEN]; 
+	u8 LinkingPeerSecState[MAX_MP-1];
+	u8 mesh_cached_PTK[MAX_MP-1][16];
+	u32 peer_AID_bitmap;
+	u8 peer_AID_Addr[30][ETH_ALEN];
+	int mesh_txkeyidx;
+	u16 mesh_pairwise_key_type;
+	u16 mesh_group_key_type;
+	u32 HwSecCamBitMap; 
+	u8 HwSecCamStaAddr[TOTAL_CAM_ENTRY][ETH_ALEN]; 
+	SW_CAM_TABLE swmeshcamtable[TOTAL_CAM_ENTRY];
+	SW_RATR_TABLE swmeshratrtable[8];
+	short meshid_set;
+	u8 p2pmode;
+	u8 serverExtChlOffset;
+	u8 APExtChlOffset;
+	short meshScanMode;
+	struct sk_buff_head  skb_meshaggQ[MAX_QUEUE_SIZE]; 
+	u8 mesh_amsdu_in_process;
+#endif
+	work_struct_rsl associate_complete_wq;
+#ifdef ENABLE_IPS
+	work_struct_rsl ips_leave_wq;
+#endif    
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
+	delayed_work_struct_rsl check_tsf_wq;
+	delayed_work_struct_rsl update_assoc_sta_info_wq;
+#endif
+	delayed_work_struct_rsl associate_procedure_wq;
+	delayed_work_struct_rsl softmac_scan_wq;
+	delayed_work_struct_rsl softmac_hint11d_wq;
+	delayed_work_struct_rsl associate_retry_wq;
+	delayed_work_struct_rsl start_ibss_wq;
+#ifndef RTL8190P
+	delayed_work_struct_rsl hw_wakeup_wq;
+	delayed_work_struct_rsl hw_sleep_wq;
+#endif
+	delayed_work_struct_rsl link_change_wq;
+	work_struct_rsl wx_sync_scan_wq;
+#ifdef _RTL8192_EXT_PATCH_
+	work_struct_rsl ext_stop_scan_wq;
+	work_struct_rsl ext_send_beacon_wq;
+	work_struct_rsl ext_create_crypt_for_peers_wq;  
+	work_struct_rsl ext_path_sel_ops_wq;  
+	work_struct_rsl ext_update_extchnloffset_wq;  
+	delayed_work_struct_rsl ext_wx_set_key_wq;
+	work_struct_rsl ext_start_mesh_protocol_wq;  
+#endif
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)  
+	struct workqueue_struct *wq;
+#else
+	u32 *wq;
+#endif
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,40)  
+	/* used for periodly scan */
+	struct timer_list scan_timer;
+#endif
+#if defined (RTL8192S_WAPI_SUPPORT)
+	u8	WapiSupport;    
+	RT_WAPI_T	wapiInfo;
+	struct list_head cache_frag_list;
+	spinlock_t wapi_queue_lock; 
+	WAPI_QUEUE *wapi_queue;	
+#endif
+
+#ifdef _RTL8192_EXT_PATCH_
+	int (*set_mesh_key)(struct net_device *dev,
+                        struct iw_point *encoding, struct iw_encode_ext *ext, u8 *addr);
+#endif
+	/* Callback functions */
+	void (*set_security)(struct net_device *dev,
+			     struct rtllib_security *sec);
+	
+	/* Used to TX data frame by using txb structs.
+	 * this is not used if in the softmac_features
+	 * is set the flag IEEE_SOFTMAC_TX_QUEUE
+	 */
+	int (*hard_start_xmit)(struct rtllib_txb *txb,
+			       struct net_device *dev);
+	
+	int (*reset_port)(struct net_device *dev);
+        int (*is_queue_full) (struct net_device * dev, int pri);
+
+        int (*handle_management) (struct net_device * dev,
+                                  struct rtllib_network * network, u16 type);
+        int (*is_qos_active) (struct net_device *dev, struct sk_buff *skb);
+
+	/* Softmac-generated frames (mamagement) are TXed via this 
+	 * callback if the flag IEEE_SOFTMAC_SINGLE_QUEUE is 
+	 * not set. As some cards may have different HW queues that 
+	 * one might want to use for data and management frames
+	 * the option to have two callbacks might be useful.
+	 * This fucntion can't sleep.
+	 */
+	int (*softmac_hard_start_xmit)(struct sk_buff *skb,
+			       struct net_device *dev);
+	
+	/* used instead of hard_start_xmit (not softmac_hard_start_xmit)
+	 * if the IEEE_SOFTMAC_TX_QUEUE feature is used to TX data
+	 * frames. I the option IEEE_SOFTMAC_SINGLE_QUEUE is also set
+	 * then also management frames are sent via this callback.
+	 * This function can't sleep.
+	 */    
+	void (*softmac_data_hard_start_xmit)(struct sk_buff *skb,
+			       struct net_device *dev,int rate);
+
+	/* stops the HW queue for DATA frames. Useful to avoid
+	 * waste time to TX data frame when we are reassociating
+	 * This function can sleep.
+	 */	 
+	void (*data_hard_stop)(struct net_device *dev);
+	
+	/* OK this is complementar to data_poll_hard_stop */
+	void (*data_hard_resume)(struct net_device *dev);
+	
+	/* ask to the driver to retune the radio .
+	 * This function can sleep. the driver should ensure
+	 * the radio has been swithced before return.
+	 */
+	void (*set_chan)(struct net_device *dev,short ch);
+	
+	/* These are not used if the ieee stack takes care of
+	 * scanning (IEEE_SOFTMAC_SCAN feature set). 
+	 * In this case only the set_chan is used.
+	 *
+	 * The syncro version is similar to the start_scan but
+	 * does not return until all channels has been scanned.
+	 * this is called in user context and should sleep, 
+	 * it is called in a work_queue when swithcing to ad-hoc mode
+	 * or in behalf of iwlist scan when the card is associated 
+	 * and root user ask for a scan. 
+	 * the fucntion stop_scan should stop both the syncro and
+	 * background scanning and can sleep.
+	 * The fucntion start_scan should initiate the background 
+	 * scanning and can't sleep.
+	 */ 
+	void (*scan_syncro)(struct net_device *dev);
+	void (*start_scan)(struct net_device *dev);
+	void (*stop_scan)(struct net_device *dev);
+	
+	void (*rtllib_start_hw_scan)(struct net_device *dev);
+	void (*rtllib_stop_hw_scan)(struct net_device *dev);
+	
+	/* indicate the driver that the link state is changed
+	 * for example it may indicate the card is associated now.
+	 * Driver might be interested in this to apply RX filter 
+	 * rules or simply light the LINK led 
+	 */
+	void (*link_change)(struct net_device *dev);
+	
+	/* these two function indicates to the HW when to start
+	 * and stop to send beacons. This is used when the 
+	 * IEEE_SOFTMAC_BEACONS is not set. For now the
+	 * stop_send_bacons is NOT guaranteed to be called only
+	 * after start_send_beacons.
+	 */
+	void (*start_send_beacons) (struct net_device *dev);
+	void (*stop_send_beacons) (struct net_device *dev);
+	
+	/* power save mode related */
+	void (*sta_wake_up) (struct net_device *dev);
+	void (*enter_sleep_state) (struct net_device *dev, u32 th, u32 tl);
+	short (*ps_is_queue_empty) (struct net_device *dev);
+#if 0
+	/* Typical STA methods */
+        int (*handle_auth) (struct net_device * dev,
+                            struct rtllib_auth * auth);
+        int (*handle_deauth) (struct net_device * dev,
+                              struct rtllib_deauth * auth);
+        int (*handle_action) (struct net_device * dev,
+                              struct rtllib_action * action,
+                              struct rtllib_rx_stats * stats);
+        int (*handle_disassoc) (struct net_device * dev,
+                                struct rtllib_disassoc * assoc);
+#endif
+        int (*handle_beacon) (struct net_device * dev, struct rtllib_beacon * beacon, struct rtllib_network * network);
+#if 0
+        int (*handle_probe_response) (struct net_device * dev,
+                                      struct rtllib_probe_response * resp,
+                                      struct rtllib_network * network);
+        int (*handle_probe_request) (struct net_device * dev,
+                                     struct rtllib_probe_request * req,
+                                     struct rtllib_rx_stats * stats);
+#endif
+        int (*handle_assoc_response) (struct net_device * dev, struct rtllib_assoc_response_frame * resp, struct rtllib_network * network);
+
+#if 0
+        /* Typical AP methods */
+        int (*handle_assoc_request) (struct net_device * dev);
+        int (*handle_reassoc_request) (struct net_device * dev,
+                                       struct rtllib_reassoc_request * req);
+#endif
+
+	/* check whether Tx hw resouce available */
+	short (*check_nic_enough_desc)(struct net_device *dev, int queue_index);
+	short (*get_nic_desc_num)(struct net_device *dev, int queue_index);
+	void (*SetBWModeHandler)(struct net_device *dev, HT_CHANNEL_WIDTH Bandwidth, HT_EXTCHNL_OFFSET Offset);
+	bool (*GetNmodeSupportBySecCfg)(struct net_device* dev);
+	void (*SetWirelessMode)(struct net_device* dev, u8 wireless_mode);
+	bool (*GetHalfNmodeSupportByAPsHandler)(struct net_device* dev); 
+	u8   (*rtllib_ap_sec_type)(struct rtllib_device *ieee);
+	void (*HalUsbRxAggrHandler)(struct net_device *dev, bool Value);
+	void (*InitialGainHandler)(struct net_device *dev, u8 Operation);
+#ifdef _RTL8192_EXT_PATCH_
+	int (*set_key_for_AP)(struct rtllib_device *ieee);
+	void (*del_hwsec_cam_entry)(struct rtllib_device *ieee, u8 *addr); 
+	int (*set_key_for_peer) (struct net_device *dev,u8 *Addr,u8 KeyIndex,u16 KeyType,u32 *KeyContent );
+	int (*ext_patch_rtllib_start_protocol) (struct rtllib_device *ieee); 
+
+	short (*ext_patch_rtllib_probe_req_1) (struct rtllib_device *ieee); 
+	u8* (*ext_patch_rtllib_probe_req_2) (struct rtllib_device *ieee, struct sk_buff *skb, u8 *tag); 
+
+	void (*ext_patch_rtllib_stop_protocol) (struct rtllib_device *ieee,bool is_silent_reset); 
+	
+	int (*ext_patch_rtllib_rx_frame_softmac_on_peerlink_open) (struct rtllib_device *ieee, struct sk_buff *skb, struct rtllib_rx_stats *rx_stats);
+	int (*ext_patch_rtllib_rx_frame_softmac_on_peerlink_confirm) (struct rtllib_device *ieee, struct sk_buff *skb);
+	int (*ext_patch_rtllib_rx_frame_softmac_on_peerlink_close) (struct rtllib_device *ieee, struct sk_buff *skb);
+	void (*ext_patch_rtllib_close_all_peerlink) (struct rtllib_device *ieee, __le16 reason);
+
+	int (*ext_patch_rtllib_rx_frame_softmac_on_linkmetric_report) (struct rtllib_device *ieee, struct sk_buff *skb);
+	int (*ext_patch_rtllib_rx_frame_softmac_on_linkmetric_req) (struct rtllib_device *ieee, struct sk_buff *skb);
+
+	int (*ext_patch_rtllib_rx_frame_softmac_on_pathselect_preq) (struct rtllib_device *ieee, struct sk_buff *skb,struct rtllib_rx_stats *rx_stats);
+	int (*ext_patch_rtllib_rx_frame_softmac_on_pathselect_prep) (struct rtllib_device *ieee, struct sk_buff *skb,struct rtllib_rx_stats *rx_stats);
+	int (*ext_patch_rtllib_rx_frame_softmac_on_pathselect_perr) (struct rtllib_device *ieee, struct sk_buff *skb,struct rtllib_rx_stats *rx_stats);
+	int (*ext_patch_rtllib_rx_frame_softmac_on_pathselect_rann) (struct rtllib_device *ieee, struct sk_buff *skb,struct rtllib_rx_stats *rx_stats);
+	int (*ext_patch_rtllib_rx_frame_softmac_on_pathselect_pann) (struct rtllib_device *ieee, struct sk_buff *skb,struct rtllib_rx_stats *rx_stats);
+
+	int (*ext_patch_rtllib_ext_stop_scan_wq_set_channel) (struct rtllib_device *ieee);
+	int (*ext_patch_r819x_wx_set_mesh_chan)(struct net_device *dev, unsigned char channel);
+	void (*ext_patch_r819x_wx_set_channel) (struct rtllib_device *ieee, int ch);
+	
+	int (*ext_patch_rtllib_softmac_xmit_get_rate) (struct rtllib_device *ieee, struct sk_buff *skb);
+	int (*ext_patch_rtllib_rx_frame_softmac_on_auth)(struct rtllib_device *ieee, struct sk_buff *skb, struct rtllib_rx_stats *rx_stats);
+	int (*ext_patch_rtllib_rx_frame_softmac_on_deauth)(struct rtllib_device *ieee, struct sk_buff *skb, struct rtllib_rx_stats *rx_stats);
+	int (*ext_patch_rtllib_tx_data)(struct rtllib_device *ieee, struct rtllib_hdr_4addrqos* header, u8* is_peer_n_mode, u8* is_peer_40M,
+		u8* is_peer_shortGI_40M, u8* is_peer_shortGI_20M,u8* peer_highest_opra_rate,u8* peer_ratr_index, u8* AID);
+	bool (*ext_patch_rtllib_is_mesh)(struct rtllib_device * ieee,u8 * addr);
+	ppeerMP_htinfo (*ext_patch_rtllib_get_peermp_htinfo) (struct rtllib_device *ieee,u8 * daddr);
+	int (* ext_patch_rtllib_create_crypt_for_peer)(struct rtllib_device * ieee);
+	void (*ext_patch_rtllib_start_mesh)(struct rtllib_device *ieee);
+	void (*ext_patch_rtllib_rx_mgt_on_probe_req) ( struct rtllib_device *ieee, struct rtllib_probe_request *beacon, struct rtllib_rx_stats *stats);
+	unsigned int(*ext_patch_rtllib_process_probe_response_1)(struct rtllib_device *ieee,	struct rtllib_probe_response *beacon,	struct rtllib_rx_stats *stats);
+	
+	void (*ext_patch_rtllib_rx_mgt_update_expire) ( struct rtllib_device *ieee, struct sk_buff *skb);
+	struct sk_buff* (*ext_patch_get_beacon_get_probersp)(struct rtllib_device *ieee, u8 *dest, struct rtllib_network *net);
+
+	int (*ext_patch_rtllib_rx_on_rx) (struct rtllib_device *ieee, struct sk_buff *skb, struct rtllib_rx_stats *rx_stats, u16 type, u16 stype);
+	
+	int (*ext_patch_rtllib_rx_frame_get_hdrlen) (struct rtllib_device *ieee, struct sk_buff *skb);
+	
+	int (*ext_patch_rtllib_rx_frame_get_mac_hdrlen) (struct rtllib_device *ieee, struct sk_buff *skb);
+	
+	int (*ext_patch_rtllib_rx_frame_get_mesh_hdrlen_llc) (struct rtllib_device *ieee, struct sk_buff *skb);
+	int (*ext_patch_rtllib_rx_is_valid_framectl) (struct rtllib_device *ieee, u16 fc, u16 type, u16 stype);
+	
+	
+	/* added by david for setting acl dynamically */
+	u8 (*ext_patch_rtllib_acl_query) (struct rtllib_device *ieee, u8 *sa);
+
+	
+	struct sk_buff* (*ext_patch_rtllib_send_ath_commit) (struct rtllib_device * ieee,u8 * addr);
+	struct sk_buff* (*ext_patch_rtllib_send_ath_confirm) (struct rtllib_device * ieee,u8 * addr);
+	int (*ext_patch_rtllib_rx_ath_commit) (struct rtllib_device * ieee,u8 * addr);
+	u8 (*ext_patch_rtllib_rx_ath_confirm) (struct rtllib_device *ieee, u8* pframe,u16 strlen,u8 *addr);
+
+#endif 
+	bool (*SetFwCmdHandler)(struct net_device *dev,	FW_CMD_IO_TYPE		FwCmdIO);
+	void (*UpdateHalRAMaskHandler)(struct net_device* dev, bool bMulticast, u8 macId, u8 MimoPs, u8 WirelessMode, u8 bCurTxBW40MHz,	u8 rssi_level);
+	void (*UpdateBeaconInterruptHandler)(struct net_device* dev, bool start);
+	u16  (*rtl_11n_user_show_rates)(struct net_device *dev);
+	void (*ScanOperationBackupHandler)(struct net_device *dev, u8 Operation);
+	void (*LedControlHandler)(struct net_device * dev, LED_CTL_MODE LedAction);
+	void (*SetHwRegHandler)(struct net_device *dev,u8 variable,u8* val);
+	void (*GetHwRegHandler)(struct net_device *dev,u8 variable,u8* val);
+
+	void (*AllowAllDestAddrHandler)(struct net_device *dev, bool bAllowAllDA, bool WriteIntoReg);
+	
+#ifdef ENABLE_IPS
+        void (*rtllib_ips_leave_wq) (struct net_device *dev);
+        void (*rtllib_ips_leave)(struct net_device *dev);
+#endif
+#ifdef ENABLE_LPS
+	void (*LeisurePSLeave)(struct net_device *dev);
+#endif
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
+	void (*SetBeaconRelatedRegistersHandler)(struct net_device* dev);
+	bool (*check_ht_cap)(struct net_device* dev, struct sta_info *sta, struct rtllib_network* net);
+	void (*Adhoc_InitRateAdaptive)(struct net_device *dev,struct sta_info  *pEntry);
+#endif
+	void (*rtllib_rfkill_poll)(struct net_device *dev);
+
+	/* This must be the last item so that it points to the data
+	 * allocated beyond this structure by alloc_rtllib */
+	u8 priv[0];
+};
+
+#define IEEE_A            (1<<0)
+#define IEEE_B            (1<<1)
+#define IEEE_G            (1<<2)
+#define IEEE_N_24G 		  (1<<4)
+#define	IEEE_N_5G		  (1<<5)
+#define IEEE_MODE_MASK    (IEEE_A|IEEE_B|IEEE_G)
+
+/* Generate a 802.11 header */
+
+/* Uses the channel change callback directly
+ * instead of [start/stop] scan callbacks
+ */
+#define IEEE_SOFTMAC_SCAN (1<<2)
+
+/* Perform authentication and association handshake */
+#define IEEE_SOFTMAC_ASSOCIATE (1<<3)
+
+/* Generate probe requests */
+#define IEEE_SOFTMAC_PROBERQ (1<<4)
+
+/* Generate respones to probe requests */
+#define IEEE_SOFTMAC_PROBERS (1<<5)
+
+/* The ieee802.11 stack will manages the netif queue
+ * wake/stop for the driver, taking care of 802.11
+ * fragmentation. See softmac.c for details. */
+#define IEEE_SOFTMAC_TX_QUEUE (1<<7)
+
+/* Uses only the softmac_data_hard_start_xmit
+ * even for TX management frames.
+ */
+#define IEEE_SOFTMAC_SINGLE_QUEUE (1<<8)
+
+/* Generate beacons.  The stack will enqueue beacons
+ * to the card 
+ */ 
+#define IEEE_SOFTMAC_BEACONS (1<<6)
+
+#ifdef _RTL8192_EXT_PATCH_
+static inline int rtllib_find_MP(struct rtllib_device* ieee, const u8* addr, u8 set)
+{
+	int i=0;
+	for (i=1; i<MAX_MP; i++) {
+		if ((ieee->cryptlist[i]->used == 0) && set) {
+			memcpy(ieee->cryptlist[i]->mac_addr, addr, ETH_ALEN);
+			ieee->cryptlist[i]->used = 1;
+			return i;
+		} else if (0 == memcmp(ieee->cryptlist[i]->mac_addr, addr, ETH_ALEN)) {
+			return i;
+		}
+	}
+	return -1;
+}
+#endif
+
+static inline void *rtllib_priv(struct net_device *dev)
+{
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0) 
+	return ((struct rtllib_device *)netdev_priv(dev))->priv;
+#else
+	return ((struct rtllib_device *)dev->priv)->priv;
+#endif
+}
+
+extern inline int rtllib_is_empty_essid(const char *essid, int essid_len)
+{
+	/* Single white space is for Linksys APs */
+	if (essid_len == 1 && essid[0] == ' ')
+		return 1;
+
+	/* Otherwise, if the entire essid is 0, we assume it is hidden */
+	while (essid_len) {
+		essid_len--;
+		if (essid[essid_len] != '\0')
+			return 0;
+	}
+
+	return 1;
+}
+
+extern inline int rtllib_is_valid_mode(struct rtllib_device *ieee, int mode)
+{
+	/*
+	 * It is possible for both access points and our device to support
+	 * combinations of modes, so as long as there is one valid combination
+	 * of ap/device supported modes, then return success
+	 *
+	 */
+	if ((mode & IEEE_A) &&
+	    (ieee->modulation & RTLLIB_OFDM_MODULATION) &&
+	    (ieee->freq_band & RTLLIB_52GHZ_BAND))
+		return 1;
+
+	if ((mode & IEEE_G) &&
+	    (ieee->modulation & RTLLIB_OFDM_MODULATION) &&
+	    (ieee->freq_band & RTLLIB_24GHZ_BAND))
+		return 1;
+
+	if ((mode & IEEE_B) &&
+	    (ieee->modulation & RTLLIB_CCK_MODULATION) &&
+	    (ieee->freq_band & RTLLIB_24GHZ_BAND))
+		return 1;
+
+	return 0;
+}
+
+extern inline int rtllib_get_hdrlen(u16 fc)
+{
+	int hdrlen = RTLLIB_3ADDR_LEN;
+
+	switch (WLAN_FC_GET_TYPE(fc)) {
+	case RTLLIB_FTYPE_DATA:
+		if ((fc & RTLLIB_FCTL_FROMDS) && (fc & RTLLIB_FCTL_TODS))
+			hdrlen = RTLLIB_4ADDR_LEN; /* Addr4 */
+		if(RTLLIB_QOS_HAS_SEQ(fc))
+			hdrlen += 2; /* QOS ctrl*/
+		break;
+	case RTLLIB_FTYPE_CTL:
+		switch (WLAN_FC_GET_STYPE(fc)) {
+		case RTLLIB_STYPE_CTS:
+		case RTLLIB_STYPE_ACK:
+			hdrlen = RTLLIB_1ADDR_LEN;
+			break;
+		default:
+			hdrlen = RTLLIB_2ADDR_LEN;
+			break;
+		}
+		break;
+	}
+
+	return hdrlen;
+}
+
+static inline u8 *rtllib_get_payload(struct rtllib_hdr *hdr)
+{
+        switch (rtllib_get_hdrlen(le16_to_cpu(hdr->frame_ctl))) {
+        case RTLLIB_1ADDR_LEN:
+                return ((struct rtllib_hdr_1addr *)hdr)->payload;
+        case RTLLIB_2ADDR_LEN:
+                return ((struct rtllib_hdr_2addr *)hdr)->payload;
+        case RTLLIB_3ADDR_LEN:
+                return ((struct rtllib_hdr_3addr *)hdr)->payload;
+        case RTLLIB_4ADDR_LEN:
+                return ((struct rtllib_hdr_4addr *)hdr)->payload;
+        }
+        return NULL;
+}
+
+static inline int rtllib_is_ofdm_rate(u8 rate)
+{
+        switch (rate & ~RTLLIB_BASIC_RATE_MASK) {
+        case RTLLIB_OFDM_RATE_6MB:
+        case RTLLIB_OFDM_RATE_9MB:
+        case RTLLIB_OFDM_RATE_12MB:
+        case RTLLIB_OFDM_RATE_18MB:
+        case RTLLIB_OFDM_RATE_24MB:
+        case RTLLIB_OFDM_RATE_36MB:
+        case RTLLIB_OFDM_RATE_48MB:
+        case RTLLIB_OFDM_RATE_54MB:
+                return 1;
+        }
+        return 0;
+}
+
+static inline int rtllib_is_cck_rate(u8 rate)
+{
+        switch (rate & ~RTLLIB_BASIC_RATE_MASK) {
+        case RTLLIB_CCK_RATE_1MB:
+        case RTLLIB_CCK_RATE_2MB:
+        case RTLLIB_CCK_RATE_5MB:
+        case RTLLIB_CCK_RATE_11MB:
+                return 1;
+        }
+        return 0;
+}
+
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10))
+static inline unsigned compare_ether_addr(const u8 *addr1, const u8 *addr2)
+{
+	const u16 *a = (const u16 *) addr1;
+	const u16 *b = (const u16 *) addr2;
+
+	BUILD_BUG_ON(ETH_ALEN != 6);
+	return ((a[0] ^ b[0]) | (a[1] ^ b[1]) | (a[2] ^ b[2])) != 0;
+}
+#endif
+
+/* rtllib.c */
+extern void free_rtllib(struct net_device *dev);
+extern struct net_device *alloc_rtllib(int sizeof_priv);
+
+extern int rtllib_set_encryption(struct rtllib_device *ieee);
+
+/* rtllib_tx.c */
+
+#ifdef _RTL8192_EXT_PATCH_
+extern int rtllib_encrypt_fragment(
+	struct rtllib_device *ieee,
+	struct sk_buff *frag,
+	int hdr_len, u8 is_mesh, u8 entry);
+#else
+extern int rtllib_encrypt_fragment(
+	struct rtllib_device *ieee,
+	struct sk_buff *frag,
+	int hdr_len);
+#endif
+
+extern int rtllib_xmit(struct sk_buff *skb,  struct net_device *dev);
+extern int rtllib_xmit_inter(struct sk_buff *skb, struct net_device *dev);
+#ifdef _RTL8192_EXT_PATCH_
+extern int rtllib_classify(struct sk_buff *skb, u8 bIsAmsdu);
+extern int rtllib_mesh_xmit(struct sk_buff *skb,  struct net_device *dev);
+extern inline int rtllib_put_snap(u8 *data, u16 h_proto);
+#endif
+extern void rtllib_txb_free(struct rtllib_txb *);
+
+#ifdef ENABLE_AMSDU
+extern struct sk_buff *AMSDU_Aggregation(struct rtllib_device *ieee, struct sk_buff_head *pSendList);
+extern u8 AMSDU_GetAggregatibleList(struct rtllib_device *ieee, struct sk_buff *pCurSkb, struct sk_buff_head	*pSendList, u8 queue_index);
+extern struct sk_buff *msh_AMSDU_Aggregation(struct rtllib_device *ieee, struct sk_buff_head *pSendList);
+extern u8 msh_AMSDU_GetAggregatibleList(struct rtllib_device *ieee, struct sk_buff *pCurSkb, struct sk_buff_head *pSendList, u8 queue_index);
+#endif
+
+/* rtllib_rx.c */
+extern int rtllib_rx(struct rtllib_device *ieee, struct sk_buff *skb,
+			struct rtllib_rx_stats *rx_stats);
+extern void rtllib_rx_mgt(struct rtllib_device *ieee,
+			     struct sk_buff *skb,
+			     struct rtllib_rx_stats *stats);
+extern void rtllib_rx_probe_rq(struct rtllib_device *ieee, 
+                           struct sk_buff *skb);
+extern int IsLegalChannel( struct rtllib_device *rtllib, u8 channel);
+
+/* rtllib_wx.c */
+extern int rtllib_wx_get_scan(struct rtllib_device *ieee,
+				 struct iw_request_info *info,
+				 union iwreq_data *wrqu, char *key);
+#ifdef _RTL8192_EXT_PATCH_
+extern int rtllib_wx_set_encode(struct rtllib_device *ieee,
+				   struct iw_request_info *info,
+				   union iwreq_data *wrqu, char *key, u8 is_mesh);
+extern int rtllib_wx_get_encode(struct rtllib_device *ieee,
+				   struct iw_request_info *info,
+				   union iwreq_data *wrqu, char *key, u8 is_mesh);
+extern int rtllib_mesh_set_encode_ext(struct rtllib_device *ieee,
+                               struct iw_point *encoding, struct iw_encode_ext *ext, int entry);
+#if WIRELESS_EXT >= 18
+extern int rtllib_wx_get_encode_ext(struct rtllib_device *ieee,
+                            struct iw_request_info *info,
+                            union iwreq_data* wrqu, char *extra, u8 is_mesh);
+extern int rtllib_wx_set_encode_ext(struct rtllib_device *ieee,
+                            struct iw_request_info *info,
+                            union iwreq_data* wrqu, char *extra, u8 is_mesh);
+#endif
+#else
+extern int rtllib_wx_set_encode(struct rtllib_device *ieee,
+				   struct iw_request_info *info,
+				   union iwreq_data *wrqu, char *key);
+extern int rtllib_wx_get_encode(struct rtllib_device *ieee,
+				   struct iw_request_info *info,
+				   union iwreq_data *wrqu, char *key);
+#if WIRELESS_EXT >= 18
+extern int rtllib_wx_get_encode_ext(struct rtllib_device *ieee,
+                            struct iw_request_info *info,
+                            union iwreq_data* wrqu, char *extra);
+extern int rtllib_wx_set_encode_ext(struct rtllib_device *ieee,
+                            struct iw_request_info *info,
+                            union iwreq_data* wrqu, char *extra);
+#endif
+#endif
+extern int rtllib_wx_set_auth(struct rtllib_device *ieee,
+                               struct iw_request_info *info,
+                               struct iw_param *data, char *extra);
+extern int rtllib_wx_set_mlme(struct rtllib_device *ieee,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra);
+extern int rtllib_wx_set_gen_ie(struct rtllib_device *ieee, u8 *ie, size_t len);
+
+/* rtllib_softmac.c */
+extern short rtllib_is_54g(struct rtllib_network *net);
+extern short rtllib_is_shortslot(struct rtllib_network net);
+extern int rtllib_rx_frame_softmac(struct rtllib_device *ieee, struct sk_buff *skb,
+			struct rtllib_rx_stats *rx_stats, u16 type,
+			u16 stype);
+extern void rtllib_softmac_new_net(struct rtllib_device *ieee, struct rtllib_network *net);
+
+void SendDisassociation(struct rtllib_device *ieee, bool deauth, u16 asRsn);
+extern void rtllib_softmac_xmit(struct rtllib_txb *txb, struct rtllib_device *ieee);
+
+extern void rtllib_stop_send_beacons(struct rtllib_device *ieee);
+extern void notify_wx_assoc_event(struct rtllib_device *ieee);
+extern void rtllib_softmac_check_all_nets(struct rtllib_device *ieee);
+extern void rtllib_start_bss(struct rtllib_device *ieee);
+extern void rtllib_start_master_bss(struct rtllib_device *ieee);
+extern void rtllib_start_ibss(struct rtllib_device *ieee);
+extern void rtllib_softmac_init(struct rtllib_device *ieee);
+extern void rtllib_softmac_free(struct rtllib_device *ieee);
+extern void rtllib_associate_abort(struct rtllib_device *ieee);
+extern void rtllib_disassociate(struct rtllib_device *ieee);
+extern void rtllib_stop_scan(struct rtllib_device *ieee);
+extern bool rtllib_act_scanning(struct rtllib_device *ieee, bool sync_scan);
+extern void rtllib_stop_scan_syncro(struct rtllib_device *ieee);
+extern void rtllib_start_scan_syncro(struct rtllib_device *ieee, u8 is_mesh);
+extern inline struct sk_buff *rtllib_probe_req(struct rtllib_device *ieee);
+extern u8 MgntQuery_MgntFrameTxRate(struct rtllib_device *ieee);
+extern void rtllib_sta_ps_send_null_frame(struct rtllib_device *ieee, short pwr);
+extern void rtllib_sta_wakeup(struct rtllib_device *ieee, short nl);
+extern void rtllib_sta_ps_send_pspoll_frame(struct rtllib_device *ieee);
+extern void rtllib_check_all_nets(struct rtllib_device *ieee);
+extern void rtllib_start_protocol(struct rtllib_device *ieee);
+extern void rtllib_stop_protocol(struct rtllib_device *ieee, u8 shutdown);
+
+extern void rtllib_EnableNetMonitorMode(struct net_device* dev, bool bInitState);
+extern void rtllib_DisableNetMonitorMode(struct net_device* dev, bool bInitState);
+extern void rtllib_EnableIntelPromiscuousMode(struct net_device* dev, bool bInitState);
+extern void rtllib_DisableIntelPromiscuousMode(struct net_device* dev, bool bInitState);
+#ifdef _RTL8192_EXT_PATCH_
+extern void rtllib_send_probe_requests(struct rtllib_device *ieee, u8 is_mesh);
+#else
+extern void rtllib_send_probe_requests(struct rtllib_device *ieee);
+#endif
+#ifdef _RTL8192_EXT_PATCH_
+extern void rtllib_softmac_start_protocol(struct rtllib_device *ieee,u8 mesh_flag);
+extern void rtllib_softmac_stop_protocol(struct rtllib_device *ieee, u8 mesh_flag, u8 shutdown);
+extern void rtllib_start_mesh_protocol(struct rtllib_device *ieee);
+extern void rtllib_stop_mesh_protocol(struct rtllib_device *ieee);
+#else
+extern void rtllib_softmac_start_protocol(struct rtllib_device *ieee);
+extern void rtllib_softmac_stop_protocol(struct rtllib_device *ieee, u8 shutdown);
+#endif
+extern void rtllib_reset_queue(struct rtllib_device *ieee);
+extern void rtllib_wake_queue(struct rtllib_device *ieee);
+extern void rtllib_stop_queue(struct rtllib_device *ieee);
+extern void rtllib_wake_all_queues(struct rtllib_device *ieee);
+extern void rtllib_stop_all_queues(struct rtllib_device *ieee);
+extern struct sk_buff *rtllib_get_beacon(struct rtllib_device *ieee);
+extern void rtllib_start_send_beacons(struct rtllib_device *ieee);
+extern void rtllib_stop_send_beacons(struct rtllib_device *ieee);
+#ifdef _RTL8192_EXT_PATCH_
+extern int rtllib_wpa_supplicant_ioctl(struct rtllib_device *ieee, struct iw_point *p, u8 is_mesh);
+#else
+extern int rtllib_wpa_supplicant_ioctl(struct rtllib_device *ieee, struct iw_point *p);
+#endif
+extern void notify_wx_assoc_event(struct rtllib_device *ieee);
+extern void rtllib_ps_tx_ack(struct rtllib_device *ieee, short success);
+
+extern void softmac_mgmt_xmit(struct sk_buff *skb, struct rtllib_device *ieee);
+extern u16 rtllib_query_seqnum(struct rtllib_device*ieee, struct sk_buff* skb, u8* dst);
+extern u8 rtllib_ap_sec_type(struct rtllib_device *ieee);
+
+#ifdef _RTL8192_EXT_PATCH_
+extern void rtllib_resp_to_auth(struct rtllib_device *ieee, int s, u8* dest);
+extern void rtllib_associate_step1(struct rtllib_device *ieee,u8 * addr);
+extern bool rtllib_ext_prepare_to_joinmesh(struct rtllib_device *ieee, struct rtllib_network *pstat);
+extern u8 HTFilterMCSRate( struct rtllib_device* ieee, u8* pSupportMCS, u8* pOperateMCS);
+extern void HTUseDefaultSetting(struct rtllib_device* ieee);
+extern void rtllib_start_scan(struct rtllib_device *ieee);
+extern struct sk_buff* rtllib_ext_probe_resp_by_net(struct rtllib_device *ieee, u8 *dest, struct rtllib_network *net);
+extern int rtllib_network_init(struct rtllib_device *ieee, struct rtllib_probe_response *beacon, struct rtllib_network *network, struct rtllib_rx_stats *stats);
+extern struct rtllib_txb *rtllib_alloc_txb(int nr_frags, int txb_size, int gfp_mask);
+extern void rtllib_ext_send_11s_beacon(struct rtllib_device *ieee);
+#endif
+
+/* rtllib_crypt_ccmp&tkip&wep.c */
+extern void rtllib_tkip_null(void);
+extern void rtllib_wep_null(void);
+extern void rtllib_ccmp_null(void);
+
+/* rtllib_softmac_wx.c */
+
+extern int rtllib_wx_get_wap(struct rtllib_device *ieee, 
+			    struct iw_request_info *info, 
+			    union iwreq_data *wrqu, char *ext);
+			    
+extern int rtllib_wx_set_wap(struct rtllib_device *ieee,
+			 struct iw_request_info *info,
+			 union iwreq_data *awrq,
+			 char *extra);
+			 
+extern int rtllib_wx_get_essid(struct rtllib_device *ieee, struct iw_request_info *a,union iwreq_data *wrqu,char *b);
+
+extern int rtllib_wx_set_rate(struct rtllib_device *ieee, 
+			     struct iw_request_info *info,
+			     union iwreq_data *wrqu, char *extra);
+			     
+extern int rtllib_wx_get_rate(struct rtllib_device *ieee, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra);
+			     
+extern int rtllib_wx_set_mode(struct rtllib_device *ieee, struct iw_request_info *a,
+			     union iwreq_data *wrqu, char *b);
+			     
+extern int rtllib_wx_set_scan(struct rtllib_device *ieee, struct iw_request_info *a,
+			     union iwreq_data *wrqu, char *b);
+			     
+extern int rtllib_wx_set_essid(struct rtllib_device *ieee, 
+			      struct iw_request_info *a,
+			      union iwreq_data *wrqu, char *extra);
+			      
+extern int rtllib_wx_get_mode(struct rtllib_device *ieee, struct iw_request_info *a,
+			     union iwreq_data *wrqu, char *b);
+
+extern int rtllib_wx_set_freq(struct rtllib_device *ieee, struct iw_request_info *a,
+			     union iwreq_data *wrqu, char *b);
+
+#ifdef _RTL8192_EXT_PATCH_
+extern int rtllib_wx_get_freq(struct rtllib_device *ieee, struct iw_request_info *a,
+			     union iwreq_data *wrqu, char *b, u8 is_mesh);
+#else
+extern int rtllib_wx_get_freq(struct rtllib_device *ieee, struct iw_request_info *a,
+			     union iwreq_data *wrqu, char *b);
+#endif
+extern void rtllib_wx_sync_scan_wq(void *data);
+
+extern int rtllib_wx_set_rawtx(struct rtllib_device *ieee, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra);
+			       
+extern int rtllib_wx_get_name(struct rtllib_device *ieee, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra);
+
+extern int rtllib_wx_set_power(struct rtllib_device *ieee,
+				 struct iw_request_info *info,
+				 union iwreq_data *wrqu, char *extra);
+
+extern int rtllib_wx_get_power(struct rtllib_device *ieee,
+				 struct iw_request_info *info,
+				 union iwreq_data *wrqu, char *extra);
+
+extern int rtllib_wx_set_rts(struct rtllib_device *ieee, 
+			     struct iw_request_info *info,
+			     union iwreq_data *wrqu, char *extra);
+
+extern int rtllib_wx_get_rts(struct rtllib_device *ieee, 
+			     struct iw_request_info *info,
+			     union iwreq_data *wrqu, char *extra);
+#ifdef _RTL8192_EXT_PATCH_
+extern void rtllib_sta_ps_send_null_frame(struct rtllib_device *ieee, short pwr);
+#endif
+#define MAX_RECEIVE_BUFFER_SIZE 9100  
+extern void HTDebugHTCapability(u8* CapIE, u8* TitleString );
+extern void HTDebugHTInfo(u8*  InfoIE, u8* TitleString);
+
+void HTSetConnectBwMode(struct rtllib_device* ieee, HT_CHANNEL_WIDTH Bandwidth, HT_EXTCHNL_OFFSET    Offset);
+extern void HTUpdateDefaultSetting(struct rtllib_device* ieee);
+#ifdef _RTL8192_EXT_PATCH_
+extern void HTConstructCapabilityElement(struct rtllib_device* ieee, u8* posHTCap, u8* len, u8 isEncrypt, u8 bIsBcn);
+#else
+extern void HTConstructCapabilityElement(struct rtllib_device* ieee, u8* posHTCap, u8* len, u8 isEncrypt);
+#endif
+extern void HTConstructInfoElement(struct rtllib_device* ieee, u8* posHTInfo, u8* len, u8 isEncrypt);
+extern void HTConstructRT2RTAggElement(struct rtllib_device* ieee, u8* posRT2RTAgg, u8* len);
+extern void HTOnAssocRsp(struct rtllib_device *ieee);
+extern void HTInitializeHTInfo(struct rtllib_device* ieee);
+extern void HTInitializeBssDesc(PBSS_HT pBssHT);
+extern void HTResetSelfAndSavePeerSetting(struct rtllib_device* ieee, struct rtllib_network * pNetwork);
+extern void HTUpdateSelfAndPeerSetting(struct rtllib_device* ieee,   struct rtllib_network * pNetwork);
+extern u8 HTGetHighestMCSRate(struct rtllib_device* ieee, u8* pMCSRateSet, u8* pMCSFilter);
+extern u8 MCS_FILTER_ALL[];
+extern u16 MCS_DATA_RATE[2][2][77] ;
+extern u8 HTCCheck(struct rtllib_device* ieee, u8*   pFrame);
+extern void HTResetIOTSetting(PRT_HIGH_THROUGHPUT  pHTInfo);
+extern bool IsHTHalfNmodeAPs(struct rtllib_device* ieee);
+extern u16 HTHalfMcsToDataRate(struct rtllib_device* ieee,  u8      nMcsRate);
+extern u16 HTMcsToDataRate( struct rtllib_device* ieee, u8 nMcsRate);
+extern u16  TxCountToDataRate( struct rtllib_device* ieee, u8 nDataRate);
+extern int rtllib_rx_ADDBAReq( struct rtllib_device* ieee, struct sk_buff *skb);
+extern int rtllib_rx_ADDBARsp( struct rtllib_device* ieee, struct sk_buff *skb);
+extern int rtllib_rx_DELBA(struct rtllib_device* ieee,struct sk_buff *skb);
+extern void TsInitAddBA( struct rtllib_device* ieee, PTX_TS_RECORD   pTS, u8 Policy, u8 bOverwritePending);
+extern void TsInitDelBA( struct rtllib_device* ieee, PTS_COMMON_INFO pTsCommonInfo, TR_SELECT TxRxSelect);
+extern void BaSetupTimeOut(unsigned long data);
+extern void TxBaInactTimeout(unsigned long data);
+extern void RxBaInactTimeout(unsigned long data);
+extern void ResetBaEntry( PBA_RECORD pBA);
+extern bool GetTs(
+        struct rtllib_device*        ieee,
+        PTS_COMMON_INFO                 *ppTS,
+        u8*                             Addr,
+        u8                              TID,
+        TR_SELECT                       TxRxSelect,  
+        bool                            bAddNewTs
+        );
+extern void TSInitialize(struct rtllib_device *ieee);
+extern  void TsStartAddBaProcess(struct rtllib_device* ieee, PTX_TS_RECORD   pTxTS);			 			     
+extern void RemovePeerTS(struct rtllib_device* ieee, u8* Addr);
+extern void RemoveAllTS(struct rtllib_device* ieee);
+#ifdef _RTL8192_EXT_PATCH_
+extern void ResetAdmitTRStream(struct rtllib_device *ieee, u8 *Addr);
+#endif
+void rtllib_softmac_scan_syncro(struct rtllib_device *ieee, u8 is_mesh);
+
+extern const long rtllib_wlan_frequencies[];
+
+extern inline void rtllib_increment_scans(struct rtllib_device *ieee)
+{
+	ieee->scans++;
+}
+
+extern inline int rtllib_get_scans(struct rtllib_device *ieee)
+{
+	return ieee->scans;
+}
+
+static inline const char *escape_essid(const char *essid, u8 essid_len) {
+	static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
+	const char *s = essid;
+	char *d = escaped;
+
+	if (rtllib_is_empty_essid(essid, essid_len)) {
+		memcpy(escaped, "<hidden>", sizeof("<hidden>"));
+		return escaped;
+	}
+
+	essid_len = min(essid_len, (u8)IW_ESSID_MAX_SIZE);
+	while (essid_len--) {
+		if (*s == '\0') {
+			*d++ = '\\';
+			*d++ = '0';
+			s++;
+		} else {
+			*d++ = *s++;
+		}
+	}
+	*d = '\0';
+	return escaped;
+}
+
+#define CONVERT_RATE(_ieee, _MGN_RATE)	(_MGN_RATE<MGN_MCS0)?(_MGN_RATE):(HTMcsToDataRate(_ieee, (u8)_MGN_RATE))
+
+#ifdef BUILT_IN_RTLLIB
+/* fun with the built-in rtllib stack... */
+int rtllib_init(void);
+void rtllib_exit(void);
+int rtllib_crypto_init(void);
+void rtllib_crypto_deinit(void);
+int rtllib_crypto_tkip_init(void);
+void rtllib_crypto_tkip_exit(void);
+int rtllib_crypto_ccmp_init(void);
+void rtllib_crypto_ccmp_exit(void);
+int rtllib_crypto_wep_init(void);
+void rtllib_crypto_wep_exit(void);
+#endif
+/* For the function is more related to hardware setting, it's better to use the  
+ * ieee handler to refer to it.
+ */
+extern void rtllib_update_active_chan_map(struct rtllib_device *ieee);
+extern void rtllib_FlushRxTsPendingPkts(struct rtllib_device *ieee, PRX_TS_RECORD pTS);
+extern int rtllib_data_xmit(struct sk_buff *skb, struct net_device *dev);
+extern int rtllib_parse_info_param(struct rtllib_device *ieee,
+		struct rtllib_info_element *info_element, 
+		u16 length,
+		struct rtllib_network *network,
+		struct rtllib_rx_stats *stats);
+
+void rtllib_indicate_packets(struct rtllib_device *ieee, struct rtllib_rxb** prxbIndicateArray,u8  index);
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
+extern void IbssAgeFunction(struct rtllib_device *ieee);
+extern struct sta_info *GetStaInfo(struct rtllib_device *ieee, u8 *addr);
+extern void DelStaInfoList(struct rtllib_device *ieee);
+extern void DelStaInfo(struct rtllib_device *ieee, u8 *addr);
+#endif
+extern u8 HTFilterMCSRate( struct rtllib_device* ieee, u8* pSupportMCS, u8* pOperateMCS);
+extern void HTUseDefaultSetting(struct rtllib_device* ieee);
+#define RT_ASOC_RETRY_LIMIT	5
+u8 MgntQuery_TxRateExcludeCCKRates(struct rtllib_device *ieee);
+#ifdef _RTL8192_EXT_PATCH_
+extern unsigned int rtllib_MFIE_rate_len(struct rtllib_device *ieee);
+extern void rtllib_MFIE_Brate(struct rtllib_device *ieee, u8 **tag_p);
+extern void rtllib_MFIE_Grate(struct rtllib_device *ieee, u8 **tag_p);
+extern void rtllib_WMM_Info(struct rtllib_device *ieee, u8 **tag_p);
+#endif
+#ifdef THOMAS_TURBO
+extern void rtllib_TURBO_Info(struct rtllib_device *ieee, u8 **tag_p);
+#endif
+#ifndef ENABLE_LOCK_DEBUG
+#define SPIN_LOCK_IEEE(plock) spin_lock_irqsave((plock), flags)	
+#define SPIN_UNLOCK_IEEE(plock) spin_unlock_irqrestore((plock), flags)
+#define SPIN_LOCK_IEEE_REORDER(plock) spin_lock_irqsave((plock), flags)
+#define SPIN_UNLOCK_IEEE_REORDER(plock) spin_unlock_irqrestore((plock), flags)
+#define SPIN_LOCK_IEEE_WPAX(plock) spin_lock_irqsave((plock), flags)
+#define SPIN_UNLOCK_IEEE_WPAX(plock) spin_unlock_irqrestore((plock), flags)
+#define SPIN_LOCK_IEEE_MGNTTX(plock) spin_lock_irqsave((plock), flags)
+#define SPIN_UNLOCK_IEEE_MGNTTX(plock) spin_unlock_irqrestore((plock), flags)
+#define SPIN_LOCK_IEEE_BCN(plock) spin_lock_irqsave((plock), flags)
+#define SPIN_UNLOCK_IEEE_BCN(plock) spin_unlock_irqrestore((plock), flags)
+#define SPIN_LOCK_MSH_STAINFO(plock) spin_lock_irqsave((plock), flags)
+#define SPIN_UNLOCK_MSH_STAINFO(plock) spin_unlock_irqrestore((plock), flags)
+#define SPIN_LOCK_MSH_PREQ(plock) spin_lock_irqsave((plock), flags)
+#define SPIN_UNLOCK_MSH_PREQ(plock) spin_unlock_irqrestore((plock), flags)
+#define SPIN_LOCK_MSH_QUEUE(plock) spin_lock_irqsave((plock), flags)
+#define SPIN_UNLOCK_MSH_QUEUE(plock) spin_unlock_irqrestore((plock), flags)
+#define SPIN_LOCK_PRIV_RFPS(plock) spin_lock_irqsave((plock), flags)
+#define SPIN_UNLOCK_PRIV_RFPS(plock) spin_unlock_irqrestore((plock), flags)
+#define SPIN_LOCK_PRIV_IRQTH(plock) spin_lock_irqsave((plock), flags)
+#define SPIN_UNLOCK_PRIV_IRQTH(plock) spin_unlock_irqrestore((plock), flags)
+#define SPIN_LOCK_PRIV_TX(plock) spin_lock_irqsave((plock), flags)
+#define SPIN_UNLOCK_PRIV_TX(plock) spin_unlock_irqrestore((plock), flags)
+#define SPIN_LOCK_PRIV_D3(plock) spin_lock_irqsave((plock), flags)
+#define SPIN_UNLOCK_PRIV_D3(plock) spin_unlock_irqrestore((plock), flags)
+#define SPIN_LOCK_PRIV_RF(plock) spin_lock_irqsave((plock), flags)
+#define SPIN_UNLOCK_PRIV_RF(plock) spin_unlock_irqrestore((plock), flags)
+#define SPIN_LOCK_PRIV_PS(plock) spin_lock_irqsave((plock), flags)
+#define SPIN_UNLOCK_PRIV_PS(plock) spin_unlock_irqrestore((plock), flags)
+#define SEM_DOWN_IEEE_WX(psem) down(psem)
+#define SEM_UP_IEEE_WX(psem) up(psem)
+#define SEM_DOWN_IEEE_SCAN(psem) down(psem)
+#define SEM_UP_IEEE_SCAN(psem) up(psem)
+#define SEM_DOWN_IEEE_IPS(psem) down(psem)
+#define SEM_UP_IEEE_IPS(psem) up(psem)
+#define SEM_DOWN_PRIV_WX(psem) down(psem)
+#define SEM_UP_PRIV_WX(psem) up(psem)
+#define SEM_DOWN_PRIV_RF(psem) down(psem)
+#define SEM_UP_PRIV_RF(psem) up(psem)
+#define MUTEX_LOCK_PRIV(pmutex) mutex_lock(pmutex)
+#define MUTEX_UNLOCK_PRIV(pmutex) mutex_unlock(pmutex)
+#endif
+#ifdef RTL8192S_WAPI_SUPPORT
+extern void WapiInit(struct rtllib_device *ieee);
+extern void WapiExit(struct rtllib_device *ieee);
+extern int WAPI_CreateEvent_Send(struct rtllib_device *ieee, u8 EventId, u8 *MacAddr, u8 *Buff, u16 BufLen);
+extern void WapiCreateAppEventAndSend(
+	struct rtllib_device *ieee,
+	u8 		*pbuffer,
+	u16		buf_len,
+	u8 		*DestAddr,
+	u8		bUpdateBK,
+	u8		bUpdateUSK,
+	u8		bUpdateMSK,
+	u8		RcvPktType,
+	u8		bDisconnect);
+extern void WapiReturnAllStaInfo(struct rtllib_device *ieee);
+extern void WapiReturnOneStaInfo(struct rtllib_device *ieee, u8 *MacAddr, u8 from_app);
+extern void WapiFreeAllStaInfo(struct rtllib_device *ieee);
+extern u8 SecIsWAIPacket(struct rtllib_device* ieee,struct sk_buff *skb);
+extern void WapiHandleRecvPacket(struct rtllib_device* ieee,struct sk_buff *skb,u8 WaiPkt);
+extern void WapiSetIE(struct rtllib_device *ieee);
+extern u32 WapiComparePN(u8 *PN1, u8 *PN2);
+extern u8 WapiIncreasePN(u8 *PN, u8 AddCount);
+extern void WapiGetLastRxUnicastPNForQoSData(
+	u8 			UserPriority,
+	PRT_WAPI_STA_INFO    pWapiStaInfo,
+	u8 *PNOut);
+extern void WapiSetLastRxUnicastPNForQoSData(
+	u8 		UserPriority,
+	u8           *PNIn,
+	PRT_WAPI_STA_INFO    pWapiStaInfo);
+extern u8 WapiCheckPnInSwDecrypt(
+	struct rtllib_device *ieee,
+	struct sk_buff *pskb);
+extern u8 WapiCheckDropForRxReorderCase(
+	struct rtllib_device *ieee,
+	struct rtllib_rxb* prxb);
+extern int SecSMS4HeaderFillIV(struct rtllib_device *ieee, struct sk_buff *pskb);
+extern void SecSWSMS4Encryption(
+	struct rtllib_device *ieee,
+	struct sk_buff *pskb);
+extern u8 SecSWSMS4Decryption(
+	struct rtllib_device *ieee,
+	struct sk_buff *pskb,
+	struct rtllib_rx_stats *rx_stats);
+
+extern int WapiSendWaiPacket(struct rtllib_device *ieee, struct sk_buff *pskb);
+extern void ieee80211_disassociate_from_app(struct rtllib_device *ieee);
+extern void ConstructWapiIEForInit(struct rtllib_device* ieee);
+extern void wapi_test_init(struct rtllib_device *ieee);
+#endif
+static inline void dump_buf(u8 *buf, u32 len)
+{
+	u32 i;
+	printk("-----------------Len %d----------------\n", len);
+	for(i=0; i<len; i++)
+		printk("%2.2x-", *(buf+i));
+	printk("\n");
+}
+#endif /* RTLLIB_H */
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/rtllib_softmac_wx.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/rtllib_softmac_wx.c
@@ -0,0 +1,769 @@
+/* IEEE 802.11 SoftMAC layer
+ * Copyright (c) 2005 Andrea Merello <andreamrl@tiscali.it>
+ *
+ * Mostly extracted from the rtl8180-sa2400 driver for the 
+ * in-kernel generic ieee802.11 stack.
+ *
+ * Some pieces of code might be stolen from ipw2100 driver
+ * copyright of who own it's copyright ;-)
+ *
+ * PS wx handler mostly stolen from hostap, copyright who
+ * own it's copyright ;-)
+ *
+ * released under the GPL
+ */
+
+
+#include "rtllib.h"
+#ifdef ENABLE_DOT11D
+#include "dot11d.h"
+#endif
+/* FIXME: add A freqs */
+
+const long rtllib_wlan_frequencies[] = {  
+	2412, 2417, 2422, 2427, 
+	2432, 2437, 2442, 2447, 
+	2452, 2457, 2462, 2467, 
+	2472, 2484  
+};
+
+
+int rtllib_wx_set_freq(struct rtllib_device *ieee, struct iw_request_info *a,
+			     union iwreq_data *wrqu, char *b)
+{
+	int ret;
+	struct iw_freq *fwrq = & wrqu->freq;
+
+	down(&ieee->wx_sem);
+	
+	if(ieee->iw_mode == IW_MODE_INFRA){ 
+		ret = 0;
+		goto out;
+	}
+
+	/* if setting by freq convert to channel */
+	if (fwrq->e == 1) {
+		if ((fwrq->m >= (int) 2.412e8 &&
+		     fwrq->m <= (int) 2.487e8)) {
+			int f = fwrq->m / 100000;
+			int c = 0;
+			
+			while ((c < 14) && (f != rtllib_wlan_frequencies[c]))
+				c++;
+			
+			/* hack to fall through */
+			fwrq->e = 0;
+			fwrq->m = c + 1;
+		}
+	}
+	
+	if (fwrq->e > 0 || fwrq->m > 14 || fwrq->m < 1 ){ 
+		ret = -EOPNOTSUPP;
+		goto out;
+	
+	}else { /* Set the channel */
+		
+#ifdef ENABLE_DOT11D
+		if (ieee->active_channel_map[fwrq->m] != 1) {
+			ret = -EINVAL;
+			goto out;
+		}
+#endif
+		ieee->current_network.channel = fwrq->m;
+		ieee->set_chan(ieee->dev, ieee->current_network.channel);
+		
+		if(ieee->iw_mode == IW_MODE_ADHOC || ieee->iw_mode == IW_MODE_MASTER)
+			if(ieee->state == RTLLIB_LINKED){
+			
+			rtllib_stop_send_beacons(ieee);
+			rtllib_start_send_beacons(ieee);
+			}
+	}
+
+	ret = 0;
+out:
+	up(&ieee->wx_sem);
+	return ret;
+}
+
+
+#ifdef _RTL8192_EXT_PATCH_	
+int rtllib_wx_get_freq(struct rtllib_device *ieee,
+			     struct iw_request_info *a,
+			     union iwreq_data *wrqu, char *b, u8 is_mesh)
+#else
+int rtllib_wx_get_freq(struct rtllib_device *ieee,
+			     struct iw_request_info *a,
+			     union iwreq_data *wrqu, char *b)
+#endif	
+{
+	struct iw_freq *fwrq = & wrqu->freq;
+
+#ifdef _RTL8192_EXT_PATCH_	
+	if(is_mesh)
+	{
+		if (ieee->current_mesh_network.channel == 0)
+			return -1;
+		fwrq->m = rtllib_wlan_frequencies[ieee->current_mesh_network.channel-1] * 100000;
+		fwrq->e = 1;	
+	}
+	else
+#endif	
+	{
+	if (ieee->current_network.channel == 0)
+		return -1;
+	fwrq->m = rtllib_wlan_frequencies[ieee->current_network.channel-1] * 100000;
+	fwrq->e = 1;	
+	}
+	return 0;
+}
+
+int rtllib_wx_get_wap(struct rtllib_device *ieee, 
+			    struct iw_request_info *info, 
+			    union iwreq_data *wrqu, char *extra)
+{
+	unsigned long flags;	
+	
+	wrqu->ap_addr.sa_family = ARPHRD_ETHER;
+	
+	if (ieee->iw_mode == IW_MODE_MONITOR)
+		return -1;
+	
+	/* We want avoid to give to the user inconsistent infos*/
+	spin_lock_irqsave(&ieee->lock, flags);
+	
+	if (ieee->state != RTLLIB_LINKED && 
+		ieee->state != RTLLIB_LINKED_SCANNING &&
+		ieee->wap_set == 0)
+		
+		memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN);
+	else
+		memcpy(wrqu->ap_addr.sa_data, 
+		       ieee->current_network.bssid, ETH_ALEN);
+	
+	spin_unlock_irqrestore(&ieee->lock, flags);
+	
+	return 0;
+}
+
+
+int rtllib_wx_set_wap(struct rtllib_device *ieee,
+			 struct iw_request_info *info,
+			 union iwreq_data *awrq,
+			 char *extra)
+{
+	
+	int ret = 0;
+	u8 zero[] = {0,0,0,0,0,0};
+	unsigned long flags;
+	
+	short ifup = ieee->proto_started;
+	struct sockaddr *temp = (struct sockaddr *)awrq;
+
+	rtllib_stop_scan_syncro(ieee);
+
+	down(&ieee->wx_sem);
+	/* use ifconfig hw ether */
+	if (ieee->iw_mode == IW_MODE_MASTER){
+		ret = -1;
+		goto out;
+	}
+	
+	if (temp->sa_family != ARPHRD_ETHER){
+		ret = -EINVAL;
+		goto out;
+	}
+	
+        if (memcmp(temp->sa_data, zero,ETH_ALEN) == 0){
+                spin_lock_irqsave(&ieee->lock, flags);
+                memcpy(ieee->current_network.bssid, temp->sa_data, ETH_ALEN);
+                ieee->wap_set = 0;
+                spin_unlock_irqrestore(&ieee->lock, flags);
+                ret = -1;
+                goto out;
+        }
+
+	
+	if (ifup)
+		rtllib_stop_protocol(ieee,true);
+	
+	/* just to avoid to give inconsistent infos in the
+	 * get wx method. not really needed otherwise 
+	 */
+	spin_lock_irqsave(&ieee->lock, flags);
+	
+	ieee->cannot_notify = false;
+	memcpy(ieee->current_network.bssid, temp->sa_data, ETH_ALEN); 
+	ieee->wap_set = (memcmp(temp->sa_data, zero,ETH_ALEN)!=0);
+	
+	spin_unlock_irqrestore(&ieee->lock, flags);
+	
+	if (ifup)
+		rtllib_start_protocol(ieee);
+out:
+	up(&ieee->wx_sem);
+	return ret;
+}
+	
+ int rtllib_wx_get_essid(struct rtllib_device *ieee, struct iw_request_info *a,union iwreq_data *wrqu,char *b)
+{
+	int len,ret = 0;
+	unsigned long flags;
+	
+	if (ieee->iw_mode == IW_MODE_MONITOR)
+		return -1;
+	
+	/* We want avoid to give to the user inconsistent infos*/	
+	spin_lock_irqsave(&ieee->lock, flags);
+	
+	if (ieee->current_network.ssid[0] == '\0' ||
+		ieee->current_network.ssid_len == 0){ 
+		ret = -1;
+		goto out;
+	}
+	
+	if (ieee->state != RTLLIB_LINKED && 
+		ieee->state != RTLLIB_LINKED_SCANNING &&
+		ieee->ssid_set == 0){
+		ret = -1;
+		goto out;
+	}
+	len = ieee->current_network.ssid_len;
+	wrqu->essid.length = len;
+	strncpy(b,ieee->current_network.ssid,len);
+	wrqu->essid.flags = 1;
+
+out:
+	spin_unlock_irqrestore(&ieee->lock, flags);
+	
+	return ret;
+	
+}
+
+int rtllib_wx_set_rate(struct rtllib_device *ieee, 
+			     struct iw_request_info *info,
+			     union iwreq_data *wrqu, char *extra)
+{
+
+	u32 target_rate = wrqu->bitrate.value;
+	
+	ieee->rate = target_rate/100000;
+	return 0; 
+}
+
+int rtllib_wx_get_rate(struct rtllib_device *ieee, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	u32 tmp_rate = 0;
+#if defined RTL8192SU|| defined RTL8192CE
+	if (ieee->mode & (IEEE_A | IEEE_B | IEEE_G))
+		tmp_rate = ieee->rate;
+	else if (ieee->mode & IEEE_N_5G)
+		tmp_rate = 580;
+	else if (ieee->mode & IEEE_N_24G) {
+		if (ieee->GetHalfNmodeSupportByAPsHandler(ieee->dev))
+			tmp_rate = HTHalfMcsToDataRate(ieee, 15);
+		else
+			tmp_rate = HTMcsToDataRate(ieee, 15);
+	}
+#elif defined RTL8192SE
+	tmp_rate = ieee->rtl_11n_user_show_rates(ieee->dev);
+#else
+        tmp_rate = TxCountToDataRate(ieee, ieee->softmac_stats.CurrentShowTxate);
+#endif
+	wrqu->bitrate.value = tmp_rate * 500000;
+	
+	return 0;
+}
+
+
+int rtllib_wx_set_rts(struct rtllib_device *ieee, 
+			     struct iw_request_info *info,
+			     union iwreq_data *wrqu, char *extra)
+{
+	if (wrqu->rts.disabled || !wrqu->rts.fixed)
+		ieee->rts = DEFAULT_RTS_THRESHOLD;
+	else
+	{
+		if (wrqu->rts.value < MIN_RTS_THRESHOLD ||
+				wrqu->rts.value > MAX_RTS_THRESHOLD) 
+			return -EINVAL;
+		ieee->rts = wrqu->rts.value;
+	}
+	return 0;
+}
+
+int rtllib_wx_get_rts(struct rtllib_device *ieee, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	wrqu->rts.value = ieee->rts;
+	wrqu->rts.fixed = 0;	/* no auto select */
+	wrqu->rts.disabled = (wrqu->rts.value == DEFAULT_RTS_THRESHOLD);
+	return 0;
+}
+
+int rtllib_wx_set_mode(struct rtllib_device *ieee, struct iw_request_info *a,
+			     union iwreq_data *wrqu, char *b)
+{
+	int set_mode_status = 0;
+
+	rtllib_stop_scan_syncro(ieee);
+	down(&ieee->wx_sem);
+	switch (wrqu->mode) {
+	case IW_MODE_MONITOR:
+	case IW_MODE_ADHOC:
+	case IW_MODE_INFRA:
+#ifdef _RTL8192_EXT_PATCH_
+	case IW_MODE_MESH:
+#endif
+		break;
+	case IW_MODE_AUTO:
+		wrqu->mode = IW_MODE_INFRA;
+		break;
+	default:
+		set_mode_status = -EINVAL;
+		goto out;
+	}
+
+	if (wrqu->mode == ieee->iw_mode)
+		goto out;
+	
+	if (wrqu->mode == IW_MODE_MONITOR) {
+#ifdef CONFIG_RTL819x_RADIOTAP
+		ieee->dev->type = ARPHRD_IEEE80211_RADIOTAP;
+#else
+		ieee->dev->type = ARPHRD_IEEE80211;
+#endif
+		rtllib_EnableNetMonitorMode(ieee->dev,false);	
+		
+	} else {
+		ieee->dev->type = ARPHRD_ETHER;
+		if (ieee->iw_mode == IW_MODE_MONITOR)
+			rtllib_DisableNetMonitorMode(ieee->dev,false);
+	}
+	
+	if (!ieee->proto_started) {
+		ieee->iw_mode = wrqu->mode;
+	} else {
+		rtllib_stop_protocol(ieee,true);
+		ieee->iw_mode = wrqu->mode;
+#if defined (RTL8192S_WAPI_SUPPORT)
+		if(ieee->iw_mode == IW_MODE_ADHOC)
+			ieee->wapiInfo.bWapiPSK = true;
+#endif
+		rtllib_start_protocol(ieee);
+	}
+
+out:
+	up(&ieee->wx_sem);
+	return set_mode_status;
+}
+
+void rtllib_wx_sync_scan_wq(void *data)
+{
+	struct rtllib_device *ieee = container_of_work_rsl(data, struct rtllib_device, wx_sync_scan_wq);
+	short chan;
+	HT_EXTCHNL_OFFSET chan_offset=0;
+	HT_CHANNEL_WIDTH bandwidth=0;
+	int b40M = 0;
+	static int count = 0;
+
+	if (!(ieee->softmac_features & IEEE_SOFTMAC_SCAN)){	
+		rtllib_start_scan_syncro(ieee, 0);
+		goto out;
+	}
+
+	chan = ieee->current_network.channel;
+
+#ifdef ENABLE_LPS
+	if (ieee->LeisurePSLeave) {
+		ieee->LeisurePSLeave(ieee->dev);
+	}
+	/* notify AP to be in PS mode */
+	rtllib_sta_ps_send_null_frame(ieee, 1);
+	rtllib_sta_ps_send_null_frame(ieee, 1);
+#endif
+
+	rtllib_stop_all_queues(ieee);
+
+	if (ieee->data_hard_stop)
+		ieee->data_hard_stop(ieee->dev);
+	rtllib_stop_send_beacons(ieee);
+	ieee->state = RTLLIB_LINKED_SCANNING;
+	ieee->link_change(ieee->dev);
+	/* wait for ps packet to be kicked out successfully */
+	msleep(50);
+
+#if !(defined RTL8192SE ||defined RTL8192CE)	
+	ieee->InitialGainHandler(ieee->dev,IG_Backup);
+#endif
+#if defined(RTL8192SE)
+#if(RTL8192S_DISABLE_FW_DM == 0)
+	if (ieee->SetFwCmdHandler) {
+		ieee->SetFwCmdHandler(ieee->dev, FW_CMD_PAUSE_DM_BY_SCAN);
+	}
+#endif
+#endif	
+#if defined RTL8192SU || defined RTL8192CE
+	ieee->ScanOperationBackupHandler(ieee->dev,SCAN_OPT_BACKUP);
+#endif
+
+	if (ieee->pHTInfo->bCurrentHTSupport && ieee->pHTInfo->bEnableHT && ieee->pHTInfo->bCurBW40MHz) {
+		b40M = 1;
+		chan_offset = ieee->pHTInfo->CurSTAExtChnlOffset;
+		bandwidth = (HT_CHANNEL_WIDTH)ieee->pHTInfo->bCurBW40MHz;
+		printk("Scan in 40M, force to 20M first:%d, %d\n", chan_offset, bandwidth);
+		ieee->SetBWModeHandler(ieee->dev, HT_CHANNEL_WIDTH_20, HT_EXTCHNL_OFFSET_NO_EXT);
+		}
+
+	rtllib_start_scan_syncro(ieee, 0);
+
+	if (b40M) {
+		printk("Scan in 20M, back to 40M\n");
+		if (chan_offset == HT_EXTCHNL_OFFSET_UPPER)
+			ieee->set_chan(ieee->dev, chan + 2);
+		else if (chan_offset == HT_EXTCHNL_OFFSET_LOWER)
+			ieee->set_chan(ieee->dev, chan - 2);
+		else
+			ieee->set_chan(ieee->dev, chan);
+		ieee->SetBWModeHandler(ieee->dev, bandwidth, chan_offset);
+	} else {
+		ieee->set_chan(ieee->dev, chan);
+	}
+	
+#if !(defined RTL8192SE ||defined RTL8192CE)
+	ieee->InitialGainHandler(ieee->dev,IG_Restore);
+#endif
+
+#if defined(RTL8192SE)
+#if(RTL8192S_DISABLE_FW_DM == 0)
+	if (ieee->SetFwCmdHandler) {
+		ieee->SetFwCmdHandler(ieee->dev, FW_CMD_RESUME_DM_BY_SCAN);
+	}
+#endif
+#endif	
+#if defined RTL8192SU || defined RTL8192CE
+	ieee->ScanOperationBackupHandler(ieee->dev,SCAN_OPT_RESTORE);
+#endif
+	ieee->state = RTLLIB_LINKED;
+	ieee->link_change(ieee->dev);
+
+#ifdef ENABLE_LPS
+	/* Notify AP that I wake up again */
+	rtllib_sta_ps_send_null_frame(ieee, 0);
+#endif
+
+	if (ieee->LinkDetectInfo.NumRecvBcnInPeriod == 0 || 
+			ieee->LinkDetectInfo.NumRecvDataInPeriod == 0 ) {
+		ieee->LinkDetectInfo.NumRecvBcnInPeriod = 1;
+		ieee->LinkDetectInfo.NumRecvDataInPeriod= 1;	
+	}
+
+	if (ieee->data_hard_resume)
+		ieee->data_hard_resume(ieee->dev);
+	
+	if(ieee->iw_mode == IW_MODE_ADHOC || ieee->iw_mode == IW_MODE_MASTER)
+		rtllib_start_send_beacons(ieee);
+	
+	rtllib_wake_all_queues(ieee);
+
+	count = 0;	
+out:
+	up(&ieee->wx_sem);
+	
+}
+
+int rtllib_wx_set_scan(struct rtllib_device *ieee, struct iw_request_info *a,
+			     union iwreq_data *wrqu, char *b)
+{
+	int ret = 0;
+	
+	down(&ieee->wx_sem);
+	
+	if (ieee->iw_mode == IW_MODE_MONITOR || !(ieee->proto_started)){ 
+		ret = -1;
+		goto out;
+	}
+	
+	if ( ieee->state == RTLLIB_LINKED){
+		queue_work_rsl(ieee->wq, &ieee->wx_sync_scan_wq);
+		/* intentionally forget to up sem */
+		return 0;
+	}
+		
+out:
+	up(&ieee->wx_sem);
+	return ret;
+}
+
+int rtllib_wx_set_essid(struct rtllib_device *ieee, 
+			      struct iw_request_info *a,
+			      union iwreq_data *wrqu, char *extra)
+{
+	
+	int ret=0,len,i;
+	short proto_started;
+	unsigned long flags;
+	
+	rtllib_stop_scan_syncro(ieee);
+	down(&ieee->wx_sem);
+	
+	proto_started = ieee->proto_started;
+	
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
+	len = ((wrqu->essid.length-1) < IW_ESSID_MAX_SIZE) ? (wrqu->essid.length-1) : IW_ESSID_MAX_SIZE;
+#else
+	len = (wrqu->essid.length < IW_ESSID_MAX_SIZE) ? wrqu->essid.length : IW_ESSID_MAX_SIZE;
+#endif
+
+	if (len > IW_ESSID_MAX_SIZE){
+		ret= -E2BIG;
+		goto out;
+	}
+	
+	if (ieee->iw_mode == IW_MODE_MONITOR){
+		ret= -1;
+		goto out;
+	}
+	
+	for (i=0; i<len; i++){
+		if(extra[i] < 0){
+			ret= -1;
+			goto out;
+		}
+	}
+	
+	if(proto_started)
+		rtllib_stop_protocol(ieee,true);
+	
+	
+	/* this is just to be sure that the GET wx callback
+	 * has consisten infos. not needed otherwise
+	 */
+	spin_lock_irqsave(&ieee->lock, flags);
+	
+	if (wrqu->essid.flags && wrqu->essid.length) {
+		strncpy(ieee->current_network.ssid, extra, len);
+		ieee->current_network.ssid_len = len;
+#if 0
+		{
+			int i;
+			for (i=0; i<len; i++)
+				printk("%c:%d ", extra[i], extra[i]);
+			printk("\n");
+		}
+#endif
+		ieee->cannot_notify = false;
+		ieee->ssid_set = 1;
+	}
+	else{ 
+		ieee->ssid_set = 0;
+		ieee->current_network.ssid[0] = '\0';
+		ieee->current_network.ssid_len = 0;
+	}
+	spin_unlock_irqrestore(&ieee->lock, flags);
+	
+	if (proto_started)
+		rtllib_start_protocol(ieee);
+out:
+	up(&ieee->wx_sem);
+	return ret;
+}
+
+ int rtllib_wx_get_mode(struct rtllib_device *ieee, struct iw_request_info *a,
+			     union iwreq_data *wrqu, char *b)
+{
+#ifdef _RTL8192_EXT_PATCH_
+	if(ieee->iw_mode == IW_MODE_MESH) {
+		/* WEXT could not show mesh mode properly,
+		 * just disable it */
+		if(ieee->only_mesh) {
+			return -1;
+		} else {
+			wrqu->mode = IW_MODE_INFRA;
+		}
+	}
+	else
+#endif
+		wrqu->mode = ieee->iw_mode;
+	return 0;
+}
+
+ int rtllib_wx_set_rawtx(struct rtllib_device *ieee, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{
+	
+	int *parms = (int *)extra;
+	int enable = (parms[0] > 0);
+	short prev = ieee->raw_tx;
+
+	down(&ieee->wx_sem);
+	
+	if(enable) 
+		ieee->raw_tx = 1;
+	else 
+		ieee->raw_tx = 0;
+
+	printk(KERN_INFO"raw TX is %s\n", 
+	      ieee->raw_tx ? "enabled" : "disabled");
+
+	if(ieee->iw_mode == IW_MODE_MONITOR)
+	{
+		if(prev == 0 && ieee->raw_tx){
+			if (ieee->data_hard_resume)
+				ieee->data_hard_resume(ieee->dev);
+	
+			netif_carrier_on(ieee->dev);	
+		}
+		
+		if(prev && ieee->raw_tx == 1)
+			netif_carrier_off(ieee->dev); 
+	}
+	
+	up(&ieee->wx_sem);
+	
+	return 0;
+}
+ 
+int rtllib_wx_get_name(struct rtllib_device *ieee, 
+			     struct iw_request_info *info, 
+			     union iwreq_data *wrqu, char *extra)
+{
+	strcpy(wrqu->name, "802.11");
+
+	if (ieee->modulation & RTLLIB_CCK_MODULATION)
+		strcat(wrqu->name, "b");
+	if (ieee->modulation & RTLLIB_OFDM_MODULATION)
+		strcat(wrqu->name, "g");
+	if (ieee->mode & (IEEE_N_24G | IEEE_N_5G))
+		strcat(wrqu->name, "n");
+#if 0	
+	if((ieee->state == RTLLIB_LINKED) || 
+		(ieee->state == RTLLIB_LINKED_SCANNING))
+		strcat(wrqu->name," linked");
+	else if(ieee->state != RTLLIB_NOLINK)
+		strcat(wrqu->name," link..");
+#endif	
+	return 0;
+}
+
+
+/* this is mostly stolen from hostap */
+int rtllib_wx_set_power(struct rtllib_device *ieee,
+				 struct iw_request_info *info,
+				 union iwreq_data *wrqu, char *extra)
+{
+	int ret = 0;
+#if 1
+	if(
+		(!ieee->sta_wake_up) ||
+		(!ieee->enter_sleep_state) ||
+		(!ieee->ps_is_queue_empty)){
+		
+		RTLLIB_DEBUG(RTLLIB_DL_ERR,"%s(): PS mode is tryied to be use but driver missed a callback\n\n",__FUNCTION__);	
+	
+		return -1;
+	}
+#endif	
+	down(&ieee->wx_sem);
+	
+	if (wrqu->power.disabled){
+		printk("===>%s(): power disable\n",__FUNCTION__);
+		ieee->ps = RTLLIB_PS_DISABLED;
+		goto exit;
+	}
+	if (wrqu->power.flags & IW_POWER_TIMEOUT) {
+		ieee->ps_timeout = wrqu->power.value / 1000;
+		printk("===>%s():ps_timeout is %d\n",__FUNCTION__,ieee->ps_timeout);
+	}
+	
+	if (wrqu->power.flags & IW_POWER_PERIOD) {
+		
+		ieee->ps_period = wrqu->power.value / 1000;
+		
+	}
+	switch (wrqu->power.flags & IW_POWER_MODE) {
+	case IW_POWER_UNICAST_R:
+		ieee->ps = RTLLIB_PS_UNICAST;
+		break;
+	case IW_POWER_MULTICAST_R:
+		ieee->ps = RTLLIB_PS_MBCAST;
+		break;
+	case IW_POWER_ALL_R:
+		ieee->ps = RTLLIB_PS_UNICAST | RTLLIB_PS_MBCAST;	
+		break;
+		
+	case IW_POWER_ON:
+		break;
+		
+	default:
+		ret = -EINVAL;
+		goto exit;
+		
+	}
+exit:
+	up(&ieee->wx_sem);
+	return ret;
+
+}
+
+/* this is stolen from hostap */
+int rtllib_wx_get_power(struct rtllib_device *ieee,
+				 struct iw_request_info *info,
+				 union iwreq_data *wrqu, char *extra)
+{
+	int ret =0;
+	
+	down(&ieee->wx_sem);
+	
+	if(ieee->ps == RTLLIB_PS_DISABLED){	
+		wrqu->power.disabled = 1;
+		goto exit;
+	}
+
+	wrqu->power.disabled = 0;
+
+	if ((wrqu->power.flags & IW_POWER_TYPE) == IW_POWER_TIMEOUT) {
+		wrqu->power.flags = IW_POWER_TIMEOUT;
+		wrqu->power.value = ieee->ps_timeout * 1000;
+	} else {
+		wrqu->power.flags = IW_POWER_PERIOD;
+		wrqu->power.value = ieee->ps_period * 1000; 
+	}
+
+       if ((ieee->ps & (RTLLIB_PS_MBCAST | RTLLIB_PS_UNICAST)) == (RTLLIB_PS_MBCAST | RTLLIB_PS_UNICAST))
+	   	wrqu->power.flags |= IW_POWER_ALL_R;
+	else if (ieee->ps & RTLLIB_PS_MBCAST)
+		wrqu->power.flags |= IW_POWER_MULTICAST_R;
+	else
+		wrqu->power.flags |= IW_POWER_UNICAST_R;
+
+exit:
+	up(&ieee->wx_sem);
+	return ret;
+
+}
+
+#ifndef BUILT_IN_RTLLIB
+EXPORT_SYMBOL_RSL(rtllib_wx_get_essid);
+EXPORT_SYMBOL_RSL(rtllib_wx_set_essid);
+EXPORT_SYMBOL_RSL(rtllib_wx_set_rate);
+EXPORT_SYMBOL_RSL(rtllib_wx_get_rate);
+EXPORT_SYMBOL_RSL(rtllib_wx_set_wap);
+EXPORT_SYMBOL_RSL(rtllib_wx_get_wap);
+EXPORT_SYMBOL_RSL(rtllib_wx_set_mode);
+EXPORT_SYMBOL_RSL(rtllib_wx_get_mode);
+EXPORT_SYMBOL_RSL(rtllib_wx_set_scan);
+EXPORT_SYMBOL_RSL(rtllib_wx_get_freq);
+EXPORT_SYMBOL_RSL(rtllib_wx_set_freq);
+EXPORT_SYMBOL_RSL(rtllib_wx_set_rawtx);
+EXPORT_SYMBOL_RSL(rtllib_wx_get_name);
+EXPORT_SYMBOL_RSL(rtllib_wx_set_power);
+EXPORT_SYMBOL_RSL(rtllib_wx_get_power);
+EXPORT_SYMBOL_RSL(rtllib_wlan_frequencies);
+EXPORT_SYMBOL_RSL(rtllib_wx_set_rts);
+EXPORT_SYMBOL_RSL(rtllib_wx_get_rts);
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/rtl819x_BAProc.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/rtl819x_BAProc.c
@@ -0,0 +1,669 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+#include "rtllib.h"
+#include "rtl819x_BA.h"
+#ifdef RTK_DMP_PLATFORM
+#include <linux/usb_setting.h> 
+#endif
+
+void ActivateBAEntry(struct rtllib_device* ieee, PBA_RECORD pBA, u16 Time)
+{
+	pBA->bValid = true;
+	if(Time != 0)
+		mod_timer(&pBA->Timer, jiffies + MSECS(Time));
+}
+
+void DeActivateBAEntry( struct rtllib_device* ieee, PBA_RECORD pBA)
+{
+	pBA->bValid = false;
+	del_timer_sync(&pBA->Timer);
+}
+u8 TxTsDeleteBA( struct rtllib_device* ieee, PTX_TS_RECORD	pTxTs)
+{
+	PBA_RECORD		pAdmittedBa = &pTxTs->TxAdmittedBARecord;  
+	PBA_RECORD		pPendingBa = &pTxTs->TxPendingBARecord;
+	u8			bSendDELBA = false;
+
+	if(pPendingBa->bValid)
+	{
+		DeActivateBAEntry(ieee, pPendingBa);
+		bSendDELBA = true;
+	}
+
+	if(pAdmittedBa->bValid)
+	{
+		DeActivateBAEntry(ieee, pAdmittedBa);
+		bSendDELBA = true;
+	}
+
+	return bSendDELBA;
+}
+
+u8 RxTsDeleteBA( struct rtllib_device* ieee, PRX_TS_RECORD	pRxTs)
+{
+	PBA_RECORD		pBa = &pRxTs->RxAdmittedBARecord;
+	u8			bSendDELBA = false;
+
+	if(pBa->bValid)
+	{
+		DeActivateBAEntry(ieee, pBa);
+		bSendDELBA = true;
+	}
+
+	return bSendDELBA;
+}
+
+void ResetBaEntry( PBA_RECORD pBA)
+{
+	pBA->bValid			= false;
+	pBA->BaParamSet.shortData	= 0;
+	pBA->BaTimeoutValue		= 0;
+	pBA->DialogToken		= 0;
+	pBA->BaStartSeqCtrl.ShortData	= 0;
+}
+static struct sk_buff* rtllib_ADDBA(struct rtllib_device* ieee, u8* Dst, PBA_RECORD pBA, u16 StatusCode, u8 type)
+{
+	struct sk_buff *skb = NULL;
+	 struct rtllib_hdr_3addr* BAReq = NULL;
+	u8* tag = NULL;
+	u16 tmp = 0;
+	u16 len = ieee->tx_headroom + 9;
+	RTLLIB_DEBUG(RTLLIB_DL_TRACE | RTLLIB_DL_BA, "========>%s(), frame(%d) sentd to:"MAC_FMT", ieee->dev:%p\n", __FUNCTION__, type, MAC_ARG(Dst), ieee->dev);
+	if (pBA == NULL||ieee == NULL)
+	{
+		RTLLIB_DEBUG(RTLLIB_DL_ERR, "pBA(%p) is NULL or ieee(%p) is NULL\n", pBA, ieee);
+		return NULL;
+	}
+#ifdef USB_USE_ALIGNMENT
+        u32 Tmpaddr=0;
+        int alignment=0;
+        skb = dev_alloc_skb(len + sizeof( struct rtllib_hdr_3addr) + USB_512B_ALIGNMENT_SIZE); 
+#else
+	skb = dev_alloc_skb(len + sizeof( struct rtllib_hdr_3addr)); 
+#endif
+	if (skb == NULL)
+	{
+		RTLLIB_DEBUG(RTLLIB_DL_ERR, "can't alloc skb for ADDBA_REQ\n");
+		return NULL;
+	}
+
+	memset(skb->data, 0, sizeof( struct rtllib_hdr_3addr));  	
+
+#ifdef USB_USE_ALIGNMENT
+        Tmpaddr = (u32)skb->data;
+        alignment = Tmpaddr & 0x1ff;
+        skb_reserve(skb,(USB_512B_ALIGNMENT_SIZE - alignment));
+#endif
+
+	skb_reserve(skb, ieee->tx_headroom);
+
+	BAReq = ( struct rtllib_hdr_3addr *) skb_put(skb,sizeof( struct rtllib_hdr_3addr));
+
+	memcpy(BAReq->addr1, Dst, ETH_ALEN);
+	memcpy(BAReq->addr2, ieee->dev->dev_addr, ETH_ALEN);
+
+#ifdef _RTL8192_EXT_PATCH_ 
+	if((ieee->iw_mode == IW_MODE_MESH) && (ieee->only_mesh == 0) && ieee->ext_patch_rtllib_is_mesh && ieee->ext_patch_rtllib_is_mesh(ieee, Dst)){
+#ifdef COMPATIBLE_WITH_RALINK_MESH		
+		memcpy(BAReq->addr3, Dst, ETH_ALEN);
+#else
+		memcpy(BAReq->addr3, ieee->current_mesh_network.bssid, ETH_ALEN);
+#endif		
+	}
+	else
+		memcpy(BAReq->addr3, ieee->current_network.bssid, ETH_ALEN);
+#else	
+	memcpy(BAReq->addr3, ieee->current_network.bssid, ETH_ALEN);
+#endif
+	BAReq->frame_ctl = cpu_to_le16(RTLLIB_STYPE_MANAGE_ACT); 
+
+	tag = (u8*)skb_put(skb, 9);
+	*tag ++= ACT_CAT_BA;  
+	*tag ++= type;
+	*tag ++= pBA->DialogToken;
+
+	if (ACT_ADDBARSP == type)
+	{
+		printk("====>to send ADDBARSP\n");
+		tmp = cpu_to_le16(StatusCode);
+		memcpy(tag, (u8*)&tmp, 2);
+		tag += 2;	
+	}
+	tmp = cpu_to_le16(pBA->BaParamSet.shortData);
+	memcpy(tag, (u8*)&tmp, 2);
+	tag += 2;
+	tmp = cpu_to_le16(pBA->BaTimeoutValue);
+	memcpy(tag, (u8*)&tmp, 2);
+	tag += 2;
+	
+	if (ACT_ADDBAREQ == type)
+	{
+		memcpy(tag,(u8*)&(pBA->BaStartSeqCtrl), 2);
+		tag += 2;
+	}
+	
+	RTLLIB_DEBUG_DATA(RTLLIB_DL_DATA|RTLLIB_DL_BA, skb->data, skb->len);
+	return skb;
+}
+
+static struct sk_buff* rtllib_DELBA(
+	struct rtllib_device* ieee,
+	u8*		         dst,
+	PBA_RECORD		 pBA,
+	TR_SELECT		 TxRxSelect,
+	u16			 ReasonCode
+	)
+{
+	DELBA_PARAM_SET	DelbaParamSet;
+	struct sk_buff *skb = NULL;
+	 struct rtllib_hdr_3addr* Delba = NULL;
+	u8* tag = NULL;
+	u16 tmp = 0;
+	u16 len = 6 + ieee->tx_headroom;	
+
+	if (net_ratelimit())
+	RTLLIB_DEBUG(RTLLIB_DL_TRACE | RTLLIB_DL_BA, "========>%s(), ReasonCode(%d) sentd to:"MAC_FMT"\n", __FUNCTION__, ReasonCode, MAC_ARG(dst));
+
+	memset(&DelbaParamSet, 0, 2);
+
+	DelbaParamSet.field.Initiator	= (TxRxSelect==TX_DIR)?1:0;
+	DelbaParamSet.field.TID	= pBA->BaParamSet.field.TID;
+	
+#ifdef USB_USE_ALIGNMENT
+        u32 Tmpaddr=0;
+        int alignment=0;
+	skb = dev_alloc_skb(len + sizeof( struct rtllib_hdr_3addr) + USB_512B_ALIGNMENT_SIZE); 
+#else	
+	skb = dev_alloc_skb(len + sizeof( struct rtllib_hdr_3addr)); 
+#endif
+	if (skb == NULL)
+	{
+		RTLLIB_DEBUG(RTLLIB_DL_ERR, "can't alloc skb for ADDBA_REQ\n");
+		return NULL;
+	}
+
+#ifdef USB_USE_ALIGNMENT
+        Tmpaddr = (u32)skb->data;
+        alignment = Tmpaddr & 0x1ff;
+        skb_reserve(skb,(USB_512B_ALIGNMENT_SIZE - alignment));
+#endif
+	skb_reserve(skb, ieee->tx_headroom);
+	
+	Delba = ( struct rtllib_hdr_3addr *) skb_put(skb,sizeof( struct rtllib_hdr_3addr));
+
+	memcpy(Delba->addr1, dst, ETH_ALEN);
+	memcpy(Delba->addr2, ieee->dev->dev_addr, ETH_ALEN);
+#ifdef _RTL8192_EXT_PATCH_ 
+	if((ieee->iw_mode == IW_MODE_MESH) && (ieee->only_mesh == 0) && ieee->ext_patch_rtllib_is_mesh && ieee->ext_patch_rtllib_is_mesh(ieee, dst)){
+#ifdef COMPATIBLE_WITH_RALINK_MESH		
+		memcpy(Delba->addr3, dst, ETH_ALEN);
+#else
+		memcpy(Delba->addr3, ieee->current_mesh_network.bssid, ETH_ALEN);
+#endif		
+	}
+	else
+		memcpy(Delba->addr3, ieee->current_network.bssid, ETH_ALEN);
+#else	
+	memcpy(Delba->addr3, ieee->current_network.bssid, ETH_ALEN);
+#endif
+	Delba->frame_ctl = cpu_to_le16(RTLLIB_STYPE_MANAGE_ACT); 
+	
+	tag = (u8*)skb_put(skb, 6);	
+
+	*tag ++= ACT_CAT_BA;  
+	*tag ++= ACT_DELBA;
+
+	tmp = cpu_to_le16(DelbaParamSet.shortData);
+	memcpy(tag, (u8*)&tmp, 2);
+	tag += 2;
+	tmp = cpu_to_le16(ReasonCode);
+	memcpy(tag, (u8*)&tmp, 2);
+	tag += 2;
+
+	RTLLIB_DEBUG_DATA(RTLLIB_DL_DATA|RTLLIB_DL_BA, skb->data, skb->len);
+	if (net_ratelimit())
+	RTLLIB_DEBUG(RTLLIB_DL_TRACE | RTLLIB_DL_BA, "<=====%s()\n", __FUNCTION__);
+	return skb;
+}
+
+void rtllib_send_ADDBAReq(struct rtllib_device* ieee, u8*	dst, PBA_RECORD	pBA)
+{
+	struct sk_buff *skb = NULL;
+	skb = rtllib_ADDBA(ieee, dst, pBA, 0, ACT_ADDBAREQ); 
+
+	if (skb)
+	{
+		printk("====>to send ADDBAREQ!!!!!\n");
+		softmac_mgmt_xmit(skb, ieee);
+	}
+	else
+	{
+		RTLLIB_DEBUG(RTLLIB_DL_ERR, "alloc skb error in function %s()\n", __FUNCTION__);
+	}
+	return;
+}
+
+void rtllib_send_ADDBARsp(struct rtllib_device* ieee, u8* dst, PBA_RECORD pBA, u16 StatusCode) 
+{
+	struct sk_buff *skb = NULL;
+	skb = rtllib_ADDBA(ieee, dst, pBA, StatusCode, ACT_ADDBARSP); 
+	if (skb)
+	{
+		softmac_mgmt_xmit(skb, ieee);
+	}
+	else
+	{
+		RTLLIB_DEBUG(RTLLIB_DL_ERR, "alloc skb error in function %s()\n", __FUNCTION__);
+	}
+
+	return;
+
+}
+
+void rtllib_send_DELBA(struct rtllib_device* ieee, u8* dst, PBA_RECORD pBA, TR_SELECT TxRxSelect, u16 ReasonCode)
+{
+	struct sk_buff *skb = NULL;
+	skb = rtllib_DELBA(ieee, dst, pBA, TxRxSelect, ReasonCode); 
+	if (skb)
+	{
+		softmac_mgmt_xmit(skb, ieee);
+	}
+	else
+	{
+		RTLLIB_DEBUG(RTLLIB_DL_ERR, "alloc skb error in function %s()\n", __FUNCTION__);
+	}
+	return ;
+}
+
+int rtllib_rx_ADDBAReq( struct rtllib_device* ieee, struct sk_buff *skb)
+{
+	 struct rtllib_hdr_3addr* req = NULL;
+	u16 rc = 0;
+	u8 * dst = NULL, *pDialogToken = NULL, *tag = NULL;
+	PBA_RECORD pBA = NULL;
+	PBA_PARAM_SET	pBaParamSet = NULL;
+	u16* pBaTimeoutVal = NULL;
+	PSEQUENCE_CONTROL pBaStartSeqCtrl = NULL;
+	PRX_TS_RECORD	pTS = NULL;	
+
+	if (skb->len < sizeof( struct rtllib_hdr_3addr) + 9)
+	{
+		RTLLIB_DEBUG(RTLLIB_DL_ERR, " Invalid skb len in BAREQ(%d / %d)\n",(int)skb->len, 	(int)(sizeof( struct rtllib_hdr_3addr) + 9));
+		return -1;
+	}
+
+	RTLLIB_DEBUG_DATA(RTLLIB_DL_DATA|RTLLIB_DL_BA, skb->data, skb->len);
+	
+	req = ( struct rtllib_hdr_3addr*) skb->data;
+	tag = (u8*)req;
+	dst = (u8*)(&req->addr2[0]);
+	tag += sizeof( struct rtllib_hdr_3addr);
+	pDialogToken = tag + 2;  
+	pBaParamSet = (PBA_PARAM_SET)(tag + 3);   
+	pBaTimeoutVal = (u16*)(tag + 5); 
+	pBaStartSeqCtrl = (PSEQUENCE_CONTROL)(req + 7);
+	
+	printk("====>rx ADDBAREQ from :"MAC_FMT"\n", MAC_ARG(dst));	
+	if(
+#ifdef _RTL8192_EXT_PATCH_
+		(ieee->current_network.qos_data.active == 0 && ieee->current_mesh_network.qos_data.active==0) ||
+#else
+		ieee->current_network.qos_data.active == 0  ||
+#endif	
+		(ieee->pHTInfo->bCurrentHTSupport == false) ||
+		(ieee->pHTInfo->IOTAction & HT_IOT_ACT_REJECT_ADDBA_REQ)) 
+	{
+		rc = ADDBA_STATUS_REFUSED;
+		RTLLIB_DEBUG(RTLLIB_DL_ERR, "Failed to reply on ADDBA_REQ as some capability is not ready(%d, %d)\n", ieee->current_network.qos_data.active, ieee->pHTInfo->bCurrentHTSupport);
+		goto OnADDBAReq_Fail;
+	}
+	if(	!GetTs(
+			ieee, 
+			(PTS_COMMON_INFO*)(&pTS), 
+			dst, 
+			(u8)(pBaParamSet->field.TID), 
+			RX_DIR,
+			true)	)
+	{
+		rc = ADDBA_STATUS_REFUSED;
+		RTLLIB_DEBUG(RTLLIB_DL_ERR, "can't get TS in %s()\n", __FUNCTION__);
+		goto OnADDBAReq_Fail;
+	}
+	pBA = &pTS->RxAdmittedBARecord;
+
+	if(pBaParamSet->field.BAPolicy == BA_POLICY_DELAYED)
+	{
+		rc = ADDBA_STATUS_INVALID_PARAM;
+		RTLLIB_DEBUG(RTLLIB_DL_ERR, "BA Policy is not correct in %s()\n", __FUNCTION__);
+		goto OnADDBAReq_Fail;
+	}
+
+
+	rtllib_FlushRxTsPendingPkts(ieee, pTS);
+	
+	DeActivateBAEntry(ieee, pBA);	
+	pBA->DialogToken = *pDialogToken;
+	pBA->BaParamSet = *pBaParamSet;
+	pBA->BaTimeoutValue = *pBaTimeoutVal;
+	pBA->BaStartSeqCtrl = *pBaStartSeqCtrl;
+	
+	if (ieee->GetHalfNmodeSupportByAPsHandler(ieee->dev)||
+	(ieee->pHTInfo->IOTAction & HT_IOT_ACT_ALLOW_PEER_AGG_ONE_PKT))
+	pBA->BaParamSet.field.BufferSize = 1;
+	else
+	pBA->BaParamSet.field.BufferSize = 32;
+	
+	ActivateBAEntry(ieee, pBA, 0);
+	rtllib_send_ADDBARsp(ieee, dst, pBA, ADDBA_STATUS_SUCCESS);
+
+	return 0;
+	
+OnADDBAReq_Fail:
+	{
+		BA_RECORD	BA;
+		BA.BaParamSet = *pBaParamSet;
+		BA.BaTimeoutValue = *pBaTimeoutVal;
+		BA.DialogToken = *pDialogToken;
+		BA.BaParamSet.field.BAPolicy = BA_POLICY_IMMEDIATE;
+		rtllib_send_ADDBARsp(ieee, dst, &BA, rc);
+		return 0; 
+	}
+
+}
+
+int rtllib_rx_ADDBARsp( struct rtllib_device* ieee, struct sk_buff *skb)
+{
+	 struct rtllib_hdr_3addr* rsp = NULL;
+	PBA_RECORD		pPendingBA, pAdmittedBA;
+	PTX_TS_RECORD		pTS = NULL;
+	u8* dst = NULL, *pDialogToken = NULL, *tag = NULL;
+	u16* pStatusCode = NULL, *pBaTimeoutVal = NULL;
+	PBA_PARAM_SET		pBaParamSet = NULL;
+	u16			ReasonCode;
+
+	if (skb->len < sizeof( struct rtllib_hdr_3addr) + 9)
+	{
+		RTLLIB_DEBUG(RTLLIB_DL_ERR, " Invalid skb len in BARSP(%d / %d)\n", (int)skb->len, 	(int)(sizeof( struct rtllib_hdr_3addr) + 9));
+		return -1;
+	}
+	rsp = ( struct rtllib_hdr_3addr*)skb->data;
+	tag = (u8*)rsp;
+	dst = (u8*)(&rsp->addr2[0]);
+	tag += sizeof( struct rtllib_hdr_3addr);
+	pDialogToken = tag + 2;
+	pStatusCode = (u16*)(tag + 3);
+	pBaParamSet = (PBA_PARAM_SET)(tag + 5);
+	pBaTimeoutVal = (u16*)(tag + 7);
+
+	printk("====>rx ADDBARSP from :"MAC_FMT"\n", MAC_ARG(dst));	
+	if(     
+#ifdef _RTL8192_EXT_PATCH_
+		(ieee->current_network.qos_data.active == 0 && ieee->current_mesh_network.qos_data.active==0) ||
+#else
+		ieee->current_network.qos_data.active == 0  ||
+#endif	
+		ieee->pHTInfo->bCurrentHTSupport == false ||
+		ieee->pHTInfo->bCurrentAMPDUEnable == false )
+	{
+		RTLLIB_DEBUG(RTLLIB_DL_ERR, "reject to ADDBA_RSP as some capability is not ready(%d, %d, %d)\n",ieee->current_network.qos_data.active, ieee->pHTInfo->bCurrentHTSupport, ieee->pHTInfo->bCurrentAMPDUEnable);
+		ReasonCode = DELBA_REASON_UNKNOWN_BA;
+		goto OnADDBARsp_Reject;
+	}
+
+	
+	if (!GetTs(
+			ieee, 
+			(PTS_COMMON_INFO*)(&pTS), 
+			dst, 
+			(u8)(pBaParamSet->field.TID), 
+			TX_DIR,
+			false)	)
+	{
+		RTLLIB_DEBUG(RTLLIB_DL_ERR, "can't get TS in %s()\n", __FUNCTION__);
+		ReasonCode = DELBA_REASON_UNKNOWN_BA;
+		goto OnADDBARsp_Reject;
+	}
+	
+	pTS->bAddBaReqInProgress = false;
+	pPendingBA = &pTS->TxPendingBARecord;
+	pAdmittedBA = &pTS->TxAdmittedBARecord;
+
+
+	if((pAdmittedBA->bValid==true))
+	{
+		RTLLIB_DEBUG(RTLLIB_DL_BA, "OnADDBARsp(): Recv ADDBA Rsp. Drop because already admit it! \n");
+		return -1;
+	}
+	else if((pPendingBA->bValid == false) ||(*pDialogToken != pPendingBA->DialogToken))
+	{
+		RTLLIB_DEBUG(RTLLIB_DL_ERR,  "OnADDBARsp(): Recv ADDBA Rsp. BA invalid, DELBA! \n");
+		ReasonCode = DELBA_REASON_UNKNOWN_BA;
+		goto OnADDBARsp_Reject;
+	}
+	else
+	{
+		RTLLIB_DEBUG(RTLLIB_DL_BA, "OnADDBARsp(): Recv ADDBA Rsp. BA is admitted! Status code:%X\n", *pStatusCode);
+		DeActivateBAEntry(ieee, pPendingBA);
+	}
+
+
+	if(*pStatusCode == ADDBA_STATUS_SUCCESS)
+	{
+		if(pBaParamSet->field.BAPolicy == BA_POLICY_DELAYED)
+		{
+			pTS->bAddBaReqDelayed = true;
+			DeActivateBAEntry(ieee, pAdmittedBA);
+			ReasonCode = DELBA_REASON_END_BA;
+			goto OnADDBARsp_Reject;
+		}
+
+
+		pAdmittedBA->DialogToken = *pDialogToken;
+		pAdmittedBA->BaTimeoutValue = *pBaTimeoutVal;
+		pAdmittedBA->BaStartSeqCtrl = pPendingBA->BaStartSeqCtrl;
+		pAdmittedBA->BaParamSet = *pBaParamSet;
+		DeActivateBAEntry(ieee, pAdmittedBA);
+		ActivateBAEntry(ieee, pAdmittedBA, *pBaTimeoutVal);
+	} else {
+		pTS->bAddBaReqDelayed = true;
+		pTS->bDisable_AddBa = true;
+		ReasonCode = DELBA_REASON_END_BA;
+		goto OnADDBARsp_Reject;
+	}
+
+	return 0;
+
+OnADDBARsp_Reject:
+	{
+		BA_RECORD	BA;
+		BA.BaParamSet = *pBaParamSet;
+		rtllib_send_DELBA(ieee, dst, &BA, TX_DIR, ReasonCode);
+		return 0;
+	}
+	
+}
+
+int rtllib_rx_DELBA(struct rtllib_device* ieee,struct sk_buff *skb)
+{
+	 struct rtllib_hdr_3addr* delba = NULL;
+	PDELBA_PARAM_SET	pDelBaParamSet = NULL;
+	u16*			pReasonCode = NULL;
+	u8*			dst = NULL;
+
+	if (skb->len < sizeof( struct rtllib_hdr_3addr) + 6)
+	{
+		RTLLIB_DEBUG(RTLLIB_DL_ERR, " Invalid skb len in DELBA(%d / %d)\n", (int)skb->len, 	(int)(sizeof( struct rtllib_hdr_3addr) + 6));
+		return -1;
+	}
+	
+	if(
+#ifdef _RTL8192_EXT_PATCH_
+		(ieee->current_network.qos_data.active == 0 && ieee->current_mesh_network.qos_data.active==0) ||
+#else
+		ieee->current_network.qos_data.active == 0  ||
+#endif	
+		ieee->pHTInfo->bCurrentHTSupport == false )
+	{
+		RTLLIB_DEBUG(RTLLIB_DL_ERR, "received DELBA while QOS or HT is not supported(%d, %d)\n",ieee->current_network.qos_data.active, ieee->pHTInfo->bCurrentHTSupport);
+		return -1;
+	}
+	
+	RTLLIB_DEBUG_DATA(RTLLIB_DL_DATA|RTLLIB_DL_BA, skb->data, skb->len);
+	delba = ( struct rtllib_hdr_3addr*)skb->data;
+	dst = (u8*)(&delba->addr2[0]);
+	delba += sizeof( struct rtllib_hdr_3addr);
+	pDelBaParamSet = (PDELBA_PARAM_SET)(delba+2);
+	pReasonCode = (u16*)(delba+4);
+
+	if(pDelBaParamSet->field.Initiator == 1)
+	{
+		PRX_TS_RECORD 	pRxTs;
+
+		if( !GetTs(
+				ieee, 
+				(PTS_COMMON_INFO*)&pRxTs, 
+				dst, 
+				(u8)pDelBaParamSet->field.TID, 
+				RX_DIR,
+				false)	)
+		{
+			RTLLIB_DEBUG(RTLLIB_DL_ERR,  "can't get TS for RXTS in %s().dst:"MAC_FMT" TID:%d\n", __FUNCTION__, MAC_ARG(dst), (u8)pDelBaParamSet->field.TID);
+			return -1;
+		}
+		
+		RxTsDeleteBA(ieee, pRxTs);
+	}
+	else
+	{
+		PTX_TS_RECORD	pTxTs;
+
+		if(!GetTs(
+			ieee, 
+			(PTS_COMMON_INFO*)&pTxTs, 
+			dst, 
+			(u8)pDelBaParamSet->field.TID, 
+			TX_DIR,
+			false)	)
+		{
+			RTLLIB_DEBUG(RTLLIB_DL_ERR,  "can't get TS for TXTS in %s()\n", __FUNCTION__);
+			return -1;
+		}
+		
+		pTxTs->bUsingBa = false;
+		pTxTs->bAddBaReqInProgress = false;
+		pTxTs->bAddBaReqDelayed = false;
+		del_timer_sync(&pTxTs->TsAddBaTimer);
+		TxTsDeleteBA(ieee, pTxTs);
+	}
+	return 0;
+}
+
+void
+TsInitAddBA(
+	struct rtllib_device* ieee,
+	PTX_TS_RECORD	pTS,
+	u8		Policy,
+	u8		bOverwritePending
+	)
+{
+	PBA_RECORD			pBA = &pTS->TxPendingBARecord;
+
+	if(pBA->bValid==true && bOverwritePending==false)
+		return;
+
+	DeActivateBAEntry(ieee, pBA);
+	
+	pBA->DialogToken++;						
+	pBA->BaParamSet.field.AMSDU_Support = 0;	
+	pBA->BaParamSet.field.BAPolicy = Policy;	
+	pBA->BaParamSet.field.TID = pTS->TsCommonInfo.TSpec.f.TSInfo.field.ucTSID;	
+	pBA->BaParamSet.field.BufferSize = 32;		
+	pBA->BaTimeoutValue = 0;					
+	pBA->BaStartSeqCtrl.field.SeqNum = (pTS->TxCurSeq + 3) % 4096; 	
+
+	ActivateBAEntry(ieee, pBA, BA_SETUP_TIMEOUT);
+
+	rtllib_send_ADDBAReq(ieee, pTS->TsCommonInfo.Addr, pBA);
+}
+
+void
+TsInitDelBA( struct rtllib_device* ieee, PTS_COMMON_INFO pTsCommonInfo, TR_SELECT TxRxSelect)
+{
+
+	if(TxRxSelect == TX_DIR)
+	{
+		PTX_TS_RECORD	pTxTs = (PTX_TS_RECORD)pTsCommonInfo;
+
+		if(TxTsDeleteBA(ieee, pTxTs))
+			rtllib_send_DELBA(
+				ieee, 
+				pTsCommonInfo->Addr, 
+				(pTxTs->TxAdmittedBARecord.bValid)?(&pTxTs->TxAdmittedBARecord):(&pTxTs->TxPendingBARecord), 
+				TxRxSelect, 
+				DELBA_REASON_END_BA);
+	}
+	else if(TxRxSelect == RX_DIR)
+	{
+		PRX_TS_RECORD	pRxTs = (PRX_TS_RECORD)pTsCommonInfo;
+		if(RxTsDeleteBA(ieee, pRxTs))
+			rtllib_send_DELBA(
+				ieee, 
+				pTsCommonInfo->Addr, 
+				&pRxTs->RxAdmittedBARecord, 
+				TxRxSelect, 
+				DELBA_REASON_END_BA	);
+	}
+}
+void BaSetupTimeOut(unsigned long data)
+{
+	PTX_TS_RECORD	pTxTs = (PTX_TS_RECORD)data;
+
+	pTxTs->bAddBaReqInProgress = false;
+	pTxTs->bAddBaReqDelayed = true;
+	pTxTs->TxPendingBARecord.bValid = false;
+}
+
+void TxBaInactTimeout(unsigned long data)
+{
+	PTX_TS_RECORD	pTxTs = (PTX_TS_RECORD)data;
+	struct rtllib_device *ieee = container_of(pTxTs, struct rtllib_device, TxTsRecord[pTxTs->num]);
+	TxTsDeleteBA(ieee, pTxTs);
+	rtllib_send_DELBA(
+		ieee, 
+		pTxTs->TsCommonInfo.Addr, 
+		&pTxTs->TxAdmittedBARecord,
+		TX_DIR, 
+		DELBA_REASON_TIMEOUT);
+}
+
+void RxBaInactTimeout(unsigned long data)
+{
+	PRX_TS_RECORD	pRxTs = (PRX_TS_RECORD)data;
+	struct rtllib_device *ieee = container_of(pRxTs, struct rtllib_device, RxTsRecord[pRxTs->num]);
+	
+	RxTsDeleteBA(ieee, pRxTs);
+	rtllib_send_DELBA(
+		ieee, 
+		pRxTs->TsCommonInfo.Addr, 
+		&pRxTs->RxAdmittedBARecord,
+		RX_DIR, 
+		DELBA_REASON_TIMEOUT);
+	return ;
+}
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/rtllib_crypt_wep.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/rtllib_crypt_wep.c
@@ -0,0 +1,404 @@
+/*
+ * Host AP crypt: host-based WEP encryption implementation for Host AP driver
+ *
+ * Copyright (c) 2002-2004, Jouni Malinen <jkmaline@cc.hut.fi>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation. See README and COPYING for
+ * more details.
+ */
+
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/random.h>
+#include <linux/skbuff.h>
+#include <asm/string.h>
+#ifdef _RTL8192_EXT_PATCH_	
+#include <linux/etherdevice.h>
+#endif
+#include "rtllib.h"
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,20))
+#endif
+
+
+#if defined(BUILT_IN_CRYPTO) || (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
+#include "rtl_crypto.h"
+#else
+#include <linux/crypto.h>
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) 
+    #include <asm/scatterlist.h>
+#else
+    #include <linux/scatterlist.h>
+#endif
+#include <linux/crc32.h>
+/*
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
+#include "rtl_crypto.h"
+#else
+#include <linux/crypto.h>
+#endif
+
+#include <asm/scatterlist.h>
+#include <linux/crc32.h>
+*/
+#ifndef BUILT_IN_RTLLIB
+MODULE_AUTHOR("Jouni Malinen");
+MODULE_DESCRIPTION("Host AP crypt: WEP");
+MODULE_LICENSE("GPL");
+#endif
+struct prism2_wep_data {
+	u32 iv;
+#define WEP_KEY_LEN 13
+	u8 key[WEP_KEY_LEN + 1];
+	u8 key_len;
+	u8 key_idx;
+	#if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
+	struct crypto_tfm *tfm;
+	#else
+        struct crypto_blkcipher *tx_tfm;
+        struct crypto_blkcipher *rx_tfm;
+        #endif
+};
+
+
+static void * prism2_wep_init(int keyidx)
+{
+	struct prism2_wep_data *priv;
+
+	priv = kmalloc(sizeof(*priv), GFP_ATOMIC);
+	if (priv == NULL)
+		goto fail;
+	memset(priv, 0, sizeof(*priv));
+	priv->key_idx = keyidx;
+
+	#if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
+	priv->tfm = crypto_alloc_tfm("arc4", 0);
+	if (priv->tfm == NULL) {
+		printk(KERN_DEBUG "rtllib_crypt_wep: could not allocate "
+		       "crypto API arc4\n");
+		goto fail;
+	}
+	#else
+	priv->tx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC);
+        if (IS_ERR(priv->tx_tfm)) {
+                printk(KERN_DEBUG "rtllib_crypt_wep: could not allocate "
+                       "crypto API arc4\n");
+                priv->tx_tfm = NULL;
+                goto fail;
+        }
+        priv->rx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC);
+        if (IS_ERR(priv->rx_tfm)) {
+                printk(KERN_DEBUG "rtllib_crypt_wep: could not allocate "
+                       "crypto API arc4\n");
+                priv->rx_tfm = NULL;
+                goto fail;
+        }
+        #endif
+
+	/* start WEP IV from a random value */
+	get_random_bytes(&priv->iv, 4);
+
+	return priv;
+
+fail:
+	#if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
+	if (priv) {
+		if (priv->tfm)
+			crypto_free_tfm(priv->tfm);
+		kfree(priv);
+	}
+	#else
+	if (priv) {
+                if (priv->tx_tfm)
+                        crypto_free_blkcipher(priv->tx_tfm);
+                if (priv->rx_tfm)
+                        crypto_free_blkcipher(priv->rx_tfm);
+                kfree(priv);
+        }
+        #endif
+	return NULL;
+}
+
+
+static void prism2_wep_deinit(void *priv)
+{
+	struct prism2_wep_data *_priv = priv;
+	#if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
+	if (_priv && _priv->tfm)
+		crypto_free_tfm(_priv->tfm);
+	#else
+	if (_priv) {
+                if (_priv->tx_tfm)
+                        crypto_free_blkcipher(_priv->tx_tfm);
+                if (_priv->rx_tfm)
+                        crypto_free_blkcipher(_priv->rx_tfm);
+        }
+        #endif
+	kfree(priv);
+}
+
+/* Perform WEP encryption on given skb that has at least 4 bytes of headroom
+ * for IV and 4 bytes of tailroom for ICV. Both IV and ICV will be transmitted,
+ * so the payload length increases with 8 bytes.
+ *
+ * WEP frame payload: IV + TX key idx, RC4(data), ICV = RC4(CRC32(data))
+ */
+static int prism2_wep_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
+{
+	struct prism2_wep_data *wep = priv;
+	u32 klen, len;
+	u8 key[WEP_KEY_LEN + 3];
+	u8 *pos;
+	cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
+	#if ( !defined(BUILT_IN_CRYPTO) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21)) || (OPENSUSE_SLED)) )
+	struct blkcipher_desc desc = {.tfm = wep->tx_tfm};
+	#endif
+	u32 crc;
+	u8 *icv;
+#ifdef _RTL8192_EXT_PATCH_	
+	u8 broadcastaddr[6] = {0xff,0xff,0xff,0xff,0xff,0xff};
+	struct rtllib_hdr_3addr* tmp_header = (struct rtllib_hdr_3addr*)(skb->data);
+	u8 is_broadcast_data = 0;
+	u8 is_multicast_data = 0;
+#endif
+	struct scatterlist sg;
+	if (skb_headroom(skb) < 4 || skb_tailroom(skb) < 4 ||
+	    skb->len < hdr_len){
+		printk("Error!!!headroom=%d tailroom=%d skblen=%d hdr_len=%d\n",skb_headroom(skb),skb_tailroom(skb),skb->len,hdr_len);
+		return -1;
+	}
+#ifdef _RTL8192_EXT_PATCH_	
+	if(tcb_desc->badhoc==0){
+		if(memcmp(tmp_header->addr1,broadcastaddr,6) == 0){
+			is_broadcast_data = 1;
+			tcb_desc->bHwSec = 0;
+		}
+		if(is_multicast_ether_addr(tmp_header->addr1)){
+			is_multicast_data = 1;
+			tcb_desc->bHwSec = 0;
+		}
+	}
+#endif
+	len = skb->len - hdr_len;
+	pos = skb_push(skb, 4);
+	memmove(pos, pos + 4, hdr_len);
+	pos += hdr_len;
+
+	klen = 3 + wep->key_len;
+
+	wep->iv++;
+
+	/* Fluhrer, Mantin, and Shamir have reported weaknesses in the key
+	 * scheduling algorithm of RC4. At least IVs (KeyByte + 3, 0xff, N)
+	 * can be used to speedup attacks, so avoid using them. */
+	if ((wep->iv & 0xff00) == 0xff00) {
+		u8 B = (wep->iv >> 16) & 0xff;
+		if (B >= 3 && B < klen)
+			wep->iv += 0x0100;
+	}
+
+	/* Prepend 24-bit IV to RC4 key and TX frame */
+	*pos++ = key[0] = (wep->iv >> 16) & 0xff;
+	*pos++ = key[1] = (wep->iv >> 8) & 0xff;
+	*pos++ = key[2] = wep->iv & 0xff;
+	*pos++ = wep->key_idx << 6;
+
+	/* Copy rest of the WEP key (the secret part) */
+	memcpy(key + 3, wep->key, wep->key_len);
+
+	if (!tcb_desc->bHwSec)
+	{
+	
+		/* Append little-endian CRC32 and encrypt it to produce ICV */
+	#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
+		crc = ~crc32_le(~0, pos, len);
+	#else
+		crc = ~ether_crc_le(len, pos);
+	#endif
+		icv = skb_put(skb, 4);
+		icv[0] = crc;
+		icv[1] = crc >> 8;
+		icv[2] = crc >> 16;
+		icv[3] = crc >> 24;
+		
+	#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
+		sg.page = virt_to_page(pos);
+		sg.offset = offset_in_page(pos);
+		sg.length = len + 4;
+	#else
+		sg_init_one(&sg, pos, len+4);
+	#endif
+	#if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
+		crypto_cipher_setkey(wep->tfm, key, klen);
+		crypto_cipher_encrypt(wep->tfm, &sg, &sg, len + 4);
+		return 0;
+	#else
+		crypto_blkcipher_setkey(wep->tx_tfm, key, klen);
+		return crypto_blkcipher_encrypt(&desc, &sg, &sg, len + 4);
+	#endif
+	}
+
+	return 0;
+}
+
+
+/* Perform WEP decryption on given buffer. Buffer includes whole WEP part of
+ * the frame: IV (4 bytes), encrypted payload (including SNAP header),
+ * ICV (4 bytes). len includes both IV and ICV.
+ *
+ * Returns 0 if frame was decrypted successfully and ICV was correct and -1 on
+ * failure. If frame is OK, IV and ICV will be removed.
+ */
+static int prism2_wep_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
+{
+	struct prism2_wep_data *wep = priv;
+	u32  klen, plen;
+	u8 key[WEP_KEY_LEN + 3];
+	u8 keyidx, *pos;
+	cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
+	#if ( !defined(BUILT_IN_CRYPTO) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21)) || (OPENSUSE_SLED)) )
+	struct blkcipher_desc desc = {.tfm = wep->rx_tfm};
+	#endif
+	u32 crc;
+	u8 icv[4];
+	struct scatterlist sg;
+	if (skb->len < hdr_len + 8)
+		return -1;
+
+	pos = skb->data + hdr_len;
+	key[0] = *pos++;
+	key[1] = *pos++;
+	key[2] = *pos++;
+	keyidx = *pos++ >> 6;
+	if (keyidx != wep->key_idx)
+		return -1;
+
+	klen = 3 + wep->key_len;
+
+	/* Copy rest of the WEP key (the secret part) */
+	memcpy(key + 3, wep->key, wep->key_len);
+
+	/* Apply RC4 to data and compute CRC32 over decrypted data */
+	plen = skb->len - hdr_len - 8;
+
+	if (!tcb_desc->bHwSec)
+	{
+	#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
+		sg.page = virt_to_page(pos);
+		sg.offset = offset_in_page(pos);
+		sg.length = plen + 4;
+	#else
+		sg_init_one(&sg, pos, plen+4);
+	#endif
+	#if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
+		crypto_cipher_setkey(wep->tfm, key, klen);
+		crypto_cipher_decrypt(wep->tfm, &sg, &sg, plen + 4);
+	#else
+		crypto_blkcipher_setkey(wep->rx_tfm, key, klen);
+		if (crypto_blkcipher_decrypt(&desc, &sg, &sg, plen + 4))
+			return -7;
+	#endif
+	#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
+		crc = ~crc32_le(~0, pos, plen);
+	#else
+		crc = ~ether_crc_le(plen, pos);
+	#endif
+		icv[0] = crc;
+		icv[1] = crc >> 8;
+		icv[2] = crc >> 16;
+		icv[3] = crc >> 24;
+		if (memcmp(icv, pos + plen, 4) != 0) {
+			/* ICV mismatch - drop frame */
+			return -2;
+		}
+	}
+	/* Remove IV and ICV */
+	memmove(skb->data + 4, skb->data, hdr_len);
+	skb_pull(skb, 4);
+	skb_trim(skb, skb->len - 4);
+
+	return 0;
+}
+
+
+static int prism2_wep_set_key(void *key, int len, u8 *seq, void *priv)
+{
+	struct prism2_wep_data *wep = priv;
+
+	if (len < 0 || len > WEP_KEY_LEN)
+		return -1;
+
+	memcpy(wep->key, key, len);
+	wep->key_len = len;
+
+	return 0;
+}
+
+
+static int prism2_wep_get_key(void *key, int len, u8 *seq, void *priv)
+{
+	struct prism2_wep_data *wep = priv;
+
+	if (len < wep->key_len)
+		return -1;
+
+	memcpy(key, wep->key, wep->key_len);
+
+	return wep->key_len;
+}
+
+
+static char * prism2_wep_print_stats(char *p, void *priv)
+{
+	struct prism2_wep_data *wep = priv;
+	p += sprintf(p, "key[%d] alg=WEP len=%d\n",
+		     wep->key_idx, wep->key_len);
+	return p;
+}
+
+
+static struct rtllib_crypto_ops rtllib_crypt_wep = {
+	.name			= "WEP",
+	.init			= prism2_wep_init,
+	.deinit			= prism2_wep_deinit,
+	.encrypt_mpdu		= prism2_wep_encrypt,
+	.decrypt_mpdu		= prism2_wep_decrypt,
+	.encrypt_msdu		= NULL,
+	.decrypt_msdu		= NULL,
+	.set_key		= prism2_wep_set_key,
+	.get_key		= prism2_wep_get_key,
+	.print_stats		= prism2_wep_print_stats,
+	.extra_prefix_len	= 4, /* IV */
+	.extra_postfix_len	= 4, /* ICV */
+	.owner			= THIS_MODULE,
+};
+
+
+int __init rtllib_crypto_wep_init(void)
+{
+	return rtllib_register_crypto_ops(&rtllib_crypt_wep);
+}
+
+
+void __exit rtllib_crypto_wep_exit(void)
+{
+	rtllib_unregister_crypto_ops(&rtllib_crypt_wep);
+}
+
+void rtllib_wep_null(void)
+{
+        return;
+}
+
+#ifndef BUILT_IN_RTLLIB
+EXPORT_SYMBOL_RSL(rtllib_wep_null);
+
+module_init(rtllib_crypto_wep_init);
+module_exit(rtllib_crypto_wep_exit);
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/rtl819x_TSProc.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/rtl819x_TSProc.c
@@ -0,0 +1,672 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+#include "rtllib.h"
+#include <linux/etherdevice.h>
+#include "rtl819x_TS.h"
+extern void _setup_timer( struct timer_list*, void*, unsigned long);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
+#define list_for_each_entry_safe(pos, n, head, member) \
+	for (pos = list_entry((head)->next, typeof(*pos), member), \
+		n = list_entry(pos->member.next, typeof(*pos), member); \
+		&pos->member != (head); \
+		pos = n, n = list_entry(n->member.next, typeof(*n), member))
+#endif
+void TsSetupTimeOut(unsigned long data)
+{
+}
+
+void TsInactTimeout(unsigned long data)
+{
+}
+
+void RxPktPendingTimeout(unsigned long data)
+{
+	PRX_TS_RECORD	pRxTs = (PRX_TS_RECORD)data;
+	struct rtllib_device *ieee = container_of(pRxTs, struct rtllib_device, RxTsRecord[pRxTs->num]);
+	
+	PRX_REORDER_ENTRY 	pReorderEntry = NULL;
+
+	unsigned long flags = 0;
+	struct rtllib_rxb *stats_IndicateArray[REORDER_WIN_SIZE];
+	u8 index = 0;
+	bool bPktInBuf = false;
+
+	spin_lock_irqsave(&(ieee->reorder_spinlock), flags);
+	if(pRxTs->RxTimeoutIndicateSeq != 0xffff)
+	{
+		while(!list_empty(&pRxTs->RxPendingPktList))
+		{
+			pReorderEntry = (PRX_REORDER_ENTRY)list_entry(pRxTs->RxPendingPktList.prev,RX_REORDER_ENTRY,List);
+			if(index == 0)
+				pRxTs->RxIndicateSeq = pReorderEntry->SeqNum;
+
+			if( SN_LESS(pReorderEntry->SeqNum, pRxTs->RxIndicateSeq) || 
+				SN_EQUAL(pReorderEntry->SeqNum, pRxTs->RxIndicateSeq)	)
+			{
+				list_del_init(&pReorderEntry->List);
+			
+				if(SN_EQUAL(pReorderEntry->SeqNum, pRxTs->RxIndicateSeq))
+					pRxTs->RxIndicateSeq = (pRxTs->RxIndicateSeq + 1) % 4096;
+
+				RTLLIB_DEBUG(RTLLIB_DL_REORDER,"%s(): Indicate SeqNum: %d\n",__func__, pReorderEntry->SeqNum);
+				stats_IndicateArray[index] = pReorderEntry->prxb;
+				index++;
+				
+				list_add_tail(&pReorderEntry->List, &ieee->RxReorder_Unused_List);
+			}
+			else
+			{
+				bPktInBuf = true;
+				break;
+			}
+		}
+	}
+
+	if(index>0){
+		pRxTs->RxTimeoutIndicateSeq = 0xffff;
+	
+		if(index > REORDER_WIN_SIZE){
+			RTLLIB_DEBUG(RTLLIB_DL_ERR, "RxReorderIndicatePacket(): Rx Reorer buffer full!! \n");
+			spin_unlock_irqrestore(&(ieee->reorder_spinlock), flags);
+			return;
+		}
+		rtllib_indicate_packets(ieee, stats_IndicateArray, index);
+		bPktInBuf = false;
+	}
+
+	if(bPktInBuf && (pRxTs->RxTimeoutIndicateSeq==0xffff)){
+		pRxTs->RxTimeoutIndicateSeq = pRxTs->RxIndicateSeq;
+		mod_timer(&pRxTs->RxPktPendingTimer,  jiffies + MSECS(ieee->pHTInfo->RxReorderPendingTime));
+	}
+	spin_unlock_irqrestore(&(ieee->reorder_spinlock), flags);
+}
+
+void TsAddBaProcess(unsigned long data)
+{
+	PTX_TS_RECORD	pTxTs = (PTX_TS_RECORD)data;
+	u8 num = pTxTs->num;
+	struct rtllib_device *ieee = container_of(pTxTs, struct rtllib_device, TxTsRecord[num]);
+
+	TsInitAddBA(ieee, pTxTs, BA_POLICY_IMMEDIATE, false);
+	RTLLIB_DEBUG(RTLLIB_DL_BA, "TsAddBaProcess(): ADDBA Req is started!! \n");
+}
+
+
+void ResetTsCommonInfo(PTS_COMMON_INFO	pTsCommonInfo)
+{
+	memset(pTsCommonInfo->Addr, 0, 6);
+	memset(&pTsCommonInfo->TSpec, 0, sizeof(TSPEC_BODY));
+	memset(&pTsCommonInfo->TClass, 0, sizeof(QOS_TCLAS)*TCLAS_NUM);
+	pTsCommonInfo->TClasProc = 0;
+	pTsCommonInfo->TClasNum = 0;
+}
+
+void ResetTxTsEntry(PTX_TS_RECORD pTS)
+{
+	ResetTsCommonInfo(&pTS->TsCommonInfo);
+	pTS->TxCurSeq = 0;
+	pTS->bAddBaReqInProgress = false;
+	pTS->bAddBaReqDelayed = false;
+	pTS->bUsingBa = false;
+	pTS->bDisable_AddBa = false;
+	ResetBaEntry(&pTS->TxAdmittedBARecord); 
+	ResetBaEntry(&pTS->TxPendingBARecord);
+}
+
+void ResetRxTsEntry(PRX_TS_RECORD pTS)
+{
+	ResetTsCommonInfo(&pTS->TsCommonInfo);
+	pTS->RxIndicateSeq = 0xffff; 
+	pTS->RxTimeoutIndicateSeq = 0xffff; 
+	ResetBaEntry(&pTS->RxAdmittedBARecord);	  
+}
+#ifdef _RTL8192_EXT_PATCH_
+void ResetAdmitTRStream(struct rtllib_device *ieee, u8 *Addr)
+{
+	u8 	dir;
+	bool				search_dir[4] = {0, 0, 0, 0};
+	struct list_head*		psearch_list; 
+	PTS_COMMON_INFO	pRet = NULL;
+	PRX_TS_RECORD pRxTS = NULL;
+	PTX_TS_RECORD pTxTS = NULL;
+
+	if(ieee->iw_mode != IW_MODE_MESH) 
+		return;
+
+	search_dir[DIR_DOWN] 	= true;
+	psearch_list = &ieee->Rx_TS_Admit_List;
+	for(dir = 0; dir <= DIR_BI_DIR; dir++)
+	{
+		if(search_dir[dir] ==false )
+			continue;
+		list_for_each_entry(pRet, psearch_list, List){
+			if ((memcmp(pRet->Addr, Addr, 6) == 0) && (pRet->TSpec.f.TSInfo.field.ucDirection == dir))
+			{
+				pRxTS = (PRX_TS_RECORD)pRet;
+				pRxTS->RxIndicateSeq = 0xffff;
+				pRxTS->RxTimeoutIndicateSeq = 0xffff;
+			}
+					
+		}	
+	}
+	search_dir[DIR_UP] 	= true;
+	psearch_list = &ieee->Tx_TS_Admit_List;
+	for(dir = 0; dir <= DIR_BI_DIR; dir++)
+	{
+		if(search_dir[dir] ==false )
+			continue;
+		list_for_each_entry(pRet, psearch_list, List){
+			if ((memcmp(pRet->Addr, Addr, 6) == 0) && (pRet->TSpec.f.TSInfo.field.ucDirection == dir))
+			{
+				pTxTS = (PTX_TS_RECORD)pRet;
+				pTxTS->TxCurSeq = 0xffff;
+			}
+					
+		}	
+	}
+
+	return;
+}
+#endif
+
+void TSInitialize(struct rtllib_device *ieee)
+{
+	PTX_TS_RECORD		pTxTS  = ieee->TxTsRecord;
+	PRX_TS_RECORD		pRxTS  = ieee->RxTsRecord;
+	PRX_REORDER_ENTRY	pRxReorderEntry = ieee->RxReorderEntry;
+	u8				count = 0;
+	RTLLIB_DEBUG(RTLLIB_DL_TS, "==========>%s()\n", __FUNCTION__);
+	INIT_LIST_HEAD(&ieee->Tx_TS_Admit_List);
+	INIT_LIST_HEAD(&ieee->Tx_TS_Pending_List);
+	INIT_LIST_HEAD(&ieee->Tx_TS_Unused_List);
+
+	for(count = 0; count < TOTAL_TS_NUM; count++)
+	{
+		pTxTS->num = count;
+		_setup_timer(&pTxTS->TsCommonInfo.SetupTimer,
+			    TsSetupTimeOut,
+			    (unsigned long) pTxTS);
+
+		_setup_timer(&pTxTS->TsCommonInfo.InactTimer,
+			    TsInactTimeout,
+			    (unsigned long) pTxTS);
+
+		_setup_timer(&pTxTS->TsAddBaTimer,
+			    TsAddBaProcess,
+			    (unsigned long) pTxTS);
+		
+		_setup_timer(&pTxTS->TxPendingBARecord.Timer,
+			    BaSetupTimeOut, 
+			    (unsigned long) pTxTS);
+		_setup_timer(&pTxTS->TxAdmittedBARecord.Timer,
+			    TxBaInactTimeout,
+			    (unsigned long) pTxTS);
+		
+		ResetTxTsEntry(pTxTS);
+		list_add_tail(&pTxTS->TsCommonInfo.List, 
+				&ieee->Tx_TS_Unused_List); 
+		pTxTS++;
+	}
+
+	INIT_LIST_HEAD(&ieee->Rx_TS_Admit_List);
+	INIT_LIST_HEAD(&ieee->Rx_TS_Pending_List);
+	INIT_LIST_HEAD(&ieee->Rx_TS_Unused_List);
+	for(count = 0; count < TOTAL_TS_NUM; count++)
+	{
+		pRxTS->num = count;
+		INIT_LIST_HEAD(&pRxTS->RxPendingPktList);
+		
+		_setup_timer(&pRxTS->TsCommonInfo.SetupTimer,
+			    TsSetupTimeOut,
+			    (unsigned long) pRxTS);
+	
+		_setup_timer(&pRxTS->TsCommonInfo.InactTimer,
+			    TsInactTimeout,
+			    (unsigned long) pRxTS);
+
+		_setup_timer(&pRxTS->RxAdmittedBARecord.Timer,
+			    RxBaInactTimeout,
+			    (unsigned long) pRxTS);
+		
+		_setup_timer(&pRxTS->RxPktPendingTimer,
+			    RxPktPendingTimeout,
+			    (unsigned long) pRxTS);
+		
+		ResetRxTsEntry(pRxTS);
+		list_add_tail(&pRxTS->TsCommonInfo.List, &ieee->Rx_TS_Unused_List);
+		pRxTS++;
+	}
+	INIT_LIST_HEAD(&ieee->RxReorder_Unused_List);
+	for(count = 0; count < REORDER_ENTRY_NUM; count++)
+	{
+		list_add_tail( &pRxReorderEntry->List,&ieee->RxReorder_Unused_List);
+		if(count == (REORDER_ENTRY_NUM-1))
+			break;
+		pRxReorderEntry = &ieee->RxReorderEntry[count+1];
+	}
+
+}
+
+void AdmitTS(struct rtllib_device *ieee, PTS_COMMON_INFO pTsCommonInfo, u32 InactTime)
+{
+	del_timer_sync(&pTsCommonInfo->SetupTimer);
+	del_timer_sync(&pTsCommonInfo->InactTimer);
+
+	if(InactTime!=0)
+		mod_timer(&pTsCommonInfo->InactTimer, jiffies + MSECS(InactTime));
+}
+
+
+PTS_COMMON_INFO SearchAdmitTRStream(struct rtllib_device *ieee, u8*	Addr, u8 TID, TR_SELECT	TxRxSelect)
+{
+	u8 	dir;
+	bool				search_dir[4] = {0, 0, 0, 0};
+	struct list_head*		psearch_list; 
+	PTS_COMMON_INFO	pRet = NULL;
+	if(ieee->iw_mode == IW_MODE_MASTER) 
+	{
+		if(TxRxSelect == TX_DIR)
+		{
+			search_dir[DIR_DOWN] = true;
+			search_dir[DIR_BI_DIR]= true;
+		}
+		else
+		{
+			search_dir[DIR_UP] 	= true;
+			search_dir[DIR_BI_DIR]= true;
+		}
+	}
+	else if(ieee->iw_mode == IW_MODE_ADHOC)
+	{
+		if(TxRxSelect == TX_DIR)
+			search_dir[DIR_UP] 	= true;
+		else
+			search_dir[DIR_DOWN] = true;
+	}
+	else
+	{
+		if(TxRxSelect == TX_DIR)
+		{
+			search_dir[DIR_UP] 	= true;
+			search_dir[DIR_BI_DIR]= true;
+			search_dir[DIR_DIRECT]= true;
+		}
+		else
+		{
+			search_dir[DIR_DOWN] = true;
+			search_dir[DIR_BI_DIR]= true;
+			search_dir[DIR_DIRECT]= true;
+		}
+	}
+
+	if(TxRxSelect == TX_DIR)
+		psearch_list = &ieee->Tx_TS_Admit_List;
+	else
+		psearch_list = &ieee->Rx_TS_Admit_List;
+	
+	for(dir = 0; dir <= DIR_BI_DIR; dir++)
+	{
+		if(search_dir[dir] ==false )
+			continue;
+		list_for_each_entry(pRet, psearch_list, List){
+			if (memcmp(pRet->Addr, Addr, 6) == 0)
+				if (pRet->TSpec.f.TSInfo.field.ucTSID == TID)
+					if(pRet->TSpec.f.TSInfo.field.ucDirection == dir)
+					{
+						break;
+					}
+					
+		}	
+		if(&pRet->List  != psearch_list)
+			break;
+	}
+
+	if(&pRet->List  != psearch_list){
+		return pRet ;
+	}
+	else 
+		return NULL;
+}
+
+void MakeTSEntry(
+		PTS_COMMON_INFO	pTsCommonInfo,
+		u8*		Addr,
+		PTSPEC_BODY	pTSPEC,
+		PQOS_TCLAS	pTCLAS,
+		u8		TCLAS_Num,
+		u8		TCLAS_Proc
+	)
+{
+	u8	count;
+
+	if(pTsCommonInfo == NULL)
+		return;
+	
+	memcpy(pTsCommonInfo->Addr, Addr, 6);
+
+	if(pTSPEC != NULL)
+		memcpy((u8*)(&(pTsCommonInfo->TSpec)), (u8*)pTSPEC, sizeof(TSPEC_BODY));
+
+	for(count = 0; count < TCLAS_Num; count++)
+		memcpy((u8*)(&(pTsCommonInfo->TClass[count])), (u8*)pTCLAS, sizeof(QOS_TCLAS));
+
+	pTsCommonInfo->TClasProc = TCLAS_Proc;
+	pTsCommonInfo->TClasNum = TCLAS_Num;
+}
+
+#ifdef _RTL8192_EXT_PATCH_
+void dump_ts_list(struct list_head * ts_list)
+{
+	PTS_COMMON_INFO	pRet = NULL;
+	u8 i=0;
+	list_for_each_entry(pRet, ts_list, List){
+		printk("i=%d ADD:"MAC_FMT", TID:%d, dir:%d\n",i,MAC_ARG(pRet->Addr), pRet->TSpec.f.TSInfo.field.ucTSID, pRet->TSpec.f.TSInfo.field.ucDirection);
+		i++;
+ 	}
+	
+}
+#endif
+
+bool GetTs(
+	struct rtllib_device*	ieee,
+	PTS_COMMON_INFO			*ppTS,
+	u8*				Addr,
+	u8				TID,
+	TR_SELECT			TxRxSelect,  
+	bool				bAddNewTs
+	)
+{
+	u8	UP = 0;
+	if(is_broadcast_ether_addr(Addr) || is_multicast_ether_addr(Addr))
+	{
+		RTLLIB_DEBUG(RTLLIB_DL_ERR, "ERR! get TS for Broadcast or Multicast\n");
+		return false;
+	}
+#if 0
+	if(ieee->pStaQos->CurrentQosMode == QOS_DISABLE)
+	{	UP = 0; } 
+	else if(ieee->pStaQos->CurrentQosMode & QOS_WMM)
+	{
+#else
+	if (ieee->current_network.qos_data.supported == 0)
+		UP = 0;
+	else
+	{
+#endif
+		if (!IsACValid(TID))
+		{
+			RTLLIB_DEBUG(RTLLIB_DL_ERR, "ERR! in %s(), TID(%d) is not valid\n", __FUNCTION__, TID);
+			return false;
+		}
+
+		switch(TID)
+		{
+		case 0:
+		case 3:
+			UP = 0;
+			break;
+
+		case 1:
+		case 2:
+			UP = 2;
+			break;
+			
+		case 4:
+		case 5:
+			UP = 5;
+			break;
+			
+		case 6:
+		case 7:
+			UP = 7;
+			break;
+		}
+	}
+
+	*ppTS = SearchAdmitTRStream(
+			ieee, 
+			Addr,
+			UP, 
+			TxRxSelect);
+	if(*ppTS != NULL)
+	{
+		return true;
+	}
+	else
+	{
+		if(bAddNewTs == false)
+		{
+			RTLLIB_DEBUG(RTLLIB_DL_TS, "add new TS failed(tid:%d)\n", UP);
+			return false;
+		}
+		else
+		{
+			TSPEC_BODY	TSpec;
+			PQOS_TSINFO		pTSInfo = &TSpec.f.TSInfo;
+			struct list_head*	pUnusedList = 
+								(TxRxSelect == TX_DIR)?
+								(&ieee->Tx_TS_Unused_List):
+								(&ieee->Rx_TS_Unused_List);
+								
+			struct list_head*	pAddmitList = 
+								(TxRxSelect == TX_DIR)?
+								(&ieee->Tx_TS_Admit_List):
+								(&ieee->Rx_TS_Admit_List);
+
+			DIRECTION_VALUE		Dir =		(ieee->iw_mode == IW_MODE_MASTER)? 
+								((TxRxSelect==TX_DIR)?DIR_DOWN:DIR_UP):
+								((TxRxSelect==TX_DIR)?DIR_UP:DIR_DOWN);
+			RTLLIB_DEBUG(RTLLIB_DL_TS, "to add Ts\n");
+			if(!list_empty(pUnusedList))
+			{
+				(*ppTS) = list_entry(pUnusedList->next, TS_COMMON_INFO, List);
+				list_del_init(&(*ppTS)->List);	
+				if(TxRxSelect==TX_DIR)
+				{
+					PTX_TS_RECORD tmp = container_of(*ppTS, TX_TS_RECORD, TsCommonInfo);
+					ResetTxTsEntry(tmp);
+				}
+				else{
+					PRX_TS_RECORD tmp = container_of(*ppTS, RX_TS_RECORD, TsCommonInfo);	
+					ResetRxTsEntry(tmp);
+				}
+				
+				RTLLIB_DEBUG(RTLLIB_DL_TS, "to init current TS, UP:%d, Dir:%d, addr:"MAC_FMT"\n", UP, Dir, MAC_ARG(Addr));
+				pTSInfo->field.ucTrafficType = 0;			
+				pTSInfo->field.ucTSID = UP;			
+				pTSInfo->field.ucDirection = Dir;			
+				pTSInfo->field.ucAccessPolicy = 1;		
+				pTSInfo->field.ucAggregation = 0; 		
+				pTSInfo->field.ucPSB = 0; 				
+				pTSInfo->field.ucUP = UP;				
+				pTSInfo->field.ucTSInfoAckPolicy = 0;		
+				pTSInfo->field.ucSchedule = 0;			
+					
+				MakeTSEntry(*ppTS, Addr, &TSpec, NULL, 0, 0);
+				AdmitTS(ieee, *ppTS, 0);
+				list_add_tail(&((*ppTS)->List), pAddmitList);
+
+				return true;
+			}
+			else
+			{
+				RTLLIB_DEBUG(RTLLIB_DL_ERR, "ERR!!in function %s() There is not enough dir=%d(0=up down=1) TS record to be used!!", __FUNCTION__,Dir);
+				return false;
+			}		
+		}		
+	}
+}
+
+void RemoveTsEntry(
+	struct rtllib_device*	ieee,
+	PTS_COMMON_INFO			pTs,
+	TR_SELECT			TxRxSelect
+	)
+{
+	unsigned long flags = 0;
+	del_timer_sync(&pTs->SetupTimer);
+	del_timer_sync(&pTs->InactTimer);
+	TsInitDelBA(ieee, pTs, TxRxSelect);
+
+	if(TxRxSelect == RX_DIR)
+	{
+		PRX_REORDER_ENTRY	pRxReorderEntry;
+		PRX_TS_RECORD 		pRxTS = (PRX_TS_RECORD)pTs;
+		spin_lock_irqsave(&(ieee->reorder_spinlock), flags);
+
+		if(timer_pending(&pRxTS->RxPktPendingTimer))	
+			del_timer_sync(&pRxTS->RxPktPendingTimer);
+
+		while(!list_empty(&pRxTS->RxPendingPktList)){
+			pRxReorderEntry = (PRX_REORDER_ENTRY)list_entry(pRxTS->RxPendingPktList.prev,RX_REORDER_ENTRY,List);
+			RTLLIB_DEBUG(RTLLIB_DL_REORDER,"%s(): Delete SeqNum %d!\n",__FUNCTION__, pRxReorderEntry->SeqNum);
+			list_del_init(&pRxReorderEntry->List);
+			{
+				int i = 0;
+				struct rtllib_rxb * prxb = pRxReorderEntry->prxb;
+				if (unlikely(!prxb)){
+					spin_unlock_irqrestore(&(ieee->reorder_spinlock), flags);
+					return;
+				}
+				for(i =0; i < prxb->nr_subframes; i++) {
+					dev_kfree_skb(prxb->subframes[i]);
+				}
+				kfree(prxb);
+				prxb = NULL;
+			}
+			list_add_tail(&pRxReorderEntry->List,&ieee->RxReorder_Unused_List);
+		}
+		spin_unlock_irqrestore(&(ieee->reorder_spinlock), flags);
+	}
+	else{
+		PTX_TS_RECORD pTxTS = (PTX_TS_RECORD)pTs;
+		del_timer_sync(&pTxTS->TsAddBaTimer);
+	}
+}
+
+void RemovePeerTS(struct rtllib_device* ieee, u8* Addr)
+{
+	PTS_COMMON_INFO	pTS, pTmpTS;
+	printk("===========>RemovePeerTS,"MAC_FMT"\n", MAC_ARG(Addr));
+#if 1
+	list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Pending_List, List)
+	{
+		if (memcmp(pTS->Addr, Addr, 6) == 0)
+		{
+			RemoveTsEntry(ieee, pTS, TX_DIR);
+			list_del_init(&pTS->List);
+			list_add_tail(&pTS->List, &ieee->Tx_TS_Unused_List);
+		}
+	}
+	
+	list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Admit_List, List)
+	{
+		if (memcmp(pTS->Addr, Addr, 6) == 0)
+		{
+			printk("====>remove Tx_TS_admin_list\n");
+			RemoveTsEntry(ieee, pTS, TX_DIR);
+			list_del_init(&pTS->List);
+			list_add_tail(&pTS->List, &ieee->Tx_TS_Unused_List);
+		}
+	}
+	
+	list_for_each_entry_safe(pTS, pTmpTS, &ieee->Rx_TS_Pending_List, List)
+	{
+		if (memcmp(pTS->Addr, Addr, 6) == 0)
+		{
+			RemoveTsEntry(ieee, pTS, RX_DIR);
+			list_del_init(&pTS->List);
+			list_add_tail(&pTS->List, &ieee->Rx_TS_Unused_List);
+		}
+	}
+
+	list_for_each_entry_safe(pTS, pTmpTS, &ieee->Rx_TS_Admit_List, List)
+	{
+		if (memcmp(pTS->Addr, Addr, 6) == 0)
+		{
+			RemoveTsEntry(ieee, pTS, RX_DIR);
+			list_del_init(&pTS->List);
+			list_add_tail(&pTS->List, &ieee->Rx_TS_Unused_List);
+		}
+	}
+#endif
+}
+
+void RemoveAllTS(struct rtllib_device* ieee)
+{
+	PTS_COMMON_INFO pTS, pTmpTS;
+#if 1	
+	list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Pending_List, List)
+	{
+		RemoveTsEntry(ieee, pTS, TX_DIR);
+		list_del_init(&pTS->List);
+		list_add_tail(&pTS->List, &ieee->Tx_TS_Unused_List);	
+	}
+
+	list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Admit_List, List)
+	{
+		RemoveTsEntry(ieee, pTS, TX_DIR);
+		list_del_init(&pTS->List);
+		list_add_tail(&pTS->List, &ieee->Tx_TS_Unused_List);
+	}
+	
+	list_for_each_entry_safe(pTS, pTmpTS, &ieee->Rx_TS_Pending_List, List)
+	{
+		RemoveTsEntry(ieee, pTS, RX_DIR);
+		list_del_init(&pTS->List);
+		list_add_tail(&pTS->List, &ieee->Rx_TS_Unused_List);
+	}
+
+	list_for_each_entry_safe(pTS, pTmpTS, &ieee->Rx_TS_Admit_List, List)
+	{
+		RemoveTsEntry(ieee, pTS, RX_DIR);
+		list_del_init(&pTS->List);
+		list_add_tail(&pTS->List, &ieee->Rx_TS_Unused_List);
+	}
+#endif
+}
+
+void TsStartAddBaProcess(struct rtllib_device* ieee, PTX_TS_RECORD	pTxTS)
+{
+	if(pTxTS->bAddBaReqInProgress == false)
+	{
+		pTxTS->bAddBaReqInProgress = true;
+#if 1
+		if(pTxTS->bAddBaReqDelayed)
+		{
+			RTLLIB_DEBUG(RTLLIB_DL_BA, "TsStartAddBaProcess(): Delayed Start ADDBA after 60 sec!!\n");
+			mod_timer(&pTxTS->TsAddBaTimer, jiffies + MSECS(TS_ADDBA_DELAY));
+		}
+		else
+		{
+			RTLLIB_DEBUG(RTLLIB_DL_BA,"TsStartAddBaProcess(): Immediately Start ADDBA now!!\n");
+			mod_timer(&pTxTS->TsAddBaTimer, jiffies+10); 
+		}
+#endif
+	}
+	else
+		RTLLIB_DEBUG(RTLLIB_DL_ERR, "%s()==>BA timer is already added\n", __FUNCTION__);
+}
+
+#ifndef BUILT_IN_RTLLIB
+EXPORT_SYMBOL_RSL(RemovePeerTS);
+#ifdef _RTL8192_EXT_PATCH_
+EXPORT_SYMBOL_RSL(ResetAdmitTRStream);
+#endif
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/proc.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/proc.c
@@ -0,0 +1,115 @@
+/*
+ * Scatterlist Cryptographic API.
+ *
+ * Procfs information.
+ *
+ * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option) 
+ * any later version.
+ *
+ */
+#include <linux/init.h>
+#include "rtl_crypto.h"
+#include <linux/rwsem.h>
+#include <linux/proc_fs.h>
+#include <linux/seq_file.h>
+#include "internal.h"
+
+extern struct list_head crypto_alg_list;
+extern struct rw_semaphore crypto_alg_sem;
+
+static void *c_start(struct seq_file *m, loff_t *pos)
+{
+	struct list_head *v;
+	loff_t n = *pos;
+
+	down_read(&crypto_alg_sem);
+	list_for_each(v, &crypto_alg_list)
+		if (!n--)
+			return list_entry(v, struct crypto_alg, cra_list);
+	return NULL;
+}
+
+static void *c_next(struct seq_file *m, void *p, loff_t *pos)
+{
+	struct list_head *v = p;
+	
+	(*pos)++;
+	v = v->next;
+	return (v == &crypto_alg_list) ?
+		NULL : list_entry(v, struct crypto_alg, cra_list);
+}
+
+static void c_stop(struct seq_file *m, void *p)
+{
+	up_read(&crypto_alg_sem);
+}
+
+static int c_show(struct seq_file *m, void *p)
+{
+	struct crypto_alg *alg = (struct crypto_alg *)p;
+	
+	seq_printf(m, "name         : %s\n", alg->cra_name);
+	seq_printf(m, "module       : %s\n",
+		   (alg->cra_module ?
+		    alg->cra_module->name :
+		    "kernel"));
+	
+	switch (alg->cra_flags & CRYPTO_ALG_TYPE_MASK) {
+	case CRYPTO_ALG_TYPE_CIPHER:
+		seq_printf(m, "type         : cipher\n");
+		seq_printf(m, "blocksize    : %u\n", alg->cra_blocksize);
+		seq_printf(m, "min keysize  : %u\n",
+					alg->cra_cipher.cia_min_keysize);
+		seq_printf(m, "max keysize  : %u\n",
+					alg->cra_cipher.cia_max_keysize);
+		break;
+		
+	case CRYPTO_ALG_TYPE_DIGEST:
+		seq_printf(m, "type         : digest\n");
+		seq_printf(m, "blocksize    : %u\n", alg->cra_blocksize);
+		seq_printf(m, "digestsize   : %u\n",
+		           alg->cra_digest.dia_digestsize);
+		break;
+	case CRYPTO_ALG_TYPE_COMPRESS:
+		seq_printf(m, "type         : compression\n");
+		break;
+	default:
+		seq_printf(m, "type         : unknown\n");
+		break;
+	}
+
+	seq_putc(m, '\n');
+	return 0;
+}
+
+static struct seq_operations crypto_seq_ops = {
+	.start		= c_start,
+	.next		= c_next,
+	.stop		= c_stop,
+	.show		= c_show
+};
+
+static int crypto_info_open(struct inode *inode, struct file *file)
+{
+	return seq_open(file, &crypto_seq_ops);
+}
+        
+static struct file_operations proc_crypto_ops = {
+	.open		= crypto_info_open,
+	.read		= seq_read,
+	.llseek		= seq_lseek,
+	.release	= seq_release
+};
+
+void __init crypto_init_proc(void)
+{
+	struct proc_dir_entry *proc;
+	
+	proc = create_proc_entry("crypto", 0, NULL);
+	if (proc)
+		proc->proc_fops = &proc_crypto_ops;
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/digest.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/digest.c
@@ -0,0 +1,120 @@
+/*
+ * Cryptographic API.
+ *
+ * Digest operations.
+ *
+ * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option) 
+ * any later version.
+ *
+ */
+#include <linux/version.h>
+#include "rtl_crypto.h"
+#include <linux/mm.h>
+#include <linux/errno.h>
+#include <linux/highmem.h>
+#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
+#include <asm/scatterlist.h>
+#else
+#include <linux/scatterlist.h>
+#endif
+#include "internal.h"
+
+static void init(struct crypto_tfm *tfm)
+{
+	tfm->__crt_alg->cra_digest.dia_init(crypto_tfm_ctx(tfm));
+}
+
+static void update(struct crypto_tfm *tfm,
+                   struct scatterlist *sg, unsigned int nsg)
+{
+	unsigned int i;
+
+	for (i = 0; i < nsg; i++) {
+
+	#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
+		struct page *pg = sg[i].page;
+	#else
+		struct page *pg = sg_page(&sg[i]);
+	#endif
+		unsigned int offset = sg[i].offset;
+		unsigned int l = sg[i].length;
+
+		do {
+			unsigned int bytes_from_page = min(l, ((unsigned int)
+							   (PAGE_SIZE)) - 
+							   offset);
+			char *p = crypto_kmap(pg, 0) + offset;
+
+			tfm->__crt_alg->cra_digest.dia_update
+					(crypto_tfm_ctx(tfm), p,
+					 bytes_from_page);
+			crypto_kunmap(p, 0);
+			crypto_yield(tfm);
+			offset = 0;
+			pg++;
+			l -= bytes_from_page;
+		} while (l > 0);
+	}
+}
+
+static void final(struct crypto_tfm *tfm, u8 *out)
+{
+	tfm->__crt_alg->cra_digest.dia_final(crypto_tfm_ctx(tfm), out);
+}
+
+static int setkey(struct crypto_tfm *tfm, const u8 *key, unsigned int keylen)
+{
+	u32 flags;
+	if (tfm->__crt_alg->cra_digest.dia_setkey == NULL)
+		return -ENOSYS;
+	return tfm->__crt_alg->cra_digest.dia_setkey(crypto_tfm_ctx(tfm),
+						     key, keylen, &flags);
+}
+
+static void digest(struct crypto_tfm *tfm,
+                   struct scatterlist *sg, unsigned int nsg, u8 *out)
+{
+	unsigned int i;
+
+	tfm->crt_digest.dit_init(tfm);
+		
+	for (i = 0; i < nsg; i++) {
+	#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
+		char *p = crypto_kmap(sg[i].page, 0) + sg[i].offset;
+	#else
+		char *p = crypto_kmap(sg_page(&sg[i]), 0) + sg[i].offset;
+	#endif
+		tfm->__crt_alg->cra_digest.dia_update(crypto_tfm_ctx(tfm),
+		                                      p, sg[i].length);
+		crypto_kunmap(p, 0);
+		crypto_yield(tfm);
+	}
+	crypto_digest_final(tfm, out);
+}
+
+int crypto_init_digest_flags(struct crypto_tfm *tfm, u32 flags)
+{
+	return flags ? -EINVAL : 0;
+}
+
+int crypto_init_digest_ops(struct crypto_tfm *tfm)
+{
+	struct digest_tfm *ops = &tfm->crt_digest;
+	
+	ops->dit_init	= init;
+	ops->dit_update	= update;
+	ops->dit_final	= final;
+	ops->dit_digest	= digest;
+	ops->dit_setkey	= setkey;
+	
+	return crypto_alloc_hmac_block(tfm);
+}
+
+void crypto_exit_digest_ops(struct crypto_tfm *tfm)
+{
+	crypto_free_hmac_block(tfm);
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/rtl819x_BA.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/rtl819x_BA.h
@@ -0,0 +1,79 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+#ifndef _BATYPE_H_
+#define _BATYPE_H_
+
+#define 	TOTAL_TXBA_NUM	16
+#define	TOTAL_RXBA_NUM	16
+
+#define	BA_SETUP_TIMEOUT	200
+#define	BA_INACT_TIMEOUT	60000
+
+#define	BA_POLICY_DELAYED		0
+#define	BA_POLICY_IMMEDIATE	1
+
+#define	ADDBA_STATUS_SUCCESS			0
+#define	ADDBA_STATUS_REFUSED		37
+#define	ADDBA_STATUS_INVALID_PARAM	38
+
+#define	DELBA_REASON_QSTA_LEAVING	36
+#define	DELBA_REASON_END_BA			37
+#define	DELBA_REASON_UNKNOWN_BA	38
+#define	DELBA_REASON_TIMEOUT			39
+typedef union _SEQUENCE_CONTROL{
+	u16 ShortData;
+	struct
+	{
+		u16	FragNum:4;
+		u16	SeqNum:12;
+	}field;
+}SEQUENCE_CONTROL, *PSEQUENCE_CONTROL;
+
+typedef union _BA_PARAM_SET {
+	u8 charData[2];
+	u16 shortData;
+	struct {
+		u16 AMSDU_Support:1;
+		u16 BAPolicy:1;
+		u16 TID:4;
+		u16 BufferSize:10;
+	} field;
+} BA_PARAM_SET, *PBA_PARAM_SET;
+
+typedef union _DELBA_PARAM_SET {
+	u8 charData[2];
+	u16 shortData;
+	struct {
+		u16 Reserved:11;
+		u16 Initiator:1;
+		u16 TID:4;
+	} field;
+} DELBA_PARAM_SET, *PDELBA_PARAM_SET;
+
+typedef struct _BA_RECORD {
+	struct timer_list		Timer;
+	u8				bValid;
+	u8				DialogToken;
+	BA_PARAM_SET		BaParamSet;
+	u16				BaTimeoutValue;
+	SEQUENCE_CONTROL	BaStartSeqCtrl;
+} BA_RECORD, *PBA_RECORD;
+
+#endif 
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/autoload.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/autoload.c
@@ -0,0 +1,41 @@
+/*
+ * Cryptographic API.
+ *
+ * Algorithm autoloader.
+ *
+ * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option) 
+ * any later version.
+ *
+ */
+#include "kmap_types.h"
+
+#include <linux/kernel.h>
+#include "rtl_crypto.h"
+#include <linux/string.h>
+#include <linux/kmod.h>
+#include "internal.h"
+
+#ifdef CONFIG_KMOD
+/*
+ * A far more intelligent version of this is planned.  For now, just
+ * try an exact match on the name of the algorithm.
+ */
+void crypto_alg_autoload(const char *name)
+{
+	request_module(name);
+}
+
+struct crypto_alg *crypto_alg_mod_lookup(const char *name)
+{
+	struct crypto_alg *alg = crypto_alg_lookup(name);
+	if (alg == NULL) {
+		crypto_alg_autoload(name);
+		alg = crypto_alg_lookup(name);
+	}
+	return alg;
+}
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/rtl819x_Qos.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/rtl819x_Qos.h
@@ -0,0 +1,619 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+#ifndef __INC_QOS_TYPE_H
+#define __INC_QOS_TYPE_H
+
+#define BIT0                    0x00000001
+#define BIT1                    0x00000002
+#define BIT2                    0x00000004
+#define BIT3                    0x00000008
+#define BIT4                    0x00000010
+#define BIT5                    0x00000020
+#define BIT6                    0x00000040
+#define BIT7                    0x00000080
+#define BIT8                    0x00000100
+#define BIT9                    0x00000200
+#define BIT10                   0x00000400
+#define BIT11                   0x00000800
+#define BIT12                   0x00001000
+#define BIT13                   0x00002000
+#define BIT14                   0x00004000
+#define BIT15                   0x00008000
+#define BIT16                   0x00010000
+#define BIT17                   0x00020000
+#define BIT18                   0x00040000
+#define BIT19                   0x00080000
+#define BIT20                   0x00100000
+#define BIT21                   0x00200000
+#define BIT22                   0x00400000
+#define BIT23                   0x00800000
+#define BIT24                   0x01000000
+#define BIT25                   0x02000000
+#define BIT26                   0x04000000
+#define BIT27                   0x08000000
+#define BIT28                   0x10000000
+#define BIT29                   0x20000000
+#define BIT30                   0x40000000
+#define BIT31                   0x80000000
+
+#define	MAX_WMMELE_LENGTH	64
+
+typedef u32 QOS_MODE, *PQOS_MODE;
+#define QOS_DISABLE		0
+#define QOS_WMM			1
+#define QOS_WMMSA		2
+#define QOS_EDCA		4
+#define QOS_HCCA		8
+#define QOS_WMM_UAPSD		16   
+
+#define AC_PARAM_SIZE	4
+#define WMM_PARAM_ELE_BODY_LEN	18
+
+typedef	enum _ACK_POLICY{
+	eAckPlc0_ACK		= 0x00,
+	eAckPlc1_NoACK		= 0x01,
+}ACK_POLICY,*PACK_POLICY;
+
+#define WMM_PARAM_ELEMENT_SIZE	(8+(4*AC_PARAM_SIZE))
+#if 0
+#define GET_QOS_CTRL(_pStart)	ReadEF2Byte((u8 *)(_pStart) + 24)
+#define SET_QOS_CTRL(_pStart, _value)	WriteEF2Byte((u8 *)(_pStart) + 24, _value)
+
+#define GET_QOS_CTRL_WMM_UP(_pStart)	((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 0, 3))
+#define SET_QOS_CTRL_WMM_UP(_pStart, _value)	SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 0, 3, (u8)(_value))
+
+#define GET_QOS_CTRL_WMM_EOSP(_pStart)	((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 4, 1))
+#define SET_QOS_CTRL_WMM_EOSP(_pStart, _value)	SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 4, 1, (u8)(_value))
+
+#define GET_QOS_CTRL_WMM_ACK_POLICY(_pStart)	((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 5, 2))
+#define SET_QOS_CTRL_WMM_ACK_POLICY(_pStart, _value)	SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 5, 2, (u8)(_value))
+
+#define GET_QOS_CTRL_STA_DATA_TID(_pStart)	((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 0, 4))
+#define SET_QOS_CTRL_STA_DATA_TID(_pStart, _value)	SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 0, 4, (u8)(_value))
+
+#define GET_QOS_CTRL_STA_DATA_QSIZE_FLAG(_pStart)	((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 4, 1))
+#define SET_QOS_CTRL_STA_DATA_QSIZE_FLAG(_pStart, _value)	SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 4, 1, (u8)(_value))
+
+#define GET_QOS_CTRL_STA_DATA_ACK_POLICY(_pStart)	((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 5, 2))
+#define SET_QOS_CTRL_STA_DATA_ACK_POLICY(_pStart, _value)	SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 5, 2, (u8)(_value))
+
+#define GET_QOS_CTRL_STA_DATA_TXOP(_pStart)	((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 8, 8))
+#define SET_QOS_CTRL_STA_DATA_TXOP(_pStart, _value)	SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 8, 8, (u8)(_value))
+
+#define GET_QOS_CTRL_STA_DATA_QSIZE(_pStart)	GET_QOS_CTRL_STA_DATA_TXOP(_pStart)
+#define SET_QOS_CTRL_STA_DATA_QSIZE(_pStart, _value)	SET_QOS_CTRL_STA_DATA_TXOP(_pStart)
+
+#define GET_QOS_CTRL_HC_DATA_TID(_pStart)	((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 0, 4))
+#define SET_QOS_CTRL_HC_DATA_TID(_pStart, _value)	SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 0, 4, (u8)(_value))
+
+#define GET_QOS_CTRL_HC_DATA_EOSP(_pStart)	((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 4, 1))
+#define SET_QOS_CTRL_HC_DATA_EOSP(_pStart, _value)	SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 4, 1, (u8)(_value))
+
+#define GET_QOS_CTRL_HC_DATA_ACK_POLICY(_pStart)	((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 5, 2))
+#define SET_QOS_CTRL_HC_DATA_ACK_POLICY(_pStart, _value)	SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 5, 2, (u8)(_value))
+
+#define GET_QOS_CTRL_HC_DATA_PS_BUFSTATE(_pStart)	((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 8, 8))
+#define SET_QOS_CTRL_HC_DATA_PS_BUFSTATE(_pStart, _value)	SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 8, 8, (u8)(_value))
+
+#define GET_QOS_CTRL_HC_CFP_TID(_pStart)	((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 0, 4))
+#define SET_QOS_CTRL_HC_CFP_TID(_pStart, _value)	SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 0, 4, (u8)(_value))
+
+#define GET_QOS_CTRL_HC_CFP_EOSP(_pStart)	((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 4, 1))
+#define SET_QOS_CTRL_HC_CFP_EOSP(_pStart, _value)	SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 4, 1, (u8)(_value))
+
+#define GET_QOS_CTRL_HC_CFP_ACK_POLICY(_pStart)	((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 5, 2))
+#define SET_QOS_CTRL_HC_CFP_ACK_POLICY(_pStart, _value)	SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 5, 2, (u8)(_value))
+
+#define GET_QOS_CTRL_HC_CFP_TXOP_LIMIT(_pStart)	((u8)LE_BITS_TO_2BYTE((u8 *)(_pStart)+24, 8, 8))
+#define SET_QOS_CTRL_HC_CFP_TXOP_LIMIT(_pStart, _value)	SET_BITS_TO_LE_2BYTE((u8 *)(_pStart)+24, 8, 8, (u8)(_value))
+
+#define SET_WMM_QOS_INFO_FIELD(_pStart, _val)	WriteEF1Byte(_pStart, _val)
+
+#define GET_WMM_QOS_INFO_FIELD_PARAMETERSET_COUNT(_pStart)	LE_BITS_TO_1BYTE(_pStart, 0, 4)
+#define SET_WMM_QOS_INFO_FIELD_PARAMETERSET_COUNT(_pStart, _val)	SET_BITS_TO_LE_1BYTE(_pStart, 0, 4, _val)
+
+#define GET_WMM_QOS_INFO_FIELD_AP_UAPSD(_pStart)	LE_BITS_TO_1BYTE(_pStart, 7, 1)
+#define SET_WMM_QOS_INFO_FIELD_AP_UAPSD(_pStart, _val)	SET_BITS_TO_LE_1BYTE(_pStart, 7, 1, _val)
+
+#define GET_WMM_QOS_INFO_FIELD_STA_AC_VO_UAPSD(_pStart)	LE_BITS_TO_1BYTE(_pStart, 0, 1)
+#define SET_WMM_QOS_INFO_FIELD_STA_AC_VO_UAPSD(_pStart, _val)	SET_BITS_TO_LE_1BYTE(_pStart, 0, 1, _val)
+
+#define GET_WMM_QOS_INFO_FIELD_STA_AC_VI_UAPSD(_pStart)	LE_BITS_TO_1BYTE(_pStart, 1, 1)
+#define SET_WMM_QOS_INFO_FIELD_STA_AC_VI_UAPSD(_pStart, _val)	SET_BITS_TO_LE_1BYTE(_pStart, 1, 1, _val)
+
+#define GET_WMM_QOS_INFO_FIELD_STA_AC_BE_UAPSD(_pStart)	LE_BITS_TO_1BYTE(_pStart, 2, 1)
+#define SET_WMM_QOS_INFO_FIELD_STA_AC_BE_UAPSD(_pStart, _val)	SET_BITS_TO_LE_1BYTE(_pStart, 2, 1, _val)
+	
+#define GET_WMM_QOS_INFO_FIELD_STA_AC_BK_UAPSD(_pStart)	LE_BITS_TO_1BYTE(_pStart, 3, 1)
+#define SET_WMM_QOS_INFO_FIELD_STA_AC_BK_UAPSD(_pStart, _val)	SET_BITS_TO_LE_1BYTE(_pStart, 3, 1, _val)
+
+#define GET_WMM_QOS_INFO_FIELD_STA_MAX_SP_LEN(_pStart)	LE_BITS_TO_1BYTE(_pStart, 5, 2)
+#define SET_WMM_QOS_INFO_FIELD_STA_MAX_SP_LEN(_pStart, _val)	SET_BITS_TO_LE_1BYTE(_pStart, 5, 2, _val)
+		
+
+#define WMM_INFO_ELEMENT_SIZE	7
+
+#define GET_WMM_INFO_ELE_OUI(_pStart)	((u8 *)(_pStart))
+#define SET_WMM_INFO_ELE_OUI(_pStart, _pVal)	PlatformMoveMemory(_pStart, _pVal, 3);
+
+#define GET_WMM_INFO_ELE_OUI_TYPE(_pStart)	( EF1Byte( *((u8 *)(_pStart)+3) ) )
+#define SET_WMM_INFO_ELE_OUI_TYPE(_pStart, _val)	( *((u8 *)(_pStart)+3) = EF1Byte(_val) )
+
+#define GET_WMM_INFO_ELE_OUI_SUBTYPE(_pStart)	( EF1Byte( *((u8 *)(_pStart)+4) ) )
+#define SET_WMM_INFO_ELE_OUI_SUBTYPE(_pStart, _val)	( *((u8 *)(_pStart)+4) = EF1Byte(_val) )
+
+#define GET_WMM_INFO_ELE_VERSION(_pStart)	( EF1Byte( *((u8 *)(_pStart)+5) ) )
+#define SET_WMM_INFO_ELE_VERSION(_pStart, _val)	( *((u8 *)(_pStart)+5) = EF1Byte(_val) )
+
+#define GET_WMM_INFO_ELE_QOS_INFO_FIELD(_pStart)	( EF1Byte( *((u8 *)(_pStart)+6) ) )
+#define SET_WMM_INFO_ELE_QOS_INFO_FIELD(_pStart, _val)	( *((u8 *)(_pStart)+6) = EF1Byte(_val) )
+
+	
+
+#define GET_WMM_AC_PARAM_AIFSN(_pStart)	( (u8)LE_BITS_TO_4BYTE(_pStart, 0, 4) )
+#define SET_WMM_AC_PARAM_AIFSN(_pStart, _val)	SET_BITS_TO_LE_4BYTE(_pStart, 0, 4, _val)
+
+#define GET_WMM_AC_PARAM_ACM(_pStart)	( (u8)LE_BITS_TO_4BYTE(_pStart, 4, 1) )
+#define SET_WMM_AC_PARAM_ACM(_pStart, _val)	SET_BITS_TO_LE_4BYTE(_pStart, 4, 1, _val)
+
+#define GET_WMM_AC_PARAM_ACI(_pStart)		( (u8)LE_BITS_TO_4BYTE(_pStart, 5, 2) )
+#define SET_WMM_AC_PARAM_ACI(_pStart, _val)	SET_BITS_TO_LE_4BYTE(_pStart, 5, 2, _val)
+
+#define GET_WMM_AC_PARAM_ACI_AIFSN(_pStart)	( (u8)LE_BITS_TO_4BYTE(_pStart, 0, 8) )
+#define SET_WMM_AC_PARAM_ACI_AIFSN(_pStart, _val)	SET_BTIS_TO_LE_4BYTE(_pStart, 0, 8, _val)
+
+#define GET_WMM_AC_PARAM_ECWMIN(_pStart)	( (u8)LE_BITS_TO_4BYTE(_pStart, 8, 4) )
+#define SET_WMM_AC_PARAM_ECWMIN(_pStart, _val)	SET_BITS_TO_LE_4BYTE(_pStart, 8, 4, _val)
+
+#define GET_WMM_AC_PARAM_ECWMAX(_pStart)	( (u8)LE_BITS_TO_4BYTE(_pStart, 12, 4) )
+#define SET_WMM_AC_PARAM_ECWMAX(_pStart, _val)	SET_BITS_TO_LE_4BYTE(_pStart, 12, 4, _val)
+
+#define GET_WMM_AC_PARAM_TXOP_LIMIT(_pStart)		( (u16)LE_BITS_TO_4BYTE(_pStart, 16, 16) )
+#define SET_WMM_AC_PARAM_TXOP_LIMIT(_pStart, _val)	SET_BITS_TO_LE_4BYTE(_pStart, 16, 16, _val)
+
+
+
+
+#define GET_WMM_PARAM_ELE_OUI(_pStart)	((u8 *)(_pStart))
+#define SET_WMM_PARAM_ELE_OUI(_pStart, _pVal)	PlatformMoveMemory(_pStart, _pVal, 3)
+
+#define GET_WMM_PARAM_ELE_OUI_TYPE(_pStart)	( EF1Byte( *((u8 *)(_pStart)+3) ) )
+#define SET_WMM_PARAM_ELE_OUI_TYPE(_pStart, _val)	( *((u8 *)(_pStart)+3) = EF1Byte(_val) )
+
+#define GET_WMM_PARAM_ELE_OUI_SUBTYPE(_pStart)	( EF1Byte( *((u8 *)(_pStart)+4) ) )
+#define SET_WMM_PARAM_ELE_OUI_SUBTYPE(_pStart, _val)	( *((u8 *)(_pStart)+4) = EF1Byte(_val) )
+
+#define GET_WMM_PARAM_ELE_VERSION(_pStart)	( EF1Byte( *((u8 *)(_pStart)+5) ) )
+#define SET_WMM_PARAM_ELE_VERSION(_pStart, _val)	( *((u8 *)(_pStart)+5) = EF1Byte(_val) )
+
+#define GET_WMM_PARAM_ELE_QOS_INFO_FIELD(_pStart)	( EF1Byte( *((u8 *)(_pStart)+6) ) )
+#define SET_WMM_PARAM_ELE_QOS_INFO_FIELD(_pStart, _val)	( *((u8 *)(_pStart)+6) = EF1Byte(_val) )
+
+#define GET_WMM_PARAM_ELE_AC_PARAM(_pStart)	( (u8 *)(_pStart)+8 )
+#define SET_WMM_PARAM_ELE_AC_PARAM(_pStart, _pVal) PlatformMoveMemory((_pStart)+8, _pVal, 16)
+#endif
+
+typedef	union _QOS_CTRL_FIELD{
+	u8	charData[2];
+	u16	shortData;
+
+	struct
+	{
+		u8		UP:3;
+		u8		usRsvd1:1;
+		u8		EOSP:1;
+		u8		AckPolicy:2;
+		u8		usRsvd2:1;
+		u8		ucRsvdByte;
+	}WMM;
+
+	struct
+	{
+		u8		TID:4;
+		u8		bIsQsize:1;
+		u8		AckPolicy:2;
+		u8		usRsvd:1;
+		u8		TxopOrQsize;	
+	}BySta;
+
+	struct
+	{
+		u8		TID:4;
+		u8		EOSP:1;
+		u8		AckPolicy:2;
+		u8		usRsvd:1;
+		u8		PSBufState;		
+	}ByHc_Data;
+
+	struct
+	{
+		u8		TID:4;
+		u8		EOSP:1;
+		u8		AckPolicy:2;
+		u8		usRsvd:1;
+		u8		TxopLimit;		
+	}ByHc_CFP;
+
+}QOS_CTRL_FIELD, *PQOS_CTRL_FIELD;
+
+
+typedef	union _QOS_INFO_FIELD{
+	u8	charData;
+	
+	struct
+	{
+		u8		ucParameterSetCount:4;
+		u8		ucReserved:4;	
+	}WMM;
+
+	struct 
+	{
+		u8		ucAC_VO_UAPSD:1;
+		u8		ucAC_VI_UAPSD:1;
+		u8		ucAC_BE_UAPSD:1;
+		u8		ucAC_BK_UAPSD:1;
+		u8		ucReserved1:1;
+		u8		ucMaxSPLen:2;
+		u8		ucReserved2:1;
+		
+	}ByWmmPsSta;
+
+	struct
+	{
+		u8		ucParameterSetCount:4;
+		u8		ucReserved:3; 
+		u8		ucApUapsd:1;
+	}ByWmmPsAp;
+
+	struct
+	{
+		u8		ucAC3_UAPSD:1;
+		u8		ucAC2_UAPSD:1;
+		u8		ucAC1_UAPSD:1;
+		u8		ucAC0_UAPSD:1;
+		u8		ucQAck:1;
+		u8		ucMaxSPLen:2;
+		u8		ucMoreDataAck:1;
+	} By11eSta;
+
+	struct
+	{
+		u8		ucParameterSetCount:4;
+		u8		ucQAck:1;
+		u8		ucQueueReq:1;
+		u8		ucTXOPReq:1;
+		u8		ucReserved:1;
+	} By11eAp;
+
+	struct
+	{
+		u8		ucReserved1:4;
+		u8		ucQAck:1;
+		u8		ucReserved2:2;
+		u8		ucMoreDataAck:1;
+	} ByWmmsaSta;
+
+	struct
+	{
+		u8		ucReserved1:4;
+		u8		ucQAck:1;
+		u8		ucQueueReq:1;
+		u8		ucTXOPReq:1;
+		u8		ucReserved2:1;	
+	} ByWmmsaAp;
+
+	struct
+	{
+		u8		ucAC3_UAPSD:1;
+		u8		ucAC2_UAPSD:1;
+		u8		ucAC1_UAPSD:1;
+		u8		ucAC0_UAPSD:1;
+		u8		ucQAck:1;
+		u8		ucMaxSPLen:2;
+		u8		ucMoreDataAck:1;	
+	} ByAllSta;
+
+	struct
+	{
+		u8		ucParameterSetCount:4;
+		u8		ucQAck:1;
+		u8		ucQueueReq:1;
+		u8		ucTXOPReq:1;
+		u8		ucApUapsd:1;	
+	} ByAllAp;
+
+}QOS_INFO_FIELD, *PQOS_INFO_FIELD;
+
+#if 0
+typedef struct _WMM_INFO_ELEMENT{
+	u8			OUI[3];
+	u8			OUI_Type;
+	u8			OUI_SubType;
+	u8			Version;
+	QOS_INFO_FIELD	QosInfo;
+}WMM_INFO_ELEMENT, *PWMM_INFO_ELEMENT;
+#endif
+
+typedef u32 AC_CODING;
+#define AC0_BE	0		
+#define AC1_BK	1		
+#define AC2_VI	2		
+#define AC3_VO	3		
+#define AC_MAX	4		
+
+typedef	union _ACI_AIFSN{
+	u8	charData;
+	
+	struct
+	{
+		u8	AIFSN:4;
+		u8	ACM:1;
+		u8	ACI:2;
+		u8	Reserved:1;
+	}f;	
+}ACI_AIFSN, *PACI_AIFSN;
+
+typedef	union _ECW{
+	u8	charData;
+	struct
+	{
+		u8	ECWmin:4;
+		u8	ECWmax:4;
+	}f;	
+}ECW, *PECW;
+
+typedef	union _AC_PARAM{
+	u32	longData;
+	u8	charData[4];
+
+	struct
+	{
+		ACI_AIFSN	AciAifsn;
+		ECW		Ecw;
+		u16		TXOPLimit;
+	}f;	
+}AC_PARAM, *PAC_PARAM;
+
+
+
+typedef	enum _QOS_ELE_SUBTYPE{
+	QOSELE_TYPE_INFO	= 0x00,		
+	QOSELE_TYPE_PARAM	= 0x01,		
+}QOS_ELE_SUBTYPE,*PQOS_ELE_SUBTYPE;
+
+
+typedef	enum _DIRECTION_VALUE{
+	DIR_UP			= 0,		
+	DIR_DOWN		= 1,		
+	DIR_DIRECT		= 2,		
+	DIR_BI_DIR		= 3,		
+}DIRECTION_VALUE,*PDIRECTION_VALUE;
+
+
+typedef union _QOS_TSINFO{
+	u8		charData[3];
+	struct {
+		u8		ucTrafficType:1;			
+		u8		ucTSID:4;
+		u8		ucDirection:2;
+		u8		ucAccessPolicy:2;	
+		u8		ucAggregation:1;		
+		u8		ucPSB:1;				
+		u8		ucUP:3;
+		u8		ucTSInfoAckPolicy:2;		
+		u8		ucSchedule:1;			
+		u8		ucReserved:7;
+	}field;
+}QOS_TSINFO, *PQOS_TSINFO;
+
+typedef union _TSPEC_BODY{
+	u8		charData[55];
+	
+	struct
+	{
+		QOS_TSINFO	TSInfo;	
+		u16	NominalMSDUsize;
+		u16	MaxMSDUsize;
+		u32	MinServiceItv;
+		u32	MaxServiceItv;
+		u32	InactivityItv;
+		u32	SuspenItv;
+		u32	ServiceStartTime;
+		u32	MinDataRate;
+		u32	MeanDataRate;
+		u32	PeakDataRate;
+		u32	MaxBurstSize;
+		u32	DelayBound;
+		u32	MinPhyRate;
+		u16	SurplusBandwidthAllowance;
+		u16	MediumTime;
+	} f;	
+}TSPEC_BODY, *PTSPEC_BODY;
+
+
+typedef struct _WMM_TSPEC{
+	u8		ID;
+	u8		Length;
+	u8		OUI[3];
+	u8		OUI_Type;
+	u8		OUI_SubType;
+	u8		Version;
+	TSPEC_BODY	Body;
+} WMM_TSPEC, *PWMM_TSPEC;
+
+typedef	enum _ACM_METHOD{
+	eAcmWay0_SwAndHw		= 0,		
+	eAcmWay1_HW			= 1,		
+	eAcmWay2_SW			= 2,		
+}ACM_METHOD,*PACM_METHOD;
+
+
+typedef struct _ACM{
+	u64		UsedTime;
+	u64		MediumTime;
+	u8		HwAcmCtl;	
+}ACM, *PACM;
+
+typedef	u8		AC_UAPSD, *PAC_UAPSD;
+
+#define	GET_VO_UAPSD(_apsd) ((_apsd) & BIT0)
+#define	SET_VO_UAPSD(_apsd) ((_apsd) |= BIT0)
+	
+#define	GET_VI_UAPSD(_apsd) ((_apsd) & BIT1)
+#define	SET_VI_UAPSD(_apsd) ((_apsd) |= BIT1)
+
+#define	GET_BK_UAPSD(_apsd) ((_apsd) & BIT2)
+#define	SET_BK_UAPSD(_apsd) ((_apsd) |= BIT2)
+
+#define	GET_BE_UAPSD(_apsd) ((_apsd) & BIT3)
+#define	SET_BE_UAPSD(_apsd) ((_apsd) |= BIT3)
+	
+
+typedef union _QOS_TCLAS{
+
+	struct _TYPE_GENERAL{
+		u8		Priority;
+		u8 		ClassifierType;
+		u8 		Mask;
+	} TYPE_GENERAL;
+
+	struct _TYPE0_ETH{
+		u8		Priority;
+		u8 		ClassifierType;
+		u8 		Mask;
+		u8		SrcAddr[6];
+		u8		DstAddr[6];
+		u16		Type;
+	} TYPE0_ETH;
+
+	struct _TYPE1_IPV4{
+		u8		Priority;
+		u8 		ClassifierType;
+		u8 		Mask;
+		u8 		Version;
+		u8		SrcIP[4];
+		u8		DstIP[4];
+		u16		SrcPort;
+		u16		DstPort;
+		u8		DSCP;
+		u8		Protocol;
+		u8		Reserved;
+	} TYPE1_IPV4;
+
+	struct _TYPE1_IPV6{
+		u8		Priority;
+		u8 		ClassifierType;
+		u8 		Mask;
+		u8 		Version;
+		u8		SrcIP[16];
+		u8		DstIP[16];
+		u16		SrcPort;
+		u16		DstPort;
+		u8		FlowLabel[3];
+	} TYPE1_IPV6;
+
+	struct _TYPE2_8021Q{
+		u8		Priority;
+		u8 		ClassifierType;
+		u8 		Mask;
+		u16		TagType;
+	} TYPE2_8021Q;
+} QOS_TCLAS, *PQOS_TCLAS;
+
+typedef struct _QOS_TSTREAM{
+	u8			AC;
+	WMM_TSPEC		TSpec;
+	QOS_TCLAS		TClass;
+} QOS_TSTREAM, *PQOS_TSTREAM;
+
+
+
+typedef struct _OCTET_STRING{
+        u8        	*Octet;
+        u16             Length;
+}OCTET_STRING, *POCTET_STRING;
+#if 0
+#define FillOctetString(_os,_octet,_len)             \
+        (_os).Octet=(u8 *)(_octet);                  \
+        (_os).Length=(_len);
+
+#define WMM_ELEM_HDR_LEN        		     6
+#define WMMElemSkipHdr(_osWMMElem)                   \
+        (_osWMMElem).Octet += WMM_ELEM_HDR_LEN;      \
+        (_osWMMElem).Length -= WMM_ELEM_HDR_LEN;
+#endif
+typedef struct _STA_QOS{
+	u8				WMMIEBuf[MAX_WMMELE_LENGTH];
+	u8*				WMMIE;
+
+	QOS_MODE			QosCapability; 
+	QOS_MODE			CurrentQosMode;
+
+	AC_UAPSD			b4ac_Uapsd;  
+	AC_UAPSD			Curr4acUapsd;
+	u8				bInServicePeriod;
+	u8				MaxSPLength;
+	int 				NumBcnBeforeTrigger;
+
+	u8 *				pWMMInfoEle;
+	u8				WMMParamEle[WMM_PARAM_ELEMENT_SIZE];
+	u8				WMMPELength;
+
+	QOS_INFO_FIELD			QosInfoField_STA; 	
+	QOS_INFO_FIELD			QosInfoField_AP;	
+
+	AC_PARAM			CurAcParameters[4];
+
+	ACM				acm[4];
+	ACM_METHOD			AcmMethod;
+
+	QOS_TSTREAM			TStream[16];
+	WMM_TSPEC			TSpec;
+
+	u32				QBssWirelessMode;
+
+	u8				bNoAck;
+
+	u8				bEnableRxImmBA;
+
+}STA_QOS, *PSTA_QOS;
+
+typedef struct _BSS_QOS{
+	QOS_MODE		bdQoSMode;
+
+	u8			bdWMMIEBuf[MAX_WMMELE_LENGTH];
+	u8*		bdWMMIE;
+
+	QOS_ELE_SUBTYPE		EleSubType;
+
+	u8 *			pWMMInfoEle;
+	u8 *			pWMMParamEle;
+	
+	QOS_INFO_FIELD		QosInfoField;
+	AC_PARAM		AcParameter[4];
+}BSS_QOS, *PBSS_QOS;
+
+
+#define sQoSCtlLng			2
+#define	QOS_CTRL_LEN(_QosMode)		((_QosMode > QOS_DISABLE)? sQoSCtlLng : 0)
+
+
+#define IsACValid(ac)			((ac<=7 )?true:false )
+
+#endif 
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/rtllib_module.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/rtllib_module.c
@@ -0,0 +1,587 @@
+/*******************************************************************************
+
+  Copyright(c) 2004 Intel Corporation. All rights reserved.
+
+  Portions of this file are based on the WEP enablement code provided by the
+  Host AP project hostap-drivers v0.1.3
+  Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
+  <jkmaline@cc.hut.fi>
+  Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms of version 2 of the GNU General Public License as
+  published by the Free Software Foundation.
+
+  This program is distributed in the hope that it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc., 59
+  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
+
+  The full GNU General Public License is included in this distribution in the
+  file called LICENSE.
+
+  Contact Information:
+  James P. Ketrenos <ipw2100-admin@linux.intel.com>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+#include <linux/compiler.h>
+#include <linux/errno.h>
+#include <linux/if_arp.h>
+#include <linux/in6.h>
+#include <linux/in.h>
+#include <linux/ip.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/netdevice.h>
+#include <linux/pci.h>
+#include <linux/proc_fs.h>
+#include <linux/skbuff.h>
+#include <linux/slab.h>
+#include <linux/tcp.h>
+#include <linux/types.h>
+#include <linux/version.h>
+#include <linux/wireless.h>
+#include <linux/etherdevice.h>
+#include <asm/uaccess.h>
+#include <net/arp.h>
+
+#include "rtllib.h"
+
+
+#ifndef BUILT_IN_RTLLIB
+MODULE_DESCRIPTION("802.11 data/management/control stack");
+MODULE_AUTHOR("Copyright (C) 2004 Intel Corporation <jketreno@linux.intel.com>");
+MODULE_LICENSE("GPL");
+#endif
+
+#define DRV_NAME "rtllib"
+
+#ifdef CONFIG_CFG_80211 
+#ifdef CONFIG_RTL_RFKILL
+static inline void rtllib_rfkill_poll(struct wiphy *wiphy)
+{
+	struct rtllib_device *rtllib = NULL;
+
+	rtllib = (struct rtllib_device *)wiphy_priv(wiphy);
+
+	rtllib = (struct rtllib_device *)netdev_priv_rsl(rtllib->dev);
+
+	if (rtllib->rtllib_rfkill_poll)
+		rtllib->rtllib_rfkill_poll(rtllib->dev);
+}
+#else
+static inline void rtllib_rfkill_poll(struct wiphy *wiphy) {}
+#endif
+struct cfg80211_ops rtllib_config_ops = {.rfkill_poll = rtllib_rfkill_poll };
+void *rtllib_wiphy_privid = &rtllib_wiphy_privid;
+#endif
+
+void _setup_timer( struct timer_list* ptimer, void* fun, unsigned long data )
+{
+   ptimer->function = fun;
+   ptimer->data = data;
+   init_timer( ptimer );
+}
+
+#ifdef _RTL8192_EXT_PATCH_
+static inline int rtllib_mesh_networks_allocate(struct rtllib_device *ieee)
+{
+	if (ieee->mesh_networks)
+		return 0;
+
+	ieee->mesh_networks = kmalloc(
+		MAX_NETWORK_COUNT * sizeof(struct rtllib_network),
+		GFP_KERNEL);
+	
+	if (!ieee->mesh_networks) {
+		printk(KERN_WARNING "%s: Out of memory allocating beacons\n",
+		       ieee->dev->name);
+		return -ENOMEM;
+	}
+
+	memset(ieee->mesh_networks, 0,
+	       MAX_NETWORK_COUNT * sizeof(struct rtllib_network));
+
+	return 0;
+}
+
+static inline void rtllib_mesh_networks_free(struct rtllib_device *ieee)
+{
+	if (!ieee->mesh_networks)
+		return;
+	kfree(ieee->mesh_networks);
+	ieee->mesh_networks = NULL;
+}
+#endif
+
+static inline int rtllib_networks_allocate(struct rtllib_device *ieee)
+{
+	if (ieee->networks)
+		return 0;
+
+#ifndef RTK_DMP_PLATFORM
+	ieee->networks = kmalloc(
+		MAX_NETWORK_COUNT * sizeof(struct rtllib_network),
+		GFP_KERNEL);
+#else
+	ieee->networks = dvr_malloc(MAX_NETWORK_COUNT * sizeof(struct rtllib_network));
+#endif
+	if (!ieee->networks) {
+		printk(KERN_WARNING "%s: Out of memory allocating beacons\n",
+		       ieee->dev->name);
+		return -ENOMEM;
+	}
+
+	memset(ieee->networks, 0,
+	       MAX_NETWORK_COUNT * sizeof(struct rtllib_network));
+
+	return 0;
+}
+
+static inline void rtllib_networks_free(struct rtllib_device *ieee)
+{
+	if (!ieee->networks)
+		return;
+#ifndef RTK_DMP_PLATFORM
+	kfree(ieee->networks);
+#else
+	dvr_free(ieee->networks);
+#endif
+	ieee->networks = NULL;
+}
+
+static inline void rtllib_networks_initialize(struct rtllib_device *ieee)
+{
+	int i;
+
+	INIT_LIST_HEAD(&ieee->network_free_list);
+	INIT_LIST_HEAD(&ieee->network_list);
+	for (i = 0; i < MAX_NETWORK_COUNT; i++)
+		list_add_tail(&ieee->networks[i].list, &ieee->network_free_list);
+#ifdef _RTL8192_EXT_PATCH_
+	INIT_LIST_HEAD(&ieee->mesh_network_free_list);
+	INIT_LIST_HEAD(&ieee->mesh_network_list);
+	for (i = 0; i < MAX_NETWORK_COUNT; i++)
+		list_add_tail(&ieee->mesh_networks[i].list, &ieee->mesh_network_free_list);
+#endif
+}
+
+#if defined CONFIG_CFG_80211 
+static bool rtllib_wdev_alloc(struct rtllib_device *ieee, int sizeof_priv)
+{
+	int priv_size;
+	struct rtllib_device *rtllib = NULL;
+
+	priv_size = ALIGN(sizeof(struct rtllib_device),NETDEV_ALIGN) + sizeof_priv;
+
+	ieee->wdev.wiphy = wiphy_new(&rtllib_config_ops, priv_size);
+	if (!ieee->wdev.wiphy) {
+		RTLLIB_ERROR("Unable to allocate wiphy.\n");
+		goto out_err_new;
+	}
+
+	rtllib = (struct rtllib_device *)wiphy_priv(ieee->wdev.wiphy);
+	rtllib->dev = ieee->dev;
+	
+	ieee->dev->ieee80211_ptr = &ieee->wdev;
+	ieee->wdev.iftype = NL80211_IFTYPE_STATION;
+
+	/* Fill-out wiphy structure bits we know...  Not enough info
+	 *            here to call set_wiphy_dev or set MAC address or channel info
+	 *                       -- have to do that in ->ndo_init... */
+	ieee->wdev.wiphy->privid = rtllib_wiphy_privid;
+
+	ieee->wdev.wiphy->max_scan_ssids = 1;
+	ieee->wdev.wiphy->max_scan_ie_len = 0;
+	ieee->wdev.wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION)	| BIT(NL80211_IFTYPE_ADHOC);
+
+	return true;
+
+out_err_new:
+	wiphy_free(ieee->wdev.wiphy);
+	return false;
+}
+#endif
+
+struct net_device *alloc_rtllib(int sizeof_priv)
+{
+	struct rtllib_device *ieee = NULL;
+	struct net_device *dev;
+	int i,err;
+
+	RTLLIB_DEBUG_INFO("Initializing...\n");
+
+	dev = alloc_etherdev(sizeof(struct rtllib_device) + sizeof_priv);
+	if (!dev) {
+		RTLLIB_ERROR("Unable to network device.\n");
+		goto failed;
+	}
+	ieee = (struct rtllib_device *)netdev_priv_rsl(dev);
+	memset(ieee, 0, sizeof(struct rtllib_device)+sizeof_priv);
+	ieee->dev = dev;
+
+#ifdef CONFIG_CFG_80211
+	if(!rtllib_wdev_alloc(ieee, sizeof_priv))
+		goto failed;
+#endif
+	err = rtllib_networks_allocate(ieee);
+	if (err) {
+		RTLLIB_ERROR("Unable to allocate beacon storage: %d\n",
+				err);
+		goto failed;
+	}
+#ifdef _RTL8192_EXT_PATCH_
+	err = rtllib_mesh_networks_allocate(ieee);
+	if (err) {
+		RTLLIB_ERROR("Unable to allocate mesh_beacon storage: %d\n",
+				err);
+		goto failed;
+	}
+#endif
+	rtllib_networks_initialize(ieee);
+
+
+	/* Default fragmentation threshold is maximum payload size */
+	ieee->fts = DEFAULT_FTS;
+	ieee->scan_age = DEFAULT_MAX_SCAN_AGE;
+	ieee->open_wep = 1;
+
+	/* Default to enabling full open WEP with host based encrypt/decrypt */
+	ieee->host_encrypt = 1;
+	ieee->host_decrypt = 1;
+	ieee->ieee802_1x = 1; /* Default to supporting 802.1x */
+
+	INIT_LIST_HEAD(&ieee->crypt_deinit_list);
+	_setup_timer(&ieee->crypt_deinit_timer,
+		    rtllib_crypt_deinit_handler,
+		    (unsigned long) ieee);
+	ieee->rtllib_ap_sec_type = rtllib_ap_sec_type;
+
+	spin_lock_init(&ieee->lock);
+	spin_lock_init(&ieee->wpax_suitlist_lock);
+	spin_lock_init(&ieee->bw_spinlock);
+	spin_lock_init(&ieee->reorder_spinlock);
+	atomic_set(&(ieee->atm_chnlop), 0);
+	atomic_set(&(ieee->atm_swbw), 0);
+
+	ieee->bHalfNMode = false;
+ 	ieee->wpa_enabled = 0;
+ 	ieee->tkip_countermeasures = 0;
+ 	ieee->drop_unencrypted = 0;
+ 	ieee->privacy_invoked = 0;
+ 	ieee->ieee802_1x = 1;
+	ieee->raw_tx = 0;
+	ieee->hwsec_active = 0; 
+
+#ifdef _RTL8192_EXT_PATCH_
+	for (i=0; i<MAX_MP; i++)
+	{
+		ieee->cryptlist[i] = (struct rtllib_crypt_data_list*) kmalloc(sizeof(struct rtllib_crypt_data_list), GFP_KERNEL);
+		if (NULL == ieee->cryptlist[i])
+                {
+			printk("error kmalloc cryptlist\n");
+			goto failed;
+		}
+		memset(ieee->cryptlist[i], 0, sizeof(struct rtllib_crypt_data_list));
+	}
+	memset(ieee->swmeshcamtable,0,sizeof(SW_CAM_TABLE)*32);
+#endif	
+	memset(ieee->swcamtable,0,sizeof(SW_CAM_TABLE)*32);
+	rtllib_softmac_init(ieee);
+	
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13))
+	ieee->pHTInfo = (RT_HIGH_THROUGHPUT*)kzalloc(sizeof(RT_HIGH_THROUGHPUT), GFP_KERNEL);
+#else
+	ieee->pHTInfo = (RT_HIGH_THROUGHPUT*)kmalloc(sizeof(RT_HIGH_THROUGHPUT), GFP_KERNEL);
+	memset(ieee->pHTInfo,0,sizeof(RT_HIGH_THROUGHPUT));
+#endif
+	if (ieee->pHTInfo == NULL)
+	{
+		RTLLIB_DEBUG(RTLLIB_DL_ERR, "can't alloc memory for HTInfo\n");
+		return NULL;
+	}	
+	HTUpdateDefaultSetting(ieee);
+	HTInitializeHTInfo(ieee); 
+	TSInitialize(ieee);
+#if 0
+	INIT_WORK_RSL(&ieee->ht_onAssRsp, (void(*)(void*)) HTOnAssocRsp_wq, ieee);
+#endif
+	for (i = 0; i < IEEE_IBSS_MAC_HASH_SIZE; i++)
+		INIT_LIST_HEAD(&ieee->ibss_mac_hash[i]);
+
+#ifdef _RTL8192_EXT_PATCH_
+	for (i = 0; i < IEEE_MESH_MAC_HASH_SIZE; i++)
+		INIT_LIST_HEAD(&ieee->mesh_mac_hash[i]);
+#endif	
+	
+	for (i = 0; i < 17; i++) {
+	  ieee->last_rxseq_num[i] = -1;
+	  ieee->last_rxfrag_num[i] = -1;
+	  ieee->last_packet_time[i] = 0;
+	}
+
+	rtllib_tkip_null();
+	rtllib_wep_null();
+	rtllib_ccmp_null();
+
+	return dev;
+
+ failed:
+#ifdef _RTL8192_EXT_PATCH_
+	for (i=0; i<MAX_MP; i++)
+	{
+		if (ieee->cryptlist[i]==NULL){
+			continue;
+		}
+		kfree(ieee->cryptlist[i]);
+		ieee->cryptlist[i] = NULL;
+
+	}
+#endif
+
+	if (dev)
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0))
+		free_netdev(dev);
+#else
+		kfree(dev);
+#endif
+	return NULL;
+}
+
+
+void free_rtllib(struct net_device *dev)
+{
+	struct rtllib_device *ieee = (struct rtllib_device *)netdev_priv_rsl(dev);
+	int i;
+#ifdef _RTL8192_EXT_PATCH_
+	int j;
+	struct list_head *p, *q;
+	struct rtllib_crypt_data *crypt = NULL;
+#endif	
+#if 1	
+	if (ieee->pHTInfo != NULL)
+	{
+		kfree(ieee->pHTInfo);
+		ieee->pHTInfo = NULL;
+	}
+#endif	
+	rtllib_softmac_free(ieee);
+	del_timer_sync(&ieee->crypt_deinit_timer);
+	rtllib_crypt_deinit_entries(ieee, 1);
+
+#ifdef _RTL8192_EXT_PATCH_
+	for (j=0;j<MAX_MP; j++)
+	{
+		if (ieee->cryptlist[j] == NULL)
+			continue;
+		for (i = 0; i < WEP_KEYS; i++) {
+			crypt = ieee->cryptlist[j]->crypt[i];
+			
+			if (crypt) 
+			{
+				if (crypt->ops) {
+					crypt->ops->deinit(crypt->priv);
+					printk("===>%s():j is %d,i is %d\n",__FUNCTION__,j,i);
+#ifndef BUILT_IN_RTLLIB
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+					module_put(crypt->ops->owner);
+#else
+					__MOD_DEC_USE_COUNT(crypt->ops->owner);
+#endif				
+#endif
+				}
+				kfree(crypt);
+				ieee->cryptlist[j]->crypt[i] = NULL;
+			}
+		}
+		kfree(ieee->cryptlist[j]);
+	}
+	for (i = 0; i < WEP_KEYS; i++) {
+		crypt = ieee->sta_crypt[i];
+		if (crypt) 
+		{
+			if (crypt->ops) {
+				crypt->ops->deinit(crypt->priv);
+#ifndef BUILT_IN_RTLLIB
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+				module_put(crypt->ops->owner);
+#else
+				__MOD_DEC_USE_COUNT(crypt->ops->owner);
+#endif				
+#endif
+			}
+			kfree(crypt);
+		}
+		ieee->sta_crypt[i] = NULL;
+	}
+#else
+	for (i = 0; i < WEP_KEYS; i++) {
+		struct rtllib_crypt_data *crypt = ieee->crypt[i];
+		if (crypt) {
+			if (crypt->ops) {
+				crypt->ops->deinit(crypt->priv);
+#ifndef BUILT_IN_RTLLIB
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+				module_put(crypt->ops->owner);
+#else
+				__MOD_DEC_USE_COUNT(crypt->ops->owner);
+#endif				
+#endif
+			}
+			kfree(crypt);
+			ieee->crypt[i] = NULL;
+		}
+	}
+#endif
+
+	rtllib_networks_free(ieee);
+#ifdef _RTL8192_EXT_PATCH_
+	rtllib_mesh_networks_free(ieee);
+#endif
+#if 0	
+	for (i = 0; i < IEEE_IBSS_MAC_HASH_SIZE; i++) {
+		list_for_each_safe(p, q, &ieee->ibss_mac_hash[i]) {
+			kfree(list_entry(p, struct ieee_ibss_seq, list));
+			list_del(p);
+		}
+	}
+
+#endif
+#ifdef _RTL8192_EXT_PATCH_
+	for (i = 0; i < IEEE_MESH_MAC_HASH_SIZE; i++) {
+		list_for_each_safe(p, q, &ieee->mesh_mac_hash[i]) {
+			kfree(list_entry(p, struct ieee_mesh_seq, list));
+			list_del(p);
+		}
+	}
+#endif
+#if defined (RTL8192S_WAPI_SUPPORT)
+	if (ieee->WapiSupport)
+	{
+		WapiFreeAllStaInfo(ieee);
+	}
+#endif
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0))	
+#ifdef CONFIG_CFG_80211
+	wiphy_unregister(ieee->wdev.wiphy);
+	wiphy_free(ieee->wdev.wiphy);
+#endif
+	free_netdev(dev);
+#else
+	kfree(dev);
+#endif
+}
+
+#ifdef CONFIG_RTLLIB_DEBUG
+
+u32 rtllib_debug_level = 0;
+static int debug = \
+			    RTLLIB_DL_ERR	  
+			    ;
+struct proc_dir_entry *rtllib_proc = NULL;
+
+static int show_debug_level(char *page, char **start, off_t offset,
+			    int count, int *eof, void *data)
+{
+	return snprintf(page, count, "0x%08X\n", rtllib_debug_level);
+}
+
+static int store_debug_level(struct file *file, const char *buffer,
+			     unsigned long count, void *data)
+{
+	char buf[] = "0x00000000";
+	unsigned long len = min((unsigned long)sizeof(buf) - 1, count);
+	char *p = (char *)buf;
+	unsigned long val;
+
+	if (copy_from_user(buf, buffer, len))
+		return count;
+	buf[len] = 0;
+	if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') {
+		p++;
+		if (p[0] == 'x' || p[0] == 'X')
+			p++;
+		val = simple_strtoul(p, &p, 16);
+	} else
+		val = simple_strtoul(p, &p, 10);
+	if (p == buf)
+		printk(KERN_INFO DRV_NAME
+		       ": %s is not in hex or decimal form.\n", buf);
+	else
+		rtllib_debug_level = val;
+
+	return strnlen(buf, count);
+}
+
+int __init rtllib_init(void)
+{
+#ifdef CONFIG_RTLLIB_DEBUG
+	struct proc_dir_entry *e;
+
+	rtllib_debug_level = debug;
+#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
+	rtllib_proc = create_proc_entry(DRV_NAME, S_IFDIR, proc_net);
+#else
+	rtllib_proc = create_proc_entry(DRV_NAME, S_IFDIR, init_net.proc_net);
+#endif
+	if (rtllib_proc == NULL) {
+		RTLLIB_ERROR("Unable to create " DRV_NAME
+				" proc directory\n");
+		return -EIO;
+	}
+	e = create_proc_entry("debug_level", S_IFREG | S_IRUGO | S_IWUSR,
+			      rtllib_proc);
+	if (!e) {
+#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
+		remove_proc_entry(DRV_NAME, proc_net);
+#else
+		remove_proc_entry(DRV_NAME, init_net.proc_net);
+#endif
+		rtllib_proc = NULL;
+		return -EIO;
+	}
+	e->read_proc = show_debug_level;
+	e->write_proc = store_debug_level;
+	e->data = NULL;
+#endif
+
+	return 0;
+}
+
+void __exit rtllib_exit(void)
+{
+#ifdef CONFIG_RTLLIB_DEBUG
+	if (rtllib_proc) {
+		remove_proc_entry("debug_level", rtllib_proc);
+#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
+		remove_proc_entry(DRV_NAME, proc_net);
+#else
+		remove_proc_entry(DRV_NAME, init_net.proc_net);
+#endif
+		rtllib_proc = NULL;
+	}
+#endif
+}
+
+#ifndef BUILT_IN_RTLLIB
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
+#include <linux/moduleparam.h>
+module_param(debug, int, 0444);
+MODULE_PARM_DESC(debug, "debug output mask");
+
+
+module_exit(rtllib_exit);
+module_init(rtllib_init);
+#endif
+
+EXPORT_SYMBOL_RSL(alloc_rtllib);
+EXPORT_SYMBOL_RSL(free_rtllib);
+EXPORT_SYMBOL_RSL(rtllib_debug_level);
+#endif
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/arc4.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/arc4.c
@@ -0,0 +1,105 @@
+/* 
+ * Cryptographic API
+ *
+ * ARC4 Cipher Algorithm
+ *
+ * Jon Oberheide <jon@oberheide.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+#include <linux/module.h>
+#include <linux/init.h>
+#include "rtl_crypto.h"
+
+#define ARC4_MIN_KEY_SIZE	1
+#define ARC4_MAX_KEY_SIZE	256
+#define ARC4_BLOCK_SIZE		1
+
+struct arc4_ctx {
+	u8 S[256];
+	u8 x, y;
+};
+
+static int arc4_set_key(void *ctx_arg, const u8 *in_key, unsigned int key_len, u32 *flags)
+{
+	struct arc4_ctx *ctx = ctx_arg;
+	int i, j = 0, k = 0;
+
+	ctx->x = 1;
+	ctx->y = 0;
+
+	for(i = 0; i < 256; i++)
+		ctx->S[i] = i;
+
+	for(i = 0; i < 256; i++)
+	{
+		u8 a = ctx->S[i];
+		j = (j + in_key[k] + a) & 0xff;
+		ctx->S[i] = ctx->S[j];
+		ctx->S[j] = a;
+		if((unsigned int)++k >= key_len)
+			k = 0;
+	}
+
+	return 0;
+}
+
+static void arc4_crypt(void *ctx_arg, u8 *out, const u8 *in)
+{
+	struct arc4_ctx *ctx = ctx_arg;
+
+	u8 *const S = ctx->S;
+	u8 x = ctx->x;
+	u8 y = ctx->y;
+	u8 a, b;
+
+	a = S[x];
+	y = (y + a) & 0xff;
+	b = S[y];
+	S[x] = b;
+	S[y] = a;
+	x = (x + 1) & 0xff;
+	*out++ = *in ^ S[(a + b) & 0xff];
+
+	ctx->x = x;
+	ctx->y = y;
+}
+
+static struct crypto_alg arc4_alg = {
+	.cra_name		=	"arc4",
+	.cra_flags		=	CRYPTO_ALG_TYPE_CIPHER,
+	.cra_blocksize		=	ARC4_BLOCK_SIZE,
+	.cra_ctxsize		=	sizeof(struct arc4_ctx),
+	.cra_module		=	THIS_MODULE,
+	.cra_list		=	LIST_HEAD_INIT(arc4_alg.cra_list),
+	.cra_u			=	{ .cipher = {
+	.cia_min_keysize	=	ARC4_MIN_KEY_SIZE,
+	.cia_max_keysize	=	ARC4_MAX_KEY_SIZE,
+	.cia_setkey	   	= 	arc4_set_key,
+	.cia_encrypt	 	=	arc4_crypt,
+	.cia_decrypt	  	=	arc4_crypt } }
+};
+
+int __init arc4_init(void)
+{
+	return crypto_register_alg(&arc4_alg);
+}
+
+
+void __exit arc4_exit(void)
+{
+	crypto_unregister_alg(&arc4_alg);
+}
+
+#ifndef BUILT_IN_CRYPTO
+module_init(arc4_init);
+module_exit(arc4_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("ARC4 Cipher Algorithm");
+MODULE_AUTHOR("Jon Oberheide <jon@oberheide.org>");
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/rtllib_crypt.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/rtllib_crypt.c
@@ -0,0 +1,268 @@
+/*
+ * Host AP crypto routines
+ *
+ * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
+ * Portions Copyright (C) 2004, Intel Corporation <jketreno@linux.intel.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation. See README and COPYING for
+ * more details.
+ *
+ */
+
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <asm/string.h>
+#include <asm/errno.h>
+
+#include "rtllib.h"
+
+#ifndef BUILT_IN_RTLLIB
+MODULE_AUTHOR("Jouni Malinen");
+MODULE_DESCRIPTION("HostAP crypto");
+MODULE_LICENSE("GPL");
+#endif
+
+struct rtllib_crypto_alg {
+	struct list_head list;
+	struct rtllib_crypto_ops *ops;
+};
+
+
+struct rtllib_crypto {
+	struct list_head algs;
+	spinlock_t lock;
+};
+
+static struct rtllib_crypto *hcrypt;
+
+void rtllib_crypt_deinit_entries(struct rtllib_device *ieee,
+					   int force)
+{
+	struct list_head *ptr, *n;
+	struct rtllib_crypt_data *entry;
+
+	for (ptr = ieee->crypt_deinit_list.next, n = ptr->next;
+	     ptr != &ieee->crypt_deinit_list; ptr = n, n = ptr->next) {
+		entry = list_entry(ptr, struct rtllib_crypt_data, list);
+
+		if (atomic_read(&entry->refcnt) != 0 && !force)
+			continue;
+
+		list_del(ptr);
+
+		if (entry->ops) {
+			entry->ops->deinit(entry->priv);
+#ifndef BUILT_IN_RTLLIB
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)		
+			module_put(entry->ops->owner);
+#else
+			__MOD_DEC_USE_COUNT(entry->ops->owner);	
+#endif			
+#endif
+		}
+		kfree(entry);
+	}
+}
+
+void rtllib_crypt_deinit_handler(unsigned long data)
+{
+	struct rtllib_device *ieee = (struct rtllib_device *)data;
+	unsigned long flags;
+
+	spin_lock_irqsave(&ieee->lock, flags);
+	rtllib_crypt_deinit_entries(ieee, 0);
+	if (!list_empty(&ieee->crypt_deinit_list)) {
+		printk(KERN_DEBUG "%s: entries remaining in delayed crypt "
+		       "deletion list\n", ieee->dev->name);
+		ieee->crypt_deinit_timer.expires = jiffies + HZ;
+		add_timer(&ieee->crypt_deinit_timer);
+	}
+	spin_unlock_irqrestore(&ieee->lock, flags);
+
+}
+
+void rtllib_crypt_delayed_deinit(struct rtllib_device *ieee,
+				    struct rtllib_crypt_data **crypt)
+{
+	struct rtllib_crypt_data *tmp;
+	unsigned long flags;
+
+	if (*crypt == NULL)
+		return;
+
+	tmp = *crypt;
+	*crypt = NULL;
+
+	/* must not run ops->deinit() while there may be pending encrypt or
+	 * decrypt operations. Use a list of delayed deinits to avoid needing
+	 * locking. */
+
+	spin_lock_irqsave(&ieee->lock, flags);
+	list_add(&tmp->list, &ieee->crypt_deinit_list);
+	if (!timer_pending(&ieee->crypt_deinit_timer)) {
+		ieee->crypt_deinit_timer.expires = jiffies + HZ;
+		add_timer(&ieee->crypt_deinit_timer);
+	}
+	spin_unlock_irqrestore(&ieee->lock, flags);
+}
+
+int rtllib_register_crypto_ops(struct rtllib_crypto_ops *ops)
+{
+	unsigned long flags;
+	struct rtllib_crypto_alg *alg;
+
+	if (hcrypt == NULL)
+		return -1;
+
+	alg = kmalloc(sizeof(*alg), GFP_KERNEL);
+	if (alg == NULL)
+		return -ENOMEM;
+
+	memset(alg, 0, sizeof(*alg));
+	alg->ops = ops;
+
+	spin_lock_irqsave(&hcrypt->lock, flags);
+	list_add(&alg->list, &hcrypt->algs);
+	spin_unlock_irqrestore(&hcrypt->lock, flags);
+
+	printk(KERN_DEBUG "rtllib_crypt: registered algorithm '%s'\n",
+	       ops->name);
+
+	return 0;
+}
+
+int rtllib_unregister_crypto_ops(struct rtllib_crypto_ops *ops)
+{
+	unsigned long flags;
+	struct list_head *ptr;
+	struct rtllib_crypto_alg *del_alg = NULL;
+
+	if (hcrypt == NULL)
+		return -1;
+
+	spin_lock_irqsave(&hcrypt->lock, flags);
+	for (ptr = hcrypt->algs.next; ptr != &hcrypt->algs; ptr = ptr->next) {
+		struct rtllib_crypto_alg *alg =
+			(struct rtllib_crypto_alg *) ptr;
+		if (alg->ops == ops) {
+			list_del(&alg->list);
+			del_alg = alg;
+			break;
+		}
+	}
+	spin_unlock_irqrestore(&hcrypt->lock, flags);
+
+	if (del_alg) {
+		printk(KERN_DEBUG "rtllib_crypt: unregistered algorithm "
+		       "'%s'\n", ops->name);
+		kfree(del_alg);
+	}
+
+	return del_alg ? 0 : -1;
+}
+
+
+struct rtllib_crypto_ops * rtllib_get_crypto_ops(const char *name)
+{
+	unsigned long flags;
+	struct list_head *ptr;
+	struct rtllib_crypto_alg *found_alg = NULL;
+
+	if (hcrypt == NULL)
+		return NULL;
+
+	spin_lock_irqsave(&hcrypt->lock, flags);
+	for (ptr = hcrypt->algs.next; ptr != &hcrypt->algs; ptr = ptr->next) {
+		struct rtllib_crypto_alg *alg =
+			(struct rtllib_crypto_alg *) ptr;
+		if (strcmp(alg->ops->name, name) == 0) {
+			found_alg = alg;
+			break;
+		}
+	}
+	spin_unlock_irqrestore(&hcrypt->lock, flags);
+
+	if (found_alg)
+		return found_alg->ops;
+	else
+		return NULL;
+}
+
+
+static void * rtllib_crypt_null_init(int keyidx) { return (void *) 1; }
+static void rtllib_crypt_null_deinit(void *priv) {}
+
+static struct rtllib_crypto_ops rtllib_crypt_null = {
+	.name			= "NULL",
+	.init			= rtllib_crypt_null_init,
+	.deinit			= rtllib_crypt_null_deinit,
+	.encrypt_mpdu		= NULL,
+	.decrypt_mpdu		= NULL,
+	.encrypt_msdu		= NULL,
+	.decrypt_msdu		= NULL,
+	.set_key		= NULL,
+	.get_key		= NULL,
+	.extra_prefix_len	= 0,
+	.extra_postfix_len	= 0,
+	.owner			= THIS_MODULE,
+};
+
+
+int __init rtllib_crypto_init(void)
+{
+	int ret = -ENOMEM;
+
+	hcrypt = kmalloc(sizeof(*hcrypt), GFP_KERNEL);
+	if (!hcrypt)
+		goto out;
+
+	memset(hcrypt, 0, sizeof(*hcrypt));
+	INIT_LIST_HEAD(&hcrypt->algs);
+	spin_lock_init(&hcrypt->lock);
+
+	ret = rtllib_register_crypto_ops(&rtllib_crypt_null);
+	if (ret < 0) {
+		kfree(hcrypt);
+		hcrypt = NULL;
+	}
+out:
+	return ret;
+}
+
+
+void __exit rtllib_crypto_deinit(void)
+{
+	struct list_head *ptr, *n;
+
+	if (hcrypt == NULL)
+		return;
+
+	for (ptr = hcrypt->algs.next, n = ptr->next; ptr != &hcrypt->algs;
+	     ptr = n, n = ptr->next) {
+		struct rtllib_crypto_alg *alg =
+			(struct rtllib_crypto_alg *) ptr;
+		list_del(ptr);
+		printk(KERN_DEBUG "rtllib_crypt: unregistered algorithm "
+		       "'%s' (deinit)\n", alg->ops->name);
+		kfree(alg);
+	}
+
+	kfree(hcrypt);
+}
+
+#ifndef BUILT_IN_RTLLIB
+EXPORT_SYMBOL_RSL(rtllib_crypt_deinit_entries);
+EXPORT_SYMBOL_RSL(rtllib_crypt_deinit_handler);
+EXPORT_SYMBOL_RSL(rtllib_crypt_delayed_deinit);
+
+EXPORT_SYMBOL_RSL(rtllib_register_crypto_ops);
+EXPORT_SYMBOL_RSL(rtllib_unregister_crypto_ops);
+EXPORT_SYMBOL_RSL(rtllib_get_crypto_ops);
+
+module_init(rtllib_crypto_init);
+module_exit(rtllib_crypto_deinit);
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/scatterwalk.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/scatterwalk.h
@@ -0,0 +1,53 @@
+/*
+ * Cryptographic API.
+ *
+ * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
+ * Copyright (c) 2002 Adam J. Richter <adam@yggdrasil.com>
+ * Copyright (c) 2004 Jean-Luc Cooke <jlcooke@certainkey.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ *
+ */
+
+#ifndef _CRYPTO_SCATTERWALK_H
+#define _CRYPTO_SCATTERWALK_H
+#include <linux/mm.h>
+#include <asm/scatterlist.h>
+
+struct scatter_walk {
+	struct scatterlist	*sg;
+	struct page		*page;
+	void			*data;
+	unsigned int		len_this_page;
+	unsigned int		len_this_segment;
+	unsigned int		offset;
+};
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
+/* Define sg_next is an inline routine now in case we want to change
+   scatterlist to a linked list later. */
+static inline struct scatterlist *sg_next(struct scatterlist *sg)
+{
+	return sg + 1;
+}
+#endif
+
+static inline int scatterwalk_samebuf(struct scatter_walk *walk_in,
+				      struct scatter_walk *walk_out,
+				      void *src_p, void *dst_p)
+{
+	return walk_in->page == walk_out->page &&
+	       walk_in->offset == walk_out->offset &&
+	       walk_in->data == src_p && walk_out->data == dst_p;
+}
+
+void *scatterwalk_whichbuf(struct scatter_walk *walk, unsigned int nbytes, void *scratch);
+void scatterwalk_start(struct scatter_walk *walk, struct scatterlist *sg);
+int scatterwalk_copychunks(void *buf, struct scatter_walk *walk, size_t nbytes, int out);
+void scatterwalk_map(struct scatter_walk *walk, int out);
+void scatterwalk_done(struct scatter_walk *walk, int out, int more);
+
+#endif  /* _CRYPTO_SCATTERWALK_H */
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/EndianFree.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/EndianFree.h
@@ -0,0 +1,160 @@
+#ifndef __INC_ENDIANFREE_H
+#define __INC_ENDIANFREE_H
+
+/*
+ *	Call endian free function when
+ *		1. Read/write packet content.
+ *		2. Before write integer to IO.
+ *		3. After read integer from IO.
+ */
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
+#ifndef bool
+typedef enum{false = 0, true} bool;
+#endif
+#endif
+
+#define __MACHINE_LITTLE_ENDIAN 1234    /* LSB first: i386, vax */
+#define __MACHINE_BIG_ENDIAN    4321    /* MSB first: 68000, ibm, net, ppc */
+
+#define BYTE_ORDER __MACHINE_LITTLE_ENDIAN
+
+#if BYTE_ORDER == __MACHINE_LITTLE_ENDIAN
+#define EF1Byte(_val)				((u8)(_val))
+#define EF2Byte(_val)				((u16)(_val))
+#define EF4Byte(_val)				((u32)(_val))
+
+#else
+#define EF1Byte(_val)				((u8)(_val))
+#define EF2Byte(_val)				(((((u16)(_val))&0x00ff)<<8)|((((u16)(_val))&0xff00)>>8))
+#define EF4Byte(_val)				(((((u32)(_val))&0x000000ff)<<24)|\
+						((((u32)(_val))&0x0000ff00)<<8)|\
+						((((u32)(_val))&0x00ff0000)>>8)|\
+						((((u32)(_val))&0xff000000)>>24))
+#endif
+
+#define ReadEF1Byte(_ptr)		EF1Byte(*((u8 *)(_ptr)))
+#define ReadEF2Byte(_ptr)		EF2Byte(*((u16 *)(_ptr)))
+#define ReadEF4Byte(_ptr)		EF4Byte(*((u32 *)(_ptr)))
+
+#define WriteEF1Byte(_ptr, _val)	(*((u8 *)(_ptr)))=EF1Byte(_val)
+#define WriteEF2Byte(_ptr, _val)	(*((u16 *)(_ptr)))=EF2Byte(_val)
+#define WriteEF4Byte(_ptr, _val)	(*((u32 *)(_ptr)))=EF4Byte(_val)									
+#if BYTE_ORDER == __MACHINE_LITTLE_ENDIAN
+#define H2N1BYTE(_val)	((u8)(_val))
+#define H2N2BYTE(_val)	(((((u16)(_val))&0x00ff)<<8)|\
+			((((u16)(_val))&0xff00)>>8))
+#define H2N4BYTE(_val)	(((((u32)(_val))&0x000000ff)<<24)|\
+			((((u32)(_val))&0x0000ff00)<<8)	|\
+			((((u32)(_val))&0x00ff0000)>>8)	|\
+			((((u32)(_val))&0xff000000)>>24))
+#else
+#define H2N1BYTE(_val)			((u8)(_val))
+#define H2N2BYTE(_val)			((u16)(_val))
+#define H2N4BYTE(_val)			((u32)(_val))
+#endif
+
+#if BYTE_ORDER == __MACHINE_LITTLE_ENDIAN
+#define N2H1BYTE(_val)	((u8)(_val))
+#define N2H2BYTE(_val)	(((((u16)(_val))&0x00ff)<<8)|\
+			((((u16)(_val))&0xff00)>>8))
+#define N2H4BYTE(_val)	(((((u32)(_val))&0x000000ff)<<24)|\
+			((((u32)(_val))&0x0000ff00)<<8)	|\
+			((((u32)(_val))&0x00ff0000)>>8)	|\
+			((((u32)(_val))&0xff000000)>>24))
+#else
+#define N2H1BYTE(_val)			((u8)(_val))
+#define N2H2BYTE(_val)			((u16)(_val))
+#define N2H4BYTE(_val)			((u32)(_val))
+#endif
+
+#define BIT_LEN_MASK_32(__BitLen) (0xFFFFFFFF >> (32 - (__BitLen)))
+#define BIT_OFFSET_LEN_MASK_32(__BitOffset, __BitLen) (BIT_LEN_MASK_32(__BitLen) << (__BitOffset)) 
+
+#define LE_P4BYTE_TO_HOST_4BYTE(__pStart) (EF4Byte(*((u32 *)(__pStart))))
+
+#define LE_BITS_TO_4BYTE(__pStart, __BitOffset, __BitLen) \
+	( \
+	  ( LE_P4BYTE_TO_HOST_4BYTE(__pStart) >> (__BitOffset) ) \
+	  & \
+	  BIT_LEN_MASK_32(__BitLen) \
+	)
+
+#define LE_BITS_CLEARED_TO_4BYTE(__pStart, __BitOffset, __BitLen) \
+	( \
+	  LE_P4BYTE_TO_HOST_4BYTE(__pStart) \
+	  & \
+	  ( ~BIT_OFFSET_LEN_MASK_32(__BitOffset, __BitLen) ) \
+	)
+
+#define SET_BITS_TO_LE_4BYTE(__pStart, __BitOffset, __BitLen, __Value) \
+	*((u32 *)(__pStart)) = \
+	EF4Byte( \
+	LE_BITS_CLEARED_TO_4BYTE(__pStart, __BitOffset, __BitLen) \
+	| \
+	( (((u32)__Value) & BIT_LEN_MASK_32(__BitLen)) << (__BitOffset) ) \
+       );
+
+
+#define BIT_LEN_MASK_16(__BitLen) \
+	(0xFFFF >> (16 - (__BitLen)))
+
+#define BIT_OFFSET_LEN_MASK_16(__BitOffset, __BitLen) \
+	(BIT_LEN_MASK_16(__BitLen) << (__BitOffset))
+
+#define LE_P2BYTE_TO_HOST_2BYTE(__pStart) \
+	(EF2Byte(*((u16 *)(__pStart))))
+
+#define LE_BITS_TO_2BYTE(__pStart, __BitOffset, __BitLen) \
+	( \
+	  ( LE_P2BYTE_TO_HOST_2BYTE(__pStart) >> (__BitOffset) ) \
+	  & \
+	  BIT_LEN_MASK_16(__BitLen) \
+	)
+
+#define LE_BITS_CLEARED_TO_2BYTE(__pStart, __BitOffset, __BitLen) \
+	( \
+	  LE_P2BYTE_TO_HOST_2BYTE(__pStart) \
+	  & \
+	  ( ~BIT_OFFSET_LEN_MASK_16(__BitOffset, __BitLen) ) \
+	)
+
+#define SET_BITS_TO_LE_2BYTE(__pStart, __BitOffset, __BitLen, __Value) \
+	*((u16 *)(__pStart)) = \
+	EF2Byte( \
+		LE_BITS_CLEARED_TO_2BYTE(__pStart, __BitOffset, __BitLen) \
+		| \
+		( (((u16)__Value) & BIT_LEN_MASK_16(__BitLen)) << (__BitOffset) ) \
+       );
+
+#define BIT_LEN_MASK_8(__BitLen) \
+	(0xFF >> (8 - (__BitLen)))
+
+#define BIT_OFFSET_LEN_MASK_8(__BitOffset, __BitLen) \
+	(BIT_LEN_MASK_8(__BitLen) << (__BitOffset))
+
+#define LE_P1BYTE_TO_HOST_1BYTE(__pStart) \
+	(EF1Byte(*((u8 *)(__pStart))))
+
+#define LE_BITS_TO_1BYTE(__pStart, __BitOffset, __BitLen) \
+	( \
+	  ( LE_P1BYTE_TO_HOST_1BYTE(__pStart) >> (__BitOffset) ) \
+	  & \
+	  BIT_LEN_MASK_8(__BitLen) \
+	)
+
+#define LE_BITS_CLEARED_TO_1BYTE(__pStart, __BitOffset, __BitLen) \
+	( \
+	  LE_P1BYTE_TO_HOST_1BYTE(__pStart) \
+	  & \
+	  ( ~BIT_OFFSET_LEN_MASK_8(__BitOffset, __BitLen) ) \
+	)
+
+#define SET_BITS_TO_LE_1BYTE(__pStart, __BitOffset, __BitLen, __Value) \
+	*((u8 *)(__pStart)) = \
+	EF1Byte( \
+		LE_BITS_CLEARED_TO_1BYTE(__pStart, __BitOffset, __BitLen) \
+		| \
+		( (((u8)__Value) & BIT_LEN_MASK_8(__BitLen)) << (__BitOffset) ) \
+       );
+
+#endif 
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/rtllib_tx.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/rtllib_tx.c
@@ -0,0 +1,1631 @@
+/******************************************************************************
+
+  Copyright(c) 2003 - 2004 Intel Corporation. All rights reserved.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms of version 2 of the GNU General Public License as
+  published by the Free Software Foundation.
+
+  This program is distributed in the hope that it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc., 59
+  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
+
+  The full GNU General Public License is included in this distribution in the
+  file called LICENSE.
+
+  Contact Information:
+  James P. Ketrenos <ipw2100-admin@linux.intel.com>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+******************************************************************************
+
+  Few modifications for Realtek's Wi-Fi drivers by 
+  Andrea Merello <andreamrl@tiscali.it>
+  
+  A special thanks goes to Realtek for their support ! 
+
+******************************************************************************/
+
+#include <linux/compiler.h>
+#include <linux/errno.h>
+#include <linux/if_arp.h>
+#include <linux/in6.h>
+#include <linux/in.h>
+#include <linux/ip.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/netdevice.h>
+#include <linux/pci.h>
+#include <linux/proc_fs.h>
+#include <linux/skbuff.h>
+#include <linux/slab.h>
+#include <linux/tcp.h>
+#include <linux/types.h>
+#include <linux/version.h>
+#include <linux/wireless.h>
+#include <linux/etherdevice.h>
+#include <asm/uaccess.h>
+#include <linux/if_vlan.h>
+
+#include "rtllib.h"
+
+#ifdef RTK_DMP_PLATFORM
+#include <linux/usb_setting.h> 
+#endif
+
+/*
+
+
+802.11 Data Frame
+
+
+802.11 frame_contorl for data frames - 2 bytes
+     ,-----------------------------------------------------------------------------------------.
+bits | 0  |  1  |  2  |  3  |  4  |  5  |  6  |  7  |  8  |  9  |  a  |  b  |  c  |  d  |  e   |
+     |----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|------|
+val  | 0  |  0  |  0  |  1  |  x  |  0  |  0  |  0  |  1  |  0  |  x  |  x  |  x  |  x  |  x   |
+     |----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|------|
+desc | ^-ver-^  |  ^type-^  |  ^-----subtype-----^  | to  |from |more |retry| pwr |more |wep   |
+     |          |           | x=0 data,x=1 data+ack | DS  | DS  |frag |     | mgm |data |      |
+     '-----------------------------------------------------------------------------------------'
+		                                    /\
+                                                    |
+802.11 Data Frame                                   |
+           ,--------- 'ctrl' expands to >-----------'
+          |
+      ,--'---,-------------------------------------------------------------.
+Bytes |  2   |  2   |    6    |    6    |    6    |  2   | 0..2312 |   4  |
+      |------|------|---------|---------|---------|------|---------|------|
+Desc. | ctrl | dura |  DA/RA  |   TA    |    SA   | Sequ |  Frame  |  fcs |
+      |      | tion | (BSSID) |         |         | ence |  data   |      |
+      `--------------------------------------------------|         |------'
+Total: 28 non-data bytes                                 `----.----'
+                                                              |
+       .- 'Frame data' expands to <---------------------------'
+       |
+       V
+      ,---------------------------------------------------.
+Bytes |  1   |  1   |    1    |    3     |  2   |  0-2304 |
+      |------|------|---------|----------|------|---------|
+Desc. | SNAP | SNAP | Control |Eth Tunnel| Type | IP      |
+      | DSAP | SSAP |         |          |      | Packet  |
+      | 0xAA | 0xAA |0x03 (UI)|0x00-00-F8|      |         |
+      `-----------------------------------------|         |
+Total: 8 non-data bytes                         `----.----'
+                                                     |
+       .- 'IP Packet' expands, if WEP enabled, to <--'
+       |
+       V
+      ,-----------------------.
+Bytes |  4  |   0-2296  |  4  |
+      |-----|-----------|-----|
+Desc. | IV  | Encrypted | ICV |
+      |     | IP Packet |     |
+      `-----------------------'
+Total: 8 non-data bytes
+
+
+802.3 Ethernet Data Frame
+
+      ,-----------------------------------------.
+Bytes |   6   |   6   |  2   |  Variable |   4  |
+      |-------|-------|------|-----------|------|
+Desc. | Dest. | Source| Type | IP Packet |  fcs |
+      |  MAC  |  MAC  |      |           |      |
+      `-----------------------------------------'
+Total: 18 non-data bytes
+
+In the event that fragmentation is required, the incoming payload is split into
+N parts of size ieee->fts.  The first fragment contains the SNAP header and the
+remaining packets are just data.
+
+If encryption is enabled, each fragment payload size is reduced by enough space
+to add the prefix and postfix (IV and ICV totalling 8 bytes in the case of WEP)
+So if you have 1500 bytes of payload with ieee->fts set to 500 without
+encryption it will take 3 frames.  With WEP it will take 4 frames as the
+payload of each frame is reduced to 492 bytes.
+
+* SKB visualization
+*
+*  ,- skb->data
+* |
+* |    ETHERNET HEADER        ,-<-- PAYLOAD
+* |                           |     14 bytes from skb->data
+* |  2 bytes for Type --> ,T. |     (sizeof ethhdr)
+* |                       | | |
+* |,-Dest.--. ,--Src.---. | | |
+* |  6 bytes| | 6 bytes | | | |
+* v         | |         | | | |
+* 0         | v       1 | v | v           2
+* 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5
+*     ^     | ^         | ^ |
+*     |     | |         | | |
+*     |     | |         | `T' <---- 2 bytes for Type
+*     |     | |         |
+*     |     | '---SNAP--' <-------- 6 bytes for SNAP
+*     |     |
+*     `-IV--' <-------------------- 4 bytes for IV (WEP)
+*
+*      SNAP HEADER
+*
+*/
+
+static u8 P802_1H_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0xf8 };
+static u8 RFC1042_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0x00 };
+
+inline int rtllib_put_snap(u8 *data, u16 h_proto)
+{
+	struct rtllib_snap_hdr *snap;
+	u8 *oui;
+
+	snap = (struct rtllib_snap_hdr *)data;
+	snap->dsap = 0xaa;
+	snap->ssap = 0xaa;
+	snap->ctrl = 0x03;
+
+	if (h_proto == 0x8137 || h_proto == 0x80f3)
+		oui = P802_1H_OUI;
+	else
+		oui = RFC1042_OUI;
+	snap->oui[0] = oui[0];
+	snap->oui[1] = oui[1];
+	snap->oui[2] = oui[2];
+
+	*(u16 *)(data + SNAP_SIZE) = htons(h_proto);
+
+	return SNAP_SIZE + sizeof(u16);
+}
+
+#ifdef _RTL8192_EXT_PATCH_
+int rtllib_encrypt_fragment(
+	struct rtllib_device *ieee,
+	struct sk_buff *frag,
+	int hdr_len,
+	u8 is_mesh,
+	u8 entry)
+#else
+int rtllib_encrypt_fragment(
+	struct rtllib_device *ieee,
+	struct sk_buff *frag,
+	int hdr_len)
+#endif
+{
+	struct rtllib_crypt_data* crypt = NULL;
+	int res;
+	
+#ifdef _RTL8192_EXT_PATCH_
+      	if (is_mesh) {
+		crypt = ieee->cryptlist[entry]->crypt[ieee->mesh_txkeyidx]; 
+	} else
+		crypt = ieee->sta_crypt[ieee->tx_keyidx]; 		
+#else
+	crypt = ieee->crypt[ieee->tx_keyidx];
+#endif
+
+	if (!(crypt && crypt->ops))
+	{
+		printk("=========>%s(), crypt is null\n", __FUNCTION__);
+		return -1;
+	}
+#ifdef CONFIG_RTLLIB_CRYPT_TKIP
+	struct rtllib_hdr_1addr *header;
+
+	if (ieee->tkip_countermeasures &&
+	    crypt && crypt->ops && strcmp(crypt->ops->name, "TKIP") == 0) {
+		header = (struct rtllib_hdr_1addr *) frag->data;
+		if (net_ratelimit()) {
+			printk(KERN_DEBUG "%s: TKIP countermeasures: dropped "
+			       "TX packet to " MAC_FMT "\n",
+			       ieee->dev->name, MAC_ARG(header->addr1));
+		}
+		return -1;
+	}
+#endif
+	/* To encrypt, frame format is:
+	 * IV (4 bytes), clear payload (including SNAP), ICV (4 bytes) */
+
+	/* Host-based IEEE 802.11 fragmentation for TX is not yet supported, so
+	 * call both MSDU and MPDU encryption functions from here. */
+	atomic_inc(&crypt->refcnt);
+	res = 0;
+	if (crypt->ops->encrypt_msdu)
+		res = crypt->ops->encrypt_msdu(frag, hdr_len, crypt->priv);
+	if (res == 0 && crypt->ops->encrypt_mpdu)
+		res = crypt->ops->encrypt_mpdu(frag, hdr_len, crypt->priv);
+
+	atomic_dec(&crypt->refcnt);
+	if (res < 0) {
+		printk(KERN_INFO "%s: Encryption failed: len=%d.\n",
+		       ieee->dev->name, frag->len);
+		ieee->ieee_stats.tx_discards++;
+		return -1;
+	}
+
+	return 0;
+}
+
+
+void rtllib_txb_free(struct rtllib_txb *txb) {
+	if (unlikely(!txb))
+		return;
+#if 0
+	for (i = 0; i < txb->nr_frags; i++)
+		if (txb->fragments[i])
+			dev_kfree_skb_any(txb->fragments[i]);
+#endif
+	kfree(txb);
+}
+
+struct rtllib_txb *rtllib_alloc_txb(int nr_frags, int txb_size,
+					  int gfp_mask)
+{
+#ifdef USB_USE_ALIGNMENT
+	u32 Tmpaddr=0;
+	int alignment=0;
+#endif
+	struct rtllib_txb *txb;
+	int i;
+	txb = kmalloc(
+		sizeof(struct rtllib_txb) + (sizeof(u8*) * nr_frags),
+		gfp_mask);
+	if (!txb)
+		return NULL;
+
+	memset(txb, 0, sizeof(struct rtllib_txb));
+	txb->nr_frags = nr_frags;
+	txb->frag_size = txb_size;
+
+	for (i = 0; i < nr_frags; i++) {
+#ifdef USB_USE_ALIGNMENT
+		txb->fragments[i] = dev_alloc_skb(txb_size+USB_512B_ALIGNMENT_SIZE);
+#else
+		txb->fragments[i] = dev_alloc_skb(txb_size);
+#endif
+		if (unlikely(!txb->fragments[i])) {
+			i--;
+			break;
+		}
+#ifdef USB_USE_ALIGNMENT
+		Tmpaddr = (u32)(txb->fragments[i]->data);
+		alignment = Tmpaddr & 0x1ff;
+		skb_reserve(txb->fragments[i],(USB_512B_ALIGNMENT_SIZE - alignment));
+#endif
+		memset(txb->fragments[i]->cb, 0, sizeof(txb->fragments[i]->cb));
+	}
+	if (unlikely(i != nr_frags)) {
+		while (i >= 0)
+			dev_kfree_skb_any(txb->fragments[i--]);
+		kfree(txb);
+		return NULL;
+	}
+	return txb;
+}
+
+int 
+rtllib_classify(struct sk_buff *skb, u8 bIsAmsdu)
+{
+	struct ethhdr *eth;
+	struct iphdr *ip;
+
+	eth = (struct ethhdr *)skb->data;
+	if (eth->h_proto != htons(ETH_P_IP))
+		return 0;
+
+#ifdef ENABLE_AMSDU
+	if(bIsAmsdu)
+		ip = (struct iphdr*)(skb->data + sizeof(struct ether_header) + AMSDU_SUBHEADER_LEN + SNAP_SIZE + sizeof(u16));
+	else
+		ip = (struct iphdr*)(skb->data + sizeof(struct ether_header));
+#else
+	RTLLIB_DEBUG_DATA(RTLLIB_DL_DATA, skb->data, skb->len);
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22))
+	ip = ip_hdr(skb);
+#else
+	ip = (struct iphdr*)(skb->data + sizeof(struct ether_header));
+#endif
+#endif
+	switch (ip->tos & 0xfc) {
+		case 0x20:
+			return 2;
+		case 0x40:
+			return 1;
+		case 0x60:
+			return 3;
+		case 0x80:
+			return 4;
+		case 0xa0:
+			return 5;
+		case 0xc0:
+			return 6;
+		case 0xe0:
+			return 7;
+		default:
+			return 0;
+	}
+}
+
+#define SN_LESS(a, b)		(((a-b)&0x800)!=0)
+void rtllib_tx_query_agg_cap(struct rtllib_device* ieee, struct sk_buff* skb, cb_desc* tcb_desc)
+{
+	PRT_HIGH_THROUGHPUT	pHTInfo = ieee->pHTInfo;
+	PTX_TS_RECORD			pTxTs = NULL;
+	struct rtllib_hdr_1addr* hdr = (struct rtllib_hdr_1addr*)skb->data;
+
+	if (!pHTInfo->bCurrentHTSupport||!pHTInfo->bEnableHT){
+		return;
+	}
+	if (!IsQoSDataFrame(skb->data)){
+		return;
+	}
+	if (is_multicast_ether_addr(hdr->addr1) || is_broadcast_ether_addr(hdr->addr1)){
+		return;
+	}
+#ifdef TO_DO_LIST
+	if(pTcb->PacketLength >= 4096)
+		return;
+	if(!Adapter->HalFunc.GetNmodeSupportBySecCfgHandler(Adapter))
+		return; 
+#endif
+
+	if(tcb_desc->bdhcp || ieee->CntAfterLink<2){
+		return;
+	}
+	
+	if(pHTInfo->IOTAction & HT_IOT_ACT_TX_NO_AGGREGATION){
+		return;
+	}	
+
+	if(!ieee->GetNmodeSupportBySecCfg(ieee->dev)){
+		return; 
+	}
+	if(pHTInfo->bCurrentAMPDUEnable){
+		if (!GetTs(ieee, (PTS_COMMON_INFO*)(&pTxTs), hdr->addr1, skb->priority, TX_DIR, true)){
+			printk("%s: can't get TS\n", __func__);
+			return;
+		}
+		if (pTxTs->TxAdmittedBARecord.bValid == false){
+			if (ieee->wpa_ie_len && (ieee->pairwise_key_type == KEY_TYPE_NA)) {
+				;
+			} else if (tcb_desc->bdhcp == 1){
+				;
+			} else if (!pTxTs->bDisable_AddBa){
+				TsStartAddBaProcess(ieee, pTxTs);
+			}
+			goto FORCED_AGG_SETTING;
+		}
+		else if (pTxTs->bUsingBa == false)
+		{
+			if (SN_LESS(pTxTs->TxAdmittedBARecord.BaStartSeqCtrl.field.SeqNum, (pTxTs->TxCurSeq+1)%4096))
+				pTxTs->bUsingBa = true;
+			else
+				goto FORCED_AGG_SETTING;
+		}
+#ifndef _RTL8192_EXT_PATCH_
+#ifndef RTL8192S_WAPI_SUPPORT  
+		if (ieee->iw_mode == IW_MODE_INFRA)
+#endif
+#endif
+		{
+			tcb_desc->bAMPDUEnable = true;
+			tcb_desc->ampdu_factor = pHTInfo->CurrentAMPDUFactor;
+			tcb_desc->ampdu_density = pHTInfo->CurrentMPDUDensity;
+		}
+	}
+FORCED_AGG_SETTING:
+	switch(pHTInfo->ForcedAMPDUMode )
+	{
+		case HT_AGG_AUTO:
+			break;
+
+		case HT_AGG_FORCE_ENABLE:
+			tcb_desc->bAMPDUEnable = true;
+			tcb_desc->ampdu_density = pHTInfo->ForcedMPDUDensity;
+			tcb_desc->ampdu_factor = pHTInfo->ForcedAMPDUFactor;
+			break;
+
+		case HT_AGG_FORCE_DISABLE:
+			tcb_desc->bAMPDUEnable = false;
+			tcb_desc->ampdu_density = 0;
+			tcb_desc->ampdu_factor = 0;
+			break;
+
+	}	
+		return;
+}
+
+extern void rtllib_qurey_ShortPreambleMode(struct rtllib_device* ieee, cb_desc* tcb_desc)
+{
+	tcb_desc->bUseShortPreamble = false;
+	if (tcb_desc->data_rate == 2)
+	{
+		return;
+	}
+	else if (ieee->current_network.capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
+	{
+		tcb_desc->bUseShortPreamble = true;
+	}
+	return;	
+}
+
+extern	void	
+rtllib_query_HTCapShortGI(struct rtllib_device *ieee, cb_desc *tcb_desc)
+{
+	PRT_HIGH_THROUGHPUT		pHTInfo = ieee->pHTInfo;
+
+	tcb_desc->bUseShortGI 		= false;
+
+	if(!pHTInfo->bCurrentHTSupport||!pHTInfo->bEnableHT)
+		return;
+
+	if(pHTInfo->bForcedShortGI)
+	{
+		tcb_desc->bUseShortGI = true;
+		return;
+	}
+
+	if((pHTInfo->bCurBW40MHz==true) && pHTInfo->bCurShortGI40MHz)
+		tcb_desc->bUseShortGI = true;
+	else if((pHTInfo->bCurBW40MHz==false) && pHTInfo->bCurShortGI20MHz)
+		tcb_desc->bUseShortGI = true;
+}
+
+void rtllib_query_BandwidthMode(struct rtllib_device* ieee, cb_desc *tcb_desc)
+{
+	PRT_HIGH_THROUGHPUT	pHTInfo = ieee->pHTInfo;
+
+	tcb_desc->bPacketBW = false;
+
+	if(!pHTInfo->bCurrentHTSupport||!pHTInfo->bEnableHT)
+		return;
+
+	if(tcb_desc->bMulticast || tcb_desc->bBroadcast)
+		return;
+
+	if((tcb_desc->data_rate & 0x80)==0) 
+		return;
+	if(pHTInfo->bCurBW40MHz && pHTInfo->bCurTxBW40MHz && !ieee->bandwidth_auto_switch.bforced_tx20Mhz)
+		tcb_desc->bPacketBW = true;
+	return;
+}
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
+extern void rtllib_ibss_query_HTCapShortGI(struct rtllib_device *ieee, cb_desc *tcb_desc,u8 is_peer_shortGI_40M,u8 is_peer_shortGI_20M)
+{
+	PRT_HIGH_THROUGHPUT		pHTInfo = ieee->pHTInfo;
+
+	tcb_desc->bUseShortGI 		= false;
+
+	if(!pHTInfo->bCurrentHTSupport||!pHTInfo->bEnableHT || (ieee->iw_mode != IW_MODE_ADHOC))
+	{
+		return;
+	}
+
+	if(pHTInfo->bForcedShortGI)
+	{
+		tcb_desc->bUseShortGI = true;
+		return;
+	}
+	if((pHTInfo->bCurBW40MHz==true) && is_peer_shortGI_40M)
+		tcb_desc->bUseShortGI = true;
+	else if((pHTInfo->bCurBW40MHz==false) && is_peer_shortGI_20M)
+		tcb_desc->bUseShortGI = true;
+}
+void rtllib_ibss_query_BandwidthMode(struct rtllib_device* ieee, cb_desc *tcb_desc, u8 is_peer_40M)
+{
+	PRT_HIGH_THROUGHPUT	pHTInfo = ieee->pHTInfo;
+
+	tcb_desc->bPacketBW = false;
+
+	if(!pHTInfo->bCurrentHTSupport||!pHTInfo->bEnableHT || (ieee->iw_mode != IW_MODE_ADHOC))
+	{
+		return;
+	}
+
+	if(tcb_desc->bMulticast || tcb_desc->bBroadcast)
+	{
+		return;
+	}
+
+	if((tcb_desc->data_rate & 0x80)==0) 
+	{
+		return;
+	}
+	if(pHTInfo->bCurBW40MHz && is_peer_40M && !ieee->bandwidth_auto_switch.bforced_tx20Mhz)
+		tcb_desc->bPacketBW = true;
+	return;
+}
+#endif
+void rtllib_query_protectionmode(struct rtllib_device* ieee, cb_desc* tcb_desc, struct sk_buff* skb)
+{
+	tcb_desc->bRTSSTBC			= false;
+	tcb_desc->bRTSUseShortGI		= false; 
+	tcb_desc->bCTSEnable			= false; 
+	tcb_desc->RTSSC				= 0;		
+	tcb_desc->bRTSBW			= false; 
+	
+	if(tcb_desc->bBroadcast || tcb_desc->bMulticast)
+		return;
+	
+	if (is_broadcast_ether_addr(skb->data+16))  
+		return;
+
+	if (ieee->mode < IEEE_N_24G) 
+	{
+		if (skb->len > ieee->rts)
+		{
+			tcb_desc->bRTSEnable = true;
+			tcb_desc->rts_rate = MGN_24M;
+		}
+		else if (ieee->current_network.buseprotection)
+		{
+			tcb_desc->bRTSEnable = true;
+			tcb_desc->bCTSEnable = true;
+			tcb_desc->rts_rate = MGN_24M;
+		}
+		return;
+	}
+	else
+	{
+		PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
+		while (true)
+		{
+			if(pHTInfo->IOTAction & HT_IOT_ACT_FORCED_CTS2SELF)
+			{
+				tcb_desc->bCTSEnable	= true;
+				tcb_desc->rts_rate  = 	MGN_24M;
+#if defined(RTL8192SE) || defined(RTL8192SU) || defined RTL8192CE
+				tcb_desc->bRTSEnable = false;
+#else
+				tcb_desc->bRTSEnable = true;
+#endif
+				break;
+			}
+			else if(pHTInfo->IOTAction & (HT_IOT_ACT_FORCED_RTS|HT_IOT_ACT_PURE_N_MODE))
+			{
+				tcb_desc->bRTSEnable = true;
+				tcb_desc->rts_rate  = 	MGN_24M;
+				break;
+			}
+			if (ieee->current_network.buseprotection)
+			{
+				tcb_desc->bRTSEnable = true;
+				tcb_desc->bCTSEnable = true;
+				tcb_desc->rts_rate = MGN_24M;
+				break;
+			}
+			if(pHTInfo->bCurrentHTSupport  && pHTInfo->bEnableHT)
+			{
+				u8 HTOpMode = pHTInfo->CurrentOpMode;
+				if((pHTInfo->bCurBW40MHz && (HTOpMode == 2 || HTOpMode == 3)) ||
+							(!pHTInfo->bCurBW40MHz && HTOpMode == 3) )
+				{
+					tcb_desc->rts_rate = MGN_24M; 
+					tcb_desc->bRTSEnable = true;
+					break;
+				}
+			}
+			if (skb->len > ieee->rts)
+			{
+				tcb_desc->rts_rate = MGN_24M; 
+				tcb_desc->bRTSEnable = true;
+				break;
+			}
+			if(tcb_desc->bAMPDUEnable)
+			{
+				tcb_desc->rts_rate = MGN_24M; 
+				tcb_desc->bRTSEnable = false;
+				break;
+			}
+			goto NO_PROTECTION;
+		}
+		}
+	if( 0 )
+	{
+		tcb_desc->bCTSEnable	= true;
+		tcb_desc->rts_rate = MGN_24M;
+		tcb_desc->bRTSEnable 	= true;
+	}
+	if (ieee->current_network.capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
+		tcb_desc->bUseShortPreamble = true;
+	if (ieee->iw_mode == IW_MODE_MASTER)
+			goto NO_PROTECTION;
+	return;
+NO_PROTECTION:
+	tcb_desc->bRTSEnable	= false;
+	tcb_desc->bCTSEnable	= false;
+	tcb_desc->rts_rate		= 0;
+	tcb_desc->RTSSC		= 0;
+	tcb_desc->bRTSBW		= false;
+}
+
+
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE) 
+void rtllib_txrate_selectmode(struct rtllib_device* ieee, cb_desc* tcb_desc,struct sta_info *psta)
+#else
+void rtllib_txrate_selectmode(struct rtllib_device* ieee, cb_desc* tcb_desc)
+#endif
+{
+#ifdef TO_DO_LIST	
+	if(!IsDataFrame(pFrame))
+	{
+		pTcb->bTxDisableRateFallBack = true;
+		pTcb->bTxUseDriverAssingedRate = true;
+		pTcb->RATRIndex = 7;
+		return;
+	}
+
+	if(pMgntInfo->ForcedDataRate!= 0)
+	{
+		pTcb->bTxDisableRateFallBack = true;
+		pTcb->bTxUseDriverAssingedRate = true;
+		return;
+	}
+#endif
+	if(ieee->bTxDisableRateFallBack)
+		tcb_desc->bTxDisableRateFallBack = true;
+
+	if(ieee->bTxUseDriverAssingedRate)
+		tcb_desc->bTxUseDriverAssingedRate = true;
+	if(!tcb_desc->bTxDisableRateFallBack || !tcb_desc->bTxUseDriverAssingedRate)
+	{
+#ifdef _RTL8192_EXT_PATCH_
+		if ((ieee->iw_mode == IW_MODE_INFRA) || (ieee->iw_mode == IW_MODE_MESH)) 
+			tcb_desc->RATRIndex = 0;
+		else if (ieee->iw_mode == IW_MODE_ADHOC){
+			if(tcb_desc->bMulticast ||  tcb_desc->bBroadcast){
+				tcb_desc->data_rate = ieee->basic_rate;
+				tcb_desc->bTxUseDriverAssingedRate = 1;
+			}else{
+				if(psta != NULL)
+					tcb_desc->RATRIndex = psta->ratr_index;
+				else
+					tcb_desc->RATRIndex = 7;
+			}	
+		}
+#else			
+		if (ieee->iw_mode == IW_MODE_INFRA || ieee->iw_mode == IW_MODE_ADHOC) 
+			tcb_desc->RATRIndex = 0;
+#endif		
+	}
+#if 0
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
+	if(ieee->iw_mode == IW_MODE_ADHOC)
+		tcb_desc->RATRIndex = ratr_index;
+#endif
+#endif
+#ifdef _RTL8192_EXT_PATCH_
+	if(ieee->bUseRAMask){
+		if((ieee->iw_mode == IW_MODE_ADHOC) && (NULL != psta)){
+			short peer_AID = psta->aid;
+		
+			tcb_desc->macId =0;
+			if((peer_AID > 0) && (peer_AID < PEER_MAX_ASSOC))
+			{
+				tcb_desc->macId = peer_AID + 1;
+			}else{
+				tcb_desc->macId = 1;
+			}
+		}
+		else{
+			if((ieee->mode & WIRELESS_MODE_N_24G) || (ieee->mode & WIRELESS_MODE_N_5G))
+				tcb_desc->RATRIndex = RATR_INX_WIRELESS_NGB;
+			else if(ieee->mode & WIRELESS_MODE_G)
+				tcb_desc->RATRIndex = RATR_INX_WIRELESS_GB;
+			else if(ieee->mode & WIRELESS_MODE_B)
+				tcb_desc->RATRIndex = RATR_INX_WIRELESS_B;
+				
+			tcb_desc->macId = 0;
+		}
+	}
+#endif
+}
+
+u16 rtllib_query_seqnum(struct rtllib_device*ieee, struct sk_buff* skb, u8* dst)
+{
+	u16 seqnum = 0;
+
+	if (is_multicast_ether_addr(dst) || is_broadcast_ether_addr(dst))
+		return 0;
+	if (IsQoSDataFrame(skb->data)) 
+	{
+		PTX_TS_RECORD pTS = NULL;
+		if (!GetTs(ieee, (PTS_COMMON_INFO*)(&pTS), dst, skb->priority, TX_DIR, true))
+		{
+			return 0;
+		}
+		seqnum = pTS->TxCurSeq;
+		pTS->TxCurSeq = (pTS->TxCurSeq+1)%4096;
+		return seqnum;
+	}
+	return 0;
+}
+
+
+
+#ifdef ENABLE_AMSDU
+#if 0
+static void CB_DESC_DUMP(pcb_desc tcb, char* func)
+{
+	printk("\n%s",func);
+	printk("\n-------------------CB DESC DUMP ><------------------------");
+	printk("\npkt_size:\t %d", tcb->pkt_size);
+	printk("\nqueue_index:\t %d", tcb->queue_index);
+	printk("\nbMulticast:\t %d", tcb->bMulticast);
+	printk("\nbBroadcast:\t %d", tcb->bBroadcast);
+	printk("\nbPacketBw:\t %d", tcb->bPacketBW);
+	printk("\nbRTSEnable:\t %d", tcb->bRTSEnable);
+	printk("\nrts_rate:\t %d", tcb->rts_rate);
+	printk("\nbUseShortGI:\t %d", tcb->bUseShortGI);
+	printk("\nbAMSDU:\t %d", tcb->bAMSDU);
+	printk("\nFromAggrQ:\t %d", tcb->bFromAggrQ);
+	printk("\nRATRIndex:\t %d", tcb->RATRIndex);
+	printk("\ndata_rate:\t %d", tcb->data_rate);
+	printk("\n-------------------CB DESC DUMP <>------------------------\n");
+}
+#endif
+struct sk_buff *AMSDU_Aggregation(
+	struct rtllib_device 	*ieee,
+	struct sk_buff_head 		*pSendList
+	)
+{
+	struct sk_buff *	pSkb;
+	struct sk_buff * 	pAggrSkb;
+	u8		i;
+	u32		total_length = 0;
+	u32		skb_len, num_skb;
+	pcb_desc 	pcb;
+	u8 		amsdu_shdr[AMSDU_SUBHEADER_LEN];
+	u8		padding = 0;
+	u8		*p = NULL, *q=NULL;
+	u16		ether_type;
+
+	num_skb = skb_queue_len(pSendList);
+	if(num_skb == 0)
+		return NULL;
+	if(num_skb == 1)
+	{
+		pSkb = (struct sk_buff *)skb_dequeue(pSendList);
+		memset(pSkb->cb, 0, sizeof(pSkb->cb));
+		pcb = (pcb_desc)(pSkb->cb + MAX_DEV_ADDR_SIZE);
+		pcb->bFromAggrQ = true;
+		return pSkb;
+	}
+
+	total_length += sizeof(struct ethhdr);
+	for(i=0; i<num_skb; i++)	
+	{
+		pSkb= (struct sk_buff *)skb_dequeue(pSendList);
+		if(pSkb->len <= (ETH_ALEN*2))
+		{
+			dev_kfree_skb_any(pSkb);
+			continue;
+		}
+		skb_len = pSkb->len - ETH_ALEN*2 + SNAP_SIZE + AMSDU_SUBHEADER_LEN;
+		if(i < (num_skb-1))
+		{
+			skb_len += ((4-skb_len%4)==4)?0:(4-skb_len%4);
+		}
+		total_length += skb_len;
+		skb_queue_tail(pSendList, pSkb);
+	}
+	
+	pAggrSkb = dev_alloc_skb(total_length);
+	if(NULL == pAggrSkb)
+	{
+		skb_queue_purge(pSendList);
+		printk("%s: Can not alloc skb!\n", __FUNCTION__);
+		return NULL;
+	}
+	skb_put(pAggrSkb,total_length);
+	pAggrSkb->priority = pSkb->priority;
+
+	memset(pAggrSkb->cb, 0, sizeof(pAggrSkb->cb));
+	pcb = (pcb_desc)(pAggrSkb->cb + MAX_DEV_ADDR_SIZE);
+	pcb->bFromAggrQ = true;
+	pcb->bAMSDU = true;
+
+	memset(amsdu_shdr, 0, AMSDU_SUBHEADER_LEN);
+	p = pAggrSkb->data;
+	for(i=0; i<num_skb; i++)	
+	{
+		q = p;
+		pSkb= (struct sk_buff *)skb_dequeue(pSendList);
+		ether_type = ntohs(((struct ethhdr *)pSkb->data)->h_proto);
+
+		skb_len = pSkb->len - sizeof(struct ethhdr) + AMSDU_SUBHEADER_LEN + SNAP_SIZE + sizeof(u16);
+		if(i < (num_skb-1))
+		{
+			padding = ((4-skb_len%4)==4)?0:(4-skb_len%4);
+			skb_len += padding;
+		}
+		if(i == 0)
+		{
+			memcpy(p, pSkb->data, sizeof(struct ethhdr));
+			p += sizeof(struct ethhdr);
+		}
+		memcpy(amsdu_shdr, pSkb->data, (ETH_ALEN*2));
+		skb_pull(pSkb, sizeof(struct ethhdr));
+		*(u16*)(amsdu_shdr+ETH_ALEN*2) = ntohs(pSkb->len + SNAP_SIZE + sizeof(u16));
+		memcpy(p, amsdu_shdr, AMSDU_SUBHEADER_LEN);
+		p += AMSDU_SUBHEADER_LEN;
+
+		rtllib_put_snap(p, ether_type);
+		p += SNAP_SIZE + sizeof(u16);
+
+		memcpy(p, pSkb->data, pSkb->len);
+		p += pSkb->len;
+		if(padding > 0)
+		{
+			memset(p, 0, padding);
+			p += padding;
+			padding = 0;
+		}
+		dev_kfree_skb_any(pSkb);
+	}
+	
+	return pAggrSkb;
+}
+
+
+/* NOTE:
+	This function return a list of SKB which is proper to be aggregated. 
+	If no proper SKB is found to do aggregation, SendList will only contain the input SKB.
+*/
+u8 AMSDU_GetAggregatibleList(
+	struct rtllib_device *	ieee,
+	struct sk_buff *		pCurSkb,
+	struct sk_buff_head 		*pSendList,
+	u8				queue_index
+	)
+{
+	struct sk_buff 			*pSkb = NULL;
+	u16				nMaxAMSDUSize = 0;
+	u32				AggrSize = 0;
+	u32				nAggrSkbNum = 0;
+	u8 				padding = 0;
+	struct sta_info			*psta = NULL;	
+	u8 				*addr = (u8*)(pCurSkb->data);	
+	struct sk_buff_head *header;
+	struct sk_buff 	  *punlinkskb = NULL;	
+
+	padding = ((4-pCurSkb->len%4)==4)?0:(4-pCurSkb->len%4);
+	AggrSize = AMSDU_SUBHEADER_LEN + pCurSkb->len + padding;
+	skb_queue_tail(pSendList, pCurSkb);
+	nAggrSkbNum++;
+
+	if(ieee->iw_mode == IW_MODE_MASTER){	
+		psta = GetStaInfo(ieee, addr);
+		if(NULL != psta)
+			nMaxAMSDUSize = psta->htinfo.AMSDU_MaxSize;
+		else
+			return 1;
+	}else if(ieee->iw_mode == IW_MODE_ADHOC){
+		psta = GetStaInfo(ieee, addr);
+		if(NULL != psta)
+			nMaxAMSDUSize = psta->htinfo.AMSDU_MaxSize;
+		else
+			return 1;
+	}else{
+		nMaxAMSDUSize = ieee->pHTInfo->nCurrent_AMSDU_MaxSize;
+	}
+
+	if(ieee->pHTInfo->ForcedAMSDUMode == HT_AGG_FORCE_ENABLE)
+	{
+		nMaxAMSDUSize = ieee->pHTInfo->ForcedAMSDUMaxSize;
+	}
+	
+	header = (&ieee->skb_aggQ[queue_index]);
+	pSkb = header->next;
+	while(pSkb != (struct sk_buff*)header)
+	{
+		if((ieee->iw_mode == IW_MODE_MASTER) ||(ieee->iw_mode == IW_MODE_ADHOC))
+		{
+			if(memcmp(pCurSkb->data, pSkb->data, ETH_ALEN) != 0) 
+			{
+				pSkb = pSkb->next;
+				continue;				
+			}
+		}
+		if((AMSDU_SUBHEADER_LEN + pSkb->len + AggrSize < nMaxAMSDUSize) )
+		{
+			punlinkskb = pSkb;
+			pSkb = pSkb->next;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,14)
+			skb_unlink(punlinkskb, header);	
+#else
+			/*
+			 * __skb_unlink before linux2.6.14 does not use spinlock to protect list head.
+			 * add spinlock function manually. john,2008/12/03
+			 */
+			{
+				unsigned long flags;
+				spin_lock_irqsave(&ieee->lock, flags);
+				__skb_unlink(punlinkskb,header);
+				spin_unlock_irqrestore(&ieee->lock, flags);
+			}
+#endif
+			
+			padding = ((4-punlinkskb->len%4)==4)?0:(4-punlinkskb->len%4);
+			AggrSize += AMSDU_SUBHEADER_LEN + punlinkskb->len + padding;
+			skb_queue_tail(pSendList, punlinkskb);
+			nAggrSkbNum++;
+		}
+		else
+		{
+			if(!(AMSDU_SUBHEADER_LEN + pSkb->len + AggrSize < nMaxAMSDUSize))
+				;
+		
+			break; 
+		}
+	}
+	return nAggrSkbNum;
+}
+#endif
+static int wme_downgrade_ac(struct sk_buff *skb)
+{
+	switch (skb->priority) {
+		case 6:
+		case 7:
+			skb->priority = 5; /* VO -> VI */
+			return 0;
+		case 4:
+		case 5:
+			skb->priority = 3; /* VI -> BE */
+			return 0;
+		case 0:
+		case 3:
+			skb->priority = 1; /* BE -> BK */
+			return 0;
+		default:
+			return -1;
+	}
+}
+
+int rtllib_xmit_inter(struct sk_buff *skb, struct net_device *dev)
+{
+	struct rtllib_device *ieee = (struct rtllib_device *)netdev_priv_rsl(dev);
+	struct rtllib_txb *txb = NULL;
+	struct rtllib_hdr_3addrqos *frag_hdr;
+	int i, bytes_per_frag, nr_frags, bytes_last_frag, frag_size;
+	unsigned long flags;
+	struct net_device_stats *stats = &ieee->stats;
+	int ether_type = 0, encrypt;
+	int bytes, fc, qos_ctl = 0, hdr_len;
+	struct sk_buff *skb_frag;
+	struct rtllib_hdr_3addrqos header = { /* Ensure zero initialized */
+		.duration_id = 0,
+		.seq_ctl = 0,
+		.qos_ctl = 0
+	};
+	u8 dest[ETH_ALEN], src[ETH_ALEN];
+	int qos_actived = ieee->current_network.qos_data.active;
+	struct rtllib_crypt_data* crypt = NULL;
+	cb_desc *tcb_desc;
+	u8 bIsMulticast = false;
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE) 
+	struct sta_info *p_sta = NULL;
+#endif	
+	u8 IsAmsdu = false;
+#ifdef ENABLE_AMSDU	
+	u8 queue_index = WME_AC_BE;
+	cb_desc *tcb_desc_skb;
+	u8 bIsSptAmsdu = false;
+#endif	
+
+	bool	bdhcp =false;
+#ifndef _RTL8192_EXT_PATCH_
+#endif
+#ifdef RTL8192S_WAPI_SUPPORT
+	static u8 zero14[14] = {0};
+#endif
+	spin_lock_irqsave(&ieee->lock, flags);
+
+	/* If there is no driver handler to take the TXB, dont' bother
+	 * creating it... */
+	if ((!ieee->hard_start_xmit && !(ieee->softmac_features & IEEE_SOFTMAC_TX_QUEUE))||
+	   ((!ieee->softmac_data_hard_start_xmit && (ieee->softmac_features & IEEE_SOFTMAC_TX_QUEUE)))) {
+		printk(KERN_WARNING "%s: No xmit handler.\n",
+		       ieee->dev->name);
+		goto success;
+	}
+	
+
+	if(likely(ieee->raw_tx == 0)){
+		if (unlikely(skb->len < SNAP_SIZE + sizeof(u16))) {
+			printk(KERN_WARNING "%s: skb too small (%d).\n",
+			ieee->dev->name, skb->len);
+			goto success;
+		}
+#ifdef RTL8192S_WAPI_SUPPORT
+		if(memcmp(skb->data, zero14, sizeof(zero14))==0){
+			if(WapiSendWaiPacket(ieee, skb)< 0)
+				goto failed;
+			else{
+				spin_unlock_irqrestore(&ieee->lock, flags);
+				return 0;
+			}
+		}
+#endif
+		/* Save source and destination addresses */
+		memcpy(dest, skb->data, ETH_ALEN);
+		memcpy(src, skb->data+ETH_ALEN, ETH_ALEN);
+	
+#ifdef ENABLE_AMSDU	
+		if(ieee->iw_mode == IW_MODE_ADHOC)
+		{
+			p_sta = GetStaInfo(ieee, dest);
+			if(p_sta)	{
+				if(p_sta->htinfo.bEnableHT)
+					bIsSptAmsdu = true;
+			}
+		}else if(ieee->iw_mode == IW_MODE_INFRA) {
+			bIsSptAmsdu = true;
+		}else
+			bIsSptAmsdu = true;
+		bIsSptAmsdu = (bIsSptAmsdu && ieee->pHTInfo->bCurrent_AMSDU_Support && qos_actived);
+			
+		tcb_desc_skb = (pcb_desc)(skb->cb + MAX_DEV_ADDR_SIZE);  
+		if(bIsSptAmsdu) {
+			if(!tcb_desc_skb->bFromAggrQ)  
+			{
+				if(qos_actived)
+				{
+					queue_index = UP2AC(skb->priority);
+				} else {
+					queue_index = WME_AC_BE;
+				}
+
+				if ((skb_queue_len(&ieee->skb_aggQ[queue_index]) != 0)||
+#if defined RTL8192SE || defined RTL8192CE
+				   (ieee->get_nic_desc_num(ieee->dev,queue_index)) > 1||
+#else
+				   (!ieee->check_nic_enough_desc(ieee->dev,queue_index))||
+#endif
+				   (ieee->queue_stop) ||
+				   (ieee->amsdu_in_process)) 
+				{
+					/* insert the skb packet to the Aggregation queue */
+					skb_queue_tail(&ieee->skb_aggQ[queue_index], skb);
+					spin_unlock_irqrestore(&ieee->lock, flags);
+					return 0;
+				}
+			}
+			else  
+			{
+				if(tcb_desc_skb->bAMSDU)
+					IsAmsdu = true;
+				
+				ieee->amsdu_in_process = false;
+			}
+		}
+#endif	
+		memset(skb->cb, 0, sizeof(skb->cb));
+		ether_type = ntohs(((struct ethhdr *)skb->data)->h_proto);
+
+		if(ieee->iw_mode == IW_MODE_MONITOR)
+		{
+			txb = rtllib_alloc_txb(1, skb->len, GFP_ATOMIC);
+			if (unlikely(!txb)) {
+				printk(KERN_WARNING "%s: Could not allocate TXB\n",
+				ieee->dev->name);
+				goto failed;
+			}
+
+			txb->encrypted = 0;
+			txb->payload_size = skb->len;
+			memcpy(skb_put(txb->fragments[0],skb->len), skb->data, skb->len);
+
+			goto success;
+		}
+
+		if (skb->len > 282){
+			if (ETH_P_IP == ether_type) {
+				const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
+				if (IPPROTO_UDP == ip->protocol) {
+					struct udphdr *udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
+					if(((((u8 *)udp)[1] == 68) && (((u8 *)udp)[3] == 67)) ||
+					    ((((u8 *)udp)[1] == 67) && (((u8 *)udp)[3] == 68))) {
+						printk("DHCP pkt src port:%d, dest port:%d!!\n", ((u8 *)udp)[1],((u8 *)udp)[3]);
+
+						bdhcp = true;
+#ifdef _RTL8192_EXT_PATCH_
+						ieee->LPSDelayCnt = 100;
+#else
+						ieee->LPSDelayCnt = 100;
+#endif	
+					}
+				}
+			}else if(ETH_P_ARP == ether_type){
+				printk("=================>DHCP Protocol start tx ARP pkt!!\n");
+				bdhcp = true;
+				ieee->LPSDelayCnt = ieee->current_network.tim.tim_count;
+
+
+			}
+		}
+		
+		skb->priority = rtllib_classify(skb, IsAmsdu);
+#ifdef RTL8192S_WAPI_SUPPORT
+		if(ieee->WapiSupport && ieee->wapiInfo.bWapiEnable){
+			crypt = NULL;
+			encrypt = !(ether_type == ETH_P_PAE && ieee->ieee802_1x) &&
+				ieee->host_encrypt && ieee->WapiSupport && ieee->wapiInfo.bWapiEnable;
+		}
+		else{
+#endif	
+#ifdef _RTL8192_EXT_PATCH_
+		crypt = ieee->sta_crypt[ieee->tx_keyidx];
+#else
+		crypt = ieee->crypt[ieee->tx_keyidx];
+#endif	
+		encrypt = !(ether_type == ETH_P_PAE && ieee->ieee802_1x) &&
+			ieee->host_encrypt && crypt && crypt->ops;
+#ifdef RTL8192S_WAPI_SUPPORT
+		}
+#endif		
+		if (!encrypt && ieee->ieee802_1x &&
+		ieee->drop_unencrypted && ether_type != ETH_P_PAE) {
+			stats->tx_dropped++;
+			goto success;
+		}
+	#ifdef CONFIG_RTLLIB_DEBUG
+		if (crypt && !encrypt && ether_type == ETH_P_PAE) {
+			struct eapol *eap = (struct eapol *)(skb->data +
+				sizeof(struct ethhdr) - SNAP_SIZE - sizeof(u16));
+			RTLLIB_DEBUG_EAP("TX: IEEE 802.11 EAPOL frame: %s\n",
+				eap_get_type(eap->type));
+		}
+	#endif
+	
+		/* Advance the SKB to the start of the payload */
+		skb_pull(skb, sizeof(struct ethhdr));
+
+                /* Determine total amount of storage required for TXB packets */
+#ifdef ENABLE_AMSDU	
+		if(!IsAmsdu)
+			bytes = skb->len + SNAP_SIZE + sizeof(u16);
+		else
+			bytes = skb->len;
+#else
+		bytes = skb->len + SNAP_SIZE + sizeof(u16);
+#endif	
+
+		if (encrypt)
+			fc = RTLLIB_FTYPE_DATA | RTLLIB_FCTL_WEP;
+		else 
+			fc = RTLLIB_FTYPE_DATA; 
+		
+		if(qos_actived)
+			fc |= RTLLIB_STYPE_QOS_DATA; 
+		else
+			fc |= RTLLIB_STYPE_DATA;
+	
+#ifdef _RTL8192_EXT_PATCH_
+		if ((ieee->iw_mode == IW_MODE_INFRA) 
+			|| (ieee->iw_mode == IW_MODE_MESH) ) 
+#else
+		if (ieee->iw_mode == IW_MODE_INFRA) 
+#endif
+		{
+			fc |= RTLLIB_FCTL_TODS;
+			/* To DS: Addr1 = BSSID, Addr2 = SA,
+			Addr3 = DA */
+			memcpy(&header.addr1, ieee->current_network.bssid, ETH_ALEN);
+			memcpy(&header.addr2, &src, ETH_ALEN);
+			if(IsAmsdu)
+				memcpy(&header.addr3, ieee->current_network.bssid, ETH_ALEN);
+			else
+				memcpy(&header.addr3, &dest, ETH_ALEN);
+		} else if (ieee->iw_mode == IW_MODE_ADHOC) {
+			/* not From/To DS: Addr1 = DA, Addr2 = SA,
+			Addr3 = BSSID */
+			memcpy(&header.addr1, dest, ETH_ALEN);
+			memcpy(&header.addr2, src, ETH_ALEN);
+			memcpy(&header.addr3, ieee->current_network.bssid, ETH_ALEN);
+		}
+
+		bIsMulticast = is_broadcast_ether_addr(header.addr1) ||is_multicast_ether_addr(header.addr1);
+
+                header.frame_ctl = cpu_to_le16(fc);
+
+		/* Determine fragmentation size based on destination (multicast
+		* and broadcast are not fragmented) */
+		if (bIsMulticast) {
+			frag_size = MAX_FRAG_THRESHOLD;
+			qos_ctl |= QOS_CTL_NOTCONTAIN_ACK;
+		}
+		else {
+#ifdef ENABLE_AMSDU	
+			if(bIsSptAmsdu) {
+				if(ieee->iw_mode == IW_MODE_ADHOC) {
+					if(p_sta)
+						frag_size = p_sta->htinfo.AMSDU_MaxSize;
+					else
+						frag_size = ieee->pHTInfo->nAMSDU_MaxSize;
+				}
+				else
+					frag_size = ieee->pHTInfo->nAMSDU_MaxSize;
+				qos_ctl = 0;
+			}
+			else
+#endif	
+			{
+				frag_size = ieee->fts;
+				qos_ctl = 0;
+			}
+		}
+	
+		if(qos_actived)
+		{
+			hdr_len = RTLLIB_3ADDR_LEN + 2;
+
+                    /* in case we are a client verify acm is not set for this ac */
+                    while (unlikely(ieee->wmm_acm & (0x01 << skb->priority))) {
+                        printk("skb->priority = %x\n", skb->priority);
+                        if (wme_downgrade_ac(skb)) {
+                            break;
+                        }
+                        printk("converted skb->priority = %x\n", skb->priority);
+                    }
+                    qos_ctl |= skb->priority; 
+#ifdef ENABLE_AMSDU	
+			if(IsAmsdu)
+			{
+				qos_ctl |= QOS_CTL_AMSDU_PRESENT;
+			}
+                    header.qos_ctl = cpu_to_le16(qos_ctl);
+#else	
+                    header.qos_ctl = cpu_to_le16(qos_ctl & RTLLIB_QOS_TID);
+#endif
+		} else {
+			hdr_len = RTLLIB_3ADDR_LEN;		
+		}
+		/* Determine amount of payload per fragment.  Regardless of if
+		* this stack is providing the full 802.11 header, one will
+		* eventually be affixed to this fragment -- so we must account for
+		* it when determining the amount of payload space. */
+		bytes_per_frag = frag_size - hdr_len;
+		if (ieee->config &
+		(CFG_RTLLIB_COMPUTE_FCS | CFG_RTLLIB_RESERVE_FCS))
+			bytes_per_frag -= RTLLIB_FCS_LEN;
+	
+		/* Each fragment may need to have room for encryptiong pre/postfix */
+		if (encrypt) {
+#ifdef RTL8192S_WAPI_SUPPORT
+			if(ieee->WapiSupport && ieee->wapiInfo.bWapiEnable)
+				bytes_per_frag -= ieee->wapiInfo.extra_prefix_len +
+					ieee->wapiInfo.extra_postfix_len;
+			else
+#endif
+			bytes_per_frag -= crypt->ops->extra_prefix_len +
+				crypt->ops->extra_postfix_len;
+		}
+		/* Number of fragments is the total bytes_per_frag /
+		* payload_per_fragment */
+		nr_frags = bytes / bytes_per_frag;
+		bytes_last_frag = bytes % bytes_per_frag;
+		if (bytes_last_frag)
+			nr_frags++;
+		else
+			bytes_last_frag = bytes_per_frag;
+	
+		/* When we allocate the TXB we allocate enough space for the reserve
+		* and full fragment bytes (bytes_per_frag doesn't include prefix,
+		* postfix, header, FCS, etc.) */
+		txb = rtllib_alloc_txb(nr_frags, frag_size + ieee->tx_headroom, GFP_ATOMIC);
+		if (unlikely(!txb)) {
+			printk(KERN_WARNING "%s: Could not allocate TXB\n",
+			ieee->dev->name);
+			goto failed;
+		}
+		txb->encrypted = encrypt;
+		txb->payload_size = bytes;
+
+		if(qos_actived)
+		{
+			txb->queue_index = UP2AC(skb->priority);
+		} else {
+			txb->queue_index = WME_AC_BE;;
+		}
+
+		for (i = 0; i < nr_frags; i++) {
+			skb_frag = txb->fragments[i];
+			tcb_desc = (cb_desc *)(skb_frag->cb + MAX_DEV_ADDR_SIZE);
+#ifdef _RTL8192_EXT_PATCH_
+			tcb_desc->mesh_pkt = 0;
+			if(ieee->iw_mode == IW_MODE_ADHOC)
+				tcb_desc->badhoc = 1;
+			else
+				tcb_desc->badhoc = 0;
+#endif
+			if(qos_actived){
+				skb_frag->priority = skb->priority;
+				tcb_desc->queue_index =  UP2AC(skb->priority);
+			} else {
+				skb_frag->priority = WME_AC_BE;
+				tcb_desc->queue_index = WME_AC_BE;
+			}
+			skb_reserve(skb_frag, ieee->tx_headroom);
+
+			if (encrypt){
+				if (ieee->hwsec_active)
+					tcb_desc->bHwSec = 1;
+				else
+					tcb_desc->bHwSec = 0;
+#ifdef RTL8192S_WAPI_SUPPORT
+				if(ieee->WapiSupport && ieee->wapiInfo.bWapiEnable)
+					skb_reserve(skb_frag, ieee->wapiInfo.extra_prefix_len);
+				else
+#endif	
+				skb_reserve(skb_frag, crypt->ops->extra_prefix_len);
+			}
+			else
+			{
+				tcb_desc->bHwSec = 0;
+			}
+			frag_hdr = (struct rtllib_hdr_3addrqos *)skb_put(skb_frag, hdr_len);
+			memcpy(frag_hdr, &header, hdr_len);
+	
+			/* If this is not the last fragment, then add the MOREFRAGS
+			* bit to the frame control */
+			if (i != nr_frags - 1) {
+				frag_hdr->frame_ctl = cpu_to_le16(
+					fc | RTLLIB_FCTL_MOREFRAGS);
+				bytes = bytes_per_frag;
+		
+			} else {
+				/* The last fragment takes the remaining length */
+				bytes = bytes_last_frag;
+			}
+			if((qos_actived) && (!bIsMulticast))
+			{	
+				frag_hdr->seq_ctl = rtllib_query_seqnum(ieee, skb_frag, header.addr1); 
+				frag_hdr->seq_ctl = cpu_to_le16(frag_hdr->seq_ctl<<4 | i);
+			} else {
+				frag_hdr->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0]<<4 | i);
+			}
+			/* Put a SNAP header on the first fragment */
+#ifdef ENABLE_AMSDU	
+			if ((i == 0) && (!IsAmsdu)) 
+#else
+			if (i == 0) 
+#endif	
+			{
+				rtllib_put_snap(
+					skb_put(skb_frag, SNAP_SIZE + sizeof(u16)),
+					ether_type);
+				bytes -= SNAP_SIZE + sizeof(u16);
+			}
+	
+			memcpy(skb_put(skb_frag, bytes), skb->data, bytes);
+	
+			/* Advance the SKB... */
+			skb_pull(skb, bytes);
+	
+			/* Encryption routine will move the header forward in order
+			* to insert the IV between the header and the payload */
+			if (encrypt) {
+#ifdef RTL8192S_WAPI_SUPPORT
+				if(ieee->WapiSupport && ieee->wapiInfo.bWapiEnable){
+					if(SecSMS4HeaderFillIV(ieee, skb_frag) == 0){
+						SecSWSMS4Encryption(ieee, skb_frag);
+					} else {
+						spin_unlock_irqrestore(&ieee->lock, flags);
+						dev_kfree_skb_any(skb);
+						rtllib_txb_free(txb);
+						return 0;
+					}
+				}
+				else
+#endif		
+				{
+
+#ifdef _RTL8192_EXT_PATCH_
+				rtllib_encrypt_fragment(ieee, skb_frag, hdr_len, 0, 0);
+#else
+				rtllib_encrypt_fragment(ieee, skb_frag, hdr_len);
+#endif
+				}
+			}
+			if (ieee->config &
+			(CFG_RTLLIB_COMPUTE_FCS | CFG_RTLLIB_RESERVE_FCS))
+				skb_put(skb_frag, 4);
+		}
+
+		if((qos_actived) && (!bIsMulticast))
+		{
+		  if (ieee->seq_ctrl[UP2AC(skb->priority) + 1] == 0xFFF)
+			ieee->seq_ctrl[UP2AC(skb->priority) + 1] = 0;
+		  else
+			ieee->seq_ctrl[UP2AC(skb->priority) + 1]++;
+		} else {
+  		  if (ieee->seq_ctrl[0] == 0xFFF)
+			ieee->seq_ctrl[0] = 0;
+		  else
+			ieee->seq_ctrl[0]++;
+		}
+	}else{
+		if (unlikely(skb->len < sizeof(struct rtllib_hdr_3addr))) {
+			printk(KERN_WARNING "%s: skb too small (%d).\n",
+			ieee->dev->name, skb->len);
+			goto success;
+		}
+	
+		txb = rtllib_alloc_txb(1, skb->len, GFP_ATOMIC);
+		if(!txb){
+			printk(KERN_WARNING "%s: Could not allocate TXB\n",
+			ieee->dev->name);
+			goto failed;
+		}
+		
+		txb->encrypted = 0;
+		txb->payload_size = skb->len;
+		memcpy(skb_put(txb->fragments[0],skb->len), skb->data, skb->len);
+	}	
+
+ success:
+	if (txb)
+	{
+#if 1	
+		cb_desc *tcb_desc = (cb_desc *)(txb->fragments[0]->cb + MAX_DEV_ADDR_SIZE);
+		tcb_desc->bTxEnableFwCalcDur = 1;
+		tcb_desc->priority = skb->priority;
+
+		if(ether_type == ETH_P_PAE) {
+			if(ieee->pHTInfo->IOTAction & HT_IOT_ACT_WA_IOT_Broadcom)	
+			{
+				tcb_desc->data_rate = MgntQuery_TxRateExcludeCCKRates(ieee);
+				tcb_desc->bTxDisableRateFallBack = false;
+			}else{
+				tcb_desc->data_rate = ieee->basic_rate;
+				tcb_desc->bTxDisableRateFallBack = 1;
+			}
+			
+			
+			tcb_desc->RATRIndex = 7;                        
+			tcb_desc->bTxUseDriverAssingedRate = 1;
+		} else {
+			if (is_multicast_ether_addr(header.addr1))
+				tcb_desc->bMulticast = 1;
+			if (is_broadcast_ether_addr(header.addr1))
+				tcb_desc->bBroadcast = 1;
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE) 
+			if ( tcb_desc->bMulticast ||  tcb_desc->bBroadcast){
+				rtllib_txrate_selectmode(ieee, tcb_desc, p_sta);  
+				tcb_desc->data_rate = ieee->basic_rate;
+			}
+			else
+			{
+				if(ieee->iw_mode == IW_MODE_ADHOC)
+				{
+					u8 is_peer_shortGI_40M = 0;
+					u8 is_peer_shortGI_20M = 0;
+					u8 is_peer_BW_40M = 0;
+					p_sta = GetStaInfo(ieee, header.addr1);
+					if(NULL == p_sta)
+					{
+						rtllib_txrate_selectmode(ieee, tcb_desc, p_sta);
+						tcb_desc->data_rate = ieee->rate;
+					}
+					else
+					{
+						rtllib_txrate_selectmode(ieee, tcb_desc, p_sta);
+						tcb_desc->data_rate = CURRENT_RATE(p_sta->wireless_mode, p_sta->CurDataRate, p_sta->htinfo.HTHighestOperaRate);
+						is_peer_shortGI_40M = p_sta->htinfo.bCurShortGI40MHz;
+						is_peer_shortGI_20M = p_sta->htinfo.bCurShortGI20MHz;
+						is_peer_BW_40M = p_sta->htinfo.bCurTxBW40MHz;
+					}
+					rtllib_qurey_ShortPreambleMode(ieee, tcb_desc);
+					rtllib_tx_query_agg_cap(ieee, txb->fragments[0], tcb_desc);
+					rtllib_ibss_query_HTCapShortGI(ieee, tcb_desc,is_peer_shortGI_40M,is_peer_shortGI_20M); 
+					rtllib_ibss_query_BandwidthMode(ieee, tcb_desc,is_peer_BW_40M);
+					rtllib_query_protectionmode(ieee, tcb_desc, txb->fragments[0]);
+				}
+				else {
+					rtllib_txrate_selectmode(ieee, tcb_desc, p_sta); 
+					tcb_desc->data_rate = CURRENT_RATE(ieee->mode, ieee->rate, ieee->HTCurrentOperaRate);
+					if(bdhcp == true){
+						if(ieee->pHTInfo->IOTAction & HT_IOT_ACT_WA_IOT_Broadcom) {
+							tcb_desc->data_rate = MGN_1M;
+							tcb_desc->bTxDisableRateFallBack = false;
+						}else{
+							tcb_desc->data_rate = MGN_1M;
+							tcb_desc->bTxDisableRateFallBack = 1;
+						}
+
+						tcb_desc->RATRIndex = 7;
+						tcb_desc->bTxUseDriverAssingedRate = 1;
+						tcb_desc->bdhcp = 1;
+					}
+					rtllib_qurey_ShortPreambleMode(ieee, tcb_desc);
+					rtllib_tx_query_agg_cap(ieee, txb->fragments[0], tcb_desc);
+					rtllib_query_HTCapShortGI(ieee, tcb_desc); 
+					rtllib_query_BandwidthMode(ieee, tcb_desc);
+					rtllib_query_protectionmode(ieee, tcb_desc, txb->fragments[0]);
+					
+				}
+			}
+#else
+			rtllib_txrate_selectmode(ieee, tcb_desc);
+			if ( tcb_desc->bMulticast ||  tcb_desc->bBroadcast)
+				tcb_desc->data_rate = ieee->basic_rate;
+			else
+				tcb_desc->data_rate = CURRENT_RATE(ieee->mode, ieee->rate, ieee->HTCurrentOperaRate);
+
+			if(bdhcp == true){
+				if(ieee->pHTInfo->IOTAction & HT_IOT_ACT_WA_IOT_Broadcom)	
+				{
+					tcb_desc->data_rate = MgntQuery_TxRateExcludeCCKRates(ieee);
+					tcb_desc->bTxDisableRateFallBack = false;
+				}else{
+					tcb_desc->data_rate = MGN_1M;
+					tcb_desc->bTxDisableRateFallBack = 1;
+				}
+
+				
+				tcb_desc->RATRIndex = 7;
+				tcb_desc->bTxUseDriverAssingedRate = 1;
+				tcb_desc->bdhcp = 1;
+			}
+			
+			rtllib_qurey_ShortPreambleMode(ieee, tcb_desc);
+			rtllib_tx_query_agg_cap(ieee, txb->fragments[0], tcb_desc);
+			rtllib_query_HTCapShortGI(ieee, tcb_desc); 
+			rtllib_query_BandwidthMode(ieee, tcb_desc);
+			rtllib_query_protectionmode(ieee, tcb_desc, txb->fragments[0]);
+#endif
+		} 		
+#endif
+	}
+	spin_unlock_irqrestore(&ieee->lock, flags);
+	dev_kfree_skb_any(skb);
+	if (txb) {
+		if (ieee->softmac_features & IEEE_SOFTMAC_TX_QUEUE){
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18))
+			dev->stats.tx_packets++;
+			dev->stats.tx_bytes += txb->payload_size;
+#endif	
+			rtllib_softmac_xmit(txb, ieee);
+		}else{
+			if ((*ieee->hard_start_xmit)(txb, dev) == 0) {
+				stats->tx_packets++;
+				stats->tx_bytes += txb->payload_size;
+				return 0;
+			}
+			rtllib_txb_free(txb);
+		}
+	}
+
+	return 0;
+
+ failed:
+	spin_unlock_irqrestore(&ieee->lock, flags);
+	netif_stop_queue(dev);
+	stats->tx_errors++;
+	return 1;
+
+}
+int rtllib_xmit(struct sk_buff *skb, struct net_device *dev)
+{
+	memset(skb->cb, 0, sizeof(skb->cb));
+	return rtllib_xmit_inter(skb, dev);
+}
+
+
+#ifndef BUILT_IN_RTLLIB
+EXPORT_SYMBOL_RSL(rtllib_txb_free);
+#ifdef ENABLE_AMSDU
+EXPORT_SYMBOL_RSL(rtllib_xmit_inter);
+EXPORT_SYMBOL_RSL(AMSDU_Aggregation);
+EXPORT_SYMBOL_RSL(AMSDU_GetAggregatibleList);
+#endif
+#ifdef _RTL8192_EXT_PATCH_
+EXPORT_SYMBOL_RSL(rtllib_query_seqnum);
+EXPORT_SYMBOL_RSL(rtllib_alloc_txb);
+EXPORT_SYMBOL_RSL(rtllib_encrypt_fragment);
+#endif 
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/crypto_compat.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/crypto_compat.h
@@ -0,0 +1,88 @@
+/*
+ * Header file to maintain compatibility among different kernel versions.
+ *
+ * Copyright (c) 2004-2006  <lawrence_wang@realsil.com.cn>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation. See README and COPYING for
+ * more details.
+ */
+
+#include <linux/crypto.h>
+
+static inline int crypto_cipher_encrypt(struct crypto_tfm *tfm,
+                                        struct scatterlist *dst,
+                                        struct scatterlist *src,
+                                        unsigned int nbytes)
+{
+	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
+	return tfm->crt_cipher.cit_encrypt(tfm, dst, src, nbytes);
+}         
+
+
+static inline int crypto_cipher_decrypt(struct crypto_tfm *tfm,
+                                        struct scatterlist *dst,
+                                        struct scatterlist *src,
+                                        unsigned int nbytes)
+{
+	BUG_ON(crypto_tfm_alg_type(tfm) != CRYPTO_ALG_TYPE_CIPHER);
+	return tfm->crt_cipher.cit_decrypt(tfm, dst, src, nbytes);
+}
+
+#if 0 
+/*
+ *	crypto_free_tfm - Free crypto transform
+ *	@tfm: Transform to free
+ *
+ *	crypto_free_tfm() frees up the transform and any associated resources,
+ *	then drops the refcount on the associated algorithm.
+ */
+void crypto_free_tfm(struct crypto_tfm *tfm)
+{
+	struct crypto_alg *alg;
+	int size;
+
+	if (unlikely(!tfm))
+		return;
+
+	alg = tfm->__crt_alg;
+	size = sizeof(*tfm) + alg->cra_ctxsize;
+
+	if (alg->cra_exit)
+		alg->cra_exit(tfm);
+	crypto_exit_ops(tfm);
+	crypto_mod_put(alg);
+	memset(tfm, 0, size);
+	kfree(tfm);
+}
+
+#endif
+#if 1
+ struct crypto_tfm *crypto_alloc_tfm(const char *name, u32 flags)
+{
+	struct crypto_tfm *tfm = NULL;
+	int err;
+	printk("call crypto_alloc_tfm!!!\n");
+	do {
+		struct crypto_alg *alg;
+
+		alg = crypto_alg_mod_lookup(name, 0, CRYPTO_ALG_ASYNC);
+		err = PTR_ERR(alg);
+		if (IS_ERR(alg))
+			continue;
+
+		tfm = __crypto_alloc_tfm(alg, flags);
+		err = 0;
+		if (IS_ERR(tfm)) {
+			crypto_mod_put(alg);
+			err = PTR_ERR(tfm);
+			tfm = NULL;
+		}
+	} while (err == -EAGAIN && !signal_pending(current));
+
+	return tfm;
+}
+#endif
+
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/internal.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/internal.h
@@ -0,0 +1,130 @@
+/*
+ * Cryptographic API.
+ *
+ * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option) 
+ * any later version.
+ *
+ */
+#ifndef _CRYPTO_INTERNAL_H
+#define _CRYPTO_INTERNAL_H
+
+
+#include <linux/version.h>
+#include "rtl_crypto.h"
+#include <linux/mm.h>
+#include <linux/highmem.h>
+#include <linux/init.h>
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,12))
+#include <asm/hardirq.h>
+#else
+#include <linux/hardirq.h>
+#include <linux/sched.h>
+#endif
+#include <asm/kmap_types.h>
+
+#ifdef BUILT_IN_CRYPTO
+#ifdef CONFIG_CRYPTO_HMAC
+#undef CONFIG_CRYPTO_HMAC
+#endif
+
+#ifdef CONFIG_KMOD
+#undef CONFIG_KMOD
+#endif
+#endif /* BUILT_IN_CRYPTO */
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,20))
+#define list_for_each_entry(pos, head, member)				\
+	for (pos = list_entry((head)->next, typeof(*pos), member),	\
+		     prefetch(pos->member.next);			\
+	     &pos->member != (head); 					\
+	     pos = list_entry(pos->member.next, typeof(*pos), member),	\
+		     prefetch(pos->member.next))
+
+static inline void cond_resched(void)
+{
+	if (need_resched()) {
+		set_current_state(TASK_RUNNING);
+		schedule();
+	}
+}
+#endif
+
+extern enum km_type crypto_km_types[];
+
+static inline enum km_type crypto_kmap_type(int out)
+{
+	return crypto_km_types[(in_softirq() ? 2 : 0) + out];
+}
+
+static inline void *crypto_kmap(struct page *page, int out)
+{
+	return kmap_atomic(page, crypto_kmap_type(out));
+}
+
+static inline void crypto_kunmap(void *vaddr, int out)
+{
+	kunmap_atomic(vaddr, crypto_kmap_type(out));
+}
+
+static inline void crypto_yield(struct crypto_tfm *tfm)
+{
+	if (!in_softirq())
+		cond_resched();
+}
+
+static inline void *crypto_tfm_ctx(struct crypto_tfm *tfm)
+{
+	return (void *)&tfm[1];
+}
+
+struct crypto_alg *crypto_alg_lookup(const char *name);
+
+#ifdef CONFIG_KMOD
+void crypto_alg_autoload(const char *name);
+struct crypto_alg *crypto_alg_mod_lookup(const char *name);
+#else
+static inline struct crypto_alg *crypto_alg_mod_lookup(const char *name)
+{
+	return crypto_alg_lookup(name);
+}
+#endif
+
+#ifdef CONFIG_CRYPTO_HMAC
+int crypto_alloc_hmac_block(struct crypto_tfm *tfm);
+void crypto_free_hmac_block(struct crypto_tfm *tfm);
+#else
+static inline int crypto_alloc_hmac_block(struct crypto_tfm *tfm)
+{
+	return 0;
+}
+
+static inline void crypto_free_hmac_block(struct crypto_tfm *tfm)
+{ }
+#endif
+
+#ifdef CONFIG_PROC_FS
+void __init crypto_init_proc(void);
+#else
+static inline void crypto_init_proc(void)
+{ }
+#endif
+
+int crypto_init_digest_flags(struct crypto_tfm *tfm, u32 flags);
+int crypto_init_cipher_flags(struct crypto_tfm *tfm, u32 flags);
+int crypto_init_compress_flags(struct crypto_tfm *tfm, u32 flags);
+
+int crypto_init_digest_ops(struct crypto_tfm *tfm);
+int crypto_init_cipher_ops(struct crypto_tfm *tfm);
+int crypto_init_compress_ops(struct crypto_tfm *tfm);
+
+void crypto_exit_digest_ops(struct crypto_tfm *tfm);
+void crypto_exit_cipher_ops(struct crypto_tfm *tfm);
+void crypto_exit_compress_ops(struct crypto_tfm *tfm);
+
+#endif	/* _CRYPTO_INTERNAL_H */
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/api.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/api.c
@@ -0,0 +1,261 @@
+/*
+ * Scatterlist Cryptographic API.
+ *
+ * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
+ * Copyright (c) 2002 David S. Miller (davem@redhat.com)
+ *
+ * Portions derived from Cryptoapi, by Alexander Kjeldaas <astor@fast.no>
+ * and Nettle, by Niels Mé°ˆler.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option) 
+ * any later version.
+ *
+ */
+
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include "rtl_crypto.h"
+#include <linux/errno.h>
+#include <linux/rwsem.h>
+#include <linux/slab.h>
+#include "internal.h"
+
+LIST_HEAD(crypto_alg_list);
+DECLARE_RWSEM(crypto_alg_sem);
+
+static inline int crypto_alg_get(struct crypto_alg *alg)
+{
+#ifdef BUILT_IN_CRYPTO
+	return 1;
+#else
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+	return try_module_get(alg->cra_module);
+#else
+	return try_inc_mod_count(alg->cra_module);
+#endif			
+#endif
+}
+
+static inline void crypto_alg_put(struct crypto_alg *alg)
+{
+#ifndef BUILT_IN_CRYPTO
+	if (alg->cra_module)
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)		
+		module_put(alg->cra_module);
+#else
+		__MOD_DEC_USE_COUNT(alg->cra_module);
+#endif		
+#endif
+}
+
+struct crypto_alg *crypto_alg_lookup(const char *name)
+{
+	struct crypto_alg *q, *alg = NULL;
+
+	if (!name)
+		return NULL;
+	
+	down_read(&crypto_alg_sem);
+	
+	list_for_each_entry(q, &crypto_alg_list, cra_list) {
+		if (!(strcmp(q->cra_name, name))) {
+			if (crypto_alg_get(q))
+				alg = q;
+			break;
+		}
+	}
+	
+	up_read(&crypto_alg_sem);
+	return alg;
+}
+
+static int crypto_init_flags(struct crypto_tfm *tfm, u32 flags)
+{
+	tfm->crt_flags = 0;
+	
+	switch (crypto_tfm_alg_type(tfm)) {
+	case CRYPTO_ALG_TYPE_CIPHER:
+		return crypto_init_cipher_flags(tfm, flags);
+		
+	case CRYPTO_ALG_TYPE_DIGEST:
+		return crypto_init_digest_flags(tfm, flags);
+		
+	case CRYPTO_ALG_TYPE_COMPRESS:
+		return crypto_init_compress_flags(tfm, flags);
+	
+	default:
+		break;
+	}
+	
+	BUG();
+	return -EINVAL;
+}
+
+static int crypto_init_ops(struct crypto_tfm *tfm)
+{
+	switch (crypto_tfm_alg_type(tfm)) {
+	case CRYPTO_ALG_TYPE_CIPHER:
+		return crypto_init_cipher_ops(tfm);
+		
+	case CRYPTO_ALG_TYPE_DIGEST:
+		return crypto_init_digest_ops(tfm);
+		
+	case CRYPTO_ALG_TYPE_COMPRESS:
+		return crypto_init_compress_ops(tfm);
+	
+	default:
+		break;
+	}
+	
+	BUG();
+	return -EINVAL;
+}
+
+static void crypto_exit_ops(struct crypto_tfm *tfm)
+{
+	switch (crypto_tfm_alg_type(tfm)) {
+	case CRYPTO_ALG_TYPE_CIPHER:
+		crypto_exit_cipher_ops(tfm);
+		break;
+		
+	case CRYPTO_ALG_TYPE_DIGEST:
+		crypto_exit_digest_ops(tfm);
+		break;
+		
+	case CRYPTO_ALG_TYPE_COMPRESS:
+		crypto_exit_compress_ops(tfm);
+		break;
+	
+	default:
+		BUG();
+		
+	}
+}
+
+struct crypto_tfm *crypto_alloc_tfm(const char *name, u32 flags)
+{
+	struct crypto_tfm *tfm = NULL;
+	struct crypto_alg *alg;
+
+	alg = crypto_alg_mod_lookup(name);
+	if (alg == NULL)
+		goto out;
+	
+	tfm = kmalloc(sizeof(*tfm) + alg->cra_ctxsize, GFP_KERNEL);
+	if (tfm == NULL)
+		goto out_put;
+
+	memset(tfm, 0, sizeof(*tfm) + alg->cra_ctxsize);
+	
+	tfm->__crt_alg = alg;
+	
+	if (crypto_init_flags(tfm, flags))
+		goto out_free_tfm;
+		
+	if (crypto_init_ops(tfm)) {
+		crypto_exit_ops(tfm);
+		goto out_free_tfm;
+	}
+
+	goto out;
+
+out_free_tfm:
+	kfree(tfm);
+	tfm = NULL;
+out_put:
+	crypto_alg_put(alg);
+out:
+	return tfm;
+}
+
+void crypto_free_tfm(struct crypto_tfm *tfm)
+{
+	struct crypto_alg *alg = tfm->__crt_alg;
+	int size = sizeof(*tfm) + alg->cra_ctxsize;
+
+	crypto_exit_ops(tfm);
+	crypto_alg_put(alg);
+	memset(tfm, 0, size);
+	kfree(tfm);
+}
+
+int crypto_register_alg(struct crypto_alg *alg)
+{
+	int ret = 0;
+	struct crypto_alg *q;
+	
+	down_write(&crypto_alg_sem);
+	
+	list_for_each_entry(q, &crypto_alg_list, cra_list) {
+		if (!(strcmp(q->cra_name, alg->cra_name))) {
+			ret = -EEXIST;
+			goto out;
+		}
+	}
+	
+	list_add_tail(&alg->cra_list, &crypto_alg_list);
+out:	
+	up_write(&crypto_alg_sem);
+	return ret;
+}
+
+int crypto_unregister_alg(struct crypto_alg *alg)
+{
+	int ret = -ENOENT;
+	struct crypto_alg *q;
+	
+	BUG_ON(!alg->cra_module);
+	
+	down_write(&crypto_alg_sem);
+	list_for_each_entry(q, &crypto_alg_list, cra_list) {
+		if (alg == q) {
+			list_del(&alg->cra_list);
+			ret = 0;
+			goto out;
+		}
+	}
+out:	
+	up_write(&crypto_alg_sem);
+	return ret;
+}
+
+int crypto_alg_available(const char *name, u32 flags)
+{
+	int ret = 0;
+	struct crypto_alg *alg = crypto_alg_mod_lookup(name);
+	
+	if (alg) {
+		crypto_alg_put(alg);
+		ret = 1;
+	}
+	
+	return ret;
+}
+
+#ifndef BUILT_IN_CRYPTO
+static int __init init_crypto(void)
+{
+	printk(KERN_INFO "Initializing Cryptographic API\n");
+	crypto_init_proc();
+	return 0;
+}
+
+__initcall(init_crypto);
+
+
+/*
+EXPORT_SYMBOL_GPL(crypto_register_alg);
+EXPORT_SYMBOL_GPL(crypto_unregister_alg);
+EXPORT_SYMBOL_GPL(crypto_alloc_tfm);
+EXPORT_SYMBOL_GPL(crypto_free_tfm);
+EXPORT_SYMBOL_GPL(crypto_alg_available);
+*/
+EXPORT_SYMBOL_RSL(crypto_register_alg);
+EXPORT_SYMBOL_RSL(crypto_unregister_alg);
+EXPORT_SYMBOL_RSL(crypto_alloc_tfm);
+EXPORT_SYMBOL_RSL(crypto_free_tfm);
+EXPORT_SYMBOL_RSL(crypto_alg_available);
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/Makefile
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/Makefile
@@ -0,0 +1,214 @@
+NIC_SELECT = RTL8192SE
+
+KVER  := $(shell uname -r)
+MODDESTDIR := /lib/modules/$(KVER)/kernel/drivers/net/wireless/$(NIC_SELECT)
+
+CC = gcc
+ifneq ($(shell uname -r|cut -d. -f1,2), 2.4)
+EXTRA_CFLAGS += -I$(TOPDIR)/drivers/net/wireless
+EXTRA_CFLAGS += -O2
+
+#it will fail to compile in suse linux enterprise 10 sp2. This flag is to solve this problem.
+ifeq ($(shell uname -r | cut -d. -f1,2,3,4), 2.6.16.60-0)
+EXTRA_CFLAGS += -DOPENSUSE_SLED
+endif
+ifeq ($(NIC_SELECT), RTL8192SE)
+	EXTRA_CFLAGS += -DRTL8192S_DISABLE_FW_DM=0
+	EXTRA_CFLAGS += -DRTL8192SE
+	EXTRA_CFLAGS += -DENABLE_IPS
+	EXTRA_CFLAGS += -DENABLE_LPS
+endif
+ifeq ($(NIC_SELECT), RTL8192SU)
+	EXTRA_CFLAGS += -DRTL8192S_DISABLE_FW_DM=0
+	EXTRA_CFLAGS += -DRTL8192SU
+	EXTRA_CFLAGS += -DENABLE_IPS
+	EXTRA_CFLAGS += -DENABLE_LPS
+	EXTRA_CFLAGS += -DUSB_RX_AGGREGATION_SUPPORT
+	EXTRA_CFLAGS += -DTCP_CSUM_OFFLOAD_RX
+endif
+ifeq ($(NIC_SELECT), RTL8190P)
+	EXTRA_CFLAGS += -DRTL8190P
+endif
+ifeq ($(NIC_SELECT), RTL8192E)
+	EXTRA_CFLAGS += -DRTL8192E
+        EXTRA_CFLAGS += -DENABLE_IPS
+        EXTRA_CFLAGS += -DENABLE_LPS
+endif
+ifeq ($(NIC_SELECT),RTL8192U)
+EXTRA_CFLAGS += -DRTL8192U
+#EXTRA_CFLAGS += -DENABLE_AMSDU
+EXTRA_CFLAGS += -DUSB_TX_DRIVER_AGGREGATION_ENABLE
+EXTRA_CFLAGS += -DUSB_RX_AGGREGATION_SUPPORT
+
+# For RTK DMP platform
+#EXTRA_CFLAGS += -DRTK_DMP_PLATFORM
+#EXTRA_CFLAGS += -DWIFI_TEST
+
+endif
+ifeq ($(NIC_SELECT), RTL8191SE_MESH)
+AUTHTYPE=SAE
+#AUTHTYPE=OPEN
+EXTRA_CFLAGS += -DRTL8192SE \
+		-DRTL8192S_DISABLE_FW_DM=0 \
+		-D_RTL8192_EXT_PATCH_\
+		-DENABLE_IPS \
+		-DENABLE_LPS \
+		-DCUSTOMER_ID_INTEL_CMPC
+ifeq ($(AUTHTYPE),SAE)
+EXTRA_CFLAGS += -DMESH_ABBR_HANDSHK_SUPPORT\
+		-DMESH_ATH_2
+endif
+endif
+#EXTRA_CFLAGS += -DJOHN_NOCPY
+EXTRA_CFLAGS += -DTHOMAS_TURBO
+#flags to enable or disble 80211D feature
+EXTRA_CFLAGS += -DENABLE_DOT11D
+rtllib-rsl-objs := rtllib_rx.o \
+		      rtllib_softmac.o \
+		      rtllib_tx.o \
+		      rtllib_wx.o \
+		      rtllib_module.o \
+		      rtllib_softmac_wx.o\
+		      rtl819x_HTProc.o\
+		      rtl819x_TSProc.o\
+		      rtl819x_BAProc.o\
+		      dot11d.o
+
+rtllib_crypt-rsl-objs := rtllib_crypt.o
+rtllib_crypt_tkip-rsl-objs := rtllib_crypt_tkip.o
+rtllib_crypt_ccmp-rsl-objs := rtllib_crypt_ccmp.o
+rtllib_crypt_wep-rsl-objs := rtllib_crypt_wep.o
+
+obj-m +=rtllib-rsl.o
+obj-m +=rtllib_crypt-rsl.o
+obj-m +=rtllib_crypt_wep-rsl.o
+obj-m +=rtllib_crypt_tkip-rsl.o
+obj-m +=rtllib_crypt_ccmp-rsl.o
+
+KSRC := /lib/modules/$(KVER)/build
+INSTALL_PREFIX :=
+
+all: modules
+
+modules:
+	$(MAKE) -C $(KSRC) M=$(PWD) CC=$(CC) modules
+
+install: modules
+	rm -fr $(MODDESTDIR)
+	mkdir -p $(MODDESTDIR)
+	@install -p -m 644 rtllib_crypt-rsl.ko $(MODDESTDIR)
+	@install -p -m 644 rtllib_crypt_wep-rsl.ko $(MODDESTDIR)
+	@install -p -m 644 rtllib_crypt_tkip-rsl.ko $(MODDESTDIR)
+	@install -p -m 644 rtllib_crypt_ccmp-rsl.ko $(MODDESTDIR)
+	@install -p -m 644 rtllib-rsl.ko $(MODDESTDIR)
+	depmod -a
+uninstall:
+	rm -fr $(MODDESTDIR)
+	depmod -a 
+
+else
+LD := ld
+KSRC := /lib/modules/$(KVER)/build
+CONFIG_FILE := $(KSRC)/include/linux/autoconf.h
+
+CFLAGS += -DLINUX -D__KERNEL__ -DMODULE -O2 -pipe -Wall
+CFLAGS += -I$(KSRC)/include -I.
+#Kernel 2.4.31
+CFLAGS += -DMODVERSIONS -DEXPORT_SYMTAB -include $(KSRC)/include/linux/modversions.h
+#Kernel 2.4.20
+#CFLAGS += -D__NO_VERSION__ -DEXPORT_SYMTAB 
+CFLAGS += -DENABLE_DOT11D
+CFLAGS += -DTHOMAS_TURBO
+
+ifeq ($(NIC_SELECT),RTL8192U)
+CFLAGS += -DRTL8192U
+#EXTRA_CFLAGS += -DENABLE_AMSDU
+EXTRA_CFLAGS += -DUSB_TX_DRIVER_AGGREGATION_ENABLE
+EXTRA_CFLAGS += -DUSB_RX_AGGREGATION_SUPPORT
+endif
+ifeq ($(NIC_SELECT),RTL8192E)
+CFLAGS += -DRTL8192E
+endif
+ifeq ($(NIC_SELECT),RTL8190P)
+CFLAGS += -DRTL8190P
+endif
+ifeq ($(NIC_SELECT),RTL8192SE)
+CFLAGS += -DRTL8192SE
+CFLAGS += -DRTL8192S_DISABLE_FW_DM=0
+endif
+ifeq ($(NIC_SELECT), RTL8191SE_MESH)
+AUTHTYPE=SAE
+#AUTHTYPE=OPEN
+CFLAGS += -DRTL8192SE
+CFLAGS += -DRTL8192S_DISABLE_FW_DM=0
+CFLAGS += -D_RTL8192_EXT_PATCH_
+ifeq ($(AUTHTYPE),SAE)
+CFLAGS += -DMESH_ABBR_HANDSHK_SUPPORT\
+CFLAGS += -DMESH_ATH_2
+endif
+endif
+
+SMP := $(shell $(CC) $(MODCFLAGS) -E -dM $(CONFIG_FILE) | \
+   grep CONFIG_SMP | awk '{print $$3}')
+ifneq ($(SMP),1)
+   SMP := 0
+endif
+ifeq ($(SMP),1)
+   CFLAGS    += -D__SMP__
+endif
+
+#CFLAGS += -DJOHN_NOCPY
+
+OBJS := ${patsubst %.c, %.o, ${wildcard *.c}}
+all:${OBJS} rtllib_crypt-rsl.o michael_mic-rsl.o aes-rsl.o rtllib_crypt_wep-rsl.o rtllib_crypt_tkip-rsl.o rtllib_crypt_ccmp-rsl.o crypto-rsl.o rtllib-rsl.o
+
+rtllib_crypt-rsl.o: rtllib_crypt.o
+	mv $^ $@	
+
+michael_mic-rsl.o: michael_mic.o
+	mv $^ $@
+
+aes-rsl.o: aes.o
+	mv $^ $@
+
+rtllib_crypt_wep-rsl.o: rtllib_crypt_wep.o
+	mv $^ $@
+
+rtllib_crypt_tkip-rsl.o: rtllib_crypt_tkip.o
+	mv $^ $@
+
+rtllib_crypt_ccmp-rsl.o: rtllib_crypt_ccmp.o
+	mv $^ $@
+
+crypto-rsl.o: arc4.o api.o autoload.o cipher.o compress.o digest.o scatterwalk.o proc.o
+	$(LD) -r $^ -o $@
+
+rtllib-rsl.o: rtllib_rx.o rtllib_tx.o rtllib_wx.o rtllib_module.o rtllib_softmac_wx.o rtllib_softmac.o rtl819x_HTProc.o rtl819x_TSProc.o rtl819x_BAProc.o dot11d.o
+	$(LD) -r $^ -o $@
+install:
+	rm -fr $(MODDESTDIR)
+	mkdir -p $(MODDESTDIR)
+	@install -p -m 644 rtllib_crypt-rsl.o $(MODDESTDIR)
+	@install -p -m 644 crypto-rsl.o $(MODDESTDIR)
+	@install -p -m 644 michael_mic-rsl.o $(MODDESTDIR)
+	@install -p -m 644 aes-rsl.o $(MODDESTDIR)
+	@install -p -m 644 rtllib_crypt_wep-rsl.o $(MODDESTDIR)
+	@install -p -m 644 rtllib_crypt_tkip-rsl.o $(MODDESTDIR)
+	@install -p -m 644 rtllib_crypt_ccmp-rsl.o $(MODDESTDIR)
+	@install -p -m 644 rtllib-rsl.o $(MODDESTDIR)
+	/sbin/depmod -a ${shell uname -r}
+
+uninstall:
+	rm -fr $(MODDESTDIR)
+	/sbin/depmod -a ${shell uname -r}
+
+endif
+
+.PHONY: clean
+clean:
+	rm -fr *.mod.c *.mod *.o .*.cmd *.mod.* *.ko *.o *~
+	rm -rf .tmp_versions
+	rm -rf Module.symvers
+	rm -fr Module.markers
+	rm -fr modules.order
+	rm -fr tags
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/readme
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/readme
@@ -0,0 +1,162 @@
+What this layer should do
+
+- It mantain the old mechanism as alternative, so the
+  ipw2100 driver works with really few changes.
+- Encapsulate / Decapsulate rtllib packet 
+- Handle fragmentation 
+- Optionally provide an alterantive mechanism for netif queue stop/wake, 
+  so that the rtllib layer will pass one fragment per time instead of
+  one txb struct per time. so the driver can stop the queue in the middle
+  of a packet.
+- Provide two different TX interfaces for cards that can handle management
+  frames on one HW queue, and data on another, and for cards that have only
+  one HW queue  (the latter untested and very, very rough).
+- Optionally provide the logic for handling IBSS/MASTER/MONITOR/BSS modes
+  and for the channel, essid and wap get/set wireless extension requests.
+  so that the driver has only to change channel when the ieee stack tell it.
+- Optionally provide a scanning mechanism so that the driver has not to
+  worry about this, just implement the set channel calback and pass 
+  frames to the upper layer
+- Optionally provide the bss client protocol handshaking (just with open 
+  authentication)
+- Optionally provide the probe request send mechanism
+- Optionally provide the bss master mode logic to handle association
+  protocol (only open authentication) and probe responses.
+- SW wep encryption (with open authentication)
+- It collects some stats
+- It provides beacons to the card when it ask for them
+
+What this layer doesn't do (yet)
+- Perform shared authentication
+- Have full support for master mode (the AP should loop back in the air
+  frames from an associated client to another. This could be done easily
+  with few lines of code, and it is done in my previous version of the 
+  stach, but a table of association must be keept and a disassociation
+  policy must be decided and implemented.
+- Handle cleanly the full ieee 802.11 protocol. In AP mode it never
+  disassociate clients, and it is really prone to always allow access.
+  In bss client mode it is a bit rough with AP deauth and disassoc requests.
+- It has not any entry point to view the collected stats.
+- Altought it takes care of the card supported rates in the management frame
+  it sends, support for rate changing on TXed packet is not complete.
+- Give up once associated in bss client mode (it never detect a
+  signal loss condition to disassociate and restart scanning)
+- Provide a mechanism for enabling the TX in monitor mode, so
+  userspace programs can TX raw packets.
+- Provide a mechanism for cards that need that the SW take care of beacon
+  TX completely, in sense that the SW has to enqueue by itself beacons
+  to the card so it TX them (if any...)
+APIs
+
+Callback functions in the original stack has been mantained.
+following has been added (from rtllib.h)
+
+	/* Softmac-generated frames (mamagement) are TXed via this 
+	 * callback if the flag IEEE_SOFTMAC_SINGLE_QUEUE is 
+	 * not set. As some cards may have different HW queues that 
+	 * one might want to use for data and management frames
+	 * the option to have two callbacks might be useful.
+	 * This fucntion can't sleep.
+	 */
+	int (*softmac_hard_start_xmit)(struct sk_buff *skb,
+			       struct net_device *dev);
+	
+	/* used instead of hard_start_xmit (not softmac_hard_start_xmit)
+	 * if the IEEE_SOFTMAC_TX_QUEUE feature is used to TX data
+	 * frames. I the option IEEE_SOFTMAC_SINGLE_QUEUE is also set
+	 * then also management frames are sent via this callback.
+	 * This function can't sleep.
+	 */    
+	void (*softmac_data_hard_start_xmit)(struct sk_buff *skb,
+			       struct net_device *dev);
+
+	/* stops the HW queue for DATA frames. Useful to avoid
+	 * waste time to TX data frame when we are reassociating
+	 * This function can sleep.
+	 */	 
+	void (*data_hard_stop)(struct net_device *dev);
+	
+	/* OK this is complementar to data_poll_hard_stop */
+	void (*data_hard_resume)(struct net_device *dev);
+	
+	/* ask to the driver to retune the radio .
+	 * This function can sleep. the driver should ensure
+	 * the radio has been swithced before return.
+	 */
+	void (*set_chan)(struct net_device *dev,short ch);
+	
+	/* These are not used if the ieee stack takes care of
+	 * scanning (IEEE_SOFTMAC_SCAN feature set). 
+	 * In this case only the set_chan is used.
+	 *
+	 * The syncro version is similar to the start_scan but
+	 * does not return until all channels has been scanned.
+	 * this is called in user context and should sleep, 
+	 * it is called in a work_queue when swithcing to ad-hoc mode
+	 * or in behalf of iwlist scan when the card is associated 
+	 * and root user ask for a scan. 
+	 * the fucntion stop_scan should stop both the syncro and
+	 * background scanning and can sleep.
+	 * The fucntion start_scan should initiate the background 
+	 * scanning and can't sleep.
+	 */ 
+	void (*scan_syncro)(struct net_device *dev);
+	void (*start_scan)(struct net_device *dev);
+	void (*stop_scan)(struct net_device *dev);
+	
+	/* indicate the driver that the link state is changed
+	 * for example it may indicate the card is associated now.
+	 * Driver might be interested in this to apply RX filter 
+	 * rules or simply light the LINK led 
+	 */
+	void (*link_change)(struct net_device *dev);
+	
+Functions hard_data_[resume/stop] are optional and should not be used
+if the driver decides to uses data+management frames enqueue in a 
+single HQ queue (thus using just the softmac_hard_data_start_xmit 
+callback).
+ 
+Function that the driver can use are:
+
+rtllib_get_beacon             - this is called by the driver when
+                                   the HW needs a beacon.
+rtllib_softmac_start_protocol - this should normally be called in the
+                                   driver open function
+rtllib_softmac_stop_protocol  - the opposite of the above
+rtllib_wake_queue             - this is similar to netif_wake_queue 
+rtllib_reset_queue            - this throw away fragments pending(if any)
+rtllib_stop_queue             - this is similar to netif_stop_queue
+
+
+known BUGS:
+- When performing syncro scan (possiblily when swithcing to ad-hoc mode
+  and when running iwlist scan when associated) there is still an odd
+  behaviour.. I have not looked in this more accurately (yet).
+
+locking:
+locking is done by means of three structures.
+1- ieee->lock (by means of spin_[un]lock_irq[save/restore]
+2- ieee->wx_sem
+3- ieee->scan_sem
+
+the lock 1 is what protect most of the critical sections in the ieee stack.
+the lock 2 is used to avoid that more than one of the SET wireless extension 
+handlers (as well as start/stop protocol function) are running at the same time. 
+the lock 1 is used when we need to modify or read the shared data in the wx handlers. 
+In other words the lock 2 will prevent one SET action will run across another SET
+action (by make sleep the 2nd one) but allow GET actions, while the lock 1
+make atomic those little shared data access in both GET and SET operation.
+So get operation will be never be delayed really: they will never sleep..
+Furthermore in the top of some SET operations a flag is set before acquiring
+the lock. This is an help to make the previous running SET operation to
+finish faster if needed (just in case the second one will totally undo the
+first, so there is not need to complete the 1st really.. ).
+The background scanning mechaninsm is protected by the lock 1 except for the
+workqueue. this wq is here just to let the set_chan callback sleep (I thinked it
+might be appreciated by USB network card driver developer). In this case the lock 3 
+take its turn. 
+Thus the stop function needs both the locks.
+Funny in the syncro scan the lock 2 play its role (as both the syncro_scan
+function and the stop scan function are called with this semaphore held).
+
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/rtl819x_HT.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/rtl819x_HT.h
@@ -0,0 +1,489 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+#ifndef _RTL819XU_HTTYPE_H_
+#define _RTL819XU_HTTYPE_H_
+
+
+#define HT_OPMODE_NO_PROTECT		0
+#define HT_OPMODE_OPTIONAL		1
+#define HT_OPMODE_40MHZ_PROTECT	2
+#define HT_OPMODE_MIXED			3
+
+#define MIMO_PS_STATIC				0
+#define MIMO_PS_DYNAMIC			1
+#define MIMO_PS_NOLIMIT			3
+
+
+
+#define sHTCLng	4
+
+
+#define HT_SUPPORTED_MCS_1SS_BITMAP					0x000000ff
+#define HT_SUPPORTED_MCS_2SS_BITMAP					0x0000ff00
+#define HT_SUPPORTED_MCS_1SS_2SS_BITMAP			HT_MCS_1SS_BITMAP|HT_MCS_1SS_2SS_BITMAP
+
+
+typedef enum _HT_MCS_RATE{
+	HT_MCS0   = 0x00000001,
+	HT_MCS1   = 0x00000002,
+	HT_MCS2   = 0x00000004,
+	HT_MCS3   = 0x00000008,
+	HT_MCS4   = 0x00000010,
+	HT_MCS5   = 0x00000020,
+	HT_MCS6   = 0x00000040,
+	HT_MCS7   = 0x00000080,
+	HT_MCS8   = 0x00000100,
+	HT_MCS9   = 0x00000200,
+	HT_MCS10 = 0x00000400,
+	HT_MCS11 = 0x00000800,
+	HT_MCS12 = 0x00001000,
+	HT_MCS13 = 0x00002000,
+	HT_MCS14 = 0x00004000,
+	HT_MCS15 = 0x00008000,	
+}HT_MCS_RATE,*PHT_MCS_RATE;
+
+typedef enum _HT_CHANNEL_WIDTH{
+	HT_CHANNEL_WIDTH_20 = 0,
+	HT_CHANNEL_WIDTH_20_40 = 1,
+}HT_CHANNEL_WIDTH, *PHT_CHANNEL_WIDTH;
+
+typedef enum _HT_EXTCHNL_OFFSET{
+	HT_EXTCHNL_OFFSET_NO_EXT = 0,
+	HT_EXTCHNL_OFFSET_UPPER = 1,
+	HT_EXTCHNL_OFFSET_NO_DEF = 2,
+	HT_EXTCHNL_OFFSET_LOWER = 3,
+}HT_EXTCHNL_OFFSET, *PHT_EXTCHNL_OFFSET;
+
+typedef enum _CHNLOP{
+	CHNLOP_NONE = 0, 
+	CHNLOP_SCAN = 1, 
+	CHNLOP_SWBW = 2, 
+	CHNLOP_SWCHNL = 3, 
+} CHNLOP, *PCHNLOP;
+
+#define CHHLOP_IN_PROGRESS(_pHTInfo)	\
+		((_pHTInfo)->ChnlOp > CHNLOP_NONE) ? true : false
+
+/*
+typedef	union _HT_CAPABILITY{
+	u16	ShortData;
+	u8	CharData[2];
+	struct
+	{
+		u16	AdvCoding:1;
+		u16	ChlWidth:1;
+		u16	MimoPwrSave:2;
+		u16	GreenField:1;
+		u16	ShortGI20Mhz:1;
+		u16	ShortGI40Mhz:1;
+		u16	STBC:1;
+		u16	BeamForm:1;
+		u16	DelayBA:1;
+		u16	MaxAMSDUSize:1;
+		u16	DssCCk:1;
+		u16	PSMP:1;
+		u16	Rsvd:3;
+	}Field;
+}HT_CAPABILITY, *PHT_CAPABILITY;
+
+typedef	union _HT_CAPABILITY_MACPARA{
+	u8	ShortData;
+	u8	CharData[1];
+	struct
+	{
+		u8	MaxRxAMPDU:2;
+		u8	MPDUDensity:2;
+		u8	Rsvd:4;
+	}Field;
+}HT_CAPABILITY_MACPARA, *PHT_CAPABILITY_MACPARA;
+*/
+
+typedef enum _HT_ACTION{
+	ACT_RECOMMAND_WIDTH		= 0,
+	ACT_MIMO_PWR_SAVE 		= 1,
+	ACT_PSMP					= 2,
+	ACT_SET_PCO_PHASE		= 3,
+	ACT_MIMO_CHL_MEASURE	= 4,
+	ACT_RECIPROCITY_CORRECT	= 5,
+	ACT_MIMO_CSI_MATRICS		= 6,
+	ACT_MIMO_NOCOMPR_STEER	= 7,
+	ACT_MIMO_COMPR_STEER		= 8,
+	ACT_ANTENNA_SELECT		= 9,
+} HT_ACTION, *PHT_ACTION;
+
+
+typedef enum _HT_Bandwidth_40MHZ_Sub_Carrier{
+	SC_MODE_DUPLICATE = 0,
+	SC_MODE_LOWER = 1,
+	SC_MODE_UPPER = 2,
+	SC_MODE_FULL40MHZ = 3,
+}HT_BW40_SC_E;
+
+typedef	struct _HT_CAPABILITY_ELE{
+
+	u8	AdvCoding:1;
+	u8	ChlWidth:1;
+	u8	MimoPwrSave:2;
+	u8	GreenField:1;
+	u8	ShortGI20Mhz:1;
+	u8	ShortGI40Mhz:1;
+	u8	TxSTBC:1;
+	u8	RxSTBC:2;
+	u8	DelayBA:1;
+	u8	MaxAMSDUSize:1;
+	u8	DssCCk:1;
+	u8	PSMP:1;
+	u8	Rsvd1:1;
+	u8	LSigTxopProtect:1;
+
+	u8	MaxRxAMPDUFactor:2;
+	u8	MPDUDensity:3;
+	u8	Rsvd2:3;
+
+	u8	MCS[16];
+			
+
+	u16	ExtHTCapInfo;
+
+	u8	TxBFCap[4];
+
+	u8	ASCap;
+
+} __attribute__ ((packed)) HT_CAPABILITY_ELE, *PHT_CAPABILITY_ELE;
+
+
+typedef struct _HT_INFORMATION_ELE{
+	u8	ControlChl;
+
+	u8	ExtChlOffset:2;
+	u8	RecommemdedTxWidth:1;
+	u8	RIFS:1;
+	u8	PSMPAccessOnly:1;
+	u8	SrvIntGranularity:3;
+
+	u8	OptMode:2;
+	u8	NonGFDevPresent:1;
+	u8	Revd1:5;
+	u8	Revd2:8;
+
+	u8	Rsvd3:6;
+	u8	DualBeacon:1;
+	u8	DualCTSProtect:1;
+
+	u8	SecondaryBeacon:1;
+	u8	LSigTxopProtectFull:1;
+	u8	PcoActive:1;
+	u8	PcoPhase:1;
+	u8	Rsvd4:4;
+
+	u8	BasicMSC[16];
+} __attribute__ ((packed)) HT_INFORMATION_ELE, *PHT_INFORMATION_ELE;
+
+typedef struct _MIMOPS_CTRL{
+	u8	MimoPsEnable:1;
+	u8	MimoPsMode:1;
+	u8	Reserved:6;
+} MIMOPS_CTRL, *PMIMOPS_CTRL;
+
+typedef enum _HT_SPEC_VER{
+	HT_SPEC_VER_IEEE = 0,
+	HT_SPEC_VER_EWC = 1,
+}HT_SPEC_VER, *PHT_SPEC_VER;
+
+typedef enum _HT_AGGRE_MODE_E{
+	HT_AGG_AUTO = 0,
+	HT_AGG_FORCE_ENABLE = 1,
+	HT_AGG_FORCE_DISABLE = 2,
+}HT_AGGRE_MODE_E, *PHT_AGGRE_MODE_E;
+
+
+typedef struct _RT_HIGH_THROUGHPUT{
+	u8				bEnableHT;
+	u8				bCurrentHTSupport;
+
+	u8				bRegBW40MHz;				
+	u8				bCurBW40MHz;				
+
+	u8				bRegShortGI40MHz;			
+	u8				bCurShortGI40MHz;			
+
+	u8				bRegShortGI20MHz;			
+	u8				bCurShortGI20MHz;			
+
+	u8				bRegSuppCCK;				
+	u8				bCurSuppCCK;				
+
+	HT_SPEC_VER			ePeerHTSpecVer;
+	
+
+	HT_CAPABILITY_ELE	SelfHTCap;		
+	HT_INFORMATION_ELE	SelfHTInfo;		
+
+	u8				PeerHTCapBuf[32];
+	u8				PeerHTInfoBuf[32];
+
+
+	u8				bAMSDU_Support;			
+	u16				nAMSDU_MaxSize;			
+	u8				bCurrent_AMSDU_Support;	
+	u16				nCurrent_AMSDU_MaxSize;	
+#ifdef _RTL8192_EXT_PATCH_
+	u8				bCurrent_Mesh_AMSDU_Support;	
+#endif	
+
+	u8				bAMPDUEnable;				
+	u8				bCurrentAMPDUEnable;		
+	u8				AMPDU_Factor;				
+	u8				CurrentAMPDUFactor;		
+	u8				MPDU_Density;				
+	u8				CurrentMPDUDensity;			
+#ifdef _RTL8192_EXT_PATCH_
+	u8				bCurrentMeshAMPDUEnable;		
+#endif	
+
+	HT_AGGRE_MODE_E	ForcedAMPDUMode;
+	u8				ForcedAMPDUFactor;
+	u8				ForcedMPDUDensity;
+
+	HT_AGGRE_MODE_E	ForcedAMSDUMode;
+	u16				ForcedAMSDUMaxSize;
+
+	u8				bForcedShortGI;
+
+	u8				CurrentOpMode;
+
+	u8				SelfMimoPs;
+	u8				PeerMimoPs;
+	
+	HT_EXTCHNL_OFFSET	CurSTAExtChnlOffset;
+	u8				bCurTxBW40MHz;	
+	u8				PeerBandwidth;
+
+	u8				bSwBwInProgress;
+	CHNLOP				ChnlOp; 
+	u8				SwBwStep;
+
+	u8				bRegRT2RTAggregation;
+	u8				RT2RT_HT_Mode;	
+	u8				bCurrentRT2RTAggregation;
+	u8				bCurrentRT2RTLongSlotTime;
+	u8				szRT2RTAggBuffer[10];
+
+	u8				bRegRxReorderEnable;
+	u8				bCurRxReorderEnable;
+	u8				RxReorderWinSize;
+	u8				RxReorderPendingTime;
+	u16				RxReorderDropCounter;
+
+#ifdef USB_TX_DRIVER_AGGREGATION_ENABLE
+	u8				UsbTxAggrNum;
+#endif
+#ifdef USB_RX_AGGREGATION_SUPPORT
+	u8				UsbRxFwAggrEn;
+	u8				UsbRxFwAggrPageNum;
+	u8				UsbRxFwAggrPacketNum;
+	u8				UsbRxFwAggrTimeout;
+	u8				UsbRxPageSize;
+#endif
+
+	u8				bIsPeerBcm;
+
+	u8				IOTPeer;
+	u32				IOTAction;
+	u8				IOTRaFunc;
+
+	u8	bWAIotBroadcom;
+	u8	WAIotTH;
+
+#ifdef RTL8192CE
+	u8				bRDGEnable;
+#endif
+} __attribute__ ((packed)) RT_HIGH_THROUGHPUT, *PRT_HIGH_THROUGHPUT;
+
+
+
+typedef struct _RT_HTINFO_STA_ENTRY{
+	u8			bEnableHT;
+	
+	u8			bSupportCck;
+	
+	u16			AMSDU_MaxSize;
+	
+	u8			AMPDU_Factor;
+	u8			MPDU_Density;
+	
+	u8			HTHighestOperaRate;
+
+	u8			bBw40MHz;
+
+	u8			bCurTxBW40MHz;
+
+	u8			bCurShortGI20MHz;
+
+	u8			bCurShortGI40MHz;
+
+	u8			MimoPs;
+
+	u8			McsRateSet[16];
+	
+	u8                      bCurRxReorderEnable;
+
+	u16                     nAMSDU_MaxSize;
+	
+}RT_HTINFO_STA_ENTRY, *PRT_HTINFO_STA_ENTRY;
+
+
+
+
+
+
+typedef struct _BSS_HT{
+
+	u8				bdSupportHT;
+
+	u8					bdHTCapBuf[32];
+	u16					bdHTCapLen;
+	u8					bdHTInfoBuf[32];
+	u16					bdHTInfoLen;
+
+	HT_SPEC_VER				bdHTSpecVer;
+	HT_CHANNEL_WIDTH			bdBandWidth;
+
+	u8					bdRT2RTAggregation;
+	u8					bdRT2RTLongSlotTime;
+	u8					RT2RT_HT_Mode;
+	u8					bdHT1R;
+} __attribute__ ((packed)) BSS_HT, *PBSS_HT;
+
+typedef struct _MIMO_RSSI{
+	u32	EnableAntenna;
+	u32	AntennaA;
+	u32 	AntennaB;
+	u32 	AntennaC;
+	u32 	AntennaD;
+	u32	Average;
+}MIMO_RSSI, *PMIMO_RSSI;
+
+typedef struct _MIMO_EVM{
+	u32	EVM1;
+	u32    EVM2;
+}MIMO_EVM, *PMIMO_EVM;
+
+typedef struct _FALSE_ALARM_STATISTICS{
+	u32	Cnt_Parity_Fail;
+	u32	Cnt_Rate_Illegal;
+	u32	Cnt_Crc8_fail;
+	u32	Cnt_Mcs_fail;
+	u32	Cnt_Ofdm_fail;
+	u32	Cnt_Cck_fail;
+	u32	Cnt_all;
+}FALSE_ALARM_STATISTICS, *PFALSE_ALARM_STATISTICS;
+
+
+extern u8 MCS_FILTER_ALL[16];
+extern u8 MCS_FILTER_1SS[16];
+
+#define PICK_RATE(_nLegacyRate, _nMcsRate)	\
+		(_nMcsRate==0)?(_nLegacyRate&0x7f):(_nMcsRate)
+#define	LEGACY_WIRELESS_MODE	IEEE_MODE_MASK
+
+#define CURRENT_RATE(WirelessMode, LegacyRate, HTRate)	\
+					((WirelessMode & (LEGACY_WIRELESS_MODE))!=0)?\
+						(LegacyRate):\
+						(PICK_RATE(LegacyRate, HTRate))
+
+
+
+#define	RATE_ADPT_1SS_MASK 		0xFF
+#define	RATE_ADPT_2SS_MASK	   	0xF0 
+#define	RATE_ADPT_MCS32_MASK		0x01
+
+#define 	IS_11N_MCS_RATE(rate)		(rate&0x80)
+
+typedef enum _HT_AGGRE_SIZE{
+	HT_AGG_SIZE_8K = 0,
+	HT_AGG_SIZE_16K = 1,
+	HT_AGG_SIZE_32K = 2,
+	HT_AGG_SIZE_64K = 3,
+}HT_AGGRE_SIZE_E, *PHT_AGGRE_SIZE_E;
+
+typedef enum _HT_IOT_PEER
+{
+	HT_IOT_PEER_UNKNOWN = 0,
+	HT_IOT_PEER_REALTEK = 1,
+	HT_IOT_PEER_REALTEK_92SE = 2,
+	HT_IOT_PEER_BROADCOM = 3,
+	HT_IOT_PEER_RALINK = 4,
+	HT_IOT_PEER_ATHEROS = 5,
+	HT_IOT_PEER_CISCO= 6,
+	HT_IOT_PEER_MARVELL=7,
+	HT_IOT_PEER_92U_SOFTAP = 8,
+	HT_IOT_PEER_SELF_SOFTAP = 9,
+	HT_IOT_PEER_MAX = 10,
+}HT_IOT_PEER_E, *PHTIOT_PEER_E;
+
+typedef enum _HT_IOT_ACTION{
+	HT_IOT_ACT_TX_USE_AMSDU_4K = 0x00000001,
+	HT_IOT_ACT_TX_USE_AMSDU_8K = 0x00000002,	
+	HT_IOT_ACT_DISABLE_MCS14 = 0x00000004,
+	HT_IOT_ACT_DISABLE_MCS15 = 0x00000008,
+	HT_IOT_ACT_DISABLE_ALL_2SS = 0x00000010,
+	HT_IOT_ACT_DISABLE_EDCA_TURBO = 0x00000020,
+	HT_IOT_ACT_MGNT_USE_CCK_6M = 0x00000040,
+	HT_IOT_ACT_CDD_FSYNC = 0x00000080,
+	HT_IOT_ACT_PURE_N_MODE = 0x00000100,
+	HT_IOT_ACT_FORCED_CTS2SELF = 0x00000200,
+	HT_IOT_ACT_FORCED_RTS = 0x00000400,
+	HT_IOT_ACT_AMSDU_ENABLE = 0x00000800,
+	HT_IOT_ACT_REJECT_ADDBA_REQ = 0x00001000,
+	HT_IOT_ACT_ALLOW_PEER_AGG_ONE_PKT = 0x00002000,
+	HT_IOT_ACT_EDCA_BIAS_ON_RX = 0x00004000,
+
+	HT_IOT_ACT_HYBRID_AGGREGATION = 0x00010000,
+	HT_IOT_ACT_DISABLE_SHORT_GI = 0x00020000,
+	HT_IOT_ACT_DISABLE_HIGH_POWER = 0x00040000,
+	HT_IOT_ACT_DISABLE_TX_40_MHZ = 0x00080000,
+	HT_IOT_ACT_TX_NO_AGGREGATION = 0x00100000,
+	HT_IOT_ACT_DISABLE_TX_2SS = 0x00200000,
+	
+        HT_IOT_ACT_MID_HIGHPOWER = 0x00400000,
+        HT_IOT_ACT_NULL_DATA_POWER_SAVING = 0x00800000,
+        
+        HT_IOT_ACT_DISABLE_CCK_RATE = 0x01000000,
+	HT_IOT_ACT_FORCED_ENABLE_BE_TXOP = 0x02000000,
+	HT_IOT_ACT_WA_IOT_Broadcom = 0x04000000,
+}HT_IOT_ACTION_E, *PHT_IOT_ACTION_E;
+
+typedef enum _HT_IOT_RAFUNC{
+	HT_IOT_RAFUNC_DISABLE_ALL = 0x00,
+	HT_IOT_RAFUNC_PEER_1R = 0x01,
+	HT_IOT_RAFUNC_TX_AMSDU = 0x02,
+}HT_IOT_RAFUNC, *PHT_IOT_RAFUNC;
+
+typedef enum _RT_HT_CAP{
+	RT_HT_CAP_USE_TURBO_AGGR = 0x01,
+	RT_HT_CAP_USE_LONG_PREAMBLE = 0x02,
+	RT_HT_CAP_USE_AMPDU = 0x04,
+	RT_HT_CAP_USE_WOW = 0x8,	
+	RT_HT_CAP_USE_SOFTAP = 0x10,	
+	RT_HT_CAP_USE_92SE = 0x20,
+}RT_HT_CAPBILITY, *PRT_HT_CAPBILITY;
+
+#endif 
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/rtllib_wx.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/rtllib_wx.c
@@ -0,0 +1,1346 @@
+/******************************************************************************
+
+  Copyright(c) 2004 Intel Corporation. All rights reserved.
+
+  Portions of this file are based on the WEP enablement code provided by the
+  Host AP project hostap-drivers v0.1.3
+  Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
+  <jkmaline@cc.hut.fi>
+  Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms of version 2 of the GNU General Public License as
+  published by the Free Software Foundation.
+
+  This program is distributed in the hope that it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc., 59
+  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
+
+  The full GNU General Public License is included in this distribution in the
+  file called LICENSE.
+
+  Contact Information:
+  James P. Ketrenos <ipw2100-admin@linux.intel.com>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+******************************************************************************/
+#include <linux/wireless.h>
+#include <linux/version.h>
+#include <linux/kmod.h>
+#include <linux/module.h>
+
+#include "rtllib.h"
+#if 0
+static const char *rtllib_modes[] = {
+	"?", "a", "b", "ab", "g", "ag", "bg", "abg"
+};
+#endif
+struct modes_unit {
+	char *mode_string;
+	int mode_size;
+};
+static struct modes_unit rtllib_modes[] = {
+	{"a",1}, 
+	{"b",1}, 
+	{"g",1}, 
+	{"?",1},
+#ifdef _RTL8192_EXT_PATCH_
+	{"n",5},
+	{"n",4},
+#else
+	{"N-24G",5},
+	{"N-5G",4},
+#endif
+};
+
+#define MAX_CUSTOM_LEN 64
+static inline char *rtl819x_translate_scan(struct rtllib_device *ieee,
+ 					   char *start, char *stop,
+					   struct rtllib_network *network,
+                                           struct iw_request_info *info)
+{
+	char custom[MAX_CUSTOM_LEN];
+	char proto_name[IFNAMSIZ];
+	char *pname = proto_name;
+	char *p;
+	struct iw_event iwe;
+	int i, j;
+	u16 max_rate, rate;
+	static u8	EWC11NHTCap[] = {0x00, 0x90, 0x4c, 0x33};
+
+	/* First entry *MUST* be the AP MAC address */
+	iwe.cmd = SIOCGIWAP;
+	iwe.u.ap_addr.sa_family = ARPHRD_ETHER;
+	memcpy(iwe.u.ap_addr.sa_data, network->bssid, ETH_ALEN);
+	start = iwe_stream_add_event_rsl(info, start, stop, &iwe, IW_EV_ADDR_LEN);
+	/* Remaining entries will be displayed in the order we provide them */
+
+	/* Add the ESSID */
+	iwe.cmd = SIOCGIWESSID;
+	iwe.u.data.flags = 1;
+	if(network->ssid_len > 0){
+		iwe.u.data.length = min(network->ssid_len, (u8)32);
+		start = iwe_stream_add_point_rsl(info, start, stop, &iwe, network->ssid);
+        }else if(network->hidden_ssid_len == 0){
+		iwe.u.data.length = sizeof("<hidden>");
+		start = iwe_stream_add_point_rsl(info, start, stop, &iwe, "<hidden>");
+        }else {
+		iwe.u.data.length = min(network->hidden_ssid_len, (u8)32);
+		start = iwe_stream_add_point_rsl(info, start, stop, &iwe, network->hidden_ssid);
+	}
+	/* Add the protocol name */
+	iwe.cmd = SIOCGIWNAME;
+	for(i=0; i<(sizeof(rtllib_modes)/sizeof(rtllib_modes[0])); i++) {
+		if(network->mode&(1<<i)) {
+			sprintf(pname,rtllib_modes[i].mode_string,rtllib_modes[i].mode_size);
+			pname +=rtllib_modes[i].mode_size;
+		}	
+	}
+	*pname = '\0';
+	snprintf(iwe.u.name, IFNAMSIZ, "IEEE802.11%s", proto_name);
+        start = iwe_stream_add_event_rsl(info, start, stop, &iwe, IW_EV_CHAR_LEN);
+        /* Add mode */
+        iwe.cmd = SIOCGIWMODE;
+        if (network->capability &
+	    (WLAN_CAPABILITY_ESS | WLAN_CAPABILITY_IBSS)) {
+		if (network->capability & WLAN_CAPABILITY_ESS)
+			iwe.u.mode = IW_MODE_MASTER;
+		else
+			iwe.u.mode = IW_MODE_ADHOC;
+		start = iwe_stream_add_event_rsl(info, start, stop, &iwe, IW_EV_UINT_LEN);
+        }
+
+        /* Add frequency/channel */
+	iwe.cmd = SIOCGIWFREQ;
+/*	iwe.u.freq.m = rtllib_frequency(network->channel, network->mode);
+	iwe.u.freq.e = 3; */
+	iwe.u.freq.m = network->channel;
+	iwe.u.freq.e = 0;
+	iwe.u.freq.i = 0;
+	start = iwe_stream_add_event_rsl(info, start, stop, &iwe, IW_EV_FREQ_LEN);
+
+	/* Add encryption capability */
+	iwe.cmd = SIOCGIWENCODE;
+	if (network->capability & WLAN_CAPABILITY_PRIVACY)
+		iwe.u.data.flags = IW_ENCODE_ENABLED | IW_ENCODE_NOKEY;
+	else
+		iwe.u.data.flags = IW_ENCODE_DISABLED;
+	iwe.u.data.length = 0;
+	start = iwe_stream_add_point_rsl(info, start, stop, &iwe, network->ssid);
+	/* Add basic and extended rates */
+	max_rate = 0;
+	p = custom;
+	p += snprintf(p, MAX_CUSTOM_LEN - (p - custom), " Rates (Mb/s): ");
+	for (i = 0, j = 0; i < network->rates_len; ) {
+		if (j < network->rates_ex_len &&
+		    ((network->rates_ex[j] & 0x7F) <
+		     (network->rates[i] & 0x7F)))
+			rate = network->rates_ex[j++] & 0x7F;
+		else
+			rate = network->rates[i++] & 0x7F;
+		if (rate > max_rate)
+			max_rate = rate;
+		p += snprintf(p, MAX_CUSTOM_LEN - (p - custom),
+			      "%d%s ", rate >> 1, (rate & 1) ? ".5" : "");
+	}
+	for (; j < network->rates_ex_len; j++) {
+		rate = network->rates_ex[j] & 0x7F;
+		p += snprintf(p, MAX_CUSTOM_LEN - (p - custom),
+			      "%d%s ", rate >> 1, (rate & 1) ? ".5" : "");
+		if (rate > max_rate)
+			max_rate = rate;
+	}
+	
+	if (network->mode >= IEEE_N_24G)
+	{
+		PHT_CAPABILITY_ELE ht_cap = NULL;
+		bool is40M = false, isShortGI = false;
+		u8 max_mcs = 0;
+		if (!memcmp(network->bssht.bdHTCapBuf, EWC11NHTCap, 4))
+			ht_cap = (PHT_CAPABILITY_ELE)&network->bssht.bdHTCapBuf[4];
+		else
+			ht_cap = (PHT_CAPABILITY_ELE)&network->bssht.bdHTCapBuf[0];
+		is40M = (ht_cap->ChlWidth)?1:0;
+		isShortGI = (ht_cap->ChlWidth)?
+						((ht_cap->ShortGI40Mhz)?1:0):
+						((ht_cap->ShortGI20Mhz)?1:0);
+		
+		max_mcs = HTGetHighestMCSRate(ieee, ht_cap->MCS, MCS_FILTER_ALL);
+		rate = MCS_DATA_RATE[is40M][isShortGI][max_mcs&0x7f];
+		if (rate > max_rate)
+			max_rate = rate;	
+	}
+#if 0	
+	printk("max rate:%d ===basic rate:\n", max_rate);
+	for (i=0;i<network->rates_len;i++)
+		printk(" %x", network->rates[i]);
+	printk("\n=======extend rate\n");
+	for (i=0; i<network->rates_ex_len; i++)
+		printk(" %x", network->rates_ex[i]);
+	printk("\n");
+#endif
+	iwe.cmd = SIOCGIWRATE;
+	iwe.u.bitrate.fixed = iwe.u.bitrate.disabled = 0;
+	iwe.u.bitrate.value = max_rate * 500000;
+	start = iwe_stream_add_event_rsl(info, start, stop, &iwe,
+				     IW_EV_PARAM_LEN);
+	iwe.cmd = IWEVCUSTOM;
+	iwe.u.data.length = p - custom;
+	if (iwe.u.data.length)
+		start = iwe_stream_add_point_rsl(info, start, stop, &iwe, custom);
+	/* Add quality statistics */
+	/* TODO: Fix these values... */
+	iwe.cmd = IWEVQUAL;
+	iwe.u.qual.qual = network->stats.signal;
+	iwe.u.qual.level = network->stats.rssi;
+	iwe.u.qual.noise = network->stats.noise;
+	iwe.u.qual.updated = network->stats.mask & RTLLIB_STATMASK_WEMASK;
+	if (!(network->stats.mask & RTLLIB_STATMASK_RSSI))
+		iwe.u.qual.updated |= IW_QUAL_LEVEL_INVALID;
+	if (!(network->stats.mask & RTLLIB_STATMASK_NOISE))
+		iwe.u.qual.updated |= IW_QUAL_NOISE_INVALID;
+	if (!(network->stats.mask & RTLLIB_STATMASK_SIGNAL))
+		iwe.u.qual.updated |= IW_QUAL_QUAL_INVALID;
+	iwe.u.qual.updated = 7;
+	start = iwe_stream_add_event_rsl(info, start, stop, &iwe, IW_EV_QUAL_LEN);
+
+	iwe.cmd = IWEVCUSTOM;
+	p = custom;
+	iwe.u.data.length = p - custom;
+	if (iwe.u.data.length)
+		start = iwe_stream_add_point_rsl(info, start, stop, &iwe, custom);
+#if (WIRELESS_EXT < 18) 
+	if (ieee->wpa_enabled && network->wpa_ie_len){
+		char buf[MAX_WPA_IE_LEN * 2 + 30];
+		u8 *p = buf;
+		p += sprintf(p, "wpa_ie=");
+		for (i = 0; i < network->wpa_ie_len; i++) {
+			p += sprintf(p, "%02x", network->wpa_ie[i]);
+		}
+
+		memset(&iwe, 0, sizeof(iwe));
+		iwe.cmd = IWEVCUSTOM;
+		iwe.u.data.length = strlen(buf);
+		start = iwe_stream_add_point_rsl(info, start, stop, &iwe, buf);
+        }
+
+	if (ieee->wpa_enabled && network->rsn_ie_len){
+		char buf[MAX_WPA_IE_LEN * 2 + 30];
+
+		u8 *p = buf;
+		p += sprintf(p, "rsn_ie=");
+		for (i = 0; i < network->rsn_ie_len; i++) {
+			p += sprintf(p, "%02x", network->rsn_ie[i]);
+		}
+
+		memset(&iwe, 0, sizeof(iwe));
+		iwe.cmd = IWEVCUSTOM;
+		iwe.u.data.length = strlen(buf);
+		start = iwe_stream_add_point_rsl(info, start, stop, &iwe, buf);
+        }
+#else
+	memset(&iwe, 0, sizeof(iwe));
+	if (network->wpa_ie_len)
+	{
+		char buf[MAX_WPA_IE_LEN];
+		memcpy(buf, network->wpa_ie, network->wpa_ie_len);
+		iwe.cmd = IWEVGENIE;
+		iwe.u.data.length = network->wpa_ie_len;
+		start = iwe_stream_add_point_rsl(info, start, stop, &iwe, buf);
+        }
+	memset(&iwe, 0, sizeof(iwe));
+	if (network->rsn_ie_len)
+	{
+		char buf[MAX_WPA_IE_LEN];
+		memcpy(buf, network->rsn_ie, network->rsn_ie_len);
+		iwe.cmd = IWEVGENIE;
+		iwe.u.data.length = network->rsn_ie_len;
+		start = iwe_stream_add_point_rsl(info, start, stop, &iwe, buf);
+        }
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)	
+#ifndef CUSTOMER_ID_INTEL_CMPC
+	/* add info for WZC */
+	memset(&iwe, 0, sizeof(iwe));
+	if (network->wzc_ie_len)
+	{
+		char buf[MAX_WZC_IE_LEN];
+		memcpy(buf, network->wzc_ie, network->wzc_ie_len);
+		iwe.cmd = IWEVGENIE;
+		iwe.u.data.length = network->wzc_ie_len;
+		start = iwe_stream_add_point_rsl(info, start, stop, &iwe, buf);
+        }
+#endif	
+#endif
+#endif
+
+	/* Add EXTRA: Age to display seconds since last beacon/probe response
+	 * for given network. */
+	iwe.cmd = IWEVCUSTOM;
+	p = custom;
+	p += snprintf(p, MAX_CUSTOM_LEN - (p - custom),
+		      " Last beacon: %lums ago", (jiffies - network->last_scanned) / (HZ / 100));
+	iwe.u.data.length = p - custom;
+	if (iwe.u.data.length)
+		start = iwe_stream_add_point_rsl(info, start, stop, &iwe, custom);
+
+	return start;
+}
+
+int rtllib_wx_get_scan(struct rtllib_device *ieee,
+			  struct iw_request_info *info,
+			  union iwreq_data *wrqu, char *extra)
+{
+	struct rtllib_network *network;
+	unsigned long flags;
+
+	char *ev = extra;
+	char *stop = ev + wrqu->data.length;
+	int i = 0;
+	int err = 0;
+	RTLLIB_DEBUG_WX("Getting scan\n");
+	down(&ieee->wx_sem);
+	spin_lock_irqsave(&ieee->lock, flags);
+
+	list_for_each_entry(network, &ieee->network_list, list) {
+		i++;
+		if((stop-ev)<200)
+		{
+			err = -E2BIG;		
+			break;	
+												}
+		if (ieee->scan_age == 0 ||
+		    time_after(network->last_scanned + ieee->scan_age, jiffies))
+			ev = rtl819x_translate_scan(ieee, ev, stop, network, info);
+		else
+			RTLLIB_DEBUG_SCAN(
+				"Not showing network '%s ("
+				MAC_FMT ")' due to age (%lums).\n",
+				escape_essid(network->ssid,
+					     network->ssid_len),
+				MAC_ARG(network->bssid),
+				(jiffies - network->last_scanned) / (HZ / 100));
+	}
+
+	spin_unlock_irqrestore(&ieee->lock, flags);
+	up(&ieee->wx_sem);
+	wrqu->data.length = ev -  extra;
+	wrqu->data.flags = 0;
+
+	RTLLIB_DEBUG_WX("exit: %d networks returned.\n", i);
+
+	return err;
+}
+
+#ifdef _RTL8192_EXT_PATCH_
+int rtllib_wx_set_encode(struct rtllib_device *ieee,
+			    struct iw_request_info *info,
+			    union iwreq_data *wrqu, char *keybuf, u8 is_mesh)
+#else
+int rtllib_wx_set_encode(struct rtllib_device *ieee,
+			    struct iw_request_info *info,
+			    union iwreq_data *wrqu, char *keybuf)
+#endif
+{
+	struct iw_point *erq = &(wrqu->encoding);
+	struct net_device *dev = ieee->dev;
+	struct rtllib_security sec = {
+		.flags = 0
+	};
+	int i, key, key_provided, len;
+	struct rtllib_crypt_data **crypt;
+
+	RTLLIB_DEBUG_WX("SET_ENCODE\n");
+
+	key = erq->flags & IW_ENCODE_INDEX;
+	if (key) {
+		if (key > WEP_KEYS)
+			return -EINVAL;
+		key--;
+		key_provided = 1;
+	} else {
+		key_provided = 0;
+#ifdef _RTL8192_EXT_PATCH_
+		if(is_mesh)
+			key = ieee->mesh_txkeyidx;
+		else
+#endif
+		key = ieee->tx_keyidx;
+	}
+
+	RTLLIB_DEBUG_WX("Key: %d [%s]\n", key, key_provided ?
+			   "provided" : "default");
+#ifdef _RTL8192_EXT_PATCH_
+	if(is_mesh)
+		crypt = &ieee->cryptlist[0]->crypt[key];
+	else
+		crypt = &ieee->sta_crypt[key];
+#else
+	crypt = &ieee->crypt[key];
+#endif
+	if (erq->flags & IW_ENCODE_DISABLED) {
+		if (key_provided && *crypt) {
+			RTLLIB_DEBUG_WX("Disabling encryption on key %d.\n",
+					   key);
+			rtllib_crypt_delayed_deinit(ieee, crypt);
+		} else
+			RTLLIB_DEBUG_WX("Disabling encryption.\n");
+
+		/* Check all the keys to see if any are still configured,
+		 * and if no key index was provided, de-init them all */
+		for (i = 0; i < WEP_KEYS; i++) {
+#ifdef _RTL8192_EXT_PATCH_
+			bool null_crypt = false;
+			if(is_mesh)
+				null_crypt = (ieee->cryptlist[0]->crypt[i] != NULL) ? true:false; 
+			else
+				null_crypt = (ieee->sta_crypt[i] != NULL) ? true:false;
+			if (null_crypt)	
+#else
+				if (ieee->crypt[i] != NULL) 
+#endif
+				{
+					if (key_provided)
+						break;
+#ifdef _RTL8192_EXT_PATCH_			
+					if(is_mesh)
+						rtllib_crypt_delayed_deinit(ieee, &ieee->cryptlist[0]->crypt[i]);
+					else
+						rtllib_crypt_delayed_deinit(ieee, &ieee->sta_crypt[i]);
+#else
+					rtllib_crypt_delayed_deinit(ieee, &ieee->crypt[i]);
+#endif
+
+				}
+		}
+
+		if (i == WEP_KEYS) {
+			sec.enabled = 0;
+			sec.level = SEC_LEVEL_0;
+			sec.flags |= SEC_ENABLED | SEC_LEVEL;
+		}
+
+		goto done;
+	}
+
+
+
+	sec.enabled = 1;
+	sec.flags |= SEC_ENABLED;
+
+	if (*crypt != NULL && (*crypt)->ops != NULL &&
+	    strcmp((*crypt)->ops->name, "WEP") != 0) {
+		/* changing to use WEP; deinit previously used algorithm
+		 * on this key */
+		rtllib_crypt_delayed_deinit(ieee, crypt);
+	}
+
+	if (*crypt == NULL) {
+		struct rtllib_crypt_data *new_crypt;
+
+		/* take WEP into use */
+		new_crypt = kmalloc(sizeof(struct rtllib_crypt_data),
+				    GFP_KERNEL);
+		if (new_crypt == NULL)
+			return -ENOMEM;
+		memset(new_crypt, 0, sizeof(struct rtllib_crypt_data));
+		new_crypt->ops = rtllib_get_crypto_ops("WEP");
+		if (!new_crypt->ops) {
+			request_module("rtllib_crypt_wep");
+			new_crypt->ops = rtllib_get_crypto_ops("WEP");
+		}
+
+#ifdef BUILT_IN_RTLLIB
+		if (new_crypt->ops)
+#else
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+		if (new_crypt->ops && try_module_get(new_crypt->ops->owner))
+#else			
+		if (new_crypt->ops && try_inc_mod_count(new_crypt->ops->owner))
+#endif
+#endif
+		{
+			new_crypt->priv = new_crypt->ops->init(key);
+		}	
+
+		if (!new_crypt->ops || !new_crypt->priv) {
+			kfree(new_crypt);
+			new_crypt = NULL;
+
+			printk(KERN_WARNING "%s: could not initialize WEP: "
+			       "load module rtllib_crypt_wep\n",
+			       dev->name);
+			return -EOPNOTSUPP;
+		}
+		*crypt = new_crypt;
+	}
+
+	/* If a new key was provided, set it up */
+	if (erq->length > 0) {
+		len = erq->length <= 5 ? 5 : 13;
+		memcpy(sec.keys[key], keybuf, erq->length);
+		if (len > erq->length)
+			memset(sec.keys[key] + erq->length, 0,
+			       len - erq->length);
+		RTLLIB_DEBUG_WX("Setting key %d to '%s' (%d:%d bytes)\n",
+				   key, escape_essid(sec.keys[key], len),
+				   erq->length, len);
+		sec.key_sizes[key] = len;
+ 		(*crypt)->ops->set_key(sec.keys[key], len, NULL,
+				       (*crypt)->priv);
+		sec.flags |= (1 << key);
+		/* This ensures a key will be activated if no key is
+		 * explicitely set */
+		if (key == sec.active_key)
+			sec.flags |= SEC_ACTIVE_KEY;
+#ifdef _RTL8192_EXT_PATCH_			
+		if(is_mesh)
+			ieee->mesh_txkeyidx = key;
+		else
+#endif
+		ieee->tx_keyidx = key;
+
+	} else {
+		len = (*crypt)->ops->get_key(sec.keys[key], WEP_KEY_LEN,
+					     NULL, (*crypt)->priv);
+		if (len == 0) {
+			/* Set a default key of all 0 */
+			printk("Setting key %d to all zero.\n",
+					   key);
+
+			RTLLIB_DEBUG_WX("Setting key %d to all zero.\n",
+					   key);
+			memset(sec.keys[key], 0, 13);
+			(*crypt)->ops->set_key(sec.keys[key], 13, NULL,
+					       (*crypt)->priv);
+			sec.key_sizes[key] = 13;
+			sec.flags |= (1 << key);
+		}
+
+		/* No key data - just set the default TX key index */
+		if (key_provided) {
+			RTLLIB_DEBUG_WX(
+				"Setting key %d to default Tx key.\n", key);
+#ifdef _RTL8192_EXT_PATCH_
+			if(is_mesh)
+				ieee->mesh_txkeyidx = key;
+			else
+#endif
+			ieee->tx_keyidx = key;
+			sec.active_key = key;
+			sec.flags |= SEC_ACTIVE_KEY;
+		}
+	}
+#ifdef _RTL8192_EXT_PATCH_
+	if ((ieee->iw_mode == IW_MODE_MESH)&&(is_mesh)&&ieee->ext_patch_rtllib_create_crypt_for_peer)
+	{
+		ieee->ext_patch_rtllib_create_crypt_for_peer(ieee);
+	}
+#endif
+ done:
+	ieee->open_wep = !(erq->flags & IW_ENCODE_RESTRICTED);
+	ieee->auth_mode = ieee->open_wep ? WLAN_AUTH_OPEN : WLAN_AUTH_SHARED_KEY;
+	sec.auth_mode = ieee->open_wep ? WLAN_AUTH_OPEN : WLAN_AUTH_SHARED_KEY;
+	sec.flags |= SEC_AUTH_MODE;
+	RTLLIB_DEBUG_WX("Auth: %s\n", sec.auth_mode == WLAN_AUTH_OPEN ?
+			   "OPEN" : "SHARED KEY");
+
+	/* For now we just support WEP, so only set that security level...
+	 * TODO: When WPA is added this is one place that needs to change */
+	sec.flags |= SEC_LEVEL;
+	sec.level = SEC_LEVEL_1; /* 40 and 104 bit WEP */
+
+	if (ieee->set_security)
+		ieee->set_security(dev, &sec);
+
+	/* Do not reset port if card is in Managed mode since resetting will
+	 * generate new IEEE 802.11 authentication which may end up in looping
+	 * with IEEE 802.1X.  If your hardware requires a reset after WEP
+	 * configuration (for example... Prism2), implement the reset_port in
+	 * the callbacks structures used to initialize the 802.11 stack. */
+	if (ieee->reset_on_keychange &&
+	    ieee->iw_mode != IW_MODE_INFRA &&
+	    ieee->reset_port && ieee->reset_port(dev)) {
+		printk(KERN_DEBUG "%s: reset_port failed\n", dev->name);
+		return -EINVAL;
+	}
+	return 0;
+}
+
+#ifdef _RTL8192_EXT_PATCH_
+int rtllib_wx_get_encode(struct rtllib_device *ieee,
+			    struct iw_request_info *info,
+			    union iwreq_data *wrqu, char *keybuf, u8 is_mesh)
+#else
+int rtllib_wx_get_encode(struct rtllib_device *ieee,
+			    struct iw_request_info *info,
+			    union iwreq_data *wrqu, char *keybuf)
+#endif
+{
+	struct iw_point *erq = &(wrqu->encoding);
+	int len, key;
+	struct rtllib_crypt_data *crypt;
+
+	RTLLIB_DEBUG_WX("GET_ENCODE\n");
+
+	if(ieee->iw_mode == IW_MODE_MONITOR)
+		return -1;
+	
+	key = erq->flags & IW_ENCODE_INDEX;
+	if (key) {
+		if (key > WEP_KEYS)
+			return -EINVAL;
+		key--;
+	} else {
+#ifdef _RTL8192_EXT_PATCH_
+		if(is_mesh)
+			key = ieee->mesh_txkeyidx;
+		else
+#endif
+		key = ieee->tx_keyidx;
+	}
+#ifdef _RTL8192_EXT_PATCH_
+	if(is_mesh)
+		crypt = ieee->cryptlist[0]->crypt[key];
+	else
+		crypt = ieee->sta_crypt[key];
+#else
+	crypt = ieee->crypt[key];
+#endif
+
+	erq->flags = key + 1;
+
+	if (crypt == NULL || crypt->ops == NULL) {
+		erq->length = 0;
+		erq->flags |= IW_ENCODE_DISABLED;
+		return 0;
+	}
+#if 0
+	if (strcmp(crypt->ops->name, "WEP") != 0) {
+		/* only WEP is supported with wireless extensions, so just
+		 * report that encryption is used */
+		erq->length = 0;
+		erq->flags |= IW_ENCODE_ENABLED;
+		return 0;
+	}
+#endif
+	len = crypt->ops->get_key(keybuf, SCM_KEY_LEN, NULL, crypt->priv);
+	erq->length = (len >= 0 ? len : 0);
+
+	erq->flags |= IW_ENCODE_ENABLED;
+
+	if (ieee->open_wep)
+		erq->flags |= IW_ENCODE_OPEN;
+	else
+		erq->flags |= IW_ENCODE_RESTRICTED;
+
+	return 0;
+}
+#if (WIRELESS_EXT >= 18)
+#ifdef _RTL8192_EXT_PATCH_
+int rtllib_wx_set_encode_ext(struct rtllib_device *ieee,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra, u8 is_mesh)
+#else
+int rtllib_wx_set_encode_ext(struct rtllib_device *ieee,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+#endif
+{
+	int ret = 0;
+	struct net_device *dev = ieee->dev;
+        struct iw_point *encoding = &wrqu->encoding;
+        struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
+        int i, idx;
+        int group_key = 0;
+        const char *alg, *module;
+        struct rtllib_crypto_ops *ops;
+        struct rtllib_crypt_data **crypt;
+
+        struct rtllib_security sec = {
+                .flags = 0,
+        };
+        idx = encoding->flags & IW_ENCODE_INDEX;
+        if (idx) {
+                if (idx < 1 || idx > WEP_KEYS)
+                        return -EINVAL;
+                idx--;
+	} else{
+#ifdef _RTL8192_EXT_PATCH_
+		if(is_mesh)
+			idx = ieee->mesh_txkeyidx;
+		else
+#endif
+			idx = ieee->tx_keyidx;
+	}
+	if (ext->ext_flags & IW_ENCODE_EXT_GROUP_KEY) {
+#ifdef _RTL8192_EXT_PATCH_
+		if(is_mesh)
+			crypt = &ieee->cryptlist[0]->crypt[idx];
+		else
+			crypt = &ieee->sta_crypt[idx];
+#else
+		crypt = &ieee->crypt[idx];
+#endif
+		group_key = 1;
+	} else {
+		/* some Cisco APs use idx>0 for unicast in dynamic WEP */
+		if (idx != 0 && ext->alg != IW_ENCODE_ALG_WEP)
+                        return -EINVAL;
+#ifdef _RTL8192_EXT_PATCH_
+		if ((ieee->iw_mode == IW_MODE_INFRA)||
+			((ieee->iw_mode == IW_MODE_MESH) && (ieee->only_mesh == 0))){
+			if(is_mesh)
+				crypt = &ieee->cryptlist[0]->crypt[idx];
+			else
+				crypt = &ieee->sta_crypt[idx];
+		}
+		else
+			return -EINVAL;
+#else
+		if (ieee->iw_mode == IW_MODE_INFRA)
+			crypt = &ieee->crypt[idx];
+		else
+			return -EINVAL;
+#endif
+	}
+
+	sec.flags |= SEC_ENABLED;
+	if ((encoding->flags & IW_ENCODE_DISABLED) ||
+            ext->alg == IW_ENCODE_ALG_NONE) {
+		if (*crypt)
+			rtllib_crypt_delayed_deinit(ieee, crypt);
+
+		for (i = 0; i < WEP_KEYS; i++)
+		{
+#ifdef _RTL8192_EXT_PATCH_
+			if ((is_mesh)&&(ieee->cryptlist[0]->crypt[i] != NULL))
+				break;
+			if ((!is_mesh)&&(ieee->sta_crypt[i] != NULL))
+				break;
+#else
+			if (ieee->crypt[i] != NULL)
+				break;
+#endif	
+		}
+		if (i == WEP_KEYS) {
+			sec.enabled = 0;
+			sec.level = SEC_LEVEL_0;
+			sec.flags |= SEC_LEVEL;
+		}
+		goto done;
+	}
+	
+	sec.enabled = 1;
+#if 0
+        if (group_key ? !ieee->host_mc_decrypt :
+            !(ieee->host_encrypt || ieee->host_decrypt ||
+              ieee->host_encrypt_msdu))
+                goto skip_host_crypt;
+#endif
+        switch (ext->alg) {
+        case IW_ENCODE_ALG_WEP:
+                alg = "WEP";
+                module = "rtllib_crypt_wep";
+                break;
+        case IW_ENCODE_ALG_TKIP:
+                alg = "TKIP";
+                module = "rtllib_crypt_tkip";
+                break;
+        case IW_ENCODE_ALG_CCMP:
+                alg = "CCMP";
+                module = "rtllib_crypt_ccmp";
+                break;
+        default:
+                RTLLIB_DEBUG_WX("%s: unknown crypto alg %d\n",
+                                   dev->name, ext->alg);
+                ret = -EINVAL;
+                goto done;
+        }
+	printk("alg name:%s\n",alg);
+
+	 ops = rtllib_get_crypto_ops(alg);
+        if (ops == NULL) {
+                char tempbuf[100];
+
+                memset( tempbuf, 0x00, 100 );
+                sprintf( tempbuf, "%s", module);
+                request_module("%s",tempbuf);
+                ops = rtllib_get_crypto_ops(alg);
+        }
+        if (ops == NULL) {
+                RTLLIB_DEBUG_WX("%s: unknown crypto alg %d\n",
+                                   dev->name, ext->alg);
+		printk("========>unknown crypto alg %d\n", ext->alg);
+                ret = -EINVAL;
+                goto done;
+        }
+
+        if (*crypt == NULL || (*crypt)->ops != ops) {
+                struct rtllib_crypt_data *new_crypt;
+
+                rtllib_crypt_delayed_deinit(ieee, crypt);
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13))
+                new_crypt = kzalloc(sizeof(*new_crypt), GFP_KERNEL);
+#else
+                new_crypt = kmalloc(sizeof(*new_crypt), GFP_KERNEL);
+		memset(new_crypt,0,sizeof(*new_crypt));
+#endif
+                if (new_crypt == NULL) {
+                        ret = -ENOMEM;
+                        goto done;
+                }
+                new_crypt->ops = ops;
+#ifdef BUILT_IN_RTLLIB
+		if (new_crypt->ops)
+#else
+                if (new_crypt->ops && try_module_get(new_crypt->ops->owner))
+#endif			
+		{
+                        new_crypt->priv = new_crypt->ops->init(idx);
+		}
+
+                if (new_crypt->priv == NULL) {
+                        kfree(new_crypt);
+                        ret = -EINVAL;
+                        goto done;
+                }
+                *crypt = new_crypt;
+
+ 	}
+#ifdef _RTL8192_EXT_PATCH_
+	if ((ieee->iw_mode == IW_MODE_MESH)&&(is_mesh))
+	{
+		int j;
+		for (j=1; j<MAX_MP; j++)
+		{
+			struct rtllib_crypt_data ** crypttmp =  &ieee->cryptlist[j]->crypt[idx];
+			if (*crypttmp == NULL)
+				break;
+			if (*crypttmp && (*crypttmp)->ops != ops)
+				rtllib_crypt_delayed_deinit(ieee, crypttmp);
+		}	
+	}
+#endif	
+
+        if (ext->key_len > 0 && (*crypt)->ops->set_key &&
+            (*crypt)->ops->set_key(ext->key, ext->key_len, ext->rx_seq,
+                                   (*crypt)->priv) < 0) {
+                RTLLIB_DEBUG_WX("%s: key setting failed\n", dev->name);
+		printk("key setting failed\n");
+                ret = -EINVAL;
+                goto done;
+        }
+#if 1	
+        if (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) {
+#ifdef _RTL8192_EXT_PATCH_
+			if(is_mesh)
+				ieee->mesh_txkeyidx = idx;
+			else
+#endif
+                ieee->tx_keyidx = idx;
+                sec.active_key = idx;
+                sec.flags |= SEC_ACTIVE_KEY;
+        }
+#ifdef _RTL8192_EXT_PATCH_
+	if ((ieee->iw_mode == IW_MODE_MESH)&&(is_mesh)&&ieee->ext_patch_rtllib_create_crypt_for_peer)
+	{
+		ieee->ext_patch_rtllib_create_crypt_for_peer(ieee);
+	}
+#endif
+        if (ext->alg != IW_ENCODE_ALG_NONE) {
+                sec.key_sizes[idx] = ext->key_len;
+                sec.flags |= (1 << idx);
+                if (ext->alg == IW_ENCODE_ALG_WEP) {
+                        sec.flags |= SEC_LEVEL;
+                        sec.level = SEC_LEVEL_1;
+                } else if (ext->alg == IW_ENCODE_ALG_TKIP) {
+                        sec.flags |= SEC_LEVEL;
+                        sec.level = SEC_LEVEL_2;
+                } else if (ext->alg == IW_ENCODE_ALG_CCMP) {
+                        sec.flags |= SEC_LEVEL;
+                        sec.level = SEC_LEVEL_3;
+                }
+                /* Don't set sec level for group keys. */
+                if (group_key)
+                        sec.flags &= ~SEC_LEVEL;
+        }
+#endif
+done:
+        if (ieee->set_security)
+                ieee->set_security(ieee->dev, &sec);
+
+	 if (ieee->reset_on_keychange &&
+            ieee->iw_mode != IW_MODE_INFRA &&
+            ieee->reset_port && ieee->reset_port(dev)) {
+                RTLLIB_DEBUG_WX("%s: reset_port failed\n", dev->name);
+                return -EINVAL;
+        }
+        return ret;
+}
+
+#ifdef _RTL8192_EXT_PATCH_
+int rtllib_wx_get_encode_ext(struct rtllib_device *ieee,
+			       struct iw_request_info *info,
+			       union iwreq_data *wrqu, char *extra, u8 is_mesh)
+#else
+int rtllib_wx_get_encode_ext(struct rtllib_device *ieee,
+			       struct iw_request_info *info,
+			       union iwreq_data *wrqu, char *extra)
+#endif			
+{
+	struct iw_point *encoding = &wrqu->encoding;
+	struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
+	struct rtllib_crypt_data *crypt;
+	int idx, max_key_len;
+
+	max_key_len = encoding->length - sizeof(*ext);
+	if (max_key_len < 0)
+		return -EINVAL;
+
+	idx = encoding->flags & IW_ENCODE_INDEX;
+	if (idx) {
+		if (idx < 1 || idx > WEP_KEYS)
+			return -EINVAL;
+		idx--;
+	} else{
+#ifdef _RTL8192_EXT_PATCH_
+		if(is_mesh)
+			idx = ieee->mesh_txkeyidx;
+		else
+#endif			
+			idx = ieee->tx_keyidx;
+	}
+	if (!(ext->ext_flags & IW_ENCODE_EXT_GROUP_KEY) &&
+	    (ext->alg != IW_ENCODE_ALG_WEP))
+#ifdef _RTL8192_EXT_PATCH_
+		if (idx != 0 || !((ieee->iw_mode == IW_MODE_INFRA) || ((ieee->iw_mode == IW_MODE_MESH) && (ieee->only_mesh == 0))))
+#else
+		if (idx != 0 || (ieee->iw_mode != IW_MODE_INFRA)) 
+#endif			
+			return -EINVAL;
+		
+#ifdef _RTL8192_EXT_PATCH_
+	if(is_mesh)
+		crypt = ieee->cryptlist[0]->crypt[idx];
+	else
+		crypt = ieee->sta_crypt[idx];
+#else
+	crypt = ieee->crypt[idx];
+#endif
+
+	encoding->flags = idx + 1;
+	memset(ext, 0, sizeof(*ext));
+
+	if (crypt == NULL || crypt->ops == NULL ) {
+		ext->alg = IW_ENCODE_ALG_NONE;
+		ext->key_len = 0;
+		encoding->flags |= IW_ENCODE_DISABLED;
+	} else {
+		if (strcmp(crypt->ops->name, "WEP") == 0 )
+			ext->alg = IW_ENCODE_ALG_WEP;
+		else if (strcmp(crypt->ops->name, "TKIP"))
+			ext->alg = IW_ENCODE_ALG_TKIP;
+		else if (strcmp(crypt->ops->name, "CCMP"))
+			ext->alg = IW_ENCODE_ALG_CCMP;
+		else
+			return -EINVAL;
+		ext->key_len = crypt->ops->get_key(ext->key, SCM_KEY_LEN, NULL, crypt->priv);
+		encoding->flags |= IW_ENCODE_ENABLED;
+		if (ext->key_len &&
+		    (ext->alg == IW_ENCODE_ALG_TKIP ||
+		     ext->alg == IW_ENCODE_ALG_CCMP))
+			ext->ext_flags |= IW_ENCODE_EXT_TX_SEQ_VALID;
+
+	}
+
+	return 0;
+}
+#ifdef _RTL8192_EXT_PATCH_
+int rtllib_mesh_set_encode_ext(struct rtllib_device *ieee,
+                               struct iw_point *encoding, struct iw_encode_ext *ext, int entry)
+{
+	int ret = 0;
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
+	struct net_device *dev = ieee->dev;
+	int i, idx;
+	int group_key = 0;
+	const char *alg, *module;
+	struct rtllib_crypto_ops *ops;
+	struct rtllib_crypt_data **crypt;
+
+	struct rtllib_security sec = {
+	        .flags = 0,
+	};
+	idx = encoding->flags & IW_ENCODE_INDEX;
+
+	if (idx) {
+		if (idx < 1 || idx > WEP_KEYS)
+			return -EINVAL;
+		idx--;
+	} else
+		idx = ieee->tx_keyidx;
+
+
+	if (ext->ext_flags & IW_ENCODE_EXT_GROUP_KEY) {
+		crypt = &ieee->cryptlist[0]->crypt[idx];
+		group_key = 1;
+	} else {
+		/* some Cisco APs use idx>0 for unicast in dynamic WEP */
+		if (idx != 0 && ext->alg != IW_ENCODE_ALG_WEP)
+			return -EINVAL;
+		if ((ieee->iw_mode == IW_MODE_INFRA) || (ieee->mesh_started==1))
+		{
+			crypt = &ieee->cryptlist[entry]->crypt[idx];
+#if 0  
+			if(*crypt == NULL )
+				printk("%s: ERR! &ieee->cryptlist[%d]->crypt[%d] is  NULL.\n",__func__, entry,idx);
+#endif			
+		}
+		else
+			return -EINVAL;
+	}
+
+	sec.flags |= SEC_ENABLED;
+	if ((encoding->flags & IW_ENCODE_DISABLED) ||
+		ext->alg == IW_ENCODE_ALG_NONE) {
+		if (*crypt){
+			printk("=====>%s():DISABLE crypt is not NULL\n",__FUNCTION__);
+		 	rtllib_crypt_delayed_deinit(ieee, crypt);
+		}
+#ifdef _RTL8192_EXT_PATCH_
+		if(1)
+		{
+			int j;
+			for (j=1; j<MAX_MP; j++)
+			{
+				struct rtllib_crypt_data ** crypttmp =  &ieee->cryptlist[j]->crypt[idx];
+				if (*crypttmp == NULL)
+					continue;
+				printk("======>crypt is not NULL\n");
+				rtllib_crypt_delayed_deinit(ieee, crypttmp);
+			}
+		}
+#endif
+
+		for (i = 0; i < WEP_KEYS; i++){
+			if (ieee->cryptlist[0]->crypt[i] != NULL)
+				break;
+		}
+		if (i == WEP_KEYS) {
+			sec.enabled = 0;
+			sec.level = SEC_LEVEL_0;
+			sec.flags |= SEC_LEVEL;
+		}
+		goto done;
+	}
+	
+	sec.enabled = 1;
+#if 0
+	if (group_key ? !ieee->host_mc_decrypt :
+		!(ieee->host_encrypt || ieee->host_decrypt ||
+		ieee->host_encrypt_msdu))
+		goto skip_host_crypt;
+#endif
+	switch (ext->alg) {
+		case IW_ENCODE_ALG_WEP:
+			alg = "WEP";
+			module = "rtllib_crypt_wep";
+			break;
+		case IW_ENCODE_ALG_TKIP:
+			alg = "TKIP";
+			module = "rtllib_crypt_tkip";
+			break;
+		case IW_ENCODE_ALG_CCMP:
+			alg = "CCMP";
+			module = "rtllib_crypt_ccmp";
+			break;
+		default:
+			RTLLIB_DEBUG_WX("%s: unknown crypto alg %d\n",
+			                   dev->name, ext->alg);
+			ret = -EINVAL;
+			goto done;
+	}
+	printk("%s: alg name:%s\n",__FUNCTION__, alg);
+
+	ops = rtllib_get_crypto_ops(alg);
+	if (ops == NULL) {
+		request_module("%s",module);
+		ops = rtllib_get_crypto_ops(alg);
+	}
+	if (ops == NULL) {
+		RTLLIB_DEBUG_WX("%s: unknown crypto alg %d\n",
+		               dev->name, ext->alg);
+		printk("========>unknown crypto alg %d\n", ext->alg);
+		ret = -EINVAL;
+		goto done;
+	}
+
+	if (*crypt == NULL || (*crypt)->ops != ops) {
+
+		struct rtllib_crypt_data *new_crypt;
+
+		rtllib_crypt_delayed_deinit(ieee, crypt);
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13))
+		new_crypt = kzalloc(sizeof(*new_crypt), GFP_KERNEL);
+#else
+		new_crypt = kmalloc(sizeof(*new_crypt), GFP_KERNEL);
+		memset(new_crypt,0,sizeof(*new_crypt));
+#endif
+		if (new_crypt == NULL) {
+			ret = -ENOMEM;
+			goto done;
+		}
+		new_crypt->ops = ops;
+#ifdef BUILT_IN_RTLLIB
+		if (new_crypt->ops)
+#else
+		if (new_crypt->ops && try_module_get(new_crypt->ops->owner))
+#endif
+		{
+			new_crypt->priv = new_crypt->ops->init(idx);
+		}
+		if (new_crypt->priv == NULL) {
+			kfree(new_crypt);
+			ret = -EINVAL;
+			goto done;
+		}
+		*crypt = new_crypt;
+	}
+
+	printk("%s: key_len %x \n",__FUNCTION__, ext->key_len);
+
+	if (ext->key_len > 0 && (*crypt)->ops->set_key &&
+		(*crypt)->ops->set_key(ext->key, ext->key_len, ext->rx_seq,
+                                   (*crypt)->priv) < 0) {
+		RTLLIB_DEBUG_WX("%s: key setting failed\n", dev->name);
+		printk("key setting failed\n");
+		ret = -EINVAL;
+		goto done;
+	}
+#if 1	
+	if (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) {
+		ieee->mesh_txkeyidx = idx;
+		sec.active_key = idx;
+		sec.flags |= SEC_ACTIVE_KEY;
+	}
+
+	if (ext->alg != IW_ENCODE_ALG_NONE) {
+		sec.key_sizes[idx] = ext->key_len;
+		sec.flags |= (1 << idx);
+		if (ext->alg == IW_ENCODE_ALG_WEP) {
+			sec.flags |= SEC_LEVEL;
+			sec.level = SEC_LEVEL_1;
+		} else if (ext->alg == IW_ENCODE_ALG_TKIP) {
+			sec.flags |= SEC_LEVEL;
+			sec.level = SEC_LEVEL_2;
+		} else if (ext->alg == IW_ENCODE_ALG_CCMP) {
+			sec.flags |= SEC_LEVEL;
+			sec.level = SEC_LEVEL_3;
+		}
+		/* Don't set sec level for group keys. */
+		if (group_key)
+			sec.flags &= ~SEC_LEVEL;
+	}
+#endif
+done:
+	if (ieee->set_security)
+		ieee->set_security(ieee->dev, &sec);
+
+	if (ieee->reset_on_keychange &&
+		ieee->iw_mode != IW_MODE_INFRA &&
+		ieee->reset_port && ieee->reset_port(dev)) {
+		RTLLIB_DEBUG_WX("%s: reset_port failed\n", dev->name);
+		return -EINVAL;
+	}
+#endif
+	return ret;
+}
+#endif
+
+int rtllib_wx_set_mlme(struct rtllib_device *ieee,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+{
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
+	u8 i = 0;
+	bool deauth = false;
+	struct iw_mlme *mlme = (struct iw_mlme *) extra;
+
+	if (ieee->state != RTLLIB_LINKED)
+		return -ENOLINK;
+	
+	down(&ieee->wx_sem);
+	
+	switch (mlme->cmd) {
+		case IW_MLME_DEAUTH:
+			deauth = true;
+			/* leave break out intentionly */
+
+		case IW_MLME_DISASSOC:
+#ifdef _RTL8192_EXT_PATCH_
+			if(!((ieee->iw_mode == IW_MODE_MESH) && (ieee->only_mesh == 1)))
+			{
+#endif
+				if(deauth == true) {
+					printk("disauth packet !\n");
+				} else {
+					printk("dis associate packet!\n");
+				}
+
+				ieee->cannot_notify = true;
+
+				SendDisassociation(ieee,deauth,mlme->reason_code);
+				rtllib_disassociate(ieee);
+
+				ieee->wap_set = 0;
+				for(i=0;i<6;i++)  ieee->current_network.bssid[i]= 0x55;
+
+				ieee->ssid_set = 0;
+				ieee->current_network.ssid[0] = '\0';
+				ieee->current_network.ssid_len = 0;
+#ifdef _RTL8192_EXT_PATCH_
+			}
+#endif
+			break;
+		default:
+			up(&ieee->wx_sem);
+			return -EOPNOTSUPP;
+	}
+
+	up(&ieee->wx_sem);
+	
+#endif		
+	return 0;
+}
+
+int rtllib_wx_set_auth(struct rtllib_device *ieee,
+                               struct iw_request_info *info,
+                               struct iw_param *data, char *extra)
+{
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
+	switch (data->flags & IW_AUTH_INDEX) {
+        case IW_AUTH_WPA_VERSION:
+		break;
+        case IW_AUTH_CIPHER_PAIRWISE:
+        case IW_AUTH_CIPHER_GROUP:
+        case IW_AUTH_KEY_MGMT:
+		/*
+		 * Host AP driver does not use these parameters and allows
+		 * wpa_supplicant to control them internally.
+		 */
+                break;
+        case IW_AUTH_TKIP_COUNTERMEASURES:
+                ieee->tkip_countermeasures = data->value;
+                break;
+        case IW_AUTH_DROP_UNENCRYPTED:
+                ieee->drop_unencrypted = data->value;
+		break;
+
+	case IW_AUTH_80211_AUTH_ALG:
+		if(data->value & IW_AUTH_ALG_SHARED_KEY){
+			ieee->open_wep = 0;
+			ieee->auth_mode = 1;
+		}
+		else if(data->value & IW_AUTH_ALG_OPEN_SYSTEM){
+			ieee->open_wep = 1;
+			ieee->auth_mode = 0;
+		}
+		else if(data->value & IW_AUTH_ALG_LEAP){
+			ieee->open_wep = 1;
+			ieee->auth_mode = 2;
+		}
+		else
+			return -EINVAL;
+		break;
+
+#if 1
+	case IW_AUTH_WPA_ENABLED:
+		ieee->wpa_enabled = (data->value)?1:0;
+		break;
+
+#endif
+	case IW_AUTH_RX_UNENCRYPTED_EAPOL:
+                ieee->ieee802_1x = data->value;
+		break;
+	case IW_AUTH_PRIVACY_INVOKED:
+		ieee->privacy_invoked = data->value;
+		break;
+	default:
+                return -EOPNOTSUPP;
+	}	
+#endif
+	return 0;
+}
+#endif
+
+int rtllib_wx_set_gen_ie(struct rtllib_device *ieee, u8 *ie, size_t len)
+{
+#if (WIRELESS_EXT >= 18 )
+	u8 *buf;
+	u8 eid, wps_oui[4]={0x0,0x50,0xf2,0x04};
+	
+	if (len > MAX_WPA_IE_LEN || (len && ie == NULL)) {
+		return -EINVAL;
+	}
+
+	if (len) {
+		eid = ie[0];
+		if ((eid == MFIE_TYPE_GENERIC) && (!memcmp(&ie[2], wps_oui, 4))) {
+
+			ieee->wps_ie_len = (len < MAX_WZC_IE_LEN) ? (len):(MAX_WZC_IE_LEN);
+			buf = kmalloc(ieee->wps_ie_len, GFP_KERNEL);
+			if (buf == NULL)
+				return -ENOMEM;
+			memcpy(buf, ie, ieee->wps_ie_len);
+			ieee->wps_ie = buf;				
+			return 0;
+		}			
+	}
+	ieee->wps_ie_len = 0;	
+	if (ieee->wps_ie)
+		kfree(ieee->wps_ie);
+	ieee->wps_ie = NULL;		
+	if (len) {
+		if (len != ie[1]+2) {
+			return -EINVAL;
+		}
+		buf = kmalloc(len, GFP_KERNEL);
+		if (buf == NULL)
+			return -ENOMEM;
+		memcpy(buf, ie, len);
+		kfree(ieee->wpa_ie);
+		ieee->wpa_ie = buf;
+		ieee->wpa_ie_len = len;	
+	} else {
+		if (ieee->wpa_ie)
+		kfree(ieee->wpa_ie);
+		ieee->wpa_ie = NULL;
+		ieee->wpa_ie_len = 0;
+	}
+#endif
+	return 0;
+}
+
+#ifndef BUILT_IN_RTLLIB
+EXPORT_SYMBOL_RSL(rtllib_wx_set_gen_ie);
+#if (WIRELESS_EXT >= 18)
+EXPORT_SYMBOL_RSL(rtllib_wx_set_mlme);
+EXPORT_SYMBOL_RSL(rtllib_wx_set_auth);
+EXPORT_SYMBOL_RSL(rtllib_wx_set_encode_ext);
+EXPORT_SYMBOL_RSL(rtllib_wx_get_encode_ext);
+#endif
+EXPORT_SYMBOL_RSL(rtllib_wx_get_scan);
+EXPORT_SYMBOL_RSL(rtllib_wx_set_encode);
+EXPORT_SYMBOL_RSL(rtllib_wx_get_encode);
+#endif
+#ifdef _RTL8192_EXT_PATCH_
+EXPORT_SYMBOL_RSL(rtllib_mesh_set_encode_ext);
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/rtl819x_TS.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/rtl819x_TS.h
@@ -0,0 +1,72 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+#ifndef _TSTYPE_H_
+#define _TSTYPE_H_
+#include "rtl819x_Qos.h"
+#define TS_SETUP_TIMEOUT	60  
+#define TS_INACT_TIMEOUT	60
+#define TS_ADDBA_DELAY		60
+
+#define TOTAL_TS_NUM		16
+#define TCLAS_NUM		4
+
+typedef enum _TR_SELECT {
+	TX_DIR = 0, 
+	RX_DIR = 1,
+} TR_SELECT, *PTR_SELECT;
+
+typedef struct _TS_COMMON_INFO{
+	struct list_head		List;
+	struct timer_list		SetupTimer;
+	struct timer_list		InactTimer;
+	u8				Addr[6];
+	TSPEC_BODY			TSpec;
+	QOS_TCLAS			TClass[TCLAS_NUM];
+	u8				TClasProc;
+	u8				TClasNum;
+} TS_COMMON_INFO, *PTS_COMMON_INFO;
+
+typedef struct _TX_TS_RECORD{
+	TS_COMMON_INFO		TsCommonInfo;
+	u16				TxCurSeq;
+	BA_RECORD			TxPendingBARecord;  	
+	BA_RECORD			TxAdmittedBARecord;	
+	u8				bAddBaReqInProgress;
+	u8				bAddBaReqDelayed;
+	u8				bUsingBa;
+	u8 				bDisable_AddBa;
+	struct timer_list		TsAddBaTimer;
+	u8				num;
+} TX_TS_RECORD, *PTX_TS_RECORD;
+
+typedef struct _RX_TS_RECORD {
+	TS_COMMON_INFO		TsCommonInfo;
+	u16				RxIndicateSeq;
+	u16				RxTimeoutIndicateSeq;
+	struct list_head		RxPendingPktList;
+	struct timer_list		RxPktPendingTimer;
+	BA_RECORD			RxAdmittedBARecord;	 
+	u16				RxLastSeqNum;
+	u8				RxLastFragNum;
+	u8				num;
+} RX_TS_RECORD, *PRX_TS_RECORD;
+
+
+#endif
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/rtl819x_HTProc.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/rtl819x_HTProc.c
@@ -0,0 +1,1683 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+#include "rtllib.h"
+#include "rtl819x_HT.h"
+u8 MCS_FILTER_ALL[16] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
+
+u8 MCS_FILTER_1SS[16] = {0xff, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
+
+u16 MCS_DATA_RATE[2][2][77] = 
+	{	{	{13, 26, 39, 52, 78, 104, 117, 130, 26, 52, 78 ,104, 156, 208, 234, 260,
+			39, 78, 117, 234, 312, 351, 390, 52, 104, 156, 208, 312, 416, 468, 520, 
+			0, 78, 104, 130, 117, 156, 195, 104, 130, 130, 156, 182, 182, 208, 156, 195,
+			195, 234, 273, 273, 312, 130, 156, 181, 156, 181, 208, 234, 208, 234, 260, 260, 
+			286, 195, 234, 273, 234, 273, 312, 351, 312, 351, 390, 390, 429},			
+			{14, 29, 43, 58, 87, 116, 130, 144, 29, 58, 87, 116, 173, 231, 260, 289, 
+			43, 87, 130, 173, 260, 347, 390, 433, 58, 116, 173, 231, 347, 462, 520, 578, 
+			0, 87, 116, 144, 130, 173, 217, 116, 144, 144, 173, 202, 202, 231, 173, 217, 
+			217, 260, 303, 303, 347, 144, 173, 202, 173, 202, 231, 260, 231, 260, 289, 289, 
+			318, 217, 260, 303, 260, 303, 347, 390, 347, 390, 433, 433, 477}	},		
+		{	{27, 54, 81, 108, 162, 216, 243, 270, 54, 108, 162, 216, 324, 432, 486, 540, 
+			81, 162, 243, 324, 486, 648, 729, 810, 108, 216, 324, 432, 648, 864, 972, 1080, 
+			12, 162, 216, 270, 243, 324, 405, 216, 270, 270, 324, 378, 378, 432, 324, 405, 
+			405, 486, 567, 567, 648, 270, 324, 378, 324, 378, 432, 486, 432, 486, 540, 540, 
+			594, 405, 486, 567, 486, 567, 648, 729, 648, 729, 810, 810, 891}, 	
+			{30, 60, 90, 120, 180, 240, 270, 300, 60, 120, 180, 240, 360, 480, 540, 600, 
+			90, 180, 270, 360, 540, 720, 810, 900, 120, 240, 360, 480, 720, 960, 1080, 1200, 
+			13, 180, 240, 300, 270, 360, 450, 240, 300, 300, 360, 420, 420, 480, 360, 450, 
+			450, 540, 630, 630, 720, 300, 360, 420, 360, 420, 480, 540, 480, 540, 600, 600, 
+			660, 450, 540, 630, 540, 630, 720, 810, 720, 810, 900, 900, 990}	}	
+	};
+
+static u8 UNKNOWN_BORADCOM[3] = {0x00, 0x14, 0xbf};
+static u8 LINKSYSWRT330_LINKSYSWRT300_BROADCOM[3] = {0x00, 0x1a, 0x70};
+static u8 LINKSYSWRT350_LINKSYSWRT150_BROADCOM[3] = {0x00, 0x1d, 0x7e};
+static u8 BELKINF5D8233V1_RALINK[3] = {0x00, 0x17, 0x3f};	
+static u8 BELKINF5D82334V3_RALINK[3] = {0x00, 0x1c, 0xdf};
+static u8 PCI_RALINK[3] = {0x00, 0x90, 0xcc};
+static u8 EDIMAX_RALINK[3] = {0x00, 0x0e, 0x2e};
+static u8 AIRLINK_RALINK[3] = {0x00, 0x18, 0x02};
+static u8 DLINK_ATHEROS_1[3] = {0x00, 0x1c, 0xf0};
+static u8 DLINK_ATHEROS_2[3] = {0x00, 0x21, 0x91};
+static u8 CISCO_BROADCOM[3] = {0x00, 0x17, 0x94};
+#if defined(RTL8192SU)
+static u8 NETGEAR_BROADCOM[3] = {0x00, 0x1f, 0x33};
+#endif
+static u8 LINKSYS_MARVELL_4400N[3] = {0x00, 0x14, 0xa4}; 
+void HTUpdateDefaultSetting(struct rtllib_device* ieee)
+{
+	PRT_HIGH_THROUGHPUT	pHTInfo = ieee->pHTInfo;
+	
+#ifdef RTL8192CE
+	pHTInfo->bRDGEnable = 0;
+#endif
+	
+	pHTInfo->bRegShortGI20MHz= 1;
+	pHTInfo->bRegShortGI40MHz= 1;
+
+	pHTInfo->bRegBW40MHz = 1;
+
+	if(pHTInfo->bRegBW40MHz)
+		pHTInfo->bRegSuppCCK = 1;
+	else
+		pHTInfo->bRegSuppCCK = true;
+
+	pHTInfo->nAMSDU_MaxSize = 7935UL;
+	pHTInfo->bAMSDU_Support = 0;
+
+	pHTInfo->bAMPDUEnable = 1; 
+	pHTInfo->AMPDU_Factor = 2; 
+	pHTInfo->MPDU_Density = 0;
+
+	pHTInfo->SelfMimoPs = 3;
+	if(pHTInfo->SelfMimoPs == 2)
+		pHTInfo->SelfMimoPs = 3;
+	ieee->bTxDisableRateFallBack = 0;
+	ieee->bTxUseDriverAssingedRate = 0;	
+
+	ieee->bTxEnableFwCalcDur = 1;
+
+	pHTInfo->bRegRT2RTAggregation = 1;
+	
+	pHTInfo->bRegRxReorderEnable = 1;
+	pHTInfo->RxReorderWinSize = 64;
+	pHTInfo->RxReorderPendingTime = 30;
+
+#ifdef USB_TX_DRIVER_AGGREGATION_ENABLE
+	pHTInfo->UsbTxAggrNum = 4;
+#endif
+#ifdef USB_RX_AGGREGATION_SUPPORT
+#ifdef RTL8192SU
+	pHTInfo->UsbRxFwAggrEn = 1;
+	pHTInfo->UsbRxFwAggrPageNum = 48;
+	pHTInfo->UsbRxFwAggrPacketNum = 8;
+	pHTInfo->UsbRxFwAggrTimeout = 4;
+	pHTInfo->UsbRxPageSize= 128;
+#else
+	pHTInfo->UsbRxFwAggrEn = 1;
+	pHTInfo->UsbRxFwAggrPageNum = 24;
+	pHTInfo->UsbRxFwAggrPacketNum = 8;
+	pHTInfo->UsbRxFwAggrTimeout = 8; 
+#endif
+#endif
+	
+
+}
+void HTDebugHTCapability(u8* CapIE, u8* TitleString )
+{
+	
+	static u8	EWC11NHTCap[] = {0x00, 0x90, 0x4c, 0x33};	
+	PHT_CAPABILITY_ELE 		pCapELE;
+	
+	if(!memcmp(CapIE, EWC11NHTCap, sizeof(EWC11NHTCap)))
+	{
+		RTLLIB_DEBUG(RTLLIB_DL_HT, "EWC IE in %s()\n", __FUNCTION__);
+		pCapELE = (PHT_CAPABILITY_ELE)(&CapIE[4]);		
+	}else
+		pCapELE = (PHT_CAPABILITY_ELE)(&CapIE[0]);		
+	
+	RTLLIB_DEBUG(RTLLIB_DL_HT, "<Log HT Capability>. Called by %s\n", TitleString );
+
+	RTLLIB_DEBUG(RTLLIB_DL_HT,  "\tSupported Channel Width = %s\n", (pCapELE->ChlWidth)?"20MHz": "20/40MHz");
+	RTLLIB_DEBUG(RTLLIB_DL_HT,  "\tSupport Short GI for 20M = %s\n", (pCapELE->ShortGI20Mhz)?"YES": "NO");
+	RTLLIB_DEBUG(RTLLIB_DL_HT,  "\tSupport Short GI for 40M = %s\n", (pCapELE->ShortGI40Mhz)?"YES": "NO");
+	RTLLIB_DEBUG(RTLLIB_DL_HT,  "\tSupport TX STBC = %s\n", (pCapELE->TxSTBC)?"YES": "NO");
+	RTLLIB_DEBUG(RTLLIB_DL_HT,  "\tMax AMSDU Size = %s\n", (pCapELE->MaxAMSDUSize)?"3839": "7935");
+	RTLLIB_DEBUG(RTLLIB_DL_HT,  "\tSupport CCK in 20/40 mode = %s\n", (pCapELE->DssCCk)?"YES": "NO");
+	RTLLIB_DEBUG(RTLLIB_DL_HT,  "\tMax AMPDU Factor = %d\n", pCapELE->MaxRxAMPDUFactor);
+	RTLLIB_DEBUG(RTLLIB_DL_HT,  "\tMPDU Density = %d\n", pCapELE->MPDUDensity);
+	RTLLIB_DEBUG(RTLLIB_DL_HT,  "\tMCS Rate Set = [%x][%x][%x][%x][%x]\n", pCapELE->MCS[0],\
+				pCapELE->MCS[1], pCapELE->MCS[2], pCapELE->MCS[3], pCapELE->MCS[4]);
+	return;
+		
+}
+void HTDebugHTInfo(u8*	InfoIE, u8* TitleString)
+{
+	
+	static u8	EWC11NHTInfo[] = {0x00, 0x90, 0x4c, 0x34};	
+	PHT_INFORMATION_ELE		pHTInfoEle;
+	
+	if(!memcmp(InfoIE, EWC11NHTInfo, sizeof(EWC11NHTInfo)))
+	{
+		RTLLIB_DEBUG(RTLLIB_DL_HT, "EWC IE in %s()\n", __FUNCTION__);
+		pHTInfoEle = (PHT_INFORMATION_ELE)(&InfoIE[4]);			
+	}else
+		pHTInfoEle = (PHT_INFORMATION_ELE)(&InfoIE[0]);
+	
+		
+	RTLLIB_DEBUG(RTLLIB_DL_HT, "<Log HT Information Element>. Called by %s\n", TitleString);
+
+	RTLLIB_DEBUG(RTLLIB_DL_HT, "\tPrimary channel = %d\n", pHTInfoEle->ControlChl);
+	RTLLIB_DEBUG(RTLLIB_DL_HT, "\tSenondary channel =");
+	switch(pHTInfoEle->ExtChlOffset)
+	{
+		case 0:
+			RTLLIB_DEBUG(RTLLIB_DL_HT, "Not Present\n");		
+			break;
+		case 1:
+			RTLLIB_DEBUG(RTLLIB_DL_HT, "Upper channel\n");
+			break;
+		case 2:
+			RTLLIB_DEBUG(RTLLIB_DL_HT, "Reserved. Eooro!!!\n");		
+			break;
+		case 3:
+			RTLLIB_DEBUG(RTLLIB_DL_HT, "Lower Channel\n");		
+			break;
+	}
+	RTLLIB_DEBUG(RTLLIB_DL_HT, "\tRecommended channel width = %s\n", (pHTInfoEle->RecommemdedTxWidth)?"20Mhz": "40Mhz");
+
+	RTLLIB_DEBUG(RTLLIB_DL_HT, "\tOperation mode for protection = ");
+	switch(pHTInfoEle->OptMode)
+	{
+		case 0:
+			RTLLIB_DEBUG(RTLLIB_DL_HT, "No Protection\n");		
+			break;
+		case 1:
+			RTLLIB_DEBUG(RTLLIB_DL_HT, "HT non-member protection mode\n");
+			break;
+		case 2:
+			RTLLIB_DEBUG(RTLLIB_DL_HT, "Suggest to open protection\n");		
+			break;
+		case 3:
+			RTLLIB_DEBUG(RTLLIB_DL_HT, "HT mixed mode\n");		
+			break;
+	}
+
+	RTLLIB_DEBUG(RTLLIB_DL_HT, "\tBasic MCS Rate Set = [%x][%x][%x][%x][%x]\n", pHTInfoEle->BasicMSC[0],\
+				pHTInfoEle->BasicMSC[1], pHTInfoEle->BasicMSC[2], pHTInfoEle->BasicMSC[3], pHTInfoEle->BasicMSC[4]);
+	return;
+}
+
+bool IsHTHalfNmode40Bandwidth(struct rtllib_device* ieee)
+{
+	bool			retValue = false;
+	PRT_HIGH_THROUGHPUT	 pHTInfo = ieee->pHTInfo;
+
+	if(pHTInfo->bCurrentHTSupport == false )	
+		retValue = false;
+	else if(pHTInfo->bRegBW40MHz == false)	
+		retValue = false;
+	else if(!ieee->GetHalfNmodeSupportByAPsHandler(ieee->dev)) 	
+		retValue = false;
+	else if(((PHT_CAPABILITY_ELE)(pHTInfo->PeerHTCapBuf))->ChlWidth) 
+		retValue = true;
+	else
+		retValue = false;
+
+	return retValue;	
+}
+
+bool IsHTHalfNmodeSGI(struct rtllib_device* ieee, bool is40MHz)
+{
+	bool			retValue = false;
+	PRT_HIGH_THROUGHPUT	 pHTInfo = ieee->pHTInfo;
+
+	if(pHTInfo->bCurrentHTSupport == false )	
+		retValue = false;
+	else if(!ieee->GetHalfNmodeSupportByAPsHandler(ieee->dev)) 	
+		retValue = false;
+	else if(is40MHz) 
+	{
+		if(((PHT_CAPABILITY_ELE)(pHTInfo->PeerHTCapBuf))->ShortGI40Mhz) 
+			retValue = true;
+		else
+			retValue = false;
+	}
+	else
+	{
+		if(((PHT_CAPABILITY_ELE)(pHTInfo->PeerHTCapBuf))->ShortGI20Mhz) 
+			retValue = true;
+		else
+			retValue = false;
+	}	
+
+	return retValue;	
+}
+
+u16 HTHalfMcsToDataRate(struct rtllib_device* ieee, 	u8	nMcsRate)
+{
+	
+	u8	is40MHz;
+	u8	isShortGI;
+	
+	is40MHz  =  (IsHTHalfNmode40Bandwidth(ieee))?1:0;
+	isShortGI = (IsHTHalfNmodeSGI(ieee, is40MHz))? 1:0;
+						
+	return MCS_DATA_RATE[is40MHz][isShortGI][(nMcsRate&0x7f)];
+}
+
+
+u16 HTMcsToDataRate( struct rtllib_device* ieee, u8 nMcsRate)
+{
+	PRT_HIGH_THROUGHPUT	pHTInfo = ieee->pHTInfo;
+	
+	u8	is40MHz = (pHTInfo->bCurBW40MHz)?1:0;
+	u8	isShortGI = (pHTInfo->bCurBW40MHz)?
+						((pHTInfo->bCurShortGI40MHz)?1:0):
+						((pHTInfo->bCurShortGI20MHz)?1:0);
+	return MCS_DATA_RATE[is40MHz][isShortGI][(nMcsRate&0x7f)];
+}
+
+u16  TxCountToDataRate( struct rtllib_device* ieee, u8 nDataRate)
+{
+	u16		CCKOFDMRate[12] = {0x02 , 0x04 , 0x0b , 0x16 , 0x0c , 0x12 , 0x18 , 0x24 , 0x30 , 0x48 , 0x60 , 0x6c};
+	u8	is40MHz = 0;
+	u8	isShortGI = 0;
+	
+	if(nDataRate < 12)
+	{
+		return CCKOFDMRate[nDataRate];
+	}
+	else
+	{
+		if (nDataRate >= 0x10 && nDataRate <= 0x1f)
+		{
+			is40MHz = 0;
+			isShortGI = 0;
+
+		}
+		else if(nDataRate >=0x20  && nDataRate <= 0x2f ) 
+		{
+			is40MHz = 1;
+			isShortGI = 0;		
+
+		}
+		else if(nDataRate >= 0x30  && nDataRate <= 0x3f )  
+		{
+			is40MHz = 0;
+			isShortGI = 1;		
+
+		}
+		else if(nDataRate >= 0x40  && nDataRate <= 0x4f ) 
+		{
+			is40MHz = 1;
+			isShortGI = 1;		
+
+		}
+		return MCS_DATA_RATE[is40MHz][isShortGI][nDataRate&0xf];
+	}
+}
+
+
+
+bool IsHTHalfNmodeAPs(struct rtllib_device* ieee)
+{
+	bool			retValue = false;
+	struct rtllib_network* net = &ieee->current_network;
+#if 0
+	if(ieee->bHalfNMode == false)
+		retValue = false;		
+	else
+#endif		
+	if((memcmp(net->bssid, BELKINF5D8233V1_RALINK, 3)==0) ||
+		     (memcmp(net->bssid, BELKINF5D82334V3_RALINK, 3)==0) ||
+		     (memcmp(net->bssid, PCI_RALINK, 3)==0) ||
+		     (memcmp(net->bssid, EDIMAX_RALINK, 3)==0) ||
+		     (memcmp(net->bssid, AIRLINK_RALINK, 3)==0) ||
+		     (net->ralink_cap_exist))
+		retValue = true;
+	else if((memcmp(net->bssid, UNKNOWN_BORADCOM, 3)==0) ||
+    		    (memcmp(net->bssid, LINKSYSWRT330_LINKSYSWRT300_BROADCOM, 3)==0)||
+    		    (memcmp(net->bssid, LINKSYSWRT350_LINKSYSWRT150_BROADCOM, 3)==0)||
+    		    (net->broadcom_cap_exist))
+    		  retValue = true;
+	else if(net->bssht.bdRT2RTAggregation)
+		retValue = true;
+	else
+		retValue = false;
+
+	return retValue;
+}
+
+void HTIOTPeerDetermine(struct rtllib_device* ieee)
+{
+	PRT_HIGH_THROUGHPUT	pHTInfo = ieee->pHTInfo;
+	struct rtllib_network* net = &ieee->current_network;
+	if(net->bssht.bdRT2RTAggregation){
+		pHTInfo->IOTPeer = HT_IOT_PEER_REALTEK;
+		if(net->bssht.RT2RT_HT_Mode & RT_HT_CAP_USE_92SE){
+			pHTInfo->IOTPeer = HT_IOT_PEER_REALTEK_92SE;
+		}
+		if(net->bssht.RT2RT_HT_Mode & RT_HT_CAP_USE_SOFTAP){
+			pHTInfo->IOTPeer = HT_IOT_PEER_92U_SOFTAP;
+		}
+	}
+	else if(net->broadcom_cap_exist)
+		pHTInfo->IOTPeer = HT_IOT_PEER_BROADCOM;
+	else if((memcmp(net->bssid, UNKNOWN_BORADCOM, 3)==0) ||
+			(memcmp(net->bssid, LINKSYSWRT330_LINKSYSWRT300_BROADCOM, 3)==0)||
+			(memcmp(net->bssid, LINKSYSWRT350_LINKSYSWRT150_BROADCOM, 3)==0)/*||
+			(memcmp(net->bssid, NETGEAR834Bv2_BROADCOM, 3)==0) */)
+		pHTInfo->IOTPeer = HT_IOT_PEER_BROADCOM;
+	else if((memcmp(net->bssid, BELKINF5D8233V1_RALINK, 3)==0) ||
+			(memcmp(net->bssid, BELKINF5D82334V3_RALINK, 3)==0) ||
+			(memcmp(net->bssid, PCI_RALINK, 3)==0) ||
+			(memcmp(net->bssid, EDIMAX_RALINK, 3)==0) || 
+			(memcmp(net->bssid, AIRLINK_RALINK, 3)==0) ||
+			 net->ralink_cap_exist)
+		pHTInfo->IOTPeer = HT_IOT_PEER_RALINK;
+	else if((net->atheros_cap_exist )|| 
+		(memcmp(net->bssid, DLINK_ATHEROS_1, 3) == 0)||
+		(memcmp(net->bssid, DLINK_ATHEROS_2, 3) == 0))
+		pHTInfo->IOTPeer = HT_IOT_PEER_ATHEROS;
+	else if((memcmp(net->bssid, CISCO_BROADCOM, 3)==0)||net->cisco_cap_exist)
+		pHTInfo->IOTPeer = HT_IOT_PEER_CISCO;
+	else if ((memcmp(net->bssid, LINKSYS_MARVELL_4400N, 3) == 0) ||
+		  net->marvell_cap_exist)
+		pHTInfo->IOTPeer = HT_IOT_PEER_MARVELL;
+	else
+		pHTInfo->IOTPeer = HT_IOT_PEER_UNKNOWN;
+
+	RTLLIB_DEBUG(RTLLIB_DL_IOT, "Joseph debug!! IOTPEER: %x\n", pHTInfo->IOTPeer);
+}
+
+u8 HTIOTActIsDisableMCS14(struct rtllib_device* ieee, u8* PeerMacAddr)
+{
+	u8 ret = 0;
+#if 0
+#if (HAL_CODE_BASE==RTL8192 && DEV_BUS_TYPE==USB_INTERFACE)
+	if((memcmp(PeerMacAddr, UNKNOWN_BORADCOM, 3)==0) ||
+    		(memcmp(PeerMacAddr, LINKSYSWRT330_LINKSYSWRT300_BROADCOM, 3)==0)	
+	    )
+	{
+		ret = 1;
+	}
+
+		
+	if(pHTInfo->bCurrentRT2RTAggregation)
+	{
+		ret = 1;
+	}
+#endif
+#endif		
+	return ret;
+ }
+
+
+bool HTIOTActIsDisableMCS15(struct rtllib_device* ieee)
+{
+	bool retValue = false;
+
+#if defined(RTL8192U)
+	if(ieee->current_network.bssht.bdBandWidth == HT_CHANNEL_WIDTH_20_40)
+	retValue = true;
+	else
+		retValue = false;
+#endif
+
+	
+	return retValue;
+}
+
+bool HTIOTActIsDisableMCSTwoSpatialStream(struct rtllib_device* ieee)
+{
+	bool retValue = false;
+#ifdef RTL8192U
+	struct rtllib_network* net = &ieee->current_network;
+
+	if((ieee->pHTInfo->bCurrentHTSupport == true) && (ieee->pairwise_key_type == KEY_TYPE_CCMP))
+	{
+		if((memcmp(net->bssid, BELKINF5D8233V1_RALINK, 3)==0) ||
+				(memcmp(net->bssid, PCI_RALINK, 3)==0) ||
+				(memcmp(net->bssid, EDIMAX_RALINK, 3)==0))
+		{
+			retValue = false;
+		}
+	}
+#endif
+#if defined(RTL8192SU) || defined RTL8192CE
+	PRT_HIGH_THROUGHPUT	pHTInfo = ieee->pHTInfo;
+	if (ieee->rtllib_ap_sec_type && 
+		(ieee->rtllib_ap_sec_type(ieee)&(SEC_ALG_WEP|SEC_ALG_TKIP)))
+	{
+		if( (pHTInfo->IOTPeer != HT_IOT_PEER_ATHEROS) &&
+			(pHTInfo->IOTPeer != HT_IOT_PEER_UNKNOWN) &&
+			(pHTInfo->IOTPeer != HT_IOT_PEER_MARVELL) &&
+			(pHTInfo->IOTPeer != HT_IOT_PEER_REALTEK_92SE) &&
+			(pHTInfo->IOTPeer != HT_IOT_PEER_RALINK) )
+			retValue = true;
+	}
+#elif defined(RTL8192SE) 
+	PRT_HIGH_THROUGHPUT	pHTInfo = ieee->pHTInfo;
+	if (ieee->rtllib_ap_sec_type && 
+		(ieee->rtllib_ap_sec_type(ieee)&SEC_ALG_TKIP)) {
+			if(pHTInfo->IOTPeer == HT_IOT_PEER_RALINK){
+				retValue = true;
+			}
+		}
+#endif
+	return retValue;
+}
+
+u8 HTIOTActIsDisableEDCATurbo(struct rtllib_device* 	ieee, u8* PeerMacAddr)
+{
+	u8	retValue = false;	
+	
+	return retValue;
+#if 0
+	if((memcmp(PeerMacAddr, UNKNOWN_BORADCOM, 3)==0)|| 
+		(memcmp(PeerMacAddr, LINKSYSWRT330_LINKSYSWRT300_BROADCOM, 3)==0)||
+		(memcmp(PeerMacAddr, LINKSYSWRT350_LINKSYSWRT150_BROADCOM, 3)==0))
+
+	{
+		retValue = 1;	
+	}
+
+	return retValue;
+#endif
+}
+
+
+bool HTIOTActIsEnableBETxOPLimit(struct rtllib_device* ieee)
+{
+	bool	retValue = false;
+
+#if defined RTL8192SU 
+	if(ieee->mode == IEEE_G)
+		retValue = true;
+#elif defined RTL8192CE
+	if(ieee->mode == IEEE_G ||
+		(ieee->rtllib_ap_sec_type(ieee)&(SEC_ALG_WEP|SEC_ALG_TKIP)))
+		retValue = true;
+#endif
+
+	return retValue;
+}
+
+
+u8 HTIOTActIsMgntUseCCK6M(struct rtllib_device* ieee,struct rtllib_network *network)
+{
+	u8	retValue = 0;
+
+		
+#if (defined RTL8192U || defined RTL8192E || defined RTL8190P)	
+	{		
+	if(ieee->pHTInfo->IOTPeer == HT_IOT_PEER_BROADCOM)	
+	{
+		retValue = 1;
+	}	
+	}
+#endif
+
+	return retValue;
+}
+
+u8
+HTIOTActWAIOTBroadcom(struct rtllib_device* ieee)
+{
+	PRT_HIGH_THROUGHPUT	pHTInfo = ieee->pHTInfo;
+	u8		retValue = false;
+	u8		boundary=59;
+
+	pHTInfo->bWAIotBroadcom = false;
+	if(ieee->pHTInfo->IOTPeer == HT_IOT_PEER_BROADCOM)	
+	{	
+		if(ieee->current_network.bssht.bdBandWidth == HT_CHANNEL_WIDTH_20_40)		
+		{	
+			if(!(pHTInfo->bCurBW40MHz))
+			{	
+				if(ieee->current_network.mode != WIRELESS_MODE_B)
+				{
+					pHTInfo->bWAIotBroadcom = true;
+					
+					if(ieee->b_customer_lenovo_id == true)
+						boundary = 30;
+
+					if( ieee->current_network.RSSI >= boundary)
+						retValue = true;
+				}
+			}else{
+				;
+			}
+		}
+	}
+	return retValue;
+}
+
+u8 HTIOTActIsForcedCTS2Self(struct rtllib_device *ieee, struct rtllib_network *network)
+{
+	u8 	retValue = 0;
+#if (defined RTL8192SE || defined RTL8192SU || defined RTL8192CE)
+	if((ieee->pHTInfo->IOTPeer == HT_IOT_PEER_MARVELL) ||(ieee->pHTInfo->IOTPeer == HT_IOT_PEER_ATHEROS) )
+#else
+	if(ieee->pHTInfo->IOTPeer == HT_IOT_PEER_MARVELL)
+#endif
+	{
+		retValue = 1;
+	}
+	
+	return retValue;
+}
+
+u8 HTIOTActIsForcedRTSCTS(struct rtllib_device *ieee, struct rtllib_network *network)
+{
+	u8	retValue = 0;
+#if defined(RTL8192SE) || defined(RTL8192SU) 
+	if(ieee->pHTInfo->bCurrentHTSupport)
+	{
+		if((ieee->pHTInfo->IOTPeer != HT_IOT_PEER_REALTEK)&&
+		   (ieee->pHTInfo->IOTPeer != HT_IOT_PEER_REALTEK_92SE))
+	{
+			if((ieee->pHTInfo->IOTAction & HT_IOT_ACT_TX_NO_AGGREGATION) == 0)
+				retValue = 1;
+		}
+	}
+#endif
+	return retValue;
+}
+
+u8
+HTIOTActIsForcedAMSDU8K(struct rtllib_device *ieee, struct rtllib_network *network)
+{
+	u8 retValue = 0;
+
+	return retValue;
+}
+
+u8 HTIOTActIsCCDFsync(struct rtllib_device *ieee)
+{
+	u8	retValue = 0;
+#if (defined RTL8190P || defined RTL8192U  || defined RTL8192SU)
+	if(ieee->pHTInfo->IOTPeer == HT_IOT_PEER_BROADCOM)
+	{
+		retValue = 1;
+	}
+#endif	
+	return retValue;
+}
+	
+u8
+HTIOCActRejcectADDBARequest(struct rtllib_network *network)
+{
+	u8	retValue = 0;
+#if (defined RTL8192SE || defined RTL8192SU || defined RTL8192CE)
+	{
+		
+		
+	}
+#endif
+	
+	return retValue;
+
+}
+
+u8
+  HTIOTActIsEDCABiasRx(struct rtllib_device* ieee,struct rtllib_network *network)
+{
+	u8	retValue = 0;
+#ifdef RTL8192SU
+	PRT_HIGH_THROUGHPUT	pHTInfo = ieee->pHTInfo;
+	{
+		if(pHTInfo->IOTPeer==HT_IOT_PEER_ATHEROS || 
+		   pHTInfo->IOTPeer==HT_IOT_PEER_BROADCOM ||
+		   pHTInfo->IOTPeer==HT_IOT_PEER_RALINK)
+			return 1;
+		
+	}
+#elif defined RTL8192CE
+	PRT_HIGH_THROUGHPUT	pHTInfo = ieee->pHTInfo;
+	{
+		if(pHTInfo->IOTPeer==HT_IOT_PEER_ATHEROS || 
+		   pHTInfo->IOTPeer==HT_IOT_PEER_RALINK)
+			return 1;
+		
+	}
+#elif defined RTL8192SE 
+	PRT_HIGH_THROUGHPUT	pHTInfo = ieee->pHTInfo;
+	{
+            if(ieee->rtllib_ap_sec_type != NULL) 
+                if(ieee->rtllib_ap_sec_type(ieee) == SEC_ALG_CCMP)
+                    if(pHTInfo->IOTPeer==HT_IOT_PEER_RALINK){
+                        return 1;
+                    }
+		
+	}
+#endif
+	return retValue;
+}
+
+u8
+HTIOTActDisableShortGI(struct rtllib_device* ieee,struct rtllib_network *network)
+{
+	u8	retValue = 0;
+	PRT_HIGH_THROUGHPUT	pHTInfo = ieee->pHTInfo;
+
+	if(pHTInfo->IOTPeer==HT_IOT_PEER_RALINK)
+	{
+			retValue = 1;
+	}
+
+	return retValue;
+}
+
+u8
+HTIOTActDisableHighPower(struct rtllib_device* ieee,struct rtllib_network *network)
+{
+	u8	retValue = 0;
+#if (defined RTL8192SE || defined RTL8192SU || defined RTL8192CE)
+	PRT_HIGH_THROUGHPUT	pHTInfo = ieee->pHTInfo;
+#endif
+
+#ifdef RTL8192SU
+	if(pHTInfo->IOTPeer==HT_IOT_PEER_RALINK ||
+		pHTInfo->IOTPeer==HT_IOT_PEER_REALTEK ||
+		pHTInfo->IOTPeer==HT_IOT_PEER_REALTEK_92SE)
+	{
+			retValue = 1;
+	}
+#elif defined RTL8192SE || defined RTL8192CE
+	if(pHTInfo->IOTPeer==HT_IOT_PEER_RALINK ||
+		pHTInfo->IOTPeer==HT_IOT_PEER_REALTEK )
+	{
+			retValue = 1;
+	}
+#endif
+	return retValue;
+}
+
+void
+HTIOTActDetermineRaFunc(struct rtllib_device* ieee,	bool	bPeerRx2ss)
+{
+	PRT_HIGH_THROUGHPUT	pHTInfo = ieee->pHTInfo;
+	pHTInfo->IOTRaFunc &= HT_IOT_RAFUNC_DISABLE_ALL;
+
+	if(pHTInfo->IOTPeer == HT_IOT_PEER_RALINK && !bPeerRx2ss)
+		pHTInfo->IOTRaFunc |= HT_IOT_RAFUNC_PEER_1R;
+
+	if(pHTInfo->IOTAction & HT_IOT_ACT_AMSDU_ENABLE)
+		pHTInfo->IOTRaFunc |= HT_IOT_RAFUNC_TX_AMSDU;
+
+}
+
+
+u8
+HTIOTActIsDisableTx40MHz(struct rtllib_device* ieee,struct rtllib_network *network)
+{
+	u8	retValue = 0;
+
+#if (defined RTL8192SU || defined RTL8192SE || defined RTL8192CE)
+	PRT_HIGH_THROUGHPUT	pHTInfo = ieee->pHTInfo;
+	if(	(KEY_TYPE_WEP104 == ieee->pairwise_key_type) || 
+		(KEY_TYPE_WEP40 == ieee->pairwise_key_type) ||
+		(KEY_TYPE_WEP104 == ieee->group_key_type) ||
+		(KEY_TYPE_WEP40 == ieee->group_key_type) ||
+		(KEY_TYPE_TKIP == ieee->pairwise_key_type) )
+	{
+		if((pHTInfo->IOTPeer==HT_IOT_PEER_REALTEK) && (network->bssht.bdSupportHT)) 
+			retValue = 1;
+	}
+#endif
+
+	return retValue;
+}
+
+u8
+HTIOTActIsTxNoAggregation(struct rtllib_device* ieee,struct rtllib_network *network)
+{
+	u8 retValue = 0;
+
+#if (defined RTL8192SU || defined RTL8192SE || defined RTL8192CE)
+	PRT_HIGH_THROUGHPUT	pHTInfo = ieee->pHTInfo;
+	if(	(KEY_TYPE_WEP104 == ieee->pairwise_key_type) || 
+		(KEY_TYPE_WEP40 == ieee->pairwise_key_type) ||
+		(KEY_TYPE_WEP104 == ieee->group_key_type) ||
+		(KEY_TYPE_WEP40 == ieee->group_key_type) ||
+		(KEY_TYPE_TKIP == ieee->pairwise_key_type) )
+	{
+		if(pHTInfo->IOTPeer==HT_IOT_PEER_REALTEK)
+			retValue = 1;
+	}
+#endif
+
+	return retValue;
+}
+
+
+u8
+HTIOTActIsDisableTx2SS(struct rtllib_device* ieee,struct rtllib_network *network)
+{
+	u8	retValue = 0;
+
+#if (defined RTL8192SU || defined RTL8192SE || defined RTL8192CE)
+	PRT_HIGH_THROUGHPUT	pHTInfo = ieee->pHTInfo;
+	if(	(KEY_TYPE_WEP104 == ieee->pairwise_key_type) || 
+		(KEY_TYPE_WEP40 == ieee->pairwise_key_type) ||
+		(KEY_TYPE_WEP104 == ieee->group_key_type) ||
+		(KEY_TYPE_WEP40 == ieee->group_key_type) ||
+		(KEY_TYPE_TKIP == ieee->pairwise_key_type) )
+	{
+		if((pHTInfo->IOTPeer==HT_IOT_PEER_REALTEK) && (network->bssht.bdSupportHT))
+			retValue = 1;
+	}
+#endif
+
+	return retValue;
+}
+
+
+bool HTIOCActIsDisableCckRate(struct rtllib_device* ieee,struct rtllib_network *network)
+{
+	bool 	retValue = false;
+#if defined(RTL8192SU)
+	PRT_HIGH_THROUGHPUT	pHTInfo = ieee->pHTInfo;
+	if(pHTInfo->IOTPeer == HT_IOT_PEER_BROADCOM)
+	{
+		if((memcmp(network->bssid, NETGEAR_BROADCOM, 3)==0)
+			&& (network->bssht.bdBandWidth == HT_CHANNEL_WIDTH_20_40))
+			return true;
+	}
+#endif
+	return retValue;
+}
+
+
+bool HTIOCActAllowPeerAggOnePacket(struct rtllib_device* ieee,struct rtllib_network *network)
+{
+	bool 	retValue = false;
+#if defined(RTL8192SE) || defined(RTL8192SU) 
+	PRT_HIGH_THROUGHPUT	pHTInfo = ieee->pHTInfo;
+	{
+		if(ieee->VersionID<2)
+		if(pHTInfo->IOTPeer == HT_IOT_PEER_MARVELL)
+			return true;
+		
+	}
+#endif
+	return retValue;
+}
+
+bool
+HTIOTActIsNullDataPowerSaving(struct rtllib_device* ieee,struct rtllib_network *network)
+{
+	bool	retValue = false;
+#if defined(RTL8192SE) || defined(RTL8192SU)
+	PRT_HIGH_THROUGHPUT	pHTInfo = ieee->pHTInfo;
+	{
+		if(pHTInfo->IOTPeer == HT_IOT_PEER_BROADCOM) 
+			return true;
+		
+	}
+#endif
+	return retValue;
+}
+
+void HTResetIOTSetting(
+	PRT_HIGH_THROUGHPUT		pHTInfo
+)
+{
+	pHTInfo->IOTAction = 0;
+	pHTInfo->IOTPeer = HT_IOT_PEER_UNKNOWN;
+	pHTInfo->IOTRaFunc = 0;
+}
+
+
+#ifdef _RTL8192_EXT_PATCH_
+void HTConstructCapabilityElement(struct rtllib_device* ieee, u8* posHTCap, u8* len, u8 IsEncrypt, u8 bIsBcn)
+#else	
+void HTConstructCapabilityElement(struct rtllib_device* ieee, u8* posHTCap, u8* len, u8 IsEncrypt)
+#endif	
+{	
+	PRT_HIGH_THROUGHPUT	pHT = ieee->pHTInfo;
+	PHT_CAPABILITY_ELE 	pCapELE = NULL;
+	
+	if ((posHTCap == NULL) || (pHT == NULL))
+	{
+		RTLLIB_DEBUG(RTLLIB_DL_ERR, "posHTCap or pHTInfo can't be null in HTConstructCapabilityElement()\n");
+		return;
+	}
+	memset(posHTCap, 0, *len);	
+	if(pHT->ePeerHTSpecVer == HT_SPEC_VER_EWC)
+	{
+		u8	EWC11NHTCap[] = {0x00, 0x90, 0x4c, 0x33};	
+		memcpy(posHTCap, EWC11NHTCap, sizeof(EWC11NHTCap));
+		pCapELE = (PHT_CAPABILITY_ELE)&(posHTCap[4]);
+	}else 
+	{
+		pCapELE = (PHT_CAPABILITY_ELE)posHTCap;
+	}
+
+	pCapELE->AdvCoding 		= 0; 
+	if(ieee->GetHalfNmodeSupportByAPsHandler(ieee->dev))
+	{
+		pCapELE->ChlWidth = 0;
+	}	
+	else
+	{
+#ifdef _RTL8192_EXT_PATCH_
+		if(bIsBcn)
+			pCapELE->ChlWidth = (pHT->bCurBW40MHz?1:0);
+		else
+#endif	
+			pCapELE->ChlWidth = (pHT->bRegBW40MHz?1:0);
+	}
+	
+	pCapELE->MimoPwrSave 		= pHT->SelfMimoPs;
+	pCapELE->GreenField		= 0; 
+	pCapELE->ShortGI20Mhz		= 1; 
+	pCapELE->ShortGI40Mhz		= 1; 
+	pCapELE->TxSTBC 		= 1;
+#ifdef Rtl8192SE
+	pCapELE->TxSTBC 		= 0;
+#endif
+	pCapELE->RxSTBC 		= 0;
+	pCapELE->DelayBA		= 0;	
+	pCapELE->MaxAMSDUSize	= (MAX_RECEIVE_BUFFER_SIZE>=7935)?1:0;
+	pCapELE->DssCCk 		= ((pHT->bRegBW40MHz)?(pHT->bRegSuppCCK?1:0):0);
+	pCapELE->PSMP			= 0; 
+	pCapELE->LSigTxopProtect	= 0; 
+
+
+	RTLLIB_DEBUG(RTLLIB_DL_HT, "TX HT cap/info ele BW=%d MaxAMSDUSize:%d DssCCk:%d\n", pCapELE->ChlWidth, pCapELE->MaxAMSDUSize, pCapELE->DssCCk);
+
+	if( IsEncrypt) 
+	{
+		pCapELE->MPDUDensity 	= 7; 
+		pCapELE->MaxRxAMPDUFactor 	= 2; 
+	}
+	else
+	{
+		pCapELE->MaxRxAMPDUFactor 	= 3; 
+		pCapELE->MPDUDensity 	= 0; 
+	}		
+
+	memcpy(pCapELE->MCS, ieee->Regdot11HTOperationalRateSet, 16);
+	if(pHT->IOTAction & HT_IOT_ACT_DISABLE_MCS15)
+		pCapELE->MCS[1] &= 0x7f;
+
+	if(pHT->IOTAction & HT_IOT_ACT_DISABLE_MCS14)
+		pCapELE->MCS[1] &= 0xbf;
+
+	if(pHT->IOTAction & HT_IOT_ACT_DISABLE_ALL_2SS)
+		pCapELE->MCS[1] &= 0x00;
+
+	if(ieee->GetHalfNmodeSupportByAPsHandler(ieee->dev))
+	{	
+		int i;
+		for(i = 1; i< 16; i++)
+			pCapELE->MCS[i] = 0;
+	}
+	
+	memset(&pCapELE->ExtHTCapInfo, 0, 2);
+
+
+	memset(pCapELE->TxBFCap, 0, 4);
+
+	pCapELE->ASCap = 0;
+	if(pHT->ePeerHTSpecVer == HT_SPEC_VER_EWC)
+		*len = 30 + 2;
+	else
+		*len = 26 + 2;
+		
+
+		
+	
+	return;
+	
+}
+void HTConstructInfoElement(struct rtllib_device* ieee, u8* posHTInfo, u8* len, u8 IsEncrypt)
+{
+	PRT_HIGH_THROUGHPUT	pHT = ieee->pHTInfo;	
+	PHT_INFORMATION_ELE		pHTInfoEle = (PHT_INFORMATION_ELE)posHTInfo;
+	if ((posHTInfo == NULL) || (pHTInfoEle == NULL))
+	{
+		RTLLIB_DEBUG(RTLLIB_DL_ERR, "posHTInfo or pHTInfoEle can't be null in HTConstructInfoElement()\n");
+		return;
+	}
+	
+	memset(posHTInfo, 0, *len);
+#ifdef _RTL8192_EXT_PATCH_
+	if ((ieee->iw_mode == IW_MODE_ADHOC) || (ieee->iw_mode == IW_MODE_MASTER) ||(ieee->iw_mode == IW_MODE_MESH) ) 
+#else
+	if ( (ieee->iw_mode == IW_MODE_ADHOC) || (ieee->iw_mode == IW_MODE_MASTER)) 
+#endif
+	{
+		pHTInfoEle->ControlChl 			= ieee->current_network.channel; 
+#ifdef _RTL8192_EXT_PATCH_
+		if((!ieee->only_mesh) && (ieee->iw_mode == IW_MODE_MESH) && (ieee->state == RTLLIB_LINKED))
+			pHTInfoEle->ExtChlOffset 			= ((pHT->bRegBW40MHz == false)?HT_EXTCHNL_OFFSET_NO_EXT:
+												ieee->APExtChlOffset);
+		else if(ieee->iw_mode == IW_MODE_MESH)
+			pHTInfoEle->ExtChlOffset 			= ((pHT->bRegBW40MHz == false)?HT_EXTCHNL_OFFSET_NO_EXT:
+											(ieee->current_mesh_network.channel<=6)?
+												HT_EXTCHNL_OFFSET_UPPER:HT_EXTCHNL_OFFSET_LOWER);
+		else
+#endif
+			pHTInfoEle->ExtChlOffset 			= ((pHT->bRegBW40MHz == false)?HT_EXTCHNL_OFFSET_NO_EXT:
+											(ieee->current_network.channel<=6)?
+												HT_EXTCHNL_OFFSET_UPPER:HT_EXTCHNL_OFFSET_LOWER);
+		pHTInfoEle->RecommemdedTxWidth	= pHT->bRegBW40MHz;
+		pHTInfoEle->RIFS 					= 0;
+		pHTInfoEle->PSMPAccessOnly		= 0;
+		pHTInfoEle->SrvIntGranularity		= 0;
+		pHTInfoEle->OptMode				= pHT->CurrentOpMode;
+		pHTInfoEle->NonGFDevPresent		= 0;
+		pHTInfoEle->DualBeacon			= 0;
+		pHTInfoEle->SecondaryBeacon		= 0;
+		pHTInfoEle->LSigTxopProtectFull		= 0;
+		pHTInfoEle->PcoActive				= 0;
+		pHTInfoEle->PcoPhase				= 0;
+
+		memset(pHTInfoEle->BasicMSC, 0, 16);
+
+
+		*len = 22 + 2; 
+
+	}
+	else
+	{
+		*len = 0;
+	}	
+	return;
+}	
+
+void HTConstructRT2RTAggElement(struct rtllib_device* ieee, u8* posRT2RTAgg, u8* len)
+{
+	if (posRT2RTAgg == NULL) {
+		RTLLIB_DEBUG(RTLLIB_DL_ERR, "posRT2RTAgg can't be null in HTConstructRT2RTAggElement()\n");
+		return;
+	}
+	memset(posRT2RTAgg, 0, *len);
+	*posRT2RTAgg++ = 0x00;
+	*posRT2RTAgg++ = 0xe0;
+	*posRT2RTAgg++ = 0x4c;
+	*posRT2RTAgg++ = 0x02;
+	*posRT2RTAgg++ = 0x01;
+
+#ifdef RTL8192CE
+	*posRT2RTAgg = 0x70;
+#else
+	*posRT2RTAgg = 0x10;
+#endif
+	
+	if(ieee->bSupportRemoteWakeUp) {
+		*posRT2RTAgg |= RT_HT_CAP_USE_WOW;
+	}
+
+	*len = 6 + 2;
+	
+	return;
+
+#ifdef TODO
+	posRT2RTAgg->Length = 6;
+#endif
+
+
+
+
+}
+
+u8 HT_PickMCSRate(struct rtllib_device* ieee, u8* pOperateMCS)
+{
+	u8					i;
+	if (pOperateMCS == NULL)
+	{
+		RTLLIB_DEBUG(RTLLIB_DL_ERR, "pOperateMCS can't be null in HT_PickMCSRate()\n");
+		return false;
+	}
+
+	switch(ieee->mode)
+	{
+	case IEEE_A:
+	case IEEE_B:
+	case IEEE_G:
+			
+			for(i=0;i<=15;i++){
+				pOperateMCS[i] = 0;
+			}
+			break;
+		
+	case IEEE_N_24G:	
+	case IEEE_N_5G:
+			
+			pOperateMCS[0] &=RATE_ADPT_1SS_MASK;	
+			pOperateMCS[1] &=RATE_ADPT_2SS_MASK;
+			pOperateMCS[3] &=RATE_ADPT_MCS32_MASK;
+			break;
+
+	default:
+			
+			break;
+		
+	}
+
+	return true;
+}
+
+u8 HTGetHighestMCSRate(struct rtllib_device* ieee, u8* pMCSRateSet, u8* pMCSFilter)
+{
+	u8		i, j;
+	u8		bitMap;
+	u8		mcsRate = 0;
+	u8		availableMcsRate[16];
+	if (pMCSRateSet == NULL || pMCSFilter == NULL)
+	{
+		RTLLIB_DEBUG(RTLLIB_DL_ERR, "pMCSRateSet or pMCSFilter can't be null in HTGetHighestMCSRate()\n");
+		return false;
+	}
+	for(i=0; i<16; i++)
+		availableMcsRate[i] = pMCSRateSet[i] & pMCSFilter[i];
+
+	for(i = 0; i < 16; i++)
+	{
+		if(availableMcsRate[i] != 0)
+			break;
+	}
+	if(i == 16)
+		return false;
+
+	for(i = 0; i < 16; i++)
+	{
+		if(availableMcsRate[i] != 0)
+		{
+			bitMap = availableMcsRate[i];
+			for(j = 0; j < 8; j++)
+			{
+				if((bitMap%2) != 0)
+				{
+					if(HTMcsToDataRate(ieee, (8*i+j)) > HTMcsToDataRate(ieee, mcsRate))
+						mcsRate = (8*i+j);
+				}
+				bitMap = bitMap>>1;
+			}
+		}
+	}
+	return (mcsRate|0x80);
+}
+	
+u8 HTFilterMCSRate( struct rtllib_device* ieee, u8* pSupportMCS, u8* pOperateMCS)
+{
+	
+	u8 i=0;
+	
+	for(i=0;i<=15;i++){
+		pOperateMCS[i] = ieee->Regdot11TxHTOperationalRateSet[i]&pSupportMCS[i];
+	}
+
+	
+
+	HT_PickMCSRate(ieee, pOperateMCS);
+
+	if(ieee->GetHalfNmodeSupportByAPsHandler(ieee->dev))
+		pOperateMCS[1] = 0;
+	
+	for(i=2; i<=15; i++)
+		pOperateMCS[i] = 0;
+	
+	return true;
+}
+void HTSetConnectBwMode(struct rtllib_device* ieee, HT_CHANNEL_WIDTH	Bandwidth, HT_EXTCHNL_OFFSET	Offset);
+void HTOnAssocRsp(struct rtllib_device *ieee)
+{
+	PRT_HIGH_THROUGHPUT	pHTInfo = ieee->pHTInfo;
+	PHT_CAPABILITY_ELE		pPeerHTCap = NULL;
+	PHT_INFORMATION_ELE		pPeerHTInfo = NULL;
+	u16	nMaxAMSDUSize = 0;
+	u8*	pMcsFilter = NULL;
+
+	static u8				EWC11NHTCap[] = {0x00, 0x90, 0x4c, 0x33};		
+	static u8				EWC11NHTInfo[] = {0x00, 0x90, 0x4c, 0x34};	
+	
+	if( pHTInfo->bCurrentHTSupport == false )
+	{
+		RTLLIB_DEBUG(RTLLIB_DL_ERR, "<=== HTOnAssocRsp(): HT_DISABLE\n");
+		return;
+	}
+	RTLLIB_DEBUG(RTLLIB_DL_HT, "===> HTOnAssocRsp_wq(): HT_ENABLE\n");
+		
+	if(!memcmp(pHTInfo->PeerHTCapBuf,EWC11NHTCap, sizeof(EWC11NHTCap)))
+		pPeerHTCap = (PHT_CAPABILITY_ELE)(&pHTInfo->PeerHTCapBuf[4]);
+	else
+		pPeerHTCap = (PHT_CAPABILITY_ELE)(pHTInfo->PeerHTCapBuf);
+
+	if(!memcmp(pHTInfo->PeerHTInfoBuf, EWC11NHTInfo, sizeof(EWC11NHTInfo)))
+		pPeerHTInfo = (PHT_INFORMATION_ELE)(&pHTInfo->PeerHTInfoBuf[4]);
+	else		
+		pPeerHTInfo = (PHT_INFORMATION_ELE)(pHTInfo->PeerHTInfoBuf);
+	
+#ifdef _RTL8192_EXT_PATCH_
+	ieee->APExtChlOffset = (HT_EXTCHNL_OFFSET)(pPeerHTInfo->ExtChlOffset);
+#endif
+	RTLLIB_DEBUG_DATA(RTLLIB_DL_DATA|RTLLIB_DL_HT, pPeerHTCap, sizeof(HT_CAPABILITY_ELE));
+	HTSetConnectBwMode(ieee, (HT_CHANNEL_WIDTH)(pPeerHTCap->ChlWidth), (HT_EXTCHNL_OFFSET)(pPeerHTInfo->ExtChlOffset));
+#if defined RTL8192SE || defined RTL8192SU || defined RTL8192CE
+	if(pHTInfo->bCurBW40MHz == true)
+#endif
+		pHTInfo->bCurTxBW40MHz = ((pPeerHTInfo->RecommemdedTxWidth == 1)?true:false);
+
+	pHTInfo->bCurShortGI20MHz= 
+		((pHTInfo->bRegShortGI20MHz)?((pPeerHTCap->ShortGI20Mhz==1)?true:false):false);
+	pHTInfo->bCurShortGI40MHz= 
+		((pHTInfo->bRegShortGI40MHz)?((pPeerHTCap->ShortGI40Mhz==1)?true:false):false);
+
+	pHTInfo->bCurSuppCCK = 
+		((pHTInfo->bRegSuppCCK)?((pPeerHTCap->DssCCk==1)?true:false):false);
+
+
+	pHTInfo->bCurrent_AMSDU_Support = pHTInfo->bAMSDU_Support;
+
+	nMaxAMSDUSize = (pPeerHTCap->MaxAMSDUSize==0)?3839:7935;
+
+	if(pHTInfo->nAMSDU_MaxSize > nMaxAMSDUSize )
+		pHTInfo->nCurrent_AMSDU_MaxSize = nMaxAMSDUSize;
+	else
+		pHTInfo->nCurrent_AMSDU_MaxSize = pHTInfo->nAMSDU_MaxSize;
+
+	pHTInfo->bCurrentAMPDUEnable = pHTInfo->bAMPDUEnable;
+	if (ieee->rtllib_ap_sec_type && 
+	   (ieee->rtllib_ap_sec_type(ieee)&(SEC_ALG_WEP|SEC_ALG_TKIP))){
+		if( (pHTInfo->IOTPeer== HT_IOT_PEER_ATHEROS) ||
+				(pHTInfo->IOTPeer == HT_IOT_PEER_UNKNOWN) )
+			pHTInfo->bCurrentAMPDUEnable = false;
+	}		
+		
+	if(!pHTInfo->bRegRT2RTAggregation)
+	{
+		if(pHTInfo->AMPDU_Factor > pPeerHTCap->MaxRxAMPDUFactor)
+			pHTInfo->CurrentAMPDUFactor = pPeerHTCap->MaxRxAMPDUFactor;
+		else
+			pHTInfo->CurrentAMPDUFactor = pHTInfo->AMPDU_Factor;
+
+	} else {
+#if 0	
+		osTmp= PacketGetElement( asocpdu, EID_Vendor, OUI_SUB_REALTEK_AGG, OUI_SUBTYPE_DONT_CARE);
+		if(osTmp.Length >= 5)	
+#endif
+		if (ieee->current_network.bssht.bdRT2RTAggregation)
+		{
+			if( ieee->pairwise_key_type != KEY_TYPE_NA) 
+				pHTInfo->CurrentAMPDUFactor = pPeerHTCap->MaxRxAMPDUFactor;
+			else
+				pHTInfo->CurrentAMPDUFactor = HT_AGG_SIZE_64K;
+		}else
+		{
+			if(pPeerHTCap->MaxRxAMPDUFactor < HT_AGG_SIZE_32K)
+				pHTInfo->CurrentAMPDUFactor = pPeerHTCap->MaxRxAMPDUFactor;
+			else
+				pHTInfo->CurrentAMPDUFactor = HT_AGG_SIZE_32K;
+		}
+	}
+
+#if 0
+	if(pHTInfo->MPDU_Density > pPeerHTCap->MPDUDensity)
+		pHTInfo->CurrentMPDUDensity = pHTInfo->MPDU_Density;
+	else
+		pHTInfo->CurrentMPDUDensity = pPeerHTCap->MPDUDensity;
+	if(ieee->pairwise_key_type != KEY_TYPE_NA ) 
+		pHTInfo->CurrentMPDUDensity 	= 7; 
+#else
+	if(pHTInfo->MPDU_Density > pPeerHTCap->MPDUDensity)
+		pHTInfo->CurrentMPDUDensity = pHTInfo->MPDU_Density;
+	else
+		pHTInfo->CurrentMPDUDensity = pPeerHTCap->MPDUDensity;
+#endif
+#if (defined RTL8192SE || defined RTL8192SU || defined RTL8192CE)
+        if(ieee->SetHwRegHandler != NULL) {
+            ieee->SetHwRegHandler( ieee->dev, HW_VAR_SHORTGI_DENSITY,  (u8*)(&ieee->MaxMssDensity));
+            ieee->SetHwRegHandler(ieee->dev, HW_VAR_AMPDU_FACTOR, &pHTInfo->CurrentAMPDUFactor);
+            ieee->SetHwRegHandler(ieee->dev, HW_VAR_AMPDU_MIN_SPACE, &pHTInfo->CurrentMPDUDensity);
+        }
+#elif defined RTL8192CE
+        if(ieee->SetHwRegHandler != NULL) {
+            ieee->SetHwRegHandler(ieee->dev, HW_VAR_AMPDU_FACTOR, &pHTInfo->CurrentAMPDUFactor);
+            ieee->SetHwRegHandler(ieee->dev, HW_VAR_AMPDU_MIN_SPACE, &pHTInfo->CurrentMPDUDensity);
+        }
+#endif        
+#ifndef RTL8190P
+	if(pHTInfo->IOTAction & HT_IOT_ACT_TX_USE_AMSDU_8K)
+#else
+	if( 0 )
+#endif
+	{
+		pHTInfo->bCurrentAMPDUEnable = false;
+		pHTInfo->ForcedAMSDUMode = HT_AGG_FORCE_ENABLE;
+		pHTInfo->ForcedAMSDUMaxSize = 7935;
+	}
+	pHTInfo->bCurRxReorderEnable = pHTInfo->bRegRxReorderEnable;
+
+	
+	if(pPeerHTCap->MCS[0] == 0)
+		pPeerHTCap->MCS[0] = 0xff;
+		
+	HTIOTActDetermineRaFunc(ieee, ((pPeerHTCap->MCS[1])!=0));
+
+	HTFilterMCSRate(ieee, pPeerHTCap->MCS, ieee->dot11HTOperationalRateSet);
+
+	pHTInfo->PeerMimoPs = pPeerHTCap->MimoPwrSave;
+	if(pHTInfo->PeerMimoPs == MIMO_PS_STATIC)
+		pMcsFilter = MCS_FILTER_1SS;
+	else
+		pMcsFilter = MCS_FILTER_ALL;
+	ieee->HTHighestOperaRate = HTGetHighestMCSRate(ieee, ieee->dot11HTOperationalRateSet, pMcsFilter);
+	ieee->HTCurrentOperaRate = ieee->HTHighestOperaRate;
+
+	pHTInfo->CurrentOpMode = pPeerHTInfo->OptMode;
+
+}	
+
+void HTSetConnectBwModeCallback(struct rtllib_device* ieee);
+void HTInitializeHTInfo(struct rtllib_device* ieee)
+{
+	PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
+
+	RTLLIB_DEBUG(RTLLIB_DL_HT, "===========>%s()\n", __FUNCTION__);
+	pHTInfo->bCurrentHTSupport = false;
+
+	pHTInfo->bCurBW40MHz = false;
+	pHTInfo->bCurTxBW40MHz = false;
+
+	pHTInfo->bCurShortGI20MHz = false;
+	pHTInfo->bCurShortGI40MHz = false;
+	pHTInfo->bForcedShortGI = false;
+
+	pHTInfo->bCurSuppCCK = true;
+
+	pHTInfo->bCurrent_AMSDU_Support = false;
+	pHTInfo->nCurrent_AMSDU_MaxSize = pHTInfo->nAMSDU_MaxSize;
+#ifdef _RTL8192_EXT_PATCH_
+	pHTInfo->bCurrent_Mesh_AMSDU_Support = true;
+#endif
+	pHTInfo->CurrentMPDUDensity = pHTInfo->MPDU_Density;
+	pHTInfo->CurrentAMPDUFactor = pHTInfo->AMPDU_Factor;
+
+	memset((void*)(&(pHTInfo->SelfHTCap)), 0, sizeof(pHTInfo->SelfHTCap));
+	memset((void*)(&(pHTInfo->SelfHTInfo)), 0, sizeof(pHTInfo->SelfHTInfo));
+	memset((void*)(&(pHTInfo->PeerHTCapBuf)), 0, sizeof(pHTInfo->PeerHTCapBuf));
+	memset((void*)(&(pHTInfo->PeerHTInfoBuf)), 0, sizeof(pHTInfo->PeerHTInfoBuf));
+
+	pHTInfo->bSwBwInProgress = false;
+	pHTInfo->ChnlOp = CHNLOP_NONE;
+
+	pHTInfo->ePeerHTSpecVer = HT_SPEC_VER_IEEE;
+
+	pHTInfo->bCurrentRT2RTAggregation = false;
+	pHTInfo->bCurrentRT2RTLongSlotTime = false;
+	pHTInfo->RT2RT_HT_Mode = (RT_HT_CAPBILITY)0;
+	
+	pHTInfo->IOTPeer = 0;
+	pHTInfo->IOTAction = 0;
+	pHTInfo->IOTRaFunc = 0;
+	
+	{
+		u8* RegHTSuppRateSets = &(ieee->RegHTSuppRateSet[0]);
+		RegHTSuppRateSets[0] = 0xFF;	
+		RegHTSuppRateSets[1] = 0xFF;	
+		RegHTSuppRateSets[4] = 0x01;	
+	}
+}
+void HTInitializeBssDesc(PBSS_HT pBssHT)
+{
+
+	pBssHT->bdSupportHT = false;
+	memset(pBssHT->bdHTCapBuf, 0, sizeof(pBssHT->bdHTCapBuf));
+	pBssHT->bdHTCapLen = 0;
+	memset(pBssHT->bdHTInfoBuf, 0, sizeof(pBssHT->bdHTInfoBuf));
+	pBssHT->bdHTInfoLen = 0;
+
+	pBssHT->bdHTSpecVer= HT_SPEC_VER_IEEE;
+
+	pBssHT->bdRT2RTAggregation = false;
+	pBssHT->bdRT2RTLongSlotTime = false;
+	pBssHT->RT2RT_HT_Mode = (RT_HT_CAPBILITY)0;
+}
+
+void HTResetSelfAndSavePeerSetting(struct rtllib_device* ieee, 	struct rtllib_network * pNetwork)
+{
+	PRT_HIGH_THROUGHPUT		pHTInfo = ieee->pHTInfo;
+	u8	bIOTAction = 0;
+
+	RTLLIB_DEBUG(RTLLIB_DL_HT, "==============>%s()\n", __FUNCTION__);
+	/*unmark bEnableHT flag here is the same reason why unmarked in function rtllib_softmac_new_net. WB 2008.09.10*/
+	if (pNetwork->bssht.bdSupportHT)
+	{
+		pHTInfo->bCurrentHTSupport = true;
+		pHTInfo->ePeerHTSpecVer = pNetwork->bssht.bdHTSpecVer;
+
+		if(pNetwork->bssht.bdHTCapLen > 0 && 	pNetwork->bssht.bdHTCapLen <= sizeof(pHTInfo->PeerHTCapBuf))
+			memcpy(pHTInfo->PeerHTCapBuf, pNetwork->bssht.bdHTCapBuf, pNetwork->bssht.bdHTCapLen);
+
+		if(pNetwork->bssht.bdHTInfoLen > 0 && pNetwork->bssht.bdHTInfoLen <= sizeof(pHTInfo->PeerHTInfoBuf))
+			memcpy(pHTInfo->PeerHTInfoBuf, pNetwork->bssht.bdHTInfoBuf, pNetwork->bssht.bdHTInfoLen);
+
+		if(pHTInfo->bRegRT2RTAggregation)
+		{
+			pHTInfo->bCurrentRT2RTAggregation = pNetwork->bssht.bdRT2RTAggregation;
+			pHTInfo->bCurrentRT2RTLongSlotTime = pNetwork->bssht.bdRT2RTLongSlotTime;
+			pHTInfo->RT2RT_HT_Mode = pNetwork->bssht.RT2RT_HT_Mode;
+		}
+		else
+		{
+			pHTInfo->bCurrentRT2RTAggregation = false;	
+			pHTInfo->bCurrentRT2RTLongSlotTime = false;
+			pHTInfo->RT2RT_HT_Mode = (RT_HT_CAPBILITY)0;
+		}
+	
+		HTIOTPeerDetermine(ieee);
+				 			
+		pHTInfo->IOTAction = 0;
+		bIOTAction = HTIOTActIsDisableMCS14(ieee, pNetwork->bssid);
+		if(bIOTAction)
+			pHTInfo->IOTAction |= HT_IOT_ACT_DISABLE_MCS14;
+
+		bIOTAction = HTIOTActIsDisableMCS15(ieee);
+		if(bIOTAction)
+			pHTInfo->IOTAction |= HT_IOT_ACT_DISABLE_MCS15;
+
+		bIOTAction = HTIOTActIsDisableMCSTwoSpatialStream(ieee);
+		if(bIOTAction)
+			pHTInfo->IOTAction |= HT_IOT_ACT_DISABLE_ALL_2SS;
+
+
+		bIOTAction = HTIOTActIsDisableEDCATurbo(ieee, pNetwork->bssid);
+		if(bIOTAction)
+			pHTInfo->IOTAction |= HT_IOT_ACT_DISABLE_EDCA_TURBO;
+
+#if defined(RTL8190P) || defined(RTL8192E) || defined(RTL8192U)
+		bIOTAction = HTIOTActIsMgntUseCCK6M(ieee,pNetwork);
+		if(bIOTAction)
+			pHTInfo->IOTAction |= HT_IOT_ACT_MGNT_USE_CCK_6M;
+#elif defined(RTL8192SE) || defined(RTL8192SU) || defined RTL8192CE
+		bIOTAction = HTIOTActWAIOTBroadcom(ieee);
+		if(bIOTAction)
+		{
+			pHTInfo->IOTAction |= HT_IOT_ACT_WA_IOT_Broadcom;
+		}
+#endif
+		bIOTAction = HTIOTActIsCCDFsync(ieee);
+		if(bIOTAction)
+			pHTInfo->IOTAction |= HT_IOT_ACT_CDD_FSYNC;
+#if defined(RTL8192SU) || defined(RTL8192SE) || defined RTL8192CE
+		bIOTAction = HTIOTActIsForcedCTS2Self(ieee,pNetwork);
+		if(bIOTAction)	
+			pHTInfo->IOTAction |= HT_IOT_ACT_FORCED_CTS2SELF;
+
+
+		bIOTAction = HTIOTActIsEnableBETxOPLimit(ieee);
+		if(bIOTAction)
+			pHTInfo->IOTAction |= HT_IOT_ACT_FORCED_ENABLE_BE_TXOP;
+
+#if defined(RTL8192SU)
+		bIOTAction = HTIOCActRejcectADDBARequest(pNetwork);
+		if(bIOTAction)
+			pHTInfo->IOTAction |= HT_IOT_ACT_REJECT_ADDBA_REQ;
+#endif
+
+		bIOTAction = HTIOCActAllowPeerAggOnePacket(ieee, pNetwork);
+		if(bIOTAction)
+			pHTInfo->IOTAction |= HT_IOT_ACT_ALLOW_PEER_AGG_ONE_PKT;
+
+		bIOTAction = HTIOTActIsEDCABiasRx(ieee, pNetwork);
+		if(bIOTAction)
+			pHTInfo->IOTAction |= HT_IOT_ACT_EDCA_BIAS_ON_RX;
+
+#if defined(RTL8192SU)
+		bIOTAction = HTIOCActIsDisableCckRate(ieee, pNetwork);
+		if(bIOTAction)
+			pHTInfo->IOTAction |= HT_IOT_ACT_DISABLE_CCK_RATE;
+#endif
+		bIOTAction = HTIOTActDisableShortGI(ieee, pNetwork);
+		if(bIOTAction)
+			pHTInfo->IOTAction |= HT_IOT_ACT_DISABLE_SHORT_GI;
+
+		bIOTAction = HTIOTActDisableHighPower(ieee, pNetwork);
+		if(bIOTAction)
+			pHTInfo->IOTAction |= HT_IOT_ACT_DISABLE_HIGH_POWER;
+
+
+		bIOTAction = HTIOTActIsForcedAMSDU8K(ieee, pNetwork);
+		if(bIOTAction)
+			pHTInfo->IOTAction |= HT_IOT_ACT_TX_USE_AMSDU_8K;
+
+#if defined(RTL8192SU)
+		bIOTAction = HTIOTActIsTxNoAggregation(ieee, pNetwork);
+		if(bIOTAction)
+			pHTInfo->IOTAction |= HT_IOT_ACT_TX_NO_AGGREGATION;
+
+		bIOTAction = HTIOTActIsDisableTx40MHz(ieee, pNetwork);
+		if(bIOTAction)
+			pHTInfo->IOTAction |= HT_IOT_ACT_DISABLE_TX_40_MHZ;
+
+		bIOTAction = HTIOTActIsDisableTx2SS(ieee, pNetwork);
+		if(bIOTAction)
+			pHTInfo->IOTAction |= HT_IOT_ACT_DISABLE_TX_2SS;
+#endif
+
+		bIOTAction = HTIOTActIsForcedRTSCTS(ieee, pNetwork);
+		if(bIOTAction)
+			pHTInfo->IOTAction |= HT_IOT_ACT_FORCED_RTS;
+
+		bIOTAction = HTIOTActIsNullDataPowerSaving(ieee, pNetwork);
+		if(bIOTAction)
+			pHTInfo->IOTAction |= HT_IOT_ACT_NULL_DATA_POWER_SAVING;
+#endif
+	}
+	else
+	{
+		pHTInfo->bCurrentHTSupport = false;
+		pHTInfo->bCurrentRT2RTAggregation = false;
+		pHTInfo->bCurrentRT2RTLongSlotTime = false;
+		pHTInfo->RT2RT_HT_Mode = (RT_HT_CAPBILITY)0;
+
+		pHTInfo->IOTAction = 0;
+		pHTInfo->IOTRaFunc = 0;
+	}
+	
+}
+
+void HTUpdateSelfAndPeerSetting(struct rtllib_device* ieee, 	struct rtllib_network * pNetwork)
+{
+	PRT_HIGH_THROUGHPUT	pHTInfo = ieee->pHTInfo;
+	PHT_INFORMATION_ELE		pPeerHTInfo = (PHT_INFORMATION_ELE)pNetwork->bssht.bdHTInfoBuf;
+
+	if(pHTInfo->bCurrentHTSupport)
+	{
+		if(pNetwork->bssht.bdHTInfoLen != 0)
+			pHTInfo->CurrentOpMode = pPeerHTInfo->OptMode;
+
+	}
+}
+
+void HTUseDefaultSetting(struct rtllib_device* ieee)
+{
+	PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
+		
+#ifdef _RTL8192_EXT_PATCH_
+	ieee->current_mesh_network.qos_data.supported = 1;
+	ieee->current_mesh_network.qos_data.active = ieee->current_mesh_network.qos_data.supported;
+#endif	
+	if(pHTInfo->bEnableHT)
+	{
+		pHTInfo->bCurrentHTSupport = true;
+		pHTInfo->bCurSuppCCK = pHTInfo->bRegSuppCCK;
+
+#ifdef _RTL8192_EXT_PATCH_
+		if(!((ieee->iw_mode == IW_MODE_MESH) && ieee->proto_started && (ieee->state == RTLLIB_LINKED)))
+			pHTInfo->bCurBW40MHz = pHTInfo->bRegBW40MHz;
+#else
+		pHTInfo->bCurBW40MHz = pHTInfo->bRegBW40MHz;
+#endif
+		pHTInfo->bCurShortGI20MHz= pHTInfo->bRegShortGI20MHz;
+
+		pHTInfo->bCurShortGI40MHz= pHTInfo->bRegShortGI40MHz;
+#ifdef _RTL8192_EXT_PATCH_
+		ieee->current_mesh_network.qos_data.supported = 1;
+		ieee->current_mesh_network.qos_data.active = ieee->current_mesh_network.qos_data.supported;
+#endif		
+
+		if(ieee->iw_mode == IW_MODE_ADHOC)
+		{
+			ieee->current_network.qos_data.active = ieee->current_network.qos_data.supported;
+		}
+#ifdef ENABLE_AMSDU
+		if(ieee->iw_mode == IW_MODE_ADHOC)
+		{
+			pHTInfo->bCurrent_AMSDU_Support = 1;
+		}
+#ifdef _RTL8192_EXT_PATCH_
+		else if(ieee->iw_mode == IW_MODE_MESH)
+		{
+#ifdef COMPATIBLE_WITH_RALINK_MESH
+			pHTInfo->bCurrent_Mesh_AMSDU_Support = 0;
+#else
+			pHTInfo->bCurrent_Mesh_AMSDU_Support = 1;
+#endif
+			pHTInfo->bCurrent_AMSDU_Support = pHTInfo->bAMSDU_Support;
+		}
+#endif
+		else
+			pHTInfo->bCurrent_AMSDU_Support = pHTInfo->bAMSDU_Support;
+#else
+		pHTInfo->bCurrent_AMSDU_Support = pHTInfo->bAMSDU_Support;
+#endif
+		pHTInfo->nCurrent_AMSDU_MaxSize = pHTInfo->nAMSDU_MaxSize;
+
+#ifdef ENABLE_AMSDU
+		if(ieee->iw_mode == IW_MODE_ADHOC)
+			pHTInfo->bCurrentAMPDUEnable = 0;
+#ifdef _RTL8192_EXT_PATCH_
+		else if(ieee->iw_mode == IW_MODE_MESH)
+		{
+#ifdef COMPATIBLE_WITH_RALINK_MESH
+			pHTInfo->bCurrentMeshAMPDUEnable = 1;
+#else
+			pHTInfo->bCurrentMeshAMPDUEnable = 0;
+#endif
+			pHTInfo->bCurrentAMPDUEnable = pHTInfo->bAMPDUEnable;
+		}
+#endif
+		else
+			pHTInfo->bCurrentAMPDUEnable = pHTInfo->bAMPDUEnable;
+#else
+		pHTInfo->bCurrentAMPDUEnable = pHTInfo->bAMPDUEnable;
+#endif
+		pHTInfo->CurrentAMPDUFactor = pHTInfo->AMPDU_Factor;
+
+		pHTInfo->CurrentMPDUDensity = pHTInfo->CurrentMPDUDensity;
+
+
+		HTFilterMCSRate(ieee, ieee->Regdot11TxHTOperationalRateSet, ieee->dot11HTOperationalRateSet);
+#ifdef TODO
+		Adapter->HalFunc.InitHalRATRTableHandler( Adapter, &pMgntInfo->dot11OperationalRateSet, pMgntInfo->dot11HTOperationalRateSet);
+#endif
+		ieee->HTHighestOperaRate = HTGetHighestMCSRate(ieee, ieee->dot11HTOperationalRateSet, MCS_FILTER_ALL);
+		ieee->HTCurrentOperaRate = ieee->HTHighestOperaRate;
+
+#if (defined RTL8192SE || defined RTL8192SU || defined RTL8192CE)
+        	if(ieee->SetHwRegHandler != NULL) {
+           	 	ieee->SetHwRegHandler( ieee->dev, HW_VAR_SHORTGI_DENSITY,  (u8*)(&ieee->MaxMssDensity));
+            		ieee->SetHwRegHandler(ieee->dev, HW_VAR_AMPDU_FACTOR, &pHTInfo->CurrentAMPDUFactor);
+           	 	ieee->SetHwRegHandler(ieee->dev, HW_VAR_AMPDU_MIN_SPACE, &pHTInfo->CurrentMPDUDensity);
+        	}
+#endif  
+
+	}
+	else
+	{
+		pHTInfo->bCurrentHTSupport = false;
+	}
+	return;
+}
+u8 HTCCheck(struct rtllib_device* ieee, u8*	pFrame)
+{
+	if(ieee->pHTInfo->bCurrentHTSupport)
+	{
+		if( (IsQoSDataFrame(pFrame) && Frame_Order(pFrame)) == 1)
+		{
+			RTLLIB_DEBUG(RTLLIB_DL_HT, "HT CONTROL FILED EXIST!!\n");
+			return true;
+		}
+	}
+	return false;
+}
+
+void HTSetConnectBwMode(struct rtllib_device* ieee, HT_CHANNEL_WIDTH	Bandwidth, HT_EXTCHNL_OFFSET	Offset)
+{
+	PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
+
+	if(pHTInfo->bRegBW40MHz == false)
+		return;
+
+	if(ieee->GetHalfNmodeSupportByAPsHandler(ieee->dev))
+		Bandwidth=HT_CHANNEL_WIDTH_20;
+	
+
+	if(pHTInfo->bSwBwInProgress) {
+		printk("%s: bSwBwInProgress!!\n", __FUNCTION__);
+		return;
+	}
+	if(Bandwidth==HT_CHANNEL_WIDTH_20_40)
+	 {
+		if(ieee->current_network.channel<2 && Offset==HT_EXTCHNL_OFFSET_LOWER)
+			Offset = HT_EXTCHNL_OFFSET_NO_EXT;
+		if(Offset==HT_EXTCHNL_OFFSET_UPPER || Offset==HT_EXTCHNL_OFFSET_LOWER) {
+			pHTInfo->bCurBW40MHz = true;
+			pHTInfo->CurSTAExtChnlOffset = Offset;
+		} else {
+			pHTInfo->bCurBW40MHz = false;
+			pHTInfo->CurSTAExtChnlOffset = HT_EXTCHNL_OFFSET_NO_EXT;
+		}
+	} else {
+		pHTInfo->bCurBW40MHz = false;
+		pHTInfo->CurSTAExtChnlOffset = HT_EXTCHNL_OFFSET_NO_EXT;
+	}
+
+	printk("%s():pHTInfo->bCurBW40MHz:%x\n", __func__, pHTInfo->bCurBW40MHz);
+
+	pHTInfo->bSwBwInProgress = true;
+
+	HTSetConnectBwModeCallback(ieee);
+
+}
+
+void HTSetConnectBwModeCallback(struct rtllib_device* ieee)
+{
+	PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
+
+	RTLLIB_DEBUG(RTLLIB_DL_HT, "======>%s()\n", __FUNCTION__);
+	if(pHTInfo->bCurBW40MHz)
+	{
+		if(pHTInfo->CurSTAExtChnlOffset==HT_EXTCHNL_OFFSET_UPPER)
+			ieee->set_chan(ieee->dev, ieee->current_network.channel+2);
+		else if(pHTInfo->CurSTAExtChnlOffset==HT_EXTCHNL_OFFSET_LOWER)
+			ieee->set_chan(ieee->dev, ieee->current_network.channel-2);
+		else
+			ieee->set_chan(ieee->dev, ieee->current_network.channel);
+		
+		ieee->SetBWModeHandler(ieee->dev, HT_CHANNEL_WIDTH_20_40, pHTInfo->CurSTAExtChnlOffset);
+	} else {
+		ieee->set_chan(ieee->dev, ieee->current_network.channel);
+		ieee->SetBWModeHandler(ieee->dev, HT_CHANNEL_WIDTH_20, HT_EXTCHNL_OFFSET_NO_EXT);
+	}
+
+	pHTInfo->bSwBwInProgress = false;
+}
+
+#ifndef BUILT_IN_RTLLIB
+EXPORT_SYMBOL_RSL(HTUpdateSelfAndPeerSetting);
+EXPORT_SYMBOL_RSL(HTFilterMCSRate);
+EXPORT_SYMBOL_RSL(HTGetHighestMCSRate);
+EXPORT_SYMBOL_RSL(MCS_FILTER_ALL);
+EXPORT_SYMBOL_RSL(MCS_FILTER_1SS);
+#ifdef _RTL8192_EXT_PATCH_
+EXPORT_SYMBOL_RSL(HTSetConnectBwMode);
+EXPORT_SYMBOL_RSL(HTConstructCapabilityElement);
+EXPORT_SYMBOL_RSL(HTConstructRT2RTAggElement);
+EXPORT_SYMBOL_RSL(HTUseDefaultSetting);
+EXPORT_SYMBOL_RSL(HTConstructInfoElement);
+#endif
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/wapi_interface.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/wapi_interface.c
@@ -0,0 +1,151 @@
+#if defined (RTL8192S_WAPI_SUPPORT)
+
+#include "wapi.h"
+#include "wapi_interface.h"  
+#include "rtllib.h"
+
+
+/*************************************************************
+ * WAPI EVENT QUEUE : 										 *
+ * Buffer events from driver to application.            					 * 
+ *************************************************************/
+void WAPI_InitQueue(WAPI_QUEUE * q, int szMaxItem, int szMaxData)
+{
+	RT_ASSERT_RET(q);
+	
+	q->Head = 0;
+	q->Tail = 0;
+	q->NumItem = 0;
+	q->MaxItem = szMaxItem;
+	q->MaxData = szMaxData;
+}
+
+int WAPI_EnQueue(spinlock_t *plock, WAPI_QUEUE *q, u8 *item, int itemsize)
+{
+	unsigned long flags;
+
+	RT_ASSERT_RET_VALUE(plock, (-E_WAPI_QNULL));
+	RT_ASSERT_RET_VALUE(q, (-E_WAPI_QNULL));
+	RT_ASSERT_RET_VALUE(item, (-E_WAPI_QNULL));
+	
+	if(WAPI_IsFullQueue(q))
+		return -E_WAPI_QFULL;
+	if(itemsize > q->MaxData)
+		return -E_WAPI_ITEM_TOO_LARGE;
+
+ 	spin_lock_irqsave(plock, flags);
+
+	q->ItemArray[q->Tail].ItemSize = itemsize;
+	memset(q->ItemArray[q->Tail].Item, 0, sizeof(q->ItemArray[q->Tail].Item));
+	memcpy(q->ItemArray[q->Tail].Item, item, itemsize);
+	q->NumItem++;
+	if((q->Tail+1) == q->MaxItem)
+		q->Tail = 0;
+	else
+		q->Tail++;
+
+	spin_unlock_irqrestore(plock, flags);
+	
+	return E_WAPI_OK;
+}
+
+
+int WAPI_DeQueue(spinlock_t *plock, WAPI_QUEUE *q, u8 *item, int *itemsize)
+{
+	unsigned long flags;
+
+	RT_ASSERT_RET_VALUE(plock, (-E_WAPI_QNULL));
+	RT_ASSERT_RET_VALUE(q, (-E_WAPI_QNULL));
+	RT_ASSERT_RET_VALUE(item, (-E_WAPI_QNULL));
+	
+	if(WAPI_IsEmptyQueue(q))
+		return -E_WAPI_QEMPTY;
+
+ 	spin_lock_irqsave(plock, flags);
+	
+	memcpy(item, q->ItemArray[q->Head].Item, q->ItemArray[q->Head].ItemSize);
+	*itemsize = q->ItemArray[q->Head].ItemSize;
+	q->NumItem--;
+	if((q->Head+1) == q->MaxItem)
+		q->Head = 0;
+	else
+		q->Head++;
+
+	spin_unlock_irqrestore(plock, flags);
+	
+	return E_WAPI_OK;
+}
+
+void WAPI_PrintQueue(WAPI_QUEUE *q)
+{
+	int i, j, index;
+
+	RT_ASSERT_RET(q);
+	
+	printk("\n/-------------------------------------------------\n");
+	printk("[DOT11_PrintQueue]: MaxItem = %d, NumItem = %d, Head = %d, Tail = %d\n", q->MaxItem, q->NumItem, q->Head, q->Tail);
+	for(i=0; i<q->NumItem; i++) {
+		index = (i + q->Head) % q->MaxItem;
+		printk("Queue[%d].ItemSize = %d  ", index, q->ItemArray[index].ItemSize);
+		for(j=0; j<q->ItemArray[index].ItemSize; j++)
+			printk(" %x", q->ItemArray[index].Item[j]);
+		printk("\n");
+	}
+	printk("------------------------------------------------/\n");
+}
+
+int pid_wapi = 0;
+void notifyWapiApplication()
+{ 
+	struct task_struct *p;
+        
+	if(pid_wapi != 0){
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
+		p = find_task_by_pid(pid_wapi);
+#else
+                p = find_task_by_vpid(pid_wapi);
+#endif
+		if(p){
+			send_sig(SIGUSR1,p,0); 
+		}else {
+			pid_wapi = 0;
+		}
+	}
+}
+
+int WAPI_CreateEvent_Send(struct rtllib_device *ieee, u8 EventId, u8 *MacAddr, u8 *Buff, u16 BufLen)
+{
+	WAPI_EVENT_T *pEvent;
+	u8 *pbuf = NULL;
+	int ret = 0;
+	
+	WAPI_TRACE(WAPI_API, "==========> %s: EventId=%d\n", __FUNCTION__, EventId);
+	
+	RT_ASSERT_RET_VALUE(ieee, -1);
+	RT_ASSERT_RET_VALUE(MacAddr, -1);
+
+	pbuf= (u8 *)kmalloc((sizeof(WAPI_EVENT_T) + BufLen), GFP_ATOMIC);
+	if(NULL == pbuf)
+	    return -1;
+
+	pEvent = (WAPI_EVENT_T *)pbuf;	
+	pEvent->EventId = EventId;
+	memcpy(pEvent->MACAddr, MacAddr, ETH_ALEN);
+	pEvent->BuffLength = BufLen;
+	if(BufLen > 0){
+		memcpy(pEvent->Buff, Buff, BufLen);
+	}
+
+	ret = WAPI_EnQueue(&ieee->wapi_queue_lock, ieee->wapi_queue, pbuf, (sizeof(WAPI_EVENT_T) + BufLen));
+	notifyWapiApplication();
+
+	if(pbuf)
+		kfree(pbuf);
+
+	WAPI_TRACE(WAPI_API, "<========== %s\n", __FUNCTION__);
+	return ret;
+}
+
+#endif
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/kmap_types.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/kmap_types.h
@@ -0,0 +1,20 @@
+#ifndef __KMAP_TYPES_H
+
+#define __KMAP_TYPES_H
+
+
+enum km_type {
+	KM_BOUNCE_READ,
+	KM_SKB_SUNRPC_DATA,
+	KM_SKB_DATA_SOFTIRQ,
+	KM_USER0,
+	KM_USER1,
+	KM_BH_IRQ,
+	KM_SOFTIRQ0,
+	KM_SOFTIRQ1,
+	KM_TYPE_NR
+};
+
+#define _ASM_KMAP_TYPES_H
+
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/rtllib_crypt_tkip.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/rtllib_crypt_tkip.c
@@ -0,0 +1,1047 @@
+/*
+ * Host AP crypt: host-based TKIP encryption implementation for Host AP driver
+ *
+ * Copyright (c) 2003-2004, Jouni Malinen <jkmaline@cc.hut.fi>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation. See README and COPYING for
+ * more details.
+ */
+
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/random.h>
+#include <linux/skbuff.h>
+#include <linux/netdevice.h>
+#include <linux/if_ether.h>
+#include <linux/if_arp.h>
+#include <asm/string.h>
+#ifdef _RTL8192_EXT_PATCH_	
+#include <linux/etherdevice.h>
+#endif
+#include "rtllib.h"
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,20))
+#endif
+
+
+#if defined(BUILT_IN_CRYPTO) || (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
+#include "rtl_crypto.h"
+#else
+#include <linux/crypto.h>
+#endif
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) 
+    #include <asm/scatterlist.h>
+#else
+        #include <linux/scatterlist.h>
+#endif
+       
+#include <linux/crc32.h>
+
+#ifndef BUILT_IN_RTLLIB
+MODULE_AUTHOR("Jouni Malinen");
+MODULE_DESCRIPTION("Host AP crypt: TKIP");
+MODULE_LICENSE("GPL");
+#endif
+
+
+struct rtllib_tkip_data {
+#define TKIP_KEY_LEN 32
+	u8 key[TKIP_KEY_LEN];
+	int key_set;
+
+	u32 tx_iv32;
+	u16 tx_iv16;
+	u16 tx_ttak[5];
+	int tx_phase1_done;
+
+	u32 rx_iv32;
+	u16 rx_iv16;
+      bool initialized;
+	u16 rx_ttak[5];
+	int rx_phase1_done;
+	u32 rx_iv32_new;
+	u16 rx_iv16_new;
+
+	u32 dot11RSNAStatsTKIPReplays;
+	u32 dot11RSNAStatsTKIPICVErrors;
+	u32 dot11RSNAStatsTKIPLocalMICFailures;
+
+	int key_idx;
+#if  ( !defined(BUILT_IN_CRYPTO) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21)) || (OPENSUSE_SLED)) )
+	struct crypto_blkcipher *rx_tfm_arc4;
+	struct crypto_hash *rx_tfm_michael;
+	struct crypto_blkcipher *tx_tfm_arc4;
+	struct crypto_hash *tx_tfm_michael;
+#else
+	struct crypto_tfm *tx_tfm_arc4;
+	struct crypto_tfm *tx_tfm_michael;
+	struct crypto_tfm *rx_tfm_arc4;
+	struct crypto_tfm *rx_tfm_michael;
+#endif
+	/* scratch buffers for virt_to_page() (crypto API) */
+	u8 rx_hdr[16], tx_hdr[16];
+};
+
+static void * rtllib_tkip_init(int key_idx)
+{
+	struct rtllib_tkip_data *priv;
+
+	priv = kmalloc(sizeof(*priv), GFP_ATOMIC);
+	if (priv == NULL)
+		goto fail;
+	memset(priv, 0, sizeof(*priv));
+	priv->key_idx = key_idx;
+#if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
+	priv->tx_tfm_arc4 = crypto_alloc_tfm("arc4", 0);
+	if (priv->tx_tfm_arc4 == NULL) {
+		printk(KERN_DEBUG "rtllib_crypt_tkip: could not allocate "
+				"crypto API arc4\n");
+		goto fail;
+	}
+
+	priv->tx_tfm_michael = crypto_alloc_tfm("michael_mic", 0);
+	if (priv->tx_tfm_michael == NULL) {
+		printk(KERN_DEBUG "rtllib_crypt_tkip: could not allocate "
+				"crypto API michael_mic\n");
+		goto fail;
+	}
+
+	priv->rx_tfm_arc4 = crypto_alloc_tfm("arc4", 0);
+	if (priv->rx_tfm_arc4 == NULL) {
+		printk(KERN_DEBUG "rtllib_crypt_tkip: could not allocate "
+				"crypto API arc4\n");
+		goto fail;
+	}
+
+	priv->rx_tfm_michael = crypto_alloc_tfm("michael_mic", 0);
+	if (priv->rx_tfm_michael == NULL) {
+		printk(KERN_DEBUG "rtllib_crypt_tkip: could not allocate "
+				"crypto API michael_mic\n");
+		goto fail;
+	}
+#else
+	priv->tx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0,
+			CRYPTO_ALG_ASYNC);
+	if (IS_ERR(priv->tx_tfm_arc4)) {
+		printk(KERN_DEBUG "rtllib_crypt_tkip: could not allocate "
+				"crypto API arc4\n");
+		priv->tx_tfm_arc4 = NULL;
+		goto fail;
+	}
+
+	priv->tx_tfm_michael = crypto_alloc_hash("michael_mic", 0,
+			CRYPTO_ALG_ASYNC);
+	if (IS_ERR(priv->tx_tfm_michael)) {
+		printk(KERN_DEBUG "rtllib_crypt_tkip: could not allocate "
+				"crypto API michael_mic\n");
+		priv->tx_tfm_michael = NULL;
+		goto fail;
+	}
+
+	priv->rx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0,
+			CRYPTO_ALG_ASYNC);
+	if (IS_ERR(priv->rx_tfm_arc4)) {
+		printk(KERN_DEBUG "rtllib_crypt_tkip: could not allocate "
+				"crypto API arc4\n");
+		priv->rx_tfm_arc4 = NULL;
+		goto fail;
+	}
+
+	priv->rx_tfm_michael = crypto_alloc_hash("michael_mic", 0,
+			CRYPTO_ALG_ASYNC);
+	if (IS_ERR(priv->rx_tfm_michael)) {
+		printk(KERN_DEBUG "rtllib_crypt_tkip: could not allocate "
+				"crypto API michael_mic\n");
+		priv->rx_tfm_michael = NULL;
+		goto fail;
+	}
+#endif
+	return priv;
+
+fail:
+	if (priv) {
+#if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
+		if (priv->tx_tfm_michael)
+			crypto_free_tfm(priv->tx_tfm_michael);
+		if (priv->tx_tfm_arc4)
+			crypto_free_tfm(priv->tx_tfm_arc4);
+		if (priv->rx_tfm_michael)
+			crypto_free_tfm(priv->rx_tfm_michael);
+		if (priv->rx_tfm_arc4)
+			crypto_free_tfm(priv->rx_tfm_arc4);
+
+#else
+		if (priv->tx_tfm_michael)
+			crypto_free_hash(priv->tx_tfm_michael);
+		if (priv->tx_tfm_arc4)
+			crypto_free_blkcipher(priv->tx_tfm_arc4);
+		if (priv->rx_tfm_michael)
+			crypto_free_hash(priv->rx_tfm_michael);
+		if (priv->rx_tfm_arc4)
+			crypto_free_blkcipher(priv->rx_tfm_arc4);
+#endif
+		kfree(priv);
+	}
+
+	return NULL;
+}
+
+
+static void rtllib_tkip_deinit(void *priv)
+{
+	struct rtllib_tkip_data *_priv = priv;
+#if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
+	if (_priv->tx_tfm_michael)
+		crypto_free_tfm(_priv->tx_tfm_michael);
+	if (_priv->tx_tfm_arc4)
+		crypto_free_tfm(_priv->tx_tfm_arc4);
+	if (_priv->rx_tfm_michael)
+		crypto_free_tfm(_priv->rx_tfm_michael);
+	if (_priv->rx_tfm_arc4)
+		crypto_free_tfm(_priv->rx_tfm_arc4);
+#else
+	if (_priv) {
+		if (_priv->tx_tfm_michael)
+			crypto_free_hash(_priv->tx_tfm_michael);
+		if (_priv->tx_tfm_arc4)
+			crypto_free_blkcipher(_priv->tx_tfm_arc4);
+		if (_priv->rx_tfm_michael)
+			crypto_free_hash(_priv->rx_tfm_michael);
+		if (_priv->rx_tfm_arc4)
+			crypto_free_blkcipher(_priv->rx_tfm_arc4);
+	}
+#endif
+	kfree(priv);
+}
+
+
+static inline u16 RotR1(u16 val)
+{
+	return (val >> 1) | (val << 15);
+}
+
+
+static inline u8 Lo8(u16 val)
+{
+	return val & 0xff;
+}
+
+
+static inline u8 Hi8(u16 val)
+{
+	return val >> 8;
+}
+
+
+static inline u16 Lo16(u32 val)
+{
+	return val & 0xffff;
+}
+
+
+static inline u16 Hi16(u32 val)
+{
+	return val >> 16;
+}
+
+
+static inline u16 Mk16(u8 hi, u8 lo)
+{
+	return lo | (((u16) hi) << 8);
+}
+
+
+static inline u16 Mk16_le(u16 *v)
+{
+	return le16_to_cpu(*v);
+}
+
+
+static const u16 Sbox[256] =
+{
+	0xC6A5, 0xF884, 0xEE99, 0xF68D, 0xFF0D, 0xD6BD, 0xDEB1, 0x9154,
+	0x6050, 0x0203, 0xCEA9, 0x567D, 0xE719, 0xB562, 0x4DE6, 0xEC9A,
+	0x8F45, 0x1F9D, 0x8940, 0xFA87, 0xEF15, 0xB2EB, 0x8EC9, 0xFB0B,
+	0x41EC, 0xB367, 0x5FFD, 0x45EA, 0x23BF, 0x53F7, 0xE496, 0x9B5B,
+	0x75C2, 0xE11C, 0x3DAE, 0x4C6A, 0x6C5A, 0x7E41, 0xF502, 0x834F,
+	0x685C, 0x51F4, 0xD134, 0xF908, 0xE293, 0xAB73, 0x6253, 0x2A3F,
+	0x080C, 0x9552, 0x4665, 0x9D5E, 0x3028, 0x37A1, 0x0A0F, 0x2FB5,
+	0x0E09, 0x2436, 0x1B9B, 0xDF3D, 0xCD26, 0x4E69, 0x7FCD, 0xEA9F,
+	0x121B, 0x1D9E, 0x5874, 0x342E, 0x362D, 0xDCB2, 0xB4EE, 0x5BFB,
+	0xA4F6, 0x764D, 0xB761, 0x7DCE, 0x527B, 0xDD3E, 0x5E71, 0x1397,
+	0xA6F5, 0xB968, 0x0000, 0xC12C, 0x4060, 0xE31F, 0x79C8, 0xB6ED,
+	0xD4BE, 0x8D46, 0x67D9, 0x724B, 0x94DE, 0x98D4, 0xB0E8, 0x854A,
+	0xBB6B, 0xC52A, 0x4FE5, 0xED16, 0x86C5, 0x9AD7, 0x6655, 0x1194,
+	0x8ACF, 0xE910, 0x0406, 0xFE81, 0xA0F0, 0x7844, 0x25BA, 0x4BE3,
+	0xA2F3, 0x5DFE, 0x80C0, 0x058A, 0x3FAD, 0x21BC, 0x7048, 0xF104,
+	0x63DF, 0x77C1, 0xAF75, 0x4263, 0x2030, 0xE51A, 0xFD0E, 0xBF6D,
+	0x814C, 0x1814, 0x2635, 0xC32F, 0xBEE1, 0x35A2, 0x88CC, 0x2E39,
+	0x9357, 0x55F2, 0xFC82, 0x7A47, 0xC8AC, 0xBAE7, 0x322B, 0xE695,
+	0xC0A0, 0x1998, 0x9ED1, 0xA37F, 0x4466, 0x547E, 0x3BAB, 0x0B83,
+	0x8CCA, 0xC729, 0x6BD3, 0x283C, 0xA779, 0xBCE2, 0x161D, 0xAD76,
+	0xDB3B, 0x6456, 0x744E, 0x141E, 0x92DB, 0x0C0A, 0x486C, 0xB8E4,
+	0x9F5D, 0xBD6E, 0x43EF, 0xC4A6, 0x39A8, 0x31A4, 0xD337, 0xF28B,
+	0xD532, 0x8B43, 0x6E59, 0xDAB7, 0x018C, 0xB164, 0x9CD2, 0x49E0,
+	0xD8B4, 0xACFA, 0xF307, 0xCF25, 0xCAAF, 0xF48E, 0x47E9, 0x1018,
+	0x6FD5, 0xF088, 0x4A6F, 0x5C72, 0x3824, 0x57F1, 0x73C7, 0x9751,
+	0xCB23, 0xA17C, 0xE89C, 0x3E21, 0x96DD, 0x61DC, 0x0D86, 0x0F85,
+	0xE090, 0x7C42, 0x71C4, 0xCCAA, 0x90D8, 0x0605, 0xF701, 0x1C12,
+	0xC2A3, 0x6A5F, 0xAEF9, 0x69D0, 0x1791, 0x9958, 0x3A27, 0x27B9,
+	0xD938, 0xEB13, 0x2BB3, 0x2233, 0xD2BB, 0xA970, 0x0789, 0x33A7,
+	0x2DB6, 0x3C22, 0x1592, 0xC920, 0x8749, 0xAAFF, 0x5078, 0xA57A,
+	0x038F, 0x59F8, 0x0980, 0x1A17, 0x65DA, 0xD731, 0x84C6, 0xD0B8,
+	0x82C3, 0x29B0, 0x5A77, 0x1E11, 0x7BCB, 0xA8FC, 0x6DD6, 0x2C3A,
+};
+
+
+static inline u16 _S_(u16 v)
+{
+	u16 t = Sbox[Hi8(v)];
+	return Sbox[Lo8(v)] ^ ((t << 8) | (t >> 8));
+}
+
+
+#define PHASE1_LOOP_COUNT 8
+
+
+static void tkip_mixing_phase1(u16 *TTAK, const u8 *TK, const u8 *TA, u32 IV32)
+{
+	int i, j;
+
+	/* Initialize the 80-bit TTAK from TSC (IV32) and TA[0..5] */
+	TTAK[0] = Lo16(IV32);
+	TTAK[1] = Hi16(IV32);
+	TTAK[2] = Mk16(TA[1], TA[0]);
+	TTAK[3] = Mk16(TA[3], TA[2]);
+	TTAK[4] = Mk16(TA[5], TA[4]);
+
+	for (i = 0; i < PHASE1_LOOP_COUNT; i++) {
+		j = 2 * (i & 1);
+		TTAK[0] += _S_(TTAK[4] ^ Mk16(TK[1 + j], TK[0 + j]));
+		TTAK[1] += _S_(TTAK[0] ^ Mk16(TK[5 + j], TK[4 + j]));
+		TTAK[2] += _S_(TTAK[1] ^ Mk16(TK[9 + j], TK[8 + j]));
+		TTAK[3] += _S_(TTAK[2] ^ Mk16(TK[13 + j], TK[12 + j]));
+		TTAK[4] += _S_(TTAK[3] ^ Mk16(TK[1 + j], TK[0 + j])) + i;
+	}
+}
+
+
+static void tkip_mixing_phase2(u8 *WEPSeed, const u8 *TK, const u16 *TTAK,
+			       u16 IV16)
+{
+	/* Make temporary area overlap WEP seed so that the final copy can be
+	 * avoided on little endian hosts. */
+	u16 *PPK = (u16 *) &WEPSeed[4];
+
+	/* Step 1 - make copy of TTAK and bring in TSC */
+	PPK[0] = TTAK[0];
+	PPK[1] = TTAK[1];
+	PPK[2] = TTAK[2];
+	PPK[3] = TTAK[3];
+	PPK[4] = TTAK[4];
+	PPK[5] = TTAK[4] + IV16;
+
+	/* Step 2 - 96-bit bijective mixing using S-box */
+	PPK[0] += _S_(PPK[5] ^ Mk16_le((u16 *) &TK[0]));
+	PPK[1] += _S_(PPK[0] ^ Mk16_le((u16 *) &TK[2]));
+	PPK[2] += _S_(PPK[1] ^ Mk16_le((u16 *) &TK[4]));
+	PPK[3] += _S_(PPK[2] ^ Mk16_le((u16 *) &TK[6]));
+	PPK[4] += _S_(PPK[3] ^ Mk16_le((u16 *) &TK[8]));
+	PPK[5] += _S_(PPK[4] ^ Mk16_le((u16 *) &TK[10]));
+
+	PPK[0] += RotR1(PPK[5] ^ Mk16_le((u16 *) &TK[12]));
+	PPK[1] += RotR1(PPK[0] ^ Mk16_le((u16 *) &TK[14]));
+	PPK[2] += RotR1(PPK[1]);
+	PPK[3] += RotR1(PPK[2]);
+	PPK[4] += RotR1(PPK[3]);
+	PPK[5] += RotR1(PPK[4]);
+
+	/* Step 3 - bring in last of TK bits, assign 24-bit WEP IV value
+	 * WEPSeed[0..2] is transmitted as WEP IV */
+	WEPSeed[0] = Hi8(IV16);
+	WEPSeed[1] = (Hi8(IV16) | 0x20) & 0x7F;
+	WEPSeed[2] = Lo8(IV16);
+	WEPSeed[3] = Lo8((PPK[5] ^ Mk16_le((u16 *) &TK[0])) >> 1);
+
+#ifdef __BIG_ENDIAN
+	{
+		int i;
+		for (i = 0; i < 6; i++)
+			PPK[i] = (PPK[i] << 8) | (PPK[i] >> 8);
+	}
+#endif
+}
+
+
+static int rtllib_tkip_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
+{
+	struct rtllib_tkip_data *tkey = priv;
+		int len;
+	u8 *pos;
+	struct rtllib_hdr_4addr *hdr;
+	cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
+
+	#if ( !defined(BUILT_IN_CRYPTO) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21)) || (OPENSUSE_SLED)) )
+	struct blkcipher_desc desc = {.tfm = tkey->tx_tfm_arc4};
+	int ret = 0;
+	#endif
+	u8 rc4key[16],  *icv;
+	u32 crc;
+#ifdef _RTL8192_EXT_PATCH_	
+	u8 broadcastaddr[6] = {0xff,0xff,0xff,0xff,0xff,0xff};
+	u8 is_broadcast_data = 0;
+#endif
+	struct scatterlist sg;
+
+	if (skb_headroom(skb) < 8 || skb_tailroom(skb) < 4 ||
+	    skb->len < hdr_len)
+		return -1;
+
+	hdr = (struct rtllib_hdr_4addr *) skb->data;
+#ifdef _RTL8192_EXT_PATCH_	
+	if(tcb_desc->badhoc == 0){
+		if(memcmp(hdr->addr1,broadcastaddr,6) == 0){
+			is_broadcast_data = 1;
+			tcb_desc->bHwSec = 0;
+		}
+		if(is_multicast_ether_addr(hdr->addr1)){
+			tcb_desc->bHwSec = 0;
+		}
+	}
+#endif
+#if 0
+printk("@@ tkey\n");
+printk("%x|", ((u32*)tkey->key)[0]);
+printk("%x|", ((u32*)tkey->key)[1]);
+printk("%x|", ((u32*)tkey->key)[2]);
+printk("%x|", ((u32*)tkey->key)[3]);
+printk("%x|", ((u32*)tkey->key)[4]);
+printk("%x|", ((u32*)tkey->key)[5]);
+printk("%x|", ((u32*)tkey->key)[6]);
+printk("%x\n", ((u32*)tkey->key)[7]);
+#endif
+
+	if (!tcb_desc->bHwSec)
+	{
+		if (!tkey->tx_phase1_done) {
+			tkip_mixing_phase1(tkey->tx_ttak, tkey->key, hdr->addr2,
+					tkey->tx_iv32);
+			tkey->tx_phase1_done = 1;
+		}
+		tkip_mixing_phase2(rc4key, tkey->key, tkey->tx_ttak, tkey->tx_iv16);
+	}
+	else
+	tkey->tx_phase1_done = 1;
+	
+	
+	len = skb->len - hdr_len;
+	pos = skb_push(skb, 8);
+	memmove(pos, pos + 8, hdr_len);
+	pos += hdr_len;
+
+	if (tcb_desc->bHwSec)
+	{
+		*pos++ = Hi8(tkey->tx_iv16);
+		*pos++ = (Hi8(tkey->tx_iv16) | 0x20) & 0x7F;
+		*pos++ = Lo8(tkey->tx_iv16);
+	}
+	else
+	{
+		*pos++ = rc4key[0];
+		*pos++ = rc4key[1];
+		*pos++ = rc4key[2];
+	}
+
+	*pos++ = (tkey->key_idx << 6) | (1 << 5) /* Ext IV included */;
+	*pos++ = tkey->tx_iv32 & 0xff;
+	*pos++ = (tkey->tx_iv32 >> 8) & 0xff;
+	*pos++ = (tkey->tx_iv32 >> 16) & 0xff;
+	*pos++ = (tkey->tx_iv32 >> 24) & 0xff;
+
+	if (!tcb_desc->bHwSec)
+	{
+		icv = skb_put(skb, 4);
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
+		crc = ~crc32_le(~0, pos, len);
+#else
+		crc = ~ether_crc_le(len, pos);
+#endif
+		icv[0] = crc;
+		icv[1] = crc >> 8;
+		icv[2] = crc >> 16;
+		icv[3] = crc >> 24;
+
+#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
+		sg.page = virt_to_page(pos);
+		sg.offset = offset_in_page(pos);
+		sg.length = len + 4;
+#else		
+		sg_init_one(&sg, pos, len+4);
+#endif
+
+
+#if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
+		crypto_cipher_setkey(tkey->tx_tfm_arc4, rc4key, 16);
+		crypto_cipher_encrypt(tkey->tx_tfm_arc4, &sg, &sg, len + 4);
+#else
+		crypto_blkcipher_setkey(tkey->tx_tfm_arc4, rc4key, 16);
+		ret= crypto_blkcipher_encrypt(&desc, &sg, &sg, len + 4);
+#endif
+
+	}
+
+	tkey->tx_iv16++;
+	if (tkey->tx_iv16 == 0) {
+		tkey->tx_phase1_done = 0;
+		tkey->tx_iv32++;
+	}
+
+	if (!tcb_desc->bHwSec)
+	#if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
+		return 0;
+	#else
+		return ret;
+	#endif
+	else
+        	return 0;
+
+
+}
+
+static int rtllib_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
+{
+	struct rtllib_tkip_data *tkey = priv;
+	u8 keyidx, *pos;
+	u32 iv32;
+	u16 iv16;
+	struct rtllib_hdr_4addr *hdr;
+	cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
+	#if ( !defined(BUILT_IN_CRYPTO) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21)) || (OPENSUSE_SLED)) )
+	struct blkcipher_desc desc = {.tfm = tkey->rx_tfm_arc4};
+	#endif
+	u8 rc4key[16];
+	u8 icv[4];
+	u32 crc;
+	struct scatterlist sg;
+	int plen;
+	if (skb->len < hdr_len + 8 + 4)
+		return -1;
+
+	hdr = (struct rtllib_hdr_4addr *) skb->data;
+	pos = skb->data + hdr_len;
+	keyidx = pos[3];
+	if (!(keyidx & (1 << 5))) {
+		if (net_ratelimit()) {
+			printk(KERN_DEBUG "TKIP: received packet without ExtIV"
+			       " flag from " MAC_FMT "\n", MAC_ARG(hdr->addr2));
+		}
+		return -2;
+	}
+	keyidx >>= 6;
+	if (tkey->key_idx != keyidx) {
+		printk(KERN_DEBUG "TKIP: RX tkey->key_idx=%d frame "
+		       "keyidx=%d priv=%p\n", tkey->key_idx, keyidx, priv);
+		return -6;
+	}
+	if (!tkey->key_set) {
+		if (net_ratelimit()) {
+			printk(KERN_DEBUG "TKIP: received packet from " MAC_FMT
+			       " with keyid=%d that does not have a configured"
+			       " key\n", MAC_ARG(hdr->addr2), keyidx);
+		}
+		return -3;
+	}
+	iv16 = (pos[0] << 8) | pos[2];
+	iv32 = pos[4] | (pos[5] << 8) | (pos[6] << 16) | (pos[7] << 24);
+	pos += 8;
+
+	if (!tcb_desc->bHwSec || (skb->cb[0] == 1))
+	{
+		if ((iv32 < tkey->rx_iv32 ||
+		(iv32 == tkey->rx_iv32 && iv16 <= tkey->rx_iv16))&&tkey->initialized) {
+			if (net_ratelimit()) {
+				printk(KERN_DEBUG "TKIP: replay detected: STA=" MAC_FMT
+				" previous TSC %08x%04x received TSC "
+				"%08x%04x\n", MAC_ARG(hdr->addr2),
+				tkey->rx_iv32, tkey->rx_iv16, iv32, iv16);
+			}
+			tkey->dot11RSNAStatsTKIPReplays++;
+			return -4;
+		}
+                tkey->initialized = true;
+	
+		if (iv32 != tkey->rx_iv32 || !tkey->rx_phase1_done) {
+			tkip_mixing_phase1(tkey->rx_ttak, tkey->key, hdr->addr2, iv32);
+			tkey->rx_phase1_done = 1;
+		}
+		tkip_mixing_phase2(rc4key, tkey->key, tkey->rx_ttak, iv16);
+	
+		plen = skb->len - hdr_len - 12;
+	
+#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
+		sg.page = virt_to_page(pos);
+		sg.offset = offset_in_page(pos);
+		sg.length = plen + 4;
+#else
+		sg_init_one(&sg, pos, plen+4);
+#endif
+
+#if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
+		crypto_cipher_setkey(tkey->rx_tfm_arc4, rc4key, 16);
+		crypto_cipher_decrypt(tkey->rx_tfm_arc4, &sg, &sg, plen + 4);
+#else
+		crypto_blkcipher_setkey(tkey->rx_tfm_arc4, rc4key, 16);
+		if (crypto_blkcipher_decrypt(&desc, &sg, &sg, plen + 4)) {
+			if (net_ratelimit()) {
+				printk(KERN_DEBUG ": TKIP: failed to decrypt "
+						"received packet from " MAC_FMT "\n",
+						MAC_ARG(hdr->addr2));
+			}
+			return -7;
+		}
+#endif
+	
+	#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
+		crc = ~crc32_le(~0, pos, plen);
+	#else
+		crc = ~ether_crc_le(plen, pos);
+	#endif
+		icv[0] = crc;
+		icv[1] = crc >> 8;
+		icv[2] = crc >> 16;
+		icv[3] = crc >> 24;
+	
+		if (memcmp(icv, pos + plen, 4) != 0) {
+			if (iv32 != tkey->rx_iv32) {
+				/* Previously cached Phase1 result was already lost, so
+				* it needs to be recalculated for the next packet. */
+				tkey->rx_phase1_done = 0;
+			}
+			if (net_ratelimit()) {
+				printk(KERN_DEBUG "TKIP: ICV error detected: STA="
+				MAC_FMT "\n", MAC_ARG(hdr->addr2));
+			}
+			tkey->dot11RSNAStatsTKIPICVErrors++;
+			return -5;
+		}
+
+	}
+
+	/* Update real counters only after Michael MIC verification has
+	 * completed */
+	tkey->rx_iv32_new = iv32;
+	tkey->rx_iv16_new = iv16;
+
+	/* Remove IV and ICV */
+	memmove(skb->data + 8, skb->data, hdr_len);
+	skb_pull(skb, 8);
+	skb_trim(skb, skb->len - 4);
+
+#ifdef JOHN_DUMP 
+if( ((u16*)skb->data)[0] & 0x4000){
+        printk("@@ rx decrypted skb->data");
+        int i;
+        for(i=0;i<skb->len;i++){
+                if( (i%24)==0 ) printk("\n");
+                printk("%2x ", ((u8*)skb->data)[i]);
+        }
+        printk("\n");
+}
+#endif /*JOHN_DUMP*/
+	return keyidx;
+}
+
+
+#if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
+static int michael_mic(struct crypto_tfm * tfm_michael, u8 *key, u8 *hdr,
+		       u8 *data, size_t data_len, u8 *mic)
+{
+	struct scatterlist sg[2];
+#if ( !defined(BUILT_IN_CRYPTO) && LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20) )
+        struct hash_desc desc;
+        int ret = 0;
+#endif
+
+	if (tfm_michael == NULL){
+		printk(KERN_WARNING "michael_mic: tfm_michael == NULL\n");
+		return -1;
+	}
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
+	sg[0].page = virt_to_page(hdr);
+	sg[0].offset = offset_in_page(hdr);
+	sg[0].length = 16;
+
+	sg[1].page = virt_to_page(data);
+	sg[1].offset = offset_in_page(data);
+	sg[1].length = data_len;
+#else
+	sg_init_table(sg, 2);
+	sg_set_buf(&sg[0], hdr, 16);
+	sg_set_buf(&sg[1], data, data_len);
+#endif
+
+#if ( defined(BUILT_IN_CRYPTO) || LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) )
+	crypto_digest_init(tfm_michael);
+        crypto_digest_setkey(tfm_michael, key, 8);
+        crypto_digest_update(tfm_michael, sg, 2);
+        crypto_digest_final(tfm_michael, mic);
+        return 0;
+#else
+if (crypto_hash_setkey(tkey->tfm_michael, key, 8))
+                return -1;
+
+              desc.tfm = tkey->tfm_michael;
+              desc.flags = 0;
+              ret = crypto_hash_digest(&desc, sg, data_len + 16, mic);
+              return ret;
+#endif
+}
+#else
+static int michael_mic(struct crypto_hash *tfm_michael, u8 * key, u8 * hdr,
+                       u8 * data, size_t data_len, u8 * mic)
+{
+        struct hash_desc desc;
+        struct scatterlist sg[2];
+
+        if (tfm_michael == NULL) {
+                printk(KERN_WARNING "michael_mic: tfm_michael == NULL\n");
+                return -1;
+        }
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
+        sg[0].page = virt_to_page(hdr);
+        sg[0].offset = offset_in_page(hdr);
+        sg[0].length = 16;
+
+        sg[1].page = virt_to_page(data);
+        sg[1].offset = offset_in_page(data);
+        sg[1].length = data_len;
+#else
+        sg_init_table(sg, 2);
+        sg_set_buf(&sg[0], hdr, 16);
+        sg_set_buf(&sg[1], data, data_len);
+#endif
+
+        if (crypto_hash_setkey(tfm_michael, key, 8))
+                return -1;
+
+        desc.tfm = tfm_michael;
+        desc.flags = 0;
+        return crypto_hash_digest(&desc, sg, data_len + 16, mic);
+}
+#endif
+
+
+
+static void michael_mic_hdr(struct sk_buff *skb, u8 *hdr)
+{
+	struct rtllib_hdr_4addr *hdr11;
+
+	hdr11 = (struct rtllib_hdr_4addr *) skb->data;
+	switch (le16_to_cpu(hdr11->frame_ctl) &
+		(RTLLIB_FCTL_FROMDS | RTLLIB_FCTL_TODS)) {
+	case RTLLIB_FCTL_TODS:
+		memcpy(hdr, hdr11->addr3, ETH_ALEN); /* DA */
+		memcpy(hdr + ETH_ALEN, hdr11->addr2, ETH_ALEN); /* SA */
+		break;
+	case RTLLIB_FCTL_FROMDS:
+		memcpy(hdr, hdr11->addr1, ETH_ALEN); /* DA */
+		memcpy(hdr + ETH_ALEN, hdr11->addr3, ETH_ALEN); /* SA */
+		break;
+	case RTLLIB_FCTL_FROMDS | RTLLIB_FCTL_TODS:
+		memcpy(hdr, hdr11->addr3, ETH_ALEN); /* DA */
+		memcpy(hdr + ETH_ALEN, hdr11->addr4, ETH_ALEN); /* SA */
+		break;
+	case 0:
+		memcpy(hdr, hdr11->addr1, ETH_ALEN); /* DA */
+		memcpy(hdr + ETH_ALEN, hdr11->addr2, ETH_ALEN); /* SA */
+		break;
+	}
+		
+	hdr[12] = 0; /* priority */
+	
+	hdr[13] = hdr[14] = hdr[15] = 0; /* reserved */
+}
+
+
+static int rtllib_michael_mic_add(struct sk_buff *skb, int hdr_len, void *priv)
+{
+	struct rtllib_tkip_data *tkey = priv;
+	u8 *pos;
+	struct rtllib_hdr_4addr *hdr;
+
+	hdr = (struct rtllib_hdr_4addr *) skb->data;
+
+	if (skb_tailroom(skb) < 8 || skb->len < hdr_len) {
+		printk(KERN_DEBUG "Invalid packet for Michael MIC add "
+		       "(tailroom=%d hdr_len=%d skb->len=%d)\n",
+		       skb_tailroom(skb), hdr_len, skb->len);
+		return -1;
+	}
+
+	michael_mic_hdr(skb, tkey->tx_hdr);
+
+	if(RTLLIB_QOS_HAS_SEQ(le16_to_cpu(hdr->frame_ctl))) {
+		tkey->tx_hdr[12] = *(skb->data + hdr_len - 2) & 0x07;
+	}
+	pos = skb_put(skb, 8);
+#if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
+	if (michael_mic(tkey->tx_tfm_michael, &tkey->key[16], tkey->tx_hdr,
+				skb->data + hdr_len, skb->len - 8 - hdr_len, pos))
+#else
+	if (michael_mic(tkey->tx_tfm_michael, &tkey->key[16], tkey->tx_hdr,
+				skb->data + hdr_len, skb->len - 8 - hdr_len, pos))
+#endif
+		return -1;
+
+	return 0;
+}
+
+
+#if WIRELESS_EXT >= 18
+static void rtllib_michael_mic_failure(struct net_device *dev,
+				       struct rtllib_hdr_4addr *hdr,
+				       int keyidx)
+{
+	union iwreq_data wrqu;
+	struct iw_michaelmicfailure ev;
+
+	/* TODO: needed parameters: count, keyid, key type, TSC */
+	memset(&ev, 0, sizeof(ev));
+	ev.flags = keyidx & IW_MICFAILURE_KEY_ID;
+	if (hdr->addr1[0] & 0x01)
+		ev.flags |= IW_MICFAILURE_GROUP;
+	else
+		ev.flags |= IW_MICFAILURE_PAIRWISE;
+	ev.src_addr.sa_family = ARPHRD_ETHER;
+	memcpy(ev.src_addr.sa_data, hdr->addr2, ETH_ALEN);
+	memset(&wrqu, 0, sizeof(wrqu));
+	wrqu.data.length = sizeof(ev);
+	wireless_send_event(dev, IWEVMICHAELMICFAILURE, &wrqu, (char *) &ev);
+}
+#elif WIRELESS_EXT >= 15
+static void rtllib_michael_mic_failure(struct net_device *dev,
+				       struct rtllib_hdr_4addr *hdr,
+				       int keyidx)
+{
+	union iwreq_data wrqu;
+	char buf[128];
+
+	/* TODO: needed parameters: count, keyid, key type, TSC */
+	sprintf(buf, "MLME-MICHAELMICFAILURE.indication(keyid=%d %scast addr="
+		MAC_FMT ")", keyidx, hdr->addr1[0] & 0x01 ? "broad" : "uni",
+		MAC_ARG(hdr->addr2));
+	memset(&wrqu, 0, sizeof(wrqu));
+	wrqu.data.length = strlen(buf);
+	wireless_send_event(dev, IWEVCUSTOM, &wrqu, buf);
+}
+#else /* WIRELESS_EXT >= 15 */
+static inline void rtllib_michael_mic_failure(struct net_device *dev,
+					      struct rtllib_hdr_4addr *hdr,
+					      int keyidx)
+{
+}
+#endif /* WIRELESS_EXT >= 15 */
+
+static int rtllib_michael_mic_verify(struct sk_buff *skb, int keyidx,
+				     int hdr_len, void *priv, struct rtllib_device* ieee)
+{
+	struct rtllib_tkip_data *tkey = priv;
+	u8 mic[8];
+	struct rtllib_hdr_4addr *hdr;
+
+	hdr = (struct rtllib_hdr_4addr *) skb->data;
+
+	if (!tkey->key_set)
+		return -1;
+
+	michael_mic_hdr(skb, tkey->rx_hdr);
+	if(RTLLIB_QOS_HAS_SEQ(le16_to_cpu(hdr->frame_ctl))) {
+		tkey->rx_hdr[12] = *(skb->data + hdr_len - 2) & 0x07;
+	}
+
+#if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
+	if (michael_mic(tkey->rx_tfm_michael, &tkey->key[24], tkey->rx_hdr,
+				skb->data + hdr_len, skb->len - 8 - hdr_len, mic))
+#else
+	if (michael_mic(tkey->rx_tfm_michael, &tkey->key[24], tkey->rx_hdr,
+				skb->data + hdr_len, skb->len - 8 - hdr_len, mic))
+#endif 
+            	return -1;
+    
+	if ((memcmp(mic, skb->data + skb->len - 8, 8) != 0)||(ieee->force_mic_error)) {
+		struct rtllib_hdr_4addr *hdr;
+		hdr = (struct rtllib_hdr_4addr *) skb->data;
+		printk(KERN_DEBUG "%s: Michael MIC verification failed for "
+		       "MSDU from " MAC_FMT " keyidx=%d\n",
+		       skb->dev ? skb->dev->name : "N/A", MAC_ARG(hdr->addr2),
+		       keyidx);
+                printk("%d, force_mic_error = %d\n", (memcmp(mic, skb->data + skb->len - 8, 8) != 0),\
+                        ieee->force_mic_error); 
+		if (skb->dev) {
+                        printk("skb->dev != NULL\n");
+			rtllib_michael_mic_failure(skb->dev, hdr, keyidx);
+                }
+		tkey->dot11RSNAStatsTKIPLocalMICFailures++;
+                ieee->force_mic_error = false;
+		return -1;
+	}
+
+	/* Update TSC counters for RX now that the packet verification has
+	 * completed. */
+	tkey->rx_iv32 = tkey->rx_iv32_new;
+	tkey->rx_iv16 = tkey->rx_iv16_new;
+
+	skb_trim(skb, skb->len - 8);
+
+	return 0;
+}
+
+
+static int rtllib_tkip_set_key(void *key, int len, u8 *seq, void *priv)
+{
+	struct rtllib_tkip_data *tkey = priv;
+	int keyidx;
+#if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
+	struct crypto_tfm *tfm = tkey->tx_tfm_michael;
+	struct crypto_tfm *tfm2 = tkey->tx_tfm_arc4;
+	struct crypto_tfm *tfm3 = tkey->rx_tfm_michael;
+	struct crypto_tfm *tfm4 = tkey->rx_tfm_arc4;
+#else
+	struct crypto_hash *tfm = tkey->tx_tfm_michael;
+	struct crypto_blkcipher *tfm2 = tkey->tx_tfm_arc4;
+	struct crypto_hash *tfm3 = tkey->rx_tfm_michael;
+	struct crypto_blkcipher *tfm4 = tkey->rx_tfm_arc4;
+#endif
+
+	keyidx = tkey->key_idx;
+	memset(tkey, 0, sizeof(*tkey));
+	tkey->key_idx = keyidx;
+#if ( defined(BUILT_IN_CRYPTO) || ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && (!OPENSUSE_SLED)) )
+	tkey->tx_tfm_michael = tfm;
+	tkey->tx_tfm_arc4 = tfm2;
+	tkey->rx_tfm_michael = tfm3;
+	tkey->rx_tfm_arc4 = tfm4;
+#else
+	tkey->tx_tfm_michael = tfm;
+	tkey->tx_tfm_arc4 = tfm2;
+	tkey->rx_tfm_michael = tfm3;
+	tkey->rx_tfm_arc4 = tfm4;
+#endif
+
+	if (len == TKIP_KEY_LEN) {
+		memcpy(tkey->key, key, TKIP_KEY_LEN);
+		tkey->key_set = 1;
+		tkey->tx_iv16 = 1; /* TSC is initialized to 1 */
+		if (seq) {
+			tkey->rx_iv32 = (seq[5] << 24) | (seq[4] << 16) |
+				(seq[3] << 8) | seq[2];
+			tkey->rx_iv16 = (seq[1] << 8) | seq[0];
+		}
+	} else if (len == 0)
+		tkey->key_set = 0;
+	else
+		return -1;
+
+	return 0;
+}
+
+
+static int rtllib_tkip_get_key(void *key, int len, u8 *seq, void *priv)
+{
+	struct rtllib_tkip_data *tkey = priv;
+
+	if (len < TKIP_KEY_LEN)
+		return -1;
+
+	if (!tkey->key_set)
+		return 0;
+	memcpy(key, tkey->key, TKIP_KEY_LEN);
+
+	if (seq) {
+		/* Return the sequence number of the last transmitted frame. */
+		u16 iv16 = tkey->tx_iv16;
+		u32 iv32 = tkey->tx_iv32;
+		if (iv16 == 0)
+			iv32--;
+		iv16--;
+		seq[0] = tkey->tx_iv16;
+		seq[1] = tkey->tx_iv16 >> 8;
+		seq[2] = tkey->tx_iv32;
+		seq[3] = tkey->tx_iv32 >> 8;
+		seq[4] = tkey->tx_iv32 >> 16;
+		seq[5] = tkey->tx_iv32 >> 24;
+	}
+
+	return TKIP_KEY_LEN;
+}
+
+
+static char * rtllib_tkip_print_stats(char *p, void *priv)
+{
+	struct rtllib_tkip_data *tkip = priv;
+	p += sprintf(p, "key[%d] alg=TKIP key_set=%d "
+		     "tx_pn=%02x%02x%02x%02x%02x%02x "
+		     "rx_pn=%02x%02x%02x%02x%02x%02x "
+		     "replays=%d icv_errors=%d local_mic_failures=%d\n",
+		     tkip->key_idx, tkip->key_set,
+		     (tkip->tx_iv32 >> 24) & 0xff,
+		     (tkip->tx_iv32 >> 16) & 0xff,
+		     (tkip->tx_iv32 >> 8) & 0xff,
+		     tkip->tx_iv32 & 0xff,
+		     (tkip->tx_iv16 >> 8) & 0xff,
+		     tkip->tx_iv16 & 0xff,
+		     (tkip->rx_iv32 >> 24) & 0xff,
+		     (tkip->rx_iv32 >> 16) & 0xff,
+		     (tkip->rx_iv32 >> 8) & 0xff,
+		     tkip->rx_iv32 & 0xff,
+		     (tkip->rx_iv16 >> 8) & 0xff,
+		     tkip->rx_iv16 & 0xff,
+		     tkip->dot11RSNAStatsTKIPReplays,
+		     tkip->dot11RSNAStatsTKIPICVErrors,
+		     tkip->dot11RSNAStatsTKIPLocalMICFailures);
+	return p;
+}
+
+
+static struct rtllib_crypto_ops rtllib_crypt_tkip = {
+	.name			= "TKIP",
+	.init			= rtllib_tkip_init,
+	.deinit			= rtllib_tkip_deinit,
+	.encrypt_mpdu		= rtllib_tkip_encrypt,
+	.decrypt_mpdu		= rtllib_tkip_decrypt,
+	.encrypt_msdu		= rtllib_michael_mic_add,
+	.decrypt_msdu		= rtllib_michael_mic_verify,
+	.set_key		= rtllib_tkip_set_key,
+	.get_key		= rtllib_tkip_get_key,
+	.print_stats		= rtllib_tkip_print_stats,
+	.extra_prefix_len	= 4 + 4, /* IV + ExtIV */
+	.extra_postfix_len	= 8 + 4, /* MIC + ICV */
+	.owner		        = THIS_MODULE,
+};
+
+
+int __init rtllib_crypto_tkip_init(void)
+{
+	return rtllib_register_crypto_ops(&rtllib_crypt_tkip);
+}
+
+
+void __exit rtllib_crypto_tkip_exit(void)
+{
+	rtllib_unregister_crypto_ops(&rtllib_crypt_tkip);
+}
+
+void rtllib_tkip_null(void)
+{
+        return;
+}
+
+#ifndef BUILT_IN_RTLLIB
+EXPORT_SYMBOL_RSL(rtllib_tkip_null);
+
+module_init(rtllib_crypto_tkip_init);
+module_exit(rtllib_crypto_tkip_exit);
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/license
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/license
@@ -0,0 +1,339 @@
+
+"This software program is licensed subject to the GNU General Public License 
+(GPL). Version 2, June 1991, available at 
+<http:
+
+GNU General Public License 
+
+Version 2, June 1991
+
+Copyright (C) 1989, 1991 Free Software Foundation, Inc.  
+59 Temple Place - Suite 330, Boston, MA  02111-1307, USA
+
+Everyone is permitted to copy and distribute verbatim copies of this license
+document, but changing it is not allowed.
+
+Preamble
+
+The licenses for most software are designed to take away your freedom to 
+share and change it. By contrast, the GNU General Public License is intended
+to guarantee your freedom to share and change free software--to make sure 
+the software is free for all its users. This General Public License applies 
+to most of the Free Software Foundation's software and to any other program 
+whose authors commit to using it. (Some other Free Software Foundation 
+software is covered by the GNU Library General Public License instead.) You 
+can apply it to your programs, too.
+
+When we speak of free software, we are referring to freedom, not price. Our
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+
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+
+TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
+
+0. This License applies to any program or other work which contains a notice
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+
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+   distributing the Program (or any work based on the Program), you 
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+
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+
+9. The Free Software Foundation may publish revised and/or new versions of 
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+
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+   NO WARRANTY
+
+11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY 
+    FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN 
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+
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+    OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. 
+
+END OF TERMS AND CONDITIONS
+
+How to Apply These Terms to Your New Programs
+
+If you develop a new program, and you want it to be of the greatest 
+possible use to the public, the best way to achieve this is to make it free 
+software which everyone can redistribute and change under these terms. 
+
+To do so, attach the following notices to the program. It is safest to 
+attach them to the start of each source file to most effectively convey the
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+line and a pointer to where the full notice is found. 
+
+one line to give the program's name and an idea of what it does.
+Copyright (C) yyyy  name of author
+
+This program is free software; you can redistribute it and/or modify it 
+under the terms of the GNU General Public License as published by the Free 
+Software Foundation; either version 2 of the License, or (at your option) 
+any later version.
+
+This program is distributed in the hope that it will be useful, but WITHOUT 
+ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 
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+more details.
+
+You should have received a copy of the GNU General Public License along with
+this program; if not, write to the Free Software Foundation, Inc., 59 
+Temple Place - Suite 330, Boston, MA  02111-1307, USA.
+
+Also add information on how to contact you by electronic and paper mail. 
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+If the program is interactive, make it output a short notice like this when 
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+Gnomovision version 69, Copyright (C) year name of author Gnomovision comes 
+with ABSOLUTELY NO WARRANTY; for details type 'show w'.  This is free 
+software, and you are welcome to redistribute it under certain conditions; 
+type 'show c' for details.
+
+The hypothetical commands 'show w' and 'show c' should show the appropriate 
+parts of the General Public License. Of course, the commands you use may be 
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+mouse-clicks or menu items--whatever suits your program. 
+
+You should also get your employer (if you work as a programmer) or your 
+school, if any, to sign a "copyright disclaimer" for the program, if 
+necessary. Here is a sample; alter the names: 
+
+Yoyodyne, Inc., hereby disclaims all copyright interest in the program 
+'Gnomovision' (which makes passes at compilers) written by James Hacker.
+
+signature of Ty Coon, 1 April 1989
+Ty Coon, President of Vice
+
+This General Public License does not permit incorporating your program into 
+proprietary programs. If your program is a subroutine library, you may 
+consider it more useful to permit linking proprietary applications with the 
+library. If this is what you want to do, use the GNU Library General Public 
+License instead of this License.
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/rtllib_crypt.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/rtllib_crypt.h
@@ -0,0 +1,93 @@
+/*
+ * Original code based on Host AP (software wireless LAN access point) driver
+ * for Intersil Prism2/2.5/3.
+ *
+ * Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
+ * <jkmaline@cc.hut.fi>
+ * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
+ *
+ * Adaption to a generic IEEE 802.11 stack by James Ketrenos
+ * <jketreno@linux.intel.com>
+ *
+ * Copyright (c) 2004, Intel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation. See README and COPYING for
+ * more details.
+ */
+
+/*
+ * This file defines the interface to the rtllib crypto module.
+ */
+#ifndef RTLLIB_CRYPT_H
+#define RTLLIB_CRYPT_H
+
+#include <linux/skbuff.h>
+
+struct rtllib_crypto_ops {
+	const char *name;
+
+	/* init new crypto context (e.g., allocate private data space,
+	 * select IV, etc.); returns NULL on failure or pointer to allocated
+	 * private data on success */
+	void * (*init)(int keyidx);
+
+	/* deinitialize crypto context and free allocated private data */
+	void (*deinit)(void *priv);
+
+	/* encrypt/decrypt return < 0 on error or >= 0 on success. The return
+	 * value from decrypt_mpdu is passed as the keyidx value for
+	 * decrypt_msdu. skb must have enough head and tail room for the
+	 * encryption; if not, error will be returned; these functions are
+	 * called for all MPDUs (i.e., fragments).
+	 */
+	int (*encrypt_mpdu)(struct sk_buff *skb, int hdr_len, void *priv);
+	int (*decrypt_mpdu)(struct sk_buff *skb, int hdr_len, void *priv);
+
+	/* These functions are called for full MSDUs, i.e. full frames.
+	 * These can be NULL if full MSDU operations are not needed. */
+	int (*encrypt_msdu)(struct sk_buff *skb, int hdr_len, void *priv);
+	int (*decrypt_msdu)(struct sk_buff *skb, int keyidx, int hdr_len,
+			    void *priv, struct rtllib_device* ieee);
+
+	int (*set_key)(void *key, int len, u8 *seq, void *priv);
+	int (*get_key)(void *key, int len, u8 *seq, void *priv);
+
+	/* procfs handler for printing out key information and possible
+	 * statistics */
+	char * (*print_stats)(char *p, void *priv);
+
+	/* maximum number of bytes added by encryption; encrypt buf is
+	 * allocated with extra_prefix_len bytes, copy of in_buf, and
+	 * extra_postfix_len; encrypt need not use all this space, but
+	 * the result must start at the beginning of the buffer and correct
+	 * length must be returned */
+	int extra_prefix_len, extra_postfix_len;
+
+	struct module *owner;
+};
+
+struct rtllib_crypt_data {
+	struct list_head list; /* delayed deletion list */
+	struct rtllib_crypto_ops *ops;
+	void *priv;
+	atomic_t refcnt;
+};
+
+int rtllib_register_crypto_ops(struct rtllib_crypto_ops *ops);
+int rtllib_unregister_crypto_ops(struct rtllib_crypto_ops *ops);
+struct rtllib_crypto_ops * rtllib_get_crypto_ops(const char *name);
+void rtllib_crypt_deinit_entries(struct rtllib_device *, int);
+void rtllib_crypt_deinit_handler(unsigned long);
+void rtllib_crypt_delayed_deinit(struct rtllib_device *ieee,
+				    struct rtllib_crypt_data **crypt);
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
+#define offset_in_page(p) ((unsigned long)(p) & ~PAGE_MASK)
+#endif
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,31))
+#define crypto_alloc_tfm crypto_alloc_tfm_rsl
+#define crypto_free_tfm crypto_free_tfm_rsl
+#endif
+
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/wapi.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/wapi.h
@@ -0,0 +1,135 @@
+#ifndef __INC_WAPI_H
+#define __INC_WAPI_H
+
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include "rtl819x_Qos.h"
+
+/* WAPI trace debug */
+extern u32 wapi_debug_component;
+
+#define WAPI_TRACE(component, x, args...) \
+do { if(wapi_debug_component & (component)) \
+	printk(KERN_DEBUG "WAPI" ":" x "" , \
+	       ##args);\
+}while(0);
+
+#define WAPI_DATA(component, x, buf, len) \
+do { if(wapi_debug_component & (component)){ \
+	printk("%s:\n", x);\
+	dump_buf((buf), (len));}\
+}while(0);
+
+enum WAPI_DEBUG {
+	WAPI_INIT				=BIT0,
+	WAPI_API				= BIT1,	 
+	WAPI_TX				= BIT2,	 
+	WAPI_RX				= BIT3,
+	WAPI_ERR		        	= BIT31
+};
+
+#define			WAPI_MAX_BKID_NUM				64
+#define			WAPI_MAX_STAINFO_NUM			64
+typedef struct  _RT_WAPI_BKID
+{
+	struct list_head	list;
+	u8				bkid[16];
+}RT_WAPI_BKID,*PRT_WAPI_BKID;
+
+typedef struct  _RT_WAPI_KEY
+{
+	u8			dataKey[16];
+	u8			micKey[16];
+	u8			keyId;
+	bool			bSet;
+	bool             bTxEnable;
+}RT_WAPI_KEY,*PRT_WAPI_KEY;
+
+typedef enum _RT_WAPI_PACKET_TYPE
+{
+	WAPI_NONE = 0,
+	WAPI_PREAUTHENTICATE=1,
+	WAPI_STAKEY_REQUEST=2,
+	WAPI_AUTHENTICATE_ACTIVE=3,
+	WAPI_ACCESS_AUTHENTICATE_REQUEST=4,
+	WAPI_ACCESS_AUTHENTICATE_RESPONSE=5,
+	WAPI_CERTIFICATE_AUTHENTICATE_REQUEST=6,
+	WAPI_CERTIFICATE_AUTHENTICATE_RESPONSE=7,
+	WAPI_USK_REQUEST=8,
+	WAPI_USK_RESPONSE=9,
+	WAPI_USK_CONFIRM=10,
+	WAPI_MSK_NOTIFICATION=11,
+	WAPI_MSK_RESPONSE=12
+}RT_WAPI_PACKET_TYPE;
+
+typedef struct _RT_CACHE_INFO {
+	u8	cache_buffer[2000];
+	u16	cache_buffer_len;
+	u8 saddr[6];
+	bool bAuthenticator;
+	u16	recvSeq;
+	u8	lastFragNum;
+	struct list_head list;
+}RT_CACHE_INFO, *PRT_CACHE_INFO;
+
+typedef struct	_RT_WAPI_STA_INFO
+{
+	struct list_head		list;
+	u8					PeerMacAddr[6];	
+	RT_WAPI_KEY		      wapiUsk;
+	RT_WAPI_KEY		      wapiUskUpdate;
+	RT_WAPI_KEY		      wapiMsk;
+	RT_WAPI_KEY		      wapiMskUpdate;	
+	u8					lastRxUnicastPN[16];
+	u8					lastTxUnicastPN[16];
+	u8					lastRxMulticastPN[16];
+	u8					lastRxUnicastPNBEQueue[16];
+	u8					lastRxUnicastPNBKQueue[16];
+	u8					lastRxUnicastPNVIQueue[16];
+	u8					lastRxUnicastPNVOQueue[16];
+	bool					bSetkeyOk;
+	bool					bAuthenticateInProgress;
+	bool					bAuthenticatorInUpdata;
+}RT_WAPI_STA_INFO,*PRT_WAPI_STA_INFO;
+
+typedef struct _RT_WAPI_T
+{
+   	u8		assoReqWapiIE[256];
+	u8		assoReqWapiIELength;
+	u8		assoRspWapiIE[256];
+	u8		assoRspWapiIELength;
+	u8		sendbeaconWapiIE[256];
+	u8		sendbeaconWapiIELength;
+	RT_WAPI_BKID		wapiBKID[WAPI_MAX_BKID_NUM];
+	struct list_head		wapiBKIDIdleList;
+	struct list_head  		wapiBKIDStoreList;
+	RT_WAPI_KEY		      wapiTxMsk;
+
+	u8				wapiDestMacAddr[6];
+	bool				bAuthenticator;
+	u8				lastTxMulticastPN[16];
+	RT_WAPI_STA_INFO	wapiSta[WAPI_MAX_STAINFO_NUM];
+	struct list_head		wapiSTAIdleList;
+	struct list_head		wapiSTAUsedList;
+	bool				bWapiEnable;
+	bool				bUpdateUsk;
+	bool				bUpdateMsk;
+
+	u8				wapiIE[256];
+	u8				wapiIELength;
+	bool				bWapiNotSetEncMacHeader;
+	bool				bWapiPSK;
+	bool				bFirstAuthentiateInProgress;
+	u16				wapiSeqnumAndFragNum;
+	int extra_prefix_len;
+	int extra_postfix_len;
+}RT_WAPI_T,*PRT_WAPI_T;
+
+typedef struct _WLAN_HEADER_WAPI_EXTENSION
+{
+    u8      KeyIdx;
+    u8      Reserved;
+    u8      PN[16];
+} WLAN_HEADER_WAPI_EXTENSION, *PWLAN_HEADER_WAPI_EXTENSION;
+
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/wapi.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/wapi.c
@@ -0,0 +1,1842 @@
+#if defined (RTL8192S_WAPI_SUPPORT)
+
+#include <linux/unistd.h>
+#include <linux/etherdevice.h>
+#include "wapi.h"
+#include "wapi_interface.h"
+#include "rtllib.h"
+
+#define LITTLE_ENDIAN   
+#define ENCRYPT  0     
+#define DECRYPT  1     
+
+u32 wapi_debug_component = 	WAPI_INIT    	|
+				WAPI_ERR ; 
+
+void WapiInit(struct rtllib_device *ieee)
+{
+	PRT_WAPI_T		pWapiInfo;
+	int				i;
+
+	WAPI_TRACE(WAPI_INIT, "===========> %s\n", __FUNCTION__);
+	RT_ASSERT_RET(ieee);
+
+	pWapiInfo =  &ieee->wapiInfo;
+	pWapiInfo->bWapiEnable = false;
+
+	INIT_LIST_HEAD(&ieee->cache_frag_list);
+
+	INIT_LIST_HEAD(&pWapiInfo->wapiBKIDIdleList);
+	INIT_LIST_HEAD(&pWapiInfo->wapiBKIDStoreList);
+	for(i=0;i<WAPI_MAX_BKID_NUM;i++)
+	{
+		list_add_tail(&pWapiInfo->wapiBKID[i].list, &pWapiInfo->wapiBKIDIdleList);
+	}
+
+	INIT_LIST_HEAD(&pWapiInfo->wapiSTAIdleList);
+	INIT_LIST_HEAD(&pWapiInfo->wapiSTAUsedList);
+	for(i=0;i<WAPI_MAX_STAINFO_NUM;i++)
+	{
+		list_add_tail(&pWapiInfo->wapiSta[i].list, &pWapiInfo->wapiSTAIdleList);
+	}
+
+	spin_lock_init(&ieee->wapi_queue_lock);
+
+	ieee->wapi_queue = (WAPI_QUEUE *)kmalloc((sizeof(WAPI_QUEUE)), GFP_KERNEL);
+	if (!ieee->wapi_queue) {
+		return;
+	}
+	memset((void *)ieee->wapi_queue, 0, sizeof (WAPI_QUEUE));
+	WAPI_InitQueue(ieee->wapi_queue, WAPI_MAX_QUEUE_LEN, WAPI_MAX_BUFF_LEN);	
+	
+	WAPI_TRACE(WAPI_INIT, "<========== %s\n", __FUNCTION__);
+}
+
+void WapiExit(struct rtllib_device *ieee)
+{
+	WAPI_TRACE(WAPI_INIT, "===========> %s\n", __FUNCTION__);
+	RT_ASSERT_RET(ieee);
+	
+	if(ieee->wapi_queue)
+		kfree(ieee->wapi_queue);
+	ieee->wapi_queue = 0;
+	
+	WAPI_TRACE(WAPI_INIT, "<========== %s\n", __FUNCTION__);
+}
+
+void WapiCreateAppEventAndSend(
+	struct rtllib_device *ieee,
+	u8 		*pbuffer,
+	u16		buf_len,
+	u8 		*DestAddr,
+	u8		bUpdateBK,
+	u8		bUpdateUSK,
+	u8		bUpdateMSK,
+	u8		RcvPktType,
+	u8		bDisconnect
+)
+{
+	PRT_WAPI_T pWapiInfo = &(ieee->wapiInfo);
+	PRT_WAPI_STA_INFO pWapiSta = NULL;
+	u8 WapiASUEPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ;	
+	u8 WapiAEMultiCastPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ;	
+	u8 bFind = false, bRecvAEPacket = false, bRecvASUEPacket = false, EventId = 0;
+
+	WAPI_TRACE(WAPI_API, "==========> %s\n", __FUNCTION__);
+	WAPI_TRACE(WAPI_API, "DestAddr="MAC_FMT" bUpdateBK=%d bUpdateUSK=%d bUpdateMSK=%d RcvPktType=%d bDisconnect=%d\n", 
+			MAC_ARG(DestAddr), bUpdateBK, bUpdateUSK, bUpdateMSK, RcvPktType,bDisconnect);
+
+	/*if(!pWapiInfo->bWapiEnable){
+		WAPI_TRACE(WAPI_ERR,"%s: ieee->WapiSupport = 0!!\n",__FUNCTION__);
+		return;
+	}*/
+	
+	if(list_empty(&pWapiInfo->wapiSTAUsedList)){
+		bFind = false;
+	}else{
+		list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) {
+			if(!memcmp(DestAddr,pWapiSta->PeerMacAddr,ETH_ALEN)){
+				bFind = true;
+				break;
+			}
+		}
+	}
+
+	WAPI_TRACE(WAPI_API, "%s: DestAddr="MAC_FMT" bFind=%d\n", __FUNCTION__, MAC_ARG(DestAddr), bFind);
+	switch(RcvPktType){
+		case WAPI_PREAUTHENTICATE:
+			 EventId = WAPI_EVENT_RCV_PREAUTHENTICATE;
+			 bRecvAEPacket = true;
+			 bRecvASUEPacket = false;
+			 break;
+		case WAPI_ACCESS_AUTHENTICATE_REQUEST:
+			 EventId = WAPI_EVENT_RCV_ACCESS_AUTHENTICATE_REQUEST;
+			 bRecvAEPacket = true;
+			 bRecvASUEPacket = false;
+			 break;
+		case WAPI_USK_RESPONSE:
+			 EventId = WAPI_EVENT_RCV_USK_RESPONSE;
+			 bRecvAEPacket = true;
+			 bRecvASUEPacket = false;
+			 break;
+		case WAPI_MSK_RESPONSE:
+			 EventId = WAPI_EVENT_RCV_MSK_RESPONSE;
+			 bRecvAEPacket = true;
+			 bRecvASUEPacket = false;
+			 break;
+		case WAPI_STAKEY_REQUEST:
+			 EventId = WAPI_EVENT_RCV_STAKEY_REQUEST;
+			 bRecvAEPacket = false;
+			 bRecvASUEPacket = true;
+			 break;
+		case WAPI_AUTHENTICATE_ACTIVE:
+			 EventId = WAPI_EVENT_RCV_AUTHENTICATE_ACTIVE;
+			 bRecvAEPacket = false;
+			 bRecvASUEPacket = true;
+			 break;
+		case WAPI_ACCESS_AUTHENTICATE_RESPONSE:
+			 EventId = WAPI_EVENT_RCV_ACCESS_AUTHENTICATE_RESPONSE;
+			 bRecvAEPacket = false;
+			 bRecvASUEPacket = true;
+			 break;
+		case WAPI_USK_REQUEST:
+			 EventId = WAPI_EVENT_RCV_USK_REQUEST;
+			 bRecvAEPacket = false;
+			 bRecvASUEPacket = true;
+			 break;
+		case WAPI_USK_CONFIRM:
+			 EventId = WAPI_EVENT_RCV_USK_CONFIRM;
+			 bRecvAEPacket = false;
+			 bRecvASUEPacket = true;
+			 break;
+		case WAPI_MSK_NOTIFICATION:
+			 EventId = WAPI_EVENT_RCV_MSK_NOTIFICATION;
+			 bRecvAEPacket = false;
+			 bRecvASUEPacket = true;
+			 break;
+		default:
+			 break;
+	}
+
+	if(ieee->iw_mode == IW_MODE_INFRA){
+		if(bRecvAEPacket || bUpdateMSK){
+			goto out;
+		}
+		if(bRecvASUEPacket){
+			WAPI_CreateEvent_Send(ieee, EventId, DestAddr, pbuffer, buf_len);
+			goto out;
+		}
+		if(bUpdateBK && bFind){
+			EventId = WAPI_EVENT_ASUE_UPDATE_BK;
+			WAPI_CreateEvent_Send(ieee, EventId, DestAddr, NULL, 0);
+			goto out;
+		}
+		if(bUpdateUSK&& bFind){
+			EventId = WAPI_EVENT_ASUE_UPDATE_USK;
+			WAPI_CreateEvent_Send(ieee, EventId, DestAddr, NULL, 0);
+			goto out;
+		}
+		if(bDisconnect && bFind){
+			EventId = WAPI_EVENT_DISCONNECT;
+			WAPI_CreateEvent_Send(ieee, EventId, DestAddr, NULL, 0);
+			goto out;
+		}
+	}
+	else if(ieee->iw_mode == IW_MODE_ADHOC)
+	{
+		if((bFind )&& (!pWapiSta->bSetkeyOk) && (bUpdateBK ||bUpdateUSK||bUpdateMSK))
+			goto out;
+		if(bRecvASUEPacket){
+			WAPI_CreateEvent_Send(ieee, EventId, DestAddr, pbuffer, buf_len);
+			if(EventId != WAPI_EVENT_RCV_USK_REQUEST)
+				goto out;
+		}
+		if((!bFind) && (!bDisconnect) && (!bUpdateMSK))
+		{
+			if(!list_empty(&pWapiInfo->wapiSTAIdleList))
+			{
+				pWapiSta =(PRT_WAPI_STA_INFO)list_entry(pWapiInfo->wapiSTAIdleList.next, RT_WAPI_STA_INFO, list);
+				list_del_init(&pWapiSta->list);
+				list_add_tail(&pWapiSta->list, &pWapiInfo->wapiSTAUsedList);
+				WAPI_TRACE(WAPI_API, "%s: Add wapi station "MAC_FMT"\n", __FUNCTION__, MAC_ARG(DestAddr));
+				memcpy(pWapiSta->PeerMacAddr,DestAddr,6);
+				memcpy(pWapiSta->lastRxMulticastPN, WapiAEMultiCastPNInitialValueSrc, 16);
+				memcpy(pWapiSta->lastRxUnicastPN, WapiASUEPNInitialValueSrc, 16);
+			}
+			
+			pWapiInfo->bFirstAuthentiateInProgress= true;
+
+			EventId = WAPI_EVENT_FIRST_AUTHENTICATOR;
+			WAPI_CreateEvent_Send(ieee, EventId, DestAddr, NULL, 0);
+			goto out;
+		}else{
+			if(bRecvAEPacket){
+				WAPI_CreateEvent_Send(ieee, EventId, DestAddr, pbuffer, buf_len);
+				goto out;
+			}
+			if(bDisconnect){
+				EventId = WAPI_EVENT_DISCONNECT;
+				WAPI_CreateEvent_Send(ieee, EventId, DestAddr, NULL, 0);
+				goto out;
+			}
+			if(bUpdateBK){
+				EventId = WAPI_EVENT_AE_UPDATE_BK;
+				WAPI_CreateEvent_Send(ieee, EventId, DestAddr, NULL, 0);
+				goto out;
+			}
+			if(bUpdateUSK){
+				EventId = WAPI_EVENT_AE_UPDATE_USK;
+				WAPI_CreateEvent_Send(ieee, EventId, DestAddr, NULL, 0);
+				goto out;
+			}
+			if(bUpdateMSK){
+				list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) {
+					if(pWapiSta->bSetkeyOk){
+						EventId = WAPI_EVENT_AE_UPDATE_MSK;
+						WAPI_CreateEvent_Send(ieee, EventId, pWapiSta->PeerMacAddr, NULL, 0);
+					}
+				}
+				goto out;
+			}
+		}
+	}
+	
+out:	
+	WAPI_TRACE(WAPI_API, "<========== %s\n", __FUNCTION__);
+	return;
+}
+
+
+void WapiReturnAllStaInfo(struct rtllib_device *ieee)
+{
+	PRT_WAPI_T				pWapiInfo;
+	PRT_WAPI_STA_INFO		pWapiStaInfo;
+	PRT_WAPI_BKID			pWapiBkid;
+	WAPI_TRACE(WAPI_INIT, "===========> %s\n", __FUNCTION__);
+	
+	pWapiInfo = &ieee->wapiInfo;
+
+	while(!list_empty(&(pWapiInfo->wapiSTAUsedList)))
+	{
+		pWapiStaInfo = (PRT_WAPI_STA_INFO)list_entry(pWapiInfo->wapiSTAUsedList.next, RT_WAPI_STA_INFO, list);
+		list_del_init(&pWapiStaInfo->list);
+		memset(pWapiStaInfo->PeerMacAddr,0,ETH_ALEN);
+		pWapiStaInfo->bSetkeyOk = 0;
+		list_add_tail(&pWapiStaInfo->list, &pWapiInfo->wapiSTAIdleList);
+	}
+
+	while(!list_empty(&(pWapiInfo->wapiBKIDStoreList)))
+	{
+		pWapiBkid = (PRT_WAPI_BKID)list_entry(pWapiInfo->wapiBKIDStoreList.next, RT_WAPI_BKID, list);
+		list_del_init(&pWapiBkid->list);
+		memset(pWapiBkid->bkid,0,16);
+		list_add_tail(&pWapiBkid->list, &pWapiInfo->wapiBKIDIdleList);
+	}
+	WAPI_TRACE(WAPI_INIT, "<========== %s\n", __FUNCTION__);
+}
+
+void WapiReturnOneStaInfo(struct rtllib_device *ieee, u8 *MacAddr, u8 from_app)
+{
+	PRT_WAPI_T				pWapiInfo;
+	PRT_WAPI_STA_INFO		pWapiStaInfo = NULL;
+	PRT_WAPI_BKID			pWapiBkid = NULL;
+
+	pWapiInfo = &ieee->wapiInfo;
+
+	WAPI_TRACE(WAPI_API, "==========> %s\n", __FUNCTION__);
+
+	if(!from_app)
+		WapiCreateAppEventAndSend(ieee,NULL,0,MacAddr, false,false,false,0,true);
+	if(list_empty(&(pWapiInfo->wapiSTAUsedList))){
+		return;
+	}else{
+		list_for_each_entry(pWapiStaInfo, &pWapiInfo->wapiSTAUsedList, list) {
+			if(!memcmp(pWapiStaInfo->PeerMacAddr,MacAddr,ETH_ALEN)){
+				pWapiStaInfo->bAuthenticateInProgress = false;
+				pWapiStaInfo->bSetkeyOk = false;
+				memset(pWapiStaInfo->PeerMacAddr,0,ETH_ALEN);
+				list_del_init(&pWapiStaInfo->list);
+				list_add_tail(&pWapiStaInfo->list, &pWapiInfo->wapiSTAIdleList);
+				break;
+			}
+
+		}
+	}
+
+	if(ieee->iw_mode == IW_MODE_INFRA){
+		while(!list_empty(&(pWapiInfo->wapiBKIDStoreList)))
+		{
+			pWapiBkid = (PRT_WAPI_BKID)list_entry(pWapiInfo->wapiBKIDStoreList.next, RT_WAPI_BKID, list);
+			list_del_init(&pWapiBkid->list);
+			memset(pWapiBkid->bkid,0,16);
+			list_add_tail(&pWapiBkid->list, &pWapiInfo->wapiBKIDIdleList);
+		}
+	}
+	WAPI_TRACE(WAPI_API, "<========== %s\n", __FUNCTION__);
+	return;
+}
+
+void WapiFreeAllStaInfo(struct rtllib_device *ieee)
+{
+	PRT_WAPI_T				pWapiInfo;
+	PRT_WAPI_STA_INFO		pWapiStaInfo;
+	PRT_WAPI_BKID			pWapiBkid;
+	WAPI_TRACE(WAPI_INIT, "===========> %s\n", __FUNCTION__);
+	pWapiInfo = &ieee->wapiInfo;
+
+	WapiReturnAllStaInfo(ieee);
+	while(!list_empty(&(pWapiInfo->wapiSTAIdleList)))
+	{
+		pWapiStaInfo = (PRT_WAPI_STA_INFO)list_entry(pWapiInfo->wapiSTAIdleList.next, RT_WAPI_STA_INFO, list);
+		list_del_init(&pWapiStaInfo->list);
+	}
+
+	while(!list_empty(&(pWapiInfo->wapiBKIDIdleList)))
+	{
+		pWapiBkid = (PRT_WAPI_BKID)list_entry(pWapiInfo->wapiBKIDIdleList.next, RT_WAPI_BKID, list);
+		list_del_init(&pWapiBkid->list);
+	}
+	WAPI_TRACE(WAPI_INIT, "<=========== %s\n", __FUNCTION__);
+	return;
+}
+
+u8 SecIsWAIPacket(struct rtllib_device* ieee,struct sk_buff *skb)
+{
+	PRT_WAPI_T pWapiInfo = &(ieee->wapiInfo);
+	PRT_WAPI_STA_INFO pWapiSta = NULL;
+	u8 WaiPkt = 0, *pTaddr, bFind = false;
+	u8 Offset_TypeWAI = 24 + 6;	
+	struct rtllib_hdr_3addrqos *header;
+	u16 mask = 1, fc = 0;
+
+	if((!pWapiInfo->bWapiEnable) || (!ieee->wapiInfo.bWapiEnable))
+		return 0;
+
+	header = (struct rtllib_hdr_3addrqos *)skb->data;
+
+	fc = le16_to_cpu(header->frame_ctl);
+	if(fc & RTLLIB_FCTL_WEP)
+	    return 0;
+
+	pTaddr = header->addr2;
+	if(list_empty(&pWapiInfo->wapiSTAUsedList)){
+		bFind = false;
+	}else{
+		list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list){
+			if(!memcmp(pTaddr,pWapiSta->PeerMacAddr,6)){
+				bFind = true;
+				break;
+			}
+		}
+	}
+
+	WAPI_TRACE(WAPI_API, "%s: bFind=%d pTaddr="MAC_FMT"\n", __FUNCTION__, bFind, MAC_ARG(pTaddr));
+
+	if( IsQoSDataFrame(skb->data) ){
+		Offset_TypeWAI += sQoSCtlLng;	
+	}
+
+	if((header->frame_ctl & (mask<<14)) != 0){
+		Offset_TypeWAI += WAPI_EXT_LEN;	
+	}
+
+	if( skb->len < (Offset_TypeWAI+1) ){
+		WAPI_TRACE(WAPI_ERR, "%s(): invalid length(%d)\n",__FUNCTION__,skb->len);
+		return 0;
+	}
+
+	if( (skb->data[Offset_TypeWAI]==0x88) && (skb->data[Offset_TypeWAI+1]==0xb4) ){
+		WaiPkt = skb->data[Offset_TypeWAI+5];
+		if(ieee->iw_mode == IW_MODE_ADHOC){
+			if(bFind){
+				if((WaiPkt == 8) && (pWapiInfo->wapiTxMsk.bSet) && (pWapiSta->wapiMsk.bSet) && ((skb->data[Offset_TypeWAI+14] & 0x10)==0)){
+					printk("==============> %s(): Receive USK Request After MSK set!\n", __FUNCTION__);
+					DelStaInfo(ieee, pTaddr);
+					WapiReturnOneStaInfo (ieee, pTaddr, 0);
+					WAPI_CreateEvent_Send(ieee, WAPI_EVENT_CONNECT, ieee->current_network.bssid, NULL, 0);
+				}
+
+			}
+		}
+	}else{
+		WAPI_TRACE(WAPI_API, "%s(): non wai packet\n",__FUNCTION__);
+	}
+
+	WAPI_TRACE(WAPI_API, "%s(): Recvd WAI frame. IsWAIPkt(%d)\n",__FUNCTION__, WaiPkt);
+
+	return	WaiPkt;
+}
+
+/******************
+*********************/
+u8 Wapi_defragment(struct rtllib_device* ieee,u8* data, u16 len,
+	          u8* pTaddr,bool bAuthenticator,u8* rxbuffer,u16* rxbuffer_len)
+{
+	PRT_CACHE_INFO pcache_info = NULL;
+	bool bfind = false;
+	
+	if(!list_empty(&ieee->cache_frag_list)){
+		list_for_each_entry(pcache_info, &ieee->cache_frag_list, list) {
+			if((memcmp(pcache_info->saddr,pTaddr,ETH_ALEN)==0) 
+				&& (pcache_info->bAuthenticator == bAuthenticator))
+			{
+				bfind = true;
+				break;
+			}
+		}		
+	}
+	WAPI_TRACE(WAPI_RX, "%s: bFind=%d pTaddr="MAC_FMT"\n", __FUNCTION__, bfind, MAC_ARG(pTaddr));
+	if(bfind == false) {
+		pcache_info = kmalloc(sizeof(RT_CACHE_INFO),GFP_ATOMIC);
+		if(pcache_info == NULL){
+			WAPI_TRACE(WAPI_ERR,"%s(): can't malloc mem\n", __FUNCTION__);
+			goto drop2;
+		}
+		memset(pcache_info,0,sizeof(RT_CACHE_INFO));
+		if(data[11] == 0x1){
+			WAPI_TRACE(WAPI_RX, "%s(): First fragment, and have More fragments\n",__FUNCTION__);
+			memcpy(&(pcache_info->recvSeq),data+8, 2);
+			if(data[10] != 0x00)
+			{
+				WAPI_TRACE(WAPI_ERR, "%s(): First fragment,but fragnum is not 0.\n",__FUNCTION__);
+				goto drop1;
+			}else{	
+				data[10] = 0x0;
+				data[11] = 0x0;
+				if (len > 2000) {
+					WAPI_TRACE(WAPI_ERR,"111****************************%s():cache buf len is not enough: %d\n",__FUNCTION__,len);
+					goto drop1;
+				}
+				pcache_info->lastFragNum= 0x00;
+				memcpy(pcache_info->cache_buffer,data,len);
+				pcache_info->cache_buffer_len = len;
+				pcache_info->bAuthenticator = bAuthenticator;
+				memcpy(pcache_info->saddr,pTaddr,ETH_ALEN);
+				list_add_tail(&pcache_info->list, &ieee->cache_frag_list);
+				WAPI_TRACE(WAPI_RX, "%s(): First fragment, allocate cache to store.\n",__FUNCTION__);
+				goto drop2;
+			}
+		}else{
+			if(data[10] == 0){
+				WAPI_TRACE(WAPI_RX, "%s(): First fragment, no More fragment, ready to send to App.\n",__FUNCTION__);
+				if (len > 2000) {
+					WAPI_TRACE(WAPI_ERR,"222****************************%s():cache buf len is not enough: %d\n",__FUNCTION__,len);
+					goto drop1;
+				}
+				memcpy(rxbuffer,data,len);
+				*rxbuffer_len = len;
+				goto success;
+			}else{
+				WAPI_TRACE(WAPI_ERR, "%s(): First fragment,no More fragment, but fragnum is not 0.\n",__FUNCTION__);
+				goto drop1;
+			}
+		}
+	}
+	else{
+		if(data[11] == 0x1){
+			if(memcmp(data+8,&(pcache_info->recvSeq),2)) {
+				WAPI_TRACE(WAPI_ERR, "%s(): Not First fragment, More fragment, seq num error.\n",__FUNCTION__);
+				list_del(&pcache_info->list);
+				goto drop1;
+			}else{
+				if(data[10] == (pcache_info->lastFragNum+1)){
+					WAPI_TRACE(WAPI_RX, "%s(): Not First fragment, More fragment, same seq num, copy to cache.\n",__FUNCTION__);
+					if ((pcache_info->cache_buffer_len + len - 12) > 2000) {
+						WAPI_TRACE(WAPI_ERR,"333****************************%s():cache buf len is not enough: %d\n",__FUNCTION__,pcache_info->cache_buffer_len + len - 12);
+						list_del(&pcache_info->list);
+						goto drop1;
+					}
+					memcpy(pcache_info->cache_buffer+(pcache_info->cache_buffer_len),data+12,len-12);
+					pcache_info->cache_buffer_len += len-12;
+					pcache_info->lastFragNum  = data[10];
+					goto drop2;
+				}else{
+					WAPI_TRACE(WAPI_ERR, "%s(): Not First fragment, More fragment, same seq num, fragnum error.\n",__FUNCTION__);
+					list_del(&pcache_info->list);
+					goto drop1;
+				}
+			}
+		}else{
+			if(memcmp(data+8,&(pcache_info->recvSeq),2)) {
+				WAPI_TRACE(WAPI_ERR, "%s(): Not First fragment, no More fragment, seq num error.\n",__FUNCTION__);
+				list_del(&pcache_info->list);
+				goto drop1;
+			}else{
+				if(data[10] == (pcache_info->lastFragNum+1)){					
+					WAPI_TRACE(WAPI_RX, "%s(): Not First fragment, no More fragment, same seq num, ready to send to App.\n",__FUNCTION__);
+					if ((pcache_info->cache_buffer_len + len - 12) > 2000) {
+						WAPI_TRACE(WAPI_ERR,"444****************************%s():cache buf len is not enough: %d\n",__FUNCTION__,pcache_info->cache_buffer_len + len - 12);
+						list_del(&pcache_info->list);
+						goto drop1;
+					}
+					memcpy(pcache_info->cache_buffer+(pcache_info->cache_buffer_len),data+12,len-12);
+					pcache_info->cache_buffer_len += len-12;
+					memcpy(rxbuffer,pcache_info->cache_buffer,pcache_info->cache_buffer_len);
+					*rxbuffer_len = pcache_info->cache_buffer_len;
+					list_del(&pcache_info->list);
+					goto success;
+				}else{
+					WAPI_TRACE(WAPI_ERR, "%s(): Not First fragment, no More fragment, same seq num, fragnum error.\n",__FUNCTION__);
+					list_del(&pcache_info->list);
+					goto drop1;
+				}
+			}
+		}
+	}
+
+drop1:
+	if(pcache_info)
+		kfree(pcache_info);
+	pcache_info = NULL;
+	return false;
+drop2:
+	return false;
+success:
+	if(pcache_info)
+		kfree(pcache_info);
+	pcache_info = NULL;
+	return true;
+}
+
+/****************************************************************************
+ * data[8-9]: Sequence Number
+ * data[10]: Fragment No
+ * data[11]: Flag = 1 indicates more data.
+ *****************************************************************************/
+void WapiHandleRecvPacket(struct rtllib_device* ieee,struct sk_buff *skb,u8 WaiPkt)
+{
+	PRT_WAPI_T			pWapiInfo;
+	struct rtllib_hdr_3addrqos *hdr;
+	u8 *pTaddr, *recvPtr, *rxbuffer;
+ 	u8 bAuthenticator = false, receive_result = false;
+	int hdrlen = 0;
+	u16 recvLength = 0, fc = 0, rxbuffer_len = 0;
+
+	WAPI_TRACE(WAPI_RX, "===========> %s: WaiPkt is %d\n", __FUNCTION__,WaiPkt);
+	
+	hdr = (struct rtllib_hdr_3addrqos *)skb->data;
+	pTaddr = hdr->addr2;
+	fc = hdr->frame_ctl;
+	hdrlen = rtllib_get_hdrlen(fc);
+	
+	pWapiInfo = &(ieee->wapiInfo);
+	if((WaiPkt == WAPI_CERTIFICATE_AUTHENTICATE_REQUEST) 
+		||(WaiPkt == WAPI_CERTIFICATE_AUTHENTICATE_RESPONSE)) 
+	{
+		WAPI_TRACE(WAPI_RX, "%s: Valid Wai Packet \n", __FUNCTION__);
+		return;
+	}else{
+		switch(WaiPkt)
+		{
+			case WAPI_PREAUTHENTICATE:
+			case WAPI_ACCESS_AUTHENTICATE_REQUEST:
+			case WAPI_USK_RESPONSE:
+			case WAPI_MSK_RESPONSE:
+				 bAuthenticator = true;
+				 break;
+			default:
+				  break;
+		}
+		recvLength = skb->len - hdrlen - (SNAP_SIZE + sizeof(u16));
+		recvPtr = skb->data + hdrlen + (SNAP_SIZE + sizeof(u16));
+
+		rxbuffer = kmalloc(2000, GFP_ATOMIC);
+		if(NULL == rxbuffer)
+			return;
+		
+		receive_result = Wapi_defragment(ieee,recvPtr, recvLength,pTaddr,bAuthenticator,rxbuffer,&rxbuffer_len);
+		if(receive_result)
+			WapiCreateAppEventAndSend(ieee, rxbuffer, rxbuffer_len, pTaddr, false,false, false, WaiPkt, false);
+		
+		kfree(rxbuffer);
+	}
+	WAPI_TRACE(WAPI_RX, "<=========== %s\n", __FUNCTION__);
+}
+
+void WapiSetIE(struct rtllib_device *ieee)
+{
+	PRT_WAPI_T		pWapiInfo = &(ieee->wapiInfo);
+	u16		protocolVer = 1;
+	u16		akmCnt = 1;
+	u16		suiteCnt = 1;
+	u16		capability = 0;
+	u8		OUI[3];
+
+	OUI[0] = 0x00;
+	OUI[1] = 0x14;
+	OUI[2] = 0x72;
+	
+	pWapiInfo->wapiIELength = 0;
+	memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength, &protocolVer, 2);
+	pWapiInfo->wapiIELength +=2;
+	memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength, &akmCnt, 2);
+	pWapiInfo->wapiIELength +=2;
+
+	if(pWapiInfo->bWapiPSK){
+		memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength,OUI, 3);
+		pWapiInfo->wapiIELength +=3;
+		pWapiInfo->wapiIE[pWapiInfo->wapiIELength] = 0x2;
+		pWapiInfo->wapiIELength +=1;
+	}else{
+		memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength,OUI, 3);
+		pWapiInfo->wapiIELength +=3;
+		pWapiInfo->wapiIE[pWapiInfo->wapiIELength] = 0x1;
+		pWapiInfo->wapiIELength +=1;
+	}
+
+	memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength, &suiteCnt, 2);
+	pWapiInfo->wapiIELength +=2;
+	memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength,OUI, 3);
+	pWapiInfo->wapiIELength +=3;
+	pWapiInfo->wapiIE[pWapiInfo->wapiIELength] = 0x1;
+	pWapiInfo->wapiIELength +=1;
+
+	memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength,OUI, 3);
+	pWapiInfo->wapiIELength +=3;
+	pWapiInfo->wapiIE[pWapiInfo->wapiIELength] = 0x1;
+	pWapiInfo->wapiIELength +=1;
+
+	memcpy(pWapiInfo->wapiIE+pWapiInfo->wapiIELength, &capability, 2);
+	pWapiInfo->wapiIELength +=2;
+}
+
+
+/*  PN1 > PN2, return 1,
+ *  else return 0.
+ */
+u32 WapiComparePN(u8 *PN1, u8 *PN2)
+{
+	char i;
+
+	if ((NULL == PN1) || (NULL == PN2))
+		return 1;
+
+	if ((PN2[15] - PN1[15]) & 0x80)
+		return 1;
+
+	for (i=16; i>0; i--)
+	{
+		if(PN1[i-1] == PN2[i-1])
+		    	continue;
+		else if(PN1[i-1] > PN2[i-1])
+			return 1;
+		else
+			return 0;			
+	}
+
+	return 0;
+}
+
+/* AddCount: 1 or 2. 
+ *  If overflow, return 1,
+ *  else return 0.
+ */
+u8 WapiIncreasePN(u8 *PN, u8 AddCount)
+{
+	u8  i;
+
+	if (NULL == PN)
+		return 1;
+	/*
+	if(AddCount == 2){
+		printk("############################%s(): PN[0]=0x%x\n", __FUNCTION__, PN[0]);
+		if(PN[0] == 0x48){
+			PN[0] += AddCount;
+			return 1;
+		}else{
+			PN[0] += AddCount;
+			return 0;
+		}
+	}
+	*/
+
+	for (i=0; i<16; i++)
+	{
+		if (PN[i] + AddCount <= 0xff)
+		{
+			PN[i] += AddCount;
+			return 0;
+		}
+		else
+		{
+			PN[i] += AddCount;
+			AddCount = 1;
+		}
+	}
+
+	return 1;
+}
+
+
+void WapiGetLastRxUnicastPNForQoSData(
+	u8 			UserPriority,
+	PRT_WAPI_STA_INFO    pWapiStaInfo,
+	u8 *PNOut
+)
+{
+	WAPI_TRACE(WAPI_RX, "===========> %s\n", __FUNCTION__);
+	switch(UserPriority)
+	{
+		case 0:
+		case 3:
+			      memcpy(PNOut,pWapiStaInfo->lastRxUnicastPNBEQueue,16);
+			      break;
+		case 1:
+		case 2:
+			      memcpy(PNOut,pWapiStaInfo->lastRxUnicastPNBKQueue,16);
+			      break;
+		case 4:
+		case 5:
+			      memcpy(PNOut,pWapiStaInfo->lastRxUnicastPNVIQueue,16);
+			      break;
+		case 6:
+		case 7:
+			      memcpy(PNOut,pWapiStaInfo->lastRxUnicastPNVOQueue,16);
+			      break;
+		default:
+				WAPI_TRACE(WAPI_ERR, "%s: Unknown TID \n", __FUNCTION__);
+				break;
+	}
+	WAPI_TRACE(WAPI_RX, "<=========== %s\n", __FUNCTION__);
+}
+
+
+void WapiSetLastRxUnicastPNForQoSData(
+	u8 		UserPriority,
+	u8           *PNIn,
+	PRT_WAPI_STA_INFO    pWapiStaInfo
+)
+{
+	WAPI_TRACE(WAPI_RX, "===========> %s\n", __FUNCTION__);
+	switch(UserPriority)
+	{
+		case 0:
+		case 3:
+			      memcpy(pWapiStaInfo->lastRxUnicastPNBEQueue,PNIn,16);
+			      break;
+		case 1:
+		case 2:
+			      memcpy(pWapiStaInfo->lastRxUnicastPNBKQueue,PNIn,16);
+			      break;
+		case 4:
+		case 5:
+			      memcpy(pWapiStaInfo->lastRxUnicastPNVIQueue,PNIn,16);
+			      break;
+		case 6:
+		case 7:
+			      memcpy(pWapiStaInfo->lastRxUnicastPNVOQueue,PNIn,16);
+			      break;
+		default:
+				WAPI_TRACE(WAPI_ERR, "%s: Unknown TID \n", __FUNCTION__);
+				break;
+	}
+	WAPI_TRACE(WAPI_RX, "<=========== %s\n", __FUNCTION__);
+}
+
+
+/****************************************************************************
+TRUE-----------------bRxReorder == FALSE not RX-Reorder
+FALSE----------------bRxReorder == TRUE do RX Reorder
+add to support WAPI to N-mode
+*****************************************************************************/
+u8 WapiCheckPnInSwDecrypt(
+	struct rtllib_device *ieee,
+	struct sk_buff *pskb
+)
+{
+	struct rtllib_hdr_3addrqos *header;
+	u16 				fc;
+	u8				*pDaddr, *pTaddr, *pRaddr;
+	u8 				ret = false;
+
+	header = (struct rtllib_hdr_3addrqos *)pskb->data;
+	pTaddr = header->addr2;
+	pRaddr = header->addr1;
+	fc = le16_to_cpu(header->frame_ctl);
+	
+	if((fc & RTLLIB_FCTL_TODS) == RTLLIB_FCTL_TODS)
+		pDaddr = header->addr3;
+	else
+		pDaddr = header->addr1;
+	
+	if(eqMacAddr(pRaddr, ieee->dev->dev_addr) &&
+		!is_multicast_ether_addr(pDaddr) &&
+		ieee->current_network.qos_data.active &&
+		IsQoSDataFrame(pskb->data) && ieee->pHTInfo->bCurrentHTSupport &&
+		ieee->pHTInfo->bCurRxReorderEnable)
+		ret = false;
+	else
+		ret = true;
+
+	WAPI_TRACE(WAPI_RX, "%s: return %d\n", __FUNCTION__, ret);
+	return ret;
+}
+
+
+/****************************************************************************
+TRUE-----------------Drop
+FALSE---------------- handle 
+add to support WAPI to N-mode
+*****************************************************************************/
+u8 WapiCheckDropForRxReorderCase(
+	struct rtllib_device *ieee,
+	struct rtllib_rxb* prxb
+)
+{
+	PRT_WAPI_T     pWapiInfo = &(ieee->wapiInfo);
+	u8			*pLastRecvPN = NULL;
+	u8			bFind = false;
+	PRT_WAPI_STA_INFO	pWapiSta = NULL;
+
+	if(!pWapiInfo->bWapiEnable)
+		return false;
+
+	if(list_empty(&pWapiInfo->wapiSTAUsedList)){
+		bFind = false;
+	}else{
+		list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) {
+			if(!memcmp(prxb->WapiSrcAddr,pWapiSta->PeerMacAddr,ETH_ALEN)){
+				bFind = true;
+				break;
+			}
+		}
+	}
+	WAPI_TRACE(WAPI_RX, "%s: bFind=%d prxb->WapiSrcAddr="MAC_FMT"\n", __FUNCTION__, bFind, MAC_ARG(prxb->WapiSrcAddr));
+
+	if(bFind){
+		switch(prxb->UserPriority)
+		{
+			case 0:
+			case 3:
+				pLastRecvPN = pWapiSta->lastRxUnicastPNBEQueue;
+				break;
+			case 1:
+			case 2:
+				pLastRecvPN = pWapiSta->lastRxUnicastPNBKQueue;
+				break;
+			case 4:
+			case 5:
+				pLastRecvPN = pWapiSta->lastRxUnicastPNVIQueue;
+				break;
+			case 6:
+			case 7:
+				pLastRecvPN = pWapiSta->lastRxUnicastPNVOQueue;
+				break;
+			default:
+				WAPI_TRACE(WAPI_ERR,"%s: Unknown TID \n",__FUNCTION__);
+				break;
+		}
+
+		if(!WapiComparePN(prxb->WapiTempPN,pLastRecvPN))
+		{
+			WAPI_TRACE(WAPI_RX,"%s: Equal PN!!\n",__FUNCTION__);
+			return true;
+		}
+		else
+		{
+			memcpy(pLastRecvPN,prxb->WapiTempPN,16);
+			return false;
+		}
+	}
+	else
+		return false;
+}
+
+int WapiSendWaiPacket(struct rtllib_device *ieee, struct sk_buff *pskb)
+{
+	struct sk_buff * newskb = NULL;
+	struct rtllib_hdr_3addr *mac_hdr=NULL;
+	cb_desc *tcb_desc = NULL;
+
+	RT_ASSERT_RET_VALUE(ieee,-1);
+	RT_ASSERT_RET_VALUE(pskb,-1);
+
+	if(pskb->len < (14 + sizeof(struct rtllib_hdr_3addr)))
+	{
+		WAPI_TRACE(WAPI_ERR, "%s: WAI frame is too small!!\n", __FUNCTION__);
+		goto failed;
+	}
+
+	skb_pull(pskb, 14);
+	
+	newskb = dev_alloc_skb(pskb->len+ieee->tx_headroom); 
+	if(!newskb){
+	    	WAPI_TRACE(WAPI_ERR,"%s: can't alloc skb\n",__FUNCTION__);
+		goto failed;
+	}
+	skb_reserve(newskb, ieee->tx_headroom);	
+	memcpy(skb_put(newskb, pskb->len), pskb->data, pskb->len);
+	dev_kfree_skb_any(pskb);
+	/* called with 2nd parm 0, no tx mgmt lock required */
+	rtllib_sta_wakeup(ieee,0);
+
+	tcb_desc = (cb_desc *)(newskb->cb + MAX_DEV_ADDR_SIZE);
+#ifdef RTL8192SU_FPGA_UNSPECIFIED_NETWORK
+	tcb_desc->queue_index = NORMAL_QUEUE;
+#else
+	tcb_desc->queue_index = BE_QUEUE;
+#endif
+	tcb_desc->data_rate = 0x02;	
+	tcb_desc->bTxUseDriverAssingedRate = true;
+	tcb_desc->RATRIndex = 7;
+	tcb_desc->bTxDisableRateFallBack = 1;
+#ifdef _RTL8192_EXT_PATCH_
+	tcb_desc->macId = 0;
+#endif	
+
+	mac_hdr = (struct rtllib_hdr_3addr *)(newskb->data);
+	mac_hdr->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
+	if (ieee->seq_ctrl[0] == 0xFFF)
+		ieee->seq_ctrl[0] = 0;
+	else
+		ieee->seq_ctrl[0]++;
+
+	if(!ieee->check_nic_enough_desc(ieee->dev,tcb_desc->queue_index)||\
+			(skb_queue_len(&ieee->skb_waitQ[tcb_desc->queue_index]) != 0)||\
+			(ieee->queue_stop) ) {
+		WAPI_TRACE(WAPI_TX, "%s: Insert to waitqueue (idx=%d)!!\n", __FUNCTION__, tcb_desc->queue_index);
+		skb_queue_tail(&ieee->skb_waitQ[tcb_desc->queue_index], newskb);
+	} else {
+		ieee->softmac_hard_start_xmit(newskb,ieee->dev);
+	}
+
+	return 0;
+	
+failed:	
+	dev_kfree_skb_any(pskb);
+	return -1;
+}
+/**********************************************************
+ **********************************************************/
+const u8 Sbox[256] = {
+0xd6,0x90,0xe9,0xfe,0xcc,0xe1,0x3d,0xb7,0x16,0xb6,0x14,0xc2,0x28,0xfb,0x2c,0x05,
+0x2b,0x67,0x9a,0x76,0x2a,0xbe,0x04,0xc3,0xaa,0x44,0x13,0x26,0x49,0x86,0x06,0x99,
+0x9c,0x42,0x50,0xf4,0x91,0xef,0x98,0x7a,0x33,0x54,0x0b,0x43,0xed,0xcf,0xac,0x62,
+0xe4,0xb3,0x1c,0xa9,0xc9,0x08,0xe8,0x95,0x80,0xdf,0x94,0xfa,0x75,0x8f,0x3f,0xa6,
+0x47,0x07,0xa7,0xfc,0xf3,0x73,0x17,0xba,0x83,0x59,0x3c,0x19,0xe6,0x85,0x4f,0xa8,
+0x68,0x6b,0x81,0xb2,0x71,0x64,0xda,0x8b,0xf8,0xeb,0x0f,0x4b,0x70,0x56,0x9d,0x35,
+0x1e,0x24,0x0e,0x5e,0x63,0x58,0xd1,0xa2,0x25,0x22,0x7c,0x3b,0x01,0x21,0x78,0x87,
+0xd4,0x00,0x46,0x57,0x9f,0xd3,0x27,0x52,0x4c,0x36,0x02,0xe7,0xa0,0xc4,0xc8,0x9e,
+0xea,0xbf,0x8a,0xd2,0x40,0xc7,0x38,0xb5,0xa3,0xf7,0xf2,0xce,0xf9,0x61,0x15,0xa1,
+0xe0,0xae,0x5d,0xa4,0x9b,0x34,0x1a,0x55,0xad,0x93,0x32,0x30,0xf5,0x8c,0xb1,0xe3,
+0x1d,0xf6,0xe2,0x2e,0x82,0x66,0xca,0x60,0xc0,0x29,0x23,0xab,0x0d,0x53,0x4e,0x6f,
+0xd5,0xdb,0x37,0x45,0xde,0xfd,0x8e,0x2f,0x03,0xff,0x6a,0x72,0x6d,0x6c,0x5b,0x51,
+0x8d,0x1b,0xaf,0x92,0xbb,0xdd,0xbc,0x7f,0x11,0xd9,0x5c,0x41,0x1f,0x10,0x5a,0xd8,
+0x0a,0xc1,0x31,0x88,0xa5,0xcd,0x7b,0xbd,0x2d,0x74,0xd0,0x12,0xb8,0xe5,0xb4,0xb0,
+0x89,0x69,0x97,0x4a,0x0c,0x96,0x77,0x7e,0x65,0xb9,0xf1,0x09,0xc5,0x6e,0xc6,0x84,
+0x18,0xf0,0x7d,0xec,0x3a,0xdc,0x4d,0x20,0x79,0xee,0x5f,0x3e,0xd7,0xcb,0x39,0x48
+};
+
+const u32 CK[32] = {
+	0x00070e15, 0x1c232a31, 0x383f464d, 0x545b6269,
+	0x70777e85, 0x8c939aa1, 0xa8afb6bd, 0xc4cbd2d9,
+	0xe0e7eef5, 0xfc030a11, 0x181f262d, 0x343b4249,
+	0x50575e65, 0x6c737a81, 0x888f969d, 0xa4abb2b9,
+	0xc0c7ced5, 0xdce3eaf1, 0xf8ff060d, 0x141b2229,
+	0x30373e45, 0x4c535a61, 0x686f767d, 0x848b9299,
+	0xa0a7aeb5, 0xbcc3cad1, 0xd8dfe6ed, 0xf4fb0209,
+	0x10171e25, 0x2c333a41, 0x484f565d, 0x646b7279 };
+
+#define Rotl(_x, _y) (((_x) << (_y)) | ((_x) >> (32 - (_y))))
+
+#define ByteSub(_A) (Sbox[(_A) >> 24 & 0xFF] << 24 | \
+                     Sbox[(_A) >> 16 & 0xFF] << 16 | \
+                     Sbox[(_A) >>  8 & 0xFF] <<  8 | \
+                     Sbox[(_A) & 0xFF])
+
+#define L1(_B) ((_B) ^ Rotl(_B, 2) ^ Rotl(_B, 10) ^ Rotl(_B, 18) ^ Rotl(_B, 24))
+#define L2(_B) ((_B) ^ Rotl(_B, 13) ^ Rotl(_B, 23))
+
+static void
+xor_block(void *dst, void *src1, void *src2)
+/* 128-bit xor: *dst = *src1 xor *src2. Pointers must be 32-bit aligned  */
+{
+    ((u32 *)dst)[0] = ((u32 *)src1)[0] ^ ((u32 *)src2)[0];
+    ((u32 *)dst)[1] = ((u32 *)src1)[1] ^ ((u32 *)src2)[1];
+    ((u32 *)dst)[2] = ((u32 *)src1)[2] ^ ((u32 *)src2)[2];
+    ((u32 *)dst)[3] = ((u32 *)src1)[3] ^ ((u32 *)src2)[3];
+}
+
+
+void SMS4Crypt(u8 *Input, u8 *Output, u32 *rk)
+{
+	 u32 r, mid, x0, x1, x2, x3, *p;
+	 p = (u32 *)Input;
+	 x0 = p[0];
+	 x1 = p[1];
+	 x2 = p[2];
+	 x3 = p[3];
+#ifdef LITTLE_ENDIAN
+	 x0 = Rotl(x0, 16); x0 = ((x0 & 0x00FF00FF) << 8) | ((x0 & 0xFF00FF00) >> 8);
+	 x1 = Rotl(x1, 16); x1 = ((x1 & 0x00FF00FF) << 8) | ((x1 & 0xFF00FF00) >> 8);
+	 x2 = Rotl(x2, 16); x2 = ((x2 & 0x00FF00FF) << 8) | ((x2 & 0xFF00FF00) >> 8);
+	 x3 = Rotl(x3, 16); x3 = ((x3 & 0x00FF00FF) << 8) | ((x3 & 0xFF00FF00) >> 8);
+#endif
+	 for (r = 0; r < 32; r += 4)
+	 {
+		  mid = x1 ^ x2 ^ x3 ^ rk[r + 0];
+		  mid = ByteSub(mid);
+		  x0 ^= L1(mid);
+		  mid = x2 ^ x3 ^ x0 ^ rk[r + 1];
+		  mid = ByteSub(mid);
+		  x1 ^= L1(mid);
+		  mid = x3 ^ x0 ^ x1 ^ rk[r + 2];
+		  mid = ByteSub(mid);
+		  x2 ^= L1(mid);
+		  mid = x0 ^ x1 ^ x2 ^ rk[r + 3];
+		  mid = ByteSub(mid);
+		  x3 ^= L1(mid);
+	 }
+#ifdef LITTLE_ENDIAN
+	 x0 = Rotl(x0, 16); x0 = ((x0 & 0x00FF00FF) << 8) | ((x0 & 0xFF00FF00) >> 8);
+	 x1 = Rotl(x1, 16); x1 = ((x1 & 0x00FF00FF) << 8) | ((x1 & 0xFF00FF00) >> 8);
+	 x2 = Rotl(x2, 16); x2 = ((x2 & 0x00FF00FF) << 8) | ((x2 & 0xFF00FF00) >> 8);
+	 x3 = Rotl(x3, 16); x3 = ((x3 & 0x00FF00FF) << 8) | ((x3 & 0xFF00FF00) >> 8);
+#endif
+	 p = (u32 *)Output;
+	 p[0] = x3;
+	 p[1] = x2;
+	 p[2] = x1;
+	 p[3] = x0;
+}
+
+
+
+void SMS4KeyExt(u8 *Key, u32 *rk, u32 CryptFlag)
+{
+	 u32 r, mid, x0, x1, x2, x3, *p;
+	 
+	 p = (u32 *)Key;
+	 x0 = p[0];
+	 x1 = p[1];
+	 x2 = p[2];
+	 x3 = p[3];
+#ifdef LITTLE_ENDIAN
+	 x0 = Rotl(x0, 16); x0 = ((x0 & 0xFF00FF) << 8) | ((x0 & 0xFF00FF00) >> 8);
+	 x1 = Rotl(x1, 16); x1 = ((x1 & 0xFF00FF) << 8) | ((x1 & 0xFF00FF00) >> 8);
+	 x2 = Rotl(x2, 16); x2 = ((x2 & 0xFF00FF) << 8) | ((x2 & 0xFF00FF00) >> 8);
+	 x3 = Rotl(x3, 16); x3 = ((x3 & 0xFF00FF) << 8) | ((x3 & 0xFF00FF00) >> 8);
+#endif
+
+	 x0 ^= 0xa3b1bac6;
+	 x1 ^= 0x56aa3350;
+	 x2 ^= 0x677d9197;
+	 x3 ^= 0xb27022dc;
+	 for (r = 0; r < 32; r += 4)
+	 {
+		  mid = x1 ^ x2 ^ x3 ^ CK[r + 0];
+		  mid = ByteSub(mid);
+		  rk[r + 0] = x0 ^= L2(mid);
+		  mid = x2 ^ x3 ^ x0 ^ CK[r + 1];
+		  mid = ByteSub(mid);
+		  rk[r + 1] = x1 ^= L2(mid);
+		  mid = x3 ^ x0 ^ x1 ^ CK[r + 2];
+		  mid = ByteSub(mid);
+		  rk[r + 2] = x2 ^= L2(mid);
+		  mid = x0 ^ x1 ^ x2 ^ CK[r + 3];
+		  mid = ByteSub(mid);
+		  rk[r + 3] = x3 ^= L2(mid);
+	 }
+	 if (CryptFlag == DECRYPT)
+	 {
+	 	  for (r = 0; r < 16; r++)
+	 	  	 mid = rk[r], rk[r] = rk[31 - r], rk[31 - r] = mid;
+	 }
+}
+
+
+void WapiSMS4Cryption(u8 *Key, u8 *IV, u8 *Input, u16 InputLength, 
+                                                u8 *Output, u16 *OutputLength, u32 CryptFlag)
+{
+	u32 blockNum,i,j, rk[32];
+	u16 remainder;
+	u8 blockIn[16],blockOut[16], tempIV[16], k;
+
+	*OutputLength = 0;
+	remainder = InputLength & 0x0F;
+	blockNum = InputLength >> 4;
+	if(remainder !=0)
+		blockNum++;
+	else
+		remainder = 16;
+
+	for(k=0;k<16;k++)
+		tempIV[k] = IV[15-k];
+
+	memcpy(blockIn, tempIV, 16);
+
+      SMS4KeyExt((u8 *)Key, rk,CryptFlag);
+ 
+	for(i=0; i<blockNum-1; i++)
+	{
+		SMS4Crypt((u8 *)blockIn, blockOut, rk);
+             xor_block(&Output[i*16], &Input[i*16], blockOut);
+		memcpy(blockIn,blockOut,16);
+	}
+	
+	*OutputLength = i*16;
+
+	SMS4Crypt((u8 *)blockIn, blockOut, rk);
+
+	for(j=0; j<remainder; j++)
+	{
+		Output[i*16+j] = Input[i*16+j] ^ blockOut[j];
+	}
+      *OutputLength += remainder;  
+
+}
+
+void WapiSMS4Encryption(u8 *Key, u8 *IV, u8 *Input, u16 InputLength, 
+                                                    u8 *Output, u16 *OutputLength)
+{
+    
+	WapiSMS4Cryption(Key, IV, Input, InputLength, Output, OutputLength, ENCRYPT);
+}
+
+void WapiSMS4Decryption(u8 *Key, u8 *IV, u8 *Input, u16 InputLength, 
+                                                    u8 *Output, u16 *OutputLength)
+{
+	WapiSMS4Cryption(Key, IV, Input, InputLength, Output, OutputLength, ENCRYPT);
+}
+
+void WapiSMS4CalculateMic(u8 *Key, u8 *IV, u8 *Input1, u8 Input1Length,
+                                                 u8 *Input2, u16 Input2Length, u8 *Output, u8 *OutputLength)
+{
+	u32 blockNum, i, remainder, rk[32];
+	u8 BlockIn[16], BlockOut[16], TempBlock[16], tempIV[16], k;
+
+	*OutputLength = 0;
+	remainder = Input1Length & 0x0F;
+	blockNum = Input1Length >> 4;
+
+	for(k=0;k<16;k++)
+		tempIV[k] = IV[15-k];
+
+	memcpy(BlockIn, tempIV, 16);
+
+	SMS4KeyExt((u8 *)Key, rk, ENCRYPT);
+
+	SMS4Crypt((u8 *)BlockIn, BlockOut, rk);
+      
+	for(i=0; i<blockNum; i++){
+		xor_block(BlockIn, (Input1+i*16), BlockOut);
+		SMS4Crypt((u8 *)BlockIn, BlockOut, rk);
+	}
+
+	if(remainder !=0){
+		memset(TempBlock, 0, 16);
+		memcpy(TempBlock, (Input1+blockNum*16), remainder);
+
+		xor_block(BlockIn, TempBlock, BlockOut);
+		SMS4Crypt((u8 *)BlockIn, BlockOut, rk);	
+      }
+
+	remainder = Input2Length & 0x0F;
+	blockNum = Input2Length >> 4;
+
+  	for(i=0; i<blockNum; i++){
+		xor_block(BlockIn, (Input2+i*16), BlockOut);
+		SMS4Crypt((u8 *)BlockIn, BlockOut, rk);
+	}
+
+	if(remainder !=0){
+		memset(TempBlock, 0, 16);
+		memcpy(TempBlock, (Input2+blockNum*16), remainder);
+
+		xor_block(BlockIn, TempBlock, BlockOut);
+		SMS4Crypt((u8 *)BlockIn, BlockOut, rk);
+	}
+	
+	memcpy(Output, BlockOut, 16);
+	*OutputLength = 16;
+}
+
+void SecCalculateMicSMS4(
+	u8		KeyIdx,
+	u8        *MicKey, 
+	u8        *pHeader,
+	u8        *pData,
+	u16       DataLen,
+	u8        *MicBuffer
+	)
+{
+	struct rtllib_hdr_3addrqos *header;
+	u8 TempBuf[34], TempLen = 32, MicLen, QosOffset, *IV;
+	u16 *pTemp, fc;
+
+	header = (struct rtllib_hdr_3addrqos *)pHeader;
+	memset(TempBuf, 0, 34);
+	memcpy(TempBuf, pHeader, 2); 
+	pTemp = (u16*)TempBuf;
+	*pTemp &= 0xc78f;       
+
+	memcpy((TempBuf+2), (pHeader+4), 12); 
+	memcpy((TempBuf+14), (pHeader+22), 2); 
+	pTemp = (u16*)(TempBuf + 14);
+	*pTemp &= 0x000f;
+    
+	memcpy((TempBuf+16), (pHeader+16), 6); 
+
+	fc = le16_to_cpu(header->frame_ctl);
+	if((fc & (RTLLIB_FCTL_FROMDS | RTLLIB_FCTL_TODS)) == (RTLLIB_FCTL_FROMDS | RTLLIB_FCTL_TODS))
+	{
+		memcpy((TempBuf+22), (pHeader+24), 6);
+		QosOffset = 30;
+	}else{
+		memset((TempBuf+22), 0, 6);
+		QosOffset = 24;
+	}
+
+	if( IsQoSDataFrame(pHeader)){ 
+		memcpy((TempBuf+28), (pHeader+QosOffset), 2);
+		TempLen += 2;
+		IV = pHeader + QosOffset + 2 + 2;
+	}else{
+		IV = pHeader + QosOffset + 2;
+	}
+
+	TempBuf[TempLen-1] = (u8)(DataLen & 0xff);
+	TempBuf[TempLen-2] = (u8)((DataLen & 0xff00)>>8);
+	TempBuf[TempLen-4] = KeyIdx;
+
+	WAPI_DATA(WAPI_TX, "CalculateMic - KEY", MicKey, 16);
+	WAPI_DATA(WAPI_TX, "CalculateMic - IV", IV, 16);
+	WAPI_DATA(WAPI_TX, "CalculateMic - TempBuf", TempBuf, TempLen);
+	WAPI_DATA(WAPI_TX, "CalculateMic - pData", pData, DataLen);
+
+	WapiSMS4CalculateMic(MicKey, IV, TempBuf, TempLen,
+	                                             pData, DataLen, MicBuffer, &MicLen);
+
+	if (MicLen != 16)
+		WAPI_TRACE(WAPI_ERR,"%s: MIC Length Error!!\n",__FUNCTION__);
+}
+	
+int SecSMS4HeaderFillIV(struct rtllib_device *ieee, struct sk_buff *pskb)
+{
+	u8 *pSecHeader = NULL, *pos = NULL, *pRA = NULL;
+	u8 bPNOverflow = false, bFindMatchPeer = false, hdr_len = 0;
+	PWLAN_HEADER_WAPI_EXTENSION pWapiExt = NULL;
+	PRT_WAPI_T         pWapiInfo = &ieee->wapiInfo; 
+	PRT_WAPI_STA_INFO  pWapiSta = NULL; 
+	int ret = 0;
+
+	if ((!ieee->WapiSupport) || (!ieee->wapiInfo.bWapiEnable)){
+		WAPI_TRACE(WAPI_ERR,"%s: ieee->WapiSupport = 0!!\n",__FUNCTION__);
+		return -1;
+	}
+
+	hdr_len = sMacHdrLng;
+	if(IsQoSDataFrame(pskb->data) ){
+		hdr_len += sQoSCtlLng;
+	}
+
+	pos = skb_push(pskb, ieee->wapiInfo.extra_prefix_len);
+	memmove(pos, pos+ieee->wapiInfo.extra_prefix_len, hdr_len);
+
+	pSecHeader = pskb->data + hdr_len;
+	pWapiExt = (PWLAN_HEADER_WAPI_EXTENSION)pSecHeader;
+	pRA = pskb->data + 4;
+
+	WAPI_DATA(WAPI_TX, "FillIV - Before Fill IV", pskb->data, pskb->len);
+
+	if( is_multicast_ether_addr(pRA) ){ 
+		if(!pWapiInfo->wapiTxMsk.bTxEnable){
+			WAPI_TRACE(WAPI_ERR,"%s: bTxEnable = 0!!\n",__FUNCTION__);
+			return -2;
+		}
+		if(pWapiInfo->wapiTxMsk.keyId <= 1){
+			pWapiExt->KeyIdx = pWapiInfo->wapiTxMsk.keyId;
+			pWapiExt->Reserved = 0;
+			bPNOverflow = WapiIncreasePN(pWapiInfo->lastTxMulticastPN, 1);
+			memcpy(pWapiExt->PN, pWapiInfo->lastTxMulticastPN, 16);
+			if (bPNOverflow){
+				WAPI_TRACE(WAPI_ERR,"===============>%s():multicast PN overflow\n",__FUNCTION__);
+				WapiCreateAppEventAndSend(ieee,NULL,0,pRA, false, false, true, 0, false);
+			}		          
+		}else{
+			WAPI_TRACE(WAPI_ERR,"%s: Invalid Wapi Multicast KeyIdx!!\n",__FUNCTION__);
+			ret = -3;
+		}
+	}
+    	else{ 
+		list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) {
+			if(!memcmp(pWapiSta->PeerMacAddr,pRA,6)){
+    				bFindMatchPeer = true;
+				break;
+			}
+		}
+		if (bFindMatchPeer){
+			if((!pWapiSta->wapiUskUpdate.bTxEnable) && (!pWapiSta->wapiUsk.bTxEnable)){
+				WAPI_TRACE(WAPI_ERR,"%s: bTxEnable = 0!!\n",__FUNCTION__);
+				return -4;
+			}
+			if (pWapiSta->wapiUsk.keyId <= 1){
+				if(pWapiSta->wapiUskUpdate.bTxEnable)
+					pWapiExt->KeyIdx = pWapiSta->wapiUskUpdate.keyId;
+				else
+					pWapiExt->KeyIdx = pWapiSta->wapiUsk.keyId;
+
+				pWapiExt->Reserved = 0;
+				bPNOverflow = WapiIncreasePN(pWapiSta->lastTxUnicastPN, 2);
+				memcpy(pWapiExt->PN, pWapiSta->lastTxUnicastPN, 16);
+				if (bPNOverflow){
+					WAPI_TRACE(WAPI_ERR,"===============>%s():unicast PN overflow\n",__FUNCTION__);
+					WapiCreateAppEventAndSend(ieee,NULL,0,pWapiSta->PeerMacAddr, false, true, false, 0, false);
+				}
+			}else{
+				WAPI_TRACE(WAPI_ERR,"%s: Invalid Wapi Unicast KeyIdx!!\n",__FUNCTION__);
+				ret = -5;
+			}
+		}
+		else{		
+			WAPI_TRACE(WAPI_ERR,"%s: Can not find Peer Sta "MAC_FMT"!!\n",__FUNCTION__, MAC_ARG(pRA));
+			ret = -6;
+		}
+    	}
+		
+	WAPI_DATA(WAPI_TX, "FillIV - After Fill IV", pskb->data, pskb->len);
+	return ret;
+}
+
+void SecSWSMS4Encryption(
+	struct rtllib_device *ieee,
+	struct sk_buff *pskb
+	)
+{
+	PRT_WAPI_T		pWapiInfo = &ieee->wapiInfo; 
+	PRT_WAPI_STA_INFO   pWapiSta = NULL; 	
+	u8 *SecPtr = NULL, *pRA, *pMicKey = NULL, *pDataKey = NULL, *pIV = NULL, *pHeader = pskb->data;	
+	u8 IVOffset, DataOffset, bFindMatchPeer = false, KeyIdx = 0, MicBuffer[16];	
+	u16 OutputLength;
+
+#if defined(RTL8192U) || defined(RTL8192SU)
+	u32 SpecificHeadOverhead = 0;
+#ifdef USB_TX_DRIVER_AGGREGATION_ENABLE
+	cb_desc *tcb_desc = (cb_desc *)(pskb->cb + MAX_DEV_ADDR_SIZE);
+	if (tcb_desc->drv_agg_enable) 
+		SpecificHeadOverhead = TX_PACKET_DRVAGGR_SUBFRAME_SHIFT_BYTES;
+	else
+#endif
+	SpecificHeadOverhead = TX_PACKET_SHIFT_BYTES;
+
+	pHeader += SpecificHeadOverhead;
+#endif
+	WAPI_TRACE(WAPI_TX, "=========>%s\n", __FUNCTION__);
+
+	if( IsQoSDataFrame(pHeader) ){
+		IVOffset = sMacHdrLng + sQoSCtlLng;
+	}else{
+		IVOffset = sMacHdrLng;
+	}
+	
+	DataOffset = IVOffset + ieee->wapiInfo.extra_prefix_len;
+	
+	pRA = pHeader + 4;
+	if( is_multicast_ether_addr(pRA) ){ 
+		KeyIdx = pWapiInfo->wapiTxMsk.keyId;
+		pIV = pWapiInfo->lastTxMulticastPN;
+		pMicKey = pWapiInfo->wapiTxMsk.micKey;
+		pDataKey = pWapiInfo->wapiTxMsk.dataKey;
+	}else{ 
+		if (!list_empty(&(pWapiInfo->wapiSTAUsedList))){
+			list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) {
+				if (0 == memcmp(pWapiSta->PeerMacAddr, pRA, 6)){
+					bFindMatchPeer = true;	    
+					break;
+				}
+			}    
+			
+			if (bFindMatchPeer){
+				if (pWapiSta->wapiUskUpdate.bTxEnable){
+					KeyIdx = pWapiSta->wapiUskUpdate.keyId;
+					WAPI_TRACE(WAPI_TX, "%s(): Use update USK!! KeyIdx=%d\n", __FUNCTION__, KeyIdx);
+					pIV = pWapiSta->lastTxUnicastPN;
+					pMicKey = pWapiSta->wapiUskUpdate.micKey;
+					pDataKey = pWapiSta->wapiUskUpdate.dataKey;
+				}else{
+					KeyIdx = pWapiSta->wapiUsk.keyId;
+					WAPI_TRACE(WAPI_TX, "%s(): Use USK!! KeyIdx=%d\n", __FUNCTION__, KeyIdx);
+					pIV = pWapiSta->lastTxUnicastPN;
+					pMicKey = pWapiSta->wapiUsk.micKey;
+					pDataKey = pWapiSta->wapiUsk.dataKey;
+				}
+  			}else{
+				WAPI_TRACE(WAPI_ERR,"%s: Can not find Peer Sta!!\n",__FUNCTION__);
+				return;
+			}
+		}else{
+			WAPI_TRACE(WAPI_ERR,"%s: wapiSTAUsedList is empty!!\n",__FUNCTION__);
+			return;
+		}
+	}	
+
+	SecPtr = pHeader;
+	SecCalculateMicSMS4(KeyIdx, pMicKey, SecPtr, (SecPtr+DataOffset), pskb->len-DataOffset, MicBuffer);
+
+	WAPI_DATA(WAPI_TX, "Encryption - MIC", MicBuffer, ieee->wapiInfo.extra_postfix_len);
+
+	memcpy(skb_put(pskb,ieee->wapiInfo.extra_postfix_len),
+			MicBuffer,
+			ieee->wapiInfo.extra_postfix_len
+			);
+		
+	WapiSMS4Encryption(pDataKey, pIV, (SecPtr+DataOffset), pskb->len-DataOffset, (SecPtr+DataOffset), &OutputLength);
+	
+	WAPI_DATA(WAPI_TX, "Encryption - After SMS4 encryption", pskb->data,pskb->len);
+
+	if (OutputLength != pskb->len-DataOffset)
+		WAPI_TRACE(WAPI_ERR,"%s: Output Length Error!!\n",__FUNCTION__);
+
+	WAPI_TRACE(WAPI_TX, "<=========%s\n", __FUNCTION__);
+}
+
+u8 SecSWSMS4Decryption(
+	struct rtllib_device *ieee,
+	struct sk_buff *pskb,
+	struct rtllib_rx_stats *rx_stats
+	)
+{
+	PRT_WAPI_T pWapiInfo = &ieee->wapiInfo; 
+	PRT_WAPI_STA_INFO   pWapiSta = NULL; 	
+	u8 IVOffset, DataOffset, bFindMatchPeer = false, bUseUpdatedKey = false;
+	u8 KeyIdx, MicBuffer[16], lastRxPNforQoS[16];
+	u8 *pRA, *pTA, *pMicKey, *pDataKey, *pLastRxPN, *pRecvPN, *pSecData, *pRecvMic, *pos;
+	u8 TID = 0;
+	u16 OutputLength, DataLen;
+
+	rx_stats->bWapiCheckPNInDecrypt = WapiCheckPnInSwDecrypt(ieee, pskb);
+	WAPI_TRACE(WAPI_RX, "=========>%s: check PN  %d\n", __FUNCTION__,rx_stats->bWapiCheckPNInDecrypt);
+	WAPI_DATA(WAPI_RX, "Decryption - Before decryption", pskb->data, pskb->len);
+
+	IVOffset = sMacHdrLng;
+	if( rx_stats->bIsQosData ){
+		IVOffset += sQoSCtlLng;
+	}
+	if( rx_stats->bContainHTC )
+		IVOffset += sHTCLng;
+	
+		
+	DataOffset = IVOffset + ieee->wapiInfo.extra_prefix_len;
+
+	pRA = pskb->data + 4;
+	pTA = pskb->data + 10;
+	KeyIdx = *(pskb->data + IVOffset);
+	pRecvPN = pskb->data + IVOffset + 2;
+	pSecData = pskb->data + DataOffset;
+	DataLen = pskb->len - DataOffset;
+	pRecvMic = pskb->data + pskb->len - ieee->wapiInfo.extra_postfix_len;
+	TID = Frame_QoSTID(pskb->data);
+
+	if (!list_empty(&(pWapiInfo->wapiSTAUsedList))){
+		list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) {
+			if (0 == memcmp(pWapiSta->PeerMacAddr, pTA, 6)){
+				bFindMatchPeer = true;	    
+				break;
+			}
+		}    
+	}	
+
+	if (!bFindMatchPeer){
+		WAPI_TRACE(WAPI_ERR, "%s: Can not find Peer Sta "MAC_FMT" for Key Info!!!\n", __FUNCTION__, MAC_ARG(pTA));
+		return false;
+	}
+
+	if( is_multicast_ether_addr(pRA) ){
+		WAPI_TRACE(WAPI_RX, "%s: Multicast decryption !!!\n", __FUNCTION__);
+		if (pWapiSta->wapiMsk.keyId == KeyIdx && pWapiSta->wapiMsk.bSet){
+			pLastRxPN = pWapiSta->lastRxMulticastPN;  
+			if (!WapiComparePN(pRecvPN, pLastRxPN)){
+				WAPI_TRACE(WAPI_ERR, "%s: MSK PN is not larger than last, Dropped!!!\n", __FUNCTION__);
+				WAPI_DATA(WAPI_ERR, "pRecvPN:", pRecvPN, 16);
+				WAPI_DATA(WAPI_ERR, "pLastRxPN:", pLastRxPN, 16);
+				return false;
+			}
+
+			memcpy(pLastRxPN, pRecvPN, 16);
+			pMicKey = pWapiSta->wapiMsk.micKey;
+			pDataKey = pWapiSta->wapiMsk.dataKey;
+		}else if (pWapiSta->wapiMskUpdate.keyId == KeyIdx && pWapiSta->wapiMskUpdate.bSet){
+			WAPI_TRACE(WAPI_RX, "%s: Use Updated MSK for Decryption !!!\n", __FUNCTION__);
+			bUseUpdatedKey = true;
+			memcpy(pWapiSta->lastRxMulticastPN, pRecvPN, 16);
+			pMicKey = pWapiSta->wapiMskUpdate.micKey;
+			pDataKey = pWapiSta->wapiMskUpdate.dataKey;
+		}else{
+			WAPI_TRACE(WAPI_ERR, "%s: Can not find MSK with matched KeyIdx(%d), Dropped !!!\n", __FUNCTION__,KeyIdx);
+			return false;
+		}     
+	}
+	else{ 
+		WAPI_TRACE(WAPI_RX, "%s: Unicast decryption !!!\n", __FUNCTION__);
+		if (pWapiSta->wapiUsk.keyId == KeyIdx && pWapiSta->wapiUsk.bSet){
+			WAPI_TRACE(WAPI_RX, "%s: Use USK for Decryption!!!\n", __FUNCTION__);
+			if(rx_stats->bWapiCheckPNInDecrypt){
+				if(rx_stats->bIsQosData){
+					WapiGetLastRxUnicastPNForQoSData(TID, pWapiSta, lastRxPNforQoS);
+					pLastRxPN = lastRxPNforQoS;
+				}else{
+					pLastRxPN = pWapiSta->lastRxUnicastPN;  
+				}
+				if (!WapiComparePN(pRecvPN, pLastRxPN)){
+					return false;
+				}
+				if(rx_stats->bIsQosData){
+					WapiSetLastRxUnicastPNForQoSData(TID, pRecvPN, pWapiSta);
+				}else{
+					memcpy(pWapiSta->lastRxUnicastPN, pRecvPN, 16);
+				}
+			}else{
+				memcpy(rx_stats->WapiTempPN,pRecvPN,16);
+			}
+
+			if (ieee->iw_mode == IW_MODE_INFRA){
+				if ((pRecvPN[0] & 0x1) == 0){
+					WAPI_TRACE(WAPI_ERR, "%s: Rx USK PN is not odd when Infra STA mode, Dropped !!!\n", __FUNCTION__);
+					return false;
+				}
+			}
+                   
+			pMicKey = pWapiSta->wapiUsk.micKey;
+			pDataKey = pWapiSta->wapiUsk.dataKey;
+		}
+		else if (pWapiSta->wapiUskUpdate.keyId == KeyIdx && pWapiSta->wapiUskUpdate.bSet ){
+			WAPI_TRACE(WAPI_RX, "%s: Use Updated USK for Decryption!!!\n", __FUNCTION__);
+			if(pWapiSta->bAuthenticatorInUpdata)
+				bUseUpdatedKey = true;
+			else
+				bUseUpdatedKey = false;
+
+			if(rx_stats->bIsQosData){
+				WapiSetLastRxUnicastPNForQoSData(TID, pRecvPN, pWapiSta);
+			}else{
+				memcpy(pWapiSta->lastRxUnicastPN, pRecvPN, 16);
+			}
+			pMicKey = pWapiSta->wapiUskUpdate.micKey;
+			pDataKey = pWapiSta->wapiUskUpdate.dataKey;
+		}else{
+			WAPI_TRACE(WAPI_ERR, "%s: No valid USK!!!KeyIdx=%d pWapiSta->wapiUsk.keyId=%d pWapiSta->wapiUskUpdate.keyId=%d\n", __FUNCTION__, KeyIdx, pWapiSta->wapiUsk.keyId, pWapiSta->wapiUskUpdate.keyId);
+			dump_buf(pskb->data,pskb->len);
+			return false;
+		}     	
+	}	
+
+	WAPI_DATA(WAPI_RX, "Decryption - DataKey", pDataKey, 16);
+	WAPI_DATA(WAPI_RX, "Decryption - IV", pRecvPN, 16);
+	WapiSMS4Decryption(pDataKey, pRecvPN, pSecData, DataLen, pSecData, &OutputLength);
+
+	if (OutputLength != DataLen)
+		WAPI_TRACE(WAPI_ERR, "%s:  Output Length Error!!!!\n", __FUNCTION__);      
+
+	WAPI_DATA(WAPI_RX, "Decryption - After decryption", pskb->data, pskb->len);
+
+	DataLen -= ieee->wapiInfo.extra_postfix_len;     
+
+	SecCalculateMicSMS4(KeyIdx, pMicKey, pskb->data, pSecData, DataLen, MicBuffer);
+
+	WAPI_DATA(WAPI_RX, "Decryption - MIC received", pRecvMic, SMS4_MIC_LEN);
+	WAPI_DATA(WAPI_RX, "Decryption - MIC calculated", MicBuffer, SMS4_MIC_LEN);
+
+	if (0 == memcmp(MicBuffer, pRecvMic, ieee->wapiInfo.extra_postfix_len)){
+		WAPI_TRACE(WAPI_RX, "%s: Check MIC OK!!\n", __FUNCTION__);
+		if (bUseUpdatedKey){
+			if ( is_multicast_ether_addr(pRA) ){
+				WAPI_TRACE(WAPI_API, "%s(): AE use new update MSK!!\n", __FUNCTION__);
+				pWapiSta->wapiMsk.keyId = pWapiSta->wapiMskUpdate.keyId;
+				memcpy(pWapiSta->wapiMsk.dataKey, pWapiSta->wapiMskUpdate.dataKey, 16);  
+				memcpy(pWapiSta->wapiMsk.micKey, pWapiSta->wapiMskUpdate.micKey, 16);  
+				pWapiSta->wapiMskUpdate.bTxEnable = pWapiSta->wapiMskUpdate.bSet = false;
+			}else{
+				WAPI_TRACE(WAPI_API, "%s(): AE use new update USK!!\n", __FUNCTION__);
+				pWapiSta->wapiUsk.keyId = pWapiSta->wapiUskUpdate.keyId;
+				memcpy(pWapiSta->wapiUsk.dataKey, pWapiSta->wapiUskUpdate.dataKey, 16);  
+				memcpy(pWapiSta->wapiUsk.micKey, pWapiSta->wapiUskUpdate.micKey, 16);  
+				pWapiSta->wapiUskUpdate.bTxEnable = pWapiSta->wapiUskUpdate.bSet = false; 
+			}       
+		}
+	}else{
+		WAPI_TRACE(WAPI_ERR, "%s:  Check MIC Error, Dropped !!!!\n", __FUNCTION__);      
+		return false;
+	}
+
+	pos = pskb->data;
+	memmove(pos+ieee->wapiInfo.extra_prefix_len, pos, IVOffset);
+	skb_pull(pskb, ieee->wapiInfo.extra_prefix_len);
+
+	WAPI_TRACE(WAPI_RX, "<=========%s\n", __FUNCTION__);
+
+	return true;
+}
+
+void wapi_test_set_key(struct rtllib_device *ieee, u8* buf)
+{ /*Data: keyType(1) + bTxEnable(1) + bAuthenticator(1) + bUpdate(1) + PeerAddr(6) + DataKey(16) + MicKey(16) + KeyId(1)*/
+	PRT_WAPI_T			pWapiInfo = &ieee->wapiInfo;
+	PRT_WAPI_BKID		pWapiBkid;
+	PRT_WAPI_STA_INFO	pWapiSta;
+	u8					data[43];
+	bool					bTxEnable;
+	bool					bUpdate;
+	bool					bAuthenticator;
+	u8					PeerAddr[6];
+	u8					WapiAEPNInitialValueSrc[16] = {0x37,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ;
+	u8					WapiASUEPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ;
+	u8					WapiAEMultiCastPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ;		
+
+	WAPI_TRACE(WAPI_INIT, "===========>%s\n", __FUNCTION__);
+
+	if (!ieee->WapiSupport){
+	    return;
+	}
+
+	copy_from_user(data, buf, 43);
+	bTxEnable = data[1];
+	bAuthenticator = data[2];
+	bUpdate = data[3];
+ 	memcpy(PeerAddr,data+4,6);
+		
+	if(data[0] == 0x3){
+		if(!list_empty(&(pWapiInfo->wapiBKIDIdleList))){
+			pWapiBkid = (PRT_WAPI_BKID)list_entry(pWapiInfo->wapiBKIDIdleList.next, RT_WAPI_BKID, list);
+			list_del_init(&pWapiBkid->list);
+			memcpy(pWapiBkid->bkid, data+10, 16);
+			WAPI_DATA(WAPI_INIT, "SetKey - BKID", pWapiBkid->bkid, 16);
+			list_add_tail(&pWapiBkid->list, &pWapiInfo->wapiBKIDStoreList);
+		}
+	}else{
+		list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) {
+			if(!memcmp(pWapiSta->PeerMacAddr,PeerAddr,6)){
+				pWapiSta->bAuthenticatorInUpdata = false;
+				switch(data[0]){
+				case 1:              
+					if(bAuthenticator){         
+						memcpy(pWapiSta->lastTxUnicastPN,WapiAEPNInitialValueSrc,16);
+						if(!bUpdate) {     
+							WAPI_TRACE(WAPI_INIT,"AE fisrt set usk \n");
+							pWapiSta->wapiUsk.bSet = true;
+							memcpy(pWapiSta->wapiUsk.dataKey,data+10,16);
+							memcpy(pWapiSta->wapiUsk.micKey,data+26,16);
+							pWapiSta->wapiUsk.keyId = *(data+42);
+							pWapiSta->wapiUsk.bTxEnable = true;
+							WAPI_DATA(WAPI_INIT, "SetKey - AE USK Data Key", pWapiSta->wapiUsk.dataKey, 16);
+							WAPI_DATA(WAPI_INIT, "SetKey - AE USK Mic Key", pWapiSta->wapiUsk.micKey, 16);
+						}
+						else               
+						{
+							WAPI_TRACE(WAPI_INIT, "AE update usk \n");
+							pWapiSta->wapiUskUpdate.bSet = true;
+							pWapiSta->bAuthenticatorInUpdata = true;
+							memcpy(pWapiSta->wapiUskUpdate.dataKey,data+10,16);
+							memcpy(pWapiSta->wapiUskUpdate.micKey,data+26,16);
+							memcpy(pWapiSta->lastRxUnicastPNBEQueue,WapiASUEPNInitialValueSrc,16);
+							memcpy(pWapiSta->lastRxUnicastPNBKQueue,WapiASUEPNInitialValueSrc,16);
+							memcpy(pWapiSta->lastRxUnicastPNVIQueue,WapiASUEPNInitialValueSrc,16);
+							memcpy(pWapiSta->lastRxUnicastPNVOQueue,WapiASUEPNInitialValueSrc,16);
+							memcpy(pWapiSta->lastRxUnicastPN,WapiASUEPNInitialValueSrc,16);
+							pWapiSta->wapiUskUpdate.keyId = *(data+42);
+							pWapiSta->wapiUskUpdate.bTxEnable = true;
+						}
+					}
+					else{
+						if(!bUpdate){
+							WAPI_TRACE(WAPI_INIT,"ASUE fisrt set usk \n");
+							if(bTxEnable){
+								pWapiSta->wapiUsk.bTxEnable = true;
+								memcpy(pWapiSta->lastTxUnicastPN,WapiASUEPNInitialValueSrc,16);
+							}else{
+								pWapiSta->wapiUsk.bSet = true;
+								memcpy(pWapiSta->wapiUsk.dataKey,data+10,16);
+								memcpy(pWapiSta->wapiUsk.micKey,data+26,16);
+								pWapiSta->wapiUsk.keyId = *(data+42);
+								pWapiSta->wapiUsk.bTxEnable = false;
+							}
+						}else{
+							WAPI_TRACE(WAPI_INIT,"ASUE update usk \n");
+							if(bTxEnable){
+								pWapiSta->wapiUskUpdate.bTxEnable = true;
+								if(pWapiSta->wapiUskUpdate.bSet){
+									memcpy(pWapiSta->wapiUsk.dataKey,pWapiSta->wapiUskUpdate.dataKey,16);
+									memcpy(pWapiSta->wapiUsk.micKey,pWapiSta->wapiUskUpdate.micKey,16);
+									pWapiSta->wapiUsk.keyId=pWapiSta->wapiUskUpdate.keyId;
+									memcpy(pWapiSta->lastRxUnicastPNBEQueue,WapiASUEPNInitialValueSrc,16);
+									memcpy(pWapiSta->lastRxUnicastPNBKQueue,WapiASUEPNInitialValueSrc,16);
+									memcpy(pWapiSta->lastRxUnicastPNVIQueue,WapiASUEPNInitialValueSrc,16);
+									memcpy(pWapiSta->lastRxUnicastPNVOQueue,WapiASUEPNInitialValueSrc,16);
+									memcpy(pWapiSta->lastRxUnicastPN,WapiASUEPNInitialValueSrc,16);
+									pWapiSta->wapiUskUpdate.bTxEnable = false;
+									pWapiSta->wapiUskUpdate.bSet = false;
+								}
+								memcpy(pWapiSta->lastTxUnicastPN,WapiASUEPNInitialValueSrc,16);
+							}else{
+								pWapiSta->wapiUskUpdate.bSet = true;
+								memcpy(pWapiSta->wapiUskUpdate.dataKey,data+10,16);
+								memcpy(pWapiSta->wapiUskUpdate.micKey,data+26,16);
+								pWapiSta->wapiUskUpdate.keyId = *(data+42);
+								pWapiSta->wapiUskUpdate.bTxEnable = false;
+							}
+						}
+					}
+					break;
+				case 2:		
+					if(bAuthenticator){          
+						pWapiInfo->wapiTxMsk.bSet = true;
+						memcpy(pWapiInfo->wapiTxMsk.dataKey,data+10,16);													
+						memcpy(pWapiInfo->wapiTxMsk.micKey,data+26,16);
+						pWapiInfo->wapiTxMsk.keyId = *(data+42);
+						pWapiInfo->wapiTxMsk.bTxEnable = true;
+						memcpy(pWapiInfo->lastTxMulticastPN,WapiAEMultiCastPNInitialValueSrc,16);
+
+						if(!bUpdate){      
+							WAPI_TRACE(WAPI_INIT, "AE fisrt set msk \n");
+							if(!pWapiSta->bSetkeyOk)
+								pWapiSta->bSetkeyOk = true;
+							pWapiInfo->bFirstAuthentiateInProgress= false;
+						}else{               
+							WAPI_TRACE(WAPI_INIT,"AE update msk \n");
+						}
+
+						WAPI_DATA(WAPI_INIT, "SetKey - AE MSK Data Key", pWapiInfo->wapiTxMsk.dataKey, 16);
+						WAPI_DATA(WAPI_INIT, "SetKey - AE MSK Mic Key", pWapiInfo->wapiTxMsk.micKey, 16);
+					}
+					else{
+						if(!bUpdate){
+							WAPI_TRACE(WAPI_INIT,"ASUE fisrt set msk \n");
+							pWapiSta->wapiMsk.bSet = true;
+							memcpy(pWapiSta->wapiMsk.dataKey,data+10,16);													
+							memcpy(pWapiSta->wapiMsk.micKey,data+26,16);
+							pWapiSta->wapiMsk.keyId = *(data+42);
+							pWapiSta->wapiMsk.bTxEnable = false;
+							if(!pWapiSta->bSetkeyOk)
+								pWapiSta->bSetkeyOk = true;
+							pWapiInfo->bFirstAuthentiateInProgress= false;
+							WAPI_DATA(WAPI_INIT, "SetKey - ASUE MSK Data Key", pWapiSta->wapiMsk.dataKey, 16);
+							WAPI_DATA(WAPI_INIT, "SetKey - ASUE MSK Mic Key", pWapiSta->wapiMsk.micKey, 16);
+						}else{
+							WAPI_TRACE(WAPI_INIT,"ASUE update msk \n");
+							pWapiSta->wapiMskUpdate.bSet = true;
+							memcpy(pWapiSta->wapiMskUpdate.dataKey,data+10,16);													
+							memcpy(pWapiSta->wapiMskUpdate.micKey,data+26,16);
+							pWapiSta->wapiMskUpdate.keyId = *(data+42);
+							pWapiSta->wapiMskUpdate.bTxEnable = false;
+						}
+					}
+					break;
+				default:
+					WAPI_TRACE(WAPI_ERR,"Unknown Flag \n");
+					break;
+				}
+			}
+		}
+	}
+	WAPI_TRACE(WAPI_INIT, "<===========%s\n", __FUNCTION__);
+}
+
+void wapi_test_init(struct rtllib_device *ieee)
+{
+	u8 keybuf[100];
+	u8 mac_addr[6]={0x00,0xe0,0x4c,0x72,0x04,0x70};
+	u8 UskDataKey[16]={0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f};
+	u8 UskMicKey[16]={0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f};
+	u8 UskId = 0;
+	u8 MskDataKey[16]={0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f};
+	u8 MskMicKey[16]={0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f};
+	u8 MskId = 0;
+
+	WAPI_TRACE(WAPI_INIT, "===========>%s\n", __FUNCTION__);
+
+	WAPI_TRACE(WAPI_INIT, "%s: Enable wapi!!!!\n", __FUNCTION__);
+	ieee->wapiInfo.bWapiEnable = true;
+	ieee->pairwise_key_type = KEY_TYPE_SMS4;
+	ieee->group_key_type = KEY_TYPE_SMS4;
+	ieee->wapiInfo.extra_prefix_len = WAPI_EXT_LEN;
+	ieee->wapiInfo.extra_postfix_len = SMS4_MIC_LEN;
+
+	WAPI_TRACE(WAPI_INIT, "%s: Set USK!!!!\n", __FUNCTION__);
+	memset(keybuf,0,100);
+	keybuf[0] = 1;                           
+	keybuf[1] = 1; 				
+	keybuf[2] = 1; 				
+	keybuf[3] = 0; 				
+	
+	memcpy(keybuf+4,mac_addr,6);
+	memcpy(keybuf+10,UskDataKey,16);
+	memcpy(keybuf+26,UskMicKey,16);
+	keybuf[42]=UskId;
+	wapi_test_set_key(ieee, keybuf);
+	
+	memset(keybuf,0,100);
+	keybuf[0] = 1;                           
+	keybuf[1] = 1; 				
+	keybuf[2] = 0; 				
+	keybuf[3] = 0; 				
+	
+	memcpy(keybuf+4,mac_addr,6);
+	memcpy(keybuf+10,UskDataKey,16);
+	memcpy(keybuf+26,UskMicKey,16);
+	keybuf[42]=UskId;
+	wapi_test_set_key(ieee, keybuf);
+	
+	WAPI_TRACE(WAPI_INIT, "%s: Set MSK!!!!\n", __FUNCTION__);
+	memset(keybuf,0,100);
+	keybuf[0] = 2;                                
+	keybuf[1] = 1;                               
+	keybuf[2] = 1; 				
+	keybuf[3] = 0;                              
+	memcpy(keybuf+4,mac_addr,6);
+	memcpy(keybuf+10,MskDataKey,16);
+	memcpy(keybuf+26,MskMicKey,16);
+	keybuf[42] = MskId;
+	wapi_test_set_key(ieee, keybuf);
+
+	memset(keybuf,0,100);
+	keybuf[0] = 2;                                
+	keybuf[1] = 1;                               
+	keybuf[2] = 0; 				
+	keybuf[3] = 0;                              
+	memcpy(keybuf+4,mac_addr,6);
+	memcpy(keybuf+10,MskDataKey,16);
+	memcpy(keybuf+26,MskMicKey,16);
+	keybuf[42] = MskId;
+	wapi_test_set_key(ieee, keybuf);
+	WAPI_TRACE(WAPI_INIT, "<===========%s\n", __FUNCTION__);
+}
+
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/cipher.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/cipher.c
@@ -0,0 +1,298 @@
+/*
+ * Cryptographic API.
+ *
+ * Cipher operations.
+ *
+ * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option) 
+ * any later version.
+ *
+ */
+#include <linux/kernel.h>
+#include "rtl_crypto.h"
+#include <linux/errno.h>
+#include <linux/mm.h>
+#include <linux/slab.h>
+#include <asm/scatterlist.h>
+#include "internal.h"
+#include "scatterwalk.h"
+
+typedef void (cryptfn_t)(void *, u8 *, const u8 *);
+typedef void (procfn_t)(struct crypto_tfm *, u8 *,
+                        u8*, cryptfn_t, int enc, void *, int);
+
+static inline void xor_64(u8 *a, const u8 *b)
+{
+	((u32 *)a)[0] ^= ((u32 *)b)[0];
+	((u32 *)a)[1] ^= ((u32 *)b)[1];
+}
+
+static inline void xor_128(u8 *a, const u8 *b)
+{
+	((u32 *)a)[0] ^= ((u32 *)b)[0];
+	((u32 *)a)[1] ^= ((u32 *)b)[1];
+	((u32 *)a)[2] ^= ((u32 *)b)[2];
+	((u32 *)a)[3] ^= ((u32 *)b)[3];
+}
+
+
+/* 
+ * Generic encrypt/decrypt wrapper for ciphers, handles operations across
+ * multiple page boundaries by using temporary blocks.  In user context,
+ * the kernel is given a chance to schedule us once per block.
+ */
+static int crypt(struct crypto_tfm *tfm,
+		 struct scatterlist *dst,
+		 struct scatterlist *src,
+                 unsigned int nbytes, cryptfn_t crfn,
+                 procfn_t prfn, int enc, void *info)
+{
+	struct scatter_walk walk_in, walk_out;
+	const unsigned int bsize = crypto_tfm_alg_blocksize(tfm);
+	u8 tmp_src[bsize];
+	u8 tmp_dst[bsize];
+
+	if (!nbytes)
+		return 0;
+
+	if (nbytes % bsize) {
+		tfm->crt_flags |= CRYPTO_TFM_RES_BAD_BLOCK_LEN;
+		return -EINVAL;
+	}
+
+	scatterwalk_start(&walk_in, src);
+	scatterwalk_start(&walk_out, dst);
+
+	for(;;) {
+		u8 *src_p, *dst_p;
+		int in_place;
+
+		scatterwalk_map(&walk_in, 0);
+		scatterwalk_map(&walk_out, 1);
+		src_p = scatterwalk_whichbuf(&walk_in, bsize, tmp_src);
+		dst_p = scatterwalk_whichbuf(&walk_out, bsize, tmp_dst);
+		in_place = scatterwalk_samebuf(&walk_in, &walk_out,
+					       src_p, dst_p);
+
+		nbytes -= bsize;
+
+		scatterwalk_copychunks(src_p, &walk_in, bsize, 0);
+
+		prfn(tfm, dst_p, src_p, crfn, enc, info, in_place);
+
+		scatterwalk_done(&walk_in, 0, nbytes);
+
+		scatterwalk_copychunks(dst_p, &walk_out, bsize, 1);
+		scatterwalk_done(&walk_out, 1, nbytes);
+
+		if (!nbytes)
+			return 0;
+
+		crypto_yield(tfm);
+	}
+}
+
+static void cbc_process(struct crypto_tfm *tfm, u8 *dst, u8 *src,
+			cryptfn_t fn, int enc, void *info, int in_place)
+{
+	u8 *iv = info;
+	
+	/* Null encryption */
+	if (!iv)
+		return;
+		
+	if (enc) {
+		tfm->crt_u.cipher.cit_xor_block(iv, src);
+		fn(crypto_tfm_ctx(tfm), dst, iv);
+		memcpy(iv, dst, crypto_tfm_alg_blocksize(tfm));
+	} else {
+		u8 stack[in_place ? crypto_tfm_alg_blocksize(tfm) : 0];
+		u8 *buf = in_place ? stack : dst;
+
+		fn(crypto_tfm_ctx(tfm), buf, src);
+		tfm->crt_u.cipher.cit_xor_block(buf, iv);
+		memcpy(iv, src, crypto_tfm_alg_blocksize(tfm));
+		if (buf != dst)
+			memcpy(dst, buf, crypto_tfm_alg_blocksize(tfm));
+	}
+}
+
+static void ecb_process(struct crypto_tfm *tfm, u8 *dst, u8 *src,
+			cryptfn_t fn, int enc, void *info, int in_place)
+{
+	fn(crypto_tfm_ctx(tfm), dst, src);
+}
+
+static int setkey(struct crypto_tfm *tfm, const u8 *key, unsigned int keylen)
+{
+	struct cipher_alg *cia = &tfm->__crt_alg->cra_cipher;
+	
+	if (keylen < cia->cia_min_keysize || keylen > cia->cia_max_keysize) {
+		tfm->crt_flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
+		return -EINVAL;
+	} else
+		return cia->cia_setkey(crypto_tfm_ctx(tfm), key, keylen,
+		                       &tfm->crt_flags);
+}
+
+static int ecb_encrypt(struct crypto_tfm *tfm,
+		       struct scatterlist *dst,
+                       struct scatterlist *src, unsigned int nbytes)
+{
+	return crypt(tfm, dst, src, nbytes,
+	             tfm->__crt_alg->cra_cipher.cia_encrypt,
+	             ecb_process, 1, NULL);
+}
+
+static int ecb_decrypt(struct crypto_tfm *tfm,
+                       struct scatterlist *dst,
+                       struct scatterlist *src,
+		       unsigned int nbytes)
+{
+	return crypt(tfm, dst, src, nbytes,
+	             tfm->__crt_alg->cra_cipher.cia_decrypt,
+	             ecb_process, 1, NULL);
+}
+
+static int cbc_encrypt(struct crypto_tfm *tfm,
+                       struct scatterlist *dst,
+                       struct scatterlist *src,
+		       unsigned int nbytes)
+{
+	return crypt(tfm, dst, src, nbytes,
+	             tfm->__crt_alg->cra_cipher.cia_encrypt,
+	             cbc_process, 1, tfm->crt_cipher.cit_iv);
+}
+
+static int cbc_encrypt_iv(struct crypto_tfm *tfm,
+                          struct scatterlist *dst,
+                          struct scatterlist *src,
+                          unsigned int nbytes, u8 *iv)
+{
+	return crypt(tfm, dst, src, nbytes,
+	             tfm->__crt_alg->cra_cipher.cia_encrypt,
+	             cbc_process, 1, iv);
+}
+
+static int cbc_decrypt(struct crypto_tfm *tfm,
+                       struct scatterlist *dst,
+                       struct scatterlist *src,
+		       unsigned int nbytes)
+{
+	return crypt(tfm, dst, src, nbytes,
+	             tfm->__crt_alg->cra_cipher.cia_decrypt,
+	             cbc_process, 0, tfm->crt_cipher.cit_iv);
+}
+
+static int cbc_decrypt_iv(struct crypto_tfm *tfm,
+                          struct scatterlist *dst,
+                          struct scatterlist *src,
+                          unsigned int nbytes, u8 *iv)
+{
+	return crypt(tfm, dst, src, nbytes,
+	             tfm->__crt_alg->cra_cipher.cia_decrypt,
+	             cbc_process, 0, iv);
+}
+
+static int nocrypt(struct crypto_tfm *tfm,
+                   struct scatterlist *dst,
+                   struct scatterlist *src,
+		   unsigned int nbytes)
+{
+	return -ENOSYS;
+}
+
+static int nocrypt_iv(struct crypto_tfm *tfm,
+                      struct scatterlist *dst,
+                      struct scatterlist *src,
+                      unsigned int nbytes, u8 *iv)
+{
+	return -ENOSYS;
+}
+
+int crypto_init_cipher_flags(struct crypto_tfm *tfm, u32 flags)
+{
+	u32 mode = flags & CRYPTO_TFM_MODE_MASK;
+	
+	tfm->crt_cipher.cit_mode = mode ? mode : CRYPTO_TFM_MODE_ECB;
+	if (flags & CRYPTO_TFM_REQ_WEAK_KEY)
+		tfm->crt_flags = CRYPTO_TFM_REQ_WEAK_KEY;
+	
+	return 0;
+}
+
+int crypto_init_cipher_ops(struct crypto_tfm *tfm)
+{
+	int ret = 0;
+	struct cipher_tfm *ops = &tfm->crt_cipher;
+
+	ops->cit_setkey = setkey;
+
+	switch (tfm->crt_cipher.cit_mode) {
+	case CRYPTO_TFM_MODE_ECB:
+		ops->cit_encrypt = ecb_encrypt;
+		ops->cit_decrypt = ecb_decrypt;
+		break;
+		
+	case CRYPTO_TFM_MODE_CBC:
+		ops->cit_encrypt = cbc_encrypt;
+		ops->cit_decrypt = cbc_decrypt;
+		ops->cit_encrypt_iv = cbc_encrypt_iv;
+		ops->cit_decrypt_iv = cbc_decrypt_iv;
+		break;
+		
+	case CRYPTO_TFM_MODE_CFB:
+		ops->cit_encrypt = nocrypt;
+		ops->cit_decrypt = nocrypt;
+		ops->cit_encrypt_iv = nocrypt_iv;
+		ops->cit_decrypt_iv = nocrypt_iv;
+		break;
+	
+	case CRYPTO_TFM_MODE_CTR:
+		ops->cit_encrypt = nocrypt;
+		ops->cit_decrypt = nocrypt;
+		ops->cit_encrypt_iv = nocrypt_iv;
+		ops->cit_decrypt_iv = nocrypt_iv;
+		break;
+
+	default:
+		BUG();
+	}
+	
+	if (ops->cit_mode == CRYPTO_TFM_MODE_CBC) {
+	    	
+	    	switch (crypto_tfm_alg_blocksize(tfm)) {
+	    	case 8:
+	    		ops->cit_xor_block = xor_64;
+	    		break;
+	    		
+	    	case 16:
+	    		ops->cit_xor_block = xor_128;
+	    		break;
+	    		
+	    	default:
+	    		printk(KERN_WARNING "%s: block size %u not supported\n",
+	    		       crypto_tfm_alg_name(tfm),
+	    		       crypto_tfm_alg_blocksize(tfm));
+	    		ret = -EINVAL;
+	    		goto out;
+	    	}
+	    	
+		ops->cit_ivsize = crypto_tfm_alg_blocksize(tfm);
+	    	ops->cit_iv = kmalloc(ops->cit_ivsize, GFP_KERNEL);
+		if (ops->cit_iv == NULL)
+			ret = -ENOMEM;
+	}
+
+out:	
+	return ret;
+}
+
+void crypto_exit_cipher_ops(struct crypto_tfm *tfm)
+{
+	if (tfm->crt_cipher.cit_iv)
+		kfree(tfm->crt_cipher.cit_iv);
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/dot11d.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/dot11d.h
@@ -0,0 +1,83 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+#ifndef __INC_DOT11D_H
+#define __INC_DOT11D_H
+
+#ifdef ENABLE_DOT11D
+#include "rtllib.h"
+
+
+
+typedef struct _CHNL_TXPOWER_TRIPLE {
+	u8 FirstChnl;
+	u8  NumChnls;
+	u8  MaxTxPowerInDbm;
+}CHNL_TXPOWER_TRIPLE, *PCHNL_TXPOWER_TRIPLE;
+
+typedef enum _DOT11D_STATE {
+	DOT11D_STATE_NONE = 0,
+	DOT11D_STATE_LEARNED,
+	DOT11D_STATE_DONE,
+}DOT11D_STATE;
+
+typedef struct _RT_DOT11D_INFO {
+
+	bool bEnabled; 
+
+	u16 CountryIeLen; 
+	u8  CountryIeBuf[MAX_IE_LEN];
+	u8  CountryIeSrcAddr[6]; 
+	u8  CountryIeWatchdog; 
+
+	u8  channel_map[MAX_CHANNEL_NUMBER+1];  
+	u8  MaxTxPwrDbmList[MAX_CHANNEL_NUMBER+1];
+
+	DOT11D_STATE State;
+}RT_DOT11D_INFO, *PRT_DOT11D_INFO;
+#define eqMacAddr(a,b)		( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
+#define cpMacAddr(des,src)	((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3],(des)[4]=(src)[4],(des)[5]=(src)[5])
+#define GET_DOT11D_INFO(__pIeeeDev) ((PRT_DOT11D_INFO)((__pIeeeDev)->pDot11dInfo))
+
+#define IS_DOT11D_ENABLE(__pIeeeDev) GET_DOT11D_INFO(__pIeeeDev)->bEnabled
+#define IS_COUNTRY_IE_VALID(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)->CountryIeLen > 0)
+
+#define IS_EQUAL_CIE_SRC(__pIeeeDev, __pTa) eqMacAddr(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa) 
+#define UPDATE_CIE_SRC(__pIeeeDev, __pTa) cpMacAddr(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa)
+
+#define IS_COUNTRY_IE_CHANGED(__pIeeeDev, __Ie) \
+	(((__Ie).Length == 0 || (__Ie).Length != GET_DOT11D_INFO(__pIeeeDev)->CountryIeLen) ? \
+	false : \
+	(!memcmp(GET_DOT11D_INFO(__pIeeeDev)->CountryIeBuf, (__Ie).Octet, (__Ie).Length)))
+
+#define CIE_WATCHDOG_TH 1
+#define GET_CIE_WATCHDOG(__pIeeeDev) GET_DOT11D_INFO(__pIeeeDev)->CountryIeWatchdog
+#define RESET_CIE_WATCHDOG(__pIeeeDev) GET_CIE_WATCHDOG(__pIeeeDev) = 0 
+#define UPDATE_CIE_WATCHDOG(__pIeeeDev) ++GET_CIE_WATCHDOG(__pIeeeDev)
+
+#define IS_DOT11D_STATE_DONE(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)->State == DOT11D_STATE_DONE)
+
+void Dot11d_Init( struct rtllib_device *dev); 
+void Dot11d_Channelmap(u8 channel_plan, struct rtllib_device* ieee);
+void Dot11d_Reset(struct rtllib_device *dev);
+void Dot11d_UpdateCountryIe(struct rtllib_device *dev, u8 *pTaddr, u16 CoutryIeLen, u8 *pCoutryIe);
+u8 DOT11D_GetMaxTxPwrInDbm(struct rtllib_device *dev, u8 Channel);
+void DOT11D_ScanComplete(struct rtllib_device *dev);
+int ToLegalChannel(struct rtllib_device *dev, u8 channel);
+#endif 
+#endif 
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/dot11d.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/dot11d.c
@@ -0,0 +1,261 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+#ifdef ENABLE_DOT11D
+#include "dot11d.h"
+
+typedef struct _CHANNEL_LIST
+{
+	u8      Channel[32];
+	u8      Len;
+}CHANNEL_LIST, *PCHANNEL_LIST;
+
+static CHANNEL_LIST ChannelPlan[] = {
+	{{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,149,153,157,161,165},24},
+	{{1,2,3,4,5,6,7,8,9,10,11},11},    
+	{{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},
+	{{1,2,3,4,5,6,7,8,9,10,11,12,13},13},   
+	{{1,2,3,4,5,6,7,8,9,10,11,12,13},13},   
+	{{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, 
+	{{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, 
+	{{1,2,3,4,5,6,7,8,9,10,11,12,13},13},   
+	{{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, 
+	{{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, 
+	{{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14}, 
+	{{1,2,3,4,5,6,7,8,9,10,11,12,13},13},    
+	{{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}    
+};
+
+void Dot11d_Init(struct rtllib_device *ieee)
+{
+	PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(ieee);
+#ifdef CONFIG_CRDA 
+	ieee->bGlobalDomain = true;
+	pDot11dInfo->bEnabled = true;
+#else
+	pDot11dInfo->bEnabled = false;
+#endif	
+
+	pDot11dInfo->State = DOT11D_STATE_NONE;
+	pDot11dInfo->CountryIeLen = 0;
+	memset(pDot11dInfo->channel_map, 0, MAX_CHANNEL_NUMBER+1);  
+	memset(pDot11dInfo->MaxTxPwrDbmList, 0xFF, MAX_CHANNEL_NUMBER+1);
+	RESET_CIE_WATCHDOG(ieee);
+
+}
+
+void Dot11d_Channelmap(u8 channel_plan, struct rtllib_device* ieee)
+{
+	int i, max_chan = 14, min_chan = 1;
+
+	ieee->bGlobalDomain = false;
+
+	if (ChannelPlan[channel_plan].Len != 0) {
+		memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
+		for (i = 0; i < ChannelPlan[channel_plan].Len; i++) {
+			if (ChannelPlan[channel_plan].Channel[i] < min_chan ||
+					ChannelPlan[channel_plan].Channel[i] > max_chan)
+				break;
+			GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
+		}
+	}
+
+	switch (channel_plan) {
+		case COUNTRY_CODE_GLOBAL_DOMAIN:
+			ieee->bGlobalDomain = true;
+			for (i = 12; i <= 14; i++) {
+				GET_DOT11D_INFO(ieee)->channel_map[i] = 2;
+			}
+			ieee->IbssStartChnl= 10;
+			ieee->ibss_maxjoin_chal = 11;
+			break;
+
+		case COUNTRY_CODE_WORLD_WIDE_13:
+			for (i = 12; i <= 13; i++) {
+				GET_DOT11D_INFO(ieee)->channel_map[i] = 2;
+			}
+			ieee->IbssStartChnl = 10;
+			ieee->ibss_maxjoin_chal = 11;
+			break;
+
+		default:
+			ieee->IbssStartChnl = 1;
+			ieee->ibss_maxjoin_chal = 14;
+			break;
+	}
+}
+						
+
+void Dot11d_Reset(struct rtllib_device *ieee)
+{
+	PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(ieee);
+#if 0
+	if(!pDot11dInfo->bEnabled)
+		return;
+#endif
+
+#ifndef CONFIG_CRDA
+	u32 i;
+	memset(pDot11dInfo->channel_map, 0, MAX_CHANNEL_NUMBER+1);
+	memset(pDot11dInfo->MaxTxPwrDbmList, 0xFF, MAX_CHANNEL_NUMBER+1);
+	for (i=1; i<=11; i++) {
+		(pDot11dInfo->channel_map)[i] = 1;
+	}
+	for (i=12; i<=14; i++) {
+		(pDot11dInfo->channel_map)[i] = 2;
+	}
+#endif
+	pDot11dInfo->State = DOT11D_STATE_NONE;
+	pDot11dInfo->CountryIeLen = 0;
+	RESET_CIE_WATCHDOG(ieee);
+
+}
+
+void Dot11d_UpdateCountryIe(struct rtllib_device *dev, u8 *pTaddr,
+	                    u16 CoutryIeLen, u8* pCoutryIe)
+{
+	PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(dev);
+#ifdef CONFIG_CRDA 
+	
+#else	
+	u8 i, j, NumTriples, MaxChnlNum;
+	PCHNL_TXPOWER_TRIPLE pTriple;
+
+	memset(pDot11dInfo->channel_map, 0, MAX_CHANNEL_NUMBER+1);
+	memset(pDot11dInfo->MaxTxPwrDbmList, 0xFF, MAX_CHANNEL_NUMBER+1);
+	MaxChnlNum = 0;
+	NumTriples = (CoutryIeLen - 3) / 3; 
+	pTriple = (PCHNL_TXPOWER_TRIPLE)(pCoutryIe + 3);
+	for(i = 0; i < NumTriples; i++)
+	{
+		if(MaxChnlNum >= pTriple->FirstChnl)
+		{ 
+			printk("Dot11d_UpdateCountryIe(): Invalid country IE, skip it........1\n");
+			return; 
+		}
+		if(MAX_CHANNEL_NUMBER < (pTriple->FirstChnl + pTriple->NumChnls))
+		{ 
+			printk("Dot11d_UpdateCountryIe(): Invalid country IE, skip it........2\n");
+			return; 
+		}
+
+		for(j = 0 ; j < pTriple->NumChnls; j++)
+		{
+			pDot11dInfo->channel_map[pTriple->FirstChnl + j] = 1;
+			pDot11dInfo->MaxTxPwrDbmList[pTriple->FirstChnl + j] = pTriple->MaxTxPowerInDbm;
+			MaxChnlNum = pTriple->FirstChnl + j;
+		}	
+
+		pTriple = (PCHNL_TXPOWER_TRIPLE)((u8*)pTriple + 3);
+	}
+#if 0
+	printk("Channel List:");
+	for(i=1; i<= MAX_CHANNEL_NUMBER; i++)
+		if(pDot11dInfo->channel_map[i] > 0)
+			printk(" %d", i);
+	printk("\n");
+#endif
+#endif	
+
+	UPDATE_CIE_SRC(dev, pTaddr);
+
+	pDot11dInfo->CountryIeLen = CoutryIeLen;
+	memcpy(pDot11dInfo->CountryIeBuf, pCoutryIe,CoutryIeLen);
+	pDot11dInfo->State = DOT11D_STATE_LEARNED;
+
+#ifdef CONFIG_CRDA 
+   	queue_delayed_work_rsl(dev->wq, &dev->softmac_hint11d_wq, 0);
+#endif	
+}
+
+u8 DOT11D_GetMaxTxPwrInDbm( struct rtllib_device *dev, u8 Channel)
+{
+	PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(dev);
+	u8 MaxTxPwrInDbm = 255;
+
+	if(MAX_CHANNEL_NUMBER < Channel)
+	{ 
+		printk("DOT11D_GetMaxTxPwrInDbm(): Invalid Channel\n");
+		return MaxTxPwrInDbm; 
+	}
+	if(pDot11dInfo->channel_map[Channel])
+	{
+		MaxTxPwrInDbm = pDot11dInfo->MaxTxPwrDbmList[Channel];	
+	}
+
+	return MaxTxPwrInDbm;
+}
+
+void DOT11D_ScanComplete( struct rtllib_device * dev)
+{
+	PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(dev);
+
+	switch(pDot11dInfo->State)
+	{
+	case DOT11D_STATE_LEARNED:
+		pDot11dInfo->State = DOT11D_STATE_DONE;
+		break;
+
+	case DOT11D_STATE_DONE:
+		{ 
+			Dot11d_Reset(dev); 
+		}
+		break;
+	case DOT11D_STATE_NONE:
+		break;
+	}
+}
+
+int ToLegalChannel( struct rtllib_device * dev, u8 channel)
+{
+	PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(dev);
+	u8 default_chn = 0;
+	u32 i = 0;
+
+	for (i=1; i<= MAX_CHANNEL_NUMBER; i++)
+	{
+		if(pDot11dInfo->channel_map[i] > 0)
+		{
+			default_chn = i;
+			break;
+		}
+	}
+
+	if(MAX_CHANNEL_NUMBER < channel)
+	{ 
+		printk("%s(): Invalid Channel\n", __FUNCTION__);
+		return default_chn; 
+	}
+	
+	if(pDot11dInfo->channel_map[channel] > 0)
+		return channel;
+	
+	return default_chn;
+}
+
+#ifndef BUILT_IN_RTLLIB
+EXPORT_SYMBOL_RSL(Dot11d_Init);
+EXPORT_SYMBOL_RSL(Dot11d_Channelmap);
+EXPORT_SYMBOL_RSL(Dot11d_Reset);
+EXPORT_SYMBOL_RSL(Dot11d_UpdateCountryIe);
+EXPORT_SYMBOL_RSL(DOT11D_GetMaxTxPwrInDbm);
+EXPORT_SYMBOL_RSL(DOT11D_ScanComplete);
+EXPORT_SYMBOL_RSL(ToLegalChannel);
+#endif
+
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/rtllib_softmac.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/rtllib_softmac.c
@@ -0,0 +1,5255 @@
+/* IEEE 802.11 SoftMAC layer
+ * Copyright (c) 2005 Andrea Merello <andreamrl@tiscali.it>
+ *
+ * Mostly extracted from the rtl8180-sa2400 driver for the 
+ * in-kernel generic ieee802.11 stack.
+ *
+ * Few lines might be stolen from other part of the rtllib
+ * stack. Copyright who own it's copyright
+ *
+ * WPA code stolen from the ipw2200 driver.
+ * Copyright who own it's copyright. 
+ *
+ * released under the GPL
+ */
+
+
+#include "rtllib.h"
+
+#include <linux/random.h>
+#include <linux/delay.h>
+#include <linux/version.h>
+#include <asm/uaccess.h>
+#ifdef ENABLE_DOT11D
+#include "dot11d.h"
+#endif
+
+#ifdef RTK_DMP_PLATFORM
+#include <linux/usb_setting.h> 
+#endif
+extern void _setup_timer( struct timer_list*, void*, unsigned long );
+u8 rsn_authen_cipher_suite[16][4] = {
+	{0x00,0x0F,0xAC,0x00}, 
+	{0x00,0x0F,0xAC,0x01}, 
+	{0x00,0x0F,0xAC,0x02}, 
+	{0x00,0x0F,0xAC,0x03}, 
+	{0x00,0x0F,0xAC,0x04}, 
+	{0x00,0x0F,0xAC,0x05}, 
+};
+
+short rtllib_is_54g(struct rtllib_network *net)
+{
+	return ((net->rates_ex_len > 0) || (net->rates_len > 4));
+}
+
+short rtllib_is_shortslot(struct rtllib_network net)
+{
+	return (net.capability & WLAN_CAPABILITY_SHORT_SLOT_TIME);
+}
+
+/* returns the total length needed for pleacing the RATE MFIE
+ * tag and the EXTENDED RATE MFIE tag if needed.
+ * It encludes two bytes per tag for the tag itself and its len
+ */
+unsigned int rtllib_MFIE_rate_len(struct rtllib_device *ieee)
+{
+	unsigned int rate_len = 0;
+	
+	if (ieee->modulation & RTLLIB_CCK_MODULATION)
+		rate_len = RTLLIB_CCK_RATE_LEN + 2;
+		
+	if (ieee->modulation & RTLLIB_OFDM_MODULATION)
+		
+		rate_len += RTLLIB_OFDM_RATE_LEN + 2;
+	
+	return rate_len;
+}
+
+/* pleace the MFIE rate, tag to the memory (double) poined. 
+ * Then it updates the pointer so that
+ * it points after the new MFIE tag added.
+ */  
+void rtllib_MFIE_Brate(struct rtllib_device *ieee, u8 **tag_p)
+{
+	u8 *tag = *tag_p; 
+	
+	if (ieee->modulation & RTLLIB_CCK_MODULATION){
+		*tag++ = MFIE_TYPE_RATES;
+		*tag++ = 4;
+		*tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_CCK_RATE_1MB;
+		*tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_CCK_RATE_2MB;
+		*tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_CCK_RATE_5MB;
+		*tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_CCK_RATE_11MB;
+	}
+	
+	/* We may add an option for custom rates that specific HW might support */
+	*tag_p = tag;
+}
+
+void rtllib_MFIE_Grate(struct rtllib_device *ieee, u8 **tag_p)
+{	
+	u8 *tag = *tag_p; 
+	
+		if (ieee->modulation & RTLLIB_OFDM_MODULATION){
+		
+		*tag++ = MFIE_TYPE_RATES_EX;
+		*tag++ = 8;
+		*tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_6MB;
+		*tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_9MB;
+		*tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_12MB;
+		*tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_18MB;
+		*tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_24MB;
+		*tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_36MB;
+		*tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_48MB;
+		*tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_54MB;
+		
+	}
+	
+	/* We may add an option for custom rates that specific HW might support */
+	*tag_p = tag;
+}
+
+void rtllib_WMM_Info(struct rtllib_device *ieee, u8 **tag_p) {
+	u8 *tag = *tag_p;
+
+	*tag++ = MFIE_TYPE_GENERIC; 
+	*tag++ = 7;
+	*tag++ = 0x00;
+	*tag++ = 0x50;
+	*tag++ = 0xf2;
+	*tag++ = 0x02;
+	*tag++ = 0x00;
+	*tag++ = 0x01;
+#ifdef SUPPORT_USPD	
+	if(ieee->current_network.wmm_info & 0x80) {
+		*tag++ = 0x0f|MAX_SP_Len;
+	} else {
+		*tag++ = MAX_SP_Len;
+	}
+#else 
+	*tag++ = MAX_SP_Len;
+#endif
+	*tag_p = tag;
+}
+
+#ifdef THOMAS_TURBO
+void rtllib_TURBO_Info(struct rtllib_device *ieee, u8 **tag_p) {
+	u8 *tag = *tag_p;
+
+        *tag++ = MFIE_TYPE_GENERIC; 
+        *tag++ = 7;
+        *tag++ = 0x00;
+        *tag++ = 0xe0;
+        *tag++ = 0x4c;
+        *tag++ = 0x01;
+        *tag++ = 0x02;
+        *tag++ = 0x11;
+	*tag++ = 0x00;
+
+	*tag_p = tag;
+	printk(KERN_ALERT "This is enable turbo mode IE process\n");
+}
+#endif
+
+void enqueue_mgmt(struct rtllib_device *ieee, struct sk_buff *skb)
+{
+	int nh;
+	nh = (ieee->mgmt_queue_head +1) % MGMT_QUEUE_NUM;
+			
+/*
+ * if the queue is full but we have newer frames then
+ * just overwrites the oldest.
+ *	
+ * if (nh == ieee->mgmt_queue_tail)
+ *		return -1;
+ */		
+	ieee->mgmt_queue_head = nh;
+	ieee->mgmt_queue_ring[nh] = skb;
+	
+}
+
+struct sk_buff *dequeue_mgmt(struct rtllib_device *ieee)
+{
+	struct sk_buff *ret;
+	
+	if(ieee->mgmt_queue_tail == ieee->mgmt_queue_head)
+		return NULL;
+		
+	ret = ieee->mgmt_queue_ring[ieee->mgmt_queue_tail];
+	
+	ieee->mgmt_queue_tail = 
+		(ieee->mgmt_queue_tail+1) % MGMT_QUEUE_NUM;
+	
+	return ret;
+}
+
+void init_mgmt_queue(struct rtllib_device *ieee)
+{
+	ieee->mgmt_queue_tail = ieee->mgmt_queue_head = 0;
+}
+
+
+u8
+MgntQuery_TxRateExcludeCCKRates(struct rtllib_device *ieee)
+{
+	u16	i;
+	u8	QueryRate = 0;
+	u8	BasicRate;
+
+	
+	for( i = 0; i < ieee->current_network.rates_len; i++)
+	{
+		BasicRate = ieee->current_network.rates[i]&0x7F;
+		if(!rtllib_is_cck_rate(BasicRate))
+		{
+			if(QueryRate == 0)
+			{
+				QueryRate = BasicRate;
+			}
+			else
+			{
+				if(BasicRate < QueryRate)
+				{
+					QueryRate = BasicRate;
+				}
+			}
+		}		
+	}
+
+	if(QueryRate == 0)
+	{
+		QueryRate = 12;	
+		printk("No BasicRate found!!\n");
+	}
+	return QueryRate;
+}
+
+u8 MgntQuery_MgntFrameTxRate(struct rtllib_device *ieee)
+{
+	PRT_HIGH_THROUGHPUT      pHTInfo = ieee->pHTInfo;
+	u8 rate;
+
+#if defined RTL8190P || defined RTL8192E || defined RTL8192U
+	if(pHTInfo->IOTAction & HT_IOT_ACT_MGNT_USE_CCK_6M)
+		rate = 0x0c;    
+	else
+		rate = ieee->basic_rate & 0x7f;
+#elif defined RTL8192SE || defined RTL8192SU || defined RTL8192CE
+	if(pHTInfo->IOTAction & HT_IOT_ACT_WA_IOT_Broadcom)
+	{
+		rate = MgntQuery_TxRateExcludeCCKRates(ieee);
+	}
+	else
+		rate = ieee->basic_rate & 0x7f;
+#endif
+
+	if(rate == 0){
+		if(ieee->mode == IEEE_A||
+		   ieee->mode== IEEE_N_5G||
+		   (ieee->mode== IEEE_N_24G&&!pHTInfo->bCurSuppCCK))
+			rate = 0x0c;
+		else
+			rate = 0x02;
+	}
+
+	/*
+	if( pMgntInfo->bScanInProgress || (pMgntInfo->bDualModeScanStep!=0) )
+	{
+	if(pMgntInfo->dot11CurrentWirelessMode==WIRELESS_MODE_A)
+	rate = 0x0c;
+	else
+	rate = 0x02;
+	}
+	 */
+	return rate;
+}
+
+
+void rtllib_sta_wakeup(struct rtllib_device *ieee, short nl);
+
+inline void softmac_mgmt_xmit(struct sk_buff *skb, struct rtllib_device *ieee)
+{
+	unsigned long flags;
+	short single = ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE;
+	struct rtllib_hdr_3addr  *header=
+		(struct rtllib_hdr_3addr  *) skb->data;
+
+	cb_desc *tcb_desc = (cb_desc *)(skb->cb + 8);
+	spin_lock_irqsave(&ieee->lock, flags);
+	
+	/* called with 2nd param 0, no mgmt lock required */
+	rtllib_sta_wakeup(ieee,0);
+	
+	tcb_desc->queue_index = MGNT_QUEUE;
+#ifdef RTL8192CE
+	tcb_desc->queue_index = MGNT_QUEUE;
+#endif
+
+	if(ieee->disable_mgnt_queue)
+		tcb_desc->queue_index = HIGH_QUEUE;
+	
+	tcb_desc->data_rate = MgntQuery_MgntFrameTxRate(ieee);	
+	tcb_desc->RATRIndex = 7;
+	tcb_desc->bTxDisableRateFallBack = 1;
+	tcb_desc->bTxUseDriverAssingedRate = 1;
+#ifdef _RTL8192_EXT_PATCH_
+	tcb_desc->macId = 0;
+#endif	
+	if(single){
+		if(ieee->queue_stop){
+			enqueue_mgmt(ieee,skb);
+		}else{
+			header->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0]<<4);
+
+			if (ieee->seq_ctrl[0] == 0xFFF)
+				ieee->seq_ctrl[0] = 0;
+			else
+				ieee->seq_ctrl[0]++;
+			
+			/* avoid watchdog triggers */
+			ieee->softmac_data_hard_start_xmit(skb,ieee->dev,ieee->basic_rate);
+		}
+		
+		spin_unlock_irqrestore(&ieee->lock, flags);
+	}else{
+		spin_unlock_irqrestore(&ieee->lock, flags);
+		spin_lock_irqsave(&ieee->mgmt_tx_lock, flags);
+
+		header->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
+
+		if (ieee->seq_ctrl[0] == 0xFFF)
+			ieee->seq_ctrl[0] = 0;
+		else
+			ieee->seq_ctrl[0]++;
+
+		/* check wether the managed packet queued greater than 5 */
+		if(!ieee->check_nic_enough_desc(ieee->dev,tcb_desc->queue_index)||\
+				(skb_queue_len(&ieee->skb_waitQ[tcb_desc->queue_index]) != 0)||\
+				(ieee->queue_stop) ) {
+			/* insert the skb packet to the management queue */
+			/* as for the completion function, it does not need 
+			 * to check it any more.
+			 * */
+			printk("%s():insert to waitqueue, queue_index:%d!\n",__FUNCTION__,tcb_desc->queue_index);
+			skb_queue_tail(&ieee->skb_waitQ[tcb_desc->queue_index], skb);
+		} else {
+			ieee->softmac_hard_start_xmit(skb,ieee->dev);
+		}
+		spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags);
+	}
+}
+
+inline void softmac_ps_mgmt_xmit(struct sk_buff *skb, 
+		struct rtllib_device *ieee)
+{
+	short single = ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE;
+	struct rtllib_hdr_3addr  *header =
+		(struct rtllib_hdr_3addr  *) skb->data;
+	u16 fc,type,stype;
+	cb_desc *tcb_desc = (cb_desc *)(skb->cb + 8);
+
+	fc = header->frame_ctl;
+	type = WLAN_FC_GET_TYPE(fc);
+	stype = WLAN_FC_GET_STYPE(fc);
+
+
+	if(stype != RTLLIB_STYPE_PSPOLL) 
+		tcb_desc->queue_index = MGNT_QUEUE;
+	else
+		tcb_desc->queue_index = HIGH_QUEUE;
+
+	if(ieee->disable_mgnt_queue)
+		tcb_desc->queue_index = HIGH_QUEUE;
+		
+#ifdef RTL8192CE
+	tcb_desc->queue_index = MGNT_QUEUE;
+#endif
+
+	tcb_desc->data_rate = MgntQuery_MgntFrameTxRate(ieee);
+	tcb_desc->RATRIndex = 7;
+	tcb_desc->bTxDisableRateFallBack = 1;
+	tcb_desc->bTxUseDriverAssingedRate = 1;
+	if (single) {
+		if (type != RTLLIB_FTYPE_CTL) {
+			header->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
+
+			if (ieee->seq_ctrl[0] == 0xFFF)
+				ieee->seq_ctrl[0] = 0;
+			else
+				ieee->seq_ctrl[0]++;
+
+		}
+		/* avoid watchdog triggers */
+		ieee->softmac_data_hard_start_xmit(skb,ieee->dev,ieee->basic_rate);
+
+	} else {
+		if (type != RTLLIB_FTYPE_CTL) {
+			header->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
+
+			if (ieee->seq_ctrl[0] == 0xFFF)
+				ieee->seq_ctrl[0] = 0;
+			else
+				ieee->seq_ctrl[0]++;
+		}
+		ieee->softmac_hard_start_xmit(skb,ieee->dev);
+
+	}
+}
+
+inline struct sk_buff *rtllib_probe_req(struct rtllib_device *ieee)
+{
+	unsigned int len,rate_len;
+	u8 *tag;
+	struct sk_buff *skb;
+	struct rtllib_probe_request *req;
+	
+#ifdef _RTL8192_EXT_PATCH_
+	short extMore = 0;
+	if(ieee->ext_patch_rtllib_probe_req_1)
+		extMore = ieee->ext_patch_rtllib_probe_req_1(ieee);
+#endif
+
+	len = ieee->current_network.ssid_len;
+	
+	rate_len = rtllib_MFIE_rate_len(ieee);
+	
+#ifdef _RTL8192_EXT_PATCH_
+	if(!extMore)
+		skb = dev_alloc_skb(sizeof(struct rtllib_probe_request) +
+			    2 + len + rate_len + ieee->tx_headroom);
+	else
+		skb = dev_alloc_skb(sizeof(struct rtllib_probe_request) +
+			    2 + len + rate_len+128+ieee->tx_headroom); 
+#else
+#ifdef USB_USE_ALIGNMENT
+        u32 Tmpaddr;
+        int alignment;
+        skb = dev_alloc_skb(sizeof(struct rtllib_probe_request) +
+                            2 + len + rate_len + ieee->tx_headroom + USB_512B_ALIGNMENT_SIZE);
+#else	
+	skb = dev_alloc_skb(sizeof(struct rtllib_probe_request) +
+			    2 + len + rate_len + ieee->tx_headroom);
+#endif
+#endif
+
+	if (!skb) 
+		return NULL;
+
+#ifdef USB_USE_ALIGNMENT
+        Tmpaddr = (u32)skb->data;
+        alignment = Tmpaddr & 0x1ff;
+        skb_reserve(skb,(USB_512B_ALIGNMENT_SIZE - alignment));
+#endif
+	
+	skb_reserve(skb, ieee->tx_headroom);
+	
+	req = (struct rtllib_probe_request *) skb_put(skb,sizeof(struct rtllib_probe_request));
+	req->header.frame_ctl = cpu_to_le16(RTLLIB_STYPE_PROBE_REQ);
+	req->header.duration_id = 0; 
+	
+	memset(req->header.addr1, 0xff, ETH_ALEN);
+	memcpy(req->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
+	memset(req->header.addr3, 0xff, ETH_ALEN);
+	
+	tag = (u8 *) skb_put(skb,len+2+rate_len);
+	
+	*tag++ = MFIE_TYPE_SSID;
+	*tag++ = len;
+	memcpy(tag, ieee->current_network.ssid, len);
+	tag += len;
+	
+	rtllib_MFIE_Brate(ieee,&tag);
+	rtllib_MFIE_Grate(ieee,&tag);
+
+#ifdef _RTL8192_EXT_PATCH_
+	if(extMore)
+		ieee->ext_patch_rtllib_probe_req_2(ieee, skb, tag);
+#endif
+
+	return skb;
+}
+
+struct sk_buff *rtllib_get_beacon_(struct rtllib_device *ieee);
+
+#ifdef _RTL8192_EXT_PATCH_
+void ext_rtllib_send_beacon_wq(void *data)
+{
+	struct rtllib_device *ieee = (struct rtllib_device *)container_of_work_rsl((struct work_struct *)data, struct rtllib_device, ext_send_beacon_wq);
+	struct sk_buff *skb;
+	
+	skb = rtllib_get_beacon_(ieee);
+
+	if (skb){
+		softmac_mgmt_xmit(skb, ieee);
+		ieee->softmac_stats.tx_beacons++;
+	}
+	
+
+	
+}
+#endif
+void rtllib_send_beacon(struct rtllib_device *ieee)
+{
+	struct sk_buff *skb;
+	if(!ieee->ieee_up)
+		return;		
+	skb = rtllib_get_beacon_(ieee);
+	
+	if (skb){
+		softmac_mgmt_xmit(skb, ieee);
+		ieee->softmac_stats.tx_beacons++;
+	}
+	
+	if(ieee->beacon_txing && ieee->ieee_up){
+		mod_timer(&ieee->beacon_timer,jiffies+(MSECS(ieee->current_network.beacon_interval-5)));
+	}
+}
+
+
+void rtllib_send_beacon_cb(unsigned long _ieee)
+{
+	struct rtllib_device *ieee =
+		(struct rtllib_device *) _ieee;
+	unsigned long flags;
+
+	spin_lock_irqsave(&ieee->beacon_lock, flags);
+	rtllib_send_beacon(ieee);
+	spin_unlock_irqrestore(&ieee->beacon_lock, flags);
+}
+
+#ifdef _RTL8192_EXT_PATCH_
+
+inline struct sk_buff *rtllib_probe_req_with_SSID(struct rtllib_device *ieee, char *ssid, int len_ssid)
+{
+	unsigned int len,rate_len;
+	u8 *tag;
+	struct sk_buff *skb;
+	struct rtllib_probe_request *req;
+	
+#ifdef _RTL8192_EXT_PATCH_
+	short extMore = 0;
+	if(ieee->ext_patch_rtllib_probe_req_1)
+		extMore = ieee->ext_patch_rtllib_probe_req_1(ieee);
+#endif
+
+	len = len_ssid;
+	
+	rate_len = rtllib_MFIE_rate_len(ieee);
+	
+#ifdef _RTL8192_EXT_PATCH_
+	if(!extMore)
+#endif
+		skb = dev_alloc_skb(sizeof(struct rtllib_probe_request) +
+			    2 + len + rate_len + ieee->tx_headroom);
+#ifdef _RTL8192_EXT_PATCH_
+	else
+		skb = dev_alloc_skb(sizeof(struct rtllib_probe_request) +
+			    2 + len + rate_len+128+ieee->tx_headroom); 
+#endif
+	
+	if (!skb) 
+		return NULL;
+	
+	req = (struct rtllib_probe_request *) skb_put(skb,sizeof(struct rtllib_probe_request));
+	req->header.frame_ctl = cpu_to_le16(RTLLIB_STYPE_PROBE_REQ);
+	req->header.duration_id = 0; 
+	
+	memset(req->header.addr1, 0xff, ETH_ALEN);
+	memcpy(req->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
+	memset(req->header.addr3, 0xff, ETH_ALEN);
+	
+	tag = (u8 *) skb_put(skb,len+2+rate_len);
+	
+	*tag++ = MFIE_TYPE_SSID;
+	*tag++ = len;
+	if(len)
+	{
+		memcpy(tag, ssid, len);
+		tag += len;
+	}
+	
+	rtllib_MFIE_Brate(ieee,&tag);
+	rtllib_MFIE_Grate(ieee,&tag);
+	
+#ifdef _RTL8192_EXT_PATCH_
+	if(extMore)
+		ieee->ext_patch_rtllib_probe_req_2(ieee, skb, tag);
+#endif
+	return skb;
+}
+
+#endif 
+
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
+void rtllib_ibss_wait_timeout(unsigned long _ieee)
+{
+	struct rtllib_device *ieee =
+		(struct rtllib_device *) _ieee;
+	printk("======>%s():oh oh ibss wait beacon time out, search a new ibss now\n",__FUNCTION__);	
+	rtllib_stop_send_beacons(ieee);
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)	
+	cancel_delayed_work(&ieee->start_ibss_wq);
+	cancel_delayed_work(&ieee->link_change_wq);
+#endif	
+	rtllib_stop_scan(ieee);
+	queue_delayed_work_rsl(ieee->wq, &ieee->start_ibss_wq, MSECS(150)); 
+}
+#endif
+
+
+/*
+ * Description:
+ *              Enable network monitor mode, all rx packets will be received.
+ */
+void rtllib_EnableNetMonitorMode(struct net_device* dev,
+                bool bInitState)
+{
+        struct rtllib_device* ieee = netdev_priv_rsl(dev);
+
+        printk("========>Enter Monitor Mode\n");
+
+        ieee->AllowAllDestAddrHandler(dev, true, !bInitState);
+}
+
+
+/*
+ *      Description:
+ *              Disable network network monitor mode, only packets destinated to
+ *              us will be received.
+ */
+void rtllib_DisableNetMonitorMode(struct net_device* dev,
+                bool bInitState)
+{
+	struct rtllib_device* ieee = netdev_priv_rsl(dev);
+
+        printk("========>Exit Monitor Mode\n");
+
+        ieee->AllowAllDestAddrHandler(dev, false, !bInitState);
+}
+
+
+/*
+ * Description:
+ *              This enables the specialized promiscuous mode required by Intel.
+ *              In this mode, Intel intends to hear traffics from/to other STAs in the same BSS.
+ *              Therefore we don't have to disable checking BSSID and we only need to allow all dest.
+ *              BUT: if we enable checking BSSID then we can't recv packets from other STA.
+ */
+void rtllib_EnableIntelPromiscuousMode(struct net_device* dev,
+                bool bInitState)
+{
+        bool bFilterOutNonAssociatedBSSID = false;
+
+	struct rtllib_device* ieee = netdev_priv_rsl(dev);
+
+        printk("========>Enter Intel Promiscuous Mode\n");
+
+        ieee->AllowAllDestAddrHandler(dev, true, !bInitState);
+        ieee->SetHwRegHandler(dev, HW_VAR_CECHK_BSSID, (u8*)&bFilterOutNonAssociatedBSSID);
+
+        ieee->bNetPromiscuousMode = true;
+}
+
+
+/*
+ * Description:
+ *              This disables the specialized promiscuous mode required by Intel.
+ *              See MgntEnableIntelPromiscuousMode for detail.
+ */
+void rtllib_DisableIntelPromiscuousMode(struct net_device* dev,
+                bool bInitState)
+{
+        bool bFilterOutNonAssociatedBSSID = true;
+
+	struct rtllib_device* ieee = netdev_priv_rsl(dev);
+
+        printk("========>Exit Intel Promiscuous Mode\n");
+
+        ieee->AllowAllDestAddrHandler(dev, false, !bInitState);
+        ieee->SetHwRegHandler(dev, HW_VAR_CECHK_BSSID, (u8*)&bFilterOutNonAssociatedBSSID);
+
+        ieee->bNetPromiscuousMode = false;
+}
+
+
+#ifdef _RTL8192_EXT_PATCH_
+void rtllib_send_probe(struct rtllib_device *ieee, u8 is_mesh)
+#else
+void rtllib_send_probe(struct rtllib_device *ieee)
+#endif
+{
+	struct sk_buff *skb;
+#ifdef _RTL8192_EXT_PATCH_
+	if(is_mesh) 
+		skb = rtllib_probe_req_with_SSID(ieee, NULL, 0);
+	else
+#endif
+	skb = rtllib_probe_req(ieee);
+	if (skb){
+		softmac_mgmt_xmit(skb, ieee);
+		ieee->softmac_stats.tx_probe_rq++;
+	}
+}
+
+#ifdef _RTL8192_EXT_PATCH_
+void rtllib_send_probe_requests(struct rtllib_device *ieee, u8 is_mesh)
+{
+	if (ieee->active_scan && (ieee->softmac_features & IEEE_SOFTMAC_PROBERQ)){
+		rtllib_send_probe(ieee,is_mesh);
+		rtllib_send_probe(ieee,is_mesh);
+	}
+}
+#else
+void rtllib_send_probe_requests(struct rtllib_device *ieee)
+{
+	if (ieee->active_scan && (ieee->softmac_features & IEEE_SOFTMAC_PROBERQ)){
+		rtllib_send_probe(ieee);
+		rtllib_send_probe(ieee);
+	}
+}
+#endif
+
+void rtllib_softmac_hint11d_wq(void *data)
+{
+#ifdef CONFIG_CRDA 
+	struct rtllib_device *ieee = container_of_dwork_rsl(data, struct rtllib_device, softmac_hint11d_wq);
+	PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(ieee);
+	struct wireless_dev *wdev = &ieee->wdev;
+
+   	regulatory_hint_11d(wdev->wiphy, pDot11dInfo->CountryIeBuf, pDot11dInfo->CountryIeLen);
+#endif
+}
+
+void rtllib_update_active_chan_map(struct rtllib_device *ieee)
+{
+#ifdef ENABLE_DOT11D
+	memcpy(ieee->active_channel_map, GET_DOT11D_INFO(ieee)->channel_map, MAX_CHANNEL_NUMBER+1);
+#else
+	memcpy(ieee->active_channel_map, ieee->channel_map, MAX_CHANNEL_NUMBER+1);
+#endif
+#if 0
+	{
+		int i;
+		for(i=1;i<=14;i++)
+			printk("%d ", ieee->active_channel_map[i]);
+		printk("\n");
+	}
+#endif
+}
+
+/* this performs syncro scan blocking the caller until all channels
+ * in the allowed channel map has been checked. 
+ */
+void rtllib_softmac_scan_syncro(struct rtllib_device *ieee, u8 is_mesh)
+{
+	short ch = 0;
+
+	rtllib_update_active_chan_map(ieee);
+
+	ieee->be_scan_inprogress = true;
+
+	down(&ieee->scan_sem);
+	
+	while(1)
+	{
+		
+		do {
+			ch++;
+			if (ch > MAX_CHANNEL_NUMBER) 
+				goto out; /* scan completed */
+		} while(!ieee->active_channel_map[ch]);
+	
+		/* this fuction can be called in two situations
+		 * 1- We have switched to ad-hoc mode and we are
+		 *    performing a complete syncro scan before conclude
+		 *    there are no interesting cell and to create a 
+		 *    new one. In this case the link state is 
+		 *    RTLLIB_NOLINK until we found an interesting cell.
+		 *    If so the ieee8021_new_net, called by the RX path
+		 *    will set the state to RTLLIB_LINKED, so we stop
+		 *    scanning
+		 * 2- We are linked and the root uses run iwlist scan.
+		 *    So we switch to RTLLIB_LINKED_SCANNING to remember
+		 *    that we are still logically linked (not interested in
+		 *    new network events, despite for updating the net list,
+		 *    but we are temporarly 'unlinked' as the driver shall
+		 *    not filter RX frames and the channel is changing.
+		 * So the only situation in witch are interested is to check
+		 * if the state become LINKED because of the #1 situation
+		 */    
+		    
+		if (ieee->state == RTLLIB_LINKED)
+			goto out;
+		if (ieee->sync_scan_hurryup){
+			printk("============>sync_scan_hurryup out\n");
+			goto out;
+		}
+
+		ieee->set_chan(ieee->dev, ch);
+		if(ieee->active_channel_map[ch] == 1)
+#ifdef _RTL8192_EXT_PATCH_
+		rtllib_send_probe_requests(ieee, is_mesh);
+#else
+		rtllib_send_probe_requests(ieee);
+#endif
+		
+		/* this prevent excessive time wait when we
+		 * need to wait for a syncro scan to end..
+		 */  		
+		msleep_interruptible_rsl(RTLLIB_SOFTMAC_SCAN_TIME);
+	}
+out:
+	ieee->actscanning = false;
+	ieee->sync_scan_hurryup = 0;
+
+	if(ieee->state >= RTLLIB_LINKED){
+#ifdef ENABLE_DOT11D
+		if(IS_DOT11D_ENABLE(ieee))
+			DOT11D_ScanComplete(ieee);
+#endif	
+	}
+	up(&ieee->scan_sem);
+	
+	ieee->be_scan_inprogress = false;
+
+#ifndef FOR_MOBLIN
+	{
+	union iwreq_data wrqu;
+	memset(&wrqu, 0, sizeof(wrqu));
+	wireless_send_event(ieee->dev,SIOCGIWSCAN,&wrqu,NULL);
+	}
+#endif
+}
+
+void rtllib_softmac_scan_wq(void *data)
+{
+	struct rtllib_device *ieee = container_of_dwork_rsl(data, struct rtllib_device, softmac_scan_wq);
+
+#ifndef _RTL8192_EXT_PATCH_
+	u8 last_channel = ieee->current_network.channel; 
+#endif
+	rtllib_update_active_chan_map(ieee);
+
+	if(!ieee->ieee_up)
+		return;	
+	if(rtllib_act_scanning(ieee,true) == true)
+		return;
+
+	down(&ieee->scan_sem);
+
+	if(ieee->eRFPowerState == eRfOff)
+	{
+		printk("======>%s():rf state is eRfOff, return\n",__FUNCTION__);
+		goto out1;
+	}
+
+	do{
+		ieee->current_network.channel = 
+			(ieee->current_network.channel + 1) % MAX_CHANNEL_NUMBER;
+		if (ieee->scan_watch_dog++ > MAX_CHANNEL_NUMBER) 
+		{
+			if (!ieee->active_channel_map[ieee->current_network.channel])
+				ieee->current_network.channel = 6;
+			goto out; /* no good chans */
+		}
+	} while(!ieee->active_channel_map[ieee->current_network.channel]);
+
+	if (ieee->scanning_continue == 0 )
+		goto out;
+
+	ieee->set_chan(ieee->dev, ieee->current_network.channel);
+
+	if(ieee->active_channel_map[ieee->current_network.channel] == 1)
+#ifdef _RTL8192_EXT_PATCH_
+	rtllib_send_probe_requests(ieee, 0);
+#else
+	rtllib_send_probe_requests(ieee);
+#endif				
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,40)
+	queue_delayed_work_rsl(ieee->wq, &ieee->softmac_scan_wq, MSECS(RTLLIB_SOFTMAC_SCAN_TIME));
+#else
+	if (ieee->scanning_continue == 1) 
+		mod_timer(&ieee->scan_timer,(jiffies + MSECS(RTLLIB_SOFTMAC_SCAN_TIME)));
+#endif
+
+	up(&ieee->scan_sem);
+	return;
+	
+out:
+#ifdef ENABLE_DOT11D
+	if(IS_DOT11D_ENABLE(ieee))
+		DOT11D_ScanComplete(ieee);
+#endif	
+#ifdef _RTL8192_EXT_PATCH_
+	ieee->current_network.channel = ieee->backup_channel;
+	ieee->set_chan(ieee->dev, ieee->current_network.channel);
+#else
+	ieee->current_network.channel = last_channel;
+#endif
+
+out1:
+	ieee->actscanning = false;
+	ieee->scan_watch_dog = 0;
+	ieee->scanning_continue = 0;
+	up(&ieee->scan_sem);
+}
+
+
+
+void rtllib_beacons_start(struct rtllib_device *ieee)
+{
+	unsigned long flags;	
+	spin_lock_irqsave(&ieee->beacon_lock,flags);
+
+	ieee->beacon_txing = 1;
+	rtllib_send_beacon(ieee);
+	
+	spin_unlock_irqrestore(&ieee->beacon_lock,flags);
+}
+
+void rtllib_beacons_stop(struct rtllib_device *ieee)
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&ieee->beacon_lock,flags);
+
+	ieee->beacon_txing = 0;
+ 	del_timer_sync(&ieee->beacon_timer);
+
+	spin_unlock_irqrestore(&ieee->beacon_lock,flags);
+
+}
+
+
+void rtllib_stop_send_beacons(struct rtllib_device *ieee)
+{
+	if(ieee->stop_send_beacons)
+		ieee->stop_send_beacons(ieee->dev);
+	if (ieee->softmac_features & IEEE_SOFTMAC_BEACONS)
+		rtllib_beacons_stop(ieee);
+}
+
+
+void rtllib_start_send_beacons(struct rtllib_device *ieee)
+{
+	if(ieee->start_send_beacons)
+		ieee->start_send_beacons(ieee->dev);
+	if(ieee->softmac_features & IEEE_SOFTMAC_BEACONS)
+		rtllib_beacons_start(ieee); 
+}
+
+
+void rtllib_softmac_stop_scan(struct rtllib_device *ieee)
+{
+	
+	
+	down(&ieee->scan_sem);
+	ieee->scan_watch_dog = 0;
+	if (ieee->scanning_continue == 1){
+		ieee->scanning_continue = 0;
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,40)
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,67)
+		cancel_delayed_work(&ieee->softmac_scan_wq);
+#endif
+#else
+		del_timer_sync(&ieee->scan_timer);
+#endif
+	}
+	
+	up(&ieee->scan_sem);
+}
+
+void rtllib_stop_scan(struct rtllib_device *ieee)
+{
+	if (ieee->softmac_features & IEEE_SOFTMAC_SCAN){
+		rtllib_softmac_stop_scan(ieee);
+	}else{
+		if(ieee->rtllib_stop_hw_scan)
+			ieee->rtllib_stop_hw_scan(ieee->dev);
+	}
+}
+
+void rtllib_stop_scan_syncro(struct rtllib_device *ieee)
+{
+	if (ieee->softmac_features & IEEE_SOFTMAC_SCAN){
+			ieee->sync_scan_hurryup = 1;
+	}else{
+		if(ieee->rtllib_stop_hw_scan)
+			ieee->rtllib_stop_hw_scan(ieee->dev);
+	}
+}
+
+bool rtllib_act_scanning(struct rtllib_device *ieee, bool sync_scan)
+{
+	if (ieee->softmac_features & IEEE_SOFTMAC_SCAN){
+		if(sync_scan){ 
+			return ieee->be_scan_inprogress;
+		}else{
+			return (ieee->actscanning ||ieee->be_scan_inprogress);
+		}
+	}else{
+		return test_bit(STATUS_SCANNING, &ieee->status);
+	}
+}
+
+/* called with ieee->lock held */
+void rtllib_start_scan(struct rtllib_device *ieee)
+{
+	printk("===>%s()\n",__FUNCTION__);
+#ifdef ENABLE_IPS
+	if(ieee->rtllib_ips_leave_wq != NULL)
+	ieee->rtllib_ips_leave_wq(ieee->dev);
+#endif
+
+
+#ifdef ENABLE_DOT11D
+	if(IS_DOT11D_ENABLE(ieee) )
+	{			
+		if(IS_COUNTRY_IE_VALID(ieee))
+		{
+			RESET_CIE_WATCHDOG(ieee); 
+		}
+	}
+#endif
+	if (ieee->softmac_features & IEEE_SOFTMAC_SCAN){	
+		if (ieee->scanning_continue == 0){
+			ieee->actscanning = true;
+			ieee->scanning_continue = 1;
+#ifdef _RTL8192_EXT_PATCH_
+			ieee->backup_channel = ieee->current_network.channel;
+			printk("===>backup_channel is %d\n",ieee->backup_channel);
+#endif
+			queue_delayed_work_rsl(ieee->wq, &ieee->softmac_scan_wq, 0);
+		}
+	}else{
+		if(ieee->rtllib_start_hw_scan)
+			ieee->rtllib_start_hw_scan(ieee->dev);
+	}
+	
+}
+
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,40)	
+void rtllib_softmac_scan_cb(unsigned long _dev)
+{
+	unsigned long flags;
+	struct rtllib_device *ieee = (struct rtllib_device *)_dev;
+	
+	spin_lock_irqsave(&ieee->lock, flags);
+	rtllib_start_scan(ieee);
+	spin_unlock_irqrestore(&ieee->lock, flags);
+}
+#endif
+
+/* called with wx_sem held */
+void rtllib_start_scan_syncro(struct rtllib_device *ieee, u8 is_mesh)
+{
+#ifdef ENABLE_DOT11D
+	if(IS_DOT11D_ENABLE(ieee) )
+	{			
+		if(IS_COUNTRY_IE_VALID(ieee))
+		{
+			RESET_CIE_WATCHDOG(ieee); 
+		}
+	}
+#endif
+	ieee->sync_scan_hurryup = 0;
+	if (ieee->softmac_features & IEEE_SOFTMAC_SCAN){
+		rtllib_softmac_scan_syncro(ieee, is_mesh);
+	}else{
+		if(ieee->rtllib_start_hw_scan)
+			ieee->rtllib_start_hw_scan(ieee->dev);
+	}
+		
+}
+
+#ifdef _RTL8192_EXT_PATCH_
+inline struct sk_buff *rtllib_authentication_req(struct rtllib_network *beacon, 
+	struct rtllib_device *ieee, int challengelen,u8 * daddr)
+#else
+inline struct sk_buff *rtllib_authentication_req(struct rtllib_network *beacon, 
+	struct rtllib_device *ieee, int challengelen)
+#endif
+{
+	struct sk_buff *skb;	
+	struct rtllib_authentication *auth;
+	int  len = 0;
+#ifdef _RTL8192_EXT_PATCH_
+	bool is_mesh = false;
+	is_mesh = ieee->ext_patch_rtllib_is_mesh(ieee,daddr);
+#endif
+#ifdef _RTL8192_EXT_PATCH_
+	if((ieee->mesh_sec_type == 1) && (ieee->mesh_security_setting == 3) && is_mesh){
+		skb = ieee->ext_patch_rtllib_send_ath_commit(ieee,daddr);
+		return skb;
+	}
+#endif
+	len = sizeof(struct rtllib_authentication) + challengelen + ieee->tx_headroom + 4;
+#ifdef USB_USE_ALIGNMENT
+        u32 Tmpaddr;
+        int alignment;
+        skb = dev_alloc_skb(len + USB_512B_ALIGNMENT_SIZE);
+#else
+	skb = dev_alloc_skb(len); 
+#endif
+
+	if (!skb) return NULL;
+	
+#ifdef USB_USE_ALIGNMENT
+        Tmpaddr = (u32)skb->data;
+        alignment = Tmpaddr & 0x1ff;
+        skb_reserve(skb,(USB_512B_ALIGNMENT_SIZE - alignment));
+#endif
+	
+	skb_reserve(skb, ieee->tx_headroom);
+	
+	auth = (struct rtllib_authentication *)
+		skb_put(skb, sizeof(struct rtllib_authentication));
+	
+	auth->header.frame_ctl = RTLLIB_STYPE_AUTH;
+	if (challengelen) auth->header.frame_ctl |= RTLLIB_FCTL_WEP;
+	
+	auth->header.duration_id = 0x013a; 
+#ifdef _RTL8192_EXT_PATCH_
+	if(is_mesh)
+		memcpy(auth->header.addr1,daddr,ETH_ALEN);
+	else
+#endif
+		memcpy(auth->header.addr1, beacon->bssid, ETH_ALEN);
+	memcpy(auth->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
+#ifdef _RTL8192_EXT_PATCH_
+	if(is_mesh)
+		memcpy(auth->header.addr3, ieee->current_mesh_network.bssid, ETH_ALEN); 
+	else
+		memcpy(auth->header.addr3, beacon->bssid, ETH_ALEN);
+#else
+	memcpy(auth->header.addr3, beacon->bssid, ETH_ALEN);
+#endif	
+	if(ieee->auth_mode == 0)
+		auth->algorithm = WLAN_AUTH_OPEN;
+	else if(ieee->auth_mode == 1)
+		auth->algorithm = WLAN_AUTH_SHARED_KEY;
+	else if(ieee->auth_mode == 2)
+		auth->algorithm = WLAN_AUTH_OPEN;
+	auth->transaction = cpu_to_le16(ieee->associate_seq);
+	ieee->associate_seq++;
+	
+	auth->status = cpu_to_le16(WLAN_STATUS_SUCCESS);
+	
+	return skb;
+	
+}
+
+void constructWMMIE(u8* wmmie, u8* wmm_len,u8 oui_subtype)
+{
+	u8	szQoSOUI[] ={221, 0, 0x00, 0x50, 0xf2, 0x02, 0, 1};
+	
+	if (oui_subtype == OUI_SUBTYPE_QOS_CAPABI)
+	{
+		szQoSOUI[0] = 46;
+		szQoSOUI[1] = *wmm_len;
+		memcpy(wmmie,szQoSOUI,3);
+		*wmm_len = 3;
+	}	
+	else
+	{
+		szQoSOUI[1] = *wmm_len + 6;
+		szQoSOUI[6] = oui_subtype;
+		memcpy(wmmie, szQoSOUI, 8);
+		*(wmmie+8) = 0;
+		*wmm_len = 9;
+	}	
+}
+
+static struct sk_buff* rtllib_probe_resp(struct rtllib_device *ieee, u8 *dest)
+{
+	u8 *tag;
+	int beacon_size;
+	struct rtllib_probe_response *beacon_buf;
+	struct sk_buff *skb = NULL;
+	int encrypt;
+	int atim_len,erp_len;
+	struct rtllib_crypt_data* crypt;
+	
+	char *ssid = ieee->current_network.ssid;
+	int ssid_len = ieee->current_network.ssid_len;
+	int rate_len = ieee->current_network.rates_len+2;
+	int rate_ex_len = ieee->current_network.rates_ex_len;
+	int wpa_ie_len = ieee->wpa_ie_len;
+	u8 erpinfo_content = 0;
+
+	u8* tmp_ht_cap_buf=NULL;
+	u8 tmp_ht_cap_len=0;
+	u8* tmp_ht_info_buf=NULL;
+	u8 tmp_ht_info_len=0;
+	PRT_HIGH_THROUGHPUT	pHTInfo = ieee->pHTInfo;
+	u8* tmp_generic_ie_buf=NULL;
+	u8 tmp_generic_ie_len=0;
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
+	u8 wmmie[9] = {0};
+	u8 wmm_len = 0;
+#endif
+#ifdef RTL8192S_WAPI_SUPPORT
+	PRT_WAPI_T pWapiInfo = &(ieee->wapiInfo);
+	u8 pWapiIELen = 0;
+#endif
+	if(rate_ex_len > 0) rate_ex_len+=2;
+	
+	if(ieee->current_network.capability & WLAN_CAPABILITY_IBSS)
+		atim_len = 4;
+	else
+		atim_len = 0;
+	
+#if 0
+	if(rtllib_is_54g(&ieee->current_network)) 
+		erp_len = 3;
+	else
+		erp_len = 0;
+#else
+      if((ieee->current_network.mode == IEEE_G) 
+	  	||( ieee->current_network.mode == IEEE_N_24G && ieee->pHTInfo->bCurSuppCCK)) {
+	  	erp_len = 3;
+		erpinfo_content = 0;
+		if(ieee->current_network.buseprotection)
+			erpinfo_content |= ERP_UseProtection;
+      	}
+	else
+		erp_len = 0;
+#endif
+
+#ifdef _RTL8192_EXT_PATCH_
+	crypt = ieee->sta_crypt[ieee->tx_keyidx];
+#else
+	crypt = ieee->crypt[ieee->tx_keyidx];
+#endif	
+	encrypt = ieee->host_encrypt && crypt && crypt->ops && 
+		((0 == strcmp(crypt->ops->name, "WEP") || wpa_ie_len));
+#if 1	
+	if(ieee->pHTInfo->bCurrentHTSupport){
+		tmp_ht_cap_buf =(u8*) &(ieee->pHTInfo->SelfHTCap);
+		tmp_ht_cap_len = sizeof(ieee->pHTInfo->SelfHTCap);
+		tmp_ht_info_buf =(u8*) &(ieee->pHTInfo->SelfHTInfo);
+		tmp_ht_info_len = sizeof(ieee->pHTInfo->SelfHTInfo);
+#ifdef _RTL8192_EXT_PATCH_
+		HTConstructCapabilityElement(ieee, tmp_ht_cap_buf, &tmp_ht_cap_len,encrypt, 1);
+#else
+		HTConstructCapabilityElement(ieee, tmp_ht_cap_buf, &tmp_ht_cap_len,encrypt);
+#endif	
+		HTConstructInfoElement(ieee,tmp_ht_info_buf,&tmp_ht_info_len, encrypt);
+		
+
+		if(pHTInfo->bRegRT2RTAggregation)
+		{
+			tmp_generic_ie_buf = ieee->pHTInfo->szRT2RTAggBuffer;
+			tmp_generic_ie_len = sizeof(ieee->pHTInfo->szRT2RTAggBuffer);
+			HTConstructRT2RTAggElement(ieee, tmp_generic_ie_buf, &tmp_generic_ie_len);
+		}
+	}
+#endif
+
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
+	if(ieee->iw_mode == IW_MODE_ADHOC){
+		if(ieee->current_network.qos_data.supported){
+			wmm_len = 1;
+			constructWMMIE(wmmie,&wmm_len,OUI_SUBTYPE_WMM_INFO);
+		}else{
+			wmm_len = 0;
+		}
+	}
+#endif
+#ifdef RTL8192S_WAPI_SUPPORT
+	if(ieee->WapiSupport && pWapiInfo->bWapiEnable)
+	{
+		WapiSetIE(ieee);
+		pWapiIELen = pWapiInfo->wapiIELength;
+	}
+#endif
+	beacon_size = sizeof(struct rtllib_probe_response)+2+
+		ssid_len
+		+3 
+		+rate_len
+		+rate_ex_len
+		+atim_len
+		+erp_len
+		+wpa_ie_len
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
+		+tmp_ht_cap_len
+		+tmp_ht_info_len
+		+tmp_generic_ie_len
+		+wmm_len
+#endif
+#ifdef RTL8192S_WAPI_SUPPORT
+		+pWapiIELen+2
+#endif
+		+ieee->tx_headroom;
+#ifdef USB_USE_ALIGNMENT        
+        u32 Tmpaddr=0;
+        int alignment=0;
+        skb = dev_alloc_skb(beacon_size + USB_512B_ALIGNMENT_SIZE);
+#else
+	skb = dev_alloc_skb(beacon_size);
+#endif
+	if (!skb) 
+		return NULL;
+
+#ifdef USB_USE_ALIGNMENT
+        Tmpaddr = (u32)skb->data;
+        alignment = Tmpaddr & 0x1ff;
+        skb_reserve(skb,(USB_512B_ALIGNMENT_SIZE - alignment));
+#endif
+	
+	skb_reserve(skb, ieee->tx_headroom);
+	
+	beacon_buf = (struct rtllib_probe_response*) skb_put(skb, (beacon_size - ieee->tx_headroom));
+	memcpy (beacon_buf->header.addr1, dest,ETH_ALEN);
+	memcpy (beacon_buf->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
+	memcpy (beacon_buf->header.addr3, ieee->current_network.bssid, ETH_ALEN);
+
+	beacon_buf->header.duration_id = 0; 
+	beacon_buf->beacon_interval = 
+		cpu_to_le16(ieee->current_network.beacon_interval);
+	beacon_buf->capability = 
+		cpu_to_le16(ieee->current_network.capability & WLAN_CAPABILITY_IBSS);
+	beacon_buf->capability |= 
+		cpu_to_le16(ieee->current_network.capability & WLAN_CAPABILITY_SHORT_PREAMBLE); 
+
+	if(ieee->short_slot && (ieee->current_network.capability & WLAN_CAPABILITY_SHORT_SLOT_TIME))
+		cpu_to_le16((beacon_buf->capability |= WLAN_CAPABILITY_SHORT_SLOT_TIME));		
+	
+#ifndef _RTL8192_EXT_PATCH_
+	crypt = ieee->crypt[ieee->tx_keyidx];
+#endif
+	if (encrypt)	
+		beacon_buf->capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
+	
+		
+	beacon_buf->header.frame_ctl = cpu_to_le16(RTLLIB_STYPE_PROBE_RESP);
+	beacon_buf->info_element[0].id = MFIE_TYPE_SSID;	
+	beacon_buf->info_element[0].len = ssid_len;
+	
+	tag = (u8*) beacon_buf->info_element[0].data;
+	
+	memcpy(tag, ssid, ssid_len);
+	
+	tag += ssid_len;
+	
+	*(tag++) = MFIE_TYPE_RATES;
+	*(tag++) = rate_len-2; 
+	memcpy(tag,ieee->current_network.rates,rate_len-2);
+	tag+=rate_len-2;
+	
+	*(tag++) = MFIE_TYPE_DS_SET;
+	*(tag++) = 1;
+	*(tag++) = ieee->current_network.channel;
+	
+	if(atim_len){
+	u16 val16;
+		*(tag++) = MFIE_TYPE_IBSS_SET;
+		*(tag++) = 2;
+		 val16 = cpu_to_le16(ieee->current_network.atim_window);
+		memcpy((u8 *)tag, (u8 *)&val16, 2);
+		tag+=2;
+	}
+	
+	if(erp_len){
+		*(tag++) = MFIE_TYPE_ERP;
+		*(tag++) = 1;
+		*(tag++) = erpinfo_content; 
+	}
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
+	if(tmp_ht_cap_len){
+		*(tag++) = MFIE_TYPE_HT_CAP;
+		*(tag++) = tmp_ht_cap_len - 2;
+		memcpy(tag, tmp_ht_cap_buf, tmp_ht_cap_len - 2);	
+		tag += tmp_ht_cap_len - 2;
+	}
+#endif
+	if(rate_ex_len){
+		*(tag++) = MFIE_TYPE_RATES_EX;
+		*(tag++) = rate_ex_len-2; 
+		memcpy(tag,ieee->current_network.rates_ex,rate_ex_len-2);
+		tag+=rate_ex_len-2;
+	}
+
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
+	if(tmp_ht_info_len){
+		*(tag++) = MFIE_TYPE_HT_INFO;
+		*(tag++) = tmp_ht_info_len - 2;
+		memcpy(tag, tmp_ht_info_buf, tmp_ht_info_len -2);
+		tag += tmp_ht_info_len - 2;
+	}
+#endif
+	
+	if (wpa_ie_len)
+	{	
+		if (ieee->iw_mode == IW_MODE_ADHOC)
+		{
+			memcpy(&ieee->wpa_ie[14], &ieee->wpa_ie[8], 4);
+		}
+		memcpy(tag, ieee->wpa_ie, ieee->wpa_ie_len);
+		tag += ieee->wpa_ie_len;
+	}
+
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
+	if(tmp_generic_ie_len)
+	{
+		(*tag++) = 0xdd;
+		(*tag++) = tmp_generic_ie_len - 2;
+		memcpy(tag,tmp_generic_ie_buf,tmp_generic_ie_len -2);
+		tag += tmp_generic_ie_len -2;
+		
+	}
+#endif
+
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
+	if(wmm_len) {
+		memcpy(tag,wmmie,wmm_len);
+		tag += wmm_len;
+	}
+#endif
+#ifdef RTL8192S_WAPI_SUPPORT
+	if(pWapiIELen)
+	{
+		*(tag++) = MFIE_TYPE_WAPI;
+		*(tag++) = pWapiIELen;
+		memcpy(tag, pWapiInfo->wapiIE, pWapiIELen);
+		tag += pWapiIELen;
+
+		pWapiInfo->sendbeaconWapiIE[0] = MFIE_TYPE_WAPI;
+		pWapiInfo->sendbeaconWapiIE[1] = pWapiIELen;
+		pWapiInfo->sendbeaconWapiIELength = pWapiIELen+2;
+		memcpy(pWapiInfo->sendbeaconWapiIE+2,  pWapiInfo->wapiIE, pWapiIELen);
+	}
+#endif
+	return skb;
+}
+
+#ifdef RTL8192S_WAPI_SUPPORT
+void ConstructWapiIEForInit(struct rtllib_device* ieee)
+{
+	PRT_WAPI_T pWapiInfo = &(ieee->wapiInfo);
+	u8 pWapiIELen = 0;
+
+	if(ieee->WapiSupport && pWapiInfo->bWapiEnable){
+		WapiSetIE(ieee);
+		pWapiIELen = pWapiInfo->wapiIELength;
+		if(pWapiIELen){
+			pWapiInfo->sendbeaconWapiIE[0] = MFIE_TYPE_WAPI;
+			pWapiInfo->sendbeaconWapiIE[1] = pWapiIELen;
+			pWapiInfo->sendbeaconWapiIELength = pWapiIELen+2;
+			memcpy(pWapiInfo->sendbeaconWapiIE+2,  pWapiInfo->wapiIE, pWapiIELen);
+		}
+	}
+}
+#endif
+
+#ifdef _RTL8192_EXT_PATCH_
+#ifdef COMPATIBLE_WITH_RALINK_MESH
+extern void ConstructRalinkHostNameIE(struct rtllib_device* ieee, 
+		u8* p_hostname_ie, u8* hostname_ie_len);
+#else
+extern void ConstructHostNameIE(struct rtllib_device* ieee, 
+		u8* hostname_ie, u8* hostname_ie_len);
+#endif
+struct sk_buff* rtllib_ext_probe_resp_by_net(struct rtllib_device *ieee, u8 *dest, struct rtllib_network *net)
+{
+	u8 *tag;
+	int beacon_size;
+	struct rtllib_probe_response *beacon_buf;
+	struct sk_buff *skb;
+	int encrypt;
+	int atim_len = 0,erp_len = 0;
+	struct rtllib_crypt_data* crypt;
+	u8 broadcast_addr[] = {0xff,0xff,0xff,0xff,0xff,0xff};
+	
+	char *ssid = net->ssid;
+	int ssid_len = net->ssid_len;
+
+	int rate_len = ieee->current_mesh_network.rates_len+2;
+	int rate_ex_len = ieee->current_mesh_network.rates_ex_len;
+	int wpa_ie_len = 0;
+	u8 erpinfo_content = 0;
+#if 0
+	u8* tmp_ht_cap_buf=NULL;
+	u8 tmp_ht_cap_len=0;
+	u8* tmp_ht_info_buf=NULL;
+	u8 tmp_ht_info_len=0;
+	PRT_HIGH_THROUGHPUT	pHTInfo = ieee->pHTInfo;
+	u8* tmp_generic_ie_buf=NULL;
+	u8 tmp_generic_ie_len=0;
+#endif
+	u8 wmmie[9] = {0};
+	u8 wmm_len = 0;
+	u8 hostname_ie_buf[MAX_HOST_NAME_LENGTH+4];
+	u8 hostname_ie_len=0;
+	if(rate_ex_len > 0) rate_ex_len+=2;
+	if( ieee->meshScanMode&4){
+		ieee->current_mesh_network.channel = ieee->ext_patch_rtllib_ext_stop_scan_wq_set_channel(ieee);
+		if(ieee->current_mesh_network.channel == 0)
+			ieee->current_mesh_network.channel = 1;
+	}
+	if( ieee->meshScanMode&6)
+	{
+		queue_work_rsl(ieee->wq, &ieee->ext_stop_scan_wq);
+	}	
+	if(ieee->current_mesh_network.capability & WLAN_CAPABILITY_IBSS) 
+		atim_len = 4;
+	else
+		atim_len = 0;
+	
+	
+	if((ieee->current_mesh_network.mode == IEEE_G) 
+	  	||( ieee->mode == IEEE_N_24G && ieee->pHTInfo->bCurSuppCCK)){ 
+		erp_len = 3;
+		erpinfo_content = 0;
+		if(ieee->bUseProtection)
+			erpinfo_content |= ERP_UseProtection;
+	}	
+	else
+		erp_len = 0;
+	
+	if ((IW_MODE_MESH==ieee->iw_mode))
+	{
+		wpa_ie_len = ieee->wpa_ie_len; 
+	}
+		
+	crypt = ieee->cryptlist[0]->crypt[ieee->mesh_txkeyidx];
+	
+	encrypt = ieee->host_encrypt && crypt && crypt->ops && 
+		((0 == strcmp(crypt->ops->name, "WEP")||wpa_ie_len));
+#if 0
+	if(ieee->pHTInfo->bCurrentHTSupport){
+		tmp_ht_cap_buf =(u8*) &(ieee->pHTInfo->SelfHTCap);
+		tmp_ht_cap_len = sizeof(ieee->pHTInfo->SelfHTCap);
+		tmp_ht_info_buf =(u8*) &(ieee->pHTInfo->SelfHTInfo);
+		tmp_ht_info_len = sizeof(ieee->pHTInfo->SelfHTInfo);
+		HTConstructCapabilityElement(ieee, tmp_ht_cap_buf, &tmp_ht_cap_len,encrypt, 1);
+		HTConstructInfoElement(ieee,tmp_ht_info_buf,&tmp_ht_info_len, encrypt);
+
+
+		if(pHTInfo->bRegRT2RTAggregation)
+		{
+			tmp_generic_ie_buf = ieee->pHTInfo->szRT2RTAggBuffer;
+			tmp_generic_ie_len = sizeof(ieee->pHTInfo->szRT2RTAggBuffer);
+			HTConstructRT2RTAggElement(ieee, tmp_generic_ie_buf, &tmp_generic_ie_len);
+		}
+	}
+#endif
+	{
+#ifdef COMPATIBLE_WITH_RALINK_MESH		
+		ConstructRalinkHostNameIE(ieee, hostname_ie_buf, &hostname_ie_len);
+#else
+		ConstructHostNameIE(ieee, hostname_ie_buf, &hostname_ie_len);
+#endif
+	}
+	if((ieee->iw_mode == IW_MODE_MESH) && (ieee->current_mesh_network.qos_data.supported == 1)){
+		wmm_len = 1;
+		constructWMMIE(wmmie,&wmm_len,OUI_SUBTYPE_WMM_INFO);
+	}
+	beacon_size = sizeof(struct rtllib_probe_response)+2+
+		ssid_len
+		+3 
+		+rate_len
+		+rate_ex_len
+		+atim_len
+		+erp_len
+		+wpa_ie_len
+#if 0
+		+tmp_ht_cap_len
+		+tmp_ht_info_len
+		+tmp_generic_ie_len
+#endif
+		+hostname_ie_len
+		+wmm_len
+		+ieee->tx_headroom;
+	skb = dev_alloc_skb(beacon_size+300); 
+	
+	if (!skb) 
+ 		return NULL;
+	skb_reserve(skb, ieee->tx_headroom);
+	beacon_buf = (struct rtllib_probe_response*) skb_put(skb, (beacon_size - ieee->tx_headroom));
+	
+	memcpy (beacon_buf->header.addr1, dest,ETH_ALEN);
+	memcpy (beacon_buf->header.addr2, ieee->meshdev->dev_addr, ETH_ALEN);
+	memcpy (beacon_buf->header.addr3, ieee->current_mesh_network.bssid, ETH_ALEN);
+
+	beacon_buf->header.duration_id = 0; 
+	
+	beacon_buf->beacon_interval = 
+		cpu_to_le16(ieee->current_mesh_network.beacon_interval);  
+	beacon_buf->capability = 
+		cpu_to_le16(ieee->current_mesh_network.capability & WLAN_CAPABILITY_IBSS);
+	
+	if(ieee->short_slot && (ieee->current_mesh_network.capability & WLAN_CAPABILITY_SHORT_SLOT_TIME))
+		cpu_to_le16((beacon_buf->capability |= WLAN_CAPABILITY_SHORT_SLOT_TIME));		
+
+	if (encrypt)	
+		beacon_buf->capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
+	
+		
+	beacon_buf->header.frame_ctl = cpu_to_le16(RTLLIB_STYPE_PROBE_RESP);
+	
+	beacon_buf->info_element[0].id = MFIE_TYPE_SSID;	
+	beacon_buf->info_element[0].len = ssid_len;
+	
+	tag = (u8*) beacon_buf->info_element[0].data;
+	
+	if(memcmp(dest, broadcast_addr, ETH_ALEN ))
+		memcpy(tag, ssid, ssid_len);	
+	else	
+		ssid_len=0;
+	
+	tag += ssid_len;
+	
+		
+	*(tag++) = MFIE_TYPE_RATES;
+	*(tag++) = rate_len-2; 
+	memcpy(tag,ieee->current_mesh_network.rates,rate_len-2);
+	tag+=rate_len-2;
+	
+	*(tag++) = MFIE_TYPE_DS_SET;
+	*(tag++) = 1;
+	*(tag++) = ieee->current_mesh_network.channel;  
+	
+	
+	if(atim_len){
+		u16 val16;
+		*(tag++) = MFIE_TYPE_IBSS_SET;
+		*(tag++) = 2;
+		 val16 = cpu_to_le16(ieee->current_mesh_network.atim_window);
+		memcpy((u8 *)tag, (u8 *)&val16, 2);
+		tag+=2;
+	}
+	
+	if(erp_len){
+		*(tag++) = MFIE_TYPE_ERP;
+		*(tag++) = 1;
+		*(tag++) = erpinfo_content; 
+	}
+#if 0	
+	if(tmp_ht_cap_len){
+	*(tag++) = MFIE_TYPE_HT_CAP;
+	*(tag++) = tmp_ht_cap_len - 2;
+	memcpy(tag, tmp_ht_cap_buf, tmp_ht_cap_len - 2);	
+	tag += tmp_ht_cap_len - 2;
+	}
+#endif
+
+	if(rate_ex_len){
+		*(tag++) = MFIE_TYPE_RATES_EX;
+		*(tag++) = rate_ex_len-2; 
+		memcpy(tag,ieee->current_mesh_network.rates_ex,rate_ex_len-2);
+		tag+=rate_ex_len-2;
+	}
+
+#if 0 
+	if(tmp_ht_info_len){
+	*(tag++) = MFIE_TYPE_HT_INFO;
+	*(tag++) = tmp_ht_info_len - 2;
+	memcpy(tag, tmp_ht_info_buf, tmp_ht_info_len -2);
+	tag += tmp_ht_info_len - 2;
+	}
+#endif
+	if (wpa_ie_len) {
+		memcpy(tag, ieee->wpa_ie, ieee->wpa_ie_len);
+		tag+=ieee->wpa_ie_len;
+	}
+
+#if 0	
+	if(tmp_generic_ie_len)
+	{
+		(*tag++) = 0xdd;
+		(*tag++) = tmp_generic_ie_len - 2;
+		memcpy(tag,tmp_generic_ie_buf,tmp_generic_ie_len -2);
+		tag += tmp_generic_ie_len -2;
+		
+	}
+#endif	
+	if(hostname_ie_len)
+	{
+		(*tag++) = 0xdd;
+		(*tag++) = hostname_ie_len - 2;
+		memcpy(tag, hostname_ie_buf, hostname_ie_len - 2);
+		tag += hostname_ie_len -2;
+	}
+
+	if(wmm_len)
+	{
+		memcpy(tag,wmmie,wmm_len);
+	}
+
+	skb->dev = ieee->dev;
+	return skb;
+}
+#endif
+
+struct sk_buff* rtllib_assoc_resp(struct rtllib_device *ieee, u8 *dest)
+{
+	struct sk_buff *skb;
+	u8* tag;
+	
+	struct rtllib_crypt_data* crypt;
+	struct rtllib_assoc_response_frame *assoc;
+	short encrypt;
+	
+	unsigned int rate_len = rtllib_MFIE_rate_len(ieee);
+	int len = sizeof(struct rtllib_assoc_response_frame) + rate_len + ieee->tx_headroom;
+	
+#ifdef USB_USE_ALIGNMENT
+        u32 Tmpaddr=0;
+        int alignment=0;
+        skb = dev_alloc_skb(len + USB_512B_ALIGNMENT_SIZE);
+#else	
+	skb = dev_alloc_skb(len); 	
+#endif
+	
+	if (!skb) 
+		return NULL;
+	
+#ifdef USB_USE_ALIGNMENT
+        Tmpaddr = (u32)skb->data;
+        alignment = Tmpaddr & 0x1ff;
+        skb_reserve(skb,(USB_512B_ALIGNMENT_SIZE - alignment));
+#endif
+	
+	skb_reserve(skb, ieee->tx_headroom);
+	
+	assoc = (struct rtllib_assoc_response_frame *)
+		skb_put(skb,sizeof(struct rtllib_assoc_response_frame));
+	
+	assoc->header.frame_ctl = cpu_to_le16(RTLLIB_STYPE_ASSOC_RESP);
+	memcpy(assoc->header.addr1, dest,ETH_ALEN);
+	memcpy(assoc->header.addr3, ieee->dev->dev_addr, ETH_ALEN);
+	memcpy(assoc->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
+	assoc->capability = cpu_to_le16(ieee->iw_mode == IW_MODE_MASTER ? 
+		WLAN_CAPABILITY_ESS : WLAN_CAPABILITY_IBSS);
+	
+		
+	if(ieee->short_slot)
+		assoc->capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_SLOT_TIME);
+		
+	if (ieee->host_encrypt){
+#ifdef _RTL8192_EXT_PATCH_
+		crypt = ieee->cryptlist[0]->crypt[ieee->tx_keyidx];
+#else
+		crypt = ieee->crypt[ieee->tx_keyidx];
+#endif
+
+	}		
+	else crypt = NULL;
+	
+	encrypt = ( crypt && crypt->ops);
+	   
+	if (encrypt)
+		assoc->capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
+	
+	assoc->status = 0;
+	assoc->aid = cpu_to_le16(ieee->assoc_id);
+	if (ieee->assoc_id == 0x2007) 
+		ieee->assoc_id=0;
+	else 
+		ieee->assoc_id++;
+	
+	tag = (u8*) skb_put(skb, rate_len);
+	rtllib_MFIE_Brate(ieee, &tag);
+	rtllib_MFIE_Grate(ieee, &tag);
+	
+	return skb;
+}
+
+struct sk_buff* rtllib_auth_resp(struct rtllib_device *ieee,int status, u8 *dest)
+{
+	struct sk_buff *skb = NULL;
+	struct rtllib_authentication *auth;
+	int len = ieee->tx_headroom + sizeof(struct rtllib_authentication)+1;
+#ifdef _RTL8192_EXT_PATCH_
+	bool is_mesh = ieee->ext_patch_rtllib_is_mesh(ieee,dest);
+	if(is_mesh && (ieee->mesh_sec_type == 1) && (ieee->mesh_security_setting == 3))
+		skb = ieee->ext_patch_rtllib_send_ath_confirm(ieee,dest);
+	return skb;
+#endif
+#ifdef USB_USE_ALIGNMENT
+        u32 Tmpaddr=0;
+        int alignment=0;
+        skb = dev_alloc_skb(len + USB_512B_ALIGNMENT_SIZE);
+#else	
+	skb = dev_alloc_skb(len); 	
+#endif
+	if (!skb) 
+		return NULL;
+	
+	skb->len = sizeof(struct rtllib_authentication);
+	
+#ifdef USB_USE_ALIGNMENT
+        Tmpaddr = (u32)skb->data;
+        alignment = Tmpaddr & 0x1ff;
+        skb_reserve(skb,(USB_512B_ALIGNMENT_SIZE - alignment));
+#endif
+	
+	skb_reserve(skb, ieee->tx_headroom);
+
+	auth = (struct rtllib_authentication *)
+		skb_put(skb, sizeof(struct rtllib_authentication));
+	
+	auth->status = cpu_to_le16(status);
+	auth->transaction = cpu_to_le16(2);
+	auth->algorithm = cpu_to_le16(WLAN_AUTH_OPEN);
+	
+#ifdef _RTL8192_EXT_PATCH_
+	if(is_mesh)
+		memset(auth->header.addr3, 0, ETH_ALEN);
+	else
+		memcpy(auth->header.addr3, ieee->dev->dev_addr, ETH_ALEN);
+#else
+	memcpy(auth->header.addr3, ieee->dev->dev_addr, ETH_ALEN);
+#endif
+	memcpy(auth->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
+	memcpy(auth->header.addr1, dest, ETH_ALEN);
+	auth->header.frame_ctl = cpu_to_le16(RTLLIB_STYPE_AUTH); 
+	return skb;
+	
+	
+}
+
+struct sk_buff* rtllib_null_func(struct rtllib_device *ieee,short pwr)
+{
+	struct sk_buff *skb;
+	struct rtllib_hdr_3addr* hdr;
+	
+#ifdef USB_USE_ALIGNMENT
+        u32 Tmpaddr=0;
+        int alignment=0;
+        skb = dev_alloc_skb(sizeof(struct rtllib_hdr_3addr) + ieee->tx_headroom + USB_512B_ALIGNMENT_SIZE);
+#else	
+	skb = dev_alloc_skb(sizeof(struct rtllib_hdr_3addr)+ieee->tx_headroom); 
+#endif	
+	if (!skb) 
+		return NULL;
+	
+#ifdef USB_USE_ALIGNMENT
+        Tmpaddr = (u32)skb->data;
+        alignment = Tmpaddr & 0x1ff;
+        skb_reserve(skb,(USB_512B_ALIGNMENT_SIZE - alignment));
+#endif	
+	skb_reserve(skb, ieee->tx_headroom);
+
+	hdr = (struct rtllib_hdr_3addr*)skb_put(skb,sizeof(struct rtllib_hdr_3addr));
+	
+	memcpy(hdr->addr1, ieee->current_network.bssid, ETH_ALEN);
+	memcpy(hdr->addr2, ieee->dev->dev_addr, ETH_ALEN);
+	memcpy(hdr->addr3, ieee->current_network.bssid, ETH_ALEN);
+	
+	hdr->frame_ctl = cpu_to_le16(RTLLIB_FTYPE_DATA | 
+		RTLLIB_STYPE_NULLFUNC | RTLLIB_FCTL_TODS | 
+		(pwr ? RTLLIB_FCTL_PM:0)); 
+	
+	return skb;
+	
+	
+}
+
+struct sk_buff* rtllib_pspoll_func(struct rtllib_device *ieee)
+{
+	struct sk_buff *skb;
+	struct rtllib_pspoll_hdr* hdr;
+	
+#ifdef USB_USE_ALIGNMENT
+        u32 Tmpaddr=0;
+        int alignment=0;
+        skb = dev_alloc_skb(sizeof(struct rtllib_pspoll_hdr) + ieee->tx_headroom + USB_512B_ALIGNMENT_SIZE);
+#else	
+	skb = dev_alloc_skb(sizeof(struct rtllib_pspoll_hdr)+ieee->tx_headroom); 
+#endif	
+	if (!skb) 
+		return NULL;
+	
+#ifdef USB_USE_ALIGNMENT
+        Tmpaddr = (u32)skb->data;
+        alignment = Tmpaddr & 0x1ff;
+        skb_reserve(skb,(USB_512B_ALIGNMENT_SIZE - alignment));
+#endif	
+	skb_reserve(skb, ieee->tx_headroom);
+
+	hdr = (struct rtllib_pspoll_hdr*)skb_put(skb,sizeof(struct rtllib_pspoll_hdr));
+
+	memcpy(hdr->bssid, ieee->current_network.bssid, ETH_ALEN);
+	memcpy(hdr->ta, ieee->dev->dev_addr, ETH_ALEN);
+
+	hdr->aid = cpu_to_le16(ieee->assoc_id | 0xc000); 
+	hdr->frame_ctl = cpu_to_le16(RTLLIB_FTYPE_CTL |RTLLIB_STYPE_PSPOLL | RTLLIB_FCTL_PM); 
+	
+	return skb;	
+	
+}
+
+void rtllib_resp_to_assoc_rq(struct rtllib_device *ieee, u8* dest)
+{
+	struct sk_buff *buf = rtllib_assoc_resp(ieee, dest);
+	
+	if (buf)
+		softmac_mgmt_xmit(buf, ieee);
+}
+
+
+void rtllib_resp_to_auth(struct rtllib_device *ieee, int s, u8* dest)
+{
+	struct sk_buff *buf = rtllib_auth_resp(ieee, s, dest);
+	
+	if (buf)
+		softmac_mgmt_xmit(buf, ieee);
+}
+
+
+void rtllib_resp_to_probe(struct rtllib_device *ieee, u8 *dest)
+{
+	
+
+	struct sk_buff *buf = rtllib_probe_resp(ieee, dest);
+	if (buf) 
+		softmac_mgmt_xmit(buf, ieee);
+}
+
+
+inline int SecIsInPMKIDList(struct rtllib_device *ieee, u8 *bssid)
+{
+	int i = 0;
+
+	do 
+	{
+		if ((ieee->PMKIDList[i].bUsed) && (memcmp(ieee->PMKIDList[i].Bssid, bssid, ETH_ALEN) == 0))
+		{
+			break;
+		}
+		else
+		{	
+			i++;
+		}
+	} while (i < NUM_PMKID_CACHE);
+
+	if (i == NUM_PMKID_CACHE)
+	{ 
+		i = -1;
+	}
+	else
+	{ 
+	}
+
+	return (i);
+	
+}
+
+
+inline struct sk_buff *rtllib_association_req(struct rtllib_network *beacon,struct rtllib_device *ieee)
+{
+	struct sk_buff *skb;
+	
+	struct rtllib_assoc_request_frame *hdr;
+	u8 *tag, *ies;
+	int i;
+	u8* ht_cap_buf = NULL;
+	u8 ht_cap_len=0;
+	u8* realtek_ie_buf=NULL;
+	u8 realtek_ie_len=0;
+	int wpa_ie_len= ieee->wpa_ie_len;
+	int wps_ie_len = ieee->wps_ie_len;
+	unsigned int ckip_ie_len=0;
+	unsigned int ccxrm_ie_len=0;
+	unsigned int cxvernum_ie_len=0;
+	struct rtllib_crypt_data* crypt;
+	int encrypt;
+	int	PMKCacheIdx;
+	
+	unsigned int rate_len = (beacon->rates_len?(beacon->rates_len+2):0) + (beacon->rates_ex_len?(beacon->rates_ex_len)+2:0);
+	
+	unsigned int wmm_info_len = beacon->qos_data.supported?9:0;
+#ifdef THOMAS_TURBO	
+	unsigned int turbo_info_len = beacon->Turbo_Enable?9:0;
+#endif
+
+	int len = 0; 
+#ifdef RTL8192S_WAPI_SUPPORT
+	PRT_WAPI_BKID		pWapiBKID;
+	u16					bkidNum;
+	PRT_WAPI_T			pWapiInfo = &(ieee->wapiInfo);
+	u8					WapiIE[256];
+	u8					WapiIELength = 0;
+#endif                             
+#ifdef _RTL8192_EXT_PATCH_
+	crypt = ieee->sta_crypt[ieee->tx_keyidx];
+#else
+	crypt = ieee->crypt[ieee->tx_keyidx];
+#endif
+	if(crypt != NULL) {
+		encrypt = ieee->host_encrypt && crypt && crypt->ops && ((0 == strcmp(crypt->ops->name,"WEP") || wpa_ie_len));
+	} else {
+		encrypt = 0;
+	}
+
+#ifdef ENABLE_TKIP11N
+	if (ieee->bForcedBgMode == true)
+#else
+	if ((ieee->rtllib_ap_sec_type && (ieee->rtllib_ap_sec_type(ieee)&SEC_ALG_TKIP)) ||(ieee->bForcedBgMode == true)) 
+#endif
+	{
+		ieee->pHTInfo->bEnableHT = 0;
+		ieee->mode = WIRELESS_MODE_G;
+	}
+	
+	if(ieee->pHTInfo->bCurrentHTSupport&&ieee->pHTInfo->bEnableHT)
+	{
+		ht_cap_buf = (u8*)&(ieee->pHTInfo->SelfHTCap);
+		ht_cap_len = sizeof(ieee->pHTInfo->SelfHTCap);
+#ifdef _RTL8192_EXT_PATCH_
+		HTConstructCapabilityElement(ieee, ht_cap_buf, &ht_cap_len, encrypt, 0);
+#else
+		HTConstructCapabilityElement(ieee, ht_cap_buf, &ht_cap_len, encrypt);
+#endif
+		if(ieee->pHTInfo->bCurrentRT2RTAggregation)
+		{
+			realtek_ie_buf = ieee->pHTInfo->szRT2RTAggBuffer;
+			realtek_ie_len = sizeof( ieee->pHTInfo->szRT2RTAggBuffer);
+			HTConstructRT2RTAggElement(ieee, realtek_ie_buf, &realtek_ie_len);
+       	 			
+		}
+	}
+
+	if(beacon->bCkipSupported)
+	{
+		ckip_ie_len = 30+2;
+	}
+	if(beacon->bCcxRmEnable)
+	{	
+		ccxrm_ie_len = 6+2;
+	}
+	if( beacon->BssCcxVerNumber >= 2 )
+	{	
+		cxvernum_ie_len = 5+2;
+	}
+	
+	PMKCacheIdx = SecIsInPMKIDList(ieee, ieee->current_network.bssid);
+	if (PMKCacheIdx >= 0)
+	{
+		wpa_ie_len += 18;
+		printk("[PMK cache]: WPA2 IE length: %x\n", wpa_ie_len);
+	}	
+#ifdef RTL8192S_WAPI_SUPPORT
+	if(ieee->WapiSupport && pWapiInfo->bWapiEnable)
+	{
+		wpa_ie_len = 0;
+		
+		WAPI_TRACE(WAPI_API, "%s(): Set WAPI IE in assoc req!!\n",__FUNCTION__);
+		WapiSetIE(ieee);
+		WapiIELength = pWapiInfo->wapiIELength;
+		memcpy(WapiIE, pWapiInfo->wapiIE ,pWapiInfo->wapiIELength);
+		
+		bkidNum = 0;
+		WapiIELength +=2;
+		if(!list_empty(&(pWapiInfo->wapiBKIDStoreList))){
+			list_for_each_entry(pWapiBKID, &pWapiInfo->wapiBKIDStoreList, list) {
+				bkidNum ++;
+				memcpy(WapiIE+WapiIELength, pWapiBKID->bkid,16);
+				WapiIELength += 16;
+			}
+		
+		}
+		memcpy(WapiIE+pWapiInfo->wapiIELength,&bkidNum,2);
+	}
+#endif
+	
+	len = sizeof(struct rtllib_assoc_request_frame)+ 2
+		+ beacon->ssid_len
+		+ rate_len
+		+ wpa_ie_len 
+		+ wps_ie_len
+#ifdef RTL8192S_WAPI_SUPPORT
+		+ WapiIELength + 2
+#endif
+		+ wmm_info_len
+#ifdef THOMAS_TURBO
+		+ turbo_info_len
+#endif
+                + ht_cap_len
+		+ realtek_ie_len
+		+ ckip_ie_len
+		+ ccxrm_ie_len
+		+ cxvernum_ie_len
+		+ ieee->tx_headroom;
+
+#ifdef USB_USE_ALIGNMENT
+	u32 Tmpaddr=0;
+	int alignment=0;
+	skb = dev_alloc_skb(len + USB_512B_ALIGNMENT_SIZE);
+#else	
+	skb = dev_alloc_skb(len);
+#endif
+	
+	if (!skb) 
+		return NULL;
+
+#ifdef USB_USE_ALIGNMENT
+        Tmpaddr = (u32)skb->data;
+        alignment = Tmpaddr & 0x1ff;
+        skb_reserve(skb,(USB_512B_ALIGNMENT_SIZE - alignment));
+#endif
+
+	skb_reserve(skb, ieee->tx_headroom);
+	
+	hdr = (struct rtllib_assoc_request_frame *)
+		skb_put(skb, sizeof(struct rtllib_assoc_request_frame)+2);
+	
+	
+	hdr->header.frame_ctl = RTLLIB_STYPE_ASSOC_REQ;
+	hdr->header.duration_id= 37; 
+	memcpy(hdr->header.addr1, beacon->bssid, ETH_ALEN);
+	memcpy(hdr->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
+	memcpy(hdr->header.addr3, beacon->bssid, ETH_ALEN);
+
+	memcpy(ieee->ap_mac_addr, beacon->bssid, ETH_ALEN);
+	
+	hdr->capability = cpu_to_le16(WLAN_CAPABILITY_ESS);
+	if (beacon->capability & WLAN_CAPABILITY_PRIVACY ) 
+		hdr->capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
+
+	if (beacon->capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
+		hdr->capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_PREAMBLE); 
+
+	if(ieee->short_slot && (beacon->capability&WLAN_CAPABILITY_SHORT_SLOT_TIME))
+		hdr->capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_SLOT_TIME);
+
+
+	hdr->listen_interval = beacon->listen_interval;
+	
+	hdr->info_element[0].id = MFIE_TYPE_SSID;
+
+	hdr->info_element[0].len = beacon->ssid_len;
+	tag = skb_put(skb, beacon->ssid_len);
+	memcpy(tag, beacon->ssid, beacon->ssid_len);
+	
+	tag = skb_put(skb, rate_len); 
+	
+	if(beacon->rates_len){
+		*tag++ = MFIE_TYPE_RATES;
+		*tag++ = beacon->rates_len;
+		for(i=0;i<beacon->rates_len;i++){
+			*tag++ = beacon->rates[i];
+		}
+	}
+
+	if(beacon->rates_ex_len){
+		*tag++ = MFIE_TYPE_RATES_EX;
+		*tag++ = beacon->rates_ex_len;
+		for(i=0;i<beacon->rates_ex_len;i++){
+			*tag++ = beacon->rates_ex[i];
+		}
+	}
+
+	if( beacon->bCkipSupported )
+	{
+		static u8	AironetIeOui[] = {0x00, 0x01, 0x66}; 
+		u8	CcxAironetBuf[30];
+		OCTET_STRING	osCcxAironetIE;
+
+		memset(CcxAironetBuf, 0,30);
+		osCcxAironetIE.Octet = CcxAironetBuf;
+		osCcxAironetIE.Length = sizeof(CcxAironetBuf);
+		memcpy(osCcxAironetIE.Octet, AironetIeOui, sizeof(AironetIeOui));
+
+		osCcxAironetIE.Octet[IE_CISCO_FLAG_POSITION] |=  (SUPPORT_CKIP_PK|SUPPORT_CKIP_MIC) ;
+		tag = skb_put(skb, ckip_ie_len);
+		*tag++ = MFIE_TYPE_AIRONET;
+		*tag++ = osCcxAironetIE.Length;
+		memcpy(tag,osCcxAironetIE.Octet,osCcxAironetIE.Length);
+		tag += osCcxAironetIE.Length;
+	}
+
+	if(beacon->bCcxRmEnable)
+	{
+		static u8 CcxRmCapBuf[] = {0x00, 0x40, 0x96, 0x01, 0x01, 0x00};
+		OCTET_STRING osCcxRmCap;
+
+		osCcxRmCap.Octet = CcxRmCapBuf;
+		osCcxRmCap.Length = sizeof(CcxRmCapBuf);
+		tag = skb_put(skb,ccxrm_ie_len);
+		*tag++ = MFIE_TYPE_GENERIC;
+		*tag++ = osCcxRmCap.Length;
+		memcpy(tag,osCcxRmCap.Octet,osCcxRmCap.Length);
+		tag += osCcxRmCap.Length;
+	}
+
+	if( beacon->BssCcxVerNumber >= 2 )
+	{
+		u8			CcxVerNumBuf[] = {0x00, 0x40, 0x96, 0x03, 0x00};
+		OCTET_STRING	osCcxVerNum;
+		CcxVerNumBuf[4] = beacon->BssCcxVerNumber;
+		osCcxVerNum.Octet = CcxVerNumBuf;
+		osCcxVerNum.Length = sizeof(CcxVerNumBuf);
+		tag = skb_put(skb,cxvernum_ie_len);
+		*tag++ = MFIE_TYPE_GENERIC;
+		*tag++ = osCcxVerNum.Length;
+		memcpy(tag,osCcxVerNum.Octet,osCcxVerNum.Length);
+		tag += osCcxVerNum.Length;
+	}
+	if(ieee->pHTInfo->bCurrentHTSupport&&ieee->pHTInfo->bEnableHT){
+		if(ieee->pHTInfo->ePeerHTSpecVer != HT_SPEC_VER_EWC)
+		{
+			tag = skb_put(skb, ht_cap_len);
+			*tag++ = MFIE_TYPE_HT_CAP;
+			*tag++ = ht_cap_len - 2;
+			memcpy(tag, ht_cap_buf,ht_cap_len -2);
+			tag += ht_cap_len -2;
+		}
+	}	         
+
+	
+	if (wpa_ie_len){
+		tag = skb_put(skb, ieee->wpa_ie_len);	
+		memcpy(tag, ieee->wpa_ie, ieee->wpa_ie_len);
+		
+		if (PMKCacheIdx >= 0)
+		{
+			tag = skb_put(skb, 18);		
+			*tag = 1;
+			*(tag + 1) = 0;	
+			memcpy((tag + 2), &ieee->PMKIDList[PMKCacheIdx].PMKID, 16);
+		}
+	}
+#ifdef RTL8192S_WAPI_SUPPORT
+	if(WapiIELength){
+		tag = skb_put(skb, WapiIELength+2);
+		*tag = MFIE_TYPE_WAPI;
+		*(tag+1) = WapiIELength;
+		memcpy((tag+2), WapiIE, WapiIELength);
+
+		pWapiInfo->assoReqWapiIELength = WapiIELength+2;
+		pWapiInfo->assoReqWapiIE[0] = MFIE_TYPE_WAPI;
+		pWapiInfo->assoReqWapiIE[1] = WapiIELength;
+		memcpy(pWapiInfo->assoReqWapiIE+2,WapiIE,WapiIELength);
+	}
+#endif
+
+	if(wmm_info_len) {
+		tag = skb_put(skb,wmm_info_len);
+		rtllib_WMM_Info(ieee, &tag);
+	}
+
+	if(wps_ie_len && ieee->wps_ie)
+	{
+		tag = skb_put(skb, wps_ie_len);		
+		memcpy(tag, ieee->wps_ie, wps_ie_len);		
+	}	
+	
+#ifdef THOMAS_TURBO
+	tag = skb_put(skb,turbo_info_len);
+        if(turbo_info_len) {
+                rtllib_TURBO_Info(ieee, &tag);
+        }
+#endif
+
+	if(ieee->pHTInfo->bCurrentHTSupport&&ieee->pHTInfo->bEnableHT){
+		if(ieee->pHTInfo->ePeerHTSpecVer == HT_SPEC_VER_EWC)
+		{
+			tag = skb_put(skb, ht_cap_len);
+			*tag++ = MFIE_TYPE_GENERIC;
+			*tag++ = ht_cap_len - 2;
+			memcpy(tag, ht_cap_buf,ht_cap_len - 2);
+			tag += ht_cap_len -2;
+		}
+
+		if(ieee->pHTInfo->bCurrentRT2RTAggregation){
+			tag = skb_put(skb, realtek_ie_len);
+			*tag++ = MFIE_TYPE_GENERIC;
+			*tag++ = realtek_ie_len - 2;
+			memcpy(tag, realtek_ie_buf,realtek_ie_len -2 );
+		}
+	}
+
+	if(ieee->assocreq_ies){
+		kfree(ieee->assocreq_ies);
+		ieee->assocreq_ies = NULL;
+	}
+	ies = &(hdr->info_element[0].id);
+	ieee->assocreq_ies_len = (skb->data + skb->len) - ies;
+	ieee->assocreq_ies = kmalloc(ieee->assocreq_ies_len, GFP_ATOMIC);
+	if (ieee->assocreq_ies)
+		memcpy(ieee->assocreq_ies, ies, ieee->assocreq_ies_len);
+	else{
+		printk("%s()Warning: can't alloc memory for assocreq_ies\n", __func__);
+		ieee->assocreq_ies_len = 0;
+	}	
+	
+	return skb;
+}
+
+void rtllib_associate_abort(struct rtllib_device *ieee)
+{
+	
+	unsigned long flags;
+	spin_lock_irqsave(&ieee->lock, flags);
+	
+	ieee->associate_seq++;
+	
+	/* don't scan, and avoid to have the RX path possibily
+	 * try again to associate. Even do not react to AUTH or
+	 * ASSOC response. Just wait for the retry wq to be scheduled.
+	 * Here we will check if there are good nets to associate
+	 * with, so we retry or just get back to NO_LINK and scanning
+	 */
+	if (ieee->state == RTLLIB_ASSOCIATING_AUTHENTICATING){
+		RTLLIB_DEBUG_MGMT("Authentication failed\n"); 
+		ieee->softmac_stats.no_auth_rs++;
+	}else{
+		RTLLIB_DEBUG_MGMT("Association failed\n"); 
+		ieee->softmac_stats.no_ass_rs++;
+	}
+		
+	ieee->state = RTLLIB_ASSOCIATING_RETRY;
+		
+	queue_delayed_work_rsl(ieee->wq, &ieee->associate_retry_wq, \
+                           RTLLIB_SOFTMAC_ASSOC_RETRY_TIME);
+	
+	spin_unlock_irqrestore(&ieee->lock, flags);
+}
+
+void rtllib_associate_abort_cb(unsigned long dev)
+{
+	rtllib_associate_abort((struct rtllib_device *) dev);
+}
+
+
+#ifdef _RTL8192_EXT_PATCH_
+void rtllib_associate_step1(struct rtllib_device *ieee,u8 * daddr)
+#else
+void rtllib_associate_step1(struct rtllib_device *ieee)
+#endif
+{
+	struct rtllib_network *beacon = &ieee->current_network;
+	struct sk_buff *skb;
+#ifdef _RTL8192_EXT_PATCH_
+	bool is_mesh = false;
+#endif
+	RTLLIB_DEBUG_MGMT("Stopping scan\n");
+
+	ieee->softmac_stats.tx_auth_rq++;
+#ifdef _RTL8192_EXT_PATCH_
+	skb=rtllib_authentication_req(beacon, ieee, 0,daddr);
+#else
+	skb=rtllib_authentication_req(beacon, ieee, 0);
+#endif
+#ifdef _RTL8192_EXT_PATCH_
+	is_mesh = ieee->ext_patch_rtllib_is_mesh(ieee,daddr);
+	if(is_mesh)	{
+		if(skb){	
+			softmac_mgmt_xmit(skb, ieee);
+		}
+		return;
+	}else
+#endif		
+	if (!skb) 
+		rtllib_associate_abort(ieee);
+	else{ 
+		ieee->state = RTLLIB_ASSOCIATING_AUTHENTICATING ;
+		RTLLIB_DEBUG_MGMT("Sending authentication request\n");
+		softmac_mgmt_xmit(skb, ieee);
+		if(!timer_pending(&ieee->associate_timer)){
+			ieee->associate_timer.expires = jiffies + (HZ / 2);
+			add_timer(&ieee->associate_timer);
+		}
+	}
+}
+
+void rtllib_auth_challenge(struct rtllib_device *ieee, u8 *challenge, int chlen)
+{
+	u8 *c;	
+	struct sk_buff *skb;
+	struct rtllib_network *beacon = &ieee->current_network;
+	
+	ieee->associate_seq++;
+	ieee->softmac_stats.tx_auth_rq++;
+	
+#ifdef _RTL8192_EXT_PATCH_
+	skb = rtllib_authentication_req(beacon, ieee, chlen+2,beacon->bssid);
+#else
+	skb = rtllib_authentication_req(beacon, ieee, chlen+2);
+#endif		
+	if (!skb) 
+		rtllib_associate_abort(ieee);
+	else{
+		c = skb_put(skb, chlen+2);
+		*(c++) = MFIE_TYPE_CHALLENGE;
+		*(c++) = chlen;
+		memcpy(c, challenge, chlen);
+		
+		RTLLIB_DEBUG_MGMT("Sending authentication challenge response\n");
+		
+#ifdef _RTL8192_EXT_PATCH_
+		rtllib_encrypt_fragment(ieee, skb, sizeof(struct rtllib_hdr_3addr  ), 0, 0);
+#else
+		rtllib_encrypt_fragment(ieee, skb, sizeof(struct rtllib_hdr_3addr  ));
+#endif		
+			
+		softmac_mgmt_xmit(skb, ieee);
+		mod_timer(&ieee->associate_timer, jiffies + (HZ/2));
+#if 0
+		ieee->associate_timer.expires = jiffies + (HZ / 2);
+		add_timer(&ieee->associate_timer);
+#endif
+	}	
+	kfree(challenge);
+}
+
+void rtllib_associate_step2(struct rtllib_device *ieee)
+{
+	struct sk_buff* skb;
+	struct rtllib_network *beacon = &ieee->current_network;
+	
+	del_timer_sync(&ieee->associate_timer);
+	
+	RTLLIB_DEBUG_MGMT("Sending association request\n");
+	
+	ieee->softmac_stats.tx_ass_rq++;
+	skb=rtllib_association_req(beacon, ieee);
+	if (!skb) 
+		rtllib_associate_abort(ieee);
+	else{
+		softmac_mgmt_xmit(skb, ieee);
+		mod_timer(&ieee->associate_timer, jiffies + (HZ/2));
+#if 0
+		ieee->associate_timer.expires = jiffies + (HZ / 2);
+		add_timer(&ieee->associate_timer);
+#endif
+	}	
+}
+
+#define CANCELLED  2
+void rtllib_associate_complete_wq(void *data)
+{
+	struct rtllib_device *ieee = (struct rtllib_device *)container_of_work_rsl(data, struct rtllib_device, associate_complete_wq);
+	PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(ieee->PowerSaveControl));
+	printk(KERN_INFO "Associated successfully\n");
+	if(ieee->is_silent_reset == 0){
+            printk("normal associate\n");
+            notify_wx_assoc_event(ieee); 
+        }
+
+	netif_carrier_on(ieee->dev);
+	ieee->is_roaming = false;
+	if(rtllib_is_54g(&ieee->current_network) && 
+		(ieee->modulation & RTLLIB_OFDM_MODULATION)){
+		
+		ieee->rate = 108;
+		printk(KERN_INFO"Using G rates:%d\n", ieee->rate);
+	}else{
+		ieee->rate = 22;
+		ieee->SetWirelessMode(ieee->dev, IEEE_B);
+		printk(KERN_INFO"Using B rates:%d\n", ieee->rate);
+	}
+	if (ieee->pHTInfo->bCurrentHTSupport&&ieee->pHTInfo->bEnableHT)
+	{
+		printk("Successfully associated, ht enabled\n");
+		HTOnAssocRsp(ieee);
+	} else {
+		printk("Successfully associated, ht not enabled(%d, %d)\n", 
+				ieee->pHTInfo->bCurrentHTSupport, ieee->pHTInfo->bEnableHT);
+		memset(ieee->dot11HTOperationalRateSet, 0, 16);
+	}
+	ieee->LinkDetectInfo.SlotNum = 2 * (1 + ieee->current_network.beacon_interval/500);
+	if(ieee->LinkDetectInfo.NumRecvBcnInPeriod==0||ieee->LinkDetectInfo.NumRecvDataInPeriod==0 )
+	{
+		ieee->LinkDetectInfo.NumRecvBcnInPeriod = 1;
+		ieee->LinkDetectInfo.NumRecvDataInPeriod= 1;	
+	}
+	pPSC->LpsIdleCount = 0;
+	ieee->link_change(ieee->dev);
+
+#ifdef _RTL8192_EXT_PATCH_	
+	if(ieee->set_key_for_AP)
+		ieee->set_key_for_AP(ieee);
+	/* Synchronize mesh channel to wlan channel in MSTA mode.*/
+	{
+		if(ieee->current_mesh_network.channel != ieee->current_network.channel)
+		{
+			printk("^^^^^^^^^^^^^^^^Change mesh channel %d with wlan channel %d\n", 
+					ieee->current_mesh_network.channel, ieee->current_network.channel);
+			ieee->ext_patch_rtllib_close_all_peerlink(ieee, CANCELLED);
+			ieee->current_mesh_network.channel = ieee->current_network.channel;
+			if(ieee->ext_patch_r819x_wx_set_channel)
+			{
+				ieee->ext_patch_r819x_wx_set_channel(ieee, ieee->current_network.channel);
+				ieee->ext_patch_r819x_wx_set_mesh_chan(ieee->dev,ieee->current_network.channel);
+			}
+		}
+	}
+#endif	
+        if(ieee->is_silent_reset == 0){
+        } else if(ieee->is_silent_reset == 1) {
+            printk("silent reset associate\n");
+            ieee->is_silent_reset = 0;
+        }
+
+	if (ieee->data_hard_resume)
+		ieee->data_hard_resume(ieee->dev);
+
+#ifdef RTK_DMP_PLATFORM
+	kobject_hotplug(&ieee->dev->class_dev.kobj, KOBJ_LINKUP);
+#endif
+}
+
+static void rtllib_sta_send_associnfo(struct rtllib_device *ieee)
+{
+	char *buf;
+	size_t len;
+	int i;
+	union iwreq_data wrqu;
+
+		return;
+
+	
+	buf = kmalloc(50 + 2 * (ieee->assocreq_ies_len + ieee->assocresp_ies_len), GFP_ATOMIC);
+	if (!buf)
+		return;
+
+	len = sprintf(buf, "ASSOCINFO(");
+	if (ieee->assocreq_ies) {
+		len += sprintf(buf + len, "ReqIEs=");
+		for (i = 0; i < ieee->assocreq_ies_len; i++) {
+			len += sprintf(buf + len, "%02x", ieee->assocreq_ies[i]);
+		}
+	}
+	if (ieee->assocresp_ies) {
+		if (ieee->assocreq_ies)
+			len += sprintf(buf + len, " ");
+		len += sprintf(buf + len, "RespIEs=");
+		for (i = 0; i < ieee->assocresp_ies_len; i++) {
+			len += sprintf(buf + len, "%02x", ieee->assocresp_ies[i]);
+		}
+	}
+	len += sprintf(buf + len, ")");
+
+	if (len > IW_CUSTOM_MAX) {
+		len = sprintf(buf, "ASSOCRESPIE=");
+		for (i = 0; i < ieee->assocresp_ies_len; i++) {
+			len += sprintf(buf + len, "%02x", ieee->assocresp_ies[i]);
+		}
+	}
+
+	if (len <= IW_CUSTOM_MAX) {
+		memset(&wrqu, 0, sizeof(wrqu));
+		wrqu.data.length = len;
+		wireless_send_event(ieee->dev, IWEVCUSTOM, &wrqu, buf);
+	}
+
+	kfree(buf);
+}
+
+void rtllib_associate_complete(struct rtllib_device *ieee)
+{
+	del_timer_sync(&ieee->associate_timer);
+
+#if 0
+	for(i = 0; i < 6; i++) {
+	  ieee->seq_ctrl[i] = 0;
+	}
+#endif	
+	ieee->state = RTLLIB_LINKED;
+#if defined (RTL8192S_WAPI_SUPPORT)
+	if ((ieee->WapiSupport) && (ieee->wapiInfo.bWapiEnable)){
+		WAPI_CreateEvent_Send(ieee, WAPI_EVENT_CONNECT, ieee->current_network.bssid, NULL, 0);
+	}
+#endif
+#if 0
+	if (ieee->pHTInfo->bCurrentHTSupport)
+	{
+		printk("Successfully associated, ht enabled\n");
+		queue_work_rsl(ieee->wq, &ieee->ht_onAssRsp);
+	}
+	else
+	{
+		printk("Successfully associated, ht not enabled\n");
+		memset(ieee->dot11HTOperationalRateSet, 0, 16);
+		HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20, HT_EXTCHNL_OFFSET_NO_EXT);
+	}
+#endif
+
+	rtllib_sta_send_associnfo(ieee);
+
+	queue_work_rsl(ieee->wq, &ieee->associate_complete_wq);
+}
+
+void rtllib_associate_procedure_wq(void *data)
+{
+	struct rtllib_device *ieee = container_of_dwork_rsl(data, struct rtllib_device, associate_procedure_wq);
+	rtllib_stop_scan_syncro(ieee);
+#ifdef ENABLE_IPS
+	if(ieee->rtllib_ips_leave != NULL)
+        	ieee->rtllib_ips_leave(ieee->dev);
+#endif
+	down(&ieee->wx_sem);
+	
+	if (ieee->data_hard_stop)
+		ieee->data_hard_stop(ieee->dev);
+	
+	rtllib_stop_scan(ieee);
+	printk("===>%s(), chan:%d\n", __FUNCTION__, ieee->current_network.channel);	
+	HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20, HT_EXTCHNL_OFFSET_NO_EXT);
+	if(ieee->eRFPowerState == eRfOff)
+	{
+            printk("=============>%s():Rf state is eRfOff, schedule ipsleave wq again,return\n",__FUNCTION__);
+#ifdef ENABLE_IPS
+		if(ieee->rtllib_ips_leave_wq != NULL)
+			ieee->rtllib_ips_leave_wq(ieee->dev);
+#endif
+		up(&ieee->wx_sem);
+		return;
+	}
+	ieee->associate_seq = 1;
+#ifdef _RTL8192_EXT_PATCH_
+	rtllib_associate_step1(ieee, ieee->current_network.bssid);
+#else
+	rtllib_associate_step1(ieee);
+#endif	
+	up(&ieee->wx_sem);
+}
+
+#ifdef _RTL8192_EXT_PATCH_
+
+void rtllib_ext_stop_scan_wq(void *data)
+{
+	struct rtllib_device *ieee = (struct rtllib_device *)container_of_work_rsl(data, struct rtllib_device, ext_stop_scan_wq);
+	rtllib_stop_scan_syncro(ieee);
+	
+	down(&ieee->wx_sem);
+	
+	if (ieee->data_hard_stop)
+		ieee->data_hard_stop(ieee->dev);
+	
+	rtllib_stop_scan(ieee);
+
+	up(&ieee->wx_sem);
+}
+
+
+void rtllib_ext_send_11s_beacon(struct rtllib_device *ieee)
+{	
+	queue_work_rsl(ieee->wq, &ieee->ext_send_beacon_wq);
+}
+
+#endif 
+
+
+inline void rtllib_softmac_new_net(struct rtllib_device *ieee, struct rtllib_network *net)
+{
+	u8 tmp_ssid[IW_ESSID_MAX_SIZE+1];
+	int tmp_ssid_len = 0;
+	
+	short apset,ssidset,ssidbroad,apmatch,ssidmatch;
+	
+	/* we are interested in new new only if we are not associated 
+	 * and we are not associating / authenticating
+	 */
+	if (ieee->state != RTLLIB_NOLINK)
+		return; 
+
+	if ((ieee->iw_mode == IW_MODE_INFRA) && !(net->capability & WLAN_CAPABILITY_ESS))
+		return;
+	
+	if ((ieee->iw_mode == IW_MODE_ADHOC) && !(net->capability & WLAN_CAPABILITY_IBSS))
+		return;
+
+	if ((ieee->iw_mode == IW_MODE_ADHOC) && (net->channel > ieee->ibss_maxjoin_chal)) {
+		return;
+	}
+#ifdef _RTL8192_EXT_PATCH_
+	if (ieee->iw_mode == IW_MODE_INFRA || ieee->iw_mode == IW_MODE_ADHOC 
+	    || ((ieee->iw_mode == IW_MODE_MESH) && (ieee->only_mesh == 0)))
+#else
+	if (ieee->iw_mode == IW_MODE_INFRA || ieee->iw_mode == IW_MODE_ADHOC) 
+#endif
+		{
+		/* if the user specified the AP MAC, we need also the essid
+		 * This could be obtained by beacons or, if the network does not
+		 * broadcast it, it can be put manually.
+		 */
+		apset = ieee->wap_set;
+		ssidset = ieee->ssid_set;
+		ssidbroad =  !(net->ssid_len == 0 || net->ssid[0]== '\0');
+		apmatch = (memcmp(ieee->current_network.bssid, net->bssid, ETH_ALEN)==0);
+		if(!ssidbroad){
+		    	ssidmatch = (ieee->current_network.ssid_len == net->hidden_ssid_len)&&\
+					(!strncmp(ieee->current_network.ssid, net->hidden_ssid, net->hidden_ssid_len));
+			if(net->hidden_ssid_len > 0)
+                        {
+			        strncpy(net->ssid, net->hidden_ssid, net->hidden_ssid_len);
+			        net->ssid_len = net->hidden_ssid_len;
+                                ssidbroad = 1;
+                        }
+		}
+		else
+			ssidmatch = (ieee->current_network.ssid_len == net->ssid_len)&&\
+					(!strncmp(ieee->current_network.ssid, net->ssid, net->ssid_len));
+
+		if (	/* if the user set the AP check if match.
+		         * if the network does not broadcast essid we check the user supplyed ANY essid
+			 * if the network does broadcast and the user does not set essid it is OK
+			 * if the network does broadcast and the user did set essid chech if essid match
+			 */
+			( apset && apmatch && 
+				((ssidset && ssidbroad && ssidmatch) || (ssidbroad && !ssidset) || (!ssidbroad && ssidset)) )
+			/* if the ap is not set, check that the user set the bssid
+			 * and the network does bradcast and that those two bssid matches
+			 */ 
+			 ||  (!apset && ssidset && ssidbroad && ssidmatch) || (ieee->is_roaming && ssidset && ssidbroad && ssidmatch) 
+			){
+				/* if the essid is hidden replace it with the
+				* essid provided by the user.
+				*/
+				if (!ssidbroad){
+					strncpy(tmp_ssid, ieee->current_network.ssid, IW_ESSID_MAX_SIZE);
+					tmp_ssid_len = ieee->current_network.ssid_len;
+				}
+				memcpy(&ieee->current_network, net, sizeof(struct rtllib_network));
+				if (!ssidbroad){
+					strncpy(ieee->current_network.ssid, tmp_ssid, IW_ESSID_MAX_SIZE);
+					ieee->current_network.ssid_len = tmp_ssid_len;
+				}
+				printk(KERN_INFO"Linking with %s,channel:%d, qos:%d, myHT:%d, networkHT:%d, mode:%x cur_net.flags:0x%x\n",ieee->current_network.ssid,ieee->current_network.channel, ieee->current_network.qos_data.supported, ieee->pHTInfo->bEnableHT, ieee->current_network.bssht.bdSupportHT, ieee->current_network.mode, ieee->current_network.flags);
+
+				if ((rtllib_act_scanning(ieee, false)) && !(ieee->softmac_features & IEEE_SOFTMAC_SCAN)){
+					rtllib_stop_scan_syncro(ieee);
+				}
+
+				ieee->hwscan_ch_bk = ieee->current_network.channel;
+				HTResetIOTSetting(ieee->pHTInfo);
+				ieee->wmm_acm = 0;
+#ifdef _RTL8192_EXT_PATCH_
+				if ((ieee->iw_mode == IW_MODE_INFRA) || 
+					((ieee->iw_mode == IW_MODE_MESH) && (ieee->only_mesh == 0)))  
+#else
+				if (ieee->iw_mode == IW_MODE_INFRA)
+#endif
+				{
+					/* Join the network for the first time */
+					ieee->AsocRetryCount = 0;	
+					if((ieee->current_network.qos_data.supported == 1) &&
+					   ieee->current_network.bssht.bdSupportHT)
+/*WB, 2008.09.09:bCurrentHTSupport and bEnableHT two flags are going to put together to check whether we are in HT now, so needn't to check bEnableHT flags here. That's is to say we will set to HT support whenever joined AP has the ability to support HT. And whether we are in HT or not, please check bCurrentHTSupport&&bEnableHT now please.*/
+					{
+#ifdef ENABLE_AMSDU   
+						if((ieee->mode == IEEE_N_24G) && (ieee->mode == IEEE_N_5G))
+							HTUseDefaultSetting(ieee);
+#endif
+						HTResetSelfAndSavePeerSetting(ieee, &(ieee->current_network));
+					}
+					else
+					{
+						ieee->pHTInfo->bCurrentHTSupport = false;
+					}
+
+					ieee->state = RTLLIB_ASSOCIATING;
+					if(ieee->LedControlHandler != NULL)
+					        ieee->LedControlHandler(ieee->dev, LED_CTL_START_TO_LINK); 
+					queue_delayed_work_rsl(ieee->wq, &ieee->associate_procedure_wq, 0);
+				}else{
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
+#if defined (RTL8192S_WAPI_SUPPORT)
+					if ((ieee->WapiSupport) && (ieee->wapiInfo.bWapiEnable)){
+						WAPI_CreateEvent_Send(ieee, WAPI_EVENT_CONNECT, ieee->current_network.bssid, NULL, 0);
+					}
+#endif		
+					ieee->state = RTLLIB_LINKED;
+					if(ieee->mode > ieee->current_network.mode)
+						ieee->SetWirelessMode(ieee->dev, ieee->current_network.mode);
+					else
+						ieee->SetWirelessMode(ieee->dev, ieee->mode);
+					mod_timer(&ieee->ibss_wait_timer,jiffies+(MSECS(20000)));
+#else
+					if(rtllib_is_54g(&ieee->current_network) && 
+						(ieee->modulation & RTLLIB_OFDM_MODULATION)){
+						ieee->rate = 108;
+						ieee->SetWirelessMode(ieee->dev, IEEE_G);
+						printk(KERN_INFO"Using G rates\n");
+					}else{
+						ieee->rate = 22;
+						ieee->SetWirelessMode(ieee->dev, IEEE_B);
+						printk(KERN_INFO"Using B rates\n");
+					}
+					memset(ieee->dot11HTOperationalRateSet, 0, 16);
+					ieee->state = RTLLIB_LINKED;
+#endif
+				}
+			
+		}
+	}
+
+}
+
+void rtllib_softmac_check_all_nets(struct rtllib_device *ieee)
+{
+	unsigned long flags;
+	struct rtllib_network *target;
+
+	spin_lock_irqsave(&ieee->lock, flags);
+			
+	list_for_each_entry(target, &ieee->network_list, list) {
+		
+		/* if the state become different that NOLINK means
+		 * we had found what we are searching for
+		 */
+
+		if (ieee->state != RTLLIB_NOLINK) 
+			break;
+	
+		if (ieee->scan_age == 0 || time_after(target->last_scanned + ieee->scan_age, jiffies))
+		rtllib_softmac_new_net(ieee, target);
+	}
+	
+	spin_unlock_irqrestore(&ieee->lock, flags);
+	
+}
+
+
+static inline u16 auth_parse(struct sk_buff *skb, u8** challenge, int *chlen)
+{
+	struct rtllib_authentication *a;
+	u8 *t;
+	if (skb->len <  (sizeof(struct rtllib_authentication)-sizeof(struct rtllib_info_element))){ 
+		RTLLIB_DEBUG_MGMT("invalid len in auth resp: %d\n",skb->len);
+		return 0xcafe;
+	}
+	*challenge = NULL;
+	a = (struct rtllib_authentication*) skb->data;
+	if(skb->len > (sizeof(struct rtllib_authentication) +3)){
+		t = skb->data + sizeof(struct rtllib_authentication);
+		
+		if(*(t++) == MFIE_TYPE_CHALLENGE){
+			*chlen = *(t++);
+			*challenge = (u8*)kmalloc(*chlen, GFP_ATOMIC);
+			memcpy(*challenge, t, *chlen);
+		}
+	}
+	
+	return cpu_to_le16(a->status);
+	
+}
+
+
+int auth_rq_parse(struct sk_buff *skb,u8* dest)
+{
+	struct rtllib_authentication *a;
+	
+	if (skb->len <  (sizeof(struct rtllib_authentication)-sizeof(struct rtllib_info_element))){ 
+		RTLLIB_DEBUG_MGMT("invalid len in auth request: %d\n",skb->len);	
+		return -1;
+	}
+	a = (struct rtllib_authentication*) skb->data;
+	
+	memcpy(dest,a->header.addr2, ETH_ALEN);
+	
+	if (le16_to_cpu(a->algorithm) != WLAN_AUTH_OPEN) 
+		return  WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG;
+	
+	return WLAN_STATUS_SUCCESS;
+}
+
+static short probe_rq_parse(struct rtllib_device *ieee, struct sk_buff *skb, u8 *src)
+{
+	u8 *tag;
+	u8 *skbend;
+	u8 *ssid=NULL;
+	u8 ssidlen = 0;
+	
+	struct rtllib_hdr_3addr   *header =
+		(struct rtllib_hdr_3addr   *) skb->data;
+	
+	if (skb->len < sizeof (struct rtllib_hdr_3addr  )) 
+		return -1; /* corrupted */
+        if((memcmp(header->addr3,ieee->current_network.bssid,ETH_ALEN) != 0)&&
+                (memcmp(header->addr3,"\xff\xff\xff\xff\xff\xff",ETH_ALEN) != 0)) {
+            return -1;
+        }
+
+        if(memcmp(header->addr3,ieee->current_network.bssid,ETH_ALEN) == 0) {
+        }
+	
+        if(memcmp(header->addr3,"\xff\xff\xff\xff\xff\xff",ETH_ALEN) == 0) {
+        }
+	memcpy(src,header->addr2, ETH_ALEN);
+	
+	skbend = (u8*)skb->data + skb->len;
+	
+	tag = skb->data + sizeof (struct rtllib_hdr_3addr  );
+	
+	while (tag+1 < skbend){
+		if (*tag == 0){ 
+			ssid = tag+2;
+			ssidlen = *(tag+1);
+			break;
+		}
+		tag++; /* point to the len field */
+		tag = tag + *(tag); /* point to the last data byte of the tag */
+		tag++; /* point to the next tag */
+	}
+	
+	if (ssidlen == 0) return 1;
+	
+	if (!ssid) return 1; /* ssid not found in tagged param */
+	return (!strncmp(ssid, ieee->current_network.ssid, ssidlen));
+		
+}
+
+int assoc_rq_parse(struct sk_buff *skb,u8* dest)
+{
+	struct rtllib_assoc_request_frame *a;
+	
+	if (skb->len < (sizeof(struct rtllib_assoc_request_frame) - 
+		sizeof(struct rtllib_info_element))) { 
+		
+		RTLLIB_DEBUG_MGMT("invalid len in auth request:%d \n", skb->len);
+		return -1;
+	}
+	
+	a = (struct rtllib_assoc_request_frame*) skb->data;
+		
+	memcpy(dest,a->header.addr2,ETH_ALEN);
+	
+	return 0;
+}
+
+static inline u16 assoc_parse(struct rtllib_device *ieee, struct sk_buff *skb, int *aid)
+{
+	struct rtllib_assoc_response_frame *response_head;
+	u16 status_code;
+
+	if (skb->len <  sizeof(struct rtllib_assoc_response_frame)){ 
+		RTLLIB_DEBUG_MGMT("invalid len in auth resp: %d\n", skb->len);
+		return 0xcafe;
+	}
+	
+	response_head = (struct rtllib_assoc_response_frame*) skb->data;
+	*aid = le16_to_cpu(response_head->aid) & 0x3fff;
+
+	status_code = le16_to_cpu(response_head->status);
+	if((status_code==WLAN_STATUS_ASSOC_DENIED_RATES || \
+	   status_code==WLAN_STATUS_CAPS_UNSUPPORTED)&&
+	   ((ieee->mode == IEEE_G) && 
+	    (ieee->current_network.mode == IEEE_N_24G) &&
+            (ieee->AsocRetryCount++ < (RT_ASOC_RETRY_LIMIT-1)))) {
+                 ieee->pHTInfo->IOTAction |= HT_IOT_ACT_PURE_N_MODE;
+	}else {
+		 ieee->AsocRetryCount = 0;
+	}
+
+	return le16_to_cpu(response_head->status);
+}
+
+void rtllib_rx_probe_rq(struct rtllib_device *ieee, struct sk_buff *skb)
+{
+	u8 dest[ETH_ALEN];
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
+	struct sta_info *psta = NULL;
+#endif
+	ieee->softmac_stats.rx_probe_rq++;
+	if (probe_rq_parse(ieee, skb, dest) > 0){
+		ieee->softmac_stats.tx_probe_rs++;
+		rtllib_resp_to_probe(ieee, dest);
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
+		if(ieee->iw_mode == IW_MODE_ADHOC){
+			psta = GetStaInfo(ieee, dest);
+			if(NULL != psta)
+				psta->LastActiveTime = jiffies;
+		}
+#endif
+	}
+}
+
+static inline void rtllib_rx_auth_rq(struct rtllib_device *ieee, struct sk_buff *skb)
+{
+	u8 dest[ETH_ALEN];
+	int status;
+	ieee->softmac_stats.rx_auth_rq++;
+
+	if ((status = auth_rq_parse(skb, dest))!= -1){
+		rtllib_resp_to_auth(ieee, status, dest);
+	}
+
+}
+
+static inline void rtllib_rx_assoc_rq(struct rtllib_device *ieee, struct sk_buff *skb)
+{
+	
+	u8 dest[ETH_ALEN];
+	
+	ieee->softmac_stats.rx_ass_rq++;
+	if (assoc_rq_parse(skb,dest) != -1){
+		rtllib_resp_to_assoc_rq(ieee, dest);
+	}
+	
+	printk(KERN_INFO"New client associated: "MAC_FMT"\n", MAC_ARG(dest));
+	#if 0
+	spin_lock_irqsave(&ieee->lock,flags);
+	add_associate(ieee,dest);
+	spin_unlock_irqrestore(&ieee->lock,flags);
+	#endif
+}
+
+
+void rtllib_sta_ps_send_null_frame(struct rtllib_device *ieee, short pwr)
+{
+	
+	struct sk_buff *buf = rtllib_null_func(ieee, pwr);
+	
+	if (buf)
+		softmac_ps_mgmt_xmit(buf, ieee);
+
+} 
+
+void rtllib_sta_ps_send_pspoll_frame(struct rtllib_device *ieee)
+{
+	
+	struct sk_buff *buf = rtllib_pspoll_func(ieee);
+	
+	if (buf)
+		softmac_ps_mgmt_xmit(buf, ieee);
+
+} 
+
+short rtllib_sta_ps_sleep(struct rtllib_device *ieee, u32 *time_h, u32 *time_l)
+{	
+	int timeout = ieee->ps_timeout;
+	u8 dtim;
+	PRT_POWER_SAVE_CONTROL	pPSC = (PRT_POWER_SAVE_CONTROL)(&(ieee->PowerSaveControl));
+	/*if(ieee->ps == RTLLIB_PS_DISABLED ||
+		ieee->iw_mode != IW_MODE_INFRA || 
+		ieee->state != RTLLIB_LINKED)
+		
+		return 0;
+	*/
+
+	if(ieee->LPSDelayCnt)
+	{
+		ieee->LPSDelayCnt --;
+		return 0;
+	}
+		
+	dtim = ieee->current_network.dtim_data;
+	if(!(dtim & RTLLIB_DTIM_VALID))
+		return 0;
+	timeout = ieee->current_network.beacon_interval; 
+	ieee->current_network.dtim_data = RTLLIB_DTIM_INVALID;
+	/* there's no need to nofity AP that I find you buffered with broadcast packet */
+	if(dtim & (RTLLIB_DTIM_UCAST & ieee->ps))
+		return 2;
+	
+	if(!time_after(jiffies, ieee->dev->trans_start + MSECS(timeout))){
+		return 0;
+	}
+	if(!time_after(jiffies, ieee->last_rx_ps_time + MSECS(timeout))){
+		return 0;
+	}
+	if((ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE ) &&
+		(ieee->mgmt_queue_tail != ieee->mgmt_queue_head))
+		return 0;
+	
+	if(time_l){
+		if(ieee->bAwakePktSent == true) {
+			pPSC->LPSAwakeIntvl = 1;
+		} else {
+			u8		MaxPeriod = 1;
+
+			if(pPSC->LPSAwakeIntvl == 0)
+				pPSC->LPSAwakeIntvl = 1;
+			if(pPSC->RegMaxLPSAwakeIntvl == 0) 
+				MaxPeriod = 1; 
+			else if(pPSC->RegMaxLPSAwakeIntvl == 0xFF) 
+				MaxPeriod = ieee->current_network.dtim_period;
+			else
+				MaxPeriod = pPSC->RegMaxLPSAwakeIntvl;
+			pPSC->LPSAwakeIntvl = (pPSC->LPSAwakeIntvl >= MaxPeriod) ? MaxPeriod : (pPSC->LPSAwakeIntvl + 1);
+		}
+		{
+			u8 LPSAwakeIntvl_tmp = 0;
+			u8 period = ieee->current_network.dtim_period;
+			u8 count = ieee->current_network.tim.tim_count;
+			if(count == 0 ) {
+				if(pPSC->LPSAwakeIntvl > period)
+					LPSAwakeIntvl_tmp = period + (pPSC->LPSAwakeIntvl - period) -((pPSC->LPSAwakeIntvl-period)%period);
+				else
+					LPSAwakeIntvl_tmp = pPSC->LPSAwakeIntvl;
+
+			} else {
+				if(pPSC->LPSAwakeIntvl > ieee->current_network.tim.tim_count)
+					LPSAwakeIntvl_tmp = count + (pPSC->LPSAwakeIntvl - count) -((pPSC->LPSAwakeIntvl-count)%period);
+				else
+					LPSAwakeIntvl_tmp = pPSC->LPSAwakeIntvl;
+			}
+		
+		*time_l = ieee->current_network.last_dtim_sta_time[0] 
+			+ MSECS(ieee->current_network.beacon_interval * LPSAwakeIntvl_tmp); 
+	}
+	}
+	
+	if(time_h){
+#ifdef _RTL8192_EXT_PATCH_
+		if(time_l && *time_l < ieee->current_network.last_dtim_sta_time[0])
+			*time_h =1;
+		else
+			*time_h =0;
+#else
+		*time_h = ieee->current_network.last_dtim_sta_time[1];
+		if(time_l && *time_l < ieee->current_network.last_dtim_sta_time[0])
+			*time_h += 1;
+#endif
+	}
+	
+	return 1;
+	
+	
+}
+
+inline void rtllib_sta_ps(struct rtllib_device *ieee)
+{
+
+	u32 th,tl;
+	short sleep;
+	
+	unsigned long flags,flags2;
+	
+	spin_lock_irqsave(&ieee->lock, flags);
+	
+	if((ieee->ps == RTLLIB_PS_DISABLED ||
+		ieee->iw_mode != IW_MODE_INFRA || 
+		ieee->state != RTLLIB_LINKED)){
+		
+		printk("=====>%s(): no need to ps,wake up!! ieee->ps is %d,ieee->iw_mode is %d,ieee->state is %d\n",
+			__FUNCTION__,ieee->ps,ieee->iw_mode,ieee->state);
+		spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2);
+		
+		rtllib_sta_wakeup(ieee, 1);	
+		
+		spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags2);
+	}
+	
+	sleep = rtllib_sta_ps_sleep(ieee,&th, &tl);
+	/* 2 wake, 1 sleep, 0 do nothing */
+	if(sleep == 0)
+	{
+		goto out;
+	}
+	if(sleep == 1){
+		if(ieee->sta_sleep == 1){
+			ieee->enter_sleep_state(ieee->dev,th,tl);
+		}
+		
+		else if(ieee->sta_sleep == 0){
+			spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2);
+			
+			if(ieee->ps_is_queue_empty(ieee->dev)){
+				ieee->sta_sleep = 2;
+				ieee->ack_tx_to_ieee = 1;
+				rtllib_sta_ps_send_null_frame(ieee,1);
+				ieee->ps_th = th;
+				ieee->ps_tl = tl;
+			}		
+			spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags2);
+			
+		}
+		
+		ieee->bAwakePktSent = false;
+		
+	}else if(sleep == 2){
+		spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2);
+			
+		rtllib_sta_wakeup(ieee,1);
+		
+		spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags2);
+	}
+
+out:	
+	spin_unlock_irqrestore(&ieee->lock, flags);
+	
+}
+
+void rtllib_sta_wakeup(struct rtllib_device *ieee, short nl)
+{
+	if(ieee->sta_sleep == 0){
+		if(nl){
+			if(ieee->pHTInfo->IOTAction & HT_IOT_ACT_NULL_DATA_POWER_SAVING)
+			{
+				ieee->ack_tx_to_ieee = 1;
+				rtllib_sta_ps_send_null_frame(ieee, 0);
+			}
+			else 
+			{
+				ieee->ack_tx_to_ieee = 1;
+				rtllib_sta_ps_send_pspoll_frame(ieee);
+			}
+		}
+		return;
+		
+	}
+	
+	if(ieee->sta_sleep == 1) 
+		ieee->sta_wake_up(ieee->dev);
+	if(nl){
+		/*		
+			ieee->ack_tx_to_ieee = 1;
+			printk("%s(3): notify AP we are awaked ++++++++++ SendNullFunctionData\n", __func__);
+			rtllib_sta_ps_send_null_frame(ieee, 0);
+		*/
+		if(ieee->pHTInfo->IOTAction & HT_IOT_ACT_NULL_DATA_POWER_SAVING)
+		{
+			ieee->ack_tx_to_ieee = 1;
+			rtllib_sta_ps_send_null_frame(ieee, 0);
+		}
+		else 
+		{
+			ieee->ack_tx_to_ieee = 1;
+			ieee->polling = true;
+			rtllib_sta_ps_send_pspoll_frame(ieee);
+		}
+
+	} else {
+		ieee->sta_sleep = 0;
+		ieee->polling = false;
+	}
+}
+
+void rtllib_ps_tx_ack(struct rtllib_device *ieee, short success)
+{
+	unsigned long flags,flags2;
+	
+	spin_lock_irqsave(&ieee->lock, flags);
+	
+	if(ieee->sta_sleep == 2){
+		/* Null frame with PS bit set */
+		if(success){
+			ieee->sta_sleep = 1;
+			ieee->enter_sleep_state(ieee->dev,ieee->ps_th,ieee->ps_tl);
+		}
+		/* if the card report not success we can't be sure the AP
+		 * has not RXed so we can't assume the AP believe us awake
+		 */
+	} else {/* 21112005 - tx again null without PS bit if lost */
+	
+		if((ieee->sta_sleep == 0) && !success){
+			spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2);
+			if(ieee->pHTInfo->IOTAction & HT_IOT_ACT_NULL_DATA_POWER_SAVING)
+			{
+				rtllib_sta_ps_send_null_frame(ieee, 0);
+			}
+			else 
+			{
+				rtllib_sta_ps_send_pspoll_frame(ieee);
+			}
+			spin_unlock_irqrestore(&ieee->mgmt_tx_lock, flags2);
+		}
+	}
+	spin_unlock_irqrestore(&ieee->lock, flags);
+}
+
+void rtllib_process_action(struct rtllib_device* ieee, struct sk_buff* skb)
+{
+	struct rtllib_hdr_3addr *header = (struct rtllib_hdr_3addr *) skb->data;
+	u8* act = rtllib_get_payload((struct rtllib_hdr *)header);
+	u8 category = 0;
+
+	if (act == NULL) {
+		RTLLIB_DEBUG(RTLLIB_DL_ERR, "error to get payload of action frame\n");
+		return;
+	}
+
+	category = *act;
+	act ++;
+	switch (category) {
+		case ACT_CAT_BA:
+			switch (*act) {
+				case ACT_ADDBAREQ:
+					rtllib_rx_ADDBAReq(ieee, skb);
+					break;
+				case ACT_ADDBARSP:
+					rtllib_rx_ADDBARsp(ieee, skb);
+					break;
+				case ACT_DELBA:
+					rtllib_rx_DELBA(ieee, skb);
+					break;
+			}
+			break;
+		default:
+			break;
+	}
+	return;
+}
+
+#ifdef _RTL8192_EXT_PATCH_      
+void rtllib_process_action_mesh(struct rtllib_device* ieee, struct sk_buff* skb,
+		struct rtllib_rx_stats *rx_stats)
+{
+	struct rtllib_hdr_3addr *header = NULL;
+	u8* act = NULL;
+	u8 category = 0;
+
+#ifdef COMPATIBLE_WITH_RALINK_MESH	
+	memmove(skb->data + WLAN_MESH_HDR_LEN, skb->data, sizeof(struct rtllib_hdr_3addr));
+	skb_pull(skb, WLAN_MESH_HDR_LEN);
+#endif
+	
+	header = (struct rtllib_hdr_3addr *) skb->data;
+	act = rtllib_get_payload((struct rtllib_hdr *)header);
+
+	if (act == NULL) {
+		RTLLIB_DEBUG(RTLLIB_DL_ERR, "error to get payload of action frame\n");
+		return;
+	}
+	if (ieee->iw_mode != IW_MODE_MESH) {
+		RTLLIB_DEBUG(RTLLIB_DL_ERR, "not in mesh mode\n");
+		return;
+	}
+
+	category = *act;
+	act ++;
+	switch (category) {
+		case ACT_CAT_MESH_PEERLINK_MGNT:
+			if(ieee->iw_mode != IW_MODE_MESH) {
+				RTLLIB_DEBUG(RTLLIB_DL_ERR, "peerlink received not in mesh mode\n");
+				return;
+			}
+			switch (*act) {
+				case ACT_PEERLINK_OPEN:
+					if (ieee->ext_patch_rtllib_rx_frame_softmac_on_peerlink_open) {
+						ieee->ext_patch_rtllib_rx_frame_softmac_on_peerlink_open(ieee, skb, rx_stats);
+					}
+					break;
+				case ACT_PEERLINK_CONFIRM:
+					if (ieee->ext_patch_rtllib_rx_frame_softmac_on_peerlink_confirm) {
+						ieee->ext_patch_rtllib_rx_frame_softmac_on_peerlink_confirm(ieee, skb);
+					}
+					break;
+				case ACT_PEERLINK_CLOSE:
+					if ( ieee->ext_patch_rtllib_rx_frame_softmac_on_peerlink_close) {
+						ieee->ext_patch_rtllib_rx_frame_softmac_on_peerlink_close(ieee, skb);
+					}
+					break;
+			}
+			break;
+		case ACT_CAT_MESH_LINK_METRIC:
+			if (ieee->iw_mode != IW_MODE_MESH) {
+				RTLLIB_DEBUG(RTLLIB_DL_ERR, "link metric received not in mesh mode\n");
+				return;
+			}
+			switch (*act) {
+				case ACT_LINKMETRIC_REQ:
+					if (ieee->ext_patch_rtllib_rx_frame_softmac_on_linkmetric_req) {
+						ieee->ext_patch_rtllib_rx_frame_softmac_on_linkmetric_req(
+								ieee, skb);
+					}
+					break;
+				case ACT_LINKMETRIC_RSP:
+					if (ieee->ext_patch_rtllib_rx_frame_softmac_on_linkmetric_report) {
+						ieee->ext_patch_rtllib_rx_frame_softmac_on_linkmetric_report(
+								ieee, skb);
+					}
+					break;
+			}
+
+			break;
+		case ACT_CAT_MESH_PATH_SELECT:
+			if (ieee->iw_mode != IW_MODE_MESH) {
+				RTLLIB_DEBUG(RTLLIB_DL_ERR, "not in mesh mode\n");
+				return;
+			}
+
+			switch (*act) {
+				case ACT_PATH_REQ:
+					if( ieee->ext_patch_rtllib_rx_frame_softmac_on_pathselect_preq) {
+						ieee->ext_patch_rtllib_rx_frame_softmac_on_pathselect_preq(
+								ieee, skb, rx_stats);
+					}
+					break;
+				case ACT_PATH_REPLY:
+					if(ieee->ext_patch_rtllib_rx_frame_softmac_on_pathselect_prep) {
+						ieee->ext_patch_rtllib_rx_frame_softmac_on_pathselect_prep(
+								ieee, skb, rx_stats);
+					}
+					break;
+				case ACT_PATH_ERR:
+					if(ieee->ext_patch_rtllib_rx_frame_softmac_on_pathselect_perr) {
+						ieee->ext_patch_rtllib_rx_frame_softmac_on_pathselect_perr(
+								ieee, skb, rx_stats);
+					}
+					break;
+				case ACT_RANN:
+					if(ieee->ext_patch_rtllib_rx_frame_softmac_on_pathselect_rann) {
+						ieee->ext_patch_rtllib_rx_frame_softmac_on_pathselect_rann(
+								ieee, skb, rx_stats);
+					}
+					break;
+			}
+			break;
+		case ACT_CAT_MESH_INTERWORKING:
+			if (ieee->iw_mode != IW_MODE_MESH) {
+				RTLLIB_DEBUG(RTLLIB_DL_ERR, "not in mesh mode\n");
+				return;
+			}
+			if (*act == 0) {
+				if (ieee->ext_patch_rtllib_rx_frame_softmac_on_pathselect_pann) {
+					ieee->ext_patch_rtllib_rx_frame_softmac_on_pathselect_pann(
+							ieee, skb, rx_stats);
+				}
+			}
+			break;
+		default:
+			break;
+	}
+	return;
+}
+#endif
+
+inline int rtllib_rx_frame_softmac(struct rtllib_device *ieee, struct sk_buff *skb,
+			struct rtllib_rx_stats *rx_stats, u16 type,
+			u16 stype)
+{
+	struct rtllib_hdr_3addr *header = (struct rtllib_hdr_3addr *) skb->data;
+	u8* ies;
+	u16 errcode;
+	u8* challenge;
+	int chlen=0;
+	int aid;
+#ifdef _RTL8192_EXT_PATCH_
+	u8 mesh_bssid[6] = {0,0,0,0,0,0};
+#endif
+	struct rtllib_assoc_response_frame *assoc_resp;
+	bool bSupportNmode = true, bHalfSupportNmode = false; 
+	
+#ifdef _RTL8192_EXT_PATCH_
+	if((!ieee->proto_started)&&(!ieee->mesh_started))
+#else
+	if(!ieee->proto_started)
+#endif
+		return 0;
+		
+	switch (WLAN_FC_GET_STYPE(header->frame_ctl)) {
+	
+		case RTLLIB_STYPE_ASSOC_RESP:
+		case RTLLIB_STYPE_REASSOC_RESP:
+		
+			RTLLIB_DEBUG_MGMT("received [RE]ASSOCIATION RESPONSE (%d)\n",
+					WLAN_FC_GET_STYPE(header->frame_ctl));
+			if ((ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) &&
+				ieee->state == RTLLIB_ASSOCIATING_AUTHENTICATED && 
+#ifdef _RTL8192_EXT_PATCH_
+				((ieee->iw_mode == IW_MODE_INFRA) || 
+				(ieee->iw_mode == IW_MODE_MESH && ieee->only_mesh == 0)))
+#else
+				(ieee->iw_mode == IW_MODE_INFRA)) 
+#endif
+			{
+				if (0 == (errcode=assoc_parse(ieee,skb, &aid))){
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13))
+					struct rtllib_network *network = kzalloc(sizeof(struct rtllib_network), GFP_ATOMIC);
+#else
+					struct rtllib_network *network = kmalloc(sizeof(*network), GFP_KERNEL);
+#endif
+					if (!network) {
+						return 1;
+					}
+					memset(network,0,sizeof(*network));
+					ieee->state=RTLLIB_LINKED;
+					ieee->assoc_id = aid;
+					ieee->softmac_stats.rx_ass_ok++;
+					/* station support qos */
+					/* Let the register setting defaultly with Legacy station */
+					assoc_resp = (struct rtllib_assoc_response_frame*)skb->data;
+					if(ieee->current_network.qos_data.supported == 1) {
+						if (rtllib_parse_info_param(ieee,assoc_resp->info_element,\
+									rx_stats->len - sizeof(*assoc_resp),\
+									network,rx_stats)){
+							kfree(network);
+							return 1;
+						}
+						else
+						{	
+							memcpy(ieee->pHTInfo->PeerHTCapBuf, network->bssht.bdHTCapBuf, network->bssht.bdHTCapLen);
+							memcpy(ieee->pHTInfo->PeerHTInfoBuf, network->bssht.bdHTInfoBuf, network->bssht.bdHTInfoLen);
+						}
+						if (ieee->handle_assoc_response != NULL)
+							ieee->handle_assoc_response(ieee->dev, (struct rtllib_assoc_response_frame*)header, network);
+						kfree(network);
+					}
+
+					if(ieee->assocresp_ies){
+						kfree(ieee->assocresp_ies);
+						ieee->assocresp_ies = NULL;
+					}
+					ies = &(assoc_resp->info_element[0].id);
+					ieee->assocresp_ies_len = (skb->data + skb->len) - ies;
+					ieee->assocresp_ies = kmalloc(ieee->assocresp_ies_len, GFP_ATOMIC);
+					if (ieee->assocresp_ies)
+						memcpy(ieee->assocresp_ies, ies, ieee->assocresp_ies_len);
+					else{
+						printk("%s()Warning: can't alloc memory for assocresp_ies\n", __func__);
+						ieee->assocresp_ies_len = 0;
+					}	
+#ifdef RTL8192S_WAPI_SUPPORT
+					{
+						PRT_WAPI_T pWapiInfo = &(ieee->wapiInfo);
+						PRT_WAPI_STA_INFO pWapiSta;
+						u8 WapiAEPNInitialValueSrc[16] = {0x37,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ;
+						u8 WapiAEMultiCastPNInitialValueSrc[16] = {0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C,0x36,0x5C} ;	
+						if ((ieee->WapiSupport) && (ieee->wapiInfo.bWapiEnable))
+						{
+							pWapiSta =(PRT_WAPI_STA_INFO)list_entry(pWapiInfo->wapiSTAIdleList.next, RT_WAPI_STA_INFO, list);
+							list_del_init(&pWapiSta->list);
+							list_add_tail(&pWapiSta->list, &pWapiInfo->wapiSTAUsedList);
+							WAPI_TRACE(WAPI_API, "%s(): New WAPI STA ("MAC_FMT")!!\n",__FUNCTION__,MAC_ARG(ieee->current_network.bssid));
+							memcpy(pWapiSta->PeerMacAddr,ieee->current_network.bssid,6);
+							memcpy(pWapiSta->lastRxMulticastPN, WapiAEMultiCastPNInitialValueSrc, 16);
+							memcpy(pWapiSta->lastRxUnicastPN, WapiAEPNInitialValueSrc, 16);
+							pWapiInfo->bFirstAuthentiateInProgress= true;
+							pWapiInfo->assoRspWapiIE[0] = MFIE_TYPE_WAPI;
+							pWapiInfo->assoRspWapiIE[1] = network->wapi_ie_len;
+							pWapiInfo->assoRspWapiIELength = network->wapi_ie_len+2;
+							memcpy(pWapiInfo->assoRspWapiIE+2,network->wapi_ie,network->wapi_ie_len);
+						}
+					}
+#endif	
+					rtllib_associate_complete(ieee);
+				} else {
+					/* aid could not been allocated */
+					ieee->softmac_stats.rx_ass_err++;
+					printk(
+						"Association response status code 0x%x\n",
+						errcode);
+					RTLLIB_DEBUG_MGMT(
+						"Association response status code 0x%x\n",
+						errcode);
+					if(ieee->AsocRetryCount < RT_ASOC_RETRY_LIMIT) {
+						queue_delayed_work_rsl(ieee->wq, &ieee->associate_procedure_wq, 0);
+					} else {
+						rtllib_associate_abort(ieee); 
+					}
+				}
+			}
+			break;
+		
+		case RTLLIB_STYPE_ASSOC_REQ:
+		case RTLLIB_STYPE_REASSOC_REQ:
+		
+			if ((ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) &&
+				ieee->iw_mode == IW_MODE_MASTER)
+					
+				rtllib_rx_assoc_rq(ieee, skb);
+			break;
+			
+		case RTLLIB_STYPE_AUTH:
+#ifdef _RTL8192_EXT_PATCH_
+			if((ieee->iw_mode == IW_MODE_MESH) && ieee->ext_patch_rtllib_rx_frame_softmac_on_auth && ieee->mesh_started && ((memcmp(header->addr3, ieee->current_network.bssid, 6)) || (memcmp(ieee->current_network.bssid, mesh_bssid, 6) == 0))) 
+				ieee->ext_patch_rtllib_rx_frame_softmac_on_auth(ieee, skb, rx_stats);
+			else
+#endif
+			if (ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE){
+				if (ieee->state == RTLLIB_ASSOCIATING_AUTHENTICATING && 
+#ifdef _RTL8192_EXT_PATCH_
+					((ieee->iw_mode == IW_MODE_INFRA)||
+					((ieee->iw_mode == IW_MODE_MESH) && (ieee->only_mesh == 0))))
+#else
+					(ieee->iw_mode == IW_MODE_INFRA))
+#endif
+				{
+						RTLLIB_DEBUG_MGMT("Received authentication response");
+						
+						if (0 == (errcode=auth_parse(skb, &challenge, &chlen))){
+							if(ieee->open_wep || !challenge){
+								ieee->state = RTLLIB_ASSOCIATING_AUTHENTICATED;
+								ieee->softmac_stats.rx_auth_rs_ok++;
+								if(!(ieee->pHTInfo->IOTAction&HT_IOT_ACT_PURE_N_MODE))
+								{
+									if (!ieee->GetNmodeSupportBySecCfg(ieee->dev))
+									{
+										if(IsHTHalfNmodeAPs(ieee))
+										{	
+											bSupportNmode = true;
+											bHalfSupportNmode = true;
+										}
+										else
+										{
+											bSupportNmode = false;
+											bHalfSupportNmode = false;
+										}
+									printk("==========>to link with AP using SEC(%d, %d)", bSupportNmode, bHalfSupportNmode);
+									}
+								}								
+								/* Dummy wirless mode setting to avoid encryption issue */
+								if(bSupportNmode) {
+									ieee->SetWirelessMode(ieee->dev, \
+											ieee->current_network.mode);
+								}else{
+									/*TODO*/
+									ieee->SetWirelessMode(ieee->dev, IEEE_G);
+								}
+
+								if (ieee->current_network.mode == IEEE_N_24G && bHalfSupportNmode == true)
+								{
+									printk("===============>entern half N mode\n");
+									ieee->bHalfWirelessN24GMode = true;
+								}
+								else
+									ieee->bHalfWirelessN24GMode = false;
+								
+								rtllib_associate_step2(ieee);
+							}else{
+								rtllib_auth_challenge(ieee, challenge, chlen);
+							}
+						}else{
+							ieee->softmac_stats.rx_auth_rs_err++;
+							RTLLIB_DEBUG_MGMT("Authentication respose status code 0x%x",errcode);
+
+							printk("Authentication respose status code 0x%x",errcode);
+							rtllib_associate_abort(ieee);
+						}
+						
+					}else if (ieee->iw_mode == IW_MODE_MASTER){
+						rtllib_rx_auth_rq(ieee, skb);
+					}
+				}
+			break;
+#if 0				
+		case RTLLIB_STYPE_PROBE_REQ:
+
+			if ((ieee->softmac_features & IEEE_SOFTMAC_PROBERS) && 
+				((ieee->iw_mode == IW_MODE_ADHOC || 
+				ieee->iw_mode == IW_MODE_MASTER) &&
+				ieee->state == RTLLIB_LINKED)){
+				rtllib_rx_probe_rq(ieee, skb);
+			}
+			break;
+#endif			
+		case RTLLIB_STYPE_DISASSOC:
+		case RTLLIB_STYPE_DEAUTH:
+
+			if(memcmp(header->addr3, ieee->current_network.bssid, ETH_ALEN) != 0)
+				break;
+			/* FIXME for now repeat all the association procedure 
+			* both for disassociation and deauthentication
+			*/
+			if ((ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) &&
+				ieee->state == RTLLIB_LINKED && 
+#ifdef _RTL8192_EXT_PATCH_
+				((ieee->iw_mode == IW_MODE_INFRA) ||
+				((ieee->iw_mode == IW_MODE_MESH) && (ieee->only_mesh == 0))))
+#else
+				(ieee->iw_mode == IW_MODE_INFRA))
+#endif
+			{
+				printk("==========>received disassoc/deauth(%x) frame, reason code:%x\n",WLAN_FC_GET_STYPE(header->frame_ctl), ((struct rtllib_disassoc*)skb->data)->reason);	
+				ieee->state = RTLLIB_ASSOCIATING;
+				ieee->softmac_stats.reassoc++;
+				ieee->is_roaming = true;
+				ieee->LinkDetectInfo.bBusyTraffic = false;
+				rtllib_disassociate(ieee);
+				RemovePeerTS(ieee, header->addr2); 	
+				if(ieee->LedControlHandler != NULL)
+				        ieee->LedControlHandler(ieee->dev, LED_CTL_START_TO_LINK); 
+				queue_delayed_work_rsl(ieee->wq, &ieee->associate_procedure_wq, 5);
+			}
+			break;
+		case RTLLIB_STYPE_MANAGE_ACT:
+			rtllib_process_action(ieee,skb);
+#ifdef _RTL8192_EXT_PATCH_
+			rtllib_process_action_mesh(ieee,skb,rx_stats);
+#endif
+			break;
+#ifdef COMPATIBLE_WITH_RALINK_MESH
+		case RTLLIB_STYPE_MESH_ACT:
+			rtllib_process_action_mesh(ieee,skb,rx_stats);
+			break;
+#endif			
+		default: 
+			return -1;
+			break;
+	}
+	
+	return 0;
+}
+
+/* following are for a simplier TX queue management.
+ * Instead of using netif_[stop/wake]_queue the driver
+ * will uses these two function (plus a reset one), that
+ * will internally uses the kernel netif_* and takes
+ * care of the ieee802.11 fragmentation.
+ * So the driver receives a fragment per time and might
+ * call the stop function when it want without take care
+ * to have enought room to TX an entire packet.
+ * This might be useful if each fragment need it's own
+ * descriptor, thus just keep a total free memory > than
+ * the max fragmentation treshold is not enought.. If the
+ * ieee802.11 stack passed a TXB struct then you needed  
+ * to keep N free descriptors where 
+ * N = MAX_PACKET_SIZE / MIN_FRAG_TRESHOLD
+ * In this way you need just one and the 802.11 stack
+ * will take care of buffering fragments and pass them to 
+ * to the driver later, when it wakes the queue.
+ */ 
+void rtllib_softmac_xmit(struct rtllib_txb *txb, struct rtllib_device *ieee)
+{
+
+	unsigned int queue_index = txb->queue_index;
+	unsigned long flags;
+	int  i;
+	cb_desc *tcb_desc = NULL;
+	unsigned long queue_len = 0;
+
+	spin_lock_irqsave(&ieee->lock,flags);
+
+	/* called with 2nd parm 0, no tx mgmt lock required */
+	rtllib_sta_wakeup(ieee,0);
+
+	/* update the tx status */
+	tcb_desc = (cb_desc *)(txb->fragments[0]->cb + MAX_DEV_ADDR_SIZE);
+	if(tcb_desc->bMulticast) {
+		ieee->stats.multicast++;
+	}
+#if 1
+	/* if xmit available, just xmit it immediately, else just insert it to the wait queue */
+	for(i = 0; i < txb->nr_frags; i++) {
+#ifdef USB_TX_DRIVER_AGGREGATION_ENABLE
+		queue_len = skb_queue_len(&ieee->skb_drv_aggQ[queue_index]);
+#else
+		queue_len = skb_queue_len(&ieee->skb_waitQ[queue_index]);
+#endif
+		if((queue_len  != 0) ||\
+			(!ieee->check_nic_enough_desc(ieee->dev,queue_index))||\
+		       (ieee->queue_stop)) {
+			/* insert the skb packet to the wait queue */
+			/* as for the completion function, it does not need 
+			 * to check it any more.
+			 * */
+#ifdef WIFI_TEST
+			if (1) 
+#else
+			if(queue_len < 200)
+#endif
+			{
+#ifdef USB_TX_DRIVER_AGGREGATION_ENABLE
+				skb_queue_tail(&ieee->skb_drv_aggQ[queue_index], txb->fragments[i]);
+#else
+				skb_queue_tail(&ieee->skb_waitQ[queue_index], txb->fragments[i]);
+#endif
+			}else{
+				kfree_skb(txb->fragments[i]);
+			}
+		}else{
+			ieee->softmac_data_hard_start_xmit(
+					txb->fragments[i],
+					ieee->dev,ieee->rate);
+		}
+	}	
+#endif
+	rtllib_txb_free(txb);
+
+	spin_unlock_irqrestore(&ieee->lock,flags);
+
+}
+
+/* called with ieee->lock acquired */
+void rtllib_resume_tx(struct rtllib_device *ieee)
+{
+	int i;
+	for(i = ieee->tx_pending.frag; i < ieee->tx_pending.txb->nr_frags; i++) {
+		
+		if (ieee->queue_stop){
+			ieee->tx_pending.frag = i;
+			return;
+		}else{
+		
+			ieee->softmac_data_hard_start_xmit( 
+				ieee->tx_pending.txb->fragments[i],
+				ieee->dev,ieee->rate);
+			ieee->stats.tx_packets++;
+		}
+	}
+	
+	rtllib_txb_free(ieee->tx_pending.txb);
+	ieee->tx_pending.txb = NULL;
+}
+
+
+void rtllib_reset_queue(struct rtllib_device *ieee)
+{
+	unsigned long flags;
+	
+	spin_lock_irqsave(&ieee->lock,flags);
+	init_mgmt_queue(ieee);
+	if (ieee->tx_pending.txb){
+		rtllib_txb_free(ieee->tx_pending.txb);
+		ieee->tx_pending.txb = NULL;
+	}
+	ieee->queue_stop = 0;
+	spin_unlock_irqrestore(&ieee->lock,flags);
+
+}
+
+void rtllib_wake_queue(struct rtllib_device *ieee)
+{
+
+	unsigned long flags;
+	struct sk_buff *skb;
+	struct rtllib_hdr_3addr  *header;
+	
+	spin_lock_irqsave(&ieee->lock,flags);
+	if (! ieee->queue_stop) goto exit;
+	
+	ieee->queue_stop = 0;
+	
+	if(ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE){
+		while (!ieee->queue_stop && (skb = dequeue_mgmt(ieee))){
+			
+			header = (struct rtllib_hdr_3addr  *) skb->data;
+			
+			header->seq_ctl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
+
+			if (ieee->seq_ctrl[0] == 0xFFF)
+				ieee->seq_ctrl[0] = 0;
+			else
+				ieee->seq_ctrl[0]++;
+
+			ieee->softmac_data_hard_start_xmit(skb,ieee->dev,ieee->basic_rate);
+		}
+	}
+	if (!ieee->queue_stop && ieee->tx_pending.txb)
+		rtllib_resume_tx(ieee);
+	
+	if (!ieee->queue_stop && netif_queue_stopped(ieee->dev)){
+		ieee->softmac_stats.swtxawake++;
+		netif_wake_queue(ieee->dev);
+	}
+	
+exit :
+	spin_unlock_irqrestore(&ieee->lock,flags);
+}
+
+
+void rtllib_stop_queue(struct rtllib_device *ieee)
+{
+
+	if (! netif_queue_stopped(ieee->dev)){
+		netif_stop_queue(ieee->dev);
+		ieee->softmac_stats.swtxstop++;
+	}
+	ieee->queue_stop = 1;
+	
+}
+
+void rtllib_stop_all_queues(struct rtllib_device *ieee)
+{
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,30)
+	unsigned int i;
+	for(i=0; i < ieee->dev->num_tx_queues; i++)
+                netdev_get_tx_queue(ieee->dev,i)->trans_start = jiffies;
+#else
+	ieee->dev->trans_start = jiffies;
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27) 
+	netif_carrier_off(ieee->dev);
+#else
+	netif_tx_stop_all_queues(ieee->dev);
+#endif
+}
+
+void rtllib_wake_all_queues(struct rtllib_device *ieee)
+{
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27) 
+	netif_carrier_on(ieee->dev);
+#else
+	netif_tx_wake_all_queues(ieee->dev);
+#endif
+}
+
+inline void rtllib_randomize_cell(struct rtllib_device *ieee)
+{
+	
+	get_random_bytes(ieee->current_network.bssid, ETH_ALEN);
+	
+	/* an IBSS cell address must have the two less significant
+	 * bits of the first byte = 2 
+	 */
+	ieee->current_network.bssid[0] &= ~0x01;
+	ieee->current_network.bssid[0] |= 0x02;
+}
+
+/* called in user context only */
+void rtllib_start_master_bss(struct rtllib_device *ieee)
+{
+	ieee->assoc_id = 1;
+	
+	if (ieee->current_network.ssid_len == 0){
+		strncpy(ieee->current_network.ssid, 
+			RTLLIB_DEFAULT_TX_ESSID,
+			IW_ESSID_MAX_SIZE);
+			
+		ieee->current_network.ssid_len = strlen(RTLLIB_DEFAULT_TX_ESSID);
+		ieee->ssid_set = 1;
+	}
+	
+	memcpy(ieee->current_network.bssid, ieee->dev->dev_addr, ETH_ALEN);
+	 
+	ieee->set_chan(ieee->dev, ieee->current_network.channel);
+	ieee->state = RTLLIB_LINKED;
+#if defined (RTL8192S_WAPI_SUPPORT)
+	if ((ieee->WapiSupport) && (ieee->wapiInfo.bWapiEnable)){
+		WAPI_CreateEvent_Send(ieee, WAPI_EVENT_CONNECT, ieee->current_network.bssid, NULL, 0);
+	}
+#endif
+	ieee->link_change(ieee->dev);
+	notify_wx_assoc_event(ieee);
+	
+	if (ieee->data_hard_resume)
+		ieee->data_hard_resume(ieee->dev);
+	
+	netif_carrier_on(ieee->dev);
+}
+
+void rtllib_start_monitor_mode(struct rtllib_device *ieee)
+{
+	/* reset hardware status */
+	if(ieee->raw_tx){
+		if (ieee->data_hard_resume)
+			ieee->data_hard_resume(ieee->dev);
+	
+		netif_carrier_on(ieee->dev);
+	}
+}
+
+void rtllib_start_ibss_wq(void *data)
+{
+	struct rtllib_device *ieee = container_of_dwork_rsl(data, struct rtllib_device, start_ibss_wq);
+	/* iwconfig mode ad-hoc will schedule this and return
+	 * on the other hand this will block further iwconfig SET
+	 * operations because of the wx_sem hold.
+	 * Anyway some most set operations set a flag to speed-up
+	 * (abort) this wq (when syncro scanning) before sleeping 
+	 * on the semaphore
+	 */
+	if(!ieee->proto_started){
+		printk("==========oh driver down return\n");
+		return;
+	}
+	down(&ieee->wx_sem);
+	
+	if (ieee->current_network.ssid_len == 0){
+		strcpy(ieee->current_network.ssid,RTLLIB_DEFAULT_TX_ESSID);
+		ieee->current_network.ssid_len = strlen(RTLLIB_DEFAULT_TX_ESSID);
+		ieee->ssid_set = 1;
+	} 
+	
+	ieee->state = RTLLIB_NOLINK;
+#ifdef ADHOC_11N
+	ieee->mode = IEEE_N_24G;
+#else
+	ieee->mode = IEEE_G;
+#endif
+	/* check if we have this cell in our network list */
+	rtllib_softmac_check_all_nets(ieee);
+	
+
+	/* if not then the state is not linked. Maybe the user swithced to
+	 * ad-hoc mode just after being in monitor mode, or just after
+	 * being very few time in managed mode (so the card have had no
+	 * time to scan all the chans..) or we have just run up the iface
+	 * after setting ad-hoc mode. So we have to give another try..
+	 * Here, in ibss mode, should be safe to do this without extra care
+	 * (in bss mode we had to make sure no-one tryed to associate when
+	 * we had just checked the ieee->state and we was going to start the
+	 * scan) beacause in ibss mode the rtllib_new_net function, when
+	 * finds a good net, just set the ieee->state to RTLLIB_LINKED,
+	 * so, at worst, we waste a bit of time to initiate an unneeded syncro
+	 * scan, that will stop at the first round because it sees the state
+	 * associated.
+	 */
+	if (ieee->state == RTLLIB_NOLINK)
+		rtllib_start_scan_syncro(ieee, 0);
+
+	/* the network definitively is not here.. create a new cell */
+	if (ieee->state == RTLLIB_NOLINK){
+		printk("creating new IBSS cell\n"); 
+		ieee->current_network.channel = ieee->IbssStartChnl;
+		if(!ieee->wap_set)
+			rtllib_randomize_cell(ieee);
+		
+		if(ieee->modulation & RTLLIB_CCK_MODULATION){
+		
+			ieee->current_network.rates_len = 4;
+			
+			ieee->current_network.rates[0] = RTLLIB_BASIC_RATE_MASK | RTLLIB_CCK_RATE_1MB;
+			ieee->current_network.rates[1] = RTLLIB_BASIC_RATE_MASK | RTLLIB_CCK_RATE_2MB;
+			ieee->current_network.rates[2] = RTLLIB_BASIC_RATE_MASK | RTLLIB_CCK_RATE_5MB;
+			ieee->current_network.rates[3] = RTLLIB_BASIC_RATE_MASK | RTLLIB_CCK_RATE_11MB;
+				
+		}else
+			ieee->current_network.rates_len = 0;
+		
+		if(ieee->modulation & RTLLIB_OFDM_MODULATION){
+			ieee->current_network.rates_ex_len = 8;
+			
+			/*ieee->current_network.rates_ex[0] = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_6MB;
+			ieee->current_network.rates_ex[1] = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_9MB;
+			ieee->current_network.rates_ex[2] = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_12MB;
+			ieee->current_network.rates_ex[3] = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_18MB;
+			ieee->current_network.rates_ex[4] = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_24MB;
+			ieee->current_network.rates_ex[5] = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_36MB;
+			ieee->current_network.rates_ex[6] = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_48MB;
+			ieee->current_network.rates_ex[7] = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_54MB;*/
+
+			ieee->current_network.rates_ex[0] = RTLLIB_OFDM_RATE_6MB;
+			ieee->current_network.rates_ex[1] = RTLLIB_OFDM_RATE_9MB;
+			ieee->current_network.rates_ex[2] = RTLLIB_OFDM_RATE_12MB;
+			ieee->current_network.rates_ex[3] = RTLLIB_OFDM_RATE_18MB;
+			ieee->current_network.rates_ex[4] = RTLLIB_OFDM_RATE_24MB;
+			ieee->current_network.rates_ex[5] = RTLLIB_OFDM_RATE_36MB;
+			ieee->current_network.rates_ex[6] = RTLLIB_OFDM_RATE_48MB;
+			ieee->current_network.rates_ex[7] = RTLLIB_OFDM_RATE_54MB;
+			
+			ieee->rate = 108;
+		}else{
+			ieee->current_network.rates_ex_len = 0;
+			ieee->rate = 22;
+		}
+
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
+#ifdef ADHOC_11N
+		ieee->current_network.qos_data.supported = 1;
+#else
+		ieee->current_network.qos_data.supported = 0;
+#endif
+		ieee->SetWirelessMode(ieee->dev, ieee->mode);
+#else
+		ieee->current_network.qos_data.supported = 0;
+		ieee->SetWirelessMode(ieee->dev, IEEE_G);	
+#endif
+		ieee->current_network.mode = ieee->mode;
+		ieee->current_network.atim_window = 0;
+		ieee->current_network.capability = WLAN_CAPABILITY_IBSS;
+	}
+
+	printk("%s(): ieee->mode = %d\n", __FUNCTION__, ieee->mode);
+	if((ieee->mode == IEEE_N_24G) || (ieee->mode == IEEE_N_5G))
+		HTUseDefaultSetting(ieee);
+	else
+		ieee->pHTInfo->bCurrentHTSupport = false;	
+
+	ieee->SetHwRegHandler(ieee->dev, HW_VAR_MEDIA_STATUS, (u8 *)(&ieee->state));
+
+#if defined (RTL8192S_WAPI_SUPPORT)
+	if ((ieee->WapiSupport) && (ieee->wapiInfo.bWapiEnable)){
+		WAPI_CreateEvent_Send(ieee, WAPI_EVENT_CONNECT, ieee->current_network.bssid, NULL, 0);
+	}
+#endif		
+	ieee->state = RTLLIB_LINKED;
+#ifdef _RTL8192_EXT_PATCH_
+	ieee->set_chan(ieee->dev, ieee->current_network.channel);  
+#endif
+	ieee->link_change(ieee->dev);
+
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
+
+	if(ieee->pHTInfo->bCurBW40MHz)
+		HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20_40, (ieee->current_network.channel<=6)?HT_EXTCHNL_OFFSET_UPPER:HT_EXTCHNL_OFFSET_LOWER);  
+	else
+		HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20, (ieee->current_network.channel<=6)?HT_EXTCHNL_OFFSET_UPPER:HT_EXTCHNL_OFFSET_LOWER);  
+#else
+	HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20, HT_EXTCHNL_OFFSET_NO_EXT);
+#endif
+	if(ieee->LedControlHandler != NULL)
+	        ieee->LedControlHandler(ieee->dev,LED_CTL_LINK);
+	
+	rtllib_start_send_beacons(ieee);
+	
+	notify_wx_assoc_event(ieee);
+	
+	if (ieee->data_hard_resume)
+		ieee->data_hard_resume(ieee->dev);
+
+	netif_carrier_on(ieee->dev);
+	
+	up(&ieee->wx_sem);
+}
+
+inline void rtllib_start_ibss(struct rtllib_device *ieee)
+{
+	queue_delayed_work_rsl(ieee->wq, &ieee->start_ibss_wq, MSECS(150));
+}
+
+/* this is called only in user context, with wx_sem held */
+void rtllib_start_bss(struct rtllib_device *ieee)
+{
+	unsigned long flags;
+#ifdef ENABLE_DOT11D
+	if(IS_DOT11D_ENABLE(ieee) && !IS_COUNTRY_IE_VALID(ieee))
+	{
+		if(! ieee->bGlobalDomain)
+		{
+			return;
+		}
+	}
+#endif	
+	/* check if we have already found the net we
+	 * are interested in (if any).
+	 * if not (we are disassociated and we are not
+	 * in associating / authenticating phase) start the background scanning.
+	 */
+	rtllib_softmac_check_all_nets(ieee);
+	
+	/* ensure no-one start an associating process (thus setting
+	 * the ieee->state to rtllib_ASSOCIATING) while we
+	 * have just cheked it and we are going to enable scan.
+	 * The rtllib_new_net function is always called with
+	 * lock held (from both rtllib_softmac_check_all_nets and
+	 * the rx path), so we cannot be in the middle of such function
+	 */
+	spin_lock_irqsave(&ieee->lock, flags);
+	
+	if (ieee->state == RTLLIB_NOLINK) {
+		rtllib_start_scan(ieee);
+	}
+	spin_unlock_irqrestore(&ieee->lock, flags);
+}
+
+void rtllib_link_change_wq(void *data)
+{
+	struct rtllib_device *ieee = container_of_dwork_rsl(data, struct rtllib_device, link_change_wq);
+	ieee->link_change(ieee->dev);
+}
+/* called only in userspace context */
+void rtllib_disassociate(struct rtllib_device *ieee)
+{
+	netif_carrier_off(ieee->dev);
+	if (ieee->softmac_features & IEEE_SOFTMAC_TX_QUEUE)
+			rtllib_reset_queue(ieee);
+	
+	if (ieee->data_hard_stop)
+			ieee->data_hard_stop(ieee->dev);
+#ifdef ENABLE_DOT11D
+	if(IS_DOT11D_ENABLE(ieee))
+		Dot11d_Reset(ieee);
+#endif
+	ieee->state = RTLLIB_NOLINK;
+	ieee->is_set_key = false;
+	ieee->wap_set = 0;
+
+	queue_delayed_work_rsl(ieee->wq, &ieee->link_change_wq, 0);
+
+
+#ifndef FOR_ANDROID_X86
+	notify_wx_assoc_event(ieee);
+#endif
+#ifdef RTL8192S_WAPI_SUPPORT
+	printk("==============> %s()\n", __FUNCTION__);
+	WapiReturnOneStaInfo(ieee, ieee->current_network.bssid, 0);
+#endif
+}
+#ifdef RTL8192S_WAPI_SUPPORT
+void ieee80211_disassociate_from_app(struct rtllib_device *ieee)
+{
+	netif_carrier_off(ieee->dev);
+	if (ieee->softmac_features & IEEE_SOFTMAC_TX_QUEUE)
+			rtllib_reset_queue(ieee);
+	
+	if (ieee->data_hard_stop)
+			ieee->data_hard_stop(ieee->dev);
+#ifdef ENABLE_DOT11D
+	if(IS_DOT11D_ENABLE(ieee))
+		Dot11d_Reset(ieee);
+#endif
+	ieee->state = RTLLIB_NOLINK;
+	ieee->is_set_key = false;
+	ieee->wap_set = 0;
+
+	queue_delayed_work_rsl(ieee->wq, &ieee->link_change_wq, 0);
+
+
+#ifndef FOR_ANDROID_X86
+	notify_wx_assoc_event(ieee);
+#endif
+	
+	printk("==============> %s()\n", __FUNCTION__);
+	WapiReturnOneStaInfo(ieee, ieee->current_network.bssid, 1);
+}
+
+#endif
+void rtllib_associate_retry_wq(void *data)
+{
+	struct rtllib_device *ieee = container_of_dwork_rsl(data, struct rtllib_device, associate_retry_wq);
+	unsigned long flags;
+	
+	down(&ieee->wx_sem);
+	if(!ieee->proto_started)
+		goto exit;
+		
+	if(ieee->state != RTLLIB_ASSOCIATING_RETRY)
+		goto exit;
+		
+	/* until we do not set the state to RTLLIB_NOLINK 
+	* there are no possibility to have someone else trying
+	* to start an association procdure (we get here with
+	* ieee->state = RTLLIB_ASSOCIATING).
+	* When we set the state to RTLLIB_NOLINK it is possible
+	* that the RX path run an attempt to associate, but
+	* both rtllib_softmac_check_all_nets and the
+	* RX path works with ieee->lock held so there are no
+	* problems. If we are still disassociated then start a scan.
+	* the lock here is necessary to ensure no one try to start
+	* an association procedure when we have just checked the 
+	* state and we are going to start the scan.
+	*/
+	ieee->beinretry = true;
+	ieee->state = RTLLIB_NOLINK;
+
+	rtllib_softmac_check_all_nets(ieee);
+	
+	spin_lock_irqsave(&ieee->lock, flags);
+	
+	if(ieee->state == RTLLIB_NOLINK)
+	{
+		rtllib_start_scan(ieee);
+	}
+	spin_unlock_irqrestore(&ieee->lock, flags);
+
+	ieee->beinretry = false;
+exit:
+	up(&ieee->wx_sem);
+}
+
+struct sk_buff *rtllib_get_beacon_(struct rtllib_device *ieee)
+{
+	u8 broadcast_addr[] = {0xff,0xff,0xff,0xff,0xff,0xff};
+	
+	struct sk_buff *skb;
+	struct rtllib_probe_response *b;
+#ifdef _RTL8192_EXT_PATCH_
+	if((ieee->iw_mode == IW_MODE_MESH)&&(ieee->ext_patch_get_beacon_get_probersp ))
+		skb = ieee->ext_patch_get_beacon_get_probersp(ieee, broadcast_addr, &(ieee->current_mesh_network));
+	else
+		skb = rtllib_probe_resp(ieee, broadcast_addr);
+#else
+	skb = rtllib_probe_resp(ieee, broadcast_addr);
+#endif
+	
+	if (!skb) 
+		return NULL;
+	
+	b = (struct rtllib_probe_response *) skb->data;
+	b->header.frame_ctl = cpu_to_le16(RTLLIB_STYPE_BEACON);
+		
+	return skb;
+	
+}
+
+struct sk_buff *rtllib_get_beacon(struct rtllib_device *ieee)
+{
+	struct sk_buff *skb;
+	struct rtllib_probe_response *b;
+	
+	skb = rtllib_get_beacon_(ieee);
+	if(!skb) 
+		return NULL;
+		
+	b = (struct rtllib_probe_response *) skb->data;	
+	b->header.seq_ctl = cpu_to_le16(ieee->seq_ctrl[0] << 4);
+	
+	if (ieee->seq_ctrl[0] == 0xFFF)
+		ieee->seq_ctrl[0] = 0;
+	else
+		ieee->seq_ctrl[0]++;
+	
+	return skb;
+}
+
+#ifdef _RTL8192_EXT_PATCH_	
+void rtllib_softmac_stop_protocol(struct rtllib_device *ieee, u8 mesh_flag, u8 shutdown)
+#else
+void rtllib_softmac_stop_protocol(struct rtllib_device *ieee,u8 shutdown)
+#endif
+{
+	rtllib_stop_scan_syncro(ieee);
+	down(&ieee->wx_sem);
+#ifdef _RTL8192_EXT_PATCH_	
+	if(mesh_flag) {
+		rtllib_stop_mesh_protocol(ieee);
+	}
+	else
+#endif	
+		rtllib_stop_protocol(ieee,shutdown);
+	up(&ieee->wx_sem);
+}
+
+
+void rtllib_stop_protocol(struct rtllib_device *ieee, u8 shutdown)
+{
+	if (!ieee->proto_started)
+		return;
+	
+	if(shutdown){
+	ieee->proto_started = 0;
+		ieee->proto_stoppping = 1;
+#ifdef ENABLE_IPS
+		if(ieee->rtllib_ips_leave != NULL)
+			ieee->rtllib_ips_leave(ieee->dev);
+#endif
+	}
+	
+	rtllib_stop_send_beacons(ieee);
+	del_timer_sync(&ieee->associate_timer);
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
+	del_timer_sync(&ieee->ibss_wait_timer);
+#endif
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)	
+	cancel_delayed_work(&ieee->associate_retry_wq);	
+	cancel_delayed_work(&ieee->start_ibss_wq);
+	cancel_delayed_work(&ieee->link_change_wq);
+#endif	
+	rtllib_stop_scan(ieee);
+
+	if(ieee->state <= RTLLIB_ASSOCIATING_AUTHENTICATED)
+		ieee->state = RTLLIB_NOLINK;
+
+	if (ieee->state == RTLLIB_LINKED){
+		if (ieee->iw_mode == IW_MODE_INFRA)
+			SendDisassociation(ieee,1,deauth_lv_ss);
+		rtllib_disassociate(ieee);
+	}
+	
+	if(shutdown){
+		RemoveAllTS(ieee); 
+		ieee->proto_stoppping = 0;
+#ifdef RTL8192S_WAPI_SUPPORT
+		if ((ieee->WapiSupport) && (ieee->wapiInfo.bWapiEnable))
+		{
+			WapiReturnAllStaInfo(ieee);
+		}
+#endif
+	}
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
+	if(ieee->iw_mode == IW_MODE_ADHOC) 
+		DelStaInfoList(ieee);
+#endif
+
+	if(ieee->assocreq_ies){
+		kfree(ieee->assocreq_ies);
+		ieee->assocreq_ies = NULL;
+		ieee->assocreq_ies_len = 0;
+	}
+	if(ieee->assocresp_ies){
+		kfree(ieee->assocresp_ies);
+		ieee->assocresp_ies = NULL;
+		ieee->assocresp_ies_len = 0;
+	}
+}
+
+#ifdef _RTL8192_EXT_PATCH_	
+void rtllib_stop_mesh_protocol(struct rtllib_device *ieee)
+{
+	if (!ieee->mesh_started)
+		return;
+	ieee->mesh_started = 0;
+
+	if(ieee->ext_patch_rtllib_stop_protocol)
+		ieee->ext_patch_rtllib_stop_protocol(ieee,0);
+	
+	rtllib_stop_send_beacons(ieee);
+}
+#endif	
+
+#ifdef _RTL8192_EXT_PATCH_	
+void rtllib_softmac_start_protocol(struct rtllib_device *ieee, u8 mesh_flag)
+#else
+void rtllib_softmac_start_protocol(struct rtllib_device *ieee)
+#endif	
+{
+	down(&ieee->wx_sem);
+#ifdef _RTL8192_EXT_PATCH_	
+	if (mesh_flag) {
+		rtllib_start_mesh_protocol(ieee);
+	}
+	else
+#endif	
+		rtllib_start_protocol(ieee);
+	up(&ieee->wx_sem);
+}
+
+void rtllib_start_protocol(struct rtllib_device *ieee)
+{
+	short ch = 0;
+ 	int i = 0;	
+
+	rtllib_update_active_chan_map(ieee);
+
+	if (ieee->proto_started)
+		return;
+		
+	ieee->proto_started = 1;
+	
+	if (ieee->current_network.channel == 0) {
+		do {
+			ch++;
+			if (ch > MAX_CHANNEL_NUMBER) 
+				return; /* no channel found */
+		} while(!ieee->active_channel_map[ch]);
+		ieee->current_network.channel = ch;
+	}
+	
+	if (ieee->current_network.beacon_interval == 0)
+		ieee->current_network.beacon_interval = 100;
+	
+	for(i = 0; i < 17; i++) {
+		ieee->last_rxseq_num[i] = -1;
+		ieee->last_rxfrag_num[i] = -1;
+		ieee->last_packet_time[i] = 0;
+	}
+
+	if(ieee->UpdateBeaconInterruptHandler)
+		ieee->UpdateBeaconInterruptHandler(ieee->dev, false);
+		
+	ieee->wmm_acm = 0;
+	/* if the user set the MAC of the ad-hoc cell and then
+	 * switch to managed mode, shall we  make sure that association
+	 * attempts does not fail just because the user provide the essid
+	 * and the nic is still checking for the AP MAC ??
+	 */
+#ifdef _RTL8192_EXT_PATCH_
+	if ((ieee->iw_mode == IW_MODE_INFRA) || ((ieee->iw_mode == IW_MODE_MESH) && (ieee->only_mesh == 0)))  
+#else
+	if (ieee->iw_mode == IW_MODE_INFRA)  
+#endif		
+	{
+		rtllib_start_bss(ieee);
+	}else if (ieee->iw_mode == IW_MODE_ADHOC){
+		if(ieee->UpdateBeaconInterruptHandler)
+			ieee->UpdateBeaconInterruptHandler(ieee->dev, true);
+		
+		rtllib_start_ibss(ieee);
+		
+	}else if (ieee->iw_mode == IW_MODE_MASTER)
+		rtllib_start_master_bss(ieee);
+		
+	else if(ieee->iw_mode == IW_MODE_MONITOR)
+		rtllib_start_monitor_mode(ieee);	
+}
+
+#ifdef _RTL8192_EXT_PATCH_
+void rtllib_start_mesh_protocol(struct rtllib_device *ieee)
+{
+	short ch = 0;
+
+	rtllib_update_active_chan_map(ieee);
+
+	if (ieee->mesh_started)
+		return;
+
+	ieee->mesh_started = 1;
+	
+	if (ieee->current_mesh_network.channel == 0){
+		do {
+			ch++;
+			if (ch > MAX_CHANNEL_NUMBER) 
+				return; /* no channel found */
+		} while(ieee->active_channel_map[ch]);
+
+		ieee->current_mesh_network.channel = ch;
+	}
+	
+	if (ieee->current_mesh_network.beacon_interval == 0)
+		ieee->current_mesh_network.beacon_interval = 100;
+	ieee->wmm_acm = 0;
+
+	if(ieee->ext_patch_rtllib_start_mesh)
+		ieee->ext_patch_rtllib_start_mesh(ieee);
+}
+#endif
+
+
+#define DRV_NAME  "Ieee80211"
+void rtllib_softmac_init(struct rtllib_device *ieee)
+{
+	int i;
+	memset(&ieee->current_network, 0, sizeof(struct rtllib_network));
+	
+	ieee->state = RTLLIB_NOLINK;
+#ifdef _RTL8192_EXT_PATCH_
+	ieee->mesh_state = RTLLIB_NOLINK;
+#endif
+	for(i = 0; i < 5; i++) {
+	  ieee->seq_ctrl[i] = 0;
+	}
+#ifdef ENABLE_DOT11D
+	ieee->pDot11dInfo = kmalloc(sizeof(RT_DOT11D_INFO), GFP_ATOMIC);
+	if (!ieee->pDot11dInfo)
+		RTLLIB_DEBUG(RTLLIB_DL_ERR, "can't alloc memory for DOT11D\n");
+	memset(ieee->pDot11dInfo, 0, sizeof(RT_DOT11D_INFO));
+#endif
+	ieee->LinkDetectInfo.SlotIndex = 0;
+	ieee->LinkDetectInfo.SlotNum = 2;
+	ieee->LinkDetectInfo.NumRecvBcnInPeriod=0;
+        ieee->LinkDetectInfo.NumRecvDataInPeriod=0;
+	ieee->LinkDetectInfo.NumTxOkInPeriod =0;
+	ieee->LinkDetectInfo.NumRxOkInPeriod =0;
+	ieee->LinkDetectInfo.NumRxUnicastOkInPeriod=0;
+#ifdef _RTL8192_EXT_PATCH_
+	ieee->LinkDetectInfo.LastNumRxUnicast = 0;
+	ieee->LinkDetectInfo.LastNumTxUnicast = 0;
+	ieee->LinkDetectInfo.IdleCount = 0;
+#endif
+	ieee->bIsAggregateFrame = false;
+	ieee->assoc_id = 0;
+	ieee->queue_stop = 0;
+	ieee->scanning_continue = 0;
+	ieee->softmac_features = 0; 
+	ieee->wap_set = 0;
+	ieee->ssid_set = 0;
+	ieee->proto_started = 0;
+	ieee->proto_stoppping = 0;
+	ieee->basic_rate = RTLLIB_DEFAULT_BASIC_RATE;
+	ieee->rate = 22;
+	ieee->ps = RTLLIB_PS_DISABLED;
+	ieee->sta_sleep = 0;
+
+#ifdef _RTL8192_EXT_PATCH_
+	ieee->mesh_started = 0;
+#endif
+	ieee->Regdot11HTOperationalRateSet[0]= 0xff;
+	ieee->Regdot11HTOperationalRateSet[1]= 0xff;
+	ieee->Regdot11HTOperationalRateSet[4]= 0x01;
+
+	ieee->Regdot11TxHTOperationalRateSet[0]= 0xff;
+	ieee->Regdot11TxHTOperationalRateSet[1]= 0xff;
+	ieee->Regdot11TxHTOperationalRateSet[4]= 0x01;
+	
+	ieee->FirstIe_InScan = false;
+	ieee->actscanning = false;
+	ieee->beinretry = false;
+	ieee->is_set_key = false;
+	init_mgmt_queue(ieee);
+
+	ieee->sta_edca_param[0] = 0x0000A403;
+	ieee->sta_edca_param[1] = 0x0000A427;
+	ieee->sta_edca_param[2] = 0x005E4342;
+	ieee->sta_edca_param[3] = 0x002F3262;
+	ieee->aggregation = true;
+	ieee->enable_rx_imm_BA = 1;
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,40)	
+	_setup_timer(&ieee->scan_timer,
+		    rtllib_softmac_scan_cb,
+		    (unsigned long) ieee);
+#endif
+	ieee->tx_pending.txb = NULL;
+	
+	_setup_timer(&ieee->associate_timer,
+		    rtllib_associate_abort_cb,
+		    (unsigned long) ieee);
+
+	_setup_timer(&ieee->beacon_timer,
+		    rtllib_send_beacon_cb,
+		    (unsigned long) ieee);
+
+#if defined(RTL8192U) || defined(RTL8192SU) || defined(RTL8192SE)
+	_setup_timer(&ieee->ibss_wait_timer,
+		    rtllib_ibss_wait_timeout,
+		    (unsigned long) ieee);
+#endif
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)	
+#ifdef PF_SYNCTHREAD
+	ieee->wq = create_workqueue(DRV_NAME,0);
+#else	
+	ieee->wq = create_workqueue(DRV_NAME);
+#endif
+#endif
+
+	INIT_DELAYED_WORK_RSL(&ieee->link_change_wq,(void*)rtllib_link_change_wq,ieee);
+	INIT_DELAYED_WORK_RSL(&ieee->start_ibss_wq,(void*)rtllib_start_ibss_wq,ieee);
+	INIT_WORK_RSL(&ieee->associate_complete_wq, (void*)rtllib_associate_complete_wq,ieee);
+	INIT_DELAYED_WORK_RSL(&ieee->associate_procedure_wq, (void*)rtllib_associate_procedure_wq,ieee);
+	INIT_DELAYED_WORK_RSL(&ieee->softmac_scan_wq,(void*)rtllib_softmac_scan_wq,ieee);
+	INIT_DELAYED_WORK_RSL(&ieee->softmac_hint11d_wq,(void*)rtllib_softmac_hint11d_wq,ieee);
+	INIT_DELAYED_WORK_RSL(&ieee->associate_retry_wq, (void*)rtllib_associate_retry_wq,ieee);
+	INIT_WORK_RSL(&ieee->wx_sync_scan_wq,(void*)rtllib_wx_sync_scan_wq,ieee);
+
+#ifdef _RTL8192_EXT_PATCH_
+	INIT_WORK_RSL(&ieee->ext_stop_scan_wq,(void*) rtllib_ext_stop_scan_wq,ieee);
+	INIT_WORK_RSL(&ieee->ext_send_beacon_wq,(void*) ext_rtllib_send_beacon_wq,ieee);
+#endif 
+
+	sema_init(&ieee->wx_sem, 1);
+	sema_init(&ieee->scan_sem, 1);
+	sema_init(&ieee->ips_sem,1);
+	
+	spin_lock_init(&ieee->mgmt_tx_lock);
+	spin_lock_init(&ieee->beacon_lock);
+	
+	tasklet_init(&ieee->ps_task,
+	     (void(*)(unsigned long)) rtllib_sta_ps,
+	     (unsigned long)ieee);
+
+}
+
+void rtllib_softmac_free(struct rtllib_device *ieee)
+{
+	down(&ieee->wx_sem);
+#ifdef ENABLE_DOT11D
+	if(NULL != ieee->pDot11dInfo)
+	{
+		kfree(ieee->pDot11dInfo);
+		ieee->pDot11dInfo = NULL;
+	}
+#endif
+	del_timer_sync(&ieee->associate_timer);
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)	
+	cancel_delayed_work(&ieee->associate_retry_wq);
+	destroy_workqueue(ieee->wq);
+#endif
+	
+	up(&ieee->wx_sem);
+}
+
+/******************************************************** 
+ * Start of WPA code.                                   *
+ * this is stolen from the ipw2200 driver               *
+ ********************************************************/
+
+ 
+static int rtllib_wpa_enable(struct rtllib_device *ieee, int value)
+{
+	/* This is called when wpa_supplicant loads and closes the driver
+	 * interface. */
+	printk("%s WPA\n",value ? "enabling" : "disabling");
+	ieee->wpa_enabled = value;
+	memset(ieee->ap_mac_addr, 0, 6); 
+	return 0;
+}
+
+ 
+void rtllib_wpa_assoc_frame(struct rtllib_device *ieee, char *wpa_ie, int wpa_ie_len)
+{
+	/* make sure WPA is enabled */
+	rtllib_wpa_enable(ieee, 1);
+
+	rtllib_disassociate(ieee);
+}
+
+
+static int rtllib_wpa_mlme(struct rtllib_device *ieee, int command, int reason)
+{
+	
+	int ret = 0;
+
+	switch (command) {
+	case IEEE_MLME_STA_DEAUTH:
+		break;
+
+	case IEEE_MLME_STA_DISASSOC:
+		rtllib_disassociate(ieee);
+		break;
+
+	default:
+		printk("Unknown MLME request: %d\n", command);
+		ret = -EOPNOTSUPP;
+	}
+
+	return ret;
+}
+
+
+static int rtllib_wpa_set_wpa_ie(struct rtllib_device *ieee,
+			      struct ieee_param *param, int plen)
+{
+	u8 *buf;
+
+	if (param->u.wpa_ie.len > MAX_WPA_IE_LEN ||
+	    (param->u.wpa_ie.len && param->u.wpa_ie.data == NULL))
+		return -EINVAL;
+
+	if (param->u.wpa_ie.len) {
+		buf = kmalloc(param->u.wpa_ie.len, GFP_KERNEL);
+		if (buf == NULL)
+			return -ENOMEM;
+
+		memcpy(buf, param->u.wpa_ie.data, param->u.wpa_ie.len);
+		kfree(ieee->wpa_ie);
+		ieee->wpa_ie = buf;
+		ieee->wpa_ie_len = param->u.wpa_ie.len;
+	} else {
+		kfree(ieee->wpa_ie);
+		ieee->wpa_ie = NULL;
+		ieee->wpa_ie_len = 0;
+	}
+
+	rtllib_wpa_assoc_frame(ieee, ieee->wpa_ie, ieee->wpa_ie_len);
+	return 0;
+}
+
+#define AUTH_ALG_OPEN_SYSTEM			0x1
+#define AUTH_ALG_SHARED_KEY			0x2
+#define AUTH_ALG_LEAP				0x4
+static int rtllib_wpa_set_auth_algs(struct rtllib_device *ieee, int value)
+{
+	
+	struct rtllib_security sec = {
+		.flags = SEC_AUTH_MODE,
+	};
+	int ret = 0;
+
+	if (value & AUTH_ALG_SHARED_KEY) {
+		sec.auth_mode = WLAN_AUTH_SHARED_KEY;
+		ieee->open_wep = 0;
+		ieee->auth_mode = 1;
+	} else if (value & AUTH_ALG_OPEN_SYSTEM){
+		sec.auth_mode = WLAN_AUTH_OPEN;
+		ieee->open_wep = 1;
+		ieee->auth_mode = 0;
+	}
+	else if (value & AUTH_ALG_LEAP){
+		sec.auth_mode = WLAN_AUTH_LEAP  >> 6;
+		ieee->open_wep = 1;
+		ieee->auth_mode = 2;
+	}
+
+
+	if (ieee->set_security)
+		ieee->set_security(ieee->dev, &sec);
+
+	return ret;
+}
+
+static int rtllib_wpa_set_param(struct rtllib_device *ieee, u8 name, u32 value)
+{
+	int ret=0;
+	unsigned long flags;
+
+	switch (name) {
+	case IEEE_PARAM_WPA_ENABLED:
+		ret = rtllib_wpa_enable(ieee, value);
+		break;
+
+	case IEEE_PARAM_TKIP_COUNTERMEASURES:
+		ieee->tkip_countermeasures=value;
+		break;
+
+		case IEEE_PARAM_DROP_UNENCRYPTED: 
+		{
+		/* HACK:
+		 *
+		 * wpa_supplicant calls set_wpa_enabled when the driver
+		 * is loaded and unloaded, regardless of if WPA is being
+		 * used.  No other calls are made which can be used to
+		 * determine if encryption will be used or not prior to
+		 * association being expected.  If encryption is not being
+		 * used, drop_unencrypted is set to false, else true -- we
+		 * can use this to determine if the CAP_PRIVACY_ON bit should
+		 * be set.
+		 */
+		struct rtllib_security sec = {
+			.flags = SEC_ENABLED,
+			.enabled = value,
+		};
+ 		ieee->drop_unencrypted = value;
+		/* We only change SEC_LEVEL for open mode. Others
+		 * are set by ipw_wpa_set_encryption.
+		 */
+		if (!value) {
+			sec.flags |= SEC_LEVEL;
+			sec.level = SEC_LEVEL_0;
+		}
+		else {
+			sec.flags |= SEC_LEVEL;
+			sec.level = SEC_LEVEL_1;
+		}
+		if (ieee->set_security)
+			ieee->set_security(ieee->dev, &sec);
+		break;
+	}
+
+	case IEEE_PARAM_PRIVACY_INVOKED:
+		ieee->privacy_invoked=value;
+		break;
+
+	case IEEE_PARAM_AUTH_ALGS:
+		ret = rtllib_wpa_set_auth_algs(ieee, value);
+		break;
+
+	case IEEE_PARAM_IEEE_802_1X:
+		ieee->ieee802_1x=value;
+		break;
+	case IEEE_PARAM_WPAX_SELECT:
+		spin_lock_irqsave(&ieee->wpax_suitlist_lock,flags);
+		spin_unlock_irqrestore(&ieee->wpax_suitlist_lock,flags);
+		break;
+
+	default:
+		printk("Unknown WPA param: %d\n",name);
+		ret = -EOPNOTSUPP;
+	}
+
+	return ret;
+}
+
+/* implementation borrowed from hostap driver */
+
+#ifdef _RTL8192_EXT_PATCH_
+static int rtllib_wpa_set_encryption(struct rtllib_device *ieee,
+				  struct ieee_param *param, int param_len, u8 is_mesh)
+#else
+static int rtllib_wpa_set_encryption(struct rtllib_device *ieee,
+				  struct ieee_param *param, int param_len)
+#endif
+{
+	int ret = 0;
+#ifdef _RTL8192_EXT_PATCH_
+	u8 i = 0;
+#endif
+	struct rtllib_crypto_ops *ops;
+	struct rtllib_crypt_data **crypt;
+
+	struct rtllib_security sec = {
+		.flags = 0,
+	};
+
+	param->u.crypt.err = 0;
+	param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0';
+
+	if (param_len !=
+	    (int) ((char *) param->u.crypt.key - (char *) param) +
+	    param->u.crypt.key_len) {
+		printk("Len mismatch %d, %d\n", param_len,
+			       param->u.crypt.key_len);
+		return -EINVAL;
+	}
+	if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff &&
+	    param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff &&
+	    param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) {
+		if (param->u.crypt.idx >= WEP_KEYS)
+			return -EINVAL;
+#ifdef _RTL8192_EXT_PATCH_
+		if(is_mesh)
+			crypt = &ieee->cryptlist[0]->crypt[param->u.crypt.idx];
+		else
+			crypt = &ieee->sta_crypt[param->u.crypt.idx];
+#else
+		crypt = &ieee->crypt[param->u.crypt.idx];
+#endif
+	} else {
+		return -EINVAL;
+	}
+
+	if (strcmp(param->u.crypt.alg, "none") == 0) {
+		if (crypt) {
+			sec.enabled = 0;
+			sec.level = SEC_LEVEL_0;
+			sec.flags |= SEC_ENABLED | SEC_LEVEL;
+			rtllib_crypt_delayed_deinit(ieee, crypt);
+		}
+		goto done;
+	}
+	sec.enabled = 1;
+	sec.flags |= SEC_ENABLED;
+
+	/* IPW HW cannot build TKIP MIC, host decryption still needed. */
+	if (!(ieee->host_encrypt || ieee->host_decrypt) &&
+	    strcmp(param->u.crypt.alg, "TKIP"))
+		goto skip_host_crypt;
+
+	ops = rtllib_get_crypto_ops(param->u.crypt.alg);
+	if (ops == NULL && strcmp(param->u.crypt.alg, "WEP") == 0) {
+		request_module("rtllib_crypt_wep");
+		ops = rtllib_get_crypto_ops(param->u.crypt.alg);
+	} else if (ops == NULL && strcmp(param->u.crypt.alg, "TKIP") == 0) {
+		request_module("rtllib_crypt_tkip");
+		ops = rtllib_get_crypto_ops(param->u.crypt.alg);
+	} else if (ops == NULL && strcmp(param->u.crypt.alg, "CCMP") == 0) {
+		request_module("rtllib_crypt_ccmp");
+		ops = rtllib_get_crypto_ops(param->u.crypt.alg);
+	}
+	if (ops == NULL) {
+		printk("unknown crypto alg '%s'\n", param->u.crypt.alg);
+		param->u.crypt.err = IEEE_CRYPT_ERR_UNKNOWN_ALG;
+		ret = -EINVAL;
+		goto done;
+	}
+#ifdef _RTL8192_EXT_PATCH_
+	if(is_mesh)  
+	{
+		for (i=0; i<MAX_MP; i++){
+			crypt = &ieee->cryptlist[i]->crypt[param->u.crypt.idx];
+
+			*crypt = ieee->cryptlist[i]->crypt[param->u.crypt.idx];
+		}
+#endif
+
+		if (*crypt == NULL || (*crypt)->ops != ops) {
+			struct rtllib_crypt_data *new_crypt;
+
+			rtllib_crypt_delayed_deinit(ieee, crypt);
+
+			new_crypt = (struct rtllib_crypt_data *)
+				kmalloc(sizeof(*new_crypt), GFP_KERNEL);
+			if (new_crypt == NULL) {
+				ret = -ENOMEM;
+				goto done;
+			}
+			memset(new_crypt, 0, sizeof(struct rtllib_crypt_data));
+			new_crypt->ops = ops;
+#ifdef BUILT_IN_RTLLIB
+			if (new_crypt->ops)
+#else
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+			if (new_crypt->ops && try_module_get(new_crypt->ops->owner))
+#else
+			if (new_crypt->ops && try_inc_mod_count(new_crypt->ops->owner))
+#endif			
+#endif			
+					new_crypt->priv =
+						new_crypt->ops->init(param->u.crypt.idx);
+
+			if (new_crypt->priv == NULL) {
+				kfree(new_crypt);
+				param->u.crypt.err = IEEE_CRYPT_ERR_CRYPT_INIT_FAILED;
+				ret = -EINVAL;
+				goto done;
+			}
+
+			*crypt = new_crypt;
+		}
+
+		if (param->u.crypt.key_len > 0 && (*crypt)->ops->set_key &&
+				(*crypt)->ops->set_key(param->u.crypt.key,
+					param->u.crypt.key_len, param->u.crypt.seq,
+					(*crypt)->priv) < 0) {
+			printk("key setting failed\n");
+			param->u.crypt.err = IEEE_CRYPT_ERR_KEY_SET_FAILED;
+			ret = -EINVAL;
+			goto done;
+		}
+#ifdef _RTL8192_EXT_PATCH_
+	}
+#endif
+
+ skip_host_crypt:
+	if (param->u.crypt.set_tx) {
+		ieee->tx_keyidx = param->u.crypt.idx;
+		sec.active_key = param->u.crypt.idx;
+		sec.flags |= SEC_ACTIVE_KEY;
+	} else
+		sec.flags &= ~SEC_ACTIVE_KEY;
+
+	if (param->u.crypt.alg != NULL) {
+		memcpy(sec.keys[param->u.crypt.idx],
+		       param->u.crypt.key,
+		       param->u.crypt.key_len);
+		sec.key_sizes[param->u.crypt.idx] = param->u.crypt.key_len;
+		sec.flags |= (1 << param->u.crypt.idx);
+
+		if (strcmp(param->u.crypt.alg, "WEP") == 0) {
+			sec.flags |= SEC_LEVEL;
+			sec.level = SEC_LEVEL_1;
+		} else if (strcmp(param->u.crypt.alg, "TKIP") == 0) {
+			sec.flags |= SEC_LEVEL;
+			sec.level = SEC_LEVEL_2;
+		} else if (strcmp(param->u.crypt.alg, "CCMP") == 0) {
+			sec.flags |= SEC_LEVEL;
+			sec.level = SEC_LEVEL_3;
+		}
+	}
+ done:
+	if (ieee->set_security)
+		ieee->set_security(ieee->dev, &sec);
+
+#ifdef _RTL8192_EXT_PATCH_
+	if (ret != 0)
+	{
+		if(is_mesh)   
+		{
+			for (i=0; i<MAX_MP; i++)
+			{
+				if (ieee->cryptlist[i]->crypt[param->u.crypt.idx]==NULL){
+					break;
+				}
+				else{
+					kfree(ieee->cryptlist[i]->crypt[param->u.crypt.idx]);
+					ieee->cryptlist[i]->crypt[param->u.crypt.idx] = NULL;
+				}
+			}
+		}
+		else
+		{
+			kfree(ieee->sta_crypt[param->u.crypt.idx]);
+			ieee->sta_crypt[param->u.crypt.idx] = NULL;
+		}
+	}
+#endif
+	
+
+	/* Do not reset port if card is in Managed mode since resetting will
+	 * generate new IEEE 802.11 authentication which may end up in looping
+	 * with IEEE 802.1X.  If your hardware requires a reset after WEP
+	 * configuration (for example... Prism2), implement the reset_port in
+	 * the callbacks structures used to initialize the 802.11 stack. */
+	if (ieee->reset_on_keychange &&
+	    ieee->iw_mode != IW_MODE_INFRA &&
+	    ieee->reset_port &&
+	    ieee->reset_port(ieee->dev)) {
+		printk("reset_port failed\n");
+		param->u.crypt.err = IEEE_CRYPT_ERR_CARD_CONF_FAILED;
+		return -EINVAL;
+	}
+
+	return ret;
+}
+
+inline struct sk_buff *rtllib_disauth_skb( struct rtllib_network *beacon,
+		struct rtllib_device *ieee, u16 asRsn)
+{
+	struct sk_buff *skb;
+	struct rtllib_disauth *disauth;
+#ifdef USB_USE_ALIGNMENT
+        u32 Tmpaddr=0;
+        int alignment=0;
+	int len = sizeof(struct rtllib_disauth) + ieee->tx_headroom + USB_512B_ALIGNMENT_SIZE;
+#else
+	int len = sizeof(struct rtllib_disauth) + ieee->tx_headroom;
+
+#endif
+	skb = dev_alloc_skb(len);
+	if (!skb) {
+		return NULL;
+	}
+
+#ifdef USB_USE_ALIGNMENT
+        Tmpaddr = (u32)skb->data;
+        alignment = Tmpaddr & 0x1ff;
+        skb_reserve(skb,(USB_512B_ALIGNMENT_SIZE - alignment));
+#endif
+	skb_reserve(skb, ieee->tx_headroom);
+	
+	disauth = (struct rtllib_disauth *) skb_put(skb,sizeof(struct rtllib_disauth));
+	disauth->header.frame_ctl = cpu_to_le16(RTLLIB_STYPE_DEAUTH);
+	disauth->header.duration_id = 0;
+	
+	memcpy(disauth->header.addr1, beacon->bssid, ETH_ALEN);
+	memcpy(disauth->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
+	memcpy(disauth->header.addr3, beacon->bssid, ETH_ALEN);
+	
+	disauth->reason = cpu_to_le16(asRsn);
+	return skb;
+}
+
+inline struct sk_buff *rtllib_disassociate_skb( struct rtllib_network *beacon,
+		struct rtllib_device *ieee, u16 asRsn)
+{
+	struct sk_buff *skb;
+	struct rtllib_disassoc *disass;
+#ifdef USB_USE_ALIGNMENT
+        u32 Tmpaddr=0;
+        int alignment=0;
+	int len = sizeof(struct rtllib_disassoc) + ieee->tx_headroom + USB_512B_ALIGNMENT_SIZE;
+#else
+	int len = sizeof(struct rtllib_disassoc) + ieee->tx_headroom;
+#endif
+	skb = dev_alloc_skb(len);
+
+	if (!skb) {
+		return NULL;
+	}
+	
+#ifdef USB_USE_ALIGNMENT
+        Tmpaddr = (u32)skb->data;
+        alignment = Tmpaddr & 0x1ff;
+        skb_reserve(skb,(USB_512B_ALIGNMENT_SIZE - alignment));
+#endif
+	skb_reserve(skb, ieee->tx_headroom);
+
+	disass = (struct rtllib_disassoc *) skb_put(skb,sizeof(struct rtllib_disassoc));
+	disass->header.frame_ctl = cpu_to_le16(RTLLIB_STYPE_DISASSOC);
+	disass->header.duration_id = 0;
+	
+	memcpy(disass->header.addr1, beacon->bssid, ETH_ALEN);
+	memcpy(disass->header.addr2, ieee->dev->dev_addr, ETH_ALEN);
+	memcpy(disass->header.addr3, beacon->bssid, ETH_ALEN);
+	
+	disass->reason = cpu_to_le16(asRsn);
+	return skb;
+}
+
+void SendDisassociation(struct rtllib_device *ieee, bool deauth, u16 asRsn)
+{
+	struct rtllib_network *beacon = &ieee->current_network;
+	struct sk_buff *skb;
+
+	if(deauth) {
+		skb = rtllib_disauth_skb(beacon,ieee,asRsn);
+	} else {
+		skb = rtllib_disassociate_skb(beacon,ieee,asRsn);
+	}
+
+	if (skb){
+		softmac_mgmt_xmit(skb, ieee);
+	}
+}
+
+u8 rtllib_ap_sec_type(struct rtllib_device *ieee)
+{
+	static u8 ccmp_ie[4] = {0x00,0x50,0xf2,0x04};
+	static u8 ccmp_rsn_ie[4] = {0x00, 0x0f, 0xac, 0x04};
+	int wpa_ie_len= ieee->wpa_ie_len;
+	struct rtllib_crypt_data* crypt;
+	int encrypt;
+
+#ifdef _RTL8192_EXT_PATCH_
+	crypt = ieee->sta_crypt[ieee->tx_keyidx];
+#else
+	crypt = ieee->crypt[ieee->tx_keyidx];
+#endif
+	encrypt = (ieee->current_network.capability & WLAN_CAPABILITY_PRIVACY) ||\
+		  (ieee->host_encrypt && crypt && crypt->ops && \
+		   (0 == strcmp(crypt->ops->name,"WEP")));
+
+	/* simply judge  */
+	if(encrypt && (wpa_ie_len == 0)) {
+		return SEC_ALG_WEP;
+	} else if((wpa_ie_len != 0)) {
+		if (((ieee->wpa_ie[0] == 0xdd) && (!memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) || 
+				((ieee->wpa_ie[0] == 0x30) && (!memcmp(&ieee->wpa_ie[10],ccmp_rsn_ie, 4))))
+			return SEC_ALG_CCMP;
+		else
+			return SEC_ALG_TKIP;
+	} else {
+		return SEC_ALG_NONE;
+	}
+}
+
+#ifdef _RTL8192_EXT_PATCH_
+int rtllib_wpa_supplicant_ioctl(struct rtllib_device *ieee, struct iw_point *p, u8 is_mesh)
+#else
+int rtllib_wpa_supplicant_ioctl(struct rtllib_device *ieee, struct iw_point *p)
+#endif
+{
+	struct ieee_param *param;
+	int ret=0;
+
+	down(&ieee->wx_sem);
+
+	if (p->length < sizeof(struct ieee_param) || !p->pointer){
+		ret = -EINVAL;
+		goto out;
+	}
+	
+	param = (struct ieee_param *)kmalloc(p->length, GFP_KERNEL);
+	if (param == NULL){
+		ret = -ENOMEM;
+		goto out;
+	}
+	if (copy_from_user(param, p->pointer, p->length)) {
+		kfree(param);
+		ret = -EFAULT;
+		goto out;
+	}
+
+	switch (param->cmd) {
+
+	case IEEE_CMD_SET_WPA_PARAM:
+		ret = rtllib_wpa_set_param(ieee, param->u.wpa_param.name,
+					param->u.wpa_param.value);
+		break;
+
+	case IEEE_CMD_SET_WPA_IE:
+		ret = rtllib_wpa_set_wpa_ie(ieee, param, p->length);
+		break;
+
+	case IEEE_CMD_SET_ENCRYPTION:
+#ifdef _RTL8192_EXT_PATCH_
+		ret = rtllib_wpa_set_encryption(ieee, param, p->length, is_mesh);
+#else
+		ret = rtllib_wpa_set_encryption(ieee, param, p->length);
+#endif
+		break;
+
+	case IEEE_CMD_MLME:
+		ret = rtllib_wpa_mlme(ieee, param->u.mlme.command,
+				   param->u.mlme.reason_code);
+		break;
+
+	default:
+		printk("Unknown WPA supplicant request: %d\n",param->cmd);
+		ret = -EOPNOTSUPP;
+		break;
+	}
+
+	if (ret == 0 && copy_to_user(p->pointer, param, p->length))
+		ret = -EFAULT;
+
+	kfree(param);
+out:
+	up(&ieee->wx_sem);
+	
+	return ret;
+}
+
+void notify_wx_assoc_event(struct rtllib_device *ieee)
+{
+	union iwreq_data wrqu;
+
+	if(ieee->cannot_notify)
+		return;
+
+	wrqu.ap_addr.sa_family = ARPHRD_ETHER;
+	if (ieee->state == RTLLIB_LINKED)
+		memcpy(wrqu.ap_addr.sa_data, ieee->current_network.bssid, ETH_ALEN);
+	else{
+
+		printk("%s(): Tell user space disconnected\n",__func__);
+		memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN);
+	}
+	wireless_send_event(ieee->dev, SIOCGIWAP, &wrqu, NULL);
+}
+
+#ifndef BUILT_IN_RTLLIB
+EXPORT_SYMBOL_RSL(rtllib_get_beacon);
+EXPORT_SYMBOL_RSL(rtllib_wake_queue);
+EXPORT_SYMBOL_RSL(rtllib_stop_queue);
+EXPORT_SYMBOL_RSL(rtllib_reset_queue);
+EXPORT_SYMBOL_RSL(rtllib_softmac_stop_protocol);
+EXPORT_SYMBOL_RSL(rtllib_softmac_start_protocol);
+EXPORT_SYMBOL_RSL(rtllib_is_shortslot);
+EXPORT_SYMBOL_RSL(rtllib_is_54g);
+EXPORT_SYMBOL_RSL(rtllib_wpa_supplicant_ioctl);
+EXPORT_SYMBOL_RSL(rtllib_ps_tx_ack);
+EXPORT_SYMBOL_RSL(rtllib_softmac_xmit);
+EXPORT_SYMBOL_RSL(rtllib_stop_send_beacons);
+EXPORT_SYMBOL_RSL(notify_wx_assoc_event);
+EXPORT_SYMBOL_RSL(SendDisassociation);
+EXPORT_SYMBOL_RSL(rtllib_disassociate);
+EXPORT_SYMBOL_RSL(rtllib_start_send_beacons);
+EXPORT_SYMBOL_RSL(rtllib_stop_scan);
+EXPORT_SYMBOL_RSL(rtllib_send_probe_requests);
+EXPORT_SYMBOL_RSL(rtllib_softmac_scan_syncro);
+EXPORT_SYMBOL_RSL(rtllib_start_scan_syncro);
+EXPORT_SYMBOL_RSL(rtllib_sta_ps_send_null_frame);
+EXPORT_SYMBOL_RSL(rtllib_sta_ps_send_pspoll_frame);
+EXPORT_SYMBOL_RSL(rtllib_sta_wakeup);
+EXPORT_SYMBOL_RSL(rtllib_ap_sec_type);
+#ifdef _RTL8192_EXT_PATCH_
+EXPORT_SYMBOL_RSL(rtllib_MFIE_rate_len);
+EXPORT_SYMBOL_RSL(rtllib_MFIE_Brate);
+EXPORT_SYMBOL_RSL(rtllib_MFIE_Grate);
+EXPORT_SYMBOL_RSL(rtllib_WMM_Info);
+EXPORT_SYMBOL_RSL(rtllib_TURBO_Info);
+EXPORT_SYMBOL_RSL(rtllib_ext_probe_resp_by_net);
+EXPORT_SYMBOL_RSL(softmac_mgmt_xmit);
+EXPORT_SYMBOL_RSL(rtllib_start_scan);
+EXPORT_SYMBOL_RSL(rtllib_ext_send_11s_beacon);
+EXPORT_SYMBOL_RSL(rtllib_rx_auth_rq);
+EXPORT_SYMBOL_RSL(rtllib_associate_step1);
+EXPORT_SYMBOL_RSL(rtllib_stop_protocol);
+EXPORT_SYMBOL_RSL(rtllib_start_protocol);
+EXPORT_SYMBOL_RSL(rtllib_resp_to_auth);
+
+#endif 
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtllib/aes.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtllib/aes.c
@@ -0,0 +1,468 @@
+/* 
+ * Cryptographic API.
+ *
+ * AES Cipher Algorithm.
+ *
+ * Based on Brian Gladman's code.
+ *
+ * Linux developers:
+ *  Alexander Kjeldaas <astor@fast.no>
+ *  Herbert Valerio Riedel <hvr@hvrlab.org>
+ *  Kyle McMartin <kyle@debian.org>
+ *  Adam J. Richter <adam@yggdrasil.com> (conversion to 2.5 API).
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * ---------------------------------------------------------------------------
+ * Copyright (c) 2002, Dr Brian Gladman <brg@gladman.me.uk>, Worcester, UK.
+ * All rights reserved.
+ *
+ * LICENSE TERMS
+ *
+ * The free distribution and use of this software in both source and binary
+ * form is allowed (with or without changes) provided that:
+ *
+ *   1. distributions of this source code include the above copyright
+ *      notice, this list of conditions and the following disclaimer;
+ *
+ *   2. distributions in binary form include the above copyright
+ *      notice, this list of conditions and the following disclaimer
+ *      in the documentation and/or other associated materials;
+ *
+ *   3. the copyright holder's name is not used to endorse products
+ *      built using this software without specific written permission.
+ *
+ * ALTERNATIVELY, provided that this notice is retained in full, this product
+ * may be distributed under the terms of the GNU General Public License (GPL),
+ * in which case the provisions of the GPL apply INSTEAD OF those given above.
+ *
+ * DISCLAIMER
+ *
+ * This software is provided 'as is' with no explicit or implied warranties
+ * in respect of its properties, including, but not limited to, correctness
+ * and/or fitness for purpose.
+ * ---------------------------------------------------------------------------
+ */
+
+/* Some changes from the Gladman version:
+    s/RIJNDAEL(e_key)/E_KEY/g
+    s/RIJNDAEL(d_key)/D_KEY/g
+*/
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include "rtl_crypto.h"
+#include <asm/byteorder.h>
+
+#define AES_MIN_KEY_SIZE	16
+#define AES_MAX_KEY_SIZE	32
+
+#define AES_BLOCK_SIZE		16
+
+static inline 
+u32 generic_rotr32 (const u32 x, const unsigned bits)
+{
+	const unsigned n = bits % 32;
+	return (x >> n) | (x << (32 - n));
+}
+
+static inline 
+u32 generic_rotl32 (const u32 x, const unsigned bits)
+{
+	const unsigned n = bits % 32;
+	return (x << n) | (x >> (32 - n));
+}
+
+#define rotl generic_rotl32
+#define rotr generic_rotr32
+
+/*
+ * #define byte(x, nr) ((unsigned char)((x) >> (nr*8))) 
+ */
+inline static u8
+byte(const u32 x, const unsigned n)
+{
+	return x >> (n << 3);
+}
+
+#define u32_in(x) le32_to_cpu(*(const u32 *)(x))
+#define u32_out(to, from) (*(u32 *)(to) = cpu_to_le32(from))
+
+struct aes_ctx {
+	int key_length;
+	u32 E[60];
+	u32 D[60];
+};
+
+#define E_KEY ctx->E
+#define D_KEY ctx->D
+
+static u8 pow_tab[256] __initdata;
+static u8 log_tab[256] __initdata;
+static u8 sbx_tab[256] __initdata;
+static u8 isb_tab[256] __initdata;
+static u32 rco_tab[10];
+static u32 ft_tab[4][256];
+static u32 it_tab[4][256];
+
+static u32 fl_tab[4][256];
+static u32 il_tab[4][256];
+
+static inline u8 __init
+f_mult (u8 a, u8 b)
+{
+	u8 aa = log_tab[a], cc = aa + log_tab[b];
+
+	return pow_tab[cc + (cc < aa ? 1 : 0)];
+}
+
+#define ff_mult(a,b)    (a && b ? f_mult(a, b) : 0)
+
+#define f_rn(bo, bi, n, k)					\
+    bo[n] =  ft_tab[0][byte(bi[n],0)] ^				\
+             ft_tab[1][byte(bi[(n + 1) & 3],1)] ^		\
+             ft_tab[2][byte(bi[(n + 2) & 3],2)] ^		\
+             ft_tab[3][byte(bi[(n + 3) & 3],3)] ^ *(k + n)
+
+#define i_rn(bo, bi, n, k)					\
+    bo[n] =  it_tab[0][byte(bi[n],0)] ^				\
+             it_tab[1][byte(bi[(n + 3) & 3],1)] ^		\
+             it_tab[2][byte(bi[(n + 2) & 3],2)] ^		\
+             it_tab[3][byte(bi[(n + 1) & 3],3)] ^ *(k + n)
+
+#define ls_box(x)				\
+    ( fl_tab[0][byte(x, 0)] ^			\
+      fl_tab[1][byte(x, 1)] ^			\
+      fl_tab[2][byte(x, 2)] ^			\
+      fl_tab[3][byte(x, 3)] )
+
+#define f_rl(bo, bi, n, k)					\
+    bo[n] =  fl_tab[0][byte(bi[n],0)] ^				\
+             fl_tab[1][byte(bi[(n + 1) & 3],1)] ^		\
+             fl_tab[2][byte(bi[(n + 2) & 3],2)] ^		\
+             fl_tab[3][byte(bi[(n + 3) & 3],3)] ^ *(k + n)
+
+#define i_rl(bo, bi, n, k)					\
+    bo[n] =  il_tab[0][byte(bi[n],0)] ^				\
+             il_tab[1][byte(bi[(n + 3) & 3],1)] ^		\
+             il_tab[2][byte(bi[(n + 2) & 3],2)] ^		\
+             il_tab[3][byte(bi[(n + 1) & 3],3)] ^ *(k + n)
+
+static void __init
+gen_tabs (void)
+{
+	u32 i, t;
+	u8 p, q;
+
+	/* log and power tables for GF(2**8) finite field with
+	   0x011b as modular polynomial - the simplest primitive
+	   root is 0x03, used here to generate the tables */
+
+	for (i = 0, p = 1; i < 256; ++i) {
+		pow_tab[i] = (u8) p;
+		log_tab[p] = (u8) i;
+
+		p ^= (p << 1) ^ (p & 0x80 ? 0x01b : 0);
+	}
+
+	log_tab[1] = 0;
+
+	for (i = 0, p = 1; i < 10; ++i) {
+		rco_tab[i] = p;
+
+		p = (p << 1) ^ (p & 0x80 ? 0x01b : 0);
+	}
+
+	for (i = 0; i < 256; ++i) {
+		p = (i ? pow_tab[255 - log_tab[i]] : 0);
+		q = ((p >> 7) | (p << 1)) ^ ((p >> 6) | (p << 2));
+		p ^= 0x63 ^ q ^ ((q >> 6) | (q << 2));
+		sbx_tab[i] = p;
+		isb_tab[p] = (u8) i;
+	}
+
+	for (i = 0; i < 256; ++i) {
+		p = sbx_tab[i];
+
+		t = p;
+		fl_tab[0][i] = t;
+		fl_tab[1][i] = rotl (t, 8);
+		fl_tab[2][i] = rotl (t, 16);
+		fl_tab[3][i] = rotl (t, 24);
+
+		t = ((u32) ff_mult (2, p)) |
+		    ((u32) p << 8) |
+		    ((u32) p << 16) | ((u32) ff_mult (3, p) << 24);
+
+		ft_tab[0][i] = t;
+		ft_tab[1][i] = rotl (t, 8);
+		ft_tab[2][i] = rotl (t, 16);
+		ft_tab[3][i] = rotl (t, 24);
+
+		p = isb_tab[i];
+
+		t = p;
+		il_tab[0][i] = t;
+		il_tab[1][i] = rotl (t, 8);
+		il_tab[2][i] = rotl (t, 16);
+		il_tab[3][i] = rotl (t, 24);
+
+		t = ((u32) ff_mult (14, p)) |
+		    ((u32) ff_mult (9, p) << 8) |
+		    ((u32) ff_mult (13, p) << 16) |
+		    ((u32) ff_mult (11, p) << 24);
+
+		it_tab[0][i] = t;
+		it_tab[1][i] = rotl (t, 8);
+		it_tab[2][i] = rotl (t, 16);
+		it_tab[3][i] = rotl (t, 24);
+	}
+}
+
+#define star_x(x) (((x) & 0x7f7f7f7f) << 1) ^ ((((x) & 0x80808080) >> 7) * 0x1b)
+
+#define imix_col(y,x)       \
+    u   = star_x(x);        \
+    v   = star_x(u);        \
+    w   = star_x(v);        \
+    t   = w ^ (x);          \
+   (y)  = u ^ v ^ w;        \
+   (y) ^= rotr(u ^ t,  8) ^ \
+          rotr(v ^ t, 16) ^ \
+          rotr(t,24)
+
+/* initialise the key schedule from the user supplied key */
+
+#define loop4(i)                                    \
+{   t = rotr(t,  8); t = ls_box(t) ^ rco_tab[i];    \
+    t ^= E_KEY[4 * i];     E_KEY[4 * i + 4] = t;    \
+    t ^= E_KEY[4 * i + 1]; E_KEY[4 * i + 5] = t;    \
+    t ^= E_KEY[4 * i + 2]; E_KEY[4 * i + 6] = t;    \
+    t ^= E_KEY[4 * i + 3]; E_KEY[4 * i + 7] = t;    \
+}
+
+#define loop6(i)                                    \
+{   t = rotr(t,  8); t = ls_box(t) ^ rco_tab[i];    \
+    t ^= E_KEY[6 * i];     E_KEY[6 * i + 6] = t;    \
+    t ^= E_KEY[6 * i + 1]; E_KEY[6 * i + 7] = t;    \
+    t ^= E_KEY[6 * i + 2]; E_KEY[6 * i + 8] = t;    \
+    t ^= E_KEY[6 * i + 3]; E_KEY[6 * i + 9] = t;    \
+    t ^= E_KEY[6 * i + 4]; E_KEY[6 * i + 10] = t;   \
+    t ^= E_KEY[6 * i + 5]; E_KEY[6 * i + 11] = t;   \
+}
+
+#define loop8(i)                                    \
+{   t = rotr(t,  8); ; t = ls_box(t) ^ rco_tab[i];  \
+    t ^= E_KEY[8 * i];     E_KEY[8 * i + 8] = t;    \
+    t ^= E_KEY[8 * i + 1]; E_KEY[8 * i + 9] = t;    \
+    t ^= E_KEY[8 * i + 2]; E_KEY[8 * i + 10] = t;   \
+    t ^= E_KEY[8 * i + 3]; E_KEY[8 * i + 11] = t;   \
+    t  = E_KEY[8 * i + 4] ^ ls_box(t);    \
+    E_KEY[8 * i + 12] = t;                \
+    t ^= E_KEY[8 * i + 5]; E_KEY[8 * i + 13] = t;   \
+    t ^= E_KEY[8 * i + 6]; E_KEY[8 * i + 14] = t;   \
+    t ^= E_KEY[8 * i + 7]; E_KEY[8 * i + 15] = t;   \
+}
+
+static int
+aes_set_key(void *ctx_arg, const u8 *in_key, unsigned int key_len, u32 *flags)
+{
+	struct aes_ctx *ctx = ctx_arg;
+	u32 i, t, u, v, w;
+
+	if (key_len != 16 && key_len != 24 && key_len != 32) {
+		*flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
+		return -EINVAL;
+	}
+
+	ctx->key_length = key_len;
+
+	E_KEY[0] = u32_in (in_key);
+	E_KEY[1] = u32_in (in_key + 4);
+	E_KEY[2] = u32_in (in_key + 8);
+	E_KEY[3] = u32_in (in_key + 12);
+
+	switch (key_len) {
+	case 16:
+		t = E_KEY[3];
+		for (i = 0; i < 10; ++i)
+			loop4 (i);
+		break;
+
+	case 24:
+		E_KEY[4] = u32_in (in_key + 16);
+		t = E_KEY[5] = u32_in (in_key + 20);
+		for (i = 0; i < 8; ++i)
+			loop6 (i);
+		break;
+
+	case 32:
+		E_KEY[4] = u32_in (in_key + 16);
+		E_KEY[5] = u32_in (in_key + 20);
+		E_KEY[6] = u32_in (in_key + 24);
+		t = E_KEY[7] = u32_in (in_key + 28);
+		for (i = 0; i < 7; ++i)
+			loop8 (i);
+		break;
+	}
+
+	D_KEY[0] = E_KEY[0];
+	D_KEY[1] = E_KEY[1];
+	D_KEY[2] = E_KEY[2];
+	D_KEY[3] = E_KEY[3];
+
+	for (i = 4; i < key_len + 24; ++i) {
+		imix_col (D_KEY[i], E_KEY[i]);
+	}
+
+	return 0;
+}
+
+/* encrypt a block of text */
+
+#define f_nround(bo, bi, k) \
+    f_rn(bo, bi, 0, k);     \
+    f_rn(bo, bi, 1, k);     \
+    f_rn(bo, bi, 2, k);     \
+    f_rn(bo, bi, 3, k);     \
+    k += 4
+
+#define f_lround(bo, bi, k) \
+    f_rl(bo, bi, 0, k);     \
+    f_rl(bo, bi, 1, k);     \
+    f_rl(bo, bi, 2, k);     \
+    f_rl(bo, bi, 3, k)
+
+static void aes_encrypt(void *ctx_arg, u8 *out, const u8 *in)
+{
+	const struct aes_ctx *ctx = ctx_arg;
+	u32 b0[4], b1[4];
+	const u32 *kp = E_KEY + 4;
+	b0[0] = u32_in (in) ^ E_KEY[0];
+	b0[1] = u32_in (in + 4) ^ E_KEY[1];
+	b0[2] = u32_in (in + 8) ^ E_KEY[2];
+	b0[3] = u32_in (in + 12) ^ E_KEY[3];
+
+	if (ctx->key_length > 24) {
+		f_nround (b1, b0, kp);
+		f_nround (b0, b1, kp);
+	}
+
+	if (ctx->key_length > 16) {
+		f_nround (b1, b0, kp);
+		f_nround (b0, b1, kp);
+	}
+
+	f_nround (b1, b0, kp);
+	f_nround (b0, b1, kp);
+	f_nround (b1, b0, kp);
+	f_nround (b0, b1, kp);
+	f_nround (b1, b0, kp);
+	f_nround (b0, b1, kp);
+	f_nround (b1, b0, kp);
+	f_nround (b0, b1, kp);
+	f_nround (b1, b0, kp);
+	f_lround (b0, b1, kp);
+
+	u32_out (out, b0[0]);
+	u32_out (out + 4, b0[1]);
+	u32_out (out + 8, b0[2]);
+	u32_out (out + 12, b0[3]);
+}
+
+/* decrypt a block of text */
+
+#define i_nround(bo, bi, k) \
+    i_rn(bo, bi, 0, k);     \
+    i_rn(bo, bi, 1, k);     \
+    i_rn(bo, bi, 2, k);     \
+    i_rn(bo, bi, 3, k);     \
+    k -= 4
+
+#define i_lround(bo, bi, k) \
+    i_rl(bo, bi, 0, k);     \
+    i_rl(bo, bi, 1, k);     \
+    i_rl(bo, bi, 2, k);     \
+    i_rl(bo, bi, 3, k)
+
+static void aes_decrypt(void *ctx_arg, u8 *out, const u8 *in)
+{
+	const struct aes_ctx *ctx = ctx_arg;
+	u32 b0[4], b1[4];
+	const int key_len = ctx->key_length;
+	const u32 *kp = D_KEY + key_len + 20;
+
+	b0[0] = u32_in (in) ^ E_KEY[key_len + 24];
+	b0[1] = u32_in (in + 4) ^ E_KEY[key_len + 25];
+	b0[2] = u32_in (in + 8) ^ E_KEY[key_len + 26];
+	b0[3] = u32_in (in + 12) ^ E_KEY[key_len + 27];
+
+	if (key_len > 24) {
+		i_nround (b1, b0, kp);
+		i_nround (b0, b1, kp);
+	}
+
+	if (key_len > 16) {
+		i_nround (b1, b0, kp);
+		i_nround (b0, b1, kp);
+	}
+
+	i_nround (b1, b0, kp);
+	i_nround (b0, b1, kp);
+	i_nround (b1, b0, kp);
+	i_nround (b0, b1, kp);
+	i_nround (b1, b0, kp);
+	i_nround (b0, b1, kp);
+	i_nround (b1, b0, kp);
+	i_nround (b0, b1, kp);
+	i_nround (b1, b0, kp);
+	i_lround (b0, b1, kp);
+
+	u32_out (out, b0[0]);
+	u32_out (out + 4, b0[1]);
+	u32_out (out + 8, b0[2]);
+	u32_out (out + 12, b0[3]);
+}
+
+
+static struct crypto_alg aes_alg = {
+	.cra_name		=	"aes",
+	.cra_flags		=	CRYPTO_ALG_TYPE_CIPHER,
+	.cra_blocksize		=	AES_BLOCK_SIZE,
+	.cra_ctxsize		=	sizeof(struct aes_ctx),
+	.cra_module		=	THIS_MODULE,
+	.cra_list		=	LIST_HEAD_INIT(aes_alg.cra_list),
+	.cra_u			=	{
+		.cipher = {
+			.cia_min_keysize	=	AES_MIN_KEY_SIZE,
+			.cia_max_keysize	=	AES_MAX_KEY_SIZE,
+			.cia_setkey	   	= 	aes_set_key,
+			.cia_encrypt	 	=	aes_encrypt,
+			.cia_decrypt	  	=	aes_decrypt
+		}
+	}
+};
+
+int __init aes_init(void)
+{
+	gen_tabs();
+	return crypto_register_alg(&aes_alg);
+}
+
+void __exit aes_fini(void)
+{
+	crypto_unregister_alg(&aes_alg);
+}
+
+#ifndef BUILT_IN_CRYPTO
+module_init(aes_init);
+module_exit(aes_fini);
+
+MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm");
+MODULE_LICENSE("Dual BSD/GPL");
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl8192s/r8192S_led.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl8192s/r8192S_led.h
@@ -0,0 +1,84 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+#ifndef __INC_HAL8192SELED_H
+#define __INC_HAL8192SELED_H
+
+
+
+typedef	enum _LED_STATE_8190{
+	LED_UNKNOWN = 0,
+	LED_ON = 1,
+	LED_OFF = 2,
+	LED_BLINK_NORMAL = 3,
+	LED_BLINK_SLOWLY = 4,
+	LED_POWER_ON_BLINK = 5,
+	LED_SCAN_BLINK = 6, 
+	LED_NO_LINK_BLINK = 7, 
+	LED_BLINK_StartToBlink = 8, 
+	LED_BLINK_TXRX = 9,
+	LED_BLINK_RUNTOP = 10, 
+	LED_BLINK_CAMEO = 11,
+}LED_STATE_8190;
+
+typedef enum _LED_PIN_8190{
+	LED_PIN_GPIO0,
+	LED_PIN_LED0,
+	LED_PIN_LED1
+}LED_PIN_8190;
+
+typedef struct _LED_8190{
+	void *			dev;
+
+	LED_PIN_8190	LedPin;	
+
+	LED_STATE_8190	CurrLedState; 
+	bool				bLedOn; 
+
+	bool				bLedBlinkInProgress; 
+
+	bool				bLedSlowBlinkInProgress;
+	u32				BlinkTimes; 
+	LED_STATE_8190	BlinkingLedState; 
+
+	struct timer_list 	BlinkTimer; 
+} LED_8190, *PLED_8190;
+
+
+
+
+typedef	enum _LED_STRATEGY_8190{
+	SW_LED_MODE0, 
+	SW_LED_MODE1, 
+	SW_LED_MODE2, 
+	SW_LED_MODE3, 
+	SW_LED_MODE4, 
+	SW_LED_MODE5, 
+	SW_LED_MODE6, 
+	SW_LED_MODE7, 
+	SW_LED_MODE8,
+	SW_LED_MODE9, 
+	HW_LED, 
+}LED_STRATEGY_8190, *PLED_STRATEGY_8190;
+
+
+void InitSwLeds(struct net_device *dev);
+void DeInitSwLeds(struct net_device *dev);
+void LedControl8192SE(struct net_device *dev, LED_CTL_MODE LedAction);
+
+#endif	/*__INC_HAL8190PCILED_H*/
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl8192s/r8192S_mp.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl8192s/r8192S_mp.c
@@ -0,0 +1,1256 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * Based on the r8180 driver, which is:
+ * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+
+#ifdef CONFIG_MP
+#include "../rtl_core.h"
+#include "r8192S_phy.h"
+#include "r8192S_phyreg.h"
+#include "r8192S_mp.h"
+
+void rtl8192_init_mp(struct net_device* dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+
+	priv->chan_forced = false;
+
+	priv->bSingleCarrier = false;
+	priv->RegBoard = 0;
+	priv->bCckContTx = false; 
+	priv->bOfdmContTx = false; 
+	priv->bStartContTx = false; 
+	priv->RegPaModel = 0; 
+	priv->btMpCckTxPower = 0; 
+	priv->btMpOfdmTxPower = 0; 
+}
+
+static bool r8192_MgntIsRateValidForWirelessMode(u8 rate, u8 wirelessmode)
+{
+	bool bReturn = false;
+
+	switch(wirelessmode)
+	{
+	case WIRELESS_MODE_A:
+	case WIRELESS_MODE_N_5G:
+		if((rate >= 12) && (rate <= 108) && (rate != 22) && (rate != 44))
+		{
+			bReturn = true;
+		}
+		break;
+
+	case WIRELESS_MODE_B:
+		if( ((rate <= 22) && (rate != 12) && (rate != 18)) || 
+			(rate == 44) )
+		{
+			bReturn = true;
+		}
+		break;
+
+	case WIRELESS_MODE_G:
+	case WIRELESS_MODE_G | WIRELESS_MODE_B:
+	case WIRELESS_MODE_N_24G:
+		if((rate >= 2) && (rate <= 108))
+		{
+			bReturn = true;
+		}
+		break;
+
+	case WIRELESS_MODE_AUTO:
+		printk("MgntIsRateValidForWirelessMode(): wirelessmode should not be WIRELESS_MODE_AUTO\n");
+		break;
+
+	default:
+		printk("MgntIsRateValidForWirelessMode(): Unknown wirelessmode: %d\n", wirelessmode);
+		break;
+	}
+
+	if(!bReturn)
+	{
+		if(wirelessmode&(WIRELESS_MODE_N_24G|WIRELESS_MODE_N_5G))
+		{
+			if((rate>=0x80) && (rate<=MGN_MCS15_SG)) 
+				bReturn = true;
+		}
+	}
+	return bReturn;
+}
+
+inline u8 r8192_is_wireless_b_mode(u16 rate)
+{
+	if( ((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220) )
+		return 1;
+	else return 0;
+}
+
+static void r8192_XmitOnePacket(struct net_device* dev)
+{
+	struct r8192_priv* priv = rtllib_priv(dev);
+	struct rtllib_device* ieee = priv->rtllib;
+	struct sk_buff* skb = rtllib_get_beacon(ieee);
+	
+	if (unlikely(!skb)){
+		printk("========>error alloc skb\n");
+		return;
+	}
+
+	priv->rtllib->softmac_data_hard_start_xmit(skb, dev, ieee->rate);
+}
+
+int r8192_wx_mp_set_chan(struct net_device *dev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	struct rtllib_device *ieee = priv->rtllib;
+        int ret = -1;
+	u8 channel;
+
+	down(&priv->wx_sem);
+
+	channel = *extra;
+	
+	rtllib_stop_scan(ieee);
+
+        printk("####RTL819X MP####set channel[1-11] %d\n",channel);
+
+	if((channel > 11) || (channel < 1)) {
+	up(&priv->wx_sem);
+       	 	return ret;
+	}
+
+	priv->rtllib->current_network.channel = channel;
+	priv->MptChannelToSw = channel;	
+
+	priv->chan_forced = false;
+	MPT_ProSwChannel(dev);
+	priv->chan_forced = true;
+
+	ret = 0;
+        up(&priv->wx_sem);
+		
+        return ret;
+	 
+}
+
+int r8192_wx_mp_set_txrate(struct net_device *dev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{
+        struct r8192_priv *priv = rtllib_priv(dev);
+	struct rtllib_device* ieee = priv->rtllib;
+	int ret = -1;
+	u32 data_rate_index = 0;
+
+        down(&priv->wx_sem);
+             
+	data_rate_index = *extra;
+
+	printk("####RTL819X MP####set tx rate index %d\n",data_rate_index);
+	
+	priv->MptRateIndex = data_rate_index;
+
+	if((data_rate_index > 27) || (data_rate_index < 0)) {
+        	up(&priv->wx_sem);		
+       	 	return ret;
+	} else if(data_rate_index <= 3) {
+		ieee->mode = WIRELESS_MODE_B;
+	} else if (data_rate_index <= 11) {
+		ieee->mode = WIRELESS_MODE_G;
+	} else {
+		ieee->mode = WIRELESS_MODE_N_24G;
+	}	
+
+	MPT_ProSetDataRate819x(dev);
+	
+	printk("####RTL819X MP####set tx rate %d\n",ieee->rate);
+	
+	ret = 0;
+        up(&priv->wx_sem);
+
+	return ret;
+}
+
+int r8192_wx_mp_set_txpower(struct net_device *dev, 
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	int ret = -1;
+	u8 power_index = 0;
+	
+	down(&priv->wx_sem);
+
+	power_index = *extra;
+
+        printk("####RTL819X MP####set tx power index %d\n",power_index);
+
+	if((power_index > 0x3F) || (power_index < 0x00)) {
+        	up(&priv->wx_sem);		
+       	 	return ret;
+	}
+
+	mpt_ProSetTxPower(dev, power_index);
+
+	ret = 0;
+	up(&priv->wx_sem);
+	
+	return ret;
+	
+}
+
+int r8192_wx_mp_set_bw(struct net_device *dev,
+			       struct iw_request_info *info, 
+			       union iwreq_data *wrqu, char *extra)
+{
+        struct r8192_priv *priv = rtllib_priv(dev);
+	int ret = -1;
+	u8 bw_index = 0;
+
+        down(&priv->wx_sem);
+
+	bw_index = *extra;
+
+        printk("####RTL819X MP####set bandwith  index %d [0: 20MHz 1: 40MHz]\n",bw_index);
+
+	priv->MptBandWidth = bw_index;
+
+#if 0
+	if((bw_index > 1) || (bw_index < 0)) {
+	up(&priv->wx_sem);
+       	 	return ret;
+	} else if(bw_index == 1) {
+		HTSetConnectBwMode(priv->rtllib, HT_CHANNEL_WIDTH_20_40, 
+			(priv->rtllib->current_network.channel<=6)?HT_EXTCHNL_OFFSET_UPPER:HT_EXTCHNL_OFFSET_LOWER);  
+	} else {
+		HTSetConnectBwMode(priv->rtllib, HT_CHANNEL_WIDTH_20, 
+			(priv->rtllib->current_network.channel<=6)?HT_EXTCHNL_OFFSET_UPPER:HT_EXTCHNL_OFFSET_LOWER);  
+	}
+#else
+	MPT_ProSetBandWidth819x(dev);
+#endif
+
+	ret = 0;
+	up(&priv->wx_sem);
+	
+	return ret;
+	
+}
+
+
+
+int r8192_wx_mp_set_txstart(struct net_device *dev,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+{
+        struct r8192_priv *priv = rtllib_priv(dev);
+    struct rtllib_device *ieee = priv->rtllib;
+    int ret = -1;
+    u8 start_flag = 0;
+
+        down(&priv->wx_sem);
+
+    start_flag = *extra;
+
+    if(start_flag == 1) { 
+	if (priv->bCckContTx || priv->bOfdmContTx) {
+	    printk("####RTL819X MP####continious Tx is undergoing, please close it first\n");
+	    ret = -EBUSY;
+        up(&priv->wx_sem);
+	    return ret;
+	}
+
+	if(r8192_is_wireless_b_mode(ieee->rate)) {
+	    printk("####RTL819X MP####start cck continious TX, rate:%d\n", ieee->rate);
+	    mpt_StartCckContTx(dev, true);
+	    r8192_XmitOnePacket(dev);
+	} else {
+	    printk("####RTL819X MP####start  ofdm continious TX, rate:%d\n", ieee->rate);
+	    mpt_StartOfdmContTx(dev);
+	    r8192_XmitOnePacket(dev);
+	} 
+    } else if(start_flag == 2) {
+	bool	bCckContTx = priv->bCckContTx;
+	bool	bOfdmContTx = priv->bOfdmContTx;
+
+	if(bCckContTx && !bOfdmContTx) {
+	    printk("####RTL819X MP####stop cck continious TX\n");
+	    mpt_StopCckCoNtTx(dev);
+	} else if (!bCckContTx && bOfdmContTx) {
+	    printk("####RTL819X MP####stop ofdm continious TX\n");
+	    mpt_StopOfdmContTx(dev);
+	} else if(!bCckContTx && !bOfdmContTx) { 
+	    ;
+	} else { 
+	    printk("####RTL819X MP#### Unexpected case! bCckContTx: %d , bOfdmContTx: %d\n",
+		    bCckContTx, bOfdmContTx);
+}
+    } else {
+	ret = -1;
+	up(&priv->wx_sem);
+	return ret;
+    }
+
+
+    ret = 0;
+    up(&priv->wx_sem);
+
+    return ret;
+
+}
+
+int r8192_wx_mp_set_singlecarrier(struct net_device *dev,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+{
+        struct r8192_priv *priv = rtllib_priv(dev);
+	struct rtllib_device *ieee = priv->rtllib;
+        int ret = -1;
+	u8 start_flag = 0;
+
+	if((ieee->rate > 108) || (ieee->rate < 12))
+		printk("####RTL819X MP#### we did not do singlecarrier when rate not in [6M-54M] tmp, see StartTesting_SingleCarrierTx to get more\n");
+
+        down(&priv->wx_sem);
+	
+	start_flag = *extra;
+
+	if(start_flag == 1){ 
+		if (priv->bCckContTx || priv->bOfdmContTx || priv->bSingleCarrier){
+			printk("####RTL819X MP#### single carrier continious Tx is undergoing, please close it first\n");
+			ret = -EBUSY;
+        up(&priv->wx_sem);
+			return ret;
+		}	
+
+		printk("####RTL819X MP####start single carrier cck continious TX\n");
+		mpt_StartOfdmContTx(dev);
+		r8192_XmitOnePacket(dev);
+		
+	} else if(start_flag == 2) {
+		 if (priv->bCckContTx) {
+			printk("####RTL819X MP####stop single cck continious TX\n");
+			mpt_StopCckCoNtTx(dev);
+		} 
+		 if (priv->bOfdmContTx) {
+			printk("####RTL819X MP####stop single ofdm continious TX\n");
+			mpt_StopOfdmContTx(dev);
+		} 
+		 if (priv->bSingleCarrier) {
+			printk("####RTL819X MP####stop single carrier mode\n");
+			MPT_ProSetSingleCarrier(dev, false);
+		}
+	} else {
+		ret = -1;
+		up(&priv->wx_sem);
+
+		return ret;
+	}
+
+	ret = 0;
+        up(&priv->wx_sem);
+		
+        return ret;
+
+}
+int r8192_wx_mp_write_rf(struct net_device *dev,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+{
+        struct r8192_priv *priv = rtllib_priv(dev);
+	u32	ulIoType, INulRegOffset, INulRegValue;
+	u32 *info_buf = (u32*)(&wrqu->freq.m);
+        u32 ulRegOffset = info_buf[0];
+	u32 ulRegValue = info_buf[1];
+	u32 RF_PATH = info_buf[2];
+
+        down(&priv->wx_sem);
+	printk("####RTL819X MP####%s :ulRegOffset %x, ulRegValue %x, RF_PATH:%x\n", 
+		__func__, ulRegOffset, ulRegValue, RF_PATH);
+
+	ulIoType = MPT_WRITE_RF;
+	INulRegOffset = ulRegOffset & bRFRegOffsetMask;
+	INulRegValue = ulRegValue & bRFRegOffsetMask;
+
+
+	priv->MptIoOffset = INulRegOffset;
+	priv->MptIoValue = INulRegValue;
+	priv->MptRfPath = RF_PATH;
+	priv->MptActType = ulIoType;
+
+	mpt_Pro819xIoCallback(dev);
+
+        up(&priv->wx_sem);
+        return 0;
+
+}
+
+int r8192_wx_mp_write_mac(struct net_device *dev,
+                               struct iw_request_info *info,
+                               union iwreq_data *wrqu, char *extra)
+{
+        struct r8192_priv *priv = rtllib_priv(dev);
+	u32 *info_buf = (u32*)(&wrqu->freq.m);
+        u32 ulRegOffset = info_buf[0];
+	u32 ulRegValue = info_buf[1];
+	u32 ulRegDataWidth = info_buf[2];
+	u32 ulIoType = 0;
+
+        down(&priv->wx_sem);
+
+	printk("####RTL819X MP####%s :ulRegOffset %x, ulRegValue %x, ulRegDataWidth:%x\n", 
+		__func__, ulRegOffset, ulRegValue, ulRegDataWidth);
+		
+	switch(ulRegDataWidth)
+	{
+	case 1:
+		ulIoType = MPT_WRITE_MAC_1BYTE;
+		break;
+
+	case 2:
+		ulIoType = MPT_WRITE_MAC_2BYTE;
+		break;
+	case 4:
+		ulIoType = MPT_WRITE_MAC_4BYTE;
+		break;
+	default:
+		printk("####RTL819X MP####%s :error ulRegDataWidth:%x\n", __func__, ulRegDataWidth);
+		break;
+                }
+
+	if(ulIoType != 0){
+		priv->MptIoOffset = ulRegOffset;
+		priv->MptIoValue = ulRegValue;
+		priv->MptActType = ulIoType;
+		mpt_Pro819xIoCallback(dev);
+        }
+
+        up(&priv->wx_sem);
+
+	return 0;
+
+}
+
+/*-----------------------------------------------------------------------------
+ * Function:	mpt_StartCckContTx()
+ *
+ * Overview:	Start CCK Continuous Tx.
+ *
+ * Input:		PADAPTER	pAdapter
+ *				BOOLEAN		bScrambleOn
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	05/16/2007	MHC		Create Version 0.  
+ *
+ *---------------------------------------------------------------------------*/
+void mpt_StartCckContTx(struct net_device *dev,bool bScrambleOn)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	u32			cckrate;
+
+	if(!rtl8192_QueryBBReg(dev, rFPGA0_RFMOD, bCCKEn))
+		rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, bEnable);
+
+	rtl8192_setBBreg(dev, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
+	rtl8192_setBBreg(dev, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
+	rtl8192_setBBreg(dev, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
+	switch(priv->rtllib->rate)
+	{
+		case 2:
+			cckrate = 0;
+			break;
+		case 4:
+			cckrate = 1;
+			break;
+		case 11:
+			cckrate = 2;
+			break;
+		case 22:
+			cckrate = 3;
+			break;
+		default:
+			cckrate = 0;
+			break;
+	}
+	rtl8192_setBBreg(dev, rCCK0_System, bCCKTxRate, cckrate);
+
+	rtl8192_setBBreg(dev, rCCK0_System, bCCKBBMode, 0x2);    
+	rtl8192_setBBreg(dev, rCCK0_System, bCCKScramble, 0x1);  
+
+	priv->bCckContTx = true;
+	priv->bOfdmContTx = false;
+	
+}	/* mpt_StartCckContTx */
+
+/*-----------------------------------------------------------------------------
+ * Function:	mpt_StartOfdmContTx()
+ *
+ * Overview:	Start OFDM Continuous Tx.
+ *
+ * Input:		PADAPTER	pAdapter
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	05/16/2007	MHC		Create Version 0.  
+ *
+ *---------------------------------------------------------------------------*/
+void mpt_StartOfdmContTx(struct net_device *dev)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+
+	if(!rtl8192_QueryBBReg(dev, rFPGA0_RFMOD, bOFDMEn))
+		rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, bEnable);
+
+	rtl8192_setBBreg(dev, rCCK0_System, bCCKBBMode, bDisable);
+
+	rtl8192_setBBreg(dev, rCCK0_System, bCCKScramble, bEnable);
+
+	rtl8192_setBBreg(dev, rOFDM1_LSTF, bOFDMContinueTx, bEnable);
+	rtl8192_setBBreg(dev, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
+	rtl8192_setBBreg(dev, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
+
+	priv->bCckContTx = false;
+	priv->bOfdmContTx = true;
+
+}	/* mpt_StartOfdmContTx */
+
+/*-----------------------------------------------------------------------------
+ * Function:	mpt_StopCckCoNtTx()
+ *
+ * Overview:	Stop CCK Continuous Tx.
+ *
+ * Input:		PADAPTER	pAdapter
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	05/16/2007	MHC		Create Version 0.  
+ *
+ *---------------------------------------------------------------------------*/
+void mpt_StopCckCoNtTx(struct net_device *dev)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+
+	priv->bCckContTx = false;
+	priv->bOfdmContTx = false;
+
+	rtl8192_setBBreg(dev, rCCK0_System, bCCKBBMode, 0x0);    
+	rtl8192_setBBreg(dev, rCCK0_System, bCCKScramble, 0x1);  
+
+	rtl8192_setBBreg(dev, rPMAC_Reset, bBBResetB, 0x0);
+	rtl8192_setBBreg(dev, rPMAC_Reset, bBBResetB, 0x1);
+	
+}	/* mpt_StopCckCoNtTx */
+
+/*-----------------------------------------------------------------------------
+ * Function:	mpt_StopOfdmContTx()
+ *
+ * Overview:	Stop 818xB OFDM Continuous Tx.
+ *
+ * Input:		PADAPTER	pAdapter
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	05/16/2007	MHC		Create Version 0.  
+ *
+ *---------------------------------------------------------------------------*/
+void mpt_StopOfdmContTx(struct net_device *dev)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+
+	priv->bCckContTx = false;
+	priv->bOfdmContTx = false;
+
+	rtl8192_setBBreg(dev, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
+	rtl8192_setBBreg(dev, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
+	rtl8192_setBBreg(dev, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
+	mdelay(10);
+	rtl8192_setBBreg(dev, rPMAC_Reset, bBBResetB, 0x0);
+	rtl8192_setBBreg(dev, rPMAC_Reset, bBBResetB, 0x1);
+
+}	/* mpt_StopOfdmContTx */
+
+/*-----------------------------------------------------------------------------
+ * Function:	mpt_SwitchRfSetting92S
+ *
+ * Overview:	Change RF Setting when we siwthc channel/rate/BW for 92S series MP.
+ *
+ * Input:       IN	PADAPTER				pAdapter
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 01/08/2009	MHC		Suggestion from SD3 Willis for 92S series.
+ * 01/09/2009	MHC		Add CCK modification for 40MHZ. Suggestion from SD3.
+ *
+ *---------------------------------------------------------------------------*/
+ void mpt_SwitchRfSetting92S(struct net_device *dev)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	u8	ChannelToSw = priv->MptChannelToSw;
+	u32	ulRateIdx = priv->MptRateIndex;
+	u32	ulbandwidth = priv->MptBandWidth;
+
+	if (ulbandwidth == BAND_20MHZ_MODE)
+	{
+		if (ChannelToSw == 1)
+		{
+			rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)0, RF_IPA, 0xFFFFF, 0x0A8F4);
+		}
+		else if (ChannelToSw == 11)
+		{
+			rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)0, RF_IPA, 0xFFFFF, 0x0F8F5);
+		}
+		else	
+		{
+			rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)0, RF_IPA, 0xFFFFF, 0x0F8F4);
+		}
+	}
+	else 	
+	{
+		if (ChannelToSw == 3)
+		{
+			rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)0, RF_IPA, 0xFFFFF, 0x0A8F4);
+		}
+		else if (ChannelToSw == 9 || ChannelToSw == 10 || ChannelToSw == 11)
+		{
+			rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)0, RF_IPA, 0xFFFFF, 0x0F8F5);
+		}
+		else	
+		{
+			rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)0, RF_IPA, 0xFFFFF, 0x0F8F4);
+		}
+	}
+
+
+	if (ulRateIdx < MPT_RATE_6M)	
+		rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)0, RF_SYN_G2, 0xFFFFF, 0x04440);
+	else		
+		rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)0, RF_SYN_G2, 0xFFFFF, 0x0F200);
+}	
+
+/*-----------------------------------------------------------------------------
+ * Function:	mpt_ProSetTxPower()
+ *
+ * Overview:	Change Tx Power of current channel for 
+ *				OID_RT_PRO_SET_TX_POWER_CONTROL.
+ *
+ * Input:		NONE
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	05/16/2007	MHC		Create Version 0.  
+ *
+ *---------------------------------------------------------------------------*/
+bool mpt_ProSetTxPower(	struct net_device *dev,	u32 ulTxPower)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	u8		CurrChannel = priv->rtllib->current_network.channel;
+	bool		bResult = true;
+	
+	CurrChannel = priv->MptChannelToSw;
+	
+	if(CurrChannel > 11 || CurrChannel < 1)
+	{
+		printk("mpt_ProSetTxPower(): CurrentChannel:%d is not valid\n", CurrChannel);		
+		return false;
+	}
+
+	if(ulTxPower > MAX_TX_PWR_INDEX_N_MODE)
+	{
+		printk("mpt_ProSetTxPower(): TxPWR:%d is invalid\n", ulTxPower);		
+		return false;
+	}
+
+	if( priv->MptRateIndex >= MPT_RATE_1M &&
+		priv->MptRateIndex <= MPT_RATE_11M )
+	{
+		priv->TxPowerLevelCCK[CurrChannel-1] = (u8)ulTxPower;
+		
+		priv->RfTxPwrLevelCck[0][CurrChannel-1] = (u8)ulTxPower;
+	}
+	else if(priv->MptRateIndex >= MPT_RATE_6M &&
+			priv->MptRateIndex <= MPT_RATE_MCS15 )
+	{
+		priv->TxPowerLevelOFDM24G[CurrChannel-1] = (u8)ulTxPower;
+
+		priv->RfTxPwrLevelOfdm1T[0][CurrChannel-1] = (u8)ulTxPower;
+		priv->RfTxPwrLevelOfdm2T[0][CurrChannel-1] = (u8)ulTxPower;
+	}
+
+	 rtl8192_phy_setTxPower(dev,CurrChannel);
+
+	return bResult;
+
+}	/* mpt_ProSetTxPower */
+
+/*-----------------------------------------------------------------------------
+ * Function:	mpt_ProSetTxAGCOffset()
+ *
+ * Overview:	Change Tx AGC Offset 
+ *				OID_RT_PRO_SET_TX_AGC_OFFSET.
+ *
+ * Input:			NONE
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	08/09/2007	Cosa	Create Version 0.  
+ *
+ *---------------------------------------------------------------------------*/
+bool mpt_ProSetTxAGCOffset(struct net_device *dev,	u32	ulTxAGCOffset)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	bool	bResult = true;
+	u32	TxAGCOffset_B, TxAGCOffset_C, TxAGCOffset_D;
+
+	TxAGCOffset_B = (ulTxAGCOffset&0x000000ff);
+	TxAGCOffset_C = ((ulTxAGCOffset&0x0000ff00)>>8);
+	TxAGCOffset_D = ((ulTxAGCOffset&0x00ff0000)>>16);
+
+	if( TxAGCOffset_B > TxAGC_Offset_neg1 ||
+		TxAGCOffset_C > TxAGC_Offset_neg1 ||
+		TxAGCOffset_D > TxAGC_Offset_neg1 )
+	{
+		printk("mpt_ProSetTxAGCOffset(): TxAGCOffset:%d is invalid\n", ulTxAGCOffset);
+		return false;
+	}
+
+	priv->AntennaTxPwDiff[0] = TxAGCOffset_B;
+	priv->AntennaTxPwDiff[1] = TxAGCOffset_C;
+	priv->AntennaTxPwDiff[2] = TxAGCOffset_D;
+	
+	MPT_ProSetTxAGCOffset(dev);
+
+	return bResult;
+
+}	/* mpt_ProSetTxPower */
+
+/*-----------------------------------------------------------------------------
+ * Function:	mpt_ProSetTxAGCOffset()
+ *
+ * Overview:	Change Tx AGC Offset 
+ *				OID_RT_PRO_SET_TX_AGC_OFFSET.
+ *
+ * Input:			NONE
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	08/09/2007	Cosa	Create Version 0.  
+ *
+ *---------------------------------------------------------------------------*/
+bool mpt_ProSetRxFilter(struct net_device *dev, u32	RCRMode)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+
+	if(RCRMode == 1)
+	{ 
+		priv->MptRCR &= ~(RCR_AAP|RCR_AM|RCR_AB);
+		priv->MptRCR |= RCR_APM;
+		write_nic_dword(dev, RCR, priv->MptRCR);
+	}
+	else
+	{ 
+		priv->MptRCR |= (RCR_AAP|RCR_APM|RCR_AM|RCR_AB);
+		write_nic_dword(dev, RCR, priv->MptRCR);
+	}
+
+	return 1;
+}	/* mpt_ProSetTxPower */
+
+/*-----------------------------------------------------------------------------
+ * Function:	mpt_ProSetModulation()
+ *
+ * Overview:	Switch wireless mode for OID_RT_PRO_SET_MODULATION.
+ *
+ * Input:		PADAPTER	pAdapter
+ *				ULONG		ulWirelessMode
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	05/16/2007	MHC		Create Version 0.  
+ *
+ *---------------------------------------------------------------------------*/
+bool mpt_ProSetModulation(struct net_device *dev, u32 ulWirelessMode)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	WIRELESS_MODE	WirelessMode;
+	bool				bResult = false;
+
+	switch(ulWirelessMode)
+	{
+	case WIRELESS_MODE_A: 
+		WirelessMode = WIRELESS_MODE_A;
+		break;
+
+	case WIRELESS_MODE_B: 
+		WirelessMode = WIRELESS_MODE_B;
+		break;
+
+	case WIRELESS_MODE_G: 
+	case WIRELESS_MODE_G |WIRELESS_MODE_B: 
+		WirelessMode = WIRELESS_MODE_G;
+		break;
+
+	case WIRELESS_MODE_N_24G:
+		WirelessMode = WIRELESS_MODE_N_24G;
+		break;
+
+	case WIRELESS_MODE_N_5G:
+		WirelessMode = WIRELESS_MODE_N_5G;
+		break;
+
+	case WIRELESS_MODE_AUTO: 
+	default:
+		bResult = false;
+		return bResult;
+		break;
+	}
+
+	priv->rtllib->mode = WirelessMode;
+	priv->RegWirelessMode = WirelessMode;
+	rtl8192_SetWirelessMode(dev, priv->rtllib->mode);
+	HTUseDefaultSetting(priv->rtllib);
+	
+
+	if (IS_HARDWARE_TYPE_8192SE(dev))
+	{		
+		mpt_SwitchRfSetting92S(dev);
+	}
+	
+	bResult = true;
+	
+	return bResult;
+
+}
+
+/*-----------------------------------------------------------------------------
+ * Function:	mpt_Pro819xIoCallback()
+ *
+ * Overview:	Callback function of a workitem for IO.	
+ *
+ * Input:		NONE
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	05/16/2007	MHC		Create Version 0.  
+ *
+ *---------------------------------------------------------------------------*/
+void mpt_Pro819xIoCallback(struct net_device *dev)
+{
+
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	u32 MptActType = priv->MptActType;
+
+	printk("####RTL819X MP####%s :ulRegOffset %x, ulRegValue %x, MptActType:%x, MptRfPath:%x\n", 
+		__func__, priv->MptIoOffset, priv->MptIoValue, MptActType, priv->MptRfPath);
+
+	switch(MptActType)
+	{
+	case MPT_WRITE_MAC_1BYTE:
+		write_nic_byte(dev, priv->MptIoOffset, (u8)(priv->MptIoValue));
+		break;
+
+	case MPT_WRITE_MAC_2BYTE:
+		write_nic_word(dev, priv->MptIoOffset, (u16)(priv->MptIoValue));
+		break;
+
+	case MPT_WRITE_MAC_4BYTE:
+		write_nic_dword(dev, priv->MptIoOffset, (u32)(priv->MptIoValue));
+		break;
+
+	case MPT_WRITE_RF:
+		rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)priv->MptRfPath, 
+			priv->MptIoOffset, bRFRegOffsetMask, priv->MptIoValue);
+		break;
+
+	default:
+		break;
+	}
+}
+
+void MPT_ProSetSingleCarrier(struct net_device *dev, bool ulMode)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+
+	if(ulMode == 1) { 
+		priv->bSingleCarrier = true;
+	} else { 
+		priv->bSingleCarrier = false;
+	}
+	
+	if(priv->bSingleCarrier)
+	{
+		if(!rtl8192_QueryBBReg(dev, rFPGA0_RFMOD, bOFDMEn))
+			rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, bEnable);
+
+		rtl8192_setBBreg(dev, rCCK0_System, bCCKBBMode, bDisable);
+
+		rtl8192_setBBreg(dev, rCCK0_System, bCCKScramble, bEnable);
+
+		rtl8192_setBBreg(dev, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
+		rtl8192_setBBreg(dev, rOFDM1_LSTF, bOFDMSingleCarrier, bEnable);
+		rtl8192_setBBreg(dev, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
+	}
+	else
+	{ 
+	    rtl8192_setBBreg(dev, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
+	    rtl8192_setBBreg(dev, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
+	    rtl8192_setBBreg(dev, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
+	    mdelay(10);
+	    rtl8192_setBBreg(dev, rPMAC_Reset, bBBResetB, 0x0);
+	    rtl8192_setBBreg(dev, rPMAC_Reset, bBBResetB, 0x1);
+	}
+}
+
+/*-----------------------------------------------------------------------------
+ * Function:	MPT_ProSetBandWidth819x()
+ *
+ * Overview:	None
+ *
+ * Input:		PADAPTER			pAdapter
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	01/03/2007	Cosa	Create Version 0.  
+ *
+ *---------------------------------------------------------------------------*/
+void MPT_ProSetBandWidth819x(struct net_device *dev)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	PRT_HIGH_THROUGHPUT	pHTInfo = priv->rtllib->pHTInfo;
+	u32	ulbandwidth = priv->MptBandWidth;
+
+	printk("##################MPT_ProSetBandWidth819x() is start. \n");
+	/* 2007/06/07 MH Call normal driver API and set 40MHZ mode. */			
+	if (ulbandwidth == BAND_20MHZ_MODE) {
+		/* 20 MHZ sub-carrier mode --> dont care. */
+		pHTInfo->bCurBW40MHz = false;
+		pHTInfo->CurSTAExtChnlOffset = HT_EXTCHNL_OFFSET_NO_EXT;
+		priv->rtllib->SetBWModeHandler(dev, HT_CHANNEL_WIDTH_20, pHTInfo->CurSTAExtChnlOffset);
+	} else if (ulbandwidth == BAND_40MHZ_DUPLICATE_MODE) {
+		/* Sub-Carrier mode is defined in MAC data sheet chapter 12.3. */	
+		/* 40MHX sub-carrier mode --> duplicate. */
+		pHTInfo->bCurBW40MHz = true;				
+		pHTInfo->bCurTxBW40MHz = true;								
+		pHTInfo->CurSTAExtChnlOffset = HT_EXTCHNL_OFFSET_NO_DEF;			
+		
+		priv->rtllib->SetBWModeHandler(dev, HT_CHANNEL_WIDTH_20_40, pHTInfo->CurSTAExtChnlOffset);
+	} else if (ulbandwidth == BAND_40MHZ_LOWER_MODE) {
+		/* 40MHX sub-carrier mode --> lower mode  */
+		pHTInfo->bCurBW40MHz = true;				
+		pHTInfo->bCurTxBW40MHz = true;								
+		pHTInfo->CurSTAExtChnlOffset = HT_EXTCHNL_OFFSET_LOWER;
+		
+		/* Extention channel is lower. Current channel must > 3. */
+		/*if (pMgntInfo->dot11CurrentChannelNumber < 3)				
+			DbgPrint("Illegal Current_Chl=%d\r\n", pMgntInfo->dot11CurrentChannelNumber);
+		else
+			pAdapter->HalFunc.SwChnlByTimerHandler(pAdapter, pMgntInfo->dot11CurrentChannelNumber-2);*/
+		
+		priv->rtllib->SetBWModeHandler(dev, HT_CHANNEL_WIDTH_20_40, pHTInfo->CurSTAExtChnlOffset);
+	} else if (ulbandwidth == BAND_40MHZ_UPPER_MODE)	{
+		/* 40MHX sub-carrier mode --> upper mode  */
+		pHTInfo->bCurBW40MHz = true;				
+		pHTInfo->bCurTxBW40MHz = true;
+		pHTInfo->CurSTAExtChnlOffset = HT_EXTCHNL_OFFSET_UPPER;
+		
+		/* Extention channel is upper. Current channel must < 12. */
+		/*if (pMgntInfo->dot11CurrentChannelNumber > 12)
+			DbgPrint("Illegal Current_Chl=%d", pMgntInfo->dot11CurrentChannelNumber);
+		else
+			pAdapter->HalFunc.SwChnlByTimerHandler(pAdapter, pMgntInfo->dot11CurrentChannelNumber+2);*/
+		
+		priv->rtllib->SetBWModeHandler(dev, HT_CHANNEL_WIDTH_20_40, pHTInfo->CurSTAExtChnlOffset);
+	} else if (ulbandwidth == BAND_40MHZ_DONTCARE_MODE) {
+		/* 40MHX sub-carrier mode --> dont care mode  */
+		pHTInfo->bCurBW40MHz = true;
+		pHTInfo->bCurTxBW40MHz = true;
+		pHTInfo->CurSTAExtChnlOffset = HT_EXTCHNL_OFFSET_LOWER;
+		
+		priv->rtllib->SetBWModeHandler(dev, HT_CHANNEL_WIDTH_20_40, pHTInfo->CurSTAExtChnlOffset);
+	} else {
+		printk("##################MPT_ProSetBandWidth819x() error BW. \n");
+		return;
+	}
+
+{
+		mpt_SwitchRfSetting92S(dev);
+		return;
+	}
+	
+	printk("##################MPT_ProSetBandWidth819x() is finished. \n");
+}
+
+/*-----------------------------------------------------------------------------
+ * Function:	MPT_ProSwChannel()
+ *
+ * Overview:	Callback function of a work item to switch channel for 
+ *				OID_RT_PRO_SET_CHANNEL_DIRECT_CALL
+ *
+ * Input:		PVOID	Context
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	05/16/2007	MHC		Create Version 0.  
+ *	06/07/2007	MHC		Normal driver change switch channel handler. 
+ *	09/03/2008	MHC		RF channel register for 92S.
+ *	01/08/2008	MHC		For MP verification for 92S,weneed to change setting according
+ *						to SD3 Willis's document.
+ *
+ *---------------------------------------------------------------------------*/
+void MPT_ProSwChannel(struct net_device *dev)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	u8	ChannelToSw = priv->MptChannelToSw;
+	u8	eRFPath;
+
+	priv->rtllib->current_network.channel = ChannelToSw;
+	priv->MptChannelToSw = ChannelToSw;	
+
+	if (IS_HARDWARE_TYPE_8192SE(dev))
+	{
+		for(eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++)
+		{
+			rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, rRfChannel, 0x3FF, ChannelToSw);
+		}
+
+		if (IS_HARDWARE_TYPE_8192SE(dev))
+		{
+			mpt_SwitchRfSetting92S(dev);
+		}
+	}
+
+#ifdef MP_DEVELOP_READY 
+	for(eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++)
+	{
+		if (IS_HARDWARE_TYPE_8192SE(dev))
+			rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, rRfChannel, 0x3FF, ChannelToSw);		
+
+		udelay(100);
+	}
+
+	
+	for(eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++)
+	{
+		if (IS_HARDWARE_TYPE_8192SE(dev))
+			rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, rRfChannel, 0x3FF, ChannelToSw);		
+
+		udelay(100);
+	}
+#endif
+	
+	/* 2007/06/07 MH Normal driver change sw channel handler. It does not 
+	   support SwChnlByDelayHandler ans replace with SwChnlByTimerHandler. */
+	priv->rtllib->set_chan(dev, ChannelToSw);
+
+#if 0 
+	if(pHalData->CurrentChannel == 14 && !pHalData->bCCKinCH14){
+		pHalData->bCCKinCH14 = true;
+		MPT_CCKTxPowerAdjust(pAdapter,pHalData->bCCKinCH14);
+	}
+	else if(pHalData->CurrentChannel != 14 && pHalData->bCCKinCH14){
+		pHalData->bCCKinCH14 = false;
+		MPT_CCKTxPowerAdjust(pAdapter,pHalData->bCCKinCH14);
+	}
+#endif
+}	/* MPT_ProSwChannel */
+
+/*-----------------------------------------------------------------------------
+ * Function:	MPT_ProSetDataRate819x()
+ *
+ * Overview:	None
+ *
+ * Input:		PADAPTER			pAdapter
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	01/03/2007	Cosa	Create Version 0.  
+ *
+ *---------------------------------------------------------------------------*/
+void MPT_ProSetDataRate819x(struct net_device *dev)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	u8 	DataRate = 0xFF;
+	u32	ulRateIdx = priv->MptRateIndex;
+
+
+	printk("################MPT_ProSetDataRate819x():Rate=%d\n", ulRateIdx);
+	switch(ulRateIdx)
+	{
+		/* CCK rate. */
+		case	MPT_RATE_1M:		DataRate = 2;		break;
+		case	MPT_RATE_2M:		DataRate = 4;		break;
+		case	MPT_RATE_55M:	DataRate = 11;		break;
+		case	MPT_RATE_11M:	DataRate = 22;		break;
+	
+		/* OFDM rate. */
+		case	MPT_RATE_6M:		DataRate = 12;		break;
+		case	MPT_RATE_9M:		DataRate = 18;		break;
+		case	MPT_RATE_12M:	DataRate = 24;		break;
+		case	MPT_RATE_18M:	DataRate = 36;		break;
+		case	MPT_RATE_24M:	DataRate = 48;		break;			
+		case	MPT_RATE_36M:	DataRate = 72;		break;
+		case	MPT_RATE_48M:	DataRate = 96;		break;
+		case	MPT_RATE_54M:	DataRate = 108;	break;
+	
+		/* HT rate. */
+		case	MPT_RATE_MCS0:	DataRate = 0x80;	break;
+		case	MPT_RATE_MCS1:	DataRate = 0x81;	break;
+		case	MPT_RATE_MCS2:	DataRate = 0x82;	break;
+		case	MPT_RATE_MCS3:	DataRate = 0x83;	break;
+		case	MPT_RATE_MCS4:	DataRate = 0x84;	break;
+		case	MPT_RATE_MCS5:	DataRate = 0x85;	break;
+		case	MPT_RATE_MCS6:	DataRate = 0x86;	break;
+		case	MPT_RATE_MCS7:	DataRate = 0x87;	break;
+		case	MPT_RATE_MCS8:	DataRate = 0x88;	break;
+		case	MPT_RATE_MCS9:	DataRate = 0x89;	break;
+		case	MPT_RATE_MCS10:	DataRate = 0x8A;	break;
+		case	MPT_RATE_MCS11:	DataRate = 0x8B;	break;
+		case	MPT_RATE_MCS12:	DataRate = 0x8C;	break;
+		case	MPT_RATE_MCS13:	DataRate = 0x8D;	break;
+		case	MPT_RATE_MCS14:	DataRate = 0x8E;	break;
+		case	MPT_RATE_MCS15:	DataRate = 0x8F;	break;
+		case MPT_RATE_LAST:
+		break;
+
+	default:
+		break;
+	}
+	
+	{
+		mpt_SwitchRfSetting92S(dev);
+	}
+	
+#ifdef MP_DEVELOP_READY 	
+	if (IS_HARDWARE_TYPE_8192SE(dev))
+	{
+		for(eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++)
+		{
+			if (ulbandwidth == BAND_20MHZ_MODE)
+				rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, rRfChannel, (BIT11|BIT10), 0x01);		
+			else
+				rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, rRfChannel, (BIT11|BIT10), 0x00);		
+
+			delay_us(100);
+		}
+	} 	
+#endif
+
+
+	if(!r8192_MgntIsRateValidForWirelessMode(DataRate, 	priv->rtllib->mode) && 	DataRate != 0 ) 
+	{
+		printk("[MPT]: unknow wmode=%d", priv->rtllib->mode);
+	}	
+	if (DataRate != 0xFF)
+	{
+		printk("[MPT]: Force rate=0x%02x", DataRate);
+		priv->rtllib->rate = (int)DataRate;
+	}
+
+}
+
+/*-----------------------------------------------------------------------------
+ * Function:	MPT_ProSetTxAGCOffset()
+ *
+ * Overview:	Set Tx power level for
+ *				OID_RT_PRO_SET_TX_AGC_OFFSET
+ *
+ * Input:			PVOID	Context
+ *
+ * Output:		NONE
+ *
+ * Return:		NONE
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	08/09/2007	Cosa	Create Version 0.
+ *
+ *---------------------------------------------------------------------------*/
+void MPT_ProSetTxAGCOffset(struct net_device *dev)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	u32	u4RegValue, TxAGCOffset_B, TxAGCOffset_C, TxAGCOffset_D;
+
+	TxAGCOffset_B = priv->AntennaTxPwDiff[0];
+	TxAGCOffset_C = priv->AntennaTxPwDiff[1];
+	TxAGCOffset_D = priv->AntennaTxPwDiff[2];
+
+
+	u4RegValue = (TxAGCOffset_D<<8 | TxAGCOffset_C<<4 | TxAGCOffset_B);
+	rtl8192_setBBreg(dev, rFPGA0_TxGainStage, (bXBTxAGC|bXCTxAGC|bXDTxAGC), u4RegValue);
+	printk("##################MPT_ProSetTxAGCOffset() is finished \n");
+}
+
+#endif
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl8192s/r8192S_hwimg.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl8192s/r8192S_hwimg.c
@@ -0,0 +1,5904 @@
+/*Created on  2010/ 2/24,  2:32*/
+
+#ifdef RTL8192SE
+#include "r8192S_hwimg.h"
+
+u8 Rtl8192SEFwImgArray[ImgArrayLength] = {
+0x92,0x81,0x3e,0x70,0x30,0x00,0x00,0x00,0x08,0xb4,0x00,0x00,0xc8,0x87,0x00,0x00,
+0x30,0x00,0x00,0x00,0x40,0x86,0x00,0x00,0x3e,0x00,0x0c,0x00,0x01,0x18,0x17,0x51,
+0x92,0x81,0x01,0x01,0x00,0x00,0x22,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x00,0x01,0x01,0x01,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x7f,0x00,0x00,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
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+0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,
+0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x10,
+0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x00,0x7f,0x8d,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x6b,0x34,0xf0,0x00,0x6b,0x34,0xf0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x6b,0x25,0x60,0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x02,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x05,0x10,0xb8,0xff,0xff,0xff,0xff,
+};
+
+u8 Rtl8192SEFwMainArray[MainArrayLength] = {
+0x0, };
+
+u8 Rtl8192SEFwDataArray[DataArrayLength] = {
+0x0, };
+
+u32 Rtl8192SEPHY_REG_2T2RArray[PHY_REG_2T2RArrayLength] = {
+0x01c,0x07000000,
+0x800,0x00040000,
+0x804,0x00008003,
+0x808,0x0000fc00,
+0x80c,0x0000000a,
+0x810,0x10005088,
+0x814,0x020c3d10,
+0x818,0x00200185,
+0x81c,0x00000000,
+0x820,0x01000000,
+0x824,0x00390004,
+0x828,0x01000000,
+0x82c,0x00390004,
+0x830,0x00000004,
+0x834,0x00690200,
+0x838,0x00000004,
+0x83c,0x00690200,
+0x840,0x00010000,
+0x844,0x00010000,
+0x848,0x00000000,
+0x84c,0x00000000,
+0x850,0x00000000,
+0x854,0x00000000,
+0x858,0x48484848,
+0x85c,0x65a965a9,
+0x860,0x0f7f0130,
+0x864,0x0f7f0130,
+0x868,0x0f7f0130,
+0x86c,0x0f7f0130,
+0x870,0x03000700,
+0x874,0x03000300,
+0x878,0x00020002,
+0x87c,0x004f0201,
+0x880,0xa8300ac1,
+0x884,0x00000058,
+0x888,0x00000008,
+0x88c,0x00000004,
+0x890,0x00000000,
+0x894,0xfffffffe,
+0x898,0x40302010,
+0x89c,0x00706050,
+0x8b0,0x00000000,
+0x8e0,0x00000000,
+0x8e4,0x00000000,
+0xe00,0x30333333,
+0xe04,0x2a2d2e2f,
+0xe08,0x00003232,
+0xe10,0x30333333,
+0xe14,0x2a2d2e2f,
+0xe18,0x30333333,
+0xe1c,0x2a2d2e2f,
+0xe30,0x01007c00,
+0xe34,0x01004800,
+0xe38,0x1000dc1f,
+0xe3c,0x10008c1f,
+0xe40,0x021400a0,
+0xe44,0x281600a0,
+0xe48,0xf8000001,
+0xe4c,0x00002910,
+0xe50,0x01007c00,
+0xe54,0x01004800,
+0xe58,0x1000dc1f,
+0xe5c,0x10008c1f,
+0xe60,0x021400a0,
+0xe64,0x281600a0,
+0xe6c,0x00002910,
+0xe70,0x31ed92fb,
+0xe74,0x361536fb,
+0xe78,0x361536fb,
+0xe7c,0x361536fb,
+0xe80,0x361536fb,
+0xe84,0x000d92fb,
+0xe88,0x000d92fb,
+0xe8c,0x31ed92fb,
+0xed0,0x31ed92fb,
+0xed4,0x31ed92fb,
+0xed8,0x000d92fb,
+0xedc,0x000d92fb,
+0xee0,0x000d92fb,
+0xee4,0x015e5448,
+0xee8,0x21555448,
+0x900,0x00000000,
+0x904,0x00000023,
+0x908,0x00000000,
+0x90c,0x01121313,
+0xa00,0x00d047c8,
+0xa04,0x80ff0008,
+0xa08,0x8ccd8300,
+0xa0c,0x2e62120f,
+0xa10,0x9500bb78,
+0xa14,0x11144028,
+0xa18,0x00881117,
+0xa1c,0x89140f00,
+0xa20,0x1a1b0000,
+0xa24,0x090e1317,
+0xa28,0x00000204,
+0xa2c,0x10d30000,
+0xc00,0x40071d40,
+0xc04,0x00a05633,
+0xc08,0x000000e4,
+0xc0c,0x6c6c6c6c,
+0xc10,0x08800000,
+0xc14,0x40000100,
+0xc18,0x08000000,
+0xc1c,0x40000100,
+0xc20,0x08000000,
+0xc24,0x40000100,
+0xc28,0x08000000,
+0xc2c,0x40000100,
+0xc30,0x6de9ac44,
+0xc34,0x469652cf,
+0xc38,0x49795994,
+0xc3c,0x0a979764,
+0xc40,0x1f7c403f,
+0xc44,0x000100b7,
+0xc48,0xec020000,
+0xc4c,0x007f037f,
+0xc50,0x69543420,
+0xc54,0x433c0094,
+0xc58,0x69543420,
+0xc5c,0x433c0094,
+0xc60,0x69543420,
+0xc64,0x433c0094,
+0xc68,0x69543420,
+0xc6c,0x433c0094,
+0xc70,0x2c7f000d,
+0xc74,0x0186175b,
+0xc78,0x0000001f,
+0xc7c,0x00b91612,
+0xc80,0x40000100,
+0xc84,0x20f60000,
+0xc88,0x20000080,
+0xc8c,0x20200000,
+0xc90,0x40000100,
+0xc94,0x00000000,
+0xc98,0x40000100,
+0xc9c,0x00000000,
+0xca0,0x00492492,
+0xca4,0x00000000,
+0xca8,0x00000000,
+0xcac,0x00000000,
+0xcb0,0x00000000,
+0xcb4,0x00000000,
+0xcb8,0x00000000,
+0xcbc,0x28000000,
+0xcc0,0x00000000,
+0xcc4,0x00000000,
+0xcc8,0x00000000,
+0xccc,0x00000000,
+0xcd0,0x00000000,
+0xcd4,0x00000000,
+0xcd8,0x64b22427,
+0xcdc,0x00766932,
+0xce0,0x00222222,
+0xce4,0x00000000,
+0xce8,0x37644302,
+0xcec,0x2f97d40c,
+0xd00,0x00000750,
+0xd04,0x00000403,
+0xd08,0x0000907f,
+0xd0c,0x00000001,
+0xd10,0xa0633333,
+0xd14,0x33333c63,
+0xd18,0x6a8f5b6b,
+0xd1c,0x00000000,
+0xd20,0x00000000,
+0xd24,0x00000000,
+0xd28,0x00000000,
+0xd2c,0xcc979975,
+0xd30,0x00000000,
+0xd34,0x00000000,
+0xd38,0x00000000,
+0xd3c,0x00027293,
+0xd40,0x00000000,
+0xd44,0x00000000,
+0xd48,0x00000000,
+0xd50,0x6437140a,
+0xd54,0x024dbd02,
+0xd58,0x00000000,
+0xd5c,0x30032064,
+0xd60,0x4653de68,
+0xd64,0x00518a3c,
+0xd68,0x00002101,
+0xf14,0x00000003,
+0xf4c,0x00000000,
+0xf00,0x00000300,
+};
+
+u32 Rtl8192SEPHY_REG_1T2RArray[PHY_REG_1T2RArrayLength] = {
+0x0, };
+
+u32 Rtl8192SEPHY_ChangeTo_1T1RArray[PHY_ChangeTo_1T1RArrayLength] = {
+0x844,0xffffffff,0x00010000,
+0x804,0x0000000f,0x00000001,
+0x824,0x00f0000f,0x00300004,
+0x82c,0x00f0000f,0x00100002,
+0x870,0x04000000,0x00000001,
+0x864,0x00000400,0x00000000,
+0x878,0x000f000f,0x00000002,
+0xe74,0x0f000000,0x00000002,
+0xe78,0x0f000000,0x00000002,
+0xe7c,0x0f000000,0x00000002,
+0xe80,0x0f000000,0x00000002,
+0x90c,0x000000ff,0x00000011,
+0xc04,0x000000ff,0x00000011,
+0xd04,0x0000000f,0x00000001,
+0x1f4,0xffff0000,0x00007777,
+0x234,0xf8000000,0x0000000a,
+};
+
+u32 Rtl8192SEPHY_ChangeTo_1T2RArray[PHY_ChangeTo_1T2RArrayLength] = {
+0x804,0x0000000f,0x00000003,
+0x824,0x00f0000f,0x00300004,
+0x82c,0x00f0000f,0x00300002,
+0x870,0x04000000,0x00000001,
+0x864,0x00000400,0x00000000,
+0x878,0x000f000f,0x00000002,
+0xe74,0x0f000000,0x00000002,
+0xe78,0x0f000000,0x00000002,
+0xe7c,0x0f000000,0x00000002,
+0xe80,0x0f000000,0x00000002,
+0x90c,0x000000ff,0x00000011,
+0xc04,0x000000ff,0x00000033,
+0xd04,0x0000000f,0x00000003,
+0x1f4,0xffff0000,0x00007777,
+0x234,0xf8000000,0x0000000a,
+};
+
+u32 Rtl8192SEPHY_ChangeTo_2T2RArray[PHY_ChangeTo_2T2RArrayLength] = {
+0x804,0x0000000f,0x00000003,
+0x824,0x00f0000f,0x00300004,
+0x82c,0x00f0000f,0x00300004,
+0x870,0x04000000,0x00000001,
+0x864,0x00000400,0x00000001,
+0x878,0x000f000f,0x00020002,
+0xe74,0x0f000000,0x00000006,
+0xe78,0x0f000000,0x00000006,
+0xe7c,0x0f000000,0x00000006,
+0xe80,0x0f000000,0x00000006,
+0x90c,0x000000ff,0x00000033,
+0xc04,0x000000ff,0x00000033,
+0xd04,0x0000000f,0x00000003,
+0x1f4,0xffff0000,0x0000ffff,
+0x234,0xf8000000,0x00000013,
+};
+
+u32 Rtl8192SEPHY_REG_Array_PG[PHY_REG_Array_PGLength] = {
+0xe00,0xffffffff,0x06090909,
+0xe04,0xffffffff,0x00030406,
+0xe08,0x0000ff00,0x00000000,
+0xe10,0xffffffff,0x0a0c0d0e,
+0xe14,0xffffffff,0x04070809,
+0xe18,0xffffffff,0x0a0c0d0e,
+0xe1c,0xffffffff,0x04070809,
+0xe00,0xffffffff,0x04040404,
+0xe04,0xffffffff,0x00020204,
+0xe08,0x0000ff00,0x00000000,
+0xe10,0xffffffff,0x02040404,
+0xe14,0xffffffff,0x00000002,
+0xe18,0xffffffff,0x02040404,
+0xe1c,0xffffffff,0x00000002,
+0xe00,0xffffffff,0x04040404,
+0xe04,0xffffffff,0x00020204,
+0xe08,0x0000ff00,0x00000000,
+0xe10,0xffffffff,0x02040404,
+0xe14,0xffffffff,0x00000002,
+0xe18,0xffffffff,0x02040404,
+0xe1c,0xffffffff,0x00000002,
+0xe00,0xffffffff,0x02020202,
+0xe04,0xffffffff,0x00020202,
+0xe08,0x0000ff00,0x00000000,
+0xe10,0xffffffff,0x02020202,
+0xe14,0xffffffff,0x00000002,
+0xe18,0xffffffff,0x02020202,
+0xe1c,0xffffffff,0x00000002,
+};
+
+u32 Rtl8192SERadioA_1T_Array[RadioA_1T_ArrayLength] = {
+0x000,0x00030159,
+0x001,0x00030250,
+0x002,0x00010000,
+0x010,0x0008000f,
+0x011,0x000231fc,
+0x010,0x000c000f,
+0x011,0x0003f9f8,
+0x010,0x0002000f,
+0x011,0x00020101,
+0x014,0x0001093e,
+0x014,0x0009093e,
+0x015,0x0000f8f4,
+0x017,0x000f6500,
+0x01a,0x00013056,
+0x01b,0x00060000,
+0x01c,0x00000300,
+0x01e,0x00031059,
+0x021,0x00054000,
+0x022,0x0000083c,
+0x023,0x00001558,
+0x024,0x00000060,
+0x025,0x00022583,
+0x026,0x0000f200,
+0x027,0x000eacf1,
+0x028,0x0009bd54,
+0x029,0x00004582,
+0x02a,0x00000001,
+0x02b,0x00021334,
+0x02a,0x00000000,
+0x02b,0x0000000a,
+0x02a,0x00000001,
+0x02b,0x00000808,
+0x02b,0x00053333,
+0x02c,0x0000000c,
+0x02a,0x00000002,
+0x02b,0x00000808,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x00000003,
+0x02b,0x00000808,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x00000004,
+0x02b,0x00000808,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x00000005,
+0x02b,0x00000709,
+0x02b,0x00053333,
+0x02c,0x0000000d,
+0x02a,0x00000006,
+0x02b,0x00000709,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x00000007,
+0x02b,0x00000709,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x00000008,
+0x02b,0x00000709,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x00000009,
+0x02b,0x0000060a,
+0x02b,0x00053333,
+0x02c,0x0000000d,
+0x02a,0x0000000a,
+0x02b,0x0000060a,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x0000000b,
+0x02b,0x0000060a,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x0000000c,
+0x02b,0x0000060a,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x0000000d,
+0x02b,0x0000050b,
+0x02b,0x00053333,
+0x02c,0x0000000d,
+0x02a,0x0000000e,
+0x02b,0x0000050b,
+0x02b,0x00066623,
+0x02c,0x0000001a,
+0x02a,0x000e4000,
+0x030,0x00020000,
+0x031,0x000b9631,
+0x032,0x0000130d,
+0x033,0x00000187,
+0x013,0x00019e6c,
+0x013,0x00015e94,
+0x000,0x00010159,
+0x018,0x0000f401,
+0x0fe,0x00000000,
+0x01e,0x0003105b,
+0x0fe,0x00000000,
+0x000,0x00030159,
+0x010,0x0004000f,
+0x011,0x000203f9,
+};
+
+u32 Rtl8192SERadioB_Array[RadioB_ArrayLength] = {
+0x000,0x00030159,
+0x001,0x00001041,
+0x002,0x00011000,
+0x005,0x00080fc0,
+0x007,0x000fc803,
+0x013,0x00017cb0,
+0x013,0x00011cc0,
+0x013,0x0000dc60,
+0x013,0x00008c60,
+0x013,0x00004450,
+0x013,0x00000020,
+};
+
+u32 Rtl8192SERadioA_to1T_Array[RadioA_to1T_ArrayLength] = {
+0x000,0x00030159,
+0x001,0x00030250,
+0x002,0x00010000,
+0x010,0x0008000f,
+0x011,0x000231fc,
+0x010,0x000c000f,
+0x011,0x0003f9f8,
+0x014,0x0001093e,
+0x014,0x0009093e,
+0x015,0x000198f4,
+0x017,0x000f6500,
+0x01a,0x00013056,
+0x01b,0x00060000,
+0x01c,0x00000300,
+0x01e,0x00031059,
+0x021,0x00054000,
+0x022,0x0000083c,
+0x023,0x00001558,
+0x024,0x00000060,
+0x025,0x00022583,
+0x026,0x0000f200,
+0x027,0x000eacf1,
+0x028,0x000dbd54,
+0x029,0x00004582,
+0x02a,0x00000001,
+0x02b,0x00021334,
+0x02a,0x00000000,
+0x02b,0x0000000a,
+0x02a,0x00000001,
+0x02b,0x00000808,
+0x02b,0x00053333,
+0x02c,0x0000000c,
+0x02a,0x00000002,
+0x02b,0x00000808,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x00000003,
+0x02b,0x00000808,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x00000004,
+0x02b,0x00000808,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x00000005,
+0x02b,0x00000709,
+0x02b,0x00053333,
+0x02c,0x0000000d,
+0x02a,0x00000006,
+0x02b,0x00000709,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x00000007,
+0x02b,0x00000709,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x00000008,
+0x02b,0x00000709,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x00000009,
+0x02b,0x0000060a,
+0x02b,0x00053333,
+0x02c,0x0000000d,
+0x02a,0x0000000a,
+0x02b,0x0000060a,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x0000000b,
+0x02b,0x0000060a,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x0000000c,
+0x02b,0x0000060a,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x0000000d,
+0x02b,0x0000050b,
+0x02b,0x00053333,
+0x02c,0x0000000d,
+0x02a,0x0000000e,
+0x02b,0x0000050b,
+0x02b,0x00066623,
+0x02c,0x0000001a,
+0x02a,0x000e4000,
+0x030,0x00020000,
+0x031,0x000b9631,
+0x033,0x00000187,
+0x013,0x00019e6c,
+0x013,0x00015e94,
+0x000,0x00010159,
+0x018,0x0000f401,
+0x0fe,0x00000000,
+0x01e,0x0003105b,
+0x0fe,0x00000000,
+0x000,0x00030159,
+0x010,0x0004000f,
+0x011,0x000203f9,
+};
+
+u32 Rtl8192SERadioA_to2T_Array[RadioA_to2T_ArrayLength] = {
+0x000,0x00030159,
+0x001,0x00030250,
+0x002,0x00010000,
+0x010,0x0008000f,
+0x011,0x000231fc,
+0x010,0x000c000f,
+0x011,0x0003f9f8,
+0x014,0x0001093e,
+0x014,0x0009093e,
+0x015,0x000198f4,
+0x017,0x000f6500,
+0x01a,0x00013056,
+0x01b,0x00060000,
+0x01c,0x00000300,
+0x01e,0x00031059,
+0x021,0x00054000,
+0x022,0x0000083c,
+0x023,0x00001558,
+0x024,0x00000060,
+0x025,0x00022583,
+0x026,0x0000f200,
+0x027,0x000eacf1,
+0x028,0x000dbd54,
+0x029,0x00004582,
+0x02a,0x00000001,
+0x02b,0x00021334,
+0x02a,0x00000000,
+0x02b,0x0000000a,
+0x02a,0x00000001,
+0x02b,0x00000808,
+0x02b,0x00053333,
+0x02c,0x0000000c,
+0x02a,0x00000002,
+0x02b,0x00000808,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x00000003,
+0x02b,0x00000808,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x00000004,
+0x02b,0x00000808,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x00000005,
+0x02b,0x00000709,
+0x02b,0x00053333,
+0x02c,0x0000000d,
+0x02a,0x00000006,
+0x02b,0x00000709,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x00000007,
+0x02b,0x00000709,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x00000008,
+0x02b,0x00000709,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x00000009,
+0x02b,0x0000060a,
+0x02b,0x00053333,
+0x02c,0x0000000d,
+0x02a,0x0000000a,
+0x02b,0x0000060a,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x0000000b,
+0x02b,0x0000060a,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x0000000c,
+0x02b,0x0000060a,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x0000000d,
+0x02b,0x0000050b,
+0x02b,0x00053333,
+0x02c,0x0000000d,
+0x02a,0x0000000e,
+0x02b,0x0000050b,
+0x02b,0x00066623,
+0x02c,0x0000001a,
+0x02a,0x000e4000,
+0x030,0x00020000,
+0x031,0x000b9631,
+0x033,0x00000187,
+0x013,0x00019e6c,
+0x013,0x00015e94,
+0x000,0x00010159,
+0x018,0x0000f401,
+0x0fe,0x00000000,
+0x01e,0x0003105b,
+0x0fe,0x00000000,
+0x000,0x00030159,
+0x010,0x0004000f,
+0x011,0x000203f9,
+};
+
+u32 Rtl8192SERadioB_GM_Array[RadioB_GM_ArrayLength] = {
+0x000,0x00030159,
+0x001,0x00001041,
+0x002,0x00011000,
+0x005,0x00080fc0,
+0x007,0x000fc803,
+};
+
+u32 Rtl8192SEMAC_2T_Array[MAC_2T_ArrayLength] = {
+0x020,0x00000035,
+0x048,0x0000000e,
+0x049,0x000000f0,
+0x04a,0x00000077,
+0x04b,0x00000083,
+0x0b5,0x00000021,
+0x0dc,0x000000ff,
+0x0dd,0x000000ff,
+0x0de,0x000000ff,
+0x0df,0x000000ff,
+0x116,0x00000000,
+0x117,0x00000000,
+0x118,0x00000000,
+0x119,0x00000000,
+0x11a,0x00000000,
+0x11b,0x00000000,
+0x11c,0x00000000,
+0x11d,0x00000000,
+0x160,0x0000000b,
+0x161,0x0000000b,
+0x162,0x0000000b,
+0x163,0x0000000b,
+0x164,0x0000000b,
+0x165,0x0000000b,
+0x166,0x0000000b,
+0x167,0x0000000b,
+0x168,0x0000000b,
+0x169,0x0000000b,
+0x16a,0x0000000b,
+0x16b,0x0000000b,
+0x16c,0x0000000b,
+0x16d,0x0000000b,
+0x16e,0x0000000b,
+0x16f,0x0000000b,
+0x170,0x0000000b,
+0x171,0x0000000b,
+0x172,0x0000000b,
+0x173,0x0000000b,
+0x174,0x0000000b,
+0x175,0x0000000b,
+0x176,0x0000000b,
+0x177,0x0000000b,
+0x178,0x0000000b,
+0x179,0x0000000b,
+0x17a,0x0000000b,
+0x17b,0x0000000b,
+0x17c,0x0000000b,
+0x17d,0x0000000b,
+0x17e,0x0000000b,
+0x17f,0x0000000b,
+0x236,0x0000000c,
+0x503,0x00000022,
+0x560,0x00000000,
+};
+
+u32 Rtl8192SEMACPHY_Array_PG[MACPHY_Array_PGLength] = {
+0x0, };
+
+u32 Rtl8192SEAGCTAB_Array[AGCTAB_ArrayLength] = {
+0xc78,0x7f000001,
+0xc78,0x7f010001,
+0xc78,0x7e020001,
+0xc78,0x7d030001,
+0xc78,0x7c040001,
+0xc78,0x7b050001,
+0xc78,0x7a060001,
+0xc78,0x79070001,
+0xc78,0x78080001,
+0xc78,0x77090001,
+0xc78,0x760a0001,
+0xc78,0x750b0001,
+0xc78,0x740c0001,
+0xc78,0x730d0001,
+0xc78,0x720e0001,
+0xc78,0x710f0001,
+0xc78,0x70100001,
+0xc78,0x6f110001,
+0xc78,0x6f120001,
+0xc78,0x6e130001,
+0xc78,0x6d140001,
+0xc78,0x6d150001,
+0xc78,0x6c160001,
+0xc78,0x6b170001,
+0xc78,0x6a180001,
+0xc78,0x6a190001,
+0xc78,0x691a0001,
+0xc78,0x681b0001,
+0xc78,0x671c0001,
+0xc78,0x661d0001,
+0xc78,0x651e0001,
+0xc78,0x641f0001,
+0xc78,0x63200001,
+0xc78,0x4c210001,
+0xc78,0x4b220001,
+0xc78,0x4a230001,
+0xc78,0x49240001,
+0xc78,0x48250001,
+0xc78,0x47260001,
+0xc78,0x46270001,
+0xc78,0x45280001,
+0xc78,0x44290001,
+0xc78,0x2c2a0001,
+0xc78,0x2b2b0001,
+0xc78,0x2a2c0001,
+0xc78,0x292d0001,
+0xc78,0x282e0001,
+0xc78,0x272f0001,
+0xc78,0x26300001,
+0xc78,0x25310001,
+0xc78,0x24320001,
+0xc78,0x23330001,
+0xc78,0x22340001,
+0xc78,0x09350001,
+0xc78,0x08360001,
+0xc78,0x07370001,
+0xc78,0x06380001,
+0xc78,0x05390001,
+0xc78,0x043a0001,
+0xc78,0x033b0001,
+0xc78,0x023c0001,
+0xc78,0x013d0001,
+0xc78,0x003e0001,
+0xc78,0x003f0001,
+0xc78,0x7f400001,
+0xc78,0x7f410001,
+0xc78,0x7e420001,
+0xc78,0x7d430001,
+0xc78,0x7c440001,
+0xc78,0x7b450001,
+0xc78,0x7a460001,
+0xc78,0x79470001,
+0xc78,0x78480001,
+0xc78,0x77490001,
+0xc78,0x764a0001,
+0xc78,0x754b0001,
+0xc78,0x744c0001,
+0xc78,0x734d0001,
+0xc78,0x724e0001,
+0xc78,0x714f0001,
+0xc78,0x70500001,
+0xc78,0x6f510001,
+0xc78,0x6f520001,
+0xc78,0x6e530001,
+0xc78,0x6d540001,
+0xc78,0x6d550001,
+0xc78,0x6c560001,
+0xc78,0x6b570001,
+0xc78,0x6a580001,
+0xc78,0x6a590001,
+0xc78,0x695a0001,
+0xc78,0x685b0001,
+0xc78,0x675c0001,
+0xc78,0x665d0001,
+0xc78,0x655e0001,
+0xc78,0x645f0001,
+0xc78,0x63600001,
+0xc78,0x4c610001,
+0xc78,0x4b620001,
+0xc78,0x4a630001,
+0xc78,0x49640001,
+0xc78,0x48650001,
+0xc78,0x47660001,
+0xc78,0x46670001,
+0xc78,0x45680001,
+0xc78,0x44690001,
+0xc78,0x2c6a0001,
+0xc78,0x2b6b0001,
+0xc78,0x2a6c0001,
+0xc78,0x296d0001,
+0xc78,0x286e0001,
+0xc78,0x276f0001,
+0xc78,0x26700001,
+0xc78,0x25710001,
+0xc78,0x24720001,
+0xc78,0x23730001,
+0xc78,0x22740001,
+0xc78,0x09750001,
+0xc78,0x08760001,
+0xc78,0x07770001,
+0xc78,0x06780001,
+0xc78,0x05790001,
+0xc78,0x047a0001,
+0xc78,0x037b0001,
+0xc78,0x027c0001,
+0xc78,0x017d0001,
+0xc78,0x007e0001,
+0xc78,0x007f0001,
+0xc78,0x3000001e,
+0xc78,0x3001001e,
+0xc78,0x3002001e,
+0xc78,0x3003001e,
+0xc78,0x3004001e,
+0xc78,0x3405001e,
+0xc78,0x3806001e,
+0xc78,0x3e07001e,
+0xc78,0x3e08001e,
+0xc78,0x4409001e,
+0xc78,0x460a001e,
+0xc78,0x480b001e,
+0xc78,0x480c001e,
+0xc78,0x4e0d001e,
+0xc78,0x560e001e,
+0xc78,0x5a0f001e,
+0xc78,0x5e10001e,
+0xc78,0x6211001e,
+0xc78,0x6c12001e,
+0xc78,0x7213001e,
+0xc78,0x7214001e,
+0xc78,0x7215001e,
+0xc78,0x7216001e,
+0xc78,0x7217001e,
+0xc78,0x7218001e,
+0xc78,0x7219001e,
+0xc78,0x721a001e,
+0xc78,0x721b001e,
+0xc78,0x721c001e,
+0xc78,0x721d001e,
+0xc78,0x721e001e,
+0xc78,0x721f001e,
+};
+
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl8192s/r8192S_scan.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl8192s/r8192S_scan.h
@@ -0,0 +1,38 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * Based on the r8180 driver, which is:
+ * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+#ifndef _RTL8192SE_SCAN
+#define _RTL8192SE_SCAN
+
+void rtl8192se_hw_scan_simu(void *data);
+void rtl8192se_rx_surveydone_cmd(struct net_device *dev);
+void	rtl8192se_check_hw_scan(void *data);
+void rtl8192se_start_hw_scan(void *data);
+void rtl8192se_abort_hw_scan(struct net_device *dev);
+void rtl8192se_hw_scan_initiate(struct net_device *dev);
+void rtl8192se_send_scan_abort(struct net_device *dev);
+void rtl8192se_cancel_hw_scan(struct net_device *dev);
+
+#endif
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl8192s/r8192S_def.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl8192s/r8192S_def.h
@@ -0,0 +1,756 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+#ifndef R8192SE_DEF_H
+#define R8192SE_DEF_H
+
+#include <linux/types.h>
+#include "../rtl_endianfree.h"
+
+#define HAL_RETRY_LIMIT_INFRA		48	
+#define HAL_RETRY_LIMIT_AP_ADHOC	7
+
+#define	HAL_DM_DIG_DISABLE				BIT0	
+#define	HAL_DM_HIPWR_DISABLE				BIT1	
+
+#define RX_DESC_SIZE				24
+#define RX_DRV_INFO_SIZE_UNIT	8
+
+
+#define TX_DESC_SIZE 				32
+
+#define SET_TX_DESC_PKT_SIZE(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value)
+#define SET_TX_DESC_OFFSET(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value)
+#define SET_TX_DESC_TYPE(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 2, __Value)
+#define SET_TX_DESC_LAST_SEG(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value)
+#define SET_TX_DESC_FIRST_SEG(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value)
+#define SET_TX_DESC_LINIP(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value)
+#define SET_TX_DESC_AMSDU(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value)
+#define SET_TX_DESC_GREEN_FIELD(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value)
+#define SET_TX_DESC_OWN(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value)
+
+#define SET_TX_DESC_MACID(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 5, __Value)
+#define SET_TX_DESC_MORE_DATA(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 5, 1, __Value)
+#define SET_TX_DESC_MORE_FRAG(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 6, 1, __Value)
+#define SET_TX_DESC_PIFS(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 7, 1, __Value)
+#define SET_TX_DESC_QUEUE_SEL(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value)
+#define SET_TX_DESC_ACK_POLICY(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 2, __Value)
+#define SET_TX_DESC_NO_ACM(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value)
+#define SET_TX_DESC_NON_QOS(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 1, __Value)
+#define SET_TX_DESC_KEY_ID(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 17, 2, __Value)
+#define SET_TX_DESC_OUI(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 19, 1, __Value)
+#define SET_TX_DESC_PKT_TYPE(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 20, 1, __Value)
+#define SET_TX_DESC_EN_DESC_ID(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value)
+#define SET_TX_DESC_SEC_TYPE(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value)
+#define SET_TX_DESC_WDS(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 1, __Value)
+#define SET_TX_DESC_HTC(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 25, 1, __Value)
+#define SET_TX_DESC_PKT_OFFSET(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 26, 5, __Value)
+#define SET_TX_DESC_HWPC(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 27, 1, __Value)
+
+#define SET_TX_DESC_DATA_RETRY_LIMIT(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 6, __Value)
+#define SET_TX_DESC_RETRY_LIMIT_ENABLE(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 6, 1, __Value)
+#define SET_TX_DESC_TSFL(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 7, 5, __Value)
+#define SET_TX_DESC_RTS_RETRY_COUNT(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 6, __Value)
+#define SET_TX_DESC_DATA_RETRY_COUNT(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 6, __Value)
+#define	SET_TX_DESC_RSVD_MACID(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(((__pTxDesc) + 8), 24, 5, __Value)
+#define SET_TX_DESC_AGG_ENABLE(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 29, 1, __Value)
+#define SET_TX_DESC_AGG_BREAK(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 30, 1, __Value)
+#define SET_TX_DESC_OWN_MAC(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 31, 1, __Value)
+
+#define SET_TX_DESC_NEXT_HEAP_PAGE(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 8, __Value)
+#define SET_TX_DESC_TAIL_PAGE(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 8, __Value)
+#define SET_TX_DESC_SEQ(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 12, __Value)
+#define SET_TX_DESC_FRAG(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 28, 4, __Value)
+
+#define SET_TX_DESC_RTS_RATE(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 6, __Value)
+#define SET_TX_DESC_DISABLE_RTS_FB(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 6, 1, __Value)
+#define SET_TX_DESC_RTS_RATE_FB_LIMIT(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 7, 4, __Value)
+#define SET_TX_DESC_CTS_ENABLE(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 11, 1, __Value)
+#define SET_TX_DESC_RTS_ENABLE(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 12, 1, __Value)
+#define SET_TX_DESC_RA_BRSR_ID(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 3, __Value)
+#define SET_TX_DESC_TXHT(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 16, 1, __Value)
+#define SET_TX_DESC_TX_SHORT(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value)
+#define SET_TX_DESC_TX_BANDWIDTH(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 1, __Value)
+#define SET_TX_DESC_TX_SUB_CARRIER(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 19, 2, __Value)
+#define SET_TX_DESC_TX_STBC(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 21, 2, __Value)
+#define SET_TX_DESC_TX_REVERSE_DIRECTION(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 23, 1, __Value)
+#define SET_TX_DESC_RTS_HT(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 1, __Value)
+#define SET_TX_DESC_RTS_SHORT(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 25, 1, __Value)
+#define SET_TX_DESC_RTS_BANDWIDTH(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 26, 1, __Value)
+#define SET_TX_DESC_RTS_SUB_CARRIER(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 27, 2, __Value)
+#define SET_TX_DESC_RTS_STBC(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 29, 2, __Value)
+#define SET_TX_DESC_USER_RATE(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 31, 1, __Value)
+
+#define SET_TX_DESC_PACKET_ID(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 9, __Value)
+#define SET_TX_DESC_TX_RATE(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 9, 6, __Value)
+#define SET_TX_DESC_DISABLE_FB(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 15, 1, __Value)
+#define SET_TX_DESC_DATA_RATE_FB_LIMIT(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 16, 5, __Value)
+#define SET_TX_DESC_TX_AGC(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 21, 11, __Value)
+
+#define SET_TX_DESC_IP_CHECK_SUM(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 16, __Value)
+#define SET_TX_DESC_TCP_CHECK_SUM(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 16, __Value)
+
+#define SET_TX_DESC_TX_BUFFER_SIZE(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value)
+#define SET_TX_DESC_IP_HEADER_OFFSET(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value)
+#define SET_TX_DESC_TCP_ENABLE(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 31, 1, __Value)
+
+#define SET_TX_DESC_TX_BUFFER_ADDRESS(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 0, 32, __Value)
+
+
+#define	TX_DESC_NEXT_DESC_OFFSET	36
+#define	CLEAR_PCI_TX_DESC_CONTENT(__pTxDesc, _size)											\
+	{																						\
+		if(_size > TX_DESC_NEXT_DESC_OFFSET)												\
+			memset((void*)__pTxDesc, 0, TX_DESC_NEXT_DESC_OFFSET);					\
+		else																				\
+			memset((void*)__pTxDesc, 0, _size);									\
+		if(_size > (TX_DESC_NEXT_DESC_OFFSET + 4))											\
+			memset((void*)(__pTxDesc + (TX_DESC_NEXT_DESC_OFFSET + 4)), 0, (_size - TX_DESC_NEXT_DESC_OFFSET));	\
+	}
+
+#define	C2H_RX_CMD_HDR_LEN		8 
+#define	GET_C2H_CMD_CMD_LEN(__pRxHeader)	LE_BITS_TO_4BYTE((__pRxHeader), 0, 16)
+#define	GET_C2H_CMD_ELEMENT_ID(__pRxHeader)	LE_BITS_TO_4BYTE((__pRxHeader), 16, 8)
+#define	GET_C2H_CMD_CMD_SEQ(__pRxHeader)	LE_BITS_TO_4BYTE((__pRxHeader), 24, 7)
+#define	GET_C2H_CMD_CONTINUE(__pRxHeader)	LE_BITS_TO_4BYTE((__pRxHeader), 31, 1)
+#define	GET_C2H_CMD_CONTENT(__pRxHeader)	((u8*)(__pRxHeader) + C2H_RX_CMD_HDR_LEN)
+
+#define	GET_C2H_CMD_FEEDBACK_ELEMENT_ID(__pCmdFBHeader)	LE_BITS_TO_4BYTE((__pCmdFBHeader), 0, 8)
+#define	GET_C2H_CMD_FEEDBACK_CCX_LEN(__pCmdFBHeader)	LE_BITS_TO_4BYTE((__pCmdFBHeader), 8, 8)
+#define	GET_C2H_CMD_FEEDBACK_CCX_CMD_CNT(__pCmdFBHeader)	LE_BITS_TO_4BYTE((__pCmdFBHeader), 16, 16)
+#define	GET_C2H_CMD_FEEDBACK_CCX_MAC_ID(__pCmdFBHeader)	LE_BITS_TO_4BYTE(((__pCmdFBHeader) + 4), 0, 5)
+#define	GET_C2H_CMD_FEEDBACK_CCX_VALID(__pCmdFBHeader)	LE_BITS_TO_4BYTE(((__pCmdFBHeader) + 4), 7, 1)
+#define	GET_C2H_CMD_FEEDBACK_CCX_RETRY_CNT(__pCmdFBHeader)	LE_BITS_TO_4BYTE(((__pCmdFBHeader) + 4), 8, 5)
+#define	GET_C2H_CMD_FEEDBACK_CCX_TOK(__pCmdFBHeader)	LE_BITS_TO_4BYTE(((__pCmdFBHeader) + 4), 15, 1)
+#define	GET_C2H_CMD_FEEDBACK_CCX_QSEL(__pCmdFBHeader)	LE_BITS_TO_4BYTE(((__pCmdFBHeader) + 4), 16, 4)
+#define	GET_C2H_CMD_FEEDBACK_CCX_SEQ(__pCmdFBHeader)	LE_BITS_TO_4BYTE(((__pCmdFBHeader) + 4), 20, 12)
+
+
+#if 0
+#define BK_QUEUE					0		
+#define BE_QUEUE					1		
+#define VI_QUEUE					2		
+#define VO_QUEUE				3	
+#define BEACON_QUEUE			4
+#define TXCMD_QUEUE				5		
+#define MGNT_QUEUE				6	
+#define HIGH_QUEUE				7	
+#define HCCA_QUEUE				8	
+
+#define LOW_QUEUE				BE_QUEUE
+#define NORMAL_QUEUE			MGNT_QUEUE
+#endif
+
+#define RX_MPDU_QUEUE			0
+#define RX_CMD_QUEUE			1
+#define RX_MAX_QUEUE			2
+
+
+typedef enum _rtl819x_loopback{
+	RTL819X_NO_LOOPBACK = 0,
+	RTL819X_MAC_LOOPBACK = 1,
+	RTL819X_DMA_LOOPBACK = 2,
+	RTL819X_CCK_LOOPBACK = 3,
+}rtl819x_loopback_e;
+
+#define RESET_DELAY_8185		20
+
+#define RT_IBSS_INT_MASKS		0
+
+#define DESC92S_RATE1M			0x00
+#define DESC92S_RATE2M			0x01
+#define DESC92S_RATE5_5M		0x02
+#define DESC92S_RATE11M			0x03
+#define DESC92S_RATE6M			0x04
+#define DESC92S_RATE9M			0x05
+#define DESC92S_RATE12M			0x06
+#define DESC92S_RATE18M			0x07
+#define DESC92S_RATE24M			0x08
+#define DESC92S_RATE36M			0x09
+#define DESC92S_RATE48M			0x0a
+#define DESC92S_RATE54M			0x0b
+#define DESC92S_RATEMCS0		0x0c
+#define DESC92S_RATEMCS1		0x0d
+#define DESC92S_RATEMCS2		0x0e
+#define DESC92S_RATEMCS3		0x0f
+#define DESC92S_RATEMCS4		0x10
+#define DESC92S_RATEMCS5		0x11
+#define DESC92S_RATEMCS6		0x12
+#define DESC92S_RATEMCS7		0x13
+#define DESC92S_RATEMCS8		0x14
+#define DESC92S_RATEMCS9		0x15
+#define DESC92S_RATEMCS10		0x16
+#define DESC92S_RATEMCS11		0x17
+#define DESC92S_RATEMCS12		0x18
+#define DESC92S_RATEMCS13		0x19
+#define DESC92S_RATEMCS14		0x1a
+#define DESC92S_RATEMCS15		0x1b
+#define DESC92S_RATEMCS15_SG	0x1c
+#define DESC92S_RATEMCS32		0x20	
+
+#define SHORT_SLOT_TIME			9
+#define NON_SHORT_SLOT_TIME	20
+
+
+#define	MAX_LINES_HWCONFIG_TXT			1000
+#define MAX_BYTES_LINE_HWCONFIG_TXT		256
+
+#define SW_THREE_WIRE			0
+#define HW_THREE_WIRE			2
+
+#define BT_DEMO_BOARD			0 
+#define BT_QA_BOARD				1 
+#define BT_FPGA					2 
+
+#define	Rx_Smooth_Factor			20
+
+#define QSLT_BK					0x2
+#define QSLT_BE					0x0
+#define QSLT_VI					0x5
+#define QSLT_VO					0x7
+#define QSLT_BEACON				0x10
+#define QSLT_HIGH				0x11
+#define QSLT_MGNT				0x12
+#define QSLT_CMD				0x13
+
+#define NUM_OF_FIRMWARE_QUEUE				10
+#define NUM_OF_PAGES_IN_FW					0x100
+#define NUM_OF_PAGE_IN_FW_QUEUE_BK		0x07
+#define NUM_OF_PAGE_IN_FW_QUEUE_BE		0x07
+#define NUM_OF_PAGE_IN_FW_QUEUE_VI		0x07
+#define NUM_OF_PAGE_IN_FW_QUEUE_VO		0x07
+#define NUM_OF_PAGE_IN_FW_QUEUE_HCCA		0x0
+#define NUM_OF_PAGE_IN_FW_QUEUE_CMD		0x0
+#define NUM_OF_PAGE_IN_FW_QUEUE_MGNT		0x02
+#define NUM_OF_PAGE_IN_FW_QUEUE_HIGH		0x02
+#define NUM_OF_PAGE_IN_FW_QUEUE_BCN		0x2
+#define NUM_OF_PAGE_IN_FW_QUEUE_PUB		0xA1
+
+#define NUM_OF_PAGE_IN_FW_QUEUE_BK_DTM	0x026
+#define NUM_OF_PAGE_IN_FW_QUEUE_BE_DTM	0x048
+#define NUM_OF_PAGE_IN_FW_QUEUE_VI_DTM	0x048
+#define NUM_OF_PAGE_IN_FW_QUEUE_VO_DTM	0x026
+#define NUM_OF_PAGE_IN_FW_QUEUE_PUB_DTM	0x00
+                                        	
+#define HAL_PRIME_CHNL_OFFSET_DONT_CARE	0
+#define HAL_PRIME_CHNL_OFFSET_LOWER		1
+#define HAL_PRIME_CHNL_OFFSET_UPPER		2
+
+
+
+#define 	MAX_SILENT_RESET_RX_SLOT_NUM	10
+typedef enum tag_Rf_OpType
+{    
+    RF_OP_By_SW_3wire = 0,
+    RF_OP_By_FW,   
+    RF_OP_MAX
+}RF_OpType_E;
+
+
+typedef	enum _POWER_SAVE_MODE	
+{
+	POWER_SAVE_MODE_ACTIVE,
+	POWER_SAVE_MODE_SAVE,
+}POWER_SAVE_MODE;
+
+typedef	enum _INTERFACE_SELECT_8190PCI{
+	INTF_SEL1_MINICARD	= 0,		
+	INTF_SEL0_PCIE			= 1,		
+	INTF_SEL2_RSV			= 2,		
+	INTF_SEL3_RSV			= 3,		
+} INTERFACE_SELECT_8190PCI, *PINTERFACE_SELECT_8190PCI;
+
+
+typedef struct _BB_REGISTER_DEFINITION{
+	u32 rfintfs; 			
+	u32 rfintfi; 			
+	u32 rfintfo; 			
+	u32 rfintfe; 			
+	u32 rf3wireOffset; 		
+	u32 rfLSSI_Select; 		
+	u32 rfTxGainStage;		
+	u32 rfHSSIPara1; 		
+	u32 rfHSSIPara2; 		
+	u32 rfSwitchControl; 	
+	u32 rfAGCControl1; 	
+	u32 rfAGCControl2; 	
+	u32 rfRxIQImbalance; 	
+	u32 rfRxAFE;  			
+	u32 rfTxIQImbalance; 	
+	u32 rfTxAFE; 			
+	u32 rfLSSIReadBack; 	
+	u32 rfLSSIReadBackPi; 	
+}BB_REGISTER_DEFINITION_T, *PBB_REGISTER_DEFINITION_T;
+
+
+
+
+typedef struct  _rx_fwinfo_8192s{
+	
+	/*u32			gain_0:7;
+	u32			trsw_0:1;
+	u32			gain_1:7;
+	u32			trsw_1:1;
+	u32			gain_2:7;
+	u32			trsw_2:1;
+	u32			gain_3:7;
+	u32			trsw_3:1;	*/
+	u8			gain_trsw[4];
+
+	/*u32			pwdb_all:8;
+	u32			cfosho_0:8;
+	u32			cfosho_1:8;
+	u32			cfosho_2:8;*/
+	u8			pwdb_all;
+	u8			cfosho[4];
+
+	/*u32			cfosho_3:8;
+	u32			cfotail_0:8;
+	u32			cfotail_1:8;
+	u32			cfotail_2:8;*/
+	u8			cfotail[4];
+
+	/*u32			cfotail_3:8;
+	u32			rxevm_0:8;
+	u32			rxevm_1:8;
+	u32			rxsnr_0:8;*/
+	s8			rxevm[2];
+	s8			rxsnr[4];
+
+	/*u32			rxsnr_1:8;
+	u32			rxsnr_2:8;
+	u32			rxsnr_3:8;
+	u32			pdsnr_0:8;*/
+	u8			pdsnr[2];
+
+	/*u32			pdsnr_1:8;
+	u32			csi_current_0:8;
+	u32			csi_current_1:8;
+	u32			csi_target_0:8;*/
+	u8			csi_current[2];
+	u8			csi_target[2];
+
+	/*u32			csi_target_1:8;
+	u32			sigevm:8;
+	u32			max_ex_pwr:8;
+	u32			ex_intf_flag:1;
+	u32			sgi_en:1;
+	u32			rxsc:2;
+	u32			reserve:4;*/
+	u8			sigevm;
+	u8			max_ex_pwr;
+	u8			ex_intf_flag:1;
+	u8			sgi_en:1;
+	u8			rxsc:2;
+	u8			reserve:4;
+	
+}rx_fwinfo, *prx_fwinfo;
+
+typedef struct _LOG_INTERRUPT_8190
+{
+	u32	nIMR_COMDOK;
+	u32	nIMR_MGNTDOK;
+	u32	nIMR_HIGH;
+	u32	nIMR_VODOK;
+	u32	nIMR_VIDOK;
+	u32	nIMR_BEDOK;
+	u32	nIMR_BKDOK;
+	u32	nIMR_ROK;
+	u32	nIMR_RCOK;
+	u32	nIMR_TBDOK;
+	u32	nIMR_BDOK;
+	u32	nIMR_RXFOVW;
+} LOG_INTERRUPT_8190_T, *PLOG_INTERRUPT_8190_T;
+
+typedef struct _phy_cck_rx_status_report_819xpci
+{
+	u8	adc_pwdb_X[4];
+	u8	sq_rpt; 
+	u8	cck_agc_rpt;
+}phy_sts_cck_819xpci_t, phy_sts_cck_8192s_t;
+
+#define		PHY_RSSI_SLID_WIN_MAX				100
+#define		PHY_LINKQUALITY_SLID_WIN_MAX		20
+#define		PHY_Beacon_RSSI_SLID_WIN_MAX		10
+
+typedef struct _tx_desc_8192se{
+
+	u32		PktSize:16;
+	u32		Offset:8;
+	u32		Type:2;	
+	u32		LastSeg:1;
+	u32		FirstSeg:1;
+	u32		LINIP:1;
+	u32		AMSDU:1;
+	u32		GF:1;
+	u32		OWN:1;	
+	
+	u32		MacID:5;			
+	u32		MoreData:1;
+	u32		MoreFrag:1;
+	u32		PIFS:1;
+	u32		QueueSel:5;
+	u32		AckPolicy:2;
+	u32		NoACM:1;
+	u32		NonQos:1;
+	u32		KeyID:2;
+	u32		OUI:1;
+	u32		PktType:1;
+	u32		EnDescID:1;
+	u32		SecType:2;
+	u32		HTC:1;	
+	u32		WDS:1;	
+	u32		PktOffset:5;	
+	u32		HWPC:1;		
+	
+	u32		DataRetryLmt:6;
+	u32		RetryLmtEn:1;
+	u32		TSFL:5;	
+	u32		RTSRC:6;	
+	u32		DATARC:6;	
+	u32		Rsvd_MacID:5;
+	u32		AggEn:1;
+	u32		BK:1;	
+	u32		OwnMAC:1;
+	
+	u32		NextHeadPage:8;
+	u32		TailPage:8;
+	u32		Seq:12;
+	u32		Frag:4;	
+
+	u32		RTSRate:6;
+	u32		DisRTSFB:1;
+	u32		RTSRateFBLmt:4;
+	u32		CTS2Self:1;
+	u32		RTSEn:1;
+	u32		RaBRSRID:3;	
+	u32		TXHT:1;
+	u32		TxShort:1;
+	u32		TxBw:1;
+	u32		TXSC:2;
+	u32		STBC:2;
+	u32		RD:1;
+	u32		RTSHT:1;
+	u32		RTSShort:1;
+	u32		RTSBW:1;
+	u32		RTSSC:2;
+	u32		RTSSTBC:2;
+	u32		UserRate:1;	
+
+	u32		PktID:9;
+	u32		TxRate:6;
+	u32		DISFB:1;
+	u32		DataRateFBLmt:5;
+	u32		TxAGC:11;
+
+	u32		IPChkSum:16;
+	u32		TCPChkSum:16;
+
+	u32		TxBufferSize:16;
+	u32		IPHdrOffset:8;
+	u32		Rsvd3:7;
+	u32		TCPEn:1;
+
+	u32		TxBuffAddr;
+
+	u32		NextDescAddress;
+
+	u32		Reserve_Pass_92S_PCIE_MM_Limit[6];
+	
+} tx_desc, *ptx_desc;
+
+
+typedef struct _tx_desc_cmd_8192se{  
+	u32		PktSize:16;
+	u32		Offset:8;	
+	u32		Rsvd0:2;
+	u32		FirstSeg:1;
+	u32		LastSeg:1;
+	u32		LINIP:1;
+	u32		Rsvd1:2;
+	u32		OWN:1;	
+	
+	u32		Rsvd2;
+	u32		Rsvd3;
+	u32		Rsvd4;
+	u32		Rsvd5;
+	u32		Rsvd6;
+	u32		Rsvd7;	
+
+	u32		TxBufferSize:16;
+	u32		Rsvd8:16;
+
+	u32		TxBufferAddr;
+
+	u32		NextTxDescAddress;
+
+	u32		Reserve_Pass_92S_PCIE_MM_Limit[6];
+	
+}tx_desc_cmd, *ptx_desc_cmd;
+
+
+typedef struct _tx_status_desc_8192se{ 
+
+	u32		PktSize:16;
+	u32		Offset:8;
+	u32		Type:2;	
+	u32		LastSeg:1;
+	u32		FirstSeg:1;
+	u32		LINIP:1;
+	u32		AMSDU:1;
+	u32		GF:1;
+	u32		OWN:1;	
+	
+	u32		MacID:5;			
+	u32		MoreData:1;
+	u32		MoreFrag:1;
+	u32		PIFS:1;
+	u32		QueueSel:5;
+	u32		AckPolicy:2;
+	u32		NoACM:1;
+	u32		NonQos:1;
+	u32		KeyID:2;
+	u32		OUI:1;
+	u32		PktType:1;
+	u32		EnDescID:1;
+	u32		SecType:2;
+	u32		HTC:1;	
+	u32		WDS:1;	
+	u32		PktOffset:5;	
+	u32		HWPC:1;		
+	
+	u32		DataRetryLmt:6;
+	u32		RetryLmtEn:1;
+	u32		TSFL:5;	
+	u32		RTSRC:6;	
+	u32		DATARC:6;	
+	u32		Rsvd1:5;
+	u32		AggEn:1;
+	u32		BK:1;	
+	u32		OwnMAC:1;
+	
+	u32		NextHeadPage:8;
+	u32		TailPage:8;
+	u32		Seq:12;
+	u32		Frag:4;	
+
+	u32		RTSRate:6;
+	u32		DisRTSFB:1;
+	u32		RTSRateFBLmt:4;
+	u32		CTS2Self:1;
+	u32		RTSEn:1;
+	u32		RaBRSRID:3;	
+	u32		TXHT:1;
+	u32		TxShort:1;
+	u32		TxBw:1;
+	u32		TXSC:2;
+	u32		STBC:2;
+	u32		RD:1;
+	u32		RTSHT:1;
+	u32		RTSShort:1;
+	u32		RTSBW:1;
+	u32		RTSSC:2;
+	u32		RTSSTBC:2;
+	u32		UserRate:1;	
+
+	u32		PktID:9;
+	u32		TxRate:6;
+	u32		DISFB:1;
+	u32		DataRateFBLmt:5;
+	u32		TxAGC:11;	
+
+	u32		IPChkSum:16;
+	u32		TCPChkSum:16;
+
+	u32		TxBufferSize:16;
+	u32		IPHdrOffset:8;
+	u32		Rsvd2:7;
+	u32		TCPEn:1;
+
+	u32		TxBufferAddr;
+
+	u32		NextDescAddress;
+
+	u32		Reserve_Pass_92S_PCIE_MM_Limit[6];
+
+}tx_status_desc, *ptx_status_desc;
+
+
+typedef struct _rx_desc_8192se{
+	u32		Length:14;
+	u32		CRC32:1;
+	u32		ICVError:1;
+	u32		DrvInfoSize:4;
+	u32		Security:3;
+	u32		Qos:1;
+	u32		Shift:2;
+	u32		PHYStatus:1;
+	u32		SWDec:1;
+	u32		LastSeg:1;
+	u32		FirstSeg:1;
+	u32		EOR:1;
+	u32		OWN:1;	
+
+	u32		MACID:5;
+	u32		TID:4;
+	u32		HwRsvd:5;
+	u32		PAGGR:1;
+	u32		FAGGR:1;
+	u32		A1_FIT:4;
+	u32		A2_FIT:4;
+	u32		PAM:1;
+	u32		PWR:1;
+	u32		MoreData:1;
+	u32		MoreFrag:1;
+	u32		Type:2;
+	u32		MC:1;
+	u32		BC:1;
+
+	u32		Seq:12;
+	u32		Frag:4;
+	u32		NextPktLen:14;
+	u32		NextIND:1;
+	u32		Rsvd:1;
+
+	u32		RxMCS:6;
+	u32		RxHT:1;
+	u32		AMSDU:1;
+	u32		SPLCP:1;
+	u32		BandWidth:1;
+	u32		HTC:1;
+	u32		TCPChkRpt:1;
+	u32		IPChkRpt:1;
+	u32		TCPChkValID:1;
+	u32		HwPCErr:1;
+	u32		HwPCInd:1;
+	u32		IV0:16;
+
+	u32		IV1;
+
+	u32		TSFL;
+
+	u32		BufferAddress;
+
+	u32		NextRxDescAddress;
+
+#if 0		
+	u32		BA_SSN:12;
+	u32		BA_VLD:1;
+	u32		RSVD:19;
+#endif
+
+} rx_desc, *prx_desc;
+
+
+
+typedef struct _rx_desc_status_8192se{
+	u32		Length:14;
+	u32		CRC32:1;
+	u32		ICVError:1;
+	u32		DrvInfoSize:4;
+	u32		Security:3;
+	u32		Qos:1;
+	u32		Shift:2;
+	u32		PHYStatus:1;
+	u32		SWDec:1;
+	u32		LastSeg:1;
+	u32		FirstSeg:1;
+	u32		EOR:1;
+	u32		OWN:1;	
+
+	u32		MACID:5;
+	u32		TID:4;
+	u32		HwRsvd:5;
+	u32		PAGGR:1;
+	u32		FAGGR:1;
+	u32		A1_FIT:4;
+	u32		A2_FIT:4;
+	u32		PAM:1;
+	u32		PWR:1;
+	u32		MoreData:1;
+	u32		MoreFrag:1;
+	u32		Type:2;
+	u32		MC:1;
+	u32		BC:1;
+
+	u32		Seq:12;
+	u32		Frag:4;
+	u32		NextPktLen:14;
+	u32		NextIND:1;
+	u32		Rsvd:1;
+
+	u32		RxMCS:6;
+	u32		RxHT:1;
+	u32		AMSDU:1;
+	u32		SPLCP:1;
+	u32		BW:1;
+	u32		HTC:1;
+	u32		TCPChkRpt:1;
+	u32		IPChkRpt:1;
+	u32		TCPChkValID:1;
+	u32		HwPCErr:1;
+	u32		HwPCInd:1;
+	u32		IV0:16;
+
+	u32		IV1;
+
+	u32		TSFL;
+
+
+	u32		BufferAddress;
+
+	u32		NextRxDescAddress;
+
+#if 0		
+	u32		BA_SSN:12;
+	u32		BA_VLD:1;
+	u32		RSVD:19;
+#endif
+}rx_desc_status, *prx_desc_status;
+
+typedef enum _HAL_FW_C2H_CMD_ID
+{
+	HAL_FW_C2H_CMD_Read_MACREG = 0,
+	HAL_FW_C2H_CMD_Read_BBREG = 1,
+	HAL_FW_C2H_CMD_Read_RFREG = 2,
+	HAL_FW_C2H_CMD_Read_EEPROM = 3,
+	HAL_FW_C2H_CMD_Read_EFUSE = 4,
+	HAL_FW_C2H_CMD_Read_CAM = 5,
+	HAL_FW_C2H_CMD_Get_BasicRate = 6,			
+	HAL_FW_C2H_CMD_Get_DataRate = 7,				
+	HAL_FW_C2H_CMD_Survey = 8 ,
+	HAL_FW_C2H_CMD_SurveyDone = 9,
+	HAL_FW_C2H_CMD_JoinBss = 10,
+	HAL_FW_C2H_CMD_AddSTA = 11,
+	HAL_FW_C2H_CMD_DelSTA = 12,
+	HAL_FW_C2H_CMD_AtimDone = 13,
+	HAL_FW_C2H_CMD_TX_Report = 14,
+	HAL_FW_C2H_CMD_CCX_Report = 15,
+	HAL_FW_C2H_CMD_DTM_Report = 16,
+	HAL_FW_C2H_CMD_TX_Rate_Statistics = 17,
+	HAL_FW_C2H_CMD_C2HLBK = 18,
+	HAL_FW_C2H_CMD_C2HDBG = 19,
+	HAL_FW_C2H_CMD_C2HFEEDBACK = 20,
+	HAL_FW_C2H_CMD_BT_State = 25,
+	HAL_FW_C2H_CMD_BT_Service = 26,
+	HAL_FW_C2H_CMD_MAX
+}HAL_FW_C2H_CMD_ID;
+
+#define	HAL_FW_C2H_CMD_C2HFEEDBACK_CCX_PER_PKT_RPT			0x04
+#define	HAL_FW_C2H_CMD_C2HFEEDBACK_DTM_TX_STATISTICS_RPT	0x05
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl8192s/r8192S_hwimg.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl8192s/r8192S_hwimg.h
@@ -0,0 +1,42 @@
+#ifndef __INC_HAL8192SE_FW_IMG_H
+#define __INC_HAL8192SE_FW_IMG_H
+
+/*Created on  2010/ 2/24,  2:32*/
+
+#include <linux/types.h>
+#define ImgArrayLength 80976
+extern u8 Rtl8192SEFwImgArray[ImgArrayLength];
+#define MainArrayLength 1
+extern u8 Rtl8192SEFwMainArray[MainArrayLength];
+#define DataArrayLength 1
+extern u8 Rtl8192SEFwDataArray[DataArrayLength];
+#define PHY_REG_2T2RArrayLength 372
+extern u32 Rtl8192SEPHY_REG_2T2RArray[PHY_REG_2T2RArrayLength];
+#define PHY_REG_1T2RArrayLength 1
+extern u32 Rtl8192SEPHY_REG_1T2RArray[PHY_REG_1T2RArrayLength];
+#define PHY_ChangeTo_1T1RArrayLength 48
+extern u32 Rtl8192SEPHY_ChangeTo_1T1RArray[PHY_ChangeTo_1T1RArrayLength];
+#define PHY_ChangeTo_1T2RArrayLength 45
+extern u32 Rtl8192SEPHY_ChangeTo_1T2RArray[PHY_ChangeTo_1T2RArrayLength];
+#define PHY_ChangeTo_2T2RArrayLength 45
+extern u32 Rtl8192SEPHY_ChangeTo_2T2RArray[PHY_ChangeTo_2T2RArrayLength];
+#define PHY_REG_Array_PGLength 84
+extern u32 Rtl8192SEPHY_REG_Array_PG[PHY_REG_Array_PGLength];
+#define RadioA_1T_ArrayLength 202
+extern u32 Rtl8192SERadioA_1T_Array[RadioA_1T_ArrayLength];
+#define RadioB_ArrayLength 22
+extern u32 Rtl8192SERadioB_Array[RadioB_ArrayLength];
+#define RadioA_to1T_ArrayLength 196
+extern u32 Rtl8192SERadioA_to1T_Array[RadioA_to1T_ArrayLength];
+#define RadioA_to2T_ArrayLength 196
+extern u32 Rtl8192SERadioA_to2T_Array[RadioA_to2T_ArrayLength];
+#define RadioB_GM_ArrayLength 10
+extern u32 Rtl8192SERadioB_GM_Array[RadioB_GM_ArrayLength];
+#define MAC_2T_ArrayLength 106
+extern u32 Rtl8192SEMAC_2T_Array[MAC_2T_ArrayLength];
+#define MACPHY_Array_PGLength 1
+extern u32 Rtl8192SEMACPHY_Array_PG[MACPHY_Array_PGLength];
+#define AGCTAB_ArrayLength 320
+extern u32 Rtl8192SEAGCTAB_Array[AGCTAB_ArrayLength];
+
+#endif //__INC_HAL8192SE_FW_IMG_H
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl8192s/r8192S_hwimg74.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl8192s/r8192S_hwimg74.c
@@ -0,0 +1,6398 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+/*Created on  2009/11/17, 16:15*/
+
+#ifdef RTL8192SE
+#include "r8192S_hwimg.h"
+
+u8 Rtl8192SEFwImgArray[ImgArrayLength] = {
+0x92,0x81,0x4a,0x70,0x30,0x00,0x00,0x00,0x08,0xa4,0x00,0x00,0x88,0xb5,0x00,0x00,
+0x30,0x00,0x00,0x00,0x00,0xb4,0x00,0x00,0x4a,0x00,0x00,0x00,0x11,0x17,0x13,0x29,
+0x92,0x81,0x01,0x01,0x00,0x00,0x22,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x00,0x01,0x01,0x01,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x7f,0x00,0x00,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x1f,0x00,0x00,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x25,0xb0,0x1a,0x3c,0x80,0x03,0x5a,0x37,0x00,0x80,0x1b,0x3c,0x80,0x00,0x7b,0x37,
+0x00,0x00,0x5b,0xaf,0x25,0xb0,0x1a,0x3c,0x18,0x03,0x5a,0x37,0x00,0x80,0x1b,0x3c,
+0x80,0x00,0x7b,0x37,0x00,0x00,0x5b,0xaf,0x01,0x80,0x1a,0x3c,0x10,0x9d,0x5a,0x27,
+0x08,0x00,0x40,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x04,0x00,0xa1,0xaf,0x08,0x00,0xa2,0xaf,0x0c,0x00,0xa3,0xaf,0x10,0x00,0xa4,0xaf,
+0x14,0x00,0xa5,0xaf,0x18,0x00,0xa6,0xaf,0x1c,0x00,0xa7,0xaf,0x20,0x00,0xa8,0xaf,
+0x24,0x00,0xa9,0xaf,0x28,0x00,0xaa,0xaf,0x2c,0x00,0xab,0xaf,0x30,0x00,0xac,0xaf,
+0x34,0x00,0xad,0xaf,0x38,0x00,0xae,0xaf,0x3c,0x00,0xaf,0xaf,0x12,0x40,0x00,0x00,
+0x10,0x48,0x00,0x00,0x00,0x70,0x0a,0x40,0x40,0x00,0xb0,0xaf,0x44,0x00,0xb1,0xaf,
+0x48,0x00,0xb2,0xaf,0x4c,0x00,0xb3,0xaf,0x50,0x00,0xb4,0xaf,0x54,0x00,0xb5,0xaf,
+0x58,0x00,0xb6,0xaf,0x5c,0x00,0xb7,0xaf,0x60,0x00,0xb8,0xaf,0x64,0x00,0xb9,0xaf,
+0x68,0x00,0xbc,0xaf,0x6c,0x00,0xbd,0xaf,0x70,0x00,0xbe,0xaf,0x74,0x00,0xbf,0xaf,
+0x78,0x00,0xa8,0xaf,0x7c,0x00,0xa9,0xaf,0x80,0x00,0xaa,0xaf,0xda,0x26,0x00,0x08,
+0x21,0x20,0xa0,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
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+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0xff,0xff,0x88,0x30,0x80,0x28,0x08,0x00,0x2a,0xb0,0x0a,0x3c,0x21,0x38,0xaa,0x00,
+0x0c,0x00,0xe6,0x8c,0x02,0x80,0x03,0x3c,0xcc,0x3f,0x63,0x24,0x25,0xb0,0x02,0x3c,
+0xb0,0x03,0x42,0x34,0x21,0x28,0xa3,0x00,0xff,0x00,0xc4,0x30,0xff,0x00,0x09,0x24,
+0x00,0x00,0x45,0xac,0x00,0x00,0x43,0xac,0x05,0x00,0x89,0x10,0x00,0x00,0x00,0x00,
+0x00,0x80,0xc2,0x30,0x04,0x00,0x40,0x10,0x00,0x80,0x02,0x3c,0x0c,0x00,0xe2,0xac,
+0x08,0x00,0xe0,0x03,0x21,0x10,0xc0,0x00,0x00,0xff,0x02,0x3c,0x24,0x10,0xc2,0x00,
+0xfb,0xff,0x40,0x10,0x00,0x00,0x00,0x00,0x21,0x20,0x0a,0x01,0x40,0x00,0x82,0x90,
+0x00,0x00,0x00,0x00,0xff,0x00,0x43,0x30,0x12,0x00,0x69,0x10,0x00,0x00,0x00,0x00,
+0x00,0x00,0xa3,0xa0,0x40,0x00,0x83,0x90,0x00,0x00,0xa6,0x90,0xff,0x00,0x63,0x30,
+0xff,0x00,0xc2,0x30,0xfa,0xff,0x62,0x14,0x00,0x00,0x00,0x00,0x20,0xb0,0x03,0x3c,
+0x00,0x12,0x02,0x00,0x21,0x10,0x43,0x00,0x0c,0x00,0x46,0x8c,0x25,0xb0,0x03,0x3c,
+0xb0,0x03,0x63,0x34,0x21,0x10,0xc0,0x00,0x00,0x00,0x66,0xac,0x08,0x00,0xe0,0x03,
+0x00,0x00,0x00,0x00,0x00,0x00,0xa6,0x90,0xe7,0x00,0x00,0x08,0xff,0x00,0xc2,0x30,
+0xff,0xff,0x84,0x30,0x80,0x20,0x04,0x00,0x2a,0xb0,0x02,0x3c,0x21,0x48,0x82,0x00,
+0x00,0x00,0x25,0x8d,0x02,0x80,0x02,0x3c,0xec,0x3f,0x42,0x24,0x21,0x40,0x82,0x00,
+0x25,0xb0,0x03,0x3c,0x02,0x80,0x02,0x3c,0xb0,0x03,0x67,0x34,0xcc,0x3f,0x42,0x24,
+0xff,0x00,0xa4,0x30,0xff,0x00,0x03,0x24,0x00,0x00,0xe8,0xac,0x00,0x80,0xa6,0x30,
+0x00,0x00,0xe2,0xac,0x06,0x00,0x83,0x10,0x00,0x00,0x00,0x00,0x00,0xff,0x02,0x3c,
+0x05,0x00,0xc0,0x10,0x24,0x10,0xa2,0x00,0x00,0x80,0x02,0x3c,0x00,0x00,0x22,0xad,
+0x08,0x00,0xe0,0x03,0x21,0x10,0xa0,0x00,0xfd,0xff,0x40,0x10,0x00,0x00,0x00,0x00,
+0x00,0x00,0x03,0x91,0x20,0xb0,0x02,0x3c,0x00,0x1a,0x03,0x00,0x21,0x18,0x62,0x00,
+0x0c,0x00,0x65,0x8c,0x00,0x00,0x00,0x00,0x21,0x10,0xa0,0x00,0x00,0x00,0xe5,0xac,
+0x08,0x00,0xe0,0x03,0x00,0x00,0x00,0x00,0x25,0xb0,0x05,0x3c,0x00,0x80,0x02,0x3c,
+0xe0,0xff,0xbd,0x27,0x18,0x03,0xa3,0x34,0x68,0x04,0x42,0x24,0x18,0x00,0xbf,0xaf,
+0x14,0x00,0xb1,0xaf,0x10,0x00,0xb0,0xaf,0x00,0x00,0x62,0xac,0x00,0x60,0x01,0x40,
+0x01,0x00,0x21,0x34,0x00,0x60,0x81,0x40,0x42,0xb0,0x02,0x3c,0x03,0x00,0x46,0x34,
+0x00,0x00,0xc3,0x90,0x00,0x00,0x00,0x00,0xff,0x00,0x70,0x30,0x10,0x00,0x02,0x32,
+0x18,0x00,0x40,0x10,0x02,0x80,0x11,0x3c,0x78,0x1b,0x27,0x26,0xec,0x23,0xe4,0x94,
+0x10,0x00,0x02,0x24,0x00,0x00,0xc2,0xa0,0x08,0x00,0x80,0x10,0x1c,0x03,0xa3,0x34,
+0xf0,0x23,0xe2,0x94,0xb0,0x03,0xa4,0x34,0x00,0x00,0x62,0xa0,0x00,0x00,0x80,0xac,
+0xec,0x23,0xe0,0xa4,0xf0,0x23,0xe0,0xa4,0x00,0x00,0x04,0x24,0x02,0x80,0x05,0x3c,
+0x02,0x80,0x06,0x3c,0x8c,0x43,0xa2,0x8c,0xbc,0x44,0xc3,0x8c,0x01,0x00,0x84,0x24,
+0x01,0x00,0x42,0x24,0x01,0x00,0x63,0x24,0xec,0x23,0xe4,0xa4,0x8c,0x43,0xa2,0xac,
+0xbc,0x44,0xc3,0xac,0x00,0x16,0x10,0x00,0x03,0x16,0x02,0x00,0x71,0x00,0x40,0x04,
+0x42,0xb0,0x02,0x3c,0x00,0x60,0x01,0x40,0x01,0x00,0x21,0x34,0x01,0x00,0x21,0x38,
+0x00,0x60,0x81,0x40,0x40,0x00,0x02,0x32,0x16,0x00,0x40,0x10,0x78,0x1b,0x24,0x26,
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+0x00,0x00,0x00,0x00,0x0d,0x0d,0x0c,0x07,0x00,0x00,0x00,0x00,0x0d,0x0c,0x0b,0x06,
+0x00,0x00,0x00,0x00,0x0c,0x0c,0x0a,0x06,0x00,0x00,0x00,0x00,0x0b,0x0b,0x0a,0x06,
+0x00,0x00,0x00,0x00,0x0b,0x0a,0x09,0x05,0x00,0x00,0x00,0x00,0x0a,0x0a,0x09,0x05,
+0x00,0x00,0x00,0x00,0x0a,0x09,0x08,0x05,0x00,0x00,0x00,0x00,0x09,0x09,0x08,0x05,
+0x00,0x00,0x00,0x00,0x09,0x08,0x07,0x04,0x00,0x00,0x00,0x00,0x06,0x00,0x2a,0xb0,
+0x05,0x00,0x2a,0xb0,0x34,0x7b,0x00,0x80,0xbc,0x7b,0x00,0x80,0x60,0x7b,0x00,0x80,
+0xbc,0x7b,0x00,0x80,0xbc,0x7b,0x00,0x80,0xbc,0x7b,0x00,0x80,0xbc,0x7b,0x00,0x80,
+0x08,0x7b,0x00,0x80,0x00,0x01,0x02,0x02,0x03,0x03,0x03,0x03,0x04,0x04,0x04,0x04,
+0x04,0x04,0x04,0x04,0x05,0x05,0x05,0x05,0x05,0x05,0x05,0x05,0x05,0x05,0x05,0x05,
+0x05,0x05,0x05,0x05,0x06,0x06,0x06,0x06,0x06,0x06,0x06,0x06,0x06,0x06,0x06,0x06,
+0x06,0x06,0x06,0x06,0x06,0x06,0x06,0x06,0x06,0x06,0x06,0x06,0x06,0x06,0x06,0x06,
+0x06,0x06,0x06,0x06,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,
+0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,
+0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,
+0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,
+0x07,0x07,0x07,0x07,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
+0x08,0x28,0x28,0x28,0x28,0x28,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0xa0,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
+0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,
+0x04,0x04,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x41,0x41,0x41,0x41,0x41,0x41,0x01,
+0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,
+0x01,0x01,0x01,0x10,0x10,0x10,0x10,0x10,0x10,0x42,0x42,0x42,0x42,0x42,0x42,0x02,
+0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,
+0x02,0x02,0x02,0x10,0x10,0x10,0x10,0x08,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xa0,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
+0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
+0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,
+0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x10,
+0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,
+0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x10,
+0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x00,0x36,0xc2,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x45,0xc4,0xf0,0x00,0x45,0xc4,0xf0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x45,0xb5,0x60,0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x02,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,0xc7,0x00,0xb8,0xff,0xff,0xff,0xff,
+};
+
+u8 Rtl8192SEFwMainArray[MainArrayLength] = {
+0x0, };
+
+u8 Rtl8192SEFwDataArray[DataArrayLength] = {
+0x0, };
+
+u32 Rtl8192SEPHY_REG_2T2RArray[PHY_REG_2T2RArrayLength] = {
+0x01c,0x07000000,
+0x800,0x00040000,
+0x804,0x00008003,
+0x808,0x0000fc00,
+0x80c,0x0000000a,
+0x810,0x10005088,
+0x814,0x020c3d10,
+0x818,0x00200185,
+0x81c,0x00000000,
+0x820,0x01000000,
+0x824,0x00390004,
+0x828,0x01000000,
+0x82c,0x00390004,
+0x830,0x00000004,
+0x834,0x00690200,
+0x838,0x00000004,
+0x83c,0x00690200,
+0x840,0x00010000,
+0x844,0x00010000,
+0x848,0x00000000,
+0x84c,0x00000000,
+0x850,0x00000000,
+0x854,0x00000000,
+0x858,0x48484848,
+0x85c,0x65a965a9,
+0x860,0x0f7f0130,
+0x864,0x0f7f0130,
+0x868,0x0f7f0130,
+0x86c,0x0f7f0130,
+0x870,0x03000700,
+0x874,0x03000300,
+0x878,0x00020002,
+0x87c,0x004f0201,
+0x880,0xa8300ac1,
+0x884,0x00000058,
+0x888,0x00000008,
+0x88c,0x00000004,
+0x890,0x00000000,
+0x894,0xfffffffe,
+0x898,0x40302010,
+0x89c,0x00706050,
+0x8b0,0x00000000,
+0x8e0,0x00000000,
+0x8e4,0x00000000,
+0xe00,0x30333333,
+0xe04,0x2a2d2e2f,
+0xe08,0x00003232,
+0xe10,0x30333333,
+0xe14,0x2a2d2e2f,
+0xe18,0x30333333,
+0xe1c,0x2a2d2e2f,
+0xe30,0x01007c00,
+0xe34,0x01004800,
+0xe38,0x1000dc1f,
+0xe3c,0x10008c1f,
+0xe40,0x021400a0,
+0xe44,0x281600a0,
+0xe48,0xf8000001,
+0xe4c,0x00002910,
+0xe50,0x01007c00,
+0xe54,0x01004800,
+0xe58,0x1000dc1f,
+0xe5c,0x10008c1f,
+0xe60,0x021400a0,
+0xe64,0x281600a0,
+0xe6c,0x00002910,
+0xe70,0x31ed92fb,
+0xe74,0x361536fb,
+0xe78,0x361536fb,
+0xe7c,0x361536fb,
+0xe80,0x361536fb,
+0xe84,0x000d92fb,
+0xe88,0x000d92fb,
+0xe8c,0x31ed92fb,
+0xed0,0x31ed92fb,
+0xed4,0x31ed92fb,
+0xed8,0x000d92fb,
+0xedc,0x000d92fb,
+0xee0,0x000d92fb,
+0xee4,0x015e5448,
+0xee8,0x21555448,
+0x900,0x00000000,
+0x904,0x00000023,
+0x908,0x00000000,
+0x90c,0x01121313,
+0xa00,0x00d047c8,
+0xa04,0x80ff0008,
+0xa08,0x88cd8300,
+0xa0c,0x2e62120f,
+0xa10,0x9500bb78,
+0xa14,0x11144028,
+0xa18,0x00881117,
+0xa1c,0x89140f00,
+0xa20,0x1a1b0000,
+0xa24,0x090e1317,
+0xa28,0x00000204,
+0xa2c,0x10d30000,
+0xc00,0x40071d40,
+0xc04,0x00a05633,
+0xc08,0x000000e4,
+0xc0c,0x6c6c6c6c,
+0xc10,0x08800000,
+0xc14,0x40000100,
+0xc18,0x08000000,
+0xc1c,0x40000100,
+0xc20,0x08000000,
+0xc24,0x40000100,
+0xc28,0x08000000,
+0xc2c,0x40000100,
+0xc30,0x6de9ac44,
+0xc34,0x469652cf,
+0xc38,0x49795994,
+0xc3c,0x0a979764,
+0xc40,0x1f7c403f,
+0xc44,0x000100b7,
+0xc48,0xec020000,
+0xc4c,0x007f037f,
+0xc50,0x69543420,
+0xc54,0x433c0094,
+0xc58,0x69543420,
+0xc5c,0x433c0094,
+0xc60,0x69543420,
+0xc64,0x433c0094,
+0xc68,0x69543420,
+0xc6c,0x433c0094,
+0xc70,0x2c7f000d,
+0xc74,0x0186175b,
+0xc78,0x0000001f,
+0xc7c,0x00b91612,
+0xc80,0x40000100,
+0xc84,0x20f60000,
+0xc88,0x20000080,
+0xc8c,0x20200000,
+0xc90,0x40000100,
+0xc94,0x00000000,
+0xc98,0x40000100,
+0xc9c,0x00000000,
+0xca0,0x00492492,
+0xca4,0x00000000,
+0xca8,0x00000000,
+0xcac,0x00000000,
+0xcb0,0x00000000,
+0xcb4,0x00000000,
+0xcb8,0x00000000,
+0xcbc,0x28000000,
+0xcc0,0x00000000,
+0xcc4,0x00000000,
+0xcc8,0x00000000,
+0xccc,0x00000000,
+0xcd0,0x00000000,
+0xcd4,0x00000000,
+0xcd8,0x64b22427,
+0xcdc,0x00766932,
+0xce0,0x00222222,
+0xce4,0x00000000,
+0xce8,0x37644302,
+0xcec,0x2f97d40c,
+0xd00,0x00000750,
+0xd04,0x00000403,
+0xd08,0x0000907f,
+0xd0c,0x00000001,
+0xd10,0xa0633333,
+0xd14,0x33333c63,
+0xd18,0x6a8f5b6b,
+0xd1c,0x00000000,
+0xd20,0x00000000,
+0xd24,0x00000000,
+0xd28,0x00000000,
+0xd2c,0xcc979975,
+0xd30,0x00000000,
+0xd34,0x00000000,
+0xd38,0x00000000,
+0xd3c,0x00027293,
+0xd40,0x00000000,
+0xd44,0x00000000,
+0xd48,0x00000000,
+0xd50,0x6437140a,
+0xd54,0x024dbd02,
+0xd58,0x00000000,
+0xd5c,0x30032064,
+0xd60,0x4653de68,
+0xd64,0x00518a3c,
+0xd68,0x00002101,
+0xf14,0x00000003,
+0xf4c,0x00000000,
+0xf00,0x00000300,
+};
+
+u32 Rtl8192SEPHY_REG_1T2RArray[PHY_REG_1T2RArrayLength] = {
+0x0, };
+
+u32 Rtl8192SEPHY_ChangeTo_1T1RArray[PHY_ChangeTo_1T1RArrayLength] = {
+0x844,0xffffffff,0x00010000,
+0x804,0x0000000f,0x00000001,
+0x824,0x00f0000f,0x00300004,
+0x82c,0x00f0000f,0x00100002,
+0x870,0x04000000,0x00000001,
+0x864,0x00000400,0x00000000,
+0x878,0x000f000f,0x00000002,
+0xe74,0x0f000000,0x00000002,
+0xe78,0x0f000000,0x00000002,
+0xe7c,0x0f000000,0x00000002,
+0xe80,0x0f000000,0x00000002,
+0x90c,0x000000ff,0x00000011,
+0xc04,0x000000ff,0x00000011,
+0xd04,0x0000000f,0x00000001,
+0x1f4,0xffff0000,0x00007777,
+0x234,0xf8000000,0x0000000a,
+};
+
+u32 Rtl8192SEPHY_ChangeTo_1T2RArray[PHY_ChangeTo_1T2RArrayLength] = {
+0x804,0x0000000f,0x00000003,
+0x824,0x00f0000f,0x00300004,
+0x82c,0x00f0000f,0x00300002,
+0x870,0x04000000,0x00000001,
+0x864,0x00000400,0x00000000,
+0x878,0x000f000f,0x00000002,
+0xe74,0x0f000000,0x00000002,
+0xe78,0x0f000000,0x00000002,
+0xe7c,0x0f000000,0x00000002,
+0xe80,0x0f000000,0x00000002,
+0x90c,0x000000ff,0x00000011,
+0xc04,0x000000ff,0x00000033,
+0xd04,0x0000000f,0x00000003,
+0x1f4,0xffff0000,0x00007777,
+0x234,0xf8000000,0x0000000a,
+};
+
+u32 Rtl8192SEPHY_ChangeTo_2T2RArray[PHY_ChangeTo_2T2RArrayLength] = {
+0x804,0x0000000f,0x00000003,
+0x824,0x00f0000f,0x00300004,
+0x82c,0x00f0000f,0x00300004,
+0x870,0x04000000,0x00000001,
+0x864,0x00000400,0x00000001,
+0x878,0x000f000f,0x00020002,
+0xe74,0x0f000000,0x00000006,
+0xe78,0x0f000000,0x00000006,
+0xe7c,0x0f000000,0x00000006,
+0xe80,0x0f000000,0x00000006,
+0x90c,0x000000ff,0x00000033,
+0xc04,0x000000ff,0x00000033,
+0xd04,0x0000000f,0x00000003,
+0x1f4,0xffff0000,0x0000ffff,
+0x234,0xf8000000,0x00000013,
+};
+
+u32 Rtl8192SEPHY_REG_Array_PG[PHY_REG_Array_PGLength] = {
+0xe00,0xffffffff,0x06090909,
+0xe04,0xffffffff,0x00030406,
+0xe08,0x0000ff00,0x00000000,
+0xe10,0xffffffff,0x0a0c0d0e,
+0xe14,0xffffffff,0x03040508,
+0xe18,0xffffffff,0x0a0c0d0e,
+0xe1c,0xffffffff,0x03040508,
+0xe00,0xffffffff,0x04040404,
+0xe04,0xffffffff,0x00020204,
+0xe08,0x0000ff00,0x00000000,
+0xe10,0xffffffff,0x02040404,
+0xe14,0xffffffff,0x00000002,
+0xe18,0xffffffff,0x02040404,
+0xe1c,0xffffffff,0x00000002,
+0xe00,0xffffffff,0x04040404,
+0xe04,0xffffffff,0x00020204,
+0xe08,0x0000ff00,0x00000000,
+0xe10,0xffffffff,0x02040404,
+0xe14,0xffffffff,0x00000002,
+0xe18,0xffffffff,0x02040404,
+0xe1c,0xffffffff,0x00000002,
+0xe00,0xffffffff,0x02020202,
+0xe04,0xffffffff,0x00020202,
+0xe08,0x0000ff00,0x00000000,
+0xe10,0xffffffff,0x02020202,
+0xe14,0xffffffff,0x00000002,
+0xe18,0xffffffff,0x02020202,
+0xe1c,0xffffffff,0x00000002,
+};
+
+u32 Rtl8192SERadioA_1T_Array[RadioA_1T_ArrayLength] = {
+0x000,0x00030159,
+0x001,0x00030250,
+0x002,0x00010000,
+0x010,0x0008000f,
+0x011,0x000231fc,
+0x010,0x000c000f,
+0x011,0x0003f9f8,
+0x010,0x0002000f,
+0x011,0x00020101,
+0x014,0x0001093e,
+0x014,0x0009093e,
+0x015,0x0000f8f4,
+0x017,0x000f6500,
+0x01a,0x00013056,
+0x01b,0x00060000,
+0x01c,0x00000300,
+0x01e,0x00031059,
+0x021,0x00054000,
+0x022,0x0000083c,
+0x023,0x00001558,
+0x024,0x00000060,
+0x025,0x00022583,
+0x026,0x0000f200,
+0x027,0x000eacf1,
+0x028,0x0009bd54,
+0x029,0x00004582,
+0x02a,0x00000001,
+0x02b,0x00021334,
+0x02a,0x00000000,
+0x02b,0x0000000a,
+0x02a,0x00000001,
+0x02b,0x00000808,
+0x02b,0x00053333,
+0x02c,0x0000000c,
+0x02a,0x00000002,
+0x02b,0x00000808,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x00000003,
+0x02b,0x00000808,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x00000004,
+0x02b,0x00000808,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x00000005,
+0x02b,0x00000709,
+0x02b,0x00053333,
+0x02c,0x0000000d,
+0x02a,0x00000006,
+0x02b,0x00000709,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x00000007,
+0x02b,0x00000709,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x00000008,
+0x02b,0x00000709,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x00000009,
+0x02b,0x0000060a,
+0x02b,0x00053333,
+0x02c,0x0000000d,
+0x02a,0x0000000a,
+0x02b,0x0000060a,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x0000000b,
+0x02b,0x0000060a,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x0000000c,
+0x02b,0x0000060a,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x0000000d,
+0x02b,0x0000050b,
+0x02b,0x00053333,
+0x02c,0x0000000d,
+0x02a,0x0000000e,
+0x02b,0x0000050b,
+0x02b,0x00066623,
+0x02c,0x0000001a,
+0x02a,0x000e4000,
+0x030,0x00020000,
+0x031,0x000b9631,
+0x032,0x0000130d,
+0x033,0x00000187,
+0x013,0x00019e6c,
+0x013,0x00015e94,
+0x000,0x00010159,
+0x018,0x0000f401,
+0x0fe,0x00000000,
+0x01e,0x0003105b,
+0x0fe,0x00000000,
+0x000,0x00030159,
+0x010,0x0004000f,
+0x011,0x000203f9,
+};
+
+u32 Rtl8192SERadioB_Array[RadioB_ArrayLength] = {
+0x000,0x00030159,
+0x001,0x00001041,
+0x002,0x00011000,
+0x005,0x00080fc0,
+0x007,0x000fc803,
+0x013,0x00017cb0,
+0x013,0x00011cc0,
+0x013,0x0000dc60,
+0x013,0x00008c60,
+0x013,0x00004450,
+0x013,0x00000020,
+};
+
+u32 Rtl8192SERadioA_to1T_Array[RadioA_to1T_ArrayLength] = {
+0x000,0x00030159,
+0x001,0x00030250,
+0x002,0x00010000,
+0x010,0x0008000f,
+0x011,0x000231fc,
+0x010,0x000c000f,
+0x011,0x0003f9f8,
+0x014,0x0001093e,
+0x014,0x0009093e,
+0x015,0x000198f4,
+0x017,0x000f6500,
+0x01a,0x00013056,
+0x01b,0x00060000,
+0x01c,0x00000300,
+0x01e,0x00031059,
+0x021,0x00054000,
+0x022,0x0000083c,
+0x023,0x00001558,
+0x024,0x00000060,
+0x025,0x00022583,
+0x026,0x0000f200,
+0x027,0x000eacf1,
+0x028,0x000dbd54,
+0x029,0x00004582,
+0x02a,0x00000001,
+0x02b,0x00021334,
+0x02a,0x00000000,
+0x02b,0x0000000a,
+0x02a,0x00000001,
+0x02b,0x00000808,
+0x02b,0x00053333,
+0x02c,0x0000000c,
+0x02a,0x00000002,
+0x02b,0x00000808,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x00000003,
+0x02b,0x00000808,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x00000004,
+0x02b,0x00000808,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x00000005,
+0x02b,0x00000709,
+0x02b,0x00053333,
+0x02c,0x0000000d,
+0x02a,0x00000006,
+0x02b,0x00000709,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x00000007,
+0x02b,0x00000709,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x00000008,
+0x02b,0x00000709,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x00000009,
+0x02b,0x0000060a,
+0x02b,0x00053333,
+0x02c,0x0000000d,
+0x02a,0x0000000a,
+0x02b,0x0000060a,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x0000000b,
+0x02b,0x0000060a,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x0000000c,
+0x02b,0x0000060a,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x0000000d,
+0x02b,0x0000050b,
+0x02b,0x00053333,
+0x02c,0x0000000d,
+0x02a,0x0000000e,
+0x02b,0x0000050b,
+0x02b,0x00066623,
+0x02c,0x0000001a,
+0x02a,0x000e4000,
+0x030,0x00020000,
+0x031,0x000b9631,
+0x033,0x00000187,
+0x013,0x00019e6c,
+0x013,0x00015e94,
+0x000,0x00010159,
+0x018,0x0000f401,
+0x0fe,0x00000000,
+0x01e,0x0003105b,
+0x0fe,0x00000000,
+0x000,0x00030159,
+0x010,0x0004000f,
+0x011,0x000203f9,
+};
+
+u32 Rtl8192SERadioA_to2T_Array[RadioA_to2T_ArrayLength] = {
+0x000,0x00030159,
+0x001,0x00030250,
+0x002,0x00010000,
+0x010,0x0008000f,
+0x011,0x000231fc,
+0x010,0x000c000f,
+0x011,0x0003f9f8,
+0x014,0x0001093e,
+0x014,0x0009093e,
+0x015,0x000198f4,
+0x017,0x000f6500,
+0x01a,0x00013056,
+0x01b,0x00060000,
+0x01c,0x00000300,
+0x01e,0x00031059,
+0x021,0x00054000,
+0x022,0x0000083c,
+0x023,0x00001558,
+0x024,0x00000060,
+0x025,0x00022583,
+0x026,0x0000f200,
+0x027,0x000eacf1,
+0x028,0x000dbd54,
+0x029,0x00004582,
+0x02a,0x00000001,
+0x02b,0x00021334,
+0x02a,0x00000000,
+0x02b,0x0000000a,
+0x02a,0x00000001,
+0x02b,0x00000808,
+0x02b,0x00053333,
+0x02c,0x0000000c,
+0x02a,0x00000002,
+0x02b,0x00000808,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x00000003,
+0x02b,0x00000808,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x00000004,
+0x02b,0x00000808,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x00000005,
+0x02b,0x00000709,
+0x02b,0x00053333,
+0x02c,0x0000000d,
+0x02a,0x00000006,
+0x02b,0x00000709,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x00000007,
+0x02b,0x00000709,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x00000008,
+0x02b,0x00000709,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x00000009,
+0x02b,0x0000060a,
+0x02b,0x00053333,
+0x02c,0x0000000d,
+0x02a,0x0000000a,
+0x02b,0x0000060a,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x0000000b,
+0x02b,0x0000060a,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x0000000c,
+0x02b,0x0000060a,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x0000000d,
+0x02b,0x0000050b,
+0x02b,0x00053333,
+0x02c,0x0000000d,
+0x02a,0x0000000e,
+0x02b,0x0000050b,
+0x02b,0x00066623,
+0x02c,0x0000001a,
+0x02a,0x000e4000,
+0x030,0x00020000,
+0x031,0x000b9631,
+0x033,0x00000187,
+0x013,0x00019e6c,
+0x013,0x00015e94,
+0x000,0x00010159,
+0x018,0x0000f401,
+0x0fe,0x00000000,
+0x01e,0x0003105b,
+0x0fe,0x00000000,
+0x000,0x00030159,
+0x010,0x0004000f,
+0x011,0x000203f9,
+};
+
+u32 Rtl8192SERadioB_GM_Array[RadioB_GM_ArrayLength] = {
+0x000,0x00030159,
+0x001,0x00001041,
+0x002,0x00011000,
+0x005,0x00080fc0,
+0x007,0x000fc803,
+};
+
+u32 Rtl8192SEMAC_2T_Array[MAC_2T_ArrayLength] = {
+0x020,0x00000035,
+0x048,0x0000000e,
+0x049,0x000000f0,
+0x04a,0x00000077,
+0x04b,0x00000083,
+0x0b5,0x00000021,
+0x0dc,0x000000ff,
+0x0dd,0x000000ff,
+0x0de,0x000000ff,
+0x0df,0x000000ff,
+0x116,0x00000000,
+0x117,0x00000000,
+0x118,0x00000000,
+0x119,0x00000000,
+0x11a,0x00000000,
+0x11b,0x00000000,
+0x11c,0x00000000,
+0x11d,0x00000000,
+0x160,0x0000000b,
+0x161,0x0000000b,
+0x162,0x0000000b,
+0x163,0x0000000b,
+0x164,0x0000000b,
+0x165,0x0000000b,
+0x166,0x0000000b,
+0x167,0x0000000b,
+0x168,0x0000000b,
+0x169,0x0000000b,
+0x16a,0x0000000b,
+0x16b,0x0000000b,
+0x16c,0x0000000b,
+0x16d,0x0000000b,
+0x16e,0x0000000b,
+0x16f,0x0000000b,
+0x170,0x0000000b,
+0x171,0x0000000b,
+0x172,0x0000000b,
+0x173,0x0000000b,
+0x174,0x0000000b,
+0x175,0x0000000b,
+0x176,0x0000000b,
+0x177,0x0000000b,
+0x178,0x0000000b,
+0x179,0x0000000b,
+0x17a,0x0000000b,
+0x17b,0x0000000b,
+0x17c,0x0000000b,
+0x17d,0x0000000b,
+0x17e,0x0000000b,
+0x17f,0x0000000b,
+0x236,0x0000000c,
+0x503,0x00000022,
+0x560,0x00000000,
+};
+
+u32 Rtl8192SEMACPHY_Array_PG[MACPHY_Array_PGLength] = {
+0x0, };
+
+u32 Rtl8192SEAGCTAB_Array[AGCTAB_ArrayLength] = {
+0xc78,0x7f000001,
+0xc78,0x7f010001,
+0xc78,0x7e020001,
+0xc78,0x7d030001,
+0xc78,0x7c040001,
+0xc78,0x7b050001,
+0xc78,0x7a060001,
+0xc78,0x79070001,
+0xc78,0x78080001,
+0xc78,0x77090001,
+0xc78,0x760a0001,
+0xc78,0x750b0001,
+0xc78,0x740c0001,
+0xc78,0x730d0001,
+0xc78,0x720e0001,
+0xc78,0x710f0001,
+0xc78,0x70100001,
+0xc78,0x6f110001,
+0xc78,0x6f120001,
+0xc78,0x6e130001,
+0xc78,0x6d140001,
+0xc78,0x6d150001,
+0xc78,0x6c160001,
+0xc78,0x6b170001,
+0xc78,0x6a180001,
+0xc78,0x6a190001,
+0xc78,0x691a0001,
+0xc78,0x681b0001,
+0xc78,0x671c0001,
+0xc78,0x661d0001,
+0xc78,0x651e0001,
+0xc78,0x641f0001,
+0xc78,0x63200001,
+0xc78,0x4c210001,
+0xc78,0x4b220001,
+0xc78,0x4a230001,
+0xc78,0x49240001,
+0xc78,0x48250001,
+0xc78,0x47260001,
+0xc78,0x46270001,
+0xc78,0x45280001,
+0xc78,0x44290001,
+0xc78,0x2c2a0001,
+0xc78,0x2b2b0001,
+0xc78,0x2a2c0001,
+0xc78,0x292d0001,
+0xc78,0x282e0001,
+0xc78,0x272f0001,
+0xc78,0x26300001,
+0xc78,0x25310001,
+0xc78,0x24320001,
+0xc78,0x23330001,
+0xc78,0x22340001,
+0xc78,0x09350001,
+0xc78,0x08360001,
+0xc78,0x07370001,
+0xc78,0x06380001,
+0xc78,0x05390001,
+0xc78,0x043a0001,
+0xc78,0x033b0001,
+0xc78,0x023c0001,
+0xc78,0x013d0001,
+0xc78,0x003e0001,
+0xc78,0x003f0001,
+0xc78,0x7f400001,
+0xc78,0x7f410001,
+0xc78,0x7e420001,
+0xc78,0x7d430001,
+0xc78,0x7c440001,
+0xc78,0x7b450001,
+0xc78,0x7a460001,
+0xc78,0x79470001,
+0xc78,0x78480001,
+0xc78,0x77490001,
+0xc78,0x764a0001,
+0xc78,0x754b0001,
+0xc78,0x744c0001,
+0xc78,0x734d0001,
+0xc78,0x724e0001,
+0xc78,0x714f0001,
+0xc78,0x70500001,
+0xc78,0x6f510001,
+0xc78,0x6f520001,
+0xc78,0x6e530001,
+0xc78,0x6d540001,
+0xc78,0x6d550001,
+0xc78,0x6c560001,
+0xc78,0x6b570001,
+0xc78,0x6a580001,
+0xc78,0x6a590001,
+0xc78,0x695a0001,
+0xc78,0x685b0001,
+0xc78,0x675c0001,
+0xc78,0x665d0001,
+0xc78,0x655e0001,
+0xc78,0x645f0001,
+0xc78,0x63600001,
+0xc78,0x4c610001,
+0xc78,0x4b620001,
+0xc78,0x4a630001,
+0xc78,0x49640001,
+0xc78,0x48650001,
+0xc78,0x47660001,
+0xc78,0x46670001,
+0xc78,0x45680001,
+0xc78,0x44690001,
+0xc78,0x2c6a0001,
+0xc78,0x2b6b0001,
+0xc78,0x2a6c0001,
+0xc78,0x296d0001,
+0xc78,0x286e0001,
+0xc78,0x276f0001,
+0xc78,0x26700001,
+0xc78,0x25710001,
+0xc78,0x24720001,
+0xc78,0x23730001,
+0xc78,0x22740001,
+0xc78,0x09750001,
+0xc78,0x08760001,
+0xc78,0x07770001,
+0xc78,0x06780001,
+0xc78,0x05790001,
+0xc78,0x047a0001,
+0xc78,0x037b0001,
+0xc78,0x027c0001,
+0xc78,0x017d0001,
+0xc78,0x007e0001,
+0xc78,0x007f0001,
+0xc78,0x3000001e,
+0xc78,0x3001001e,
+0xc78,0x3002001e,
+0xc78,0x3003001e,
+0xc78,0x3004001e,
+0xc78,0x3405001e,
+0xc78,0x3806001e,
+0xc78,0x3e07001e,
+0xc78,0x3e08001e,
+0xc78,0x4409001e,
+0xc78,0x460a001e,
+0xc78,0x480b001e,
+0xc78,0x480c001e,
+0xc78,0x4e0d001e,
+0xc78,0x560e001e,
+0xc78,0x5a0f001e,
+0xc78,0x5e10001e,
+0xc78,0x6211001e,
+0xc78,0x6c12001e,
+0xc78,0x7213001e,
+0xc78,0x7214001e,
+0xc78,0x7215001e,
+0xc78,0x7216001e,
+0xc78,0x7217001e,
+0xc78,0x7218001e,
+0xc78,0x7219001e,
+0xc78,0x721a001e,
+0xc78,0x721b001e,
+0xc78,0x721c001e,
+0xc78,0x721d001e,
+0xc78,0x721e001e,
+0xc78,0x721f001e,
+};
+
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl8192s/r8192S_scan.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl8192s/r8192S_scan.c
@@ -0,0 +1,413 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * Based on the r8180 driver, which is:
+ * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+#include "../rtl_core.h"
+
+#define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
+
+void rtl8192se_hw_scan_simu(void *data)
+{
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
+	struct r8192_priv *priv = container_of_dwork_rsl(data,struct r8192_priv,hw_scan_simu_wq);
+	struct net_device *dev = priv->rtllib->dev;
+#else
+	struct net_device *dev = (struct net_device *)data;
+	struct r8192_priv *priv = rtllib_priv(dev);
+#endif
+
+	rtllib_update_active_chan_map(priv->rtllib);
+
+	priv->rtllib->current_network.channel =	(priv->rtllib->current_network.channel + 1) % 12;
+	if (priv->rtllib->scan_watch_dog++ > 12)
+	{
+		goto out; /* no good chans */
+	}
+
+	if ((!test_bit(STATUS_SCANNING, &priv->rtllib->status)) || 
+			(test_bit(STATUS_SCAN_ABORTING, &priv->rtllib->status))){
+		goto out;
+	}
+
+	if(priv->rtllib->current_network.channel != 0){
+		priv->rtllib->set_chan(dev,priv->rtllib->current_network.channel);
+#ifdef _RTL8192_EXT_PATCH_
+		rtllib_send_probe_requests(priv->rtllib, 1);
+#else
+		rtllib_send_probe_requests(priv->rtllib);
+#endif
+	}
+
+	queue_delayed_work_rsl(priv->priv_wq, &priv->hw_scan_simu_wq, MSECS(RTLLIB_SOFTMAC_SCAN_TIME));
+
+	return;
+out:
+	priv->rtllib->scan_watch_dog =0;
+	rtl8192se_rx_surveydone_cmd(dev);
+
+	if(priv->rtllib->state == RTLLIB_LINKED_SCANNING){
+		priv->rtllib->current_network.channel = priv->rtllib->hwscan_ch_bk;
+		printk("%s():back to linked chan:%d\n", __func__,priv->rtllib->current_network.channel);
+		priv->rtllib->set_chan(dev,priv->rtllib->current_network.channel);
+	}
+}
+
+void rtl8192se_before_hw_scan(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	HT_EXTCHNL_OFFSET chan_offset=0;
+	HT_CHANNEL_WIDTH bandwidth=0;
+	struct rtllib_device *ieee = priv->rtllib;
+
+	if(priv->rtllib->state != RTLLIB_LINKED)
+		return;
+
+
+#ifdef ENABLE_LPS
+	if (ieee->LeisurePSLeave) {
+		ieee->LeisurePSLeave(ieee->dev);
+	}
+	/* notify AP to be in PS mode */
+	rtllib_sta_ps_send_null_frame(ieee, 1);
+	rtllib_sta_ps_send_null_frame(ieee, 1);
+#endif
+
+	rtllib_stop_all_queues(ieee);
+
+	if (ieee->data_hard_stop)
+		ieee->data_hard_stop(ieee->dev);
+	rtllib_stop_send_beacons(ieee);
+	ieee->state = RTLLIB_LINKED_SCANNING;
+	ieee->link_change(ieee->dev);
+	/* wait for ps packet to be kicked out successfully */
+	mdelay(50);
+
+#if(RTL8192S_DISABLE_FW_DM == 0)
+	if (ieee->SetFwCmdHandler) {
+		ieee->SetFwCmdHandler(ieee->dev, FW_CMD_PAUSE_DM_BY_SCAN);
+	}
+#endif
+
+	if (ieee->pHTInfo->bCurrentHTSupport && ieee->pHTInfo->bEnableHT && ieee->pHTInfo->bCurBW40MHz) {
+		priv->hwscan_bw_40 = 1;
+		priv->rtllib->chan_offset_bk = chan_offset = ieee->pHTInfo->CurSTAExtChnlOffset;
+		priv->rtllib->bandwidth_bk = bandwidth = (HT_CHANNEL_WIDTH)ieee->pHTInfo->bCurBW40MHz;
+		printk("before scan force BW to 20M:%d, %d\n", chan_offset, bandwidth);
+		ieee->SetBWModeHandler(ieee->dev, HT_CHANNEL_WIDTH_20, HT_EXTCHNL_OFFSET_NO_EXT);
+	}
+}
+void rtl8192se_after_hw_scan(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	HT_EXTCHNL_OFFSET chan_offset = priv->rtllib->chan_offset_bk;
+	HT_CHANNEL_WIDTH bandwidth = priv->rtllib->bandwidth_bk;
+	struct rtllib_device *ieee = priv->rtllib;
+
+	if(priv->rtllib->state != RTLLIB_LINKED_SCANNING){
+		goto out;
+	}
+
+	if (ieee->LinkDetectInfo.NumRecvBcnInPeriod == 0 || 
+			ieee->LinkDetectInfo.NumRecvDataInPeriod == 0 ) {
+		ieee->LinkDetectInfo.NumRecvBcnInPeriod = 1;
+		ieee->LinkDetectInfo.NumRecvDataInPeriod= 1;	
+	}
+
+	if (priv->hwscan_bw_40) {
+		priv->hwscan_bw_40 = 0;
+		printk("after scan back BW to 40M:%d, %d\n", chan_offset, bandwidth);
+#if 1
+		if (chan_offset == HT_EXTCHNL_OFFSET_UPPER){
+			ieee->set_chan(ieee->dev, priv->rtllib->hwscan_ch_bk + 2);
+		}else if (chan_offset == HT_EXTCHNL_OFFSET_LOWER){
+			ieee->set_chan(ieee->dev, priv->rtllib->hwscan_ch_bk - 2);
+		}else{
+			priv->rtllib->current_network.channel = priv->rtllib->hwscan_ch_bk;
+			ieee->set_chan(ieee->dev, priv->rtllib->hwscan_ch_bk);
+		}
+#endif
+		ieee->SetBWModeHandler(ieee->dev, bandwidth, chan_offset);
+	} else {
+		ieee->set_chan(ieee->dev, priv->rtllib->hwscan_ch_bk);
+	}
+	
+#if(RTL8192S_DISABLE_FW_DM == 0)
+	if (ieee->SetFwCmdHandler) {
+		ieee->SetFwCmdHandler(ieee->dev, FW_CMD_RESUME_DM_BY_SCAN);
+	}
+#endif
+	ieee->state = RTLLIB_LINKED;
+	ieee->link_change(ieee->dev);
+
+#ifdef ENABLE_LPS
+	/* Notify AP that I wake up again */
+	rtllib_sta_ps_send_null_frame(ieee, 0);
+#endif
+
+	if (ieee->data_hard_resume)
+		ieee->data_hard_resume(ieee->dev);
+	
+	if(ieee->iw_mode == IW_MODE_ADHOC || ieee->iw_mode == IW_MODE_MASTER)
+		rtllib_start_send_beacons(ieee);
+	
+	rtllib_wake_all_queues(ieee);
+	
+out:
+	return;
+}
+/* Service HAL_FW_C2H_CMD_SurveyDone (0x9) */
+void rtl8192se_rx_surveydone_cmd(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	
+
+	cancel_delayed_work(&priv->check_hw_scan_wq);
+
+	/* If a request to abort was given, or the scan did not succeed
+	 * then we reset the scan state machine and terminate,
+	 * re-queuing another scan if one has been requested */
+	if (test_bit(STATUS_SCAN_ABORTING, &priv->rtllib->status)) {
+		RT_TRACE(COMP_ERR, "Aborted scan completed.\n");
+		clear_bit(STATUS_SCAN_ABORTING, &priv->rtllib->status);
+	} 
+	
+	rtl8192se_after_hw_scan(dev);
+
+#ifdef CONFIG_FW_PARSEBEACON
+	if(priv->rtllib->state < RTLLIB_LINKED)
+	write_nic_dword(dev, RXFILTERMAP, 0x0100);
+#endif
+
+	mdelay(1);
+
+	clear_bit(STATUS_SCANNING, &priv->rtllib->status);
+
+	{
+		union iwreq_data wrqu;
+		memset(&wrqu, 0, sizeof(wrqu));
+		wireless_send_event(priv->rtllib->dev,SIOCGIWSCAN,&wrqu,NULL);
+	}
+
+	if(priv->rtllib->hwscan_sem_up == 0){
+		up(&priv->wx_sem);
+		priv->rtllib->hwscan_sem_up = 1;
+	}
+
+
+	return;
+}
+
+
+void	rtl8192se_check_hw_scan(void *data)
+{
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
+	struct r8192_priv *priv = container_of_dwork_rsl(data,struct r8192_priv,check_hw_scan_wq);
+	struct net_device *dev = priv->rtllib->dev;
+#else
+	struct net_device *dev = (struct net_device *)data;
+	struct r8192_priv *priv = rtllib_priv(dev);
+#endif
+	unsigned long flags;
+
+
+	spin_lock_irqsave(&priv->fw_scan_lock,flags);
+	printk("----------->%s()\n", __func__);
+
+	if (test_bit(STATUS_SCANNING, &priv->rtllib->status) ||
+	    test_bit(STATUS_SCAN_ABORTING, &priv->rtllib->status)) {
+		printk("FW Scan long time without stop, stop hw scan\n");
+		rtl8192se_send_scan_abort(dev);
+	}
+	
+
+	if(priv->rtllib->hwscan_sem_up == 0){
+		up(&priv->wx_sem);
+		priv->rtllib->hwscan_sem_up = 1;
+	}
+
+	printk("<-----------%s()\n", __func__);
+	spin_unlock_irqrestore(&priv->fw_scan_lock,flags);
+}
+
+void rtl8192se_start_hw_scan(void *data)
+{
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
+	struct r8192_priv *priv = container_of_dwork_rsl(data,struct r8192_priv,start_hw_scan_wq);
+	struct net_device *dev = priv->rtllib->dev;
+#else
+	struct net_device *dev = (struct net_device *)data;
+	struct r8192_priv *priv = rtllib_priv(dev);
+#endif
+	bool start_flag =true;
+	unsigned long flags;
+
+	down(&priv->wx_sem);
+	priv->rtllib->hwscan_sem_up = 0;
+
+	spin_lock_irqsave(&priv->fw_scan_lock,flags);
+
+
+	cancel_delayed_work(&priv->check_hw_scan_wq);
+
+	/* Make sure the scan wasn't canceled before this queued work
+	 * was given the chance to run... */
+	if (!test_bit(STATUS_SCANNING, &priv->rtllib->status)){
+		RT_TRACE(COMP_ERR,"scan was canceled.");
+		goto done;
+	}
+
+	if (test_bit(STATUS_SCAN_ABORTING, &priv->rtllib->status)) {
+		RT_TRACE(COMP_ERR, "Scan request while abort pending.  Queuing.");
+		goto done;
+	}
+	
+	
+#ifdef CONFIG_FW_PARSEBEACON
+	if(priv->rtllib->state < RTLLIB_LINKED)
+	write_nic_dword(dev, RXFILTERMAP, 0x0000);
+#endif
+
+	rtl8192se_before_hw_scan(dev);
+	rtl8192se_send_scan_cmd(dev,start_flag);
+
+	queue_delayed_work_rsl(priv->priv_wq,&priv->check_hw_scan_wq,MSECS(7000));
+
+	
+	spin_unlock_irqrestore(&priv->fw_scan_lock,flags);
+	
+	return;
+
+ done:
+	up(&priv->wx_sem);
+	priv->rtllib->hwscan_sem_up = 1;
+	/* Cannot perform scan. Make sure we clear scanning
+	* bits from status so next scan request can be performed.
+	* If we don't clear scanning status bit here all next scan
+	* will fail
+	*/
+	clear_bit(STATUS_SCANNING, &priv->rtllib->status);
+	
+	/* inform mac80211 scan aborted */
+	
+	spin_unlock_irqrestore(&priv->fw_scan_lock,flags);
+
+	return;
+}
+
+void rtl8192se_hw_scan_initiate(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	unsigned long flags;
+
+	spin_lock_irqsave(&priv->fw_scan_lock,flags);
+
+
+	if (test_bit(STATUS_SCANNING, &priv->rtllib->status)) {
+		printk("Scan already in progress.\n");
+		goto done;
+	}
+
+	if (test_bit(STATUS_SCAN_ABORTING, &priv->rtllib->status)) {
+		printk("Scan request while abort pending\n");
+		goto done;
+	}
+
+	
+	set_bit(STATUS_SCANNING, &priv->rtllib->status);
+
+	queue_delayed_work_rsl(priv->priv_wq,&priv->start_hw_scan_wq,0);
+
+done:
+	spin_unlock_irqrestore(&priv->fw_scan_lock,flags);
+
+	return;
+}
+
+void rtl8192se_send_scan_abort(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	int ret = true;
+	bool start_flag =false;
+
+
+	/* If there isn't a scan actively going on in the hardware
+	 * then we are in between scan bands and not actually
+	 * actively scanning, so don't send the abort command */
+	if (!test_bit(STATUS_SCANNING, &priv->rtllib->status)) {
+		goto done;
+	}
+
+	ret = rtl8192se_send_scan_cmd(dev, start_flag);
+	mdelay(1); 
+
+#ifdef CONFIG_FW_PARSEBEACON
+	if(priv->rtllib->state < RTLLIB_LINKED)
+	write_nic_dword(dev, RXFILTERMAP, 0x0100);
+#endif
+
+	if (ret) {
+		goto done;
+	}
+	
+
+done:	
+	clear_bit(STATUS_SCAN_ABORTING, &priv->rtllib->status);
+	clear_bit(STATUS_SCANNING, &priv->rtllib->status);
+	
+	return;
+}
+
+/**
+ * rtl8192se_cancel_hw_scan - Cancel any currently executing HW scan
+ *
+ * NOTE: priv->mutex is not required before calling this function
+ */
+void rtl8192se_cancel_hw_scan(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	unsigned long flags;
+	
+	spin_lock_irqsave(&priv->fw_scan_lock,flags);
+
+	if (test_bit(STATUS_SCANNING, &priv->rtllib->status)) {
+		if (!test_bit(STATUS_SCAN_ABORTING, &priv->rtllib->status)) {
+			printk("====>%s stop HW scan\n", __func__);
+			cancel_delayed_work(&priv->check_hw_scan_wq);
+
+			set_bit(STATUS_SCAN_ABORTING, &priv->rtllib->status);
+			rtl8192se_send_scan_abort(dev);
+		} else {
+			printk("-------------->%s()Scan abort already in progress.\n", __func__);
+		}
+	}
+
+	if(priv->rtllib->hwscan_sem_up == 0){
+		up(&priv->wx_sem);
+		priv->rtllib->hwscan_sem_up = 1;
+	}
+
+	spin_unlock_irqrestore(&priv->fw_scan_lock,flags);
+	return;
+}
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl8192s/r8192S_Efuse.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl8192s/r8192S_Efuse.c
@@ -0,0 +1,1869 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+#include "../rtl_core.h"
+#include "r8192S_Efuse.h"
+
+#include <linux/types.h>
+
+#ifdef RTL8192SE
+/*---------------------------Define Local Constant---------------------------*/
+#define 	_POWERON_DELAY_
+#define 	_PRE_EXECUTE_READ_CMD_
+
+#define		EFUSE_REPEAT_THRESHOLD_		3
+#define		EFUSE_ERROE_HANDLE		1
+
+
+typedef struct _EFUSE_MAP_A{
+	u8 offset;		
+	u8 word_start;	
+	u8 byte_start;	
+	u8 byte_cnts;
+	
+}EFUSE_MAP, *PEFUSE_MAP;
+
+typedef struct PG_PKT_STRUCT_A{
+	u8 offset;
+	u8 word_en;
+	u8 data[8];	
+}PGPKT_STRUCT,*PPGPKT_STRUCT;
+
+typedef enum _EFUSE_DATA_ITEM{
+	EFUSE_CHIP_ID=0,
+	EFUSE_LDO_SETTING,
+	EFUSE_CLK_SETTING,
+	EFUSE_SDIO_SETTING,
+	EFUSE_CCCR,
+	EFUSE_SDIO_MODE,
+	EFUSE_OCR,
+	EFUSE_F0CIS,
+	EFUSE_F1CIS,
+	EFUSE_MAC_ADDR,
+	EFUSE_EEPROM_VER,
+	EFUSE_CHAN_PLAN,
+	EFUSE_TXPW_TAB
+} EFUSE_DATA_ITEM;
+
+struct efuse_priv 
+{    
+	u8		id[2];
+	u8		ldo_setting[2];
+	u8		clk_setting[2];
+	u8		cccr;
+	u8		sdio_mode;
+	u8		ocr[3];
+	u8		cis0[17];
+	u8		cis1[48];	
+	u8		mac_addr[6];
+	u8		eeprom_verno;	
+	u8		channel_plan;
+	u8		tx_power_b[14];
+	u8		tx_power_g[14];	
+};
+
+/*---------------------------Define Local Constant---------------------------*/
+
+
+/*------------------------Define global variable-----------------------------*/
+const u8 MAX_PGPKT_SIZE = 9; 
+const u8 PGPKT_DATA_SIZE = 8; 
+const u32 EFUSE_MAX_SIZE = 512;
+
+const u8 EFUSE_OOB_PROTECT_BYTES = 15; 
+
+
+const EFUSE_MAP RTL8712_SDIO_EFUSE_TABLE[]={
+/*ID*/		{0		,0		,0			,2	}, 
+/*LDO Setting*/	{0		,1		,0			,2	}, 
+/*CLK Setting*/	{0		,2		,0			,2	}, 
+/*SDIO Setting*/{1		,0		,0			,1	}, 
+/*CCCR*/	{1		,0		,1			,1	}, 
+/*SDIO MODE*/	{1		,1		,0			,1	}, 
+/*OCR*/		{1		,1		,1			,3	}, 
+/*CCIS*/	{1		,3		,0			,17	}, 
+/*F1CIS*/	{3		,3		,1			,48	}, 
+/*MAC Addr*/	{10		,0		,0			,6	}, 
+/*EEPROM ver*/	{10		,3		,0			,1	}, 
+/*Channel plan*/{10		,3		,1			,1	}, 
+/*TxPwIndex */	{11		,0		,0			,28	}  
+};
+
+/*------------------------Define global variable-----------------------------*/
+
+
+/*------------------------Define local variable------------------------------*/
+
+/*------------------------Define local variable------------------------------*/
+
+
+/*--------------------Define function prototype-----------------------*/
+extern	void	
+EFUSE_Initialize(struct net_device* dev);
+extern	u8	
+EFUSE_Read1Byte(struct net_device* dev, u16 Address);
+extern	void	
+EFUSE_Write1Byte(struct net_device* dev, u16 Address,u8 Value);
+
+static	void
+efuse_ShadowRead1Byte(struct net_device* dev,u16 Offset,u8 *Value);
+static	void
+efuse_ShadowRead2Byte(struct net_device* dev,	u16 Offset,u16 *Value	);
+static	void
+efuse_ShadowRead4Byte(struct net_device* dev,	u16 Offset,u32 *Value	);
+static	void
+efuse_ShadowWrite1Byte(struct net_device* dev,	u16 Offset, u8 Value);
+static	void
+efuse_ShadowWrite2Byte(struct net_device* dev,	u16 Offset,u16 Value);
+static	void
+efuse_ShadowWrite4Byte(struct net_device* dev,	u16 Offset,u32 Value);
+
+static	u8
+efuse_OneByteRead(struct net_device* dev,u16 addr,u8 *data);
+static	u8
+efuse_OneByteWrite(struct net_device* dev,u16 addr, u8 data);
+
+static	void 
+efuse_ReadAllMap(struct net_device* dev,u8 *Efuse);
+#ifdef TO_DO_LIST
+static	void
+efuse_WriteAllMap(struct net_device* dev,u8 *eeprom,u32 eeprom_size);
+static	bool	
+efuse_ParsingMap(char* szStr,u32* pu4bVal,u32* pu4bMove);
+#endif
+static	u8
+efuse_PgPacketRead(	struct net_device* dev,u8	offset,u8 *data);
+static	u8 
+efuse_PgPacketWrite(struct net_device* dev,u8 offset,u8 word_en,u8	*data);
+static	void
+efuse_WordEnableDataRead(	u8 word_en,u8 *sourdata,u8 *targetdata);
+static	u8
+efuse_WordEnableDataWrite(	struct net_device* dev, u16 efuse_addr, u8 word_en, u8 *data);
+static	void
+efuse_PowerSwitch(struct net_device* dev,u8 PwrState);
+static	u16
+efuse_GetCurrentSize(struct net_device* dev);
+static u8
+efuse_CalculateWordCnts(u8 word_en);
+#if 0
+static	void
+efuse_ResetLoader(struct net_device* dev);
+#endif
+#ifdef TO_DO_LIST
+static void efuse_reg_ctrl(struct net_device* dev, u8 bPowerOn);
+#endif
+/*--------------------Define function prototype-----------------------*/
+
+
+
+extern	void	
+EFUSE_Initialize(struct net_device* dev)
+{
+	u8	Bytetemp = {0x00};
+	u8	temp = {0x00};
+
+	Bytetemp = read_nic_byte(dev, SYS_FUNC_EN+1);
+	temp = Bytetemp | 0x20;
+	write_nic_byte(dev, SYS_FUNC_EN+1, temp);
+
+	Bytetemp = read_nic_byte(dev, SYS_ISO_CTRL+1);
+	temp = Bytetemp & 0xFE;
+	write_nic_byte(dev, SYS_ISO_CTRL+1, temp);
+
+	
+	Bytetemp = read_nic_byte(dev, EFUSE_TEST+3);
+	temp = Bytetemp | 0x80;
+	write_nic_byte(dev, EFUSE_TEST+3, temp);
+
+	write_nic_byte(dev, 0x2F8, 0x3);
+	
+	write_nic_byte(dev, EFUSE_CTRL+3, 0x72);
+	
+}	/* EFUSE_Initialize */
+
+
+extern	u8	
+EFUSE_Read1Byte(struct net_device* dev, u16	Address)
+{
+	u8	data;
+	u8	Bytetemp = {0x00};
+	u8	temp = {0x00};
+	u32	k=0;
+
+	if (Address < EFUSE_REAL_CONTENT_LEN)	
+	{
+		temp = Address & 0xFF;	
+		write_nic_byte(dev, EFUSE_CTRL+1, temp);	
+		Bytetemp = read_nic_byte(dev, EFUSE_CTRL+2);	
+		temp = ((Address >> 8) & 0x03) | (Bytetemp & 0xFC);	
+		write_nic_byte(dev, EFUSE_CTRL+2, temp);	
+
+		Bytetemp = read_nic_byte(dev, EFUSE_CTRL+3);
+		temp = Bytetemp & 0x7F;
+		write_nic_byte(dev, EFUSE_CTRL+3, temp);
+
+		Bytetemp = read_nic_byte(dev, EFUSE_CTRL+3);
+		while(!(Bytetemp & 0x80))
+		{				
+			Bytetemp = read_nic_byte(dev, EFUSE_CTRL+3);
+			k++;
+			if(k==1000)
+			{
+				k=0;
+				break;
+			}
+		}
+		data=read_nic_byte(dev, EFUSE_CTRL);
+		return data;
+	}
+	else
+		return 0xFF;
+	
+}	/* EFUSE_Read1Byte */
+
+
+extern	void	
+EFUSE_Write1Byte(struct net_device* dev, u16 Address,u8 Value)
+{
+	u8	Bytetemp = {0x00};
+	u8	temp = {0x00};
+	u32	k=0;
+
+	
+	if( Address < EFUSE_REAL_CONTENT_LEN)	
+	{
+		write_nic_byte(dev, EFUSE_CTRL, Value);
+
+		temp = Address & 0xFF;	
+		write_nic_byte(dev, EFUSE_CTRL+1, temp);	
+		Bytetemp = read_nic_byte(dev, EFUSE_CTRL+2);	
+		
+		temp = ((Address >> 8) & 0x03) | (Bytetemp & 0xFC);	
+		write_nic_byte(dev, EFUSE_CTRL+2, temp);	
+
+		Bytetemp = read_nic_byte(dev, EFUSE_CTRL+3);
+		temp = Bytetemp | 0x80;
+		write_nic_byte(dev, EFUSE_CTRL+3, temp);
+
+		Bytetemp = read_nic_byte(dev, EFUSE_CTRL+3);
+		while(Bytetemp & 0x80)
+		{
+			Bytetemp = read_nic_byte(dev, EFUSE_CTRL+3);			
+			k++;
+			if(k==100)
+			{
+				k=0;
+				break;
+			}
+		}
+	}
+	
+}	/* EFUSE_Write1Byte */
+
+
+#ifdef EFUSE_FOR_92SU
+void do_93c46(struct net_device* dev,  u8 addorvalue)
+{
+	u8  cs[1] = {0x88};        
+	u8  cssk[1] = {0x8c};      
+	u8  csdi[1] = {0x8a};      
+    	u8  csskdi[1] = {0x8e};    
+    	u8  count;
+	
+    	for(count=0 ; count<8 ; count++)
+	{
+		if((addorvalue&0x80)!=0)
+		{
+			write_nic_byte(dev, EPROM_CMD, csdi[0]);  		
+			write_nic_byte(dev, EPROM_CMD, csskdi[0]);  		
+		}
+		else
+		{
+			write_nic_byte(dev, EPROM_CMD, cs[0]);  		
+			write_nic_byte(dev, EPROM_CMD, cssk[0]);  		
+		}
+		addorvalue = addorvalue << 1;
+	}
+}
+
+
+u16 Read93C46(struct net_device*	dev,	u16	Reg	)
+{
+
+   	u8  	clear[1] = {0x0};      
+	u8  	cs[1] = {0x88};        
+	u8  	cssk[1] = {0x8c};      
+	u8  	csdi[1] = {0x8a};      
+   	u8  	csskdi[1] = {0x8e};    
+	u8  	EepromSEL[1]={0x00};
+	u8  	address;
+	
+	u16   	storedataF[1] = {0x0};   
+	u8   	t,data[1],storedata[1];
+	
+
+	address = (u8)Reg;
+	
+	*EepromSEL= read_nic_byte(dev, EPROM_CMD);
+
+	if((*EepromSEL & 0x10) == 0x10) 
+	{
+		address = address | 0x80;
+
+		write_nic_byte(dev, EPROM_CMD, csdi[0]);  		
+		write_nic_byte(dev, EPROM_CMD, csskdi[0]);  		
+   		do_93c46(dev, address);
+	}
+
+
+	for(t=0 ; t<16 ; t++)      
+	{
+		write_nic_byte(dev, EPROM_CMD, cs[0]);  		
+		write_nic_byte(dev, EPROM_CMD, cssk[0]); 
+		*data= read_nic_byte(dev, EPROM_CMD);		
+		
+		if(*data & 0x8d) 
+		{
+			*data = *data & 0x01;
+			*storedata = *data;
+		}
+		else 
+		{
+			*data = *data & 0x01 ; 
+			*storedata = *data;   
+		} 
+		*storedataF = (*storedataF << 1 ) + *storedata;
+	}
+	write_nic_byte(dev, EPROM_CMD, cs[0]);     
+	write_nic_byte(dev, EPROM_CMD, clear[0]);     
+
+	return *storedataF;
+}
+
+
+void
+ReadEFuseByte(struct net_device* dev,u16 _offset, u8 *pbuf) 
+{
+
+	u32  value32;
+	u8 	readbyte;
+	u16 	retry;
+	
+
+	write_nic_byte(dev, EFUSE_CTRL+1, (_offset & 0xff));  		
+	readbyte = read_nic_byte(dev, EFUSE_CTRL+2);
+	write_nic_byte(dev, EFUSE_CTRL+2, ((_offset >> 8) & 0x03) | (readbyte & 0xfc));  		
+
+	readbyte = read_nic_byte(dev, EFUSE_CTRL+3);		
+	write_nic_byte(dev, EFUSE_CTRL+3, (readbyte & 0x7f));  	
+	
+	retry = 0;
+	value32 = read_nic_dword(dev, EFUSE_CTRL);
+	while(!(((value32 >> 24) & 0xff) & 0x80)  && (retry<10000))
+	{
+		value32 = read_nic_dword(dev, EFUSE_CTRL);
+		retry++;
+	}	
+	*pbuf = (u8)(value32 & 0xff);
+}
+
+
+#define		EFUSE_READ_SWITCH		1
+void
+ReadEFuse(struct net_device* dev, u16	 _offset, u16 _size_byte, u8 *pbuf)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u8  	efuseTbl[EFUSE_MAP_LEN];
+	u8  	rtemp8[1];
+	u16 	eFuse_Addr = 0;
+	u8  	offset, wren;
+	u16  	i, j;
+	u16 	eFuseWord[EFUSE_MAX_SECTION][EFUSE_MAX_WORD_UNIT];
+	u16	efuse_utilized = 0;
+	u16	efuse_usage = 0;
+#ifdef EFUSE_REPG_WORKAROUND
+	u16	sec1_addr = 0, sec5_addr = 0;
+#endif
+
+	if((_offset + _size_byte)>EFUSE_MAP_LEN)
+	{
+		printk("ReadEFuse(): Invalid offset with read bytes!!\n");
+		return;
+	}
+
+	for (i = 0; i < EFUSE_MAX_SECTION; i++)
+		for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++)
+			eFuseWord[i][j]=0xFFFF;
+	
+	for (i = 0; i < EFUSE_MAP_LEN; i++)
+		efuseTbl[i] = 0xFF;
+
+	ReadEFuseByte(dev, eFuse_Addr, rtemp8);	
+	if(*rtemp8 != 0xFF)		
+	{
+		efuse_utilized++;
+		eFuse_Addr++;
+	}
+	while((*rtemp8 != 0xFF) && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN))
+	{
+		offset = ((*rtemp8 >> 4) & 0x0f);
+#ifdef EFUSE_REPG_WORKAROUND
+		if (IS_HARDWARE_TYPE_8192SE(dev))
+		{
+			if (offset == 1)
+			{
+				sec1_addr = eFuse_Addr;	
+			}
+			else if (offset == 5)
+			{
+				sec5_addr = eFuse_Addr;
+			}
+		
+			if (sec1_addr > sec5_addr)
+			{
+				priv->efuse_RePGSec1Flag = false;
+			}
+			else
+			{
+				priv->efuse_RePGSec1Flag = true;
+		       }
+		}
+#endif
+		if(offset < EFUSE_MAX_SECTION){
+			wren = (*rtemp8 & 0x0f);
+			for(i=0; i<4; i++){
+				if(!(wren & 0x01)){
+					ReadEFuseByte(dev, eFuse_Addr, rtemp8);	eFuse_Addr++;
+					efuse_utilized++;
+					eFuseWord[offset][i] = (*rtemp8 & 0xff);
+					if(eFuse_Addr >= EFUSE_REAL_CONTENT_LEN) break;
+					ReadEFuseByte(dev, eFuse_Addr, rtemp8);	eFuse_Addr++;
+					efuse_utilized++;
+					eFuseWord[offset][i] |= (((u16)*rtemp8 << 8) & 0xff00);
+					if(eFuse_Addr >= EFUSE_REAL_CONTENT_LEN) break;
+				}
+				wren >>= 1;
+			}
+		}
+		ReadEFuseByte(dev, eFuse_Addr, rtemp8);	
+		if(*rtemp8 != 0xFF && (eFuse_Addr < 512))	
+		{
+			efuse_utilized++;
+			eFuse_Addr++;
+		}
+	}
+
+	for(i=0; i<EFUSE_MAX_SECTION; i++){
+		for(j=0; j<EFUSE_MAX_WORD_UNIT; j++){
+			efuseTbl[(i*8)+(j*2)]=(eFuseWord[i][j] & 0xff);
+			efuseTbl[(i*8)+((j*2)+1)]=((eFuseWord[i][j] >> 8) & 0xff);
+#ifdef FUSE_REPG_WORKAROUND
+			if ((i == 1) && (priv->efuse_RePGSec1Flag == true))
+			{
+				priv->efuse_RePGData[j*2]=(eFuseWord[i][j] & 0xff);
+				priv->efuse_RePGData[(j*2)+1]=((eFuseWord[i][j] >> 8) & 0xff);
+			}
+#endif
+		}
+	}
+	for(i=0; i<_size_byte; i++)
+		pbuf[i] = efuseTbl[_offset+i];
+	priv->EfuseUsedBytes = efuse_utilized;
+	efuse_usage = (u8)((efuse_utilized*100)/EFUSE_REAL_CONTENT_LEN);
+	priv->EfuseUsedPercentage = efuse_usage;	
+}
+#endif	
+
+extern bool EFUSE_ShadowUpdateChk(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u8   SectionIdx, i, Base;
+	u16  WordsNeed = 0, HdrNum = 0, TotalBytes = 0, EfuseUsed = 0;
+	bool bWordChanged, bResult = true;
+
+	for (SectionIdx = 0; SectionIdx < 16; SectionIdx++) {
+		Base = SectionIdx * 8;
+		bWordChanged = false;
+
+		for (i = 0; i < 8; i=i+2) {
+			if((priv->EfuseMap[EFUSE_INIT_MAP][Base+i] !=
+						priv->EfuseMap[EFUSE_MODIFY_MAP][Base+i]) ||
+					(priv->EfuseMap[EFUSE_INIT_MAP][Base+i+1] !=
+					 priv->EfuseMap[EFUSE_MODIFY_MAP][Base+i+1])) {
+				WordsNeed++;
+				bWordChanged = true;
+			}
+		}
+
+		if( bWordChanged == true )
+			HdrNum++;
+	}
+
+	TotalBytes = HdrNum + WordsNeed * 2;
+	EfuseUsed = priv->EfuseUsedBytes;
+
+	if ((TotalBytes + EfuseUsed) >= (EFUSE_MAX_SIZE - EFUSE_OOB_PROTECT_BYTES))
+		bResult = false;
+
+	return bResult;
+}
+
+extern void
+EFUSE_ShadowRead(	struct net_device*	dev,	u8 Type, u16 Offset, u32 *Value)
+{
+
+	if (Type == 1)
+		efuse_ShadowRead1Byte(dev, Offset, (u8 *)Value);
+	else if (Type == 2)
+		efuse_ShadowRead2Byte(dev, Offset, (u16 *)Value);
+	else if (Type == 4)
+		efuse_ShadowRead4Byte(dev, Offset, (u32 *)Value);
+	
+}	
+
+
+extern	void
+EFUSE_ShadowWrite(	struct net_device*	dev,	u8 Type, u16 Offset,u32	Value)
+{
+
+	if (Offset >= 0x18 && Offset <= 0x1F)
+		return;
+
+	if (Type == 1)
+		efuse_ShadowWrite1Byte(dev, Offset, (u8)Value);
+	else if (Type == 2)
+		efuse_ShadowWrite2Byte(dev, Offset, (u16)Value);
+	else if (Type == 4)
+		efuse_ShadowWrite4Byte(dev, Offset, (u32)Value);
+	
+}	
+
+
+extern bool EFUSE_ShadowUpdate(struct net_device* dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u16  i, offset, base = 0;
+	u8   word_en = 0x0F;
+	bool first_pg = false;
+
+	if (!EFUSE_ShadowUpdateChk(dev)) {
+		efuse_ReadAllMap(dev, &priv->EfuseMap[EFUSE_INIT_MAP][0]);
+		memcpy(&priv->EfuseMap[EFUSE_MODIFY_MAP][0],
+				(void *)&priv->EfuseMap[EFUSE_INIT_MAP][0], HWSET_MAX_SIZE_92S);
+
+		printk("<---EFUSE_ShadowUpdate(): Efuse out of capacity!!\n");
+		return false;
+	}
+
+	efuse_PowerSwitch(dev, true);
+
+	for (offset = 0; offset < 16; offset++)
+	{
+		if(IS_HARDWARE_TYPE_8192SE(dev)){
+			if (offset == 3)
+				continue;
+		}
+		word_en = 0x0F;		
+		base = offset * 8;
+
+		for (i = 0; i < 8; i++)
+		{
+			if (offset == 0 && priv->EfuseMap[EFUSE_INIT_MAP][base+i] == 0xFF)
+			{
+				first_pg = true;				
+			}
+
+			if (first_pg == true && offset == 1 && IS_HARDWARE_TYPE_8192SE(dev))
+			{
+				continue;
+			}
+
+			if (first_pg == true)
+			{
+				word_en &= ~(BIT(i/2));	
+				priv->EfuseMap[EFUSE_INIT_MAP][base+i] = 
+				priv->EfuseMap[EFUSE_MODIFY_MAP][base+i];
+			}else
+			{
+				if (	priv->EfuseMap[EFUSE_INIT_MAP][base+i] != 
+					priv->EfuseMap[EFUSE_MODIFY_MAP][base+i])
+				{
+					word_en &= ~(EFUSE_BIT(i/2));
+
+					priv->EfuseMap[EFUSE_INIT_MAP][base+i] = 
+					priv->EfuseMap[EFUSE_MODIFY_MAP][base+i];
+				}
+			}
+		}
+		
+		if (word_en != 0x0F)
+		{
+			u8	tmpdata[8];
+
+			memcpy(tmpdata, &(priv->EfuseMap[EFUSE_MODIFY_MAP][base]), 8);
+			efuse_PgPacketWrite(dev,(u8)offset,word_en,tmpdata);
+		}
+		
+	}
+	if (first_pg == true && IS_HARDWARE_TYPE_8192SE(dev))
+	{
+		u8	tmpdata[8];
+
+		memcpy(tmpdata, (&priv->EfuseMap[EFUSE_MODIFY_MAP][8]), 8);
+		efuse_PgPacketWrite(dev, 1, 0x0, tmpdata);		
+#if 0
+		u1Byte	tmpdata[8] = {0xFF, 0xFF, 0xEC, 0x10, 0xFF, 0xFF, 0xFF, 0xFF};
+		
+		efuse_PgPacketWrite(pAdapter, 1, 0xD, tmpdata);
+#endif		
+	}
+
+
+	efuse_PowerSwitch(dev, false);
+	efuse_ReadAllMap(dev, &priv->EfuseMap[EFUSE_INIT_MAP][0]);
+	memcpy(&priv->EfuseMap[EFUSE_MODIFY_MAP][0],
+		(void *)&priv->EfuseMap[EFUSE_INIT_MAP][0], HWSET_MAX_SIZE_92S);
+		
+	return true;	
+}	
+
+
+extern void EFUSE_ShadowMapUpdate(struct net_device* dev)
+{	
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	if (priv->AutoloadFailFlag == true){
+		memset(&(priv->EfuseMap[EFUSE_INIT_MAP][0]), 0xff, 128);
+	}else{	
+		efuse_ReadAllMap(dev, &priv->EfuseMap[EFUSE_INIT_MAP][0]);
+	}
+	memcpy(&priv->EfuseMap[EFUSE_MODIFY_MAP][0], 
+		&priv->EfuseMap[EFUSE_INIT_MAP][0], HWSET_MAX_SIZE_92S);
+	
+}	
+
+
+extern	void 
+EFUSE_ForceWriteVendorId( struct net_device* dev)
+{
+	u8 tmpdata[8] = {0xFF, 0xFF, 0xEC, 0x10, 0xFF, 0xFF, 0xFF, 0xFF};
+
+	efuse_PowerSwitch(dev, true);
+		
+	efuse_PgPacketWrite(dev, 1, 0xD, tmpdata);
+
+	efuse_PowerSwitch(dev, false);
+	
+}	
+
+extern	void 
+EFUSE_RePgSection1(struct net_device* dev)
+{
+#ifdef EFUSE_REPG_WORKAROUND
+
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	if (priv->efuse_RePGSec1Flag == true)
+	{
+		efuse_PowerSwitch(dev, true);		
+		RT_TRACE(COMP_INIT, "EFUSE REPG: %p, %u\n", priv->efuse_RePGData, 8);
+				
+		efuse_PgPacketWrite(dev, 1, 0x0d, priv->efuse_RePGData);	
+		efuse_PowerSwitch(dev, false);
+		priv->efuse_RePGSec1Flag = false;
+	}
+#endif	
+}	
+
+
+static	void
+efuse_ShadowRead1Byte(struct net_device*	dev,	u16 Offset,	u8 *Value)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	*Value = priv->EfuseMap[EFUSE_MODIFY_MAP][Offset];
+	
+}	
+
+static	void
+efuse_ShadowRead2Byte(struct net_device*	dev,	u16 Offset,	u16 *Value)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	*Value = priv->EfuseMap[EFUSE_MODIFY_MAP][Offset];
+	*Value |= priv->EfuseMap[EFUSE_MODIFY_MAP][Offset+1]<<8;
+	
+}	
+
+static	void
+efuse_ShadowRead4Byte(struct net_device*	dev,	u16 Offset,	u32 *Value)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	*Value = priv->EfuseMap[EFUSE_MODIFY_MAP][Offset];
+	*Value |= priv->EfuseMap[EFUSE_MODIFY_MAP][Offset+1]<<8;
+	*Value |= priv->EfuseMap[EFUSE_MODIFY_MAP][Offset+2]<<16;
+	*Value |= priv->EfuseMap[EFUSE_MODIFY_MAP][Offset+3]<<24;
+	
+}	
+
+
+
+static	void
+efuse_ShadowWrite1Byte(struct net_device*	dev,	u16 Offset,	u8 Value)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	priv->EfuseMap[EFUSE_MODIFY_MAP][Offset] = Value;
+	
+}	
+
+static	void
+efuse_ShadowWrite2Byte(struct net_device*	dev,	u16 Offset,	u16 Value)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	priv->EfuseMap[EFUSE_MODIFY_MAP][Offset] = Value&0x00FF;
+	priv->EfuseMap[EFUSE_MODIFY_MAP][Offset+1] = Value>>8;
+	
+}	
+
+static	void
+efuse_ShadowWrite4Byte(struct net_device*	dev,	u16 Offset,	u32 Value)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	priv->EfuseMap[EFUSE_MODIFY_MAP][Offset] = (u8)(Value&0x000000FF);
+	priv->EfuseMap[EFUSE_MODIFY_MAP][Offset+1] = (u8)((Value>>8)&0x0000FF);
+	priv->EfuseMap[EFUSE_MODIFY_MAP][Offset+2] = (u8)((Value>>16)&0x00FF);
+	priv->EfuseMap[EFUSE_MODIFY_MAP][Offset+3] = (u8)((Value>>24)&0xFF);
+	
+}	
+
+
+static	u8
+efuse_OneByteRead(struct net_device* dev, u16 addr,u8 *data)
+{
+	u8 tmpidx = 0;
+	u8 bResult;
+	
+	write_nic_byte(dev, EFUSE_CTRL+1, (u8)(addr&0xff));		
+	write_nic_byte(dev, EFUSE_CTRL+2, ((u8)((addr>>8) &0x03) ) | 
+	(read_nic_byte(dev, EFUSE_CTRL+2)&0xFC ));	
+
+	write_nic_byte(dev, EFUSE_CTRL+3,  0x72);
+
+	while(!(0x80 &read_nic_byte(dev, EFUSE_CTRL+3))&&(tmpidx<100))
+	{
+		tmpidx++;
+	}
+	if(tmpidx<100)
+	{			
+		*data=read_nic_byte(dev, EFUSE_CTRL);		
+		bResult = true;
+	}
+	else
+	{
+		*data = 0xff;	
+		bResult = false;
+	}
+	return bResult;
+}	
+		
+static	u8
+efuse_OneByteWrite(struct net_device* dev,  u16 addr, u8 data)
+{
+	u8 tmpidx = 0;
+	u8 bResult;
+	
+
+
+	write_nic_byte(dev, EFUSE_CTRL+1, (u8)(addr&0xff));		
+	write_nic_byte(dev, EFUSE_CTRL+2, 
+	read_nic_byte(dev, EFUSE_CTRL+2)|(u8)((addr>>8)&0x03) );
+
+	write_nic_byte(dev, EFUSE_CTRL, data);
+	write_nic_byte(dev, EFUSE_CTRL+3, 0xF2);
+		
+	while((0x80 &  read_nic_byte(dev, EFUSE_CTRL+3)) && (tmpidx<100) ){
+		tmpidx++;
+	}
+	
+	if(tmpidx<100)
+	{					
+		bResult = true;
+	}
+	else
+	{			
+		bResult = false;
+	}		
+	
+	return bResult;	
+}	
+
+
+static	void 
+efuse_ReadAllMap(struct net_device*	dev, u8	*Efuse)
+{	
+		
+	efuse_PowerSwitch(dev, true);
+	ReadEFuse(dev, 0, 128, Efuse);
+	efuse_PowerSwitch(dev, false);
+#if 0
+	RT_TRACE(COMP_INIT, "efuse_ResetLoader\n");
+	efuse_ResetLoader(dev);
+
+	write_nic_byte(dev, EFUSE_CLK, 0x03);
+	
+	ReadEFuse(dev, 0, 128, Efuse);
+
+	write_nic_byte(dev, EFUSE_CLK, 0x02);
+#if 0	
+	for(offset = 0;offset<16;offset++)	
+	{		
+		PlatformFillMemory((PVOID)pg_data, 8, 0xff);
+		efuse_PgPacketRead(pAdapter,offset,pg_data);
+
+		PlatformMoveMemory((PVOID)&Efuse[offset*8], (PVOID)pg_data, 8);
+	}
+#endif
+
+	if (Efuse[0] != 0x29 || Efuse[1] != 0x81)
+	{
+		if (index ++ < 5)
+		{
+			RT_TRACE(COMP_INIT, "EFUSE R FAIL %d\n", index);
+			efuse_ReadAllMap(dev, Efuse);
+		}
+	}
+	else
+	{
+		index = 0;
+	}
+
+#endif	
+}	
+
+
+#ifdef TO_DO_LIST
+static	void
+efuse_WriteAllMap(struct net_device* dev,u8 *eeprom, u32 eeprom_size)
+{	
+	unsigned char word_en = 0x00;
+
+	unsigned char tmpdata[8];
+	unsigned char offset;
+
+	efuse_PowerSwitch(dev, true);
+
+	for(offset=0 ; offset< eeprom_size/PGPKT_DATA_SIZE ; offset++)
+	{
+		if (IS_HARDWARE_TYPE_8192SE(dev))
+		{
+			if (offset == 3/* || offset > 9*/)	
+				continue;
+			else
+				word_en = 0x00;
+		}
+		
+		memcpy(tmpdata, (eeprom+(offset*PGPKT_DATA_SIZE)), 8);
+
+	
+		efuse_PgPacketWrite(dev,offset,word_en,tmpdata);
+
+		
+	}
+
+	efuse_PowerSwitch(dev, false);
+	
+}	
+#endif
+static	u8
+efuse_PgPacketRead(	struct net_device*	dev,	u8 offset, u8	*data)
+{	
+	u8 ReadState = PG_STATE_HEADER;	
+	
+	bool bContinual = true;
+	bool  bDataEmpty = true ;	
+
+	u8 efuse_data,word_cnts=0;
+	u16 efuse_addr = 0;
+	u8 hoffset=0,hworden=0;	
+	u8 tmpidx=0;
+	u8 tmpdata[8];
+	
+	if(data==NULL)	return false;
+	if(offset>15)		return false;	
+	
+	memset(data, 0xff, sizeof(u8)*PGPKT_DATA_SIZE);
+	memset(tmpdata, 0xff, sizeof(u8)*PGPKT_DATA_SIZE);
+	
+	
+	while(bContinual && (efuse_addr  < EFUSE_MAX_SIZE) )
+	{			
+		if(ReadState & PG_STATE_HEADER)
+		{
+			if(efuse_OneByteRead(dev, efuse_addr ,&efuse_data)&&(efuse_data!=0xFF)){				
+				hoffset = (efuse_data>>4) & 0x0F;
+				hworden =  efuse_data & 0x0F;									
+				word_cnts = efuse_CalculateWordCnts(hworden);
+				bDataEmpty = true ;
+
+				if(hoffset==offset){
+					for(tmpidx = 0;tmpidx< word_cnts*2 ;tmpidx++){
+						if(efuse_OneByteRead(dev, efuse_addr+1+tmpidx ,&efuse_data) ){
+							tmpdata[tmpidx] = efuse_data;
+							if(efuse_data!=0xff){						
+								bDataEmpty = false;
+							}
+						}					
+					}
+					if(bDataEmpty==false){
+						ReadState = PG_STATE_DATA;							
+					}else{
+						efuse_addr = efuse_addr + (word_cnts*2)+1;
+						ReadState = PG_STATE_HEADER; 
+					}
+				}
+				else{
+					efuse_addr = efuse_addr + (word_cnts*2)+1;
+					ReadState = PG_STATE_HEADER; 
+				}
+				
+			}
+			else{
+				bContinual = false ;
+			}
+		}		
+		else if(ReadState & PG_STATE_DATA)
+		{
+			efuse_WordEnableDataRead(hworden,tmpdata,data);
+			efuse_addr = efuse_addr + (word_cnts*2)+1;
+			ReadState = PG_STATE_HEADER; 
+		}
+		
+	}			
+	
+	
+	if(	(data[0]==0xff) &&(data[1]==0xff) && (data[2]==0xff)  && (data[3]==0xff) &&
+		(data[4]==0xff) &&(data[5]==0xff) && (data[6]==0xff)  && (data[7]==0xff))
+		return false;
+	else
+		return true;
+
+}	
+
+
+static u8 efuse_PgPacketWrite(struct net_device* dev, u8 offset, u8 word_en,u8 *data)
+{
+	u8 WriteState = PG_STATE_HEADER;		
+	bool bContinual = true,bDataEmpty=true, bResult = true;
+	u16 efuse_addr = 0;
+	u8 efuse_data;
+
+	u8 pg_header = 0;
+
+	u8 tmp_word_cnts=0,target_word_cnts=0;
+	u8 tmp_header,match_word_en,tmp_word_en;
+
+	PGPKT_STRUCT target_pkt;	
+	PGPKT_STRUCT tmp_pkt;
+
+	u8 originaldata[sizeof(u8)*8];
+	u8 tmpindex = 0,badworden = 0x0F;
+
+	static u32 repeat_times = 0;
+
+	if (efuse_GetCurrentSize(dev) >= EFUSE_MAX_SIZE - EFUSE_OOB_PROTECT_BYTES) {
+		printk("efuse_PgPacketWrite error \n");
+		return false;
+	}
+
+	target_pkt.offset = offset;
+	target_pkt.word_en= word_en;
+
+	memset(target_pkt.data,0xFF,sizeof(u8)*8);
+	
+	efuse_WordEnableDataRead(word_en,data,target_pkt.data);
+	target_word_cnts = efuse_CalculateWordCnts(target_pkt.word_en);
+
+	printk("EFUSE Power ON\n");
+
+	while (bContinual && (efuse_addr  < (EFUSE_MAX_SIZE - EFUSE_OOB_PROTECT_BYTES)))
+	{
+		if(WriteState==PG_STATE_HEADER)
+		{	
+			bDataEmpty=true;
+			badworden = 0x0F;		
+			printk("EFUSE PG_STATE_HEADER\n");
+			if (	efuse_OneByteRead(dev, efuse_addr ,&efuse_data) &&
+				(efuse_data!=0xFF))
+			{ 	
+				tmp_header  =  efuse_data;
+				
+				tmp_pkt.offset 	= (tmp_header>>4) & 0x0F;
+				tmp_pkt.word_en 	= tmp_header & 0x0F;					
+				tmp_word_cnts =  efuse_CalculateWordCnts(tmp_pkt.word_en);
+
+				if(tmp_pkt.offset  != target_pkt.offset)
+				{
+					efuse_addr = efuse_addr + (tmp_word_cnts*2) +1; 
+					#if (EFUSE_ERROE_HANDLE == 1)
+					WriteState = PG_STATE_HEADER;
+					#endif
+				}
+				else
+				{	
+					for(tmpindex=0 ; tmpindex<(tmp_word_cnts*2) ; tmpindex++)
+					{
+						if(efuse_OneByteRead(dev, (efuse_addr+1+tmpindex) ,&efuse_data)&&(efuse_data != 0xFF)){
+							bDataEmpty = false;	
+						}
+					}	
+					if(bDataEmpty == false)
+					{						
+						efuse_addr = efuse_addr + (tmp_word_cnts*2) +1; 
+						#if (EFUSE_ERROE_HANDLE == 1)
+						WriteState=PG_STATE_HEADER;
+						#endif
+					}
+					else
+					{
+						match_word_en = 0x0F;
+						if(   !( (target_pkt.word_en&BIT0)|(tmp_pkt.word_en&BIT0)  ))
+						{
+							 match_word_en &= (~BIT0);
+						}	
+						if(   !( (target_pkt.word_en&BIT1)|(tmp_pkt.word_en&BIT1)  ))
+						{
+							 match_word_en &= (~BIT1);
+						}
+						if(   !( (target_pkt.word_en&BIT2)|(tmp_pkt.word_en&BIT2)  ))
+						{
+							 match_word_en &= (~BIT2);
+						}
+						if(   !( (target_pkt.word_en&BIT3)|(tmp_pkt.word_en&BIT3)  ))
+						{
+							 match_word_en &= (~BIT3);
+						}					
+												
+						if((match_word_en&0x0F)!=0x0F)
+						{							
+							badworden = efuse_WordEnableDataWrite(dev,efuse_addr+1, tmp_pkt.word_en ,target_pkt.data);
+							
+							if(0x0F != (badworden&0x0F))
+							{														
+								u8 reorg_offset = offset;
+								u8 reorg_worden=badworden;								
+								efuse_PgPacketWrite(dev,reorg_offset,reorg_worden,originaldata);	
+							}	
+
+							tmp_word_en = 0x0F;	
+							if(  (target_pkt.word_en&BIT0)^(match_word_en&BIT0)  )
+							{
+								tmp_word_en &= (~BIT0);
+							}
+							if(   (target_pkt.word_en&BIT1)^(match_word_en&BIT1) )
+							{
+								tmp_word_en &=  (~BIT1);
+							}
+							if(   (target_pkt.word_en&BIT2)^(match_word_en&BIT2) )
+							{
+								tmp_word_en &= (~BIT2);
+							}						
+							if(   (target_pkt.word_en&BIT3)^(match_word_en&BIT3) )
+							{
+								tmp_word_en &=(~BIT3);
+							}							
+						
+							if((tmp_word_en&0x0F)!=0x0F){
+								efuse_addr = efuse_GetCurrentSize(dev);
+								target_pkt.offset = offset;
+								target_pkt.word_en= tmp_word_en;					
+							}else{								
+								bContinual = false;
+							}
+							#if (EFUSE_ERROE_HANDLE == 1)
+							WriteState=PG_STATE_HEADER;
+							repeat_times++;
+							if(repeat_times>EFUSE_REPEAT_THRESHOLD_){
+								bContinual = false;
+								bResult = false;
+							}
+							#endif
+						}
+						else{
+							efuse_addr = efuse_addr + (2*tmp_word_cnts) +1;
+							target_pkt.offset = offset;
+							target_pkt.word_en= target_pkt.word_en;					
+							#if (EFUSE_ERROE_HANDLE == 1)
+							WriteState=PG_STATE_HEADER;
+							#endif
+						}		
+					}				
+				}				
+				printk("EFUSE PG_STATE_HEADER-1\n");
+			}
+			else		
+			{
+				pg_header = ((target_pkt.offset << 4)&0xf0) |target_pkt.word_en;
+
+				efuse_OneByteWrite(dev,efuse_addr, pg_header);
+				efuse_OneByteRead(dev,efuse_addr, &tmp_header);		
+		
+				if(tmp_header == pg_header)
+				{ 
+					WriteState = PG_STATE_DATA;						
+				}				
+				#if (EFUSE_ERROE_HANDLE == 1)
+				else if(tmp_header == 0xFF){
+					WriteState = PG_STATE_HEADER;					
+					repeat_times++;
+					if(repeat_times>EFUSE_REPEAT_THRESHOLD_){
+						bContinual = false;
+						bResult = false;
+					}
+				}
+				#endif
+				else
+				{
+					tmp_pkt.offset = (tmp_header>>4) & 0x0F;
+					tmp_pkt.word_en=  tmp_header & 0x0F;					
+					tmp_word_cnts =  efuse_CalculateWordCnts(tmp_pkt.word_en);
+																											
+					memset(originaldata,0xff,sizeof(u8)*8);
+					
+					if(efuse_PgPacketRead( dev, tmp_pkt.offset,originaldata))
+					{	
+						badworden = efuse_WordEnableDataWrite(dev,efuse_addr+1,tmp_pkt.word_en,originaldata);	
+						if(0x0F != (badworden&0x0F))
+						{														
+							u8 reorg_offset = tmp_pkt.offset;
+							u8 reorg_worden=badworden;								
+							efuse_PgPacketWrite(dev,reorg_offset,reorg_worden,originaldata);	
+							efuse_addr = efuse_GetCurrentSize(dev);	 
+						}
+						else{
+							efuse_addr = efuse_addr + (tmp_word_cnts*2) +1; 
+						}
+					}
+					else
+					{
+						efuse_addr = efuse_addr + (tmp_word_cnts*2) +1; 
+					}
+
+					#if (EFUSE_ERROE_HANDLE == 1)
+					WriteState=PG_STATE_HEADER;	
+					repeat_times++;
+					if(repeat_times>EFUSE_REPEAT_THRESHOLD_){
+						bContinual = false;
+						bResult = false;
+					}
+					#endif
+					
+					printk("EFUSE PG_STATE_HEADER-2\n");
+				}
+
+			}
+
+		}
+		else if(WriteState==PG_STATE_DATA) 
+		{	
+			printk("EFUSE PG_STATE_DATA\n");
+			badworden = 0x0f;
+			badworden = efuse_WordEnableDataWrite(dev,efuse_addr+1,target_pkt.word_en,target_pkt.data);	
+			if((badworden&0x0F)==0x0F)
+			{ 
+				bContinual = false;
+			}
+			else
+			{
+				efuse_addr = efuse_addr + (2*target_word_cnts) +1;
+										
+				target_pkt.offset = offset;
+				target_pkt.word_en= badworden;		
+				target_word_cnts =  efuse_CalculateWordCnts(target_pkt.word_en); 
+				#if (EFUSE_ERROE_HANDLE == 1)
+				WriteState=PG_STATE_HEADER;	
+				repeat_times++;
+				if(repeat_times>EFUSE_REPEAT_THRESHOLD_){
+					bContinual = false;
+					bResult = false;
+				}
+				#endif
+				printk("EFUSE PG_STATE_HEADER-3\n");
+			}
+		}
+	}
+
+	
+	return true;
+}	
+
+
+static	void
+efuse_WordEnableDataRead(	u8 word_en,u8 *sourdata,u8 *targetdata)
+{	
+
+
+
+	if (!(word_en&BIT0))
+	{
+		targetdata[0] = sourdata[0];
+		targetdata[1] = sourdata[1];
+	}
+	if (!(word_en&BIT1))
+	{
+		targetdata[2] = sourdata[2];
+		targetdata[3] = sourdata[3];
+	}
+	if (!(word_en&BIT2))
+	{
+		targetdata[4] = sourdata[4];
+		targetdata[5] = sourdata[5];
+	}
+	if (!(word_en&BIT3))
+	{
+		targetdata[6] = sourdata[6];
+		targetdata[7] = sourdata[7];
+	}
+}	
+
+
+static	u8
+efuse_WordEnableDataWrite(	struct net_device*	dev,	u16 efuse_addr, u8 word_en, u8 *data)
+{		
+	u16 tmpaddr = 0;
+	u16 start_addr = efuse_addr;
+	u8 badworden = 0x0F;
+	u8 tmpdata[8]; 
+	
+	memset(tmpdata,0xff,PGPKT_DATA_SIZE);
+	
+
+
+	if(!(word_en&BIT0))
+	{
+		tmpaddr = start_addr;
+		efuse_OneByteWrite(dev,start_addr++, data[0]);
+		efuse_OneByteWrite(dev,start_addr++, data[1]);
+
+		efuse_OneByteRead(dev,tmpaddr, &tmpdata[0]);
+		efuse_OneByteRead(dev,tmpaddr+1, &tmpdata[1]);
+		if((data[0]!=tmpdata[0])||(data[1]!=tmpdata[1])){
+			badworden &= (~BIT0);
+		}
+	}
+	if(!(word_en&BIT1))
+	{
+		tmpaddr = start_addr;
+		efuse_OneByteWrite(dev,start_addr++, data[2]);
+		efuse_OneByteWrite(dev,start_addr++, data[3]);
+				
+		efuse_OneByteRead(dev,tmpaddr    , &tmpdata[2]);
+		efuse_OneByteRead(dev,tmpaddr+1, &tmpdata[3]);
+		if((data[2]!=tmpdata[2])||(data[3]!=tmpdata[3])){
+			badworden &=( ~BIT1);
+		}
+	}
+	if(!(word_en&BIT2))
+	{
+		tmpaddr = start_addr;
+		efuse_OneByteWrite(dev,start_addr++, data[4]);
+		efuse_OneByteWrite(dev,start_addr++, data[5]);
+
+		efuse_OneByteRead(dev,tmpaddr, &tmpdata[4]);							
+		efuse_OneByteRead(dev,tmpaddr+1, &tmpdata[5]);
+		if((data[4]!=tmpdata[4])||(data[5]!=tmpdata[5])){
+			badworden &=( ~BIT2);
+		}
+	}
+	if(!(word_en&BIT3))
+	{
+		tmpaddr = start_addr;
+		efuse_OneByteWrite(dev,start_addr++, data[6]);
+		efuse_OneByteWrite(dev,start_addr++, data[7]);
+
+		efuse_OneByteRead(dev,tmpaddr, &tmpdata[6]);
+		efuse_OneByteRead(dev,tmpaddr+1, &tmpdata[7]);
+		if((data[6]!=tmpdata[6])||(data[7]!=tmpdata[7])){
+			badworden &=( ~BIT3);
+		}
+	}
+	return badworden;
+}	
+
+
+static	void
+efuse_PowerSwitch(struct net_device* dev, u8 PwrState)
+{
+	u8	tempval;
+	if (PwrState == true)
+	{
+		tempval = read_nic_byte(dev, EFUSE_TEST+3);
+		write_nic_byte(dev, EFUSE_TEST+3, (tempval | 0x80));
+
+		write_nic_byte(dev, EFUSE_CLK, 0x03);
+	}
+	else
+	{
+		tempval = read_nic_byte(dev, EFUSE_TEST+3);
+		write_nic_byte(dev, EFUSE_TEST+3, (tempval & 0x7F));
+
+		write_nic_byte(dev, EFUSE_CLK, 0x02);
+	}	
+	
+}	/* efuse_PowerSwitch */
+
+
+static	u16
+efuse_GetCurrentSize(struct net_device*	dev)
+{
+	bool bContinual = true;
+
+	u16 efuse_addr = 0;
+	u8 hoffset=0,hworden=0;	
+	u8 efuse_data,word_cnts=0;
+		
+	
+	while (	bContinual && 
+			efuse_OneByteRead(dev, efuse_addr ,&efuse_data) && 
+			(efuse_addr  < EFUSE_MAX_SIZE) )
+	{			
+		if(efuse_data!=0xFF)
+		{					
+			hoffset = (efuse_data>>4) & 0x0F;
+			hworden =  efuse_data & 0x0F;									
+			word_cnts = efuse_CalculateWordCnts(hworden);
+			efuse_addr = efuse_addr + (word_cnts*2)+1;						
+		}
+		else
+		{
+			bContinual = false ;			
+		}
+	}
+
+	
+	return efuse_addr;
+	
+}	
+
+
+static u8
+efuse_CalculateWordCnts(u8	word_en)
+{
+	u8 word_cnts = 0;
+	if(!(word_en & BIT0))	word_cnts++; 
+	if(!(word_en & BIT1))	word_cnts++;
+	if(!(word_en & BIT2))	word_cnts++;
+	if(!(word_en & BIT3))	word_cnts++;
+	return word_cnts;
+}	
+
+
+#if 0
+static void efuse_ResetLoader(struct net_device* dev)
+{
+	u16	tmpU2b;
+
+	tmpU2b = read_nic_word(dev, SYS_FUNC_EN);
+	write_nic_word(dev, SYS_FUNC_EN, (tmpU2b&~(BIT12)));
+	mdelay(10);
+	write_nic_word(dev, SYS_FUNC_EN, (tmpU2b|BIT12));
+	mdelay(10);
+	
+}	
+#endif
+
+ #ifdef TO_DO_LIST
+extern	bool	
+EFUSE_ProgramMap(struct net_device* dev, char* pFileName,u8	TableType)		
+{
+	struct r8192_priv 	*priv = rtllib_priv(dev);
+	s4Byte			nLinesRead, ithLine;
+	RT_STATUS		rtStatus = RT_STATUS_SUCCESS;
+	char* 			szLine;
+	u32			u4bRegValue, u4RegMask;
+	u32			u4bMove;
+	u16			index = 0;
+	u16			i;
+	u8			eeprom[HWSET_MAX_SIZE_92S];	
+	
+	rtStatus = PlatformReadFile(
+					dev, 
+					pFileName,
+					(u8*)(priv->BufOfLines),
+					MAX_LINES_HWCONFIG_TXT,
+					MAX_BYTES_LINE_HWCONFIG_TXT,
+					&nLinesRead
+					);
+
+	if(rtStatus == RT_STATUS_SUCCESS)
+	{	
+		memcp(pHalData->BufOfLines3, pHalData->BufOfLines,
+			nLinesRead*MAX_BYTES_LINE_HWCONFIG_TXT);
+		pHalData->nLinesRead3 = nLinesRead;
+	}
+
+	if(rtStatus == RT_STATUS_SUCCESS)
+	{		
+		printk("szEepromFile(): read %s ok\n", pFileName);
+		for(ithLine = 0; ithLine < nLinesRead; ithLine++)
+		{
+			szLine = pHalData->BufOfLines[ithLine];
+			printk("Line-%d String =%s\n", ithLine, szLine);
+			
+			if(!IsCommentString(szLine))
+			{
+				for (i = 0; i < 8; i++)
+				{
+					u32	j;
+
+					efuse_ParsingMap(szLine, &u4bRegValue, &u4bMove);
+
+					szLine += u4bMove;
+					eeprom[index++] = (u8)(u4bRegValue&0xff);
+					eeprom[index++] = (u8)((u4bRegValue>>8)&0xff);
+					
+					printk("Addr-%d = %x\n", (ithLine*8+i), u4bRegValue);
+				}
+			}
+			
+		}
+	
+	}
+	else
+	{
+		printk("szEepromFile(): Fail read%s\n", pFileName);
+		return	RT_STATUS_FAILURE;
+	}
+
+
+
+	if (TableType == 1)
+	{
+		efuse_WriteAllMap(dev, eeprom, HWSET_MAX_SIZE_92S);
+	}
+	else
+	{
+		for (i = 0; i < HWSET_MAX_SIZE_92S; i++)
+			EFUSE_ShadowWrite(dev, 1, i, (u32)eeprom[i]);
+	}
+	
+	return	rtStatus;
+}	/* EFUSE_ProgramMap */
+
+#endif
+
+bool IsHexDigit(	char chTmp)
+{
+	if( (chTmp >= '0' && chTmp <= '9') ||  
+		(chTmp >= 'a' && chTmp <= 'f') ||
+		(chTmp >= 'A' && chTmp <= 'F') )
+	{
+		return true;
+	}
+	else
+	{
+		return false;
+	}
+}
+
+u32 MapCharToHexDigit(char chTmp)
+{
+	if(chTmp >= '0' && chTmp <= '9')
+		return (chTmp - '0');
+	else if(chTmp >= 'a' && chTmp <= 'f')
+		return (10 + (chTmp - 'a'));
+	else if(chTmp >= 'A' && chTmp <= 'F') 
+		return (10 + (chTmp - 'A'));
+	else
+		return 0;	
+}
+
+#ifdef TO_DO_LIST
+static	bool	
+efuse_ParsingMap(char* szStr,u32* pu4bVal,u32* pu4bMove)
+{
+	char* 		szScan = szStr;
+
+	if(szStr == NULL || pu4bVal == NULL || pu4bMove == NULL)
+	{
+		return false;
+	}
+
+	*pu4bMove = 0;
+	*pu4bVal = 0;
+
+	while(	*szScan != '\0' && 
+			(*szScan == ' ' || *szScan == '\t') )
+	{
+		szScan++;
+		(*pu4bMove)++;
+	}
+
+	if(!IsHexDigit(*szScan))
+	{
+		return false;
+	}
+
+	do
+	{
+		(*pu4bVal) <<= 4;
+		*pu4bVal += MapCharToHexDigit(*szScan);
+
+		szScan++;
+		(*pu4bMove)++;
+	} while(IsHexDigit(*szScan));
+
+	return true;
+	
+}	/* efuse_ParsingMap */
+#endif
+
+int efuse_one_byte_rw(struct net_device* dev, u8 bRead, u16 addr, u8 *data)
+{
+	u32 bResult;
+	u8 tmpidx = 0;
+	u8 tmpv8=0;
+	
+
+	write_nic_byte(dev, EFUSE_CTRL+1, (u8)(addr&0xff));		
+	tmpv8 = ((u8)((addr>>8) &0x03) ) | (read_nic_byte(dev, EFUSE_CTRL+2)&0xFC );	
+	write_nic_byte(dev, EFUSE_CTRL+2, tmpv8);
+
+	if(true==bRead){
+		
+		write_nic_byte(dev, EFUSE_CTRL+3,  0x72);
+
+		while(!(0x80 & read_nic_byte(dev, EFUSE_CTRL+3)) && (tmpidx<100) ){
+			tmpidx++;
+		}
+		if(tmpidx<100){			
+			*data=read_nic_byte(dev, EFUSE_CTRL);
+			bResult = true;
+		}
+		else
+		{
+			*data = 0;
+			bResult = false;
+		}
+		
+	}
+	else{
+		write_nic_byte(dev, EFUSE_CTRL, *data);
+		
+		write_nic_byte(dev, EFUSE_CTRL+3, 0xF2);
+		
+		while((0x80 & read_nic_byte(dev, EFUSE_CTRL+3)) && (tmpidx<100) ){
+			tmpidx++;
+		}
+		if(tmpidx<100)
+		{			
+			*data=read_nic_byte(dev, EFUSE_CTRL);
+			bResult = true;
+		}
+		else
+		{
+			*data = 0;
+			bResult = false;
+		}
+		
+	}
+	return bResult;	
+}
+void efuse_access(struct net_device* dev, u8 bRead,u16 start_addr, u8 cnts, u8 *data)
+{
+	u8	efuse_clk_ori,efuse_clk_new;
+	u32 i = 0;
+
+	if(start_addr>0x200) return;
+	efuse_clk_ori = read_nic_byte(dev,SYS_FUNC_EN+1);
+	efuse_clk_new = efuse_clk_ori|0x20;
+	
+	if(efuse_clk_new!= efuse_clk_ori){
+		write_nic_byte(dev, SYS_FUNC_EN+1, efuse_clk_new);
+	}
+#ifdef _POWERON_DELAY_
+	mdelay(10);
+#endif	
+	write_nic_byte(dev, EFUSE_TEST+3, (read_nic_byte(dev, EFUSE_TEST+3)|0x80));
+	write_nic_byte(dev, EFUSE_CLK_CTRL, (read_nic_byte(dev, EFUSE_CLK_CTRL)|0x03));
+	
+#ifdef _PRE_EXECUTE_READ_CMD_
+	{
+		unsigned char tmpdata;
+		efuse_OneByteRead(dev, 0,&tmpdata);
+	}		
+#endif	
+	
+	for(i=0;i<cnts;i++){		
+		efuse_one_byte_rw(dev,bRead, start_addr+i , data+i);		
+	}
+	write_nic_byte(dev, EFUSE_TEST+3, read_nic_byte(dev, EFUSE_TEST+3)&0x7f);
+	write_nic_byte(dev, EFUSE_CLK_CTRL, read_nic_byte(dev, EFUSE_CLK_CTRL)&0xfd);
+			
+	if(efuse_clk_new != efuse_clk_ori)	write_nic_byte(dev, 0x10250003, efuse_clk_ori);
+	
+}
+
+#ifdef TO_DO_LIST
+static	void efuse_reg_ctrl(struct net_device* dev, u8 bPowerOn)
+{		
+	if(true==bPowerOn){
+		write_nic_byte(dev, SYS_FUNC_EN+1,  read_nic_byte(dev,SYS_FUNC_EN+1)|0x20);
+#ifdef _POWERON_DELAY_	
+		mdelay(10);	
+#endif
+		write_nic_byte(dev, EFUSE_TEST+4, (read_nic_byte(dev, EFUSE_TEST+4)|0x80));
+		write_nic_byte(dev, EFUSE_CLK_CTRL, (read_nic_byte(dev, EFUSE_CLK_CTRL)|0x03));
+#ifdef _PRE_EXECUTE_READ_CMD_
+		{
+			unsigned char tmpdata;
+			efuse_OneByteRead(dev, 0,&tmpdata);
+		}
+		
+#endif
+	}
+	else{
+		write_nic_byte(dev, EFUSE_TEST+4, read_nic_byte(dev, EFUSE_TEST+4)&0x7f);
+		write_nic_byte(dev, EFUSE_CLK_CTRL, read_nic_byte(dev, EFUSE_CLK_CTRL)&0xfd);
+
+	}
+
+	
+}
+#endif
+
+void efuse_read_data(struct net_device* dev,u8 efuse_read_item,u8 *data,u32 data_size)
+{
+	u8 offset, word_start,byte_start,byte_cnts;
+	u8	efusedata[EFUSE_REAL_CONTENT_LEN];
+	u8 *tmpdata = NULL;
+
+	u8 pg_pkt_cnts ;
+	
+	u8 tmpidx;
+	u8 pg_data[8];
+
+	if(efuse_read_item>  (sizeof(RTL8712_SDIO_EFUSE_TABLE)/sizeof(EFUSE_MAP))){
+		return ;
+	}
+		
+	offset		= RTL8712_SDIO_EFUSE_TABLE[efuse_read_item].offset ;
+	word_start	= RTL8712_SDIO_EFUSE_TABLE[efuse_read_item].word_start;
+	byte_start 	= RTL8712_SDIO_EFUSE_TABLE[efuse_read_item].byte_start;
+	byte_cnts   	= RTL8712_SDIO_EFUSE_TABLE[efuse_read_item].byte_cnts;
+
+	if(data_size!=byte_cnts){
+		return;		
+	}
+	
+	pg_pkt_cnts = (byte_cnts /PGPKT_DATA_SIZE) +1;		
+	
+	if(pg_pkt_cnts > 1){
+		tmpdata = efusedata;
+
+		if(tmpdata!=NULL)
+		{
+			memset(tmpdata,0xff,pg_pkt_cnts*PGPKT_DATA_SIZE);	
+						
+			for(tmpidx=0;tmpidx<pg_pkt_cnts;tmpidx++)
+			{				
+				memset(pg_data,0xff,PGPKT_DATA_SIZE);
+				if(true== efuse_PgPacketRead(dev,offset+tmpidx,pg_data))
+				{	
+					memcpy(tmpdata+(PGPKT_DATA_SIZE*tmpidx),pg_data,PGPKT_DATA_SIZE);
+				}
+			}
+			memcpy(data,(tmpdata+ (2*word_start)+byte_start ),data_size);					
+		}		
+	}
+	else
+	{
+		memset(pg_data,0xff,PGPKT_DATA_SIZE);
+		if(true==efuse_PgPacketRead(dev,offset,pg_data)){	
+			memcpy(data,pg_data+ (2*word_start)+byte_start ,data_size);
+		}
+	}	
+	
+}
+void efuse_write_data(struct net_device* dev,u8 efuse_write_item,u8 *data,u32 data_size,u32 bWordUnit)
+{
+	u8 offset, word_start,byte_start,byte_cnts;	
+	u8 word_en = 0x0f,word_cnts;
+	u8 pg_pkt_cnts ;
+	
+	u8 tmpidx,tmpbitmask;
+	u8 pg_data[8],tmpbytes=0;
+
+	if(efuse_write_item>  (sizeof(RTL8712_SDIO_EFUSE_TABLE)/sizeof(EFUSE_MAP))){
+		return ;
+	}
+	
+	offset		= RTL8712_SDIO_EFUSE_TABLE[efuse_write_item].offset ;
+	word_start	= RTL8712_SDIO_EFUSE_TABLE[efuse_write_item].word_start;
+	byte_start 	= RTL8712_SDIO_EFUSE_TABLE[efuse_write_item].byte_start;
+	byte_cnts   	= RTL8712_SDIO_EFUSE_TABLE[efuse_write_item].byte_cnts;
+	
+	if(data_size >  byte_cnts){
+		return;		
+	}
+	pg_pkt_cnts = (byte_cnts /PGPKT_DATA_SIZE) +1;	
+	word_cnts = byte_cnts /2 ;
+
+	if(byte_cnts %2){
+		word_cnts+=1;
+	}		
+	if((byte_start==1)||((byte_cnts%2)==1)){
+
+		if((efuse_write_item==EFUSE_F0CIS)||(efuse_write_item==EFUSE_F1CIS)){
+			memset(pg_data,0xff,PGPKT_DATA_SIZE);
+			efuse_PgPacketRead(dev,offset,pg_data);		
+			
+			if(efuse_write_item==EFUSE_F0CIS){
+				word_en = 0x07;
+				memcpy(pg_data+word_start*2+byte_start,data,sizeof(u8)*2);
+				efuse_PgPacketWrite(dev,offset,word_en,pg_data+(word_start*2));	
+
+				word_en = 0x00;
+				efuse_PgPacketWrite(dev,(offset+1),word_en,data+2);
+
+				word_en = 0x00;
+				efuse_PgPacketRead(dev,offset+2,pg_data);
+				memcpy(pg_data,data+2+8,sizeof(u8)*7);
+				
+				efuse_PgPacketWrite(dev,(offset+2),word_en,pg_data);
+			}
+			else if(efuse_write_item==EFUSE_F1CIS){
+				word_en = 0x07;
+				efuse_PgPacketRead(dev,offset,pg_data);
+				pg_data[7] = data[0];
+				efuse_PgPacketWrite(dev,offset,word_en,pg_data+(word_start*2));	
+				
+				word_en = 0x00;
+				for(tmpidx = 0 ;tmpidx<(word_cnts/4);tmpidx++){
+					efuse_PgPacketWrite(dev,(offset+1+tmpidx),word_en,data+1+(tmpidx*PGPKT_DATA_SIZE));
+				}				
+			}
+			
+		}
+		else{			
+			memset(pg_data,0xff,PGPKT_DATA_SIZE);
+			if((efuse_write_item==EFUSE_SDIO_SETTING)||(efuse_write_item==EFUSE_CCCR)){
+				word_en = 0x0e ;
+				tmpbytes = 2;
+			}
+			else if(efuse_write_item == EFUSE_SDIO_MODE){
+				word_en = 0x0d ;
+				tmpbytes = 2;
+			}
+			else if(efuse_write_item == EFUSE_OCR){
+				word_en = 0x09 ;
+				tmpbytes = 4;
+			}
+			else if((efuse_write_item == EFUSE_EEPROM_VER)||(efuse_write_item==EFUSE_CHAN_PLAN)){
+				word_en = 0x07 ;
+				tmpbytes = 2;
+			}
+			if(bWordUnit==true){
+				memcpy(pg_data+word_start*2 ,data,sizeof(u8)*tmpbytes);
+			}
+			else{																
+				efuse_PgPacketRead(dev,offset,pg_data);
+				memcpy(pg_data+(2*word_start)+byte_start,data,sizeof(u8)*byte_cnts);			
+			}
+					
+			efuse_PgPacketWrite(dev,offset,word_en,pg_data+(word_start*2));	
+			
+		}		
+		
+	}
+	else if(pg_pkt_cnts>1){
+		if(word_start==0){
+			word_en = 0x00;
+			for(tmpidx = 0 ;tmpidx<(word_cnts/4);tmpidx++)
+			{
+				efuse_PgPacketWrite(dev,(offset+tmpidx),word_en,data+(tmpidx*PGPKT_DATA_SIZE));
+			}
+			word_en = 0x0f;
+			for(tmpidx= 0; tmpidx<(word_cnts%4) ; tmpidx++)
+			{
+				tmpbitmask =tmpidx;
+				word_en &= (~(EFUSE_BIT(tmpbitmask)));
+			}		
+			efuse_PgPacketWrite(dev,offset+(word_cnts/4),word_en,data+((word_cnts/4)*PGPKT_DATA_SIZE));
+		}else
+		{
+
+		}
+	}
+	else{
+		word_en = 0x0f;
+		for(tmpidx= 0; tmpidx<word_cnts ; tmpidx++)
+		{			
+			tmpbitmask = word_start + tmpidx ;
+			word_en &= (~(EFUSE_BIT(tmpbitmask)));
+		}
+		efuse_PgPacketWrite(dev,offset,word_en,data);
+	}
+		
+}
+
+void efuset_test_func_read(struct net_device* dev)
+{
+	u8 chipid[2];
+	u8 ocr[3];
+	u8 macaddr[6];	
+	u8 txpowertable[28];
+	
+	memset(chipid,0,sizeof(u8)*2);	
+	efuse_read_data(dev,EFUSE_CHIP_ID,chipid,sizeof(chipid));
+	
+	memset(ocr,0,sizeof(u8)*3);	
+	efuse_read_data(dev,EFUSE_CCCR,ocr,sizeof(ocr));
+
+	memset(macaddr,0,sizeof(u8)*6);
+	efuse_read_data(dev,EFUSE_MAC_ADDR,macaddr,sizeof(macaddr));
+	
+	memset(txpowertable,0,sizeof(u8)*28);
+	efuse_read_data(dev,EFUSE_TXPW_TAB,txpowertable,sizeof(txpowertable));
+}
+
+void efuset_test_func_write(struct net_device* dev)
+{
+	u32 bWordUnit = true;	
+	u8 CCCR=0x02,SDIO_SETTING = 0xFF;
+	u8 tmpdata[2];
+	
+	u8 macaddr[6] = {0x00,0xe0,0x4c,0x87,0x12,0x66};	
+	efuse_write_data(dev,EFUSE_MAC_ADDR,macaddr,sizeof(macaddr),bWordUnit);
+
+	bWordUnit = false;
+	efuse_write_data(dev,EFUSE_CCCR,&CCCR,sizeof(u8),bWordUnit);
+	
+	bWordUnit = false;
+	efuse_write_data(dev,EFUSE_SDIO_SETTING,&SDIO_SETTING,sizeof(u8),bWordUnit);
+
+	bWordUnit = true;	
+	tmpdata[0] =SDIO_SETTING ;
+	tmpdata[1] =CCCR ;
+	efuse_write_data(dev,EFUSE_SDIO_SETTING,tmpdata,sizeof(tmpdata),bWordUnit);
+	
+}
+#endif	
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl8192s/r8192S_hwimg74.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl8192s/r8192S_hwimg74.h
@@ -0,0 +1,60 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+#ifndef __INC_HAL8192SE_FW_IMG_H
+#define __INC_HAL8192SE_FW_IMG_H
+
+/*Created on  2009/11/17, 16:15*/
+
+#include <linux/types.h>
+#define ImgArrayLength 88592
+extern u8 Rtl8192SEFwImgArray[ImgArrayLength];
+#define MainArrayLength 1
+extern u8 Rtl8192SEFwMainArray[MainArrayLength];
+#define DataArrayLength 1
+extern u8 Rtl8192SEFwDataArray[DataArrayLength];
+#define PHY_REG_2T2RArrayLength 372
+extern u32 Rtl8192SEPHY_REG_2T2RArray[PHY_REG_2T2RArrayLength];
+#define PHY_REG_1T2RArrayLength 1
+extern u32 Rtl8192SEPHY_REG_1T2RArray[PHY_REG_1T2RArrayLength];
+#define PHY_ChangeTo_1T1RArrayLength 48
+extern u32 Rtl8192SEPHY_ChangeTo_1T1RArray[PHY_ChangeTo_1T1RArrayLength];
+#define PHY_ChangeTo_1T2RArrayLength 45
+extern u32 Rtl8192SEPHY_ChangeTo_1T2RArray[PHY_ChangeTo_1T2RArrayLength];
+#define PHY_ChangeTo_2T2RArrayLength 45
+extern u32 Rtl8192SEPHY_ChangeTo_2T2RArray[PHY_ChangeTo_2T2RArrayLength];
+#define PHY_REG_Array_PGLength 84
+extern u32 Rtl8192SEPHY_REG_Array_PG[PHY_REG_Array_PGLength];
+#define RadioA_1T_ArrayLength 202
+extern u32 Rtl8192SERadioA_1T_Array[RadioA_1T_ArrayLength];
+#define RadioB_ArrayLength 22
+extern u32 Rtl8192SERadioB_Array[RadioB_ArrayLength];
+#define RadioA_to1T_ArrayLength 196
+extern u32 Rtl8192SERadioA_to1T_Array[RadioA_to1T_ArrayLength];
+#define RadioA_to2T_ArrayLength 196
+extern u32 Rtl8192SERadioA_to2T_Array[RadioA_to2T_ArrayLength];
+#define RadioB_GM_ArrayLength 10
+extern u32 Rtl8192SERadioB_GM_Array[RadioB_GM_ArrayLength];
+#define MAC_2T_ArrayLength 106
+extern u32 Rtl8192SEMAC_2T_Array[MAC_2T_ArrayLength];
+#define MACPHY_Array_PGLength 1
+extern u32 Rtl8192SEMACPHY_Array_PG[MACPHY_Array_PGLength];
+#define AGCTAB_ArrayLength 320
+extern u32 Rtl8192SEAGCTAB_Array[AGCTAB_ArrayLength];
+
+#endif 
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl8192s/r8192S_hwimg492.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl8192s/r8192S_hwimg492.h
@@ -0,0 +1,60 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+#ifndef __INC_HAL8192SE_FW_IMG_H
+#define __INC_HAL8192SE_FW_IMG_H
+
+/*Created on  2009/ 7/23,  5: 4*/
+
+#include <linux/types.h>
+#define ImgArrayLength 75984
+extern u8 Rtl8192SEFwImgArray[ImgArrayLength];
+#define MainArrayLength 1
+extern u8 Rtl8192SEFwMainArray[MainArrayLength];
+#define DataArrayLength 1
+extern u8 Rtl8192SEFwDataArray[DataArrayLength];
+#define PHY_REG_2T2RArrayLength 372
+extern u32 Rtl8192SEPHY_REG_2T2RArray[PHY_REG_2T2RArrayLength];
+#define PHY_REG_1T2RArrayLength 1
+extern u32 Rtl8192SEPHY_REG_1T2RArray[PHY_REG_1T2RArrayLength];
+#define PHY_ChangeTo_1T1RArrayLength 48
+extern u32 Rtl8192SEPHY_ChangeTo_1T1RArray[PHY_ChangeTo_1T1RArrayLength];
+#define PHY_ChangeTo_1T2RArrayLength 45
+extern u32 Rtl8192SEPHY_ChangeTo_1T2RArray[PHY_ChangeTo_1T2RArrayLength];
+#define PHY_ChangeTo_2T2RArrayLength 45
+extern u32 Rtl8192SEPHY_ChangeTo_2T2RArray[PHY_ChangeTo_2T2RArrayLength];
+#define PHY_REG_Array_PGLength 84
+extern u32 Rtl8192SEPHY_REG_Array_PG[PHY_REG_Array_PGLength];
+#define RadioA_1T_ArrayLength 202
+extern u32 Rtl8192SERadioA_1T_Array[RadioA_1T_ArrayLength];
+#define RadioB_ArrayLength 22
+extern u32 Rtl8192SERadioB_Array[RadioB_ArrayLength];
+#define RadioA_to1T_ArrayLength 196
+extern u32 Rtl8192SERadioA_to1T_Array[RadioA_to1T_ArrayLength];
+#define RadioA_to2T_ArrayLength 196
+extern u32 Rtl8192SERadioA_to2T_Array[RadioA_to2T_ArrayLength];
+#define RadioB_GM_ArrayLength 10
+extern u32 Rtl8192SERadioB_GM_Array[RadioB_GM_ArrayLength];
+#define MAC_2T_ArrayLength 106
+extern u32 Rtl8192SEMAC_2T_Array[MAC_2T_ArrayLength];
+#define MACPHY_Array_PGLength 1
+extern u32 Rtl8192SEMACPHY_Array_PG[MACPHY_Array_PGLength];
+#define AGCTAB_ArrayLength 320
+extern u32 Rtl8192SEAGCTAB_Array[AGCTAB_ArrayLength];
+
+#endif 
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl8192s/r8192S_Efuse.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl8192s/r8192S_Efuse.h
@@ -0,0 +1,98 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ * 
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ * 
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ * 
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ * 
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+
+#ifndef __INC_EFUSE_H
+#define __INC_EFUSE_H
+
+#define		EFUSE_FOR_92SU		1
+
+/*--------------------------Define Parameters-------------------------------*/
+#define		EFUSE_REAL_CONTENT_LEN			512
+#define		EFUSE_MAP_LEN				128
+#define		EFUSE_MAX_SECTION			16
+#define		EFUSE_MAX_WORD_UNIT			4
+#define 	       EFUSE_IC_ID_OFFSET			506 
+
+#define		EFUSE_INIT_MAP				0
+#define		EFUSE_MODIFY_MAP				1
+
+#define		EFUSE_CLK_CTRL			EFUSE_CTRL
+#define 	EFUSE_BIT(x)  (1 << (x))
+
+#define		PG_STATE_HEADER 	0x01
+#define		PG_STATE_WORD_0		0x02
+#define		PG_STATE_WORD_1		0x04
+#define		PG_STATE_WORD_2		0x08
+#define		PG_STATE_WORD_3		0x10
+#define		PG_STATE_DATA		0x20
+
+#define		PG_SWBYTE_H			0x01
+#define		PG_SWBYTE_L			0x02
+
+/*--------------------------Define Parameters-------------------------------*/
+
+
+/*------------------------------Define structure----------------------------*/ 
+
+/*------------------------------Define structure----------------------------*/ 
+
+
+/*------------------------Export global variable----------------------------*/
+/*------------------------Export global variable----------------------------*/
+
+/*------------------------Export Marco Definition---------------------------*/
+
+/*------------------------Export Marco Definition---------------------------*/
+
+
+/*--------------------------Exported Function prototype---------------------*/
+extern	void	
+EFUSE_Initialize(struct net_device* dev);
+extern	u8	
+EFUSE_Read1Byte(struct net_device* dev,u16 Address);
+extern	void	
+EFUSE_Write1Byte(struct net_device* dev,u16 Address,u8 Value);
+
+#ifdef EFUSE_FOR_92SU 
+extern 	void 
+ReadEFuse(struct net_device* dev,u16 _offset,u16 _size_byte,u8* pbuf);
+extern	void
+ReadEFuseByte(struct net_device* dev,u16  _offset,u8  *pbuf);
+#endif	
+
+extern	void
+EFUSE_ShadowRead(struct net_device* dev,unsigned char Type,unsigned short Offset,u32 *Value);
+extern	void
+EFUSE_ShadowWrite(struct net_device* dev,unsigned char Type,unsigned short Offset,u32 Value);
+extern	bool
+EFUSE_ShadowUpdate(struct net_device* dev);
+extern	bool
+EFUSE_ShadowUpdateChk(struct net_device* dev);
+extern	void 
+EFUSE_ShadowMapUpdate(struct net_device* dev);
+extern	void 
+EFUSE_RePgSection1(struct net_device* dev);
+
+extern	bool	
+EFUSE_ProgramMap(struct net_device* dev,char* pFileName, u8 TableType);		
+/*--------------------------Exported Function prototype---------------------*/
+
+/* End of Efuse.h */
+
+#endif 
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl8192s/r8192S_hw.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl8192s/r8192S_hw.h
@@ -0,0 +1,1070 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *			
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+#ifndef __INC_HAL8192SREG_H
+#define __INC_HAL8192SREG_H
+
+
+#if 0
+typedef enum _RT_RF_TYPE_DEF
+{
+	RF_1T2R = 0,
+	RF_2T4R,
+	RF_2T2R,
+	RF_1T1R,
+	RF_2T2R_GREEN,
+	RF_819X_MAX_TYPE
+}RT_RF_TYPE_DEF;
+#endif
+
+#define		SYS_ISO_CTRL			0x0000	
+#define		SYS_FUNC_EN			0x0002	
+#define		PMC_FSM				0x0004	
+#define		SYS_CLKR			0x0008	
+#define		EPROM_CMD			0x000A	
+#define		EE_VPD				0x000C	
+#define		AFE_MISC			0x0010	
+#define		SPS0_CTRL			0x0011	
+#define		SPS1_CTRL			0x0018	
+#define		RF_CTRL				0x001F	
+#define		LDOA15_CTRL			0x0020	
+#define		LDOV12D_CTRL			0x0021	
+#define		LDOHCI12_CTRL			0x0022	
+#define		LDO_USB_SDIO			0x0023	
+#define		LPLDO_CTRL			0x0024	
+#define		AFE_XTAL_CTRL			0x0026	
+#define		AFE_PLL_CTRL			0x0028	
+#define		EFUSE_CTRL			0x0030	
+#define		EFUSE_TEST			0x0034	
+#define		PWR_DATA			0x0038	
+#define		DBG_PORT			0x003A	
+#define		DPS_TIMER			0x003C	
+#define		RCLK_MON			0x003E	
+
+#define		CMDR				0x0040	
+#define		TXPAUSE				0x0042	
+#define		LBKMD_SEL			0x0043	
+#define		TCR				0x0044	
+#define		RCR				0x0048	
+#define		MSR				0x004C	
+#define		SYSF_CFG			0x004D	
+#define		RX_PKY_LIMIT			0x004E	
+#define		MBIDCTRL			0x004F	
+
+#define		MACIDR				0x0050	
+#define		MACIDR0				0x0050	
+#define		MACIDR4				0x0054	
+#define		BSSIDR				0x0058	
+#define		HWVID				0x005E	
+#define		MAR				0x0060	
+#define		MBIDCAMCONTENT			0x0068	
+#define		MBIDCAMCFG			0x0070	
+#define		BUILDTIME			0x0074	
+#define		BUILDUSER			0x0078	
+
+#define		IDR0				MACIDR0
+#define		IDR4				MACIDR4
+
+#define		TSFR				0x0080	
+#define		SLOT_TIME			0x0089	
+#define		USTIME				0x008A	
+#define		SIFS_CCK			0x008C	
+#define		SIFS_OFDM			0x008E	
+#define		PIFS_TIME			0x0090	
+#define		ACK_TIMEOUT			0x0091	
+#define		EIFSTR				0x0092	
+#define		BCN_INTERVAL			0x0094	
+#define		ATIMWND				0x0096	
+#define		BCN_DRV_EARLY_INT		0x0098	
+#define		BCN_DMATIME			0x009A	
+#define		BCN_ERR_THRESH			0x009C	
+#define		MLT				0x009D	
+#define		RSVD_MAC_TUNE_US		0x009E	
+
+#define 	RQPN				0x00A0
+#define		RQPN1				0x00A0	
+#define		RQPN2				0x00A1	
+#define		RQPN3				0x00A2	
+#define		RQPN4				0x00A3	
+#define		RQPN5				0x00A4	
+#define		RQPN6				0x00A5	
+#define		RQPN7				0x00A6	
+#define		RQPN8				0x00A7	
+#define		RQPN9				0x00A8	
+#define		RQPN10				0x00A9	
+#define		LD_RQPN				0x00AB  
+#define		RXFF_BNDY			0x00AC  
+#define		RXRPT_BNDY			0x00B0  
+#define		TXPKTBUF_PGBNDY			0x00B4  
+#define		PBP				0x00B5  
+#define		RXDRVINFO_SZ			0x00B6  
+#define		TXFF_STATUS			0x00B7  
+#define		RXFF_STATUS			0x00B8  
+#define		TXFF_EMPTY_TH			0x00B9  
+#define		SDIO_RX_BLKSZ			0x00BC  
+#define		RXDMA				0x00BD  
+#define		RXPKT_NUM			0x00BE  
+#define		C2HCMD_UDT_SIZE			0x00C0  
+#define		C2HCMD_UDT_ADDR			0x00C2  
+#define		FIFOPAGE1			0x00C4  
+#define		FIFOPAGE2			0x00C8  
+#define		FIFOPAGE3			0x00CC  
+#define		FIFOPAGE4			0x00D0  
+#define		FIFOPAGE5			0x00D4  
+#define		FW_RSVD_PG_CRTL			0x00D8  
+#define		RXDMA_AGG_PG_TH			0x00D9  
+#define		TXDESC_MSK 			0x00DC  
+#define		TXRPTFF_RDPTR			0x00E0  
+#define		TXRPTFF_WTPTR			0x00E4  
+#define		C2HFF_RDPTR			0x00E8	
+#define		C2HFF_WTPTR			0x00EC	
+#define		RXFF0_RDPTR			0x00F0	
+#define		RXFF0_WTPTR			0x00F4  
+#define		RXFF1_RDPTR			0x00F8  
+#define		RXFF1_WTPTR			0x00FC  
+#define		RXRPT0_RDPTR			0x0100  
+#define		RXRPT0_WTPTR			0x0104  
+#define		RXRPT1_RDPTR			0x0108  
+#define		RXRPT1_WTPTR			0x010C  
+#define		RX0_UDT_SIZE			0x0110  
+#define		RX1PKTNUM			0x0114  
+#define		RXFILTERMAP			0x0116  
+#define		RXFILTERMAP_GP1			0x0118  
+#define		RXFILTERMAP_GP2			0x011A  
+#define		RXFILTERMAP_GP3			0x011C  
+#define		BCNQ_CTRL			0x0120  
+#define		MGTQ_CTRL			0x0124  
+#define		HIQ_CTRL			0x0128  
+#define		VOTID7_CTRL			0x012c  
+#define		VOTID6_CTRL			0x0130  
+#define		VITID5_CTRL			0x0134  
+#define		VITID4_CTRL			0x0138  
+#define		BETID3_CTRL			0x013c  
+#define		BETID0_CTRL			0x0140  
+#define		BKTID2_CTRL			0x0144  
+#define		BKTID1_CTRL			0x0148  
+#define		CMDQ_CTRL			0x014c  
+#define		TXPKT_NUM_CTRL			0x0150  
+#define		TXQ_PGADD			0x0152  
+#define		TXFF_PG_NUM			0x0154  
+#define		TRXDMA_STATUS			0x0156  
+
+#define		INIMCS_SEL			0x0160	
+#define		TX_RATE_REG			INIMCS_SEL 
+#define		INIRTSMCS_SEL			0x0180	
+#define		RRSR				0x0181	
+#define		ARFR0				0x0184	
+#define		ARFR1				0x0188	
+#define		ARFR2				0x018C  
+#define		ARFR3				0x0190  
+#define		ARFR4				0x0194  
+#define		ARFR5				0x0198  
+#define		ARFR6				0x019C  
+#define		ARFR7				0x01A0  
+#define		AGGLEN_LMT_H			0x01A7	
+#define		AGGLEN_LMT_L			0x01A8	
+#define		DARFRC				0x01B0	
+#define		RARFRC				0x01B8	
+#define		MCS_TXAGC			0x01C0
+#define		CCK_TXAGC			0x01C8
+
+#define		EDCAPARA_VO 			0x01D0	
+#define		EDCAPARA_VI			0x01D4	
+#define		EDCAPARA_BE			0x01D8	
+#define		EDCAPARA_BK			0x01DC	
+#define		BCNTCFG				0x01E0	
+#define		CWRR				0x01E2	
+#define		ACMAVG				0x01E4	
+#define		AcmHwCtrl			0x01E7	
+#define		VO_ADMTM			0x01E8	
+#define		VI_ADMTM			0x01EC
+#define		BE_ADMTM			0x01F0
+#define		RETRY_LIMIT			0x01F4	
+#define		SG_RATE				0x01F6	
+
+#define		NAV_CTRL			0x0200
+#define		BW_OPMODE			0x0203
+#define		BACAMCMD			0x0204
+#define		BACAMCONTENT			0x0208	
+
+#define		LBDLY				0x0210	
+#define		FWDLY				0x0211	
+#define		HWPC_RX_CTRL			0x0218	
+#define		MQIR				0x0220	
+#define		MAIR				0x0222	
+#define		MSIR				0x0224	
+#define		CLM_RESULT			0x0227	
+#define		NHM_RPI_CNT			0x0228	
+#define		RXERR_RPT			0x0230	
+#define		NAV_PROT_LEN			0x0234	
+#define		CFEND_TH			0x0236	
+#define		AMPDU_MIN_SPACE			0x0237	
+#define		TXOP_STALL_CTRL			0x0238
+
+#define		RWCAM				0x0240	
+#define		WCAMI				0x0244	
+#define		RCAMO				0x0248	
+#define		CAMDBG				0x024C
+#define		SECR				0x0250	
+
+#define		WOW_CTRL			0x0260	
+#define		PSSTATUS			0x0261	
+#define		PSSWITCH			0x0262	
+#define		MIMOPS_WAIT_PERIOD		0x0263
+#define		LPNAV_CTRL			0x0264
+#define		WFM0				0x0270	
+#define		WFM1				0x0280	
+#define		WFM2				0x0290  
+#define		WFM3				0x02A0  
+#define		WFM4				0x02B0  
+#define		WFM5				0x02C0  
+#define		WFCRC				0x02D0	
+#define		FW_RPT_REG			0x02c4
+
+#define		PSTIME				0x02E0  
+#define		TIMER0				0x02E4  
+#define		TIMER1				0x02E8  
+#define		GPIO_CTRL			0x02EC  
+#define		GPIO_IN				0x02EC	
+#define		GPIO_OUT			0x02ED	
+#define		GPIO_IO_SEL			0x02EE	
+#define		GPIO_MOD			0x02EF	
+#define		GPIO_INTCTRL			0x02F0  
+#define		MAC_PINMUX_CFG			0x02F1  
+#define		LEDCFG				0x02F2  
+#define		PHY_REG				0x02F3  
+#define		PHY_REG_DATA			0x02F4  
+#define		EFUSE_CLK			0x02F8  
+
+#define		INTA_MASK				0x0300	
+#define		ISR				0x0308	
+
+#define		DBG_PORT_SWITCH			0x003A
+#define		BIST				0x0310	
+#define		DBS				0x0314	
+#define		CPUINST				0x0318	
+#define		CPUCAUSE			0x031C	
+#define		LBUS_ERR_ADDR			0x0320	
+#define		LBUS_ERR_CMD			0x0324	
+#define		LBUS_ERR_DATA_L			0x0328	
+#define		LBUS_ERR_DATA_H			0x032C	
+#define		LX_EXCEPTION_ADDR		0x0330	
+#define		WDG_CTRL			0x0334	
+#define		INTMTU				0x0338	
+#define		INTM				0x033A	
+#define		FDLOCKTURN0			0x033C	
+#define		FDLOCKTURN1			0x033D	
+#define		TRXPKTBUF_DBG_DATA		0x0340	
+#define		TRXPKTBUF_DBG_CTRL		0x0348	
+#define		DPLL				0x034A	
+#define		CBUS_ERR_ADDR			0x0350	
+#define		CBUS_ERR_CMD			0x0354	
+#define		CBUS_ERR_DATA_L			0x0358	
+#define		CBUS_ERR_DATA_H 		0x035C	
+#define		USB_SIE_INTF_ADDR		0x0360	
+#define		USB_SIE_INTF_WD			0x0361	
+#define		USB_SIE_INTF_RD			0x0362	
+#define		USB_SIE_INTF_CTRL		0x0363	
+#define 		LBUS_MON_ADDR 		0x0364	
+#define 		LBUS_ADDR_MASK 		0x0368	
+
+
+#define		TPPoll				0x0500	
+#define		PM_CTRL				0x0502	
+#define		PCIF				0x0503	
+
+#define		THPDA				0x0514	
+#define		TMDA				0x0518	
+#define		TCDA				0x051C	
+#define		HDA				0x0520	
+#define		TVODA				0x0524	
+#define		TVIDA				0x0528	
+#define		TBEDA				0x052C	
+#define		TBKDA				0x0530	
+#define		TBDA				0x0534	
+#define		RCDA				0x0538	
+#define		RDQDA				0x053C	
+#define		DBI_WDATA			0x0540	
+#define		DBI_RDATA			0x0544	
+#define		DBI_CTRL			0x0548	
+#define		MDIO_DATA			0x0550	
+#define		MDIO_CTRL			0x0554	
+#define		PCI_RPWM			0x0561	
+#define		PCI_CPWM				0x0563	
+
+
+#define		PHY_CCA			0x803	
+
+
+#define	USB_RX_AGG_TIMEOUT			0xFE5B	
+
+#define	FW_OFFLOAD_EN				BIT7
+
+#define	MAX_MSS_DENSITY_2T 			0x13
+#define	MAX_MSS_DENSITY_1T 			0x0A
+
+#define	RXDMA_AGG_EN				BIT7
+
+#define	RXDMA_AGG_TIMEOUT_DISABLE		0x00
+#define	RXDMA_AGG_TIMEOUT_17MS  		0x01
+#define	RXDMA_AGG_TIMEOUT_17_2_MS  		0x02
+#define	RXDMA_AGG_TIMEOUT_17_4_MS  		0x04
+#define	RXDMA_AGG_TIMEOUT_17_10_MS  		0x0A
+
+#define	InvalidBBRFValue		0x12345678
+
+#define	USB_RPWM			0xFE58
+
+#ifdef RTL8192SE 
+#define	RPWM		PCI_RPWM
+#endif
+#ifdef RTL8192SU 
+#define	RPWM		USB_RPWM
+#endif
+
+#if 1	
+#define		AFR				0x010	
+#define		BCN_TCFG			0x062	
+#define		RATR0				0x320	
+#endif
+#define		UnusedRegister			0x0320		
+#define		PSR				UnusedRegister	
+#define		DCAM				UnusedRegister	
+#define		BBAddr				UnusedRegister	
+#define		PhyDataR			UnusedRegister	
+#define		UFWP				UnusedRegister
+
+
+
+#define		ISO_MD2PP			BIT0	
+#define		ISO_PA2PCIE			BIT3	
+#define		ISO_PLL2MD			BIT4	
+#define		ISO_PWC_DV2RP		BIT11	
+#define		ISO_PWC_RV2RP		BIT12	
+
+#define		FEN_MREGEN			BIT15	
+#define		FEN_DCORE			BIT11	
+#define		FEN_CPUEN			BIT10	
+
+#define		PAD_HWPD_IDN		BIT22	
+
+#define		SYS_CLKSEL_80M		BIT0	
+#define		SYS_PS_CLKSEL		BIT1	 
+#define		SYS_CPU_CLKSEL		BIT2	
+#define		SYS_MAC_CLK_EN		BIT11	
+#define		SYS_SWHW_SEL		BIT14	
+#define		SYS_FWHW_SEL		BIT15	
+
+
+#define		CmdEEPROM_En						BIT5	 
+#define		CmdEERPOMSEL						BIT4 
+#define		Cmd9346CR_9356SEL					BIT4
+#define		AutoLoadEEPROM					(CmdEEPROM_En|CmdEERPOMSEL)
+#define		AutoLoadEFUSE						CmdEEPROM_En
+#define EPROM_CMD_OPERATING_MODE_SHIFT 6
+#define EPROM_CMD_OPERATING_MODE_MASK ((1<<7)|(1<<6))
+#define EPROM_CMD_CONFIG 0x3
+#define EPROM_CMD_NORMAL 0 
+#define EPROM_CMD_LOAD 1
+#define EPROM_CMD_PROGRAM 2
+#define EPROM_CS_SHIFT 3
+#define EPROM_CK_SHIFT 2
+#define EPROM_W_SHIFT 1
+#define EPROM_R_SHIFT 0
+
+#define		AFE_MBEN			BIT1	
+#define		AFE_BGEN			BIT0	
+
+#define		SPS1_SWEN			BIT1	
+#define		SPS1_LDEN			BIT0	
+
+#define		RF_EN				BIT0 
+#define		RF_RSTB			BIT1 
+#define		RF_SDMRSTB			BIT2 
+
+#define		LDA15_EN			BIT0	
+
+#define		LDV12_EN			BIT0	
+#define		LDV12_SDBY			BIT1	
+
+#define		XTAL_GATE_AFE		BIT10	
+
+#define		APLL_EN				BIT0	
+
+#define		AFR_CardBEn			BIT0
+#define		AFR_CLKRUN_SEL		BIT1
+#define		AFR_FuncRegEn		BIT2
+
+#define		APSDOFF_STATUS		BIT15	
+#define		APSDOFF				BIT14   
+#define		BBRSTn				BIT13   
+#define		BB_GLB_RSTn			BIT12   
+#define		SCHEDULE_EN			BIT10   
+#define		MACRXEN				BIT9    
+#define		MACTXEN				BIT8    
+#define		DDMA_EN				BIT7    
+#define		FW2HW_EN			BIT6    
+#define		RXDMA_EN			BIT5    
+#define		TXDMA_EN			BIT4    
+#define		HCI_RXDMA_EN		BIT3    
+#define		HCI_TXDMA_EN		BIT2    
+
+#define		StopHCCA			BIT6
+#define		StopHigh			BIT5
+#define		StopMgt				BIT4
+#define		StopVO				BIT3
+#define		StopVI				BIT2
+#define		StopBE				BIT1
+#define		StopBK				BIT0
+
+#define		LBK_NORMAL		0x00
+#define		LBK_MAC_LB		(BIT0|BIT1|BIT3)
+#define		LBK_MAC_DLB		(BIT0|BIT1)
+#define		LBK_DMA_LB		(BIT0|BIT1|BIT2)	
+
+#define		TCP_OFDL_EN				BIT25	
+#define		HWPC_TX_EN				BIT24   
+#define		TXDMAPRE2FULL			BIT23   
+#define		DISCW					BIT20   
+#define		TCRICV					BIT19   
+#define		CfendForm				BIT17   
+#define		TCRCRC					BIT16   
+#define		FAKE_IMEM_EN			BIT15   
+#define		TSFRST					BIT9    
+#define		TSFEN					BIT8    
+#define		FWALLRDY				(BIT0|BIT1|BIT2|BIT3|BIT4|BIT5|BIT6|BIT7)
+#define		FWRDY					BIT7
+#define		BASECHG					BIT6
+#define		IMEM					BIT5
+#define		DMEM_CODE_DONE			BIT4
+#define		EXT_IMEM_CHK_RPT		BIT3
+#define		EXT_IMEM_CODE_DONE		BIT2
+#define		IMEM_CHK_RPT			BIT1
+#define		IMEM_CODE_DONE			BIT0
+#define		IMEM_CODE_DONE		BIT0	
+#define		IMEM_CHK_RPT		BIT1
+#define		EMEM_CODE_DONE		BIT2
+#define		EMEM_CHK_RPT		BIT3
+#define		DMEM_CODE_DONE		BIT4
+#define		IMEM_RDY			BIT5
+#define		BASECHG				BIT6
+#define		FWRDY				BIT7
+#define		LOAD_FW_READY	(IMEM_CODE_DONE|IMEM_CHK_RPT|EMEM_CODE_DONE|\
+								EMEM_CHK_RPT|DMEM_CODE_DONE|IMEM_RDY|BASECHG|\
+								FWRDY)
+#define		TCR_TSFEN			BIT8		
+#define		TCR_TSFRST			BIT9		
+#define		TCR_FAKE_IMEM_EN	BIT15
+#define		TCR_CRC				BIT16
+#define		TCR_ICV				BIT19	
+#define		TCR_DISCW			BIT20	
+#define		TCR_HWPC_TX_EN		BIT24
+#define		TCR_TCP_OFDL_EN		BIT25
+#define		TXDMA_INIT_VALUE	(IMEM_CHK_RPT|EXT_IMEM_CHK_RPT)
+
+#define		RCR_APPFCS			BIT31		
+#define		RCR_DIS_ENC_2BYTE	BIT30       
+#define		RCR_DIS_AES_2BYTE	BIT29       
+#define		RCR_HTC_LOC_CTRL	BIT28       
+#define		RCR_ENMBID			BIT27		
+#define		RCR_RX_TCPOFDL_EN	BIT26		
+#define		RCR_APP_PHYST_RXFF	BIT25       
+#define		RCR_APP_PHYST_STAFF	BIT24       
+#define		RCR_CBSSID			BIT23		
+#define		RCR_APWRMGT			BIT22		
+#define		RCR_ADD3			BIT21		
+#define		RCR_AMF				BIT20		
+#define		RCR_ACF				BIT19		
+#define		RCR_ADF				BIT18		
+#define		RCR_APP_MIC			BIT17		
+#define		RCR_APP_ICV			BIT16       
+#define		RCR_RXFTH			BIT13		
+#define		RCR_AICV			BIT12		
+#define		RCR_RXDESC_LK_EN	BIT11		
+#define		RCR_APP_BA_SSN		BIT6		
+#define		RCR_ACRC32			BIT5		
+#define		RCR_RXSHFT_EN		BIT4		
+#define		RCR_AB				BIT3		
+#define		RCR_AM				BIT2		
+#define		RCR_APM				BIT1		
+#define		RCR_AAP				BIT0		
+#define		RCR_MXDMA_OFFSET	8
+#define		RCR_FIFO_OFFSET		13
+
+/*
+Network Type
+00: No link
+01: Link in ad hoc network
+10: Link in infrastructure network
+11: AP mode
+Default: 00b.
+*/
+#define MSR_LINK_MASK      ((1<<0)|(1<<1))
+#define MSR_LINK_MANAGED   2
+#define MSR_LINK_NONE      0
+#define MSR_LINK_SHIFT     0
+#define MSR_LINK_ADHOC     1
+#define MSR_LINK_MASTER    3
+#if 1
+#define		MSR_NOLINK				0x00
+#define		MSR_ADHOC				0x01
+#define		MSR_INFRA				0x02
+#define		MSR_AP					0x03
+#endif
+#define		ENUART					BIT7
+#define		ENJTAG					BIT3
+#define		BTMODE					(BIT2|BIT1)
+#define		ENBT					BIT0
+
+#define		ENMBID					BIT7
+#define		BCNUM					(BIT6|BIT5|BIT4)
+
+
+#define		USTIME_EDCA				0xFF00
+#define		USTIME_TSF				0x00FF
+
+#define		SIFS_TRX				0xFF00
+#define		SIFS_CTX				0x00FF
+
+#define		ENSWBCN					BIT15
+#define		DRVERLY_TU				0x0FF0
+#define		DRVERLY_US				0x000F
+#define		BCN_TCFG_CW_SHIFT		8
+#define		BCN_TCFG_IFS			0	
+
+
+#define		RRSR_RSC_OFFSET			21
+#define		RRSR_SHORT_OFFSET		23
+#define		RRSR_RSC_BW_40M		0x600000
+#define		RRSR_RSC_UPSUBCHNL		0x400000
+#define		RRSR_RSC_LOWSUBCHNL		0x200000
+#define		RRSR_SHORT				0x800000
+#define		RRSR_1M					BIT0
+#define		RRSR_2M					BIT1 
+#define		RRSR_5_5M				BIT2 
+#define		RRSR_11M				BIT3 
+#define		RRSR_6M					BIT4 
+#define		RRSR_9M					BIT5 
+#define		RRSR_12M				BIT6 
+#define		RRSR_18M				BIT7 
+#define		RRSR_24M				BIT8 
+#define		RRSR_36M				BIT9 
+#define		RRSR_48M				BIT10 
+#define		RRSR_54M				BIT11
+#define		RRSR_MCS0				BIT12
+#define		RRSR_MCS1				BIT13
+#define		RRSR_MCS2				BIT14
+#define		RRSR_MCS3				BIT15
+#define		RRSR_MCS4				BIT16
+#define		RRSR_MCS5				BIT17
+#define		RRSR_MCS6				BIT18
+#define		RRSR_MCS7				BIT19
+#define		BRSR_AckShortPmb		BIT23	
+
+#define		RATR_1M					0x00000001
+#define		RATR_2M					0x00000002
+#define		RATR_55M				0x00000004
+#define		RATR_11M				0x00000008
+#define		RATR_6M					0x00000010
+#define		RATR_9M					0x00000020
+#define		RATR_12M				0x00000040
+#define		RATR_18M				0x00000080
+#define		RATR_24M				0x00000100
+#define		RATR_36M				0x00000200
+#define		RATR_48M				0x00000400
+#define		RATR_54M				0x00000800
+#define		RATR_MCS0				0x00001000
+#define		RATR_MCS1				0x00002000
+#define		RATR_MCS2				0x00004000
+#define		RATR_MCS3				0x00008000
+#define		RATR_MCS4				0x00010000
+#define		RATR_MCS5				0x00020000
+#define		RATR_MCS6				0x00040000
+#define		RATR_MCS7				0x00080000
+#define		RATR_MCS8				0x00100000
+#define		RATR_MCS9				0x00200000
+#define		RATR_MCS10				0x00400000
+#define		RATR_MCS11				0x00800000
+#define		RATR_MCS12				0x01000000
+#define		RATR_MCS13				0x02000000
+#define		RATR_MCS14				0x04000000
+#define		RATR_MCS15				0x08000000
+#define	RATE_ALL_CCK				RATR_1M|RATR_2M|RATR_55M|RATR_11M 
+#define	RATE_ALL_OFDM_AG			RATR_6M|RATR_9M|RATR_12M|RATR_18M|RATR_24M|\
+									RATR_36M|RATR_48M|RATR_54M	
+#define	RATE_ALL_OFDM_1SS			RATR_MCS0|RATR_MCS1|RATR_MCS2|RATR_MCS3 |\
+									RATR_MCS4|RATR_MCS5|RATR_MCS6	|RATR_MCS7	
+#define	RATE_ALL_OFDM_2SS			RATR_MCS8|RATR_MCS9	|RATR_MCS10|RATR_MCS11|\
+									RATR_MCS12|RATR_MCS13|RATR_MCS14|RATR_MCS15
+									
+#define		AC_PARAM_TXOP_LIMIT_OFFSET		16
+#define		AC_PARAM_ECW_MAX_OFFSET			12
+#define		AC_PARAM_ECW_MIN_OFFSET			8
+#define		AC_PARAM_AIFS_OFFSET			0
+
+#define		AcmHw_HwEn				BIT0
+#define		AcmHw_BeqEn				BIT1
+#define		AcmHw_ViqEn				BIT2
+#define		AcmHw_VoqEn				BIT3
+#define		AcmHw_BeqStatus			BIT4
+#define		AcmHw_ViqStatus			BIT5
+#define		AcmHw_VoqStatus			BIT6
+
+#define		RETRY_LIMIT_SHORT_SHIFT	8
+#define		RETRY_LIMIT_LONG_SHIFT	0
+
+#define		NAV_UPPER_EN			BIT16
+#define		NAV_UPPER				0xFF00
+#define		NAV_RTSRST				0xFF
+#define		BW_OPMODE_20MHZ			BIT2
+#define		BW_OPMODE_5G			BIT1
+#define		BW_OPMODE_11J			BIT0
+
+#define		RXERR_RPT_RST			BIT27 
+#define		RXERR_OFDM_PPDU			0
+#define		RXERR_OFDM_FALSE_ALARM	1
+#define		RXERR_OFDM_MPDU_OK		2
+#define		RXERR_OFDM_MPDU_FAIL	3
+#define		RXERR_CCK_PPDU			4
+#define		RXERR_CCK_FALSE_ALARM	5
+#define		RXERR_CCK_MPDU_OK		6
+#define		RXERR_CCK_MPDU_FAIL		7
+#define		RXERR_HT_PPDU			8
+#define		RXERR_HT_FALSE_ALARM	9
+#define		RXERR_HT_MPDU_TOTAL		10
+#define		RXERR_HT_MPDU_OK		11
+#define		RXERR_HT_MPDU_FAIL		12
+#define		RXERR_RX_FULL_DROP		15
+
+
+#define		CAM_CM_SecCAMPolling	BIT31		
+#define		CAM_CM_SecCAMClr		BIT30		
+#define		CAM_CM_SecCAMWE			BIT16		
+#define		CAM_ADDR				0xFF		
+
+#define		Dbg_CAM_TXSecCAMInfo	BIT31		
+#define		Dbg_CAM_SecKeyFound		BIT30		
+
+
+#define		SCR_TxUseDK				BIT0			
+#define		SCR_RxUseDK				BIT1			
+#define		SCR_TxEncEnable			BIT2			
+#define		SCR_RxDecEnable			BIT3			
+#define		SCR_SKByA2				BIT4			
+#define		SCR_NoSKMC				BIT5			
+#define		CAM_VALID				BIT15
+#define		CAM_NOTVALID			0x0000
+#define		CAM_USEDK				BIT5
+       	       		
+#define		CAM_NONE				0x0
+#define		CAM_WEP40				0x01
+#define		CAM_TKIP				0x02
+#define		CAM_AES					0x04
+#define		CAM_WEP104				0x05
+        		
+#define		TOTAL_CAM_ENTRY			32
+#define		HALF_CAM_ENTRY				16
+       		
+#define		CAM_CONFIG_USEDK		true
+#define		CAM_CONFIG_NO_USEDK		false
+       		
+#define		CAM_WRITE				BIT16
+#define		CAM_READ				0x00000000
+#define		CAM_POLLINIG			BIT31
+       		
+#define		SCR_UseDK				0x01
+#define		SCR_TxSecEnable		0x02
+#define		SCR_RxSecEnable		0x04
+
+#define		WOW_PMEN				BIT0 
+#define		WOW_WOMEN			BIT1 
+#define		WOW_MAGIC				BIT2 
+#define		WOW_UWF				BIT3 
+
+#define		GPIOMUX_EN			BIT3 
+#define		GPIOSEL_GPIO		0	
+#define		GPIOSEL_PHYDBG		1	
+#define		GPIOSEL_BT			2	
+#define		GPIOSEL_WLANDBG		3	
+#define		GPIOSEL_GPIO_MASK	~(BIT0|BIT1)
+
+#define		HST_RDBUSY				BIT0
+#define		CPU_WTBUSY			BIT1
+
+#define		IMR8190_DISABLED	0x0
+#define		IMR_CPUERR			BIT5		
+#define		IMR_ATIMEND			BIT4		
+#define		IMR_TBDOK			BIT3		
+#define		IMR_TBDER			BIT2		
+#define		IMR_BCNDMAINT8		BIT1		
+#define		IMR_BCNDMAINT7		BIT0		
+#define		IMR_BCNDMAINT6		BIT31		
+#define		IMR_BCNDMAINT5		BIT30		
+#define		IMR_BCNDMAINT4		BIT29		
+#define		IMR_BCNDMAINT3		BIT28		
+#define		IMR_BCNDMAINT2		BIT27		
+#define		IMR_BCNDMAINT1		BIT26		
+#define		IMR_BCNDOK8			BIT25		
+#define		IMR_BCNDOK7			BIT24		
+#define		IMR_BCNDOK6			BIT23		
+#define		IMR_BCNDOK5			BIT22		
+#define		IMR_BCNDOK4			BIT21		
+#define		IMR_BCNDOK3			BIT20		
+#define		IMR_BCNDOK2			BIT19		
+#define		IMR_BCNDOK1			BIT18		
+#define		IMR_TIMEOUT2		BIT17		
+#define		IMR_TIMEOUT1		BIT16		
+#define		IMR_TXFOVW			BIT15		
+#define		IMR_PSTIMEOUT		BIT14		
+#define		IMR_BcnInt			BIT13		
+#define		IMR_RXFOVW			BIT12		
+#define		IMR_RDU				BIT11		
+#define		IMR_RXCMDOK			BIT10		
+#define		IMR_BDOK			BIT9		
+#define		IMR_HIGHDOK			BIT8		
+#define		IMR_COMDOK			BIT7		
+#define		IMR_MGNTDOK			BIT6		
+#define		IMR_HCCADOK			BIT5		
+#define		IMR_BKDOK			BIT4		
+#define		IMR_BEDOK			BIT3		
+#define		IMR_VIDOK			BIT2		
+#define		IMR_VODOK			BIT1		
+#define		IMR_ROK				BIT0		
+
+
+#define		TPPoll_BKQ			BIT0			
+#define		TPPoll_BEQ			BIT1			
+#define		TPPoll_VIQ			BIT2			
+#define		TPPoll_VOQ			BIT3			
+#define		TPPoll_BQ			BIT4			
+#define		TPPoll_CQ			BIT5			
+#define		TPPoll_MQ			BIT6			
+#define		TPPoll_HQ			BIT7			
+#define		TPPoll_HCCAQ		BIT8			
+#define		TPPoll_StopBK		BIT9			
+#define		TPPoll_StopBE		BIT10			
+#define		TPPoll_StopVI		BIT11			
+#define		TPPoll_StopVO		BIT12			
+#define		TPPoll_StopMgt		BIT13			
+#define		TPPoll_StopHigh		BIT14			
+#define		TPPoll_StopHCCA		BIT15			
+#define		TPPoll_SHIFT		8				
+
+#define		MXDMA2_16bytes		0x000
+#define		MXDMA2_32bytes		0x001
+#define		MXDMA2_64bytes		0x010
+#define		MXDMA2_128bytes		0x011
+#define		MXDMA2_256bytes		0x100
+#define		MXDMA2_512bytes		0x101
+#define		MXDMA2_1024bytes	0x110
+#define		MXDMA2_NoLimit		0x7
+       		
+#define		MULRW_SHIFT			3
+#define		MXDMA2_RX_SHIFT		4
+#define		MXDMA2_TX_SHIFT		0
+
+#define		CCX_CMD_CLM_ENABLE				BIT0	
+#define		CCX_CMD_NHM_ENABLE				BIT1	
+#define		CCX_CMD_FUNCTION_ENABLE			BIT8	
+#define		CCX_CMD_IGNORE_CCA				BIT9	
+#define		CCX_CMD_IGNORE_TXON				BIT10	
+#define		CCX_CLM_RESULT_READY			BIT16	
+#define		CCX_NHM_RESULT_READY			BIT16	
+#define		CCX_CMD_RESET					0x0		
+
+
+#define		HWSET_MAX_SIZE_92S				128
+
+
+
+#ifdef RTL8192SE 
+#define 	RTL8190_EEPROM_ID		0x8129	
+#define 	EEPROM_HPON			0x02 
+#define 	EEPROM_CLK			0x06 
+#define 	EEPROM_TESTR			0x08 
+
+#define 	EEPROM_VID			0x0A 
+#define 	EEPROM_DID			0x0C 
+#define 	EEPROM_SVID			0x0E 
+#define 	EEPROM_SMID			0x10 
+
+#define 	EEPROM_MAC_ADDR			0x12 
+#define 	EEPROM_NODE_ADDRESS_BYTE_0	0x12 
+
+#define 	EEPROM_PwDiff			0x54 
+
+#define 	EEPROM_TxPowerBase			0x50 
+#define		EEPROM_TX_PWR_INDEX_RANGE	28		
+
+#define 	EEPROM_TX_PWR_HT20_DIFF		0x62
+#define 	DEFAULT_HT20_TXPWR_DIFF		2	
+#define 	EEPROM_TX_PWR_OFDM_DIFF		0x65
+
+#define	EEPROM_TxPWRGroup			0x67
+#define 	EEPROM_Regulatory				0x6D
+
+#define 	TX_PWR_SAFETY_CHK		0x6D
+#define 	EEPROM_TxPwIndex_CCK_24G	0x5D 
+#define 	EEPROM_TxPwIndex_OFDM_24G	0x6B 
+#define 	EEPROM_HT2T_CH1_A		0x6c 
+#define 	EEPROM_HT2T_CH7_A		0x6d 
+#define 	EEPROM_HT2T_CH13_A		0x6e 
+#define 	EEPROM_HT2T_CH1_B		0x6f 
+#define 	EEPROM_HT2T_CH7_B		0x70 
+#define 	EEPROM_HT2T_CH13_B		0x71 
+#define 	EEPROM_TSSI_A			0x74 
+#define 	EEPROM_TSSI_B			0x75 
+#define		EEPROM_RFInd_PowerDiff			0x76
+#define		EEPROM_Default_LegacyHTTxPowerDiff	0x3
+#define 	EEPROM_ThermalMeter			0x77 
+#define		EEPROM_BLUETOOTH_COEXIST		0x78 
+#define		EEPROM_BLUETOOTH_TYPE		0x4f 
+
+#define	EEPROM_Optional	0x78 
+#ifdef RTL8192S_WAPI_SUPPORT
+#define		EEPROM_WAPI_SUPPORT			0x78
+#endif
+#define		EEPROM_WoWLAN				0x78 
+
+#define 	EEPROM_CrystalCap			0x79 
+#define 	EEPROM_ChannelPlan			0x7B 
+#define 	EEPROM_Version				0x7C 
+#define		EEPROM_CustomID				0x7A
+#define 	EEPROM_BoardType			0x7E 
+
+#define		EEPROM_Default_TSSI			0x0
+#define 	EEPROM_Default_TxPowerDiff		0x0
+#define 	EEPROM_Default_CrystalCap		0x5
+#define 	EEPROM_Default_BoardType		0x02 
+#define 	EEPROM_Default_TxPower			0x1010
+#define		EEPROM_Default_HT2T_TxPwr		0x10
+
+#define		EEPROM_Default_LegacyHTTxPowerDiff	0x3
+#define		EEPROM_Default_ThermalMeter		0x12
+#define		EEPROM_Default_BlueToothCoexist		0x0
+#define		EEPROM_Default_BlueToothAntNum	0x0
+#define		EEPROM_Default_BlueToothAntIso		0x0
+#define		EEPROM_Default_BlueToothType		0x0
+#define		EEPROM_Default_AntTxPowerDiff		0x0
+#define		EEPROM_Default_TxPwDiff_CrystalCap	0x5
+#define		EEPROM_Default_TxPowerLevel		0x22
+
+#define		EEPROM_CHANNEL_PLAN_FCC			0x0
+#define		EEPROM_CHANNEL_PLAN_IC			0x1
+#define		EEPROM_CHANNEL_PLAN_ETSI		0x2
+#define		EEPROM_CHANNEL_PLAN_SPAIN		0x3
+#define		EEPROM_CHANNEL_PLAN_FRANCE		0x4
+#define		EEPROM_CHANNEL_PLAN_MKK			0x5
+#define		EEPROM_CHANNEL_PLAN_MKK1		0x6
+#define		EEPROM_CHANNEL_PLAN_ISRAEL		0x7
+#define		EEPROM_CHANNEL_PLAN_TELEC		0x8
+#define		EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN	0x9
+#define		EEPROM_CHANNEL_PLAN_WORLD_WIDE_13	0xA
+#define		EEPROM_CHANNEL_PLAN_NCC				0xB
+#define		EEPROM_CHANNEL_PLAN_BY_HW_MASK	0x80
+
+
+#define 	EEPROM_CID_DEFAULT		0x0
+#define 	EEPROM_CID_TOSHIBA		0x4
+#define	EEPROM_CID_CCX				0x10 
+#define	EEPROM_CID_QMI				0x0D
+#define 	EEPROM_CID_WHQL 			0xFE 
+
+#else 
+#define 	RTL8190_EEPROM_ID		0x8129
+#define 	EEPROM_HPON			0x02 
+#define 	EEPROM_VID			0x08 
+#define 	EEPROM_PID			0x0A 
+#define 	EEPROM_USB_OPTIONAL		0x0C 
+#define 	EEPROM_USB_PHY_PARA1		0x0D 
+#define 	EEPROM_NODE_ADDRESS_BYTE_0	0x12 
+#define 	EEPROM_Version			0x50	
+#define 	EEPROM_ChannelPlan		0x51 
+#define		EEPROM_CustomID			0x52
+#define 	EEPROM_SubCustomID		0x53 
+
+#if (EEPROM_OLD_FORMAT_SUPPORT ==1)
+#define 	EEPROM_PwDiff		0x54 
+#define 	EEPROM_ThermalMeter		0x55 
+#define 	EEPROM_Reserved			0x56 
+#define 	EEPROM_CrystalCap		0x57 
+#define 	EEPROM_TxPowerBase		0x58 
+#define 	EEPROM_TxPwIndex_CCK_24G	0x59 
+#define 	EEPROM_TxPwIndex_OFDM_24G	0x67 
+#define 	EEPROM_TSSI_A			0x75 
+#define 	EEPROM_TSSI_B			0x76 
+#define 	EEPROM_TxPwTkMode		0x77 
+#define 	EEPROM_HT2T_CH1_A		0x78 
+#define 	EEPROM_HT2T_CH7_A		0x79 
+#define 	EEPROM_HT2T_CH13_A		0x7a 
+#define 	EEPROM_HT2T_CH1_B		0x7b 
+#define 	EEPROM_HT2T_CH7_B		0x7c 
+#define 	EEPROM_HT2T_CH13_B		0x7d 
+#define 	EEPROM_BoardType		0x7e 
+#else
+#define 	EEPROM_BoardType			0x54 
+#define		EEPROM_TxPwIndex			0x55 
+#define 	EEPROM_PwDiff				0x67 
+#define 	EEPROM_ThermalMeter			0x68 
+#define 	EEPROM_CrystalCap			0x69 
+#define 	EEPROM_TxPowerBase			0x6a 
+#define 	EEPROM_TSSI_A				0x6b 
+#define 	EEPROM_TSSI_B				0x6c 
+#define 	EEPROM_TxPwTkMode			0x6d 
+
+#define 	EEPROM_TX_PWR_HT20_DIFF			0x6e
+#define 	DEFAULT_HT20_TXPWR_DIFF			2
+#define 	EEPROM_TX_PWR_OFDM_DIFF			0x71
+#define 	TX_PWR_SAFETY_CHK			0x79
+#endif
+#define		EEPROM_USB_Default_OPTIONAL_FUNC	0x8
+#define		EEPROM_USB_Default_PHY_PARAM		0x0
+#define		EEPROM_Default_TSSI			0x0
+#define		EEPROM_Default_TxPwrTkMode		0x0
+#define 	EEPROM_Default_TxPowerDiff		0x0
+#define 	EEPROM_Default_TxPowerBase		0x0
+#define 	EEPROM_Default_ThermalMeter		0x7
+#define 	EEPROM_Default_PwDiff			0x4
+#define 	EEPROM_Default_CrystalCap		0x5
+#define 	EEPROM_Default_TxPower			0x1010
+#define 	EEPROM_Default_BoardType		0x02 
+#define		EEPROM_Default_HT2T_TxPwr			0x10
+#define		EEPROM_USB_SN					BIT0
+#define		EEPROM_USB_REMOTE_WAKEUP	BIT1
+#define		EEPROM_USB_DEVICE_PWR		BIT2
+#define		EEPROM_EP_NUMBER				(BIT3|BIT4)
+
+
+#define		EEPROM_CHANNEL_PLAN_FCC				0x0
+#define		EEPROM_CHANNEL_PLAN_IC				0x1
+#define		EEPROM_CHANNEL_PLAN_ETSI			0x2
+#define		EEPROM_CHANNEL_PLAN_SPAIN			0x3
+#define		EEPROM_CHANNEL_PLAN_FRANCE			0x4
+#define		EEPROM_CHANNEL_PLAN_MKK				0x5
+#define		EEPROM_CHANNEL_PLAN_MKK1			0x6
+#define		EEPROM_CHANNEL_PLAN_ISRAEL			0x7
+#define		EEPROM_CHANNEL_PLAN_TELEC			0x8
+#define		EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN	0x9
+#define		EEPROM_CHANNEL_PLAN_WORLD_WIDE_13	0xA
+#define		EEPROM_CHANNEL_PLAN_BY_HW_MASK	0x80
+
+#define 	EEPROM_CID_DEFAULT				0x0
+#define 	EEPROM_CID_ALPHA				0x1
+#define 	EEPROM_CID_TOSHIBA				0x4
+#define 	EEPROM_CID_WHQL 				0xFE 
+#endif
+
+
+#define		FW_DIG_DISABLE				0xfd00cc00
+#define		FW_DIG_ENABLE					0xfd000000
+#define		FW_DIG_HALT					0xfd000001
+#define		FW_DIG_RESUME					0xfd000002
+#define		FW_HIGH_PWR_DISABLE			0xfd000008
+#define		FW_HIGH_PWR_ENABLE			0xfd000009
+#define		FW_ADD_A2_ENTRY				0xfd000016
+#define		FW_TXPWR_TRACK_ENABLE		0xfd000017
+#define		FW_TXPWR_TRACK_DISABLE		0xfd000018
+#define		FW_TXPWR_TRACK_THERMAL		0xfd000019
+#define		FW_TXANT_SWITCH_ENABLE		0xfd000023
+#define		FW_TXANT_SWITCH_DISABLE		0xfd000024
+#define		FW_RA_INIT						0xfd000026 
+#define		FW_CTRL_DM_BY_DRIVER			0Xfd00002a 
+#define		FW_RA_IOT_BG_COMB			0xfd000030 
+#define		FW_RA_IOT_N_COMB				0xfd000031 
+#define		FW_RA_REFRESH					0xfd0000a0
+#define		FW_RA_UPDATE_MASK				0xfd0000a2
+#define		FW_RA_DISABLE					0xfd0000a4 
+#define		FW_RA_ACTIVE					0xfd0000a6
+#define		FW_RA_DISABLE_RSSI_MASK		0xfd0000ac 
+#define		FW_RA_ENABLE_RSSI_MASK		0xfd0000ad 
+#define		FW_RA_RESET					0xfd0000af
+#define		FW_DM_DISABLE					0xfd00aa00
+#define		FW_IQK_ENABLE					0xf0000020
+#define		FW_IQK_SUCCESS				0x0000dddd
+#define		FW_IQK_FAIL					0x0000ffff
+#define		FW_OP_FAILURE					0xffffffff
+#define		FW_TX_FEEDBACK_NONE			0xfb000000					
+#define		FW_TX_FEEDBACK_DTM_ENABLE	(FW_TX_FEEDBACK_NONE | 0x1)	
+#define		FW_TX_FEEDBACK_CCX_ENABLE	(FW_TX_FEEDBACK_NONE | 0x2) 
+#define		FW_BB_RESET_ENABLE			0xff00000d
+#define		FW_BB_RESET_DISABLE			0xff00000e
+#define		FW_LPS_ENTER					0xfe000010
+#define		FW_LPS_LEAVE					0xfe000011
+#define		FW_INDIRECT_READ				0xf2000000
+#define		FW_INDIRECT_WRITE				0xf2000001
+#define		FW_CHAN_SET					0xf3000001 
+
+
+
+
+
+
+
+#define RFPC					0x5F			
+#define RCR_9356SEL			BIT6
+#define TCR_LRL_OFFSET		0
+#define TCR_SRL_OFFSET		8
+#define TCR_MXDMA_OFFSET	21
+#define TCR_SAT				BIT24		
+#define RCR_MXDMA_OFFSET	8
+#define RCR_FIFO_OFFSET		13
+#define RCR_OnlyErlPkt		BIT31				
+#define CWR					0xDC			
+#define RetryCTR				0xDE			
+
+
+#define		LED1Cfg				UnusedRegister	
+#define 	LED0Cfg				UnusedRegister	
+#define 	GPI					UnusedRegister	
+#define 	BRSR				UnusedRegister	
+#define 	CPU_GEN				UnusedRegister	
+#define 	SIFS				UnusedRegister	
+
+#define 	CPU_GEN_SYSTEM_RESET		0x00000001
+
+
+
+
+#define		CCX_COMMAND_REG			0x890	
+#define		CLM_PERIOD_REG			0x894	
+#define		NHM_PERIOD_REG			0x896	
+#define		NHM_THRESHOLD0			0x898	
+#define		NHM_THRESHOLD1			0x899	
+#define		NHM_THRESHOLD2			0x89A	
+#define		NHM_THRESHOLD3			0x89B	
+#define		NHM_THRESHOLD4			0x89C	
+#define		NHM_THRESHOLD5			0x89D	
+#define		NHM_THRESHOLD6			0x89E	
+#define		CLM_RESULT_REG			0x8D0	
+#define		NHM_RESULT_REG			0x8D4	
+#define		NHM_RPI_COUNTER0		0x8D8	
+#define		NHM_RPI_COUNTER1		0x8D9	
+#define		NHM_RPI_COUNTER2		0x8DA	      
+#define		NHM_RPI_COUNTER3		0x8DB	      
+#define		NHM_RPI_COUNTER4		0x8DC	      
+#define		NHM_RPI_COUNTER5		0x8DD	      
+#define		NHM_RPI_COUNTER6		0x8DE	      
+#define		NHM_RPI_COUNTER7		0x8DF	      
+
+
+#define		HAL_8192S_HW_GPIO_OFF_BIT	BIT3
+#define		HAL_8192S_HW_GPIO_OFF_MASK	0xF7
+#define		HAL_8192S_HW_GPIO_WPS_BIT	BIT4
+
+#endif 
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl8192s/Makefile
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl8192s/Makefile
@@ -0,0 +1,10 @@
+.PHONY:clean
+clean:
+	rm -fr *.mod.c *.mod *.o .*.cmd *.ko *~
+	rm -fr .tmp_versions
+	rm -fr Modules.symvers
+	rm -fr Module.symvers
+	rm -fr Module.markers
+	rm -fr modules.order
+	rm -fr tags
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl8192s/r8192S_dev.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl8192s/r8192S_dev.h
@@ -0,0 +1,65 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * Based on the r8180 driver, which is:
+ * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+#ifndef _RTL8192SE_H
+#define _RTL8192SE_H
+
+#include "r8192S_def.h"
+
+u8 rtl8192se_QueryIsShort(u8 TxHT, u8 TxRate, cb_desc *tcb_desc);
+bool rtl8192se_GetHalfNmodeSupportByAPs(struct net_device* dev);
+bool rtl8192se_GetNmodeSupportBySecCfg(struct net_device *dev);
+bool rtl8192se_HalTxCheckStuck(struct net_device *dev);
+bool rtl8192se_HalRxCheckStuck(struct net_device *dev);
+void rtl8192se_interrupt_recognized(struct net_device *dev, u32 *p_inta, u32 *p_intb);
+void rtl8192se_enable_rx(struct net_device *dev);
+void rtl8192se_enable_tx(struct net_device *dev);
+void rtl8192se_EnableInterrupt(struct net_device *dev);
+void rtl8192se_DisableInterrupt(struct net_device *dev);
+void rtl8192se_ClearInterrupt(struct net_device *dev);
+void rtl8192se_InitializeVariables(struct net_device  *dev);
+void rtl8192se_start_beacon(struct net_device *dev);
+u8 MRateToHwRate8192SE(struct net_device*dev, u8 rate);
+void rtl8192se_get_eeprom_size(struct net_device* dev);
+void MacConfigBeforeFwDownload(struct net_device *dev);
+bool rtl8192se_adapter_start(struct net_device* dev);
+void rtl8192se_link_change(struct net_device *dev);
+void rtl8192se_AllowAllDestAddr(struct net_device* dev, bool bAllowAllDA, bool WriteIntoReg);
+void rtl8192se_tx_fill_desc(struct net_device *dev, tx_desc *pDesc, cb_desc *cb_desc, struct sk_buff *skb);
+void rtl8192se_tx_fill_cmd_desc(struct net_device *dev, tx_desc_cmd *entry, cb_desc *cb_desc, 
+		struct sk_buff *skb);
+bool rtl8192se_rx_query_status_desc(struct net_device* dev, struct rtllib_rx_stats*  stats, 
+		rx_desc *pdesc, struct sk_buff* skb);
+void rtl8192se_halt_adapter(struct net_device *dev, bool bReset);
+void rtl8192se_update_ratr_table(struct net_device* dev,u8* pMcsRate,struct sta_info* pEntry);
+int r8192se_resume_firm(struct net_device *dev);
+void PHY_SetRtl8192seRfHalt(struct net_device* dev);
+void UpdateHalRAMask8192SE(struct net_device* dev, bool bMulticast, u8 macId, u8 MimoPs, u8 WirelessMode, u8 bCurTxBW40MHz,	u8 rssi_level);
+u8 HalSetSysClk8192SE(struct net_device *dev, u8 Data);
+bool	rtl8192se_RxCommandPacketHandle(struct net_device *dev, struct sk_buff* skb,rx_desc *pdesc);
+bool rtl8192se_check_ht_cap(struct net_device* dev, struct sta_info *sta, 
+		struct rtllib_network* net);
+u8 rtl8192se_MapHwQueueToFirmwareQueue(u8 QueueID, u8 priority);
+#endif
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl8192s/r8192S_led.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl8192s/r8192S_led.c
@@ -0,0 +1,1356 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+#include "../rtl_core.h"
+#ifdef RTL8192SE
+#define LED_BLINK_NORMAL_INTERVAL	100
+#define LED_BLINK_SLOWLY_INTERVAL		200
+
+#define LED_BLINK_NORMAL_INTERVAL_NETTRONIX  100
+#define LED_BLINK_SLOWLY_INTERVAL_NETTRONIX  2000
+
+#define LED_BLINK_SLOWLY_INTERVAL_PORNET 1000
+#define LED_BLINK_NORMAL_INTERVAL_PORNET 100
+
+
+#define LED_CM2_BLINK_ON_INTERVAL			250
+#define LED_CM2_BLINK_OFF_INTERVAL		4750
+
+#define LED_CM8_BLINK_OFF_INTERVAL		3750	
+
+#define LED_RunTop_BLINK_INTERVAL 			300
+
+#define LED_CM3_BLINK_INTERVAL			1500
+
+
+
+static void BlinkTimerCallback(unsigned long data);
+
+
+void InitLed8190Pci(struct net_device *dev, PLED_8190 	pLed,LED_PIN_8190 LedPin)
+{
+	pLed->dev = dev;
+	pLed->LedPin = LedPin;
+
+	pLed->CurrLedState = LED_OFF;
+	pLed->bLedOn = false;
+	pLed->bLedBlinkInProgress = false;
+	pLed->BlinkTimes = 0;
+	pLed->BlinkingLedState = LED_OFF;
+
+	setup_timer(&pLed->BlinkTimer,
+		    BlinkTimerCallback,
+		    (unsigned long) pLed);
+}
+
+void DeInitLed8190Pci(PLED_8190 pLed)
+{
+	del_timer_sync(&(pLed->BlinkTimer));
+	pLed->bLedBlinkInProgress = false;
+}
+
+void SwLedOn(	struct net_device *dev , PLED_8190 pLed)
+{
+	u8	LedCfg;
+
+	LedCfg = read_nic_byte(dev, LEDCFG);
+	
+	switch(pLed->LedPin)
+	{
+	case LED_PIN_GPIO0:
+		break;
+
+	case LED_PIN_LED0:
+		write_nic_byte(dev, LEDCFG, LedCfg&0xf0); 
+		break;
+
+	case LED_PIN_LED1:
+		write_nic_byte(dev, LEDCFG, LedCfg&0x0f); 
+		break;
+
+	default:
+		break;
+	}
+
+	pLed->bLedOn = true;
+}
+
+void SwLedOff(struct net_device *dev, PLED_8190 pLed)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u8	LedCfg;
+	
+	LedCfg = read_nic_byte(dev, LEDCFG);
+	
+	switch(pLed->LedPin)
+	{
+	case LED_PIN_GPIO0:
+		break;
+
+	case LED_PIN_LED0:
+		LedCfg &= 0xf0; 
+
+		if(priv->bLedOpenDrain == true) 
+			write_nic_byte(dev, LEDCFG, (LedCfg|BIT1));
+		else
+			write_nic_byte(dev, LEDCFG, (LedCfg|BIT3));
+		break;
+
+	case LED_PIN_LED1:
+		LedCfg &= 0x0f; 
+		write_nic_byte(dev, LEDCFG, (LedCfg|BIT7));
+		break;
+
+	default:
+		break;
+	}
+
+	pLed->bLedOn = false;
+}
+
+
+void InitSwLeds(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+
+	InitLed8190Pci(
+		dev,
+		&(priv->SwLed0), 
+		LED_PIN_LED0);
+
+	InitLed8190Pci(
+		dev,
+		&(priv->SwLed1), 
+		LED_PIN_LED1);
+}
+
+
+void DeInitSwLeds(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+
+	DeInitLed8190Pci( &(priv->SwLed0) );
+	DeInitLed8190Pci( &(priv->SwLed1) );
+}
+
+void HwLedBlink(struct net_device *dev, PLED_8190 pLed)
+{
+
+	
+	switch(pLed->LedPin)
+	{
+	case LED_PIN_GPIO0:
+		break;
+
+	case LED_PIN_LED0:
+		break;
+
+	case LED_PIN_LED1:
+		break;
+
+	default:
+		break;
+	}
+
+	pLed->bLedOn = true;
+}
+
+
+
+void SwLedBlink(PLED_8190 pLed)
+{
+	struct net_device *dev = (struct net_device *)pLed->dev;
+	struct r8192_priv *priv = rtllib_priv(dev);
+	bool bStopBlinking = false;
+	
+	if( pLed->BlinkingLedState == LED_ON ) 
+	{
+		SwLedOn(dev, pLed);
+		RT_TRACE(COMP_LED, "Blinktimes (%d): turn on\n", pLed->BlinkTimes);
+	}	
+	else 
+	{
+		SwLedOff(dev, pLed);
+		RT_TRACE(COMP_LED, "Blinktimes (%d): turn off\n", pLed->BlinkTimes);
+	}
+
+	pLed->BlinkTimes--;
+	switch(pLed->CurrLedState)
+	{
+	case LED_BLINK_NORMAL: 
+	case LED_BLINK_TXRX:
+	case LED_BLINK_RUNTOP:
+		if(pLed->BlinkTimes == 0)
+		{
+			bStopBlinking = true;
+		}
+		break;
+
+	case LED_SCAN_BLINK:
+		if( (priv->rtllib->state == RTLLIB_LINKED) &&  
+			(!rtllib_act_scanning(priv->rtllib,true))&& 
+			(pLed->BlinkTimes % 2 == 0)) 
+		{
+			bStopBlinking = true;
+		}
+		break;
+
+	case LED_NO_LINK_BLINK:
+	case LED_BLINK_StartToBlink:	
+		if( (priv->rtllib->state == RTLLIB_LINKED) && (priv->rtllib->iw_mode == IW_MODE_INFRA)) 
+		{
+			bStopBlinking = true;
+		}
+		else if((priv->rtllib->state == RTLLIB_LINKED) && (priv->rtllib->iw_mode == IW_MODE_ADHOC))
+		{
+			bStopBlinking = true;
+		}
+		else if(pLed->BlinkTimes == 0)
+		{
+			bStopBlinking = true;
+		}
+		break;
+		
+	case LED_BLINK_CAMEO:
+		if((priv->rtllib->state == RTLLIB_LINKED) && (priv->rtllib->iw_mode == IW_MODE_INFRA)) 
+		{
+			bStopBlinking = true;
+		}
+		else if((priv->rtllib->state == RTLLIB_LINKED) && (priv->rtllib->iw_mode == IW_MODE_ADHOC) )
+		{
+			bStopBlinking = true;
+		}
+		break;
+		
+	default:
+		bStopBlinking = true;
+		break;
+	}
+
+	if(bStopBlinking)
+	{
+		if( priv->rtllib->eRFPowerState != eRfOn )
+		{
+			SwLedOff(dev, pLed);
+		}
+		else if(pLed->CurrLedState == LED_BLINK_TXRX)
+		{
+			SwLedOff(dev, pLed);
+		}
+		else if(pLed->CurrLedState == LED_BLINK_RUNTOP)
+		{
+			SwLedOff(dev, pLed);
+		}
+		else if( (priv->rtllib->state == RTLLIB_LINKED) && (pLed->bLedOn == false))
+		{
+			SwLedOn(dev, pLed);
+		}
+		else if( (priv->rtllib->state != RTLLIB_LINKED) &&  pLed->bLedOn == true)
+		{
+			SwLedOff(dev, pLed);
+		}
+
+		pLed->BlinkTimes = 0;
+		pLed->bLedBlinkInProgress = false;	
+	}
+	else
+	{
+		if( pLed->BlinkingLedState == LED_ON ) 
+			pLed->BlinkingLedState = LED_OFF;
+		else 
+			pLed->BlinkingLedState = LED_ON;
+
+		switch( pLed->CurrLedState )
+		{
+		case LED_BLINK_NORMAL:
+		case LED_BLINK_TXRX:
+		case LED_BLINK_StartToBlink:
+			mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL));
+			break;
+
+		case LED_BLINK_SLOWLY:
+			mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL));
+			break;
+
+		case LED_SCAN_BLINK:
+		case LED_NO_LINK_BLINK:
+			if( pLed->bLedOn )
+				mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_CM2_BLINK_ON_INTERVAL));
+			else
+				mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_CM2_BLINK_OFF_INTERVAL));
+			break;
+			
+		case LED_BLINK_RUNTOP:
+			mod_timer(&(pLed->BlinkTimer),jiffies + MSECS(LED_RunTop_BLINK_INTERVAL));
+			break;
+			
+		case LED_BLINK_CAMEO:
+			mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL_PORNET));
+			break;
+			
+		default:
+			RT_TRACE(COMP_ERR, "SwLedCm2Blink(): unexpected state!\n");
+			mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL));
+			break;
+		}		
+	}
+}
+
+void SwLedBlink5(PLED_8190 pLed)
+{
+	struct net_device *dev = (struct net_device *)pLed->dev;
+	struct r8192_priv *priv = rtllib_priv(dev);
+	bool bStopBlinking = false;
+
+	if( pLed->BlinkingLedState == LED_ON ) 
+	{
+		SwLedOn(dev, pLed);
+		RT_TRACE(COMP_LED, "Blinktimes (%d): turn on\n", pLed->BlinkTimes);
+	}	
+	else 
+	{
+		SwLedOff(dev, pLed);
+		RT_TRACE(COMP_LED, "Blinktimes (%d): turn off\n", pLed->BlinkTimes);
+	}
+
+	switch(pLed->CurrLedState)
+	{
+		case LED_OFF:
+			SwLedOff(dev, pLed);
+			break;
+
+		case LED_BLINK_SLOWLY:
+			if( pLed->bLedOn )
+				pLed->BlinkingLedState = LED_OFF; 
+			else
+				pLed->BlinkingLedState = LED_ON; 
+			mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL_NETTRONIX));
+			break;
+
+		case LED_BLINK_NORMAL:
+			pLed->BlinkTimes--;
+			if( pLed->BlinkTimes == 0 )
+			{
+				bStopBlinking = true;
+			}
+			if(bStopBlinking)
+			{
+				if( priv->rtllib->eRFPowerState != eRfOn )
+				{
+					SwLedOff(dev, pLed);
+				}
+				else 
+				{
+					pLed->bLedSlowBlinkInProgress = true;
+					pLed->CurrLedState = LED_BLINK_SLOWLY;
+					if( pLed->bLedOn )
+						pLed->BlinkingLedState = LED_OFF; 
+					else
+						pLed->BlinkingLedState = LED_ON; 
+					mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL_NETTRONIX));
+				}
+				pLed->BlinkTimes = 0;
+				pLed->bLedBlinkInProgress = false;	
+			}
+			else
+			{
+				if( priv->rtllib->eRFPowerState != eRfOn )
+				{
+					SwLedOff(dev, pLed);
+				}
+				else
+				{
+					if( pLed->bLedOn )
+						pLed->BlinkingLedState = LED_OFF; 
+					else
+						pLed->BlinkingLedState = LED_ON; 
+
+					mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL_NETTRONIX));
+				}
+			}
+			break;
+			
+		default:
+			break;	
+		}
+
+}
+
+
+void SwLedBlink6(PLED_8190 pLed)
+{
+	struct net_device *dev = (struct net_device *)pLed->dev;
+	struct r8192_priv *priv = rtllib_priv(dev);
+	bool bStopBlinking = false;
+
+	if( pLed->BlinkingLedState == LED_ON ) 
+	{
+		SwLedOn(dev, pLed);
+		RT_TRACE(COMP_LED, "Blinktimes (%d): turn on\n", pLed->BlinkTimes);
+	}	
+	else 
+	{
+		SwLedOff(dev, pLed);
+		RT_TRACE(COMP_LED, "Blinktimes (%d): turn off\n", pLed->BlinkTimes);
+	}
+	
+	switch(pLed->CurrLedState)
+	{
+		case LED_OFF:
+			SwLedOff(dev, pLed);
+			break;
+
+		case LED_BLINK_SLOWLY:
+			if( pLed->bLedOn )
+				pLed->BlinkingLedState = LED_OFF; 
+			else
+				pLed->BlinkingLedState = LED_ON; 
+			mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL_PORNET));
+			break;
+
+		case LED_BLINK_NORMAL:
+			pLed->BlinkTimes--;
+			if( pLed->BlinkTimes == 0 )
+			{
+				bStopBlinking = true;
+			}
+			if(bStopBlinking)
+			{
+				if( priv->rtllib->eRFPowerState != eRfOn )
+				{
+					SwLedOff(dev, pLed);
+				}
+				else 
+				{
+					pLed->bLedSlowBlinkInProgress = true;
+					pLed->CurrLedState = LED_BLINK_SLOWLY;
+					if( pLed->bLedOn )
+						pLed->BlinkingLedState = LED_OFF; 
+					else
+						pLed->BlinkingLedState = LED_ON; 
+					mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL_PORNET));
+				}
+				pLed->BlinkTimes = 0;
+				pLed->bLedBlinkInProgress = false;	
+			}
+			else
+			{
+				if( priv->rtllib->eRFPowerState != eRfOn )
+				{
+					SwLedOff(dev, pLed);
+				}
+				else
+				{
+					if( pLed->bLedOn )
+						pLed->BlinkingLedState = LED_OFF; 
+					else
+						pLed->BlinkingLedState = LED_ON; 
+
+					mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL_PORNET));
+				}
+			}
+			break;
+			
+		default:
+			break;	
+		}
+	
+}
+
+void SwLedBlink7(	PLED_8190 pLed)
+{
+	struct net_device *dev = (struct net_device *)pLed->dev;
+
+	SwLedOn(dev, pLed);
+	RT_TRACE(COMP_LED, "Blinktimes (%d): turn on\n", pLed->BlinkTimes);	
+}
+
+void BlinkTimerCallback(unsigned long data)
+{	
+	PLED_8190 	pLed = (PLED_8190)data;
+	struct net_device *dev = (struct net_device *)pLed->dev;
+	struct r8192_priv *priv = rtllib_priv(dev);
+		
+	switch(priv->LedStrategy)
+	{
+	case SW_LED_MODE1:
+		break;
+	case SW_LED_MODE2:
+		break;
+	case SW_LED_MODE3:
+		break;
+	case SW_LED_MODE5:
+		break;
+	case SW_LED_MODE6:
+		break;
+
+	case SW_LED_MODE7:
+		SwLedBlink7(pLed);
+		break;
+
+	default:
+		break;
+	}	
+}
+
+void SwLedControlMode0(struct net_device *dev,LED_CTL_MODE LedAction)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	PLED_8190 pLed0 = &(priv->SwLed0);
+	PLED_8190 pLed1 = &(priv->SwLed1);
+
+	switch(LedAction)
+	{
+	case LED_CTL_TX:
+	case LED_CTL_RX:	
+		break;
+
+	case LED_CTL_LINK:
+		pLed0->CurrLedState = LED_ON;
+		SwLedOn(dev, pLed0);
+
+		pLed1->CurrLedState = LED_BLINK_NORMAL;
+		HwLedBlink(dev, pLed1);
+		break;
+
+	case LED_CTL_POWER_ON:
+		pLed0->CurrLedState = LED_OFF;
+		SwLedOff(dev, pLed0);
+
+		pLed1->CurrLedState = LED_BLINK_NORMAL;
+		HwLedBlink(dev, pLed1);
+
+		break;
+
+	case LED_CTL_POWER_OFF:
+		pLed0->CurrLedState = LED_OFF;
+		SwLedOff(dev, pLed0);
+
+		pLed1->CurrLedState = LED_OFF;
+		SwLedOff(dev, pLed1);
+		break;
+
+	case LED_CTL_SITE_SURVEY:
+		break;
+
+	case LED_CTL_NO_LINK:
+		pLed0->CurrLedState = LED_OFF;
+		SwLedOff(dev, pLed0);
+
+		pLed1->CurrLedState = LED_BLINK_NORMAL;
+		HwLedBlink(dev, pLed1);
+		break;	
+
+	default:
+		break;
+	}
+
+	RT_TRACE(COMP_LED, "Led0 %d Led1 %d\n", pLed0->CurrLedState, pLed1->CurrLedState);
+}
+
+
+void SwLedControlMode1(struct net_device *dev, LED_CTL_MODE LedAction)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	PLED_8190	pLed = &(priv->SwLed1);
+	
+	switch(LedAction)
+	{
+	case LED_CTL_TX:
+	case LED_CTL_RX:
+		if( pLed->bLedBlinkInProgress == false )
+		{
+			pLed->bLedBlinkInProgress = true;
+
+			pLed->CurrLedState = LED_BLINK_NORMAL;
+			pLed->BlinkTimes = 2;
+
+			if( pLed->bLedOn )
+				pLed->BlinkingLedState = LED_OFF; 
+			else
+				pLed->BlinkingLedState = LED_ON; 
+			mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL));
+		}
+		break;
+
+	case LED_CTL_SITE_SURVEY:
+		if( pLed->bLedBlinkInProgress == false )
+		{
+			pLed->bLedBlinkInProgress = true;
+
+			if(priv->rtllib->state == RTLLIB_LINKED)
+			{
+				pLed->CurrLedState = LED_SCAN_BLINK;
+				pLed->BlinkTimes = 4;
+			}
+			else
+			{
+				pLed->CurrLedState = LED_NO_LINK_BLINK;
+				pLed->BlinkTimes = 24;
+			}
+
+			if( pLed->bLedOn )
+			{
+				pLed->BlinkingLedState = LED_OFF; 
+				mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_CM2_BLINK_ON_INTERVAL));
+			}
+			else
+			{
+				pLed->BlinkingLedState = LED_ON; 
+				mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_CM2_BLINK_OFF_INTERVAL));
+			}
+		}
+		else
+		{
+			if(pLed->CurrLedState != LED_NO_LINK_BLINK)
+			{
+				if(priv->rtllib->state == RTLLIB_LINKED)
+				{
+					pLed->CurrLedState = LED_SCAN_BLINK;
+				}
+				else
+				{
+					pLed->CurrLedState = LED_NO_LINK_BLINK;
+				}
+			}
+		}
+		break;
+
+	case LED_CTL_NO_LINK:
+		if( pLed->bLedBlinkInProgress == false )
+		{
+			pLed->bLedBlinkInProgress = true;
+
+			pLed->CurrLedState = LED_NO_LINK_BLINK;
+			pLed->BlinkTimes = 24;
+
+			if( pLed->bLedOn )
+			{
+				pLed->BlinkingLedState = LED_OFF; 
+				mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_CM2_BLINK_ON_INTERVAL));
+			}
+			else
+			{
+				pLed->BlinkingLedState = LED_ON; 
+				mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_CM2_BLINK_OFF_INTERVAL));
+			}
+		}
+		else
+		{
+			pLed->CurrLedState = LED_NO_LINK_BLINK;
+		}
+		break;
+
+	case LED_CTL_LINK:
+		pLed->CurrLedState = LED_ON;
+		if( pLed->bLedBlinkInProgress == false )
+		{
+			SwLedOn(dev, pLed);
+		}
+		break;
+
+	case LED_CTL_POWER_OFF:
+		pLed->CurrLedState = LED_OFF;
+		if(pLed->bLedBlinkInProgress)
+		{
+			del_timer_sync(&(pLed->BlinkTimer));
+			pLed->bLedBlinkInProgress = false;
+		}
+		SwLedOff(dev, pLed);
+		break;
+
+	default:
+		break;
+	}
+	
+	RT_TRACE(COMP_LED, "Led %d \n", pLed->CurrLedState);
+}
+
+void SwLedControlMode2(struct net_device *dev, LED_CTL_MODE LedAction)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	PLED_8190 pLed0 = &(priv->SwLed0);
+	PLED_8190 pLed1 = &(priv->SwLed1);
+	
+	switch(LedAction)
+	{
+	case LED_CTL_POWER_ON:
+		pLed0->CurrLedState = LED_OFF;
+		SwLedOff(dev, pLed0);
+		
+		pLed1->CurrLedState = LED_BLINK_CAMEO;
+		if( pLed1->bLedBlinkInProgress == false )
+		{
+			pLed1->bLedBlinkInProgress = true;
+
+			pLed1->BlinkTimes = 6;
+		
+			if( pLed1->bLedOn )
+				pLed1->BlinkingLedState = LED_OFF; 
+			else
+				pLed1->BlinkingLedState = LED_ON; 
+			mod_timer(&(pLed1->BlinkTimer), jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL_PORNET));
+		}
+		break;
+
+	case LED_CTL_TX:
+	case LED_CTL_RX:
+		if( pLed0->bLedBlinkInProgress == false )
+		{
+			pLed0->bLedBlinkInProgress = true;
+
+			pLed0->CurrLedState = LED_BLINK_TXRX;
+			pLed0->BlinkTimes = 2;
+
+			if( pLed0->bLedOn )
+				pLed0->BlinkingLedState = LED_OFF; 
+			else
+				pLed0->BlinkingLedState = LED_ON; 
+			
+			mod_timer(&(pLed0->BlinkTimer), jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL));
+		}
+		break;
+
+	case LED_CTL_NO_LINK:
+		pLed1->CurrLedState = LED_BLINK_CAMEO;
+		if( pLed1->bLedBlinkInProgress == false )
+		{
+			pLed1->bLedBlinkInProgress = true;
+			
+			pLed1->BlinkTimes = 6;
+
+			if( pLed1->bLedOn )
+				pLed1->BlinkingLedState = LED_OFF; 
+			else
+				pLed1->BlinkingLedState = LED_ON; 
+			mod_timer(&(pLed1->BlinkTimer), jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL_PORNET));
+		}
+		break;
+
+	case LED_CTL_LINK:
+		pLed1->CurrLedState = LED_ON;
+		if( pLed1->bLedBlinkInProgress == false )
+		{
+			SwLedOn(dev, pLed1);
+		}
+		break;
+
+	case LED_CTL_POWER_OFF:
+		pLed0->CurrLedState = LED_OFF;
+		pLed1->CurrLedState = LED_OFF;
+		if(pLed0->bLedBlinkInProgress)
+		{
+			del_timer_sync(&(pLed0->BlinkTimer));
+			pLed0->bLedBlinkInProgress = false;
+		}
+		if(pLed1->bLedBlinkInProgress)
+		{
+			del_timer_sync(&(pLed1->BlinkTimer));
+			pLed1->bLedBlinkInProgress = false;
+		}
+		SwLedOff(dev, pLed0);
+		SwLedOff(dev, pLed1);
+		break;
+
+	default:
+		break;
+	}
+	
+	RT_TRACE(COMP_LED, "Led0 %d, Led1 %d \n", pLed0->CurrLedState, pLed1->CurrLedState);
+}
+
+
+
+void SwLedControlMode3(struct net_device *dev, LED_CTL_MODE LedAction)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	PLED_8190 pLed0 = &(priv->SwLed0);
+	PLED_8190 pLed1 = &(priv->SwLed1);
+	
+	switch(LedAction)
+	{
+	case LED_CTL_POWER_ON:
+		pLed0->CurrLedState = LED_ON;
+		SwLedOn(dev, pLed0);
+		pLed1->CurrLedState = LED_OFF;
+		SwLedOff(dev, pLed1);
+		break;
+		
+	case LED_CTL_TX:
+	case LED_CTL_RX:
+		if( pLed1->bLedBlinkInProgress == false )
+		{
+			pLed1->bLedBlinkInProgress = true;
+
+			pLed1->CurrLedState = LED_BLINK_RUNTOP;
+			pLed1->BlinkTimes = 2;
+		
+			if( pLed1->bLedOn )
+				pLed1->BlinkingLedState = LED_OFF; 
+			else
+				pLed1->BlinkingLedState = LED_ON; 
+			
+			mod_timer(&(pLed1->BlinkTimer), jiffies + MSECS(LED_RunTop_BLINK_INTERVAL));
+		}
+		break;
+
+	case LED_CTL_POWER_OFF:
+		pLed0->CurrLedState = LED_OFF;
+		pLed1->CurrLedState = LED_OFF;
+		if(pLed0->bLedBlinkInProgress)
+		{
+			del_timer_sync(&(pLed0->BlinkTimer));
+			pLed0->bLedBlinkInProgress = false;
+		}
+		if(pLed1->bLedBlinkInProgress)
+		{
+			del_timer_sync(&(pLed1->BlinkTimer));
+			pLed1->bLedBlinkInProgress = false;
+		}
+		SwLedOff(dev, pLed0);
+		SwLedOff(dev, pLed1);
+		break;
+
+	default:
+		break;
+	}
+	
+	RT_TRACE(COMP_LED, "Led0 %d, Led1 %d \n", pLed0->CurrLedState, pLed1->CurrLedState);
+}
+
+
+void SwLedControlMode4(struct net_device *dev, LED_CTL_MODE LedAction)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	PLED_8190 pLed0 = &(priv->SwLed0);
+	PLED_8190 pLed1 = &(priv->SwLed1);
+	
+	switch(LedAction)
+	{
+	case LED_CTL_POWER_ON:
+		pLed1->CurrLedState = LED_ON;
+		SwLedOn(dev, pLed1);
+		pLed0->CurrLedState = LED_OFF;
+		SwLedOff(dev, pLed0);
+		break;
+		
+	case LED_CTL_TX:
+	case LED_CTL_RX:
+		if( pLed0->bLedBlinkInProgress == false )
+		{
+			pLed0->bLedBlinkInProgress = true;
+
+			pLed0->CurrLedState = LED_BLINK_RUNTOP;
+			pLed0->BlinkTimes = 2;
+		
+			if( pLed0->bLedOn )
+				pLed0->BlinkingLedState = LED_OFF; 
+			else
+				pLed0->BlinkingLedState = LED_ON; 
+			
+			mod_timer(&(pLed0->BlinkTimer), jiffies + MSECS(LED_RunTop_BLINK_INTERVAL));
+		}
+		break;
+
+	case LED_CTL_POWER_OFF:
+		pLed0->CurrLedState = LED_OFF;
+		pLed1->CurrLedState = LED_OFF;
+		if(pLed0->bLedBlinkInProgress)
+		{
+			del_timer_sync(&(pLed0->BlinkTimer));
+			pLed0->bLedBlinkInProgress = false;
+		}
+		if(pLed1->bLedBlinkInProgress)
+		{
+			del_timer_sync(&(pLed1->BlinkTimer));
+			pLed1->bLedBlinkInProgress = false;
+		}
+		SwLedOff(dev, pLed0);
+		SwLedOff(dev, pLed1);
+		break;
+
+	default:
+		break;
+	}
+	
+	RT_TRACE(COMP_LED, "Led0 %d, Led1 %d \n", pLed0->CurrLedState, pLed1->CurrLedState);
+}
+
+void SwLedControlMode5(struct net_device *dev, LED_CTL_MODE LedAction)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	PLED_8190 pLed0 = &(priv->SwLed0);
+	PLED_8190 pLed1 = &(priv->SwLed1);
+	switch(LedAction)
+	{
+	case LED_CTL_POWER_ON:
+	case LED_CTL_START_TO_LINK:
+	case LED_CTL_NO_LINK:
+		pLed1->CurrLedState = LED_OFF;
+		SwLedOff(dev, pLed1);
+
+
+		if( pLed0->bLedSlowBlinkInProgress == false )
+		{
+			pLed0->bLedSlowBlinkInProgress = true;
+			pLed0->CurrLedState = LED_BLINK_SLOWLY;
+			if( pLed0->bLedOn )
+				pLed0->BlinkingLedState = LED_OFF; 
+			else
+				pLed0->BlinkingLedState = LED_ON; 
+			mod_timer(&(pLed0->BlinkTimer), jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL_NETTRONIX));
+		}
+		
+		break;
+	
+	case LED_CTL_TX:
+	case LED_CTL_RX:	
+		pLed1->CurrLedState = LED_ON;
+		SwLedOn(dev, pLed1);
+
+		if( pLed0->bLedBlinkInProgress == false )
+		{
+			del_timer_sync(&(pLed0->BlinkTimer));
+			pLed0->bLedSlowBlinkInProgress = false;
+			pLed0->bLedBlinkInProgress = true;
+			pLed0->CurrLedState = LED_BLINK_NORMAL;
+			pLed0->BlinkTimes = 2;
+
+			if( pLed0->bLedOn )
+				pLed0->BlinkingLedState = LED_OFF; 
+			else
+				pLed0->BlinkingLedState = LED_ON; 
+				mod_timer(&(pLed0->BlinkTimer), jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL_NETTRONIX));
+		}		
+		break;
+
+	case LED_CTL_LINK:
+		pLed1->CurrLedState = LED_ON;
+		SwLedOn(dev, pLed1);
+
+		if( pLed0->bLedSlowBlinkInProgress == false )
+		{
+			pLed0->bLedSlowBlinkInProgress = true;
+			pLed0->CurrLedState = LED_BLINK_SLOWLY;
+			if( pLed0->bLedOn )
+				pLed0->BlinkingLedState = LED_OFF; 
+			else
+				pLed0->BlinkingLedState = LED_ON; 
+			mod_timer(&(pLed0->BlinkTimer), jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL_NETTRONIX));
+		}
+		break;
+
+
+	case LED_CTL_POWER_OFF:
+		pLed0->CurrLedState = LED_OFF;
+		pLed1->CurrLedState = LED_OFF;
+		if( pLed0->bLedSlowBlinkInProgress == true )
+		{
+			del_timer_sync(&(pLed0->BlinkTimer));
+			pLed0->bLedSlowBlinkInProgress = false;
+		}
+		if(pLed0->bLedBlinkInProgress == true)
+		{
+			del_timer_sync(&(pLed0->BlinkTimer));
+			pLed0->bLedBlinkInProgress = false;
+		}
+		SwLedOff(dev, pLed0);
+		SwLedOff(dev, pLed1);
+		break;
+
+	default:
+		break;
+		}
+
+	
+}
+
+void SwLedControlMode6(struct net_device *dev, LED_CTL_MODE LedAction)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	PLED_8190 pLed0 = &(priv->SwLed0);
+	PLED_8190 pLed1 = &(priv->SwLed1);
+	
+
+	switch(LedAction)
+	{
+	case LED_CTL_POWER_ON:
+	case LED_CTL_START_TO_LINK:
+	case LED_CTL_NO_LINK:
+	case LED_CTL_LINK:
+	case LED_CTL_SITE_SURVEY:
+		pLed1->CurrLedState = LED_OFF;
+		SwLedOff(dev, pLed1);
+		
+		if( pLed0->bLedSlowBlinkInProgress == false )
+		{
+			pLed0->bLedSlowBlinkInProgress = true;
+			pLed0->CurrLedState = LED_BLINK_SLOWLY;
+			if( pLed0->bLedOn )
+				pLed0->BlinkingLedState = LED_OFF; 
+			else
+				pLed0->BlinkingLedState = LED_ON; 
+			mod_timer(&(pLed0->BlinkTimer), jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL_PORNET));
+		}
+		break;
+
+	case LED_CTL_TX:
+	case LED_CTL_RX:
+		pLed1->CurrLedState = LED_OFF;
+		SwLedOff(dev, pLed1);
+		if( pLed0->bLedBlinkInProgress == false )
+		{
+			del_timer_sync(&(pLed0->BlinkTimer));
+			pLed0->bLedSlowBlinkInProgress = false;
+			pLed0->bLedBlinkInProgress = true;
+			pLed0->CurrLedState = LED_BLINK_NORMAL;
+			pLed0->BlinkTimes = 2;
+			if( pLed0->bLedOn )
+				pLed0->BlinkingLedState = LED_OFF; 
+			else
+				pLed0->BlinkingLedState = LED_ON; 
+			mod_timer(&(pLed0->BlinkTimer), jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL_PORNET));
+		}		
+		break;
+
+	case LED_CTL_POWER_OFF:
+		pLed1->CurrLedState = LED_OFF;
+		SwLedOff(dev, pLed1);
+		
+		pLed0->CurrLedState = LED_OFF;
+		if( pLed0->bLedSlowBlinkInProgress == true )
+		{
+			del_timer_sync(&(pLed0->BlinkTimer));
+			pLed0->bLedSlowBlinkInProgress = false;
+		}
+		if(pLed0->bLedBlinkInProgress == true)
+		{
+			del_timer_sync(&(pLed0->BlinkTimer));
+			pLed0->bLedBlinkInProgress = false;
+		}
+		SwLedOff(dev, pLed0);
+		break;
+
+	default:
+		break;
+		
+		}
+}
+
+
+void SwLedControlMode7(struct net_device *dev, LED_CTL_MODE LedAction)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	PLED_8190 pLed0 = &(priv->SwLed0);	
+
+	switch(LedAction)
+	{
+		case LED_CTL_POWER_ON:
+		case LED_CTL_LINK:
+		case LED_CTL_NO_LINK:			
+			SwLedOn(dev, pLed0);
+			break;
+
+		case LED_CTL_POWER_OFF:
+				SwLedOff(dev, pLed0);
+			break;
+
+		default:
+			break;
+			
+		}
+}
+
+void
+SwLedControlMode8(struct net_device *dev, LED_CTL_MODE LedAction)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	PLED_8190 pLed = &(priv->SwLed0);	
+
+	switch(LedAction)
+	{
+		case LED_CTL_TX:
+		case LED_CTL_RX:
+			if( pLed->bLedBlinkInProgress == false && priv->rtllib->state == RTLLIB_LINKED)
+			{
+				pLed->bLedBlinkInProgress = true;
+
+				pLed->CurrLedState = LED_BLINK_NORMAL;
+				pLed->BlinkTimes = 2;
+
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = LED_OFF; 
+				else
+					pLed->BlinkingLedState = LED_ON; 
+				mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL));
+			}
+			break;
+
+		case LED_CTL_SITE_SURVEY:
+			if( pLed->bLedBlinkInProgress == false )
+			{
+				pLed->bLedBlinkInProgress = true;
+				pLed->CurrLedState = LED_SCAN_BLINK;
+				pLed->BlinkTimes = 2;
+			
+				if( pLed->bLedOn )
+				{
+					pLed->BlinkingLedState = LED_OFF; 
+					mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_CM2_BLINK_ON_INTERVAL));
+				}
+				else
+				{
+					pLed->BlinkingLedState = LED_ON; 
+					mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_CM8_BLINK_OFF_INTERVAL));
+				}				
+			}
+			else if(pLed->CurrLedState != LED_SCAN_BLINK)
+			{
+				del_timer_sync(&(pLed->BlinkTimer));
+				pLed->CurrLedState = LED_SCAN_BLINK;
+				pLed->BlinkTimes = 2;
+
+				if( pLed->bLedOn )
+				{
+					pLed->BlinkingLedState = LED_OFF; 
+					mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_CM2_BLINK_ON_INTERVAL));
+				}
+				else
+				{
+					pLed->BlinkingLedState = LED_ON; 
+					mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_CM8_BLINK_OFF_INTERVAL));
+				}				
+			}			
+			break;
+
+		case LED_CTL_POWER_ON:
+		case LED_CTL_NO_LINK:
+			if( pLed->bLedBlinkInProgress == false )
+			{
+				pLed->bLedBlinkInProgress = true;
+
+				pLed->CurrLedState = LED_NO_LINK_BLINK;
+				pLed->BlinkTimes = 24;
+
+				if( pLed->bLedOn )
+				{
+					pLed->BlinkingLedState = LED_OFF; 
+					mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_CM2_BLINK_ON_INTERVAL));
+				}
+				else
+				{
+					pLed->BlinkingLedState = LED_ON; 
+					mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_CM8_BLINK_OFF_INTERVAL));
+				}
+			}
+			else if(pLed->CurrLedState != LED_SCAN_BLINK && pLed->CurrLedState != LED_NO_LINK_BLINK)
+			{
+				pLed->CurrLedState = LED_NO_LINK_BLINK;
+				pLed->BlinkTimes = 24;
+
+				if( pLed->bLedOn )
+				{
+					pLed->BlinkingLedState = LED_OFF; 
+					mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_CM2_BLINK_ON_INTERVAL));
+				}
+				else
+				{
+					pLed->BlinkingLedState = LED_ON; 
+					mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_CM8_BLINK_OFF_INTERVAL));
+				}
+			}
+			break;
+
+		case LED_CTL_LINK:
+			pLed->CurrLedState = LED_ON;
+			if(pLed->bLedBlinkInProgress)
+			{
+				del_timer_sync(&(pLed->BlinkTimer));
+				pLed->bLedBlinkInProgress = false;
+			}
+			SwLedOn(dev, pLed);
+			break;
+
+		case LED_CTL_POWER_OFF:
+			pLed->CurrLedState = LED_OFF;
+			if(pLed->bLedBlinkInProgress)
+			{
+				del_timer_sync(&(pLed->BlinkTimer));
+				pLed->bLedBlinkInProgress = false;
+			}
+			SwLedOff(dev, pLed);
+			break;
+
+		default:
+			break;
+		}
+}
+
+void
+SwLedControlMode9(struct net_device *dev, LED_CTL_MODE LedAction)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	PLED_8190 pLed = &(priv->SwLed0);	
+	
+		switch(LedAction)
+		{
+		case LED_CTL_TX:
+		case LED_CTL_RX:
+			if( pLed->bLedBlinkInProgress == false )
+			{
+				pLed->bLedBlinkInProgress = true;
+	
+				pLed->CurrLedState = LED_BLINK_NORMAL;
+				pLed->BlinkTimes = 2;
+	
+				if( pLed->bLedOn )
+					pLed->BlinkingLedState = LED_OFF; 
+				else
+					pLed->BlinkingLedState = LED_ON; 
+				mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_NORMAL_INTERVAL));
+			}
+			break;
+	
+		case LED_CTL_SITE_SURVEY:
+		 	if(priv->rtllib->LinkDetectInfo.bBusyTraffic && priv->rtllib->state == RTLLIB_LINKED)
+			 	;			
+			else 
+			{
+				if( pLed->bLedBlinkInProgress == true )			
+					del_timer_sync(&(pLed->BlinkTimer));
+				else		
+					pLed->bLedBlinkInProgress = true;
+	
+				pLed->CurrLedState = LED_SCAN_BLINK;
+				pLed->BlinkTimes = 24;
+	
+				if( pLed->bLedOn )
+				{
+					pLed->BlinkingLedState = LED_OFF; 
+					mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL));
+				}
+				else
+				{
+					pLed->BlinkingLedState = LED_ON; 
+					mod_timer(&(pLed->BlinkTimer), jiffies + MSECS(LED_BLINK_SLOWLY_INTERVAL));
+				}
+			}	
+			break;
+	
+		case LED_CTL_POWER_ON:
+		case LED_CTL_NO_LINK:
+		case LED_CTL_LINK:
+			if( pLed->bLedBlinkInProgress == false )
+			{
+				pLed->CurrLedState = LED_ON;		
+				SwLedOn(dev, pLed);
+			}
+			break;
+	
+		case LED_CTL_POWER_OFF:
+			pLed->CurrLedState = LED_OFF;
+			if(pLed->bLedBlinkInProgress)
+			{
+				del_timer_sync(&(pLed->BlinkTimer));
+				pLed->bLedBlinkInProgress = false;
+			}
+			SwLedOff(dev, pLed);
+			break;
+	
+		default:
+			break;
+		}
+	
+		RT_TRACE(COMP_LED, "LED9 CurrLedState %d\n", pLed->CurrLedState);
+		
+}
+
+
+
+void LedControl8192SE(struct net_device *dev, LED_CTL_MODE LedAction)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+
+	if(IS_NIC_DOWN(priv))
+		return;
+
+#ifdef TO_DO_LIST
+	if(Adapter->bInHctTest)
+		return;
+#endif
+
+	if(	priv->rtllib->eRFPowerState != eRfOn && 
+		(LedAction == LED_CTL_TX || LedAction == LED_CTL_RX || 
+		 LedAction == LED_CTL_SITE_SURVEY || 
+		 LedAction == LED_CTL_LINK || 
+		 LedAction == LED_CTL_NO_LINK||
+		 LedAction == LED_CTL_START_TO_LINK ||
+		 LedAction == LED_CTL_POWER_ON) )
+	{
+		return;
+	}
+
+	RT_TRACE(COMP_LED, "LedAction %d, \n", LedAction);
+
+	switch(priv->LedStrategy)
+	{
+	case SW_LED_MODE0:
+		break;
+	case SW_LED_MODE1:
+		break;
+	case SW_LED_MODE2:
+		break;
+	case SW_LED_MODE3:
+		break;
+	case SW_LED_MODE4:
+		break;
+	case SW_LED_MODE5: 
+		break;
+		
+	case SW_LED_MODE6: 
+		break;
+
+	case SW_LED_MODE7:
+		SwLedControlMode7(dev, LedAction);
+		break;
+	case SW_LED_MODE8:
+		SwLedControlMode8(dev, LedAction);
+		break;
+
+	case SW_LED_MODE9:
+		SwLedControlMode9(dev, LedAction);
+		break;
+
+	default:
+		break;
+	}	
+}
+
+#ifdef TO_DO_LIST
+#ifdef NDIS50_MINIPORT
+void LedBlinkTimerStallCheck(struct net_device *dev)
+{	
+}
+
+
+void DoLedTimerStallCheck(PLED_8190 pLed)
+{	
+}
+#endif 
+#endif
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl8192s/r8192S_hwimg492.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl8192s/r8192S_hwimg492.c
@@ -0,0 +1,5610 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+/*Created on  2009/ 7/23,  5: 4*/
+
+#ifdef RTL8192SE
+#include "r8192S_hwimg.h"
+
+u8 Rtl8192SEFwImgArray[ImgArrayLength] = {
+0x92,0x81,0x31,0x70,0x30,0x00,0x00,0x00,0x08,0x84,0x00,0x00,0x48,0xa4,0x00,0x00,
+0x30,0x00,0x00,0x00,0xc0,0xa2,0x00,0x00,0x31,0x00,0x02,0x00,0x07,0x20,0x16,0x06,
+0x92,0x81,0x01,0x01,0x00,0x00,0x22,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x00,0x01,0x01,0x01,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x7f,0x00,0x00,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x1f,0x00,0x00,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
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+0x25,0xb0,0x1a,0x3c,0x80,0x03,0x5a,0x37,0x00,0x80,0x1b,0x3c,0x80,0x00,0x7b,0x37,
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+0x10,0x48,0x00,0x00,0x00,0x70,0x0a,0x40,0x40,0x00,0xb0,0xaf,0x44,0x00,0xb1,0xaf,
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+0x00,0x31,0x2c,0x10,0x10,0x00,0x00,0x00,0x01,0x02,0x04,0x08,0x02,0x04,0x08,0x0c,
+0x10,0x18,0x20,0x30,0x02,0x04,0x08,0x0c,0x10,0x18,0x20,0x30,0x06,0x0c,0x10,0x18,
+0x24,0x30,0x3c,0x48,0x48,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x25,0x27,0x2c,0x19,0x1b,0x1e,0x20,0x23,0x29,0x2a,0x2b,0x00,0x00,0x00,0x00,
+0x25,0x29,0x2b,0x2e,0x2e,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x04,0x00,0x00,0x00,
+0x08,0x00,0x00,0x00,0x10,0x00,0x00,0x00,0x18,0x00,0x00,0x00,0x24,0x00,0x00,0x00,
+0x30,0x00,0x00,0x00,0x48,0x00,0x00,0x00,0x60,0x00,0x00,0x00,0x90,0x00,0x00,0x00,
+0xc0,0x00,0x00,0x00,0xd8,0x00,0x00,0x00,0x50,0x00,0x00,0x00,0x78,0x00,0x00,0x00,
+0xa0,0x00,0x00,0x00,0xc8,0x00,0x00,0x00,0x40,0x01,0x00,0x00,0x90,0x01,0x00,0x00,
+0xe0,0x01,0x00,0x00,0x30,0x02,0x00,0x00,0x2c,0x01,0x00,0x00,0x40,0x01,0x00,0x00,
+0xe0,0x01,0x00,0x00,0xd0,0x02,0x00,0x00,0x80,0x0c,0x00,0x00,0x80,0x0c,0x00,0x00,
+0x80,0x0c,0x00,0x00,0xa0,0x0f,0x00,0x00,0xa0,0x0f,0x00,0x00,0x02,0x00,0x00,0x00,
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+0x12,0x00,0x00,0x00,0x18,0x00,0x00,0x00,0x24,0x00,0x00,0x00,0x30,0x00,0x00,0x00,
+0x48,0x00,0x00,0x00,0x60,0x00,0x00,0x00,0x6c,0x00,0x00,0x00,0x28,0x00,0x00,0x00,
+0x3c,0x00,0x00,0x00,0x50,0x00,0x00,0x00,0x64,0x00,0x00,0x00,0xa0,0x00,0x00,0x00,
+0xc8,0x00,0x00,0x00,0xf0,0x00,0x00,0x00,0x18,0x01,0x00,0x00,0x64,0x00,0x00,0x00,
+0xa0,0x00,0x00,0x00,0xf0,0x00,0x00,0x00,0x68,0x01,0x00,0x00,0x40,0x06,0x00,0x00,
+0x40,0x06,0x00,0x00,0x40,0x06,0x00,0x00,0xd0,0x07,0x00,0x00,0xd0,0x07,0x00,0x00,
+0x2c,0x05,0x00,0x80,0x20,0x05,0x00,0x80,0x14,0x05,0x00,0x80,0x08,0x05,0x00,0x80,
+0xfc,0x04,0x00,0x80,0xf0,0x04,0x00,0x80,0xe4,0x04,0x00,0x80,0xd8,0x04,0x00,0x80,
+0xcc,0x04,0x00,0x80,0xc0,0x04,0x00,0x80,0x78,0x04,0x00,0x80,0x70,0x3b,0x01,0x80,
+0x48,0x3b,0x01,0x80,0x24,0x3b,0x01,0x80,0x14,0x3c,0x01,0x80,0xf0,0x3b,0x01,0x80,
+0xcc,0x3b,0x01,0x80,0xa8,0x3b,0x01,0x80,0x30,0x41,0x00,0x80,0x3c,0x41,0x00,0x80,
+0x48,0x41,0x00,0x80,0x54,0x41,0x00,0x80,0x30,0x41,0x00,0x80,0x30,0x41,0x00,0x80,
+0x30,0x41,0x00,0x80,0x30,0x41,0x00,0x80,0x60,0x41,0x00,0x80,0x6c,0x41,0x00,0x80,
+0x78,0x41,0x00,0x80,0x84,0x41,0x00,0x80,0x68,0x15,0x02,0x80,0x68,0x15,0x02,0x80,
+0x84,0x0e,0x25,0xb0,0x88,0x0e,0x25,0xb0,0x8c,0x0e,0x25,0xb0,0xd0,0x0e,0x25,0xb0,
+0xd8,0x0e,0x25,0xb0,0x20,0x08,0x25,0xb0,0xfe,0x01,0x80,0x7f,0xe2,0x01,0x80,0x78,
+0xc7,0x01,0xc0,0x71,0xae,0x01,0x80,0x6b,0x95,0x01,0x40,0x65,0x7f,0x01,0xc0,0x5f,
+0x69,0x01,0x40,0x5a,0x55,0x01,0x40,0x55,0x42,0x01,0x80,0x50,0x30,0x01,0x00,0x4c,
+0x1f,0x01,0xc0,0x47,0x0f,0x01,0xc0,0x43,0x00,0x01,0x00,0x40,0xf2,0x00,0x80,0x3c,
+0xe4,0x00,0x00,0x39,0xd7,0x00,0xc0,0x35,0xcb,0x00,0xc0,0x32,0xc0,0x00,0x00,0x30,
+0xb5,0x00,0x40,0x2d,0xab,0x00,0xc0,0x2a,0xa2,0x00,0x80,0x28,0x98,0x00,0x00,0x26,
+0x90,0x00,0x00,0x24,0x88,0x00,0x00,0x22,0x80,0x00,0x00,0x20,0x79,0x00,0x40,0x1e,
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+0x5b,0x00,0xc0,0x16,0x56,0x00,0x80,0x15,0x51,0x00,0x40,0x14,0x4c,0x00,0x00,0x13,
+0x48,0x00,0x00,0x12,0x44,0x00,0x00,0x11,0x40,0x00,0x00,0x10,0x36,0x35,0x2e,0x25,
+0x1c,0x12,0x09,0x04,0x33,0x32,0x2b,0x23,0x1a,0x11,0x08,0x04,0x30,0x2f,0x29,0x21,
+0x19,0x10,0x08,0x03,0x2d,0x2d,0x27,0x1f,0x18,0x0f,0x08,0x03,0x2b,0x2a,0x25,0x1e,
+0x16,0x0e,0x07,0x03,0x28,0x28,0x22,0x1c,0x15,0x0d,0x07,0x03,0x26,0x25,0x21,0x1b,
+0x14,0x0d,0x06,0x03,0x24,0x23,0x1f,0x19,0x13,0x0c,0x06,0x03,0x22,0x21,0x1d,0x18,
+0x11,0x0b,0x06,0x02,0x20,0x20,0x1b,0x16,0x11,0x08,0x05,0x02,0x1f,0x1e,0x1a,0x15,
+0x10,0x0a,0x05,0x02,0x1d,0x1c,0x18,0x14,0x0f,0x0a,0x05,0x02,0x1b,0x1a,0x17,0x13,
+0x0e,0x09,0x04,0x02,0x1a,0x19,0x16,0x12,0x0d,0x09,0x04,0x02,0x18,0x17,0x15,0x11,
+0x0c,0x08,0x04,0x02,0x17,0x16,0x13,0x10,0x0c,0x08,0x04,0x02,0x16,0x15,0x12,0x0f,
+0x0b,0x07,0x04,0x01,0x14,0x14,0x11,0x0e,0x0b,0x07,0x03,0x02,0x13,0x13,0x10,0x0d,
+0x0a,0x06,0x03,0x01,0x12,0x12,0x0f,0x0c,0x09,0x06,0x03,0x01,0x11,0x11,0x0f,0x0c,
+0x09,0x06,0x03,0x01,0x10,0x10,0x0e,0x0b,0x08,0x05,0x03,0x01,0x0f,0x0f,0x0d,0x0b,
+0x08,0x05,0x03,0x01,0x0e,0x0e,0x0c,0x0a,0x08,0x05,0x02,0x01,0x0d,0x0d,0x0c,0x0a,
+0x07,0x05,0x02,0x01,0x0d,0x0c,0x0b,0x09,0x07,0x04,0x02,0x01,0x0c,0x0c,0x0a,0x09,
+0x06,0x04,0x02,0x01,0x0b,0x0b,0x0a,0x08,0x06,0x04,0x02,0x01,0x0b,0x0a,0x09,0x08,
+0x06,0x04,0x02,0x01,0x0a,0x0a,0x09,0x07,0x05,0x03,0x02,0x01,0x0a,0x09,0x08,0x07,
+0x05,0x03,0x02,0x01,0x09,0x09,0x08,0x06,0x05,0x03,0x01,0x01,0x09,0x08,0x07,0x06,
+0x04,0x03,0x01,0x01,0x36,0x35,0x2e,0x1b,0x00,0x00,0x00,0x00,0x33,0x32,0x2b,0x19,
+0x00,0x00,0x00,0x00,0x30,0x2f,0x29,0x18,0x00,0x00,0x00,0x00,0x2d,0x2d,0x17,0x17,
+0x00,0x00,0x00,0x00,0x2b,0x2a,0x25,0x15,0x00,0x00,0x00,0x00,0x28,0x28,0x24,0x14,
+0x00,0x00,0x00,0x00,0x26,0x25,0x21,0x13,0x00,0x00,0x00,0x00,0x24,0x23,0x1f,0x12,
+0x00,0x00,0x00,0x00,0x22,0x21,0x1d,0x11,0x00,0x00,0x00,0x00,0x20,0x20,0x1b,0x10,
+0x00,0x00,0x00,0x00,0x1f,0x1e,0x1a,0x0f,0x00,0x00,0x00,0x00,0x1d,0x1c,0x18,0x0e,
+0x00,0x00,0x00,0x00,0x1b,0x1a,0x17,0x0e,0x00,0x00,0x00,0x00,0x1a,0x19,0x16,0x0d,
+0x00,0x00,0x00,0x00,0x18,0x17,0x15,0x0c,0x00,0x00,0x00,0x00,0x17,0x16,0x13,0x0b,
+0x00,0x00,0x00,0x00,0x16,0x15,0x12,0x0b,0x00,0x00,0x00,0x00,0x14,0x14,0x11,0x0a,
+0x00,0x00,0x00,0x00,0x13,0x13,0x10,0x0a,0x00,0x00,0x00,0x00,0x12,0x12,0x0f,0x09,
+0x00,0x00,0x00,0x00,0x11,0x11,0x0f,0x09,0x00,0x00,0x00,0x00,0x10,0x10,0x0e,0x08,
+0x00,0x00,0x00,0x00,0x0f,0x0f,0x0d,0x08,0x00,0x00,0x00,0x00,0x0e,0x0e,0x0c,0x07,
+0x00,0x00,0x00,0x00,0x0d,0x0d,0x0c,0x07,0x00,0x00,0x00,0x00,0x0d,0x0c,0x0b,0x06,
+0x00,0x00,0x00,0x00,0x0c,0x0c,0x0a,0x06,0x00,0x00,0x00,0x00,0x0b,0x0b,0x0a,0x06,
+0x00,0x00,0x00,0x00,0x0b,0x0a,0x09,0x05,0x00,0x00,0x00,0x00,0x0a,0x0a,0x09,0x05,
+0x00,0x00,0x00,0x00,0x0a,0x09,0x08,0x05,0x00,0x00,0x00,0x00,0x09,0x09,0x08,0x05,
+0x00,0x00,0x00,0x00,0x09,0x08,0x07,0x04,0x00,0x00,0x00,0x00,0x06,0x00,0x2a,0xb0,
+0x05,0x00,0x2a,0xb0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
+0x08,0x28,0x28,0x28,0x28,0x28,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
+0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0xa0,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
+0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,
+0x04,0x04,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x41,0x41,0x41,0x41,0x41,0x41,0x01,
+0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,
+0x01,0x01,0x01,0x10,0x10,0x10,0x10,0x10,0x10,0x42,0x42,0x42,0x42,0x42,0x42,0x02,
+0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,
+0x02,0x02,0x02,0x10,0x10,0x10,0x10,0x08,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xa0,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
+0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
+0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,
+0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x10,
+0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,
+0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x10,
+0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x00,0xa5,0x76,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x26,0x72,0xb0,0x00,0x26,0x72,0xb0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x00,0x00,0x00,0x00,0x00,0x26,0x65,0x60,0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x02,
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x5a,0x00,0xb8,0xff,0xff,0xff,0xff,
+};
+
+u8 Rtl8192SEFwMainArray[MainArrayLength] = {
+0x0, };
+
+u8 Rtl8192SEFwDataArray[DataArrayLength] = {
+0x0, };
+
+u32 Rtl8192SEPHY_REG_2T2RArray[PHY_REG_2T2RArrayLength] = {
+0x01c,0x07000000,
+0x800,0x00040000,
+0x804,0x00008003,
+0x808,0x0000fc00,
+0x80c,0x0000000a,
+0x810,0x10005088,
+0x814,0x020c3d10,
+0x818,0x00200185,
+0x81c,0x00000000,
+0x820,0x01000000,
+0x824,0x00390004,
+0x828,0x01000000,
+0x82c,0x00390004,
+0x830,0x00000004,
+0x834,0x00690200,
+0x838,0x00000004,
+0x83c,0x00690200,
+0x840,0x00010000,
+0x844,0x00010000,
+0x848,0x00000000,
+0x84c,0x00000000,
+0x850,0x00000000,
+0x854,0x00000000,
+0x858,0x48484848,
+0x85c,0x65a965a9,
+0x860,0x0f7f0130,
+0x864,0x0f7f0130,
+0x868,0x0f7f0130,
+0x86c,0x0f7f0130,
+0x870,0x03000700,
+0x874,0x03000300,
+0x878,0x00020002,
+0x87c,0x004f0201,
+0x880,0xa8300ac1,
+0x884,0x00000058,
+0x888,0x00000008,
+0x88c,0x00000004,
+0x890,0x00000000,
+0x894,0xfffffffe,
+0x898,0x40302010,
+0x89c,0x00706050,
+0x8b0,0x00000000,
+0x8e0,0x00000000,
+0x8e4,0x00000000,
+0xe00,0x30333333,
+0xe04,0x2a2d2e2f,
+0xe08,0x00003232,
+0xe10,0x30333333,
+0xe14,0x2a2d2e2f,
+0xe18,0x30333333,
+0xe1c,0x2a2d2e2f,
+0xe30,0x01007c00,
+0xe34,0x01004800,
+0xe38,0x1000dc1f,
+0xe3c,0x10008c1f,
+0xe40,0x021400a0,
+0xe44,0x281600a0,
+0xe48,0xf8000001,
+0xe4c,0x00002910,
+0xe50,0x01007c00,
+0xe54,0x01004800,
+0xe58,0x1000dc1f,
+0xe5c,0x10008c1f,
+0xe60,0x021400a0,
+0xe64,0x281600a0,
+0xe6c,0x00002910,
+0xe70,0x31ed92fb,
+0xe74,0x361536fb,
+0xe78,0x361536fb,
+0xe7c,0x361536fb,
+0xe80,0x361536fb,
+0xe84,0x000d92fb,
+0xe88,0x000d92fb,
+0xe8c,0x31ed92fb,
+0xed0,0x31ed92fb,
+0xed4,0x31ed92fb,
+0xed8,0x000d92fb,
+0xedc,0x000d92fb,
+0xee0,0x000d92fb,
+0xee4,0x015e5448,
+0xee8,0x21555448,
+0x900,0x00000000,
+0x904,0x00000023,
+0x908,0x00000000,
+0x90c,0x01121313,
+0xa00,0x00d047c8,
+0xa04,0x80ff0008,
+0xa08,0x8ccd8300,
+0xa0c,0x2e62120f,
+0xa10,0x9500bb78,
+0xa14,0x11144028,
+0xa18,0x00881117,
+0xa1c,0x89140f00,
+0xa20,0x1a1b0000,
+0xa24,0x090e1317,
+0xa28,0x00000204,
+0xa2c,0x10d30000,
+0xc00,0x40071d40,
+0xc04,0x00a05633,
+0xc08,0x000000e4,
+0xc0c,0x6c6c6c6c,
+0xc10,0x08800000,
+0xc14,0x40000100,
+0xc18,0x08000000,
+0xc1c,0x40000100,
+0xc20,0x08000000,
+0xc24,0x40000100,
+0xc28,0x08000000,
+0xc2c,0x40000100,
+0xc30,0x6de9ac44,
+0xc34,0x469652cf,
+0xc38,0x49795994,
+0xc3c,0x0a979764,
+0xc40,0x1f7c403f,
+0xc44,0x000100b7,
+0xc48,0xec020000,
+0xc4c,0x007f037f,
+0xc50,0x69543420,
+0xc54,0x433c0094,
+0xc58,0x69543420,
+0xc5c,0x433c0094,
+0xc60,0x69543420,
+0xc64,0x433c0094,
+0xc68,0x69543420,
+0xc6c,0x433c0094,
+0xc70,0x2c7f000d,
+0xc74,0x0186155b,
+0xc78,0x0000001f,
+0xc7c,0x00b91612,
+0xc80,0x40000100,
+0xc84,0x20f60000,
+0xc88,0x20000080,
+0xc8c,0x20200000,
+0xc90,0x40000100,
+0xc94,0x00000000,
+0xc98,0x40000100,
+0xc9c,0x00000000,
+0xca0,0x00492492,
+0xca4,0x00000000,
+0xca8,0x00000000,
+0xcac,0x00000000,
+0xcb0,0x00000000,
+0xcb4,0x00000000,
+0xcb8,0x00000000,
+0xcbc,0x28000000,
+0xcc0,0x00000000,
+0xcc4,0x00000000,
+0xcc8,0x00000000,
+0xccc,0x00000000,
+0xcd0,0x00000000,
+0xcd4,0x00000000,
+0xcd8,0x64b22427,
+0xcdc,0x00766932,
+0xce0,0x00222222,
+0xce4,0x00000000,
+0xce8,0x37644302,
+0xcec,0x2f97d40c,
+0xd00,0x00000750,
+0xd04,0x00000403,
+0xd08,0x0000907f,
+0xd0c,0x00000001,
+0xd10,0xa0633333,
+0xd14,0x33333c63,
+0xd18,0x6a8f5b6b,
+0xd1c,0x00000000,
+0xd20,0x00000000,
+0xd24,0x00000000,
+0xd28,0x00000000,
+0xd2c,0xcc979975,
+0xd30,0x00000000,
+0xd34,0x00000000,
+0xd38,0x00000000,
+0xd3c,0x00027293,
+0xd40,0x00000000,
+0xd44,0x00000000,
+0xd48,0x00000000,
+0xd50,0x6437140a,
+0xd54,0x024dbd02,
+0xd58,0x00000000,
+0xd5c,0x30032064,
+0xd60,0x4653de68,
+0xd64,0x00518a3c,
+0xd68,0x00002101,
+0xf14,0x00000003,
+0xf4c,0x00000000,
+0xf00,0x00000300,
+};
+
+u32 Rtl8192SEPHY_REG_1T2RArray[PHY_REG_1T2RArrayLength] = {
+0x0, };
+
+u32 Rtl8192SEPHY_ChangeTo_1T1RArray[PHY_ChangeTo_1T1RArrayLength] = {
+0x844,0xffffffff,0x00010000,
+0x804,0x0000000f,0x00000001,
+0x824,0x00f0000f,0x00300004,
+0x82c,0x00f0000f,0x00100002,
+0x870,0x04000000,0x00000001,
+0x864,0x00000400,0x00000000,
+0x878,0x000f000f,0x00000002,
+0xe74,0x0f000000,0x00000002,
+0xe78,0x0f000000,0x00000002,
+0xe7c,0x0f000000,0x00000002,
+0xe80,0x0f000000,0x00000002,
+0x90c,0x000000ff,0x00000011,
+0xc04,0x000000ff,0x00000011,
+0xd04,0x0000000f,0x00000001,
+0x1f4,0xffff0000,0x00007777,
+0x234,0xf8000000,0x0000000a,
+};
+
+u32 Rtl8192SEPHY_ChangeTo_1T2RArray[PHY_ChangeTo_1T2RArrayLength] = {
+0x804,0x0000000f,0x00000003,
+0x824,0x00f0000f,0x00300004,
+0x82c,0x00f0000f,0x00300002,
+0x870,0x04000000,0x00000001,
+0x864,0x00000400,0x00000000,
+0x878,0x000f000f,0x00000002,
+0xe74,0x0f000000,0x00000002,
+0xe78,0x0f000000,0x00000002,
+0xe7c,0x0f000000,0x00000002,
+0xe80,0x0f000000,0x00000002,
+0x90c,0x000000ff,0x00000011,
+0xc04,0x000000ff,0x00000033,
+0xd04,0x0000000f,0x00000003,
+0x1f4,0xffff0000,0x00007777,
+0x234,0xf8000000,0x0000000a,
+};
+
+u32 Rtl8192SEPHY_ChangeTo_2T2RArray[PHY_ChangeTo_2T2RArrayLength] = {
+0x804,0x0000000f,0x00000003,
+0x824,0x00f0000f,0x00300004,
+0x82c,0x00f0000f,0x00300004,
+0x870,0x04000000,0x00000001,
+0x864,0x00000400,0x00000001,
+0x878,0x000f000f,0x00020002,
+0xe74,0x0f000000,0x00000006,
+0xe78,0x0f000000,0x00000006,
+0xe7c,0x0f000000,0x00000006,
+0xe80,0x0f000000,0x00000006,
+0x90c,0x000000ff,0x00000033,
+0xc04,0x000000ff,0x00000033,
+0xd04,0x0000000f,0x00000003,
+0x1f4,0xffff0000,0x0000ffff,
+0x234,0xf8000000,0x00000013,
+};
+
+u32 Rtl8192SEPHY_REG_Array_PG[PHY_REG_Array_PGLength] = {
+0xe00,0xffffffff,0x06090909,
+0xe04,0xffffffff,0x00030406,
+0xe08,0x0000ff00,0x00000000,
+0xe10,0xffffffff,0x0a0c0d0e,
+0xe14,0xffffffff,0x04070809,
+0xe18,0xffffffff,0x0a0c0d0e,
+0xe1c,0xffffffff,0x04070809,
+0xe00,0xffffffff,0x04040404,
+0xe04,0xffffffff,0x00020204,
+0xe08,0x0000ff00,0x00000000,
+0xe10,0xffffffff,0x02040404,
+0xe14,0xffffffff,0x00000002,
+0xe18,0xffffffff,0x02040404,
+0xe1c,0xffffffff,0x00000002,
+0xe00,0xffffffff,0x04040404,
+0xe04,0xffffffff,0x00020204,
+0xe08,0x0000ff00,0x00000000,
+0xe10,0xffffffff,0x02040404,
+0xe14,0xffffffff,0x00000002,
+0xe18,0xffffffff,0x02040404,
+0xe1c,0xffffffff,0x00000002,
+0xe00,0xffffffff,0x02020202,
+0xe04,0xffffffff,0x00020202,
+0xe08,0x0000ff00,0x00000000,
+0xe10,0xffffffff,0x02020202,
+0xe14,0xffffffff,0x00000002,
+0xe18,0xffffffff,0x02020202,
+0xe1c,0xffffffff,0x00000002,
+};
+
+u32 Rtl8192SERadioA_1T_Array[RadioA_1T_ArrayLength] = {
+0x000,0x00030159,
+0x001,0x00030250,
+0x002,0x00010000,
+0x010,0x0008000f,
+0x011,0x000231fc,
+0x010,0x000c000f,
+0x011,0x0003f9f8,
+0x010,0x0002000f,
+0x011,0x00020101,
+0x014,0x0001093e,
+0x014,0x0009093e,
+0x015,0x0000f8f4,
+0x017,0x000f6500,
+0x01a,0x00013056,
+0x01b,0x00060000,
+0x01c,0x00000300,
+0x01e,0x00031059,
+0x021,0x00054000,
+0x022,0x0000083c,
+0x023,0x00001558,
+0x024,0x00000060,
+0x025,0x00022583,
+0x026,0x0000f200,
+0x027,0x000eacf1,
+0x028,0x0009bd54,
+0x029,0x00004582,
+0x02a,0x00000001,
+0x02b,0x00021334,
+0x02a,0x00000000,
+0x02b,0x0000000a,
+0x02a,0x00000001,
+0x02b,0x00000808,
+0x02b,0x00053333,
+0x02c,0x0000000c,
+0x02a,0x00000002,
+0x02b,0x00000808,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x00000003,
+0x02b,0x00000808,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x00000004,
+0x02b,0x00000808,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x00000005,
+0x02b,0x00000709,
+0x02b,0x00053333,
+0x02c,0x0000000d,
+0x02a,0x00000006,
+0x02b,0x00000709,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x00000007,
+0x02b,0x00000709,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x00000008,
+0x02b,0x00000709,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x00000009,
+0x02b,0x0000060a,
+0x02b,0x00053333,
+0x02c,0x0000000d,
+0x02a,0x0000000a,
+0x02b,0x0000060a,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x0000000b,
+0x02b,0x0000060a,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x0000000c,
+0x02b,0x0000060a,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x0000000d,
+0x02b,0x0000050b,
+0x02b,0x00053333,
+0x02c,0x0000000d,
+0x02a,0x0000000e,
+0x02b,0x0000050b,
+0x02b,0x00066623,
+0x02c,0x0000001a,
+0x02a,0x000e4000,
+0x030,0x00020000,
+0x031,0x000b9631,
+0x032,0x0000130d,
+0x033,0x00000187,
+0x013,0x00019e6c,
+0x013,0x00015e94,
+0x000,0x00010159,
+0x018,0x0000f401,
+0x0fe,0x00000000,
+0x01e,0x0003105b,
+0x0fe,0x00000000,
+0x000,0x00030159,
+0x010,0x0004000f,
+0x011,0x000203f9,
+};
+
+u32 Rtl8192SERadioB_Array[RadioB_ArrayLength] = {
+0x000,0x00030159,
+0x001,0x00001041,
+0x002,0x00011000,
+0x005,0x00080fc0,
+0x007,0x000fc803,
+0x013,0x00017cb0,
+0x013,0x00011cc0,
+0x013,0x0000dc60,
+0x013,0x00008c60,
+0x013,0x00004450,
+0x013,0x00000020,
+};
+
+u32 Rtl8192SERadioA_to1T_Array[RadioA_to1T_ArrayLength] = {
+0x000,0x00030159,
+0x001,0x00030250,
+0x002,0x00010000,
+0x010,0x0008000f,
+0x011,0x000231fc,
+0x010,0x000c000f,
+0x011,0x0003f9f8,
+0x014,0x0001093e,
+0x014,0x0009093e,
+0x015,0x000198f4,
+0x017,0x000f6500,
+0x01a,0x00013056,
+0x01b,0x00060000,
+0x01c,0x00000300,
+0x01e,0x00031059,
+0x021,0x00054000,
+0x022,0x0000083c,
+0x023,0x00001558,
+0x024,0x00000060,
+0x025,0x00022583,
+0x026,0x0000f200,
+0x027,0x000eacf1,
+0x028,0x000dbd54,
+0x029,0x00004582,
+0x02a,0x00000001,
+0x02b,0x00021334,
+0x02a,0x00000000,
+0x02b,0x0000000a,
+0x02a,0x00000001,
+0x02b,0x00000808,
+0x02b,0x00053333,
+0x02c,0x0000000c,
+0x02a,0x00000002,
+0x02b,0x00000808,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x00000003,
+0x02b,0x00000808,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x00000004,
+0x02b,0x00000808,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x00000005,
+0x02b,0x00000709,
+0x02b,0x00053333,
+0x02c,0x0000000d,
+0x02a,0x00000006,
+0x02b,0x00000709,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x00000007,
+0x02b,0x00000709,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x00000008,
+0x02b,0x00000709,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x00000009,
+0x02b,0x0000060a,
+0x02b,0x00053333,
+0x02c,0x0000000d,
+0x02a,0x0000000a,
+0x02b,0x0000060a,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x0000000b,
+0x02b,0x0000060a,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x0000000c,
+0x02b,0x0000060a,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x0000000d,
+0x02b,0x0000050b,
+0x02b,0x00053333,
+0x02c,0x0000000d,
+0x02a,0x0000000e,
+0x02b,0x0000050b,
+0x02b,0x00066623,
+0x02c,0x0000001a,
+0x02a,0x000e4000,
+0x030,0x00020000,
+0x031,0x000b9631,
+0x033,0x00000187,
+0x013,0x00019e6c,
+0x013,0x00015e94,
+0x000,0x00010159,
+0x018,0x0000f401,
+0x0fe,0x00000000,
+0x01e,0x0003105b,
+0x0fe,0x00000000,
+0x000,0x00030159,
+0x010,0x0004000f,
+0x011,0x000203f9,
+};
+
+u32 Rtl8192SERadioA_to2T_Array[RadioA_to2T_ArrayLength] = {
+0x000,0x00030159,
+0x001,0x00030250,
+0x002,0x00010000,
+0x010,0x0008000f,
+0x011,0x000231fc,
+0x010,0x000c000f,
+0x011,0x0003f9f8,
+0x014,0x0001093e,
+0x014,0x0009093e,
+0x015,0x000198f4,
+0x017,0x000f6500,
+0x01a,0x00013056,
+0x01b,0x00060000,
+0x01c,0x00000300,
+0x01e,0x00031059,
+0x021,0x00054000,
+0x022,0x0000083c,
+0x023,0x00001558,
+0x024,0x00000060,
+0x025,0x00022583,
+0x026,0x0000f200,
+0x027,0x000eacf1,
+0x028,0x000dbd54,
+0x029,0x00004582,
+0x02a,0x00000001,
+0x02b,0x00021334,
+0x02a,0x00000000,
+0x02b,0x0000000a,
+0x02a,0x00000001,
+0x02b,0x00000808,
+0x02b,0x00053333,
+0x02c,0x0000000c,
+0x02a,0x00000002,
+0x02b,0x00000808,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x00000003,
+0x02b,0x00000808,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x00000004,
+0x02b,0x00000808,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x00000005,
+0x02b,0x00000709,
+0x02b,0x00053333,
+0x02c,0x0000000d,
+0x02a,0x00000006,
+0x02b,0x00000709,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x00000007,
+0x02b,0x00000709,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x00000008,
+0x02b,0x00000709,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x00000009,
+0x02b,0x0000060a,
+0x02b,0x00053333,
+0x02c,0x0000000d,
+0x02a,0x0000000a,
+0x02b,0x0000060a,
+0x02b,0x0005b333,
+0x02c,0x0000000d,
+0x02a,0x0000000b,
+0x02b,0x0000060a,
+0x02b,0x00063333,
+0x02c,0x0000000d,
+0x02a,0x0000000c,
+0x02b,0x0000060a,
+0x02b,0x0006b333,
+0x02c,0x0000000d,
+0x02a,0x0000000d,
+0x02b,0x0000050b,
+0x02b,0x00053333,
+0x02c,0x0000000d,
+0x02a,0x0000000e,
+0x02b,0x0000050b,
+0x02b,0x00066623,
+0x02c,0x0000001a,
+0x02a,0x000e4000,
+0x030,0x00020000,
+0x031,0x000b9631,
+0x033,0x00000187,
+0x013,0x00019e6c,
+0x013,0x00015e94,
+0x000,0x00010159,
+0x018,0x0000f401,
+0x0fe,0x00000000,
+0x01e,0x0003105b,
+0x0fe,0x00000000,
+0x000,0x00030159,
+0x010,0x0004000f,
+0x011,0x000203f9,
+};
+
+u32 Rtl8192SERadioB_GM_Array[RadioB_GM_ArrayLength] = {
+0x000,0x00030159,
+0x001,0x00001041,
+0x002,0x00011000,
+0x005,0x00080fc0,
+0x007,0x000fc803,
+};
+
+u32 Rtl8192SEMAC_2T_Array[MAC_2T_ArrayLength] = {
+0x020,0x00000035,
+0x048,0x0000000e,
+0x049,0x000000f0,
+0x04a,0x00000077,
+0x04b,0x00000083,
+0x0b5,0x00000021,
+0x0dc,0x000000ff,
+0x0dd,0x000000ff,
+0x0de,0x000000ff,
+0x0df,0x000000ff,
+0x116,0x00000000,
+0x117,0x00000000,
+0x118,0x00000000,
+0x119,0x00000000,
+0x11a,0x00000000,
+0x11b,0x00000000,
+0x11c,0x00000000,
+0x11d,0x00000000,
+0x160,0x0000000b,
+0x161,0x0000000b,
+0x162,0x0000000b,
+0x163,0x0000000b,
+0x164,0x0000000b,
+0x165,0x0000000b,
+0x166,0x0000000b,
+0x167,0x0000000b,
+0x168,0x0000000b,
+0x169,0x0000000b,
+0x16a,0x0000000b,
+0x16b,0x0000000b,
+0x16c,0x0000000b,
+0x16d,0x0000000b,
+0x16e,0x0000000b,
+0x16f,0x0000000b,
+0x170,0x0000000b,
+0x171,0x0000000b,
+0x172,0x0000000b,
+0x173,0x0000000b,
+0x174,0x0000000b,
+0x175,0x0000000b,
+0x176,0x0000000b,
+0x177,0x0000000b,
+0x178,0x0000000b,
+0x179,0x0000000b,
+0x17a,0x0000000b,
+0x17b,0x0000000b,
+0x17c,0x0000000b,
+0x17d,0x0000000b,
+0x17e,0x0000000b,
+0x17f,0x0000000b,
+0x236,0x0000000c,
+0x503,0x00000022,
+0x560,0x00000000,
+};
+
+u32 Rtl8192SEMACPHY_Array_PG[MACPHY_Array_PGLength] = {
+0x0, };
+
+u32 Rtl8192SEAGCTAB_Array[AGCTAB_ArrayLength] = {
+0xc78,0x7f000001,
+0xc78,0x7f010001,
+0xc78,0x7e020001,
+0xc78,0x7d030001,
+0xc78,0x7c040001,
+0xc78,0x7b050001,
+0xc78,0x7a060001,
+0xc78,0x79070001,
+0xc78,0x78080001,
+0xc78,0x77090001,
+0xc78,0x760a0001,
+0xc78,0x750b0001,
+0xc78,0x740c0001,
+0xc78,0x730d0001,
+0xc78,0x720e0001,
+0xc78,0x710f0001,
+0xc78,0x70100001,
+0xc78,0x6f110001,
+0xc78,0x6f120001,
+0xc78,0x6e130001,
+0xc78,0x6d140001,
+0xc78,0x6d150001,
+0xc78,0x6c160001,
+0xc78,0x6b170001,
+0xc78,0x6a180001,
+0xc78,0x6a190001,
+0xc78,0x691a0001,
+0xc78,0x681b0001,
+0xc78,0x671c0001,
+0xc78,0x661d0001,
+0xc78,0x651e0001,
+0xc78,0x641f0001,
+0xc78,0x63200001,
+0xc78,0x4c210001,
+0xc78,0x4b220001,
+0xc78,0x4a230001,
+0xc78,0x49240001,
+0xc78,0x48250001,
+0xc78,0x47260001,
+0xc78,0x46270001,
+0xc78,0x45280001,
+0xc78,0x44290001,
+0xc78,0x2c2a0001,
+0xc78,0x2b2b0001,
+0xc78,0x2a2c0001,
+0xc78,0x292d0001,
+0xc78,0x282e0001,
+0xc78,0x272f0001,
+0xc78,0x26300001,
+0xc78,0x25310001,
+0xc78,0x24320001,
+0xc78,0x23330001,
+0xc78,0x22340001,
+0xc78,0x09350001,
+0xc78,0x08360001,
+0xc78,0x07370001,
+0xc78,0x06380001,
+0xc78,0x05390001,
+0xc78,0x043a0001,
+0xc78,0x033b0001,
+0xc78,0x023c0001,
+0xc78,0x013d0001,
+0xc78,0x003e0001,
+0xc78,0x003f0001,
+0xc78,0x7f400001,
+0xc78,0x7f410001,
+0xc78,0x7e420001,
+0xc78,0x7d430001,
+0xc78,0x7c440001,
+0xc78,0x7b450001,
+0xc78,0x7a460001,
+0xc78,0x79470001,
+0xc78,0x78480001,
+0xc78,0x77490001,
+0xc78,0x764a0001,
+0xc78,0x754b0001,
+0xc78,0x744c0001,
+0xc78,0x734d0001,
+0xc78,0x724e0001,
+0xc78,0x714f0001,
+0xc78,0x70500001,
+0xc78,0x6f510001,
+0xc78,0x6f520001,
+0xc78,0x6e530001,
+0xc78,0x6d540001,
+0xc78,0x6d550001,
+0xc78,0x6c560001,
+0xc78,0x6b570001,
+0xc78,0x6a580001,
+0xc78,0x6a590001,
+0xc78,0x695a0001,
+0xc78,0x685b0001,
+0xc78,0x675c0001,
+0xc78,0x665d0001,
+0xc78,0x655e0001,
+0xc78,0x645f0001,
+0xc78,0x63600001,
+0xc78,0x4c610001,
+0xc78,0x4b620001,
+0xc78,0x4a630001,
+0xc78,0x49640001,
+0xc78,0x48650001,
+0xc78,0x47660001,
+0xc78,0x46670001,
+0xc78,0x45680001,
+0xc78,0x44690001,
+0xc78,0x2c6a0001,
+0xc78,0x2b6b0001,
+0xc78,0x2a6c0001,
+0xc78,0x296d0001,
+0xc78,0x286e0001,
+0xc78,0x276f0001,
+0xc78,0x26700001,
+0xc78,0x25710001,
+0xc78,0x24720001,
+0xc78,0x23730001,
+0xc78,0x22740001,
+0xc78,0x09750001,
+0xc78,0x08760001,
+0xc78,0x07770001,
+0xc78,0x06780001,
+0xc78,0x05790001,
+0xc78,0x047a0001,
+0xc78,0x037b0001,
+0xc78,0x027c0001,
+0xc78,0x017d0001,
+0xc78,0x007e0001,
+0xc78,0x007f0001,
+0xc78,0x3000001e,
+0xc78,0x3001001e,
+0xc78,0x3002001e,
+0xc78,0x3003001e,
+0xc78,0x3004001e,
+0xc78,0x3405001e,
+0xc78,0x3806001e,
+0xc78,0x3e07001e,
+0xc78,0x3e08001e,
+0xc78,0x4409001e,
+0xc78,0x460a001e,
+0xc78,0x480b001e,
+0xc78,0x480c001e,
+0xc78,0x4e0d001e,
+0xc78,0x560e001e,
+0xc78,0x5a0f001e,
+0xc78,0x5e10001e,
+0xc78,0x6211001e,
+0xc78,0x6c12001e,
+0xc78,0x7213001e,
+0xc78,0x7214001e,
+0xc78,0x7215001e,
+0xc78,0x7216001e,
+0xc78,0x7217001e,
+0xc78,0x7218001e,
+0xc78,0x7219001e,
+0xc78,0x721a001e,
+0xc78,0x721b001e,
+0xc78,0x721c001e,
+0xc78,0x721d001e,
+0xc78,0x721e001e,
+0xc78,0x721f001e,
+};
+
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl8192s/r8192S_firmware.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl8192s/r8192S_firmware.h
@@ -0,0 +1,419 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+#ifndef __INC_FIRMWARE_H
+#define __INC_FIRMWARE_H
+
+#include "r8192S_def.h"
+
+#define 	RTL8190_MAX_FIRMWARE_CODE_SIZE	64000	
+#define 	RTL8190_CPU_START_OFFSET			0x80
+#define	MAX_FIRMWARE_CODE_SIZE	0xFF00  
+
+#define		H2C_TX_CMD_HDR_LEN				8
+
+#define		RTL8192S_FW_PKT_FRAG_SIZE		0x4000	
+
+#ifdef RTL8192SE
+#define GET_COMMAND_PACKET_FRAG_THRESHOLD(v)	4*(v/4) - 8
+#else 
+#define GET_COMMAND_PACKET_FRAG_THRESHOLD(v)	(4*(v/4) - 8 - USB_HWDESC_HEADER_LEN)
+#endif
+
+typedef enum _DESC_PACKET_TYPE{
+	DESC_PACKET_TYPE_INIT = 0,
+	DESC_PACKET_TYPE_NORMAL = 1,	
+}DESC_PACKET_TYPE;
+
+
+#ifdef RTL8192S
+typedef enum _firmware_init_step{
+	FW_INIT_STEP0_IMEM = 0,
+	FW_INIT_STEP1_MAIN = 1,
+	FW_INIT_STEP2_DATA = 2,
+}firmware_init_step_e;
+#else
+typedef enum _firmware_init_step{
+	FW_INIT_STEP0_BOOT = 0,
+	FW_INIT_STEP1_MAIN = 1,
+	FW_INIT_STEP2_DATA = 2,
+}firmware_init_step_e;
+#endif
+
+typedef enum _firmware_source{
+	FW_SOURCE_IMG_FILE = 0,
+	FW_SOURCE_HEADER_FILE = 1,		
+}firmware_source_e, *pfirmware_source_e;
+
+typedef enum _opt_rst_type{
+	OPT_SYSTEM_RESET = 0,
+	OPT_FIRMWARE_RESET = 1,
+}opt_rst_type_e;
+
+typedef enum _FIRMWARE_STATUS{
+	FW_STATUS_0_INIT = 0,
+	FW_STATUS_1_MOVE_BOOT_CODE = 1,
+	FW_STATUS_2_MOVE_MAIN_CODE = 2,
+	FW_STATUS_3_TURNON_CPU = 3,
+	FW_STATUS_4_MOVE_DATA_CODE = 4,
+	FW_STATUS_5_READY = 5,
+}FIRMWARE_STATUS;
+
+typedef enum _H2C_CMD{
+	FW_H2C_SETPWRMODE	= 0,
+	FW_H2C_JOINBSSRPT	= 1,
+	FW_H2C_WoWLAN_UPDATE_GTK = 2,
+	FW_H2C_WoWLAN_UPDATE_IV = 3,
+	FW_H2C_WoWLAN_OFFLOAD = 4,
+	FW_H2C_SITESURVEY=5,
+}H2C_CMD;
+
+ typedef struct _H2C_SETPWRMODE_PARM {
+ 	u8	mode;
+ 	u8	flag_low_traffic_en; 
+ 	u8	flag_lpnav_en;
+ 	u8	flag_rf_low_snr_en;
+ 	u8	flag_dps_en; 
+ 	u8	bcn_rx_en;
+ 	u8	bcn_pass_cnt;
+ 	u8	bcn_to;  // beacon TO (ms). ¡§=0¡¨ no limit.
+ 	u16	bcn_itv;
+ 	u8	app_itv; 
+ 	u8	awake_bcn_itvl;
+ 	u8	smart_ps;
+	u8	bcn_pass_period; 
+ }H2C_SETPWRMODE_PARM, *PH2C_SETPWRMODE_PARM; 
+
+typedef struct _H2C_JOINBSSRPT_PARM {	
+	u8	OpMode;	
+	u8	Ps_Qos_Info;
+	u8	Bssid[6];	
+	u16	BcnItv;	
+	u16	Aid;
+}H2C_JOINBSSRPT_PARM, *PH2C_JOINBSSRPT_PARM;
+
+typedef struct _H2C_WPA_PTK {
+ 	u8 	kck[16]; /* EAPOL-Key Key Confirmation Key (KCK) */
+ 	u8 	kek[16]; /* EAPOL-Key Key Encryption Key (KEK) */
+	u8	tk1[16]; /* Temporal Key 1 (TK1) */
+	union {
+		u8	tk2[16]; 
+		struct {
+			u8	tx_mic_key[8];
+			u8	rx_mic_key[8];
+		}Athu;
+	}U;
+}H2C_WPA_PTK;
+
+typedef struct _H2C_WPA_TWO_WAY_PARA{
+	u8			pairwise_en_alg;
+	u8			group_en_alg;
+	H2C_WPA_PTK		wpa_ptk_value;
+}H2C_WPA_TWO_WAY_PARA, *PH2C_WPA_TWO_WAY_PARA;
+
+typedef struct _tx_desc_8192se_fw{
+
+        u32             PktSize:16;
+        u32             Offset:8;
+        u32             Type:2; 
+        u32             LastSeg:1;
+        u32             FirstSeg:1;
+        u32             LINIP:1;
+        u32             AMSDU:1;
+        u32             GF:1;
+        u32             OWN:1;
+
+        u32             MacID:5;
+        u32             MoreData:1;
+        u32             MoreFrag:1;
+        u32             PIFS:1;
+        u32             QueueSel:5;
+        u32             AckPolicy:2;
+        u32             NoACM:1;
+        u32             NonQos:1;
+        u32             KeyID:2;
+        u32             OUI:1;
+        u32             PktType:1;
+        u32             EnDescID:1;
+        u32             SecType:2;
+        u32             HTC:1;  
+        u32             WDS:1;  
+        u32             PktOffset:5;    
+        u32             HWPC:1;
+
+        u32             DataRetryLmt:6;
+        u32             RetryLmtEn:1;
+        u32             TSFL:5;
+        u32             RTSRC:6;        
+        u32             DATARC:6;       
+
+        u32             Rsvd1:5;
+        u32             AggEn:1;
+        u32             BK:1;   
+        u32             OwnMAC:1;
+
+        u32             NextHeadPage:8;
+        u32             TailPage:8;
+        u32             Seq:12;
+        u32             Frag:4;
+
+        u32             RTSRate:6;
+        u32             DisRTSFB:1;
+        u32             RTSRateFBLmt:4;
+        u32             CTS2Self:1;
+        u32             RTSEn:1;
+        u32             RaBRSRID:3;     
+        u32             TXHT:1;
+        u32             TxShort:1;
+        u32             TxBw:1;
+        u32             TXSC:2;
+        u32             STBC:2;
+        u32             RD:1;
+        u32             RTSHT:1;
+        u32             RTSShort:1;
+        u32             RTSBW:1;
+        u32             RTSSC:2;
+        u32             RTSSTBC:2;
+        u32             UserRate:1;
+
+        u32             PktID:9;
+        u32             TxRate:6;
+        u32             DISFB:1;
+        u32             DataRateFBLmt:5;
+        u32             TxAGC:11;
+
+        u32             IPChkSum:16;
+        u32             TCPChkSum:16;
+
+        u32             TxBufferSize:16;
+        u32             IPHdrOffset:8;
+        u32             Rsvd3:7;
+        u32             TCPEn:1;
+} tx_desc_fw, *ptx_desc_fw;
+
+typedef struct _H2C_SITESURVEY_PARA {
+    	u32 		start_flag; 
+    	u32 		probe_req_len; 
+  	tx_desc_fw	desc;		
+	u8		probe_req[0];
+}H2C_SITESURVEY_PARA, *PH2C_SITESURVEY_PARA;
+
+ typedef enum _FIRMWARE_H2C_CMD{
+	H2C_Read_MACREG_CMD ,		/*0*/
+	H2C_Write_MACREG_CMD ,		
+	H2C_ReadBB_CMD ,	
+	H2C_WriteBB_CMD ,		
+	H2C_ReadRF_CMD ,		
+	H2C_WriteRF_CMD ,		/*5*/
+	H2C_Read_EEPROM_CMD ,		
+	H2C_Write_EEPROM_CMD ,		
+	H2C_Read_EFUSE_CMD ,		
+	H2C_Write_EFUSE_CMD ,		
+	H2C_Read_CAM_CMD ,			/*10*/
+	H2C_Write_CAM_CMD ,			
+	H2C_setBCNITV_CMD,
+	H2C_setMBIDCFG_CMD,
+	H2C_JoinBss_CMD ,				
+	H2C_DisConnect_CMD,			/*15*/
+	H2C_CreateBss_CMD ,
+	H2C_SetOpMode_CMD,	
+	H2C_SiteSurvey_CMD,
+	H2C_SetAuth_CMD,
+	H2C_SetKey_CMD ,				/*20*/
+	H2C_SetStaKey_CMD ,
+	H2C_SetAssocSta_CMD,
+	H2C_DelAssocSta_CMD ,
+	H2C_SetStaPwrState_CMD ,
+	H2C_SetBasicRate_CMD ,		/*25*/
+	H2C_GetBasicRate_CMD ,
+	H2C_SetDataRate_CMD ,
+	H2C_GetDataRate_CMD ,
+	H2C_SetPhyInfo_CMD ,
+	H2C_GetPhyInfo_CMD ,			/*30*/
+	H2C_SetPhy_CMD ,
+	H2C_GetPhy_CMD ,
+	H2C_readRssi_CMD ,
+	H2C_readGain_CMD ,
+	H2C_SetAtim_CMD ,			/*35*/
+	H2C_SetPwrMode_CMD ,
+	H2C_JoinbssRpt_CMD,
+	H2C_SetRaTable_CMD ,	
+	H2C_GetRaTable_CMD ,	
+	H2C_GetCCXReport_CMD,            /*40*/
+	H2C_GetDTMReport_CMD,		
+	H2C_GetTXRateStatistics_CMD,
+	H2C_SetUsbSuspend_CMD,
+	H2C_SetH2cLbk_CMD ,
+	H2C_tmp1 ,			/*45*/
+	H2C_WoWLAN_UPDATE_GTK_CMD ,	
+	H2C_WoWLAN_FW_OFFLOAD , 
+	H2C_tmp2 , 
+	H2C_tmp3 , 
+	H2C_WoWLAN_UPDATE_IV_CMD , 		/*50*/		
+	H2C_tmp4,	
+	MAX_H2CCMD							/*52*/
+}FIRMWARE_H2C_CMD;
+
+
+typedef  struct _RT_8192S_FIRMWARE_PRIV { 
+
+	u8		signature_0;		
+	u8		signature_1;		
+	u8		hci_sel;			
+	u8		chip_version;	
+	u8		customer_ID_0;	
+	u8		customer_ID_1;	
+	u8		rf_config;		
+	u8		usb_ep_num;	
+	
+	u8		regulatory_class_0;	
+	u8		regulatory_class_1;	
+	u8		regulatory_class_2;	
+	u8		regulatory_class_3;	
+	u8		rfintfs;				
+	u8		def_nettype;		
+	u8		rsvd010;
+	u8		rsvd011;
+	
+	
+	u8		lbk_mode;	
+	u8		mp_mode;	
+	u8		rsvd020;
+	u8		rsvd021;
+	u8		rsvd022;
+	u8		rsvd023;
+	u8		rsvd024;
+	u8		rsvd025;
+
+	u8		qos_en;				
+	u8		bw_40MHz_en;		
+	u8		AMSDU2AMPDU_en;	
+	u8		AMPDU_en;			
+	u8		rate_control_offload;
+	u8		aggregation_offload;	
+	u8		rsvd030;
+	u8		rsvd031;
+
+	
+	unsigned char		beacon_offload;			
+	unsigned char		MLME_offload;			
+	unsigned char		hwpc_offload;			
+	unsigned char		tcp_checksum_offload;	
+	unsigned char		tcp_offload;				
+	unsigned char		ps_control_offload;		
+	unsigned char		WWLAN_offload;			
+	unsigned char		rsvd040;
+
+	u8		tcp_tx_frame_len_L;		
+	u8		tcp_tx_frame_len_H;		
+	u8		tcp_rx_frame_len_L;		
+	u8		tcp_rx_frame_len_H;		
+	u8		rsvd050;
+	u8		rsvd051;
+	u8		rsvd052;
+	u8		rsvd053;
+}RT_8192S_FIRMWARE_PRIV, *PRT_8192S_FIRMWARE_PRIV;
+
+typedef struct _RT_8192S_FIRMWARE_HDR {
+
+	u16		Signature;
+	u16		Version;		  
+	u32		DMEMSize;    
+
+
+	u32		IMG_IMEM_SIZE;    
+	u32		IMG_SRAM_SIZE;    
+
+	u32		FW_PRIV_SIZE;       
+	u32		Rsvd0;  
+
+	u32		Rsvd1;
+	u32		Rsvd2;
+
+	RT_8192S_FIRMWARE_PRIV	FWPriv;
+	
+}RT_8192S_FIRMWARE_HDR, *PRT_8192S_FIRMWARE_HDR;
+
+#define	RT_8192S_FIRMWARE_HDR_SIZE	80
+#define   RT_8192S_FIRMWARE_HDR_EXCLUDE_PRI_SIZE	32
+
+typedef enum _FIRMWARE_8192S_STATUS{
+	FW_STATUS_INIT = 0,
+	FW_STATUS_LOAD_IMEM = 1,
+	FW_STATUS_LOAD_EMEM = 2,
+	FW_STATUS_LOAD_DMEM = 3,
+	FW_STATUS_READY = 4,
+}FIRMWARE_8192S_STATUS;
+
+typedef struct _rt_firmware{	
+	firmware_source_e	eFWSource;	
+	PRT_8192S_FIRMWARE_HDR	pFwHeader;
+	FIRMWARE_8192S_STATUS	FWStatus;
+	u16		FirmwareVersion;
+	u8		FwIMEM[RTL8190_MAX_FIRMWARE_CODE_SIZE];
+	u8		FwEMEM[RTL8190_MAX_FIRMWARE_CODE_SIZE];
+	u32		FwIMEMLen;
+	u32		FwEMEMLen;	
+	u8		szFwTmpBuffer[164000];	
+	u32		szFwTmpBufferLen;
+	u16		CmdPacketFragThresold;		
+}rt_firmware, *prt_firmware;
+
+#define		FW_DIG_ENABLE_CTL			BIT0
+#define		FW_HIGH_PWR_ENABLE_CTL	BIT1
+#define		FW_SS_CTL					BIT2
+#define		FW_RA_INIT_CTL				BIT3
+#define		FW_RA_BG_CTL				BIT4
+#define		FW_RA_N_CTL				BIT5
+#define		FW_PWR_TRK_CTL			BIT6
+#define		FW_IQK_CTL					BIT7
+#define		FW_FA_CTL					BIT8
+#define		FW_DRIVER_CTRL_DM_CTL		BIT9
+#define		FW_PAPE_CTL_BY_SW_HW	BIT10
+#define		FW_DISABLE_ALL_DM			0
+
+#define		FW_PWR_TRK_PARAM_CLR		0x0000ffff
+#define		FW_RA_PARAM_CLR			0xffff0000
+
+#define FW_CMD_IO_CLR(priv, _Bit)		\
+	udelay(1000);	\
+	priv->FwCmdIOMap &= (~_Bit);
+
+#define FW_CMD_IO_UPDATE(priv, _val)		\
+	priv->FwCmdIOMap = _val;
+
+#define FW_CMD_IO_SET(priv, _val) 	\
+	write_nic_word(priv->rtllib->dev, LBUS_MON_ADDR, (u16)_val);	\
+	FW_CMD_IO_UPDATE(priv, _val);\
+
+#define FW_CMD_PARA_SET(priv, _val) 		\
+	write_nic_dword(priv->rtllib->dev, LBUS_ADDR_MASK, _val);	\
+	priv->FwCmdIOParam = _val;
+
+#define FW_CMD_IO_QUERY(priv)	(u16)(priv->FwCmdIOMap)
+#define FW_CMD_IO_PARA_QUERY(priv)	((u32)(priv->FwCmdIOParam))
+
+bool FirmwareEnableCPU(struct net_device *dev);
+bool FirmwareCheckReady(struct net_device *dev, u8 LoadFWStatus);
+
+bool FirmwareDownload92S(struct net_device *dev);
+int rtl8192se_send_scan_cmd(struct net_device 	*dev, bool start);
+
+void rtl8192se_dump_skb_data(struct sk_buff *skb);
+#endif
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl8192s/r8192S_mp.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl8192s/r8192S_mp.h
@@ -0,0 +1,185 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * Based on the r8180 driver, which is:
+ * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+
+#ifndef __INC_HAL8192S_MP_H
+#define __INC_HAL8192S_MP_H
+
+/*--------------------------Define Parameters-------------------------------*/
+
+#define MPT_NOOP				0
+#define MPT_READ_MAC_1BYTE			1
+#define MPT_READ_MAC_2BYTE			2
+#define MPT_READ_MAC_4BYTE			3
+#define MPT_WRITE_MAC_1BYTE			4
+#define MPT_WRITE_MAC_2BYTE			5
+#define MPT_WRITE_MAC_4BYTE			6
+#define MPT_READ_BB_CCK				7
+#define MPT_WRITE_BB_CCK				8
+#define MPT_READ_BB_OFDM				9
+#define MPT_WRITE_BB_OFDM				10
+#define MPT_READ_RF					11
+#define MPT_WRITE_RF					12
+#define MPT_READ_EEPROM_1BYTE			13
+#define MPT_WRITE_EEPROM_1BYTE		14
+#define MPT_READ_EEPROM_2BYTE			15
+#define MPT_WRITE_EEPROM_2BYTE		16
+#define MPT_SET_CSTHRESHOLD			21
+#define MPT_SET_INITGAIN				22
+#define MPT_SWITCH_BAND				23
+#define MPT_SWITCH_CHANNEL			24
+#define MPT_SET_DATARATE				25
+#define MPT_SWITCH_ANTENNA			26
+#define MPT_SET_TX_POWER				27
+#define MPT_SET_CONT_TX				28
+#define MPT_SET_SINGLE_CARRIER		29
+#define MPT_SET_CARRIER_SUPPRESSION	30
+
+#define MPT_SET_ANTENNA_GAIN_OFFSET	40
+#define MPT_SET_CRYSTAL_CAP			41
+#define MPT_TRIGGER_RF_THERMAL_METER	42		
+#define MPT_SET_SINGLE_TONE			43		
+#define MPT_READ_RF_THERMAL_METER	44		
+#define MPT_SWITCH_BAND_WIDTH		45		
+#define MPT_QUERY_TSSI_VALUE     		46          
+#define MPT_SET_TX_POWER_ADJUST          47
+#define MPT_DO_TX_POWER_TRACK		48
+#define MPT_QUERY_NIC_TYPE				49
+#define MPT_QUERY_WPS_PUSHED			50
+#define MPT_SET_LED_CONTROL			51
+#define MPT_TX_POWER_TRACK_CONTROL	52		
+
+#define MPT_WRITE_EFUSE_1BYTE  		53
+#define MPT_READ_EFUSE_1BYTE			54
+#define MPT_READ_EFUSE_2BYTE			55
+#define MPT_READ_EFUSE_4BYTE			56
+#define MPT_UPDATE_EFUSE				57
+#define MPT_UPDATE_EFUSE_UTILIZE		58
+#define MPT_UPDATE_AUTOLOAD_STS		59
+
+#define MAX_TX_PWR_INDEX_N_MODE 		64
+/*--------------------------Define Parameters-------------------------------*/
+
+/*------------------------------Define structure----------------------------*/ 
+/* MP set force data rate base on the definition. */
+typedef enum _MPT_RATE_INDEX{
+	/* CCK rate. */
+	MPT_RATE_1M = 1, 
+	MPT_RATE_2M,
+	MPT_RATE_55M,
+	MPT_RATE_11M,
+
+	/* OFDM rate. */
+	MPT_RATE_6M,
+	MPT_RATE_9M,
+	MPT_RATE_12M,
+	MPT_RATE_18M,
+	MPT_RATE_24M,
+	MPT_RATE_36M,
+	MPT_RATE_48M,
+	MPT_RATE_54M,
+	
+	/* HT rate. */
+	MPT_RATE_MCS0,
+	MPT_RATE_MCS1,
+	MPT_RATE_MCS2,
+	MPT_RATE_MCS3,
+	MPT_RATE_MCS4,
+	MPT_RATE_MCS5,
+	MPT_RATE_MCS6,
+	MPT_RATE_MCS7,
+	MPT_RATE_MCS8,
+	MPT_RATE_MCS9,
+	MPT_RATE_MCS10,
+	MPT_RATE_MCS11,
+	MPT_RATE_MCS12,
+	MPT_RATE_MCS13,
+	MPT_RATE_MCS14,
+	MPT_RATE_MCS15,
+	MPT_RATE_LAST
+	 
+}MPT_RATE_E, *PMPT_RATE_E;
+
+typedef enum _MPT_Bandwidth_Switch_Mode{
+	BAND_20MHZ_MODE = 0,
+	BAND_40MHZ_DUPLICATE_MODE = 1,
+	BAND_40MHZ_LOWER_MODE = 2,
+	BAND_40MHZ_UPPER_MODE = 3,
+	BAND_40MHZ_DONTCARE_MODE = 4
+}MPT_BANDWIDTH_MODE_E, *PMPT_BANDWIDTH_MODE_E;
+
+typedef enum _TxAGC_Offset{
+        TxAGC_Offset_0 	= 0x00,
+        TxAGC_Offset_1,
+        TxAGC_Offset_2,
+        TxAGC_Offset_3,
+        TxAGC_Offset_4,
+        TxAGC_Offset_5,
+        TxAGC_Offset_6,
+        TxAGC_Offset_7,
+        TxAGC_Offset_neg8,
+        TxAGC_Offset_neg7,
+        TxAGC_Offset_neg6,
+        TxAGC_Offset_neg5,
+        TxAGC_Offset_neg4,
+        TxAGC_Offset_neg3,
+        TxAGC_Offset_neg2,
+        TxAGC_Offset_neg1
+} TxAGC_Offset;
+/*------------------------------Define structure----------------------------*/ 
+void rtl8192_init_mp(struct net_device* dev);
+int r8192_wx_mp_set_chan(struct net_device *dev, struct iw_request_info *info, 
+		union iwreq_data *wrqu, char *extra);
+int r8192_wx_mp_set_txrate(struct net_device *dev, struct iw_request_info *info, 
+		union iwreq_data *wrqu, char *extra);
+int r8192_wx_mp_set_txpower(struct net_device *dev, struct iw_request_info *info, 
+		union iwreq_data *wrqu, char *extra);
+int r8192_wx_mp_set_bw(struct net_device *dev,struct iw_request_info *info, 
+		union iwreq_data *wrqu, char *extra);
+int r8192_wx_mp_set_txstart(struct net_device *dev, struct iw_request_info *info, 
+		union iwreq_data *wrqu, char *extra);
+int r8192_wx_mp_set_singlecarrier(struct net_device *dev, struct iw_request_info *info, 
+		union iwreq_data *wrqu, char *extra);
+int r8192_wx_mp_write_rf(struct net_device *dev, struct iw_request_info *info, 
+		union iwreq_data *wrqu, char *extra);
+int r8192_wx_mp_write_mac(struct net_device *dev, struct iw_request_info *info, 
+		union iwreq_data *wrqu, char *extra);
+
+void mpt_StartCckContTx(struct net_device *dev,bool bScrambleOn);
+void mpt_StartOfdmContTx(struct net_device *dev);
+void mpt_StopCckCoNtTx(struct net_device *dev);
+void mpt_StopOfdmContTx(struct net_device *dev);
+void mpt_SwitchRfSetting92S(struct net_device *dev);
+bool mpt_ProSetTxPower(	struct net_device *dev,	u32 ulTxPower);
+bool mpt_ProSetTxAGCOffset(struct net_device *dev,	u32	ulTxAGCOffset);
+bool mpt_ProSetRxFilter(struct net_device *dev, u32	RCRMode);
+bool mpt_ProSetRxFilter(struct net_device *dev, u32	RCRMode);
+bool mpt_ProSetModulation(struct net_device *dev, u32 ulWirelessMode);
+void mpt_Pro819xIoCallback(struct net_device *dev);
+void MPT_ProSetSingleCarrier(struct net_device *dev, bool ulMode);
+void MPT_ProSetBandWidth819x(struct net_device *dev);
+void MPT_ProSwChannel(struct net_device *dev);
+void MPT_ProSetDataRate819x(struct net_device *dev);
+void MPT_ProSetTxAGCOffset(struct net_device *dev);
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl8192s/r8192S_rtl6052.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl8192s/r8192S_rtl6052.h
@@ -0,0 +1,116 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ * 
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ * 
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ * 
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ * 
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+
+
+/*--------------------------Define Parameters-------------------------------*/
+
+#define	RF6052_MAX_TX_PWR	0x3F
+#define	RF6052_MAX_REG		0x3F
+#define	RF6052_MAX_PATH		4
+/*--------------------------Define Parameters-------------------------------*/
+
+
+/*------------------------------Define structure----------------------------*/ 
+
+/*------------------------------Define structure----------------------------*/ 
+
+
+/*------------------------Export global variable----------------------------*/
+/*------------------------Export global variable----------------------------*/
+
+/*------------------------Export Marco Definition---------------------------*/
+
+/*------------------------Export Marco Definition---------------------------*/
+
+
+/*--------------------------Exported Function prototype---------------------*/
+#if 1
+extern void PHY_SetRF0222DBandwidth(struct net_device* dev , HT_CHANNEL_WIDTH Bandwidth);	
+extern void PHY_SetRF8225Bandwidth(	struct net_device* dev ,	HT_CHANNEL_WIDTH Bandwidth);
+extern bool PHY_RF8225_Config(struct net_device* dev );
+extern void phy_RF8225_Config_HardCode(struct net_device*	dev);
+extern bool phy_RF8225_Config_ParaFile(struct net_device* dev);
+extern void PHY_SetRF8225CckTxPower(struct net_device* dev ,u8 powerlevel);
+extern void PHY_SetRF8225OfdmTxPower(struct net_device* dev ,u8        powerlevel);
+extern void PHY_SetRF0222DOfdmTxPower(struct net_device* dev ,u8 powerlevel);
+extern void PHY_SetRF0222DCckTxPower(struct net_device* dev ,u8        powerlevel);
+
+extern void PHY_SetRF8256Bandwidth(struct net_device* dev , HT_CHANNEL_WIDTH Bandwidth);
+extern void PHY_RF8256_Config(struct net_device* dev);
+extern void phy_RF8256_Config_ParaFile(struct net_device* dev);
+extern void PHY_SetRF8256CCKTxPower(struct net_device*	dev, u8	powerlevel);
+extern void PHY_SetRF8256OFDMTxPower(struct net_device* dev, u8 powerlevel);
+#endif
+
+extern	void		RF_ChangeTxPath(struct net_device  * dev, u16 DataRate);
+extern	void		PHY_RF6052SetBandwidth(struct net_device  * dev,HT_CHANNEL_WIDTH	Bandwidth);	
+extern	void		PHY_RF6052SetCckTxPower(struct net_device  * dev, u8	powerlevel);
+extern	void		PHY_RF6052SetOFDMTxPower(struct net_device  * dev, u8* pPowerLevel, u8 Channel);
+extern	bool PHY_RF6052_Config(struct net_device  * dev);
+extern void PHY_RFShadowRefresh( struct net_device  		* dev);
+extern void PHY_RFShadowWrite( struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 Offset, u32 Data);
+
+extern bool
+PHY_RFShadowCompare(
+	struct net_device  		* dev,
+	RF90_RADIO_PATH_E	eRFPath,
+	u32					Offset);
+extern void
+PHY_RFShadowRecorver(
+	struct net_device  		* dev,
+	RF90_RADIO_PATH_E	eRFPath,
+	u32					Offset);
+extern void
+PHY_RFShadowCompareFlagSet(
+	struct net_device  		* dev,
+	RF90_RADIO_PATH_E	eRFPath,
+	u32					Offset,
+	u8					Type);
+extern void
+PHY_RFShadowRecorverFlagSet(
+	struct net_device  		* dev,
+	RF90_RADIO_PATH_E	eRFPath,
+	u32					Offset,
+	u8					Type);
+#if 0
+extern	u32
+PHY_RFShadowRead(
+	struct net_device  		* dev,
+	RF90_RADIO_PATH_E	eRFPath,
+	u32					Offset);
+extern void
+PHY_RFShadowCompareAll(
+	struct net_device  		* dev);
+extern void
+PHY_RFShadowRecorverAll(
+	struct net_device  		* dev);
+extern void
+PHY_RFShadowCompareFlagSetAll(
+	struct net_device  		* dev);
+extern void
+PHY_RFShadowRecorverFlagSetAll(
+	struct net_device  		* dev);
+extern void
+PHY_RFShadowRefresh(
+	struct net_device  		* dev);
+#endif
+/*--------------------------Exported Function prototype---------------------*/
+
+
+/* End of HalRf.h */
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl8192s/r8192S_phy.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl8192s/r8192S_phy.h
@@ -0,0 +1,202 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+/* Check to see if the file has been included already.  */
+#ifndef _R8192S_PHY_H
+#define _R8192S_PHY_H
+
+
+/*--------------------------Define Parameters-------------------------------*/
+#define LOOP_LIMIT				5
+#define MAX_STALL_TIME			50		
+#define AntennaDiversityValue		0x80	
+#define MAX_TXPWR_IDX_NMODE_92S	63
+#define Reset_Cnt_Limit			3
+
+
+#define MAX_PRECMD_CNT 			16
+#define MAX_RFDEPENDCMD_CNT 	16
+#define MAX_POSTCMD_CNT 		16
+#ifdef RTL8192SE
+#define	SET_RTL8192SE_RF_SLEEP(dev)							\
+{																	\
+	u8		u1bTmp;												\
+	u1bTmp = read_nic_byte (dev, LDOV12D_CTRL);		\
+	u1bTmp |= BIT0;													\
+	write_nic_byte(dev, LDOV12D_CTRL, u1bTmp);		\
+	write_nic_byte(dev, SPS1_CTRL, 0x0);				\
+	write_nic_byte(dev, TXPAUSE, 0xFF);				\
+	write_nic_word(dev, CMDR, 0x57FC);				\
+	udelay(100);													\
+	write_nic_word(dev, CMDR, 0x77FC);				\
+	write_nic_byte(dev, PHY_CCA, 0x0);				\
+	udelay(10);													\
+	write_nic_word(dev, CMDR, 0x37FC);				\
+	udelay(10);													\
+	write_nic_word(dev, CMDR, 0x77FC);				\
+	udelay(10);													\
+	write_nic_word(dev, CMDR, 0x57FC);				\
+}
+
+
+#endif
+
+/*--------------------------Define Parameters-------------------------------*/
+
+
+/*------------------------------Define structure----------------------------*/ 
+typedef enum _SwChnlCmdID{
+	CmdID_End,
+	CmdID_SetTxPowerLevel,
+	CmdID_BBRegWrite10,
+	CmdID_WritePortUlong,
+	CmdID_WritePortUshort,
+	CmdID_WritePortUchar,
+	CmdID_RF_WriteReg,
+}SwChnlCmdID;
+
+
+typedef struct _SwChnlCmd{
+	SwChnlCmdID	CmdID;
+	u32			Para1;
+	u32			Para2;
+	u32			msDelay;
+}__attribute__ ((packed)) SwChnlCmd;
+
+extern u32 rtl819XMACPHY_Array_PG[];
+extern u32 rtl819XPHY_REG_1T2RArray[];
+extern u32 rtl819XAGCTAB_Array[];
+extern u32 rtl819XRadioA_Array[];
+extern u32 rtl819XRadioB_Array[];
+extern u32 rtl819XRadioC_Array[];
+extern u32 rtl819XRadioD_Array[];
+
+typedef enum _HW90_BLOCK{
+	HW90_BLOCK_MAC = 0,
+	HW90_BLOCK_PHY0 = 1,
+	HW90_BLOCK_PHY1 = 2,
+	HW90_BLOCK_RF = 3,
+	HW90_BLOCK_MAXIMUM = 4, 
+}HW90_BLOCK_E, *PHW90_BLOCK_E;
+
+typedef enum _RF90_RADIO_PATH{
+	RF90_PATH_A = 0,			
+	RF90_PATH_B = 1,			
+	RF90_PATH_C = 2,			
+	RF90_PATH_D = 3,			
+#ifndef _RTL8192_EXT_PATCH_
+	RF90_PATH_MAX	= 4,			
+#endif
+}RF90_RADIO_PATH_E, *PRF90_RADIO_PATH_E;
+#ifdef _RTL8192_EXT_PATCH_
+#define	RF90_PATH_MAX			2
+#endif
+
+#define bMaskByte0                0xff
+#define bMaskByte1                0xff00
+#define bMaskByte2                0xff0000
+#define bMaskByte3                0xff000000
+#define bMaskHWord                0xffff0000
+#define bMaskLWord                0x0000ffff
+#define bMaskDWord                0xffffffff
+
+typedef enum _BaseBand_Config_Type{
+	BaseBand_Config_PHY_REG = 0,			
+	BaseBand_Config_AGC_TAB = 1,			
+}BaseBand_Config_Type, *PBaseBand_Config_Type;
+
+typedef enum _VERSION_8190{
+	VERSION_8190_BD=0x3,
+	VERSION_8190_BE
+}VERSION_8190,*PVERSION_8190;
+
+
+typedef enum _VERSION_8192S{
+	VERSION_8192S_ACUT,
+	VERSION_8192S_BCUT,
+	VERSION_8192S_CCUT
+}VERSION_8192S,*PVERSION_8192S;
+
+typedef enum _PHY_Rate_Tx_Power_Offset_Area{
+	RA_OFFSET_LEGACY_OFDM1,
+	RA_OFFSET_LEGACY_OFDM2,
+	RA_OFFSET_HT_OFDM1,
+	RA_OFFSET_HT_OFDM2,
+	RA_OFFSET_HT_OFDM3,
+	RA_OFFSET_HT_OFDM4,
+	RA_OFFSET_HT_CCK,
+}RA_OFFSET_AREA,*PRA_OFFSET_AREA;
+#if 0
+typedef enum _RATR_TABLE_MODE_8192S{
+	RATR_INX_WIRELESS_NGB = 0,
+	RATR_INX_WIRELESS_NG = 1,
+	RATR_INX_WIRELESS_NB = 2,
+	RATR_INX_WIRELESS_N = 3,
+	RATR_INX_WIRELESS_GB = 4,
+	RATR_INX_WIRELESS_G = 5,
+	RATR_INX_WIRELESS_B = 6,
+	RATR_INX_WIRELESS_MC = 7,
+	RATR_INX_WIRELESS_A = 8,
+}RATR_TABLE_MODE_8192S, *PRATR_TABLE_MODE_8192S;
+#endif
+/*------------------------------Define structure----------------------------*/ 
+
+
+/*------------------------Export global variable----------------------------*/
+/*------------------------Export global variable----------------------------*/
+
+
+/*------------------------Export Marco Definition---------------------------*/
+/*------------------------Export Marco Definition---------------------------*/
+
+
+/*--------------------------Exported Function prototype---------------------*/
+
+extern	u32	rtl8192_QueryBBReg(struct net_device* dev,u32 RegAddr, u32 BitMask);
+extern	void	rtl8192_setBBreg(struct net_device* dev,u32 RegAddr, u32 BitMask,u32 Data);
+extern	u32	rtl8192_phy_QueryRFReg(struct net_device* dev,RF90_RADIO_PATH_E eRFPath, u32 RegAddr, u32 BitMask);
+extern	void	rtl8192_phy_SetRFReg(struct net_device* dev,RF90_RADIO_PATH_E eRFPath, u32 RegAddr,u32 BitMask,u32 Data);
+
+bool rtl8192_phy_checkBBAndRF(struct net_device* dev, HW90_BLOCK_E CheckBlock, RF90_RADIO_PATH_E eRFPath);
+
+
+extern	bool 	PHY_MACConfig8192S(struct net_device* dev);
+extern	bool 	PHY_BBConfig8192S(struct net_device* dev);
+extern	bool 	PHY_RFConfig8192S(struct net_device* dev);
+
+extern	u8	rtl8192_phy_ConfigRFWithHeaderFile(struct net_device* dev,RF90_RADIO_PATH_E eRFPath);
+extern	void	rtl8192_SetBWMode(struct net_device* dev,HT_CHANNEL_WIDTH ChnlWidth,HT_EXTCHNL_OFFSET Offset	);
+extern	u8	rtl8192_phy_SwChnl(struct net_device* dev,u8 channel);	
+extern	u8	rtl8192_phy_CheckIsLegalRFPath(struct net_device* dev,u32 eRFPath	);
+extern	void    rtl8192_BBConfig(struct net_device* dev);
+extern	void 	PHY_IQCalibrateBcut(struct net_device* dev);
+extern	void 	PHY_IQCalibrate(struct net_device* dev);
+extern	void 	PHY_GetHWRegOriginalValue(struct net_device* dev);
+
+extern void 	InitialGainOperateWorkItemCallBack(void *data);
+void rtl8192_phy_setTxPower(struct net_device* dev, u8  channel);
+
+/*--------------------------Exported Function prototype---------------------*/
+bool rtl8192se_set_fw_cmd(struct net_device* dev, FW_CMD_IO_TYPE                FwCmdIO);
+extern void PHY_SetBeaconHwReg( struct net_device* dev, u16 BeaconInterval);
+void ChkFwCmdIoDone(struct net_device* dev);
+void PHY_SwitchEphyParameter(struct net_device* dev);
+bool PHY_SetRFPowerState(struct net_device* dev, RT_RF_POWER_STATE eRFPowerState);
+
+#endif	
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl8192s/r8192S_dev.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl8192s/r8192S_dev.c
@@ -0,0 +1,5004 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * Based on the r8180 driver, which is:
+ * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+#include "../rtl_core.h"
+#include "../rtl_dm.h"
+#include "../rtl_wx.h"
+#include "r8192S_phy.h"
+#include "r8192S_phyreg.h"
+#include "r8192S_rtl6052.h"
+#include "r8192S_Efuse.h"
+
+#ifdef _RTL8192_EXT_PATCH_
+#include "../../../mshclass/msh_class.h"
+#include "../rtl_mesh.h"
+#endif
+
+extern int WDCAPARA_ADD[];
+
+void rtl8192se_start_beacon(struct net_device *dev)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	struct rtllib_network *net = &priv->rtllib->current_network;
+	u16 BcnTimeCfg = 0;
+        u16 BcnCW = 6;
+        u16 BcnIFS = 0xf;
+
+	DMESG("Enabling beacon TX");
+	rtl8192_irq_disable(dev);
+
+	write_nic_word(dev, ATIMWND, 2);
+
+	write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
+	PHY_SetBeaconHwReg(dev, net->beacon_interval);
+
+#ifdef RTL8192SE
+	write_nic_word(dev, BCN_DRV_EARLY_INT, 10<<4);
+#else
+	write_nic_word(dev, BCN_DRV_EARLY_INT, 10);
+#endif
+	write_nic_word(dev, BCN_DMATIME, 256); 
+
+	write_nic_byte(dev, BCN_ERR_THRESH, 100);	
+
+#if 1
+	switch(priv->rtllib->iw_mode)
+	{
+		case IW_MODE_ADHOC:
+		case IW_MODE_MESH:
+			BcnTimeCfg |= (BcnCW<<BCN_TCFG_CW_SHIFT);
+			break;
+		default:
+			printk("Invalid Operation Mode!!\n");
+			break;
+	}
+
+	BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
+
+
+	{
+		u8 u1Temp = (u8)(net->beacon_interval);
+		write_nic_dword(dev, WFM5, 0xF1000000 |((u16)( u1Temp) << 8));
+		ChkFwCmdIoDone(dev);
+	}
+#else	
+	BcnTimeCfg |= BcnCW<<BCN_TCFG_CW_SHIFT;
+	BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
+	write_nic_word(dev, BCN_TCFG, BcnTimeCfg);
+#endif	
+	rtl8192_irq_enable(dev);
+}
+
+void rtl8192se_update_msr(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u8 msr;
+	LED_CTL_MODE	LedAction = LED_CTL_NO_LINK;
+	msr  = read_nic_byte(dev, MSR);
+	msr &= ~ MSR_LINK_MASK;
+	
+	switch (priv->rtllib->iw_mode) {
+	case IW_MODE_INFRA:
+		if (priv->rtllib->state == RTLLIB_LINKED)
+			msr |= (MSR_LINK_MANAGED << MSR_LINK_SHIFT);
+		else
+			msr |= (MSR_LINK_NONE << MSR_LINK_SHIFT);
+		LedAction = LED_CTL_LINK;
+		break;
+	case IW_MODE_ADHOC:
+		if (priv->rtllib->state == RTLLIB_LINKED)
+			msr |= (MSR_LINK_ADHOC << MSR_LINK_SHIFT);
+		else
+			msr |= (MSR_LINK_NONE << MSR_LINK_SHIFT);
+		break;
+	case IW_MODE_MASTER:
+		if (priv->rtllib->state == RTLLIB_LINKED)
+			msr |= (MSR_LINK_MASTER << MSR_LINK_SHIFT);
+		else
+			msr |= (MSR_LINK_NONE << MSR_LINK_SHIFT);
+		break;
+#ifdef _RTL8192_EXT_PATCH_
+	case IW_MODE_MESH:
+		printk("%s: iw_mode=%d state=%d only_mesh=%d mesh_state=%d\n", __FUNCTION__,priv->rtllib->iw_mode,priv->rtllib->state, priv->rtllib->only_mesh, priv->rtllib->mesh_state); 
+		if (priv->rtllib->only_mesh) {
+			if (priv->rtllib->mesh_state == RTLLIB_MESH_LINKED)
+				msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT); 
+			else
+				msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
+		} else {
+			if (priv->rtllib->mesh_state == RTLLIB_MESH_LINKED) {
+				msr |= (MSR_LINK_ADHOC << MSR_LINK_SHIFT);
+			} else {	
+				msr |= (MSR_LINK_NONE << MSR_LINK_SHIFT);
+			}
+			if (priv->rtllib->state == RTLLIB_LINKED)
+				msr |= (MSR_LINK_MANAGED << MSR_LINK_SHIFT);
+		}
+		break;
+#endif			
+	default:
+		break;
+	}
+
+	write_nic_byte(dev, MSR, msr);
+	if(priv->rtllib->LedControlHandler)
+		priv->rtllib->LedControlHandler(dev, LedAction);
+}
+
+static void rtl8192se_config_hw_for_load_fail(struct net_device* dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u16			i;
+	u8 			sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x92, 0x00};
+	u8			rf_path, index;
+	u32			tmp1111 = 0;
+	u32			tmp2222 = 0;
+
+	RT_TRACE(COMP_INIT, "====> rtl8192se_config_hw_for_load_fail\n");
+
+	for(;tmp2222<0xff;tmp2222+=4)
+	{
+		tmp1111= read_nic_dword(dev, tmp2222);
+	}
+
+	write_nic_byte(dev, SYS_ISO_CTRL+1, 0xE8); 
+	mdelay(10);
+	write_nic_byte(dev, PMC_FSM, 0x02); 
+	
+	priv->eeprom_vid= 0;
+	priv->eeprom_did= 0;		
+	priv->eeprom_ChannelPlan= 0;
+	priv->eeprom_CustomerID= 0;	
+
+       get_random_bytes(&sMacAddr[5], 1);
+	for(i = 0; i < 6; i++)
+		dev->dev_addr[i] = sMacAddr[i];			
+
+
+	priv->rf_type= RTL819X_DEFAULT_RF_TYPE;	
+	priv->rf_chip = RF_6052;
+
+#if (EEPROM_OLD_FORMAT_SUPPORT == 1)
+	for(i=0; i<14; i++)
+	{
+		priv->EEPROMTxPowerLevelCCK[i] = (u8)(EEPROM_Default_TxPower & 0xff);
+		RT_TRACE(COMP_INIT, "CCK 2.4G Tx Pwr Index %d = 0x%02x\n", 
+		i, priv->EEPROMTxPowerLevelCCK[i]);
+	}			
+
+	for(i=0; i<14; i++)
+	{
+		priv->EEPROMTxPowerLevelOFDM24G[i] = (u8)(EEPROM_Default_TxPower & 0xff);
+		RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Pwr Index %d = 0x%02x\n", 
+		i, priv->EEPROMTxPowerLevelOFDM24G[i]);				
+	}	
+
+	for(i=0; i<14; i++)
+	{			
+		priv->TxPowerLevelOFDM24G[i] = priv->EEPROMTxPowerLevelOFDM24G[i];
+		priv->TxPowerLevelCCK[i] = priv->EEPROMTxPowerLevelCCK[i];
+	}	
+	for(i=0; i<6; i++)
+	{
+		priv->EEPROMHT2T_TxPwr[i] = EEPROM_Default_HT2T_TxPwr;
+	}
+	
+#else
+	for (rf_path = 0; rf_path < 2; rf_path++)
+	{
+		for (i = 0; i < 3; i++)
+		{
+			priv->RfCckChnlAreaTxPwr[rf_path][i] = 
+			priv->RfOfdmChnlAreaTxPwr1T[rf_path][i] = 
+			priv->RfOfdmChnlAreaTxPwr2T[rf_path][i] = 
+			EEPROM_Default_TxPowerLevel;
+		}
+	}	
+				
+	for (rf_path = 0; rf_path < 2; rf_path++)
+	{
+		for(i=0; i<14; i++)	
+		{
+			if (i < 3)			
+				index = 0;
+			else if (i < 8)		
+				index = 1;
+			else				
+				index = 2;
+
+			priv->RfTxPwrLevelCck[rf_path][i]  = 
+			priv->RfCckChnlAreaTxPwr[rf_path][index] = 
+			priv->RfTxPwrLevelOfdm1T[rf_path][i]  = 
+			priv->RfOfdmChnlAreaTxPwr1T[rf_path][index] = 
+			priv->RfTxPwrLevelOfdm2T[rf_path][i]  = 
+			priv->RfOfdmChnlAreaTxPwr2T[rf_path][index] = 
+			(u8)(EEPROM_Default_TxPower & 0xff);				
+
+			if (rf_path == 0)
+			{
+				priv->TxPowerLevelOFDM24G[i] = (u8)(EEPROM_Default_TxPower & 0xff);
+				priv->TxPowerLevelCCK[i] = (u8)(EEPROM_Default_TxPower & 0xff);
+			}
+		}
+		
+	}
+	
+	RT_TRACE(COMP_INIT, "All TxPwr = 0x%x\n", EEPROM_Default_TxPower);
+
+	for(i=0; i<14; i++)	
+	{			
+		priv->TxPwrHt20Diff[RF90_PATH_A][i] = DEFAULT_HT20_TXPWR_DIFF;
+		priv->TxPwrHt20Diff[RF90_PATH_B][i] = DEFAULT_HT20_TXPWR_DIFF;
+
+		priv->TxPwrLegacyHtDiff[0][i] = EEPROM_Default_LegacyHTTxPowerDiff;
+		priv->TxPwrLegacyHtDiff[1][i] = EEPROM_Default_LegacyHTTxPowerDiff;
+	}
+	
+	priv->TxPwrSafetyFlag = 0;
+#endif
+	
+	priv->EEPROMTxPowerDiff = EEPROM_Default_LegacyHTTxPowerDiff;
+	priv->LegacyHTTxPowerDiff = priv->EEPROMTxPowerDiff;
+	RT_TRACE(COMP_INIT, "TxPowerDiff = %#x\n", priv->EEPROMTxPowerDiff);
+
+	for (rf_path = 0; rf_path < 2; rf_path++)
+	{
+		for (i = 0; i < 3; i++)
+		{
+			priv->EEPROMPwrGroup[rf_path][i] = 0;
+		}
+	}
+
+	for (rf_path = 0; rf_path < 2; rf_path++)
+	{
+		for(i=0; i<14; i++)
+		{
+			if (i < 3)			
+				index = 0;
+			else if (i < 8)		
+				index = 1;
+			else				
+				index = 2;
+			priv->PwrGroupHT20[rf_path][i] = (priv->EEPROMPwrGroup[rf_path][index]&0xf);
+			priv->PwrGroupHT40[rf_path][i] = ((priv->EEPROMPwrGroup[rf_path][index]&0xf0)>>4);
+		}
+	}
+	priv->EEPROMRegulatory = 0;
+
+	priv->EEPROMTSSI_A = EEPROM_Default_TSSI;
+	priv->EEPROMTSSI_B = EEPROM_Default_TSSI;			
+
+	for(i=0; i<6; i++)
+	{
+		priv->EEPROMHT2T_TxPwr[i] = EEPROM_Default_HT2T_TxPwr;
+	}
+
+	
+	priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
+	priv->ThermalMeter[0] = (priv->EEPROMThermalMeter&0x1f);	
+	priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
+
+	priv->BluetoothCoexist = EEPROM_Default_BlueToothCoexist;
+	priv->EEPROMBluetoothType = EEPROM_Default_BlueToothType;
+	priv->EEPROMBluetoothAntNum = EEPROM_Default_BlueToothAntNum;
+	priv->EEPROMBluetoothAntIsolation = EEPROM_Default_BlueToothAntIso;
+	
+	priv->EEPROMCrystalCap = EEPROM_Default_CrystalCap;
+	priv->CrystalCap = priv->EEPROMCrystalCap;
+
+	priv->eeprom_ChannelPlan = 0;
+	priv->eeprom_version = 1;		
+	priv->bTXPowerDataReadFromEEPORM = false;
+
+	priv->rf_type = RTL819X_DEFAULT_RF_TYPE;	
+	priv->rf_chip = RF_6052;
+	priv->eeprom_CustomerID = 0;
+	RT_TRACE(COMP_INIT, "EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID);
+
+			
+	priv->EEPROMBoardType = EEPROM_Default_BoardType;	
+	RT_TRACE(COMP_INIT, "BoardType = %#x\n", priv->EEPROMBoardType);
+
+	priv->LedStrategy = SW_LED_MODE7;
+
+	
+	RT_TRACE(COMP_INIT,"<==== rtl8192se_config_hw_for_load_fail\n");
+}
+
+static void rtl8192se_get_IC_Inferiority(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u8  Efuse_ID;
+
+	priv->IC_Class = IC_INFERIORITY_A; 
+	if((priv->epromtype == EEPROM_BOOT_EFUSE) && !priv->AutoloadFailFlag) 
+	{
+		Efuse_ID = EFUSE_Read1Byte(dev, EFUSE_IC_ID_OFFSET);
+
+		if(Efuse_ID == 0xfe)
+		{
+			priv->IC_Class = IC_INFERIORITY_B;
+
+		}
+	}
+}
+
+void
+HalCustomizedBehavior8192S(struct net_device* dev)
+{
+	struct r8192_priv* priv = rtllib_priv(dev);
+	priv->rtllib->bForcedShowRateStill = false;
+	switch(priv->CustomerID)
+	{
+		case RT_CID_DEFAULT:
+			priv->LedStrategy = SW_LED_MODE7;
+			if(	priv->eeprom_vid == 0x10EC && priv->eeprom_did == 0x8171 &&
+				priv->eeprom_svid == 0x1A3B && priv->eeprom_smid == 0x1A07)
+			{
+				priv->RegWirelessMode = WIRELESS_MODE_G;
+				priv->rtllib->mode = WIRELESS_MODE_G;
+				priv->rtllib->bForcedBgMode = true;
+				priv->rtllib->bForcedShowRateStill = true;
+			}
+			else if(	priv->eeprom_vid == 0x10EC && priv->eeprom_did == 0x8172 &&
+					priv->eeprom_svid == 0x1A3B && priv->eeprom_smid == 0x1A04)
+			{
+				priv->RegWirelessMode = WIRELESS_MODE_G;	
+				priv->rtllib->mode = WIRELESS_MODE_G;
+				priv->rtllib->bForcedBgMode = true;
+				priv->rtllib->bForcedShowRateStill = true;
+			}
+			else if(priv->eeprom_svid == 0x1A3B && (priv->eeprom_smid == 0x1104 ||
+				priv->eeprom_smid == 0x1107))
+			{
+				priv->rtllib->bForcedShowRateStill = true;
+			}
+			else if(priv->eeprom_vid == 0x10ec && priv->eeprom_did == 0x8171 &&
+				priv->eeprom_svid == 0x10ec && priv->eeprom_smid == 0x7171){
+				 priv->RegWirelessMode = WIRELESS_MODE_G;	
+				 priv->rtllib->mode = WIRELESS_MODE_G;
+				priv->rtllib->bForcedBgMode = true;
+			}else if(priv->eeprom_vid == 0x10ec && priv->eeprom_did == 0x8174 &&
+				priv->eeprom_svid == 0x10ec && priv->eeprom_smid == 0x7174){
+				 priv->RegWirelessMode = WIRELESS_MODE_G;	
+				 priv->RegWirelessMode = WIRELESS_MODE_G;	
+				 priv->rtllib->mode = WIRELESS_MODE_G;
+			}else if(priv->eeprom_vid == 0x10ec && priv->eeprom_did == 0x8174 &&
+				priv->eeprom_svid == 0x10ec && priv->eeprom_smid == 0x7150){
+				 priv->RegWirelessMode = WIRELESS_MODE_G;	
+				 priv->RegWirelessMode = WIRELESS_MODE_G;	
+				 priv->rtllib->mode = WIRELESS_MODE_G;
+			}else if(priv->eeprom_vid == 0x10ec && priv->eeprom_did == 0x8172 &&
+				priv->eeprom_svid == 0x10ec && priv->eeprom_smid == 0x7172){
+				 priv->RegWirelessMode = WIRELESS_MODE_G;	
+				 priv->RegWirelessMode = WIRELESS_MODE_G;	
+				 priv->rtllib->mode = WIRELESS_MODE_G;
+			}else if(priv->eeprom_vid == 0x10ec && priv->eeprom_did == 0x8172 &&
+				priv->eeprom_svid == 0x10ec && priv->eeprom_smid == 0x7186){
+				 priv->RegWirelessMode = WIRELESS_MODE_G;	
+				 priv->RegWirelessMode = WIRELESS_MODE_G;	
+				 priv->rtllib->mode = WIRELESS_MODE_G;
+			}
+			break;
+			
+			break;
+			
+		case RT_CID_819x_Acer:
+			priv->LedStrategy = SW_LED_MODE7;	
+			break;
+			
+		case RT_CID_TOSHIBA:
+			priv->rtllib->current_network.channel = 10;
+			priv->LedStrategy = SW_LED_MODE7;
+			priv->EEPROMRegulatory = 1;		
+			if(priv->eeprom_smid >=  0x7000 && priv->eeprom_smid < 0x8000){
+				priv->RegWirelessMode = WIRELESS_MODE_G;
+				priv->rtllib->mode = WIRELESS_MODE_G;
+				priv->rtllib->bForcedBgMode = true;
+			}
+			break;
+		case RT_CID_CCX:
+			priv->DMFlag |= (HAL_DM_DIG_DISABLE | HAL_DM_HIPWR_DISABLE);
+			break;
+
+		case RT_CID_819x_Lenovo:
+			priv->LedStrategy = SW_LED_MODE7;
+			if(priv->eeprom_svid == 0x10EC && priv->eeprom_smid == 0xE025){
+				priv->RegWirelessMode = WIRELESS_MODE_G;
+				 priv->RegWirelessMode = WIRELESS_MODE_G;	
+				 priv->rtllib->mode = WIRELESS_MODE_G;
+			}
+			break;
+
+		case RT_CID_819x_QMI:
+			priv->LedStrategy = SW_LED_MODE8;			
+			if(priv->eeprom_svid == 0x1462 && priv->eeprom_smid == 0x897A){
+				priv->RegWirelessMode = WIRELESS_MODE_G;
+				 priv->RegWirelessMode = WIRELESS_MODE_G;	
+				 priv->rtllib->mode = WIRELESS_MODE_G;
+			}
+			break;
+
+		case RT_CID_819x_MSI:	
+			priv->LedStrategy = SW_LED_MODE9;			
+			break;
+
+		case RT_CID_819x_HP:
+			priv->LedStrategy = SW_LED_MODE7;
+			priv->bLedOpenDrain = true;
+			
+		case RT_CID_WHQL:
+			;
+			break;
+	
+		default:
+			RT_TRACE(COMP_INIT,"Unkown hardware Type \n");
+			break;
+	}
+}
+
+static	void rtl8192se_read_eeprom_info(struct net_device* dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u16			i,usValue;
+	u16			EEPROMId;
+#if (EEPROM_OLD_FORMAT_SUPPORT == 1)
+	u8			tmpBuffer[30];	
+#endif
+	u8			tempval;
+	u8			hwinfo[HWSET_MAX_SIZE_92S];
+	u8			rf_path, index;	
+
+	RT_TRACE(COMP_INIT, "====> rtl8192se_read_eeprom_info\n");
+
+	if (priv->epromtype== EEPROM_93C46)
+	{	
+		write_nic_byte(dev, SYS_ISO_CTRL+1, 0xE8); 
+		mdelay(10);
+		write_nic_byte(dev, PMC_FSM, 0x02); 
+
+		RT_TRACE(COMP_INIT, "EEPROM\n");
+		for(i = 0; i < HWSET_MAX_SIZE_92S; i += 2)
+		{
+			usValue = eprom_read(dev, (u16) (i>>1));
+			*((u16*)(&hwinfo[i])) = usValue;					
+		}	
+	}
+	else if (priv->epromtype == EEPROM_BOOT_EFUSE)
+	{	
+		RT_TRACE(COMP_INIT, "EFUSE\n");
+
+		EFUSE_ShadowMapUpdate(dev);
+
+		memcpy( hwinfo, &priv->EfuseMap[EFUSE_INIT_MAP][0], HWSET_MAX_SIZE_92S);		
+	}
+
+
+	EEPROMId = *((u16 *)&hwinfo[0]);
+	if( EEPROMId != RTL8190_EEPROM_ID )
+	{
+		RT_TRACE(COMP_ERR, "EEPROM ID(%#x) is invalid!!\n", EEPROMId); 
+		priv->AutoloadFailFlag=true;
+	}
+	else
+	{
+		RT_TRACE(COMP_EPROM, "Autoload OK\n"); 
+		priv->AutoloadFailFlag=false;
+	}	
+
+	if (priv->AutoloadFailFlag == true)
+	{
+		rtl8192se_config_hw_for_load_fail(dev);
+		return;
+	}
+
+	rtl8192se_get_IC_Inferiority(dev);
+	
+	priv->eeprom_vid		= *(u16 *)&hwinfo[EEPROM_VID];
+	priv->eeprom_did         = *(u16 *)&hwinfo[EEPROM_DID];
+	priv->eeprom_svid		= *(u16 *)&hwinfo[EEPROM_SVID];
+	priv->eeprom_smid		= *(u16 *)&hwinfo[EEPROM_SMID];
+	priv->eeprom_version 	= *(u16 *)&hwinfo[EEPROM_Version];
+
+	RT_TRACE(COMP_EPROM, "EEPROMId = 0x%4x\n", EEPROMId);
+	RT_TRACE(COMP_EPROM, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
+	RT_TRACE(COMP_EPROM, "EEPROM DID = 0x%4x\n", priv->eeprom_did);
+	RT_TRACE(COMP_EPROM, "EEPROM SVID = 0x%4x\n", priv->eeprom_svid);
+	RT_TRACE(COMP_EPROM, "EEPROM SMID = 0x%4x\n", priv->eeprom_smid);
+
+	priv->EEPROMOptional = *(u8 *)&hwinfo[EEPROM_Optional]; 
+    	priv->ShowRateMode = 2;
+	priv->rtllib->bForcedShowRxRate = false;
+
+	if(priv->ShowRateMode == 0) {
+	    if((priv->EEPROMOptional & BIT3) == 0x08/*0000_1000*/) {
+		priv->rtllib->bForcedShowRxRate = true;
+	    }
+	} else if(priv->ShowRateMode == 2){
+		  priv->rtllib->bForcedShowRxRate = true;
+	}
+	
+	for(i = 0; i < 6; i += 2)
+	{
+		usValue = *(u16 *)&hwinfo[EEPROM_MAC_ADDR+i];
+		*((u16*)(&dev->dev_addr[i])) = usValue;
+	}
+	for (i=0;i<6;i++)
+		write_nic_byte(dev, MACIDR0+i, dev->dev_addr[i]); 	
+
+	RT_TRACE(COMP_EPROM, "ReadAdapterInfo8192S(), Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n", 
+	dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2], dev->dev_addr[3], 
+	dev->dev_addr[4], dev->dev_addr[5]); 	
+
+#if (EEPROM_OLD_FORMAT_SUPPORT == 1)
+	for(i = 0; i < EEPROM_TX_PWR_INDEX_RANGE; i += 2)
+	{
+		usValue = *(u16 *)&hwinfo[EEPROM_TxPowerBase+i];
+		*((u16 *)(&tmpBuffer[i])) = usValue;					
+	}
+	for(i=0; i<14; i++)
+	{
+		priv->EEPROMTxPowerLevelCCK[i] = (u8)tmpBuffer[i];
+		priv->EEPROMTxPowerLevelOFDM24G[i] = (u8)tmpBuffer[i+14];
+	}
+		
+
+	for(i=0; i<14; i++)
+	{
+		priv->TxPowerLevelOFDM24G[i] = priv->EEPROMTxPowerLevelOFDM24G[i];
+		priv->TxPowerLevelCCK[i] = priv->EEPROMTxPowerLevelCCK[i];
+		
+		RT_TRACE(COMP_EPROM, "CH%d CCK Tx PWR IDX = 0x%02x\n", i, priv->EEPROMTxPowerLevelCCK[i]);
+		RT_TRACE(COMP_EPROM, "CH%d OFDM Tx PWR IDX = 0x%02x\n", i, priv->EEPROMTxPowerLevelOFDM24G[i]);
+	}
+
+	for(i = 0; i < 6; i += 2)
+	{
+		usValue = *(u16 *)&hwinfo[EEPROM_HT2T_CH1_A+i];
+		*((u16*)(&priv->EEPROMHT2T_TxPwr[i])) = usValue;
+	}		
+	for(i=0; i<6; i++)
+	{
+		RT_TRACE(COMP_EPROM, "EEPROMHT2T_TxPwr, Index %d = 0x%02x\n", i, priv->EEPROMHT2T_TxPwr[i]);					
+	}
+	
+#else	
+
+	for (rf_path = 0; rf_path < 2; rf_path++)
+	{
+		for (i = 0; i < 3; i++)
+		{
+			priv->RfCckChnlAreaTxPwr[rf_path][i] = 
+			hwinfo[EEPROM_TxPowerBase+rf_path*3+i];
+
+			priv->RfOfdmChnlAreaTxPwr1T[rf_path][i] = 
+			hwinfo[EEPROM_TxPowerBase+6+rf_path*3+i];
+
+			priv->RfOfdmChnlAreaTxPwr2T[rf_path][i] = 
+			hwinfo[EEPROM_TxPowerBase+12+rf_path*3+i];
+		}
+	}
+
+	for (rf_path = 0; rf_path < 2; rf_path++)
+	{
+		for (i = 0; i < 3; i++)
+		{
+			RT_TRACE(COMP_EPROM,"CCK RF-%d CHan_Area-%d = 0x%x\n",  rf_path, i,
+			priv->RfCckChnlAreaTxPwr[rf_path][i]);
+			RT_TRACE(COMP_EPROM, "OFDM-1T RF-%d CHan_Area-%d = 0x%x\n",  rf_path, i,
+			priv->RfOfdmChnlAreaTxPwr1T[rf_path][i]);
+			RT_TRACE(COMP_EPROM,"OFDM-2T RF-%d CHan_Area-%d = 0x%x\n",  rf_path, i,
+			priv->RfOfdmChnlAreaTxPwr2T[rf_path][i]);			
+		}
+
+		for(i=0; i<14; i++)	
+		{
+			if (i < 3)			
+				index = 0;
+			else if (i < 8)		
+				index = 1;
+			else				
+				index = 2;
+
+			priv->RfTxPwrLevelCck[rf_path][i]  = 
+			priv->RfCckChnlAreaTxPwr[rf_path][index];
+			priv->RfTxPwrLevelOfdm1T[rf_path][i]  = 
+			priv->RfOfdmChnlAreaTxPwr1T[rf_path][index];
+			priv->RfTxPwrLevelOfdm2T[rf_path][i]  = 
+			priv->RfOfdmChnlAreaTxPwr2T[rf_path][index];
+
+			if (rf_path == 0)
+			{
+				priv->TxPowerLevelOFDM24G[i] = priv->RfTxPwrLevelOfdm1T[rf_path][i] ;
+				priv->TxPowerLevelCCK[i] = priv->RfTxPwrLevelCck[rf_path][i];					
+                    }
+		}
+
+		for(i=0; i<14; i++)
+		{
+			RT_TRACE(COMP_EPROM, "Rf-%d TxPwr CH-%d CCK OFDM_1T OFDM_2T= 0x%x/0x%x/0x%x\n", 
+			rf_path, i, priv->RfTxPwrLevelCck[rf_path][i], 
+			priv->RfTxPwrLevelOfdm1T[rf_path][i] ,
+			priv->RfTxPwrLevelOfdm2T[rf_path][i] );
+		}
+	}	
+	for (rf_path = 0; rf_path < 2; rf_path++)
+	{
+		for (i = 0; i < 3; i++)
+		{
+			priv->EEPROMPwrGroup[rf_path][i] = hwinfo[EEPROM_TxPWRGroup+rf_path*3+i];
+		}
+	}
+
+	for (rf_path = 0; rf_path < 2; rf_path++)
+	{
+		for(i=0; i<14; i++)
+		{
+			if (i < 3)			
+				index = 0;
+			else if (i < 8)		
+				index = 1;
+			else				
+				index = 2;
+			priv->PwrGroupHT20[rf_path][i] = (priv->EEPROMPwrGroup[rf_path][index]&0xf);
+			priv->PwrGroupHT40[rf_path][i] = ((priv->EEPROMPwrGroup[rf_path][index]&0xf0)>>4);
+			RT_TRACE(COMP_INIT, "RF-%d PwrGroupHT20[%d] = 0x%x\n", rf_path, i, priv->PwrGroupHT20[rf_path][i]);
+			RT_TRACE(COMP_INIT, "RF-%d PwrGroupHT40[%d] = 0x%x\n", rf_path, i, priv->PwrGroupHT40[rf_path][i]);
+		}
+	}
+
+	for(i=0; i<14; i++)	
+	{
+		if (i < 3)			
+			index = 0;
+			else if (i < 8)		
+			index = 1;
+		else				
+			index = 2;
+		
+		tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_HT20_DIFF+index])&0xff;
+		priv->TxPwrHt20Diff[RF90_PATH_A][i] = (tempval&0xF);
+		priv->TxPwrHt20Diff[RF90_PATH_B][i] = ((tempval>>4)&0xF);
+
+		if (i < 3)			
+			index = 0;
+		else if (i < 8)		
+			index = 0x11;
+		else				
+			index = 1;
+
+		tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_OFDM_DIFF+index])&0xff;
+		priv->TxPwrLegacyHtDiff[RF90_PATH_A][i] = (tempval&0xF);
+		priv->TxPwrLegacyHtDiff[RF90_PATH_B][i] = ((tempval>>4)&0xF);
+
+		tempval = (*(u8 *)&hwinfo[TX_PWR_SAFETY_CHK]);
+		priv->TxPwrSafetyFlag = (tempval&0x01);		
+	}
+	
+	priv->EEPROMRegulatory = 0;
+	if(priv->eeprom_version >= 2)
+	{
+		if(priv->eeprom_version >= 4)
+			priv->EEPROMRegulatory = (hwinfo[EEPROM_Regulatory]&0x7);	
+		else
+			priv->EEPROMRegulatory = (hwinfo[EEPROM_Regulatory]&0x1);	
+	}
+	RT_TRACE(COMP_INIT, "EEPROMRegulatory = 0x%x\n", priv->EEPROMRegulatory);
+
+	for(i=0; i<14; i++)
+		RT_TRACE(COMP_EPROM, "RF-A Ht20 to HT40 Diff[%d] = 0x%x\n", i, priv->TxPwrHt20Diff[RF90_PATH_A][i]);
+	for(i=0; i<14; i++)
+		RT_TRACE(COMP_EPROM, "RF-A Legacy to Ht40 Diff[%d] = 0x%x\n", i, priv->TxPwrLegacyHtDiff[RF90_PATH_A][i]);
+	for(i=0; i<14; i++)
+		RT_TRACE(COMP_EPROM, "RF-B Ht20 to HT40 Diff[%d] = 0x%x\n", i, priv->TxPwrHt20Diff[RF90_PATH_B][i]);
+	for(i=0; i<14; i++)
+		RT_TRACE(COMP_EPROM, "RF-B Legacy to HT40 Diff[%d] = 0x%x\n", i, priv->TxPwrLegacyHtDiff[RF90_PATH_B][i]);
+#endif	
+	RT_TRACE(COMP_EPROM, "TxPwrSafetyFlag = %d\n", priv->TxPwrSafetyFlag);
+
+	tempval = (*(u8 *)&hwinfo[EEPROM_RFInd_PowerDiff])&0xff;
+	priv->EEPROMTxPowerDiff = tempval;	
+	priv->LegacyHTTxPowerDiff = priv->TxPwrLegacyHtDiff[RF90_PATH_A][0];
+
+	RT_TRACE(COMP_EPROM, "TxPowerDiff = %#x\n", priv->EEPROMTxPowerDiff);
+
+	usValue = *(u16 *)&hwinfo[EEPROM_TSSI_A];
+	priv->EEPROMTSSI_A = (u8)((usValue&0xff00)>>8);
+	usValue = *(u8 *)&hwinfo[EEPROM_TSSI_B];
+	priv->EEPROMTSSI_B = (u8)(usValue&0xff);
+	RT_TRACE(COMP_EPROM, "TSSI_A = %#x, TSSI_B = %#x\n", 
+			priv->EEPROMTSSI_A, priv->EEPROMTSSI_B);
+		
+	tempval = *(u8 *)&hwinfo[EEPROM_ThermalMeter];
+	priv->EEPROMThermalMeter = tempval;			
+	RT_TRACE(COMP_EPROM, "ThermalMeter = %#x\n", priv->EEPROMThermalMeter);
+	priv->ThermalMeter[0] =(priv->EEPROMThermalMeter&0x1f);
+	priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
+	
+	tempval = *(u8 *)&hwinfo[EEPROM_BLUETOOTH_COEXIST];
+	priv->EEPROMBluetoothCoexist = ((tempval&0x2)>>1);	
+	priv->BluetoothCoexist = priv->EEPROMBluetoothCoexist;
+	tempval = hwinfo[EEPROM_BLUETOOTH_TYPE];
+	priv->EEPROMBluetoothType = ((tempval&0xe)>>1);
+	priv->EEPROMBluetoothAntNum = (tempval&0x1);
+	priv->EEPROMBluetoothAntIsolation = ((tempval&0x10)>>4);
+	RT_TRACE(COMP_EPROM, "BlueTooth Coexistance = %#x\n", priv->BluetoothCoexist);
+
+#ifdef MERGE_TO_DO
+	BT_VAR_INIT(Adapter);
+
+	tempval = hwinfo[EEPROM_WoWLAN];
+	priv->EEPROMSupportWoWLAN = ((tempval&0x4)>>2); 
+	if (priv->EEPROMSupportWoWLAN)
+		priv->bHwSupportRemoteWakeUp = true;
+	else
+		priv->bHwSupportRemoteWakeUp = false;
+#endif
+#ifdef RTL8192S_WAPI_SUPPORT
+	tempval = *(u8 *)&hwinfo[EEPROM_WAPI_SUPPORT];
+	priv->EEPROMWapiSupport = ((tempval&0x10)>>4);	
+	priv->EEPROMWapiSupport = 1;
+
+	priv->WapiSupport = priv->EEPROMWapiSupport;
+	priv->rtllib->WapiSupport = priv->WapiSupport;		
+	RT_TRACE(COMP_EPROM, "WAPI Support = %#x\n", priv->WapiSupport);
+#endif
+
+	tempval = (*(u8 *)&hwinfo[EEPROM_CrystalCap])>>4;
+	priv->EEPROMCrystalCap =tempval;		
+	RT_TRACE(COMP_EPROM, "CrystalCap = %#x\n", priv->EEPROMCrystalCap);
+	priv->CrystalCap = priv->EEPROMCrystalCap;	
+	
+	priv->eeprom_ChannelPlan = *(u8 *)&hwinfo[EEPROM_ChannelPlan];
+	priv->bTXPowerDataReadFromEEPORM = true;
+	RT_TRACE(COMP_EPROM, "EEPROM ChannelPlan = 0x%4x\n", priv->eeprom_ChannelPlan);
+	
+	tempval = *(u8*)&hwinfo[EEPROM_BoardType];  
+	if (tempval == 0)	
+		priv->rf_type= RF_2T2R;
+	else if (tempval == 1)	 
+		priv->rf_type = RF_1T2R;
+	else if (tempval == 2)	 
+		priv->rf_type = RF_1T2R;
+	else if (tempval == 3)	 
+		priv->rf_type = RF_1T1R;
+
+	priv->rtllib->RF_Type = priv->rf_type;
+	priv->rtllib->b1x1RecvCombine = false;
+	if (priv->rf_type == RF_1T2R)
+	{
+		tempval = read_nic_byte(dev, 0x07);
+		if (!(tempval & BIT0))
+		{
+			priv->rtllib->b1x1RecvCombine = true;
+			RT_TRACE(COMP_INIT, "RF_TYPE=1T2R but only 1SS\n");
+		}
+	}
+	priv->rtllib->b1SSSupport = 	priv->rtllib->b1x1RecvCombine;
+	
+	priv->rf_chip = RF_6052;
+
+	priv->eeprom_CustomerID = *(u8 *)&hwinfo[EEPROM_CustomID];
+
+	RT_TRACE(COMP_EPROM, "EEPROM Customer ID: 0x%2x, rf_chip:%x\n", priv->eeprom_CustomerID, priv->rf_chip);
+	
+	priv->rtllib->b_customer_lenovo_id = false;
+	
+	switch(priv->eeprom_CustomerID)
+	{	
+		case EEPROM_CID_DEFAULT:
+			if(priv->eeprom_svid == 0x10EC && priv->eeprom_smid == 0xE020){
+				priv->CustomerID = RT_CID_819x_Lenovo;	
+				priv->rtllib->b_customer_lenovo_id = true;
+                        }
+			else if(priv->eeprom_svid == 0x10EC && priv->eeprom_smid == 0xE025)
+					priv->CustomerID = RT_CID_819x_Lenovo;
+			else if(priv->eeprom_svid == 0x1A32 && priv->eeprom_smid == 0x4308)
+					priv->CustomerID = RT_CID_819x_QMI;											
+			else if(priv->eeprom_svid == 0x1A32 && priv->eeprom_smid == 0x0311)
+					priv->CustomerID = RT_CID_819x_QMI;
+			else if(priv->eeprom_svid == 0x1462 && priv->eeprom_smid == 0x6897)
+				priv->CustomerID = RT_CID_819x_MSI;
+			else if(priv->eeprom_svid == 0x1462 && priv->eeprom_smid == 0x3821)
+				priv->CustomerID = RT_CID_819x_MSI;			
+			else if(priv->eeprom_svid == 0x1462 && priv->eeprom_smid == 0x897A)
+				priv->CustomerID = RT_CID_819x_MSI;
+			else if(	priv->eeprom_vid == 0x10EC && priv->eeprom_did == 0x8171 &&
+					priv->eeprom_svid == 0x10EC && priv->eeprom_smid == 0x8156)
+				priv->CustomerID = RT_CID_819x_Acer;
+			else if(	priv->eeprom_vid == 0x10EC && priv->eeprom_did == 0x8171 &&
+					priv->eeprom_svid == 0x10EC && priv->eeprom_smid == 0x8157)
+				priv->CustomerID = RT_CID_819x_Acer;
+			else if(	priv->eeprom_vid == 0x10EC && priv->eeprom_did == 0x8172 &&
+					priv->eeprom_svid == 0x10EC && priv->eeprom_smid == 0xE021)
+				priv->CustomerID = RT_CID_819x_Acer;
+			else if(	priv->eeprom_vid == 0x10EC && priv->eeprom_did == 0x8172 &&
+					priv->eeprom_svid == 0x10EC && priv->eeprom_smid == 0xE022)
+				priv->CustomerID = RT_CID_819x_Acer;
+			else if(	priv->eeprom_vid == 0x10EC && priv->eeprom_did == 0x8172 &&
+					priv->eeprom_svid == 0x10EC && priv->eeprom_smid == 0x8158)
+				priv->CustomerID = RT_CID_819x_Acer;
+			else if(	priv->eeprom_vid == 0x10EC && priv->eeprom_did == 0x8172 &&
+					priv->eeprom_svid == 0x10EC && priv->eeprom_smid == 0x8159)
+				priv->CustomerID = RT_CID_819x_Acer;
+			else if(	priv->eeprom_vid == 0x10EC && priv->eeprom_did == 0x8174 &&
+					priv->eeprom_svid == 0x10EC && priv->eeprom_smid == 0x8186)
+				priv->CustomerID = RT_CID_819x_Acer;
+			else if(	priv->eeprom_vid == 0x10EC && priv->eeprom_did == 0x8174 &&
+					priv->eeprom_svid == 0x10EC && priv->eeprom_smid == 0x8187)
+				priv->CustomerID = RT_CID_819x_Acer;
+				else if(	priv->eeprom_vid == 0x10EC && priv->eeprom_did == 0x8174 &&
+					priv->eeprom_svid == 0x10EC && priv->eeprom_smid == 0x8156)
+				priv->CustomerID = RT_CID_819x_Acer;
+			else if(	priv->eeprom_vid == 0x10EC && priv->eeprom_did == 0x8174 &&
+					priv->eeprom_svid == 0x10EC && priv->eeprom_smid == 0x8157)
+				priv->CustomerID = RT_CID_819x_Acer;
+			else if(	priv->eeprom_vid == 0x10EC && priv->eeprom_did == 0x8171 &&
+			 		priv->eeprom_svid == 0x103C && priv->eeprom_smid == 0x1467)
+			 priv->CustomerID = RT_CID_819x_HP;
+			else
+			priv->CustomerID = RT_CID_DEFAULT;
+			break;
+			
+		case EEPROM_CID_TOSHIBA:       
+			priv->CustomerID = RT_CID_TOSHIBA;
+			break;
+
+		case EEPROM_CID_QMI:
+			priv->CustomerID = RT_CID_819x_QMI;
+			break;
+			
+		case EEPROM_CID_WHQL:
+#ifdef TO_DO_LIST			
+			priv->bInHctTest = true;
+			priv->bSupportTurboMode = false;
+			priv->bAutoTurboBy8186 = false;
+			priv->PowerSaveControl.bInactivePs = false;
+			priv->PowerSaveControl.bIPSModeBackup = false;
+			priv->PowerSaveControl.bLeisurePs = false;
+			priv->keepAliveLevel = 0;	
+			priv->bUnloadDriverwhenS3S4 = false;
+#endif
+			break;
+				
+		default:
+			priv->CustomerID = RT_CID_DEFAULT;
+			break;
+				
+	}
+	
+#if defined (RTL8192S_WAPI_SUPPORT)
+	if (priv->rtllib->WapiSupport)
+	{
+            WapiInit(priv->rtllib);
+	}
+#endif	
+	RT_TRACE(COMP_INIT, "<==== rtl8192se_read_eeprom_info\n");
+}
+
+void rtl8192se_get_eeprom_size(struct net_device* dev)
+{
+	struct r8192_priv* priv = rtllib_priv(dev);
+	u8 curCR = 0;
+	curCR = read_nic_byte(dev, EPROM_CMD);
+	PHY_RFShadowRefresh(dev);
+	if (curCR & BIT4){
+		RT_TRACE(COMP_EPROM, "Boot from EEPROM\n");
+		priv->epromtype = EEPROM_93C46;
+	}
+	else{
+		RT_TRACE(COMP_EPROM, "Boot from EFUSE\n");
+		priv->epromtype = EEPROM_BOOT_EFUSE;
+	}
+	if (curCR & BIT5){
+		RT_TRACE(COMP_EPROM,"Autoload OK\n"); 
+		priv->AutoloadFailFlag=false;		
+		rtl8192se_read_eeprom_info(dev);
+	}
+	else{
+		RT_TRACE(COMP_INIT, "AutoLoad Fail reported from CR9346!!\n"); 
+		priv->AutoloadFailFlag=true;		
+		rtl8192se_config_hw_for_load_fail(dev);		
+
+		if (priv->epromtype == EEPROM_BOOT_EFUSE)
+		{
+#if (RTL92SE_FPGA_VERIFY == 0)
+			EFUSE_ShadowMapUpdate(dev);
+#endif
+		}
+	}			
+#ifdef TO_DO_LIST
+	if(Adapter->bInHctTest)
+	{
+		pMgntInfo->PowerSaveControl.bInactivePs = false;
+		pMgntInfo->PowerSaveControl.bIPSModeBackup = false;
+		pMgntInfo->PowerSaveControl.bLeisurePs = false;
+		pMgntInfo->keepAliveLevel = 0;
+	}
+#endif	
+#ifdef ENABLE_DOT11D
+	priv->ChannelPlan = COUNTRY_CODE_WORLD_WIDE_13;
+
+	if(priv->ChannelPlan == COUNTRY_CODE_GLOBAL_DOMAIN) {
+		GET_DOT11D_INFO(priv->rtllib)->bEnabled = 1;
+		RT_TRACE(COMP_INIT, "%s: Enable dot11d when RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN!\n", __FUNCTION__);
+	}
+#endif
+	
+	RT_TRACE(COMP_INIT, "RegChannelPlan(%d) EEPROMChannelPlan(%d)", \
+			priv->RegChannelPlan, priv->eeprom_ChannelPlan);
+	RT_TRACE(COMP_INIT, "ChannelPlan = %d\n" , priv->ChannelPlan);
+	HalCustomizedBehavior8192S(dev);
+}
+
+#if (RTL92SE_FPGA_VERIFY == 1)
+static void MacConfigBeforeFwDownload(struct net_device* dev)
+{
+	struct r8192_priv* priv = rtllib_priv(dev);
+	u8				i;
+	u8				tmpU1b;
+	u16				tmpU2b;
+	u32				addr;
+	
+	RT_TRACE(COMP_INIT, "Set some register before enable NIC\r\n");
+
+	tmpU1b = read_nic_byte(dev, 0x562);
+	tmpU1b |= 0x08;
+	write_nic_byte(dev, 0x562, tmpU1b);
+	tmpU1b &= ~(BIT3);
+	write_nic_byte(dev, 0x562, tmpU1b);
+	
+	tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
+	tmpU1b &= 0x73;
+	write_nic_byte(dev, SYS_FUNC_EN+1, tmpU1b);
+
+	tmpU1b = read_nic_byte(dev, SYS_CLKR);	
+	tmpU1b &= 0xfa;
+	write_nic_byte(dev, SYS_CLKR, tmpU1b);
+
+	RT_TRACE(COMP_INIT, "Delay 1000ms before reset NIC. I dont know how long should we delay!!!!!\r\n");	
+	ssleep(1);
+
+	write_nic_byte(dev, SYS_CLKR, SYS_CLKSEL_80M);
+	
+	tmpU1b = read_nic_byte(dev, SPS1_CTRL);	
+	write_nic_byte(dev, SPS1_CTRL, (tmpU1b|SPS1_LDEN));
+	
+	tmpU1b = read_nic_byte(dev, AFE_MISC);	
+	write_nic_byte(dev, AFE_MISC, (tmpU1b|AFE_BGEN));
+
+	tmpU1b = read_nic_byte(dev, LDOA15_CTRL);	
+	write_nic_byte(dev, LDOA15_CTRL, (tmpU1b|LDA15_EN));
+
+	tmpU1b = read_nic_byte(dev, SPS1_CTRL);	
+	write_nic_byte(dev, SPS1_CTRL, (tmpU1b|SPS1_SWEN));
+
+	tmpU1b = read_nic_byte(dev, AFE_MISC);	
+	write_nic_byte(dev, AFE_MISC, (tmpU1b|AFE_MBEN));
+
+	tmpU2b = read_nic_word(dev, SYS_ISO_CTRL);	
+	write_nic_word(dev, SYS_ISO_CTRL, (tmpU2b|ISO_PWC_DV2RP));
+
+	tmpU2b = read_nic_word(dev, SYS_ISO_CTRL);	
+	write_nic_word(dev, SYS_ISO_CTRL, (tmpU2b &(~ISO_PWC_RV2RP)));
+
+	tmpU2b = read_nic_word(dev, AFE_XTAL_CTRL);	
+	write_nic_word(dev, AFE_XTAL_CTRL, (tmpU2b &(~XTAL_GATE_AFE)));
+
+	tmpU1b = read_nic_byte(dev, AFE_PLL_CTRL);	
+	write_nic_byte(dev, AFE_PLL_CTRL, (tmpU1b|APLL_EN));
+
+	write_nic_byte(dev, SYS_ISO_CTRL, 0xEE);
+
+	tmpU2b = read_nic_word(dev, SYS_CLKR);	
+	write_nic_word(dev, SYS_CLKR, (tmpU2b|SYS_MAC_CLK_EN));
+
+	tmpU2b = read_nic_word(dev, SYS_FUNC_EN);	
+	write_nic_word(dev, SYS_FUNC_EN, (tmpU2b|FEN_DCORE|FEN_MREGEN));
+
+	tmpU2b = read_nic_word(dev, SYS_CLKR);	
+	write_nic_word(dev, SYS_CLKR, ((tmpU2b|SYS_FWHW_SEL)&(~SYS_SWHW_SEL)));
+
+	write_nic_byte(dev, RF_CTRL, 0);
+	write_nic_byte(dev, RF_CTRL, 7);
+
+	write_nic_word(dev, CMDR, 0x37FC);	
+	
+#if 1
+	write_nic_byte(dev, 0x6, 0x30);
+	write_nic_byte(dev, 0x49, 0xf0);
+
+	write_nic_byte(dev, 0x4b, 0x81);
+
+	write_nic_byte(dev, 0xb5, 0x21);
+
+	write_nic_byte(dev, 0xdc, 0xff);
+	write_nic_byte(dev, 0xdd, 0xff);	
+	write_nic_byte(dev, 0xde, 0xff);
+	write_nic_byte(dev, 0xdf, 0xff);
+
+	write_nic_byte(dev, 0x11a, 0x00);
+	write_nic_byte(dev, 0x11b, 0x00);
+
+	for (i = 0; i < 32; i++)
+		write_nic_byte(dev, INIMCS_SEL+i, 0x1b);	
+
+	write_nic_byte(dev, 0x236, 0xff);
+	
+	write_nic_byte(dev, 0x503, 0x22);
+
+	if(priv->bIntelBridgeExist) {
+		write_nic_byte(dev, 0x560, 0x40);
+	} else {
+		write_nic_byte(dev, 0x560, 0x00);
+	}
+
+	write_nic_byte(dev, DBG_PORT, 0x91);	
+#endif
+
+#ifdef CONFIG_RX_CMD 
+	write_nic_dword(dev, RCDA, priv->rx_ring_dma[RX_CMD_QUEUE]);
+#endif
+	write_nic_dword(dev, RDQDA, priv->rx_ring_dma[RX_MPDU_QUEUE]);
+	rtl8192_tx_enable(dev);
+	
+	RT_TRACE(COMP_INIT, "<---MacConfig8192SE()\n");
+
+}	/* MacConfigBeforeFwDownload */
+#else
+void gen_RefreshLedState(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	PLED_8190 pLed0 = &(priv->SwLed0);	
+
+	if(priv->bfirst_init)
+	{
+		RT_TRACE(COMP_INIT, "gen_RefreshLedState first init\n");
+		return;
+	}
+
+	if(priv->rtllib->RfOffReason == RF_CHANGE_BY_IPS )
+	{
+		SwLedOn(dev, pLed0);
+	}
+	else		
+	{
+		SwLedOff(dev, pLed0);		
+	}
+
+}	
+void MacConfigBeforeFwDownload(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);	
+	u8				i;
+	u8				tmpU1b;
+	u16				tmpU2b;
+	u8				PollingCnt = 20;
+
+	RT_TRACE(COMP_INIT, "--->MacConfigBeforeFwDownload()\n");
+
+	if (priv->initialized_at_probe) {
+		return;
+	}
+
+	if(priv->bfirst_init)
+	{
+		tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
+		tmpU1b &= 0xFE;
+		write_nic_byte(dev, SYS_FUNC_EN+1, tmpU1b);
+		udelay(1);
+		write_nic_byte(dev, SYS_FUNC_EN+1, tmpU1b|BIT0);
+	}
+
+	tmpU1b = read_nic_byte(dev, (SYS_CLKR + 1));
+	if(tmpU1b & BIT7)
+	{
+		tmpU1b &= ~(BIT6 | BIT7);
+		if(!HalSetSysClk8192SE(dev, tmpU1b))
+			return; 
+	}
+
+#ifdef MERGE_TO_DO
+	if( (pHalData->bt_coexist.BluetoothCoexist) &&
+		(pHalData->bt_coexist.BT_CoexistType == BT_CSR) )
+	{
+		write_nic_byte(dev, AFE_PLL_CTRL, 0x0);
+		udelay(50);
+		write_nic_byte(dev, LDOA15_CTRL, 0x34);
+		udelay(50);
+	}
+	else
+#endif
+	{
+        write_nic_byte(dev, AFE_PLL_CTRL, 0x0);
+		udelay(50);
+		write_nic_byte(dev, LDOA15_CTRL, 0x34);
+		udelay(50);
+	}
+	
+
+	write_nic_byte(dev, RPWM, 0x0);
+
+	tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
+	tmpU1b &= 0x73;
+	write_nic_byte(dev, SYS_FUNC_EN+1, tmpU1b);
+	mdelay(1);
+	
+	write_nic_byte(dev, CMDR, 0);
+	write_nic_byte(dev, TCR, 0);
+
+#if (DEMO_BOARD_SUPPORT == 0)
+	tmpU1b = read_nic_byte(dev, SPS1_CTRL);
+	tmpU1b &= 0xfc;
+	write_nic_byte(dev, SPS1_CTRL, tmpU1b);
+#endif
+
+	tmpU1b = read_nic_byte(dev, 0x562);
+	tmpU1b |= 0x08;
+	write_nic_byte(dev, 0x562, tmpU1b);
+	tmpU1b &= ~(BIT3);
+	write_nic_byte(dev, 0x562, tmpU1b);
+	
+
+
+	
+
+	RT_TRACE(COMP_INIT, "Enable AFE clock source\r\n");	
+	tmpU1b = read_nic_byte(dev, AFE_XTAL_CTRL);	
+	write_nic_byte(dev, AFE_XTAL_CTRL, (tmpU1b|0x01));
+	udelay(2000);	
+	tmpU1b = read_nic_byte(dev, AFE_XTAL_CTRL+1);	
+	write_nic_byte(dev, AFE_XTAL_CTRL+1, (tmpU1b&0xfb));
+
+
+	RT_TRACE(COMP_INIT, "Enable AFE Macro Block's Bandgap\r\n");	
+	tmpU1b = read_nic_byte(dev, AFE_MISC);	
+	write_nic_byte(dev, AFE_MISC, (tmpU1b|BIT0));
+	mdelay(1);
+
+	RT_TRACE(COMP_INIT, "Enable AFE Mbias\r\n");	
+	tmpU1b = read_nic_byte(dev, AFE_MISC);	
+	write_nic_byte(dev, AFE_MISC, (tmpU1b|0x02));
+	mdelay(1);
+	
+	tmpU1b = read_nic_byte(dev, LDOA15_CTRL);	
+	write_nic_byte(dev, LDOA15_CTRL, (tmpU1b|BIT0));
+
+
+
+	tmpU2b = read_nic_word(dev, SYS_ISO_CTRL);	
+	write_nic_word(dev, SYS_ISO_CTRL, (tmpU2b|BIT11));
+
+
+	tmpU2b = read_nic_word(dev, SYS_FUNC_EN);
+	write_nic_word(dev, SYS_FUNC_EN, (tmpU2b |BIT13));
+
+
+	write_nic_byte(dev, SYS_ISO_CTRL+1, 0x68);
+
+	udelay(200);
+	tmpU1b = read_nic_byte(dev, AFE_PLL_CTRL);	
+	write_nic_byte(dev, AFE_PLL_CTRL, (tmpU1b|BIT0|BIT4));
+
+#if 1 
+	udelay(100);
+	write_nic_byte(dev, AFE_PLL_CTRL, (tmpU1b|BIT0|BIT4|BIT6));
+	udelay(10);
+	write_nic_byte(dev, AFE_PLL_CTRL, (tmpU1b|BIT0|BIT4));
+	udelay(10);
+#endif
+	tmpU1b = read_nic_byte(dev, AFE_PLL_CTRL+1);	
+	write_nic_byte(dev, AFE_PLL_CTRL+1, (tmpU1b|BIT0));
+	mdelay(1);
+
+	write_nic_byte(dev, SYS_ISO_CTRL, 0xA6);
+
+	tmpU2b = read_nic_word(dev, SYS_CLKR);	
+	write_nic_word(dev, SYS_CLKR, (tmpU2b|BIT12|BIT11));
+
+	tmpU2b = read_nic_word(dev, SYS_FUNC_EN);	
+	write_nic_word(dev, SYS_FUNC_EN, (tmpU2b|BIT11));
+
+	tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
+	write_nic_byte(dev, SYS_FUNC_EN+1, tmpU1b&~(BIT7));
+	
+	write_nic_word(dev, SYS_FUNC_EN, (tmpU2b|BIT11|BIT15));
+
+	 tmpU2b = read_nic_word(dev, SYS_CLKR);	
+	write_nic_word(dev, SYS_CLKR, (tmpU2b&(~BIT2)));
+
+	tmpU1b = read_nic_byte(dev, (SYS_CLKR + 1));
+	tmpU1b = ((tmpU1b | BIT7) & (~BIT6));
+	if(!HalSetSysClk8192SE(dev, tmpU1b))
+		return; 
+
+#if 0	
+	tmpU2b = read_nic_word(dev, SYS_CLKR);	
+	write_nic_word(dev, SYS_CLKR, ((tmpU2b|BIT15)&(~BIT14)));
+#endif
+
+	write_nic_word(dev, CMDR, 0x07FC);
+	
+#if 1
+	write_nic_byte(dev, 0x6, 0x30);
+	write_nic_byte(dev, 0x49, 0xf0);
+
+	write_nic_byte(dev, 0x4b, 0x81);
+
+	write_nic_byte(dev, 0xb5, 0x21);
+
+	write_nic_byte(dev, 0xdc, 0xff);
+	write_nic_byte(dev, 0xdd, 0xff);	
+	write_nic_byte(dev, 0xde, 0xff);
+	write_nic_byte(dev, 0xdf, 0xff);
+
+	write_nic_byte(dev, 0x11a, 0x00);
+	write_nic_byte(dev, 0x11b, 0x00);
+
+	for (i = 0; i < 32; i++)
+		write_nic_byte(dev, INIMCS_SEL+i, 0x1b);	
+
+	write_nic_byte(dev, 0x236, 0xff);
+	
+	write_nic_byte(dev, 0x503, 0x22);
+	if (priv->pci_bridge_vendor & (PCI_BRIDGE_VENDOR_INTEL | PCI_BRIDGE_VENDOR_SIS)) {
+		write_nic_byte(dev, 0x560, 0x40);
+	} else {
+		write_nic_byte(dev, 0x560, 0x00);
+	}
+
+	write_nic_byte(dev, DBG_PORT, 0x91);	
+#endif
+
+	write_nic_dword(dev, RDQDA, priv->rx_ring_dma[RX_MPDU_QUEUE]);
+#ifdef CONFIG_RX_CMD
+	write_nic_dword(dev, RCDA, priv->rx_ring_dma[RX_CMD_QUEUE]);
+#endif	
+	rtl8192_tx_enable(dev);
+
+	write_nic_word(dev, CMDR, 0x37FC);
+	do {
+		tmpU1b = read_nic_byte(dev, TCR);
+		if((tmpU1b & TXDMA_INIT_VALUE) == TXDMA_INIT_VALUE)
+			break;	
+
+		udelay(5);
+	} while(PollingCnt--);	
+	
+	if(PollingCnt <= 0 )
+	{
+		RT_TRACE(COMP_ERR, "MacConfigBeforeFwDownloadASIC(): Polling TXDMA_INIT_VALUE timeout!! Current TCR(%#x)\n", tmpU1b);
+		tmpU1b = read_nic_byte(dev, CMDR);			
+		write_nic_byte(dev, CMDR, tmpU1b&(~TXDMA_EN));
+		udelay(2);
+		write_nic_byte(dev, CMDR, tmpU1b|TXDMA_EN);
+	}
+
+	gen_RefreshLedState(dev);
+
+	RT_TRACE(COMP_INIT, "<---MacConfigBeforeFwDownload()\n");
+
+}	/* MacConfigBeforeFwDownload */
+#endif
+
+static void MacConfigAfterFwDownload(struct net_device* dev)
+{
+	u8				i;
+	u16				tmpU2b;
+	struct r8192_priv* priv = rtllib_priv(dev);
+
+	
+	write_nic_byte(dev, CMDR, 
+	(u8)(BBRSTn|BB_GLB_RSTn|SCHEDULE_EN|MACRXEN|MACTXEN|DDMA_EN|FW2HW_EN|
+	RXDMA_EN|TXDMA_EN|HCI_RXDMA_EN|HCI_TXDMA_EN));
+	write_nic_dword(dev, TCR, 
+	read_nic_dword(dev, TCR)|TXDMAPRE2FULL);
+	write_nic_dword(dev, RCR, priv->ReceiveConfig);
+
+#if 0
+	for (i=0;i<6;i++)
+	write_nic_byte(dev, MACIDR0+i, dev->dev_addr[i]); 	
+#endif
+	write_nic_word(dev, SIFS_CCK, 0x0a0a); 
+	write_nic_word(dev, SIFS_OFDM, 0x1010);
+	write_nic_byte(dev, ACK_TIMEOUT, 0x40);
+	
+	write_nic_word(dev, BCN_INTERVAL, 100);
+	write_nic_word(dev, ATIMWND, 2);	
+#ifdef _ENABLE_SW_BEACON
+        write_nic_word(dev, BCN_DRV_EARLY_INT, BIT15);
+#endif        
+
+#if 0
+	write_nic_dword(dev, RQPN1,  
+	NUM_OF_PAGE_IN_FW_QUEUE_BK<<0 | NUM_OF_PAGE_IN_FW_QUEUE_BE<<8 |\
+	NUM_OF_PAGE_IN_FW_QUEUE_VI<<16 | NUM_OF_PAGE_IN_FW_QUEUE_VO<<24);												
+	write_nic_dword(dev, RQPN2, 
+	NUM_OF_PAGE_IN_FW_QUEUE_HCCA << 0 | NUM_OF_PAGE_IN_FW_QUEUE_CMD << 8|\
+	NUM_OF_PAGE_IN_FW_QUEUE_MGNT << 16 |NUM_OF_PAGE_IN_FW_QUEUE_HIGH << 24);
+	write_nic_dword(dev, RQPN3, 
+	NUM_OF_PAGE_IN_FW_QUEUE_BCN<<0 | NUM_OF_PAGE_IN_FW_QUEUE_PUB<<8);
+	write_nic_byte(dev, LD_RQPN, BIT7);
+#endif
+
+
+
+
+	write_nic_byte(dev, RXDMA, 
+							read_nic_byte(dev, RXDMA)|BIT6);
+
+	if (priv->card_8192_version== VERSION_8192S_ACUT)
+		write_nic_byte(dev, RRSR, 0xf0);
+	else if (priv->card_8192_version == VERSION_8192S_BCUT)
+		write_nic_byte(dev, RRSR, 0xff);
+	write_nic_byte(dev, RRSR+1, 0x01);
+	write_nic_byte(dev, RRSR+2, 0x00);
+
+	for (i = 0; i < 8; i++)
+	{
+
+		if (priv->card_8192_version == VERSION_8192S_ACUT)
+			write_nic_dword(dev, ARFR0+i*4, 0x1f0ff0f0);
+#if 0 
+		else if (priv->card_8192_version == VERSION_8192S_BCUT)
+			write_nic_dword(dev, ARFR0+i*4, 0x1f0ff0f0);
+#endif
+	}
+
+	write_nic_byte(dev, AGGLEN_LMT_H, 0x0f);
+	write_nic_word(dev, AGGLEN_LMT_L, 0x7442);
+	write_nic_word(dev, AGGLEN_LMT_L+2, 0xddd7);
+	write_nic_word(dev, AGGLEN_LMT_L+4, 0xd772);
+	write_nic_word(dev, AGGLEN_LMT_L+6, 0xfffd);
+
+	write_nic_dword(dev, DARFRC, 0x04010000);
+	write_nic_dword(dev, DARFRC+4, 0x09070605);
+	write_nic_dword(dev, RARFRC, 0x04010000);
+	write_nic_dword(dev, RARFRC+4, 0x09070605);
+
+	
+	
+	write_nic_word(dev, SG_RATE, 0xFFFF);
+
+
+	write_nic_word(dev, NAV_PROT_LEN, 0x0080);	
+	write_nic_byte(dev, CFEND_TH, 0xFF);	
+	write_nic_byte(dev, AMPDU_MIN_SPACE, 0x07);
+	write_nic_byte(dev, TXOP_STALL_CTRL, 0x00);
+	
+
+	/*write_nic_byte(dev, PCIF, ((MXDMA2_NoLimit<<MXDMA2_RX_SHIFT) | \
+											(MXDMA2_NoLimit<<MXDMA2_TX_SHIFT) | \
+											(1<<MULRW_SHIFT)));*/
+
+	write_nic_byte(dev, RXDRVINFO_SZ, 4);  
+
+	tmpU2b= read_nic_byte(dev, SYS_FUNC_EN);
+	write_nic_byte(dev, SYS_FUNC_EN, tmpU2b | BIT13);  
+	tmpU2b= read_nic_byte(dev, SYS_ISO_CTRL);
+	write_nic_byte(dev, SYS_ISO_CTRL, tmpU2b & (~BIT8));  
+
+	if (priv->epromtype == EEPROM_BOOT_EFUSE)	
+	{	
+		u8	tempval;		
+		
+		tempval = read_nic_byte(dev, SYS_ISO_CTRL+1); 
+		tempval &= 0xFE;
+		write_nic_byte(dev, SYS_ISO_CTRL+1, tempval); 
+
+
+		
+		write_nic_byte(dev, EFUSE_CTRL+3, 0x72); 
+		RT_TRACE(COMP_INIT, "EFUSE CONFIG OK\n");
+	}
+	RT_TRACE(COMP_INIT, "MacConfigAfterFwDownload OK\n");
+
+}	/* MacConfigAfterFwDownload */
+
+static void rtl8192se_HalDetectPwrDownMode(struct net_device*dev)
+{
+    u8 tmpvalue;
+    struct r8192_priv *priv = rtllib_priv(dev);	
+    EFUSE_ShadowRead(dev, 1, 0x78, (u32 *)&tmpvalue);
+
+    if (tmpvalue & BIT0) {
+        priv->pwrdown = true;
+    } else {
+        priv->pwrdown = false;
+    }
+}
+
+void HwConfigureRTL8192SE(struct net_device *dev)
+{
+
+	struct r8192_priv* priv = rtllib_priv(dev);
+	
+	u8	regBwOpMode = 0;
+	u32	regRATR = 0, regRRSR = 0;
+	u8	regTmp = 0;
+
+
+	switch(priv->rtllib->mode)
+	{
+	case WIRELESS_MODE_B:
+		regBwOpMode = BW_OPMODE_20MHZ;
+		regRATR = RATE_ALL_CCK;
+		regRRSR = RATE_ALL_CCK;
+		break;
+	case WIRELESS_MODE_A:
+		regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
+		regRATR = RATE_ALL_OFDM_AG;
+		regRRSR = RATE_ALL_OFDM_AG;
+		break;
+	case WIRELESS_MODE_G:
+		regBwOpMode = BW_OPMODE_20MHZ;
+		regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
+		regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
+		break;
+	case WIRELESS_MODE_AUTO:
+	case WIRELESS_MODE_N_24G:
+			regBwOpMode = BW_OPMODE_20MHZ;
+			regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
+			regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
+		break;
+	case WIRELESS_MODE_N_5G:
+		regBwOpMode = BW_OPMODE_5G;
+		regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
+		regRRSR = RATE_ALL_OFDM_AG;
+		break;
+	default:
+		regBwOpMode = BW_OPMODE_20MHZ;
+		regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
+		regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
+		break;
+	}
+
+	regTmp = read_nic_byte(dev, INIRTSMCS_SEL);
+#if (RTL8192SU_DISABLE_CCK_RATE == 1)
+	regRRSR = ((regRRSR & 0x000ffff0)<<8) | regTmp;
+#else
+	regRRSR = ((regRRSR & 0x000fffff)<<8) | regTmp;
+#endif
+	write_nic_dword(dev, INIRTSMCS_SEL, regRRSR);
+
+	write_nic_byte(dev, BW_OPMODE, regBwOpMode);
+	priv->rtllib->SetHwRegHandler(dev, HW_VAR_RETRY_LIMIT, (u8*)(&priv->ShortRetryLimit));
+
+	write_nic_byte(dev, MLT, 0x8f);
+
+
+		
+#if 1
+	switch(priv->rf_type)
+	{
+		case RF_1T2R:
+		case RF_1T1R:
+			RT_TRACE(COMP_INIT, "Initializeadapter: RF_Type%s\n", priv->rf_type==RF_1T1R? "(1T1R)":"(1T2R)");
+                priv->rtllib->MinSpaceCfg = (MAX_MSS_DENSITY_1T<<3);						
+			break;
+		case RF_2T2R:
+		case RF_2T2R_GREEN:
+			RT_TRACE(COMP_INIT, "Initializeadapter:RF_Type(2T2R)\n");
+                priv->rtllib->MinSpaceCfg = (MAX_MSS_DENSITY_2T<<3);			
+			break;
+	}
+	write_nic_byte(dev, AMPDU_MIN_SPACE, priv->rtllib->MinSpaceCfg);
+#else
+	priv->rtllib->MinSpaceCfg = 0x90;	
+	SetHwReg8192SE(dev, HW_VAR_AMPDU_MIN_SPACE, (u8*)(&priv->rtllib->MinSpaceCfg));
+#endif
+}
+
+void 
+RF_RECOVERY(struct net_device*dev	,u8 Start, u8 End)
+{
+	u8	offset;
+	u8	counter;
+
+
+	for(offset = Start; offset<End; offset++)
+	{
+		PHY_RFShadowCompareFlagSet(dev, (RF90_RADIO_PATH_E)0, offset,true);
+		
+		if(PHY_RFShadowCompare(dev, (RF90_RADIO_PATH_E)0, offset))
+		{
+			PHY_RFShadowRecorverFlagSet(dev, (RF90_RADIO_PATH_E)0, offset, true);
+
+			for (counter = 0; counter < 10; counter++)
+			{
+				RT_TRACE(COMP_INIT, "PHY_RFShadowCompare OKCNT=%d offset=%0x\n", counter, offset);
+			PHY_RFShadowRecorver( dev, (RF90_RADIO_PATH_E)0, offset);
+				if (offset == 0x18)
+				{
+					if (!PHY_RFShadowCompare(dev, (RF90_RADIO_PATH_E)0, offset))
+					{
+						RT_TRACE(COMP_INIT, "PHY_RFShadowCompare OKCNT=%d\n", counter);
+						PHY_RFShadowRecorverFlagSet(dev, (RF90_RADIO_PATH_E)0, offset, false);
+						break;
+					}
+				}
+				else
+				{
+					PHY_RFShadowRecorverFlagSet(dev, (RF90_RADIO_PATH_E)0, offset, false);
+					break;
+		}
+	}
+}
+	}
+
+}
+
+bool rtl8192se_adapter_start(struct net_device* dev)
+{ 	
+	struct r8192_priv *priv = rtllib_priv(dev);	
+	bool rtStatus 	= true;	
+	u8				tmpU1b;
+	u8				eRFPath;
+	u8				fw_download_times = 1;
+	u8				i=0;
+	RT_TRACE(COMP_INIT, "rtl8192se_adapter_start()\n");
+	priv->being_init_adapter = true;	
+#ifdef CONFIG_ASPM_OR_D3
+	RT_DISABLE_ASPM(dev);
+#endif
+start:
+	rtl8192_pci_resetdescring(dev);
+	MacConfigBeforeFwDownload(dev);
+	priv->initialized_at_probe = false;
+
+	priv->card_8192_version = priv->rtllib->VersionID
+	= (VERSION_8192S)((read_nic_dword(dev, PMC_FSM)>>16)&0xF);
+
+	RT_TRACE(COMP_INIT, "NIC version : %s\n", ((read_nic_dword(dev, PMC_FSM)>>15)&0x1)?"C-cut":"B-cut");
+
+	rtStatus = FirmwareDownload92S((struct net_device*)dev); 
+	if(rtStatus != true)
+	{
+		if(fw_download_times <= 10){
+			RT_TRACE(COMP_INIT, "rtl8192se_adapter_start(): Download Firmware failed %d times, Download again!!\n",fw_download_times);
+			fw_download_times = fw_download_times + 1;
+			goto start;
+		}else{
+			RT_TRACE(COMP_INIT, "rtl8192se_adapter_start(): Download Firmware failed 10, end!!\n");
+			goto end;
+		}
+	}
+
+	MacConfigAfterFwDownload(dev);
+
+	priv->FwCmdIOMap = 	read_nic_word(dev, LBUS_MON_ADDR);
+	priv->FwCmdIOParam = read_nic_dword(dev, LBUS_ADDR_MASK);
+
+	
+#if (RTL8192S_DISABLE_FW_DM == 1)
+	write_nic_dword(dev, WFM5, FW_DM_DISABLE); 
+	ChkFwCmdIoDone(dev);
+	write_nic_dword(dev, WFM5, FW_TXANT_SWITCH_DISABLE); 
+	ChkFwCmdIoDone(dev);
+#endif
+
+#if (HAL_MAC_ENABLE == 1)
+	RT_TRACE(COMP_INIT, "MAC Config Start!\n");
+	if (PHY_MACConfig8192S(dev) != true)
+	{
+		RT_TRACE(COMP_ERR, "MAC Config failed\n");
+		return rtStatus;
+	}
+	RT_TRACE(COMP_INIT, "MAC Config Finished!\n");
+#endif	
+
+	write_nic_dword(dev, CMDR, 0x37FC); 
+
+#if (HAL_BB_ENABLE == 1)
+	RT_TRACE(COMP_INIT, "BB Config Start!\n");
+	if (PHY_BBConfig8192S(dev) != true)
+	{
+		RT_TRACE(COMP_INIT, "BB Config failed\n");
+		return rtStatus;
+	}
+	RT_TRACE(COMP_INIT, "BB Config Finished!\n");
+#endif	
+
+
+	priv->Rf_Mode = RF_OP_By_SW_3wire;
+#if (HAL_RF_ENABLE == 1)		
+	RT_TRACE(COMP_INIT, "RF Config started!\n");
+
+#if (RTL92SE_FPGA_VERIFY == 0)
+	write_nic_byte(dev, AFE_XTAL_CTRL+1, 0xDB);
+	if(priv->card_8192_version== VERSION_8192S_ACUT)
+		write_nic_byte(dev, SPS1_CTRL+3, 0x07);
+	else
+		write_nic_byte(dev, RF_CTRL, 0x07);
+#endif	
+	if(PHY_RFConfig8192S(dev) != true)
+	{
+		RT_TRACE(COMP_ERR, "RF Config failed\n");
+		return rtStatus;
+	}
+	RT_TRACE(COMP_INIT, "RF Config Finished!\n");	
+#endif	
+
+
+	priv->RfRegChnlVal[0] = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)0, RF_CHNLBW, bRFRegOffsetMask);
+	priv->RfRegChnlVal[1] = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)1, RF_CHNLBW, bRFRegOffsetMask);
+
+	rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
+	rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
+	
+	HwConfigureRTL8192SE(dev);
+
+	if(priv->ResetProgress == RESET_TYPE_NORESET)
+		rtl8192_SetWirelessMode(dev, priv->rtllib->mode);
+	CamResetAllEntry(dev);
+	{
+		u8 SECR_value = 0x0;
+		SECR_value |= SCR_TxEncEnable;
+		SECR_value |= SCR_RxDecEnable;
+		SECR_value |= SCR_NoSKMC;
+		write_nic_byte(dev, SECR, SECR_value);
+	}
+
+	{
+		int i;
+		for (i=0; i<4; i++)
+		 write_nic_dword(dev, WDCAPARA_ADD[i], 0x5e4322); 
+	}
+	{
+		PHY_GetHWRegOriginalValue(dev);
+#ifndef CONFIG_MP
+		rtl8192_phy_setTxPower(dev, priv->chan);
+#endif
+	}
+
+	rtl8192se_HalDetectPwrDownMode(dev);
+#if 1
+	if(priv->RegRfOff == true)
+	{ 
+		RT_TRACE((COMP_INIT|COMP_RF), "InitializeAdapter8190(): Turn off RF for RegRfOff ----------\n");
+		MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_SW);
+
+		for(eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++)
+			rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x0);
+	
+	}
+	else if(priv->rtllib->RfOffReason > RF_CHANGE_BY_PS)
+	{ 
+		RT_TRACE((COMP_INIT|COMP_RF), "InitializeAdapter8190(): Turn off RF for RfOffReason(%d) ----------\n", priv->rtllib->RfOffReason);
+		MgntActSet_RF_State(dev, eRfOff, priv->rtllib->RfOffReason);
+	}
+	else
+	{
+            if(priv->bHwRadioOff == false){
+		priv->rtllib->eRFPowerState = eRfOn;
+		priv->rtllib->RfOffReason = 0; 
+		if(priv->rtllib->LedControlHandler)
+			priv->rtllib->LedControlHandler(dev, LED_CTL_POWER_ON);
+	}		
+	}		
+#endif
+
+
+	
+	{
+		int i;
+		for (i=0;i<6;i++)
+			write_nic_byte(dev, MACIDR0+i, dev->dev_addr[i]); 	
+	}
+
+	tmpU1b = read_nic_byte(dev, MAC_PINMUX_CFG);
+	write_nic_byte(dev, MAC_PINMUX_CFG, tmpU1b&(~BIT3));
+	
+	if(priv->CustomerID == RT_CID_CCX)
+	{
+		RT_TRACE(COMP_INIT ,"InitializeAdapter8192SE(): Set FW Cmd FW_TX_FEEDBACK_CCX_ENABLE\n");
+		write_nic_dword(dev, WFM5, FW_TX_FEEDBACK_CCX_ENABLE); 
+		ChkFwCmdIoDone(dev);
+		
+		write_nic_dword(dev, WFM5, FW_HIGH_PWR_DISABLE); 
+		ChkFwCmdIoDone(dev);
+		write_nic_dword(dev, WFM5, FW_DIG_HALT);
+		ChkFwCmdIoDone(dev);
+
+		write_nic_byte(dev, 0xC50, 0x1C);
+		write_nic_byte(dev, 0xC58, 0x1C);
+	}
+	
+	if(priv->pFirmware->FirmwareVersion >= 0x49){
+		u8 tmp_byte = 0;
+		
+		tmp_byte = read_nic_byte(dev, FW_RSVD_PG_CRTL) & (~BIT4);
+		tmp_byte = tmp_byte | BIT5;
+		write_nic_byte(dev, FW_RSVD_PG_CRTL, tmp_byte); 
+
+		write_nic_dword(dev, TXDESC_MSK, 0xFFFFCFFF); 
+	}
+	
+	if(priv->pFirmware->FirmwareVersion >= 0x35)
+	{
+		priv->rtllib->SetFwCmdHandler(dev, FW_CMD_RA_INIT);
+	}
+       else if(priv->pFirmware->FirmwareVersion >= 0x34) 
+	{
+		write_nic_dword(dev, WFM5, FW_RA_INIT); 
+		ChkFwCmdIoDone(dev);
+	}
+	else
+	{
+	write_nic_dword(dev, WFM5, FW_RA_RESET); 
+	ChkFwCmdIoDone(dev);
+	write_nic_dword(dev, WFM5, FW_RA_ACTIVE); 
+	ChkFwCmdIoDone(dev);
+	write_nic_dword(dev, WFM5, FW_RA_REFRESH); 
+		ChkFwCmdIoDone(dev);
+        }
+	
+	
+
+		PHY_SwitchEphyParameter(dev);
+	RF_RECOVERY(dev, 0x25, 0x29);
+
+	priv->SilentResetRxSlotIndex = 0;
+	for( i=0; i < MAX_SILENT_RESET_RX_SLOT_NUM; i++ )
+	{
+		priv->SilentResetRxStuckEvent[i] = 0;
+	}
+
+	if(priv->BluetoothCoexist)
+	{
+		printk("Write reg 0x%x = 1 for Bluetooth Co-existance\n", SYSF_CFG);
+		write_nic_byte(dev, SYSF_CFG, 0x1);
+	}		
+	
+	priv->bIgnoreSilentReset = true;
+	
+#ifdef CONFIG_FW_PARSEBEACON
+	if (!(priv->rtllib->softmac_features & IEEE_SOFTMAC_SCAN)){
+		write_nic_dword(dev, RXFILTERMAP, 0x0100);
+	}	
+#endif
+	rtl8192_irq_enable(dev);
+end:
+	priv->being_init_adapter = false;
+	return rtStatus;
+
+	
+}
+
+void rtl8192se_net_update(struct net_device *dev)
+{
+
+	struct r8192_priv *priv = rtllib_priv(dev);
+	struct rtllib_network *net = &priv->rtllib->current_network;
+	u16 rate_config = 0;
+	u32 regTmp = 0;
+	u8 rateIndex = 0;
+	u8	RetryLimit = 0x30;
+	u16 cap = net->capability;
+
+	priv->short_preamble = cap & WLAN_CAPABILITY_SHORT_PREAMBLE;
+	
+	{
+	rtl8192_config_rate(dev, &rate_config);	
+	if (priv->card_8192_version== VERSION_8192S_ACUT)
+		priv->basic_rate = rate_config  = rate_config & 0x150;
+	else if (priv->card_8192_version == VERSION_8192S_BCUT)
+		priv->basic_rate= rate_config = rate_config & 0x15f;
+
+#if 1	
+  	if(priv->rtllib->pHTInfo->IOTPeer == HT_IOT_PEER_CISCO && ((rate_config &0x150)==0))
+	{
+		rate_config |=0x010;
+	}
+	if(priv->rtllib->pHTInfo->IOTPeer & HT_IOT_ACT_WA_IOT_Broadcom)
+	{	
+		rate_config &= 0x1f0;
+		printk("HW_VAR_BASIC_RATE, HT_IOT_ACT_WA_IOT_Broadcom, BrateCfg = 0x%x\n", rate_config);
+	}
+
+	write_nic_byte(dev, RRSR, rate_config&0xff);
+	write_nic_byte(dev, RRSR+1, (rate_config>>8)&0xff);
+
+	while(rate_config > 0x1)
+	{
+		rate_config = (rate_config>> 1);
+		rateIndex++;
+	}
+	write_nic_byte(dev, INIRTSMCS_SEL, rateIndex);
+
+	regTmp = (priv->nCur40MhzPrimeSC) << 5;
+	if (priv->short_preamble)
+		regTmp |= 0x80;
+	write_nic_byte(dev, RRSR+2, regTmp);
+#endif
+	}
+
+	write_nic_dword(dev,BSSIDR,((u32*)net->bssid)[0]);
+	write_nic_word(dev,BSSIDR+4,((u16*)net->bssid)[2]);
+
+	if (priv->rtllib->iw_mode == IW_MODE_ADHOC){
+		RetryLimit = HAL_RETRY_LIMIT_AP_ADHOC;
+	} else {
+		RetryLimit = (priv->CustomerID == RT_CID_CCX) ? 7 : HAL_RETRY_LIMIT_INFRA;
+	}	
+	priv->rtllib->SetHwRegHandler(dev, HW_VAR_RETRY_LIMIT, (u8*)(&RetryLimit));
+		
+	if (priv->rtllib->iw_mode == IW_MODE_ADHOC){
+		priv->rtllib->SetHwRegHandler( dev, HW_VAR_BEACON_INTERVAL, (u8*)(&net->beacon_interval));
+	}
+			
+	rtl8192_update_cap(dev, cap);
+}
+
+#ifdef _RTL8192_EXT_PATCH_
+void rtl8192se_mesh_net_update(struct net_device *dev)
+{
+
+	struct r8192_priv *priv = rtllib_priv(dev);
+	struct rtllib_network *net = &priv->rtllib->current_mesh_network;
+	u16 rate_config = 0;
+	u32 regTmp = 0;
+	u8 rateIndex = 0;
+	u8	retrylimit = 0x7;
+	u16 cap = net->capability;
+	/* At the peer mesh mode, the peer MP shall recognize the short preamble */
+	priv->short_preamble = 1;
+	
+	if (priv->card_8192_version== VERSION_8192S_ACUT)
+		priv->basic_rate = rate_config  = 0x150;
+	else if (priv->card_8192_version == VERSION_8192S_BCUT)
+		priv->basic_rate= rate_config = 0x15f;
+
+	write_nic_byte(dev, RRSR, rate_config&0xff);
+	write_nic_byte(dev, RRSR+1, (rate_config>>8)&0xff);
+
+	while(rate_config > 0x1)
+	{
+		rate_config = (rate_config>> 1);
+		rateIndex++;
+	}
+	write_nic_byte(dev, INIRTSMCS_SEL, rateIndex);
+
+	regTmp = (priv->nCur40MhzPrimeSC) << 5;
+	if (priv->short_preamble)
+		regTmp |= 0x80;
+	write_nic_byte(dev, RRSR+2, regTmp);
+
+
+	write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
+	PHY_SetBeaconHwReg( dev, net->beacon_interval);
+	rtl8192_update_cap(dev, cap);
+	
+	priv->ShortRetryLimit = 
+		priv->LongRetryLimit = retrylimit;
+			
+	write_nic_word(dev,RETRY_LIMIT, \
+			retrylimit << RETRY_LIMIT_SHORT_SHIFT | \
+			retrylimit << RETRY_LIMIT_LONG_SHIFT);	
+}
+#endif
+
+void rtl8192se_link_change(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	struct rtllib_device* ieee = priv->rtllib;
+	u32 reg = 0;
+
+	if(IS_NIC_DOWN(priv))
+		return;
+
+	priv->rtllib->GetHwRegHandler(dev, HW_VAR_RCR, (u8*)(&reg));
+	
+	printk("===>%s():ieee->iw_mode is %d\n",__FUNCTION__,ieee->iw_mode);
+	if (ieee->state == RTLLIB_LINKED) {
+#ifdef CONFIG_FW_PARSEBEACON
+		if (!(priv->rtllib->softmac_features & IEEE_SOFTMAC_SCAN)){
+			write_nic_dword(dev, RXFILTERMAP, 0x0000);
+		}	
+#endif
+		if(priv->DM_Type == DM_Type_ByFW) {
+			if(ieee->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_HIGH_POWER)
+				ieee->SetFwCmdHandler(dev, FW_CMD_HIGH_PWR_DISABLE);
+			else
+				ieee->SetFwCmdHandler(dev, FW_CMD_HIGH_PWR_ENABLE);	
+		}
+		rtl8192se_net_update(dev);
+
+		if(ieee->bUseRAMask){
+			ieee->UpdateHalRAMaskHandler(
+									dev,
+									false,
+									0,
+									ieee->pHTInfo->PeerMimoPs,
+									ieee->mode,
+									ieee->pHTInfo->bCurTxBW40MHz,
+									0);
+			priv->rssi_level = 0;
+		}else{
+			rtl8192se_update_ratr_table(dev,ieee->dot11HTOperationalRateSet,NULL);
+		}
+		if(ieee->IntelPromiscuousModeInfo.bPromiscuousOn)
+			;
+		else
+			reg |= RCR_CBSSID;
+	} 
+#ifdef _RTL8192_EXT_PATCH_
+	else if ((ieee->mesh_state == RTLLIB_MESH_LINKED) && ieee->only_mesh) {
+		rtl8192se_mesh_net_update(dev);
+		if(ieee->bUseRAMask){
+			ieee->UpdateHalRAMaskHandler(
+									dev,
+									false,
+									0,
+									ieee->pHTInfo->PeerMimoPs,
+									ieee->mode,
+									ieee->pHTInfo->bCurTxBW40MHz,
+									0);
+			priv->rssi_level = 0;
+		}else{
+			rtl8192se_update_ratr_table(dev,ieee->dot11HTOperationalRateSet,NULL);
+		}
+#ifdef CONFIG_FW_PARSEBEACON
+		if (!(priv->rtllib->softmac_features & IEEE_SOFTMAC_SCAN)){
+			write_nic_dword(dev, RXFILTERMAP, 0x0100);
+		}	
+#endif
+		reg &= ~RCR_CBSSID;
+	} 
+#endif
+	else{
+#ifdef CONFIG_FW_PARSEBEACON
+		if (!(priv->rtllib->softmac_features & IEEE_SOFTMAC_SCAN)){
+			write_nic_dword(dev, RXFILTERMAP, 0x0100);
+		}	
+#endif
+		reg &= ~RCR_CBSSID;
+	}
+	priv->rtllib->SetHwRegHandler( dev, HW_VAR_RCR, (u8*)(&reg) );
+
+	rtl8192se_update_msr(dev);
+	{		
+		u32	temp = read_nic_dword(dev, TCR);
+		write_nic_dword(dev, TCR, temp&(~BIT8));
+		write_nic_dword(dev, TCR, temp|BIT8);
+	}
+}
+
+void rtl8192se_AllowAllDestAddr(struct net_device* dev,
+                        bool bAllowAllDA, bool WriteIntoReg)
+{
+        struct r8192_priv* priv = rtllib_priv(dev);
+
+	if( bAllowAllDA )
+        {
+                priv->ReceiveConfig |= RCR_AAP;         
+        }
+        else
+        {
+                priv->ReceiveConfig &= ~RCR_AAP;                
+        }
+
+        if( WriteIntoReg )
+        {
+                write_nic_dword( dev, RCR, priv->ReceiveConfig );
+        }
+}
+
+
+u8 MRateToHwRate8192SE(struct net_device*dev, u8 rate)
+{
+	u8	ret = DESC92S_RATE1M;
+	u16	max_sg_rate;
+	static	u16	multibss_sg_old = 0x1234;
+	u16	multibss_sg;
+		
+	switch(rate)
+	{
+	case MGN_1M:	ret = DESC92S_RATE1M;		break;
+	case MGN_2M:	ret = DESC92S_RATE2M;		break;
+	case MGN_5_5M:	ret = DESC92S_RATE5_5M;	break;
+	case MGN_11M:	ret = DESC92S_RATE11M;	break;
+	case MGN_6M:	ret = DESC92S_RATE6M;		break;
+	case MGN_9M:	ret = DESC92S_RATE9M;		break;
+	case MGN_12M:	ret = DESC92S_RATE12M;	break;
+	case MGN_18M:	ret = DESC92S_RATE18M;	break;
+	case MGN_24M:	ret = DESC92S_RATE24M;	break;
+	case MGN_36M:	ret = DESC92S_RATE36M;	break;
+	case MGN_48M:	ret = DESC92S_RATE48M;	break;
+	case MGN_54M:	ret = DESC92S_RATE54M;	break;
+
+	case MGN_MCS0:		ret = DESC92S_RATEMCS0;	break;
+	case MGN_MCS1:		ret = DESC92S_RATEMCS1;	break;
+	case MGN_MCS2:		ret = DESC92S_RATEMCS2;	break;
+	case MGN_MCS3:		ret = DESC92S_RATEMCS3;	break;
+	case MGN_MCS4:		ret = DESC92S_RATEMCS4;	break;
+	case MGN_MCS5:		ret = DESC92S_RATEMCS5;	break;
+	case MGN_MCS6:		ret = DESC92S_RATEMCS6;	break;
+	case MGN_MCS7:		ret = DESC92S_RATEMCS7;	break;
+	case MGN_MCS8:		ret = DESC92S_RATEMCS8;	break;
+	case MGN_MCS9:		ret = DESC92S_RATEMCS9;	break;
+	case MGN_MCS10:	ret = DESC92S_RATEMCS10;	break;
+	case MGN_MCS11:	ret = DESC92S_RATEMCS11;	break;
+	case MGN_MCS12:	ret = DESC92S_RATEMCS12;	break;
+	case MGN_MCS13:	ret = DESC92S_RATEMCS13;	break;
+	case MGN_MCS14:	ret = DESC92S_RATEMCS14;	break;
+	case MGN_MCS15:	ret = DESC92S_RATEMCS15;	break;	
+
+	case MGN_MCS0_SG:	
+	case MGN_MCS1_SG:
+	case MGN_MCS2_SG:	
+	case MGN_MCS3_SG:	
+	case MGN_MCS4_SG:	
+	case MGN_MCS5_SG:
+	case MGN_MCS6_SG:	
+	case MGN_MCS7_SG:	
+	case MGN_MCS8_SG:	
+	case MGN_MCS9_SG:
+	case MGN_MCS10_SG:
+	case MGN_MCS11_SG:	
+	case MGN_MCS12_SG:	
+	case MGN_MCS13_SG:	
+	case MGN_MCS14_SG:
+	case MGN_MCS15_SG:	
+			ret = DESC92S_RATEMCS15_SG;
+			max_sg_rate = rate&0xf;
+			multibss_sg = max_sg_rate | (max_sg_rate<<4) | (max_sg_rate<<8) | (max_sg_rate<<12);
+			if (multibss_sg_old != multibss_sg)
+			{
+				write_nic_dword(dev, SG_RATE, multibss_sg);
+				multibss_sg_old = multibss_sg;
+			}
+			break;
+
+
+	case (0x80|0x20): 	ret = DESC92S_RATEMCS32; break;
+
+	default:				ret = DESC92S_RATEMCS15;	break;
+
+	}
+
+	return ret;
+}
+
+u8 rtl8192se_MapHwQueueToFirmwareQueue(u8 QueueID, u8 priority)
+{
+	u8 QueueSelect = 0x0;       
+
+	switch(QueueID) {
+#if defined RTL8192E || defined RTL8190P
+		case BE_QUEUE:
+			QueueSelect = QSLT_BE;  
+			break;
+
+		case BK_QUEUE:
+			QueueSelect = QSLT_BK;  
+			break;
+
+		case VO_QUEUE:
+			QueueSelect = QSLT_VO;  
+			break;
+
+		case VI_QUEUE:
+			QueueSelect = QSLT_VI;  
+			break;
+		case MGNT_QUEUE:
+			QueueSelect = QSLT_MGNT;
+			break;
+		case BEACON_QUEUE:
+			QueueSelect = QSLT_BEACON;
+			break;
+		case TXCMD_QUEUE:
+			QueueSelect = QSLT_CMD;
+			break;
+		case HIGH_QUEUE:
+			QueueSelect = QSLT_HIGH;
+			break;
+#elif defined RTL8192SE
+		case BE_QUEUE:
+			QueueSelect = priority; 
+			break;
+		case BK_QUEUE:
+			QueueSelect = priority; 
+			break;
+		case VO_QUEUE:
+			QueueSelect = priority; 
+			break;
+		case VI_QUEUE:
+			QueueSelect = priority; 
+			break;
+		case MGNT_QUEUE:
+			QueueSelect = QSLT_BE;
+			break;
+		case BEACON_QUEUE:
+			QueueSelect = QSLT_BEACON;
+			break;
+		case TXCMD_QUEUE:
+			QueueSelect = QSLT_CMD;
+			break;
+		case HIGH_QUEUE:
+			QueueSelect = QSLT_HIGH;
+			break;
+#endif
+		default:
+			RT_TRACE(COMP_ERR, "TransmitTCB(): Impossible Queue Selection: %d \n", QueueID);
+			break;
+	}
+	return QueueSelect;
+}
+
+
+void  rtl8192se_tx_fill_desc(struct net_device* dev, tx_desc * pDesc, cb_desc * cb_desc, struct sk_buff* skb)
+{
+	u8				*pSeq;
+	u16				Temp;
+	struct r8192_priv* priv = rtllib_priv(dev);
+
+	struct rtllib_hdr_1addr * header = NULL;
+
+	dma_addr_t mapping = pci_map_single(priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
+
+	u16 fc=0, stype=0;
+	header = (struct rtllib_hdr_1addr *)(((u8*)skb->data));
+	fc = header->frame_ctl;
+	stype = WLAN_FC_GET_STYPE(fc);
+	memset((void*)pDesc, 0, 32);		
+
+	{
+		
+		if(priv->rtllib->bUseRAMask){
+			if(cb_desc->macId < 32)
+			{
+				pDesc->MacID = cb_desc->macId;
+				pDesc->Rsvd_MacID = cb_desc->macId;
+			}
+		}
+		pDesc->TXHT		= (cb_desc->data_rate&0x80)?1:0;	
+
+#if (RTL92SE_FPGA_VERIFY == 0)
+		if (priv->card_8192_version== VERSION_8192S_ACUT)
+		{
+			if (cb_desc->data_rate== MGN_1M || cb_desc->data_rate == MGN_2M || 
+				cb_desc->data_rate == MGN_5_5M || cb_desc->data_rate == MGN_11M)
+			{
+				cb_desc->data_rate = MGN_12M;
+			}
+		}
+#endif			
+		pDesc->TxRate	= MRateToHwRate8192SE(dev,cb_desc->data_rate);
+		pDesc->TxShort	= rtl8192se_QueryIsShort(((cb_desc->data_rate&0x80)?1:0), MRateToHwRate8192SE(dev,cb_desc->data_rate), cb_desc);
+
+		if(cb_desc->bAMPDUEnable)
+		{			
+			pDesc->AggEn = 1;
+		}
+		else
+		{			
+			pDesc->AggEn = 0;
+		}
+
+		{
+			pSeq = (u8 *)(skb->data+22);
+			Temp = pSeq[0];
+			Temp <<= 12;			
+			Temp |= (*(u16 *)pSeq)>>4;
+			pDesc->Seq = Temp;
+		}
+		
+		pDesc->RTSEn	= (cb_desc->bRTSEnable && cb_desc->bCTSEnable==false)?1:0;				
+		pDesc->CTS2Self	= (cb_desc->bCTSEnable)?1:0;		
+		pDesc->RTSSTBC	= (cb_desc->bRTSSTBC)?1:0;
+		pDesc->RTSHT	= (cb_desc->rts_rate&0x80)?1:0;
+
+#if (RTL92SE_FPGA_VERIFY == 0)
+		if (priv->card_8192_version== VERSION_8192S_ACUT)
+		{
+			if (cb_desc->rts_rate == MGN_1M || cb_desc->rts_rate == MGN_2M || 
+				cb_desc->rts_rate == MGN_5_5M || cb_desc->rts_rate == MGN_11M)
+			{
+				cb_desc->rts_rate = MGN_12M;
+			}
+		}
+#endif	
+		pDesc->RTSRate	= MRateToHwRate8192SE(dev,cb_desc->rts_rate);
+		pDesc->RTSRate	= MRateToHwRate8192SE(dev,MGN_24M);
+		pDesc->RTSBW	= 0;
+		pDesc->RTSSC	= cb_desc->RTSSC;
+		pDesc->RTSShort	= (pDesc->RTSHT==0)?(cb_desc->bRTSUseShortPreamble?1:0):(cb_desc->bRTSUseShortGI?1:0);
+		if(priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40)
+		{
+			if(cb_desc->bPacketBW)
+			{
+				pDesc->TxBw		= 1;
+				pDesc->TXSC		= 0;
+			}
+			else
+			{				
+				pDesc->TxBw		= 0;
+				pDesc->TXSC		= priv->nCur40MhzPrimeSC;
+			}
+		}
+		else
+		{
+			pDesc->TxBw		= 0;
+			pDesc->TXSC		= 0;
+		}
+
+		pDesc->LINIP = 0;
+		pDesc->Offset = 32;
+		pDesc->PktSize = (u16)skb->len;		
+		
+		pDesc->RaBRSRID = cb_desc->RATRIndex;
+#if 0		
+printk("*************TXDESC:\n");
+printk("\tTxRate: %d\n", pDesc->TxRate);
+printk("\tAMPDUEn: %d\n", pDesc->AggEn);
+printk("\tTxBw: %d\n", pDesc->TxBw);
+printk("\tTXSC: %d\n", pDesc->TXSC);
+printk("\tPktSize: %d\n", pDesc->PktSize);
+printk("\tRatrIdx: %d\n", pDesc->RaBRSRID);
+#endif
+		 if (cb_desc->bHwSec) {
+       		 static u8 tmp =0;
+       		 if (!tmp) {
+            		 tmp = 1;
+	        	}
+#ifdef _RTL8192_EXT_PATCH_
+			if(cb_desc->mesh_pkt == 0)
+#endif	
+			{
+				switch (priv->rtllib->pairwise_key_type) {
+					case KEY_TYPE_WEP40:
+					case KEY_TYPE_WEP104:
+						pDesc->SecType = 0x1;
+						break;
+					case KEY_TYPE_TKIP:
+						pDesc->SecType = 0x2;
+						break;
+					case KEY_TYPE_CCMP:
+						pDesc->SecType = 0x3;
+						break;
+					case KEY_TYPE_NA:
+						pDesc->SecType = 0x0;
+						break;
+				}
+			}
+#ifdef _RTL8192_EXT_PATCH_
+			else if(cb_desc->mesh_pkt == 1)
+			{
+				switch (priv->rtllib->mesh_pairwise_key_type) {
+					case KEY_TYPE_WEP40:
+					case KEY_TYPE_WEP104:
+						pDesc->SecType = 0x1;
+						break;
+					case KEY_TYPE_TKIP:
+						pDesc->SecType = 0x2;
+						break;
+					case KEY_TYPE_CCMP:
+						pDesc->SecType = 0x3;
+						break;
+					case KEY_TYPE_NA:
+						pDesc->SecType = 0x0;
+						break;
+				}
+			}
+#endif			
+		}
+
+		pDesc->PktID			= 0x0;		
+		pDesc->QueueSel		= rtl8192se_MapHwQueueToFirmwareQueue(cb_desc->queue_index, cb_desc->priority); 
+		
+		pDesc->DataRateFBLmt	= 0x1F;		
+		pDesc->DISFB	= cb_desc->bTxDisableRateFallBack;
+		pDesc->UserRate	= cb_desc->bTxUseDriverAssingedRate;
+
+		if (pDesc->UserRate == true && pDesc->TXHT == true)		
+			RF_ChangeTxPath(dev, cb_desc->data_rate);
+
+	}
+	
+
+	pDesc->FirstSeg	= 1;
+	pDesc->LastSeg	= 1;
+	
+	pDesc->TxBufferSize= (u16)skb->len;	
+	
+	pDesc->TxBuffAddr = cpu_to_le32(mapping);
+
+}
+
+void  rtl8192se_tx_fill_cmd_desc(struct net_device* dev, tx_desc_cmd * entry, cb_desc * cb_desc, struct sk_buff* skb)
+{
+    struct r8192_priv *priv = rtllib_priv(dev);
+
+	if(cb_desc->bCmdOrInit == DESC_PACKET_TYPE_INIT) {
+		
+    dma_addr_t mapping = pci_map_single(priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
+		
+	memset((void*)entry, 0, 32); 	
+	
+	entry->LINIP = cb_desc->bLastIniPkt;
+		
+	entry->FirstSeg = 1;
+	entry->LastSeg = 1;
+	
+	entry->TxBufferSize= (u16)(skb->len);
+	entry->TxBufferAddr = cpu_to_le32(mapping);
+	entry->PktSize = (u16)(skb->len);
+	
+	{
+		entry->OWN = 1;
+	}
+	} else { 
+
+		u8*	pDesc = (u8*)entry;
+		
+    		dma_addr_t mapping = pci_map_single(priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
+		
+		CLEAR_PCI_TX_DESC_CONTENT(pDesc, sizeof(tx_desc_cmd));
+
+		SET_TX_DESC_FIRST_SEG(pDesc, 1); 
+		SET_TX_DESC_LAST_SEG(pDesc, 1); 
+
+		SET_TX_DESC_OFFSET(pDesc, 0x20); 
+
+		SET_TX_DESC_PKT_SIZE(pDesc, (u16)(skb->len)); 
+		SET_TX_DESC_QUEUE_SEL(pDesc, 0x13); 
+
+		
+		SET_BITS_TO_LE_4BYTE(skb->data, 24, 7, priv->H2CTxCmdSeq);
+
+		SET_TX_DESC_TX_BUFFER_SIZE(pDesc, (u16)(skb->len));
+		SET_TX_DESC_TX_BUFFER_ADDRESS(pDesc, cpu_to_le32(mapping));
+
+		SET_TX_DESC_OWN(pDesc, 1);
+
+		RT_TRACE(COMP_CMD, "TxFillCmdDesc8192SE(): H2C Tx Cmd Content ----->\n");
+	}
+}
+
+u8 HwRateToMRate92S(bool bIsHT,	u8 rate)
+{
+	u8	ret_rate = 0x02;
+
+	if (!bIsHT) {
+		switch (rate) {
+		case DESC92S_RATE1M:		
+			ret_rate = MGN_1M;		
+			break;
+		case DESC92S_RATE2M:		
+			ret_rate = MGN_2M;		
+			break;
+		case DESC92S_RATE5_5M:		
+			ret_rate = MGN_5_5M;		
+			break;
+		case DESC92S_RATE11M:		
+			ret_rate = MGN_11M;		
+			break;
+		case DESC92S_RATE6M:		
+			ret_rate = MGN_6M;		
+			break;
+		case DESC92S_RATE9M:		
+			ret_rate = MGN_9M;		
+			break;
+		case DESC92S_RATE12M:		
+			ret_rate = MGN_12M;		
+			break;
+		case DESC92S_RATE18M:		
+			ret_rate = MGN_18M;		
+			break;
+		case DESC92S_RATE24M:		
+			ret_rate = MGN_24M;		
+			break;
+		case DESC92S_RATE36M:		
+			ret_rate = MGN_36M;		
+			break;
+		case DESC92S_RATE48M:		
+			ret_rate = MGN_48M;		
+			break;
+		case DESC92S_RATE54M:		
+			ret_rate = MGN_54M;		
+			break;
+		default:							
+			ret_rate = 0xff;
+			break;
+		}
+	} else {
+		switch (rate) {
+		case DESC92S_RATEMCS0:	
+			ret_rate = MGN_MCS0;		
+			break;
+		case DESC92S_RATEMCS1:	
+			ret_rate = MGN_MCS1;		
+			break;
+		case DESC92S_RATEMCS2:	
+			ret_rate = MGN_MCS2;		
+			break;
+		case DESC92S_RATEMCS3:	
+			ret_rate = MGN_MCS3;		
+			break;
+		case DESC92S_RATEMCS4:	
+			ret_rate = MGN_MCS4;		
+			break;
+		case DESC92S_RATEMCS5:	
+			ret_rate = MGN_MCS5;		
+			break;
+		case DESC92S_RATEMCS6:	
+			ret_rate = MGN_MCS6;		
+			break;
+		case DESC92S_RATEMCS7:	
+			ret_rate = MGN_MCS7;		
+			break;
+		case DESC92S_RATEMCS8:	
+			ret_rate = MGN_MCS8;		
+			break;
+		case DESC92S_RATEMCS9:	
+			ret_rate = MGN_MCS9;		
+			break;
+		case DESC92S_RATEMCS10:	
+			ret_rate = MGN_MCS10;	
+			break;
+		case DESC92S_RATEMCS11:	
+			ret_rate = MGN_MCS11;	
+			break;
+		case DESC92S_RATEMCS12:	
+			ret_rate = MGN_MCS12;	
+			break;
+		case DESC92S_RATEMCS13:	
+			ret_rate = MGN_MCS13;	
+			break;
+		case DESC92S_RATEMCS14:	
+			ret_rate = MGN_MCS14;	
+			break;
+		case DESC92S_RATEMCS15:	
+			ret_rate = MGN_MCS15;	
+			break;
+		case DESC92S_RATEMCS32:	
+			ret_rate = (0x80|0x20);	
+			break;
+		default:							
+			ret_rate = 0xff;
+			break;
+		}
+
+	}	
+	return ret_rate;
+}
+
+long
+rtl8192se_signal_scale_mapping(struct r8192_priv * priv,
+	long currsig
+	)
+{
+	long retsig;
+
+#if defined RTL8192SE || defined RTL8192CE
+	if(priv->CustomerID == RT_CID_819x_Lenovo)
+	{
+		return currsig;
+	}
+	else if(priv->CustomerID == RT_CID_819x_Netcore)
+	{	
+		if(currsig >= 31 && currsig <= 100)
+		{
+			retsig = 100;
+		}	
+		else if(currsig >= 21 && currsig <= 30)
+		{
+			retsig = 90 + ((currsig - 20) / 1);
+		}
+		else if(currsig >= 11 && currsig <= 20)
+		{
+			retsig = 80 + ((currsig - 10) / 1);
+		}
+		else if(currsig >= 7 && currsig <= 10)
+		{
+			retsig = 69 + (currsig - 7);
+		}
+		else if(currsig == 6)
+		{
+			retsig = 54;
+		}
+		else if(currsig == 5)
+		{
+			retsig = 45;
+		}
+		else if(currsig == 4)
+		{
+			retsig = 36;
+		}
+		else if(currsig == 3)
+		{
+			retsig = 27;
+		}
+		else if(currsig == 2)
+		{
+			retsig = 18;
+		}
+		else if(currsig == 1)
+		{
+			retsig = 9;
+		}
+		else
+		{
+			retsig = currsig;
+		}
+		return retsig;
+	}
+#endif
+
+	if(currsig >= 61 && currsig <= 100)
+	{
+		retsig = 90 + ((currsig - 60) / 4);
+	}
+	else if(currsig >= 41 && currsig <= 60)
+	{
+		retsig = 78 + ((currsig - 40) / 2);
+	}
+	else if(currsig >= 31 && currsig <= 40)
+	{
+		retsig = 66 + (currsig - 30);
+	}
+	else if(currsig >= 21 && currsig <= 30)
+	{
+		retsig = 54 + (currsig - 20);
+	}
+	else if(currsig >= 5 && currsig <= 20)
+	{
+		retsig = 42 + (((currsig - 5) * 2) / 3);
+	}
+	else if(currsig == 4)
+	{
+		retsig = 36;
+	}
+	else if(currsig == 3)
+	{
+		retsig = 27;
+	}
+	else if(currsig == 2)
+	{
+		retsig = 18;
+	}
+	else if(currsig == 1)
+	{
+		retsig = 9;
+	}
+	else
+	{
+		retsig = currsig;
+	}
+	
+	return retsig;
+}
+
+
+#define 	rx_hal_is_cck_rate(_pdesc)\
+			(_pdesc->RxMCS == DESC92S_RATE1M ||\
+			 _pdesc->RxMCS == DESC92S_RATE2M ||\
+			 _pdesc->RxMCS == DESC92S_RATE5_5M ||\
+			 _pdesc->RxMCS == DESC92S_RATE11M)
+#ifdef _RTL8192_EXT_PATCH_
+void rtl8192se_query_rxphystatus(
+	struct r8192_priv * priv,
+	struct rtllib_rx_stats * pstats,
+	prx_desc  pdesc,	
+	prx_fwinfo   pDrvInfo,
+	bool bpacket_match_bssid,
+	bool bpacket_toself,
+	bool bPacketBeacon
+	)
+{
+	bool is_cck_rate;
+	phy_sts_cck_8192s_t* cck_buf;
+	u8 rx_pwr_all=0, rx_pwr[4], rf_rx_num=0, EVM, PWDB_ALL;
+	u8 i, max_spatial_stream;
+	u32 rssi, total_rssi = 0;
+	u8 cck_highpwr = 0;
+	is_cck_rate = rx_hal_is_cck_rate(pdesc);
+
+	pstats->bPacketMatchBSSID = bpacket_match_bssid;
+	pstats->bPacketToSelf = bpacket_toself;
+	pstats->bIsCCK = is_cck_rate;
+	pstats->bPacketBeacon = bPacketBeacon;
+
+	pstats->RxMIMOSignalQuality[0] = -1;
+	pstats->RxMIMOSignalQuality[1] = -1;
+
+	if (is_cck_rate){
+		u8 report;
+			
+		cck_buf = (phy_sts_cck_8192s_t*)pDrvInfo;
+
+		if(priv->rtllib->eRFPowerState == eRfOn)
+			cck_highpwr = (u8)priv->bCckHighPower;
+		else
+			cck_highpwr = false;
+		if (!cck_highpwr){
+			report = cck_buf->cck_agc_rpt & 0xc0;
+			report = report >> 6;
+			switch(report){
+				case 0x3:
+					rx_pwr_all = -40 - (cck_buf->cck_agc_rpt&0x3e);
+					break;
+				case 0x2:
+					rx_pwr_all = -20 - (cck_buf->cck_agc_rpt&0x3e);
+					break;
+				case 0x1:
+					rx_pwr_all = -2 - (cck_buf->cck_agc_rpt&0x3e);
+					break;
+				case 0x0:
+					rx_pwr_all = 14 - (cck_buf->cck_agc_rpt&0x3e);
+					break;
+			}
+		}
+		else{
+			report = pDrvInfo->cfosho[0] & 0x60;
+			report = report >> 5;
+			switch(report){
+				case 0x3:
+					rx_pwr_all = -40 - ((cck_buf->cck_agc_rpt & 0x1f)<<1);
+					break;
+				case 0x2:
+					rx_pwr_all = -20 - ((cck_buf->cck_agc_rpt & 0x1f)<<1);
+					break;
+				case 0x1:
+					rx_pwr_all = -2 - ((cck_buf->cck_agc_rpt & 0x1f)<<1);
+					break;
+				case 0x0:
+					rx_pwr_all = 14 - ((cck_buf->cck_agc_rpt & 0x1f)<<1);
+					break;
+			}
+		}
+
+		PWDB_ALL= rtl819x_query_rxpwrpercentage(rx_pwr_all);
+		{
+			PWDB_ALL+=6;
+			if(PWDB_ALL > 100)
+				PWDB_ALL = 100;
+			if(PWDB_ALL > 34 && PWDB_ALL <= 42)
+				PWDB_ALL -= 2;
+			else if(PWDB_ALL > 26 && PWDB_ALL <= 34)
+				PWDB_ALL -= 6;
+			else if(PWDB_ALL > 14 && PWDB_ALL <= 26)
+				PWDB_ALL -= 8;
+			else if(PWDB_ALL > 4 && PWDB_ALL <= 14)
+				PWDB_ALL -= 4;
+		}
+		pstats->RxPWDBAll = PWDB_ALL;
+		pstats->RecvSignalPower = rx_pwr_all;
+
+		if (bpacket_match_bssid){
+			u8 sq;
+			if(priv->CustomerID == RT_CID_819x_Lenovo)		
+			{
+				if(PWDB_ALL >= 50)
+					sq = 100;
+				else if(PWDB_ALL >= 35 && PWDB_ALL < 50)
+					sq = 80;
+				else if(PWDB_ALL >= 22 && PWDB_ALL < 35)
+					sq = 60;
+				else if(PWDB_ALL >= 18 && PWDB_ALL < 22)
+					sq = 40;
+				else
+					sq = 20;
+			}
+			else
+			{
+			if (pstats->RxPWDBAll > 40)
+				sq = 100;
+			else{
+				sq = cck_buf->sq_rpt;
+				if (sq > 64)
+					sq = 0;
+				else if(sq < 20)
+					sq = 100;
+				else
+					sq = ((64-sq)*100)/44;
+			}
+			}
+			pstats->SignalQuality = sq;
+			pstats->RxMIMOSignalQuality[0] = sq;
+			pstats->RxMIMOSignalQuality[1] = -1;
+		}
+	}
+	else{
+		priv->brfpath_rxenable[0] = priv->brfpath_rxenable[1] = true;
+
+		for (i=RF90_PATH_A; i<RF90_PATH_MAX; i++){
+			if (priv->brfpath_rxenable[i])
+				rf_rx_num ++;
+
+			rx_pwr[i] = ((pDrvInfo->gain_trsw[i]&0x3f)*2) - 110;
+			rssi = rtl819x_query_rxpwrpercentage(rx_pwr[i]);
+			total_rssi += rssi;
+
+			priv->stats.rxSNRdB[i] = (long)(pDrvInfo->rxsnr[i]/2);
+
+			if (bpacket_match_bssid){
+				pstats->RxMIMOSignalStrength[i] = (u8)rssi;
+				if(priv->CustomerID == RT_CID_819x_Lenovo)
+				{
+					u8	SQ;
+					
+					if(i == 0)
+					{
+						if(rssi >= 50)
+							SQ = 100;
+						else if(rssi >= 35 && rssi < 50)
+							SQ = 80;
+						else if(rssi >= 22 && rssi < 35)
+							SQ = 60;
+						else if(rssi >= 18 && rssi < 22)
+							SQ = 40;
+						else
+							SQ = 20;
+						pstats->SignalQuality = SQ;
+			}
+		}
+			}
+		}
+		rx_pwr_all = ((pDrvInfo->pwdb_all >> 1) & 0x7f) - 106;
+		PWDB_ALL = rtl819x_query_rxpwrpercentage(rx_pwr_all);
+
+		pstats->RxPWDBAll = PWDB_ALL;
+		pstats->RxPower = rx_pwr_all;
+		pstats->RecvSignalPower = rx_pwr_all;
+
+		if(priv->CustomerID != RT_CID_819x_Lenovo){	
+		if (pdesc->RxHT && pdesc->RxMCS >= DESC92S_RATEMCS8 && pdesc->RxMCS <= DESC92S_RATEMCS15)
+			max_spatial_stream = 2;
+		else
+			max_spatial_stream = 1;
+
+		for(i=0; i<max_spatial_stream; i++){
+			EVM = rtl819x_evm_dbtopercentage(pDrvInfo->rxevm[i]);
+
+			if (bpacket_match_bssid)
+			{
+				if (i==0)
+						pstats->SignalQuality = (u8)(EVM & 0xff);
+					pstats->RxMIMOSignalQuality[i] = (u8)(EVM&0xff);
+				}
+			}
+		}
+#if 1
+		if (pdesc->BandWidth)
+			priv->stats.received_bwtype[1+pDrvInfo->rxsc]++;
+		else
+			priv->stats.received_bwtype[0]++;
+#endif
+	}
+
+	if (is_cck_rate){
+		pstats->SignalStrength = (u8)(rtl8192se_signal_scale_mapping(priv,PWDB_ALL));
+	}
+	else {
+		if (rf_rx_num != 0)
+			pstats->SignalStrength = (u8)(rtl8192se_signal_scale_mapping(priv,total_rssi/=rf_rx_num));
+	}
+}
+#else
+void rtl8192se_query_rxphystatus(
+	struct r8192_priv * priv,
+	struct rtllib_rx_stats * pstats,
+	prx_desc  pdesc,	
+	prx_fwinfo   pDrvInfo,
+	struct rtllib_rx_stats * precord_stats,
+	bool bpacket_match_bssid,
+	bool bpacket_toself,
+	bool bPacketBeacon,
+	bool bToSelfBA
+	)
+{
+	bool is_cck_rate;
+	phy_sts_cck_8192s_t* cck_buf;
+	s8 rx_pwr_all=0, rx_pwr[4]; 
+	u8 rf_rx_num=0, EVM, PWDB_ALL;
+	u8 i, max_spatial_stream;
+	u32 rssi, total_rssi = 0;
+
+	is_cck_rate = rx_hal_is_cck_rate(pdesc);
+
+	memset(precord_stats, 0, sizeof(struct rtllib_rx_stats));
+	pstats->bPacketMatchBSSID = precord_stats->bPacketMatchBSSID = bpacket_match_bssid;
+	pstats->bPacketToSelf = precord_stats->bPacketToSelf = bpacket_toself;
+	pstats->bIsCCK = precord_stats->bIsCCK = is_cck_rate;
+	pstats->bPacketBeacon = precord_stats->bPacketBeacon = bPacketBeacon;
+	pstats->bToSelfBA = precord_stats->bToSelfBA = bToSelfBA;
+	pstats->bIsCCK = precord_stats->bIsCCK = is_cck_rate;
+
+	pstats->RxMIMOSignalQuality[0] = -1;
+	pstats->RxMIMOSignalQuality[1] = -1;
+	precord_stats->RxMIMOSignalQuality[0] = -1;
+	precord_stats->RxMIMOSignalQuality[1] = -1;
+
+	if (is_cck_rate){
+		u8 report, cck_highpwr;
+			
+		cck_buf = (phy_sts_cck_8192s_t*)pDrvInfo;
+
+		if(!priv->bInPowerSaveMode)
+		cck_highpwr = (u8)rtl8192_QueryBBReg(priv->rtllib->dev, rFPGA0_XA_HSSIParameter2, BIT9);
+		else
+			cck_highpwr = false;
+		if (!cck_highpwr){
+			report = cck_buf->cck_agc_rpt & 0xc0;
+			report = report >> 6;
+			switch(report){
+				case 0x3:
+					rx_pwr_all = -35 - (cck_buf->cck_agc_rpt&0x3e);
+					break;
+				case 0x2:
+					rx_pwr_all = -23 - (cck_buf->cck_agc_rpt&0x3e);
+					break;
+				case 0x1:
+					rx_pwr_all = -11 - (cck_buf->cck_agc_rpt&0x3e);
+					break;
+				case 0x0:
+					rx_pwr_all = 8 - (cck_buf->cck_agc_rpt&0x3e);
+					break;
+			}
+		}
+		else{
+			report = pDrvInfo->cfosho[0] & 0x60;
+			report = report >> 5;
+			switch(report){
+				case 0x3:
+					rx_pwr_all = -35 - ((cck_buf->cck_agc_rpt & 0x1f)<<1);
+					break;
+				case 0x2:
+					rx_pwr_all = -23 - ((cck_buf->cck_agc_rpt & 0x1f)<<1);
+					break;
+				case 0x1:
+					rx_pwr_all = -11 - ((cck_buf->cck_agc_rpt & 0x1f)<<1);
+					break;
+				case 0x0:
+					rx_pwr_all = -8 - ((cck_buf->cck_agc_rpt & 0x1f)<<1);
+					break;
+			}
+		}
+
+		PWDB_ALL= rtl819x_query_rxpwrpercentage(rx_pwr_all);
+		pstats->RxPWDBAll = precord_stats->RxPWDBAll = PWDB_ALL;
+		pstats->RecvSignalPower = rx_pwr_all;
+
+		if (bpacket_match_bssid){
+			u8 sq;
+			if (pstats->RxPWDBAll > 40)
+				sq = 100;
+			else{
+				sq = cck_buf->sq_rpt;
+				if (sq > 64)
+					sq = 0;
+				else if(sq < 20)
+					sq = 100;
+				else
+					sq = ((64-sq)*100)/44;
+			}
+			pstats->SignalQuality = precord_stats->SignalQuality = sq;
+			pstats->RxMIMOSignalQuality[0] = precord_stats->RxMIMOSignalQuality[0] = sq;
+			pstats->RxMIMOSignalQuality[1] = precord_stats->RxMIMOSignalQuality[1] = -1;
+		}
+	}
+	else{
+		priv->brfpath_rxenable[0] = priv->brfpath_rxenable[1] = true;
+
+		for (i=RF90_PATH_A; i<RF90_PATH_MAX; i++){
+			if (priv->brfpath_rxenable[i])
+				rf_rx_num ++;
+
+			rx_pwr[i] = ((pDrvInfo->gain_trsw[i]&0x3f)*2) - 110;
+			rssi = rtl819x_query_rxpwrpercentage(rx_pwr[i]);
+			total_rssi += rssi;
+
+			priv->stats.rxSNRdB[i] = (long)(pDrvInfo->rxsnr[i]/2);
+
+			if (bpacket_match_bssid){
+				pstats->RxMIMOSignalStrength[i] = (u8)rssi;
+				precord_stats->RxMIMOSignalStrength [i] = (u8)rssi;
+			}
+		}
+
+		rx_pwr_all = ((pDrvInfo->pwdb_all >> 1) & 0x7f) - 0x106;
+		PWDB_ALL = rtl819x_query_rxpwrpercentage(rx_pwr_all);
+
+		pstats->RxPWDBAll = precord_stats->RxPWDBAll = PWDB_ALL;
+		pstats->RxPower = precord_stats->RxPower = rx_pwr_all;
+		pstats->RecvSignalPower = precord_stats->RecvSignalPower = rx_pwr_all;
+
+		if (pdesc->RxHT && pdesc->RxMCS >= DESC92S_RATEMCS8 && pdesc->RxMCS <= DESC92S_RATEMCS15)
+			max_spatial_stream = 2;
+		else
+			max_spatial_stream = 1;
+
+		for(i=0; i<max_spatial_stream; i++){
+			EVM = rtl819x_evm_dbtopercentage(pDrvInfo->rxevm[i]);
+
+			if (bpacket_match_bssid)
+			{
+				if (i==0)
+					pstats->SignalQuality = 
+					precord_stats->SignalQuality = (u8)(EVM&0xff);
+				pstats->RxMIMOSignalQuality[i] =
+				precord_stats->RxMIMOSignalQuality[i] = (u8)(EVM&0xff);
+			}
+		}
+#if 0
+		if (pdesc->BW)
+			priv->stats.received_bwtype[1+pDrvInfo->rxsc]++;
+		else
+			priv->stats.received_bwtype[0]++;
+#endif
+	}
+
+	if (is_cck_rate)
+		pstats->SignalStrength = 
+		precord_stats->SignalStrength = (u8)(rtl8192se_signal_scale_mapping(priv,PWDB_ALL));
+	else
+		if (rf_rx_num != 0)
+			pstats->SignalStrength = 
+			precord_stats->SignalStrength = (u8)(rtl8192se_signal_scale_mapping(priv,total_rssi/=rf_rx_num));
+
+}
+#endif
+
+#ifdef _RTL8192_EXT_PATCH_
+void rtl819x_update_rxsignalstatistics8192S(
+	struct r8192_priv * priv,
+	struct rtllib_rx_stats * pstats
+	)
+{
+	int	weighting = 0;
+
+
+	if(priv->stats.recv_signal_power == 0)
+		priv->stats.recv_signal_power = pstats->RecvSignalPower;
+
+	if(pstats->RecvSignalPower > priv->stats.recv_signal_power)
+		weighting = 5;
+	else if(pstats->RecvSignalPower < priv->stats.recv_signal_power)
+		weighting = (-5);
+	priv->stats.recv_signal_power = (priv->stats.recv_signal_power * 5 + pstats->RecvSignalPower + weighting) / 6;
+
+}	
+
+void Process_UI_RSSI_8192S(struct r8192_priv * priv,struct rtllib_rx_stats * pstats)
+{
+	u8			rfPath;
+	u32			last_rssi, tmpVal;
+
+	if(pstats->bPacketToSelf || pstats->bPacketBeacon)
+	{
+		priv->stats.RssiCalculateCnt++;	
+		if(priv->stats.ui_rssi.TotalNum++ >= PHY_RSSI_SLID_WIN_MAX)
+		{
+			priv->stats.ui_rssi.TotalNum = PHY_RSSI_SLID_WIN_MAX;
+			last_rssi = priv->stats.ui_rssi.elements[priv->stats.ui_rssi.index];
+			priv->stats.ui_rssi.TotalVal -= last_rssi;
+		}
+		priv->stats.ui_rssi.TotalVal += pstats->SignalStrength;
+	
+		priv->stats.ui_rssi.elements[priv->stats.ui_rssi.index++] = pstats->SignalStrength;
+		if(priv->stats.ui_rssi.index >= PHY_RSSI_SLID_WIN_MAX)
+			priv->stats.ui_rssi.index = 0;
+	
+		tmpVal = priv->stats.ui_rssi.TotalVal/priv->stats.ui_rssi.TotalNum;
+		priv->stats.signal_strength = rtl819x_translate_todbm(priv, (u8)tmpVal);
+
+	}
+
+	if(!pstats->bIsCCK && pstats->bPacketToSelf)
+	{
+		for (rfPath = RF90_PATH_A; rfPath < priv->NumTotalRFPath; rfPath++)
+		{
+			if (!rtl8192_phy_CheckIsLegalRFPath(priv->rtllib->dev, rfPath))
+				continue;
+			RT_TRACE(COMP_DBG, "pstats->RxMIMOSignalStrength[%d]  = %d \n", rfPath, pstats->RxMIMOSignalStrength[rfPath] );
+
+			if(priv->stats.rx_rssi_percentage[rfPath] == 0)	
+			{
+				priv->stats.rx_rssi_percentage[rfPath] = pstats->RxMIMOSignalStrength[rfPath];
+			}
+			
+			if(pstats->RxMIMOSignalStrength[rfPath]  > priv->stats.rx_rssi_percentage[rfPath])
+			{
+				priv->stats.rx_rssi_percentage[rfPath] = 
+					( (priv->stats.rx_rssi_percentage[rfPath]*(Rx_Smooth_Factor-1)) + 
+					(pstats->RxMIMOSignalStrength[rfPath])) /(Rx_Smooth_Factor);
+				priv->stats.rx_rssi_percentage[rfPath] = priv->stats.rx_rssi_percentage[rfPath] + 1;
+			}
+			else
+			{
+				priv->stats.rx_rssi_percentage[rfPath] = 
+					( (priv->stats.rx_rssi_percentage[rfPath]*(Rx_Smooth_Factor-1)) + 
+					(pstats->RxMIMOSignalStrength[rfPath])) /(Rx_Smooth_Factor);
+			}
+			RT_TRACE(COMP_DBG, "priv->stats.rx_rssi_percentage[%d]  = %d \n",rfPath, priv->stats.rx_rssi_percentage[rfPath] );
+		}
+	}
+	
+}	
+
+void Process_PWDB_8192S(struct r8192_priv * priv,struct rtllib_rx_stats * pstats,struct rtllib_network* pnet, struct sta_info *pEntry)
+{
+	long	UndecoratedSmoothedPWDB=0;
+
+	if(priv->rtllib->iw_mode == IW_MODE_MESH){
+		if(pnet){
+			if(priv->mshobj->ext_patch_get_peermp_rssi_param)
+				UndecoratedSmoothedPWDB = priv->mshobj->ext_patch_get_peermp_rssi_param(pnet);
+		}else
+			UndecoratedSmoothedPWDB = priv->undecorated_smoothed_pwdb;
+	}
+	else if(priv->rtllib->iw_mode == IW_MODE_ADHOC){
+		if(pEntry){
+			UndecoratedSmoothedPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB;
+		}
+	}else
+		UndecoratedSmoothedPWDB = priv->undecorated_smoothed_pwdb;
+
+	if(pstats->bPacketToSelf || pstats->bPacketBeacon){
+		if(UndecoratedSmoothedPWDB < 0){	
+			UndecoratedSmoothedPWDB = pstats->RxPWDBAll;
+		}
+		
+		if(pstats->RxPWDBAll > (u32)UndecoratedSmoothedPWDB){
+			UndecoratedSmoothedPWDB = 	
+					( ((UndecoratedSmoothedPWDB)*(Rx_Smooth_Factor-1)) + 
+					(pstats->RxPWDBAll)) /(Rx_Smooth_Factor);
+			UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB + 1;
+		}else{
+			UndecoratedSmoothedPWDB = 	
+					( ((UndecoratedSmoothedPWDB)*(Rx_Smooth_Factor-1)) + 
+					(pstats->RxPWDBAll)) /(Rx_Smooth_Factor);
+		}
+		if(priv->rtllib->iw_mode == IW_MODE_MESH){
+			if(pnet){
+				if(priv->mshobj->ext_patch_set_peermp_rssi_param)
+					priv->mshobj->ext_patch_set_peermp_rssi_param(pnet,UndecoratedSmoothedPWDB);
+			}else
+				priv->undecorated_smoothed_pwdb = UndecoratedSmoothedPWDB;
+		}else if(priv->rtllib->iw_mode == IW_MODE_ADHOC){
+			if(pEntry){
+				pEntry->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
+			}
+		}else{
+			priv->undecorated_smoothed_pwdb = UndecoratedSmoothedPWDB;
+		}
+		rtl819x_update_rxsignalstatistics8192S(priv, pstats);
+	}
+}
+
+void Process_UiLinkQuality8192S(struct r8192_priv * priv,struct rtllib_rx_stats * pstats)
+{
+	u32	last_evm=0, nSpatialStream, tmpVal;
+
+	if(pstats->SignalQuality != 0)	
+	{
+		if (pstats->bPacketToSelf || pstats->bPacketBeacon)
+		{
+			if(priv->stats.ui_link_quality.TotalNum++ >= PHY_LINKQUALITY_SLID_WIN_MAX)
+			{
+				priv->stats.ui_link_quality.TotalNum = PHY_LINKQUALITY_SLID_WIN_MAX;
+				last_evm = priv->stats.ui_link_quality.elements[priv->stats.ui_link_quality.index];
+				priv->stats.ui_link_quality.TotalVal -= last_evm;
+			}
+			priv->stats.ui_link_quality.TotalVal += pstats->SignalQuality;
+
+			priv->stats.ui_link_quality.elements[priv->stats.ui_link_quality.index++] = pstats->SignalQuality;
+			if(priv->stats.ui_link_quality.index >= PHY_LINKQUALITY_SLID_WIN_MAX)
+				priv->stats.ui_link_quality.index = 0;
+
+
+			tmpVal = priv->stats.ui_link_quality.TotalVal/priv->stats.ui_link_quality.TotalNum;
+			priv->stats.signal_quality = tmpVal;
+			priv->stats.last_signal_strength_inpercent = tmpVal;
+		
+			for(nSpatialStream = 0; nSpatialStream<2 ; nSpatialStream++)	
+			{
+				if(pstats->RxMIMOSignalQuality[nSpatialStream] != -1)
+				{
+					if(priv->stats.rx_evm_percentage[nSpatialStream] == 0)	
+					{
+						priv->stats.rx_evm_percentage[nSpatialStream] = pstats->RxMIMOSignalQuality[nSpatialStream];
+					}
+					priv->stats.rx_evm_percentage[nSpatialStream] = 
+					( (priv->stats.rx_evm_percentage[nSpatialStream]*(Rx_Smooth_Factor-1)) + 
+					(pstats->RxMIMOSignalQuality[nSpatialStream]* 1)) /(Rx_Smooth_Factor);
+				}
+			}
+		}
+	}
+	else
+		;
+	
+}	
+#endif
+
+
+#ifdef _RTL8192_EXT_PATCH_
+void rtl8192se_process_phyinfo(struct r8192_priv * priv, u8* buffer,struct rtllib_rx_stats * pcurrent_stats,struct rtllib_network * pnet, struct sta_info *pEntry)
+#else
+void rtl8192se_process_phyinfo(struct r8192_priv * priv, u8* buffer,struct rtllib_rx_stats * pprevious_stats, struct rtllib_rx_stats * pcurrent_stats)
+#endif
+{
+#ifdef _RTL8192_EXT_PATCH_
+	if(!pcurrent_stats->bPacketMatchBSSID)
+		return;
+	Process_UI_RSSI_8192S(priv, pcurrent_stats);
+	Process_PWDB_8192S(priv, pcurrent_stats, pnet, pEntry);
+	Process_UiLinkQuality8192S(priv, pcurrent_stats);	
+#else
+	bool bcheck = false;
+	u8	rfpath;
+	u32 nspatial_stream, tmp_val;
+	static u32 slide_rssi_index=0, slide_rssi_statistics=0; 
+	static u32 slide_evm_index=0, slide_evm_statistics=0;
+	static u32 last_rssi=0, last_evm=0;
+	static u32 slide_beacon_adc_pwdb_index=0, slide_beacon_adc_pwdb_statistics=0;
+	static u32 last_beacon_adc_pwdb=0;
+
+	struct rtllib_hdr_3addr *hdr;
+	u16 sc ;
+	unsigned int frag,seq;
+	hdr = (struct rtllib_hdr_3addr *)buffer;
+	sc = le16_to_cpu(hdr->seq_ctl);
+	frag = WLAN_GET_SEQ_FRAG(sc);
+	seq = WLAN_GET_SEQ_SEQ(sc);
+	pcurrent_stats->Seq_Num = seq;
+	if(!pprevious_stats->bIsAMPDU)
+	{
+		bcheck = true;
+	}else {
+#if 0
+		if( !pcurrent_stats->bIsAMPDU || pcurrent_stats->bFirstMPDU)
+			bcheck = true;
+#endif
+	}
+		
+	if(slide_rssi_statistics++ >= PHY_RSSI_SLID_WIN_MAX)
+	{
+		slide_rssi_statistics = PHY_RSSI_SLID_WIN_MAX;
+		last_rssi = priv->stats.slide_signal_strength[slide_rssi_index];
+		priv->stats.slide_rssi_total -= last_rssi;
+	}
+	priv->stats.slide_rssi_total += pprevious_stats->SignalStrength;
+	
+	priv->stats.slide_signal_strength[slide_rssi_index++] = pprevious_stats->SignalStrength;
+	if(slide_rssi_index >= PHY_RSSI_SLID_WIN_MAX)
+		slide_rssi_index = 0;
+	
+	tmp_val = priv->stats.slide_rssi_total/slide_rssi_statistics;
+	priv->stats.signal_strength = rtl819x_translate_todbm(priv, (u8)tmp_val);
+	pcurrent_stats->rssi = priv->stats.signal_strength;
+	if(!pprevious_stats->bPacketMatchBSSID)
+	{
+		if(!pprevious_stats->bToSelfBA)
+			return;
+	}
+	
+	if(!bcheck)
+		return;
+
+	rtl819x_process_cck_rxpathsel(priv,pprevious_stats);
+
+	priv->stats.num_process_phyinfo++;
+#if 0
+	if(slide_rssi_statistics++ >= PHY_RSSI_SLID_WIN_MAX)
+	{
+		slide_rssi_statistics = PHY_RSSI_SLID_WIN_MAX;
+		last_rssi = priv->stats.slide_signal_strength[slide_rssi_index];
+		priv->stats.slide_rssi_total -= last_rssi;
+	}
+	priv->stats.slide_rssi_total += pprevious_stats->SignalStrength;
+	
+	priv->stats.slide_signal_strength[slide_rssi_index++] = pprevious_stats->SignalStrength;
+	if(slide_rssi_index >= PHY_RSSI_SLID_WIN_MAX)
+		slide_rssi_index = 0;
+	
+	tmp_val = priv->stats.slide_rssi_total/slide_rssi_statistics;
+	priv->stats.signal_strength = rtl819x_translate_todbm(priv, (u8)tmp_val);
+
+#endif
+	if(!pprevious_stats->bIsCCK && pprevious_stats->bPacketToSelf)
+	{
+		for (rfpath = RF90_PATH_A; rfpath < RF90_PATH_C; rfpath++)
+		{
+			if (!rtl8192_phy_CheckIsLegalRFPath(priv->rtllib->dev, rfpath))
+				continue;
+			RT_TRACE(COMP_DBG,"Jacken -> pPreviousstats->RxMIMOSignalStrength[rfpath]  = %d \n" ,pprevious_stats->RxMIMOSignalStrength[rfpath] );		 
+			if(priv->stats.rx_rssi_percentage[rfpath] == 0)
+			{
+				priv->stats.rx_rssi_percentage[rfpath] = pprevious_stats->RxMIMOSignalStrength[rfpath];
+			}	
+			if(pprevious_stats->RxMIMOSignalStrength[rfpath]  > priv->stats.rx_rssi_percentage[rfpath])
+			{
+				priv->stats.rx_rssi_percentage[rfpath] = 
+					( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) + 
+					(pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
+				priv->stats.rx_rssi_percentage[rfpath] = priv->stats.rx_rssi_percentage[rfpath]  + 1;
+			}
+			else
+			{
+				priv->stats.rx_rssi_percentage[rfpath] = 
+					( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) + 
+					(pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
+			}	
+			RT_TRACE(COMP_DBG,"Jacken -> priv->RxStats.RxRSSIPercentage[rfPath]  = %d \n" ,priv->stats.rx_rssi_percentage[rfpath] );
+		}		
+	}
+	
+	
+	if(pprevious_stats->bPacketBeacon)
+	{
+		if(slide_beacon_adc_pwdb_statistics++ >= PHY_Beacon_RSSI_SLID_WIN_MAX)
+		{
+			slide_beacon_adc_pwdb_statistics = PHY_Beacon_RSSI_SLID_WIN_MAX;	
+			last_beacon_adc_pwdb = priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index];
+			priv->stats.Slide_Beacon_Total -= last_beacon_adc_pwdb;
+		}
+		priv->stats.Slide_Beacon_Total += pprevious_stats->RxPWDBAll;
+		priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index] = pprevious_stats->RxPWDBAll;
+		slide_beacon_adc_pwdb_index++;
+		if(slide_beacon_adc_pwdb_index >= PHY_Beacon_RSSI_SLID_WIN_MAX)
+			slide_beacon_adc_pwdb_index = 0;
+		pprevious_stats->RxPWDBAll = priv->stats.Slide_Beacon_Total/slide_beacon_adc_pwdb_statistics;
+		if(pprevious_stats->RxPWDBAll >= 3)
+			pprevious_stats->RxPWDBAll -= 3;
+	}
+
+	RT_TRACE(COMP_RXDESC, "Smooth %s PWDB = %d\n", 
+				pprevious_stats->bIsCCK? "CCK": "OFDM",
+				pprevious_stats->RxPWDBAll);
+
+	if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
+	{
+		if(priv->undecorated_smoothed_pwdb < 0)	
+		{
+			priv->undecorated_smoothed_pwdb = pprevious_stats->RxPWDBAll;
+		}
+#if 1
+		if(pprevious_stats->RxPWDBAll > (u32)priv->undecorated_smoothed_pwdb)
+		{
+			priv->undecorated_smoothed_pwdb =	
+					( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) + 
+					(pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
+			priv->undecorated_smoothed_pwdb = priv->undecorated_smoothed_pwdb + 1;
+		}
+		else
+		{
+			priv->undecorated_smoothed_pwdb =	
+					( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) + 
+					(pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
+		}
+#else
+		if(pPreviousRfd->Status.RxPWDBAll > (u32)pHalData->UndecoratedSmoothedPWDB)
+		{
+			pHalData->UndecoratedSmoothedPWDB = 	
+					( ((pHalData->UndecoratedSmoothedPWDB)* 5) + (pPreviousRfd->Status.RxPWDBAll)) / 6;
+			pHalData->UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB + 1;
+		}
+		else
+		{
+			pHalData->UndecoratedSmoothedPWDB = 	
+					( ((pHalData->UndecoratedSmoothedPWDB)* 5) + (pPreviousRfd->Status.RxPWDBAll)) / 6;
+		}		
+#endif
+		rtl819x_update_rxsignalstatistics8190pci(priv,pprevious_stats);
+	}
+
+	if(pprevious_stats->SignalQuality == 0)
+	{
+	}
+	else
+	{
+		if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA){
+			if(slide_evm_statistics++ >= PHY_RSSI_SLID_WIN_MAX){
+				slide_evm_statistics = PHY_RSSI_SLID_WIN_MAX;
+				last_evm = priv->stats.slide_evm[slide_evm_index];
+				priv->stats.slide_evm_total -= last_evm;
+			}
+	
+			priv->stats.slide_evm_total += pprevious_stats->SignalQuality;
+	
+			priv->stats.slide_evm[slide_evm_index++] = pprevious_stats->SignalQuality;
+			if(slide_evm_index >= PHY_RSSI_SLID_WIN_MAX)
+				slide_evm_index = 0;
+	
+			tmp_val = priv->stats.slide_evm_total/slide_evm_statistics;
+			priv->stats.signal_quality = tmp_val;
+			priv->stats.last_signal_strength_inpercent = tmp_val;
+		}
+
+		if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
+		{
+			for(nspatial_stream = 0; nspatial_stream<2 ; nspatial_stream++) 
+			{
+				if(pprevious_stats->RxMIMOSignalQuality[nspatial_stream] != -1)
+				{
+					if(priv->stats.rx_evm_percentage[nspatial_stream] == 0)	
+					{
+						priv->stats.rx_evm_percentage[nspatial_stream] = pprevious_stats->RxMIMOSignalQuality[nspatial_stream];
+					}
+					priv->stats.rx_evm_percentage[nspatial_stream] = 
+						( (priv->stats.rx_evm_percentage[nspatial_stream]* (Rx_Smooth_Factor-1)) + 
+						(pprevious_stats->RxMIMOSignalQuality[nspatial_stream]* 1)) / (Rx_Smooth_Factor);
+				}
+			}
+		}
+	}
+#endif
+	
+}
+
+
+
+void rtl8192se_TranslateRxSignalStuff(struct net_device *dev, 
+        struct sk_buff *skb,
+        struct rtllib_rx_stats * pstats,
+        prx_desc pdesc,	
+        prx_fwinfo pdrvinfo)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	bool bpacket_match_bssid, bpacket_toself;
+	bool bPacketBeacon=false;
+	struct rtllib_hdr_3addr *hdr;
+#ifdef _RTL8192_EXT_PATCH_
+	struct rtllib_network* pnet=NULL;
+	u8	*psaddr;
+	struct sta_info *pEntry = NULL;
+#else
+	bool bToSelfBA=false;
+	static struct rtllib_rx_stats  previous_stats;
+#endif
+	u16 fc,type;
+	u8* tmp_buf;
+	u8	*praddr;
+
+	tmp_buf = skb->data + pstats->RxDrvInfoSize + pstats->RxBufShift;
+
+	hdr = (struct rtllib_hdr_3addr *)tmp_buf;
+	fc = le16_to_cpu(hdr->frame_ctl);
+	type = WLAN_FC_GET_TYPE(fc);	
+	praddr = hdr->addr1;
+
+#ifdef _RTL8192_EXT_PATCH_
+	psaddr = hdr->addr2;
+	if((priv->rtllib->iw_mode == IW_MODE_MESH) && (priv->mshobj->ext_patch_get_mpinfo))
+		pnet = priv->mshobj->ext_patch_get_mpinfo(dev,psaddr);	
+	if(priv->rtllib->iw_mode == IW_MODE_ADHOC){
+		pEntry = GetStaInfo(priv->rtllib, psaddr);
+	}
+#endif
+#ifdef _RTL8192_EXT_PATCH_
+	bpacket_match_bssid = ((RTLLIB_FTYPE_CTL != type) && (!pstats->bHwError) && (!pstats->bCRC)&& (!pstats->bICV));
+	if(pnet){
+		bpacket_match_bssid = bpacket_match_bssid;
+	}
+	else{
+		bpacket_match_bssid = bpacket_match_bssid &&
+			(!compare_ether_addr(priv->rtllib->current_network.bssid, 
+					     (fc & RTLLIB_FCTL_TODS)? hdr->addr1 : 
+					     (fc & RTLLIB_FCTL_FROMDS )? hdr->addr2 : hdr->addr3));
+	}
+#else
+	bpacket_match_bssid = ((RTLLIB_FTYPE_CTL != type) &&
+			(!compare_ether_addr(priv->rtllib->current_network.bssid,	
+					     (fc & RTLLIB_FCTL_TODS)? hdr->addr1 : 
+					     (fc & RTLLIB_FCTL_FROMDS )? hdr->addr2 : hdr->addr3))
+			&& (!pstats->bHwError) && (!pstats->bCRC)&& (!pstats->bICV));
+#endif
+	bpacket_toself =  bpacket_match_bssid & (!compare_ether_addr(praddr, priv->rtllib->dev->dev_addr));
+	if(WLAN_FC_GET_FRAMETYPE(fc)== RTLLIB_STYPE_BEACON){
+		bPacketBeacon = true;
+	}
+#ifndef _RTL8192_EXT_PATCH_  
+	if(WLAN_FC_GET_FRAMETYPE(fc) == RTLLIB_STYPE_BLOCKACK){
+		if ((!compare_ether_addr(praddr,dev->dev_addr)))
+			bToSelfBA = true;
+	}
+#endif	
+	if(bpacket_match_bssid){
+		priv->stats.numpacket_matchbssid++;
+	}
+	if(bpacket_toself){
+		priv->stats.numpacket_toself++;
+	}
+#ifdef _RTL8192_EXT_PATCH_
+	rtl8192se_query_rxphystatus(priv, pstats, pdesc, pdrvinfo, bpacket_match_bssid,
+			bpacket_toself ,bPacketBeacon);
+	rtl8192se_process_phyinfo(priv, tmp_buf,pstats,pnet, pEntry);
+
+#else
+	rtl8192se_process_phyinfo(priv, tmp_buf,&previous_stats, pstats);
+	rtl8192se_query_rxphystatus(priv, pstats, pdesc, pdrvinfo, &previous_stats, bpacket_match_bssid,
+			bpacket_toself ,bPacketBeacon, bToSelfBA);
+	rtl8192_record_rxdesc_forlateruse(pstats, &previous_stats);
+#endif	
+
+}
+
+void rtl8192se_UpdateReceivedRateHistogramStatistics(
+	struct net_device *dev,
+	struct rtllib_rx_stats* pstats
+	)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	u32 rcvType=1;   
+	u32 rateIndex;
+	u32 preamble_guardinterval;  
+	    
+	#if 0
+	if (pRfd->queue_id == CMPK_RX_QUEUE_ID)
+		return;
+	#endif
+	if(pstats->bCRC)
+		rcvType = 2;
+	else if(pstats->bICV)
+		rcvType = 3;
+	    
+	if(pstats->bShortPreamble)
+		preamble_guardinterval = 1;
+	else
+		preamble_guardinterval = 0;
+
+	switch(pstats->rate)
+	{
+		case MGN_1M:    rateIndex = 0;  break;
+	    	case MGN_2M:    rateIndex = 1;  break;
+	    	case MGN_5_5M:  rateIndex = 2;  break;
+	    	case MGN_11M:   rateIndex = 3;  break;
+	    	case MGN_6M:    rateIndex = 4;  break;
+	    	case MGN_9M:    rateIndex = 5;  break;
+	    	case MGN_12M:   rateIndex = 6;  break;
+	    	case MGN_18M:   rateIndex = 7;  break;
+	    	case MGN_24M:   rateIndex = 8;  break;
+	    	case MGN_36M:   rateIndex = 9;  break;
+	    	case MGN_48M:   rateIndex = 10; break;
+	    	case MGN_54M:   rateIndex = 11; break;
+	    	case MGN_MCS0:  rateIndex = 12; break;
+	    	case MGN_MCS1:  rateIndex = 13; break;
+	    	case MGN_MCS2:  rateIndex = 14; break;
+	    	case MGN_MCS3:  rateIndex = 15; break;
+	    	case MGN_MCS4:  rateIndex = 16; break;
+	    	case MGN_MCS5:  rateIndex = 17; break;
+	    	case MGN_MCS6:  rateIndex = 18; break;
+	    	case MGN_MCS7:  rateIndex = 19; break;
+	    	case MGN_MCS8:  rateIndex = 20; break;
+	    	case MGN_MCS9:  rateIndex = 21; break;
+	    	case MGN_MCS10: rateIndex = 22; break;
+	    	case MGN_MCS11: rateIndex = 23; break;
+	    	case MGN_MCS12: rateIndex = 24; break;
+	    	case MGN_MCS13: rateIndex = 25; break;
+	    	case MGN_MCS14: rateIndex = 26; break;
+	    	case MGN_MCS15: rateIndex = 27; break;
+		default:        rateIndex = 28; break;
+	}
+	priv->stats.received_preamble_GI[preamble_guardinterval][rateIndex]++;
+	priv->stats.received_rate_histogram[0][rateIndex]++; 
+	priv->stats.received_rate_histogram[rcvType][rateIndex]++;
+}
+
+bool rtl8192se_rx_query_status_desc(struct net_device* dev, struct rtllib_rx_stats*  stats, rx_desc *pdesc, struct sk_buff* skb)
+{
+	struct r8192_priv* priv = rtllib_priv(dev);
+	struct rtllib_device* ieee = priv->rtllib;
+	u32	PHYStatus	= pdesc->PHYStatus;
+	rx_fwinfo*		pDrvInfo;
+	stats->Length 		= (u16)pdesc->Length;	
+	stats->RxDrvInfoSize = (u8)pdesc->DrvInfoSize*8;
+	stats->RxBufShift 	= (u8)((pdesc->Shift)&0x03);      
+	stats->bICV 			= (u16)pdesc->ICVError;
+	stats->bCRC 			= (u16)pdesc->CRC32;
+	stats->bHwError 		= (u16)(pdesc->CRC32|pdesc->ICVError);	
+	stats->Decrypted 	= !pdesc->SWDec;
+	stats->rate = (u8)pdesc->RxMCS;
+	stats->bShortPreamble= (u16)pdesc->SPLCP;
+	stats->bIsAMPDU 		= (bool)(pdesc->PAGGR==1);
+	stats->bFirstMPDU 	= (bool)((pdesc->PAGGR==1) && (pdesc->FAGGR==1));
+	stats->TimeStampLow 	= pdesc->TSFL;
+	stats->RxIs40MHzPacket= (bool)pdesc->BandWidth;
+	if(IS_UNDER_11N_AES_MODE(ieee))
+	{
+		if(stats->bICV && !stats->bCRC)
+		{
+			stats->bICV = false;
+			stats->bHwError = false;
+		}
+	}
+
+	
+	if(stats->Length > 0x2000 || stats->Length < 24)
+	{
+		RT_TRACE(COMP_ERR, "Err RX pkt len = 0x%x\n", stats->Length);
+		stats->bHwError |= 1;
+	}
+	rtl8192se_UpdateReceivedRateHistogramStatistics(dev, stats);
+
+	if(!stats->bHwError)
+		stats->rate = HwRateToMRate92S((bool)(pdesc->RxHT), (u8)(pdesc->RxMCS));
+	else
+	{
+		stats->rate = MGN_1M;
+		return false;
+	}
+
+	rtl819x_UpdateRxPktTimeStamp(dev, stats);	
+
+	if((stats->RxBufShift + stats->RxDrvInfoSize) > 0)
+		stats->bShift = 1;	
+
+	if (PHYStatus == true)
+	{
+		pDrvInfo = (rx_fwinfo*)(skb->data + stats->RxBufShift);
+			
+		rtl8192se_TranslateRxSignalStuff(dev, skb, stats, pdesc, pDrvInfo); 
+
+	}
+	return true;	
+}
+
+void rtl8192se_halt_adapter(struct net_device *dev, bool bReset)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+        int i;
+	u8	wait = 30;	
+
+	RT_TRACE(COMP_INIT, "==> rtl8192se_halt_adapter()\n");
+	
+#if 1
+	while (wait-- >= 10 && priv->PwrDomainProtect == true)
+	{
+		if (priv->PwrDomainProtect == true)
+		{
+			RT_TRACE(COMP_INIT, "Delay 20ms to wait PwrDomainProtect\n");
+			mdelay(20);
+		}
+		else
+			break;
+	}
+
+	if (wait == 9)
+		RT_TRACE(COMP_INIT, "PwrDomainProtect FAIL\n");
+#endif
+
+	priv->rtllib->state = RTLLIB_NOLINK;
+	rtl8192se_update_msr(dev);
+#if 1
+	PHY_SetRtl8192seRfHalt(dev);
+#endif
+	udelay(100);
+
+#if 0
+	udelay(20);
+	if (!bReset) {
+		mdelay(20);
+	}	
+#endif	
+        for(i = 0; i < MAX_QUEUE_SIZE; i++) {
+                skb_queue_purge(&priv->rtllib->skb_waitQ [i]);
+        }
+        for(i = 0; i < MAX_QUEUE_SIZE; i++) {
+                skb_queue_purge(&priv->rtllib->skb_aggQ [i]);
+        }
+#ifdef _RTL8192_EXT_PATCH_	
+		for(i = 0; i < MAX_QUEUE_SIZE; i++) {
+                skb_queue_purge(&priv->rtllib->skb_meshaggQ [i]);
+        }
+#endif
+
+	skb_queue_purge(&priv->skb_queue);
+	RT_TRACE(COMP_INIT, "<== HaltAdapter8192SE()\n");
+	return;
+}
+
+u8 GetFreeRATRIndex8192SE (struct net_device* dev)
+{
+	struct r8192_priv* priv = rtllib_priv(dev);
+	u8 bitmap = priv->RATRTableBitmap;
+	u8 ratr_index = 0;
+	for(	;ratr_index<7; ratr_index++)
+	{
+		if((bitmap & BIT0) == 0)
+			{
+				priv->RATRTableBitmap |= BIT0<<ratr_index;
+				return ratr_index;
+			}
+		bitmap = bitmap >>1;
+	}
+	return ratr_index;
+}
+
+void rtl8192se_update_ratr_table(struct net_device* dev,u8* pMcsRate,struct sta_info* pEntry)
+{
+	struct r8192_priv* priv = rtllib_priv(dev);
+	struct rtllib_device* ieee = priv->rtllib;
+	u32 ratr_value = 0;
+	u8 ratr_index = 0;
+	u8 bNMode = 0;
+	u16 shortGI_rate = 0;
+	u32 tmp_ratr_value = 0;
+	u8 MimoPs;
+	WIRELESS_MODE WirelessMode;
+	u8 bCurTxBW40MHz, bCurShortGI40MHz, bCurShortGI20MHz;
+	
+	if(ieee->iw_mode == IW_MODE_ADHOC){	
+		if(pEntry == NULL){
+			printk("Doesn't have match Entry\n");
+			return;
+		}	
+
+		if(pEntry->ratr_index != 8)
+			ratr_index = pEntry->ratr_index;
+		else
+		        ratr_index = GetFreeRATRIndex8192SE(dev);
+		
+		if(ratr_index == 7){
+			RT_TRACE(COMP_RATE, "Ratrtable are full");
+			return;
+		}
+		MimoPs = pEntry->htinfo.MimoPs;
+
+		if((ieee->mode == WIRELESS_MODE_G) && (pEntry->wireless_mode == WIRELESS_MODE_N_24G))
+			WirelessMode = ieee->mode;
+		else	
+			WirelessMode = pEntry->wireless_mode;
+
+		bCurTxBW40MHz = pEntry->htinfo.bCurTxBW40MHz;
+		bCurShortGI40MHz = pEntry->htinfo.bCurShortGI40MHz;
+		bCurShortGI20MHz = pEntry->htinfo.bCurShortGI20MHz;		
+		pEntry->ratr_index = ratr_index;
+	}
+	else  
+	{
+		ratr_index = 0;
+		WirelessMode = ieee->mode;
+		MimoPs = ieee->pHTInfo->PeerMimoPs;
+		bCurTxBW40MHz = ieee->pHTInfo->bCurTxBW40MHz;
+		bCurShortGI40MHz = ieee->pHTInfo->bCurShortGI40MHz;
+		bCurShortGI20MHz = ieee->pHTInfo->bCurShortGI20MHz;					
+	}
+
+	rtl8192_config_rate(dev, (u16*)(&ratr_value));
+	ratr_value |= (*(u16*)(pMcsRate)) << 12;
+	switch (WirelessMode)
+	{
+		case IEEE_A:
+			ratr_value &= 0x00000FF0;
+			break;
+		case IEEE_B:
+			ratr_value &= 0x0000000D;
+			break;
+		case IEEE_G:
+		case IEEE_G|IEEE_B:
+			ratr_value &= 0x00000FF5;
+			break;
+		case IEEE_N_24G:
+		case IEEE_N_5G:
+			bNMode = 1;
+			if (MimoPs == 0) 
+				ratr_value &= 0x0007F005;
+			else{
+				if (priv->rf_type == RF_1T2R ||priv->rf_type  == RF_1T1R || (ieee->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_TX_2SS)){
+					if ((bCurTxBW40MHz) && !(ieee->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_TX_40_MHZ))
+						ratr_value &= 0x000FF015;
+					else
+						ratr_value &= 0x000ff005;
+				}else{
+					if ((bCurTxBW40MHz) && !(ieee->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_TX_40_MHZ))
+						ratr_value &= 0x0f0ff015;
+					else
+						ratr_value &= 0x0f0ff005;
+					}
+			}
+			break;
+		default:
+			printk("====>%s(), mode is not correct:%x\n", __FUNCTION__,WirelessMode);
+			break; 
+	}
+	if (priv->card_8192_version>= VERSION_8192S_BCUT)
+		ratr_value &= 0x0FFFFFFF;
+	else if (priv->card_8192_version == VERSION_8192S_ACUT)
+		ratr_value &= 0x0FFFFFF0;	
+	
+	if (((ieee->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_SHORT_GI)==0) &&
+		bNMode && ((bCurTxBW40MHz && bCurShortGI40MHz) ||
+	    (!bCurTxBW40MHz && bCurShortGI20MHz)))
+	{
+		ratr_value |= 0x10000000;  
+		tmp_ratr_value = (ratr_value>>12);
+		for(shortGI_rate=15; shortGI_rate>0; shortGI_rate--)
+		{
+			if((1<<shortGI_rate) & tmp_ratr_value)
+				break;
+		}	
+		shortGI_rate = (shortGI_rate<<12)|(shortGI_rate<<8)|\
+			       (shortGI_rate<<4)|(shortGI_rate);
+		write_nic_byte(dev, SG_RATE, shortGI_rate);
+	}
+
+	if(ieee->pHTInfo->IOTAction & HT_IOT_ACT_WA_IOT_Broadcom)
+	{
+		ratr_value &= 0xfffffff0; 
+		printk("UpdateHalRATRTable8192SE(), for HT_IOT_ACT_WA_IOT_Broadcom, ratr_value = 0x%x\n", ratr_value);
+	}
+	
+	write_nic_dword(dev, ARFR0+ratr_index*4, ratr_value);
+	RT_TRACE(COMP_RATE, "%s: ratr_index=%d ratr_table=0x%8.8x\n", __FUNCTION__,ratr_index, read_nic_dword(dev, ARFR0+ratr_index*4));
+	if (ratr_value & 0xfffff000){
+		rtl8192se_set_fw_cmd(dev, FW_CMD_RA_REFRESH_N);
+	}
+	else{
+		rtl8192se_set_fw_cmd(dev, FW_CMD_RA_REFRESH_BG);
+	}
+}
+
+int r8192se_resume_firm(struct net_device *dev)
+{
+	write_nic_byte(dev, 0x42, 0xFF);
+	write_nic_word(dev, 0x40, 0x77FC);
+	write_nic_word(dev, 0x40, 0x57FC);
+	write_nic_word(dev, 0x40, 0x37FC);
+	write_nic_word(dev, 0x40, 0x77FC);
+	
+	udelay(100);
+
+	write_nic_word(dev, 0x40, 0x57FC);
+	write_nic_word(dev, 0x40, 0x37FC);
+	write_nic_byte(dev, 0x42, 0x00);
+
+	return 0;
+}
+void PHY_SetRtl8192seRfHalt(struct net_device* dev)
+{
+	struct r8192_priv* priv = rtllib_priv(dev);
+	PRT_POWER_SAVE_CONTROL	pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
+	u8 u1bTmp;
+
+	if(priv->rtllib->RfOffReason == RF_CHANGE_BY_IPS && priv->LedStrategy == SW_LED_MODE8)	
+	{
+		SET_RTL8192SE_RF_SLEEP(dev);
+		return;
+	}
+
+#ifdef LOW_DOWN_POWER
+	if(0)
+#else
+	if(priv->bDriverIsGoingToUnload)
+#endif
+		write_nic_byte(dev,0x560,0x0);
+
+	RT_TRACE(COMP_PS, "PHY_SetRtl8192seRfHalt save BB/RF\n");
+	u1bTmp = read_nic_byte(dev, LDOV12D_CTRL);
+	u1bTmp |= BIT0;
+	write_nic_byte(dev, LDOV12D_CTRL, u1bTmp);
+	write_nic_byte(dev, SPS1_CTRL, 0x0);
+	write_nic_byte(dev, TXPAUSE, 0xFF);
+	write_nic_word(dev, CMDR, 0x57FC);
+	udelay(100);
+	write_nic_word(dev, CMDR, 0x77FC);
+	write_nic_byte(dev, PHY_CCA, 0x0);
+	udelay(10);
+	write_nic_word(dev, CMDR, 0x37FC);
+	udelay(10);
+	write_nic_word(dev, CMDR, 0x77FC);			
+	udelay(10);
+	write_nic_word(dev, CMDR, 0x57FC);
+	write_nic_word(dev, CMDR, 0x0000);
+
+
+#ifdef LOW_DOWN_POWER
+	if(0)
+#else
+	if(priv->bDriverIsGoingToUnload)
+#endif
+        {
+	       u1bTmp = read_nic_byte(dev, (SYS_FUNC_EN+ 1));	
+		u1bTmp &= ~(BIT0);
+		write_nic_byte(dev, SYS_FUNC_EN+1, u1bTmp);
+        }
+
+	
+	u1bTmp = read_nic_byte(dev, (SYS_CLKR + 1));
+	
+	if (u1bTmp & BIT7) {
+		u1bTmp &= ~(BIT6 | BIT7);					
+		if(!HalSetSysClk8192SE(dev, u1bTmp)) {
+			printk("Switch ctrl path fail\n");
+			return;
+		}
+	}
+
+#ifdef LOW_DOWN_POWER
+        if((priv->rtllib->RfOffReason & (RF_CHANGE_BY_IPS | RF_CHANGE_BY_HW)) &&
+                !priv->bDriverIsGoingToUnload)
+#else
+	if(priv->rtllib->RfOffReason==RF_CHANGE_BY_IPS  && !priv->bDriverIsGoingToUnload)
+#endif
+	{
+		write_nic_byte(dev, 0x03, 0xF9);
+	} else		
+	{
+		write_nic_byte(dev, 0x03, 0xF9);
+	}
+	write_nic_byte(dev, SYS_CLKR+1, 0x70);
+	write_nic_byte(dev, AFE_PLL_CTRL+1, 0x68);
+	write_nic_byte(dev,  AFE_PLL_CTRL, 0x00);	
+	write_nic_byte(dev, LDOA15_CTRL, 0x34);
+	write_nic_byte(dev, AFE_XTAL_CTRL, 0x0E);
+	RT_SET_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC);
+}	
+
+
+/*
+*	Description:
+*		Set RateAdaptive Mask
+*	/param 	Adapter		Pionter to Adapter entity
+*	/param	bMulticast	TURE if broadcast or multicast, used for softAP basic rate
+*	/param	macId		macID to set
+*	/param 	wirelessMode	wireless mode of associated AP/client
+*	/return	void
+*	
+*/
+void UpdateHalRAMask8192SE(
+			struct net_device* dev,
+			bool bMulticast,
+			u8   macId,
+			u8   MimoPs,
+			u8   WirelessMode,
+			u8   bCurTxBW40MHz,
+			u8   rssi_level){
+	struct r8192_priv* 	priv = rtllib_priv(dev);
+	struct rtllib_device* ieee = priv->rtllib;
+	PRT_HIGH_THROUGHPUT pHTInfo = priv->rtllib->pHTInfo;
+	u8* 	pMcsRate = ieee->dot11HTOperationalRateSet;
+	u32	ratr_bitmap, RateSet, mask=0, band = 0, ratr_value = 0;
+	u8   shortGI_rate = 0, bShortGI = false; 
+
+	RT_TRACE(COMP_RATE, "%s: macid:%d MimoPs=%d WirelessMode=0x%x bCurTxBW40MHz=%d rssid_level=%d\n",__FUNCTION__, macId, MimoPs, WirelessMode,bCurTxBW40MHz, rssi_level);
+	rtl8192_config_rate(dev, (u16*)&RateSet);
+	RateSet |= (*(u16*)(pMcsRate)) << 12;
+	ratr_bitmap = RateSet;
+	
+	switch (WirelessMode){
+		case WIRELESS_MODE_B:
+			band |= WIRELESS_11B;
+			ratr_bitmap &= 0x0000000d;
+			break;
+		case WIRELESS_MODE_G:
+		case (WIRELESS_MODE_G |WIRELESS_MODE_B):
+			band |= (WIRELESS_11G | WIRELESS_11B);
+			
+			if(rssi_level == 1)
+				ratr_bitmap &= 0x00000f00;
+			else if(rssi_level == 2)
+				ratr_bitmap &= 0x00000ff0;
+			else
+				ratr_bitmap &= 0x00000ff5;
+			break;
+		case WIRELESS_MODE_A:
+			band |= WIRELESS_11A;
+			ratr_bitmap &= 0x00000ff0;
+			break;
+		case WIRELESS_MODE_N_24G:
+		case WIRELESS_MODE_N_5G:
+		{
+			band |= (WIRELESS_11N| WIRELESS_11G| WIRELESS_11B);
+			if(MimoPs == MIMO_PS_STATIC){
+				if(rssi_level == 1)
+					ratr_bitmap &= 0x00070000;
+				else if(rssi_level == 2)
+					ratr_bitmap &= 0x0007f000;
+				else
+					ratr_bitmap &= 0x0007f005;
+			}else{
+				if (priv->rf_type == RF_1T2R || priv->rf_type == RF_1T1R){
+					if (bCurTxBW40MHz){
+						if(rssi_level == 1)
+							ratr_bitmap &= 0x000f0000;
+						else if(rssi_level == 2)
+							ratr_bitmap &= 0x000ff000;
+						else
+							ratr_bitmap &= 0x000ff015;
+					}else{
+						if(rssi_level == 1)
+							ratr_bitmap &= 0x000f0000;
+						else if(rssi_level == 2)
+							ratr_bitmap &= 0x000ff000;
+						else
+							ratr_bitmap &= 0x000ff005;
+					}	
+				}else{
+					if (bCurTxBW40MHz){
+						if(rssi_level == 1)
+							ratr_bitmap &= 0x0f0f0000;
+						else if(rssi_level == 2)
+							ratr_bitmap &= 0x0f0ff000;
+						else
+							ratr_bitmap &= 0x0f0ff015;
+					}else{
+						if(rssi_level == 1)
+							ratr_bitmap &= 0x0f0f0000;
+						else if(rssi_level == 2)
+							ratr_bitmap &= 0x0f0ff000;
+						else
+							ratr_bitmap &= 0x0f0ff005;
+					}
+				}
+			}
+			if( (pHTInfo->bCurTxBW40MHz && pHTInfo->bCurShortGI40MHz) ||
+				(!pHTInfo->bCurTxBW40MHz && pHTInfo->bCurShortGI20MHz)){
+				if(macId == 0)
+					bShortGI = true;
+				else
+					bShortGI = false;
+			}
+			break;
+		}
+		default:
+			band |= (WIRELESS_11N| WIRELESS_11G| WIRELESS_11B);
+			
+			if(priv->rf_type == RF_1T2R)
+				ratr_bitmap &= 0x000ff0ff;
+			else
+				ratr_bitmap &= 0x0f0ff0ff;
+			break;
+	}
+
+	if (priv->card_8192_version  >= VERSION_8192S_BCUT)
+		ratr_bitmap &= 0x0FFFFFFF;
+	else if (priv->card_8192_version  == VERSION_8192S_ACUT)
+		ratr_bitmap &= 0x0FFFFFF0;	
+
+	if(bShortGI){
+		ratr_bitmap |= 0x10000000;
+		ratr_value = (ratr_bitmap>>12);
+		for(shortGI_rate=15; shortGI_rate>0; shortGI_rate--){
+			if((1<<shortGI_rate) & ratr_value)
+				break;
+		}	
+		shortGI_rate = (shortGI_rate<<12)|(shortGI_rate<<8)|(shortGI_rate<<4)|(shortGI_rate);
+		write_nic_byte(dev, SG_RATE, shortGI_rate);
+	}	
+	
+	if(macId == 0)
+	{
+		if(priv->rtllib->pHTInfo->IOTAction & HT_IOT_ACT_WA_IOT_Broadcom)
+			ratr_bitmap &= 0xfffffff0; 
+		if(priv->rtllib->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_SHORT_GI)
+			ratr_bitmap &=0x0fffffff;
+	}		
+	mask |= (bMulticast ? 1 : 0)<<9 | (macId & 0x1f)<<4 | (band & 0xf);
+
+	RT_TRACE(COMP_RATE, "%s(): mask = %x, bitmap = %x\n",__func__, mask, ratr_bitmap);
+	write_nic_dword(dev, 0x2c4, ratr_bitmap);
+	write_nic_dword(dev, WFM5, (FW_RA_UPDATE_MASK | (mask << 8)));
+}
+
+u8 HalSetSysClk8192SE( struct net_device *dev, u8 Data)
+{
+#if 0
+	write_nic_byte(dev, (SYS_CLKR + 1), Data);
+	udelay(200);;
+	return 1;
+#else
+	{
+		u8				WaitCount = 100;
+		bool bResult = false;
+
+#ifdef TO_DO_LIST
+		RT_DISABLE_FUNC(Adapter, DF_IO_BIT);
+
+		do
+		{
+			if(pDevice->IOCount == 0)
+				break;
+			delay_us(10);
+		}while(WaitCount -- > 0);
+
+		if(WaitCount == 0)
+		{ 
+			RT_ENABLE_FUNC(Adapter, DF_IO_BIT);
+			RT_TRACE(COMP_POWER, DBG_WARNING, ("HalSetSysClk8192SE(): Wait too long! Skip ....\n"));
+			return false;
+		}
+		#endif
+		write_nic_byte(dev,SYS_CLKR + 1,Data);
+
+		udelay(400);
+
+
+		{
+			u8 TmpValue;
+			TmpValue=read_nic_byte(dev,SYS_CLKR + 1);
+			bResult = ((TmpValue&BIT7)== (Data & BIT7));
+			if((Data &(BIT6|BIT7)) == false)
+			{			
+				WaitCount = 100;
+				TmpValue = 0;
+				while(1) 
+				{
+					WaitCount--;
+					TmpValue=read_nic_byte(dev, SYS_CLKR + 1); 
+					if((TmpValue &BIT6))
+						break;
+					printk("wait for BIT6 return value %x\n",TmpValue);	
+					if(WaitCount==0)
+						break;
+					udelay(10);
+				}
+				if(WaitCount == 0)
+					bResult = false;
+				else
+					bResult = true;
+			}
+		}
+#ifdef TO_DO_LIST
+		RT_ENABLE_FUNC(Adapter, DF_IO_BIT);
+#endif
+		RT_TRACE(COMP_PS,"HalSetSysClk8192SE():Value = %02X, return: %d\n", Data, bResult);
+		return bResult;
+	}
+#endif
+}
+
+static u8 LegacyRateSet[12] = {0x02 , 0x04 , 0x0b , 0x16 , 0x0c , 0x12 , 0x18 , 0x24 , 0x30 , 0x48 , 0x60 , 0x6c};
+void GetHwReg8192SE(struct net_device *dev,u8 variable,u8* val)
+{
+	struct r8192_priv* priv = rtllib_priv(dev);
+	switch(variable)
+	{
+		case HW_VAR_INIT_TX_RATE: 
+			{
+				u8 RateIdx = read_nic_byte(dev, TX_RATE_REG);
+				if(RateIdx < 76)
+					*((u8*)(val)) = (RateIdx<12)?(LegacyRateSet[RateIdx]):((RateIdx-12)|0x80);
+				else
+					*((u8*)(val)) = 0;
+			}
+			break;
+
+		case HW_VAR_RCR:
+			*((u32*)(val)) = priv->ReceiveConfig;
+		break;
+		
+		default:
+			break;
+	}
+}
+
+void SetHwReg8192SE(struct net_device *dev,u8 variable,u8* val)
+{
+	struct r8192_priv* priv = rtllib_priv(dev);
+	switch(variable)
+	{
+		case HW_VAR_AMPDU_MIN_SPACE:
+		{
+			u8	MinSpacingToSet;
+			u8	SecMinSpace;
+
+			MinSpacingToSet = *((u8*)val);
+			if(MinSpacingToSet <= 7)
+			{
+				if((priv->rtllib->current_network.capability & WLAN_CAPABILITY_PRIVACY) == 0)  
+					SecMinSpace = 0;
+				else if (priv->rtllib->rtllib_ap_sec_type && 
+						(priv->rtllib->rtllib_ap_sec_type(priv->rtllib) 
+							 & (SEC_ALG_WEP|SEC_ALG_TKIP))) 
+					SecMinSpace = 7;
+				else
+					SecMinSpace = 1;
+
+				if(MinSpacingToSet < SecMinSpace)
+					MinSpacingToSet = SecMinSpace;
+				priv->rtllib->MinSpaceCfg = ((priv->rtllib->MinSpaceCfg&0xf8) |MinSpacingToSet);
+				RT_TRACE(COMP_MLME, "Set HW_VAR_AMPDU_MIN_SPACE: %#x\n", priv->rtllib->MinSpaceCfg);
+				write_nic_byte(dev, AMPDU_MIN_SPACE, priv->rtllib->MinSpaceCfg);	
+			}
+		}
+		break;	
+		case HW_VAR_SHORTGI_DENSITY:
+		{
+			u8	DensityToSet;
+		
+			DensityToSet = *((u8*)val);		
+			priv->rtllib->MinSpaceCfg|= (DensityToSet<<3);		
+			RT_TRACE(COMP_MLME, "Set HW_VAR_SHORTGI_DENSITY: %#x\n", priv->rtllib->MinSpaceCfg);
+			write_nic_byte(dev, AMPDU_MIN_SPACE, priv->rtllib->MinSpaceCfg);
+			break;		
+		}
+		case HW_VAR_AMPDU_FACTOR:
+		{
+			u8	FactorToSet;
+			u8	RegToSet;
+			u8	FactorLevel[18] = {2, 4, 4, 7, 7, 13, 13, 13, 2, 7, 7, 13, 13, 15, 15, 15, 15, 0};
+			u8	index = 0;
+		
+			FactorToSet = *((u8*)val);
+			if(FactorToSet <= 3)
+			{
+				FactorToSet = (1<<(FactorToSet + 2));
+				if(FactorToSet>0xf)
+					FactorToSet = 0xf;
+
+				for(index=0; index<17; index++)
+				{
+					if(FactorLevel[index] > FactorToSet)
+						FactorLevel[index] = FactorToSet;
+				}
+
+				for(index=0; index<8; index++)
+				{
+					RegToSet = ((FactorLevel[index*2]) | (FactorLevel[index*2+1]<<4));
+					write_nic_byte(dev, AGGLEN_LMT_L+index, RegToSet);
+				}
+				RegToSet = ((FactorLevel[16]) | (FactorLevel[17]<<4));
+				write_nic_byte(dev, AGGLEN_LMT_H, RegToSet);
+
+				RT_TRACE(COMP_MLME, "Set HW_VAR_AMPDU_FACTOR: %#x\n", FactorToSet);
+			}
+		}
+		break;
+		case HW_VAR_BASIC_RATE:
+		{
+			u16				BrateCfg = 0;
+			u8				RateIndex = 0;
+
+			
+			rtl8192_config_rate(dev, &BrateCfg);
+
+			if (priv->card_8192_version == VERSION_8192S_ACUT)
+				priv->basic_rate = BrateCfg = BrateCfg & 0x150;
+			else if (priv->card_8192_version == VERSION_8192S_BCUT)
+				priv->basic_rate = BrateCfg = BrateCfg & 0x15f;
+		
+  	                if(priv->rtllib->pHTInfo->IOTPeer == HT_IOT_PEER_CISCO && ((BrateCfg &0x150)==0))
+			{
+				BrateCfg |=0x010;
+			}
+			if(priv->rtllib->pHTInfo->IOTAction & HT_IOT_ACT_WA_IOT_Broadcom)
+			{	
+				BrateCfg &= 0x1f0;
+				printk("HW_VAR_BASIC_RATE, HT_IOT_ACT_WA_IOT_Broadcom, BrateCfg = 0x%x\n", BrateCfg);
+			}
+			write_nic_byte(dev, RRSR, BrateCfg&0xff);
+			write_nic_byte(dev, RRSR+1, (BrateCfg>>8)&0xff);
+
+			while(BrateCfg > 0x1)
+			{
+				BrateCfg = (BrateCfg >> 1);
+				RateIndex++;
+			}
+			write_nic_byte(dev, INIRTSMCS_SEL, RateIndex);
+		}
+		break;
+		case HW_VAR_RETRY_LIMIT:
+		{
+			u8 RetryLimit = ((u8*)(val))[0];
+			
+			priv->ShortRetryLimit = RetryLimit;
+			priv->LongRetryLimit = RetryLimit;
+			
+			write_nic_word(dev, RETRY_LIMIT, 
+							RetryLimit << RETRY_LIMIT_SHORT_SHIFT | \
+							RetryLimit << RETRY_LIMIT_LONG_SHIFT);
+		}					
+		break;
+		case HW_VAR_BEACON_INTERVAL:
+		{
+			write_nic_word(dev, BCN_INTERVAL, *((u16*)val));
+			PHY_SetBeaconHwReg(dev, *((u16*)val));
+		}
+		break;
+		
+		case HW_VAR_BSSID:
+			write_nic_dword(dev, BSSIDR, ((u32*)(val))[0]);
+			write_nic_word(dev, BSSIDR+4, ((u16*)(val+4))[0]);
+		break;
+
+		case HW_VAR_MEDIA_STATUS:
+		{
+			RT_OP_MODE	OpMode = *((RT_OP_MODE *)(val));
+			LED_CTL_MODE	LedAction = LED_CTL_NO_LINK;
+			u8		btMsr = read_nic_byte(dev, MSR);
+
+			btMsr &= 0xfc;
+			switch(OpMode)
+			{
+			case RT_OP_MODE_INFRASTRUCTURE:
+				btMsr |= MSR_INFRA;
+				LedAction = LED_CTL_LINK;
+				break;
+
+			case RT_OP_MODE_IBSS:
+				btMsr |= MSR_ADHOC;
+				break;
+
+			case RT_OP_MODE_AP:
+				btMsr |= MSR_AP;
+				LedAction = LED_CTL_LINK;
+				break;
+
+			default:
+				btMsr |= MSR_NOLINK;
+				break;
+			}
+
+			write_nic_byte(dev, MSR, btMsr);
+
+			{
+				u32	temp = read_nic_dword(dev, TCR);
+				write_nic_dword(dev, TCR, temp&(~BIT8));
+				write_nic_dword(dev, TCR, temp|BIT8);
+			}
+			priv->rtllib->LedControlHandler(dev, LedAction);
+		}
+		break;
+		
+		case HW_VAR_RCR:
+		{
+			write_nic_dword(dev, RCR,((u32*)(val))[0]);
+			priv->ReceiveConfig = ((u32*)(val))[0];
+		}
+		break;
+		
+		case HW_VAR_CECHK_BSSID:
+		{
+			u32	RegRCR, Type;
+
+			Type = ((u8*)(val))[0];
+			priv->rtllib->GetHwRegHandler(dev, HW_VAR_RCR, (u8*)(&RegRCR));
+			
+#if (RTL92SE_FPGA_VERIFY == 1)
+			RegRCR &= (~RCR_CBSSID);
+#else
+#if 1
+			if (Type == true)
+				RegRCR |= (RCR_CBSSID);
+			else if (Type == false)
+				RegRCR &= (~RCR_CBSSID);
+#endif
+			priv->rtllib->SetHwRegHandler( dev, HW_VAR_RCR, (u8*)(&RegRCR) );
+#endif			
+		}
+		break;
+		
+		case HW_VAR_SLOT_TIME:
+		{
+
+			priv->slot_time = val[0];		
+			write_nic_byte(dev, SLOT_TIME, val[0]);
+
+#ifdef MERGE_TO_DO
+			if(priv->rtllib->current_network.qos_data.supported !=0)
+			{
+				for(eACI = 0; eACI < AC_MAX; eACI++)
+				{
+					priv->rtllib->SetHwRegHandler(dev, HW_VAR_AC_PARAM, GET_WMM_PARAM_ELE_SINGLE_AC_PARAM(pStaQos->WMMParamEle, eACI) );
+				}
+			}
+			else
+			{
+				u8	u1bAIFS = aSifsTime + (2 * priv->slot_time);
+				
+				write_nic_byte(dev, REG_EDCA_VO_PARAM, u1bAIFS);
+				write_nic_byte(dev, REG_EDCA_VI_PARAM, u1bAIFS);
+				write_nic_byte(dev, REG_EDCA_BE_PARAM, u1bAIFS);
+				write_nic_byte(dev, REG_EDCA_BK_PARAM, u1bAIFS);
+			}
+#endif
+		}
+		break;
+
+		case HW_VAR_ACK_PREAMBLE:	
+		{
+			u8	regTmp;
+			priv->short_preamble = (bool)(*(u8*)val );
+			regTmp = (priv->nCur40MhzPrimeSC)<<5;		
+			if(priv->short_preamble)
+				regTmp |= 0x80;
+
+			write_nic_byte(dev, RRSR+2, regTmp);
+		}
+		break;	
+
+		default:
+			break;
+	}
+}
+
+void SetBeaconRelatedRegisters8192SE(struct net_device *dev)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	struct rtllib_network *net = &priv->rtllib->current_network;
+	u16			BcnTimeCfg = 0;
+	u16			BcnCW = 6, BcnIFS = 0xf;
+	u16			AtimWindow = 2;	
+	int			OpMode = priv->rtllib->iw_mode;
+	u16			BcnInterval = net->beacon_interval;
+	write_nic_word(dev, ATIMWND, AtimWindow);
+	
+	write_nic_word(dev, BCN_INTERVAL, BcnInterval);
+	PHY_SetBeaconHwReg( dev, BcnInterval);
+
+	write_nic_word(dev, BCN_DRV_EARLY_INT, 10<<4);
+
+	write_nic_word(dev, BCN_DMATIME, 256); 
+
+	write_nic_byte(dev, BCN_ERR_THRESH, 100); 
+
+		
+	switch(OpMode)
+	{
+		case IW_MODE_ADHOC:
+			BcnTimeCfg |= (BcnCW<<BCN_TCFG_CW_SHIFT);
+			break;
+		default:
+			printk("Invalid Operation Mode!!\n");
+			break;
+	}
+
+	BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
+
+
+	{
+		u8 u1Temp = (u8)(BcnInterval);
+		write_nic_dword(dev, WFM5, 0xF1000000 |((u16)( u1Temp) << 8));
+		ChkFwCmdIoDone(dev);
+	}
+}
+
+void UpdateHalRATRTableIndex(struct net_device *dev)
+{
+	struct r8192_priv* priv = rtllib_priv(dev);
+	struct rtllib_device* ieee = priv->rtllib;
+	u8		bitmap = 0;
+	int		i;
+
+	for (i = 0; i < PEER_MAX_ASSOC; i++) {
+		if (NULL != ieee->peer_assoc_list[i]) {
+			bitmap |= BIT0 << ieee->peer_assoc_list[i]->ratr_index;
+		}
+	}
+
+	priv->RATRTableBitmap = bitmap;
+	return;
+}
+
+bool rtl8192se_check_ht_cap(struct net_device* dev, struct sta_info *sta, 
+		struct rtllib_network* net)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	struct rtllib_device *ieee = priv->rtllib;
+	PHT_CAPABILITY_ELE  pHTCapIE = NULL;
+	PHT_INFORMATION_ELE  pPeerHTInfo = NULL;
+	u8 ExtChlOffset=0;
+	u8	*pMcsFilter = NULL;
+	u16	nMaxAMSDUSize = 0;	
+	static u8	EWC11NHTCap[] = {0x00, 0x90, 0x4c, 0x33};	
+	static u8 	EWC11NHTInfo[] = {0x00, 0x90, 0x4c, 0x34};
+
+	if ((ieee->mode != WIRELESS_MODE_N_24G) && 
+			(ieee->mode != WIRELESS_MODE_N_5G)) {
+		if (net->mode == IEEE_N_5G)
+			sta->wireless_mode = IEEE_A;
+		else if (net->mode == IEEE_N_24G) {
+			if (net->rates_ex_len > 0)
+				sta->wireless_mode = IEEE_G;
+			else
+				sta->wireless_mode = IEEE_B;
+		} else
+			sta->wireless_mode = net->mode;
+		printk("%s():i am G mode ,do not need to check Cap IE. wireless_mode=0x%x\n",
+				__FUNCTION__, sta->wireless_mode);
+		return false;
+	}
+	if ((ieee->mode ==WIRELESS_MODE_N_24G) 
+		&& ieee->pHTInfo->bRegSuppCCK== false) {
+		if(net->mode == IEEE_B){
+			sta->wireless_mode = net->mode;
+			printk("%s(): peer is B MODE return\n", __FUNCTION__);
+			return false;
+		}
+	}
+	if(net->bssht.bdHTCapLen  != 0)
+	{
+		sta->htinfo.bEnableHT = true;
+		sta->htinfo.bCurRxReorderEnable = ieee->pHTInfo->bRegRxReorderEnable;
+		if(net->mode == IEEE_A)
+			sta->wireless_mode = IEEE_N_5G;
+		else
+			sta->wireless_mode = IEEE_N_24G;
+	} else {
+		printk("%s(): have no HTCap IE, mode is %d\n",__FUNCTION__,net->mode);
+		sta->wireless_mode = net->mode;
+		sta->htinfo.bEnableHT = false;
+		return true;
+	}
+
+	if (!memcmp(net->bssht.bdHTCapBuf ,EWC11NHTCap, sizeof(EWC11NHTCap)))
+		pHTCapIE = (PHT_CAPABILITY_ELE)(&(net->bssht.bdHTCapBuf[4]));
+	else
+		pHTCapIE = (PHT_CAPABILITY_ELE)(net->bssht.bdHTCapBuf);
+
+	if (!memcmp(net->bssht.bdHTInfoBuf, EWC11NHTInfo, sizeof(EWC11NHTInfo)))
+		pPeerHTInfo = (PHT_INFORMATION_ELE)(&net->bssht.bdHTInfoBuf[4]);
+	else		
+		pPeerHTInfo = (PHT_INFORMATION_ELE)(net->bssht.bdHTInfoBuf);
+	
+	ExtChlOffset=((ieee->pHTInfo->bRegBW40MHz == false)?HT_EXTCHNL_OFFSET_NO_EXT:
+					(ieee->current_network.channel<=6)?
+					HT_EXTCHNL_OFFSET_UPPER:HT_EXTCHNL_OFFSET_LOWER);
+	printk("******** STA wireless mode %d\n", sta->wireless_mode);
+		
+	if (ieee->pHTInfo->bRegSuppCCK)
+		sta->htinfo.bSupportCck = (pHTCapIE->DssCCk==1)?true:false;
+	else {
+		if(pHTCapIE->DssCCk==1)
+			return false;
+	}
+
+	sta->htinfo.MimoPs= pHTCapIE->MimoPwrSave;
+
+	printk("******** PEER MP MimoPs %d\n", sta->htinfo.MimoPs);
+	if(ieee->pHTInfo->bRegBW40MHz)
+		sta->htinfo.bBw40MHz= (pHTCapIE->ChlWidth==1)?true:false;
+	else
+		sta->htinfo.bBw40MHz = false;
+
+	if((pPeerHTInfo->ExtChlOffset) != ExtChlOffset)
+		sta->htinfo.bBw40MHz = false;
+	
+	ieee->Peer_bCurBW40M = sta->htinfo.bBw40MHz;
+	printk("******** PEER MP bCurBW40M %d\n", sta->htinfo.bBw40MHz);
+	if(ieee->pHTInfo->bRegBW40MHz == true)
+		sta->htinfo.bCurTxBW40MHz = sta->htinfo.bBw40MHz;
+
+	printk("******** PEER MP bCurTxBW40MHz %d\n", sta->htinfo.bCurTxBW40MHz);
+	sta->htinfo.bCurShortGI20MHz= 
+		((ieee->pHTInfo->bRegShortGI20MHz)?((pHTCapIE->ShortGI20Mhz==1)?true:false):false);
+	sta->htinfo.bCurShortGI40MHz= 
+		((ieee->pHTInfo->bRegShortGI40MHz)?((pHTCapIE->ShortGI40Mhz==1)?true:false):false);
+	
+	printk("******** PEER MP bCurShortGI20MHz %d, bCurShortGI40MHz %d\n",sta->htinfo.bCurShortGI20MHz,sta->htinfo.bCurShortGI40MHz);
+	nMaxAMSDUSize = (pHTCapIE->MaxAMSDUSize==0)?3839:7935;
+	if(ieee->pHTInfo->nAMSDU_MaxSize >= nMaxAMSDUSize)	
+		sta->htinfo.AMSDU_MaxSize = nMaxAMSDUSize;
+	else
+		sta->htinfo.AMSDU_MaxSize = ieee->pHTInfo->nAMSDU_MaxSize;
+
+	printk("****************AMSDU_MaxSize=%d\n",sta->htinfo.AMSDU_MaxSize);
+		
+	if(ieee->pHTInfo->AMPDU_Factor >= pHTCapIE->MaxRxAMPDUFactor)
+		sta->htinfo.AMPDU_Factor = pHTCapIE->MaxRxAMPDUFactor;
+	else
+		sta->htinfo.AMPDU_Factor = ieee->pHTInfo->AMPDU_Factor;
+
+	if(ieee->pHTInfo->MPDU_Density >= pHTCapIE->MPDUDensity)
+		sta->htinfo.MPDU_Density = pHTCapIE->MPDUDensity;
+	else
+		sta->htinfo.MPDU_Density = ieee->pHTInfo->MPDU_Density;
+
+	HTFilterMCSRate(ieee, pHTCapIE->MCS, sta->htinfo.McsRateSet);
+	if(sta->htinfo.MimoPs == 0)  
+		pMcsFilter = MCS_FILTER_1SS;
+	else
+		pMcsFilter = MCS_FILTER_ALL;
+
+	sta->htinfo.HTHighestOperaRate = HTGetHighestMCSRate(ieee, sta->htinfo.McsRateSet, pMcsFilter);
+	printk("******** PEER MP HTHighestOperaRate %x\n",sta->htinfo.HTHighestOperaRate);
+
+	return true;
+	
+}
+
+#if LINUX_VERSION_CODE >=KERNEL_VERSION(2,6,20)
+void rtl8192se_check_tsf_wq(struct work_struct * work)
+{
+	struct delayed_work *dwork = container_of(work,struct delayed_work,work);
+	struct rtllib_device *ieee = container_of(dwork, struct rtllib_device, check_tsf_wq);
+	struct net_device *dev = ieee->dev;
+#else
+void rtl8192se_check_tsf_wq(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	struct rtllib_device *ieee = priv->rtllib;
+#endif
+	u32	CurrTsfHigh,CurrTsfLow;
+	u32	TargetTsfHigh,TargetTsfLow;
+					
+	CurrTsfHigh = read_nic_dword(dev, TSFR+4);
+	CurrTsfLow = (u32)(ieee->CurrTsf & 0xffff);
+	TargetTsfHigh = (u32)(ieee->TargetTsf >> 32);
+	TargetTsfLow = (u32)(ieee->TargetTsf & 0xffff);
+
+	printk("Current TSF Low = %x, Hight = %x\n",CurrTsfLow,CurrTsfHigh);
+	printk("Target TSF Low = %x, Hight = %x\n",TargetTsfLow,TargetTsfHigh);
+
+	ieee->CurrTsf |= (u64)CurrTsfHigh << 32;
+
+	if(ieee->CurrTsf < ieee->TargetTsf)
+	{
+		down(&ieee->wx_sem);
+
+		rtllib_stop_protocol(ieee,true);
+
+		ieee->ssid_set = 1;
+
+		rtllib_start_protocol(ieee);
+
+		up(&ieee->wx_sem);
+	}
+}
+
+#if LINUX_VERSION_CODE >=KERNEL_VERSION(2,6,20)
+void rtl8192se_update_assoc_sta_info_wq(struct work_struct * work)
+{
+	struct delayed_work *dwork = container_of(work,struct delayed_work,work);
+	struct rtllib_device *ieee = container_of(dwork, struct rtllib_device, update_assoc_sta_info_wq);
+        struct net_device *dev = ieee->dev;
+#else
+void rtl8192se_update_assoc_sta_info_wq(struct net_device *dev)
+{
+        struct r8192_priv *priv = rtllib_priv(dev);
+	struct rtllib_device *ieee = priv->rtllib;
+#endif
+	struct sta_info * pEntry = NULL;
+	int idx = 0;
+	for(idx=0; idx<PEER_MAX_ASSOC; idx++)
+	{	
+		pEntry = ieee->peer_assoc_list[idx];
+		if(NULL != pEntry)
+		{
+			u8 * addr = pEntry->macaddr;
+				
+			if(ieee->bUseRAMask){
+				if((pEntry->wireless_mode & WIRELESS_MODE_N_24G) || (pEntry->wireless_mode & WIRELESS_MODE_N_5G))
+					pEntry->ratr_index = RATR_INX_WIRELESS_NGB;
+				else if(pEntry->wireless_mode & WIRELESS_MODE_G)
+					pEntry->ratr_index = RATR_INX_WIRELESS_GB;
+				else if(pEntry->wireless_mode & WIRELESS_MODE_B)
+					pEntry->ratr_index = RATR_INX_WIRELESS_B;
+				ieee->UpdateHalRAMaskHandler(dev,
+										false,
+										pEntry->aid+1,
+										pEntry->htinfo.MimoPs,
+										pEntry->wireless_mode,	
+										pEntry->htinfo.bCurTxBW40MHz,
+										0);
+			}
+			else	
+				rtl8192se_update_ratr_table(dev,pEntry->htinfo.McsRateSet,pEntry);
+			printk("%s: STA:"MAC_FMT", aid:%d, wireless_mode=0x%x ratr_index=%d\n",__FUNCTION__,MAC_ARG(addr), pEntry->aid, pEntry->wireless_mode, pEntry->ratr_index);
+		}
+	}
+	if(!ieee->bUseRAMask)
+		UpdateHalRATRTableIndex(dev);
+
+	if(ieee->Peer_bCurBW40M)
+		HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20_40, (ieee->current_network.channel<=6)?HT_EXTCHNL_OFFSET_UPPER:HT_EXTCHNL_OFFSET_LOWER);  
+	else
+		HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20, (ieee->current_network.channel<=6)?HT_EXTCHNL_OFFSET_UPPER:HT_EXTCHNL_OFFSET_LOWER);  
+}
+
+bool	
+rtl8192se_RxCommandPacketHandle(
+	struct net_device *dev, 
+	struct sk_buff* skb,
+	rx_desc *pdesc)
+{
+	u8*			pRxCmdHeader;
+	u8*			pCmdContent;
+	u16			total_length, offset;
+	u16			RxCmdLen;
+	u8			RxCmdElementID, RxCmdSeq;
+	bool			RxCmdContinue;
+
+#if 0
+	if ((pRfd->queue_id != CMPK_RX_QUEUE_ID) || (pRfd == NULL))
+	{
+		return 0;
+	}
+#endif
+	
+	
+#if 0
+	if(pdesc->MACID == 0x1e)
+	{	
+		return 0;
+	}
+#endif	
+
+	total_length = pdesc->Length;
+	pRxCmdHeader = skb->data;
+	offset = 0;
+
+	do
+	{
+		RxCmdLen = (u16)GET_C2H_CMD_CMD_LEN(pRxCmdHeader + offset);
+		RxCmdElementID = (u8)GET_C2H_CMD_ELEMENT_ID(pRxCmdHeader + offset);
+		RxCmdSeq = (u8)GET_C2H_CMD_CMD_SEQ(pRxCmdHeader + offset);
+		RxCmdContinue = (bool)GET_C2H_CMD_CONTINUE(pRxCmdHeader + offset);
+		pCmdContent = (u8*)GET_C2H_CMD_CONTENT(pRxCmdHeader + offset);
+
+		if((offset + C2H_RX_CMD_HDR_LEN + RxCmdLen) > total_length)
+		{
+			printk("Wrong C2H Cmd length!\n");
+			break;
+		}
+
+		RT_TRACE(COMP_CMD, "RxCmdLen = 0x%x, RxCmdElementID = 0x%x, RxCmdSeq = 0x%x, RxCmdContinue = 0x%x\n", 
+			RxCmdLen, RxCmdElementID, RxCmdSeq, RxCmdContinue);
+		RT_TRACE(COMP_CMD, "Rx CMD Packet Hex Data :%x\n", total_length);
+		RT_TRACE(COMP_CMD, "Rx CMD Content Hex Data :%x:%x\n", *pCmdContent, RxCmdLen);
+
+		switch(RxCmdElementID)
+		{
+		case HAL_FW_C2H_CMD_C2HFEEDBACK:
+			{
+				switch(GET_C2H_CMD_FEEDBACK_ELEMENT_ID(pCmdContent))
+				{
+				case HAL_FW_C2H_CMD_C2HFEEDBACK_CCX_PER_PKT_RPT:
+					{
+						RT_TRACE(COMP_CMD, "HAL_FW_C2H_CMD_C2HFEEDBACK_CCX_PER_PKT_RPT FW_DBG CMD Hex:%x\n", total_length);
+					}
+					break;
+
+				case HAL_FW_C2H_CMD_C2HFEEDBACK_DTM_TX_STATISTICS_RPT:
+					break;
+
+				default:
+					break;
+				}
+			}
+			break;
+
+		case HAL_FW_C2H_CMD_C2HDBG:
+			RT_TRACE(COMP_CMD,  "rtl8192se_RxCommandPacketHandle(): %x:%x<*** FW_DBG CMD String ***>\n", *pCmdContent, RxCmdLen);
+			break;
+
+		case HAL_FW_C2H_CMD_BT_State:
+			{
+			}
+			break;
+		case HAL_FW_C2H_CMD_BT_Service:
+			{
+			}
+			break;		
+		case HAL_FW_C2H_CMD_SurveyDone:
+			{
+				rtl8192se_rx_surveydone_cmd(dev);
+			}
+			break;
+		default:
+			RT_TRACE(COMP_CMD, "rtl8192se_RxCommandPacketHandle(): Receive unhandled C2H CMD (%d)\n", RxCmdElementID);
+			break;
+		}
+
+		offset += (C2H_RX_CMD_HDR_LEN + N_BYTE_ALIGMENT(RxCmdLen, 8));
+
+		if(!RxCmdContinue || ((offset + C2H_RX_CMD_HDR_LEN) > total_length))
+		{
+			break;
+		}
+	}while(true);
+	RT_TRACE(COMP_RECV, "RxCommandPacketHandle8190Pci(): It is a command packet\n");
+	
+	return 1;
+}
+
+void
+rtl8192se_InitializeVariables(struct net_device  *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+
+	if (priv->rf_type == RF_1T1R) 
+		strcpy(priv->nick, "rtl8191SEVA1");
+	else if (priv->rf_type == RF_1T2R)
+		strcpy(priv->nick, "rtl8191SEVA2");
+	else
+		strcpy(priv->nick, "rtl8192SE");
+
+#ifdef _ENABLE_SW_BEACON
+	priv->rtllib->softmac_features  = IEEE_SOFTMAC_SCAN | 
+		IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ | 
+		IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE  |
+		IEEE_SOFTMAC_BEACONS;
+#else
+#ifdef _RTL8192_EXT_PATCH_	
+	priv->rtllib->softmac_features  = IEEE_SOFTMAC_SCAN | 
+		IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ | 
+		IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE /* |
+		IEEE_SOFTMAC_BEACONS*/;
+#else
+	priv->rtllib->softmac_features  = IEEE_SOFTMAC_SCAN | 
+		IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ | 
+		IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE /* |
+		IEEE_SOFTMAC_BEACONS*/;
+#endif
+#endif
+
+	priv->rtllib->tx_headroom = 0;
+
+	priv->ShortRetryLimit = 0x30;
+	priv->LongRetryLimit = 0x30;
+	
+	priv->EarlyRxThreshold = 7;
+	priv->pwrGroupCnt = 0;
+
+	priv->bIgnoreSilentReset = false;  
+	priv->enable_gpio0 = 0;
+
+	priv->TransmitConfig = 0;
+
+	priv->ReceiveConfig = 
+	RCR_APPFCS | RCR_APWRMGT | /*RCR_ADD3 |*/
+	RCR_AMF	| RCR_ADF | RCR_APP_MIC | RCR_APP_ICV |
+       RCR_AICV	| RCR_ACRC32	|				
+	RCR_AB 		| RCR_AM		|				
+     	RCR_APM 	|  								
+     	/*RCR_AAP		|*/	 						
+     	RCR_APP_PHYST_STAFF | RCR_APP_PHYST_RXFF |	
+	(priv->EarlyRxThreshold<<RCR_FIFO_OFFSET)	;
+
+#if 0
+	priv->irq_mask[0] = 
+	(IMR_ROK | IMR_VODOK | IMR_VIDOK | IMR_BEDOK | IMR_BKDOK |		\
+	IMR_HCCADOK | IMR_MGNTDOK | IMR_COMDOK | IMR_HIGHDOK | 					\
+	IMR_BDOK | IMR_RXCMDOK | /*IMR_TIMEOUT0 |*/ IMR_RDU | IMR_RXFOVW/*	|			\
+	IMR_BcnInt| IMR_TXFOVW | IMR_TBDOK | IMR_TBDER*/);
+#else
+	priv->irq_mask[0] = 
+	(IMR_ROK | IMR_VODOK | IMR_VIDOK | IMR_BEDOK | IMR_BKDOK |		\
+	IMR_HCCADOK | IMR_MGNTDOK | IMR_COMDOK | IMR_HIGHDOK | 					\
+	IMR_BDOK | IMR_RXCMDOK | /*IMR_TIMEOUT0 |*/ IMR_RDU | IMR_RXFOVW	|		\
+	IMR_BcnInt/*| IMR_TXFOVW*/ /*| IMR_TBDOK | IMR_TBDER*/);
+#endif
+	priv->irq_mask[1] = 0;/* IMR_TBDOK | IMR_TBDER*/
+
+
+	priv->MidHighPwrTHR_L1 = 0x3B;
+	priv->MidHighPwrTHR_L2 = 0x40;
+	priv->PwrDomainProtect = false;
+
+	if (!(priv->rtllib->softmac_features & IEEE_SOFTMAC_SCAN)){
+		if (!priv->scan_cmd) {
+			priv->scan_cmd = kmalloc(sizeof(H2C_SITESURVEY_PARA) +
+				RTL_MAX_SCAN_SIZE, GFP_KERNEL);
+		}
+	}
+}
+
+void rtl8192se_EnableInterrupt(struct net_device *dev)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);	
+	priv->irq_enabled = 1;
+	
+#ifdef RTL8192CE
+	write_nic_dword(dev, REG_HIMR, priv->irq_mask[0]&0xFFFFFFFF);	
+#else
+	write_nic_dword(dev,INTA_MASK, priv->irq_mask[0]);
+#endif
+
+#ifdef RTL8192SE	
+	write_nic_dword(dev,INTA_MASK+4, priv->irq_mask[1]&0x3F);
+#endif	
+
+}
+
+void rtl8192se_DisableInterrupt(struct net_device *dev)
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);	
+
+#ifdef RTL8192CE
+	write_nic_dword(dev, REG_HIMR, IMR8190_DISABLED);	
+#else
+	write_nic_dword(dev,INTA_MASK,0);
+#endif
+
+#ifdef RTL8192SE	
+	write_nic_dword(dev,INTA_MASK + 4,0);
+#endif	
+	priv->irq_enabled = 0;
+}
+
+void rtl8192se_ClearInterrupt(struct net_device *dev)
+{
+	u32 tmp = 0;
+#ifdef RTL8192CE
+	tmp = read_nic_dword(dev, REG_HISR);	
+	write_nic_dword(dev, REG_HISR, tmp);
+#else
+	tmp = read_nic_dword(dev, ISR);	
+	write_nic_dword(dev, ISR, tmp);
+#endif
+
+#ifdef RTL8192SE	
+	tmp = read_nic_dword(dev, ISR+4);	
+	write_nic_dword(dev, ISR+4, tmp);
+#endif
+}
+
+void rtl8192se_enable_rx(struct net_device *dev)
+{
+    struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+
+    write_nic_dword(dev, RDQDA,priv->rx_ring_dma[RX_MPDU_QUEUE]);
+#ifdef CONFIG_RX_CMD
+    write_nic_dword(dev, RCDA, priv->rx_ring_dma[RX_CMD_QUEUE]);
+#endif
+}
+
+u32 TX_DESC_BASE[] = {TBKDA, TBEDA, TVIDA, TVODA, TBDA, TCDA, TMDA, THPDA, HDA};
+void rtl8192se_enable_tx(struct net_device *dev)
+{
+    struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+    u32 i;
+	
+    for (i = 0; i < MAX_TX_QUEUE_COUNT; i++)
+        write_nic_dword(dev, TX_DESC_BASE[i], priv->tx_ring[i].dma);
+}
+
+
+void rtl8192se_beacon_disable(struct net_device *dev) 
+{
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	u32 reg;
+
+#ifdef RTL8192CE
+	reg = read_nic_dword(priv->rtllib->dev,REG_HIMR);
+
+	reg &= ~(IMR_BcnInt | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
+	write_nic_dword(priv->rtllib->dev, REG_HIMR, reg);	
+#else
+	reg = read_nic_dword(priv->rtllib->dev,INTA_MASK);
+
+	reg &= ~(IMR_BcnInt | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
+	write_nic_dword(priv->rtllib->dev, INTA_MASK, reg);	
+#endif
+}
+
+void rtl8192se_interrupt_recognized(struct net_device *dev, u32 *p_inta, u32 *p_intb)
+{
+#ifdef RTL8192SE
+	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
+	*p_inta = read_nic_dword(dev, ISR) & priv->irq_mask[0];
+#else
+	*p_inta = read_nic_dword(dev, ISR) ;
+#endif
+	write_nic_dword(dev,ISR,*p_inta); 
+#ifdef RTL8192SE
+	*p_intb = read_nic_dword(dev, ISR+4);
+	write_nic_dword(dev, ISR+4, *p_intb);
+#endif
+}
+
+bool rtl8192se_HalRxCheckStuck(struct net_device *dev)
+{
+	
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u16 				RegRxCounter = (u16)(priv->InterruptLog.nIMR_ROK&0xffff);
+	bool				bStuck = false;
+	u32 				SlotIndex = 0, TotalRxStuckCount = 0;
+	u8				i;
+	u8				SilentResetRxSoltNum = 4;
+
+
+	SlotIndex = (priv->SilentResetRxSlotIndex++)%SilentResetRxSoltNum;
+
+	if(priv->RxCounter==RegRxCounter)
+	{		
+		priv->SilentResetRxStuckEvent[SlotIndex] = 1;
+
+		for( i = 0; i < SilentResetRxSoltNum ; i++ )
+			TotalRxStuckCount += priv->SilentResetRxStuckEvent[i];
+
+		if(TotalRxStuckCount  == SilentResetRxSoltNum)
+		{
+			bStuck = true;
+			for( i = 0; i < SilentResetRxSoltNum ; i++ )
+				TotalRxStuckCount += priv->SilentResetRxStuckEvent[i];
+		}
+
+
+	} else {
+		priv->SilentResetRxStuckEvent[SlotIndex] = 0;
+	}
+
+	priv->RxCounter = RegRxCounter;
+
+	return bStuck;
+}
+
+bool rtl8192se_HalTxCheckStuck(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	bool   	bStuck = false;
+#if defined(RTL8192E) || defined(RTL8190P)
+	u16    RegTxCounter = read_nic_word(dev, 0x128);
+#elif defined (RTL8192SE) || defined (RTL8192CE)
+	u16 	RegTxCounter = read_nic_word(dev, 0x366);
+#else
+	u16 	RegTxCounter = priv->TxCounter + 1;
+ 	WARN_ON(1);	
+#endif
+
+	RT_TRACE(COMP_RESET, "%s():RegTxCounter is %d,TxCounter is %d\n", 
+			__FUNCTION__,RegTxCounter,priv->TxCounter);
+
+	if(priv->TxCounter == RegTxCounter)
+		bStuck = true;
+
+	priv->TxCounter = RegTxCounter;
+
+	return bStuck;
+}
+
+bool rtl8192se_GetNmodeSupportBySecCfg(struct net_device *dev)
+{
+#ifdef RTL8192SE
+	return true;
+#else
+	struct r8192_priv *priv = rtllib_priv(dev);
+	struct rtllib_device *ieee = priv->rtllib;
+	if (ieee->rtllib_ap_sec_type && 
+	   (ieee->rtllib_ap_sec_type(priv->rtllib)&(SEC_ALG_WEP|SEC_ALG_TKIP))) {
+		return false;
+	} else {
+		return true;
+	}
+#endif
+}
+
+bool rtl8192se_GetHalfNmodeSupportByAPs(struct net_device* dev)
+{
+#ifdef RTL8192SE
+	return false;
+#else	
+	bool			Reval;
+	struct r8192_priv* priv = rtllib_priv(dev);
+	struct rtllib_device* ieee = priv->rtllib;
+	
+	if(ieee->bHalfWirelessN24GMode == true)
+		Reval = true;
+	else
+		Reval =  false;
+
+	return Reval;
+#endif
+}
+
+u8 rtl8192se_QueryIsShort(u8 TxHT, u8 TxRate, cb_desc *tcb_desc)
+{
+	u8   tmp_Short;
+
+	tmp_Short = (TxHT==1)?((tcb_desc->bUseShortGI)?1:0):((tcb_desc->bUseShortPreamble)?1:0);
+#if defined RTL8192SE || defined RTL8192CE
+	if(TxHT==1 && TxRate != DESC92S_RATEMCS15)
+#elif defined RTL8192E || defined RTL8190P
+	if(TxHT==1 && TxRate != DESC90_RATEMCS15)
+#endif
+		tmp_Short = 0;
+
+	return tmp_Short;
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl8192s/r8192S_firmware.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl8192s/r8192S_firmware.c
@@ -0,0 +1,856 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+#if defined(RTL8192SE)
+#include "../rtl_core.h"
+#include "../rtl_endianfree.h"
+#include "r8192S_hwimg.h"
+#include "r8192S_dev.h"
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0) && defined(USE_FW_SOURCE_IMG_FILE)
+#include <linux/firmware.h>
+#endif
+#define   byte(x,n)  ( (x >> (8 * n)) & 0xff  )
+
+static void fw_SetRQPN(struct net_device *dev)
+{	
+
+	write_nic_dword(dev,  RQPN, 0xffffffff);
+	write_nic_dword(dev,  RQPN+4, 0xffffffff);
+	write_nic_byte(dev,  RQPN+8, 0xff);
+	write_nic_byte(dev,  RQPN+0xB, 0x80);
+
+
+}	/* fw_SetRQPN */
+
+bool FirmwareDownloadCode(struct net_device *dev, u8 *	code_virtual_address,u32 buffer_len)
+{
+	struct r8192_priv   *priv = rtllib_priv(dev);
+	bool 		    rt_status = true;
+	u16		    frag_threshold = MAX_FIRMWARE_CODE_SIZE; 
+	u16		    frag_length, frag_offset = 0;
+	struct sk_buff	    *skb;
+	unsigned char	    *seg_ptr;
+	cb_desc		    *tcb_desc;	
+	u8                  	    bLastIniPkt = 0;
+	u16 			    ExtraDescOffset = 0;
+	
+#ifdef RTL8192SE
+	fw_SetRQPN(dev);	
+#endif
+
+	RT_TRACE(COMP_FIRMWARE, "--->FirmwareDownloadCode()\n" );	
+
+	if(buffer_len >= MAX_FIRMWARE_CODE_SIZE)
+	{
+		RT_TRACE(COMP_ERR, "Size over FIRMWARE_CODE_SIZE! \n");
+		goto cmdsend_downloadcode_fail;
+	}
+	
+	ExtraDescOffset = 0;
+	
+	do {
+		if((buffer_len-frag_offset) > frag_threshold)
+		{
+			frag_length = frag_threshold + ExtraDescOffset;
+		}
+		else
+		{
+			frag_length = (u16)(buffer_len - frag_offset + ExtraDescOffset);
+			bLastIniPkt = 1;
+		}
+
+		skb  = dev_alloc_skb(frag_length); 
+		memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
+		
+		tcb_desc = (cb_desc*)(skb->cb + MAX_DEV_ADDR_SIZE);
+		tcb_desc->queue_index = TXCMD_QUEUE;
+		tcb_desc->bCmdOrInit = DESC_PACKET_TYPE_INIT;
+		tcb_desc->bLastIniPkt = bLastIniPkt;
+		
+		skb_reserve(skb, ExtraDescOffset);
+		seg_ptr = (u8 *)skb_put(skb, (u32)(frag_length-ExtraDescOffset));
+		memcpy(seg_ptr, code_virtual_address+frag_offset, (u32)(frag_length-ExtraDescOffset));
+		
+		tcb_desc->txbuf_size= frag_length;
+
+		if(!priv->rtllib->check_nic_enough_desc(dev,tcb_desc->queue_index)||
+			(!skb_queue_empty(&priv->rtllib->skb_waitQ[tcb_desc->queue_index]))||\
+			(priv->rtllib->queue_stop) ) 
+		{
+			RT_TRACE(COMP_FIRMWARE,"=====================================================> tx full!\n");
+			skb_queue_tail(&priv->rtllib->skb_waitQ[tcb_desc->queue_index], skb);
+		} 
+		else 
+		{
+			priv->rtllib->softmac_hard_start_xmit(skb,dev);
+		}
+		
+		frag_offset += (frag_length - ExtraDescOffset);
+
+	}while(frag_offset < buffer_len);
+	write_nic_byte(dev, TPPoll, TPPoll_CQ);
+	return rt_status ;
+
+
+cmdsend_downloadcode_fail:	
+	rt_status = false;
+	RT_TRACE(COMP_ERR, "CmdSendDownloadCode fail !!\n");
+	return rt_status;
+
+}
+
+
+
+bool
+FirmwareEnableCPU(struct net_device *dev)
+{
+
+	bool rtStatus = true;
+	u8		tmpU1b, CPUStatus = 0;
+	u16		tmpU2b;	
+	u32		iCheckTime = 200;	
+
+	RT_TRACE(COMP_FIRMWARE, "-->FirmwareEnableCPU()\n" );
+
+	fw_SetRQPN(dev);	
+	
+	tmpU1b = read_nic_byte(dev, SYS_CLKR);
+	write_nic_byte(dev,  SYS_CLKR, (tmpU1b|SYS_CPU_CLKSEL)); 
+
+	tmpU2b = read_nic_word(dev, SYS_FUNC_EN);	
+	write_nic_word(dev, SYS_FUNC_EN, (tmpU2b|FEN_CPUEN));
+
+	do
+	{
+		CPUStatus = read_nic_byte(dev, TCR);
+		if(CPUStatus& IMEM_RDY)
+		{
+			RT_TRACE(COMP_FIRMWARE, "IMEM Ready after CPU has refilled.\n");	
+			break;		
+		}
+
+		udelay(100);
+	}while(iCheckTime--);
+
+	if(!(CPUStatus & IMEM_RDY))
+		return false;
+
+	RT_TRACE(COMP_FIRMWARE, "<--FirmwareEnableCPU(): rtStatus(%#x)\n", rtStatus);
+	return rtStatus;			
+}
+
+FIRMWARE_8192S_STATUS
+FirmwareGetNextStatus(FIRMWARE_8192S_STATUS FWCurrentStatus)
+{
+	FIRMWARE_8192S_STATUS	NextFWStatus = 0;
+	
+	switch(FWCurrentStatus)
+	{
+		case FW_STATUS_INIT:
+			NextFWStatus = FW_STATUS_LOAD_IMEM;
+			break;
+
+		case FW_STATUS_LOAD_IMEM:
+			NextFWStatus = FW_STATUS_LOAD_EMEM;
+			break;
+		
+		case FW_STATUS_LOAD_EMEM:
+			NextFWStatus = FW_STATUS_LOAD_DMEM;
+			break;
+
+		case FW_STATUS_LOAD_DMEM:
+			NextFWStatus = FW_STATUS_READY;
+			break;
+
+		default:
+			RT_TRACE(COMP_ERR,"Invalid FW Status(%#x)!!\n", FWCurrentStatus);			
+			break;
+	}	
+	return	NextFWStatus;
+}
+
+bool FirmwareCheckReady(struct net_device *dev, u8 LoadFWStatus)
+{
+	struct r8192_priv  *priv = rtllib_priv(dev);
+	bool rtStatus = true;
+	rt_firmware  *pFirmware = priv->pFirmware;
+	short  PollingCnt = 1000;
+	u8   CPUStatus = 0;
+	u32  tmpU4b;
+
+	RT_TRACE(COMP_FIRMWARE, "--->%s(): LoadStaus(%d),", __FUNCTION__, LoadFWStatus);
+
+	pFirmware->FWStatus = (FIRMWARE_8192S_STATUS)LoadFWStatus;	
+
+	switch (LoadFWStatus) {
+	case FW_STATUS_LOAD_IMEM:
+		do {
+			CPUStatus = read_nic_byte(dev, TCR);
+			if(CPUStatus& IMEM_CODE_DONE)
+				break;	
+			udelay(5);
+		} while (PollingCnt--);		
+		if (!(CPUStatus & IMEM_CHK_RPT) || (PollingCnt <= 0)) {
+			RT_TRACE(COMP_ERR, "FW_STATUS_LOAD_IMEM FAIL CPU, Status=%x\r\n", CPUStatus);
+			goto status_check_fail;			
+		}
+		break;
+
+	case FW_STATUS_LOAD_EMEM:
+		do {
+			CPUStatus = read_nic_byte(dev, TCR);
+			if(CPUStatus& EMEM_CODE_DONE)
+				break;
+			udelay(5);
+		} while(PollingCnt--);		
+		if (!(CPUStatus & EMEM_CHK_RPT) || (PollingCnt <= 0)) {
+			RT_TRACE(COMP_ERR, "FW_STATUS_LOAD_EMEM FAIL CPU, Status=%x\r\n", CPUStatus);
+			goto status_check_fail;
+		}
+
+		rtStatus = FirmwareEnableCPU(dev);
+		if (rtStatus != true) {
+			RT_TRACE(COMP_ERR, "Enable CPU fail ! \n" );
+			goto status_check_fail;
+		}		
+		break;
+
+	case FW_STATUS_LOAD_DMEM:
+		do {
+			CPUStatus = read_nic_byte(dev, TCR);
+			if (CPUStatus& DMEM_CODE_DONE)
+				break;		
+			udelay(5);
+		} while(PollingCnt--);
+
+		if (!(CPUStatus & DMEM_CODE_DONE) || (PollingCnt <= 0)) {
+			RT_TRACE(COMP_ERR, "Polling  DMEM code done fail ! CPUStatus(%#x)\n", CPUStatus);
+			goto status_check_fail;
+		}
+
+		RT_TRACE(COMP_FIRMWARE, "DMEM code download success, CPUStatus(%#x)\n", CPUStatus);		
+		PollingCnt = 2000; 
+		do {
+			CPUStatus = read_nic_byte(dev, TCR);
+			if(CPUStatus & FWRDY)
+				break;		
+			udelay(40);
+		} while(PollingCnt--);	
+
+		RT_TRACE(COMP_FIRMWARE, "Polling Load Firmware ready, CPUStatus(%x)\n", CPUStatus);		
+		if (((CPUStatus & LOAD_FW_READY) != LOAD_FW_READY) || (PollingCnt <= 0)) {
+			RT_TRACE(COMP_ERR, "Polling Load Firmware ready fail ! CPUStatus(%x)\n", CPUStatus);
+			goto status_check_fail;
+		}
+
+#ifdef RTL8192SE
+#endif 
+
+		tmpU4b = read_nic_dword(dev,TCR);
+		write_nic_dword(dev, TCR, (tmpU4b&(~TCR_ICV)));
+
+		tmpU4b = read_nic_dword(dev, RCR);
+		write_nic_dword(dev, RCR, 
+				(tmpU4b|RCR_APPFCS|RCR_APP_ICV|RCR_APP_MIC));
+
+		RT_TRACE(COMP_FIRMWARE, "FirmwareCheckReady(): Current RCR settings(%#x)\n", tmpU4b);
+
+#if 0
+		priv->TransmitConfig = read_nic_dword_E(dev, TCR);
+		RT_TRACE(COMP_FIRMWARE, "FirmwareCheckReady(): Current TCR settings(%#x)\n", priv->TransmitConfig);
+#endif
+
+		write_nic_byte(dev, LBKMD_SEL, LBK_NORMAL);		
+		break;	
+	default :
+		RT_TRACE(COMP_FIRMWARE, "Unknown status check!\n");
+		rtStatus = false;
+		break;
+	}
+
+status_check_fail:
+	RT_TRACE(COMP_FIRMWARE, "<---%s: LoadFWStatus(%d), rtStatus(%x)\n", __FUNCTION__,
+			LoadFWStatus, rtStatus);
+	return rtStatus;
+}
+u8 FirmwareHeaderMapRfType(struct net_device *dev)
+{	
+	struct r8192_priv 	*priv = rtllib_priv(dev);
+	switch(priv->rf_type)
+	{
+		case RF_1T1R: 	return 0x11;
+		case RF_1T2R: 	return 0x12;
+		case RF_2T2R: 	return 0x22;
+		case RF_2T2R_GREEN: 	return 0x92;
+		default:
+			RT_TRACE(COMP_INIT, "Unknown RF type(%x)\n",priv->rf_type);
+			break;
+	}
+	return 0x22;
+}
+
+
+void FirmwareHeaderPriveUpdate(struct net_device *dev, PRT_8192S_FIRMWARE_PRIV 	pFwPriv)
+{
+	pFwPriv->rf_config = FirmwareHeaderMapRfType(dev);
+}
+
+
+
+bool FirmwareDownload92S(struct net_device *dev)
+{	
+	struct r8192_priv 	*priv = rtllib_priv(dev);
+	bool			rtStatus = true;
+	u8			*pucMappedFile = NULL;
+	u32			ulFileLength = 0;	
+	u8			FwHdrSize = RT_8192S_FIRMWARE_HDR_SIZE;	
+	rt_firmware		*pFirmware = priv->pFirmware;
+	u8			FwStatus = FW_STATUS_INIT;
+	PRT_8192S_FIRMWARE_HDR	pFwHdr = NULL;
+	PRT_8192S_FIRMWARE_PRIV	pFwPriv = NULL;
+	
+	pFirmware->FWStatus = FW_STATUS_INIT;
+
+	RT_TRACE(COMP_FIRMWARE, " --->FirmwareDownload92S()\n");
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0) && defined(USE_FW_SOURCE_IMG_FILE)
+	priv->firmware_source = FW_SOURCE_IMG_FILE;
+#else
+	priv->firmware_source = FW_SOURCE_HEADER_FILE;
+#endif
+
+	switch( priv->firmware_source )
+	{
+		case FW_SOURCE_IMG_FILE:		
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0) && defined(USE_FW_SOURCE_IMG_FILE)			
+			if(pFirmware->szFwTmpBufferLen == 0)
+			{
+#ifdef _RTL8192_EXT_PATCH_
+				const char 		*pFwImageFileName[1] = {"RTL8191SE_MESH/rtl8192sfw.bin"};
+#else
+				const char 		*pFwImageFileName[1] = {"RTL8192SE/rtl8192sfw.bin"};
+#endif
+				const struct firmware 	*fw_entry = NULL;
+				u32 ulInitStep = 0;
+				int 			rc = 0;
+				u32			file_length = 0;
+				rc = request_firmware(&fw_entry, pFwImageFileName[ulInitStep],&priv->pdev->dev);
+				if(rc < 0 ) {
+					RT_TRACE(COMP_ERR, "request firmware fail!\n");
+					goto DownloadFirmware_Fail;
+				} 
+
+				if(fw_entry->size > sizeof(pFirmware->szFwTmpBuffer)) {
+					RT_TRACE(COMP_ERR, "img file size exceed the container buffer fail!\n");
+					release_firmware(fw_entry);
+					goto DownloadFirmware_Fail;
+				}
+
+				memcpy(pFirmware->szFwTmpBuffer,fw_entry->data,fw_entry->size);
+				pFirmware->szFwTmpBufferLen = fw_entry->size;
+				release_firmware(fw_entry);
+
+				pucMappedFile = pFirmware->szFwTmpBuffer;
+				file_length = pFirmware->szFwTmpBufferLen;
+
+				pFirmware->pFwHeader = (PRT_8192S_FIRMWARE_HDR) pucMappedFile;				
+				pFwHdr = pFirmware->pFwHeader;
+				RT_TRACE(COMP_FIRMWARE,"signature:%x, version:%x, size:%x, imemsize:%x, sram size:%x\n", \
+						pFwHdr->Signature, pFwHdr->Version, pFwHdr->DMEMSize, \
+						pFwHdr->IMG_IMEM_SIZE, pFwHdr->IMG_SRAM_SIZE);
+				pFirmware->FirmwareVersion =  byte(pFwHdr->Version ,0);			
+				if ((pFwHdr->IMG_IMEM_SIZE==0) || (pFwHdr->IMG_IMEM_SIZE > sizeof(pFirmware->FwIMEM)))
+				{
+					RT_TRACE(COMP_ERR, "%s: memory for data image is less than IMEM required\n",\
+							__FUNCTION__);
+					goto DownloadFirmware_Fail;
+				} else {				
+					pucMappedFile+=FwHdrSize;
+
+					memcpy(pFirmware->FwIMEM, pucMappedFile, pFwHdr->IMG_IMEM_SIZE);
+					pFirmware->FwIMEMLen = pFwHdr->IMG_IMEM_SIZE;				
+				}
+
+				if (pFwHdr->IMG_SRAM_SIZE > sizeof(pFirmware->FwEMEM))
+				{
+					RT_TRACE(COMP_ERR, "%s: memory for data image is less than EMEM required\n",\
+							__FUNCTION__);	
+					goto DownloadFirmware_Fail;
+				}
+				else
+				{	
+					pucMappedFile += pFirmware->FwIMEMLen;
+
+					memcpy(pFirmware->FwEMEM, pucMappedFile, pFwHdr->IMG_SRAM_SIZE);
+					pFirmware->FwEMEMLen = pFwHdr->IMG_SRAM_SIZE;		
+				}	
+			}
+#endif
+			break;	
+
+		case FW_SOURCE_HEADER_FILE:	
+#if 1
+#define Rtl819XFwImageArray Rtl8192SEFwImgArray
+			pucMappedFile = Rtl819XFwImageArray;
+			ulFileLength = ImgArrayLength;
+
+			RT_TRACE(COMP_INIT,"Fw download from header.\n");
+			pFirmware->pFwHeader = (PRT_8192S_FIRMWARE_HDR) pucMappedFile;				
+			pFwHdr = pFirmware->pFwHeader;
+			RT_TRACE(COMP_FIRMWARE,"signature:%x, version:%x, size:%x, imemsize:%x, sram size:%x\n", \
+					pFwHdr->Signature, pFwHdr->Version, pFwHdr->DMEMSize, \
+					pFwHdr->IMG_IMEM_SIZE, pFwHdr->IMG_SRAM_SIZE);
+			pFirmware->FirmwareVersion =  byte(pFwHdr->Version ,0);			
+
+			if ((pFwHdr->IMG_IMEM_SIZE==0) || (pFwHdr->IMG_IMEM_SIZE > sizeof(pFirmware->FwIMEM)))
+			{
+				printk("FirmwareDownload92S(): memory for data image is less than IMEM required\n");					
+				goto DownloadFirmware_Fail;
+			}
+			else
+			{				
+				pucMappedFile+=FwHdrSize;
+
+				memcpy(pFirmware->FwIMEM, pucMappedFile, pFwHdr->IMG_IMEM_SIZE);
+				pFirmware->FwIMEMLen = pFwHdr->IMG_IMEM_SIZE;				
+			}
+
+			if (pFwHdr->IMG_SRAM_SIZE > sizeof(pFirmware->FwEMEM))
+			{
+				printk(" FirmwareDownload92S(): memory for data image is less than EMEM required\n");					
+				goto DownloadFirmware_Fail;
+			} else {	
+				pucMappedFile+= pFirmware->FwIMEMLen;
+
+				memcpy(pFirmware->FwEMEM, pucMappedFile, pFwHdr->IMG_SRAM_SIZE);
+				pFirmware->FwEMEMLen = pFwHdr->IMG_SRAM_SIZE;		
+			}
+#endif
+			break;
+		default:
+			break;
+	}			
+
+	FwStatus = FirmwareGetNextStatus(pFirmware->FWStatus);
+	while(FwStatus!= FW_STATUS_READY)
+	{
+		switch(FwStatus)
+		{
+			case FW_STATUS_LOAD_IMEM:				
+				pucMappedFile = pFirmware->FwIMEM;
+				ulFileLength = pFirmware->FwIMEMLen;					
+				break;
+
+			case FW_STATUS_LOAD_EMEM:				
+				pucMappedFile = pFirmware->FwEMEM;
+				ulFileLength = pFirmware->FwEMEMLen;					
+				break;
+
+			case FW_STATUS_LOAD_DMEM:			
+				pFwHdr = pFirmware->pFwHeader;
+				pFwPriv = (PRT_8192S_FIRMWARE_PRIV)&pFwHdr->FWPriv;
+				FirmwareHeaderPriveUpdate(dev, pFwPriv);
+				pucMappedFile = (u8*)(pFirmware->pFwHeader)+RT_8192S_FIRMWARE_HDR_EXCLUDE_PRI_SIZE;
+				ulFileLength = FwHdrSize-RT_8192S_FIRMWARE_HDR_EXCLUDE_PRI_SIZE;				
+				break;
+					
+			default:
+				RT_TRACE(COMP_ERR, "Unexpected Download step!!\n");
+				goto DownloadFirmware_Fail;
+				break;
+		}		
+		
+		rtStatus = FirmwareDownloadCode(dev, pucMappedFile, ulFileLength);	
+		
+		if(rtStatus != true)
+		{
+			RT_TRACE(COMP_ERR, "FirmwareDownloadCode() fail ! \n" );
+			goto DownloadFirmware_Fail;
+		}	
+		
+		rtStatus = FirmwareCheckReady(dev, FwStatus);
+
+		if(rtStatus != true)
+		{
+			RT_TRACE(COMP_ERR, "FirmwareDownloadCode() fail ! \n");
+			goto DownloadFirmware_Fail;
+		}
+		
+		FwStatus = FirmwareGetNextStatus(pFirmware->FWStatus);
+	}
+
+	RT_TRACE(COMP_FIRMWARE, "Firmware Download Success!!\n");	
+	return rtStatus;	
+	
+	DownloadFirmware_Fail:	
+	RT_TRACE(COMP_ERR, "Firmware Download Fail!!%x\n",read_nic_word(dev, TCR));	
+	rtStatus = false;
+	return rtStatus;	
+}
+void rtl8192se_dump_skb_data(struct sk_buff *skb)
+{
+	u8 i = 0;
+	u8 *arry = skb->data;
+
+	printk("\nSCAN_CMD/PROBE_REQ==============>\n");
+	for(i = 0; i < skb->len; i ++){
+		if((i % 4 == 0)&&(i != 0))
+			printk("\n");
+		printk("%2.2x ", arry[i]);
+	}
+	printk("\nSCAN_CMD/PROBE_REQ<==============\n");
+}
+
+void rtl8192se_dump_cmd_para(u8*SiteSurveyPara)
+{
+	u8 i = 0;
+	u8 desc_size = sizeof(tx_desc_fw);
+	u8 para_size = 8+desc_size;
+	u8 *arry = SiteSurveyPara;
+
+	printk("\nSCAN_CMD_PARA==============>\n");
+	for(i = 0; i < para_size; i ++){
+		if((i % 4 == 0)&&(i != 0))
+			printk("\n");
+		printk("%2.2x ", arry[i]);
+	}
+	printk("\nSCAN_CMD_PARA<==============\n");
+}
+#if 1 
+RT_STATUS
+CmdSendPacket(
+	struct net_device	*dev,
+	cb_desc			*pTcb,
+	struct sk_buff	    	*skb,
+	u32				BufferLen,
+	u32				PacketType,
+	bool				bLastInitPacket 
+	)
+{
+	struct r8192_priv   	*priv = rtllib_priv(dev);
+
+	RT_STATUS		rtStatus = RT_STATUS_SUCCESS;
+	
+	pTcb->queue_index 	= TXCMD_QUEUE;
+	pTcb->bCmdOrInit 	= PacketType;
+	pTcb->bLastIniPkt	= bLastInitPacket;
+	pTcb->txbuf_size	= BufferLen;
+
+
+	if(!priv->rtllib->check_nic_enough_desc(dev,pTcb->queue_index)||
+		(!skb_queue_empty(&priv->rtllib->skb_waitQ[pTcb->queue_index]))||\
+		(priv->rtllib->queue_stop) ) 	{
+		RT_TRACE(COMP_CMD,"=========================> tx full!\n");
+		skb_queue_tail(&priv->rtllib->skb_waitQ[pTcb->queue_index], skb);
+	} else {
+		priv->rtllib->softmac_hard_start_xmit(skb,dev);
+	}
+		
+	return rtStatus;
+}
+
+u32
+FillH2CCmd(
+	struct sk_buff 	*skb,
+	u32			H2CBufferLen,
+	u32			CmdNum,
+	u32*		pElementID,
+	u32*		pCmdLen,
+	u8**		pCmbBuffer,
+	u8*			CmdStartSeq
+	)
+{
+	u8	i = 0;
+	u32	TotalLen = 0, Len = 0, TxDescLen = 0;
+	u32	preContinueOffset = 0;
+
+	u8*	pH2CBuffer;
+	
+	do
+	{
+		Len = H2C_TX_CMD_HDR_LEN + N_BYTE_ALIGMENT(pCmdLen[i], 8);
+
+		if(H2CBufferLen < TotalLen + Len + TxDescLen)
+			break;
+		
+		pH2CBuffer = (u8 *) skb_put(skb, (u32)Len);
+		memset((pH2CBuffer + TotalLen + TxDescLen),0,Len);
+
+		SET_BITS_TO_LE_4BYTE((pH2CBuffer + TotalLen + TxDescLen), 0, 16, pCmdLen[i]);
+
+		SET_BITS_TO_LE_4BYTE((pH2CBuffer + TotalLen + TxDescLen), 16, 8, pElementID[i]);
+
+		*CmdStartSeq = *CmdStartSeq % 0x80;
+		SET_BITS_TO_LE_4BYTE((pH2CBuffer + TotalLen + TxDescLen), 24, 7, *CmdStartSeq);
+		++ *CmdStartSeq;
+		
+		memcpy((pH2CBuffer + TotalLen + TxDescLen + H2C_TX_CMD_HDR_LEN), pCmbBuffer[i], pCmdLen[i]);
+
+		if(i < CmdNum - 1) 
+			SET_BITS_TO_LE_4BYTE((pH2CBuffer + preContinueOffset), 31, 1, 1);
+
+		preContinueOffset = TotalLen;
+
+		TotalLen += Len;
+	}while(++ i < CmdNum);
+
+	return TotalLen;
+}
+
+u32
+GetH2CCmdLen(
+	u32		H2CBufferLen,
+	u32		CmdNum,
+	u32*	pCmdLen
+	)
+{
+	u8	i = 0;
+	u32	TotalLen = 0, Len = 0, TxDescLen = 0;
+
+	do
+	{
+		Len = H2C_TX_CMD_HDR_LEN + N_BYTE_ALIGMENT(pCmdLen[i], 8);
+
+		if(H2CBufferLen < TotalLen + Len + TxDescLen)
+			break;
+
+		TotalLen += Len;
+	}while(++ i < CmdNum);
+
+	return TotalLen + TxDescLen;
+}
+
+/*-----------------------------------------------------------------------------
+ * Function:	FirmwareSetH2CCmd()
+ *
+ * Overview:	Set FW H2C command (Decide ElementID, cmd content length, and get FW buffer)
+ *
+ * Input:		H2CCmd: H2C command type. 
+ *			pCmdBuffer: Pointer of the H2C command content.
+ *
+ * Output:		NONE
+ *
+ * Return:		RT_STATUS
+ *
+ * Revised History:
+ *	When		Who		Remark
+ *	2009/1/12	tynli		Create the version 0.
+ *
+ *---------------------------------------------------------------------------*/
+RT_STATUS
+FirmwareSetH2CCmd( 
+	struct net_device 	*dev, 
+	u8				H2CCmd,
+	u8*				pCmdBuffer
+	)
+{	
+	struct r8192_priv   *priv = rtllib_priv(dev);
+	u32				ElementID;
+	u32				Cmd_Len;
+	cb_desc			*pTcb;
+	struct sk_buff	    	*skb;
+	u32				Len;
+
+	RT_STATUS		rtStatus;
+
+	switch(H2CCmd){
+	case FW_H2C_SETPWRMODE:
+		{
+			ElementID = H2C_SetPwrMode_CMD ;
+			Cmd_Len = sizeof(H2C_SETPWRMODE_PARM);
+		}
+		break;
+	case FW_H2C_JOINBSSRPT:
+		{
+			ElementID = H2C_JoinbssRpt_CMD;
+			Cmd_Len = sizeof(H2C_JOINBSSRPT_PARM);
+		}
+		break;
+	case FW_H2C_WoWLAN_UPDATE_GTK:
+		{
+			ElementID = H2C_WoWLAN_UPDATE_GTK_CMD;
+			Cmd_Len = sizeof(H2C_WPA_TWO_WAY_PARA);
+		}
+		break;	
+	case FW_H2C_WoWLAN_UPDATE_IV:
+		{
+			ElementID = H2C_WoWLAN_UPDATE_IV_CMD;
+			Cmd_Len = sizeof(unsigned long long);
+		}
+		break;
+
+	case FW_H2C_WoWLAN_OFFLOAD:
+		{
+			ElementID = H2C_WoWLAN_FW_OFFLOAD;
+			Cmd_Len = sizeof(u8);
+		}
+		break;
+	case FW_H2C_SITESURVEY:
+		{
+			ElementID = H2C_SiteSurvey_CMD;
+			Cmd_Len = sizeof(H2C_SITESURVEY_PARA) + ((PH2C_SITESURVEY_PARA)pCmdBuffer)->probe_req_len - sizeof(tx_desc_fw);
+		}
+		break;
+	default:
+		break;
+	}
+
+	RT_TRACE(COMP_CMD, "FirmwareSetH2CCmd() HW_VAR_SET_TX_CMD: ElementID = %d, %d+%d=Cmd_Len = %d\n", ElementID, sizeof(H2C_SITESURVEY_PARA),((PH2C_SITESURVEY_PARA)pCmdBuffer)->probe_req_len, Cmd_Len);
+
+	{
+		Len = GetH2CCmdLen(MAX_TRANSMIT_BUFFER_SIZE, 1, &Cmd_Len);
+
+		RT_TRACE(COMP_CMD, "---------->%s(), cmdlen:%d,len:%d\n", __func__,Cmd_Len,Len);
+		skb  = dev_alloc_skb(Len); 
+		memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
+
+		pTcb = (cb_desc*)(skb->cb + MAX_DEV_ADDR_SIZE);
+		
+		FillH2CCmd(skb, MAX_TRANSMIT_BUFFER_SIZE, 1, &ElementID, &Cmd_Len, &pCmdBuffer, &priv->H2CTxCmdSeq);
+		
+
+		rtStatus = CmdSendPacket(dev, pTcb, skb, Len, DESC_PACKET_TYPE_NORMAL, false);
+		
+	}
+	
+	write_nic_byte(dev, TPPoll, TPPoll_CQ);
+
+	return RT_STATUS_SUCCESS;
+}
+
+
+void
+rtl8192se_set_scan_cmd(struct net_device *dev, u32 start_flag)
+{
+	struct r8192_priv   			*priv = rtllib_priv(dev);
+	H2C_SITESURVEY_PARA			*SiteSurveyPara;
+
+	if (!priv->scan_cmd) {
+		priv->scan_cmd = kmalloc(sizeof(H2C_SITESURVEY_PARA) +
+				RTL_MAX_SCAN_SIZE, GFP_KERNEL);
+		if (!priv->scan_cmd) {
+			printk("----------->%s() Error!!!\n", __func__);
+			return;
+		}
+	}
+
+	SiteSurveyPara = priv->scan_cmd;
+	memset(SiteSurveyPara, 0, sizeof(struct _H2C_SITESURVEY_PARA) + RTL_MAX_SCAN_SIZE);
+
+	if(start_flag){
+		struct sk_buff *skb = rtllib_probe_req(priv->rtllib);	
+		cb_desc *tcb_desc = (cb_desc *)(skb->cb + 8);
+
+
+		tcb_desc->queue_index = MGNT_QUEUE;
+		tcb_desc->data_rate = MgntQuery_MgntFrameTxRate(priv->rtllib);	
+		tcb_desc->RATRIndex = 7;
+		tcb_desc->bTxDisableRateFallBack = 1;
+		tcb_desc->bTxUseDriverAssingedRate = 1;
+	
+		
+		SiteSurveyPara->start_flag 	= start_flag;
+		SiteSurveyPara->probe_req_len 	= skb->len + sizeof(tx_desc_fw);
+	
+		SiteSurveyPara->desc.MacID 	= 0;
+		SiteSurveyPara->desc.TXHT		= (tcb_desc->data_rate&0x80)?1:0;	
+		SiteSurveyPara->desc.TxRate	= MRateToHwRate8192SE(dev,tcb_desc->data_rate);
+		SiteSurveyPara->desc.TxShort	= rtl8192se_QueryIsShort(((tcb_desc->data_rate&0x80)?1:0), MRateToHwRate8192SE(dev,tcb_desc->data_rate), tcb_desc);
+
+		SiteSurveyPara->desc.AggEn 	= 0;
+		SiteSurveyPara->desc.Seq 		= 0; 
+		SiteSurveyPara->desc.RTSEn	= (tcb_desc->bRTSEnable && tcb_desc->bCTSEnable==false)?1:0;				
+		SiteSurveyPara->desc.CTS2Self	= (tcb_desc->bCTSEnable)?1:0;		
+		SiteSurveyPara->desc.RTSSTBC	= (tcb_desc->bRTSSTBC)?1:0;
+		SiteSurveyPara->desc.RTSHT	= (tcb_desc->rts_rate&0x80)?1:0;
+		SiteSurveyPara->desc.RTSRate	= MRateToHwRate8192SE(dev,tcb_desc->rts_rate);
+		SiteSurveyPara->desc.RTSRate	= MRateToHwRate8192SE(dev,MGN_24M);
+		SiteSurveyPara->desc.RTSBW	= 0;
+		SiteSurveyPara->desc.RTSSC	= tcb_desc->RTSSC;
+		SiteSurveyPara->desc.RTSShort	= (SiteSurveyPara->desc.RTSHT==0)?(tcb_desc->bRTSUseShortPreamble?1:0):(tcb_desc->bRTSUseShortGI?1:0);
+
+		if(priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40){
+			if(tcb_desc->bPacketBW)	{
+				SiteSurveyPara->desc.TxBw = 1;
+				SiteSurveyPara->desc.TXSC	 = 0;
+			} else {				
+				SiteSurveyPara->desc.TxBw = 0;
+				SiteSurveyPara->desc.TXSC	 = priv->nCur40MhzPrimeSC;
+			}
+		} else {
+			SiteSurveyPara->desc.TxBw	= 0;
+			SiteSurveyPara->desc.TXSC		= 0;
+		}
+	
+		SiteSurveyPara->desc.LINIP 		= 0;
+		SiteSurveyPara->desc.Offset 		= 32;
+		SiteSurveyPara->desc.PktSize 		= (u16)skb->len;		
+	
+		SiteSurveyPara->desc.RaBRSRID 	= tcb_desc->RATRIndex;
+	
+		SiteSurveyPara->desc.PktID		= 0x0;		
+		SiteSurveyPara->desc.QueueSel		= rtl8192se_MapHwQueueToFirmwareQueue(tcb_desc->queue_index, tcb_desc->priority); 
+	
+		SiteSurveyPara->desc.DataRateFBLmt= 0x1F;		
+		SiteSurveyPara->desc.DISFB		= tcb_desc->bTxDisableRateFallBack;
+		SiteSurveyPara->desc.UserRate		= tcb_desc->bTxUseDriverAssingedRate;
+
+	
+		SiteSurveyPara->desc.FirstSeg		= 1;
+		SiteSurveyPara->desc.LastSeg		= 1;
+	
+		SiteSurveyPara->desc.TxBufferSize	= (u16)skb->len;	
+	
+		SiteSurveyPara->desc.OWN			= 1;
+
+
+		memcpy(&SiteSurveyPara->probe_req[0], skb->data, (u16)skb->len);
+
+		dev_kfree_skb_any(skb);
+	} else {
+		SiteSurveyPara->start_flag 	= start_flag;
+		SiteSurveyPara->probe_req_len 	= 0;
+	}
+	
+	FirmwareSetH2CCmd( dev ,FW_H2C_SITESURVEY, (u8*)SiteSurveyPara);
+}
+
+int rtl8192se_send_scan_cmd(struct net_device 	*dev, bool start)
+{
+	struct r8192_priv   *priv = rtllib_priv(dev);
+	
+	if(start){
+		priv->rtllib->scan_watch_dog =0;
+#if 0
+		queue_delayed_work_rsl(priv->priv_wq,&priv->hw_scan_simu_wq,0);
+#else
+		rtl8192se_set_scan_cmd(dev, start);
+#endif
+	} else {
+#if 0
+		rtl8192se_rx_surveydone_cmd(dev);
+#else
+		rtl8192se_set_scan_cmd(dev, start);
+#endif
+	}
+	return true;
+}
+#endif
+
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl8192s/r8192S_rtl6052.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl8192s/r8192S_rtl6052.c
@@ -0,0 +1,974 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+
+#ifdef RTL8192SE
+#include "../rtl_core.h"
+#include "../rtl_dm.h"
+#include "r8192S_phyreg.h"
+#include "r8192S_phy.h"
+#include "r8192S_rtl6052.h"
+
+/*---------------------------Define Local Constant---------------------------*/
+typedef struct RF_Shadow_Compare_Map {
+	u32		Value;
+	u8		Compare;
+	u8		ErrorOrNot;
+	u8		Recorver;
+	u8		Driver_Write;
+}RF_SHADOW_T;
+/*---------------------------Define Local Constant---------------------------*/
+
+
+/*------------------------Define global variable-----------------------------*/
+/*------------------------Define global variable-----------------------------*/
+
+
+
+
+/*---------------------Define local function prototype-----------------------*/
+void phy_RF6052_Config_HardCode(struct net_device* dev);
+
+bool phy_RF6052_Config_ParaFile(struct net_device* dev);
+/*---------------------Define local function prototype-----------------------*/
+
+/*------------------------Define function prototype--------------------------*/
+extern void RF_ChangeTxPath(struct net_device* dev,  u16 DataRate);
+
+/*------------------------Define function prototype--------------------------*/
+
+/*------------------------Define local variable------------------------------*/
+static	RF_SHADOW_T	RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG];
+/*------------------------Define local variable------------------------------*/
+
+/*------------------------Define function prototype--------------------------*/
+extern void RF_ChangeTxPath(struct net_device* dev,  u16 DataRate)
+{
+#if 0
+	static	u1Byte	RF_Path_Type = 2;	
+	static	u4Byte	tx_gain_tbl1[6] 
+			= {0x17f50, 0x11f40, 0x0cf30, 0x08720, 0x04310, 0x00100};
+	static	u4Byte	tx_gain_tbl2[6] 
+			= {0x15ea0, 0x10e90, 0x0c680, 0x08250, 0x04040, 0x00030};
+	u1Byte	i;
+	
+	if (RF_Path_Type == 2 && (DataRate&0xF) <= 0x7)
+	{
+		PHY_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A, 
+					RF_TXPA_G2, bMask20Bits, 0x0f000);
+		PHY_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A, 
+					RF_TXPA_G3, bMask20Bits, 0xeacf1);
+
+		for (i = 0; i < 6; i++)					
+			PHY_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A, 
+						RF_TX_AGC, bMask20Bits, tx_gain_tbl1[i]);
+
+		PHY_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A, 
+					RF_TXPA_G2, bMask20Bits, 0x01e39);
+	}
+	else if (RF_Path_Type == 1 && (DataRate&0xF) >= 0x8)
+	{
+		PHY_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A, 
+					RF_TXPA_G2, bMask20Bits, 0x04440);
+		PHY_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A, 
+					RF_TXPA_G3, bMask20Bits, 0xea4f1);
+
+		for (i = 0; i < 6; i++)
+			PHY_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A, 
+						RF_TX_AGC, bMask20Bits, tx_gain_tbl2[i]);
+
+		PHY_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A, 
+					RF_TXPA_G2, bMask20Bits, 0x01e19);
+	}
+#endif	
+	
+}	/* RF_ChangeTxPath */
+
+
+void PHY_RF6052SetBandwidth(struct net_device* dev, HT_CHANNEL_WIDTH Bandwidth)	
+{	
+	u8				eRFPath;	
+	struct r8192_priv 	*priv = rtllib_priv(dev);
+	
+
+	if (IS_HARDWARE_TYPE_8192SE(dev))
+	{		
+#if (RTL92SE_FPGA_VERIFY == 0)
+		switch(Bandwidth)
+		{
+			case HT_CHANNEL_WIDTH_20:
+#if 1
+				priv->RfRegChnlVal[0] = ((priv->RfRegChnlVal[0] & 0xfffff3ff) | 0x0400);
+				rtl8192_phy_SetRFReg(dev, RF90_PATH_A, RF_CHNLBW, bRFRegOffsetMask, priv->RfRegChnlVal[0]);
+#else
+				rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A, RF_CHNLBW, BIT10|BIT11, 0x01);
+#endif
+				break;
+			case HT_CHANNEL_WIDTH_20_40:
+#if 1
+				priv->RfRegChnlVal[0] = ((priv->RfRegChnlVal[0] & 0xfffff3ff));
+				rtl8192_phy_SetRFReg(dev, RF90_PATH_A, RF_CHNLBW, bRFRegOffsetMask, priv->RfRegChnlVal[0]);
+#else
+				rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A, RF_CHNLBW, BIT10|BIT11, 0x00);
+#endif
+				break;
+			default:
+				RT_TRACE(COMP_DBG, "PHY_SetRF6052Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth);
+				break;			
+		}
+#endif	
+	}
+	else
+	{
+		for(eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++)
+		{
+			switch(Bandwidth)
+			{
+				case HT_CHANNEL_WIDTH_20:
+					break;
+				case HT_CHANNEL_WIDTH_20_40:
+					break;
+				default:
+					RT_TRACE(COMP_DBG, "PHY_SetRF8225Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth );
+					break;
+					
+			}
+		}
+	}
+}
+
+
+extern void PHY_RF6052SetCckTxPower(struct net_device* dev, u8	powerlevel)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u32				TxAGC=0;
+	bool				dontIncCCKOrTurboScanOff=false;
+
+	if (((priv->eeprom_version >= 2) && (priv->TxPwrSafetyFlag == 1)) ||
+	     ((priv->eeprom_version >= 2) && (priv->EEPROMRegulatory != 0))) {
+		dontIncCCKOrTurboScanOff = true;
+	}
+
+	if(rtllib_act_scanning(priv->rtllib,true) == true){
+		TxAGC = 0x3f;
+
+		if(dontIncCCKOrTurboScanOff )
+			TxAGC = powerlevel;
+	} else {
+		TxAGC = powerlevel;
+
+		if(priv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1)
+			TxAGC = 0x10;
+		else if(priv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2)
+			TxAGC = 0x0;
+	}
+	
+	if(TxAGC > RF6052_MAX_TX_PWR)
+		TxAGC = RF6052_MAX_TX_PWR;
+
+	rtl8192_setBBreg(dev, rTxAGC_CCK_Mcs32, bTxAGCRateCCK, TxAGC);
+
+}	/* PHY_RF6052SetCckTxPower */
+
+
+#if 0
+extern void PHY_RF6052SetOFDMTxPower(struct net_device* dev, u8 powerlevel, u8 Channel)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u32 	writeVal, powerBase0, powerBase1;
+	u8 	index = 0;
+	u16 	RegOffset[6] = {0xe00, 0xe04, 0xe10, 0xe14, 0xe18, 0xe1c};
+	u8	rfa_pwr[4];
+	u8 	rfa_lower_bound = 0, rfa_upper_bound = 0;
+	u8	i;
+	u8	rf_pwr_diff = 0, chnlGroup = 0;
+	u8	Legacy_pwrdiff=0, HT20_pwrdiff=0;
+
+	if (priv->eeprom_version < 2)
+		powerBase0 = powerlevel + (priv->LegacyHTTxPowerDiff & 0xf); 
+	else if (priv->eeprom_version >= 2)	
+	{
+		Legacy_pwrdiff = priv->TxPwrLegacyHtDiff[RF90_PATH_A][Channel-1];
+		powerBase0 = powerlevel + Legacy_pwrdiff; 
+		RT_TRACE(COMP_POWER, " [LagacyToHT40 pwr diff = %d]\n", Legacy_pwrdiff);		
+		RT_TRACE(COMP_POWER, " [OFDM power base index = 0x%x]\n", powerBase0);
+	}
+	powerBase0 = (powerBase0<<24) | (powerBase0<<16) |(powerBase0<<8) |powerBase0;
+	
+	if(priv->eeprom_version >= 2)
+	{	
+	
+		if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
+		{
+			HT20_pwrdiff = priv->TxPwrHt20Diff[RF90_PATH_A][Channel-1];
+
+			if (HT20_pwrdiff < 8)	
+				powerlevel += HT20_pwrdiff;	
+			else				
+				powerlevel -= (16-HT20_pwrdiff);
+
+			RT_TRACE(COMP_POWER, " [HT20 to HT40 pwrdiff = %d]\n", HT20_pwrdiff);
+			RT_TRACE(COMP_POWER, " [MCS power base index = 0x%x]\n", powerlevel);
+		}
+	}
+	powerBase1 = powerlevel;							
+	powerBase1 = (powerBase1<<24) | (powerBase1<<16) |(powerBase1<<8) |powerBase1;
+
+	RT_TRACE(COMP_POWER, " [Legacy/HT power index= %x/%x]\n", powerBase0, powerBase1);
+	
+	for(index=0; index<6; index++)
+	{
+
+		if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40)
+		{
+			writeVal = ((index<2)?powerBase0:powerBase1);
+		}
+		else
+		{
+			if(priv->pwrGroupCnt == 0)
+				chnlGroup = 0;
+			if(priv->pwrGroupCnt >= 3)
+			{
+				if(Channel <= 3)
+					chnlGroup = 0;
+				else if(Channel >= 4 && Channel <= 9)
+					chnlGroup = 1;
+				else if(Channel >= 10)
+					chnlGroup = 2;
+				if(priv->pwrGroupCnt == 4)
+					chnlGroup ++;
+			}
+		else
+				chnlGroup = 0;
+			writeVal = priv->MCSTxPowerLevelOriginalOffset[chnlGroup][index] + 
+					((index<2)?powerBase0:powerBase1);
+		}
+		RT_TRACE(COMP_POWER, "Reg 0x%x, chnlGroup = %d, Original=%x writeVal=%x\n", 
+			RegOffset[index], chnlGroup, priv->MCSTxPowerLevelOriginalOffset[chnlGroup][index], 
+			writeVal);
+
+		if (priv->rf_type == RF_2T2R)
+		{			
+			rf_pwr_diff = priv->AntennaTxPwDiff[0];
+			RT_TRACE(COMP_POWER, "2T2R RF-B to RF-A PWR DIFF=%d\n", rf_pwr_diff);
+
+			if (rf_pwr_diff >= 8)		
+			{	
+				rfa_lower_bound = 0x10-rf_pwr_diff;
+				RT_TRACE(COMP_POWER, "rfa_lower_bound= %d\n", rfa_lower_bound);
+			}
+			else if (rf_pwr_diff >= 0)	
+			{
+				rfa_upper_bound = RF6052_MAX_TX_PWR-rf_pwr_diff;
+				RT_TRACE(COMP_POWER, "rfa_upper_bound= %d\n", rfa_upper_bound);
+			}			
+		}
+
+		for (i=  0; i <4; i++)
+		{
+			rfa_pwr[i] = (u8)((writeVal & (0x7f<<(i*8)))>>(i*8));
+			if (rfa_pwr[i]  > RF6052_MAX_TX_PWR)
+				rfa_pwr[i]  = RF6052_MAX_TX_PWR;
+
+			if (priv->rf_type == RF_2T2R)
+			{
+				if (rf_pwr_diff >= 8)		
+				{	
+					if (rfa_pwr[i] <rfa_lower_bound)
+					{
+						RT_TRACE(COMP_POWER, "Underflow");
+						rfa_pwr[i] = rfa_lower_bound;
+					}
+				}
+				else if (rf_pwr_diff >= 1)	
+				{	
+					if (rfa_pwr[i] > rfa_upper_bound)
+					{
+						RT_TRACE(COMP_POWER, "Overflow");
+						rfa_pwr[i] = rfa_upper_bound;
+					}
+				}
+				RT_TRACE(COMP_POWER, "rfa_pwr[%d]=%x\n", i, rfa_pwr[i]);
+			}
+
+		}
+
+#if 1
+		writeVal = (rfa_pwr[3]<<24) | (rfa_pwr[2]<<16) |(rfa_pwr[1]<<8) |rfa_pwr[0];
+		RT_TRACE(COMP_POWER, "WritePower=%08x\n", writeVal);
+#else
+		if(priv->bDynamicTxHighPower == true)     
+		{	
+			if(index > 1)	
+			{
+				writeVal = 0x03030303;
+			}
+			else
+			{
+				writeVal = (rfa_pwr[3]<<24) | (rfa_pwr[2]<<16) |(rfa_pwr[1]<<8) |rfa_pwr[0];
+			}
+			RT_TRACE(COMP_POWER, "HighPower=%08x\n", writeVal);
+		}
+		else
+		{
+			writeVal = (rfa_pwr[3]<<24) | (rfa_pwr[2]<<16) |(rfa_pwr[1]<<8) |rfa_pwr[0];
+			RT_TRACE(COMP_POWER, "NormalPower=%08x\n", writeVal);
+		}
+#endif
+		rtl8192_setBBreg(dev, RegOffset[index], 0x7f7f7f7f, writeVal);
+	}
+
+}	/* PHY_RF6052SetOFDMTxPower */
+#endif
+
+void getPowerBase(
+	struct net_device* dev,
+	u8*		pPowerLevel,
+	u8		Channel,
+	u32*	OfdmBase,
+	u32*	MCSBase,
+	u8*		pFinalPowerIndex
+	)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u32			powerBase0, powerBase1;
+	u8			Legacy_pwrdiff=0, HT20_pwrdiff=0;
+	u8			i, powerlevel[4];
+	
+	for(i=0; i<2; i++)
+		powerlevel[i] = pPowerLevel[i];
+	if (priv->eeprom_version < 2)
+		powerBase0 = powerlevel[0] + (priv->LegacyHTTxPowerDiff & 0xf); 
+	else if (priv->eeprom_version >= 2)
+	{
+		Legacy_pwrdiff = priv->TxPwrLegacyHtDiff[RF90_PATH_A][Channel-1];
+		powerBase0 = powerlevel[0] + Legacy_pwrdiff; 
+	}
+	powerBase0 = (powerBase0<<24) | (powerBase0<<16) |(powerBase0<<8) |powerBase0;
+	*OfdmBase = powerBase0;
+	RT_TRACE(COMP_POWER, " [OFDM power base index = 0x%x]\n", powerBase0);
+	
+	if(priv->eeprom_version >= 2)
+	{
+		if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
+		{
+			for(i=0; i<2; i++)	
+			{	
+				HT20_pwrdiff = priv->TxPwrHt20Diff[i][Channel-1];
+				if (HT20_pwrdiff < 8)	
+					powerlevel[i] += HT20_pwrdiff;	
+				else				
+					powerlevel[i] -= (16-HT20_pwrdiff);
+			}
+		}
+	}
+	powerBase1 = powerlevel[0];	
+	powerBase1 = (powerBase1<<24) | (powerBase1<<16) |(powerBase1<<8) |powerBase1;
+	*MCSBase = powerBase1;
+	
+	RT_TRACE(COMP_POWER, " [MCS power base index = 0x%x]\n", powerBase1);
+
+	pFinalPowerIndex[0] = powerlevel[0];
+	pFinalPowerIndex[1] = powerlevel[1];
+	switch(priv->EEPROMRegulatory)
+	{
+		case 3:
+			if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40)
+			{
+				pFinalPowerIndex[0] += priv->PwrGroupHT40[RF90_PATH_A][Channel-1];
+				pFinalPowerIndex[1] += priv->PwrGroupHT40[RF90_PATH_B][Channel-1];
+			}
+			else
+			{
+				pFinalPowerIndex[0] += priv->PwrGroupHT20[RF90_PATH_A][Channel-1];
+				pFinalPowerIndex[1] += priv->PwrGroupHT20[RF90_PATH_B][Channel-1];
+			}
+			break;
+		default:
+			break;
+	}
+	if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40)
+	{
+		RT_TRACE(COMP_POWER, "40MHz finalPowerIndex (A / B) = 0x%x / 0x%x\n", 
+			pFinalPowerIndex[0], pFinalPowerIndex[1]);
+	}
+	else
+	{
+		RT_TRACE(COMP_POWER, "20MHz finalPowerIndex (A / B) = 0x%x / 0x%x\n", 
+			pFinalPowerIndex[0], pFinalPowerIndex[1]);
+	}
+}
+
+void getTxPowerWriteValByRegulatory(
+	struct net_device* dev,
+	u8		Channel,
+	u8		index,
+	u32		powerBase0,
+	u32		powerBase1,
+	u32*	pOutWriteVal
+	)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u8		i, chnlGroup, pwr_diff_limit[4];
+	u32 		writeVal, customer_limit;
+	
+	switch(priv->EEPROMRegulatory)
+	{
+		case 0:	
+			chnlGroup = 0;
+			RT_TRACE(COMP_POWER,"MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", 
+				chnlGroup, index, priv->MCSTxPowerLevelOriginalOffset[chnlGroup][index]);
+			writeVal = priv->MCSTxPowerLevelOriginalOffset[chnlGroup][index] + 
+				((index<2)?powerBase0:powerBase1);
+			RT_TRACE(COMP_POWER,"RTK better performance, writeVal = 0x%x\n", writeVal);
+			break;
+		case 1:	
+			if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40)
+			{
+				writeVal = ((index<2)?powerBase0:powerBase1);
+				RT_TRACE(COMP_POWER,"Realtek regulatory, 40MHz, writeVal = 0x%x\n", writeVal);
+			}
+			else
+			{
+				if(priv->pwrGroupCnt == 1)
+					chnlGroup = 0;
+				if(priv->pwrGroupCnt >= 3)
+				{
+					if(Channel <= 3)
+						chnlGroup = 0;
+					else if(Channel >= 4 && Channel <= 8)
+						chnlGroup = 1;
+					else if(Channel > 8)
+						chnlGroup = 2;
+					if(priv->pwrGroupCnt == 4)
+						chnlGroup++;
+				}
+				RT_TRACE(COMP_POWER,"MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", 
+				chnlGroup, index, priv->MCSTxPowerLevelOriginalOffset[chnlGroup][index]);
+				writeVal = priv->MCSTxPowerLevelOriginalOffset[chnlGroup][index] + 
+						((index<2)?powerBase0:powerBase1);
+				RT_TRACE(COMP_POWER,"Realtek regulatory, 20MHz, writeVal = 0x%x\n", writeVal);
+			}
+			break;
+		case 2:	
+			writeVal = ((index<2)?powerBase0:powerBase1);
+			RT_TRACE(COMP_POWER,"Better regulatory, writeVal = 0x%x\n", writeVal);
+			break;
+		case 3:	
+			chnlGroup = 0;
+			RT_TRACE(COMP_POWER,"MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", 
+				chnlGroup, index, priv->MCSTxPowerLevelOriginalOffset[chnlGroup][index]);
+
+			if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40)
+			{
+				RT_TRACE(COMP_POWER,"customer's limit, 40MHz = 0x%x\n", 
+					priv->PwrGroupHT40[RF90_PATH_A][Channel-1]);
+			}
+			else
+			{
+				RT_TRACE(COMP_POWER,"customer's limit, 20MHz = 0x%x\n", 
+					priv->PwrGroupHT20[RF90_PATH_A][Channel-1]);
+			}
+			for (i=0; i<4; i++)
+			{
+				pwr_diff_limit[i] = (u8)((priv->MCSTxPowerLevelOriginalOffset[chnlGroup][index]&(0x7f<<(i*8)))>>(i*8));
+				if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40)
+				{
+					if(pwr_diff_limit[i] > priv->PwrGroupHT40[RF90_PATH_A][Channel-1])
+					{
+						pwr_diff_limit[i] = priv->PwrGroupHT40[RF90_PATH_A][Channel-1];
+					}
+				}
+				else
+				{
+					if(pwr_diff_limit[i] > priv->PwrGroupHT20[RF90_PATH_A][Channel-1])
+					{
+						pwr_diff_limit[i] = priv->PwrGroupHT20[RF90_PATH_A][Channel-1];
+					}
+				}
+			}
+			customer_limit = (pwr_diff_limit[3]<<24) | (pwr_diff_limit[2]<<16) |
+							(pwr_diff_limit[1]<<8) | (pwr_diff_limit[0]);
+			RT_TRACE(COMP_POWER,"Customer's limit = 0x%x\n", customer_limit);
+
+			writeVal = customer_limit + ((index<2)?powerBase0:powerBase1);
+			RT_TRACE(COMP_POWER,"Customer, writeVal = 0x%x\n", writeVal);
+			break;
+		default:
+			chnlGroup = 0;
+			writeVal = priv->MCSTxPowerLevelOriginalOffset[chnlGroup][index] + 
+				((index<2)?powerBase0:powerBase1);
+			RT_TRACE(COMP_POWER,"RTK better performance, writeVal = 0x%x\n", writeVal);
+			break;
+	}
+
+	if(priv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1)
+		writeVal = 0x10101010;
+	else if(priv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2)
+		writeVal = 0x0;
+
+	*pOutWriteVal = writeVal;
+
+}
+
+void setAntennaDiff(
+	struct net_device* dev,
+	u8*		pFinalPowerIndex
+	)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	char	ant_pwr_diff=0;
+	u32	u4RegValue=0;
+
+	if (priv->rf_type == RF_2T2R)
+	{
+		ant_pwr_diff = pFinalPowerIndex[1] - pFinalPowerIndex[0];
+		
+		if(ant_pwr_diff > 7)
+			ant_pwr_diff = 7;
+		if(ant_pwr_diff < -8)
+			ant_pwr_diff = -8;
+		RT_TRACE(COMP_POWER,"Antenna Diff from RF-B to RF-A = %d (0x%x)\n", 
+			ant_pwr_diff, ant_pwr_diff&0xf);
+		ant_pwr_diff &= 0xf;
+	}
+	priv->AntennaTxPwDiff[2] = 0;
+	priv->AntennaTxPwDiff[1] = 0;
+	priv->AntennaTxPwDiff[0] = (u8)(ant_pwr_diff);		
+
+	u4RegValue = (priv->AntennaTxPwDiff[2]<<8 | 
+				priv->AntennaTxPwDiff[1]<<4 | 
+				priv->AntennaTxPwDiff[0]	);
+
+	rtl8192_setBBreg(dev, rFPGA0_TxGainStage, 
+		(bXBTxAGC|bXCTxAGC|bXDTxAGC), u4RegValue);
+
+	RT_TRACE(COMP_POWER,"Write BCD-Diff(0x%x) = 0x%x\n", 
+		rFPGA0_TxGainStage, u4RegValue);
+}
+
+void writeOFDMPowerReg(
+	struct net_device* dev,
+	u8		index,
+	u32		Value
+	)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u16 RegOffset[6] = {0xe00, 0xe04, 0xe10, 0xe14, 0xe18, 0xe1c};
+	u8 i, rfa_pwr[4];
+	u8 rfa_lower_bound = 0, rfa_upper_bound = 0, rf_pwr_diff = 0;
+	u32 writeVal=Value;
+	if (priv->rf_type == RF_2T2R)
+	{			
+		rf_pwr_diff = priv->AntennaTxPwDiff[0];
+
+		if (rf_pwr_diff >= 8)		
+		{	
+			rfa_lower_bound = 0x10-rf_pwr_diff;
+			RT_TRACE(COMP_POWER,"rfa_lower_bound= %d\n", rfa_lower_bound);
+		}
+		else
+		{
+			rfa_upper_bound = RF6052_MAX_TX_PWR-rf_pwr_diff;
+			RT_TRACE(COMP_POWER,"rfa_upper_bound= %d\n", rfa_upper_bound);
+		}			
+	}
+
+	for (i=0; i<4; i++)
+	{
+		rfa_pwr[i] = (u8)((writeVal & (0x7f<<(i*8)))>>(i*8));
+		if (rfa_pwr[i]  > RF6052_MAX_TX_PWR)
+			rfa_pwr[i]  = RF6052_MAX_TX_PWR;
+
+		if (priv->rf_type == RF_2T2R)
+		{
+			if (rf_pwr_diff >= 8)		
+			{	
+				if (rfa_pwr[i] <rfa_lower_bound)
+				{
+					RT_TRACE(COMP_POWER,"Underflow");
+					rfa_pwr[i] = rfa_lower_bound;
+				}
+			}
+			else if (rf_pwr_diff >= 1)	
+			{	
+				if (rfa_pwr[i] > rfa_upper_bound)
+				{
+					RT_TRACE(COMP_POWER,"Overflow");
+					rfa_pwr[i] = rfa_upper_bound;
+				}
+			}
+			RT_TRACE(COMP_POWER,"rfa_pwr[%d]=%x\n", i, rfa_pwr[i]);
+		}
+
+	}
+
+	writeVal = (rfa_pwr[3]<<24) | (rfa_pwr[2]<<16) |(rfa_pwr[1]<<8) |rfa_pwr[0];
+
+	rtl8192_setBBreg(dev, RegOffset[index], 0x7f7f7f7f, writeVal);
+	RT_TRACE(COMP_POWER,"Set 0x%x = %08x\n",RegOffset[index], writeVal);
+}
+
+/*-----------------------------------------------------------------------------
+ * Function:	PHY_RF6052SetOFDMTxPower
+ *
+ * Overview:	For legacy and HY OFDM, we must read EEPROM TX power index for 
+ *			different channel and read original value in TX power register area from
+ *			0xe00. We increase offset and original value to be correct tx pwr.
+ *
+ * Input:       NONE
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 11/05/2008 	MHC		Simulate 8192 series method.
+ * 01/06/2009	MHC		1. Prevent Path B tx power overflow or underflow dure to
+ *						A/B pwr difference or legacy/HT pwr diff.
+ *						2. We concern with path B legacy/HT OFDM difference.
+ * 01/22/2009	MHC		Support new EPRO format from SD3.
+ *
+ *---------------------------------------------------------------------------*/
+extern	void 
+PHY_RF6052SetOFDMTxPower(struct net_device* dev, u8* pPowerLevel, u8 Channel)
+{
+	u32 writeVal, powerBase0, powerBase1;
+	u8 index = 0;
+	u8 finalPowerIndex[4];
+
+	getPowerBase(dev, pPowerLevel, Channel, &powerBase0, &powerBase1, &finalPowerIndex[0]);
+	setAntennaDiff(dev, &finalPowerIndex[0]	);
+	
+	for(index=0; index<6; index++)
+	{
+		getTxPowerWriteValByRegulatory(dev, Channel, index, 
+			powerBase0, powerBase1, &writeVal);
+
+		writeOFDMPowerReg(dev, index, writeVal);
+	}
+}
+
+bool PHY_RF6052_Config(struct net_device* dev)
+{
+	struct r8192_priv 			*priv = rtllib_priv(dev);
+	bool rtStatus = true;	
+	u8 bRegHwParaFile = 1;
+	
+	if(priv->rf_type == RF_1T1R)
+		priv->NumTotalRFPath = 1;
+	else
+	priv->NumTotalRFPath = 2;
+
+	switch(bRegHwParaFile)
+	{
+		case 0:
+			phy_RF6052_Config_HardCode(dev);
+			break;
+
+		case 1:
+			rtStatus = phy_RF6052_Config_ParaFile(dev);
+			break;
+
+		case 2:
+			phy_RF6052_Config_HardCode(dev);
+			phy_RF6052_Config_ParaFile(dev);
+			break;
+
+		default:
+			phy_RF6052_Config_HardCode(dev);
+			break;
+	}
+	return rtStatus;
+		
+}
+
+void phy_RF6052_Config_HardCode(struct net_device* dev)
+{
+	
+
+	
+}
+
+bool phy_RF6052_Config_ParaFile(struct net_device* dev)
+{
+	u32			u4RegValue = 0;
+	u8			eRFPath;
+	bool rtStatus = true;
+	struct r8192_priv 	*priv = rtllib_priv(dev);
+	BB_REGISTER_DEFINITION_T	*pPhyReg;	
+
+
+	for(eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++)
+	{
+
+		pPhyReg = &priv->PHYRegDef[eRFPath];
+		
+		switch(eRFPath)
+		{
+		case RF90_PATH_A:
+		case RF90_PATH_C:
+			u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs, bRFSI_RFENV);
+			break;
+		case RF90_PATH_B :
+		case RF90_PATH_D:
+			u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs, bRFSI_RFENV<<16);
+			break;
+		}
+
+		rtl8192_setBBreg(dev, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1);
+		
+		rtl8192_setBBreg(dev, pPhyReg->rfintfo, bRFSI_RFENV, 0x1);
+
+		rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); 	
+		rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0);	
+
+
+		switch(eRFPath)
+		{
+		case RF90_PATH_A:
+#if	RTL8190_Download_Firmware_From_Header
+			rtStatus= rtl8192_phy_ConfigRFWithHeaderFile(dev,(RF90_RADIO_PATH_E)eRFPath);
+#else
+			rtStatus = PHY_ConfigRFWithParaFile(dev, (char* )&szRadioAFile, (RF90_RADIO_PATH_E)eRFPath);
+#endif
+			break;
+		case RF90_PATH_B:
+#if	RTL8190_Download_Firmware_From_Header
+			rtStatus= rtl8192_phy_ConfigRFWithHeaderFile(dev,(RF90_RADIO_PATH_E)eRFPath);
+#else
+			if(priv->rf_type == RF_2T2R_GREEN)
+				rtStatus = PHY_ConfigRFWithParaFile(dev, (char *)&szRadioBGMFile, (RF90_RADIO_PATH_E)eRFPath);
+			else
+				rtStatus = PHY_ConfigRFWithParaFile(dev, (char* )&szRadioBFile, (RF90_RADIO_PATH_E)eRFPath);
+#endif
+			break;
+		case RF90_PATH_C:
+			break;
+		case RF90_PATH_D:
+			break;
+		}
+
+		switch(eRFPath)
+		{
+		case RF90_PATH_A:
+		case RF90_PATH_C:
+			rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue);
+			break;
+		case RF90_PATH_B :
+		case RF90_PATH_D:
+			rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue);
+			break;
+		}
+
+		if(rtStatus != true){
+			printk("phy_RF6052_Config_ParaFile():Radio[%d] Fail!!", eRFPath);
+			goto phy_RF6052_Config_ParaFile_Fail;
+		}
+
+	}
+
+	RT_TRACE(COMP_INIT, "<---phy_RF6052_Config_ParaFile()\n");
+	return rtStatus;
+	
+phy_RF6052_Config_ParaFile_Fail:	
+	return rtStatus;
+}
+
+
+extern u32 PHY_RFShadowRead(
+	struct net_device		* dev,
+	RF90_RADIO_PATH_E	eRFPath,
+	u32					Offset)
+{
+	return	RF_Shadow[eRFPath][Offset].Value;
+	
+}	/* PHY_RFShadowRead */
+
+
+extern void PHY_RFShadowWrite(
+	struct net_device		* dev,
+	RF90_RADIO_PATH_E	eRFPath,
+	u32					Offset,
+	u32					Data)
+{
+	RF_Shadow[eRFPath][Offset].Value = (Data & bMask20Bits);
+	RF_Shadow[eRFPath][Offset].Driver_Write = true;
+	
+}	/* PHY_RFShadowWrite */
+
+
+extern bool PHY_RFShadowCompare(
+	struct net_device		* dev,
+	RF90_RADIO_PATH_E	eRFPath,
+	u32					Offset)
+{
+	u32	reg;
+	
+	if (RF_Shadow[eRFPath][Offset].Compare == true)
+	{
+		reg = rtl8192_phy_QueryRFReg(dev, eRFPath, Offset, bMask20Bits);
+		if (RF_Shadow[eRFPath][Offset].Value != reg)
+		{
+			RF_Shadow[eRFPath][Offset].ErrorOrNot = true;
+			RT_TRACE(COMP_INIT, "PHY_RFShadowCompare RF-%d Addr%02xErr = %05x", eRFPath, Offset, reg);
+		}
+		else
+		{
+			RT_TRACE(COMP_INIT, "PHY_RFShadowCompare RF-%d Addr%02x Err = %05x return false\n", eRFPath, Offset, reg);
+			RF_Shadow[eRFPath][Offset].ErrorOrNot = false;
+		}
+		return RF_Shadow[eRFPath][Offset].ErrorOrNot;
+	}
+	return false;
+}	/* PHY_RFShadowCompare */
+
+extern void PHY_RFShadowRecorver(
+	struct net_device		* dev,
+	RF90_RADIO_PATH_E	eRFPath,
+	u32					Offset)
+{
+	if (RF_Shadow[eRFPath][Offset].ErrorOrNot == true)
+	{
+		if (RF_Shadow[eRFPath][Offset].Recorver == true)
+		{
+			rtl8192_phy_SetRFReg(dev, eRFPath, Offset, bMask20Bits, RF_Shadow[eRFPath][Offset].Value);
+			RT_TRACE(COMP_INIT, "PHY_RFShadowRecorver RF-%d Addr%02x=%05x", 
+			eRFPath, Offset, RF_Shadow[eRFPath][Offset].Value);
+		}
+	}
+	
+}	/* PHY_RFShadowRecorver */
+
+
+extern void PHY_RFShadowCompareAll(struct net_device * dev)
+{
+	u32		eRFPath;
+	u32		Offset;
+
+	for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++)
+	{
+		for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++)
+		{
+			PHY_RFShadowCompare(dev, (RF90_RADIO_PATH_E)eRFPath, Offset);
+		}
+	}
+	
+}	/* PHY_RFShadowCompareAll */
+
+
+extern void PHY_RFShadowRecorverAll(struct net_device * dev)
+{
+	u32		eRFPath;
+	u32		Offset;
+
+	for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++)
+	{
+		for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++)
+		{
+			PHY_RFShadowRecorver(dev, (RF90_RADIO_PATH_E)eRFPath, Offset);
+		}
+	}
+	
+}	/* PHY_RFShadowRecorverAll */
+
+
+extern void PHY_RFShadowCompareFlagSet(
+	struct net_device 		* dev,
+	RF90_RADIO_PATH_E	eRFPath,
+	u32					Offset,
+	u8					Type)
+{
+	RF_Shadow[eRFPath][Offset].Compare = Type;
+		
+}	/* PHY_RFShadowCompareFlagSet */
+
+
+extern void PHY_RFShadowRecorverFlagSet(
+	struct net_device 		* dev,
+	RF90_RADIO_PATH_E	eRFPath,
+	u32					Offset,
+	u8					Type)
+{
+	RF_Shadow[eRFPath][Offset].Recorver= Type;
+		
+}	/* PHY_RFShadowRecorverFlagSet */
+
+
+extern void PHY_RFShadowCompareFlagSetAll(struct net_device  * dev)
+{
+	u32		eRFPath;
+	u32		Offset;
+
+	for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++)
+	{
+		for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++)
+		{
+			if (Offset != 0x26 && Offset != 0x27)
+				PHY_RFShadowCompareFlagSet(dev, (RF90_RADIO_PATH_E)eRFPath, Offset, false);
+			else
+				PHY_RFShadowCompareFlagSet(dev, (RF90_RADIO_PATH_E)eRFPath, Offset, true);
+		}
+	}
+		
+}	/* PHY_RFShadowCompareFlagSetAll */
+
+
+extern void PHY_RFShadowRecorverFlagSetAll(struct net_device  * dev)
+{
+	u32		eRFPath;
+	u32		Offset;
+
+	for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++)
+	{
+		for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++)
+		{
+			if (Offset != 0x26 && Offset != 0x27)
+				PHY_RFShadowRecorverFlagSet(dev, (RF90_RADIO_PATH_E)eRFPath, Offset, false);
+			else
+				PHY_RFShadowRecorverFlagSet(dev, (RF90_RADIO_PATH_E)eRFPath, Offset, true);
+		}
+	}
+		
+}	/* PHY_RFShadowCompareFlagSetAll */
+
+
+
+extern void PHY_RFShadowRefresh(struct net_device  * dev)
+{
+	u32		eRFPath;
+	u32		Offset;
+
+	for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++)
+	{
+		for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++)
+		{
+			RF_Shadow[eRFPath][Offset].Value = 0;
+			RF_Shadow[eRFPath][Offset].Compare = false;
+			RF_Shadow[eRFPath][Offset].Recorver  = false;
+			RF_Shadow[eRFPath][Offset].ErrorOrNot = false;
+			RF_Shadow[eRFPath][Offset].Driver_Write = false;
+		}
+	}
+	
+}	/* PHY_RFShadowRead */
+
+/* End of HalRf6052.c */
+
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl8192s/r8192S_phy.c
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl8192s/r8192S_phy.c
@@ -0,0 +1,3464 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+#ifdef RTL8192SE
+
+#include "../rtl_core.h"
+#include "../rtl_dm.h"
+#include "r8192S_phy.h"
+#include "r8192S_phyreg.h"
+#include "r8192S_rtl6052.h"
+#include "r8192S_hwimg.h"
+
+#ifdef ENABLE_DOT11D
+#include "../rtllib/dot11d.h"
+#endif
+
+/*---------------------------Define Local Constant---------------------------*/
+#define MAX_PRECMD_CNT 16
+#define MAX_RFDEPENDCMD_CNT 16
+#define MAX_POSTCMD_CNT 16
+
+#define MAX_DOZE_WAITING_TIMES_9x 64
+
+#define	PHY_STOP_SWITCH_CLKREQ			0
+/*---------------------------Define Local Constant---------------------------*/
+
+/*------------------------Define global variable-----------------------------*/
+
+#define Rtl819XMAC_Array			Rtl8192SEMAC_2T_Array
+#define Rtl819XAGCTAB_Array			Rtl8192SEAGCTAB_Array
+#define Rtl819XPHY_REG_Array			Rtl8192SEPHY_REG_2T2RArray
+#define Rtl819XPHY_REG_to1T1R_Array 		Rtl8192SEPHY_ChangeTo_1T1RArray
+#define Rtl819XPHY_REG_to1T2R_Array		Rtl8192SEPHY_ChangeTo_1T2RArray
+#define Rtl819XPHY_REG_to2T2R_Array		Rtl8192SEPHY_ChangeTo_2T2RArray
+#define Rtl819XPHY_REG_Array_PG			Rtl8192SEPHY_REG_Array_PG
+#define Rtl819XRadioA_Array			Rtl8192SERadioA_1T_Array
+#define Rtl819XRadioB_Array			Rtl8192SERadioB_Array
+#define Rtl819XRadioB_GM_Array					Rtl8192SERadioB_GM_Array
+#define Rtl819XRadioA_to1T_Array		Rtl8192SERadioA_to1T_Array
+#define Rtl819XRadioA_to2T_Array		Rtl8192SERadioA_to2T_Array
+
+/*------------------------Define local variable------------------------------*/
+#if 0
+static u32	RF_CHANNEL_TABLE_ZEBRA[]={
+		0,
+		0x085c,
+		0x08dc,
+		0x095c,
+		0x09dc,
+		0x0a5c,
+		0x0adc,
+		0x0b5c,
+		0x0bdc,
+		0x0c5c,
+		0x0cdc,
+		0x0d5c,
+		0x0ddc,
+		0x0e5c,
+		0x0f72,
+};
+#endif
+
+/*------------------------Define local variable------------------------------*/
+
+
+/*--------------------Define export function prototype-----------------------*/
+/*--------------------Define export function prototype-----------------------*/
+
+
+/*---------------------Define local function prototype-----------------------*/
+
+static  u32 phy_FwRFSerialRead( struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 Offset); 
+static	void phy_FwRFSerialWrite( struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 Offset, u32 Data);
+
+static u32 phy_RFSerialRead(struct net_device* dev,RF90_RADIO_PATH_E eRFPath,u32 Offset);
+static void phy_RFSerialWrite( struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 Offset, u32 Data);
+static	u32 phy_CalculateBitShift(u32 BitMask);
+static	bool	phy_BB8190_Config_HardCode(struct net_device* dev);
+static	bool	phy_BB8192S_Config_ParaFile(struct net_device* dev);
+	
+static bool phy_ConfigMACWithHeaderFile(struct net_device* dev);
+	
+static bool phy_ConfigBBWithHeaderFile(struct net_device* dev,u8 ConfigType);
+
+static bool phy_ConfigBBWithPgHeaderFile(struct net_device* dev,u8 ConfigType);
+
+static bool phy_SetBBtoDiffRFWithHeaderFile(struct net_device* dev,u8 ConfigType);
+
+static void phy_InitBBRFRegisterDefinition(struct net_device* dev);
+static bool phy_SetSwChnlCmdArray(	SwChnlCmd*		CmdTable,
+		u32			CmdTableIdx,
+		u32			CmdTableSz,
+		SwChnlCmdID		CmdID,
+		u32			Para1,
+		u32			Para2,
+		u32			msDelay	);
+
+static bool phy_SwChnlStepByStep(
+	struct net_device* dev,
+	u8		channel,
+	u8		*stage,
+	u8		*step,
+	u32		*delay
+	);
+
+static void phy_FinishSwChnlNow(struct net_device* dev,u8 channel);
+
+static u8 phy_DbmToTxPwrIdx( struct net_device* dev, WIRELESS_MODE WirelessMode, long PowerInDbm);
+static bool phy_SetRFPowerState8192SE(struct net_device* dev,RT_RF_POWER_STATE eRFPowerState);
+static void phy_CheckEphySwitchReady( struct net_device* dev);
+
+static long phy_TxPwrIdxToDbm( struct net_device* dev, WIRELESS_MODE   WirelessMode, u8 TxPwrIdx);
+void rtl8192_SetFwCmdIOCallback(struct net_device* dev);
+
+						
+/*---------------------Define local function prototype-----------------------*/
+
+
+/*----------------------------Function Body----------------------------------*/
+u32 rtl8192_QueryBBReg(struct net_device* dev, u32 RegAddr, u32 BitMask)
+{
+
+  	u32	ReturnValue = 0, OriginalValue, BitShift;
+
+#if (DISABLE_BB_RF == 1)
+	return 0;
+#endif
+
+	RT_TRACE(COMP_RF, "--->PHY_QueryBBReg(): RegAddr(%#x), BitMask(%#x)\n", RegAddr, BitMask);
+
+	OriginalValue = read_nic_dword(dev, RegAddr);
+
+	BitShift = phy_CalculateBitShift(BitMask);
+	ReturnValue = (OriginalValue & BitMask) >> BitShift;
+
+	RT_TRACE(COMP_RF, "<---PHY_QueryBBReg(): RegAddr(%#x), BitMask(%#x), OriginalValue(%#x)\n", RegAddr, BitMask, OriginalValue);
+	return (ReturnValue);
+}
+
+void rtl8192_setBBreg(struct net_device* dev, u32 RegAddr, u32 BitMask, u32 Data)
+{
+	u32	OriginalValue, BitShift, NewValue;
+
+#if (DISABLE_BB_RF == 1)
+	return;
+#endif
+
+
+	{
+		if(BitMask!= bMaskDWord)
+		{
+			OriginalValue = read_nic_dword(dev, RegAddr);
+			BitShift = phy_CalculateBitShift(BitMask);
+			NewValue = (((OriginalValue) & (~BitMask)) | (Data << BitShift));
+			write_nic_dword(dev, RegAddr, NewValue);	
+		}else
+			write_nic_dword(dev, RegAddr, Data);	
+	}
+
+	return;
+}
+
+
+u32 rtl8192_phy_QueryRFReg(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 RegAddr, u32 BitMask)
+{
+	u32 Original_Value, Readback_Value, BitShift;
+	struct r8192_priv *priv = rtllib_priv(dev);
+        unsigned long flags;
+	
+#if (DISABLE_BB_RF == 1) 
+	return 0;
+#endif
+	
+	RT_TRACE(COMP_RF, "--->PHY_QueryRFReg(): RegAddr(%#x), eRFPath(%#x), BitMask(%#x)\n", RegAddr, eRFPath,BitMask);
+	
+	if (!((priv->rf_pathmap >> eRFPath) & 0x1))
+		return 0;
+	
+	if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath))
+		return	0;
+	
+	spin_lock_irqsave(&priv->rf_lock, flags);	
+	if (priv->Rf_Mode == RF_OP_By_FW)
+	{	
+		Original_Value = phy_FwRFSerialRead(dev, eRFPath, RegAddr);
+	}
+	else
+	{	
+		Original_Value = phy_RFSerialRead(dev, eRFPath, RegAddr);	   	
+	}
+	
+	BitShift =  phy_CalculateBitShift(BitMask);
+	Readback_Value = (Original_Value & BitMask) >> BitShift;	
+	spin_unlock_irqrestore(&priv->rf_lock, flags);
+
+	
+	return (Readback_Value);
+}
+
+
+void rtl8192_phy_SetRFReg(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 RegAddr, u32 BitMask, u32 Data)
+{
+
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u32 Original_Value, BitShift, New_Value;
+        unsigned long flags;
+#if (DISABLE_BB_RF == 1)
+	return;
+#endif
+	
+	RT_TRACE(COMP_RF, "--->PHY_SetRFReg(): RegAddr(%#x), BitMask(%#x), Data(%#x), eRFPath(%#x)\n", 
+		RegAddr, BitMask, Data, eRFPath);
+
+	if (!((priv->rf_pathmap >> eRFPath) & 0x1))
+		return ;
+	if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath))
+	{
+		return;
+	}
+	
+	spin_lock_irqsave(&priv->rf_lock, flags);	
+	if (priv->Rf_Mode == RF_OP_By_FW)	
+	{		
+		if (BitMask != bRFRegOffsetMask) 
+		{
+			Original_Value = phy_FwRFSerialRead(dev, eRFPath, RegAddr);
+			BitShift =  phy_CalculateBitShift(BitMask);
+			New_Value = (((Original_Value) & (~BitMask)) | (Data<< BitShift));
+		
+			phy_FwRFSerialWrite(dev, eRFPath, RegAddr, New_Value);
+		}
+		else
+			phy_FwRFSerialWrite(dev, eRFPath, RegAddr, Data);		
+	}
+	else
+	{		
+		if (BitMask != bRFRegOffsetMask) 
+		{
+			Original_Value = phy_RFSerialRead(dev, eRFPath, RegAddr);
+			BitShift =  phy_CalculateBitShift(BitMask);
+			New_Value = (((Original_Value) & (~BitMask)) | (Data<< BitShift));
+		
+			phy_RFSerialWrite(dev, eRFPath, RegAddr, New_Value);
+		}
+		else
+			phy_RFSerialWrite(dev, eRFPath, RegAddr, Data);
+	
+	}
+	spin_unlock_irqrestore(&priv->rf_lock, flags);
+	RT_TRACE(COMP_RF, "<---PHY_SetRFReg(): RegAddr(%#x), BitMask(%#x), Data(%#x), eRFPath(%#x)\n", 
+			RegAddr, BitMask, Data, eRFPath);
+	
+}
+
+static	u32
+phy_FwRFSerialRead(
+	struct net_device* dev,
+	RF90_RADIO_PATH_E	eRFPath,
+	u32				Offset	)
+{
+	u32		retValue = 0;		
+#if 0	
+	u32		Data = 0;
+	u8		time = 0;
+	Data |= ((Offset&0xFF)<<12);
+	Data |= ((eRFPath&0x3)<<20);
+	Data |= 0x80000000;		
+	while (PlatformIORead4Byte(dev, QPNR)&0x80000000)
+	{
+		if (time++ < 100)
+		{
+			delay_us(10);
+		}
+		else
+			break;
+	}
+	PlatformIOWrite4Byte(dev, QPNR, Data);		
+	while (PlatformIORead4Byte(dev, QPNR)&0x80000000)
+	{
+		if (time++ < 100)
+		{
+			delay_us(10);
+		}
+		else
+			return	(0);
+	}
+	retValue = PlatformIORead4Byte(dev, RF_DATA);
+#endif	
+	return	(retValue);
+
+}	/* phy_FwRFSerialRead */
+
+static	void
+phy_FwRFSerialWrite(
+	struct net_device* dev,
+	RF90_RADIO_PATH_E	eRFPath,
+	u32				Offset,
+	u32				Data	)
+{
+#if 0	
+	u8	time = 0;
+	DbgPrint("N FW RF CTRL RF-%d OF%02x DATA=%03x\n\r", eRFPath, Offset, Data);
+	
+	Data |= ((Offset&0xFF)<<12);
+	Data |= ((eRFPath&0x3)<<20);
+	Data |= 0x400000;
+	Data |= 0x80000000;
+	
+	while (PlatformIORead4Byte(dev, QPNR)&0x80000000)
+	{
+		if (time++ < 100)
+		{
+			delay_us(10);
+		}
+		else
+			break;
+	}
+	PlatformIOWrite4Byte(dev, QPNR, Data);
+#endif		
+}	/* phy_FwRFSerialWrite */
+
+#if (RTL92SE_FPGA_VERIFY == 1)
+static u32 phy_RFSerialRead(struct net_device* dev,RF90_RADIO_PATH_E eRFPath,u32 Offset)
+{
+
+	u32						retValue = 0;
+	struct r8192_priv *priv = rtllib_priv(dev);
+	BB_REGISTER_DEFINITION_T	*pPhyReg = &priv->PHYRegDef[eRFPath];
+	u32						NewOffset;
+
+	Offset &= 0x3f;
+
+	if(	priv->rf_chip == RF_8256 || 
+		priv->rf_chip == RF_8225 ||	
+		priv->rf_chip == RF_6052)
+	{
+		rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0x0);
+
+		if(Offset>=31)
+		{
+			priv->RFReadPageCnt[2]++;
+			priv->RfReg0Value[eRFPath] |= 0x140;
+
+			rtl8192_setBBreg(dev, 
+				pPhyReg->rf3wireOffset, 
+				bMaskDWord, 
+				(priv->RfReg0Value[eRFPath] << 16)	);
+
+			NewOffset = Offset - 30;
+			
+		}else if(Offset>=16)
+		{
+			priv->RFReadPageCnt[1]++;
+			priv->RfReg0Value[eRFPath] |= 0x100;
+			priv->RfReg0Value[eRFPath] &= (~0x40);
+
+			rtl8192_setBBreg(dev, 
+				pPhyReg->rf3wireOffset, 
+				bMaskDWord, 
+				(priv->RfReg0Value[eRFPath] << 16)	);
+
+			NewOffset = Offset - 15;
+		}
+		else
+		{
+			priv->RFReadPageCnt[0]++;
+			NewOffset = Offset;
+	}	
+	}	
+	else
+		NewOffset = Offset;
+
+#if (RTL92SE_FPGA_VERIFY == 1)
+	{
+		u32	temp1, temp2;
+
+		temp1 = rtl8192_QueryBBReg(dev, rFPGA0_XA_HSSIParameter2, 0xffffffff);
+		temp2 = rtl8192_QueryBBReg(dev, pPhyReg->rfHSSIPara2, 0xffffffff);
+		temp2 = temp2 & (~bLSSIReadAddress) | (NewOffset<<24) | bLSSIReadEdge;
+
+		rtl8192_setBBreg(dev, rFPGA0_XA_HSSIParameter2, 0xffffffff, temp1&(~bLSSIReadEdge));
+		msleep(1);
+		rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, 0xffffffff, temp2);
+		msleep(1);
+		rtl8192_setBBreg(dev, rFPGA0_XA_HSSIParameter2, 0xffffffff, temp1|bLSSIReadEdge);
+		msleep(1);
+		
+	}
+#else
+	rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, bLSSIReadAddress, NewOffset);
+
+	rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2,  bLSSIReadEdge, 0x0);	
+	rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2,  bLSSIReadEdge, 0x1);	
+#endif
+	
+	mdelay(1);
+
+	retValue = rtl8192_QueryBBReg(dev, pPhyReg->rfLSSIReadBack, bLSSIReadBackData);
+	
+	if(	priv->rf_chip == RF_8256 || 
+		priv->rf_chip == RF_8225 ||
+		priv->rf_chip == RF_6052)
+	{
+		if (Offset >= 0x10)
+		{
+			priv->RfReg0Value[eRFPath] &= 0xebf;
+		
+			rtl8192_setBBreg(
+				dev, 
+				pPhyReg->rf3wireOffset, 
+				bMaskDWord, 
+				(priv->RfReg0Value[eRFPath] << 16)	);
+		}
+
+		rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0xf);
+	}
+	
+	return retValue;	
+}
+
+
+static void
+phy_RFSerialWrite(
+	struct net_device* dev,
+	RF90_RADIO_PATH_E	eRFPath,
+	u32				Offset,
+	u32				Data
+	)
+{
+	u32					DataAndAddr = 0;
+	struct r8192_priv 			*priv = rtllib_priv(dev);
+	BB_REGISTER_DEFINITION_T	*pPhyReg = &priv->PHYRegDef[eRFPath];
+	u32					NewOffset;
+
+	Offset &= 0x3f;
+
+	PHY_RFShadowWrite(dev, eRFPath, Offset, Data);	
+
+	if( 	priv->rf_chip == RF_8256 || 
+		priv->rf_chip == RF_8225 ||
+		priv->rf_chip == RF_6052)
+	{
+		rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0x0);
+				
+		if(Offset>=31)
+		{
+			priv->RFWritePageCnt[2]++;
+			priv->RfReg0Value[eRFPath] |= 0x140;
+			
+			rtl8192_setBBreg(dev, 
+				pPhyReg->rf3wireOffset, 
+				bMaskDWord, 
+				(priv->RfReg0Value[eRFPath] << 16)	);
+
+			NewOffset = Offset - 30;
+			
+		}else if(Offset>=16)
+		{
+			priv->RFWritePageCnt[1]++;
+			priv->RfReg0Value[eRFPath] |= 0x100;
+			priv->RfReg0Value[eRFPath] &= (~0x40);			
+							
+
+			rtl8192_setBBreg(dev, 
+				pPhyReg->rf3wireOffset, 
+				bMaskDWord, 
+				(priv->RfReg0Value[eRFPath] << 16)	);
+
+			NewOffset = Offset - 15;
+		}
+		else
+		{
+			priv->RFWritePageCnt[0]++;
+			NewOffset = Offset;
+	}
+	}
+	else
+		NewOffset = Offset;
+
+	DataAndAddr = (Data<<16) | (NewOffset&0x3f);
+
+	rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr);
+
+
+	if(Offset==0x0)
+		priv->RfReg0Value[eRFPath] = Data;
+
+ 	if(	priv->rf_chip == RF_8256 || 
+		priv->rf_chip == RF_8225 ||
+		priv->rf_chip == RF_6052)
+	{
+		if (Offset >= 0x10)
+		{
+			if(Offset != 0)
+			{
+				priv->RfReg0Value[eRFPath] &= 0xebf;
+				rtl8192_setBBreg(
+				dev, 
+				pPhyReg->rf3wireOffset, 
+				bMaskDWord, 
+				(priv->RfReg0Value[eRFPath] << 16)	);
+			}
+		}	
+		rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0xf);
+	}
+	
+}
+#else
+static	u32
+phy_RFSerialRead(
+	struct net_device* dev,
+	RF90_RADIO_PATH_E	eRFPath,
+	u32				Offset
+	)
+{
+
+	u32					retValue = 0;
+	struct r8192_priv 			*priv = rtllib_priv(dev);
+	BB_REGISTER_DEFINITION_T	*pPhyReg = &priv->PHYRegDef[eRFPath];
+	u32					NewOffset;
+	u32 					tmplong,tmplong2;
+	u8					RfPiEnable=0;
+#if 0
+	if(priv->rf_chip == RF_8225 && Offset > 0x24) 
+		return	retValue;
+	if(priv->rf_chip == RF_8256 && Offset > 0x2D) 
+		return	retValue;
+#endif
+	Offset &= 0x3f;
+
+	NewOffset = Offset;
+
+	tmplong = rtl8192_QueryBBReg(dev, rFPGA0_XA_HSSIParameter2, bMaskDWord);
+	if(eRFPath == RF90_PATH_A)
+		tmplong2 = tmplong;
+	else
+	tmplong2 = rtl8192_QueryBBReg(dev, pPhyReg->rfHSSIPara2, bMaskDWord);
+	tmplong2 = (tmplong2 & (~bLSSIReadAddress)) | (NewOffset<<23) | bLSSIReadEdge;	
+
+	rtl8192_setBBreg(dev, rFPGA0_XA_HSSIParameter2, bMaskDWord, tmplong&(~bLSSIReadEdge));
+	udelay(1000);
+	
+	rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, bMaskDWord, tmplong2);
+	udelay(1000);
+	
+	rtl8192_setBBreg(dev, rFPGA0_XA_HSSIParameter2, bMaskDWord, tmplong|bLSSIReadEdge);
+
+	if(eRFPath == RF90_PATH_A)
+		RfPiEnable = (u8)rtl8192_QueryBBReg(dev, rFPGA0_XA_HSSIParameter1, BIT8);
+	else if(eRFPath == RF90_PATH_B)
+		RfPiEnable = (u8)rtl8192_QueryBBReg(dev, rFPGA0_XB_HSSIParameter1, BIT8);
+	
+	if(RfPiEnable)
+	{	
+		retValue = rtl8192_QueryBBReg(dev, pPhyReg->rfLSSIReadBackPi, bLSSIReadBackData);
+	}
+	else
+	{	
+		retValue = rtl8192_QueryBBReg(dev, pPhyReg->rfLSSIReadBack, bLSSIReadBackData);
+	}
+	
+	retValue = rtl8192_QueryBBReg(dev, pPhyReg->rfLSSIReadBack, bLSSIReadBackData);
+	
+	return retValue;	
+		
+}
+
+static	void
+phy_RFSerialWrite(
+	struct net_device* dev,
+	RF90_RADIO_PATH_E	eRFPath,
+	u32				Offset,
+	u32				Data
+	)
+{
+	u32					DataAndAddr = 0;
+	struct r8192_priv 			*priv = rtllib_priv(dev);
+	BB_REGISTER_DEFINITION_T	*pPhyReg = &priv->PHYRegDef[eRFPath];
+	u32					NewOffset;
+	
+#if 0
+	if(priv->rf_chip == RF_8225 && Offset > 0x24) 
+		return;
+	if(priv->rf_chip == RF_8256 && Offset > 0x2D) 
+		return;
+#endif
+
+	Offset &= 0x3f;
+
+	PHY_RFShadowWrite(dev, eRFPath, Offset, Data);	
+
+		NewOffset = Offset;
+
+	DataAndAddr = ((NewOffset<<20) | (Data&0x000fffff)) & 0x0fffffff;	
+
+	rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr);
+	
+}
+
+#endif
+
+static u32 phy_CalculateBitShift(u32 BitMask)
+{
+	u32 i;
+
+	for(i=0; i<=31; i++)
+	{
+		if ( ((BitMask>>i) &  0x1 ) == 1)
+			break;
+	}
+
+	return (i);
+}
+
+
+extern bool PHY_MACConfig8192S(struct net_device* dev)
+{
+	bool rtStatus = true;
+
+#if RTL8190_Download_Firmware_From_Header
+	rtStatus = phy_ConfigMACWithHeaderFile(dev);
+#else
+	
+	RT_TRACE(COMP_INIT, "Read MACREG.txt\n");
+#endif
+	return (rtStatus == true) ? 1:0;
+
+}
+
+extern	bool
+PHY_BBConfig8192S(struct net_device* dev)
+{
+	bool rtStatus = true;
+	u8 PathMap = 0, index = 0, rf_num = 0;
+	struct r8192_priv 	*priv = rtllib_priv(dev);
+	u8 bRegHwParaFile = 1;
+	
+	phy_InitBBRFRegisterDefinition(dev);
+
+	switch(bRegHwParaFile)
+	{
+		case 0:
+			phy_BB8190_Config_HardCode(dev);
+			break;
+
+		case 1:
+			rtStatus = phy_BB8192S_Config_ParaFile(dev);
+			break;
+
+		case 2:
+			phy_BB8190_Config_HardCode(dev);
+			phy_BB8192S_Config_ParaFile(dev);
+			break;
+
+		default:
+			phy_BB8190_Config_HardCode(dev);
+			break;
+	}
+
+	PathMap = (u8)(rtl8192_QueryBBReg(dev, rFPGA0_TxInfo, 0xf) |
+				rtl8192_QueryBBReg(dev, rOFDM0_TRxPathEnable, 0xf));
+	priv->rf_pathmap = PathMap;
+	for(index = 0; index<4; index++)
+	{
+		if((PathMap>>index)&0x1)
+			rf_num++;
+	}
+
+	if((priv->rf_type==RF_1T1R && rf_num!=1) ||
+		(priv->rf_type==RF_1T2R && rf_num!=2) ||
+		(priv->rf_type==RF_2T2R && rf_num!=2) ||
+		(priv->rf_type==RF_2T2R_GREEN && rf_num!=2) ||
+		(priv->rf_type==RF_2T4R && rf_num!=4))
+	{
+		RT_TRACE( COMP_INIT, "PHY_BBConfig8192S: RF_Type(%x) does not match RF_Num(%x)!!\n", priv->rf_type, rf_num);
+	}
+	return rtStatus;
+}
+
+extern	bool
+PHY_RFConfig8192S(struct net_device* dev)
+{
+	struct r8192_priv 	*priv = rtllib_priv(dev);
+	bool    		rtStatus = true;
+
+
+	if (IS_HARDWARE_TYPE_8192SE(dev))
+		priv->rf_chip = RF_6052;
+
+	switch(priv->rf_chip)
+	{
+	case RF_8225:
+	case RF_6052:
+		rtStatus = PHY_RF6052_Config(dev);
+		break;
+		
+	case RF_8256:			
+		break;
+		
+	case RF_8258:
+		break;
+		
+	case RF_PSEUDO_11N:
+		break;
+        default:
+            break;
+	}
+
+	return rtStatus;
+}
+
+
+static bool  
+phy_BB8190_Config_HardCode(struct net_device* dev)
+{
+	return true;
+}
+
+
+static bool 	
+phy_BB8192S_Config_ParaFile(struct net_device* dev)
+{
+	struct r8192_priv 	*priv = rtllib_priv(dev);
+	bool rtStatus = true;	
+	
+	RT_TRACE(COMP_INIT, "==>phy_BB8192S_Config_ParaFile\n");
+
+#if	RTL8190_Download_Firmware_From_Header
+	if (priv->rf_type == RF_1T2R || priv->rf_type == RF_2T2R ||
+	    priv->rf_type == RF_1T1R ||priv->rf_type == RF_2T2R_GREEN)
+	{
+		rtStatus = phy_ConfigBBWithHeaderFile(dev,BaseBand_Config_PHY_REG);
+		if(priv->rf_type != RF_2T2R && priv->rf_type != RF_2T2R_GREEN)
+		{
+			rtStatus = phy_SetBBtoDiffRFWithHeaderFile(dev,BaseBand_Config_PHY_REG);
+		}
+	}else
+		rtStatus = false;
+#else
+	RT_TRACE(COMP_INIT, "RF_Type == %d\n", priv->rf_type);		
+	if (priv->rf_type == RF_1T2R || priv->rf_type == RF_2T2R ||
+	    priv->rf_type == RF_1T1R ||priv->rf_type == RF_2T2R_GREEN)
+	{
+		rtStatus = phy_ConfigBBWithParaFile(dev, (char* )&szBBRegFile);
+		if(priv->rf_type != RF_2T2R && priv->rf_type != RF_2T2R_GREEN)
+		{
+			if(priv->rf_type == RF_1T1R)
+				rtStatus = phy_SetBBtoDiffRFWithParaFile(dev, (char* )&szBBRegto1T1RFile);
+			else if(priv->rf_type == RF_1T2R)
+				rtStatus = phy_SetBBtoDiffRFWithParaFile(dev, (char* )&szBBRegto1T2RFile);
+		}
+
+	}else
+		rtStatus = false;
+#endif
+
+	if(rtStatus != true){
+		RT_TRACE(COMP_INIT, "phy_BB8192S_Config_ParaFile():Write BB Reg Fail!!");
+		goto phy_BB8190_Config_ParaFile_Fail;
+	}
+
+	if (priv->AutoloadFailFlag == false)
+	{
+		priv->pwrGroupCnt = 0;
+
+#if	RTL8190_Download_Firmware_From_Header
+		rtStatus = phy_ConfigBBWithPgHeaderFile(dev,BaseBand_Config_PHY_REG);
+#else
+		rtStatus = phy_ConfigBBWithPgParaFile(dev, (char* )&szBBRegPgFile);
+#endif
+	}
+	if(rtStatus != true){
+		RT_TRACE(COMP_INIT, "phy_BB8192S_Config_ParaFile():BB_PG Reg Fail!!");
+		goto phy_BB8190_Config_ParaFile_Fail;
+	}
+	
+#if RTL8190_Download_Firmware_From_Header
+	rtStatus = phy_ConfigBBWithHeaderFile(dev,BaseBand_Config_AGC_TAB);
+#else
+	RT_TRACE(COMP_INIT, "phy_BB8192S_Config_ParaFile AGC_TAB.txt\n");
+	rtStatus = phy_ConfigBBWithParaFile(dev, (char* )&szAGCTableFile);
+#endif
+
+	if(rtStatus != true){
+		printk( "phy_BB8192S_Config_ParaFile():AGC Table Fail\n");
+		goto phy_BB8190_Config_ParaFile_Fail;
+	}
+
+
+#if 0	
+	if(pHalData->VersionID > VERSION_8190_BD)
+	{
+		u4RegValue = (  pHalData->AntennaTxPwDiff[2]<<8 | 
+						pHalData->AntennaTxPwDiff[1]<<4 | 
+						pHalData->AntennaTxPwDiff[0]);
+		
+		PHY_SetBBReg(dev, rFPGA0_TxGainStage, 
+			(bXBTxAGC|bXCTxAGC|bXDTxAGC), u4RegValue);
+    	
+		u4RegValue = pHalData->CrystalCap;
+		PHY_SetBBReg(dev, rFPGA0_AnalogParameter1, bXtalCap92x, u4RegValue);
+
+	}
+#endif
+
+	priv->bCckHighPower = (bool)(rtl8192_QueryBBReg(dev, rFPGA0_XA_HSSIParameter2, 0x200));
+
+
+phy_BB8190_Config_ParaFile_Fail:	
+	return rtStatus;
+}
+
+static bool	
+phy_ConfigMACWithHeaderFile(struct net_device* dev)
+{
+	u32					i = 0;
+	u32					ArrayLength = 0;
+	u32*					ptrArray;	
+	
+	/*if(dev->bInHctTest)
+	{
+		RT_TRACE(COMP_INIT, DBG_LOUD, ("Rtl819XMACPHY_ArrayDTM\n"));
+		ArrayLength = MACPHY_ArrayLengthDTM;
+		ptrArray = Rtl819XMACPHY_ArrayDTM;
+	}
+	else if(pHalData->bTXPowerDataReadFromEEPORM)
+	{
+
+	}else*/
+	{ 
+		RT_TRACE(COMP_INIT, "Read Rtl819XMACPHY_Array\n");
+		ArrayLength = MAC_2T_ArrayLength;
+		ptrArray = Rtl819XMAC_Array;	
+	}
+		
+	/*for(i = 0 ;i < ArrayLength;i=i+3){
+		RT_TRACE(COMP_SEND, DBG_LOUD, ("The Rtl819XMACPHY_Array[0] is %lx Rtl819XMACPHY_Array[1] is %lx Rtl819XMACPHY_Array[2] is %lx\n",ptrArray[i], ptrArray[i+1], ptrArray[i+2]));
+		if(ptrArray[i] == 0x318)
+		{
+			ptrArray[i+2] = 0x00000800;
+		}
+		PHY_SetBBReg(dev, ptrArray[i], ptrArray[i+1], ptrArray[i+2]);
+	}*/
+	for(i = 0 ;i < ArrayLength;i=i+2){ 
+		write_nic_byte(dev, ptrArray[i], (u8)ptrArray[i+1]);
+	}
+	return true;
+}
+
+
+static bool 	
+phy_ConfigBBWithHeaderFile(struct net_device* dev,u8 ConfigType)
+{
+	int 		i;
+	u32*	Rtl819XPHY_REGArray_Table;
+	u32*	Rtl819XAGCTAB_Array_Table;
+	u16		PHY_REGArrayLen, AGCTAB_ArrayLen;
+	/*if(dev->bInHctTest)
+	{	
+	
+		AGCTAB_ArrayLen = AGCTAB_ArrayLengthDTM;
+		Rtl819XAGCTAB_Array_Table = Rtl819XAGCTAB_ArrayDTM;
+
+		if(pHalData->RF_Type == RF_2T4R)
+		{
+			PHY_REGArrayLen = PHY_REGArrayLengthDTM;
+			Rtl819XPHY_REGArray_Table = Rtl819XPHY_REGArrayDTM;
+		}
+		else if (pHalData->RF_Type == RF_1T2R)
+		{
+			PHY_REGArrayLen = PHY_REG_1T2RArrayLengthDTM;
+			Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_1T2RArrayDTM;
+		}		
+	
+	}
+	else
+	*/
+	AGCTAB_ArrayLen = AGCTAB_ArrayLength;
+	Rtl819XAGCTAB_Array_Table = Rtl819XAGCTAB_Array;
+	PHY_REGArrayLen = PHY_REG_2T2RArrayLength; 
+	Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_Array;
+
+	if(ConfigType == BaseBand_Config_PHY_REG)
+	{
+		for(i=0;i<PHY_REGArrayLen;i=i+2)
+		{
+			if (Rtl819XPHY_REGArray_Table[i] == 0xfe)
+				mdelay(50);
+			else if (Rtl819XPHY_REGArray_Table[i] == 0xfd)
+				mdelay(5);
+			else if (Rtl819XPHY_REGArray_Table[i] == 0xfc)
+				mdelay(1);
+			else if (Rtl819XPHY_REGArray_Table[i] == 0xfb)
+				udelay(50);
+			else if (Rtl819XPHY_REGArray_Table[i] == 0xfa)
+				udelay(5);
+			else if (Rtl819XPHY_REGArray_Table[i] == 0xf9)
+				udelay(1);
+#ifdef ECS_T20_INIT_DELAY 
+				udelay(1);
+#endif
+			rtl8192_setBBreg(dev, Rtl819XPHY_REGArray_Table[i], bMaskDWord, Rtl819XPHY_REGArray_Table[i+1]);		
+
+		}
+	}
+	else if(ConfigType == BaseBand_Config_AGC_TAB){
+		for(i=0;i<AGCTAB_ArrayLen;i=i+2)
+		{
+			rtl8192_setBBreg(dev, Rtl819XAGCTAB_Array_Table[i], bMaskDWord, Rtl819XAGCTAB_Array_Table[i+1]);		
+#ifdef ECS_T20_INIT_DELAY 
+			udelay(1);
+#endif
+		}
+	}
+	return true;
+}
+
+
+static bool  
+phy_SetBBtoDiffRFWithHeaderFile(struct net_device* dev, u8 ConfigType)
+{
+	int i;
+	struct r8192_priv 	*priv = rtllib_priv(dev);
+	u32* 			Rtl819XPHY_REGArraytoXTXR_Table;
+	u16				PHY_REGArraytoXTXRLen;
+	
+	if(priv->rf_type == RF_1T1R)
+	{
+		Rtl819XPHY_REGArraytoXTXR_Table = Rtl819XPHY_REG_to1T1R_Array;
+		PHY_REGArraytoXTXRLen = PHY_ChangeTo_1T1RArrayLength;
+	} 
+	else if(priv->rf_type == RF_1T2R)
+	{
+		Rtl819XPHY_REGArraytoXTXR_Table = Rtl819XPHY_REG_to1T2R_Array;
+		PHY_REGArraytoXTXRLen = PHY_ChangeTo_1T2RArrayLength;
+	}
+	else
+	{
+		return false;
+	}
+
+	if(ConfigType == BaseBand_Config_PHY_REG)
+	{
+		for(i=0;i<PHY_REGArraytoXTXRLen;i=i+3)
+		{
+			if (Rtl819XPHY_REGArraytoXTXR_Table[i] == 0xfe)
+				mdelay(50);
+			else if (Rtl819XPHY_REGArraytoXTXR_Table[i] == 0xfd)
+				mdelay(5);
+			else if (Rtl819XPHY_REGArraytoXTXR_Table[i] == 0xfc)
+				mdelay(1);
+			else if (Rtl819XPHY_REGArraytoXTXR_Table[i] == 0xfb)
+				udelay(50);
+			else if (Rtl819XPHY_REGArraytoXTXR_Table[i] == 0xfa)
+				udelay(5);
+			else if (Rtl819XPHY_REGArraytoXTXR_Table[i] == 0xf9)
+				udelay(1);
+			rtl8192_setBBreg(dev, Rtl819XPHY_REGArraytoXTXR_Table[i], Rtl819XPHY_REGArraytoXTXR_Table[i+1], Rtl819XPHY_REGArraytoXTXR_Table[i+2]);		
+		}
+	}
+	else {
+		RT_TRACE(COMP_SEND, "phy_SetBBtoDiffRFWithHeaderFile(): ConfigType != BaseBand_Config_PHY_REG\n");
+	}
+	return true;
+}
+
+void
+storePwrIndexDiffRateOffset(
+	struct net_device* dev,
+	u32		RegAddr,
+	u32		BitMask,
+	u32		Data
+	)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	if(RegAddr == rTxAGC_Rate18_06)
+	{
+		priv->MCSTxPowerLevelOriginalOffset[priv->pwrGroupCnt][0] = Data;
+	}
+	if(RegAddr == rTxAGC_Rate54_24)
+	{
+		priv->MCSTxPowerLevelOriginalOffset[priv->pwrGroupCnt][1] = Data;
+	}
+	if(RegAddr == rTxAGC_CCK_Mcs32)
+	{
+		priv->MCSTxPowerLevelOriginalOffset[priv->pwrGroupCnt][6] = Data;
+	}
+	if(RegAddr == rTxAGC_Mcs03_Mcs00)
+	{
+		priv->MCSTxPowerLevelOriginalOffset[priv->pwrGroupCnt][2] = Data;
+	}
+	if(RegAddr == rTxAGC_Mcs07_Mcs04)
+	{
+		priv->MCSTxPowerLevelOriginalOffset[priv->pwrGroupCnt][3] = Data;
+	}
+	if(RegAddr == rTxAGC_Mcs11_Mcs08)
+	{
+		priv->MCSTxPowerLevelOriginalOffset[priv->pwrGroupCnt][4] = Data;
+	}
+	if(RegAddr == rTxAGC_Mcs15_Mcs12)
+	{
+		priv->MCSTxPowerLevelOriginalOffset[priv->pwrGroupCnt][5] = Data;
+		priv->pwrGroupCnt++;
+	}
+}
+
+static bool 
+phy_ConfigBBWithPgHeaderFile(struct net_device* dev,u8 ConfigType)
+{
+	int i;
+	u32*	Rtl819XPHY_REGArray_Table_PG;
+	u16	PHY_REGArrayPGLen;
+
+	PHY_REGArrayPGLen = PHY_REG_Array_PGLength;
+	Rtl819XPHY_REGArray_Table_PG = Rtl819XPHY_REG_Array_PG;
+
+	if(ConfigType == BaseBand_Config_PHY_REG)
+	{
+		for(i=0;i<PHY_REGArrayPGLen;i=i+3)
+		{
+			if (Rtl819XPHY_REGArray_Table_PG[i] == 0xfe)
+				mdelay(50);
+			else if (Rtl819XPHY_REGArray_Table_PG[i] == 0xfd)
+				mdelay(5);
+			else if (Rtl819XPHY_REGArray_Table_PG[i] == 0xfc)
+				mdelay(1);
+			else if (Rtl819XPHY_REGArray_Table_PG[i] == 0xfb)
+				udelay(50);
+			else if (Rtl819XPHY_REGArray_Table_PG[i] == 0xfa)
+				udelay(5);
+			else if (Rtl819XPHY_REGArray_Table_PG[i] == 0xf9)
+				udelay(1);
+			storePwrIndexDiffRateOffset(dev, Rtl819XPHY_REGArray_Table_PG[i], 
+				Rtl819XPHY_REGArray_Table_PG[i+1], 
+				Rtl819XPHY_REGArray_Table_PG[i+2]);
+			rtl8192_setBBreg(dev, Rtl819XPHY_REGArray_Table_PG[i], Rtl819XPHY_REGArray_Table_PG[i+1], Rtl819XPHY_REGArray_Table_PG[i+2]);		
+		}
+	}
+	else{
+		RT_TRACE(COMP_SEND, "phy_ConfigBBWithPgHeaderFile(): ConfigType != BaseBand_Config_PHY_REG\n");
+	}
+	return true;
+	
+}	/* phy_ConfigBBWithPgHeaderFile */
+
+RT_STATUS rtl8192_phy_configRFPABiascurrent(struct net_device *dev, RF90_RADIO_PATH_E eRFPath)
+{
+	struct r8192_priv  *priv = rtllib_priv(dev);
+	RT_STATUS       rtStatus = RT_STATUS_SUCCESS;
+	u32          tmpval=0;
+
+	if(priv->IC_Class != IC_INFERIORITY_A)
+	{
+		tmpval = rtl8192_phy_QueryRFReg(dev, eRFPath, RF_IPA, 0xf);
+		rtl8192_phy_SetRFReg(dev, eRFPath, RF_IPA, 0xf, tmpval+1);
+	}
+
+	return rtStatus;
+}
+
+u8 rtl8192_phy_ConfigRFWithHeaderFile(struct net_device* dev, RF90_RADIO_PATH_E	eRFPath)
+{
+	struct r8192_priv 	*priv = rtllib_priv(dev);
+	int			i;
+	bool 		rtStatus = true;
+	u32			*Rtl819XRadioA_Array_Table;
+	u32			*Rtl819XRadioB_Array_Table;
+	u16			RadioA_ArrayLen,RadioB_ArrayLen;
+
+	RadioA_ArrayLen = RadioA_1T_ArrayLength;
+	Rtl819XRadioA_Array_Table=Rtl819XRadioA_Array;
+
+	if(priv->rf_type == RF_2T2R_GREEN)
+	{
+		Rtl819XRadioB_Array_Table = Rtl819XRadioB_GM_Array;
+		RadioB_ArrayLen = RadioB_GM_ArrayLength;
+	}
+	else
+	{		
+		Rtl819XRadioB_Array_Table=Rtl819XRadioB_Array;
+		RadioB_ArrayLen = RadioB_ArrayLength;	
+	}
+
+
+	RT_TRACE(COMP_INIT, "PHY_ConfigRFWithHeaderFile: Radio No %x\n", eRFPath);
+	rtStatus = true;
+
+	switch(eRFPath){
+		case RF90_PATH_A:
+			for(i = 0;i<RadioA_ArrayLen; i=i+2)
+			{
+				if(Rtl819XRadioA_Array_Table[i] == 0xfe)
+				{ 
+					mdelay(50);
+				}
+				else if (Rtl819XRadioA_Array_Table[i] == 0xfd)
+					mdelay(5);
+				else if (Rtl819XRadioA_Array_Table[i] == 0xfc)
+					mdelay(1);
+				else if (Rtl819XRadioA_Array_Table[i] == 0xfb)
+					udelay(50);
+				else if (Rtl819XRadioA_Array_Table[i] == 0xfa)
+					udelay(5);
+				else if (Rtl819XRadioA_Array_Table[i] == 0xf9)
+					udelay(1);
+				else {
+					rtl8192_phy_SetRFReg(dev, eRFPath, Rtl819XRadioA_Array_Table[i], 
+							bMask20Bits, Rtl819XRadioA_Array_Table[i+1]);
+				}
+			}
+			rtl8192_phy_configRFPABiascurrent(dev, eRFPath);
+			break;
+		case RF90_PATH_B:
+			for(i = 0;i<RadioB_ArrayLen; i=i+2){
+				if(Rtl819XRadioB_Array_Table[i] == 0xfe)
+				{ 
+					mdelay(50);
+				}
+				else if (Rtl819XRadioB_Array_Table[i] == 0xfd)
+					mdelay(5);
+				else if (Rtl819XRadioB_Array_Table[i] == 0xfc)
+					mdelay(1);
+				else if (Rtl819XRadioB_Array_Table[i] == 0xfb)
+					udelay(50);
+				else if (Rtl819XRadioB_Array_Table[i] == 0xfa)
+					udelay(5);
+				else if (Rtl819XRadioB_Array_Table[i] == 0xf9)
+					udelay(1);
+				else
+				{
+					rtl8192_phy_SetRFReg(dev, eRFPath, Rtl819XRadioB_Array_Table[i], bMask20Bits, Rtl819XRadioB_Array_Table[i+1]);
+				}
+#ifdef ECS_T20_INIT_DELAY 
+			udelay(1);
+#endif
+			}			
+			break;
+		case RF90_PATH_C:
+			break;
+		case RF90_PATH_D:
+			break;
+		default:
+			break;
+	}
+	return rtStatus;
+
+}
+
+bool rtl8192_phy_checkBBAndRF(
+	struct net_device* dev,
+	HW90_BLOCK_E		CheckBlock,
+	RF90_RADIO_PATH_E	eRFPath
+	)
+{
+	bool rtStatus = true;
+	u32				i, CheckTimes = 4,ulRegRead = 0;
+	u32				WriteAddr[4];
+	u32				WriteData[] = {0xfffff027, 0xaa55a02f, 0x00000027, 0x55aa502f};
+
+	WriteAddr[HW90_BLOCK_MAC] = 0x100;
+	WriteAddr[HW90_BLOCK_PHY0] = 0x900;
+	WriteAddr[HW90_BLOCK_PHY1] = 0x800;
+	WriteAddr[HW90_BLOCK_RF] = 0x3;
+	
+	for(i=0 ; i < CheckTimes ; i++)
+	{
+
+		switch(CheckBlock)
+		{
+		case HW90_BLOCK_MAC:
+			RT_TRACE(COMP_INIT, "PHY_CheckBBRFOK(): Never Write 0x100 here!\n");
+			break;
+			
+		case HW90_BLOCK_PHY0:
+		case HW90_BLOCK_PHY1:
+			write_nic_dword(dev, WriteAddr[CheckBlock], WriteData[i]);
+			ulRegRead = read_nic_dword(dev, WriteAddr[CheckBlock]);
+			break;
+
+		case HW90_BLOCK_RF:
+			WriteData[i] &= 0xfff;
+			rtl8192_phy_SetRFReg(dev, eRFPath, WriteAddr[HW90_BLOCK_RF], bMask20Bits, WriteData[i]);
+			mdelay(10);
+			ulRegRead = rtl8192_phy_QueryRFReg(dev, eRFPath, WriteAddr[HW90_BLOCK_RF], bMaskDWord);				
+			mdelay(10);
+			break;
+			
+		default:
+			rtStatus = false;
+			break;
+		}
+
+
+		if(ulRegRead != WriteData[i])
+		{
+			RT_TRACE(COMP_ERR, "read back error(read:%x, write:%x)\n", ulRegRead, WriteData[i]);
+			rtStatus = false;			
+			break;
+		}
+	}
+
+	return rtStatus;
+}
+
+#ifdef TO_DO_LIST
+void
+PHY_SetRFPowerState8192SUsb(
+	struct net_device* dev,
+	RF_POWER_STATE	RFPowerState
+	)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	bool			WaitShutDown = false;
+	u32			DWordContent;
+	u8				eRFPath;
+	BB_REGISTER_DEFINITION_T	*pPhyReg;
+	
+	if(priv->SetRFPowerStateInProgress == true)
+		return;
+	
+	priv->SetRFPowerStateInProgress = true;
+	
+
+	if(RFPowerState==RF_SHUT_DOWN)
+	{
+		RFPowerState=RF_OFF;
+		WaitShutDown=true;
+	}
+	
+	
+	priv->RFPowerState = RFPowerState;
+	switch( priv->rf_chip )
+	{
+	case RF_8225:
+	case RF_6052:
+		switch( RFPowerState )
+		{
+		case RF_ON:
+			break;
+	
+		case RF_SLEEP:
+			break;
+	
+		case RF_OFF:
+			break;
+		}
+		break;
+
+	case RF_8256:
+		switch( RFPowerState )
+		{
+		case RF_ON:
+			break;
+	
+		case RF_SLEEP:
+			break;
+	
+		case RF_OFF:
+			for(eRFPath=(RF90_RADIO_PATH_E)RF90_PATH_A; eRFPath < RF90_PATH_MAX; eRFPath++)
+			{
+				if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath))		
+					continue;	
+				
+				pPhyReg = &priv->PHYRegDef[eRFPath];
+				rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV, bRFSI_RFENV);
+				rtl8192_setBBreg(dev, pPhyReg->rfintfo, bRFSI_RFENV, 0);
+			}
+			break;
+		}
+		break;
+		
+	case RF_8258:
+		break;
+	}
+
+	priv->SetRFPowerStateInProgress = false;
+}
+#endif
+
+void PHY_GetHWRegOriginalValue(struct net_device* dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+#if 0
+	priv->MCSTxPowerLevelOriginalOffset[0] =
+		rtl8192_QueryBBReg(dev, rTxAGC_Rate18_06, bMaskDWord);
+	priv->MCSTxPowerLevelOriginalOffset[1] =
+		rtl8192_QueryBBReg(dev, rTxAGC_Rate54_24, bMaskDWord);
+	priv->MCSTxPowerLevelOriginalOffset[2] =
+		rtl8192_QueryBBReg(dev, rTxAGC_Mcs03_Mcs00, bMaskDWord);
+	priv->MCSTxPowerLevelOriginalOffset[3] =
+		rtl8192_QueryBBReg(dev, rTxAGC_Mcs07_Mcs04, bMaskDWord);
+	priv->MCSTxPowerLevelOriginalOffset[4] =
+		rtl8192_QueryBBReg(dev, rTxAGC_Mcs11_Mcs08, bMaskDWord);
+	priv->MCSTxPowerLevelOriginalOffset[5] =
+		rtl8192_QueryBBReg(dev, rTxAGC_Mcs15_Mcs12, bMaskDWord);
+
+	priv->CCKTxPowerLevelOriginalOffset=
+		rtl8192_QueryBBReg(dev, rTxAGC_CCK_Mcs32, bMaskDWord);
+	RT_TRACE(COMP_INIT, "Legacy OFDM =%08x/%08x HT_OFDM=%08x/%08x/%08x/%08x\n", 
+	priv->MCSTxPowerLevelOriginalOffset[0], priv->MCSTxPowerLevelOriginalOffset[1] ,
+	priv->MCSTxPowerLevelOriginalOffset[2], priv->MCSTxPowerLevelOriginalOffset[3] ,
+	priv->MCSTxPowerLevelOriginalOffset[4], priv->MCSTxPowerLevelOriginalOffset[5] );
+#endif
+
+	priv->DefaultInitialGain[0] = rtl8192_QueryBBReg(dev, rOFDM0_XAAGCCore1, bMaskByte0);
+	priv->DefaultInitialGain[1] = rtl8192_QueryBBReg(dev, rOFDM0_XBAGCCore1, bMaskByte0);
+	priv->DefaultInitialGain[2] = rtl8192_QueryBBReg(dev, rOFDM0_XCAGCCore1, bMaskByte0);
+	priv->DefaultInitialGain[3] = rtl8192_QueryBBReg(dev, rOFDM0_XDAGCCore1, bMaskByte0);
+	RT_TRACE(COMP_INIT, "Default initial gain (c50=0x%x, c58=0x%x, c60=0x%x, c68=0x%x) \n", 
+			priv->DefaultInitialGain[0], priv->DefaultInitialGain[1], 
+			priv->DefaultInitialGain[2], priv->DefaultInitialGain[3]);
+
+	priv->framesync = rtl8192_QueryBBReg(dev, rOFDM0_RxDetector3, bMaskByte0);
+	priv->framesyncC34 = rtl8192_QueryBBReg(dev, rOFDM0_RxDetector2, bMaskDWord);
+	RT_TRACE(COMP_INIT, "Default framesync (0x%x) = 0x%x \n", 
+				rOFDM0_RxDetector3, priv->framesync);
+
+}
+
+
+
+static void phy_InitBBRFRegisterDefinition(	struct net_device* dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	priv->PHYRegDef[RF90_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; 
+	priv->PHYRegDef[RF90_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; 
+	priv->PHYRegDef[RF90_PATH_C].rfintfs = rFPGA0_XCD_RFInterfaceSW;
+	priv->PHYRegDef[RF90_PATH_D].rfintfs = rFPGA0_XCD_RFInterfaceSW;
+
+	priv->PHYRegDef[RF90_PATH_A].rfintfi = rFPGA0_XAB_RFInterfaceRB; 
+	priv->PHYRegDef[RF90_PATH_B].rfintfi = rFPGA0_XAB_RFInterfaceRB;
+	priv->PHYRegDef[RF90_PATH_C].rfintfi = rFPGA0_XCD_RFInterfaceRB;
+	priv->PHYRegDef[RF90_PATH_D].rfintfi = rFPGA0_XCD_RFInterfaceRB;
+
+	priv->PHYRegDef[RF90_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; 
+	priv->PHYRegDef[RF90_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE; 
+	priv->PHYRegDef[RF90_PATH_C].rfintfo = rFPGA0_XC_RFInterfaceOE;
+	priv->PHYRegDef[RF90_PATH_D].rfintfo = rFPGA0_XD_RFInterfaceOE;
+
+	priv->PHYRegDef[RF90_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; 
+	priv->PHYRegDef[RF90_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE; 
+	priv->PHYRegDef[RF90_PATH_C].rfintfe = rFPGA0_XC_RFInterfaceOE;
+	priv->PHYRegDef[RF90_PATH_D].rfintfe = rFPGA0_XD_RFInterfaceOE;
+
+	priv->PHYRegDef[RF90_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; 
+	priv->PHYRegDef[RF90_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter;
+	priv->PHYRegDef[RF90_PATH_C].rf3wireOffset = rFPGA0_XC_LSSIParameter;
+	priv->PHYRegDef[RF90_PATH_D].rf3wireOffset = rFPGA0_XD_LSSIParameter;
+
+	priv->PHYRegDef[RF90_PATH_A].rfLSSI_Select = rFPGA0_XAB_RFParameter;  
+	priv->PHYRegDef[RF90_PATH_B].rfLSSI_Select = rFPGA0_XAB_RFParameter;
+	priv->PHYRegDef[RF90_PATH_C].rfLSSI_Select = rFPGA0_XCD_RFParameter;
+	priv->PHYRegDef[RF90_PATH_D].rfLSSI_Select = rFPGA0_XCD_RFParameter;
+
+	priv->PHYRegDef[RF90_PATH_A].rfTxGainStage = rFPGA0_TxGainStage; 
+	priv->PHYRegDef[RF90_PATH_B].rfTxGainStage = rFPGA0_TxGainStage; 
+	priv->PHYRegDef[RF90_PATH_C].rfTxGainStage = rFPGA0_TxGainStage; 
+	priv->PHYRegDef[RF90_PATH_D].rfTxGainStage = rFPGA0_TxGainStage; 
+
+	priv->PHYRegDef[RF90_PATH_A].rfHSSIPara1 = rFPGA0_XA_HSSIParameter1;  
+	priv->PHYRegDef[RF90_PATH_B].rfHSSIPara1 = rFPGA0_XB_HSSIParameter1;  
+	priv->PHYRegDef[RF90_PATH_C].rfHSSIPara1 = rFPGA0_XC_HSSIParameter1;  
+	priv->PHYRegDef[RF90_PATH_D].rfHSSIPara1 = rFPGA0_XD_HSSIParameter1;  
+
+	priv->PHYRegDef[RF90_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2;  
+	priv->PHYRegDef[RF90_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2;  
+	priv->PHYRegDef[RF90_PATH_C].rfHSSIPara2 = rFPGA0_XC_HSSIParameter2;  
+	priv->PHYRegDef[RF90_PATH_D].rfHSSIPara2 = rFPGA0_XD_HSSIParameter2;  
+
+	priv->PHYRegDef[RF90_PATH_A].rfSwitchControl = rFPGA0_XAB_SwitchControl; 
+	priv->PHYRegDef[RF90_PATH_B].rfSwitchControl = rFPGA0_XAB_SwitchControl;
+	priv->PHYRegDef[RF90_PATH_C].rfSwitchControl = rFPGA0_XCD_SwitchControl;
+	priv->PHYRegDef[RF90_PATH_D].rfSwitchControl = rFPGA0_XCD_SwitchControl;
+
+	priv->PHYRegDef[RF90_PATH_A].rfAGCControl1 = rOFDM0_XAAGCCore1;
+	priv->PHYRegDef[RF90_PATH_B].rfAGCControl1 = rOFDM0_XBAGCCore1;
+	priv->PHYRegDef[RF90_PATH_C].rfAGCControl1 = rOFDM0_XCAGCCore1;
+	priv->PHYRegDef[RF90_PATH_D].rfAGCControl1 = rOFDM0_XDAGCCore1;
+
+	priv->PHYRegDef[RF90_PATH_A].rfAGCControl2 = rOFDM0_XAAGCCore2;
+	priv->PHYRegDef[RF90_PATH_B].rfAGCControl2 = rOFDM0_XBAGCCore2;
+	priv->PHYRegDef[RF90_PATH_C].rfAGCControl2 = rOFDM0_XCAGCCore2;
+	priv->PHYRegDef[RF90_PATH_D].rfAGCControl2 = rOFDM0_XDAGCCore2;
+
+	priv->PHYRegDef[RF90_PATH_A].rfRxIQImbalance = rOFDM0_XARxIQImbalance;
+	priv->PHYRegDef[RF90_PATH_B].rfRxIQImbalance = rOFDM0_XBRxIQImbalance;
+	priv->PHYRegDef[RF90_PATH_C].rfRxIQImbalance = rOFDM0_XCRxIQImbalance;
+	priv->PHYRegDef[RF90_PATH_D].rfRxIQImbalance = rOFDM0_XDRxIQImbalance;	
+
+	priv->PHYRegDef[RF90_PATH_A].rfRxAFE = rOFDM0_XARxAFE;
+	priv->PHYRegDef[RF90_PATH_B].rfRxAFE = rOFDM0_XBRxAFE;
+	priv->PHYRegDef[RF90_PATH_C].rfRxAFE = rOFDM0_XCRxAFE;
+	priv->PHYRegDef[RF90_PATH_D].rfRxAFE = rOFDM0_XDRxAFE;	
+
+	priv->PHYRegDef[RF90_PATH_A].rfTxIQImbalance = rOFDM0_XATxIQImbalance;
+	priv->PHYRegDef[RF90_PATH_B].rfTxIQImbalance = rOFDM0_XBTxIQImbalance;
+	priv->PHYRegDef[RF90_PATH_C].rfTxIQImbalance = rOFDM0_XCTxIQImbalance;
+	priv->PHYRegDef[RF90_PATH_D].rfTxIQImbalance = rOFDM0_XDTxIQImbalance;	
+
+	priv->PHYRegDef[RF90_PATH_A].rfTxAFE = rOFDM0_XATxAFE;
+	priv->PHYRegDef[RF90_PATH_B].rfTxAFE = rOFDM0_XBTxAFE;
+	priv->PHYRegDef[RF90_PATH_C].rfTxAFE = rOFDM0_XCTxAFE;
+	priv->PHYRegDef[RF90_PATH_D].rfTxAFE = rOFDM0_XDTxAFE;	
+
+	priv->PHYRegDef[RF90_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack;
+	priv->PHYRegDef[RF90_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack;
+	priv->PHYRegDef[RF90_PATH_C].rfLSSIReadBack = rFPGA0_XC_LSSIReadBack;
+	priv->PHYRegDef[RF90_PATH_D].rfLSSIReadBack = rFPGA0_XD_LSSIReadBack;	
+
+	priv->PHYRegDef[RF90_PATH_A].rfLSSIReadBackPi = TransceiverA_HSPI_Readback;
+	priv->PHYRegDef[RF90_PATH_B].rfLSSIReadBackPi = TransceiverB_HSPI_Readback;
+
+}
+
+
+bool PHY_SetRFPowerState(struct net_device* dev, RT_RF_POWER_STATE eRFPowerState)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	bool			bResult = false;
+
+	RT_TRACE((COMP_PS | COMP_RF), "---------> PHY_SetRFPowerState(): eRFPowerState(%d)\n", eRFPowerState);
+
+	if(eRFPowerState == priv->rtllib->eRFPowerState)
+	{
+		;
+		return bResult;
+	}
+
+	bResult = phy_SetRFPowerState8192SE(dev, eRFPowerState);
+	
+	RT_TRACE((COMP_PS | COMP_RF), "<--------- PHY_SetRFPowerState(): bResult(%d)\n", bResult);
+
+	return bResult;
+}
+
+static bool phy_SetRFPowerState8192SE(struct net_device* dev,RT_RF_POWER_STATE eRFPowerState)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	PRT_POWER_SAVE_CONTROL	pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
+	bool 	bResult = true;
+	u8		i, QueueID;
+	struct rtl8192_tx_ring  *ring = NULL;
+	priv->SetRFPowerStateInProgress = true;
+	
+	switch(priv->rf_chip )
+	{
+		default:	
+		switch( eRFPowerState )
+		{
+			case eRfOn:
+                                RT_TRACE(COMP_PS,"========>%s():eRfOn\n", __func__);
+				{
+									if((priv->rtllib->eRFPowerState == eRfOff) && RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC))
+					{ 
+						bool rtstatus = true;
+						u32 InitializeCount = 0;
+						do
+						{	
+							InitializeCount++;
+							rtstatus = NicIFEnableNIC(dev);
+						}while( (rtstatus != true) &&(InitializeCount < 10) );
+						if(rtstatus != true)
+						{
+							RT_TRACE(COMP_ERR,"%s():Initialize Adapter fail,return\n",__FUNCTION__);
+							priv->SetRFPowerStateInProgress = false;
+							return false;
+						}
+						RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC);
+					}
+					else
+					{ 
+						write_nic_word(dev, CMDR, 0x37FC);
+						write_nic_byte(dev, TXPAUSE, 0x00);
+						write_nic_byte(dev, PHY_CCA, 0x3);
+					}
+
+#if 1
+					if(priv->rtllib->state == RTLLIB_LINKED)
+					{
+						LedControl8192SE(dev, LED_CTL_LINK); 
+					}
+					else
+					{
+						LedControl8192SE(dev, LED_CTL_NO_LINK); 
+					}
+#endif
+				}
+				break;
+			case eRfOff:  
+                                RT_TRACE(COMP_PS,"========>%s():eRfOff\n", __func__);
+				{					
+					for(QueueID = 0, i = 0; QueueID < MAX_TX_QUEUE; )
+					{
+						ring = &priv->tx_ring[QueueID];
+						if(skb_queue_len(&ring->queue) == 0)
+						{
+							QueueID++;
+							continue;
+						}
+					#ifdef TO_DO_LIST
+					#if( DEV_BUS_TYPE==PCI_INTERFACE)
+						else if(IsLowPowerState(Adapter))
+						{
+							RT_TRACE(COMP_PS, DBG_LOUD, 
+							("eRf Off/Sleep: %d times TcbBusyQueue[%d] !=0 but lower power state!\n", (i+1), QueueID));
+							break;
+						}
+					#endif
+					#endif
+						else
+						{
+							RT_TRACE(COMP_PS, "eRf Off/Sleep: %d times TcbBusyQueue[%d] !=0 before doze!\n", (i+1), QueueID);
+							udelay(10);
+							i++;
+						}
+						
+						if(i >= MAX_DOZE_WAITING_TIMES_9x)
+						{
+							RT_TRACE(COMP_PS, "\n\n\n %s(): eRfOff: %d times TcbBusyQueue[%d] != 0 !!!\n\n\n", __FUNCTION__,MAX_DOZE_WAITING_TIMES_9x, QueueID);
+							break;
+						}
+					}
+
+					if(pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_HALT_NIC && !RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC))
+					{ 
+						NicIFDisableNIC(dev);
+						RT_SET_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC);
+						if(priv->pwrdown && priv->rtllib->RfOffReason>= RF_CHANGE_BY_HW)
+							write_nic_byte(dev,0x03,0x31);
+					}
+					else  if(!(pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_HALT_NIC))
+					{ 
+						SET_RTL8192SE_RF_SLEEP(dev);
+
+#if 1
+						if(priv->rtllib->RfOffReason == RF_CHANGE_BY_IPS )
+						{
+							LedControl8192SE(dev,LED_CTL_NO_LINK); 
+						}
+						else
+						{
+							LedControl8192SE(dev, LED_CTL_POWER_OFF); 
+						}
+#endif
+					}
+				}
+				break;
+
+			case eRfSleep:
+                                RT_TRACE(COMP_PS,"========>%s():eRfSleep\n", __func__);
+				{
+					if(priv->rtllib->eRFPowerState == eRfOff)
+						break;
+					
+					for(QueueID = 0, i = 0; QueueID < MAX_TX_QUEUE; )
+					{
+						ring = &priv->tx_ring[QueueID];
+						if(skb_queue_len(&ring->queue) == 0)
+						{
+							QueueID++;
+							continue;
+						}
+						#ifdef TO_DO_LIST
+						#if( DEV_BUS_TYPE==PCI_INTERFACE)
+							else if(IsLowPowerState(Adapter))
+							{
+								RT_TRACE(COMP_PS, "eRf Off/Sleep: %d times TcbBusyQueue[%d] !=0 but lower power state!\n", (i+1), QueueID);
+								break;
+							}
+						#endif
+						#endif
+						else
+						{
+							RT_TRACE(COMP_PS, "eRf Off/Sleep: %d times TcbBusyQueue[%d] !=0 before doze!\n", (i+1), QueueID);
+							udelay(10);
+							i++;
+						}
+						
+						if(i >= MAX_DOZE_WAITING_TIMES_9x)
+						{
+							RT_TRACE(COMP_PS, "\n\n\n %s(): eRfOff: %d times TcbBusyQueue[%d] != 0 !!!\n\n\n", __FUNCTION__,MAX_DOZE_WAITING_TIMES_9x, QueueID);
+							break;
+						}
+					}		
+
+					SET_RTL8192SE_RF_SLEEP(dev);
+				}
+				break;
+
+			default:
+				bResult = false;
+				RT_TRACE(COMP_ERR, "phy_SetRFPowerState8192S(): unknow state to set: 0x%X!!!\n", eRFPowerState);
+				break;
+		} 
+		break;
+	}
+
+	if(bResult)
+	{
+		priv->rtllib->eRFPowerState = eRFPowerState;
+	}
+	
+	priv->SetRFPowerStateInProgress = false;
+
+	return bResult;
+}
+
+
+void
+PHY_SwitchEphyParameter(struct net_device* dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	write_nic_dword(dev, 0x540, 0x73c11);
+	write_nic_dword(dev, 0x548, 0x2407c);
+	
+	write_nic_word(dev, 0x550, 0x1000);
+	write_nic_byte(dev, 0x554, 0x20);	
+	phy_CheckEphySwitchReady(dev);
+
+	write_nic_word(dev, 0x550, 0xa0eb);
+	write_nic_byte(dev, 0x554, 0x3e);
+	phy_CheckEphySwitchReady(dev);
+	
+	write_nic_word(dev, 0x550, 0xff80);
+	write_nic_byte(dev, 0x554, 0x39);
+	phy_CheckEphySwitchReady(dev);
+
+	if (priv->pci_bridge_vendor & (PCI_BRIDGE_VENDOR_INTEL | PCI_BRIDGE_VENDOR_SIS))
+		write_nic_byte(dev, 0x560, 0x40);
+	else
+		write_nic_byte(dev, 0x560, 0x00);
+	
+}	
+
+
+ void
+PHY_GetTxPowerLevel8192S(
+	struct net_device* dev,
+	 long*    		powerlevel
+	)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u8			TxPwrLevel = 0;
+	long			TxPwrDbm;
+
+	TxPwrLevel = priv->CurrentCckTxPwrIdx;
+	TxPwrDbm = phy_TxPwrIdxToDbm(dev, WIRELESS_MODE_B, TxPwrLevel);
+
+	TxPwrLevel = priv->CurrentOfdm24GTxPwrIdx + priv->LegacyHTTxPowerDiff;
+
+	if(phy_TxPwrIdxToDbm(dev, WIRELESS_MODE_G, TxPwrLevel) > TxPwrDbm)
+		TxPwrDbm = phy_TxPwrIdxToDbm(dev, WIRELESS_MODE_G, TxPwrLevel);
+	TxPwrLevel = priv->CurrentOfdm24GTxPwrIdx;
+
+	if(phy_TxPwrIdxToDbm(dev, WIRELESS_MODE_N_24G, TxPwrLevel) > TxPwrDbm)
+		TxPwrDbm = phy_TxPwrIdxToDbm(dev, WIRELESS_MODE_N_24G, TxPwrLevel);
+	*powerlevel = TxPwrDbm;
+}
+
+#if 1
+void getTxPowerIndex(
+	struct net_device* 	dev,
+	u8				channel,
+	u8*				cckPowerLevel,
+	u8*				ofdmPowerLevel
+	)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u8				index = (channel -1);
+	cckPowerLevel[0] = priv->RfTxPwrLevelCck[0][index];	
+	cckPowerLevel[1] = priv->RfTxPwrLevelCck[1][index];	
+
+	if (priv->rf_type == RF_1T2R || priv->rf_type == RF_1T1R)
+	{
+		ofdmPowerLevel[0] = priv->RfTxPwrLevelOfdm1T[0][index];
+		ofdmPowerLevel[1] = priv->RfTxPwrLevelOfdm1T[1][index];
+	}
+	else if (priv->rf_type == RF_2T2R)
+	{
+		ofdmPowerLevel[0] = priv->RfTxPwrLevelOfdm2T[0][index];
+		ofdmPowerLevel[1] = priv->RfTxPwrLevelOfdm2T[1][index];
+	}
+	RT_TRACE(COMP_POWER,"Channel-%d, set tx power index !!\n", channel);
+}
+
+void ccxPowerIndexCheck(
+	struct net_device* 	dev,
+	u8				channel,
+	u8*				cckPowerLevel,
+	u8*				ofdmPowerLevel
+	)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+#ifdef TODO 
+	if(	priv->rtllib->iw_mode != IW_MODE_INFRA && priv->bWithCcxCellPwr &&
+		channel == priv->rtllib->current_network.channel)
+	{
+		u8	CckCellPwrIdx = phy_DbmToTxPwrIdx(dev, WIRELESS_MODE_B, priv->CcxCellPwr);
+		u8	LegacyOfdmCellPwrIdx = phy_DbmToTxPwrIdx(dev, WIRELESS_MODE_G, priv->CcxCellPwr);
+		u8	OfdmCellPwrIdx = phy_DbmToTxPwrIdx(dev, WIRELESS_MODE_N_24G, priv->CcxCellPwr);
+
+		RT_TRACE(COMP_TXAGC,  
+		"CCX Cell Limit: %d dbm => CCK Tx power index : %d, Legacy OFDM Tx power index : %d, OFDM Tx power index: %d\n", 
+		priv->CcxCellPwr, CckCellPwrIdx, LegacyOfdmCellPwrIdx, OfdmCellPwrIdx);
+		RT_TRACE(COMP_TXAGC, 
+		"EEPROM channel(%d) => CCK Tx power index: %d, Legacy OFDM Tx power index : %d, OFDM Tx power index: %d\n",
+		channel, cckPowerLevel[0], ofdmPowerLevel[0] + priv->LegacyHTTxPowerDiff, ofdmPowerLevel[0]); 
+
+		if(cckPowerLevel[0] > CckCellPwrIdx)
+			cckPowerLevel[0] = CckCellPwrIdx;
+		if(ofdmPowerLevel[0] + priv->LegacyHTTxPowerDiff > LegacyOfdmCellPwrIdx)
+		{
+			if((OfdmCellPwrIdx - priv->LegacyHTTxPowerDiff) > 0)
+			{
+				ofdmPowerLevel[0] = OfdmCellPwrIdx - priv->LegacyHTTxPowerDiff;
+			}
+			else
+			{
+				ofdmPowerLevel[0] = 0;
+			}
+		}
+
+		RT_TRACE(COMP_TXAGC,  
+		"Altered CCK Tx power index : %d, Legacy OFDM Tx power index: %d, OFDM Tx power index: %d\n", 
+		cckPowerLevel[0], ofdmPowerLevel[0] + priv->LegacyHTTxPowerDiff, ofdmPowerLevel[0]);
+	}
+
+#endif
+	priv->CurrentCckTxPwrIdx = cckPowerLevel[0];
+	priv->CurrentOfdm24GTxPwrIdx = ofdmPowerLevel[0];
+
+	RT_TRACE(COMP_TXAGC,  
+		"PHY_SetTxPowerLevel8192S(): CCK Tx power index : %d, Legacy OFDM Tx power index: %d, OFDM Tx power index: %d\n", 
+		cckPowerLevel[0], ofdmPowerLevel[0] + priv->LegacyHTTxPowerDiff, ofdmPowerLevel[0]);
+
+}
+/*-----------------------------------------------------------------------------
+ * Function:    SetTxPowerLevel8190()
+ *
+ * Overview:    This function is export to "HalCommon" moudule
+ *			We must consider RF path later!!!!!!!
+ *
+ * Input:       PADAPTER		Adapter
+ *			u1Byte		channel
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *	2008/11/04	MHC		We remove EEPROM_93C56.
+ *						We need to move CCX relative code to independet file.
+ *	2009/01/21	MHC		Support new EEPROM format from SD3 requirement.
+ *
+ *---------------------------------------------------------------------------*/
+void rtl8192_phy_setTxPower(struct net_device* dev, u8	channel)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u8	cckPowerLevel[2], ofdmPowerLevel[2];	
+
+	if(priv->bTXPowerDataReadFromEEPORM == false)
+		return;
+	getTxPowerIndex(dev, channel, &cckPowerLevel[0], &ofdmPowerLevel[0]);
+	RT_TRACE(COMP_POWER, "Channel-%d, cckPowerLevel (A / B) = 0x%x / 0x%x,   ofdmPowerLevel (A / B) = 0x%x / 0x%x\n", 
+		channel, cckPowerLevel[0], cckPowerLevel[1], ofdmPowerLevel[0], ofdmPowerLevel[1]);
+
+	ccxPowerIndexCheck(dev, channel, &cckPowerLevel[0], &ofdmPowerLevel[0]);
+
+	switch(priv->rf_chip)
+	{
+		case RF_8225:
+		break;
+
+		case RF_8256:
+			;
+			break;
+
+		case RF_6052:
+			PHY_RF6052SetCckTxPower(dev, cckPowerLevel[0]);
+			PHY_RF6052SetOFDMTxPower(dev, &ofdmPowerLevel[0], channel);
+			break;
+
+		case RF_8258:
+			break;
+		default:
+            		break;
+	}
+}
+#else
+void rtl8192_phy_setTxPower(struct net_device* dev, u8	channel)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u8	powerlevel = (u8)EEPROM_Default_TxPower, powerlevelOFDM24G = 0x10;
+	s8 ant_pwr_diff = 0;
+	u32	u4RegValue;
+	u8	index = (channel -1);
+	u8	pwrdiff[2] = {0};
+	u8	ht20pwr[2] = {0}, ht40pwr[2] = {0};
+	u8	rfpath = 0, rfpathnum = 2;
+
+	if(priv->bTXPowerDataReadFromEEPORM == false)
+		return;
+
+
+	powerlevel = priv->RfTxPwrLevelCck[0][index];
+		
+	if (priv->rf_type == RF_1T2R || priv->rf_type == RF_1T1R)
+	{
+		powerlevelOFDM24G = priv->RfTxPwrLevelOfdm1T[0][index];
+		
+		
+		rfpathnum = 1;
+		ht20pwr[0] = ht40pwr[0] = priv->RfTxPwrLevelOfdm1T[0][index];
+	}
+	else if (priv->rf_type == RF_2T2R)
+	{
+		powerlevelOFDM24G = priv->RfTxPwrLevelOfdm2T[0][index];
+		ant_pwr_diff = 	priv->RfTxPwrLevelOfdm2T[1][index] - 
+						priv->RfTxPwrLevelOfdm2T[0][index];
+	
+		RT_TRACE(COMP_POWER, "CH-%d HT40 A/B Pwr index = %x/%x(%d/%d)\n", 
+			channel, priv->RfTxPwrLevelOfdm2T[0][index], 
+			priv->RfTxPwrLevelOfdm2T[1][index],
+			priv->RfTxPwrLevelOfdm2T[0][index],
+			priv->RfTxPwrLevelOfdm2T[1][index]);	
+
+		ht20pwr[0] = ht40pwr[0] = priv->RfTxPwrLevelOfdm2T[0][index];
+		ht20pwr[1] = ht40pwr[1] = priv->RfTxPwrLevelOfdm2T[1][index];
+	}
+	RT_TRACE(COMP_POWER, "Channel-%d, set tx power index\n", channel);
+				
+	if (priv->eeprom_version >= 2)	
+	{		
+		if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
+		{
+			for (rfpath = 0; rfpath < rfpathnum; rfpath++)
+			{
+				pwrdiff[rfpath] = priv->TxPwrHt20Diff[rfpath][index];
+
+				if (pwrdiff[rfpath] < 8)	
+				{
+					ht20pwr[rfpath] += pwrdiff[rfpath];
+				}
+				else				
+				{
+					ht20pwr[rfpath] -= (16-pwrdiff[rfpath]);
+				}
+			}
+
+			if (priv->rf_type == RF_2T2R)
+				ant_pwr_diff = ht20pwr[1] - ht20pwr[0];
+
+			RT_TRACE(COMP_POWER, "HT20 to HT40 pwrdiff[A/B]=%d/%d, ant_pwr_diff=%d(B-A=%d-%d)\n", 
+				pwrdiff[0], pwrdiff[1], ant_pwr_diff, ht20pwr[1], ht20pwr[0]);	
+		}
+	}
+				
+	if(ant_pwr_diff > 7)
+		ant_pwr_diff = 7;
+	if(ant_pwr_diff < -8)
+		ant_pwr_diff = -8;
+				
+	RT_TRACE(COMP_POWER, "CCK/HT Power index = %x/%x(%d/%d), ant_pwr_diff=%d\n", 
+		powerlevel, powerlevelOFDM24G, powerlevel, powerlevelOFDM24G, ant_pwr_diff);
+		
+	ant_pwr_diff &= 0xf;	
+
+	priv->AntennaTxPwDiff[2] = 0;
+	priv->AntennaTxPwDiff[1] = 0;
+	priv->AntennaTxPwDiff[0] = (u8)(ant_pwr_diff);		
+	RT_TRACE(COMP_POWER, "pHalData->AntennaTxPwDiff[0]/[1]/[2] = 0x%x/0x%x/0x%x\n", 
+		priv->AntennaTxPwDiff[0], priv->AntennaTxPwDiff[1], priv->AntennaTxPwDiff[2]);
+	u4RegValue = (	priv->AntennaTxPwDiff[2]<<8 | 
+					priv->AntennaTxPwDiff[1]<<4 | 
+					priv->AntennaTxPwDiff[0]	);
+	RT_TRACE(COMP_POWER, "BCD-Diff=0x%x\n", u4RegValue);
+
+	rtl8192_setBBreg(dev, rFPGA0_TxGainStage, (bXBTxAGC|bXCTxAGC|bXDTxAGC), u4RegValue);
+		
+#ifdef TODO 
+	if(	priv->rtllib->iw_mode != IW_MODE_INFRA && priv->bWithCcxCellPwr &&
+		channel == priv->rtllib->current_network.channel)
+	{
+		u8	CckCellPwrIdx = phy_DbmToTxPwrIdx(dev, WIRELESS_MODE_B, priv->CcxCellPwr);
+		u8	LegacyOfdmCellPwrIdx = phy_DbmToTxPwrIdx(dev, WIRELESS_MODE_G, priv->CcxCellPwr);
+		u8	OfdmCellPwrIdx = phy_DbmToTxPwrIdx(dev, WIRELESS_MODE_N_24G, priv->CcxCellPwr);
+
+		RT_TRACE(COMP_TXAGC,  
+		("CCX Cell Limit: %d dbm => CCK Tx power index : %d, Legacy OFDM Tx power index : %d, OFDM Tx power index: %d\n", 
+		priv->CcxCellPwr, CckCellPwrIdx, LegacyOfdmCellPwrIdx, OfdmCellPwrIdx));
+		RT_TRACE(COMP_TXAGC,  
+		("EEPROM channel(%d) => CCK Tx power index: %d, Legacy OFDM Tx power index : %d, OFDM Tx power index: %d\n",
+		channel, powerlevel, powerlevelOFDM24G + priv->LegacyHTTxPowerDiff, powerlevelOFDM24G)); 
+
+		if(powerlevel > CckCellPwrIdx)
+			powerlevel = CckCellPwrIdx;
+		if(powerlevelOFDM24G + priv->LegacyHTTxPowerDiff > LegacyOfdmCellPwrIdx)
+		{
+			if((OfdmCellPwrIdx - priv->LegacyHTTxPowerDiff) > 0)
+			{
+				powerlevelOFDM24G = OfdmCellPwrIdx - priv->LegacyHTTxPowerDiff;
+			}
+			else
+			{
+				powerlevelOFDM24G = 0;
+			}
+		}
+
+		RT_TRACE(COMP_TXAGC, 
+		("Altered CCK Tx power index : %d, Legacy OFDM Tx power index: %d, OFDM Tx power index: %d\n", 
+		powerlevel, powerlevelOFDM24G + priv->LegacyHTTxPowerDiff, powerlevelOFDM24G));
+	}
+#endif
+	priv->CurrentCckTxPwrIdx = powerlevel;
+	priv->CurrentOfdm24GTxPwrIdx = powerlevelOFDM24G;
+
+	RT_TRACE(COMP_POWER, "PHY_SetTxPowerLevel8192S(): CCK Tx power index : %d, Legacy OFDM Tx power index: %d, OFDM Tx power index: %d\n", 
+		powerlevel, powerlevelOFDM24G + priv->LegacyHTTxPowerDiff, powerlevelOFDM24G);
+	
+	switch(priv->rf_chip)
+	{
+		case RF_8225:
+			break;
+
+		case RF_8256:
+			break;
+
+		case RF_6052:
+			PHY_RF6052SetCckTxPower(dev, powerlevel);
+			PHY_RF6052SetOFDMTxPower(dev, powerlevelOFDM24G, channel);
+			break;
+
+		case RF_8258:
+			break;
+		default:
+			break;
+	}	
+
+}
+#endif
+
+bool PHY_UpdateTxPowerDbm8192S(struct net_device* dev, long powerInDbm)
+{
+	struct r8192_priv 	*priv = rtllib_priv(dev);
+	u8				idx;
+	u8				rf_path;
+
+	u8	CckTxPwrIdx = phy_DbmToTxPwrIdx(dev, WIRELESS_MODE_B, powerInDbm);
+	u8	OfdmTxPwrIdx = phy_DbmToTxPwrIdx(dev, WIRELESS_MODE_N_24G, powerInDbm);
+
+	if(OfdmTxPwrIdx - priv->LegacyHTTxPowerDiff > 0)
+		OfdmTxPwrIdx -= priv->LegacyHTTxPowerDiff;
+	else
+		OfdmTxPwrIdx = 0;
+
+	RT_TRACE(COMP_POWER, "PHY_UpdateTxPowerDbm8192S(): %ld dBm , CckTxPwrIdx = %d, OfdmTxPwrIdx = %d\n", powerInDbm, CckTxPwrIdx, OfdmTxPwrIdx);
+
+	for(idx = 0; idx < 14; idx++)
+	{
+		priv->TxPowerLevelCCK[idx] = CckTxPwrIdx;
+		priv->TxPowerLevelCCK_A[idx] = CckTxPwrIdx;
+		priv->TxPowerLevelCCK_C[idx] = CckTxPwrIdx;
+		priv->TxPowerLevelOFDM24G[idx] = OfdmTxPwrIdx;
+		priv->TxPowerLevelOFDM24G_A[idx] = OfdmTxPwrIdx;
+		priv->TxPowerLevelOFDM24G_C[idx] = OfdmTxPwrIdx;
+		for (rf_path = 0; rf_path < 2; rf_path++)
+		{
+			priv->RfTxPwrLevelCck[rf_path][idx] = CckTxPwrIdx;
+			priv->RfTxPwrLevelOfdm1T[rf_path][idx] = 
+			priv->RfTxPwrLevelOfdm2T[rf_path][idx] = OfdmTxPwrIdx;
+		}
+	}
+
+	rtl8192_phy_setTxPower(dev, priv->chan);
+
+	return true;	
+}
+
+extern void PHY_SetBeaconHwReg(	struct net_device* dev, u16 BeaconInterval)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u32 NewBeaconNum;	
+
+	if(priv->pFirmware->FirmwareVersion >= 0x33) 
+	{
+		write_nic_dword(dev,WFM5,0xF1000000|(BeaconInterval<<8));
+	}
+	else
+	{
+	NewBeaconNum = BeaconInterval *32 - 64;
+	write_nic_dword(dev, WFM3+4, NewBeaconNum);
+	write_nic_dword(dev, WFM3, 0xB026007C);
+}
+}
+
+static u8 phy_DbmToTxPwrIdx(
+	struct net_device* dev, 
+	WIRELESS_MODE	WirelessMode,
+	long			PowerInDbm
+	)
+{
+	u8				TxPwrIdx = 0;
+	long				Offset = 0;
+	
+
+	switch(WirelessMode)
+	{
+	case WIRELESS_MODE_B:
+		Offset = -7;
+		break;
+
+	case WIRELESS_MODE_G:
+		Offset = -8;
+		break;
+
+	case WIRELESS_MODE_N_24G:
+	default:
+		Offset = -8;
+		break;
+	}
+
+	if((PowerInDbm - Offset) > 0)
+	{
+		TxPwrIdx = (u8)((PowerInDbm - Offset) * 2);
+	}
+	else
+	{
+		TxPwrIdx = 0;
+	}
+
+	if(TxPwrIdx > MAX_TXPWR_IDX_NMODE_92S)
+		TxPwrIdx = MAX_TXPWR_IDX_NMODE_92S;
+
+	return TxPwrIdx;
+}
+
+static long phy_TxPwrIdxToDbm(
+	struct net_device* dev,
+	WIRELESS_MODE	WirelessMode,
+	u8			TxPwrIdx
+	)
+{
+	long				Offset = 0;
+	long				PwrOutDbm = 0;
+	
+	switch(WirelessMode)
+	{
+	case WIRELESS_MODE_B:
+		Offset = -7;
+		break;
+
+	case WIRELESS_MODE_G:
+	case WIRELESS_MODE_N_24G:
+		Offset = -8;
+		break;
+	default:
+		Offset = -8;
+		break;
+	}
+
+	PwrOutDbm = TxPwrIdx / 2 + Offset; 
+
+	return PwrOutDbm;
+}
+
+#ifdef TO_DO_LIST
+extern	void 
+PHY_ScanOperationBackup8192S(
+	struct net_device* dev,
+	u8 Operation
+	)
+{
+#if(RTL8192S_DISABLE_FW_DM == 0)
+
+	if(!Adapter->bDriverStopped)
+	{
+		switch(Operation)
+		{
+			case SCAN_OPT_BACKUP:
+				Adapter->HalFunc.SetFwCmdHandler(Adapter, FW_CMD_PAUSE_DM_BY_SCAN);
+				break;
+
+			case SCAN_OPT_RESTORE:
+				Adapter->HalFunc.SetFwCmdHandler(Adapter, FW_CMD_RESUME_DM_BY_SCAN);
+				break;
+
+			default:
+				RT_TRACE(COMP_SCAN, DBG_LOUD, ("Unknown Scan Backup Operation. \n"));
+				break;
+		}
+	}
+#endif
+}
+#endif
+void PHY_SetBWModeCallback8192S(struct net_device *dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u8	 			regBwOpMode, regRRSR_RSC;
+
+
+
+	RT_TRACE(COMP_SWBW, "==>SetBWModeCallback8192s()  Switch to %s bandwidth\n", \
+					priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz");
+
+	if(priv->rf_chip == RF_PSEUDO_11N)
+	{
+		priv->SetBWModeInProgress= false;
+		return;
+	}
+	if(IS_NIC_DOWN(priv)){
+		priv->SwChnlInProgress = priv->SetBWModeInProgress = false;
+		return;
+	}
+		
+	regBwOpMode = read_nic_byte(dev, BW_OPMODE);
+	regRRSR_RSC = read_nic_byte(dev, RRSR+2);
+	
+	switch(priv->CurrentChannelBW)
+	{
+		case HT_CHANNEL_WIDTH_20:
+			regBwOpMode |= BW_OPMODE_20MHZ;
+			write_nic_byte(dev, BW_OPMODE, regBwOpMode);
+			break;
+			   
+		case HT_CHANNEL_WIDTH_20_40:
+			regBwOpMode &= ~BW_OPMODE_20MHZ;
+			write_nic_byte(dev, BW_OPMODE, regBwOpMode);
+
+			break;
+
+		default:
+			RT_TRACE(COMP_DBG, "SetBWModeCallback8192s():\
+						unknown Bandwidth: %#X\n",priv->CurrentChannelBW);
+			break;
+	}
+	
+	switch(priv->CurrentChannelBW)
+	{
+		case HT_CHANNEL_WIDTH_20:
+			rtl8192_setBBreg(dev, rFPGA0_RFMOD, bRFMOD, 0x0);
+			rtl8192_setBBreg(dev, rFPGA1_RFMOD, bRFMOD, 0x0);
+
+			if(priv->card_8192_version >= VERSION_8192S_BCUT)
+				write_nic_byte(dev, rFPGA0_AnalogParameter2, 0x58);
+			break;
+
+		case HT_CHANNEL_WIDTH_20_40:
+			rtl8192_setBBreg(dev, rFPGA0_RFMOD, bRFMOD, 0x1);
+			rtl8192_setBBreg(dev, rFPGA1_RFMOD, bRFMOD, 0x1);
+			
+
+			rtl8192_setBBreg(dev, rCCK0_System, bCCKSideBand, (priv->nCur40MhzPrimeSC>>1));
+			rtl8192_setBBreg(dev, rOFDM1_LSTF, 0xC00, priv->nCur40MhzPrimeSC);			
+			
+			if(priv->card_8192_version >= VERSION_8192S_BCUT)
+				write_nic_byte(dev, rFPGA0_AnalogParameter2, 0x18);
+			break;
+			
+		default:
+			RT_TRACE(COMP_DBG, "SetBWModeCallback8192s(): unknown Bandwidth: %#X\n"\
+						,priv->CurrentChannelBW);
+			break;
+			
+	}
+
+
+	switch( priv->rf_chip )
+	{
+		case RF_8225:		
+			break;	
+			
+		case RF_8256:
+			break;
+			
+		case RF_8258:
+			break;
+
+		case RF_PSEUDO_11N:
+			break;
+
+		case RF_6052:
+			PHY_RF6052SetBandwidth(dev, priv->CurrentChannelBW);
+			break;
+		default:
+			printk("Unknown rf_chip: %d\n", priv->rf_chip);
+			break;
+	}
+
+	priv->SetBWModeInProgress= false;
+
+	RT_TRACE(COMP_SWBW, "<==SetBWModeCallback8192s() \n" );
+}
+
+
+void rtl8192_SetBWMode(struct net_device *dev, HT_CHANNEL_WIDTH	Bandwidth, HT_EXTCHNL_OFFSET Offset)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+
+	
+
+
+	if(priv->SetBWModeInProgress)
+		return;
+
+	priv->SetBWModeInProgress= true;
+	
+	priv->CurrentChannelBW = Bandwidth;
+	
+	if(Offset==HT_EXTCHNL_OFFSET_LOWER)
+		priv->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_UPPER;
+	else if(Offset==HT_EXTCHNL_OFFSET_UPPER)
+		priv->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_LOWER;
+	else
+		priv->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
+
+#if 0
+	if(!priv->bDriverStopped)
+	{
+#ifdef USE_WORKITEM	
+		PlatformScheduleWorkItem(&(priv->SetBWModeWorkItem));
+#else
+		PlatformSetTimer(dev, &(priv->SetBWModeTimer), 0);
+#endif		
+	}
+#endif
+	if(!IS_NIC_DOWN(priv)){
+		PHY_SetBWModeCallback8192S(dev);
+	} else {
+		priv->SetBWModeInProgress= false;
+	}
+}
+
+void PHY_SwChnlCallback8192S(struct net_device *dev)
+{
+
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u32		delay;
+	
+	RT_TRACE(COMP_CH, "==>SwChnlCallback8190Pci(), switch to channel %d\n", priv->chan);
+	
+	if(IS_NIC_DOWN(priv))
+	{	
+		printk("%s: driver is not up\n", __FUNCTION__);
+		priv->SwChnlInProgress = priv->SetBWModeInProgress = false;
+		return;
+	}	
+	if(priv->rf_chip == RF_PSEUDO_11N)
+	{
+		printk("%s: rt chip is RF_PSEUDO_11N\n", __FUNCTION__);
+		priv->SwChnlInProgress=false;
+		return; 								
+	}
+	
+	do{
+		if(!priv->SwChnlInProgress)
+			break;
+
+		if(!phy_SwChnlStepByStep(dev, priv->chan, &priv->SwChnlStage, &priv->SwChnlStep, &delay))
+		{
+			if(delay>0)
+			{
+				mdelay(delay);
+			}
+			else
+			continue;
+		}
+		else
+		{
+			priv->SwChnlInProgress=false;
+			break;
+		}
+	}while(true);
+}
+
+u8 rtl8192_phy_SwChnl(struct net_device* dev, u8 channel)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+
+	if(IS_NIC_DOWN(priv))
+	{
+		printk("%s: driver is not up.\n",__FUNCTION__);
+		priv->SwChnlInProgress = priv->SetBWModeInProgress = false;
+		return false;
+	}	
+	if(priv->SwChnlInProgress){
+		printk("%s: SwChnl is in progress\n",__FUNCTION__);
+		return false;
+	}
+
+	if(priv->SetBWModeInProgress){
+		printk("%s: Set BWMode is in progress\n",__FUNCTION__);
+		return false;
+	}
+	if (0)
+	{
+		u8 path;
+		for(path=0; path<2; path++){
+		printk("============>to set channel:%x\n", rtl8192_phy_QueryRFReg(dev, path, 0x18, 0x3ff));
+		udelay(10);
+		}
+	}
+	switch(priv->rtllib->mode)
+	{
+	case WIRELESS_MODE_A:
+	case WIRELESS_MODE_N_5G:
+		if (channel<=14){
+			RT_TRACE(COMP_ERR, "WIRELESS_MODE_A but channel<=14");
+			return false;
+		}
+		break;
+		
+	case WIRELESS_MODE_B:
+		if (channel>14){
+			RT_TRACE(COMP_ERR, "WIRELESS_MODE_B but channel>14");
+			return false;
+		}
+		break;
+		
+	case WIRELESS_MODE_G:
+	case WIRELESS_MODE_N_24G:
+		if (channel>14){
+			RT_TRACE(COMP_ERR, "WIRELESS_MODE_G but channel>14");
+			return false;
+		}
+		break;
+
+	default:
+		break;
+	}
+	
+	priv->SwChnlInProgress = true;
+	if( channel == 0)
+		channel = 1;
+	
+	priv->chan=channel;
+
+	priv->SwChnlStage=0;
+	priv->SwChnlStep=0;
+
+#if 0
+	if(!dev->bDriverStopped)
+	{
+#ifdef USE_WORKITEM	
+		PlatformScheduleWorkItem(&(priv->SwChnlWorkItem));
+#else
+		PlatformSetTimer(dev, &(priv->SwChnlTimer), 0);
+#endif
+	}
+#endif
+
+	if(!IS_NIC_DOWN(priv)){
+		PHY_SwChnlCallback8192S(dev);
+	} else {
+		priv->SwChnlInProgress = false;
+	}
+	return true;	
+}
+
+
+void PHY_SwChnlPhy8192S(	
+	struct net_device* dev,
+	u8		channel
+	)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	
+	RT_TRACE(COMP_SCAN, "==>PHY_SwChnlPhy8192S(), switch to channel %d.\n", priv->chan);
+
+#ifdef TO_DO_LIST
+	if(RT_CANNOT_IO(dev))
+		return;
+#endif
+
+	if(priv->SwChnlInProgress)
+		return;
+	
+	if(priv->rf_chip == RF_PSEUDO_11N)
+	{
+		priv->SwChnlInProgress=false;
+		return;
+	}
+	
+	priv->SwChnlInProgress = true;
+	if( channel == 0)
+		channel = 1;
+	
+	priv->chan=channel;
+	
+	priv->SwChnlStage = 0;
+	priv->SwChnlStep = 0;
+	
+	phy_FinishSwChnlNow(dev,channel);
+	
+	priv->SwChnlInProgress = false;
+}
+
+static bool
+phy_SwChnlStepByStep(
+	struct net_device* dev,
+	u8		channel,
+	u8		*stage,
+	u8		*step,
+	u32		*delay
+	)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	SwChnlCmd				PreCommonCmd[MAX_PRECMD_CNT];
+	u32					PreCommonCmdCnt;
+	SwChnlCmd				PostCommonCmd[MAX_POSTCMD_CNT];
+	u32					PostCommonCmdCnt;
+	SwChnlCmd				RfDependCmd[MAX_RFDEPENDCMD_CNT];
+	u32					RfDependCmdCnt;
+	SwChnlCmd				*CurrentCmd = NULL;	
+	u8					eRFPath;	
+	u16					u2Channel = 0;
+	
+	RT_TRACE(COMP_CH, "===========>%s(), channel:%d, stage:%d, step:%d\n", __FUNCTION__, channel, *stage, *step);		
+	if (!IsLegalChannel(priv->rtllib, channel))
+	{
+		RT_TRACE(COMP_ERR, "=============>set to illegal channel:%d\n", channel);
+		return true; 
+	}		
+
+	
+	PreCommonCmdCnt = 0;
+	phy_SetSwChnlCmdArray(PreCommonCmd, PreCommonCmdCnt++, MAX_PRECMD_CNT, 
+				CmdID_SetTxPowerLevel, 0, 0, 0);
+	phy_SetSwChnlCmdArray(PreCommonCmd, PreCommonCmdCnt++, MAX_PRECMD_CNT, 
+				CmdID_End, 0, 0, 0);
+	
+	PostCommonCmdCnt = 0;
+
+	phy_SetSwChnlCmdArray(PostCommonCmd, PostCommonCmdCnt++, MAX_POSTCMD_CNT, 
+				CmdID_End, 0, 0, 0);
+	
+	RfDependCmdCnt = 0;
+	switch( priv->rf_chip )
+	{
+		case RF_8225:		
+		if (channel < 1 || channel > 14)
+			RT_TRACE(COMP_ERR, "illegal channel for zebra:%d\n", channel);
+		phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, 
+			CmdID_RF_WriteReg, rRfChannel, channel, 10);
+		phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, 
+		CmdID_End, 0, 0, 0);
+		break;	
+		
+	case RF_8256:
+		if (channel < 1 || channel > 14)
+			RT_TRACE(COMP_ERR, "illegal channel for zebra:%d\n", channel);
+		phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, 
+			CmdID_RF_WriteReg, rRfChannel, channel, 10);
+		phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, 
+		CmdID_End, 0, 0, 0);
+		break;
+		
+	case RF_6052:
+		if (channel < 1 || channel > 14)
+			RT_TRACE(COMP_ERR, "illegal channel for zebra:%d\n", channel);
+		
+		u2Channel = channel;
+		
+		switch(priv->CurrentChannelBW)
+		{
+		case HT_CHANNEL_WIDTH_20:
+			u2Channel |= BIT10;
+			break;
+			
+		case HT_CHANNEL_WIDTH_20_40:
+			u2Channel &= ~BIT10;
+			break;
+		default:
+			u2Channel |= BIT10; 
+			break;
+		}	
+		u2Channel |= BIT12|BIT13|BIT14;
+		
+		phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, 
+			CmdID_RF_WriteReg, RF_CHNLBW, u2Channel, 10);
+		phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, 
+			CmdID_End, 0, 0, 0);		
+		break;
+
+	case RF_8258:
+		break;
+		
+	default:
+		return false;
+		break;
+	}
+
+	
+	do{
+		switch(*stage)
+		{
+		case 0:
+			CurrentCmd=&PreCommonCmd[*step];
+			break;
+		case 1:
+			CurrentCmd=&RfDependCmd[*step];
+			break;
+		case 2:
+			CurrentCmd=&PostCommonCmd[*step];
+			break;
+		}
+		
+		if(CurrentCmd->CmdID==CmdID_End)
+		{
+			if((*stage)==2)
+			{
+				return true;
+			}
+			else
+			{
+				(*stage)++;
+				(*step)=0;
+				continue;
+			}
+		}
+		
+		switch(CurrentCmd->CmdID)
+		{
+		case CmdID_SetTxPowerLevel:
+#ifndef CONFIG_MP
+				rtl8192_phy_setTxPower(dev,channel);
+#endif
+			break;
+		case CmdID_WritePortUlong:
+			write_nic_dword(dev, CurrentCmd->Para1, CurrentCmd->Para2);
+			break;
+		case CmdID_WritePortUshort:
+			write_nic_word(dev, CurrentCmd->Para1, (u16)CurrentCmd->Para2);
+			break;
+		case CmdID_WritePortUchar:
+			write_nic_byte(dev, CurrentCmd->Para1, (u8)CurrentCmd->Para2);
+			break;
+		case CmdID_RF_WriteReg:	
+			for(eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++)
+			{
+				if (IS_HARDWARE_TYPE_8192SE(dev)) {
+#ifdef CONFIG_FW_SETCHAN
+					u32 rf_bw = ((priv->RfRegChnlVal[eRFPath] & 0xfffffc00) | (CurrentCmd->Para2 & 0xFF00));
+#endif
+					priv->RfRegChnlVal[eRFPath] = ((priv->RfRegChnlVal[eRFPath] & 0xfffffc00) | CurrentCmd->Para2);
+
+#ifdef CONFIG_FW_SETCHAN
+					rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, CurrentCmd->Para1, bRFRegOffsetMask, rf_bw);				
+#else
+					rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, CurrentCmd->Para1, bRFRegOffsetMask, priv->RfRegChnlVal[eRFPath]);				
+#endif
+				} else {
+					rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, CurrentCmd->Para1, bRFRegOffsetMask, (CurrentCmd->Para2));
+				}
+			}
+			break;
+                default:
+                        break;
+		}
+		
+		break;
+	}while(true);
+
+	(*delay)=CurrentCmd->msDelay;
+	(*step)++;
+	RT_TRACE(COMP_CH, "<===========%s(), channel:%d, stage:%d, step:%d\n", __FUNCTION__, channel, *stage, *step);		
+	return false;
+}
+
+static bool
+phy_SetSwChnlCmdArray(
+	SwChnlCmd*		CmdTable,
+	u32			CmdTableIdx,
+	u32			CmdTableSz,
+	SwChnlCmdID		CmdID,
+	u32			Para1,
+	u32			Para2,
+	u32			msDelay
+	)
+{
+	SwChnlCmd* pCmd;
+
+	if(CmdTable == NULL)
+	{
+		return false;
+	}
+	if(CmdTableIdx >= CmdTableSz)
+	{
+		return false;
+	}
+
+	pCmd = CmdTable + CmdTableIdx;
+	pCmd->CmdID = CmdID;
+	pCmd->Para1 = Para1;
+	pCmd->Para2 = Para2;
+	pCmd->msDelay = msDelay;
+
+	return true;
+}
+
+static void
+phy_FinishSwChnlNow(	
+	struct net_device* dev,
+	u8		channel
+		)
+{
+	struct r8192_priv 	*priv = rtllib_priv(dev);
+	u32			delay;
+  
+	while(!phy_SwChnlStepByStep(dev,channel,&priv->SwChnlStage,&priv->SwChnlStep,&delay))
+	{
+		if(delay>0)
+			mdelay(delay);
+		if(IS_NIC_DOWN(priv))
+			break;
+	}
+}
+
+
+u8 rtl8192_phy_CheckIsLegalRFPath(struct net_device* dev, u32 eRFPath)
+{
+	bool				rtValue = true;
+
+#if 0	
+	if (priv->rf_type == RF_1T2R && eRFPath != RF90_PATH_A)
+	{		
+		rtValue = false;
+	}
+	if (priv->rf_type == RF_1T2R && eRFPath != RF90_PATH_A)
+	{
+
+	}
+#endif
+	return	rtValue;
+
+}	/* PHY_CheckIsLegalRfPath8192S */
+
+
+
+void	
+PHY_IQCalibrate(	struct net_device* dev)
+{
+	u32				i, reg;
+	u32				old_value;
+	long				X, Y, TX0[4];
+	u32				TXA[4];
+	
+
+	for (i = 0; i < 10; i++)
+	{
+		rtl8192_setBBreg(dev, 0xc04, bMaskDWord, 0x00a05430);
+		udelay(5);
+		rtl8192_setBBreg(dev, 0xc08, bMaskDWord, 0x000800e4);
+		udelay(5);
+		rtl8192_setBBreg(dev, 0xe28, bMaskDWord, 0x80800000);
+		udelay(5);
+		rtl8192_setBBreg(dev, 0xe40, bMaskDWord, 0x02140148);
+		udelay(5);
+		rtl8192_setBBreg(dev, 0xe44, bMaskDWord, 0x681604a2);
+		udelay(5);
+		rtl8192_setBBreg(dev, 0xe4c, bMaskDWord, 0x000028d1);
+		udelay(5);
+		rtl8192_setBBreg(dev, 0xe60, bMaskDWord, 0x0214014d);
+		udelay(5);
+		rtl8192_setBBreg(dev, 0xe64, bMaskDWord, 0x281608ba);
+		udelay(5);
+		rtl8192_setBBreg(dev, 0xe6c, bMaskDWord, 0x000028d1);
+		udelay(5);
+		rtl8192_setBBreg(dev, 0xe48, bMaskDWord, 0xfb000001);
+		udelay(5);
+		rtl8192_setBBreg(dev, 0xe48, bMaskDWord, 0xf8000001);
+		udelay(2000);
+		rtl8192_setBBreg(dev, 0xc04, bMaskDWord, 0x00a05433);
+		udelay(5);
+		rtl8192_setBBreg(dev, 0xc08, bMaskDWord, 0x000000e4);
+		udelay(5);
+		rtl8192_setBBreg(dev, 0xe28, bMaskDWord, 0x0);		
+
+	
+		reg = rtl8192_QueryBBReg(dev, 0xeac, bMaskDWord);
+
+		if (!(reg&(BIT27|BIT28|BIT30|BIT31)))
+		{
+			old_value = (rtl8192_QueryBBReg(dev, 0xc80, bMaskDWord) & 0x3FF);
+
+			X = (rtl8192_QueryBBReg(dev, 0xe94, bMaskDWord) & 0x03FF0000)>>16;
+			TXA[RF90_PATH_A] = (X * old_value)/0x100;
+			reg = rtl8192_QueryBBReg(dev, 0xc80, bMaskDWord);
+			reg = (reg & 0xFFFFFC00) | (u32)TXA[RF90_PATH_A];
+			rtl8192_setBBreg(dev, 0xc80, bMaskDWord, reg);
+			udelay(5);
+
+			Y = ( rtl8192_QueryBBReg(dev, 0xe9C, bMaskDWord) & 0x03FF0000)>>16;
+			TX0[RF90_PATH_C] = ((Y * old_value)/0x100);
+			reg = rtl8192_QueryBBReg(dev, 0xc80, bMaskDWord);
+			reg = (reg & 0xffc0ffff) |((u32) (TX0[RF90_PATH_C]&0x3F)<<16);			
+			rtl8192_setBBreg(dev, 0xc80, bMaskDWord, reg);
+			reg = rtl8192_QueryBBReg(dev, 0xc94, bMaskDWord);		
+			reg = (reg & 0x0fffffff) |(((Y&0x3c0)>>6)<<28);
+			rtl8192_setBBreg(dev, 0xc94, bMaskDWord, reg);
+			udelay(5);
+
+			reg = rtl8192_QueryBBReg(dev, 0xc14, bMaskDWord);
+			X = (rtl8192_QueryBBReg(dev, 0xea4, bMaskDWord) & 0x03FF0000)>>16;			
+			reg = (reg & 0xFFFFFC00) |X;
+			rtl8192_setBBreg(dev, 0xc14, bMaskDWord, reg);
+			Y = (rtl8192_QueryBBReg(dev, 0xeac, bMaskDWord) & 0x003F0000)>>16;
+			reg = (reg & 0xFFFF03FF) |Y<<10;
+			rtl8192_setBBreg(dev, 0xc14, bMaskDWord, reg);
+			udelay(5);
+			old_value = (rtl8192_QueryBBReg(dev, 0xc88, bMaskDWord) & 0x3FF);
+			
+			X = (rtl8192_QueryBBReg(dev, 0xeb4, bMaskDWord) & 0x03FF0000)>>16;
+			reg = rtl8192_QueryBBReg(dev, 0xc88, bMaskDWord);
+			TXA[RF90_PATH_A] = (X * old_value) / 0x100;
+			reg = (reg & 0xFFFFFC00) | TXA[RF90_PATH_A];
+			rtl8192_setBBreg(dev, 0xc88, bMaskDWord, reg);
+			udelay(5);
+
+			Y = (rtl8192_QueryBBReg(dev, 0xebc, bMaskDWord)& 0x03FF0000)>>16;
+			TX0[RF90_PATH_C] = ((Y * old_value)/0x100);
+			reg = rtl8192_QueryBBReg(dev, 0xc88, bMaskDWord);
+			reg = (reg & 0xffc0ffff) |( (TX0[RF90_PATH_C]&0x3F)<<16);
+			rtl8192_setBBreg(dev, 0xc88, bMaskDWord, reg);
+			reg = rtl8192_QueryBBReg(dev, 0xc9c, bMaskDWord);
+			reg = (reg & 0x0fffffff) |(((Y&0x3c0)>>6)<<28);
+			rtl8192_setBBreg(dev, 0xc9c, bMaskDWord, reg);
+			udelay(5);
+
+			reg = rtl8192_QueryBBReg(dev, 0xc1c, bMaskDWord);
+			X = (rtl8192_QueryBBReg(dev, 0xec4, bMaskDWord) & 0x03FF0000)>>16;			
+			reg = (reg & 0xFFFFFC00) |X;
+			rtl8192_setBBreg(dev, 0xc1c, bMaskDWord, reg);
+			
+			Y = (rtl8192_QueryBBReg(dev, 0xecc, bMaskDWord) & 0x003F0000)>>16;
+			reg = (reg & 0xFFFF03FF) |Y<<10;
+			rtl8192_setBBreg(dev, 0xc1c, bMaskDWord, reg);
+			udelay(5);
+			
+			RT_TRACE(COMP_INIT, "PHY_IQCalibrate OK\n");
+			break;
+		}
+
+	}
+	
+	
+
+
+}
+
+extern void PHY_IQCalibrateBcut(struct net_device* dev)
+{
+	u32				i, reg;
+	u32				old_value;
+	long				X, Y, TX0[4];
+	u32				TXA[4];	
+	u32				calibrate_set[13] = {0};
+	u32				load_value[13];
+	u8			RfPiEnable=0;
+	
+	/*
+	0xee0[31:0]=0x3fed92fb;   
+	0xedc[31:0] =0x3fed92fb;   
+	0xe70[31:0] =0x3fed92fb;   
+	0xe74[31:0] =0x3fed92fb;   
+	0xe78[31:0] =0x3fed92fb;   
+	0xe7c[31:0]= 0x3fed92fb;   
+	0xe80[31:0]= 0x3fed92fb;   
+	0xe84[31:0]= 0x3fed92fb; 
+	0xe88[31:0]= 0x3fed92fb;  
+	0xe8c[31:0]= 0x3fed92fb;   
+	0xed0[31:0]= 0x3fed92fb;   
+	0xed4[31:0]= 0x3fed92fb;  
+	0xed8[31:0]= 0x3fed92fb;
+	*/
+	calibrate_set [0] = 0xee0;
+	calibrate_set [1] = 0xedc;
+	calibrate_set [2] = 0xe70;
+	calibrate_set [3] = 0xe74;
+	calibrate_set [4] = 0xe78;
+	calibrate_set [5] = 0xe7c;
+	calibrate_set [6] = 0xe80;
+	calibrate_set [7] = 0xe84;
+	calibrate_set [8] = 0xe88;
+	calibrate_set [9] = 0xe8c;
+	calibrate_set [10] = 0xed0;
+	calibrate_set [11] = 0xed4;
+	calibrate_set [12] = 0xed8;
+	for (i = 0; i < 13; i++)
+	{
+		load_value[i] = rtl8192_QueryBBReg(dev, calibrate_set[i], bMaskDWord);
+		rtl8192_setBBreg(dev, calibrate_set[i], bMaskDWord, 0x3fed92fb);		
+		
+	}
+	
+	RfPiEnable = (u8)rtl8192_QueryBBReg(dev, rFPGA0_XA_HSSIParameter1, BIT8);
+	for (i = 0; i < 10; i++)
+	{
+		RT_TRACE(COMP_INIT, "IQK -%d\n", i);	
+		if (!RfPiEnable)	
+		{
+			rtl8192_setBBreg(dev, 0x820, bMaskDWord, 0x01000100);
+			rtl8192_setBBreg(dev, 0x828, bMaskDWord, 0x01000100);
+		}
+	
+		rtl8192_setBBreg(dev, 0xc04, bMaskDWord, 0x00a05430);
+		udelay(5);
+		rtl8192_setBBreg(dev, 0xc08, bMaskDWord, 0x000800e4);
+		udelay(5);
+		rtl8192_setBBreg(dev, 0xe28, bMaskDWord, 0x80800000);
+		udelay(5);
+		rtl8192_setBBreg(dev, 0xe40, bMaskDWord, 0x02140102);
+		udelay(5);
+		rtl8192_setBBreg(dev, 0xe44, bMaskDWord, 0x681604c2);
+		udelay(5);
+		rtl8192_setBBreg(dev, 0xe4c, bMaskDWord, 0x000028d1);
+		udelay(5);
+		rtl8192_setBBreg(dev, 0xe60, bMaskDWord, 0x02140102);
+		udelay(5);
+		rtl8192_setBBreg(dev, 0xe64, bMaskDWord, 0x28160d05);
+		udelay(5);
+		rtl8192_setBBreg(dev, 0xe48, bMaskDWord, 0xfb000000);
+		udelay(5);
+		rtl8192_setBBreg(dev, 0xe48, bMaskDWord, 0xf8000000);
+		udelay(5);
+
+		udelay(2000);
+
+		rtl8192_setBBreg(dev, 0xe6c, bMaskDWord, 0x020028d1);
+		udelay(5);
+		rtl8192_setBBreg(dev, 0xe48, bMaskDWord, 0xfb000000);
+		udelay(5);
+		rtl8192_setBBreg(dev, 0xe48, bMaskDWord, 0xf8000000);
+
+		udelay(2000);
+
+		rtl8192_setBBreg(dev, 0xc04, bMaskDWord, 0x00a05433);
+		udelay(5);
+		rtl8192_setBBreg(dev, 0xc08, bMaskDWord, 0x000000e4);
+		udelay(5);
+		rtl8192_setBBreg(dev, 0xe28, bMaskDWord, 0x0);		
+
+		if (!RfPiEnable)	
+		{
+			rtl8192_setBBreg(dev, 0x820, bMaskDWord, 0x01000000);
+			rtl8192_setBBreg(dev, 0x828, bMaskDWord, 0x01000000);
+		}
+
+	
+		reg = rtl8192_QueryBBReg(dev, 0xeac, bMaskDWord);
+
+		if (!(reg&(BIT27|BIT28|BIT30|BIT31)))
+		{			
+			old_value = (rtl8192_QueryBBReg(dev, 0xc80, bMaskDWord) & 0x3FF);
+
+			X = (rtl8192_QueryBBReg(dev, 0xe94, bMaskDWord) & 0x03FF0000)>>16;
+			TXA[RF90_PATH_A] = (X * old_value)/0x100;
+			reg = rtl8192_QueryBBReg(dev, 0xc80, bMaskDWord);
+			reg = (reg & 0xFFFFFC00) | (u32)TXA[RF90_PATH_A];
+			rtl8192_setBBreg(dev, 0xc80, bMaskDWord, reg);
+			udelay(5);
+
+			Y = ( rtl8192_QueryBBReg(dev, 0xe9C, bMaskDWord) & 0x03FF0000)>>16;
+			TX0[RF90_PATH_C] = ((Y * old_value)/0x100);
+			reg = rtl8192_QueryBBReg(dev, 0xc80, bMaskDWord);
+			reg = (reg & 0xffc0ffff) |((u32) (TX0[RF90_PATH_C]&0x3F)<<16);			
+			rtl8192_setBBreg(dev, 0xc80, bMaskDWord, reg);
+			reg = rtl8192_QueryBBReg(dev, 0xc94, bMaskDWord);		
+			reg = (reg & 0x0fffffff) |(((Y&0x3c0)>>6)<<28);
+			rtl8192_setBBreg(dev, 0xc94, bMaskDWord, reg);
+			udelay(5);
+
+			reg = rtl8192_QueryBBReg(dev, 0xc14, bMaskDWord);
+			X = (rtl8192_QueryBBReg(dev, 0xea4, bMaskDWord) & 0x03FF0000)>>16;			
+			reg = (reg & 0xFFFFFC00) |X;
+			rtl8192_setBBreg(dev, 0xc14, bMaskDWord, reg);
+			Y = (rtl8192_QueryBBReg(dev, 0xeac, bMaskDWord) & 0x003F0000)>>16;
+			reg = (reg & 0xFFFF03FF) |Y<<10;
+			rtl8192_setBBreg(dev, 0xc14, bMaskDWord, reg);
+			udelay(5);
+			old_value = (rtl8192_QueryBBReg(dev, 0xc88, bMaskDWord) & 0x3FF);
+			
+			X = (rtl8192_QueryBBReg(dev, 0xeb4, bMaskDWord) & 0x03FF0000)>>16;
+			reg = rtl8192_QueryBBReg(dev, 0xc88, bMaskDWord);
+			TXA[RF90_PATH_A] = (X * old_value) / 0x100;
+			reg = (reg & 0xFFFFFC00) | TXA[RF90_PATH_A];
+			rtl8192_setBBreg(dev, 0xc88, bMaskDWord, reg);
+			udelay(5);
+
+			Y = (rtl8192_QueryBBReg(dev, 0xebc, bMaskDWord)& 0x03FF0000)>>16;
+			TX0[RF90_PATH_C] = ((Y * old_value)/0x100);
+			reg = rtl8192_QueryBBReg(dev, 0xc88, bMaskDWord);
+			reg = (reg & 0xffc0ffff) |( (TX0[RF90_PATH_C]&0x3F)<<16);
+			rtl8192_setBBreg(dev, 0xc88, bMaskDWord, reg);
+			reg = rtl8192_QueryBBReg(dev, 0xc9c, bMaskDWord);
+			reg = (reg & 0x0fffffff) |(((Y&0x3c0)>>6)<<28);
+			rtl8192_setBBreg(dev, 0xc9c, bMaskDWord, reg);
+			udelay(5);
+
+			reg = rtl8192_QueryBBReg(dev, 0xc1c, bMaskDWord);
+			X = (rtl8192_QueryBBReg(dev, 0xec4, bMaskDWord) & 0x03FF0000)>>16;			
+			reg = (reg & 0xFFFFFC00) |X;
+			rtl8192_setBBreg(dev, 0xc1c, bMaskDWord, reg);
+			
+			Y = (rtl8192_QueryBBReg(dev, 0xecc, bMaskDWord) & 0x003F0000)>>16;
+			reg = (reg & 0xFFFF03FF) |Y<<10;
+			rtl8192_setBBreg(dev, 0xc1c, bMaskDWord, reg);
+			udelay(5);
+			
+			RT_TRACE(COMP_INIT, "PHY_IQCalibrate OK\n");
+			break;
+		}
+
+	}
+	
+	for (i = 0; i < 13; i++)
+		rtl8192_setBBreg(dev, calibrate_set[i], bMaskDWord, load_value[i]);
+	
+	
+	
+
+
+}	
+
+#define HalGetFirmwareVerison(priv) (priv->pFirmware->FirmwareVersion )
+bool rtl8192se_set_fw_cmd(struct net_device* dev, FW_CMD_IO_TYPE		FwCmdIO)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u32	FwParam = FW_CMD_IO_PARA_QUERY(priv);
+	u16	FwCmdMap = FW_CMD_IO_QUERY(priv);
+	bool	bPostProcessing = false;
+
+	RT_TRACE(COMP_CMD, "-->HalSetFwCmd8192S(): Set FW Cmd(%#x), SetFwCmdInProgress(%d)\n", FwCmdIO, priv->SetFwCmdInProgress);
+
+
+
+
+
+	RT_TRACE(COMP_CMD, "-->HalSetFwCmd8192S(): Set FW Cmd(%#x), SetFwCmdInProgress(%d)\n", 
+		FwCmdIO, priv->SetFwCmdInProgress);
+
+	do{
+
+		if(HalGetFirmwareVerison(priv) >= 0x35)
+	{
+			switch(FwCmdIO)
+			{
+				case FW_CMD_RA_REFRESH_N:
+					FwCmdIO = FW_CMD_RA_REFRESH_N_COMB;
+					break;
+				case FW_CMD_RA_REFRESH_BG:
+					FwCmdIO = FW_CMD_RA_REFRESH_BG_COMB;
+					break;
+				default:
+					break;
+			}
+		}
+		else
+		{			
+			if((FwCmdIO == FW_CMD_IQK_ENABLE) ||
+				(FwCmdIO == FW_CMD_RA_REFRESH_N) ||
+				(FwCmdIO == FW_CMD_RA_REFRESH_BG))
+			{
+				bPostProcessing = true;
+				break;
+			}
+	}
+
+		if(HalGetFirmwareVerison(priv) >= 0x3E)
+	{
+			if(FwCmdIO == FW_CMD_CTRL_DM_BY_DRIVER)
+				FwCmdIO = FW_CMD_CTRL_DM_BY_DRIVER_NEW;
+	}
+
+
+		switch(FwCmdIO)
+	{
+
+			case FW_CMD_RA_INIT:
+				RT_TRACE(COMP_CMD, "[FW CMD] [New Version] RA init!!\n");
+				FwCmdMap |= FW_RA_INIT_CTL;
+				FW_CMD_IO_SET(priv, FwCmdMap);	
+				FW_CMD_IO_CLR(priv, FW_RA_INIT_CTL);	 
+				break;
+
+			case FW_CMD_DIG_DISABLE:
+				RT_TRACE(COMP_CMD, "[FW CMD] [New Version] Set DIG disable!!\n");
+				FwCmdMap &= ~FW_DIG_ENABLE_CTL;
+				FW_CMD_IO_SET(priv, FwCmdMap);			
+				break;
+				
+			case FW_CMD_DIG_ENABLE:
+			case FW_CMD_DIG_RESUME:
+				if(!(priv->DMFlag & HAL_DM_DIG_DISABLE))
+				{
+					RT_TRACE(COMP_CMD, "[FW CMD] [New Version] Set DIG enable or resume!!\n");
+					FwCmdMap |= (FW_DIG_ENABLE_CTL|FW_SS_CTL);
+					FW_CMD_IO_SET(priv, FwCmdMap);	
+	}
+				break;
+
+			case FW_CMD_DIG_HALT:
+				RT_TRACE(COMP_CMD, "[FW CMD] [New Version] Set DIG halt!!\n");
+				FwCmdMap &= ~(FW_DIG_ENABLE_CTL|FW_SS_CTL);
+				FW_CMD_IO_SET(priv, FwCmdMap);				
+				break;
+				
+			case FW_CMD_TXPWR_TRACK_THERMAL:
+	{
+					u8	ThermalVal = 0;
+					FwCmdMap |= FW_PWR_TRK_CTL;
+					FwParam &= FW_PWR_TRK_PARAM_CLR; 
+					ThermalVal = priv->ThermalValue;
+					FwParam |= ((ThermalVal<<24) |(priv->ThermalMeter[0]<<16));					
+					RT_TRACE(COMP_CMD, "[FW CMD] [New Version] Set TxPwr tracking!! FwCmdMap(%#x), FwParam(%#x)\n", FwCmdMap, FwParam);
+					FW_CMD_PARA_SET(priv, FwParam);
+					FW_CMD_IO_SET(priv, FwCmdMap);
+					FW_CMD_IO_CLR(priv, FW_PWR_TRK_CTL);	 
+	}
+				break;
+				
+			case FW_CMD_RA_REFRESH_N_COMB:
+				FwCmdMap |= FW_RA_N_CTL;
+				FwCmdMap &= ~(FW_RA_BG_CTL |FW_RA_INIT_CTL);
+				FwParam &= FW_RA_PARAM_CLR; 
+				if(!(priv->rtllib->pHTInfo->IOTRaFunc & HT_IOT_RAFUNC_DISABLE_ALL))
+					FwParam |= ((priv->rtllib->pHTInfo->IOTRaFunc)&0xf);
+				FwParam |= ((priv->rtllib->pHTInfo->IOTPeer & 0xf) <<4);
+				RT_TRACE(COMP_CMD, "[FW CMD] [New Version] Set RA/IOT Comb in n mode!! FwCmdMap(%#x), FwParam(%#x)\n", FwCmdMap, FwParam);
+				FW_CMD_PARA_SET(priv, FwParam);
+				FW_CMD_IO_SET(priv, FwCmdMap);	
+				FW_CMD_IO_CLR(priv, FW_RA_N_CTL); 
+				break;	
+
+			case FW_CMD_RA_REFRESH_BG_COMB:				
+				FwCmdMap |= FW_RA_BG_CTL;
+				FwCmdMap &= ~(FW_RA_N_CTL|FW_RA_INIT_CTL); 
+				FwParam &= FW_RA_PARAM_CLR; 
+				if(!(priv->rtllib->pHTInfo->IOTRaFunc & HT_IOT_RAFUNC_DISABLE_ALL))
+					FwParam |= ((priv->rtllib->pHTInfo->IOTRaFunc)&0xf);
+				FwParam |= ((priv->rtllib->pHTInfo->IOTPeer & 0xf) <<4);
+				RT_TRACE(COMP_CMD, "[FW CMD] [New Version] Set RA/IOT Comb in BG mode!! FwCmdMap(%#x), FwParam(%#x)\n", FwCmdMap, FwParam);
+				FW_CMD_PARA_SET(priv, FwParam);
+				FW_CMD_IO_SET(priv, FwCmdMap);	
+				FW_CMD_IO_CLR(priv, FW_RA_BG_CTL); 
+				break;
+
+			case FW_CMD_IQK_ENABLE:
+				RT_TRACE(COMP_CMD, "[FW CMD] [New Version] IQK enable.\n");
+				FwCmdMap |= FW_IQK_CTL;
+				FW_CMD_IO_SET(priv, FwCmdMap);	
+				FW_CMD_IO_CLR(priv, FW_IQK_CTL); 
+				break;
+
+			case FW_CMD_CTRL_DM_BY_DRIVER_NEW:
+				RT_TRACE(COMP_CMD, "[FW CMD][New Version] Inform FW driver control some DM!! FwCmdMap(%#x), FwParam(%#x)\n", FwCmdMap, FwParam);
+				FwCmdMap |= FW_DRIVER_CTRL_DM_CTL;
+				FW_CMD_IO_SET(priv, FwCmdMap);
+				break;
+
+			case FW_CMD_RESUME_DM_BY_SCAN:
+				RT_TRACE(COMP_CMD, "[FW CMD] [New Version] Resume DM after scan.\n");
+				FwCmdMap |= (FW_DIG_ENABLE_CTL|FW_HIGH_PWR_ENABLE_CTL|FW_SS_CTL);
+				
+				if(priv->DMFlag & HAL_DM_DIG_DISABLE || !dm_digtable.dig_enable_flag)
+					FwCmdMap &= ~FW_DIG_ENABLE_CTL;	
+
+				if((priv->DMFlag & HAL_DM_HIPWR_DISABLE) ||
+					(priv->rtllib->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_HIGH_POWER) ||
+					(priv->rtllib->bdynamic_txpower_enable == true))
+					FwCmdMap &= ~FW_HIGH_PWR_ENABLE_CTL;
+				
+				if(	(dm_digtable.Dig_Ext_Port_Stage == DIG_EXT_PORT_STAGE_0) ||
+					(dm_digtable.Dig_Ext_Port_Stage == DIG_EXT_PORT_STAGE_1))
+					FwCmdMap &= ~FW_DIG_ENABLE_CTL;
+				
+				FW_CMD_IO_SET(priv, FwCmdMap);		
+				bPostProcessing = true;
+				break;
+		
+			case FW_CMD_PAUSE_DM_BY_SCAN:
+				RT_TRACE(COMP_CMD, "[FW CMD] [New Version] Pause DM before scan.\n");
+				FwCmdMap &= ~(FW_DIG_ENABLE_CTL|FW_HIGH_PWR_ENABLE_CTL|FW_SS_CTL);
+				FW_CMD_IO_SET(priv, FwCmdMap);	
+				bPostProcessing = true;
+				break;
+
+			case FW_CMD_HIGH_PWR_DISABLE:
+				RT_TRACE(COMP_CMD, "[FW CMD] [New Version]  Set HighPwr disable!!\n");
+				FwCmdMap &= ~FW_HIGH_PWR_ENABLE_CTL;
+				FW_CMD_IO_SET(priv, FwCmdMap);		
+				bPostProcessing = true;
+				break;			
+
+			case FW_CMD_HIGH_PWR_ENABLE:	
+				if(((priv->rtllib->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_HIGH_POWER)==0) &&
+					!(priv->DMFlag & HAL_DM_HIPWR_DISABLE) &&
+					(priv->rtllib->bdynamic_txpower_enable != true))
+				{
+					RT_TRACE(COMP_CMD, "[FW CMD] [New Version] Set HighPwr enable!!\n");
+					FwCmdMap |= (FW_HIGH_PWR_ENABLE_CTL|FW_SS_CTL);
+					FW_CMD_IO_SET(priv, FwCmdMap);		
+					bPostProcessing = true;
+				}
+				break;
+				
+			case FW_CMD_DIG_MODE_FA:
+				RT_TRACE(COMP_CMD, "[FW CMD] [New Version] Set DIG Mode to FA.\n");
+				FwCmdMap |= FW_FA_CTL;
+				FW_CMD_IO_SET(priv, FwCmdMap);
+				break;
+
+			case FW_CMD_DIG_MODE_SS:
+				RT_TRACE(COMP_CMD, "[FW CMD] [New Version] Set DIG Mode to SS.\n");
+				FwCmdMap &= ~FW_FA_CTL;
+				FW_CMD_IO_SET(priv, FwCmdMap);
+				break;
+				
+			case FW_CMD_PAPE_CONTROL:
+				RT_TRACE(COMP_CMD, "[FW CMD] Set PAPE Control \n");
+#ifdef MERGE_TO_DO
+				if(pHalData->bt_coexist.BT_PapeCtrl)
+				{
+					RTPRINT(FBT, BT_TRACE, ("BT set PAPE Control to SW/HW dynamically. \n"));
+					FwCmdMap |= FW_PAPE_CTL_BY_SW_HW;
+				}
+				else
+#endif
+				{
+					printk("BT set PAPE Control to SW\n");
+					FwCmdMap &= ~FW_PAPE_CTL_BY_SW_HW;
+				}
+				FW_CMD_IO_SET(priv, FwCmdMap);
+				break;
+
+			default:				
+				bPostProcessing = true; 
+				break;
+		}
+	}while(false);
+
+	RT_TRACE(COMP_CMD, "[FW CMD] Current FwCmdMap(%#x)\n", priv->FwCmdIOMap);
+	RT_TRACE(COMP_CMD, "[FW CMD] Current FwCmdIOParam(%#x)\n", priv->FwCmdIOParam);
+
+	if(bPostProcessing && !priv->SetFwCmdInProgress)
+	{
+		priv->SetFwCmdInProgress = true;
+		priv->CurrentFwCmdIO = FwCmdIO; 
+	}
+	else
+	{
+		return false;
+	}
+
+#if 0
+#ifdef USE_WORKITEM			
+	PlatformScheduleWorkItem(&(pHalData->FwCmdIOWorkItem));
+#else
+	PlatformSetTimer(Adapter, &(pHalData->SetFwCmdIOTimer), 0);
+#endif
+#endif
+	rtl8192_SetFwCmdIOCallback(dev);
+	return true;
+}
+void ChkFwCmdIoDone(struct net_device* dev)
+{
+	u16 PollingCnt = 10000;		
+	u32 tmpValue;
+	
+	do
+	{
+		
+		udelay(10); 
+		
+		tmpValue = read_nic_dword(dev, WFM5);
+		if(tmpValue == 0)
+		{
+			RT_TRACE(COMP_CMD, "[FW CMD] Set FW Cmd success!!\n");
+			break;
+		}			
+		else
+		{
+			RT_TRACE(COMP_CMD, "[FW CMD] Polling FW Cmd PollingCnt(%d)!!\n", PollingCnt);
+		}
+	}while( --PollingCnt );
+
+	if(PollingCnt == 0)
+	{
+		RT_TRACE(COMP_ERR, "[FW CMD] Set FW Cmd fail!!\n");
+	}
+}
+void rtl8192_SetFwCmdIOCallback(struct net_device* dev)
+{
+	struct r8192_priv *priv = rtllib_priv(dev);
+	u32		input,CurrentAID = 0;
+	
+	if(IS_NIC_DOWN(priv)){
+		RT_TRACE(COMP_CMD, "SetFwCmdIOTimerCallback(): driver is going to unload\n");
+		return;
+	}
+	
+	RT_TRACE(COMP_CMD, "--->SetFwCmdIOTimerCallback(): Cmd(%#x), SetFwCmdInProgress(%d)\n", priv->CurrentFwCmdIO, priv->SetFwCmdInProgress);
+
+	if(HalGetFirmwareVerison(priv) >= 0x34)
+                        {
+		switch(priv->CurrentFwCmdIO)
+		{
+			case FW_CMD_RA_REFRESH_N:
+				priv->CurrentFwCmdIO = FW_CMD_RA_REFRESH_N_COMB;
+			break;
+			case FW_CMD_RA_REFRESH_BG:
+				priv->CurrentFwCmdIO = FW_CMD_RA_REFRESH_BG_COMB;
+			break;
+			default:
+			break;
+		}
+	}
+			
+	switch(priv->CurrentFwCmdIO)
+	{
+
+		case FW_CMD_RA_RESET:
+			RT_TRACE(COMP_CMD, "[FW CMD] Set RA Reset!!\n");
+			write_nic_dword(dev, WFM5, FW_RA_RESET);	
+			ChkFwCmdIoDone(dev);	
+			break;
+			
+		case FW_CMD_RA_ACTIVE:
+			RT_TRACE(COMP_CMD, "[FW CMD] Set RA Active!!\n");
+			write_nic_dword(dev, WFM5, FW_RA_ACTIVE); 
+			ChkFwCmdIoDone(dev);	
+			break;
+
+		case FW_CMD_RA_REFRESH_N:
+			RT_TRACE(COMP_CMD, "[FW CMD] Set RA n refresh!!\n");
+			if(priv->rtllib->pHTInfo->IOTRaFunc & HT_IOT_RAFUNC_DISABLE_ALL)
+				input = FW_RA_REFRESH;
+			else
+				input = FW_RA_REFRESH | (priv->rtllib->pHTInfo->IOTRaFunc << 8);
+			write_nic_dword(dev, WFM5, input); 
+			ChkFwCmdIoDone(dev);
+			write_nic_dword(dev, WFM5, FW_RA_ENABLE_RSSI_MASK); 
+			ChkFwCmdIoDone(dev);	
+			break;
+			
+		case FW_CMD_RA_REFRESH_BG:
+			RT_TRACE(COMP_CMD, "[FW CMD] Set RA BG refresh!!\n");
+			write_nic_dword(dev, WFM5, FW_RA_REFRESH); 
+			ChkFwCmdIoDone(dev);
+			write_nic_dword(dev, WFM5, FW_RA_DISABLE_RSSI_MASK); 			
+			ChkFwCmdIoDone(dev);	
+			break;
+
+		case FW_CMD_RA_REFRESH_N_COMB:
+			RT_TRACE(COMP_CMD, "[FW CMD] Set RA n Combo refresh!!\n");
+			if(priv->rtllib->pHTInfo->IOTRaFunc & HT_IOT_RAFUNC_DISABLE_ALL)
+				input = FW_RA_IOT_N_COMB;
+			else
+				input = FW_RA_IOT_N_COMB | (((priv->rtllib->pHTInfo->IOTRaFunc)&0x0f) << 8);
+			input = input |((priv->rtllib->pHTInfo->IOTPeer & 0xf) <<12);
+			RT_TRACE(COMP_CMD, "[FW CMD] Set RA/IOT Comb in n mode!! input(%#x)\n", input);
+			write_nic_dword(dev, WFM5, input); 			
+			ChkFwCmdIoDone(dev);	
+			break;		
+
+		case FW_CMD_RA_REFRESH_BG_COMB:		
+			RT_TRACE(COMP_CMD, "[FW CMD] Set RA B/G Combo refresh!!\n");
+			if(priv->rtllib->pHTInfo->IOTRaFunc & HT_IOT_RAFUNC_DISABLE_ALL)
+				input = FW_RA_IOT_BG_COMB;
+			else
+				input = FW_RA_IOT_BG_COMB | (((priv->rtllib->pHTInfo->IOTRaFunc)&0x0f) << 8);
+			input = input |((priv->rtllib->pHTInfo->IOTPeer & 0xf) <<12);
+			RT_TRACE(COMP_CMD, "[FW CMD] Set RA/IOT Comb in B/G mode!! input(%#x)\n", input);
+			write_nic_dword(dev, WFM5, input); 
+			ChkFwCmdIoDone(dev);	
+			break;
+
+		case FW_CMD_IQK_ENABLE:
+			RT_TRACE(COMP_CMD, "[FW CMD] IQK Enable!!\n");
+			write_nic_dword(dev, WFM5, FW_IQK_ENABLE); 
+			ChkFwCmdIoDone(dev);	
+			break;
+
+		case FW_CMD_PAUSE_DM_BY_SCAN:
+			RT_TRACE(COMP_CMD, "[FW CMD] Pause DM by Scan!!\n");
+			rtl8192_setBBreg(dev, rOFDM0_XAAGCCore1, bMaskByte0, 0x17);
+			rtl8192_setBBreg(dev, rOFDM0_XBAGCCore1, bMaskByte0, 0x17);
+			rtl8192_setBBreg(dev, rCCK0_CCA, bMaskByte2, 0x40);
+			break;
+
+		case FW_CMD_RESUME_DM_BY_SCAN:		
+			RT_TRACE(COMP_CMD, "[FW CMD] Resume DM by Scan!!\n");
+			rtl8192_setBBreg(dev, rCCK0_CCA, bMaskByte2, 0x83);	
+			rtl8192_phy_setTxPower(dev, priv->rtllib->current_network.channel);
+			break;
+		
+		case FW_CMD_HIGH_PWR_DISABLE:
+			RT_TRACE(COMP_CMD, "[FW CMD] High Pwr Disable!!\n");
+			if(priv->DMFlag & HAL_DM_HIPWR_DISABLE)
+				break;
+			rtl8192_setBBreg(dev, rOFDM0_XAAGCCore1, bMaskByte0, 0x17);
+			rtl8192_setBBreg(dev, rOFDM0_XBAGCCore1, bMaskByte0, 0x17);
+			rtl8192_setBBreg(dev, rCCK0_CCA, bMaskByte2, 0x40);
+			break;
+			
+		case FW_CMD_HIGH_PWR_ENABLE:
+			RT_TRACE(COMP_CMD, "[FW CMD] High Pwr Enable!!\n");
+			if((priv->DMFlag & HAL_DM_HIPWR_DISABLE) ||
+				(priv->rtllib->bdynamic_txpower_enable == true))
+				break;
+			rtl8192_setBBreg(dev, rCCK0_CCA, bMaskByte2, 0x83);				
+			break;
+
+		case FW_CMD_LPS_ENTER:
+			RT_TRACE(COMP_CMD, "[FW CMD] Enter LPS mode!!\n");
+			CurrentAID = priv->rtllib->assoc_id;
+			write_nic_dword(dev, WFM5, (FW_LPS_ENTER| ((CurrentAID|0xc000)<<8))    );
+			ChkFwCmdIoDone(dev);	
+			priv->rtllib->pHTInfo->IOTAction |=  HT_IOT_ACT_DISABLE_EDCA_TURBO;
+			break;
+
+		case FW_CMD_LPS_LEAVE:
+			RT_TRACE(COMP_CMD, "[FW CMD] Leave LPS mode!!\n");
+			write_nic_dword(dev, WFM5, FW_LPS_LEAVE );
+			ChkFwCmdIoDone(dev);	
+			priv->rtllib->pHTInfo->IOTAction &=  (~HT_IOT_ACT_DISABLE_EDCA_TURBO);
+			break;
+
+		case FW_CMD_ADD_A2_ENTRY:
+			RT_TRACE(COMP_CMD, "[FW CMD] ADD A2 entry!!\n");
+			write_nic_dword(dev, WFM5, FW_ADD_A2_ENTRY);
+			ChkFwCmdIoDone(dev);
+			break;
+		
+		case FW_CMD_CTRL_DM_BY_DRIVER:
+			RT_TRACE(COMP_CMD, "[FW CMD] Inform fw driver will do some dm at driver\n");
+			write_nic_dword(dev, WFM5, FW_CTRL_DM_BY_DRIVER);
+	                ChkFwCmdIoDone(dev);		
+			break;
+		case FW_CMD_CHAN_SET:
+			input = FW_CHAN_SET | (((priv->chan)&0xff) << 8);
+			RT_TRACE(COMP_CMD, "[FW CMD] Inform fw to set channel to %x!!, input(%#x):\n", priv->chan,input);
+			write_nic_dword(dev, WFM5, input);
+	                ChkFwCmdIoDone(dev);		
+			break;
+			
+		default:
+			break;
+	}
+	
+			
+	ChkFwCmdIoDone(dev);		
+	
+	
+	priv->SetFwCmdInProgress = false;
+	RT_TRACE(COMP_CMD, "<---SetFwCmdIOWorkItemCallback()\n");
+}
+
+static	void
+phy_CheckEphySwitchReady(struct net_device* dev)
+{
+	u32	delay = 100;	
+	u8	regu1;
+
+	regu1 = read_nic_byte(dev, 0x554);
+	while ((regu1 & BIT5) && (delay > 0))
+	{
+		regu1 = read_nic_byte(dev, 0x554);
+		delay--;
+		udelay(50);
+	}	
+	RT_TRACE(COMP_INIT, "regu1=%02x  delay = %d\n", regu1, delay);	
+	
+}	
+
+#ifdef TO_DO_LIST
+void
+HW_RadioGpioChk92SE(
+	IN	PADAPTER	pAdapter
+	)
+{
+	PMGNT_INFO		pMgntInfo = &(pAdapter->MgntInfo);
+	u1Byte				u1Tmp = 0;
+	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(pAdapter);
+	RT_RF_POWER_STATE	eRfPowerStateToSet;
+	BOOLEAN				bActuallySet = false;
+
+#if 0
+	if (!RT_IN_PS_LEVEL(pAdapter, RT_RF_OFF_LEVL_PCI_D3) &&
+		pMgntInfo->RfOffReason != RF_CHANGE_BY_HW)
+	{
+		return;
+	}
+	
+		PlatformSwitchClkReq(pAdapter, 0x00);
+
+	if (RT_IN_PS_LEVEL(pAdapter, RT_RF_OFF_LEVL_PCI_D3))
+	{		
+		RT_LEAVE_D3(pAdapter, false);
+		RT_CLEAR_PS_LEVEL(pAdapter, RT_RF_OFF_LEVL_PCI_D3);
+		Power_DomainInit92SE(pAdapter);
+	}
+
+	PlatformEFIOWrite1Byte(pAdapter, MAC_PINMUX_CFG, (GPIOMUX_EN | GPIOSEL_GPIO));
+
+	u1Tmp = PlatformEFIORead1Byte(pAdapter, GPIO_IO_SEL);
+	u1Tmp &= HAL_8192S_HW_GPIO_OFF_MASK;
+	PlatformEFIOWrite1Byte(pAdapter, GPIO_IO_SEL, u1Tmp);
+
+	RT_TRACE(COMP_CMD, DBG_LOUD, 
+	("HW_RadioGpioChk92SE HW_RadioGpioChk92SE=%02x\n", HW_RadioGpioChk92SE));
+	
+	u1Tmp = PlatformEFIORead1Byte(pAdapter, GPIO_IN);
+
+	eRfPowerStateToSet = (u1Tmp & HAL_8192S_HW_GPIO_OFF_BIT) ? eRfOn : eRfOff;
+
+	if( (pHalData->bHwRadioOff == true) && (eRfPowerStateToSet == eRfOn))
+	{
+		RT_TRACE(COMP_RF, DBG_LOUD, ("HW_RadioGpioChk92SE  - HW Radio ON\n"));
+		pHalData->bHwRadioOff = false;
+		bActuallySet = true;
+	}
+	else if ( (pHalData->bHwRadioOff == false) && (eRfPowerStateToSet == eRfOff))
+	{
+		RT_TRACE(COMP_RF, DBG_LOUD, ("HW_RadioGpioChk92SE  - HW Radio OFF\n"));
+		pHalData->bHwRadioOff = true;
+		bActuallySet = true;
+	}
+			
+	if(bActuallySet)
+	{
+		pHalData->bHwRfOffAction = 1;
+		MgntActSet_RF_State(pAdapter, eRfPowerStateToSet, RF_CHANGE_BY_HW);
+		DrvIFIndicateCurrentPhyStatus(pAdapter);
+
+	
+		{
+			PMP_ADAPTER		pDevice = &(pAdapter->NdisAdapter);
+			if(pDevice->RegHwSwRfOffD3 == 1 || pDevice->RegHwSwRfOffD3 == 2) 
+				(eRfPowerStateToSet == eRfOff) ? RT_ENABLE_ASPM(pAdapter) : RT_DISABLE_ASPM(pAdapter);
+		}
+	}
+	RT_TRACE(COMP_RF, DBG_TRACE, ("HW_RadioGpioChk92SE() <--------- \n"));
+#endif
+}/* HW_RadioGpioChk92SE */
+#endif
+#endif 
--- linux-mvl-dove-2.6.32.orig/ubuntu/rtl8192se/rtl8192s/r8192S_phyreg.h
+++ linux-mvl-dove-2.6.32/ubuntu/rtl8192se/rtl8192s/r8192S_phyreg.h
@@ -0,0 +1,954 @@
+/******************************************************************************
+ * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called LICENSE.
+ *
+ * Contact Information:
+ * wlanfae <wlanfae@realtek.com>
+******************************************************************************/
+#ifndef __INC_HAL8192SPHYREG_H
+#define __INC_HAL8192SPHYREG_H
+
+
+/*--------------------------Define Parameters-------------------------------*/
+
+
+
+
+#define		rPMAC_Reset					0x100
+#define		rPMAC_TxStart					0x104
+#define		rPMAC_TxLegacySIG				0x108
+#define		rPMAC_TxHTSIG1				0x10c
+#define		rPMAC_TxHTSIG2				0x110
+#define		rPMAC_PHYDebug				0x114
+#define		rPMAC_TxPacketNum				0x118
+#define		rPMAC_TxIdle					0x11c
+#define		rPMAC_TxMACHeader0			0x120
+#define		rPMAC_TxMACHeader1			0x124
+#define		rPMAC_TxMACHeader2			0x128
+#define		rPMAC_TxMACHeader3			0x12c
+#define		rPMAC_TxMACHeader4			0x130
+#define		rPMAC_TxMACHeader5			0x134
+#define		rPMAC_TxDataType				0x138
+#define		rPMAC_TxRandomSeed			0x13c
+#define		rPMAC_CCKPLCPPreamble			0x140
+#define		rPMAC_CCKPLCPHeader			0x144
+#define		rPMAC_CCKCRC16				0x148
+#define		rPMAC_OFDMRxCRC32OK			0x170
+#define		rPMAC_OFDMRxCRC32Er			0x174
+#define		rPMAC_OFDMRxParityEr			0x178
+#define		rPMAC_OFDMRxCRC8Er			0x17c
+#define		rPMAC_CCKCRxRC16Er			0x180
+#define		rPMAC_CCKCRxRC32Er			0x184
+#define		rPMAC_CCKCRxRC32OK			0x188
+#define		rPMAC_TxStatus					0x18c
+
+#define		RF_BB_CMD_ADDR				0x02c0	
+#define		RF_BB_CMD_DATA				0x02c4	
+
+#define		rFPGA0_RFMOD				0x800	
+
+#define		rFPGA0_TxInfo				0x804	
+#define		rFPGA0_PSDFunction			0x808
+
+#define		rFPGA0_TxGainStage			0x80c	
+
+#define		rFPGA0_RFTiming1			0x810	
+#define		rFPGA0_RFTiming2			0x814
+
+#define		rFPGA0_XA_HSSIParameter1		0x820	
+#define		rFPGA0_XA_HSSIParameter2		0x824
+#define		rFPGA0_XB_HSSIParameter1		0x828
+#define		rFPGA0_XB_HSSIParameter2		0x82c
+#define		rFPGA0_XC_HSSIParameter1		0x830
+#define		rFPGA0_XC_HSSIParameter2		0x834
+#define		rFPGA0_XD_HSSIParameter1		0x838
+#define		rFPGA0_XD_HSSIParameter2		0x83c
+#define		rFPGA0_XA_LSSIParameter		0x840
+#define		rFPGA0_XB_LSSIParameter		0x844
+#define		rFPGA0_XC_LSSIParameter		0x848
+#define		rFPGA0_XD_LSSIParameter		0x84c
+
+#define		rFPGA0_RFWakeUpParameter		0x850	
+#define		rFPGA0_RFSleepUpParameter		0x854
+
+#define		rFPGA0_XAB_SwitchControl		0x858	
+#define		rFPGA0_XCD_SwitchControl		0x85c
+
+#define		rFPGA0_XA_RFInterfaceOE		0x860	
+#define		rFPGA0_XB_RFInterfaceOE		0x864
+#define		rFPGA0_XC_RFInterfaceOE		0x868
+#define		rFPGA0_XD_RFInterfaceOE		0x86c
+
+#define		rFPGA0_XAB_RFInterfaceSW		0x870	
+#define		rFPGA0_XCD_RFInterfaceSW		0x874
+
+#define		rFPGA0_XAB_RFParameter		0x878	
+#define		rFPGA0_XCD_RFParameter		0x87c
+
+#define		rFPGA0_AnalogParameter1		0x880	
+#define		rFPGA0_AnalogParameter2		0x884
+#define		rFPGA0_AnalogParameter3		0x888	
+#define		rFPGA0_AnalogParameter4		0x88c
+
+#define		rFPGA0_XA_LSSIReadBack		0x8a0	
+#define		rFPGA0_XB_LSSIReadBack		0x8a4
+#define		rFPGA0_XC_LSSIReadBack		0x8a8
+#define		rFPGA0_XD_LSSIReadBack		0x8ac
+
+#define		rFPGA0_PSDReport				0x8b4	
+#define		TransceiverA_HSPI_Readback	0x8b8	
+#define		TransceiverB_HSPI_Readback	0x8bc	
+#define		rFPGA0_XAB_RFInterfaceRB		0x8e0	
+#define		rFPGA0_XCD_RFInterfaceRB		0x8e4	
+
+#define		rFPGA1_RFMOD				0x900	
+
+#define		rFPGA1_TxBlock				0x904	
+#define		rFPGA1_DebugSelect			0x908	
+#define		rFPGA1_TxInfo				0x90c	
+
+#define		rCCK0_System				0xa00
+
+#define		rCCK0_AFESetting			0xa04	
+#define		rCCK0_CCA					0xa08	
+
+#define		rCCK0_RxAGC1				0xa0c 	
+#define		rCCK0_RxAGC2				0xa10 	
+
+#define		rCCK0_RxHP					0xa14
+
+#define		rCCK0_DSPParameter1		0xa18	
+#define		rCCK0_DSPParameter2		0xa1c	
+
+#define		rCCK0_TxFilter1				0xa20
+#define		rCCK0_TxFilter2				0xa24
+#define		rCCK0_DebugPort			0xa28	
+#define		rCCK0_FalseAlarmReport		0xa2c	
+#define		rCCK0_TRSSIReport         		0xa50
+#define		rCCK0_RxReport            		0xa54  
+#define		rCCK0_FACounterLower      	0xa5c  
+#define		rCCK0_FACounterUpper      	0xa58  
+
+#define		rOFDM0_LSTF				0xc00
+
+#define		rOFDM0_TRxPathEnable		0xc04
+#define		rOFDM0_TRMuxPar			0xc08
+#define		rOFDM0_TRSWIsolation		0xc0c
+
+#define		rOFDM0_XARxAFE			0xc10  
+#define		rOFDM0_XARxIQImbalance    	0xc14  
+#define		rOFDM0_XBRxAFE            		0xc18
+#define		rOFDM0_XBRxIQImbalance    	0xc1c
+#define		rOFDM0_XCRxAFE            		0xc20
+#define		rOFDM0_XCRxIQImbalance    	0xc24
+#define		rOFDM0_XDRxAFE            		0xc28
+#define		rOFDM0_XDRxIQImbalance    	0xc2c
+
+#define		rOFDM0_RxDetector1			0xc30  
+#define		rOFDM0_RxDetector2			0xc34  
+#define		rOFDM0_RxDetector3			0xc38  
+#define		rOFDM0_RxDetector4			0xc3c  
+
+#define		rOFDM0_RxDSP				0xc40  
+#define		rOFDM0_CFOandDAGC		0xc44  
+#define		rOFDM0_CCADropThreshold	0xc48 
+#define		rOFDM0_ECCAThreshold		0xc4c 
+
+#define		rOFDM0_XAAGCCore1			0xc50	
+#define		rOFDM0_XAAGCCore2			0xc54
+#define		rOFDM0_XBAGCCore1			0xc58
+#define		rOFDM0_XBAGCCore2			0xc5c
+#define		rOFDM0_XCAGCCore1			0xc60
+#define		rOFDM0_XCAGCCore2			0xc64
+#define		rOFDM0_XDAGCCore1			0xc68
+#define		rOFDM0_XDAGCCore2			0xc6c
+
+#define		rOFDM0_AGCParameter1			0xc70
+#define		rOFDM0_AGCParameter2			0xc74
+#define		rOFDM0_AGCRSSITable			0xc78
+#define		rOFDM0_HTSTFAGC				0xc7c
+
+#define		rOFDM0_XATxIQImbalance		0xc80	
+#define		rOFDM0_XATxAFE				0xc84
+#define		rOFDM0_XBTxIQImbalance		0xc88
+#define		rOFDM0_XBTxAFE				0xc8c
+#define		rOFDM0_XCTxIQImbalance		0xc90
+#define		rOFDM0_XCTxAFE            			0xc94
+#define		rOFDM0_XDTxIQImbalance		0xc98
+#define		rOFDM0_XDTxAFE				0xc9c
+
+#define		rOFDM0_RxHPParameter			0xce0
+#define		rOFDM0_TxPseudoNoiseWgt		0xce4
+#define		rOFDM0_FrameSync				0xcf0
+#define		rOFDM0_DFSReport				0xcf4
+#define		rOFDM0_TxCoeff1				0xca4
+#define		rOFDM0_TxCoeff2				0xca8
+#define		rOFDM0_TxCoeff3				0xcac
+#define		rOFDM0_TxCoeff4				0xcb0
+#define		rOFDM0_TxCoeff5				0xcb4
+#define		rOFDM0_TxCoeff6				0xcb8
+
+
+#define		rOFDM1_LSTF					0xd00
+#define		rOFDM1_TRxPathEnable			0xd04
+
+#define		rOFDM1_CFO						0xd08	
+#define		rOFDM1_CSI1					0xd10
+#define		rOFDM1_SBD						0xd14
+#define		rOFDM1_CSI2					0xd18
+#define		rOFDM1_CFOTracking			0xd2c
+#define		rOFDM1_TRxMesaure1			0xd34
+#define		rOFDM1_IntfDet					0xd3c
+#define		rOFDM1_PseudoNoiseStateAB		0xd50
+#define		rOFDM1_PseudoNoiseStateCD		0xd54
+#define		rOFDM1_RxPseudoNoiseWgt		0xd58
+
+#define		rOFDM_PHYCounter1				0xda0  
+#define		rOFDM_PHYCounter2				0xda4  
+#define		rOFDM_PHYCounter3				0xda8  
+
+#define		rOFDM_ShortCFOAB				0xdac	
+#define		rOFDM_ShortCFOCD				0xdb0
+#define		rOFDM_LongCFOAB				0xdb4
+#define		rOFDM_LongCFOCD				0xdb8
+#define		rOFDM_TailCFOAB				0xdbc
+#define		rOFDM_TailCFOCD				0xdc0
+#define		rOFDM_PWMeasure1          		0xdc4
+#define		rOFDM_PWMeasure2          		0xdc8
+#define		rOFDM_BWReport				0xdcc
+#define		rOFDM_AGCReport				0xdd0
+#define		rOFDM_RxSNR					0xdd4
+#define		rOFDM_RxEVMCSI				0xdd8
+#define		rOFDM_SIGReport				0xddc
+
+
+#define		rTxAGC_Rate18_06				0xe00
+#define		rTxAGC_Rate54_24				0xe04
+#define		rTxAGC_CCK_Mcs32				0xe08
+#define		rTxAGC_Mcs03_Mcs00			0xe10
+#define		rTxAGC_Mcs07_Mcs04			0xe14
+#define		rTxAGC_Mcs11_Mcs08			0xe18
+#define		rTxAGC_Mcs15_Mcs12			0xe1c
+
+#define		rZebra1_HSSIEnable				0x0	
+#define		rZebra1_TRxEnable1				0x1
+#define		rZebra1_TRxEnable2				0x2
+#define		rZebra1_AGC					0x4
+#define		rZebra1_ChargePump			0x5
+#define		rZebra1_Channel				0x7	
+
+#define		rZebra1_TxGain					0x8	
+#define		rZebra1_TxLPF					0x9
+#define		rZebra1_RxLPF					0xb
+#define		rZebra1_RxHPFCorner			0xc
+
+#define		rGlobalCtrl						0	
+#define		rRTL8256_TxLPF					19
+#define		rRTL8256_RxLPF					11
+
+#define		rRTL8258_TxLPF					0x11	
+#define		rRTL8258_RxLPF					0x13
+#define		rRTL8258_RSSILPF				0xa
+
+#define		RF_AC						0x00	
+
+#define		RF_IQADJ_G1				0x01	
+#define		RF_IQADJ_G2				0x02	
+#define		RF_POW_TRSW				0x05	
+
+#define		RF_GAIN_RX					0x06	
+#define		RF_GAIN_TX					0x07	
+
+#define		RF_TXM_IDAC				0x08	
+#define		RF_BS_IQGEN				0x0F	
+
+#define		RF_MODE1					0x10	
+#define		RF_MODE2					0x11	
+
+#define		RF_RX_AGC_HP				0x12	
+#define		RF_TX_AGC					0x13	
+#define		RF_BIAS						0x14	
+#define		RF_IPA						0x15	
+#define		RF_POW_ABILITY			0x17	
+#define		RF_MODE_AG				0x18	
+#define		rRfChannel					0x18	
+#define		RF_CHNLBW					0x18	
+#define		RF_TOP						0x19	
+
+#define		RF_RX_G1					0x1A	
+#define		RF_RX_G2					0x1B	
+
+#define		RF_RX_BB2					0x1C	
+#define		RF_RX_BB1					0x1D	
+
+#define		RF_RCK1					0x1E	
+#define		RF_RCK2					0x1F	
+
+#define		RF_TX_G1					0x20	
+#define		RF_TX_G2					0x21	
+#define		RF_TX_G3					0x22	
+
+#define		RF_TX_BB1					0x23	
+
+#define		RF_T_METER					0x24	
+
+#define		RF_SYN_G1					0x25	
+#define		RF_SYN_G2					0x26	
+#define		RF_SYN_G3					0x27	
+#define		RF_SYN_G4					0x28	
+#define		RF_SYN_G5					0x29	
+#define		RF_SYN_G6					0x2A	
+#define		RF_SYN_G7					0x2B	
+#define		RF_SYN_G8					0x2C	
+
+#define		RF_RCK_OS					0x30	
+
+#define		RF_TXPA_G1					0x31	
+#define		RF_TXPA_G2					0x32	
+#define		RF_TXPA_G3					0x33	
+
+#define		bBBResetB						0x100	
+#define		bGlobalResetB					0x200
+#define		bOFDMTxStart					0x4
+#define		bCCKTxStart						0x8
+#define		bCRC32Debug					0x100
+#define		bPMACLoopback					0x10
+#define		bTxLSIG							0xffffff
+#define		bOFDMTxRate					0xf
+#define		bOFDMTxReserved				0x10
+#define		bOFDMTxLength					0x1ffe0
+#define		bOFDMTxParity					0x20000
+#define		bTxHTSIG1						0xffffff
+#define		bTxHTMCSRate					0x7f
+#define		bTxHTBW						0x80
+#define		bTxHTLength					0xffff00
+#define		bTxHTSIG2						0xffffff
+#define		bTxHTSmoothing					0x1
+#define		bTxHTSounding					0x2
+#define		bTxHTReserved					0x4
+#define		bTxHTAggreation				0x8
+#define		bTxHTSTBC						0x30
+#define		bTxHTAdvanceCoding			0x40
+#define		bTxHTShortGI					0x80
+#define		bTxHTNumberHT_LTF			0x300
+#define		bTxHTCRC8						0x3fc00
+#define		bCounterReset					0x10000
+#define		bNumOfOFDMTx					0xffff
+#define		bNumOfCCKTx					0xffff0000
+#define		bTxIdleInterval					0xffff
+#define		bOFDMService					0xffff0000
+#define		bTxMACHeader					0xffffffff
+#define		bTxDataInit						0xff
+#define		bTxHTMode						0x100
+#define		bTxDataType					0x30000
+#define		bTxRandomSeed					0xffffffff
+#define		bCCKTxPreamble					0x1
+#define		bCCKTxSFD						0xffff0000
+#define		bCCKTxSIG						0xff
+#define		bCCKTxService					0xff00
+#define		bCCKLengthExt					0x8000
+#define		bCCKTxLength					0xffff0000
+#define		bCCKTxCRC16					0xffff
+#define		bCCKTxStatus					0x1
+#define		bOFDMTxStatus					0x2
+
+#define 	IS_BB_REG_OFFSET_92S(_Offset)		((_Offset >= 0x800) && (_Offset <= 0xfff))
+
+#define		bRFMOD							0x1	
+#define		bJapanMode						0x2
+#define		bCCKTxSC						0x30
+#define		bCCKEn							0x1000000
+#define		bOFDMEn						0x2000000
+
+#define		bOFDMRxADCPhase           		0x10000	
+#define		bOFDMTxDACPhase           		0x40000
+#define		bXATxAGC                  			0x3f
+
+#define		bXBTxAGC                  			0xf00	
+#define		bXCTxAGC                  			0xf000
+#define		bXDTxAGC                  			0xf0000
+       		
+#define		bPAStart                  			0xf0000000	
+#define		bTRStart                  			0x00f00000
+#define		bRFStart                  			0x0000f000
+#define		bBBStart                  			0x000000f0
+#define		bBBCCKStart               		0x0000000f
+#define		bPAEnd                    			0xf          
+#define		bTREnd                    			0x0f000000
+#define		bRFEnd                    			0x000f0000
+#define		bCCAMask                  			0x000000f0   
+#define		bR2RCCAMask               		0x00000f00
+#define		bHSSI_R2TDelay            		0xf8000000
+#define		bHSSI_T2RDelay            		0xf80000
+#define		bContTxHSSI               		0x400     
+#define		bIGFromCCK                		0x200
+#define		bAGCAddress               		0x3f
+#define		bRxHPTx                   			0x7000
+#define		bRxHPT2R                  			0x38000
+#define		bRxHPCCKIni               		0xc0000
+#define		bAGCTxCode                		0xc00000
+#define		bAGCRxCode                		0x300000
+
+#define		b3WireDataLength          		0x800	
+#define		b3WireAddressLength       		0x400
+
+#define		b3WireRFPowerDown         		0x1	
+#define		b5GPAPEPolarity           		0x40000000
+#define		b2GPAPEPolarity           		0x80000000
+#define		bRFSW_TxDefaultAnt        		0x3
+#define		bRFSW_TxOptionAnt         		0x30
+#define		bRFSW_RxDefaultAnt        		0x300
+#define		bRFSW_RxOptionAnt         		0x3000
+#define		bRFSI_3WireData           		0x1
+#define		bRFSI_3WireClock          		0x2
+#define		bRFSI_3WireLoad           		0x4
+#define		bRFSI_3WireRW             		0x8
+#define		bRFSI_3Wire               			0xf
+
+#define		bRFSI_RFENV               		0x10	
+
+#define		bRFSI_TRSW                		0x20	
+#define		bRFSI_TRSWB               		0x40
+#define		bRFSI_ANTSW               		0x100
+#define		bRFSI_ANTSWB              		0x200
+#define		bRFSI_PAPE                			0x400
+#define		bRFSI_PAPE5G              		0x800 
+#define		bBandSelect               			0x1
+#define		bHTSIG2_GI                			0x80
+#define		bHTSIG2_Smoothing         		0x01
+#define		bHTSIG2_Sounding          		0x02
+#define		bHTSIG2_Aggreaton         		0x08
+#define		bHTSIG2_STBC              		0x30
+#define		bHTSIG2_AdvCoding         		0x40
+#define		bHTSIG2_NumOfHTLTF        	0x300
+#define		bHTSIG2_CRC8              		0x3fc
+#define		bHTSIG1_MCS               		0x7f
+#define		bHTSIG1_BandWidth         		0x80
+#define		bHTSIG1_HTLength          		0xffff
+#define		bLSIG_Rate                			0xf
+#define		bLSIG_Reserved            		0x10
+#define		bLSIG_Length              		0x1fffe
+#define		bLSIG_Parity              			0x20
+#define		bCCKRxPhase               		0x4
+#if (RTL92SE_FPGA_VERIFY == 1)
+#define		bLSSIReadAddress          		0x3f000000   
+#else
+#define		bLSSIReadAddress          		0x7f800000   
+#endif
+#define		bLSSIReadEdge             		0x80000000   
+#if (RTL92SE_FPGA_VERIFY == 1)
+#define		bLSSIReadBackData         		0xfff		
+#else
+#define		bLSSIReadBackData         		0xfffff		
+#endif
+#define		bLSSIReadOKFlag           		0x1000	
+#define		bCCKSampleRate            		0x8       
+#define		bRegulator0Standby        		0x1
+#define		bRegulatorPLLStandby      		0x2
+#define		bRegulator1Standby        		0x4
+#define		bPLLPowerUp               		0x8
+#define		bDPLLPowerUp              		0x10
+#define		bDA10PowerUp              		0x20
+#define		bAD7PowerUp               		0x200
+#define		bDA6PowerUp               		0x2000
+#define		bXtalPowerUp              		0x4000
+#define		b40MDClkPowerUP           		0x8000
+#define		bDA6DebugMode             		0x20000
+#define		bDA6Swing                 			0x380000
+
+#define		bADClkPhase               		0x4000000	
+
+#define		b80MClkDelay              		0x18000000	
+#define		bAFEWatchDogEnable        		0x20000000
+
+#define		bXtalCap01                			0xc0000000	
+#define		bXtalCap23                			0x3
+#define		bXtalCap92x					0x0f000000
+#define 		bXtalCap                			0x0f000000
+
+#define		bIntDifClkEnable          		0x400	
+#define		bExtSigClkEnable         	 	0x800
+#define		bBandgapMbiasPowerUp      	0x10000
+#define		bAD11SHGain               		0xc0000
+#define		bAD11InputRange           		0x700000
+#define		bAD11OPCurrent            		0x3800000
+#define		bIPathLoopback            		0x4000000
+#define		bQPathLoopback            		0x8000000
+#define		bAFELoopback              		0x10000000
+#define		bDA10Swing                		0x7e0
+#define		bDA10Reverse              		0x800
+#define		bDAClkSource              		0x1000
+#define		bAD7InputRange            		0x6000
+#define		bAD7Gain                  			0x38000
+#define		bAD7OutputCMMode          		0x40000
+#define		bAD7InputCMMode           		0x380000
+#define		bAD7Current               			0xc00000
+#define		bRegulatorAdjust          		0x7000000
+#define		bAD11PowerUpAtTx          		0x1
+#define		bDA10PSAtTx               		0x10
+#define		bAD11PowerUpAtRx          		0x100
+#define		bDA10PSAtRx               		0x1000       		
+#define		bCCKRxAGCFormat           		0x200       		
+#define		bPSDFFTSamplepPoint       		0xc000
+#define		bPSDAverageNum            		0x3000
+#define		bIQPathControl            		0xc00
+#define		bPSDFreq                  			0x3ff
+#define		bPSDAntennaPath           		0x30
+#define		bPSDIQSwitch              		0x40
+#define		bPSDRxTrigger             		0x400000
+#define		bPSDTxTrigger             		0x80000000
+#define		bPSDSineToneScale        		0x7f000000
+#define		bPSDReport                			0xffff
+
+#define		bOFDMTxSC                 		0x30000000	
+#define		bCCKTxOn                  			0x1
+#define		bOFDMTxOn                 		0x2
+#define		bDebugPage                		0xfff  
+#define		bDebugItem                		0xff   
+#define		bAntL              	       		0x10
+#define		bAntNonHT           	      			0x100
+#define		bAntHT1               			0x1000
+#define		bAntHT2                   			0x10000
+#define		bAntHT1S1                 			0x100000
+#define		bAntNonHTS1               		0x1000000
+
+#define		bCCKBBMode                		0x3	
+#define		bCCKTxPowerSaving         		0x80
+#define		bCCKRxPowerSaving         		0x40
+
+#define		bCCKSideBand              		0x10	
+
+#define		bCCKScramble              		0x8	
+#define		bCCKAntDiversity    		      	0x8000
+#define		bCCKCarrierRecovery   	    	0x4000
+#define		bCCKTxRate           		     	0x3000
+#define		bCCKDCCancel             	 	0x0800
+#define		bCCKISICancel             		0x0400
+#define		bCCKMatchFilter           		0x0200
+#define		bCCKEqualizer             		0x0100
+#define		bCCKPreambleDetect       	 	0x800000
+#define		bCCKFastFalseCCA          		0x400000
+#define		bCCKChEstStart            		0x300000
+#define		bCCKCCACount              		0x080000
+#define		bCCKcs_lim                			0x070000
+#define		bCCKBistMode              		0x80000000
+#define		bCCKCCAMask             	  	0x40000000
+#define		bCCKTxDACPhase         	   	0x4
+#define		bCCKRxADCPhase         	   	0x20000000   
+#define		bCCKr_cp_mode0         	   	0x0100
+#define		bCCKTxDCOffset           	 	0xf0
+#define		bCCKRxDCOffset           	 	0xf
+#define		bCCKCCAMode              	 	0xc000
+#define		bCCKFalseCS_lim           		0x3f00
+#define		bCCKCS_ratio              		0xc00000
+#define		bCCKCorgBit_sel           		0x300000
+#define		bCCKPD_lim                			0x0f0000
+#define		bCCKNewCCA                		0x80000000
+#define		bCCKRxHPofIG              		0x8000
+#define		bCCKRxIG                  			0x7f00
+#define		bCCKLNAPolarity           		0x800000
+#define		bCCKRx1stGain             		0x7f0000
+#define		bCCKRFExtend              		0x20000000 
+#define		bCCKRxAGCSatLevel        	 	0x1f000000
+#define		bCCKRxAGCSatCount       	  	0xe0
+#define		bCCKRxRFSettle            		0x1f       
+#define		bCCKFixedRxAGC           	 	0x8000
+#define		bCCKAntennaPolarity      	 	0x2000
+#define		bCCKTxFilterType          		0x0c00
+#define		bCCKRxAGCReportType   	   	0x0300
+#define		bCCKRxDAGCEn              		0x80000000
+#define		bCCKRxDAGCPeriod        	  	0x20000000
+#define		bCCKRxDAGCSatLevel     	   	0x1f000000
+#define		bCCKTimingRecovery       	 	0x800000
+#define		bCCKTxC0                  			0x3f0000
+#define		bCCKTxC1                  			0x3f000000
+#define		bCCKTxC2                  			0x3f
+#define		bCCKTxC3                  			0x3f00
+#define		bCCKTxC4                  			0x3f0000
+#define		bCCKTxC5                  			0x3f000000
+#define		bCCKTxC6                  			0x3f
+#define		bCCKTxC7                  			0x3f00
+#define		bCCKDebugPort             		0xff0000
+#define		bCCKDACDebug              		0x0f000000
+#define		bCCKFalseAlarmEnable      		0x8000
+#define		bCCKFalseAlarmRead        		0x4000
+#define		bCCKTRSSI                 			0x7f
+#define		bCCKRxAGCReport           		0xfe
+#define		bCCKRxReport_AntSel       		0x80000000
+#define		bCCKRxReport_MFOff        		0x40000000
+#define		bCCKRxRxReport_SQLoss     	0x20000000
+#define		bCCKRxReport_Pktloss      		0x10000000
+#define		bCCKRxReport_Lockedbit    	0x08000000
+#define		bCCKRxReport_RateError    	0x04000000
+#define		bCCKRxReport_RxRate       		0x03000000
+#define		bCCKRxFACounterLower      	0xff
+#define		bCCKRxFACounterUpper      	0xff000000
+#define		bCCKRxHPAGCStart          		0xe000
+#define		bCCKRxHPAGCFinal          		0x1c00       		
+#define		bCCKRxFalseAlarmEnable    	0x8000
+#define		bCCKFACounterFreeze       		0x4000       		
+#define		bCCKTxPathSel             		0x10000000
+#define		bCCKDefaultRxPath         		0xc000000
+#define		bCCKOptionRxPath          		0x3000000
+
+#define		bNumOfSTF                			0x3	
+#define		bShift_L                 			0xc0
+#define		bGI_TH                   			0xc
+#define		bRxPathA                 			0x1
+#define		bRxPathB                 			0x2
+#define		bRxPathC                 			0x4
+#define		bRxPathD                 			0x8
+#define		bTxPathA                 			0x1
+#define		bTxPathB                 			0x2
+#define		bTxPathC                 			0x4
+#define		bTxPathD                 			0x8
+#define		bTRSSIFreq               			0x200
+#define		bADCBackoff              			0x3000
+#define		bDFIRBackoff             			0xc000
+#define		bTRSSILatchPhase         		0x10000
+#define		bRxIDCOffset             			0xff
+#define		bRxQDCOffset             			0xff00
+#define		bRxDFIRMode              		0x1800000
+#define		bRxDCNFType              		0xe000000
+#define		bRXIQImb_A               			0x3ff
+#define		bRXIQImb_B               			0xfc00
+#define		bRXIQImb_C               			0x3f0000
+#define		bRXIQImb_D               			0xffc00000
+#define		bDC_dc_Notch             		0x60000
+#define		bRxNBINotch              			0x1f000000
+#define		bPD_TH                   			0xf
+#define		bPD_TH_Opt2              		0xc000
+#define		bPWED_TH                 			0x700
+#define		bIfMF_Win_L              			0x800
+#define		bPD_Option               			0x1000
+#define		bMF_Win_L                			0xe000
+#define		bBW_Search_L             		0x30000
+#define		bwin_enh_L               			0xc0000
+#define		bBW_TH                   			0x700000
+#define		bED_TH2                  			0x3800000
+#define		bBW_option               			0x4000000
+#define		bRatio_TH                			0x18000000
+#define		bWindow_L                			0xe0000000
+#define		bSBD_Option              			0x1
+#define		bFrame_TH                			0x1c
+#define		bFS_Option               			0x60
+#define		bDC_Slope_check          		0x80
+#define		bFGuard_Counter_DC_L     		0xe00
+#define		bFrame_Weight_Short      		0x7000
+#define		bSub_Tune                			0xe00000
+#define		bFrame_DC_Length         		0xe000000
+#define		bSBD_start_offset        		0x30000000
+#define		bFrame_TH_2              		0x7
+#define		bFrame_GI2_TH            		0x38
+#define		bGI2_Sync_en             		0x40
+#define		bSarch_Short_Early       		0x300
+#define		bSarch_Short_Late        		0xc00
+#define		bSarch_GI2_Late          		0x70000
+#define		bCFOAntSum               		0x1
+#define		bCFOAcc                  			0x2
+#define		bCFOStartOffset          		0xc
+#define		bCFOLookBack             		0x70
+#define		bCFOSumWeight            		0x80
+#define		bDAGCEnable              			0x10000
+#define		bTXIQImb_A               			0x3ff
+#define		bTXIQImb_B               			0xfc00
+#define		bTXIQImb_C               			0x3f0000
+#define		bTXIQImb_D               			0xffc00000
+#define		bTxIDCOffset             			0xff
+#define		bTxQDCOffset             			0xff00
+#define		bTxDFIRMode              		0x10000
+#define		bTxPesudoNoiseOn         		0x4000000
+#define		bTxPesudoNoise_A         		0xff
+#define		bTxPesudoNoise_B         		0xff00
+#define		bTxPesudoNoise_C         		0xff0000
+#define		bTxPesudoNoise_D         		0xff000000
+#define		bCCADropOption           		0x20000
+#define		bCCADropThres            		0xfff00000
+#define		bEDCCA_H                 			0xf
+#define		bEDCCA_L                 			0xf0
+#define		bLambda_ED               0x300
+#define		bRxInitialGain           0x7f
+#define		bRxAntDivEn              0x80
+#define		bRxAGCAddressForLNA      0x7f00
+#define		bRxHighPowerFlow         0x8000
+#define		bRxAGCFreezeThres        0xc0000
+#define		bRxFreezeStep_AGC1       0x300000
+#define		bRxFreezeStep_AGC2       0xc00000
+#define		bRxFreezeStep_AGC3       0x3000000
+#define		bRxFreezeStep_AGC0       0xc000000
+#define		bRxRssi_Cmp_En           0x10000000
+#define		bRxQuickAGCEn            0x20000000
+#define		bRxAGCFreezeThresMode    0x40000000
+#define		bRxOverFlowCheckType     0x80000000
+#define		bRxAGCShift              0x7f
+#define		bTRSW_Tri_Only           0x80
+#define		bPowerThres              0x300
+#define		bRxAGCEn                 0x1
+#define		bRxAGCTogetherEn         0x2
+#define		bRxAGCMin                0x4
+#define		bRxHP_Ini                0x7
+#define		bRxHP_TRLNA              0x70
+#define		bRxHP_RSSI               0x700
+#define		bRxHP_BBP1               0x7000
+#define		bRxHP_BBP2               0x70000
+#define		bRxHP_BBP3               0x700000
+#define		bRSSI_H                  0x7f0000     
+#define		bRSSI_Gen                0x7f000000   
+#define		bRxSettle_TRSW           0x7
+#define		bRxSettle_LNA            0x38
+#define		bRxSettle_RSSI           0x1c0
+#define		bRxSettle_BBP            0xe00
+#define		bRxSettle_RxHP           0x7000
+#define		bRxSettle_AntSW_RSSI     0x38000
+#define		bRxSettle_AntSW          0xc0000
+#define		bRxProcessTime_DAGC      0x300000
+#define		bRxSettle_HSSI           0x400000
+#define		bRxProcessTime_BBPPW     0x800000
+#define		bRxAntennaPowerShift     0x3000000
+#define		bRSSITableSelect         0xc000000
+#define		bRxHP_Final              0x7000000
+#define		bRxHTSettle_BBP          0x7
+#define		bRxHTSettle_HSSI         0x8
+#define		bRxHTSettle_RxHP         0x70
+#define		bRxHTSettle_BBPPW        0x80
+#define		bRxHTSettle_Idle         0x300
+#define		bRxHTSettle_Reserved     0x1c00
+#define		bRxHTRxHPEn              0x8000
+#define		bRxHTAGCFreezeThres      0x30000
+#define		bRxHTAGCTogetherEn       0x40000
+#define		bRxHTAGCMin              0x80000
+#define		bRxHTAGCEn               0x100000
+#define		bRxHTDAGCEn              0x200000
+#define		bRxHTRxHP_BBP            0x1c00000
+#define		bRxHTRxHP_Final          0xe0000000
+#define		bRxPWRatioTH             0x3
+#define		bRxPWRatioEn             0x4
+#define		bRxMFHold                0x3800
+#define		bRxPD_Delay_TH1          0x38
+#define		bRxPD_Delay_TH2          0x1c0
+#define		bRxPD_DC_COUNT_MAX       0x600
+#define		bRxPD_Delay_TH           0x8000
+#define		bRxProcess_Delay         0xf0000
+#define		bRxSearchrange_GI2_Early 0x700000
+#define		bRxFrame_Guard_Counter_L 0x3800000
+#define		bRxSGI_Guard_L           0xc000000
+#define		bRxSGI_Search_L          0x30000000
+#define		bRxSGI_TH                0xc0000000
+#define		bDFSCnt0                 0xff
+#define		bDFSCnt1                 0xff00
+#define		bDFSFlag                 0xf0000       		
+#define		bMFWeightSum             0x300000
+#define		bMinIdxTH                0x7f000000       		
+#define		bDAFormat                0x40000       		
+#define		bTxChEmuEnable           0x01000000       		
+#define		bTRSWIsolation_A         0x7f
+#define		bTRSWIsolation_B         0x7f00
+#define		bTRSWIsolation_C         0x7f0000
+#define		bTRSWIsolation_D         0x7f000000       		
+#define		bExtLNAGain              0x7c00          
+
+#define		bSTBCEn                  0x4	
+#define		bAntennaMapping          0x10
+#define		bNss                     0x20
+#define		bCFOAntSumD              0x200
+#define		bPHYCounterReset         0x8000000
+#define		bCFOReportGet            0x4000000
+#define		bOFDMContinueTx          0x10000000
+#define		bOFDMSingleCarrier       0x20000000
+#define		bOFDMSingleTone          0x40000000
+#define		bHTDetect                0x100
+#define		bCFOEn                   0x10000
+#define		bCFOValue                0xfff00000
+#define		bSigTone_Re              0x3f
+#define		bSigTone_Im              0x7f00
+#define		bCounter_CCA             0xffff
+#define		bCounter_ParityFail      0xffff0000
+#define		bCounter_RateIllegal     0xffff
+#define		bCounter_CRC8Fail        0xffff0000
+#define		bCounter_MCSNoSupport    0xffff
+#define		bCounter_FastSync        0xffff
+#define		bShortCFO                0xfff
+#define		bShortCFOTLength         12   
+#define		bShortCFOFLength         11   
+#define		bLongCFO                 0x7ff
+#define		bLongCFOTLength          11
+#define		bLongCFOFLength          11
+#define		bTailCFO                 0x1fff
+#define		bTailCFOTLength          13
+#define		bTailCFOFLength          12       		
+#define		bmax_en_pwdB             0xffff
+#define		bCC_power_dB             0xffff0000
+#define		bnoise_pwdB              0xffff
+#define		bPowerMeasTLength        10
+#define		bPowerMeasFLength        3
+#define		bRx_HT_BW                0x1
+#define		bRxSC                    0x6
+#define		bRx_HT                   0x8       		
+#define		bNB_intf_det_on          0x1
+#define		bIntf_win_len_cfg        0x30
+#define		bNB_Intf_TH_cfg          0x1c0       		
+#define		bRFGain                  0x3f
+#define		bTableSel                0x40
+#define		bTRSW                    0x80       		
+#define		bRxSNR_A                 0xff
+#define		bRxSNR_B                 0xff00
+#define		bRxSNR_C                 0xff0000
+#define		bRxSNR_D                 0xff000000
+#define		bSNREVMTLength           8
+#define		bSNREVMFLength           1       		
+#define		bCSI1st                  0xff
+#define		bCSI2nd                  0xff00
+#define		bRxEVM1st                0xff0000
+#define		bRxEVM2nd                0xff000000       		
+#define		bSIGEVM                  0xff
+#define		bPWDB                    0xff00
+#define		bSGIEN                   0x10000
+       		
+#define		bSFactorQAM1             0xf	
+#define		bSFactorQAM2             0xf0
+#define		bSFactorQAM3             0xf00
+#define		bSFactorQAM4             0xf000
+#define		bSFactorQAM5             0xf0000
+#define		bSFactorQAM6             0xf0000
+#define		bSFactorQAM7             0xf00000
+#define		bSFactorQAM8             0xf000000
+#define		bSFactorQAM9             0xf0000000
+#define		bCSIScheme               0x100000
+       		
+#define		bNoiseLvlTopSet          0x3	
+#define		bChSmooth                0x4
+#define		bChSmoothCfg1            0x38
+#define		bChSmoothCfg2            0x1c0
+#define		bChSmoothCfg3            0xe00
+#define		bChSmoothCfg4            0x7000
+#define		bMRCMode                 0x800000
+#define		bTHEVMCfg                0x7000000
+       		
+#define		bLoopFitType             0x1	
+#define		bUpdCFO                  0x40
+#define		bUpdCFOOffData           0x80
+#define		bAdvUpdCFO               0x100
+#define		bAdvTimeCtrl             0x800
+#define		bUpdClko                 0x1000
+#define		bFC                      0x6000
+#define		bTrackingMode            0x8000
+#define		bPhCmpEnable             0x10000
+#define		bUpdClkoLTF              0x20000
+#define		bComChCFO                0x40000
+#define		bCSIEstiMode             0x80000
+#define		bAdvUpdEqz               0x100000
+#define		bUChCfg                  0x7000000
+#define		bUpdEqz                  0x8000000
+
+#define		bTxAGCRate18_06			0x7f7f7f7f	
+#define		bTxAGCRate54_24			0x7f7f7f7f
+#define		bTxAGCRateMCS32			0x7f
+#define		bTxAGCRateCCK			0x7f00
+#define		bTxAGCRateMCS3_MCS0		0x7f7f7f7f
+#define		bTxAGCRateMCS7_MCS4		0x7f7f7f7f
+#define		bTxAGCRateMCS11_MCS8	0x7f7f7f7f
+#define		bTxAGCRateMCS15_MCS12	0x7f7f7f7f
+
+#define		bRxPesudoNoiseOn         0x20000000	
+#define		bRxPesudoNoise_A         0xff
+#define		bRxPesudoNoise_B         0xff00
+#define		bRxPesudoNoise_C         0xff0000
+#define		bRxPesudoNoise_D         0xff000000
+#define		bPesudoNoiseState_A      0xffff
+#define		bPesudoNoiseState_B      0xffff0000
+#define		bPesudoNoiseState_C      0xffff
+#define		bPesudoNoiseState_D      0xffff0000
+
+#define		bZebra1_HSSIEnable        0x8		
+#define		bZebra1_TRxControl        0xc00
+#define		bZebra1_TRxGainSetting    0x07f
+#define		bZebra1_RxCorner          0xc00
+#define		bZebra1_TxChargePump      0x38
+#define		bZebra1_RxChargePump      0x7
+#define		bZebra1_ChannelNum        0xf80
+#define		bZebra1_TxLPFBW           0x400
+#define		bZebra1_RxLPFBW           0x600
+
+#define		bRTL8256RegModeCtrl1      0x100	
+#define		bRTL8256RegModeCtrl0      0x40
+#define		bRTL8256_TxLPFBW          0x18
+#define		bRTL8256_RxLPFBW          0x600
+
+#define		bRTL8258_TxLPFBW          0xc	
+#define		bRTL8258_RxLPFBW          0xc00
+#define		bRTL8258_RSSILPFBW        0xc0
+
+
+
+#define		bByte0                    0x1	
+#define		bByte1                    0x2
+#define		bByte2                    0x4
+#define		bByte3                    0x8
+#define		bWord0                    0x3
+#define		bWord1                    0xc
+#define		bDWord                    0xf
+
+#define		bMaskByte0                0xff	
+#define		bMaskByte1                0xff00
+#define		bMaskByte2                0xff0000
+#define		bMaskByte3                0xff000000
+#define		bMaskHWord                0xffff0000
+#define		bMaskLWord                0x0000ffff
+#define		bMaskDWord                0xffffffff
+
+#if (RTL92SE_FPGA_VERIFY == 1)
+#define		bMask12Bits               0xfff	
+#define		bMask20Bits               0xfff	
+#define 		bRFRegOffsetMask	0xfff		
+#else
+#define		bMask12Bits               0xfffff	
+#define		bMask20Bits               0xfffff	
+#define 		bRFRegOffsetMask	0xfffff		
+#endif       		
+#define		bEnable                   0x1	
+#define		bDisable                  0x0
+       		
+#define		LeftAntenna               0x0	
+#define		RightAntenna              0x1
+       		
+#define		tCheckTxStatus            500   
+#define		tUpdateRxCounter          100   
+       		
+#define		rateCCK     0	
+#define		rateOFDM    1
+#define		rateHT      2
+
+#define		bPMAC_End                 0x1ff	
+#define		bFPGAPHY0_End             0x8ff
+#define		bFPGAPHY1_End             0x9ff
+#define		bCCKPHY0_End              0xaff
+#define		bOFDMPHY0_End             0xcff
+#define		bOFDMPHY1_End             0xdff
+
+
+#define		bPMACControl              0x0		
+#define		bWMACControl              0x1
+#define		bWNICControl              0x2
+       		
+#define		PathA                     0x0	
+#define		PathB                     0x1
+#define		PathC                     0x2
+#define		PathD                     0x3
+
+/*--------------------------Define Parameters-------------------------------*/
+
+
+#endif	
+
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/fsam7400/INSTALL
+++ linux-mvl-dove-2.6.32/ubuntu/fsam7400/INSTALL
@@ -0,0 +1,110 @@
+SW RF kill switch for Fujitsu Siemens Amilo M 7400
+Copyright (C) 2006, zwobbl
+For additional information, contact Marcel Naziri <fsam7400@zwobbl.de>
+
+COMPILER REQUIREMENTS
+---------   ------     ----       ---    --       --       -          -
+
+You need to be using GCC v3.0 or higher in order to build the fsam7400 module.
+Using older versions will result in several compilation errors.
+
+
+INSTALLING THE BITS
+------------ -----   -----       ----       ---       --         -
+
+# Unpack the source tarball
+
+% tar xvzf fsam7400-0.x.y.tgz
+% cd fsam7400-0.x.y
+
+Make sure to be root when performing the following operations. Also you must 
+have a kernel source tree installed under /usr/src/linux
+
+# Build the kernel module
+
+% make 
+
+Debug output is enabled by default. This is a good idea if you use the fsam module for 
+the first time, so you get some nice information printed on kernel log. If you don't 
+need the messages anymore, you have to comment out the line CONFIG_IPW2100_DEBUG=y in 
+the Makefile.
+
+# Install the kernel module
+
+% make install
+
+Now you are ready for...
+
+
+LOADING THE DRIVER
+------------ -----   -----       ----       ---       --         -
+
+Also easy to go... :)
+
+% modprobe fsam7400
+
+If you have set "wireless device" enabled in your "Advanced" bios settings of
+your Amilo M 7400 radio should be turned on at this point. So you're done!
+Watch out your kernel log if supported hardware was found. :)
+
+
+RADIO STATE AT LOADING
+
+You can override the wireless bios setting with
+
+% modprobe fsam7400 radio=[0|1]
+
+
+PROC FILESYSTEM
+
+If your hardware is supported by the driver you will get an entry in /proc 
+called driver/wireless/radio which will give you state information by typing
+
+% cat /proc/driver/wireless/radio
+
+You can turn the radio on and off at your will with 
+
+% echo [1|on] > /proc/driver/wireless/radio
+% echo [0|off] > /proc/driver/wireless/radio
+
+The module also recognizes parameters to set the user- and/or group-ID to 
+something other than root, so you don't have to adjust it by hand. 
+Just select your favourite IDs and type
+
+% modprobe fsam7400 uid=1000 gid=500
+
+Note, that /proc/driver/wireless/radio will only be read- and writeable by 
+user & group and only readable by others.
+
+If you want to see debug output on syslog use the following parameter when 
+loading the module 
+
+% modprobe fsam7400 debug=1
+
+
+AUTOMATION FEATURES
+
+By default the driver will turn off the radio automatically short before the 
+module is unloaded. To override this behaviour load the module adding the 
+following parameter
+
+% modprobe fsam7400 autooff=0
+
+Also since 0.4.0 the driver can automatically modprobe the ipw2100 module when
+radio state changes to on and rmmods it when radio is turned off by fsam7400.
+To enable autoload support, use
+
+% modprobe fsam7400 autoload=1
+
+
+HIBERNATION SUPPORT
+
+After hibernation and boot up of the system the wireless radio might be disabled
+again. To revert to the radio state before hibernation just put the following
+in the wakeup script
+
+% echo resume > /proc/driver/wireless/radio
+
+
+
+That's all for now. Have fun with the driver!
--- linux-mvl-dove-2.6.32.orig/ubuntu/fsam7400/Kconfig
+++ linux-mvl-dove-2.6.32/ubuntu/fsam7400/Kconfig
@@ -0,0 +1,5 @@
+config FSAM7400
+	tristate "SW RF kill switch for Fujitsu Siemens Amilo M 7400"
+	depends on CHECK_SIGNATURE
+	default m
+	---help---
--- linux-mvl-dove-2.6.32.orig/ubuntu/fsam7400/LICENSE
+++ linux-mvl-dove-2.6.32/ubuntu/fsam7400/LICENSE
@@ -0,0 +1,338 @@
+"This software program is licensed subject to the GNU General Public License 
+(GPL). Version 2, June 1991, available at 
+<http://www.fsf.org/copyleft/gpl.html>"
+
+GNU General Public License 
+
+Version 2, June 1991
+
+Copyright (C) 1989, 1991 Free Software Foundation, Inc.  
+59 Temple Place - Suite 330, Boston, MA  02111-1307, USA
+
+Everyone is permitted to copy and distribute verbatim copies of this license
+document, but changing it is not allowed.
+
+Preamble
+
+The licenses for most software are designed to take away your freedom to 
+share and change it. By contrast, the GNU General Public License is intended
+to guarantee your freedom to share and change free software--to make sure 
+the software is free for all its users. This General Public License applies 
+to most of the Free Software Foundation's software and to any other program 
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+can apply it to your programs, too.
+
+When we speak of free software, we are referring to freedom, not price. Our
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+
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+
+For example, if you distribute copies of such a program, whether gratis or 
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+
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+   indicate your acceptance of this License to do so, and all its terms and
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+   based on it. 
+
+6. Each time you redistribute the Program (or any work based on the 
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+   on the recipients' exercise of the rights granted herein. You are not 
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+
+7. If, as a consequence of a court judgment or allegation of patent 
+   infringement or for any other reason (not limited to patent issues), 
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+   not permit royalty-free redistribution of the Program by all those who 
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+
+   If any portion of this section is held invalid or unenforceable under any
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+
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+   through any other system and a licensee cannot impose that choice. 
+
+   This section is intended to make thoroughly clear what is believed to be 
+   a consequence of the rest of this License. 
+
+8. If the distribution and/or use of the Program is restricted in certain 
+   countries either by patents or by copyrighted interfaces, the original 
+   copyright holder who places the Program under this License may add an 
+   explicit geographical distribution limitation excluding those countries, 
+   so that distribution is permitted only in or among countries not thus 
+   excluded. In such case, this License incorporates the limitation as if 
+   written in the body of this License. 
+
+9. The Free Software Foundation may publish revised and/or new versions of 
+   the General Public License from time to time. Such new versions will be 
+   similar in spirit to the present version, but may differ in detail to 
+   address new problems or concerns. 
+
+   Each version is given a distinguishing version number. If the Program 
+   specifies a version number of this License which applies to it and "any 
+   later version", you have the option of following the terms and 
+   conditions either of that version or of any later version published by 
+   the Free Software Foundation. If the Program does not specify a version 
+   number of this License, you may choose any version ever published by the 
+   Free Software Foundation. 
+
+10. If you wish to incorporate parts of the Program into other free programs
+    whose distribution conditions are different, write to the author to ask 
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+
+   NO WARRANTY
+
+11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY 
+    FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN 
+    OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES 
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+
+12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING 
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+    THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS), EVEN IF SUCH HOLDER OR 
+    OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. 
+
+END OF TERMS AND CONDITIONS
+
+How to Apply These Terms to Your New Programs
+
+If you develop a new program, and you want it to be of the greatest 
+possible use to the public, the best way to achieve this is to make it free 
+software which everyone can redistribute and change under these terms. 
+
+To do so, attach the following notices to the program. It is safest to 
+attach them to the start of each source file to most effectively convey the
+exclusion of warranty; and each file should have at least the "copyright" 
+line and a pointer to where the full notice is found. 
+
+one line to give the program's name and an idea of what it does.
+Copyright (C) yyyy  name of author
+
+This program is free software; you can redistribute it and/or modify it 
+under the terms of the GNU General Public License as published by the Free 
+Software Foundation; either version 2 of the License, or (at your option) 
+any later version.
+
+This program is distributed in the hope that it will be useful, but WITHOUT 
+ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for 
+more details.
+
+You should have received a copy of the GNU General Public License along with
+this program; if not, write to the Free Software Foundation, Inc., 59 
+Temple Place - Suite 330, Boston, MA  02111-1307, USA.
+
+Also add information on how to contact you by electronic and paper mail. 
+
+If the program is interactive, make it output a short notice like this when 
+it starts in an interactive mode: 
+
+Gnomovision version 69, Copyright (C) year name of author Gnomovision comes 
+with ABSOLUTELY NO WARRANTY; for details type 'show w'.  This is free 
+software, and you are welcome to redistribute it under certain conditions; 
+type 'show c' for details.
+
+The hypothetical commands 'show w' and 'show c' should show the appropriate 
+parts of the General Public License. Of course, the commands you use may be 
+called something other than 'show w' and 'show c'; they could even be 
+mouse-clicks or menu items--whatever suits your program. 
+
+You should also get your employer (if you work as a programmer) or your 
+school, if any, to sign a "copyright disclaimer" for the program, if 
+necessary. Here is a sample; alter the names: 
+
+Yoyodyne, Inc., hereby disclaims all copyright interest in the program 
+'Gnomovision' (which makes passes at compilers) written by James Hacker.
+
+signature of Ty Coon, 1 April 1989
+Ty Coon, President of Vice
+
+This General Public License does not permit incorporating your program into 
+proprietary programs. If your program is a subroutine library, you may 
+consider it more useful to permit linking proprietary applications with the 
+library. If this is what you want to do, use the GNU Library General Public 
+License instead of this License.
--- linux-mvl-dove-2.6.32.orig/ubuntu/fsam7400/BOM
+++ linux-mvl-dove-2.6.32/ubuntu/fsam7400/BOM
@@ -0,0 +1,2 @@
+Downloaded from:	http://www.iragan.com/linux/fsam7400/
+Current Version:	0.5.2 (2008 Nov 22)
--- linux-mvl-dove-2.6.32.orig/ubuntu/fsam7400/FILES
+++ linux-mvl-dove-2.6.32/ubuntu/fsam7400/FILES
@@ -0,0 +1,6 @@
+CHANGELOG	Recently changes logged
+FILES		This file
+fsam7400.c	The source code, what else... :)
+INSTALL		Installation instructions
+Makefile	Makefile to build, install, uninstall the module
+README		don't forget to read it
--- linux-mvl-dove-2.6.32.orig/ubuntu/fsam7400/Makefile
+++ linux-mvl-dove-2.6.32/ubuntu/fsam7400/Makefile
@@ -0,0 +1,2 @@
+
+obj-$(CONFIG_FSAM7400) += fsam7400.o
--- linux-mvl-dove-2.6.32.orig/ubuntu/fsam7400/CHANGELOG
+++ linux-mvl-dove-2.6.32/ubuntu/fsam7400/CHANGELOG
@@ -0,0 +1,34 @@
+Nov 22 2008 Changes in 0.5.2 by legolas558
+* fixed some missing include files
+
+Sep 22 2006 Changes in 0.5.1
+* Fix: possible null pointer dereference in proc code
+* Fix: module exit code was mistakenly disabled
+
+Sep 22 2006 Changes in 0.5.0
+* fixed compilation problems with kernel 2.6.18
+* debug-output enabling via module parameter
+* hibernation support: reconstruct last radio state on resume
+* disabled autoload option by default
+
+Jul 16 2006 Changes in 0.4.1
+* new Makefile fixing problems with kernel 2.6.17
+* several bug fixes and compiler cleanups
+
+Aug 20 2004 Changes in 0.4.0
+* several bug fixes and compiler cleanups
+* UID/GID for procfs entry selectable via module parameter
+* Autoload support: fsam7400 modprobes and rmmods ipw2100 automatically
+  depending on radio state
+
+Apr 15 2004 Changes in 0.3.0
+* Fix: radio state was not displayed properly
+* some proc improvements
+* finished code for alternative routine address calculation
+* debug-output selectable at compile-time with CONFIG_IPW2100_DEBUG define
+  for smaller module size if no debug is needed ;)
+
+Apr 9 2004 Changes in 0.2.1
+* Initial release
+* Determines if wireless device is enabled by default Bios-settings
+* Auto-off functionality
--- linux-mvl-dove-2.6.32.orig/ubuntu/fsam7400/fsam7400.c
+++ linux-mvl-dove-2.6.32/ubuntu/fsam7400/fsam7400.c
@@ -0,0 +1,386 @@
+/*******************************************************************************
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms of the GNU General Public License as published by the Free
+  Software Foundation; either version 2 of the License, or (at your option)
+  any later version.
+
+  This program is distributed in the hope that it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc., 59
+  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
+
+  The full GNU General Public License is included in this distribution in the
+  file called LICENSE.
+
+  Author:
+  Marcel Naziri <fsam7400@zwobbl.de>
+
+  Based on:
+  pbe5.c by Pedro Ramalhais <pmr09313@students.fct.unl.pt>
+
+  Many thanks to:
+  Pedro Ramalhais for spending several nights with me on IRC
+
+*******************************************************************************/
+
+#ifdef CONFIG_X86
+#include <linux/version.h>
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+#include <linux/moduleparam.h>
+#else
+#include <linux/modversions.h>
+#endif
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/compiler.h>
+#include <linux/types.h>
+#include <linux/proc_fs.h>
+#include <linux/ctype.h>
+#include <linux/string.h>
+#include <linux/kmod.h>
+#include <linux/io.h>
+#include <asm/uaccess.h>
+
+#define DRV_NAME         "fsam7400"
+#define DRV_VERSION      "0.5.2"
+#define DRV_DESCRIPTION  "SW RF kill switch for Fujitsu Siemens Amilo M 7400 / Maxdata 7000DX"
+#define DRV_COPYRIGHT    "Copyright(c) 2004 zwobbl"
+#define DRV_AUTHOR       "Marcel Naziri"
+#define DRV_LICENSE      "GPL"
+
+MODULE_DESCRIPTION(DRV_DESCRIPTION);
+MODULE_AUTHOR(DRV_AUTHOR);
+MODULE_LICENSE(DRV_LICENSE);
+
+#define RADIO_NONE     0xFFFFFFFF
+#define RADIO_OFF      0x00000000
+#define RADIO_ON       0x00000010
+
+static int radio = RADIO_NONE;
+static int autooff = 1;
+static int autoload = 0;
+static int uid = 0;
+static int gid = 0;
+static int debug = 0;
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+module_param(radio, int, 0444);
+module_param(autooff, int, 0444);
+module_param(autoload, int, 0444);
+module_param(uid, int, 0444);
+module_param(gid, int, 0444);
+module_param(debug, int, 0444);
+#else
+MODULE_PARM(radio, "i");
+MODULE_PARM(autooff, "i");
+MODULE_PARM(autoload, "i");
+MODULE_PARM(uid, "i");
+MODULE_PARM(gid, "i");
+MODULE_PARM(debug, "i");
+#endif
+
+MODULE_PARM_DESC(radio, "desired radio state when loading module");
+MODULE_PARM_DESC(autooff, "turns radio off when unloading module (default)");
+MODULE_PARM_DESC(autoload, "load/unloads ipw2100 driver when toggling radio");
+MODULE_PARM_DESC(uid, "user ID for proc entry");
+MODULE_PARM_DESC(gid, "group ID for proc entry");
+MODULE_PARM_DESC(debug, "enables debug output on syslog");
+
+/* some more or less useful macros */
+
+#define DEBUG if (debug)
+#define DEBUG_OUT0(a) DEBUG printk(KERN_INFO DRV_NAME ": " a)
+#define DEBUG_OUT1(a,b) DEBUG printk(KERN_INFO DRV_NAME ": " a,b)
+#define DEBUG_OUT2(a,b,c) DEBUG printk(KERN_INFO DRV_NAME ": " a,b,c)
+#define DEBUG_OUT3(a,b,c,d) DEBUG printk(KERN_INFO DRV_NAME ": " a,b,c,d)
+
+#define ONOFF(x) (x) ? "ON" : "OFF"
+#define RADIO_ONOFF(x) (x) == RADIO_ON ? "ON" : "OFF"
+#define TOUL(x) (unsigned long) (x)
+
+/*
+ * NOTE: These values were obtained from disassembling the wbutton.sys driver
+ * installed in the Fujitsu Siemens Amilo M 7400 laptop. The names were guessed,
+ * so don't rely on them.
+ */
+
+/*** hardware dependant stuff ***/
+
+#define BIOS_CODE_ADDR       0x000F0000
+#define BIOS_CODE_ALT_MASK   0xFFFFC000
+
+#define BIOS_CODE_MAPSIZE      0x010000
+#define BIOS_CODE_ALT_MAPSIZE  0x004000
+
+#define BIOS_MAGIC_COMMAND    0x9610
+#define BIOS_MAGIC_OFF        0x0035
+#define BIOS_MAGIC_ON         0x0135
+#define BIOS_MAGIC_CHECK      0x0235
+
+#define PTR_POSITION  5
+#define ALLIGNED_STEP 0x10
+
+#define BIOS_SIGN_SIZE 4
+static const char bios_sign[] = {
+   0x42, 0x21, 0x55, 0x30
+};
+
+#define WLAN_DISABLED_IN_BIOS  0x01
+#define WLAN_ENABLED_IN_BIOS   0x03
+
+static unsigned long bios_code = 0;
+
+static int fsam_bios_routine(int eax, int ebx)
+{
+   __asm__ __volatile__(
+      "call *%3 \t\n"
+      : "=a"(eax)
+      : "a"(eax), "b"(ebx), "c"(bios_code)
+      );
+   return (eax & 0xFF);
+}
+
+static int fsam_call_bios(int value)
+{
+   if (bios_code) {
+      int command = BIOS_MAGIC_COMMAND;
+      DEBUG_OUT2("bios routine gets parameter eax=%X and ebx=%X\n",
+                  command, value);
+      value = fsam_bios_routine(command, value);
+      DEBUG_OUT1("bios routine results %X\n", value);
+      return value;
+   }
+   return ~0;
+}
+
+/* pointer to mapped memory*/
+static void *mem_code = NULL;
+
+static inline void fsam_unmap_memory(void)
+{
+   bios_code = 0;
+   if (mem_code) {
+      iounmap(mem_code);
+   }
+}
+
+static inline int fsam_map_memory(void)
+{
+   const unsigned long max_offset = BIOS_CODE_MAPSIZE - BIOS_SIGN_SIZE - PTR_POSITION;
+   unsigned long offset;
+   unsigned int addr;
+   mem_code = ioremap(BIOS_CODE_ADDR, BIOS_CODE_MAPSIZE);
+   if (!mem_code)
+      goto fail;
+   DEBUG_OUT3("physical memory %x-%x mapped to virtual address %p\n",
+              BIOS_CODE_ADDR, BIOS_CODE_ADDR+BIOS_CODE_MAPSIZE, mem_code);
+   for ( offset = 0; offset < max_offset; offset += ALLIGNED_STEP )
+      if (check_signature((void*)TOUL(mem_code) + offset, bios_sign, BIOS_SIGN_SIZE))
+         break;
+   if (offset >= max_offset)
+     goto fail;
+   DEBUG_OUT1("bios signature found at offset %lx\n", offset);
+   addr = readl((void*)TOUL(mem_code) + offset + PTR_POSITION);
+   if (addr < BIOS_CODE_ADDR) {
+      DEBUG_OUT0("bios routine out of memory range, "
+                 "doing some new memory mapping...\n");
+      iounmap(mem_code);
+      mem_code = NULL;
+      addr &= BIOS_CODE_ALT_MASK;
+      mem_code = ioremap(addr, BIOS_CODE_ALT_MAPSIZE);
+      if (!mem_code)
+         goto fail;
+      DEBUG_OUT3("physical memory %x-%x mapped to virtual address %p\n",
+                 addr, addr+BIOS_CODE_ALT_MAPSIZE, mem_code);
+      addr &= 0x3FFF;
+   } else
+     addr &= 0xFFFF;
+
+   bios_code = addr + TOUL(mem_code);
+   DEBUG_OUT1("supposed address of bios routine is %lx\n", bios_code);
+   return 1;
+ fail:
+   fsam_unmap_memory();
+   return 0;
+}
+
+/*** ipw2100 loading ***/
+
+static inline void do_ipw2100_loading(int state) 
+{
+  int status;
+  char *mode;
+  char *envp[] = { "HOME=/",
+                   "TERM=linux",
+                   "PATH=/sbin:/usr/sbin:/bin:/usr/bin", NULL };
+  if (state == RADIO_ON) {
+    char *argv[] = { "/sbin/modprobe", "-s", "-k", "ipw2100", NULL };
+    mode = "loading";
+    status = call_usermodehelper(argv[0], argv, envp, 1);
+  } else {
+    char *argv[] = { "/sbin/rmmod", "ipw2100", NULL };
+    mode = "removing";
+    status = call_usermodehelper(argv[0], argv, envp, 1);
+  }
+  DEBUG_OUT2("%s of ipw2100 module %s\n", mode, status == 0 ? "successful" : "FAILED");
+}
+
+/*** interface stuff ***/
+
+static void rfkill_set_radio(int value)
+{
+   radio = value == RADIO_ON ? fsam_call_bios(BIOS_MAGIC_ON) :
+                               fsam_call_bios(BIOS_MAGIC_OFF);
+   if (autoload) do_ipw2100_loading(radio);
+}
+
+static inline int rfkill_get_radio(void)
+{
+   return radio;
+}
+
+static inline int rfkill_supported(void)
+{
+   return bios_code != 0;
+}
+
+static inline void rfkill_initialize(void) {
+   fsam_map_memory();
+   if (rfkill_supported()) {
+      radio = radio != RADIO_NONE
+              ? ( radio ? RADIO_ON : RADIO_OFF ) /*module parameter*/
+              : ( fsam_call_bios(BIOS_MAGIC_CHECK) == WLAN_ENABLED_IN_BIOS
+                  ? RADIO_ON : RADIO_OFF );
+   }
+}
+
+static inline void rfkill_uninitialize(void) {
+   fsam_unmap_memory();
+}
+
+/*** proc stuff ***/
+
+static inline int common_proc_set_radio(struct file *file, const char *buffer, 
+                                        unsigned long count, void *data)
+{
+   unsigned long len = 7;
+   char newstate[len];
+   len = count < len ? count : len;
+   if ( copy_from_user(newstate, buffer, len) != 0 )
+     return -EFAULT;
+   if ( (*newstate == '1' || *newstate == '0') &&
+        (count == 1 || isspace(newstate[1])) )
+     rfkill_set_radio(*newstate == '1' ? RADIO_ON : RADIO_OFF);
+   else
+   if ( !strncmp(newstate, "on", 2)  &&
+        (count == 2 || isspace(newstate[2])) )
+     rfkill_set_radio(RADIO_ON);
+   else
+   if ( !strncmp(newstate, "off", 3) &&
+        (count == 3 || isspace(newstate[3])) )
+     rfkill_set_radio(RADIO_OFF);
+   else
+   if ( !strncmp(newstate, "resume", 6) &&
+        (count == 6 || isspace(newstate[6])) )
+     rfkill_set_radio(radio);
+   return count;
+}
+
+static inline int common_proc_get_radio(char *page, char **start, off_t offset,
+                                        int count, int *eof, void *data)
+{
+   int len = snprintf(page, count, DRV_DESCRIPTION ", v" DRV_VERSION "\n"
+                                   "  auto-off is %s, auto-load is %s\n",
+                                   ONOFF(autooff), ONOFF(autoload));
+   len += snprintf(page+len, count-len, "  radio state is %s\n",
+                                        RADIO_ONOFF(rfkill_get_radio()));
+   *eof = 1;
+   return len;
+}
+
+#define PROC_DIR    "driver/wireless"
+#define PROC_RADIO  "radio"
+
+static struct proc_dir_entry *dir_base = NULL;
+
+static inline void common_proc_cleanup(void)
+{
+   if (dir_base) {
+      remove_proc_entry(PROC_RADIO, dir_base);
+      remove_proc_entry(PROC_DIR, NULL);
+      dir_base = NULL;
+   }
+}
+
+static inline int common_proc_init(void)
+{
+   struct proc_dir_entry *ent;
+   int err = 0;
+   dir_base = proc_mkdir(PROC_DIR, NULL);
+   if (dir_base == NULL) {
+      printk(KERN_ERR DRV_NAME ": Unable to initialize /proc/" PROC_DIR "\n");
+      err = -ENOMEM;
+      goto fail;
+   }
+   ent = create_proc_entry(PROC_RADIO,
+                           S_IFREG | S_IRUGO | S_IWUSR | S_IWGRP,
+                           dir_base);
+   if (ent) {
+      ent->uid = uid;
+      ent->gid = gid;
+      ent->read_proc = common_proc_get_radio;
+      ent->write_proc = common_proc_set_radio;
+   } else {
+      printk(KERN_ERR DRV_NAME ": Unable to initialize /proc/"
+                      PROC_DIR "/" PROC_RADIO "\n");
+      err = -ENOMEM;
+      goto fail;
+   }
+   return 0;
+ fail:
+   common_proc_cleanup();
+   return err;
+}
+
+/*** module stuff ***/
+
+static int __init common_init(void)
+{ 
+   printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", v" DRV_VERSION "\n");
+   printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
+   rfkill_initialize();
+   if (rfkill_supported()) {
+      common_proc_init();
+      if (radio != RADIO_NONE)
+         rfkill_set_radio(radio);
+   } else
+      printk(KERN_INFO DRV_NAME ": no supported wireless hardware found\n");
+   return 0;
+}
+
+static void __exit common_exit(void)
+{
+   if (rfkill_supported() && autooff)
+      rfkill_set_radio(RADIO_OFF);
+   common_proc_cleanup();
+   rfkill_uninitialize();
+   printk(KERN_INFO DRV_NAME ": module removed successfully\n");
+}
+
+module_init(common_init);
+module_exit(common_exit);
+
+#else
+#error This driver is only available for X86 architecture
+#endif
+
+/*
+         1         2         3         4         5         6         7
+12345678901234567890123456789012345678901234567890123456789012345678901234567890
+*/
--- linux-mvl-dove-2.6.32.orig/ubuntu/fsam7400/README
+++ linux-mvl-dove-2.6.32/ubuntu/fsam7400/README
@@ -0,0 +1,60 @@
+SW RF kill switch for Fujitsu Siemens Amilo M 7400 / Maxdata 7000DX
+and compatible hardware.
+
+Please be sure that CONFIG_CHECK_SIGNATURE=y in your kernel configuration!
+Otherwise this module will not compile.
+
+Nov 22, 2008 - Release 0.5.2
+
+This package, with minor modifications from zwobbl's 0.5.1, was created
+by legolas558.
+
+More information at:
+http://legolas558.iragan.com/fsam7400
+
+Sep 24, 2006 - Release 0.5.1
+------------ -----   -----       ----       ---       --         -
+
+* Fix: possible null pointer dereference in proc code
+
+* Fix: module exit code was mistakenly disabled
+
+
+for prior changes see CHANGELOG
+
+
+TODO
+------------ -----   -----       ----       ---       --         -
+
+* Fix bugs (if there are any ;))
+
+
+------------ -----   -----       ----       ---       --         -
+
+Have a look in INSTALL for further details to get things working!
+
+
+License
+------------ -----   -----       ----       ---       --         -
+
+  Copyright(c) 2006 zwobbl. All rights reserved.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms of the GNU General Public License as published by the Free
+  Software Foundation; either version 2 of the License, or (at your option)
+  any later version.
+
+  This program is distributed in the hope that it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc., 59
+  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
+
+  The full GNU General Public License is included in this distribution in the
+  file called LICENSE.
+
+  Contact Information:
+  Marcel Naziri <fsam7400@zwobbl.de>
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/ioctl.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/ioctl.c
@@ -0,0 +1,125 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * ioctl
+ * plink-management and readdir in userspace.
+ * assist the pathconf(3) wrapper library.
+ */
+
+#include <linux/file.h>
+#include "aufs.h"
+
+static int au_wbr_fd(struct path *path)
+{
+	int err, fd, flags;
+	aufs_bindex_t wbi, bindex, bend;
+	struct file *h_file;
+	struct super_block *sb;
+	struct dentry *root;
+	struct au_branch *wbr;
+
+	err = get_unused_fd();
+	if (unlikely(err < 0))
+		goto out;
+	fd = err;
+
+	flags = O_RDONLY | O_DIRECTORY;
+	if (force_o_largefile())
+		flags |= O_LARGEFILE;
+
+	wbi = 0;
+	sb = path->dentry->d_sb;
+	root = sb->s_root;
+	aufs_read_lock(root, AuLock_IR);
+	wbr = au_sbr(sb, wbi);
+	if (!(path->mnt->mnt_flags & MNT_READONLY)
+	    && !au_br_writable(wbr->br_perm)) {
+		bend = au_sbend(sb);
+		for (bindex = 1; bindex <= bend; bindex++) {
+			wbr = au_sbr(sb, bindex);
+			if (au_br_writable(wbr->br_perm)) {
+				wbi = bindex;
+				break;
+			}
+		}
+		wbr = au_sbr(sb, wbi);
+	}
+	AuDbg("wbi %d\n", wbi);
+	h_file = au_h_open(root, wbi, flags, NULL);
+	aufs_read_unlock(root, AuLock_IR);
+	err = PTR_ERR(h_file);
+	if (IS_ERR(h_file))
+		goto out_fd;
+
+	atomic_dec(&wbr->br_count); /* cf. au_h_open() */
+	fd_install(fd, h_file);
+	err = fd;
+	goto out; /* success */
+
+ out_fd:
+	put_unused_fd(fd);
+ out:
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+long aufs_ioctl_dir(struct file *file, unsigned int cmd, unsigned long arg)
+{
+	long err;
+
+	switch (cmd) {
+	case AUFS_CTL_PLINK_MAINT:
+	case AUFS_CTL_PLINK_CLEAN:
+		err = au_plink_ioctl(file, cmd);
+		break;
+
+	case AUFS_CTL_RDU:
+	case AUFS_CTL_RDU_INO:
+		err = au_rdu_ioctl(file, cmd, arg);
+		break;
+
+	case AUFS_CTL_WBR_FD:
+		err = au_wbr_fd(&file->f_path);
+		break;
+
+	default:
+		err = -EINVAL;
+	}
+
+	AuTraceErr(err);
+	return err;
+}
+
+long aufs_ioctl_nondir(struct file *file, unsigned int cmd, unsigned long arg)
+{
+	long err;
+
+	switch (cmd) {
+	case AUFS_CTL_WBR_FD:
+		err = au_wbr_fd(&file->f_path);
+		break;
+
+	default:
+		err = -EINVAL;
+	}
+
+	AuTraceErr(err);
+	return err;
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/module.h
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/module.h
@@ -0,0 +1,78 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * module initialization and module-global
+ */
+
+#ifndef __AUFS_MODULE_H__
+#define __AUFS_MODULE_H__
+
+#ifdef __KERNEL__
+
+#include <linux/slab.h>
+
+struct path;
+struct seq_file;
+
+/* module parameters */
+extern short aufs_nwkq;
+extern int sysaufs_brs;
+
+/* ---------------------------------------------------------------------- */
+
+extern int au_dir_roflags;
+
+void *au_kzrealloc(void *p, unsigned int nused, unsigned int new_sz, gfp_t gfp);
+int au_seq_path(struct seq_file *seq, struct path *path);
+
+/* ---------------------------------------------------------------------- */
+
+/* kmem cache */
+enum {
+	AuCache_DINFO,
+	AuCache_ICNTNR,
+	AuCache_FINFO,
+	AuCache_VDIR,
+	AuCache_DEHSTR,
+#ifdef CONFIG_AUFS_HINOTIFY
+	AuCache_HINOTIFY,
+#endif
+	AuCache_Last
+};
+
+#define AuCache(type)	KMEM_CACHE(type, SLAB_RECLAIM_ACCOUNT)
+
+extern struct kmem_cache *au_cachep[];
+
+#define AuCacheFuncs(name, index) \
+static inline void *au_cache_alloc_##name(void) \
+{ return kmem_cache_alloc(au_cachep[AuCache_##index], GFP_NOFS); } \
+static inline void au_cache_free_##name(void *p) \
+{ kmem_cache_free(au_cachep[AuCache_##index], p); }
+
+AuCacheFuncs(dinfo, DINFO);
+AuCacheFuncs(icntnr, ICNTNR);
+AuCacheFuncs(finfo, FINFO);
+AuCacheFuncs(vdir, VDIR);
+AuCacheFuncs(dehstr, DEHSTR);
+
+/*  ---------------------------------------------------------------------- */
+
+#endif /* __KERNEL__ */
+#endif /* __AUFS_MODULE_H__ */
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/fstype.h
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/fstype.h
@@ -0,0 +1,484 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * judging filesystem type
+ */
+
+#ifndef __AUFS_FSTYPE_H__
+#define __AUFS_FSTYPE_H__
+
+#ifdef __KERNEL__
+
+#include <linux/fs.h>
+#include <linux/magic.h>
+#include <linux/romfs_fs.h>
+#include <linux/aufs_type.h>
+
+static inline int au_test_aufs(struct super_block *sb)
+{
+	return sb->s_magic == AUFS_SUPER_MAGIC;
+}
+
+static inline const char *au_sbtype(struct super_block *sb)
+{
+	return sb->s_type->name;
+}
+
+static inline int au_test_iso9660(struct super_block *sb __maybe_unused)
+{
+#if defined(CONFIG_ROMFS_FS) || defined(CONFIG_ROMFS_FS_MODULE)
+	return sb->s_magic == ROMFS_MAGIC;
+#else
+	return 0;
+#endif
+}
+
+static inline int au_test_romfs(struct super_block *sb __maybe_unused)
+{
+#if defined(CONFIG_ISO9660_FS) || defined(CONFIG_ISO9660_FS_MODULE)
+	return sb->s_magic == ISOFS_SUPER_MAGIC;
+#else
+	return 0;
+#endif
+}
+
+static inline int au_test_cramfs(struct super_block *sb __maybe_unused)
+{
+#if defined(CONFIG_CRAMFS) || defined(CONFIG_CRAMFS_MODULE)
+	return sb->s_magic == CRAMFS_MAGIC;
+#endif
+	return 0;
+}
+
+static inline int au_test_nfs(struct super_block *sb __maybe_unused)
+{
+#if defined(CONFIG_NFS_FS) || defined(CONFIG_NFS_FS_MODULE)
+	return sb->s_magic == NFS_SUPER_MAGIC;
+#else
+	return 0;
+#endif
+}
+
+static inline int au_test_fuse(struct super_block *sb __maybe_unused)
+{
+#if defined(CONFIG_FUSE_FS) || defined(CONFIG_FUSE_FS_MODULE)
+	return sb->s_magic == FUSE_SUPER_MAGIC;
+#else
+	return 0;
+#endif
+}
+
+static inline int au_test_xfs(struct super_block *sb __maybe_unused)
+{
+#if defined(CONFIG_XFS_FS) || defined(CONFIG_XFS_FS_MODULE)
+	return sb->s_magic == XFS_SB_MAGIC;
+#else
+	return 0;
+#endif
+}
+
+static inline int au_test_tmpfs(struct super_block *sb __maybe_unused)
+{
+#ifdef CONFIG_TMPFS
+	return sb->s_magic == TMPFS_MAGIC;
+#else
+	return 0;
+#endif
+}
+
+static inline int au_test_ecryptfs(struct super_block *sb __maybe_unused)
+{
+#if defined(CONFIG_ECRYPT_FS) || defined(CONFIG_ECRYPT_FS_MODULE)
+	return !strcmp(au_sbtype(sb), "ecryptfs");
+#else
+	return 0;
+#endif
+}
+
+static inline int au_test_smbfs(struct super_block *sb __maybe_unused)
+{
+#if defined(CONFIG_SMB_FS) || defined(CONFIG_SMB_FS_MODULE)
+	return sb->s_magic == SMB_SUPER_MAGIC;
+#else
+	return 0;
+#endif
+}
+
+static inline int au_test_ocfs2(struct super_block *sb __maybe_unused)
+{
+#if defined(CONFIG_OCFS2_FS) || defined(CONFIG_OCFS2_FS_MODULE)
+	return sb->s_magic == OCFS2_SUPER_MAGIC;
+#else
+	return 0;
+#endif
+}
+
+static inline int au_test_ocfs2_dlmfs(struct super_block *sb __maybe_unused)
+{
+#if defined(CONFIG_OCFS2_FS_O2CB) || defined(CONFIG_OCFS2_FS_O2CB_MODULE)
+	return sb->s_magic == DLMFS_MAGIC;
+#else
+	return 0;
+#endif
+}
+
+static inline int au_test_coda(struct super_block *sb __maybe_unused)
+{
+#if defined(CONFIG_CODA_FS) || defined(CONFIG_CODA_FS_MODULE)
+	return sb->s_magic == CODA_SUPER_MAGIC;
+#else
+	return 0;
+#endif
+}
+
+static inline int au_test_v9fs(struct super_block *sb __maybe_unused)
+{
+#if defined(CONFIG_9P_FS) || defined(CONFIG_9P_FS_MODULE)
+	return sb->s_magic == V9FS_MAGIC;
+#else
+	return 0;
+#endif
+}
+
+static inline int au_test_ext4(struct super_block *sb __maybe_unused)
+{
+#if defined(CONFIG_EXT4DEV_FS) || defined(CONFIG_EXT4DEV_FS_MODULE)
+	return sb->s_magic == EXT4_SUPER_MAGIC;
+#else
+	return 0;
+#endif
+}
+
+static inline int au_test_sysv(struct super_block *sb __maybe_unused)
+{
+#if defined(CONFIG_SYSV_FS) || defined(CONFIG_SYSV_FS_MODULE)
+	return !strcmp(au_sbtype(sb), "sysv");
+#else
+	return 0;
+#endif
+}
+
+static inline int au_test_ramfs(struct super_block *sb)
+{
+	return sb->s_magic == RAMFS_MAGIC;
+}
+
+static inline int au_test_ubifs(struct super_block *sb __maybe_unused)
+{
+#if defined(CONFIG_UBIFS_FS) || defined(CONFIG_UBIFS_FS_MODULE)
+	return sb->s_magic == UBIFS_SUPER_MAGIC;
+#else
+	return 0;
+#endif
+}
+
+static inline int au_test_procfs(struct super_block *sb __maybe_unused)
+{
+#ifdef CONFIG_PROC_FS
+	return sb->s_magic == PROC_SUPER_MAGIC;
+#else
+	return 0;
+#endif
+}
+
+static inline int au_test_sysfs(struct super_block *sb __maybe_unused)
+{
+#ifdef CONFIG_SYSFS
+	return sb->s_magic == SYSFS_MAGIC;
+#else
+	return 0;
+#endif
+}
+
+static inline int au_test_configfs(struct super_block *sb __maybe_unused)
+{
+#if defined(CONFIG_CONFIGFS_FS) || defined(CONFIG_CONFIGFS_FS_MODULE)
+	return sb->s_magic == CONFIGFS_MAGIC;
+#else
+	return 0;
+#endif
+}
+
+static inline int au_test_minix(struct super_block *sb __maybe_unused)
+{
+#if defined(CONFIG_MINIX_FS) || defined(CONFIG_MINIX_FS_MODULE)
+	return sb->s_magic == MINIX3_SUPER_MAGIC
+		|| sb->s_magic == MINIX2_SUPER_MAGIC
+		|| sb->s_magic == MINIX2_SUPER_MAGIC2
+		|| sb->s_magic == MINIX_SUPER_MAGIC
+		|| sb->s_magic == MINIX_SUPER_MAGIC2;
+#else
+	return 0;
+#endif
+}
+
+static inline int au_test_cifs(struct super_block *sb __maybe_unused)
+{
+#if defined(CONFIG_CIFS_FS) || defined(CONFIGCIFS_FS_MODULE)
+	return sb->s_magic == CIFS_MAGIC_NUMBER;
+#else
+	return 0;
+#endif
+}
+
+static inline int au_test_fat(struct super_block *sb __maybe_unused)
+{
+#if defined(CONFIG_FAT_FS) || defined(CONFIG_FAT_FS_MODULE)
+	return sb->s_magic == MSDOS_SUPER_MAGIC;
+#else
+	return 0;
+#endif
+}
+
+static inline int au_test_msdos(struct super_block *sb)
+{
+	return au_test_fat(sb);
+}
+
+static inline int au_test_vfat(struct super_block *sb)
+{
+	return au_test_fat(sb);
+}
+
+static inline int au_test_securityfs(struct super_block *sb __maybe_unused)
+{
+#ifdef CONFIG_SECURITYFS
+	return sb->s_magic == SECURITYFS_MAGIC;
+#else
+	return 0;
+#endif
+}
+
+static inline int au_test_squashfs(struct super_block *sb __maybe_unused)
+{
+#if defined(CONFIG_SQUASHFS) || defined(CONFIG_SQUASHFS_MODULE)
+	return sb->s_magic == SQUASHFS_MAGIC;
+#else
+	return 0;
+#endif
+}
+
+static inline int au_test_btrfs(struct super_block *sb __maybe_unused)
+{
+#if defined(CONFIG_BTRFS_FS) || defined(CONFIG_BTRFS_FS_MODULE)
+	return sb->s_magic == BTRFS_SUPER_MAGIC;
+#else
+	return 0;
+#endif
+}
+
+static inline int au_test_xenfs(struct super_block *sb __maybe_unused)
+{
+#if defined(CONFIG_XENFS) || defined(CONFIG_XENFS_MODULE)
+	return sb->s_magic == XENFS_SUPER_MAGIC;
+#else
+	return 0;
+#endif
+}
+
+static inline int au_test_debugfs(struct super_block *sb __maybe_unused)
+{
+#ifdef CONFIG_DEBUG_FS
+	return sb->s_magic == DEBUGFS_MAGIC;
+#else
+	return 0;
+#endif
+}
+
+static inline int au_test_nilfs(struct super_block *sb __maybe_unused)
+{
+#if defined(CONFIG_NILFS) || defined(CONFIG_NILFS_MODULE)
+	return sb->s_magic == NILFS_SUPER_MAGIC;
+#else
+	return 0;
+#endif
+}
+
+/* ---------------------------------------------------------------------- */
+/*
+ * they can't be an aufs branch.
+ */
+static inline int au_test_fs_unsuppoted(struct super_block *sb)
+{
+	return
+#ifndef CONFIG_AUFS_BR_RAMFS
+		au_test_ramfs(sb) ||
+#endif
+		au_test_procfs(sb)
+		|| au_test_sysfs(sb)
+		|| au_test_configfs(sb)
+		|| au_test_debugfs(sb)
+		|| au_test_securityfs(sb)
+		|| au_test_xenfs(sb)
+		|| au_test_ecryptfs(sb)
+		/* || !strcmp(au_sbtype(sb), "unionfs") */
+		|| au_test_aufs(sb); /* will be supported in next version */
+}
+
+/*
+ * If the filesystem supports NFS-export, then it has to support NULL as
+ * a nameidata parameter for ->create(), ->lookup() and ->d_revalidate().
+ * We can apply this principle when we handle a lower filesystem.
+ */
+static inline int au_test_fs_null_nd(struct super_block *sb)
+{
+	return !!sb->s_export_op;
+}
+
+static inline int au_test_fs_remote(struct super_block *sb)
+{
+	return !au_test_tmpfs(sb)
+#ifdef CONFIG_AUFS_BR_RAMFS
+		&& !au_test_ramfs(sb)
+#endif
+		&& !(sb->s_type->fs_flags & FS_REQUIRES_DEV);
+}
+
+/* ---------------------------------------------------------------------- */
+
+/*
+ * Note: these functions (below) are created after reading ->getattr() in all
+ * filesystems under linux/fs. it means we have to do so in every update...
+ */
+
+/*
+ * some filesystems require getattr to refresh the inode attributes before
+ * referencing.
+ * in most cases, we can rely on the inode attribute in NFS (or every remote fs)
+ * and leave the work for d_revalidate()
+ */
+static inline int au_test_fs_refresh_iattr(struct super_block *sb)
+{
+	return au_test_nfs(sb)
+		|| au_test_fuse(sb)
+		/* || au_test_smbfs(sb) */	/* untested */
+		/* || au_test_ocfs2(sb) */	/* untested */
+		/* || au_test_btrfs(sb) */	/* untested */
+		/* || au_test_coda(sb) */	/* untested */
+		/* || au_test_v9fs(sb) */	/* untested */
+		;
+}
+
+/*
+ * filesystems which don't maintain i_size or i_blocks.
+ */
+static inline int au_test_fs_bad_iattr_size(struct super_block *sb)
+{
+	return au_test_xfs(sb)
+		/* || au_test_ext4(sb) */	/* untested */
+		/* || au_test_ocfs2(sb) */	/* untested */
+		/* || au_test_ocfs2_dlmfs(sb) */ /* untested */
+		/* || au_test_sysv(sb) */	/* untested */
+		/* || au_test_ubifs(sb) */	/* untested */
+		/* || au_test_minix(sb) */	/* untested */
+		;
+}
+
+/*
+ * filesystems which don't store the correct value in some of their inode
+ * attributes.
+ */
+static inline int au_test_fs_bad_iattr(struct super_block *sb)
+{
+	return au_test_fs_bad_iattr_size(sb)
+		/* || au_test_cifs(sb) */	/* untested */
+		|| au_test_fat(sb)
+		|| au_test_msdos(sb)
+		|| au_test_vfat(sb);
+}
+
+/* they don't check i_nlink in link(2) */
+static inline int au_test_fs_no_limit_nlink(struct super_block *sb)
+{
+	return au_test_tmpfs(sb)
+#ifdef CONFIG_AUFS_BR_RAMFS
+		|| au_test_ramfs(sb)
+#endif
+		|| au_test_ubifs(sb);
+}
+
+/*
+ * filesystems which sets S_NOATIME and S_NOCMTIME.
+ */
+static inline int au_test_fs_notime(struct super_block *sb)
+{
+	return au_test_nfs(sb)
+		|| au_test_fuse(sb)
+		|| au_test_ubifs(sb)
+		/* || au_test_cifs(sb) */	/* untested */
+		;
+}
+
+/*
+ * filesystems which requires replacing i_mapping.
+ */
+static inline int au_test_fs_bad_mapping(struct super_block *sb)
+{
+	return au_test_fuse(sb)
+		|| au_test_ubifs(sb);
+}
+
+/* temporary support for i#1 in cramfs */
+static inline int au_test_fs_unique_ino(struct inode *inode)
+{
+	if (au_test_cramfs(inode->i_sb))
+		return inode->i_ino != 1;
+	return 1;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/*
+ * the filesystem where the xino files placed must support i/o after unlink and
+ * maintain i_size and i_blocks.
+ */
+static inline int au_test_fs_bad_xino(struct super_block *sb)
+{
+	return au_test_fs_remote(sb)
+		|| au_test_fs_bad_iattr_size(sb)
+#ifdef CONFIG_AUFS_BR_RAMFS
+		|| !(au_test_ramfs(sb) || au_test_fs_null_nd(sb))
+#else
+		|| !au_test_fs_null_nd(sb) /* to keep xino code simple */
+#endif
+		/* don't want unnecessary work for xino */
+		|| au_test_aufs(sb)
+		|| au_test_ecryptfs(sb)
+		|| au_test_nilfs(sb);
+}
+
+static inline int au_test_fs_trunc_xino(struct super_block *sb)
+{
+	return au_test_tmpfs(sb)
+		|| au_test_ramfs(sb);
+}
+
+/*
+ * test if the @sb is real-readonly.
+ */
+static inline int au_test_fs_rr(struct super_block *sb)
+{
+	return au_test_squashfs(sb)
+		|| au_test_iso9660(sb)
+		|| au_test_cramfs(sb)
+		|| au_test_romfs(sb);
+}
+
+#endif /* __KERNEL__ */
+#endif /* __AUFS_FSTYPE_H__ */
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/inode.h
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/inode.h
@@ -0,0 +1,497 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * inode operations
+ */
+
+#ifndef __AUFS_INODE_H__
+#define __AUFS_INODE_H__
+
+#ifdef __KERNEL__
+
+#include <linux/fs.h>
+#include <linux/inotify.h>
+#include <linux/aufs_type.h>
+#include "rwsem.h"
+
+struct vfsmount;
+
+struct au_hinotify {
+#ifdef CONFIG_AUFS_HINOTIFY
+	struct inotify_watch	hin_watch;
+	struct inode		*hin_aufs_inode;	/* no get/put */
+#endif
+};
+
+struct au_hinode {
+	struct inode		*hi_inode;
+	aufs_bindex_t		hi_id;
+#ifdef CONFIG_AUFS_HINOTIFY
+	struct au_hinotify	*hi_notify;
+#endif
+
+	/* reference to the copied-up whiteout with get/put */
+	struct dentry		*hi_whdentry;
+};
+
+struct au_vdir;
+struct au_iinfo {
+	atomic_t		ii_generation;
+	struct super_block	*ii_hsb1;	/* no get/put */
+
+	struct au_rwsem		ii_rwsem;
+	aufs_bindex_t		ii_bstart, ii_bend;
+	__u32			ii_higen;
+	struct au_hinode	*ii_hinode;
+	struct au_vdir		*ii_vdir;
+};
+
+struct au_icntnr {
+	struct au_iinfo iinfo;
+	struct inode vfs_inode;
+};
+
+/* au_pin flags */
+#define AuPin_DI_LOCKED		1
+#define AuPin_MNT_WRITE		(1 << 1)
+#define au_ftest_pin(flags, name)	((flags) & AuPin_##name)
+#define au_fset_pin(flags, name)	{ (flags) |= AuPin_##name; }
+#define au_fclr_pin(flags, name)	{ (flags) &= ~AuPin_##name; }
+
+struct au_pin {
+	/* input */
+	struct dentry *dentry;
+	unsigned int udba;
+	unsigned char lsc_di, lsc_hi, flags;
+	aufs_bindex_t bindex;
+
+	/* output */
+	struct dentry *parent;
+	struct au_hinode *hdir;
+	struct vfsmount *h_mnt;
+};
+
+/* ---------------------------------------------------------------------- */
+
+static inline struct au_iinfo *au_ii(struct inode *inode)
+{
+	struct au_iinfo *iinfo;
+
+	iinfo = &(container_of(inode, struct au_icntnr, vfs_inode)->iinfo);
+	if (iinfo->ii_hinode)
+		return iinfo;
+	return NULL; /* debugging bad_inode case */
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* inode.c */
+struct inode *au_igrab(struct inode *inode);
+int au_refresh_hinode_self(struct inode *inode, int do_attr);
+int au_refresh_hinode(struct inode *inode, struct dentry *dentry);
+int au_ino(struct super_block *sb, aufs_bindex_t bindex, ino_t h_ino,
+	   unsigned int d_type, ino_t *ino);
+struct inode *au_new_inode(struct dentry *dentry, int must_new);
+int au_test_ro(struct super_block *sb, aufs_bindex_t bindex,
+	       struct inode *inode);
+int au_test_h_perm(struct inode *h_inode, int mask);
+int au_test_h_perm_sio(struct inode *h_inode, int mask);
+
+static inline int au_wh_ino(struct super_block *sb, aufs_bindex_t bindex,
+			    ino_t h_ino, unsigned int d_type, ino_t *ino)
+{
+#ifdef CONFIG_AUFS_SHWH
+	return au_ino(sb, bindex, h_ino, d_type, ino);
+#else
+	return 0;
+#endif
+}
+
+/* i_op.c */
+extern struct inode_operations aufs_iop, aufs_symlink_iop, aufs_dir_iop;
+
+/* au_wr_dir flags */
+#define AuWrDir_ADD_ENTRY	1
+#define AuWrDir_ISDIR		(1 << 1)
+#define au_ftest_wrdir(flags, name)	((flags) & AuWrDir_##name)
+#define au_fset_wrdir(flags, name)	{ (flags) |= AuWrDir_##name; }
+#define au_fclr_wrdir(flags, name)	{ (flags) &= ~AuWrDir_##name; }
+
+struct au_wr_dir_args {
+	aufs_bindex_t force_btgt;
+	unsigned char flags;
+};
+int au_wr_dir(struct dentry *dentry, struct dentry *src_dentry,
+	      struct au_wr_dir_args *args);
+
+struct dentry *au_pinned_h_parent(struct au_pin *pin);
+void au_pin_init(struct au_pin *pin, struct dentry *dentry,
+		 aufs_bindex_t bindex, int lsc_di, int lsc_hi,
+		 unsigned int udba, unsigned char flags);
+int au_pin(struct au_pin *pin, struct dentry *dentry, aufs_bindex_t bindex,
+	   unsigned int udba, unsigned char flags) __must_check;
+int au_do_pin(struct au_pin *pin) __must_check;
+void au_unpin(struct au_pin *pin);
+
+/* i_op_add.c */
+int au_may_add(struct dentry *dentry, aufs_bindex_t bindex,
+	       struct dentry *h_parent, int isdir);
+int aufs_mknod(struct inode *dir, struct dentry *dentry, int mode, dev_t dev);
+int aufs_symlink(struct inode *dir, struct dentry *dentry, const char *symname);
+int aufs_create(struct inode *dir, struct dentry *dentry, int mode,
+		struct nameidata *nd);
+int aufs_link(struct dentry *src_dentry, struct inode *dir,
+	      struct dentry *dentry);
+int aufs_mkdir(struct inode *dir, struct dentry *dentry, int mode);
+
+/* i_op_del.c */
+int au_wr_dir_need_wh(struct dentry *dentry, int isdir, aufs_bindex_t *bcpup);
+int au_may_del(struct dentry *dentry, aufs_bindex_t bindex,
+	       struct dentry *h_parent, int isdir);
+int aufs_unlink(struct inode *dir, struct dentry *dentry);
+int aufs_rmdir(struct inode *dir, struct dentry *dentry);
+
+/* i_op_ren.c */
+int au_wbr(struct dentry *dentry, aufs_bindex_t btgt);
+int aufs_rename(struct inode *src_dir, struct dentry *src_dentry,
+		struct inode *dir, struct dentry *dentry);
+
+/* iinfo.c */
+struct inode *au_h_iptr(struct inode *inode, aufs_bindex_t bindex);
+void au_hiput(struct au_hinode *hinode);
+void au_set_ibstart(struct inode *inode, aufs_bindex_t bindex);
+void au_set_hi_wh(struct inode *inode, aufs_bindex_t bindex,
+		  struct dentry *h_wh);
+unsigned int au_hi_flags(struct inode *inode, int isdir);
+
+/* hinode flags */
+#define AuHi_XINO	1
+#define AuHi_HINOTIFY	(1 << 1)
+#define au_ftest_hi(flags, name)	((flags) & AuHi_##name)
+#define au_fset_hi(flags, name)		{ (flags) |= AuHi_##name; }
+#define au_fclr_hi(flags, name)		{ (flags) &= ~AuHi_##name; }
+
+#ifndef CONFIG_AUFS_HINOTIFY
+#undef AuHi_HINOTIFY
+#define AuHi_HINOTIFY	0
+#endif
+
+void au_set_h_iptr(struct inode *inode, aufs_bindex_t bindex,
+		   struct inode *h_inode, unsigned int flags);
+
+void au_update_iigen(struct inode *inode);
+void au_update_brange(struct inode *inode, int do_put_zero);
+
+int au_iinfo_init(struct inode *inode);
+void au_iinfo_fin(struct inode *inode);
+int au_ii_realloc(struct au_iinfo *iinfo, int nbr);
+
+/* plink.c */
+void au_plink_block_maintain(struct super_block *sb);
+#ifdef CONFIG_AUFS_DEBUG
+void au_plink_list(struct super_block *sb);
+#else
+static inline void au_plink_list(struct super_block *sb)
+{
+	/* nothing */
+}
+#endif
+int au_plink_test(struct inode *inode);
+struct dentry *au_plink_lkup(struct inode *inode, aufs_bindex_t bindex);
+void au_plink_append(struct inode *inode, aufs_bindex_t bindex,
+		     struct dentry *h_dentry);
+void au_plink_put(struct super_block *sb);
+void au_plink_half_refresh(struct super_block *sb, aufs_bindex_t br_id);
+long au_plink_ioctl(struct file *file, unsigned int cmd);
+
+/* ---------------------------------------------------------------------- */
+
+/* lock subclass for iinfo */
+enum {
+	AuLsc_II_CHILD,		/* child first */
+	AuLsc_II_CHILD2,	/* rename(2), link(2), and cpup at hinotify */
+	AuLsc_II_CHILD3,	/* copyup dirs */
+	AuLsc_II_PARENT,	/* see AuLsc_I_PARENT in vfsub.h */
+	AuLsc_II_PARENT2,
+	AuLsc_II_PARENT3,	/* copyup dirs */
+	AuLsc_II_NEW_CHILD
+};
+
+/*
+ * ii_read_lock_child, ii_write_lock_child,
+ * ii_read_lock_child2, ii_write_lock_child2,
+ * ii_read_lock_child3, ii_write_lock_child3,
+ * ii_read_lock_parent, ii_write_lock_parent,
+ * ii_read_lock_parent2, ii_write_lock_parent2,
+ * ii_read_lock_parent3, ii_write_lock_parent3,
+ * ii_read_lock_new_child, ii_write_lock_new_child,
+ */
+#define AuReadLockFunc(name, lsc) \
+static inline void ii_read_lock_##name(struct inode *i) \
+{ \
+	au_rw_read_lock_nested(&au_ii(i)->ii_rwsem, AuLsc_II_##lsc); \
+}
+
+#define AuWriteLockFunc(name, lsc) \
+static inline void ii_write_lock_##name(struct inode *i) \
+{ \
+	au_rw_write_lock_nested(&au_ii(i)->ii_rwsem, AuLsc_II_##lsc); \
+}
+
+#define AuRWLockFuncs(name, lsc) \
+	AuReadLockFunc(name, lsc) \
+	AuWriteLockFunc(name, lsc)
+
+AuRWLockFuncs(child, CHILD);
+AuRWLockFuncs(child2, CHILD2);
+AuRWLockFuncs(child3, CHILD3);
+AuRWLockFuncs(parent, PARENT);
+AuRWLockFuncs(parent2, PARENT2);
+AuRWLockFuncs(parent3, PARENT3);
+AuRWLockFuncs(new_child, NEW_CHILD);
+
+#undef AuReadLockFunc
+#undef AuWriteLockFunc
+#undef AuRWLockFuncs
+
+/*
+ * ii_read_unlock, ii_write_unlock, ii_downgrade_lock
+ */
+AuSimpleUnlockRwsemFuncs(ii, struct inode *i, &au_ii(i)->ii_rwsem);
+
+#define IiMustNoWaiters(i)	AuRwMustNoWaiters(&au_ii(i)->ii_rwsem)
+#define IiMustAnyLock(i)	AuRwMustAnyLock(&au_ii(i)->ii_rwsem)
+#define IiMustWriteLock(i)	AuRwMustWriteLock(&au_ii(i)->ii_rwsem)
+
+/* ---------------------------------------------------------------------- */
+
+static inline unsigned int au_iigen(struct inode *inode)
+{
+	return atomic_read(&au_ii(inode)->ii_generation);
+}
+
+/* tiny test for inode number */
+/* tmpfs generation is too rough */
+static inline int au_test_higen(struct inode *inode, struct inode *h_inode)
+{
+	struct au_iinfo *iinfo;
+
+	iinfo = au_ii(inode);
+	AuRwMustAnyLock(&iinfo->ii_rwsem);
+	return !(iinfo->ii_hsb1 == h_inode->i_sb
+		 && iinfo->ii_higen == h_inode->i_generation);
+}
+
+/* ---------------------------------------------------------------------- */
+
+static inline aufs_bindex_t au_ii_br_id(struct inode *inode,
+					aufs_bindex_t bindex)
+{
+	IiMustAnyLock(inode);
+	return au_ii(inode)->ii_hinode[0 + bindex].hi_id;
+}
+
+static inline aufs_bindex_t au_ibstart(struct inode *inode)
+{
+	IiMustAnyLock(inode);
+	return au_ii(inode)->ii_bstart;
+}
+
+static inline aufs_bindex_t au_ibend(struct inode *inode)
+{
+	IiMustAnyLock(inode);
+	return au_ii(inode)->ii_bend;
+}
+
+static inline struct au_vdir *au_ivdir(struct inode *inode)
+{
+	IiMustAnyLock(inode);
+	return au_ii(inode)->ii_vdir;
+}
+
+static inline struct dentry *au_hi_wh(struct inode *inode, aufs_bindex_t bindex)
+{
+	IiMustAnyLock(inode);
+	return au_ii(inode)->ii_hinode[0 + bindex].hi_whdentry;
+}
+
+static inline void au_set_ibend(struct inode *inode, aufs_bindex_t bindex)
+{
+	IiMustWriteLock(inode);
+	au_ii(inode)->ii_bend = bindex;
+}
+
+static inline void au_set_ivdir(struct inode *inode, struct au_vdir *vdir)
+{
+	IiMustWriteLock(inode);
+	au_ii(inode)->ii_vdir = vdir;
+}
+
+static inline struct au_hinode *au_hi(struct inode *inode, aufs_bindex_t bindex)
+{
+	IiMustAnyLock(inode);
+	return au_ii(inode)->ii_hinode + bindex;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static inline struct dentry *au_pinned_parent(struct au_pin *pin)
+{
+	if (pin)
+		return pin->parent;
+	return NULL;
+}
+
+static inline struct inode *au_pinned_h_dir(struct au_pin *pin)
+{
+	if (pin && pin->hdir)
+		return pin->hdir->hi_inode;
+	return NULL;
+}
+
+static inline struct au_hinode *au_pinned_hdir(struct au_pin *pin)
+{
+	if (pin)
+		return pin->hdir;
+	return NULL;
+}
+
+static inline void au_pin_set_dentry(struct au_pin *pin, struct dentry *dentry)
+{
+	if (pin)
+		pin->dentry = dentry;
+}
+
+static inline void au_pin_set_parent_lflag(struct au_pin *pin,
+					   unsigned char lflag)
+{
+	if (pin) {
+		/* dirty macros require brackets */
+		if (lflag) {
+			au_fset_pin(pin->flags, DI_LOCKED);
+		} else {
+			au_fclr_pin(pin->flags, DI_LOCKED);
+		}
+	}
+}
+
+static inline void au_pin_set_parent(struct au_pin *pin, struct dentry *parent)
+{
+	if (pin) {
+		dput(pin->parent);
+		pin->parent = dget(parent);
+	}
+}
+
+/* ---------------------------------------------------------------------- */
+
+#ifdef CONFIG_AUFS_HINOTIFY
+/* hinotify.c */
+int au_hin_alloc(struct au_hinode *hinode, struct inode *inode,
+		 struct inode *h_inode);
+void au_hin_free(struct au_hinode *hinode);
+void au_hin_ctl(struct au_hinode *hinode, int do_set);
+void au_reset_hinotify(struct inode *inode, unsigned int flags);
+
+int __init au_hinotify_init(void);
+void au_hinotify_fin(void);
+
+static inline
+void au_hin_init(struct au_hinode *hinode, struct au_hinotify *val)
+{
+	hinode->hi_notify = val;
+}
+
+static inline void au_iigen_dec(struct inode *inode)
+{
+	atomic_dec_return(&au_ii(inode)->ii_generation);
+}
+
+#else
+static inline
+int au_hin_alloc(struct au_hinode *hinode __maybe_unused,
+		 struct inode *inode __maybe_unused,
+		 struct inode *h_inode __maybe_unused)
+{
+	return -EOPNOTSUPP;
+}
+
+static inline void au_hin_free(struct au_hinode *hinode __maybe_unused)
+{
+	/* nothing */
+}
+
+static inline void au_hin_ctl(struct au_hinode *hinode __maybe_unused,
+			      int do_set __maybe_unused)
+{
+	/* nothing */
+}
+
+static inline void au_reset_hinotify(struct inode *inode __maybe_unused,
+				     unsigned int flags __maybe_unused)
+{
+	/* nothing */
+}
+
+static inline int au_hinotify_init(void)
+{
+	return 0;
+}
+
+#define au_hinotify_fin()	do {} while (0)
+
+static inline
+void au_hin_init(struct au_hinode *hinode __maybe_unused,
+		 struct au_hinotify *val __maybe_unused)
+{
+	/* empty */
+}
+#endif /* CONFIG_AUFS_HINOTIFY */
+
+static inline void au_hin_suspend(struct au_hinode *hdir)
+{
+	au_hin_ctl(hdir, /*do_set*/0);
+}
+
+static inline void au_hin_resume(struct au_hinode *hdir)
+{
+	au_hin_ctl(hdir, /*do_set*/1);
+}
+
+static inline void au_hin_imtx_lock(struct au_hinode *hdir)
+{
+	mutex_lock(&hdir->hi_inode->i_mutex);
+	au_hin_suspend(hdir);
+}
+
+static inline void au_hin_imtx_lock_nested(struct au_hinode *hdir,
+					   unsigned int sc __maybe_unused)
+{
+	mutex_lock_nested(&hdir->hi_inode->i_mutex, sc);
+	au_hin_suspend(hdir);
+}
+
+static inline void au_hin_imtx_unlock(struct au_hinode *hdir)
+{
+	au_hin_resume(hdir);
+	mutex_unlock(&hdir->hi_inode->i_mutex);
+}
+
+#endif /* __KERNEL__ */
+#endif /* __AUFS_INODE_H__ */
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/sysfs.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/sysfs.c
@@ -0,0 +1,248 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * sysfs interface
+ */
+
+#include <linux/fs.h>
+#include <linux/module.h>
+#include <linux/seq_file.h>
+#include <linux/sysfs.h>
+#include "aufs.h"
+
+#ifdef CONFIG_AUFS_FS_MODULE
+/* this entry violates the "one line per file" policy of sysfs */
+static ssize_t config_show(struct kobject *kobj, struct kobj_attribute *attr,
+			   char *buf)
+{
+	ssize_t err;
+	static char *conf =
+/* this file is generated at compiling */
+#include "conf.str"
+		;
+
+	err = snprintf(buf, PAGE_SIZE, conf);
+	if (unlikely(err >= PAGE_SIZE))
+		err = -EFBIG;
+	return err;
+}
+
+static struct kobj_attribute au_config_attr = __ATTR_RO(config);
+#endif
+
+static struct attribute *au_attr[] = {
+#ifdef CONFIG_AUFS_FS_MODULE
+	&au_config_attr.attr,
+#endif
+	NULL,	/* need to NULL terminate the list of attributes */
+};
+
+static struct attribute_group sysaufs_attr_group_body = {
+	.attrs = au_attr
+};
+
+struct attribute_group *sysaufs_attr_group = &sysaufs_attr_group_body;
+
+/* ---------------------------------------------------------------------- */
+
+int sysaufs_si_xi_path(struct seq_file *seq, struct super_block *sb)
+{
+	int err;
+
+	SiMustAnyLock(sb);
+
+	err = 0;
+	if (au_opt_test(au_mntflags(sb), XINO)) {
+		err = au_xino_path(seq, au_sbi(sb)->si_xib);
+		seq_putc(seq, '\n');
+	}
+	return err;
+}
+
+/*
+ * the lifetime of branch is independent from the entry under sysfs.
+ * sysfs handles the lifetime of the entry, and never call ->show() after it is
+ * unlinked.
+ */
+static int sysaufs_si_br(struct seq_file *seq, struct super_block *sb,
+			 aufs_bindex_t bindex)
+{
+	struct path path;
+	struct dentry *root;
+	struct au_branch *br;
+
+	AuDbg("b%d\n", bindex);
+
+	root = sb->s_root;
+	di_read_lock_parent(root, !AuLock_IR);
+	br = au_sbr(sb, bindex);
+	path.mnt = br->br_mnt;
+	path.dentry = au_h_dptr(root, bindex);
+	au_seq_path(seq, &path);
+	di_read_unlock(root, !AuLock_IR);
+	seq_printf(seq, "=%s\n", au_optstr_br_perm(br->br_perm));
+	return 0;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static struct seq_file *au_seq(char *p, ssize_t len)
+{
+	struct seq_file *seq;
+
+	seq = kzalloc(sizeof(*seq), GFP_NOFS);
+	if (seq) {
+		/* mutex_init(&seq.lock); */
+		seq->buf = p;
+		seq->size = len;
+		return seq; /* success */
+	}
+
+	seq = ERR_PTR(-ENOMEM);
+	return seq;
+}
+
+#define SysaufsBr_PREFIX "br"
+
+/* todo: file size may exceed PAGE_SIZE */
+ssize_t sysaufs_si_show(struct kobject *kobj, struct attribute *attr,
+			char *buf)
+{
+	ssize_t err;
+	long l;
+	aufs_bindex_t bend;
+	struct au_sbinfo *sbinfo;
+	struct super_block *sb;
+	struct seq_file *seq;
+	char *name;
+	struct attribute **cattr;
+
+	sbinfo = container_of(kobj, struct au_sbinfo, si_kobj);
+	sb = sbinfo->si_sb;
+
+	/*
+	 * prevent a race condition between sysfs and aufs.
+	 * for instance, sysfs_file_read() calls sysfs_get_active_two() which
+	 * prohibits maintaining the sysfs entries.
+	 * hew we acquire read lock after sysfs_get_active_two().
+	 * on the other hand, the remount process may maintain the sysfs/aufs
+	 * entries after acquiring write lock.
+	 * it can cause a deadlock.
+	 * simply we gave up processing read here.
+	 */
+	err = -EBUSY;
+	if (unlikely(!si_noflush_read_trylock(sb)))
+		goto out;
+
+	seq = au_seq(buf, PAGE_SIZE);
+	err = PTR_ERR(seq);
+	if (IS_ERR(seq))
+		goto out_unlock;
+
+	name = (void *)attr->name;
+	cattr = sysaufs_si_attrs;
+	while (*cattr) {
+		if (!strcmp(name, (*cattr)->name)) {
+			err = container_of(*cattr, struct sysaufs_si_attr, attr)
+				->show(seq, sb);
+			goto out_seq;
+		}
+		cattr++;
+	}
+
+	bend = au_sbend(sb);
+	if (!strncmp(name, SysaufsBr_PREFIX, sizeof(SysaufsBr_PREFIX) - 1)) {
+		name += sizeof(SysaufsBr_PREFIX) - 1;
+		err = strict_strtol(name, 10, &l);
+		if (!err) {
+			if (l <= bend)
+				err = sysaufs_si_br(seq, sb, (aufs_bindex_t)l);
+			else
+				err = -ENOENT;
+		}
+		goto out_seq;
+	}
+	BUG();
+
+ out_seq:
+	if (!err) {
+		err = seq->count;
+		/* sysfs limit */
+		if (unlikely(err == PAGE_SIZE))
+			err = -EFBIG;
+	}
+	kfree(seq);
+ out_unlock:
+	si_read_unlock(sb);
+ out:
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+void sysaufs_br_init(struct au_branch *br)
+{
+	br->br_attr.name = br->br_name;
+	br->br_attr.mode = S_IRUGO;
+	br->br_attr.owner = THIS_MODULE;
+}
+
+void sysaufs_brs_del(struct super_block *sb, aufs_bindex_t bindex)
+{
+	struct au_branch *br;
+	struct kobject *kobj;
+	aufs_bindex_t bend;
+
+	dbgaufs_brs_del(sb, bindex);
+
+	if (!sysaufs_brs)
+		return;
+
+	kobj = &au_sbi(sb)->si_kobj;
+	bend = au_sbend(sb);
+	for (; bindex <= bend; bindex++) {
+		br = au_sbr(sb, bindex);
+		sysfs_remove_file(kobj, &br->br_attr);
+	}
+}
+
+void sysaufs_brs_add(struct super_block *sb, aufs_bindex_t bindex)
+{
+	int err;
+	aufs_bindex_t bend;
+	struct kobject *kobj;
+	struct au_branch *br;
+
+	dbgaufs_brs_add(sb, bindex);
+
+	if (!sysaufs_brs)
+		return;
+
+	kobj = &au_sbi(sb)->si_kobj;
+	bend = au_sbend(sb);
+	for (; bindex <= bend; bindex++) {
+		br = au_sbr(sb, bindex);
+		snprintf(br->br_name, sizeof(br->br_name), SysaufsBr_PREFIX
+			 "%d", bindex);
+		err = sysfs_create_file(kobj, &br->br_attr);
+		if (unlikely(err))
+			pr_warning("failed %s under sysfs(%d)\n",
+				   br->br_name, err);
+	}
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/spl.h
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/spl.h
@@ -0,0 +1,57 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * simple list protected by a spinlock
+ */
+
+#ifndef __AUFS_SPL_H__
+#define __AUFS_SPL_H__
+
+#ifdef __KERNEL__
+
+#include <linux/spinlock.h>
+#include <linux/list.h>
+
+struct au_splhead {
+	spinlock_t		spin;
+	struct list_head	head;
+};
+
+static inline void au_spl_init(struct au_splhead *spl)
+{
+	spin_lock_init(&spl->spin);
+	INIT_LIST_HEAD(&spl->head);
+}
+
+static inline void au_spl_add(struct list_head *list, struct au_splhead *spl)
+{
+	spin_lock(&spl->spin);
+	list_add(list, &spl->head);
+	spin_unlock(&spl->spin);
+}
+
+static inline void au_spl_del(struct list_head *list, struct au_splhead *spl)
+{
+	spin_lock(&spl->spin);
+	list_del(list);
+	spin_unlock(&spl->spin);
+}
+
+#endif /* __KERNEL__ */
+#endif /* __AUFS_SPL_H__ */
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/plink.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/plink.c
@@ -0,0 +1,396 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * pseudo-link
+ */
+
+#include "aufs.h"
+
+/*
+ * during a user process maintains the pseudo-links,
+ * prohibit adding a new plink and branch manipulation.
+ */
+void au_plink_block_maintain(struct super_block *sb)
+{
+	struct au_sbinfo *sbi = au_sbi(sb);
+
+	SiMustAnyLock(sb);
+
+	/* gave up wake_up_bit() */
+	wait_event(sbi->si_plink_wq, !au_ftest_si(sbi, MAINTAIN_PLINK));
+}
+
+/* ---------------------------------------------------------------------- */
+
+struct pseudo_link {
+	struct list_head list;
+	struct inode *inode;
+};
+
+#ifdef CONFIG_AUFS_DEBUG
+void au_plink_list(struct super_block *sb)
+{
+	struct au_sbinfo *sbinfo;
+	struct list_head *plink_list;
+	struct pseudo_link *plink;
+
+	SiMustAnyLock(sb);
+
+	sbinfo = au_sbi(sb);
+	AuDebugOn(!au_opt_test(au_mntflags(sb), PLINK));
+
+	plink_list = &sbinfo->si_plink.head;
+	spin_lock(&sbinfo->si_plink.spin);
+	list_for_each_entry(plink, plink_list, list)
+		AuDbg("%lu\n", plink->inode->i_ino);
+	spin_unlock(&sbinfo->si_plink.spin);
+}
+#endif
+
+/* is the inode pseudo-linked? */
+int au_plink_test(struct inode *inode)
+{
+	int found;
+	struct au_sbinfo *sbinfo;
+	struct list_head *plink_list;
+	struct pseudo_link *plink;
+
+	sbinfo = au_sbi(inode->i_sb);
+	AuRwMustAnyLock(&sbinfo->si_rwsem);
+	AuDebugOn(!au_opt_test(au_mntflags(inode->i_sb), PLINK));
+
+	found = 0;
+	plink_list = &sbinfo->si_plink.head;
+	spin_lock(&sbinfo->si_plink.spin);
+	list_for_each_entry(plink, plink_list, list)
+		if (plink->inode == inode) {
+			found = 1;
+			break;
+		}
+	spin_unlock(&sbinfo->si_plink.spin);
+	return found;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/*
+ * generate a name for plink.
+ * the file will be stored under AUFS_WH_PLINKDIR.
+ */
+/* 20 is max digits length of ulong 64 */
+#define PLINK_NAME_LEN	((20 + 1) * 2)
+
+static int plink_name(char *name, int len, struct inode *inode,
+		      aufs_bindex_t bindex)
+{
+	int rlen;
+	struct inode *h_inode;
+
+	h_inode = au_h_iptr(inode, bindex);
+	rlen = snprintf(name, len, "%lu.%lu", inode->i_ino, h_inode->i_ino);
+	return rlen;
+}
+
+/* lookup the plink-ed @inode under the branch at @bindex */
+struct dentry *au_plink_lkup(struct inode *inode, aufs_bindex_t bindex)
+{
+	struct dentry *h_dentry, *h_parent;
+	struct au_branch *br;
+	struct inode *h_dir;
+	char a[PLINK_NAME_LEN];
+	struct qstr tgtname = {
+		.name	= a
+	};
+
+	br = au_sbr(inode->i_sb, bindex);
+	h_parent = br->br_wbr->wbr_plink;
+	h_dir = h_parent->d_inode;
+	tgtname.len = plink_name(a, sizeof(a), inode, bindex);
+
+	/* always superio. */
+	mutex_lock_nested(&h_dir->i_mutex, AuLsc_I_CHILD2);
+	h_dentry = au_sio_lkup_one(&tgtname, h_parent, br);
+	mutex_unlock(&h_dir->i_mutex);
+	return h_dentry;
+}
+
+/* create a pseudo-link */
+static int do_whplink(struct qstr *tgt, struct dentry *h_parent,
+		      struct dentry *h_dentry, struct au_branch *br)
+{
+	int err;
+	struct path h_path = {
+		.mnt = br->br_mnt
+	};
+	struct inode *h_dir;
+
+	h_dir = h_parent->d_inode;
+ again:
+	h_path.dentry = au_lkup_one(tgt, h_parent, br, /*nd*/NULL);
+	err = PTR_ERR(h_path.dentry);
+	if (IS_ERR(h_path.dentry))
+		goto out;
+
+	err = 0;
+	/* wh.plink dir is not monitored */
+	if (h_path.dentry->d_inode
+	    && h_path.dentry->d_inode != h_dentry->d_inode) {
+		err = vfsub_unlink(h_dir, &h_path, /*force*/0);
+		dput(h_path.dentry);
+		h_path.dentry = NULL;
+		if (!err)
+			goto again;
+	}
+	if (!err && !h_path.dentry->d_inode)
+		err = vfsub_link(h_dentry, h_dir, &h_path);
+	dput(h_path.dentry);
+
+ out:
+	return err;
+}
+
+struct do_whplink_args {
+	int *errp;
+	struct qstr *tgt;
+	struct dentry *h_parent;
+	struct dentry *h_dentry;
+	struct au_branch *br;
+};
+
+static void call_do_whplink(void *args)
+{
+	struct do_whplink_args *a = args;
+	*a->errp = do_whplink(a->tgt, a->h_parent, a->h_dentry, a->br);
+}
+
+static int whplink(struct dentry *h_dentry, struct inode *inode,
+		   aufs_bindex_t bindex, struct au_branch *br)
+{
+	int err, wkq_err;
+	struct au_wbr *wbr;
+	struct dentry *h_parent;
+	struct inode *h_dir;
+	char a[PLINK_NAME_LEN];
+	struct qstr tgtname = {
+		.name = a
+	};
+
+	wbr = au_sbr(inode->i_sb, bindex)->br_wbr;
+	h_parent = wbr->wbr_plink;
+	h_dir = h_parent->d_inode;
+	tgtname.len = plink_name(a, sizeof(a), inode, bindex);
+
+	/* always superio. */
+	mutex_lock_nested(&h_dir->i_mutex, AuLsc_I_CHILD2);
+	if (!au_test_wkq(current)) {
+		struct do_whplink_args args = {
+			.errp		= &err,
+			.tgt		= &tgtname,
+			.h_parent	= h_parent,
+			.h_dentry	= h_dentry,
+			.br		= br
+		};
+		wkq_err = au_wkq_wait(call_do_whplink, &args);
+		if (unlikely(wkq_err))
+			err = wkq_err;
+	} else
+		err = do_whplink(&tgtname, h_parent, h_dentry, br);
+	mutex_unlock(&h_dir->i_mutex);
+
+	return err;
+}
+
+/* free a single plink */
+static void do_put_plink(struct pseudo_link *plink, int do_del)
+{
+	iput(plink->inode);
+	if (do_del)
+		list_del(&plink->list);
+	kfree(plink);
+}
+
+/*
+ * create a new pseudo-link for @h_dentry on @bindex.
+ * the linked inode is held in aufs @inode.
+ */
+void au_plink_append(struct inode *inode, aufs_bindex_t bindex,
+		     struct dentry *h_dentry)
+{
+	struct super_block *sb;
+	struct au_sbinfo *sbinfo;
+	struct list_head *plink_list;
+	struct pseudo_link *plink;
+	int found, err, cnt;
+
+	sb = inode->i_sb;
+	sbinfo = au_sbi(sb);
+	AuDebugOn(!au_opt_test(au_mntflags(sb), PLINK));
+
+	err = 0;
+	cnt = 0;
+	found = 0;
+	plink_list = &sbinfo->si_plink.head;
+	spin_lock(&sbinfo->si_plink.spin);
+	list_for_each_entry(plink, plink_list, list) {
+		cnt++;
+		if (plink->inode == inode) {
+			found = 1;
+			break;
+		}
+	}
+	if (found) {
+		spin_unlock(&sbinfo->si_plink.spin);
+		return;
+	}
+
+	plink = NULL;
+	if (!found) {
+		plink = kmalloc(sizeof(*plink), GFP_ATOMIC);
+		if (plink) {
+			plink->inode = au_igrab(inode);
+			list_add(&plink->list, plink_list);
+			cnt++;
+		} else
+			err = -ENOMEM;
+	}
+	spin_unlock(&sbinfo->si_plink.spin);
+
+	if (!err) {
+		au_plink_block_maintain(sb);
+		err = whplink(h_dentry, inode, bindex, au_sbr(sb, bindex));
+	}
+
+	if (unlikely(cnt > AUFS_PLINK_WARN))
+		AuWarn1("unexpectedly many pseudo links, %d\n", cnt);
+	if (unlikely(err)) {
+		pr_warning("err %d, damaged pseudo link.\n", err);
+		if (!found && plink)
+			do_put_plink(plink, /*do_del*/1);
+	}
+}
+
+/* free all plinks */
+void au_plink_put(struct super_block *sb)
+{
+	struct au_sbinfo *sbinfo;
+	struct list_head *plink_list;
+	struct pseudo_link *plink, *tmp;
+
+	SiMustWriteLock(sb);
+
+	sbinfo = au_sbi(sb);
+	AuDebugOn(!au_opt_test(au_mntflags(sb), PLINK));
+
+	plink_list = &sbinfo->si_plink.head;
+	/* no spin_lock since sbinfo is write-locked */
+	list_for_each_entry_safe(plink, tmp, plink_list, list)
+		do_put_plink(plink, 0);
+	INIT_LIST_HEAD(plink_list);
+}
+
+/* free the plinks on a branch specified by @br_id */
+void au_plink_half_refresh(struct super_block *sb, aufs_bindex_t br_id)
+{
+	struct au_sbinfo *sbinfo;
+	struct list_head *plink_list;
+	struct pseudo_link *plink, *tmp;
+	struct inode *inode;
+	aufs_bindex_t bstart, bend, bindex;
+	unsigned char do_put;
+
+	SiMustWriteLock(sb);
+
+	sbinfo = au_sbi(sb);
+	AuDebugOn(!au_opt_test(au_mntflags(sb), PLINK));
+
+	plink_list = &sbinfo->si_plink.head;
+	/* no spin_lock since sbinfo is write-locked */
+	list_for_each_entry_safe(plink, tmp, plink_list, list) {
+		do_put = 0;
+		inode = au_igrab(plink->inode);
+		ii_write_lock_child(inode);
+		bstart = au_ibstart(inode);
+		bend = au_ibend(inode);
+		if (bstart >= 0) {
+			for (bindex = bstart; bindex <= bend; bindex++) {
+				if (!au_h_iptr(inode, bindex)
+				    || au_ii_br_id(inode, bindex) != br_id)
+					continue;
+				au_set_h_iptr(inode, bindex, NULL, 0);
+				do_put = 1;
+				break;
+			}
+		} else
+			do_put_plink(plink, 1);
+
+		if (do_put) {
+			for (bindex = bstart; bindex <= bend; bindex++)
+				if (au_h_iptr(inode, bindex)) {
+					do_put = 0;
+					break;
+				}
+			if (do_put)
+				do_put_plink(plink, 1);
+		}
+		ii_write_unlock(inode);
+		iput(inode);
+	}
+}
+
+/* ---------------------------------------------------------------------- */
+
+long au_plink_ioctl(struct file *file, unsigned int cmd)
+{
+	long err;
+	struct super_block *sb;
+	struct au_sbinfo *sbinfo;
+
+	err = -EACCES;
+	if (!capable(CAP_SYS_ADMIN))
+		goto out;
+
+	err = 0;
+	sb = file->f_dentry->d_sb;
+	sbinfo = au_sbi(sb);
+	switch (cmd) {
+	case AUFS_CTL_PLINK_MAINT:
+		/*
+		 * pseudo-link maintenance mode,
+		 * cleared by aufs_release_dir()
+		 */
+		si_write_lock(sb);
+		if (!au_ftest_si(sbinfo, MAINTAIN_PLINK)) {
+			au_fset_si(sbinfo, MAINTAIN_PLINK);
+			au_fi(file)->fi_maintain_plink = 1;
+		} else
+			err = -EBUSY;
+		si_write_unlock(sb);
+		break;
+	case AUFS_CTL_PLINK_CLEAN:
+		aufs_write_lock(sb->s_root);
+		if (au_opt_test(sbinfo->si_mntflags, PLINK))
+			au_plink_put(sb);
+		aufs_write_unlock(sb->s_root);
+		break;
+	default:
+		err = -EINVAL;
+	}
+ out:
+	return err;
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/finfo.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/finfo.c
@@ -0,0 +1,128 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * file private data
+ */
+
+#include <linux/file.h>
+#include "aufs.h"
+
+void au_hfput(struct au_hfile *hf, struct file *file)
+{
+	if (file->f_flags & vfsub_fmode_to_uint(FMODE_EXEC))
+		allow_write_access(hf->hf_file);
+	fput(hf->hf_file);
+	hf->hf_file = NULL;
+	atomic_dec_return(&hf->hf_br->br_count);
+	hf->hf_br = NULL;
+}
+
+void au_set_h_fptr(struct file *file, aufs_bindex_t bindex, struct file *val)
+{
+	struct au_finfo *finfo = au_fi(file);
+	struct au_hfile *hf;
+
+	hf = finfo->fi_hfile + bindex;
+	if (hf->hf_file)
+		au_hfput(hf, file);
+	if (val) {
+		hf->hf_file = val;
+		hf->hf_br = au_sbr(file->f_dentry->d_sb, bindex);
+	}
+}
+
+void au_update_figen(struct file *file)
+{
+	atomic_set(&au_fi(file)->fi_generation, au_digen(file->f_dentry));
+	/* smp_mb(); */ /* atomic_set */
+}
+
+/* ---------------------------------------------------------------------- */
+
+void au_finfo_fin(struct file *file)
+{
+	struct au_finfo *finfo;
+	aufs_bindex_t bindex, bend;
+
+	fi_write_lock(file);
+	bend = au_fbend(file);
+	bindex = au_fbstart(file);
+	if (bindex >= 0)
+		/*
+		 * calls fput() instead of filp_close(),
+		 * since no dnotify or lock for the lower file.
+		 */
+		for (; bindex <= bend; bindex++)
+			au_set_h_fptr(file, bindex, NULL);
+
+	finfo = au_fi(file);
+	au_dbg_verify_hf(finfo);
+	kfree(finfo->fi_hfile);
+	fi_write_unlock(file);
+	AuRwDestroy(&finfo->fi_rwsem);
+	au_cache_free_finfo(finfo);
+}
+
+int au_finfo_init(struct file *file)
+{
+	struct au_finfo *finfo;
+	struct dentry *dentry;
+
+	dentry = file->f_dentry;
+	finfo = au_cache_alloc_finfo();
+	if (unlikely(!finfo))
+		goto out;
+
+	finfo->fi_hfile = kcalloc(au_sbend(dentry->d_sb) + 1,
+				  sizeof(*finfo->fi_hfile), GFP_NOFS);
+	if (unlikely(!finfo->fi_hfile))
+		goto out_finfo;
+
+	au_rw_init_wlock(&finfo->fi_rwsem);
+	finfo->fi_bstart = -1;
+	finfo->fi_bend = -1;
+	atomic_set(&finfo->fi_generation, au_digen(dentry));
+	/* smp_mb(); */ /* atomic_set */
+
+	file->private_data = finfo;
+	return 0; /* success */
+
+ out_finfo:
+	au_cache_free_finfo(finfo);
+ out:
+	return -ENOMEM;
+}
+
+int au_fi_realloc(struct au_finfo *finfo, int nbr)
+{
+	int err, sz;
+	struct au_hfile *hfp;
+
+	err = -ENOMEM;
+	sz = sizeof(*hfp) * (finfo->fi_bend + 1);
+	if (!sz)
+		sz = sizeof(*hfp);
+	hfp = au_kzrealloc(finfo->fi_hfile, sz, sizeof(*hfp) * nbr, GFP_NOFS);
+	if (hfp) {
+		finfo->fi_hfile = hfp;
+		err = 0;
+	}
+
+	return err;
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/vfsub.h
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/vfsub.h
@@ -0,0 +1,172 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * sub-routines for VFS
+ */
+
+#ifndef __AUFS_VFSUB_H__
+#define __AUFS_VFSUB_H__
+
+#ifdef __KERNEL__
+
+#include <linux/fs.h>
+#include <linux/fs_stack.h>
+
+/* ---------------------------------------------------------------------- */
+
+/* lock subclass for lower inode */
+/* default MAX_LOCKDEP_SUBCLASSES(8) is not enough */
+/* reduce? gave up. */
+enum {
+	AuLsc_I_Begin = I_MUTEX_QUOTA, /* 4 */
+	AuLsc_I_PARENT,		/* lower inode, parent first */
+	AuLsc_I_PARENT2,	/* copyup dirs */
+	AuLsc_I_PARENT3,	/* copyup wh */
+	AuLsc_I_CHILD,
+	AuLsc_I_CHILD2,
+	AuLsc_I_End
+};
+
+/* to debug easier, do not make them inlined functions */
+#define MtxMustLock(mtx)	AuDebugOn(!mutex_is_locked(mtx))
+#define IMustLock(i)		MtxMustLock(&(i)->i_mutex)
+
+/* ---------------------------------------------------------------------- */
+
+static inline void vfsub_copy_inode_size(struct inode *inode,
+					 struct inode *h_inode)
+{
+	spin_lock(&inode->i_lock);
+	fsstack_copy_inode_size(inode, h_inode);
+	spin_unlock(&inode->i_lock);
+}
+
+int vfsub_update_h_iattr(struct path *h_path, int *did);
+struct file *vfsub_filp_open(const char *path, int oflags, int mode);
+struct file *vfsub_dentry_open(struct path *path, int flags,
+			       const struct cred *cred);
+int vfsub_kern_path(const char *name, unsigned int flags, struct path *path);
+struct dentry *vfsub_lookup_one_len(const char *name, struct dentry *parent,
+				    int len);
+struct dentry *vfsub_lookup_hash(struct nameidata *nd);
+
+/* ---------------------------------------------------------------------- */
+
+struct au_hinode;
+struct dentry *vfsub_lock_rename(struct dentry *d1, struct au_hinode *hdir1,
+				 struct dentry *d2, struct au_hinode *hdir2);
+void vfsub_unlock_rename(struct dentry *d1, struct au_hinode *hdir1,
+			 struct dentry *d2, struct au_hinode *hdir2);
+
+int vfsub_create(struct inode *dir, struct path *path, int mode);
+int vfsub_symlink(struct inode *dir, struct path *path,
+		  const char *symname);
+int vfsub_mknod(struct inode *dir, struct path *path, int mode, dev_t dev);
+int vfsub_link(struct dentry *src_dentry, struct inode *dir,
+	       struct path *path);
+int vfsub_rename(struct inode *src_hdir, struct dentry *src_dentry,
+		 struct inode *hdir, struct path *path);
+int vfsub_mkdir(struct inode *dir, struct path *path, int mode);
+int vfsub_rmdir(struct inode *dir, struct path *path);
+
+int vfsub_sio_mkdir(struct inode *dir, struct path *path, int mode);
+int vfsub_sio_rmdir(struct inode *dir, struct path *path);
+int vfsub_sio_notify_change(struct path *path, struct iattr *ia);
+int vfsub_notify_change(struct path *path, struct iattr *ia);
+int vfsub_unlink(struct inode *dir, struct path *path, int force);
+
+/* ---------------------------------------------------------------------- */
+
+ssize_t vfsub_read_u(struct file *file, char __user *ubuf, size_t count,
+		     loff_t *ppos);
+ssize_t vfsub_read_k(struct file *file, void *kbuf, size_t count,
+			loff_t *ppos);
+ssize_t vfsub_write_u(struct file *file, const char __user *ubuf, size_t count,
+		      loff_t *ppos);
+ssize_t vfsub_write_k(struct file *file, void *kbuf, size_t count,
+		      loff_t *ppos);
+int vfsub_readdir(struct file *file, filldir_t filldir, void *arg);
+
+long vfsub_splice_to(struct file *in, loff_t *ppos,
+		     struct pipe_inode_info *pipe, size_t len,
+		     unsigned int flags);
+long vfsub_splice_from(struct pipe_inode_info *pipe, struct file *out,
+		       loff_t *ppos, size_t len, unsigned int flags);
+int vfsub_trunc(struct path *h_path, loff_t length, unsigned int attr,
+		struct file *h_file);
+
+static inline void vfsub_file_accessed(struct file *h_file)
+{
+	file_accessed(h_file);
+	vfsub_update_h_iattr(&h_file->f_path, /*did*/NULL); /*ignore*/
+}
+
+static inline void vfsub_touch_atime(struct vfsmount *h_mnt,
+				     struct dentry *h_dentry)
+{
+	struct path h_path = {
+		.dentry	= h_dentry,
+		.mnt	= h_mnt
+	};
+	touch_atime(h_mnt, h_dentry);
+	vfsub_update_h_iattr(&h_path, /*did*/NULL); /*ignore*/
+}
+
+/* ---------------------------------------------------------------------- */
+
+static inline loff_t vfsub_llseek(struct file *file, loff_t offset, int origin)
+{
+	loff_t err;
+
+	/* lockdep_off(); */
+	err = vfs_llseek(file, offset, origin);
+	/* lockdep_on(); */
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* dirty workaround for strict type of fmode_t */
+union vfsub_fmu {
+	fmode_t fm;
+	unsigned int ui;
+};
+
+static inline unsigned int vfsub_fmode_to_uint(fmode_t fm)
+{
+	union vfsub_fmu u = {
+		.fm = fm
+	};
+
+	BUILD_BUG_ON(sizeof(u.fm) != sizeof(u.ui));
+
+	return u.ui;
+}
+
+static inline fmode_t vfsub_uint_to_fmode(unsigned int ui)
+{
+	union vfsub_fmu u = {
+		.ui = ui
+	};
+
+	return u.fm;
+}
+
+#endif /* __KERNEL__ */
+#endif /* __AUFS_VFSUB_H__ */
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/module.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/module.c
@@ -0,0 +1,174 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * module global variables and operations
+ */
+
+#include <linux/module.h>
+#include <linux/seq_file.h>
+#include "aufs.h"
+
+void *au_kzrealloc(void *p, unsigned int nused, unsigned int new_sz, gfp_t gfp)
+{
+	if (new_sz <= nused)
+		return p;
+
+	p = krealloc(p, new_sz, gfp);
+	if (p)
+		memset(p + nused, 0, new_sz - nused);
+	return p;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/*
+ * aufs caches
+ */
+struct kmem_cache *au_cachep[AuCache_Last];
+static int __init au_cache_init(void)
+{
+	au_cachep[AuCache_DINFO] = AuCache(au_dinfo);
+	if (au_cachep[AuCache_DINFO])
+		au_cachep[AuCache_ICNTNR] = AuCache(au_icntnr);
+	if (au_cachep[AuCache_ICNTNR])
+		au_cachep[AuCache_FINFO] = AuCache(au_finfo);
+	if (au_cachep[AuCache_FINFO])
+		au_cachep[AuCache_VDIR] = AuCache(au_vdir);
+	if (au_cachep[AuCache_VDIR])
+		au_cachep[AuCache_DEHSTR] = AuCache(au_vdir_dehstr);
+	if (au_cachep[AuCache_DEHSTR])
+		return 0;
+
+	return -ENOMEM;
+}
+
+static void au_cache_fin(void)
+{
+	int i;
+	for (i = 0; i < AuCache_Last; i++)
+		if (au_cachep[i]) {
+			kmem_cache_destroy(au_cachep[i]);
+			au_cachep[i] = NULL;
+		}
+}
+
+/* ---------------------------------------------------------------------- */
+
+int au_dir_roflags;
+
+/*
+ * functions for module interface.
+ */
+MODULE_LICENSE("GPL");
+/* MODULE_LICENSE("GPL v2"); */
+MODULE_AUTHOR("Junjiro R. Okajima <aufs-users@lists.sourceforge.net>");
+MODULE_DESCRIPTION(AUFS_NAME
+	" -- Advanced multi layered unification filesystem");
+MODULE_VERSION(AUFS_VERSION);
+
+/* it should be 'byte', but param_set_byte() prints it by "%c" */
+short aufs_nwkq = AUFS_NWKQ_DEF;
+MODULE_PARM_DESC(nwkq, "the number of workqueue thread, " AUFS_WKQ_NAME);
+module_param_named(nwkq, aufs_nwkq, short, S_IRUGO);
+
+/* this module parameter has no meaning when SYSFS is disabled */
+int sysaufs_brs = 1;
+MODULE_PARM_DESC(brs, "use <sysfs>/fs/aufs/si_*/brN");
+module_param_named(brs, sysaufs_brs, int, S_IRUGO);
+
+/* ---------------------------------------------------------------------- */
+
+static char au_esc_chars[0x20 + 3]; /* 0x01-0x20, backslash, del, and NULL */
+
+int au_seq_path(struct seq_file *seq, struct path *path)
+{
+	return seq_path(seq, path, au_esc_chars);
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int __init aufs_init(void)
+{
+	int err, i;
+	char *p;
+
+	p = au_esc_chars;
+	for (i = 1; i <= ' '; i++)
+		*p++ = i;
+	*p++ = '\\';
+	*p++ = '\x7f';
+	*p = 0;
+
+	au_dir_roflags = au_file_roflags(O_DIRECTORY | O_LARGEFILE);
+
+	sysaufs_brs_init();
+	au_debug_init();
+
+	err = -EINVAL;
+	if (unlikely(aufs_nwkq <= 0))
+		goto out;
+
+	err = sysaufs_init();
+	if (unlikely(err))
+		goto out;
+	err = au_wkq_init();
+	if (unlikely(err))
+		goto out_sysaufs;
+	err = au_hinotify_init();
+	if (unlikely(err))
+		goto out_wkq;
+	err = au_sysrq_init();
+	if (unlikely(err))
+		goto out_hin;
+	err = au_cache_init();
+	if (unlikely(err))
+		goto out_sysrq;
+	err = register_filesystem(&aufs_fs_type);
+	if (unlikely(err))
+		goto out_cache;
+	/* since we define pr_fmt, call printk directly */
+	printk(KERN_INFO AUFS_NAME " " AUFS_VERSION "\n");
+	goto out; /* success */
+
+ out_cache:
+	au_cache_fin();
+ out_sysrq:
+	au_sysrq_fin();
+ out_hin:
+	au_hinotify_fin();
+ out_wkq:
+	au_wkq_fin();
+ out_sysaufs:
+	sysaufs_fin();
+ out:
+	return err;
+}
+
+static void __exit aufs_exit(void)
+{
+	unregister_filesystem(&aufs_fs_type);
+	au_cache_fin();
+	au_sysrq_fin();
+	au_hinotify_fin();
+	au_wkq_fin();
+	sysaufs_fin();
+}
+
+module_init(aufs_init);
+module_exit(aufs_exit);
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/i_op_add.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/i_op_add.c
@@ -0,0 +1,658 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * inode operations (add entry)
+ */
+
+#include "aufs.h"
+
+/*
+ * final procedure of adding a new entry, except link(2).
+ * remove whiteout, instantiate, copyup the parent dir's times and size
+ * and update version.
+ * if it failed, re-create the removed whiteout.
+ */
+static int epilog(struct inode *dir, aufs_bindex_t bindex,
+		  struct dentry *wh_dentry, struct dentry *dentry)
+{
+	int err, rerr;
+	aufs_bindex_t bwh;
+	struct path h_path;
+	struct inode *inode, *h_dir;
+	struct dentry *wh;
+
+	bwh = -1;
+	if (wh_dentry) {
+		h_dir = wh_dentry->d_parent->d_inode; /* dir inode is locked */
+		IMustLock(h_dir);
+		AuDebugOn(au_h_iptr(dir, bindex) != h_dir);
+		bwh = au_dbwh(dentry);
+		h_path.dentry = wh_dentry;
+		h_path.mnt = au_sbr_mnt(dir->i_sb, bindex);
+		err = au_wh_unlink_dentry(au_h_iptr(dir, bindex), &h_path,
+					  dentry);
+		if (unlikely(err))
+			goto out;
+	}
+
+	inode = au_new_inode(dentry, /*must_new*/1);
+	if (!IS_ERR(inode)) {
+		d_instantiate(dentry, inode);
+		dir = dentry->d_parent->d_inode; /* dir inode is locked */
+		IMustLock(dir);
+		if (au_ibstart(dir) == au_dbstart(dentry))
+			au_cpup_attr_timesizes(dir);
+		dir->i_version++;
+		return 0; /* success */
+	}
+
+	err = PTR_ERR(inode);
+	if (!wh_dentry)
+		goto out;
+
+	/* revert */
+	/* dir inode is locked */
+	wh = au_wh_create(dentry, bwh, wh_dentry->d_parent);
+	rerr = PTR_ERR(wh);
+	if (IS_ERR(wh)) {
+		AuIOErr("%.*s reverting whiteout failed(%d, %d)\n",
+			AuDLNPair(dentry), err, rerr);
+		err = -EIO;
+	} else
+		dput(wh);
+
+ out:
+	return err;
+}
+
+/*
+ * simple tests for the adding inode operations.
+ * following the checks in vfs, plus the parent-child relationship.
+ */
+int au_may_add(struct dentry *dentry, aufs_bindex_t bindex,
+	       struct dentry *h_parent, int isdir)
+{
+	int err;
+	umode_t h_mode;
+	struct dentry *h_dentry;
+	struct inode *h_inode;
+
+	err = -ENAMETOOLONG;
+	if (unlikely(dentry->d_name.len > AUFS_MAX_NAMELEN))
+		goto out;
+
+	h_dentry = au_h_dptr(dentry, bindex);
+	h_inode = h_dentry->d_inode;
+	if (!dentry->d_inode) {
+		err = -EEXIST;
+		if (unlikely(h_inode))
+			goto out;
+	} else {
+		/* rename(2) case */
+		err = -EIO;
+		if (unlikely(!h_inode || !h_inode->i_nlink))
+			goto out;
+
+		h_mode = h_inode->i_mode;
+		if (!isdir) {
+			err = -EISDIR;
+			if (unlikely(S_ISDIR(h_mode)))
+				goto out;
+		} else if (unlikely(!S_ISDIR(h_mode))) {
+			err = -ENOTDIR;
+			goto out;
+		}
+	}
+
+	err = -EIO;
+	/* expected parent dir is locked */
+	if (unlikely(h_parent != h_dentry->d_parent))
+		goto out;
+	err = 0;
+
+ out:
+	AuTraceErr(err);
+	return err;
+}
+
+/*
+ * initial procedure of adding a new entry.
+ * prepare writable branch and the parent dir, lock it,
+ * and lookup whiteout for the new entry.
+ */
+static struct dentry*
+lock_hdir_lkup_wh(struct dentry *dentry, struct au_dtime *dt,
+		  struct dentry *src_dentry, struct au_pin *pin,
+		  struct au_wr_dir_args *wr_dir_args)
+{
+	struct dentry *wh_dentry, *h_parent;
+	struct super_block *sb;
+	struct au_branch *br;
+	int err;
+	unsigned int udba;
+	aufs_bindex_t bcpup;
+
+	AuDbg("%.*s\n", AuDLNPair(dentry));
+
+	err = au_wr_dir(dentry, src_dentry, wr_dir_args);
+	bcpup = err;
+	wh_dentry = ERR_PTR(err);
+	if (unlikely(err < 0))
+		goto out;
+
+	sb = dentry->d_sb;
+	udba = au_opt_udba(sb);
+	err = au_pin(pin, dentry, bcpup, udba,
+		     AuPin_DI_LOCKED | AuPin_MNT_WRITE);
+	wh_dentry = ERR_PTR(err);
+	if (unlikely(err))
+		goto out;
+
+	h_parent = au_pinned_h_parent(pin);
+	if (udba != AuOpt_UDBA_NONE
+	    && au_dbstart(dentry) == bcpup)
+		err = au_may_add(dentry, bcpup, h_parent,
+				 au_ftest_wrdir(wr_dir_args->flags, ISDIR));
+	else if (unlikely(dentry->d_name.len > AUFS_MAX_NAMELEN))
+		err = -ENAMETOOLONG;
+	wh_dentry = ERR_PTR(err);
+	if (unlikely(err))
+		goto out_unpin;
+
+	br = au_sbr(sb, bcpup);
+	if (dt) {
+		struct path tmp = {
+			.dentry	= h_parent,
+			.mnt	= br->br_mnt
+		};
+		au_dtime_store(dt, au_pinned_parent(pin), &tmp);
+	}
+
+	wh_dentry = NULL;
+	if (bcpup != au_dbwh(dentry))
+		goto out; /* success */
+
+	wh_dentry = au_wh_lkup(h_parent, &dentry->d_name, br);
+
+ out_unpin:
+	if (IS_ERR(wh_dentry))
+		au_unpin(pin);
+ out:
+	return wh_dentry;
+}
+
+/* ---------------------------------------------------------------------- */
+
+enum { Mknod, Symlink, Creat };
+struct simple_arg {
+	int type;
+	union {
+		struct {
+			int mode;
+			struct nameidata *nd;
+		} c;
+		struct {
+			const char *symname;
+		} s;
+		struct {
+			int mode;
+			dev_t dev;
+		} m;
+	} u;
+};
+
+static int add_simple(struct inode *dir, struct dentry *dentry,
+		      struct simple_arg *arg)
+{
+	int err;
+	aufs_bindex_t bstart;
+	unsigned char created;
+	struct au_dtime dt;
+	struct au_pin pin;
+	struct path h_path;
+	struct dentry *wh_dentry, *parent;
+	struct inode *h_dir;
+	struct au_wr_dir_args wr_dir_args = {
+		.force_btgt	= -1,
+		.flags		= AuWrDir_ADD_ENTRY
+	};
+
+	AuDbg("%.*s\n", AuDLNPair(dentry));
+	IMustLock(dir);
+
+	parent = dentry->d_parent; /* dir inode is locked */
+	aufs_read_lock(dentry, AuLock_DW);
+	di_write_lock_parent(parent);
+	wh_dentry = lock_hdir_lkup_wh(dentry, &dt, /*src_dentry*/NULL, &pin,
+				      &wr_dir_args);
+	err = PTR_ERR(wh_dentry);
+	if (IS_ERR(wh_dentry))
+		goto out;
+
+	bstart = au_dbstart(dentry);
+	h_path.dentry = au_h_dptr(dentry, bstart);
+	h_path.mnt = au_sbr_mnt(dentry->d_sb, bstart);
+	h_dir = au_pinned_h_dir(&pin);
+	switch (arg->type) {
+	case Creat:
+		err = vfsub_create(h_dir, &h_path, arg->u.c.mode);
+		break;
+	case Symlink:
+		err = vfsub_symlink(h_dir, &h_path, arg->u.s.symname);
+		break;
+	case Mknod:
+		err = vfsub_mknod(h_dir, &h_path, arg->u.m.mode, arg->u.m.dev);
+		break;
+	default:
+		BUG();
+	}
+	created = !err;
+	if (!err)
+		err = epilog(dir, bstart, wh_dentry, dentry);
+
+	/* revert */
+	if (unlikely(created && err && h_path.dentry->d_inode)) {
+		int rerr;
+		rerr = vfsub_unlink(h_dir, &h_path, /*force*/0);
+		if (rerr) {
+			AuIOErr("%.*s revert failure(%d, %d)\n",
+				AuDLNPair(dentry), err, rerr);
+			err = -EIO;
+		}
+		au_dtime_revert(&dt);
+		d_drop(dentry);
+	}
+
+	au_unpin(&pin);
+	dput(wh_dentry);
+
+ out:
+	if (unlikely(err)) {
+		au_update_dbstart(dentry);
+		d_drop(dentry);
+	}
+	di_write_unlock(parent);
+	aufs_read_unlock(dentry, AuLock_DW);
+	return err;
+}
+
+int aufs_mknod(struct inode *dir, struct dentry *dentry, int mode, dev_t dev)
+{
+	struct simple_arg arg = {
+		.type = Mknod,
+		.u.m = {
+			.mode	= mode,
+			.dev	= dev
+		}
+	};
+	return add_simple(dir, dentry, &arg);
+}
+
+int aufs_symlink(struct inode *dir, struct dentry *dentry, const char *symname)
+{
+	struct simple_arg arg = {
+		.type = Symlink,
+		.u.s.symname = symname
+	};
+	return add_simple(dir, dentry, &arg);
+}
+
+int aufs_create(struct inode *dir, struct dentry *dentry, int mode,
+		struct nameidata *nd)
+{
+	struct simple_arg arg = {
+		.type = Creat,
+		.u.c = {
+			.mode	= mode,
+			.nd	= nd
+		}
+	};
+	return add_simple(dir, dentry, &arg);
+}
+
+/* ---------------------------------------------------------------------- */
+
+struct au_link_args {
+	aufs_bindex_t bdst, bsrc;
+	struct au_pin pin;
+	struct path h_path;
+	struct dentry *src_parent, *parent;
+};
+
+static int au_cpup_before_link(struct dentry *src_dentry,
+			       struct au_link_args *a)
+{
+	int err;
+	struct dentry *h_src_dentry;
+	struct mutex *h_mtx;
+
+	di_read_lock_parent(a->src_parent, AuLock_IR);
+	err = au_test_and_cpup_dirs(src_dentry, a->bdst);
+	if (unlikely(err))
+		goto out;
+
+	h_src_dentry = au_h_dptr(src_dentry, a->bsrc);
+	h_mtx = &h_src_dentry->d_inode->i_mutex;
+	err = au_pin(&a->pin, src_dentry, a->bdst,
+		     au_opt_udba(src_dentry->d_sb),
+		     AuPin_DI_LOCKED | AuPin_MNT_WRITE);
+	if (unlikely(err))
+		goto out;
+	mutex_lock_nested(h_mtx, AuLsc_I_CHILD);
+	err = au_sio_cpup_simple(src_dentry, a->bdst, -1,
+				 AuCpup_DTIME /* | AuCpup_KEEPLINO */);
+	mutex_unlock(h_mtx);
+	au_unpin(&a->pin);
+
+ out:
+	di_read_unlock(a->src_parent, AuLock_IR);
+	return err;
+}
+
+static int au_cpup_or_link(struct dentry *src_dentry, struct au_link_args *a)
+{
+	int err;
+	unsigned char plink;
+	struct inode *h_inode, *inode;
+	struct dentry *h_src_dentry;
+	struct super_block *sb;
+
+	plink = 0;
+	h_inode = NULL;
+	sb = src_dentry->d_sb;
+	inode = src_dentry->d_inode;
+	if (au_ibstart(inode) <= a->bdst)
+		h_inode = au_h_iptr(inode, a->bdst);
+	if (!h_inode || !h_inode->i_nlink) {
+		/* copyup src_dentry as the name of dentry. */
+		au_set_dbstart(src_dentry, a->bdst);
+		au_set_h_dptr(src_dentry, a->bdst, dget(a->h_path.dentry));
+		h_inode = au_h_dptr(src_dentry, a->bsrc)->d_inode;
+		mutex_lock_nested(&h_inode->i_mutex, AuLsc_I_CHILD);
+		err = au_sio_cpup_single(src_dentry, a->bdst, a->bsrc, -1,
+					 AuCpup_KEEPLINO, a->parent);
+		mutex_unlock(&h_inode->i_mutex);
+		au_set_h_dptr(src_dentry, a->bdst, NULL);
+		au_set_dbstart(src_dentry, a->bsrc);
+	} else {
+		/* the inode of src_dentry already exists on a.bdst branch */
+		h_src_dentry = d_find_alias(h_inode);
+		if (!h_src_dentry && au_plink_test(inode)) {
+			plink = 1;
+			h_src_dentry = au_plink_lkup(inode, a->bdst);
+			err = PTR_ERR(h_src_dentry);
+			if (IS_ERR(h_src_dentry))
+				goto out;
+
+			if (unlikely(!h_src_dentry->d_inode)) {
+				dput(h_src_dentry);
+				h_src_dentry = NULL;
+			}
+
+		}
+		if (h_src_dentry) {
+			err = vfsub_link(h_src_dentry, au_pinned_h_dir(&a->pin),
+					 &a->h_path);
+			dput(h_src_dentry);
+		} else {
+			AuIOErr("no dentry found for hi%lu on b%d\n",
+				h_inode->i_ino, a->bdst);
+			err = -EIO;
+		}
+	}
+
+	if (!err && !plink)
+		au_plink_append(inode, a->bdst, a->h_path.dentry);
+
+out:
+	return err;
+}
+
+int aufs_link(struct dentry *src_dentry, struct inode *dir,
+	      struct dentry *dentry)
+{
+	int err, rerr;
+	struct au_dtime dt;
+	struct au_link_args *a;
+	struct dentry *wh_dentry, *h_src_dentry;
+	struct inode *inode;
+	struct super_block *sb;
+	struct au_wr_dir_args wr_dir_args = {
+		/* .force_btgt	= -1, */
+		.flags		= AuWrDir_ADD_ENTRY
+	};
+
+	IMustLock(dir);
+	inode = src_dentry->d_inode;
+	IMustLock(inode);
+
+	err = -ENOENT;
+	if (unlikely(!inode->i_nlink))
+		goto out;
+
+	err = -ENOMEM;
+	a = kzalloc(sizeof(*a), GFP_NOFS);
+	if (unlikely(!a))
+		goto out;
+
+	a->parent = dentry->d_parent; /* dir inode is locked */
+	aufs_read_and_write_lock2(dentry, src_dentry, /*AuLock_FLUSH*/0);
+	a->src_parent = dget_parent(src_dentry);
+	wr_dir_args.force_btgt = au_dbstart(src_dentry);
+
+	di_write_lock_parent(a->parent);
+	wr_dir_args.force_btgt = au_wbr(dentry, wr_dir_args.force_btgt);
+	wh_dentry = lock_hdir_lkup_wh(dentry, &dt, src_dentry, &a->pin,
+				      &wr_dir_args);
+	err = PTR_ERR(wh_dentry);
+	if (IS_ERR(wh_dentry))
+		goto out_unlock;
+
+	err = 0;
+	sb = dentry->d_sb;
+	a->bdst = au_dbstart(dentry);
+	a->h_path.dentry = au_h_dptr(dentry, a->bdst);
+	a->h_path.mnt = au_sbr_mnt(sb, a->bdst);
+	a->bsrc = au_dbstart(src_dentry);
+	if (au_opt_test(au_mntflags(sb), PLINK)) {
+		if (a->bdst < a->bsrc
+		    /* && h_src_dentry->d_sb != a->h_path.dentry->d_sb */)
+			err = au_cpup_or_link(src_dentry, a);
+		else {
+			h_src_dentry = au_h_dptr(src_dentry, a->bdst);
+			err = vfsub_link(h_src_dentry, au_pinned_h_dir(&a->pin),
+					 &a->h_path);
+		}
+	} else {
+		/*
+		 * copyup src_dentry to the branch we process,
+		 * and then link(2) to it.
+		 */
+		if (a->bdst < a->bsrc
+		    /* && h_src_dentry->d_sb != a->h_path.dentry->d_sb */) {
+			au_unpin(&a->pin);
+			di_write_unlock(a->parent);
+			err = au_cpup_before_link(src_dentry, a);
+			di_write_lock_parent(a->parent);
+			if (!err)
+				err = au_pin(&a->pin, dentry, a->bdst,
+					     au_opt_udba(sb),
+					     AuPin_DI_LOCKED | AuPin_MNT_WRITE);
+			if (unlikely(err))
+				goto out_wh;
+		}
+		if (!err) {
+			h_src_dentry = au_h_dptr(src_dentry, a->bdst);
+			err = -ENOENT;
+			if (h_src_dentry && h_src_dentry->d_inode)
+				err = vfsub_link(h_src_dentry,
+						 au_pinned_h_dir(&a->pin),
+						 &a->h_path);
+		}
+	}
+	if (unlikely(err))
+		goto out_unpin;
+
+	if (wh_dentry) {
+		a->h_path.dentry = wh_dentry;
+		err = au_wh_unlink_dentry(au_pinned_h_dir(&a->pin), &a->h_path,
+					  dentry);
+		if (unlikely(err))
+			goto out_revert;
+	}
+
+	dir->i_version++;
+	if (au_ibstart(dir) == au_dbstart(dentry))
+		au_cpup_attr_timesizes(dir);
+	inc_nlink(inode);
+	inode->i_ctime = dir->i_ctime;
+	if (!d_unhashed(a->h_path.dentry))
+		d_instantiate(dentry, au_igrab(inode));
+	else
+		/* some filesystem calls d_drop() */
+		d_drop(dentry);
+	goto out_unpin; /* success */
+
+ out_revert:
+	rerr = vfsub_unlink(au_pinned_h_dir(&a->pin), &a->h_path, /*force*/0);
+	if (!rerr)
+		goto out_dt;
+	AuIOErr("%.*s reverting failed(%d, %d)\n",
+		AuDLNPair(dentry), err, rerr);
+	err = -EIO;
+ out_dt:
+	d_drop(dentry);
+	au_dtime_revert(&dt);
+ out_unpin:
+	au_unpin(&a->pin);
+ out_wh:
+	dput(wh_dentry);
+ out_unlock:
+	if (unlikely(err)) {
+		au_update_dbstart(dentry);
+		d_drop(dentry);
+	}
+	di_write_unlock(a->parent);
+	dput(a->src_parent);
+	aufs_read_and_write_unlock2(dentry, src_dentry);
+	kfree(a);
+ out:
+	return err;
+}
+
+int aufs_mkdir(struct inode *dir, struct dentry *dentry, int mode)
+{
+	int err, rerr;
+	aufs_bindex_t bindex;
+	unsigned char diropq;
+	struct path h_path;
+	struct dentry *wh_dentry, *parent, *opq_dentry;
+	struct mutex *h_mtx;
+	struct super_block *sb;
+	struct {
+		struct au_pin pin;
+		struct au_dtime dt;
+	} *a; /* reduce the stack usage */
+	struct au_wr_dir_args wr_dir_args = {
+		.force_btgt	= -1,
+		.flags		= AuWrDir_ADD_ENTRY | AuWrDir_ISDIR
+	};
+
+	IMustLock(dir);
+
+	err = -ENOMEM;
+	a = kmalloc(sizeof(*a), GFP_NOFS);
+	if (unlikely(!a))
+		goto out;
+
+	aufs_read_lock(dentry, AuLock_DW);
+	parent = dentry->d_parent; /* dir inode is locked */
+	di_write_lock_parent(parent);
+	wh_dentry = lock_hdir_lkup_wh(dentry, &a->dt, /*src_dentry*/NULL,
+				      &a->pin, &wr_dir_args);
+	err = PTR_ERR(wh_dentry);
+	if (IS_ERR(wh_dentry))
+		goto out_free;
+
+	sb = dentry->d_sb;
+	bindex = au_dbstart(dentry);
+	h_path.dentry = au_h_dptr(dentry, bindex);
+	h_path.mnt = au_sbr_mnt(sb, bindex);
+	err = vfsub_mkdir(au_pinned_h_dir(&a->pin), &h_path, mode);
+	if (unlikely(err))
+		goto out_unlock;
+
+	/* make the dir opaque */
+	diropq = 0;
+	h_mtx = &h_path.dentry->d_inode->i_mutex;
+	if (wh_dentry
+	    || au_opt_test(au_mntflags(sb), ALWAYS_DIROPQ)) {
+		mutex_lock_nested(h_mtx, AuLsc_I_CHILD);
+		opq_dentry = au_diropq_create(dentry, bindex);
+		mutex_unlock(h_mtx);
+		err = PTR_ERR(opq_dentry);
+		if (IS_ERR(opq_dentry))
+			goto out_dir;
+		dput(opq_dentry);
+		diropq = 1;
+	}
+
+	err = epilog(dir, bindex, wh_dentry, dentry);
+	if (!err) {
+		inc_nlink(dir);
+		goto out_unlock; /* success */
+	}
+
+	/* revert */
+	if (diropq) {
+		AuLabel(revert opq);
+		mutex_lock_nested(h_mtx, AuLsc_I_CHILD);
+		rerr = au_diropq_remove(dentry, bindex);
+		mutex_unlock(h_mtx);
+		if (rerr) {
+			AuIOErr("%.*s reverting diropq failed(%d, %d)\n",
+				AuDLNPair(dentry), err, rerr);
+			err = -EIO;
+		}
+	}
+
+ out_dir:
+	AuLabel(revert dir);
+	rerr = vfsub_rmdir(au_pinned_h_dir(&a->pin), &h_path);
+	if (rerr) {
+		AuIOErr("%.*s reverting dir failed(%d, %d)\n",
+			AuDLNPair(dentry), err, rerr);
+		err = -EIO;
+	}
+	d_drop(dentry);
+	au_dtime_revert(&a->dt);
+ out_unlock:
+	au_unpin(&a->pin);
+	dput(wh_dentry);
+ out_free:
+	if (unlikely(err)) {
+		au_update_dbstart(dentry);
+		d_drop(dentry);
+	}
+	di_write_unlock(parent);
+	aufs_read_unlock(dentry, AuLock_DW);
+	kfree(a);
+ out:
+	return err;
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/opts.h
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/opts.h
@@ -0,0 +1,196 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * mount options/flags
+ */
+
+#ifndef __AUFS_OPTS_H__
+#define __AUFS_OPTS_H__
+
+#ifdef __KERNEL__
+
+#include <linux/path.h>
+#include <linux/aufs_type.h>
+
+struct file;
+struct super_block;
+
+/* ---------------------------------------------------------------------- */
+
+/* mount flags */
+#define AuOpt_XINO		1		/* external inode number bitmap
+						   and translation table */
+#define AuOpt_TRUNC_XINO	(1 << 1)	/* truncate xino files */
+#define AuOpt_UDBA_NONE		(1 << 2)	/* users direct branch access */
+#define AuOpt_UDBA_REVAL	(1 << 3)
+#define AuOpt_UDBA_HINOTIFY	(1 << 4)
+#define AuOpt_SHWH		(1 << 5)	/* show whiteout */
+#define AuOpt_PLINK		(1 << 6)	/* pseudo-link */
+#define AuOpt_DIRPERM1		(1 << 7)	/* unimplemented */
+#define AuOpt_REFROF		(1 << 8)	/* unimplemented */
+#define AuOpt_ALWAYS_DIROPQ	(1 << 9)	/* policy to creating diropq */
+#define AuOpt_SUM		(1 << 10)	/* summation for statfs(2) */
+#define AuOpt_SUM_W		(1 << 11)	/* unimplemented */
+#define AuOpt_WARN_PERM		(1 << 12)	/* warn when add-branch */
+#define AuOpt_VERBOSE		(1 << 13)	/* busy inode when del-branch */
+
+#ifndef CONFIG_AUFS_HINOTIFY
+#undef AuOpt_UDBA_HINOTIFY
+#define AuOpt_UDBA_HINOTIFY	0
+#endif
+#ifndef CONFIG_AUFS_SHWH
+#undef AuOpt_SHWH
+#define AuOpt_SHWH		0
+#endif
+
+#define AuOpt_Def	(AuOpt_XINO \
+			 | AuOpt_UDBA_REVAL \
+			 | AuOpt_PLINK \
+			 /* | AuOpt_DIRPERM1 */ \
+			 | AuOpt_WARN_PERM)
+#define AuOptMask_UDBA	(AuOpt_UDBA_NONE \
+			 | AuOpt_UDBA_REVAL \
+			 | AuOpt_UDBA_HINOTIFY)
+
+#define au_opt_test(flags, name)	(flags & AuOpt_##name)
+#define au_opt_set(flags, name) do { \
+	BUILD_BUG_ON(AuOpt_##name & AuOptMask_UDBA); \
+	((flags) |= AuOpt_##name); \
+} while (0)
+#define au_opt_set_udba(flags, name) do { \
+	(flags) &= ~AuOptMask_UDBA; \
+	((flags) |= AuOpt_##name); \
+} while (0)
+#define au_opt_clr(flags, name)		{ ((flags) &= ~AuOpt_##name); }
+
+/* ---------------------------------------------------------------------- */
+
+/* policies to select one among multiple writable branches */
+enum {
+	AuWbrCreate_TDP,	/* top down parent */
+	AuWbrCreate_RR,		/* round robin */
+	AuWbrCreate_MFS,	/* most free space */
+	AuWbrCreate_MFSV,	/* mfs with seconds */
+	AuWbrCreate_MFSRR,	/* mfs then rr */
+	AuWbrCreate_MFSRRV,	/* mfs then rr with seconds */
+	AuWbrCreate_PMFS,	/* parent and mfs */
+	AuWbrCreate_PMFSV,	/* parent and mfs with seconds */
+
+	AuWbrCreate_Def = AuWbrCreate_TDP
+};
+
+enum {
+	AuWbrCopyup_TDP,	/* top down parent */
+	AuWbrCopyup_BUP,	/* bottom up parent */
+	AuWbrCopyup_BU,		/* bottom up */
+
+	AuWbrCopyup_Def = AuWbrCopyup_TDP
+};
+
+/* ---------------------------------------------------------------------- */
+
+struct au_opt_add {
+	aufs_bindex_t	bindex;
+	char		*pathname;
+	int		perm;
+	struct path	path;
+};
+
+struct au_opt_del {
+	char		*pathname;
+	struct path	h_path;
+};
+
+struct au_opt_mod {
+	char		*path;
+	int		perm;
+	struct dentry	*h_root;
+};
+
+struct au_opt_xino {
+	char		*path;
+	struct file	*file;
+};
+
+struct au_opt_xino_itrunc {
+	aufs_bindex_t	bindex;
+};
+
+struct au_opt_wbr_create {
+	int			wbr_create;
+	int			mfs_second;
+	unsigned long long	mfsrr_watermark;
+};
+
+struct au_opt {
+	int type;
+	union {
+		struct au_opt_xino	xino;
+		struct au_opt_xino_itrunc xino_itrunc;
+		struct au_opt_add	add;
+		struct au_opt_del	del;
+		struct au_opt_mod	mod;
+		int			dirwh;
+		int			rdcache;
+		unsigned int		rdblk;
+		unsigned int		rdhash;
+		int			udba;
+		struct au_opt_wbr_create wbr_create;
+		int			wbr_copyup;
+	};
+};
+
+/* opts flags */
+#define AuOpts_REMOUNT		1
+#define AuOpts_REFRESH_DIR	(1 << 1)
+#define AuOpts_REFRESH_NONDIR	(1 << 2)
+#define AuOpts_TRUNC_XIB	(1 << 3)
+#define au_ftest_opts(flags, name)	((flags) & AuOpts_##name)
+#define au_fset_opts(flags, name)	{ (flags) |= AuOpts_##name; }
+#define au_fclr_opts(flags, name)	{ (flags) &= ~AuOpts_##name; }
+
+struct au_opts {
+	struct au_opt	*opt;
+	int		max_opt;
+
+	unsigned int	given_udba;
+	unsigned int	flags;
+	unsigned long	sb_flags;
+};
+
+/* ---------------------------------------------------------------------- */
+
+const char *au_optstr_br_perm(int brperm);
+const char *au_optstr_udba(int udba);
+const char *au_optstr_wbr_copyup(int wbr_copyup);
+const char *au_optstr_wbr_create(int wbr_create);
+
+void au_opts_free(struct au_opts *opts);
+int au_opts_parse(struct super_block *sb, char *str, struct au_opts *opts);
+int au_opts_verify(struct super_block *sb, unsigned long sb_flags,
+		   unsigned int pending);
+int au_opts_mount(struct super_block *sb, struct au_opts *opts);
+int au_opts_remount(struct super_block *sb, struct au_opts *opts);
+
+unsigned int au_opt_udba(struct super_block *sb);
+
+/* ---------------------------------------------------------------------- */
+
+#endif /* __KERNEL__ */
+#endif /* __AUFS_OPTS_H__ */
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/dinfo.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/dinfo.c
@@ -0,0 +1,367 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * dentry private data
+ */
+
+#include "aufs.h"
+
+int au_alloc_dinfo(struct dentry *dentry)
+{
+	struct au_dinfo *dinfo;
+	struct super_block *sb;
+	int nbr;
+
+	dinfo = au_cache_alloc_dinfo();
+	if (unlikely(!dinfo))
+		goto out;
+
+	sb = dentry->d_sb;
+	nbr = au_sbend(sb) + 1;
+	if (nbr <= 0)
+		nbr = 1;
+	dinfo->di_hdentry = kcalloc(nbr, sizeof(*dinfo->di_hdentry), GFP_NOFS);
+	if (unlikely(!dinfo->di_hdentry))
+		goto out_dinfo;
+
+	atomic_set(&dinfo->di_generation, au_sigen(sb));
+	/* smp_mb(); */ /* atomic_set */
+	au_rw_init_wlock_nested(&dinfo->di_rwsem, AuLsc_DI_CHILD);
+	dinfo->di_bstart = -1;
+	dinfo->di_bend = -1;
+	dinfo->di_bwh = -1;
+	dinfo->di_bdiropq = -1;
+
+	dentry->d_fsdata = dinfo;
+	dentry->d_op = &aufs_dop;
+	return 0; /* success */
+
+ out_dinfo:
+	au_cache_free_dinfo(dinfo);
+ out:
+	return -ENOMEM;
+}
+
+int au_di_realloc(struct au_dinfo *dinfo, int nbr)
+{
+	int err, sz;
+	struct au_hdentry *hdp;
+
+	AuRwMustWriteLock(&dinfo->di_rwsem);
+
+	err = -ENOMEM;
+	sz = sizeof(*hdp) * (dinfo->di_bend + 1);
+	if (!sz)
+		sz = sizeof(*hdp);
+	hdp = au_kzrealloc(dinfo->di_hdentry, sz, sizeof(*hdp) * nbr, GFP_NOFS);
+	if (hdp) {
+		dinfo->di_hdentry = hdp;
+		err = 0;
+	}
+
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static void do_ii_write_lock(struct inode *inode, unsigned int lsc)
+{
+	switch (lsc) {
+	case AuLsc_DI_CHILD:
+		ii_write_lock_child(inode);
+		break;
+	case AuLsc_DI_CHILD2:
+		ii_write_lock_child2(inode);
+		break;
+	case AuLsc_DI_CHILD3:
+		ii_write_lock_child3(inode);
+		break;
+	case AuLsc_DI_PARENT:
+		ii_write_lock_parent(inode);
+		break;
+	case AuLsc_DI_PARENT2:
+		ii_write_lock_parent2(inode);
+		break;
+	case AuLsc_DI_PARENT3:
+		ii_write_lock_parent3(inode);
+		break;
+	default:
+		BUG();
+	}
+}
+
+static void do_ii_read_lock(struct inode *inode, unsigned int lsc)
+{
+	switch (lsc) {
+	case AuLsc_DI_CHILD:
+		ii_read_lock_child(inode);
+		break;
+	case AuLsc_DI_CHILD2:
+		ii_read_lock_child2(inode);
+		break;
+	case AuLsc_DI_CHILD3:
+		ii_read_lock_child3(inode);
+		break;
+	case AuLsc_DI_PARENT:
+		ii_read_lock_parent(inode);
+		break;
+	case AuLsc_DI_PARENT2:
+		ii_read_lock_parent2(inode);
+		break;
+	case AuLsc_DI_PARENT3:
+		ii_read_lock_parent3(inode);
+		break;
+	default:
+		BUG();
+	}
+}
+
+void di_read_lock(struct dentry *d, int flags, unsigned int lsc)
+{
+	au_rw_read_lock_nested(&au_di(d)->di_rwsem, lsc);
+	if (d->d_inode) {
+		if (au_ftest_lock(flags, IW))
+			do_ii_write_lock(d->d_inode, lsc);
+		else if (au_ftest_lock(flags, IR))
+			do_ii_read_lock(d->d_inode, lsc);
+	}
+}
+
+void di_read_unlock(struct dentry *d, int flags)
+{
+	if (d->d_inode) {
+		if (au_ftest_lock(flags, IW))
+			ii_write_unlock(d->d_inode);
+		else if (au_ftest_lock(flags, IR))
+			ii_read_unlock(d->d_inode);
+	}
+	au_rw_read_unlock(&au_di(d)->di_rwsem);
+}
+
+void di_downgrade_lock(struct dentry *d, int flags)
+{
+	if (d->d_inode && au_ftest_lock(flags, IR))
+		ii_downgrade_lock(d->d_inode);
+	au_rw_dgrade_lock(&au_di(d)->di_rwsem);
+}
+
+void di_write_lock(struct dentry *d, unsigned int lsc)
+{
+	au_rw_write_lock_nested(&au_di(d)->di_rwsem, lsc);
+	if (d->d_inode)
+		do_ii_write_lock(d->d_inode, lsc);
+}
+
+void di_write_unlock(struct dentry *d)
+{
+	if (d->d_inode)
+		ii_write_unlock(d->d_inode);
+	au_rw_write_unlock(&au_di(d)->di_rwsem);
+}
+
+void di_write_lock2_child(struct dentry *d1, struct dentry *d2, int isdir)
+{
+	AuDebugOn(d1 == d2
+		  || d1->d_inode == d2->d_inode
+		  || d1->d_sb != d2->d_sb);
+
+	if (isdir && au_test_subdir(d1, d2)) {
+		di_write_lock_child(d1);
+		di_write_lock_child2(d2);
+	} else {
+		/* there should be no races */
+		di_write_lock_child(d2);
+		di_write_lock_child2(d1);
+	}
+}
+
+void di_write_lock2_parent(struct dentry *d1, struct dentry *d2, int isdir)
+{
+	AuDebugOn(d1 == d2
+		  || d1->d_inode == d2->d_inode
+		  || d1->d_sb != d2->d_sb);
+
+	if (isdir && au_test_subdir(d1, d2)) {
+		di_write_lock_parent(d1);
+		di_write_lock_parent2(d2);
+	} else {
+		/* there should be no races */
+		di_write_lock_parent(d2);
+		di_write_lock_parent2(d1);
+	}
+}
+
+void di_write_unlock2(struct dentry *d1, struct dentry *d2)
+{
+	di_write_unlock(d1);
+	if (d1->d_inode == d2->d_inode)
+		au_rw_write_unlock(&au_di(d2)->di_rwsem);
+	else
+		di_write_unlock(d2);
+}
+
+/* ---------------------------------------------------------------------- */
+
+struct dentry *au_h_dptr(struct dentry *dentry, aufs_bindex_t bindex)
+{
+	struct dentry *d;
+
+	DiMustAnyLock(dentry);
+
+	if (au_dbstart(dentry) < 0 || bindex < au_dbstart(dentry))
+		return NULL;
+	AuDebugOn(bindex < 0);
+	d = au_di(dentry)->di_hdentry[0 + bindex].hd_dentry;
+	AuDebugOn(d && (atomic_read(&d->d_count) <= 0));
+	return d;
+}
+
+aufs_bindex_t au_dbtail(struct dentry *dentry)
+{
+	aufs_bindex_t bend, bwh;
+
+	bend = au_dbend(dentry);
+	if (0 <= bend) {
+		bwh = au_dbwh(dentry);
+		if (!bwh)
+			return bwh;
+		if (0 < bwh && bwh < bend)
+			return bwh - 1;
+	}
+	return bend;
+}
+
+aufs_bindex_t au_dbtaildir(struct dentry *dentry)
+{
+	aufs_bindex_t bend, bopq;
+
+	bend = au_dbtail(dentry);
+	if (0 <= bend) {
+		bopq = au_dbdiropq(dentry);
+		if (0 <= bopq && bopq < bend)
+			bend = bopq;
+	}
+	return bend;
+}
+
+/* ---------------------------------------------------------------------- */
+
+void au_set_h_dptr(struct dentry *dentry, aufs_bindex_t bindex,
+		   struct dentry *h_dentry)
+{
+	struct au_hdentry *hd = au_di(dentry)->di_hdentry + bindex;
+
+	DiMustWriteLock(dentry);
+
+	if (hd->hd_dentry)
+		au_hdput(hd);
+	hd->hd_dentry = h_dentry;
+}
+
+void au_update_digen(struct dentry *dentry)
+{
+	atomic_set(&au_di(dentry)->di_generation, au_sigen(dentry->d_sb));
+	/* smp_mb(); */ /* atomic_set */
+}
+
+void au_update_dbrange(struct dentry *dentry, int do_put_zero)
+{
+	struct au_dinfo *dinfo;
+	struct dentry *h_d;
+
+	DiMustWriteLock(dentry);
+
+	dinfo = au_di(dentry);
+	if (!dinfo || dinfo->di_bstart < 0)
+		return;
+
+	if (do_put_zero) {
+		aufs_bindex_t bindex, bend;
+
+		bend = dinfo->di_bend;
+		for (bindex = dinfo->di_bstart; bindex <= bend; bindex++) {
+			h_d = dinfo->di_hdentry[0 + bindex].hd_dentry;
+			if (h_d && !h_d->d_inode)
+				au_set_h_dptr(dentry, bindex, NULL);
+		}
+	}
+
+	dinfo->di_bstart = -1;
+	while (++dinfo->di_bstart <= dinfo->di_bend)
+		if (dinfo->di_hdentry[0 + dinfo->di_bstart].hd_dentry)
+			break;
+	if (dinfo->di_bstart > dinfo->di_bend) {
+		dinfo->di_bstart = -1;
+		dinfo->di_bend = -1;
+		return;
+	}
+
+	dinfo->di_bend++;
+	while (0 <= --dinfo->di_bend)
+		if (dinfo->di_hdentry[0 + dinfo->di_bend].hd_dentry)
+			break;
+	AuDebugOn(dinfo->di_bstart > dinfo->di_bend || dinfo->di_bend < 0);
+}
+
+void au_update_dbstart(struct dentry *dentry)
+{
+	aufs_bindex_t bindex, bend;
+	struct dentry *h_dentry;
+
+	bend = au_dbend(dentry);
+	for (bindex = au_dbstart(dentry); bindex <= bend; bindex++) {
+		h_dentry = au_h_dptr(dentry, bindex);
+		if (!h_dentry)
+			continue;
+		if (h_dentry->d_inode) {
+			au_set_dbstart(dentry, bindex);
+			return;
+		}
+		au_set_h_dptr(dentry, bindex, NULL);
+	}
+}
+
+void au_update_dbend(struct dentry *dentry)
+{
+	aufs_bindex_t bindex, bstart;
+	struct dentry *h_dentry;
+
+	bstart = au_dbstart(dentry);
+	for (bindex = au_dbend(dentry); bindex <= bstart; bindex--) {
+		h_dentry = au_h_dptr(dentry, bindex);
+		if (!h_dentry)
+			continue;
+		if (h_dentry->d_inode) {
+			au_set_dbend(dentry, bindex);
+			return;
+		}
+		au_set_h_dptr(dentry, bindex, NULL);
+	}
+}
+
+int au_find_dbindex(struct dentry *dentry, struct dentry *h_dentry)
+{
+	aufs_bindex_t bindex, bend;
+
+	bend = au_dbend(dentry);
+	for (bindex = au_dbstart(dentry); bindex <= bend; bindex++)
+		if (au_h_dptr(dentry, bindex) == h_dentry)
+			return bindex;
+	return -1;
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/loop.h
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/loop.h
@@ -0,0 +1,51 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * support for loopback mount as a branch
+ */
+
+#ifndef __AUFS_LOOP_H__
+#define __AUFS_LOOP_H__
+
+#ifdef __KERNEL__
+
+struct dentry;
+struct super_block;
+
+#ifdef CONFIG_AUFS_BDEV_LOOP
+/* loop.c */
+int au_test_loopback_overlap(struct super_block *sb, struct dentry *h_d1,
+			     struct dentry *h_d2);
+int au_test_loopback_kthread(void);
+#else
+static inline
+int au_test_loopback_overlap(struct super_block *sb, struct dentry *h_d1,
+			     struct dentry *h_d2)
+{
+	return 0;
+}
+
+static inline int au_test_loopback_kthread(void)
+{
+	return 0;
+}
+#endif /* BLK_DEV_LOOP */
+
+#endif /* __KERNEL__ */
+#endif /* __AUFS_LOOP_H__ */
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/Kconfig
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/Kconfig
@@ -0,0 +1,140 @@
+config AUFS_FS
+	tristate "Aufs (Advanced multi layered unification filesystem) support"
+	depends on EXPERIMENTAL
+	help
+	Aufs is a stackable unification filesystem such as Unionfs,
+	which unifies several directories and provides a merged single
+	directory.
+	In the early days, aufs was entirely re-designed and
+	re-implemented Unionfs Version 1.x series. Introducing many
+	original ideas, approaches and improvements, it becomes totally
+	different from Unionfs while keeping the basic features.
+
+if AUFS_FS
+choice
+	prompt "Maximum number of branches"
+	default AUFS_BRANCH_MAX_127
+	help
+	Specifies the maximum number of branches (or member directories)
+	in a single aufs. The larger value consumes more system
+	resources and has a minor impact to performance.
+config AUFS_BRANCH_MAX_127
+	bool "127"
+	help
+	Specifies the maximum number of branches (or member directories)
+	in a single aufs. The larger value consumes more system
+	resources and has a minor impact to performance.
+config AUFS_BRANCH_MAX_511
+	bool "511"
+	help
+	Specifies the maximum number of branches (or member directories)
+	in a single aufs. The larger value consumes more system
+	resources and has a minor impact to performance.
+config AUFS_BRANCH_MAX_1023
+	bool "1023"
+	help
+	Specifies the maximum number of branches (or member directories)
+	in a single aufs. The larger value consumes more system
+	resources and has a minor impact to performance.
+config AUFS_BRANCH_MAX_32767
+	bool "32767"
+	help
+	Specifies the maximum number of branches (or member directories)
+	in a single aufs. The larger value consumes more system
+	resources and has a minor impact to performance.
+endchoice
+
+config AUFS_HINOTIFY
+	bool "Use inotify to detect actions on a branch"
+	depends on INOTIFY
+	help
+	If you want to modify files on branches directly, eg. bypassing aufs,
+	and want aufs to detect the changes of them fully, then enable this
+	option and use 'udba=inotify' mount option.
+	It will have a negative impact to the performance.
+	See detail in aufs.5.
+
+config AUFS_EXPORT
+	bool "NFS-exportable aufs"
+	depends on (AUFS_FS = y && EXPORTFS = y) || (AUFS_FS = m && EXPORTFS)
+	help
+	If you want to export your mounted aufs via NFS, then enable this
+	option. There are several requirements for this configuration.
+	See detail in aufs.5.
+
+config AUFS_INO_T_64
+	bool
+	depends on AUFS_EXPORT
+	depends on 64BIT && !(ALPHA || S390)
+	default y
+	help
+	Automatic configuration for internal use.
+	/* typedef unsigned long/int __kernel_ino_t */
+	/* alpha and s390x are int */
+
+config AUFS_RDU
+	bool "Readdir in userspace"
+	help
+	If you have millions of files under a single aufs directory, and
+	meet the out of memory, then enable this option and set
+	environment variables for your readdir(3).
+	See detail in aufs.5.
+
+config AUFS_SHWH
+	bool "Show whiteouts"
+	help
+	If you want to make the whiteouts in aufs visible, then enable
+	this option and specify 'shwh' mount option. Although it may
+	sounds like philosophy or something, but in technically it
+	simply shows the name of whiteout with keeping its behaviour.
+
+config AUFS_BR_RAMFS
+	bool "Ramfs (initramfs/rootfs) as an aufs branch"
+	help
+	If you want to use ramfs as an aufs branch fs, then enable this
+	option. Generally tmpfs is recommended.
+	Aufs prohibited them to be a branch fs by default, because
+	initramfs becomes unusable after switch_root or something
+	generally. If you sets initramfs as an aufs branch and boot your
+	system by switch_root, you will meet a problem easily since the
+	files in initramfs may be inaccessible.
+	Unless you are going to use ramfs as an aufs branch fs without
+	switch_root or something, leave it N.
+
+config AUFS_BR_FUSE
+	bool "Fuse fs as an aufs branch"
+	depends on FUSE_FS
+	select AUFS_POLL
+	help
+	If you want to use fuse-based userspace filesystem as an aufs
+	branch fs, then enable this option.
+	It implements the internal poll(2) operation which is
+	implemented by fuse only (curretnly).
+
+config AUFS_POLL
+	bool
+	help
+	Automatic configuration for internal use.
+
+config AUFS_BDEV_LOOP
+	bool
+	depends on BLK_DEV_LOOP
+	default y
+	help
+	Automatic configuration for internal use.
+	Convert =[ym] into =y.
+
+config AUFS_DEBUG
+	bool "Debug aufs"
+	help
+	Enable this to compile aufs internal debug code.
+	It will have a negative impact to the performance.
+
+config AUFS_MAGIC_SYSRQ
+	bool
+	depends on AUFS_DEBUG && MAGIC_SYSRQ
+	default y
+	help
+	Automatic configuration for internal use.
+	When aufs supports Magic SysRq, enabled automatically.
+endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/debug.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/debug.c
@@ -0,0 +1,431 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * debug print functions
+ */
+
+#include <linux/module.h>
+#include <linux/vt_kern.h>
+#include "aufs.h"
+
+int aufs_debug;
+MODULE_PARM_DESC(debug, "debug print");
+module_param_named(debug, aufs_debug, int, S_IRUGO | S_IWUSR | S_IWGRP);
+
+char *au_plevel = KERN_DEBUG;
+#define dpri(fmt, ...) do { \
+	if (au_debug_test()) \
+		printk("%s" fmt, au_plevel, ##__VA_ARGS__); \
+} while (0)
+
+/* ---------------------------------------------------------------------- */
+
+void au_dpri_whlist(struct au_nhash *whlist)
+{
+	unsigned long ul, n;
+	struct hlist_head *head;
+	struct au_vdir_wh *tpos;
+	struct hlist_node *pos;
+
+	n = whlist->nh_num;
+	head = whlist->nh_head;
+	for (ul = 0; ul < n; ul++) {
+		hlist_for_each_entry(tpos, pos, head, wh_hash)
+			dpri("b%d, %.*s, %d\n",
+			     tpos->wh_bindex,
+			     tpos->wh_str.len, tpos->wh_str.name,
+			     tpos->wh_str.len);
+		head++;
+	}
+}
+
+void au_dpri_vdir(struct au_vdir *vdir)
+{
+	unsigned long ul;
+	union au_vdir_deblk_p p;
+	unsigned char *o;
+
+	if (!vdir || IS_ERR(vdir)) {
+		dpri("err %ld\n", PTR_ERR(vdir));
+		return;
+	}
+
+	dpri("deblk %u, nblk %lu, deblk %p, last{%lu, %p}, ver %lu\n",
+	     vdir->vd_deblk_sz, vdir->vd_nblk, vdir->vd_deblk,
+	     vdir->vd_last.ul, vdir->vd_last.p.deblk, vdir->vd_version);
+	for (ul = 0; ul < vdir->vd_nblk; ul++) {
+		p.deblk = vdir->vd_deblk[ul];
+		o = p.deblk;
+		dpri("[%lu]: %p\n", ul, o);
+	}
+}
+
+static int do_pri_inode(aufs_bindex_t bindex, struct inode *inode,
+			struct dentry *wh)
+{
+	char *n = NULL;
+	int l = 0;
+
+	if (!inode || IS_ERR(inode)) {
+		dpri("i%d: err %ld\n", bindex, PTR_ERR(inode));
+		return -1;
+	}
+
+	/* the type of i_blocks depends upon CONFIG_LSF */
+	BUILD_BUG_ON(sizeof(inode->i_blocks) != sizeof(unsigned long)
+		     && sizeof(inode->i_blocks) != sizeof(u64));
+	if (wh) {
+		n = (void *)wh->d_name.name;
+		l = wh->d_name.len;
+	}
+
+	dpri("i%d: i%lu, %s, cnt %d, nl %u, 0%o, sz %llu, blk %llu,"
+	     " ct %lld, np %lu, st 0x%lx, f 0x%x, g %x%s%.*s\n",
+	     bindex,
+	     inode->i_ino, inode->i_sb ? au_sbtype(inode->i_sb) : "??",
+	     atomic_read(&inode->i_count), inode->i_nlink, inode->i_mode,
+	     i_size_read(inode), (unsigned long long)inode->i_blocks,
+	     (long long)timespec_to_ns(&inode->i_ctime) & 0x0ffff,
+	     inode->i_mapping ? inode->i_mapping->nrpages : 0,
+	     inode->i_state, inode->i_flags, inode->i_generation,
+	     l ? ", wh " : "", l, n);
+	return 0;
+}
+
+void au_dpri_inode(struct inode *inode)
+{
+	struct au_iinfo *iinfo;
+	aufs_bindex_t bindex;
+	int err;
+
+	err = do_pri_inode(-1, inode, NULL);
+	if (err || !au_test_aufs(inode->i_sb))
+		return;
+
+	iinfo = au_ii(inode);
+	if (!iinfo)
+		return;
+	dpri("i-1: bstart %d, bend %d, gen %d\n",
+	     iinfo->ii_bstart, iinfo->ii_bend, au_iigen(inode));
+	if (iinfo->ii_bstart < 0)
+		return;
+	for (bindex = iinfo->ii_bstart; bindex <= iinfo->ii_bend; bindex++)
+		do_pri_inode(bindex, iinfo->ii_hinode[0 + bindex].hi_inode,
+			     iinfo->ii_hinode[0 + bindex].hi_whdentry);
+}
+
+static int do_pri_dentry(aufs_bindex_t bindex, struct dentry *dentry)
+{
+	struct dentry *wh = NULL;
+
+	if (!dentry || IS_ERR(dentry)) {
+		dpri("d%d: err %ld\n", bindex, PTR_ERR(dentry));
+		return -1;
+	}
+	/* do not call dget_parent() here */
+	dpri("d%d: %.*s?/%.*s, %s, cnt %d, flags 0x%x\n",
+	     bindex,
+	     AuDLNPair(dentry->d_parent), AuDLNPair(dentry),
+	     dentry->d_sb ? au_sbtype(dentry->d_sb) : "??",
+	     atomic_read(&dentry->d_count), dentry->d_flags);
+	if (bindex >= 0 && dentry->d_inode && au_test_aufs(dentry->d_sb)) {
+		struct au_iinfo *iinfo = au_ii(dentry->d_inode);
+		if (iinfo)
+			wh = iinfo->ii_hinode[0 + bindex].hi_whdentry;
+	}
+	do_pri_inode(bindex, dentry->d_inode, wh);
+	return 0;
+}
+
+void au_dpri_dentry(struct dentry *dentry)
+{
+	struct au_dinfo *dinfo;
+	aufs_bindex_t bindex;
+	int err;
+
+	err = do_pri_dentry(-1, dentry);
+	if (err || !au_test_aufs(dentry->d_sb))
+		return;
+
+	dinfo = au_di(dentry);
+	if (!dinfo)
+		return;
+	dpri("d-1: bstart %d, bend %d, bwh %d, bdiropq %d, gen %d\n",
+	     dinfo->di_bstart, dinfo->di_bend,
+	     dinfo->di_bwh, dinfo->di_bdiropq, au_digen(dentry));
+	if (dinfo->di_bstart < 0)
+		return;
+	for (bindex = dinfo->di_bstart; bindex <= dinfo->di_bend; bindex++)
+		do_pri_dentry(bindex, dinfo->di_hdentry[0 + bindex].hd_dentry);
+}
+
+static int do_pri_file(aufs_bindex_t bindex, struct file *file)
+{
+	char a[32];
+
+	if (!file || IS_ERR(file)) {
+		dpri("f%d: err %ld\n", bindex, PTR_ERR(file));
+		return -1;
+	}
+	a[0] = 0;
+	if (bindex < 0
+	    && file->f_dentry
+	    && au_test_aufs(file->f_dentry->d_sb)
+	    && au_fi(file))
+		snprintf(a, sizeof(a), ", mmapped %d", au_test_mmapped(file));
+	dpri("f%d: mode 0x%x, flags 0%o, cnt %ld, pos %llu%s\n",
+	     bindex, file->f_mode, file->f_flags, (long)file_count(file),
+	     file->f_pos, a);
+	if (file->f_dentry)
+		do_pri_dentry(bindex, file->f_dentry);
+	return 0;
+}
+
+void au_dpri_file(struct file *file)
+{
+	struct au_finfo *finfo;
+	aufs_bindex_t bindex;
+	int err;
+
+	err = do_pri_file(-1, file);
+	if (err || !file->f_dentry || !au_test_aufs(file->f_dentry->d_sb))
+		return;
+
+	finfo = au_fi(file);
+	if (!finfo)
+		return;
+	if (finfo->fi_bstart < 0)
+		return;
+	for (bindex = finfo->fi_bstart; bindex <= finfo->fi_bend; bindex++) {
+		struct au_hfile *hf;
+
+		hf = finfo->fi_hfile + bindex;
+		do_pri_file(bindex, hf ? hf->hf_file : NULL);
+	}
+}
+
+static int do_pri_br(aufs_bindex_t bindex, struct au_branch *br)
+{
+	struct vfsmount *mnt;
+	struct super_block *sb;
+
+	if (!br || IS_ERR(br))
+		goto out;
+	mnt = br->br_mnt;
+	if (!mnt || IS_ERR(mnt))
+		goto out;
+	sb = mnt->mnt_sb;
+	if (!sb || IS_ERR(sb))
+		goto out;
+
+	dpri("s%d: {perm 0x%x, cnt %d, wbr %p}, "
+	     "%s, dev 0x%02x%02x, flags 0x%lx, cnt(BIAS) %d, active %d, "
+	     "xino %d\n",
+	     bindex, br->br_perm, atomic_read(&br->br_count), br->br_wbr,
+	     au_sbtype(sb), MAJOR(sb->s_dev), MINOR(sb->s_dev),
+	     sb->s_flags, sb->s_count - S_BIAS,
+	     atomic_read(&sb->s_active), !!br->br_xino.xi_file);
+	return 0;
+
+ out:
+	dpri("s%d: err %ld\n", bindex, PTR_ERR(br));
+	return -1;
+}
+
+void au_dpri_sb(struct super_block *sb)
+{
+	struct au_sbinfo *sbinfo;
+	aufs_bindex_t bindex;
+	int err;
+	/* to reuduce stack size */
+	struct {
+		struct vfsmount mnt;
+		struct au_branch fake;
+	} *a;
+
+	/* this function can be called from magic sysrq */
+	a = kzalloc(sizeof(*a), GFP_ATOMIC);
+	if (unlikely(!a)) {
+		dpri("no memory\n");
+		return;
+	}
+
+	a->mnt.mnt_sb = sb;
+	a->fake.br_perm = 0;
+	a->fake.br_mnt = &a->mnt;
+	a->fake.br_xino.xi_file = NULL;
+	atomic_set(&a->fake.br_count, 0);
+	smp_mb(); /* atomic_set */
+	err = do_pri_br(-1, &a->fake);
+	kfree(a);
+	dpri("dev 0x%x\n", sb->s_dev);
+	if (err || !au_test_aufs(sb))
+		return;
+
+	sbinfo = au_sbi(sb);
+	if (!sbinfo)
+		return;
+	dpri("nw %d, gen %u, kobj %d\n",
+	     atomic_read(&sbinfo->si_nowait.nw_len), sbinfo->si_generation,
+	     atomic_read(&sbinfo->si_kobj.kref.refcount));
+	for (bindex = 0; bindex <= sbinfo->si_bend; bindex++)
+		do_pri_br(bindex, sbinfo->si_branch[0 + bindex]);
+}
+
+/* ---------------------------------------------------------------------- */
+
+void au_dbg_sleep_jiffy(int jiffy)
+{
+	while (jiffy)
+		jiffy = schedule_timeout_uninterruptible(jiffy);
+}
+
+void au_dbg_iattr(struct iattr *ia)
+{
+#define AuBit(name)	if (ia->ia_valid & ATTR_ ## name) \
+				dpri(#name "\n")
+	AuBit(MODE);
+	AuBit(UID);
+	AuBit(GID);
+	AuBit(SIZE);
+	AuBit(ATIME);
+	AuBit(MTIME);
+	AuBit(CTIME);
+	AuBit(ATIME_SET);
+	AuBit(MTIME_SET);
+	AuBit(FORCE);
+	AuBit(ATTR_FLAG);
+	AuBit(KILL_SUID);
+	AuBit(KILL_SGID);
+	AuBit(FILE);
+	AuBit(KILL_PRIV);
+	AuBit(OPEN);
+	AuBit(TIMES_SET);
+#undef	AuBit
+	dpri("ia_file %p\n", ia->ia_file);
+}
+
+/* ---------------------------------------------------------------------- */
+
+void au_dbg_verify_dir_parent(struct dentry *dentry, unsigned int sigen)
+{
+	struct dentry *parent;
+
+	parent = dget_parent(dentry);
+	AuDebugOn(!S_ISDIR(dentry->d_inode->i_mode)
+		  || IS_ROOT(dentry)
+		  || au_digen(parent) != sigen);
+	dput(parent);
+}
+
+void au_dbg_verify_nondir_parent(struct dentry *dentry, unsigned int sigen)
+{
+	struct dentry *parent;
+
+	parent = dget_parent(dentry);
+	AuDebugOn(S_ISDIR(dentry->d_inode->i_mode)
+		  || au_digen(parent) != sigen);
+	dput(parent);
+}
+
+void au_dbg_verify_gen(struct dentry *parent, unsigned int sigen)
+{
+	int err, i, j;
+	struct au_dcsub_pages dpages;
+	struct au_dpage *dpage;
+	struct dentry **dentries;
+
+	err = au_dpages_init(&dpages, GFP_NOFS);
+	AuDebugOn(err);
+	err = au_dcsub_pages_rev(&dpages, parent, /*do_include*/1, NULL, NULL);
+	AuDebugOn(err);
+	for (i = dpages.ndpage - 1; !err && i >= 0; i--) {
+		dpage = dpages.dpages + i;
+		dentries = dpage->dentries;
+		for (j = dpage->ndentry - 1; !err && j >= 0; j--)
+			AuDebugOn(au_digen(dentries[j]) != sigen);
+	}
+	au_dpages_free(&dpages);
+}
+
+void au_dbg_verify_hf(struct au_finfo *finfo)
+{
+	struct au_hfile *hf;
+	aufs_bindex_t bend, bindex;
+
+	if (finfo->fi_bstart >= 0) {
+		bend = finfo->fi_bend;
+		for (bindex = finfo->fi_bstart; bindex <= bend; bindex++) {
+			hf = finfo->fi_hfile + bindex;
+			AuDebugOn(hf->hf_file || hf->hf_br);
+		}
+	}
+}
+
+void au_dbg_verify_kthread(void)
+{
+	if (au_test_wkq(current)) {
+		au_dbg_blocked();
+		BUG();
+	}
+}
+
+/* ---------------------------------------------------------------------- */
+
+void au_debug_sbinfo_init(struct au_sbinfo *sbinfo __maybe_unused)
+{
+#ifdef AuForceNoPlink
+	au_opt_clr(sbinfo->si_mntflags, PLINK);
+#endif
+#ifdef AuForceNoXino
+	au_opt_clr(sbinfo->si_mntflags, XINO);
+#endif
+#ifdef AuForceNoRefrof
+	au_opt_clr(sbinfo->si_mntflags, REFROF);
+#endif
+#ifdef AuForceHinotify
+	au_opt_set_udba(sbinfo->si_mntflags, UDBA_HINOTIFY);
+#endif
+#ifdef AuForceRd0
+	sbinfo->si_rdblk = 0;
+	sbinfo->si_rdhash = 0;
+#endif
+}
+
+int __init au_debug_init(void)
+{
+	aufs_bindex_t bindex;
+	struct au_vdir_destr destr;
+
+	bindex = -1;
+	AuDebugOn(bindex >= 0);
+
+	destr.len = -1;
+	AuDebugOn(destr.len < NAME_MAX);
+
+#ifdef CONFIG_4KSTACKS
+	pr_warning("CONFIG_4KSTACKS is defined.\n");
+#endif
+
+#ifdef AuForceNoBrs
+	sysaufs_brs = 0;
+#endif
+
+	return 0;
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/BOM
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/BOM
@@ -0,0 +1,12 @@
+Git Tree:      http://git.c3sl.ufpr.br/pub/scm/aufs/aufs2-standalone.git
+Git Branch:    aufs2 (86695db9a39ac200a441f8ff0ddd0bb24005238d)
+
+This standalone snapshot was built from the commit below in the main
+aufs2-2.6.git tree (http://git.c3sl.ufpr.br/pub/scm/aufs/aufs2-2.6.git):
+
+    commit 2a119c29c8bb5f9953d2866450e5fe13ea88520f
+    Author: J. R. Okajima <hooanon05@yahoo.co.jp>
+    Date:   Sat Dec 5 11:05:06 2009 +0900
+
+	aufs: tiny, a note about pathconf(3) wrapper
+
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/xino.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/xino.c
@@ -0,0 +1,1204 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * external inode number translation table and bitmap
+ */
+
+#include <linux/file.h>
+#include <linux/seq_file.h>
+#include <linux/uaccess.h>
+#include "aufs.h"
+
+ssize_t xino_fread(au_readf_t func, struct file *file, void *buf, size_t size,
+		   loff_t *pos)
+{
+	ssize_t err;
+	mm_segment_t oldfs;
+
+	oldfs = get_fs();
+	set_fs(KERNEL_DS);
+	do {
+		/* todo: signal_pending? */
+		err = func(file, (char __user *)buf, size, pos);
+	} while (err == -EAGAIN || err == -EINTR);
+	set_fs(oldfs);
+
+#if 0 /* reserved for future use */
+	if (err > 0)
+		fsnotify_access(file->f_dentry);
+#endif
+
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static ssize_t do_xino_fwrite(au_writef_t func, struct file *file, void *buf,
+			      size_t size, loff_t *pos)
+{
+	ssize_t err;
+	mm_segment_t oldfs;
+
+	oldfs = get_fs();
+	set_fs(KERNEL_DS);
+	/* lockdep_off(); */
+	do {
+		/* todo: signal_pending? */
+		err = func(file, (const char __user *)buf, size, pos);
+	} while (err == -EAGAIN || err == -EINTR);
+	/* lockdep_on(); */
+	set_fs(oldfs);
+
+#if 0 /* reserved for future use */
+	if (err > 0)
+		fsnotify_modify(file->f_dentry);
+#endif
+
+	return err;
+}
+
+struct do_xino_fwrite_args {
+	ssize_t *errp;
+	au_writef_t func;
+	struct file *file;
+	void *buf;
+	size_t size;
+	loff_t *pos;
+};
+
+static void call_do_xino_fwrite(void *args)
+{
+	struct do_xino_fwrite_args *a = args;
+	*a->errp = do_xino_fwrite(a->func, a->file, a->buf, a->size, a->pos);
+}
+
+ssize_t xino_fwrite(au_writef_t func, struct file *file, void *buf, size_t size,
+		    loff_t *pos)
+{
+	ssize_t err;
+
+	/* todo: signal block and no wkq? */
+	/* todo: new credential scheme */
+	/*
+	 * it breaks RLIMIT_FSIZE and normal user's limit,
+	 * users should care about quota and real 'filesystem full.'
+	 */
+	if (!au_test_wkq(current)) {
+		int wkq_err;
+		struct do_xino_fwrite_args args = {
+			.errp	= &err,
+			.func	= func,
+			.file	= file,
+			.buf	= buf,
+			.size	= size,
+			.pos	= pos
+		};
+
+		wkq_err = au_wkq_wait(call_do_xino_fwrite, &args);
+		if (unlikely(wkq_err))
+			err = wkq_err;
+	} else
+		err = do_xino_fwrite(func, file, buf, size, pos);
+
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/*
+ * create a new xinofile at the same place/path as @base_file.
+ */
+struct file *au_xino_create2(struct file *base_file, struct file *copy_src)
+{
+	struct file *file;
+	struct dentry *base, *dentry, *parent;
+	struct inode *dir;
+	struct qstr *name;
+	int err;
+	struct path path;
+
+	base = base_file->f_dentry;
+	parent = base->d_parent; /* dir inode is locked */
+	dir = parent->d_inode;
+	IMustLock(dir);
+
+	file = ERR_PTR(-EINVAL);
+	name = &base->d_name;
+	dentry = vfsub_lookup_one_len(name->name, parent, name->len);
+	if (IS_ERR(dentry)) {
+		file = (void *)dentry;
+		pr_err("%.*s lookup err %ld\n",
+		       AuLNPair(name), PTR_ERR(dentry));
+		goto out;
+	}
+
+	/* no need to mnt_want_write() since we call dentry_open() later */
+	err = vfs_create(dir, dentry, S_IRUGO | S_IWUGO, NULL);
+	if (unlikely(err)) {
+		file = ERR_PTR(err);
+		pr_err("%.*s create err %d\n", AuLNPair(name), err);
+		goto out_dput;
+	}
+
+	path.dentry = dentry;
+	path.mnt = base_file->f_vfsmnt;
+	path_get(&path);
+	file = vfsub_dentry_open(&path, O_RDWR | O_CREAT | O_EXCL | O_LARGEFILE,
+				 current_cred());
+	if (IS_ERR(file)) {
+		pr_err("%.*s open err %ld\n", AuLNPair(name), PTR_ERR(file));
+		goto out_dput;
+	}
+
+	err = vfsub_unlink(dir, &file->f_path, /*force*/0);
+	if (unlikely(err)) {
+		pr_err("%.*s unlink err %d\n", AuLNPair(name), err);
+		goto out_fput;
+	}
+
+	if (copy_src) {
+		/* no one can touch copy_src xino */
+		err = au_copy_file(file, copy_src,
+				   i_size_read(copy_src->f_dentry->d_inode));
+		if (unlikely(err)) {
+			pr_err("%.*s copy err %d\n", AuLNPair(name), err);
+			goto out_fput;
+		}
+	}
+	goto out_dput; /* success */
+
+ out_fput:
+	fput(file);
+	file = ERR_PTR(err);
+ out_dput:
+	dput(dentry);
+ out:
+	return file;
+}
+
+struct au_xino_lock_dir {
+	struct au_hinode *hdir;
+	struct dentry *parent;
+	struct mutex *mtx;
+};
+
+static void au_xino_lock_dir(struct super_block *sb, struct file *xino,
+			     struct au_xino_lock_dir *ldir)
+{
+	aufs_bindex_t brid, bindex;
+
+	ldir->hdir = NULL;
+	bindex = -1;
+	brid = au_xino_brid(sb);
+	if (brid >= 0)
+		bindex = au_br_index(sb, brid);
+	if (bindex >= 0) {
+		ldir->hdir = au_hi(sb->s_root->d_inode, bindex);
+		au_hin_imtx_lock_nested(ldir->hdir, AuLsc_I_PARENT);
+	} else {
+		ldir->parent = dget_parent(xino->f_dentry);
+		ldir->mtx = &ldir->parent->d_inode->i_mutex;
+		mutex_lock_nested(ldir->mtx, AuLsc_I_PARENT);
+	}
+}
+
+static void au_xino_unlock_dir(struct au_xino_lock_dir *ldir)
+{
+	if (ldir->hdir)
+		au_hin_imtx_unlock(ldir->hdir);
+	else {
+		mutex_unlock(ldir->mtx);
+		dput(ldir->parent);
+	}
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* trucate xino files asynchronously */
+
+int au_xino_trunc(struct super_block *sb, aufs_bindex_t bindex)
+{
+	int err;
+	aufs_bindex_t bi, bend;
+	struct au_branch *br;
+	struct file *new_xino, *file;
+	struct super_block *h_sb;
+	struct au_xino_lock_dir ldir;
+
+	err = -EINVAL;
+	bend = au_sbend(sb);
+	if (unlikely(bindex < 0 || bend < bindex))
+		goto out;
+	br = au_sbr(sb, bindex);
+	file = br->br_xino.xi_file;
+	if (!file)
+		goto out;
+
+	au_xino_lock_dir(sb, file, &ldir);
+	/* mnt_want_write() is unnecessary here */
+	new_xino = au_xino_create2(file, file);
+	au_xino_unlock_dir(&ldir);
+	err = PTR_ERR(new_xino);
+	if (IS_ERR(new_xino))
+		goto out;
+	err = 0;
+	fput(file);
+	br->br_xino.xi_file = new_xino;
+
+	h_sb = br->br_mnt->mnt_sb;
+	for (bi = 0; bi <= bend; bi++) {
+		if (unlikely(bi == bindex))
+			continue;
+		br = au_sbr(sb, bi);
+		if (br->br_mnt->mnt_sb != h_sb)
+			continue;
+
+		fput(br->br_xino.xi_file);
+		br->br_xino.xi_file = new_xino;
+		get_file(new_xino);
+	}
+
+ out:
+	return err;
+}
+
+struct xino_do_trunc_args {
+	struct super_block *sb;
+	struct au_branch *br;
+};
+
+static void xino_do_trunc(void *_args)
+{
+	struct xino_do_trunc_args *args = _args;
+	struct super_block *sb;
+	struct au_branch *br;
+	struct inode *dir;
+	int err;
+	aufs_bindex_t bindex;
+
+	err = 0;
+	sb = args->sb;
+	dir = sb->s_root->d_inode;
+	br = args->br;
+
+	si_noflush_write_lock(sb);
+	ii_read_lock_parent(dir);
+	bindex = au_br_index(sb, br->br_id);
+	err = au_xino_trunc(sb, bindex);
+	if (!err
+	    && br->br_xino.xi_file->f_dentry->d_inode->i_blocks
+	    >= br->br_xino_upper)
+		br->br_xino_upper += AUFS_XINO_TRUNC_STEP;
+
+	ii_read_unlock(dir);
+	if (unlikely(err))
+		pr_warning("err b%d, (%d)\n", bindex, err);
+	atomic_dec(&br->br_xino_running);
+	atomic_dec(&br->br_count);
+	au_nwt_done(&au_sbi(sb)->si_nowait);
+	si_write_unlock(sb);
+	kfree(args);
+}
+
+static void xino_try_trunc(struct super_block *sb, struct au_branch *br)
+{
+	struct xino_do_trunc_args *args;
+	int wkq_err;
+
+	if (br->br_xino.xi_file->f_dentry->d_inode->i_blocks
+	    < br->br_xino_upper)
+		return;
+
+	if (atomic_inc_return(&br->br_xino_running) > 1)
+		goto out;
+
+	/* lock and kfree() will be called in trunc_xino() */
+	args = kmalloc(sizeof(*args), GFP_NOFS);
+	if (unlikely(!args)) {
+		AuErr1("no memory\n");
+		goto out_args;
+	}
+
+	atomic_inc_return(&br->br_count);
+	args->sb = sb;
+	args->br = br;
+	wkq_err = au_wkq_nowait(xino_do_trunc, args, sb);
+	if (!wkq_err)
+		return; /* success */
+
+	pr_err("wkq %d\n", wkq_err);
+	atomic_dec_return(&br->br_count);
+
+ out_args:
+	kfree(args);
+ out:
+	atomic_dec_return(&br->br_xino_running);
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int au_xino_do_write(au_writef_t write, struct file *file,
+			    ino_t h_ino, ino_t ino)
+{
+	loff_t pos;
+	ssize_t sz;
+
+	pos = h_ino;
+	if (unlikely(au_loff_max / sizeof(ino) - 1 < pos)) {
+		AuIOErr1("too large hi%lu\n", (unsigned long)h_ino);
+		return -EFBIG;
+	}
+	pos *= sizeof(ino);
+	sz = xino_fwrite(write, file, &ino, sizeof(ino), &pos);
+	if (sz == sizeof(ino))
+		return 0; /* success */
+
+	AuIOErr("write failed (%zd)\n", sz);
+	return -EIO;
+}
+
+/*
+ * write @ino to the xinofile for the specified branch{@sb, @bindex}
+ * at the position of @h_ino.
+ * even if @ino is zero, it is written to the xinofile and means no entry.
+ * if the size of the xino file on a specific filesystem exceeds the watermark,
+ * try truncating it.
+ */
+int au_xino_write(struct super_block *sb, aufs_bindex_t bindex, ino_t h_ino,
+		  ino_t ino)
+{
+	int err;
+	unsigned int mnt_flags;
+	struct au_branch *br;
+
+	BUILD_BUG_ON(sizeof(long long) != sizeof(au_loff_max)
+		     || ((loff_t)-1) > 0);
+	SiMustAnyLock(sb);
+
+	mnt_flags = au_mntflags(sb);
+	if (!au_opt_test(mnt_flags, XINO))
+		return 0;
+
+	br = au_sbr(sb, bindex);
+	err = au_xino_do_write(au_sbi(sb)->si_xwrite, br->br_xino.xi_file,
+			       h_ino, ino);
+	if (!err) {
+		if (au_opt_test(mnt_flags, TRUNC_XINO)
+		    && au_test_fs_trunc_xino(br->br_mnt->mnt_sb))
+			xino_try_trunc(sb, br);
+		return 0; /* success */
+	}
+
+	AuIOErr("write failed (%d)\n", err);
+	return -EIO;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* aufs inode number bitmap */
+
+static const int page_bits = (int)PAGE_SIZE * BITS_PER_BYTE;
+static ino_t xib_calc_ino(unsigned long pindex, int bit)
+{
+	ino_t ino;
+
+	AuDebugOn(bit < 0 || page_bits <= bit);
+	ino = AUFS_FIRST_INO + pindex * page_bits + bit;
+	return ino;
+}
+
+static void xib_calc_bit(ino_t ino, unsigned long *pindex, int *bit)
+{
+	AuDebugOn(ino < AUFS_FIRST_INO);
+	ino -= AUFS_FIRST_INO;
+	*pindex = ino / page_bits;
+	*bit = ino % page_bits;
+}
+
+static int xib_pindex(struct super_block *sb, unsigned long pindex)
+{
+	int err;
+	loff_t pos;
+	ssize_t sz;
+	struct au_sbinfo *sbinfo;
+	struct file *xib;
+	unsigned long *p;
+
+	sbinfo = au_sbi(sb);
+	MtxMustLock(&sbinfo->si_xib_mtx);
+	AuDebugOn(pindex > ULONG_MAX / PAGE_SIZE
+		  || !au_opt_test(sbinfo->si_mntflags, XINO));
+
+	if (pindex == sbinfo->si_xib_last_pindex)
+		return 0;
+
+	xib = sbinfo->si_xib;
+	p = sbinfo->si_xib_buf;
+	pos = sbinfo->si_xib_last_pindex;
+	pos *= PAGE_SIZE;
+	sz = xino_fwrite(sbinfo->si_xwrite, xib, p, PAGE_SIZE, &pos);
+	if (unlikely(sz != PAGE_SIZE))
+		goto out;
+
+	pos = pindex;
+	pos *= PAGE_SIZE;
+	if (i_size_read(xib->f_dentry->d_inode) >= pos + PAGE_SIZE)
+		sz = xino_fread(sbinfo->si_xread, xib, p, PAGE_SIZE, &pos);
+	else {
+		memset(p, 0, PAGE_SIZE);
+		sz = xino_fwrite(sbinfo->si_xwrite, xib, p, PAGE_SIZE, &pos);
+	}
+	if (sz == PAGE_SIZE) {
+		sbinfo->si_xib_last_pindex = pindex;
+		return 0; /* success */
+	}
+
+ out:
+	AuIOErr1("write failed (%zd)\n", sz);
+	err = sz;
+	if (sz >= 0)
+		err = -EIO;
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+int au_xino_write0(struct super_block *sb, aufs_bindex_t bindex, ino_t h_ino,
+		   ino_t ino)
+{
+	int err, bit;
+	unsigned long pindex;
+	struct au_sbinfo *sbinfo;
+
+	if (!au_opt_test(au_mntflags(sb), XINO))
+		return 0;
+
+	err = 0;
+	if (ino) {
+		sbinfo = au_sbi(sb);
+		xib_calc_bit(ino, &pindex, &bit);
+		AuDebugOn(page_bits <= bit);
+		mutex_lock(&sbinfo->si_xib_mtx);
+		err = xib_pindex(sb, pindex);
+		if (!err) {
+			clear_bit(bit, sbinfo->si_xib_buf);
+			sbinfo->si_xib_next_bit = bit;
+		}
+		mutex_unlock(&sbinfo->si_xib_mtx);
+	}
+
+	if (!err)
+		err = au_xino_write(sb, bindex, h_ino, 0);
+	return err;
+}
+
+/* get an unused inode number from bitmap */
+ino_t au_xino_new_ino(struct super_block *sb)
+{
+	ino_t ino;
+	unsigned long *p, pindex, ul, pend;
+	struct au_sbinfo *sbinfo;
+	struct file *file;
+	int free_bit, err;
+
+	if (!au_opt_test(au_mntflags(sb), XINO))
+		return iunique(sb, AUFS_FIRST_INO);
+
+	sbinfo = au_sbi(sb);
+	mutex_lock(&sbinfo->si_xib_mtx);
+	p = sbinfo->si_xib_buf;
+	free_bit = sbinfo->si_xib_next_bit;
+	if (free_bit < page_bits && !test_bit(free_bit, p))
+		goto out; /* success */
+	free_bit = find_first_zero_bit(p, page_bits);
+	if (free_bit < page_bits)
+		goto out; /* success */
+
+	pindex = sbinfo->si_xib_last_pindex;
+	for (ul = pindex - 1; ul < ULONG_MAX; ul--) {
+		err = xib_pindex(sb, ul);
+		if (unlikely(err))
+			goto out_err;
+		free_bit = find_first_zero_bit(p, page_bits);
+		if (free_bit < page_bits)
+			goto out; /* success */
+	}
+
+	file = sbinfo->si_xib;
+	pend = i_size_read(file->f_dentry->d_inode) / PAGE_SIZE;
+	for (ul = pindex + 1; ul <= pend; ul++) {
+		err = xib_pindex(sb, ul);
+		if (unlikely(err))
+			goto out_err;
+		free_bit = find_first_zero_bit(p, page_bits);
+		if (free_bit < page_bits)
+			goto out; /* success */
+	}
+	BUG();
+
+ out:
+	set_bit(free_bit, p);
+	sbinfo->si_xib_next_bit++;
+	pindex = sbinfo->si_xib_last_pindex;
+	mutex_unlock(&sbinfo->si_xib_mtx);
+	ino = xib_calc_ino(pindex, free_bit);
+	AuDbg("i%lu\n", (unsigned long)ino);
+	return ino;
+ out_err:
+	mutex_unlock(&sbinfo->si_xib_mtx);
+	AuDbg("i0\n");
+	return 0;
+}
+
+/*
+ * read @ino from xinofile for the specified branch{@sb, @bindex}
+ * at the position of @h_ino.
+ * if @ino does not exist and @do_new is true, get new one.
+ */
+int au_xino_read(struct super_block *sb, aufs_bindex_t bindex, ino_t h_ino,
+		 ino_t *ino)
+{
+	int err;
+	ssize_t sz;
+	loff_t pos;
+	struct file *file;
+	struct au_sbinfo *sbinfo;
+
+	*ino = 0;
+	if (!au_opt_test(au_mntflags(sb), XINO))
+		return 0; /* no xino */
+
+	err = 0;
+	sbinfo = au_sbi(sb);
+	pos = h_ino;
+	if (unlikely(au_loff_max / sizeof(*ino) - 1 < pos)) {
+		AuIOErr1("too large hi%lu\n", (unsigned long)h_ino);
+		return -EFBIG;
+	}
+	pos *= sizeof(*ino);
+
+	file = au_sbr(sb, bindex)->br_xino.xi_file;
+	if (i_size_read(file->f_dentry->d_inode) < pos + sizeof(*ino))
+		return 0; /* no ino */
+
+	sz = xino_fread(sbinfo->si_xread, file, ino, sizeof(*ino), &pos);
+	if (sz == sizeof(*ino))
+		return 0; /* success */
+
+	err = sz;
+	if (unlikely(sz >= 0)) {
+		err = -EIO;
+		AuIOErr("xino read error (%zd)\n", sz);
+	}
+
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* create and set a new xino file */
+
+struct file *au_xino_create(struct super_block *sb, char *fname, int silent)
+{
+	struct file *file;
+	struct dentry *h_parent, *d;
+	struct inode *h_dir;
+	int err;
+
+	/*
+	 * at mount-time, and the xino file is the default path,
+	 * hinotify is disabled so we have no inotify events to ignore.
+	 * when a user specified the xino, we cannot get au_hdir to be ignored.
+	 */
+	file = vfsub_filp_open(fname, O_RDWR | O_CREAT | O_EXCL | O_LARGEFILE,
+			       S_IRUGO | S_IWUGO);
+	if (IS_ERR(file)) {
+		if (!silent)
+			pr_err("open %s(%ld)\n", fname, PTR_ERR(file));
+		return file;
+	}
+
+	/* keep file count */
+	h_parent = dget_parent(file->f_dentry);
+	h_dir = h_parent->d_inode;
+	mutex_lock_nested(&h_dir->i_mutex, AuLsc_I_PARENT);
+	/* mnt_want_write() is unnecessary here */
+	err = vfsub_unlink(h_dir, &file->f_path, /*force*/0);
+	mutex_unlock(&h_dir->i_mutex);
+	dput(h_parent);
+	if (unlikely(err)) {
+		if (!silent)
+			pr_err("unlink %s(%d)\n", fname, err);
+		goto out;
+	}
+
+	err = -EINVAL;
+	d = file->f_dentry;
+	if (unlikely(sb == d->d_sb)) {
+		if (!silent)
+			pr_err("%s must be outside\n", fname);
+		goto out;
+	}
+	if (unlikely(au_test_fs_bad_xino(d->d_sb))) {
+		if (!silent)
+			pr_err("xino doesn't support %s(%s)\n",
+			       fname, au_sbtype(d->d_sb));
+		goto out;
+	}
+	return file; /* success */
+
+ out:
+	fput(file);
+	file = ERR_PTR(err);
+	return file;
+}
+
+/*
+ * find another branch who is on the same filesystem of the specified
+ * branch{@btgt}. search until @bend.
+ */
+static int is_sb_shared(struct super_block *sb, aufs_bindex_t btgt,
+			aufs_bindex_t bend)
+{
+	aufs_bindex_t bindex;
+	struct super_block *tgt_sb = au_sbr_sb(sb, btgt);
+
+	for (bindex = 0; bindex < btgt; bindex++)
+		if (unlikely(tgt_sb == au_sbr_sb(sb, bindex)))
+			return bindex;
+	for (bindex++; bindex <= bend; bindex++)
+		if (unlikely(tgt_sb == au_sbr_sb(sb, bindex)))
+			return bindex;
+	return -1;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/*
+ * initialize the xinofile for the specified branch @br
+ * at the place/path where @base_file indicates.
+ * test whether another branch is on the same filesystem or not,
+ * if @do_test is true.
+ */
+int au_xino_br(struct super_block *sb, struct au_branch *br, ino_t h_ino,
+	       struct file *base_file, int do_test)
+{
+	int err;
+	ino_t ino;
+	aufs_bindex_t bend, bindex;
+	struct au_branch *shared_br, *b;
+	struct file *file;
+	struct super_block *tgt_sb;
+
+	shared_br = NULL;
+	bend = au_sbend(sb);
+	if (do_test) {
+		tgt_sb = br->br_mnt->mnt_sb;
+		for (bindex = 0; bindex <= bend; bindex++) {
+			b = au_sbr(sb, bindex);
+			if (tgt_sb == b->br_mnt->mnt_sb) {
+				shared_br = b;
+				break;
+			}
+		}
+	}
+
+	if (!shared_br || !shared_br->br_xino.xi_file) {
+		struct au_xino_lock_dir ldir;
+
+		au_xino_lock_dir(sb, base_file, &ldir);
+		/* mnt_want_write() is unnecessary here */
+		file = au_xino_create2(base_file, NULL);
+		au_xino_unlock_dir(&ldir);
+		err = PTR_ERR(file);
+		if (IS_ERR(file))
+			goto out;
+		br->br_xino.xi_file = file;
+	} else {
+		br->br_xino.xi_file = shared_br->br_xino.xi_file;
+		get_file(br->br_xino.xi_file);
+	}
+
+	ino = AUFS_ROOT_INO;
+	err = au_xino_do_write(au_sbi(sb)->si_xwrite, br->br_xino.xi_file,
+			       h_ino, ino);
+	if (!err)
+		return 0; /* success */
+
+
+ out:
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* trucate a xino bitmap file */
+
+/* todo: slow */
+static int do_xib_restore(struct super_block *sb, struct file *file, void *page)
+{
+	int err, bit;
+	ssize_t sz;
+	unsigned long pindex;
+	loff_t pos, pend;
+	struct au_sbinfo *sbinfo;
+	au_readf_t func;
+	ino_t *ino;
+	unsigned long *p;
+
+	err = 0;
+	sbinfo = au_sbi(sb);
+	MtxMustLock(&sbinfo->si_xib_mtx);
+	p = sbinfo->si_xib_buf;
+	func = sbinfo->si_xread;
+	pend = i_size_read(file->f_dentry->d_inode);
+	pos = 0;
+	while (pos < pend) {
+		sz = xino_fread(func, file, page, PAGE_SIZE, &pos);
+		err = sz;
+		if (unlikely(sz <= 0))
+			goto out;
+
+		err = 0;
+		for (ino = page; sz > 0; ino++, sz -= sizeof(ino)) {
+			if (unlikely(*ino < AUFS_FIRST_INO))
+				continue;
+
+			xib_calc_bit(*ino, &pindex, &bit);
+			AuDebugOn(page_bits <= bit);
+			err = xib_pindex(sb, pindex);
+			if (!err)
+				set_bit(bit, p);
+			else
+				goto out;
+		}
+	}
+
+ out:
+	return err;
+}
+
+static int xib_restore(struct super_block *sb)
+{
+	int err;
+	aufs_bindex_t bindex, bend;
+	void *page;
+
+	err = -ENOMEM;
+	page = (void *)__get_free_page(GFP_NOFS);
+	if (unlikely(!page))
+		goto out;
+
+	err = 0;
+	bend = au_sbend(sb);
+	for (bindex = 0; !err && bindex <= bend; bindex++)
+		if (!bindex || is_sb_shared(sb, bindex, bindex - 1) < 0)
+			err = do_xib_restore
+				(sb, au_sbr(sb, bindex)->br_xino.xi_file, page);
+		else
+			AuDbg("b%d\n", bindex);
+	free_page((unsigned long)page);
+
+ out:
+	return err;
+}
+
+int au_xib_trunc(struct super_block *sb)
+{
+	int err;
+	ssize_t sz;
+	loff_t pos;
+	struct au_xino_lock_dir ldir;
+	struct au_sbinfo *sbinfo;
+	unsigned long *p;
+	struct file *file;
+
+	SiMustWriteLock(sb);
+
+	err = 0;
+	sbinfo = au_sbi(sb);
+	if (!au_opt_test(sbinfo->si_mntflags, XINO))
+		goto out;
+
+	file = sbinfo->si_xib;
+	if (i_size_read(file->f_dentry->d_inode) <= PAGE_SIZE)
+		goto out;
+
+	au_xino_lock_dir(sb, file, &ldir);
+	/* mnt_want_write() is unnecessary here */
+	file = au_xino_create2(sbinfo->si_xib, NULL);
+	au_xino_unlock_dir(&ldir);
+	err = PTR_ERR(file);
+	if (IS_ERR(file))
+		goto out;
+	fput(sbinfo->si_xib);
+	sbinfo->si_xib = file;
+
+	p = sbinfo->si_xib_buf;
+	memset(p, 0, PAGE_SIZE);
+	pos = 0;
+	sz = xino_fwrite(sbinfo->si_xwrite, sbinfo->si_xib, p, PAGE_SIZE, &pos);
+	if (unlikely(sz != PAGE_SIZE)) {
+		err = sz;
+		AuIOErr("err %d\n", err);
+		if (sz >= 0)
+			err = -EIO;
+		goto out;
+	}
+
+	mutex_lock(&sbinfo->si_xib_mtx);
+	/* mnt_want_write() is unnecessary here */
+	err = xib_restore(sb);
+	mutex_unlock(&sbinfo->si_xib_mtx);
+
+out:
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/*
+ * xino mount option handlers
+ */
+static au_readf_t find_readf(struct file *h_file)
+{
+	const struct file_operations *fop = h_file->f_op;
+
+	if (fop) {
+		if (fop->read)
+			return fop->read;
+		if (fop->aio_read)
+			return do_sync_read;
+	}
+	return ERR_PTR(-ENOSYS);
+}
+
+static au_writef_t find_writef(struct file *h_file)
+{
+	const struct file_operations *fop = h_file->f_op;
+
+	if (fop) {
+		if (fop->write)
+			return fop->write;
+		if (fop->aio_write)
+			return do_sync_write;
+	}
+	return ERR_PTR(-ENOSYS);
+}
+
+/* xino bitmap */
+static void xino_clear_xib(struct super_block *sb)
+{
+	struct au_sbinfo *sbinfo;
+
+	SiMustWriteLock(sb);
+
+	sbinfo = au_sbi(sb);
+	sbinfo->si_xread = NULL;
+	sbinfo->si_xwrite = NULL;
+	if (sbinfo->si_xib)
+		fput(sbinfo->si_xib);
+	sbinfo->si_xib = NULL;
+	free_page((unsigned long)sbinfo->si_xib_buf);
+	sbinfo->si_xib_buf = NULL;
+}
+
+static int au_xino_set_xib(struct super_block *sb, struct file *base)
+{
+	int err;
+	loff_t pos;
+	struct au_sbinfo *sbinfo;
+	struct file *file;
+
+	SiMustWriteLock(sb);
+
+	sbinfo = au_sbi(sb);
+	file = au_xino_create2(base, sbinfo->si_xib);
+	err = PTR_ERR(file);
+	if (IS_ERR(file))
+		goto out;
+	if (sbinfo->si_xib)
+		fput(sbinfo->si_xib);
+	sbinfo->si_xib = file;
+	sbinfo->si_xread = find_readf(file);
+	sbinfo->si_xwrite = find_writef(file);
+
+	err = -ENOMEM;
+	if (!sbinfo->si_xib_buf)
+		sbinfo->si_xib_buf = (void *)get_zeroed_page(GFP_NOFS);
+	if (unlikely(!sbinfo->si_xib_buf))
+		goto out_unset;
+
+	sbinfo->si_xib_last_pindex = 0;
+	sbinfo->si_xib_next_bit = 0;
+	if (i_size_read(file->f_dentry->d_inode) < PAGE_SIZE) {
+		pos = 0;
+		err = xino_fwrite(sbinfo->si_xwrite, file, sbinfo->si_xib_buf,
+				  PAGE_SIZE, &pos);
+		if (unlikely(err != PAGE_SIZE))
+			goto out_free;
+	}
+	err = 0;
+	goto out; /* success */
+
+ out_free:
+	free_page((unsigned long)sbinfo->si_xib_buf);
+	sbinfo->si_xib_buf = NULL;
+	if (err >= 0)
+		err = -EIO;
+ out_unset:
+	fput(sbinfo->si_xib);
+	sbinfo->si_xib = NULL;
+	sbinfo->si_xread = NULL;
+	sbinfo->si_xwrite = NULL;
+ out:
+	return err;
+}
+
+/* xino for each branch */
+static void xino_clear_br(struct super_block *sb)
+{
+	aufs_bindex_t bindex, bend;
+	struct au_branch *br;
+
+	bend = au_sbend(sb);
+	for (bindex = 0; bindex <= bend; bindex++) {
+		br = au_sbr(sb, bindex);
+		if (!br || !br->br_xino.xi_file)
+			continue;
+
+		fput(br->br_xino.xi_file);
+		br->br_xino.xi_file = NULL;
+	}
+}
+
+static int au_xino_set_br(struct super_block *sb, struct file *base)
+{
+	int err;
+	ino_t ino;
+	aufs_bindex_t bindex, bend, bshared;
+	struct {
+		struct file *old, *new;
+	} *fpair, *p;
+	struct au_branch *br;
+	struct inode *inode;
+	au_writef_t writef;
+
+	SiMustWriteLock(sb);
+
+	err = -ENOMEM;
+	bend = au_sbend(sb);
+	fpair = kcalloc(bend + 1, sizeof(*fpair), GFP_NOFS);
+	if (unlikely(!fpair))
+		goto out;
+
+	inode = sb->s_root->d_inode;
+	ino = AUFS_ROOT_INO;
+	writef = au_sbi(sb)->si_xwrite;
+	for (bindex = 0, p = fpair; bindex <= bend; bindex++, p++) {
+		br = au_sbr(sb, bindex);
+		bshared = is_sb_shared(sb, bindex, bindex - 1);
+		if (bshared >= 0) {
+			/* shared xino */
+			*p = fpair[bshared];
+			get_file(p->new);
+		}
+
+		if (!p->new) {
+			/* new xino */
+			p->old = br->br_xino.xi_file;
+			p->new = au_xino_create2(base, br->br_xino.xi_file);
+			err = PTR_ERR(p->new);
+			if (IS_ERR(p->new)) {
+				p->new = NULL;
+				goto out_pair;
+			}
+		}
+
+		err = au_xino_do_write(writef, p->new,
+				       au_h_iptr(inode, bindex)->i_ino, ino);
+		if (unlikely(err))
+			goto out_pair;
+	}
+
+	for (bindex = 0, p = fpair; bindex <= bend; bindex++, p++) {
+		br = au_sbr(sb, bindex);
+		if (br->br_xino.xi_file)
+			fput(br->br_xino.xi_file);
+		get_file(p->new);
+		br->br_xino.xi_file = p->new;
+	}
+
+ out_pair:
+	for (bindex = 0, p = fpair; bindex <= bend; bindex++, p++)
+		if (p->new)
+			fput(p->new);
+		else
+			break;
+	kfree(fpair);
+ out:
+	return err;
+}
+
+void au_xino_clr(struct super_block *sb)
+{
+	struct au_sbinfo *sbinfo;
+
+	au_xigen_clr(sb);
+	xino_clear_xib(sb);
+	xino_clear_br(sb);
+	sbinfo = au_sbi(sb);
+	/* lvalue, do not call au_mntflags() */
+	au_opt_clr(sbinfo->si_mntflags, XINO);
+}
+
+int au_xino_set(struct super_block *sb, struct au_opt_xino *xino, int remount)
+{
+	int err, skip;
+	struct dentry *parent, *cur_parent;
+	struct qstr *dname, *cur_name;
+	struct file *cur_xino;
+	struct inode *dir;
+	struct au_sbinfo *sbinfo;
+
+	SiMustWriteLock(sb);
+
+	err = 0;
+	sbinfo = au_sbi(sb);
+	parent = dget_parent(xino->file->f_dentry);
+	if (remount) {
+		skip = 0;
+		dname = &xino->file->f_dentry->d_name;
+		cur_xino = sbinfo->si_xib;
+		if (cur_xino) {
+			cur_parent = dget_parent(cur_xino->f_dentry);
+			cur_name = &cur_xino->f_dentry->d_name;
+			skip = (cur_parent == parent
+				&& dname->len == cur_name->len
+				&& !memcmp(dname->name, cur_name->name,
+					   dname->len));
+			dput(cur_parent);
+		}
+		if (skip)
+			goto out;
+	}
+
+	au_opt_set(sbinfo->si_mntflags, XINO);
+	dir = parent->d_inode;
+	mutex_lock_nested(&dir->i_mutex, AuLsc_I_PARENT);
+	/* mnt_want_write() is unnecessary here */
+	err = au_xino_set_xib(sb, xino->file);
+	if (!err)
+		err = au_xigen_set(sb, xino->file);
+	if (!err)
+		err = au_xino_set_br(sb, xino->file);
+	mutex_unlock(&dir->i_mutex);
+	if (!err)
+		goto out; /* success */
+
+	/* reset all */
+	AuIOErr("failed creating xino(%d).\n", err);
+
+ out:
+	dput(parent);
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/*
+ * create a xinofile at the default place/path.
+ */
+struct file *au_xino_def(struct super_block *sb)
+{
+	struct file *file;
+	char *page, *p;
+	struct au_branch *br;
+	struct super_block *h_sb;
+	struct path path;
+	aufs_bindex_t bend, bindex, bwr;
+
+	br = NULL;
+	bend = au_sbend(sb);
+	bwr = -1;
+	for (bindex = 0; bindex <= bend; bindex++) {
+		br = au_sbr(sb, bindex);
+		if (au_br_writable(br->br_perm)
+		    && !au_test_fs_bad_xino(br->br_mnt->mnt_sb)) {
+			bwr = bindex;
+			break;
+		}
+	}
+
+	if (bwr >= 0) {
+		file = ERR_PTR(-ENOMEM);
+		page = __getname();
+		if (unlikely(!page))
+			goto out;
+		path.mnt = br->br_mnt;
+		path.dentry = au_h_dptr(sb->s_root, bwr);
+		p = d_path(&path, page, PATH_MAX - sizeof(AUFS_XINO_FNAME));
+		file = (void *)p;
+		if (!IS_ERR(p)) {
+			strcat(p, "/" AUFS_XINO_FNAME);
+			AuDbg("%s\n", p);
+			file = au_xino_create(sb, p, /*silent*/0);
+			if (!IS_ERR(file))
+				au_xino_brid_set(sb, br->br_id);
+		}
+		__putname(page);
+	} else {
+		file = au_xino_create(sb, AUFS_XINO_DEFPATH, /*silent*/0);
+		if (IS_ERR(file))
+			goto out;
+		h_sb = file->f_dentry->d_sb;
+		if (unlikely(au_test_fs_bad_xino(h_sb))) {
+			pr_err("xino doesn't support %s(%s)\n",
+			       AUFS_XINO_DEFPATH, au_sbtype(h_sb));
+			fput(file);
+			file = ERR_PTR(-EINVAL);
+		}
+		if (!IS_ERR(file))
+			au_xino_brid_set(sb, -1);
+	}
+
+ out:
+	return file;
+}
+
+/* ---------------------------------------------------------------------- */
+
+int au_xino_path(struct seq_file *seq, struct file *file)
+{
+	int err;
+
+	err = au_seq_path(seq, &file->f_path);
+	if (unlikely(err < 0))
+		goto out;
+
+	err = 0;
+#define Deleted "\\040(deleted)"
+	seq->count -= sizeof(Deleted) - 1;
+	AuDebugOn(memcmp(seq->buf + seq->count, Deleted,
+			 sizeof(Deleted) - 1));
+#undef Deleted
+
+ out:
+	return err;
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/inode.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/inode.c
@@ -0,0 +1,414 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * inode functions
+ */
+
+#include "aufs.h"
+
+struct inode *au_igrab(struct inode *inode)
+{
+	if (inode) {
+		AuDebugOn(!atomic_read(&inode->i_count));
+		atomic_inc_return(&inode->i_count);
+	}
+	return inode;
+}
+
+static void au_refresh_hinode_attr(struct inode *inode, int do_version)
+{
+	au_cpup_attr_all(inode, /*force*/0);
+	au_update_iigen(inode);
+	if (do_version)
+		inode->i_version++;
+}
+
+int au_refresh_hinode_self(struct inode *inode, int do_attr)
+{
+	int err;
+	aufs_bindex_t bindex, new_bindex;
+	unsigned char update;
+	struct inode *first;
+	struct au_hinode *p, *q, tmp;
+	struct super_block *sb;
+	struct au_iinfo *iinfo;
+
+	IiMustWriteLock(inode);
+
+	update = 0;
+	sb = inode->i_sb;
+	iinfo = au_ii(inode);
+	err = au_ii_realloc(iinfo, au_sbend(sb) + 1);
+	if (unlikely(err))
+		goto out;
+
+	p = iinfo->ii_hinode + iinfo->ii_bstart;
+	first = p->hi_inode;
+	err = 0;
+	for (bindex = iinfo->ii_bstart; bindex <= iinfo->ii_bend;
+	     bindex++, p++) {
+		if (!p->hi_inode)
+			continue;
+
+		new_bindex = au_br_index(sb, p->hi_id);
+		if (new_bindex == bindex)
+			continue;
+
+		if (new_bindex < 0) {
+			update++;
+			au_hiput(p);
+			p->hi_inode = NULL;
+			continue;
+		}
+
+		if (new_bindex < iinfo->ii_bstart)
+			iinfo->ii_bstart = new_bindex;
+		if (iinfo->ii_bend < new_bindex)
+			iinfo->ii_bend = new_bindex;
+		/* swap two lower inode, and loop again */
+		q = iinfo->ii_hinode + new_bindex;
+		tmp = *q;
+		*q = *p;
+		*p = tmp;
+		if (tmp.hi_inode) {
+			bindex--;
+			p--;
+		}
+	}
+	au_update_brange(inode, /*do_put_zero*/0);
+	if (do_attr)
+		au_refresh_hinode_attr(inode, update && S_ISDIR(inode->i_mode));
+
+ out:
+	return err;
+}
+
+int au_refresh_hinode(struct inode *inode, struct dentry *dentry)
+{
+	int err, update;
+	unsigned int flags;
+	aufs_bindex_t bindex, bend;
+	unsigned char isdir;
+	struct inode *first;
+	struct au_hinode *p;
+	struct au_iinfo *iinfo;
+
+	err = au_refresh_hinode_self(inode, /*do_attr*/0);
+	if (unlikely(err))
+		goto out;
+
+	update = 0;
+	iinfo = au_ii(inode);
+	p = iinfo->ii_hinode + iinfo->ii_bstart;
+	first = p->hi_inode;
+	isdir = S_ISDIR(inode->i_mode);
+	flags = au_hi_flags(inode, isdir);
+	bend = au_dbend(dentry);
+	for (bindex = au_dbstart(dentry); bindex <= bend; bindex++) {
+		struct inode *h_i;
+		struct dentry *h_d;
+
+		h_d = au_h_dptr(dentry, bindex);
+		if (!h_d || !h_d->d_inode)
+			continue;
+
+		if (iinfo->ii_bstart <= bindex && bindex <= iinfo->ii_bend) {
+			h_i = au_h_iptr(inode, bindex);
+			if (h_i) {
+				if (h_i == h_d->d_inode)
+					continue;
+				err = -EIO;
+				break;
+			}
+		}
+		if (bindex < iinfo->ii_bstart)
+			iinfo->ii_bstart = bindex;
+		if (iinfo->ii_bend < bindex)
+			iinfo->ii_bend = bindex;
+		au_set_h_iptr(inode, bindex, au_igrab(h_d->d_inode), flags);
+		update = 1;
+	}
+	au_update_brange(inode, /*do_put_zero*/0);
+
+	if (unlikely(err))
+		goto out;
+
+	au_refresh_hinode_attr(inode, update && isdir);
+
+ out:
+	AuTraceErr(err);
+	return err;
+}
+
+static int set_inode(struct inode *inode, struct dentry *dentry)
+{
+	int err;
+	unsigned int flags;
+	umode_t mode;
+	aufs_bindex_t bindex, bstart, btail;
+	unsigned char isdir;
+	struct dentry *h_dentry;
+	struct inode *h_inode;
+	struct au_iinfo *iinfo;
+
+	IiMustWriteLock(inode);
+
+	err = 0;
+	isdir = 0;
+	bstart = au_dbstart(dentry);
+	h_inode = au_h_dptr(dentry, bstart)->d_inode;
+	mode = h_inode->i_mode;
+	switch (mode & S_IFMT) {
+	case S_IFREG:
+		btail = au_dbtail(dentry);
+		inode->i_op = &aufs_iop;
+		inode->i_fop = &aufs_file_fop;
+		inode->i_mapping->a_ops = &aufs_aop;
+		break;
+	case S_IFDIR:
+		isdir = 1;
+		btail = au_dbtaildir(dentry);
+		inode->i_op = &aufs_dir_iop;
+		inode->i_fop = &aufs_dir_fop;
+		break;
+	case S_IFLNK:
+		btail = au_dbtail(dentry);
+		inode->i_op = &aufs_symlink_iop;
+		break;
+	case S_IFBLK:
+	case S_IFCHR:
+	case S_IFIFO:
+	case S_IFSOCK:
+		btail = au_dbtail(dentry);
+		inode->i_op = &aufs_iop;
+		init_special_inode(inode, mode, h_inode->i_rdev);
+		break;
+	default:
+		AuIOErr("Unknown file type 0%o\n", mode);
+		err = -EIO;
+		goto out;
+	}
+
+	/* do not set inotify for whiteouted dirs (SHWH mode) */
+	flags = au_hi_flags(inode, isdir);
+	if (au_opt_test(au_mntflags(dentry->d_sb), SHWH)
+	    && au_ftest_hi(flags, HINOTIFY)
+	    && dentry->d_name.len > AUFS_WH_PFX_LEN
+	    && !memcmp(dentry->d_name.name, AUFS_WH_PFX, AUFS_WH_PFX_LEN))
+		au_fclr_hi(flags, HINOTIFY);
+	iinfo = au_ii(inode);
+	iinfo->ii_bstart = bstart;
+	iinfo->ii_bend = btail;
+	for (bindex = bstart; bindex <= btail; bindex++) {
+		h_dentry = au_h_dptr(dentry, bindex);
+		if (h_dentry)
+			au_set_h_iptr(inode, bindex,
+				      au_igrab(h_dentry->d_inode), flags);
+	}
+	au_cpup_attr_all(inode, /*force*/1);
+
+ out:
+	return err;
+}
+
+/* successful returns with iinfo write_locked */
+static int reval_inode(struct inode *inode, struct dentry *dentry, int *matched)
+{
+	int err;
+	aufs_bindex_t bindex, bend;
+	struct inode *h_inode, *h_dinode;
+
+	*matched = 0;
+
+	/*
+	 * before this function, if aufs got any iinfo lock, it must be only
+	 * one, the parent dir.
+	 * it can happen by UDBA and the obsoleted inode number.
+	 */
+	err = -EIO;
+	if (unlikely(inode->i_ino == parent_ino(dentry)))
+		goto out;
+
+	err = 0;
+	ii_write_lock_new_child(inode);
+	h_dinode = au_h_dptr(dentry, au_dbstart(dentry))->d_inode;
+	bend = au_ibend(inode);
+	for (bindex = au_ibstart(inode); bindex <= bend; bindex++) {
+		h_inode = au_h_iptr(inode, bindex);
+		if (h_inode && h_inode == h_dinode) {
+			*matched = 1;
+			err = 0;
+			if (au_iigen(inode) != au_digen(dentry))
+				err = au_refresh_hinode(inode, dentry);
+			break;
+		}
+	}
+
+	if (unlikely(err))
+		ii_write_unlock(inode);
+ out:
+	return err;
+}
+
+int au_ino(struct super_block *sb, aufs_bindex_t bindex, ino_t h_ino,
+	   unsigned int d_type, ino_t *ino)
+{
+	int err;
+	struct mutex *mtx;
+	const int isdir = (d_type == DT_DIR);
+
+	/* prevent hardlinks from race condition */
+	mtx = NULL;
+	if (!isdir) {
+		mtx = &au_sbr(sb, bindex)->br_xino.xi_nondir_mtx;
+		mutex_lock(mtx);
+	}
+	err = au_xino_read(sb, bindex, h_ino, ino);
+	if (unlikely(err))
+		goto out;
+
+	if (!*ino) {
+		err = -EIO;
+		*ino = au_xino_new_ino(sb);
+		if (unlikely(!*ino))
+			goto out;
+		err = au_xino_write(sb, bindex, h_ino, *ino);
+		if (unlikely(err))
+			goto out;
+	}
+
+ out:
+	if (!isdir)
+		mutex_unlock(mtx);
+	return err;
+}
+
+/* successful returns with iinfo write_locked */
+/* todo: return with unlocked? */
+struct inode *au_new_inode(struct dentry *dentry, int must_new)
+{
+	struct inode *inode;
+	struct dentry *h_dentry;
+	struct super_block *sb;
+	ino_t h_ino, ino;
+	int err, match;
+	aufs_bindex_t bstart;
+
+	sb = dentry->d_sb;
+	bstart = au_dbstart(dentry);
+	h_dentry = au_h_dptr(dentry, bstart);
+	h_ino = h_dentry->d_inode->i_ino;
+	err = au_xino_read(sb, bstart, h_ino, &ino);
+	inode = ERR_PTR(err);
+	if (unlikely(err))
+		goto out;
+ new_ino:
+	if (!ino) {
+		ino = au_xino_new_ino(sb);
+		if (unlikely(!ino)) {
+			inode = ERR_PTR(-EIO);
+			goto out;
+		}
+	}
+
+	AuDbg("i%lu\n", (unsigned long)ino);
+	inode = au_iget_locked(sb, ino);
+	err = PTR_ERR(inode);
+	if (IS_ERR(inode))
+		goto out;
+
+	AuDbg("%lx, new %d\n", inode->i_state, !!(inode->i_state & I_NEW));
+	if (inode->i_state & I_NEW) {
+		ii_write_lock_new_child(inode);
+		err = set_inode(inode, dentry);
+		unlock_new_inode(inode);
+		if (!err)
+			goto out; /* success */
+
+		iget_failed(inode);
+		ii_write_unlock(inode);
+		goto out_iput;
+	} else if (!must_new) {
+		err = reval_inode(inode, dentry, &match);
+		if (!err)
+			goto out; /* success */
+		else if (match)
+			goto out_iput;
+	}
+
+	if (unlikely(au_test_fs_unique_ino(h_dentry->d_inode)))
+		AuWarn1("Warning: Un-notified UDBA or repeatedly renamed dir,"
+			" b%d, %s, %.*s, hi%lu, i%lu.\n",
+			bstart, au_sbtype(h_dentry->d_sb), AuDLNPair(dentry),
+			(unsigned long)h_ino, (unsigned long)ino);
+	ino = 0;
+	err = au_xino_write(sb, bstart, h_ino, /*ino*/0);
+	if (!err) {
+		iput(inode);
+		goto new_ino;
+	}
+
+ out_iput:
+	iput(inode);
+	inode = ERR_PTR(err);
+ out:
+	return inode;
+}
+
+/* ---------------------------------------------------------------------- */
+
+int au_test_ro(struct super_block *sb, aufs_bindex_t bindex,
+	       struct inode *inode)
+{
+	int err;
+
+	err = au_br_rdonly(au_sbr(sb, bindex));
+
+	/* pseudo-link after flushed may happen out of bounds */
+	if (!err
+	    && inode
+	    && au_ibstart(inode) <= bindex
+	    && bindex <= au_ibend(inode)) {
+		/*
+		 * permission check is unnecessary since vfsub routine
+		 * will be called later
+		 */
+		struct inode *hi = au_h_iptr(inode, bindex);
+		if (hi)
+			err = IS_IMMUTABLE(hi) ? -EROFS : 0;
+	}
+
+	return err;
+}
+
+int au_test_h_perm(struct inode *h_inode, int mask)
+{
+	if (!current_fsuid())
+		return 0;
+	return inode_permission(h_inode, mask);
+}
+
+int au_test_h_perm_sio(struct inode *h_inode, int mask)
+{
+	if (au_test_nfs(h_inode->i_sb)
+	    && (mask & MAY_WRITE)
+	    && S_ISDIR(h_inode->i_mode))
+		mask |= MAY_READ; /* force permission check */
+	return au_test_h_perm(h_inode, mask);
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/super.h
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/super.h
@@ -0,0 +1,384 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * super_block operations
+ */
+
+#ifndef __AUFS_SUPER_H__
+#define __AUFS_SUPER_H__
+
+#ifdef __KERNEL__
+
+#include <linux/fs.h>
+#include <linux/aufs_type.h>
+#include "rwsem.h"
+#include "spl.h"
+#include "wkq.h"
+
+typedef ssize_t (*au_readf_t)(struct file *, char __user *, size_t, loff_t *);
+typedef ssize_t (*au_writef_t)(struct file *, const char __user *, size_t,
+			       loff_t *);
+
+/* policies to select one among multiple writable branches */
+struct au_wbr_copyup_operations {
+	int (*copyup)(struct dentry *dentry);
+};
+
+struct au_wbr_create_operations {
+	int (*create)(struct dentry *dentry, int isdir);
+	int (*init)(struct super_block *sb);
+	int (*fin)(struct super_block *sb);
+};
+
+struct au_wbr_mfs {
+	struct mutex	mfs_lock; /* protect this structure */
+	unsigned long	mfs_jiffy;
+	unsigned long	mfs_expire;
+	aufs_bindex_t	mfs_bindex;
+
+	unsigned long long	mfsrr_bytes;
+	unsigned long long	mfsrr_watermark;
+};
+
+struct au_branch;
+struct au_sbinfo {
+	/* nowait tasks in the system-wide workqueue */
+	struct au_nowait_tasks	si_nowait;
+
+	struct au_rwsem		si_rwsem;
+
+	/* branch management */
+	unsigned int		si_generation;
+
+	/* see above flags */
+	unsigned char		au_si_status;
+
+	aufs_bindex_t		si_bend;
+	aufs_bindex_t		si_last_br_id;
+	struct au_branch	**si_branch;
+
+	/* policy to select a writable branch */
+	unsigned char		si_wbr_copyup;
+	unsigned char		si_wbr_create;
+	struct au_wbr_copyup_operations *si_wbr_copyup_ops;
+	struct au_wbr_create_operations *si_wbr_create_ops;
+
+	/* round robin */
+	atomic_t		si_wbr_rr_next;
+
+	/* most free space */
+	struct au_wbr_mfs	si_wbr_mfs;
+
+	/* mount flags */
+	/* include/asm-ia64/siginfo.h defines a macro named si_flags */
+	unsigned int		si_mntflags;
+
+	/* external inode number (bitmap and translation table) */
+	au_readf_t		si_xread;
+	au_writef_t		si_xwrite;
+	struct file		*si_xib;
+	struct mutex		si_xib_mtx; /* protect xib members */
+	unsigned long		*si_xib_buf;
+	unsigned long		si_xib_last_pindex;
+	int			si_xib_next_bit;
+	aufs_bindex_t		si_xino_brid;
+	/* reserved for future use */
+	/* unsigned long long	si_xib_limit; */	/* Max xib file size */
+
+#ifdef CONFIG_AUFS_EXPORT
+	/* i_generation */
+	struct file		*si_xigen;
+	atomic_t		si_xigen_next;
+#endif
+
+	/* vdir parameters */
+	unsigned long		si_rdcache;	/* max cache time in HZ */
+	unsigned int		si_rdblk;	/* deblk size */
+	unsigned int		si_rdhash;	/* hash size */
+
+	/*
+	 * If the number of whiteouts are larger than si_dirwh, leave all of
+	 * them after au_whtmp_ren to reduce the cost of rmdir(2).
+	 * future fsck.aufs or kernel thread will remove them later.
+	 * Otherwise, remove all whiteouts and the dir in rmdir(2).
+	 */
+	unsigned int		si_dirwh;
+
+	/*
+	 * rename(2) a directory with all children.
+	 */
+	/* reserved for future use */
+	/* int			si_rendir; */
+
+	/* pseudo_link list */
+	struct au_splhead	si_plink;
+	wait_queue_head_t	si_plink_wq;
+
+	/*
+	 * sysfs and lifetime management.
+	 * this is not a small structure and it may be a waste of memory in case
+	 * of sysfs is disabled, particulary when many aufs-es are mounted.
+	 * but using sysfs is majority.
+	 */
+	struct kobject		si_kobj;
+#ifdef CONFIG_DEBUG_FS
+	struct dentry		 *si_dbgaufs, *si_dbgaufs_xib;
+#ifdef CONFIG_AUFS_EXPORT
+	struct dentry		 *si_dbgaufs_xigen;
+#endif
+#endif
+
+	/* dirty, necessary for unmounting, sysfs and sysrq */
+	struct super_block	*si_sb;
+};
+
+/* sbinfo status flags */
+/*
+ * set true when refresh_dirs() failed at remount time.
+ * then try refreshing dirs at access time again.
+ * if it is false, refreshing dirs at access time is unnecesary
+ */
+#define AuSi_FAILED_REFRESH_DIRS	1
+#define AuSi_MAINTAIN_PLINK		(1 << 1)	/* ioctl */
+static inline unsigned char au_do_ftest_si(struct au_sbinfo *sbi,
+					   unsigned int flag)
+{
+	AuRwMustAnyLock(&sbi->si_rwsem);
+	return sbi->au_si_status & flag;
+}
+#define au_ftest_si(sbinfo, name)	au_do_ftest_si(sbinfo, AuSi_##name)
+#define au_fset_si(sbinfo, name) do { \
+	AuRwMustWriteLock(&(sbinfo)->si_rwsem); \
+	(sbinfo)->au_si_status |= AuSi_##name; \
+} while (0)
+#define au_fclr_si(sbinfo, name) do { \
+	AuRwMustWriteLock(&(sbinfo)->si_rwsem); \
+	(sbinfo)->au_si_status &= ~AuSi_##name; \
+} while (0)
+
+/* ---------------------------------------------------------------------- */
+
+/* policy to select one among writable branches */
+#define AuWbrCopyup(sbinfo, ...) \
+	((sbinfo)->si_wbr_copyup_ops->copyup(__VA_ARGS__))
+#define AuWbrCreate(sbinfo, ...) \
+	((sbinfo)->si_wbr_create_ops->create(__VA_ARGS__))
+
+/* flags for si_read_lock()/aufs_read_lock()/di_read_lock() */
+#define AuLock_DW		1		/* write-lock dentry */
+#define AuLock_IR		(1 << 1)	/* read-lock inode */
+#define AuLock_IW		(1 << 2)	/* write-lock inode */
+#define AuLock_FLUSH		(1 << 3)	/* wait for 'nowait' tasks */
+#define AuLock_DIR		(1 << 4)	/* target is a dir */
+#define au_ftest_lock(flags, name)	((flags) & AuLock_##name)
+#define au_fset_lock(flags, name)	{ (flags) |= AuLock_##name; }
+#define au_fclr_lock(flags, name)	{ (flags) &= ~AuLock_##name; }
+
+/* ---------------------------------------------------------------------- */
+
+/* super.c */
+extern struct file_system_type aufs_fs_type;
+struct inode *au_iget_locked(struct super_block *sb, ino_t ino);
+
+/* sbinfo.c */
+void au_si_free(struct kobject *kobj);
+int au_si_alloc(struct super_block *sb);
+int au_sbr_realloc(struct au_sbinfo *sbinfo, int nbr);
+
+unsigned int au_sigen_inc(struct super_block *sb);
+aufs_bindex_t au_new_br_id(struct super_block *sb);
+
+void aufs_read_lock(struct dentry *dentry, int flags);
+void aufs_read_unlock(struct dentry *dentry, int flags);
+void aufs_write_lock(struct dentry *dentry);
+void aufs_write_unlock(struct dentry *dentry);
+void aufs_read_and_write_lock2(struct dentry *d1, struct dentry *d2, int isdir);
+void aufs_read_and_write_unlock2(struct dentry *d1, struct dentry *d2);
+
+/* wbr_policy.c */
+extern struct au_wbr_copyup_operations au_wbr_copyup_ops[];
+extern struct au_wbr_create_operations au_wbr_create_ops[];
+int au_cpdown_dirs(struct dentry *dentry, aufs_bindex_t bdst);
+
+/* ---------------------------------------------------------------------- */
+
+static inline struct au_sbinfo *au_sbi(struct super_block *sb)
+{
+	return sb->s_fs_info;
+}
+
+/* ---------------------------------------------------------------------- */
+
+#ifdef CONFIG_AUFS_EXPORT
+void au_export_init(struct super_block *sb);
+
+static inline int au_test_nfsd(struct task_struct *tsk)
+{
+	return !tsk->mm && !strcmp(tsk->comm, "nfsd");
+}
+
+int au_xigen_inc(struct inode *inode);
+int au_xigen_new(struct inode *inode);
+int au_xigen_set(struct super_block *sb, struct file *base);
+void au_xigen_clr(struct super_block *sb);
+
+static inline int au_busy_or_stale(void)
+{
+	if (!au_test_nfsd(current))
+		return -EBUSY;
+	return -ESTALE;
+}
+#else
+static inline void au_export_init(struct super_block *sb)
+{
+	/* nothing */
+}
+
+static inline int au_test_nfsd(struct task_struct *tsk)
+{
+	return 0;
+}
+
+static inline int au_xigen_inc(struct inode *inode)
+{
+	return 0;
+}
+
+static inline int au_xigen_new(struct inode *inode)
+{
+	return 0;
+}
+
+static inline int au_xigen_set(struct super_block *sb, struct file *base)
+{
+	return 0;
+}
+
+static inline void au_xigen_clr(struct super_block *sb)
+{
+	/* empty */
+}
+
+static inline int au_busy_or_stale(void)
+{
+	return -EBUSY;
+}
+#endif /* CONFIG_AUFS_EXPORT */
+
+/* ---------------------------------------------------------------------- */
+
+static inline void dbgaufs_si_null(struct au_sbinfo *sbinfo)
+{
+	/*
+	 * This function is a dynamic '__init' fucntion actually,
+	 * so the tiny check for si_rwsem is unnecessary.
+	 */
+	/* AuRwMustWriteLock(&sbinfo->si_rwsem); */
+#ifdef CONFIG_DEBUG_FS
+	sbinfo->si_dbgaufs = NULL;
+	sbinfo->si_dbgaufs_xib = NULL;
+#ifdef CONFIG_AUFS_EXPORT
+	sbinfo->si_dbgaufs_xigen = NULL;
+#endif
+#endif
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* lock superblock. mainly for entry point functions */
+/*
+ * si_noflush_read_lock, si_noflush_write_lock,
+ * si_read_unlock, si_write_unlock, si_downgrade_lock
+ */
+AuSimpleLockRwsemFuncs(si_noflush, struct super_block *sb,
+		       &au_sbi(sb)->si_rwsem);
+AuSimpleUnlockRwsemFuncs(si, struct super_block *sb, &au_sbi(sb)->si_rwsem);
+
+#define SiMustNoWaiters(sb)	AuRwMustNoWaiters(&au_sbi(sb)->si_rwsem)
+#define SiMustAnyLock(sb)	AuRwMustAnyLock(&au_sbi(sb)->si_rwsem)
+#define SiMustWriteLock(sb)	AuRwMustWriteLock(&au_sbi(sb)->si_rwsem)
+
+static inline void si_read_lock(struct super_block *sb, int flags)
+{
+	if (au_ftest_lock(flags, FLUSH))
+		au_nwt_flush(&au_sbi(sb)->si_nowait);
+	si_noflush_read_lock(sb);
+}
+
+static inline void si_write_lock(struct super_block *sb)
+{
+	au_nwt_flush(&au_sbi(sb)->si_nowait);
+	si_noflush_write_lock(sb);
+}
+
+static inline int si_read_trylock(struct super_block *sb, int flags)
+{
+	if (au_ftest_lock(flags, FLUSH))
+		au_nwt_flush(&au_sbi(sb)->si_nowait);
+	return si_noflush_read_trylock(sb);
+}
+
+static inline int si_write_trylock(struct super_block *sb, int flags)
+{
+	if (au_ftest_lock(flags, FLUSH))
+		au_nwt_flush(&au_sbi(sb)->si_nowait);
+	return si_noflush_write_trylock(sb);
+}
+
+/* ---------------------------------------------------------------------- */
+
+static inline aufs_bindex_t au_sbend(struct super_block *sb)
+{
+	SiMustAnyLock(sb);
+	return au_sbi(sb)->si_bend;
+}
+
+static inline unsigned int au_mntflags(struct super_block *sb)
+{
+	SiMustAnyLock(sb);
+	return au_sbi(sb)->si_mntflags;
+}
+
+static inline unsigned int au_sigen(struct super_block *sb)
+{
+	SiMustAnyLock(sb);
+	return au_sbi(sb)->si_generation;
+}
+
+static inline struct au_branch *au_sbr(struct super_block *sb,
+				       aufs_bindex_t bindex)
+{
+	SiMustAnyLock(sb);
+	return au_sbi(sb)->si_branch[0 + bindex];
+}
+
+static inline void au_xino_brid_set(struct super_block *sb, aufs_bindex_t brid)
+{
+	SiMustWriteLock(sb);
+	au_sbi(sb)->si_xino_brid = brid;
+}
+
+static inline aufs_bindex_t au_xino_brid(struct super_block *sb)
+{
+	SiMustAnyLock(sb);
+	return au_sbi(sb)->si_xino_brid;
+}
+
+#endif /* __KERNEL__ */
+#endif /* __AUFS_SUPER_H__ */
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/branch.h
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/branch.h
@@ -0,0 +1,219 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * branch filesystems and xino for them
+ */
+
+#ifndef __AUFS_BRANCH_H__
+#define __AUFS_BRANCH_H__
+
+#ifdef __KERNEL__
+
+#include <linux/fs.h>
+#include <linux/mount.h>
+#include <linux/aufs_type.h>
+#include "rwsem.h"
+#include "super.h"
+
+/* ---------------------------------------------------------------------- */
+
+/* a xino file */
+struct au_xino_file {
+	struct file		*xi_file;
+	struct mutex		xi_nondir_mtx;
+
+	/* todo: make xino files an array to support huge inode number */
+
+#ifdef CONFIG_DEBUG_FS
+	struct dentry		 *xi_dbgaufs;
+#endif
+};
+
+/* members for writable branch only */
+enum {AuBrWh_BASE, AuBrWh_PLINK, AuBrWh_ORPH, AuBrWh_Last};
+struct au_wbr {
+	struct au_rwsem		wbr_wh_rwsem;
+	struct dentry		*wbr_wh[AuBrWh_Last];
+	atomic_t 		wbr_wh_running;
+#define wbr_whbase		wbr_wh[AuBrWh_BASE]	/* whiteout base */
+#define wbr_plink		wbr_wh[AuBrWh_PLINK]	/* pseudo-link dir */
+#define wbr_orph		wbr_wh[AuBrWh_ORPH]	/* dir for orphans */
+
+	/* mfs mode */
+	unsigned long long	wbr_bytes;
+};
+
+/* protected by superblock rwsem */
+struct au_branch {
+	struct au_xino_file	br_xino;
+
+	aufs_bindex_t		br_id;
+
+	int			br_perm;
+	struct vfsmount		*br_mnt;
+	atomic_t		br_count;
+
+	struct au_wbr		*br_wbr;
+
+	/* xino truncation */
+	blkcnt_t		br_xino_upper;	/* watermark in blocks */
+	atomic_t		br_xino_running;
+
+#ifdef CONFIG_SYSFS
+	/* an entry under sysfs per mount-point */
+	char			br_name[8];
+	struct attribute	br_attr;
+#endif
+};
+
+/* ---------------------------------------------------------------------- */
+
+/* branch permission and attribute */
+enum {
+	AuBrPerm_RW,		/* writable, linkable wh */
+	AuBrPerm_RO,		/* readonly, no wh */
+	AuBrPerm_RR,		/* natively readonly, no wh */
+
+	AuBrPerm_RWNoLinkWH,	/* un-linkable whiteouts */
+
+	AuBrPerm_ROWH,		/* whiteout-able */
+	AuBrPerm_RRWH,		/* whiteout-able */
+
+	AuBrPerm_Last
+};
+
+static inline int au_br_writable(int brperm)
+{
+	return brperm == AuBrPerm_RW || brperm == AuBrPerm_RWNoLinkWH;
+}
+
+static inline int au_br_whable(int brperm)
+{
+	return brperm == AuBrPerm_RW
+		|| brperm == AuBrPerm_ROWH
+		|| brperm == AuBrPerm_RRWH;
+}
+
+static inline int au_br_rdonly(struct au_branch *br)
+{
+	return ((br->br_mnt->mnt_sb->s_flags & MS_RDONLY)
+		|| !au_br_writable(br->br_perm))
+		? -EROFS : 0;
+}
+
+static inline int au_br_hinotifyable(int brperm __maybe_unused)
+{
+#ifdef CONFIG_AUFS_HINOTIFY
+	return brperm != AuBrPerm_RR && brperm != AuBrPerm_RRWH;
+#else
+	return 0;
+#endif
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* branch.c */
+struct au_sbinfo;
+void au_br_free(struct au_sbinfo *sinfo);
+int au_br_index(struct super_block *sb, aufs_bindex_t br_id);
+struct au_opt_add;
+int au_br_add(struct super_block *sb, struct au_opt_add *add, int remount);
+struct au_opt_del;
+int au_br_del(struct super_block *sb, struct au_opt_del *del, int remount);
+struct au_opt_mod;
+int au_br_mod(struct super_block *sb, struct au_opt_mod *mod, int remount,
+	      int *do_update);
+
+/* xino.c */
+static const loff_t au_loff_max = LLONG_MAX;
+
+int au_xib_trunc(struct super_block *sb);
+ssize_t xino_fread(au_readf_t func, struct file *file, void *buf, size_t size,
+		   loff_t *pos);
+ssize_t xino_fwrite(au_writef_t func, struct file *file, void *buf, size_t size,
+		    loff_t *pos);
+struct file *au_xino_create2(struct file *base_file, struct file *copy_src);
+struct file *au_xino_create(struct super_block *sb, char *fname, int silent);
+ino_t au_xino_new_ino(struct super_block *sb);
+int au_xino_write0(struct super_block *sb, aufs_bindex_t bindex, ino_t h_ino,
+		   ino_t ino);
+int au_xino_write(struct super_block *sb, aufs_bindex_t bindex, ino_t h_ino,
+		  ino_t ino);
+int au_xino_read(struct super_block *sb, aufs_bindex_t bindex, ino_t h_ino,
+		 ino_t *ino);
+int au_xino_br(struct super_block *sb, struct au_branch *br, ino_t hino,
+	       struct file *base_file, int do_test);
+int au_xino_trunc(struct super_block *sb, aufs_bindex_t bindex);
+
+struct au_opt_xino;
+int au_xino_set(struct super_block *sb, struct au_opt_xino *xino, int remount);
+void au_xino_clr(struct super_block *sb);
+struct file *au_xino_def(struct super_block *sb);
+int au_xino_path(struct seq_file *seq, struct file *file);
+
+/* ---------------------------------------------------------------------- */
+
+/* Superblock to branch */
+static inline
+aufs_bindex_t au_sbr_id(struct super_block *sb, aufs_bindex_t bindex)
+{
+	return au_sbr(sb, bindex)->br_id;
+}
+
+static inline
+struct vfsmount *au_sbr_mnt(struct super_block *sb, aufs_bindex_t bindex)
+{
+	return au_sbr(sb, bindex)->br_mnt;
+}
+
+static inline
+struct super_block *au_sbr_sb(struct super_block *sb, aufs_bindex_t bindex)
+{
+	return au_sbr_mnt(sb, bindex)->mnt_sb;
+}
+
+static inline void au_sbr_put(struct super_block *sb, aufs_bindex_t bindex)
+{
+	atomic_dec_return(&au_sbr(sb, bindex)->br_count);
+}
+
+static inline int au_sbr_perm(struct super_block *sb, aufs_bindex_t bindex)
+{
+	return au_sbr(sb, bindex)->br_perm;
+}
+
+static inline int au_sbr_whable(struct super_block *sb, aufs_bindex_t bindex)
+{
+	return au_br_whable(au_sbr_perm(sb, bindex));
+}
+
+/* ---------------------------------------------------------------------- */
+
+/*
+ * wbr_wh_read_lock, wbr_wh_write_lock
+ * wbr_wh_read_unlock, wbr_wh_write_unlock, wbr_wh_downgrade_lock
+ */
+AuSimpleRwsemFuncs(wbr_wh, struct au_wbr *wbr, &wbr->wbr_wh_rwsem);
+
+#define WbrWhMustNoWaiters(wbr)	AuRwMustNoWaiters(&wbr->wbr_wh_rwsem)
+#define WbrWhMustAnyLock(wbr)	AuRwMustAnyLock(&wbr->wbr_wh_rwsem)
+#define WbrWhMustWriteLock(wbr)	AuRwMustWriteLock(&wbr->wbr_wh_rwsem)
+
+#endif /* __KERNEL__ */
+#endif /* __AUFS_BRANCH_H__ */
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/file.h
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/file.h
@@ -0,0 +1,178 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * file operations
+ */
+
+#ifndef __AUFS_FILE_H__
+#define __AUFS_FILE_H__
+
+#ifdef __KERNEL__
+
+#include <linux/fs.h>
+#include <linux/poll.h>
+#include <linux/aufs_type.h>
+#include "rwsem.h"
+
+struct au_branch;
+struct au_hfile {
+	struct file		*hf_file;
+	struct au_branch	*hf_br;
+};
+
+struct au_vdir;
+struct au_finfo {
+	atomic_t		fi_generation;
+
+	struct au_rwsem		fi_rwsem;
+	struct au_hfile		*fi_hfile;
+	aufs_bindex_t		fi_bstart, fi_bend;
+
+	union {
+		/* non-dir only */
+		struct {
+			struct vm_operations_struct	*fi_h_vm_ops;
+			struct vm_operations_struct	*fi_vm_ops;
+			struct mutex			fi_vm_mtx;
+		};
+
+		/* dir only */
+		struct {
+			struct au_vdir		*fi_vdir_cache;
+			int			fi_maintain_plink;
+		};
+	};
+};
+
+/* ---------------------------------------------------------------------- */
+
+/* file.c */
+extern struct address_space_operations aufs_aop;
+unsigned int au_file_roflags(unsigned int flags);
+struct file *au_h_open(struct dentry *dentry, aufs_bindex_t bindex, int flags,
+		       struct file *file);
+int au_do_open(struct file *file, int (*open)(struct file *file, int flags));
+int au_reopen_nondir(struct file *file);
+struct au_pin;
+int au_ready_to_write(struct file *file, loff_t len, struct au_pin *pin);
+int au_reval_and_lock_fdi(struct file *file, int (*reopen)(struct file *file),
+			  int wlock);
+
+/* poll.c */
+#ifdef CONFIG_AUFS_POLL
+unsigned int aufs_poll(struct file *file, poll_table *wait);
+#endif
+
+/* f_op.c */
+extern const struct file_operations aufs_file_fop;
+int aufs_flush(struct file *file, fl_owner_t id);
+
+/* finfo.c */
+void au_hfput(struct au_hfile *hf, struct file *file);
+void au_set_h_fptr(struct file *file, aufs_bindex_t bindex,
+		   struct file *h_file);
+
+void au_update_figen(struct file *file);
+
+void au_finfo_fin(struct file *file);
+int au_finfo_init(struct file *file);
+int au_fi_realloc(struct au_finfo *finfo, int nbr);
+
+/* ioctl.c */
+long aufs_ioctl_nondir(struct file *file, unsigned int cmd, unsigned long arg);
+
+/* ---------------------------------------------------------------------- */
+
+static inline struct au_finfo *au_fi(struct file *file)
+{
+	return file->private_data;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/*
+ * fi_read_lock, fi_write_lock,
+ * fi_read_unlock, fi_write_unlock, fi_downgrade_lock
+ */
+AuSimpleRwsemFuncs(fi, struct file *f, &au_fi(f)->fi_rwsem);
+
+#define FiMustNoWaiters(f)	AuRwMustNoWaiters(&au_fi(f)->fi_rwsem)
+#define FiMustAnyLock(f)	AuRwMustAnyLock(&au_fi(f)->fi_rwsem)
+#define FiMustWriteLock(f)	AuRwMustWriteLock(&au_fi(f)->fi_rwsem)
+
+/* ---------------------------------------------------------------------- */
+
+/* todo: hard/soft set? */
+static inline aufs_bindex_t au_fbstart(struct file *file)
+{
+	FiMustAnyLock(file);
+	return au_fi(file)->fi_bstart;
+}
+
+static inline aufs_bindex_t au_fbend(struct file *file)
+{
+	FiMustAnyLock(file);
+	return au_fi(file)->fi_bend;
+}
+
+static inline struct au_vdir *au_fvdir_cache(struct file *file)
+{
+	FiMustAnyLock(file);
+	return au_fi(file)->fi_vdir_cache;
+}
+
+static inline void au_set_fbstart(struct file *file, aufs_bindex_t bindex)
+{
+	FiMustWriteLock(file);
+	au_fi(file)->fi_bstart = bindex;
+}
+
+static inline void au_set_fbend(struct file *file, aufs_bindex_t bindex)
+{
+	FiMustWriteLock(file);
+	au_fi(file)->fi_bend = bindex;
+}
+
+static inline void au_set_fvdir_cache(struct file *file,
+				      struct au_vdir *vdir_cache)
+{
+	FiMustWriteLock(file);
+	au_fi(file)->fi_vdir_cache = vdir_cache;
+}
+
+static inline struct file *au_h_fptr(struct file *file, aufs_bindex_t bindex)
+{
+	FiMustAnyLock(file);
+	return au_fi(file)->fi_hfile[0 + bindex].hf_file;
+}
+
+/* todo: memory barrier? */
+static inline unsigned int au_figen(struct file *f)
+{
+	return atomic_read(&au_fi(f)->fi_generation);
+}
+
+static inline int au_test_mmapped(struct file *f)
+{
+	/* FiMustAnyLock(f); */
+	return !!(au_fi(f)->fi_h_vm_ops);
+}
+
+#endif /* __KERNEL__ */
+#endif /* __AUFS_FILE_H__ */
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/conf.mk
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/conf.mk
@@ -0,0 +1,31 @@
+
+AuConfStr = CONFIG_AUFS_FS=${CONFIG_AUFS_FS}
+
+define AuConf
+ifdef ${1}
+AuConfStr += ${1}=${${1}}
+endif
+endef
+
+$(foreach i, BRANCH_MAX_127 BRANCH_MAX_511 BRANCH_MAX_1023 BRANCH_MAX_32767 \
+	HINOTIFY \
+	EXPORT INO_T_64 \
+	RDU \
+	SHWH \
+	BR_RAMFS \
+	BR_FUSE POLL \
+	BDEV_LOOP \
+	DEBUG MAGIC_SYSRQ, \
+	$(eval $(call AuConf,CONFIG_AUFS_${i})))
+
+AuConfName = ${obj}/conf.str
+${AuConfName}.tmp: FORCE
+	@echo ${AuConfStr} | tr ' ' '\n' | sed -e 's/^/"/' -e 's/$$/\\n"/' > $@
+${AuConfName}: ${AuConfName}.tmp
+	@diff -q $< $@ > /dev/null 2>&1 || { \
+	echo '  GEN    ' $@; \
+	cp -p $< $@; \
+	}
+FORCE:
+clean-files += ${AuConfName} ${AuConfName}.tmp
+${obj}/sysfs.o: ${AuConfName}
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/rwsem.h
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/rwsem.h
@@ -0,0 +1,186 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * simple read-write semaphore wrappers
+ */
+
+#ifndef __AUFS_RWSEM_H__
+#define __AUFS_RWSEM_H__
+
+#ifdef __KERNEL__
+
+#include <linux/rwsem.h>
+
+struct au_rwsem {
+	struct rw_semaphore	rwsem;
+#ifdef CONFIG_AUFS_DEBUG
+	/* just for debugging, not almighty counter */
+	atomic_t		rcnt, wcnt;
+#endif
+};
+
+#ifdef CONFIG_AUFS_DEBUG
+#define AuDbgCntInit(rw) do { \
+	atomic_set(&(rw)->rcnt, 0); \
+	atomic_set(&(rw)->wcnt, 0); \
+	smp_mb(); /* atomic set */ \
+} while (0)
+
+#define AuDbgRcntInc(rw)	atomic_inc_return(&(rw)->rcnt)
+#define AuDbgRcntDec(rw)	WARN_ON(atomic_dec_return(&(rw)->rcnt) < 0)
+#define AuDbgWcntInc(rw)	WARN_ON(atomic_inc_return(&(rw)->wcnt) > 1)
+#define AuDbgWcntDec(rw)	WARN_ON(atomic_dec_return(&(rw)->wcnt) < 0)
+#else
+#define AuDbgCntInit(rw)	do {} while (0)
+#define AuDbgRcntInc(rw)	do {} while (0)
+#define AuDbgRcntDec(rw)	do {} while (0)
+#define AuDbgWcntInc(rw)	do {} while (0)
+#define AuDbgWcntDec(rw)	do {} while (0)
+#endif /* CONFIG_AUFS_DEBUG */
+
+/* to debug easier, do not make them inlined functions */
+#define AuRwMustNoWaiters(rw)	AuDebugOn(!list_empty(&(rw)->rwsem.wait_list))
+/* rwsem_is_locked() is unusable */
+#define AuRwMustReadLock(rw)	AuDebugOn(atomic_read(&(rw)->rcnt) <= 0)
+#define AuRwMustWriteLock(rw)	AuDebugOn(atomic_read(&(rw)->wcnt) <= 0)
+#define AuRwMustAnyLock(rw)	AuDebugOn(atomic_read(&(rw)->rcnt) <= 0 \
+					&& atomic_read(&(rw)->wcnt) <= 0)
+#define AuRwDestroy(rw)		AuDebugOn(atomic_read(&(rw)->rcnt) \
+					|| atomic_read(&(rw)->wcnt))
+
+static inline void au_rw_init(struct au_rwsem *rw)
+{
+	AuDbgCntInit(rw);
+	init_rwsem(&rw->rwsem);
+}
+
+static inline void au_rw_init_wlock(struct au_rwsem *rw)
+{
+	au_rw_init(rw);
+	down_write(&rw->rwsem);
+	AuDbgWcntInc(rw);
+}
+
+static inline void au_rw_init_wlock_nested(struct au_rwsem *rw,
+					   unsigned int lsc)
+{
+	au_rw_init(rw);
+	down_write_nested(&rw->rwsem, lsc);
+	AuDbgWcntInc(rw);
+}
+
+static inline void au_rw_read_lock(struct au_rwsem *rw)
+{
+	down_read(&rw->rwsem);
+	AuDbgRcntInc(rw);
+}
+
+static inline void au_rw_read_lock_nested(struct au_rwsem *rw, unsigned int lsc)
+{
+	down_read_nested(&rw->rwsem, lsc);
+	AuDbgRcntInc(rw);
+}
+
+static inline void au_rw_read_unlock(struct au_rwsem *rw)
+{
+	AuRwMustReadLock(rw);
+	AuDbgRcntDec(rw);
+	up_read(&rw->rwsem);
+}
+
+static inline void au_rw_dgrade_lock(struct au_rwsem *rw)
+{
+	AuRwMustWriteLock(rw);
+	AuDbgRcntInc(rw);
+	AuDbgWcntDec(rw);
+	downgrade_write(&rw->rwsem);
+}
+
+static inline void au_rw_write_lock(struct au_rwsem *rw)
+{
+	down_write(&rw->rwsem);
+	AuDbgWcntInc(rw);
+}
+
+static inline void au_rw_write_lock_nested(struct au_rwsem *rw,
+					   unsigned int lsc)
+{
+	down_write_nested(&rw->rwsem, lsc);
+	AuDbgWcntInc(rw);
+}
+
+static inline void au_rw_write_unlock(struct au_rwsem *rw)
+{
+	AuRwMustWriteLock(rw);
+	AuDbgWcntDec(rw);
+	up_write(&rw->rwsem);
+}
+
+/* why is not _nested version defined */
+static inline int au_rw_read_trylock(struct au_rwsem *rw)
+{
+	int ret = down_read_trylock(&rw->rwsem);
+	if (ret)
+		AuDbgRcntInc(rw);
+	return ret;
+}
+
+static inline int au_rw_write_trylock(struct au_rwsem *rw)
+{
+	int ret = down_write_trylock(&rw->rwsem);
+	if (ret)
+		AuDbgWcntInc(rw);
+	return ret;
+}
+
+#undef AuDbgCntInit
+#undef AuDbgRcntInc
+#undef AuDbgRcntDec
+#undef AuDbgWcntInc
+#undef AuDbgWcntDec
+
+#define AuSimpleLockRwsemFuncs(prefix, param, rwsem) \
+static inline void prefix##_read_lock(param) \
+{ au_rw_read_lock(rwsem); } \
+static inline void prefix##_write_lock(param) \
+{ au_rw_write_lock(rwsem); } \
+static inline int prefix##_read_trylock(param) \
+{ return au_rw_read_trylock(rwsem); } \
+static inline int prefix##_write_trylock(param) \
+{ return au_rw_write_trylock(rwsem); }
+/* why is not _nested version defined */
+/* static inline void prefix##_read_trylock_nested(param, lsc)
+{ au_rw_read_trylock_nested(rwsem, lsc)); }
+static inline void prefix##_write_trylock_nestd(param, lsc)
+{ au_rw_write_trylock_nested(rwsem, lsc); } */
+
+#define AuSimpleUnlockRwsemFuncs(prefix, param, rwsem) \
+static inline void prefix##_read_unlock(param) \
+{ au_rw_read_unlock(rwsem); } \
+static inline void prefix##_write_unlock(param) \
+{ au_rw_write_unlock(rwsem); } \
+static inline void prefix##_downgrade_lock(param) \
+{ au_rw_dgrade_lock(rwsem); }
+
+#define AuSimpleRwsemFuncs(prefix, param, rwsem) \
+	AuSimpleLockRwsemFuncs(prefix, param, rwsem) \
+	AuSimpleUnlockRwsemFuncs(prefix, param, rwsem)
+
+#endif /* __KERNEL__ */
+#endif /* __AUFS_RWSEM_H__ */
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/i_op_ren.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/i_op_ren.c
@@ -0,0 +1,961 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * inode operation (rename entry)
+ * todo: this is crazy monster
+ */
+
+#include "aufs.h"
+
+enum { AuSRC, AuDST, AuSrcDst };
+enum { AuPARENT, AuCHILD, AuParentChild };
+
+#define AuRen_ISDIR	1
+#define AuRen_ISSAMEDIR	(1 << 1)
+#define AuRen_WHSRC	(1 << 2)
+#define AuRen_WHDST	(1 << 3)
+#define AuRen_MNT_WRITE	(1 << 4)
+#define AuRen_DT_DSTDIR	(1 << 5)
+#define AuRen_DIROPQ	(1 << 6)
+#define AuRen_CPUP	(1 << 7)
+#define au_ftest_ren(flags, name)	((flags) & AuRen_##name)
+#define au_fset_ren(flags, name)	{ (flags) |= AuRen_##name; }
+#define au_fclr_ren(flags, name)	{ (flags) &= ~AuRen_##name; }
+
+struct au_ren_args {
+	struct {
+		struct dentry *dentry, *h_dentry, *parent, *h_parent,
+			*wh_dentry;
+		struct inode *dir, *inode;
+		struct au_hinode *hdir;
+		struct au_dtime dt[AuParentChild];
+		aufs_bindex_t bstart;
+	} sd[AuSrcDst];
+
+#define src_dentry	sd[AuSRC].dentry
+#define src_dir		sd[AuSRC].dir
+#define src_inode	sd[AuSRC].inode
+#define src_h_dentry	sd[AuSRC].h_dentry
+#define src_parent	sd[AuSRC].parent
+#define src_h_parent	sd[AuSRC].h_parent
+#define src_wh_dentry	sd[AuSRC].wh_dentry
+#define src_hdir	sd[AuSRC].hdir
+#define src_h_dir	sd[AuSRC].hdir->hi_inode
+#define src_dt		sd[AuSRC].dt
+#define src_bstart	sd[AuSRC].bstart
+
+#define dst_dentry	sd[AuDST].dentry
+#define dst_dir		sd[AuDST].dir
+#define dst_inode	sd[AuDST].inode
+#define dst_h_dentry	sd[AuDST].h_dentry
+#define dst_parent	sd[AuDST].parent
+#define dst_h_parent	sd[AuDST].h_parent
+#define dst_wh_dentry	sd[AuDST].wh_dentry
+#define dst_hdir	sd[AuDST].hdir
+#define dst_h_dir	sd[AuDST].hdir->hi_inode
+#define dst_dt		sd[AuDST].dt
+#define dst_bstart	sd[AuDST].bstart
+
+	struct dentry *h_trap;
+	struct au_branch *br;
+	struct au_hinode *src_hinode;
+	struct path h_path;
+	struct au_nhash whlist;
+	aufs_bindex_t btgt;
+
+	unsigned int flags;
+
+	struct au_whtmp_rmdir *thargs;
+	struct dentry *h_dst;
+};
+
+/* ---------------------------------------------------------------------- */
+
+/*
+ * functions for reverting.
+ * when an error happened in a single rename systemcall, we should revert
+ * everything as if nothing happend.
+ * we don't need to revert the copied-up/down the parent dir since they are
+ * harmless.
+ */
+
+#define RevertFailure(fmt, ...) do { \
+	AuIOErr("revert failure: " fmt " (%d, %d)\n", \
+		##__VA_ARGS__, err, rerr); \
+	err = -EIO; \
+} while (0)
+
+static void au_ren_rev_diropq(int err, struct au_ren_args *a)
+{
+	int rerr;
+
+	au_hin_imtx_lock_nested(a->src_hinode, AuLsc_I_CHILD);
+	rerr = au_diropq_remove(a->src_dentry, a->btgt);
+	au_hin_imtx_unlock(a->src_hinode);
+	if (rerr)
+		RevertFailure("remove diropq %.*s", AuDLNPair(a->src_dentry));
+}
+
+
+static void au_ren_rev_rename(int err, struct au_ren_args *a)
+{
+	int rerr;
+
+	a->h_path.dentry = au_lkup_one(&a->src_dentry->d_name, a->src_h_parent,
+				       a->br, /*nd*/NULL);
+	rerr = PTR_ERR(a->h_path.dentry);
+	if (IS_ERR(a->h_path.dentry)) {
+		RevertFailure("au_lkup_one %.*s", AuDLNPair(a->src_dentry));
+		return;
+	}
+
+	rerr = vfsub_rename(a->dst_h_dir,
+			    au_h_dptr(a->src_dentry, a->btgt),
+			    a->src_h_dir, &a->h_path);
+	d_drop(a->h_path.dentry);
+	dput(a->h_path.dentry);
+	/* au_set_h_dptr(a->src_dentry, a->btgt, NULL); */
+	if (rerr)
+		RevertFailure("rename %.*s", AuDLNPair(a->src_dentry));
+}
+
+static void au_ren_rev_cpup(int err, struct au_ren_args *a)
+{
+	int rerr;
+
+	a->h_path.dentry = a->dst_h_dentry;
+	rerr = vfsub_unlink(a->dst_h_dir, &a->h_path, /*force*/0);
+	au_set_h_dptr(a->src_dentry, a->btgt, NULL);
+	au_set_dbstart(a->src_dentry, a->src_bstart);
+	if (rerr)
+		RevertFailure("unlink %.*s", AuDLNPair(a->dst_h_dentry));
+}
+
+
+static void au_ren_rev_whtmp(int err, struct au_ren_args *a)
+{
+	int rerr;
+
+	a->h_path.dentry = au_lkup_one(&a->dst_dentry->d_name, a->dst_h_parent,
+				       a->br, /*nd*/NULL);
+	rerr = PTR_ERR(a->h_path.dentry);
+	if (IS_ERR(a->h_path.dentry)) {
+		RevertFailure("lookup %.*s", AuDLNPair(a->dst_dentry));
+		return;
+	}
+	if (a->h_path.dentry->d_inode) {
+		d_drop(a->h_path.dentry);
+		dput(a->h_path.dentry);
+		return;
+	}
+
+	rerr = vfsub_rename(a->dst_h_dir, a->h_dst, a->dst_h_dir, &a->h_path);
+	d_drop(a->h_path.dentry);
+	dput(a->h_path.dentry);
+	if (!rerr) {
+		au_set_h_dptr(a->dst_dentry, a->btgt, NULL);
+		au_set_h_dptr(a->dst_dentry, a->btgt, dget(a->h_dst));
+	} else
+		RevertFailure("rename %.*s", AuDLNPair(a->h_dst));
+}
+
+static void au_ren_rev_whsrc(int err, struct au_ren_args *a)
+{
+	int rerr;
+
+	a->h_path.dentry = a->src_wh_dentry;
+	rerr = au_wh_unlink_dentry(a->src_h_dir, &a->h_path, a->src_dentry);
+	if (rerr)
+		RevertFailure("unlink %.*s", AuDLNPair(a->src_wh_dentry));
+}
+
+static void au_ren_rev_drop(struct au_ren_args *a)
+{
+	struct dentry *d, *h_d;
+	int i;
+	aufs_bindex_t bend, bindex;
+
+	for (i = 0; i < AuSrcDst; i++) {
+		d = a->sd[i].dentry;
+		d_drop(d);
+		bend = au_dbend(d);
+		for (bindex = au_dbstart(d); bindex <= bend; bindex++) {
+			h_d = au_h_dptr(d, bindex);
+			if (h_d)
+				d_drop(h_d);
+		}
+	}
+
+	au_update_dbstart(a->dst_dentry);
+	if (a->thargs)
+		d_drop(a->h_dst);
+}
+#undef RevertFailure
+
+/* ---------------------------------------------------------------------- */
+
+/*
+ * when we have to copyup the renaming entry, do it with the rename-target name
+ * in order to minimize the cost (the later actual rename is unnecessary).
+ * otherwise rename it on the target branch.
+ */
+static int au_ren_or_cpup(struct au_ren_args *a)
+{
+	int err;
+	struct dentry *d;
+
+	d = a->src_dentry;
+	if (au_dbstart(d) == a->btgt) {
+		a->h_path.dentry = a->dst_h_dentry;
+		if (au_ftest_ren(a->flags, DIROPQ)
+		    && au_dbdiropq(d) == a->btgt)
+			au_fclr_ren(a->flags, DIROPQ);
+		AuDebugOn(au_dbstart(d) != a->btgt);
+		err = vfsub_rename(a->src_h_dir, au_h_dptr(d, a->btgt),
+				   a->dst_h_dir, &a->h_path);
+	} else {
+		struct mutex *h_mtx = &a->src_h_dentry->d_inode->i_mutex;
+
+		au_fset_ren(a->flags, CPUP);
+		mutex_lock_nested(h_mtx, AuLsc_I_CHILD);
+		au_set_dbstart(d, a->btgt);
+		au_set_h_dptr(d, a->btgt, dget(a->dst_h_dentry));
+		err = au_sio_cpup_single(d, a->btgt, a->src_bstart, -1,
+					 !AuCpup_DTIME, a->dst_parent);
+		if (unlikely(err)) {
+			au_set_h_dptr(d, a->btgt, NULL);
+			au_set_dbstart(d, a->src_bstart);
+		}
+		mutex_unlock(h_mtx);
+	}
+
+	return err;
+}
+
+/* cf. aufs_rmdir() */
+static int au_ren_del_whtmp(struct au_ren_args *a)
+{
+	int err;
+	struct inode *dir;
+
+	dir = a->dst_dir;
+	SiMustAnyLock(dir->i_sb);
+	if (!au_nhash_test_longer_wh(&a->whlist, a->btgt,
+				     au_sbi(dir->i_sb)->si_dirwh)
+	    || au_test_fs_remote(a->h_dst->d_sb)) {
+		err = au_whtmp_rmdir(dir, a->btgt, a->h_dst, &a->whlist);
+		if (unlikely(err))
+			pr_warning("failed removing whtmp dir %.*s (%d), "
+				   "ignored.\n", AuDLNPair(a->h_dst), err);
+	} else {
+		au_nhash_wh_free(&a->thargs->whlist);
+		a->thargs->whlist = a->whlist;
+		a->whlist.nh_num = 0;
+		au_whtmp_kick_rmdir(dir, a->btgt, a->h_dst, a->thargs);
+		dput(a->h_dst);
+		a->thargs = NULL;
+	}
+
+	return 0;
+}
+
+/* make it 'opaque' dir. */
+static int au_ren_diropq(struct au_ren_args *a)
+{
+	int err;
+	struct dentry *diropq;
+
+	err = 0;
+	a->src_hinode = au_hi(a->src_inode, a->btgt);
+	au_hin_imtx_lock_nested(a->src_hinode, AuLsc_I_CHILD);
+	diropq = au_diropq_create(a->src_dentry, a->btgt);
+	au_hin_imtx_unlock(a->src_hinode);
+	if (IS_ERR(diropq))
+		err = PTR_ERR(diropq);
+	dput(diropq);
+
+	return err;
+}
+
+static int do_rename(struct au_ren_args *a)
+{
+	int err;
+	struct dentry *d, *h_d;
+
+	/* prepare workqueue args for asynchronous rmdir */
+	h_d = a->dst_h_dentry;
+	if (au_ftest_ren(a->flags, ISDIR) && h_d->d_inode) {
+		err = -ENOMEM;
+		a->thargs = au_whtmp_rmdir_alloc(a->src_dentry->d_sb, GFP_NOFS);
+		if (unlikely(!a->thargs))
+			goto out;
+		a->h_dst = dget(h_d);
+	}
+
+	/* create whiteout for src_dentry */
+	if (au_ftest_ren(a->flags, WHSRC)) {
+		a->src_wh_dentry
+			= au_wh_create(a->src_dentry, a->btgt, a->src_h_parent);
+		err = PTR_ERR(a->src_wh_dentry);
+		if (IS_ERR(a->src_wh_dentry))
+			goto out_thargs;
+	}
+
+	/* lookup whiteout for dentry */
+	if (au_ftest_ren(a->flags, WHDST)) {
+		h_d = au_wh_lkup(a->dst_h_parent, &a->dst_dentry->d_name,
+				 a->br);
+		err = PTR_ERR(h_d);
+		if (IS_ERR(h_d))
+			goto out_whsrc;
+		if (!h_d->d_inode)
+			dput(h_d);
+		else
+			a->dst_wh_dentry = h_d;
+	}
+
+	/* rename dentry to tmpwh */
+	if (a->thargs) {
+		err = au_whtmp_ren(a->dst_h_dentry, a->br);
+		if (unlikely(err))
+			goto out_whdst;
+
+		d = a->dst_dentry;
+		au_set_h_dptr(d, a->btgt, NULL);
+		err = au_lkup_neg(d, a->btgt);
+		if (unlikely(err))
+			goto out_whtmp;
+		a->dst_h_dentry = au_h_dptr(d, a->btgt);
+	}
+
+	/* cpup src */
+	if (a->dst_h_dentry->d_inode && a->src_bstart != a->btgt) {
+		struct mutex *h_mtx = &a->src_h_dentry->d_inode->i_mutex;
+
+		mutex_lock_nested(h_mtx, AuLsc_I_CHILD);
+		err = au_sio_cpup_simple(a->src_dentry, a->btgt, -1,
+					 !AuCpup_DTIME);
+		mutex_unlock(h_mtx);
+		if (unlikely(err))
+			goto out_whtmp;
+	}
+
+	/* rename by vfs_rename or cpup */
+	d = a->dst_dentry;
+	if (au_ftest_ren(a->flags, ISDIR)
+	    && (a->dst_wh_dentry
+		|| au_dbdiropq(d) == a->btgt
+		/* hide the lower to keep xino */
+		|| a->btgt < au_dbend(d)
+		|| au_opt_test(au_mntflags(d->d_sb), ALWAYS_DIROPQ)))
+		au_fset_ren(a->flags, DIROPQ);
+	err = au_ren_or_cpup(a);
+	if (unlikely(err))
+		/* leave the copied-up one */
+		goto out_whtmp;
+
+	/* make dir opaque */
+	if (au_ftest_ren(a->flags, DIROPQ)) {
+		err = au_ren_diropq(a);
+		if (unlikely(err))
+			goto out_rename;
+	}
+
+	/* update target timestamps */
+	AuDebugOn(au_dbstart(a->src_dentry) != a->btgt);
+	a->h_path.dentry = au_h_dptr(a->src_dentry, a->btgt);
+	vfsub_update_h_iattr(&a->h_path, /*did*/NULL); /*ignore*/
+	a->src_inode->i_ctime = a->h_path.dentry->d_inode->i_ctime;
+
+	/* remove whiteout for dentry */
+	if (a->dst_wh_dentry) {
+		a->h_path.dentry = a->dst_wh_dentry;
+		err = au_wh_unlink_dentry(a->dst_h_dir, &a->h_path,
+					  a->dst_dentry);
+		if (unlikely(err))
+			goto out_diropq;
+	}
+
+	/* remove whtmp */
+	if (a->thargs)
+		au_ren_del_whtmp(a); /* ignore this error */
+
+	err = 0;
+	goto out_success;
+
+ out_diropq:
+	if (au_ftest_ren(a->flags, DIROPQ))
+		au_ren_rev_diropq(err, a);
+ out_rename:
+	if (!au_ftest_ren(a->flags, CPUP))
+		au_ren_rev_rename(err, a);
+	else
+		au_ren_rev_cpup(err, a);
+ out_whtmp:
+	if (a->thargs)
+		au_ren_rev_whtmp(err, a);
+ out_whdst:
+	dput(a->dst_wh_dentry);
+	a->dst_wh_dentry = NULL;
+ out_whsrc:
+	if (a->src_wh_dentry)
+		au_ren_rev_whsrc(err, a);
+	au_ren_rev_drop(a);
+ out_success:
+	dput(a->src_wh_dentry);
+	dput(a->dst_wh_dentry);
+ out_thargs:
+	if (a->thargs) {
+		dput(a->h_dst);
+		au_whtmp_rmdir_free(a->thargs);
+		a->thargs = NULL;
+	}
+ out:
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/*
+ * test if @dentry dir can be rename destination or not.
+ * success means, it is a logically empty dir.
+ */
+static int may_rename_dstdir(struct dentry *dentry, struct au_nhash *whlist)
+{
+	return au_test_empty(dentry, whlist);
+}
+
+/*
+ * test if @dentry dir can be rename source or not.
+ * if it can, return 0 and @children is filled.
+ * success means,
+ * - it is a logically empty dir.
+ * - or, it exists on writable branch and has no children including whiteouts
+ *       on the lower branch.
+ */
+static int may_rename_srcdir(struct dentry *dentry, aufs_bindex_t btgt)
+{
+	int err;
+	unsigned int rdhash;
+	aufs_bindex_t bstart;
+
+	bstart = au_dbstart(dentry);
+	if (bstart != btgt) {
+		struct au_nhash whlist;
+
+		SiMustAnyLock(dentry->d_sb);
+		rdhash = au_sbi(dentry->d_sb)->si_rdhash;
+		if (!rdhash)
+			rdhash = au_rdhash_est(au_dir_size(/*file*/NULL,
+							   dentry));
+		err = au_nhash_alloc(&whlist, rdhash, GFP_NOFS);
+		if (unlikely(err))
+			goto out;
+		err = au_test_empty(dentry, &whlist);
+		au_nhash_wh_free(&whlist);
+		goto out;
+	}
+
+	if (bstart == au_dbtaildir(dentry))
+		return 0; /* success */
+
+	err = au_test_empty_lower(dentry);
+
+ out:
+	if (err == -ENOTEMPTY) {
+		AuWarn1("renaming dir who has child(ren) on multiple branches,"
+			" is not supported\n");
+		err = -EXDEV;
+	}
+	return err;
+}
+
+/* side effect: sets whlist and h_dentry */
+static int au_ren_may_dir(struct au_ren_args *a)
+{
+	int err;
+	unsigned int rdhash;
+	struct dentry *d;
+
+	d = a->dst_dentry;
+	SiMustAnyLock(d->d_sb);
+
+	err = 0;
+	if (au_ftest_ren(a->flags, ISDIR) && a->dst_inode) {
+		rdhash = au_sbi(d->d_sb)->si_rdhash;
+		if (!rdhash)
+			rdhash = au_rdhash_est(au_dir_size(/*file*/NULL, d));
+		err = au_nhash_alloc(&a->whlist, rdhash, GFP_NOFS);
+		if (unlikely(err))
+			goto out;
+
+		au_set_dbstart(d, a->dst_bstart);
+		err = may_rename_dstdir(d, &a->whlist);
+		au_set_dbstart(d, a->btgt);
+	}
+	a->dst_h_dentry = au_h_dptr(d, au_dbstart(d));
+	if (unlikely(err))
+		goto out;
+
+	d = a->src_dentry;
+	a->src_h_dentry = au_h_dptr(d, au_dbstart(d));
+	if (au_ftest_ren(a->flags, ISDIR)) {
+		err = may_rename_srcdir(d, a->btgt);
+		if (unlikely(err)) {
+			au_nhash_wh_free(&a->whlist);
+			a->whlist.nh_num = 0;
+		}
+	}
+ out:
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/*
+ * simple tests for rename.
+ * following the checks in vfs, plus the parent-child relationship.
+ */
+static int au_may_ren(struct au_ren_args *a)
+{
+	int err, isdir;
+	struct inode *h_inode;
+
+	if (a->src_bstart == a->btgt) {
+		err = au_may_del(a->src_dentry, a->btgt, a->src_h_parent,
+				 au_ftest_ren(a->flags, ISDIR));
+		if (unlikely(err))
+			goto out;
+		err = -EINVAL;
+		if (unlikely(a->src_h_dentry == a->h_trap))
+			goto out;
+	}
+
+	err = 0;
+	if (a->dst_bstart != a->btgt)
+		goto out;
+
+	err = -EIO;
+	h_inode = a->dst_h_dentry->d_inode;
+	isdir = !!au_ftest_ren(a->flags, ISDIR);
+	if (!a->dst_dentry->d_inode) {
+		if (unlikely(h_inode))
+			goto out;
+		err = au_may_add(a->dst_dentry, a->btgt, a->dst_h_parent,
+				 isdir);
+	} else {
+		if (unlikely(!h_inode || !h_inode->i_nlink))
+			goto out;
+		err = au_may_del(a->dst_dentry, a->btgt, a->dst_h_parent,
+				 isdir);
+		if (unlikely(err))
+			goto out;
+		err = -ENOTEMPTY;
+		if (unlikely(a->dst_h_dentry == a->h_trap))
+			goto out;
+		err = 0;
+	}
+
+ out:
+	if (unlikely(err == -ENOENT || err == -EEXIST))
+		err = -EIO;
+	AuTraceErr(err);
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/*
+ * locking order
+ * (VFS)
+ * - src_dir and dir by lock_rename()
+ * - inode if exitsts
+ * (aufs)
+ * - lock all
+ *   + src_dentry and dentry by aufs_read_and_write_lock2() which calls,
+ *     + si_read_lock
+ *     + di_write_lock2_child()
+ *       + di_write_lock_child()
+ *	   + ii_write_lock_child()
+ *       + di_write_lock_child2()
+ *	   + ii_write_lock_child2()
+ *     + src_parent and parent
+ *       + di_write_lock_parent()
+ *	   + ii_write_lock_parent()
+ *       + di_write_lock_parent2()
+ *	   + ii_write_lock_parent2()
+ *   + lower src_dir and dir by vfsub_lock_rename()
+ *   + verify the every relationships between child and parent. if any
+ *     of them failed, unlock all and return -EBUSY.
+ */
+static void au_ren_unlock(struct au_ren_args *a)
+{
+	struct super_block *sb;
+
+	sb = a->dst_dentry->d_sb;
+	if (au_ftest_ren(a->flags, MNT_WRITE))
+		mnt_drop_write(a->br->br_mnt);
+	vfsub_unlock_rename(a->src_h_parent, a->src_hdir,
+			    a->dst_h_parent, a->dst_hdir);
+}
+
+static int au_ren_lock(struct au_ren_args *a)
+{
+	int err;
+	unsigned int udba;
+
+	err = 0;
+	a->src_h_parent = au_h_dptr(a->src_parent, a->btgt);
+	a->src_hdir = au_hi(a->src_dir, a->btgt);
+	a->dst_h_parent = au_h_dptr(a->dst_parent, a->btgt);
+	a->dst_hdir = au_hi(a->dst_dir, a->btgt);
+	a->h_trap = vfsub_lock_rename(a->src_h_parent, a->src_hdir,
+				      a->dst_h_parent, a->dst_hdir);
+	udba = au_opt_udba(a->src_dentry->d_sb);
+	if (unlikely(a->src_hdir->hi_inode != a->src_h_parent->d_inode
+		     || a->dst_hdir->hi_inode != a->dst_h_parent->d_inode))
+		err = au_busy_or_stale();
+	if (!err && au_dbstart(a->src_dentry) == a->btgt)
+		err = au_h_verify(a->src_h_dentry, udba,
+				  a->src_h_parent->d_inode, a->src_h_parent,
+				  a->br);
+	if (!err && au_dbstart(a->dst_dentry) == a->btgt)
+		err = au_h_verify(a->dst_h_dentry, udba,
+				  a->dst_h_parent->d_inode, a->dst_h_parent,
+				  a->br);
+	if (!err) {
+		err = mnt_want_write(a->br->br_mnt);
+		if (unlikely(err))
+			goto out_unlock;
+		au_fset_ren(a->flags, MNT_WRITE);
+		goto out; /* success */
+	}
+
+	err = au_busy_or_stale();
+
+ out_unlock:
+	au_ren_unlock(a);
+ out:
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static void au_ren_refresh_dir(struct au_ren_args *a)
+{
+	struct inode *dir;
+
+	dir = a->dst_dir;
+	dir->i_version++;
+	if (au_ftest_ren(a->flags, ISDIR)) {
+		/* is this updating defined in POSIX? */
+		au_cpup_attr_timesizes(a->src_inode);
+		au_cpup_attr_nlink(dir, /*force*/1);
+		if (a->dst_inode) {
+			clear_nlink(a->dst_inode);
+			au_cpup_attr_timesizes(a->dst_inode);
+		}
+	}
+	if (au_ibstart(dir) == a->btgt)
+		au_cpup_attr_timesizes(dir);
+
+	if (au_ftest_ren(a->flags, ISSAMEDIR))
+		return;
+
+	dir = a->src_dir;
+	dir->i_version++;
+	if (au_ftest_ren(a->flags, ISDIR))
+		au_cpup_attr_nlink(dir, /*force*/1);
+	if (au_ibstart(dir) == a->btgt)
+		au_cpup_attr_timesizes(dir);
+}
+
+static void au_ren_refresh(struct au_ren_args *a)
+{
+	aufs_bindex_t bend, bindex;
+	struct dentry *d, *h_d;
+	struct inode *i, *h_i;
+	struct super_block *sb;
+
+	d = a->src_dentry;
+	au_set_dbwh(d, -1);
+	bend = au_dbend(d);
+	for (bindex = a->btgt + 1; bindex <= bend; bindex++) {
+		h_d = au_h_dptr(d, bindex);
+		if (h_d)
+			au_set_h_dptr(d, bindex, NULL);
+	}
+	au_set_dbend(d, a->btgt);
+
+	sb = d->d_sb;
+	i = a->src_inode;
+	if (au_opt_test(au_mntflags(sb), PLINK) && au_plink_test(i))
+		return; /* success */
+
+	bend = au_ibend(i);
+	for (bindex = a->btgt + 1; bindex <= bend; bindex++) {
+		h_i = au_h_iptr(i, bindex);
+		if (h_i) {
+			au_xino_write(sb, bindex, h_i->i_ino, /*ino*/0);
+			/* ignore this error */
+			au_set_h_iptr(i, bindex, NULL, 0);
+		}
+	}
+	au_set_ibend(i, a->btgt);
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* mainly for link(2) and rename(2) */
+int au_wbr(struct dentry *dentry, aufs_bindex_t btgt)
+{
+	aufs_bindex_t bdiropq, bwh;
+	struct dentry *parent;
+	struct au_branch *br;
+
+	parent = dentry->d_parent;
+	IMustLock(parent->d_inode); /* dir is locked */
+
+	bdiropq = au_dbdiropq(parent);
+	bwh = au_dbwh(dentry);
+	br = au_sbr(dentry->d_sb, btgt);
+	if (au_br_rdonly(br)
+	    || (0 <= bdiropq && bdiropq < btgt)
+	    || (0 <= bwh && bwh < btgt))
+		btgt = -1;
+
+	AuDbg("btgt %d\n", btgt);
+	return btgt;
+}
+
+/* sets src_bstart, dst_bstart and btgt */
+static int au_ren_wbr(struct au_ren_args *a)
+{
+	int err;
+	struct au_wr_dir_args wr_dir_args = {
+		/* .force_btgt	= -1, */
+		.flags		= AuWrDir_ADD_ENTRY
+	};
+
+	a->src_bstart = au_dbstart(a->src_dentry);
+	a->dst_bstart = au_dbstart(a->dst_dentry);
+	if (au_ftest_ren(a->flags, ISDIR))
+		au_fset_wrdir(wr_dir_args.flags, ISDIR);
+	wr_dir_args.force_btgt = a->src_bstart;
+	if (a->dst_inode && a->dst_bstart < a->src_bstart)
+		wr_dir_args.force_btgt = a->dst_bstart;
+	wr_dir_args.force_btgt = au_wbr(a->dst_dentry, wr_dir_args.force_btgt);
+	err = au_wr_dir(a->dst_dentry, a->src_dentry, &wr_dir_args);
+	a->btgt = err;
+
+	return err;
+}
+
+static void au_ren_dt(struct au_ren_args *a)
+{
+	a->h_path.dentry = a->src_h_parent;
+	au_dtime_store(a->src_dt + AuPARENT, a->src_parent, &a->h_path);
+	if (!au_ftest_ren(a->flags, ISSAMEDIR)) {
+		a->h_path.dentry = a->dst_h_parent;
+		au_dtime_store(a->dst_dt + AuPARENT, a->dst_parent, &a->h_path);
+	}
+
+	au_fclr_ren(a->flags, DT_DSTDIR);
+	if (!au_ftest_ren(a->flags, ISDIR))
+		return;
+
+	a->h_path.dentry = a->src_h_dentry;
+	au_dtime_store(a->src_dt + AuCHILD, a->src_dentry, &a->h_path);
+	if (a->dst_h_dentry->d_inode) {
+		au_fset_ren(a->flags, DT_DSTDIR);
+		a->h_path.dentry = a->dst_h_dentry;
+		au_dtime_store(a->dst_dt + AuCHILD, a->dst_dentry, &a->h_path);
+	}
+}
+
+static void au_ren_rev_dt(int err, struct au_ren_args *a)
+{
+	struct dentry *h_d;
+	struct mutex *h_mtx;
+
+	au_dtime_revert(a->src_dt + AuPARENT);
+	if (!au_ftest_ren(a->flags, ISSAMEDIR))
+		au_dtime_revert(a->dst_dt + AuPARENT);
+
+	if (au_ftest_ren(a->flags, ISDIR) && err != -EIO) {
+		h_d = a->src_dt[AuCHILD].dt_h_path.dentry;
+		h_mtx = &h_d->d_inode->i_mutex;
+		mutex_lock_nested(h_mtx, AuLsc_I_CHILD);
+		au_dtime_revert(a->src_dt + AuCHILD);
+		mutex_unlock(h_mtx);
+
+		if (au_ftest_ren(a->flags, DT_DSTDIR)) {
+			h_d = a->dst_dt[AuCHILD].dt_h_path.dentry;
+			h_mtx = &h_d->d_inode->i_mutex;
+			mutex_lock_nested(h_mtx, AuLsc_I_CHILD);
+			au_dtime_revert(a->dst_dt + AuCHILD);
+			mutex_unlock(h_mtx);
+		}
+	}
+}
+
+/* ---------------------------------------------------------------------- */
+
+int aufs_rename(struct inode *_src_dir, struct dentry *_src_dentry,
+		struct inode *_dst_dir, struct dentry *_dst_dentry)
+{
+	int err;
+	/* reduce stack space */
+	struct au_ren_args *a;
+
+	AuDbg("%.*s, %.*s\n", AuDLNPair(_src_dentry), AuDLNPair(_dst_dentry));
+	IMustLock(_src_dir);
+	IMustLock(_dst_dir);
+
+	err = -ENOMEM;
+	BUILD_BUG_ON(sizeof(*a) > PAGE_SIZE);
+	a = kzalloc(sizeof(*a), GFP_NOFS);
+	if (unlikely(!a))
+		goto out;
+
+	a->src_dir = _src_dir;
+	a->src_dentry = _src_dentry;
+	a->src_inode = a->src_dentry->d_inode;
+	a->src_parent = a->src_dentry->d_parent; /* dir inode is locked */
+	a->dst_dir = _dst_dir;
+	a->dst_dentry = _dst_dentry;
+	a->dst_inode = a->dst_dentry->d_inode;
+	a->dst_parent = a->dst_dentry->d_parent; /* dir inode is locked */
+	if (a->dst_inode) {
+		IMustLock(a->dst_inode);
+		au_igrab(a->dst_inode);
+	}
+
+	err = -ENOTDIR;
+	if (S_ISDIR(a->src_inode->i_mode)) {
+		au_fset_ren(a->flags, ISDIR);
+		if (unlikely(a->dst_inode && !S_ISDIR(a->dst_inode->i_mode)))
+			goto out_free;
+		aufs_read_and_write_lock2(a->dst_dentry, a->src_dentry,
+					  AuLock_DIR | AuLock_FLUSH);
+	} else
+		aufs_read_and_write_lock2(a->dst_dentry, a->src_dentry,
+					  AuLock_FLUSH);
+
+	au_fset_ren(a->flags, ISSAMEDIR); /* temporary */
+	di_write_lock_parent(a->dst_parent);
+
+	/* which branch we process */
+	err = au_ren_wbr(a);
+	if (unlikely(err < 0))
+		goto out_unlock;
+	a->br = au_sbr(a->dst_dentry->d_sb, a->btgt);
+	a->h_path.mnt = a->br->br_mnt;
+
+	/* are they available to be renamed */
+	err = au_ren_may_dir(a);
+	if (unlikely(err))
+		goto out_children;
+
+	/* prepare the writable parent dir on the same branch */
+	if (a->dst_bstart == a->btgt) {
+		au_fset_ren(a->flags, WHDST);
+	} else {
+		err = au_cpup_dirs(a->dst_dentry, a->btgt);
+		if (unlikely(err))
+			goto out_children;
+	}
+
+	if (a->src_dir != a->dst_dir) {
+		/*
+		 * this temporary unlock is safe,
+		 * because both dir->i_mutex are locked.
+		 */
+		di_write_unlock(a->dst_parent);
+		di_write_lock_parent(a->src_parent);
+		err = au_wr_dir_need_wh(a->src_dentry,
+					au_ftest_ren(a->flags, ISDIR),
+					&a->btgt);
+		di_write_unlock(a->src_parent);
+		di_write_lock2_parent(a->src_parent, a->dst_parent, /*isdir*/1);
+		au_fclr_ren(a->flags, ISSAMEDIR);
+	} else
+		err = au_wr_dir_need_wh(a->src_dentry,
+					au_ftest_ren(a->flags, ISDIR),
+					&a->btgt);
+	if (unlikely(err < 0))
+		goto out_children;
+	if (err)
+		au_fset_ren(a->flags, WHSRC);
+
+	/* lock them all */
+	err = au_ren_lock(a);
+	if (unlikely(err))
+		goto out_children;
+
+	if (!au_opt_test(au_mntflags(a->dst_dir->i_sb), UDBA_NONE))
+		err = au_may_ren(a);
+	else if (unlikely(a->dst_dentry->d_name.len > AUFS_MAX_NAMELEN))
+		err = -ENAMETOOLONG;
+	if (unlikely(err))
+		goto out_hdir;
+
+	/* store timestamps to be revertible */
+	au_ren_dt(a);
+
+	/* here we go */
+	err = do_rename(a);
+	if (unlikely(err))
+		goto out_dt;
+
+	/* update dir attributes */
+	au_ren_refresh_dir(a);
+
+	/* dput/iput all lower dentries */
+	au_ren_refresh(a);
+
+	goto out_hdir; /* success */
+
+ out_dt:
+	au_ren_rev_dt(err, a);
+ out_hdir:
+	au_ren_unlock(a);
+ out_children:
+	au_nhash_wh_free(&a->whlist);
+ out_unlock:
+	if (unlikely(err && au_ftest_ren(a->flags, ISDIR))) {
+		au_update_dbstart(a->dst_dentry);
+		d_drop(a->dst_dentry);
+	}
+	if (!err)
+		d_move(a->src_dentry, a->dst_dentry);
+	if (au_ftest_ren(a->flags, ISSAMEDIR))
+		di_write_unlock(a->dst_parent);
+	else
+		di_write_unlock2(a->src_parent, a->dst_parent);
+	aufs_read_and_write_unlock2(a->dst_dentry, a->src_dentry);
+ out_free:
+	iput(a->dst_inode);
+	if (a->thargs)
+		au_whtmp_rmdir_free(a->thargs);
+	kfree(a);
+ out:
+	AuTraceErr(err);
+	return err;
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/dbgaufs.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/dbgaufs.c
@@ -0,0 +1,331 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * debugfs interface
+ */
+
+#include <linux/debugfs.h>
+#include "aufs.h"
+
+#ifndef CONFIG_SYSFS
+#error DEBUG_FS depends upon SYSFS
+#endif
+
+static struct dentry *dbgaufs;
+static const mode_t dbgaufs_mode = S_IRUSR | S_IRGRP | S_IROTH;
+
+/* 20 is max digits length of ulong 64 */
+struct dbgaufs_arg {
+	int n;
+	char a[20 * 4];
+};
+
+/*
+ * common function for all XINO files
+ */
+static int dbgaufs_xi_release(struct inode *inode __maybe_unused,
+			      struct file *file)
+{
+	kfree(file->private_data);
+	return 0;
+}
+
+static int dbgaufs_xi_open(struct file *xf, struct file *file, int do_fcnt)
+{
+	int err;
+	struct kstat st;
+	struct dbgaufs_arg *p;
+
+	err = -ENOMEM;
+	p = kmalloc(sizeof(*p), GFP_NOFS);
+	if (unlikely(!p))
+		goto out;
+
+	err = 0;
+	p->n = 0;
+	file->private_data = p;
+	if (!xf)
+		goto out;
+
+	err = vfs_getattr(xf->f_vfsmnt, xf->f_dentry, &st);
+	if (!err) {
+		if (do_fcnt)
+			p->n = snprintf
+				(p->a, sizeof(p->a), "%ld, %llux%lu %lld\n",
+				 (long)file_count(xf), st.blocks, st.blksize,
+				 (long long)st.size);
+		else
+			p->n = snprintf(p->a, sizeof(p->a), "%llux%lu %lld\n",
+					st.blocks, st.blksize,
+					(long long)st.size);
+		AuDebugOn(p->n >= sizeof(p->a));
+	} else {
+		p->n = snprintf(p->a, sizeof(p->a), "err %d\n", err);
+		err = 0;
+	}
+
+ out:
+	return err;
+
+}
+
+static ssize_t dbgaufs_xi_read(struct file *file, char __user *buf,
+			       size_t count, loff_t *ppos)
+{
+	struct dbgaufs_arg *p;
+
+	p = file->private_data;
+	return simple_read_from_buffer(buf, count, ppos, p->a, p->n);
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int dbgaufs_xib_open(struct inode *inode, struct file *file)
+{
+	int err;
+	struct au_sbinfo *sbinfo;
+	struct super_block *sb;
+
+	sbinfo = inode->i_private;
+	sb = sbinfo->si_sb;
+	si_noflush_read_lock(sb);
+	err = dbgaufs_xi_open(sbinfo->si_xib, file, /*do_fcnt*/0);
+	si_read_unlock(sb);
+	return err;
+}
+
+static const struct file_operations dbgaufs_xib_fop = {
+	.open		= dbgaufs_xib_open,
+	.release	= dbgaufs_xi_release,
+	.read		= dbgaufs_xi_read
+};
+
+/* ---------------------------------------------------------------------- */
+
+#define DbgaufsXi_PREFIX "xi"
+
+static int dbgaufs_xino_open(struct inode *inode, struct file *file)
+{
+	int err;
+	long l;
+	struct au_sbinfo *sbinfo;
+	struct super_block *sb;
+	struct file *xf;
+	struct qstr *name;
+
+	err = -ENOENT;
+	xf = NULL;
+	name = &file->f_dentry->d_name;
+	if (unlikely(name->len < sizeof(DbgaufsXi_PREFIX)
+		     || memcmp(name->name, DbgaufsXi_PREFIX,
+			       sizeof(DbgaufsXi_PREFIX) - 1)))
+		goto out;
+	err = strict_strtol(name->name + sizeof(DbgaufsXi_PREFIX) - 1, 10, &l);
+	if (unlikely(err))
+		goto out;
+
+	sbinfo = inode->i_private;
+	sb = sbinfo->si_sb;
+	si_noflush_read_lock(sb);
+	if (l <= au_sbend(sb)) {
+		xf = au_sbr(sb, (aufs_bindex_t)l)->br_xino.xi_file;
+		err = dbgaufs_xi_open(xf, file, /*do_fcnt*/1);
+	} else
+		err = -ENOENT;
+	si_read_unlock(sb);
+
+ out:
+	return err;
+}
+
+static const struct file_operations dbgaufs_xino_fop = {
+	.open		= dbgaufs_xino_open,
+	.release	= dbgaufs_xi_release,
+	.read		= dbgaufs_xi_read
+};
+
+void dbgaufs_brs_del(struct super_block *sb, aufs_bindex_t bindex)
+{
+	aufs_bindex_t bend;
+	struct au_branch *br;
+	struct au_xino_file *xi;
+
+	if (!au_sbi(sb)->si_dbgaufs)
+		return;
+
+	bend = au_sbend(sb);
+	for (; bindex <= bend; bindex++) {
+		br = au_sbr(sb, bindex);
+		xi = &br->br_xino;
+		if (xi->xi_dbgaufs) {
+			debugfs_remove(xi->xi_dbgaufs);
+			xi->xi_dbgaufs = NULL;
+		}
+	}
+}
+
+void dbgaufs_brs_add(struct super_block *sb, aufs_bindex_t bindex)
+{
+	struct au_sbinfo *sbinfo;
+	struct dentry *parent;
+	struct au_branch *br;
+	struct au_xino_file *xi;
+	aufs_bindex_t bend;
+	char name[sizeof(DbgaufsXi_PREFIX) + 5]; /* "xi" bindex NULL */
+
+	sbinfo = au_sbi(sb);
+	parent = sbinfo->si_dbgaufs;
+	if (!parent)
+		return;
+
+	bend = au_sbend(sb);
+	for (; bindex <= bend; bindex++) {
+		snprintf(name, sizeof(name), DbgaufsXi_PREFIX "%d", bindex);
+		br = au_sbr(sb, bindex);
+		xi = &br->br_xino;
+		AuDebugOn(xi->xi_dbgaufs);
+		xi->xi_dbgaufs = debugfs_create_file(name, dbgaufs_mode, parent,
+						     sbinfo, &dbgaufs_xino_fop);
+		/* ignore an error */
+		if (unlikely(!xi->xi_dbgaufs))
+			AuWarn1("failed %s under debugfs\n", name);
+	}
+}
+
+/* ---------------------------------------------------------------------- */
+
+#ifdef CONFIG_AUFS_EXPORT
+static int dbgaufs_xigen_open(struct inode *inode, struct file *file)
+{
+	int err;
+	struct au_sbinfo *sbinfo;
+	struct super_block *sb;
+
+	sbinfo = inode->i_private;
+	sb = sbinfo->si_sb;
+	si_noflush_read_lock(sb);
+	err = dbgaufs_xi_open(sbinfo->si_xigen, file, /*do_fcnt*/0);
+	si_read_unlock(sb);
+	return err;
+}
+
+static const struct file_operations dbgaufs_xigen_fop = {
+	.open		= dbgaufs_xigen_open,
+	.release	= dbgaufs_xi_release,
+	.read		= dbgaufs_xi_read
+};
+
+static int dbgaufs_xigen_init(struct au_sbinfo *sbinfo)
+{
+	int err;
+
+	/*
+	 * This function is a dynamic '__init' fucntion actually,
+	 * so the tiny check for si_rwsem is unnecessary.
+	 */
+	/* AuRwMustWriteLock(&sbinfo->si_rwsem); */
+
+	err = -EIO;
+	sbinfo->si_dbgaufs_xigen = debugfs_create_file
+		("xigen", dbgaufs_mode, sbinfo->si_dbgaufs, sbinfo,
+		 &dbgaufs_xigen_fop);
+	if (sbinfo->si_dbgaufs_xigen)
+		err = 0;
+
+	return err;
+}
+#else
+static int dbgaufs_xigen_init(struct au_sbinfo *sbinfo)
+{
+	return 0;
+}
+#endif /* CONFIG_AUFS_EXPORT */
+
+/* ---------------------------------------------------------------------- */
+
+void dbgaufs_si_fin(struct au_sbinfo *sbinfo)
+{
+	/*
+	 * This function is a dynamic '__init' fucntion actually,
+	 * so the tiny check for si_rwsem is unnecessary.
+	 */
+	/* AuRwMustWriteLock(&sbinfo->si_rwsem); */
+
+	debugfs_remove_recursive(sbinfo->si_dbgaufs);
+	sbinfo->si_dbgaufs = NULL;
+	kobject_put(&sbinfo->si_kobj);
+}
+
+int dbgaufs_si_init(struct au_sbinfo *sbinfo)
+{
+	int err;
+	char name[SysaufsSiNameLen];
+
+	/*
+	 * This function is a dynamic '__init' fucntion actually,
+	 * so the tiny check for si_rwsem is unnecessary.
+	 */
+	/* AuRwMustWriteLock(&sbinfo->si_rwsem); */
+
+	err = -ENOENT;
+	if (!dbgaufs) {
+		AuErr1("/debug/aufs is uninitialized\n");
+		goto out;
+	}
+
+	err = -EIO;
+	sysaufs_name(sbinfo, name);
+	sbinfo->si_dbgaufs = debugfs_create_dir(name, dbgaufs);
+	if (unlikely(!sbinfo->si_dbgaufs))
+		goto out;
+	kobject_get(&sbinfo->si_kobj);
+
+	sbinfo->si_dbgaufs_xib = debugfs_create_file
+		("xib", dbgaufs_mode, sbinfo->si_dbgaufs, sbinfo,
+		 &dbgaufs_xib_fop);
+	if (unlikely(!sbinfo->si_dbgaufs_xib))
+		goto out_dir;
+
+	err = dbgaufs_xigen_init(sbinfo);
+	if (!err)
+		goto out; /* success */
+
+ out_dir:
+	dbgaufs_si_fin(sbinfo);
+ out:
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+void dbgaufs_fin(void)
+{
+	debugfs_remove(dbgaufs);
+}
+
+int __init dbgaufs_init(void)
+{
+	int err;
+
+	err = -EIO;
+	dbgaufs = debugfs_create_dir(AUFS_NAME, NULL);
+	if (dbgaufs)
+		err = 0;
+	return err;
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/dcsub.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/dcsub.c
@@ -0,0 +1,223 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * sub-routines for dentry cache
+ */
+
+#include "aufs.h"
+
+static void au_dpage_free(struct au_dpage *dpage)
+{
+	int i;
+	struct dentry **p;
+
+	p = dpage->dentries;
+	for (i = 0; i < dpage->ndentry; i++)
+		dput(*p++);
+	free_page((unsigned long)dpage->dentries);
+}
+
+int au_dpages_init(struct au_dcsub_pages *dpages, gfp_t gfp)
+{
+	int err;
+	void *p;
+
+	err = -ENOMEM;
+	dpages->dpages = kmalloc(sizeof(*dpages->dpages), gfp);
+	if (unlikely(!dpages->dpages))
+		goto out;
+
+	p = (void *)__get_free_page(gfp);
+	if (unlikely(!p))
+		goto out_dpages;
+
+	dpages->dpages[0].ndentry = 0;
+	dpages->dpages[0].dentries = p;
+	dpages->ndpage = 1;
+	return 0; /* success */
+
+ out_dpages:
+	kfree(dpages->dpages);
+ out:
+	return err;
+}
+
+void au_dpages_free(struct au_dcsub_pages *dpages)
+{
+	int i;
+	struct au_dpage *p;
+
+	p = dpages->dpages;
+	for (i = 0; i < dpages->ndpage; i++)
+		au_dpage_free(p++);
+	kfree(dpages->dpages);
+}
+
+static int au_dpages_append(struct au_dcsub_pages *dpages,
+			    struct dentry *dentry, gfp_t gfp)
+{
+	int err, sz;
+	struct au_dpage *dpage;
+	void *p;
+
+	dpage = dpages->dpages + dpages->ndpage - 1;
+	sz = PAGE_SIZE / sizeof(dentry);
+	if (unlikely(dpage->ndentry >= sz)) {
+		AuLabel(new dpage);
+		err = -ENOMEM;
+		sz = dpages->ndpage * sizeof(*dpages->dpages);
+		p = au_kzrealloc(dpages->dpages, sz,
+				 sz + sizeof(*dpages->dpages), gfp);
+		if (unlikely(!p))
+			goto out;
+
+		dpages->dpages = p;
+		dpage = dpages->dpages + dpages->ndpage;
+		p = (void *)__get_free_page(gfp);
+		if (unlikely(!p))
+			goto out;
+
+		dpage->ndentry = 0;
+		dpage->dentries = p;
+		dpages->ndpage++;
+	}
+
+	dpage->dentries[dpage->ndentry++] = dget(dentry);
+	return 0; /* success */
+
+ out:
+	return err;
+}
+
+int au_dcsub_pages(struct au_dcsub_pages *dpages, struct dentry *root,
+		   au_dpages_test test, void *arg)
+{
+	int err;
+	struct dentry *this_parent = root;
+	struct list_head *next;
+	struct super_block *sb = root->d_sb;
+
+	err = 0;
+	spin_lock(&dcache_lock);
+ repeat:
+	next = this_parent->d_subdirs.next;
+ resume:
+	if (this_parent->d_sb == sb
+	    && !IS_ROOT(this_parent)
+	    && atomic_read(&this_parent->d_count)
+	    && this_parent->d_inode
+	    && (!test || test(this_parent, arg))) {
+		err = au_dpages_append(dpages, this_parent, GFP_ATOMIC);
+		if (unlikely(err))
+			goto out;
+	}
+
+	while (next != &this_parent->d_subdirs) {
+		struct list_head *tmp = next;
+		struct dentry *dentry = list_entry(tmp, struct dentry,
+						   d_u.d_child);
+		next = tmp->next;
+		if (/*d_unhashed(dentry) || */!dentry->d_inode)
+			continue;
+		if (!list_empty(&dentry->d_subdirs)) {
+			this_parent = dentry;
+			goto repeat;
+		}
+		if (dentry->d_sb == sb
+		    && atomic_read(&dentry->d_count)
+		    && (!test || test(dentry, arg))) {
+			err = au_dpages_append(dpages, dentry, GFP_ATOMIC);
+			if (unlikely(err))
+				goto out;
+		}
+	}
+
+	if (this_parent != root) {
+		next = this_parent->d_u.d_child.next;
+		this_parent = this_parent->d_parent; /* dcache_lock is locked */
+		goto resume;
+	}
+ out:
+	spin_unlock(&dcache_lock);
+	return err;
+}
+
+int au_dcsub_pages_rev(struct au_dcsub_pages *dpages, struct dentry *dentry,
+		       int do_include, au_dpages_test test, void *arg)
+{
+	int err;
+
+	err = 0;
+	spin_lock(&dcache_lock);
+	if (do_include && (!test || test(dentry, arg))) {
+		err = au_dpages_append(dpages, dentry, GFP_ATOMIC);
+		if (unlikely(err))
+			goto out;
+	}
+	while (!IS_ROOT(dentry)) {
+		dentry = dentry->d_parent; /* dcache_lock is locked */
+		if (!test || test(dentry, arg)) {
+			err = au_dpages_append(dpages, dentry, GFP_ATOMIC);
+			if (unlikely(err))
+				break;
+		}
+	}
+
+ out:
+	spin_unlock(&dcache_lock);
+
+	return err;
+}
+
+struct dentry *au_test_subdir(struct dentry *d1, struct dentry *d2)
+{
+	struct dentry *trap, **dentries;
+	int err, i, j;
+	struct au_dcsub_pages dpages;
+	struct au_dpage *dpage;
+
+	trap = ERR_PTR(-ENOMEM);
+	err = au_dpages_init(&dpages, GFP_NOFS);
+	if (unlikely(err))
+		goto out;
+	err = au_dcsub_pages_rev(&dpages, d1, /*do_include*/1, NULL, NULL);
+	if (unlikely(err))
+		goto out_dpages;
+
+	trap = d1;
+	for (i = 0; !err && i < dpages.ndpage; i++) {
+		dpage = dpages.dpages + i;
+		dentries = dpage->dentries;
+		for (j = 0; !err && j < dpage->ndentry; j++) {
+			struct dentry *d;
+
+			d = dentries[j];
+			err = (d == d2);
+			if (!err)
+				trap = d;
+		}
+	}
+	if (!err)
+		trap = NULL;
+
+ out_dpages:
+	au_dpages_free(&dpages);
+ out:
+	return trap;
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/rdu.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/rdu.c
@@ -0,0 +1,333 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * readdir in userspace.
+ */
+
+#include <linux/security.h>
+#include <linux/uaccess.h>
+#include <linux/aufs_type.h>
+#include "aufs.h"
+
+/* bits for struct aufs_rdu.flags */
+#define	AuRdu_CALLED	1
+#define	AuRdu_CONT	(1 << 1)
+#define	AuRdu_FULL	(1 << 2)
+#define au_ftest_rdu(flags, name)	((flags) & AuRdu_##name)
+#define au_fset_rdu(flags, name)	{ (flags) |= AuRdu_##name; }
+#define au_fclr_rdu(flags, name)	{ (flags) &= ~AuRdu_##name; }
+
+struct au_rdu_arg {
+	struct aufs_rdu			*rdu;
+	union au_rdu_ent_ul		ent;
+	unsigned long			end;
+
+	struct super_block		*sb;
+	int				err;
+};
+
+static int au_rdu_fill(void *__arg, const char *name, int nlen,
+		       loff_t offset, u64 h_ino, unsigned int d_type)
+{
+	int err, len;
+	struct au_rdu_arg *arg = __arg;
+	struct aufs_rdu *rdu = arg->rdu;
+	struct au_rdu_ent ent;
+
+	err = 0;
+	arg->err = 0;
+	au_fset_rdu(rdu->cookie.flags, CALLED);
+	len = au_rdu_len(nlen);
+	if (arg->ent.ul + len  < arg->end) {
+		ent.ino = h_ino;
+		ent.bindex = rdu->cookie.bindex;
+		ent.type = d_type;
+		ent.nlen = nlen;
+		if (unlikely(nlen > AUFS_MAX_NAMELEN))
+			ent.type = DT_UNKNOWN;
+
+		err = -EFAULT;
+		if (copy_to_user(arg->ent.e, &ent, sizeof(ent)))
+			goto out;
+		if (copy_to_user(arg->ent.e->name, name, nlen))
+			goto out;
+		/* the terminating NULL */
+		if (__put_user(0, arg->ent.e->name + nlen))
+			goto out;
+		err = 0;
+		/* AuDbg("%p, %.*s\n", arg->ent.p, nlen, name); */
+		arg->ent.ul += len;
+		rdu->rent++;
+	} else {
+		err = -EFAULT;
+		au_fset_rdu(rdu->cookie.flags, FULL);
+		rdu->full = 1;
+		rdu->tail = arg->ent;
+	}
+
+ out:
+	/* AuTraceErr(err); */
+	return err;
+}
+
+static int au_rdu_do(struct file *h_file, struct au_rdu_arg *arg)
+{
+	int err;
+	loff_t offset;
+	struct au_rdu_cookie *cookie = &arg->rdu->cookie;
+
+	offset = vfsub_llseek(h_file, cookie->h_pos, SEEK_SET);
+	err = offset;
+	if (unlikely(offset != cookie->h_pos))
+		goto out;
+
+	err = 0;
+	do {
+		arg->err = 0;
+		au_fclr_rdu(cookie->flags, CALLED);
+		/* smp_mb(); */
+		err = vfsub_readdir(h_file, au_rdu_fill, arg);
+		if (err >= 0)
+			err = arg->err;
+	} while (!err
+		 && au_ftest_rdu(cookie->flags, CALLED)
+		 && !au_ftest_rdu(cookie->flags, FULL));
+	cookie->h_pos = h_file->f_pos;
+
+ out:
+	AuTraceErr(err);
+	return err;
+}
+
+static int au_rdu(struct file *file, struct aufs_rdu *rdu)
+{
+	int err;
+	aufs_bindex_t bend;
+	struct au_rdu_arg arg;
+	struct dentry *dentry;
+	struct inode *inode;
+	struct file *h_file;
+	struct au_rdu_cookie *cookie = &rdu->cookie;
+
+	err = !access_ok(VERIFY_WRITE, rdu->ent.e, rdu->sz);
+	if (unlikely(err)) {
+		err = -EFAULT;
+		AuTraceErr(err);
+		goto out;
+	}
+	rdu->rent = 0;
+	rdu->tail = rdu->ent;
+	rdu->full = 0;
+	arg.rdu = rdu;
+	arg.ent = rdu->ent;
+	arg.end = arg.ent.ul;
+	arg.end += rdu->sz;
+
+	err = -ENOTDIR;
+	if (unlikely(!file->f_op || !file->f_op->readdir))
+		goto out;
+
+	err = security_file_permission(file, MAY_READ);
+	AuTraceErr(err);
+	if (unlikely(err))
+		goto out;
+
+	dentry = file->f_dentry;
+	inode = dentry->d_inode;
+#if 1
+	mutex_lock(&inode->i_mutex);
+#else
+	err = mutex_lock_killable(&inode->i_mutex);
+	AuTraceErr(err);
+	if (unlikely(err))
+		goto out;
+#endif
+	err = -ENOENT;
+	if (unlikely(IS_DEADDIR(inode)))
+		goto out_mtx;
+
+	arg.sb = inode->i_sb;
+	si_read_lock(arg.sb, AuLock_FLUSH);
+	fi_read_lock(file);
+
+	err = -EAGAIN;
+	if (unlikely(au_ftest_rdu(cookie->flags, CONT)
+		     && cookie->generation != au_figen(file)))
+		goto out_unlock;
+
+	err = 0;
+	if (!rdu->blk) {
+		rdu->blk = au_sbi(arg.sb)->si_rdblk;
+		if (!rdu->blk)
+			rdu->blk = au_dir_size(file, /*dentry*/NULL);
+	}
+	bend = au_fbstart(file);
+	if (cookie->bindex < bend)
+		cookie->bindex = bend;
+	bend = au_fbend(file);
+	/* AuDbg("b%d, b%d\n", cookie->bindex, bend); */
+	for (; !err && cookie->bindex <= bend;
+	     cookie->bindex++, cookie->h_pos = 0) {
+		h_file = au_h_fptr(file, cookie->bindex);
+		if (!h_file)
+			continue;
+
+		au_fclr_rdu(cookie->flags, FULL);
+		err = au_rdu_do(h_file, &arg);
+		AuTraceErr(err);
+		if (unlikely(au_ftest_rdu(cookie->flags, FULL) || err))
+			break;
+	}
+	AuDbg("rent %llu\n", rdu->rent);
+
+	if (!err && !au_ftest_rdu(cookie->flags, CONT)) {
+		rdu->shwh = !!au_opt_test(au_sbi(arg.sb)->si_mntflags, SHWH);
+		au_fset_rdu(cookie->flags, CONT);
+		cookie->generation = au_figen(file);
+	}
+
+	ii_read_lock_child(inode);
+	fsstack_copy_attr_atime(inode, au_h_iptr(inode, au_ibstart(inode)));
+	ii_read_unlock(inode);
+
+ out_unlock:
+	fi_read_unlock(file);
+	si_read_unlock(arg.sb);
+ out_mtx:
+	mutex_unlock(&inode->i_mutex);
+ out:
+	AuTraceErr(err);
+	return err;
+}
+
+static int au_rdu_ino(struct file *file, struct aufs_rdu *rdu)
+{
+	int err;
+	ino_t ino;
+	unsigned long long nent;
+	union au_rdu_ent_ul *u;
+	struct au_rdu_ent ent;
+	struct super_block *sb;
+
+	err = 0;
+	nent = rdu->nent;
+	u = &rdu->ent;
+	sb = file->f_dentry->d_sb;
+	si_read_lock(sb, AuLock_FLUSH);
+	while (nent-- > 0) {
+		err = !access_ok(VERIFY_WRITE, u->e, sizeof(ent));
+		if (unlikely(err)) {
+			err = -EFAULT;
+			AuTraceErr(err);
+			break;
+		}
+
+		err = copy_from_user(&ent, u->e, sizeof(ent));
+		if (unlikely(err)) {
+			err = -EFAULT;
+			AuTraceErr(err);
+			break;
+		}
+
+		/* AuDbg("b%d, i%llu\n", ent.bindex, ent.ino); */
+		if (!ent.wh)
+			err = au_ino(sb, ent.bindex, ent.ino, ent.type, &ino);
+		else
+			err = au_wh_ino(sb, ent.bindex, ent.ino, ent.type,
+					&ino);
+		if (unlikely(err)) {
+			AuTraceErr(err);
+			break;
+		}
+
+		err = __put_user(ino, &u->e->ino);
+		if (unlikely(err)) {
+			err = -EFAULT;
+			AuTraceErr(err);
+			break;
+		}
+		u->ul += au_rdu_len(ent.nlen);
+	}
+	si_read_unlock(sb);
+
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int au_rdu_verify(struct aufs_rdu *rdu)
+{
+	AuDbg("rdu{%llu, %p, (%u, %u) | %u | %llu, %u, %u | "
+	      "%llu, b%d, 0x%x, g%u}\n",
+	      rdu->sz, rdu->ent.e, rdu->verify[0], rdu->verify[1],
+	      rdu->blk,
+	      rdu->rent, rdu->shwh, rdu->full,
+	      rdu->cookie.h_pos, rdu->cookie.bindex, rdu->cookie.flags,
+	      rdu->cookie.generation);
+
+	if (rdu->verify[AufsCtlRduV_SZ] == sizeof(*rdu)
+	    && rdu->verify[AufsCtlRduV_SZ_PTR] == sizeof(rdu))
+		return 0;
+
+	AuDbg("%u:%u, %u:%u\n",
+	      rdu->verify[AufsCtlRduV_SZ], (unsigned int)sizeof(*rdu),
+	      rdu->verify[AufsCtlRduV_SZ_PTR], (unsigned int)sizeof(rdu));
+	return -EINVAL;
+}
+
+long au_rdu_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+	long err, e;
+	struct aufs_rdu rdu;
+	void __user *p = (void __user *)arg;
+
+	err = copy_from_user(&rdu, p, sizeof(rdu));
+	if (unlikely(err)) {
+		err = -EFAULT;
+		AuTraceErr(err);
+		goto out;
+	}
+	err = au_rdu_verify(&rdu);
+	if (unlikely(err))
+		goto out;
+
+	switch (cmd) {
+	case AUFS_CTL_RDU:
+		err = au_rdu(file, &rdu);
+		if (unlikely(err))
+			break;
+
+		e = copy_to_user(p, &rdu, sizeof(rdu));
+		if (unlikely(e)) {
+			err = -EFAULT;
+			AuTraceErr(err);
+		}
+		break;
+	case AUFS_CTL_RDU_INO:
+		err = au_rdu_ino(file, &rdu);
+		break;
+
+	default:
+		err = -EINVAL;
+	}
+
+ out:
+	AuTraceErr(err);
+	return err;
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/file.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/file.c
@@ -0,0 +1,591 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * handling file/dir, and address_space operation
+ */
+
+#include <linux/file.h>
+#include <linux/fsnotify.h>
+#include <linux/namei.h>
+#include <linux/pagemap.h>
+#include "aufs.h"
+
+/* drop flags for writing */
+unsigned int au_file_roflags(unsigned int flags)
+{
+	flags &= ~(O_WRONLY | O_RDWR | O_APPEND | O_CREAT | O_TRUNC);
+	flags |= O_RDONLY | O_NOATIME;
+	return flags;
+}
+
+/* common functions to regular file and dir */
+struct file *au_h_open(struct dentry *dentry, aufs_bindex_t bindex, int flags,
+		       struct file *file)
+{
+	struct file *h_file;
+	struct dentry *h_dentry;
+	struct inode *h_inode;
+	struct super_block *sb;
+	struct au_branch *br;
+	int err, exec_flag;
+	struct path h_path;
+
+	/* a race condition can happen between open and unlink/rmdir */
+	h_file = ERR_PTR(-ENOENT);
+	h_dentry = au_h_dptr(dentry, bindex);
+	if (au_test_nfsd(current) && !h_dentry)
+		goto out;
+	h_inode = h_dentry->d_inode;
+	if (au_test_nfsd(current) && !h_inode)
+		goto out;
+	if (unlikely((!d_unhashed(dentry) && d_unhashed(h_dentry))
+		     || !h_inode))
+		goto out;
+
+	sb = dentry->d_sb;
+	br = au_sbr(sb, bindex);
+	h_file = ERR_PTR(-EACCES);
+	exec_flag = flags & vfsub_fmode_to_uint(FMODE_EXEC);
+	if (exec_flag && (br->br_mnt->mnt_flags & MNT_NOEXEC))
+			goto out;
+
+	/* drop flags for writing */
+	if (au_test_ro(sb, bindex, dentry->d_inode))
+		flags = au_file_roflags(flags);
+	flags &= ~O_CREAT;
+	atomic_inc(&br->br_count);
+	h_path.dentry = h_dentry;
+	h_path.mnt = br->br_mnt;
+	path_get(&h_path);
+	h_file = vfsub_dentry_open(&h_path, flags, current_cred());
+	if (IS_ERR(h_file))
+		goto out_br;
+
+	if (exec_flag) {
+		err = deny_write_access(h_file);
+		if (unlikely(err)) {
+			fput(h_file);
+			h_file = ERR_PTR(err);
+			goto out_br;
+		}
+	}
+	fsnotify_open(h_dentry);
+	goto out; /* success */
+
+ out_br:
+	atomic_dec(&br->br_count);
+ out:
+	return h_file;
+}
+
+int au_do_open(struct file *file, int (*open)(struct file *file, int flags))
+{
+	int err;
+	unsigned int flags;
+	struct dentry *dentry;
+	struct super_block *sb;
+
+	dentry = file->f_dentry;
+	sb = dentry->d_sb;
+	si_read_lock(sb, AuLock_FLUSH);
+	err = au_finfo_init(file);
+	if (unlikely(err))
+		goto out;
+
+	di_read_lock_child(dentry, AuLock_IR);
+	spin_lock(&file->f_lock);
+	flags = file->f_flags;
+	spin_unlock(&file->f_lock);
+	err = open(file, flags);
+	di_read_unlock(dentry, AuLock_IR);
+
+	fi_write_unlock(file);
+	if (unlikely(err))
+		au_finfo_fin(file);
+ out:
+	si_read_unlock(sb);
+	return err;
+}
+
+int au_reopen_nondir(struct file *file)
+{
+	int err;
+	unsigned int flags;
+	aufs_bindex_t bstart, bindex, bend;
+	struct dentry *dentry;
+	struct file *h_file, *h_file_tmp;
+
+	dentry = file->f_dentry;
+	bstart = au_dbstart(dentry);
+	h_file_tmp = NULL;
+	if (au_fbstart(file) == bstart) {
+		h_file = au_h_fptr(file, bstart);
+		if (file->f_mode == h_file->f_mode)
+			return 0; /* success */
+		h_file_tmp = h_file;
+		get_file(h_file_tmp);
+		au_set_h_fptr(file, bstart, NULL);
+	}
+	AuDebugOn(au_fbstart(file) < bstart
+		  || au_fi(file)->fi_hfile[0 + bstart].hf_file);
+
+	spin_lock(&file->f_lock);
+	flags = file->f_flags & ~O_TRUNC;
+	spin_unlock(&file->f_lock);
+	h_file = au_h_open(dentry, bstart, flags, file);
+	err = PTR_ERR(h_file);
+	if (IS_ERR(h_file))
+		goto out; /* todo: close all? */
+
+	err = 0;
+	au_set_fbstart(file, bstart);
+	au_set_h_fptr(file, bstart, h_file);
+	au_update_figen(file);
+	/* todo: necessary? */
+	/* file->f_ra = h_file->f_ra; */
+
+	/* close lower files */
+	bend = au_fbend(file);
+	for (bindex = bstart + 1; bindex <= bend; bindex++)
+		au_set_h_fptr(file, bindex, NULL);
+	au_set_fbend(file, bstart);
+
+ out:
+	if (h_file_tmp)
+		fput(h_file_tmp);
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int au_reopen_wh(struct file *file, aufs_bindex_t btgt,
+			struct dentry *hi_wh)
+{
+	int err;
+	aufs_bindex_t bstart;
+	struct au_dinfo *dinfo;
+	struct dentry *h_dentry;
+
+	dinfo = au_di(file->f_dentry);
+	AuRwMustWriteLock(&dinfo->di_rwsem);
+
+	bstart = dinfo->di_bstart;
+	dinfo->di_bstart = btgt;
+	h_dentry = dinfo->di_hdentry[0 + btgt].hd_dentry;
+	dinfo->di_hdentry[0 + btgt].hd_dentry = hi_wh;
+	err = au_reopen_nondir(file);
+	dinfo->di_hdentry[0 + btgt].hd_dentry = h_dentry;
+	dinfo->di_bstart = bstart;
+
+	return err;
+}
+
+static int au_ready_to_write_wh(struct file *file, loff_t len,
+				aufs_bindex_t bcpup)
+{
+	int err;
+	struct inode *inode;
+	struct dentry *dentry, *hi_wh;
+	struct super_block *sb;
+
+	dentry = file->f_dentry;
+	inode = dentry->d_inode;
+	hi_wh = au_hi_wh(inode, bcpup);
+	if (!hi_wh)
+		err = au_sio_cpup_wh(dentry, bcpup, len, file);
+	else
+		/* already copied-up after unlink */
+		err = au_reopen_wh(file, bcpup, hi_wh);
+
+	sb = dentry->d_sb;
+	if (!err && inode->i_nlink > 1 && au_opt_test(au_mntflags(sb), PLINK))
+		au_plink_append(inode, bcpup, au_h_dptr(dentry, bcpup));
+
+	return err;
+}
+
+/*
+ * prepare the @file for writing.
+ */
+int au_ready_to_write(struct file *file, loff_t len, struct au_pin *pin)
+{
+	int err;
+	aufs_bindex_t bstart, bcpup;
+	struct dentry *dentry, *parent, *h_dentry;
+	struct inode *h_inode, *inode;
+	struct super_block *sb;
+
+	dentry = file->f_dentry;
+	sb = dentry->d_sb;
+	bstart = au_fbstart(file);
+	inode = dentry->d_inode;
+	err = au_test_ro(sb, bstart, inode);
+	if (!err && (au_h_fptr(file, bstart)->f_mode & FMODE_WRITE)) {
+		err = au_pin(pin, dentry, bstart, AuOpt_UDBA_NONE, /*flags*/0);
+		goto out;
+	}
+
+	/* need to cpup */
+	parent = dget_parent(dentry);
+	di_write_lock_parent(parent);
+	err = AuWbrCopyup(au_sbi(sb), dentry);
+	bcpup = err;
+	if (unlikely(err < 0))
+		goto out_dgrade;
+	err = 0;
+
+	if (!au_h_dptr(parent, bcpup)) {
+		err = au_cpup_dirs(dentry, bcpup);
+		if (unlikely(err))
+			goto out_dgrade;
+	}
+
+	err = au_pin(pin, dentry, bcpup, AuOpt_UDBA_NONE,
+		     AuPin_DI_LOCKED | AuPin_MNT_WRITE);
+	if (unlikely(err))
+		goto out_dgrade;
+
+	h_dentry = au_h_fptr(file, bstart)->f_dentry;
+	h_inode = h_dentry->d_inode;
+	mutex_lock_nested(&h_inode->i_mutex, AuLsc_I_CHILD);
+	if (d_unhashed(dentry) /* || d_unhashed(h_dentry) */
+	    /* || !h_inode->i_nlink */) {
+		err = au_ready_to_write_wh(file, len, bcpup);
+		di_downgrade_lock(parent, AuLock_IR);
+	} else {
+		di_downgrade_lock(parent, AuLock_IR);
+		if (!au_h_dptr(dentry, bcpup))
+			err = au_sio_cpup_simple(dentry, bcpup, len,
+						 AuCpup_DTIME);
+		if (!err)
+			err = au_reopen_nondir(file);
+	}
+	mutex_unlock(&h_inode->i_mutex);
+
+	if (!err) {
+		au_pin_set_parent_lflag(pin, /*lflag*/0);
+		goto out_dput; /* success */
+	}
+	au_unpin(pin);
+	goto out_unlock;
+
+ out_dgrade:
+	di_downgrade_lock(parent, AuLock_IR);
+ out_unlock:
+	di_read_unlock(parent, AuLock_IR);
+ out_dput:
+	dput(parent);
+ out:
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int au_file_refresh_by_inode(struct file *file, int *need_reopen)
+{
+	int err;
+	aufs_bindex_t bstart;
+	struct au_pin pin;
+	struct au_finfo *finfo;
+	struct dentry *dentry, *parent, *hi_wh;
+	struct inode *inode;
+	struct super_block *sb;
+
+	FiMustWriteLock(file);
+
+	err = 0;
+	finfo = au_fi(file);
+	dentry = file->f_dentry;
+	sb = dentry->d_sb;
+	inode = dentry->d_inode;
+	bstart = au_ibstart(inode);
+	if (bstart == finfo->fi_bstart)
+		goto out;
+
+	parent = dget_parent(dentry);
+	if (au_test_ro(sb, bstart, inode)) {
+		di_read_lock_parent(parent, !AuLock_IR);
+		err = AuWbrCopyup(au_sbi(sb), dentry);
+		bstart = err;
+		di_read_unlock(parent, !AuLock_IR);
+		if (unlikely(err < 0))
+			goto out_parent;
+		err = 0;
+	}
+
+	di_read_lock_parent(parent, AuLock_IR);
+	hi_wh = au_hi_wh(inode, bstart);
+	if (au_opt_test(au_mntflags(sb), PLINK)
+	    && au_plink_test(inode)
+	    && !d_unhashed(dentry)) {
+		err = au_test_and_cpup_dirs(dentry, bstart);
+		if (unlikely(err))
+			goto out_unlock;
+
+		/* always superio. */
+		err = au_pin(&pin, dentry, bstart, AuOpt_UDBA_NONE,
+			     AuPin_DI_LOCKED | AuPin_MNT_WRITE);
+		if (!err)
+			err = au_sio_cpup_simple(dentry, bstart, -1,
+						 AuCpup_DTIME);
+		au_unpin(&pin);
+	} else if (hi_wh) {
+		/* already copied-up after unlink */
+		err = au_reopen_wh(file, bstart, hi_wh);
+		*need_reopen = 0;
+	}
+
+ out_unlock:
+	di_read_unlock(parent, AuLock_IR);
+ out_parent:
+	dput(parent);
+ out:
+	return err;
+}
+
+static void au_do_refresh_file(struct file *file)
+{
+	aufs_bindex_t bindex, bend, new_bindex, brid;
+	struct au_hfile *p, tmp, *q;
+	struct au_finfo *finfo;
+	struct super_block *sb;
+
+	FiMustWriteLock(file);
+
+	sb = file->f_dentry->d_sb;
+	finfo = au_fi(file);
+	p = finfo->fi_hfile + finfo->fi_bstart;
+	brid = p->hf_br->br_id;
+	bend = finfo->fi_bend;
+	for (bindex = finfo->fi_bstart; bindex <= bend; bindex++, p++) {
+		if (!p->hf_file)
+			continue;
+
+		new_bindex = au_br_index(sb, p->hf_br->br_id);
+		if (new_bindex == bindex)
+			continue;
+		if (new_bindex < 0) {
+			au_set_h_fptr(file, bindex, NULL);
+			continue;
+		}
+
+		/* swap two lower inode, and loop again */
+		q = finfo->fi_hfile + new_bindex;
+		tmp = *q;
+		*q = *p;
+		*p = tmp;
+		if (tmp.hf_file) {
+			bindex--;
+			p--;
+		}
+	}
+
+	p = finfo->fi_hfile;
+	if (!au_test_mmapped(file) && !d_unhashed(file->f_dentry)) {
+		bend = au_sbend(sb);
+		for (finfo->fi_bstart = 0; finfo->fi_bstart <= bend;
+		     finfo->fi_bstart++, p++)
+			if (p->hf_file) {
+				if (p->hf_file->f_dentry
+				    && p->hf_file->f_dentry->d_inode)
+					break;
+				else
+					au_hfput(p, file);
+			}
+	} else {
+		bend = au_br_index(sb, brid);
+		for (finfo->fi_bstart = 0; finfo->fi_bstart < bend;
+		     finfo->fi_bstart++, p++)
+			if (p->hf_file)
+				au_hfput(p, file);
+		bend = au_sbend(sb);
+	}
+
+	p = finfo->fi_hfile + bend;
+	for (finfo->fi_bend = bend; finfo->fi_bend >= finfo->fi_bstart;
+	     finfo->fi_bend--, p--)
+		if (p->hf_file) {
+			if (p->hf_file->f_dentry
+			    && p->hf_file->f_dentry->d_inode)
+				break;
+			else
+				au_hfput(p, file);
+		}
+	AuDebugOn(finfo->fi_bend < finfo->fi_bstart);
+}
+
+/*
+ * after branch manipulating, refresh the file.
+ */
+static int refresh_file(struct file *file, int (*reopen)(struct file *file))
+{
+	int err, need_reopen;
+	struct dentry *dentry;
+	aufs_bindex_t bend, bindex;
+
+	dentry = file->f_dentry;
+	err = au_fi_realloc(au_fi(file), au_sbend(dentry->d_sb) + 1);
+	if (unlikely(err))
+		goto out;
+	au_do_refresh_file(file);
+
+	err = 0;
+	need_reopen = 1;
+	if (!au_test_mmapped(file))
+		err = au_file_refresh_by_inode(file, &need_reopen);
+	if (!err && need_reopen && !d_unhashed(dentry))
+		err = reopen(file);
+	if (!err) {
+		au_update_figen(file);
+		return 0; /* success */
+	}
+
+	/* error, close all lower files */
+	bend = au_fbend(file);
+	for (bindex = au_fbstart(file); bindex <= bend; bindex++)
+		au_set_h_fptr(file, bindex, NULL);
+
+ out:
+	return err;
+}
+
+/* common function to regular file and dir */
+int au_reval_and_lock_fdi(struct file *file, int (*reopen)(struct file *file),
+			  int wlock)
+{
+	int err;
+	unsigned int sigen, figen;
+	aufs_bindex_t bstart;
+	unsigned char pseudo_link;
+	struct dentry *dentry;
+
+	err = 0;
+	dentry = file->f_dentry;
+	sigen = au_sigen(dentry->d_sb);
+	fi_write_lock(file);
+	figen = au_figen(file);
+	di_write_lock_child(dentry);
+	bstart = au_dbstart(dentry);
+	pseudo_link = (bstart != au_ibstart(dentry->d_inode));
+	if (sigen == figen && !pseudo_link && au_fbstart(file) == bstart) {
+		if (!wlock) {
+			di_downgrade_lock(dentry, AuLock_IR);
+			fi_downgrade_lock(file);
+		}
+		goto out; /* success */
+	}
+
+	AuDbg("sigen %d, figen %d\n", sigen, figen);
+	if (sigen != au_digen(dentry)
+	    || sigen != au_iigen(dentry->d_inode)) {
+		err = au_reval_dpath(dentry, sigen);
+		if (unlikely(err < 0))
+			goto out;
+		AuDebugOn(au_digen(dentry) != sigen
+			  || au_iigen(dentry->d_inode) != sigen);
+	}
+
+	err = refresh_file(file, reopen);
+	if (!err) {
+		if (!wlock) {
+			di_downgrade_lock(dentry, AuLock_IR);
+			fi_downgrade_lock(file);
+		}
+	} else {
+		di_write_unlock(dentry);
+		fi_write_unlock(file);
+	}
+
+ out:
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* cf. aufs_nopage() */
+/* for madvise(2) */
+static int aufs_readpage(struct file *file __maybe_unused, struct page *page)
+{
+	unlock_page(page);
+	return 0;
+}
+
+/* they will never be called. */
+#ifdef CONFIG_AUFS_DEBUG
+static int aufs_write_begin(struct file *file, struct address_space *mapping,
+			    loff_t pos, unsigned len, unsigned flags,
+			    struct page **pagep, void **fsdata)
+{ AuUnsupport(); return 0; }
+static int aufs_write_end(struct file *file, struct address_space *mapping,
+			  loff_t pos, unsigned len, unsigned copied,
+			  struct page *page, void *fsdata)
+{ AuUnsupport(); return 0; }
+static int aufs_writepage(struct page *page, struct writeback_control *wbc)
+{ AuUnsupport(); return 0; }
+static void aufs_sync_page(struct page *page)
+{ AuUnsupport(); }
+
+static int aufs_set_page_dirty(struct page *page)
+{ AuUnsupport(); return 0; }
+static void aufs_invalidatepage(struct page *page, unsigned long offset)
+{ AuUnsupport(); }
+static int aufs_releasepage(struct page *page, gfp_t gfp)
+{ AuUnsupport(); return 0; }
+static ssize_t aufs_direct_IO(int rw, struct kiocb *iocb,
+			      const struct iovec *iov, loff_t offset,
+			      unsigned long nr_segs)
+{ AuUnsupport(); return 0; }
+static int aufs_get_xip_mem(struct address_space *mapping, pgoff_t pgoff,
+			    int create, void **kmem, unsigned long *pfn)
+{ AuUnsupport(); return 0; }
+static int aufs_migratepage(struct address_space *mapping, struct page *newpage,
+			    struct page *page)
+{ AuUnsupport(); return 0; }
+static int aufs_launder_page(struct page *page)
+{ AuUnsupport(); return 0; }
+static int aufs_is_partially_uptodate(struct page *page,
+				      read_descriptor_t *desc,
+				      unsigned long from)
+{ AuUnsupport(); return 0; }
+static int aufs_error_remove_page(struct address_space *mapping,
+				  struct page *page)
+{ AuUnsupport(); return 0; }
+#endif /* CONFIG_AUFS_DEBUG */
+
+struct address_space_operations aufs_aop = {
+	.readpage		= aufs_readpage,
+#ifdef CONFIG_AUFS_DEBUG
+	.writepage		= aufs_writepage,
+	.sync_page		= aufs_sync_page,
+	/* no writepages, because of writepage */
+	.set_page_dirty		= aufs_set_page_dirty,
+	/* no readpages, because of readpage */
+	.write_begin		= aufs_write_begin,
+	.write_end		= aufs_write_end,
+	/* no bmap, no block device */
+	.invalidatepage		= aufs_invalidatepage,
+	.releasepage		= aufs_releasepage,
+	.direct_IO		= aufs_direct_IO,	/* todo */
+	.get_xip_mem		= aufs_get_xip_mem,	/* todo */
+	.migratepage		= aufs_migratepage,
+	.launder_page		= aufs_launder_page,
+	.is_partially_uptodate	= aufs_is_partially_uptodate,
+	.error_remove_page	= aufs_error_remove_page
+#endif /* CONFIG_AUFS_DEBUG */
+};
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/vfsub.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/vfsub.c
@@ -0,0 +1,753 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * sub-routines for VFS
+ */
+
+#include <linux/ima.h>
+#include <linux/namei.h>
+#include <linux/security.h>
+#include <linux/splice.h>
+#include <linux/uaccess.h>
+#include "aufs.h"
+
+int vfsub_update_h_iattr(struct path *h_path, int *did)
+{
+	int err;
+	struct kstat st;
+	struct super_block *h_sb;
+
+	/* for remote fs, leave work for its getattr or d_revalidate */
+	/* for bad i_attr fs, handle them in aufs_getattr() */
+	/* still some fs may acquire i_mutex. we need to skip them */
+	err = 0;
+	if (!did)
+		did = &err;
+	h_sb = h_path->dentry->d_sb;
+	*did = (!au_test_fs_remote(h_sb) && au_test_fs_refresh_iattr(h_sb));
+	if (*did)
+		err = vfs_getattr(h_path->mnt, h_path->dentry, &st);
+
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+struct file *vfsub_dentry_open(struct path *path, int flags,
+			       const struct cred *cred)
+{
+	struct file *file;
+
+	file = dentry_open(path->dentry, path->mnt, flags, cred);
+	if (IS_ERR(file))
+		return file;
+	/* as NFSD does, just call ima_..._get() simply after dentry_open */
+	ima_counts_get(file);
+	return file;
+}
+
+struct file *vfsub_filp_open(const char *path, int oflags, int mode)
+{
+	struct file *file;
+
+	/* lockdep_off(); */
+	file = filp_open(path, oflags, mode);
+	/* lockdep_on(); */
+	if (IS_ERR(file))
+		goto out;
+	vfsub_update_h_iattr(&file->f_path, /*did*/NULL); /*ignore*/
+
+ out:
+	return file;
+}
+
+int vfsub_kern_path(const char *name, unsigned int flags, struct path *path)
+{
+	int err;
+
+	/* lockdep_off(); */
+	err = kern_path(name, flags, path);
+	/* lockdep_on(); */
+	if (!err && path->dentry->d_inode)
+		vfsub_update_h_iattr(path, /*did*/NULL); /*ignore*/
+	return err;
+}
+
+struct dentry *vfsub_lookup_one_len(const char *name, struct dentry *parent,
+				    int len)
+{
+	struct path path = {
+		.mnt = NULL
+	};
+
+	/* VFS checks it too, but by WARN_ON_ONCE() */
+	IMustLock(parent->d_inode);
+
+	path.dentry = lookup_one_len(name, parent, len);
+	if (IS_ERR(path.dentry))
+		goto out;
+	if (path.dentry->d_inode)
+		vfsub_update_h_iattr(&path, /*did*/NULL); /*ignore*/
+
+ out:
+	AuTraceErrPtr(path.dentry);
+	return path.dentry;
+}
+
+struct dentry *vfsub_lookup_hash(struct nameidata *nd)
+{
+	struct path path = {
+		.mnt = nd->path.mnt
+	};
+
+	IMustLock(nd->path.dentry->d_inode);
+
+	path.dentry = lookup_hash(nd);
+	if (!IS_ERR(path.dentry) && path.dentry->d_inode)
+		vfsub_update_h_iattr(&path, /*did*/NULL); /*ignore*/
+
+	AuTraceErrPtr(path.dentry);
+	return path.dentry;
+}
+
+/* ---------------------------------------------------------------------- */
+
+struct dentry *vfsub_lock_rename(struct dentry *d1, struct au_hinode *hdir1,
+				 struct dentry *d2, struct au_hinode *hdir2)
+{
+	struct dentry *d;
+
+	lockdep_off();
+	d = lock_rename(d1, d2);
+	lockdep_on();
+	au_hin_suspend(hdir1);
+	if (hdir1 != hdir2)
+		au_hin_suspend(hdir2);
+
+	return d;
+}
+
+void vfsub_unlock_rename(struct dentry *d1, struct au_hinode *hdir1,
+			 struct dentry *d2, struct au_hinode *hdir2)
+{
+	au_hin_resume(hdir1);
+	if (hdir1 != hdir2)
+		au_hin_resume(hdir2);
+	lockdep_off();
+	unlock_rename(d1, d2);
+	lockdep_on();
+}
+
+/* ---------------------------------------------------------------------- */
+
+int vfsub_create(struct inode *dir, struct path *path, int mode)
+{
+	int err;
+	struct dentry *d;
+
+	IMustLock(dir);
+
+	d = path->dentry;
+	path->dentry = d->d_parent;
+	err = security_path_mknod(path, path->dentry, mode, 0);
+	path->dentry = d;
+	if (unlikely(err))
+		goto out;
+
+	if (au_test_fs_null_nd(dir->i_sb))
+		err = vfs_create(dir, path->dentry, mode, NULL);
+	else {
+		struct nameidata h_nd;
+
+		memset(&h_nd, 0, sizeof(h_nd));
+		h_nd.flags = LOOKUP_CREATE;
+		h_nd.intent.open.flags = O_CREAT
+			| vfsub_fmode_to_uint(FMODE_READ);
+		h_nd.intent.open.create_mode = mode;
+		h_nd.path.dentry = path->dentry->d_parent;
+		h_nd.path.mnt = path->mnt;
+		path_get(&h_nd.path);
+		err = vfs_create(dir, path->dentry, mode, &h_nd);
+		path_put(&h_nd.path);
+	}
+
+	if (!err) {
+		struct path tmp = *path;
+		int did;
+
+		vfsub_update_h_iattr(&tmp, &did);
+		if (did) {
+			tmp.dentry = path->dentry->d_parent;
+			vfsub_update_h_iattr(&tmp, /*did*/NULL);
+		}
+		/*ignore*/
+	}
+
+ out:
+	return err;
+}
+
+int vfsub_symlink(struct inode *dir, struct path *path, const char *symname)
+{
+	int err;
+	struct dentry *d;
+
+	IMustLock(dir);
+
+	d = path->dentry;
+	path->dentry = d->d_parent;
+	err = security_path_symlink(path, path->dentry, symname);
+	path->dentry = d;
+	if (unlikely(err))
+		goto out;
+
+	err = vfs_symlink(dir, path->dentry, symname);
+	if (!err) {
+		struct path tmp = *path;
+		int did;
+
+		vfsub_update_h_iattr(&tmp, &did);
+		if (did) {
+			tmp.dentry = path->dentry->d_parent;
+			vfsub_update_h_iattr(&tmp, /*did*/NULL);
+		}
+		/*ignore*/
+	}
+
+ out:
+	return err;
+}
+
+int vfsub_mknod(struct inode *dir, struct path *path, int mode, dev_t dev)
+{
+	int err;
+	struct dentry *d;
+
+	IMustLock(dir);
+
+	d = path->dentry;
+	path->dentry = d->d_parent;
+	err = security_path_mknod(path, path->dentry, mode, dev);
+	path->dentry = d;
+	if (unlikely(err))
+		goto out;
+
+	err = vfs_mknod(dir, path->dentry, mode, dev);
+	if (!err) {
+		struct path tmp = *path;
+		int did;
+
+		vfsub_update_h_iattr(&tmp, &did);
+		if (did) {
+			tmp.dentry = path->dentry->d_parent;
+			vfsub_update_h_iattr(&tmp, /*did*/NULL);
+		}
+		/*ignore*/
+	}
+
+ out:
+	return err;
+}
+
+static int au_test_nlink(struct inode *inode)
+{
+	const unsigned int link_max = UINT_MAX >> 1; /* rough margin */
+
+	if (!au_test_fs_no_limit_nlink(inode->i_sb)
+	    || inode->i_nlink < link_max)
+		return 0;
+	return -EMLINK;
+}
+
+int vfsub_link(struct dentry *src_dentry, struct inode *dir, struct path *path)
+{
+	int err;
+	struct dentry *d;
+
+	IMustLock(dir);
+
+	err = au_test_nlink(src_dentry->d_inode);
+	if (unlikely(err))
+		return err;
+
+	d = path->dentry;
+	path->dentry = d->d_parent;
+	err = security_path_link(src_dentry, path, path->dentry);
+	path->dentry = d;
+	if (unlikely(err))
+		goto out;
+
+	/* lockdep_off(); */
+	err = vfs_link(src_dentry, dir, path->dentry);
+	/* lockdep_on(); */
+	if (!err) {
+		struct path tmp = *path;
+		int did;
+
+		/* fuse has different memory inode for the same inumber */
+		vfsub_update_h_iattr(&tmp, &did);
+		if (did) {
+			tmp.dentry = path->dentry->d_parent;
+			vfsub_update_h_iattr(&tmp, /*did*/NULL);
+			tmp.dentry = src_dentry;
+			vfsub_update_h_iattr(&tmp, /*did*/NULL);
+		}
+		/*ignore*/
+	}
+
+ out:
+	return err;
+}
+
+int vfsub_rename(struct inode *src_dir, struct dentry *src_dentry,
+		 struct inode *dir, struct path *path)
+{
+	int err;
+	struct path tmp = {
+		.mnt	= path->mnt
+	};
+	struct dentry *d;
+
+	IMustLock(dir);
+	IMustLock(src_dir);
+
+	d = path->dentry;
+	path->dentry = d->d_parent;
+	tmp.dentry = src_dentry->d_parent;
+	err = security_path_rename(&tmp, src_dentry, path, path->dentry);
+	path->dentry = d;
+	if (unlikely(err))
+		goto out;
+
+	/* lockdep_off(); */
+	err = vfs_rename(src_dir, src_dentry, dir, path->dentry);
+	/* lockdep_on(); */
+	if (!err) {
+		int did;
+
+		tmp.dentry = d->d_parent;
+		vfsub_update_h_iattr(&tmp, &did);
+		if (did) {
+			tmp.dentry = src_dentry;
+			vfsub_update_h_iattr(&tmp, /*did*/NULL);
+			tmp.dentry = src_dentry->d_parent;
+			vfsub_update_h_iattr(&tmp, /*did*/NULL);
+		}
+		/*ignore*/
+	}
+
+ out:
+	return err;
+}
+
+int vfsub_mkdir(struct inode *dir, struct path *path, int mode)
+{
+	int err;
+	struct dentry *d;
+
+	IMustLock(dir);
+
+	d = path->dentry;
+	path->dentry = d->d_parent;
+	err = security_path_mkdir(path, path->dentry, mode);
+	path->dentry = d;
+	if (unlikely(err))
+		goto out;
+
+	err = vfs_mkdir(dir, path->dentry, mode);
+	if (!err) {
+		struct path tmp = *path;
+		int did;
+
+		vfsub_update_h_iattr(&tmp, &did);
+		if (did) {
+			tmp.dentry = path->dentry->d_parent;
+			vfsub_update_h_iattr(&tmp, /*did*/NULL);
+		}
+		/*ignore*/
+	}
+
+ out:
+	return err;
+}
+
+int vfsub_rmdir(struct inode *dir, struct path *path)
+{
+	int err;
+	struct dentry *d;
+
+	IMustLock(dir);
+
+	d = path->dentry;
+	path->dentry = d->d_parent;
+	err = security_path_rmdir(path, path->dentry);
+	path->dentry = d;
+	if (unlikely(err))
+		goto out;
+
+	/* lockdep_off(); */
+	err = vfs_rmdir(dir, path->dentry);
+	/* lockdep_on(); */
+	if (!err) {
+		struct path tmp = {
+			.dentry	= path->dentry->d_parent,
+			.mnt	= path->mnt
+		};
+
+		vfsub_update_h_iattr(&tmp, /*did*/NULL); /*ignore*/
+	}
+
+ out:
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+ssize_t vfsub_read_u(struct file *file, char __user *ubuf, size_t count,
+		     loff_t *ppos)
+{
+	ssize_t err;
+
+	err = vfs_read(file, ubuf, count, ppos);
+	if (err >= 0)
+		vfsub_update_h_iattr(&file->f_path, /*did*/NULL); /*ignore*/
+	return err;
+}
+
+/* todo: kernel_read()? */
+ssize_t vfsub_read_k(struct file *file, void *kbuf, size_t count,
+		     loff_t *ppos)
+{
+	ssize_t err;
+	mm_segment_t oldfs;
+
+	oldfs = get_fs();
+	set_fs(KERNEL_DS);
+	err = vfsub_read_u(file, (char __user *)kbuf, count, ppos);
+	set_fs(oldfs);
+	return err;
+}
+
+ssize_t vfsub_write_u(struct file *file, const char __user *ubuf, size_t count,
+		      loff_t *ppos)
+{
+	ssize_t err;
+
+	/* lockdep_off(); */
+	err = vfs_write(file, ubuf, count, ppos);
+	/* lockdep_on(); */
+	if (err >= 0)
+		vfsub_update_h_iattr(&file->f_path, /*did*/NULL); /*ignore*/
+	return err;
+}
+
+ssize_t vfsub_write_k(struct file *file, void *kbuf, size_t count, loff_t *ppos)
+{
+	ssize_t err;
+	mm_segment_t oldfs;
+
+	oldfs = get_fs();
+	set_fs(KERNEL_DS);
+	err = vfsub_write_u(file, (const char __user *)kbuf, count, ppos);
+	set_fs(oldfs);
+	return err;
+}
+
+int vfsub_readdir(struct file *file, filldir_t filldir, void *arg)
+{
+	int err;
+
+	/* lockdep_off(); */
+	err = vfs_readdir(file, filldir, arg);
+	/* lockdep_on(); */
+	if (err >= 0)
+		vfsub_update_h_iattr(&file->f_path, /*did*/NULL); /*ignore*/
+	return err;
+}
+
+long vfsub_splice_to(struct file *in, loff_t *ppos,
+		     struct pipe_inode_info *pipe, size_t len,
+		     unsigned int flags)
+{
+	long err;
+
+	/* lockdep_off(); */
+	err = do_splice_to(in, ppos, pipe, len, flags);
+	/* lockdep_on(); */
+	if (err >= 0)
+		vfsub_update_h_iattr(&in->f_path, /*did*/NULL); /*ignore*/
+	return err;
+}
+
+long vfsub_splice_from(struct pipe_inode_info *pipe, struct file *out,
+		       loff_t *ppos, size_t len, unsigned int flags)
+{
+	long err;
+
+	/* lockdep_off(); */
+	err = do_splice_from(pipe, out, ppos, len, flags);
+	/* lockdep_on(); */
+	if (err >= 0)
+		vfsub_update_h_iattr(&out->f_path, /*did*/NULL); /*ignore*/
+	return err;
+}
+
+/* cf. open.c:do_sys_truncate() and do_sys_ftruncate() */
+int vfsub_trunc(struct path *h_path, loff_t length, unsigned int attr,
+		struct file *h_file)
+{
+	int err;
+	struct inode *h_inode;
+
+	h_inode = h_path->dentry->d_inode;
+	if (!h_file) {
+		err = mnt_want_write(h_path->mnt);
+		if (err)
+			goto out;
+		err = inode_permission(h_inode, MAY_WRITE);
+		if (err)
+			goto out_mnt;
+		err = get_write_access(h_inode);
+		if (err)
+			goto out_mnt;
+		err = break_lease(h_inode, vfsub_fmode_to_uint(FMODE_WRITE));
+		if (err)
+			goto out_inode;
+	}
+
+	err = locks_verify_truncate(h_inode, h_file, length);
+	if (!err)
+		err = security_path_truncate(h_path, length, attr);
+	if (!err) {
+		/* lockdep_off(); */
+		err = do_truncate(h_path->dentry, length, attr, h_file);
+		/* lockdep_on(); */
+	}
+
+ out_inode:
+	if (!h_file)
+		put_write_access(h_inode);
+ out_mnt:
+	if (!h_file)
+		mnt_drop_write(h_path->mnt);
+ out:
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+struct au_vfsub_mkdir_args {
+	int *errp;
+	struct inode *dir;
+	struct path *path;
+	int mode;
+};
+
+static void au_call_vfsub_mkdir(void *args)
+{
+	struct au_vfsub_mkdir_args *a = args;
+	*a->errp = vfsub_mkdir(a->dir, a->path, a->mode);
+}
+
+int vfsub_sio_mkdir(struct inode *dir, struct path *path, int mode)
+{
+	int err, do_sio, wkq_err;
+
+	do_sio = au_test_h_perm_sio(dir, MAY_EXEC | MAY_WRITE);
+	if (!do_sio)
+		err = vfsub_mkdir(dir, path, mode);
+	else {
+		struct au_vfsub_mkdir_args args = {
+			.errp	= &err,
+			.dir	= dir,
+			.path	= path,
+			.mode	= mode
+		};
+		wkq_err = au_wkq_wait(au_call_vfsub_mkdir, &args);
+		if (unlikely(wkq_err))
+			err = wkq_err;
+	}
+
+	return err;
+}
+
+struct au_vfsub_rmdir_args {
+	int *errp;
+	struct inode *dir;
+	struct path *path;
+};
+
+static void au_call_vfsub_rmdir(void *args)
+{
+	struct au_vfsub_rmdir_args *a = args;
+	*a->errp = vfsub_rmdir(a->dir, a->path);
+}
+
+int vfsub_sio_rmdir(struct inode *dir, struct path *path)
+{
+	int err, do_sio, wkq_err;
+
+	do_sio = au_test_h_perm_sio(dir, MAY_EXEC | MAY_WRITE);
+	if (!do_sio)
+		err = vfsub_rmdir(dir, path);
+	else {
+		struct au_vfsub_rmdir_args args = {
+			.errp	= &err,
+			.dir	= dir,
+			.path	= path
+		};
+		wkq_err = au_wkq_wait(au_call_vfsub_rmdir, &args);
+		if (unlikely(wkq_err))
+			err = wkq_err;
+	}
+
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+struct notify_change_args {
+	int *errp;
+	struct path *path;
+	struct iattr *ia;
+};
+
+static void call_notify_change(void *args)
+{
+	struct notify_change_args *a = args;
+	struct inode *h_inode;
+
+	h_inode = a->path->dentry->d_inode;
+	IMustLock(h_inode);
+
+	*a->errp = -EPERM;
+	if (!IS_IMMUTABLE(h_inode) && !IS_APPEND(h_inode)) {
+		/* lockdep_off(); */
+		*a->errp = notify_change(a->path->dentry, a->ia);
+		/* lockdep_on(); */
+		if (!*a->errp)
+			vfsub_update_h_iattr(a->path, /*did*/NULL); /*ignore*/
+	}
+	AuTraceErr(*a->errp);
+}
+
+int vfsub_notify_change(struct path *path, struct iattr *ia)
+{
+	int err;
+	struct notify_change_args args = {
+		.errp	= &err,
+		.path	= path,
+		.ia	= ia
+	};
+
+	call_notify_change(&args);
+
+	return err;
+}
+
+int vfsub_sio_notify_change(struct path *path, struct iattr *ia)
+{
+	int err, wkq_err;
+	struct notify_change_args args = {
+		.errp	= &err,
+		.path	= path,
+		.ia	= ia
+	};
+
+	wkq_err = au_wkq_wait(call_notify_change, &args);
+	if (unlikely(wkq_err))
+		err = wkq_err;
+
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+struct unlink_args {
+	int *errp;
+	struct inode *dir;
+	struct path *path;
+};
+
+static void call_unlink(void *args)
+{
+	struct unlink_args *a = args;
+	struct dentry *d = a->path->dentry;
+	struct inode *h_inode;
+	const int stop_sillyrename = (au_test_nfs(d->d_sb)
+				      && atomic_read(&d->d_count) == 1);
+
+	IMustLock(a->dir);
+
+	a->path->dentry = d->d_parent;
+	*a->errp = security_path_unlink(a->path, d);
+	a->path->dentry = d;
+	if (unlikely(*a->errp))
+		return;
+
+	if (!stop_sillyrename)
+		dget(d);
+	h_inode = d->d_inode;
+	if (h_inode)
+		atomic_inc(&h_inode->i_count);
+
+	/* lockdep_off(); */
+	*a->errp = vfs_unlink(a->dir, d);
+	/* lockdep_on(); */
+	if (!*a->errp) {
+		struct path tmp = {
+			.dentry = d->d_parent,
+			.mnt	= a->path->mnt
+		};
+		vfsub_update_h_iattr(&tmp, /*did*/NULL); /*ignore*/
+	}
+
+	if (!stop_sillyrename)
+		dput(d);
+	if (h_inode)
+		iput(h_inode);
+
+	AuTraceErr(*a->errp);
+}
+
+/*
+ * @dir: must be locked.
+ * @dentry: target dentry.
+ */
+int vfsub_unlink(struct inode *dir, struct path *path, int force)
+{
+	int err;
+	struct unlink_args args = {
+		.errp	= &err,
+		.dir	= dir,
+		.path	= path
+	};
+
+	if (!force)
+		call_unlink(&args);
+	else {
+		int wkq_err;
+
+		wkq_err = au_wkq_wait(call_unlink, &args);
+		if (unlikely(wkq_err))
+			err = wkq_err;
+	}
+
+	return err;
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/sysaufs.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/sysaufs.c
@@ -0,0 +1,104 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * sysfs interface and lifetime management
+ * they are necessary regardless sysfs is disabled.
+ */
+
+#include <linux/fs.h>
+#include <linux/random.h>
+#include <linux/sysfs.h>
+#include "aufs.h"
+
+unsigned long sysaufs_si_mask;
+struct kset *sysaufs_ket;
+
+#define AuSiAttr(_name) { \
+	.attr   = { .name = __stringify(_name), .mode = 0444 },	\
+	.show   = sysaufs_si_##_name,				\
+}
+
+static struct sysaufs_si_attr sysaufs_si_attr_xi_path = AuSiAttr(xi_path);
+struct attribute *sysaufs_si_attrs[] = {
+	&sysaufs_si_attr_xi_path.attr,
+	NULL,
+};
+
+static struct sysfs_ops au_sbi_ops = {
+	.show   = sysaufs_si_show
+};
+
+static struct kobj_type au_sbi_ktype = {
+	.release	= au_si_free,
+	.sysfs_ops	= &au_sbi_ops,
+	.default_attrs	= sysaufs_si_attrs
+};
+
+/* ---------------------------------------------------------------------- */
+
+int sysaufs_si_init(struct au_sbinfo *sbinfo)
+{
+	int err;
+
+	sbinfo->si_kobj.kset = sysaufs_ket;
+	/* cf. sysaufs_name() */
+	err = kobject_init_and_add
+		(&sbinfo->si_kobj, &au_sbi_ktype, /*&sysaufs_ket->kobj*/NULL,
+		 SysaufsSiNamePrefix "%lx", sysaufs_si_id(sbinfo));
+
+	dbgaufs_si_null(sbinfo);
+	if (!err) {
+		err = dbgaufs_si_init(sbinfo);
+		if (unlikely(err))
+			kobject_put(&sbinfo->si_kobj);
+	}
+	return err;
+}
+
+void sysaufs_fin(void)
+{
+	dbgaufs_fin();
+	sysfs_remove_group(&sysaufs_ket->kobj, sysaufs_attr_group);
+	kset_unregister(sysaufs_ket);
+}
+
+int __init sysaufs_init(void)
+{
+	int err;
+
+	do {
+		get_random_bytes(&sysaufs_si_mask, sizeof(sysaufs_si_mask));
+	} while (!sysaufs_si_mask);
+
+	sysaufs_ket = kset_create_and_add(AUFS_NAME, NULL, fs_kobj);
+	err = PTR_ERR(sysaufs_ket);
+	if (IS_ERR(sysaufs_ket))
+		goto out;
+	err = sysfs_create_group(&sysaufs_ket->kobj, sysaufs_attr_group);
+	if (unlikely(err)) {
+		kset_unregister(sysaufs_ket);
+		goto out;
+	}
+
+	err = dbgaufs_init();
+	if (unlikely(err))
+		sysaufs_fin();
+ out:
+	return err;
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/dbgaufs.h
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/dbgaufs.h
@@ -0,0 +1,79 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * debugfs interface
+ */
+
+#ifndef __DBGAUFS_H__
+#define __DBGAUFS_H__
+
+#ifdef __KERNEL__
+
+#include <linux/init.h>
+#include <linux/aufs_type.h>
+
+struct super_block;
+struct au_sbinfo;
+
+#ifdef CONFIG_DEBUG_FS
+/* dbgaufs.c */
+void dbgaufs_brs_del(struct super_block *sb, aufs_bindex_t bindex);
+void dbgaufs_brs_add(struct super_block *sb, aufs_bindex_t bindex);
+void dbgaufs_si_fin(struct au_sbinfo *sbinfo);
+int dbgaufs_si_init(struct au_sbinfo *sbinfo);
+void dbgaufs_fin(void);
+int __init dbgaufs_init(void);
+
+#else
+
+static inline
+void dbgaufs_brs_del(struct super_block *sb, aufs_bindex_t bindex)
+{
+	/* empty */
+}
+
+static inline
+void dbgaufs_brs_add(struct super_block *sb, aufs_bindex_t bindex)
+{
+	/* empty */
+}
+
+static inline
+void dbgaufs_si_fin(struct au_sbinfo *sbinfo)
+{
+	/* empty */
+}
+
+static inline
+int dbgaufs_si_init(struct au_sbinfo *sbinfo)
+{
+	return 0;
+}
+
+#define dbgaufs_fin()	do {} while (0)
+
+static inline
+int __init dbgaufs_init(void)
+{
+	return 0;
+}
+#endif /* CONFIG_DEBUG_FS */
+
+#endif /* __KERNEL__ */
+#endif /* __DBGAUFS_H__ */
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/wkq.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/wkq.c
@@ -0,0 +1,259 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * workqueue for asynchronous/super-io operations
+ * todo: try new dredential scheme
+ */
+
+#include <linux/module.h>
+#include "aufs.h"
+
+/* internal workqueue named AUFS_WKQ_NAME */
+static struct au_wkq {
+	struct workqueue_struct	*q;
+
+	/* balancing */
+	atomic_t		busy;
+} *au_wkq;
+
+struct au_wkinfo {
+	struct work_struct wk;
+	struct super_block *sb;
+
+	unsigned int flags; /* see wkq.h */
+
+	au_wkq_func_t func;
+	void *args;
+
+	atomic_t *busyp;
+	struct completion *comp;
+};
+
+/* ---------------------------------------------------------------------- */
+
+static int enqueue(struct au_wkq *wkq, struct au_wkinfo *wkinfo)
+{
+	wkinfo->busyp = &wkq->busy;
+	if (au_ftest_wkq(wkinfo->flags, WAIT))
+		return !queue_work(wkq->q, &wkinfo->wk);
+	else
+		return !schedule_work(&wkinfo->wk);
+}
+
+static void do_wkq(struct au_wkinfo *wkinfo)
+{
+	unsigned int idle, n;
+	int i, idle_idx;
+
+	while (1) {
+		if (au_ftest_wkq(wkinfo->flags, WAIT)) {
+			idle_idx = 0;
+			idle = UINT_MAX;
+			for (i = 0; i < aufs_nwkq; i++) {
+				n = atomic_inc_return(&au_wkq[i].busy);
+				if (n == 1 && !enqueue(au_wkq + i, wkinfo))
+					return; /* success */
+
+				if (n < idle) {
+					idle_idx = i;
+					idle = n;
+				}
+				atomic_dec(&au_wkq[i].busy);
+			}
+		} else
+			idle_idx = aufs_nwkq;
+
+		atomic_inc(&au_wkq[idle_idx].busy);
+		if (!enqueue(au_wkq + idle_idx, wkinfo))
+			return; /* success */
+
+		/* impossible? */
+		AuWarn1("failed to queue_work()\n");
+		yield();
+	}
+}
+
+static void wkq_func(struct work_struct *wk)
+{
+	struct au_wkinfo *wkinfo = container_of(wk, struct au_wkinfo, wk);
+
+	wkinfo->func(wkinfo->args);
+	atomic_dec_return(wkinfo->busyp);
+	if (au_ftest_wkq(wkinfo->flags, WAIT))
+		complete(wkinfo->comp);
+	else {
+		kobject_put(&au_sbi(wkinfo->sb)->si_kobj);
+		module_put(THIS_MODULE);
+		kfree(wkinfo);
+	}
+}
+
+/*
+ * Since struct completion is large, try allocating it dynamically.
+ */
+#if defined(CONFIG_4KSTACKS) || defined(AuTest4KSTACKS)
+#define AuWkqCompDeclare(name)	struct completion *comp = NULL
+
+static int au_wkq_comp_alloc(struct au_wkinfo *wkinfo, struct completion **comp)
+{
+	*comp = kmalloc(sizeof(**comp), GFP_NOFS);
+	if (*comp) {
+		init_completion(*comp);
+		wkinfo->comp = *comp;
+		return 0;
+	}
+	return -ENOMEM;
+}
+
+static void au_wkq_comp_free(struct completion *comp)
+{
+	kfree(comp);
+}
+
+#else
+
+/* no braces */
+#define AuWkqCompDeclare(name) \
+	DECLARE_COMPLETION_ONSTACK(_ ## name); \
+	struct completion *comp = &_ ## name
+
+static int au_wkq_comp_alloc(struct au_wkinfo *wkinfo, struct completion **comp)
+{
+	wkinfo->comp = *comp;
+	return 0;
+}
+
+static void au_wkq_comp_free(struct completion *comp __maybe_unused)
+{
+	/* empty */
+}
+#endif /* 4KSTACKS */
+
+static void au_wkq_run(struct au_wkinfo *wkinfo)
+{
+	au_dbg_verify_kthread();
+	INIT_WORK(&wkinfo->wk, wkq_func);
+	do_wkq(wkinfo);
+}
+
+int au_wkq_wait(au_wkq_func_t func, void *args)
+{
+	int err;
+	AuWkqCompDeclare(comp);
+	struct au_wkinfo wkinfo = {
+		.flags	= AuWkq_WAIT,
+		.func	= func,
+		.args	= args
+	};
+
+	err = au_wkq_comp_alloc(&wkinfo, &comp);
+	if (!err) {
+		au_wkq_run(&wkinfo);
+		/* no timeout, no interrupt */
+		wait_for_completion(wkinfo.comp);
+		au_wkq_comp_free(comp);
+	}
+
+	return err;
+
+}
+
+int au_wkq_nowait(au_wkq_func_t func, void *args, struct super_block *sb)
+{
+	int err;
+	struct au_wkinfo *wkinfo;
+
+	atomic_inc(&au_sbi(sb)->si_nowait.nw_len);
+
+	/*
+	 * wkq_func() must free this wkinfo.
+	 * it highly depends upon the implementation of workqueue.
+	 */
+	err = 0;
+	wkinfo = kmalloc(sizeof(*wkinfo), GFP_NOFS);
+	if (wkinfo) {
+		wkinfo->sb = sb;
+		wkinfo->flags = !AuWkq_WAIT;
+		wkinfo->func = func;
+		wkinfo->args = args;
+		wkinfo->comp = NULL;
+		kobject_get(&au_sbi(sb)->si_kobj);
+		__module_get(THIS_MODULE);
+
+		au_wkq_run(wkinfo);
+	} else {
+		err = -ENOMEM;
+		atomic_dec(&au_sbi(sb)->si_nowait.nw_len);
+	}
+
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+void au_nwt_init(struct au_nowait_tasks *nwt)
+{
+	atomic_set(&nwt->nw_len, 0);
+	/* smp_mb();*/ /* atomic_set */
+	init_waitqueue_head(&nwt->nw_wq);
+}
+
+void au_wkq_fin(void)
+{
+	int i;
+
+	for (i = 0; i < aufs_nwkq; i++)
+		if (au_wkq[i].q && !IS_ERR(au_wkq[i].q))
+			destroy_workqueue(au_wkq[i].q);
+	kfree(au_wkq);
+}
+
+int __init au_wkq_init(void)
+{
+	int err, i;
+	struct au_wkq *nowaitq;
+
+	/* '+1' is for accounting of nowait queue */
+	err = -ENOMEM;
+	au_wkq = kcalloc(aufs_nwkq + 1, sizeof(*au_wkq), GFP_NOFS);
+	if (unlikely(!au_wkq))
+		goto out;
+
+	err = 0;
+	for (i = 0; i < aufs_nwkq; i++) {
+		au_wkq[i].q = create_singlethread_workqueue(AUFS_WKQ_NAME);
+		if (au_wkq[i].q && !IS_ERR(au_wkq[i].q)) {
+			atomic_set(&au_wkq[i].busy, 0);
+			continue;
+		}
+
+		err = PTR_ERR(au_wkq[i].q);
+		au_wkq_fin();
+		goto out;
+	}
+
+	/* nowait accounting */
+	nowaitq = au_wkq + aufs_nwkq;
+	atomic_set(&nowaitq->busy, 0);
+	nowaitq->q = NULL;
+	/* smp_mb(); */ /* atomic_set */
+
+ out:
+	return err;
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/Makefile
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/Makefile
@@ -0,0 +1,33 @@
+
+include ${src}/magic.mk
+ifeq (${CONFIG_AUFS_FS},m)
+include ${src}/conf.mk
+endif
+-include ${src}/priv_def.mk
+
+# cf. include/linux/kernel.h
+# enable pr_debug
+ccflags-y += -DDEBUG
+ccflags-y += -D'pr_fmt(fmt)="aufs %s:%d:%s[%d]: " fmt, \
+	__func__, __LINE__, current->comm, current->pid'
+
+obj-$(CONFIG_AUFS_FS) += aufs.o
+aufs-y := module.o sbinfo.o super.o branch.o xino.o sysaufs.o opts.o \
+	wkq.o vfsub.o dcsub.o \
+	cpup.o whout.o plink.o wbr_policy.o \
+	dinfo.o dentry.o \
+	finfo.o file.o f_op.o \
+	dir.o vdir.o \
+	iinfo.o inode.o i_op.o i_op_add.o i_op_del.o i_op_ren.o \
+	ioctl.o
+
+# all are boolean
+aufs-$(CONFIG_SYSFS) += sysfs.o
+aufs-$(CONFIG_DEBUG_FS) += dbgaufs.o
+aufs-$(CONFIG_AUFS_BDEV_LOOP) += loop.o
+aufs-$(CONFIG_AUFS_HINOTIFY) += hinotify.o
+aufs-$(CONFIG_AUFS_EXPORT) += export.o
+aufs-$(CONFIG_AUFS_POLL) += poll.o
+aufs-$(CONFIG_AUFS_RDU) += rdu.o
+aufs-$(CONFIG_AUFS_DEBUG) += debug.o
+aufs-$(CONFIG_AUFS_MAGIC_SYSRQ) += sysrq.o
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/branch.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/branch.c
@@ -0,0 +1,988 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * branch management
+ */
+
+#include <linux/file.h>
+#include <linux/statfs.h>
+#include "aufs.h"
+
+/*
+ * free a single branch
+ */
+static void au_br_do_free(struct au_branch *br)
+{
+	int i;
+	struct au_wbr *wbr;
+
+	if (br->br_xino.xi_file)
+		fput(br->br_xino.xi_file);
+	mutex_destroy(&br->br_xino.xi_nondir_mtx);
+
+	AuDebugOn(atomic_read(&br->br_count));
+
+	wbr = br->br_wbr;
+	if (wbr) {
+		for (i = 0; i < AuBrWh_Last; i++)
+			dput(wbr->wbr_wh[i]);
+		AuDebugOn(atomic_read(&wbr->wbr_wh_running));
+		AuRwDestroy(&wbr->wbr_wh_rwsem);
+	}
+
+	/* some filesystems acquire extra lock */
+	/* lockdep_off(); */
+	mntput(br->br_mnt);
+	/* lockdep_on(); */
+
+	kfree(wbr);
+	kfree(br);
+}
+
+/*
+ * frees all branches
+ */
+void au_br_free(struct au_sbinfo *sbinfo)
+{
+	aufs_bindex_t bmax;
+	struct au_branch **br;
+
+	AuRwMustWriteLock(&sbinfo->si_rwsem);
+
+	bmax = sbinfo->si_bend + 1;
+	br = sbinfo->si_branch;
+	while (bmax--)
+		au_br_do_free(*br++);
+}
+
+/*
+ * find the index of a branch which is specified by @br_id.
+ */
+int au_br_index(struct super_block *sb, aufs_bindex_t br_id)
+{
+	aufs_bindex_t bindex, bend;
+
+	bend = au_sbend(sb);
+	for (bindex = 0; bindex <= bend; bindex++)
+		if (au_sbr_id(sb, bindex) == br_id)
+			return bindex;
+	return -1;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/*
+ * add a branch
+ */
+
+static int test_overlap(struct super_block *sb, struct dentry *h_d1,
+			struct dentry *h_d2)
+{
+	if (unlikely(h_d1 == h_d2))
+		return 1;
+	return !!au_test_subdir(h_d1, h_d2)
+		|| !!au_test_subdir(h_d2, h_d1)
+		|| au_test_loopback_overlap(sb, h_d1, h_d2)
+		|| au_test_loopback_overlap(sb, h_d2, h_d1);
+}
+
+/*
+ * returns a newly allocated branch. @new_nbranch is a number of branches
+ * after adding a branch.
+ */
+static struct au_branch *au_br_alloc(struct super_block *sb, int new_nbranch,
+				     int perm)
+{
+	struct au_branch *add_branch;
+	struct dentry *root;
+
+	root = sb->s_root;
+	add_branch = kmalloc(sizeof(*add_branch), GFP_NOFS);
+	if (unlikely(!add_branch))
+		goto out;
+
+	add_branch->br_wbr = NULL;
+	if (au_br_writable(perm)) {
+		/* may be freed separately at changing the branch permission */
+		add_branch->br_wbr = kmalloc(sizeof(*add_branch->br_wbr),
+					     GFP_NOFS);
+		if (unlikely(!add_branch->br_wbr))
+			goto out_br;
+	}
+
+	if (unlikely(au_sbr_realloc(au_sbi(sb), new_nbranch)
+		     || au_di_realloc(au_di(root), new_nbranch)
+		     || au_ii_realloc(au_ii(root->d_inode), new_nbranch)))
+		goto out_wbr;
+	return add_branch; /* success */
+
+ out_wbr:
+	kfree(add_branch->br_wbr);
+ out_br:
+	kfree(add_branch);
+ out:
+	return ERR_PTR(-ENOMEM);
+}
+
+/*
+ * test if the branch permission is legal or not.
+ */
+static int test_br(struct inode *inode, int brperm, char *path)
+{
+	int err;
+
+	err = 0;
+	if (unlikely(au_br_writable(brperm) && IS_RDONLY(inode))) {
+		pr_err("write permission for readonly mount or inode, %s\n",
+		       path);
+		err = -EINVAL;
+	}
+
+	return err;
+}
+
+/*
+ * returns:
+ * 0: success, the caller will add it
+ * plus: success, it is already unified, the caller should ignore it
+ * minus: error
+ */
+static int test_add(struct super_block *sb, struct au_opt_add *add, int remount)
+{
+	int err;
+	aufs_bindex_t bend, bindex;
+	struct dentry *root;
+	struct inode *inode, *h_inode;
+
+	root = sb->s_root;
+	bend = au_sbend(sb);
+	if (unlikely(bend >= 0
+		     && au_find_dbindex(root, add->path.dentry) >= 0)) {
+		err = 1;
+		if (!remount) {
+			err = -EINVAL;
+			pr_err("%s duplicated\n", add->pathname);
+		}
+		goto out;
+	}
+
+	err = -ENOSPC; /* -E2BIG; */
+	if (unlikely(AUFS_BRANCH_MAX <= add->bindex
+		     || AUFS_BRANCH_MAX - 1 <= bend)) {
+		pr_err("number of branches exceeded %s\n", add->pathname);
+		goto out;
+	}
+
+	err = -EDOM;
+	if (unlikely(add->bindex < 0 || bend + 1 < add->bindex)) {
+		pr_err("bad index %d\n", add->bindex);
+		goto out;
+	}
+
+	inode = add->path.dentry->d_inode;
+	err = -ENOENT;
+	if (unlikely(!inode->i_nlink)) {
+		pr_err("no existence %s\n", add->pathname);
+		goto out;
+	}
+
+	err = -EINVAL;
+	if (unlikely(inode->i_sb == sb)) {
+		pr_err("%s must be outside\n", add->pathname);
+		goto out;
+	}
+
+	if (unlikely(au_test_fs_unsuppoted(inode->i_sb))) {
+		pr_err("unsupported filesystem, %s (%s)\n",
+		       add->pathname, au_sbtype(inode->i_sb));
+		goto out;
+	}
+
+	err = test_br(add->path.dentry->d_inode, add->perm, add->pathname);
+	if (unlikely(err))
+		goto out;
+
+	if (bend < 0)
+		return 0; /* success */
+
+	err = -EINVAL;
+	for (bindex = 0; bindex <= bend; bindex++)
+		if (unlikely(test_overlap(sb, add->path.dentry,
+					  au_h_dptr(root, bindex)))) {
+			pr_err("%s is overlapped\n", add->pathname);
+			goto out;
+		}
+
+	err = 0;
+	if (au_opt_test(au_mntflags(sb), WARN_PERM)) {
+		h_inode = au_h_dptr(root, 0)->d_inode;
+		if ((h_inode->i_mode & S_IALLUGO) != (inode->i_mode & S_IALLUGO)
+		    || h_inode->i_uid != inode->i_uid
+		    || h_inode->i_gid != inode->i_gid)
+			pr_warning("uid/gid/perm %s %u/%u/0%o, %u/%u/0%o\n",
+				   add->pathname,
+				   inode->i_uid, inode->i_gid,
+				   (inode->i_mode & S_IALLUGO),
+				   h_inode->i_uid, h_inode->i_gid,
+				   (h_inode->i_mode & S_IALLUGO));
+	}
+
+ out:
+	return err;
+}
+
+/*
+ * initialize or clean the whiteouts for an adding branch
+ */
+static int au_br_init_wh(struct super_block *sb, struct au_branch *br,
+			 int new_perm, struct dentry *h_root)
+{
+	int err, old_perm;
+	aufs_bindex_t bindex;
+	struct mutex *h_mtx;
+	struct au_wbr *wbr;
+	struct au_hinode *hdir;
+
+	wbr = br->br_wbr;
+	old_perm = br->br_perm;
+	br->br_perm = new_perm;
+	hdir = NULL;
+	h_mtx = NULL;
+	bindex = au_br_index(sb, br->br_id);
+	if (0 <= bindex) {
+		hdir = au_hi(sb->s_root->d_inode, bindex);
+		au_hin_imtx_lock_nested(hdir, AuLsc_I_PARENT);
+	} else {
+		h_mtx = &h_root->d_inode->i_mutex;
+		mutex_lock_nested(h_mtx, AuLsc_I_PARENT);
+	}
+	if (!wbr)
+		err = au_wh_init(h_root, br, sb);
+	else {
+		wbr_wh_write_lock(wbr);
+		err = au_wh_init(h_root, br, sb);
+		wbr_wh_write_unlock(wbr);
+	}
+	if (hdir)
+		au_hin_imtx_unlock(hdir);
+	else
+		mutex_unlock(h_mtx);
+	br->br_perm = old_perm;
+
+	if (!err && wbr && !au_br_writable(new_perm)) {
+		kfree(wbr);
+		br->br_wbr = NULL;
+	}
+
+	return err;
+}
+
+static int au_wbr_init(struct au_branch *br, struct super_block *sb,
+		       int perm, struct path *path)
+{
+	int err;
+	struct kstatfs kst;
+	struct au_wbr *wbr;
+	struct dentry *h_dentry;
+
+	wbr = br->br_wbr;
+	au_rw_init(&wbr->wbr_wh_rwsem);
+	memset(wbr->wbr_wh, 0, sizeof(wbr->wbr_wh));
+	atomic_set(&wbr->wbr_wh_running, 0);
+	wbr->wbr_bytes = 0;
+
+	/*
+	 * a limit for rmdir/rename a dir
+	 * cf. AUFS_MAX_NAMELEN in include/linux/aufs_type.h
+	 */
+	h_dentry = path->dentry;
+	err = vfs_statfs(h_dentry, &kst);
+	if (unlikely(err))
+		goto out;
+	err = -EINVAL;
+	if (kst.f_namelen >= NAME_MAX)
+		err = au_br_init_wh(sb, br, perm, h_dentry);
+	else
+		pr_err("%.*s(%s), unsupported namelen %ld\n",
+		       AuDLNPair(h_dentry), au_sbtype(h_dentry->d_sb),
+		       kst.f_namelen);
+
+ out:
+	return err;
+}
+
+/* intialize a new branch */
+static int au_br_init(struct au_branch *br, struct super_block *sb,
+		      struct au_opt_add *add)
+{
+	int err;
+
+	err = 0;
+	memset(&br->br_xino, 0, sizeof(br->br_xino));
+	mutex_init(&br->br_xino.xi_nondir_mtx);
+	br->br_perm = add->perm;
+	br->br_mnt = add->path.mnt; /* set first, mntget() later */
+	atomic_set(&br->br_count, 0);
+	br->br_xino_upper = AUFS_XINO_TRUNC_INIT;
+	atomic_set(&br->br_xino_running, 0);
+	br->br_id = au_new_br_id(sb);
+
+	if (au_br_writable(add->perm)) {
+		err = au_wbr_init(br, sb, add->perm, &add->path);
+		if (unlikely(err))
+			goto out;
+	}
+
+	if (au_opt_test(au_mntflags(sb), XINO)) {
+		err = au_xino_br(sb, br, add->path.dentry->d_inode->i_ino,
+				 au_sbr(sb, 0)->br_xino.xi_file, /*do_test*/1);
+		if (unlikely(err)) {
+			AuDebugOn(br->br_xino.xi_file);
+			goto out;
+		}
+	}
+
+	sysaufs_br_init(br);
+	mntget(add->path.mnt);
+
+ out:
+	return err;
+}
+
+static void au_br_do_add_brp(struct au_sbinfo *sbinfo, aufs_bindex_t bindex,
+			     struct au_branch *br, aufs_bindex_t bend,
+			     aufs_bindex_t amount)
+{
+	struct au_branch **brp;
+
+	AuRwMustWriteLock(&sbinfo->si_rwsem);
+
+	brp = sbinfo->si_branch + bindex;
+	memmove(brp + 1, brp, sizeof(*brp) * amount);
+	*brp = br;
+	sbinfo->si_bend++;
+	if (unlikely(bend < 0))
+		sbinfo->si_bend = 0;
+}
+
+static void au_br_do_add_hdp(struct au_dinfo *dinfo, aufs_bindex_t bindex,
+			     aufs_bindex_t bend, aufs_bindex_t amount)
+{
+	struct au_hdentry *hdp;
+
+	AuRwMustWriteLock(&dinfo->di_rwsem);
+
+	hdp = dinfo->di_hdentry + bindex;
+	memmove(hdp + 1, hdp, sizeof(*hdp) * amount);
+	au_h_dentry_init(hdp);
+	dinfo->di_bend++;
+	if (unlikely(bend < 0))
+		dinfo->di_bstart = 0;
+}
+
+static void au_br_do_add_hip(struct au_iinfo *iinfo, aufs_bindex_t bindex,
+			     aufs_bindex_t bend, aufs_bindex_t amount)
+{
+	struct au_hinode *hip;
+
+	AuRwMustWriteLock(&iinfo->ii_rwsem);
+
+	hip = iinfo->ii_hinode + bindex;
+	memmove(hip + 1, hip, sizeof(*hip) * amount);
+	hip->hi_inode = NULL;
+	au_hin_init(hip, NULL);
+	iinfo->ii_bend++;
+	if (unlikely(bend < 0))
+		iinfo->ii_bstart = 0;
+}
+
+static void au_br_do_add(struct super_block *sb, struct dentry *h_dentry,
+			 struct au_branch *br, aufs_bindex_t bindex)
+{
+	struct dentry *root;
+	struct inode *root_inode;
+	aufs_bindex_t bend, amount;
+
+	root = sb->s_root;
+	root_inode = root->d_inode;
+	au_plink_block_maintain(sb);
+	bend = au_sbend(sb);
+	amount = bend + 1 - bindex;
+	au_br_do_add_brp(au_sbi(sb), bindex, br, bend, amount);
+	au_br_do_add_hdp(au_di(root), bindex, bend, amount);
+	au_br_do_add_hip(au_ii(root_inode), bindex, bend, amount);
+	au_set_h_dptr(root, bindex, dget(h_dentry));
+	au_set_h_iptr(root_inode, bindex, au_igrab(h_dentry->d_inode),
+		      /*flags*/0);
+}
+
+int au_br_add(struct super_block *sb, struct au_opt_add *add, int remount)
+{
+	int err;
+	aufs_bindex_t bend, add_bindex;
+	struct dentry *root, *h_dentry;
+	struct inode *root_inode;
+	struct au_branch *add_branch;
+
+	root = sb->s_root;
+	root_inode = root->d_inode;
+	IMustLock(root_inode);
+	err = test_add(sb, add, remount);
+	if (unlikely(err < 0))
+		goto out;
+	if (err) {
+		err = 0;
+		goto out; /* success */
+	}
+
+	bend = au_sbend(sb);
+	add_branch = au_br_alloc(sb, bend + 2, add->perm);
+	err = PTR_ERR(add_branch);
+	if (IS_ERR(add_branch))
+		goto out;
+
+	err = au_br_init(add_branch, sb, add);
+	if (unlikely(err)) {
+		au_br_do_free(add_branch);
+		goto out;
+	}
+
+	add_bindex = add->bindex;
+	h_dentry = add->path.dentry;
+	if (!remount)
+		au_br_do_add(sb, h_dentry, add_branch, add_bindex);
+	else {
+		sysaufs_brs_del(sb, add_bindex);
+		au_br_do_add(sb, h_dentry, add_branch, add_bindex);
+		sysaufs_brs_add(sb, add_bindex);
+	}
+
+	if (!add_bindex) {
+		au_cpup_attr_all(root_inode, /*force*/1);
+		sb->s_maxbytes = h_dentry->d_sb->s_maxbytes;
+	} else
+		au_add_nlink(root_inode, h_dentry->d_inode);
+
+	/*
+	 * this test/set prevents aufs from handling unnecesary inotify events
+	 * of xino files, in a case of re-adding a writable branch which was
+	 * once detached from aufs.
+	 */
+	if (au_xino_brid(sb) < 0
+	    && au_br_writable(add_branch->br_perm)
+	    && !au_test_fs_bad_xino(h_dentry->d_sb)
+	    && add_branch->br_xino.xi_file
+	    && add_branch->br_xino.xi_file->f_dentry->d_parent == h_dentry)
+		au_xino_brid_set(sb, add_branch->br_id);
+
+ out:
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/*
+ * delete a branch
+ */
+
+/* to show the line number, do not make it inlined function */
+#define AuVerbose(do_info, fmt, ...) do { \
+	if (do_info) \
+		pr_info(fmt, ##__VA_ARGS__); \
+} while (0)
+
+/*
+ * test if the branch is deletable or not.
+ */
+static int test_dentry_busy(struct dentry *root, aufs_bindex_t bindex,
+			    unsigned int sigen)
+{
+	int err, i, j, ndentry;
+	aufs_bindex_t bstart, bend;
+	unsigned char verbose;
+	struct au_dcsub_pages dpages;
+	struct au_dpage *dpage;
+	struct dentry *d;
+	struct inode *inode;
+
+	err = au_dpages_init(&dpages, GFP_NOFS);
+	if (unlikely(err))
+		goto out;
+	err = au_dcsub_pages(&dpages, root, NULL, NULL);
+	if (unlikely(err))
+		goto out_dpages;
+
+	verbose = !!au_opt_test(au_mntflags(root->d_sb), VERBOSE);
+	for (i = 0; !err && i < dpages.ndpage; i++) {
+		dpage = dpages.dpages + i;
+		ndentry = dpage->ndentry;
+		for (j = 0; !err && j < ndentry; j++) {
+			d = dpage->dentries[j];
+			AuDebugOn(!atomic_read(&d->d_count));
+			inode = d->d_inode;
+			if (au_digen(d) == sigen && au_iigen(inode) == sigen)
+				di_read_lock_child(d, AuLock_IR);
+			else {
+				di_write_lock_child(d);
+				err = au_reval_dpath(d, sigen);
+				if (!err)
+					di_downgrade_lock(d, AuLock_IR);
+				else {
+					di_write_unlock(d);
+					break;
+				}
+			}
+
+			bstart = au_dbstart(d);
+			bend = au_dbend(d);
+			if (bstart <= bindex
+			    && bindex <= bend
+			    && au_h_dptr(d, bindex)
+			    && (!S_ISDIR(inode->i_mode) || bstart == bend)) {
+				err = -EBUSY;
+				AuVerbose(verbose, "busy %.*s\n", AuDLNPair(d));
+			}
+			di_read_unlock(d, AuLock_IR);
+		}
+	}
+
+ out_dpages:
+	au_dpages_free(&dpages);
+ out:
+	return err;
+}
+
+static int test_inode_busy(struct super_block *sb, aufs_bindex_t bindex,
+			   unsigned int sigen)
+{
+	int err;
+	struct inode *i;
+	aufs_bindex_t bstart, bend;
+	unsigned char verbose;
+
+	err = 0;
+	verbose = !!au_opt_test(au_mntflags(sb), VERBOSE);
+	list_for_each_entry(i, &sb->s_inodes, i_sb_list) {
+		AuDebugOn(!atomic_read(&i->i_count));
+		if (!list_empty(&i->i_dentry))
+			continue;
+
+		if (au_iigen(i) == sigen)
+			ii_read_lock_child(i);
+		else {
+			ii_write_lock_child(i);
+			err = au_refresh_hinode_self(i, /*do_attr*/1);
+			if (!err)
+				ii_downgrade_lock(i);
+			else {
+				ii_write_unlock(i);
+				break;
+			}
+		}
+
+		bstart = au_ibstart(i);
+		bend = au_ibend(i);
+		if (bstart <= bindex
+		    && bindex <= bend
+		    && au_h_iptr(i, bindex)
+		    && (!S_ISDIR(i->i_mode) || bstart == bend)) {
+			err = -EBUSY;
+			AuVerbose(verbose, "busy i%lu\n", i->i_ino);
+			ii_read_unlock(i);
+			break;
+		}
+		ii_read_unlock(i);
+	}
+
+	return err;
+}
+
+static int test_children_busy(struct dentry *root, aufs_bindex_t bindex)
+{
+	int err;
+	unsigned int sigen;
+
+	sigen = au_sigen(root->d_sb);
+	DiMustNoWaiters(root);
+	IiMustNoWaiters(root->d_inode);
+	di_write_unlock(root);
+	err = test_dentry_busy(root, bindex, sigen);
+	if (!err)
+		err = test_inode_busy(root->d_sb, bindex, sigen);
+	di_write_lock_child(root); /* aufs_write_lock() calls ..._child() */
+
+	return err;
+}
+
+static void au_br_do_del_brp(struct au_sbinfo *sbinfo,
+			     const aufs_bindex_t bindex,
+			     const aufs_bindex_t bend)
+{
+	struct au_branch **brp, **p;
+
+	AuRwMustWriteLock(&sbinfo->si_rwsem);
+
+	brp = sbinfo->si_branch + bindex;
+	if (bindex < bend)
+		memmove(brp, brp + 1, sizeof(*brp) * (bend - bindex));
+	sbinfo->si_branch[0 + bend] = NULL;
+	sbinfo->si_bend--;
+
+	p = krealloc(sbinfo->si_branch, sizeof(*p) * bend, GFP_NOFS);
+	if (p)
+		sbinfo->si_branch = p;
+}
+
+static void au_br_do_del_hdp(struct au_dinfo *dinfo, const aufs_bindex_t bindex,
+			     const aufs_bindex_t bend)
+{
+	struct au_hdentry *hdp, *p;
+
+	AuRwMustWriteLock(&dinfo->di_rwsem);
+
+	hdp = dinfo->di_hdentry + bindex;
+	if (bindex < bend)
+		memmove(hdp, hdp + 1, sizeof(*hdp) * (bend - bindex));
+	dinfo->di_hdentry[0 + bend].hd_dentry = NULL;
+	dinfo->di_bend--;
+
+	p = krealloc(dinfo->di_hdentry, sizeof(*p) * bend, GFP_NOFS);
+	if (p)
+		dinfo->di_hdentry = p;
+}
+
+static void au_br_do_del_hip(struct au_iinfo *iinfo, const aufs_bindex_t bindex,
+			     const aufs_bindex_t bend)
+{
+	struct au_hinode *hip, *p;
+
+	AuRwMustWriteLock(&iinfo->ii_rwsem);
+
+	hip = iinfo->ii_hinode + bindex;
+	if (bindex < bend)
+		memmove(hip, hip + 1, sizeof(*hip) * (bend - bindex));
+	iinfo->ii_hinode[0 + bend].hi_inode = NULL;
+	au_hin_init(iinfo->ii_hinode + bend, NULL);
+	iinfo->ii_bend--;
+
+	p = krealloc(iinfo->ii_hinode, sizeof(*p) * bend, GFP_NOFS);
+	if (p)
+		iinfo->ii_hinode = p;
+}
+
+static void au_br_do_del(struct super_block *sb, aufs_bindex_t bindex,
+			 struct au_branch *br)
+{
+	aufs_bindex_t bend;
+	struct au_sbinfo *sbinfo;
+	struct dentry *root;
+	struct inode *inode;
+
+	SiMustWriteLock(sb);
+
+	root = sb->s_root;
+	inode = root->d_inode;
+	au_plink_block_maintain(sb);
+	sbinfo = au_sbi(sb);
+	bend = sbinfo->si_bend;
+
+	dput(au_h_dptr(root, bindex));
+	au_hiput(au_hi(inode, bindex));
+	au_br_do_free(br);
+
+	au_br_do_del_brp(sbinfo, bindex, bend);
+	au_br_do_del_hdp(au_di(root), bindex, bend);
+	au_br_do_del_hip(au_ii(inode), bindex, bend);
+}
+
+int au_br_del(struct super_block *sb, struct au_opt_del *del, int remount)
+{
+	int err, rerr, i;
+	unsigned int mnt_flags;
+	aufs_bindex_t bindex, bend, br_id;
+	unsigned char do_wh, verbose;
+	struct au_branch *br;
+	struct au_wbr *wbr;
+
+	err = 0;
+	bindex = au_find_dbindex(sb->s_root, del->h_path.dentry);
+	if (bindex < 0) {
+		if (remount)
+			goto out; /* success */
+		err = -ENOENT;
+		pr_err("%s no such branch\n", del->pathname);
+		goto out;
+	}
+	AuDbg("bindex b%d\n", bindex);
+
+	err = -EBUSY;
+	mnt_flags = au_mntflags(sb);
+	verbose = !!au_opt_test(mnt_flags, VERBOSE);
+	bend = au_sbend(sb);
+	if (unlikely(!bend)) {
+		AuVerbose(verbose, "no more branches left\n");
+		goto out;
+	}
+	br = au_sbr(sb, bindex);
+	i = atomic_read(&br->br_count);
+	if (unlikely(i)) {
+		AuVerbose(verbose, "%d file(s) opened\n", i);
+		goto out;
+	}
+
+	wbr = br->br_wbr;
+	do_wh = wbr && (wbr->wbr_whbase || wbr->wbr_plink || wbr->wbr_orph);
+	if (do_wh) {
+		/* instead of WbrWhMustWriteLock(wbr) */
+		SiMustWriteLock(sb);
+		for (i = 0; i < AuBrWh_Last; i++) {
+			dput(wbr->wbr_wh[i]);
+			wbr->wbr_wh[i] = NULL;
+		}
+	}
+
+	err = test_children_busy(sb->s_root, bindex);
+	if (unlikely(err)) {
+		if (do_wh)
+			goto out_wh;
+		goto out;
+	}
+
+	err = 0;
+	br_id = br->br_id;
+	if (!remount)
+		au_br_do_del(sb, bindex, br);
+	else {
+		sysaufs_brs_del(sb, bindex);
+		au_br_do_del(sb, bindex, br);
+		sysaufs_brs_add(sb, bindex);
+	}
+
+	if (!bindex) {
+		au_cpup_attr_all(sb->s_root->d_inode, /*force*/1);
+		sb->s_maxbytes = au_sbr_sb(sb, 0)->s_maxbytes;
+	} else
+		au_sub_nlink(sb->s_root->d_inode, del->h_path.dentry->d_inode);
+	if (au_opt_test(mnt_flags, PLINK))
+		au_plink_half_refresh(sb, br_id);
+
+	if (au_xino_brid(sb) == br->br_id)
+		au_xino_brid_set(sb, -1);
+	goto out; /* success */
+
+ out_wh:
+	/* revert */
+	rerr = au_br_init_wh(sb, br, br->br_perm, del->h_path.dentry);
+	if (rerr)
+		pr_warning("failed re-creating base whiteout, %s. (%d)\n",
+			   del->pathname, rerr);
+ out:
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/*
+ * change a branch permission
+ */
+
+static void au_warn_ima(void)
+{
+#ifdef CONFIG_IMA
+	/* since it doesn't support mark_files_ro() */
+	pr_warning("RW -> RO makes IMA to produce wrong message");
+#endif
+}
+
+static int do_need_sigen_inc(int a, int b)
+{
+	return au_br_whable(a) && !au_br_whable(b);
+}
+
+static int need_sigen_inc(int old, int new)
+{
+	return do_need_sigen_inc(old, new)
+		|| do_need_sigen_inc(new, old);
+}
+
+static int au_br_mod_files_ro(struct super_block *sb, aufs_bindex_t bindex)
+{
+	int err;
+	unsigned long n, ul, bytes, files;
+	aufs_bindex_t bstart;
+	struct file *file, *hf, **a;
+	const int step_bytes = 1024, /* memory allocation unit */
+		step_files = step_bytes / sizeof(*a);
+
+	err = -ENOMEM;
+	n = 0;
+	bytes = step_bytes;
+	files = step_files;
+	a = kmalloc(bytes, GFP_NOFS);
+	if (unlikely(!a))
+		goto out;
+
+	/* no need file_list_lock() since sbinfo is locked? defered? */
+	list_for_each_entry(file, &sb->s_files, f_u.fu_list) {
+		if (special_file(file->f_dentry->d_inode->i_mode))
+			continue;
+
+		AuDbg("%.*s\n", AuDLNPair(file->f_dentry));
+		fi_read_lock(file);
+		if (unlikely(au_test_mmapped(file))) {
+			err = -EBUSY;
+			FiMustNoWaiters(file);
+			fi_read_unlock(file);
+			goto out_free;
+		}
+
+		bstart = au_fbstart(file);
+		if (!S_ISREG(file->f_dentry->d_inode->i_mode)
+		    || !(file->f_mode & FMODE_WRITE)
+		    || bstart != bindex) {
+			FiMustNoWaiters(file);
+			fi_read_unlock(file);
+			continue;
+		}
+
+		hf = au_h_fptr(file, bstart);
+		FiMustNoWaiters(file);
+		fi_read_unlock(file);
+
+		if (n < files)
+			a[n++] = hf;
+		else {
+			void *p;
+
+			err = -ENOMEM;
+			bytes += step_bytes;
+			files += step_files;
+			p = krealloc(a, bytes, GFP_NOFS);
+			if (p) {
+				a = p;
+				a[n++] = hf;
+			} else
+				goto out_free;
+		}
+	}
+
+	err = 0;
+	if (n)
+		au_warn_ima();
+	for (ul = 0; ul < n; ul++) {
+		/* todo: already flushed? */
+		/* cf. fs/super.c:mark_files_ro() */
+		hf = a[ul];
+		hf->f_mode &= ~FMODE_WRITE;
+		if (!file_check_writeable(hf)) {
+			file_release_write(hf);
+			mnt_drop_write(hf->f_vfsmnt);
+		}
+	}
+
+ out_free:
+	kfree(a);
+ out:
+	return err;
+}
+
+int au_br_mod(struct super_block *sb, struct au_opt_mod *mod, int remount,
+	      int *do_update)
+{
+	int err, rerr;
+	aufs_bindex_t bindex;
+	struct path path;
+	struct dentry *root;
+	struct au_branch *br;
+
+	root = sb->s_root;
+	au_plink_block_maintain(sb);
+	bindex = au_find_dbindex(root, mod->h_root);
+	if (bindex < 0) {
+		if (remount)
+			return 0; /* success */
+		err = -ENOENT;
+		pr_err("%s no such branch\n", mod->path);
+		goto out;
+	}
+	AuDbg("bindex b%d\n", bindex);
+
+	err = test_br(mod->h_root->d_inode, mod->perm, mod->path);
+	if (unlikely(err))
+		goto out;
+
+	br = au_sbr(sb, bindex);
+	if (br->br_perm == mod->perm)
+		return 0; /* success */
+
+	if (au_br_writable(br->br_perm)) {
+		/* remove whiteout base */
+		err = au_br_init_wh(sb, br, mod->perm, mod->h_root);
+		if (unlikely(err))
+			goto out;
+
+		if (!au_br_writable(mod->perm)) {
+			/* rw --> ro, file might be mmapped */
+			DiMustNoWaiters(root);
+			IiMustNoWaiters(root->d_inode);
+			di_write_unlock(root);
+			err = au_br_mod_files_ro(sb, bindex);
+			/* aufs_write_lock() calls ..._child() */
+			di_write_lock_child(root);
+
+			if (unlikely(err)) {
+				rerr = -ENOMEM;
+				br->br_wbr = kmalloc(sizeof(*br->br_wbr),
+						     GFP_NOFS);
+				if (br->br_wbr) {
+					path.mnt = br->br_mnt;
+					path.dentry = mod->h_root;
+					rerr = au_wbr_init(br, sb, br->br_perm,
+							   &path);
+				}
+				if (unlikely(rerr)) {
+					AuIOErr("nested error %d (%d)\n",
+						rerr, err);
+					br->br_perm = mod->perm;
+				}
+			}
+		}
+	} else if (au_br_writable(mod->perm)) {
+		/* ro --> rw */
+		err = -ENOMEM;
+		br->br_wbr = kmalloc(sizeof(*br->br_wbr), GFP_NOFS);
+		if (br->br_wbr) {
+			path.mnt = br->br_mnt;
+			path.dentry = mod->h_root;
+			err = au_wbr_init(br, sb, mod->perm, &path);
+			if (unlikely(err)) {
+				kfree(br->br_wbr);
+				br->br_wbr = NULL;
+			}
+		}
+	}
+
+	if (!err) {
+		*do_update |= need_sigen_inc(br->br_perm, mod->perm);
+		br->br_perm = mod->perm;
+	}
+
+ out:
+	return err;
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/iinfo.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/iinfo.c
@@ -0,0 +1,283 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * inode private data
+ */
+
+#include "aufs.h"
+
+struct inode *au_h_iptr(struct inode *inode, aufs_bindex_t bindex)
+{
+	struct inode *h_inode;
+
+	IiMustAnyLock(inode);
+
+	h_inode = au_ii(inode)->ii_hinode[0 + bindex].hi_inode;
+	AuDebugOn(h_inode && atomic_read(&h_inode->i_count) <= 0);
+	return h_inode;
+}
+
+/* todo: hard/soft set? */
+void au_set_ibstart(struct inode *inode, aufs_bindex_t bindex)
+{
+	struct au_iinfo *iinfo = au_ii(inode);
+	struct inode *h_inode;
+
+	IiMustWriteLock(inode);
+
+	iinfo->ii_bstart = bindex;
+	h_inode = iinfo->ii_hinode[bindex + 0].hi_inode;
+	if (h_inode)
+		au_cpup_igen(inode, h_inode);
+}
+
+void au_hiput(struct au_hinode *hinode)
+{
+	au_hin_free(hinode);
+	dput(hinode->hi_whdentry);
+	iput(hinode->hi_inode);
+}
+
+unsigned int au_hi_flags(struct inode *inode, int isdir)
+{
+	unsigned int flags;
+	const unsigned int mnt_flags = au_mntflags(inode->i_sb);
+
+	flags = 0;
+	if (au_opt_test(mnt_flags, XINO))
+		au_fset_hi(flags, XINO);
+	if (isdir && au_opt_test(mnt_flags, UDBA_HINOTIFY))
+		au_fset_hi(flags, HINOTIFY);
+	return flags;
+}
+
+void au_set_h_iptr(struct inode *inode, aufs_bindex_t bindex,
+		   struct inode *h_inode, unsigned int flags)
+{
+	struct au_hinode *hinode;
+	struct inode *hi;
+	struct au_iinfo *iinfo = au_ii(inode);
+
+	IiMustWriteLock(inode);
+
+	hinode = iinfo->ii_hinode + bindex;
+	hi = hinode->hi_inode;
+	AuDebugOn(h_inode && atomic_read(&h_inode->i_count) <= 0);
+	AuDebugOn(h_inode && hi);
+
+	if (hi)
+		au_hiput(hinode);
+	hinode->hi_inode = h_inode;
+	if (h_inode) {
+		int err;
+		struct super_block *sb = inode->i_sb;
+		struct au_branch *br;
+
+		if (bindex == iinfo->ii_bstart)
+			au_cpup_igen(inode, h_inode);
+		br = au_sbr(sb, bindex);
+		hinode->hi_id = br->br_id;
+		if (au_ftest_hi(flags, XINO)) {
+			err = au_xino_write(sb, bindex, h_inode->i_ino,
+					    inode->i_ino);
+			if (unlikely(err))
+				AuIOErr1("failed au_xino_write() %d\n", err);
+		}
+
+		if (au_ftest_hi(flags, HINOTIFY)
+		    && au_br_hinotifyable(br->br_perm)) {
+			err = au_hin_alloc(hinode, inode, h_inode);
+			if (unlikely(err))
+				AuIOErr1("au_hin_alloc() %d\n", err);
+		}
+	}
+}
+
+void au_set_hi_wh(struct inode *inode, aufs_bindex_t bindex,
+		  struct dentry *h_wh)
+{
+	struct au_hinode *hinode;
+
+	IiMustWriteLock(inode);
+
+	hinode = au_ii(inode)->ii_hinode + bindex;
+	AuDebugOn(hinode->hi_whdentry);
+	hinode->hi_whdentry = h_wh;
+}
+
+void au_update_iigen(struct inode *inode)
+{
+	atomic_set(&au_ii(inode)->ii_generation, au_sigen(inode->i_sb));
+	/* smp_mb(); */ /* atomic_set */
+}
+
+/* it may be called at remount time, too */
+void au_update_brange(struct inode *inode, int do_put_zero)
+{
+	struct au_iinfo *iinfo;
+
+	iinfo = au_ii(inode);
+	if (!iinfo || iinfo->ii_bstart < 0)
+		return;
+
+	IiMustWriteLock(inode);
+
+	if (do_put_zero) {
+		aufs_bindex_t bindex;
+
+		for (bindex = iinfo->ii_bstart; bindex <= iinfo->ii_bend;
+		     bindex++) {
+			struct inode *h_i;
+
+			h_i = iinfo->ii_hinode[0 + bindex].hi_inode;
+			if (h_i && !h_i->i_nlink)
+				au_set_h_iptr(inode, bindex, NULL, 0);
+		}
+	}
+
+	iinfo->ii_bstart = -1;
+	while (++iinfo->ii_bstart <= iinfo->ii_bend)
+		if (iinfo->ii_hinode[0 + iinfo->ii_bstart].hi_inode)
+			break;
+	if (iinfo->ii_bstart > iinfo->ii_bend) {
+		iinfo->ii_bstart = -1;
+		iinfo->ii_bend = -1;
+		return;
+	}
+
+	iinfo->ii_bend++;
+	while (0 <= --iinfo->ii_bend)
+		if (iinfo->ii_hinode[0 + iinfo->ii_bend].hi_inode)
+			break;
+	AuDebugOn(iinfo->ii_bstart > iinfo->ii_bend || iinfo->ii_bend < 0);
+}
+
+/* ---------------------------------------------------------------------- */
+
+int au_iinfo_init(struct inode *inode)
+{
+	struct au_iinfo *iinfo;
+	struct super_block *sb;
+	int nbr, i;
+
+	sb = inode->i_sb;
+	iinfo = &(container_of(inode, struct au_icntnr, vfs_inode)->iinfo);
+	nbr = au_sbend(sb) + 1;
+	if (unlikely(nbr <= 0))
+		nbr = 1;
+	iinfo->ii_hinode = kcalloc(nbr, sizeof(*iinfo->ii_hinode), GFP_NOFS);
+	if (iinfo->ii_hinode) {
+		for (i = 0; i < nbr; i++)
+			iinfo->ii_hinode[i].hi_id = -1;
+
+		atomic_set(&iinfo->ii_generation, au_sigen(sb));
+		/* smp_mb(); */ /* atomic_set */
+		au_rw_init(&iinfo->ii_rwsem);
+		iinfo->ii_bstart = -1;
+		iinfo->ii_bend = -1;
+		iinfo->ii_vdir = NULL;
+		return 0;
+	}
+	return -ENOMEM;
+}
+
+int au_ii_realloc(struct au_iinfo *iinfo, int nbr)
+{
+	int err, sz;
+	struct au_hinode *hip;
+
+	AuRwMustWriteLock(&iinfo->ii_rwsem);
+
+	err = -ENOMEM;
+	sz = sizeof(*hip) * (iinfo->ii_bend + 1);
+	if (!sz)
+		sz = sizeof(*hip);
+	hip = au_kzrealloc(iinfo->ii_hinode, sz, sizeof(*hip) * nbr, GFP_NOFS);
+	if (hip) {
+		iinfo->ii_hinode = hip;
+		err = 0;
+	}
+
+	return err;
+}
+
+static int au_iinfo_write0(struct super_block *sb, struct au_hinode *hinode,
+			   ino_t ino)
+{
+	int err;
+	aufs_bindex_t bindex;
+	unsigned char locked;
+
+	err = 0;
+	locked = !!si_noflush_read_trylock(sb);
+	bindex = au_br_index(sb, hinode->hi_id);
+	if (bindex >= 0)
+		err = au_xino_write0(sb, bindex, hinode->hi_inode->i_ino, ino);
+	/* error action? */
+	if (locked)
+		si_read_unlock(sb);
+	return err;
+}
+
+void au_iinfo_fin(struct inode *inode)
+{
+	ino_t ino;
+	aufs_bindex_t bend;
+	unsigned char unlinked = !inode->i_nlink;
+	struct au_iinfo *iinfo;
+	struct au_hinode *hi;
+	struct super_block *sb;
+
+	if (unlinked) {
+		int err = au_xigen_inc(inode);
+		if (unlikely(err))
+			AuWarn1("failed resetting i_generation, %d\n", err);
+	}
+
+	iinfo = au_ii(inode);
+	/* bad_inode case */
+	if (!iinfo)
+		return;
+
+	if (iinfo->ii_vdir)
+		au_vdir_free(iinfo->ii_vdir);
+
+	if (iinfo->ii_bstart >= 0) {
+		sb = inode->i_sb;
+		ino = 0;
+		if (unlinked)
+			ino = inode->i_ino;
+		hi = iinfo->ii_hinode + iinfo->ii_bstart;
+		bend = iinfo->ii_bend;
+		while (iinfo->ii_bstart++ <= bend) {
+			if (hi->hi_inode) {
+				if (unlinked || !hi->hi_inode->i_nlink) {
+					au_iinfo_write0(sb, hi, ino);
+					/* ignore this error */
+					ino = 0;
+				}
+				au_hiput(hi);
+			}
+			hi++;
+		}
+	}
+
+	kfree(iinfo->ii_hinode);
+	AuRwDestroy(&iinfo->ii_rwsem);
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/sysrq.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/sysrq.c
@@ -0,0 +1,116 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * magic sysrq hanlder
+ */
+
+#include <linux/fs.h>
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+/* #include <linux/sysrq.h> */
+#include "aufs.h"
+
+/* ---------------------------------------------------------------------- */
+
+static void sysrq_sb(struct super_block *sb)
+{
+	char *plevel;
+	struct au_sbinfo *sbinfo;
+	struct file *file;
+
+	plevel = au_plevel;
+	au_plevel = KERN_WARNING;
+	au_debug(1);
+
+	sbinfo = au_sbi(sb);
+	/* since we define pr_fmt, call printk directly */
+	printk(KERN_WARNING "si=%lx\n", sysaufs_si_id(sbinfo));
+	printk(KERN_WARNING AUFS_NAME ": superblock\n");
+	au_dpri_sb(sb);
+	printk(KERN_WARNING AUFS_NAME ": root dentry\n");
+	au_dpri_dentry(sb->s_root);
+	printk(KERN_WARNING AUFS_NAME ": root inode\n");
+	au_dpri_inode(sb->s_root->d_inode);
+#if 0
+	struct inode *i;
+	printk(KERN_WARNING AUFS_NAME ": isolated inode\n");
+	list_for_each_entry(i, &sb->s_inodes, i_sb_list)
+		if (list_empty(&i->i_dentry))
+			au_dpri_inode(i);
+#endif
+	printk(KERN_WARNING AUFS_NAME ": files\n");
+	list_for_each_entry(file, &sb->s_files, f_u.fu_list)
+		if (!special_file(file->f_dentry->d_inode->i_mode))
+			au_dpri_file(file);
+
+	au_plevel = plevel;
+	au_debug(0);
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* module parameter */
+static char *aufs_sysrq_key = "a";
+module_param_named(sysrq, aufs_sysrq_key, charp, S_IRUGO);
+MODULE_PARM_DESC(sysrq, "MagicSysRq key for " AUFS_NAME);
+
+static void au_sysrq(int key __maybe_unused,
+		     struct tty_struct *tty __maybe_unused)
+{
+	struct kobject *kobj;
+	struct au_sbinfo *sbinfo;
+
+	/* spin_lock(&sysaufs_ket->list_lock); */
+	list_for_each_entry(kobj, &sysaufs_ket->list, entry) {
+		sbinfo = container_of(kobj, struct au_sbinfo, si_kobj);
+		sysrq_sb(sbinfo->si_sb);
+	}
+	/* spin_unlock(&sysaufs_ket->list_lock); */
+}
+
+static struct sysrq_key_op au_sysrq_op = {
+	.handler	= au_sysrq,
+	.help_msg	= "Aufs",
+	.action_msg	= "Aufs",
+	.enable_mask	= SYSRQ_ENABLE_DUMP
+};
+
+/* ---------------------------------------------------------------------- */
+
+int __init au_sysrq_init(void)
+{
+	int err;
+	char key;
+
+	err = -1;
+	key = *aufs_sysrq_key;
+	if ('a' <= key && key <= 'z')
+		err = register_sysrq_key(key, &au_sysrq_op);
+	if (unlikely(err))
+		pr_err("err %d, sysrq=%c\n", err, key);
+	return err;
+}
+
+void au_sysrq_fin(void)
+{
+	int err;
+	err = unregister_sysrq_key(*aufs_sysrq_key, &au_sysrq_op);
+	if (unlikely(err))
+		pr_err("err %d (ignored)\n", err);
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/export.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/export.c
@@ -0,0 +1,746 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * export via nfs
+ */
+
+#include <linux/exportfs.h>
+#include <linux/file.h>
+#include <linux/mnt_namespace.h>
+#include <linux/namei.h>
+#include <linux/nsproxy.h>
+#include <linux/random.h>
+#include "aufs.h"
+
+union conv {
+#ifdef CONFIG_AUFS_INO_T_64
+	__u32 a[2];
+#else
+	__u32 a[1];
+#endif
+	ino_t ino;
+};
+
+static ino_t decode_ino(__u32 *a)
+{
+	union conv u;
+
+	BUILD_BUG_ON(sizeof(u.ino) != sizeof(u.a));
+	u.a[0] = a[0];
+#ifdef CONFIG_AUFS_INO_T_64
+	u.a[1] = a[1];
+#endif
+	return u.ino;
+}
+
+static void encode_ino(__u32 *a, ino_t ino)
+{
+	union conv u;
+
+	u.ino = ino;
+	a[0] = u.a[0];
+#ifdef CONFIG_AUFS_INO_T_64
+	a[1] = u.a[1];
+#endif
+}
+
+/* NFS file handle */
+enum {
+	Fh_br_id,
+	Fh_sigen,
+#ifdef CONFIG_AUFS_INO_T_64
+	/* support 64bit inode number */
+	Fh_ino1,
+	Fh_ino2,
+	Fh_dir_ino1,
+	Fh_dir_ino2,
+#else
+	Fh_ino1,
+	Fh_dir_ino1,
+#endif
+	Fh_igen,
+	Fh_h_type,
+	Fh_tail,
+
+	Fh_ino = Fh_ino1,
+	Fh_dir_ino = Fh_dir_ino1
+};
+
+static int au_test_anon(struct dentry *dentry)
+{
+	return !!(dentry->d_flags & DCACHE_DISCONNECTED);
+}
+
+/* ---------------------------------------------------------------------- */
+/* inode generation external table */
+
+int au_xigen_inc(struct inode *inode)
+{
+	int err;
+	loff_t pos;
+	ssize_t sz;
+	__u32 igen;
+	struct super_block *sb;
+	struct au_sbinfo *sbinfo;
+
+	err = 0;
+	sb = inode->i_sb;
+	sbinfo = au_sbi(sb);
+	/*
+	 * temporary workaround for escaping from SiMustAnyLock() in
+	 * au_mntflags(), since this function is called from au_iinfo_fin().
+	 */
+	if (unlikely(!au_opt_test(sbinfo->si_mntflags, XINO)))
+		goto out;
+
+	pos = inode->i_ino;
+	pos *= sizeof(igen);
+	igen = inode->i_generation + 1;
+	sz = xino_fwrite(sbinfo->si_xwrite, sbinfo->si_xigen, &igen,
+			 sizeof(igen), &pos);
+	if (sz == sizeof(igen))
+		goto out; /* success */
+
+	err = sz;
+	if (unlikely(sz >= 0)) {
+		err = -EIO;
+		AuIOErr("xigen error (%zd)\n", sz);
+	}
+
+ out:
+	return err;
+}
+
+int au_xigen_new(struct inode *inode)
+{
+	int err;
+	loff_t pos;
+	ssize_t sz;
+	struct super_block *sb;
+	struct au_sbinfo *sbinfo;
+	struct file *file;
+
+	err = 0;
+	/* todo: dirty, at mount time */
+	if (inode->i_ino == AUFS_ROOT_INO)
+		goto out;
+	sb = inode->i_sb;
+	SiMustAnyLock(sb);
+	if (unlikely(!au_opt_test(au_mntflags(sb), XINO)))
+		goto out;
+
+	err = -EFBIG;
+	pos = inode->i_ino;
+	if (unlikely(au_loff_max / sizeof(inode->i_generation) - 1 < pos)) {
+		AuIOErr1("too large i%lld\n", pos);
+		goto out;
+	}
+	pos *= sizeof(inode->i_generation);
+
+	err = 0;
+	sbinfo = au_sbi(sb);
+	file = sbinfo->si_xigen;
+	BUG_ON(!file);
+
+	if (i_size_read(file->f_dentry->d_inode)
+	    < pos + sizeof(inode->i_generation)) {
+		inode->i_generation = atomic_inc_return(&sbinfo->si_xigen_next);
+		sz = xino_fwrite(sbinfo->si_xwrite, file, &inode->i_generation,
+				 sizeof(inode->i_generation), &pos);
+	} else
+		sz = xino_fread(sbinfo->si_xread, file, &inode->i_generation,
+				sizeof(inode->i_generation), &pos);
+	if (sz == sizeof(inode->i_generation))
+		goto out; /* success */
+
+	err = sz;
+	if (unlikely(sz >= 0)) {
+		err = -EIO;
+		AuIOErr("xigen error (%zd)\n", sz);
+	}
+
+ out:
+	return err;
+}
+
+int au_xigen_set(struct super_block *sb, struct file *base)
+{
+	int err;
+	struct au_sbinfo *sbinfo;
+	struct file *file;
+
+	SiMustWriteLock(sb);
+
+	sbinfo = au_sbi(sb);
+	file = au_xino_create2(base, sbinfo->si_xigen);
+	err = PTR_ERR(file);
+	if (IS_ERR(file))
+		goto out;
+	err = 0;
+	if (sbinfo->si_xigen)
+		fput(sbinfo->si_xigen);
+	sbinfo->si_xigen = file;
+
+ out:
+	return err;
+}
+
+void au_xigen_clr(struct super_block *sb)
+{
+	struct au_sbinfo *sbinfo;
+
+	SiMustWriteLock(sb);
+
+	sbinfo = au_sbi(sb);
+	if (sbinfo->si_xigen) {
+		fput(sbinfo->si_xigen);
+		sbinfo->si_xigen = NULL;
+	}
+}
+
+/* ---------------------------------------------------------------------- */
+
+static struct dentry *decode_by_ino(struct super_block *sb, ino_t ino,
+				    ino_t dir_ino)
+{
+	struct dentry *dentry, *d;
+	struct inode *inode;
+	unsigned int sigen;
+
+	dentry = NULL;
+	inode = ilookup(sb, ino);
+	if (!inode)
+		goto out;
+
+	dentry = ERR_PTR(-ESTALE);
+	sigen = au_sigen(sb);
+	if (unlikely(is_bad_inode(inode)
+		     || IS_DEADDIR(inode)
+		     || sigen != au_iigen(inode)))
+		goto out_iput;
+
+	dentry = NULL;
+	if (!dir_ino || S_ISDIR(inode->i_mode))
+		dentry = d_find_alias(inode);
+	else {
+		spin_lock(&dcache_lock);
+		list_for_each_entry(d, &inode->i_dentry, d_alias)
+			if (!au_test_anon(d)
+			    && d->d_parent->d_inode->i_ino == dir_ino) {
+				dentry = dget_locked(d);
+				break;
+			}
+		spin_unlock(&dcache_lock);
+	}
+	if (unlikely(dentry && sigen != au_digen(dentry))) {
+		dput(dentry);
+		dentry = ERR_PTR(-ESTALE);
+	}
+
+ out_iput:
+	iput(inode);
+ out:
+	return dentry;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* todo: dirty? */
+/* if exportfs_decode_fh() passed vfsmount*, we could be happy */
+static struct vfsmount *au_mnt_get(struct super_block *sb)
+{
+	struct mnt_namespace *ns;
+	struct vfsmount *pos, *mnt;
+
+	spin_lock(&vfsmount_lock);
+	/* no get/put ?? */
+	AuDebugOn(!current->nsproxy);
+	ns = current->nsproxy->mnt_ns;
+	AuDebugOn(!ns);
+	mnt = NULL;
+	/* the order (reverse) will not be a problem */
+	list_for_each_entry(pos, &ns->list, mnt_list)
+		if (pos->mnt_sb == sb) {
+			mnt = mntget(pos);
+			break;
+		}
+	spin_unlock(&vfsmount_lock);
+	AuDebugOn(!mnt);
+
+	return mnt;
+}
+
+struct au_nfsd_si_lock {
+	const unsigned int sigen;
+	const aufs_bindex_t br_id;
+	unsigned char force_lock;
+};
+
+static aufs_bindex_t si_nfsd_read_lock(struct super_block *sb,
+				       struct au_nfsd_si_lock *nsi_lock)
+{
+	aufs_bindex_t bindex;
+
+	si_read_lock(sb, AuLock_FLUSH);
+
+	/* branch id may be wrapped around */
+	bindex = au_br_index(sb, nsi_lock->br_id);
+	if (bindex >= 0 && nsi_lock->sigen + AUFS_BRANCH_MAX > au_sigen(sb))
+		goto out; /* success */
+
+	if (!nsi_lock->force_lock)
+		si_read_unlock(sb);
+	bindex = -1;
+
+ out:
+	return bindex;
+}
+
+struct find_name_by_ino {
+	int called, found;
+	ino_t ino;
+	char *name;
+	int namelen;
+};
+
+static int
+find_name_by_ino(void *arg, const char *name, int namelen, loff_t offset,
+		 u64 ino, unsigned int d_type)
+{
+	struct find_name_by_ino *a = arg;
+
+	a->called++;
+	if (a->ino != ino)
+		return 0;
+
+	memcpy(a->name, name, namelen);
+	a->namelen = namelen;
+	a->found = 1;
+	return 1;
+}
+
+static struct dentry *au_lkup_by_ino(struct path *path, ino_t ino,
+				     struct au_nfsd_si_lock *nsi_lock)
+{
+	struct dentry *dentry, *parent;
+	struct file *file;
+	struct inode *dir;
+	struct find_name_by_ino arg;
+	int err;
+
+	parent = path->dentry;
+	if (nsi_lock)
+		si_read_unlock(parent->d_sb);
+	path_get(path);
+	file = vfsub_dentry_open(path, au_dir_roflags, current_cred());
+	dentry = (void *)file;
+	if (IS_ERR(file))
+		goto out;
+
+	dentry = ERR_PTR(-ENOMEM);
+	arg.name = __getname();
+	if (unlikely(!arg.name))
+		goto out_file;
+	arg.ino = ino;
+	arg.found = 0;
+	do {
+		arg.called = 0;
+		/* smp_mb(); */
+		err = vfsub_readdir(file, find_name_by_ino, &arg);
+	} while (!err && !arg.found && arg.called);
+	dentry = ERR_PTR(err);
+	if (unlikely(err))
+		goto out_name;
+	dentry = ERR_PTR(-ENOENT);
+	if (!arg.found)
+		goto out_name;
+
+	/* do not call au_lkup_one() */
+	dir = parent->d_inode;
+	mutex_lock(&dir->i_mutex);
+	dentry = vfsub_lookup_one_len(arg.name, parent, arg.namelen);
+	mutex_unlock(&dir->i_mutex);
+	AuTraceErrPtr(dentry);
+	if (IS_ERR(dentry))
+		goto out_name;
+	AuDebugOn(au_test_anon(dentry));
+	if (unlikely(!dentry->d_inode)) {
+		dput(dentry);
+		dentry = ERR_PTR(-ENOENT);
+	}
+
+ out_name:
+	__putname(arg.name);
+ out_file:
+	fput(file);
+ out:
+	if (unlikely(nsi_lock
+		     && si_nfsd_read_lock(parent->d_sb, nsi_lock) < 0))
+		if (!IS_ERR(dentry)) {
+			dput(dentry);
+			dentry = ERR_PTR(-ESTALE);
+		}
+	AuTraceErrPtr(dentry);
+	return dentry;
+}
+
+static struct dentry *decode_by_dir_ino(struct super_block *sb, ino_t ino,
+					ino_t dir_ino,
+					struct au_nfsd_si_lock *nsi_lock)
+{
+	struct dentry *dentry;
+	struct path path;
+
+	if (dir_ino != AUFS_ROOT_INO) {
+		path.dentry = decode_by_ino(sb, dir_ino, 0);
+		dentry = path.dentry;
+		if (!path.dentry || IS_ERR(path.dentry))
+			goto out;
+		AuDebugOn(au_test_anon(path.dentry));
+	} else
+		path.dentry = dget(sb->s_root);
+
+	path.mnt = au_mnt_get(sb);
+	dentry = au_lkup_by_ino(&path, ino, nsi_lock);
+	path_put(&path);
+
+ out:
+	AuTraceErrPtr(dentry);
+	return dentry;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int h_acceptable(void *expv, struct dentry *dentry)
+{
+	return 1;
+}
+
+static char *au_build_path(struct dentry *h_parent, struct path *h_rootpath,
+			   char *buf, int len, struct super_block *sb)
+{
+	char *p;
+	int n;
+	struct path path;
+
+	p = d_path(h_rootpath, buf, len);
+	if (IS_ERR(p))
+		goto out;
+	n = strlen(p);
+
+	path.mnt = h_rootpath->mnt;
+	path.dentry = h_parent;
+	p = d_path(&path, buf, len);
+	if (IS_ERR(p))
+		goto out;
+	if (n != 1)
+		p += n;
+
+	path.mnt = au_mnt_get(sb);
+	path.dentry = sb->s_root;
+	p = d_path(&path, buf, len - strlen(p));
+	mntput(path.mnt);
+	if (IS_ERR(p))
+		goto out;
+	if (n != 1)
+		p[strlen(p)] = '/';
+
+ out:
+	AuTraceErrPtr(p);
+	return p;
+}
+
+static
+struct dentry *decode_by_path(struct super_block *sb, aufs_bindex_t bindex,
+			      ino_t ino, __u32 *fh, int fh_len,
+			      struct au_nfsd_si_lock *nsi_lock)
+{
+	struct dentry *dentry, *h_parent, *root;
+	struct super_block *h_sb;
+	char *pathname, *p;
+	struct vfsmount *h_mnt;
+	struct au_branch *br;
+	int err;
+	struct path path;
+
+	br = au_sbr(sb, bindex);
+	/* au_br_get(br); */
+	h_mnt = br->br_mnt;
+	h_sb = h_mnt->mnt_sb;
+	/* todo: call lower fh_to_dentry()? fh_to_parent()? */
+	h_parent = exportfs_decode_fh(h_mnt, (void *)(fh + Fh_tail),
+				      fh_len - Fh_tail, fh[Fh_h_type],
+				      h_acceptable, /*context*/NULL);
+	dentry = h_parent;
+	if (unlikely(!h_parent || IS_ERR(h_parent))) {
+		AuWarn1("%s decode_fh failed, %ld\n",
+			au_sbtype(h_sb), PTR_ERR(h_parent));
+		goto out;
+	}
+	dentry = NULL;
+	if (unlikely(au_test_anon(h_parent))) {
+		AuWarn1("%s decode_fh returned a disconnected dentry\n",
+			au_sbtype(h_sb));
+		goto out_h_parent;
+	}
+
+	dentry = ERR_PTR(-ENOMEM);
+	pathname = (void *)__get_free_page(GFP_NOFS);
+	if (unlikely(!pathname))
+		goto out_h_parent;
+
+	root = sb->s_root;
+	path.mnt = h_mnt;
+	di_read_lock_parent(root, !AuLock_IR);
+	path.dentry = au_h_dptr(root, bindex);
+	di_read_unlock(root, !AuLock_IR);
+	p = au_build_path(h_parent, &path, pathname, PAGE_SIZE, sb);
+	dentry = (void *)p;
+	if (IS_ERR(p))
+		goto out_pathname;
+
+	si_read_unlock(sb);
+	err = vfsub_kern_path(p, LOOKUP_FOLLOW | LOOKUP_DIRECTORY, &path);
+	dentry = ERR_PTR(err);
+	if (unlikely(err))
+		goto out_relock;
+
+	dentry = ERR_PTR(-ENOENT);
+	AuDebugOn(au_test_anon(path.dentry));
+	if (unlikely(!path.dentry->d_inode))
+		goto out_path;
+
+	if (ino != path.dentry->d_inode->i_ino)
+		dentry = au_lkup_by_ino(&path, ino, /*nsi_lock*/NULL);
+	else
+		dentry = dget(path.dentry);
+
+ out_path:
+	path_put(&path);
+ out_relock:
+	if (unlikely(si_nfsd_read_lock(sb, nsi_lock) < 0))
+		if (!IS_ERR(dentry)) {
+			dput(dentry);
+			dentry = ERR_PTR(-ESTALE);
+		}
+ out_pathname:
+	free_page((unsigned long)pathname);
+ out_h_parent:
+	dput(h_parent);
+ out:
+	/* au_br_put(br); */
+	AuTraceErrPtr(dentry);
+	return dentry;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static struct dentry *
+aufs_fh_to_dentry(struct super_block *sb, struct fid *fid, int fh_len,
+		  int fh_type)
+{
+	struct dentry *dentry;
+	__u32 *fh = fid->raw;
+	ino_t ino, dir_ino;
+	aufs_bindex_t bindex;
+	struct au_nfsd_si_lock nsi_lock = {
+		.sigen		= fh[Fh_sigen],
+		.br_id		= fh[Fh_br_id],
+		.force_lock	= 0
+	};
+
+	AuDebugOn(fh_len < Fh_tail);
+
+	dentry = ERR_PTR(-ESTALE);
+	/* branch id may be wrapped around */
+	bindex = si_nfsd_read_lock(sb, &nsi_lock);
+	if (unlikely(bindex < 0))
+		goto out;
+	nsi_lock.force_lock = 1;
+
+	/* is this inode still cached? */
+	ino = decode_ino(fh + Fh_ino);
+	AuDebugOn(ino == AUFS_ROOT_INO);
+	dir_ino = decode_ino(fh + Fh_dir_ino);
+	dentry = decode_by_ino(sb, ino, dir_ino);
+	if (IS_ERR(dentry))
+		goto out_unlock;
+	if (dentry)
+		goto accept;
+
+	/* is the parent dir cached? */
+	dentry = decode_by_dir_ino(sb, ino, dir_ino, &nsi_lock);
+	if (IS_ERR(dentry))
+		goto out_unlock;
+	if (dentry)
+		goto accept;
+
+	/* lookup path */
+	dentry = decode_by_path(sb, bindex, ino, fh, fh_len, &nsi_lock);
+	if (IS_ERR(dentry))
+		goto out_unlock;
+	if (unlikely(!dentry))
+		/* todo?: make it ESTALE */
+		goto out_unlock;
+
+ accept:
+	if (dentry->d_inode->i_generation == fh[Fh_igen])
+		goto out_unlock; /* success */
+
+	dput(dentry);
+	dentry = ERR_PTR(-ESTALE);
+ out_unlock:
+	si_read_unlock(sb);
+ out:
+	AuTraceErrPtr(dentry);
+	return dentry;
+}
+
+#if 0 /* reserved for future use */
+/* support subtreecheck option */
+static struct dentry *aufs_fh_to_parent(struct super_block *sb, struct fid *fid,
+					int fh_len, int fh_type)
+{
+	struct dentry *parent;
+	__u32 *fh = fid->raw;
+	ino_t dir_ino;
+
+	dir_ino = decode_ino(fh + Fh_dir_ino);
+	parent = decode_by_ino(sb, dir_ino, 0);
+	if (IS_ERR(parent))
+		goto out;
+	if (!parent)
+		parent = decode_by_path(sb, au_br_index(sb, fh[Fh_br_id]),
+					dir_ino, fh, fh_len);
+
+ out:
+	AuTraceErrPtr(parent);
+	return parent;
+}
+#endif
+
+/* ---------------------------------------------------------------------- */
+
+static int aufs_encode_fh(struct dentry *dentry, __u32 *fh, int *max_len,
+			  int connectable)
+{
+	int err;
+	aufs_bindex_t bindex, bend;
+	struct super_block *sb, *h_sb;
+	struct inode *inode;
+	struct dentry *parent, *h_parent;
+	struct au_branch *br;
+
+	AuDebugOn(au_test_anon(dentry));
+
+	parent = NULL;
+	err = -ENOSPC;
+	if (unlikely(*max_len <= Fh_tail)) {
+		AuWarn1("NFSv2 client (max_len %d)?\n", *max_len);
+		goto out;
+	}
+
+	err = FILEID_ROOT;
+	if (IS_ROOT(dentry)) {
+		AuDebugOn(dentry->d_inode->i_ino != AUFS_ROOT_INO);
+		goto out;
+	}
+
+	err = -EIO;
+	h_parent = NULL;
+	sb = dentry->d_sb;
+	aufs_read_lock(dentry, AuLock_FLUSH | AuLock_IR);
+	parent = dget_parent(dentry);
+	di_read_lock_parent(parent, !AuLock_IR);
+	inode = dentry->d_inode;
+	AuDebugOn(!inode);
+#ifdef CONFIG_AUFS_DEBUG
+	if (unlikely(!au_opt_test(au_mntflags(sb), XINO)))
+		AuWarn1("NFS-exporting requires xino\n");
+#endif
+
+	bend = au_dbtaildir(parent);
+	for (bindex = au_dbstart(parent); bindex <= bend; bindex++) {
+		h_parent = au_h_dptr(parent, bindex);
+		if (h_parent) {
+			dget(h_parent);
+			break;
+		}
+	}
+	if (unlikely(!h_parent))
+		goto out_unlock;
+
+	err = -EPERM;
+	br = au_sbr(sb, bindex);
+	h_sb = br->br_mnt->mnt_sb;
+	if (unlikely(!h_sb->s_export_op)) {
+		AuErr1("%s branch is not exportable\n", au_sbtype(h_sb));
+		goto out_dput;
+	}
+
+	fh[Fh_br_id] = br->br_id;
+	fh[Fh_sigen] = au_sigen(sb);
+	encode_ino(fh + Fh_ino, inode->i_ino);
+	encode_ino(fh + Fh_dir_ino, parent->d_inode->i_ino);
+	fh[Fh_igen] = inode->i_generation;
+
+	*max_len -= Fh_tail;
+	fh[Fh_h_type] = exportfs_encode_fh(h_parent, (void *)(fh + Fh_tail),
+					   max_len,
+					   /*connectable or subtreecheck*/0);
+	err = fh[Fh_h_type];
+	*max_len += Fh_tail;
+	/* todo: macros? */
+	if (err != 255)
+		err = 99;
+	else
+		AuWarn1("%s encode_fh failed\n", au_sbtype(h_sb));
+
+ out_dput:
+	dput(h_parent);
+ out_unlock:
+	di_read_unlock(parent, !AuLock_IR);
+	dput(parent);
+	aufs_read_unlock(dentry, AuLock_IR);
+ out:
+	if (unlikely(err < 0))
+		err = 255;
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static struct export_operations aufs_export_op = {
+	.fh_to_dentry	= aufs_fh_to_dentry,
+	/* .fh_to_parent	= aufs_fh_to_parent, */
+	.encode_fh	= aufs_encode_fh
+};
+
+void au_export_init(struct super_block *sb)
+{
+	struct au_sbinfo *sbinfo;
+	__u32 u;
+
+	sb->s_export_op = &aufs_export_op;
+	sbinfo = au_sbi(sb);
+	sbinfo->si_xigen = NULL;
+	get_random_bytes(&u, sizeof(u));
+	BUILD_BUG_ON(sizeof(u) != sizeof(int));
+	atomic_set(&sbinfo->si_xigen_next, u);
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/dentry.h
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/dentry.h
@@ -0,0 +1,231 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * lookup and dentry operations
+ */
+
+#ifndef __AUFS_DENTRY_H__
+#define __AUFS_DENTRY_H__
+
+#ifdef __KERNEL__
+
+#include <linux/dcache.h>
+#include <linux/aufs_type.h>
+#include "rwsem.h"
+
+/* make a single member structure for future use */
+/* todo: remove this structure */
+struct au_hdentry {
+	struct dentry		*hd_dentry;
+};
+
+struct au_dinfo {
+	atomic_t		di_generation;
+
+	struct au_rwsem		di_rwsem;
+	aufs_bindex_t		di_bstart, di_bend, di_bwh, di_bdiropq;
+	struct au_hdentry	*di_hdentry;
+};
+
+/* ---------------------------------------------------------------------- */
+
+/* dentry.c */
+extern struct dentry_operations aufs_dop;
+struct au_branch;
+struct dentry *au_lkup_one(struct qstr *name, struct dentry *h_parent,
+			   struct au_branch *br, struct nameidata *nd);
+struct dentry *au_sio_lkup_one(struct qstr *name, struct dentry *parent,
+			       struct au_branch *br);
+int au_h_verify(struct dentry *h_dentry, unsigned int udba, struct inode *h_dir,
+		struct dentry *h_parent, struct au_branch *br);
+
+int au_lkup_dentry(struct dentry *dentry, aufs_bindex_t bstart, mode_t type,
+		   struct nameidata *nd);
+int au_lkup_neg(struct dentry *dentry, aufs_bindex_t bindex);
+int au_refresh_hdentry(struct dentry *dentry, mode_t type);
+int au_reval_dpath(struct dentry *dentry, unsigned int sigen);
+
+/* dinfo.c */
+int au_alloc_dinfo(struct dentry *dentry);
+int au_di_realloc(struct au_dinfo *dinfo, int nbr);
+
+void di_read_lock(struct dentry *d, int flags, unsigned int lsc);
+void di_read_unlock(struct dentry *d, int flags);
+void di_downgrade_lock(struct dentry *d, int flags);
+void di_write_lock(struct dentry *d, unsigned int lsc);
+void di_write_unlock(struct dentry *d);
+void di_write_lock2_child(struct dentry *d1, struct dentry *d2, int isdir);
+void di_write_lock2_parent(struct dentry *d1, struct dentry *d2, int isdir);
+void di_write_unlock2(struct dentry *d1, struct dentry *d2);
+
+struct dentry *au_h_dptr(struct dentry *dentry, aufs_bindex_t bindex);
+aufs_bindex_t au_dbtail(struct dentry *dentry);
+aufs_bindex_t au_dbtaildir(struct dentry *dentry);
+
+void au_set_h_dptr(struct dentry *dentry, aufs_bindex_t bindex,
+		   struct dentry *h_dentry);
+void au_update_digen(struct dentry *dentry);
+void au_update_dbrange(struct dentry *dentry, int do_put_zero);
+void au_update_dbstart(struct dentry *dentry);
+void au_update_dbend(struct dentry *dentry);
+int au_find_dbindex(struct dentry *dentry, struct dentry *h_dentry);
+
+/* ---------------------------------------------------------------------- */
+
+static inline struct au_dinfo *au_di(struct dentry *dentry)
+{
+	return dentry->d_fsdata;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* lock subclass for dinfo */
+enum {
+	AuLsc_DI_CHILD,		/* child first */
+	AuLsc_DI_CHILD2,	/* rename(2), link(2), and cpup at hinotify */
+	AuLsc_DI_CHILD3,	/* copyup dirs */
+	AuLsc_DI_PARENT,
+	AuLsc_DI_PARENT2,
+	AuLsc_DI_PARENT3
+};
+
+/*
+ * di_read_lock_child, di_write_lock_child,
+ * di_read_lock_child2, di_write_lock_child2,
+ * di_read_lock_child3, di_write_lock_child3,
+ * di_read_lock_parent, di_write_lock_parent,
+ * di_read_lock_parent2, di_write_lock_parent2,
+ * di_read_lock_parent3, di_write_lock_parent3,
+ */
+#define AuReadLockFunc(name, lsc) \
+static inline void di_read_lock_##name(struct dentry *d, int flags) \
+{ di_read_lock(d, flags, AuLsc_DI_##lsc); }
+
+#define AuWriteLockFunc(name, lsc) \
+static inline void di_write_lock_##name(struct dentry *d) \
+{ di_write_lock(d, AuLsc_DI_##lsc); }
+
+#define AuRWLockFuncs(name, lsc) \
+	AuReadLockFunc(name, lsc) \
+	AuWriteLockFunc(name, lsc)
+
+AuRWLockFuncs(child, CHILD);
+AuRWLockFuncs(child2, CHILD2);
+AuRWLockFuncs(child3, CHILD3);
+AuRWLockFuncs(parent, PARENT);
+AuRWLockFuncs(parent2, PARENT2);
+AuRWLockFuncs(parent3, PARENT3);
+
+#undef AuReadLockFunc
+#undef AuWriteLockFunc
+#undef AuRWLockFuncs
+
+#define DiMustNoWaiters(d)	AuRwMustNoWaiters(&au_di(d)->di_rwsem)
+#define DiMustAnyLock(d)	AuRwMustAnyLock(&au_di(d)->di_rwsem)
+#define DiMustWriteLock(d)	AuRwMustWriteLock(&au_di(d)->di_rwsem)
+
+/* ---------------------------------------------------------------------- */
+
+/* todo: memory barrier? */
+static inline unsigned int au_digen(struct dentry *d)
+{
+	return atomic_read(&au_di(d)->di_generation);
+}
+
+static inline void au_h_dentry_init(struct au_hdentry *hdentry)
+{
+	hdentry->hd_dentry = NULL;
+}
+
+static inline void au_hdput(struct au_hdentry *hd)
+{
+	dput(hd->hd_dentry);
+}
+
+static inline aufs_bindex_t au_dbstart(struct dentry *dentry)
+{
+	DiMustAnyLock(dentry);
+	return au_di(dentry)->di_bstart;
+}
+
+static inline aufs_bindex_t au_dbend(struct dentry *dentry)
+{
+	DiMustAnyLock(dentry);
+	return au_di(dentry)->di_bend;
+}
+
+static inline aufs_bindex_t au_dbwh(struct dentry *dentry)
+{
+	DiMustAnyLock(dentry);
+	return au_di(dentry)->di_bwh;
+}
+
+static inline aufs_bindex_t au_dbdiropq(struct dentry *dentry)
+{
+	DiMustAnyLock(dentry);
+	return au_di(dentry)->di_bdiropq;
+}
+
+/* todo: hard/soft set? */
+static inline void au_set_dbstart(struct dentry *dentry, aufs_bindex_t bindex)
+{
+	DiMustWriteLock(dentry);
+	au_di(dentry)->di_bstart = bindex;
+}
+
+static inline void au_set_dbend(struct dentry *dentry, aufs_bindex_t bindex)
+{
+	DiMustWriteLock(dentry);
+	au_di(dentry)->di_bend = bindex;
+}
+
+static inline void au_set_dbwh(struct dentry *dentry, aufs_bindex_t bindex)
+{
+	DiMustWriteLock(dentry);
+	/* dbwh can be outside of bstart - bend range */
+	au_di(dentry)->di_bwh = bindex;
+}
+
+static inline void au_set_dbdiropq(struct dentry *dentry, aufs_bindex_t bindex)
+{
+	DiMustWriteLock(dentry);
+	au_di(dentry)->di_bdiropq = bindex;
+}
+
+/* ---------------------------------------------------------------------- */
+
+#ifdef CONFIG_AUFS_HINOTIFY
+static inline void au_digen_dec(struct dentry *d)
+{
+	atomic_dec_return(&au_di(d)->di_generation);
+}
+
+static inline void au_hin_di_reinit(struct dentry *dentry)
+{
+	dentry->d_fsdata = NULL;
+}
+#else
+static inline void au_hin_di_reinit(struct dentry *dentry __maybe_unused)
+{
+	/* empty */
+}
+#endif /* CONFIG_AUFS_HINOTIFY */
+
+#endif /* __KERNEL__ */
+#endif /* __AUFS_DENTRY_H__ */
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/debug.h
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/debug.h
@@ -0,0 +1,257 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * debug print functions
+ */
+
+#ifndef __AUFS_DEBUG_H__
+#define __AUFS_DEBUG_H__
+
+#ifdef __KERNEL__
+
+#include <asm/system.h>
+#include <linux/bug.h>
+/* #include <linux/err.h> */
+#include <linux/init.h>
+/* #include <linux/kernel.h> */
+#include <linux/delay.h>
+/* #include <linux/kd.h> */
+/* #include <linux/vt_kern.h> */
+#include <linux/sysrq.h>
+#include <linux/aufs_type.h>
+
+#include <asm/system.h>
+
+#ifdef CONFIG_AUFS_DEBUG
+#define AuDebugOn(a)		BUG_ON(a)
+
+/* module parameter */
+extern int aufs_debug;
+static inline void au_debug(int n)
+{
+	aufs_debug = n;
+	smp_mb();
+}
+
+static inline int au_debug_test(void)
+{
+	return aufs_debug;
+}
+#else
+#define AuDebugOn(a)		do {} while (0)
+#define au_debug()		do {} while (0)
+static inline int au_debug_test(void)
+{
+	return 0;
+}
+#endif /* CONFIG_AUFS_DEBUG */
+
+/* ---------------------------------------------------------------------- */
+
+/* debug print */
+
+#define AuDbg(fmt, ...) do { \
+	if (au_debug_test()) \
+		pr_debug("DEBUG: " fmt, ##__VA_ARGS__); \
+} while (0)
+#define AuLabel(l) 		AuDbg(#l "\n")
+#define AuIOErr(fmt, ...)	pr_err("I/O Error, " fmt, ##__VA_ARGS__)
+#define AuWarn1(fmt, ...) do { \
+	static unsigned char _c; \
+	if (!_c++) \
+		pr_warning(fmt, ##__VA_ARGS__); \
+} while (0)
+
+#define AuErr1(fmt, ...) do { \
+	static unsigned char _c; \
+	if (!_c++) \
+		pr_err(fmt, ##__VA_ARGS__); \
+} while (0)
+
+#define AuIOErr1(fmt, ...) do { \
+	static unsigned char _c; \
+	if (!_c++) \
+		AuIOErr(fmt, ##__VA_ARGS__); \
+} while (0)
+
+#define AuUnsupportMsg	"This operation is not supported." \
+			" Please report this application to aufs-users ML."
+#define AuUnsupport(fmt, ...) do { \
+	pr_err(AuUnsupportMsg "\n" fmt, ##__VA_ARGS__); \
+	dump_stack(); \
+} while (0)
+
+#define AuTraceErr(e) do { \
+	if (unlikely((e) < 0)) \
+		AuDbg("err %d\n", (int)(e)); \
+} while (0)
+
+#define AuTraceErrPtr(p) do { \
+	if (IS_ERR(p)) \
+		AuDbg("err %ld\n", PTR_ERR(p)); \
+} while (0)
+
+/* dirty macros for debug print, use with "%.*s" and caution */
+#define AuLNPair(qstr)		(qstr)->len, (qstr)->name
+#define AuDLNPair(d)		AuLNPair(&(d)->d_name)
+
+/* ---------------------------------------------------------------------- */
+
+struct au_sbinfo;
+struct au_finfo;
+struct dentry;
+#ifdef CONFIG_AUFS_DEBUG
+extern char *au_plevel;
+struct au_nhash;
+void au_dpri_whlist(struct au_nhash *whlist);
+struct au_vdir;
+void au_dpri_vdir(struct au_vdir *vdir);
+struct inode;
+void au_dpri_inode(struct inode *inode);
+void au_dpri_dentry(struct dentry *dentry);
+struct file;
+void au_dpri_file(struct file *filp);
+struct super_block;
+void au_dpri_sb(struct super_block *sb);
+
+void au_dbg_sleep_jiffy(int jiffy);
+struct iattr;
+void au_dbg_iattr(struct iattr *ia);
+
+void au_dbg_verify_dir_parent(struct dentry *dentry, unsigned int sigen);
+void au_dbg_verify_nondir_parent(struct dentry *dentry, unsigned int sigen);
+void au_dbg_verify_gen(struct dentry *parent, unsigned int sigen);
+void au_dbg_verify_hf(struct au_finfo *finfo);
+void au_dbg_verify_kthread(void);
+
+int __init au_debug_init(void);
+void au_debug_sbinfo_init(struct au_sbinfo *sbinfo);
+#define AuDbgWhlist(w) do { \
+	AuDbg(#w "\n"); \
+	au_dpri_whlist(w); \
+} while (0)
+
+#define AuDbgVdir(v) do { \
+	AuDbg(#v "\n"); \
+	au_dpri_vdir(v); \
+} while (0)
+
+#define AuDbgInode(i) do { \
+	AuDbg(#i "\n"); \
+	au_dpri_inode(i); \
+} while (0)
+
+#define AuDbgDentry(d) do { \
+	AuDbg(#d "\n"); \
+	au_dpri_dentry(d); \
+} while (0)
+
+#define AuDbgFile(f) do { \
+	AuDbg(#f "\n"); \
+	au_dpri_file(f); \
+} while (0)
+
+#define AuDbgSb(sb) do { \
+	AuDbg(#sb "\n"); \
+	au_dpri_sb(sb); \
+} while (0)
+
+#define AuDbgSleep(sec) do { \
+	AuDbg("sleep %d sec\n", sec); \
+	ssleep(sec); \
+} while (0)
+
+#define AuDbgSleepJiffy(jiffy) do { \
+	AuDbg("sleep %d jiffies\n", jiffy); \
+	au_dbg_sleep_jiffy(jiffy); \
+} while (0)
+
+#define AuDbgIAttr(ia) do { \
+	AuDbg("ia_valid 0x%x\n", (ia)->ia_valid); \
+	au_dbg_iattr(ia); \
+} while (0)
+#else
+static inline void au_dbg_verify_dir_parent(struct dentry *dentry,
+					    unsigned int sigen)
+{
+	/* empty */
+}
+static inline void au_dbg_verify_nondir_parent(struct dentry *dentry,
+					       unsigned int sigen)
+{
+	/* empty */
+}
+static inline void au_dbg_verify_gen(struct dentry *parent, unsigned int sigen)
+{
+	/* empty */
+}
+static inline void au_dbg_verify_hf(struct au_finfo *finfo)
+{
+	/* empty */
+}
+static inline void au_dbg_verify_kthread(void)
+{
+	/* empty */
+}
+
+static inline int au_debug_init(void)
+{
+	return 0;
+}
+static inline void au_debug_sbinfo_init(struct au_sbinfo *sbinfo)
+{
+	/* empty */
+}
+#define AuDbgWhlist(w)		do {} while (0)
+#define AuDbgVdir(v)		do {} while (0)
+#define AuDbgInode(i)		do {} while (0)
+#define AuDbgDentry(d)		do {} while (0)
+#define AuDbgFile(f)		do {} while (0)
+#define AuDbgSb(sb)		do {} while (0)
+#define AuDbgSleep(sec)		do {} while (0)
+#define AuDbgSleepJiffy(jiffy)	do {} while (0)
+#define AuDbgIAttr(ia)		do {} while (0)
+#endif /* CONFIG_AUFS_DEBUG */
+
+/* ---------------------------------------------------------------------- */
+
+#ifdef CONFIG_AUFS_MAGIC_SYSRQ
+int __init au_sysrq_init(void);
+void au_sysrq_fin(void);
+
+#ifdef CONFIG_HW_CONSOLE
+#define au_dbg_blocked() do { \
+	WARN_ON(1); \
+	handle_sysrq('w', vc_cons[fg_console].d->vc_tty); \
+} while (0)
+#else
+#define au_dbg_blocked()	do {} while (0)
+#endif
+
+#else
+static inline int au_sysrq_init(void)
+{
+	return 0;
+}
+#define au_sysrq_fin()		do {} while (0)
+#define au_dbg_blocked()	do {} while (0)
+#endif /* CONFIG_AUFS_MAGIC_SYSRQ */
+
+#endif /* __KERNEL__ */
+#endif /* __AUFS_DEBUG_H__ */
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/poll.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/poll.c
@@ -0,0 +1,56 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * poll operation
+ * There is only one filesystem which implements ->poll operation, currently.
+ */
+
+#include "aufs.h"
+
+unsigned int aufs_poll(struct file *file, poll_table *wait)
+{
+	unsigned int mask;
+	int err;
+	struct file *h_file;
+	struct dentry *dentry;
+	struct super_block *sb;
+
+	/* We should pretend an error happened. */
+	mask = POLLERR /* | POLLIN | POLLOUT */;
+	dentry = file->f_dentry;
+	sb = dentry->d_sb;
+	si_read_lock(sb, AuLock_FLUSH);
+	err = au_reval_and_lock_fdi(file, au_reopen_nondir, /*wlock*/0);
+	if (unlikely(err))
+		goto out;
+
+	/* it is not an error if h_file has no operation */
+	mask = DEFAULT_POLLMASK;
+	h_file = au_h_fptr(file, au_fbstart(file));
+	if (h_file->f_op && h_file->f_op->poll)
+		mask = h_file->f_op->poll(h_file, wait);
+
+	di_read_unlock(dentry, AuLock_IR);
+	fi_read_unlock(file);
+
+ out:
+	si_read_unlock(sb);
+	AuTraceErr((int)mask);
+	return mask;
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/super.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/super.c
@@ -0,0 +1,876 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * mount and super_block operations
+ */
+
+#include <linux/buffer_head.h>
+#include <linux/module.h>
+#include <linux/seq_file.h>
+#include <linux/statfs.h>
+#include "aufs.h"
+
+/*
+ * super_operations
+ */
+static struct inode *aufs_alloc_inode(struct super_block *sb __maybe_unused)
+{
+	struct au_icntnr *c;
+
+	c = au_cache_alloc_icntnr();
+	if (c) {
+		inode_init_once(&c->vfs_inode);
+		c->vfs_inode.i_version = 1; /* sigen(sb); */
+		c->iinfo.ii_hinode = NULL;
+		return &c->vfs_inode;
+	}
+	return NULL;
+}
+
+static void aufs_destroy_inode(struct inode *inode)
+{
+	au_iinfo_fin(inode);
+	au_cache_free_icntnr(container_of(inode, struct au_icntnr, vfs_inode));
+}
+
+struct inode *au_iget_locked(struct super_block *sb, ino_t ino)
+{
+	struct inode *inode;
+	int err;
+
+	inode = iget_locked(sb, ino);
+	if (unlikely(!inode)) {
+		inode = ERR_PTR(-ENOMEM);
+		goto out;
+	}
+	if (!(inode->i_state & I_NEW))
+		goto out;
+
+	err = au_xigen_new(inode);
+	if (!err)
+		err = au_iinfo_init(inode);
+	if (!err)
+		inode->i_version++;
+	else {
+		iget_failed(inode);
+		inode = ERR_PTR(err);
+	}
+
+ out:
+	/* never return NULL */
+	AuDebugOn(!inode);
+	AuTraceErrPtr(inode);
+	return inode;
+}
+
+/* lock free root dinfo */
+static int au_show_brs(struct seq_file *seq, struct super_block *sb)
+{
+	int err;
+	aufs_bindex_t bindex, bend;
+	struct path path;
+	struct au_hdentry *hd;
+	struct au_branch *br;
+
+	err = 0;
+	bend = au_sbend(sb);
+	hd = au_di(sb->s_root)->di_hdentry;
+	for (bindex = 0; !err && bindex <= bend; bindex++) {
+		br = au_sbr(sb, bindex);
+		path.mnt = br->br_mnt;
+		path.dentry = hd[bindex].hd_dentry;
+		err = au_seq_path(seq, &path);
+		if (err > 0)
+			err = seq_printf(seq, "=%s",
+					 au_optstr_br_perm(br->br_perm));
+		if (!err && bindex != bend)
+			err = seq_putc(seq, ':');
+	}
+
+	return err;
+}
+
+static void au_show_wbr_create(struct seq_file *m, int v,
+			       struct au_sbinfo *sbinfo)
+{
+	const char *pat;
+
+	AuRwMustAnyLock(&sbinfo->si_rwsem);
+
+	seq_printf(m, ",create=");
+	pat = au_optstr_wbr_create(v);
+	switch (v) {
+	case AuWbrCreate_TDP:
+	case AuWbrCreate_RR:
+	case AuWbrCreate_MFS:
+	case AuWbrCreate_PMFS:
+		seq_printf(m, pat);
+		break;
+	case AuWbrCreate_MFSV:
+		seq_printf(m, /*pat*/"mfs:%lu",
+			   sbinfo->si_wbr_mfs.mfs_expire / HZ);
+		break;
+	case AuWbrCreate_PMFSV:
+		seq_printf(m, /*pat*/"pmfs:%lu",
+			   sbinfo->si_wbr_mfs.mfs_expire / HZ);
+		break;
+	case AuWbrCreate_MFSRR:
+		seq_printf(m, /*pat*/"mfsrr:%llu",
+			   sbinfo->si_wbr_mfs.mfsrr_watermark);
+		break;
+	case AuWbrCreate_MFSRRV:
+		seq_printf(m, /*pat*/"mfsrr:%llu:%lu",
+			   sbinfo->si_wbr_mfs.mfsrr_watermark,
+			   sbinfo->si_wbr_mfs.mfs_expire / HZ);
+		break;
+	}
+}
+
+static int au_show_xino(struct seq_file *seq, struct vfsmount *mnt)
+{
+#ifdef CONFIG_SYSFS
+	return 0;
+#else
+	int err;
+	const int len = sizeof(AUFS_XINO_FNAME) - 1;
+	aufs_bindex_t bindex, brid;
+	struct super_block *sb;
+	struct qstr *name;
+	struct file *f;
+	struct dentry *d, *h_root;
+
+	AuRwMustAnyLock(&sbinfo->si_rwsem);
+
+	err = 0;
+	sb = mnt->mnt_sb;
+	f = au_sbi(sb)->si_xib;
+	if (!f)
+		goto out;
+
+	/* stop printing the default xino path on the first writable branch */
+	h_root = NULL;
+	brid = au_xino_brid(sb);
+	if (brid >= 0) {
+		bindex = au_br_index(sb, brid);
+		h_root = au_di(sb->s_root)->di_hdentry[0 + bindex].hd_dentry;
+	}
+	d = f->f_dentry;
+	name = &d->d_name;
+	/* safe ->d_parent because the file is unlinked */
+	if (d->d_parent == h_root
+	    && name->len == len
+	    && !memcmp(name->name, AUFS_XINO_FNAME, len))
+		goto out;
+
+	seq_puts(seq, ",xino=");
+	err = au_xino_path(seq, f);
+
+ out:
+	return err;
+#endif
+}
+
+/* seq_file will re-call me in case of too long string */
+static int aufs_show_options(struct seq_file *m, struct vfsmount *mnt)
+{
+	int err, n;
+	unsigned int mnt_flags, v;
+	struct super_block *sb;
+	struct au_sbinfo *sbinfo;
+
+#define AuBool(name, str) do { \
+	v = au_opt_test(mnt_flags, name); \
+	if (v != au_opt_test(AuOpt_Def, name)) \
+		seq_printf(m, ",%s" #str, v ? "" : "no"); \
+} while (0)
+
+#define AuStr(name, str) do { \
+	v = mnt_flags & AuOptMask_##name; \
+	if (v != (AuOpt_Def & AuOptMask_##name)) \
+		seq_printf(m, "," #str "=%s", au_optstr_##str(v)); \
+} while (0)
+
+#define AuUInt(name, str, val) do { \
+	if (val != AUFS_##name##_DEF) \
+		seq_printf(m, "," #str "=%u", val); \
+} while (0)
+
+	/* lock free root dinfo */
+	sb = mnt->mnt_sb;
+	si_noflush_read_lock(sb);
+	sbinfo = au_sbi(sb);
+	seq_printf(m, ",si=%lx", sysaufs_si_id(sbinfo));
+
+	mnt_flags = au_mntflags(sb);
+	if (au_opt_test(mnt_flags, XINO)) {
+		err = au_show_xino(m, mnt);
+		if (unlikely(err))
+			goto out;
+	} else
+		seq_puts(m, ",noxino");
+
+	AuBool(TRUNC_XINO, trunc_xino);
+	AuStr(UDBA, udba);
+	AuBool(SHWH, shwh);
+	AuBool(PLINK, plink);
+	/* AuBool(DIRPERM1, dirperm1); */
+	/* AuBool(REFROF, refrof); */
+
+	v = sbinfo->si_wbr_create;
+	if (v != AuWbrCreate_Def)
+		au_show_wbr_create(m, v, sbinfo);
+
+	v = sbinfo->si_wbr_copyup;
+	if (v != AuWbrCopyup_Def)
+		seq_printf(m, ",cpup=%s", au_optstr_wbr_copyup(v));
+
+	v = au_opt_test(mnt_flags, ALWAYS_DIROPQ);
+	if (v != au_opt_test(AuOpt_Def, ALWAYS_DIROPQ))
+		seq_printf(m, ",diropq=%c", v ? 'a' : 'w');
+
+	AuUInt(DIRWH, dirwh, sbinfo->si_dirwh);
+
+	n = sbinfo->si_rdcache / HZ;
+	AuUInt(RDCACHE, rdcache, n);
+
+	AuUInt(RDBLK, rdblk, sbinfo->si_rdblk);
+	AuUInt(RDHASH, rdhash, sbinfo->si_rdhash);
+
+	AuBool(SUM, sum);
+	/* AuBool(SUM_W, wsum); */
+	AuBool(WARN_PERM, warn_perm);
+	AuBool(VERBOSE, verbose);
+
+ out:
+	/* be sure to print "br:" last */
+	if (!sysaufs_brs) {
+		seq_puts(m, ",br:");
+		au_show_brs(m, sb);
+	}
+	si_read_unlock(sb);
+	return 0;
+
+#undef Deleted
+#undef AuBool
+#undef AuStr
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* sum mode which returns the summation for statfs(2) */
+
+static u64 au_add_till_max(u64 a, u64 b)
+{
+	u64 old;
+
+	old = a;
+	a += b;
+	if (old < a)
+		return a;
+	return ULLONG_MAX;
+}
+
+static int au_statfs_sum(struct super_block *sb, struct kstatfs *buf)
+{
+	int err;
+	u64 blocks, bfree, bavail, files, ffree;
+	aufs_bindex_t bend, bindex, i;
+	unsigned char shared;
+	struct vfsmount *h_mnt;
+	struct super_block *h_sb;
+
+	blocks = 0;
+	bfree = 0;
+	bavail = 0;
+	files = 0;
+	ffree = 0;
+
+	err = 0;
+	bend = au_sbend(sb);
+	for (bindex = bend; bindex >= 0; bindex--) {
+		h_mnt = au_sbr_mnt(sb, bindex);
+		h_sb = h_mnt->mnt_sb;
+		shared = 0;
+		for (i = bindex + 1; !shared && i <= bend; i++)
+			shared = (au_sbr_sb(sb, i) == h_sb);
+		if (shared)
+			continue;
+
+		/* sb->s_root for NFS is unreliable */
+		err = vfs_statfs(h_mnt->mnt_root, buf);
+		if (unlikely(err))
+			goto out;
+
+		blocks = au_add_till_max(blocks, buf->f_blocks);
+		bfree = au_add_till_max(bfree, buf->f_bfree);
+		bavail = au_add_till_max(bavail, buf->f_bavail);
+		files = au_add_till_max(files, buf->f_files);
+		ffree = au_add_till_max(ffree, buf->f_ffree);
+	}
+
+	buf->f_blocks = blocks;
+	buf->f_bfree = bfree;
+	buf->f_bavail = bavail;
+	buf->f_files = files;
+	buf->f_ffree = ffree;
+
+ out:
+	return err;
+}
+
+static int aufs_statfs(struct dentry *dentry, struct kstatfs *buf)
+{
+	int err;
+	struct super_block *sb;
+
+	/* lock free root dinfo */
+	sb = dentry->d_sb;
+	si_noflush_read_lock(sb);
+	if (!au_opt_test(au_mntflags(sb), SUM))
+		/* sb->s_root for NFS is unreliable */
+		err = vfs_statfs(au_sbr_mnt(sb, 0)->mnt_root, buf);
+	else
+		err = au_statfs_sum(sb, buf);
+	si_read_unlock(sb);
+
+	if (!err) {
+		buf->f_type = AUFS_SUPER_MAGIC;
+		buf->f_namelen = AUFS_MAX_NAMELEN;
+		memset(&buf->f_fsid, 0, sizeof(buf->f_fsid));
+	}
+	/* buf->f_bsize = buf->f_blocks = buf->f_bfree = buf->f_bavail = -1; */
+
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* try flushing the lower fs at aufs remount/unmount time */
+
+static void au_fsync_br(struct super_block *sb)
+{
+	aufs_bindex_t bend, bindex;
+	int brperm;
+	struct au_branch *br;
+	struct super_block *h_sb;
+
+	bend = au_sbend(sb);
+	for (bindex = 0; bindex < bend; bindex++) {
+		br = au_sbr(sb, bindex);
+		brperm = br->br_perm;
+		if (brperm == AuBrPerm_RR || brperm == AuBrPerm_RRWH)
+			continue;
+		h_sb = br->br_mnt->mnt_sb;
+		if (bdev_read_only(h_sb->s_bdev))
+			continue;
+
+		/* lockdep_off(); */
+		down_write(&h_sb->s_umount);
+		shrink_dcache_sb(h_sb);
+		sync_filesystem(h_sb);
+		up_write(&h_sb->s_umount);
+		/* lockdep_on(); */
+	}
+}
+
+/*
+ * this IS NOT for super_operations.
+ * I guess it will be reverted someday.
+ */
+static void aufs_umount_begin(struct super_block *sb)
+{
+	struct au_sbinfo *sbinfo;
+
+	sbinfo = au_sbi(sb);
+	if (!sbinfo)
+		return;
+
+	si_write_lock(sb);
+	au_fsync_br(sb);
+	if (au_opt_test(au_mntflags(sb), PLINK))
+		au_plink_put(sb);
+	if (sbinfo->si_wbr_create_ops->fin)
+		sbinfo->si_wbr_create_ops->fin(sb);
+	si_write_unlock(sb);
+}
+
+/* final actions when unmounting a file system */
+static void aufs_put_super(struct super_block *sb)
+{
+	struct au_sbinfo *sbinfo;
+
+	sbinfo = au_sbi(sb);
+	if (!sbinfo)
+		return;
+
+	aufs_umount_begin(sb);
+	dbgaufs_si_fin(sbinfo);
+	kobject_put(&sbinfo->si_kobj);
+}
+
+/* ---------------------------------------------------------------------- */
+
+/*
+ * refresh dentry and inode at remount time.
+ */
+static int do_refresh(struct dentry *dentry, mode_t type,
+		      unsigned int dir_flags)
+{
+	int err;
+	struct dentry *parent;
+
+	di_write_lock_child(dentry);
+	parent = dget_parent(dentry);
+	di_read_lock_parent(parent, AuLock_IR);
+
+	/* returns the number of positive dentries */
+	err = au_refresh_hdentry(dentry, type);
+	if (err >= 0) {
+		struct inode *inode = dentry->d_inode;
+		err = au_refresh_hinode(inode, dentry);
+		if (!err && type == S_IFDIR)
+			au_reset_hinotify(inode, dir_flags);
+	}
+	if (unlikely(err))
+		pr_err("unrecoverable error %d, %.*s\n",
+		       err, AuDLNPair(dentry));
+
+	di_read_unlock(parent, AuLock_IR);
+	dput(parent);
+	di_write_unlock(dentry);
+
+	return err;
+}
+
+static int test_dir(struct dentry *dentry, void *arg __maybe_unused)
+{
+	return S_ISDIR(dentry->d_inode->i_mode);
+}
+
+/* gave up consolidating with refresh_nondir() */
+static int refresh_dir(struct dentry *root, unsigned int sigen)
+{
+	int err, i, j, ndentry, e;
+	struct au_dcsub_pages dpages;
+	struct au_dpage *dpage;
+	struct dentry **dentries;
+	struct inode *inode;
+	const unsigned int flags = au_hi_flags(root->d_inode, /*isdir*/1);
+
+	err = 0;
+	list_for_each_entry(inode, &root->d_sb->s_inodes, i_sb_list)
+		if (S_ISDIR(inode->i_mode) && au_iigen(inode) != sigen) {
+			ii_write_lock_child(inode);
+			e = au_refresh_hinode_self(inode, /*do_attr*/1);
+			ii_write_unlock(inode);
+			if (unlikely(e)) {
+				AuDbg("e %d, i%lu\n", e, inode->i_ino);
+				if (!err)
+					err = e;
+				/* go on even if err */
+			}
+		}
+
+	e = au_dpages_init(&dpages, GFP_NOFS);
+	if (unlikely(e)) {
+		if (!err)
+			err = e;
+		goto out;
+	}
+	e = au_dcsub_pages(&dpages, root, test_dir, NULL);
+	if (unlikely(e)) {
+		if (!err)
+			err = e;
+		goto out_dpages;
+	}
+
+	for (i = 0; !e && i < dpages.ndpage; i++) {
+		dpage = dpages.dpages + i;
+		dentries = dpage->dentries;
+		ndentry = dpage->ndentry;
+		for (j = 0; !e && j < ndentry; j++) {
+			struct dentry *d;
+
+			d = dentries[j];
+			au_dbg_verify_dir_parent(d, sigen);
+			if (au_digen(d) != sigen) {
+				e = do_refresh(d, S_IFDIR, flags);
+				if (unlikely(e && !err))
+					err = e;
+				/* break on err */
+			}
+		}
+	}
+
+ out_dpages:
+	au_dpages_free(&dpages);
+ out:
+	return err;
+}
+
+static int test_nondir(struct dentry *dentry, void *arg __maybe_unused)
+{
+	return !S_ISDIR(dentry->d_inode->i_mode);
+}
+
+static int refresh_nondir(struct dentry *root, unsigned int sigen,
+			  int do_dentry)
+{
+	int err, i, j, ndentry, e;
+	struct au_dcsub_pages dpages;
+	struct au_dpage *dpage;
+	struct dentry **dentries;
+	struct inode *inode;
+
+	err = 0;
+	list_for_each_entry(inode, &root->d_sb->s_inodes, i_sb_list)
+		if (!S_ISDIR(inode->i_mode) && au_iigen(inode) != sigen) {
+			ii_write_lock_child(inode);
+			e = au_refresh_hinode_self(inode, /*do_attr*/1);
+			ii_write_unlock(inode);
+			if (unlikely(e)) {
+				AuDbg("e %d, i%lu\n", e, inode->i_ino);
+				if (!err)
+					err = e;
+				/* go on even if err */
+			}
+		}
+
+	if (!do_dentry)
+		goto out;
+
+	e = au_dpages_init(&dpages, GFP_NOFS);
+	if (unlikely(e)) {
+		if (!err)
+			err = e;
+		goto out;
+	}
+	e = au_dcsub_pages(&dpages, root, test_nondir, NULL);
+	if (unlikely(e)) {
+		if (!err)
+			err = e;
+		goto out_dpages;
+	}
+
+	for (i = 0; i < dpages.ndpage; i++) {
+		dpage = dpages.dpages + i;
+		dentries = dpage->dentries;
+		ndentry = dpage->ndentry;
+		for (j = 0; j < ndentry; j++) {
+			struct dentry *d;
+
+			d = dentries[j];
+			au_dbg_verify_nondir_parent(d, sigen);
+			inode = d->d_inode;
+			if (inode && au_digen(d) != sigen) {
+				e = do_refresh(d, inode->i_mode & S_IFMT,
+					       /*dir_flags*/0);
+				if (unlikely(e && !err))
+					err = e;
+				/* go on even err */
+			}
+		}
+	}
+
+ out_dpages:
+	au_dpages_free(&dpages);
+ out:
+	return err;
+}
+
+static void au_remount_refresh(struct super_block *sb, unsigned int flags)
+{
+	int err;
+	unsigned int sigen;
+	struct au_sbinfo *sbinfo;
+	struct dentry *root;
+	struct inode *inode;
+
+	au_sigen_inc(sb);
+	sigen = au_sigen(sb);
+	sbinfo = au_sbi(sb);
+	au_fclr_si(sbinfo, FAILED_REFRESH_DIRS);
+
+	root = sb->s_root;
+	DiMustNoWaiters(root);
+	inode = root->d_inode;
+	IiMustNoWaiters(inode);
+	au_reset_hinotify(inode, au_hi_flags(inode, /*isdir*/1));
+	di_write_unlock(root);
+
+	err = refresh_dir(root, sigen);
+	if (unlikely(err)) {
+		au_fset_si(sbinfo, FAILED_REFRESH_DIRS);
+		pr_warning("Refreshing directories failed, ignored (%d)\n",
+			   err);
+	}
+
+	if (au_ftest_opts(flags, REFRESH_NONDIR)) {
+		err = refresh_nondir(root, sigen, !err);
+		if (unlikely(err))
+			pr_warning("Refreshing non-directories failed, ignored"
+				   "(%d)\n", err);
+	}
+
+	/* aufs_write_lock() calls ..._child() */
+	di_write_lock_child(root);
+	au_cpup_attr_all(root->d_inode, /*force*/1);
+}
+
+/* stop extra interpretation of errno in mount(8), and strange error messages */
+static int cvt_err(int err)
+{
+	AuTraceErr(err);
+
+	switch (err) {
+	case -ENOENT:
+	case -ENOTDIR:
+	case -EEXIST:
+	case -EIO:
+		err = -EINVAL;
+	}
+	return err;
+}
+
+static int aufs_remount_fs(struct super_block *sb, int *flags, char *data)
+{
+	int err;
+	struct au_opts opts;
+	struct dentry *root;
+	struct inode *inode;
+	struct au_sbinfo *sbinfo;
+
+	err = 0;
+	root = sb->s_root;
+	if (!data || !*data) {
+		aufs_write_lock(root);
+		err = au_opts_verify(sb, *flags, /*pending*/0);
+		if (!err)
+			au_fsync_br(sb);
+		aufs_write_unlock(root);
+		goto out;
+	}
+
+	err = -ENOMEM;
+	memset(&opts, 0, sizeof(opts));
+	opts.opt = (void *)__get_free_page(GFP_NOFS);
+	if (unlikely(!opts.opt))
+		goto out;
+	opts.max_opt = PAGE_SIZE / sizeof(*opts.opt);
+	opts.flags = AuOpts_REMOUNT;
+	opts.sb_flags = *flags;
+
+	/* parse it before aufs lock */
+	err = au_opts_parse(sb, data, &opts);
+	if (unlikely(err))
+		goto out_opts;
+
+	sbinfo = au_sbi(sb);
+	inode = root->d_inode;
+	mutex_lock(&inode->i_mutex);
+	aufs_write_lock(root);
+	au_fsync_br(sb);
+
+	/* au_opts_remount() may return an error */
+	err = au_opts_remount(sb, &opts);
+	au_opts_free(&opts);
+
+	if (au_ftest_opts(opts.flags, REFRESH_DIR)
+	    || au_ftest_opts(opts.flags, REFRESH_NONDIR))
+		au_remount_refresh(sb, opts.flags);
+
+	aufs_write_unlock(root);
+	mutex_unlock(&inode->i_mutex);
+
+ out_opts:
+	free_page((unsigned long)opts.opt);
+ out:
+	err = cvt_err(err);
+	AuTraceErr(err);
+	return err;
+}
+
+static const struct super_operations aufs_sop = {
+	.alloc_inode	= aufs_alloc_inode,
+	.destroy_inode	= aufs_destroy_inode,
+	.drop_inode	= generic_delete_inode,
+	.show_options	= aufs_show_options,
+	.statfs		= aufs_statfs,
+	.put_super	= aufs_put_super,
+	.remount_fs	= aufs_remount_fs
+};
+
+/* ---------------------------------------------------------------------- */
+
+static int alloc_root(struct super_block *sb)
+{
+	int err;
+	struct inode *inode;
+	struct dentry *root;
+
+	err = -ENOMEM;
+	inode = au_iget_locked(sb, AUFS_ROOT_INO);
+	err = PTR_ERR(inode);
+	if (IS_ERR(inode))
+		goto out;
+
+	inode->i_op = &aufs_dir_iop;
+	inode->i_fop = &aufs_dir_fop;
+	inode->i_mode = S_IFDIR;
+	inode->i_nlink = 2;
+	unlock_new_inode(inode);
+
+	root = d_alloc_root(inode);
+	if (unlikely(!root))
+		goto out_iput;
+	err = PTR_ERR(root);
+	if (IS_ERR(root))
+		goto out_iput;
+
+	err = au_alloc_dinfo(root);
+	if (!err) {
+		sb->s_root = root;
+		return 0; /* success */
+	}
+	dput(root);
+	goto out; /* do not iput */
+
+ out_iput:
+	iget_failed(inode);
+	iput(inode);
+ out:
+	return err;
+
+}
+
+static int aufs_fill_super(struct super_block *sb, void *raw_data,
+			   int silent __maybe_unused)
+{
+	int err;
+	struct au_opts opts;
+	struct dentry *root;
+	struct inode *inode;
+	char *arg = raw_data;
+
+	if (unlikely(!arg || !*arg)) {
+		err = -EINVAL;
+		pr_err("no arg\n");
+		goto out;
+	}
+
+	err = -ENOMEM;
+	memset(&opts, 0, sizeof(opts));
+	opts.opt = (void *)__get_free_page(GFP_NOFS);
+	if (unlikely(!opts.opt))
+		goto out;
+	opts.max_opt = PAGE_SIZE / sizeof(*opts.opt);
+	opts.sb_flags = sb->s_flags;
+
+	err = au_si_alloc(sb);
+	if (unlikely(err))
+		goto out_opts;
+
+	/* all timestamps always follow the ones on the branch */
+	sb->s_flags |= MS_NOATIME | MS_NODIRATIME;
+	sb->s_op = &aufs_sop;
+	sb->s_magic = AUFS_SUPER_MAGIC;
+	sb->s_maxbytes = 0;
+	au_export_init(sb);
+
+	err = alloc_root(sb);
+	if (unlikely(err)) {
+		si_write_unlock(sb);
+		goto out_info;
+	}
+	root = sb->s_root;
+	inode = root->d_inode;
+
+	/*
+	 * actually we can parse options regardless aufs lock here.
+	 * but at remount time, parsing must be done before aufs lock.
+	 * so we follow the same rule.
+	 */
+	ii_write_lock_parent(inode);
+	aufs_write_unlock(root);
+	err = au_opts_parse(sb, arg, &opts);
+	if (unlikely(err))
+		goto out_root;
+
+	/* lock vfs_inode first, then aufs. */
+	mutex_lock(&inode->i_mutex);
+	inode->i_op = &aufs_dir_iop;
+	inode->i_fop = &aufs_dir_fop;
+	aufs_write_lock(root);
+	err = au_opts_mount(sb, &opts);
+	au_opts_free(&opts);
+	if (unlikely(err))
+		goto out_unlock;
+	aufs_write_unlock(root);
+	mutex_unlock(&inode->i_mutex);
+	goto out_opts; /* success */
+
+ out_unlock:
+	aufs_write_unlock(root);
+	mutex_unlock(&inode->i_mutex);
+ out_root:
+	dput(root);
+	sb->s_root = NULL;
+ out_info:
+	kobject_put(&au_sbi(sb)->si_kobj);
+	sb->s_fs_info = NULL;
+ out_opts:
+	free_page((unsigned long)opts.opt);
+ out:
+	AuTraceErr(err);
+	err = cvt_err(err);
+	AuTraceErr(err);
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int aufs_get_sb(struct file_system_type *fs_type, int flags,
+		       const char *dev_name __maybe_unused, void *raw_data,
+		       struct vfsmount *mnt)
+{
+	int err;
+	struct super_block *sb;
+
+	/* all timestamps always follow the ones on the branch */
+	/* mnt->mnt_flags |= MNT_NOATIME | MNT_NODIRATIME; */
+	err = get_sb_nodev(fs_type, flags, raw_data, aufs_fill_super, mnt);
+	if (!err) {
+		sb = mnt->mnt_sb;
+		si_write_lock(sb);
+		sysaufs_brs_add(sb, 0);
+		si_write_unlock(sb);
+	}
+	return err;
+}
+
+struct file_system_type aufs_fs_type = {
+	.name		= AUFS_FSTYPE,
+	.fs_flags	=
+		FS_RENAME_DOES_D_MOVE	/* a race between rename and others */
+		| FS_REVAL_DOT,		/* for NFS branch and udba */
+	.get_sb		= aufs_get_sb,
+	.kill_sb	= generic_shutdown_super,
+	/* no need to __module_get() and module_put(). */
+	.owner		= THIS_MODULE,
+};
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/cpup.h
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/cpup.h
@@ -0,0 +1,81 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * copy-up/down functions
+ */
+
+#ifndef __AUFS_CPUP_H__
+#define __AUFS_CPUP_H__
+
+#ifdef __KERNEL__
+
+#include <linux/path.h>
+#include <linux/time.h>
+#include <linux/aufs_type.h>
+
+struct inode;
+struct file;
+
+void au_cpup_attr_flags(struct inode *dst, struct inode *src);
+void au_cpup_attr_timesizes(struct inode *inode);
+void au_cpup_attr_nlink(struct inode *inode, int force);
+void au_cpup_attr_changeable(struct inode *inode);
+void au_cpup_igen(struct inode *inode, struct inode *h_inode);
+void au_cpup_attr_all(struct inode *inode, int force);
+
+/* ---------------------------------------------------------------------- */
+
+/* cpup flags */
+#define AuCpup_DTIME	1		/* do dtime_store/revert */
+#define AuCpup_KEEPLINO	(1 << 1)	/* do not clear the lower xino,
+					   for link(2) */
+#define au_ftest_cpup(flags, name)	((flags) & AuCpup_##name)
+#define au_fset_cpup(flags, name)	{ (flags) |= AuCpup_##name; }
+#define au_fclr_cpup(flags, name)	{ (flags) &= ~AuCpup_##name; }
+
+int au_copy_file(struct file *dst, struct file *src, loff_t len);
+int au_sio_cpup_single(struct dentry *dentry, aufs_bindex_t bdst,
+		       aufs_bindex_t bsrc, loff_t len, unsigned int flags,
+		       struct dentry *dst_parent);
+int au_sio_cpup_simple(struct dentry *dentry, aufs_bindex_t bdst, loff_t len,
+		       unsigned int flags);
+int au_sio_cpup_wh(struct dentry *dentry, aufs_bindex_t bdst, loff_t len,
+		   struct file *file);
+
+int au_cp_dirs(struct dentry *dentry, aufs_bindex_t bdst,
+	       int (*cp)(struct dentry *dentry, aufs_bindex_t bdst,
+			 struct dentry *h_parent, void *arg),
+	       void *arg);
+int au_cpup_dirs(struct dentry *dentry, aufs_bindex_t bdst);
+int au_test_and_cpup_dirs(struct dentry *dentry, aufs_bindex_t bdst);
+
+/* ---------------------------------------------------------------------- */
+
+/* keep timestamps when copyup */
+struct au_dtime {
+	struct dentry *dt_dentry;
+	struct path dt_h_path;
+	struct timespec dt_atime, dt_mtime;
+};
+void au_dtime_store(struct au_dtime *dt, struct dentry *dentry,
+		    struct path *h_path);
+void au_dtime_revert(struct au_dtime *dt);
+
+#endif /* __KERNEL__ */
+#endif /* __AUFS_CPUP_H__ */
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/sysaufs.h
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/sysaufs.h
@@ -0,0 +1,120 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * sysfs interface and mount lifetime management
+ */
+
+#ifndef __SYSAUFS_H__
+#define __SYSAUFS_H__
+
+#ifdef __KERNEL__
+
+#include <linux/sysfs.h>
+#include <linux/aufs_type.h>
+#include "module.h"
+
+struct super_block;
+struct au_sbinfo;
+
+struct sysaufs_si_attr {
+	struct attribute attr;
+	int (*show)(struct seq_file *seq, struct super_block *sb);
+};
+
+/* ---------------------------------------------------------------------- */
+
+/* sysaufs.c */
+extern unsigned long sysaufs_si_mask;
+extern struct kset *sysaufs_ket;
+extern struct attribute *sysaufs_si_attrs[];
+int sysaufs_si_init(struct au_sbinfo *sbinfo);
+int __init sysaufs_init(void);
+void sysaufs_fin(void);
+
+/* ---------------------------------------------------------------------- */
+
+/* some people doesn't like to show a pointer in kernel */
+static inline unsigned long sysaufs_si_id(struct au_sbinfo *sbinfo)
+{
+	return sysaufs_si_mask ^ (unsigned long)sbinfo;
+}
+
+#define SysaufsSiNamePrefix	"si_"
+#define SysaufsSiNameLen	(sizeof(SysaufsSiNamePrefix) + 16)
+static inline void sysaufs_name(struct au_sbinfo *sbinfo, char *name)
+{
+	snprintf(name, SysaufsSiNameLen, SysaufsSiNamePrefix "%lx",
+		 sysaufs_si_id(sbinfo));
+}
+
+struct au_branch;
+#ifdef CONFIG_SYSFS
+/* sysfs.c */
+extern struct attribute_group *sysaufs_attr_group;
+
+int sysaufs_si_xi_path(struct seq_file *seq, struct super_block *sb);
+ssize_t sysaufs_si_show(struct kobject *kobj, struct attribute *attr,
+			 char *buf);
+
+void sysaufs_br_init(struct au_branch *br);
+void sysaufs_brs_add(struct super_block *sb, aufs_bindex_t bindex);
+void sysaufs_brs_del(struct super_block *sb, aufs_bindex_t bindex);
+
+#define sysaufs_brs_init()	do {} while (0)
+
+#else
+#define sysaufs_attr_group	NULL
+
+static inline
+int sysaufs_si_xi_path(struct seq_file *seq, struct super_block *sb)
+{
+	return 0;
+}
+
+static inline
+ssize_t sysaufs_si_show(struct kobject *kobj, struct attribute *attr,
+			 char *buf)
+{
+	return 0;
+}
+
+static inline void sysaufs_br_init(struct au_branch *br)
+{
+	/* empty */
+}
+
+static inline void sysaufs_brs_add(struct super_block *sb, aufs_bindex_t bindex)
+{
+	/* nothing */
+}
+
+static inline void sysaufs_brs_del(struct super_block *sb, aufs_bindex_t bindex)
+{
+	/* nothing */
+}
+
+static inline void sysaufs_brs_init(void)
+{
+	sysaufs_brs = 0;
+}
+
+#endif /* CONFIG_SYSFS */
+
+#endif /* __KERNEL__ */
+#endif /* __SYSAUFS_H__ */
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/dir.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/dir.c
@@ -0,0 +1,593 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * directory operations
+ */
+
+#include <linux/file.h>
+#include <linux/fs_stack.h>
+#include "aufs.h"
+
+void au_add_nlink(struct inode *dir, struct inode *h_dir)
+{
+	AuDebugOn(!S_ISDIR(dir->i_mode) || !S_ISDIR(h_dir->i_mode));
+
+	dir->i_nlink += h_dir->i_nlink - 2;
+	if (h_dir->i_nlink < 2)
+		dir->i_nlink += 2;
+}
+
+void au_sub_nlink(struct inode *dir, struct inode *h_dir)
+{
+	AuDebugOn(!S_ISDIR(dir->i_mode) || !S_ISDIR(h_dir->i_mode));
+
+	dir->i_nlink -= h_dir->i_nlink - 2;
+	if (h_dir->i_nlink < 2)
+		dir->i_nlink -= 2;
+}
+
+loff_t au_dir_size(struct file *file, struct dentry *dentry)
+{
+	loff_t sz;
+	aufs_bindex_t bindex, bend;
+	struct file *h_file;
+	struct dentry *h_dentry;
+
+	sz = 0;
+	if (file) {
+		AuDebugOn(!file->f_dentry);
+		AuDebugOn(!file->f_dentry->d_inode);
+		AuDebugOn(!S_ISDIR(file->f_dentry->d_inode->i_mode));
+
+		bend = au_fbend(file);
+		for (bindex = au_fbstart(file);
+		     bindex <= bend && sz < KMALLOC_MAX_SIZE;
+		     bindex++) {
+			h_file = au_h_fptr(file, bindex);
+			if (h_file
+			    && h_file->f_dentry
+			    && h_file->f_dentry->d_inode)
+				sz += i_size_read(h_file->f_dentry->d_inode);
+		}
+	} else {
+		AuDebugOn(!dentry);
+		AuDebugOn(!dentry->d_inode);
+		AuDebugOn(!S_ISDIR(dentry->d_inode->i_mode));
+
+		bend = au_dbtaildir(dentry);
+		for (bindex = au_dbstart(dentry);
+		     bindex <= bend && sz < KMALLOC_MAX_SIZE;
+		     bindex++) {
+			h_dentry = au_h_dptr(dentry, bindex);
+			if (h_dentry && h_dentry->d_inode)
+				sz += i_size_read(h_dentry->d_inode);
+		}
+	}
+	if (sz < KMALLOC_MAX_SIZE)
+		sz = roundup_pow_of_two(sz);
+	if (sz > KMALLOC_MAX_SIZE)
+		sz = KMALLOC_MAX_SIZE;
+	else if (sz < NAME_MAX) {
+		BUILD_BUG_ON(AUFS_RDBLK_DEF < NAME_MAX);
+		sz = AUFS_RDBLK_DEF;
+	}
+	return sz;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int reopen_dir(struct file *file)
+{
+	int err;
+	unsigned int flags;
+	aufs_bindex_t bindex, btail, bstart;
+	struct dentry *dentry, *h_dentry;
+	struct file *h_file;
+
+	/* open all lower dirs */
+	dentry = file->f_dentry;
+	bstart = au_dbstart(dentry);
+	for (bindex = au_fbstart(file); bindex < bstart; bindex++)
+		au_set_h_fptr(file, bindex, NULL);
+	au_set_fbstart(file, bstart);
+
+	btail = au_dbtaildir(dentry);
+	for (bindex = au_fbend(file); btail < bindex; bindex--)
+		au_set_h_fptr(file, bindex, NULL);
+	au_set_fbend(file, btail);
+
+	spin_lock(&file->f_lock);
+	flags = file->f_flags;
+	spin_unlock(&file->f_lock);
+	for (bindex = bstart; bindex <= btail; bindex++) {
+		h_dentry = au_h_dptr(dentry, bindex);
+		if (!h_dentry)
+			continue;
+		h_file = au_h_fptr(file, bindex);
+		if (h_file)
+			continue;
+
+		h_file = au_h_open(dentry, bindex, flags, file);
+		err = PTR_ERR(h_file);
+		if (IS_ERR(h_file))
+			goto out; /* close all? */
+		au_set_h_fptr(file, bindex, h_file);
+	}
+	au_update_figen(file);
+	/* todo: necessary? */
+	/* file->f_ra = h_file->f_ra; */
+	err = 0;
+
+ out:
+	return err;
+}
+
+static int do_open_dir(struct file *file, int flags)
+{
+	int err;
+	aufs_bindex_t bindex, btail;
+	struct dentry *dentry, *h_dentry;
+	struct file *h_file;
+
+	FiMustWriteLock(file);
+
+	err = 0;
+	dentry = file->f_dentry;
+	au_set_fvdir_cache(file, NULL);
+	au_fi(file)->fi_maintain_plink = 0;
+	file->f_version = dentry->d_inode->i_version;
+	bindex = au_dbstart(dentry);
+	au_set_fbstart(file, bindex);
+	btail = au_dbtaildir(dentry);
+	au_set_fbend(file, btail);
+	for (; !err && bindex <= btail; bindex++) {
+		h_dentry = au_h_dptr(dentry, bindex);
+		if (!h_dentry)
+			continue;
+
+		h_file = au_h_open(dentry, bindex, flags, file);
+		if (IS_ERR(h_file)) {
+			err = PTR_ERR(h_file);
+			break;
+		}
+		au_set_h_fptr(file, bindex, h_file);
+	}
+	au_update_figen(file);
+	/* todo: necessary? */
+	/* file->f_ra = h_file->f_ra; */
+	if (!err)
+		return 0; /* success */
+
+	/* close all */
+	for (bindex = au_fbstart(file); bindex <= btail; bindex++)
+		au_set_h_fptr(file, bindex, NULL);
+	au_set_fbstart(file, -1);
+	au_set_fbend(file, -1);
+	return err;
+}
+
+static int aufs_open_dir(struct inode *inode __maybe_unused,
+			 struct file *file)
+{
+	return au_do_open(file, do_open_dir);
+}
+
+static int aufs_release_dir(struct inode *inode __maybe_unused,
+			    struct file *file)
+{
+	struct au_vdir *vdir_cache;
+	struct super_block *sb;
+	struct au_sbinfo *sbinfo;
+
+	sb = file->f_dentry->d_sb;
+	si_noflush_read_lock(sb);
+	fi_write_lock(file);
+	vdir_cache = au_fvdir_cache(file);
+	if (vdir_cache)
+		au_vdir_free(vdir_cache);
+	if (au_fi(file)->fi_maintain_plink) {
+		sbinfo = au_sbi(sb);
+		/* clear the flag without write-lock */
+		sbinfo->au_si_status &= ~AuSi_MAINTAIN_PLINK;
+		smp_mb();
+		wake_up_all(&sbinfo->si_plink_wq);
+	}
+	fi_write_unlock(file);
+	au_finfo_fin(file);
+	si_read_unlock(sb);
+	return 0;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int au_do_fsync_dir_no_file(struct dentry *dentry, int datasync)
+{
+	int err;
+	aufs_bindex_t bend, bindex;
+	struct inode *inode;
+	struct super_block *sb;
+
+	err = 0;
+	sb = dentry->d_sb;
+	inode = dentry->d_inode;
+	IMustLock(inode);
+	bend = au_dbend(dentry);
+	for (bindex = au_dbstart(dentry); !err && bindex <= bend; bindex++) {
+		struct path h_path;
+		struct inode *h_inode;
+
+		if (au_test_ro(sb, bindex, inode))
+			continue;
+		h_path.dentry = au_h_dptr(dentry, bindex);
+		if (!h_path.dentry)
+			continue;
+		h_inode = h_path.dentry->d_inode;
+		if (!h_inode)
+			continue;
+
+		/* no mnt_want_write() */
+		/* cf. fs/nsfd/vfs.c and fs/nfsd/nfs4recover.c */
+		/* todo: inotiry fired? */
+		h_path.mnt = au_sbr_mnt(sb, bindex);
+		mutex_lock(&h_inode->i_mutex);
+		err = filemap_fdatawrite(h_inode->i_mapping);
+		AuDebugOn(!h_inode->i_fop);
+		if (!err && h_inode->i_fop->fsync)
+			err = h_inode->i_fop->fsync(NULL, h_path.dentry,
+						    datasync);
+		if (!err)
+			err = filemap_fdatawrite(h_inode->i_mapping);
+		if (!err)
+			vfsub_update_h_iattr(&h_path, /*did*/NULL); /*ignore*/
+		mutex_unlock(&h_inode->i_mutex);
+	}
+
+	return err;
+}
+
+static int au_do_fsync_dir(struct file *file, int datasync)
+{
+	int err;
+	aufs_bindex_t bend, bindex;
+	struct file *h_file;
+	struct super_block *sb;
+	struct inode *inode;
+	struct mutex *h_mtx;
+
+	err = au_reval_and_lock_fdi(file, reopen_dir, /*wlock*/1);
+	if (unlikely(err))
+		goto out;
+
+	sb = file->f_dentry->d_sb;
+	inode = file->f_dentry->d_inode;
+	bend = au_fbend(file);
+	for (bindex = au_fbstart(file); !err && bindex <= bend; bindex++) {
+		h_file = au_h_fptr(file, bindex);
+		if (!h_file || au_test_ro(sb, bindex, inode))
+			continue;
+
+		err = vfs_fsync(h_file, h_file->f_dentry, datasync);
+		if (!err) {
+			h_mtx = &h_file->f_dentry->d_inode->i_mutex;
+			mutex_lock(h_mtx);
+			vfsub_update_h_iattr(&h_file->f_path, /*did*/NULL);
+			/*ignore*/
+			mutex_unlock(h_mtx);
+		}
+	}
+
+ out:
+	return err;
+}
+
+/*
+ * @file may be NULL
+ */
+static int aufs_fsync_dir(struct file *file, struct dentry *dentry,
+			  int datasync)
+{
+	int err;
+	struct super_block *sb;
+
+	IMustLock(dentry->d_inode);
+
+	err = 0;
+	sb = dentry->d_sb;
+	si_noflush_read_lock(sb);
+	if (file)
+		err = au_do_fsync_dir(file, datasync);
+	else {
+		di_write_lock_child(dentry);
+		err = au_do_fsync_dir_no_file(dentry, datasync);
+	}
+	au_cpup_attr_timesizes(dentry->d_inode);
+	di_write_unlock(dentry);
+	if (file)
+		fi_write_unlock(file);
+
+	si_read_unlock(sb);
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int aufs_readdir(struct file *file, void *dirent, filldir_t filldir)
+{
+	int err;
+	struct dentry *dentry;
+	struct inode *inode;
+	struct super_block *sb;
+
+	dentry = file->f_dentry;
+	inode = dentry->d_inode;
+	IMustLock(inode);
+
+	sb = dentry->d_sb;
+	si_read_lock(sb, AuLock_FLUSH);
+	err = au_reval_and_lock_fdi(file, reopen_dir, /*wlock*/1);
+	if (unlikely(err))
+		goto out;
+	err = au_vdir_init(file);
+	di_downgrade_lock(dentry, AuLock_IR);
+	if (unlikely(err))
+		goto out_unlock;
+
+	if (!au_test_nfsd(current)) {
+		err = au_vdir_fill_de(file, dirent, filldir);
+		fsstack_copy_attr_atime(inode,
+					au_h_iptr(inode, au_ibstart(inode)));
+	} else {
+		/*
+		 * nfsd filldir may call lookup_one_len(), vfs_getattr(),
+		 * encode_fh() and others.
+		 */
+		struct inode *h_inode = au_h_iptr(inode, au_ibstart(inode));
+
+		di_read_unlock(dentry, AuLock_IR);
+		si_read_unlock(sb);
+		/* lockdep_off(); */
+		err = au_vdir_fill_de(file, dirent, filldir);
+		/* lockdep_on(); */
+		fsstack_copy_attr_atime(inode, h_inode);
+		fi_write_unlock(file);
+
+		AuTraceErr(err);
+		return err;
+	}
+
+ out_unlock:
+	di_read_unlock(dentry, AuLock_IR);
+	fi_write_unlock(file);
+ out:
+	si_read_unlock(sb);
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+#define AuTestEmpty_WHONLY	1
+#define AuTestEmpty_CALLED	(1 << 1)
+#define AuTestEmpty_SHWH	(1 << 2)
+#define au_ftest_testempty(flags, name)	((flags) & AuTestEmpty_##name)
+#define au_fset_testempty(flags, name)	{ (flags) |= AuTestEmpty_##name; }
+#define au_fclr_testempty(flags, name)	{ (flags) &= ~AuTestEmpty_##name; }
+
+#ifndef CONFIG_AUFS_SHWH
+#undef AuTestEmpty_SHWH
+#define AuTestEmpty_SHWH	0
+#endif
+
+struct test_empty_arg {
+	struct au_nhash *whlist;
+	unsigned int flags;
+	int err;
+	aufs_bindex_t bindex;
+};
+
+static int test_empty_cb(void *__arg, const char *__name, int namelen,
+			 loff_t offset __maybe_unused, u64 ino,
+			 unsigned int d_type)
+{
+	struct test_empty_arg *arg = __arg;
+	char *name = (void *)__name;
+
+	arg->err = 0;
+	au_fset_testempty(arg->flags, CALLED);
+	/* smp_mb(); */
+	if (name[0] == '.'
+	    && (namelen == 1 || (name[1] == '.' && namelen == 2)))
+		goto out; /* success */
+
+	if (namelen <= AUFS_WH_PFX_LEN
+	    || memcmp(name, AUFS_WH_PFX, AUFS_WH_PFX_LEN)) {
+		if (au_ftest_testempty(arg->flags, WHONLY)
+		    && !au_nhash_test_known_wh(arg->whlist, name, namelen))
+			arg->err = -ENOTEMPTY;
+		goto out;
+	}
+
+	name += AUFS_WH_PFX_LEN;
+	namelen -= AUFS_WH_PFX_LEN;
+	if (!au_nhash_test_known_wh(arg->whlist, name, namelen))
+		arg->err = au_nhash_append_wh
+			(arg->whlist, name, namelen, ino, d_type, arg->bindex,
+			 au_ftest_testempty(arg->flags, SHWH));
+
+ out:
+	/* smp_mb(); */
+	AuTraceErr(arg->err);
+	return arg->err;
+}
+
+static int do_test_empty(struct dentry *dentry, struct test_empty_arg *arg)
+{
+	int err;
+	struct file *h_file;
+
+	h_file = au_h_open(dentry, arg->bindex,
+			   O_RDONLY | O_NONBLOCK | O_DIRECTORY | O_LARGEFILE,
+			   /*file*/NULL);
+	err = PTR_ERR(h_file);
+	if (IS_ERR(h_file))
+		goto out;
+
+	err = 0;
+	if (!au_opt_test(au_mntflags(dentry->d_sb), UDBA_NONE)
+	    && !h_file->f_dentry->d_inode->i_nlink)
+		goto out_put;
+
+	do {
+		arg->err = 0;
+		au_fclr_testempty(arg->flags, CALLED);
+		/* smp_mb(); */
+		err = vfsub_readdir(h_file, test_empty_cb, arg);
+		if (err >= 0)
+			err = arg->err;
+	} while (!err && au_ftest_testempty(arg->flags, CALLED));
+
+ out_put:
+	fput(h_file);
+	au_sbr_put(dentry->d_sb, arg->bindex);
+ out:
+	return err;
+}
+
+struct do_test_empty_args {
+	int *errp;
+	struct dentry *dentry;
+	struct test_empty_arg *arg;
+};
+
+static void call_do_test_empty(void *args)
+{
+	struct do_test_empty_args *a = args;
+	*a->errp = do_test_empty(a->dentry, a->arg);
+}
+
+static int sio_test_empty(struct dentry *dentry, struct test_empty_arg *arg)
+{
+	int err, wkq_err;
+	struct dentry *h_dentry;
+	struct inode *h_inode;
+
+	h_dentry = au_h_dptr(dentry, arg->bindex);
+	h_inode = h_dentry->d_inode;
+	mutex_lock_nested(&h_inode->i_mutex, AuLsc_I_CHILD);
+	err = au_test_h_perm_sio(h_inode, MAY_EXEC | MAY_READ);
+	mutex_unlock(&h_inode->i_mutex);
+	if (!err)
+		err = do_test_empty(dentry, arg);
+	else {
+		struct do_test_empty_args args = {
+			.errp	= &err,
+			.dentry	= dentry,
+			.arg	= arg
+		};
+		unsigned int flags = arg->flags;
+
+		wkq_err = au_wkq_wait(call_do_test_empty, &args);
+		if (unlikely(wkq_err))
+			err = wkq_err;
+		arg->flags = flags;
+	}
+
+	return err;
+}
+
+int au_test_empty_lower(struct dentry *dentry)
+{
+	int err;
+	unsigned int rdhash;
+	aufs_bindex_t bindex, bstart, btail;
+	struct au_nhash whlist;
+	struct test_empty_arg arg;
+
+	SiMustAnyLock(dentry->d_sb);
+
+	rdhash = au_sbi(dentry->d_sb)->si_rdhash;
+	if (!rdhash)
+		rdhash = au_rdhash_est(au_dir_size(/*file*/NULL, dentry));
+	err = au_nhash_alloc(&whlist, rdhash, GFP_NOFS);
+	if (unlikely(err))
+		goto out;
+
+	arg.flags = 0;
+	arg.whlist = &whlist;
+	bstart = au_dbstart(dentry);
+	if (au_opt_test(au_mntflags(dentry->d_sb), SHWH))
+		au_fset_testempty(arg.flags, SHWH);
+	arg.bindex = bstart;
+	err = do_test_empty(dentry, &arg);
+	if (unlikely(err))
+		goto out_whlist;
+
+	au_fset_testempty(arg.flags, WHONLY);
+	btail = au_dbtaildir(dentry);
+	for (bindex = bstart + 1; !err && bindex <= btail; bindex++) {
+		struct dentry *h_dentry;
+
+		h_dentry = au_h_dptr(dentry, bindex);
+		if (h_dentry && h_dentry->d_inode) {
+			arg.bindex = bindex;
+			err = do_test_empty(dentry, &arg);
+		}
+	}
+
+ out_whlist:
+	au_nhash_wh_free(&whlist);
+ out:
+	return err;
+}
+
+int au_test_empty(struct dentry *dentry, struct au_nhash *whlist)
+{
+	int err;
+	struct test_empty_arg arg;
+	aufs_bindex_t bindex, btail;
+
+	err = 0;
+	arg.whlist = whlist;
+	arg.flags = AuTestEmpty_WHONLY;
+	if (au_opt_test(au_mntflags(dentry->d_sb), SHWH))
+		au_fset_testempty(arg.flags, SHWH);
+	btail = au_dbtaildir(dentry);
+	for (bindex = au_dbstart(dentry); !err && bindex <= btail; bindex++) {
+		struct dentry *h_dentry;
+
+		h_dentry = au_h_dptr(dentry, bindex);
+		if (h_dentry && h_dentry->d_inode) {
+			arg.bindex = bindex;
+			err = sio_test_empty(dentry, &arg);
+		}
+	}
+
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+const struct file_operations aufs_dir_fop = {
+	.read		= generic_read_dir,
+	.readdir	= aufs_readdir,
+	.unlocked_ioctl	= aufs_ioctl_dir,
+	.open		= aufs_open_dir,
+	.release	= aufs_release_dir,
+	.flush		= aufs_flush,
+	.fsync		= aufs_fsync_dir
+};
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/aufs.h
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/aufs.h
@@ -0,0 +1,51 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * all header files
+ */
+
+#ifndef __AUFS_H__
+#define __AUFS_H__
+
+#ifdef __KERNEL__
+
+#include "debug.h"
+
+#include "branch.h"
+#include "cpup.h"
+#include "dcsub.h"
+#include "dbgaufs.h"
+#include "dentry.h"
+#include "dir.h"
+#include "file.h"
+#include "fstype.h"
+#include "inode.h"
+#include "loop.h"
+#include "module.h"
+#include "opts.h"
+#include "rwsem.h"
+#include "spl.h"
+#include "super.h"
+#include "sysaufs.h"
+#include "vfsub.h"
+#include "whout.h"
+#include "wkq.h"
+
+#endif /* __KERNEL__ */
+#endif /* __AUFS_H__ */
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/wbr_policy.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/wbr_policy.c
@@ -0,0 +1,641 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * policies for selecting one among multiple writable branches
+ */
+
+#include <linux/statfs.h>
+#include "aufs.h"
+
+/* subset of cpup_attr() */
+static noinline_for_stack
+int au_cpdown_attr(struct path *h_path, struct dentry *h_src)
+{
+	int err, sbits;
+	struct iattr ia;
+	struct inode *h_isrc;
+
+	h_isrc = h_src->d_inode;
+	ia.ia_valid = ATTR_FORCE | ATTR_MODE | ATTR_UID | ATTR_GID;
+	ia.ia_mode = h_isrc->i_mode;
+	ia.ia_uid = h_isrc->i_uid;
+	ia.ia_gid = h_isrc->i_gid;
+	sbits = !!(ia.ia_mode & (S_ISUID | S_ISGID));
+	au_cpup_attr_flags(h_path->dentry->d_inode, h_isrc);
+	err = vfsub_sio_notify_change(h_path, &ia);
+
+	/* is this nfs only? */
+	if (!err && sbits && au_test_nfs(h_path->dentry->d_sb)) {
+		ia.ia_valid = ATTR_FORCE | ATTR_MODE;
+		ia.ia_mode = h_isrc->i_mode;
+		err = vfsub_sio_notify_change(h_path, &ia);
+	}
+
+	return err;
+}
+
+#define AuCpdown_PARENT_OPQ	1
+#define AuCpdown_WHED		(1 << 1)
+#define AuCpdown_MADE_DIR	(1 << 2)
+#define AuCpdown_DIROPQ		(1 << 3)
+#define au_ftest_cpdown(flags, name)	((flags) & AuCpdown_##name)
+#define au_fset_cpdown(flags, name)	{ (flags) |= AuCpdown_##name; }
+#define au_fclr_cpdown(flags, name)	{ (flags) &= ~AuCpdown_##name; }
+
+struct au_cpdown_dir_args {
+	struct dentry *parent;
+	unsigned int flags;
+};
+
+static int au_cpdown_dir_opq(struct dentry *dentry, aufs_bindex_t bdst,
+			     struct au_cpdown_dir_args *a)
+{
+	int err;
+	struct dentry *opq_dentry;
+
+	opq_dentry = au_diropq_create(dentry, bdst);
+	err = PTR_ERR(opq_dentry);
+	if (IS_ERR(opq_dentry))
+		goto out;
+	dput(opq_dentry);
+	au_fset_cpdown(a->flags, DIROPQ);
+
+ out:
+	return err;
+}
+
+static int au_cpdown_dir_wh(struct dentry *dentry, struct dentry *h_parent,
+			    struct inode *dir, aufs_bindex_t bdst)
+{
+	int err;
+	struct path h_path;
+	struct au_branch *br;
+
+	br = au_sbr(dentry->d_sb, bdst);
+	h_path.dentry = au_wh_lkup(h_parent, &dentry->d_name, br);
+	err = PTR_ERR(h_path.dentry);
+	if (IS_ERR(h_path.dentry))
+		goto out;
+
+	err = 0;
+	if (h_path.dentry->d_inode) {
+		h_path.mnt = br->br_mnt;
+		err = au_wh_unlink_dentry(au_h_iptr(dir, bdst), &h_path,
+					  dentry);
+	}
+	dput(h_path.dentry);
+
+ out:
+	return err;
+}
+
+static int au_cpdown_dir(struct dentry *dentry, aufs_bindex_t bdst,
+			 struct dentry *h_parent, void *arg)
+{
+	int err, rerr;
+	aufs_bindex_t bend, bopq, bstart;
+	unsigned char parent_opq;
+	struct path h_path;
+	struct dentry *parent;
+	struct inode *h_dir, *h_inode, *inode, *dir;
+	struct au_cpdown_dir_args *args = arg;
+
+	bstart = au_dbstart(dentry);
+	/* dentry is di-locked */
+	parent = dget_parent(dentry);
+	dir = parent->d_inode;
+	h_dir = h_parent->d_inode;
+	AuDebugOn(h_dir != au_h_iptr(dir, bdst));
+	IMustLock(h_dir);
+
+	err = au_lkup_neg(dentry, bdst);
+	if (unlikely(err < 0))
+		goto out;
+	h_path.dentry = au_h_dptr(dentry, bdst);
+	h_path.mnt = au_sbr_mnt(dentry->d_sb, bdst);
+	err = vfsub_sio_mkdir(au_h_iptr(dir, bdst), &h_path,
+			      S_IRWXU | S_IRUGO | S_IXUGO);
+	if (unlikely(err))
+		goto out_put;
+	au_fset_cpdown(args->flags, MADE_DIR);
+
+	bend = au_dbend(dentry);
+	bopq = au_dbdiropq(dentry);
+	au_fclr_cpdown(args->flags, WHED);
+	au_fclr_cpdown(args->flags, DIROPQ);
+	if (au_dbwh(dentry) == bdst)
+		au_fset_cpdown(args->flags, WHED);
+	if (!au_ftest_cpdown(args->flags, PARENT_OPQ) && bopq <= bdst)
+		au_fset_cpdown(args->flags, PARENT_OPQ);
+	parent_opq = (au_ftest_cpdown(args->flags, PARENT_OPQ)
+		      && args->parent == dentry);
+	h_inode = h_path.dentry->d_inode;
+	mutex_lock_nested(&h_inode->i_mutex, AuLsc_I_CHILD);
+	if (au_ftest_cpdown(args->flags, WHED)) {
+		err = au_cpdown_dir_opq(dentry, bdst, args);
+		if (unlikely(err)) {
+			mutex_unlock(&h_inode->i_mutex);
+			goto out_dir;
+		}
+	}
+
+	err = au_cpdown_attr(&h_path, au_h_dptr(dentry, bstart));
+	mutex_unlock(&h_inode->i_mutex);
+	if (unlikely(err))
+		goto out_opq;
+
+	if (au_ftest_cpdown(args->flags, WHED)) {
+		err = au_cpdown_dir_wh(dentry, h_parent, dir, bdst);
+		if (unlikely(err))
+			goto out_opq;
+	}
+
+	inode = dentry->d_inode;
+	if (au_ibend(inode) < bdst)
+		au_set_ibend(inode, bdst);
+	au_set_h_iptr(inode, bdst, au_igrab(h_inode),
+		      au_hi_flags(inode, /*isdir*/1));
+	goto out; /* success */
+
+	/* revert */
+ out_opq:
+	if (au_ftest_cpdown(args->flags, DIROPQ)) {
+		mutex_lock_nested(&h_inode->i_mutex, AuLsc_I_CHILD);
+		rerr = au_diropq_remove(dentry, bdst);
+		mutex_unlock(&h_inode->i_mutex);
+		if (unlikely(rerr)) {
+			AuIOErr("failed removing diropq for %.*s b%d (%d)\n",
+				AuDLNPair(dentry), bdst, rerr);
+			err = -EIO;
+			goto out;
+		}
+	}
+ out_dir:
+	if (au_ftest_cpdown(args->flags, MADE_DIR)) {
+		rerr = vfsub_sio_rmdir(au_h_iptr(dir, bdst), &h_path);
+		if (unlikely(rerr)) {
+			AuIOErr("failed removing %.*s b%d (%d)\n",
+				AuDLNPair(dentry), bdst, rerr);
+			err = -EIO;
+		}
+	}
+ out_put:
+	au_set_h_dptr(dentry, bdst, NULL);
+	if (au_dbend(dentry) == bdst)
+		au_update_dbend(dentry);
+ out:
+	dput(parent);
+	return err;
+}
+
+int au_cpdown_dirs(struct dentry *dentry, aufs_bindex_t bdst)
+{
+	int err;
+	struct au_cpdown_dir_args args = {
+		.parent	= dget_parent(dentry),
+		.flags	= 0
+	};
+
+	err = au_cp_dirs(dentry, bdst, au_cpdown_dir, &args);
+	dput(args.parent);
+
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* policies for create */
+
+static int au_wbr_bu(struct super_block *sb, aufs_bindex_t bindex)
+{
+	for (; bindex >= 0; bindex--)
+		if (!au_br_rdonly(au_sbr(sb, bindex)))
+			return bindex;
+	return -EROFS;
+}
+
+/* top down parent */
+static int au_wbr_create_tdp(struct dentry *dentry, int isdir __maybe_unused)
+{
+	int err;
+	aufs_bindex_t bstart, bindex;
+	struct super_block *sb;
+	struct dentry *parent, *h_parent;
+
+	sb = dentry->d_sb;
+	bstart = au_dbstart(dentry);
+	err = bstart;
+	if (!au_br_rdonly(au_sbr(sb, bstart)))
+		goto out;
+
+	err = -EROFS;
+	parent = dget_parent(dentry);
+	for (bindex = au_dbstart(parent); bindex < bstart; bindex++) {
+		h_parent = au_h_dptr(parent, bindex);
+		if (!h_parent || !h_parent->d_inode)
+			continue;
+
+		if (!au_br_rdonly(au_sbr(sb, bindex))) {
+			err = bindex;
+			break;
+		}
+	}
+	dput(parent);
+
+	/* bottom up here */
+	if (unlikely(err < 0))
+		err = au_wbr_bu(sb, bstart - 1);
+
+ out:
+	AuDbg("b%d\n", err);
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* an exception for the policy other than tdp */
+static int au_wbr_create_exp(struct dentry *dentry)
+{
+	int err;
+	aufs_bindex_t bwh, bdiropq;
+	struct dentry *parent;
+
+	err = -1;
+	bwh = au_dbwh(dentry);
+	parent = dget_parent(dentry);
+	bdiropq = au_dbdiropq(parent);
+	if (bwh >= 0) {
+		if (bdiropq >= 0)
+			err = min(bdiropq, bwh);
+		else
+			err = bwh;
+		AuDbg("%d\n", err);
+	} else if (bdiropq >= 0) {
+		err = bdiropq;
+		AuDbg("%d\n", err);
+	}
+	dput(parent);
+
+	if (err >= 0 && au_br_rdonly(au_sbr(dentry->d_sb, err)))
+		err = -1;
+
+	AuDbg("%d\n", err);
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* round robin */
+static int au_wbr_create_init_rr(struct super_block *sb)
+{
+	int err;
+
+	err = au_wbr_bu(sb, au_sbend(sb));
+	atomic_set(&au_sbi(sb)->si_wbr_rr_next, -err); /* less important */
+	/* smp_mb(); */
+
+	AuDbg("b%d\n", err);
+	return err;
+}
+
+static int au_wbr_create_rr(struct dentry *dentry, int isdir)
+{
+	int err, nbr;
+	unsigned int u;
+	aufs_bindex_t bindex, bend;
+	struct super_block *sb;
+	atomic_t *next;
+
+	err = au_wbr_create_exp(dentry);
+	if (err >= 0)
+		goto out;
+
+	sb = dentry->d_sb;
+	next = &au_sbi(sb)->si_wbr_rr_next;
+	bend = au_sbend(sb);
+	nbr = bend + 1;
+	for (bindex = 0; bindex <= bend; bindex++) {
+		if (!isdir) {
+			err = atomic_dec_return(next) + 1;
+			/* modulo for 0 is meaningless */
+			if (unlikely(!err))
+				err = atomic_dec_return(next) + 1;
+		} else
+			err = atomic_read(next);
+		AuDbg("%d\n", err);
+		u = err;
+		err = u % nbr;
+		AuDbg("%d\n", err);
+		if (!au_br_rdonly(au_sbr(sb, err)))
+			break;
+		err = -EROFS;
+	}
+
+ out:
+	AuDbg("%d\n", err);
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* most free space */
+static void au_mfs(struct dentry *dentry)
+{
+	struct super_block *sb;
+	struct au_branch *br;
+	struct au_wbr_mfs *mfs;
+	aufs_bindex_t bindex, bend;
+	int err;
+	unsigned long long b, bavail;
+	/* reduce the stack usage */
+	struct kstatfs *st;
+
+	st = kmalloc(sizeof(*st), GFP_NOFS);
+	if (unlikely(!st)) {
+		AuWarn1("failed updating mfs(%d), ignored\n", -ENOMEM);
+		return;
+	}
+
+	bavail = 0;
+	sb = dentry->d_sb;
+	mfs = &au_sbi(sb)->si_wbr_mfs;
+	MtxMustLock(&mfs->mfs_lock);
+	mfs->mfs_bindex = -EROFS;
+	mfs->mfsrr_bytes = 0;
+	bend = au_sbend(sb);
+	for (bindex = 0; bindex <= bend; bindex++) {
+		br = au_sbr(sb, bindex);
+		if (au_br_rdonly(br))
+			continue;
+
+		/* sb->s_root for NFS is unreliable */
+		err = vfs_statfs(br->br_mnt->mnt_root, st);
+		if (unlikely(err)) {
+			AuWarn1("failed statfs, b%d, %d\n", bindex, err);
+			continue;
+		}
+
+		/* when the available size is equal, select the lower one */
+		BUILD_BUG_ON(sizeof(b) < sizeof(st->f_bavail)
+			     || sizeof(b) < sizeof(st->f_bsize));
+		b = st->f_bavail * st->f_bsize;
+		br->br_wbr->wbr_bytes = b;
+		if (b >= bavail) {
+			bavail = b;
+			mfs->mfs_bindex = bindex;
+			mfs->mfs_jiffy = jiffies;
+		}
+	}
+
+	mfs->mfsrr_bytes = bavail;
+	AuDbg("b%d\n", mfs->mfs_bindex);
+	kfree(st);
+}
+
+static int au_wbr_create_mfs(struct dentry *dentry, int isdir __maybe_unused)
+{
+	int err;
+	struct super_block *sb;
+	struct au_wbr_mfs *mfs;
+
+	err = au_wbr_create_exp(dentry);
+	if (err >= 0)
+		goto out;
+
+	sb = dentry->d_sb;
+	mfs = &au_sbi(sb)->si_wbr_mfs;
+	mutex_lock(&mfs->mfs_lock);
+	if (time_after(jiffies, mfs->mfs_jiffy + mfs->mfs_expire)
+	    || mfs->mfs_bindex < 0
+	    || au_br_rdonly(au_sbr(sb, mfs->mfs_bindex)))
+		au_mfs(dentry);
+	mutex_unlock(&mfs->mfs_lock);
+	err = mfs->mfs_bindex;
+
+ out:
+	AuDbg("b%d\n", err);
+	return err;
+}
+
+static int au_wbr_create_init_mfs(struct super_block *sb)
+{
+	struct au_wbr_mfs *mfs;
+
+	mfs = &au_sbi(sb)->si_wbr_mfs;
+	mutex_init(&mfs->mfs_lock);
+	mfs->mfs_jiffy = 0;
+	mfs->mfs_bindex = -EROFS;
+
+	return 0;
+}
+
+static int au_wbr_create_fin_mfs(struct super_block *sb __maybe_unused)
+{
+	mutex_destroy(&au_sbi(sb)->si_wbr_mfs.mfs_lock);
+	return 0;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* most free space and then round robin */
+static int au_wbr_create_mfsrr(struct dentry *dentry, int isdir)
+{
+	int err;
+	struct au_wbr_mfs *mfs;
+
+	err = au_wbr_create_mfs(dentry, isdir);
+	if (err >= 0) {
+		mfs = &au_sbi(dentry->d_sb)->si_wbr_mfs;
+		mutex_lock(&mfs->mfs_lock);
+		if (mfs->mfsrr_bytes < mfs->mfsrr_watermark)
+			err = au_wbr_create_rr(dentry, isdir);
+		mutex_unlock(&mfs->mfs_lock);
+	}
+
+	AuDbg("b%d\n", err);
+	return err;
+}
+
+static int au_wbr_create_init_mfsrr(struct super_block *sb)
+{
+	int err;
+
+	au_wbr_create_init_mfs(sb); /* ignore */
+	err = au_wbr_create_init_rr(sb);
+
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* top down parent and most free space */
+static int au_wbr_create_pmfs(struct dentry *dentry, int isdir)
+{
+	int err, e2;
+	unsigned long long b;
+	aufs_bindex_t bindex, bstart, bend;
+	struct super_block *sb;
+	struct dentry *parent, *h_parent;
+	struct au_branch *br;
+
+	err = au_wbr_create_tdp(dentry, isdir);
+	if (unlikely(err < 0))
+		goto out;
+	parent = dget_parent(dentry);
+	bstart = au_dbstart(parent);
+	bend = au_dbtaildir(parent);
+	if (bstart == bend)
+		goto out_parent; /* success */
+
+	e2 = au_wbr_create_mfs(dentry, isdir);
+	if (e2 < 0)
+		goto out_parent; /* success */
+
+	/* when the available size is equal, select upper one */
+	sb = dentry->d_sb;
+	br = au_sbr(sb, err);
+	b = br->br_wbr->wbr_bytes;
+	AuDbg("b%d, %llu\n", err, b);
+
+	for (bindex = bstart; bindex <= bend; bindex++) {
+		h_parent = au_h_dptr(parent, bindex);
+		if (!h_parent || !h_parent->d_inode)
+			continue;
+
+		br = au_sbr(sb, bindex);
+		if (!au_br_rdonly(br) && br->br_wbr->wbr_bytes > b) {
+			b = br->br_wbr->wbr_bytes;
+			err = bindex;
+			AuDbg("b%d, %llu\n", err, b);
+		}
+	}
+
+ out_parent:
+	dput(parent);
+ out:
+	AuDbg("b%d\n", err);
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* policies for copyup */
+
+/* top down parent */
+static int au_wbr_copyup_tdp(struct dentry *dentry)
+{
+	return au_wbr_create_tdp(dentry, /*isdir, anything is ok*/0);
+}
+
+/* bottom up parent */
+static int au_wbr_copyup_bup(struct dentry *dentry)
+{
+	int err;
+	aufs_bindex_t bindex, bstart;
+	struct dentry *parent, *h_parent;
+	struct super_block *sb;
+
+	err = -EROFS;
+	sb = dentry->d_sb;
+	parent = dget_parent(dentry);
+	bstart = au_dbstart(parent);
+	for (bindex = au_dbstart(dentry); bindex >= bstart; bindex--) {
+		h_parent = au_h_dptr(parent, bindex);
+		if (!h_parent || !h_parent->d_inode)
+			continue;
+
+		if (!au_br_rdonly(au_sbr(sb, bindex))) {
+			err = bindex;
+			break;
+		}
+	}
+	dput(parent);
+
+	/* bottom up here */
+	if (unlikely(err < 0))
+		err = au_wbr_bu(sb, bstart - 1);
+
+	AuDbg("b%d\n", err);
+	return err;
+}
+
+/* bottom up */
+static int au_wbr_copyup_bu(struct dentry *dentry)
+{
+	int err;
+
+	err = au_wbr_bu(dentry->d_sb, au_dbstart(dentry));
+
+	AuDbg("b%d\n", err);
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+struct au_wbr_copyup_operations au_wbr_copyup_ops[] = {
+	[AuWbrCopyup_TDP] = {
+		.copyup	= au_wbr_copyup_tdp
+	},
+	[AuWbrCopyup_BUP] = {
+		.copyup	= au_wbr_copyup_bup
+	},
+	[AuWbrCopyup_BU] = {
+		.copyup	= au_wbr_copyup_bu
+	}
+};
+
+struct au_wbr_create_operations au_wbr_create_ops[] = {
+	[AuWbrCreate_TDP] = {
+		.create	= au_wbr_create_tdp
+	},
+	[AuWbrCreate_RR] = {
+		.create	= au_wbr_create_rr,
+		.init	= au_wbr_create_init_rr
+	},
+	[AuWbrCreate_MFS] = {
+		.create	= au_wbr_create_mfs,
+		.init	= au_wbr_create_init_mfs,
+		.fin	= au_wbr_create_fin_mfs
+	},
+	[AuWbrCreate_MFSV] = {
+		.create	= au_wbr_create_mfs,
+		.init	= au_wbr_create_init_mfs,
+		.fin	= au_wbr_create_fin_mfs
+	},
+	[AuWbrCreate_MFSRR] = {
+		.create	= au_wbr_create_mfsrr,
+		.init	= au_wbr_create_init_mfsrr,
+		.fin	= au_wbr_create_fin_mfs
+	},
+	[AuWbrCreate_MFSRRV] = {
+		.create	= au_wbr_create_mfsrr,
+		.init	= au_wbr_create_init_mfsrr,
+		.fin	= au_wbr_create_fin_mfs
+	},
+	[AuWbrCreate_PMFS] = {
+		.create	= au_wbr_create_pmfs,
+		.init	= au_wbr_create_init_mfs,
+		.fin	= au_wbr_create_fin_mfs
+	},
+	[AuWbrCreate_PMFSV] = {
+		.create	= au_wbr_create_pmfs,
+		.init	= au_wbr_create_init_mfs,
+		.fin	= au_wbr_create_fin_mfs
+	}
+};
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/magic.mk
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/magic.mk
@@ -0,0 +1,48 @@
+
+# defined in ${srctree}/fs/fuse/inode.c
+# tristate
+ifdef CONFIG_FUSE_FS
+ccflags-y += -DFUSE_SUPER_MAGIC=0x65735546
+endif
+
+# defined in ${srctree}/fs/ocfs2/ocfs2_fs.h
+# tristate
+ifdef CONFIG_OCFS2_FS
+ccflags-y += -DOCFS2_SUPER_MAGIC=0x7461636f
+endif
+
+# defined in ${srctree}/fs/ocfs2/dlm/userdlm.h
+# tristate
+ifdef CONFIG_OCFS2_FS_O2CB
+ccflags-y += -DDLMFS_MAGIC=0x76a9f425
+endif
+
+# defined in ${srctree}/fs/cifs/cifsfs.c
+# tristate
+ifdef CONFIG_CIFS_FS
+ccflags-y += -DCIFS_MAGIC_NUMBER=0xFF534D42
+endif
+
+# defined in ${srctree}/fs/xfs/xfs_sb.h
+# tristate
+ifdef CONFIG_XFS_FS
+ccflags-y += -DXFS_SB_MAGIC=0x58465342
+endif
+
+# defined in ${srctree}/fs/configfs/mount.c
+# tristate
+ifdef CONFIG_CONFIGFS_FS
+ccflags-y += -DCONFIGFS_MAGIC=0x62656570
+endif
+
+# defined in ${srctree}/fs/9p/v9fs.h
+# tristate
+ifdef CONFIG_9P_FS
+ccflags-y += -DV9FS_MAGIC=0x01021997
+endif
+
+# defined in ${srctree}/fs/ubifs/ubifs.h
+# tristate
+ifdef CONFIG_UBIFS_FS
+ccflags-y += -DUBIFS_SUPER_MAGIC=0x24051905
+endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/i_op.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/i_op.c
@@ -0,0 +1,886 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * inode operations (except add/del/rename)
+ */
+
+#include <linux/device_cgroup.h>
+#include <linux/fs_stack.h>
+#include <linux/mm.h>
+#include <linux/namei.h>
+#include <linux/security.h>
+#include <linux/uaccess.h>
+#include "aufs.h"
+
+static int h_permission(struct inode *h_inode, int mask,
+			struct vfsmount *h_mnt, int brperm)
+{
+	int err;
+	const unsigned char write_mask = !!(mask & (MAY_WRITE | MAY_APPEND));
+
+	err = -EACCES;
+	if ((write_mask && IS_IMMUTABLE(h_inode))
+	    || ((mask & MAY_EXEC)
+		&& S_ISREG(h_inode->i_mode)
+		&& ((h_mnt->mnt_flags & MNT_NOEXEC)
+		    || !(h_inode->i_mode & S_IXUGO))))
+		goto out;
+
+	/*
+	 * - skip the lower fs test in the case of write to ro branch.
+	 * - nfs dir permission write check is optimized, but a policy for
+	 *   link/rename requires a real check.
+	 */
+	if ((write_mask && !au_br_writable(brperm))
+	    || (au_test_nfs(h_inode->i_sb) && S_ISDIR(h_inode->i_mode)
+		&& write_mask && !(mask & MAY_READ))
+	    || !h_inode->i_op->permission) {
+		/* AuLabel(generic_permission); */
+		err = generic_permission(h_inode, mask, NULL);
+	} else {
+		/* AuLabel(h_inode->permission); */
+		err = h_inode->i_op->permission(h_inode, mask);
+		AuTraceErr(err);
+	}
+
+	if (!err)
+		err = devcgroup_inode_permission(h_inode, mask);
+	if (!err)
+		err = security_inode_permission
+			(h_inode, mask & (MAY_READ | MAY_WRITE | MAY_EXEC
+					  | MAY_APPEND));
+
+#if 0
+	if (!err) {
+		/* todo: do we need to call ima_path_check()? */
+		struct path h_path = {
+			.dentry	=
+			.mnt	= h_mnt
+		};
+		err = ima_path_check(&h_path,
+				     mask & (MAY_READ | MAY_WRITE | MAY_EXEC),
+				     IMA_COUNT_LEAVE);
+	}
+#endif
+
+ out:
+	return err;
+}
+
+static int aufs_permission(struct inode *inode, int mask)
+{
+	int err;
+	aufs_bindex_t bindex, bend;
+	const unsigned char isdir = !!S_ISDIR(inode->i_mode);
+	const unsigned char write_mask = !!(mask & (MAY_WRITE | MAY_APPEND));
+	struct inode *h_inode;
+	struct super_block *sb;
+	struct au_branch *br;
+
+	sb = inode->i_sb;
+	si_read_lock(sb, AuLock_FLUSH);
+	ii_read_lock_child(inode);
+
+	if (!isdir || write_mask) {
+		err = au_busy_or_stale();
+		h_inode = au_h_iptr(inode, au_ibstart(inode));
+		if (unlikely(!h_inode
+			     || (h_inode->i_mode & S_IFMT)
+			     != (inode->i_mode & S_IFMT)))
+			goto out;
+
+		err = 0;
+		bindex = au_ibstart(inode);
+		br = au_sbr(sb, bindex);
+		err = h_permission(h_inode, mask, br->br_mnt, br->br_perm);
+		if (write_mask && !err) {
+			/* test whether the upper writable branch exists */
+			err = -EROFS;
+			for (; bindex >= 0; bindex--)
+				if (!au_br_rdonly(au_sbr(sb, bindex))) {
+					err = 0;
+					break;
+				}
+		}
+		goto out;
+	}
+
+	/* non-write to dir */
+	err = 0;
+	bend = au_ibend(inode);
+	for (bindex = au_ibstart(inode); !err && bindex <= bend; bindex++) {
+		h_inode = au_h_iptr(inode, bindex);
+		if (h_inode) {
+			err = au_busy_or_stale();
+			if (unlikely(!S_ISDIR(h_inode->i_mode)))
+				break;
+
+			br = au_sbr(sb, bindex);
+			err = h_permission(h_inode, mask, br->br_mnt,
+					   br->br_perm);
+		}
+	}
+
+ out:
+	ii_read_unlock(inode);
+	si_read_unlock(sb);
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static struct dentry *aufs_lookup(struct inode *dir, struct dentry *dentry,
+				  struct nameidata *nd)
+{
+	struct dentry *ret, *parent;
+	struct inode *inode, *h_inode;
+	struct mutex *mtx;
+	struct super_block *sb;
+	int err, npositive;
+	aufs_bindex_t bstart;
+
+	IMustLock(dir);
+
+	sb = dir->i_sb;
+	si_read_lock(sb, AuLock_FLUSH);
+	ret = ERR_PTR(-ENAMETOOLONG);
+	if (unlikely(dentry->d_name.len > AUFS_MAX_NAMELEN))
+		goto out;
+	err = au_alloc_dinfo(dentry);
+	ret = ERR_PTR(err);
+	if (unlikely(err))
+		goto out;
+
+	parent = dentry->d_parent; /* dir inode is locked */
+	di_read_lock_parent(parent, AuLock_IR);
+	npositive = au_lkup_dentry(dentry, au_dbstart(parent), /*type*/0, nd);
+	di_read_unlock(parent, AuLock_IR);
+	err = npositive;
+	ret = ERR_PTR(err);
+	if (unlikely(err < 0))
+		goto out_unlock;
+
+	inode = NULL;
+	if (npositive) {
+		bstart = au_dbstart(dentry);
+		h_inode = au_h_dptr(dentry, bstart)->d_inode;
+		if (!S_ISDIR(h_inode->i_mode)) {
+			/*
+			 * stop 'race'-ing between hardlinks under different
+			 * parents.
+			 */
+			mtx = &au_sbr(sb, bstart)->br_xino.xi_nondir_mtx;
+			mutex_lock(mtx);
+			inode = au_new_inode(dentry, /*must_new*/0);
+			mutex_unlock(mtx);
+		} else
+			inode = au_new_inode(dentry, /*must_new*/0);
+		ret = (void *)inode;
+	}
+	if (IS_ERR(inode))
+		goto out_unlock;
+
+	ret = d_splice_alias(inode, dentry);
+	if (unlikely(IS_ERR(ret) && inode))
+		ii_write_unlock(inode);
+
+ out_unlock:
+	di_write_unlock(dentry);
+ out:
+	si_read_unlock(sb);
+	return ret;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int au_wr_dir_cpup(struct dentry *dentry, struct dentry *parent,
+			  const unsigned char add_entry, aufs_bindex_t bcpup,
+			  aufs_bindex_t bstart)
+{
+	int err;
+	struct dentry *h_parent;
+	struct inode *h_dir;
+
+	if (add_entry) {
+		au_update_dbstart(dentry);
+		IMustLock(parent->d_inode);
+	} else
+		di_write_lock_parent(parent);
+
+	err = 0;
+	if (!au_h_dptr(parent, bcpup)) {
+		if (bstart < bcpup)
+			err = au_cpdown_dirs(dentry, bcpup);
+		else
+			err = au_cpup_dirs(dentry, bcpup);
+	}
+	if (!err && add_entry) {
+		h_parent = au_h_dptr(parent, bcpup);
+		h_dir = h_parent->d_inode;
+		mutex_lock_nested(&h_dir->i_mutex, AuLsc_I_PARENT);
+		err = au_lkup_neg(dentry, bcpup);
+		/* todo: no unlock here */
+		mutex_unlock(&h_dir->i_mutex);
+		if (bstart < bcpup && au_dbstart(dentry) < 0) {
+			au_set_dbstart(dentry, 0);
+			au_update_dbrange(dentry, /*do_put_zero*/0);
+		}
+	}
+
+	if (!add_entry)
+		di_write_unlock(parent);
+	if (!err)
+		err = bcpup; /* success */
+
+	return err;
+}
+
+/*
+ * decide the branch and the parent dir where we will create a new entry.
+ * returns new bindex or an error.
+ * copyup the parent dir if needed.
+ */
+int au_wr_dir(struct dentry *dentry, struct dentry *src_dentry,
+	      struct au_wr_dir_args *args)
+{
+	int err;
+	aufs_bindex_t bcpup, bstart, src_bstart;
+	const unsigned char add_entry = !!au_ftest_wrdir(args->flags,
+							 ADD_ENTRY);
+	struct super_block *sb;
+	struct dentry *parent;
+	struct au_sbinfo *sbinfo;
+
+	sb = dentry->d_sb;
+	sbinfo = au_sbi(sb);
+	parent = dget_parent(dentry);
+	bstart = au_dbstart(dentry);
+	bcpup = bstart;
+	if (args->force_btgt < 0) {
+		if (src_dentry) {
+			src_bstart = au_dbstart(src_dentry);
+			if (src_bstart < bstart)
+				bcpup = src_bstart;
+		} else if (add_entry) {
+			err = AuWbrCreate(sbinfo, dentry,
+					  au_ftest_wrdir(args->flags, ISDIR));
+			bcpup = err;
+		}
+
+		if (bcpup < 0 || au_test_ro(sb, bcpup, dentry->d_inode)) {
+			if (add_entry)
+				err = AuWbrCopyup(sbinfo, dentry);
+			else {
+				if (!IS_ROOT(dentry)) {
+					di_read_lock_parent(parent, !AuLock_IR);
+					err = AuWbrCopyup(sbinfo, dentry);
+					di_read_unlock(parent, !AuLock_IR);
+				} else
+					err = AuWbrCopyup(sbinfo, dentry);
+			}
+			bcpup = err;
+			if (unlikely(err < 0))
+				goto out;
+		}
+	} else {
+		bcpup = args->force_btgt;
+		AuDebugOn(au_test_ro(sb, bcpup, dentry->d_inode));
+	}
+	AuDbg("bstart %d, bcpup %d\n", bstart, bcpup);
+	if (bstart < bcpup)
+		au_update_dbrange(dentry, /*do_put_zero*/1);
+
+	err = bcpup;
+	if (bcpup == bstart)
+		goto out; /* success */
+
+	/* copyup the new parent into the branch we process */
+	err = au_wr_dir_cpup(dentry, parent, add_entry, bcpup, bstart);
+
+ out:
+	dput(parent);
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+struct dentry *au_pinned_h_parent(struct au_pin *pin)
+{
+	if (pin && pin->parent)
+		return au_h_dptr(pin->parent, pin->bindex);
+	return NULL;
+}
+
+void au_unpin(struct au_pin *p)
+{
+	if (au_ftest_pin(p->flags, MNT_WRITE))
+		mnt_drop_write(p->h_mnt);
+	if (!p->hdir)
+		return;
+
+	au_hin_imtx_unlock(p->hdir);
+	if (!au_ftest_pin(p->flags, DI_LOCKED))
+		di_read_unlock(p->parent, AuLock_IR);
+	iput(p->hdir->hi_inode);
+	dput(p->parent);
+	p->parent = NULL;
+	p->hdir = NULL;
+	p->h_mnt = NULL;
+}
+
+int au_do_pin(struct au_pin *p)
+{
+	int err;
+	struct super_block *sb;
+	struct dentry *h_dentry, *h_parent;
+	struct au_branch *br;
+	struct inode *h_dir;
+
+	err = 0;
+	sb = p->dentry->d_sb;
+	br = au_sbr(sb, p->bindex);
+	if (IS_ROOT(p->dentry)) {
+		if (au_ftest_pin(p->flags, MNT_WRITE)) {
+			p->h_mnt = br->br_mnt;
+			err = mnt_want_write(p->h_mnt);
+			if (unlikely(err)) {
+				au_fclr_pin(p->flags, MNT_WRITE);
+				goto out_err;
+			}
+		}
+		goto out;
+	}
+
+	h_dentry = NULL;
+	if (p->bindex <= au_dbend(p->dentry))
+		h_dentry = au_h_dptr(p->dentry, p->bindex);
+
+	p->parent = dget_parent(p->dentry);
+	if (!au_ftest_pin(p->flags, DI_LOCKED))
+		di_read_lock(p->parent, AuLock_IR, p->lsc_di);
+
+	h_dir = NULL;
+	h_parent = au_h_dptr(p->parent, p->bindex);
+	p->hdir = au_hi(p->parent->d_inode, p->bindex);
+	if (p->hdir)
+		h_dir = p->hdir->hi_inode;
+
+	/* udba case */
+	if (unlikely(!p->hdir || !h_dir)) {
+		if (!au_ftest_pin(p->flags, DI_LOCKED))
+			di_read_unlock(p->parent, AuLock_IR);
+		dput(p->parent);
+		p->parent = NULL;
+		goto out_err;
+	}
+
+	au_igrab(h_dir);
+	au_hin_imtx_lock_nested(p->hdir, p->lsc_hi);
+
+	if (unlikely(p->hdir->hi_inode != h_parent->d_inode)) {
+		err = -EBUSY;
+		goto out_unpin;
+	}
+	if (h_dentry) {
+		err = au_h_verify(h_dentry, p->udba, h_dir, h_parent, br);
+		if (unlikely(err)) {
+			au_fclr_pin(p->flags, MNT_WRITE);
+			goto out_unpin;
+		}
+	}
+
+	if (au_ftest_pin(p->flags, MNT_WRITE)) {
+		p->h_mnt = br->br_mnt;
+		err = mnt_want_write(p->h_mnt);
+		if (unlikely(err)) {
+			au_fclr_pin(p->flags, MNT_WRITE);
+			goto out_unpin;
+		}
+	}
+	goto out; /* success */
+
+ out_unpin:
+	au_unpin(p);
+ out_err:
+	pr_err("err %d\n", err);
+	err = au_busy_or_stale();
+ out:
+	return err;
+}
+
+void au_pin_init(struct au_pin *p, struct dentry *dentry,
+		 aufs_bindex_t bindex, int lsc_di, int lsc_hi,
+		 unsigned int udba, unsigned char flags)
+{
+	p->dentry = dentry;
+	p->udba = udba;
+	p->lsc_di = lsc_di;
+	p->lsc_hi = lsc_hi;
+	p->flags = flags;
+	p->bindex = bindex;
+
+	p->parent = NULL;
+	p->hdir = NULL;
+	p->h_mnt = NULL;
+}
+
+int au_pin(struct au_pin *pin, struct dentry *dentry, aufs_bindex_t bindex,
+	   unsigned int udba, unsigned char flags)
+{
+	au_pin_init(pin, dentry, bindex, AuLsc_DI_PARENT, AuLsc_I_PARENT2,
+		    udba, flags);
+	return au_do_pin(pin);
+}
+
+/* ---------------------------------------------------------------------- */
+
+#define AuIcpup_DID_CPUP	1
+#define au_ftest_icpup(flags, name)	((flags) & AuIcpup_##name)
+#define au_fset_icpup(flags, name)	{ (flags) |= AuIcpup_##name; }
+#define au_fclr_icpup(flags, name)	{ (flags) &= ~AuIcpup_##name; }
+
+struct au_icpup_args {
+	unsigned char flags;
+	unsigned char pin_flags;
+	aufs_bindex_t btgt;
+	struct au_pin pin;
+	struct path h_path;
+	struct inode *h_inode;
+};
+
+static int au_lock_and_icpup(struct dentry *dentry, struct iattr *ia,
+			     struct au_icpup_args *a)
+{
+	int err;
+	unsigned int udba;
+	loff_t sz;
+	aufs_bindex_t bstart;
+	struct dentry *hi_wh, *parent;
+	struct inode *inode;
+	struct au_wr_dir_args wr_dir_args = {
+		.force_btgt	= -1,
+		.flags		= 0
+	};
+
+	di_write_lock_child(dentry);
+	bstart = au_dbstart(dentry);
+	inode = dentry->d_inode;
+	if (S_ISDIR(inode->i_mode))
+		au_fset_wrdir(wr_dir_args.flags, ISDIR);
+	/* plink or hi_wh() case */
+	if (bstart != au_ibstart(inode))
+		wr_dir_args.force_btgt = au_ibstart(inode);
+	err = au_wr_dir(dentry, /*src_dentry*/NULL, &wr_dir_args);
+	if (unlikely(err < 0))
+		goto out_dentry;
+	a->btgt = err;
+	if (err != bstart)
+		au_fset_icpup(a->flags, DID_CPUP);
+
+	err = 0;
+	a->pin_flags = AuPin_MNT_WRITE;
+	parent = NULL;
+	if (!IS_ROOT(dentry)) {
+		au_fset_pin(a->pin_flags, DI_LOCKED);
+		parent = dget_parent(dentry);
+		di_write_lock_parent(parent);
+	}
+
+	udba = au_opt_udba(dentry->d_sb);
+	if (d_unhashed(dentry) || (ia->ia_valid & ATTR_FILE))
+		udba = AuOpt_UDBA_NONE;
+	err = au_pin(&a->pin, dentry, a->btgt, udba, a->pin_flags);
+	if (unlikely(err)) {
+		if (parent) {
+			di_write_unlock(parent);
+			dput(parent);
+		}
+		goto out_dentry;
+	}
+	a->h_path.dentry = au_h_dptr(dentry, bstart);
+	a->h_inode = a->h_path.dentry->d_inode;
+	mutex_lock_nested(&a->h_inode->i_mutex, AuLsc_I_CHILD);
+	sz = -1;
+	if ((ia->ia_valid & ATTR_SIZE) && ia->ia_size < i_size_read(a->h_inode))
+		sz = ia->ia_size;
+
+	hi_wh = NULL;
+	if (au_ftest_icpup(a->flags, DID_CPUP) && d_unhashed(dentry)) {
+		hi_wh = au_hi_wh(inode, a->btgt);
+		if (!hi_wh) {
+			err = au_sio_cpup_wh(dentry, a->btgt, sz, /*file*/NULL);
+			if (unlikely(err))
+				goto out_unlock;
+			hi_wh = au_hi_wh(inode, a->btgt);
+			/* todo: revalidate hi_wh? */
+		}
+	}
+
+	if (parent) {
+		au_pin_set_parent_lflag(&a->pin, /*lflag*/0);
+		di_downgrade_lock(parent, AuLock_IR);
+		dput(parent);
+	}
+	if (!au_ftest_icpup(a->flags, DID_CPUP))
+		goto out; /* success */
+
+	if (!d_unhashed(dentry)) {
+		err = au_sio_cpup_simple(dentry, a->btgt, sz, AuCpup_DTIME);
+		if (!err)
+			a->h_path.dentry = au_h_dptr(dentry, a->btgt);
+	} else if (!hi_wh)
+		a->h_path.dentry = au_h_dptr(dentry, a->btgt);
+	else
+		a->h_path.dentry = hi_wh; /* do not dget here */
+
+ out_unlock:
+	mutex_unlock(&a->h_inode->i_mutex);
+	a->h_inode = a->h_path.dentry->d_inode;
+	if (!err) {
+		mutex_lock_nested(&a->h_inode->i_mutex, AuLsc_I_CHILD);
+		goto out; /* success */
+	}
+
+	au_unpin(&a->pin);
+
+ out_dentry:
+	di_write_unlock(dentry);
+ out:
+	return err;
+}
+
+static int aufs_setattr(struct dentry *dentry, struct iattr *ia)
+{
+	int err;
+	struct inode *inode;
+	struct super_block *sb;
+	struct file *file;
+	struct au_icpup_args *a;
+
+	err = -ENOMEM;
+	a = kzalloc(sizeof(*a), GFP_NOFS);
+	if (unlikely(!a))
+		goto out;
+
+	inode = dentry->d_inode;
+	IMustLock(inode);
+	sb = dentry->d_sb;
+	si_read_lock(sb, AuLock_FLUSH);
+
+	file = NULL;
+	if (ia->ia_valid & ATTR_FILE) {
+		/* currently ftruncate(2) only */
+		file = ia->ia_file;
+		fi_write_lock(file);
+		ia->ia_file = au_h_fptr(file, au_fbstart(file));
+	}
+
+	if (ia->ia_valid & (ATTR_KILL_SUID | ATTR_KILL_SGID))
+		ia->ia_valid &= ~ATTR_MODE;
+
+	err = au_lock_and_icpup(dentry, ia, a);
+	if (unlikely(err < 0))
+		goto out_si;
+	if (au_ftest_icpup(a->flags, DID_CPUP)) {
+		ia->ia_file = NULL;
+		ia->ia_valid &= ~ATTR_FILE;
+	}
+
+	a->h_path.mnt = au_sbr_mnt(sb, a->btgt);
+	if (ia->ia_valid & ATTR_SIZE) {
+		struct file *f;
+
+		if (ia->ia_size < i_size_read(inode)) {
+			/* unmap only */
+			err = vmtruncate(inode, ia->ia_size);
+			if (unlikely(err))
+				goto out_unlock;
+		}
+
+		f = NULL;
+		if (ia->ia_valid & ATTR_FILE)
+			f = ia->ia_file;
+		mutex_unlock(&a->h_inode->i_mutex);
+		err = vfsub_trunc(&a->h_path, ia->ia_size, ia->ia_valid, f);
+		mutex_lock_nested(&a->h_inode->i_mutex, AuLsc_I_CHILD);
+	} else
+		err = vfsub_notify_change(&a->h_path, ia);
+	if (!err)
+		au_cpup_attr_changeable(inode);
+
+ out_unlock:
+	mutex_unlock(&a->h_inode->i_mutex);
+	au_unpin(&a->pin);
+	di_write_unlock(dentry);
+ out_si:
+	if (file) {
+		fi_write_unlock(file);
+		ia->ia_file = file;
+		ia->ia_valid |= ATTR_FILE;
+	}
+	si_read_unlock(sb);
+	kfree(a);
+ out:
+	return err;
+}
+
+static int au_getattr_lock_reval(struct dentry *dentry, unsigned int sigen)
+{
+	int err;
+	struct inode *inode;
+	struct dentry *parent;
+
+	err = 0;
+	inode = dentry->d_inode;
+	di_write_lock_child(dentry);
+	if (au_digen(dentry) != sigen || au_iigen(inode) != sigen) {
+		parent = dget_parent(dentry);
+		di_read_lock_parent(parent, AuLock_IR);
+		/* returns a number of positive dentries */
+		err = au_refresh_hdentry(dentry, inode->i_mode & S_IFMT);
+		if (err >= 0)
+			err = au_refresh_hinode(inode, dentry);
+		di_read_unlock(parent, AuLock_IR);
+		dput(parent);
+	}
+	di_downgrade_lock(dentry, AuLock_IR);
+	if (unlikely(err))
+		di_read_unlock(dentry, AuLock_IR);
+
+	AuTraceErr(err);
+	return err;
+}
+
+static void au_refresh_iattr(struct inode *inode, struct kstat *st,
+			     unsigned int nlink)
+{
+	inode->i_mode = st->mode;
+	inode->i_uid = st->uid;
+	inode->i_gid = st->gid;
+	inode->i_atime = st->atime;
+	inode->i_mtime = st->mtime;
+	inode->i_ctime = st->ctime;
+
+	au_cpup_attr_nlink(inode, /*force*/0);
+	if (S_ISDIR(inode->i_mode)) {
+		inode->i_nlink -= nlink;
+		inode->i_nlink += st->nlink;
+	}
+
+	spin_lock(&inode->i_lock);
+	inode->i_blocks = st->blocks;
+	i_size_write(inode, st->size);
+	spin_unlock(&inode->i_lock);
+}
+
+static int aufs_getattr(struct vfsmount *mnt __maybe_unused,
+			struct dentry *dentry, struct kstat *st)
+{
+	int err;
+	unsigned int mnt_flags;
+	aufs_bindex_t bindex;
+	unsigned char udba_none, positive;
+	struct super_block *sb, *h_sb;
+	struct inode *inode;
+	struct vfsmount *h_mnt;
+	struct dentry *h_dentry;
+
+	err = 0;
+	sb = dentry->d_sb;
+	inode = dentry->d_inode;
+	si_read_lock(sb, AuLock_FLUSH);
+	mnt_flags = au_mntflags(sb);
+	udba_none = !!au_opt_test(mnt_flags, UDBA_NONE);
+
+	/* support fstat(2) */
+	if (!d_unhashed(dentry) && !udba_none) {
+		unsigned int sigen = au_sigen(sb);
+		if (au_digen(dentry) == sigen && au_iigen(inode) == sigen)
+			di_read_lock_child(dentry, AuLock_IR);
+		else {
+			AuDebugOn(IS_ROOT(dentry));
+			err = au_getattr_lock_reval(dentry, sigen);
+			if (unlikely(err))
+				goto out;
+		}
+	} else
+		di_read_lock_child(dentry, AuLock_IR);
+
+	bindex = au_ibstart(inode);
+	h_mnt = au_sbr_mnt(sb, bindex);
+	h_sb = h_mnt->mnt_sb;
+	if (!au_test_fs_bad_iattr(h_sb) && udba_none)
+		goto out_fill; /* success */
+
+	h_dentry = NULL;
+	if (au_dbstart(dentry) == bindex)
+		h_dentry = dget(au_h_dptr(dentry, bindex));
+	else if (au_opt_test(mnt_flags, PLINK) && au_plink_test(inode)) {
+		h_dentry = au_plink_lkup(inode, bindex);
+		if (IS_ERR(h_dentry))
+			goto out_fill; /* pretending success */
+	}
+	/* illegally overlapped or something */
+	if (unlikely(!h_dentry))
+		goto out_fill; /* pretending success */
+
+	positive = !!h_dentry->d_inode;
+	if (positive)
+		err = vfs_getattr(h_mnt, h_dentry, st);
+	dput(h_dentry);
+	if (!err) {
+		if (positive)
+			au_refresh_iattr(inode, st, h_dentry->d_inode->i_nlink);
+		goto out_fill; /* success */
+	}
+	goto out_unlock;
+
+ out_fill:
+	generic_fillattr(inode, st);
+ out_unlock:
+	di_read_unlock(dentry, AuLock_IR);
+ out:
+	si_read_unlock(sb);
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int h_readlink(struct dentry *dentry, int bindex, char __user *buf,
+		      int bufsiz)
+{
+	int err;
+	struct super_block *sb;
+	struct dentry *h_dentry;
+
+	err = -EINVAL;
+	h_dentry = au_h_dptr(dentry, bindex);
+	if (unlikely(/* !h_dentry
+		     || !h_dentry->d_inode
+		     || !h_dentry->d_inode->i_op
+		     || */ !h_dentry->d_inode->i_op->readlink))
+		goto out;
+
+	err = security_inode_readlink(h_dentry);
+	if (unlikely(err))
+		goto out;
+
+	sb = dentry->d_sb;
+	if (!au_test_ro(sb, bindex, dentry->d_inode)) {
+		vfsub_touch_atime(au_sbr_mnt(sb, bindex), h_dentry);
+		fsstack_copy_attr_atime(dentry->d_inode, h_dentry->d_inode);
+	}
+	err = h_dentry->d_inode->i_op->readlink(h_dentry, buf, bufsiz);
+
+ out:
+	return err;
+}
+
+static int aufs_readlink(struct dentry *dentry, char __user *buf, int bufsiz)
+{
+	int err;
+
+	aufs_read_lock(dentry, AuLock_IR);
+	err = h_readlink(dentry, au_dbstart(dentry), buf, bufsiz);
+	aufs_read_unlock(dentry, AuLock_IR);
+
+	return err;
+}
+
+static void *aufs_follow_link(struct dentry *dentry, struct nameidata *nd)
+{
+	int err;
+	char *buf;
+	mm_segment_t old_fs;
+
+	err = -ENOMEM;
+	buf = __getname();
+	if (unlikely(!buf))
+		goto out;
+
+	aufs_read_lock(dentry, AuLock_IR);
+	old_fs = get_fs();
+	set_fs(KERNEL_DS);
+	err = h_readlink(dentry, au_dbstart(dentry), (char __user *)buf,
+			 PATH_MAX);
+	set_fs(old_fs);
+	aufs_read_unlock(dentry, AuLock_IR);
+
+	if (err >= 0) {
+		buf[err] = 0;
+		/* will be freed by put_link */
+		nd_set_link(nd, buf);
+		return NULL; /* success */
+	}
+	__putname(buf);
+
+ out:
+	path_put(&nd->path);
+	AuTraceErr(err);
+	return ERR_PTR(err);
+}
+
+static void aufs_put_link(struct dentry *dentry __maybe_unused,
+			  struct nameidata *nd, void *cookie __maybe_unused)
+{
+	__putname(nd_get_link(nd));
+}
+
+/* ---------------------------------------------------------------------- */
+
+static void aufs_truncate_range(struct inode *inode __maybe_unused,
+				loff_t start __maybe_unused,
+				loff_t end __maybe_unused)
+{
+	AuUnsupport();
+}
+
+/* ---------------------------------------------------------------------- */
+
+struct inode_operations aufs_symlink_iop = {
+	.permission	= aufs_permission,
+	.setattr	= aufs_setattr,
+	.getattr	= aufs_getattr,
+	.readlink	= aufs_readlink,
+	.follow_link	= aufs_follow_link,
+	.put_link	= aufs_put_link
+};
+
+struct inode_operations aufs_dir_iop = {
+	.create		= aufs_create,
+	.lookup		= aufs_lookup,
+	.link		= aufs_link,
+	.unlink		= aufs_unlink,
+	.symlink	= aufs_symlink,
+	.mkdir		= aufs_mkdir,
+	.rmdir		= aufs_rmdir,
+	.mknod		= aufs_mknod,
+	.rename		= aufs_rename,
+
+	.permission	= aufs_permission,
+	.setattr	= aufs_setattr,
+	.getattr	= aufs_getattr
+};
+
+struct inode_operations aufs_iop = {
+	.permission	= aufs_permission,
+	.setattr	= aufs_setattr,
+	.getattr	= aufs_getattr,
+	.truncate_range	= aufs_truncate_range
+};
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/wkq.h
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/wkq.h
@@ -0,0 +1,82 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * workqueue for asynchronous/super-io operations
+ * todo: try new credentials management scheme
+ */
+
+#ifndef __AUFS_WKQ_H__
+#define __AUFS_WKQ_H__
+
+#ifdef __KERNEL__
+
+#include <linux/sched.h>
+#include <linux/wait.h>
+#include <linux/aufs_type.h>
+
+struct super_block;
+
+/* ---------------------------------------------------------------------- */
+
+/*
+ * in the next operation, wait for the 'nowait' tasks in system-wide workqueue
+ */
+struct au_nowait_tasks {
+	atomic_t		nw_len;
+	wait_queue_head_t	nw_wq;
+};
+
+/* ---------------------------------------------------------------------- */
+
+typedef void (*au_wkq_func_t)(void *args);
+
+/* wkq flags */
+#define AuWkq_WAIT	1
+#define au_ftest_wkq(flags, name)	((flags) & AuWkq_##name)
+#define au_fset_wkq(flags, name)	{ (flags) |= AuWkq_##name; }
+#define au_fclr_wkq(flags, name)	{ (flags) &= ~AuWkq_##name; }
+
+/* wkq.c */
+int au_wkq_wait(au_wkq_func_t func, void *args);
+int au_wkq_nowait(au_wkq_func_t func, void *args, struct super_block *sb);
+void au_nwt_init(struct au_nowait_tasks *nwt);
+int __init au_wkq_init(void);
+void au_wkq_fin(void);
+
+/* ---------------------------------------------------------------------- */
+
+static inline int au_test_wkq(struct task_struct *tsk)
+{
+	return !tsk->mm && !strcmp(tsk->comm, AUFS_WKQ_NAME);
+}
+
+static inline void au_nwt_done(struct au_nowait_tasks *nwt)
+{
+	if (!atomic_dec_return(&nwt->nw_len))
+		wake_up_all(&nwt->nw_wq);
+}
+
+static inline int au_nwt_flush(struct au_nowait_tasks *nwt)
+{
+	wait_event(nwt->nw_wq, !atomic_read(&nwt->nw_len));
+	return 0;
+}
+
+#endif /* __KERNEL__ */
+#endif /* __AUFS_WKQ_H__ */
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/whout.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/whout.c
@@ -0,0 +1,1055 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * whiteout for logical deletion and opaque directory
+ */
+
+#include <linux/fs.h>
+#include "aufs.h"
+
+#define WH_MASK			S_IRUGO
+
+/*
+ * If a directory contains this file, then it is opaque.  We start with the
+ * .wh. flag so that it is blocked by lookup.
+ */
+static struct qstr diropq_name = {
+	.name = AUFS_WH_DIROPQ,
+	.len = sizeof(AUFS_WH_DIROPQ) - 1
+};
+
+/*
+ * generate whiteout name, which is NOT terminated by NULL.
+ * @name: original d_name.name
+ * @len: original d_name.len
+ * @wh: whiteout qstr
+ * returns zero when succeeds, otherwise error.
+ * succeeded value as wh->name should be freed by kfree().
+ */
+int au_wh_name_alloc(struct qstr *wh, const struct qstr *name)
+{
+	char *p;
+
+	if (unlikely(name->len > PATH_MAX - AUFS_WH_PFX_LEN))
+		return -ENAMETOOLONG;
+
+	wh->len = name->len + AUFS_WH_PFX_LEN;
+	p = kmalloc(wh->len, GFP_NOFS);
+	wh->name = p;
+	if (p) {
+		memcpy(p, AUFS_WH_PFX, AUFS_WH_PFX_LEN);
+		memcpy(p + AUFS_WH_PFX_LEN, name->name, name->len);
+		/* smp_mb(); */
+		return 0;
+	}
+	return -ENOMEM;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/*
+ * test if the @wh_name exists under @h_parent.
+ * @try_sio specifies the necessary of super-io.
+ */
+int au_wh_test(struct dentry *h_parent, struct qstr *wh_name,
+	       struct au_branch *br, int try_sio)
+{
+	int err;
+	struct dentry *wh_dentry;
+	struct inode *h_dir;
+
+	h_dir = h_parent->d_inode;
+	if (!try_sio)
+		wh_dentry = au_lkup_one(wh_name, h_parent, br, /*nd*/NULL);
+	else
+		wh_dentry = au_sio_lkup_one(wh_name, h_parent, br);
+	err = PTR_ERR(wh_dentry);
+	if (IS_ERR(wh_dentry))
+		goto out;
+
+	err = 0;
+	if (!wh_dentry->d_inode)
+		goto out_wh; /* success */
+
+	err = 1;
+	if (S_ISREG(wh_dentry->d_inode->i_mode))
+		goto out_wh; /* success */
+
+	err = -EIO;
+	AuIOErr("%.*s Invalid whiteout entry type 0%o.\n",
+		AuDLNPair(wh_dentry), wh_dentry->d_inode->i_mode);
+
+ out_wh:
+	dput(wh_dentry);
+ out:
+	return err;
+}
+
+/*
+ * test if the @h_dentry sets opaque or not.
+ */
+int au_diropq_test(struct dentry *h_dentry, struct au_branch *br)
+{
+	int err;
+	struct inode *h_dir;
+
+	h_dir = h_dentry->d_inode;
+	err = au_wh_test(h_dentry, &diropq_name, br,
+			 au_test_h_perm_sio(h_dir, MAY_EXEC));
+	return err;
+}
+
+/*
+ * returns a negative dentry whose name is unique and temporary.
+ */
+struct dentry *au_whtmp_lkup(struct dentry *h_parent, struct au_branch *br,
+			     struct qstr *prefix)
+{
+	struct dentry *dentry;
+	int i;
+	char defname[NAME_MAX - AUFS_MAX_NAMELEN + DNAME_INLINE_LEN_MIN + 1],
+		*name, *p;
+	static unsigned short cnt;
+	struct qstr qs;
+
+	BUILD_BUG_ON(sizeof(cnt) * 2 > AUFS_WH_TMP_LEN);
+
+	name = defname;
+	qs.len = sizeof(defname) - DNAME_INLINE_LEN_MIN + prefix->len - 1;
+	if (unlikely(prefix->len > DNAME_INLINE_LEN_MIN)) {
+		dentry = ERR_PTR(-ENAMETOOLONG);
+		if (unlikely(qs.len > NAME_MAX))
+			goto out;
+		dentry = ERR_PTR(-ENOMEM);
+		name = kmalloc(qs.len + 1, GFP_NOFS);
+		if (unlikely(!name))
+			goto out;
+	}
+
+	/* doubly whiteout-ed */
+	memcpy(name, AUFS_WH_PFX AUFS_WH_PFX, AUFS_WH_PFX_LEN * 2);
+	p = name + AUFS_WH_PFX_LEN * 2;
+	memcpy(p, prefix->name, prefix->len);
+	p += prefix->len;
+	*p++ = '.';
+	AuDebugOn(name + qs.len + 1 - p <= AUFS_WH_TMP_LEN);
+
+	qs.name = name;
+	for (i = 0; i < 3; i++) {
+		sprintf(p, "%.*d", AUFS_WH_TMP_LEN, cnt++);
+		dentry = au_sio_lkup_one(&qs, h_parent, br);
+		if (IS_ERR(dentry) || !dentry->d_inode)
+			goto out_name;
+		dput(dentry);
+	}
+	/* pr_warning("could not get random name\n"); */
+	dentry = ERR_PTR(-EEXIST);
+	AuDbg("%.*s\n", AuLNPair(&qs));
+	BUG();
+
+ out_name:
+	if (name != defname)
+		kfree(name);
+ out:
+	AuTraceErrPtr(dentry);
+	return dentry;
+}
+
+/*
+ * rename the @h_dentry on @br to the whiteouted temporary name.
+ */
+int au_whtmp_ren(struct dentry *h_dentry, struct au_branch *br)
+{
+	int err;
+	struct path h_path = {
+		.mnt = br->br_mnt
+	};
+	struct inode *h_dir;
+	struct dentry *h_parent;
+
+	h_parent = h_dentry->d_parent; /* dir inode is locked */
+	h_dir = h_parent->d_inode;
+	IMustLock(h_dir);
+
+	h_path.dentry = au_whtmp_lkup(h_parent, br, &h_dentry->d_name);
+	err = PTR_ERR(h_path.dentry);
+	if (IS_ERR(h_path.dentry))
+		goto out;
+
+	/* under the same dir, no need to lock_rename() */
+	err = vfsub_rename(h_dir, h_dentry, h_dir, &h_path);
+	AuTraceErr(err);
+	dput(h_path.dentry);
+
+ out:
+	AuTraceErr(err);
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+/*
+ * functions for removing a whiteout
+ */
+
+static int do_unlink_wh(struct inode *h_dir, struct path *h_path)
+{
+	int force;
+
+	/*
+	 * forces superio when the dir has a sticky bit.
+	 * this may be a violation of unix fs semantics.
+	 */
+	force = (h_dir->i_mode & S_ISVTX)
+		&& h_path->dentry->d_inode->i_uid != current_fsuid();
+	return vfsub_unlink(h_dir, h_path, force);
+}
+
+int au_wh_unlink_dentry(struct inode *h_dir, struct path *h_path,
+			struct dentry *dentry)
+{
+	int err;
+
+	err = do_unlink_wh(h_dir, h_path);
+	if (!err && dentry)
+		au_set_dbwh(dentry, -1);
+
+	return err;
+}
+
+static int unlink_wh_name(struct dentry *h_parent, struct qstr *wh,
+			  struct au_branch *br)
+{
+	int err;
+	struct path h_path = {
+		.mnt = br->br_mnt
+	};
+
+	err = 0;
+	h_path.dentry = au_lkup_one(wh, h_parent, br, /*nd*/NULL);
+	if (IS_ERR(h_path.dentry))
+		err = PTR_ERR(h_path.dentry);
+	else {
+		if (h_path.dentry->d_inode
+		    && S_ISREG(h_path.dentry->d_inode->i_mode))
+			err = do_unlink_wh(h_parent->d_inode, &h_path);
+		dput(h_path.dentry);
+	}
+
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+/*
+ * initialize/clean whiteout for a branch
+ */
+
+static void au_wh_clean(struct inode *h_dir, struct path *whpath,
+			const int isdir)
+{
+	int err;
+
+	if (!whpath->dentry->d_inode)
+		return;
+
+	err = mnt_want_write(whpath->mnt);
+	if (!err) {
+		if (isdir)
+			err = vfsub_rmdir(h_dir, whpath);
+		else
+			err = vfsub_unlink(h_dir, whpath, /*force*/0);
+		mnt_drop_write(whpath->mnt);
+	}
+	if (unlikely(err))
+		pr_warning("failed removing %.*s (%d), ignored.\n",
+			   AuDLNPair(whpath->dentry), err);
+}
+
+static int test_linkable(struct dentry *h_root)
+{
+	struct inode *h_dir = h_root->d_inode;
+
+	if (h_dir->i_op->link)
+		return 0;
+
+	pr_err("%.*s (%s) doesn't support link(2), use noplink and rw+nolwh\n",
+	       AuDLNPair(h_root), au_sbtype(h_root->d_sb));
+	return -ENOSYS;
+}
+
+/* todo: should this mkdir be done in /sbin/mount.aufs helper? */
+static int au_whdir(struct inode *h_dir, struct path *path)
+{
+	int err;
+
+	err = -EEXIST;
+	if (!path->dentry->d_inode) {
+		int mode = S_IRWXU;
+
+		if (au_test_nfs(path->dentry->d_sb))
+			mode |= S_IXUGO;
+		err = mnt_want_write(path->mnt);
+		if (!err) {
+			err = vfsub_mkdir(h_dir, path, mode);
+			mnt_drop_write(path->mnt);
+		}
+	} else if (S_ISDIR(path->dentry->d_inode->i_mode))
+		err = 0;
+	else
+		pr_err("unknown %.*s exists\n", AuDLNPair(path->dentry));
+
+	return err;
+}
+
+struct au_wh_base {
+	const struct qstr *name;
+	struct dentry *dentry;
+};
+
+static void au_wh_init_ro(struct inode *h_dir, struct au_wh_base base[],
+			  struct path *h_path)
+{
+	h_path->dentry = base[AuBrWh_BASE].dentry;
+	au_wh_clean(h_dir, h_path, /*isdir*/0);
+	h_path->dentry = base[AuBrWh_PLINK].dentry;
+	au_wh_clean(h_dir, h_path, /*isdir*/1);
+	h_path->dentry = base[AuBrWh_ORPH].dentry;
+	au_wh_clean(h_dir, h_path, /*isdir*/1);
+}
+
+/*
+ * returns tri-state,
+ * minus: error, caller should print the mesage
+ * zero: succuess
+ * plus: error, caller should NOT print the mesage
+ */
+static int au_wh_init_rw_nolink(struct dentry *h_root, struct au_wbr *wbr,
+				int do_plink, struct au_wh_base base[],
+				struct path *h_path)
+{
+	int err;
+	struct inode *h_dir;
+
+	h_dir = h_root->d_inode;
+	h_path->dentry = base[AuBrWh_BASE].dentry;
+	au_wh_clean(h_dir, h_path, /*isdir*/0);
+	h_path->dentry = base[AuBrWh_PLINK].dentry;
+	if (do_plink) {
+		err = test_linkable(h_root);
+		if (unlikely(err)) {
+			err = 1;
+			goto out;
+		}
+
+		err = au_whdir(h_dir, h_path);
+		if (unlikely(err))
+			goto out;
+		wbr->wbr_plink = dget(base[AuBrWh_PLINK].dentry);
+	} else
+		au_wh_clean(h_dir, h_path, /*isdir*/1);
+	h_path->dentry = base[AuBrWh_ORPH].dentry;
+	err = au_whdir(h_dir, h_path);
+	if (unlikely(err))
+		goto out;
+	wbr->wbr_orph = dget(base[AuBrWh_ORPH].dentry);
+
+ out:
+	return err;
+}
+
+/*
+ * for the moment, aufs supports the branch filesystem which does not support
+ * link(2). testing on FAT which does not support i_op->setattr() fully either,
+ * copyup failed. finally, such filesystem will not be used as the writable
+ * branch.
+ *
+ * returns tri-state, see above.
+ */
+static int au_wh_init_rw(struct dentry *h_root, struct au_wbr *wbr,
+			 int do_plink, struct au_wh_base base[],
+			 struct path *h_path)
+{
+	int err;
+	struct inode *h_dir;
+
+	WbrWhMustWriteLock(wbr);
+
+	err = test_linkable(h_root);
+	if (unlikely(err)) {
+		err = 1;
+		goto out;
+	}
+
+	/*
+	 * todo: should this create be done in /sbin/mount.aufs helper?
+	 */
+	err = -EEXIST;
+	h_dir = h_root->d_inode;
+	if (!base[AuBrWh_BASE].dentry->d_inode) {
+		err = mnt_want_write(h_path->mnt);
+		if (!err) {
+			h_path->dentry = base[AuBrWh_BASE].dentry;
+			err = vfsub_create(h_dir, h_path, WH_MASK);
+			mnt_drop_write(h_path->mnt);
+		}
+	} else if (S_ISREG(base[AuBrWh_BASE].dentry->d_inode->i_mode))
+		err = 0;
+	else
+		pr_err("unknown %.*s/%.*s exists\n",
+		       AuDLNPair(h_root), AuDLNPair(base[AuBrWh_BASE].dentry));
+	if (unlikely(err))
+		goto out;
+
+	h_path->dentry = base[AuBrWh_PLINK].dentry;
+	if (do_plink) {
+		err = au_whdir(h_dir, h_path);
+		if (unlikely(err))
+			goto out;
+		wbr->wbr_plink = dget(base[AuBrWh_PLINK].dentry);
+	} else
+		au_wh_clean(h_dir, h_path, /*isdir*/1);
+	wbr->wbr_whbase = dget(base[AuBrWh_BASE].dentry);
+
+	h_path->dentry = base[AuBrWh_ORPH].dentry;
+	err = au_whdir(h_dir, h_path);
+	if (unlikely(err))
+		goto out;
+	wbr->wbr_orph = dget(base[AuBrWh_ORPH].dentry);
+
+ out:
+	return err;
+}
+
+/*
+ * initialize the whiteout base file/dir for @br.
+ */
+int au_wh_init(struct dentry *h_root, struct au_branch *br,
+	       struct super_block *sb)
+{
+	int err, i;
+	const unsigned char do_plink
+		= !!au_opt_test(au_mntflags(sb), PLINK);
+	struct path path = {
+		.mnt = br->br_mnt
+	};
+	struct inode *h_dir;
+	struct au_wbr *wbr = br->br_wbr;
+	static const struct qstr base_name[] = {
+		[AuBrWh_BASE] = {
+			.name	= AUFS_BASE_NAME,
+			.len	= sizeof(AUFS_BASE_NAME) - 1
+		},
+		[AuBrWh_PLINK] = {
+			.name	= AUFS_PLINKDIR_NAME,
+			.len	= sizeof(AUFS_PLINKDIR_NAME) - 1
+		},
+		[AuBrWh_ORPH] = {
+			.name	= AUFS_ORPHDIR_NAME,
+			.len	= sizeof(AUFS_ORPHDIR_NAME) - 1
+		}
+	};
+	struct au_wh_base base[] = {
+		[AuBrWh_BASE] = {
+			.name	= base_name + AuBrWh_BASE,
+			.dentry	= NULL
+		},
+		[AuBrWh_PLINK] = {
+			.name	= base_name + AuBrWh_PLINK,
+			.dentry	= NULL
+		},
+		[AuBrWh_ORPH] = {
+			.name	= base_name + AuBrWh_ORPH,
+			.dentry	= NULL
+		}
+	};
+
+	if (wbr)
+		WbrWhMustWriteLock(wbr);
+
+	h_dir = h_root->d_inode;
+	for (i = 0; i < AuBrWh_Last; i++) {
+		/* doubly whiteouted */
+		struct dentry *d;
+
+		d = au_wh_lkup(h_root, (void *)base[i].name, br);
+		err = PTR_ERR(d);
+		if (IS_ERR(d))
+			goto out;
+
+		base[i].dentry = d;
+		AuDebugOn(wbr
+			  && wbr->wbr_wh[i]
+			  && wbr->wbr_wh[i] != base[i].dentry);
+	}
+
+	if (wbr)
+		for (i = 0; i < AuBrWh_Last; i++) {
+			dput(wbr->wbr_wh[i]);
+			wbr->wbr_wh[i] = NULL;
+		}
+
+	err = 0;
+
+	switch (br->br_perm) {
+	case AuBrPerm_RO:
+	case AuBrPerm_ROWH:
+	case AuBrPerm_RR:
+	case AuBrPerm_RRWH:
+		au_wh_init_ro(h_dir, base, &path);
+		break;
+
+	case AuBrPerm_RWNoLinkWH:
+		err = au_wh_init_rw_nolink(h_root, wbr, do_plink, base, &path);
+		if (err > 0)
+			goto out;
+		else if (err)
+			goto out_err;
+		break;
+
+	case AuBrPerm_RW:
+		err = au_wh_init_rw(h_root, wbr, do_plink, base, &path);
+		if (err > 0)
+			goto out;
+		else if (err)
+			goto out_err;
+		break;
+
+	default:
+		BUG();
+	}
+	goto out; /* success */
+
+ out_err:
+	pr_err("an error(%d) on the writable branch %.*s(%s)\n",
+	       err, AuDLNPair(h_root), au_sbtype(h_root->d_sb));
+ out:
+	for (i = 0; i < AuBrWh_Last; i++)
+		dput(base[i].dentry);
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+/*
+ * whiteouts are all hard-linked usually.
+ * when its link count reaches a ceiling, we create a new whiteout base
+ * asynchronously.
+ */
+
+struct reinit_br_wh {
+	struct super_block *sb;
+	struct au_branch *br;
+};
+
+static void reinit_br_wh(void *arg)
+{
+	int err;
+	aufs_bindex_t bindex;
+	struct path h_path;
+	struct reinit_br_wh *a = arg;
+	struct au_wbr *wbr;
+	struct inode *dir;
+	struct dentry *h_root;
+	struct au_hinode *hdir;
+
+	err = 0;
+	wbr = a->br->br_wbr;
+	/* big aufs lock */
+	si_noflush_write_lock(a->sb);
+	if (!au_br_writable(a->br->br_perm))
+		goto out;
+	bindex = au_br_index(a->sb, a->br->br_id);
+	if (unlikely(bindex < 0))
+		goto out;
+
+	di_read_lock_parent(a->sb->s_root, AuLock_IR);
+	dir = a->sb->s_root->d_inode;
+	hdir = au_hi(dir, bindex);
+	h_root = au_h_dptr(a->sb->s_root, bindex);
+
+	au_hin_imtx_lock_nested(hdir, AuLsc_I_PARENT);
+	wbr_wh_write_lock(wbr);
+	err = au_h_verify(wbr->wbr_whbase, au_opt_udba(a->sb), hdir->hi_inode,
+			  h_root, a->br);
+	if (!err) {
+		err = mnt_want_write(a->br->br_mnt);
+		if (!err) {
+			h_path.dentry = wbr->wbr_whbase;
+			h_path.mnt = a->br->br_mnt;
+			err = vfsub_unlink(hdir->hi_inode, &h_path, /*force*/0);
+			mnt_drop_write(a->br->br_mnt);
+		}
+	} else {
+		pr_warning("%.*s is moved, ignored\n",
+			   AuDLNPair(wbr->wbr_whbase));
+		err = 0;
+	}
+	dput(wbr->wbr_whbase);
+	wbr->wbr_whbase = NULL;
+	if (!err)
+		err = au_wh_init(h_root, a->br, a->sb);
+	wbr_wh_write_unlock(wbr);
+	au_hin_imtx_unlock(hdir);
+	di_read_unlock(a->sb->s_root, AuLock_IR);
+
+ out:
+	if (wbr)
+		atomic_dec(&wbr->wbr_wh_running);
+	atomic_dec(&a->br->br_count);
+	au_nwt_done(&au_sbi(a->sb)->si_nowait);
+	si_write_unlock(a->sb);
+	kfree(arg);
+	if (unlikely(err))
+		AuIOErr("err %d\n", err);
+}
+
+static void kick_reinit_br_wh(struct super_block *sb, struct au_branch *br)
+{
+	int do_dec, wkq_err;
+	struct reinit_br_wh *arg;
+
+	do_dec = 1;
+	if (atomic_inc_return(&br->br_wbr->wbr_wh_running) != 1)
+		goto out;
+
+	/* ignore ENOMEM */
+	arg = kmalloc(sizeof(*arg), GFP_NOFS);
+	if (arg) {
+		/*
+		 * dec(wh_running), kfree(arg) and dec(br_count)
+		 * in reinit function
+		 */
+		arg->sb = sb;
+		arg->br = br;
+		atomic_inc(&br->br_count);
+		wkq_err = au_wkq_nowait(reinit_br_wh, arg, sb);
+		if (unlikely(wkq_err)) {
+			atomic_dec(&br->br_wbr->wbr_wh_running);
+			atomic_dec(&br->br_count);
+			kfree(arg);
+		}
+		do_dec = 0;
+	}
+
+ out:
+	if (do_dec)
+		atomic_dec(&br->br_wbr->wbr_wh_running);
+}
+
+/* ---------------------------------------------------------------------- */
+
+/*
+ * create the whiteout @wh.
+ */
+static int link_or_create_wh(struct super_block *sb, aufs_bindex_t bindex,
+			     struct dentry *wh)
+{
+	int err;
+	struct path h_path = {
+		.dentry = wh
+	};
+	struct au_branch *br;
+	struct au_wbr *wbr;
+	struct dentry *h_parent;
+	struct inode *h_dir;
+
+	h_parent = wh->d_parent; /* dir inode is locked */
+	h_dir = h_parent->d_inode;
+	IMustLock(h_dir);
+
+	br = au_sbr(sb, bindex);
+	h_path.mnt = br->br_mnt;
+	wbr = br->br_wbr;
+	wbr_wh_read_lock(wbr);
+	if (wbr->wbr_whbase) {
+		err = vfsub_link(wbr->wbr_whbase, h_dir, &h_path);
+		if (!err || err != -EMLINK)
+			goto out;
+
+		/* link count full. re-initialize br_whbase. */
+		kick_reinit_br_wh(sb, br);
+	}
+
+	/* return this error in this context */
+	err = vfsub_create(h_dir, &h_path, WH_MASK);
+
+ out:
+	wbr_wh_read_unlock(wbr);
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/*
+ * create or remove the diropq.
+ */
+static struct dentry *do_diropq(struct dentry *dentry, aufs_bindex_t bindex,
+				unsigned int flags)
+{
+	struct dentry *opq_dentry, *h_dentry;
+	struct super_block *sb;
+	struct au_branch *br;
+	int err;
+
+	sb = dentry->d_sb;
+	br = au_sbr(sb, bindex);
+	h_dentry = au_h_dptr(dentry, bindex);
+	opq_dentry = au_lkup_one(&diropq_name, h_dentry, br, /*nd*/NULL);
+	if (IS_ERR(opq_dentry))
+		goto out;
+
+	if (au_ftest_diropq(flags, CREATE)) {
+		err = link_or_create_wh(sb, bindex, opq_dentry);
+		if (!err) {
+			au_set_dbdiropq(dentry, bindex);
+			goto out; /* success */
+		}
+	} else {
+		struct path tmp = {
+			.dentry = opq_dentry,
+			.mnt	= br->br_mnt
+		};
+		err = do_unlink_wh(au_h_iptr(dentry->d_inode, bindex), &tmp);
+		if (!err)
+			au_set_dbdiropq(dentry, -1);
+	}
+	dput(opq_dentry);
+	opq_dentry = ERR_PTR(err);
+
+ out:
+	return opq_dentry;
+}
+
+struct do_diropq_args {
+	struct dentry **errp;
+	struct dentry *dentry;
+	aufs_bindex_t bindex;
+	unsigned int flags;
+};
+
+static void call_do_diropq(void *args)
+{
+	struct do_diropq_args *a = args;
+	*a->errp = do_diropq(a->dentry, a->bindex, a->flags);
+}
+
+struct dentry *au_diropq_sio(struct dentry *dentry, aufs_bindex_t bindex,
+			     unsigned int flags)
+{
+	struct dentry *diropq, *h_dentry;
+
+	h_dentry = au_h_dptr(dentry, bindex);
+	if (!au_test_h_perm_sio(h_dentry->d_inode, MAY_EXEC | MAY_WRITE))
+		diropq = do_diropq(dentry, bindex, flags);
+	else {
+		int wkq_err;
+		struct do_diropq_args args = {
+			.errp		= &diropq,
+			.dentry		= dentry,
+			.bindex		= bindex,
+			.flags		= flags
+		};
+
+		wkq_err = au_wkq_wait(call_do_diropq, &args);
+		if (unlikely(wkq_err))
+			diropq = ERR_PTR(wkq_err);
+	}
+
+	return diropq;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/*
+ * lookup whiteout dentry.
+ * @h_parent: lower parent dentry which must exist and be locked
+ * @base_name: name of dentry which will be whiteouted
+ * returns dentry for whiteout.
+ */
+struct dentry *au_wh_lkup(struct dentry *h_parent, struct qstr *base_name,
+			  struct au_branch *br)
+{
+	int err;
+	struct qstr wh_name;
+	struct dentry *wh_dentry;
+
+	err = au_wh_name_alloc(&wh_name, base_name);
+	wh_dentry = ERR_PTR(err);
+	if (!err) {
+		wh_dentry = au_lkup_one(&wh_name, h_parent, br, /*nd*/NULL);
+		kfree(wh_name.name);
+	}
+	return wh_dentry;
+}
+
+/*
+ * link/create a whiteout for @dentry on @bindex.
+ */
+struct dentry *au_wh_create(struct dentry *dentry, aufs_bindex_t bindex,
+			    struct dentry *h_parent)
+{
+	struct dentry *wh_dentry;
+	struct super_block *sb;
+	int err;
+
+	sb = dentry->d_sb;
+	wh_dentry = au_wh_lkup(h_parent, &dentry->d_name, au_sbr(sb, bindex));
+	if (!IS_ERR(wh_dentry) && !wh_dentry->d_inode) {
+		err = link_or_create_wh(sb, bindex, wh_dentry);
+		if (!err)
+			au_set_dbwh(dentry, bindex);
+		else {
+			dput(wh_dentry);
+			wh_dentry = ERR_PTR(err);
+		}
+	}
+
+	return wh_dentry;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* Delete all whiteouts in this directory on branch bindex. */
+static int del_wh_children(struct dentry *h_dentry, struct au_nhash *whlist,
+			   aufs_bindex_t bindex, struct au_branch *br)
+{
+	int err;
+	unsigned long ul, n;
+	struct qstr wh_name;
+	char *p;
+	struct hlist_head *head;
+	struct au_vdir_wh *tpos;
+	struct hlist_node *pos;
+	struct au_vdir_destr *str;
+
+	err = -ENOMEM;
+	p = __getname();
+	wh_name.name = p;
+	if (unlikely(!wh_name.name))
+		goto out;
+
+	err = 0;
+	memcpy(p, AUFS_WH_PFX, AUFS_WH_PFX_LEN);
+	p += AUFS_WH_PFX_LEN;
+	n = whlist->nh_num;
+	head = whlist->nh_head;
+	for (ul = 0; !err && ul < n; ul++, head++) {
+		hlist_for_each_entry(tpos, pos, head, wh_hash) {
+			if (tpos->wh_bindex != bindex)
+				continue;
+
+			str = &tpos->wh_str;
+			if (str->len + AUFS_WH_PFX_LEN <= PATH_MAX) {
+				memcpy(p, str->name, str->len);
+				wh_name.len = AUFS_WH_PFX_LEN + str->len;
+				err = unlink_wh_name(h_dentry, &wh_name, br);
+				if (!err)
+					continue;
+				break;
+			}
+			AuIOErr("whiteout name too long %.*s\n",
+				str->len, str->name);
+			err = -EIO;
+			break;
+		}
+	}
+	__putname(wh_name.name);
+
+ out:
+	return err;
+}
+
+struct del_wh_children_args {
+	int *errp;
+	struct dentry *h_dentry;
+	struct au_nhash *whlist;
+	aufs_bindex_t bindex;
+	struct au_branch *br;
+};
+
+static void call_del_wh_children(void *args)
+{
+	struct del_wh_children_args *a = args;
+	*a->errp = del_wh_children(a->h_dentry, a->whlist, a->bindex, a->br);
+}
+
+/* ---------------------------------------------------------------------- */
+
+struct au_whtmp_rmdir *au_whtmp_rmdir_alloc(struct super_block *sb, gfp_t gfp)
+{
+	struct au_whtmp_rmdir *whtmp;
+	int err;
+	unsigned int rdhash;
+
+	SiMustAnyLock(sb);
+
+	whtmp = kmalloc(sizeof(*whtmp), gfp);
+	if (unlikely(!whtmp)) {
+		whtmp = ERR_PTR(-ENOMEM);
+		goto out;
+	}
+
+	whtmp->dir = NULL;
+	whtmp->wh_dentry = NULL;
+	/* no estimation for dir size */
+	rdhash = au_sbi(sb)->si_rdhash;
+	if (!rdhash)
+		rdhash = AUFS_RDHASH_DEF;
+	err = au_nhash_alloc(&whtmp->whlist, rdhash, gfp);
+	if (unlikely(err)) {
+		kfree(whtmp);
+		whtmp = ERR_PTR(err);
+	}
+
+ out:
+	return whtmp;
+}
+
+void au_whtmp_rmdir_free(struct au_whtmp_rmdir *whtmp)
+{
+	dput(whtmp->wh_dentry);
+	iput(whtmp->dir);
+	au_nhash_wh_free(&whtmp->whlist);
+	kfree(whtmp);
+}
+
+/*
+ * rmdir the whiteouted temporary named dir @h_dentry.
+ * @whlist: whiteouted children.
+ */
+int au_whtmp_rmdir(struct inode *dir, aufs_bindex_t bindex,
+		   struct dentry *wh_dentry, struct au_nhash *whlist)
+{
+	int err;
+	struct path h_tmp;
+	struct inode *wh_inode, *h_dir;
+	struct au_branch *br;
+
+	h_dir = wh_dentry->d_parent->d_inode; /* dir inode is locked */
+	IMustLock(h_dir);
+
+	br = au_sbr(dir->i_sb, bindex);
+	wh_inode = wh_dentry->d_inode;
+	mutex_lock_nested(&wh_inode->i_mutex, AuLsc_I_CHILD);
+
+	/*
+	 * someone else might change some whiteouts while we were sleeping.
+	 * it means this whlist may have an obsoleted entry.
+	 */
+	if (!au_test_h_perm_sio(wh_inode, MAY_EXEC | MAY_WRITE))
+		err = del_wh_children(wh_dentry, whlist, bindex, br);
+	else {
+		int wkq_err;
+		struct del_wh_children_args args = {
+			.errp		= &err,
+			.h_dentry	= wh_dentry,
+			.whlist		= whlist,
+			.bindex		= bindex,
+			.br		= br
+		};
+
+		wkq_err = au_wkq_wait(call_del_wh_children, &args);
+		if (unlikely(wkq_err))
+			err = wkq_err;
+	}
+	mutex_unlock(&wh_inode->i_mutex);
+
+	if (!err) {
+		h_tmp.dentry = wh_dentry;
+		h_tmp.mnt = br->br_mnt;
+		err = vfsub_rmdir(h_dir, &h_tmp);
+		/* d_drop(h_dentry); */
+	}
+
+	if (!err) {
+		if (au_ibstart(dir) == bindex) {
+			au_cpup_attr_timesizes(dir);
+			drop_nlink(dir);
+		}
+		return 0; /* success */
+	}
+
+	pr_warning("failed removing %.*s(%d), ignored\n",
+		   AuDLNPair(wh_dentry), err);
+	return err;
+}
+
+static void call_rmdir_whtmp(void *args)
+{
+	int err;
+	struct au_whtmp_rmdir *a = args;
+	struct super_block *sb;
+	struct dentry *h_parent;
+	struct inode *h_dir;
+	struct au_branch *br;
+	struct au_hinode *hdir;
+
+	/* rmdir by nfsd may cause deadlock with this i_mutex */
+	/* mutex_lock(&a->dir->i_mutex); */
+	sb = a->dir->i_sb;
+	si_noflush_read_lock(sb);
+	err = au_test_ro(sb, a->bindex, NULL);
+	if (unlikely(err))
+		goto out;
+
+	err = -EIO;
+	br = au_sbr(sb, a->bindex);
+	ii_write_lock_parent(a->dir);
+	h_parent = dget_parent(a->wh_dentry);
+	h_dir = h_parent->d_inode;
+	hdir = au_hi(a->dir, a->bindex);
+	au_hin_imtx_lock_nested(hdir, AuLsc_I_PARENT);
+	err = au_h_verify(a->wh_dentry, au_opt_udba(sb), h_dir, h_parent, br);
+	if (!err) {
+		err = mnt_want_write(br->br_mnt);
+		if (!err) {
+			err = au_whtmp_rmdir(a->dir, a->bindex, a->wh_dentry,
+					     &a->whlist);
+			mnt_drop_write(br->br_mnt);
+		}
+	}
+	au_hin_imtx_unlock(hdir);
+	dput(h_parent);
+	ii_write_unlock(a->dir);
+
+ out:
+	/* mutex_unlock(&a->dir->i_mutex); */
+	au_nwt_done(&au_sbi(sb)->si_nowait);
+	si_read_unlock(sb);
+	au_whtmp_rmdir_free(a);
+	if (unlikely(err))
+		AuIOErr("err %d\n", err);
+}
+
+void au_whtmp_kick_rmdir(struct inode *dir, aufs_bindex_t bindex,
+			 struct dentry *wh_dentry, struct au_whtmp_rmdir *args)
+{
+	int wkq_err;
+
+	IMustLock(dir);
+
+	/* all post-process will be done in do_rmdir_whtmp(). */
+	args->dir = au_igrab(dir);
+	args->bindex = bindex;
+	args->wh_dentry = dget(wh_dentry);
+	wkq_err = au_wkq_nowait(call_rmdir_whtmp, args, dir->i_sb);
+	if (unlikely(wkq_err)) {
+		pr_warning("rmdir error %.*s (%d), ignored\n",
+			   AuDLNPair(wh_dentry), wkq_err);
+		au_whtmp_rmdir_free(args);
+	}
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/i_op_del.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/i_op_del.c
@@ -0,0 +1,470 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * inode operations (del entry)
+ */
+
+#include "aufs.h"
+
+/*
+ * decide if a new whiteout for @dentry is necessary or not.
+ * when it is necessary, prepare the parent dir for the upper branch whose
+ * branch index is @bcpup for creation. the actual creation of the whiteout will
+ * be done by caller.
+ * return value:
+ * 0: wh is unnecessary
+ * plus: wh is necessary
+ * minus: error
+ */
+int au_wr_dir_need_wh(struct dentry *dentry, int isdir, aufs_bindex_t *bcpup)
+{
+	int need_wh, err;
+	aufs_bindex_t bstart;
+	struct super_block *sb;
+
+	sb = dentry->d_sb;
+	bstart = au_dbstart(dentry);
+	if (*bcpup < 0) {
+		*bcpup = bstart;
+		if (au_test_ro(sb, bstart, dentry->d_inode)) {
+			err = AuWbrCopyup(au_sbi(sb), dentry);
+			*bcpup = err;
+			if (unlikely(err < 0))
+				goto out;
+		}
+	} else
+		AuDebugOn(bstart < *bcpup
+			  || au_test_ro(sb, *bcpup, dentry->d_inode));
+	AuDbg("bcpup %d, bstart %d\n", *bcpup, bstart);
+
+	if (*bcpup != bstart) {
+		err = au_cpup_dirs(dentry, *bcpup);
+		if (unlikely(err))
+			goto out;
+		need_wh = 1;
+	} else {
+		aufs_bindex_t old_bend, new_bend, bdiropq = -1;
+
+		old_bend = au_dbend(dentry);
+		if (isdir) {
+			bdiropq = au_dbdiropq(dentry);
+			au_set_dbdiropq(dentry, -1);
+		}
+		need_wh = au_lkup_dentry(dentry, bstart + 1, /*type*/0,
+					 /*nd*/NULL);
+		err = need_wh;
+		if (isdir)
+			au_set_dbdiropq(dentry, bdiropq);
+		if (unlikely(err < 0))
+			goto out;
+		new_bend = au_dbend(dentry);
+		if (!need_wh && old_bend != new_bend) {
+			au_set_h_dptr(dentry, new_bend, NULL);
+			au_set_dbend(dentry, old_bend);
+		}
+	}
+	AuDbg("need_wh %d\n", need_wh);
+	err = need_wh;
+
+ out:
+	return err;
+}
+
+/*
+ * simple tests for the del-entry operations.
+ * following the checks in vfs, plus the parent-child relationship.
+ */
+int au_may_del(struct dentry *dentry, aufs_bindex_t bindex,
+	       struct dentry *h_parent, int isdir)
+{
+	int err;
+	umode_t h_mode;
+	struct dentry *h_dentry, *h_latest;
+	struct inode *h_inode;
+
+	h_dentry = au_h_dptr(dentry, bindex);
+	h_inode = h_dentry->d_inode;
+	if (dentry->d_inode) {
+		err = -ENOENT;
+		if (unlikely(!h_inode || !h_inode->i_nlink))
+			goto out;
+
+		h_mode = h_inode->i_mode;
+		if (!isdir) {
+			err = -EISDIR;
+			if (unlikely(S_ISDIR(h_mode)))
+				goto out;
+		} else if (unlikely(!S_ISDIR(h_mode))) {
+			err = -ENOTDIR;
+			goto out;
+		}
+	} else {
+		/* rename(2) case */
+		err = -EIO;
+		if (unlikely(h_inode))
+			goto out;
+	}
+
+	err = -ENOENT;
+	/* expected parent dir is locked */
+	if (unlikely(h_parent != h_dentry->d_parent))
+		goto out;
+	err = 0;
+
+	/*
+	 * rmdir a dir may break the consistency on some filesystem.
+	 * let's try heavy test.
+	 */
+	err = -EACCES;
+	if (unlikely(au_test_h_perm(h_parent->d_inode, MAY_EXEC | MAY_WRITE)))
+		goto out;
+
+	h_latest = au_sio_lkup_one(&dentry->d_name, h_parent,
+				   au_sbr(dentry->d_sb, bindex));
+	err = -EIO;
+	if (IS_ERR(h_latest))
+		goto out;
+	if (h_latest == h_dentry)
+		err = 0;
+	dput(h_latest);
+
+ out:
+	return err;
+}
+
+/*
+ * decide the branch where we operate for @dentry. the branch index will be set
+ * @rbcpup. after diciding it, 'pin' it and store the timestamps of the parent
+ * dir for reverting.
+ * when a new whiteout is necessary, create it.
+ */
+static struct dentry*
+lock_hdir_create_wh(struct dentry *dentry, int isdir, aufs_bindex_t *rbcpup,
+		    struct au_dtime *dt, struct au_pin *pin)
+{
+	struct dentry *wh_dentry;
+	struct super_block *sb;
+	struct path h_path;
+	int err, need_wh;
+	unsigned int udba;
+	aufs_bindex_t bcpup;
+
+	need_wh = au_wr_dir_need_wh(dentry, isdir, rbcpup);
+	wh_dentry = ERR_PTR(need_wh);
+	if (unlikely(need_wh < 0))
+		goto out;
+
+	sb = dentry->d_sb;
+	udba = au_opt_udba(sb);
+	bcpup = *rbcpup;
+	err = au_pin(pin, dentry, bcpup, udba,
+		     AuPin_DI_LOCKED | AuPin_MNT_WRITE);
+	wh_dentry = ERR_PTR(err);
+	if (unlikely(err))
+		goto out;
+
+	h_path.dentry = au_pinned_h_parent(pin);
+	if (udba != AuOpt_UDBA_NONE
+	    && au_dbstart(dentry) == bcpup) {
+		err = au_may_del(dentry, bcpup, h_path.dentry, isdir);
+		wh_dentry = ERR_PTR(err);
+		if (unlikely(err))
+			goto out_unpin;
+	}
+
+	h_path.mnt = au_sbr_mnt(sb, bcpup);
+	au_dtime_store(dt, au_pinned_parent(pin), &h_path);
+	wh_dentry = NULL;
+	if (!need_wh)
+		goto out; /* success, no need to create whiteout */
+
+	wh_dentry = au_wh_create(dentry, bcpup, h_path.dentry);
+	if (!IS_ERR(wh_dentry))
+		goto out; /* success */
+	/* returns with the parent is locked and wh_dentry is dget-ed */
+
+ out_unpin:
+	au_unpin(pin);
+ out:
+	return wh_dentry;
+}
+
+/*
+ * when removing a dir, rename it to a unique temporary whiteout-ed name first
+ * in order to be revertible and save time for removing many child whiteouts
+ * under the dir.
+ * returns 1 when there are too many child whiteout and caller should remove
+ * them asynchronously. returns 0 when the number of children is enough small to
+ * remove now or the branch fs is a remote fs.
+ * otherwise return an error.
+ */
+static int renwh_and_rmdir(struct dentry *dentry, aufs_bindex_t bindex,
+			   struct au_nhash *whlist, struct inode *dir)
+{
+	int rmdir_later, err, dirwh;
+	struct dentry *h_dentry;
+	struct super_block *sb;
+
+	sb = dentry->d_sb;
+	SiMustAnyLock(sb);
+	h_dentry = au_h_dptr(dentry, bindex);
+	err = au_whtmp_ren(h_dentry, au_sbr(sb, bindex));
+	if (unlikely(err))
+		goto out;
+
+	/* stop monitoring */
+	au_hin_free(au_hi(dentry->d_inode, bindex));
+
+	if (!au_test_fs_remote(h_dentry->d_sb)) {
+		dirwh = au_sbi(sb)->si_dirwh;
+		rmdir_later = (dirwh <= 1);
+		if (!rmdir_later)
+			rmdir_later = au_nhash_test_longer_wh(whlist, bindex,
+							      dirwh);
+		if (rmdir_later)
+			return rmdir_later;
+	}
+
+	err = au_whtmp_rmdir(dir, bindex, h_dentry, whlist);
+	if (unlikely(err)) {
+		AuIOErr("rmdir %.*s, b%d failed, %d. ignored\n",
+			AuDLNPair(h_dentry), bindex, err);
+		err = 0;
+	}
+
+ out:
+	AuTraceErr(err);
+	return err;
+}
+
+/*
+ * final procedure for deleting a entry.
+ * maintain dentry and iattr.
+ */
+static void epilog(struct inode *dir, struct dentry *dentry,
+		   aufs_bindex_t bindex)
+{
+	struct inode *inode;
+
+	inode = dentry->d_inode;
+	d_drop(dentry);
+	inode->i_ctime = dir->i_ctime;
+
+	if (atomic_read(&dentry->d_count) == 1) {
+		au_set_h_dptr(dentry, au_dbstart(dentry), NULL);
+		au_update_dbstart(dentry);
+	}
+	if (au_ibstart(dir) == bindex)
+		au_cpup_attr_timesizes(dir);
+	dir->i_version++;
+}
+
+/*
+ * when an error happened, remove the created whiteout and revert everything.
+ */
+static int do_revert(int err, struct inode *dir, aufs_bindex_t bwh,
+		     struct dentry *wh_dentry, struct dentry *dentry,
+		     struct au_dtime *dt)
+{
+	int rerr;
+	struct path h_path = {
+		.dentry	= wh_dentry,
+		.mnt	= au_sbr_mnt(dir->i_sb, bwh)
+	};
+
+	rerr = au_wh_unlink_dentry(au_h_iptr(dir, bwh), &h_path, dentry);
+	if (!rerr) {
+		au_set_dbwh(dentry, bwh);
+		au_dtime_revert(dt);
+		return 0;
+	}
+
+	AuIOErr("%.*s reverting whiteout failed(%d, %d)\n",
+		AuDLNPair(dentry), err, rerr);
+	return -EIO;
+}
+
+/* ---------------------------------------------------------------------- */
+
+int aufs_unlink(struct inode *dir, struct dentry *dentry)
+{
+	int err;
+	aufs_bindex_t bwh, bindex, bstart;
+	struct au_dtime dt;
+	struct au_pin pin;
+	struct path h_path;
+	struct inode *inode, *h_dir;
+	struct dentry *parent, *wh_dentry;
+
+	IMustLock(dir);
+	inode = dentry->d_inode;
+	if (unlikely(!inode))
+		return -ENOENT; /* possible? */
+	IMustLock(inode);
+
+	aufs_read_lock(dentry, AuLock_DW);
+	parent = dentry->d_parent; /* dir inode is locked */
+	di_write_lock_parent(parent);
+
+	bstart = au_dbstart(dentry);
+	bwh = au_dbwh(dentry);
+	bindex = -1;
+	wh_dentry = lock_hdir_create_wh(dentry, /*isdir*/0, &bindex, &dt, &pin);
+	err = PTR_ERR(wh_dentry);
+	if (IS_ERR(wh_dentry))
+		goto out;
+
+	h_path.mnt = au_sbr_mnt(dentry->d_sb, bstart);
+	h_path.dentry = au_h_dptr(dentry, bstart);
+	dget(h_path.dentry);
+	if (bindex == bstart) {
+		h_dir = au_pinned_h_dir(&pin);
+		err = vfsub_unlink(h_dir, &h_path, /*force*/0);
+	} else {
+		/* dir inode is locked */
+		h_dir = wh_dentry->d_parent->d_inode;
+		IMustLock(h_dir);
+		err = 0;
+	}
+
+	if (!err) {
+		drop_nlink(inode);
+		epilog(dir, dentry, bindex);
+
+		/* update target timestamps */
+		if (bindex == bstart) {
+			vfsub_update_h_iattr(&h_path, /*did*/NULL); /*ignore*/
+			inode->i_ctime = h_path.dentry->d_inode->i_ctime;
+		} else
+			/* todo: this timestamp may be reverted later */
+			inode->i_ctime = h_dir->i_ctime;
+		goto out_unlock; /* success */
+	}
+
+	/* revert */
+	if (wh_dentry) {
+		int rerr;
+
+		rerr = do_revert(err, dir, bwh, wh_dentry, dentry, &dt);
+		if (rerr)
+			err = rerr;
+	}
+
+ out_unlock:
+	au_unpin(&pin);
+	dput(wh_dentry);
+	dput(h_path.dentry);
+ out:
+	di_write_unlock(parent);
+	aufs_read_unlock(dentry, AuLock_DW);
+	return err;
+}
+
+int aufs_rmdir(struct inode *dir, struct dentry *dentry)
+{
+	int err, rmdir_later;
+	aufs_bindex_t bwh, bindex, bstart;
+	struct au_dtime dt;
+	struct au_pin pin;
+	struct inode *inode;
+	struct dentry *parent, *wh_dentry, *h_dentry;
+	struct au_whtmp_rmdir *args;
+
+	IMustLock(dir);
+	inode = dentry->d_inode;
+	err = -ENOENT; /* possible? */
+	if (unlikely(!inode))
+		goto out;
+	IMustLock(inode);
+
+	aufs_read_lock(dentry, AuLock_DW | AuLock_FLUSH);
+	err = -ENOMEM;
+	args = au_whtmp_rmdir_alloc(dir->i_sb, GFP_NOFS);
+	if (unlikely(!args))
+		goto out_unlock;
+
+	parent = dentry->d_parent; /* dir inode is locked */
+	di_write_lock_parent(parent);
+	err = au_test_empty(dentry, &args->whlist);
+	if (unlikely(err))
+		goto out_args;
+
+	bstart = au_dbstart(dentry);
+	bwh = au_dbwh(dentry);
+	bindex = -1;
+	wh_dentry = lock_hdir_create_wh(dentry, /*isdir*/1, &bindex, &dt, &pin);
+	err = PTR_ERR(wh_dentry);
+	if (IS_ERR(wh_dentry))
+		goto out_args;
+
+	h_dentry = au_h_dptr(dentry, bstart);
+	dget(h_dentry);
+	rmdir_later = 0;
+	if (bindex == bstart) {
+		err = renwh_and_rmdir(dentry, bstart, &args->whlist, dir);
+		if (err > 0) {
+			rmdir_later = err;
+			err = 0;
+		}
+	} else {
+		/* stop monitoring */
+		au_hin_free(au_hi(inode, bstart));
+
+		/* dir inode is locked */
+		IMustLock(wh_dentry->d_parent->d_inode);
+		err = 0;
+	}
+
+	if (!err) {
+		clear_nlink(inode);
+		au_set_dbdiropq(dentry, -1);
+		epilog(dir, dentry, bindex);
+
+		if (rmdir_later) {
+			au_whtmp_kick_rmdir(dir, bstart, h_dentry, args);
+			args = NULL;
+		}
+
+		goto out_unpin; /* success */
+	}
+
+	/* revert */
+	AuLabel(revert);
+	if (wh_dentry) {
+		int rerr;
+
+		rerr = do_revert(err, dir, bwh, wh_dentry, dentry, &dt);
+		if (rerr)
+			err = rerr;
+	}
+
+ out_unpin:
+	au_unpin(&pin);
+	dput(wh_dentry);
+	dput(h_dentry);
+ out_args:
+	di_write_unlock(parent);
+	if (args)
+		au_whtmp_rmdir_free(args);
+ out_unlock:
+	aufs_read_unlock(dentry, AuLock_DW);
+ out:
+	AuTraceErr(err);
+	return err;
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/hinotify.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/hinotify.c
@@ -0,0 +1,755 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * inotify for the lower directories
+ */
+
+#include "aufs.h"
+
+static const __u32 AuHinMask = (IN_MOVE | IN_DELETE | IN_CREATE);
+static struct inotify_handle *au_hin_handle;
+
+AuCacheFuncs(hinotify, HINOTIFY);
+
+int au_hin_alloc(struct au_hinode *hinode, struct inode *inode,
+		 struct inode *h_inode)
+{
+	int err;
+	struct au_hinotify *hin;
+	s32 wd;
+
+	err = -ENOMEM;
+	hin = au_cache_alloc_hinotify();
+	if (hin) {
+		AuDebugOn(hinode->hi_notify);
+		hinode->hi_notify = hin;
+		hin->hin_aufs_inode = inode;
+
+		inotify_init_watch(&hin->hin_watch);
+		wd = inotify_add_watch(au_hin_handle, &hin->hin_watch, h_inode,
+				       AuHinMask);
+		if (wd >= 0)
+			return 0; /* success */
+
+		err = wd;
+		put_inotify_watch(&hin->hin_watch);
+		au_cache_free_hinotify(hin);
+		hinode->hi_notify = NULL;
+	}
+
+	return err;
+}
+
+void au_hin_free(struct au_hinode *hinode)
+{
+	int err;
+	struct au_hinotify *hin;
+
+	hin = hinode->hi_notify;
+	if (hin) {
+		err = 0;
+		if (atomic_read(&hin->hin_watch.count))
+			err = inotify_rm_watch(au_hin_handle, &hin->hin_watch);
+		if (unlikely(err))
+			/* it means the watch is already removed */
+			pr_warning("failed inotify_rm_watch() %d\n", err);
+		au_cache_free_hinotify(hin);
+		hinode->hi_notify = NULL;
+	}
+}
+
+/* ---------------------------------------------------------------------- */
+
+void au_hin_ctl(struct au_hinode *hinode, int do_set)
+{
+	struct inode *h_inode;
+	struct inotify_watch *watch;
+
+	if (!hinode->hi_notify)
+		return;
+
+	h_inode = hinode->hi_inode;
+	IMustLock(h_inode);
+
+	/* todo: try inotify_find_update_watch()? */
+	watch = &hinode->hi_notify->hin_watch;
+	mutex_lock(&h_inode->inotify_mutex);
+	/* mutex_lock(&watch->ih->mutex); */
+	if (do_set) {
+		AuDebugOn(watch->mask & AuHinMask);
+		watch->mask |= AuHinMask;
+	} else {
+		AuDebugOn(!(watch->mask & AuHinMask));
+		watch->mask &= ~AuHinMask;
+	}
+	/* mutex_unlock(&watch->ih->mutex); */
+	mutex_unlock(&h_inode->inotify_mutex);
+}
+
+void au_reset_hinotify(struct inode *inode, unsigned int flags)
+{
+	aufs_bindex_t bindex, bend;
+	struct inode *hi;
+	struct dentry *iwhdentry;
+
+	bend = au_ibend(inode);
+	for (bindex = au_ibstart(inode); bindex <= bend; bindex++) {
+		hi = au_h_iptr(inode, bindex);
+		if (!hi)
+			continue;
+
+		/* mutex_lock_nested(&hi->i_mutex, AuLsc_I_CHILD); */
+		iwhdentry = au_hi_wh(inode, bindex);
+		if (iwhdentry)
+			dget(iwhdentry);
+		au_igrab(hi);
+		au_set_h_iptr(inode, bindex, NULL, 0);
+		au_set_h_iptr(inode, bindex, au_igrab(hi),
+			      flags & ~AuHi_XINO);
+		iput(hi);
+		dput(iwhdentry);
+		/* mutex_unlock(&hi->i_mutex); */
+	}
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int hin_xino(struct inode *inode, struct inode *h_inode)
+{
+	int err;
+	aufs_bindex_t bindex, bend, bfound, bstart;
+	struct inode *h_i;
+
+	err = 0;
+	if (unlikely(inode->i_ino == AUFS_ROOT_INO)) {
+		pr_warning("branch root dir was changed\n");
+		goto out;
+	}
+
+	bfound = -1;
+	bend = au_ibend(inode);
+	bstart = au_ibstart(inode);
+#if 0 /* reserved for future use */
+	if (bindex == bend) {
+		/* keep this ino in rename case */
+		goto out;
+	}
+#endif
+	for (bindex = bstart; bindex <= bend; bindex++) {
+		if (au_h_iptr(inode, bindex) == h_inode) {
+			bfound = bindex;
+			break;
+		}
+	}
+	if (bfound < 0)
+		goto out;
+
+	for (bindex = bstart; bindex <= bend; bindex++) {
+		h_i = au_h_iptr(inode, bindex);
+		if (!h_i)
+			continue;
+
+		err = au_xino_write(inode->i_sb, bindex, h_i->i_ino, /*ino*/0);
+		/* ignore this error */
+		/* bad action? */
+	}
+
+	/* children inode number will be broken */
+
+ out:
+	AuTraceErr(err);
+	return err;
+}
+
+static int hin_gen_tree(struct dentry *dentry)
+{
+	int err, i, j, ndentry;
+	struct au_dcsub_pages dpages;
+	struct au_dpage *dpage;
+	struct dentry **dentries;
+
+	err = au_dpages_init(&dpages, GFP_NOFS);
+	if (unlikely(err))
+		goto out;
+	err = au_dcsub_pages(&dpages, dentry, NULL, NULL);
+	if (unlikely(err))
+		goto out_dpages;
+
+	for (i = 0; i < dpages.ndpage; i++) {
+		dpage = dpages.dpages + i;
+		dentries = dpage->dentries;
+		ndentry = dpage->ndentry;
+		for (j = 0; j < ndentry; j++) {
+			struct dentry *d;
+
+			d = dentries[j];
+			if (IS_ROOT(d))
+				continue;
+
+			d_drop(d);
+			au_digen_dec(d);
+			if (d->d_inode)
+				/* todo: reset children xino?
+				   cached children only? */
+				au_iigen_dec(d->d_inode);
+		}
+	}
+
+ out_dpages:
+	au_dpages_free(&dpages);
+
+	/* discard children */
+	dentry_unhash(dentry);
+	dput(dentry);
+ out:
+	return err;
+}
+
+/*
+ * return 0 if processed.
+ */
+static int hin_gen_by_inode(char *name, unsigned int nlen, struct inode *inode,
+			    const unsigned int isdir)
+{
+	int err;
+	struct dentry *d;
+	struct qstr *dname;
+
+	err = 1;
+	if (unlikely(inode->i_ino == AUFS_ROOT_INO)) {
+		pr_warning("branch root dir was changed\n");
+		err = 0;
+		goto out;
+	}
+
+	if (!isdir) {
+		AuDebugOn(!name);
+		au_iigen_dec(inode);
+		spin_lock(&dcache_lock);
+		list_for_each_entry(d, &inode->i_dentry, d_alias) {
+			dname = &d->d_name;
+			if (dname->len != nlen
+			    && memcmp(dname->name, name, nlen))
+				continue;
+			err = 0;
+			spin_lock(&d->d_lock);
+			__d_drop(d);
+			au_digen_dec(d);
+			spin_unlock(&d->d_lock);
+			break;
+		}
+		spin_unlock(&dcache_lock);
+	} else {
+		au_fset_si(au_sbi(inode->i_sb), FAILED_REFRESH_DIRS);
+		d = d_find_alias(inode);
+		if (!d) {
+			au_iigen_dec(inode);
+			goto out;
+		}
+
+		dname = &d->d_name;
+		if (dname->len == nlen && !memcmp(dname->name, name, nlen))
+			err = hin_gen_tree(d);
+		dput(d);
+	}
+
+ out:
+	AuTraceErr(err);
+	return err;
+}
+
+static int hin_gen_by_name(struct dentry *dentry, const unsigned int isdir)
+{
+	int err;
+	struct inode *inode;
+
+	inode = dentry->d_inode;
+	if (IS_ROOT(dentry)
+	    /* || (inode && inode->i_ino == AUFS_ROOT_INO) */
+		) {
+		pr_warning("branch root dir was changed\n");
+		return 0;
+	}
+
+	err = 0;
+	if (!isdir) {
+		d_drop(dentry);
+		au_digen_dec(dentry);
+		if (inode)
+			au_iigen_dec(inode);
+	} else {
+		au_fset_si(au_sbi(dentry->d_sb), FAILED_REFRESH_DIRS);
+		if (inode)
+			err = hin_gen_tree(dentry);
+	}
+
+	AuTraceErr(err);
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* hinotify job flags */
+#define AuHinJob_XINO0		1
+#define AuHinJob_GEN		(1 << 1)
+#define AuHinJob_DIRENT		(1 << 2)
+#define AuHinJob_ISDIR		(1 << 3)
+#define AuHinJob_TRYXINO0	(1 << 4)
+#define AuHinJob_MNTPNT		(1 << 5)
+#define au_ftest_hinjob(flags, name)	((flags) & AuHinJob_##name)
+#define au_fset_hinjob(flags, name)	{ (flags) |= AuHinJob_##name; }
+#define au_fclr_hinjob(flags, name)	{ (flags) &= ~AuHinJob_##name; }
+
+struct hin_job_args {
+	unsigned int flags;
+	struct inode *inode, *h_inode, *dir, *h_dir;
+	struct dentry *dentry;
+	char *h_name;
+	int h_nlen;
+};
+
+static int hin_job(struct hin_job_args *a)
+{
+	const unsigned int isdir = au_ftest_hinjob(a->flags, ISDIR);
+
+	/* reset xino */
+	if (au_ftest_hinjob(a->flags, XINO0) && a->inode)
+		hin_xino(a->inode, a->h_inode); /* ignore this error */
+
+	if (au_ftest_hinjob(a->flags, TRYXINO0)
+	    && a->inode
+	    && a->h_inode) {
+		mutex_lock_nested(&a->h_inode->i_mutex, AuLsc_I_CHILD);
+		if (!a->h_inode->i_nlink)
+			hin_xino(a->inode, a->h_inode); /* ignore this error */
+		mutex_unlock(&a->h_inode->i_mutex);
+	}
+
+	/* make the generation obsolete */
+	if (au_ftest_hinjob(a->flags, GEN)) {
+		int err = -1;
+		if (a->inode)
+			err = hin_gen_by_inode(a->h_name, a->h_nlen, a->inode,
+					       isdir);
+		if (err && a->dentry)
+			hin_gen_by_name(a->dentry, isdir);
+		/* ignore this error */
+	}
+
+	/* make dir entries obsolete */
+	if (au_ftest_hinjob(a->flags, DIRENT) && a->inode) {
+		struct au_vdir *vdir;
+
+		vdir = au_ivdir(a->inode);
+		if (vdir)
+			vdir->vd_jiffy = 0;
+		/* IMustLock(a->inode); */
+		/* a->inode->i_version++; */
+	}
+
+	/* can do nothing but warn */
+	if (au_ftest_hinjob(a->flags, MNTPNT)
+	    && a->dentry
+	    && d_mountpoint(a->dentry))
+		pr_warning("mount-point %.*s is removed or renamed\n",
+			   AuDLNPair(a->dentry));
+
+	return 0;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static char *in_name(u32 mask)
+{
+#ifdef CONFIG_AUFS_DEBUG
+#define test_ret(flag)	if (mask & flag) \
+				return #flag;
+	test_ret(IN_ACCESS);
+	test_ret(IN_MODIFY);
+	test_ret(IN_ATTRIB);
+	test_ret(IN_CLOSE_WRITE);
+	test_ret(IN_CLOSE_NOWRITE);
+	test_ret(IN_OPEN);
+	test_ret(IN_MOVED_FROM);
+	test_ret(IN_MOVED_TO);
+	test_ret(IN_CREATE);
+	test_ret(IN_DELETE);
+	test_ret(IN_DELETE_SELF);
+	test_ret(IN_MOVE_SELF);
+	test_ret(IN_UNMOUNT);
+	test_ret(IN_Q_OVERFLOW);
+	test_ret(IN_IGNORED);
+	return "";
+#undef test_ret
+#else
+	return "??";
+#endif
+}
+
+static struct dentry *lookup_wlock_by_name(char *name, unsigned int nlen,
+					   struct inode *dir)
+{
+	struct dentry *dentry, *d, *parent;
+	struct qstr *dname;
+
+	parent = d_find_alias(dir);
+	if (!parent)
+		return NULL;
+
+	dentry = NULL;
+	spin_lock(&dcache_lock);
+	list_for_each_entry(d, &parent->d_subdirs, d_u.d_child) {
+		/* AuDbg("%.*s\n", AuDLNPair(d)); */
+		dname = &d->d_name;
+		if (dname->len != nlen || memcmp(dname->name, name, nlen))
+			continue;
+		if (!atomic_read(&d->d_count) || !d->d_fsdata) {
+			spin_lock(&d->d_lock);
+			__d_drop(d);
+			spin_unlock(&d->d_lock);
+			continue;
+		}
+
+		dentry = dget(d);
+		break;
+	}
+	spin_unlock(&dcache_lock);
+	dput(parent);
+
+	if (dentry)
+		di_write_lock_child(dentry);
+
+	return dentry;
+}
+
+static struct inode *lookup_wlock_by_ino(struct super_block *sb,
+					 aufs_bindex_t bindex, ino_t h_ino)
+{
+	struct inode *inode;
+	ino_t ino;
+	int err;
+
+	inode = NULL;
+	err = au_xino_read(sb, bindex, h_ino, &ino);
+	if (!err && ino)
+		inode = ilookup(sb, ino);
+	if (!inode)
+		goto out;
+
+	if (unlikely(inode->i_ino == AUFS_ROOT_INO)) {
+		pr_warning("wrong root branch\n");
+		iput(inode);
+		inode = NULL;
+		goto out;
+	}
+
+	ii_write_lock_child(inode);
+
+ out:
+	return inode;
+}
+
+enum { CHILD, PARENT };
+struct postproc_args {
+	struct inode *h_dir, *dir, *h_child_inode;
+	u32 mask;
+	unsigned int flags[2];
+	unsigned int h_child_nlen;
+	char h_child_name[];
+};
+
+static void postproc(void *_args)
+{
+	struct postproc_args *a = _args;
+	struct super_block *sb;
+	aufs_bindex_t bindex, bend, bfound;
+	unsigned char xino, try_iput;
+	int err;
+	struct inode *inode;
+	ino_t h_ino;
+	struct hin_job_args args;
+	struct dentry *dentry;
+	struct au_sbinfo *sbinfo;
+
+	AuDebugOn(!_args);
+	AuDebugOn(!a->h_dir);
+	AuDebugOn(!a->dir);
+	AuDebugOn(!a->mask);
+	AuDbg("mask 0x%x %s, i%lu, hi%lu, hci%lu\n",
+	      a->mask, in_name(a->mask), a->dir->i_ino, a->h_dir->i_ino,
+	      a->h_child_inode ? a->h_child_inode->i_ino : 0);
+
+	inode = NULL;
+	dentry = NULL;
+	/*
+	 * do not lock a->dir->i_mutex here
+	 * because of d_revalidate() may cause a deadlock.
+	 */
+	sb = a->dir->i_sb;
+	AuDebugOn(!sb);
+	sbinfo = au_sbi(sb);
+	AuDebugOn(!sbinfo);
+	/* big aufs lock */
+	si_noflush_write_lock(sb);
+
+	ii_read_lock_parent(a->dir);
+	bfound = -1;
+	bend = au_ibend(a->dir);
+	for (bindex = au_ibstart(a->dir); bindex <= bend; bindex++)
+		if (au_h_iptr(a->dir, bindex) == a->h_dir) {
+			bfound = bindex;
+			break;
+		}
+	ii_read_unlock(a->dir);
+	if (unlikely(bfound < 0))
+		goto out;
+
+	xino = !!au_opt_test(au_mntflags(sb), XINO);
+	h_ino = 0;
+	if (a->h_child_inode)
+		h_ino = a->h_child_inode->i_ino;
+
+	if (a->h_child_nlen
+	    && (au_ftest_hinjob(a->flags[CHILD], GEN)
+		|| au_ftest_hinjob(a->flags[CHILD], MNTPNT)))
+		dentry = lookup_wlock_by_name(a->h_child_name, a->h_child_nlen,
+					      a->dir);
+	try_iput = 0;
+	if (dentry)
+		inode = dentry->d_inode;
+	if (xino && !inode && h_ino
+	    && (au_ftest_hinjob(a->flags[CHILD], XINO0)
+		|| au_ftest_hinjob(a->flags[CHILD], TRYXINO0)
+		|| au_ftest_hinjob(a->flags[CHILD], GEN))) {
+		inode = lookup_wlock_by_ino(sb, bfound, h_ino);
+		try_iput = 1;
+	    }
+
+	args.flags = a->flags[CHILD];
+	args.dentry = dentry;
+	args.inode = inode;
+	args.h_inode = a->h_child_inode;
+	args.dir = a->dir;
+	args.h_dir = a->h_dir;
+	args.h_name = a->h_child_name;
+	args.h_nlen = a->h_child_nlen;
+	err = hin_job(&args);
+	if (dentry) {
+		if (dentry->d_fsdata)
+			di_write_unlock(dentry);
+		dput(dentry);
+	}
+	if (inode && try_iput) {
+		ii_write_unlock(inode);
+		iput(inode);
+	}
+
+	ii_write_lock_parent(a->dir);
+	args.flags = a->flags[PARENT];
+	args.dentry = NULL;
+	args.inode = a->dir;
+	args.h_inode = a->h_dir;
+	args.dir = NULL;
+	args.h_dir = NULL;
+	args.h_name = NULL;
+	args.h_nlen = 0;
+	err = hin_job(&args);
+	ii_write_unlock(a->dir);
+
+ out:
+	au_nwt_done(&sbinfo->si_nowait);
+	si_write_unlock(sb);
+
+	iput(a->h_child_inode);
+	iput(a->h_dir);
+	iput(a->dir);
+	kfree(a);
+}
+
+/* ---------------------------------------------------------------------- */
+
+static void aufs_inotify(struct inotify_watch *watch, u32 wd __maybe_unused,
+			 u32 mask, u32 cookie __maybe_unused,
+			 const char *h_child_name, struct inode *h_child_inode)
+{
+	struct au_hinotify *hinotify;
+	struct postproc_args *args;
+	int len, wkq_err;
+	unsigned char isdir, isroot, wh;
+	char *p;
+	struct inode *dir;
+	unsigned int flags[2];
+
+	/* if IN_UNMOUNT happens, there must be another bug */
+	AuDebugOn(mask & IN_UNMOUNT);
+	if (mask & (IN_IGNORED | IN_UNMOUNT)) {
+		put_inotify_watch(watch);
+		return;
+	}
+#ifdef AuDbgHinotify
+	au_debug(1);
+	if (1 || !h_child_name || strcmp(h_child_name, AUFS_XINO_FNAME)) {
+		AuDbg("i%lu, wd %d, mask 0x%x %s, cookie 0x%x, hcname %s,"
+		      " hi%lu\n",
+		      watch->inode->i_ino, wd, mask, in_name(mask), cookie,
+		      h_child_name ? h_child_name : "",
+		      h_child_inode ? h_child_inode->i_ino : 0);
+		WARN_ON(1);
+	}
+	au_debug(0);
+#endif
+
+	hinotify = container_of(watch, struct au_hinotify, hin_watch);
+	AuDebugOn(!hinotify || !hinotify->hin_aufs_inode);
+	dir = igrab(hinotify->hin_aufs_inode);
+	if (!dir)
+		return;
+
+	isroot = (dir->i_ino == AUFS_ROOT_INO);
+	len = 0;
+	wh = 0;
+	if (h_child_name) {
+		len = strlen(h_child_name);
+		if (!memcmp(h_child_name, AUFS_WH_PFX, AUFS_WH_PFX_LEN)) {
+			h_child_name += AUFS_WH_PFX_LEN;
+			len -= AUFS_WH_PFX_LEN;
+			wh = 1;
+		}
+	}
+
+	isdir = 0;
+	if (h_child_inode)
+		isdir = !!S_ISDIR(h_child_inode->i_mode);
+	flags[PARENT] = AuHinJob_ISDIR;
+	flags[CHILD] = 0;
+	if (isdir)
+		flags[CHILD] = AuHinJob_ISDIR;
+	switch (mask & IN_ALL_EVENTS) {
+	case IN_MOVED_FROM:
+	case IN_MOVED_TO:
+		AuDebugOn(!h_child_name || !h_child_inode);
+		au_fset_hinjob(flags[CHILD], GEN);
+		au_fset_hinjob(flags[CHILD], XINO0);
+		au_fset_hinjob(flags[CHILD], MNTPNT);
+		au_fset_hinjob(flags[PARENT], DIRENT);
+		break;
+
+	case IN_CREATE:
+		AuDebugOn(!h_child_name || !h_child_inode);
+		au_fset_hinjob(flags[PARENT], DIRENT);
+		au_fset_hinjob(flags[CHILD], GEN);
+		break;
+
+	case IN_DELETE:
+		/*
+		 * aufs never be able to get this child inode.
+		 * revalidation should be in d_revalidate()
+		 * by checking i_nlink, i_generation or d_unhashed().
+		 */
+		AuDebugOn(!h_child_name);
+		au_fset_hinjob(flags[PARENT], DIRENT);
+		au_fset_hinjob(flags[CHILD], GEN);
+		au_fset_hinjob(flags[CHILD], TRYXINO0);
+		au_fset_hinjob(flags[CHILD], MNTPNT);
+		break;
+
+	default:
+		AuDebugOn(1);
+	}
+
+	if (wh)
+		h_child_inode = NULL;
+
+	/* iput() and kfree() will be called in postproc() */
+	/*
+	 * inotify_mutex is already acquired and kmalloc/prune_icache may lock
+	 * iprune_mutex. strange.
+	 */
+	/* lockdep_off(); */
+	args = kmalloc(sizeof(*args) + len + 1, GFP_NOFS);
+	/* lockdep_on(); */
+	if (unlikely(!args)) {
+		AuErr1("no memory\n");
+		iput(dir);
+		return;
+	}
+	args->flags[PARENT] = flags[PARENT];
+	args->flags[CHILD] = flags[CHILD];
+	args->mask = mask;
+	args->dir = dir;
+	args->h_dir = igrab(watch->inode);
+	if (h_child_inode)
+		h_child_inode = igrab(h_child_inode); /* can be NULL */
+	args->h_child_inode = h_child_inode;
+	args->h_child_nlen = len;
+	if (len) {
+		p = (void *)args;
+		p += sizeof(*args);
+		memcpy(p, h_child_name, len + 1);
+	}
+
+	/* lockdep_off(); */
+	wkq_err = au_wkq_nowait(postproc, args, dir->i_sb);
+	/* lockdep_on(); */
+	if (unlikely(wkq_err))
+		pr_err("wkq %d\n", wkq_err);
+}
+
+static void aufs_inotify_destroy(struct inotify_watch *watch __maybe_unused)
+{
+	return;
+}
+
+static struct inotify_operations aufs_inotify_ops = {
+	.handle_event	= aufs_inotify,
+	.destroy_watch	= aufs_inotify_destroy
+};
+
+/* ---------------------------------------------------------------------- */
+
+static void au_hin_destroy_cache(void)
+{
+	kmem_cache_destroy(au_cachep[AuCache_HINOTIFY]);
+	au_cachep[AuCache_HINOTIFY] = NULL;
+}
+
+int __init au_hinotify_init(void)
+{
+	int err;
+
+	err = -ENOMEM;
+	au_cachep[AuCache_HINOTIFY] = AuCache(au_hinotify);
+	if (au_cachep[AuCache_HINOTIFY]) {
+		err = 0;
+		au_hin_handle = inotify_init(&aufs_inotify_ops);
+		if (IS_ERR(au_hin_handle)) {
+			err = PTR_ERR(au_hin_handle);
+			au_hin_destroy_cache();
+		}
+	}
+	AuTraceErr(err);
+	return err;
+}
+
+void au_hinotify_fin(void)
+{
+	inotify_destroy(au_hin_handle);
+	if (au_cachep[AuCache_HINOTIFY])
+		au_hin_destroy_cache();
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/dir.h
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/dir.h
@@ -0,0 +1,127 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * directory operations
+ */
+
+#ifndef __AUFS_DIR_H__
+#define __AUFS_DIR_H__
+
+#ifdef __KERNEL__
+
+#include <linux/fs.h>
+#include <linux/aufs_type.h>
+
+/* ---------------------------------------------------------------------- */
+
+/* need to be faster and smaller */
+
+struct au_nhash {
+	unsigned int		nh_num;
+	struct hlist_head	*nh_head;
+};
+
+struct au_vdir_destr {
+	unsigned char	len;
+	unsigned char	name[0];
+} __packed;
+
+struct au_vdir_dehstr {
+	struct hlist_node	hash;
+	struct au_vdir_destr	*str;
+};
+
+struct au_vdir_de {
+	ino_t			de_ino;
+	unsigned char		de_type;
+	/* caution: packed */
+	struct au_vdir_destr	de_str;
+} __packed;
+
+struct au_vdir_wh {
+	struct hlist_node	wh_hash;
+#ifdef CONFIG_AUFS_SHWH
+	ino_t			wh_ino;
+	aufs_bindex_t		wh_bindex;
+	unsigned char		wh_type;
+#else
+	aufs_bindex_t		wh_bindex;
+#endif
+	/* caution: packed */
+	struct au_vdir_destr	wh_str;
+} __packed;
+
+union au_vdir_deblk_p {
+	unsigned char		*deblk;
+	struct au_vdir_de	*de;
+};
+
+struct au_vdir {
+	unsigned char	**vd_deblk;
+	unsigned long	vd_nblk;
+	struct {
+		unsigned long		ul;
+		union au_vdir_deblk_p	p;
+	} vd_last;
+
+	unsigned long	vd_version;
+	unsigned int	vd_deblk_sz;
+	unsigned long	vd_jiffy;
+};
+
+/* ---------------------------------------------------------------------- */
+
+/* dir.c */
+extern const struct file_operations aufs_dir_fop;
+void au_add_nlink(struct inode *dir, struct inode *h_dir);
+void au_sub_nlink(struct inode *dir, struct inode *h_dir);
+loff_t au_dir_size(struct file *file, struct dentry *dentry);
+int au_test_empty_lower(struct dentry *dentry);
+int au_test_empty(struct dentry *dentry, struct au_nhash *whlist);
+
+/* vdir.c */
+unsigned int au_rdhash_est(loff_t sz);
+int au_nhash_alloc(struct au_nhash *nhash, unsigned int num_hash, gfp_t gfp);
+void au_nhash_wh_free(struct au_nhash *whlist);
+int au_nhash_test_longer_wh(struct au_nhash *whlist, aufs_bindex_t btgt,
+			    int limit);
+int au_nhash_test_known_wh(struct au_nhash *whlist, char *name, int nlen);
+int au_nhash_append_wh(struct au_nhash *whlist, char *name, int nlen, ino_t ino,
+		       unsigned int d_type, aufs_bindex_t bindex,
+		       unsigned char shwh);
+void au_vdir_free(struct au_vdir *vdir);
+int au_vdir_init(struct file *file);
+int au_vdir_fill_de(struct file *file, void *dirent, filldir_t filldir);
+
+/* ioctl.c */
+long aufs_ioctl_dir(struct file *file, unsigned int cmd, unsigned long arg);
+
+#ifdef CONFIG_AUFS_RDU
+/* rdu.c */
+long au_rdu_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
+#else
+static inline long au_rdu_ioctl(struct file *file, unsigned int cmd,
+				unsigned long arg)
+{
+	return -EINVAL;
+}
+#endif
+
+#endif /* __KERNEL__ */
+#endif /* __AUFS_DIR_H__ */
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/f_op.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/f_op.c
@@ -0,0 +1,828 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * file and vm operations
+ */
+
+#include <linux/file.h>
+#include <linux/fs_stack.h>
+#include <linux/ima.h>
+#include <linux/mman.h>
+#include <linux/mm.h>
+#include <linux/security.h>
+#include "aufs.h"
+
+/* common function to regular file and dir */
+int aufs_flush(struct file *file, fl_owner_t id)
+{
+	int err;
+	aufs_bindex_t bindex, bend;
+	struct dentry *dentry;
+	struct file *h_file;
+
+	dentry = file->f_dentry;
+	si_noflush_read_lock(dentry->d_sb);
+	fi_read_lock(file);
+	di_read_lock_child(dentry, AuLock_IW);
+
+	err = 0;
+	bend = au_fbend(file);
+	for (bindex = au_fbstart(file); !err && bindex <= bend; bindex++) {
+		h_file = au_h_fptr(file, bindex);
+		if (!h_file || !h_file->f_op || !h_file->f_op->flush)
+			continue;
+
+		err = h_file->f_op->flush(h_file, id);
+		if (!err)
+			vfsub_update_h_iattr(&h_file->f_path, /*did*/NULL);
+		/*ignore*/
+	}
+	au_cpup_attr_timesizes(dentry->d_inode);
+
+	di_read_unlock(dentry, AuLock_IW);
+	fi_read_unlock(file);
+	si_read_unlock(dentry->d_sb);
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int do_open_nondir(struct file *file, int flags)
+{
+	int err;
+	aufs_bindex_t bindex;
+	struct file *h_file;
+	struct dentry *dentry;
+	struct au_finfo *finfo;
+
+	FiMustWriteLock(file);
+
+	err = 0;
+	dentry = file->f_dentry;
+	finfo = au_fi(file);
+	finfo->fi_h_vm_ops = NULL;
+	finfo->fi_vm_ops = NULL;
+	bindex = au_dbstart(dentry);
+	/* O_TRUNC is processed already */
+	BUG_ON(au_test_ro(dentry->d_sb, bindex, dentry->d_inode)
+	       && (flags & O_TRUNC));
+
+	h_file = au_h_open(dentry, bindex, flags, file);
+	if (IS_ERR(h_file))
+		err = PTR_ERR(h_file);
+	else {
+		au_set_fbstart(file, bindex);
+		au_set_fbend(file, bindex);
+		au_set_h_fptr(file, bindex, h_file);
+		au_update_figen(file);
+		/* todo: necessary? */
+		/* file->f_ra = h_file->f_ra; */
+	}
+	return err;
+}
+
+static int aufs_open_nondir(struct inode *inode __maybe_unused,
+			    struct file *file)
+{
+	return au_do_open(file, do_open_nondir);
+}
+
+static int aufs_release_nondir(struct inode *inode __maybe_unused,
+			       struct file *file)
+{
+	struct super_block *sb = file->f_dentry->d_sb;
+
+	si_noflush_read_lock(sb);
+	kfree(au_fi(file)->fi_vm_ops);
+	au_finfo_fin(file);
+	si_read_unlock(sb);
+	return 0;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static ssize_t aufs_read(struct file *file, char __user *buf, size_t count,
+			 loff_t *ppos)
+{
+	ssize_t err;
+	struct dentry *dentry;
+	struct file *h_file;
+	struct super_block *sb;
+
+	dentry = file->f_dentry;
+	sb = dentry->d_sb;
+	si_read_lock(sb, AuLock_FLUSH);
+	err = au_reval_and_lock_fdi(file, au_reopen_nondir, /*wlock*/0);
+	if (unlikely(err))
+		goto out;
+
+	h_file = au_h_fptr(file, au_fbstart(file));
+	err = vfsub_read_u(h_file, buf, count, ppos);
+	/* todo: necessary? */
+	/* file->f_ra = h_file->f_ra; */
+	fsstack_copy_attr_atime(dentry->d_inode, h_file->f_dentry->d_inode);
+
+	di_read_unlock(dentry, AuLock_IR);
+	fi_read_unlock(file);
+ out:
+	si_read_unlock(sb);
+	return err;
+}
+
+static ssize_t aufs_write(struct file *file, const char __user *ubuf,
+			  size_t count, loff_t *ppos)
+{
+	ssize_t err;
+	aufs_bindex_t bstart;
+	struct au_pin pin;
+	struct dentry *dentry;
+	struct inode *inode;
+	struct super_block *sb;
+	struct file *h_file;
+	char __user *buf = (char __user *)ubuf;
+
+	dentry = file->f_dentry;
+	sb = dentry->d_sb;
+	inode = dentry->d_inode;
+	mutex_lock(&inode->i_mutex);
+	si_read_lock(sb, AuLock_FLUSH);
+
+	err = au_reval_and_lock_fdi(file, au_reopen_nondir, /*wlock*/1);
+	if (unlikely(err))
+		goto out;
+
+	err = au_ready_to_write(file, -1, &pin);
+	di_downgrade_lock(dentry, AuLock_IR);
+	if (unlikely(err))
+		goto out_unlock;
+
+	bstart = au_fbstart(file);
+	h_file = au_h_fptr(file, bstart);
+	au_unpin(&pin);
+	err = vfsub_write_u(h_file, buf, count, ppos);
+	au_cpup_attr_timesizes(inode);
+	inode->i_mode = h_file->f_dentry->d_inode->i_mode;
+
+ out_unlock:
+	di_read_unlock(dentry, AuLock_IR);
+	fi_write_unlock(file);
+ out:
+	si_read_unlock(sb);
+	mutex_unlock(&inode->i_mutex);
+	return err;
+}
+
+static ssize_t aufs_aio_read(struct kiocb *kio, const struct iovec *iov,
+			     unsigned long nv, loff_t pos)
+{
+	ssize_t err;
+	struct file *file, *h_file;
+	struct dentry *dentry;
+	struct super_block *sb;
+
+	file = kio->ki_filp;
+	dentry = file->f_dentry;
+	sb = dentry->d_sb;
+	si_read_lock(sb, AuLock_FLUSH);
+	err = au_reval_and_lock_fdi(file, au_reopen_nondir, /*wlock*/0);
+	if (unlikely(err))
+		goto out;
+
+	err = -ENOSYS;
+	h_file = au_h_fptr(file, au_fbstart(file));
+	if (h_file->f_op && h_file->f_op->aio_read) {
+		err = security_file_permission(h_file, MAY_READ);
+		if (unlikely(err))
+			goto out_unlock;
+		if (!is_sync_kiocb(kio)) {
+			get_file(h_file);
+			fput(file);
+		}
+		kio->ki_filp = h_file;
+		err = h_file->f_op->aio_read(kio, iov, nv, pos);
+		/* todo: necessary? */
+		/* file->f_ra = h_file->f_ra; */
+		fsstack_copy_attr_atime(dentry->d_inode,
+					h_file->f_dentry->d_inode);
+	} else
+		/* currently there is no such fs */
+		WARN_ON_ONCE(h_file->f_op && h_file->f_op->read);
+
+ out_unlock:
+	di_read_unlock(dentry, AuLock_IR);
+	fi_read_unlock(file);
+ out:
+	si_read_unlock(sb);
+	return err;
+}
+
+static ssize_t aufs_aio_write(struct kiocb *kio, const struct iovec *iov,
+			      unsigned long nv, loff_t pos)
+{
+	ssize_t err;
+	aufs_bindex_t bstart;
+	struct au_pin pin;
+	struct dentry *dentry;
+	struct inode *inode;
+	struct super_block *sb;
+	struct file *file, *h_file;
+
+	file = kio->ki_filp;
+	dentry = file->f_dentry;
+	sb = dentry->d_sb;
+	inode = dentry->d_inode;
+	mutex_lock(&inode->i_mutex);
+	si_read_lock(sb, AuLock_FLUSH);
+
+	err = au_reval_and_lock_fdi(file, au_reopen_nondir, /*wlock*/1);
+	if (unlikely(err))
+		goto out;
+
+	err = au_ready_to_write(file, -1, &pin);
+	di_downgrade_lock(dentry, AuLock_IR);
+	if (unlikely(err))
+		goto out_unlock;
+
+	err = -ENOSYS;
+	bstart = au_fbstart(file);
+	h_file = au_h_fptr(file, bstart);
+	au_unpin(&pin);
+	if (h_file->f_op && h_file->f_op->aio_write) {
+		err = security_file_permission(h_file, MAY_WRITE);
+		if (unlikely(err))
+			goto out_unlock;
+		if (!is_sync_kiocb(kio)) {
+			get_file(h_file);
+			fput(file);
+		}
+		kio->ki_filp = h_file;
+		err = h_file->f_op->aio_write(kio, iov, nv, pos);
+		au_cpup_attr_timesizes(inode);
+		inode->i_mode = h_file->f_dentry->d_inode->i_mode;
+	} else
+		/* currently there is no such fs */
+		WARN_ON_ONCE(h_file->f_op && h_file->f_op->write);
+
+ out_unlock:
+	di_read_unlock(dentry, AuLock_IR);
+	fi_write_unlock(file);
+ out:
+	si_read_unlock(sb);
+	mutex_unlock(&inode->i_mutex);
+	return err;
+}
+
+static ssize_t aufs_splice_read(struct file *file, loff_t *ppos,
+				struct pipe_inode_info *pipe, size_t len,
+				unsigned int flags)
+{
+	ssize_t err;
+	struct file *h_file;
+	struct dentry *dentry;
+	struct super_block *sb;
+
+	dentry = file->f_dentry;
+	sb = dentry->d_sb;
+	si_read_lock(sb, AuLock_FLUSH);
+	err = au_reval_and_lock_fdi(file, au_reopen_nondir, /*wlock*/0);
+	if (unlikely(err))
+		goto out;
+
+	err = -EINVAL;
+	h_file = au_h_fptr(file, au_fbstart(file));
+	if (au_test_loopback_kthread()) {
+		file->f_mapping = h_file->f_mapping;
+		smp_mb(); /* unnecessary? */
+	}
+	err = vfsub_splice_to(h_file, ppos, pipe, len, flags);
+	/* todo: necessasry? */
+	/* file->f_ra = h_file->f_ra; */
+	fsstack_copy_attr_atime(dentry->d_inode, h_file->f_dentry->d_inode);
+
+	di_read_unlock(dentry, AuLock_IR);
+	fi_read_unlock(file);
+
+ out:
+	si_read_unlock(sb);
+	return err;
+}
+
+static ssize_t
+aufs_splice_write(struct pipe_inode_info *pipe, struct file *file, loff_t *ppos,
+		  size_t len, unsigned int flags)
+{
+	ssize_t err;
+	struct au_pin pin;
+	struct dentry *dentry;
+	struct inode *inode;
+	struct super_block *sb;
+	struct file *h_file;
+
+	dentry = file->f_dentry;
+	inode = dentry->d_inode;
+	mutex_lock(&inode->i_mutex);
+	sb = dentry->d_sb;
+	si_read_lock(sb, AuLock_FLUSH);
+
+	err = au_reval_and_lock_fdi(file, au_reopen_nondir, /*wlock*/1);
+	if (unlikely(err))
+		goto out;
+
+	err = au_ready_to_write(file, -1, &pin);
+	di_downgrade_lock(dentry, AuLock_IR);
+	if (unlikely(err))
+		goto out_unlock;
+
+	h_file = au_h_fptr(file, au_fbstart(file));
+	au_unpin(&pin);
+	err = vfsub_splice_from(pipe, h_file, ppos, len, flags);
+	au_cpup_attr_timesizes(inode);
+	inode->i_mode = h_file->f_dentry->d_inode->i_mode;
+
+ out_unlock:
+	di_read_unlock(dentry, AuLock_IR);
+	fi_write_unlock(file);
+ out:
+	si_read_unlock(sb);
+	mutex_unlock(&inode->i_mutex);
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static struct file *au_safe_file(struct vm_area_struct *vma)
+{
+	struct file *file;
+
+	file = vma->vm_file;
+	if (file->private_data && au_test_aufs(file->f_dentry->d_sb))
+		return file;
+	return NULL;
+}
+
+static void au_reset_file(struct vm_area_struct *vma, struct file *file)
+{
+	vma->vm_file = file;
+	/* smp_mb(); */ /* flush vm_file */
+}
+
+static int aufs_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
+{
+	int err;
+	static DECLARE_WAIT_QUEUE_HEAD(wq);
+	struct file *file, *h_file;
+	struct au_finfo *finfo;
+
+	/* todo: non-robr mode, user vm_file as it is? */
+	wait_event(wq, (file = au_safe_file(vma)));
+
+	/* do not revalidate, no si lock */
+	finfo = au_fi(file);
+	h_file = finfo->fi_hfile[0 + finfo->fi_bstart].hf_file;
+	AuDebugOn(!h_file || !finfo->fi_h_vm_ops);
+
+	mutex_lock(&finfo->fi_vm_mtx);
+	vma->vm_file = h_file;
+	err = finfo->fi_h_vm_ops->fault(vma, vmf);
+	/* todo: necessary? */
+	/* file->f_ra = h_file->f_ra; */
+	au_reset_file(vma, file);
+	mutex_unlock(&finfo->fi_vm_mtx);
+#if 0 /* def CONFIG_SMP */
+	/* wake_up_nr(&wq, online_cpu - 1); */
+	wake_up_all(&wq);
+#else
+	wake_up(&wq);
+#endif
+
+	return err;
+}
+
+static int aufs_page_mkwrite(struct vm_area_struct *vma, struct vm_fault *vmf)
+{
+	int err;
+	static DECLARE_WAIT_QUEUE_HEAD(wq);
+	struct file *file, *h_file;
+	struct au_finfo *finfo;
+
+	wait_event(wq, (file = au_safe_file(vma)));
+
+	finfo = au_fi(file);
+	h_file = finfo->fi_hfile[0 + finfo->fi_bstart].hf_file;
+	AuDebugOn(!h_file || !finfo->fi_h_vm_ops);
+
+	mutex_lock(&finfo->fi_vm_mtx);
+	vma->vm_file = h_file;
+	err = finfo->fi_h_vm_ops->page_mkwrite(vma, vmf);
+	au_reset_file(vma, file);
+	mutex_unlock(&finfo->fi_vm_mtx);
+	wake_up(&wq);
+
+	return err;
+}
+
+static void aufs_vm_close(struct vm_area_struct *vma)
+{
+	static DECLARE_WAIT_QUEUE_HEAD(wq);
+	struct file *file, *h_file;
+	struct au_finfo *finfo;
+
+	wait_event(wq, (file = au_safe_file(vma)));
+
+	finfo = au_fi(file);
+	h_file = finfo->fi_hfile[0 + finfo->fi_bstart].hf_file;
+	AuDebugOn(!h_file || !finfo->fi_h_vm_ops);
+
+	mutex_lock(&finfo->fi_vm_mtx);
+	vma->vm_file = h_file;
+	finfo->fi_h_vm_ops->close(vma);
+	au_reset_file(vma, file);
+	mutex_unlock(&finfo->fi_vm_mtx);
+	wake_up(&wq);
+}
+
+static struct vm_operations_struct aufs_vm_ops = {
+	/* .close and .page_mkwrite are not set by default */
+	.fault		= aufs_fault,
+};
+
+/* ---------------------------------------------------------------------- */
+
+static unsigned long au_prot_conv(unsigned long flags)
+{
+	unsigned long prot;
+
+	prot = 0;
+	if (flags & VM_READ)
+		prot |= PROT_READ;
+	if (flags & VM_WRITE)
+		prot |= PROT_WRITE;
+	if (flags & VM_EXEC)
+		prot |= PROT_EXEC;
+	return prot;
+}
+
+static struct vm_operations_struct *au_vm_ops(struct file *h_file,
+					      struct vm_area_struct *vma)
+{
+	struct vm_operations_struct *vm_ops;
+	int err;
+
+	vm_ops = ERR_PTR(-ENODEV);
+	if (!h_file->f_op || !h_file->f_op->mmap)
+		goto out;
+
+	err = ima_file_mmap(h_file, au_prot_conv(vma->vm_flags));
+	vm_ops = ERR_PTR(err);
+	if (err)
+		goto out;
+
+	err = h_file->f_op->mmap(h_file, vma);
+	vm_ops = ERR_PTR(err);
+	if (unlikely(err))
+		goto out;
+
+	/* oops, it became 'const' */
+	vm_ops = (struct vm_operations_struct *)vma->vm_ops;
+	err = do_munmap(current->mm, vma->vm_start,
+			vma->vm_end - vma->vm_start);
+	if (unlikely(err)) {
+		AuIOErr("failed internal unmapping %.*s, %d\n",
+			AuDLNPair(h_file->f_dentry), err);
+		vm_ops = ERR_PTR(-EIO);
+	}
+
+ out:
+	return vm_ops;
+}
+
+static int au_custom_vm_ops(struct au_finfo *finfo, struct vm_area_struct *vma)
+{
+	int err;
+	struct vm_operations_struct *h_ops;
+
+	AuRwMustAnyLock(&finfo->fi_rwsem);
+
+	err = 0;
+	h_ops = finfo->fi_h_vm_ops;
+	AuDebugOn(!h_ops);
+	if ((!h_ops->page_mkwrite && !h_ops->close)
+	    || finfo->fi_vm_ops)
+		goto out;
+
+	err = -ENOMEM;
+	finfo->fi_vm_ops = kmemdup(&aufs_vm_ops, sizeof(aufs_vm_ops), GFP_NOFS);
+	if (unlikely(!finfo->fi_vm_ops))
+		goto out;
+
+	err = 0;
+	if (h_ops->page_mkwrite)
+		finfo->fi_vm_ops->page_mkwrite = aufs_page_mkwrite;
+	if (h_ops->close)
+		finfo->fi_vm_ops->close = aufs_vm_close;
+
+	vma->vm_ops = finfo->fi_vm_ops;
+
+ out:
+	return err;
+}
+
+static int aufs_mmap(struct file *file, struct vm_area_struct *vma)
+{
+	int err;
+	unsigned char wlock, mmapped;
+	struct dentry *dentry;
+	struct super_block *sb;
+	struct file *h_file;
+	struct vm_operations_struct *vm_ops;
+
+	dentry = file->f_dentry;
+	wlock = !!(file->f_mode & FMODE_WRITE) && (vma->vm_flags & VM_SHARED);
+	sb = dentry->d_sb;
+	si_read_lock(sb, AuLock_FLUSH);
+	err = au_reval_and_lock_fdi(file, au_reopen_nondir, /*wlock*/1);
+	if (unlikely(err))
+		goto out;
+
+	mmapped = !!au_test_mmapped(file);
+	if (wlock) {
+		struct au_pin pin;
+
+		err = au_ready_to_write(file, -1, &pin);
+		di_downgrade_lock(dentry, AuLock_IR);
+		if (unlikely(err))
+			goto out_unlock;
+		au_unpin(&pin);
+	} else
+		di_downgrade_lock(dentry, AuLock_IR);
+
+	h_file = au_h_fptr(file, au_fbstart(file));
+	if (!mmapped && au_test_fs_bad_mapping(h_file->f_dentry->d_sb)) {
+		/*
+		 * by this assignment, f_mapping will differs from aufs inode
+		 * i_mapping.
+		 * if someone else mixes the use of f_dentry->d_inode and
+		 * f_mapping->host, then a problem may arise.
+		 */
+		file->f_mapping = h_file->f_mapping;
+	}
+
+	vm_ops = NULL;
+	if (!mmapped) {
+		vm_ops = au_vm_ops(h_file, vma);
+		err = PTR_ERR(vm_ops);
+		if (IS_ERR(vm_ops))
+			goto out_unlock;
+	}
+
+	/*
+	 * unnecessary to handle MAP_DENYWRITE and deny_write_access()?
+	 * currently MAP_DENYWRITE from userspace is ignored, but elf loader
+	 * sets it. when FMODE_EXEC is set (by open_exec() or sys_uselib()),
+	 * both of the aufs file and the lower file is deny_write_access()-ed.
+	 * finally I hope we can skip handlling MAP_DENYWRITE here.
+	 */
+	err = generic_file_mmap(file, vma);
+	if (unlikely(err))
+		goto out_unlock;
+
+	vma->vm_ops = &aufs_vm_ops;
+	if (!mmapped) {
+		struct au_finfo *finfo = au_fi(file);
+
+		finfo->fi_h_vm_ops = vm_ops;
+		mutex_init(&finfo->fi_vm_mtx);
+	}
+
+	err = au_custom_vm_ops(au_fi(file), vma);
+	if (unlikely(err))
+		goto out_unlock;
+
+	vfsub_file_accessed(h_file);
+	fsstack_copy_attr_atime(dentry->d_inode, h_file->f_dentry->d_inode);
+
+ out_unlock:
+	di_read_unlock(dentry, AuLock_IR);
+	fi_write_unlock(file);
+ out:
+	si_read_unlock(sb);
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int aufs_fsync_nondir(struct file *file, struct dentry *dentry,
+			     int datasync)
+{
+	int err;
+	struct au_pin pin;
+	struct inode *inode;
+	struct file *h_file;
+	struct super_block *sb;
+
+	inode = dentry->d_inode;
+	IMustLock(file->f_mapping->host);
+	if (inode != file->f_mapping->host) {
+		mutex_unlock(&file->f_mapping->host->i_mutex);
+		mutex_lock(&inode->i_mutex);
+	}
+	IMustLock(inode);
+
+	sb = dentry->d_sb;
+	si_read_lock(sb, AuLock_FLUSH);
+
+	err = 0; /* -EBADF; */ /* posix? */
+	if (unlikely(!(file->f_mode & FMODE_WRITE)))
+		goto out;
+	err = au_reval_and_lock_fdi(file, au_reopen_nondir, /*wlock*/1);
+	if (unlikely(err))
+		goto out;
+
+	err = au_ready_to_write(file, -1, &pin);
+	di_downgrade_lock(dentry, AuLock_IR);
+	if (unlikely(err))
+		goto out_unlock;
+	au_unpin(&pin);
+
+	err = -EINVAL;
+	h_file = au_h_fptr(file, au_fbstart(file));
+	if (h_file->f_op && h_file->f_op->fsync) {
+		struct dentry *h_d;
+		struct mutex *h_mtx;
+
+		/*
+		 * no filemap_fdatawrite() since aufs file has no its own
+		 * mapping, but dir.
+		 */
+		h_d = h_file->f_dentry;
+		h_mtx = &h_d->d_inode->i_mutex;
+		mutex_lock_nested(h_mtx, AuLsc_I_CHILD);
+		err = h_file->f_op->fsync(h_file, h_d, datasync);
+		if (!err)
+			vfsub_update_h_iattr(&h_file->f_path, /*did*/NULL);
+		/*ignore*/
+		au_cpup_attr_timesizes(inode);
+		mutex_unlock(h_mtx);
+	}
+
+ out_unlock:
+	di_read_unlock(dentry, AuLock_IR);
+	fi_write_unlock(file);
+ out:
+	si_read_unlock(sb);
+	if (inode != file->f_mapping->host) {
+		mutex_unlock(&inode->i_mutex);
+		mutex_lock(&file->f_mapping->host->i_mutex);
+	}
+	return err;
+}
+
+/* no one supports this operation, currently */
+#if 0
+static int aufs_aio_fsync_nondir(struct kiocb *kio, int datasync)
+{
+	int err;
+	struct au_pin pin;
+	struct dentry *dentry;
+	struct inode *inode;
+	struct file *file, *h_file;
+	struct super_block *sb;
+
+	file = kio->ki_filp;
+	dentry = file->f_dentry;
+	inode = dentry->d_inode;
+	mutex_lock(&inode->i_mutex);
+
+	sb = dentry->d_sb;
+	si_read_lock(sb, AuLock_FLUSH);
+
+	err = 0; /* -EBADF; */ /* posix? */
+	if (unlikely(!(file->f_mode & FMODE_WRITE)))
+		goto out;
+	err = au_reval_and_lock_fdi(file, au_reopen_nondir, /*wlock*/1);
+	if (unlikely(err))
+		goto out;
+
+	err = au_ready_to_write(file, -1, &pin);
+	di_downgrade_lock(dentry, AuLock_IR);
+	if (unlikely(err))
+		goto out_unlock;
+	au_unpin(&pin);
+
+	err = -ENOSYS;
+	h_file = au_h_fptr(file, au_fbstart(file));
+	if (h_file->f_op && h_file->f_op->aio_fsync) {
+		struct dentry *h_d;
+		struct mutex *h_mtx;
+
+		h_d = h_file->f_dentry;
+		h_mtx = &h_d->d_inode->i_mutex;
+		if (!is_sync_kiocb(kio)) {
+			get_file(h_file);
+			fput(file);
+		}
+		kio->ki_filp = h_file;
+		err = h_file->f_op->aio_fsync(kio, datasync);
+		mutex_lock_nested(h_mtx, AuLsc_I_CHILD);
+		if (!err)
+			vfsub_update_h_iattr(&h_file->f_path, /*did*/NULL);
+		/*ignore*/
+		au_cpup_attr_timesizes(inode);
+		mutex_unlock(h_mtx);
+	}
+
+ out_unlock:
+	di_read_unlock(dentry, AuLock_IR);
+	fi_write_unlock(file);
+ out:
+	si_read_unlock(sb);
+	mutex_unlock(&inode->i_mutex);
+	return err;
+}
+#endif
+
+static int aufs_fasync(int fd, struct file *file, int flag)
+{
+	int err;
+	struct file *h_file;
+	struct dentry *dentry;
+	struct super_block *sb;
+
+	dentry = file->f_dentry;
+	sb = dentry->d_sb;
+	si_read_lock(sb, AuLock_FLUSH);
+	err = au_reval_and_lock_fdi(file, au_reopen_nondir, /*wlock*/0);
+	if (unlikely(err))
+		goto out;
+
+	h_file = au_h_fptr(file, au_fbstart(file));
+	if (h_file->f_op && h_file->f_op->fasync)
+		err = h_file->f_op->fasync(fd, h_file, flag);
+
+	di_read_unlock(dentry, AuLock_IR);
+	fi_read_unlock(file);
+
+ out:
+	si_read_unlock(sb);
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* no one supports this operation, currently */
+#if 0
+static ssize_t aufs_sendpage(struct file *file, struct page *page, int offset,
+			     size_t len, loff_t *pos , int more)
+{
+}
+#endif
+
+/* ---------------------------------------------------------------------- */
+
+const struct file_operations aufs_file_fop = {
+	/*
+	 * while generic_file_llseek/_unlocked() don't use BKL,
+	 * don't use it since it operates file->f_mapping->host.
+	 * in aufs, it may be a real file and may confuse users by UDBA.
+	 */
+	/* .llseek		= generic_file_llseek, */
+
+	.read		= aufs_read,
+	.write		= aufs_write,
+	.aio_read	= aufs_aio_read,
+	.aio_write	= aufs_aio_write,
+#ifdef CONFIG_AUFS_POLL
+	.poll		= aufs_poll,
+#endif
+	.unlocked_ioctl	= aufs_ioctl_nondir,
+	.mmap		= aufs_mmap,
+	.open		= aufs_open_nondir,
+	.flush		= aufs_flush,
+	.release	= aufs_release_nondir,
+	.fsync		= aufs_fsync_nondir,
+	/* .aio_fsync	= aufs_aio_fsync_nondir, */
+	.fasync		= aufs_fasync,
+	/* .sendpage	= aufs_sendpage, */
+	.splice_write	= aufs_splice_write,
+	.splice_read	= aufs_splice_read,
+#if 0
+	.aio_splice_write = aufs_aio_splice_write,
+	.aio_splice_read  = aufs_aio_splice_read
+#endif
+};
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/dcsub.h
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/dcsub.h
@@ -0,0 +1,54 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * sub-routines for dentry cache
+ */
+
+#ifndef __AUFS_DCSUB_H__
+#define __AUFS_DCSUB_H__
+
+#ifdef __KERNEL__
+
+#include <linux/types.h>
+
+struct dentry;
+
+struct au_dpage {
+	int ndentry;
+	struct dentry **dentries;
+};
+
+struct au_dcsub_pages {
+	int ndpage;
+	struct au_dpage *dpages;
+};
+
+/* ---------------------------------------------------------------------- */
+
+int au_dpages_init(struct au_dcsub_pages *dpages, gfp_t gfp);
+void au_dpages_free(struct au_dcsub_pages *dpages);
+typedef int (*au_dpages_test)(struct dentry *dentry, void *arg);
+int au_dcsub_pages(struct au_dcsub_pages *dpages, struct dentry *root,
+		   au_dpages_test test, void *arg);
+int au_dcsub_pages_rev(struct au_dcsub_pages *dpages, struct dentry *dentry,
+		       int do_include, au_dpages_test test, void *arg);
+struct dentry *au_test_subdir(struct dentry *d1, struct dentry *d2);
+
+#endif /* __KERNEL__ */
+#endif /* __AUFS_DCSUB_H__ */
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/loop.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/loop.c
@@ -0,0 +1,55 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * support for loopback block device as a branch
+ */
+
+#include <linux/loop.h>
+#include "aufs.h"
+
+/*
+ * test if two lower dentries have overlapping branches.
+ */
+int au_test_loopback_overlap(struct super_block *sb, struct dentry *h_d1,
+			     struct dentry *h_d2)
+{
+	struct inode *h_inode;
+	struct loop_device *l;
+
+	h_inode = h_d1->d_inode;
+	if (MAJOR(h_inode->i_sb->s_dev) != LOOP_MAJOR)
+		return 0;
+
+	l = h_inode->i_sb->s_bdev->bd_disk->private_data;
+	h_d1 = l->lo_backing_file->f_dentry;
+	/* h_d1 can be local NFS. in this case aufs cannot detect the loop */
+	if (unlikely(h_d1->d_sb == sb))
+		return 1;
+	return !!au_test_subdir(h_d1, h_d2);
+}
+
+/* true if a kernel thread named 'loop[0-9].*' accesses a file */
+int au_test_loopback_kthread(void)
+{
+	const char c = current->comm[4];
+
+	return current->mm == NULL
+	       && '0' <= c && c <= '9'
+	       && strncmp(current->comm, "loop", 4) == 0;
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/whout.h
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/whout.h
@@ -0,0 +1,87 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * whiteout for logical deletion and opaque directory
+ */
+
+#ifndef __AUFS_WHOUT_H__
+#define __AUFS_WHOUT_H__
+
+#ifdef __KERNEL__
+
+#include <linux/aufs_type.h>
+#include "dir.h"
+
+/* whout.c */
+int au_wh_name_alloc(struct qstr *wh, const struct qstr *name);
+struct au_branch;
+int au_wh_test(struct dentry *h_parent, struct qstr *wh_name,
+	       struct au_branch *br, int try_sio);
+int au_diropq_test(struct dentry *h_dentry, struct au_branch *br);
+struct dentry *au_whtmp_lkup(struct dentry *h_parent, struct au_branch *br,
+			     struct qstr *prefix);
+int au_whtmp_ren(struct dentry *h_dentry, struct au_branch *br);
+int au_wh_unlink_dentry(struct inode *h_dir, struct path *h_path,
+			struct dentry *dentry);
+int au_wh_init(struct dentry *h_parent, struct au_branch *br,
+	       struct super_block *sb);
+
+/* diropq flags */
+#define AuDiropq_CREATE	1
+#define au_ftest_diropq(flags, name)	((flags) & AuDiropq_##name)
+#define au_fset_diropq(flags, name)	{ (flags) |= AuDiropq_##name; }
+#define au_fclr_diropq(flags, name)	{ (flags) &= ~AuDiropq_##name; }
+
+struct dentry *au_diropq_sio(struct dentry *dentry, aufs_bindex_t bindex,
+			     unsigned int flags);
+struct dentry *au_wh_lkup(struct dentry *h_parent, struct qstr *base_name,
+			  struct au_branch *br);
+struct dentry *au_wh_create(struct dentry *dentry, aufs_bindex_t bindex,
+			    struct dentry *h_parent);
+
+/* real rmdir for the whiteout-ed dir */
+struct au_whtmp_rmdir {
+	struct inode *dir;
+	aufs_bindex_t bindex;
+	struct dentry *wh_dentry;
+	struct au_nhash whlist;
+};
+
+struct au_whtmp_rmdir *au_whtmp_rmdir_alloc(struct super_block *sb, gfp_t gfp);
+void au_whtmp_rmdir_free(struct au_whtmp_rmdir *whtmp);
+int au_whtmp_rmdir(struct inode *dir, aufs_bindex_t bindex,
+		   struct dentry *wh_dentry, struct au_nhash *whlist);
+void au_whtmp_kick_rmdir(struct inode *dir, aufs_bindex_t bindex,
+			 struct dentry *wh_dentry, struct au_whtmp_rmdir *args);
+
+/* ---------------------------------------------------------------------- */
+
+static inline struct dentry *au_diropq_create(struct dentry *dentry,
+					      aufs_bindex_t bindex)
+{
+	return au_diropq_sio(dentry, bindex, AuDiropq_CREATE);
+}
+
+static inline int au_diropq_remove(struct dentry *dentry, aufs_bindex_t bindex)
+{
+	return PTR_ERR(au_diropq_sio(dentry, bindex, !AuDiropq_CREATE));
+}
+
+#endif /* __KERNEL__ */
+#endif /* __AUFS_WHOUT_H__ */
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/sbinfo.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/sbinfo.c
@@ -0,0 +1,208 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * superblock private data
+ */
+
+#include "aufs.h"
+
+/*
+ * they are necessary regardless sysfs is disabled.
+ */
+void au_si_free(struct kobject *kobj)
+{
+	struct au_sbinfo *sbinfo;
+	struct super_block *sb;
+
+	sbinfo = container_of(kobj, struct au_sbinfo, si_kobj);
+	AuDebugOn(!list_empty(&sbinfo->si_plink.head));
+
+	sb = sbinfo->si_sb;
+	si_write_lock(sb);
+	au_xino_clr(sb);
+	au_br_free(sbinfo);
+	kfree(sbinfo->si_branch);
+	mutex_destroy(&sbinfo->si_xib_mtx);
+	si_write_unlock(sb);
+	AuRwDestroy(&sbinfo->si_rwsem);
+
+	kfree(sbinfo);
+}
+
+int au_si_alloc(struct super_block *sb)
+{
+	int err;
+	struct au_sbinfo *sbinfo;
+
+	err = -ENOMEM;
+	sbinfo = kmalloc(sizeof(*sbinfo), GFP_NOFS);
+	if (unlikely(!sbinfo))
+		goto out;
+
+	/* will be reallocated separately */
+	sbinfo->si_branch = kzalloc(sizeof(*sbinfo->si_branch), GFP_NOFS);
+	if (unlikely(!sbinfo->si_branch))
+		goto out_sbinfo;
+
+	memset(&sbinfo->si_kobj, 0, sizeof(sbinfo->si_kobj));
+	err = sysaufs_si_init(sbinfo);
+	if (unlikely(err))
+		goto out_br;
+
+	au_nwt_init(&sbinfo->si_nowait);
+	au_rw_init_wlock(&sbinfo->si_rwsem);
+	sbinfo->si_generation = 0;
+	sbinfo->au_si_status = 0;
+	sbinfo->si_bend = -1;
+	sbinfo->si_last_br_id = 0;
+
+	sbinfo->si_wbr_copyup = AuWbrCopyup_Def;
+	sbinfo->si_wbr_create = AuWbrCreate_Def;
+	sbinfo->si_wbr_copyup_ops = au_wbr_copyup_ops + AuWbrCopyup_Def;
+	sbinfo->si_wbr_create_ops = au_wbr_create_ops + AuWbrCreate_Def;
+
+	sbinfo->si_mntflags = AuOpt_Def;
+
+	sbinfo->si_xread = NULL;
+	sbinfo->si_xwrite = NULL;
+	sbinfo->si_xib = NULL;
+	mutex_init(&sbinfo->si_xib_mtx);
+	sbinfo->si_xib_buf = NULL;
+	sbinfo->si_xino_brid = -1;
+	/* leave si_xib_last_pindex and si_xib_next_bit */
+
+	sbinfo->si_rdcache = AUFS_RDCACHE_DEF * HZ;
+	sbinfo->si_rdblk = AUFS_RDBLK_DEF;
+	sbinfo->si_rdhash = AUFS_RDHASH_DEF;
+	sbinfo->si_dirwh = AUFS_DIRWH_DEF;
+
+	au_spl_init(&sbinfo->si_plink);
+	init_waitqueue_head(&sbinfo->si_plink_wq);
+
+	/* leave other members for sysaufs and si_mnt. */
+	sbinfo->si_sb = sb;
+	sb->s_fs_info = sbinfo;
+	au_debug_sbinfo_init(sbinfo);
+	return 0; /* success */
+
+ out_br:
+	kfree(sbinfo->si_branch);
+ out_sbinfo:
+	kfree(sbinfo);
+ out:
+	return err;
+}
+
+int au_sbr_realloc(struct au_sbinfo *sbinfo, int nbr)
+{
+	int err, sz;
+	struct au_branch **brp;
+
+	AuRwMustWriteLock(&sbinfo->si_rwsem);
+
+	err = -ENOMEM;
+	sz = sizeof(*brp) * (sbinfo->si_bend + 1);
+	if (unlikely(!sz))
+		sz = sizeof(*brp);
+	brp = au_kzrealloc(sbinfo->si_branch, sz, sizeof(*brp) * nbr, GFP_NOFS);
+	if (brp) {
+		sbinfo->si_branch = brp;
+		err = 0;
+	}
+
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+unsigned int au_sigen_inc(struct super_block *sb)
+{
+	unsigned int gen;
+
+	SiMustWriteLock(sb);
+
+	gen = ++au_sbi(sb)->si_generation;
+	au_update_digen(sb->s_root);
+	au_update_iigen(sb->s_root->d_inode);
+	sb->s_root->d_inode->i_version++;
+	return gen;
+}
+
+aufs_bindex_t au_new_br_id(struct super_block *sb)
+{
+	aufs_bindex_t br_id;
+	int i;
+	struct au_sbinfo *sbinfo;
+
+	SiMustWriteLock(sb);
+
+	sbinfo = au_sbi(sb);
+	for (i = 0; i <= AUFS_BRANCH_MAX; i++) {
+		br_id = ++sbinfo->si_last_br_id;
+		if (br_id && au_br_index(sb, br_id) < 0)
+			return br_id;
+	}
+
+	return -1;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* dentry and super_block lock. call at entry point */
+void aufs_read_lock(struct dentry *dentry, int flags)
+{
+	si_read_lock(dentry->d_sb, flags);
+	if (au_ftest_lock(flags, DW))
+		di_write_lock_child(dentry);
+	else
+		di_read_lock_child(dentry, flags);
+}
+
+void aufs_read_unlock(struct dentry *dentry, int flags)
+{
+	if (au_ftest_lock(flags, DW))
+		di_write_unlock(dentry);
+	else
+		di_read_unlock(dentry, flags);
+	si_read_unlock(dentry->d_sb);
+}
+
+void aufs_write_lock(struct dentry *dentry)
+{
+	si_write_lock(dentry->d_sb);
+	di_write_lock_child(dentry);
+}
+
+void aufs_write_unlock(struct dentry *dentry)
+{
+	di_write_unlock(dentry);
+	si_write_unlock(dentry->d_sb);
+}
+
+void aufs_read_and_write_lock2(struct dentry *d1, struct dentry *d2, int flags)
+{
+	si_read_lock(d1->d_sb, flags);
+	di_write_lock2_child(d1, d2, au_ftest_lock(flags, DIR));
+}
+
+void aufs_read_and_write_unlock2(struct dentry *d1, struct dentry *d2)
+{
+	di_write_unlock2(d1, d2);
+	si_read_unlock(d1->d_sb);
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/cpup.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/cpup.c
@@ -0,0 +1,1048 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * copy-up functions, see wbr_policy.c for copy-down
+ */
+
+#include <linux/file.h>
+#include <linux/fs_stack.h>
+#include <linux/mm.h>
+#include <linux/uaccess.h>
+#include "aufs.h"
+
+void au_cpup_attr_flags(struct inode *dst, struct inode *src)
+{
+	const unsigned int mask = S_DEAD | S_SWAPFILE | S_PRIVATE
+		| S_NOATIME | S_NOCMTIME;
+
+	dst->i_flags |= src->i_flags & ~mask;
+	if (au_test_fs_notime(dst->i_sb))
+		dst->i_flags |= S_NOATIME | S_NOCMTIME;
+}
+
+void au_cpup_attr_timesizes(struct inode *inode)
+{
+	struct inode *h_inode;
+
+	h_inode = au_h_iptr(inode, au_ibstart(inode));
+	fsstack_copy_attr_times(inode, h_inode);
+	vfsub_copy_inode_size(inode, h_inode);
+}
+
+void au_cpup_attr_nlink(struct inode *inode, int force)
+{
+	struct inode *h_inode;
+	struct super_block *sb;
+	aufs_bindex_t bindex, bend;
+
+	sb = inode->i_sb;
+	bindex = au_ibstart(inode);
+	h_inode = au_h_iptr(inode, bindex);
+	if (!force
+	    && !S_ISDIR(h_inode->i_mode)
+	    && au_opt_test(au_mntflags(sb), PLINK)
+	    && au_plink_test(inode))
+		return;
+
+	inode->i_nlink = h_inode->i_nlink;
+
+	/*
+	 * fewer nlink makes find(1) noisy, but larger nlink doesn't.
+	 * it may includes whplink directory.
+	 */
+	if (S_ISDIR(h_inode->i_mode)) {
+		bend = au_ibend(inode);
+		for (bindex++; bindex <= bend; bindex++) {
+			h_inode = au_h_iptr(inode, bindex);
+			if (h_inode)
+				au_add_nlink(inode, h_inode);
+		}
+	}
+}
+
+void au_cpup_attr_changeable(struct inode *inode)
+{
+	struct inode *h_inode;
+
+	h_inode = au_h_iptr(inode, au_ibstart(inode));
+	inode->i_mode = h_inode->i_mode;
+	inode->i_uid = h_inode->i_uid;
+	inode->i_gid = h_inode->i_gid;
+	au_cpup_attr_timesizes(inode);
+	au_cpup_attr_flags(inode, h_inode);
+}
+
+void au_cpup_igen(struct inode *inode, struct inode *h_inode)
+{
+	struct au_iinfo *iinfo = au_ii(inode);
+
+	IiMustWriteLock(inode);
+
+	iinfo->ii_higen = h_inode->i_generation;
+	iinfo->ii_hsb1 = h_inode->i_sb;
+}
+
+void au_cpup_attr_all(struct inode *inode, int force)
+{
+	struct inode *h_inode;
+
+	h_inode = au_h_iptr(inode, au_ibstart(inode));
+	au_cpup_attr_changeable(inode);
+	if (inode->i_nlink > 0)
+		au_cpup_attr_nlink(inode, force);
+	inode->i_rdev = h_inode->i_rdev;
+	inode->i_blkbits = h_inode->i_blkbits;
+	au_cpup_igen(inode, h_inode);
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* Note: dt_dentry and dt_h_dentry are not dget/dput-ed */
+
+/* keep the timestamps of the parent dir when cpup */
+void au_dtime_store(struct au_dtime *dt, struct dentry *dentry,
+		    struct path *h_path)
+{
+	struct inode *h_inode;
+
+	dt->dt_dentry = dentry;
+	dt->dt_h_path = *h_path;
+	h_inode = h_path->dentry->d_inode;
+	dt->dt_atime = h_inode->i_atime;
+	dt->dt_mtime = h_inode->i_mtime;
+	/* smp_mb(); */
+}
+
+void au_dtime_revert(struct au_dtime *dt)
+{
+	struct iattr attr;
+	int err;
+
+	attr.ia_atime = dt->dt_atime;
+	attr.ia_mtime = dt->dt_mtime;
+	attr.ia_valid = ATTR_FORCE | ATTR_MTIME | ATTR_MTIME_SET
+		| ATTR_ATIME | ATTR_ATIME_SET;
+
+	err = vfsub_notify_change(&dt->dt_h_path, &attr);
+	if (unlikely(err))
+		pr_warning("restoring timestamps failed(%d). ignored\n", err);
+}
+
+/* ---------------------------------------------------------------------- */
+
+static noinline_for_stack
+int cpup_iattr(struct dentry *dst, aufs_bindex_t bindex, struct dentry *h_src)
+{
+	int err, sbits;
+	struct iattr ia;
+	struct path h_path;
+	struct inode *h_isrc, *h_idst;
+
+	h_path.dentry = au_h_dptr(dst, bindex);
+	h_idst = h_path.dentry->d_inode;
+	h_path.mnt = au_sbr_mnt(dst->d_sb, bindex);
+	h_isrc = h_src->d_inode;
+	ia.ia_valid = ATTR_FORCE | ATTR_UID | ATTR_GID
+		| ATTR_ATIME | ATTR_MTIME
+		| ATTR_ATIME_SET | ATTR_MTIME_SET;
+	ia.ia_uid = h_isrc->i_uid;
+	ia.ia_gid = h_isrc->i_gid;
+	ia.ia_atime = h_isrc->i_atime;
+	ia.ia_mtime = h_isrc->i_mtime;
+	if (h_idst->i_mode != h_isrc->i_mode
+	    && !S_ISLNK(h_idst->i_mode)) {
+		ia.ia_valid |= ATTR_MODE;
+		ia.ia_mode = h_isrc->i_mode;
+	}
+	sbits = !!(h_isrc->i_mode & (S_ISUID | S_ISGID));
+	au_cpup_attr_flags(h_idst, h_isrc);
+	err = vfsub_notify_change(&h_path, &ia);
+
+	/* is this nfs only? */
+	if (!err && sbits && au_test_nfs(h_path.dentry->d_sb)) {
+		ia.ia_valid = ATTR_FORCE | ATTR_MODE;
+		ia.ia_mode = h_isrc->i_mode;
+		err = vfsub_notify_change(&h_path, &ia);
+	}
+
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static int au_do_copy_file(struct file *dst, struct file *src, loff_t len,
+			   char *buf, unsigned long blksize)
+{
+	int err;
+	size_t sz, rbytes, wbytes;
+	unsigned char all_zero;
+	char *p, *zp;
+	struct mutex *h_mtx;
+	/* reduce stack usage */
+	struct iattr *ia;
+
+	zp = page_address(ZERO_PAGE(0));
+	if (unlikely(!zp))
+		return -ENOMEM; /* possible? */
+
+	err = 0;
+	all_zero = 0;
+	while (len) {
+		AuDbg("len %lld\n", len);
+		sz = blksize;
+		if (len < blksize)
+			sz = len;
+
+		rbytes = 0;
+		/* todo: signal_pending? */
+		while (!rbytes || err == -EAGAIN || err == -EINTR) {
+			rbytes = vfsub_read_k(src, buf, sz, &src->f_pos);
+			err = rbytes;
+		}
+		if (unlikely(err < 0))
+			break;
+
+		all_zero = 0;
+		if (len >= rbytes && rbytes == blksize)
+			all_zero = !memcmp(buf, zp, rbytes);
+		if (!all_zero) {
+			wbytes = rbytes;
+			p = buf;
+			while (wbytes) {
+				size_t b;
+
+				b = vfsub_write_k(dst, p, wbytes, &dst->f_pos);
+				err = b;
+				/* todo: signal_pending? */
+				if (unlikely(err == -EAGAIN || err == -EINTR))
+					continue;
+				if (unlikely(err < 0))
+					break;
+				wbytes -= b;
+				p += b;
+			}
+		} else {
+			loff_t res;
+
+			AuLabel(hole);
+			res = vfsub_llseek(dst, rbytes, SEEK_CUR);
+			err = res;
+			if (unlikely(res < 0))
+				break;
+		}
+		len -= rbytes;
+		err = 0;
+	}
+
+	/* the last block may be a hole */
+	if (!err && all_zero) {
+		AuLabel(last hole);
+
+		err = 1;
+		if (au_test_nfs(dst->f_dentry->d_sb)) {
+			/* nfs requires this step to make last hole */
+			/* is this only nfs? */
+			do {
+				/* todo: signal_pending? */
+				err = vfsub_write_k(dst, "\0", 1, &dst->f_pos);
+			} while (err == -EAGAIN || err == -EINTR);
+			if (err == 1)
+				dst->f_pos--;
+		}
+
+		if (err == 1) {
+			ia = (void *)buf;
+			ia->ia_size = dst->f_pos;
+			ia->ia_valid = ATTR_SIZE | ATTR_FILE;
+			ia->ia_file = dst;
+			h_mtx = &dst->f_dentry->d_inode->i_mutex;
+			mutex_lock_nested(h_mtx, AuLsc_I_CHILD2);
+			err = vfsub_notify_change(&dst->f_path, ia);
+			mutex_unlock(h_mtx);
+		}
+	}
+
+	return err;
+}
+
+int au_copy_file(struct file *dst, struct file *src, loff_t len)
+{
+	int err;
+	unsigned long blksize;
+	unsigned char do_kfree;
+	char *buf;
+
+	err = -ENOMEM;
+	blksize = dst->f_dentry->d_sb->s_blocksize;
+	if (!blksize || PAGE_SIZE < blksize)
+		blksize = PAGE_SIZE;
+	AuDbg("blksize %lu\n", blksize);
+	do_kfree = (blksize != PAGE_SIZE && blksize >= sizeof(struct iattr *));
+	if (do_kfree)
+		buf = kmalloc(blksize, GFP_NOFS);
+	else
+		buf = (void *)__get_free_page(GFP_NOFS);
+	if (unlikely(!buf))
+		goto out;
+
+	if (len > (1 << 22))
+		AuDbg("copying a large file %lld\n", (long long)len);
+
+	src->f_pos = 0;
+	dst->f_pos = 0;
+	err = au_do_copy_file(dst, src, len, buf, blksize);
+	if (do_kfree)
+		kfree(buf);
+	else
+		free_page((unsigned long)buf);
+
+ out:
+	return err;
+}
+
+/*
+ * to support a sparse file which is opened with O_APPEND,
+ * we need to close the file.
+ */
+static int au_cp_regular(struct dentry *dentry, aufs_bindex_t bdst,
+			aufs_bindex_t bsrc, loff_t len)
+{
+	int err, i;
+	enum { SRC, DST };
+	struct {
+		aufs_bindex_t bindex;
+		unsigned int flags;
+		struct dentry *dentry;
+		struct file *file;
+		void *label, *label_file;
+	} *f, file[] = {
+		{
+			.bindex = bsrc,
+			.flags = O_RDONLY | O_NOATIME | O_LARGEFILE,
+			.file = NULL,
+			.label = &&out,
+			.label_file = &&out_src
+		},
+		{
+			.bindex = bdst,
+			.flags = O_WRONLY | O_NOATIME | O_LARGEFILE,
+			.file = NULL,
+			.label = &&out_src,
+			.label_file = &&out_dst
+		}
+	};
+	struct super_block *sb;
+
+	/* bsrc branch can be ro/rw. */
+	sb = dentry->d_sb;
+	f = file;
+	for (i = 0; i < 2; i++, f++) {
+		f->dentry = au_h_dptr(dentry, f->bindex);
+		f->file = au_h_open(dentry, f->bindex, f->flags, /*file*/NULL);
+		err = PTR_ERR(f->file);
+		if (IS_ERR(f->file))
+			goto *f->label;
+		err = -EINVAL;
+		if (unlikely(!f->file->f_op))
+			goto *f->label_file;
+	}
+
+	/* try stopping to update while we copyup */
+	IMustLock(file[SRC].dentry->d_inode);
+	err = au_copy_file(file[DST].file, file[SRC].file, len);
+
+ out_dst:
+	fput(file[DST].file);
+	au_sbr_put(sb, file[DST].bindex);
+ out_src:
+	fput(file[SRC].file);
+	au_sbr_put(sb, file[SRC].bindex);
+ out:
+	return err;
+}
+
+static int au_do_cpup_regular(struct dentry *dentry, aufs_bindex_t bdst,
+			      aufs_bindex_t bsrc, loff_t len,
+			      struct inode *h_dir, struct path *h_path)
+{
+	int err, rerr;
+	loff_t l;
+
+	err = 0;
+	l = i_size_read(au_h_iptr(dentry->d_inode, bsrc));
+	if (len == -1 || l < len)
+		len = l;
+	if (len)
+		err = au_cp_regular(dentry, bdst, bsrc, len);
+	if (!err)
+		goto out; /* success */
+
+	rerr = vfsub_unlink(h_dir, h_path, /*force*/0);
+	if (rerr) {
+		AuIOErr("failed unlinking cpup-ed %.*s(%d, %d)\n",
+			AuDLNPair(h_path->dentry), err, rerr);
+		err = -EIO;
+	}
+
+ out:
+	return err;
+}
+
+static int au_do_cpup_symlink(struct path *h_path, struct dentry *h_src,
+			      struct inode *h_dir)
+{
+	int err, symlen;
+	mm_segment_t old_fs;
+	char *sym;
+
+	err = -ENOSYS;
+	if (unlikely(!h_src->d_inode->i_op->readlink))
+		goto out;
+
+	err = -ENOMEM;
+	sym = __getname();
+	if (unlikely(!sym))
+		goto out;
+
+	old_fs = get_fs();
+	set_fs(KERNEL_DS);
+	symlen = h_src->d_inode->i_op->readlink(h_src, (char __user *)sym,
+						PATH_MAX);
+	err = symlen;
+	set_fs(old_fs);
+
+	if (symlen > 0) {
+		sym[symlen] = 0;
+		err = vfsub_symlink(h_dir, h_path, sym);
+	}
+	__putname(sym);
+
+ out:
+	return err;
+}
+
+/* return with the lower dst inode is locked */
+static noinline_for_stack
+int cpup_entry(struct dentry *dentry, aufs_bindex_t bdst,
+	       aufs_bindex_t bsrc, loff_t len, unsigned int flags,
+	       struct dentry *dst_parent)
+{
+	int err;
+	umode_t mode;
+	unsigned int mnt_flags;
+	unsigned char isdir;
+	const unsigned char do_dt = !!au_ftest_cpup(flags, DTIME);
+	struct au_dtime dt;
+	struct path h_path;
+	struct dentry *h_src, *h_dst, *h_parent;
+	struct inode *h_inode, *h_dir;
+	struct super_block *sb;
+
+	/* bsrc branch can be ro/rw. */
+	h_src = au_h_dptr(dentry, bsrc);
+	h_inode = h_src->d_inode;
+	AuDebugOn(h_inode != au_h_iptr(dentry->d_inode, bsrc));
+
+	/* try stopping to be referenced while we are creating */
+	h_dst = au_h_dptr(dentry, bdst);
+	h_parent = h_dst->d_parent; /* dir inode is locked */
+	h_dir = h_parent->d_inode;
+	IMustLock(h_dir);
+	AuDebugOn(h_parent != h_dst->d_parent);
+
+	sb = dentry->d_sb;
+	h_path.mnt = au_sbr_mnt(sb, bdst);
+	if (do_dt) {
+		h_path.dentry = h_parent;
+		au_dtime_store(&dt, dst_parent, &h_path);
+	}
+	h_path.dentry = h_dst;
+
+	isdir = 0;
+	mode = h_inode->i_mode;
+	switch (mode & S_IFMT) {
+	case S_IFREG:
+		/* try stopping to update while we are referencing */
+		IMustLock(h_inode);
+		err = vfsub_create(h_dir, &h_path, mode | S_IWUSR);
+		if (!err)
+			err = au_do_cpup_regular
+				(dentry, bdst, bsrc, len,
+				 au_h_iptr(dst_parent->d_inode, bdst), &h_path);
+		break;
+	case S_IFDIR:
+		isdir = 1;
+		err = vfsub_mkdir(h_dir, &h_path, mode);
+		if (!err) {
+			/*
+			 * strange behaviour from the users view,
+			 * particularry setattr case
+			 */
+			if (au_ibstart(dst_parent->d_inode) == bdst)
+				au_cpup_attr_nlink(dst_parent->d_inode,
+						   /*force*/1);
+			au_cpup_attr_nlink(dentry->d_inode, /*force*/1);
+		}
+		break;
+	case S_IFLNK:
+		err = au_do_cpup_symlink(&h_path, h_src, h_dir);
+		break;
+	case S_IFCHR:
+	case S_IFBLK:
+		AuDebugOn(!capable(CAP_MKNOD));
+		/*FALLTHROUGH*/
+	case S_IFIFO:
+	case S_IFSOCK:
+		err = vfsub_mknod(h_dir, &h_path, mode, h_inode->i_rdev);
+		break;
+	default:
+		AuIOErr("Unknown inode type 0%o\n", mode);
+		err = -EIO;
+	}
+
+	mnt_flags = au_mntflags(sb);
+	if (!au_opt_test(mnt_flags, UDBA_NONE)
+	    && !isdir
+	    && au_opt_test(mnt_flags, XINO)
+	    && h_inode->i_nlink == 1
+	    /* todo: unnecessary? */
+	    /* && dentry->d_inode->i_nlink == 1 */
+	    && bdst < bsrc
+	    && !au_ftest_cpup(flags, KEEPLINO))
+		au_xino_write(sb, bsrc, h_inode->i_ino, /*ino*/0);
+		/* ignore this error */
+
+	if (do_dt)
+		au_dtime_revert(&dt);
+	return err;
+}
+
+/*
+ * copyup the @dentry from @bsrc to @bdst.
+ * the caller must set the both of lower dentries.
+ * @len is for truncating when it is -1 copyup the entire file.
+ * in link/rename cases, @dst_parent may be different from the real one.
+ */
+static int au_cpup_single(struct dentry *dentry, aufs_bindex_t bdst,
+			  aufs_bindex_t bsrc, loff_t len, unsigned int flags,
+			  struct dentry *dst_parent)
+{
+	int err, rerr;
+	aufs_bindex_t old_ibstart;
+	unsigned char isdir, plink;
+	struct au_dtime dt;
+	struct path h_path;
+	struct dentry *h_src, *h_dst, *h_parent;
+	struct inode *dst_inode, *h_dir, *inode;
+	struct super_block *sb;
+
+	AuDebugOn(bsrc <= bdst);
+
+	sb = dentry->d_sb;
+	h_path.mnt = au_sbr_mnt(sb, bdst);
+	h_dst = au_h_dptr(dentry, bdst);
+	h_parent = h_dst->d_parent; /* dir inode is locked */
+	h_dir = h_parent->d_inode;
+	IMustLock(h_dir);
+
+	h_src = au_h_dptr(dentry, bsrc);
+	inode = dentry->d_inode;
+
+	if (!dst_parent)
+		dst_parent = dget_parent(dentry);
+	else
+		dget(dst_parent);
+
+	plink = !!au_opt_test(au_mntflags(sb), PLINK);
+	dst_inode = au_h_iptr(inode, bdst);
+	if (dst_inode) {
+		if (unlikely(!plink)) {
+			err = -EIO;
+			AuIOErr("i%lu exists on a upper branch "
+				"but plink is disabled\n", inode->i_ino);
+			goto out;
+		}
+
+		if (dst_inode->i_nlink) {
+			const int do_dt = au_ftest_cpup(flags, DTIME);
+
+			h_src = au_plink_lkup(inode, bdst);
+			err = PTR_ERR(h_src);
+			if (IS_ERR(h_src))
+				goto out;
+			if (unlikely(!h_src->d_inode)) {
+				err = -EIO;
+				AuIOErr("i%lu exists on a upper branch "
+					"but plink is broken\n", inode->i_ino);
+				dput(h_src);
+				goto out;
+			}
+
+			if (do_dt) {
+				h_path.dentry = h_parent;
+				au_dtime_store(&dt, dst_parent, &h_path);
+			}
+			h_path.dentry = h_dst;
+			err = vfsub_link(h_src, h_dir, &h_path);
+			if (do_dt)
+				au_dtime_revert(&dt);
+			dput(h_src);
+			goto out;
+		} else
+			/* todo: cpup_wh_file? */
+			/* udba work */
+			au_update_brange(inode, 1);
+	}
+
+	old_ibstart = au_ibstart(inode);
+	err = cpup_entry(dentry, bdst, bsrc, len, flags, dst_parent);
+	if (unlikely(err))
+		goto out;
+	dst_inode = h_dst->d_inode;
+	mutex_lock_nested(&dst_inode->i_mutex, AuLsc_I_CHILD2);
+
+	err = cpup_iattr(dentry, bdst, h_src);
+	isdir = S_ISDIR(dst_inode->i_mode);
+	if (!err) {
+		if (bdst < old_ibstart)
+			au_set_ibstart(inode, bdst);
+		au_set_h_iptr(inode, bdst, au_igrab(dst_inode),
+			      au_hi_flags(inode, isdir));
+		mutex_unlock(&dst_inode->i_mutex);
+		if (!isdir
+		    && h_src->d_inode->i_nlink > 1
+		    && plink)
+			au_plink_append(inode, bdst, h_dst);
+		goto out; /* success */
+	}
+
+	/* revert */
+	h_path.dentry = h_parent;
+	mutex_unlock(&dst_inode->i_mutex);
+	au_dtime_store(&dt, dst_parent, &h_path);
+	h_path.dentry = h_dst;
+	if (!isdir)
+		rerr = vfsub_unlink(h_dir, &h_path, /*force*/0);
+	else
+		rerr = vfsub_rmdir(h_dir, &h_path);
+	au_dtime_revert(&dt);
+	if (rerr) {
+		AuIOErr("failed removing broken entry(%d, %d)\n", err, rerr);
+		err = -EIO;
+	}
+
+ out:
+	dput(dst_parent);
+	return err;
+}
+
+struct au_cpup_single_args {
+	int *errp;
+	struct dentry *dentry;
+	aufs_bindex_t bdst, bsrc;
+	loff_t len;
+	unsigned int flags;
+	struct dentry *dst_parent;
+};
+
+static void au_call_cpup_single(void *args)
+{
+	struct au_cpup_single_args *a = args;
+	*a->errp = au_cpup_single(a->dentry, a->bdst, a->bsrc, a->len,
+				  a->flags, a->dst_parent);
+}
+
+int au_sio_cpup_single(struct dentry *dentry, aufs_bindex_t bdst,
+		       aufs_bindex_t bsrc, loff_t len, unsigned int flags,
+		       struct dentry *dst_parent)
+{
+	int err, wkq_err;
+	umode_t mode;
+	struct dentry *h_dentry;
+
+	h_dentry = au_h_dptr(dentry, bsrc);
+	mode = h_dentry->d_inode->i_mode & S_IFMT;
+	if ((mode != S_IFCHR && mode != S_IFBLK)
+	    || capable(CAP_MKNOD))
+		err = au_cpup_single(dentry, bdst, bsrc, len, flags,
+				     dst_parent);
+	else {
+		struct au_cpup_single_args args = {
+			.errp		= &err,
+			.dentry		= dentry,
+			.bdst		= bdst,
+			.bsrc		= bsrc,
+			.len		= len,
+			.flags		= flags,
+			.dst_parent	= dst_parent
+		};
+		wkq_err = au_wkq_wait(au_call_cpup_single, &args);
+		if (unlikely(wkq_err))
+			err = wkq_err;
+	}
+
+	return err;
+}
+
+/*
+ * copyup the @dentry from the first active lower branch to @bdst,
+ * using au_cpup_single().
+ */
+static int au_cpup_simple(struct dentry *dentry, aufs_bindex_t bdst, loff_t len,
+			  unsigned int flags)
+{
+	int err;
+	aufs_bindex_t bsrc, bend;
+
+	bend = au_dbend(dentry);
+	for (bsrc = bdst + 1; bsrc <= bend; bsrc++)
+		if (au_h_dptr(dentry, bsrc))
+			break;
+
+	err = au_lkup_neg(dentry, bdst);
+	if (!err) {
+		err = au_cpup_single(dentry, bdst, bsrc, len, flags, NULL);
+		if (!err)
+			return 0; /* success */
+
+		/* revert */
+		au_set_h_dptr(dentry, bdst, NULL);
+		au_set_dbstart(dentry, bsrc);
+	}
+
+	return err;
+}
+
+struct au_cpup_simple_args {
+	int *errp;
+	struct dentry *dentry;
+	aufs_bindex_t bdst;
+	loff_t len;
+	unsigned int flags;
+};
+
+static void au_call_cpup_simple(void *args)
+{
+	struct au_cpup_simple_args *a = args;
+	*a->errp = au_cpup_simple(a->dentry, a->bdst, a->len, a->flags);
+}
+
+int au_sio_cpup_simple(struct dentry *dentry, aufs_bindex_t bdst, loff_t len,
+		       unsigned int flags)
+{
+	int err, wkq_err;
+	unsigned char do_sio;
+	struct dentry *parent;
+	struct inode *h_dir;
+
+	parent = dget_parent(dentry);
+	h_dir = au_h_iptr(parent->d_inode, bdst);
+	do_sio = !!au_test_h_perm_sio(h_dir, MAY_EXEC | MAY_WRITE);
+	if (!do_sio) {
+		/*
+		 * testing CAP_MKNOD is for generic fs,
+		 * but CAP_FSETID is for xfs only, currently.
+		 */
+		umode_t mode = dentry->d_inode->i_mode;
+		do_sio = (((mode & (S_IFCHR | S_IFBLK))
+			   && !capable(CAP_MKNOD))
+			  || ((mode & (S_ISUID | S_ISGID))
+			      && !capable(CAP_FSETID)));
+	}
+	if (!do_sio)
+		err = au_cpup_simple(dentry, bdst, len, flags);
+	else {
+		struct au_cpup_simple_args args = {
+			.errp		= &err,
+			.dentry		= dentry,
+			.bdst		= bdst,
+			.len		= len,
+			.flags		= flags
+		};
+		wkq_err = au_wkq_wait(au_call_cpup_simple, &args);
+		if (unlikely(wkq_err))
+			err = wkq_err;
+	}
+
+	dput(parent);
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/*
+ * copyup the deleted file for writing.
+ */
+static int au_do_cpup_wh(struct dentry *dentry, aufs_bindex_t bdst,
+			 struct dentry *wh_dentry, struct file *file,
+			 loff_t len)
+{
+	int err;
+	aufs_bindex_t bstart;
+	struct au_dinfo *dinfo;
+	struct dentry *h_d_dst, *h_d_start;
+
+	dinfo = au_di(dentry);
+	AuRwMustWriteLock(&dinfo->di_rwsem);
+
+	bstart = dinfo->di_bstart;
+	h_d_dst = dinfo->di_hdentry[0 + bdst].hd_dentry;
+	dinfo->di_bstart = bdst;
+	dinfo->di_hdentry[0 + bdst].hd_dentry = wh_dentry;
+	h_d_start = dinfo->di_hdentry[0 + bstart].hd_dentry;
+	if (file)
+		dinfo->di_hdentry[0 + bstart].hd_dentry
+			= au_h_fptr(file, au_fbstart(file))->f_dentry;
+	err = au_cpup_single(dentry, bdst, bstart, len, !AuCpup_DTIME,
+			     /*h_parent*/NULL);
+	if (!err && file) {
+		err = au_reopen_nondir(file);
+		dinfo->di_hdentry[0 + bstart].hd_dentry = h_d_start;
+	}
+	dinfo->di_hdentry[0 + bdst].hd_dentry = h_d_dst;
+	dinfo->di_bstart = bstart;
+
+	return err;
+}
+
+static int au_cpup_wh(struct dentry *dentry, aufs_bindex_t bdst, loff_t len,
+		      struct file *file)
+{
+	int err;
+	struct au_dtime dt;
+	struct dentry *parent, *h_parent, *wh_dentry;
+	struct au_branch *br;
+	struct path h_path;
+
+	br = au_sbr(dentry->d_sb, bdst);
+	parent = dget_parent(dentry);
+	h_parent = au_h_dptr(parent, bdst);
+	wh_dentry = au_whtmp_lkup(h_parent, br, &dentry->d_name);
+	err = PTR_ERR(wh_dentry);
+	if (IS_ERR(wh_dentry))
+		goto out;
+
+	h_path.dentry = h_parent;
+	h_path.mnt = br->br_mnt;
+	au_dtime_store(&dt, parent, &h_path);
+	err = au_do_cpup_wh(dentry, bdst, wh_dentry, file, len);
+	if (unlikely(err))
+		goto out_wh;
+
+	dget(wh_dentry);
+	h_path.dentry = wh_dentry;
+	err = vfsub_unlink(h_parent->d_inode, &h_path, /*force*/0);
+	if (unlikely(err)) {
+		AuIOErr("failed remove copied-up tmp file %.*s(%d)\n",
+			AuDLNPair(wh_dentry), err);
+		err = -EIO;
+	}
+	au_dtime_revert(&dt);
+	au_set_hi_wh(dentry->d_inode, bdst, wh_dentry);
+
+ out_wh:
+	dput(wh_dentry);
+ out:
+	dput(parent);
+	return err;
+}
+
+struct au_cpup_wh_args {
+	int *errp;
+	struct dentry *dentry;
+	aufs_bindex_t bdst;
+	loff_t len;
+	struct file *file;
+};
+
+static void au_call_cpup_wh(void *args)
+{
+	struct au_cpup_wh_args *a = args;
+	*a->errp = au_cpup_wh(a->dentry, a->bdst, a->len, a->file);
+}
+
+int au_sio_cpup_wh(struct dentry *dentry, aufs_bindex_t bdst, loff_t len,
+		   struct file *file)
+{
+	int err, wkq_err;
+	struct dentry *parent, *h_orph, *h_parent, *h_dentry;
+	struct inode *dir, *h_dir, *h_tmpdir, *h_inode;
+	struct au_wbr *wbr;
+
+	parent = dget_parent(dentry);
+	dir = parent->d_inode;
+	h_orph = NULL;
+	h_parent = NULL;
+	h_dir = au_igrab(au_h_iptr(dir, bdst));
+	h_tmpdir = h_dir;
+	if (!h_dir->i_nlink) {
+		wbr = au_sbr(dentry->d_sb, bdst)->br_wbr;
+		h_orph = wbr->wbr_orph;
+
+		h_parent = dget(au_h_dptr(parent, bdst));
+		au_set_h_dptr(parent, bdst, NULL);
+		au_set_h_dptr(parent, bdst, dget(h_orph));
+		h_tmpdir = h_orph->d_inode;
+		au_set_h_iptr(dir, bdst, NULL, 0);
+		au_set_h_iptr(dir, bdst, au_igrab(h_tmpdir), /*flags*/0);
+
+		/* this temporary unlock is safe */
+		if (file)
+			h_dentry = au_h_fptr(file, au_fbstart(file))->f_dentry;
+		else
+			h_dentry = au_h_dptr(dentry, au_dbstart(dentry));
+		h_inode = h_dentry->d_inode;
+		IMustLock(h_inode);
+		mutex_unlock(&h_inode->i_mutex);
+		mutex_lock_nested(&h_tmpdir->i_mutex, AuLsc_I_PARENT3);
+		mutex_lock_nested(&h_inode->i_mutex, AuLsc_I_CHILD);
+	}
+
+	if (!au_test_h_perm_sio(h_tmpdir, MAY_EXEC | MAY_WRITE))
+		err = au_cpup_wh(dentry, bdst, len, file);
+	else {
+		struct au_cpup_wh_args args = {
+			.errp	= &err,
+			.dentry	= dentry,
+			.bdst	= bdst,
+			.len	= len,
+			.file	= file
+		};
+		wkq_err = au_wkq_wait(au_call_cpup_wh, &args);
+		if (unlikely(wkq_err))
+			err = wkq_err;
+	}
+
+	if (h_orph) {
+		mutex_unlock(&h_tmpdir->i_mutex);
+		au_set_h_iptr(dir, bdst, NULL, 0);
+		au_set_h_iptr(dir, bdst, au_igrab(h_dir), /*flags*/0);
+		au_set_h_dptr(parent, bdst, NULL);
+		au_set_h_dptr(parent, bdst, h_parent);
+	}
+	iput(h_dir);
+	dput(parent);
+
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/*
+ * generic routine for both of copy-up and copy-down.
+ */
+/* cf. revalidate function in file.c */
+int au_cp_dirs(struct dentry *dentry, aufs_bindex_t bdst,
+	       int (*cp)(struct dentry *dentry, aufs_bindex_t bdst,
+			 struct dentry *h_parent, void *arg),
+	       void *arg)
+{
+	int err;
+	struct au_pin pin;
+	struct dentry *d, *parent, *h_parent, *real_parent;
+
+	err = 0;
+	parent = dget_parent(dentry);
+	if (IS_ROOT(parent))
+		goto out;
+
+	au_pin_init(&pin, dentry, bdst, AuLsc_DI_PARENT2, AuLsc_I_PARENT2,
+		    au_opt_udba(dentry->d_sb), AuPin_MNT_WRITE);
+
+	/* do not use au_dpage */
+	real_parent = parent;
+	while (1) {
+		dput(parent);
+		parent = dget_parent(dentry);
+		h_parent = au_h_dptr(parent, bdst);
+		if (h_parent)
+			goto out; /* success */
+
+		/* find top dir which is necessary to cpup */
+		do {
+			d = parent;
+			dput(parent);
+			parent = dget_parent(d);
+			di_read_lock_parent3(parent, !AuLock_IR);
+			h_parent = au_h_dptr(parent, bdst);
+			di_read_unlock(parent, !AuLock_IR);
+		} while (!h_parent);
+
+		if (d != real_parent)
+			di_write_lock_child3(d);
+
+		/* somebody else might create while we were sleeping */
+		if (!au_h_dptr(d, bdst) || !au_h_dptr(d, bdst)->d_inode) {
+			if (au_h_dptr(d, bdst))
+				au_update_dbstart(d);
+
+			au_pin_set_dentry(&pin, d);
+			err = au_do_pin(&pin);
+			if (!err) {
+				err = cp(d, bdst, h_parent, arg);
+				au_unpin(&pin);
+			}
+		}
+
+		if (d != real_parent)
+			di_write_unlock(d);
+		if (unlikely(err))
+			break;
+	}
+
+ out:
+	dput(parent);
+	return err;
+}
+
+static int au_cpup_dir(struct dentry *dentry, aufs_bindex_t bdst,
+		       struct dentry *h_parent __maybe_unused ,
+		       void *arg __maybe_unused)
+{
+	return au_sio_cpup_simple(dentry, bdst, -1, AuCpup_DTIME);
+}
+
+int au_cpup_dirs(struct dentry *dentry, aufs_bindex_t bdst)
+{
+	return au_cp_dirs(dentry, bdst, au_cpup_dir, NULL);
+}
+
+int au_test_and_cpup_dirs(struct dentry *dentry, aufs_bindex_t bdst)
+{
+	int err;
+	struct dentry *parent;
+	struct inode *dir;
+
+	parent = dget_parent(dentry);
+	dir = parent->d_inode;
+	err = 0;
+	if (au_h_iptr(dir, bdst))
+		goto out;
+
+	di_read_unlock(parent, AuLock_IR);
+	di_write_lock_parent(parent);
+	/* someone else might change our inode while we were sleeping */
+	if (!au_h_iptr(dir, bdst))
+		err = au_cpup_dirs(dentry, bdst);
+	di_downgrade_lock(parent, AuLock_IR);
+
+ out:
+	dput(parent);
+	return err;
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/dentry.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/dentry.c
@@ -0,0 +1,880 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * lookup and dentry operations
+ */
+
+#include <linux/namei.h>
+#include "aufs.h"
+
+static void au_h_nd(struct nameidata *h_nd, struct nameidata *nd)
+{
+	if (nd) {
+		*h_nd = *nd;
+
+		/*
+		 * gave up supporting LOOKUP_CREATE/OPEN for lower fs,
+		 * due to whiteout and branch permission.
+		 */
+		h_nd->flags &= ~(/*LOOKUP_PARENT |*/ LOOKUP_OPEN | LOOKUP_CREATE
+				 | LOOKUP_FOLLOW);
+		/* unnecessary? */
+		h_nd->intent.open.file = NULL;
+	} else
+		memset(h_nd, 0, sizeof(*h_nd));
+}
+
+struct au_lkup_one_args {
+	struct dentry **errp;
+	struct qstr *name;
+	struct dentry *h_parent;
+	struct au_branch *br;
+	struct nameidata *nd;
+};
+
+struct dentry *au_lkup_one(struct qstr *name, struct dentry *h_parent,
+			   struct au_branch *br, struct nameidata *nd)
+{
+	struct dentry *h_dentry;
+	int err;
+	struct nameidata h_nd;
+
+	if (au_test_fs_null_nd(h_parent->d_sb))
+		return vfsub_lookup_one_len(name->name, h_parent, name->len);
+
+	au_h_nd(&h_nd, nd);
+	h_nd.path.dentry = h_parent;
+	h_nd.path.mnt = br->br_mnt;
+
+	err = __lookup_one_len(name->name, &h_nd.last, NULL, name->len);
+	h_dentry = ERR_PTR(err);
+	if (!err) {
+		path_get(&h_nd.path);
+		h_dentry = vfsub_lookup_hash(&h_nd);
+		path_put(&h_nd.path);
+	}
+
+	AuTraceErrPtr(h_dentry);
+	return h_dentry;
+}
+
+static void au_call_lkup_one(void *args)
+{
+	struct au_lkup_one_args *a = args;
+	*a->errp = au_lkup_one(a->name, a->h_parent, a->br, a->nd);
+}
+
+#define AuLkup_ALLOW_NEG	1
+#define au_ftest_lkup(flags, name)	((flags) & AuLkup_##name)
+#define au_fset_lkup(flags, name)	{ (flags) |= AuLkup_##name; }
+#define au_fclr_lkup(flags, name)	{ (flags) &= ~AuLkup_##name; }
+
+struct au_do_lookup_args {
+	unsigned int		flags;
+	mode_t			type;
+	struct nameidata	*nd;
+};
+
+/*
+ * returns positive/negative dentry, NULL or an error.
+ * NULL means whiteout-ed or not-found.
+ */
+static struct dentry*
+au_do_lookup(struct dentry *h_parent, struct dentry *dentry,
+	     aufs_bindex_t bindex, struct qstr *wh_name,
+	     struct au_do_lookup_args *args)
+{
+	struct dentry *h_dentry;
+	struct inode *h_inode, *inode;
+	struct qstr *name;
+	struct au_branch *br;
+	int wh_found, opq;
+	unsigned char wh_able;
+	const unsigned char allow_neg = !!au_ftest_lkup(args->flags, ALLOW_NEG);
+
+	name = &dentry->d_name;
+	wh_found = 0;
+	br = au_sbr(dentry->d_sb, bindex);
+	wh_able = !!au_br_whable(br->br_perm);
+	if (wh_able)
+		wh_found = au_wh_test(h_parent, wh_name, br, /*try_sio*/0);
+	h_dentry = ERR_PTR(wh_found);
+	if (!wh_found)
+		goto real_lookup;
+	if (unlikely(wh_found < 0))
+		goto out;
+
+	/* We found a whiteout */
+	/* au_set_dbend(dentry, bindex); */
+	au_set_dbwh(dentry, bindex);
+	if (!allow_neg)
+		return NULL; /* success */
+
+ real_lookup:
+	h_dentry = au_lkup_one(name, h_parent, br, args->nd);
+	if (IS_ERR(h_dentry))
+		goto out;
+
+	h_inode = h_dentry->d_inode;
+	if (!h_inode) {
+		if (!allow_neg)
+			goto out_neg;
+	} else if (wh_found
+		   || (args->type && args->type != (h_inode->i_mode & S_IFMT)))
+		goto out_neg;
+
+	if (au_dbend(dentry) <= bindex)
+		au_set_dbend(dentry, bindex);
+	if (au_dbstart(dentry) < 0 || bindex < au_dbstart(dentry))
+		au_set_dbstart(dentry, bindex);
+	au_set_h_dptr(dentry, bindex, h_dentry);
+
+	inode = dentry->d_inode;
+	if (!h_inode || !S_ISDIR(h_inode->i_mode) || !wh_able
+	    || (inode && !S_ISDIR(inode->i_mode)))
+		goto out; /* success */
+
+	mutex_lock_nested(&h_inode->i_mutex, AuLsc_I_CHILD);
+	opq = au_diropq_test(h_dentry, br);
+	mutex_unlock(&h_inode->i_mutex);
+	if (opq > 0)
+		au_set_dbdiropq(dentry, bindex);
+	else if (unlikely(opq < 0)) {
+		au_set_h_dptr(dentry, bindex, NULL);
+		h_dentry = ERR_PTR(opq);
+	}
+	goto out;
+
+ out_neg:
+	dput(h_dentry);
+	h_dentry = NULL;
+ out:
+	return h_dentry;
+}
+
+static int au_test_shwh(struct super_block *sb, const struct qstr *name)
+{
+	if (unlikely(!au_opt_test(au_mntflags(sb), SHWH)
+		     && !strncmp(name->name, AUFS_WH_PFX, AUFS_WH_PFX_LEN)))
+		return -EPERM;
+	return 0;
+}
+
+/*
+ * returns the number of lower positive dentries,
+ * otherwise an error.
+ * can be called at unlinking with @type is zero.
+ */
+int au_lkup_dentry(struct dentry *dentry, aufs_bindex_t bstart, mode_t type,
+		   struct nameidata *nd)
+{
+	int npositive, err;
+	aufs_bindex_t bindex, btail, bdiropq;
+	unsigned char isdir;
+	struct qstr whname;
+	struct au_do_lookup_args args = {
+		.flags	= 0,
+		.type	= type,
+		.nd	= nd
+	};
+	const struct qstr *name = &dentry->d_name;
+	struct dentry *parent;
+	struct inode *inode;
+
+	parent = dget_parent(dentry);
+	err = au_test_shwh(dentry->d_sb, name);
+	if (unlikely(err))
+		goto out;
+
+	err = au_wh_name_alloc(&whname, name);
+	if (unlikely(err))
+		goto out;
+
+	inode = dentry->d_inode;
+	isdir = !!(inode && S_ISDIR(inode->i_mode));
+	if (!type)
+		au_fset_lkup(args.flags, ALLOW_NEG);
+
+	npositive = 0;
+	btail = au_dbtaildir(parent);
+	for (bindex = bstart; bindex <= btail; bindex++) {
+		struct dentry *h_parent, *h_dentry;
+		struct inode *h_inode, *h_dir;
+
+		h_dentry = au_h_dptr(dentry, bindex);
+		if (h_dentry) {
+			if (h_dentry->d_inode)
+				npositive++;
+			if (type != S_IFDIR)
+				break;
+			continue;
+		}
+		h_parent = au_h_dptr(parent, bindex);
+		if (!h_parent)
+			continue;
+		h_dir = h_parent->d_inode;
+		if (!h_dir || !S_ISDIR(h_dir->i_mode))
+			continue;
+
+		mutex_lock_nested(&h_dir->i_mutex, AuLsc_I_PARENT);
+		h_dentry = au_do_lookup(h_parent, dentry, bindex, &whname,
+					&args);
+		mutex_unlock(&h_dir->i_mutex);
+		err = PTR_ERR(h_dentry);
+		if (IS_ERR(h_dentry))
+			goto out_wh;
+		au_fclr_lkup(args.flags, ALLOW_NEG);
+
+		if (au_dbwh(dentry) >= 0)
+			break;
+		if (!h_dentry)
+			continue;
+		h_inode = h_dentry->d_inode;
+		if (!h_inode)
+			continue;
+		npositive++;
+		if (!args.type)
+			args.type = h_inode->i_mode & S_IFMT;
+		if (args.type != S_IFDIR)
+			break;
+		else if (isdir) {
+			/* the type of lower may be different */
+			bdiropq = au_dbdiropq(dentry);
+			if (bdiropq >= 0 && bdiropq <= bindex)
+				break;
+		}
+	}
+
+	if (npositive) {
+		AuLabel(positive);
+		au_update_dbstart(dentry);
+	}
+	err = npositive;
+	if (unlikely(!au_opt_test(au_mntflags(dentry->d_sb), UDBA_NONE)
+		     && au_dbstart(dentry) < 0))
+		/* both of real entry and whiteout found */
+		err = -EIO;
+
+ out_wh:
+	kfree(whname.name);
+ out:
+	dput(parent);
+	return err;
+}
+
+struct dentry *au_sio_lkup_one(struct qstr *name, struct dentry *parent,
+			       struct au_branch *br)
+{
+	struct dentry *dentry;
+	int wkq_err;
+
+	if (!au_test_h_perm_sio(parent->d_inode, MAY_EXEC))
+		dentry = au_lkup_one(name, parent, br, /*nd*/NULL);
+	else {
+		struct au_lkup_one_args args = {
+			.errp		= &dentry,
+			.name		= name,
+			.h_parent	= parent,
+			.br		= br,
+			.nd		= NULL
+		};
+
+		wkq_err = au_wkq_wait(au_call_lkup_one, &args);
+		if (unlikely(wkq_err))
+			dentry = ERR_PTR(wkq_err);
+	}
+
+	return dentry;
+}
+
+/*
+ * lookup @dentry on @bindex which should be negative.
+ */
+int au_lkup_neg(struct dentry *dentry, aufs_bindex_t bindex)
+{
+	int err;
+	struct dentry *parent, *h_parent, *h_dentry;
+	struct qstr *name;
+
+	name = &dentry->d_name;
+	parent = dget_parent(dentry);
+	h_parent = au_h_dptr(parent, bindex);
+	h_dentry = au_sio_lkup_one(name, h_parent,
+				   au_sbr(dentry->d_sb, bindex));
+	err = PTR_ERR(h_dentry);
+	if (IS_ERR(h_dentry))
+		goto out;
+	if (unlikely(h_dentry->d_inode)) {
+		err = -EIO;
+		AuIOErr("b%d %.*s should be negative.\n",
+			bindex, AuDLNPair(h_dentry));
+		dput(h_dentry);
+		goto out;
+	}
+
+	if (bindex < au_dbstart(dentry))
+		au_set_dbstart(dentry, bindex);
+	if (au_dbend(dentry) < bindex)
+		au_set_dbend(dentry, bindex);
+	au_set_h_dptr(dentry, bindex, h_dentry);
+	err = 0;
+
+ out:
+	dput(parent);
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* subset of struct inode */
+struct au_iattr {
+	unsigned long		i_ino;
+	/* unsigned int		i_nlink; */
+	uid_t			i_uid;
+	gid_t			i_gid;
+	u64			i_version;
+/*
+	loff_t			i_size;
+	blkcnt_t		i_blocks;
+*/
+	umode_t			i_mode;
+};
+
+static void au_iattr_save(struct au_iattr *ia, struct inode *h_inode)
+{
+	ia->i_ino = h_inode->i_ino;
+	/* ia->i_nlink = h_inode->i_nlink; */
+	ia->i_uid = h_inode->i_uid;
+	ia->i_gid = h_inode->i_gid;
+	ia->i_version = h_inode->i_version;
+/*
+	ia->i_size = h_inode->i_size;
+	ia->i_blocks = h_inode->i_blocks;
+*/
+	ia->i_mode = (h_inode->i_mode & S_IFMT);
+}
+
+static int au_iattr_test(struct au_iattr *ia, struct inode *h_inode)
+{
+	return ia->i_ino != h_inode->i_ino
+		/* || ia->i_nlink != h_inode->i_nlink */
+		|| ia->i_uid != h_inode->i_uid
+		|| ia->i_gid != h_inode->i_gid
+		|| ia->i_version != h_inode->i_version
+/*
+		|| ia->i_size != h_inode->i_size
+		|| ia->i_blocks != h_inode->i_blocks
+*/
+		|| ia->i_mode != (h_inode->i_mode & S_IFMT);
+}
+
+static int au_h_verify_dentry(struct dentry *h_dentry, struct dentry *h_parent,
+			      struct au_branch *br)
+{
+	int err;
+	struct au_iattr ia;
+	struct inode *h_inode;
+	struct dentry *h_d;
+	struct super_block *h_sb;
+
+	err = 0;
+	memset(&ia, -1, sizeof(ia));
+	h_sb = h_dentry->d_sb;
+	h_inode = h_dentry->d_inode;
+	if (h_inode)
+		au_iattr_save(&ia, h_inode);
+	else if (au_test_nfs(h_sb) || au_test_fuse(h_sb))
+		/* nfs d_revalidate may return 0 for negative dentry */
+		/* fuse d_revalidate always return 0 for negative dentry */
+		goto out;
+
+	/* main purpose is namei.c:cached_lookup() and d_revalidate */
+	h_d = au_lkup_one(&h_dentry->d_name, h_parent, br, /*nd*/NULL);
+	err = PTR_ERR(h_d);
+	if (IS_ERR(h_d))
+		goto out;
+
+	err = 0;
+	if (unlikely(h_d != h_dentry
+		     || h_d->d_inode != h_inode
+		     || (h_inode && au_iattr_test(&ia, h_inode))))
+		err = au_busy_or_stale();
+	dput(h_d);
+
+ out:
+	AuTraceErr(err);
+	return err;
+}
+
+int au_h_verify(struct dentry *h_dentry, unsigned int udba, struct inode *h_dir,
+		struct dentry *h_parent, struct au_branch *br)
+{
+	int err;
+
+	err = 0;
+	if (udba == AuOpt_UDBA_REVAL) {
+		IMustLock(h_dir);
+		err = (h_dentry->d_parent->d_inode != h_dir);
+	} else if (udba == AuOpt_UDBA_HINOTIFY)
+		err = au_h_verify_dentry(h_dentry, h_parent, br);
+
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+static void au_do_refresh_hdentry(struct au_hdentry *p, struct au_dinfo *dinfo,
+				  struct dentry *parent)
+{
+	struct dentry *h_d, *h_dp;
+	struct au_hdentry tmp, *q;
+	struct super_block *sb;
+	aufs_bindex_t new_bindex, bindex, bend, bwh, bdiropq;
+
+	AuRwMustWriteLock(&dinfo->di_rwsem);
+
+	bend = dinfo->di_bend;
+	bwh = dinfo->di_bwh;
+	bdiropq = dinfo->di_bdiropq;
+	for (bindex = dinfo->di_bstart; bindex <= bend; bindex++, p++) {
+		h_d = p->hd_dentry;
+		if (!h_d)
+			continue;
+
+		h_dp = dget_parent(h_d);
+		if (h_dp == au_h_dptr(parent, bindex)) {
+			dput(h_dp);
+			continue;
+		}
+
+		new_bindex = au_find_dbindex(parent, h_dp);
+		dput(h_dp);
+		if (dinfo->di_bwh == bindex)
+			bwh = new_bindex;
+		if (dinfo->di_bdiropq == bindex)
+			bdiropq = new_bindex;
+		if (new_bindex < 0) {
+			au_hdput(p);
+			p->hd_dentry = NULL;
+			continue;
+		}
+
+		/* swap two lower dentries, and loop again */
+		q = dinfo->di_hdentry + new_bindex;
+		tmp = *q;
+		*q = *p;
+		*p = tmp;
+		if (tmp.hd_dentry) {
+			bindex--;
+			p--;
+		}
+	}
+
+	sb = parent->d_sb;
+	dinfo->di_bwh = -1;
+	if (bwh >= 0 && bwh <= au_sbend(sb) && au_sbr_whable(sb, bwh))
+		dinfo->di_bwh = bwh;
+
+	dinfo->di_bdiropq = -1;
+	if (bdiropq >= 0
+	    && bdiropq <= au_sbend(sb)
+	    && au_sbr_whable(sb, bdiropq))
+		dinfo->di_bdiropq = bdiropq;
+
+	bend = au_dbend(parent);
+	p = dinfo->di_hdentry;
+	for (bindex = 0; bindex <= bend; bindex++, p++)
+		if (p->hd_dentry) {
+			dinfo->di_bstart = bindex;
+			break;
+		}
+
+	p = dinfo->di_hdentry + bend;
+	for (bindex = bend; bindex >= 0; bindex--, p--)
+		if (p->hd_dentry) {
+			dinfo->di_bend = bindex;
+			break;
+		}
+}
+
+/*
+ * returns the number of found lower positive dentries,
+ * otherwise an error.
+ */
+int au_refresh_hdentry(struct dentry *dentry, mode_t type)
+{
+	int npositive, err;
+	unsigned int sigen;
+	aufs_bindex_t bstart;
+	struct au_dinfo *dinfo;
+	struct super_block *sb;
+	struct dentry *parent;
+
+	DiMustWriteLock(dentry);
+
+	sb = dentry->d_sb;
+	AuDebugOn(IS_ROOT(dentry));
+	sigen = au_sigen(sb);
+	parent = dget_parent(dentry);
+	AuDebugOn(au_digen(parent) != sigen
+		  || au_iigen(parent->d_inode) != sigen);
+
+	dinfo = au_di(dentry);
+	err = au_di_realloc(dinfo, au_sbend(sb) + 1);
+	npositive = err;
+	if (unlikely(err))
+		goto out;
+	au_do_refresh_hdentry(dinfo->di_hdentry + dinfo->di_bstart, dinfo,
+			      parent);
+
+	npositive = 0;
+	bstart = au_dbstart(parent);
+	if (type != S_IFDIR && dinfo->di_bstart == bstart)
+		goto out_dgen; /* success */
+
+	npositive = au_lkup_dentry(dentry, bstart, type, /*nd*/NULL);
+	if (npositive < 0)
+		goto out;
+	if (dinfo->di_bwh >= 0 && dinfo->di_bwh <= dinfo->di_bstart)
+		d_drop(dentry);
+
+ out_dgen:
+	au_update_digen(dentry);
+ out:
+	dput(parent);
+	AuTraceErr(npositive);
+	return npositive;
+}
+
+static noinline_for_stack
+int au_do_h_d_reval(struct dentry *h_dentry, struct nameidata *nd,
+		    struct dentry *dentry, aufs_bindex_t bindex)
+{
+	int err, valid;
+	int (*reval)(struct dentry *, struct nameidata *);
+
+	err = 0;
+	reval = NULL;
+	if (h_dentry->d_op)
+		reval = h_dentry->d_op->d_revalidate;
+	if (!reval)
+		goto out;
+
+	AuDbg("b%d\n", bindex);
+	if (au_test_fs_null_nd(h_dentry->d_sb))
+		/* it may return tri-state */
+		valid = reval(h_dentry, NULL);
+	else {
+		struct nameidata h_nd;
+		int locked;
+		struct dentry *parent;
+
+		au_h_nd(&h_nd, nd);
+		parent = nd->path.dentry;
+		locked = (nd && nd->path.dentry != dentry);
+		if (locked)
+			di_read_lock_parent(parent, AuLock_IR);
+		BUG_ON(bindex > au_dbend(parent));
+		h_nd.path.dentry = au_h_dptr(parent, bindex);
+		BUG_ON(!h_nd.path.dentry);
+		h_nd.path.mnt = au_sbr(parent->d_sb, bindex)->br_mnt;
+		path_get(&h_nd.path);
+		valid = reval(h_dentry, &h_nd);
+		path_put(&h_nd.path);
+		if (locked)
+			di_read_unlock(parent, AuLock_IR);
+	}
+
+	if (unlikely(valid < 0))
+		err = valid;
+	else if (!valid)
+		err = -EINVAL;
+
+ out:
+	AuTraceErr(err);
+	return err;
+}
+
+/* todo: remove this */
+static int h_d_revalidate(struct dentry *dentry, struct inode *inode,
+			  struct nameidata *nd, int do_udba)
+{
+	int err;
+	umode_t mode, h_mode;
+	aufs_bindex_t bindex, btail, bstart, ibs, ibe;
+	unsigned char plus, unhashed, is_root, h_plus;
+	struct inode *first, *h_inode, *h_cached_inode;
+	struct dentry *h_dentry;
+	struct qstr *name, *h_name;
+
+	err = 0;
+	plus = 0;
+	mode = 0;
+	first = NULL;
+	ibs = -1;
+	ibe = -1;
+	unhashed = !!d_unhashed(dentry);
+	is_root = !!IS_ROOT(dentry);
+	name = &dentry->d_name;
+
+	/*
+	 * Theoretically, REVAL test should be unnecessary in case of INOTIFY.
+	 * But inotify doesn't fire some necessary events,
+	 *	IN_ATTRIB for atime/nlink/pageio
+	 *	IN_DELETE for NFS dentry
+	 * Let's do REVAL test too.
+	 */
+	if (do_udba && inode) {
+		mode = (inode->i_mode & S_IFMT);
+		plus = (inode->i_nlink > 0);
+		first = au_h_iptr(inode, au_ibstart(inode));
+		ibs = au_ibstart(inode);
+		ibe = au_ibend(inode);
+	}
+
+	bstart = au_dbstart(dentry);
+	btail = bstart;
+	if (inode && S_ISDIR(inode->i_mode))
+		btail = au_dbtaildir(dentry);
+	for (bindex = bstart; bindex <= btail; bindex++) {
+		h_dentry = au_h_dptr(dentry, bindex);
+		if (!h_dentry)
+			continue;
+
+		AuDbg("b%d, %.*s\n", bindex, AuDLNPair(h_dentry));
+		h_name = &h_dentry->d_name;
+		if (unlikely(do_udba
+			     && !is_root
+			     && (unhashed != !!d_unhashed(h_dentry)
+				 || name->len != h_name->len
+				 || memcmp(name->name, h_name->name, name->len))
+			    )) {
+			AuDbg("unhash 0x%x 0x%x, %.*s %.*s\n",
+				  unhashed, d_unhashed(h_dentry),
+				  AuDLNPair(dentry), AuDLNPair(h_dentry));
+			goto err;
+		}
+
+		err = au_do_h_d_reval(h_dentry, nd, dentry, bindex);
+		if (unlikely(err))
+			/* do not goto err, to keep the errno */
+			break;
+
+		/* todo: plink too? */
+		if (!do_udba)
+			continue;
+
+		/* UDBA tests */
+		h_inode = h_dentry->d_inode;
+		if (unlikely(!!inode != !!h_inode))
+			goto err;
+
+		h_plus = plus;
+		h_mode = mode;
+		h_cached_inode = h_inode;
+		if (h_inode) {
+			h_mode = (h_inode->i_mode & S_IFMT);
+			h_plus = (h_inode->i_nlink > 0);
+		}
+		if (inode && ibs <= bindex && bindex <= ibe)
+			h_cached_inode = au_h_iptr(inode, bindex);
+
+		if (unlikely(plus != h_plus
+			     || mode != h_mode
+			     || h_cached_inode != h_inode))
+			goto err;
+		continue;
+
+	err:
+		err = -EINVAL;
+		break;
+	}
+
+	return err;
+}
+
+static int simple_reval_dpath(struct dentry *dentry, unsigned int sigen)
+{
+	int err;
+	struct dentry *parent;
+	struct inode *inode;
+
+	inode = dentry->d_inode;
+	if (au_digen(dentry) == sigen && au_iigen(inode) == sigen)
+		return 0;
+
+	parent = dget_parent(dentry);
+	di_read_lock_parent(parent, AuLock_IR);
+	AuDebugOn(au_digen(parent) != sigen
+		  || au_iigen(parent->d_inode) != sigen);
+	au_dbg_verify_gen(parent, sigen);
+
+	/* returns a number of positive dentries */
+	err = au_refresh_hdentry(dentry, inode->i_mode & S_IFMT);
+	if (err >= 0)
+		err = au_refresh_hinode(inode, dentry);
+
+	di_read_unlock(parent, AuLock_IR);
+	dput(parent);
+	return err;
+}
+
+int au_reval_dpath(struct dentry *dentry, unsigned int sigen)
+{
+	int err;
+	struct dentry *d, *parent;
+	struct inode *inode;
+
+	if (!au_ftest_si(au_sbi(dentry->d_sb), FAILED_REFRESH_DIRS))
+		return simple_reval_dpath(dentry, sigen);
+
+	/* slow loop, keep it simple and stupid */
+	/* cf: au_cpup_dirs() */
+	err = 0;
+	parent = NULL;
+	while (au_digen(dentry) != sigen
+	       || au_iigen(dentry->d_inode) != sigen) {
+		d = dentry;
+		while (1) {
+			dput(parent);
+			parent = dget_parent(d);
+			if (au_digen(parent) == sigen
+			    && au_iigen(parent->d_inode) == sigen)
+				break;
+			d = parent;
+		}
+
+		inode = d->d_inode;
+		if (d != dentry)
+			di_write_lock_child(d);
+
+		/* someone might update our dentry while we were sleeping */
+		if (au_digen(d) != sigen || au_iigen(d->d_inode) != sigen) {
+			di_read_lock_parent(parent, AuLock_IR);
+			/* returns a number of positive dentries */
+			err = au_refresh_hdentry(d, inode->i_mode & S_IFMT);
+			if (err >= 0)
+				err = au_refresh_hinode(inode, d);
+			di_read_unlock(parent, AuLock_IR);
+		}
+
+		if (d != dentry)
+			di_write_unlock(d);
+		dput(parent);
+		if (unlikely(err))
+			break;
+	}
+
+	return err;
+}
+
+/*
+ * if valid returns 1, otherwise 0.
+ */
+static int aufs_d_revalidate(struct dentry *dentry, struct nameidata *nd)
+{
+	int valid, err;
+	unsigned int sigen;
+	unsigned char do_udba;
+	struct super_block *sb;
+	struct inode *inode;
+
+	err = -EINVAL;
+	sb = dentry->d_sb;
+	inode = dentry->d_inode;
+	aufs_read_lock(dentry, AuLock_FLUSH | AuLock_DW);
+	sigen = au_sigen(sb);
+	if (au_digen(dentry) != sigen) {
+		AuDebugOn(IS_ROOT(dentry));
+		if (inode)
+			err = au_reval_dpath(dentry, sigen);
+		if (unlikely(err))
+			goto out_dgrade;
+		AuDebugOn(au_digen(dentry) != sigen);
+	}
+	if (inode && au_iigen(inode) != sigen) {
+		AuDebugOn(IS_ROOT(dentry));
+		err = au_refresh_hinode(inode, dentry);
+		if (unlikely(err))
+			goto out_dgrade;
+		AuDebugOn(au_iigen(inode) != sigen);
+	}
+	di_downgrade_lock(dentry, AuLock_IR);
+
+	AuDebugOn(au_digen(dentry) != sigen);
+	AuDebugOn(inode && au_iigen(inode) != sigen);
+	err = -EINVAL;
+	do_udba = !au_opt_test(au_mntflags(sb), UDBA_NONE);
+	if (do_udba && inode) {
+		aufs_bindex_t bstart = au_ibstart(inode);
+
+		if (bstart >= 0
+		    && au_test_higen(inode, au_h_iptr(inode, bstart)))
+			goto out;
+	}
+
+	err = h_d_revalidate(dentry, inode, nd, do_udba);
+	if (unlikely(!err && do_udba && au_dbstart(dentry) < 0))
+		/* both of real entry and whiteout found */
+		err = -EIO;
+	goto out;
+
+ out_dgrade:
+	di_downgrade_lock(dentry, AuLock_IR);
+ out:
+	aufs_read_unlock(dentry, AuLock_IR);
+	AuTraceErr(err);
+	valid = !err;
+	if (!valid)
+		AuDbg("%.*s invalid\n", AuDLNPair(dentry));
+	return valid;
+}
+
+static void aufs_d_release(struct dentry *dentry)
+{
+	struct au_dinfo *dinfo;
+	aufs_bindex_t bend, bindex;
+
+	dinfo = dentry->d_fsdata;
+	if (!dinfo)
+		return;
+
+	/* dentry may not be revalidated */
+	bindex = dinfo->di_bstart;
+	if (bindex >= 0) {
+		struct au_hdentry *p;
+
+		bend = dinfo->di_bend;
+		p = dinfo->di_hdentry + bindex;
+		while (bindex++ <= bend) {
+			if (p->hd_dentry)
+				au_hdput(p);
+			p++;
+		}
+	}
+	kfree(dinfo->di_hdentry);
+	AuRwDestroy(&dinfo->di_rwsem);
+	au_cache_free_dinfo(dinfo);
+	au_hin_di_reinit(dentry);
+}
+
+struct dentry_operations aufs_dop = {
+	.d_revalidate	= aufs_d_revalidate,
+	.d_release	= aufs_d_release
+};
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/vdir.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/vdir.c
@@ -0,0 +1,884 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * virtual or vertical directory
+ */
+
+#include <linux/hash.h>
+#include "aufs.h"
+
+static unsigned int calc_size(int nlen)
+{
+	return ALIGN(sizeof(struct au_vdir_de) + nlen, sizeof(ino_t));
+}
+
+static int set_deblk_end(union au_vdir_deblk_p *p,
+			 union au_vdir_deblk_p *deblk_end)
+{
+	if (calc_size(0) <= deblk_end->deblk - p->deblk) {
+		p->de->de_str.len = 0;
+		/* smp_mb(); */
+		return 0;
+	}
+	return -1; /* error */
+}
+
+/* returns true or false */
+static int is_deblk_end(union au_vdir_deblk_p *p,
+			union au_vdir_deblk_p *deblk_end)
+{
+	if (calc_size(0) <= deblk_end->deblk - p->deblk)
+		return !p->de->de_str.len;
+	return 1;
+}
+
+static unsigned char *last_deblk(struct au_vdir *vdir)
+{
+	return vdir->vd_deblk[vdir->vd_nblk - 1];
+}
+
+/* ---------------------------------------------------------------------- */
+
+/* estimate the apropriate size for name hash table */
+unsigned int au_rdhash_est(loff_t sz)
+{
+	unsigned int n;
+
+	n = UINT_MAX;
+	sz >>= 10;
+	if (sz < n)
+		n = sz;
+	if (sz < AUFS_RDHASH_DEF)
+		n = AUFS_RDHASH_DEF;
+	/* pr_info("n %u\n", n); */
+	return n;
+}
+
+/*
+ * the allocated memory has to be freed by
+ * au_nhash_wh_free() or au_nhash_de_free().
+ */
+int au_nhash_alloc(struct au_nhash *nhash, unsigned int num_hash, gfp_t gfp)
+{
+	struct hlist_head *head;
+	unsigned int u;
+
+	head = kmalloc(sizeof(*nhash->nh_head) * num_hash, gfp);
+	if (head) {
+		nhash->nh_num = num_hash;
+		nhash->nh_head = head;
+		for (u = 0; u < num_hash; u++)
+			INIT_HLIST_HEAD(head++);
+		return 0; /* success */
+	}
+
+	return -ENOMEM;
+}
+
+static void nhash_count(struct hlist_head *head)
+{
+#if 0
+	unsigned long n;
+	struct hlist_node *pos;
+
+	n = 0;
+	hlist_for_each(pos, head)
+		n++;
+	pr_info("%lu\n", n);
+#endif
+}
+
+static void au_nhash_wh_do_free(struct hlist_head *head)
+{
+	struct au_vdir_wh *tpos;
+	struct hlist_node *pos, *node;
+
+	hlist_for_each_entry_safe(tpos, pos, node, head, wh_hash) {
+		/* hlist_del(pos); */
+		kfree(tpos);
+	}
+}
+
+static void au_nhash_de_do_free(struct hlist_head *head)
+{
+	struct au_vdir_dehstr *tpos;
+	struct hlist_node *pos, *node;
+
+	hlist_for_each_entry_safe(tpos, pos, node, head, hash) {
+		/* hlist_del(pos); */
+		au_cache_free_dehstr(tpos);
+	}
+}
+
+static void au_nhash_do_free(struct au_nhash *nhash,
+			     void (*free)(struct hlist_head *head))
+{
+	unsigned int n;
+	struct hlist_head *head;
+
+	n = nhash->nh_num;
+	if (!n)
+		return;
+
+	head = nhash->nh_head;
+	while (n-- > 0) {
+		nhash_count(head);
+		free(head++);
+	}
+	kfree(nhash->nh_head);
+}
+
+void au_nhash_wh_free(struct au_nhash *whlist)
+{
+	au_nhash_do_free(whlist, au_nhash_wh_do_free);
+}
+
+static void au_nhash_de_free(struct au_nhash *delist)
+{
+	au_nhash_do_free(delist, au_nhash_de_do_free);
+}
+
+/* ---------------------------------------------------------------------- */
+
+int au_nhash_test_longer_wh(struct au_nhash *whlist, aufs_bindex_t btgt,
+			    int limit)
+{
+	int num;
+	unsigned int u, n;
+	struct hlist_head *head;
+	struct au_vdir_wh *tpos;
+	struct hlist_node *pos;
+
+	num = 0;
+	n = whlist->nh_num;
+	head = whlist->nh_head;
+	for (u = 0; u < n; u++, head++)
+		hlist_for_each_entry(tpos, pos, head, wh_hash)
+			if (tpos->wh_bindex == btgt && ++num > limit)
+				return 1;
+	return 0;
+}
+
+static struct hlist_head *au_name_hash(struct au_nhash *nhash,
+				       unsigned char *name,
+				       unsigned int len)
+{
+	unsigned int v;
+	/* const unsigned int magic_bit = 12; */
+
+	AuDebugOn(!nhash->nh_num || !nhash->nh_head);
+
+	v = 0;
+	while (len--)
+		v += *name++;
+	/* v = hash_long(v, magic_bit); */
+	v %= nhash->nh_num;
+	return nhash->nh_head + v;
+}
+
+static int au_nhash_test_name(struct au_vdir_destr *str, const char *name,
+			      int nlen)
+{
+	return str->len == nlen && !memcmp(str->name, name, nlen);
+}
+
+/* returns found or not */
+int au_nhash_test_known_wh(struct au_nhash *whlist, char *name, int nlen)
+{
+	struct hlist_head *head;
+	struct au_vdir_wh *tpos;
+	struct hlist_node *pos;
+	struct au_vdir_destr *str;
+
+	head = au_name_hash(whlist, name, nlen);
+	hlist_for_each_entry(tpos, pos, head, wh_hash) {
+		str = &tpos->wh_str;
+		AuDbg("%.*s\n", str->len, str->name);
+		if (au_nhash_test_name(str, name, nlen))
+			return 1;
+	}
+	return 0;
+}
+
+/* returns found(true) or not */
+static int test_known(struct au_nhash *delist, char *name, int nlen)
+{
+	struct hlist_head *head;
+	struct au_vdir_dehstr *tpos;
+	struct hlist_node *pos;
+	struct au_vdir_destr *str;
+
+	head = au_name_hash(delist, name, nlen);
+	hlist_for_each_entry(tpos, pos, head, hash) {
+		str = tpos->str;
+		AuDbg("%.*s\n", str->len, str->name);
+		if (au_nhash_test_name(str, name, nlen))
+			return 1;
+	}
+	return 0;
+}
+
+static void au_shwh_init_wh(struct au_vdir_wh *wh, ino_t ino,
+			    unsigned char d_type)
+{
+#ifdef CONFIG_AUFS_SHWH
+	wh->wh_ino = ino;
+	wh->wh_type = d_type;
+#endif
+}
+
+/* ---------------------------------------------------------------------- */
+
+int au_nhash_append_wh(struct au_nhash *whlist, char *name, int nlen, ino_t ino,
+		       unsigned int d_type, aufs_bindex_t bindex,
+		       unsigned char shwh)
+{
+	int err;
+	struct au_vdir_destr *str;
+	struct au_vdir_wh *wh;
+
+	AuDbg("%.*s\n", nlen, name);
+	AuDebugOn(!whlist->nh_num || !whlist->nh_head);
+
+	err = -ENOMEM;
+	wh = kmalloc(sizeof(*wh) + nlen, GFP_NOFS);
+	if (unlikely(!wh))
+		goto out;
+
+	err = 0;
+	wh->wh_bindex = bindex;
+	if (shwh)
+		au_shwh_init_wh(wh, ino, d_type);
+	str = &wh->wh_str;
+	str->len = nlen;
+	memcpy(str->name, name, nlen);
+	hlist_add_head(&wh->wh_hash, au_name_hash(whlist, name, nlen));
+	/* smp_mb(); */
+
+ out:
+	return err;
+}
+
+static int append_deblk(struct au_vdir *vdir)
+{
+	int err;
+	unsigned long ul;
+	const unsigned int deblk_sz = vdir->vd_deblk_sz;
+	union au_vdir_deblk_p p, deblk_end;
+	unsigned char **o;
+
+	err = -ENOMEM;
+	o = krealloc(vdir->vd_deblk, sizeof(*o) * (vdir->vd_nblk + 1),
+		     GFP_NOFS);
+	if (unlikely(!o))
+		goto out;
+
+	vdir->vd_deblk = o;
+	p.deblk = kmalloc(deblk_sz, GFP_NOFS);
+	if (p.deblk) {
+		ul = vdir->vd_nblk++;
+		vdir->vd_deblk[ul] = p.deblk;
+		vdir->vd_last.ul = ul;
+		vdir->vd_last.p.deblk = p.deblk;
+		deblk_end.deblk = p.deblk + deblk_sz;
+		err = set_deblk_end(&p, &deblk_end);
+	}
+
+ out:
+	return err;
+}
+
+static int append_de(struct au_vdir *vdir, char *name, int nlen, ino_t ino,
+		     unsigned int d_type, struct au_nhash *delist)
+{
+	int err;
+	unsigned int sz;
+	const unsigned int deblk_sz = vdir->vd_deblk_sz;
+	union au_vdir_deblk_p p, *room, deblk_end;
+	struct au_vdir_dehstr *dehstr;
+
+	p.deblk = last_deblk(vdir);
+	deblk_end.deblk = p.deblk + deblk_sz;
+	room = &vdir->vd_last.p;
+	AuDebugOn(room->deblk < p.deblk || deblk_end.deblk <= room->deblk
+		  || !is_deblk_end(room, &deblk_end));
+
+	sz = calc_size(nlen);
+	if (unlikely(sz > deblk_end.deblk - room->deblk)) {
+		err = append_deblk(vdir);
+		if (unlikely(err))
+			goto out;
+
+		p.deblk = last_deblk(vdir);
+		deblk_end.deblk = p.deblk + deblk_sz;
+		/* smp_mb(); */
+		AuDebugOn(room->deblk != p.deblk);
+	}
+
+	err = -ENOMEM;
+	dehstr = au_cache_alloc_dehstr();
+	if (unlikely(!dehstr))
+		goto out;
+
+	dehstr->str = &room->de->de_str;
+	hlist_add_head(&dehstr->hash, au_name_hash(delist, name, nlen));
+	room->de->de_ino = ino;
+	room->de->de_type = d_type;
+	room->de->de_str.len = nlen;
+	memcpy(room->de->de_str.name, name, nlen);
+
+	err = 0;
+	room->deblk += sz;
+	if (unlikely(set_deblk_end(room, &deblk_end)))
+		err = append_deblk(vdir);
+	/* smp_mb(); */
+
+ out:
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+void au_vdir_free(struct au_vdir *vdir)
+{
+	unsigned char **deblk;
+
+	deblk = vdir->vd_deblk;
+	while (vdir->vd_nblk--)
+		kfree(*deblk++);
+	kfree(vdir->vd_deblk);
+	au_cache_free_vdir(vdir);
+}
+
+static struct au_vdir *alloc_vdir(struct file *file)
+{
+	struct au_vdir *vdir;
+	struct super_block *sb;
+	int err;
+
+	sb = file->f_dentry->d_sb;
+	SiMustAnyLock(sb);
+
+	err = -ENOMEM;
+	vdir = au_cache_alloc_vdir();
+	if (unlikely(!vdir))
+		goto out;
+
+	vdir->vd_deblk = kzalloc(sizeof(*vdir->vd_deblk), GFP_NOFS);
+	if (unlikely(!vdir->vd_deblk))
+		goto out_free;
+
+	vdir->vd_deblk_sz = au_sbi(sb)->si_rdblk;
+	if (!vdir->vd_deblk_sz) {
+		/* estimate the apropriate size for deblk */
+		vdir->vd_deblk_sz = au_dir_size(file, /*dentry*/NULL);
+		/* pr_info("vd_deblk_sz %u\n", vdir->vd_deblk_sz); */
+	}
+	vdir->vd_nblk = 0;
+	vdir->vd_version = 0;
+	vdir->vd_jiffy = 0;
+	err = append_deblk(vdir);
+	if (!err)
+		return vdir; /* success */
+
+	kfree(vdir->vd_deblk);
+
+ out_free:
+	au_cache_free_vdir(vdir);
+ out:
+	vdir = ERR_PTR(err);
+	return vdir;
+}
+
+static int reinit_vdir(struct au_vdir *vdir)
+{
+	int err;
+	union au_vdir_deblk_p p, deblk_end;
+
+	while (vdir->vd_nblk > 1) {
+		kfree(vdir->vd_deblk[vdir->vd_nblk - 1]);
+		/* vdir->vd_deblk[vdir->vd_nblk - 1] = NULL; */
+		vdir->vd_nblk--;
+	}
+	p.deblk = vdir->vd_deblk[0];
+	deblk_end.deblk = p.deblk + vdir->vd_deblk_sz;
+	err = set_deblk_end(&p, &deblk_end);
+	/* keep vd_dblk_sz */
+	vdir->vd_last.ul = 0;
+	vdir->vd_last.p.deblk = vdir->vd_deblk[0];
+	vdir->vd_version = 0;
+	vdir->vd_jiffy = 0;
+	/* smp_mb(); */
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+#define AuFillVdir_CALLED	1
+#define AuFillVdir_WHABLE	(1 << 1)
+#define AuFillVdir_SHWH		(1 << 2)
+#define au_ftest_fillvdir(flags, name)	((flags) & AuFillVdir_##name)
+#define au_fset_fillvdir(flags, name)	{ (flags) |= AuFillVdir_##name; }
+#define au_fclr_fillvdir(flags, name)	{ (flags) &= ~AuFillVdir_##name; }
+
+#ifndef CONFIG_AUFS_SHWH
+#undef AuFillVdir_SHWH
+#define AuFillVdir_SHWH		0
+#endif
+
+struct fillvdir_arg {
+	struct file		*file;
+	struct au_vdir		*vdir;
+	struct au_nhash		delist;
+	struct au_nhash		whlist;
+	aufs_bindex_t		bindex;
+	unsigned int		flags;
+	int			err;
+};
+
+static int fillvdir(void *__arg, const char *__name, int nlen,
+		    loff_t offset __maybe_unused, u64 h_ino,
+		    unsigned int d_type)
+{
+	struct fillvdir_arg *arg = __arg;
+	char *name = (void *)__name;
+	struct super_block *sb;
+	ino_t ino;
+	const unsigned char shwh = !!au_ftest_fillvdir(arg->flags, SHWH);
+
+	arg->err = 0;
+	sb = arg->file->f_dentry->d_sb;
+	au_fset_fillvdir(arg->flags, CALLED);
+	/* smp_mb(); */
+	if (nlen <= AUFS_WH_PFX_LEN
+	    || memcmp(name, AUFS_WH_PFX, AUFS_WH_PFX_LEN)) {
+		if (test_known(&arg->delist, name, nlen)
+		    || au_nhash_test_known_wh(&arg->whlist, name, nlen))
+			goto out; /* already exists or whiteouted */
+
+		sb = arg->file->f_dentry->d_sb;
+		arg->err = au_ino(sb, arg->bindex, h_ino, d_type, &ino);
+		if (!arg->err) {
+			if (unlikely(nlen > AUFS_MAX_NAMELEN))
+				d_type = DT_UNKNOWN;
+			arg->err = append_de(arg->vdir, name, nlen, ino,
+					     d_type, &arg->delist);
+		}
+	} else if (au_ftest_fillvdir(arg->flags, WHABLE)) {
+		name += AUFS_WH_PFX_LEN;
+		nlen -= AUFS_WH_PFX_LEN;
+		if (au_nhash_test_known_wh(&arg->whlist, name, nlen))
+			goto out; /* already whiteouted */
+
+		if (shwh)
+			arg->err = au_wh_ino(sb, arg->bindex, h_ino, d_type,
+					     &ino);
+		if (!arg->err) {
+			if (nlen <= AUFS_MAX_NAMELEN + AUFS_WH_PFX_LEN)
+				d_type = DT_UNKNOWN;
+			arg->err = au_nhash_append_wh
+				(&arg->whlist, name, nlen, ino, d_type,
+				 arg->bindex, shwh);
+		}
+	}
+
+ out:
+	if (!arg->err)
+		arg->vdir->vd_jiffy = jiffies;
+	/* smp_mb(); */
+	AuTraceErr(arg->err);
+	return arg->err;
+}
+
+static int au_handle_shwh(struct super_block *sb, struct au_vdir *vdir,
+			  struct au_nhash *whlist, struct au_nhash *delist)
+{
+#ifdef CONFIG_AUFS_SHWH
+	int err;
+	unsigned int nh, u;
+	struct hlist_head *head;
+	struct au_vdir_wh *tpos;
+	struct hlist_node *pos, *n;
+	char *p, *o;
+	struct au_vdir_destr *destr;
+
+	AuDebugOn(!au_opt_test(au_mntflags(sb), SHWH));
+
+	err = -ENOMEM;
+	o = p = __getname();
+	if (unlikely(!p))
+		goto out;
+
+	err = 0;
+	nh = whlist->nh_num;
+	memcpy(p, AUFS_WH_PFX, AUFS_WH_PFX_LEN);
+	p += AUFS_WH_PFX_LEN;
+	for (u = 0; u < nh; u++) {
+		head = whlist->nh_head + u;
+		hlist_for_each_entry_safe(tpos, pos, n, head, wh_hash) {
+			destr = &tpos->wh_str;
+			memcpy(p, destr->name, destr->len);
+			err = append_de(vdir, o, destr->len + AUFS_WH_PFX_LEN,
+					tpos->wh_ino, tpos->wh_type, delist);
+			if (unlikely(err))
+				break;
+		}
+	}
+
+	__putname(o);
+
+ out:
+	AuTraceErr(err);
+	return err;
+#else
+	return 0;
+#endif
+}
+
+static int au_do_read_vdir(struct fillvdir_arg *arg)
+{
+	int err;
+	unsigned int rdhash;
+	loff_t offset;
+	aufs_bindex_t bend, bindex, bstart;
+	unsigned char shwh;
+	struct file *hf, *file;
+	struct super_block *sb;
+
+	file = arg->file;
+	sb = file->f_dentry->d_sb;
+	SiMustAnyLock(sb);
+
+	rdhash = au_sbi(sb)->si_rdhash;
+	if (!rdhash)
+		rdhash = au_rdhash_est(au_dir_size(file, /*dentry*/NULL));
+	err = au_nhash_alloc(&arg->delist, rdhash, GFP_NOFS);
+	if (unlikely(err))
+		goto out;
+	err = au_nhash_alloc(&arg->whlist, rdhash, GFP_NOFS);
+	if (unlikely(err))
+		goto out_delist;
+
+	err = 0;
+	arg->flags = 0;
+	shwh = 0;
+	if (au_opt_test(au_mntflags(sb), SHWH)) {
+		shwh = 1;
+		au_fset_fillvdir(arg->flags, SHWH);
+	}
+	bstart = au_fbstart(file);
+	bend = au_fbend(file);
+	for (bindex = bstart; !err && bindex <= bend; bindex++) {
+		hf = au_h_fptr(file, bindex);
+		if (!hf)
+			continue;
+
+		offset = vfsub_llseek(hf, 0, SEEK_SET);
+		err = offset;
+		if (unlikely(offset))
+			break;
+
+		arg->bindex = bindex;
+		au_fclr_fillvdir(arg->flags, WHABLE);
+		if (shwh
+		    || (bindex != bend
+			&& au_br_whable(au_sbr_perm(sb, bindex))))
+			au_fset_fillvdir(arg->flags, WHABLE);
+		do {
+			arg->err = 0;
+			au_fclr_fillvdir(arg->flags, CALLED);
+			/* smp_mb(); */
+			err = vfsub_readdir(hf, fillvdir, arg);
+			if (err >= 0)
+				err = arg->err;
+		} while (!err && au_ftest_fillvdir(arg->flags, CALLED));
+	}
+
+	if (!err && shwh)
+		err = au_handle_shwh(sb, arg->vdir, &arg->whlist, &arg->delist);
+
+	au_nhash_wh_free(&arg->whlist);
+
+ out_delist:
+	au_nhash_de_free(&arg->delist);
+ out:
+	return err;
+}
+
+static int read_vdir(struct file *file, int may_read)
+{
+	int err;
+	unsigned long expire;
+	unsigned char do_read;
+	struct fillvdir_arg arg;
+	struct inode *inode;
+	struct au_vdir *vdir, *allocated;
+
+	err = 0;
+	inode = file->f_dentry->d_inode;
+	IMustLock(inode);
+	SiMustAnyLock(inode->i_sb);
+
+	allocated = NULL;
+	do_read = 0;
+	expire = au_sbi(inode->i_sb)->si_rdcache;
+	vdir = au_ivdir(inode);
+	if (!vdir) {
+		do_read = 1;
+		vdir = alloc_vdir(file);
+		err = PTR_ERR(vdir);
+		if (IS_ERR(vdir))
+			goto out;
+		err = 0;
+		allocated = vdir;
+	} else if (may_read
+		   && (inode->i_version != vdir->vd_version
+		       || time_after(jiffies, vdir->vd_jiffy + expire))) {
+		do_read = 1;
+		err = reinit_vdir(vdir);
+		if (unlikely(err))
+			goto out;
+	}
+
+	if (!do_read)
+		return 0; /* success */
+
+	arg.file = file;
+	arg.vdir = vdir;
+	err = au_do_read_vdir(&arg);
+	if (!err) {
+		/* file->f_pos = 0; */
+		vdir->vd_version = inode->i_version;
+		vdir->vd_last.ul = 0;
+		vdir->vd_last.p.deblk = vdir->vd_deblk[0];
+		if (allocated)
+			au_set_ivdir(inode, allocated);
+	} else if (allocated)
+		au_vdir_free(allocated);
+
+ out:
+	return err;
+}
+
+static int copy_vdir(struct au_vdir *tgt, struct au_vdir *src)
+{
+	int err, rerr;
+	unsigned long ul, n;
+	const unsigned int deblk_sz = src->vd_deblk_sz;
+
+	AuDebugOn(tgt->vd_nblk != 1);
+
+	err = -ENOMEM;
+	if (tgt->vd_nblk < src->vd_nblk) {
+		unsigned char **p;
+
+		p = krealloc(tgt->vd_deblk, sizeof(*p) * src->vd_nblk,
+			     GFP_NOFS);
+		if (unlikely(!p))
+			goto out;
+		tgt->vd_deblk = p;
+	}
+
+	if (tgt->vd_deblk_sz != deblk_sz) {
+		unsigned char *p;
+
+		tgt->vd_deblk_sz = deblk_sz;
+		p = krealloc(tgt->vd_deblk[0], deblk_sz, GFP_NOFS);
+		if (unlikely(!p))
+			goto out;
+		tgt->vd_deblk[0] = p;
+	}
+	memcpy(tgt->vd_deblk[0], src->vd_deblk[0], deblk_sz);
+	tgt->vd_version = src->vd_version;
+	tgt->vd_jiffy = src->vd_jiffy;
+
+	n = src->vd_nblk;
+	for (ul = 1; ul < n; ul++) {
+		tgt->vd_deblk[ul] = kmemdup(src->vd_deblk[ul], deblk_sz,
+					    GFP_NOFS);
+		if (unlikely(!tgt->vd_deblk[ul]))
+			goto out;
+		tgt->vd_nblk++;
+	}
+	tgt->vd_nblk = n;
+	tgt->vd_last.ul = tgt->vd_last.ul;
+	tgt->vd_last.p.deblk = tgt->vd_deblk[tgt->vd_last.ul];
+	tgt->vd_last.p.deblk += src->vd_last.p.deblk
+		- src->vd_deblk[src->vd_last.ul];
+	/* smp_mb(); */
+	return 0; /* success */
+
+ out:
+	rerr = reinit_vdir(tgt);
+	BUG_ON(rerr);
+	return err;
+}
+
+int au_vdir_init(struct file *file)
+{
+	int err;
+	struct inode *inode;
+	struct au_vdir *vdir_cache, *allocated;
+
+	err = read_vdir(file, !file->f_pos);
+	if (unlikely(err))
+		goto out;
+
+	allocated = NULL;
+	vdir_cache = au_fvdir_cache(file);
+	if (!vdir_cache) {
+		vdir_cache = alloc_vdir(file);
+		err = PTR_ERR(vdir_cache);
+		if (IS_ERR(vdir_cache))
+			goto out;
+		allocated = vdir_cache;
+	} else if (!file->f_pos && vdir_cache->vd_version != file->f_version) {
+		err = reinit_vdir(vdir_cache);
+		if (unlikely(err))
+			goto out;
+	} else
+		return 0; /* success */
+
+	inode = file->f_dentry->d_inode;
+	err = copy_vdir(vdir_cache, au_ivdir(inode));
+	if (!err) {
+		file->f_version = inode->i_version;
+		if (allocated)
+			au_set_fvdir_cache(file, allocated);
+	} else if (allocated)
+		au_vdir_free(allocated);
+
+ out:
+	return err;
+}
+
+static loff_t calc_offset(struct au_vdir *vdir)
+{
+	loff_t offset;
+	union au_vdir_deblk_p p;
+
+	p.deblk = vdir->vd_deblk[vdir->vd_last.ul];
+	offset = vdir->vd_last.p.deblk - p.deblk;
+	offset += vdir->vd_deblk_sz * vdir->vd_last.ul;
+	return offset;
+}
+
+/* returns true or false */
+static int seek_vdir(struct file *file)
+{
+	int valid;
+	unsigned int deblk_sz;
+	unsigned long ul, n;
+	loff_t offset;
+	union au_vdir_deblk_p p, deblk_end;
+	struct au_vdir *vdir_cache;
+
+	valid = 1;
+	vdir_cache = au_fvdir_cache(file);
+	offset = calc_offset(vdir_cache);
+	AuDbg("offset %lld\n", offset);
+	if (file->f_pos == offset)
+		goto out;
+
+	vdir_cache->vd_last.ul = 0;
+	vdir_cache->vd_last.p.deblk = vdir_cache->vd_deblk[0];
+	if (!file->f_pos)
+		goto out;
+
+	valid = 0;
+	deblk_sz = vdir_cache->vd_deblk_sz;
+	ul = div64_u64(file->f_pos, deblk_sz);
+	AuDbg("ul %lu\n", ul);
+	if (ul >= vdir_cache->vd_nblk)
+		goto out;
+
+	n = vdir_cache->vd_nblk;
+	for (; ul < n; ul++) {
+		p.deblk = vdir_cache->vd_deblk[ul];
+		deblk_end.deblk = p.deblk + deblk_sz;
+		offset = ul;
+		offset *= deblk_sz;
+		while (!is_deblk_end(&p, &deblk_end) && offset < file->f_pos) {
+			unsigned int l;
+
+			l = calc_size(p.de->de_str.len);
+			offset += l;
+			p.deblk += l;
+		}
+		if (!is_deblk_end(&p, &deblk_end)) {
+			valid = 1;
+			vdir_cache->vd_last.ul = ul;
+			vdir_cache->vd_last.p = p;
+			break;
+		}
+	}
+
+ out:
+	/* smp_mb(); */
+	AuTraceErr(!valid);
+	return valid;
+}
+
+int au_vdir_fill_de(struct file *file, void *dirent, filldir_t filldir)
+{
+	int err;
+	unsigned int l, deblk_sz;
+	union au_vdir_deblk_p deblk_end;
+	struct au_vdir *vdir_cache;
+	struct au_vdir_de *de;
+
+	vdir_cache = au_fvdir_cache(file);
+	if (!seek_vdir(file))
+		return 0;
+
+	deblk_sz = vdir_cache->vd_deblk_sz;
+	while (1) {
+		deblk_end.deblk = vdir_cache->vd_deblk[vdir_cache->vd_last.ul];
+		deblk_end.deblk += deblk_sz;
+		while (!is_deblk_end(&vdir_cache->vd_last.p, &deblk_end)) {
+			de = vdir_cache->vd_last.p.de;
+			AuDbg("%.*s, off%lld, i%lu, dt%d\n",
+			      de->de_str.len, de->de_str.name, file->f_pos,
+			      (unsigned long)de->de_ino, de->de_type);
+			err = filldir(dirent, de->de_str.name, de->de_str.len,
+				      file->f_pos, de->de_ino, de->de_type);
+			if (unlikely(err)) {
+				AuTraceErr(err);
+				/* todo: ignore the error caused by udba? */
+				/* return err; */
+				return 0;
+			}
+
+			l = calc_size(de->de_str.len);
+			vdir_cache->vd_last.p.deblk += l;
+			file->f_pos += l;
+		}
+		if (vdir_cache->vd_last.ul < vdir_cache->vd_nblk - 1) {
+			vdir_cache->vd_last.ul++;
+			vdir_cache->vd_last.p.deblk
+				= vdir_cache->vd_deblk[vdir_cache->vd_last.ul];
+			file->f_pos = deblk_sz * vdir_cache->vd_last.ul;
+			continue;
+		}
+		break;
+	}
+
+	/* smp_mb(); */
+	return 0;
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/aufs/opts.c
+++ linux-mvl-dove-2.6.32/ubuntu/aufs/opts.c
@@ -0,0 +1,1549 @@
+/*
+ * Copyright (C) 2005-2009 Junjiro R. Okajima
+ *
+ * This program, aufs is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+/*
+ * mount options/flags
+ */
+
+#include <linux/file.h>
+#include <linux/namei.h>
+#include <linux/types.h> /* a distribution requires */
+#include <linux/parser.h>
+#include "aufs.h"
+
+/* ---------------------------------------------------------------------- */
+
+enum {
+	Opt_br,
+	Opt_add, Opt_del, Opt_mod, Opt_reorder, Opt_append, Opt_prepend,
+	Opt_idel, Opt_imod, Opt_ireorder,
+	Opt_dirwh, Opt_rdcache, Opt_rdblk, Opt_rdhash, Opt_rendir,
+	Opt_rdblk_def, Opt_rdhash_def,
+	Opt_xino, Opt_zxino, Opt_noxino,
+	Opt_trunc_xino, Opt_trunc_xino_v, Opt_notrunc_xino,
+	Opt_trunc_xino_path, Opt_itrunc_xino,
+	Opt_trunc_xib, Opt_notrunc_xib,
+	Opt_shwh, Opt_noshwh,
+	Opt_plink, Opt_noplink, Opt_list_plink,
+	Opt_udba,
+	/* Opt_lock, Opt_unlock, */
+	Opt_cmd, Opt_cmd_args,
+	Opt_diropq_a, Opt_diropq_w,
+	Opt_warn_perm, Opt_nowarn_perm,
+	Opt_wbr_copyup, Opt_wbr_create,
+	Opt_refrof, Opt_norefrof,
+	Opt_verbose, Opt_noverbose,
+	Opt_sum, Opt_nosum, Opt_wsum,
+	Opt_tail, Opt_ignore, Opt_ignore_silent, Opt_err
+};
+
+static match_table_t options = {
+	{Opt_br, "br=%s"},
+	{Opt_br, "br:%s"},
+
+	{Opt_add, "add=%d:%s"},
+	{Opt_add, "add:%d:%s"},
+	{Opt_add, "ins=%d:%s"},
+	{Opt_add, "ins:%d:%s"},
+	{Opt_append, "append=%s"},
+	{Opt_append, "append:%s"},
+	{Opt_prepend, "prepend=%s"},
+	{Opt_prepend, "prepend:%s"},
+
+	{Opt_del, "del=%s"},
+	{Opt_del, "del:%s"},
+	/* {Opt_idel, "idel:%d"}, */
+	{Opt_mod, "mod=%s"},
+	{Opt_mod, "mod:%s"},
+	/* {Opt_imod, "imod:%d:%s"}, */
+
+	{Opt_dirwh, "dirwh=%d"},
+
+	{Opt_xino, "xino=%s"},
+	{Opt_noxino, "noxino"},
+	{Opt_trunc_xino, "trunc_xino"},
+	{Opt_trunc_xino_v, "trunc_xino_v=%d:%d"},
+	{Opt_notrunc_xino, "notrunc_xino"},
+	{Opt_trunc_xino_path, "trunc_xino=%s"},
+	{Opt_itrunc_xino, "itrunc_xino=%d"},
+	/* {Opt_zxino, "zxino=%s"}, */
+	{Opt_trunc_xib, "trunc_xib"},
+	{Opt_notrunc_xib, "notrunc_xib"},
+
+	{Opt_plink, "plink"},
+	{Opt_noplink, "noplink"},
+#ifdef CONFIG_AUFS_DEBUG
+	{Opt_list_plink, "list_plink"},
+#endif
+
+	{Opt_udba, "udba=%s"},
+
+	{Opt_diropq_a, "diropq=always"},
+	{Opt_diropq_a, "diropq=a"},
+	{Opt_diropq_w, "diropq=whiteouted"},
+	{Opt_diropq_w, "diropq=w"},
+
+	{Opt_warn_perm, "warn_perm"},
+	{Opt_nowarn_perm, "nowarn_perm"},
+
+	/* keep them temporary */
+	{Opt_ignore_silent, "coo=%s"},
+	{Opt_ignore_silent, "nodlgt"},
+	{Opt_ignore_silent, "nodirperm1"},
+	{Opt_ignore_silent, "clean_plink"},
+
+#ifdef CONFIG_AUFS_SHWH
+	{Opt_shwh, "shwh"},
+#endif
+	{Opt_noshwh, "noshwh"},
+
+	{Opt_rendir, "rendir=%d"},
+
+	{Opt_refrof, "refrof"},
+	{Opt_norefrof, "norefrof"},
+
+	{Opt_verbose, "verbose"},
+	{Opt_verbose, "v"},
+	{Opt_noverbose, "noverbose"},
+	{Opt_noverbose, "quiet"},
+	{Opt_noverbose, "q"},
+	{Opt_noverbose, "silent"},
+
+	{Opt_sum, "sum"},
+	{Opt_nosum, "nosum"},
+	{Opt_wsum, "wsum"},
+
+	{Opt_rdcache, "rdcache=%d"},
+	{Opt_rdblk, "rdblk=%d"},
+	{Opt_rdblk_def, "rdblk=def"},
+	{Opt_rdhash, "rdhash=%d"},
+	{Opt_rdhash_def, "rdhash=def"},
+
+	{Opt_wbr_create, "create=%s"},
+	{Opt_wbr_create, "create_policy=%s"},
+	{Opt_wbr_copyup, "cpup=%s"},
+	{Opt_wbr_copyup, "copyup=%s"},
+	{Opt_wbr_copyup, "copyup_policy=%s"},
+
+	/* internal use for the scripts */
+	{Opt_ignore_silent, "si=%s"},
+
+	{Opt_br, "dirs=%s"},
+	{Opt_ignore, "debug=%d"},
+	{Opt_ignore, "delete=whiteout"},
+	{Opt_ignore, "delete=all"},
+	{Opt_ignore, "imap=%s"},
+
+	/* temporary workaround, due to old mount(8)? */
+	{Opt_ignore_silent, "relatime"},
+
+	{Opt_err, NULL}
+};
+
+/* ---------------------------------------------------------------------- */
+
+static const char *au_parser_pattern(int val, struct match_token *token)
+{
+	while (token->pattern) {
+		if (token->token == val)
+			return token->pattern;
+		token++;
+	}
+	BUG();
+	return "??";
+}
+
+/* ---------------------------------------------------------------------- */
+
+static match_table_t brperms = {
+	{AuBrPerm_RO, AUFS_BRPERM_RO},
+	{AuBrPerm_RR, AUFS_BRPERM_RR},
+	{AuBrPerm_RW, AUFS_BRPERM_RW},
+
+	{AuBrPerm_ROWH, AUFS_BRPERM_ROWH},
+	{AuBrPerm_RRWH, AUFS_BRPERM_RRWH},
+	{AuBrPerm_RWNoLinkWH, AUFS_BRPERM_RWNLWH},
+
+	{AuBrPerm_ROWH, "nfsro"},
+	{AuBrPerm_RO, NULL}
+};
+
+static int noinline_for_stack br_perm_val(char *perm)
+{
+	int val;
+	substring_t args[MAX_OPT_ARGS];
+
+	val = match_token(perm, brperms, args);
+	return val;
+}
+
+const char *au_optstr_br_perm(int brperm)
+{
+	return au_parser_pattern(brperm, (void *)brperms);
+}
+
+/* ---------------------------------------------------------------------- */
+
+static match_table_t udbalevel = {
+	{AuOpt_UDBA_REVAL, "reval"},
+	{AuOpt_UDBA_NONE, "none"},
+#ifdef CONFIG_AUFS_HINOTIFY
+	{AuOpt_UDBA_HINOTIFY, "inotify"},
+#endif
+	{-1, NULL}
+};
+
+static int noinline_for_stack udba_val(char *str)
+{
+	substring_t args[MAX_OPT_ARGS];
+
+	return match_token(str, udbalevel, args);
+}
+
+const char *au_optstr_udba(int udba)
+{
+	return au_parser_pattern(udba, (void *)udbalevel);
+}
+
+/* ---------------------------------------------------------------------- */
+
+static match_table_t au_wbr_create_policy = {
+	{AuWbrCreate_TDP, "tdp"},
+	{AuWbrCreate_TDP, "top-down-parent"},
+	{AuWbrCreate_RR, "rr"},
+	{AuWbrCreate_RR, "round-robin"},
+	{AuWbrCreate_MFS, "mfs"},
+	{AuWbrCreate_MFS, "most-free-space"},
+	{AuWbrCreate_MFSV, "mfs:%d"},
+	{AuWbrCreate_MFSV, "most-free-space:%d"},
+
+	{AuWbrCreate_MFSRR, "mfsrr:%d"},
+	{AuWbrCreate_MFSRRV, "mfsrr:%d:%d"},
+	{AuWbrCreate_PMFS, "pmfs"},
+	{AuWbrCreate_PMFSV, "pmfs:%d"},
+
+	{-1, NULL}
+};
+
+/*
+ * cf. linux/lib/parser.c and cmdline.c
+ * gave up calling memparse() since it uses simple_strtoull() instead of
+ * strict_...().
+ */
+static int noinline_for_stack
+au_match_ull(substring_t *s, unsigned long long *result)
+{
+	int err;
+	unsigned int len;
+	char a[32];
+
+	err = -ERANGE;
+	len = s->to - s->from;
+	if (len + 1 <= sizeof(a)) {
+		memcpy(a, s->from, len);
+		a[len] = '\0';
+		err = strict_strtoull(a, 0, result);
+	}
+	return err;
+}
+
+static int au_wbr_mfs_wmark(substring_t *arg, char *str,
+			    struct au_opt_wbr_create *create)
+{
+	int err;
+	unsigned long long ull;
+
+	err = 0;
+	if (!au_match_ull(arg, &ull))
+		create->mfsrr_watermark = ull;
+	else {
+		pr_err("bad integer in %s\n", str);
+		err = -EINVAL;
+	}
+
+	return err;
+}
+
+static int au_wbr_mfs_sec(substring_t *arg, char *str,
+			  struct au_opt_wbr_create *create)
+{
+	int n, err;
+
+	err = 0;
+	if (!match_int(arg, &n) && 0 <= n)
+		create->mfs_second = n;
+	else {
+		pr_err("bad integer in %s\n", str);
+		err = -EINVAL;
+	}
+
+	return err;
+}
+
+static int noinline_for_stack
+au_wbr_create_val(char *str, struct au_opt_wbr_create *create)
+{
+	int err, e;
+	substring_t args[MAX_OPT_ARGS];
+
+	err = match_token(str, au_wbr_create_policy, args);
+	create->wbr_create = err;
+	switch (err) {
+	case AuWbrCreate_MFSRRV:
+		e = au_wbr_mfs_wmark(&args[0], str, create);
+		if (!e)
+			e = au_wbr_mfs_sec(&args[1], str, create);
+		if (unlikely(e))
+			err = e;
+		break;
+	case AuWbrCreate_MFSRR:
+		e = au_wbr_mfs_wmark(&args[0], str, create);
+		if (unlikely(e)) {
+			err = e;
+			break;
+		}
+		/*FALLTHROUGH*/
+	case AuWbrCreate_MFS:
+	case AuWbrCreate_PMFS:
+		create->mfs_second = AUFS_MFS_SECOND_DEF;
+		break;
+	case AuWbrCreate_MFSV:
+	case AuWbrCreate_PMFSV:
+		e = au_wbr_mfs_sec(&args[0], str, create);
+		if (unlikely(e))
+			err = e;
+		break;
+	}
+
+	return err;
+}
+
+const char *au_optstr_wbr_create(int wbr_create)
+{
+	return au_parser_pattern(wbr_create, (void *)au_wbr_create_policy);
+}
+
+static match_table_t au_wbr_copyup_policy = {
+	{AuWbrCopyup_TDP, "tdp"},
+	{AuWbrCopyup_TDP, "top-down-parent"},
+	{AuWbrCopyup_BUP, "bup"},
+	{AuWbrCopyup_BUP, "bottom-up-parent"},
+	{AuWbrCopyup_BU, "bu"},
+	{AuWbrCopyup_BU, "bottom-up"},
+	{-1, NULL}
+};
+
+static int noinline_for_stack au_wbr_copyup_val(char *str)
+{
+	substring_t args[MAX_OPT_ARGS];
+
+	return match_token(str, au_wbr_copyup_policy, args);
+}
+
+const char *au_optstr_wbr_copyup(int wbr_copyup)
+{
+	return au_parser_pattern(wbr_copyup, (void *)au_wbr_copyup_policy);
+}
+
+/* ---------------------------------------------------------------------- */
+
+static const int lkup_dirflags = LOOKUP_FOLLOW | LOOKUP_DIRECTORY;
+
+static void dump_opts(struct au_opts *opts)
+{
+#ifdef CONFIG_AUFS_DEBUG
+	/* reduce stack space */
+	union {
+		struct au_opt_add *add;
+		struct au_opt_del *del;
+		struct au_opt_mod *mod;
+		struct au_opt_xino *xino;
+		struct au_opt_xino_itrunc *xino_itrunc;
+		struct au_opt_wbr_create *create;
+	} u;
+	struct au_opt *opt;
+
+	opt = opts->opt;
+	while (opt->type != Opt_tail) {
+		switch (opt->type) {
+		case Opt_add:
+			u.add = &opt->add;
+			AuDbg("add {b%d, %s, 0x%x, %p}\n",
+				  u.add->bindex, u.add->pathname, u.add->perm,
+				  u.add->path.dentry);
+			break;
+		case Opt_del:
+		case Opt_idel:
+			u.del = &opt->del;
+			AuDbg("del {%s, %p}\n",
+			      u.del->pathname, u.del->h_path.dentry);
+			break;
+		case Opt_mod:
+		case Opt_imod:
+			u.mod = &opt->mod;
+			AuDbg("mod {%s, 0x%x, %p}\n",
+				  u.mod->path, u.mod->perm, u.mod->h_root);
+			break;
+		case Opt_append:
+			u.add = &opt->add;
+			AuDbg("append {b%d, %s, 0x%x, %p}\n",
+				  u.add->bindex, u.add->pathname, u.add->perm,
+				  u.add->path.dentry);
+			break;
+		case Opt_prepend:
+			u.add = &opt->add;
+			AuDbg("prepend {b%d, %s, 0x%x, %p}\n",
+				  u.add->bindex, u.add->pathname, u.add->perm,
+				  u.add->path.dentry);
+			break;
+		case Opt_dirwh:
+			AuDbg("dirwh %d\n", opt->dirwh);
+			break;
+		case Opt_rdcache:
+			AuDbg("rdcache %d\n", opt->rdcache);
+			break;
+		case Opt_rdblk:
+			AuDbg("rdblk %u\n", opt->rdblk);
+			break;
+		case Opt_rdblk_def:
+			AuDbg("rdblk_def\n");
+			break;
+		case Opt_rdhash:
+			AuDbg("rdhash %u\n", opt->rdhash);
+			break;
+		case Opt_rdhash_def:
+			AuDbg("rdhash_def\n");
+			break;
+		case Opt_xino:
+			u.xino = &opt->xino;
+			AuDbg("xino {%s %.*s}\n",
+				  u.xino->path,
+				  AuDLNPair(u.xino->file->f_dentry));
+			break;
+		case Opt_trunc_xino:
+			AuLabel(trunc_xino);
+			break;
+		case Opt_notrunc_xino:
+			AuLabel(notrunc_xino);
+			break;
+		case Opt_trunc_xino_path:
+		case Opt_itrunc_xino:
+			u.xino_itrunc = &opt->xino_itrunc;
+			AuDbg("trunc_xino %d\n", u.xino_itrunc->bindex);
+			break;
+
+		case Opt_noxino:
+			AuLabel(noxino);
+			break;
+		case Opt_trunc_xib:
+			AuLabel(trunc_xib);
+			break;
+		case Opt_notrunc_xib:
+			AuLabel(notrunc_xib);
+			break;
+		case Opt_shwh:
+			AuLabel(shwh);
+			break;
+		case Opt_noshwh:
+			AuLabel(noshwh);
+			break;
+		case Opt_plink:
+			AuLabel(plink);
+			break;
+		case Opt_noplink:
+			AuLabel(noplink);
+			break;
+		case Opt_list_plink:
+			AuLabel(list_plink);
+			break;
+		case Opt_udba:
+			AuDbg("udba %d, %s\n",
+				  opt->udba, au_optstr_udba(opt->udba));
+			break;
+		case Opt_diropq_a:
+			AuLabel(diropq_a);
+			break;
+		case Opt_diropq_w:
+			AuLabel(diropq_w);
+			break;
+		case Opt_warn_perm:
+			AuLabel(warn_perm);
+			break;
+		case Opt_nowarn_perm:
+			AuLabel(nowarn_perm);
+			break;
+		case Opt_refrof:
+			AuLabel(refrof);
+			break;
+		case Opt_norefrof:
+			AuLabel(norefrof);
+			break;
+		case Opt_verbose:
+			AuLabel(verbose);
+			break;
+		case Opt_noverbose:
+			AuLabel(noverbose);
+			break;
+		case Opt_sum:
+			AuLabel(sum);
+			break;
+		case Opt_nosum:
+			AuLabel(nosum);
+			break;
+		case Opt_wsum:
+			AuLabel(wsum);
+			break;
+		case Opt_wbr_create:
+			u.create = &opt->wbr_create;
+			AuDbg("create %d, %s\n", u.create->wbr_create,
+				  au_optstr_wbr_create(u.create->wbr_create));
+			switch (u.create->wbr_create) {
+			case AuWbrCreate_MFSV:
+			case AuWbrCreate_PMFSV:
+				AuDbg("%d sec\n", u.create->mfs_second);
+				break;
+			case AuWbrCreate_MFSRR:
+				AuDbg("%llu watermark\n",
+					  u.create->mfsrr_watermark);
+				break;
+			case AuWbrCreate_MFSRRV:
+				AuDbg("%llu watermark, %d sec\n",
+					  u.create->mfsrr_watermark,
+					  u.create->mfs_second);
+				break;
+			}
+			break;
+		case Opt_wbr_copyup:
+			AuDbg("copyup %d, %s\n", opt->wbr_copyup,
+				  au_optstr_wbr_copyup(opt->wbr_copyup));
+			break;
+		default:
+			BUG();
+		}
+		opt++;
+	}
+#endif
+}
+
+void au_opts_free(struct au_opts *opts)
+{
+	struct au_opt *opt;
+
+	opt = opts->opt;
+	while (opt->type != Opt_tail) {
+		switch (opt->type) {
+		case Opt_add:
+		case Opt_append:
+		case Opt_prepend:
+			path_put(&opt->add.path);
+			break;
+		case Opt_del:
+		case Opt_idel:
+			path_put(&opt->del.h_path);
+			break;
+		case Opt_mod:
+		case Opt_imod:
+			dput(opt->mod.h_root);
+			break;
+		case Opt_xino:
+			fput(opt->xino.file);
+			break;
+		}
+		opt++;
+	}
+}
+
+static int opt_add(struct au_opt *opt, char *opt_str, unsigned long sb_flags,
+		   aufs_bindex_t bindex)
+{
+	int err;
+	struct au_opt_add *add = &opt->add;
+	char *p;
+
+	add->bindex = bindex;
+	add->perm = AuBrPerm_Last;
+	add->pathname = opt_str;
+	p = strchr(opt_str, '=');
+	if (p) {
+		*p++ = 0;
+		if (*p)
+			add->perm = br_perm_val(p);
+	}
+
+	err = vfsub_kern_path(add->pathname, lkup_dirflags, &add->path);
+	if (!err) {
+		if (!p) {
+			add->perm = AuBrPerm_RO;
+			if (au_test_fs_rr(add->path.dentry->d_sb))
+				add->perm = AuBrPerm_RR;
+			else if (!bindex && !(sb_flags & MS_RDONLY))
+				add->perm = AuBrPerm_RW;
+		}
+		opt->type = Opt_add;
+		goto out;
+	}
+	pr_err("lookup failed %s (%d)\n", add->pathname, err);
+	err = -EINVAL;
+
+ out:
+	return err;
+}
+
+static int au_opts_parse_del(struct au_opt_del *del, substring_t args[])
+{
+	int err;
+
+	del->pathname = args[0].from;
+	AuDbg("del path %s\n", del->pathname);
+
+	err = vfsub_kern_path(del->pathname, lkup_dirflags, &del->h_path);
+	if (unlikely(err))
+		pr_err("lookup failed %s (%d)\n", del->pathname, err);
+
+	return err;
+}
+
+#if 0 /* reserved for future use */
+static int au_opts_parse_idel(struct super_block *sb, aufs_bindex_t bindex,
+			      struct au_opt_del *del, substring_t args[])
+{
+	int err;
+	struct dentry *root;
+
+	err = -EINVAL;
+	root = sb->s_root;
+	aufs_read_lock(root, AuLock_FLUSH);
+	if (bindex < 0 || au_sbend(sb) < bindex) {
+		pr_err("out of bounds, %d\n", bindex);
+		goto out;
+	}
+
+	err = 0;
+	del->h_path.dentry = dget(au_h_dptr(root, bindex));
+	del->h_path.mnt = mntget(au_sbr_mnt(sb, bindex));
+
+ out:
+	aufs_read_unlock(root, !AuLock_IR);
+	return err;
+}
+#endif
+
+static int noinline_for_stack
+au_opts_parse_mod(struct au_opt_mod *mod, substring_t args[])
+{
+	int err;
+	struct path path;
+	char *p;
+
+	err = -EINVAL;
+	mod->path = args[0].from;
+	p = strchr(mod->path, '=');
+	if (unlikely(!p)) {
+		pr_err("no permssion %s\n", args[0].from);
+		goto out;
+	}
+
+	*p++ = 0;
+	err = vfsub_kern_path(mod->path, lkup_dirflags, &path);
+	if (unlikely(err)) {
+		pr_err("lookup failed %s (%d)\n", mod->path, err);
+		goto out;
+	}
+
+	mod->perm = br_perm_val(p);
+	AuDbg("mod path %s, perm 0x%x, %s\n", mod->path, mod->perm, p);
+	mod->h_root = dget(path.dentry);
+	path_put(&path);
+
+ out:
+	return err;
+}
+
+#if 0 /* reserved for future use */
+static int au_opts_parse_imod(struct super_block *sb, aufs_bindex_t bindex,
+			      struct au_opt_mod *mod, substring_t args[])
+{
+	int err;
+	struct dentry *root;
+
+	err = -EINVAL;
+	root = sb->s_root;
+	aufs_read_lock(root, AuLock_FLUSH);
+	if (bindex < 0 || au_sbend(sb) < bindex) {
+		pr_err("out of bounds, %d\n", bindex);
+		goto out;
+	}
+
+	err = 0;
+	mod->perm = br_perm_val(args[1].from);
+	AuDbg("mod path %s, perm 0x%x, %s\n",
+	      mod->path, mod->perm, args[1].from);
+	mod->h_root = dget(au_h_dptr(root, bindex));
+
+ out:
+	aufs_read_unlock(root, !AuLock_IR);
+	return err;
+}
+#endif
+
+static int au_opts_parse_xino(struct super_block *sb, struct au_opt_xino *xino,
+			      substring_t args[])
+{
+	int err;
+	struct file *file;
+
+	file = au_xino_create(sb, args[0].from, /*silent*/0);
+	err = PTR_ERR(file);
+	if (IS_ERR(file))
+		goto out;
+
+	err = -EINVAL;
+	if (unlikely(file->f_dentry->d_sb == sb)) {
+		fput(file);
+		pr_err("%s must be outside\n", args[0].from);
+		goto out;
+	}
+
+	err = 0;
+	xino->file = file;
+	xino->path = args[0].from;
+
+ out:
+	return err;
+}
+
+static int noinline_for_stack
+au_opts_parse_xino_itrunc_path(struct super_block *sb,
+			       struct au_opt_xino_itrunc *xino_itrunc,
+			       substring_t args[])
+{
+	int err;
+	aufs_bindex_t bend, bindex;
+	struct path path;
+	struct dentry *root;
+
+	err = vfsub_kern_path(args[0].from, lkup_dirflags, &path);
+	if (unlikely(err)) {
+		pr_err("lookup failed %s (%d)\n", args[0].from, err);
+		goto out;
+	}
+
+	xino_itrunc->bindex = -1;
+	root = sb->s_root;
+	aufs_read_lock(root, AuLock_FLUSH);
+	bend = au_sbend(sb);
+	for (bindex = 0; bindex <= bend; bindex++) {
+		if (au_h_dptr(root, bindex) == path.dentry) {
+			xino_itrunc->bindex = bindex;
+			break;
+		}
+	}
+	aufs_read_unlock(root, !AuLock_IR);
+	path_put(&path);
+
+	if (unlikely(xino_itrunc->bindex < 0)) {
+		pr_err("no such branch %s\n", args[0].from);
+		err = -EINVAL;
+	}
+
+ out:
+	return err;
+}
+
+/* called without aufs lock */
+int au_opts_parse(struct super_block *sb, char *str, struct au_opts *opts)
+{
+	int err, n, token;
+	aufs_bindex_t bindex;
+	unsigned char skipped;
+	struct dentry *root;
+	struct au_opt *opt, *opt_tail;
+	char *opt_str;
+	/* reduce the stack space */
+	union {
+		struct au_opt_xino_itrunc *xino_itrunc;
+		struct au_opt_wbr_create *create;
+	} u;
+	struct {
+		substring_t args[MAX_OPT_ARGS];
+	} *a;
+
+	err = -ENOMEM;
+	a = kmalloc(sizeof(*a), GFP_NOFS);
+	if (unlikely(!a))
+		goto out;
+
+	root = sb->s_root;
+	err = 0;
+	bindex = 0;
+	opt = opts->opt;
+	opt_tail = opt + opts->max_opt - 1;
+	opt->type = Opt_tail;
+	while (!err && (opt_str = strsep(&str, ",")) && *opt_str) {
+		err = -EINVAL;
+		skipped = 0;
+		token = match_token(opt_str, options, a->args);
+		switch (token) {
+		case Opt_br:
+			err = 0;
+			while (!err && (opt_str = strsep(&a->args[0].from, ":"))
+			       && *opt_str) {
+				err = opt_add(opt, opt_str, opts->sb_flags,
+					      bindex++);
+				if (unlikely(!err && ++opt > opt_tail)) {
+					err = -E2BIG;
+					break;
+				}
+				opt->type = Opt_tail;
+				skipped = 1;
+			}
+			break;
+		case Opt_add:
+			if (unlikely(match_int(&a->args[0], &n))) {
+				pr_err("bad integer in %s\n", opt_str);
+				break;
+			}
+			bindex = n;
+			err = opt_add(opt, a->args[1].from, opts->sb_flags,
+				      bindex);
+			if (!err)
+				opt->type = token;
+			break;
+		case Opt_append:
+			err = opt_add(opt, a->args[0].from, opts->sb_flags,
+				      /*dummy bindex*/1);
+			if (!err)
+				opt->type = token;
+			break;
+		case Opt_prepend:
+			err = opt_add(opt, a->args[0].from, opts->sb_flags,
+				      /*bindex*/0);
+			if (!err)
+				opt->type = token;
+			break;
+		case Opt_del:
+			err = au_opts_parse_del(&opt->del, a->args);
+			if (!err)
+				opt->type = token;
+			break;
+#if 0 /* reserved for future use */
+		case Opt_idel:
+			del->pathname = "(indexed)";
+			if (unlikely(match_int(&args[0], &n))) {
+				pr_err("bad integer in %s\n", opt_str);
+				break;
+			}
+			err = au_opts_parse_idel(sb, n, &opt->del, a->args);
+			if (!err)
+				opt->type = token;
+			break;
+#endif
+		case Opt_mod:
+			err = au_opts_parse_mod(&opt->mod, a->args);
+			if (!err)
+				opt->type = token;
+			break;
+#ifdef IMOD /* reserved for future use */
+		case Opt_imod:
+			u.mod->path = "(indexed)";
+			if (unlikely(match_int(&a->args[0], &n))) {
+				pr_err("bad integer in %s\n", opt_str);
+				break;
+			}
+			err = au_opts_parse_imod(sb, n, &opt->mod, a->args);
+			if (!err)
+				opt->type = token;
+			break;
+#endif
+		case Opt_xino:
+			err = au_opts_parse_xino(sb, &opt->xino, a->args);
+			if (!err)
+				opt->type = token;
+			break;
+
+		case Opt_trunc_xino_path:
+			err = au_opts_parse_xino_itrunc_path
+				(sb, &opt->xino_itrunc, a->args);
+			if (!err)
+				opt->type = token;
+			break;
+
+		case Opt_itrunc_xino:
+			u.xino_itrunc = &opt->xino_itrunc;
+			if (unlikely(match_int(&a->args[0], &n))) {
+				pr_err("bad integer in %s\n", opt_str);
+				break;
+			}
+			u.xino_itrunc->bindex = n;
+			aufs_read_lock(root, AuLock_FLUSH);
+			if (n < 0 || au_sbend(sb) < n) {
+				pr_err("out of bounds, %d\n", n);
+				aufs_read_unlock(root, !AuLock_IR);
+				break;
+			}
+			aufs_read_unlock(root, !AuLock_IR);
+			err = 0;
+			opt->type = token;
+			break;
+
+		case Opt_dirwh:
+			if (unlikely(match_int(&a->args[0], &opt->dirwh)))
+				break;
+			err = 0;
+			opt->type = token;
+			break;
+
+		case Opt_rdcache:
+			if (unlikely(match_int(&a->args[0], &opt->rdcache)))
+				break;
+			err = 0;
+			opt->type = token;
+			break;
+		case Opt_rdblk:
+			if (unlikely(match_int(&a->args[0], &n)
+				     || n < 0
+				     || n > KMALLOC_MAX_SIZE)) {
+				pr_err("bad integer in %s\n", opt_str);
+				break;
+			}
+			if (unlikely(n && n < NAME_MAX)) {
+				pr_err("rdblk must be larger than %d\n",
+				       NAME_MAX);
+				break;
+			}
+			opt->rdblk = n;
+			err = 0;
+			opt->type = token;
+			break;
+		case Opt_rdhash:
+			if (unlikely(match_int(&a->args[0], &n)
+				     || n < 0
+				     || n * sizeof(struct hlist_head)
+				     > KMALLOC_MAX_SIZE)) {
+				pr_err("bad integer in %s\n", opt_str);
+				break;
+			}
+			opt->rdhash = n;
+			err = 0;
+			opt->type = token;
+			break;
+
+		case Opt_trunc_xino:
+		case Opt_notrunc_xino:
+		case Opt_noxino:
+		case Opt_trunc_xib:
+		case Opt_notrunc_xib:
+		case Opt_shwh:
+		case Opt_noshwh:
+		case Opt_plink:
+		case Opt_noplink:
+		case Opt_list_plink:
+		case Opt_diropq_a:
+		case Opt_diropq_w:
+		case Opt_warn_perm:
+		case Opt_nowarn_perm:
+		case Opt_refrof:
+		case Opt_norefrof:
+		case Opt_verbose:
+		case Opt_noverbose:
+		case Opt_sum:
+		case Opt_nosum:
+		case Opt_wsum:
+		case Opt_rdblk_def:
+		case Opt_rdhash_def:
+			err = 0;
+			opt->type = token;
+			break;
+
+		case Opt_udba:
+			opt->udba = udba_val(a->args[0].from);
+			if (opt->udba >= 0) {
+				err = 0;
+				opt->type = token;
+			} else
+				pr_err("wrong value, %s\n", opt_str);
+			break;
+
+		case Opt_wbr_create:
+			u.create = &opt->wbr_create;
+			u.create->wbr_create
+				= au_wbr_create_val(a->args[0].from, u.create);
+			if (u.create->wbr_create >= 0) {
+				err = 0;
+				opt->type = token;
+			} else
+				pr_err("wrong value, %s\n", opt_str);
+			break;
+		case Opt_wbr_copyup:
+			opt->wbr_copyup = au_wbr_copyup_val(a->args[0].from);
+			if (opt->wbr_copyup >= 0) {
+				err = 0;
+				opt->type = token;
+			} else
+				pr_err("wrong value, %s\n", opt_str);
+			break;
+
+		case Opt_ignore:
+			pr_warning("ignored %s\n", opt_str);
+			/*FALLTHROUGH*/
+		case Opt_ignore_silent:
+			skipped = 1;
+			err = 0;
+			break;
+		case Opt_err:
+			pr_err("unknown option %s\n", opt_str);
+			break;
+		}
+
+		if (!err && !skipped) {
+			if (unlikely(++opt > opt_tail)) {
+				err = -E2BIG;
+				opt--;
+				opt->type = Opt_tail;
+				break;
+			}
+			opt->type = Opt_tail;
+		}
+	}
+
+	kfree(a);
+	dump_opts(opts);
+	if (unlikely(err))
+		au_opts_free(opts);
+
+ out:
+	return err;
+}
+
+static int au_opt_wbr_create(struct super_block *sb,
+			     struct au_opt_wbr_create *create)
+{
+	int err;
+	struct au_sbinfo *sbinfo;
+
+	SiMustWriteLock(sb);
+
+	err = 1; /* handled */
+	sbinfo = au_sbi(sb);
+	if (sbinfo->si_wbr_create_ops->fin) {
+		err = sbinfo->si_wbr_create_ops->fin(sb);
+		if (!err)
+			err = 1;
+	}
+
+	sbinfo->si_wbr_create = create->wbr_create;
+	sbinfo->si_wbr_create_ops = au_wbr_create_ops + create->wbr_create;
+	switch (create->wbr_create) {
+	case AuWbrCreate_MFSRRV:
+	case AuWbrCreate_MFSRR:
+		sbinfo->si_wbr_mfs.mfsrr_watermark = create->mfsrr_watermark;
+		/*FALLTHROUGH*/
+	case AuWbrCreate_MFS:
+	case AuWbrCreate_MFSV:
+	case AuWbrCreate_PMFS:
+	case AuWbrCreate_PMFSV:
+		sbinfo->si_wbr_mfs.mfs_expire = create->mfs_second * HZ;
+		break;
+	}
+
+	if (sbinfo->si_wbr_create_ops->init)
+		sbinfo->si_wbr_create_ops->init(sb); /* ignore */
+
+	return err;
+}
+
+/*
+ * returns,
+ * plus: processed without an error
+ * zero: unprocessed
+ */
+static int au_opt_simple(struct super_block *sb, struct au_opt *opt,
+			 struct au_opts *opts)
+{
+	int err;
+	struct au_sbinfo *sbinfo;
+
+	SiMustWriteLock(sb);
+
+	err = 1; /* handled */
+	sbinfo = au_sbi(sb);
+	switch (opt->type) {
+	case Opt_udba:
+		sbinfo->si_mntflags &= ~AuOptMask_UDBA;
+		sbinfo->si_mntflags |= opt->udba;
+		opts->given_udba |= opt->udba;
+		break;
+
+	case Opt_plink:
+		au_opt_set(sbinfo->si_mntflags, PLINK);
+		break;
+	case Opt_noplink:
+		if (au_opt_test(sbinfo->si_mntflags, PLINK))
+			au_plink_put(sb);
+		au_opt_clr(sbinfo->si_mntflags, PLINK);
+		break;
+	case Opt_list_plink:
+		if (au_opt_test(sbinfo->si_mntflags, PLINK))
+			au_plink_list(sb);
+		break;
+
+	case Opt_diropq_a:
+		au_opt_set(sbinfo->si_mntflags, ALWAYS_DIROPQ);
+		break;
+	case Opt_diropq_w:
+		au_opt_clr(sbinfo->si_mntflags, ALWAYS_DIROPQ);
+		break;
+
+	case Opt_warn_perm:
+		au_opt_set(sbinfo->si_mntflags, WARN_PERM);
+		break;
+	case Opt_nowarn_perm:
+		au_opt_clr(sbinfo->si_mntflags, WARN_PERM);
+		break;
+
+	case Opt_refrof:
+		au_opt_set(sbinfo->si_mntflags, REFROF);
+		break;
+	case Opt_norefrof:
+		au_opt_clr(sbinfo->si_mntflags, REFROF);
+		break;
+
+	case Opt_verbose:
+		au_opt_set(sbinfo->si_mntflags, VERBOSE);
+		break;
+	case Opt_noverbose:
+		au_opt_clr(sbinfo->si_mntflags, VERBOSE);
+		break;
+
+	case Opt_sum:
+		au_opt_set(sbinfo->si_mntflags, SUM);
+		break;
+	case Opt_wsum:
+		au_opt_clr(sbinfo->si_mntflags, SUM);
+		au_opt_set(sbinfo->si_mntflags, SUM_W);
+	case Opt_nosum:
+		au_opt_clr(sbinfo->si_mntflags, SUM);
+		au_opt_clr(sbinfo->si_mntflags, SUM_W);
+		break;
+
+	case Opt_wbr_create:
+		err = au_opt_wbr_create(sb, &opt->wbr_create);
+		break;
+	case Opt_wbr_copyup:
+		sbinfo->si_wbr_copyup = opt->wbr_copyup;
+		sbinfo->si_wbr_copyup_ops = au_wbr_copyup_ops + opt->wbr_copyup;
+		break;
+
+	case Opt_dirwh:
+		sbinfo->si_dirwh = opt->dirwh;
+		break;
+
+	case Opt_rdcache:
+		sbinfo->si_rdcache = opt->rdcache * HZ;
+		break;
+	case Opt_rdblk:
+		sbinfo->si_rdblk = opt->rdblk;
+		break;
+	case Opt_rdblk_def:
+		sbinfo->si_rdblk = AUFS_RDBLK_DEF;
+		break;
+	case Opt_rdhash:
+		sbinfo->si_rdhash = opt->rdhash;
+		break;
+	case Opt_rdhash_def:
+		sbinfo->si_rdhash = AUFS_RDHASH_DEF;
+		break;
+
+	case Opt_shwh:
+		au_opt_set(sbinfo->si_mntflags, SHWH);
+		break;
+	case Opt_noshwh:
+		au_opt_clr(sbinfo->si_mntflags, SHWH);
+		break;
+
+	case Opt_trunc_xino:
+		au_opt_set(sbinfo->si_mntflags, TRUNC_XINO);
+		break;
+	case Opt_notrunc_xino:
+		au_opt_clr(sbinfo->si_mntflags, TRUNC_XINO);
+		break;
+
+	case Opt_trunc_xino_path:
+	case Opt_itrunc_xino:
+		err = au_xino_trunc(sb, opt->xino_itrunc.bindex);
+		if (!err)
+			err = 1;
+		break;
+
+	case Opt_trunc_xib:
+		au_fset_opts(opts->flags, TRUNC_XIB);
+		break;
+	case Opt_notrunc_xib:
+		au_fclr_opts(opts->flags, TRUNC_XIB);
+		break;
+
+	default:
+		err = 0;
+		break;
+	}
+
+	return err;
+}
+
+/*
+ * returns tri-state.
+ * plus: processed without an error
+ * zero: unprocessed
+ * minus: error
+ */
+static int au_opt_br(struct super_block *sb, struct au_opt *opt,
+		     struct au_opts *opts)
+{
+	int err, do_refresh;
+
+	err = 0;
+	switch (opt->type) {
+	case Opt_append:
+		opt->add.bindex = au_sbend(sb) + 1;
+		if (opt->add.bindex < 0)
+			opt->add.bindex = 0;
+		goto add;
+	case Opt_prepend:
+		opt->add.bindex = 0;
+	add:
+	case Opt_add:
+		err = au_br_add(sb, &opt->add,
+				au_ftest_opts(opts->flags, REMOUNT));
+		if (!err) {
+			err = 1;
+			au_fset_opts(opts->flags, REFRESH_DIR);
+			if (au_br_whable(opt->add.perm))
+				au_fset_opts(opts->flags, REFRESH_NONDIR);
+		}
+		break;
+
+	case Opt_del:
+	case Opt_idel:
+		err = au_br_del(sb, &opt->del,
+				au_ftest_opts(opts->flags, REMOUNT));
+		if (!err) {
+			err = 1;
+			au_fset_opts(opts->flags, TRUNC_XIB);
+			au_fset_opts(opts->flags, REFRESH_DIR);
+			au_fset_opts(opts->flags, REFRESH_NONDIR);
+		}
+		break;
+
+	case Opt_mod:
+	case Opt_imod:
+		err = au_br_mod(sb, &opt->mod,
+				au_ftest_opts(opts->flags, REMOUNT),
+				&do_refresh);
+		if (!err) {
+			err = 1;
+			if (do_refresh) {
+				au_fset_opts(opts->flags, REFRESH_DIR);
+				au_fset_opts(opts->flags, REFRESH_NONDIR);
+			}
+		}
+		break;
+	}
+
+	return err;
+}
+
+static int au_opt_xino(struct super_block *sb, struct au_opt *opt,
+		       struct au_opt_xino **opt_xino,
+		       struct au_opts *opts)
+{
+	int err;
+	aufs_bindex_t bend, bindex;
+	struct dentry *root, *parent, *h_root;
+
+	err = 0;
+	switch (opt->type) {
+	case Opt_xino:
+		err = au_xino_set(sb, &opt->xino,
+				  !!au_ftest_opts(opts->flags, REMOUNT));
+		if (unlikely(err))
+			break;
+
+		*opt_xino = &opt->xino;
+		au_xino_brid_set(sb, -1);
+
+		/* safe d_parent access */
+		parent = opt->xino.file->f_dentry->d_parent;
+		root = sb->s_root;
+		bend = au_sbend(sb);
+		for (bindex = 0; bindex <= bend; bindex++) {
+			h_root = au_h_dptr(root, bindex);
+			if (h_root == parent) {
+				au_xino_brid_set(sb, au_sbr_id(sb, bindex));
+				break;
+			}
+		}
+		break;
+
+	case Opt_noxino:
+		au_xino_clr(sb);
+		au_xino_brid_set(sb, -1);
+		*opt_xino = (void *)-1;
+		break;
+	}
+
+	return err;
+}
+
+int au_opts_verify(struct super_block *sb, unsigned long sb_flags,
+		   unsigned int pending)
+{
+	int err;
+	aufs_bindex_t bindex, bend;
+	unsigned char do_plink, skip, do_free;
+	struct au_branch *br;
+	struct au_wbr *wbr;
+	struct dentry *root;
+	struct inode *dir, *h_dir;
+	struct au_sbinfo *sbinfo;
+	struct au_hinode *hdir;
+
+	SiMustAnyLock(sb);
+
+	sbinfo = au_sbi(sb);
+	AuDebugOn(!(sbinfo->si_mntflags & AuOptMask_UDBA));
+
+	if (!(sb_flags & MS_RDONLY)) {
+		if (unlikely(!au_br_writable(au_sbr_perm(sb, 0))))
+			pr_warning("first branch should be rw\n");
+		if (unlikely(au_opt_test(sbinfo->si_mntflags, SHWH)))
+			pr_warning("shwh should be used with ro\n");
+	}
+
+	if (au_opt_test((sbinfo->si_mntflags | pending), UDBA_HINOTIFY)
+	    && !au_opt_test(sbinfo->si_mntflags, XINO))
+		pr_warning("udba=inotify requires xino\n");
+
+	err = 0;
+	root = sb->s_root;
+	dir = sb->s_root->d_inode;
+	do_plink = !!au_opt_test(sbinfo->si_mntflags, PLINK);
+	bend = au_sbend(sb);
+	for (bindex = 0; !err && bindex <= bend; bindex++) {
+		skip = 0;
+		h_dir = au_h_iptr(dir, bindex);
+		br = au_sbr(sb, bindex);
+		do_free = 0;
+
+		wbr = br->br_wbr;
+		if (wbr)
+			wbr_wh_read_lock(wbr);
+
+		switch (br->br_perm) {
+		case AuBrPerm_RO:
+		case AuBrPerm_ROWH:
+		case AuBrPerm_RR:
+		case AuBrPerm_RRWH:
+			do_free = !!wbr;
+			skip = (!wbr
+				|| (!wbr->wbr_whbase
+				    && !wbr->wbr_plink
+				    && !wbr->wbr_orph));
+			break;
+
+		case AuBrPerm_RWNoLinkWH:
+			/* skip = (!br->br_whbase && !br->br_orph); */
+			skip = (!wbr || !wbr->wbr_whbase);
+			if (skip && wbr) {
+				if (do_plink)
+					skip = !!wbr->wbr_plink;
+				else
+					skip = !wbr->wbr_plink;
+			}
+			break;
+
+		case AuBrPerm_RW:
+			/* skip = (br->br_whbase && br->br_ohph); */
+			skip = (wbr && wbr->wbr_whbase);
+			if (skip) {
+				if (do_plink)
+					skip = !!wbr->wbr_plink;
+				else
+					skip = !wbr->wbr_plink;
+			}
+			break;
+
+		default:
+			BUG();
+		}
+		if (wbr)
+			wbr_wh_read_unlock(wbr);
+
+		if (skip)
+			continue;
+
+		hdir = au_hi(dir, bindex);
+		au_hin_imtx_lock_nested(hdir, AuLsc_I_PARENT);
+		if (wbr)
+			wbr_wh_write_lock(wbr);
+		err = au_wh_init(au_h_dptr(root, bindex), br, sb);
+		if (wbr)
+			wbr_wh_write_unlock(wbr);
+		au_hin_imtx_unlock(hdir);
+
+		if (!err && do_free) {
+			kfree(wbr);
+			br->br_wbr = NULL;
+		}
+	}
+
+	return err;
+}
+
+int au_opts_mount(struct super_block *sb, struct au_opts *opts)
+{
+	int err;
+	unsigned int tmp;
+	aufs_bindex_t bend;
+	struct au_opt *opt;
+	struct au_opt_xino *opt_xino, xino;
+	struct au_sbinfo *sbinfo;
+
+	SiMustWriteLock(sb);
+
+	err = 0;
+	opt_xino = NULL;
+	opt = opts->opt;
+	while (err >= 0 && opt->type != Opt_tail)
+		err = au_opt_simple(sb, opt++, opts);
+	if (err > 0)
+		err = 0;
+	else if (unlikely(err < 0))
+		goto out;
+
+	/* disable xino and udba temporary */
+	sbinfo = au_sbi(sb);
+	tmp = sbinfo->si_mntflags;
+	au_opt_clr(sbinfo->si_mntflags, XINO);
+	au_opt_set_udba(sbinfo->si_mntflags, UDBA_REVAL);
+
+	opt = opts->opt;
+	while (err >= 0 && opt->type != Opt_tail)
+		err = au_opt_br(sb, opt++, opts);
+	if (err > 0)
+		err = 0;
+	else if (unlikely(err < 0))
+		goto out;
+
+	bend = au_sbend(sb);
+	if (unlikely(bend < 0)) {
+		err = -EINVAL;
+		pr_err("no branches\n");
+		goto out;
+	}
+
+	if (au_opt_test(tmp, XINO))
+		au_opt_set(sbinfo->si_mntflags, XINO);
+	opt = opts->opt;
+	while (!err && opt->type != Opt_tail)
+		err = au_opt_xino(sb, opt++, &opt_xino, opts);
+	if (unlikely(err))
+		goto out;
+
+	err = au_opts_verify(sb, sb->s_flags, tmp);
+	if (unlikely(err))
+		goto out;
+
+	/* restore xino */
+	if (au_opt_test(tmp, XINO) && !opt_xino) {
+		xino.file = au_xino_def(sb);
+		err = PTR_ERR(xino.file);
+		if (IS_ERR(xino.file))
+			goto out;
+
+		err = au_xino_set(sb, &xino, /*remount*/0);
+		fput(xino.file);
+		if (unlikely(err))
+			goto out;
+	}
+
+	/* restore udba */
+	sbinfo->si_mntflags &= ~AuOptMask_UDBA;
+	sbinfo->si_mntflags |= (tmp & AuOptMask_UDBA);
+	if (au_opt_test(tmp, UDBA_HINOTIFY)) {
+		struct inode *dir = sb->s_root->d_inode;
+		au_reset_hinotify(dir,
+				  au_hi_flags(dir, /*isdir*/1) & ~AuHi_XINO);
+	}
+
+ out:
+	return err;
+}
+
+int au_opts_remount(struct super_block *sb, struct au_opts *opts)
+{
+	int err, rerr;
+	struct inode *dir;
+	struct au_opt_xino *opt_xino;
+	struct au_opt *opt;
+	struct au_sbinfo *sbinfo;
+
+	SiMustWriteLock(sb);
+
+	dir = sb->s_root->d_inode;
+	sbinfo = au_sbi(sb);
+	err = 0;
+	opt_xino = NULL;
+	opt = opts->opt;
+	while (err >= 0 && opt->type != Opt_tail) {
+		err = au_opt_simple(sb, opt, opts);
+		if (!err)
+			err = au_opt_br(sb, opt, opts);
+		if (!err)
+			err = au_opt_xino(sb, opt, &opt_xino, opts);
+		opt++;
+	}
+	if (err > 0)
+		err = 0;
+	AuTraceErr(err);
+	/* go on even err */
+
+	rerr = au_opts_verify(sb, opts->sb_flags, /*pending*/0);
+	if (unlikely(rerr && !err))
+		err = rerr;
+
+	if (au_ftest_opts(opts->flags, TRUNC_XIB)) {
+		rerr = au_xib_trunc(sb);
+		if (unlikely(rerr && !err))
+			err = rerr;
+	}
+
+	/* will be handled by the caller */
+	if (!au_ftest_opts(opts->flags, REFRESH_DIR)
+	    && (opts->given_udba || au_opt_test(sbinfo->si_mntflags, XINO)))
+		au_fset_opts(opts->flags, REFRESH_DIR);
+
+	AuDbg("status 0x%x\n", opts->flags);
+	return err;
+}
+
+/* ---------------------------------------------------------------------- */
+
+unsigned int au_opt_udba(struct super_block *sb)
+{
+	return au_mntflags(sb) & AuOptMask_UDBA;
+}
--- linux-mvl-dove-2.6.32.orig/ubuntu/dm-raid4-5/dm-memcache.h
+++ linux-mvl-dove-2.6.32/ubuntu/dm-raid4-5/dm-memcache.h
@@ -0,0 +1,68 @@
+/*
+ * Copyright (C) 2006-2008 Red Hat, Inc. All rights reserved.
+ *
+ * Module Author: Heinz Mauelshagen <Mauelshagen@RedHat.com>
+ *
+ * Device-mapper memory object handling:
+ *
+ * o allocate/free total_pages in a per client page pool.
+ *
+ * o allocate/free memory objects with chunks (1..n) of
+ *   pages_per_chunk pages hanging off.
+ *
+ * This file is released under the GPL.
+ */
+
+#ifndef _DM_MEM_CACHE_H
+#define _DM_MEM_CACHE_H
+
+#define	DM_MEM_CACHE_H_VERSION	"0.1"
+
+#include "dm.h"
+#include <linux/dm-io.h>
+
+static inline struct page_list *pl_elem(struct page_list *pl, unsigned p)
+{
+	while (pl && p--)
+		pl = pl->next;
+
+	return pl;
+}
+
+struct dm_mem_cache_object {
+	struct page_list *pl; /* Dynamically allocated array */
+	void *private;	      /* Caller context reference */
+};
+
+struct dm_mem_cache_client;
+
+/*
+ * Create/destroy dm memory cache client resources.
+ *
+ * On creation, a number of @objects with @chunks of
+ * @pages_per_chunk pages will be allocated.
+ */
+struct dm_mem_cache_client *
+dm_mem_cache_client_create(unsigned objects, unsigned chunks,
+			   unsigned pages_per_chunk);
+void dm_mem_cache_client_destroy(struct dm_mem_cache_client *client);
+
+/*
+ * Grow/shrink a dm memory cache client resources
+ * by @objetcs amount of objects.
+ */
+int dm_mem_cache_grow(struct dm_mem_cache_client *client, unsigned objects);
+int dm_mem_cache_shrink(struct dm_mem_cache_client *client, unsigned objects);
+
+/*
+ * Allocate/free a memory object
+ *
+ * On allocation one object with an amount of chunks and
+ * an amount of pages per chunk will be returned on success.
+ */
+struct dm_mem_cache_object *
+dm_mem_cache_alloc(struct dm_mem_cache_client *client);
+void dm_mem_cache_free(struct dm_mem_cache_client *client,
+		       struct dm_mem_cache_object *object);
+
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/dm-raid4-5/dm-raid4-5.h
+++ linux-mvl-dove-2.6.32/ubuntu/dm-raid4-5/dm-raid4-5.h
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2006  Red Hat GmbH
+ *
+ * Module Author: Heinz Mauelshagen (Mauelshagen@RedHat.com)
+ *
+ * This file is released under the GPL.
+ *
+ */
+
+#ifndef _DM_RAID45_H
+#define _DM_RAID45_H
+
+/* Factor out to dm.h! */
+#define	STR_LEN(ptr, str) ptr, str, strlen(ptr)
+
+enum lock_type { RAID45_EX, RAID45_SHARED };
+
+struct dmraid45_locking_type {
+        /* Request a lock on a stripe. */
+        void* (*lock)(sector_t key, enum lock_type type);
+
+        /* Release a lock on a stripe. */
+        void (*unlock)(void *lock_handle);
+
+};
+
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/dm-raid4-5/dm-raid45.h
+++ linux-mvl-dove-2.6.32/ubuntu/dm-raid4-5/dm-raid45.h
@@ -0,0 +1,28 @@
+/*
+ * Copyright (C) 2006-2008 Red Hat, Inc. All rights reserved.
+ *
+ * Module Author: Heinz Mauelshagen (Mauelshagen@RedHat.com)
+ *
+ * Locking definitions for the device-mapper RAID45 target.
+ *
+ * This file is released under the GPL.
+ *
+ */
+
+#ifndef _DM_RAID45_H
+#define _DM_RAID45_H
+
+/* Factor out to dm.h! */
+#define	STR_LEN(ptr, str)	(ptr), (str), strlen((ptr))
+
+enum dm_lock_type { DM_RAID45_EX, DM_RAID45_SHARED };
+
+struct dm_raid45_locking_type {
+	/* Request a lock on a stripe. */
+	void* (*lock)(sector_t key, enum dm_lock_type type);
+
+	/* Release a lock on a stripe. */
+	void (*unlock)(void *lock_handle);
+};
+
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/dm-raid4-5/Kconfig
+++ linux-mvl-dove-2.6.32/ubuntu/dm-raid4-5/Kconfig
@@ -0,0 +1,6 @@
+config DM_RAID45
+	tristate "RAID 4/5 target (EXPERIMENTAL)"
+	depends on BLK_DEV_DM && XOR_BLOCKS && EXPERIMENTAL
+	default m
+	---help---
+	A target that supports RAID4 and RAID5 mappings.
--- linux-mvl-dove-2.6.32.orig/ubuntu/dm-raid4-5/dm-region-hash.h
+++ linux-mvl-dove-2.6.32/ubuntu/dm-raid4-5/dm-region-hash.h
@@ -0,0 +1,108 @@
+/*
+ * Copyright (C) 2003 Sistina Software Limited.
+ * Copyright (C) 2004-2008 Red Hat, Inc. All rights reserved.
+ *
+ * Device-Mapper dirty region hash interface.
+ *
+ * This file is released under the GPL.
+ */
+
+#ifndef DM_REGION_HASH_H
+#define DM_REGION_HASH_H
+
+#include <linux/dm-dirty-log.h>
+
+/*-----------------------------------------------------------------
+ * Region hash
+ *----------------------------------------------------------------*/
+struct dm_region_hash;
+struct dm_region;
+
+/*
+ * States a region can have.
+ */
+enum dm_rh_region_states {
+	DM_RH_CLEAN	 = 0x01,	/* No writes in flight. */
+	DM_RH_DIRTY	 = 0x02,	/* Writes in flight. */
+	DM_RH_NOSYNC	 = 0x04,	/* Out of sync. */
+	DM_RH_RECOVERING = 0x08,	/* Under resynchronization. */
+};
+
+/*
+ * Region hash create/destroy.
+ */
+struct bio_list;
+struct dm_region_hash *dm_region_hash_create(
+		void *context, void (*dispatch_bios)(void *context,
+						     struct bio_list *bios),
+		void (*wakeup_workers)(void *context),
+		void (*wakeup_all_recovery_waiters)(void *context),
+		sector_t target_begin, unsigned max_recovery,
+		struct dm_dirty_log *log, uint32_t region_size,
+		region_t nr_regions);
+void dm_region_hash_destroy(struct dm_region_hash *rh);
+
+struct dm_dirty_log *dm_rh_dirty_log(struct dm_region_hash *rh);
+
+/*
+ * Conversion functions.
+ */
+region_t dm_rh_bio_to_region(struct dm_region_hash *rh, struct bio *bio);
+sector_t dm_rh_region_to_sector(struct dm_region_hash *rh, region_t region);
+region_t dm_rh_sector_to_region(struct dm_region_hash *rh, sector_t sector);
+void *dm_rh_region_context(struct dm_region *reg);
+
+/*
+ * Get region size and key (ie. number of the region).
+ */
+sector_t dm_rh_get_region_size(struct dm_region_hash *rh);
+region_t dm_rh_get_region_key(struct dm_region *reg);
+
+/*
+ * Get/set/update region state (and dirty log).
+ *
+ */
+int dm_rh_get_state(struct dm_region_hash *rh, region_t region, int may_block);
+void dm_rh_set_state(struct dm_region_hash *rh, region_t region,
+		     enum dm_rh_region_states state, int may_block);
+
+/* Non-zero errors_handled leaves the state of the region NOSYNC */
+void dm_rh_update_states(struct dm_region_hash *rh, int errors_handled);
+
+/* Flush the region hash and dirty log. */
+int dm_rh_flush(struct dm_region_hash *rh);
+
+/* Inc/dec pending count on regions. */
+void dm_rh_inc(struct dm_region_hash *rh, region_t region);
+void dm_rh_inc_pending(struct dm_region_hash *rh, struct bio_list *bios);
+void dm_rh_dec(struct dm_region_hash *rh, region_t region);
+
+/* Delay bios on regions. */
+void dm_rh_delay(struct dm_region_hash *rh, struct bio *bio);
+void dm_rh_delay_by_region(struct dm_region_hash *rh, struct bio *bio,
+			   region_t region);
+
+void dm_rh_mark_nosync(struct dm_region_hash *rh,
+		       struct bio *bio, unsigned done, int error);
+
+/*
+ * Region recovery control.
+ */
+
+/* Prepare some regions for recovery by starting to quiesce them. */
+void dm_rh_recovery_prepare(struct dm_region_hash *rh);
+
+/* Try fetching a quiesced region for recovery. */
+struct dm_region *dm_rh_recovery_start(struct dm_region_hash *rh);
+
+/* Report recovery end on a region. */
+void dm_rh_recovery_end(struct dm_region *reg, int error);
+
+/* Returns number of regions with recovery work outstanding. */
+int dm_rh_recovery_in_flight(struct dm_region_hash *rh);
+
+/* Start/stop recovery. */
+void dm_rh_start_recovery(struct dm_region_hash *rh);
+void dm_rh_stop_recovery(struct dm_region_hash *rh);
+
+#endif /* DM_REGION_HASH_H */
--- linux-mvl-dove-2.6.32.orig/ubuntu/dm-raid4-5/BOM
+++ linux-mvl-dove-2.6.32/ubuntu/dm-raid4-5/BOM
@@ -0,0 +1,3 @@
+Downloaded from:	http://people.redhat.com/~heinzm/sw/dm/dm-raid45/
+Current Version:	2009.04.24 (2.6.30-rc3)
+Comments:		All of the patches to dmraid1/dm-log, etc are upstream.
--- linux-mvl-dove-2.6.32.orig/ubuntu/dm-raid4-5/dm-raid4-5.c
+++ linux-mvl-dove-2.6.32/ubuntu/dm-raid4-5/dm-raid4-5.c
@@ -0,0 +1,4547 @@
+/*[A[A
+ * Copyright (C) 2005-2009 Red Hat, Inc. All rights reserved.
+ *
+ * Module Author: Heinz Mauelshagen <heinzm@redhat.com>
+ *
+ * This file is released under the GPL.
+ *
+ *
+ * Linux 2.6 Device Mapper RAID4 and RAID5 target.
+ *
+ * Supports:
+ *	o RAID4 with dedicated and selectable parity device
+ *	o RAID5 with rotating parity (left+right, symmetric+asymmetric)
+ *	o recovery of out of sync device for initial
+ *	  RAID set creation or after dead drive replacement
+ *	o run time optimization of xor algorithm used to calculate parity
+ *
+ *
+ * Thanks to MD for:
+ *    o the raid address calculation algorithm
+ *    o the base of the biovec <-> page list copier.
+ *
+ *
+ * Uses region hash to keep track of how many writes are in flight to
+ * regions in order to use dirty log to keep state of regions to recover:
+ *
+ *    o clean regions (those which are synchronized
+ * 	and don't have write io in flight)
+ *    o dirty regions (those with write io in flight)
+ *
+ *
+ * On startup, any dirty regions are migrated to the
+ * 'nosync' state and are subject to recovery by the daemon.
+ *
+ * See raid_ctr() for table definition.
+ *
+ * FIXME: recovery bandwidth
+ */ 
+
+static const char *version = "v0.2594b";
+
+#include "dm.h"
+#include "dm-memcache.h"
+#include "dm-message.h"
+#include "dm-raid45.h"
+
+#include <linux/kernel.h>
+#include <linux/vmalloc.h>
+#include <linux/raid/xor.h>
+
+#include <linux/bio.h>
+#include <linux/dm-io.h>
+#include <linux/dm-dirty-log.h>
+#include "dm-region-hash.h"
+
+
+/*
+ * Configurable parameters
+ */
+
+/* Minimum/maximum and default # of selectable stripes. */
+#define	STRIPES_MIN		8
+#define	STRIPES_MAX		16384
+#define	STRIPES_DEFAULT		80
+
+/* Maximum and default chunk size in sectors if not set in constructor. */
+#define	CHUNK_SIZE_MIN		8
+#define	CHUNK_SIZE_MAX		16384
+#define	CHUNK_SIZE_DEFAULT	64
+
+/* Default io size in sectors if not set in constructor. */
+#define	IO_SIZE_MIN		CHUNK_SIZE_MIN
+#define	IO_SIZE_DEFAULT		IO_SIZE_MIN
+
+/* Recover io size default in sectors. */
+#define	RECOVER_IO_SIZE_MIN		64
+#define	RECOVER_IO_SIZE_DEFAULT		256
+
+/* Default, minimum and maximum percentage of recover io bandwidth. */
+#define	BANDWIDTH_DEFAULT	10
+#define	BANDWIDTH_MIN		1
+#define	BANDWIDTH_MAX		100
+
+/* # of parallel recovered regions */
+#define RECOVERY_STRIPES_MIN	1
+#define RECOVERY_STRIPES_MAX	64
+#define RECOVERY_STRIPES_DEFAULT	RECOVERY_STRIPES_MIN
+/*
+ * END Configurable parameters
+ */
+
+#define	TARGET	"dm-raid45"
+#define	DAEMON	"kraid45d"
+#define	DM_MSG_PREFIX	TARGET
+
+#define	SECTORS_PER_PAGE	(PAGE_SIZE >> SECTOR_SHIFT)
+
+/* Amount/size for __xor(). */
+#define	XOR_SIZE	PAGE_SIZE
+
+/* Check value in range. */
+#define	range_ok(i, min, max)	(i >= min && i <= max)
+
+/* Check argument is power of 2. */
+#define POWER_OF_2(a) (!(a & (a - 1)))
+
+/* Structure access macros. */
+/* Derive raid_set from stripe_cache pointer. */
+#define	RS(x)	container_of(x, struct raid_set, sc)
+
+/* Page reference. */
+#define PAGE(stripe, p)  ((stripe)->obj[p].pl->page)
+
+/* Stripe chunk reference. */
+#define CHUNK(stripe, p) ((stripe)->chunk + p)
+
+/* Bio list reference. */
+#define	BL(stripe, p, rw)	(stripe->chunk[p].bl + rw)
+#define	BL_CHUNK(chunk, rw)	(chunk->bl + rw)
+
+/* Page list reference. */
+#define	PL(stripe, p)		(stripe->obj[p].pl)
+/* END: structure access macros. */
+
+/* Factor out to dm-bio-list.h */
+static inline void bio_list_push(struct bio_list *bl, struct bio *bio)
+{
+	bio->bi_next = bl->head;
+	bl->head = bio;
+
+	if (!bl->tail)
+		bl->tail = bio;
+}
+
+/* Factor out to dm.h */
+#define TI_ERR_RET(str, ret) \
+	do { ti->error = str; return ret; } while (0);
+#define TI_ERR(str)     TI_ERR_RET(str, -EINVAL)
+
+/* Macro to define access IO flags access inline functions. */
+#define	BITOPS(name, what, var, flag) \
+static inline int TestClear ## name ## what(struct var *v) \
+{ return test_and_clear_bit(flag, &v->io.flags); } \
+static inline int TestSet ## name ## what(struct var *v) \
+{ return test_and_set_bit(flag, &v->io.flags); } \
+static inline void Clear ## name ## what(struct var *v) \
+{ clear_bit(flag, &v->io.flags); } \
+static inline void Set ## name ## what(struct var *v) \
+{ set_bit(flag, &v->io.flags); } \
+static inline int name ## what(struct var *v) \
+{ return test_bit(flag, &v->io.flags); }
+
+/*-----------------------------------------------------------------
+ * Stripe cache
+ *
+ * Cache for all reads and writes to raid sets (operational or degraded)
+ *
+ * We need to run all data to and from a RAID set through this cache,
+ * because parity chunks need to get calculated from data chunks
+ * or, in the degraded/resynchronization case, missing chunks need
+ * to be reconstructed using the other chunks of the stripe.
+ *---------------------------------------------------------------*/
+/* A chunk within a stripe (holds bios hanging off). */
+/* IO status flags for chunks of a stripe. */
+enum chunk_flags {
+	CHUNK_DIRTY,		/* Pages of chunk dirty; need writing. */
+	CHUNK_ERROR,		/* IO error on any chunk page. */
+	CHUNK_IO,		/* Allow/prohibit IO on chunk pages. */
+	CHUNK_LOCKED,		/* Chunk pages locked during IO. */
+	CHUNK_MUST_IO,		/* Chunk must io. */
+	CHUNK_UNLOCK,		/* Enforce chunk unlock. */
+	CHUNK_UPTODATE,		/* Chunk pages are uptodate. */
+};
+
+#if READ != 0 || WRITE != 1
+#error dm-raid45: READ/WRITE != 0/1 used as index!!!
+#endif
+
+enum bl_type {
+	WRITE_QUEUED = WRITE + 1,
+	WRITE_MERGED,
+	NR_BL_TYPES,	/* Must be last one! */
+};
+struct stripe_chunk {
+	atomic_t cnt;		/* Reference count. */
+	struct stripe *stripe;	/* Backpointer to stripe for endio(). */
+	/* Bio lists for reads, writes, and writes merged. */
+	struct bio_list bl[NR_BL_TYPES];
+	struct {
+		unsigned long flags; /* IO status flags. */
+	} io;
+};
+
+/* Define chunk bit operations. */
+BITOPS(Chunk, Dirty,	 stripe_chunk, CHUNK_DIRTY)
+BITOPS(Chunk, Error,	 stripe_chunk, CHUNK_ERROR)
+BITOPS(Chunk, Io,	 stripe_chunk, CHUNK_IO)
+BITOPS(Chunk, Locked,	 stripe_chunk, CHUNK_LOCKED)
+BITOPS(Chunk, MustIo,	 stripe_chunk, CHUNK_MUST_IO)
+BITOPS(Chunk, Unlock,	 stripe_chunk, CHUNK_UNLOCK)
+BITOPS(Chunk, Uptodate,	 stripe_chunk, CHUNK_UPTODATE)
+
+/*
+ * Stripe linked list indexes. Keep order, because the stripe
+ * and the stripe cache rely on the first 3!
+ */
+enum list_types {
+	LIST_FLUSH,	/* Stripes to flush for io. */
+	LIST_ENDIO,	/* Stripes to endio. */
+	LIST_LRU,	/* Least recently used stripes. */
+	SC_NR_LISTS,	/* # of lists in stripe cache. */
+	LIST_HASH = SC_NR_LISTS,	/* Hashed stripes. */
+	LIST_RECOVER = LIST_HASH, /* For recovery type stripes only. */
+	STRIPE_NR_LISTS,/* To size array in struct stripe. */
+};
+
+/* Adressing region recovery. */
+struct recover_addr {
+	struct dm_region *reg;	/* Actual region to recover. */
+	sector_t pos;	/* Position within region to recover. */
+	sector_t end;	/* End of region to recover. */
+};
+
+/* A stripe: the io object to handle all reads and writes to a RAID set. */
+struct stripe {
+	atomic_t cnt;			/* Reference count. */
+	struct stripe_cache *sc;	/* Backpointer to stripe cache. */
+
+	/*
+	 * 4 linked lists:
+	 *   o io list to flush io
+	 *   o endio list
+	 *   o LRU list to put stripes w/o reference count on
+	 *   o stripe cache hash
+	 */
+	struct list_head lists[STRIPE_NR_LISTS];
+
+	sector_t key;	 /* Hash key. */
+	region_t region; /* Region stripe is mapped to. */
+
+	struct {
+		unsigned long flags;	/* Stripe state flags (see below). */
+
+		/*
+		 * Pending ios in flight:
+		 *
+		 * used to control move of stripe to endio list
+		 */
+		atomic_t pending;
+
+		/* Sectors to read and write for multi page stripe sets. */
+		unsigned size;
+	} io;
+
+	/* Address region recovery. */
+	struct recover_addr *recover;
+
+	/* Lock on stripe (Future: for clustering). */
+	void *lock;
+
+	struct {
+		unsigned short parity;	/* Parity chunk index. */
+		short recover;		/* Recovery chunk index. */
+	} idx;
+
+	/*
+	 * This stripe's memory cache object (dm-mem-cache);
+	 * i.e. the io chunk pages.
+	 */
+	struct dm_mem_cache_object *obj;
+
+	/* Array of stripe sets (dynamically allocated). */
+	struct stripe_chunk chunk[0];
+};
+
+/* States stripes can be in (flags field). */
+enum stripe_states {
+	STRIPE_ERROR,		/* io error on stripe. */
+	STRIPE_MERGED,		/* Writes got merged to be written. */
+	STRIPE_RBW,		/* Read-before-write stripe. */
+	STRIPE_RECONSTRUCT,	/* Reconstruct of a missing chunk required. */
+	STRIPE_RECONSTRUCTED,	/* Reconstructed of a missing chunk. */
+	STRIPE_RECOVER,		/* Stripe used for RAID set recovery. */
+};
+
+/* Define stripe bit operations. */
+BITOPS(Stripe, Error,	      stripe, STRIPE_ERROR)
+BITOPS(Stripe, Merged,        stripe, STRIPE_MERGED)
+BITOPS(Stripe, RBW,	      stripe, STRIPE_RBW)
+BITOPS(Stripe, Reconstruct,   stripe, STRIPE_RECONSTRUCT)
+BITOPS(Stripe, Reconstructed, stripe, STRIPE_RECONSTRUCTED)
+BITOPS(Stripe, Recover,	      stripe, STRIPE_RECOVER)
+
+/* A stripe hash. */
+struct stripe_hash {
+	struct list_head *hash;
+	unsigned buckets;
+	unsigned mask;
+	unsigned prime;
+	unsigned shift;
+};
+
+enum sc_lock_types {
+	LOCK_ENDIO,	/* Protect endio list. */
+	LOCK_LRU,	/* Protect LRU list. */
+	NR_LOCKS,       /* To size array in struct stripe_cache. */
+};
+
+/* A stripe cache. */
+struct stripe_cache {
+	/* Stripe hash. */
+	struct stripe_hash hash;
+
+	spinlock_t locks[NR_LOCKS];	/* Locks to protect lists. */
+
+	/* Stripes with io to flush, stripes to endio and LRU lists. */
+	struct list_head lists[SC_NR_LISTS];
+
+	/* Slab cache to allocate stripes from. */
+	struct {
+		struct kmem_cache *cache;	/* Cache itself. */
+		char name[32];	/* Unique name. */
+	} kc;
+
+	struct dm_io_client *dm_io_client; /* dm-io client resource context. */
+
+	/* dm-mem-cache client resource context. */
+	struct dm_mem_cache_client *mem_cache_client;
+
+	int stripes_parm;	    /* # stripes parameter from constructor. */
+	atomic_t stripes;	    /* actual # of stripes in cache. */
+	atomic_t stripes_to_set;    /* # of stripes to resize cache to. */
+	atomic_t stripes_last;	    /* last # of stripes in cache. */
+	atomic_t active_stripes;    /* actual # of active stripes in cache. */
+
+	/* REMOVEME: */
+	atomic_t active_stripes_max; /* actual # of active stripes in cache. */
+};
+
+/* Flag specs for raid_dev */ ;
+enum raid_dev_flags {
+	DEV_FAILED,	/* Device failed. */
+	DEV_IO_QUEUED,	/* Io got queued to device. */
+};
+
+/* The raid device in a set. */
+struct raid_dev {
+	struct dm_dev *dev;
+	sector_t start;		/* Offset to map to. */
+	struct {	/* Using struct to be able to BITOPS(). */
+		unsigned long flags;	/* raid_dev_flags. */
+	} io;
+};
+
+BITOPS(Dev, Failed,   raid_dev, DEV_FAILED)
+BITOPS(Dev, IoQueued, raid_dev, DEV_IO_QUEUED)
+
+/* Flags spec for raid_set. */
+enum raid_set_flags {
+	RS_CHECK_OVERWRITE,	/* Check for chunk overwrites. */
+	RS_DEAD,		/* RAID set inoperational. */
+	RS_DEGRADED,		/* Io errors on RAID device. */
+	RS_DEVEL_STATS,		/* REMOVEME: display status information. */
+	RS_RECOVER,		/* Do recovery. */
+	RS_RECOVERY_BANDWIDTH,	/* Allow recovery bandwidth (delayed bios). */
+	RS_SC_BUSY,		/* Stripe cache busy -> send an event. */
+	RS_SUSPEND,		/* Suspend RAID set. */
+};
+
+/* REMOVEME: devel stats counters. */
+enum stats_types {
+	S_BIOS_READ,
+	S_BIOS_ADDED_READ,
+	S_BIOS_ENDIO_READ,
+	S_BIOS_WRITE,
+	S_BIOS_ADDED_WRITE,
+	S_BIOS_ENDIO_WRITE,
+	S_CAN_MERGE,
+	S_CANT_MERGE,
+	S_CONGESTED,
+	S_DM_IO_READ,
+	S_DM_IO_WRITE,
+	S_BANDWIDTH,
+	S_BARRIER,
+	S_BIO_COPY_PL_NEXT,
+	S_DEGRADED,
+	S_DELAYED_BIOS,
+	S_FLUSHS,
+	S_HITS_1ST,
+	S_IOS_POST,
+	S_INSCACHE,
+	S_MAX_LOOKUP,
+	S_CHUNK_LOCKED,
+	S_NO_BANDWIDTH,
+	S_NOT_CONGESTED,
+	S_NO_RW,
+	S_NOSYNC,
+	S_OVERWRITE,
+	S_PROHIBITCHUNKIO,
+	S_RECONSTRUCT_EI,
+	S_RECONSTRUCT_DEV,
+	S_RECONSTRUCT_SET,
+	S_RECONSTRUCTED,
+	S_REQUEUE,
+	S_STRIPE_ERROR,
+	S_SUM_DELAYED_BIOS,
+	S_XORS,
+	S_NR_STATS,	/* # of stats counters. Must be last! */
+};
+
+/* Status type -> string mappings. */
+struct stats_map {
+	const enum stats_types type;
+	const char *str;
+};
+
+static struct stats_map stats_map[] = {
+	{ S_BIOS_READ, "r=" },
+	{ S_BIOS_ADDED_READ, "/" },
+	{ S_BIOS_ENDIO_READ, "/" },
+	{ S_BIOS_WRITE, " w=" },
+	{ S_BIOS_ADDED_WRITE, "/" },
+	{ S_BIOS_ENDIO_WRITE, "/" },
+	{ S_DM_IO_READ, " rc=" },
+	{ S_DM_IO_WRITE, " wc=" },
+	{ S_BANDWIDTH, "\nbw=" },
+	{ S_NO_BANDWIDTH, " no_bw=" },
+	{ S_BARRIER, "\nbarrier=" },
+	{ S_BIO_COPY_PL_NEXT, "\nbio_cp_next=" },
+	{ S_CAN_MERGE, "\nmerge=" },
+	{ S_CANT_MERGE, "/no_merge=" },
+	{ S_CHUNK_LOCKED, "\nchunk_locked=" },
+	{ S_CONGESTED, "\ncgst=" },
+	{ S_NOT_CONGESTED, "/not_cgst=" },
+	{ S_DEGRADED, "\ndegraded=" },
+	{ S_DELAYED_BIOS, "\ndel_bios=" },
+	{ S_SUM_DELAYED_BIOS, "/sum_del_bios=" },
+	{ S_FLUSHS, "\nflushs=" },
+	{ S_HITS_1ST, "\nhits_1st=" },
+	{ S_IOS_POST, " ios_post=" },
+	{ S_INSCACHE, " inscache=" },
+	{ S_MAX_LOOKUP, " maxlookup=" },
+	{ S_NO_RW, "\nno_rw=" },
+	{ S_NOSYNC, " nosync=" },
+	{ S_OVERWRITE, " ovr=" },
+	{ S_PROHIBITCHUNKIO, " prhbt_io=" },
+	{ S_RECONSTRUCT_EI, "\nrec_ei=" },
+	{ S_RECONSTRUCT_DEV, " rec_dev=" },
+	{ S_RECONSTRUCT_SET, " rec_set=" },
+	{ S_RECONSTRUCTED, " rec=" },
+	{ S_REQUEUE, " requeue=" },
+	{ S_STRIPE_ERROR, " stripe_err=" },
+	{ S_XORS, " xors=" },
+};
+
+/*
+ * A RAID set.
+ */
+#define	dm_rh_client	dm_region_hash
+enum count_type { IO_WORK = 0, IO_RECOVER, IO_NR_COUNT };
+typedef void (*xor_function_t)(unsigned count, unsigned long **data);
+struct raid_set {
+	struct dm_target *ti;	/* Target pointer. */
+
+	struct {
+		unsigned long flags;	/* State flags. */
+		struct mutex in_lock;	/* Protects central input list below. */
+		struct bio_list in;	/* Pending ios (central input list). */
+		struct bio_list work;	/* ios work set. */
+		wait_queue_head_t suspendq;	/* suspend synchronization. */
+		atomic_t in_process;	/* counter of queued bios (suspendq). */
+		atomic_t in_process_max;/* counter of queued bios max. */
+
+		/* io work. */
+		struct workqueue_struct *wq;
+		struct delayed_work dws_do_raid;	/* For main worker. */
+		struct work_struct ws_do_table_event;	/* For event worker. */
+	} io;
+
+	/* Stripe locking abstraction. */
+	struct dm_raid45_locking_type *locking;
+
+	struct stripe_cache sc;	/* Stripe cache for this set. */
+
+	/* Xor optimization. */
+	struct {
+		struct xor_func *f;
+		unsigned chunks;
+		unsigned speed;
+	} xor;
+
+	/* Recovery parameters. */
+	struct recover {
+		struct dm_dirty_log *dl;	/* Dirty log. */
+		struct dm_rh_client *rh;	/* Region hash. */
+
+		struct dm_io_client *dm_io_client; /* recovery dm-io client. */
+		/* dm-mem-cache client resource context for recovery stripes. */
+		struct dm_mem_cache_client *mem_cache_client;
+
+		struct list_head stripes;	/* List of recovery stripes. */
+
+		region_t nr_regions;
+		region_t nr_regions_to_recover;
+		region_t nr_regions_recovered;
+		unsigned long start_jiffies;
+		unsigned long end_jiffies;
+
+		unsigned bandwidth;	 /* Recovery bandwidth [%]. */
+		unsigned bandwidth_work; /* Recovery bandwidth [factor]. */
+		unsigned bandwidth_parm; /*  " constructor parm. */
+		unsigned io_size;        /* recovery io size <= region size. */
+		unsigned io_size_parm;   /* recovery io size ctr parameter. */
+		unsigned recovery;	 /* Recovery allowed/prohibited. */
+		unsigned recovery_stripes; /* # of parallel recovery stripes. */
+
+		/* recovery io throttling. */
+		atomic_t io_count[IO_NR_COUNT];	/* counter recover/regular io.*/
+		unsigned long last_jiffies;
+	} recover;
+
+	/* RAID set parameters. */
+	struct {
+		struct raid_type *raid_type;	/* RAID type (eg, RAID4). */
+		unsigned raid_parms;	/* # variable raid parameters. */
+
+		unsigned chunk_size;	/* Sectors per chunk. */
+		unsigned chunk_size_parm;
+		unsigned chunk_shift;	/* rsector chunk size shift. */
+
+		unsigned io_size;	/* Sectors per io. */
+		unsigned io_size_parm;
+		unsigned io_mask;	/* Mask for bio_copy_page_list(). */
+		unsigned io_inv_mask;	/* Mask for raid_address(). */
+
+		sector_t sectors_per_dev;	/* Sectors per device. */
+
+		atomic_t failed_devs;		/* Amount of devices failed. */
+
+		/* Index of device to initialize. */
+		int dev_to_init;
+		int dev_to_init_parm;
+
+		/* Raid devices dynamically allocated. */
+		unsigned raid_devs;	/* # of RAID devices below. */
+		unsigned data_devs;	/* # of RAID data devices. */
+
+		int ei;		/* index of failed RAID device. */
+
+		/* Index of dedicated parity device (i.e. RAID4). */
+		int pi;
+		int pi_parm;	/* constructor parm for status output. */
+	} set;
+
+	/* REMOVEME: devel stats counters. */
+	atomic_t stats[S_NR_STATS];
+
+	/* Dynamically allocated temporary pointers for xor(). */
+	unsigned long **data;
+
+	/* Dynamically allocated RAID devices. Alignment? */
+	struct raid_dev dev[0];
+};
+
+/* Define RAID set bit operations. */
+BITOPS(RS, Bandwidth, raid_set, RS_RECOVERY_BANDWIDTH)
+BITOPS(RS, CheckOverwrite, raid_set, RS_CHECK_OVERWRITE)
+BITOPS(RS, Dead, raid_set, RS_DEAD)
+BITOPS(RS, Degraded, raid_set, RS_DEGRADED)
+BITOPS(RS, DevelStats, raid_set, RS_DEVEL_STATS)
+BITOPS(RS, Recover, raid_set, RS_RECOVER)
+BITOPS(RS, ScBusy, raid_set, RS_SC_BUSY)
+BITOPS(RS, Suspend, raid_set, RS_SUSPEND)
+#undef BITOPS
+
+/*-----------------------------------------------------------------
+ * Raid-4/5 set structures.
+ *---------------------------------------------------------------*/
+/* RAID level definitions. */
+enum raid_level {
+	raid4,
+	raid5,
+};
+
+/* Symmetric/Asymmetric, Left/Right parity rotating algorithms. */
+enum raid_algorithm {
+	none,
+	left_asym,
+	right_asym,
+	left_sym,
+	right_sym,
+};
+
+struct raid_type {
+	const char *name;		/* RAID algorithm. */
+	const char *descr;		/* Descriptor text for logging. */
+	const unsigned parity_devs;	/* # of parity devices. */
+	const unsigned minimal_devs;	/* minimal # of devices in set. */
+	const enum raid_level level;		/* RAID level. */
+	const enum raid_algorithm algorithm;	/* RAID algorithm. */
+};
+
+/* Supported raid types and properties. */
+static struct raid_type raid_types[] = {
+	{"raid4",    "RAID4 (dedicated parity disk)", 1, 3, raid4, none},
+	{"raid5_la", "RAID5 (left asymmetric)",       1, 3, raid5, left_asym},
+	{"raid5_ra", "RAID5 (right asymmetric)",      1, 3, raid5, right_asym},
+	{"raid5_ls", "RAID5 (left symmetric)",        1, 3, raid5, left_sym},
+	{"raid5_rs", "RAID5 (right symmetric)",       1, 3, raid5, right_sym},
+};
+
+/* Address as calculated by raid_address(). */
+struct raid_address {
+	sector_t key;		/* Hash key (address of stripe % chunk_size). */
+	unsigned di, pi;	/* Data and parity disks index. */
+};
+
+/* REMOVEME: reset statistics counters. */
+static void stats_reset(struct raid_set *rs)
+{
+	unsigned s = S_NR_STATS;
+
+	while (s--)
+		atomic_set(rs->stats + s, 0);
+}
+
+/*----------------------------------------------------------------
+ * RAID set management routines.
+ *--------------------------------------------------------------*/
+/*
+ * Begin small helper functions.
+ */
+/* No need to be called from region hash indirectly at dm_rh_dec(). */
+static void wake_dummy(void *context) {}
+
+/* Return # of io reference. */
+static int io_ref(struct raid_set *rs)
+{
+	return atomic_read(&rs->io.in_process);
+}
+
+/* Get an io reference. */
+static void io_get(struct raid_set *rs)
+{
+	int p = atomic_inc_return(&rs->io.in_process);
+
+	if (p > atomic_read(&rs->io.in_process_max))
+		atomic_set(&rs->io.in_process_max, p); /* REMOVEME: max. */
+}
+
+/* Put the io reference and conditionally wake io waiters. */
+static void io_put(struct raid_set *rs)
+{
+	/* Intel: rebuild data corrupter? */
+	if (atomic_dec_and_test(&rs->io.in_process))
+		wake_up(&rs->io.suspendq);
+	else
+		BUG_ON(io_ref(rs) < 0);
+}
+
+/* Wait until all io has been processed. */
+static void wait_ios(struct raid_set *rs)
+{
+	wait_event(rs->io.suspendq, !io_ref(rs));
+}
+
+/* Queue (optionally delayed) io work. */
+static void wake_do_raid_delayed(struct raid_set *rs, unsigned long delay)
+{
+	queue_delayed_work(rs->io.wq, &rs->io.dws_do_raid, delay);
+}
+
+/* Queue io work immediately (called from region hash too). */
+static void wake_do_raid(void *context)
+{
+	struct raid_set *rs = context;
+
+	queue_work(rs->io.wq, &rs->io.dws_do_raid.work);
+}
+
+/* Calculate device sector offset. */
+static sector_t _sector(struct raid_set *rs, struct bio *bio)
+{
+	sector_t sector = bio->bi_sector;
+
+	sector_div(sector, rs->set.data_devs);
+	return sector;
+}
+
+/* Return # of active stripes in stripe cache. */
+static int sc_active(struct stripe_cache *sc)
+{
+	return atomic_read(&sc->active_stripes);
+}
+
+/* Stripe cache busy indicator. */
+static int sc_busy(struct raid_set *rs)
+{
+	return sc_active(&rs->sc) >
+	       atomic_read(&rs->sc.stripes) - (STRIPES_MIN / 2);
+}
+
+/* Set chunks states. */
+enum chunk_dirty_type { CLEAN, DIRTY, ERROR };
+static void chunk_set(struct stripe_chunk *chunk, enum chunk_dirty_type type)
+{
+	switch (type) {
+	case CLEAN:
+		ClearChunkDirty(chunk);
+		break;
+	case DIRTY:
+		SetChunkDirty(chunk);
+		break;
+	case ERROR:
+		SetChunkError(chunk);
+		SetStripeError(chunk->stripe);
+		return;
+	default:
+		BUG();
+	}
+
+	SetChunkUptodate(chunk);
+	SetChunkIo(chunk);
+	ClearChunkError(chunk);
+}
+
+/* Return region state for a sector. */
+static int region_state(struct raid_set *rs, sector_t sector, 
+			enum dm_rh_region_states state)
+{
+	struct dm_rh_client *rh = rs->recover.rh;
+	region_t region = dm_rh_sector_to_region(rh, sector);
+
+	return !!(dm_rh_get_state(rh, region, 1) & state);
+}
+
+/*
+ * Return true in case a chunk should be read/written
+ *
+ * Conditions to read/write:
+ *	o chunk not uptodate
+ *	o chunk dirty
+ *
+ * Conditios to avoid io:
+ *	o io already ongoing on chunk
+ *	o io explitely prohibited
+ */
+static int chunk_io(struct stripe_chunk *chunk)
+{
+	/* 2nd run optimization (flag set below on first run). */
+	if (TestClearChunkMustIo(chunk))
+		return 1;
+
+	/* Avoid io if prohibited or a locked chunk. */
+	if (!ChunkIo(chunk) || ChunkLocked(chunk))
+		return 0;
+
+	if (!ChunkUptodate(chunk) || ChunkDirty(chunk)) {
+		SetChunkMustIo(chunk); /* 2nd run optimization. */
+		return 1;
+	}
+
+	return 0;
+}
+
+/* Call a function on each chunk needing io unless device failed. */
+static unsigned for_each_io_dev(struct stripe *stripe,
+			        void (*f_io)(struct stripe *stripe, unsigned p))
+{
+	struct raid_set *rs = RS(stripe->sc);
+	unsigned p, r = 0;
+
+	for (p = 0; p < rs->set.raid_devs; p++) {
+		if (chunk_io(CHUNK(stripe, p)) && !DevFailed(rs->dev + p)) {
+			f_io(stripe, p);
+			r++;
+		}
+	}
+
+	return r;
+}
+
+/*
+ * Index of device to calculate parity on.
+ *
+ * Either the parity device index *or* the selected
+ * device to init after a spare replacement.
+ */
+static int dev_for_parity(struct stripe *stripe, int *sync)
+{
+	struct raid_set *rs = RS(stripe->sc);
+	int r = region_state(rs, stripe->key, DM_RH_NOSYNC | DM_RH_RECOVERING);
+
+	*sync = !r;
+
+	/* Reconstruct a particular device ?. */
+	if (r && rs->set.dev_to_init > -1)
+		return rs->set.dev_to_init;
+	else if (rs->set.raid_type->level == raid4)
+		return rs->set.pi;
+	else if (!StripeRecover(stripe))
+		return stripe->idx.parity;
+	else
+		return -1;
+}
+
+/* RAID set congested function. */
+static int rs_congested(void *congested_data, int bdi_bits)
+{
+	int r;
+	unsigned p;
+	struct raid_set *rs = congested_data;
+
+	if (sc_busy(rs) || RSSuspend(rs))
+		r = 1;
+	else for (r = 0, p = rs->set.raid_devs; !r && p--; ) {
+		/* If any of our component devices are overloaded. */
+		struct request_queue *q = bdev_get_queue(rs->dev[p].dev->bdev);
+
+		r |= bdi_congested(&q->backing_dev_info, bdi_bits);
+	}
+
+	/* REMOVEME: statistics. */
+	atomic_inc(rs->stats + (r ? S_CONGESTED : S_NOT_CONGESTED));
+	return r;
+}
+
+/* RAID device degrade check. */
+static void rs_check_degrade_dev(struct raid_set *rs,
+				       struct stripe *stripe, unsigned p)
+{
+	if (TestSetDevFailed(rs->dev + p))
+		return;
+
+	/* Through an event in case of member device errors. */
+	if (atomic_inc_return(&rs->set.failed_devs) >
+	    rs->set.raid_type->parity_devs &&
+	    !TestSetRSDead(rs)) {
+		/* Display RAID set dead message once. */
+		unsigned p;
+		char buf[BDEVNAME_SIZE];
+
+		DMERR("FATAL: too many devices failed -> RAID set broken");
+		for (p = 0; p < rs->set.raid_devs; p++) {
+			if (DevFailed(rs->dev + p))
+				DMERR("device /dev/%s failed",
+				      bdevname(rs->dev[p].dev->bdev, buf));
+		}
+	}
+
+	/* Only log the first member error. */
+	if (!TestSetRSDegraded(rs)) {
+		char buf[BDEVNAME_SIZE];
+
+		/* Store index for recovery. */
+		rs->set.ei = p;
+		DMERR("CRITICAL: %sio error on device /dev/%s "
+		      "in region=%llu; DEGRADING RAID set\n",
+		      stripe ? "" : "FAKED ",
+		      bdevname(rs->dev[p].dev->bdev, buf),
+		      (unsigned long long) (stripe ? stripe->key : 0));
+		DMERR("further device error messages suppressed");
+	}
+
+	schedule_work(&rs->io.ws_do_table_event);
+}
+
+/* RAID set degrade check. */
+static void rs_check_degrade(struct stripe *stripe)
+{
+	struct raid_set *rs = RS(stripe->sc);
+	unsigned p = rs->set.raid_devs;
+
+	while (p--) {
+		if (ChunkError(CHUNK(stripe, p)))
+			rs_check_degrade_dev(rs, stripe, p);
+	}
+}
+
+/* Lookup a RAID device by name or by major:minor number. */
+static int raid_dev_lookup(struct raid_set *rs, struct raid_dev *dev_lookup)
+{
+	unsigned p;
+	struct raid_dev *dev;
+
+	/*
+	 * Must be an incremental loop, because the device array
+	 * can have empty slots still on calls from raid_ctr()
+	 */
+	for (dev = rs->dev, p = 0;
+	     dev->dev && p < rs->set.raid_devs;
+	     dev++, p++) {
+		if (dev_lookup->dev->bdev->bd_dev == dev->dev->bdev->bd_dev)
+			return p;
+	}
+
+	return -ENODEV;
+}
+/*
+ * End small helper functions.
+ */
+
+/*
+ * Stripe hash functions
+ */
+/* Initialize/destroy stripe hash. */
+static int hash_init(struct stripe_hash *hash, unsigned stripes)
+{
+	unsigned buckets = 2, max_buckets = stripes >> 1;
+	static unsigned hash_primes[] = {
+		/* Table of primes for hash_fn/table size optimization. */
+		1, 2, 3, 7, 13, 27, 53, 97, 193, 389, 769,
+		1543, 3079, 6151, 12289, 24593, 49157, 98317,
+	};
+
+	/* Calculate number of buckets (2^^n <= stripes / 2). */
+	while (buckets < max_buckets)
+		buckets <<= 1;
+
+	/* Allocate stripe hash buckets. */
+	hash->hash = vmalloc(buckets * sizeof(*hash->hash));
+	if (!hash->hash)
+		return -ENOMEM;
+
+	hash->buckets = buckets;
+	hash->mask = buckets - 1;
+	hash->shift = ffs(buckets);
+	if (hash->shift > ARRAY_SIZE(hash_primes))
+		hash->shift = ARRAY_SIZE(hash_primes) - 1;
+
+	BUG_ON(hash->shift < 2);
+	hash->prime = hash_primes[hash->shift];
+
+	/* Initialize buckets. */
+	while (buckets--)
+		INIT_LIST_HEAD(hash->hash + buckets);
+	return 0;
+}
+
+static void hash_exit(struct stripe_hash *hash)
+{
+	if (hash->hash) {
+		vfree(hash->hash);
+		hash->hash = NULL;
+	}
+}
+
+static unsigned hash_fn(struct stripe_hash *hash, sector_t key)
+{
+	return (unsigned) (((key * hash->prime) >> hash->shift) & hash->mask);
+}
+
+static struct list_head *hash_bucket(struct stripe_hash *hash, sector_t key)
+{
+	return hash->hash + hash_fn(hash, key);
+}
+
+/* Insert an entry into a hash. */
+static void stripe_insert(struct stripe_hash *hash, struct stripe *stripe)
+{
+	list_add(stripe->lists + LIST_HASH, hash_bucket(hash, stripe->key));
+}
+
+/* Lookup an entry in the stripe hash. */
+static struct stripe *stripe_lookup(struct stripe_cache *sc, sector_t key)
+{
+	unsigned look = 0;
+	struct stripe *stripe;
+	struct list_head *bucket = hash_bucket(&sc->hash, key);
+
+	list_for_each_entry(stripe, bucket, lists[LIST_HASH]) {
+		look++;
+
+		if (stripe->key == key) {
+			/* REMOVEME: statisics. */
+			if (look > atomic_read(RS(sc)->stats + S_MAX_LOOKUP))
+				atomic_set(RS(sc)->stats + S_MAX_LOOKUP, look);
+			return stripe;
+		}
+	}
+
+	return NULL;
+}
+
+/* Resize the stripe cache hash on size changes. */
+static int sc_hash_resize(struct stripe_cache *sc)
+{
+	/* Resize indicated ? */
+	if (atomic_read(&sc->stripes) != atomic_read(&sc->stripes_last)) {
+		int r;
+		struct stripe_hash hash;
+
+		r = hash_init(&hash, atomic_read(&sc->stripes));
+		if (r)
+			return r;
+
+		if (sc->hash.hash) {
+			unsigned b = sc->hash.buckets;
+			struct list_head *pos, *tmp;
+
+			/* Walk old buckets and insert into new. */
+			while (b--) {
+				list_for_each_safe(pos, tmp, sc->hash.hash + b)
+				    stripe_insert(&hash,
+						  list_entry(pos, struct stripe,
+							     lists[LIST_HASH]));
+			}
+
+		}
+
+		hash_exit(&sc->hash);
+		memcpy(&sc->hash, &hash, sizeof(sc->hash));
+		atomic_set(&sc->stripes_last, atomic_read(&sc->stripes));
+	}
+
+	return 0;
+}
+/* End hash stripe hash function. */
+
+/* List add, delete, push and pop functions. */
+/* Add stripe to flush list. */
+#define	DEL_LIST(lh) \
+	if (!list_empty(lh)) \
+		list_del_init(lh);
+
+/* Delete stripe from hash. */
+static void stripe_hash_del(struct stripe *stripe)
+{
+	DEL_LIST(stripe->lists + LIST_HASH);
+}
+
+/* Return stripe reference count. */
+static inline int stripe_ref(struct stripe *stripe)
+{
+	return atomic_read(&stripe->cnt);
+}
+
+static void stripe_flush_add(struct stripe *stripe)
+{
+	struct stripe_cache *sc = stripe->sc;
+	struct list_head *lh = stripe->lists + LIST_FLUSH;
+
+	if (!StripeReconstruct(stripe) && list_empty(lh))
+		list_add_tail(lh, sc->lists + LIST_FLUSH);
+}
+
+/*
+ * Add stripe to LRU (inactive) list.
+ *
+ * Need lock, because of concurrent access from message interface.
+ */
+static void stripe_lru_add(struct stripe *stripe)
+{
+	if (!StripeRecover(stripe)) {
+		unsigned long flags;
+		struct list_head *lh = stripe->lists + LIST_LRU;
+		spinlock_t *lock = stripe->sc->locks + LOCK_LRU;
+
+		spin_lock_irqsave(lock, flags);
+		if (list_empty(lh))
+			list_add_tail(lh, stripe->sc->lists + LIST_LRU);
+		spin_unlock_irqrestore(lock, flags);
+	}
+}
+
+#define POP_LIST(list) \
+	do { \
+		if (list_empty(sc->lists + (list))) \
+			stripe = NULL; \
+		else { \
+			stripe = list_first_entry(sc->lists + (list), \
+						  struct stripe, \
+						  lists[(list)]); \
+			list_del_init(stripe->lists + (list)); \
+		} \
+	} while (0);
+
+/* Pop an available stripe off the LRU list. */
+static struct stripe *stripe_lru_pop(struct stripe_cache *sc)
+{
+	struct stripe *stripe;
+	spinlock_t *lock = sc->locks + LOCK_LRU;
+
+	spin_lock_irq(lock);
+	POP_LIST(LIST_LRU);
+	spin_unlock_irq(lock);
+
+	return stripe;
+}
+
+/* Pop an available stripe off the io list. */
+static struct stripe *stripe_io_pop(struct stripe_cache *sc)
+{
+	struct stripe *stripe;
+
+	POP_LIST(LIST_FLUSH);
+	return stripe;
+}
+
+/* Push a stripe safely onto the endio list to be handled by do_endios(). */
+static void stripe_endio_push(struct stripe *stripe)
+{
+	unsigned long flags;
+	struct stripe_cache *sc = stripe->sc;
+	struct list_head *stripe_list = stripe->lists + LIST_ENDIO,
+			 *sc_list = sc->lists + LIST_ENDIO;
+	spinlock_t *lock = sc->locks + LOCK_ENDIO;
+
+	/* This runs in parallel with do_endios(). */
+	spin_lock_irqsave(lock, flags);
+	if (list_empty(stripe_list))
+		list_add_tail(stripe_list, sc_list);
+	spin_unlock_irqrestore(lock, flags);
+
+	wake_do_raid(RS(sc)); /* Wake myself. */
+}
+
+/* Pop a stripe off safely off the endio list. */
+static struct stripe *stripe_endio_pop(struct stripe_cache *sc)
+{
+	struct stripe *stripe;
+	spinlock_t *lock = sc->locks + LOCK_ENDIO;
+
+	/* This runs in parallel with endio(). */
+	spin_lock_irq(lock);
+	POP_LIST(LIST_ENDIO)
+	spin_unlock_irq(lock);
+	return stripe;
+}
+#undef POP_LIST
+
+/*
+ * Stripe cache locking functions
+ */
+/* Dummy lock function for single host RAID4+5. */
+static void *no_lock(sector_t key, enum dm_lock_type type)
+{
+	return &no_lock;
+}
+
+/* Dummy unlock function for single host RAID4+5. */
+static void no_unlock(void *lock_handle)
+{
+}
+
+/* No locking (for single host RAID 4+5). */
+static struct dm_raid45_locking_type locking_none = {
+	.lock = no_lock,
+	.unlock = no_unlock,
+};
+
+/* Lock a stripe (for clustering). */
+static int
+stripe_lock(struct stripe *stripe, int rw, sector_t key)
+{
+	stripe->lock = RS(stripe->sc)->locking->lock(key, rw == READ ? DM_RAID45_SHARED : DM_RAID45_EX);
+	return stripe->lock ? 0 : -EPERM;
+}
+
+/* Unlock a stripe (for clustering). */
+static void stripe_unlock(struct stripe *stripe)
+{
+	RS(stripe->sc)->locking->unlock(stripe->lock);
+	stripe->lock = NULL;
+}
+
+/* Test io pending on stripe. */
+static int stripe_io_ref(struct stripe *stripe)
+{
+	return atomic_read(&stripe->io.pending);
+}
+
+static void stripe_io_get(struct stripe *stripe)
+{
+	if (atomic_inc_return(&stripe->io.pending) == 1)
+		/* REMOVEME: statistics */
+		atomic_inc(&stripe->sc->active_stripes);
+	else
+		BUG_ON(stripe_io_ref(stripe) < 0);
+}
+
+static void stripe_io_put(struct stripe *stripe)
+{
+	if (atomic_dec_and_test(&stripe->io.pending)) {
+		if (unlikely(StripeRecover(stripe)))
+			/* Don't put recovery stripe on endio list. */
+			wake_do_raid(RS(stripe->sc));
+		else
+			/* Add regular stripe to endio list and wake daemon. */
+			stripe_endio_push(stripe);
+
+		/* REMOVEME: statistics */
+		atomic_dec(&stripe->sc->active_stripes);
+	} else
+		BUG_ON(stripe_io_ref(stripe) < 0);
+}
+
+/* Take stripe reference out. */
+static int stripe_get(struct stripe *stripe)
+{
+	int r;
+	struct list_head *lh = stripe->lists + LIST_LRU;
+	spinlock_t *lock = stripe->sc->locks + LOCK_LRU;
+
+	/* Delete stripe from LRU (inactive) list if on. */
+	spin_lock_irq(lock);
+	DEL_LIST(lh);
+	spin_unlock_irq(lock);
+
+	BUG_ON(stripe_ref(stripe) < 0);
+
+	/* Lock stripe on first reference */
+	r = (atomic_inc_return(&stripe->cnt) == 1) ?
+	    stripe_lock(stripe, WRITE, stripe->key) : 0;
+
+	return r;
+}
+#undef DEL_LIST
+
+/* Return references on a chunk. */
+static int chunk_ref(struct stripe_chunk *chunk)
+{
+	return atomic_read(&chunk->cnt);
+}
+
+/* Take out reference on a chunk. */
+static int chunk_get(struct stripe_chunk *chunk)
+{
+	return atomic_inc_return(&chunk->cnt);
+}
+
+/* Drop reference on a chunk. */
+static void chunk_put(struct stripe_chunk *chunk)
+{
+	BUG_ON(atomic_dec_return(&chunk->cnt) < 0);
+}
+
+/*
+ * Drop reference on a stripe.
+ *
+ * Move it to list of LRU stripes if zero.
+ */
+static void stripe_put(struct stripe *stripe)
+{
+	if (atomic_dec_and_test(&stripe->cnt)) {
+		BUG_ON(stripe_io_ref(stripe));
+		stripe_unlock(stripe);
+	} else
+		BUG_ON(stripe_ref(stripe) < 0);
+}
+
+/* Helper needed by for_each_io_dev(). */
+static void stripe_get_references(struct stripe *stripe, unsigned p)
+{
+
+	/*
+	 * Another one to reference the stripe in
+	 * order to protect vs. LRU list moves.
+	 */
+	io_get(RS(stripe->sc));	/* Global io references. */
+	stripe_get(stripe);
+	stripe_io_get(stripe);	/* One for each chunk io. */
+}
+
+/* Helper for endio() to put all take references. */
+static void stripe_put_references(struct stripe *stripe)
+{
+	stripe_io_put(stripe);	/* One for each chunk io. */
+	stripe_put(stripe);
+	io_put(RS(stripe->sc));
+}
+
+/*
+ * Stripe cache functions.
+ */
+/*
+ * Invalidate all chunks (i.e. their pages)  of a stripe.
+ *
+ * I only keep state for the whole chunk.
+ */
+static inline void stripe_chunk_invalidate(struct stripe_chunk *chunk)
+{
+	chunk->io.flags = 0;
+}
+
+static void
+stripe_chunks_invalidate(struct stripe *stripe)
+{
+	unsigned p = RS(stripe->sc)->set.raid_devs;
+
+	while (p--)
+		stripe_chunk_invalidate(CHUNK(stripe, p));
+}
+
+/* Prepare stripe for (re)use. */
+static void stripe_invalidate(struct stripe *stripe)
+{
+	stripe->io.flags = 0;
+	stripe->idx.parity = stripe->idx.recover = -1;
+	stripe_chunks_invalidate(stripe);
+}
+
+/*
+ * Allow io on all chunks of a stripe.
+ * If not set, IO will not occur; i.e. it's prohibited.
+ *
+ * Actual IO submission for allowed chunks depends
+ * on their !uptodate or dirty state.
+ */
+static void stripe_allow_io(struct stripe *stripe)
+{
+	unsigned p = RS(stripe->sc)->set.raid_devs;
+
+	while (p--)
+		SetChunkIo(CHUNK(stripe, p));
+}
+
+/* Initialize a stripe. */
+static void stripe_init(struct stripe_cache *sc, struct stripe *stripe)
+{
+	unsigned i, p = RS(sc)->set.raid_devs;
+
+	/* Work all io chunks. */
+	while (p--) {
+		struct stripe_chunk *chunk = CHUNK(stripe, p);
+
+		atomic_set(&chunk->cnt, 0);
+		chunk->stripe = stripe;
+		i = ARRAY_SIZE(chunk->bl);
+		while (i--)
+			bio_list_init(chunk->bl + i);
+	}
+
+	stripe->sc = sc;
+
+
+	i = ARRAY_SIZE(stripe->lists);
+	while (i--)
+		INIT_LIST_HEAD(stripe->lists + i);
+
+	stripe->io.size = RS(sc)->set.io_size;
+	atomic_set(&stripe->cnt, 0);
+	atomic_set(&stripe->io.pending, 0);
+	stripe_invalidate(stripe);
+}
+
+/* Number of pages per chunk. */
+static inline unsigned chunk_pages(unsigned sectors)
+{
+	return dm_div_up(sectors, SECTORS_PER_PAGE);
+}
+
+/* Number of pages per stripe. */
+static inline unsigned stripe_pages(struct raid_set *rs, unsigned io_size)
+{
+	return chunk_pages(io_size) * rs->set.raid_devs;
+}
+
+/* Initialize part of page_list (recovery). */
+static void stripe_zero_pl_part(struct stripe *stripe, int p,
+				unsigned start, unsigned count)
+{
+	unsigned o = start / SECTORS_PER_PAGE, pages = chunk_pages(count);
+	/* Get offset into the page_list. */
+	struct page_list *pl = pl_elem(PL(stripe, p), o);
+
+	BUG_ON(!pl);
+	while (pl && pages--) {
+		BUG_ON(!pl->page);
+		memset(page_address(pl->page), 0, PAGE_SIZE);
+		pl = pl->next;
+	}
+}
+
+/* Initialize parity chunk of stripe. */
+static void stripe_zero_chunk(struct stripe *stripe, int p)
+{
+	if (p > -1)
+		stripe_zero_pl_part(stripe, p, 0, stripe->io.size);
+}
+
+/* Return dynamic stripe structure size. */
+static size_t stripe_size(struct raid_set *rs)
+{
+	return sizeof(struct stripe) +
+		      rs->set.raid_devs * sizeof(struct stripe_chunk);
+}
+
+/* Allocate a stripe and its memory object. */
+/* XXX adjust to cope with stripe cache and recovery stripe caches. */
+enum grow { SC_GROW, SC_KEEP };
+static struct stripe *stripe_alloc(struct stripe_cache *sc,
+				   struct dm_mem_cache_client *mc,
+				   enum grow grow)
+{
+	int r;
+	struct stripe *stripe;
+
+	stripe = kmem_cache_zalloc(sc->kc.cache, GFP_KERNEL);
+	if (stripe) {
+		/* Grow the dm-mem-cache by one object. */
+		if (grow == SC_GROW) {
+			r = dm_mem_cache_grow(mc, 1);
+			if (r)
+				goto err_free;
+		}
+
+		stripe->obj = dm_mem_cache_alloc(mc);
+		if (!stripe->obj)
+			goto err_shrink;
+
+		stripe_init(sc, stripe);
+	}
+
+	return stripe;
+
+err_shrink:
+	if (grow == SC_GROW)
+		dm_mem_cache_shrink(mc, 1);
+err_free:
+	kmem_cache_free(sc->kc.cache, stripe);
+	return NULL;
+}
+
+/*
+ * Free a stripes memory object, shrink the
+ * memory cache and free the stripe itself.
+ */
+static void stripe_free(struct stripe *stripe, struct dm_mem_cache_client *mc)
+{
+	dm_mem_cache_free(mc, stripe->obj);
+	dm_mem_cache_shrink(mc, 1);
+	kmem_cache_free(stripe->sc->kc.cache, stripe);
+}
+
+/* Free the recovery stripe. */
+static void stripe_recover_free(struct raid_set *rs)
+{
+	struct recover *rec = &rs->recover;
+	struct dm_mem_cache_client *mc;
+
+	mc = rec->mem_cache_client;
+	rec->mem_cache_client = NULL;
+	if (mc) {
+		struct stripe *stripe;
+
+		while (!list_empty(&rec->stripes)) {
+			stripe = list_first_entry(&rec->stripes, struct stripe,
+						  lists[LIST_RECOVER]);
+			list_del(stripe->lists + LIST_RECOVER);
+			kfree(stripe->recover);
+			stripe_free(stripe, mc);
+		}
+	
+		dm_mem_cache_client_destroy(mc);
+		dm_io_client_destroy(rec->dm_io_client);
+		rec->dm_io_client = NULL;
+	}
+}
+
+/* Grow stripe cache. */
+static int sc_grow(struct stripe_cache *sc, unsigned stripes, enum grow grow)
+{
+	int r = 0;
+
+	/* Try to allocate this many (additional) stripes. */
+	while (stripes--) {
+		struct stripe *stripe =
+			stripe_alloc(sc, sc->mem_cache_client, grow);
+
+		if (likely(stripe)) {
+			stripe_lru_add(stripe);
+			atomic_inc(&sc->stripes);
+		} else {
+			r = -ENOMEM;
+			break;
+		}
+	}
+
+	return r ? r : sc_hash_resize(sc);
+}
+
+/* Shrink stripe cache. */
+static int sc_shrink(struct stripe_cache *sc, unsigned stripes)
+{
+	int r = 0;
+
+	/* Try to get unused stripe from LRU list. */
+	while (stripes--) {
+		struct stripe *stripe;
+
+		stripe = stripe_lru_pop(sc);
+		if (stripe) {
+			/* An LRU stripe may never have ios pending! */
+			BUG_ON(stripe_io_ref(stripe));
+			BUG_ON(stripe_ref(stripe));
+			atomic_dec(&sc->stripes);
+			/* Remove from hash if on before deletion. */
+			stripe_hash_del(stripe);
+			stripe_free(stripe, sc->mem_cache_client);
+		} else {
+			r = -ENOENT;
+			break;
+		}
+	}
+
+	/* Check if stats are still sane. */
+	if (atomic_read(&sc->active_stripes_max) >
+	    atomic_read(&sc->stripes))
+		atomic_set(&sc->active_stripes_max, 0);
+
+	if (r)
+		return r;
+
+	return atomic_read(&sc->stripes) ? sc_hash_resize(sc) : 0;
+}
+
+/* Create stripe cache and recovery. */
+static int sc_init(struct raid_set *rs, unsigned stripes)
+{
+	unsigned i, r, rstripes;
+	struct stripe_cache *sc = &rs->sc;
+	struct stripe *stripe;
+	struct recover *rec = &rs->recover;
+	struct mapped_device *md;
+	struct gendisk *disk;
+
+	/* Initialize lists and locks. */
+	i = ARRAY_SIZE(sc->lists);
+	while (i--)
+		INIT_LIST_HEAD(sc->lists + i);
+
+	INIT_LIST_HEAD(&rec->stripes);
+
+	/* Initialize endio and LRU list locks. */
+	i = NR_LOCKS;
+	while (i--)
+		spin_lock_init(sc->locks + i);
+
+	/* Initialize atomic variables. */
+	atomic_set(&sc->stripes, 0);
+	atomic_set(&sc->stripes_to_set, 0);
+	atomic_set(&sc->active_stripes, 0);
+	atomic_set(&sc->active_stripes_max, 0);	/* REMOVEME: statistics. */
+
+	/*
+	 * We need a runtime unique # to suffix the kmem cache name
+	 * because we'll have one for each active RAID set.
+	 */
+	md = dm_table_get_md(rs->ti->table);
+	disk = dm_disk(md);
+	sprintf(sc->kc.name, "%s-%d", TARGET, disk->first_minor);
+	dm_put(md);
+	sc->kc.cache = kmem_cache_create(sc->kc.name, stripe_size(rs),
+					 0, 0, NULL);
+	if (!sc->kc.cache)
+		return -ENOMEM;
+
+	/* Create memory cache client context for RAID stripe cache. */
+	sc->mem_cache_client =
+		dm_mem_cache_client_create(stripes, rs->set.raid_devs,
+					   chunk_pages(rs->set.io_size));
+	if (IS_ERR(sc->mem_cache_client))
+		return PTR_ERR(sc->mem_cache_client);
+
+	/* Create memory cache client context for RAID recovery stripe(s). */
+	rstripes = rec->recovery_stripes;
+	rec->mem_cache_client =
+		dm_mem_cache_client_create(rstripes, rs->set.raid_devs,
+					   chunk_pages(rec->io_size));
+	if (IS_ERR(rec->mem_cache_client))
+		return PTR_ERR(rec->mem_cache_client);
+
+	/* Create dm-io client context for IO stripes. */
+	sc->dm_io_client =
+		dm_io_client_create((stripes > 32 ? 32 : stripes) *
+				    rs->set.raid_devs *
+				    chunk_pages(rs->set.io_size));
+	if (IS_ERR(sc->dm_io_client))
+		return PTR_ERR(sc->dm_io_client);
+
+	/* FIXME: intermingeled with stripe cache initialization. */
+	/* Create dm-io client context for recovery stripes. */
+	rec->dm_io_client =
+		dm_io_client_create(rstripes * rs->set.raid_devs *
+				    chunk_pages(rec->io_size));
+	if (IS_ERR(rec->dm_io_client))
+		return PTR_ERR(rec->dm_io_client);
+
+	/* Allocate stripes for set recovery. */
+	while (rstripes--) {
+		stripe = stripe_alloc(sc, rec->mem_cache_client, SC_KEEP);
+		if (!stripe)
+			return -ENOMEM;
+
+		stripe->recover = kzalloc(sizeof(*stripe->recover), GFP_KERNEL);
+		if (!stripe->recover) {
+			stripe_free(stripe, rec->mem_cache_client);
+			return -ENOMEM;
+		}
+
+		SetStripeRecover(stripe);
+		stripe->io.size = rec->io_size;
+		list_add_tail(stripe->lists + LIST_RECOVER, &rec->stripes);
+		/* Don't add recovery stripes to LRU list! */
+	}
+
+	/*
+	 * Allocate the stripe objetcs from the
+	 * cache and add them to the LRU list.
+	 */
+	r = sc_grow(sc, stripes, SC_KEEP);
+	if (!r)
+		atomic_set(&sc->stripes_last, stripes);
+
+	return r;
+}
+
+/* Destroy the stripe cache. */
+static void sc_exit(struct stripe_cache *sc)
+{
+	struct raid_set *rs = RS(sc);
+
+	if (sc->kc.cache) {
+		stripe_recover_free(rs);
+		BUG_ON(sc_shrink(sc, atomic_read(&sc->stripes)));
+		kmem_cache_destroy(sc->kc.cache);
+		sc->kc.cache = NULL;
+
+		if (sc->mem_cache_client && !IS_ERR(sc->mem_cache_client))
+			dm_mem_cache_client_destroy(sc->mem_cache_client);
+
+		if (sc->dm_io_client && !IS_ERR(sc->dm_io_client))
+			dm_io_client_destroy(sc->dm_io_client);
+
+		hash_exit(&sc->hash);
+	}
+}
+
+/*
+ * Calculate RAID address
+ *
+ * Delivers tuple with the index of the data disk holding the chunk
+ * in the set, the parity disks index and the start of the stripe
+ * within the address space of the set (used as the stripe cache hash key).
+ */
+/* thx MD. */
+static struct raid_address *raid_address(struct raid_set *rs, sector_t sector,
+					 struct raid_address *addr)
+{
+	sector_t stripe, tmp;
+
+	/*
+	 * chunk_number = sector / chunk_size
+	 * stripe_number = chunk_number / data_devs
+	 * di = stripe % data_devs;
+	 */
+	stripe = sector >> rs->set.chunk_shift;
+	addr->di = sector_div(stripe, rs->set.data_devs);
+
+	switch (rs->set.raid_type->level) {
+	case raid4:
+		addr->pi = rs->set.pi;
+		goto check_shift_di;
+	case raid5:
+		tmp = stripe;
+		addr->pi = sector_div(tmp, rs->set.raid_devs);
+
+		switch (rs->set.raid_type->algorithm) {
+		case left_asym:		/* Left asymmetric. */
+			addr->pi = rs->set.data_devs - addr->pi;
+		case right_asym:	/* Right asymmetric. */
+check_shift_di:
+			if (addr->di >= addr->pi)
+				addr->di++;
+			break;
+		case left_sym:		/* Left symmetric. */
+			addr->pi = rs->set.data_devs - addr->pi;
+		case right_sym:		/* Right symmetric. */
+			addr->di = (addr->pi + addr->di + 1) %
+				   rs->set.raid_devs;
+			break;
+		case none: /* Ain't happen: RAID4 algorithm placeholder. */
+			BUG();
+		}
+	}
+
+	/*
+	 * Start offset of the stripes chunk on any single device of the RAID
+	 * set, adjusted in case io size differs from chunk size.
+	 */
+	addr->key = (stripe << rs->set.chunk_shift) +
+		    (sector & rs->set.io_inv_mask);
+	return addr;
+}
+
+/*
+ * Copy data across between stripe pages and bio vectors.
+ *
+ * Pay attention to data alignment in stripe and bio pages.
+ */
+static void bio_copy_page_list(int rw, struct stripe *stripe,
+			       struct page_list *pl, struct bio *bio)
+{
+	unsigned i, page_offset;
+	void *page_addr;
+	struct raid_set *rs = RS(stripe->sc);
+	struct bio_vec *bv;
+
+	/* Get start page in page list for this sector. */
+	i = (bio->bi_sector & rs->set.io_mask) / SECTORS_PER_PAGE;
+	pl = pl_elem(pl, i);
+	BUG_ON(!pl);
+	BUG_ON(!pl->page);
+
+	page_addr = page_address(pl->page);
+	page_offset = to_bytes(bio->bi_sector & (SECTORS_PER_PAGE - 1));
+
+	/* Walk all segments and copy data across between bio_vecs and pages. */
+	bio_for_each_segment(bv, bio, i) {
+		int len = bv->bv_len, size;
+		unsigned bio_offset = 0;
+		void *bio_addr = __bio_kmap_atomic(bio, i, KM_USER0);
+redo:
+		size = (page_offset + len > PAGE_SIZE) ?
+		       PAGE_SIZE - page_offset : len;
+
+		if (rw == READ)
+			memcpy(bio_addr + bio_offset,
+			       page_addr + page_offset, size);
+		else
+			memcpy(page_addr + page_offset,
+			       bio_addr + bio_offset, size);
+
+		page_offset += size;
+		if (page_offset == PAGE_SIZE) {
+			/*
+			 * We reached the end of the chunk page ->
+			 * need to refer to the next one to copy more data.
+			 */
+			len -= size;
+			if (len) {
+				/* Get next page. */
+				pl = pl->next;
+				BUG_ON(!pl);
+				BUG_ON(!pl->page);
+				page_addr = page_address(pl->page);
+				page_offset = 0;
+				bio_offset += size;
+				/* REMOVEME: statistics. */
+				atomic_inc(rs->stats + S_BIO_COPY_PL_NEXT);
+				goto redo;
+			}
+		}
+
+		__bio_kunmap_atomic(bio_addr, KM_USER0);
+	}
+}
+
+/*
+ * Xor optimization macros.
+ */
+/* Xor data pointer declaration and initialization macros. */
+#define DECLARE_2	unsigned long *d0 = data[0], *d1 = data[1]
+#define DECLARE_3	DECLARE_2, *d2 = data[2]
+#define DECLARE_4	DECLARE_3, *d3 = data[3]
+#define DECLARE_5	DECLARE_4, *d4 = data[4]
+#define DECLARE_6	DECLARE_5, *d5 = data[5]
+#define DECLARE_7	DECLARE_6, *d6 = data[6]
+#define DECLARE_8	DECLARE_7, *d7 = data[7]
+
+/* Xor unrole macros. */
+#define D2(n)	d0[n] = d0[n] ^ d1[n]
+#define D3(n)	D2(n) ^ d2[n]
+#define D4(n)	D3(n) ^ d3[n]
+#define D5(n)	D4(n) ^ d4[n]
+#define D6(n)	D5(n) ^ d5[n]
+#define D7(n)	D6(n) ^ d6[n]
+#define D8(n)	D7(n) ^ d7[n]
+
+#define	X_2(macro, offset)	macro(offset); macro(offset + 1);
+#define	X_4(macro, offset)	X_2(macro, offset); X_2(macro, offset + 2);
+#define	X_8(macro, offset)	X_4(macro, offset); X_4(macro, offset + 4);
+#define	X_16(macro, offset)	X_8(macro, offset); X_8(macro, offset + 8);
+#define	X_32(macro, offset)	X_16(macro, offset); X_16(macro, offset + 16);
+#define	X_64(macro, offset)	X_32(macro, offset); X_32(macro, offset + 32);
+
+/* Define a _xor_#chunks_#xors_per_run() function. */
+#define	_XOR(chunks, xors_per_run) \
+static void _xor ## chunks ## _ ## xors_per_run(unsigned long **data) \
+{ \
+	unsigned end = XOR_SIZE / sizeof(data[0]), i; \
+	DECLARE_ ## chunks; \
+\
+	for (i = 0; i < end; i += xors_per_run) { \
+		X_ ## xors_per_run(D ## chunks, i); \
+	} \
+}
+
+/* Define xor functions for 2 - 8 chunks and xors per run. */
+#define	MAKE_XOR_PER_RUN(xors_per_run) \
+	_XOR(2, xors_per_run); _XOR(3, xors_per_run); \
+	_XOR(4, xors_per_run); _XOR(5, xors_per_run); \
+	_XOR(6, xors_per_run); _XOR(7, xors_per_run); \
+	_XOR(8, xors_per_run);
+
+MAKE_XOR_PER_RUN(8)	/* Define _xor_*_8() functions. */
+MAKE_XOR_PER_RUN(16)	/* Define _xor_*_16() functions. */
+MAKE_XOR_PER_RUN(32)	/* Define _xor_*_32() functions. */
+MAKE_XOR_PER_RUN(64)	/* Define _xor_*_64() functions. */
+
+#define MAKE_XOR(xors_per_run) \
+struct { \
+	void (*f)(unsigned long **); \
+} static xor_funcs ## xors_per_run[] = { \
+	{ NULL }, /* NULL pointers to optimize indexing in xor(). */ \
+	{ NULL }, \
+	{ _xor2_ ## xors_per_run }, \
+	{ _xor3_ ## xors_per_run }, \
+	{ _xor4_ ## xors_per_run }, \
+	{ _xor5_ ## xors_per_run }, \
+	{ _xor6_ ## xors_per_run }, \
+	{ _xor7_ ## xors_per_run }, \
+	{ _xor8_ ## xors_per_run }, \
+}; \
+\
+static void xor_ ## xors_per_run(unsigned n, unsigned long **data) \
+{ \
+	/* Call respective function for amount of chunks. */ \
+	xor_funcs ## xors_per_run[n].f(data); \
+}
+
+/* Define xor_8() - xor_64 functions. */
+MAKE_XOR(8)
+MAKE_XOR(16)
+MAKE_XOR(32)
+MAKE_XOR(64)
+
+/* Maximum number of chunks, which can be xor'ed in one go. */
+#define	XOR_CHUNKS_MAX	(ARRAY_SIZE(xor_funcs8) - 1)
+
+static void xor_blocks_wrapper(unsigned n, unsigned long **data)
+{
+	BUG_ON(n < 2 || n > MAX_XOR_BLOCKS + 1);
+	xor_blocks(n - 1, XOR_SIZE, (void *) data[0], (void **) data + 1);
+}
+
+struct xor_func {
+	xor_function_t f;
+	const char *name;
+} static xor_funcs[] = {
+	{ xor_8,   "xor_8"  },
+	{ xor_16,  "xor_16" },
+	{ xor_32,  "xor_32" },
+	{ xor_64,  "xor_64" },
+	{ xor_blocks_wrapper, "xor_blocks" },
+};
+
+/*
+ * Check, if chunk has to be xored in/out:
+ *
+ * o if writes are queued
+ * o if writes are merged
+ * o if stripe is to be reconstructed
+ * o if recovery stripe
+ */
+static inline int chunk_must_xor(struct stripe_chunk *chunk)
+{
+	if (ChunkUptodate(chunk)) {
+		BUG_ON(!bio_list_empty(BL_CHUNK(chunk, WRITE_QUEUED)) &&
+		       !bio_list_empty(BL_CHUNK(chunk, WRITE_MERGED)));
+
+		if (!bio_list_empty(BL_CHUNK(chunk, WRITE_QUEUED)) ||
+		    !bio_list_empty(BL_CHUNK(chunk, WRITE_MERGED)))
+			return 1;
+
+		if (StripeReconstruct(chunk->stripe) ||
+		    StripeRecover(chunk->stripe))
+			return 1;
+	}
+
+	return 0;
+}
+
+/*
+ * Calculate crc.
+ *
+ * This indexes into the chunks of a stripe and their pages.
+ *
+ * All chunks will be xored into the indexed (@pi)
+ * chunk in maximum groups of xor.chunks.
+ *
+ */
+static void xor(struct stripe *stripe, unsigned pi, unsigned sector)
+{
+	struct raid_set *rs = RS(stripe->sc);
+	unsigned max_chunks = rs->xor.chunks, n = 1,
+		 o = sector / SECTORS_PER_PAGE, /* Offset into the page_list. */
+		 p = rs->set.raid_devs;
+	unsigned long **d = rs->data;
+	xor_function_t xor_f = rs->xor.f->f;
+
+	BUG_ON(sector > stripe->io.size);
+
+	/* Address of parity page to xor into. */
+	d[0] = page_address(pl_elem(PL(stripe, pi), o)->page);
+
+	while (p--) {
+		/* Preset pointers to data pages. */
+		if (p != pi && chunk_must_xor(CHUNK(stripe, p)))
+			d[n++] = page_address(pl_elem(PL(stripe, p), o)->page);
+
+		/* If max chunks -> xor. */
+		if (n == max_chunks) {
+			xor_f(n, d);
+			n = 1;
+		}
+	}
+
+	/* If chunks -> xor. */
+	if (n > 1)
+		xor_f(n, d);
+}
+
+/* Common xor loop through all stripe page lists. */
+static void common_xor(struct stripe *stripe, sector_t count,
+		       unsigned off, unsigned pi)
+{
+	unsigned sector;
+
+	BUG_ON(!count);
+	for (sector = off; sector < count; sector += SECTORS_PER_PAGE)
+		xor(stripe, pi, sector);
+
+	/* Set parity page uptodate and clean. */
+	chunk_set(CHUNK(stripe, pi), CLEAN);
+	atomic_inc(RS(stripe->sc)->stats + S_XORS); /* REMOVEME: statistics. */
+}
+
+/*
+ * Calculate parity sectors on intact stripes.
+ *
+ * Need to calculate raid address for recover stripe, because its
+ * chunk sizes differs and is typically larger than io chunk size.
+ */
+static void parity_xor(struct stripe *stripe)
+{
+	struct raid_set *rs = RS(stripe->sc);
+	unsigned chunk_size = rs->set.chunk_size, io_size = stripe->io.size,
+		 xor_size = chunk_size > io_size ? io_size : chunk_size;
+	sector_t off;
+
+	/* This can be the recover stripe with a larger io size. */
+	for (off = 0; off < io_size; off += xor_size) {
+		/*
+		 * Recover stripe is likely bigger than regular io
+		 * ones and has no precalculated parity disk index ->
+		 * need to calculate RAID address.
+		 */
+		if (unlikely(StripeRecover(stripe))) {
+			struct raid_address addr;
+
+			raid_address(rs,
+				     (stripe->key + off) * rs->set.data_devs,
+				     &addr);
+			stripe->idx.parity = addr.pi;
+			stripe_zero_pl_part(stripe, addr.pi, off, xor_size);
+		}
+
+		common_xor(stripe, xor_size, off, stripe->idx.parity);
+		chunk_set(CHUNK(stripe, stripe->idx.parity), DIRTY);
+	}
+}
+
+/* Reconstruct missing chunk. */
+static void stripe_reconstruct(struct stripe *stripe)
+{
+	struct raid_set *rs = RS(stripe->sc);
+	int p = rs->set.raid_devs, pr = stripe->idx.recover;
+
+	BUG_ON(pr < 0);
+
+	/* Check if all but the chunk to be reconstructed are uptodate. */
+	while (p--)
+		BUG_ON(p != pr && !ChunkUptodate(CHUNK(stripe, p)));
+
+	/* REMOVEME: statistics. */
+	atomic_inc(rs->stats + (RSDegraded(rs) ? S_RECONSTRUCT_EI :
+						 S_RECONSTRUCT_DEV));
+	/* Zero chunk to be reconstructed. */
+	stripe_zero_chunk(stripe, pr);
+	common_xor(stripe, stripe->io.size, 0, pr);
+	stripe->idx.recover = -1;
+}
+
+/*
+ * Recovery io throttling
+ */
+/* Conditionally reset io counters. */
+static int recover_io_reset(struct raid_set *rs)
+{
+	unsigned long j = jiffies;
+
+	/* Pay attention to jiffies overflows. */
+	if (j > rs->recover.last_jiffies + HZ / 20 ||
+	    j < rs->recover.last_jiffies) {
+		atomic_set(rs->recover.io_count + IO_WORK, 0);
+		atomic_set(rs->recover.io_count + IO_RECOVER, 0);
+		rs->recover.last_jiffies = j;
+		return 1;
+	}
+
+	return 0;
+}
+
+/* Count ios. */
+static void recover_io_count(struct stripe *stripe)
+{
+	struct raid_set *rs = RS(stripe->sc);
+
+	recover_io_reset(rs);
+	atomic_inc(rs->recover.io_count +
+		   (StripeRecover(stripe) ? IO_RECOVER : IO_WORK));
+}
+
+/* Try getting a stripe either from the hash or from the LRU list. */
+static struct stripe *stripe_find(struct raid_set *rs,
+				  struct raid_address *addr)
+{
+	int r;
+	struct stripe_cache *sc = &rs->sc;
+	struct stripe *stripe;
+
+	/* Try stripe from hash. */
+	stripe = stripe_lookup(sc, addr->key);
+	if (stripe) {
+		r = stripe_get(stripe);
+		if (r)
+			goto get_lock_failed;
+
+		atomic_inc(rs->stats + S_HITS_1ST); /* REMOVEME: statistics. */
+	} else {
+		/* Not in hash -> try to get an LRU stripe. */
+		stripe = stripe_lru_pop(sc);
+		if (stripe) {
+			/*
+			 * An LRU stripe may not be referenced
+			 * and may never have ios pending!
+			 */
+			BUG_ON(stripe_ref(stripe));
+			BUG_ON(stripe_io_ref(stripe));
+
+			/* Remove from hash if on before reuse. */
+			stripe_hash_del(stripe);
+
+			/* Invalidate before reinserting with changed key. */
+			stripe_invalidate(stripe);
+
+			stripe->key = addr->key;
+			stripe->region = dm_rh_sector_to_region(rs->recover.rh,
+								addr->key);
+			stripe->idx.parity = addr->pi;
+			r = stripe_get(stripe);
+			if (r)
+				goto get_lock_failed;
+
+			/* Insert stripe into the stripe hash. */
+			stripe_insert(&sc->hash, stripe);
+			/* REMOVEME: statistics. */
+			atomic_inc(rs->stats + S_INSCACHE);
+		}
+	}
+
+	return stripe;
+
+get_lock_failed:
+	stripe_put(stripe);
+	return NULL;
+}
+
+/*
+ * Process end io
+ *
+ * I need to do it here because I can't in interrupt
+ */
+/* End io all bios on a bio list. */
+static void bio_list_endio(struct stripe *stripe, struct bio_list *bl,
+			   int p, int error)
+{
+	struct raid_set *rs = RS(stripe->sc);
+	struct bio *bio;
+	struct page_list *pl = PL(stripe, p);
+	struct stripe_chunk *chunk = CHUNK(stripe, p);
+
+	/* Update region counters. */
+	while ((bio = bio_list_pop(bl))) {
+		if (bio_data_dir(bio) == WRITE)
+			/* Drop io pending count for any writes. */
+			dm_rh_dec(rs->recover.rh, stripe->region);
+		else if (!error)
+			/* Copy data accross. */
+			bio_copy_page_list(READ, stripe, pl, bio);
+
+		bio_endio(bio, error);
+
+		/* REMOVEME: statistics. */
+		atomic_inc(rs->stats + (bio_data_dir(bio) == READ ?
+			   S_BIOS_ENDIO_READ : S_BIOS_ENDIO_WRITE));
+
+		chunk_put(chunk);
+		stripe_put(stripe);
+		io_put(rs);	/* Wake any suspend waiters on last bio. */
+	}
+}
+
+/*
+ * End io all reads/writes on a stripe copying
+ * read data accross from stripe to bios and
+ * decrementing region counters for writes.
+ *
+ * Processing of ios depeding on state:
+ * o no chunk error -> endio ok
+ * o degraded:
+ *   - chunk error and read -> ignore to be requeued
+ *   - chunk error and write -> endio ok
+ * o dead (more than parity_devs failed) and chunk_error-> endio failed
+ */
+static void stripe_endio(int rw, struct stripe *stripe)
+{
+	struct raid_set *rs = RS(stripe->sc);
+	unsigned p = rs->set.raid_devs;
+	int write = (rw != READ);
+
+	while (p--) {
+		struct stripe_chunk *chunk = CHUNK(stripe, p);
+		struct bio_list *bl;
+
+		BUG_ON(ChunkLocked(chunk));
+
+		bl = BL_CHUNK(chunk, rw);
+		if (bio_list_empty(bl))
+			continue;
+
+		if (unlikely(ChunkError(chunk) || !ChunkUptodate(chunk))) {
+			/* RAID set dead. */
+			if (unlikely(RSDead(rs)))
+				bio_list_endio(stripe, bl, p, -EIO);
+			/* RAID set degraded. */
+			else if (write)
+				bio_list_endio(stripe, bl, p, 0);
+		} else {
+			BUG_ON(!RSDegraded(rs) && ChunkDirty(chunk));
+			bio_list_endio(stripe, bl, p, 0);
+		}
+	}
+}
+
+/* Fail all ios hanging off all bio lists of a stripe. */
+static void stripe_fail_io(struct stripe *stripe)
+{
+	struct raid_set *rs = RS(stripe->sc);
+	unsigned p = rs->set.raid_devs;
+
+	while (p--) {
+		struct stripe_chunk *chunk = CHUNK(stripe, p);
+		int i = ARRAY_SIZE(chunk->bl);
+
+		/* Fail all bios on all bio lists of the stripe. */
+		while (i--) {
+			struct bio_list *bl = chunk->bl + i;
+
+			if (!bio_list_empty(bl))
+				bio_list_endio(stripe, bl, p, -EIO);
+		}
+	}
+
+	/* Put stripe on LRU list. */
+	BUG_ON(stripe_io_ref(stripe));
+	BUG_ON(stripe_ref(stripe));
+}
+
+/* Unlock all required chunks. */
+static void stripe_chunks_unlock(struct stripe *stripe)
+{
+	unsigned p = RS(stripe->sc)->set.raid_devs;
+	struct stripe_chunk *chunk;
+
+	while (p--) {
+		chunk = CHUNK(stripe, p);
+
+		if (TestClearChunkUnlock(chunk))
+			ClearChunkLocked(chunk);
+	}
+}
+
+/*
+ * Queue reads and writes to a stripe by hanging
+ * their bios off the stripesets read/write lists.
+ */
+static int stripe_queue_bio(struct raid_set *rs, struct bio *bio,
+			    struct bio_list *reject)
+{
+	struct raid_address addr;
+	struct stripe *stripe;
+
+	stripe = stripe_find(rs, raid_address(rs, bio->bi_sector, &addr));
+	if (stripe) {
+		int r = 0, rw = bio_data_dir(bio);
+
+		/* Distinguish reads and writes. */
+		bio_list_add(BL(stripe, addr.di, rw), bio);
+	
+		if (rw == READ)
+			/* REMOVEME: statistics. */
+			atomic_inc(rs->stats + S_BIOS_ADDED_READ);
+		else {
+			/* Inrement pending write count on region. */
+			dm_rh_inc(rs->recover.rh, stripe->region);
+			r = 1;
+
+			/* REMOVEME: statistics. */
+			atomic_inc(rs->stats + S_BIOS_ADDED_WRITE);
+		}
+
+		/*
+		 * Put on io (flush) list in case of
+		 * initial bio queued to chunk.
+		 */
+		if (chunk_get(CHUNK(stripe, addr.di)) == 1)
+			stripe_flush_add(stripe);
+
+		return r;
+	}
+
+	/* Got no stripe from cache or failed to lock it -> reject bio. */
+	bio_list_add(reject, bio);
+	atomic_inc(rs->stats + S_IOS_POST); /* REMOVEME: statistics. */
+	return 0;
+}
+
+/*
+ * Handle all stripes by handing them to the daemon, because we can't
+ * map their chunk pages to copy the data in interrupt context.
+ *
+ * We don't want to handle them here either, while interrupts are disabled.
+ */
+
+/* Read/write endio function for dm-io (interrupt context). */
+static void endio(unsigned long error, void *context)
+{
+	struct stripe_chunk *chunk = context;
+
+	if (unlikely(error)) {
+		chunk_set(chunk, ERROR);
+		/* REMOVEME: statistics. */
+		atomic_inc(RS(chunk->stripe->sc)->stats + S_STRIPE_ERROR);
+	} else
+		chunk_set(chunk, CLEAN);
+
+	/*
+	 * For recovery stripes, I need to reset locked locked
+	 * here, because those aren't processed in do_endios().
+	 */
+	if (unlikely(StripeRecover(chunk->stripe)))
+		ClearChunkLocked(chunk);
+	else
+		SetChunkUnlock(chunk);
+
+	/* Indirectly puts stripe on cache's endio list via stripe_io_put(). */
+	stripe_put_references(chunk->stripe);
+}
+
+/* Read/Write a chunk asynchronously. */
+static void stripe_chunk_rw(struct stripe *stripe, unsigned p)
+{
+	struct stripe_cache *sc = stripe->sc;
+	struct raid_set *rs = RS(sc);
+	struct dm_mem_cache_object *obj = stripe->obj + p;
+	struct page_list *pl = obj->pl;
+	struct stripe_chunk *chunk = CHUNK(stripe, p);
+	struct raid_dev *dev = rs->dev + p;
+	struct dm_io_region io = {
+		.bdev = dev->dev->bdev,
+		.sector = stripe->key,
+		.count = stripe->io.size,
+	};
+	struct dm_io_request control = {
+		.bi_rw = ChunkDirty(chunk) ? WRITE : READ,
+		.mem = {
+			.type = DM_IO_PAGE_LIST,
+			.ptr.pl = pl,
+			.offset = 0,
+		},
+		.notify = {
+			.fn = endio,
+			.context = chunk,
+		},
+		.client = StripeRecover(stripe) ? rs->recover.dm_io_client :
+						  sc->dm_io_client,
+	};
+
+	BUG_ON(ChunkLocked(chunk));
+	BUG_ON(!ChunkUptodate(chunk) && ChunkDirty(chunk));
+	BUG_ON(ChunkUptodate(chunk) && !ChunkDirty(chunk));
+
+	/*
+	 * Don't rw past end of device, which can happen, because
+	 * typically sectors_per_dev isn't divisible by io_size.
+	 */
+	if (unlikely(io.sector + io.count > rs->set.sectors_per_dev))
+		io.count = rs->set.sectors_per_dev - io.sector;
+
+	BUG_ON(!io.count);
+	io.sector += dev->start;	/* Add <offset>. */
+	if (RSRecover(rs))
+		recover_io_count(stripe);	/* Recovery io accounting. */
+
+	/* REMOVEME: statistics. */
+	atomic_inc(rs->stats + (ChunkDirty(chunk) ? S_DM_IO_WRITE :
+						    S_DM_IO_READ));
+	SetChunkLocked(chunk);
+	SetDevIoQueued(dev);
+	BUG_ON(dm_io(&control, 1, &io, NULL));
+}
+
+/*
+ * Write dirty or read not uptodate page lists of a stripe.
+ */
+static int stripe_chunks_rw(struct stripe *stripe)
+{
+	int r;
+	struct raid_set *rs = RS(stripe->sc);
+
+	/*
+	 * Increment the pending count on the stripe
+	 * first, so that we don't race in endio().
+	 *
+	 * An inc (IO) is needed for any chunk unless !ChunkIo(chunk):
+	 *
+	 * o not uptodate
+	 * o dirtied by writes merged
+	 * o dirtied by parity calculations
+	 */
+	r = for_each_io_dev(stripe, stripe_get_references);
+	if (r) {
+		/* Io needed: chunks are either not uptodate or dirty. */
+		int max;	/* REMOVEME: */
+		struct stripe_cache *sc = &rs->sc;
+
+		/* Submit actual io. */
+		for_each_io_dev(stripe, stripe_chunk_rw);
+
+		/* REMOVEME: statistics */
+		max = sc_active(sc);
+		if (atomic_read(&sc->active_stripes_max) < max)
+			atomic_set(&sc->active_stripes_max, max);
+
+		atomic_inc(rs->stats + S_FLUSHS);
+		/* END REMOVEME: statistics */
+	}
+
+	return r;
+}
+
+/* Merge in all writes hence dirtying respective chunks. */
+static void stripe_merge_writes(struct stripe *stripe)
+{
+	unsigned p = RS(stripe->sc)->set.raid_devs;
+
+	while (p--) {
+		struct stripe_chunk *chunk = CHUNK(stripe, p);
+		struct bio_list *write = BL_CHUNK(chunk, WRITE_QUEUED);
+	
+		if (!bio_list_empty(write)) {
+			struct bio *bio;
+			struct page_list *pl = stripe->obj[p].pl;
+
+			/*
+			 * We can play with the lists without holding a lock,
+			 * because it is just us accessing them anyway.
+			 */
+			bio_list_for_each(bio, write)
+				bio_copy_page_list(WRITE, stripe, pl, bio);
+
+			bio_list_merge(BL_CHUNK(chunk, WRITE_MERGED), write);
+			bio_list_init(write);
+			chunk_set(chunk, DIRTY);
+		}
+	}
+}
+
+/* Queue all writes to get merged. */
+static int stripe_queue_writes(struct stripe *stripe)
+{
+	int r = 0;
+	unsigned p = RS(stripe->sc)->set.raid_devs;
+
+	while (p--) {
+		struct stripe_chunk *chunk = CHUNK(stripe, p);
+		struct bio_list *write = BL_CHUNK(chunk, WRITE);
+
+		if (!bio_list_empty(write)) {
+			bio_list_merge(BL_CHUNK(chunk, WRITE_QUEUED), write);
+			bio_list_init(write);
+SetChunkIo(chunk);
+			r = 1;
+		}
+	}
+
+	return r;
+}
+
+
+/* Check, if a chunk gets completely overwritten. */
+static int stripe_check_chunk_overwrite(struct stripe *stripe, unsigned p)
+{
+	unsigned sectors = 0;
+	struct bio *bio;
+	struct bio_list *bl = BL(stripe, p, WRITE_QUEUED);
+
+	bio_list_for_each(bio, bl)
+		sectors += bio_sectors(bio);
+
+	BUG_ON(sectors > RS(stripe->sc)->set.io_size);
+	return sectors == RS(stripe->sc)->set.io_size;
+}
+
+/*
+ * Avoid io on broken/reconstructed drive in order to
+ * reconstruct date on endio.
+ *
+ * (*1*) We set StripeReconstruct() in here, so that _do_endios()
+ *	 will trigger a reconstruct call before resetting it.
+ */
+static int stripe_chunk_set_io_flags(struct stripe *stripe, int pr)
+{
+	struct stripe_chunk *chunk = CHUNK(stripe, pr);
+
+	/*
+	 * Allow io on all chunks but the indexed one,
+	 * because we're either degraded or prohibit it
+	 * on the one for later reconstruction.
+	 */
+	/* Includes ClearChunkIo(), ClearChunkUptodate(). */
+	stripe_chunk_invalidate(chunk);
+	stripe->idx.recover = pr;
+	SetStripeReconstruct(stripe);
+
+	/* REMOVEME: statistics. */
+	atomic_inc(RS(stripe->sc)->stats + S_PROHIBITCHUNKIO);
+	return -EPERM;
+}
+
+/* Chunk locked/uptodate and device failed tests. */
+static struct stripe_chunk *
+stripe_chunk_check(struct stripe *stripe, unsigned p, unsigned *chunks_uptodate)
+{
+	struct raid_set *rs = RS(stripe->sc);
+	struct stripe_chunk *chunk = CHUNK(stripe, p);
+
+	/* Can't access active chunks. */
+	if (ChunkLocked(chunk)) {
+		/* REMOVEME: statistics. */
+		atomic_inc(rs->stats + S_CHUNK_LOCKED);
+		return NULL;
+	}
+
+	/* Can't access broken devive. */
+	if (ChunkError(chunk) || DevFailed(rs->dev + p))
+		return NULL;
+
+	/* Can access uptodate chunks. */
+	if (ChunkUptodate(chunk)) {
+		(*chunks_uptodate)++;
+		return NULL;
+	}
+
+	return chunk;
+}
+
+/*
+ * Degraded/reconstruction mode.
+ *
+ * Check stripe state to figure which chunks don't need IO.
+ *
+ * Returns 0 for fully operational, -EPERM for degraded/resynchronizing.
+ */
+static int stripe_check_reconstruct(struct stripe *stripe)
+{
+	struct raid_set *rs = RS(stripe->sc);
+
+	if (RSDead(rs)) {
+		ClearStripeReconstruct(stripe);
+		ClearStripeReconstructed(stripe);
+		stripe_allow_io(stripe);
+		return 0;
+	}
+
+	/* Avoid further reconstruction setting, when already set. */
+	if (StripeReconstruct(stripe)) {
+		/* REMOVEME: statistics. */
+		atomic_inc(rs->stats + S_RECONSTRUCT_SET);
+		return -EBUSY;
+	}
+
+	/* Initially allow io on all chunks. */
+	stripe_allow_io(stripe);
+
+	/* Return if stripe is already reconstructed. */
+	if (StripeReconstructed(stripe)) {
+		atomic_inc(rs->stats + S_RECONSTRUCTED);
+		return 0;
+	}
+
+	/*
+	 * Degraded/reconstruction mode (device failed) ->
+	 * avoid io on the failed device.
+	 */
+	if (unlikely(RSDegraded(rs))) {
+		/* REMOVEME: statistics. */
+		atomic_inc(rs->stats + S_DEGRADED);
+		/* Allow IO on all devices but the dead one. */
+		BUG_ON(rs->set.ei < 0);
+		return stripe_chunk_set_io_flags(stripe, rs->set.ei);
+	} else {
+		int sync, pi = dev_for_parity(stripe, &sync);
+
+		/*
+		 * Reconstruction mode (ie. a particular (replaced) device or
+		 * some (rotating) parity chunk is being resynchronized) ->
+		 *   o make sure all needed chunks are read in
+		 *   o writes are allowed to go through
+		 */
+		if (!sync) {
+			/* REMOVEME: statistics. */
+			atomic_inc(rs->stats + S_NOSYNC);
+			/* Allow IO on all devs but the one to reconstruct. */
+			return stripe_chunk_set_io_flags(stripe, pi);
+		}
+	}
+
+	return 0;
+}
+
+/*
+ * Check, if stripe is ready to merge writes.
+ * I.e. if all chunks present to allow to merge bios.
+ *
+ * We prohibit io on:
+ *
+ * o chunks without bios
+ * o chunks which get completely written over
+ */
+static int stripe_merge_possible(struct stripe *stripe, int nosync)
+{
+	struct raid_set *rs = RS(stripe->sc);
+	unsigned chunks_overwrite = 0, chunks_prohibited = 0,
+		 chunks_uptodate = 0, p = rs->set.raid_devs;
+
+	/* Walk all chunks. */
+	while (p--) {
+		struct stripe_chunk *chunk;
+
+		/* Prohibit io on broken devices. */
+		if (DevFailed(rs->dev + p)) {
+			chunk = CHUNK(stripe, p);
+			goto prohibit_io;
+		}
+
+		/* We can't optimize any further if no chunk. */
+		chunk = stripe_chunk_check(stripe, p, &chunks_uptodate);
+		if (!chunk || nosync)
+			continue;
+
+		/*
+		 * We have a chunk, which is not uptodate.
+		 *
+		 * If this is not parity and we don't have
+		 * reads queued, we can optimize further.
+		 */
+		if (p != stripe->idx.parity &&
+		    bio_list_empty(BL_CHUNK(chunk, READ)) &&
+		    bio_list_empty(BL_CHUNK(chunk, WRITE_MERGED))) {
+			if (bio_list_empty(BL_CHUNK(chunk, WRITE_QUEUED)))
+				goto prohibit_io;
+			else if (RSCheckOverwrite(rs) &&
+				 stripe_check_chunk_overwrite(stripe, p))
+				/* Completely overwritten chunk. */
+				chunks_overwrite++;
+		}
+
+		/* Allow io for chunks with bios and overwritten ones. */
+		SetChunkIo(chunk);
+		continue;
+
+prohibit_io:
+		/* No io for broken devices or for chunks w/o bios. */
+		ClearChunkIo(chunk);
+		chunks_prohibited++;
+		/* REMOVEME: statistics. */
+		atomic_inc(RS(stripe->sc)->stats + S_PROHIBITCHUNKIO);
+	}
+
+	/* All data chunks will get written over. */
+	if (chunks_overwrite == rs->set.data_devs)
+		atomic_inc(rs->stats + S_OVERWRITE); /* REMOVEME: statistics.*/
+	else if (chunks_uptodate + chunks_prohibited < rs->set.raid_devs) {
+		/* We don't have enough chunks to merge. */
+		atomic_inc(rs->stats + S_CANT_MERGE); /* REMOVEME: statistics.*/
+		return -EPERM;
+	}
+
+	/*
+	 * If we have all chunks up to date or overwrite them, we
+	 * just zero the parity chunk and let stripe_rw() recreate it.
+	 */
+	if (chunks_uptodate == rs->set.raid_devs ||
+	    chunks_overwrite == rs->set.data_devs) {
+		stripe_zero_chunk(stripe, stripe->idx.parity);
+		BUG_ON(StripeReconstruct(stripe));
+		SetStripeReconstruct(stripe);	/* Enforce xor in caller. */
+	} else {
+		/*
+		 * With less chunks, we xor parity out.
+		 *
+		 * (*4*) We rely on !StripeReconstruct() in chunk_must_xor(),
+		 *	 so that only chunks with queued or merged writes 
+		 *	 are being xored.
+		 */
+		parity_xor(stripe);
+	}
+
+	/*
+	 * We do have enough chunks to merge.
+	 * All chunks are uptodate or get written over.
+	 */
+	atomic_inc(rs->stats + S_CAN_MERGE); /* REMOVEME: statistics. */
+	return 0;
+}
+
+/*
+ * Avoid reading chunks in case we're fully operational.
+ *
+ * We prohibit io on any chunks without bios but the parity chunk.
+ */
+static void stripe_avoid_reads(struct stripe *stripe)
+{
+	struct raid_set *rs = RS(stripe->sc);
+	unsigned dummy = 0, p = rs->set.raid_devs;
+
+	/* Walk all chunks. */
+	while (p--) {
+		struct stripe_chunk *chunk =
+			stripe_chunk_check(stripe, p, &dummy);
+
+		if (!chunk)
+			continue;
+
+		/* If parity or any bios pending -> allow io. */
+		if (chunk_ref(chunk) || p == stripe->idx.parity)
+			SetChunkIo(chunk);
+		else {
+			ClearChunkIo(chunk);
+			/* REMOVEME: statistics. */
+			atomic_inc(RS(stripe->sc)->stats + S_PROHIBITCHUNKIO);
+		}
+	}
+}
+
+/*
+ * Read/write a stripe.
+ *
+ * All stripe read/write activity goes through this function
+ * unless recovery, which has to call stripe_chunk_rw() directly.
+ *
+ * Make sure we don't try already merged stripes in order
+ * to avoid data corruption.
+ *
+ * Check the state of the RAID set and if degraded (or
+ * resynchronizing for reads), read in all other chunks but
+ * the one on the dead/resynchronizing device in order to be
+ * able to reconstruct the missing one in _do_endios().
+ *
+ * Can be called on active stripes in order
+ * to dispatch new io on inactive chunks.
+ *
+ * States to cover:
+ *   o stripe to read and/or write
+ *   o stripe with error to reconstruct
+ */
+static void stripe_rw(struct stripe *stripe)
+{
+	int nosync, r;
+	struct raid_set *rs = RS(stripe->sc);
+
+	/*
+ 	 * Check, if a chunk needs to be reconstructed
+ 	 * because of a degraded set or a region out of sync.
+ 	 */
+	nosync = stripe_check_reconstruct(stripe);
+	switch (nosync) {
+	case -EBUSY:
+		return; /* Wait for stripe reconstruction to finish. */
+	case -EPERM:
+		goto io;
+	}
+
+	/*
+	 * If we don't have merged writes pending, we can schedule
+	 * queued writes to be merged next without corrupting data.
+	 */
+	if (!StripeMerged(stripe)) {
+		r = stripe_queue_writes(stripe);
+		if (r)
+			/* Writes got queued -> flag RBW. */
+			SetStripeRBW(stripe);
+	}
+
+	/*
+	 * Merge all writes hanging off uptodate/overwritten
+	 * chunks of the stripe.
+	 */
+	if (StripeRBW(stripe)) {
+		r = stripe_merge_possible(stripe, nosync);
+		if (!r) { /* Merge possible. */
+			struct stripe_chunk *chunk;
+
+			/*
+			 * I rely on valid parity in order
+			 * to xor a fraction of chunks out
+			 * of parity and back in.
+			 */
+			stripe_merge_writes(stripe);	/* Merge writes in. */
+			parity_xor(stripe);		/* Update parity. */
+			ClearStripeReconstruct(stripe);	/* Reset xor enforce. */
+			SetStripeMerged(stripe);	/* Writes merged. */
+			ClearStripeRBW(stripe);		/* Disable RBW. */
+
+			/*
+			 * REMOVEME: sanity check on parity chunk
+			 * 	     states after writes got merged.
+			 */
+			chunk = CHUNK(stripe, stripe->idx.parity);
+			BUG_ON(ChunkLocked(chunk));
+			BUG_ON(!ChunkUptodate(chunk));
+			BUG_ON(!ChunkDirty(chunk));
+			BUG_ON(!ChunkIo(chunk));
+		}
+	} else if (!nosync && !StripeMerged(stripe))
+		/* Read avoidance if not degraded/resynchronizing/merged. */
+		stripe_avoid_reads(stripe);
+
+io:
+	/* Now submit any reads/writes for non-uptodate or dirty chunks. */
+	r = stripe_chunks_rw(stripe);
+	if (!r) {
+		/*
+		 * No io submitted because of chunk io
+		 * prohibited or locked chunks/failed devices
+		 * -> push to end io list for processing.
+		 */
+		stripe_endio_push(stripe);
+		atomic_inc(rs->stats + S_NO_RW); /* REMOVEME: statistics. */
+	}
+}
+
+/*
+ * Recovery functions
+ */
+/* Read a stripe off a raid set for recovery. */
+static int stripe_recover_read(struct stripe *stripe, int pi)
+{
+	BUG_ON(stripe_io_ref(stripe));
+
+	/* Invalidate all chunks so that they get read in. */
+	stripe_chunks_invalidate(stripe);
+	stripe_allow_io(stripe); /* Allow io on all recovery chunks. */
+
+	/*
+	 * If we are reconstructing a perticular device, we can avoid
+ 	 * reading the respective chunk in, because we're going to
+	 * reconstruct it anyway.
+	 *
+	 * We can't do that for resynchronization of rotating parity,
+	 * because the recovery stripe chunk size is typically larger
+	 * than the sets chunk size.
+	 */
+	if (pi > -1)
+		ClearChunkIo(CHUNK(stripe, pi));
+
+	return stripe_chunks_rw(stripe);
+}
+
+/* Write a stripe to a raid set for recovery. */
+static int stripe_recover_write(struct stripe *stripe, int pi)
+{
+	BUG_ON(stripe_io_ref(stripe));
+
+	/*
+	 * If this is a reconstruct of a particular device, then
+	 * reconstruct the respective chunk, else create parity chunk.
+	 */
+	if (pi > -1) {
+		stripe_zero_chunk(stripe, pi);
+		common_xor(stripe, stripe->io.size, 0, pi);
+		chunk_set(CHUNK(stripe, pi), DIRTY);
+	} else
+		parity_xor(stripe);
+
+	return stripe_chunks_rw(stripe);
+}
+
+/* Read/write a recovery stripe. */
+static int stripe_recover_rw(struct stripe *stripe)
+{
+	int r = 0, sync = 0;
+
+	/* Read/write flip-flop. */
+	if (TestClearStripeRBW(stripe)) {
+		SetStripeMerged(stripe);
+		stripe->key = stripe->recover->pos;
+		r = stripe_recover_read(stripe, dev_for_parity(stripe, &sync));
+		BUG_ON(!r);
+	} else if (TestClearStripeMerged(stripe)) {
+		r = stripe_recover_write(stripe, dev_for_parity(stripe, &sync));
+		BUG_ON(!r);
+	}
+
+	BUG_ON(sync);
+	return r;
+}
+
+/* Recover bandwidth available ?. */
+static int recover_bandwidth(struct raid_set *rs)
+{
+	int r, work;
+
+	/* On reset or when bios delayed -> allow recovery. */
+	r = recover_io_reset(rs);
+	if (r || RSBandwidth(rs))
+		goto out;
+
+	work = atomic_read(rs->recover.io_count + IO_WORK);
+	if (work) {
+		/* Pay attention to larger recover stripe size. */
+		int recover = atomic_read(rs->recover.io_count + IO_RECOVER) *
+					  rs->recover.io_size / rs->set.io_size;
+
+		/*
+		 * Don't use more than given bandwidth
+		 * of the work io for recovery.
+		 */
+		if (recover > work / rs->recover.bandwidth_work) {
+			/* REMOVEME: statistics. */
+			atomic_inc(rs->stats + S_NO_BANDWIDTH);
+			return 0;
+		}
+	}
+
+out:
+	atomic_inc(rs->stats + S_BANDWIDTH);	/* REMOVEME: statistics. */
+	return 1;
+}
+
+/* Try to get a region to recover. */
+static int stripe_recover_get_region(struct stripe *stripe)
+{
+	struct raid_set *rs = RS(stripe->sc);
+	struct recover *rec = &rs->recover;
+	struct recover_addr *addr = stripe->recover;
+	struct dm_dirty_log *dl = rec->dl;
+	struct dm_rh_client *rh = rec->rh;
+
+	BUG_ON(!dl);
+	BUG_ON(!rh);
+
+	/* Return, that we have region first to finish it during suspension. */
+	if (addr->reg)
+		return 1;
+
+	if (RSSuspend(rs))
+		return -EPERM;
+
+	if (dl->type->get_sync_count(dl) >= rec->nr_regions)
+		return -ENOENT;
+
+	/* If we don't have enough bandwidth, we don't proceed recovering. */
+	if (!recover_bandwidth(rs))
+		return -EAGAIN;
+
+	/* Start quiescing a region. */
+	dm_rh_recovery_prepare(rh);
+	addr->reg = dm_rh_recovery_start(rh);
+	if (!addr->reg)
+		return -EAGAIN;
+
+	addr->pos = dm_rh_region_to_sector(rh, dm_rh_get_region_key(addr->reg));
+	addr->end = addr->pos + dm_rh_get_region_size(rh);
+
+	/*
+	 * Take one global io reference out for the
+	 * whole region, which is going to be released
+	 * when the region is completely done with.
+	 */
+	io_get(rs);
+	return 0;
+}
+
+/* Update region hash state. */
+enum recover_type { REC_FAILURE = 0, REC_SUCCESS = 1 };
+static void recover_rh_update(struct stripe *stripe, enum recover_type success)
+{
+	struct recover_addr *addr = stripe->recover;
+	struct raid_set *rs = RS(stripe->sc);
+	struct recover *rec = &rs->recover;
+
+	if (!addr->reg) {
+		DMERR("%s- Called w/o region", __func__);
+		return;
+	}
+
+	dm_rh_recovery_end(addr->reg, success);
+	if (success)
+		rec->nr_regions_recovered++;
+
+	addr->reg = NULL;
+
+	/*
+	 * Completely done with this region ->
+	 * release the 1st io reference.
+	 */
+	io_put(rs);
+}
+
+/* Set start of recovery state. */
+static void set_start_recovery(struct raid_set *rs)
+{
+	/* Initialize recovery. */
+	rs->recover.start_jiffies = jiffies;
+	rs->recover.end_jiffies = 0;
+}
+
+/* Set end of recovery state. */
+static void set_end_recovery(struct raid_set *rs)
+{
+	ClearRSRecover(rs);
+	rs->set.dev_to_init = -1;
+
+	/* Check for jiffies overrun. */
+	rs->recover.end_jiffies = jiffies;
+	if (rs->recover.end_jiffies < rs->recover.start_jiffies)
+		rs->recover.end_jiffies = ~0;
+}
+
+/* Handle recovery on one recovery stripe. */
+static int _do_recovery(struct stripe *stripe)
+{
+	int r;
+	struct raid_set *rs = RS(stripe->sc);
+	struct recover_addr *addr = stripe->recover;
+
+	/* If recovery is active -> return. */
+	if (stripe_io_ref(stripe))
+		return 1;
+
+	/* IO error is fatal for recovery -> stop it. */
+	if (unlikely(StripeError(stripe)))
+		goto err;
+
+	/* Recovery end required. */
+	if (!RSRecover(rs))
+		goto err;
+
+	/* Get a region to recover. */
+	r = stripe_recover_get_region(stripe);
+	switch (r) {
+	case 0:	/* Got a new region: flag initial read before write. */
+		SetStripeRBW(stripe);
+	case 1:	/* Have a region in the works. */
+		break;
+	case -EAGAIN:
+		/* No bandwidth/quiesced region yet, try later. */
+		if (!io_ref(rs))
+			wake_do_raid_delayed(rs, HZ / 4);
+	case -EPERM:
+		/* Suspend. */
+		return 1;
+	case -ENOENT:	/* No more regions to recover. */
+		schedule_work(&rs->io.ws_do_table_event);
+		return 0;
+	default:
+		BUG();
+	}
+
+	/* Read/write a recover stripe. */
+	r = stripe_recover_rw(stripe);
+	if (r)
+		/* IO initiated. */
+		return 1;
+
+	/* Read and write finished-> update recovery position within region. */
+	addr->pos += stripe->io.size;
+
+	/* If we're at end of region, update region hash. */
+	if (addr->pos >= addr->end ||
+	    addr->pos >= rs->set.sectors_per_dev)
+		recover_rh_update(stripe, REC_SUCCESS);
+	else
+		/* Prepare to read next region segment. */
+		SetStripeRBW(stripe);
+
+	/* Schedule myself for another round... */
+	wake_do_raid(rs);
+	return 1;
+
+err:
+	/* FIXME: rather try recovering other regions on error? */
+	rs_check_degrade(stripe);
+	recover_rh_update(stripe, REC_FAILURE);
+
+	/* Check state of partially recovered array. */
+	if (RSDegraded(rs) && !RSDead(rs) &&
+	    rs->set.dev_to_init != -1 &&
+	    rs->set.ei != rs->set.dev_to_init)
+		/* Broken drive != drive to recover -> FATAL. */
+		SetRSDead(rs);
+
+	if (StripeError(stripe)) {
+		char buf[BDEVNAME_SIZE];
+
+		DMERR("stopping recovery due to "
+		      "ERROR on /dev/%s, stripe at offset %llu",
+		      bdevname(rs->dev[rs->set.ei].dev->bdev, buf),
+		      (unsigned long long) stripe->key);
+
+	}
+
+	/* Make sure, that all quiesced regions get released. */
+	while (addr->reg) {
+		dm_rh_recovery_end(addr->reg, -EIO);
+		addr->reg = dm_rh_recovery_start(rs->recover.rh);
+	}
+
+	return 0;
+}
+
+/* Called by main io daemon to recover regions. */
+static void do_recovery(struct raid_set *rs)
+{
+	if (RSRecover(rs)) {
+		int r = 0;
+		struct stripe *stripe;
+
+		list_for_each_entry(stripe, &rs->recover.stripes,
+				    lists[LIST_RECOVER])
+			r += _do_recovery(stripe);
+
+		if (!r) {
+			set_end_recovery(rs);
+			stripe_recover_free(rs);
+		}
+	}
+}
+
+/*
+ * END recovery functions
+ */
+
+/* End io process all stripes handed in by endio() callback. */
+static void _do_endios(struct raid_set *rs, struct stripe *stripe,
+		       struct list_head *flush_list)
+{
+	/* First unlock all required chunks. */
+	stripe_chunks_unlock(stripe);
+
+	/*
+	 * If an io error on a stripe occured, degrade the RAID set
+	 * and try to endio as many bios as possible. If any bios can't
+	 * be endio processed, requeue the stripe (stripe_ref() != 0).
+	 */
+	if (TestClearStripeError(stripe)) {
+		/*
+		 * FIXME: if read, rewrite the failed chunk after reconstruction
+		 *        in order to trigger disk bad sector relocation.
+		 */
+		rs_check_degrade(stripe); /* Resets ChunkError(). */
+		ClearStripeReconstruct(stripe);
+		ClearStripeReconstructed(stripe);
+	}
+
+	/* Got to reconstruct a missing chunk. */
+	if (StripeReconstruct(stripe)) {
+		/*
+		 * (*2*) We use StripeReconstruct() to allow for
+		 *	 all chunks to be xored into the reconstructed
+		 *	 one (see chunk_must_xor()).
+		 */
+		stripe_reconstruct(stripe);
+
+		/*
+		 * (*3*) Now we reset StripeReconstruct() and flag
+		 * 	 StripeReconstructed() to show to stripe_rw(),
+		 * 	 that we have reconstructed a missing chunk.
+		 */
+		ClearStripeReconstruct(stripe);
+		SetStripeReconstructed(stripe);
+
+		/* FIXME: reschedule to be written in case of read. */
+		// if (!StripeRBW(stripe)) {
+		// 	chunk_set(CHUNK(stripe, pr), DIRTY);
+		// 	stripe_chunks_rw(stripe);
+		// }
+	}
+
+	/*
+	 * Now that we eventually got a complete stripe, we
+	 * can process the rest of the end ios on reads.
+	 */
+	stripe_endio(READ, stripe);
+
+	/* End io all merged writes. */
+	if (TestClearStripeMerged(stripe))
+		stripe_endio(WRITE_MERGED, stripe);
+
+	/* If RAID set is dead -> fail any ios to dead drives. */
+	if (RSDead(rs)) {
+		DMERR_LIMIT("RAID set dead: failing ios to dead devices");
+		stripe_fail_io(stripe);
+	}
+
+	/*
+	 * We have stripe references still,
+	 * beacuse of read befeore writes or IO errors ->
+	 * got to put on flush list for processing.
+	 */
+	if (stripe_ref(stripe)) {
+		BUG_ON(!list_empty(stripe->lists + LIST_LRU));
+		list_add_tail(stripe->lists + LIST_FLUSH, flush_list);
+		atomic_inc(rs->stats + S_REQUEUE); /* REMOVEME: statistics. */
+	} else
+		stripe_lru_add(stripe);
+}
+
+/* Pop any endio stripes off of the endio list and belabour them. */
+static void do_endios(struct raid_set *rs)
+{
+	struct stripe_cache *sc = &rs->sc;
+	struct stripe *stripe;
+	/* IO flush list for sorted requeued stripes. */
+	struct list_head flush_list;
+
+	INIT_LIST_HEAD(&flush_list);
+
+	while ((stripe = stripe_endio_pop(sc))) {
+		/* Avoid endio on stripes with newly io'ed chunks. */
+		if (!stripe_io_ref(stripe))
+			_do_endios(rs, stripe, &flush_list);
+	}
+
+	/*
+	 * Insert any requeued stripes in the proper
+	 * order at the beginning of the io (flush) list.
+	 */
+	list_splice(&flush_list, sc->lists + LIST_FLUSH);
+}
+
+/* Flush any stripes on the io list. */
+static void do_flush(struct raid_set *rs)
+{
+	struct stripe *stripe;
+
+	while ((stripe = stripe_io_pop(&rs->sc)))
+		stripe_rw(stripe); /* Read/write stripe. */
+}
+
+/* Stripe cache resizing. */
+static void do_sc_resize(struct raid_set *rs)
+{
+	unsigned set = atomic_read(&rs->sc.stripes_to_set);
+
+	if (set) {
+		unsigned cur = atomic_read(&rs->sc.stripes);
+		int r = (set > cur) ? sc_grow(&rs->sc, set - cur, SC_GROW) :
+				      sc_shrink(&rs->sc, cur - set);
+
+		/* Flag end of resizeing if ok. */
+		if (!r)
+			atomic_set(&rs->sc.stripes_to_set, 0);
+	}
+}
+
+/*
+ * Process all ios
+ *
+ * We do different things with the io depending
+ * on the state of the region that it is in:
+ *
+ * o reads: hang off stripe cache or postpone if full
+ *
+ * o writes:
+ *
+ *  CLEAN/DIRTY/NOSYNC:	increment pending and hang io off stripe's stripe set.
+ *			In case stripe cache is full or busy, postpone the io.
+ *
+ *  RECOVERING:		delay the io until recovery of the region completes.
+ *
+ */
+static void do_ios(struct raid_set *rs, struct bio_list *ios)
+{
+	int r;
+	unsigned flush = 0, delay = 0;
+	sector_t sector;
+	struct dm_rh_client *rh = rs->recover.rh;
+	struct bio *bio;
+	struct bio_list reject;
+
+	bio_list_init(&reject);
+
+	/*
+	 * Classify each io:
+	 *    o delay writes to recovering regions (let reads go through)
+	 *    o queue io to all other regions
+	 */
+	while ((bio = bio_list_pop(ios))) {
+		/*
+		 * In case we get a barrier bio, push it back onto
+		 * the input queue unless all work queues are empty
+		 * and the stripe cache is inactive.
+		 */
+		if (unlikely(bio_rw_flagged(bio, BIO_RW_BARRIER))) {
+			/* REMOVEME: statistics. */
+			atomic_inc(rs->stats + S_BARRIER);
+			if (delay ||
+			    !list_empty(rs->sc.lists + LIST_FLUSH) ||
+			    !bio_list_empty(&reject) ||
+			    sc_active(&rs->sc)) {
+				bio_list_push(ios, bio);
+				break;
+			}
+		}
+
+		/* Check for recovering regions. */
+		sector = _sector(rs, bio);
+		r = region_state(rs, sector, DM_RH_RECOVERING);
+		if (unlikely(r && bio_data_dir(bio) == WRITE)) {
+			delay++;
+			/* Wait writing to recovering regions. */
+			dm_rh_delay_by_region(rh, bio,
+					      dm_rh_sector_to_region(rh,
+								     sector));
+			/* REMOVEME: statistics.*/
+			atomic_inc(rs->stats + S_DELAYED_BIOS);
+			atomic_inc(rs->stats + S_SUM_DELAYED_BIOS);
+
+			/* Force bandwidth tests in recovery. */
+			SetRSBandwidth(rs);
+		} else {
+			/*
+			 * Process ios to non-recovering regions by queueing
+			 * them to stripes (does dm_rh_inc()) for writes).
+			 */
+			flush += stripe_queue_bio(rs, bio, &reject);
+		}
+	}
+
+	if (flush) {
+		/* FIXME: better error handling. */
+		r = dm_rh_flush(rh); /* Writes got queued -> flush dirty log. */
+		if (r)
+			DMERR_LIMIT("dirty log flush");
+	}
+
+	/* Merge any rejected bios back to the head of the input list. */
+	bio_list_merge_head(ios, &reject);
+}
+
+/* Unplug: let any queued io role on the sets devices. */
+static void do_unplug(struct raid_set *rs)
+{
+	struct raid_dev *dev = rs->dev + rs->set.raid_devs;
+
+	while (dev-- > rs->dev) {
+		/* Only call any device unplug function, if io got queued. */
+		if (TestClearDevIoQueued(dev))
+			blk_unplug(bdev_get_queue(dev->dev->bdev));
+	}
+}
+
+/* Send an event in case we're getting too busy. */
+static void do_busy_event(struct raid_set *rs)
+{
+	if (sc_busy(rs)) {
+		if (!TestSetRSScBusy(rs))
+			schedule_work(&rs->io.ws_do_table_event);
+	}
+
+	ClearRSScBusy(rs);
+}
+
+/* Throw an event. */
+static void do_table_event(struct work_struct *ws)
+{
+	struct raid_set *rs = container_of(ws, struct raid_set,
+					   io.ws_do_table_event);
+	dm_table_event(rs->ti->table);
+}
+
+
+/*-----------------------------------------------------------------
+ * RAID daemon
+ *---------------------------------------------------------------*/
+/*
+ * o belabour all end ios
+ * o update the region hash states
+ * o optionally shrink the stripe cache
+ * o optionally do recovery
+ * o unplug any component raid devices with queued bios
+ * o grab the input queue
+ * o work an all requeued or new ios and perform stripe cache flushs
+ * o unplug any component raid devices with queued bios
+ * o check, if the stripe cache gets too busy and throw an event if so
+ */
+static void do_raid(struct work_struct *ws)
+{
+	struct raid_set *rs = container_of(ws, struct raid_set,
+					   io.dws_do_raid.work);
+	struct bio_list *ios = &rs->io.work, *ios_in = &rs->io.in;
+
+	/*
+	 * We always need to end io, so that ios can get errored in
+	 * case the set failed and the region counters get decremented
+	 * before we update region hash states and go any further.
+	 */
+	do_endios(rs);
+	dm_rh_update_states(rs->recover.rh, 1);
+
+	/*
+	 * Now that we've end io'd, which may have put stripes on the LRU list
+	 * to allow for shrinking, we resize the stripe cache if requested.
+	 */
+	do_sc_resize(rs);
+
+	/* Try to recover regions. */
+	do_recovery(rs);
+	do_unplug(rs);		/* Unplug the sets device queues. */
+
+	/* Quickly grab all new ios queued and add them to the work list. */
+	mutex_lock(&rs->io.in_lock);
+	bio_list_merge(ios, ios_in);
+	bio_list_init(ios_in);
+	mutex_unlock(&rs->io.in_lock);
+
+	if (!bio_list_empty(ios))
+		do_ios(rs, ios); /* Got ios to work into the cache. */
+
+	do_flush(rs);		/* Flush any stripes on io list. */
+	do_unplug(rs);		/* Unplug the sets device queues. */
+	do_busy_event(rs);	/* Check if we got too busy. */
+}
+
+/*
+ * Callback for region hash to dispatch
+ * delayed bios queued to recovered regions
+ * (gets called via dm_rh_update_states()).
+ */
+static void dispatch_delayed_bios(void *context, struct bio_list *bl)
+{
+	struct raid_set *rs = context;
+	struct bio *bio;
+
+	/* REMOVEME: statistics; decrement pending delayed bios counter. */
+	bio_list_for_each(bio, bl)
+		atomic_dec(rs->stats + S_DELAYED_BIOS);
+
+	/* Merge region hash private list to work list. */
+	bio_list_merge_head(&rs->io.work, bl);
+	bio_list_init(bl);
+	ClearRSBandwidth(rs);
+}
+
+/*************************************************************
+ * Constructor helpers
+ *************************************************************/
+/* Calculate MB/sec. */
+static unsigned mbpers(struct raid_set *rs, unsigned speed)
+{
+	return to_bytes(speed * rs->set.data_devs *
+			rs->recover.io_size * HZ >> 10) >> 10;
+}
+
+/*
+ * Discover fastest xor algorithm and # of chunks combination.
+ */
+/* Calculate speed for algorithm and # of chunks. */
+static unsigned xor_speed(struct stripe *stripe)
+{
+	unsigned r = 0;
+	unsigned long j;
+
+	/* Wait for next tick. */
+	for (j = jiffies; j == jiffies; )
+		;
+
+	/* Do xors for a full tick. */
+	for (j = jiffies; j == jiffies; ) {
+		mb();
+		common_xor(stripe, stripe->io.size, 0, 0);
+		mb();
+		r++;
+	}
+
+	return r;
+}
+
+/* Optimize xor algorithm for this RAID set. */
+static unsigned xor_optimize(struct raid_set *rs)
+{
+	unsigned chunks_max = 2, p = rs->set.raid_devs, speed_max = 0;
+	struct xor_func *f = ARRAY_END(xor_funcs), *f_max = NULL;
+	struct stripe *stripe;
+
+	BUG_ON(list_empty(&rs->recover.stripes));
+	stripe = list_first_entry(&rs->recover.stripes, struct stripe,
+				  lists[LIST_RECOVER]);
+
+	/* Must set uptodate so that xor() will belabour chunks. */
+	while (p--)
+		SetChunkUptodate(CHUNK(stripe, p));
+
+	/* Try all xor functions. */
+	while (f-- > xor_funcs) {
+		unsigned speed;
+
+		/* Set actual xor function for common_xor(). */
+		rs->xor.f = f;
+		rs->xor.chunks = (f->f == xor_blocks_wrapper ?
+				  (MAX_XOR_BLOCKS + 1) : XOR_CHUNKS_MAX) + 1;
+
+		while (rs->xor.chunks-- > 2) {
+			speed = xor_speed(stripe);
+			if (speed > speed_max) {
+				speed_max = speed;
+				chunks_max = rs->xor.chunks;
+				f_max = f;
+			}
+		}
+	}
+
+	/* Memorize optimum parameters. */
+	rs->xor.f = f_max;
+	rs->xor.chunks = chunks_max;
+	return speed_max;
+}
+
+/*
+ * Allocate a RAID context (a RAID set)
+ */
+/* Structure for variable RAID parameters. */
+struct variable_parms {
+	int bandwidth;
+	int bandwidth_parm;
+	int chunk_size;
+	int chunk_size_parm;
+	int io_size;
+	int io_size_parm;
+	int stripes;
+	int stripes_parm;
+	int recover_io_size;
+	int recover_io_size_parm;
+	int raid_parms;
+	int recovery;
+	int recovery_stripes;
+	int recovery_stripes_parm;
+};
+
+static struct raid_set *
+context_alloc(struct raid_type *raid_type, struct variable_parms *p,
+	      unsigned raid_devs, sector_t sectors_per_dev,
+	      struct dm_target *ti, unsigned dl_parms, char **argv)
+{
+	int r;
+	size_t len;
+	sector_t region_size, ti_len;
+	struct raid_set *rs = NULL;
+	struct dm_dirty_log *dl;
+	struct recover *rec;
+
+	/*
+	 * Create the dirty log
+	 *
+	 * We need to change length for the dirty log constructor,
+	 * because we want an amount of regions for all stripes derived
+	 * from the single device size, so that we can keep region
+	 * size = 2^^n independant of the number of devices
+	 */
+	ti_len = ti->len;
+	ti->len = sectors_per_dev;
+	dl = dm_dirty_log_create(argv[0], ti, dl_parms, argv + 2);
+	ti->len = ti_len;
+	if (!dl)
+		goto bad_dirty_log;
+
+	/* Chunk size *must* be smaller than region size. */
+	region_size = dl->type->get_region_size(dl);
+	if (p->chunk_size > region_size)
+		goto bad_chunk_size;
+
+	/* Recover io size *must* be smaller than region size as well. */
+	if (p->recover_io_size > region_size)
+		goto bad_recover_io_size;
+
+	/* Size and allocate the RAID set structure. */
+	len = sizeof(*rs->data) + sizeof(*rs->dev);
+	if (dm_array_too_big(sizeof(*rs), len, raid_devs))
+		goto bad_array;
+
+	len = sizeof(*rs) + raid_devs * len;
+	rs = kzalloc(len, GFP_KERNEL);
+	if (!rs)
+		goto bad_alloc;
+
+	rec = &rs->recover;
+	atomic_set(&rs->io.in_process, 0);
+	atomic_set(&rs->io.in_process_max, 0);
+	rec->io_size = p->recover_io_size;
+
+	/* Pointer to data array. */
+	rs->data = (unsigned long **)
+		   ((void *) rs->dev + raid_devs * sizeof(*rs->dev));
+	rec->dl = dl;
+	rs->set.raid_devs = raid_devs;
+	rs->set.data_devs = raid_devs - raid_type->parity_devs;
+	rs->set.raid_type = raid_type;
+
+	rs->set.raid_parms = p->raid_parms;
+	rs->set.chunk_size_parm = p->chunk_size_parm;
+	rs->set.io_size_parm = p->io_size_parm;
+	rs->sc.stripes_parm = p->stripes_parm;
+	rec->io_size_parm = p->recover_io_size_parm;
+	rec->bandwidth_parm = p->bandwidth_parm;
+	rec->recovery = p->recovery;
+	rec->recovery_stripes = p->recovery_stripes;
+
+	/*
+	 * Set chunk and io size and respective shifts
+	 * (used to avoid divisions)
+	 */
+	rs->set.chunk_size = p->chunk_size;
+	rs->set.chunk_shift = ffs(p->chunk_size) - 1;
+
+	rs->set.io_size = p->io_size;
+	rs->set.io_mask = p->io_size - 1;
+	/* Mask to adjust address key in case io_size != chunk_size. */
+	rs->set.io_inv_mask = (p->chunk_size - 1) & ~rs->set.io_mask;
+
+	rs->set.sectors_per_dev = sectors_per_dev;
+
+	rs->set.ei = -1;	/* Indicate no failed device. */
+	atomic_set(&rs->set.failed_devs, 0);
+
+	rs->ti = ti;
+
+	atomic_set(rec->io_count + IO_WORK, 0);
+	atomic_set(rec->io_count + IO_RECOVER, 0);
+
+	/* Initialize io lock and queues. */
+	mutex_init(&rs->io.in_lock);
+	bio_list_init(&rs->io.in);
+	bio_list_init(&rs->io.work);
+
+	init_waitqueue_head(&rs->io.suspendq);	/* Suspend waiters (dm-io). */
+
+	rec->nr_regions = dm_sector_div_up(sectors_per_dev, region_size);
+	rec->rh = dm_region_hash_create(rs, dispatch_delayed_bios,
+			wake_dummy, wake_do_raid, 0, p->recovery_stripes,
+			dl, region_size, rec->nr_regions);
+	if (IS_ERR(rec->rh))
+		goto bad_rh;
+
+	/* Initialize stripe cache. */
+	r = sc_init(rs, p->stripes);
+	if (r)
+		goto bad_sc;
+
+	/* REMOVEME: statistics. */
+	stats_reset(rs);
+	ClearRSDevelStats(rs);	/* Disnable development status. */
+	return rs;
+
+bad_dirty_log:
+	TI_ERR_RET("Error creating dirty log", ERR_PTR(-ENOMEM));
+
+bad_chunk_size:
+	dm_dirty_log_destroy(dl);
+	TI_ERR_RET("Chunk size larger than region size", ERR_PTR(-EINVAL));
+
+bad_recover_io_size:
+	dm_dirty_log_destroy(dl);
+	TI_ERR_RET("Recover stripe io size larger than region size",
+			ERR_PTR(-EINVAL));
+
+bad_array:
+	dm_dirty_log_destroy(dl);
+	TI_ERR_RET("Arry too big", ERR_PTR(-EINVAL));
+
+bad_alloc:
+	dm_dirty_log_destroy(dl);
+	TI_ERR_RET("Cannot allocate raid context", ERR_PTR(-ENOMEM));
+
+bad_rh:
+	dm_dirty_log_destroy(dl);
+	ti->error = DM_MSG_PREFIX "Error creating dirty region hash";
+	goto free_rs;
+
+bad_sc:
+	dm_region_hash_destroy(rec->rh); /* Destroys dirty log too. */
+	sc_exit(&rs->sc);
+	ti->error = DM_MSG_PREFIX "Error creating stripe cache";
+free_rs:
+	kfree(rs);
+	return ERR_PTR(-ENOMEM);
+}
+
+/* Free a RAID context (a RAID set). */
+static void context_free(struct raid_set *rs, unsigned p)
+{
+	while (p--)
+		dm_put_device(rs->ti, rs->dev[p].dev);
+
+	sc_exit(&rs->sc);
+	dm_region_hash_destroy(rs->recover.rh); /* Destroys dirty log too. */
+	kfree(rs);
+}
+
+/* Create work queue and initialize delayed work. */
+static int rs_workqueue_init(struct raid_set *rs)
+{
+	struct dm_target *ti = rs->ti;
+
+	rs->io.wq = create_singlethread_workqueue(DAEMON);
+	if (!rs->io.wq)
+		TI_ERR_RET("failed to create " DAEMON, -ENOMEM);
+
+	INIT_DELAYED_WORK(&rs->io.dws_do_raid, do_raid);
+	INIT_WORK(&rs->io.ws_do_table_event, do_table_event);
+	return 0;
+}
+
+/* Return pointer to raid_type structure for raid name. */
+static struct raid_type *get_raid_type(char *name)
+{
+	struct raid_type *r = ARRAY_END(raid_types);
+
+	while (r-- > raid_types) {
+		if (!strcmp(r->name, name))
+			return r;
+	}
+
+	return NULL;
+}
+
+/* FIXME: factor out to dm core. */
+static int multiple(sector_t a, sector_t b, sector_t *n)
+{
+	sector_t r = a;
+
+	sector_div(r, b);
+	*n = r;
+	return a == r * b;
+}
+
+/* Log RAID set information to kernel log. */
+static void rs_log(struct raid_set *rs, unsigned speed)
+{
+	unsigned p;
+	char buf[BDEVNAME_SIZE];
+
+	for (p = 0; p < rs->set.raid_devs; p++)
+		DMINFO("/dev/%s is raid disk %u%s",
+				bdevname(rs->dev[p].dev->bdev, buf), p,
+				(p == rs->set.pi) ? " (parity)" : "");
+
+	DMINFO("%d/%d/%d sectors chunk/io/recovery size, %u stripes\n"
+	       "algorithm \"%s\", %u chunks with %uMB/s\n"
+	       "%s set with net %u/%u devices",
+	       rs->set.chunk_size, rs->set.io_size, rs->recover.io_size,
+	       atomic_read(&rs->sc.stripes),
+	       rs->xor.f->name, rs->xor.chunks, mbpers(rs, speed),
+	       rs->set.raid_type->descr, rs->set.data_devs, rs->set.raid_devs);
+}
+
+/* Get all devices and offsets. */
+static int dev_parms(struct raid_set *rs, char **argv, int *p)
+{
+	struct dm_target *ti = rs->ti;
+
+	for (*p = 0; *p < rs->set.raid_devs; (*p)++, argv += 2) {
+		int r;
+		unsigned long long tmp;
+		struct raid_dev *dev = rs->dev + *p;
+
+		/* Get offset and device. */
+		if (sscanf(argv[1], "%llu", &tmp) != 1 ||
+		    tmp > rs->set.sectors_per_dev)
+			TI_ERR("Invalid RAID device offset parameter");
+
+		dev->start = tmp;
+		r = dm_get_device(ti, *argv, dev->start,
+				  rs->set.sectors_per_dev,
+				  dm_table_get_mode(ti->table), &dev->dev);
+		if (r)
+			TI_ERR_RET("RAID device lookup failure", r);
+
+		r = raid_dev_lookup(rs, dev);
+		if (r != -ENODEV && r < *p) {
+			(*p)++;	/* Ensure dm_put_device() on actual device. */
+			TI_ERR_RET("Duplicate RAID device", -ENXIO);
+		}
+	}
+
+	return 0;
+}
+
+/* Set recovery bandwidth. */
+static void
+recover_set_bandwidth(struct raid_set *rs, unsigned bandwidth)
+{
+	rs->recover.bandwidth = bandwidth;
+	rs->recover.bandwidth_work = 100 / bandwidth;
+}
+
+/* Handle variable number of RAID parameters. */
+static int get_raid_variable_parms(struct dm_target *ti, char **argv, 
+				   struct variable_parms *vp)
+{
+	int p, value;
+	struct {
+		int action; /* -1: skip, 0: no pwer2 check, 1: power2 check */
+		char *errmsg;
+		int min, max;
+		int *var, *var2, *var3;
+	} argctr[] = {
+		{ 1,
+		  "Invalid chunk size; must be -1 or 2^^n and <= 16384",
+ 		  IO_SIZE_MIN, CHUNK_SIZE_MAX,
+		  &vp->chunk_size_parm, &vp->chunk_size, &vp->io_size },
+		{ 0,
+		  "Invalid number of stripes: must be -1 or >= 8 and <= 16384",
+		  STRIPES_MIN, STRIPES_MAX,
+		  &vp->stripes_parm, &vp->stripes, NULL },
+		{ 1,
+		  "Invalid io size; must -1 or >= 8, 2^^n and less equal "
+		  "min(BIO_MAX_SECTORS/2, chunk size)",
+		  IO_SIZE_MIN, 0, /* Needs to be updated in loop below. */
+		  &vp->io_size_parm, &vp->io_size, NULL },
+		{ 1,
+		  "Invalid recovery io size; must be -1 or "
+		  "2^^n and less equal BIO_MAX_SECTORS/2",
+		  RECOVER_IO_SIZE_MIN, BIO_MAX_SECTORS / 2,
+		  &vp->recover_io_size_parm, &vp->recover_io_size, NULL },
+		{ 0,
+		  "Invalid recovery bandwidth percentage; "
+		  "must be -1 or > 0 and <= 100",
+		  BANDWIDTH_MIN, BANDWIDTH_MAX,
+		  &vp->bandwidth_parm, &vp->bandwidth, NULL },
+		/* Handle sync argument seperately in loop. */
+		{ -1,
+		  "Invalid recovery switch; must be \"sync\" or \"nosync\"" },
+		{ 0,
+		  "Invalid number of recovery stripes;"
+		  "must be -1, > 0 and <= 16384",
+		  RECOVERY_STRIPES_MIN, RECOVERY_STRIPES_MAX,
+		  &vp->recovery_stripes_parm, &vp->recovery_stripes, NULL },
+	}, *varp;
+
+	/* Fetch # of variable raid parameters. */
+	if (sscanf(*(argv++), "%d", &vp->raid_parms) != 1 ||
+	    !range_ok(vp->raid_parms, 0, 7))
+		TI_ERR("Bad variable raid parameters number");
+
+	/* Preset variable RAID parameters. */
+	vp->chunk_size = CHUNK_SIZE_DEFAULT;
+	vp->io_size = IO_SIZE_DEFAULT;
+	vp->stripes = STRIPES_DEFAULT;
+	vp->recover_io_size = RECOVER_IO_SIZE_DEFAULT;
+	vp->bandwidth = BANDWIDTH_DEFAULT;
+	vp->recovery = 1;
+	vp->recovery_stripes = RECOVERY_STRIPES_DEFAULT;
+
+	/* Walk the array of argument constraints for all given ones. */
+	for (p = 0, varp = argctr; p < vp->raid_parms; p++, varp++) {
+	     	BUG_ON(varp >= ARRAY_END(argctr));
+
+		/* Special case for "[no]sync" string argument. */
+		if (varp->action < 0) {
+			if (!strcmp(*argv, "sync"))
+				;
+			else if (!strcmp(*argv, "nosync"))
+				vp->recovery = 0;
+			else
+				TI_ERR(varp->errmsg);
+
+			argv++;
+			continue;
+		}
+
+		/*
+		 * Special case for io_size depending
+		 * on previously set chunk size.
+		 */
+		if (p == 2)
+			varp->max = min(BIO_MAX_SECTORS / 2, vp->chunk_size);
+
+		if (sscanf(*(argv++), "%d", &value) != 1 ||
+		    (value != -1 &&
+		     ((varp->action && !POWER_OF_2(value)) ||
+		      !range_ok(value, varp->min, varp->max))))
+			TI_ERR(varp->errmsg);
+
+		*varp->var = value;
+		if (value != -1) {
+			if (varp->var2)
+				*varp->var2 = value;
+			if (varp->var3)
+				*varp->var3 = value;
+		}
+	}
+
+	return 0;
+}
+
+/* Parse optional locking parameters. */
+static int get_raid_locking_parms(struct dm_target *ti, char **argv,
+				  int *locking_parms,
+				  struct dm_raid45_locking_type **locking_type)
+{
+	if (!strnicmp(argv[0], "locking", strlen(argv[0]))) {
+		char *lckstr = argv[1];
+		size_t lcksz = strlen(lckstr);
+
+		if (!strnicmp(lckstr, "none", lcksz)) {
+			*locking_type = &locking_none;
+			*locking_parms = 2;
+		} else if (!strnicmp(lckstr, "cluster", lcksz)) {
+			DMERR("locking type \"%s\" not yet implemented",
+			      lckstr);
+			return -EINVAL;
+		} else {
+			DMERR("unknown locking type \"%s\"", lckstr);
+			return -EINVAL;
+		}
+	}
+
+	*locking_parms = 0;
+	*locking_type = &locking_none;
+	return 0;
+}
+
+/* Set backing device read ahead properties of RAID set. */
+static void rs_set_read_ahead(struct raid_set *rs,
+			      unsigned sectors, unsigned stripes)
+{
+	unsigned ra_pages = dm_div_up(sectors, SECTORS_PER_PAGE);
+	struct mapped_device *md = dm_table_get_md(rs->ti->table);
+	struct backing_dev_info *bdi = &dm_disk(md)->queue->backing_dev_info;
+
+	/* Set read-ahead for the RAID set and the component devices. */
+	if (ra_pages) {
+		unsigned p = rs->set.raid_devs;
+
+		bdi->ra_pages = stripes * ra_pages * rs->set.data_devs;
+
+		while (p--) {
+			struct request_queue *q =
+				bdev_get_queue(rs->dev[p].dev->bdev);
+
+			q->backing_dev_info.ra_pages = ra_pages;
+		}
+	}
+
+	dm_put(md);
+}
+
+/* Set congested function. */
+static void rs_set_congested_fn(struct raid_set *rs)
+{
+	struct mapped_device *md = dm_table_get_md(rs->ti->table);
+	struct backing_dev_info *bdi = &dm_disk(md)->queue->backing_dev_info;
+
+	/* Set congested function and data. */
+	bdi->congested_fn = rs_congested;
+	bdi->congested_data = rs;
+	dm_put(md);
+}
+
+/*
+ * Construct a RAID4/5 mapping:
+ *
+ * log_type #log_params <log_params> \
+ * raid_type [#parity_dev] #raid_variable_params <raid_params> \
+ * [locking "none"/"cluster"]
+ * #raid_devs #dev_to_initialize [<dev_path> <offset>]{3,}
+ *
+ * log_type = "core"/"disk",
+ * #log_params = 1-3 (1-2 for core dirty log type, 3 for disk dirty log only)
+ * log_params = [dirty_log_path] region_size [[no]sync])
+ *
+ * raid_type = "raid4", "raid5_la", "raid5_ra", "raid5_ls", "raid5_rs"
+ *
+ * #parity_dev = N if raid_type = "raid4"
+ * o N = -1: pick default = last device
+ * o N >= 0 and < #raid_devs: parity device index
+ *
+ * #raid_variable_params = 0-7; raid_params (-1 = default):
+ *   [chunk_size [#stripes [io_size [recover_io_size \
+ *    [%recovery_bandwidth [recovery_switch [#recovery_stripes]]]]]]]
+ *   o chunk_size (unit to calculate drive addresses; must be 2^^n, > 8
+ *     and <= CHUNK_SIZE_MAX)
+ *   o #stripes is number of stripes allocated to stripe cache
+ *     (must be > 1 and < STRIPES_MAX)
+ *   o io_size (io unit size per device in sectors; must be 2^^n and > 8)
+ *   o recover_io_size (io unit size per device for recovery in sectors;
+ must be 2^^n, > SECTORS_PER_PAGE and <= region_size)
+ *   o %recovery_bandwith is the maximum amount spend for recovery during
+ *     application io (1-100%)
+ *   o recovery switch = [sync|nosync]
+ *   o #recovery_stripes is the number of recovery stripes used for
+ *     parallel recovery of the RAID set
+ * If raid_variable_params = 0, defaults will be used.
+ * Any raid_variable_param can be set to -1 to apply a default
+ *
+ * #raid_devs = N (N >= 3)
+ *
+ * #dev_to_initialize = N
+ * -1: initialize parity on all devices
+ * >= 0 and < #raid_devs: initialize raid_path; used to force reconstruction
+ * of a failed devices content after replacement
+ *
+ * <dev_path> = device_path (eg, /dev/sdd1)
+ * <offset>   = begin at offset on <dev_path>
+ *
+ */
+#define	MIN_PARMS	13
+static int raid_ctr(struct dm_target *ti, unsigned argc, char **argv)
+{
+	int dev_to_init, dl_parms, i, locking_parms,
+	    parity_parm, pi = -1, r, raid_devs;
+	unsigned speed;
+	sector_t tmp, sectors_per_dev;
+	struct dm_raid45_locking_type *locking;
+	struct raid_set *rs;
+	struct raid_type *raid_type;
+	struct variable_parms parms;
+
+	/* Ensure minimum number of parameters. */
+	if (argc < MIN_PARMS)
+		TI_ERR("Not enough parameters");
+
+	/* Fetch # of dirty log parameters. */
+	if (sscanf(argv[1], "%d", &dl_parms) != 1 ||
+	    !range_ok(dl_parms, 1, 4711)) /* ;-) */
+		TI_ERR("Bad dirty log parameters number");
+
+	/* Check raid_type. */
+	raid_type = get_raid_type(argv[dl_parms + 2]);
+	if (!raid_type)
+		TI_ERR("Bad raid type");
+
+	/* In case of RAID4, parity drive is selectable. */
+	parity_parm = !!(raid_type->level == raid4);
+
+	/* Handle variable number of RAID parameters. */
+	r = get_raid_variable_parms(ti, argv + dl_parms + parity_parm + 3,
+				    &parms);
+	if (r)
+		return r;
+
+	/* Handle any locking parameters. */
+	r = get_raid_locking_parms(ti,
+				   argv + dl_parms + parity_parm +
+				   parms.raid_parms + 4,
+				   &locking_parms, &locking);
+	if (r)
+		return r;
+
+	/* # of raid devices. */
+	i = dl_parms + parity_parm + parms.raid_parms + locking_parms + 4;
+	if (sscanf(argv[i], "%d", &raid_devs) != 1 ||
+	    raid_devs < raid_type->minimal_devs)
+		TI_ERR("Invalid number of raid devices");
+
+	/* In case of RAID4, check parity drive index is in limits. */
+	if (raid_type->level == raid4) {
+		/* Fetch index of parity device. */
+		if (sscanf(argv[dl_parms + 3], "%d", &pi) != 1 ||
+		    (pi != -1 && !range_ok(pi, 0, raid_devs - 1)))
+			TI_ERR("Invalid RAID4 parity device index");
+	}
+
+	/*
+	 * Index of device to initialize starts at 0
+	 *
+	 * o -1 -> don't initialize a selected device;
+	 *         initialize parity conforming to algorithm
+	 * o 0..raid_devs-1 -> initialize respective device
+	 *   (used for reconstruction of a replaced device)
+	 */
+	if (sscanf(argv[dl_parms + parity_parm + parms.raid_parms +
+		   locking_parms + 5], "%d", &dev_to_init) != 1 ||
+	    !range_ok(dev_to_init, -1, raid_devs - 1))
+		TI_ERR("Invalid number for raid device to initialize");
+
+	/* Check # of raid device arguments. */
+	if (argc - dl_parms - parity_parm - parms.raid_parms - 6 !=
+	    2 * raid_devs)
+		TI_ERR("Wrong number of raid device/offset arguments");
+
+	/*
+	 * Check that the table length is devisable
+	 * w/o rest by (raid_devs - parity_devs)
+	 */
+	if (!multiple(ti->len, raid_devs - raid_type->parity_devs,
+		      &sectors_per_dev))
+		TI_ERR("Target length not divisible by number of data devices");
+
+	/*
+	 * Check that the device size is
+	 * devisable w/o rest by chunk size
+	 */
+	if (!multiple(sectors_per_dev, parms.chunk_size, &tmp))
+		TI_ERR("Device length not divisible by chunk_size");
+
+	/****************************************************************
+	 * Now that we checked the constructor arguments ->
+	 * let's allocate the RAID set
+	 ****************************************************************/
+	rs = context_alloc(raid_type, &parms, raid_devs, sectors_per_dev,
+			   ti, dl_parms, argv);
+	if (IS_ERR(rs))
+		return PTR_ERR(rs);
+
+
+	rs->set.dev_to_init = rs->set.dev_to_init_parm = dev_to_init;
+	rs->set.pi = rs->set.pi_parm = pi;
+
+	/* Set RAID4 parity drive index. */
+	if (raid_type->level == raid4)
+		rs->set.pi = (pi == -1) ? rs->set.data_devs : pi;
+
+	recover_set_bandwidth(rs, parms.bandwidth);
+
+	/* Use locking type to lock stripe access. */
+	rs->locking = locking;
+
+	/* Get the device/offset tupels. */
+	argv += dl_parms + 6 + parity_parm + parms.raid_parms;
+	r = dev_parms(rs, argv, &i);
+	if (r)
+		goto err;
+
+	/* Set backing device information (eg. read ahead). */
+	rs_set_read_ahead(rs, 2 * rs->set.chunk_size, 4 /* stripes */);
+	rs_set_congested_fn(rs); /* Set congested function. */
+	SetRSCheckOverwrite(rs); /* Allow chunk overwrite checks. */
+	speed = xor_optimize(rs); /* Select best xor algorithm. */
+
+	/* Set for recovery of any nosync regions. */
+	if (parms.recovery)
+		SetRSRecover(rs);
+	else {
+		/*
+		 * Need to free recovery stripe(s) here in case
+		 * of nosync, because xor_optimize uses one.
+		 */
+		set_start_recovery(rs);
+		set_end_recovery(rs);
+		stripe_recover_free(rs);
+	}
+
+	/*
+	 * Make sure that dm core only hands maximum io size
+	 * length down and pays attention to io boundaries.
+	 */
+	ti->split_io = rs->set.io_size;
+	ti->private = rs;
+
+	/* Initialize work queue to handle this RAID set's io. */
+	r = rs_workqueue_init(rs);
+	if (r)
+		goto err;
+
+	rs_log(rs, speed); /* Log information about RAID set. */
+	return 0;
+
+err:
+	context_free(rs, i);
+	return r;
+}
+
+/*
+ * Destruct a raid mapping
+ */
+static void raid_dtr(struct dm_target *ti)
+{
+	struct raid_set *rs = ti->private;
+
+	destroy_workqueue(rs->io.wq);
+	context_free(rs, rs->set.raid_devs);
+}
+
+/* Raid mapping function. */
+static int raid_map(struct dm_target *ti, struct bio *bio,
+		    union map_info *map_context)
+{
+	/* I don't want to waste stripe cache capacity. */
+	if (bio_rw(bio) == READA)
+		return -EIO;
+	else {
+		struct raid_set *rs = ti->private;
+
+		/*
+		 * Get io reference to be waiting for to drop
+		 * to zero on device suspension/destruction.
+		 */
+		io_get(rs);
+		bio->bi_sector -= ti->begin;	/* Remap sector. */
+
+		/* Queue io to RAID set. */
+		mutex_lock(&rs->io.in_lock);
+		bio_list_add(&rs->io.in, bio);
+		mutex_unlock(&rs->io.in_lock);
+
+		/* Wake daemon to process input list. */
+		wake_do_raid(rs);
+
+		/* REMOVEME: statistics. */
+		atomic_inc(rs->stats + (bio_data_dir(bio) == READ ?
+				        S_BIOS_READ : S_BIOS_WRITE));
+		return DM_MAPIO_SUBMITTED;	/* Handle later. */
+	}
+}
+
+/* Device suspend. */
+static void raid_presuspend(struct dm_target *ti)
+{
+	struct raid_set *rs = ti->private;
+	struct dm_dirty_log *dl = rs->recover.dl;
+
+	SetRSSuspend(rs);
+
+	if (RSRecover(rs))
+		dm_rh_stop_recovery(rs->recover.rh);
+
+	cancel_delayed_work(&rs->io.dws_do_raid);
+	flush_workqueue(rs->io.wq);
+	wait_ios(rs);	/* Wait for completion of all ios being processed. */
+
+	if (dl->type->presuspend && dl->type->presuspend(dl))
+		/* FIXME: need better error handling. */
+		DMWARN("log presuspend failed");
+}
+
+static void raid_postsuspend(struct dm_target *ti)
+{
+	struct raid_set *rs = ti->private;
+	struct dm_dirty_log *dl = rs->recover.dl;
+
+	if (dl->type->postsuspend && dl->type->postsuspend(dl))
+		/* FIXME: need better error handling. */
+		DMWARN("log postsuspend failed");
+
+}
+
+/* Device resume. */
+static void raid_resume(struct dm_target *ti)
+{
+	struct raid_set *rs = ti->private;
+	struct recover *rec = &rs->recover;
+	struct dm_dirty_log *dl = rec->dl;
+
+	if (dl->type->resume && dl->type->resume(dl))
+		/* Resume dirty log. */
+		/* FIXME: need better error handling. */
+		DMWARN("log resume failed");
+
+	rec->nr_regions_to_recover =
+		rec->nr_regions - dl->type->get_sync_count(dl);
+
+	/* Restart any unfinished recovery. */
+	if (RSRecover(rs)) {
+		set_start_recovery(rs);
+		dm_rh_start_recovery(rec->rh);
+	}
+
+	ClearRSSuspend(rs);
+	wake_do_raid(rs);
+}
+
+/* Return stripe cache size. */
+static unsigned sc_size(struct raid_set *rs)
+{
+	return to_sector(atomic_read(&rs->sc.stripes) *
+			 (sizeof(struct stripe) +
+			  (sizeof(struct stripe_chunk) +
+			   (sizeof(struct page_list) +
+			    to_bytes(rs->set.io_size) *
+			    rs->set.raid_devs)) +
+			  (rs->recover.end_jiffies ?
+			   0 : rs->recover.recovery_stripes *
+			   to_bytes(rs->set.raid_devs * rs->recover.io_size))));
+}
+
+/* REMOVEME: status output for development. */
+static void raid_devel_stats(struct dm_target *ti, char *result,
+			     unsigned *size, unsigned maxlen)
+{
+	unsigned sz = *size;
+	unsigned long j;
+	char buf[BDEVNAME_SIZE], *p;
+	struct stats_map *sm;
+	struct raid_set *rs = ti->private;
+	struct recover *rec = &rs->recover;
+	struct timespec ts;
+
+	DMEMIT("%s %s %u\n", version, rs->xor.f->name, rs->xor.chunks);
+	DMEMIT("act_ios=%d ", io_ref(rs));
+	DMEMIT("act_ios_max=%d\n", atomic_read(&rs->io.in_process_max));
+	DMEMIT("act_stripes=%d ", sc_active(&rs->sc));
+	DMEMIT("act_stripes_max=%d\n",
+	       atomic_read(&rs->sc.active_stripes_max));
+
+	for (sm = stats_map; sm < ARRAY_END(stats_map); sm++)
+		DMEMIT("%s%d", sm->str, atomic_read(rs->stats + sm->type));
+
+	DMEMIT(" checkovr=%s\n", RSCheckOverwrite(rs) ? "on" : "off");
+	DMEMIT("sc=%u/%u/%u/%u/%u/%u/%u\n", rs->set.chunk_size,
+	       atomic_read(&rs->sc.stripes), rs->set.io_size,
+	       rec->recovery_stripes, rec->io_size, rs->sc.hash.buckets,
+	       sc_size(rs));
+
+	j = (rec->end_jiffies ? rec->end_jiffies : jiffies) -
+	    rec->start_jiffies;
+	jiffies_to_timespec(j, &ts);
+	sprintf(buf, "%ld.%ld", ts.tv_sec, ts.tv_nsec);
+	p = strchr(buf, '.');
+	p[3] = 0;
+
+	DMEMIT("rg=%llu/%llu/%llu/%u %s\n",
+	       (unsigned long long) rec->nr_regions_recovered,
+	       (unsigned long long) rec->nr_regions_to_recover,
+	       (unsigned long long) rec->nr_regions, rec->bandwidth, buf);
+
+	*size = sz;
+}
+
+static int raid_status(struct dm_target *ti, status_type_t type,
+		       char *result, unsigned maxlen)
+{
+	unsigned p, sz = 0;
+	char buf[BDEVNAME_SIZE];
+	struct raid_set *rs = ti->private;
+	int raid_parms[] = {
+		rs->set.chunk_size_parm,
+		rs->sc.stripes_parm,
+		rs->set.io_size_parm,
+		rs->recover.io_size_parm,
+		rs->recover.bandwidth_parm,
+		-2,
+		rs->recover.recovery_stripes,
+	};
+
+	switch (type) {
+	case STATUSTYPE_INFO:
+		/* REMOVEME: statistics. */
+		if (RSDevelStats(rs))
+			raid_devel_stats(ti, result, &sz, maxlen);
+
+		DMEMIT("%u ", rs->set.raid_devs);
+
+		for (p = 0; p < rs->set.raid_devs; p++)
+			DMEMIT("%s ",
+			       format_dev_t(buf, rs->dev[p].dev->bdev->bd_dev));
+
+		DMEMIT("1 ");
+		for (p = 0; p < rs->set.raid_devs; p++) {
+			DMEMIT("%c", !DevFailed(rs->dev + p) ? 'A' : 'D');
+
+			if (p == rs->set.pi)
+				DMEMIT("p");
+
+			if (rs->set.dev_to_init == p)
+				DMEMIT("i");
+		}
+
+		break;
+	case STATUSTYPE_TABLE:
+		sz = rs->recover.dl->type->status(rs->recover.dl, type,
+						  result, maxlen);
+		DMEMIT("%s %u ", rs->set.raid_type->name,
+		       rs->set.raid_parms);
+
+		for (p = 0; p < rs->set.raid_parms; p++) {
+			if (raid_parms[p] > -2)
+				DMEMIT("%d ", raid_parms[p]);
+			else
+				DMEMIT("%s ", rs->recover.recovery ?
+					      "sync" : "nosync");
+		}
+
+		DMEMIT("%u %d ", rs->set.raid_devs, rs->set.dev_to_init);
+
+		for (p = 0; p < rs->set.raid_devs; p++)
+			DMEMIT("%s %llu ",
+			       format_dev_t(buf, rs->dev[p].dev->bdev->bd_dev),
+			       (unsigned long long) rs->dev[p].start);
+	}
+
+	return 0;
+}
+
+/*
+ * Message interface
+ */
+enum raid_msg_actions {
+	act_bw,			/* Recovery bandwidth switch. */
+	act_dev,		/* Device failure switch. */
+	act_overwrite,		/* Stripe overwrite check. */
+	act_stats,		/* Development statistics switch. */
+	act_sc,			/* Stripe cache switch. */
+
+	act_on,			/* Set entity on. */
+	act_off,		/* Set entity off. */
+	act_reset,		/* Reset entity. */
+
+	act_set = act_on,	/* Set # absolute. */
+	act_grow = act_off,	/* Grow # by an amount. */
+	act_shrink = act_reset,	/* Shrink # by an amount. */
+};
+
+/* Turn a delta into an absolute value. */
+static int _absolute(unsigned long action, int act, int r)
+{
+	/* Make delta absolute. */
+	if (test_bit(act_set, &action))
+		;
+	else if (test_bit(act_grow, &action))
+		r += act;
+	else if (test_bit(act_shrink, &action))
+		r = act - r;
+	else
+		r = -EINVAL;
+
+	return r;
+}
+
+ /* Change recovery io bandwidth. */
+static int bandwidth_change(struct dm_msg *msg, void *context)
+{
+	struct raid_set *rs = context;
+	int act = rs->recover.bandwidth;
+	int bandwidth = DM_MSG_INT_ARG(msg);
+
+	if (range_ok(bandwidth, BANDWIDTH_MIN, BANDWIDTH_MAX)) {
+		/* Make delta bandwidth absolute. */
+		bandwidth = _absolute(msg->action, act, bandwidth);
+
+		/* Check range. */
+		if (range_ok(bandwidth, BANDWIDTH_MIN, BANDWIDTH_MAX)) {
+			recover_set_bandwidth(rs, bandwidth);
+			return 0;
+		}
+	}
+
+	set_bit(dm_msg_ret_arg, &msg->ret);
+	set_bit(dm_msg_ret_inval, &msg->ret);
+	return -EINVAL;
+}
+
+/* Set/reset development feature flags. */
+static int devel_flags(struct dm_msg *msg, void *context)
+{
+	struct raid_set *rs = context;
+
+	if (test_bit(act_on, &msg->action))
+		return test_and_set_bit(msg->spec->parm,
+					&rs->io.flags) ? -EPERM : 0;
+	else if (test_bit(act_off, &msg->action))
+		return test_and_clear_bit(msg->spec->parm,
+					  &rs->io.flags) ? 0 : -EPERM;
+	else if (test_bit(act_reset, &msg->action)) {
+		if (test_bit(act_stats, &msg->action)) {
+			stats_reset(rs);
+			goto on;
+		} else if (test_bit(act_overwrite, &msg->action)) {
+on:
+			set_bit(msg->spec->parm, &rs->io.flags);
+			return 0;
+		}
+	}
+
+	return -EINVAL;
+}
+
+/* Resize the stripe cache. */
+static int sc_resize(struct dm_msg *msg, void *context)
+{
+	int act, stripes;
+	struct raid_set *rs = context;
+
+	/* Deny permission in case the daemon is still resizing!. */
+	if (atomic_read(&rs->sc.stripes_to_set))
+		return -EPERM;
+
+	stripes = DM_MSG_INT_ARG(msg);
+	if (stripes > 0) {
+		act = atomic_read(&rs->sc.stripes);
+
+		/* Make delta stripes absolute. */
+		stripes = _absolute(msg->action, act, stripes);
+
+		/*
+		 * Check range and that the # of stripes changes.
+		 * We leave the resizing to the wroker.
+		 */
+		if (range_ok(stripes, STRIPES_MIN, STRIPES_MAX) &&
+		    stripes != atomic_read(&rs->sc.stripes)) {
+			atomic_set(&rs->sc.stripes_to_set, stripes);
+			wake_do_raid(rs);
+			return 0;
+		}
+	}
+
+	set_bit(dm_msg_ret_arg, &msg->ret);
+	set_bit(dm_msg_ret_inval, &msg->ret);
+	return -EINVAL;
+}
+
+/* Parse the RAID message action. */
+/*
+ * 'ba[ndwidth] {se[t],g[row],sh[rink]} #'	# e.g 'ba se 50'
+ * "o[verwrite]  {on,of[f],r[eset]}'		# e.g. 'o of'
+ * 'sta[tistics] {on,of[f],r[eset]}'		# e.g. 'stat of'
+ * 'str[ipecache] {se[t],g[row],sh[rink]} #'	# e.g. 'stripe set 1024'
+ *
+ */
+static int raid_message(struct dm_target *ti, unsigned argc, char **argv)
+{
+	/* Variables to store the parsed parameters im. */
+	static int i[2];
+	static unsigned long *i_arg[] = {
+		(unsigned long *) i + 0,
+		(unsigned long *) i + 1,
+	};
+
+	/* Declare all message option strings. */
+	static char *str_sgs[] = { "set", "grow", "shrink" };
+	static char *str_oor[] = { "on", "off", "reset" };
+
+	/* Declare all actions. */
+	static unsigned long act_sgs[] = { act_set, act_grow, act_shrink };
+	static unsigned long act_oor[] = { act_on, act_off, act_reset };
+
+	/* Bandwidth option. */
+	static struct dm_message_option bw_opt = { 3, str_sgs, act_sgs };
+	static struct dm_message_argument bw_args = {
+		1, i_arg, { dm_msg_int_t }
+	};
+
+	static struct dm_message_argument null_args = {
+		0, NULL, { dm_msg_int_t }
+	};
+
+	/* Overwrite and statistics option. */
+	static struct dm_message_option ovr_stats_opt = { 3, str_oor, act_oor };
+
+	/* Sripecache option. */
+	static struct dm_message_option stripe_opt = { 3, str_sgs, act_sgs };
+
+	/* Declare messages. */
+	static struct dm_msg_spec specs[] = {
+		{ "bandwidth", act_bw, &bw_opt, &bw_args,
+		  0, bandwidth_change },
+		{ "overwrite", act_overwrite, &ovr_stats_opt, &null_args,
+		  RS_CHECK_OVERWRITE, devel_flags },
+		{ "statistics", act_stats, &ovr_stats_opt, &null_args,
+		  RS_DEVEL_STATS, devel_flags },
+		{ "stripecache", act_sc, &stripe_opt, &bw_args,
+		  0, sc_resize },
+	};
+
+	/* The message for the parser. */
+	struct dm_msg msg = {
+		.num_specs = ARRAY_SIZE(specs),
+		.specs = specs,
+	};
+
+	return dm_message_parse(TARGET, &msg, ti->private, argc, argv);
+}
+/*
+ * END message interface
+ */
+
+static struct target_type raid_target = {
+	.name = "raid45",
+	.version = {1, 0, 0},
+	.module = THIS_MODULE,
+	.ctr = raid_ctr,
+	.dtr = raid_dtr,
+	.map = raid_map,
+	.presuspend = raid_presuspend,
+	.postsuspend = raid_postsuspend,
+	.resume = raid_resume,
+	.status = raid_status,
+	.message = raid_message,
+};
+
+static void init_exit(const char *bad_msg, const char *good_msg, int r)
+{
+	if (r)
+		DMERR("Failed to %sregister target [%d]", bad_msg, r);
+	else
+		DMINFO("%s %s", good_msg, version);
+}
+
+static int __init dm_raid_init(void)
+{
+	int r = dm_register_target(&raid_target);
+
+	init_exit("", "initialized", r);
+	return r;
+}
+
+static void __exit dm_raid_exit(void)
+{
+	dm_unregister_target(&raid_target);
+	init_exit("un", "exit", 0);
+}
+
+/* Module hooks. */
+module_init(dm_raid_init);
+module_exit(dm_raid_exit);
+
+MODULE_DESCRIPTION(DM_NAME " raid4/5 target");
+MODULE_AUTHOR("Heinz Mauelshagen <hjm@redhat.com>");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("dm-raid4");
+MODULE_ALIAS("dm-raid5");
--- linux-mvl-dove-2.6.32.orig/ubuntu/dm-raid4-5/dm-message.c
+++ linux-mvl-dove-2.6.32/ubuntu/dm-raid4-5/dm-message.c
@@ -0,0 +1,183 @@
+/*
+ * Copyright (C) 2007,2008 Red Hat Inc. All rights reserved.
+ *
+ * Module Author: Heinz Mauelshagen <heinzm@redhat.com>
+ *
+ * General device-mapper message interface argument parser.
+ *
+ * This file is released under the GPL.
+ *
+ * device-mapper message parser.
+ *
+ */
+
+#include "dm.h"
+#include "dm-message.h"
+#include <linux/kernel.h>
+
+#define DM_MSG_PREFIX	"dm_message"
+
+/* Basename of a path. */
+static inline char *
+basename(char *s)
+{
+	char *p = strrchr(s, '/');
+
+	return p ? p + 1 : s;
+}
+
+/* Get an argument depending on type. */
+static void
+message_arguments(struct dm_msg *msg, int argc, char **argv)
+{
+
+	if (argc) {
+		int i;
+		struct dm_message_argument *args = msg->spec->args;
+
+		for (i = 0; i < args->num_args; i++) {
+			int r;
+			unsigned long **ptr = args->ptr;
+			enum dm_message_argument_type type = args->types[i];
+
+			switch (type) {
+			case dm_msg_base_t:
+				((char **) ptr)[i] = basename(argv[i]);
+				break;
+
+			case dm_msg_str_t:
+				((char **) ptr)[i] = argv[i];
+				break;
+
+			case dm_msg_int_t:
+				r = sscanf(argv[i], "%d", ((int **) ptr)[i]);
+				goto check;
+
+			case dm_msg_uint_t:
+				r = sscanf(argv[i], "%u",
+					   ((unsigned **) ptr)[i]);
+				goto check;
+
+			case dm_msg_uint64_t:
+				r = sscanf(argv[i], "%llu",
+					   ((unsigned long long **) ptr)[i]);
+
+check:
+				if (r != 1) {
+					set_bit(dm_msg_ret_undef, &msg->ret);
+					set_bit(dm_msg_ret_arg, &msg->ret);
+				}
+			}
+		}
+	}
+}
+
+/* Parse message options. */
+static void
+message_options_parse(struct dm_msg *msg, int argc, char **argv)
+{
+	int hit = 0;
+	unsigned long *action;
+	size_t l1 = strlen(*argv), l_hit = 0;
+	struct dm_message_option *o = msg->spec->options;
+	char **option, **option_end = o->options + o->num_options;
+
+	for (option = o->options, action = o->actions;
+	     option < option_end; option++, action++) {
+		size_t l2 = strlen(*option);
+
+		if (!strnicmp(*argv, *option, min(l1, l2))) {
+			hit++;
+			l_hit = l2;
+			set_bit(*action, &msg->action);
+		}
+	}
+
+	/* Assume error. */
+	msg->ret = 0;
+	set_bit(dm_msg_ret_option, &msg->ret);
+	if (!hit || l1 > l_hit)
+		set_bit(dm_msg_ret_undef, &msg->ret);	/* Undefined option. */
+	else if (hit > 1)
+		set_bit(dm_msg_ret_ambiguous, &msg->ret); /* Ambiguous option.*/
+	else {
+		clear_bit(dm_msg_ret_option, &msg->ret); /* Option OK. */
+		message_arguments(msg, --argc, ++argv);
+	}
+}
+
+static inline void
+print_ret(const char *caller, unsigned long ret)
+{
+	struct {
+		unsigned long err;
+		const char *err_str;
+	} static err_msg[] = {
+		{ dm_msg_ret_ambiguous, "message ambiguous" },
+		{ dm_msg_ret_inval, "message invalid" },
+		{ dm_msg_ret_undef, "message undefined" },
+		{ dm_msg_ret_arg, "message argument" },
+		{ dm_msg_ret_argcount, "message argument count" },
+		{ dm_msg_ret_option, "option" },
+	}, *e = ARRAY_END(err_msg);
+
+	while (e-- > err_msg) {
+		if (test_bit(e->err, &ret))
+			DMERR("%s %s", caller, e->err_str);
+	}
+}
+
+/* Parse a message action. */
+int
+dm_message_parse(const char *caller, struct dm_msg *msg, void *context,
+		 int argc, char **argv)
+{
+	int hit = 0;
+	size_t l1, l_hit = 0;
+	struct dm_msg_spec *s, *s_hit = NULL,
+			   *s_end = msg->specs + msg->num_specs;
+
+	if (argc < 2)
+		return -EINVAL;
+
+	l1 = strlen(*argv);
+	for (s = msg->specs; s < s_end; s++) {
+		size_t l2 = strlen(s->cmd);
+
+		if (!strnicmp(*argv, s->cmd, min(l1, l2))) {
+			hit++;
+			l_hit = l2;
+			s_hit = s;
+		}
+	}
+
+	msg->ret = 0;
+	if (!hit || l1 > l_hit)	/* No hit or message string too long. */
+		set_bit(dm_msg_ret_undef, &msg->ret);
+	else if (hit > 1)	/* Ambiguous message. */
+		set_bit(dm_msg_ret_ambiguous, &msg->ret);
+	else if (argc - 2 != s_hit->args->num_args) {
+		set_bit(dm_msg_ret_undef, &msg->ret);
+		set_bit(dm_msg_ret_argcount, &msg->ret);
+	}
+
+	if (msg->ret)
+		goto bad;
+
+	msg->action = 0;
+	msg->spec = s_hit;
+	set_bit(s_hit->action, &msg->action);
+	message_options_parse(msg, --argc, ++argv);
+
+	if (!msg->ret)
+		return msg->spec->f(msg, context);
+
+bad:
+	print_ret(caller, msg->ret);
+	return -EINVAL;
+}
+EXPORT_SYMBOL(dm_message_parse);
+
+MODULE_DESCRIPTION(DM_NAME " device-mapper target message parser");
+MODULE_AUTHOR("Heinz Mauelshagen <hjm@redhat.com>");
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/ubuntu/dm-raid4-5/Makefile
+++ linux-mvl-dove-2.6.32/ubuntu/dm-raid4-5/Makefile
@@ -0,0 +1,4 @@
+EXTRA_CFLAGS += -I$(srctree)/drivers/md
+
+obj-$(CONFIG_DM_RAID45) := dm-raid45.o
+dm-raid45-objs := dm-raid4-5.o dm-memcache.o dm-region-hash.o dm-message.o
--- linux-mvl-dove-2.6.32.orig/ubuntu/dm-raid4-5/dm-message.h
+++ linux-mvl-dove-2.6.32/ubuntu/dm-raid4-5/dm-message.h
@@ -0,0 +1,91 @@
+/*
+ * Copyright (C) 2007,2008 Red Hat, Inc. All rights reserved.
+ *
+ * Module Author: Heinz Mauelshagen <Mauelshagen@RedHat.de>
+ *
+ * General device-mapper message interface argument parser.
+ *
+ * This file is released under the GPL.
+ *
+ */
+
+#ifndef DM_MESSAGE_H
+#define DM_MESSAGE_H
+
+/* Factor out to dm.h. */
+/* Reference to array end. */
+#define ARRAY_END(a)    ((a) + ARRAY_SIZE(a))
+
+/* Message return bits. */
+enum dm_message_return {
+	dm_msg_ret_ambiguous,		/* Action ambiguous. */
+	dm_msg_ret_inval,		/* Action invalid. */
+	dm_msg_ret_undef,		/* Action undefined. */
+
+	dm_msg_ret_option,		/* Option error. */
+	dm_msg_ret_arg,			/* Argument error. */
+	dm_msg_ret_argcount,		/* Argument count error. */
+};
+
+/* Message argument type conversions. */
+enum dm_message_argument_type {
+	dm_msg_base_t,		/* Basename string. */
+	dm_msg_str_t,		/* String. */
+	dm_msg_int_t,		/* Signed int. */
+	dm_msg_uint_t,		/* Unsigned int. */
+	dm_msg_uint64_t,	/* Unsigned int 64. */
+};
+
+/* A message option. */
+struct dm_message_option {
+	unsigned num_options;
+	char **options;
+	unsigned long *actions;
+};
+
+/* Message arguments and types. */
+struct dm_message_argument {
+	unsigned num_args;
+	unsigned long **ptr;
+	enum dm_message_argument_type types[];
+};
+
+/* Client message. */
+struct dm_msg {
+	unsigned long action;		/* Identified action. */
+	unsigned long ret;		/* Return bits. */
+	unsigned num_specs;		/* # of sepcifications listed. */
+	struct dm_msg_spec *specs;	/* Specification list. */
+	struct dm_msg_spec *spec;	/* Specification selected. */
+};
+
+/* Secification of the message. */
+struct dm_msg_spec {
+	const char *cmd;	/* Name of the command (i.e. 'bandwidth'). */
+	unsigned long action;
+	struct dm_message_option *options;
+	struct dm_message_argument *args;
+	unsigned long parm;	/* Parameter to pass through to callback. */
+	/* Function to process for action. */
+	int (*f) (struct dm_msg *msg, void *context);
+};
+
+/* Parameter access macros. */
+#define	DM_MSG_PARM(msg) ((msg)->spec->parm)
+
+#define	DM_MSG_STR_ARGS(msg, idx) ((char *) *(msg)->spec->args->ptr[idx])
+#define	DM_MSG_INT_ARGS(msg, idx) ((int) *(msg)->spec->args->ptr[idx])
+#define	DM_MSG_UINT_ARGS(msg, idx) ((unsigned) DM_MSG_INT_ARG(msg, idx))
+#define	DM_MSG_UINT64_ARGS(msg, idx) ((uint64_t)  *(msg)->spec->args->ptr[idx])
+
+#define	DM_MSG_STR_ARG(msg)	DM_MSG_STR_ARGS(msg, 0)
+#define	DM_MSG_INT_ARG(msg)	DM_MSG_INT_ARGS(msg, 0)
+#define	DM_MSG_UINT_ARG(msg)	DM_MSG_UINT_ARGS(msg, 0)
+#define	DM_MSG_UINT64_ARG(msg)	DM_MSG_UINT64_ARGS(msg, 0)
+
+
+/* Parse a message and its options and optionally call a function back. */
+int dm_message_parse(const char *caller, struct dm_msg *msg, void *context,
+		     int argc, char **argv);
+
+#endif
--- linux-mvl-dove-2.6.32.orig/ubuntu/dm-raid4-5/dm-memcache.c
+++ linux-mvl-dove-2.6.32/ubuntu/dm-raid4-5/dm-memcache.c
@@ -0,0 +1,301 @@
+/*
+ * Copyright (C) 2006-2008 Red Hat, Inc. All rights reserved.
+ *
+ * Module Author: Heinz Mauelshagen <heinzm@redhat.com>
+ *
+ * Device-mapper memory object handling:
+ *
+ * o allocate/free total_pages in a per client page pool.
+ *
+ * o allocate/free memory objects with chunks (1..n) of
+ *   pages_per_chunk pages hanging off.
+ *
+ * This file is released under the GPL.
+ */
+
+#define	DM_MEM_CACHE_VERSION	"0.2"
+
+#include "dm.h"
+#include "dm-memcache.h"
+#include <linux/dm-io.h>
+
+struct dm_mem_cache_client {
+	spinlock_t lock;
+	mempool_t *objs_pool;
+	struct page_list *free_list;
+	unsigned objects;
+	unsigned chunks;
+	unsigned pages_per_chunk;
+	unsigned free_pages;
+	unsigned total_pages;
+};
+
+/*
+ * Free pages and page_list elements of client.
+ */
+static void free_cache_pages(struct page_list *list)
+{
+	while (list) {
+		struct page_list *pl = list;
+
+		list = pl->next;
+		BUG_ON(!pl->page);
+		__free_page(pl->page);
+		kfree(pl);
+	}
+}
+
+/*
+ * Alloc number of pages and page_list elements as required by client.
+ */
+static struct page_list *alloc_cache_pages(unsigned pages)
+{
+	struct page_list *pl, *ret = NULL;
+	struct page *page;
+
+	while (pages--) {
+		page = alloc_page(GFP_NOIO);
+		if (!page)
+			goto err;
+
+		pl = kmalloc(sizeof(*pl), GFP_NOIO);
+		if (!pl) {
+			__free_page(page);
+			goto err;
+		}
+
+		pl->page = page;
+		pl->next = ret;
+		ret = pl;
+	}
+
+	return ret;
+
+err:
+	free_cache_pages(ret);
+	return NULL;
+}
+
+/*
+ * Allocate page_list elements from the pool to chunks of the memory object.
+ */
+static void alloc_chunks(struct dm_mem_cache_client *cl,
+			 struct dm_mem_cache_object *obj)
+{
+	unsigned chunks = cl->chunks;
+	unsigned long flags;
+
+	local_irq_save(flags);
+	local_irq_disable();
+	while (chunks--) {
+		unsigned p = cl->pages_per_chunk;
+
+		obj[chunks].pl = NULL;
+
+		while (p--) {
+			struct page_list *pl;
+
+			/* Take next element from free list */
+			spin_lock(&cl->lock);
+			pl = cl->free_list;
+			BUG_ON(!pl);
+			cl->free_list = pl->next;
+			spin_unlock(&cl->lock);
+
+			pl->next = obj[chunks].pl;
+			obj[chunks].pl = pl;
+		}
+	}
+
+	local_irq_restore(flags);
+}
+
+/*
+ * Free page_list elements putting them back onto free list
+ */
+static void free_chunks(struct dm_mem_cache_client *cl,
+			struct dm_mem_cache_object *obj)
+{
+	unsigned chunks = cl->chunks;
+	unsigned long flags;
+	struct page_list *next, *pl;
+
+	local_irq_save(flags);
+	local_irq_disable();
+	while (chunks--) {
+		for (pl = obj[chunks].pl; pl; pl = next) {
+			next = pl->next;
+
+			spin_lock(&cl->lock);
+			pl->next = cl->free_list;
+			cl->free_list = pl;
+			cl->free_pages++;
+			spin_unlock(&cl->lock);
+		}
+	}
+
+	local_irq_restore(flags);
+}
+
+/*
+ * Create/destroy dm memory cache client resources.
+ */
+struct dm_mem_cache_client *
+dm_mem_cache_client_create(unsigned objects, unsigned chunks,
+			   unsigned pages_per_chunk)
+{
+	unsigned total_pages = objects * chunks * pages_per_chunk;
+	struct dm_mem_cache_client *client;
+
+	BUG_ON(!total_pages);
+	client = kzalloc(sizeof(*client), GFP_KERNEL);
+	if (!client)
+		return ERR_PTR(-ENOMEM);
+
+	client->objs_pool = mempool_create_kmalloc_pool(objects,
+				chunks * sizeof(struct dm_mem_cache_object));
+	if (!client->objs_pool)
+		goto err;
+
+	client->free_list = alloc_cache_pages(total_pages);
+	if (!client->free_list)
+		goto err1;
+
+	spin_lock_init(&client->lock);
+	client->objects = objects;
+	client->chunks = chunks;
+	client->pages_per_chunk = pages_per_chunk;
+	client->free_pages = client->total_pages = total_pages;
+	return client;
+
+err1:
+	mempool_destroy(client->objs_pool);
+err:
+	kfree(client);
+	return ERR_PTR(-ENOMEM);
+}
+EXPORT_SYMBOL(dm_mem_cache_client_create);
+
+void dm_mem_cache_client_destroy(struct dm_mem_cache_client *cl)
+{
+	BUG_ON(cl->free_pages != cl->total_pages);
+	free_cache_pages(cl->free_list);
+	mempool_destroy(cl->objs_pool);
+	kfree(cl);
+}
+EXPORT_SYMBOL(dm_mem_cache_client_destroy);
+
+/*
+ * Grow a clients cache by an amount of pages.
+ *
+ * Don't call from interrupt context!
+ */
+int dm_mem_cache_grow(struct dm_mem_cache_client *cl, unsigned objects)
+{
+	unsigned pages = objects * cl->chunks * cl->pages_per_chunk;
+	struct page_list *pl, *last;
+
+	BUG_ON(!pages);
+	pl = alloc_cache_pages(pages);
+	if (!pl)
+		return -ENOMEM;
+
+	last = pl;
+	while (last->next)
+		last = last->next;
+
+	spin_lock_irq(&cl->lock);
+	last->next = cl->free_list;
+	cl->free_list = pl;
+	cl->free_pages += pages;
+	cl->total_pages += pages;
+	cl->objects++;
+	spin_unlock_irq(&cl->lock);
+
+	mempool_resize(cl->objs_pool, cl->objects, GFP_NOIO);
+	return 0;
+}
+EXPORT_SYMBOL(dm_mem_cache_grow);
+
+/* Shrink a clients cache by an amount of pages */
+int dm_mem_cache_shrink(struct dm_mem_cache_client *cl, unsigned objects)
+{
+	int r;
+	unsigned pages = objects * cl->chunks * cl->pages_per_chunk, p = pages;
+	unsigned long flags;
+	struct page_list *last = NULL, *pl, *pos;
+
+	BUG_ON(!pages);
+
+	spin_lock_irqsave(&cl->lock, flags);
+	pl = pos = cl->free_list;
+	while (p-- && pos->next) {
+		last = pos;
+		pos = pos->next;
+	}
+
+	if (++p)
+		r = -ENOMEM;
+	else {
+		r = 0;
+		cl->free_list = pos;
+		cl->free_pages -= pages;
+		cl->total_pages -= pages;
+		cl->objects--;
+		last->next = NULL;
+	}
+	spin_unlock_irqrestore(&cl->lock, flags);
+
+	if (!r) {
+		free_cache_pages(pl);
+		mempool_resize(cl->objs_pool, cl->objects, GFP_NOIO);
+	}
+
+	return r;
+}
+EXPORT_SYMBOL(dm_mem_cache_shrink);
+
+/*
+ * Allocate/free a memory object
+ *
+ * Can be called from interrupt context
+ */
+struct dm_mem_cache_object *dm_mem_cache_alloc(struct dm_mem_cache_client *cl)
+{
+	int r = 0;
+	unsigned pages = cl->chunks * cl->pages_per_chunk;
+	unsigned long flags;
+	struct dm_mem_cache_object *obj;
+
+	obj = mempool_alloc(cl->objs_pool, GFP_NOIO);
+	if (!obj)
+		return ERR_PTR(-ENOMEM);
+
+	spin_lock_irqsave(&cl->lock, flags);
+	if (pages > cl->free_pages)
+		r = -ENOMEM;
+	else
+		cl->free_pages -= pages;
+	spin_unlock_irqrestore(&cl->lock, flags);
+
+	if (r) {
+		mempool_free(obj, cl->objs_pool);
+		return ERR_PTR(r);
+	}
+
+	alloc_chunks(cl, obj);
+	return obj;
+}
+EXPORT_SYMBOL(dm_mem_cache_alloc);
+
+void dm_mem_cache_free(struct dm_mem_cache_client *cl,
+		       struct dm_mem_cache_object *obj)
+{
+	free_chunks(cl, obj);
+	mempool_free(obj, cl->objs_pool);
+}
+EXPORT_SYMBOL(dm_mem_cache_free);
+
+MODULE_DESCRIPTION(DM_NAME " dm memory cache");
+MODULE_AUTHOR("Heinz Mauelshagen <hjm@redhat.com>");
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/ubuntu/dm-raid4-5/dm-region-hash.c
+++ linux-mvl-dove-2.6.32/ubuntu/dm-raid4-5/dm-region-hash.c
@@ -0,0 +1,718 @@
+/*
+ * Copyright (C) 2003 Sistina Software Limited.
+ * Copyright (C) 2004-2008 Red Hat, Inc. All rights reserved.
+ *
+ * This file is released under the GPL.
+ */
+
+#include <linux/dm-dirty-log.h>
+#include "dm-region-hash.h"
+
+#include <linux/ctype.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/vmalloc.h>
+
+#include "dm.h"
+
+#define	DM_MSG_PREFIX	"region hash"
+
+/*-----------------------------------------------------------------
+ * Region hash
+ *
+ * The mirror splits itself up into discrete regions.  Each
+ * region can be in one of three states: clean, dirty,
+ * nosync.  There is no need to put clean regions in the hash.
+ *
+ * In addition to being present in the hash table a region _may_
+ * be present on one of three lists.
+ *
+ *   clean_regions: Regions on this list have no io pending to
+ *   them, they are in sync, we are no longer interested in them,
+ *   they are dull.  dm_rh_update_states() will remove them from the
+ *   hash table.
+ *
+ *   quiesced_regions: These regions have been spun down, ready
+ *   for recovery.  rh_recovery_start() will remove regions from
+ *   this list and hand them to kmirrord, which will schedule the
+ *   recovery io with kcopyd.
+ *
+ *   recovered_regions: Regions that kcopyd has successfully
+ *   recovered.  dm_rh_update_states() will now schedule any delayed
+ *   io, up the recovery_count, and remove the region from the
+ *   hash.
+ *
+ * There are 2 locks:
+ *   A rw spin lock 'hash_lock' protects just the hash table,
+ *   this is never held in write mode from interrupt context,
+ *   which I believe means that we only have to disable irqs when
+ *   doing a write lock.
+ *
+ *   An ordinary spin lock 'region_lock' that protects the three
+ *   lists in the region_hash, with the 'state', 'list' and
+ *   'delayed_bios' fields of the regions.  This is used from irq
+ *   context, so all other uses will have to suspend local irqs.
+ *---------------------------------------------------------------*/
+struct dm_region_hash {
+	uint32_t region_size;
+	unsigned region_shift;
+
+	/* holds persistent region state */
+	struct dm_dirty_log *log;
+
+	/* hash table */
+	rwlock_t hash_lock;
+	mempool_t *region_pool;
+	unsigned mask;
+	unsigned nr_buckets;
+	unsigned prime;
+	unsigned shift;
+	struct list_head *buckets;
+
+	unsigned max_recovery; /* Max # of regions to recover in parallel */
+
+	spinlock_t region_lock;
+	atomic_t recovery_in_flight;
+	struct semaphore recovery_count;
+	struct list_head clean_regions;
+	struct list_head quiesced_regions;
+	struct list_head recovered_regions;
+	struct list_head failed_recovered_regions;
+
+	void *context;
+	sector_t target_begin;
+
+	/* Callback function to schedule bios writes */
+	void (*dispatch_bios)(void *context, struct bio_list *bios);
+
+	/* Callback function to wakeup callers worker thread. */
+	void (*wakeup_workers)(void *context);
+
+	/* Callback function to wakeup callers recovery waiters. */
+	void (*wakeup_all_recovery_waiters)(void *context);
+};
+
+struct dm_region {
+	struct dm_region_hash *rh;	/* FIXME: can we get rid of this ? */
+	region_t key;
+	int state;
+
+	struct list_head hash_list;
+	struct list_head list;
+
+	atomic_t pending;
+	struct bio_list delayed_bios;
+};
+
+/*
+ * Conversion fns
+ */
+region_t dm_rh_sector_to_region(struct dm_region_hash *rh, sector_t sector)
+{
+	return sector >> rh->region_shift;
+}
+// EXPORT_SYMBOL_GPL(dm_rh_sector_to_region);
+
+sector_t dm_rh_region_to_sector(struct dm_region_hash *rh, region_t region)
+{
+	return region << rh->region_shift;
+}
+// EXPORT_SYMBOL_GPL(dm_rh_region_to_sector);
+
+region_t dm_rh_bio_to_region(struct dm_region_hash *rh, struct bio *bio)
+{
+	return dm_rh_sector_to_region(rh, bio->bi_sector - rh->target_begin);
+}
+// EXPORT_SYMBOL_GPL(dm_rh_bio_to_region);
+
+void *dm_rh_region_context(struct dm_region *reg)
+{
+	return reg->rh->context;
+}
+// EXPORT_SYMBOL_GPL(dm_rh_region_context);
+
+region_t dm_rh_get_region_key(struct dm_region *reg)
+{
+	return reg->key;
+}
+// EXPORT_SYMBOL_GPL(dm_rh_get_region_key);
+
+sector_t dm_rh_get_region_size(struct dm_region_hash *rh)
+{
+	return rh->region_size;
+}
+// EXPORT_SYMBOL_GPL(dm_rh_get_region_size);
+
+/*
+ * FIXME: shall we pass in a structure instead of all these args to
+ * dm_region_hash_create()????
+ */
+#define RH_HASH_MULT 2654435387U
+#define RH_HASH_SHIFT 12
+
+#define MIN_REGIONS 64
+struct dm_region_hash *dm_region_hash_create(
+		void *context, void (*dispatch_bios)(void *context,
+						     struct bio_list *bios),
+		void (*wakeup_workers)(void *context),
+		void (*wakeup_all_recovery_waiters)(void *context),
+		sector_t target_begin, unsigned max_recovery,
+		struct dm_dirty_log *log, uint32_t region_size,
+		region_t nr_regions)
+{
+	struct dm_region_hash *rh;
+	unsigned nr_buckets, max_buckets;
+	size_t i;
+
+	/*
+	 * Calculate a suitable number of buckets for our hash
+	 * table.
+	 */
+	max_buckets = nr_regions >> 6;
+	for (nr_buckets = 128u; nr_buckets < max_buckets; nr_buckets <<= 1)
+		;
+	nr_buckets >>= 1;
+
+	rh = kmalloc(sizeof(*rh), GFP_KERNEL);
+	if (!rh) {
+		DMERR("unable to allocate region hash memory");
+		return ERR_PTR(-ENOMEM);
+	}
+
+	rh->context = context;
+	rh->dispatch_bios = dispatch_bios;
+	rh->wakeup_workers = wakeup_workers;
+	rh->wakeup_all_recovery_waiters = wakeup_all_recovery_waiters;
+	rh->target_begin = target_begin;
+	rh->max_recovery = max_recovery;
+	rh->log = log;
+	rh->region_size = region_size;
+	rh->region_shift = ffs(region_size) - 1;
+	rwlock_init(&rh->hash_lock);
+	rh->mask = nr_buckets - 1;
+	rh->nr_buckets = nr_buckets;
+
+	rh->shift = RH_HASH_SHIFT;
+	rh->prime = RH_HASH_MULT;
+
+	rh->buckets = vmalloc(nr_buckets * sizeof(*rh->buckets));
+	if (!rh->buckets) {
+		DMERR("unable to allocate region hash bucket memory");
+		kfree(rh);
+		return ERR_PTR(-ENOMEM);
+	}
+
+	for (i = 0; i < nr_buckets; i++)
+		INIT_LIST_HEAD(rh->buckets + i);
+
+	spin_lock_init(&rh->region_lock);
+	sema_init(&rh->recovery_count, 0);
+	atomic_set(&rh->recovery_in_flight, 0);
+	INIT_LIST_HEAD(&rh->clean_regions);
+	INIT_LIST_HEAD(&rh->quiesced_regions);
+	INIT_LIST_HEAD(&rh->recovered_regions);
+	INIT_LIST_HEAD(&rh->failed_recovered_regions);
+
+	rh->region_pool = mempool_create_kmalloc_pool(MIN_REGIONS,
+						      sizeof(struct dm_region));
+	if (!rh->region_pool) {
+		vfree(rh->buckets);
+		kfree(rh);
+		rh = ERR_PTR(-ENOMEM);
+	}
+
+	return rh;
+}
+// EXPORT_SYMBOL_GPL(dm_region_hash_create);
+
+void dm_region_hash_destroy(struct dm_region_hash *rh)
+{
+	unsigned h;
+	struct dm_region *reg, *nreg;
+
+	BUG_ON(!list_empty(&rh->quiesced_regions));
+	for (h = 0; h < rh->nr_buckets; h++) {
+		list_for_each_entry_safe(reg, nreg, rh->buckets + h,
+					 hash_list) {
+			BUG_ON(atomic_read(&reg->pending));
+			mempool_free(reg, rh->region_pool);
+		}
+	}
+
+	if (rh->log)
+		dm_dirty_log_destroy(rh->log);
+
+	if (rh->region_pool)
+		mempool_destroy(rh->region_pool);
+
+	vfree(rh->buckets);
+	kfree(rh);
+}
+// EXPORT_SYMBOL_GPL(dm_region_hash_destroy);
+
+struct dm_dirty_log *dm_rh_dirty_log(struct dm_region_hash *rh)
+{
+	return rh->log;
+}
+// EXPORT_SYMBOL_GPL(dm_rh_dirty_log);
+
+static unsigned rh_hash(struct dm_region_hash *rh, region_t region)
+{
+	return (unsigned) ((region * rh->prime) >> rh->shift) & rh->mask;
+}
+
+static struct dm_region *__rh_lookup(struct dm_region_hash *rh, region_t region)
+{
+	struct dm_region *reg;
+	struct list_head *bucket = rh->buckets + rh_hash(rh, region);
+
+	list_for_each_entry(reg, bucket, hash_list)
+		if (reg->key == region)
+			return reg;
+
+	return NULL;
+}
+
+static void __rh_insert(struct dm_region_hash *rh, struct dm_region *reg)
+{
+	list_add(&reg->hash_list, rh->buckets + rh_hash(rh, reg->key));
+}
+
+static struct dm_region *__rh_alloc(struct dm_region_hash *rh, region_t region)
+{
+	struct dm_region *reg, *nreg;
+
+	nreg = mempool_alloc(rh->region_pool, GFP_ATOMIC);
+	if (unlikely(!nreg))
+		nreg = kmalloc(sizeof(*nreg), GFP_NOIO | __GFP_NOFAIL);
+
+	nreg->state = rh->log->type->in_sync(rh->log, region, 1) ?
+		      DM_RH_CLEAN : DM_RH_NOSYNC;
+	nreg->rh = rh;
+	nreg->key = region;
+	INIT_LIST_HEAD(&nreg->list);
+	atomic_set(&nreg->pending, 0);
+	bio_list_init(&nreg->delayed_bios);
+
+	write_lock_irq(&rh->hash_lock);
+	reg = __rh_lookup(rh, region);
+	if (reg)
+		/* We lost the race. */
+		mempool_free(nreg, rh->region_pool);
+	else {
+		__rh_insert(rh, nreg);
+		if (nreg->state == DM_RH_CLEAN) {
+			spin_lock(&rh->region_lock);
+			list_add(&nreg->list, &rh->clean_regions);
+			spin_unlock(&rh->region_lock);
+		}
+
+		reg = nreg;
+	}
+	write_unlock_irq(&rh->hash_lock);
+
+	return reg;
+}
+
+static struct dm_region *__rh_find(struct dm_region_hash *rh, region_t region)
+{
+	struct dm_region *reg;
+
+	reg = __rh_lookup(rh, region);
+	if (!reg) {
+		read_unlock(&rh->hash_lock);
+		reg = __rh_alloc(rh, region);
+		read_lock(&rh->hash_lock);
+	}
+
+	return reg;
+}
+
+int dm_rh_get_state(struct dm_region_hash *rh, region_t region, int may_block)
+{
+	int r;
+	struct dm_region *reg;
+
+	read_lock(&rh->hash_lock);
+	reg = __rh_lookup(rh, region);
+	read_unlock(&rh->hash_lock);
+
+	if (reg)
+		return reg->state;
+
+	/*
+	 * The region wasn't in the hash, so we fall back to the
+	 * dirty log.
+	 */
+	r = rh->log->type->in_sync(rh->log, region, may_block);
+
+	/*
+	 * Any error from the dirty log (eg. -EWOULDBLOCK) gets
+	 * taken as a DM_RH_NOSYNC
+	 */
+	return r == 1 ? DM_RH_CLEAN : DM_RH_NOSYNC;
+}
+// EXPORT_SYMBOL_GPL(dm_rh_get_state);
+
+static void complete_resync_work(struct dm_region *reg, int success)
+{
+	struct dm_region_hash *rh = reg->rh;
+
+	rh->log->type->set_region_sync(rh->log, reg->key, success);
+
+	/*
+	 * Dispatch the bios before we call 'wake_up_all'.
+	 * This is important because if we are suspending,
+	 * we want to know that recovery is complete and
+	 * the work queue is flushed.  If we wake_up_all
+	 * before we dispatch_bios (queue bios and call wake()),
+	 * then we risk suspending before the work queue
+	 * has been properly flushed.
+	 */
+	rh->dispatch_bios(rh->context, &reg->delayed_bios);
+	if (atomic_dec_and_test(&rh->recovery_in_flight))
+		rh->wakeup_all_recovery_waiters(rh->context);
+	up(&rh->recovery_count);
+}
+
+/* dm_rh_mark_nosync
+ * @ms
+ * @bio
+ * @done
+ * @error
+ *
+ * The bio was written on some mirror(s) but failed on other mirror(s).
+ * We can successfully endio the bio but should avoid the region being
+ * marked clean by setting the state DM_RH_NOSYNC.
+ *
+ * This function is _not_ safe in interrupt context!
+ */
+void dm_rh_mark_nosync(struct dm_region_hash *rh,
+		       struct bio *bio, unsigned done, int error)
+{
+	unsigned long flags;
+	struct dm_dirty_log *log = rh->log;
+	struct dm_region *reg;
+	region_t region = dm_rh_bio_to_region(rh, bio);
+	int recovering = 0;
+
+	/* We must inform the log that the sync count has changed. */
+	log->type->set_region_sync(log, region, 0);
+
+	read_lock(&rh->hash_lock);
+	reg = __rh_find(rh, region);
+	read_unlock(&rh->hash_lock);
+
+	/* region hash entry should exist because write was in-flight */
+	BUG_ON(!reg);
+	BUG_ON(!list_empty(&reg->list));
+
+	spin_lock_irqsave(&rh->region_lock, flags);
+	/*
+	 * Possible cases:
+	 *   1) DM_RH_DIRTY
+	 *   2) DM_RH_NOSYNC: was dirty, other preceeding writes failed
+	 *   3) DM_RH_RECOVERING: flushing pending writes
+	 * Either case, the region should have not been connected to list.
+	 */
+	recovering = (reg->state == DM_RH_RECOVERING);
+	reg->state = DM_RH_NOSYNC;
+	BUG_ON(!list_empty(&reg->list));
+	spin_unlock_irqrestore(&rh->region_lock, flags);
+
+	bio_endio(bio, error);
+	if (recovering)
+		complete_resync_work(reg, 0);
+}
+// EXPORT_SYMBOL_GPL(dm_rh_mark_nosync);
+
+void dm_rh_update_states(struct dm_region_hash *rh, int errors_handled)
+{
+	struct dm_region *reg, *next;
+
+	LIST_HEAD(clean);
+	LIST_HEAD(recovered);
+	LIST_HEAD(failed_recovered);
+
+	/*
+	 * Quickly grab the lists.
+	 */
+	write_lock_irq(&rh->hash_lock);
+	spin_lock(&rh->region_lock);
+	if (!list_empty(&rh->clean_regions)) {
+		list_splice_init(&rh->clean_regions, &clean);
+
+		list_for_each_entry(reg, &clean, list)
+			list_del(&reg->hash_list);
+	}
+
+	if (!list_empty(&rh->recovered_regions)) {
+		list_splice_init(&rh->recovered_regions, &recovered);
+
+		list_for_each_entry(reg, &recovered, list)
+			list_del(&reg->hash_list);
+	}
+
+	if (!list_empty(&rh->failed_recovered_regions)) {
+		list_splice_init(&rh->failed_recovered_regions,
+				 &failed_recovered);
+
+		list_for_each_entry(reg, &failed_recovered, list)
+			list_del(&reg->hash_list);
+	}
+
+	spin_unlock(&rh->region_lock);
+	write_unlock_irq(&rh->hash_lock);
+
+	/*
+	 * All the regions on the recovered and clean lists have
+	 * now been pulled out of the system, so no need to do
+	 * any more locking.
+	 */
+	list_for_each_entry_safe(reg, next, &recovered, list) {
+		rh->log->type->clear_region(rh->log, reg->key);
+		complete_resync_work(reg, 1);
+		mempool_free(reg, rh->region_pool);
+	}
+
+	list_for_each_entry_safe(reg, next, &failed_recovered, list) {
+		complete_resync_work(reg, errors_handled ? 0 : 1);
+		mempool_free(reg, rh->region_pool);
+	}
+
+	list_for_each_entry_safe(reg, next, &clean, list) {
+		rh->log->type->clear_region(rh->log, reg->key);
+		mempool_free(reg, rh->region_pool);
+	}
+
+	rh->log->type->flush(rh->log);
+}
+// EXPORT_SYMBOL_GPL(dm_rh_update_states);
+
+void dm_rh_inc(struct dm_region_hash *rh, region_t region)
+{
+	struct dm_region *reg;
+
+	read_lock(&rh->hash_lock);
+	reg = __rh_find(rh, region);
+
+	spin_lock_irq(&rh->region_lock);
+	atomic_inc(&reg->pending);
+
+	if (reg->state == DM_RH_CLEAN) {
+		reg->state = DM_RH_DIRTY;
+		list_del_init(&reg->list);	/* take off the clean list */
+		spin_unlock_irq(&rh->region_lock);
+
+		rh->log->type->mark_region(rh->log, reg->key);
+	} else
+		spin_unlock_irq(&rh->region_lock);
+
+
+	read_unlock(&rh->hash_lock);
+}
+// EXPORT_SYMBOL_GPL(dm_rh_inc);
+
+void dm_rh_inc_pending(struct dm_region_hash *rh, struct bio_list *bios)
+{
+	struct bio *bio;
+
+	for (bio = bios->head; bio; bio = bio->bi_next)
+		dm_rh_inc(rh, dm_rh_bio_to_region(rh, bio));
+}
+// EXPORT_SYMBOL_GPL(dm_rh_inc_pending);
+
+void dm_rh_dec(struct dm_region_hash *rh, region_t region)
+{
+	unsigned long flags;
+	struct dm_region *reg;
+	int should_wake = 0;
+
+	read_lock(&rh->hash_lock);
+	reg = __rh_lookup(rh, region);
+	read_unlock(&rh->hash_lock);
+
+	spin_lock_irqsave(&rh->region_lock, flags);
+	if (atomic_dec_and_test(&reg->pending)) {
+		/*
+		 * There is no pending I/O for this region.
+		 * We can move the region to corresponding list for next action.
+		 * At this point, the region is not yet connected to any list.
+		 *
+		 * If the state is DM_RH_NOSYNC, the region should be kept off
+		 * from clean list.
+		 * The hash entry for DM_RH_NOSYNC will remain in memory
+		 * until the region is recovered or the map is reloaded.
+		 */
+
+		/* do nothing for DM_RH_NOSYNC */
+		if (reg->state == DM_RH_RECOVERING) {
+			list_add_tail(&reg->list, &rh->quiesced_regions);
+		} else if (reg->state == DM_RH_DIRTY) {
+			reg->state = DM_RH_CLEAN;
+			list_add(&reg->list, &rh->clean_regions);
+		}
+		should_wake = 1;
+	}
+	spin_unlock_irqrestore(&rh->region_lock, flags);
+
+	if (should_wake)
+		rh->wakeup_workers(rh->context);
+}
+// EXPORT_SYMBOL_GPL(dm_rh_dec);
+
+/*
+ * Starts quiescing a region in preparation for recovery.
+ */
+static int __rh_recovery_prepare(struct dm_region_hash *rh)
+{
+	int r;
+	region_t region;
+	struct dm_region *reg;
+
+	/*
+	 * Ask the dirty log what's next.
+	 */
+	r = rh->log->type->get_resync_work(rh->log, &region);
+	if (r <= 0)
+		return r;
+
+	/*
+	 * Get this region, and start it quiescing by setting the
+	 * recovering flag.
+	 */
+	read_lock(&rh->hash_lock);
+	reg = __rh_find(rh, region);
+	read_unlock(&rh->hash_lock);
+
+	spin_lock_irq(&rh->region_lock);
+	reg->state = DM_RH_RECOVERING;
+
+	/* Already quiesced ? */
+	if (atomic_read(&reg->pending))
+		list_del_init(&reg->list);
+	else
+		list_move(&reg->list, &rh->quiesced_regions);
+
+	spin_unlock_irq(&rh->region_lock);
+
+	return 1;
+}
+
+void dm_rh_recovery_prepare(struct dm_region_hash *rh)
+{
+	/* Extra reference to avoid race with dm_rh_stop_recovery */
+	atomic_inc(&rh->recovery_in_flight);
+
+	while (!down_trylock(&rh->recovery_count)) {
+		atomic_inc(&rh->recovery_in_flight);
+		if (__rh_recovery_prepare(rh) <= 0) {
+			atomic_dec(&rh->recovery_in_flight);
+			up(&rh->recovery_count);
+			break;
+		}
+	}
+
+	/* Drop the extra reference */
+	if (atomic_dec_and_test(&rh->recovery_in_flight))
+		rh->wakeup_all_recovery_waiters(rh->context);
+}
+// EXPORT_SYMBOL_GPL(dm_rh_recovery_prepare);
+
+/*
+ * Returns any quiesced regions.
+ */
+struct dm_region *dm_rh_recovery_start(struct dm_region_hash *rh)
+{
+	struct dm_region *reg = NULL;
+
+	spin_lock_irq(&rh->region_lock);
+	if (!list_empty(&rh->quiesced_regions)) {
+		reg = list_entry(rh->quiesced_regions.next,
+				 struct dm_region, list);
+		list_del_init(&reg->list);  /* remove from the quiesced list */
+	}
+	spin_unlock_irq(&rh->region_lock);
+
+	return reg;
+}
+// EXPORT_SYMBOL_GPL(dm_rh_recovery_start);
+
+void dm_rh_recovery_end(struct dm_region *reg, int success)
+{
+	struct dm_region_hash *rh = reg->rh;
+
+	spin_lock_irq(&rh->region_lock);
+	if (success)
+		list_add(&reg->list, &reg->rh->recovered_regions);
+	else {
+		reg->state = DM_RH_NOSYNC;
+		list_add(&reg->list, &reg->rh->failed_recovered_regions);
+	}
+	spin_unlock_irq(&rh->region_lock);
+
+	rh->wakeup_workers(rh->context);
+}
+// EXPORT_SYMBOL_GPL(dm_rh_recovery_end);
+
+/* Return recovery in flight count. */
+int dm_rh_recovery_in_flight(struct dm_region_hash *rh)
+{
+	return atomic_read(&rh->recovery_in_flight);
+}
+// EXPORT_SYMBOL_GPL(dm_rh_recovery_in_flight);
+
+int dm_rh_flush(struct dm_region_hash *rh)
+{
+	return rh->log->type->flush(rh->log);
+}
+// EXPORT_SYMBOL_GPL(dm_rh_flush);
+
+void dm_rh_delay(struct dm_region_hash *rh, struct bio *bio)
+{
+	struct dm_region *reg;
+
+	read_lock(&rh->hash_lock);
+	reg = __rh_find(rh, dm_rh_bio_to_region(rh, bio));
+	bio_list_add(&reg->delayed_bios, bio);
+	read_unlock(&rh->hash_lock);
+}
+// EXPORT_SYMBOL_GPL(dm_rh_delay);
+
+void dm_rh_delay_by_region(struct dm_region_hash *rh,
+			   struct bio *bio, region_t region)
+{
+	struct dm_region *reg;
+
+	/* FIXME: locking. */
+	read_lock(&rh->hash_lock);
+	reg = __rh_find(rh, region);
+	bio_list_add(&reg->delayed_bios, bio);
+	read_unlock(&rh->hash_lock);
+}
+// EXPORT_SYMBOL_GPL(dm_rh_delay_by_region);
+
+void dm_rh_stop_recovery(struct dm_region_hash *rh)
+{
+	int i;
+
+	/* wait for any recovering regions */
+	for (i = 0; i < rh->max_recovery; i++)
+		down(&rh->recovery_count);
+}
+// EXPORT_SYMBOL_GPL(dm_rh_stop_recovery);
+
+void dm_rh_start_recovery(struct dm_region_hash *rh)
+{
+	int i;
+
+	for (i = 0; i < rh->max_recovery; i++)
+		up(&rh->recovery_count);
+
+	rh->wakeup_workers(rh->context);
+}
+// EXPORT_SYMBOL_GPL(dm_rh_start_recovery);
+
+MODULE_DESCRIPTION(DM_NAME " region hash");
+MODULE_AUTHOR("Joe Thornber/Heinz Mauelshagen <dm-devel@redhat.com>");
+MODULE_LICENSE("GPL");
--- linux-mvl-dove-2.6.32.orig/security/Kconfig
+++ linux-mvl-dove-2.6.32/security/Kconfig
@@ -162,8 +162,46 @@
 source security/selinux/Kconfig
 source security/smack/Kconfig
 source security/tomoyo/Kconfig
+source security/apparmor/Kconfig
 
 source security/integrity/ima/Kconfig
 
+choice
+	prompt "Default security module"
+	default DEFAULT_SECURITY_SELINUX if SECURITY_SELINUX
+	default DEFAULT_SECURITY_SMACK if SECURITY_SMACK
+	default DEFAULT_SECURITY_TOMOYO if SECURITY_TOMOYO
+	default DEFAULT_SECURITY_APPARMOR if SECURITY_APPARMOR
+	default DEFAULT_SECURITY_DAC
+
+	help
+	  Select the security module that will be used by default if the
+	  kernel parameter security= is not specified.
+
+	config DEFAULT_SECURITY_SELINUX
+		bool "SELinux" if SECURITY_SELINUX=y
+
+	config DEFAULT_SECURITY_SMACK
+		bool "Simplified Mandatory Access Control" if SECURITY_SMACK=y
+
+	config DEFAULT_SECURITY_TOMOYO
+		bool "TOMOYO" if SECURITY_TOMOYO=y
+
+	config DEFAULT_SECURITY_APPARMOR
+		bool "AppArmor" if SECURITY_APPARMOR=y
+
+	config DEFAULT_SECURITY_DAC
+		bool "Unix Discretionary Access Controls"
+
+endchoice
+
+config DEFAULT_SECURITY
+	string
+	default "selinux" if DEFAULT_SECURITY_SELINUX
+	default "smack" if DEFAULT_SECURITY_SMACK
+	default "tomoyo" if DEFAULT_SECURITY_TOMOYO
+	default "apparmor" if DEFAULT_SECURITY_APPARMOR
+	default "" if DEFAULT_SECURITY_DAC
+
 endmenu
 
--- linux-mvl-dove-2.6.32.orig/security/inode.c
+++ linux-mvl-dove-2.6.32/security/inode.c
@@ -168,13 +168,13 @@
 
 	mutex_lock(&parent->d_inode->i_mutex);
 	*dentry = lookup_one_len(name, parent, strlen(name));
-	if (!IS_ERR(dentry)) {
+	if (!IS_ERR(*dentry)) {
 		if ((mode & S_IFMT) == S_IFDIR)
 			error = mkdir(parent->d_inode, *dentry, mode);
 		else
 			error = create(parent->d_inode, *dentry, mode);
 	} else
-		error = PTR_ERR(dentry);
+		error = PTR_ERR(*dentry);
 	mutex_unlock(&parent->d_inode->i_mutex);
 
 	return error;
--- linux-mvl-dove-2.6.32.orig/security/capability.c
+++ linux-mvl-dove-2.6.32/security/capability.c
@@ -308,6 +308,22 @@
 {
 	return 0;
 }
+
+static int cap_path_chmod(struct dentry *dentry, struct vfsmount *mnt,
+			  mode_t mode)
+{
+	return 0;
+}
+
+static int cap_path_chown(struct path *path, uid_t uid, gid_t gid)
+{
+	return 0;
+}
+
+static int cap_path_chroot(struct path *root)
+{
+	return 0;
+}
 #endif
 
 static int cap_file_permission(struct file *file, int mask)
@@ -977,6 +993,9 @@
 	set_to_cap_if_null(ops, path_link);
 	set_to_cap_if_null(ops, path_rename);
 	set_to_cap_if_null(ops, path_truncate);
+	set_to_cap_if_null(ops, path_chmod);
+	set_to_cap_if_null(ops, path_chown);
+	set_to_cap_if_null(ops, path_chroot);
 #endif
 	set_to_cap_if_null(ops, file_permission);
 	set_to_cap_if_null(ops, file_alloc_security);
--- linux-mvl-dove-2.6.32.orig/security/Makefile
+++ linux-mvl-dove-2.6.32/security/Makefile
@@ -6,9 +6,11 @@
 subdir-$(CONFIG_SECURITY_SELINUX)	+= selinux
 subdir-$(CONFIG_SECURITY_SMACK)		+= smack
 subdir-$(CONFIG_SECURITY_TOMOYO)        += tomoyo
+subdir-$(CONFIG_SECURITY_APPARMOR)	+= apparmor
 
 # always enable default capabilities
-obj-y		+= commoncap.o min_addr.o
+obj-y					+= commoncap.o
+obj-$(CONFIG_MMU)			+= min_addr.o
 
 # Object file lists
 obj-$(CONFIG_SECURITY)			+= security.o capability.o
@@ -18,6 +20,7 @@
 obj-$(CONFIG_SECURITY_SMACK)		+= smack/built-in.o
 obj-$(CONFIG_AUDIT)			+= lsm_audit.o
 obj-$(CONFIG_SECURITY_TOMOYO)		+= tomoyo/built-in.o
+obj-$(CONFIG_SECURITY_APPARMOR)		+= apparmor/built-in.o
 obj-$(CONFIG_SECURITY_ROOTPLUG)		+= root_plug.o
 obj-$(CONFIG_CGROUP_DEVICE)		+= device_cgroup.o
 
--- linux-mvl-dove-2.6.32.orig/security/device_cgroup.c
+++ linux-mvl-dove-2.6.32/security/device_cgroup.c
@@ -514,6 +514,7 @@
 
 	return -EPERM;
 }
+EXPORT_SYMBOL(devcgroup_inode_permission);
 
 int devcgroup_inode_mknod(int mode, dev_t dev)
 {
--- linux-mvl-dove-2.6.32.orig/security/min_addr.c
+++ linux-mvl-dove-2.6.32/security/min_addr.c
@@ -33,6 +33,9 @@
 {
 	int ret;
 
+	if (write && !capable(CAP_SYS_RAWIO))
+		return -EPERM;
+
 	ret = proc_doulongvec_minmax(table, write, buffer, lenp, ppos);
 
 	update_mmap_min_addr();
--- linux-mvl-dove-2.6.32.orig/security/commoncap.c
+++ linux-mvl-dove-2.6.32/security/commoncap.c
@@ -27,6 +27,11 @@
 #include <linux/sched.h>
 #include <linux/prctl.h>
 #include <linux/securebits.h>
+#include <linux/syslog.h>
+
+#ifdef CONFIG_ANDROID_PARANOID_NETWORK
+#include <linux/android_aid.h>
+#endif
 
 /*
  * If a non-root user executes a setuid-root binary in
@@ -82,6 +87,12 @@
 int cap_capable(struct task_struct *tsk, const struct cred *cred, int cap,
 		int audit)
 {
+#ifdef CONFIG_ANDROID_PARANOID_NETWORK
+	if (cap == CAP_NET_RAW && in_egroup_p(AID_NET_RAW))
+		return 0;
+	if (cap == CAP_NET_ADMIN && in_egroup_p(AID_NET_ADMIN))
+		return 0;
+#endif
 	return cap_raised(cred->cap_effective, cap) ? 0 : -EPERM;
 }
 
@@ -956,12 +967,16 @@
 /**
  * cap_syslog - Determine whether syslog function is permitted
  * @type: Function requested
+ * @from_file: Whether this request came from an open file (i.e. /proc)
  *
  * Determine whether the current process is permitted to use a particular
  * syslog function, returning 0 if permission is granted, -ve if not.
  */
-int cap_syslog(int type)
+int cap_syslog(int type, bool from_file)
 {
+	/* /proc/kmsg can open be opened by CAP_SYS_ADMIN */
+	if (type != 1 && from_file)
+		return 0;
 	if ((type != 3 && type != 10) && !capable(CAP_SYS_ADMIN))
 		return -EPERM;
 	return 0;
--- linux-mvl-dove-2.6.32.orig/security/security.c
+++ linux-mvl-dove-2.6.32/security/security.c
@@ -18,7 +18,8 @@
 #include <linux/security.h>
 
 /* Boot-time LSM user choice */
-static __initdata char chosen_lsm[SECURITY_NAME_MAX + 1];
+static __initdata char chosen_lsm[SECURITY_NAME_MAX + 1] =
+	CONFIG_DEFAULT_SECURITY;
 
 /* things that live in capability.c */
 extern struct security_operations default_security_ops;
@@ -79,8 +80,10 @@
  *
  * Return true if:
  *	-The passed LSM is the one chosen by user at boot time,
- *	-or user didn't specify a specific LSM and we're the first to ask
- *	 for registration permission,
+ *	-or the passed LSM is configured as the default and the user did not
+ *	 choose an alternate LSM at boot time,
+ *	-or there is no default LSM set and the user didn't specify a
+ *	 specific LSM and we're the first to ask for registration permission,
  *	-or the passed LSM is currently loaded.
  * Otherwise, return false.
  */
@@ -199,9 +202,9 @@
 	return security_ops->quota_on(dentry);
 }
 
-int security_syslog(int type)
+int security_syslog(int type, bool from_file)
 {
-	return security_ops->syslog(type);
+	return security_ops->syslog(type, from_file);
 }
 
 int security_settime(struct timespec *ts, struct timezone *tz)
@@ -386,6 +389,7 @@
 		return 0;
 	return security_ops->path_mkdir(path, dentry, mode);
 }
+EXPORT_SYMBOL(security_path_mkdir);
 
 int security_path_rmdir(struct path *path, struct dentry *dentry)
 {
@@ -393,6 +397,7 @@
 		return 0;
 	return security_ops->path_rmdir(path, dentry);
 }
+EXPORT_SYMBOL(security_path_rmdir);
 
 int security_path_unlink(struct path *path, struct dentry *dentry)
 {
@@ -400,6 +405,7 @@
 		return 0;
 	return security_ops->path_unlink(path, dentry);
 }
+EXPORT_SYMBOL(security_path_unlink);
 
 int security_path_symlink(struct path *path, struct dentry *dentry,
 			  const char *old_name)
@@ -408,6 +414,7 @@
 		return 0;
 	return security_ops->path_symlink(path, dentry, old_name);
 }
+EXPORT_SYMBOL(security_path_symlink);
 
 int security_path_link(struct dentry *old_dentry, struct path *new_dir,
 		       struct dentry *new_dentry)
@@ -416,6 +423,7 @@
 		return 0;
 	return security_ops->path_link(old_dentry, new_dir, new_dentry);
 }
+EXPORT_SYMBOL(security_path_link);
 
 int security_path_rename(struct path *old_dir, struct dentry *old_dentry,
 			 struct path *new_dir, struct dentry *new_dentry)
@@ -426,6 +434,7 @@
 	return security_ops->path_rename(old_dir, old_dentry, new_dir,
 					 new_dentry);
 }
+EXPORT_SYMBOL(security_path_rename);
 
 int security_path_truncate(struct path *path, loff_t length,
 			   unsigned int time_attrs)
@@ -434,6 +443,27 @@
 		return 0;
 	return security_ops->path_truncate(path, length, time_attrs);
 }
+
+int security_path_chmod(struct dentry *dentry, struct vfsmount *mnt,
+			mode_t mode)
+{
+	if (unlikely(IS_PRIVATE(dentry->d_inode)))
+		return 0;
+	return security_ops->path_chmod(dentry, mnt, mode);
+}
+
+int security_path_chown(struct path *path, uid_t uid, gid_t gid)
+{
+	if (unlikely(IS_PRIVATE(path->dentry->d_inode)))
+		return 0;
+	return security_ops->path_chown(path, uid, gid);
+}
+
+int security_path_chroot(struct path *path)
+{
+	return security_ops->path_chroot(path);
+}
+EXPORT_SYMBOL(security_path_truncate);
 #endif
 
 int security_inode_create(struct inode *dir, struct dentry *dentry, int mode)
@@ -505,6 +535,7 @@
 		return 0;
 	return security_ops->inode_readlink(dentry);
 }
+EXPORT_SYMBOL(security_inode_readlink);
 
 int security_inode_follow_link(struct dentry *dentry, struct nameidata *nd)
 {
@@ -519,6 +550,7 @@
 		return 0;
 	return security_ops->inode_permission(inode, mask);
 }
+EXPORT_SYMBOL(security_inode_permission);
 
 int security_inode_setattr(struct dentry *dentry, struct iattr *attr)
 {
@@ -619,6 +651,7 @@
 {
 	return security_ops->file_permission(file, mask);
 }
+EXPORT_SYMBOL(security_file_permission);
 
 int security_file_alloc(struct file *file)
 {
--- linux-mvl-dove-2.6.32.orig/security/integrity/ima/ima_main.c
+++ linux-mvl-dove-2.6.32/security/integrity/ima/ima_main.c
@@ -324,6 +324,7 @@
 					 MAY_EXEC, FILE_MMAP);
 	return 0;
 }
+EXPORT_SYMBOL(ima_file_mmap);
 
 /**
  * ima_bprm_check - based on policy, collect/store measurement.
--- linux-mvl-dove-2.6.32.orig/security/integrity/ima/ima_policy.c
+++ linux-mvl-dove-2.6.32/security/integrity/ima/ima_policy.c
@@ -249,6 +249,8 @@
 	result = security_filter_rule_init(entry->lsm[lsm_rule].type,
 					   Audit_equal, args,
 					   &entry->lsm[lsm_rule].rule);
+	if (!entry->lsm[lsm_rule].rule)
+		return -EINVAL;
 	return result;
 }
 
--- linux-mvl-dove-2.6.32.orig/security/keys/keyring.c
+++ linux-mvl-dove-2.6.32/security/keys/keyring.c
@@ -524,9 +524,8 @@
 	struct key *keyring;
 	int bucket;
 
-	keyring = ERR_PTR(-EINVAL);
 	if (!name)
-		goto error;
+		return ERR_PTR(-EINVAL);
 
 	bucket = keyring_hash(name);
 
@@ -553,17 +552,18 @@
 					   KEY_SEARCH) < 0)
 				continue;
 
-			/* we've got a match */
-			atomic_inc(&keyring->usage);
-			read_unlock(&keyring_name_lock);
-			goto error;
+			/* we've got a match but we might end up racing with
+			 * key_cleanup() if the keyring is currently 'dead'
+			 * (ie. it has a zero usage count) */
+			if (!atomic_inc_not_zero(&keyring->usage))
+				continue;
+			goto out;
 		}
 	}
 
-	read_unlock(&keyring_name_lock);
 	keyring = ERR_PTR(-ENOKEY);
-
- error:
+out:
+	read_unlock(&keyring_name_lock);
 	return keyring;
 
 } /* end find_keyring_by_name() */
--- linux-mvl-dove-2.6.32.orig/security/keys/request_key.c
+++ linux-mvl-dove-2.6.32/security/keys/request_key.c
@@ -336,8 +336,10 @@
 
 key_already_present:
 	mutex_unlock(&key_construction_mutex);
-	if (dest_keyring)
+	if (dest_keyring) {
+		__key_link(dest_keyring, key_ref_to_ptr(key_ref));
 		up_write(&dest_keyring->sem);
+	}
 	mutex_unlock(&user->cons_lock);
 	key_put(key);
 	*_key = key = key_ref_to_ptr(key_ref);
@@ -428,6 +430,11 @@
 
 	if (!IS_ERR(key_ref)) {
 		key = key_ref_to_ptr(key_ref);
+		if (dest_keyring) {
+			construct_get_dest_keyring(&dest_keyring);
+			key_link(dest_keyring, key);
+			key_put(dest_keyring);
+		}
 	} else if (PTR_ERR(key_ref) != -EAGAIN) {
 		key = ERR_CAST(key_ref);
 	} else  {
--- linux-mvl-dove-2.6.32.orig/security/keys/keyctl.c
+++ linux-mvl-dove-2.6.32/security/keys/keyctl.c
@@ -1236,6 +1236,7 @@
  */
 long keyctl_session_to_parent(void)
 {
+#ifdef TIF_NOTIFY_RESUME
 	struct task_struct *me, *parent;
 	const struct cred *mycred, *pcred;
 	struct cred *cred, *oldcred;
@@ -1258,6 +1259,7 @@
 	keyring_r = NULL;
 
 	me = current;
+	rcu_read_lock();
 	write_lock_irq(&tasklist_lock);
 
 	parent = me->real_parent;
@@ -1290,7 +1292,8 @@
 		goto not_permitted;
 
 	/* the keyrings must have the same UID */
-	if (pcred ->tgcred->session_keyring->uid != mycred->euid ||
+	if ((pcred->tgcred->session_keyring &&
+	    pcred->tgcred->session_keyring->uid != mycred->euid) ||
 	    mycred->tgcred->session_keyring->uid != mycred->euid)
 		goto not_permitted;
 
@@ -1312,6 +1315,7 @@
 	set_ti_thread_flag(task_thread_info(parent), TIF_NOTIFY_RESUME);
 
 	write_unlock_irq(&tasklist_lock);
+	rcu_read_unlock();
 	if (oldcred)
 		put_cred(oldcred);
 	return 0;
@@ -1320,12 +1324,22 @@
 	ret = 0;
 not_permitted:
 	write_unlock_irq(&tasklist_lock);
+	rcu_read_unlock();
 	put_cred(cred);
 	return ret;
 
 error_keyring:
 	key_ref_put(keyring_r);
 	return ret;
+
+#else /* !TIF_NOTIFY_RESUME */
+	/*
+	 * To be removed when TIF_NOTIFY_RESUME has been implemented on
+	 * m68k/xtensa
+	 */
+#warning TIF_NOTIFY_RESUME not implemented
+	return -EOPNOTSUPP;
+#endif /* !TIF_NOTIFY_RESUME */
 }
 
 /*****************************************************************************/
--- linux-mvl-dove-2.6.32.orig/security/keys/process_keys.c
+++ linux-mvl-dove-2.6.32/security/keys/process_keys.c
@@ -509,7 +509,7 @@
 
 			ret = install_thread_keyring();
 			if (ret < 0) {
-				key = ERR_PTR(ret);
+				key_ref = ERR_PTR(ret);
 				goto error;
 			}
 			goto reget_creds;
@@ -527,7 +527,7 @@
 
 			ret = install_process_keyring();
 			if (ret < 0) {
-				key = ERR_PTR(ret);
+				key_ref = ERR_PTR(ret);
 				goto error;
 			}
 			goto reget_creds;
@@ -586,7 +586,7 @@
 
 	case KEY_SPEC_GROUP_KEYRING:
 		/* group keyrings are not yet supported */
-		key = ERR_PTR(-EINVAL);
+		key_ref = ERR_PTR(-EINVAL);
 		goto error;
 
 	case KEY_SPEC_REQKEY_AUTH_KEY:
--- linux-mvl-dove-2.6.32.orig/security/smack/smack_lsm.c
+++ linux-mvl-dove-2.6.32/security/smack/smack_lsm.c
@@ -157,12 +157,12 @@
  *
  * Returns 0 on success, error code otherwise.
  */
-static int smack_syslog(int type)
+static int smack_syslog(int type, bool from_file)
 {
 	int rc;
 	char *sp = current_security();
 
-	rc = cap_syslog(type);
+	rc = cap_syslog(type, from_file);
 	if (rc != 0)
 		return rc;
 
--- linux-mvl-dove-2.6.32.orig/security/apparmor/domain.c
+++ linux-mvl-dove-2.6.32/security/apparmor/domain.c
@@ -0,0 +1,796 @@
+/*
+ * AppArmor security module
+ *
+ * This file contains AppArmor policy attachment and domain transitions
+ *
+ * Copyright (C) 2002-2008 Novell/SUSE
+ * Copyright 2009-2010 Canonical Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ */
+
+#include <linux/errno.h>
+#include <linux/fdtable.h>
+#include <linux/file.h>
+#include <linux/mount.h>
+#include <linux/syscalls.h>
+#include <linux/tracehook.h>
+#include <linux/personality.h>
+
+#include "include/audit.h"
+#include "include/apparmorfs.h"
+#include "include/context.h"
+#include "include/domain.h"
+#include "include/file.h"
+#include "include/ipc.h"
+#include "include/match.h"
+#include "include/path.h"
+#include "include/policy.h"
+
+/**
+ * aa_free_domain_entries - free entries in a domain table
+ * @domain: the domain table to free  (MAYBE NULL)
+ */
+void aa_free_domain_entries(struct aa_domain *domain)
+{
+	int i;
+	if (domain) {
+		if (!domain->table)
+			return;
+
+		for (i = 0; i < domain->size; i++)
+			kzfree(domain->table[i]);
+		kzfree(domain->table);
+		domain->table = NULL;
+	}
+}
+
+/**
+ * aa_may_change_ptraced_domain - check if can change profile on ptraced task
+ * @task: task we want to change profile of   (NOT NULL)
+ * @to_profile: profile to change to  (NOT NULL)
+ *
+ * Check if the task is ptraced and if so if the tracing task is allowed
+ * to trace the new domain
+ *
+ * Returns: %0 or error if change not allowed
+ */
+static int aa_may_change_ptraced_domain(struct task_struct *task,
+					struct aa_profile *to_profile)
+{
+	struct task_struct *tracer;
+	struct cred *cred = NULL;
+	struct aa_profile *tracerp = NULL;
+	int error = 0;
+
+	rcu_read_lock();
+	tracer = tracehook_tracer_task(task);
+	if (tracer) {
+		/* released below */
+		cred = get_task_cred(tracer);
+		tracerp = aa_cred_profile(cred);
+	}
+	rcu_read_unlock();
+
+	/* not ptraced */
+	if (!tracer || unconfined(tracerp))
+		goto out;
+
+	error = aa_may_ptrace(tracer, tracerp, to_profile, PTRACE_MODE_ATTACH);
+
+out:
+	if (cred)
+		put_cred(cred);
+
+	return error;
+}
+
+/**
+ * change_profile_perms - find permissions for change_profile
+ * @profile: the current profile  (NOT NULL)
+ * @ns: the namespace being switched to  (NOT NULL)
+ * @name: the name of the profile to change to  (NOT NULL)
+ * @rstate: if !NULL will contain the state the match finished in (MAYBE NULL)
+ *
+ * Returns: permission set
+ */
+static struct file_perms change_profile_perms(struct aa_profile *profile,
+					      struct aa_namespace *ns,
+					      const char *name,
+					      unsigned int *rstate)
+{
+	struct file_perms perms;
+	struct path_cond cond = { };
+	unsigned int state;
+
+	if (unconfined(profile)) {
+		perms.allowed = AA_MAY_CHANGE_PROFILE;
+		perms.xindex = perms.xdelegate = perms.dindex = 0;
+		perms.audit = perms.quiet = perms.kill = 0;
+		if (rstate)
+			*rstate = 0;
+		return perms;
+	} else if (!profile->file.dfa) {
+		return nullperms;
+	} else if ((ns == profile->ns)) {
+		/* try matching against rules with out namespace prependend */
+		perms = aa_str_perms(profile->file.dfa, profile->file.start,
+				     name, &cond, rstate);
+		if (COMBINED_PERM_MASK(perms) & AA_MAY_CHANGE_PROFILE)
+			return perms;
+	}
+
+	/* try matching with namespace name and then profile */
+	state = aa_dfa_match(profile->file.dfa, profile->file.start,
+			     ns->base.name);
+	state = aa_dfa_null_transition(profile->file.dfa, state, 0);
+	return aa_str_perms(profile->file.dfa, state, name, &cond, rstate);
+}
+
+/**
+ * __aa_attach_match_ - find an attachment match
+ * @name - to match against  (NOT NULL)
+ * @head - profile list to walk  (NOT NULL)
+ *
+ * Do a linear search on the profiles in the list.  There is a matching
+ * preference where an exact match is prefered over a name which uses
+ * expressions to match, and matching expressions with the greatest
+ * xmatch_len are prefered.
+ *
+ * Requires: @head not be shared or have appropriate locks held
+ *
+ * Returns: profile or NULL if no match found
+ */
+static struct aa_profile *__aa_attach_match(const char *name,
+					    struct list_head *head)
+{
+	int len = 0;
+	struct aa_profile *profile, *candidate = NULL;
+
+	list_for_each_entry(profile, head, base.list) {
+		if (profile->flags & PFLAG_NULL)
+			continue;
+		if (profile->xmatch && profile->xmatch_len > len) {
+			unsigned int state = aa_dfa_match(profile->xmatch,
+							  DFA_START, name);
+			u16 perm = dfa_user_allow(profile->xmatch, state);
+			/* any accepting state means a valid match. */
+			if (perm & MAY_EXEC) {
+				candidate = profile;
+				len = profile->xmatch_len;
+			}
+		} else if (!strcmp(profile->base.name, name))
+			/* exact non-re match, no more searching required */
+			return profile;
+	}
+
+	return candidate;
+}
+
+/**
+ * aa_find_attach - do attachment search for unconfined processes
+ * @ns: the current namespace  (NOT NULL)
+ * @list: list to search  (NOT NULL)
+ * @name: the executable name to match against  (NOT NULL)
+ *
+ * Returns: profile or NULL if no match found
+ */
+static struct aa_profile *aa_find_attach(struct aa_namespace *ns,
+					 struct list_head *list,
+					 const char *name)
+{
+	struct aa_profile *profile;
+
+	read_lock(&ns->lock);
+	profile = aa_get_profile(__aa_attach_match(name, list));
+	read_unlock(&ns->lock);
+
+	return profile;
+}
+
+/**
+ * separate_fqname - separate the namespace and profile names
+ * @fqname: the fqname name to split  (NOT NULL)
+ * @ns_name: the namespace name if it exists  (NOT NULL)
+ *
+ * This is the xtable equivalent routine of aa_split_fqname.  It finds the
+ * split in an xtable fqname which contains an embedded \0 instead of a :
+ * if a namespace is specified.  This is done so the xtable is constant and
+ * isn't resplit on every lookup.
+ *
+ * Either the profile or namespace name may be optional but if the namespace
+ * is specified the profile name termination must be present.  This results
+ * in the following possible encodings:
+ * profile_name\0
+ * :ns_name\0profile_name\0
+ * :ns_name\0\0
+ *
+ * NOTE: the xtable fqname is prevalidated at load time in unpack_trans_table
+ *
+ * Returns: profile name if it is specified else NULL
+ */
+static const char *separate_fqname(const char *fqname, const char **ns_name)
+{
+	const char *name;
+
+	if (fqname[0] == ':') {
+		*ns_name = fqname + 1;		/* skip : */
+		name = *ns_name + strlen(*ns_name) + 1;
+		if (!*name)
+			name = NULL;
+	} else {
+		*ns_name = NULL;
+		name = fqname;
+	}
+
+	return name;
+}
+
+static const char *next_name(int xtype, const char *name)
+{
+	return NULL;
+}
+
+/**
+ * x_to_profile - get target profile for a given xindex
+ * @profile: current profile  (NOT NULL)
+ * @name: to to lookup if specified  (NOT NULL)
+ * @xindex: index into x transition table
+ *
+ * find profile for a transition index
+ *
+ * Returns: refcounted profile or NULL if not found available
+ */
+static struct aa_profile *x_to_profile(struct aa_profile *profile,
+				       const char *name, u16 xindex)
+{
+	struct aa_profile *new_profile = NULL;
+	struct aa_namespace *ns = profile->ns;
+	u16 xtype = xindex & AA_X_TYPE_MASK;
+	int index = xindex & AA_X_INDEX_MASK;
+
+	switch (xtype) {
+	case AA_X_NONE:
+		/* fail exec unless ix || ux fallback - handled by caller */
+		return NULL;
+	case AA_X_NAME:
+		if (xindex & AA_X_CHILD)
+			/* released by caller */
+			new_profile = aa_find_attach(ns,
+						     &profile->base.profiles,
+						     name);
+		else
+			/* released by caller */
+			new_profile = aa_find_attach(ns, &ns->base.profiles,
+						     name);
+		/* released by caller */
+		return new_profile;
+	case AA_X_TABLE:
+		/* index is guarenteed to be in range */
+		name = profile->file.trans.table[index];
+		break;
+	}
+
+	for (; !new_profile && name; name = next_name(xtype, name)) {
+		struct aa_namespace *new_ns;
+		const char *xname = NULL;
+
+		new_ns = NULL;
+		if (xindex & AA_X_CHILD) {
+			/* release by caller */
+			new_profile = aa_find_child(profile, name);
+			if (new_profile)
+				return new_profile;
+			continue;
+		} else if (*name == ':') {
+			/* switching namespace */
+			const char *ns_name;
+			xname = name = separate_fqname(name, &ns_name);
+			if (!xname)
+				/* no name so use profile name */
+				xname = profile->base.hname;
+			if (*ns_name == '@') {
+				/* TODO: variable support */
+				;
+			}
+			/* released below */
+			new_ns = aa_find_namespace(ns, ns_name);
+			if (!new_ns)
+				continue;
+		} else if (*name == '@') {
+			/* TODO: variable support */
+			continue;
+		} else {
+			xname = name;
+		}
+
+		/* released by caller */
+		new_profile = aa_find_profile(new_ns ? new_ns : ns, xname);
+		aa_put_namespace(new_ns);
+	}
+
+	/* released by caller */
+	return new_profile;
+}
+
+/**
+ * apparmor_bprm_set_creds - set the new creds on the bprm struct
+ * @bprm: binprm for the exec  (NOT NULL)
+ *
+ * Returns: %0 or error on failure
+ */
+int apparmor_bprm_set_creds(struct linux_binprm *bprm)
+{
+	struct aa_task_cxt *cxt;
+	struct aa_profile *profile, *new_profile = NULL;
+	struct aa_namespace *ns;
+	char *buffer = NULL;
+	unsigned int state;
+	struct path_cond cond = {
+		bprm->file->f_path.dentry->d_inode->i_uid,
+		bprm->file->f_path.dentry->d_inode->i_mode
+	};
+	struct aa_audit_file sa = {
+		.base.operation = "exec",
+		.base.gfp_mask = GFP_KERNEL,
+		.request = MAY_EXEC,
+		.cond = &cond,
+	};
+
+	sa.base.error = cap_bprm_set_creds(bprm);
+	if (sa.base.error)
+		return sa.base.error;
+
+	if (bprm->cred_prepared)
+		return 0;
+
+	cxt = bprm->cred->security;
+	BUG_ON(!cxt);
+
+	profile = aa_get_profile(aa_newest_version(cxt->profile));
+	/*
+	 * get the namespace from the replacement profile as replacement
+	 * can change the namespace
+	 */
+	ns = profile->ns;
+	state = profile->file.start;
+
+	/* buffer freed below, name is pointer inside of buffer */
+	sa.base.error = aa_get_name(&bprm->file->f_path, profile->path_flags,
+				    &buffer, (char **)&sa.name);
+	if (sa.base.error) {
+		if (profile->flags &
+		    (PFLAG_IX_ON_NAME_ERROR | PFLAG_UNCONFINED))
+			sa.base.error = 0;
+		sa.base.info = "Exec failed name resolution";
+		sa.name = bprm->filename;
+		goto audit;
+	}
+
+	if (unconfined(profile)) {
+		/* unconfined task - attach profile if one matches */
+		new_profile = aa_find_attach(ns, &ns->base.profiles, sa.name);
+		if (!new_profile)
+			goto cleanup;
+		goto apply;
+	} else if (cxt->onexec) {
+		/*
+		 * onexec permissions are stored in a pair, rewalk the
+		 * dfa to get start of the exec path match.
+		 */
+		sa.perms = change_profile_perms(profile, cxt->onexec->ns,
+						sa.name, &state);
+		state = aa_dfa_null_transition(profile->file.dfa, state, 0);
+	}
+	sa.perms = aa_str_perms(profile->file.dfa, state, sa.name, &cond, NULL);
+	if (cxt->onexec && sa.perms.allowed & AA_MAY_ONEXEC) {
+		/* transfer the onexec reference, this is allowed as the
+		 * cred is being prepared, and isn't committed yet.
+		 */
+		new_profile = cxt->onexec;
+		cxt->onexec = NULL;
+		sa.base.info = "change_profile onexec";
+	} else if (sa.perms.allowed & MAY_EXEC) {
+		new_profile = x_to_profile(profile, sa.name, sa.perms.xindex);
+		if (!new_profile) {
+			if (sa.perms.xindex & AA_X_INHERIT) {
+				/* (p|c|n)ix - don't change profile */
+				sa.base.info = "ix fallback";
+				goto x_clear;
+			} else if (sa.perms.xindex & AA_X_UNCONFINED) {
+				new_profile = aa_get_profile(ns->unconfined);
+				sa.base.info = "ux fallback";
+			} else {
+				sa.base.error = -ENOENT;
+				sa.base.info = "profile not found";
+			}
+		}
+	} else if (COMPLAIN_MODE(profile)) {
+		new_profile = aa_new_null_profile(profile, 0);
+		sa.base.error = -EACCES;
+		if (!new_profile) {
+			sa.base.error = -ENOMEM;
+			sa.base.info = "could not create null profile";
+		} else
+			sa.name2 = new_profile->base.hname;
+		sa.perms.xindex |= AA_X_UNSAFE;
+	} else {
+		sa.base.error = -EACCES;
+	}
+
+	if (!new_profile)
+		goto audit;
+
+	if (profile == new_profile)
+		goto abort;
+
+	if (bprm->unsafe & LSM_UNSAFE_SHARE) {
+		/* FIXME: currently don't mediate shared state */
+		;
+	}
+
+	if (bprm->unsafe & (LSM_UNSAFE_PTRACE | LSM_UNSAFE_PTRACE_CAP)) {
+		sa.base.error = aa_may_change_ptraced_domain(current,
+							     new_profile);
+		if (sa.base.error)
+			goto abort;
+	}
+
+	/* Determine if secure exec is needed.
+	 * Can be at this point for the following reasons:
+	 * 1. unconfined switching to confined
+	 * 2. confined switching to different confinement
+	 * 3. confined switching to unconfined
+	 *
+	 * Cases 2 and 3 are marked as requiring secure exec
+	 * (unless policy specified "unsafe exec")
+	 *
+	 * bprm->unsafe is used to cache the AA_X_UNSAFE permission
+	 * to avoid having to recompute in secureexec
+	 */
+	if (!(sa.perms.xindex & AA_X_UNSAFE)) {
+		AA_DEBUG("scrubbing environment variables for %s profile=%s\n",
+			 sa.name, new_profile->base.hname);
+		bprm->unsafe |= AA_SECURE_X_NEEDED;
+	}
+apply:
+	sa.name2 = new_profile->base.hname;
+	/* When switching namespace ensure its part of audit message */
+	if (new_profile->ns != ns)
+		sa.name3 = new_profile->ns->base.hname;
+
+	/* when transitioning profiles clear unsafe personality bits */
+	bprm->per_clear |= PER_CLEAR_ON_SETID;
+
+	aa_put_profile(cxt->profile);
+	/* transfer new profile reference will be released when cxt is freed */
+	cxt->profile = new_profile;
+
+x_clear:
+	aa_put_profile(cxt->previous);
+	aa_put_profile(cxt->onexec);
+	cxt->previous = NULL;
+	cxt->onexec = NULL;
+	cxt->token = 0;
+
+audit:
+	sa.base.error = aa_audit_file(profile, &sa);
+
+cleanup:
+	aa_put_profile(profile);
+	kfree(buffer);
+
+	return sa.base.error;
+
+abort:
+	aa_put_profile(new_profile);
+	goto audit;
+}
+
+/**
+ * apparmor_bprm_secureexec - determine if secureexec is needed
+ * @bprm: binprm for exec  (NOT NULL)
+ *
+ * Returns: %1 if secureexec is needed else %0
+ */
+int apparmor_bprm_secureexec(struct linux_binprm *bprm)
+{
+	int ret = cap_bprm_secureexec(bprm);
+
+	/* the decision to use secure exec is computed in set_creds
+	 * and stored in bprm->unsafe.
+	 */
+	if (!ret && (bprm->unsafe & AA_SECURE_X_NEEDED))
+		ret = 1;
+
+	return ret;
+}
+
+/**
+ * apparmor_bprm_committing_creds - do task cleanup on committing new creds
+ * @bprm: binprm for the exec  (NOT NULL)
+ */
+void apparmor_bprm_committing_creds(struct linux_binprm *bprm)
+{
+	struct aa_profile *profile = __aa_current_profile();
+	struct aa_task_cxt *new_cxt = bprm->cred->security;
+
+	/* bail out if unconfined or not changing profile */
+	if ((new_cxt->profile == profile) ||
+	    (unconfined(new_cxt->profile)))
+		return;
+
+	current->pdeath_signal = 0;
+
+	/* reset soft limits and set hard limits for the new profile */
+	__aa_transition_rlimits(profile, new_cxt->profile);
+}
+
+/**
+ * apparmor_bprm_commited_cred - do cleanup after new creds committed
+ * @bprm: binprm for the exec  (NOT NULL)
+ */
+void apparmor_bprm_committed_creds(struct linux_binprm *bprm)
+{
+	/* TODO: cleanup signals - ipc mediation */
+	return;
+}
+
+/*
+ * Functions for self directed profile change
+ */
+
+/**
+ * new_compound_name - create an hname with @n2 appended to @n1
+ * @n1: base of hname  (NOT NULL)
+ * @n2: name to append (NOT NULL)
+ *
+ * Returns: new name or NULL on error
+ */
+static char *new_compound_name(const char *n1, const char *n2)
+{
+	char *name = kmalloc(strlen(n1) + strlen(n2) + 3, GFP_KERNEL);
+	if (name)
+		sprintf(name, "%s//%s", n1, n2);
+	return name;
+}
+
+/**
+ * aa_change_hat - change hat to/from subprofile
+ * @hats: vector of hat names to try changing into (unused if @count == 0)
+ * @count: number of hat names in @hats
+ * @token: magic value to validate the hat change
+ * @permtest: true if this is just a permission test
+ *
+ * Change to the first profile specified in @hats that exists, and store
+ * the @hat_magic in the current task context.  If the count == 0 and the
+ * @token matches that stored in the current task context, return to the
+ * top level profile.
+ *
+ * Returns %0 on success, error otherwise.
+ */
+int aa_change_hat(const char *hats[], int count, u64 token, bool permtest)
+{
+	const struct cred *cred;
+	struct aa_task_cxt *cxt;
+	struct aa_profile *profile, *previous_profile, *hat = NULL;
+	struct aa_audit_file sa = {
+		.base.gfp_mask = GFP_KERNEL,
+		.base.operation = "change_hat",
+		.request = AA_MAY_CHANGEHAT,
+	};
+	char *name = NULL;
+	int i;
+
+	/* released below */
+	cred = get_current_cred();
+	cxt = cred->security;
+	profile = aa_cred_profile(cred);
+	previous_profile = cxt->previous;
+
+	if (unconfined(profile)) {
+		sa.base.info = "unconfined";
+		sa.base.error = -EPERM;
+		goto audit;
+	}
+
+	if (count) {
+		/* attempting to change into a new hat or switch to a sibling */
+		struct aa_profile *root;
+		root = PROFILE_IS_HAT(profile) ? profile->parent : profile;
+		sa.name2 = profile->ns->base.hname;
+
+		/* find first matching hat */
+		for (i = 0; i < count && !hat; i++)
+			/* released below */
+			hat = aa_find_child(root, hats[i]);
+		if (!hat) {
+			if (!COMPLAIN_MODE(root) || permtest) {
+				sa.base.info = "hat not found";
+				if (list_empty(&root->base.profiles))
+					sa.base.error = -ECHILD;
+				else
+					sa.base.error = -ENOENT;
+				goto out;
+			}
+
+			/*
+			 * In complain mode and failed to match any hats.
+			 * Audit the failure based off of the first hat
+			 * supplied.  This is done due how userspace
+			 * interacts with change_hat.
+			 *
+			 * TODO: Add logging of all failed hats
+			 */
+
+			/* freed below */
+			name = new_compound_name(root->base.hname, hats[0]);
+			sa.name = name;
+			/* released below */
+			hat = aa_new_null_profile(profile, 1);
+			if (!hat) {
+				sa.base.info = "failed null profile create";
+				sa.base.error = -ENOMEM;
+				goto audit;
+			}
+		} else {
+			sa.name = hat->base.hname;
+			if (!PROFILE_IS_HAT(hat)) {
+				sa.base.info = "target not hat";
+				sa.base.error = -EPERM;
+				goto audit;
+			}
+		}
+
+		sa.base.error = aa_may_change_ptraced_domain(current, hat);
+		if (sa.base.error) {
+			sa.base.info = "ptraced";
+			sa.base.error = -EPERM;
+			goto audit;
+		}
+
+		if (!permtest) {
+			sa.base.error = aa_set_current_hat(hat, token);
+			if (sa.base.error == -EACCES)
+				/* kill task incase of brute force attacks */
+				sa.perms.kill = AA_MAY_CHANGEHAT;
+			else if (name && !sa.base.error)
+				/* reset error for learning of new hats */
+				sa.base.error = -ENOENT;
+		}
+	} else if (previous_profile) {
+		/* Return to saved profile.  Kill task if restore fails
+		 * to avoid brute force attacks
+		 */
+		sa.name = previous_profile->base.hname;
+		sa.base.error = aa_restore_previous_profile(token);
+		sa.perms.kill = AA_MAY_CHANGEHAT;
+	} else
+		/* ignore restores when there is no saved profile */
+		goto out;
+
+audit:
+	if (!permtest)
+		sa.base.error = aa_audit_file(profile, &sa);
+
+out:
+	aa_put_profile(hat);
+	kfree(name);
+	put_cred(cred);
+
+	return sa.base.error;
+}
+
+/**
+ * aa_change_profile - perform a one-way profile transition
+ * @ns_name: name of the profile namespace to change to
+ * @hname: name of profile to change to
+ * @onexec: whether this transition is to take place immediately or at exec
+ * @permtest: true if this is just a permission test
+ *
+ * Change to new profile @name.  Unlike with hats, there is no way
+ * to change back.  If @onexec then the transition is delayed until
+ * the next exec.
+ *
+ * Returns %0 on success, error otherwise.
+ */
+int aa_change_profile(const char *ns_name, const char *hname, int onexec,
+		      bool permtest)
+{
+	const struct cred *cred;
+	struct aa_task_cxt *cxt;
+	struct aa_profile *profile, *target = NULL;
+	struct aa_namespace *ns = NULL;
+	struct aa_audit_file sa = {
+		.request = AA_MAY_CHANGE_PROFILE,
+		.base.gfp_mask = GFP_KERNEL,
+	};
+
+	if (!hname && !ns_name)
+		return -EINVAL;
+
+	if (onexec)
+		sa.base.operation = "change_onexec";
+	else
+		sa.base.operation = "change_profile";
+
+	cred = get_current_cred();
+	cxt = cred->security;
+	profile = aa_cred_profile(cred);
+
+	if (ns_name) {
+		/* released below */
+		ns = aa_find_namespace(profile->ns, ns_name);
+		if (!ns) {
+			/* we don't create new namespace in complain mode */
+			sa.name2 = ns_name;
+			sa.base.info = "namespace not found";
+			sa.base.error = -ENOENT;
+			goto audit;
+		}
+		sa.name2 = ns->base.hname;
+	} else {
+		/* released below */
+		ns = aa_get_namespace(profile->ns);
+		sa.name2 = ns->base.hname;
+	}
+
+	/* if the name was not specified, use the name of the current profile */
+	if (!hname) {
+		if (unconfined(profile))
+			hname = ns->unconfined->base.hname;
+		else
+			hname = profile->base.hname;
+	}
+	sa.name = hname;
+
+	sa.perms = change_profile_perms(profile, ns, hname, NULL);
+	if (!(sa.perms.allowed & AA_MAY_CHANGE_PROFILE)) {
+		sa.base.error = -EACCES;
+		goto audit;
+	}
+
+	/* released below */
+	target = aa_find_profile(ns, hname);
+	if (!target) {
+		sa.base.info = "profile not found";
+		sa.base.error = -ENOENT;
+		if (permtest || !COMPLAIN_MODE(profile))
+			goto audit;
+		/* release below */
+		target = aa_new_null_profile(profile, 0);
+		if (!target) {
+			sa.base.info = "failed null profile create";
+			sa.base.error = -ENOMEM;
+			goto audit;
+		}
+	}
+
+	/* check if tracing task is allowed to trace target domain */
+	sa.base.error = aa_may_change_ptraced_domain(current, target);
+	if (sa.base.error) {
+		sa.base.info = "ptrace prevents transition";
+		goto audit;
+	}
+
+	if (permtest)
+		goto audit;
+
+	if (onexec)
+		sa.base.error = aa_set_current_onexec(target);
+	else
+		sa.base.error = aa_replace_current_profiles(target);
+
+audit:
+	if (!permtest)
+		sa.base.error = aa_audit_file(profile, &sa);
+
+	aa_put_namespace(ns);
+	aa_put_profile(target);
+	put_cred(cred);
+
+	return sa.base.error;
+}
--- linux-mvl-dove-2.6.32.orig/security/apparmor/audit.c
+++ linux-mvl-dove-2.6.32/security/apparmor/audit.c
@@ -0,0 +1,162 @@
+/*
+ * AppArmor security module
+ *
+ * This file contains AppArmor auditing functions
+ *
+ * Copyright (C) 1998-2008 Novell/SUSE
+ * Copyright 2009-2010 Canonical Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ */
+
+#include <linux/audit.h>
+#include <linux/socket.h>
+
+#include "include/apparmor.h"
+#include "include/audit.h"
+#include "include/policy.h"
+
+const char *audit_mode_names[] = {
+	"normal",
+	"quiet_denied",
+	"quiet",
+	"noquiet",
+	"all"
+};
+
+static char *aa_audit_type[] = {
+	"APPARMOR_AUDIT",
+	"APPARMOR_ALLOWED",
+	"APPARMOR_DENIED",
+	"APPARMOR_HINT",
+	"APPARMOR_STATUS",
+	"APPARMOR_ERROR",
+	"APPARMOR_KILLED"
+};
+
+/*
+ * Currently AppArmor auditing is fed straight into the audit framework.
+ *
+ * TODO:
+ * convert to LSM audit
+ * netlink interface for complain mode
+ * user auditing, - send user auditing to netlink interface
+ * system control of whether user audit messages go to system log
+ */
+
+/**
+ * aa_audit_base - core AppArmor function.
+ * @type: type of audit message (see include/linux/apparmor.h)
+ * @profile: active profile for event (MAY BE NULL)
+ * @sa: audit structure containing data to audit
+ * @audit_cxt: audit_cxt that event is under
+ * @cb: audit cb for this event
+ *
+ * Record an audit message for data is @sa, and handle deal with kill and
+ * complain messages switches.
+ *
+ * Returns: 0 or sa->error on success, else error
+ */
+static int aa_audit_base(int type, struct aa_profile *profile,
+			 struct aa_audit *sa, struct audit_context *audit_cxt,
+			 void (*cb) (struct audit_buffer *, struct aa_audit *))
+{
+	struct audit_buffer *ab = NULL;
+	struct task_struct *task = sa->task ? sa->task : current;
+
+	if (profile && DO_KILL(profile) && type == AUDIT_APPARMOR_DENIED)
+		type = AUDIT_APPARMOR_KILL;
+
+	/* ab freed below in audit_log_end */
+	ab = audit_log_start(audit_cxt, sa->gfp_mask, type);
+
+	if (!ab) {
+		AA_ERROR("(%d) Unable to log event of type (%d)\n",
+			 -ENOMEM, type);
+		sa->error = -ENOMEM;
+		goto out;
+	}
+
+	if (aa_g_audit_header) {
+		audit_log_format(ab, " type=");
+		audit_log_string(ab, aa_audit_type[type - AUDIT_APPARMOR_AUDIT]);
+	}
+
+	if (sa->operation) {
+		audit_log_format(ab, " operation=");
+		audit_log_string(ab, sa->operation);
+	}
+
+	if (sa->info) {
+		audit_log_format(ab, " info=");
+		audit_log_string(ab, sa->info);
+		if (sa->error)
+			audit_log_format(ab, " error=%d", sa->error);
+	}
+
+	audit_log_format(ab, " pid=%d", task->pid);
+
+	if (profile && !unconfined(profile)) {
+		pid_t pid;
+		rcu_read_lock();
+		pid = task->real_parent->pid;
+		rcu_read_unlock();
+		audit_log_format(ab, " parent=%d", pid);
+		audit_log_format(ab, " profile=");
+		audit_log_untrustedstring(ab, profile->base.hname);
+
+		if (profile->ns != root_ns) {
+			audit_log_format(ab, " namespace=");
+			audit_log_untrustedstring(ab, profile->ns->base.hname);
+		}
+	}
+
+	if (cb)
+		cb(ab, sa);
+
+	audit_log_end(ab);
+
+out:
+	if (type == AUDIT_APPARMOR_KILL)
+		(void)send_sig_info(SIGKILL, NULL, task);
+
+	return type == AUDIT_APPARMOR_ALLOWED ? 0 : sa->error;
+}
+
+/**
+ * aa_audit - Log an audit event to the audit subsystem
+ * @type: audit type for the message
+ * @profile: profile to check against
+ * @sa: audit event
+ * @cb: optional callback fn for type specific fields
+ *
+ * Handle default message switching based off of audit mode flags
+ *
+ * Returns: error on failure
+ */
+int aa_audit(int type, struct aa_profile *profile, struct aa_audit *sa,
+	     void (*cb) (struct audit_buffer *, struct aa_audit *))
+{
+	struct audit_context *audit_cxt;
+	audit_cxt = aa_g_logsyscall ? current->audit_context : NULL;
+
+	if (type == AUDIT_APPARMOR_AUTO) {
+		if (likely(!sa->error)) {
+			if (AUDIT_MODE(profile) != AUDIT_ALL)
+				return 0;
+			type = AUDIT_APPARMOR_AUDIT;
+		} else if (COMPLAIN_MODE(profile))
+			type = AUDIT_APPARMOR_ALLOWED;
+		else
+			type = AUDIT_APPARMOR_DENIED;
+	}
+	if (AUDIT_MODE(profile) == AUDIT_QUIET ||
+	    (type == AUDIT_APPARMOR_DENIED &&
+	     AUDIT_MODE(profile) == AUDIT_QUIET))
+		return sa->error;
+
+	return aa_audit_base(type, profile, sa, audit_cxt, cb);
+}
--- linux-mvl-dove-2.6.32.orig/security/apparmor/net.c
+++ linux-mvl-dove-2.6.32/security/apparmor/net.c
@@ -0,0 +1,167 @@
+/*
+ * AppArmor security module
+ *
+ * This file contains AppArmor network mediation
+ *
+ * Copyright (C) 1998-2008 Novell/SUSE
+ * Copyright 2009-2010 Canonical Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ */
+
+#include "include/apparmor.h"
+#include "include/audit.h"
+#include "include/context.h"
+#include "include/net.h"
+#include "include/policy.h"
+
+#include "af_names.h"
+
+static const char *sock_type_names[] = {
+	"unknown(0)",
+	"stream",
+	"dgram",
+	"raw",
+	"rdm",
+	"seqpacket",
+	"dccp",
+	"unknown(7)",
+	"unknown(8)",
+	"unknown(9)",
+	"packet",
+};
+
+struct aa_audit_net {
+	struct aa_audit base;
+
+	int family, type, protocol;
+
+};
+
+/* audit callback for net specific fields */
+static void audit_cb(struct audit_buffer *ab, struct aa_audit *va)
+{
+	struct aa_audit_net *sa = container_of(va, struct aa_audit_net, base);
+
+	if (sa->family || sa->type) {
+		if (address_family_names[sa->family]) {
+			audit_log_format(ab, " family=");
+			audit_log_string(ab, address_family_names[sa->family]);
+		} else {
+			audit_log_format(ab, " family=\"unknown(%d)\"",
+					 sa->family);
+		}
+		if (sock_type_names[sa->type]) {
+			audit_log_format(ab, " sock_type=");
+			audit_log_string(ab, sock_type_names[sa->type]);
+		} else {
+			audit_log_format(ab, " sock_type=\"unknown(%d)\"",
+					 sa->type);
+		}
+		audit_log_format(ab, " protocol=%d", sa->protocol);
+	}
+
+}
+
+/**
+ * aa_audit_net - audit network access
+ * @profile: profile being enforced  (NOT NULL)
+ * @sa: audit data  (NOT NULL)
+ *
+ * Returns: %0 or sa->error else other errorcode on failure
+ */
+static int aa_audit_net(struct aa_profile *profile, struct aa_audit_net *sa)
+{
+	int type = AUDIT_APPARMOR_AUTO;
+
+	if (likely(!sa->base.error)) {
+		u16 audit_mask = profile->net.audit[sa->family];
+		if (likely((AUDIT_MODE(profile) != AUDIT_ALL) &&
+			   !(1 << sa->type & audit_mask)))
+			return 0;
+		type = AUDIT_APPARMOR_AUDIT;
+	} else {
+		u16 quiet_mask = profile->net.quiet[sa->family];
+		u16 kill_mask = 0;
+		u16 denied = (1 << sa->type) & ~quiet_mask;
+
+		if (denied & kill_mask)
+			type = AUDIT_APPARMOR_KILL;
+
+		if ((denied & quiet_mask) &&
+		    AUDIT_MODE(profile) != AUDIT_NOQUIET &&
+		    AUDIT_MODE(profile) != AUDIT_ALL)
+			return COMPLAIN_MODE(profile) ? 0 : sa->base.error;
+	}
+
+	return aa_audit(type, profile, &sa->base, audit_cb);
+}
+
+/**
+ * aa_net_perm - very course network access check
+ * @profile: profile being enforced  (NOT NULL)
+ * @operation: name of the operation being checked  (NOT NULL)
+ * @family: network family
+ * @type:   network type
+ * @protocol: network protocol
+ *
+ * Returns: %0 else error if permission denied
+ */
+int aa_net_perm(struct aa_profile *profile, char *operation,
+		int family, int type, int protocol)
+{
+	u16 family_mask;
+	struct aa_audit_net sa = {
+		.base.operation = operation,
+		.base.gfp_mask = GFP_KERNEL,
+		.family = family,
+		.type = type,
+		.protocol = protocol,
+	};
+
+	if ((family < 0) || (family >= AF_MAX))
+		return -EINVAL;
+
+	if ((type < 0) || (type >= SOCK_MAX))
+		return -EINVAL;
+
+	/* unix domain and netlink sockets are handled by ipc */
+	if (family == AF_UNIX || family == AF_NETLINK)
+		return 0;
+
+	family_mask = profile->net.allowed[family];
+
+	sa.base.error = (family_mask & (1 << type)) ? 0 : -EACCES;
+
+	return aa_audit_net(profile, &sa);
+}
+
+/**
+ * aa_revalidate_sk - Revalidate access to a sock
+ * @sk: sock being revalidated  (NOT NULL)
+ * @operation: name of operation being checked  (NOT NULL)
+ *
+ * Returns: %0 else error if permission denied
+ */
+int aa_revalidate_sk(struct sock *sk, char *operation)
+{
+	struct aa_profile *profile;
+	int error = 0;
+
+	/* aa_revalidate_sk should not be called from interrupt context
+	 * don't mediate these calls as they are not task related
+	 */
+	if (in_interrupt())
+		return 0;
+
+	profile = __aa_current_profile();
+	if (!unconfined(profile))
+		error = aa_net_perm(profile, operation,
+				    sk->sk_family, sk->sk_type,
+				    sk->sk_protocol);
+
+	return error;
+}
--- linux-mvl-dove-2.6.32.orig/security/apparmor/context.c
+++ linux-mvl-dove-2.6.32/security/apparmor/context.c
@@ -0,0 +1,226 @@
+/*
+ * AppArmor security module
+ *
+ * This file contains AppArmor functions used to manipulate object security
+ * contexts.
+ *
+ * Copyright (C) 1998-2008 Novell/SUSE
+ * Copyright 2009-2010 Canonical Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ *
+ *
+ * AppArmor sets confinement on every task, via the the aa_task_cxt and
+ * the aa_task_cxt profile, both of which are required and are not allowed
+ * to be NULL.  The aa_task_cxt is not reference counted and is unique
+ * to each cred (which is reference count).  The profile pointed to by
+ * the task_cxt is reference counted.
+ *
+ * TODO
+ * If a task uses change_hat it currently does not return to the old
+ * cred or task context but instead creates a new one.  Ideally the task
+ * should return to the previous cred if it has not been modified.
+ *
+ */
+
+#include "include/context.h"
+#include "include/policy.h"
+
+/**
+ * aa_alloc_task_context - allocat a new task_cxt
+ * @flags: gfp flags for allocation
+ *
+ * Returns: allocated buffer or NULL on failure
+ */
+struct aa_task_cxt *aa_alloc_task_context(gfp_t flags)
+{
+	return kzalloc(sizeof(struct aa_task_cxt), flags);
+}
+
+/**
+ * aa_free_task_context - free a task_cxt
+ * @cxt: task_cxt to free (MAYBE NULL)
+ */
+void aa_free_task_context(struct aa_task_cxt *cxt)
+{
+	if (cxt) {
+		aa_put_profile(cxt->profile);
+		aa_put_profile(cxt->previous);
+		aa_put_profile(cxt->onexec);
+
+		kzfree(cxt);
+	}
+}
+
+/**
+ * aa_dup_task_context - duplicate a task context, incrementing reference counts
+ * @new: a blank task context      (NOT NULL)
+ * @old: the task context to copy  (NOT NULL)
+ */
+void aa_dup_task_context(struct aa_task_cxt *new, const struct aa_task_cxt *old)
+{
+	*new = *old;
+	aa_get_profile(new->profile);
+	aa_get_profile(new->previous);
+	aa_get_profile(new->onexec);
+}
+
+/**
+ * replace_cxt - replace a context profile
+ * @cxt: task context  (NOT NULL)
+ * @profile: profile to replace cxt group  (NOT NULL)
+ *
+ * Replace context grouping profile reference with @profile
+ */
+static void replace_group(struct aa_task_cxt *cxt, struct aa_profile *profile)
+{
+	if (cxt->profile == profile)
+		return;
+
+	BUG_ON(!profile);
+	if (unconfined(profile) || (cxt->profile->ns != profile->ns)) {
+		/* if switching to unconfined or a different profile namespace
+		 * clear out context state
+		 */
+		aa_put_profile(cxt->previous);
+		aa_put_profile(cxt->onexec);
+		cxt->previous = NULL;
+		cxt->onexec = NULL;
+		cxt->token = 0;
+	}
+	/* be careful switching cxt->profile, when racing replacement it
+	 * is possible that cxt->profile->replacedby is the reference keeping
+	 * @profile valid, so make sure to get its reference before dropping
+	 * the reference on cxt->profile */
+	aa_get_profile(profile);
+	aa_put_profile(cxt->profile);
+	cxt->profile = profile;
+}
+
+/**
+ * aa_replace_current_profiles - replace the current tasks profiles
+ * @profile: new profile  (NOT NULL)
+ *
+ * Returns: 0 or error on failure
+ */
+int aa_replace_current_profiles(struct aa_profile *profile)
+{
+	struct aa_task_cxt *cxt;
+	struct cred *new = prepare_creds();
+	if (!new)
+		return -ENOMEM;
+
+	cxt = new->security;
+	replace_group(cxt, profile);
+	/* todo add user group */
+
+	commit_creds(new);
+	return 0;
+}
+
+/**
+ * aa_set_current_onexec - set the tasks change_profile to happen onexec
+ * @profile: system profile to set at exec  (MAYBE NULL)
+ *
+ * Returns: 0 or error on failure
+ */
+int aa_set_current_onexec(struct aa_profile *profile)
+{
+	struct aa_task_cxt *cxt;
+	struct cred *new = prepare_creds();
+	if (!new)
+		return -ENOMEM;
+
+	cxt = new->security;
+	aa_get_profile(profile);
+	aa_put_profile(cxt->onexec);
+	cxt->onexec = profile;
+
+	commit_creds(new);
+	return 0;
+}
+
+/**
+ * aa_set_current_hat - set the current tasks hat
+ * @profile: profile to set as the current hat  (NOT NULL)
+ * @token: token value that must be specified to change from the hat
+ *
+ * Do switch of tasks hat.  If the task is currently in a hat
+ * validate the token to match.
+ *
+ * Returns: 0 or error on failure
+ */
+int aa_set_current_hat(struct aa_profile *profile, u64 token)
+{
+	struct aa_task_cxt *cxt;
+	struct cred *new = prepare_creds();
+	if (!new)
+		return -ENOMEM;
+	BUG_ON(!profile);
+
+	cxt = new->security;
+	if (!cxt->previous) {
+		cxt->previous = cxt->profile;
+		cxt->token = token;
+	} else if (cxt->token == token) {
+		aa_put_profile(cxt->profile);
+	} else {
+		/* previous_profile && cxt->token != token */
+		abort_creds(new);
+		return -EACCES;
+	}
+	cxt->profile = aa_get_profile(aa_newest_version(profile));
+	/* clear exec on switching context */
+	aa_put_profile(cxt->onexec);
+	cxt->onexec = NULL;
+
+	commit_creds(new);
+	return 0;
+}
+
+/**
+ * aa_restore_previous_profile - exit from hat context restoring the profile
+ * @token: the token that must be matched to exit hat context
+ *
+ * Attempt to return out of a hat to the previous profile.  The token
+ * must match the stored token value.
+ *
+ * Returns: 0 or error of failure
+ */
+int aa_restore_previous_profile(u64 token)
+{
+	struct aa_task_cxt *cxt;
+	struct cred *new = prepare_creds();
+	if (!new)
+		return -ENOMEM;
+
+	cxt = new->security;
+	if (cxt->token != token) {
+		abort_creds(new);
+		return -EACCES;
+	}
+	/* ignore restores when there is no saved profile */
+	if (!cxt->previous) {
+		abort_creds(new);
+		return 0;
+	}
+
+	aa_put_profile(cxt->profile);
+	cxt->profile = aa_newest_version(cxt->previous);
+	BUG_ON(!cxt->profile);
+	if (unlikely(cxt->profile != cxt->previous)) {
+		aa_get_profile(cxt->profile);
+		aa_put_profile(cxt->previous);
+	}
+	/* clear exec && prev information when restoring to previous context */
+	cxt->previous = NULL;
+	cxt->token = 0;
+	aa_put_profile(cxt->onexec);
+	cxt->onexec = NULL;
+
+	commit_creds(new);
+	return 0;
+}
--- linux-mvl-dove-2.6.32.orig/security/apparmor/Kconfig
+++ linux-mvl-dove-2.6.32/security/apparmor/Kconfig
@@ -0,0 +1,40 @@
+config SECURITY_APPARMOR
+	bool "AppArmor support"
+	depends on SECURITY
+	select AUDIT
+	select SECURITY_PATH
+	select SECURITYFS
+	select SECURITY_NETWORK
+	default n
+	help
+	  This enables the AppArmor security module.
+	  Required userspace tools (if they are not included in your
+	  distribution) and further information may be found at
+	  <http://forge.novell.com/modules/xfmod/project/?apparmor>
+
+	  If you are unsure how to answer this question, answer N.
+
+config SECURITY_APPARMOR_BOOTPARAM_VALUE
+	int "AppArmor boot parameter default value"
+	depends on SECURITY_APPARMOR
+	range 0 1
+	default 1
+	help
+	  This option sets the default value for the kernel parameter
+	  'apparmor', which allows AppArmor to be enabled or disabled
+          at boot.  If this option is set to 0 (zero), the AppArmor
+	  kernel parameter will default to 0, disabling AppArmor at
+	  bootup.  If this option is set to 1 (one), the AppArmor
+	  kernel parameter will default to 1, enabling AppArmor at
+	  bootup.
+
+	  If you are unsure how to answer this question, answer 1.
+
+config SECURITY_APPARMOR_COMPAT_24
+	bool "Enable AppArmor 2.4 compatability"
+	depends on SECURITY_APPARMOR
+	default y
+	help
+	  This option enables compatability with AppArmor 2.4.  It is
+          recommended if compatability with older versions of AppArmor
+          is desired.
--- linux-mvl-dove-2.6.32.orig/security/apparmor/procattr.c
+++ linux-mvl-dove-2.6.32/security/apparmor/procattr.c
@@ -0,0 +1,152 @@
+/*
+ * AppArmor security module
+ *
+ * This file contains AppArmor /proc/<pid>/attr/ interface functions
+ *
+ * Copyright (C) 1998-2008 Novell/SUSE
+ * Copyright 2009-2010 Canonical Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ */
+
+#include "include/apparmor.h"
+#include "include/policy.h"
+#include "include/domain.h"
+
+/**
+ * aa_getprocattr - Return the profile information for @profile
+ * @profile: the profile to print profile info about  (NOT NULL)
+ * @string: the string that will contain the profile and namespace info (!NULL)
+ *
+ * Returns: length of @string on success else error on failure
+ *
+ * Requires: profile != NULL
+ *
+ * Creates a string containing the namespace_name://profile_name for
+ * @profile.
+ *
+ * Returns: size of string placed in @string else error code on failure
+ */
+int aa_getprocattr(struct aa_profile *profile, char **string)
+{
+	char *str;
+	int len = 0, mode_len, name_len, ns_len = 0;
+	const char *mode_str = profile_mode_names[profile->mode];
+	struct aa_namespace *ns = profile->ns;
+	char *s;
+
+	mode_len = strlen(mode_str) + 3;	/* + 3 for _() */
+	name_len = strlen(profile->base.hname);
+	if (ns != root_ns)
+		ns_len = strlen(ns->base.name) + 3; /*+ 3 for :// */
+	len = mode_len + ns_len + name_len + 1;	    /*+ 1 for \n */
+	s = str = kmalloc(len + 1, GFP_ATOMIC);	    /* + 1 \0 */
+	if (!str)
+		return -ENOMEM;
+
+	if (ns_len) {
+		sprintf(s, "%s://", ns->base.name);
+		s += ns_len;
+	}
+	if (profile->flags & PFLAG_UNCONFINED) {
+		sprintf(s, "%s\n", profile->base.hname);
+		/* mode string not being appended so reduce string size */
+		len -= mode_len;
+	} else
+		sprintf(s, "%s (%s)\n", profile->base.hname, mode_str);
+	*string = str;
+
+	/* NOTE: len does not include \0 of string, not saved as part of file */
+	return len;
+}
+
+/**
+ * split_token_from_name - separate a string of form  <token>^<name>
+ * @op: operation name  (NOT NULL)
+ * @args: string to parse  (NOT NULL)
+ * @token: stores returned parsed token value  (NOT NULL)
+ *
+ * Returns: start position of name after token else NULL on failure
+ */
+static char *split_token_from_name(const char *op, char *args, u64 * token)
+{
+	char *name;
+
+	*token = simple_strtoull(args, &name, 16);
+	if ((name == args) || *name != '^') {
+		AA_ERROR("%s: Invalid input '%s'", op, args);
+		return ERR_PTR(-EINVAL);
+	}
+
+	name++;			/* skip ^ */
+	if (!*name)
+		name = NULL;
+	return name;
+}
+
+/**
+ * aa_setprocattr_chagnehat - handle procattr interface to change_hat
+ * @args: args received from writing to /proc/<pid>/attr/current (NOT NULL)
+ * @size: size of the args
+ * @test: true if this is a test of change_hat permissions
+ *
+ * Returns: %0 or error code if change_hat fails
+ */
+int aa_setprocattr_changehat(char *args, size_t size, int test)
+{
+	char *hat;
+	u64 token;
+	const char *hats[16];		/* current hard limit on # of names */
+	int count = 0;
+
+	hat = split_token_from_name("change_hat", args, &token);
+	if (IS_ERR(hat))
+		return PTR_ERR(hat);
+
+	if (!hat && !token) {
+		AA_ERROR("change_hat: Invalid input, NULL hat and NULL magic");
+		return -EINVAL;
+	}
+
+	if (hat) {
+		/* set up hat name vector, args guarenteed null terminated
+		 * at args[size]
+		 */
+		char *end = args + size;
+		for (count = 0; (hat < end) && count < 16; ++count) {
+			char *next = hat + strlen(hat) + 1;
+			hats[count] = hat;
+			hat = next;
+		}
+	}
+
+	AA_DEBUG("%s: Magic 0x%llx Hat '%s'\n",
+		 __func__, token, hat ? hat : NULL);
+
+	return aa_change_hat(hats, count, token, test);
+}
+
+/**
+ * aa_setprocattr_changeprofile - handle procattr interface to changeprofile
+ * @fqname: args received from writting to /proc/<pid>/attr/current (NOT NULL)
+ * @onexec: true if change_profile should be delayed until exec
+ * @test: true if this is a test of change_profile permissions
+ *
+ * Returns: %0 or error code if change_profile fails
+ */
+int aa_setprocattr_changeprofile(char *fqname, int onexec, int test)
+{
+	char *name, *ns_name;
+
+	name = aa_split_fqname(fqname, &ns_name);
+	return aa_change_profile(ns_name, name, onexec, test);
+}
+
+int aa_setprocattr_permipc(char *fqname)
+{
+	/* TODO: add ipc permission querying */
+	return -ENOTSUPP;
+}
--- linux-mvl-dove-2.6.32.orig/security/apparmor/capability.c
+++ linux-mvl-dove-2.6.32/security/apparmor/capability.c
@@ -0,0 +1,146 @@
+/*
+ * AppArmor security module
+ *
+ * This file contains AppArmor capability mediation functions
+ *
+ * Copyright (C) 1998-2008 Novell/SUSE
+ * Copyright 2009-2010 Canonical Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ */
+
+#include <linux/capability.h>
+#include <linux/errno.h>
+#include <linux/gfp.h>
+
+#include "include/apparmor.h"
+#include "include/capability.h"
+#include "include/context.h"
+#include "include/policy.h"
+#include "include/audit.h"
+
+/*
+ * Table of capability names: we generate it from capabilities.h.
+ */
+#include "capability_names.h"
+
+struct audit_cache {
+	struct aa_profile *profile;
+	kernel_cap_t caps;
+};
+
+static DEFINE_PER_CPU(struct audit_cache, audit_cache);
+
+struct aa_audit_caps {
+	struct aa_audit base;
+
+	int cap;
+};
+
+/**
+ * audit_cb - call back for capability components of audit struct
+ * @ab - audit buffer   (NOT NULL)
+ * @va - audit struct to audit data from  (NOT NULL)
+ */
+static void audit_cb(struct audit_buffer *ab, struct aa_audit *va)
+{
+	struct aa_audit_caps *sa = container_of(va, struct aa_audit_caps, base);
+
+	audit_log_format(ab, " name=");
+	audit_log_untrustedstring(ab, capability_names[sa->cap]);
+}
+
+/**
+ * aa_audit_caps - audit a capability
+ * @profile: profile confining task
+ * @sa: audit structure containing data to audit
+ *
+ * Do auditing of capability and handle, audit/complain/kill modes switching
+ * and duplicate message elimination.
+ *
+ * returns: 0 or sa->error on succes,  error code on failure
+ */
+static int aa_audit_caps(struct aa_profile *profile, struct aa_audit_caps *sa)
+{
+	struct audit_cache *ent;
+	int type = AUDIT_APPARMOR_AUTO;
+
+	if (likely(!sa->base.error)) {
+		/* test if auditing is being forced */
+		if (likely((AUDIT_MODE(profile) != AUDIT_ALL) &&
+			   !cap_raised(profile->caps.audit, sa->cap)))
+			return 0;
+		type = AUDIT_APPARMOR_AUDIT;
+	} else if (DO_KILL(profile) ||
+		   cap_raised(profile->caps.kill, sa->cap)) {
+		type = AUDIT_APPARMOR_KILL;
+	} else if (cap_raised(profile->caps.quiet, sa->cap) &&
+		   AUDIT_MODE(profile) != AUDIT_NOQUIET &&
+		   AUDIT_MODE(profile) != AUDIT_ALL) {
+		/* quiet auditing */
+		return sa->base.error;
+	}
+
+	/* Do simple duplicate message elimination */
+	ent = &get_cpu_var(audit_cache);
+	if (profile == ent->profile && cap_raised(ent->caps, sa->cap)) {
+		put_cpu_var(audit_cache);
+		if (COMPLAIN_MODE(profile))
+			return 0;
+		return sa->base.error;
+	} else {
+		aa_put_profile(ent->profile);
+		ent->profile = aa_get_profile(profile);
+		cap_raise(ent->caps, sa->cap);
+	}
+	put_cpu_var(audit_cache);
+
+	return aa_audit(type, profile, &sa->base, audit_cb);
+}
+
+/**
+ * aa_profile_capable - test if profile allows use of capability @cap
+ * @profile: profile being enforced    (NOT NULL, NOT unconfined)
+ * @cap: capability to test if allowed
+ *
+ * Returns: 0 if allowed else -EPERM
+ */
+static int aa_profile_capable(struct aa_profile *profile, int cap)
+{
+	return cap_raised(profile->caps.allowed, cap) ? 0 : -EPERM;
+}
+
+/**
+ * aa_capable - test permission to use capability
+ * @task: task doing capability test against
+ * @profile: profile confining @task
+ * @cap: capability to be tested
+ * @audit: whether an audit record should be generated
+ *
+ * Look up capability in profile capability set.
+ *
+ * Returns: 0 on success, or else an error code.
+ */
+int aa_capable(struct task_struct *task, struct aa_profile *profile, int cap,
+	       int audit)
+{
+	int error = aa_profile_capable(profile, cap);
+	struct aa_audit_caps sa = {
+		.base.operation = "capable",
+		.base.task = task,
+		.base.gfp_mask = GFP_ATOMIC,
+		.base.error = error,
+		.cap = cap,
+	};
+
+	if (!audit) {
+		if (COMPLAIN_MODE(profile))
+			return 0;
+		return error;
+	}
+
+	return aa_audit_caps(profile, &sa);
+}
--- linux-mvl-dove-2.6.32.orig/security/apparmor/file.c
+++ linux-mvl-dove-2.6.32/security/apparmor/file.c
@@ -0,0 +1,556 @@
+/*
+ * AppArmor security module
+ *
+ * This file contains AppArmor mediation of files
+ *
+ * Copyright (C) 1998-2008 Novell/SUSE
+ * Copyright 2009-2010 Canonical Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ */
+
+#include "include/apparmor.h"
+#include "include/audit.h"
+#include "include/file.h"
+#include "include/match.h"
+#include "include/path.h"
+#include "include/policy.h"
+
+struct file_perms nullperms;
+
+/**
+ * aa_audit_file_sub_mask - convert a permission mask into string
+ * @buffer: buffer to write string to  (NOT NULL)
+ * @mask: permission mask to convert
+ * @xindex: xindex
+ *
+ * NOTE: caller must make sure buffer is large enough for @mask
+ */
+static void aa_audit_file_sub_mask(char *buffer, u16 mask, u16 xindex)
+{
+	char *m = buffer;
+
+	if (mask & AA_EXEC_MMAP)
+		*m++ = 'm';
+	if (mask & MAY_READ)
+		*m++ = 'r';
+	if (mask & (MAY_WRITE | AA_MAY_CHMOD | AA_MAY_CHOWN))
+		*m++ = 'w';
+	else if (mask & MAY_APPEND)
+		*m++ = 'a';
+	if (mask & AA_MAY_CREATE)
+		*m++ = 'c';
+	if (mask & AA_MAY_DELETE)
+		*m++ = 'd';
+	if (mask & AA_MAY_LINK)
+		*m++ = 'l';
+	if (mask & AA_MAY_LOCK)
+		*m++ = 'k';
+	if (mask & MAY_EXEC)
+		*m++ = 'x';
+	*m++ = '\0';
+}
+
+/**
+ * aa_audit_file_mask - convert mask to owner::other string
+ * @buffer: buffer to write string to (NOT NULL)
+ * @mask: permission mask to convert
+ * @xindex: xindex
+ * @owner: if the mask is for owner or other
+ */
+static void aa_audit_file_mask(struct audit_buffer *ab, u16 mask, int xindex,
+			       int owner)
+{
+	char str[10];
+
+	if (owner) {
+		aa_audit_file_sub_mask(str, mask, xindex);
+		strcat(str, "::");
+	} else {
+		strcpy(str, "::");
+		aa_audit_file_sub_mask(str + 2, mask, xindex);
+	}
+	audit_log_string(ab, str);
+}
+
+/**
+ * file_audit_cb - call back for file specific audit fields
+ * @ab: audit_buffer  (NOT NULL)
+ * @va: audit struct to audit values of  (NOT NULL)
+ */
+static void file_audit_cb(struct audit_buffer *ab, struct aa_audit *va)
+{
+	struct aa_audit_file *sa = container_of(va, struct aa_audit_file, base);
+	u16 denied = sa->request & ~sa->perms.allowed;
+	uid_t fsuid;
+
+	fsuid = current_fsuid();
+
+	if (sa->request & AA_AUDIT_FILE_MASK) {
+		audit_log_format(ab, " requested_mask=");
+		aa_audit_file_mask(ab, sa->request, AA_X_NONE,
+				   fsuid == sa->cond->uid);
+	}
+	if (denied & AA_AUDIT_FILE_MASK) {
+		audit_log_format(ab, " denied_mask=");
+		aa_audit_file_mask(ab, denied, sa->perms.xindex,
+				   fsuid == sa->cond->uid);
+	}
+	if (sa->request & AA_AUDIT_FILE_MASK) {
+		audit_log_format(ab, " fsuid=%d", fsuid);
+		audit_log_format(ab, " ouid=%d", sa->cond->uid);
+	}
+
+	if (sa->name) {
+		audit_log_format(ab, " name=");
+		audit_log_untrustedstring(ab, sa->name);
+	}
+
+	if (sa->name2) {
+		audit_log_format(ab, " name2=");
+		audit_log_untrustedstring(ab, sa->name2);
+	}
+
+	if (sa->name3) {
+		audit_log_format(ab, " name3=");
+		audit_log_untrustedstring(ab, sa->name3);
+	}
+}
+
+/**
+ * aa_audit_file - handle the auditing of file operations
+ * @profile: the profile being enforced  (NOT NULL)
+ * @sa: file auditing context  (NOT NULL)
+ *
+ * Returns: %0 or error on failure
+ */
+int aa_audit_file(struct aa_profile *profile, struct aa_audit_file *sa)
+{
+	int type = AUDIT_APPARMOR_AUTO;
+
+	if (likely(!sa->base.error)) {
+		u16 mask = sa->perms.audit;
+
+		if (unlikely(AUDIT_MODE(profile) == AUDIT_ALL))
+			mask = 0xffff;
+
+		/* mask off perms that are not being force audited */
+		sa->request &= mask;
+
+		if (likely(!sa->request))
+			return 0;
+		type = AUDIT_APPARMOR_AUDIT;
+	} else {
+		/* only report permissions that were denied */
+		sa->request = sa->request & ~sa->perms.allowed;
+
+		if (sa->request & sa->perms.kill)
+			type = AUDIT_APPARMOR_KILL;
+
+		/* quiet known rejects, assumes quiet and kill do not overlap */
+		if ((sa->request & sa->perms.quiet) &&
+		    AUDIT_MODE(profile) != AUDIT_NOQUIET &&
+		    AUDIT_MODE(profile) != AUDIT_ALL)
+			sa->request &= ~sa->perms.quiet;
+
+		if (!sa->request)
+			return COMPLAIN_MODE(profile) ? 0 : sa->base.error;
+	}
+	return aa_audit(type, profile, &sa->base, file_audit_cb);
+}
+
+/**
+ * aa_compute_perms - convert dfa compressed perms to internal perms
+ * @dfa: dfa to compute perms for   (NOT NULL)
+ * @state: state in dfa
+ * @cond:  conditions to consider  (NOT NULL)
+ *
+ * TODO: convert from dfa + state to permission entry, do computation conversion
+ *       at load time.
+ *
+ * Returns: computed permission set
+ */
+static struct file_perms aa_compute_perms(struct aa_dfa *dfa,
+					  unsigned int state,
+					  struct path_cond *cond)
+{
+	struct file_perms perms;
+
+	/* FIXME: change over to new dfa format
+	 * currently file perms are encoded in the dfa, new format
+	 * splits the permissions from the dfa.  This mapping can be
+	 * done at profile load
+	 */
+	perms.kill = 0;
+	perms.dindex = 0;
+
+	if (current_fsuid() == cond->uid) {
+		perms.allowed = dfa_user_allow(dfa, state);
+		perms.audit = dfa_user_audit(dfa, state);
+		perms.quiet = dfa_user_quiet(dfa, state);
+		perms.xindex = dfa_user_xindex(dfa, state);
+	} else {
+		perms.allowed = dfa_other_allow(dfa, state);
+		perms.audit = dfa_other_audit(dfa, state);
+		perms.quiet = dfa_other_quiet(dfa, state);
+		perms.xindex = dfa_other_xindex(dfa, state);
+	}
+	/* in the old mapping MAY_WRITE implies
+	 * AA_MAY_CREATE | AA_MAY_CHMOD | AA_MAY_CHOWN */
+	if (perms.allowed & MAY_WRITE)
+		perms.allowed |= AA_MAY_CREATE | AA_MAY_CHMOD | AA_MAY_CHOWN |
+			AA_MAY_DELETE;
+	if (perms.audit & MAY_WRITE)
+		perms.audit |= AA_MAY_CREATE | AA_MAY_CHMOD | AA_MAY_CHOWN |
+			AA_MAY_DELETE;
+	if (perms.quiet & MAY_WRITE)
+		perms.quiet |= AA_MAY_CREATE | AA_MAY_CHMOD | AA_MAY_CHOWN |
+			AA_MAY_DELETE;
+
+	/* in the old mapping AA_MAY_LOCK and link subset are overlayed
+	 * and only determined by which part of a pair they are  in
+	 */
+	if (perms.allowed & AA_MAY_LOCK)
+		perms.allowed |= AA_LINK_SUBSET;
+
+	/* change_profile wasn't determined by ownership in old mapping */
+	if (ACCEPT_TABLE(dfa)[state] & 0x80000000)
+		perms.allowed |= AA_MAY_CHANGE_PROFILE;
+
+	return perms;
+}
+
+/**
+ * aa_str_perms - find permission that match @name
+ * @dfa: to match against  (NOT NULL)
+ * @state: state to start matching in
+ * @name: string to match against dfa  (NOT NULL)
+ * @cond: conditions to consider for permission set computation  (NOT NULL)
+ * @rstate: if !NULL return state match finished in (MAYBE NULL)
+ *
+ * TODO: Update when permission mapping is moved to load time
+ *
+ * Returns: file permission for @name
+ */
+struct file_perms aa_str_perms(struct aa_dfa *dfa, unsigned int start,
+			       const char *name, struct path_cond *cond,
+			       unsigned int *rstate)
+{
+	unsigned int state;
+	if (!dfa)
+		return nullperms;
+
+	state = aa_dfa_match(dfa, start, name);
+
+	if (rstate)
+		*rstate = state;
+
+	/* TODO: convert to new dfa format */
+
+	return aa_compute_perms(dfa, state, cond);
+}
+
+/**
+ * aa_pathstr_perm - do permission check & audit for @name
+ * @profile: profile being enforced  (NOT NULL)
+ * @op: name of the operation  (NOT NULL)
+ * @name: path string to check permission for  (NOT NULL)
+ * @request: requested permissions
+ * @cond: conditional info for this request  (NOT NULL)
+ *
+ * Do permission check for paths that are predefined.  This fn will
+ * be removed once security_sysctl goes away.
+ *
+ * Returns: %0 else error if access denied or other error
+ */
+int aa_pathstr_perm(struct aa_profile *profile, const char *op,
+		    const char *name, u16 request, struct path_cond *cond)
+{
+	struct aa_audit_file sa = {
+		.base.operation = op,
+		.base.gfp_mask = GFP_KERNEL,
+		.request = request,
+		.name = name,
+		.cond = cond,
+	};
+
+	sa.perms = aa_str_perms(profile->file.dfa, profile->file.start, sa.name,
+				cond,
+				NULL);
+	if (request & ~sa.perms.allowed)
+		sa.base.error = -EACCES;
+	return aa_audit_file(profile, &sa);
+}
+
+/**
+ * aa_path_perm - do permissions check & audit for @path
+ * @profile: profile being enforced  (NOT NULL)
+ * @operation: name of the operation being enforced  (NOT NULL)
+ * @path: path to check permissions of  (NOT NULL)
+ * @request: requested permissions
+ * @cond: conditional info for this request  (NOT NULL)
+ *
+ * Returns: %0 else error if access denied or other error
+ */
+int aa_path_perm(struct aa_profile *profile, const char *operation,
+		 struct path *path, u16 request, struct path_cond *cond)
+{
+	char *buffer, *name;
+	struct aa_audit_file sa = {
+		.base.operation = operation,
+		.base.gfp_mask = GFP_KERNEL,
+		.request = request,
+		.cond = cond,
+	};
+	int flags = profile->path_flags |
+		(S_ISDIR(cond->mode) ? PATH_IS_DIR : 0);
+	/* buffer freed below - name is pointer inside buffer */
+	sa.base.error = aa_get_name(path, flags, &buffer, &name);
+	sa.name = name;
+	if (sa.base.error) {
+		sa.perms = nullperms;
+		if (sa.base.error == -ENOENT)
+			sa.base.info = "Failed name lookup - deleted entry";
+		else if (sa.base.error == -ESTALE)
+			sa.base.info = "Failed name lookup - disconnected path";
+		else if (sa.base.error == -ENAMETOOLONG)
+			sa.base.info = "Failed name lookup - name too long";
+		else
+			sa.base.info = "Failed name lookup";
+	} else {
+		sa.perms = aa_str_perms(profile->file.dfa, profile->file.start,
+					sa.name, cond, NULL);
+		if (request & ~sa.perms.allowed)
+			sa.base.error = -EACCES;
+	}
+	sa.base.error = aa_audit_file(profile, &sa);
+	kfree(buffer);
+
+	return sa.base.error;
+}
+
+/**
+ * xindex_is_subset - helper for aa_path_link
+ * @link: link permission set
+ * @target: target permission set
+ *
+ * test target x permissions are equal OR a subset of link x permissions
+ * this is done as part of the subset test, where a hardlink must have
+ * a subset of permissions that the target has.
+ *
+ * Returns: %1 if subset else %0
+ */
+static inline bool xindex_is_subset(u16 link, u16 target)
+{
+	if (((link & ~AA_X_UNSAFE) != (target & ~AA_X_UNSAFE)) ||
+	    ((link & AA_X_UNSAFE) && !(target & AA_X_UNSAFE)))
+		return 0;
+
+	return 1;
+}
+
+/**
+ * aa_path_link - Handle hard link permission check
+ * @profile: the profile being enforced  (NOT NULL)
+ * @old_dentry: the target dentry  (NOT NULL)
+ * @new_dir: directory the new link will be created in  (NOT NULL)
+ * @new_dentry: the link being created  (NOT NULL)
+ *
+ * Handle the permission test for a link & target pair.  Permission
+ * is encoded as a pair where the link permission is determined
+ * first, and if allowed, the target is tested.  The target test
+ * is done from the point of the link match (not start of DFA)
+ * making the target permission dependent on the link permission match.
+ *
+ * The subset test if required forces that permissions granted
+ * on link are a subset of the permission granted to target.
+ *
+ * Returns: %0 if allowed else error
+ */
+int aa_path_link(struct aa_profile *profile, struct dentry *old_dentry,
+		 struct path *new_dir, struct dentry *new_dentry)
+{
+	struct path link = { new_dir->mnt, new_dentry };
+	struct path target = { new_dir->mnt, old_dentry };
+	struct path_cond cond = {
+		old_dentry->d_inode->i_uid,
+		old_dentry->d_inode->i_mode
+	};
+	char *buffer = NULL, *buffer2 = NULL;
+	char *lname, *tname;
+	struct file_perms perms;
+	unsigned int state;
+
+	struct aa_audit_file sa = {
+		.base.operation = "link",
+		.base.gfp_mask = GFP_KERNEL,
+		.request = AA_MAY_LINK,
+		.cond = &cond,
+		.perms = nullperms,
+	};
+	/* buffer freed below, lname is pointer in buffer */
+	sa.base.error = aa_get_name(&link, profile->path_flags, &buffer,
+				    &lname);
+	sa.name = lname;
+	if (sa.base.error)
+		goto audit;
+
+	/* buffer2 freed below, tname is pointer in buffer2 */
+	sa.base.error = aa_get_name(&target, profile->path_flags, &buffer2,
+				    &tname);
+	sa.name2 = tname;
+	if (sa.base.error)
+		goto audit;
+
+	sa.base.error = -EACCES;
+
+	/* aa_str_perms - handles the case of the dfa being NULL */
+	sa.perms = aa_str_perms(profile->file.dfa, profile->file.start, lname,
+				&cond, &state);
+	sa.perms.audit &= AA_MAY_LINK;
+	sa.perms.quiet &= AA_MAY_LINK;
+	sa.perms.kill &= AA_MAY_LINK;
+
+	if (!(sa.perms.allowed & AA_MAY_LINK))
+		goto audit;
+
+	/* test to see if target can be paired with link */
+	state = aa_dfa_null_transition(profile->file.dfa, state,
+				       profile->flags & PFLAG_OLD_NULL_TRANS);
+	perms = aa_str_perms(profile->file.dfa, state, tname, &cond, NULL);
+	if (!(perms.allowed & AA_MAY_LINK)) {
+		sa.base.info = "target restricted";
+		goto audit;
+	}
+
+	/* done if link subset test is not required */
+	if (!(perms.allowed & AA_LINK_SUBSET))
+		goto done_tests;
+
+	/* Do link perm subset test requiring allowed permission on link are a
+	 * subset of the allowed permissions on target.
+	 */
+	perms = aa_str_perms(profile->file.dfa, profile->file.start, tname,
+			     &cond, NULL);
+
+	/* AA_MAY_LINK is not considered in the subset test */
+	sa.request = sa.perms.allowed & ~AA_MAY_LINK;
+	sa.perms.allowed &= perms.allowed | AA_MAY_LINK;
+
+	sa.request |= AA_AUDIT_FILE_MASK & (sa.perms.allowed & ~perms.allowed);
+	if (sa.request & ~sa.perms.allowed) {
+		goto audit;
+	} else if ((sa.perms.allowed & MAY_EXEC) &&
+		   !xindex_is_subset(sa.perms.xindex, perms.xindex)) {
+		sa.perms.allowed &= ~MAY_EXEC;
+		sa.request |= MAY_EXEC;
+		sa.base.info = "link not subset of target";
+		goto audit;
+	}
+
+done_tests:
+	sa.base.error = 0;
+
+audit:
+	sa.base.error = aa_audit_file(profile, &sa);
+	kfree(buffer);
+	kfree(buffer2);
+
+	return sa.base.error;
+}
+
+/**
+ * aa_is_deleted_file - test if a file has been completely unlinked
+ * @dentry: dentry of file to test for deletion  (NOT NULL)
+ *
+ * Returns: %1 if deleted else %0
+ */
+static inline bool aa_is_deleted_file(struct dentry *dentry)
+{
+	if (d_unlinked(dentry) && dentry->d_inode->i_nlink == 0)
+		return 1;
+	return 0;
+}
+
+/**
+ * aa_file_common_perm - core permission check & audit for files
+ * @profile: profile being enforced   (NOT NULL)
+ * @operation: name of operation      (NOT NULL)
+ * @file: file to check permissions of  (NOT NULL)
+ * @request: requested permissions
+ * @name: path name to revalidate permission on  (MAYBE NULL if @error != 0)
+ * @error: error result of name lookup when find @name
+ *
+ * Returns: %0 if access allowed else %1
+ */
+static int aa_file_common_perm(struct aa_profile *profile,
+			       const char *operation, struct file *file,
+			       u16 request, const char *name, int error)
+{
+	struct path_cond cond = {
+		.uid = file->f_path.dentry->d_inode->i_uid,
+		.mode = file->f_path.dentry->d_inode->i_mode
+	};
+	struct aa_audit_file sa = {
+		.base.operation = operation,
+		.base.gfp_mask = GFP_KERNEL,
+		.request = request,
+		.base.error = error,
+		.name = name,
+		.cond = &cond,
+	};
+
+	if (sa.base.error) {
+		sa.perms = nullperms;
+		if (sa.base.error == -ENOENT &&
+		    aa_is_deleted_file(file->f_path.dentry)) {
+			/* Access to open files that are deleted are
+			 * give a pass (implicit delegation)
+			 */
+			sa.base.error = 0;
+			sa.perms.allowed = sa.request;
+		} else if (sa.base.error == -ENOENT)
+			sa.base.info = "Failed name lookup - deleted entry";
+		else if (sa.base.error == -ESTALE)
+			sa.base.info = "Failed name lookup - disconnected path";
+		else if (sa.base.error == -ENAMETOOLONG)
+			sa.base.info = "Failed name lookup - name too long";
+		else
+			sa.base.info = "Failed name lookup";
+	} else {
+		sa.perms = aa_str_perms(profile->file.dfa, profile->file.start,
+					sa.name, &cond, NULL);
+		if (request & ~sa.perms.allowed)
+			sa.base.error = -EACCES;
+	}
+	sa.base.error = aa_audit_file(profile, &sa);
+
+	return sa.base.error;
+}
+
+/**
+ * aa_file_perm - do permission revalidation check & audit for @file
+ * @profile: profile being enforced   (NOT NULL)
+ * @operation: name of the operation  (NOT NULL)
+ * @file: file to revalidate access permissions on  (NOT NULL)
+ * @request: requested permissions
+ *
+ * Returns: %0 if access allowed else error
+ */
+int aa_file_perm(struct aa_profile *profile, const char *operation,
+		 struct file *file, u16 request)
+{
+	char *buffer, *name;
+	umode_t mode = file->f_path.dentry->d_inode->i_mode;
+	/* buffer freed below, name is a pointer inside of buffer */
+	int flags = profile->path_flags | (S_ISDIR(mode) ? PATH_IS_DIR : 0);
+	int error = aa_get_name(&file->f_path, flags, &buffer, &name);
+
+	error = aa_file_common_perm(profile, operation, file, request, name,
+				    error);
+	kfree(buffer);
+	return error;
+}
--- linux-mvl-dove-2.6.32.orig/security/apparmor/lsm.c
+++ linux-mvl-dove-2.6.32/security/apparmor/lsm.c
@@ -0,0 +1,1079 @@
+/*
+ * AppArmor security module
+ *
+ * This file contains AppArmor LSM hooks.
+ *
+ * Copyright (C) 1998-2008 Novell/SUSE
+ * Copyright 2009-2010 Canonical Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ */
+
+#include <linux/security.h>
+#include <linux/moduleparam.h>
+#include <linux/mm.h>
+#include <linux/mman.h>
+#include <linux/mount.h>
+#include <linux/namei.h>
+#include <linux/ptrace.h>
+#include <linux/ctype.h>
+#include <linux/sysctl.h>
+#include <linux/audit.h>
+#include <net/sock.h>
+
+#include "include/apparmor.h"
+#include "include/apparmorfs.h"
+#include "include/audit.h"
+#include "include/capability.h"
+#include "include/context.h"
+#include "include/file.h"
+#include "include/ipc.h"
+#include "include/net.h"
+#include "include/path.h"
+#include "include/policy.h"
+#include "include/procattr.h"
+
+/* Flag indicating whether initialization completed */
+int apparmor_initialized;
+
+/*
+ * LSM hook functions
+ */
+
+/*
+ * free the associated aa_task_cxt and put its profiles
+ */
+static void apparmor_cred_free(struct cred *cred)
+{
+	aa_free_task_context(cred->security);
+	cred->security = NULL;
+}
+
+/*
+ * allocate the apparmor part of blank credentials
+ */
+static int apparmor_cred_alloc_blank(struct cred *cred, gfp_t gfp)
+{
+	/* freed by apparmor_cred_free */
+	struct aa_task_cxt *cxt = aa_alloc_task_context(gfp);
+	if (!cxt)
+		return -ENOMEM;
+
+	cred->security = cxt;
+	return 0;
+}
+
+/*
+ * prepare new aa_task_cxt for modification by prepare_cred block
+ */
+static int apparmor_cred_prepare(struct cred *new, const struct cred *old,
+				 gfp_t gfp)
+{
+	/* freed by apparmor_cred_free */
+	struct aa_task_cxt *cxt = aa_alloc_task_context(gfp);
+	if (!cxt)
+		return -ENOMEM;
+
+	aa_dup_task_context(cxt, old->security);
+	new->security = cxt;
+	return 0;
+}
+
+/*
+ * transfer the apparmor data to a blank set of creds
+ */
+static void apparmor_cred_transfer(struct cred *new, const struct cred *old)
+{
+	const struct aa_task_cxt *old_cxt = old->security;
+	struct aa_task_cxt *new_cxt = new->security;
+
+	aa_dup_task_context(new_cxt, old_cxt);
+}
+
+static int apparmor_ptrace_access_check(struct task_struct *child,
+					unsigned int mode)
+{
+	int rc;
+
+	rc = cap_ptrace_access_check(child, mode);
+	if (rc)
+		return rc;
+
+	return aa_ptrace(current, child, mode);
+}
+
+static int apparmor_ptrace_traceme(struct task_struct *parent)
+{
+	return aa_ptrace(parent, current, PTRACE_MODE_ATTACH);
+}
+
+/* Derived from security/commoncap.c:cap_capget */
+static int apparmor_capget(struct task_struct *target, kernel_cap_t *effective,
+			   kernel_cap_t *inheritable, kernel_cap_t *permitted)
+{
+	struct aa_profile *profile;
+	const struct cred *cred;
+
+	rcu_read_lock();
+	cred = __task_cred(target);
+	profile = aa_cred_profile(cred);
+
+	*effective = cred->cap_effective;
+	*inheritable = cred->cap_inheritable;
+	*permitted = cred->cap_permitted;
+
+	if (!unconfined(profile))
+		*effective = cap_intersect(*effective, profile->caps.allowed);
+	rcu_read_unlock();
+
+	return 0;
+}
+
+static int apparmor_capable(struct task_struct *task, const struct cred *cred,
+			    int cap, int audit)
+{
+	struct aa_profile *profile;
+	/* cap_capable returns 0 on success, else -EPERM */
+	int error = cap_capable(task, cred, cap, audit);
+
+	profile = aa_cred_profile(cred);
+	if (!error  && !unconfined(profile))
+		error = aa_capable(task, profile, cap, audit);
+
+	return error;
+}
+
+static int apparmor_sysctl(struct ctl_table *table, int op)
+{
+	int error = 0;
+	struct aa_profile *profile = aa_current_profile();
+
+	if (!unconfined(profile)) {
+		char *buffer, *name;
+		int mask;
+
+		mask = 0;
+		if (op & 4)
+			mask |= MAY_READ;
+		if (op & 2)
+			mask |= MAY_WRITE;
+
+		error = -ENOMEM;
+		/* freed below */
+		buffer = (char *)__get_free_page(GFP_KERNEL);
+		if (!buffer)
+			goto out;
+
+		/*
+		 * TODO: convert this over to using a global or per
+		 * namespace control instead of a hard coded /proc
+		 */
+		name = sysctl_pathname(table, buffer, PAGE_SIZE);
+		if (name && name - buffer >= 5) {
+			struct path_cond cond = { 0, S_IFREG };
+			name -= 5;
+			memcpy(name, "/proc", 5);
+			error = aa_pathstr_perm(profile, "sysctl", name, mask,
+						&cond);
+		}
+		free_page((unsigned long)buffer);
+	}
+
+out:
+	return error;
+}
+
+/**
+ * common_perm - basic common permission check wrapper fn for paths
+ * @op: operation name  (NOT NULL)
+ * @path: path to check permission of  (NOT NULL)
+ * @mask: requested permissions mask
+ * @cond: conditional info for the permission request  (NOT NULL)
+ *
+ * Returns: %0 else error code if error or permission denied
+ */
+static int common_perm(const char *op, struct path *path, u16 mask,
+		       struct path_cond *cond)
+{
+	struct aa_profile *profile;
+	int error = 0;
+
+	profile = __aa_current_profile();
+	if (!unconfined(profile))
+		error = aa_path_perm(profile, op, path, mask, cond);
+
+	return error;
+}
+
+/**
+ * common_perm_dentry - common permission wrapper when path is dir, dentry
+ * @op: operation name  (NOT NULL)
+ * @dir: directory of the dentry  (NOT NULL)
+ * @dentry: dentry to check  (NOT NULL)
+ * @mask: requested permissions mask
+ * @cond: conditional info for the permission request  (NOT NULL)
+ *
+ * Returns: %0 else error code if error or permission denied
+ */
+static int common_perm_dentry(const char *op, struct path *dir,
+			      struct dentry *dentry, u16 mask,
+			      struct path_cond *cond)
+{
+	struct path path = { dir->mnt, dentry };
+
+	return common_perm(op, &path, mask, cond);
+}
+
+/**
+ * common_perm_rm - common permission wrapper for operations doing rm
+ * @op: operation name  (NOT NULL)
+ * @dir: directory that the dentry is in  (NOT NULL)
+ * @dentry: dentry being rm'd  (NOT NULL)
+ * @mask: requested permission mask
+ *
+ * Returns: %0 else error code if error or permission denied
+ */
+static int common_perm_rm(const char *op, struct path *dir,
+			  struct dentry *dentry, u16 mask)
+{
+	struct inode *inode = dentry->d_inode;
+	struct path_cond cond = { };
+
+	if (!dir->mnt || !inode || !mediated_filesystem(inode))
+		return 0;
+
+	cond.uid = inode->i_uid;
+	cond.mode = inode->i_mode;
+
+	return common_perm_dentry(op, dir, dentry, mask, &cond);
+}
+
+/**
+ * common_perm_create - common permission wrapper for operations doing create
+ * @op: operation name  (NOT NULL)
+ * @dir: directory that dentry will be created in  (NOT NULL)
+ * @dentry: dentry to create   (NOT NULL)
+ * @mask: request permission mask
+ * @mode: created file mode
+ *
+ * Returns: %0 else error code if error or permission denied
+ */
+static int common_perm_create(const char *op, struct path *dir,
+			      struct dentry *dentry, u16 mask, umode_t mode)
+{
+	struct path_cond cond = { current_fsuid(), mode };
+
+	if (!dir->mnt || !mediated_filesystem(dir->dentry->d_inode))
+		return 0;
+
+	return common_perm_dentry(op, dir, dentry, mask, &cond);
+}
+
+static int apparmor_path_unlink(struct path *dir, struct dentry *dentry)
+{
+	return common_perm_rm("unlink", dir, dentry, AA_MAY_DELETE);
+}
+
+static int apparmor_path_mkdir(struct path *dir, struct dentry *dentry,
+			       int mode)
+{
+	return common_perm_create("mkdir", dir, dentry, AA_MAY_CREATE, S_IFDIR);
+}
+
+static int apparmor_path_rmdir(struct path *dir, struct dentry *dentry)
+{
+	return common_perm_rm("rmdir", dir, dentry, AA_MAY_DELETE);
+}
+
+static int apparmor_path_mknod(struct path *dir, struct dentry *dentry,
+			       int mode, unsigned int dev)
+{
+	return common_perm_create("mknod", dir, dentry, AA_MAY_CREATE, mode);
+}
+
+static int apparmor_path_truncate(struct path *path, loff_t length,
+				  unsigned int time_attrs)
+{
+	struct path_cond cond = { path->dentry->d_inode->i_uid,
+				  path->dentry->d_inode->i_mode
+	};
+
+	if (!path->mnt || !mediated_filesystem(path->dentry->d_inode))
+		return 0;
+	return common_perm("truncate", path, MAY_WRITE, &cond);
+}
+
+static int apparmor_path_symlink(struct path *dir, struct dentry *dentry,
+				 const char *old_name)
+{
+	return common_perm_create("symlink_create", dir, dentry, AA_MAY_CREATE,
+				  S_IFLNK);
+}
+
+static int apparmor_path_link(struct dentry *old_dentry, struct path *new_dir,
+			      struct dentry *new_dentry)
+{
+	struct aa_profile *profile;
+	int error = 0;
+
+	if (!mediated_filesystem(old_dentry->d_inode))
+		return 0;
+
+	profile = aa_current_profile();
+	if (!unconfined(profile))
+		error = aa_path_link(profile, old_dentry, new_dir, new_dentry);
+	return error;
+}
+
+static int apparmor_path_rename(struct path *old_dir, struct dentry *old_dentry,
+				struct path *new_dir, struct dentry *new_dentry)
+{
+	struct aa_profile *profile;
+	int error = 0;
+
+	if (!mediated_filesystem(old_dentry->d_inode))
+		return 0;
+
+	profile = aa_current_profile();
+	if (!unconfined(profile)) {
+		struct path old_path = { old_dir->mnt, old_dentry };
+		struct path new_path = { new_dir->mnt, new_dentry };
+		struct path_cond cond = { old_dentry->d_inode->i_uid,
+					  old_dentry->d_inode->i_mode
+		};
+
+		error = aa_path_perm(profile, "rename_src", &old_path,
+				     MAY_READ | MAY_WRITE, &cond);
+		if (!error)
+			error = aa_path_perm(profile, "rename_dest", &new_path,
+					     AA_MAY_CREATE | MAY_WRITE, &cond);
+
+	}
+	return error;
+}
+
+static int apparmor_path_chmod(struct dentry *dentry, struct vfsmount *mnt,
+			       mode_t mode)
+{
+	struct aa_profile *profile;
+	int error = 0;
+
+	if (!mediated_filesystem(dentry->d_inode))
+		return 0;
+
+	profile = aa_current_profile();
+	if (!unconfined(profile)) {
+		struct path path = { mnt, dentry };
+		struct path_cond cond = { dentry->d_inode->i_uid,
+					  dentry->d_inode->i_mode
+		};
+
+		error = aa_path_perm(profile, "chmod", &path, AA_MAY_CHMOD,
+			&cond);
+	}
+
+	return error;
+}
+
+static int apparmor_path_chown(struct path *path, uid_t uid, gid_t gid)
+{
+	struct aa_profile *profile;
+	int error = 0;
+
+	if (!mediated_filesystem(path->dentry->d_inode))
+		return 0;
+
+	profile = aa_current_profile();
+	if (!unconfined(profile)) {
+		struct path_cond cond =  { path->dentry->d_inode->i_uid,
+					   path->dentry->d_inode->i_mode
+		};
+		error = aa_path_perm(profile, "chown", path, AA_MAY_CHOWN,
+				     &cond);
+	}
+
+	return error;
+}
+
+static int apparmor_dentry_open(struct file *file, const struct cred *cred)
+{
+	struct aa_profile *profile;
+	int error = 0;
+
+	/* If in exec, permission is handled by bprm hooks */
+	if (current->in_execve ||
+	    !mediated_filesystem(file->f_path.dentry->d_inode))
+		return 0;
+
+	profile = aa_cred_profile(cred);
+	if (!unconfined(profile)) {
+		struct aa_file_cxt *fcxt = file->f_security;
+		struct inode *inode = file->f_path.dentry->d_inode;
+		struct path_cond cond = { inode->i_uid, inode->i_mode };
+
+		error = aa_path_perm(profile, "open", &file->f_path,
+				     aa_map_file_to_perms(file), &cond);
+		/* released by aa_free_file_context */
+		fcxt->profile = aa_get_profile(profile);
+		/* todo cache actual allowed permissions */
+		fcxt->allowed = aa_map_file_to_perms(file);
+	}
+
+	return error;
+}
+
+static int apparmor_file_alloc_security(struct file *file)
+{
+	/* freed by apparmor_file_free_security */
+	file->f_security = aa_alloc_file_context(GFP_KERNEL);
+	if (!file->f_security)
+		return -ENOMEM;
+	return 0;
+
+}
+
+static void apparmor_file_free_security(struct file *file)
+{
+	struct aa_file_cxt *cxt = file->f_security;
+
+	aa_free_file_context(cxt);
+}
+
+static int apparmor_file_permission(struct file *file, int mask)
+{
+	/*
+	 * TODO: cache profiles that have revalidated?
+	 */
+	struct aa_file_cxt *fcxt = file->f_security;
+	struct aa_profile *profile, *fprofile = aa_newest_version(fcxt->profile);
+	int error = 0;
+
+	if (!fprofile || !file->f_path.mnt ||
+	    !mediated_filesystem(file->f_path.dentry->d_inode))
+		return 0;
+
+	profile = __aa_current_profile();
+
+	if (!unconfined(profile) &&
+	    ((fprofile != profile) || (mask & ~fcxt->allowed)))
+		error = aa_file_perm(profile, "file_perm", file, mask);
+
+	return error;
+}
+
+static int common_file_perm(const char *op, struct file *file, u16 mask)
+{
+	const struct aa_file_cxt *fcxt = file->f_security;
+	struct aa_profile *profile, *fprofile = fcxt->profile;
+	int error = 0;
+
+	if (!fprofile || !file->f_path.mnt ||
+	    !mediated_filesystem(file->f_path.dentry->d_inode))
+		return 0;
+
+	profile = aa_current_profile();
+	if (!unconfined(profile) && ((fprofile != profile) ||
+				     (mask & ~fcxt->allowed)))
+		error = aa_file_perm(profile, op, file, mask);
+
+	return error;
+}
+
+static int apparmor_file_lock(struct file *file, unsigned int cmd)
+{
+	u16 mask = AA_MAY_LOCK;
+
+	if (cmd == F_WRLCK)
+		mask |= MAY_WRITE;
+
+	return common_file_perm("file_lock", file, mask);
+}
+
+static int common_mmap(struct file *file, const char *operation,
+		       unsigned long prot, unsigned long flags)
+{
+	struct dentry *dentry;
+	int mask = 0;
+
+	if (!file || !file->f_security)
+		return 0;
+
+	if (prot & PROT_READ)
+		mask |= MAY_READ;
+	/*
+	 * Private mappings don't require write perms since they don't
+	 * write back to the files
+	 */
+	if ((prot & PROT_WRITE) && !(flags & MAP_PRIVATE))
+		mask |= MAY_WRITE;
+	if (prot & PROT_EXEC)
+		mask |= AA_EXEC_MMAP;
+
+	dentry = file->f_path.dentry;
+	return common_file_perm(operation, file, mask);
+}
+
+static int apparmor_file_mmap(struct file *file, unsigned long reqprot,
+			      unsigned long prot, unsigned long flags,
+			      unsigned long addr, unsigned long addr_only)
+{
+	int rc = 0;
+
+	/* do DAC check */
+	rc = cap_file_mmap(file, reqprot, prot, flags, addr, addr_only);
+	if (rc || addr_only)
+		return rc;
+
+	return common_mmap(file, "file_mmap", prot, flags);
+}
+
+static int apparmor_file_mprotect(struct vm_area_struct *vma,
+				  unsigned long reqprot, unsigned long prot)
+{
+	return common_mmap(vma->vm_file, "file_mprotect", prot,
+			   !(vma->vm_flags & VM_SHARED) ? MAP_PRIVATE : 0);
+}
+
+static int apparmor_getprocattr(struct task_struct *task, char *name,
+				char **value)
+{
+	int error = -ENOENT;
+	struct aa_profile *profile;
+	/* released below */
+	const struct cred *cred = get_task_cred(task);
+	struct aa_task_cxt *cxt = cred->security;
+	profile = aa_cred_profile(cred);
+
+	if (strcmp(name, "current") == 0)
+		error = aa_getprocattr(aa_newest_version(cxt->profile),
+				       value);
+	else if (strcmp(name, "prev") == 0  && cxt->previous)
+		error = aa_getprocattr(aa_newest_version(cxt->previous),
+				       value);
+	else if (strcmp(name, "exec") == 0 && cxt->onexec)
+		error = aa_getprocattr(aa_newest_version(cxt->onexec),
+				       value);
+	else
+		error = -EINVAL;
+
+	put_cred(cred);
+
+	return error;
+}
+
+static int apparmor_setprocattr(struct task_struct *task, char *name,
+				void *value, size_t size)
+{
+	char *command, *args;
+	size_t arg_size;
+	int error;
+
+	if (size == 0 || size >= PAGE_SIZE)
+		return -EINVAL;
+
+	/* task can only write its own attributes */
+	if (current != task)
+		return -EACCES;
+
+	args = value;
+	args[size] = '\0';
+	args = strstrip(args);
+	command = strsep(&args, " ");
+	if (!args)
+		return -EINVAL;
+	args = skip_spaces(args);
+	if (!*args)
+		return -EINVAL;
+
+	arg_size = size - (args - (char *) value);
+	if (strcmp(name, "current") == 0) {
+		if (strcmp(command, "changehat") == 0) {
+			error = aa_setprocattr_changehat(args, arg_size,
+							 !AA_DO_TEST);
+		} else if (strcmp(command, "permhat") == 0) {
+			error = aa_setprocattr_changehat(args, arg_size,
+							 AA_DO_TEST);
+		} else if (strcmp(command, "changeprofile") == 0) {
+			error = aa_setprocattr_changeprofile(args, !AA_ONEXEC,
+							     !AA_DO_TEST);
+		} else if (strcmp(command, "permprofile") == 0) {
+			error = aa_setprocattr_changeprofile(args, !AA_ONEXEC,
+							     AA_DO_TEST);
+		} else if (strcmp(command, "permipc") == 0) {
+			error = aa_setprocattr_permipc(args);
+		} else {
+			struct aa_audit sa = {
+				.operation = "setprocattr",
+				.gfp_mask = GFP_KERNEL,
+				.info = name,
+				.error = -EINVAL,
+			};
+			return aa_audit(AUDIT_APPARMOR_DENIED, NULL, &sa, NULL);
+		}
+	} else if (strcmp(name, "exec") == 0) {
+		error = aa_setprocattr_changeprofile(args, AA_ONEXEC,
+						     !AA_DO_TEST);
+	} else {
+		/* only support the "current" and "exec" process attributes */
+		return -EINVAL;
+	}
+	if (!error)
+		error = size;
+	return error;
+}
+
+static int apparmor_task_setrlimit(unsigned int resource,
+				   struct rlimit *new_rlim)
+{
+	struct aa_profile *profile = aa_current_profile();
+	int error = 0;
+
+	if (!unconfined(profile))
+		error = aa_task_setrlimit(profile, resource, new_rlim);
+
+	return error;
+}
+
+static int apparmor_socket_create(int family, int type, int protocol, int kern)
+{
+	struct aa_profile *profile;
+	int error = 0;
+
+	if (kern)
+		return 0;
+
+	profile = __aa_current_profile();
+	if (!unconfined(profile))
+		error = aa_net_perm(profile, "socket_create", family,
+				    type, protocol);
+	return error;
+}
+
+static int apparmor_socket_post_create(struct socket *sock, int family,
+				       int type, int protocol, int kern)
+{
+	struct sock *sk = sock->sk;
+
+	if (kern)
+		return 0;
+
+	return aa_revalidate_sk(sk, "socket_post_create");
+}
+
+static int apparmor_socket_bind(struct socket *sock,
+				struct sockaddr *address, int addrlen)
+{
+	struct sock *sk = sock->sk;
+
+	return aa_revalidate_sk(sk, "socket_bind");
+}
+
+static int apparmor_socket_connect(struct socket *sock,
+				   struct sockaddr *address, int addrlen)
+{
+	struct sock *sk = sock->sk;
+
+	return aa_revalidate_sk(sk, "socket_connect");
+}
+
+static int apparmor_socket_listen(struct socket *sock, int backlog)
+{
+	struct sock *sk = sock->sk;
+
+	return aa_revalidate_sk(sk, "socket_listen");
+}
+
+static int apparmor_socket_accept(struct socket *sock, struct socket *newsock)
+{
+	struct sock *sk = sock->sk;
+
+	return aa_revalidate_sk(sk, "socket_accept");
+}
+
+static int apparmor_socket_sendmsg(struct socket *sock,
+				   struct msghdr *msg, int size)
+{
+	struct sock *sk = sock->sk;
+
+	return aa_revalidate_sk(sk, "socket_sendmsg");
+}
+
+static int apparmor_socket_recvmsg(struct socket *sock,
+				   struct msghdr *msg, int size, int flags)
+{
+	struct sock *sk = sock->sk;
+
+	return aa_revalidate_sk(sk, "socket_recvmsg");
+}
+
+static int apparmor_socket_getsockname(struct socket *sock)
+{
+	struct sock *sk = sock->sk;
+
+	return aa_revalidate_sk(sk, "socket_getsockname");
+}
+
+static int apparmor_socket_getpeername(struct socket *sock)
+{
+	struct sock *sk = sock->sk;
+
+	return aa_revalidate_sk(sk, "socket_getpeername");
+}
+
+static int apparmor_socket_getsockopt(struct socket *sock, int level,
+				      int optname)
+{
+	struct sock *sk = sock->sk;
+
+	return aa_revalidate_sk(sk, "socket_getsockopt");
+}
+
+static int apparmor_socket_setsockopt(struct socket *sock, int level,
+				      int optname)
+{
+	struct sock *sk = sock->sk;
+
+	return aa_revalidate_sk(sk, "socket_setsockopt");
+}
+
+static int apparmor_socket_shutdown(struct socket *sock, int how)
+{
+	struct sock *sk = sock->sk;
+
+	return aa_revalidate_sk(sk, "socket_shutdown");
+}
+
+static struct security_operations apparmor_ops = {
+	.name =				"apparmor",
+
+	.ptrace_access_check =		apparmor_ptrace_access_check,
+	.ptrace_traceme =		apparmor_ptrace_traceme,
+	.capget =			apparmor_capget,
+	.sysctl =			apparmor_sysctl,
+	.capable =			apparmor_capable,
+
+	.path_link =			apparmor_path_link,
+	.path_unlink =			apparmor_path_unlink,
+	.path_symlink =			apparmor_path_symlink,
+	.path_mkdir =			apparmor_path_mkdir,
+	.path_rmdir =			apparmor_path_rmdir,
+	.path_mknod =			apparmor_path_mknod,
+	.path_rename =			apparmor_path_rename,
+	.path_chmod =			apparmor_path_chmod,
+	.path_chown =			apparmor_path_chown,
+	.path_truncate =		apparmor_path_truncate,
+	.dentry_open =			apparmor_dentry_open,
+
+	.file_permission =		apparmor_file_permission,
+	.file_alloc_security =		apparmor_file_alloc_security,
+	.file_free_security =		apparmor_file_free_security,
+	.file_mmap =			apparmor_file_mmap,
+	.file_mprotect =		apparmor_file_mprotect,
+	.file_lock =			apparmor_file_lock,
+
+	.getprocattr =			apparmor_getprocattr,
+	.setprocattr =			apparmor_setprocattr,
+
+	.socket_create =		apparmor_socket_create,
+	.socket_post_create =		apparmor_socket_post_create,
+	.socket_bind =			apparmor_socket_bind,
+	.socket_connect =		apparmor_socket_connect,
+	.socket_listen =		apparmor_socket_listen,
+	.socket_accept =		apparmor_socket_accept,
+	.socket_sendmsg =		apparmor_socket_sendmsg,
+	.socket_recvmsg =		apparmor_socket_recvmsg,
+	.socket_getsockname =		apparmor_socket_getsockname,
+	.socket_getpeername =		apparmor_socket_getpeername,
+	.socket_getsockopt =		apparmor_socket_getsockopt,
+	.socket_setsockopt =		apparmor_socket_setsockopt,
+	.socket_shutdown =		apparmor_socket_shutdown,
+
+	.cred_alloc_blank =		apparmor_cred_alloc_blank,
+	.cred_free =			apparmor_cred_free,
+	.cred_prepare =			apparmor_cred_prepare,
+	.cred_transfer =		apparmor_cred_transfer,
+
+	.bprm_set_creds =		apparmor_bprm_set_creds,
+	.bprm_committing_creds =	apparmor_bprm_committing_creds,
+	.bprm_committed_creds =		apparmor_bprm_committed_creds,
+	.bprm_secureexec =		apparmor_bprm_secureexec,
+
+	.task_setrlimit =		apparmor_task_setrlimit,
+};
+
+/*
+ * AppArmor sysfs module parameters
+ */
+
+static int param_set_aabool(const char *val, struct kernel_param *kp);
+static int param_get_aabool(char *buffer, struct kernel_param *kp);
+#define param_check_aabool(name, p) __param_check(name, p, int)
+
+static int param_set_aauint(const char *val, struct kernel_param *kp);
+static int param_get_aauint(char *buffer, struct kernel_param *kp);
+#define param_check_aauint(name, p) __param_check(name, p, int)
+
+static int param_set_aalockpolicy(const char *val, struct kernel_param *kp);
+static int param_get_aalockpolicy(char *buffer, struct kernel_param *kp);
+#define param_check_aalockpolicy(name, p) __param_check(name, p, int)
+
+static int param_set_audit(const char *val, struct kernel_param *kp);
+static int param_get_audit(char *buffer, struct kernel_param *kp);
+#define param_check_audit(name, p) __param_check(name, p, int)
+
+static int param_set_mode(const char *val, struct kernel_param *kp);
+static int param_get_mode(char *buffer, struct kernel_param *kp);
+#define param_check_mode(name, p) __param_check(name, p, int)
+
+/* Flag values, also controllable via /sys/module/apparmor/parameters
+ * We define special types as we want to do additional mediation.
+ */
+
+/* AppArmor global enforcement switch - complain, enforce, kill */
+enum profile_mode aa_g_profile_mode = APPARMOR_ENFORCE;
+module_param_call(mode, param_set_mode, param_get_mode,
+		  &aa_g_profile_mode, S_IRUSR | S_IWUSR);
+
+/* Debug mode */
+int aa_g_debug;
+module_param_named(debug, aa_g_debug, aabool, S_IRUSR | S_IWUSR);
+
+/* Audit mode */
+enum audit_mode aa_g_audit;
+module_param_call(audit, param_set_audit, param_get_audit,
+		  &aa_g_audit, S_IRUSR | S_IWUSR);
+
+/* Determines if audit header is included in audited messages.  This
+ * provides more context if the audit daemon is not running
+ */
+int aa_g_audit_header;
+module_param_named(audit_header, aa_g_audit_header, aabool,
+		   S_IRUSR | S_IWUSR);
+
+/* lock out loading/removal of policy
+ * TODO: add in at boot loading of policy, which is the only way to
+ *       load policy, if lock_policy is set
+ */
+int aa_g_lock_policy;
+module_param_named(lock_policy, aa_g_lock_policy, aalockpolicy,
+		   S_IRUSR | S_IWUSR);
+
+/* Syscall logging mode */
+int aa_g_logsyscall;
+module_param_named(logsyscall, aa_g_logsyscall, aabool, S_IRUSR | S_IWUSR);
+
+/* Maximum pathname length before accesses will start getting rejected */
+unsigned int aa_g_path_max = 2 * PATH_MAX;
+module_param_named(path_max, aa_g_path_max, aauint, S_IRUSR | S_IWUSR);
+
+/* Determines how paranoid loading of policy is and how much verification
+ * on the loaded policy is done.
+ */
+int aa_g_paranoid_load = 1;
+module_param_named(paranoid_load, aa_g_paranoid_load, aabool,
+		   S_IRUSR | S_IWUSR);
+
+/* Boot time disable flag */
+static unsigned int apparmor_enabled = CONFIG_SECURITY_APPARMOR_BOOTPARAM_VALUE;
+module_param_named(enabled, apparmor_enabled, aabool, S_IRUSR);
+
+static int __init apparmor_enabled_setup(char *str)
+{
+	unsigned long enabled;
+	int error = strict_strtoul(str, 0, &enabled);
+	if (!error)
+		apparmor_enabled = enabled ? 1 : 0;
+	return 1;
+}
+
+__setup("apparmor=", apparmor_enabled_setup);
+
+/* set global flag turning off the ability to load policy */
+static int param_set_aalockpolicy(const char *val, struct kernel_param *kp)
+{
+	if (!capable(CAP_MAC_ADMIN))
+		return -EPERM;
+	if (aa_g_lock_policy)
+		return -EACCES;
+	return param_set_bool(val, kp);
+}
+
+static int param_get_aalockpolicy(char *buffer, struct kernel_param *kp)
+{
+	if (!capable(CAP_MAC_ADMIN))
+		return -EPERM;
+	return param_get_bool(buffer, kp);
+}
+
+static int param_set_aabool(const char *val, struct kernel_param *kp)
+{
+	if (!capable(CAP_MAC_ADMIN))
+		return -EPERM;
+	return param_set_bool(val, kp);
+}
+
+static int param_get_aabool(char *buffer, struct kernel_param *kp)
+{
+	if (!capable(CAP_MAC_ADMIN))
+		return -EPERM;
+	return param_get_bool(buffer, kp);
+}
+
+static int param_set_aauint(const char *val, struct kernel_param *kp)
+{
+	if (!capable(CAP_MAC_ADMIN))
+		return -EPERM;
+	return param_set_uint(val, kp);
+}
+
+static int param_get_aauint(char *buffer, struct kernel_param *kp)
+{
+	if (!capable(CAP_MAC_ADMIN))
+		return -EPERM;
+	return param_get_uint(buffer, kp);
+}
+
+static int param_get_audit(char *buffer, struct kernel_param *kp)
+{
+	if (!capable(CAP_MAC_ADMIN))
+		return -EPERM;
+
+	if (!apparmor_enabled)
+		return -EINVAL;
+
+	return sprintf(buffer, "%s", audit_mode_names[aa_g_audit]);
+}
+
+static int param_set_audit(const char *val, struct kernel_param *kp)
+{
+	int i;
+	if (!capable(CAP_MAC_ADMIN))
+		return -EPERM;
+
+	if (!apparmor_enabled)
+		return -EINVAL;
+
+	if (!val)
+		return -EINVAL;
+
+	for (i = 0; i < AUDIT_MAX_INDEX; i++) {
+		if (strcmp(val, audit_mode_names[i]) == 0) {
+			aa_g_audit = i;
+			return 0;
+		}
+	}
+
+	return -EINVAL;
+}
+
+static int param_get_mode(char *buffer, struct kernel_param *kp)
+{
+	if (!capable(CAP_MAC_ADMIN))
+		return -EPERM;
+
+	if (!apparmor_enabled)
+		return -EINVAL;
+
+	return sprintf(buffer, "%s", profile_mode_names[aa_g_profile_mode]);
+}
+
+static int param_set_mode(const char *val, struct kernel_param *kp)
+{
+	int i;
+	if (!capable(CAP_MAC_ADMIN))
+		return -EPERM;
+
+	if (!apparmor_enabled)
+		return -EINVAL;
+
+	if (!val)
+		return -EINVAL;
+
+	for (i = 0; i < APPARMOR_NAMES_MAX_INDEX; i++) {
+		if (strcmp(val, profile_mode_names[i]) == 0) {
+			aa_g_profile_mode = i;
+			return 0;
+		}
+	}
+
+	return -EINVAL;
+}
+
+/*
+ * AppArmor init functions
+ */
+
+/**
+ * set_init_cxt - set a task context and profile on the first task.
+ *
+ * TODO: allow setting an alternate profile than unconfined
+ */
+static int __init set_init_cxt(void)
+{
+	struct cred *cred = (struct cred *)current->real_cred;
+	struct aa_task_cxt *cxt;
+
+	cxt = aa_alloc_task_context(GFP_KERNEL);
+	if (!cxt)
+		return -ENOMEM;
+
+	cxt->profile = aa_get_profile(root_ns->unconfined);
+	cred->security = cxt;
+
+	return 0;
+}
+
+static int __init apparmor_init(void)
+{
+	int error;
+
+	if (!apparmor_enabled || !security_module_enable(&apparmor_ops)) {
+		aa_info_message("AppArmor disabled by boot time parameter\n");
+		apparmor_enabled = 0;
+		return 0;
+	}
+
+	error = aa_alloc_root_ns();
+	if (error) {
+		AA_ERROR("Unable to allocate default profile namespace\n");
+		goto alloc_out;
+	}
+
+	error = set_init_cxt();
+	if (error) {
+		AA_ERROR("Failed to set context on init task\n");
+		goto register_security_out;
+	}
+
+	error = register_security(&apparmor_ops);
+	if (error) {
+		AA_ERROR("Unable to register AppArmor\n");
+		goto register_security_out;
+	}
+
+	/* Report that AppArmor successfully initialized */
+	apparmor_initialized = 1;
+	if (aa_g_profile_mode == APPARMOR_COMPLAIN)
+		aa_info_message("AppArmor initialized: complain mode enabled");
+	else if (aa_g_profile_mode == APPARMOR_KILL)
+		aa_info_message("AppArmor initialized: kill mode enabled");
+	else
+		aa_info_message("AppArmor initialized");
+
+	return error;
+
+register_security_out:
+	aa_free_root_ns();
+
+alloc_out:
+	aa_destroy_aafs();
+
+	apparmor_enabled = 0;
+	return error;
+
+}
+
+security_initcall(apparmor_init);
--- linux-mvl-dove-2.6.32.orig/security/apparmor/Makefile
+++ linux-mvl-dove-2.6.32/security/apparmor/Makefile
@@ -0,0 +1,24 @@
+# Makefile for AppArmor Linux Security Module
+#
+obj-$(CONFIG_SECURITY_APPARMOR) += apparmor.o
+
+apparmor-y := apparmorfs.o audit.o capability.o context.o ipc.o lib.o match.o \
+              path.o domain.o policy.o policy_unpack.o procattr.o lsm.o \
+              resource.o sid.o file.o net.o
+
+apparmor-$(CONFIG_SECURITY_APPARMOR_COMPAT_24) += apparmorfs-24.o
+
+clean-files: capability_names.h af_names.h
+
+quiet_cmd_make-caps = GEN     $@
+cmd_make-caps = echo "static const char *capability_names[] = {" > $@ ; sed -n -e "/CAP_FS_MASK/d" -e "s/^\#define[ \\t]\\+CAP_\\([A-Z0-9_]\\+\\)[ \\t]\\+\\([0-9]\\+\\)\$$/[\\2]  = \"\\1\",/p" $< | tr A-Z a-z >> $@ ; echo "};" >> $@
+
+quiet_cmd_make-af = GEN     $@
+cmd_make-af = echo "static const char *address_family_names[] = {" > $@ ; sed -n -e "/AF_MAX/d" -e "/AF_LOCAL/d" -e "s/^\#define[ \\t]\\+AF_\\([A-Z0-9_]\\+\\)[ \\t]\\+\\([0-9]\\+\\)\\(.*\\)\$$/[\\2]  = \"\\1\",/p" $< | tr A-Z a-z >> $@ ; echo "};" >> $@
+
+$(obj)/capability.o : $(obj)/capability_names.h
+$(obj)/net.o : $(obj)/af_names.h
+$(obj)/capability_names.h : $(srctree)/include/linux/capability.h
+	$(call cmd,make-caps)
+$(obj)/af_names.h : $(srctree)/include/linux/socket.h
+	$(call cmd,make-af)
--- linux-mvl-dove-2.6.32.orig/security/apparmor/resource.c
+++ linux-mvl-dove-2.6.32/security/apparmor/resource.c
@@ -0,0 +1,119 @@
+/*
+ * AppArmor security module
+ *
+ * This file contains AppArmor resource mediation and attachment
+ *
+ * Copyright (C) 1998-2008 Novell/SUSE
+ * Copyright 2009-2010 Canonical Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ */
+
+#include <linux/audit.h>
+
+#include "include/audit.h"
+#include "include/resource.h"
+#include "include/policy.h"
+
+struct aa_audit_resource {
+	struct aa_audit base;
+
+	int rlimit;
+};
+
+/* audit callback for resource specific fields */
+static void audit_cb(struct audit_buffer *ab, struct aa_audit *va)
+{
+	struct aa_audit_resource *sa = container_of(va,
+						    struct aa_audit_resource,
+						    base);
+
+	if (sa->rlimit)
+		audit_log_format(ab, " rlimit=%d", sa->rlimit - 1);
+}
+
+/**
+ * aa_audit_resource - audit setting resource limit
+ * @profile: profile being enforced  (NOT NULL)
+ * @sa: audit data  (NOT NULL)
+ *
+ * Returns: 0 or sa->error else other error code on failure
+ */
+static int aa_audit_resource(struct aa_profile *profile,
+			     struct aa_audit_resource *sa)
+{
+	return aa_audit(AUDIT_APPARMOR_AUTO, profile, &sa->base, audit_cb);
+}
+
+/**
+ * aa_task_setrlimit - test permission to set an rlimit
+ * @profile - profile confining the task  (NOT NULL)
+ * @resource - the resource being set
+ * @new_rlim - the new resource limit  (NOT NULL)
+ *
+ * Control raising the processes hard limit.
+ *
+ * Returns: 0 or error code if setting resource failed
+ */
+int aa_task_setrlimit(struct aa_profile *profile, unsigned int resource,
+		      struct rlimit *new_rlim)
+{
+	struct aa_audit_resource sa = {
+		.base.operation = "setrlimit",
+		.base.gfp_mask = GFP_KERNEL,
+		.rlimit = resource + 1,
+	};
+	int error = 0;
+
+	if (profile->rlimits.mask & (1 << resource) &&
+	    new_rlim->rlim_max > profile->rlimits.limits[resource].rlim_max) {
+		sa.base.error = -EACCES;
+
+		error = aa_audit_resource(profile, &sa);
+	}
+
+	return error;
+}
+
+/**
+ * __aa_transition_rlimits - apply new profile rlimits
+ * @old: old profile on task  (MAYBE NULL)
+ * @new: new profile with rlimits to apply  (NOT NULL)
+ */
+void __aa_transition_rlimits(struct aa_profile *old, struct aa_profile *new)
+{
+	unsigned int mask = 0;
+	struct rlimit *rlim, *initrlim;
+	int i;
+
+	/* for any rlimits the profile controlled reset the soft limit
+	 * to the less of the tasks hard limit and the init tasks soft limit
+	 */
+	if (old && old->rlimits.mask) {
+		for (i = 0, mask = 1; i < RLIM_NLIMITS; i++, mask <<= 1) {
+			if (old->rlimits.mask & mask) {
+				rlim = current->signal->rlim + i;
+				initrlim = init_task.signal->rlim + i;
+				rlim->rlim_cur = min(rlim->rlim_max,
+						     initrlim->rlim_cur);
+			}
+		}
+	}
+
+	/* set any new hard limits as dictated by the new profile */
+	if (!(new && new->rlimits.mask))
+		return;
+	for (i = 0, mask = 1; i < RLIM_NLIMITS; i++, mask <<= 1) {
+		if (!(new->rlimits.mask & mask))
+			continue;
+
+		rlim = current->signal->rlim + i;
+		rlim->rlim_max = min(rlim->rlim_max,
+				     new->rlimits.limits[i].rlim_max);
+		/* soft limit should not exceed hard limit */
+		rlim->rlim_cur = min(rlim->rlim_cur, rlim->rlim_max);
+	}
+}
--- linux-mvl-dove-2.6.32.orig/security/apparmor/lib.c
+++ linux-mvl-dove-2.6.32/security/apparmor/lib.c
@@ -0,0 +1,100 @@
+/*
+ * AppArmor security module
+ *
+ * This file contains basic common functions used in AppArmor
+ *
+ * Copyright (C) 1998-2008 Novell/SUSE
+ * Copyright 2009-2010 Canonical Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ */
+
+#include <linux/slab.h>
+#include <linux/ctype.h>
+#include <linux/string.h>
+
+#include "include/audit.h"
+
+/**
+ * skip_spaces - Removes leading whitespace from @str.
+ * @str: The string to be stripped.
+ *
+ * From: 2.6.33 lib/string.c
+ *
+ * Returns a pointer to the first non-whitespace character in @str.
+ */
+char *skip_spaces(const char *str)
+{
+        while (isspace(*str))
+                ++str;
+        return (char *)str;
+}
+
+/**
+ * aa_split_fqname - split a fqname into a profile and namespace name
+ * @fqname: a full qualified name in namespace profile format
+ * @ns_name: pointer to portion of the string containing the ns name
+ *
+ * Returns: profile name or NULL if one is not specified
+ *
+ * Split a namespace name from a profile name (see policy.c for naming
+ * description).  If a portion of the name is missing it returns NULL for
+ * that portion.
+ *
+ * NOTE: may modifiy the @fqname string.  The pointers returned point
+ *       into the @fqname string.
+ */
+char *aa_split_fqname(char *fqname, char **ns_name)
+{
+	char *name = strstrip(fqname);
+
+	*ns_name = NULL;
+	if (name[0] == ':') {
+		char *split = strchr(&name[1], ':');
+		if (split) {
+			/* overwrite ':' with \0 */
+			*split = 0;
+			name = skip_spaces(split + 1);
+		} else
+			/* a ns name without a following profile is allowed */
+			name = NULL;
+		*ns_name = &name[1];
+	}
+	if (name && *name == 0)
+		name = NULL;
+
+	return name;
+}
+
+/**
+ * aa_strneq - compare null terminated @str to a non null terminated substring
+ * @str: a null terminated string
+ * @sub: a substring, not necessarily null terminated
+ * @len: length of @sub to compare
+ *
+ * The @str string must be full consumed for this to be considered a match
+ */
+bool aa_strneq(const char *str, const char *sub, int len)
+{
+	int res = strncmp(str, sub, len);
+	if (res)
+		return 0;
+	if (str[len] == 0)
+		return 1;
+	return 0;
+}
+
+void aa_info_message(const char *str)
+{
+	struct aa_audit sa = {
+		.gfp_mask = GFP_KERNEL,
+		.info = str,
+	};
+	printk(KERN_INFO "AppArmor: %s\n", str);
+	if (audit_enabled)
+		aa_audit(AUDIT_APPARMOR_STATUS, NULL, &sa, NULL);
+}
+
--- linux-mvl-dove-2.6.32.orig/security/apparmor/path.c
+++ linux-mvl-dove-2.6.32/security/apparmor/path.c
@@ -0,0 +1,243 @@
+/*
+ * AppArmor security module
+ *
+ * This file contains AppArmor function for pathnames
+ *
+ * Copyright (C) 1998-2008 Novell/SUSE
+ * Copyright 2009-2010 Canonical Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ */
+
+#include <linux/mnt_namespace.h>
+#include <linux/mount.h>
+#include <linux/namei.h>
+#include <linux/nsproxy.h>
+#include <linux/path.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
+#include <linux/fs_struct.h>
+
+#include "include/apparmor.h"
+#include "include/path.h"
+#include "include/policy.h"
+
+/**
+ * d_namespace_path - lookup a name associated with a given path
+ * @path: path to lookup  (NOT NULL)
+ * @buf:  buffer to store path to  (NOT NULL)
+ * @buflen: length of @buf
+ * @name: return pointer for start of path name with in @buf  (NOT NULL)
+ * @flags: flags controling path lookup
+ *
+ * Handle path name lookup.
+ *
+ * Returns: %0 else error code if path lookup fails
+ *          When no error the path name is returned in @name which points to
+ *          to a position in @buf
+ */
+static int d_namespace_path(struct path *path, char *buf, int buflen,
+			    char **name, int flags)
+{
+	struct path root, tmp;
+	char *res;
+	int deleted, connected;
+	int error = 0;
+
+	/* Get the root we want to resolve too */
+	if (flags & PATH_CHROOT_REL) {
+		/* resolve paths relative to chroot */
+		read_lock(&current->fs->lock);
+		root = current->fs->root;
+		/* released below */
+		path_get(&root);
+		read_unlock(&current->fs->lock);
+	} else {
+		/* resolve paths relative to namespace */
+		root.mnt = current->nsproxy->mnt_ns->root;
+		root.dentry = root.mnt->mnt_root;
+		/* released below */
+		path_get(&root);
+	}
+
+	spin_lock(&dcache_lock);
+	/* There is a race window between path lookup here and the
+	 * need to strip the " (deleted) string that __d_path applies
+	 * Detect the race and relookup the path
+	 *
+	 * The stripping of (deleted) is a hack that could be removed
+	 * with an updated __d_path
+	 */
+	do {
+		tmp = root;
+		deleted = d_unlinked(path->dentry);
+		res = __d_path(path, &tmp, buf, buflen);
+
+	} while (deleted != d_unlinked(path->dentry));
+	spin_unlock(&dcache_lock);
+
+	*name = res;
+	/* handle error conditions - and still allow a partial path to
+	 * be returned.
+	 */
+	if (IS_ERR(res)) {
+		error = PTR_ERR(res);
+		*name = buf;
+		goto out;
+	}
+	if (deleted) {
+		/* On some filesystems, newly allocated dentries appear to the
+		 * security_path hooks as a deleted dentry except without an
+		 * inode allocated.
+		 *
+		 * Remove the appended deleted text and return as string for
+		 * normal mediation, or auditing.  The (deleted) string is
+		 * guarenteed to be added in this case, so just strip it.
+		 */
+		buf[buflen - 11] = 0;	/* - (len(" (deleted)") +\0) */
+
+		if (path->dentry->d_inode && !(flags & PATH_MEDIATE_DELETED)) {
+			error = -ENOENT;
+			goto out;
+		}
+	}
+
+	/* Determine if the path is connected to the expected root */
+	connected = tmp.dentry == root.dentry && tmp.mnt == root.mnt;
+
+	/* If the path is not connected, then remove any leading / that
+	 * __d_path may have returned.
+	 * Unless
+	 *     specifically directed to connect the path,
+	 * OR
+	 *     if in a chroot and doing chroot relative paths and the path
+	 *     resolves to the namespace root (would be connected outside
+	 *     of chroot) and specifically directed to connect paths to
+	 *     namespace root.
+	 */
+	if (!connected && 
+	    !(flags & PATH_CONNECT_PATH) &&
+	    !((flags & PATH_CHROOT_REL) && (flags & PATH_CHROOT_NSCONNECT) &&
+	      (tmp.mnt == current->nsproxy->mnt_ns->root &&
+	       tmp.dentry == current->nsproxy->mnt_ns->root->mnt_root))) {
+		/* disconnected path, don't return pathname starting with '/' */
+		error = -ESTALE;
+		if (*res == '/')
+			*name = res + 1;
+	}
+
+out:
+	path_put(&root);
+
+	return error;
+}
+
+/**
+ * get_name_to_buffer - get the pathname to a buffer ensure dir / is appended
+ * @path: path to get name for  (NOT NULL)
+ * @flags: flags controlling path lookup
+ * @buffer: buffer to put name in  (NOT NULL)
+ * @size: size of buffer
+ * @name: on return contains position of path name in @buffer  (NOT NULL)
+ *
+ * Returns: %0 else error on failure
+ */
+static int get_name_to_buffer(struct path *path, int flags, char *buffer,
+			      int size, char **name)
+{
+	int adjust = (flags & PATH_IS_DIR) ? 1 : 0;
+	int error = d_namespace_path(path, buffer, size - adjust, name, flags);
+
+	if (!error && (flags & PATH_IS_DIR) && (*name)[1] != '\0')
+		/*
+		 * Append "/" to the pathname.  The root directory is a special
+		 * case; it already ends in slash.
+		 */
+		strcpy(&buffer[size - 2], "/");
+
+	return error;
+}
+
+/**
+ * aa_get_name - compute the pathname of a file
+ * @path: path the file  (NOT NULL)
+ * @flags: flags controling path name generation
+ * @buffer: buffer that aa_get_name() allocated  (NOT NULL)
+ * @name: the generated path name if !error
+ *
+ * @name is a pointer to the beginning of the pathname (which usually differs
+ * from the beginning of the buffer), or NULL.  If there is an error @name
+ * may contain a partial or invalid name that can be used for audit purposes,
+ * but it can not be used for mediation.
+ *
+ * We need PATH_IS_DIR to indicate whether the file is a directory or not
+ * because the file may not yet exist, and so we cannot check the inode's
+ * file type.
+ *
+ * Returns: %0 else error code if could retrieve name
+ */
+int aa_get_name(struct path *path, int flags, char **buffer, char **name)
+{
+	char *buf, *str = NULL;
+	int size = 256;
+	int error;
+
+	*name = NULL;
+	*buffer = NULL;
+	for (;;) {
+		/* freed by caller */
+		buf = kmalloc(size, GFP_KERNEL);
+		if (!buf)
+			return -ENOMEM;
+
+		error = get_name_to_buffer(path, flags, buf, size, &str);
+		if (!error || (error == -ENOENT) || (error == -ESTALE))
+			break;
+
+		kfree(buf);
+		size <<= 1;
+		if (size > aa_g_path_max)
+			return -ENAMETOOLONG;
+	}
+	*buffer = buf;
+	*name = str;
+
+	return error;
+}
+
+/**
+ * sysctl_pathname - generate a pathname for a sysctl
+ * @table: sysctl name table  (NOT NULL)
+ * @buffer: buffer to put name in  (NOT NULL)
+ * @buflen: length of @buffer
+ *
+ * Returns: sysctl path name in @buffer or NULL on error
+ */
+char *sysctl_pathname(struct ctl_table *table, char *buffer, int buflen)
+{
+	if (buflen < 1)
+		return NULL;
+	buffer += --buflen;
+	*buffer = '\0';
+
+	while (table) {
+		int namelen = strlen(table->procname);
+
+		if (buflen < namelen + 1)
+			return NULL;
+		buflen -= namelen + 1;
+		buffer -= namelen;
+		memcpy(buffer, table->procname, namelen);
+		*--buffer = '/';
+		table = table->parent;
+	}
+	if (buflen < 4)
+		return NULL;
+	buffer -= 4;
+	memcpy(buffer, "/sys", 4);
+
+	return buffer;
+}
--- linux-mvl-dove-2.6.32.orig/security/apparmor/match.c
+++ linux-mvl-dove-2.6.32/security/apparmor/match.c
@@ -0,0 +1,391 @@
+/*
+ * AppArmor security module
+ *
+ * This file contains AppArmor dfa based regular expression matching engine
+ *
+ * Copyright (C) 1998-2008 Novell/SUSE
+ * Copyright 2009-2010 Canonical Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ */
+
+#include <linux/errno.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/slab.h>
+#include <linux/vmalloc.h>
+#include <linux/workqueue.h>
+#include <linux/err.h>
+#include <linux/kref.h>
+
+#include "include/match.h"
+
+/**
+ * do_vfree - workqueue routine for freeing vmalloced memory
+ * @work: data to be freed
+ *
+ * The work_struct is overlayed to the data being freed, as at the point
+ * the work is scheduled the data is no longer valid, be its freeing
+ * needs to be delayed until safe.
+ */
+static void do_vfree(struct work_struct *work)
+{
+	vfree(work);
+}
+
+/**
+ * free_table - free a table allocated by unpack table
+ * @table: table to unpack  (MAYBE NULL)
+ */
+static void free_table(struct table_header *table)
+{
+	if (!table)
+		return;
+
+	if (is_vmalloc_addr(table)) {
+		/* Data is no longer valid so just use the allocated space
+		 * as the work_struct
+		 */
+		struct work_struct *work = (struct work_struct *) table;
+		INIT_WORK(work, do_vfree);
+		schedule_work(work);	  
+	} else
+		kzfree(table);
+}
+
+/**
+ * unpack_table - unpack a dfa table (one of accept, default, base, next check)
+ * @blob: data to unpack
+ * @bsize: size of blob
+ *
+ * Returns: pointer to table else NULL on failure
+ *
+ * NOTE: must be freed by free_table (not kmalloc)
+ */
+static struct table_header *unpack_table(char *blob, size_t bsize)
+{
+	struct table_header *table = NULL;
+	struct table_header th;
+	int unmap_alias = 0;
+	size_t tsize;
+
+	if (bsize < sizeof(struct table_header))
+		goto out;
+
+	/* loaded td_id's start at 1, subtract 1 now to avoid doing
+	 * it every time we use td_id as an index
+	 */
+	th.td_id = be16_to_cpu(*(u16 *) (blob)) - 1;
+	th.td_flags = be16_to_cpu(*(u16 *) (blob + 2));
+	th.td_lolen = be32_to_cpu(*(u32 *) (blob + 8));
+	blob += sizeof(struct table_header);
+
+	if (!(th.td_flags == YYTD_DATA16 || th.td_flags == YYTD_DATA32 ||
+	      th.td_flags == YYTD_DATA8))
+		goto out;
+
+	tsize = table_size(th.td_lolen, th.td_flags);
+	if (bsize < tsize)
+		goto out;
+
+	/* freed by free_table */
+	table = kmalloc(tsize, GFP_KERNEL | __GFP_NOWARN);
+	if (!table) {
+		tsize = tsize < sizeof(struct work_struct) ?
+			sizeof(struct work_struct) : tsize;
+		unmap_alias = 1;
+		table = vmalloc(tsize);
+	}
+	if (table) {
+		*table = th;
+		if (th.td_flags == YYTD_DATA8)
+			UNPACK_ARRAY(table->td_data, blob, th.td_lolen,
+				     u8, byte_to_byte);
+		else if (th.td_flags == YYTD_DATA16)
+			UNPACK_ARRAY(table->td_data, blob, th.td_lolen,
+				     u16, be16_to_cpu);
+		else if (th.td_flags == YYTD_DATA32)
+			UNPACK_ARRAY(table->td_data, blob, th.td_lolen,
+				     u32, be32_to_cpu);
+		else
+			goto fail;
+	}
+
+out:
+	if (unmap_alias)
+		vm_unmap_aliases();
+	return table;
+fail:
+	free_table(table);
+	return NULL;
+}
+
+/**
+ * verify_dfa - verify that all the transitions and states in the dfa tables
+ *              are in bounds.
+ * @dfa: dfa to test  (NOT NULL)
+ * @flags: flags controlling what type of accept table are acceptable
+ *
+ * Assumes dfa has gone through the first pass verification done by unpacking
+ * NOTE: this does not valid accept table values
+ *
+ * Returns: %0 else error code on failure to verify
+ */
+static int verify_dfa(struct aa_dfa *dfa, int flags)
+{
+	size_t i, state_count, trans_count;
+	int error = -EPROTO;
+
+	/* check that required tables exist */
+	if (!(dfa->tables[YYTD_ID_DEF] &&
+	      dfa->tables[YYTD_ID_BASE] &&
+	      dfa->tables[YYTD_ID_NXT] && dfa->tables[YYTD_ID_CHK]))
+		goto out;
+
+	/* accept.size == default.size == base.size */
+	state_count = dfa->tables[YYTD_ID_BASE]->td_lolen;
+	if (ACCEPT1_FLAGS(flags)) {
+		if (!dfa->tables[YYTD_ID_ACCEPT])
+			goto out;
+		if (state_count != dfa->tables[YYTD_ID_ACCEPT]->td_lolen)
+			goto out;
+	}
+	if (ACCEPT2_FLAGS(flags)) {
+		if (!dfa->tables[YYTD_ID_ACCEPT2])
+			goto out;
+		if (state_count != dfa->tables[YYTD_ID_ACCEPT2]->td_lolen)
+			goto out;
+	}
+	if (state_count != dfa->tables[YYTD_ID_DEF]->td_lolen)
+		goto out;
+
+	/* next.size == chk.size */
+	trans_count = dfa->tables[YYTD_ID_NXT]->td_lolen;
+	if (trans_count != dfa->tables[YYTD_ID_CHK]->td_lolen)
+		goto out;
+
+	/* if equivalence classes then its table size must be 256 */
+	if (dfa->tables[YYTD_ID_EC] &&
+	    dfa->tables[YYTD_ID_EC]->td_lolen != 256)
+		goto out;
+
+	if (flags & DFA_FLAG_VERIFY_STATES) {
+		for (i = 0; i < state_count; i++) {
+			if (DEFAULT_TABLE(dfa)[i] >= state_count)
+				goto out;
+			/* TODO: do check that DEF state recursion terminates */
+			if (BASE_TABLE(dfa)[i] + 255 >= trans_count) {
+				printk("AppArmor DFA next/check upper bounds error\n");
+				goto out;
+			}
+		}
+
+		for (i = 0; i < trans_count; i++) {
+			if (NEXT_TABLE(dfa)[i] >= state_count)
+				goto out;
+			if (CHECK_TABLE(dfa)[i] >= state_count)
+				goto out;
+		}
+	}
+
+	error = 0;
+out:
+	return error;
+}
+
+/**
+ * aa_dfa_free - free a dfa allocated by aa_dfa_unpack
+ * @dfa: the dfa to free  (MAYBE NULL)
+ *
+ * Requires: reference count to dfa == 0
+ */
+static void aa_dfa_free(struct aa_dfa *dfa)
+{
+	if (dfa) {
+		int i;
+
+		for (i = 0; i < ARRAY_SIZE(dfa->tables); i++) {
+			free_table(dfa->tables[i]);
+			dfa->tables[i] = NULL;
+		}
+	}
+	kfree(dfa);
+}
+
+/**
+ * aa_dfa_free_kref - free aa_dfa by kref (called by aa_put_dfa)
+ * @kr: kref callback for freeing of a dfa  (NOT NULL)
+ */
+void aa_dfa_free_kref(struct kref *kref)
+{
+	struct aa_dfa *dfa = container_of(kref, struct aa_dfa, count);
+	aa_dfa_free(dfa);
+}
+
+/**
+ * aa_dfa_unpack - unpack the binary tables of a serialized dfa
+ * @blob: aligned serialized stream of data to unpack  (NOT NULL)
+ * @size: size of data to unpack
+ * @flags: flags controlling what type of accept tables are acceptable
+ *
+ * Unpack a dfa that has been serialized.  Dfa format and information in
+ * Documentation/AppArmor/dfa.txt
+ * Assumes the dfa @blob stream has been aligned on a 8 byte boundry
+ *
+ * Returns: an unpacked dfa ready for matching or ERR_PTR on failure
+ */
+struct aa_dfa *aa_dfa_unpack(void *blob, size_t size, int flags)
+{
+	int hsize;
+	int error = -ENOMEM;
+	char *data = blob;
+	struct table_header *table = NULL;
+	struct aa_dfa *dfa = kzalloc(sizeof(struct aa_dfa), GFP_KERNEL);
+	if (!dfa)
+		goto fail;
+
+	kref_init(&dfa->count);
+
+	error = -EPROTO;
+
+	/* get dfa table set header */
+	if (size < sizeof(struct table_set_header))
+		goto fail;
+
+	if (ntohl(*(u32 *) data) != YYTH_MAGIC)
+		goto fail;
+
+	hsize = ntohl(*(u32 *) (data + 4));
+	if (size < hsize)
+		goto fail;
+
+	dfa->flags = ntohs(*(u16 *) (data + 12));
+	data += hsize;
+	size -= hsize;
+
+	while (size > 0) {
+		table = unpack_table(data, size);
+		if (!table)
+			goto fail;
+
+		switch (table->td_id) {
+		case YYTD_ID_ACCEPT:
+			if (!(table->td_flags & ACCEPT1_FLAGS(flags)))
+				goto fail;
+			break;
+		case YYTD_ID_ACCEPT2:
+			if (!(table->td_flags & ACCEPT2_FLAGS(flags)))
+				goto fail;
+			break;
+		case YYTD_ID_BASE:
+			if (table->td_flags != YYTD_DATA32)
+				goto fail;
+			break;
+		case YYTD_ID_DEF:
+		case YYTD_ID_NXT:
+		case YYTD_ID_CHK:
+			if (table->td_flags != YYTD_DATA16)
+				goto fail;
+			break;
+		case YYTD_ID_EC:
+			if (table->td_flags != YYTD_DATA8)
+				goto fail;
+			break;
+		default:
+			goto fail;
+		}
+		/* check for duplicate table entry */
+		if (dfa->tables[table->td_id])
+			goto fail;
+		dfa->tables[table->td_id] = table;
+		data += table_size(table->td_lolen, table->td_flags);
+		size -= table_size(table->td_lolen, table->td_flags);
+		table = NULL;
+	}
+
+	error = verify_dfa(dfa, flags);
+	if (error)
+		goto fail;
+
+	return dfa;
+
+fail:
+	free_table(table);
+	aa_dfa_free(dfa);
+	return ERR_PTR(error);
+}
+
+/**
+ * aa_dfa_match_len - traverse @dfa to find state @str stops at
+ * @dfa: the dfa to match @str against  (NOT NULL)
+ * @start: the state of the dfa to start matching in
+ * @str: the string of bytes to match against the dfa  (NOT NULL)
+ * @len: length of the string of bytes to match
+ *
+ * aa_dfa_match_len will match @str against the dfa and return the state it
+ * finished matching in. The final state can be used to look up the accepting
+ * label, or as the start state of a continuing match.
+ *
+ * This function will happily match again the 0 byte and only finishes
+ * when @len input is consumed.
+ *
+ * Returns: final state reached after input is consumed
+ */
+unsigned int aa_dfa_match_len(struct aa_dfa *dfa, unsigned int start,
+			      const char *str, int len)
+{
+	u16 *def = DEFAULT_TABLE(dfa);
+	u32 *base = BASE_TABLE(dfa);
+	u16 *next = NEXT_TABLE(dfa);
+	u16 *check = CHECK_TABLE(dfa);
+	unsigned int state = start, pos;
+
+	if (state == 0)
+		return 0;
+
+	/* current state is <state>, matching character *str */
+	if (dfa->tables[YYTD_ID_EC]) {
+		/* Equivalence class table defined */
+		u8 *equiv = EQUIV_TABLE(dfa);
+		/* default is direct to next state */
+		for (; len; len--) {
+			pos = base[state] + equiv[(u8) *str++];
+			if (check[pos] == state)
+				state = next[pos];
+			else
+				state = def[state];
+		}
+	} else {
+		/* default is direct to next state */
+		for (; len; len--) {
+			pos = base[state] + (u8) *str++;
+			if (check[pos] == state)
+				state = next[pos];
+			else
+				state = def[state];
+		}
+	}
+
+	return state;
+}
+
+/**
+ * aa_dfa_next_state - traverse @dfa to find state @str stops at
+ * @dfa: the dfa to match @str against  (NOT NULL)
+ * @start: the state of the dfa to start matching in
+ * @str: the null terminated string of bytes to match against the dfa (NOT NULL)
+ *
+ * aa_dfa_next_state will match @str against the dfa and return the state it
+ * finished matching in. The final state can be used to look up the accepting
+ * label, or as the start state of a continuing match.
+ *
+ * Returns: final state reached after input is consumed
+ */
+unsigned int aa_dfa_match(struct aa_dfa *dfa, unsigned int start,
+			  const char *str)
+{
+	return aa_dfa_match_len(dfa, start, str, strlen(str));
+}
--- linux-mvl-dove-2.6.32.orig/security/apparmor/policy_unpack.c
+++ linux-mvl-dove-2.6.32/security/apparmor/policy_unpack.c
@@ -0,0 +1,725 @@
+/*
+ * AppArmor security module
+ *
+ * This file contains AppArmor functions for unpacking policy loaded from
+ * userspace.
+ *
+ * Copyright (C) 1998-2008 Novell/SUSE
+ * Copyright 2009-2010 Canonical Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ *
+ * AppArmor uses a serialized binary format for loading policy.
+ * The policy format is documented in Documentation/???
+ * All policy is validated all before it is used.
+ */
+
+#include <asm/unaligned.h>
+#include <linux/ctype.h>
+#include <linux/errno.h>
+
+#include "include/apparmor.h"
+#include "include/audit.h"
+#include "include/context.h"
+#include "include/match.h"
+#include "include/policy.h"
+#include "include/policy_unpack.h"
+#include "include/sid.h"
+
+/*
+ * The AppArmor interface treats data as a type byte followed by the
+ * actual data.  The interface has the notion of a a named entry
+ * which has a name (AA_NAME typecode followed by name string) followed by
+ * the entries typecode and data.  Named types allow for optional
+ * elements and extensions to be added and tested for without breaking
+ * backwards compatability.
+ */
+
+enum aa_code {
+	AA_U8,
+	AA_U16,
+	AA_U32,
+	AA_U64,
+	AA_NAME,		/* same as string except it is items name */
+	AA_STRING,
+	AA_BLOB,
+	AA_STRUCT,
+	AA_STRUCTEND,
+	AA_LIST,
+	AA_LISTEND,
+	AA_ARRAY,
+	AA_ARRAYEND,
+};
+
+/*
+ * aa_ext is the read of the buffer containing the serialized profile.  The
+ * data is copied into a kernel buffer in apparmorfs and then handed off to
+ * the unpack routines.
+ */
+struct aa_ext {
+	void *start;
+	void *end;
+	void *pos;		/* pointer to current position in the buffer */
+	u32 version;
+};
+
+/* audit callback for unpack fields */
+static void audit_cb(struct audit_buffer *ab, struct aa_audit *va)
+{
+	struct aa_audit_iface *sa = container_of(va, struct aa_audit_iface,
+						 base);
+
+	if (sa->name) {
+		audit_log_format(ab, " name=");
+		audit_log_string(ab, sa->name);
+	}
+	if (sa->name2) {
+		audit_log_format(ab, " namespace=");
+		audit_log_string(ab, sa->name2);
+	}
+	if (sa->base.error && sa->pos)
+		audit_log_format(ab, " offset=%ld", sa->pos);
+}
+
+/**
+ * aa_audit_iface - do audit message for policy unpacking/load/replace/remove
+ * @sa: audit date to send to audit  (NOT NULL)
+ *
+ * Returns: %0 or error
+ */
+int aa_audit_iface(struct aa_audit_iface *sa)
+{
+	struct aa_profile *profile;
+	const struct cred *cred = get_current_cred();
+	int error;
+	profile = aa_cred_profile(cred);
+	error = aa_audit(AUDIT_APPARMOR_STATUS, profile, &sa->base, audit_cb);
+	put_cred(cred);
+	return error;
+}
+
+/* test if read will be in packed data bounds */
+static bool aa_inbounds(struct aa_ext *e, size_t size)
+{
+	return (size <= e->end - e->pos);
+}
+
+/**
+ * aa_u16_chunck - test and do bounds checking for a u16 size based chunk
+ * @e: serialized data read head
+ * @chunk: start address for chunk of data
+ *
+ * Returns: the size of chunk found with the read head at the end of the chunk.
+ */
+static size_t unpack_u16_chunk(struct aa_ext *e, char **chunk)
+{
+	size_t size = 0;
+
+	if (!aa_inbounds(e, sizeof(u16)))
+		return 0;
+	size = le16_to_cpu(get_unaligned((u16 *) e->pos));
+	e->pos += sizeof(u16);
+	if (!aa_inbounds(e, size))
+		return 0;
+	*chunk = e->pos;
+	e->pos += size;
+	return size;
+}
+
+/* unpack control byte */
+static bool unpack_X(struct aa_ext *e, enum aa_code code)
+{
+	if (!aa_inbounds(e, 1))
+		return 0;
+	if (*(u8 *) e->pos != code)
+		return 0;
+	e->pos++;
+	return 1;
+}
+
+/**
+ * unpack_nameX - check is the next element is of type X with a name of @name
+ * @e: serialized data extent information  (NOT NULL)
+ * @code: type code
+ * @name: name to match to the serialized element.  (MAYBE NULL)
+ *
+ * check that the next serialized data element is of type X and has a tag
+ * name @name.  If @name is specified then there must be a matching
+ * name element in the stream.  If @name is NULL any name element will be
+ * skipped and only the typecode will be tested.
+ * returns 1 on success (both type code and name tests match) and the read
+ * head is advanced past the headers
+ *
+ * Returns: 0 if either match failes, the read head does not move
+ */
+static bool unpack_nameX(struct aa_ext *e, enum aa_code code, const char *name)
+{
+	/*
+	 * May need to reset pos if name or type doesn't match
+	 */
+	void *pos = e->pos;
+	/*
+	 * Check for presence of a tagname, and if present name size
+	 * AA_NAME tag value is a u16.
+	 */
+	if (unpack_X(e, AA_NAME)) {
+		char *tag = NULL;
+		size_t size = unpack_u16_chunk(e, &tag);
+		/* if a name is specified it must match. otherwise skip tag */
+		if (name && (!size || strcmp(name, tag)))
+			goto fail;
+	} else if (name) {
+		/* if a name is specified and there is no name tag fail */
+		goto fail;
+	}
+
+	/* now check if type code matches */
+	if (unpack_X(e, code))
+		return 1;
+
+fail:
+	e->pos = pos;
+	return 0;
+}
+
+static bool unpack_u16(struct aa_ext *e, u16 *data, const char *name)
+{
+	if (unpack_nameX(e, AA_U16, name)) {
+		if (!aa_inbounds(e, sizeof(u16)))
+			return 0;
+		if (data)
+			*data = le16_to_cpu(get_unaligned((u16 *) e->pos));
+		e->pos += sizeof(u16);
+		return 1;
+	}
+	return 0;
+}
+
+static bool unpack_u32(struct aa_ext *e, u32 *data, const char *name)
+{
+	if (unpack_nameX(e, AA_U32, name)) {
+		if (!aa_inbounds(e, sizeof(u32)))
+			return 0;
+		if (data)
+			*data = le32_to_cpu(get_unaligned((u32 *) e->pos));
+		e->pos += sizeof(u32);
+		return 1;
+	}
+	return 0;
+}
+
+static bool unpack_u64(struct aa_ext *e, u64 *data, const char *name)
+{
+	if (unpack_nameX(e, AA_U64, name)) {
+		if (!aa_inbounds(e, sizeof(u64)))
+			return 0;
+		if (data)
+			*data = le64_to_cpu(get_unaligned((u64 *) e->pos));
+		e->pos += sizeof(u64);
+		return 1;
+	}
+	return 0;
+}
+
+static size_t unpack_array(struct aa_ext *e, const char *name)
+{
+	if (unpack_nameX(e, AA_ARRAY, name)) {
+		int size;
+		if (!aa_inbounds(e, sizeof(u16)))
+			return 0;
+		size = (int)le16_to_cpu(get_unaligned((u16 *) e->pos));
+		e->pos += sizeof(u16);
+		return size;
+	}
+	return 0;
+}
+
+static size_t unpack_blob(struct aa_ext *e, char **blob, const char *name)
+{
+	if (unpack_nameX(e, AA_BLOB, name)) {
+		u32 size;
+		if (!aa_inbounds(e, sizeof(u32)))
+			return 0;
+		size = le32_to_cpu(get_unaligned((u32 *) e->pos));
+		e->pos += sizeof(u32);
+		if (aa_inbounds(e, (size_t) size)) {
+			*blob = e->pos;
+			e->pos += size;
+			return size;
+		}
+	}
+	return 0;
+}
+
+static int unpack_str(struct aa_ext *e, const char **string, const char *name)
+{
+	char *src_str;
+	size_t size = 0;
+	void *pos = e->pos;
+	*string = NULL;
+	if (unpack_nameX(e, AA_STRING, name)) {
+		size = unpack_u16_chunk(e, &src_str);
+		if (size) {
+			/* strings are null terminated, length is size - 1 */
+			if (src_str[size - 1] != 0)
+				goto fail;
+			*string = src_str;
+		}
+	}
+	return size;
+
+fail:
+	e->pos = pos;
+	return 0;
+}
+
+static int unpack_strdup(struct aa_ext *e, char **string, const char *name)
+{
+	const char *tmp;
+	void *pos = e->pos;
+	int res = unpack_str(e, &tmp, name);
+	*string = NULL;
+
+	if (!res)
+		return 0;
+
+	*string = kmemdup(tmp, res, GFP_KERNEL);
+	if (!*string) {
+		e->pos = pos;
+		return 0;
+	}
+
+	return res;
+}
+
+static bool verify_accept(struct aa_dfa *dfa, int flags)
+{
+	int i;
+
+	/* verify accept permissions */
+	for (i = 0; i < dfa->tables[YYTD_ID_ACCEPT]->td_lolen; i++) {
+		int mode = ACCEPT_TABLE(dfa)[i];
+
+		if (mode & ~DFA_VALID_PERM_MASK)
+			return 0;
+
+		if (ACCEPT_TABLE2(dfa)[i] & ~DFA_VALID_PERM2_MASK)
+			return 0;
+	}
+	return 1;
+}
+
+/**
+ * unpack_dfa - unpack a file rule dfa
+ * @e: serialized data extent information
+ *
+ * returns dfa or ERR_PTR or NULL if no dfa
+ */
+static struct aa_dfa *unpack_dfa(struct aa_ext *e)
+{
+	char *blob = NULL;
+	size_t size;
+	struct aa_dfa *dfa = NULL;
+
+	size = unpack_blob(e, &blob, "aadfa");
+	if (size) {
+		/*
+		 * The dfa is aligned with in the blob to 8 bytes
+		 * from the beginning of the stream.
+		 */
+		size_t sz = blob - (char *)e->start;
+		size_t pad = ALIGN(sz, 8) - sz;
+		int flags = TO_ACCEPT1_FLAG(YYTD_DATA32) |
+			TO_ACCEPT2_FLAG(YYTD_DATA32);
+
+
+		if (aa_g_paranoid_load)
+			flags |= DFA_FLAG_VERIFY_STATES;
+
+		dfa = aa_dfa_unpack(blob + pad, size - pad, flags);
+		
+		if (!IS_ERR(dfa) && !verify_accept(dfa, flags))
+			goto fail;
+	}
+
+	return dfa;
+
+fail:
+	aa_put_dfa(dfa);
+	return ERR_PTR(-EPROTO);
+}
+
+static bool unpack_trans_table(struct aa_ext *e, struct aa_profile *profile)
+{
+	void *pos = e->pos;
+
+	/* exec table is optional */
+	if (unpack_nameX(e, AA_STRUCT, "xtable")) {
+		int i, size;
+
+		size = unpack_array(e, NULL);
+		/* currently 4 exec bits and entries 0-3 are reserved iupcx */
+		if (size > 16 - 4)
+			goto fail;
+		profile->file.trans.table = kzalloc(sizeof(char *) * size,
+						    GFP_KERNEL);
+		if (!profile->file.trans.table)
+			goto fail;
+
+		profile->file.trans.size = size;
+		for (i = 0; i < size; i++) {
+			char *str;
+			int c, j, size = unpack_strdup(e, &str, NULL);
+			if (!size)
+				goto fail;
+			profile->file.trans.table[i] = str;
+			/* verify that name doesn't start with space */
+			if (isspace(*str))
+				goto fail;
+
+			/* count internal #  of internal \0 */
+			for (c = j = 0; j < size - 2; j++) {
+				if (!str[j])
+					c++;
+			}
+			if (*str == ':') {
+				/* beginning with : requires an embedded \0 */
+				if (c != 1)
+					goto fail;
+				/* first character after : must be valid */
+				if (!str[1])
+					goto fail;
+			} else if (c)
+				/* fail - all other cases with embedded \0 */
+				goto fail;
+		}
+		if (!unpack_nameX(e, AA_ARRAYEND, NULL))
+			goto fail;
+		if (!unpack_nameX(e, AA_STRUCTEND, NULL))
+			goto fail;
+	}
+	return 1;
+
+fail:
+	aa_free_domain_entries(&profile->file.trans);
+	e->pos = pos;
+	return 0;
+}
+
+static bool unpack_rlimits(struct aa_ext *e, struct aa_profile *profile)
+{
+	void *pos = e->pos;
+
+	/* rlimits are optional */
+	if (unpack_nameX(e, AA_STRUCT, "rlimits")) {
+		int i, size;
+		u32 tmp = 0;
+		if (!unpack_u32(e, &tmp, NULL))
+			goto fail;
+		profile->rlimits.mask = tmp;
+
+		size = unpack_array(e, NULL);
+		if (size > RLIM_NLIMITS)
+			goto fail;
+		for (i = 0; i < size; i++) {
+			u64 tmp = 0;
+			if (!unpack_u64(e, &tmp, NULL))
+				goto fail;
+			profile->rlimits.limits[i].rlim_max = tmp;
+		}
+		if (!unpack_nameX(e, AA_ARRAYEND, NULL))
+			goto fail;
+		if (!unpack_nameX(e, AA_STRUCTEND, NULL))
+			goto fail;
+	}
+	return 1;
+
+fail:
+	e->pos = pos;
+	return 0;
+}
+
+/**
+ * unpack_profile - unpack a serialized profile
+ * @e: serialized data extent information
+ * @sa: audit struct for the operation
+ *
+ * NOTE: unpack profile sets audit struct if there is a failure
+ */
+static struct aa_profile *unpack_profile(struct aa_ext *e,
+					 struct aa_audit_iface *sa)
+{
+	struct aa_profile *profile = NULL;
+	const char *name = NULL;
+	size_t size = 0;
+	int i, error = -EPROTO;
+	kernel_cap_t tmpcap;
+	u32 tmp;
+	u64 tmp64;
+
+	/* check that we have the right struct being passed */
+	if (!unpack_nameX(e, AA_STRUCT, "profile"))
+		goto fail;
+	if (!unpack_str(e, &name, NULL))
+		goto fail;
+
+	profile = aa_alloc_profile(name);
+	if (!profile)
+		return ERR_PTR(-ENOMEM);
+
+	/* profile renaming is optional */
+	(void) unpack_str(e, &profile->rename, "rename");
+
+	/* xmatch is optional and may be NULL */
+	profile->xmatch = unpack_dfa(e);
+	if (IS_ERR(profile->xmatch)) {
+		error = PTR_ERR(profile->xmatch);
+		profile->xmatch = NULL;
+		goto fail;
+	}
+	/* xmatch_len is not optional if xmatch is set */
+	if (profile->xmatch) {
+		if (!unpack_u32(e, &tmp, NULL))
+			goto fail;
+		profile->xmatch_len = tmp;
+	}
+
+	/* per profile debug flags (complain, audit) */
+	if (!unpack_nameX(e, AA_STRUCT, "flags"))
+		goto fail;
+	if (!unpack_u32(e, &tmp, NULL))
+		goto fail;
+	if (tmp)
+		profile->flags |= PFLAG_HAT;
+	if (!unpack_u32(e, &tmp, NULL))
+		goto fail;
+	if (tmp)
+		profile->mode = APPARMOR_COMPLAIN;
+	if (!unpack_u32(e, &tmp, NULL))
+		goto fail;
+	if (tmp)
+		profile->audit = AUDIT_ALL;
+
+	if (!unpack_nameX(e, AA_STRUCTEND, NULL))
+		goto fail;
+
+	/* path_flags is optional */
+	if (unpack_u32(e, &profile->path_flags, "path_flags"))
+		profile->path_flags |= profile->flags & PFLAG_MEDIATE_DELETED;
+	else
+		/* default to */
+		profile->path_flags = PFLAG_MEDIATE_DELETED;
+
+	/* mmap_min_addr is optional */
+	if (unpack_u64(e, &tmp64, "mmap_min_addr")) {
+		profile->mmap_min_addr = (unsigned long)tmp64;
+		if (((u64) profile->mmap_min_addr) == tmp64) {
+			profile->flags |= PFLAG_MMAP_MIN_ADDR;
+		} else {
+			sa->base.info = "invalid set mmap_min_addr";
+			goto fail;
+		}
+	}
+
+	if (!unpack_u32(e, &(profile->caps.allowed.cap[0]), NULL))
+		goto fail;
+	if (!unpack_u32(e, &(profile->caps.audit.cap[0]), NULL))
+		goto fail;
+	if (!unpack_u32(e, &(profile->caps.quiet.cap[0]), NULL))
+		goto fail;
+	if (!unpack_u32(e, &tmpcap.cap[0], NULL))
+		goto fail;
+
+	if (unpack_nameX(e, AA_STRUCT, "caps64")) {
+		/* optional upper half of 64 bit caps */
+		if (!unpack_u32(e, &(profile->caps.allowed.cap[1]), NULL))
+			goto fail;
+		if (!unpack_u32(e, &(profile->caps.audit.cap[1]), NULL))
+			goto fail;
+		if (!unpack_u32(e, &(profile->caps.quiet.cap[1]), NULL))
+			goto fail;
+		if (!unpack_u32(e, &(tmpcap.cap[1]), NULL))
+			goto fail;
+		if (!unpack_nameX(e, AA_STRUCTEND, NULL))
+			goto fail;
+	}
+
+	if (unpack_nameX(e, AA_STRUCT, "capsx")) {
+		/* optional extended caps mediation mask */
+		if (!unpack_u32(e, &(profile->caps.extended.cap[0]), NULL))
+			goto fail;
+		if (!unpack_u32(e, &(profile->caps.extended.cap[1]), NULL))
+			goto fail;
+	}
+
+	if (!unpack_rlimits(e, profile))
+		goto fail;
+
+	size = unpack_array(e, "net_allowed_af");
+	if (size) {
+		if (size > AF_MAX)
+			goto fail;
+
+		for (i = 0; i < size; i++) {
+			if (!unpack_u16(e, &profile->net.allowed[i], NULL))
+				goto fail;
+			if (!unpack_u16(e, &profile->net.audit[i], NULL))
+				goto fail;
+			if (!unpack_u16(e, &profile->net.quiet[i], NULL))
+				goto fail;
+		}
+		if (!unpack_nameX(e, AA_ARRAYEND, NULL))
+			goto fail;
+		/*
+		 * allow unix domain and netlink sockets they are handled
+		 * by IPC
+		 */
+	}
+	profile->net.allowed[AF_UNIX] = 0xffff;
+	profile->net.allowed[AF_NETLINK] = 0xffff;
+
+	/* get file rules */
+	profile->file.dfa = unpack_dfa(e);
+	if (IS_ERR(profile->file.dfa)) {
+		error = PTR_ERR(profile->file.dfa);
+		profile->file.dfa = NULL;
+		goto fail;
+	}
+
+	if (!unpack_u32(e, &profile->file.start, "dfa_start"))
+		/* default start state */
+		profile->file.start = DFA_START;
+
+	if (!unpack_trans_table(e, profile))
+		goto fail;
+
+	if (!unpack_nameX(e, AA_STRUCTEND, NULL))
+		goto fail;
+
+	return profile;
+
+fail:
+	sa->name = name ? name : "unknown";
+	if (!sa->base.info)
+		sa->base.info = "failed to unpack profile";
+
+	aa_put_profile(profile);
+
+	return ERR_PTR(error);
+}
+
+/**
+ * aa_verify_head - unpack serialized stream header
+ * @e: serialized data read head
+ * @operation: operation header is being verified for
+ *
+ * Returns: error or 0 if header is good
+ */
+static int aa_verify_header(struct aa_ext *e, struct aa_audit_iface *sa)
+{
+	/* get the interface version */
+	if (!unpack_u32(e, &e->version, "version")) {
+		sa->base.info = "invalid profile format";
+		aa_audit_iface(sa);
+		return -EPROTONOSUPPORT;
+	}
+
+	/* check that the interface version is currently supported */
+	if (e->version != 5) {
+		sa->base.info = "unsupported interface version";
+		aa_audit_iface(sa);
+		return -EPROTONOSUPPORT;
+	}
+
+	/* read the namespace if present */
+	if (!unpack_str(e, &sa->name2, "namespace"))
+		sa->name2 = NULL;
+
+	return 0;
+}
+
+/**
+ * verify_profile - Do post unpack analysis to verify profile consistency
+ * @profile: profile to verify
+ *
+ * Returns: 0 if passes verification else error
+ */
+static bool verify_xindex(int xindex, int table_size)
+{
+	int index, xtype;
+	xtype = xindex & AA_X_TYPE_MASK;
+	index = xindex & AA_X_INDEX_MASK;
+	if (xtype == AA_X_TABLE && index > table_size)
+		return 0;
+	return 1;
+}
+
+/* verify dfa xindexes are in range of transition tables */
+static bool verify_dfa_xindex(struct aa_dfa *dfa, int table_size)
+{
+	int i;
+	for (i = 0; i < dfa->tables[YYTD_ID_ACCEPT]->td_lolen; i++) {
+		if (!verify_xindex(dfa_user_xindex(dfa, i), table_size))
+			return 0;
+		if (!verify_xindex(dfa_other_xindex(dfa, i), table_size))
+			return 0;
+	}
+	return 1;
+}
+
+static int verify_profile(struct aa_profile *profile, struct aa_audit_iface *sa)
+{
+	if (aa_g_paranoid_load) {
+		if (profile->file.dfa &&
+		    !verify_dfa_xindex(profile->file.dfa,
+				       profile->file.trans.size)) {
+			sa->base.info = "Invalid named transition";
+			return -EPROTO;
+		}
+	}
+
+	return 0;
+}
+
+/**
+ * aa_unpack - unpack packed binary profile data loaded from user space
+ * @udata: user data copied to kmem  (NOT NULL)
+ * @size: the size of the user data
+ * @sa: audit struct for unpacking  (NOT NULL)
+ *
+ * Unpack user data and return refcounted allocated profile or ERR_PTR
+ *
+ * Returns: profile else error pointer if fails to unpack
+ */
+struct aa_profile *aa_unpack(void *udata, size_t size,
+			     struct aa_audit_iface *sa)
+{
+	struct aa_profile *profile;
+	int error;
+	struct aa_ext e = {
+		.start = udata,
+		.end = udata + size,
+		.pos = udata,
+	};
+
+	error = aa_verify_header(&e, sa);
+	if (error)
+		return ERR_PTR(error);
+
+	profile = unpack_profile(&e, sa);
+	if (IS_ERR(profile)) {
+		sa->pos = e.pos - e.start;
+		return profile;
+	}
+	error = verify_profile(profile, sa);
+	if (error) {
+		aa_put_profile(profile);
+		profile = ERR_PTR(error);
+	}
+
+	/* return refcount */
+	return profile;
+}
--- linux-mvl-dove-2.6.32.orig/security/apparmor/apparmorfs.c
+++ linux-mvl-dove-2.6.32/security/apparmor/apparmorfs.c
@@ -0,0 +1,561 @@
+/*
+ * AppArmor security module
+ *
+ * This file contains AppArmor /sys/kernel/security/apparmor interface functions
+ *
+ * Copyright (C) 1998-2008 Novell/SUSE
+ * Copyright 2009-2010 Canonical Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ */
+
+#include <linux/security.h>
+#include <linux/vmalloc.h>
+#include <linux/module.h>
+#include <linux/seq_file.h>
+#include <linux/uaccess.h>
+#include <linux/namei.h>
+
+#include "include/apparmor.h"
+#include "include/apparmorfs.h"
+#include "include/audit.h"
+#include "include/context.h"
+#include "include/policy.h"
+
+/**
+ * kvmalloc - do allocation prefering kmalloc but falling back to vmalloc
+ * @size: size of allocation
+ *
+ * Return: allocated buffer or NULL if failed
+ *
+ * It is possible that policy being loaded from the user is larger than
+ * what can be allocated by kmalloc, in those cases fall back to vmalloc.
+ */
+static void *kvmalloc(size_t size)
+{
+	void *buffer;
+
+	if (size == 0)
+		return NULL;
+
+	buffer = kmalloc(size, GFP_KERNEL | __GFP_NOWARN);
+	if (!buffer)
+		buffer = vmalloc(size);
+	return buffer;
+}
+
+/**
+ * kvfree - free an allocation do by kvmalloc
+ * @buffer: buffer to free
+ *
+ * Free a buffer allocated by kvmalloc
+ */
+static void kvfree(void *buffer)
+{
+	if (!buffer)
+		return;
+
+	if (is_vmalloc_addr(buffer))
+		vfree(buffer);
+	else
+		kfree(buffer);
+}
+
+/**
+ * aa_simple_write_to_buffer - common routine for getting policy from user
+ * @userbuf: user buffer to copy data from  (NOT NULL)
+ * @alloc_size: size of user buffer
+ * @copy_size: size of data to copy from user buffer
+ * @pos: position write is at in the file
+ * @operation: name of operation doing the user buffer copy (NOT NULL)
+ *
+ * Returns: kernel buffer containing copy of user buffer data or an
+ *          ERR_PTR on failure.
+ */
+static char *aa_simple_write_to_buffer(const char __user *userbuf,
+				       size_t alloc_size, size_t copy_size,
+				       loff_t *pos, const char *operation)
+{
+	char *data;
+
+	if (*pos != 0) {
+		/* only writes from pos 0, that is complete writes */
+		data = ERR_PTR(-ESPIPE);
+		goto out;
+	}
+
+	/*
+	 * Don't allow profile load/replace/remove from profiles that don't
+	 * have CAP_MAC_ADMIN
+	 */
+	if (!capable(CAP_MAC_ADMIN)) {
+		struct aa_profile *profile = NULL;
+		struct aa_audit sa = {
+			.operation = operation,
+			.gfp_mask = GFP_KERNEL,
+			.error = -EACCES,
+		};
+		profile = aa_current_profile();
+		data = ERR_PTR(aa_audit(AUDIT_APPARMOR_DENIED, profile, &sa,
+					NULL));
+		goto out;
+	}
+	/* freed by caller to aa_simple_write_to_buffer */
+	data = kvmalloc(alloc_size);
+	if (data == NULL) {
+		data = ERR_PTR(-ENOMEM);
+		goto out;
+	}
+
+	if (copy_from_user(data, userbuf, copy_size)) {
+		kvfree(data);
+		data = ERR_PTR(-EFAULT);
+		goto out;
+	}
+
+out:
+	return data;
+}
+
+
+/* .load file hook fn to load policy */
+static ssize_t aa_profile_load(struct file *f, const char __user *buf,
+			       size_t size, loff_t *pos)
+{
+	char *data;
+	ssize_t error;
+
+	data = aa_simple_write_to_buffer(buf, size, size, pos, "profile_load");
+
+	error = PTR_ERR(data);
+	if (!IS_ERR(data)) {
+		error = aa_interface_replace_profiles(data, size, 1);
+		kvfree(data);
+	}
+
+	return error;
+}
+
+static const struct file_operations aa_fs_profile_load = {
+	.write = aa_profile_load
+};
+
+/* .replace file hook fn to load and/or replace policy */
+static ssize_t aa_profile_replace(struct file *f, const char __user *buf,
+				  size_t size, loff_t *pos)
+{
+	char *data;
+	ssize_t error;
+
+	data = aa_simple_write_to_buffer(buf, size, size, pos,
+					 "profile_replace");
+	error = PTR_ERR(data);
+	if (!IS_ERR(data)) {
+		error = aa_interface_replace_profiles(data, size, 0);
+		kvfree(data);
+	}
+
+	return error;
+}
+
+static const struct file_operations aa_fs_profile_replace = {
+	.write = aa_profile_replace
+};
+
+/* .remove file hook fn to remove loaded policy */
+static ssize_t aa_profile_remove(struct file *f, const char __user *buf,
+				 size_t size, loff_t *pos)
+{
+	char *data;
+	ssize_t error;
+
+	/*
+	 * aa_remove_profile needs a null terminated string so 1 extra
+	 * byte is allocated and the copied data is null terminated.
+	 */
+	data = aa_simple_write_to_buffer(buf, size + 1, size, pos,
+					 "profile_remove");
+
+	error = PTR_ERR(data);
+	if (!IS_ERR(data)) {
+		data[size] = 0;
+		error = aa_interface_remove_profiles(data, size);
+		kvfree(data);
+	}
+
+	return error;
+}
+
+static const struct file_operations aa_fs_profile_remove = {
+	.write = aa_profile_remove
+};
+
+
+/**
+ * __next_namespace - find the next namespace to list
+ * @root: root namespace to stop search at (NOT NULL)
+ * @ns: current ns position (NOT NULL)
+ *
+ * Find the next namespace from @ns under @root and handle all locking needed
+ * while switching current namespace.
+ *
+ * Returns: next namespace or NULL if at last namespace under @root
+ * NOTE: will not unlock root->lock
+ */
+static struct aa_namespace *__next_namespace(struct aa_namespace *root,
+					     struct aa_namespace *ns)
+{
+	struct aa_namespace *parent;
+
+	/* is next namespace a child */
+	if (!list_empty(&ns->sub_ns)) {
+		struct aa_namespace *next;
+		next = list_first_entry(&ns->sub_ns, typeof(*ns), base.list);
+		read_lock(&next->lock);
+		return next;
+	}
+
+	/* check if the next ns is a sibling, parent, gp, .. */
+	parent = ns->parent;
+	while (parent) {
+		read_unlock(&ns->lock);
+		list_for_each_entry_continue(ns, &parent->sub_ns, base.list) {
+			read_lock(&ns->lock);
+			return ns;
+		}
+		if (parent == root)
+			return NULL;
+		ns = parent;
+		parent = parent->parent;
+	}
+
+	return NULL;
+}
+
+/**
+ * __first_profile - find the first profile in a namespace
+ * @root: namespace that is root of profiles being displayed (NOT NULL)
+ * @ns: namespace to start in   (NOT NULL)
+ *
+ * Returns: unrefcounted profile or NULL if no profile
+ */
+	static struct aa_profile *__first_profile(struct aa_namespace *root,
+						  struct aa_namespace *ns)
+{
+	for ( ; ns; ns = __next_namespace(root, ns)) {
+		if (!list_empty(&ns->base.profiles))
+			return list_first_entry(&ns->base.profiles,
+						struct aa_profile, base.list);
+	}
+	return NULL;
+}
+
+/**
+ * __next_profile - step to the next profile in a profile tree
+ * @profile: current profile in tree (NOT NULL)
+ *
+ * Perform a depth first taversal on the profile tree in a namespace
+ *
+ * Returns: next profile or NULL if done
+ * Requires: profile->ns.lock to be held
+ */
+static struct aa_profile *__next_profile(struct aa_profile *p)
+{
+	struct aa_profile *parent;
+	struct aa_namespace *ns = p->ns;
+
+	/* is next profile a child */
+	if (!list_empty(&p->base.profiles))
+		return list_first_entry(&p->base.profiles, typeof(*p),
+					base.list);
+
+	/* is next profile a sibling, parent sibling, gp, subling, .. */
+	parent = p->parent;
+	while (parent) {
+		list_for_each_entry_continue(p, &parent->base.profiles,
+					     base.list)
+				return p;
+		p = parent;
+		parent = parent->parent;
+	}
+
+	/* is next another profile in the namespace */
+	list_for_each_entry_continue(p, &ns->base.profiles, base.list)
+		return p;
+
+	return NULL;
+}
+
+/**
+ * next_profile - step to the next profile in where ever it may be
+ * @root: root namespace  (NOT NULL)
+ * @profile: current profile  (NOT NULL)
+ *
+ * Returns: next profile or NULL if there isn't one
+ */
+static struct aa_profile *next_profile(struct aa_namespace *root,
+				       struct aa_profile *profile)
+{
+	struct aa_profile *next = __next_profile(profile);
+	if (next)
+		return next;
+
+	/* finished all profiles in namespace move to next namespace */
+	return __first_profile(root, __next_namespace(root, profile->ns));
+}
+
+/**
+ * p_start - start a depth first traversal of profile tree
+ * @f: seq_file to fill
+ * @pos: current position
+ *
+ * Returns: first profile under current namespace or NULL if none found
+ *
+ * acquires first ns->lock
+ */
+static void *p_start(struct seq_file *f, loff_t *pos)
+	__acquires(root->lock)
+{
+	struct aa_profile *profile = NULL;
+	struct aa_namespace *root = aa_current_profile()->ns;
+	loff_t l = *pos;
+	f->private = aa_get_namespace(root);
+
+
+	/* find the first profile */
+	read_lock(&root->lock);
+	profile = __first_profile(root, root);
+
+	/* skip to position */
+	for (; profile && l > 0; l--)
+		profile = next_profile(root, profile);
+
+	return profile;
+}
+
+/**
+ * p_next - read the next profile entry
+ * @f: seq_file to fill
+ * @p: profile previously returned
+ * @pos: current position
+ *
+ * Returns: next profile after @p or NULL if none
+ *
+ * may acquire/release locks in namespace tree as necessary
+ */
+static void *p_next(struct seq_file *f, void *p, loff_t *pos)
+{
+	struct aa_profile *profile = p;
+	struct aa_namespace *root = f->private;
+	(*pos)++;
+
+	return next_profile(root, profile);
+}
+
+/**
+ * p_stop - stop depth first traversal
+ * @f: seq_file we are filling
+ * @p: the last profile writen
+ *
+ * Release all locking done by p_start/p_next on namespace tree
+ */
+static void p_stop(struct seq_file *f, void *p)
+	__releases(root->lock)
+{
+	struct aa_profile *profile = p;
+	struct aa_namespace *root = f->private, *ns;
+
+	if (profile) {
+		for (ns = profile->ns; ns && ns != root; ns = ns->parent)
+			read_unlock(&ns->lock);
+	}
+	read_unlock(&root->lock);
+	aa_put_namespace(root);
+}
+
+/**
+ * print_ns_name - print a namespace name back to @root
+ * @root: root namespace to stop at
+ * @ns: namespace to gen name for
+ *
+ * Returns: true if it printed a name
+ */
+static bool print_ns_name(struct seq_file *f, struct aa_namespace *root,
+			  struct aa_namespace *ns)
+{
+	if (!ns || ns == root)
+		return 0;
+
+	if (ns->parent && print_ns_name(f, root, ns->parent))
+		seq_printf(f, "//");
+
+	seq_printf(f, "%s", ns->base.name);
+	return 1;
+}
+
+/**
+ * seq_show_profile - 
+ * @f: seq_file to file
+ * @p: current position (profile)    (NOT NULL)
+ *
+ * Returns: error on failure
+ */
+static int seq_show_profile(struct seq_file *f, void *p)
+{
+	struct aa_profile *profile = (struct aa_profile *)p;
+	struct aa_namespace *root = f->private;
+
+	if (profile->ns != root)
+		seq_printf(f, ":");
+	if (print_ns_name(f, root, profile->ns))
+		seq_printf(f, "://");
+	seq_printf(f, "%s (%s)\n", profile->base.hname,
+		   COMPLAIN_MODE(profile) ? "complain" : "enforce");
+
+	return 0;
+}
+
+static const struct seq_operations aa_fs_profiles_op = {
+	.start = p_start,
+	.next = p_next,
+	.stop = p_stop,
+	.show = seq_show_profile,
+};
+
+static int aa_profiles_open(struct inode *inode, struct file *file)
+{
+	return seq_open(file, &aa_fs_profiles_op);
+}
+
+static int aa_profiles_release(struct inode *inode, struct file *file)
+{
+	return seq_release(inode, file);
+}
+
+static const struct file_operations aa_fs_profiles_fops = {
+	.open = aa_profiles_open,
+	.read = seq_read,
+	.llseek = seq_lseek,
+	.release = aa_profiles_release,
+};
+
+
+/** Base file system setup **/
+
+static struct dentry *aa_fs_dentry;
+struct dentry *aa_fs_null;
+struct vfsmount *aa_fs_mnt;
+
+static void aafs_remove(const char *name)
+{
+	struct dentry *dentry;
+
+	dentry = lookup_one_len(name, aa_fs_dentry, strlen(name));
+	if (!IS_ERR(dentry)) {
+		securityfs_remove(dentry);
+		dput(dentry);
+	}
+}
+
+/**
+ * aafs_create - create an entry in the apparmor filesystem
+ * @name: name of the entry
+ * @mask: file permission mask of the file
+ * @fops: file operations for the file
+ *
+ * Used aafs_remove to remove entries created with this fn.
+ */
+static int aafs_create(const char *name, int mask,
+		       const struct file_operations *fops)
+{
+	struct dentry *dentry;
+
+	dentry = securityfs_create_file(name, S_IFREG | mask, aa_fs_dentry,
+					NULL, fops);
+
+	return IS_ERR(dentry) ? PTR_ERR(dentry) : 0;
+}
+
+/**
+ * aa_destroy_aafs - cleanup and free aafs
+ *
+ * releases dentries allocated by aa_create_aafs
+ */
+void aa_destroy_aafs(void)
+{
+	if (aa_fs_dentry) {
+		aafs_remove(".remove");
+		aafs_remove(".replace");
+		aafs_remove(".load");
+		aafs_remove("profiles");
+#ifdef CONFIG_SECURITY_APPARMOR_COMPAT_24
+		aafs_remove("matching");
+		aafs_remove("features");
+#endif
+		securityfs_remove(aa_fs_dentry);
+		aa_fs_dentry = NULL;
+	}
+}
+
+/**
+ * aa_create_aafs - create the apparmor security filesystem
+ *
+ * dentries created here are released by aa_destroy_aafs
+ *
+ * Returns: error on failure
+ */
+int aa_create_aafs(void)
+{
+	int error;
+
+	if (!apparmor_initialized)
+		return 0;
+
+	if (aa_fs_dentry) {
+		AA_ERROR("%s: AppArmor securityfs already exists\n", __func__);
+		return -EEXIST;
+	}
+
+	aa_fs_dentry = securityfs_create_dir("apparmor", NULL);
+	if (IS_ERR(aa_fs_dentry)) {
+		error = PTR_ERR(aa_fs_dentry);
+		aa_fs_dentry = NULL;
+		goto error;
+	}
+#ifdef CONFIG_SECURITY_APPARMOR_COMPAT_24
+	error = aafs_create("matching", 0444, &aa_fs_matching_fops);
+	if (error)
+		goto error;
+	error = aafs_create("features", 0444, &aa_fs_features_fops);
+	if (error)
+		goto error;
+#endif
+	error = aafs_create("profiles", 0440, &aa_fs_profiles_fops);
+	if (error)
+		goto error;
+	error = aafs_create(".load", 0640, &aa_fs_profile_load);
+	if (error)
+		goto error;
+	error = aafs_create(".replace", 0640, &aa_fs_profile_replace);
+	if (error)
+		goto error;
+	error = aafs_create(".remove", 0640, &aa_fs_profile_remove);
+	if (error)
+		goto error;
+
+	/* TODO: add support for apparmorfs_null and apparmorfs_mnt */
+
+	/* Report that AppArmor fs is enabled */
+	aa_info_message("AppArmor Filesystem Enabled");
+	return 0;
+
+error:
+	aa_destroy_aafs();
+	AA_ERROR("Error creating AppArmor securityfs\n");
+	return error;
+}
+
+fs_initcall(aa_create_aafs);
--- linux-mvl-dove-2.6.32.orig/security/apparmor/sid.c
+++ linux-mvl-dove-2.6.32/security/apparmor/sid.c
@@ -0,0 +1,55 @@
+/*
+ * AppArmor security module
+ *
+ * This file contains AppArmor security identifier (sid) manipulation fns
+ *
+ * Copyright 2009-2010 Canonical Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ *
+ *
+ * AppArmor allocates a unique sid for every profile loaded.  If a profile
+ * is replaced it receive the sid of the profile it is replacing.
+ *
+ * The sid value of 0 is invalid.
+ */
+
+#include <linux/spinlock.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+
+#include "include/sid.h"
+
+/* global counter from which sids are allocated */
+static u32 global_sid;
+static DEFINE_SPINLOCK(sid_lock);
+
+/* TODO FIXME: add sid to profile mapping, and sid recycling */
+
+/**
+ * aa_alloc_sid - allocate a new sid for a profile
+ */
+u32 aa_alloc_sid(void)
+{
+	u32 sid;
+
+	/*
+	 * TODO FIXME: sid recycling - part of profile mapping table
+	 */
+	spin_lock(&sid_lock);
+	sid = (++global_sid);
+	spin_unlock(&sid_lock);
+	return sid;
+}
+
+/**
+ * aa_free_sid - free a sid
+ * @sid: sid to free
+ */
+void aa_free_sid(u32 sid)
+{
+	;			/* NOP ATM */
+}
--- linux-mvl-dove-2.6.32.orig/security/apparmor/apparmorfs-24.c
+++ linux-mvl-dove-2.6.32/security/apparmor/apparmorfs-24.c
@@ -0,0 +1,61 @@
+/*
+ * AppArmor security module
+ *
+ * This file contains AppArmor /sys/kernel/secrutiy/apparmor interface functions
+ *
+ * Copyright (C) 1998-2008 Novell/SUSE
+ * Copyright 2009-2010 Canonical Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ *
+ *
+ * This file contain functions providing an interface for <= AppArmor 2.4
+ * compatibility.  It is dependent on CONFIG_SECURITY_APPARMOR_COMPAT_24
+ * being set (see Makefile).
+ */
+
+#include <linux/security.h>
+#include <linux/vmalloc.h>
+#include <linux/module.h>
+#include <linux/seq_file.h>
+#include <linux/uaccess.h>
+#include <linux/namei.h>
+
+#include "include/apparmor.h"
+#include "include/audit.h"
+#include "include/context.h"
+#include "include/policy.h"
+
+
+/* apparmor/matching */
+static ssize_t aa_matching_read(struct file *file, char __user *buf,
+				size_t size, loff_t *ppos)
+{
+	const char matching[] = "pattern=aadfa audit perms=crwxamlk/ "
+	    "user::other";
+
+	return simple_read_from_buffer(buf, size, ppos, matching,
+				       sizeof(matching) - 1);
+}
+
+const struct file_operations aa_fs_matching_fops = {
+	.read = aa_matching_read,
+};
+
+/* apparmor/features */
+static ssize_t aa_features_read(struct file *file, char __user *buf,
+				size_t size, loff_t *ppos)
+{
+	const char features[] = "file=3.1 capability=2.0 network=1.0 "
+	    "change_hat=1.5 change_profile=1.1 " "aanamespaces=1.1 rlimit=1.1";
+
+	return simple_read_from_buffer(buf, size, ppos, features,
+				       sizeof(features) - 1);
+}
+
+const struct file_operations aa_fs_features_fops = {
+	.read = aa_features_read,
+};
--- linux-mvl-dove-2.6.32.orig/security/apparmor/policy.c
+++ linux-mvl-dove-2.6.32/security/apparmor/policy.c
@@ -0,0 +1,1098 @@
+/*
+ * AppArmor security module
+ *
+ * This file contains AppArmor policy manipulation functions
+ *
+ * Copyright (C) 1998-2008 Novell/SUSE
+ * Copyright 2009-2010 Canonical Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ *
+ *
+ * AppArmor policy is based around profiles, which contain the rules a
+ * task is confined by.  Every task in the sytem has a profile attached
+ * to it determined either by matching "unconfined" tasks against the
+ * visible set of profiles or by following a profiles attachment rules.
+ *
+ * Each profile exists in a profile namespace which is a container of
+ * visible profiles.  Each namespace contains a special "unconfined" profile,
+ * which doesn't enforce any confinement on a task beyond DAC.
+ *
+ * Namespace and profile names can be written together in either
+ * of two syntaxes.
+ *	:namespace:profile - used by kernel interfaces for easy detection
+ *	namespace://profile - used by policy
+ *
+ * Profile names can not start with : or @ or ^ and may not contain \0
+ * 
+ * Reserved profile names
+ *	unconfined - special automatically generated unconfined profile
+ *	inherit - special name to indicate profile inheritance
+ *	null-XXXX-YYYY - special automically generated learning profiles
+ *
+ * Namespace names may not start with / or @ and may not contain \0 or :
+ * Reserved namespace namespace
+ *	user-XXXX - user defined profiles
+ *
+ * a // in a profile or namespace name indicates a hierarcical name with the
+ * name before the // being the parent and the name after the child.
+ *
+ * Profile and namespace hierachies serve two different but similar purposes.
+ * The namespace contains the set of visible profiles that are considered
+ * for attachment.  The hierarchy of namespaces allows for virtualizing
+ * the namespace so that for example a chroot can have its own set of profiles
+ * which may define some local user namespaces.
+ * The profile hierachy severs two distinct purposes,
+ * -  it allows for sub profiles or hats, which allows an application to run
+ *    subprograms under its own profile with different restriction than it
+ *    self, and not have it use the system profile.
+ *    eg. if a mail program starts an editor, the policy might make the
+ *        restrictions tighter on the editor tighter than the mail program,
+ *        and definitely different than general editor restrictions
+ * - it allows for binary hierarchy of profiles, so that execution history
+ *   is preserved.  This feature isn't exploited by AppArmor reference policy
+ *   but is allowed.  NOTE: this is currently suboptimal because profile
+ *   aliasing is not currently implemented so that a profile for each
+ *   level must be defined.
+ *   eg. /bin/bash///bin/ls as a name would indicate /bin/ls was started
+ *       from /bin/bash
+ *
+ *   A profile or namespace name that can contain one or more // seperators
+ *   is refered to as an hname (hierarchical).
+ *   eg.  /bin/bash//bin/ls
+ *
+ *   An fqname is a name that may contain both namespace and profile hnames.
+ *   eg. :ns:/bin/bash//bin/ls
+ *
+ * NOTES:
+ *   - locking of profile lists is currently fairly coarse.  All profile
+ *     lists within a namespace use the namespace lock.
+ * FIXME: move profile lists to using rcu_lists
+ */
+
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+#include <linux/string.h>
+
+#include "include/apparmor.h"
+#include "include/capability.h"
+#include "include/context.h"
+#include "include/file.h"
+#include "include/ipc.h"
+#include "include/match.h"
+#include "include/path.h"
+#include "include/policy.h"
+#include "include/policy_unpack.h"
+#include "include/resource.h"
+#include "include/sid.h"
+
+
+/* root profile namespace */
+struct aa_namespace *root_ns;
+
+const char *profile_mode_names[] = {
+	"enforce",
+	"complain",
+	"kill",
+};
+
+/**
+ * hname_tail - find the last component of an hname
+ * @name: hname to find the tail component of  (NOT NULL)
+ *
+ * Returns: the tail name component of an hname
+ */
+static const char *hname_tail(const char *hname)
+{
+	char *split;
+	hname = strstrip((char *)hname);
+	for (split = strstr(hname, "//"); split; split = strstr(hname, "//"))
+		hname = split + 2;
+
+	return hname;
+}
+
+/**
+ * policy_init - initialize a policy structure
+ * @policy: policy to initialize  (NOT NULL)
+ * @name: name of the policy, init will make a copy of it  (NOT NULL)
+ */
+static bool policy_init(struct aa_policy *policy, const char *name)
+{
+	/* freed by policy_free */
+	policy->hname = kstrdup(name, GFP_KERNEL);
+	if (!policy->hname)
+		return 0;
+	/* base.name is a substring of fqname */
+	policy->name = (char *)hname_tail(policy->hname);
+
+	INIT_LIST_HEAD(&policy->list);
+	INIT_LIST_HEAD(&policy->profiles);
+	kref_init(&policy->count);
+
+	return 1;
+}
+
+/**
+ * policy_destroy - free the elements referenced by @policy
+ * @policy: policy that is to have its elements freed  (NOT NULL)
+ */
+static void policy_destroy(struct aa_policy *policy)
+{
+	/* still contains profiles -- invalid */
+	if (!list_empty(&policy->profiles)) {
+		AA_ERROR("%s: internal error, "
+			 "policy '%s' still contains profiles\n",
+			 __func__, policy->name);
+		BUG();
+	}
+	if (!list_empty(&policy->list)) {
+		AA_ERROR("%s: internal error, policy '%s' still on list\n",
+			 __func__, policy->name);
+		BUG();
+	}
+
+	/* don't free name as its a subset of hname */
+	kzfree(policy->hname);
+}
+
+/**
+ * __policy_find - find a policy by @name on a policy list
+ * @head: list to search  (NOT NULL)
+ * @name: name to search for  (NOT NULL)
+ *
+ * Requires: correct locks for the @head list be held
+ *
+ * Returns: policy that match @name or NULL if not found
+ */
+static struct aa_policy *__policy_find(struct list_head *head, const char *name)
+{
+	struct aa_policy *policy;
+
+	list_for_each_entry(policy, head, list) {
+		if (!strcmp(policy->name, name))
+			return policy;
+	}
+	return NULL;
+}
+
+/**
+ * __policy_strn_find - find a policy thats name matches @len chars of @str
+ * @head: list to search  (NOT NULL)
+ * @str: string to search for  (NOT NULL)
+ * @len: length of match required
+ *
+ * Requires: correct locks for the @head list be held
+ *
+ * Returns: policy that match @str or NULL if not found
+ *
+ * if @len == strlen(@strlen) then this is equiv to __policy_find
+ * other wise it allows searching for policy by a partial match of name
+ */
+static struct aa_policy *__policy_strn_find(struct list_head *head,
+					    const char *str, int len)
+{
+	struct aa_policy *policy;
+
+	list_for_each_entry(policy, head, list) {
+		if (aa_strneq(policy->name, str, len))
+			return policy;
+	}
+
+	return NULL;
+}
+
+/*
+ * Routines for AppArmor namespaces
+ */
+
+/**
+ * aa_alloc_namespace - allocate, initialize and return a new namespace
+ * @name: a preallocated name  (NOT NULL)
+ *
+ * Returns: NULL on failure.
+ */
+static struct aa_namespace *aa_alloc_namespace(const char *name)
+{
+	struct aa_namespace *ns;
+
+	ns = kzalloc(sizeof(*ns), GFP_KERNEL);
+	AA_DEBUG("%s(%p)\n", __func__, ns);
+	if (!ns)
+		return NULL;
+
+	if (!policy_init(&ns->base, name))
+		goto fail_ns;
+	INIT_LIST_HEAD(&ns->sub_ns);
+	rwlock_init(&ns->lock);
+
+	/* released by aa_free_namespace */
+	ns->unconfined = aa_alloc_profile("unconfined");
+	if (!ns->unconfined)
+		goto fail_unconfined;
+
+	ns->unconfined->sid = aa_alloc_sid();
+	ns->unconfined->flags = PFLAG_UNCONFINED | PFLAG_IX_ON_NAME_ERROR |
+	    PFLAG_IMMUTABLE;
+
+	/*
+	 * released by aa_free_namespace, however aa_remove_namespace breaks
+	 * the cyclic references (ns->unconfined, and unconfined->ns) and
+	 * replaces with refs to parent namespace unconfined
+	 */
+	ns->unconfined->ns = aa_get_namespace(ns);
+
+	return ns;
+
+fail_unconfined:
+	kzfree(ns->base.name);
+fail_ns:
+	kzfree(ns);
+	return NULL;
+}
+
+/**
+ * aa_free_namespace - free a profile namespace
+ * @ns: the namespace to free  (MAYBE NULL)
+ *
+ * Requires: All references to the namespace must have been put, if the
+ *           namespace was referenced by a profile confining a task,
+ */
+static void aa_free_namespace(struct aa_namespace *ns)
+{
+	if (!ns)
+		return;
+
+	policy_destroy(&ns->base);
+	aa_put_namespace(ns->parent);
+
+	if (ns->unconfined && ns->unconfined->ns == ns)
+		ns->unconfined->ns = NULL;
+
+	aa_put_profile(ns->unconfined);
+	kzfree(ns);
+}
+
+/**
+ * aa_free_namespace_kref - free aa_namespace by kref (see aa_put_namespace)
+ * @kr: kref callback for freeing of a namespace  (NOT NULL)
+ */
+void aa_free_namespace_kref(struct kref *kref)
+{
+	aa_free_namespace(container_of(kref, struct aa_namespace, base.count));
+}
+
+/**
+ * __aa_find_namespace - find a namespace on a list by @name
+ * @head: list to search for namespace on  (NOT NULL)
+ * @name: name of namespace to look for  (NOT NULL)
+ *
+ * Returns: unrefcounted namespace
+ *
+ * Requires: ns lock be held
+ */
+static struct aa_namespace *__aa_find_namespace(struct list_head *head,
+						const char *name)
+{
+	return (struct aa_namespace *)__policy_find(head, name);
+}
+
+/**
+ * aa_find_namespace  -  look up a profile namespace on the namespace list
+ * @root: namespace to search in  (NOT NULL)
+ * @name: name of namespace to find  (NOT NULL)
+ *
+ * Returns: a pointer to the namespace on the list, or NULL if no namespace
+ * called @name exists.
+ *
+ * refcount released by caller
+ */
+struct aa_namespace *aa_find_namespace(struct aa_namespace *root,
+				       const char *name)
+{
+	struct aa_namespace *ns = NULL;
+
+	read_lock(&root->lock);
+	ns = aa_get_namespace(__aa_find_namespace(&root->sub_ns, name));
+	read_unlock(&root->lock);
+
+	return ns;
+}
+
+/**
+ * aa_prepare_namespace - find an existing or create a new namespace of @name
+ * @name: the namespace to find or add  (NOT NULL)
+ *
+ * Returns: refcounted namespace or NULL if failed to create one
+ */
+static struct aa_namespace *aa_prepare_namespace(const char *name)
+{
+	struct aa_namespace *ns, *root;
+
+	root = aa_current_profile()->ns;
+
+	write_lock(&root->lock);
+
+	/* if name isn't specified the profile is loaded to the current ns */
+	if (!name) {
+		/* released by caller */
+		ns = aa_get_namespace(root);
+		goto out;
+	}
+
+	/* try and find the specified ns and if it doesn't exist create it */
+	/* released by caller */
+	ns = aa_get_namespace(__aa_find_namespace(&root->sub_ns, name));
+	if (!ns) {
+		/* name && namespace not found */
+		struct aa_namespace *new_ns;
+		write_unlock(&root->lock);
+		new_ns = aa_alloc_namespace(name);
+		if (!new_ns)
+			return NULL;
+		write_lock(&root->lock);
+		/* test for race when new_ns was allocated */
+		ns = __aa_find_namespace(&root->sub_ns, name);
+		if (!ns) {
+			/* add parent ref */
+			new_ns->parent = aa_get_namespace(root);
+
+			list_add(&new_ns->base.list, &root->sub_ns);
+			/* add list ref */
+			ns = aa_get_namespace(new_ns);
+		} else {
+			/* raced so free the new one */
+			aa_free_namespace(new_ns);
+			/* get reference on namespace */
+			aa_get_namespace(ns);
+		}
+	}
+out:
+	write_unlock(&root->lock);
+
+	/* return ref */
+	return ns;
+}
+
+/**
+ * __aa_add_profile - add a profile to a list
+ * @list: list to add it to  (NOT NULL)
+ * @profile: the profile to add  (NOT NULL)
+ *
+ * refcount @profile, should be put by __aa_remove_profile
+ *
+ * Requires: namespace lock be held, or list not be shared
+ */
+static void __aa_add_profile(struct list_head *list,
+			     struct aa_profile *profile)
+{
+	list_add(&profile->base.list, list);
+	/* get list reference */
+	aa_get_profile(profile);
+}
+
+/**
+ * __aa_remove_profile - remove a profile from the list it is one
+ * @profile: the profile to remove  (NOT NULL)
+ *
+ * remove a profile from the list, warning generally removal should
+ * be done with __aa_replace_profile as most profile removals are
+ * replacements to the unconfined profile.
+ *
+ * put @profile list refcount
+ *
+ * Requires: namespace lock be held, or list not have been live
+ */
+static void __aa_remove_profile(struct aa_profile *profile)
+{
+	list_del_init(&profile->base.list);
+	if (!(profile->flags & PFLAG_NO_LIST_REF))
+		/* release list reference */
+		aa_put_profile(profile);
+}
+
+/**
+ * __aa_replace_profile - replace @old with @new on a list
+ * @old: profile to be replaced  (NOT NULL)
+ * @new: profile to replace @old with  (MAYBE NULL)
+ *
+ * Will duplicaticate and refcount elements that @new inherits from @old
+ * and will inherit @old children.  If new is NULL it will replace to the
+ * unconfined profile for old's namespace.
+ *
+ * refcount @new for list, put @old list refcount
+ *
+ * Requires: namespace list lock be held, or list not be shared
+ */
+static void __aa_replace_profile(struct aa_profile *old,
+				 struct aa_profile *new)
+{
+	struct aa_policy *policy;
+	struct aa_profile *child, *tmp;
+
+	if (old->parent)
+		policy = &old->parent->base;
+	else
+		policy = &old->ns->base;
+
+	if (new) {
+		/* released when @new is freed */
+		new->parent = aa_get_profile(old->parent);
+		new->ns = aa_get_namespace(old->ns);
+		new->sid = old->sid;
+		__aa_add_profile(&policy->profiles, new);
+	} else {
+		/* refcount not taken, held via @old refcount */
+		new = old->ns->unconfined;
+	}
+
+	/* inherit children */
+	list_for_each_entry_safe(child, tmp, &old->base.profiles, base.list) {
+		aa_put_profile(child->parent);
+		child->parent = aa_get_profile(new);
+		/* list refcount transfered to @new*/
+		list_move(&child->base.list, &new->base.profiles);
+	}
+
+	/* released by aa_free_profile */
+	old->replacedby = aa_get_profile(new);
+	__aa_remove_profile(old);
+}
+
+/**
+ * __aa_profile_list_release - remove all profiles on the list and put refs
+ * @head: list of profiles  (NOT NULL)
+ *
+ * Requires: namespace lock be held
+ */
+static void __aa_profile_list_release(struct list_head *head)
+{
+	struct aa_profile *profile, *tmp;
+	list_for_each_entry_safe(profile, tmp, head, base.list) {
+		/* release any children lists first */
+		__aa_profile_list_release(&profile->base.profiles);
+		__aa_replace_profile(profile, NULL);
+	}
+}
+
+static void __aa_remove_namespace(struct aa_namespace *ns);
+
+/**
+ * __aa_ns_list_release - remove all profile namespaces on the list put refs
+ * @head: list of profile namespaces  (NOT NULL)
+ *
+ * Requires: namespace lock be held
+ */
+static void __aa_ns_list_release(struct list_head *head)
+{
+	struct aa_namespace *ns, *tmp;
+	list_for_each_entry_safe(ns, tmp, head, base.list)
+		__aa_remove_namespace(ns);
+
+}
+
+/**
+ * aa_destroy_namespace - remove everything contained by @ns
+ * @ns: namespace to have it contents removed  (NOT NULL)
+ */
+static void aa_destroy_namespace(struct aa_namespace *ns)
+{
+	if (!ns)
+		return;
+
+	write_lock(&ns->lock);
+	/* release all profiles in this namespace */
+	__aa_profile_list_release(&ns->base.profiles);
+
+	/* release all sub namespaces */
+	__aa_ns_list_release(&ns->sub_ns);
+
+	write_unlock(&ns->lock);
+}
+
+/**
+ * __aa_remove_namespace - remove a namespace and all its children
+ * @ns: namespace to be removed  (NOT NULL)
+ * 
+ * Requires: ns->parent->lock be held and ns removed from parent.
+ */
+static void __aa_remove_namespace(struct aa_namespace *ns)
+{
+	struct aa_profile *unconfined = ns->unconfined;
+
+	/* remove ns from namespace list */
+	list_del_init(&ns->base.list);
+
+	/*
+	 * break the ns, unconfined profile cyclic reference and forward
+	 * all new unconfined profiles requests to the parent namespace
+	 * This will result in all confined tasks that have a profile
+	 * being removed, inheriting the parent->unconfined profile.
+	 */
+	if (ns->parent)
+		ns->unconfined = aa_get_profile(ns->parent->unconfined);
+
+	aa_destroy_namespace(ns);
+
+	/* release original ns->unconfined ref */
+	aa_put_profile(unconfined);
+	/* release ns->base.list ref, from removal above */
+	aa_put_namespace(ns);
+}
+
+/**
+ * aa_alloc_root_ns - allocate the root profile namespace
+ *
+ * Returns: %0 on success else error
+ *
+ */
+int __init aa_alloc_root_ns(void)
+{
+	/* released by aa_free_root_ns - used as list ref*/
+	root_ns = aa_alloc_namespace("root");
+	if (!root_ns)
+		return -ENOMEM;
+
+	return 0;
+}
+
+ /**
+  * aa_free_root_ns - free the root profile namespace
+  */
+void aa_free_root_ns(void)
+ {
+	 struct aa_namespace *ns = root_ns;
+	 root_ns = NULL;
+ 
+	 aa_destroy_namespace(ns);
+	 aa_put_namespace(ns);
+}
+
+/**
+ * aa_alloc_profile - allocate, initialize and return a new profile
+ * @hname: name of the profile  (NOT NULL)
+ *
+ * Returns: NULL on failure, else refcounted profile
+ */
+struct aa_profile *aa_alloc_profile(const char *hname)
+{
+	struct aa_profile *profile;
+
+	/* freed by aa_free_profile - usually through aa_put_profile */
+	profile = kzalloc(sizeof(*profile), GFP_KERNEL);
+	if (!profile)
+		return NULL;
+
+	if (!policy_init(&profile->base, hname)) {
+		kzfree(profile);
+		return NULL;
+	}
+
+	/* return ref */
+	return profile;
+}
+
+/**
+ * aa_new_null_profile - create a new null-X learning profile
+ * @parent: profile that caused this profile to be created (NOT NULL)
+ * @hat: true if the null- learning profile is a hat
+ *
+ * Create a null- complain mode profile used in learning mode.  The name of
+ * the profile is unique and follows the format of parent//null-sid.
+ *
+ * null profiles are added to the profile list but the list does not
+ * hold a count on them so that they are automatically released when
+ * not in use.
+ *
+ * Returns: new profile else NULL on failure
+ */
+struct aa_profile *aa_new_null_profile(struct aa_profile *parent, int hat)
+{
+	struct aa_profile *profile = NULL;
+	char *name;
+	u32 sid = aa_alloc_sid();
+
+	/* freed below */
+	name = kmalloc(strlen(parent->base.hname) + 2 + 7 + 8, GFP_KERNEL);
+	if (!name)
+		goto fail;
+	sprintf(name, "%s//null-%x", parent->base.hname, sid);
+
+	profile = aa_alloc_profile(name);
+	kfree(name);
+	if (!profile)
+		goto fail;
+
+	profile->sid = sid;
+	profile->mode = APPARMOR_COMPLAIN;
+	profile->flags = PFLAG_NULL;
+	if (hat)
+		profile->flags |= PFLAG_HAT;
+
+	/* released on aa_free_profile */
+	profile->parent = aa_get_profile(parent);
+	profile->ns = aa_get_namespace(parent->ns);
+
+	write_lock(&profile->ns->lock);
+	__aa_add_profile(&parent->base.profiles, profile);
+	write_unlock(&profile->ns->lock);
+
+	return profile;
+
+fail:
+	aa_free_sid(sid);
+	return NULL;
+}
+
+/**
+ * aa_free_profile - free a profile
+ * @profile: the profile to free  (MAYBE NULL)
+ *
+ * Free a profile, its hats and null_profile. All references to the profile,
+ * its hats and null_profile must have been put.
+ *
+ * If the profile was referenced from a task context, aa_free_profile() will
+ * be called from an rcu callback routine, so we must not sleep here.
+ */
+static void aa_free_profile(struct aa_profile *profile)
+{
+	AA_DEBUG("%s(%p)\n", __func__, profile);
+
+	if (!profile)
+		return;
+
+	if (!list_empty(&profile->base.list)) {
+		AA_ERROR("%s: internal error, "
+			 "profile '%s' still on ns list\n",
+			 __func__, profile->base.name);
+		BUG();
+	}
+
+	/* free children profiles */
+	policy_destroy(&profile->base);
+	aa_put_profile(profile->parent);
+
+	aa_put_namespace(profile->ns);
+
+	aa_free_file_rules(&profile->file);
+	aa_free_cap_rules(&profile->caps);
+	aa_free_net_rules(&profile->net);
+	aa_free_rlimit_rules(&profile->rlimits);
+
+	aa_free_sid(profile->sid);
+	aa_put_dfa(profile->xmatch);
+
+	if (profile->replacedby)
+		aa_put_profile(profile->replacedby);
+
+	kzfree(profile);
+}
+
+/**
+ * aa_free_profile_kref - free aa_profile by kref (called by aa_put_profile)
+ * @kr: kref callback for freeing of a profile  (NOT NULL)
+ */
+void aa_free_profile_kref(struct kref *kref)
+{
+	struct aa_profile *p = container_of(kref, struct aa_profile,
+					    base.count);
+
+	aa_free_profile(p);
+}
+
+/* TODO: profile count accounting - setup in remove */
+
+/**
+ * __aa_find_child - find a profile on @head list with a name matching @name
+ * @head: list to search  (NOT NULL)
+ * @name: name of profile (NOT NULL)
+ *
+ * Requires: ns lock protecting list be held
+ *
+ * Returns: unrefcounted profile ptr, or NULL if not found
+ */
+static struct aa_profile *__aa_find_child(struct list_head *head,
+					  const char *name)
+{
+	return (struct aa_profile *)__policy_find(head, name);
+}
+
+/**
+ * __aa_strn_find_child - find a profile on @head list using substring of @name
+ * @head: list to search  (NOT NULL)
+ * @name: name of profile (NOT NULL)
+ * @len: length of @name substring to match
+ *
+ * Requires: ns lock protecting list be held
+ *
+ * Returns: unrefcounted profile ptr, or NULL if not found
+ */
+static struct aa_profile *__aa_strn_find_child(struct list_head *head,
+					       const char *name, int len)
+{
+	return (struct aa_profile *)__policy_strn_find(head, name, len);
+}
+
+/**
+ * aa_find_child - find a profile by @name in @parent
+ * @parent: profile to search  (NOT NULL)
+ * @name: profile name to search for  (NOT NULL)
+ *
+ * Returns: a ref counted profile or NULL if not found
+ */
+struct aa_profile *aa_find_child(struct aa_profile *parent, const char *name)
+{
+	struct aa_profile *profile;
+
+	read_lock(&parent->ns->lock);
+	profile = aa_get_profile(__aa_find_child(&parent->base.profiles, name));
+	read_unlock(&parent->ns->lock);
+
+	return profile;
+}
+
+/**
+ * __aa_find_parent - lookup the parent of a profile of name @hname
+ * @ns: namespace to lookup profile in  (NOT NULL)
+ * @hname: hierarchical profile name to find parent of  (NOT NULL)
+ *
+ * Lookups up the parent of a fully qualified profile name, the profile
+ * that matches hname does not need to exist, in general this
+ * is used to load a new profile.
+ *
+ * Requires: ns->lock be held
+ *
+ * Returns: unrefcounted policy or NULL if not found
+ */
+static struct aa_policy *__aa_find_parent(struct aa_namespace *ns,
+					  const char *hname)
+{
+	struct aa_policy *policy;
+	struct aa_profile *profile = NULL;
+	char *split;
+
+	policy = &ns->base;
+
+	for (split = strstr(hname, "//"); split;) {
+		profile = __aa_strn_find_child(&policy->profiles, hname,
+					       split - hname);
+		if (!profile)
+			return NULL;
+		policy = &profile->base;
+		hname = split + 2;
+		split = strstr(hname, "//");
+	}
+	if (!profile)
+		return &ns->base;
+	return &profile->base;
+}
+
+/**
+ * __aa_find_profile - lookup the profile matching @hname
+ * @base: base list to start looking up profile name from  (NOT NULL)
+ * @hname: hierarchical profile name  (NOT NULL)
+ *
+ * Requires: ns->lock be held
+ *
+ * Returns: unrefcounted profile pointer or NULL if not found
+ *
+ * Do a relative name lookup, recursing through profile tree.
+ */
+static struct aa_profile *__aa_find_profile(struct aa_policy *base,
+					    const char *hname)
+{
+	struct aa_profile *profile = NULL;
+	char *split;
+
+	for (split = strstr(hname, "//"); split;) {
+		profile = __aa_strn_find_child(&base->profiles, hname,
+					       split - hname);
+		if (!profile)
+			return NULL;
+
+		base = &profile->base;
+		hname = split + 2;
+		split = strstr(hname, "//");
+	}
+
+	profile = __aa_find_child(&base->profiles, hname);
+
+	return profile;
+}
+
+/**
+ * aa_find_profile_by_name - find a profile by its full or partial name
+ * @ns: the namespace to start from
+ * @hname: name to do lookup on.  Does not contain namespace prefix
+ *
+ * Returns: refcounted profile or NULL if not found
+ */
+struct aa_profile *aa_find_profile(struct aa_namespace *ns, const char *hname)
+{
+	struct aa_profile *profile;
+
+	read_lock(&ns->lock);
+	profile = aa_get_profile(__aa_find_profile(&ns->base, hname));
+	read_unlock(&ns->lock);
+	return profile;
+}
+
+/**
+ * replacement_allowed - test to see if replacement is allowed
+ * @profile: profile to test if it can be replaced  (MAYBE NULL)
+ * @sa: audit data  (NOT NULL)
+ * @add_only: true if replacement shouldn't be allowed but addition is okay
+ *
+ * Returns: %1 if replacement allowed else %0
+ */
+static bool replacement_allowed(struct aa_profile *profile,
+				struct aa_audit_iface *sa,
+				int add_only)
+{
+	if (profile) {
+		if (profile->flags & PFLAG_IMMUTABLE) {
+			sa->base.info = "cannot replace immutible profile";
+			sa->base.error = -EPERM;
+			return 0;
+		} else if (add_only) {
+			sa->base.info = "profile already exists";
+			sa->base.error = -EEXIST;
+			return 0;
+		}
+	}
+	return 1;
+}
+
+/**
+ * __add_new_profile - simple wrapper around __aa_add_profile
+ * @ns: namespace that profile is being added to  (NOT NULL)
+ * @policy: the policy container to add the profile to  (NOT NULL)
+ * @profile: profile to add  (NOT NULL)
+ *
+ * add a profile to a list and do other required basic allocations
+ */
+static void __add_new_profile(struct aa_namespace *ns,
+			      struct aa_policy *policy,
+			      struct aa_profile *profile)
+{
+	if (policy != &ns->base)
+		/* released on profile replacement or aa_free_profile */
+		profile->parent = aa_get_profile((struct aa_profile *) policy);
+	__aa_add_profile(&policy->profiles, profile);
+	/* released on aa_free_profile */
+	profile->sid = aa_alloc_sid();
+	profile->ns = aa_get_namespace(ns);
+}
+
+/**
+ * aa_interface_replace_profiles - replace profile(s) on the profile list
+ * @udata: serialized data stream  (NOT NULL)
+ * @size: size of the serialized data stream
+ * @add_only: true if only doing addition, no replacement allowed
+ *
+ * unpack and replace a profile on the profile list and uses of that profile
+ * by any aa_task_cxt.  If the profile does not exist on the profile list
+ * it is added.
+ *
+ * Returns: size of data consumed else error code on failure.
+ */
+ssize_t aa_interface_replace_profiles(void *udata, size_t size, bool add_only)
+{
+	struct aa_policy *policy;
+	struct aa_profile *old_profile = NULL, *new_profile = NULL;
+	struct aa_profile *rename_profile = NULL;
+	struct aa_namespace *ns = NULL;
+	ssize_t error;
+	struct aa_audit_iface sa = {
+		.base.operation = "profile_replace",
+		.base.gfp_mask = GFP_ATOMIC,
+	};
+
+	/* check if loading policy is locked out */
+	if (aa_g_lock_policy) {
+		sa.base.info = "policy locked";
+		sa.base.error = -EACCES;
+		goto fail;
+	}
+
+	/* released below */
+	new_profile = aa_unpack(udata, size, &sa);
+	if (IS_ERR(new_profile)) {
+		sa.base.error = PTR_ERR(new_profile);
+		new_profile = NULL;
+		goto fail;
+	}
+
+	/* released below */
+	ns = aa_prepare_namespace(sa.name2);
+	if (!ns) {
+		sa.base.info = "failed to prepare namespace";
+		sa.base.error = -ENOMEM;
+		goto fail;
+	}
+
+	sa.name = new_profile->base.hname;
+
+	write_lock(&ns->lock);
+	/* no ref on policy only use inside lock */
+	policy = __aa_find_parent(ns, new_profile->base.hname);
+
+	if (!policy) {
+		sa.base.info = "parent does not exist";
+		sa.base.error = -ENOENT;
+		goto audit;
+	}
+
+	old_profile = __aa_find_child(&policy->profiles,
+				      new_profile->base.name);
+	/* released below */
+	aa_get_profile(old_profile);
+
+	if (new_profile->rename) {
+		rename_profile = __aa_find_profile(&ns->base,
+						   new_profile->rename);
+		/* released below */
+		aa_get_profile(rename_profile);
+
+		if (!rename_profile) {
+			sa.base.info = "profile to rename does not exist";
+			sa.name = new_profile->rename;
+			sa.base.error = -ENOENT;
+			goto audit;
+		}
+	}
+
+	if (!replacement_allowed(old_profile, &sa, add_only))
+		goto audit;
+
+	if (!replacement_allowed(rename_profile, &sa, add_only))
+		goto audit;
+
+audit:
+	if (!old_profile && !rename_profile)
+		sa.base.operation = "profile_load";
+
+	error = aa_audit_iface(&sa);
+
+	/* rename field must be cleared as it is shared with replaced-by */
+	if (new_profile->rename) {
+		kzfree(new_profile->rename);
+		new_profile->rename = NULL;
+	}
+
+	if (!error) {
+		if (old_profile)
+			__aa_replace_profile(old_profile, new_profile);
+		if (rename_profile)
+			__aa_replace_profile(rename_profile, new_profile);
+		if (!(old_profile || rename_profile))
+			__add_new_profile(ns, policy, new_profile);
+	}
+	write_unlock(&ns->lock);
+
+out:
+	aa_put_namespace(ns);
+	aa_put_profile(rename_profile);
+	aa_put_profile(old_profile);
+	aa_put_profile(new_profile);
+	if (error)
+		return error;
+	return size;
+
+fail:
+	error = aa_audit_iface(&sa);
+	goto out;
+}
+
+/**
+ * aa_interface_remove_profiles - remove profile(s) from the system
+ * @fqname: name of the profile or namespace to remove  (NOT NULL)
+ * @size: size of the name
+ *
+ * Remove a profile or sub namespace from the current namespace, so that
+ * they can not be found anymore and mark them as replaced by unconfined
+ *
+ * NOTE: removing confinement does not restore rlimits to preconfinemnet values
+ *
+ * Returns: size of data consume else error code if fails
+ */
+ssize_t aa_interface_remove_profiles(char *fqname, size_t size)
+{
+	struct aa_namespace *root, *ns = NULL;
+	struct aa_profile *profile = NULL;
+	struct aa_audit_iface sa = {
+		.base.operation = "profile_remove",
+		.base.gfp_mask = GFP_ATOMIC,
+	};
+	const char *name = fqname;
+	int error;
+
+	/* check if loading policy is locked out */
+	if (aa_g_lock_policy) {
+		sa.base.info = "policy locked";
+		sa.base.error = -EACCES;
+		goto fail;
+	}
+
+	if (*fqname == 0) {
+		sa.base.info = "no profile specified";
+		sa.base.error = -ENOENT;
+		goto fail;
+	}
+
+	/* ref count held by cred */
+	root = aa_current_profile()->ns;
+
+	if (fqname[0] == ':') {
+		char *ns_name;
+		name = aa_split_fqname(fqname, &ns_name);
+		if (ns_name)
+			/* released below */
+			ns = aa_find_namespace(root, ns_name);
+	} else
+		/* released below */
+		ns = aa_get_namespace(root);
+
+	if (!ns) {
+		sa.base.info = "namespace does not exist";
+		sa.base.error = -ENOENT;
+		goto fail;
+	}
+
+	sa.name2 = ns->base.name;
+	write_lock(&ns->lock);
+	if (!name) {
+		/* remove namespace - can only happen if fqname[0] == ':' */
+		__aa_remove_namespace(ns);
+	} else {
+		/* remove profile */
+		profile = aa_get_profile(__aa_find_profile(&ns->base, name));
+		if (!profile) {
+			sa.name = name;
+			sa.base.error = -ENOENT;
+			sa.base.info = "profile does not exist";
+			goto fail_ns_lock;
+		}
+		sa.name = profile->base.hname;
+		__aa_profile_list_release(&profile->base.profiles);
+		__aa_replace_profile(profile, NULL);
+	}
+	write_unlock(&ns->lock);
+
+	/* don't fail removal if audit fails */
+	(void) aa_audit_iface(&sa);
+	aa_put_namespace(ns);
+	aa_put_profile(profile);
+	return size;
+
+fail_ns_lock:
+	write_unlock(&ns->lock);
+	aa_put_namespace(ns);
+
+fail:
+	error = aa_audit_iface(&sa);
+	return error;
+}
--- linux-mvl-dove-2.6.32.orig/security/apparmor/ipc.c
+++ linux-mvl-dove-2.6.32/security/apparmor/ipc.c
@@ -0,0 +1,124 @@
+/*
+ * AppArmor security module
+ *
+ * This file contains AppArmor ipc mediation
+ *
+ * Copyright (C) 1998-2008 Novell/SUSE
+ * Copyright 2009-2010 Canonical Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ */
+
+#include <linux/gfp.h>
+#include <linux/ptrace.h>
+
+#include "include/audit.h"
+#include "include/capability.h"
+#include "include/context.h"
+#include "include/policy.h"
+
+struct aa_audit_ptrace {
+	struct aa_audit base;
+
+	pid_t tracer, tracee;
+};
+
+/* call back to audit ptrace fields */
+static void audit_cb(struct audit_buffer *ab, struct aa_audit *va)
+{
+	struct aa_audit_ptrace *sa = container_of(va, struct aa_audit_ptrace,
+						  base);
+	audit_log_format(ab, " tracer=%d tracee=%d", sa->tracer, sa->tracee);
+}
+
+/**
+ * aa_audit_ptrace - do auditing for ptrace
+ * @profile: profile being enforced  (NOT NULL)
+ * @sa: audit structure  (NOT NULL)
+ *
+ * Returns: %0 or error code
+ */
+static int aa_audit_ptrace(struct aa_profile *profile,
+			   struct aa_audit_ptrace *sa)
+{
+	return aa_audit(AUDIT_APPARMOR_AUTO, profile, &sa->base, audit_cb);
+}
+
+/**
+ * aa_may_ptrace - test if tracer task can trace the tracee
+ * @tracer_task: task who will do the tracing  (NOT NULL)
+ * @tracer: profile of the task doing the tracing  (NOT NULL)
+ * @tracee: task to be traced
+ * @mode: whether PTRACE_MODE_READ || PTRACE_MODE_ATTACH
+ *
+ * Returns: %0 else error code if permission denied or error
+ */
+int aa_may_ptrace(struct task_struct *tracer_task, struct aa_profile *tracer,
+		  struct aa_profile *tracee, unsigned int mode)
+{
+	/* TODO: currently only based on capability, not extended ptrace
+	 *       rules,
+	 *       Test mode for PTRACE_MODE_READ || PTRACE_MODE_ATTACH
+	 */
+
+	if (!tracer || tracer == tracee)
+		return 0;
+	/* log this capability request */
+	return aa_capable(tracer_task, tracer, CAP_SYS_PTRACE, 1);
+}
+
+/**
+ * aa_ptrace - do ptrace permission check and auditing
+ * @tracer: task doing the tracing
+ * @tracee: task being traced
+ * @mode: ptrace mode either PTRACE_MODE_READ || PTRACE_MODE_ATTACH
+ *
+ * Returns: %0 else error code if permission denied or error
+ */
+int aa_ptrace(struct task_struct *tracer, struct task_struct *tracee,
+	      unsigned int mode)
+{
+	/*
+	 * tracer can ptrace tracee when
+	 * - tracer is unconfined ||
+	 * - tracer & tracee are in the same namespace &&
+	 *   - tracer is in complain mode
+	 *   - tracer has rules allowing it to trace tracee currently this is:
+	 *       - confined by the same profile ||
+	 *       - tracer profile has CAP_SYS_PTRACE
+	 */
+
+	struct aa_profile *tracer_p;
+	/* cred released below */
+	const struct cred *cred = get_task_cred(tracer);
+	int error = 0;
+	tracer_p = aa_cred_profile(cred);
+
+	if (!unconfined(tracer_p)) {
+		struct aa_audit_ptrace sa = {
+			.base.operation = "ptrace",
+			.base.gfp_mask = GFP_ATOMIC,
+			.tracer = tracer->pid,
+			.tracee = tracee->pid,
+		};
+		/* FIXME: different namespace restriction can be lifted
+		 * if, namespace are matched to AppArmor namespaces
+		 */
+		struct aa_profile *tracee_p;
+		/* lcred released below */
+		struct cred *lcred = get_task_cred(tracee);
+		tracee_p = aa_cred_profile(lcred);
+
+		sa.base.error = aa_may_ptrace(tracer, tracer_p, tracee_p, mode);
+		sa.base.error = aa_audit_ptrace(tracer_p, &sa);
+
+		put_cred(lcred);
+		error = sa.base.error;
+	}
+	put_cred(cred);
+
+	return error;
+}
--- linux-mvl-dove-2.6.32.orig/security/apparmor/include/procattr.h
+++ linux-mvl-dove-2.6.32/security/apparmor/include/procattr.h
@@ -0,0 +1,26 @@
+/*
+ * AppArmor security module
+ *
+ * This file contains AppArmor /proc/<pid>/attr/ interface function defintions.
+ *
+ * Copyright (C) 1998-2008 Novell/SUSE
+ * Copyright 2009-2010 Canonical Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ */
+
+#ifndef __AA_PROCATTR_H
+#define __AA_PROCATTR_H
+
+#define AA_DO_TEST 1
+#define AA_ONEXEC  1
+
+int aa_getprocattr(struct aa_profile *profile, char **string);
+int aa_setprocattr_changehat(char *args, size_t size, int test);
+int aa_setprocattr_changeprofile(char *fqname, int onexec, int test);
+int aa_setprocattr_permipc(char *fqname);
+
+#endif /* __AA_PROCATTR_H */
--- linux-mvl-dove-2.6.32.orig/security/apparmor/include/policy_unpack.h
+++ linux-mvl-dove-2.6.32/security/apparmor/include/policy_unpack.h
@@ -0,0 +1,30 @@
+/*
+ * AppArmor security module
+ *
+ * This file contains AppArmor policy loading interface function definitions.
+ *
+ * Copyright (C) 1998-2008 Novell/SUSE
+ * Copyright 2009-2010 Canonical Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ */
+
+#ifndef __POLICY_INTERFACE_H
+#define __POLICY_INTERFACE_H
+
+struct aa_audit_iface {
+	struct aa_audit base;
+
+	const char *name;
+	const char *name2;
+	long pos;
+};
+
+int aa_audit_iface(struct aa_audit_iface *sa);
+struct aa_profile *aa_unpack(void *udata, size_t size,
+			     struct aa_audit_iface *sa);
+
+#endif /* __POLICY_INTERFACE_H */
--- linux-mvl-dove-2.6.32.orig/security/apparmor/include/capability.h
+++ linux-mvl-dove-2.6.32/security/apparmor/include/capability.h
@@ -0,0 +1,45 @@
+/*
+ * AppArmor security module
+ *
+ * This file contains AppArmor capability mediation definitions.
+ *
+ * Copyright (C) 1998-2008 Novell/SUSE
+ * Copyright 2009-2010 Canonical Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ */
+
+#ifndef __AA_CAPABILITY_H
+#define __AA_CAPABILITY_H
+
+#include <linux/sched.h>
+
+struct aa_profile;
+
+/* aa_caps - confinement data for capabilities
+ * @allowed: capabilities mask
+ * @audit: caps that are to be audited
+ * @quiet: caps that should not be audited
+ * @kill: caps that when requested will result in the task being killed
+ * @extended: caps that are subject finer grained mediation
+ */
+struct aa_caps {
+	kernel_cap_t allowed;
+	kernel_cap_t audit;
+	kernel_cap_t quiet;
+	kernel_cap_t kill;
+	kernel_cap_t extended;
+};
+
+int aa_capable(struct task_struct *task, struct aa_profile *profile, int cap,
+	       int audit);
+
+static inline void aa_free_cap_rules(struct aa_caps *caps)
+{
+	/* NOP */
+}
+
+#endif /* __AA_CAPBILITY_H */
--- linux-mvl-dove-2.6.32.orig/security/apparmor/include/audit.h
+++ linux-mvl-dove-2.6.32/security/apparmor/include/audit.h
@@ -0,0 +1,54 @@
+/*
+ * AppArmor security module
+ *
+ * This file contains AppArmor auditing function definitions.
+ *
+ * Copyright (C) 1998-2008 Novell/SUSE
+ * Copyright 2009-2010 Canonical Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ */
+
+#ifndef __AA_AUDIT_H
+#define __AA_AUDIT_H
+
+#include <linux/audit.h>
+#include <linux/fs.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
+
+struct aa_profile;
+
+extern const char *audit_mode_names[];
+#define AUDIT_MAX_INDEX 5
+
+#define AUDIT_APPARMOR_AUTO 0	/* auto choose audit message type */
+
+enum audit_mode {
+	AUDIT_NORMAL,		/* follow normal auditing of accesses */
+	AUDIT_QUIET_DENIED,	/* quiet all denied access messages */
+	AUDIT_QUIET,		/* quiet all messages */
+	AUDIT_NOQUIET,		/* do not quiet audit messages */
+	AUDIT_ALL		/* audit all accesses */
+};
+
+/*
+ * aa_audit - AppArmor auditing structure
+ * Structure is populated by access control code and passed to aa_audit which
+ * provides for a single point of logging.
+ */
+struct aa_audit {
+	struct task_struct *task;
+	gfp_t gfp_mask;
+	int error;
+	const char *operation;
+	const char *info;
+};
+
+int aa_audit(int type, struct aa_profile *profile, struct aa_audit *sa,
+	     void (*cb) (struct audit_buffer *, struct aa_audit *));
+
+#endif /* __AA_AUDIT_H */
--- linux-mvl-dove-2.6.32.orig/security/apparmor/include/match.h
+++ linux-mvl-dove-2.6.32/security/apparmor/include/match.h
@@ -0,0 +1,130 @@
+/*
+ * AppArmor security module
+ *
+ * This file contains AppArmor policy dfa matching engine definitions.
+ *
+ * Copyright (C) 1998-2008 Novell/SUSE
+ * Copyright 2009-2010 Canonical Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ */
+
+#ifndef __AA_MATCH_H
+#define __AA_MATCH_H
+
+#define DFA_NOMATCH			0
+#define DFA_START			1
+
+#define DFA_VALID_PERM_MASK		0xffffffff
+#define DFA_VALID_PERM2_MASK		0xffffffff
+
+/**
+ * The format used for transition tables is based on the GNU flex table
+ * file format (--tables-file option; see Table File Format in the flex
+ * info pages and the flex sources for documentation). The magic number
+ * used in the header is 0x1B5E783D insted of 0xF13C57B1 though, because
+ * the YY_ID_CHK (check) and YY_ID_DEF (default) tables are used
+ * slightly differently (see the apparmor-parser package).
+ */
+
+#define YYTH_MAGIC	0x1B5E783D
+#define YYTH_DEF_RECURSE 0x1			/* DEF Table is recursive */
+
+struct table_set_header {
+	u32 th_magic;		/* YYTH_MAGIC */
+	u32 th_hsize;
+	u32 th_ssize;
+	u16 th_flags;
+	char th_version[];
+};
+
+/* The YYTD_ID are one less than flex table mappings.  The flex id
+ * has 1 subtracted at table load time, this allows us to directly use the
+ * ID's as indexes.
+ */
+#define	YYTD_ID_ACCEPT	0
+#define YYTD_ID_BASE	1
+#define YYTD_ID_CHK	2
+#define YYTD_ID_DEF	3
+#define YYTD_ID_EC	4
+#define YYTD_ID_META	5
+#define YYTD_ID_ACCEPT2 6
+#define YYTD_ID_NXT	7
+#define YYTD_ID_TSIZE	8
+
+#define YYTD_DATA8	1
+#define YYTD_DATA16	2
+#define YYTD_DATA32	4
+#define YYTD_DATA64	8
+
+/* Each ACCEPT2 table gets 6 dedicated flags, YYTD_DATAX define the
+ * first flags
+ */
+#define ACCEPT1_FLAGS(X) ((X) & 0x3f)
+#define ACCEPT2_FLAGS(X) ACCEPT1_FLAGS((X) >> YYTD_ID_ACCEPT2)
+#define TO_ACCEPT1_FLAG(X) ACCEPT1_FLAGS(X)
+#define TO_ACCEPT2_FLAG(X) (ACCEPT1_FLAGS(X) << YYTD_ID_ACCEPT2)
+#define DFA_FLAG_VERIFY_STATES 0x1000
+
+struct table_header {
+	u16 td_id;
+	u16 td_flags;
+	u32 td_hilen;
+	u32 td_lolen;
+	char td_data[];
+};
+
+#define DEFAULT_TABLE(DFA) ((u16 *)((DFA)->tables[YYTD_ID_DEF]->td_data))
+#define BASE_TABLE(DFA) ((u32 *)((DFA)->tables[YYTD_ID_BASE]->td_data))
+#define NEXT_TABLE(DFA) ((u16 *)((DFA)->tables[YYTD_ID_NXT]->td_data))
+#define CHECK_TABLE(DFA) ((u16 *)((DFA)->tables[YYTD_ID_CHK]->td_data))
+#define EQUIV_TABLE(DFA) ((u8 *)((DFA)->tables[YYTD_ID_EC]->td_data))
+#define ACCEPT_TABLE(DFA) ((u32 *)((DFA)->tables[YYTD_ID_ACCEPT]->td_data))
+#define ACCEPT_TABLE2(DFA) ((u32 *)((DFA)->tables[YYTD_ID_ACCEPT2]->td_data))
+
+struct aa_dfa {
+	struct kref count;
+	u16 flags;
+	struct table_header *tables[YYTD_ID_TSIZE];
+};
+
+#define byte_to_byte(X) (X)
+
+#define UNPACK_ARRAY(TABLE, BLOB, LEN, TYPE, NTOHX) \
+	do { \
+		typeof(LEN) __i; \
+		TYPE *__t = (TYPE *) TABLE; \
+		TYPE *__b = (TYPE *) BLOB; \
+		for (__i = 0; __i < LEN; __i++) { \
+			__t[__i] = NTOHX(__b[__i]); \
+		} \
+	} while (0)
+
+static inline size_t table_size(size_t len, size_t el_size)
+{
+	return ALIGN(sizeof(struct table_header) + len * el_size, 8);
+}
+
+struct aa_dfa *aa_dfa_unpack(void *blob, size_t size, int flags);
+unsigned int aa_dfa_match_len(struct aa_dfa *dfa, unsigned int start,
+			      const char *str, int len);
+unsigned int aa_dfa_match(struct aa_dfa *dfa, unsigned int start,
+			  const char *str);
+void aa_dfa_free_kref(struct kref *kref);
+
+/**
+ * aa_put_dfa - put a dfa refcount
+ * @dfa: dfa to put refcount   (MAYBE NULL)
+ *
+ * Requires: if @dfa != NULL that valid refcount be held
+ */
+static inline void aa_put_dfa(struct aa_dfa *dfa)
+{
+	if (dfa)
+		kref_put(&dfa->count, aa_dfa_free_kref);
+}
+
+#endif /* __AA_MATCH_H */
--- linux-mvl-dove-2.6.32.orig/security/apparmor/include/context.h
+++ linux-mvl-dove-2.6.32/security/apparmor/include/context.h
@@ -0,0 +1,154 @@
+/*
+ * AppArmor security module
+ *
+ * This file contains AppArmor contexts used to associate "labels" to objects.
+ *
+ * Copyright (C) 1998-2008 Novell/SUSE
+ * Copyright 2009-2010 Canonical Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ */
+
+#ifndef __AA_CONTEXT_H
+#define __AA_CONTEXT_H
+
+#include <linux/cred.h>
+#include <linux/slab.h>
+#include <linux/sched.h>
+
+#include "policy.h"
+
+/* struct aa_file_cxt - the AppArmor context the file was opened in
+ * @profile: the profile the file was opened under
+ * @perms: the permission the file was opened with
+ */
+struct aa_file_cxt {
+	struct aa_profile *profile;
+	u16 allowed;
+};
+
+/**
+ * aa_alloc_file_context - allocate file_cxt
+ * @gfp: gfp flags for allocation
+ *
+ * Returns: file_cxt or NULL on failure
+ */
+static inline struct aa_file_cxt *aa_alloc_file_context(gfp_t gfp)
+{
+	return kzalloc(sizeof(struct aa_file_cxt), gfp);
+}
+
+/**
+ * aa_free_file_context - free a file_cxt
+ * @cxt: file_cxt to free  (MAYBE_NULL)
+ */
+static inline void aa_free_file_context(struct aa_file_cxt *cxt)
+{
+	if (cxt) {
+		aa_put_profile(cxt->profile);
+		kzfree(cxt);
+	}
+}
+
+/**
+ * struct aa_task_cxt - primary label for confined tasks
+ * @profile: the current profile   (NOT NULL)
+ * @exec: profile to transition to on next exec  (MAYBE NULL)
+ * @previous: profile the task may return to     (MAYBE NULL)
+ * @token: magic value the task must know for returning to @previous_profile
+ *
+ * Contains the task's current profile (which could change due to
+ * change_hat).  Plus the hat_magic needed during change_hat.
+ *
+ * TODO: make so a task can be confined by a stack of contexts
+ */
+struct aa_task_cxt {
+	struct aa_profile *profile;
+	struct aa_profile *onexec;
+	struct aa_profile *previous;
+	u64 token;
+};
+
+struct aa_task_cxt *aa_alloc_task_context(gfp_t flags);
+void aa_free_task_context(struct aa_task_cxt *cxt);
+void aa_dup_task_context(struct aa_task_cxt *new,
+			 const struct aa_task_cxt *old);
+int aa_replace_current_profiles(struct aa_profile *profile);
+int aa_set_current_onexec(struct aa_profile *profile);
+int aa_set_current_hat(struct aa_profile *profile, u64 token);
+int aa_restore_previous_profile(u64 cookie);
+
+/**
+ * __aa_task_is_confined - determine if @task has any confinement
+ * @task: task to check confinement of  (NOT NULL)
+ *
+ * If @task != current needs to be called in RCU safe critical section
+ */
+static inline bool __aa_task_is_confined(struct task_struct *task)
+{
+	struct aa_task_cxt *cxt = __task_cred(task)->security;
+
+	BUG_ON(!cxt || !cxt->profile);
+	if (unconfined(aa_newest_version(cxt->profile)))
+		return 0;
+
+	return 1;
+}
+
+/**
+ * aa_cred_profile - obtain cred's profiles
+ * @cred: cred to obtain profiles from  (NOT NULL)
+ *
+ * Returns: confining profile
+ *
+ * does NOT increment reference count
+ */
+static inline struct aa_profile *aa_cred_profile(const struct cred *cred)
+{
+	struct aa_task_cxt *cxt = cred->security;
+	BUG_ON(!cxt || !cxt->profile);
+	return aa_newest_version(cxt->profile);
+}
+
+/**
+ * __aa_current_profile - find the current tasks confining profile
+ *
+ * Returns: up to date confining profile or the ns unconfined profile (NOT NULL)
+ *
+ * This fn will not update the tasks cred to the most up to date version
+ * of the profile so it is safe to call when inside of locks.
+ */
+static inline struct aa_profile *__aa_current_profile(void)
+{
+	return aa_cred_profile(current_cred());
+}
+
+/**
+ * aa_current_profile - find the current tasks confining profile and do updates
+ *
+ * Returns: up to date confining profile or the ns unconfined profile (NOT NULL)
+ *
+ * This fn will update the tasks cred structure if the profile has been
+ * replaced.  Not safe to call inside locks
+ */
+static inline struct aa_profile *aa_current_profile(void)
+{
+	const struct aa_task_cxt *cxt = current_cred()->security;
+	struct aa_profile *profile;
+	BUG_ON(!cxt || !cxt->profile);
+
+	profile = aa_newest_version(cxt->profile);
+	/*
+	 * Whether or not replacement succeeds, use newest profile so
+	 * there is no need to update it after replacement.
+	 */
+	if (unlikely((cxt->profile != profile)))
+		aa_replace_current_profiles(profile);
+
+	return profile;
+}
+
+#endif /* __AA_CONTEXT_H */
--- linux-mvl-dove-2.6.32.orig/security/apparmor/include/apparmorfs.h
+++ linux-mvl-dove-2.6.32/security/apparmor/include/apparmorfs.h
@@ -0,0 +1,28 @@
+/*
+ * AppArmor security module
+ *
+ * This file contains AppArmor filesystem definitions.
+ *
+ * Copyright (C) 1998-2008 Novell/SUSE
+ * Copyright 2009-2010 Canonical Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ */
+
+#ifndef __AA_APPARMORFS_H
+#define __AA_APPARMORFS_H
+
+extern struct dentry *aa_fs_null;
+extern struct vfsmount *aa_fs_mnt;
+
+extern void aa_destroy_aafs(void);
+
+#ifdef CONFIG_SECURITY_APPARMOR_COMPAT_24
+extern const struct file_operations aa_fs_matching_fops;
+extern const struct file_operations aa_fs_features_fops;
+#endif
+
+#endif /* __AA_APPARMORFS_H */
--- linux-mvl-dove-2.6.32.orig/security/apparmor/include/file.h
+++ linux-mvl-dove-2.6.32/security/apparmor/include/file.h
@@ -0,0 +1,228 @@
+/*
+ * AppArmor security module
+ *
+ * This file contains AppArmor file mediation function definitions.
+ *
+ * Copyright (C) 1998-2008 Novell/SUSE
+ * Copyright 2009-2010 Canonical Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ */
+
+#ifndef __AA_FILE_H
+#define __AA_FILE_H
+
+#include <linux/path.h>
+
+#include "audit.h"
+#include "domain.h"
+#include "match.h"
+
+struct aa_profile;
+
+/*
+ * We use MAY_EXEC, MAY_WRITE, MAY_READ, MAY_APPEND and the following flags
+ * for profile permissions
+ */
+#define AA_MAY_LINK			0x0010
+#define AA_MAY_LOCK			0x0020
+#define AA_EXEC_MMAP			0x0040
+
+#define AA_MAY_CREATE			0x0080
+#define AA_MAY_DELETE			0x0100
+#define AA_MAY_CHMOD			0x0200
+#define AA_MAY_CHOWN			0x0400
+
+#define AA_LINK_SUBSET			0x0800
+#define AA_MAY_CHANGEHAT		0x2000	/* ctrl auditing only */
+#define AA_MAY_ONEXEC			0x4000	/* exec allows onexec */
+#define AA_MAY_CHANGE_PROFILE		0x8000
+
+#define AA_AUDIT_FILE_MASK	(MAY_READ | MAY_WRITE | MAY_EXEC | MAY_APPEND |\
+				 AA_MAY_LINK | AA_MAY_LOCK | AA_EXEC_MMAP | \
+				 AA_MAY_CREATE | AA_MAY_DELETE | AA_MAY_CHMOD |\
+				 AA_MAY_CHOWN)
+
+/*
+ * The xindex is broken into 3 parts
+ * - index - an index into either the exec name table or the variable table
+ * - exec type - which determines how the executable name and index are used
+ * - flags - which modify how the destination name is applied
+ */
+#define AA_X_INDEX_MASK		0x03ff
+
+#define AA_X_TYPE_MASK		0x0c00
+#define AA_X_TYPE_SHIFT		10
+#define AA_X_NONE		0x0000
+#define AA_X_NAME		0x0400	/* use executable name px */
+#define AA_X_TABLE		0x0800	/* use a specified name ->n# */
+
+#define AA_X_UNSAFE		0x1000
+#define AA_X_CHILD		0x2000	/* make >AA_X_NONE apply to children */
+#define AA_X_INHERIT		0x4000
+#define AA_X_UNCONFINED		0x8000
+
+/* AA_SECURE_X_NEEDED - is passed in the bprm->unsafe field */
+#define AA_SECURE_X_NEEDED	0x8000
+
+/* need to conditionalize which ones are being set */
+struct path_cond {
+	uid_t uid;
+	umode_t mode;
+};
+
+/* struct file_perms - file permission fo
+ * @allowed: mask of permissions that are allowed
+ * @audit: mask of permissions to force an audit message for
+ * @quiet: mask of permissions to quiet audit messages for
+ * @kill: mask of permissions that when matched will kill the task
+ * @xindex: exec transition index if @allowed contains MAY_EXEC
+ * @xdelegate: used by exec to determine set of delegates allowed
+ * @dindex: delegate table index, 0 if no delegation allowed
+ *
+ * The @audit and @queit mask should be mutually exclusive.
+ */
+struct file_perms {
+	u16 allowed;
+	u16 audit;
+	u16 quiet;
+	u16 kill;
+	u16 xindex;
+	u16 xdelegate;
+	u16 dindex;
+};
+
+extern struct file_perms nullperms;
+
+#define COMBINED_PERM_MASK(X) ((X).allowed | (X).audit | (X).quiet | (X).kill)
+
+/* FIXME: split perms from dfa and match this to description
+ *        also add delegation info.
+ */
+static inline u16 dfa_map_xindex(u16 mask)
+{
+	u16 old_index = (mask >> 10) & 0xf;
+	u16 index = 0;
+
+	if (mask & 0x100)
+		index |= AA_X_UNSAFE;
+	if (mask & 0x200)
+		index |= AA_X_INHERIT;
+	if (mask & 0x80)
+		index |= AA_X_UNCONFINED;
+
+	if (old_index == 1) {
+		index |= AA_X_UNCONFINED;
+	} else if (old_index == 2) {
+		index |= AA_X_NAME;
+	} else if (old_index == 3) {
+		index |= AA_X_NAME | AA_X_CHILD;
+	} else {
+		index |= AA_X_TABLE;
+		index |= old_index - 4;
+	}
+
+	return index;
+}
+
+/*
+ * map old dfa inline permissions to new format
+ */
+#define dfa_user_allow(dfa, state) ((ACCEPT_TABLE(dfa)[state]) & 0x7f)
+#define dfa_user_audit(dfa, state) ((ACCEPT_TABLE2(dfa)[state]) & 0x7f)
+#define dfa_user_quiet(dfa, state) (((ACCEPT_TABLE2(dfa)[state]) >> 7) & 0x7f)
+#define dfa_user_xindex(dfa, state) \
+	(dfa_map_xindex(ACCEPT_TABLE(dfa)[state] & 0x3fff))
+
+#define dfa_other_allow(dfa, state) (((ACCEPT_TABLE(dfa)[state]) >> 14) & 0x7f)
+#define dfa_other_audit(dfa, state) (((ACCEPT_TABLE2(dfa)[state]) >> 14) & 0x7f)
+#define dfa_other_quiet(dfa, state) \
+	((((ACCEPT_TABLE2(dfa)[state]) >> 7) >> 14) & 0x7f)
+#define dfa_other_xindex(dfa, state) \
+	dfa_map_xindex((ACCEPT_TABLE(dfa)[state] >> 14) & 0x3fff)
+
+struct aa_audit_file {
+	struct aa_audit base;
+
+	const char *name;
+	const char *name2;
+	const char *name3;
+	struct file_perms perms;
+	u16 request;
+	struct path_cond *cond;
+};
+
+int aa_audit_file(struct aa_profile *profile, struct aa_audit_file *sa);
+
+/**
+ * struct aa_file_rules - components used for file rule permissions
+ * @dfa: dfa to match path names and conditionals against
+ * @perms: permission table indexed by the matched state accept entry of @dfa
+ * @trans: transition table for indexed by named x transitions
+ *
+ * File permission are determined by matching a path against @dfa and then
+ * then using the value of the accept entry for the matching state as
+ * an index into @perms.  If a named exec transition is required it is
+ * looked up in the transition table.
+ */
+struct aa_file_rules {
+	unsigned int start;
+	struct aa_dfa *dfa;
+	/* struct perms perms; */
+	struct aa_domain trans;
+	/* TODO: add delegate table */
+};
+
+struct file_perms aa_str_perms(struct aa_dfa *dfa, unsigned int start,
+			       const char *name, struct path_cond *cond,
+			       unsigned int *rstate);
+
+int aa_pathstr_perm(struct aa_profile *profile, const char *op,
+		    const char *name, u16 request, struct path_cond *cond);
+
+int aa_path_perm(struct aa_profile *profile, const char *operation,
+		 struct path *path, u16 request, struct path_cond *cond);
+
+int aa_path_link(struct aa_profile *profile, struct dentry *old_dentry,
+		 struct path *new_dir, struct dentry *new_dentry);
+
+int aa_file_perm(struct aa_profile *profile, const char *operation,
+		 struct file *file, u16 request);
+
+static inline void aa_free_file_rules(struct aa_file_rules *rules)
+{
+	aa_put_dfa(rules->dfa);
+	aa_free_domain_entries(&rules->trans);
+}
+
+#define ACC_FMODE(x) (("\000\004\002\006"[(x)&O_ACCMODE]) | (((x) << 1) & 0x40))
+
+/* from namei.c */
+#define MAP_OPEN_FLAGS(x) ((((x) + 1) & O_ACCMODE) ? (x) + 1 : (x))
+
+/**
+ * aa_map_file_perms - map file flags to AppArmor permissions
+ * @file: open file to map flags to AppArmor permissions
+ *
+ * Returns: apparmor permission set for the file
+ */
+static inline u16 aa_map_file_to_perms(struct file *file)
+{
+	int flags = MAP_OPEN_FLAGS(file->f_flags);
+	u16 perms = ACC_FMODE(file->f_mode);
+
+	if ((flags & O_APPEND) && (perms & MAY_WRITE))
+		perms = (perms & ~MAY_WRITE) | MAY_APPEND;
+	/* trunc implies write permission */
+	if (flags & O_TRUNC)
+		perms |= MAY_WRITE;
+	if (flags & O_CREAT)
+		perms |= AA_MAY_CREATE;
+
+	return perms;
+}
+
+#endif /* __AA_FILE_H */
--- linux-mvl-dove-2.6.32.orig/security/apparmor/include/net.h
+++ linux-mvl-dove-2.6.32/security/apparmor/include/net.h
@@ -0,0 +1,40 @@
+/*
+ * AppArmor security module
+ *
+ * This file contains AppArmor network mediation definitions.
+ *
+ * Copyright (C) 1998-2008 Novell/SUSE
+ * Copyright 2009-2010 Canonical Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ */
+
+#ifndef __AA_NET_H
+#define __AA_NET_H
+
+#include <net/sock.h>
+
+/* struct aa_net - network confinement data
+ * @allowed: basic network families permissions
+ * @audit_network: which network permissions to force audit
+ * @quiet_network: which network permissions to quiet rejects
+ */
+struct aa_net {
+	u16 allowed[AF_MAX];
+	u16 audit[AF_MAX];
+	u16 quiet[AF_MAX];
+};
+
+extern int aa_net_perm(struct aa_profile *profile, char *operation,
+		       int family, int type, int protocol);
+extern int aa_revalidate_sk(struct sock *sk, char *operation);
+
+static inline void aa_free_net_rules(struct aa_net *new)
+{
+	/* NOP */
+}
+
+#endif /* __AA_NET_H */
--- linux-mvl-dove-2.6.32.orig/security/apparmor/include/apparmor.h
+++ linux-mvl-dove-2.6.32/security/apparmor/include/apparmor.h
@@ -0,0 +1,83 @@
+/*
+ * AppArmor security module
+ *
+ * This file contains AppArmor basic global and lib definitions
+ *
+ * Copyright (C) 1998-2008 Novell/SUSE
+ * Copyright 2009-2010 Canonical Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ */
+
+#ifndef __APPARMOR_H
+#define __APPARMOR_H
+
+#include <linux/fs.h>
+
+#include "match.h"
+
+/* Control parameters settable thru module/boot flags or
+ * via /sys/kernel/security/apparmor/control */
+extern enum audit_mode aa_g_audit;
+extern int aa_g_audit_header;
+extern int aa_g_debug;
+extern int aa_g_lock_policy;
+extern int aa_g_logsyscall;
+extern int aa_g_paranoid_load;
+extern unsigned int aa_g_path_max;
+
+/*
+ * DEBUG remains global (no per profile flag) since it is mostly used in sysctl
+ * which is not related to profile accesses.
+ */
+
+#define AA_DEBUG(fmt, args...)						\
+	do {								\
+		if (aa_g_debug && printk_ratelimit())			\
+			printk(KERN_DEBUG "AppArmor: " fmt, ##args);	\
+	} while (0)
+
+#define AA_ERROR(fmt, args...)						\
+	do {								\
+		if (printk_ratelimit())					\
+			printk(KERN_ERR "AppArmor: " fmt, ##args);	\
+	} while (0)
+
+/* Flag indicating whether initialization completed */
+extern int apparmor_initialized;
+void apparmor_disable(void);
+
+/* fn's in lib */
+char *aa_split_fqname(char *args, char **ns_name);
+bool aa_strneq(const char *str, const char *sub, int len);
+void aa_info_message(const char *str);
+char *skip_spaces(const char *str);
+
+/**
+ * aa_dfa_null_transition - step to next state after null character
+ * @dfa: the dfa to match against
+ * @start: the state of the dfa to start matching in
+ * @old: true if using // as the null transition
+ *
+ * aa_dfa_null_transition transitions to the next state after a null
+ * character which is not used in standard matching and is only
+ * used to seperate pairs.
+ */
+static inline unsigned int aa_dfa_null_transition(struct aa_dfa *dfa,
+						  unsigned int start, bool old)
+{
+	if (unlikely(old))
+		return aa_dfa_match_len(dfa, start, "//", 2);
+	else
+		return aa_dfa_match_len(dfa, start, "\0", 1);
+}
+
+static inline bool mediated_filesystem(struct inode *inode)
+{
+	return !(inode->i_sb->s_flags & MS_NOUSER);
+}
+
+#endif /* __APPARMOR_H */
--- linux-mvl-dove-2.6.32.orig/security/apparmor/include/policy.h
+++ linux-mvl-dove-2.6.32/security/apparmor/include/policy.h
@@ -0,0 +1,307 @@
+/*
+ * AppArmor security module
+ *
+ * This file contains AppArmor policy definitions.
+ *
+ * Copyright (C) 1998-2008 Novell/SUSE
+ * Copyright 2009-2010 Canonical Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ */
+
+#ifndef __AA_POLICY_H
+#define __AA_POLICY_H
+
+#include <linux/capability.h>
+#include <linux/cred.h>
+#include <linux/kref.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
+#include <linux/socket.h>
+
+#include "apparmor.h"
+#include "audit.h"
+#include "capability.h"
+#include "domain.h"
+#include "file.h"
+#include "net.h"
+#include "resource.h"
+
+extern const char *profile_mode_names[];
+#define APPARMOR_NAMES_MAX_INDEX 3
+
+#define COMPLAIN_MODE(_profile)				\
+	((aa_g_profile_mode == APPARMOR_COMPLAIN) || ((_profile) &&	\
+					(_profile)->mode == APPARMOR_COMPLAIN))
+
+#define DO_KILL(_profile)					\
+	((aa_g_profile_mode == APPARMOR_KILL) || ((_profile) &&	\
+					(_profile)->mode == APPARMOR_KILL))
+
+#define PROFILE_IS_HAT(_profile) \
+	((_profile) && (_profile)->flags & PFLAG_HAT)
+
+/*
+ * FIXME: currently need a clean way to replace and remove profiles as a
+ * set.  It should be done at the namespace level.
+ * Either, with a set of profiles loaded at the namespace level or via
+ * a mark and remove marked interface.
+ */
+enum profile_mode {
+	APPARMOR_ENFORCE,	/* enforce access rules */
+	APPARMOR_COMPLAIN,	/* allow and log access violations */
+	APPARMOR_KILL,		/* kill task on access violation */
+};
+
+enum profile_flags {
+	PFLAG_HAT = 1,			/* profile is a hat */
+	PFLAG_UNCONFINED = 2,		/* profile is the unconfined profile */
+	PFLAG_NULL = 4,			/* profile is null learning profile */
+	PFLAG_IX_ON_NAME_ERROR = 8,	/* fallback to ix on name lookup fail */
+	PFLAG_IMMUTABLE = 0x10,		/* don't allow changes/replacement */
+	PFLAG_USER_DEFINED = 0x20,	/* user based profile */
+	PFLAG_NO_LIST_REF = 0x40,	/* list doesn't keep profile ref */
+	PFLAG_MMAP_MIN_ADDR = 0x80,	/* profile controls mmap_min_addr */
+	PFLAG_OLD_NULL_TRANS = 0x100,	/* use // as the null transition */
+
+	/* These flags must coorespond with PATH_flags */
+	PFLAG_MEDIATE_DELETED = 0x10000, /* mediate instead delegate deleted */
+};
+
+#define AA_NEW_SID 0
+
+struct aa_profile;
+
+/* struct aa_policy - common part of both namespaces and profiles
+ * @name: name of the object
+ * @hname - The hierarchical name
+ * @count: reference count of the obj
+ * @list: list policy object is on
+ * @profiles: head of the profiles list contained in the object
+ */
+struct aa_policy {
+	char *name;
+	char *hname;
+	struct kref count;
+	struct list_head list;
+	struct list_head profiles;
+};
+
+/* struct aa_ns_acct - accounting of profiles in namespace
+ * @max_size: maximum space allowed for all profiles in namespace
+ * @max_count: maximum number of profiles that can be in this namespace
+ * @size: current size of profiles
+ * @count: current count of profiles (includes null profiles)
+ */
+struct aa_ns_acct {
+	int max_size;
+	int max_count;
+	int size;
+	int count;
+};
+
+/* struct aa_namespace - namespace for a set of profiles
+ * @base: common policy
+ * @parent: parent of namespace
+ * @lock: lock for modifying the object
+ * @acct: accounting for the namespace
+ * @unconfined: special unconfined profile for the namespace
+ * @sub_ns: list of namespaces under the current namespace.
+ *
+ * An aa_namespace defines the set profiles that are searched to determine
+ * which profile to attach to a task.  Profiles can not be shared between
+ * aa_namespaces and profile names within a namespace are guarenteed to be
+ * unique.  When profiles in seperate namespaces have the same name they
+ * are NOT considered to be equivalent.
+ *
+ * Namespaces are hierarchical and only namespaces and profiles below the
+ * current namespace are visible.
+ *
+ * Namespace names must be unique and can not contain the characters :/\0
+ *
+ * FIXME TODO: add vserver support so a vserer (can it all be done in userspace)
+ */
+struct aa_namespace {
+	struct aa_policy base;
+	struct aa_namespace *parent;
+	rwlock_t lock;
+	struct aa_ns_acct acct;
+	struct aa_profile *unconfined;
+	struct list_head sub_ns;
+};
+
+/* struct aa_profile - basic confinement data
+ * @base - base componets of the profile (name, refcount, lists, lock ...)
+ * @parent: parent of profile
+ * @ns: namespace the profile is in
+ * @replacedby: is set profile that replaced this profile
+ * @xmatch: optional extended matching for unconfined executables names
+ * @xmatch_len: xmatch prefix len, used to determine xmatch priority
+ * @sid: the unique security id number of this profile
+ * @audit: the auditing mode of the profile
+ * @mode: the enforcement mode of the profile
+ * @flags: flags controlling profile behavior
+ * @path_flags: flags controlling path generation behavior
+ * @size: the memory consumed by this profiles rules
+ * @file: The set of rules governing basic file access and domain transitions
+ * @caps: capabilities for the profile
+ * @net: network controls for the profile
+ * @rlimits: rlimits for the profile
+ *
+ * The AppArmor profile contains the basic confinement data.  Each profile
+ * has a name, and exist in a namespace.  The @name and @exec_match are
+ * used to determine profile attachment against unconfined tasks.  All other
+ * attachments are determined by in profile X transition rules.
+ *
+ * The @replacedby field is write protected by the profile lock.  Reads
+ * are assumed to be atomic, and are done without locking.
+ *
+ * Profiles have a hierachy where hats and children profiles keep
+ * a reference to their parent.
+ *
+ * Profile names can not begin with a : and can not contain the \0
+ * character.  If a profile name begins with / it will be considered when
+ * determining profile attachment on "unconfined" tasks.
+ */
+struct aa_profile {
+	struct aa_policy base;
+	struct aa_profile *parent;
+
+	struct aa_namespace *ns;
+	union {
+		struct aa_profile *replacedby;
+		const char *rename;
+	};
+	struct aa_dfa *xmatch;
+	int xmatch_len;
+	u32 sid;
+	enum audit_mode audit;
+	enum profile_mode mode;
+	u32 flags;
+	u32 path_flags;
+	int size;
+
+	unsigned long mmap_min_addr;
+
+	struct aa_file_rules file;
+	struct aa_caps caps;
+	struct aa_net net;
+	struct aa_rlimit rlimits;
+};
+
+extern struct aa_namespace *root_ns;
+extern enum profile_mode aa_g_profile_mode;
+
+void aa_add_profile(struct aa_policy *common, struct aa_profile *profile);
+
+int aa_alloc_root_ns(void);
+void aa_free_root_ns(void);
+void aa_free_namespace_kref(struct kref *kref);
+
+struct aa_namespace *aa_find_namespace(struct aa_namespace *root,
+				       const char *name);
+
+static inline struct aa_policy *aa_get_common(struct aa_policy *c)
+{
+	if (c)
+		kref_get(&c->count);
+
+	return c;
+}
+
+/**
+ * aa_get_namespace - increment references count on @ns
+ * @ns: namespace to increment reference count of (MAYBE NULL)
+ *
+ * Returns: pointer to @ns if @ns is NULL returns NULL
+ * Requires: @ns must be held with valid refcount when called
+ */
+static inline struct aa_namespace *aa_get_namespace(struct aa_namespace *ns)
+{
+	if (ns)
+		kref_get(&(ns->base.count));
+
+	return ns;
+}
+
+/**
+ * aa_put_namespace - decrement refcount on @ns
+ * @ns: namespace to put reference to
+ *
+ * Decrement reference count to @ns and if no longer in use free it
+ */
+static inline void aa_put_namespace(struct aa_namespace *ns)
+{
+	if (ns)
+		kref_put(&ns->base.count, aa_free_namespace_kref);
+}
+
+struct aa_profile *aa_alloc_profile(const char *name);
+struct aa_profile *aa_new_null_profile(struct aa_profile *parent, int hat);
+void aa_free_profile_kref(struct kref *kref);
+struct aa_profile *aa_find_child(struct aa_profile *parent, const char *name);
+struct aa_profile *aa_find_profile(struct aa_namespace *ns, const char *name);
+struct aa_profile *aa_match_profile(struct aa_namespace *ns, const char *name);
+
+ssize_t aa_interface_replace_profiles(void *udata, size_t size, bool add_only);
+ssize_t aa_interface_remove_profiles(char *name, size_t size);
+
+#define unconfined(X) ((X)->flags & PFLAG_UNCONFINED)
+
+/**
+ * aa_newest_version - find the newest version of @profile
+ * @profile: the profile to check for newer versions of (NOT NULL)
+ *
+ * Returns: newest version of @profile, if @profile is the newest version
+ *          return @profile.
+ *
+ * NOTE: the profile returned is not refcounted, The refcount on @profile
+ * must be held until the caller decides what to do with the returned newest
+ * version.
+ */
+static inline struct aa_profile *aa_newest_version(struct aa_profile *profile)
+{
+	if (unlikely(profile && profile->replacedby))
+		for (; profile->replacedby; profile = profile->replacedby) ;
+
+	return profile;
+}
+
+/**
+ * aa_get_profile - increment refcount on profile @p
+ * @p: profile  (MAYBE NULL)
+ *
+ * Returns: pointer to @p if @p is NULL will return NULL
+ * Requires: @p must be held with valid refcount when called
+ */
+static inline struct aa_profile *aa_get_profile(struct aa_profile *p)
+{
+	if (p)
+		kref_get(&(p->base.count));
+
+	return p;
+}
+
+/**
+ * aa_put_profile - decrement refcount on profile @p
+ * @p: profile  (MAYBE NULL)
+ */
+static inline void aa_put_profile(struct aa_profile *p)
+{
+	if (p)
+		kref_put(&p->base.count, aa_free_profile_kref);
+}
+
+static inline int AUDIT_MODE(struct aa_profile *profile)
+{
+	if (aa_g_audit != AUDIT_NORMAL)
+		return aa_g_audit;
+	if (profile)
+		return profile->audit;
+	return AUDIT_NORMAL;
+}
+
+#endif /* __AA_POLICY_H */
--- linux-mvl-dove-2.6.32.orig/security/apparmor/include/ipc.h
+++ linux-mvl-dove-2.6.32/security/apparmor/include/ipc.h
@@ -0,0 +1,28 @@
+/*
+ * AppArmor security module
+ *
+ * This file contains AppArmor ipc mediation function definitions.
+ *
+ * Copyright (C) 1998-2008 Novell/SUSE
+ * Copyright 2009-2010 Canonical Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ */
+
+#ifndef __AA_IPC_H
+#define __AA_IPC_H
+
+#include <linux/sched.h>
+
+struct aa_profile;
+
+int aa_may_ptrace(struct task_struct *tracer_task, struct aa_profile *tracer,
+		  struct aa_profile *tracee, unsigned int mode);
+
+int aa_ptrace(struct task_struct *tracer, struct task_struct *tracee,
+	      unsigned int mode);
+
+#endif /* __AA_IPC_H */
--- linux-mvl-dove-2.6.32.orig/security/apparmor/include/domain.h
+++ linux-mvl-dove-2.6.32/security/apparmor/include/domain.h
@@ -0,0 +1,36 @@
+/*
+ * AppArmor security module
+ *
+ * This file contains AppArmor security domain transition function definitions.
+ *
+ * Copyright (C) 1998-2008 Novell/SUSE
+ * Copyright 2009-2010 Canonical Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ */
+
+#include <linux/binfmts.h>
+#include <linux/types.h>
+
+#ifndef __AA_DOMAIN_H
+#define __AA_DOMAIN_H
+
+struct aa_domain {
+	int size;
+	char **table;
+};
+
+int apparmor_bprm_set_creds(struct linux_binprm *bprm);
+int apparmor_bprm_secureexec(struct linux_binprm *bprm);
+void apparmor_bprm_committing_creds(struct linux_binprm *bprm);
+void apparmor_bprm_committed_creds(struct linux_binprm *bprm);
+
+void aa_free_domain_entries(struct aa_domain *domain);
+int aa_change_hat(const char *hats[], int count, u64 token, bool permtest);
+int aa_change_profile(const char *ns_name, const char *name, int onexec,
+		      bool permtest);
+
+#endif /* __AA_DOMAIN_H */
--- linux-mvl-dove-2.6.32.orig/security/apparmor/include/resource.h
+++ linux-mvl-dove-2.6.32/security/apparmor/include/resource.h
@@ -0,0 +1,45 @@
+/*
+ * AppArmor security module
+ *
+ * This file contains AppArmor resource limits function defintions.
+ *
+ * Copyright (C) 1998-2008 Novell/SUSE
+ * Copyright 2009-2010 Canonical Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ */
+
+#ifndef __AA_RESOURCE_H
+#define __AA_RESOURCE_H
+
+#include <linux/resource.h>
+#include <linux/sched.h>
+
+struct aa_profile;
+
+/* struct aa_rlimit - rlimits settings for the profile
+ * @mask: which hard limits to set
+ * @limits: rlimit values that override task limits
+ *
+ * AppArmor rlimits are used to set confined task rlimits.  Only the
+ * limits specified in @mask will be controlled by apparmor.
+ */
+struct aa_rlimit {
+	unsigned int mask;
+	struct rlimit limits[RLIM_NLIMITS];
+};
+
+int aa_task_setrlimit(struct aa_profile *profile, unsigned int resource,
+		      struct rlimit *new_rlim);
+
+void __aa_transition_rlimits(struct aa_profile *old, struct aa_profile *new);
+
+static inline void aa_free_rlimit_rules(struct aa_rlimit *rlims)
+{
+	/* NOP */
+}
+
+#endif /* __AA_RESOURCE_H */
--- linux-mvl-dove-2.6.32.orig/security/apparmor/include/sid.h
+++ linux-mvl-dove-2.6.32/security/apparmor/include/sid.h
@@ -0,0 +1,24 @@
+/*
+ * AppArmor security module
+ *
+ * This file contains AppArmor security identifier (sid) definitions
+ *
+ * Copyright 2009-2010 Canonical Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ */
+
+#ifndef __AA_SID_H
+#define __AA_SID_H
+
+#include <linux/types.h>
+
+struct aa_profile;
+
+u32 aa_alloc_sid(void);
+void aa_free_sid(u32 sid);
+
+#endif /* __AA_SID_H */
--- linux-mvl-dove-2.6.32.orig/security/apparmor/include/path.h
+++ linux-mvl-dove-2.6.32/security/apparmor/include/path.h
@@ -0,0 +1,31 @@
+/*
+ * AppArmor security module
+ *
+ * This file contains AppArmor basic path manipulation function definitions.
+ *
+ * Copyright (C) 1998-2008 Novell/SUSE
+ * Copyright 2009-2010 Canonical Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ */
+
+#ifndef __AA_PATH_H
+#define __AA_PATH_H
+
+
+enum path_flags {
+	PATH_IS_DIR = 0x1,		/* path is a directory */
+	PATH_CONNECT_PATH = 0x4,	/* connect disconnected paths to / */
+	PATH_CHROOT_REL = 0x8,		/* do path lookup relative to chroot */
+	PATH_CHROOT_NSCONNECT = 0x10,	/* connect paths that are at ns root */
+
+	PATH_MEDIATE_DELETED = 0x10000,	/* mediate deleted paths */
+};
+
+int aa_get_name(struct path *path, int flags, char **buffer, char **name);
+char *sysctl_pathname(struct ctl_table *table, char *buffer, int buflen);
+
+#endif /* __AA_PATH_H */
--- linux-mvl-dove-2.6.32.orig/security/selinux/nlmsgtab.c
+++ linux-mvl-dove-2.6.32/security/selinux/nlmsgtab.c
@@ -66,6 +66,8 @@
 	{ RTM_NEWADDRLABEL,	NETLINK_ROUTE_SOCKET__NLMSG_WRITE },
 	{ RTM_DELADDRLABEL,	NETLINK_ROUTE_SOCKET__NLMSG_WRITE },
 	{ RTM_GETADDRLABEL,	NETLINK_ROUTE_SOCKET__NLMSG_READ  },
+	{ RTM_GETDCB,		NETLINK_ROUTE_SOCKET__NLMSG_READ  },
+	{ RTM_SETDCB,		NETLINK_ROUTE_SOCKET__NLMSG_WRITE },
 };
 
 static struct nlmsg_perm nlmsg_firewall_perms[] =
--- linux-mvl-dove-2.6.32.orig/security/selinux/hooks.c
+++ linux-mvl-dove-2.6.32/security/selinux/hooks.c
@@ -76,6 +76,7 @@
 #include <linux/selinux.h>
 #include <linux/mutex.h>
 #include <linux/posix-timers.h>
+#include <linux/syslog.h>
 
 #include "avc.h"
 #include "objsec.h"
@@ -2050,11 +2051,11 @@
 	return dentry_has_perm(cred, NULL, dentry, FILE__QUOTAON);
 }
 
-static int selinux_syslog(int type)
+static int selinux_syslog(int type, bool from_file)
 {
 	int rc;
 
-	rc = cap_syslog(type);
+	rc = cap_syslog(type, from_file);
 	if (rc)
 		return rc;
 
@@ -2366,7 +2367,7 @@
 			initrlim = init_task.signal->rlim + i;
 			rlim->rlim_cur = min(rlim->rlim_max, initrlim->rlim_cur);
 		}
-		update_rlimit_cpu(rlim->rlim_cur);
+		update_rlimit_cpu(current->signal->rlim[RLIMIT_CPU].rlim_cur);
 	}
 }
 
@@ -2601,7 +2602,10 @@
 	sid = tsec->sid;
 	newsid = tsec->create_sid;
 
-	if (!newsid || !(sbsec->flags & SE_SBLABELSUPP)) {
+	if ((sbsec->flags & SE_SBINITIALIZED) &&
+	    (sbsec->behavior == SECURITY_FS_USE_MNTPOINT))
+		newsid = sbsec->mntpoint_sid;
+	else if (!newsid || !(sbsec->flags & SE_SBLABELSUPP)) {
 		rc = security_transition_sid(sid, dsec->sid,
 					     inode_mode_to_security_class(inode->i_mode),
 					     &newsid);
@@ -3259,7 +3263,11 @@
 {
 	struct task_security_struct *tsec = cred->security;
 
-	BUG_ON((unsigned long) cred->security < PAGE_SIZE);
+	/*
+	 * cred->security == NULL if security_cred_alloc_blank() or
+	 * security_prepare_creds() returned an error.
+	 */
+	BUG_ON(cred->security && (unsigned long) cred->security < PAGE_SIZE);
 	cred->security = (void *) 0x7UL;
 	kfree(tsec);
 }
--- linux-mvl-dove-2.6.32.orig/security/selinux/ss/ebitmap.c
+++ linux-mvl-dove-2.6.32/security/selinux/ss/ebitmap.c
@@ -128,7 +128,7 @@
 			cmap_idx = delta / NETLBL_CATMAP_MAPSIZE;
 			cmap_sft = delta % NETLBL_CATMAP_MAPSIZE;
 			c_iter->bitmap[cmap_idx]
-				|= e_iter->maps[cmap_idx] << cmap_sft;
+				|= e_iter->maps[i] << cmap_sft;
 		}
 		e_iter = e_iter->next;
 	}